!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/
!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/
!_TAG_OUTPUT_EXCMD	mixed	/number, pattern, mixed, or combineV2/
!_TAG_OUTPUT_FILESEP	slash	/slash or backslash/
!_TAG_OUTPUT_MODE	u-ctags	/u-ctags or e-ctags/
!_TAG_PATTERN_LENGTH_LIMIT	96	/0 for no limit/
!_TAG_PROC_CWD	/u1/Projects/U-boot/OrangePi/orangepi/	//
!_TAG_PROGRAM_AUTHOR	Universal Ctags Team	//
!_TAG_PROGRAM_NAME	Universal Ctags	/Derived from Exuberant Ctags/
!_TAG_PROGRAM_URL	https://ctags.io/	/official site/
!_TAG_PROGRAM_VERSION	5.9.0	//
$	doc/README.x86	/^$ cd blobs$/;"	l
$	doc/README.x86	/^$ export BUILD_ROM=y$/;"	l
$	doc/README.x86	/^$ git clone http:\/\/review.coreboot.org\/p\/blobs.git$/;"	l
$	doc/README.x86	/^$ make all$/;"	l
$	doc/README.x86	/^$ make chromebook_link_defconfig$/;"	l
$	doc/README.x86	/^$ make coreboot-x86_defconfig$/;"	l
$	doc/README.x86	/^$ make cougarcanyon2_defconfig$/;"	l
$	doc/README.x86	/^$ make crownbay_defconfig$/;"	l
$	doc/README.x86	/^$ make minnowmax_defconfig$/;"	l
$	doc/README.x86	/^[17] https:\/\/www.acpica.org\/downloads$/;"	l
$(CURDIR)/Makefile	Makefile	/^$(CURDIR)\/Makefile Makefile: ;$/;"	t
$(DTB)	dts/Makefile	/^$(DTB): arch-dtbs$/;"	t
$(ELF)	examples/standalone/Makefile	/^$(ELF): $(obj)\/%: $(obj)\/%.o $(LIB) FORCE$/;"	t
$(IMX_CONFIG)	arch/arm/imx-common/Makefile	/^$(IMX_CONFIG): %.cfgtmp: % FORCE$/;"	t
$(KCONFIG_CONFIG)	Makefile	/^$(KCONFIG_CONFIG) include\/config\/auto.conf.cmd: ;$/;"	t
$(LIB)	examples/standalone/Makefile	/^$(LIB):	$(LIBOBJS) FORCE$/;"	t
$(LICENSE_H)	tools/Makefile	/^$(LICENSE_H): $(obj)\/bin2header $(srctree)\/Licenses\/gpl-2.0.txt$/;"	t
$(LOGO_DATA_H)	tools/Makefile	/^$(LOGO_DATA_H):	$(obj)\/bmp_logo $(LOGO_BMP)$/;"	t
$(LOGO_H)	tools/Makefile	/^$(LOGO_H):	$(obj)\/bmp_logo $(LOGO_BMP)$/;"	t
$(OF_LIST_TARGETS)	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^$(OF_LIST_TARGETS): dtbs$/;"	t
$(PLUGIN).bin	arch/arm/imx-common/Makefile	/^$(PLUGIN).bin: $(PLUGIN).o FORCE$/;"	t
$(PLUGIN).bin	arch/arm/imx-common/Makefile	/^$(PLUGIN).bin:$/;"	t
$(PLUGIN).o	arch/arm/imx-common/Makefile	/^$(PLUGIN).o: $(PLUGIN).S FORCE$/;"	t
$(addprefix $(obj)/,$(filter-out fixdep,$(always)))	scripts/basic/Makefile	/^$(addprefix $(obj)\/,$(filter-out fixdep,$(always))): $(obj)\/fixdep$/;"	t
$(addprefix $(obj)/,$(lxdialog))	scripts/kconfig/Makefile	/^$(addprefix $(obj)\/,$(lxdialog)): $(obj)\/dochecklxdialog$/;"	t
$(addprefix $(obj)/,$(notdir $(EXT_COBJ-y)))	examples/api/Makefile	/^$(addprefix $(obj)\/,$(notdir $(EXT_COBJ-y))): $(obj)\/%.o: lib\/%.c FORCE$/;"	t
$(addprefix $(obj)/,$(notdir $(EXT_SOBJ-y)))	examples/api/Makefile	/^$(addprefix $(obj)\/,$(notdir $(EXT_SOBJ-y))): $(obj)\/%.o: arch\/powerpc\/lib\/%.S FORCE$/;"	t
$(clean-dirs)	Makefile	/^$(clean-dirs):$/;"	t
$(cmd_files)	Makefile	/^  $(cmd_files): ;	# Do not try to update included dependency files$/;"	t
$(filter-out __build_one_by_one, $(MAKECMDGOALS))	Makefile	/^$(filter-out __build_one_by_one, $(MAKECMDGOALS)): __build_one_by_one$/;"	t
$(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS))	Makefile	/^$(filter-out _all sub-make $(CURDIR)\/Makefile, $(MAKECMDGOALS)) _all: sub-make$/;"	t
$(filter-out tools, $(u-boot-dirs))	Makefile	/^$(filter-out tools, $(u-boot-dirs)): tools$/;"	t
$(mrproper-dirs)	Makefile	/^$(mrproper-dirs):$/;"	t
$(obj)/%	examples/standalone/Makefile	/^$(ELF): $(obj)\/%: $(obj)\/%.o $(LIB) FORCE$/;"	t
$(obj)/%.bin	examples/standalone/Makefile	/^$(obj)\/%.bin: $(obj)\/% FORCE$/;"	t
$(obj)/%.bin	examples/standalone/Makefile	/^$(obj)\/%.bin: OBJCOPYFLAGS := -O binary$/;"	t
$(obj)/%.moc	scripts/kconfig/Makefile	/^$(obj)\/%.moc: $(src)\/%.h $(obj)\/.tmp_qtcheck$/;"	t
$(obj)/%.o	examples/api/Makefile	/^$(addprefix $(obj)\/,$(notdir $(EXT_COBJ-y))): $(obj)\/%.o: lib\/%.c FORCE$/;"	t
$(obj)/%.o	examples/api/Makefile	/^$(addprefix $(obj)\/,$(notdir $(EXT_SOBJ-y))): $(obj)\/%.o: arch\/powerpc\/lib\/%.S FORCE$/;"	t
$(obj)/%.srec	examples/standalone/Makefile	/^$(obj)\/%.srec: $(obj)\/% FORCE$/;"	t
$(obj)/%.srec	examples/standalone/Makefile	/^$(obj)\/%.srec: OBJCOPYFLAGS := -O srec$/;"	t
$(obj)/%_.o	post/lib_powerpc/fpu/Makefile	/^$(obj)\/%_.o: $(obj)\/%.o FORCE$/;"	t
$(obj)/.strip	tools/Makefile	/^$(obj)\/.strip: $(call objectify,$(filter $(always),$(hostprogs-y)))$/;"	t
$(obj)/.strip	tools/env/Makefile	/^$(obj)\/.strip: $(obj)\/fw_printenv$/;"	t
$(obj)/.tmp_gtkcheck	scripts/kconfig/Makefile	/^$(obj)\/.tmp_gtkcheck:$/;"	t
$(obj)/.tmp_qtcheck	scripts/kconfig/Makefile	/^$(obj)\/.tmp_qtcheck: $(src)\/Makefile$/;"	t
$(obj)/.tmp_qtcheck	scripts/kconfig/Makefile	/^$(obj)\/.tmp_qtcheck:$/;"	t
$(obj)/check_initcode	arch/blackfin/cpu/Makefile	/^$(obj)\/check_initcode: $(obj)\/initcode.o$/;"	t
$(obj)/common/%.c	tools/Makefile	/^$(obj)\/lib\/%.c $(obj)\/common\/%.c:$/;"	t
$(obj)/demo	examples/api/Makefile	/^$(obj)\/demo: $(OBJS) FORCE$/;"	t
$(obj)/demo.bin	examples/api/Makefile	/^$(obj)\/demo.bin: $(obj)\/demo FORCE$/;"	t
$(obj)/dochecklxdialog	scripts/kconfig/Makefile	/^$(obj)\/dochecklxdialog:$/;"	t
$(obj)/dt.dtb	dts/Makefile	/^$(obj)\/dt.dtb: $(DTB) FORCE$/;"	t
$(obj)/eth-raw-os.o	arch/sandbox/cpu/Makefile	/^$(obj)\/eth-raw-os.o: $(src)\/eth-raw-os.c FORCE$/;"	t
$(obj)/gconf.glade.h	scripts/kconfig/Makefile	/^$(obj)\/gconf.glade.h: $(obj)\/gconf.glade$/;"	t
$(obj)/gconf.o	scripts/kconfig/Makefile	/^$(obj)\/gconf.o: $(obj)\/.tmp_gtkcheck$/;"	t
$(obj)/h2200-header.bin	board/h2200/Makefile	/^$(obj)\/h2200-header.bin: $(obj)\/h2200-header.o$/;"	t
$(obj)/init.elf	arch/blackfin/cpu/Makefile	/^$(obj)\/init.elf: $(obj)\/init.lds $(obj)\/init.o $(obj)\/initcode.o$/;"	t
$(obj)/lib.a	arch/x86/lib/Makefile	/^$(obj)\/lib.a: $(NORMAL_LIBGCC) FORCE$/;"	t
$(obj)/lib/%.c	tools/Makefile	/^$(obj)\/lib\/%.c $(obj)\/common\/%.c:$/;"	t
$(obj)/os.o	arch/sandbox/cpu/Makefile	/^$(obj)\/os.o: $(src)\/os.c FORCE$/;"	t
$(obj)/qconf.o	scripts/kconfig/Makefile	/^$(obj)\/qconf.o: $(obj)\/.tmp_qtcheck$/;"	t
$(obj)/qconf.o	scripts/kconfig/Makefile	/^$(obj)\/qconf.o: $(obj)\/qconf.moc$/;"	t
$(obj)/sdl.o	arch/sandbox/cpu/Makefile	/^$(obj)\/sdl.o: $(src)\/sdl.c FORCE$/;"	t
$(obj)/tools/mkorigenspl	board/samsung/origen/Makefile	/^$(obj)\/tools\/mkorigenspl: HOSTCFLAGS:=$(filter-out -O2,$(HOSTCFLAGS))$/;"	t
$(obj)/zconf.tab.o	scripts/kconfig/Makefile	/^$(obj)\/zconf.tab.o: $(obj)\/zconf.lex.c $(obj)\/zconf.hash.c$/;"	t
$(simple-targets)	scripts/kconfig/Makefile	/^$(simple-targets): $(obj)\/conf$/;"	t
$(sort $(u-boot-init) $(u-boot-main))	Makefile	/^$(sort $(u-boot-init) $(u-boot-main)): $(u-boot-dirs) ;$/;"	t
$(timestamp_h)	Makefile	/^$(timestamp_h): $(srctree)\/Makefile FORCE$/;"	t
$(u-boot-dirs)	Makefile	/^$(u-boot-dirs): prepare scripts$/;"	t
$(version_h)	Makefile	/^$(version_h): include\/config\/uboot.release FORCE$/;"	t
%.9	doc/DocBook/Makefile	/^%.9 : %.xml$/;"	t
%.cfgtmp	arch/arm/imx-common/Makefile	/^$(IMX_CONFIG): %.cfgtmp: % FORCE$/;"	t
%.config	scripts/kconfig/Makefile	/^%.config: $(obj)\/conf$/;"	t
%.eps	doc/DocBook/Makefile	/^%.eps: %.fig$/;"	t
%.html	doc/DocBook/Makefile	/^%.html:	%.xml$/;"	t
%.i	Makefile	/^%.i: %.c prepare scripts FORCE$/;"	t
%.imx	Makefile	/^%.imx: %.bin$/;"	t
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%.lst	Makefile	/^%.lst: %.c prepare scripts FORCE$/;"	t
%.o	Makefile	/^%.o: %.S prepare scripts FORCE$/;"	t
%.o	Makefile	/^%.o: %.c prepare scripts FORCE$/;"	t
%.pdf	doc/DocBook/Makefile	/^%.pdf : %.xml$/;"	t
%.png	doc/DocBook/Makefile	/^%.png: %.fig$/;"	t
%.ps	doc/DocBook/Makefile	/^%.ps : %.xml$/;"	t
%.s	Makefile	/^%.s: %.S prepare scripts FORCE$/;"	t
%.s	Makefile	/^%.s: %.c prepare scripts FORCE$/;"	t
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%.symtypes	Makefile	/^%.symtypes: %.c prepare scripts FORCE$/;"	t
%.vyb	Makefile	/^%.vyb: %.imx$/;"	t
%.xml	doc/DocBook/Makefile	/^%.xml: %.c$/;"	t
%.xml	doc/DocBook/Makefile	/^%.xml: %.tmpl $(KERNELDOC) $(DOCPROC) FORCE$/;"	t
%/	Makefile	/^%\/: prepare scripts FORCE$/;"	t
%_HS.dtb	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^%_HS.dtb: %.dtb$/;"	t
%_config	scripts/kconfig/Makefile	/^%_config: %_defconfig$/;"	t
%_defconfig	scripts/kconfig/Makefile	/^%_defconfig: $(obj)\/conf$/;"	t
%config	Makefile	/^%config: scripts_basic outputmakefile FORCE$/;"	t
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.__efi_runtime_start	arch/x86/cpu/u-boot.lds	/^	.__efi_runtime_start : {$/;"	S
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.__secure_start	arch/arm/cpu/u-boot.lds	/^	.__secure_start :$/;"	S
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.data	arch/avr32/cpu/u-boot.lds	/^	.data : {$/;"	S
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.data	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  .data    :$/;"	S
.data	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  .data    :$/;"	S
.data	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  .data    :$/;"	S
.data	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  .data    :$/;"	S
.data	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  .data    :$/;"	S
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.got	arch/sh/cpu/u-boot.lds	/^	.got :$/;"	S
.got	arch/sparc/cpu/u-boot.lds	/^	.got : {$/;"	S
.got	arch/x86/cpu/u-boot.lds	/^	.got : { *(.got*) }$/;"	S
.got	board/renesas/sh7752evb/u-boot.lds	/^	.got :$/;"	S
.got	board/renesas/sh7753evb/u-boot.lds	/^	.got :$/;"	S
.got	board/renesas/sh7757lcr/u-boot.lds	/^	.got :$/;"	S
.got	examples/standalone/mips.lds	/^	.got : {$/;"	S
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.mmutable	board/ti/am335x/u-boot.lds	/^	.mmutable : {$/;"	S
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.rela.dyn	board/qualcomm/dragonboard410c/u-boot.lds	/^	.rela.dyn : {$/;"	S
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.reloc	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  .reloc   :$/;"	S
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.reloc	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  .reloc   :$/;"	S
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.reloc	arch/x86/cpu/efi/elf_x86_64_efi.lds	/^	.reloc : {$/;"	S
.reloc	board/amcc/canyonlands/u-boot-ram.lds	/^  .reloc   :$/;"	S
.reloc	board/amcc/sequoia/u-boot-ram.lds	/^  .reloc   :$/;"	S
.reloc	board/tqc/tqm8xx/u-boot.lds	/^  .reloc   :$/;"	S
.rodata	arch/arc/cpu/u-boot.lds	/^	.rodata : {$/;"	S
.rodata	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	arch/arm/cpu/armv8/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	arch/arm/cpu/u-boot-spl.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	arch/arm/mach-zynq/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	arch/avr32/cpu/u-boot.lds	/^	.rodata : {$/;"	S
.rodata	arch/m68k/cpu/u-boot.lds	/^	.rodata :$/;"	S
.rodata	arch/mips/cpu/u-boot.lds	/^	.rodata : {$/;"	S
.rodata	arch/nds32/cpu/n1213/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  .rodata    :$/;"	S
.rodata	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^    .rodata    :$/;"	S
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.rodata	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^    .rodata    :$/;"	S
.rodata	arch/sh/cpu/u-boot.lds	/^	.rodata :$/;"	S
.rodata	arch/x86/cpu/u-boot.lds	/^	.rodata : {$/;"	S
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.rodata	board/amcc/sequoia/u-boot-ram.lds	/^  .rodata    :$/;"	S
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.rodata	board/compulab/cm_t335/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	board/freescale/mx31ads/u-boot.lds	/^	.rodata : { *(.rodata*) }$/;"	S
.rodata	board/qualcomm/dragonboard410c/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	board/renesas/sh7752evb/u-boot.lds	/^	.rodata :$/;"	S
.rodata	board/renesas/sh7753evb/u-boot.lds	/^	.rodata :$/;"	S
.rodata	board/renesas/sh7757lcr/u-boot.lds	/^	.rodata :$/;"	S
.rodata	board/ti/am335x/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	board/tqc/tqm8xx/u-boot.lds	/^  .rodata    :$/;"	S
.rodata	board/vscom/baltos/u-boot.lds	/^	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	examples/standalone/mips.lds	/^	.rodata  : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	examples/standalone/mips64.lds	/^	.rodata  : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }$/;"	S
.rodata	examples/standalone/sparc.lds	/^	.rodata :$/;"	S
.sdata	arch/mips/cpu/u-boot.lds	/^	.sdata : {$/;"	S
.sdata	arch/nios2/cpu/u-boot.lds	/^	.sdata :$/;"	S
.sdata	arch/x86/cpu/efi/elf_ia32_efi.lds	/^	.sdata :$/;"	S
.sdata	examples/standalone/mips.lds	/^	.sdata  : { *(.sdata*) }$/;"	S
.sdata	examples/standalone/mips64.lds	/^	.sdata  : { *(.sdata*) }$/;"	S
.secure_data	arch/arm/cpu/u-boot.lds	/^	.secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))$/;"	S
.secure_data	u-boot.lds	/^ .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))$/;"	S
.secure_text	u-boot.lds	/^ .secure_text :$/;"	S
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.status-pass	test/py/multiplexed_log.css	/^.status-pass {$/;"	c
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.text	arch/arc/cpu/u-boot.lds	/^	.text :	{$/;"	S
.text	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^	.text	:$/;"	S
.text	arch/arm/cpu/armv8/u-boot.lds	/^	.text :$/;"	S
.text	arch/arm/cpu/u-boot-spl.lds	/^	.text :$/;"	S
.text	arch/arm/cpu/u-boot.lds	/^	.text :$/;"	S
.text	arch/arm/mach-zynq/u-boot.lds	/^	.text :$/;"	S
.text	arch/avr32/cpu/u-boot.lds	/^	.text : {$/;"	S
.text	arch/m68k/cpu/u-boot.lds	/^	.text :$/;"	S
.text	arch/mips/cpu/u-boot.lds	/^	.text : {$/;"	S
.text	arch/nds32/cpu/n1213/u-boot.lds	/^	.text :$/;"	S
.text	arch/nios2/cpu/u-boot.lds	/^	.text :$/;"	S
.text	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc83xx/u-boot-spl.lds	/^	.text : {$/;"	S
.text	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	.text : {$/;"	S
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.text	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  .text      :$/;"	S
.text	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  .text      :$/;"	S
.text	arch/sh/cpu/u-boot.lds	/^	.text :$/;"	S
.text	arch/sparc/cpu/u-boot.lds	/^	.text : {$/;"	S
.text	arch/x86/cpu/efi/elf_ia32_efi.lds	/^	.text :$/;"	S
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.text	arch/x86/cpu/u-boot.lds	/^	.text  : { *(.text*); }$/;"	S
.text	board/amcc/canyonlands/u-boot-ram.lds	/^  .text      :$/;"	S
.text	board/amcc/sequoia/u-boot-ram.lds	/^  .text      :$/;"	S
.text	board/birdland/bav335x/u-boot.lds	/^	.text :$/;"	S
.text	board/cirrus/edb93xx/u-boot.lds	/^	.text : {$/;"	S
.text	board/compulab/cm_t335/u-boot.lds	/^	.text :$/;"	S
.text	board/freescale/mx31ads/u-boot.lds	/^	.text	   :$/;"	S
.text	board/qualcomm/dragonboard410c/u-boot.lds	/^	.text :$/;"	S
.text	board/renesas/sh7752evb/u-boot.lds	/^	.text :$/;"	S
.text	board/renesas/sh7753evb/u-boot.lds	/^	.text :$/;"	S
.text	board/renesas/sh7757lcr/u-boot.lds	/^	.text :$/;"	S
.text	board/ti/am335x/u-boot.lds	/^	.text :$/;"	S
.text	board/tqc/tqm8xx/u-boot.lds	/^  .text      :$/;"	S
.text	board/vscom/baltos/u-boot.lds	/^	.text :$/;"	S
.text	examples/standalone/mips.lds	/^	.text       :$/;"	S
.text	examples/standalone/mips64.lds	/^	.text       :$/;"	S
.text	examples/standalone/nds32.lds	/^	.text :$/;"	S
.text	examples/standalone/sparc.lds	/^	.text :$/;"	S
.text	u-boot.lds	/^ .text :$/;"	S
.text.init	arch/m68k/cpu/u-boot.lds	/^	.text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	arch/sparc/cpu/u-boot.lds	/^	.text.init : { *(.text.init) }$/;"	S
.text.init	board/amcc/canyonlands/u-boot-ram.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	board/amcc/sequoia/u-boot-ram.lds	/^  .text.init : { *(.text.init) }$/;"	S
.text.init	board/tqc/tqm8xx/u-boot.lds	/^  .text.init : { *(.text.init) }$/;"	S
.u_boot_list	arch/arc/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/arm/cpu/armv8/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/arm/cpu/u-boot-spl.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/arm/mach-zynq/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/avr32/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/m68k/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/mips/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/nds32/cpu/n1213/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/nios2/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	arch/sandbox/cpu/u-boot-spl.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/sandbox/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/sh/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/sparc/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	arch/x86/cpu/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/amcc/canyonlands/u-boot-ram.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	board/amcc/sequoia/u-boot-ram.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	board/birdland/bav335x/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/cirrus/edb93xx/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/compulab/cm_t335/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/freescale/mx31ads/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/qualcomm/dragonboard410c/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/renesas/sh7752evb/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/renesas/sh7753evb/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/renesas/sh7757lcr/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/ti/am335x/u-boot.lds	/^	.u_boot_list : {$/;"	S
.u_boot_list	board/tqc/tqm8xx/u-boot.lds	/^  .u_boot_list : {$/;"	S
.u_boot_list	board/vscom/baltos/u-boot.lds	/^	.u_boot_list : {$/;"	S
.warning	test/py/multiplexed_log.css	/^.warning {$/;"	c
/	Makefile	/^\/: prepare scripts FORCE$/;"	t
32BIT	arch/mips/Kconfig	/^config 32BIT$/;"	c	menu:MIPS architecture
32bit-bfd	arch/mips/config.mk	/^32bit-bfd		:= elf32-tradbigmips$/;"	m
32bit-bfd	arch/mips/config.mk	/^32bit-bfd		:= elf32-tradlittlemips$/;"	m
32bit-emul	arch/mips/config.mk	/^32bit-emul		:= elf32btsmip$/;"	m
32bit-emul	arch/mips/config.mk	/^32bit-emul		:= elf32ltsmip$/;"	m
4xx	arch/powerpc/Kconfig	/^config 4xx$/;"	c	choice:PowerPC architecture""choice207a02820104
5xx	arch/powerpc/Kconfig	/^config 5xx$/;"	c	choice:PowerPC architecture""choice207a02820104
64BIT	arch/mips/Kconfig	/^config 64BIT$/;"	c	menu:MIPS architecture
64bit-bfd	arch/mips/config.mk	/^64bit-bfd		:= elf64-tradbigmips$/;"	m
64bit-bfd	arch/mips/config.mk	/^64bit-bfd		:= elf64-tradlittlemips$/;"	m
64bit-emul	arch/mips/config.mk	/^64bit-emul		:= elf64btsmip$/;"	m
64bit-emul	arch/mips/config.mk	/^64bit-emul		:= elf64ltsmip$/;"	m
88F6820	arch/arm/mach-mvebu/Kconfig	/^config 88F6820$/;"	c
8xx	arch/powerpc/Kconfig	/^config 8xx$/;"	c	choice:PowerPC architecture""choice207a02820104
A	arch/avr32/include/asm/hmatrix-common.h	/^		u32	A;$/;"	m	struct:hmatrix_regs::__anonb63485bb0108	typeref:typename:u32
A	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register A, B, C, D;$/;"	m	struct:i386_general_regs	typeref:typename:i386_general_register
A0	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	A0,$/;"	e	enum:board_rev
A0_AMC	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	A0_AMC$/;"	e	enum:board_rev
A0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A0_GMARK,$/;"	e	enum:__anona307945e0103	file:
A0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A0_IMARK,$/;"	e	enum:__anona307945e0103	file:
A0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A0_MARK,	A1_MARK,	A2_MARK,	A3_MARK,$/;"	e	enum:__anona304c1340103	file:
A0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,$/;"	e	enum:__anona3077f190103	file:
A0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,$/;"	e	enum:__anona307879b0103	file:
A0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A0_MARK, BS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A10_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A10_GMARK,$/;"	e	enum:__anona307945e0103	file:
A10_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A10_IMARK,$/;"	e	enum:__anona307945e0103	file:
A10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A10_MARK,	A11_MARK,	A12_MARK,	A13_MARK,$/;"	e	enum:__anona304c1340103	file:
A10_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,$/;"	e	enum:__anona3077f190103	file:
A10_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,$/;"	e	enum:__anona307879b0103	file:
A11_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A11_GMARK,$/;"	e	enum:__anona307945e0103	file:
A11_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A11_IMARK,$/;"	e	enum:__anona307945e0103	file:
A11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A10_MARK,	A11_MARK,	A12_MARK,	A13_MARK,$/;"	e	enum:__anona304c1340103	file:
A11_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,$/;"	e	enum:__anona3077f190103	file:
A11_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,$/;"	e	enum:__anona307879b0103	file:
A11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A11_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A12_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A12_GMARK,$/;"	e	enum:__anona307945e0103	file:
A12_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A12_IMARK,$/;"	e	enum:__anona307945e0103	file:
A12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A10_MARK,	A11_MARK,	A12_MARK,	A13_MARK,$/;"	e	enum:__anona304c1340103	file:
A12_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,$/;"	e	enum:__anona3077f190103	file:
A12_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,$/;"	e	enum:__anona307879b0103	file:
A12_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A12_MARK, PORT58_KEYOUT7_MARK, TPU4TO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A13_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A13_GMARK,$/;"	e	enum:__anona307945e0103	file:
A13_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A13_IMARK,$/;"	e	enum:__anona307945e0103	file:
A13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A10_MARK,	A11_MARK,	A12_MARK,	A13_MARK,$/;"	e	enum:__anona304c1340103	file:
A13_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK,$/;"	e	enum:__anona3077f190103	file:
A13_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,$/;"	e	enum:__anona307879b0103	file:
A13_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A13_MARK, PORT59_KEYOUT6_MARK, TPU0TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A14_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A14_GMARK,$/;"	e	enum:__anona307945e0103	file:
A14_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A14_IMARK,$/;"	e	enum:__anona307945e0103	file:
A14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A14_MARK,	A15_MARK,	A16_MARK,	A17_MARK,$/;"	e	enum:__anona304c1340103	file:
A14_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
A14_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A14_MARK, A15_MARK,$/;"	e	enum:__anona307879b0103	file:
A14_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A14_MARK, KEYOUT5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A15_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A15_GMARK,$/;"	e	enum:__anona307945e0103	file:
A15_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A15_IMARK,$/;"	e	enum:__anona307945e0103	file:
A15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A14_MARK,	A15_MARK,	A16_MARK,	A17_MARK,$/;"	e	enum:__anona304c1340103	file:
A15_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
A15_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A14_MARK, A15_MARK,$/;"	e	enum:__anona307879b0103	file:
A15_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A15_MARK, KEYOUT4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A16_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A16_GMARK,$/;"	e	enum:__anona307945e0103	file:
A16_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A16_IMARK,$/;"	e	enum:__anona307945e0103	file:
A16_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A14_MARK,	A15_MARK,	A16_MARK,	A17_MARK,$/;"	e	enum:__anona304c1340103	file:
A16_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
A16_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A16_MARK, A17_MARK, A18_MARK, A19_MARK,$/;"	e	enum:__anona307879b0103	file:
A16_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A16_MARK, KEYOUT3_MARK, MSIOF0_SS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A17_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	A17_DIV_MASK		= 0x1f,$/;"	e	enum:__anon06a678fa0203	file:
A17_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	A17_DIV_SHIFT		= 8,$/;"	e	enum:__anon06a678fa0203	file:
A17_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A17_GMARK,$/;"	e	enum:__anona307945e0103	file:
A17_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A17_IMARK,$/;"	e	enum:__anona307945e0103	file:
A17_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A14_MARK,	A15_MARK,	A16_MARK,	A17_MARK,$/;"	e	enum:__anona304c1340103	file:
A17_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,$/;"	e	enum:__anona3077f190103	file:
A17_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A16_MARK, A17_MARK, A18_MARK, A19_MARK,$/;"	e	enum:__anona307879b0103	file:
A17_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A17_MARK, KEYOUT2_MARK, MSIOF0_TSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A18_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A18_GMARK,$/;"	e	enum:__anona307945e0103	file:
A18_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A18_IMARK,$/;"	e	enum:__anona307945e0103	file:
A18_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A18_MARK,	A19_MARK,	A20_MARK,	A21_MARK,$/;"	e	enum:__anona304c1340103	file:
A18_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,$/;"	e	enum:__anona3077f190103	file:
A18_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A16_MARK, A17_MARK, A18_MARK, A19_MARK,$/;"	e	enum:__anona307879b0103	file:
A18_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A18_MARK, KEYOUT1_MARK, MSIOF0_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A19_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A19_GMARK,$/;"	e	enum:__anona307945e0103	file:
A19_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A19_IMARK,$/;"	e	enum:__anona307945e0103	file:
A19_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A18_MARK,	A19_MARK,	A20_MARK,	A21_MARK,$/;"	e	enum:__anona304c1340103	file:
A19_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
A19_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A16_MARK, A17_MARK, A18_MARK, A19_MARK,$/;"	e	enum:__anona307879b0103	file:
A19_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A19_MARK, KEYOUT0_MARK, MSIOF0_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A1_GMARK,$/;"	e	enum:__anona307945e0103	file:
A1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A1_IMARK,$/;"	e	enum:__anona307945e0103	file:
A1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A0_MARK,	A1_MARK,	A2_MARK,	A3_MARK,$/;"	e	enum:__anona304c1340103	file:
A1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,$/;"	e	enum:__anona3077f190103	file:
A1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,$/;"	e	enum:__anona307879b0103	file:
A20_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A18_MARK,	A19_MARK,	A20_MARK,	A21_MARK,$/;"	e	enum:__anona304c1340103	file:
A20_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
A20_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,$/;"	e	enum:__anona307879b0103	file:
A20_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A20_MARK,$/;"	e	enum:__anona307945e0103	file:
A20_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A20_MARK, KEYIN0_MARK, MSIOF0_RSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A21_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A18_MARK,	A19_MARK,	A20_MARK,	A21_MARK,$/;"	e	enum:__anona304c1340103	file:
A21_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
A21_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,$/;"	e	enum:__anona307879b0103	file:
A21_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A21_MARK,$/;"	e	enum:__anona307945e0103	file:
A21_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A21_MARK, KEYIN1_MARK, MSIOF0_RSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A22_MARK,	A23_MARK,	A24_MARK,	A25_MARK,$/;"	e	enum:__anona304c1340103	file:
A22_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
A22_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,$/;"	e	enum:__anona307879b0103	file:
A22_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A22_MARK,$/;"	e	enum:__anona307945e0103	file:
A22_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A22_MARK, KEYIN2_MARK, MSIOF0_MCK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A23_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A22_MARK,	A23_MARK,	A24_MARK,	A25_MARK,$/;"	e	enum:__anona304c1340103	file:
A23_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,$/;"	e	enum:__anona3077f190103	file:
A23_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,$/;"	e	enum:__anona307879b0103	file:
A23_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A23_MARK,$/;"	e	enum:__anona307945e0103	file:
A23_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A23_MARK, KEYIN3_MARK, MSIOF0_MCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A24_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A22_MARK,	A23_MARK,	A24_MARK,	A25_MARK,$/;"	e	enum:__anona304c1340103	file:
A24_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,$/;"	e	enum:__anona3077f190103	file:
A24_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,$/;"	e	enum:__anona307879b0103	file:
A24_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A24_MARK,$/;"	e	enum:__anona307945e0103	file:
A24_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A24_MARK, KEYIN4_MARK, MSIOF0_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A25_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A22_MARK,	A23_MARK,	A24_MARK,	A25_MARK,$/;"	e	enum:__anona304c1340103	file:
A25_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,$/;"	e	enum:__anona3077f190103	file:
A25_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,$/;"	e	enum:__anona307879b0103	file:
A25_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A25_MARK,$/;"	e	enum:__anona307945e0103	file:
A25_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A25_MARK, KEYIN5_MARK, MSIOF0_SS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A26_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A26_MARK,$/;"	e	enum:__anona304c1340103	file:
A26_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A26_MARK, KEYIN6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A27_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A27_MARK, PORT149_RDWR_MARK, MFG0_IN1_MARK, PORT149_KEYOUT9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
A29L040	drivers/mtd/jedec_flash.c	/^#define A29L040	/;"	d	file:
A2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A2_GMARK,$/;"	e	enum:__anona307945e0103	file:
A2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A2_IMARK,$/;"	e	enum:__anona307945e0103	file:
A2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A0_MARK,	A1_MARK,	A2_MARK,	A3_MARK,$/;"	e	enum:__anona304c1340103	file:
A2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,$/;"	e	enum:__anona3077f190103	file:
A2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,$/;"	e	enum:__anona307879b0103	file:
A2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	A2_MARK, WE0_N_MARK, WE1_N_MARK, DACK0_MARK,$/;"	e	enum:__anona307901d0103	file:
A38X_CUSTOMER_BOARD_ID0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_CUSTOMER_BOARD_ID0	/;"	d
A38X_CUSTOMER_BOARD_ID1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_CUSTOMER_BOARD_ID1	/;"	d
A38X_CUSTOMER_BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_CUSTOMER_BOARD_ID_BASE	/;"	d
A38X_MARVELL_BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_MARVELL_BOARD_ID_BASE	/;"	d
A38X_MV_CUSTOMER_BOARD_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_MV_CUSTOMER_BOARD_NUM	/;"	d
A38X_MV_MARVELL_BOARD_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_MV_MARVELL_BOARD_NUM	/;"	d
A38X_MV_MAX_CUSTOMER_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_MV_MAX_CUSTOMER_BOARD_ID	/;"	d
A38X_MV_MAX_MARVELL_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A38X_MV_MAX_MARVELL_BOARD_ID	/;"	d
A38X_NUMBER_OF_INTERFACES	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define A38X_NUMBER_OF_INTERFACES	/;"	d	file:
A39X_CUSTOMER_BOARD_ID0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_CUSTOMER_BOARD_ID0	/;"	d
A39X_CUSTOMER_BOARD_ID1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_CUSTOMER_BOARD_ID1	/;"	d
A39X_CUSTOMER_BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_CUSTOMER_BOARD_ID_BASE	/;"	d
A39X_DB_69XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_DB_69XX_ID	/;"	d
A39X_MARVELL_BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_MARVELL_BOARD_ID_BASE	/;"	d
A39X_MV_CUSTOMER_BOARD_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_MV_CUSTOMER_BOARD_NUM	/;"	d
A39X_MV_MARVELL_BOARD_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_MV_MARVELL_BOARD_NUM	/;"	d
A39X_MV_MAX_CUSTOMER_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_MV_MAX_CUSTOMER_BOARD_ID	/;"	d
A39X_MV_MAX_MARVELL_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_MV_MAX_MARVELL_BOARD_ID	/;"	d
A39X_RD_69XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define A39X_RD_69XX_ID	/;"	d
A3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A3_GMARK,$/;"	e	enum:__anona307945e0103	file:
A3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A3_IMARK,$/;"	e	enum:__anona307945e0103	file:
A3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A0_MARK,	A1_MARK,	A2_MARK,	A3_MARK,$/;"	e	enum:__anona304c1340103	file:
A3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,$/;"	e	enum:__anona3077f190103	file:
A3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,$/;"	e	enum:__anona307879b0103	file:
A4_FOE_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A4_FOE_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
A4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A4_GMARK,$/;"	e	enum:__anona307945e0103	file:
A4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A4_IMARK,$/;"	e	enum:__anona307945e0103	file:
A4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
A4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,$/;"	e	enum:__anona307879b0103	file:
A5_FCDE_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A5_FCDE_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
A5_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A5_GMARK,$/;"	e	enum:__anona307945e0103	file:
A5_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A5_IMARK,$/;"	e	enum:__anona307945e0103	file:
A5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,$/;"	e	enum:__anona3077f190103	file:
A5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,$/;"	e	enum:__anona307879b0103	file:
A64_EMAC	drivers/net/sun8i_emac.c	/^	A64_EMAC,$/;"	e	enum:emac_variant	file:
A6_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A6_GMARK,$/;"	e	enum:__anona307945e0103	file:
A6_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A6_IMARK,$/;"	e	enum:__anona307945e0103	file:
A6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A6_MARK,	A7_MARK,	A8_MARK,	A9_MARK,$/;"	e	enum:__anona304c1340103	file:
A6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,$/;"	e	enum:__anona3077f190103	file:
A6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,$/;"	e	enum:__anona307879b0103	file:
A7_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A7_GMARK,$/;"	e	enum:__anona307945e0103	file:
A7_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A7_IMARK,$/;"	e	enum:__anona307945e0103	file:
A7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A6_MARK,	A7_MARK,	A8_MARK,	A9_MARK,$/;"	e	enum:__anona304c1340103	file:
A7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,$/;"	e	enum:__anona3077f190103	file:
A7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,$/;"	e	enum:__anona307879b0103	file:
A83T_EMAC	drivers/net/sun8i_emac.c	/^	A83T_EMAC = 1,$/;"	e	enum:emac_variant	file:
A8_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A8_GMARK,$/;"	e	enum:__anona307945e0103	file:
A8_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A8_IMARK,$/;"	e	enum:__anona307945e0103	file:
A8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A6_MARK,	A7_MARK,	A8_MARK,	A9_MARK,$/;"	e	enum:__anona304c1340103	file:
A8_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,$/;"	e	enum:__anona3077f190103	file:
A8_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,$/;"	e	enum:__anona307879b0103	file:
A9_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A9_GMARK,$/;"	e	enum:__anona307945e0103	file:
A9_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	A9_IMARK,$/;"	e	enum:__anona307945e0103	file:
A9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	A6_MARK,	A7_MARK,	A8_MARK,	A9_MARK,$/;"	e	enum:__anona304c1340103	file:
A9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,$/;"	e	enum:__anona3077f190103	file:
A9_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,$/;"	e	enum:__anona307879b0103	file:
AAC_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AAC_BASE	/;"	d
AAC_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AAC_OFFSET	/;"	d
ABD_STATE	drivers/usb/eth/r8152.h	/^#define ABD_STATE	/;"	d
ABEDMIC_CLK1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEDMIC_CLK1	/;"	d
ABEDMIC_CLK2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEDMIC_CLK2	/;"	d
ABEDMIC_CLK3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEDMIC_CLK3	/;"	d
ABEDMIC_DIN1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEDMIC_DIN1	/;"	d
ABEDMIC_DIN2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEDMIC_DIN2	/;"	d
ABEDMIC_DIN3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEDMIC_DIN3	/;"	d
ABEMCBSP2_CLKX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCBSP2_CLKX	/;"	d
ABEMCBSP2_DR	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCBSP2_DR	/;"	d
ABEMCBSP2_DX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCBSP2_DX	/;"	d
ABEMCBSP2_FSX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCBSP2_FSX	/;"	d
ABEMCPDM_DL_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCPDM_DL_DATA	/;"	d
ABEMCPDM_FRAME	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCPDM_FRAME	/;"	d
ABEMCPDM_LB_CLK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCPDM_LB_CLK	/;"	d
ABEMCPDM_UL_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABEMCPDM_UL_DATA	/;"	d
ABESLIMBUS1_CLOCK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABESLIMBUS1_CLOCK	/;"	d
ABESLIMBUS1_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABESLIMBUS1_DATA	/;"	d
ABE_CLKS	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_CLKS	/;"	d
ABE_CLKS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define ABE_CLKS	/;"	d
ABE_DMIC_CLK1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_DMIC_CLK1	/;"	d
ABE_DMIC_DIN1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_DMIC_DIN1	/;"	d
ABE_DMIC_DIN2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_DMIC_DIN2	/;"	d
ABE_DMIC_DIN3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_DMIC_DIN3	/;"	d
ABE_MCBSP1_CLKX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP1_CLKX	/;"	d
ABE_MCBSP1_DR	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP1_DR	/;"	d
ABE_MCBSP1_DX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP1_DX	/;"	d
ABE_MCBSP1_FSX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP1_FSX	/;"	d
ABE_MCBSP2_CLKX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP2_CLKX	/;"	d
ABE_MCBSP2_DR	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP2_DR	/;"	d
ABE_MCBSP2_DX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP2_DX	/;"	d
ABE_MCBSP2_FSX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_MCBSP2_FSX	/;"	d
ABE_PDM_DL_DATA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_PDM_DL_DATA	/;"	d
ABE_PDM_FRAME	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_PDM_FRAME	/;"	d
ABE_PDM_LB_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_PDM_LB_CLK	/;"	d
ABE_PDM_UL_DATA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define ABE_PDM_UL_DATA	/;"	d
ABORT_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define ABORT_BASE_ADDRESS	/;"	d
ABORT_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define ABORT_BASE_SIZE	/;"	d
ABP_SFR_INTERLEAVE_ADDRMAP_END_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_INTERLEAVE_ADDRMAP_END_OFFSET	/;"	d
ABP_SFR_INTERLEAVE_ADDRMAP_START_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_INTERLEAVE_ADDRMAP_START_OFFSET	/;"	d
ABP_SFR_SLV0_SINGLE_ADDRMAP_END_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_SLV0_SINGLE_ADDRMAP_END_OFFSET	/;"	d
ABP_SFR_SLV0_SINGLE_ADDRMAP_START_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_SLV0_SINGLE_ADDRMAP_START_OFFSET	/;"	d
ABP_SFR_SLV1_SINGLE_ADDRMAP_END_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_SLV1_SINGLE_ADDRMAP_END_OFFSET	/;"	d
ABP_SFR_SLV1_SINGLE_ADDRMAP_START_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_SLV1_SINGLE_ADDRMAP_START_OFFSET	/;"	d
ABP_SFR_SLV_ADDRMAP_CONF_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define ABP_SFR_SLV_ADDRMAP_CONF_OFFSET	/;"	d
ABRT	include/sym53c8xx.h	/^  #define   ABRT /;"	d
ABS	arch/mips/include/asm/asm.h	/^#define ABS(/;"	d
ABSYNC	arch/arm/include/asm/ti-common/ti-edma3.h	/^	ABSYNC = 1$/;"	e	enum:edma3_sync_dimension
ABS_BRAKE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_BRAKE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_BRAKE	/;"	d
ABS_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_CNT	/;"	d
ABS_DISTANCE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_DISTANCE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_DISTANCE	/;"	d
ABS_GAS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_GAS	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_GAS	/;"	d
ABS_HAT0X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0X	/;"	d
ABS_HAT0Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT0Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT0Y	/;"	d
ABS_HAT1X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1X	/;"	d
ABS_HAT1Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT1Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT1Y	/;"	d
ABS_HAT2X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2X	/;"	d
ABS_HAT2Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT2Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT2Y	/;"	d
ABS_HAT3X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3X	/;"	d
ABS_HAT3Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_HAT3Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_HAT3Y	/;"	d
ABS_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MAX	/;"	d
ABS_MISC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MISC	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MISC	/;"	d
ABS_MT_BLOB_ID	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_BLOB_ID	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_BLOB_ID	/;"	d
ABS_MT_DISTANCE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_DISTANCE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_DISTANCE	/;"	d
ABS_MT_ORIENTATION	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_ORIENTATION	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_ORIENTATION	/;"	d
ABS_MT_POSITION_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_X	/;"	d
ABS_MT_POSITION_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_POSITION_Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_POSITION_Y	/;"	d
ABS_MT_PRESSURE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_PRESSURE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_PRESSURE	/;"	d
ABS_MT_SLOT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_SLOT	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_SLOT	/;"	d
ABS_MT_TOOL_TYPE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_TYPE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_TYPE	/;"	d
ABS_MT_TOOL_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_X	/;"	d
ABS_MT_TOOL_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOOL_Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOOL_Y	/;"	d
ABS_MT_TOUCH_MAJOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MAJOR	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MAJOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TOUCH_MINOR	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TOUCH_MINOR	/;"	d
ABS_MT_TRACKING_ID	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_TRACKING_ID	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_TRACKING_ID	/;"	d
ABS_MT_WIDTH_MAJOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MAJOR	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MAJOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_MT_WIDTH_MINOR	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_MT_WIDTH_MINOR	/;"	d
ABS_PRESSURE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_PRESSURE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_PRESSURE	/;"	d
ABS_RUDDER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RUDDER	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RUDDER	/;"	d
ABS_RX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RX	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RX	/;"	d
ABS_RY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RY	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RY	/;"	d
ABS_RZ	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_RZ	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_RZ	/;"	d
ABS_THROTTLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_THROTTLE	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_THROTTLE	/;"	d
ABS_TILT_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_X	/;"	d
ABS_TILT_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TILT_Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TILT_Y	/;"	d
ABS_TOOL_WIDTH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_TOOL_WIDTH	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_TOOL_WIDTH	/;"	d
ABS_VOLUME	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_VOLUME	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_VOLUME	/;"	d
ABS_WHEEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_WHEEL	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_WHEEL	/;"	d
ABS_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_X	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_X	/;"	d
ABS_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Y	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Y	/;"	d
ABS_Z	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABS_Z	include/dt-bindings/input/linux-event-codes.h	/^#define ABS_Z	/;"	d
ABT_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ABT_MODE	/;"	d
AC97C_CE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_CE /;"	d
AC97C_CMD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_CMD /;"	d
AC97C_CNTRL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_CNTRL /;"	d
AC97C_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_CONFIG /;"	d
AC97C_CP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_CP /;"	d
AC97C_DATA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_DATA /;"	d
AC97C_INDEX_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_INDEX_MASK /;"	d
AC97C_RE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RE /;"	d
AC97C_READ	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_READ /;"	d
AC97C_READY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_READY /;"	d
AC97C_RECV_SLOTS_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RECV_SLOTS_BIT /;"	d
AC97C_RECV_SLOTS_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RECV_SLOTS_MASK /;"	d
AC97C_RESET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RESET /;"	d
AC97C_RF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RF /;"	d
AC97C_RO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RO /;"	d
AC97C_RR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RR /;"	d
AC97C_RS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RS /;"	d
AC97C_RU	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_RU /;"	d
AC97C_SG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_SG /;"	d
AC97C_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_STATUS /;"	d
AC97C_SYNC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_SYNC /;"	d
AC97C_TE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_TE /;"	d
AC97C_TF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_TF /;"	d
AC97C_TR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_TR /;"	d
AC97C_WD_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_WD_BIT /;"	d
AC97C_XMIT_SLOTS_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_XMIT_SLOTS_BIT /;"	d
AC97C_XMIT_SLOTS_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_XMIT_SLOTS_MASK /;"	d
AC97C_XO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_XO /;"	d
AC97C_XU	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AC97C_XU /;"	d
AC97_DIV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AC97_DIV	/;"	d
ACACHE_BCACHE	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ACACHE_BCACHE	/;"	d
ACACHE_BSRAM	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ACACHE_BSRAM	/;"	d
ACCELMEMORY	drivers/video/ati_radeon_fb.c	/^#define ACCELMEMORY	/;"	d	file:
ACCELMEMORY	drivers/video/ct69000.c	/^#define ACCELMEMORY	/;"	d	file:
ACCEPT_MAC_ADDR	drivers/net/mvgbe.h	/^#define ACCEPT_MAC_ADDR	/;"	d
ACCESS	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define ACCESS	/;"	d
ACCESS	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	ACCESS,$/;"	e	enum:__anon957231910203	file:
ACCESS_EXT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ACCESS_EXT	/;"	d
ACCESS_EXT_REGS_OFFSET	include/usb/ulpi.h	/^#define ACCESS_EXT_REGS_OFFSET	/;"	d
ACCESS_FLAG	drivers/bios_emulator/include/x86emu/regs.h	/^#define ACCESS_FLAG(/;"	d
ACCESS_LATCH	arch/blackfin/include/asm/serial1.h	/^# define ACCESS_LATCH(/;"	d
ACCESS_ONCE	include/linux/compiler.h	/^#define ACCESS_ONCE(/;"	d
ACCESS_PORT_IER	arch/blackfin/include/asm/serial1.h	/^# define ACCESS_PORT_IER(/;"	d
ACCESS_REQ	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define ACCESS_REQ	/;"	d
ACCESS_REQ	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	ACCESS_REQ,$/;"	e	enum:__anon957231910203	file:
ACCESS_TYPE_MULTICAST	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	ACCESS_TYPE_MULTICAST = 1$/;"	e	enum:hws_access_type
ACCESS_TYPE_UNICAST	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	ACCESS_TYPE_UNICAST = 0,$/;"	e	enum:hws_access_type
ACCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR	/;"	d
ACCR_13MEND1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_13MEND1	/;"	d
ACCR_13MEND2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_13MEND2	/;"	d
ACCR_D0CS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_D0CS	/;"	d
ACCR_DDR_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_DDR_MASK	/;"	d
ACCR_FC_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_FC_MASK	/;"	d
ACCR_HSIO_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_HSIO_MASK	/;"	d
ACCR_PCCE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_PCCE	/;"	d
ACCR_SMC_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_SMC_MASK	/;"	d
ACCR_SPDIS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_SPDIS	/;"	d
ACCR_SRAM_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_SRAM_MASK	/;"	d
ACCR_XL_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_XL_MASK	/;"	d
ACCR_XN_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_XN_MASK	/;"	d
ACCR_XPDIS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACCR_XPDIS	/;"	d
ACC_CLKS	drivers/mtd/nand/denali.h	/^#define ACC_CLKS	/;"	d
ACC_CLKS__VALUE	drivers/mtd/nand/denali.h	/^#define     ACC_CLKS__VALUE	/;"	d
ACC_CLOCKS	drivers/mtd/nand/denali.h	/^#define ACC_CLOCKS /;"	d
ACC_SU_ALL	arch/sparc/cpu/leon2/prom.c	/^#define ACC_SU_ALL /;"	d	file:
ACC_SU_ALL	arch/sparc/cpu/leon3/prom.c	/^#define ACC_SU_ALL /;"	d	file:
ACDLLCR_DLLDIS	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define ACDLLCR_DLLDIS	/;"	d
ACDLLCR_DLLSRST	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define ACDLLCR_DLLSRST	/;"	d
ACEN_DISABLE	arch/arm/include/asm/omap_mmc.h	/^#define ACEN_DISABLE	/;"	d
ACEX1K_dump	drivers/fpga/ACEX1K.c	/^int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
ACEX1K_info	drivers/fpga/ACEX1K.c	/^int ACEX1K_info( Altera_desc *desc )$/;"	f	typeref:typename:int
ACEX1K_load	drivers/fpga/ACEX1K.c	/^int ACEX1K_load(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
ACEX1K_ps_dump	drivers/fpga/ACEX1K.c	/^static int ACEX1K_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
ACEX1K_ps_load	drivers/fpga/ACEX1K.c	/^static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
ACE_AES_BUSY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_BUSY_MASK	/;"	d
ACE_AES_BUSY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_BUSY_OFF	/;"	d
ACE_AES_BUSY_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_BUSY_ON	/;"	d
ACE_AES_COUNTERSIZE_128	drivers/crypto/ace_sha.h	/^#define ACE_AES_COUNTERSIZE_128	/;"	d
ACE_AES_COUNTERSIZE_16	drivers/crypto/ace_sha.h	/^#define ACE_AES_COUNTERSIZE_16	/;"	d
ACE_AES_COUNTERSIZE_32	drivers/crypto/ace_sha.h	/^#define ACE_AES_COUNTERSIZE_32	/;"	d
ACE_AES_COUNTERSIZE_64	drivers/crypto/ace_sha.h	/^#define ACE_AES_COUNTERSIZE_64	/;"	d
ACE_AES_COUNTERSIZE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_COUNTERSIZE_MASK	/;"	d
ACE_AES_FIFO_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_FIFO_MASK	/;"	d
ACE_AES_FIFO_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_FIFO_OFF	/;"	d
ACE_AES_FIFO_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_FIFO_ON	/;"	d
ACE_AES_INRDY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_INRDY_MASK	/;"	d
ACE_AES_INRDY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_INRDY_OFF	/;"	d
ACE_AES_INRDY_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_INRDY_ON	/;"	d
ACE_AES_KEYCNGMODE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYCNGMODE_MASK	/;"	d
ACE_AES_KEYCNGMODE_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYCNGMODE_OFF	/;"	d
ACE_AES_KEYCNGMODE_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYCNGMODE_ON	/;"	d
ACE_AES_KEYSIZE_128	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYSIZE_128	/;"	d
ACE_AES_KEYSIZE_192	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYSIZE_192	/;"	d
ACE_AES_KEYSIZE_256	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYSIZE_256	/;"	d
ACE_AES_KEYSIZE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_KEYSIZE_MASK	/;"	d
ACE_AES_MODE_DEC	drivers/crypto/ace_sha.h	/^#define ACE_AES_MODE_DEC	/;"	d
ACE_AES_MODE_ENC	drivers/crypto/ace_sha.h	/^#define ACE_AES_MODE_ENC	/;"	d
ACE_AES_MODE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_MODE_MASK	/;"	d
ACE_AES_OPERMODE_CBC	drivers/crypto/ace_sha.h	/^#define ACE_AES_OPERMODE_CBC	/;"	d
ACE_AES_OPERMODE_CTR	drivers/crypto/ace_sha.h	/^#define ACE_AES_OPERMODE_CTR	/;"	d
ACE_AES_OPERMODE_ECB	drivers/crypto/ace_sha.h	/^#define ACE_AES_OPERMODE_ECB	/;"	d
ACE_AES_OPERMODE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_OPERMODE_MASK	/;"	d
ACE_AES_OUTRDY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_OUTRDY_MASK	/;"	d
ACE_AES_OUTRDY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_OUTRDY_OFF	/;"	d
ACE_AES_OUTRDY_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_OUTRDY_ON	/;"	d
ACE_AES_SWAPCNT_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPCNT_OFF	/;"	d
ACE_AES_SWAPCNT_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPCNT_ON	/;"	d
ACE_AES_SWAPDI_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPDI_OFF	/;"	d
ACE_AES_SWAPDI_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPDI_ON	/;"	d
ACE_AES_SWAPDO_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPDO_OFF	/;"	d
ACE_AES_SWAPDO_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPDO_ON	/;"	d
ACE_AES_SWAPIV_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPIV_OFF	/;"	d
ACE_AES_SWAPIV_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPIV_ON	/;"	d
ACE_AES_SWAPKEY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPKEY_OFF	/;"	d
ACE_AES_SWAPKEY_ON	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAPKEY_ON	/;"	d
ACE_AES_SWAP_MASK	drivers/crypto/ace_sha.h	/^#define ACE_AES_SWAP_MASK	/;"	d
ACE_FC_AES_RESET	drivers/crypto/ace_sha.h	/^#define ACE_FC_AES_RESET	/;"	d
ACE_FC_AXI_ENDIAN_BIBE	drivers/crypto/ace_sha.h	/^#define ACE_FC_AXI_ENDIAN_BIBE	/;"	d
ACE_FC_AXI_ENDIAN_LE	drivers/crypto/ace_sha.h	/^#define ACE_FC_AXI_ENDIAN_LE	/;"	d
ACE_FC_AXI_ENDIAN_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_AXI_ENDIAN_MASK	/;"	d
ACE_FC_AXI_ENDIAN_WIBE	drivers/crypto/ace_sha.h	/^#define ACE_FC_AXI_ENDIAN_WIBE	/;"	d
ACE_FC_BRDMA	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMA	/;"	d
ACE_FC_BRDMACARCACHE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACARCACHE_MASK	/;"	d
ACE_FC_BRDMACARCACHE_OFS	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACARCACHE_OFS	/;"	d
ACE_FC_BRDMACARPROT_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACARPROT_MASK	/;"	d
ACE_FC_BRDMACARPROT_OFS	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACARPROT_OFS	/;"	d
ACE_FC_BRDMACFLUSH_OFF	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACFLUSH_OFF	/;"	d
ACE_FC_BRDMACFLUSH_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACFLUSH_ON	/;"	d
ACE_FC_BRDMACSWAP_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRDMACSWAP_ON	/;"	d
ACE_FC_BRFIFO_EMPTY	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRFIFO_EMPTY	/;"	d
ACE_FC_BRFIFO_FULL	drivers/crypto/ace_sha.h	/^#define ACE_FC_BRFIFO_FULL	/;"	d
ACE_FC_BTDMA	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMA	/;"	d
ACE_FC_BTDMACAWCACHE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACAWCACHE_MASK	/;"	d
ACE_FC_BTDMACAWCACHE_OFS	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACAWCACHE_OFS	/;"	d
ACE_FC_BTDMACAWPROT_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACAWPROT_MASK	/;"	d
ACE_FC_BTDMACAWPROT_OFS	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACAWPROT_OFS	/;"	d
ACE_FC_BTDMACFLUSH_OFF	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACFLUSH_OFF	/;"	d
ACE_FC_BTDMACFLUSH_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACFLUSH_ON	/;"	d
ACE_FC_BTDMACSWAP_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTDMACSWAP_ON	/;"	d
ACE_FC_BTFIFO_EMPTY	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTFIFO_EMPTY	/;"	d
ACE_FC_BTFIFO_FULL	drivers/crypto/ace_sha.h	/^#define ACE_FC_BTFIFO_FULL	/;"	d
ACE_FC_DES_RESET	drivers/crypto/ace_sha.h	/^#define ACE_FC_DES_RESET	/;"	d
ACE_FC_DMA_RESET	drivers/crypto/ace_sha.h	/^#define ACE_FC_DMA_RESET	/;"	d
ACE_FC_HASH_RESET	drivers/crypto/ace_sha.h	/^#define ACE_FC_HASH_RESET	/;"	d
ACE_FC_HRDMA	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMA	/;"	d
ACE_FC_HRDMACARCACHE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACARCACHE_MASK	/;"	d
ACE_FC_HRDMACARCACHE_OFS	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACARCACHE_OFS	/;"	d
ACE_FC_HRDMACARPROT_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACARPROT_MASK	/;"	d
ACE_FC_HRDMACARPROT_OFS	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACARPROT_OFS	/;"	d
ACE_FC_HRDMACFLUSH_OFF	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACFLUSH_OFF	/;"	d
ACE_FC_HRDMACFLUSH_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACFLUSH_ON	/;"	d
ACE_FC_HRDMACSWAP_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRDMACSWAP_ON	/;"	d
ACE_FC_HRFIFO_EMPTY	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRFIFO_EMPTY	/;"	d
ACE_FC_HRFIFO_FULL	drivers/crypto/ace_sha.h	/^#define ACE_FC_HRFIFO_FULL	/;"	d
ACE_FC_MSG_DONE	drivers/crypto/ace_sha.h	/^#define ACE_FC_MSG_DONE	/;"	d
ACE_FC_PARTIAL_DONE	drivers/crypto/ace_sha.h	/^#define ACE_FC_PARTIAL_DONE	/;"	d
ACE_FC_PKDMA	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKDMA	/;"	d
ACE_FC_PKDMACBYTESWAP_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKDMACBYTESWAP_ON	/;"	d
ACE_FC_PKDMACDESEND_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKDMACDESEND_ON	/;"	d
ACE_FC_PKDMACFLUSH_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKDMACFLUSH_ON	/;"	d
ACE_FC_PKDMACTRANSMIT_ON	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKDMACTRANSMIT_ON	/;"	d
ACE_FC_PKFIFO_EMPTY	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKFIFO_EMPTY	/;"	d
ACE_FC_PKFIFO_FULL	drivers/crypto/ace_sha.h	/^#define ACE_FC_PKFIFO_FULL	/;"	d
ACE_FC_PRNG_DONE	drivers/crypto/ace_sha.h	/^#define ACE_FC_PRNG_DONE	/;"	d
ACE_FC_PRNG_ERROR	drivers/crypto/ace_sha.h	/^#define ACE_FC_PRNG_ERROR	/;"	d
ACE_FC_SELBC_AES	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELBC_AES	/;"	d
ACE_FC_SELBC_DES	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELBC_DES	/;"	d
ACE_FC_SELBC_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELBC_MASK	/;"	d
ACE_FC_SELHASH_BCIN	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELHASH_BCIN	/;"	d
ACE_FC_SELHASH_BCOUT	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELHASH_BCOUT	/;"	d
ACE_FC_SELHASH_EXOUT	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELHASH_EXOUT	/;"	d
ACE_FC_SELHASH_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_SELHASH_MASK	/;"	d
ACE_FC_SRAMOFFSET_MASK	drivers/crypto/ace_sha.h	/^#define ACE_FC_SRAMOFFSET_MASK	/;"	d
ACE_FC_SSS_RESET	drivers/crypto/ace_sha.h	/^#define ACE_FC_SSS_RESET	/;"	d
ACE_HASH_BUFRDY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_BUFRDY_MASK	/;"	d
ACE_HASH_BUFRDY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_BUFRDY_OFF	/;"	d
ACE_HASH_BUFRDY_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_BUFRDY_ON	/;"	d
ACE_HASH_ENGSEL_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_MASK	/;"	d
ACE_HASH_ENGSEL_MD5HASH	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_MD5HASH	/;"	d
ACE_HASH_ENGSEL_MD5HMAC	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_MD5HMAC	/;"	d
ACE_HASH_ENGSEL_MD5HMACIN	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_MD5HMACIN	/;"	d
ACE_HASH_ENGSEL_MD5HMACOUT	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_MD5HMACOUT	/;"	d
ACE_HASH_ENGSEL_PRNG	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_PRNG	/;"	d
ACE_HASH_ENGSEL_SHA1HASH	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_SHA1HASH	/;"	d
ACE_HASH_ENGSEL_SHA1HMAC	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_SHA1HMAC	/;"	d
ACE_HASH_ENGSEL_SHA1HMACIN	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_SHA1HMACIN	/;"	d
ACE_HASH_ENGSEL_SHA1HMACOUT	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_SHA1HMACOUT	/;"	d
ACE_HASH_ENGSEL_SHA256HASH	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_SHA256HASH	/;"	d
ACE_HASH_ENGSEL_SHA256HMAC	drivers/crypto/ace_sha.h	/^#define ACE_HASH_ENGSEL_SHA256HMAC	/;"	d
ACE_HASH_FIFO_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_FIFO_MASK	/;"	d
ACE_HASH_FIFO_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_FIFO_OFF	/;"	d
ACE_HASH_FIFO_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_FIFO_ON	/;"	d
ACE_HASH_MSGDONE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_MSGDONE_MASK	/;"	d
ACE_HASH_MSGDONE_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_MSGDONE_OFF	/;"	d
ACE_HASH_MSGDONE_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_MSGDONE_ON	/;"	d
ACE_HASH_PARTIALDONE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PARTIALDONE_MASK	/;"	d
ACE_HASH_PARTIALDONE_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PARTIALDONE_OFF	/;"	d
ACE_HASH_PARTIALDONE_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PARTIALDONE_ON	/;"	d
ACE_HASH_PAUSE_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PAUSE_ON	/;"	d
ACE_HASH_PRNGBUSY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGBUSY_MASK	/;"	d
ACE_HASH_PRNGBUSY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGBUSY_OFF	/;"	d
ACE_HASH_PRNGBUSY_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGBUSY_ON	/;"	d
ACE_HASH_PRNGDONE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGDONE_MASK	/;"	d
ACE_HASH_PRNGDONE_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGDONE_OFF	/;"	d
ACE_HASH_PRNGDONE_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGDONE_ON	/;"	d
ACE_HASH_PRNGERROR_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGERROR_MASK	/;"	d
ACE_HASH_PRNGERROR_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGERROR_OFF	/;"	d
ACE_HASH_PRNGERROR_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNGERROR_ON	/;"	d
ACE_HASH_PRNG_REG_NUM	drivers/crypto/ace_sha.h	/^#define ACE_HASH_PRNG_REG_NUM	/;"	d
ACE_HASH_SEEDSETTING_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SEEDSETTING_MASK	/;"	d
ACE_HASH_SEEDSETTING_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SEEDSETTING_OFF	/;"	d
ACE_HASH_SEEDSETTING_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SEEDSETTING_ON	/;"	d
ACE_HASH_STARTBIT_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_STARTBIT_ON	/;"	d
ACE_HASH_SWAPDI_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAPDI_OFF	/;"	d
ACE_HASH_SWAPDI_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAPDI_ON	/;"	d
ACE_HASH_SWAPDO_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAPDO_OFF	/;"	d
ACE_HASH_SWAPDO_ON	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAPDO_ON	/;"	d
ACE_HASH_SWAPIV_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAPIV_OFF	/;"	d
ACE_HASH_SWAPIV_ON	drivers/crypto/ace_sha.h	/^#define	ACE_HASH_SWAPIV_ON	/;"	d
ACE_HASH_SWAPKEY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAPKEY_OFF	/;"	d
ACE_HASH_SWAPKEY_ON	drivers/crypto/ace_sha.h	/^#define	ACE_HASH_SWAPKEY_ON	/;"	d
ACE_HASH_SWAP_MASK	drivers/crypto/ace_sha.h	/^#define ACE_HASH_SWAP_MASK	/;"	d
ACE_HASH_USERIV_EN	drivers/crypto/ace_sha.h	/^#define ACE_HASH_USERIV_EN	/;"	d
ACE_SHA_TYPE_SHA1	drivers/crypto/ace_sha.h	/^#define ACE_SHA_TYPE_SHA1	/;"	d
ACE_SHA_TYPE_SHA256	drivers/crypto/ace_sha.h	/^#define ACE_SHA_TYPE_SHA256	/;"	d
ACE_SLOT_CNT	include/zfs/zfs_acl.h	/^#define	ACE_SLOT_CNT	/;"	d
ACE_TDES_BUSY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_BUSY_MASK	/;"	d
ACE_TDES_BUSY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_BUSY_OFF	/;"	d
ACE_TDES_BUSY_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_BUSY_ON	/;"	d
ACE_TDES_FIFO_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_FIFO_MASK	/;"	d
ACE_TDES_FIFO_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_FIFO_OFF	/;"	d
ACE_TDES_FIFO_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_FIFO_ON	/;"	d
ACE_TDES_INRDY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_INRDY_MASK	/;"	d
ACE_TDES_INRDY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_INRDY_OFF	/;"	d
ACE_TDES_INRDY_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_INRDY_ON	/;"	d
ACE_TDES_MODE_DEC	drivers/crypto/ace_sha.h	/^#define ACE_TDES_MODE_DEC	/;"	d
ACE_TDES_MODE_ENC	drivers/crypto/ace_sha.h	/^#define ACE_TDES_MODE_ENC	/;"	d
ACE_TDES_MODE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_MODE_MASK	/;"	d
ACE_TDES_OPERMODE_CBC	drivers/crypto/ace_sha.h	/^#define ACE_TDES_OPERMODE_CBC	/;"	d
ACE_TDES_OPERMODE_ECB	drivers/crypto/ace_sha.h	/^#define ACE_TDES_OPERMODE_ECB	/;"	d
ACE_TDES_OPERMODE_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_OPERMODE_MASK	/;"	d
ACE_TDES_OUTRDY_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_OUTRDY_MASK	/;"	d
ACE_TDES_OUTRDY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_OUTRDY_OFF	/;"	d
ACE_TDES_OUTRDY_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_OUTRDY_ON	/;"	d
ACE_TDES_SEL_DES	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SEL_DES	/;"	d
ACE_TDES_SEL_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SEL_MASK	/;"	d
ACE_TDES_SEL_TDESEDE	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SEL_TDESEDE	/;"	d
ACE_TDES_SEL_TDESEEE	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SEL_TDESEEE	/;"	d
ACE_TDES_SWAPDI_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPDI_OFF	/;"	d
ACE_TDES_SWAPDI_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPDI_ON	/;"	d
ACE_TDES_SWAPDO_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPDO_OFF	/;"	d
ACE_TDES_SWAPDO_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPDO_ON	/;"	d
ACE_TDES_SWAPIV_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPIV_OFF	/;"	d
ACE_TDES_SWAPIV_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPIV_ON	/;"	d
ACE_TDES_SWAPKEY_OFF	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPKEY_OFF	/;"	d
ACE_TDES_SWAPKEY_ON	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAPKEY_ON	/;"	d
ACE_TDES_SWAP_MASK	drivers/crypto/ace_sha.h	/^#define ACE_TDES_SWAP_MASK	/;"	d
ACFG3	arch/arm/mach-davinci/lowlevel_init.S	/^ACFG3:$/;"	l
ACFG3_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^ACFG3_VAL:$/;"	l
ACFG4	arch/arm/mach-davinci/lowlevel_init.S	/^ACFG4:$/;"	l
ACFG4_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^ACFG4_VAL:$/;"	l
ACFG5	arch/arm/mach-davinci/lowlevel_init.S	/^ACFG5:$/;"	l
ACFG5_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^ACFG5_VAL:$/;"	l
ACFG_2XHCLK_LGTH	board/armadeus/apf27/apf27.h	/^#define ACFG_2XHCLK_LGTH	/;"	d
ACFG_AIPI1_PSR0_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_AIPI1_PSR0_VAL	/;"	d
ACFG_AIPI1_PSR1_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_AIPI1_PSR1_VAL	/;"	d
ACFG_AIPI2_PSR0_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_AIPI2_PSR0_VAL	/;"	d
ACFG_AIPI2_PSR1_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_AIPI2_PSR1_VAL	/;"	d
ACFG_AUTOREFRESH_CMD	board/armadeus/apf27/apf27.h	/^#define ACFG_AUTOREFRESH_CMD	/;"	d
ACFG_CCSR_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CCSR_VAL /;"	d
ACFG_CLK_FREQ	board/armadeus/apf27/apf27.h	/^#define ACFG_CLK_FREQ	/;"	d
ACFG_CONSOLE_DEV	include/configs/apf27.h	/^#define ACFG_CONSOLE_DEV	/;"	d
ACFG_CS0A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS0A_VAL	/;"	d
ACFG_CS0L_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS0L_VAL	/;"	d
ACFG_CS0U_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS0U_VAL	/;"	d
ACFG_CS1A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS1A_VAL	/;"	d
ACFG_CS1L_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS1L_VAL	/;"	d
ACFG_CS1U_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS1U_VAL	/;"	d
ACFG_CS2A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS2A_VAL	/;"	d
ACFG_CS2L_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS2L_VAL	/;"	d
ACFG_CS2U_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS2U_VAL	/;"	d
ACFG_CS3A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS3A_VAL	/;"	d
ACFG_CS3L_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS3L_VAL	/;"	d
ACFG_CS3U_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS3U_VAL	/;"	d
ACFG_CS4A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS4A_VAL	/;"	d
ACFG_CS4L_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS4L_VAL	/;"	d
ACFG_CS4U_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS4U_VAL	/;"	d
ACFG_CS5A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS5A_VAL	/;"	d
ACFG_CS5L_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS5L_VAL	/;"	d
ACFG_CS5U_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CS5U_VAL	/;"	d
ACFG_CSCR_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_CSCR_VAL	/;"	d
ACFG_DDIR_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DDIR_A_VAL	/;"	d
ACFG_DDIR_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DDIR_B_VAL	/;"	d
ACFG_DDIR_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DDIR_C_VAL	/;"	d
ACFG_DDIR_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DDIR_D_VAL	/;"	d
ACFG_DDIR_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DDIR_E_VAL	/;"	d
ACFG_DDIR_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DDIR_F_VAL	/;"	d
ACFG_DR_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DR_A_VAL	/;"	d
ACFG_DR_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DR_B_VAL	/;"	d
ACFG_DR_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DR_C_VAL	/;"	d
ACFG_DR_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DR_D_VAL	/;"	d
ACFG_DR_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DR_E_VAL	/;"	d
ACFG_DR_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DR_F_VAL	/;"	d
ACFG_DSCR10_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DSCR10_VAL /;"	d
ACFG_DSCR2_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DSCR2_VAL /;"	d
ACFG_DSCR3_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DSCR3_VAL /;"	d
ACFG_DSCR7_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_DSCR7_VAL /;"	d
ACFG_EIM_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_EIM_VAL	/;"	d
ACFG_ESDMISC_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ESDMISC_VAL	/;"	d
ACFG_FMCR_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_FMCR_VAL /;"	d
ACFG_FPGA_CLK	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_CLK	/;"	d
ACFG_FPGA_CS	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_CS	/;"	d
ACFG_FPGA_DONE	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_DONE	/;"	d
ACFG_FPGA_INIT	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_INIT	/;"	d
ACFG_FPGA_PRG	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_PRG	/;"	d
ACFG_FPGA_PWR	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_PWR	/;"	d
ACFG_FPGA_RDATA	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_RDATA	/;"	d
ACFG_FPGA_RESET	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_RESET	/;"	d
ACFG_FPGA_RW	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_RW	/;"	d
ACFG_FPGA_SUSPEND	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_SUSPEND /;"	d
ACFG_FPGA_WDATA	board/armadeus/apf27/apf27.h	/^#define ACFG_FPGA_WDATA	/;"	d
ACFG_GIUS_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GIUS_A_VAL	/;"	d
ACFG_GIUS_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GIUS_B_VAL	/;"	d
ACFG_GIUS_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GIUS_C_VAL	/;"	d
ACFG_GIUS_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GIUS_D_VAL	/;"	d
ACFG_GIUS_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GIUS_E_VAL	/;"	d
ACFG_GIUS_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GIUS_F_VAL	/;"	d
ACFG_GPCR_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPCR_VAL	/;"	d
ACFG_GPR_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPR_A_VAL	/;"	d
ACFG_GPR_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPR_B_VAL	/;"	d
ACFG_GPR_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPR_C_VAL	/;"	d
ACFG_GPR_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPR_D_VAL	/;"	d
ACFG_GPR_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPR_E_VAL	/;"	d
ACFG_GPR_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_GPR_F_VAL	/;"	d
ACFG_ICFA1_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA1_A_VAL	/;"	d
ACFG_ICFA1_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA1_B_VAL	/;"	d
ACFG_ICFA1_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA1_C_VAL	/;"	d
ACFG_ICFA1_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA1_D_VAL	/;"	d
ACFG_ICFA1_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA1_E_VAL	/;"	d
ACFG_ICFA1_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA1_F_VAL	/;"	d
ACFG_ICFA2_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA2_A_VAL	/;"	d
ACFG_ICFA2_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA2_B_VAL	/;"	d
ACFG_ICFA2_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA2_C_VAL	/;"	d
ACFG_ICFA2_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA2_D_VAL	/;"	d
ACFG_ICFA2_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA2_E_VAL	/;"	d
ACFG_ICFA2_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFA2_F_VAL	/;"	d
ACFG_ICFB1_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB1_A_VAL	/;"	d
ACFG_ICFB1_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB1_B_VAL	/;"	d
ACFG_ICFB1_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB1_C_VAL	/;"	d
ACFG_ICFB1_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB1_D_VAL	/;"	d
ACFG_ICFB1_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB1_E_VAL	/;"	d
ACFG_ICFB1_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB1_F_VAL	/;"	d
ACFG_ICFB2_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB2_A_VAL	/;"	d
ACFG_ICFB2_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB2_B_VAL	/;"	d
ACFG_ICFB2_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB2_C_VAL	/;"	d
ACFG_ICFB2_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB2_D_VAL	/;"	d
ACFG_ICFB2_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB2_E_VAL	/;"	d
ACFG_ICFB2_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICFB2_F_VAL	/;"	d
ACFG_ICR1_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR1_A_VAL	/;"	d
ACFG_ICR1_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR1_B_VAL	/;"	d
ACFG_ICR1_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR1_C_VAL	/;"	d
ACFG_ICR1_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR1_D_VAL	/;"	d
ACFG_ICR1_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR1_E_VAL	/;"	d
ACFG_ICR1_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR1_F_VAL	/;"	d
ACFG_ICR2_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR2_A_VAL	/;"	d
ACFG_ICR2_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR2_B_VAL	/;"	d
ACFG_ICR2_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR2_C_VAL	/;"	d
ACFG_ICR2_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR2_D_VAL	/;"	d
ACFG_ICR2_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR2_E_VAL	/;"	d
ACFG_ICR2_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_ICR2_F_VAL	/;"	d
ACFG_IMR_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_IMR_A_VAL	/;"	d
ACFG_IMR_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_IMR_B_VAL	/;"	d
ACFG_IMR_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_IMR_C_VAL	/;"	d
ACFG_IMR_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_IMR_D_VAL	/;"	d
ACFG_IMR_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_IMR_E_VAL	/;"	d
ACFG_IMR_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_IMR_F_VAL	/;"	d
ACFG_MONITOR_OFFSET	include/configs/apf27.h	/^#define	ACFG_MONITOR_OFFSET	/;"	d
ACFG_MPCTL0_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_MPCTL0_VAL	/;"	d
ACFG_MPCTL1_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_MPCTL1_VAL	/;"	d
ACFG_NORMAL_RW_CMD	board/armadeus/apf27/apf27.h	/^#define ACFG_NORMAL_RW_CMD	/;"	d
ACFG_OCR1_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR1_A_VAL	/;"	d
ACFG_OCR1_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR1_B_VAL	/;"	d
ACFG_OCR1_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR1_C_VAL	/;"	d
ACFG_OCR1_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR1_D_VAL	/;"	d
ACFG_OCR1_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR1_E_VAL	/;"	d
ACFG_OCR1_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR1_F_VAL	/;"	d
ACFG_OCR2_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR2_A_VAL	/;"	d
ACFG_OCR2_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR2_B_VAL	/;"	d
ACFG_OCR2_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR2_C_VAL	/;"	d
ACFG_OCR2_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR2_D_VAL	/;"	d
ACFG_OCR2_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR2_E_VAL	/;"	d
ACFG_OCR2_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_OCR2_F_VAL	/;"	d
ACFG_PCCR0_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PCCR0_VAL	/;"	d
ACFG_PCCR1_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PCCR1_VAL	/;"	d
ACFG_PCDR0_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PCDR0_VAL\\/;"	d
ACFG_PCDR1_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PCDR1_VAL\\/;"	d
ACFG_PRECHARGE_CMD	board/armadeus/apf27/apf27.h	/^#define ACFG_PRECHARGE_CMD	/;"	d
ACFG_PUEN_A_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PUEN_A_VAL	/;"	d
ACFG_PUEN_B_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PUEN_B_VAL	/;"	d
ACFG_PUEN_C_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PUEN_C_VAL	/;"	d
ACFG_PUEN_D_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PUEN_D_VAL	/;"	d
ACFG_PUEN_E_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PUEN_E_VAL	/;"	d
ACFG_PUEN_F_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_PUEN_F_VAL	/;"	d
ACFG_SDRAM_BURST_LENGTH	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_BURST_LENGTH	/;"	d
ACFG_SDRAM_CLOCK_CYCLE_CL_1	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_CLOCK_CYCLE_CL_1	/;"	d
ACFG_SDRAM_DRIVE_STRENGH	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_DRIVE_STRENGH	/;"	d
ACFG_SDRAM_ESDCFG_REGISTER_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_ESDCFG_REGISTER_VAL /;"	d
ACFG_SDRAM_EXIT_PWD	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_EXIT_PWD	/;"	d
ACFG_SDRAM_EXT_MODE_REGISTER_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_EXT_MODE_REGISTER_VAL\\/;"	d
ACFG_SDRAM_MBYTE_SYZE	include/configs/apf27.h	/^#define ACFG_SDRAM_MBYTE_SYZE /;"	d
ACFG_SDRAM_MODE_REGISTER_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_MODE_REGISTER_VAL\\/;"	d
ACFG_SDRAM_NUM_COL	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_NUM_COL	/;"	d
ACFG_SDRAM_NUM_ROW	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_NUM_ROW	/;"	d
ACFG_SDRAM_PARTIAL_ARRAY_SR	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_PARTIAL_ARRAY_SR	/;"	d
ACFG_SDRAM_PRECHARGE_ALL_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_PRECHARGE_ALL_VAL /;"	d
ACFG_SDRAM_RAS_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_RAS_DELAY	/;"	d
ACFG_SDRAM_RCD_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_RCD_DELAY	/;"	d
ACFG_SDRAM_RC_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_RC_DELAY	/;"	d
ACFG_SDRAM_REFRESH	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_REFRESH	/;"	d
ACFG_SDRAM_ROW_PRECHARGE_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_ROW_PRECHARGE_DELAY	/;"	d
ACFG_SDRAM_RRD_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_RRD_DELAY	/;"	d
ACFG_SDRAM_SINGLE_ACCESS	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_SINGLE_ACCESS	/;"	d
ACFG_SDRAM_TMRD_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_TMRD_DELAY	/;"	d
ACFG_SDRAM_TWR_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_TWR_DELAY	/;"	d
ACFG_SDRAM_W2R_DELAY	board/armadeus/apf27/apf27.h	/^#define ACFG_SDRAM_W2R_DELAY	/;"	d
ACFG_SET_MODE_REG_CMD	board/armadeus/apf27/apf27.h	/^#define ACFG_SET_MODE_REG_CMD	/;"	d
ACFG_SPCTL0_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_SPCTL0_VAL	/;"	d
ACFG_SPCTL1_VAL	board/armadeus/apf27/apf27.h	/^#define ACFG_SPCTL1_VAL	/;"	d
ACK	common/xyzModem.c	/^#define ACK /;"	d	file:
ACK	tools/kwboot.c	/^#define ACK	/;"	d	file:
ACKLPB	include/mc13892.h	/^#define ACKLPB	/;"	d
ACK_TIME	board/micronas/vct/ebi.h	/^#define ACK_TIME	/;"	d
ACK_TYPE	cmd/load.c	/^#define ACK_TYPE /;"	d	file:
ACLKM_CORE_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define ACLKM_CORE_HZ	/;"	d
ACLKM_CORE_L_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLKM_CORE_L_DIV_CON_MASK	= 0x1f << ACLKM_CORE_L_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ACLKM_CORE_L_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLKM_CORE_L_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_100_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ACLK_100_RATIO	/;"	d
ACLK_100_RATIO	board/samsung/trats/setup.h	/^#define ACLK_100_RATIO	/;"	d
ACLK_133_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ACLK_133_RATIO	/;"	d
ACLK_133_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_133_RATIO	/;"	d
ACLK_133_RATIO	board/samsung/trats/setup.h	/^#define ACLK_133_RATIO	/;"	d
ACLK_160_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ACLK_160_RATIO	/;"	d
ACLK_160_RATIO	board/samsung/trats/setup.h	/^#define ACLK_160_RATIO	/;"	d
ACLK_166_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_166_RATIO	/;"	d
ACLK_200_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ACLK_200_RATIO	/;"	d
ACLK_200_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_200_RATIO	/;"	d
ACLK_200_RATIO	board/samsung/trats/setup.h	/^#define ACLK_200_RATIO	/;"	d
ACLK_266_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_266_RATIO	/;"	d
ACLK_300_DISP1_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_300_DISP1_RATIO	/;"	d
ACLK_300_GSCL_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_300_GSCL_RATIO /;"	d
ACLK_333_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_333_RATIO	/;"	d
ACLK_400_G3D_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_400_G3D_RATIO	/;"	d
ACLK_400_IOP_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_400_IOP_RATIO /;"	d
ACLK_400_ISP_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_400_ISP_RATIO /;"	d
ACLK_66_PRE_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_66_PRE_RATIO /;"	d
ACLK_66_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_66_RATIO	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_B	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADB400M_PD_CORE_L	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ADB400M_PD_CORE_L	/;"	d
ACLK_ADMA	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_ADMA	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_ADMA	/;"	d
ACLK_AHB2APB_MSCL0P	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL0P	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL0P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AHB2APB_MSCL1P	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AHB2APB_MSCL1P	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXI2ACEL_BRIDGE	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXI2ACEL_BRIDGE	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_AXIUS_USBDRD30X_FSYS0X	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_AXIUS_USBDRD30X_FSYS0X	/;"	d
ACLK_C2C_200_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_C2C_200_RATIO	/;"	d
ACLK_CCI	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI	/;"	d
ACLK_CCI_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_GRF	/;"	d
ACLK_CCI_NOC0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC0	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC0	/;"	d
ACLK_CCI_NOC1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCI_NOC1	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CCI_NOC1	/;"	d
ACLK_CCORE_133	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CCORE_133	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_CCORE_133	/;"	d
ACLK_CDREX_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_CDREX_RATIO	/;"	d
ACLK_CENTER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER	/;"	d
ACLK_CENTER_MAIN_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_MAIN_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_MAIN_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CENTER_PERI_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CENTER_PERI_NOC	/;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_B_2_CCI500	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_B_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CORE_ADB400_CORE_L_2_CCI500	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_CORE_ADB400_CORE_L_2_CCI500 /;"	d
ACLK_CPU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CPU	/;"	d
ACLK_CPU_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	ACLK_CPU_DIV_MASK	= 0x1f,$/;"	e	enum:__anon375ccd790103
ACLK_CPU_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	ACLK_CPU_DIV_SHIFT	= 8,$/;"	e	enum:__anon375ccd790103
ACLK_CRYPTO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_CRYPTO	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_CRYPTO	/;"	d
ACLK_DCF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DCF	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DCF	/;"	d
ACLK_DMAC0_PERILP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC0_PERILP	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC0_PERILP	/;"	d
ACLK_DMAC1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC1	/;"	d
ACLK_DMAC1_PERILP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC1_PERILP	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_DMAC1_PERILP	/;"	d
ACLK_DMAC2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_DMAC2	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_DMAC2	/;"	d
ACLK_EFCON_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_EFCON_RATIO /;"	d
ACLK_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC	/;"	d
ACLK_EMMC_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_CORE	/;"	d
ACLK_EMMC_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_EMMC_DIV_CON_MASK          = 0x1f,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_EMMC_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_EMMC_DIV_CON_SHIFT         = 0,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_EMMC_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_GRF	/;"	d
ACLK_EMMC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_EMMC_NOC	/;"	d
ACLK_EMMC_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_EMMC_PLL_SEL_GPLL          = 0x1,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_EMMC_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_EMMC_PLL_SEL_MASK          = 0x1 << ACLK_EMMC_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_EMMC_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_EMMC_PLL_SEL_SHIFT         = 7,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_G2D	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_G2D	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_G2D	/;"	d
ACLK_GIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_B_2_GIC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_B_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_CORE_L_2_GIC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_CORE_L_2_GIC	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_B	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_ADB400_GIC_2_CORE_L	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_ADB400_GIC_2_CORE_L	/;"	d
ACLK_GIC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_NOC	/;"	d
ACLK_GIC_PRE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GIC_PRE	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GIC_PRE	/;"	d
ACLK_GMAC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC	/;"	d
ACLK_GMAC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GMAC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GMAC_NOC	/;"	d
ACLK_GPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU	/;"	d
ACLK_GPU_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_GPU_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_GPU_GRF	/;"	d
ACLK_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP	/;"	d
ACLK_HDCP22	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP22	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP22	/;"	d
ACLK_HDCP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HDCP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_HDCP_NOC	/;"	d
ACLK_HEVC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_HEVC	/;"	d
ACLK_HEVC_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_DIV_MASK	= 0x1f,$/;"	e	enum:__anon3783c4e20603
ACLK_HEVC_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_DIV_SHIFT	= 8,$/;"	e	enum:__anon3783c4e20603
ACLK_HEVC_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_PLL_MASK	= 3,$/;"	e	enum:__anon3783c4e20603
ACLK_HEVC_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_PLL_SELECT_CODEC = 0,$/;"	e	enum:__anon3783c4e20603
ACLK_HEVC_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20603
ACLK_HEVC_PLL_SELECT_NEW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_PLL_SELECT_NEW,$/;"	e	enum:__anon3783c4e20603
ACLK_HEVC_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ACLK_HEVC_PLL_SHIFT	= 0xe,$/;"	e	enum:__anon3783c4e20603
ACLK_IEP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP	/;"	d
ACLK_IEP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_IEP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_IEP_NOC	/;"	d
ACLK_INTMEM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_INTMEM	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_INTMEM	/;"	d
ACLK_ISP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_ISP	/;"	d
ACLK_ISP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0	/;"	d
ACLK_ISP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_NOC	/;"	d
ACLK_ISP0_WRAPPER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP0_WRAPPER	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP0_WRAPPER	/;"	d
ACLK_ISP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1	/;"	d
ACLK_ISP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_NOC	/;"	d
ACLK_ISP1_WRAPPER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_ISP1_WRAPPER	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_ISP1_WRAPPER	/;"	d
ACLK_JPEG	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_JPEG	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_JPEG	/;"	d
ACLK_LCDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LCDC	include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_LCDC	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_0	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_LH_ASYNC_SI_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_LH_ASYNC_SI_MSCL_1	/;"	d
ACLK_MIPI_HSI_TX_BASE_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define ACLK_MIPI_HSI_TX_BASE_RATIO /;"	d
ACLK_MMC0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC0	/;"	d
ACLK_MMC1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC1	/;"	d
ACLK_MMC2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMC2	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MMC2	/;"	d
ACLK_MMU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MMU	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_MMU	/;"	d
ACLK_MSCLNP_133	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCLNP_133	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCLNP_133	/;"	d
ACLK_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_0	/;"	d
ACLK_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_1	/;"	d
ACLK_MSCL_532	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_MSCL_532	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_MSCL_532	/;"	d
ACLK_PCIE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PCIE	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PCIE	/;"	d
ACLK_PDMA0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA0	/;"	d
ACLK_PDMA1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PDMA1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PDMA1	/;"	d
ACLK_PERF_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_B	/;"	d
ACLK_PERF_CORE_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_CORE_L	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_CORE_L	/;"	d
ACLK_PERF_GMAC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GMAC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GMAC	/;"	d
ACLK_PERF_GPU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_GPU	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_GPU	/;"	d
ACLK_PERF_PCIE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERF_PCIE	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERF_PCIE	/;"	d
ACLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERI	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERI	/;"	d
ACLK_PERIHP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP	/;"	d
ACLK_PERIHP_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERIHP_DIV_CON_MASK	= 0x1f,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERIHP_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERIHP_DIV_CON_SHIFT	= 0,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERIHP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERIHP_NOC	/;"	d
ACLK_PERIHP_PLL_SEL_CPLL	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERIHP_PLL_SEL_CPLL	= 0,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERIHP_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERIHP_PLL_SEL_GPLL	= 1,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERIHP_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERIHP_PLL_SEL_MASK	= 1 << ACLK_PERIHP_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERIHP_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERIHP_PLL_SEL_SHIFT	= 7,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERILP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0	/;"	d
ACLK_PERILP0_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERILP0_DIV_CON_MASK	= 0x1f,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERILP0_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERILP0_DIV_CON_SHIFT	= 0,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERILP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_PERILP0_NOC	/;"	d
ACLK_PERILP0_PLL_SEL_CPLL	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERILP0_PLL_SEL_CPLL	= 0,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERILP0_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERILP0_PLL_SEL_GPLL	= 1,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERILP0_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERILP0_PLL_SEL_MASK	= 1 << ACLK_PERILP0_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERILP0_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_PERILP0_PLL_SEL_SHIFT	= 7,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_PERIS_66	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PERIS_66	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PERIS_66	/;"	d
ACLK_PPMU_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_0	/;"	d
ACLK_PPMU_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_PPMU_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_PPMU_MSCL_1	/;"	d
ACLK_QE_G2D	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_G2D	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_G2D	/;"	d
ACLK_QE_JPEG	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_JPEG	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_JPEG	/;"	d
ACLK_QE_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_0	/;"	d
ACLK_QE_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_QE_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_QE_MSCL_1	/;"	d
ACLK_RGA	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA	/;"	d
ACLK_RGA_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_RGA_NIU	/;"	d
ACLK_RGA_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_RGA_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_RGA_NOC	/;"	d
ACLK_TZMA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_TZMA	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_TZMA	/;"	d
ACLK_UFS20_LINK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_UFS20_LINK	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_UFS20_LINK	/;"	d
ACLK_USB3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3	/;"	d
ACLK_USB3OTG0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG0	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG0	/;"	d
ACLK_USB3OTG1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3OTG1	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3OTG1	/;"	d
ACLK_USB3_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_GRF	/;"	d
ACLK_USB3_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_NOC	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USB3_RKSOC_AXI_PERF	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_USB3_RKSOC_AXI_PERF	/;"	d
ACLK_USBDRD300	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_USBDRD300	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_USBDRD300	/;"	d
ACLK_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC	/;"	d
ACLK_VCODEC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VCODEC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VCODEC_NOC	/;"	d
ACLK_VDU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU	/;"	d
ACLK_VDU_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VDU_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VDU_NOC	/;"	d
ACLK_VIO	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	include/dt-bindings/clock/rk3036-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO	/;"	d
ACLK_VIO0_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO0_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO0_NIU	/;"	d
ACLK_VIO1_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO1_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIO1_NIU	/;"	d
ACLK_VIO_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIO_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VIO_NOC	/;"	d
ACLK_VIP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VIP	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VIP	/;"	d
ACLK_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0	/;"	d
ACLK_VOP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_NOC	/;"	d
ACLK_VOP0_PRE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP0_PRE	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP0_PRE	/;"	d
ACLK_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	include/dt-bindings/clock/rk3288-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1	/;"	d
ACLK_VOP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_NOC	/;"	d
ACLK_VOP1_PRE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP1_PRE	include/dt-bindings/clock/rk3399-cru.h	/^#define ACLK_VOP1_PRE	/;"	d
ACLK_VOP_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_VOP_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_VOP_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_VOP_PLL_SEL_CPLL	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_VOP_PLL_SEL_CPLL		= 0x1,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_VOP_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_VOP_PLL_SEL_MASK		= 0x3 << ACLK_VOP_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_VOP_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ACLK_VOP_PLL_SEL_SHIFT		= 6,$/;"	e	enum:__anon06b9221d0103	file:
ACLK_XIU_MSCLX_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_0	/;"	d
ACLK_XIU_MSCLX_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLK_XIU_MSCLX_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define ACLK_XIU_MSCLX_1	/;"	d
ACLOCK_BOOTCPU	arch/avr32/include/asm/setup.h	/^#define ACLOCK_BOOTCPU	/;"	d
ACLOCK_HSB	arch/avr32/include/asm/setup.h	/^#define ACLOCK_HSB	/;"	d
ACLRM	drivers/usb/host/r8a66597.h	/^#define	ACLRM	/;"	d
ACM_CLEAR_COMM_FEATURE	include/usb_cdc_acm.h	/^#define ACM_CLEAR_COMM_FEATURE	/;"	d
ACM_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_CTL /;"	d
ACM_EMSK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_EMSK /;"	d
ACM_ER0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER0 /;"	d
ACM_ER1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER1 /;"	d
ACM_ER10	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER10 /;"	d
ACM_ER11	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER11 /;"	d
ACM_ER12	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER12 /;"	d
ACM_ER13	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER13 /;"	d
ACM_ER14	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER14 /;"	d
ACM_ER15	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER15 /;"	d
ACM_ER2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER2 /;"	d
ACM_ER3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER3 /;"	d
ACM_ER4	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER4 /;"	d
ACM_ER5	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER5 /;"	d
ACM_ER6	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER6 /;"	d
ACM_ER7	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER7 /;"	d
ACM_ER8	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER8 /;"	d
ACM_ER9	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ER9 /;"	d
ACM_ES	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ES /;"	d
ACM_ET0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET0 /;"	d
ACM_ET1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET1 /;"	d
ACM_ET10	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET10 /;"	d
ACM_ET11	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET11 /;"	d
ACM_ET12	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET12 /;"	d
ACM_ET13	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET13 /;"	d
ACM_ET14	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET14 /;"	d
ACM_ET15	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET15 /;"	d
ACM_ET2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET2 /;"	d
ACM_ET3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET3 /;"	d
ACM_ET4	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET4 /;"	d
ACM_ET5	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET5 /;"	d
ACM_ET6	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET6 /;"	d
ACM_ET7	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET7 /;"	d
ACM_ET8	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET8 /;"	d
ACM_ET9	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_ET9 /;"	d
ACM_GET_COMM_FEATRUE	include/usb_cdc_acm.h	/^#define ACM_GET_COMM_FEATRUE	/;"	d
ACM_GET_ENCAPSULATED_RESPONSE	include/usb_cdc_acm.h	/^#define ACM_GET_ENCAPSULATED_RESPONSE	/;"	d
ACM_GET_LINE_ENCODING	include/usb_cdc_acm.h	/^#define ACM_GET_LINE_ENCODING	/;"	d
ACM_IMSK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_IMSK /;"	d
ACM_MS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_MS /;"	d
ACM_NETWORK_CONNECTION	include/usb_cdc_acm.h	/^#define ACM_NETWORK_CONNECTION	/;"	d
ACM_RESPONSE_AVAILABLE	include/usb_cdc_acm.h	/^#define ACM_RESPONSE_AVAILABLE	/;"	d
ACM_RX_ENDPOINT	drivers/serial/usbtty.c	/^#define ACM_RX_ENDPOINT /;"	d	file:
ACM_SEND_BREAK	include/usb_cdc_acm.h	/^#define ACM_SEND_BREAK	/;"	d
ACM_SEND_ENCAPSULATED_COMMAND	include/usb_cdc_acm.h	/^#define ACM_SEND_ENCAPSULATED_COMMAND	/;"	d
ACM_SERIAL_STATE	include/usb_cdc_acm.h	/^#define ACM_SERIAL_STATE	/;"	d
ACM_SET_COMM_FEATURE	include/usb_cdc_acm.h	/^#define ACM_SET_COMM_FEATURE	/;"	d
ACM_SET_CONTROL_LINE_STATE	include/usb_cdc_acm.h	/^#define ACM_SET_CONTROL_LINE_STATE	/;"	d
ACM_SET_LINE_ENCODING	include/usb_cdc_acm.h	/^#define ACM_SET_LINE_ENCODING	/;"	d
ACM_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_STAT /;"	d
ACM_TC0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_TC0 /;"	d
ACM_TC1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_TC1 /;"	d
ACM_TMR0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_TMR0 /;"	d
ACM_TMR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define ACM_TMR1 /;"	d
ACM_TX_ENDPOINT	drivers/serial/usbtty.c	/^#define ACM_TX_ENDPOINT /;"	d	file:
ACPIDMAP_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPIDMAP_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define ACPIDMAP_RESET	/;"	d
ACPI_ACCESS_SIZE_BYTE_ACCESS	arch/x86/include/asm/acpi_table.h	/^	ACPI_ACCESS_SIZE_BYTE_ACCESS,$/;"	e	enum:acpi_address_space_size
ACPI_ACCESS_SIZE_DWORD_ACCESS	arch/x86/include/asm/acpi_table.h	/^	ACPI_ACCESS_SIZE_DWORD_ACCESS,$/;"	e	enum:acpi_address_space_size
ACPI_ACCESS_SIZE_QWORD_ACCESS	arch/x86/include/asm/acpi_table.h	/^	ACPI_ACCESS_SIZE_QWORD_ACCESS$/;"	e	enum:acpi_address_space_size
ACPI_ACCESS_SIZE_UNDEFINED	arch/x86/include/asm/acpi_table.h	/^	ACPI_ACCESS_SIZE_UNDEFINED = 0,$/;"	e	enum:acpi_address_space_size
ACPI_ACCESS_SIZE_WORD_ACCESS	arch/x86/include/asm/acpi_table.h	/^	ACPI_ACCESS_SIZE_WORD_ACCESS,$/;"	e	enum:acpi_address_space_size
ACPI_ADDRESS_SPACE_EC	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_EC,		\/* Embedded controller *\/$/;"	e	enum:acpi_address_space_type
ACPI_ADDRESS_SPACE_FIXED	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_FIXED = 0x7f	\/* Functional fixed hardware *\/$/;"	e	enum:acpi_address_space_type
ACPI_ADDRESS_SPACE_IO	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_IO,		\/* System I\/O *\/$/;"	e	enum:acpi_address_space_type
ACPI_ADDRESS_SPACE_MEMORY	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_MEMORY = 0,	\/* System memory *\/$/;"	e	enum:acpi_address_space_type
ACPI_ADDRESS_SPACE_PCC	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_PCC = 0x0a,	\/* Platform Comm. Channel *\/$/;"	e	enum:acpi_address_space_type
ACPI_ADDRESS_SPACE_PCI	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_PCI,		\/* PCI config space *\/$/;"	e	enum:acpi_address_space_type
ACPI_ADDRESS_SPACE_SMBUS	arch/x86/include/asm/acpi_table.h	/^	ACPI_ADDRESS_SPACE_SMBUS,	\/* SMBus *\/$/;"	e	enum:acpi_address_space_type
ACPI_APIC_IOAPIC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_IOAPIC,		\/* I\/O APIC *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_IOSAPIC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_IOSAPIC,		\/* I\/O SAPIC *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_IRQ_SRC_OVERRIDE	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_IRQ_SRC_OVERRIDE,	\/* Interrupt source override *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_LAPIC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_LAPIC	= 0,		\/* Processor local APIC *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_LAPIC_ADDR_OVERRIDE	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_LAPIC_ADDR_OVERRIDE,	\/* Local APIC address override *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_LAPIC_NMI	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_LAPIC_NMI,		\/* Local APIC NMI *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_LSAPIC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_LSAPIC,		\/* Local SAPIC *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_LX2APIC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_LX2APIC,		\/* Processor local x2APIC *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_LX2APIC_NMI	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_LX2APIC_NMI,		\/* Local x2APIC NMI *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_NMI_SRC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_NMI_SRC,		\/* NMI source *\/$/;"	e	enum:acpi_apic_types
ACPI_APIC_PLATFORM_IRQ_SRC	arch/x86/include/asm/acpi_table.h	/^	ACPI_APIC_PLATFORM_IRQ_SRC,	\/* Platform interrupt sources *\/$/;"	e	enum:acpi_apic_types
ACPI_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define ACPI_BASE_ADDRESS	/;"	d
ACPI_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define ACPI_BASE_ADDRESS	/;"	d
ACPI_BASE_LOCK	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  ACPI_BASE_LOCK	/;"	d
ACPI_BASE_LOCK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  ACPI_BASE_LOCK	/;"	d
ACPI_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define ACPI_BASE_SIZE	/;"	d
ACPI_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define ACPI_BASE_SIZE	/;"	d
ACPI_CNTL	arch/x86/include/asm/arch-broadwell/pch.h	/^#define ACPI_CNTL	/;"	d
ACPI_CNTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ACPI_CNTL	/;"	d
ACPI_CNTL	arch/x86/include/asm/lpc_common.h	/^#define ACPI_CNTL	/;"	d
ACPI_DEV_IRQ	arch/x86/include/asm/acpi/irq_helper.h	/^#define ACPI_DEV_IRQ(/;"	d
ACPI_EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  ACPI_EN	/;"	d
ACPI_FACS_64BIT_WAKE_F	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FACS_64BIT_WAKE_F	/;"	d
ACPI_FACS_S4BIOS_F	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FACS_S4BIOS_F	/;"	d
ACPI_FADT_32BIT_TIMER	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_32BIT_TIMER	/;"	d
ACPI_FADT_8042	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_8042	/;"	d
ACPI_FADT_APIC_CLUSTER	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_APIC_CLUSTER	/;"	d
ACPI_FADT_APIC_PHYSICAL	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_APIC_PHYSICAL	/;"	d
ACPI_FADT_C1_SUPPORTED	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_C1_SUPPORTED	/;"	d
ACPI_FADT_C2_MP_SUPPORTED	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_C2_MP_SUPPORTED	/;"	d
ACPI_FADT_C2_NOT_SUPPORTED	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_C2_NOT_SUPPORTED	/;"	d
ACPI_FADT_C3_NOT_SUPPORTED	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_C3_NOT_SUPPORTED	/;"	d
ACPI_FADT_DOCKING_SUPPORTED	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_DOCKING_SUPPORTED	/;"	d
ACPI_FADT_FIXED_RTC	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_FIXED_RTC	/;"	d
ACPI_FADT_HEADLESS	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_HEADLESS	/;"	d
ACPI_FADT_HW_REDUCED_ACPI	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_HW_REDUCED_ACPI	/;"	d
ACPI_FADT_LEGACY_DEVICES	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_LEGACY_DEVICES	/;"	d
ACPI_FADT_LEGACY_FREE	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_LEGACY_FREE	/;"	d
ACPI_FADT_LOW_PWR_IDLE_S0	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_LOW_PWR_IDLE_S0	/;"	d
ACPI_FADT_MSI_NOT_SUPPORTED	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_MSI_NOT_SUPPORTED	/;"	d
ACPI_FADT_NO_PCIE_ASPM_CONTROL	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_NO_PCIE_ASPM_CONTROL	/;"	d
ACPI_FADT_PCI_EXPRESS_WAKE	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_PCI_EXPRESS_WAKE	/;"	d
ACPI_FADT_PLATFORM_CLOCK	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_PLATFORM_CLOCK	/;"	d
ACPI_FADT_POWER_BUTTON	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_POWER_BUTTON	/;"	d
ACPI_FADT_REMOTE_POWER_ON	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_REMOTE_POWER_ON	/;"	d
ACPI_FADT_RESET_REGISTER	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_RESET_REGISTER	/;"	d
ACPI_FADT_S4_RTC_VALID	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_S4_RTC_VALID	/;"	d
ACPI_FADT_S4_RTC_WAKE	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_S4_RTC_WAKE	/;"	d
ACPI_FADT_SEALED_CASE	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_SEALED_CASE	/;"	d
ACPI_FADT_SLEEP_BUTTON	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_SLEEP_BUTTON	/;"	d
ACPI_FADT_SLEEP_TYPE	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_SLEEP_TYPE	/;"	d
ACPI_FADT_VGA_NOT_PRESENT	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_VGA_NOT_PRESENT	/;"	d
ACPI_FADT_WBINVD	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_WBINVD	/;"	d
ACPI_FADT_WBINVD_FLUSH	arch/x86/include/asm/acpi_table.h	/^#define ACPI_FADT_WBINVD_FLUSH	/;"	d
ACPI_GNVS_ADDR	arch/x86/include/asm/acpi/global_nvs.h	/^#define ACPI_GNVS_ADDR	/;"	d
ACPI_GNVS_SIZE	arch/x86/include/asm/acpi/global_nvs.h	/^#define ACPI_GNVS_SIZE	/;"	d
ACPI_GPE0_BASE	arch/x86/cpu/quark/Kconfig	/^config ACPI_GPE0_BASE$/;"	c
ACPI_GPE0_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define ACPI_GPE0_BASE_ADDRESS	/;"	d
ACPI_GPE0_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define ACPI_GPE0_BASE_SIZE	/;"	d
ACPI_MADT_PCAT_COMPAT	arch/x86/include/asm/acpi_table.h	/^#define ACPI_MADT_PCAT_COMPAT	/;"	d
ACPI_PBLK_BASE	arch/x86/cpu/quark/Kconfig	/^config ACPI_PBLK_BASE$/;"	c
ACPI_PBLK_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define ACPI_PBLK_BASE_ADDRESS	/;"	d
ACPI_PBLK_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define ACPI_PBLK_BASE_SIZE	/;"	d
ACPI_PM1_BASE	arch/x86/cpu/qemu/Kconfig	/^config ACPI_PM1_BASE$/;"	c
ACPI_PM1_BASE	arch/x86/cpu/quark/Kconfig	/^config ACPI_PM1_BASE$/;"	c
ACPI_PM1_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define ACPI_PM1_BASE_ADDRESS	/;"	d
ACPI_PM1_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define ACPI_PM1_BASE_SIZE	/;"	d
ACPI_PM_APPLIANCE_PC	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_APPLIANCE_PC,$/;"	e	enum:acpi_pm_profile
ACPI_PM_DESKTOP	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_DESKTOP,$/;"	e	enum:acpi_pm_profile
ACPI_PM_ENTERPRISE_SERVER	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_ENTERPRISE_SERVER,$/;"	e	enum:acpi_pm_profile
ACPI_PM_MOBILE	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_MOBILE,$/;"	e	enum:acpi_pm_profile
ACPI_PM_PERFORMANCE_SERVER	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_PERFORMANCE_SERVER,$/;"	e	enum:acpi_pm_profile
ACPI_PM_SOHO_SERVER	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_SOHO_SERVER,$/;"	e	enum:acpi_pm_profile
ACPI_PM_TABLET	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_TABLET$/;"	e	enum:acpi_pm_profile
ACPI_PM_UNSPECIFIED	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_UNSPECIFIED = 0,$/;"	e	enum:acpi_pm_profile
ACPI_PM_WORKSTATION	arch/x86/include/asm/acpi_table.h	/^	ACPI_PM_WORKSTATION,$/;"	e	enum:acpi_pm_profile
ACPI_RSDP_REV_ACPI_1_0	arch/x86/include/asm/acpi_table.h	/^#define ACPI_RSDP_REV_ACPI_1_0	/;"	d
ACPI_RSDP_REV_ACPI_2_0	arch/x86/include/asm/acpi_table.h	/^#define ACPI_RSDP_REV_ACPI_2_0	/;"	d
ACP_PCLK_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ACP_PCLK_RATIO	/;"	d
ACP_PCLK_RATIO	board/samsung/odroid/setup.h	/^#define ACP_PCLK_RATIO(/;"	d
ACP_PCLK_RATIO	board/samsung/trats/setup.h	/^#define ACP_PCLK_RATIO	/;"	d
ACP_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ACP_RATIO	/;"	d
ACP_RATIO	board/samsung/odroid/setup.h	/^#define ACP_RATIO(/;"	d
ACP_RATIO	board/samsung/trats/setup.h	/^#define ACP_RATIO	/;"	d
ACR_APARK	include/mpc83xx.h	/^#define ACR_APARK	/;"	d
ACR_APARK_SHIFT	include/mpc83xx.h	/^#define ACR_APARK_SHIFT	/;"	d
ACR_COREDIS	include/mpc83xx.h	/^#define ACR_COREDIS	/;"	d
ACR_COREDIS_SHIFT	include/mpc83xx.h	/^#define ACR_COREDIS_SHIFT	/;"	d
ACR_PARKM	include/mpc83xx.h	/^#define ACR_PARKM	/;"	d
ACR_PARKM_SHIFT	include/mpc83xx.h	/^#define ACR_PARKM_SHIFT	/;"	d
ACR_PCI_RPTCNT	include/mpc83xx.h	/^#define ACR_PCI_RPTCNT	/;"	d
ACR_PCI_RPTCNT_SHIFT	include/mpc83xx.h	/^#define ACR_PCI_RPTCNT_SHIFT	/;"	d
ACR_PIPE_DEP	include/mpc83xx.h	/^#define ACR_PIPE_DEP	/;"	d
ACR_PIPE_DEP_SHIFT	include/mpc83xx.h	/^#define ACR_PIPE_DEP_SHIFT	/;"	d
ACR_RPTCNT	include/mpc83xx.h	/^#define ACR_RPTCNT	/;"	d
ACR_RPTCNT_SHIFT	include/mpc83xx.h	/^#define ACR_RPTCNT_SHIFT	/;"	d
ACSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ACSR	/;"	d
ACS_DARROW	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_DARROW /;"	d
ACS_HLINE	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_HLINE /;"	d
ACS_LLCORNER	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_LLCORNER /;"	d
ACS_LRCORNER	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_LRCORNER /;"	d
ACS_LTEE	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_LTEE /;"	d
ACS_RTEE	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_RTEE /;"	d
ACS_UARROW	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_UARROW /;"	d
ACS_ULCORNER	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_ULCORNER /;"	d
ACS_URCORNER	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_URCORNER /;"	d
ACS_VLINE	scripts/kconfig/lxdialog/dialog.h	/^#define ACS_VLINE /;"	d
ACT8846_NUM_OF_REGS	include/power/act8846_pmic.h	/^#define ACT8846_NUM_OF_REGS	/;"	d
ACTDISSAFEO1	include/power/max8997_pmic.h	/^#define ACTDISSAFEO1 /;"	d
ACTDISSAFEO2	include/power/max8997_pmic.h	/^#define ACTDISSAFEO2 /;"	d
ACTEL_COREMP7	include/ambapp_ids.h	/^#define ACTEL_COREMP7 /;"	d
ACTEL_devices	cmd/ambapp.c	/^static ambapp_device_name ACTEL_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
ACTIM_CTRLA	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA(/;"	d
ACTIM_CTRLA_TDAL	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TDAL(/;"	d
ACTIM_CTRLA_TDPL	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TDPL(/;"	d
ACTIM_CTRLA_TRAS	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TRAS(/;"	d
ACTIM_CTRLA_TRC	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TRC(/;"	d
ACTIM_CTRLA_TRCD	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TRCD(/;"	d
ACTIM_CTRLA_TRFC	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TRFC(/;"	d
ACTIM_CTRLA_TRP	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TRP(/;"	d
ACTIM_CTRLA_TRRD	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLA_TRRD(/;"	d
ACTIM_CTRLB	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLB(/;"	d
ACTIM_CTRLB_TCKE	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLB_TCKE(/;"	d
ACTIM_CTRLB_TWTR	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLB_TWTR(/;"	d
ACTIM_CTRLB_TXP	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLB_TXP(/;"	d
ACTIM_CTRLB_TXSR	arch/arm/include/asm/arch-omap3/mem.h	/^#define ACTIM_CTRLB_TXSR(/;"	d
ACTION	include/search.h	/^} ACTION;$/;"	t	typeref:enum:__anon2b83eac40103
ACTION_MOVE	tools/moveconfig.py	/^ACTION_MOVE = 0$/;"	v
ACTION_NO_CHANGE	tools/moveconfig.py	/^ACTION_NO_CHANGE = 3$/;"	v
ACTION_NO_ENTRY	tools/moveconfig.py	/^ACTION_NO_ENTRY = 1$/;"	v
ACTION_NO_ENTRY_WARN	tools/moveconfig.py	/^ACTION_NO_ENTRY_WARN = 2$/;"	v
ACTIVATE	include/ns87308.h	/^#define ACTIVATE /;"	d
ACTIVATE_OFF	include/ns87308.h	/^#define ACTIVATE_OFF /;"	d
ACTIVATE_ON	include/ns87308.h	/^#define ACTIVATE_ON /;"	d
ACTIVE_DISCHARGE	include/power/max8997_pmic.h	/^#define ACTIVE_DISCHARGE /;"	d
ACTIVE_DISPLAY	arch/arm/include/asm/arch-omap3/dss.h	/^#define ACTIVE_DISPLAY	/;"	d
ACTIVE_FLAG	common/env_sf.c	/^#define ACTIVE_FLAG	/;"	d	file:
ACTIVE_FLAG	include/environment.h	/^# define ACTIVE_FLAG /;"	d
ACTIVE_INTERFACE_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define ACTIVE_INTERFACE_MASK	/;"	d
ACTIVE_LINE_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define ACTIVE_LINE_CFG_H(/;"	d
ACTIVE_LINE_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define ACTIVE_LINE_CFG_L(/;"	d
ACTIVE_LP	arch/arm/include/asm/arch-tegra124/flow.h	/^#define ACTIVE_LP	/;"	d
ACTIVE_LP	arch/arm/include/asm/arch-tegra210/flow.h	/^#define ACTIVE_LP	/;"	d
ACTIVE_PIXEL_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define ACTIVE_PIXEL_CFG_H(/;"	d
ACTIVE_PIXEL_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define ACTIVE_PIXEL_CFG_L(/;"	d
ACTIVE_PLLDISABLED	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define ACTIVE_PLLDISABLED	/;"	d
ACTIVE_PLLENABLED	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define ACTIVE_PLLENABLED	/;"	d
ACTIVE_SRC_ID	drivers/mtd/nand/denali.h	/^#define ACTIVE_SRC_ID	/;"	d
ACTIVE_SRC_ID__VALUE	drivers/mtd/nand/denali.h	/^#define     ACTIVE_SRC_ID__VALUE	/;"	d
ACTIVE_VIDEO_MEM_OFFSET	board/bf527-ezkit/video.c	/^#define ACTIVE_VIDEO_MEM_OFFSET	/;"	d	file:
ACTIVE_VIDEO_MEM_OFFSET	board/bf548-ezkit/video.c	/^#define ACTIVE_VIDEO_MEM_OFFSET /;"	d	file:
ACTIVE_VIDEO_MEM_OFFSET	board/cm-bf548/video.c	/^#define ACTIVE_VIDEO_MEM_OFFSET /;"	d	file:
ACTS	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ACTS	/;"	d
ACTS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ACTS	/;"	d
ACTS_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ACTS_P	/;"	d
AC_ERR_ATA_BUS	drivers/block/sata_dwc.h	/^	AC_ERR_ATA_BUS		= (1 << 4),$/;"	e	enum:ata_completion_errors
AC_ERR_DEV	drivers/block/sata_dwc.h	/^	AC_ERR_DEV		= (1 << 0),$/;"	e	enum:ata_completion_errors
AC_ERR_HOST_BUS	drivers/block/sata_dwc.h	/^	AC_ERR_HOST_BUS		= (1 << 5),$/;"	e	enum:ata_completion_errors
AC_ERR_HSM	drivers/block/sata_dwc.h	/^	AC_ERR_HSM		= (1 << 1),$/;"	e	enum:ata_completion_errors
AC_ERR_INVALID	drivers/block/sata_dwc.h	/^	AC_ERR_INVALID		= (1 << 7),$/;"	e	enum:ata_completion_errors
AC_ERR_MEDIA	drivers/block/sata_dwc.h	/^	AC_ERR_MEDIA		= (1 << 3),$/;"	e	enum:ata_completion_errors
AC_ERR_NCQ	drivers/block/sata_dwc.h	/^	AC_ERR_NCQ		= (1 << 10),$/;"	e	enum:ata_completion_errors
AC_ERR_NODEV_HINT	drivers/block/sata_dwc.h	/^	AC_ERR_NODEV_HINT	= (1 << 9),$/;"	e	enum:ata_completion_errors
AC_ERR_OTHER	drivers/block/sata_dwc.h	/^	AC_ERR_OTHER		= (1 << 8),$/;"	e	enum:ata_completion_errors
AC_ERR_SYSTEM	drivers/block/sata_dwc.h	/^	AC_ERR_SYSTEM		= (1 << 6),$/;"	e	enum:ata_completion_errors
AC_ERR_TIMEOUT	drivers/block/sata_dwc.h	/^	AC_ERR_TIMEOUT		= (1 << 2),$/;"	e	enum:ata_completion_errors
AC_FIFO	board/synopsys/axs10x/nand.c	/^	AC_FIFO = 0,		\/* address and command fifo *\/$/;"	e	enum:nand_regs_t	file:
AC_R	arch/powerpc/include/asm/mmu.h	/^#define AC_R	/;"	d
AC_RW	arch/powerpc/include/asm/mmu.h	/^#define AC_RW	/;"	d
AC_RWX	arch/powerpc/include/asm/mmu.h	/^#define AC_RWX	/;"	d
AC_W	arch/powerpc/include/asm/mmu.h	/^#define AC_W	/;"	d
AC_X	arch/powerpc/include/asm/mmu.h	/^#define AC_X	/;"	d
AD1D0ER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD1D0ER	/;"	d
AD1D0SR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD1D0SR	/;"	d
AD1R	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD1R	/;"	d
AD2D0ER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD2D0ER	/;"	d
AD2D0SR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD2D0SR	/;"	d
AD2D1ER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD2D1ER	/;"	d
AD2D1SR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD2D1SR	/;"	d
AD2R	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD2R	/;"	d
AD3ER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD3ER	/;"	d
AD3R	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD3R	/;"	d
AD3SR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AD3SR	/;"	d
ADAPTER_ID	include/radeon.h	/^#define ADAPTER_ID	/;"	d
ADAPTER_ID_W	include/radeon.h	/^#define ADAPTER_ID_W	/;"	d
ADC	drivers/adc/Kconfig	/^config ADC$/;"	c
ADC0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define ADC0_BASE_ADDR	/;"	d
ADC1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ADC1_BASE_ADDR /;"	d
ADC1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ADC1_IPS_BASE_ADDR /;"	d
ADC2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ADC2_BASE_ADDR /;"	d
ADC2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ADC2_IPS_BASE_ADDR /;"	d
ADC_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define ADC_BASE_ADDR /;"	d
ADC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ADC_BASE_ADDR	/;"	d
ADC_CHANNEL	include/adc.h	/^#define ADC_CHANNEL(/;"	d
ADC_DATA_FORMAT_2S	include/adc.h	/^	ADC_DATA_FORMAT_2S,$/;"	e	enum:adc_data_format
ADC_DATA_FORMAT_BIN	include/adc.h	/^	ADC_DATA_FORMAT_BIN,$/;"	e	enum:adc_data_format
ADC_EN	drivers/usb/eth/r8152.h	/^#define ADC_EN	/;"	d
ADC_EXYNOS	drivers/adc/Kconfig	/^config ADC_EXYNOS$/;"	c
ADC_MAX_CHANNEL	include/adc.h	/^#define ADC_MAX_CHANNEL	/;"	d
ADC_MIN_ACCURACY	board/freescale/common/vid.c	/^#define ADC_MIN_ACCURACY	/;"	d	file:
ADC_SANDBOX	drivers/adc/Kconfig	/^config ADC_SANDBOX$/;"	c
ADC_UCLASS_PLATDATA_SIZE	drivers/adc/adc-uclass.c	/^#define ADC_UCLASS_PLATDATA_SIZE	/;"	d	file:
ADC_V2_CON1_SOFT_RESET	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON1_SOFT_RESET	/;"	d
ADC_V2_CON1_STC_EN	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON1_STC_EN	/;"	d
ADC_V2_CON2_CHAN_SEL	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON2_CHAN_SEL(/;"	d
ADC_V2_CON2_CHAN_SEL_MASK	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON2_CHAN_SEL_MASK	/;"	d
ADC_V2_CON2_C_TIME	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON2_C_TIME(/;"	d
ADC_V2_CON2_ESEL	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON2_ESEL(/;"	d
ADC_V2_CON2_HIGHF	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON2_HIGHF(/;"	d
ADC_V2_CON2_OSEL	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CON2_OSEL(/;"	d
ADC_V2_CONV_TIMEOUT_US	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_CONV_TIMEOUT_US	/;"	d
ADC_V2_DAT_MASK	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_DAT_MASK	/;"	d
ADC_V2_GET_STATUS_FLAG	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_GET_STATUS_FLAG(/;"	d
ADC_V2_INT_DISABLE	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_INT_DISABLE	/;"	d
ADC_V2_INT_ENABLE	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_INT_ENABLE	/;"	d
ADC_V2_MAX_CHANNEL	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_MAX_CHANNEL	/;"	d
ADC_V2_VERSION	arch/arm/mach-exynos/include/mach/adc.h	/^#define ADC_V2_VERSION	/;"	d
ADDCH	lib/vsprintf.c	/^#define ADDCH(/;"	d	file:
ADDENTRY	arch/powerpc/cpu/mpc8xx/video.c	/^#define ADDENTRY(/;"	d	file:
ADDER	include/sym53c8xx.h	/^#define ADDER	/;"	d
ADDR	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ADDR	/;"	d
ADDR	arch/x86/include/asm/bitops.h	/^#define ADDR /;"	d
ADDR0_REG	drivers/net/smc91111.h	/^#define	ADDR0_REG	/;"	d
ADDR1_REG	drivers/net/smc91111.h	/^#define	ADDR1_REG	/;"	d
ADDR24BIT	drivers/spi/fsl_qspi.h	/^#define ADDR24BIT	/;"	d
ADDR2_REG	drivers/net/smc91111.h	/^#define	ADDR2_REG	/;"	d
ADDR32BIT	drivers/spi/fsl_qspi.h	/^#define ADDR32BIT	/;"	d
ADDRESS_2_DATA	drivers/mtd/nand/denali.h	/^#define ADDRESS_2_DATA /;"	d
ADDRESS_FILTERING_END_REGISTER	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define ADDRESS_FILTERING_END_REGISTER /;"	d
ADDRESS_INCREMENT_OFF	board/micronas/vct/ebi.h	/^#define ADDRESS_INCREMENT_OFF	/;"	d
ADDRESS_INCREMENT_ON	board/micronas/vct/ebi.h	/^#define ADDRESS_INCREMENT_ON	/;"	d
ADDRESS_RANGE_ADD	arch/x86/include/asm/mpspec.h	/^#define ADDRESS_RANGE_ADD	/;"	d
ADDRESS_RANGE_SUBTRACT	arch/x86/include/asm/mpspec.h	/^#define ADDRESS_RANGE_SUBTRACT	/;"	d
ADDRESS_TYPE_IO	arch/x86/include/asm/mpspec.h	/^#define ADDRESS_TYPE_IO	/;"	d
ADDRESS_TYPE_MEM	arch/x86/include/asm/mpspec.h	/^#define ADDRESS_TYPE_MEM	/;"	d
ADDRESS_TYPE_PREFETCH	arch/x86/include/asm/mpspec.h	/^#define ADDRESS_TYPE_PREFETCH	/;"	d
ADDRH	drivers/net/smc911x.h	/^#define ADDRH	/;"	d
ADDRH	drivers/usb/eth/smsc95xx.c	/^#define ADDRH	/;"	d	file:
ADDRL	drivers/net/smc911x.h	/^#define ADDRL	/;"	d
ADDRL	drivers/usb/eth/smsc95xx.c	/^#define ADDRL	/;"	d	file:
ADDRMASK	board/esd/common/cmd_loadpci.c	/^#define ADDRMASK /;"	d	file:
ADDRMUXLEGACY	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ADDRMUXLEGACY	/;"	d
ADDR_2_DATA	drivers/mtd/nand/denali.h	/^#define ADDR_2_DATA	/;"	d
ADDR_2_DATA__VALUE	drivers/mtd/nand/denali.h	/^#define     ADDR_2_DATA__VALUE	/;"	d
ADDR_ACTIVATION	board/micronas/vct/ebi.h	/^#define ADDR_ACTIVATION	/;"	d
ADDR_COLUMN	include/linux/mtd/doc2000.h	/^#define ADDR_COLUMN /;"	d
ADDR_COLUMN_PAGE	include/linux/mtd/doc2000.h	/^#define ADDR_COLUMN_PAGE /;"	d
ADDR_CYCLE	drivers/mtd/nand/denali.c	/^#define ADDR_CYCLE	/;"	d	file:
ADDR_DEACTIVATION	board/micronas/vct/ebi.h	/^#define ADDR_DEACTIVATION	/;"	d
ADDR_INVALID	tools/kwbimage.c	/^#define ADDR_INVALID /;"	d	file:
ADDR_LATCH_ENABLE	board/micronas/vct/ebi.h	/^#define ADDR_LATCH_ENABLE	/;"	d
ADDR_ONLY	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define ADDR_ONLY	/;"	d
ADDR_ONLY	arch/arm/mach-exynos/include/mach/dp.h	/^#define ADDR_ONLY	/;"	d
ADDR_PAGE	include/linux/mtd/doc2000.h	/^#define ADDR_PAGE /;"	d
ADDR_PINS	board/freescale/mx28evk/iomux.c	/^#define ADDR_PINS	/;"	d	file:
ADDR_REG1_0	drivers/mtd/nand/tegra_nand.h	/^#define ADDR_REG1_0	/;"	d
ADDR_REG2_0	drivers/mtd/nand/tegra_nand.h	/^#define ADDR_REG2_0	/;"	d
ADDR_SIZE_1GB	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADDR_SIZE_1GB	/;"	d
ADDR_SIZE_2GB	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADDR_SIZE_2GB	/;"	d
ADDR_SIZE_4GB	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADDR_SIZE_4GB	/;"	d
ADDR_SIZE_512MB	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADDR_SIZE_512MB	/;"	d
ADDR_SIZE_8GB	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADDR_SIZE_8GB	/;"	d
ADDR_TABLE_INDEX128M	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX128M	/;"	d
ADDR_TABLE_INDEX1GS2	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX1GS2	/;"	d
ADDR_TABLE_INDEX1GS4	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX1GS4	/;"	d
ADDR_TABLE_INDEX256M	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX256M	/;"	d
ADDR_TABLE_INDEX2GS2	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX2GS2	/;"	d
ADDR_TABLE_INDEX2GS4	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX2GS4	/;"	d
ADDR_TABLE_INDEX4G	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX4G	/;"	d
ADDR_TABLE_INDEX512M	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX512M	/;"	d
ADDR_TABLE_INDEX64M	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX64M	/;"	d
ADDR_TABLE_INDEX8G	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEX8G	/;"	d
ADDR_TABLE_INDEXMAX	arch/arm/include/asm/emif.h	/^#define ADDR_TABLE_INDEXMAX	/;"	d
ADDR_TO_MAPBASE	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define ADDR_TO_MAPBASE(/;"	d
ADDR_TO_P2	drivers/net/sh_eth.h	/^#define ADDR_TO_P2(/;"	d
ADDR_TO_PHY	drivers/net/sh_eth.h	/^#define ADDR_TO_PHY(/;"	d
ADDWEIGHTS	lib/bzip2/bzlib_huffman.c	/^#define ADDWEIGHTS(/;"	d	file:
ADD_CHAR_TO_BLOCK	lib/bzip2/bzlib.c	/^#define ADD_CHAR_TO_BLOCK(/;"	d	file:
ADD_LAT_PALL	arch/arm/mach-exynos/exynos4_setup.h	/^#define ADD_LAT_PALL	/;"	d
ADH	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ADH(/;"	d
ADICHS0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICHS0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,$/;"	e	enum:__anona3077f190103	file:
ADICHS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,$/;"	e	enum:__anona307879b0103	file:
ADICHS0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICHS0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN0_TX_B_MARK, AVB_TXD2_MARK, ADICHS0_MARK, AD_NCS_N_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICHS0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	ADICHS0_MARK,$/;"	e	enum:__anona307945e0103	file:
ADICHS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICHS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,$/;"	e	enum:__anona3077f190103	file:
ADICHS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona307879b0103	file:
ADICHS1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICHS1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD3_MARK, ADICHS1_MARK, ETH_LINK_MARK, VI0_G5_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICHS1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	ADICHS1_MARK,$/;"	e	enum:__anona307945e0103	file:
ADICHS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADICHS2_B_MARK, MSIOF0_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICHS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,$/;"	e	enum:__anona3077f190103	file:
ADICHS2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona307879b0103	file:
ADICHS2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICHS2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SS2_B_MARK, SCIF4_TXD_D_MARK, AVB_TXD4_MARK, ADICHS2_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICHS2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	ADICHS2_MARK,$/;"	e	enum:__anona307945e0103	file:
ADICLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADICLK_B_MARK, MSIOF0_SS1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PWM0_B_MARK, ADICLK_B_MARK, AD_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,$/;"	e	enum:__anona3077f190103	file:
ADICLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK,$/;"	e	enum:__anona307879b0103	file:
ADICLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SCK_B_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, ADICLK_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	ADICLK_MARK,$/;"	e	enum:__anona307945e0103	file:
ADICS_SAMP_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ADICS_SAMP_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICS_SAMP_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ADICS_SAMP_B_MARK, AD_DO_B_MARK, SSI_SDATA0_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICS_SAMP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
ADICS_SAMP_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,$/;"	e	enum:__anona307879b0103	file:
ADICS_SAMP_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADICS_SAMP_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK,$/;"	e	enum:__anona307901d0103	file:
ADICS_SAMP_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	ADICS_SAMP_MARK,$/;"	e	enum:__anona307945e0103	file:
ADIDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ADIDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADIDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF1_RXD_B_MARK, SCIF5_RXD_D_MARK, ADIDATA_B_MARK, AD_DI_B_MARK,$/;"	e	enum:__anona307901d0103	file:
ADIDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,$/;"	e	enum:__anona3077f190103	file:
ADIDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,$/;"	e	enum:__anona307879b0103	file:
ADIDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ADIDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ADIDATA_MARK, AD_DI_MARK,$/;"	e	enum:__anona307901d0103	file:
ADIDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	ADIDATA_MARK,$/;"	e	enum:__anona307945e0103	file:
ADI_BOOT_BUFFER	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^typedef struct ADI_BOOT_BUFFER {$/;"	s
ADI_BOOT_BUFFER	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^} ADI_BOOT_BUFFER;$/;"	t	typeref:struct:ADI_BOOT_BUFFER
ADI_BOOT_DATA	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^typedef struct ADI_BOOT_DATA {$/;"	s
ADI_BOOT_DATA	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^} ADI_BOOT_DATA;$/;"	t	typeref:struct:ADI_BOOT_DATA
ADI_BOOT_HEADER	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^typedef struct ADI_BOOT_HEADER {$/;"	s
ADI_BOOT_HEADER	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^} ADI_BOOT_HEADER;$/;"	t	typeref:struct:ADI_BOOT_HEADER
ADI_BOOT_HOOK_FUNC	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^typedef void ADI_BOOT_HOOK_FUNC (ADI_BOOT_DATA *);$/;"	t	typeref:typename:void ()(ADI_BOOT_DATA *)
ADI_CMDS_NETWORK	include/configs/bct-brettl2.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf518f-ezbrd.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf526-ezbrd.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf527-ezkit.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf533-ezkit.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf533-stamp.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf537-pnav.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf537-stamp.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf538f-ezkit.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf548-ezkit.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf561-acvilon.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf561-ezkit.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/bf609-ezkit.h	/^#define ADI_CMDS_NETWORK$/;"	d
ADI_CMDS_NETWORK	include/configs/br4.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/cm-bf527.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/cm-bf533.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/cm-bf537e.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/cm-bf537u.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/cm-bf548.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/cm-bf561.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/ibf-dsp561.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/ip04.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/pr1.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/tcm-bf518.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_CMDS_NETWORK	include/configs/tcm-bf537.h	/^#define ADI_CMDS_NETWORK	/;"	d
ADI_DMA_CONFIG_REG	drivers/net/bfin_mac.h	/^typedef struct ADI_DMA_CONFIG_REG {$/;"	s
ADI_DMA_CONFIG_REG	drivers/net/bfin_mac.h	/^} ADI_DMA_CONFIG_REG;$/;"	t	typeref:struct:ADI_DMA_CONFIG_REG
ADI_ETHER_BUFFER	drivers/net/bfin_mac.h	/^} ADI_ETHER_BUFFER;$/;"	t	typeref:struct:adi_ether_buffer
ADI_ETHER_FRAME_BUFFER	drivers/net/bfin_mac.h	/^} ADI_ETHER_FRAME_BUFFER;$/;"	t	typeref:struct:adi_ether_frame_buffer
ADI_SYSCTRL_VALUES	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^typedef struct ADI_SYSCTRL_VALUES {$/;"	s
ADI_SYSCTRL_VALUES	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^} ADI_SYSCTRL_VALUES;$/;"	t	typeref:struct:ADI_SYSCTRL_VALUES
ADJUST_DQS	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	ADJUST_DQS,$/;"	e	enum:auto_tune_stage
ADJUST_DQS_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define ADJUST_DQS_MASK_BIT	/;"	d
ADLL_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define ADLL_ERROR /;"	d
ADLL_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ADLL_LENGTH	/;"	d
ADLL_MAX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define ADLL_MAX /;"	d
ADLL_MIN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define ADLL_MIN /;"	d
ADLL_RX_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADLL_RX_LENGTH	/;"	d
ADLL_TX_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ADLL_TX_LENGTH	/;"	d
ADM_AXI_ASDM0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define ADM_AXI_ASDM0DMSCR	/;"	d
ADM_AXI_ASDM1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define ADM_AXI_ASDM1DMSCR	/;"	d
ADM_AXI_MPAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define ADM_AXI_MPAP1SLVDMSCR	/;"	d
ADM_AXI_MPAP2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define ADM_AXI_MPAP2SLVDMSCR	/;"	d
ADM_AXI_MPAP3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define ADM_AXI_MPAP3SLVDMSCR	/;"	d
ADPLLJ_CLKCTRL_CLKDCO	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_CLKDCO	/;"	d	file:
ADPLLJ_CLKCTRL_CLKDCOLDOEN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_CLKDCOLDOEN	/;"	d	file:
ADPLLJ_CLKCTRL_CLKDCOLDOPWDNZ	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_CLKDCOLDOPWDNZ	/;"	d	file:
ADPLLJ_CLKCTRL_CLKOUTEN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_CLKOUTEN	/;"	d	file:
ADPLLJ_CLKCTRL_CLKOUTLDOEN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_CLKOUTLDOEN	/;"	d	file:
ADPLLJ_CLKCTRL_DRIFTGUARDIAN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_DRIFTGUARDIAN	/;"	d	file:
ADPLLJ_CLKCTRL_HS1	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_HS1	/;"	d	file:
ADPLLJ_CLKCTRL_HS2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_HS2	/;"	d	file:
ADPLLJ_CLKCTRL_IDLE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_IDLE	/;"	d	file:
ADPLLJ_CLKCTRL_LPMODE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_LPMODE	/;"	d	file:
ADPLLJ_CLKCTRL_REGM4XEN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_REGM4XEN	/;"	d	file:
ADPLLJ_CLKCTRL_TINITZ	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_CLKCTRL_TINITZ	/;"	d	file:
ADPLLJ_M2NDIV_M2SHIFT	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_M2NDIV_M2SHIFT	/;"	d	file:
ADPLLJ_STATUS_BYPASS	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_STATUS_BYPASS	/;"	d	file:
ADPLLJ_STATUS_BYPASSACK	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_STATUS_BYPASSACK	/;"	d	file:
ADPLLJ_STATUS_BYPASSANDACK	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_STATUS_BYPASSANDACK	/;"	d	file:
ADPLLJ_STATUS_FREQLOCK	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_STATUS_FREQLOCK	/;"	d	file:
ADPLLJ_STATUS_PHASELOCK	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_STATUS_PHASELOCK	/;"	d	file:
ADPLLJ_STATUS_PHSFRQLOCK	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_STATUS_PHSFRQLOCK	/;"	d	file:
ADPLLJ_TENABLEDIV_ENB	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_TENABLEDIV_ENB	/;"	d	file:
ADPLLJ_TENABLE_ENB	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ADPLLJ_TENABLE_ENB	/;"	d	file:
ADRERR	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define ADRERR	/;"	d
ADSDebug	include/mpc5xxx.h	/^	volatile u32 ADSDebug;		\/* SDMA + 0x6c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
ADT7460_ADDRESS	drivers/hwmon/adt7460.c	/^#define ADT7460_ADDRESS	/;"	d	file:
ADT7460_CONFIG	drivers/hwmon/adt7460.c	/^#define ADT7460_CONFIG	/;"	d	file:
ADT7460_INVALID	drivers/hwmon/adt7460.c	/^#define ADT7460_INVALID	/;"	d	file:
ADT7460_LOCAL_TEMP	drivers/hwmon/adt7460.c	/^#define ADT7460_LOCAL_TEMP	/;"	d	file:
ADT7460_REM1_TEMP	drivers/hwmon/adt7460.c	/^#define ADT7460_REM1_TEMP	/;"	d	file:
ADT7460_REM2_TEMP	drivers/hwmon/adt7460.c	/^#define ADT7460_REM2_TEMP	/;"	d	file:
ADV7611_I2C_ADDR	board/gdsys/common/adv7611.c	/^#define ADV7611_I2C_ADDR /;"	d	file:
ADV7611_RDINFO	board/gdsys/common/adv7611.c	/^#define ADV7611_RDINFO /;"	d	file:
ADVERTISED_10000baseKR_Full	include/linux/ethtool.h	/^#define ADVERTISED_10000baseKR_Full	/;"	d
ADVERTISED_10000baseKX4_Full	include/linux/ethtool.h	/^#define ADVERTISED_10000baseKX4_Full	/;"	d
ADVERTISED_10000baseR_FEC	include/linux/ethtool.h	/^#define ADVERTISED_10000baseR_FEC	/;"	d
ADVERTISED_10000baseT_Full	drivers/qe/uec_phy.h	/^#define ADVERTISED_10000baseT_Full	/;"	d
ADVERTISED_10000baseT_Full	include/linux/ethtool.h	/^#define ADVERTISED_10000baseT_Full	/;"	d
ADVERTISED_1000baseKX_Full	include/linux/ethtool.h	/^#define ADVERTISED_1000baseKX_Full	/;"	d
ADVERTISED_1000baseT_Full	drivers/qe/uec_phy.h	/^#define ADVERTISED_1000baseT_Full	/;"	d
ADVERTISED_1000baseT_Full	include/linux/ethtool.h	/^#define ADVERTISED_1000baseT_Full	/;"	d
ADVERTISED_1000baseT_Half	drivers/qe/uec_phy.h	/^#define ADVERTISED_1000baseT_Half	/;"	d
ADVERTISED_1000baseT_Half	include/linux/ethtool.h	/^#define ADVERTISED_1000baseT_Half	/;"	d
ADVERTISED_1000baseX_Full	include/linux/ethtool.h	/^#define ADVERTISED_1000baseX_Full	/;"	d
ADVERTISED_1000baseX_Half	include/linux/ethtool.h	/^#define ADVERTISED_1000baseX_Half	/;"	d
ADVERTISED_100baseT_Full	drivers/qe/uec_phy.h	/^#define ADVERTISED_100baseT_Full	/;"	d
ADVERTISED_100baseT_Full	include/linux/ethtool.h	/^#define ADVERTISED_100baseT_Full	/;"	d
ADVERTISED_100baseT_Half	drivers/qe/uec_phy.h	/^#define ADVERTISED_100baseT_Half	/;"	d
ADVERTISED_100baseT_Half	include/linux/ethtool.h	/^#define ADVERTISED_100baseT_Half	/;"	d
ADVERTISED_10baseT_Full	drivers/qe/uec_phy.h	/^#define ADVERTISED_10baseT_Full	/;"	d
ADVERTISED_10baseT_Full	include/linux/ethtool.h	/^#define ADVERTISED_10baseT_Full	/;"	d
ADVERTISED_10baseT_Half	drivers/qe/uec_phy.h	/^#define ADVERTISED_10baseT_Half	/;"	d
ADVERTISED_10baseT_Half	include/linux/ethtool.h	/^#define ADVERTISED_10baseT_Half	/;"	d
ADVERTISED_2500baseX_Full	include/linux/ethtool.h	/^#define ADVERTISED_2500baseX_Full	/;"	d
ADVERTISED_AUI	drivers/qe/uec_phy.h	/^#define ADVERTISED_AUI	/;"	d
ADVERTISED_AUI	include/linux/ethtool.h	/^#define ADVERTISED_AUI	/;"	d
ADVERTISED_Asym_Pause	include/linux/ethtool.h	/^#define ADVERTISED_Asym_Pause	/;"	d
ADVERTISED_Autoneg	drivers/qe/uec_phy.h	/^#define ADVERTISED_Autoneg	/;"	d
ADVERTISED_Autoneg	include/linux/ethtool.h	/^#define ADVERTISED_Autoneg	/;"	d
ADVERTISED_BNC	drivers/qe/uec_phy.h	/^#define ADVERTISED_BNC	/;"	d
ADVERTISED_BNC	include/linux/ethtool.h	/^#define ADVERTISED_BNC	/;"	d
ADVERTISED_Backplane	include/linux/ethtool.h	/^#define ADVERTISED_Backplane	/;"	d
ADVERTISED_FIBRE	drivers/qe/uec_phy.h	/^#define ADVERTISED_FIBRE	/;"	d
ADVERTISED_FIBRE	include/linux/ethtool.h	/^#define ADVERTISED_FIBRE	/;"	d
ADVERTISED_MII	drivers/qe/uec_phy.h	/^#define ADVERTISED_MII	/;"	d
ADVERTISED_MII	include/linux/ethtool.h	/^#define ADVERTISED_MII	/;"	d
ADVERTISED_Pause	include/linux/ethtool.h	/^#define ADVERTISED_Pause	/;"	d
ADVERTISED_TP	drivers/qe/uec_phy.h	/^#define ADVERTISED_TP	/;"	d
ADVERTISED_TP	include/linux/ethtool.h	/^#define ADVERTISED_TP	/;"	d
ADVERTISE_1000FULL	include/linux/mii.h	/^#define ADVERTISE_1000FULL	/;"	d
ADVERTISE_1000HALF	include/linux/mii.h	/^#define ADVERTISE_1000HALF	/;"	d
ADVERTISE_1000XFULL	include/linux/mii.h	/^#define ADVERTISE_1000XFULL	/;"	d
ADVERTISE_1000XHALF	include/linux/mii.h	/^#define ADVERTISE_1000XHALF	/;"	d
ADVERTISE_1000XPAUSE	include/linux/mii.h	/^#define ADVERTISE_1000XPAUSE	/;"	d
ADVERTISE_1000XPSE_ASYM	include/linux/mii.h	/^#define ADVERTISE_1000XPSE_ASYM /;"	d
ADVERTISE_1000_FULL	drivers/net/e1000.h	/^#define ADVERTISE_1000_FULL	/;"	d
ADVERTISE_1000_HALF	drivers/net/e1000.h	/^#define ADVERTISE_1000_HALF	/;"	d
ADVERTISE_100BASE4	include/linux/mii.h	/^#define ADVERTISE_100BASE4	/;"	d
ADVERTISE_100FULL	include/linux/mii.h	/^#define ADVERTISE_100FULL	/;"	d
ADVERTISE_100HALF	include/linux/mii.h	/^#define ADVERTISE_100HALF	/;"	d
ADVERTISE_100_FULL	drivers/net/e1000.h	/^#define ADVERTISE_100_FULL	/;"	d
ADVERTISE_100_HALF	drivers/net/e1000.h	/^#define ADVERTISE_100_HALF	/;"	d
ADVERTISE_10FULL	include/linux/mii.h	/^#define ADVERTISE_10FULL	/;"	d
ADVERTISE_10HALF	include/linux/mii.h	/^#define ADVERTISE_10HALF	/;"	d
ADVERTISE_10_FULL	drivers/net/e1000.h	/^#define ADVERTISE_10_FULL	/;"	d
ADVERTISE_10_HALF	drivers/net/e1000.h	/^#define ADVERTISE_10_HALF	/;"	d
ADVERTISE_ALL	include/linux/mii.h	/^#define ADVERTISE_ALL /;"	d
ADVERTISE_CSMA	include/linux/mii.h	/^#define ADVERTISE_CSMA	/;"	d
ADVERTISE_FULL	include/linux/mii.h	/^#define ADVERTISE_FULL /;"	d
ADVERTISE_LPACK	include/linux/mii.h	/^#define ADVERTISE_LPACK	/;"	d
ADVERTISE_NPAGE	include/linux/mii.h	/^#define ADVERTISE_NPAGE	/;"	d
ADVERTISE_PAUSE_ASYM	include/linux/mii.h	/^#define ADVERTISE_PAUSE_ASYM	/;"	d
ADVERTISE_PAUSE_CAP	include/linux/mii.h	/^#define ADVERTISE_PAUSE_CAP	/;"	d
ADVERTISE_RESV	include/linux/mii.h	/^#define ADVERTISE_RESV	/;"	d
ADVERTISE_RFAULT	include/linux/mii.h	/^#define ADVERTISE_RFAULT	/;"	d
ADVERTISE_SLCT	include/linux/mii.h	/^#define ADVERTISE_SLCT	/;"	d
ADVEXTRADELAY	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define ADVEXTRADELAY /;"	d
ADVONTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define ADVONTIME(/;"	d
ADVRDOFFTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define ADVRDOFFTIME(/;"	d
ADVWROFFTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define ADVWROFFTIME(/;"	d
ADV_1000_FDPX	include/mv88e6352.h	/^#define ADV_1000_FDPX	/;"	d
ADV_1000_HDPX	include/mv88e6352.h	/^#define ADV_1000_HDPX	/;"	d
ADV_RET_DEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	ADV_RET_DEL	/;"	d
AD_ALPHA_C_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_ALPHA_C_SHIFT	/;"	d	file:
AD_ALPHA_C_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_ALPHA_C_SHIFT	/;"	d	file:
AD_ALPHA_C_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_ALPHA_C_SHIFT	/;"	d	file:
AD_ALPHA_C_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_ALPHA_C_SHIFT	/;"	d	file:
AD_BLUE_C_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_BLUE_C_SHIFT	/;"	d	file:
AD_BLUE_C_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_BLUE_C_SHIFT	/;"	d	file:
AD_BLUE_C_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_BLUE_C_SHIFT	/;"	d	file:
AD_BLUE_C_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_BLUE_C_SHIFT	/;"	d	file:
AD_BYTE_F	board/freescale/p1022ds/diu.c	/^#define AD_BYTE_F	/;"	d	file:
AD_BYTE_F	board/freescale/t1040qds/diu.c	/^#define AD_BYTE_F	/;"	d	file:
AD_BYTE_F	board/freescale/t104xrdb/diu.c	/^#define AD_BYTE_F	/;"	d	file:
AD_BYTE_F	board/gdsys/p1022/diu.c	/^#define AD_BYTE_F	/;"	d	file:
AD_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PWM0_B_MARK, ADICLK_B_MARK, AD_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AD_CLK_MARK, ETH_RXD0_MARK, VI0_G3_MARK, MSIOF2_SYNC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AD_CLK_MARK,$/;"	e	enum:__anona307945e0103	file:
AD_COMP_0_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_COMP_0_SHIFT	/;"	d	file:
AD_COMP_0_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_COMP_0_SHIFT	/;"	d	file:
AD_COMP_0_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_COMP_0_SHIFT	/;"	d	file:
AD_COMP_0_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_COMP_0_SHIFT	/;"	d	file:
AD_COMP_1_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_COMP_1_SHIFT	/;"	d	file:
AD_COMP_1_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_COMP_1_SHIFT	/;"	d	file:
AD_COMP_1_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_COMP_1_SHIFT	/;"	d	file:
AD_COMP_1_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_COMP_1_SHIFT	/;"	d	file:
AD_COMP_2_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_COMP_2_SHIFT	/;"	d	file:
AD_COMP_2_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_COMP_2_SHIFT	/;"	d	file:
AD_COMP_2_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_COMP_2_SHIFT	/;"	d	file:
AD_COMP_2_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_COMP_2_SHIFT	/;"	d	file:
AD_COMP_3_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_COMP_3_SHIFT	/;"	d	file:
AD_COMP_3_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_COMP_3_SHIFT	/;"	d	file:
AD_COMP_3_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_COMP_3_SHIFT	/;"	d	file:
AD_COMP_3_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_COMP_3_SHIFT	/;"	d	file:
AD_DI_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_DI_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF1_RXD_B_MARK, SCIF5_RXD_D_MARK, ADIDATA_B_MARK, AD_DI_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_DI_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_DI_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ADIDATA_MARK, AD_DI_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_DI_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AD_DI_MARK,$/;"	e	enum:__anona307945e0103	file:
AD_DO_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_DO_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ADICS_SAMP_B_MARK, AD_DO_B_MARK, SSI_SDATA0_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_DO_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_DO_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_DO_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AD_DO_MARK,$/;"	e	enum:__anona307945e0103	file:
AD_GREEN_C_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_GREEN_C_SHIFT	/;"	d	file:
AD_GREEN_C_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_GREEN_C_SHIFT	/;"	d	file:
AD_GREEN_C_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_GREEN_C_SHIFT	/;"	d	file:
AD_GREEN_C_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_GREEN_C_SHIFT	/;"	d	file:
AD_NCS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_NCS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,$/;"	e	enum:__anona3077f190103	file:
AD_NCS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN0_TX_B_MARK, AVB_TXD2_MARK, ADICHS0_MARK, AD_NCS_N_MARK,$/;"	e	enum:__anona307901d0103	file:
AD_NSCx_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AD_NSCx_MARK,$/;"	e	enum:__anona307945e0103	file:
AD_PIXEL_S_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_PIXEL_S_SHIFT	/;"	d	file:
AD_PIXEL_S_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_PIXEL_S_SHIFT	/;"	d	file:
AD_PIXEL_S_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_PIXEL_S_SHIFT	/;"	d	file:
AD_PIXEL_S_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_PIXEL_S_SHIFT	/;"	d	file:
AD_RED_C_SHIFT	board/freescale/p1022ds/diu.c	/^#define AD_RED_C_SHIFT	/;"	d	file:
AD_RED_C_SHIFT	board/freescale/t1040qds/diu.c	/^#define AD_RED_C_SHIFT	/;"	d	file:
AD_RED_C_SHIFT	board/freescale/t104xrdb/diu.c	/^#define AD_RED_C_SHIFT	/;"	d	file:
AD_RED_C_SHIFT	board/gdsys/p1022/diu.c	/^#define AD_RED_C_SHIFT	/;"	d	file:
AEATR_EVENT	include/mpc83xx.h	/^#define AEATR_EVENT	/;"	d
AEATR_EVENT_SHIFT	include/mpc83xx.h	/^#define AEATR_EVENT_SHIFT	/;"	d
AEATR_MSTR_ID	include/mpc83xx.h	/^#define AEATR_MSTR_ID	/;"	d
AEATR_MSTR_ID_SHIFT	include/mpc83xx.h	/^#define AEATR_MSTR_ID_SHIFT	/;"	d
AEATR_TBST	include/mpc83xx.h	/^#define AEATR_TBST	/;"	d
AEATR_TBST_SHIFT	include/mpc83xx.h	/^#define AEATR_TBST_SHIFT	/;"	d
AEATR_TSIZE	include/mpc83xx.h	/^#define AEATR_TSIZE	/;"	d
AEATR_TSIZE_SHIFT	include/mpc83xx.h	/^#define AEATR_TSIZE_SHIFT	/;"	d
AEATR_TTYPE	include/mpc83xx.h	/^#define AEATR_TTYPE	/;"	d
AEATR_TTYPE_SHIFT	include/mpc83xx.h	/^#define AEATR_TTYPE_SHIFT	/;"	d
AEC_CTRL	arch/x86/include/asm/arch-quark/quark.h	/^#define AEC_CTRL	/;"	d
AEMIF_CFG_EXTEND_WAIT	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_EXTEND_WAIT(/;"	d	file:
AEMIF_CFG_RD_HOLD	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_RD_HOLD(/;"	d	file:
AEMIF_CFG_RD_SETUP	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_RD_SETUP(/;"	d	file:
AEMIF_CFG_RD_STROBE	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_RD_STROBE(/;"	d	file:
AEMIF_CFG_SELECT_STROBE	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_SELECT_STROBE(/;"	d	file:
AEMIF_CFG_TURN_AROUND	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_TURN_AROUND(/;"	d	file:
AEMIF_CFG_WIDTH	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_WIDTH(/;"	d	file:
AEMIF_CFG_WR_HOLD	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_WR_HOLD(/;"	d	file:
AEMIF_CFG_WR_SETUP	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_WR_SETUP(/;"	d	file:
AEMIF_CFG_WR_STROBE	drivers/memory/ti-aemif.c	/^#define AEMIF_CFG_WR_STROBE(/;"	d	file:
AEMIF_CONFIG	drivers/memory/ti-aemif.c	/^#define AEMIF_CONFIG(/;"	d	file:
AEMIF_MODE_NAND	arch/arm/include/asm/ti-common/ti-aemif.h	/^#define AEMIF_MODE_NAND /;"	d
AEMIF_MODE_NOR	arch/arm/include/asm/ti-common/ti-aemif.h	/^#define AEMIF_MODE_NOR /;"	d
AEMIF_MODE_ONENAND	arch/arm/include/asm/ti-common/ti-aemif.h	/^#define AEMIF_MODE_ONENAND /;"	d
AEMIF_NAND_CONTROL	drivers/memory/ti-aemif.c	/^#define AEMIF_NAND_CONTROL	/;"	d	file:
AEMIF_NUM_CS	arch/arm/include/asm/ti-common/ti-aemif.h	/^#define AEMIF_NUM_CS /;"	d
AEMIF_ONENAND_CONTROL	drivers/memory/ti-aemif.c	/^#define AEMIF_ONENAND_CONTROL	/;"	d	file:
AEMIF_PRESERVE	arch/arm/include/asm/ti-common/ti-aemif.h	/^#define AEMIF_PRESERVE /;"	d
AEMIF_WAITCYCLE_CONFIG	drivers/memory/ti-aemif.c	/^#define AEMIF_WAITCYCLE_CONFIG	/;"	d	file:
AEMIF_WIDTH_16	arch/arm/include/asm/ti-common/ti-aemif.h	/^		AEMIF_WIDTH_16	= 1,$/;"	e	enum:aemif_config::__anon4a52d1080103
AEMIF_WIDTH_32	arch/arm/include/asm/ti-common/ti-aemif.h	/^		AEMIF_WIDTH_32	= 2,$/;"	e	enum:aemif_config::__anon4a52d1080103
AEMIF_WIDTH_8	arch/arm/include/asm/ti-common/ti-aemif.h	/^		AEMIF_WIDTH_8	= 0,$/;"	e	enum:aemif_config::__anon4a52d1080103
AER_AO	include/mpc83xx.h	/^#define AER_AO	/;"	d
AER_ATO	include/mpc83xx.h	/^#define AER_ATO	/;"	d
AER_DTO	include/mpc83xx.h	/^#define AER_DTO	/;"	d
AER_ECW	include/mpc83xx.h	/^#define AER_ECW	/;"	d
AER_ETEA	include/mpc83xx.h	/^#define AER_ETEA	/;"	d
AER_RES	include/mpc83xx.h	/^#define AER_RES	/;"	d
AES_CMAC_CONST_RB	arch/arm/mach-tegra/tegra20/crypto.c	/^#define AES_CMAC_CONST_RB /;"	d	file:
AES_EXPAND_KEY_LENGTH	include/aes.h	/^	AES_EXPAND_KEY_LENGTH	= 4 * AES_STATECOLS * (AES_ROUNDS + 1),$/;"	e	enum:__anona4df82870103
AES_KEYCOLS	include/aes.h	/^	AES_KEYCOLS	= 4,	\/* columns in a key *\/$/;"	e	enum:__anona4df82870103
AES_KEY_LENGTH	include/aes.h	/^	AES_KEY_LENGTH	= 128 \/ 8,$/;"	e	enum:__anona4df82870103
AES_KEY_SHIFT	drivers/crypto/fsl/desc.h	/^#define AES_KEY_SHIFT	/;"	d
AES_ROUNDS	include/aes.h	/^	AES_ROUNDS	= 10,	\/* rounds in encryption *\/$/;"	e	enum:__anona4df82870103
AES_STATECOLS	include/aes.h	/^	AES_STATECOLS	= 4,	\/* columns in the state & expanded key *\/$/;"	e	enum:__anona4df82870103
AETH_INVALID_PHY	arch/avr32/include/asm/setup.h	/^#define AETH_INVALID_PHY	/;"	d
AFC_CFG	drivers/net/smc911x.h	/^#define AFC_CFG	/;"	d
AFC_CFG	drivers/usb/eth/smsc95xx.c	/^#define AFC_CFG	/;"	d	file:
AFC_CFG_AFC_HI	drivers/net/smc911x.h	/^#define		AFC_CFG_AFC_HI	/;"	d
AFC_CFG_AFC_LO	drivers/net/smc911x.h	/^#define		AFC_CFG_AFC_LO	/;"	d
AFC_CFG_BACK_DUR	drivers/net/smc911x.h	/^#define		AFC_CFG_BACK_DUR	/;"	d
AFC_CFG_DEFAULT	drivers/usb/eth/smsc95xx.c	/^#define AFC_CFG_DEFAULT	/;"	d	file:
AFC_CFG_FCADD	drivers/net/smc911x.h	/^#define		AFC_CFG_FCADD	/;"	d
AFC_CFG_FCANY	drivers/net/smc911x.h	/^#define		AFC_CFG_FCANY	/;"	d
AFC_CFG_FCBRD	drivers/net/smc911x.h	/^#define		AFC_CFG_FCBRD	/;"	d
AFC_CFG_FCMULT	drivers/net/smc911x.h	/^#define		AFC_CFG_FCMULT	/;"	d
AFIFO_OVER	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AFIFO_OVER	/;"	d
AFIFO_UNDER	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AFIFO_UNDER	/;"	d
AFI_AFI_INTR_ENABLE	drivers/pci/pci_tegra.c	/^#define AFI_AFI_INTR_ENABLE	/;"	d	file:
AFI_AXI_BAR0_START	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR0_START	/;"	d	file:
AFI_AXI_BAR0_SZ	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR0_SZ	/;"	d	file:
AFI_AXI_BAR1_START	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR1_START	/;"	d	file:
AFI_AXI_BAR1_SZ	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR1_SZ	/;"	d	file:
AFI_AXI_BAR2_START	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR2_START	/;"	d	file:
AFI_AXI_BAR2_SZ	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR2_SZ	/;"	d	file:
AFI_AXI_BAR3_START	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR3_START	/;"	d	file:
AFI_AXI_BAR3_SZ	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR3_SZ	/;"	d	file:
AFI_AXI_BAR4_START	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR4_START	/;"	d	file:
AFI_AXI_BAR4_SZ	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR4_SZ	/;"	d	file:
AFI_AXI_BAR5_START	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR5_START	/;"	d	file:
AFI_AXI_BAR5_SZ	drivers/pci/pci_tegra.c	/^#define AFI_AXI_BAR5_SZ	/;"	d	file:
AFI_CACHE_BAR0_ST	drivers/pci/pci_tegra.c	/^#define AFI_CACHE_BAR0_ST	/;"	d	file:
AFI_CACHE_BAR0_SZ	drivers/pci/pci_tegra.c	/^#define AFI_CACHE_BAR0_SZ	/;"	d	file:
AFI_CACHE_BAR1_ST	drivers/pci/pci_tegra.c	/^#define AFI_CACHE_BAR1_ST	/;"	d	file:
AFI_CACHE_BAR1_SZ	drivers/pci/pci_tegra.c	/^#define AFI_CACHE_BAR1_SZ	/;"	d	file:
AFI_CONFIGURATION	drivers/pci/pci_tegra.c	/^#define AFI_CONFIGURATION	/;"	d	file:
AFI_CONFIGURATION_EN_FPCI	drivers/pci/pci_tegra.c	/^#define  AFI_CONFIGURATION_EN_FPCI	/;"	d	file:
AFI_FPCI_BAR0	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_BAR0	/;"	d	file:
AFI_FPCI_BAR1	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_BAR1	/;"	d	file:
AFI_FPCI_BAR2	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_BAR2	/;"	d	file:
AFI_FPCI_BAR3	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_BAR3	/;"	d	file:
AFI_FPCI_BAR4	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_BAR4	/;"	d	file:
AFI_FPCI_BAR5	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_BAR5	/;"	d	file:
AFI_FPCI_ERROR_MASKS	drivers/pci/pci_tegra.c	/^#define AFI_FPCI_ERROR_MASKS	/;"	d	file:
AFI_FUSE	drivers/pci/pci_tegra.c	/^#define AFI_FUSE	/;"	d	file:
AFI_FUSE_PCIE_T0_GEN2_DIS	drivers/pci/pci_tegra.c	/^#define  AFI_FUSE_PCIE_T0_GEN2_DIS	/;"	d	file:
AFI_INTR_EN_AXI_DECERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_AXI_DECERR	/;"	d	file:
AFI_INTR_EN_DFPCI_DECERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_DFPCI_DECERR	/;"	d	file:
AFI_INTR_EN_FPCI_TIMEOUT	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_FPCI_TIMEOUT	/;"	d	file:
AFI_INTR_EN_INI_DECERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_INI_DECERR	/;"	d	file:
AFI_INTR_EN_INI_SLVERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_INI_SLVERR	/;"	d	file:
AFI_INTR_EN_PRSNT_SENSE	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_PRSNT_SENSE	/;"	d	file:
AFI_INTR_EN_TGT_DECERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_TGT_DECERR	/;"	d	file:
AFI_INTR_EN_TGT_SLVERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_TGT_SLVERR	/;"	d	file:
AFI_INTR_EN_TGT_WRERR	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_EN_TGT_WRERR	/;"	d	file:
AFI_INTR_MASK	drivers/pci/pci_tegra.c	/^#define AFI_INTR_MASK	/;"	d	file:
AFI_INTR_MASK_INT_MASK	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_MASK_INT_MASK	/;"	d	file:
AFI_INTR_MASK_MSI_MASK	drivers/pci/pci_tegra.c	/^#define  AFI_INTR_MASK_MSI_MASK	/;"	d	file:
AFI_MSI_AXI_BAR_ST	drivers/pci/pci_tegra.c	/^#define AFI_MSI_AXI_BAR_ST	/;"	d	file:
AFI_MSI_BAR_SZ	drivers/pci/pci_tegra.c	/^#define AFI_MSI_BAR_SZ	/;"	d	file:
AFI_MSI_FPCI_BAR_ST	drivers/pci/pci_tegra.c	/^#define AFI_MSI_FPCI_BAR_ST	/;"	d	file:
AFI_PCIE_CONFIG	drivers/pci/pci_tegra.c	/^#define AFI_PCIE_CONFIG	/;"	d	file:
AFI_PCIE_CONFIG_PCIE_DISABLE	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_PCIE_DISABLE(/;"	d	file:
AFI_PCIE_CONFIG_PCIE_DISABLE_ALL	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_PCIE_DISABLE_ALL	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_222	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_222	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_411	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_411	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_420	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_420	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_DUAL	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_DUAL	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_MASK	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_MASK	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_SINGLE	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_SINGLE	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_111	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_111	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_211	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_211	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_401	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_401	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X2_X1	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X2_X1	/;"	d	file:
AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X4_X1	drivers/pci/pci_tegra.c	/^#define  AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X4_X1	/;"	d	file:
AFI_PEX0_CTRL	drivers/pci/pci_tegra.c	/^#define AFI_PEX0_CTRL	/;"	d	file:
AFI_PEX1_CTRL	drivers/pci/pci_tegra.c	/^#define AFI_PEX1_CTRL	/;"	d	file:
AFI_PEX2_CTRL	drivers/pci/pci_tegra.c	/^#define AFI_PEX2_CTRL	/;"	d	file:
AFI_PEX2_CTRL_T186	drivers/pci/pci_tegra.c	/^#define AFI_PEX2_CTRL_T186	/;"	d	file:
AFI_PEXBIAS_CTRL_0	drivers/pci/pci_tegra.c	/^#define AFI_PEXBIAS_CTRL_0	/;"	d	file:
AFI_PEX_CTRL_CLKREQ_EN	drivers/pci/pci_tegra.c	/^#define  AFI_PEX_CTRL_CLKREQ_EN	/;"	d	file:
AFI_PEX_CTRL_OVERRIDE_EN	drivers/pci/pci_tegra.c	/^#define  AFI_PEX_CTRL_OVERRIDE_EN	/;"	d	file:
AFI_PEX_CTRL_REFCLK_EN	drivers/pci/pci_tegra.c	/^#define  AFI_PEX_CTRL_REFCLK_EN	/;"	d	file:
AFI_PEX_CTRL_RST	drivers/pci/pci_tegra.c	/^#define  AFI_PEX_CTRL_RST	/;"	d	file:
AFI_PLLE_CONTROL	drivers/pci/pci_tegra.c	/^#define AFI_PLLE_CONTROL	/;"	d	file:
AFI_PLLE_CONTROL_BYPASS_PADS2PLLE_CONTROL	drivers/pci/pci_tegra.c	/^#define  AFI_PLLE_CONTROL_BYPASS_PADS2PLLE_CONTROL /;"	d	file:
AFI_PLLE_CONTROL_PADS2PLLE_CONTROL_EN	drivers/pci/pci_tegra.c	/^#define  AFI_PLLE_CONTROL_PADS2PLLE_CONTROL_EN /;"	d	file:
AFI_RATE_RATIO	board/altera/arria5-socdk/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/denx/mcvevk/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/ebv/socrates/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/is1/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/samtec/vining_fpga/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/sr1500/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_RATE_RATIO	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define AFI_RATE_RATIO /;"	d
AFI_RATE_RATIO	board/terasic/sockit/qts/sdram_config.h	/^#define AFI_RATE_RATIO	/;"	d
AFI_SM_INTR_ENABLE	drivers/pci/pci_tegra.c	/^#define AFI_SM_INTR_ENABLE	/;"	d	file:
AFI_SM_INTR_INTA_ASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTA_ASSERT	/;"	d	file:
AFI_SM_INTR_INTA_DEASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTA_DEASSERT	/;"	d	file:
AFI_SM_INTR_INTB_ASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTB_ASSERT	/;"	d	file:
AFI_SM_INTR_INTB_DEASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTB_DEASSERT	/;"	d	file:
AFI_SM_INTR_INTC_ASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTC_ASSERT	/;"	d	file:
AFI_SM_INTR_INTC_DEASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTC_DEASSERT	/;"	d	file:
AFI_SM_INTR_INTD_ASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTD_ASSERT	/;"	d	file:
AFI_SM_INTR_INTD_DEASSERT	drivers/pci/pci_tegra.c	/^#define  AFI_SM_INTR_INTD_DEASSERT	/;"	d	file:
AFLAGS_IMPLICIT_IT	arch/arm/config.mk	/^AFLAGS_IMPLICIT_IT	:= $(call as-option,-Wa$(comma)-mimplicit-it=always)$/;"	m
AFLAGS_REMOVE_call32.o	arch/x86/cpu/Makefile	/^AFLAGS_REMOVE_call32.o := -mregparm=3 \\$/;"	m
AFLAGS_REMOVE_memcpy.o	arch/arm/lib/Makefile	/^AFLAGS_REMOVE_memcpy.o := -mthumb -mthumb-interwork$/;"	m
AFLAGS_REMOVE_memset.o	arch/arm/lib/Makefile	/^AFLAGS_REMOVE_memset.o := -mthumb -mthumb-interwork$/;"	m
AFLAGS_call32.o	arch/x86/cpu/Makefile	/^AFLAGS_call32.o := -fpic -fshort-wchar$/;"	m
AFLAGS_lowlevel_init.o	arch/arm/mach-zynq/Makefile	/^AFLAGS_lowlevel_init.o := -mfpu=neon$/;"	m
AFLAGS_memcpy.o	arch/arm/lib/Makefile	/^AFLAGS_memcpy.o := -DMEMCPY_NO_THUMB_BUILD$/;"	m
AFLAGS_memset.o	arch/arm/lib/Makefile	/^AFLAGS_memset.o := -DMEMSET_NO_THUMB_BUILD$/;"	m
AFListOffset	drivers/usb/gadget/rndis.h	/^	__le32	AFListOffset;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
AFListSize	drivers/usb/gadget/rndis.h	/^	__le32	AFListSize;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
AFM_PM	drivers/net/xilinx_ll_temac.h	/^#define AFM_PM	/;"	d
AFP_HASH	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_HASH	/;"	d
AFP_IAPRIMARY	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_IAPRIMARY	/;"	d
AFP_IASECONDARY1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_IASECONDARY1	/;"	d
AFP_IASECONDARY2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_IASECONDARY2	/;"	d
AFP_IASECONDARY3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_IASECONDARY3	/;"	d
AFP_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_MASK	/;"	d
AFP_NumSectors	board/bf533-ezkit/flash.c	/^int AFP_NumSectors = 40;$/;"	v	typeref:typename:int
AFP_SectorSize1	board/bf533-ezkit/flash.c	/^long AFP_SectorSize1 = 0x10000;$/;"	v	typeref:typename:long
AFP_SectorSize2	board/bf533-ezkit/flash.c	/^int AFP_SectorSize2 = 0x4000;$/;"	v	typeref:typename:int
AFP_TX	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define AFP_TX	/;"	d
AF_SEL_0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_0	/;"	d
AF_SEL_1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_1	/;"	d
AF_SEL_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_2	/;"	d
AF_SEL_3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_3	/;"	d
AF_SEL_4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_4	/;"	d
AF_SEL_5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_5	/;"	d
AF_SEL_6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_6	/;"	d
AF_SEL_7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AF_SEL_7	/;"	d
AG7XXX	drivers/net/Kconfig	/^config AG7XXX$/;"	c
AG7XXX_DMADESC_FTPP_OVERRIDE_OFFSET	drivers/net/ag7xxx.c	/^#define AG7XXX_DMADESC_FTPP_OVERRIDE_OFFSET	/;"	d	file:
AG7XXX_DMADESC_IS_EMPTY	drivers/net/ag7xxx.c	/^#define AG7XXX_DMADESC_IS_EMPTY	/;"	d	file:
AG7XXX_DMADESC_PKT_SIZE_MASK	drivers/net/ag7xxx.c	/^#define AG7XXX_DMADESC_PKT_SIZE_MASK	/;"	d	file:
AG7XXX_DMADESC_PKT_SIZE_OFFSET	drivers/net/ag7xxx.c	/^#define AG7XXX_DMADESC_PKT_SIZE_OFFSET	/;"	d	file:
AG7XXX_ETH_ADDR1	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_ADDR1	/;"	d	file:
AG7XXX_ETH_ADDR2	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_ADDR2	/;"	d	file:
AG7XXX_ETH_CFG1	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1	/;"	d	file:
AG7XXX_ETH_CFG1_LOOPBACK	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1_LOOPBACK	/;"	d	file:
AG7XXX_ETH_CFG1_RX_EN	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1_RX_EN	/;"	d	file:
AG7XXX_ETH_CFG1_RX_RST	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1_RX_RST	/;"	d	file:
AG7XXX_ETH_CFG1_SOFT_RST	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1_SOFT_RST	/;"	d	file:
AG7XXX_ETH_CFG1_TX_EN	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1_TX_EN	/;"	d	file:
AG7XXX_ETH_CFG1_TX_RST	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG1_TX_RST	/;"	d	file:
AG7XXX_ETH_CFG2	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2	/;"	d	file:
AG7XXX_ETH_CFG2_FDX	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_FDX	/;"	d	file:
AG7XXX_ETH_CFG2_HUGE_FRAME_EN	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_HUGE_FRAME_EN	/;"	d	file:
AG7XXX_ETH_CFG2_IF_1000	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_IF_1000	/;"	d	file:
AG7XXX_ETH_CFG2_IF_10_100	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_IF_10_100	/;"	d	file:
AG7XXX_ETH_CFG2_IF_SPEED_MASK	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_IF_SPEED_MASK	/;"	d	file:
AG7XXX_ETH_CFG2_LEN_CHECK	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_LEN_CHECK	/;"	d	file:
AG7XXX_ETH_CFG2_PAD_CRC_EN	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG2_PAD_CRC_EN	/;"	d	file:
AG7XXX_ETH_CFG_GE0_ERR_EN	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_GE0_ERR_EN	/;"	d	file:
AG7XXX_ETH_CFG_GMII_GE0	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_GMII_GE0	/;"	d	file:
AG7XXX_ETH_CFG_MII_GE0	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_MII_GE0	/;"	d	file:
AG7XXX_ETH_CFG_MII_GE0_MASTER	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_MII_GE0_MASTER	/;"	d	file:
AG7XXX_ETH_CFG_MII_GE0_SLAVE	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_MII_GE0_SLAVE	/;"	d	file:
AG7XXX_ETH_CFG_RGMII_GE0	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_RGMII_GE0	/;"	d	file:
AG7XXX_ETH_CFG_SW_ONLY_MODE	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_SW_ONLY_MODE	/;"	d	file:
AG7XXX_ETH_CFG_SW_PHY_ADDR_SWAP	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_SW_PHY_ADDR_SWAP	/;"	d	file:
AG7XXX_ETH_CFG_SW_PHY_SWAP	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_CFG_SW_PHY_SWAP	/;"	d	file:
AG7XXX_ETH_DMA_RX_CTRL	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_RX_CTRL	/;"	d	file:
AG7XXX_ETH_DMA_RX_CTRL_RXE	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_RX_CTRL_RXE	/;"	d	file:
AG7XXX_ETH_DMA_RX_DESC	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_RX_DESC	/;"	d	file:
AG7XXX_ETH_DMA_RX_STATUS	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_RX_STATUS	/;"	d	file:
AG7XXX_ETH_DMA_TX_CTRL	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_TX_CTRL	/;"	d	file:
AG7XXX_ETH_DMA_TX_CTRL_TXE	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_TX_CTRL_TXE	/;"	d	file:
AG7XXX_ETH_DMA_TX_DESC	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_TX_DESC	/;"	d	file:
AG7XXX_ETH_DMA_TX_STATUS	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_DMA_TX_STATUS	/;"	d	file:
AG7XXX_ETH_FIFO_CFG_0	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_FIFO_CFG_0	/;"	d	file:
AG7XXX_ETH_FIFO_CFG_1	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_FIFO_CFG_1	/;"	d	file:
AG7XXX_ETH_FIFO_CFG_2	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_FIFO_CFG_2	/;"	d	file:
AG7XXX_ETH_FIFO_CFG_3	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_FIFO_CFG_3	/;"	d	file:
AG7XXX_ETH_FIFO_CFG_4	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_FIFO_CFG_4	/;"	d	file:
AG7XXX_ETH_FIFO_CFG_5	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_FIFO_CFG_5	/;"	d	file:
AG7XXX_ETH_MII_MGMT_ADDRESS	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_ADDRESS	/;"	d	file:
AG7XXX_ETH_MII_MGMT_ADDRESS_SHIFT	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_ADDRESS_SHIFT	/;"	d	file:
AG7XXX_ETH_MII_MGMT_CFG	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_CFG	/;"	d	file:
AG7XXX_ETH_MII_MGMT_CFG_RESET	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_CFG_RESET	/;"	d	file:
AG7XXX_ETH_MII_MGMT_CMD	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_CMD	/;"	d	file:
AG7XXX_ETH_MII_MGMT_CMD_READ	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_CMD_READ	/;"	d	file:
AG7XXX_ETH_MII_MGMT_CTRL	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_CTRL	/;"	d	file:
AG7XXX_ETH_MII_MGMT_IND	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_IND	/;"	d	file:
AG7XXX_ETH_MII_MGMT_IND_BUSY	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_IND_BUSY	/;"	d	file:
AG7XXX_ETH_MII_MGMT_IND_INVALID	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_IND_INVALID	/;"	d	file:
AG7XXX_ETH_MII_MGMT_STATUS	drivers/net/ag7xxx.c	/^#define AG7XXX_ETH_MII_MGMT_STATUS	/;"	d	file:
AG7XXX_GMAC_ETH_CFG	drivers/net/ag7xxx.c	/^#define AG7XXX_GMAC_ETH_CFG	/;"	d	file:
AG7XXX_MODEL_AG933X	drivers/net/ag7xxx.c	/^	AG7XXX_MODEL_AG933X,$/;"	e	enum:ag7xxx_model	file:
AG7XXX_MODEL_AG934X	drivers/net/ag7xxx.c	/^	AG7XXX_MODEL_AG934X,$/;"	e	enum:ag7xxx_model	file:
AGGR_CODE_ALL	drivers/net/vsc9953.c	/^	AGGR_CODE_ALL,	\/* S\/D MAC, IPv4 S\/D IP, IPv6 Flow Label, S\/D PORT *\/$/;"	e	enum:aggr_code_mode	file:
AGGR_CODE_RAND	drivers/net/vsc9953.c	/^	AGGR_CODE_RAND = 0,$/;"	e	enum:aggr_code_mode	file:
AGP_BASE	include/radeon.h	/^#define AGP_BASE	/;"	d
AGP_CAP_ID	include/radeon.h	/^#define AGP_CAP_ID	/;"	d
AGP_CNTL	include/radeon.h	/^#define AGP_CNTL	/;"	d
AGP_CNTL__AGP_MISC_MASK	include/radeon.h	/^#define AGP_CNTL__AGP_MISC_MASK	/;"	d
AGP_CNTL__AGP_MISC__SHIFT	include/radeon.h	/^#define AGP_CNTL__AGP_MISC__SHIFT	/;"	d
AGP_CNTL__AGP_REV_ID	include/radeon.h	/^#define AGP_CNTL__AGP_REV_ID	/;"	d
AGP_CNTL__AGP_REV_ID_MASK	include/radeon.h	/^#define AGP_CNTL__AGP_REV_ID_MASK	/;"	d
AGP_CNTL__AGP_REV_ID__SHIFT	include/radeon.h	/^#define AGP_CNTL__AGP_REV_ID__SHIFT	/;"	d
AGP_CNTL__DELAY_FIRST_SBA_EN	include/radeon.h	/^#define AGP_CNTL__DELAY_FIRST_SBA_EN	/;"	d
AGP_CNTL__DELAY_FIRST_SBA_EN_MASK	include/radeon.h	/^#define AGP_CNTL__DELAY_FIRST_SBA_EN_MASK	/;"	d
AGP_CNTL__DELAY_FIRST_SBA_EN__SHIFT	include/radeon.h	/^#define AGP_CNTL__DELAY_FIRST_SBA_EN__SHIFT	/;"	d
AGP_CNTL__DELAY_FIRST_SBA_VAL_MASK	include/radeon.h	/^#define AGP_CNTL__DELAY_FIRST_SBA_VAL_MASK	/;"	d
AGP_CNTL__DELAY_FIRST_SBA_VAL__SHIFT	include/radeon.h	/^#define AGP_CNTL__DELAY_FIRST_SBA_VAL__SHIFT	/;"	d
AGP_CNTL__DIS_QUEUED_GNT_FIX	include/radeon.h	/^#define AGP_CNTL__DIS_QUEUED_GNT_FIX	/;"	d
AGP_CNTL__DIS_QUEUED_GNT_FIX_MASK	include/radeon.h	/^#define AGP_CNTL__DIS_QUEUED_GNT_FIX_MASK	/;"	d
AGP_CNTL__DIS_QUEUED_GNT_FIX__SHIFT	include/radeon.h	/^#define AGP_CNTL__DIS_QUEUED_GNT_FIX__SHIFT	/;"	d
AGP_CNTL__DIS_RBF	include/radeon.h	/^#define AGP_CNTL__DIS_RBF	/;"	d
AGP_CNTL__DIS_RBF_MASK	include/radeon.h	/^#define AGP_CNTL__DIS_RBF_MASK	/;"	d
AGP_CNTL__DIS_RBF__SHIFT	include/radeon.h	/^#define AGP_CNTL__DIS_RBF__SHIFT	/;"	d
AGP_CNTL__EN_2X_STBB	include/radeon.h	/^#define AGP_CNTL__EN_2X_STBB	/;"	d
AGP_CNTL__EN_2X_STBB_MASK	include/radeon.h	/^#define AGP_CNTL__EN_2X_STBB_MASK	/;"	d
AGP_CNTL__EN_2X_STBB__SHIFT	include/radeon.h	/^#define AGP_CNTL__EN_2X_STBB__SHIFT	/;"	d
AGP_CNTL__EN_EXTENDED_AD_STB_2X	include/radeon.h	/^#define AGP_CNTL__EN_EXTENDED_AD_STB_2X	/;"	d
AGP_CNTL__EN_EXTENDED_AD_STB_2X_MASK	include/radeon.h	/^#define AGP_CNTL__EN_EXTENDED_AD_STB_2X_MASK	/;"	d
AGP_CNTL__EN_EXTENDED_AD_STB_2X__SHIFT	include/radeon.h	/^#define AGP_CNTL__EN_EXTENDED_AD_STB_2X__SHIFT	/;"	d
AGP_CNTL__EN_RBFCALM	include/radeon.h	/^#define AGP_CNTL__EN_RBFCALM	/;"	d
AGP_CNTL__EN_RBFCALM_MASK	include/radeon.h	/^#define AGP_CNTL__EN_RBFCALM_MASK	/;"	d
AGP_CNTL__EN_RBFCALM__SHIFT	include/radeon.h	/^#define AGP_CNTL__EN_RBFCALM__SHIFT	/;"	d
AGP_CNTL__EN_RDATA2X4X_MULTIRESET	include/radeon.h	/^#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET	/;"	d
AGP_CNTL__EN_RDATA2X4X_MULTIRESET_MASK	include/radeon.h	/^#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET_MASK	/;"	d
AGP_CNTL__EN_RDATA2X4X_MULTIRESET__SHIFT	include/radeon.h	/^#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET__SHIFT	/;"	d
AGP_CNTL__FORCE_EXT_VREF	include/radeon.h	/^#define AGP_CNTL__FORCE_EXT_VREF	/;"	d
AGP_CNTL__FORCE_EXT_VREF_MASK	include/radeon.h	/^#define AGP_CNTL__FORCE_EXT_VREF_MASK	/;"	d
AGP_CNTL__FORCE_EXT_VREF__SHIFT	include/radeon.h	/^#define AGP_CNTL__FORCE_EXT_VREF__SHIFT	/;"	d
AGP_CNTL__FORCE_FULL_SBA	include/radeon.h	/^#define AGP_CNTL__FORCE_FULL_SBA	/;"	d
AGP_CNTL__FORCE_FULL_SBA_MASK	include/radeon.h	/^#define AGP_CNTL__FORCE_FULL_SBA_MASK	/;"	d
AGP_CNTL__FORCE_FULL_SBA__SHIFT	include/radeon.h	/^#define AGP_CNTL__FORCE_FULL_SBA__SHIFT	/;"	d
AGP_CNTL__FORCE_INT_VREF	include/radeon.h	/^#define AGP_CNTL__FORCE_INT_VREF	/;"	d
AGP_CNTL__FORCE_INT_VREF_MASK	include/radeon.h	/^#define AGP_CNTL__FORCE_INT_VREF_MASK	/;"	d
AGP_CNTL__FORCE_INT_VREF__SHIFT	include/radeon.h	/^#define AGP_CNTL__FORCE_INT_VREF__SHIFT	/;"	d
AGP_CNTL__HOLD_RD_FIFO	include/radeon.h	/^#define AGP_CNTL__HOLD_RD_FIFO	/;"	d
AGP_CNTL__HOLD_RD_FIFO_MASK	include/radeon.h	/^#define AGP_CNTL__HOLD_RD_FIFO_MASK	/;"	d
AGP_CNTL__HOLD_RD_FIFO__SHIFT	include/radeon.h	/^#define AGP_CNTL__HOLD_RD_FIFO__SHIFT	/;"	d
AGP_CNTL__HOLD_RQ_FIFO	include/radeon.h	/^#define AGP_CNTL__HOLD_RQ_FIFO	/;"	d
AGP_CNTL__HOLD_RQ_FIFO_MASK	include/radeon.h	/^#define AGP_CNTL__HOLD_RQ_FIFO_MASK	/;"	d
AGP_CNTL__HOLD_RQ_FIFO__SHIFT	include/radeon.h	/^#define AGP_CNTL__HOLD_RQ_FIFO__SHIFT	/;"	d
AGP_CNTL__MAX_IDLE_CLK_MASK	include/radeon.h	/^#define AGP_CNTL__MAX_IDLE_CLK_MASK	/;"	d
AGP_CNTL__MAX_IDLE_CLK__SHIFT	include/radeon.h	/^#define AGP_CNTL__MAX_IDLE_CLK__SHIFT	/;"	d
AGP_CNTL__PENDING_SLOTS_SEL	include/radeon.h	/^#define AGP_CNTL__PENDING_SLOTS_SEL	/;"	d
AGP_CNTL__PENDING_SLOTS_SEL_MASK	include/radeon.h	/^#define AGP_CNTL__PENDING_SLOTS_SEL_MASK	/;"	d
AGP_CNTL__PENDING_SLOTS_SEL__SHIFT	include/radeon.h	/^#define AGP_CNTL__PENDING_SLOTS_SEL__SHIFT	/;"	d
AGP_CNTL__PENDING_SLOTS_VAL_MASK	include/radeon.h	/^#define AGP_CNTL__PENDING_SLOTS_VAL_MASK	/;"	d
AGP_CNTL__PENDING_SLOTS_VAL__SHIFT	include/radeon.h	/^#define AGP_CNTL__PENDING_SLOTS_VAL__SHIFT	/;"	d
AGP_CNTL__REG_CRIPPLE_AGP2X4X	include/radeon.h	/^#define AGP_CNTL__REG_CRIPPLE_AGP2X4X	/;"	d
AGP_CNTL__REG_CRIPPLE_AGP2X4X_MASK	include/radeon.h	/^#define AGP_CNTL__REG_CRIPPLE_AGP2X4X_MASK	/;"	d
AGP_CNTL__REG_CRIPPLE_AGP2X4X__SHIFT	include/radeon.h	/^#define AGP_CNTL__REG_CRIPPLE_AGP2X4X__SHIFT	/;"	d
AGP_CNTL__REG_CRIPPLE_AGP4X	include/radeon.h	/^#define AGP_CNTL__REG_CRIPPLE_AGP4X	/;"	d
AGP_CNTL__REG_CRIPPLE_AGP4X_MASK	include/radeon.h	/^#define AGP_CNTL__REG_CRIPPLE_AGP4X_MASK	/;"	d
AGP_CNTL__REG_CRIPPLE_AGP4X__SHIFT	include/radeon.h	/^#define AGP_CNTL__REG_CRIPPLE_AGP4X__SHIFT	/;"	d
AGP_CNTL__SBA_DIS	include/radeon.h	/^#define AGP_CNTL__SBA_DIS	/;"	d
AGP_CNTL__SBA_DIS_MASK	include/radeon.h	/^#define AGP_CNTL__SBA_DIS_MASK	/;"	d
AGP_CNTL__SBA_DIS__SHIFT	include/radeon.h	/^#define AGP_CNTL__SBA_DIS__SHIFT	/;"	d
AGP_COMMAND	include/radeon.h	/^#define AGP_COMMAND	/;"	d
AGP_PLL_CNTL	include/radeon.h	/^#define AGP_PLL_CNTL	/;"	d
AGP_STATUS	include/radeon.h	/^#define AGP_STATUS	/;"	d
AGU_ACTIVE	board/micronas/vct/scc.h	/^#define AGU_ACTIVE	/;"	d
AGU_BYPASS	board/micronas/vct/scc.h	/^#define AGU_BYPASS	/;"	d
AHB0_SRC_GTBUS_CLK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB0_SRC_GTBUS_CLK /;"	d
AHB0_SRC_GTBUS_CLK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB0_SRC_GTBUS_CLK /;"	d
AHB1_ABP1_DIV_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB1_ABP1_DIV_DEFAULT	/;"	d
AHB1_ABP1_DIV_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB1_ABP1_DIV_DEFAULT	/;"	d
AHB1_ABP1_DIV_DEFAULT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB1_ABP1_DIV_DEFAULT	/;"	d
AHB1_ABP1_DIV_DEFAULT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB1_ABP1_DIV_DEFAULT	/;"	d
AHB1_CLK_SRC_INTOSC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_INTOSC	/;"	d
AHB1_CLK_SRC_INTOSC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_INTOSC	/;"	d
AHB1_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_MASK	/;"	d
AHB1_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_MASK	/;"	d
AHB1_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_OSC24M	/;"	d
AHB1_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_OSC24M	/;"	d
AHB1_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_PLL6	/;"	d
AHB1_CLK_SRC_PLL6	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB1_CLK_SRC_PLL6	/;"	d
AHB1_PERIPH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define AHB1_PERIPH_BASE	/;"	d
AHB1_SRC_GTBUS_CLK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB1_SRC_GTBUS_CLK /;"	d
AHB1_SRC_GTBUS_CLK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB1_SRC_GTBUS_CLK /;"	d
AHB2AHB_V1_FLAG_FFACT	arch/sparc/cpu/leon3/ambapp.c	/^#define AHB2AHB_V1_FLAG_FFACT /;"	d	file:
AHB2AHB_V1_FLAG_FFACT_DIR	arch/sparc/cpu/leon3/ambapp.c	/^#define AHB2AHB_V1_FLAG_FFACT_DIR /;"	d	file:
AHB2AHB_V1_FLAG_MBUS	arch/sparc/cpu/leon3/ambapp.c	/^#define AHB2AHB_V1_FLAG_MBUS /;"	d	file:
AHB2AHB_V1_FLAG_SBUS	arch/sparc/cpu/leon3/ambapp.c	/^#define AHB2AHB_V1_FLAG_SBUS /;"	d	file:
AHB2_PERIPH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define AHB2_PERIPH_BASE	/;"	d
AHB2_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB2_SRC_OSC24M /;"	d
AHB2_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB2_SRC_OSC24M /;"	d
AHB3_PERIPH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define AHB3_PERIPH_BASE	/;"	d
AHBC_BSR4_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define AHBC_BSR4_A	/;"	d	file:
AHBC_BSR6_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define AHBC_BSR6_A	/;"	d	file:
AHBC_BSR6_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define AHBC_BSR6_D	/;"	d	file:
AHBC_CR_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define AHBC_CR_A	/;"	d	file:
AHBDMA_RACCS	include/faraday/ftpmu010.h	/^	unsigned int	AHBDMA_RACCS;	\/* 0x90 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
AHBMAX_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define AHBMAX_BASE_ADDR	/;"	d
AHBMCLKOFF	include/faraday/ftpmu010.h	/^	unsigned int	AHBMCLKOFF;	\/* 0x38 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
AHBPCI_OFFSET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define AHBPCI_OFFSET	/;"	d
AHBTZASC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define AHBTZASC_BASE_ADDR	/;"	d
AHB_BOT	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define AHB_BOT	/;"	d
AHB_BUS_CTR_INIT	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define AHB_BUS_CTR_INIT /;"	d
AHB_CFG_AHBPCI	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define AHB_CFG_AHBPCI	/;"	d
AHB_CFG_HOST	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define AHB_CFG_HOST	/;"	d
AHB_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	AHB_CLK,$/;"	e	enum:mxc_main_clock
AHB_CLK_DIST	drivers/usb/host/ehci-sunxi.c	/^#define AHB_CLK_DIST	/;"	d	file:
AHB_CLK_DIST	drivers/usb/host/ohci-sunxi.c	/^#define AHB_CLK_DIST	/;"	d	file:
AHB_CLK_ROOT	arch/arm/cpu/armv7/mx5/clock.c	/^#define AHB_CLK_ROOT /;"	d	file:
AHB_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	AHB_CLK_ROOT = 32,$/;"	e	enum:clk_root_index
AHB_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
AHB_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AHB_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
AHB_DIV_1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_DIV_1	/;"	d
AHB_DIV_1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_DIV_1	/;"	d
AHB_DIV_2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_DIV_2	/;"	d
AHB_DIV_2	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_DIV_2	/;"	d
AHB_DIV_4	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_DIV_4	/;"	d
AHB_DIV_4	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_DIV_4	/;"	d
AHB_DIV_8	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_DIV_8	/;"	d
AHB_DIV_8	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_DIV_8	/;"	d
AHB_DIV_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define AHB_DIV_MAX /;"	d	file:
AHB_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_DIV_SHIFT	/;"	d
AHB_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_DIV_SHIFT	/;"	d
AHB_DIV_TO_4	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define AHB_DIV_TO_4(/;"	d	file:
AHB_DMA_BRST_DFLT	drivers/block/sata_dwc.c	/^#define AHB_DMA_BRST_DFLT	/;"	d	file:
AHB_ERROR	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define AHB_ERROR	/;"	d
AHB_GATE_OFFSET_ACE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_ACE	/;"	d
AHB_GATE_OFFSET_ACE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_ACE	/;"	d
AHB_GATE_OFFSET_BIST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_BIST	/;"	d
AHB_GATE_OFFSET_BIST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_BIST	/;"	d
AHB_GATE_OFFSET_DE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DE	/;"	d
AHB_GATE_OFFSET_DE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DE	/;"	d
AHB_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DE_BE0	/;"	d
AHB_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DE_BE0	/;"	d
AHB_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DE_BE0	/;"	d
AHB_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DE_BE0	/;"	d
AHB_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DE_BE0	/;"	d
AHB_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DE_BE0	/;"	d
AHB_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DE_FE0	/;"	d
AHB_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DE_FE0	/;"	d
AHB_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DE_FE0	/;"	d
AHB_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DE_FE0	/;"	d
AHB_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DE_FE0	/;"	d
AHB_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DE_FE0	/;"	d
AHB_GATE_OFFSET_DLL	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DLL	/;"	d
AHB_GATE_OFFSET_DLL	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DLL	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DMA	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB_GATE_OFFSET_DMA	/;"	d
AHB_GATE_OFFSET_DRC0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DRC0	/;"	d
AHB_GATE_OFFSET_DRC0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DRC0	/;"	d
AHB_GATE_OFFSET_DRC0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_DRC0	/;"	d
AHB_GATE_OFFSET_DRC0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_DRC0	/;"	d
AHB_GATE_OFFSET_EMAC	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_EMAC	/;"	d
AHB_GATE_OFFSET_EMAC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_EMAC	/;"	d
AHB_GATE_OFFSET_EMAC	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_EMAC	/;"	d
AHB_GATE_OFFSET_EMAC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_EMAC	/;"	d
AHB_GATE_OFFSET_EPHY	drivers/net/sun8i_emac.c	/^#define AHB_GATE_OFFSET_EPHY	/;"	d	file:
AHB_GATE_OFFSET_GMAC	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_GMAC	/;"	d
AHB_GATE_OFFSET_GMAC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_GMAC	/;"	d
AHB_GATE_OFFSET_GMAC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_GMAC	/;"	d
AHB_GATE_OFFSET_GMAC	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_GMAC	/;"	d
AHB_GATE_OFFSET_GMAC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_GMAC	/;"	d
AHB_GATE_OFFSET_GMAC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_GMAC	/;"	d
AHB_GATE_OFFSET_GPS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_GPS	/;"	d
AHB_GATE_OFFSET_GPS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_GPS	/;"	d
AHB_GATE_OFFSET_HDMI	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_HDMI	/;"	d
AHB_GATE_OFFSET_HDMI	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_HDMI	/;"	d
AHB_GATE_OFFSET_HDMI	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_HDMI	/;"	d
AHB_GATE_OFFSET_HDMI	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_HDMI	/;"	d
AHB_GATE_OFFSET_HDMI	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_HDMI	/;"	d
AHB_GATE_OFFSET_HDMI	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_HDMI	/;"	d
AHB_GATE_OFFSET_HSTIMER	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_HSTIMER	/;"	d
AHB_GATE_OFFSET_HSTIMER	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_HSTIMER	/;"	d
AHB_GATE_OFFSET_LCD0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_LCD0	/;"	d
AHB_GATE_OFFSET_LCD0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_LCD0	/;"	d
AHB_GATE_OFFSET_LCD0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_LCD0	/;"	d
AHB_GATE_OFFSET_LCD0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_LCD0	/;"	d
AHB_GATE_OFFSET_LCD0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_LCD0	/;"	d
AHB_GATE_OFFSET_LCD0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_LCD0	/;"	d
AHB_GATE_OFFSET_LCD1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_LCD1	/;"	d
AHB_GATE_OFFSET_LCD1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_LCD1	/;"	d
AHB_GATE_OFFSET_LCD1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_LCD1	/;"	d
AHB_GATE_OFFSET_LCD1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_LCD1	/;"	d
AHB_GATE_OFFSET_LCD1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_LCD1	/;"	d
AHB_GATE_OFFSET_LCD1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_LCD1	/;"	d
AHB_GATE_OFFSET_MCTL	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MCTL	/;"	d
AHB_GATE_OFFSET_MCTL	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_MCTL	/;"	d
AHB_GATE_OFFSET_MCTL	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB_GATE_OFFSET_MCTL	/;"	d
AHB_GATE_OFFSET_MCTL	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MCTL	/;"	d
AHB_GATE_OFFSET_MCTL	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_MCTL	/;"	d
AHB_GATE_OFFSET_MCTL	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB_GATE_OFFSET_MCTL	/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB_GATE_OFFSET_MMC(/;"	d
AHB_GATE_OFFSET_MMC0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC0	/;"	d
AHB_GATE_OFFSET_MMC0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC0	/;"	d
AHB_GATE_OFFSET_MMC0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_MMC0	/;"	d
AHB_GATE_OFFSET_MMC0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC0	/;"	d
AHB_GATE_OFFSET_MMC0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC0	/;"	d
AHB_GATE_OFFSET_MMC0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_MMC0	/;"	d
AHB_GATE_OFFSET_MMC1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC1	/;"	d
AHB_GATE_OFFSET_MMC1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC1	/;"	d
AHB_GATE_OFFSET_MMC1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC1	/;"	d
AHB_GATE_OFFSET_MMC1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC1	/;"	d
AHB_GATE_OFFSET_MMC2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC2	/;"	d
AHB_GATE_OFFSET_MMC2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC2	/;"	d
AHB_GATE_OFFSET_MMC2	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC2	/;"	d
AHB_GATE_OFFSET_MMC2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC2	/;"	d
AHB_GATE_OFFSET_MMC3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC3	/;"	d
AHB_GATE_OFFSET_MMC3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC3	/;"	d
AHB_GATE_OFFSET_MMC3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MMC3	/;"	d
AHB_GATE_OFFSET_MMC3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_MMC3	/;"	d
AHB_GATE_OFFSET_MS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MS	/;"	d
AHB_GATE_OFFSET_MS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_MS	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND0	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB_GATE_OFFSET_NAND0	/;"	d
AHB_GATE_OFFSET_NAND1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_NAND1	/;"	d
AHB_GATE_OFFSET_NAND1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_NAND1	/;"	d
AHB_GATE_OFFSET_PATA	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_PATA	/;"	d
AHB_GATE_OFFSET_PATA	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_PATA	/;"	d
AHB_GATE_OFFSET_SATA	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SATA	/;"	d
AHB_GATE_OFFSET_SATA	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SATA	/;"	d
AHB_GATE_OFFSET_SDRAM	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SDRAM	/;"	d
AHB_GATE_OFFSET_SDRAM	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SDRAM	/;"	d
AHB_GATE_OFFSET_SPI0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI0	/;"	d
AHB_GATE_OFFSET_SPI0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_SPI0	/;"	d
AHB_GATE_OFFSET_SPI0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI0	/;"	d
AHB_GATE_OFFSET_SPI0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_SPI0	/;"	d
AHB_GATE_OFFSET_SPI0	drivers/mtd/spi/sunxi_spi_spl.c	/^#define AHB_GATE_OFFSET_SPI0 /;"	d	file:
AHB_GATE_OFFSET_SPI1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI1	/;"	d
AHB_GATE_OFFSET_SPI1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_SPI1	/;"	d
AHB_GATE_OFFSET_SPI1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI1	/;"	d
AHB_GATE_OFFSET_SPI1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_SPI1	/;"	d
AHB_GATE_OFFSET_SPI2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI2	/;"	d
AHB_GATE_OFFSET_SPI2	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI2	/;"	d
AHB_GATE_OFFSET_SPI3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI3	/;"	d
AHB_GATE_OFFSET_SPI3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SPI3	/;"	d
AHB_GATE_OFFSET_SS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SS	/;"	d
AHB_GATE_OFFSET_SS	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_SS	/;"	d
AHB_GATE_OFFSET_SS	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_SS	/;"	d
AHB_GATE_OFFSET_SS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_SS	/;"	d
AHB_GATE_OFFSET_SS	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_SS	/;"	d
AHB_GATE_OFFSET_SS	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_SS	/;"	d
AHB_GATE_OFFSET_TCON0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_TCON0	/;"	d
AHB_GATE_OFFSET_TCON0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_TCON0	/;"	d
AHB_GATE_OFFSET_TCON1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_TCON1	/;"	d
AHB_GATE_OFFSET_TCON1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_TCON1	/;"	d
AHB_GATE_OFFSET_TS0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_TS0	/;"	d
AHB_GATE_OFFSET_TS0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_TS0	/;"	d
AHB_GATE_OFFSET_TVE0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_TVE0	/;"	d
AHB_GATE_OFFSET_TVE0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_TVE0	/;"	d
AHB_GATE_OFFSET_TVE1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_TVE1	/;"	d
AHB_GATE_OFFSET_TVE1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_TVE1	/;"	d
AHB_GATE_OFFSET_USB0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB0	/;"	d
AHB_GATE_OFFSET_USB0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB0	/;"	d
AHB_GATE_OFFSET_USB0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB0	/;"	d
AHB_GATE_OFFSET_USB0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB0	/;"	d
AHB_GATE_OFFSET_USB0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB0	/;"	d
AHB_GATE_OFFSET_USB0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB0	/;"	d
AHB_GATE_OFFSET_USB_EHCI0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_EHCI0	/;"	d
AHB_GATE_OFFSET_USB_EHCI0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_EHCI0	/;"	d
AHB_GATE_OFFSET_USB_EHCI0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_EHCI0	/;"	d
AHB_GATE_OFFSET_USB_EHCI0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_EHCI0	/;"	d
AHB_GATE_OFFSET_USB_EHCI0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_EHCI0	/;"	d
AHB_GATE_OFFSET_USB_EHCI0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_EHCI0	/;"	d
AHB_GATE_OFFSET_USB_EHCI1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_EHCI1	/;"	d
AHB_GATE_OFFSET_USB_EHCI1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_EHCI1	/;"	d
AHB_GATE_OFFSET_USB_EHCI1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_EHCI1	/;"	d
AHB_GATE_OFFSET_USB_EHCI1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_EHCI1	/;"	d
AHB_GATE_OFFSET_USB_EHCI1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_EHCI1	/;"	d
AHB_GATE_OFFSET_USB_EHCI1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_EHCI1	/;"	d
AHB_GATE_OFFSET_USB_EHCI2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_EHCI2	/;"	d
AHB_GATE_OFFSET_USB_EHCI2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_EHCI2	/;"	d
AHB_GATE_OFFSET_USB_OHCI0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_OHCI0	/;"	d
AHB_GATE_OFFSET_USB_OHCI0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_OHCI0	/;"	d
AHB_GATE_OFFSET_USB_OHCI0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_OHCI0	/;"	d
AHB_GATE_OFFSET_USB_OHCI0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_OHCI0	/;"	d
AHB_GATE_OFFSET_USB_OHCI0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_OHCI0	/;"	d
AHB_GATE_OFFSET_USB_OHCI0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_OHCI0	/;"	d
AHB_GATE_OFFSET_USB_OHCI1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_OHCI1	/;"	d
AHB_GATE_OFFSET_USB_OHCI1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_OHCI1	/;"	d
AHB_GATE_OFFSET_USB_OHCI1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_OHCI1	/;"	d
AHB_GATE_OFFSET_USB_OHCI1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AHB_GATE_OFFSET_USB_OHCI1	/;"	d
AHB_GATE_OFFSET_USB_OHCI1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_GATE_OFFSET_USB_OHCI1	/;"	d
AHB_GATE_OFFSET_USB_OHCI1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_GATE_OFFSET_USB_OHCI1	/;"	d
AHB_MASTER_IDLE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define AHB_MASTER_IDLE	/;"	d
AHB_PSC_1	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_1	/;"	d	file:
AHB_PSC_1	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_1	/;"	d	file:
AHB_PSC_1	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_1	/;"	d	file:
AHB_PSC_128	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_128	/;"	d	file:
AHB_PSC_128	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_128	/;"	d	file:
AHB_PSC_128	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_128	/;"	d	file:
AHB_PSC_16	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_16	/;"	d	file:
AHB_PSC_16	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_16	/;"	d	file:
AHB_PSC_16	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_16	/;"	d	file:
AHB_PSC_2	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_2	/;"	d	file:
AHB_PSC_2	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_2	/;"	d	file:
AHB_PSC_2	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_2	/;"	d	file:
AHB_PSC_256	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_256	/;"	d	file:
AHB_PSC_256	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_256	/;"	d	file:
AHB_PSC_256	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_256	/;"	d	file:
AHB_PSC_4	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_4	/;"	d	file:
AHB_PSC_4	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_4	/;"	d	file:
AHB_PSC_4	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_4	/;"	d	file:
AHB_PSC_512	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_512	/;"	d	file:
AHB_PSC_512	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_512	/;"	d	file:
AHB_PSC_512	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_512	/;"	d	file:
AHB_PSC_64	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_64	/;"	d	file:
AHB_PSC_64	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_64	/;"	d	file:
AHB_PSC_64	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_64	/;"	d	file:
AHB_PSC_8	arch/arm/mach-stm32/stm32f1/clock.c	/^#define AHB_PSC_8	/;"	d	file:
AHB_PSC_8	arch/arm/mach-stm32/stm32f4/clock.c	/^#define AHB_PSC_8	/;"	d	file:
AHB_PSC_8	arch/arm/mach-stm32/stm32f7/clock.c	/^#define AHB_PSC_8	/;"	d	file:
AHB_RESET_OFFSET_DE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DE	/;"	d
AHB_RESET_OFFSET_DE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DE	/;"	d
AHB_RESET_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DE_BE0	/;"	d
AHB_RESET_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_DE_BE0	/;"	d
AHB_RESET_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DE_BE0	/;"	d
AHB_RESET_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_DE_BE0	/;"	d
AHB_RESET_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DE_FE0	/;"	d
AHB_RESET_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_DE_FE0	/;"	d
AHB_RESET_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DE_FE0	/;"	d
AHB_RESET_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_DE_FE0	/;"	d
AHB_RESET_OFFSET_DRC0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DRC0	/;"	d
AHB_RESET_OFFSET_DRC0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_DRC0	/;"	d
AHB_RESET_OFFSET_DRC0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_DRC0	/;"	d
AHB_RESET_OFFSET_DRC0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_DRC0	/;"	d
AHB_RESET_OFFSET_EPHY	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_EPHY	/;"	d
AHB_RESET_OFFSET_EPHY	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_EPHY	/;"	d
AHB_RESET_OFFSET_GMAC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_GMAC	/;"	d
AHB_RESET_OFFSET_GMAC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_GMAC	/;"	d
AHB_RESET_OFFSET_GMAC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_GMAC	/;"	d
AHB_RESET_OFFSET_GMAC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_GMAC	/;"	d
AHB_RESET_OFFSET_HDMI	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_HDMI	/;"	d
AHB_RESET_OFFSET_HDMI	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_HDMI	/;"	d
AHB_RESET_OFFSET_HDMI	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_HDMI	/;"	d
AHB_RESET_OFFSET_HDMI	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_HDMI	/;"	d
AHB_RESET_OFFSET_HDMI2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_HDMI2	/;"	d
AHB_RESET_OFFSET_HDMI2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_HDMI2	/;"	d
AHB_RESET_OFFSET_LCD0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_LCD0	/;"	d
AHB_RESET_OFFSET_LCD0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_LCD0	/;"	d
AHB_RESET_OFFSET_LCD0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_LCD0	/;"	d
AHB_RESET_OFFSET_LCD0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_LCD0	/;"	d
AHB_RESET_OFFSET_LCD1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_LCD1	/;"	d
AHB_RESET_OFFSET_LCD1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_LCD1	/;"	d
AHB_RESET_OFFSET_LCD1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_LCD1	/;"	d
AHB_RESET_OFFSET_LCD1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_LCD1	/;"	d
AHB_RESET_OFFSET_LVDS	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_LVDS	/;"	d
AHB_RESET_OFFSET_LVDS	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_LVDS	/;"	d
AHB_RESET_OFFSET_LVDS	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_LVDS	/;"	d
AHB_RESET_OFFSET_LVDS	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_LVDS	/;"	d
AHB_RESET_OFFSET_MCTL	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MCTL	/;"	d
AHB_RESET_OFFSET_MCTL	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MCTL	/;"	d
AHB_RESET_OFFSET_MCTL	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB_RESET_OFFSET_MCTL	/;"	d
AHB_RESET_OFFSET_MCTL	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MCTL	/;"	d
AHB_RESET_OFFSET_MCTL	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MCTL	/;"	d
AHB_RESET_OFFSET_MCTL	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB_RESET_OFFSET_MCTL	/;"	d
AHB_RESET_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC(/;"	d
AHB_RESET_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC(/;"	d
AHB_RESET_OFFSET_MMC	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHB_RESET_OFFSET_MMC(/;"	d
AHB_RESET_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC(/;"	d
AHB_RESET_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC(/;"	d
AHB_RESET_OFFSET_MMC	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHB_RESET_OFFSET_MMC(/;"	d
AHB_RESET_OFFSET_MMC0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC0	/;"	d
AHB_RESET_OFFSET_MMC0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC0	/;"	d
AHB_RESET_OFFSET_MMC0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC0	/;"	d
AHB_RESET_OFFSET_MMC0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC0	/;"	d
AHB_RESET_OFFSET_MMC1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC1	/;"	d
AHB_RESET_OFFSET_MMC1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC1	/;"	d
AHB_RESET_OFFSET_MMC1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC1	/;"	d
AHB_RESET_OFFSET_MMC1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC1	/;"	d
AHB_RESET_OFFSET_MMC2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC2	/;"	d
AHB_RESET_OFFSET_MMC2	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC2	/;"	d
AHB_RESET_OFFSET_MMC2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC2	/;"	d
AHB_RESET_OFFSET_MMC2	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC2	/;"	d
AHB_RESET_OFFSET_MMC3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC3	/;"	d
AHB_RESET_OFFSET_MMC3	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC3	/;"	d
AHB_RESET_OFFSET_MMC3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_MMC3	/;"	d
AHB_RESET_OFFSET_MMC3	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_MMC3	/;"	d
AHB_RESET_OFFSET_SAT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_SAT	/;"	d
AHB_RESET_OFFSET_SAT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_SAT	/;"	d
AHB_RESET_OFFSET_SAT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_SAT	/;"	d
AHB_RESET_OFFSET_SAT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_SAT	/;"	d
AHB_RESET_OFFSET_SS	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_SS	/;"	d
AHB_RESET_OFFSET_SS	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_SS	/;"	d
AHB_RESET_OFFSET_SS	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_SS	/;"	d
AHB_RESET_OFFSET_SS	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AHB_RESET_OFFSET_SS	/;"	d
AHB_RESET_OFFSET_TCON0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_TCON0	/;"	d
AHB_RESET_OFFSET_TCON0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_TCON0	/;"	d
AHB_RESET_OFFSET_TCON1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AHB_RESET_OFFSET_TCON1	/;"	d
AHB_RESET_OFFSET_TCON1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AHB_RESET_OFFSET_TCON1	/;"	d
AHB_RESET_SPI0_SHIFT	drivers/mtd/spi/sunxi_spi_spl.c	/^#define AHB_RESET_SPI0_SHIFT /;"	d	file:
AHB_TOP	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define AHB_TOP	/;"	d
AHBx_CLK_DIV_RATIO	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHBx_CLK_DIV_RATIO(/;"	d
AHBx_CLK_DIV_RATIO	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHBx_CLK_DIV_RATIO(/;"	d
AHBx_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHBx_SRC_CLK_SELECT_SHIFT /;"	d
AHBx_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHBx_SRC_CLK_SELECT_SHIFT /;"	d
AHBx_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHBx_SRC_MASK /;"	d
AHBx_SRC_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHBx_SRC_MASK /;"	d
AHBx_SRC_PLL_PERIPH0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHBx_SRC_PLL_PERIPH0 /;"	d
AHBx_SRC_PLL_PERIPH0	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHBx_SRC_PLL_PERIPH0 /;"	d
AHBx_SRC_PLL_PERIPH1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define AHBx_SRC_PLL_PERIPH1 /;"	d
AHBx_SRC_PLL_PERIPH1	arch/arm/include/asm/arch/clock_sun9i.h	/^#define AHBx_SRC_PLL_PERIPH1 /;"	d
AHCI	arch/x86/Kconfig	/^config AHCI$/;"	c	menu:x86 architecture
AHCI	drivers/block/Kconfig	/^config AHCI$/;"	c
AHCI_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define AHCI_BASE	/;"	d
AHCI_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define AHCI_BASE_ADDR	/;"	d
AHCI_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define AHCI_BASE_ADDR	/;"	d
AHCI_BASE_ADDR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define AHCI_BASE_ADDR1	/;"	d
AHCI_BASE_ADDR2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define AHCI_BASE_ADDR2	/;"	d
AHCI_CMD_ATAPI	include/ahci.h	/^#define AHCI_CMD_ATAPI	/;"	d
AHCI_CMD_CLR_BUSY	include/ahci.h	/^#define AHCI_CMD_CLR_BUSY	/;"	d
AHCI_CMD_PREFETCH	include/ahci.h	/^#define AHCI_CMD_PREFETCH	/;"	d
AHCI_CMD_RESET	include/ahci.h	/^#define AHCI_CMD_RESET	/;"	d
AHCI_CMD_SLOT_SZ	include/ahci.h	/^#define AHCI_CMD_SLOT_SZ	/;"	d
AHCI_CMD_TBL_CDB	include/ahci.h	/^#define AHCI_CMD_TBL_CDB	/;"	d
AHCI_CMD_TBL_HDR	include/ahci.h	/^#define AHCI_CMD_TBL_HDR	/;"	d
AHCI_CMD_TBL_SZ	include/ahci.h	/^#define AHCI_CMD_TBL_SZ	/;"	d
AHCI_CMD_WRITE	include/ahci.h	/^#define AHCI_CMD_WRITE	/;"	d
AHCI_GET_CMD_SLOT	drivers/block/dwc_ahsata.c	/^#define AHCI_GET_CMD_SLOT(/;"	d	file:
AHCI_MAX_CMD_SLOT	include/ahci.h	/^#define AHCI_MAX_CMD_SLOT	/;"	d
AHCI_MAX_PORTS	include/ahci.h	/^#define AHCI_MAX_PORTS	/;"	d
AHCI_MAX_SG	include/ahci.h	/^#define AHCI_MAX_SG	/;"	d
AHCI_PCI_BAR	include/ahci.h	/^#define AHCI_PCI_BAR	/;"	d
AHCI_PHYCS0R	board/sunxi/ahci.c	/^#define AHCI_PHYCS0R /;"	d	file:
AHCI_PHYCS1R	board/sunxi/ahci.c	/^#define AHCI_PHYCS1R /;"	d	file:
AHCI_PHYCS2R	board/sunxi/ahci.c	/^#define AHCI_PHYCS2R /;"	d	file:
AHCI_PORT_AXICC_CFG	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define AHCI_PORT_AXICC_CFG	/;"	d
AHCI_PORT_PHY_1_CFG	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define AHCI_PORT_PHY_1_CFG	/;"	d	file:
AHCI_PORT_PHY_1_CFG	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define AHCI_PORT_PHY_1_CFG /;"	d
AHCI_PORT_PHY_2_CFG	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define AHCI_PORT_PHY_2_CFG	/;"	d	file:
AHCI_PORT_PHY_3_CFG	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define AHCI_PORT_PHY_3_CFG	/;"	d	file:
AHCI_PORT_PHY_4_CFG	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define AHCI_PORT_PHY_4_CFG	/;"	d	file:
AHCI_PORT_PHY_5_CFG	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define AHCI_PORT_PHY_5_CFG	/;"	d	file:
AHCI_PORT_PRIV_DMA_SZ	include/ahci.h	/^#define AHCI_PORT_PRIV_DMA_SZ	/;"	d
AHCI_PORT_TRANS_CFG	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define AHCI_PORT_TRANS_CFG	/;"	d	file:
AHCI_PORT_TRANS_CFG	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define AHCI_PORT_TRANS_CFG /;"	d
AHCI_RWCR	board/sunxi/ahci.c	/^#define AHCI_RWCR /;"	d	file:
AHCI_RX_FIS_SZ	include/ahci.h	/^#define AHCI_RX_FIS_SZ	/;"	d
AHCI_VENDOR_SPECIFIC_0_ADDR	arch/arm/mach-mvebu/cpu.c	/^#define AHCI_VENDOR_SPECIFIC_0_ADDR	/;"	d	file:
AHCI_VENDOR_SPECIFIC_0_DATA	arch/arm/mach-mvebu/cpu.c	/^#define AHCI_VENDOR_SPECIFIC_0_DATA	/;"	d	file:
AHCI_VEND_PAXIC	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PAXIC /;"	d	file:
AHCI_VEND_PCFG	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PCFG /;"	d	file:
AHCI_VEND_PP2C	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PP2C /;"	d	file:
AHCI_VEND_PP3C	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PP3C /;"	d	file:
AHCI_VEND_PP4C	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PP4C /;"	d	file:
AHCI_VEND_PP5C	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PP5C /;"	d	file:
AHCI_VEND_PPCFG	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PPCFG /;"	d	file:
AHCI_VEND_PTC	drivers/block/sata_ceva.c	/^#define AHCI_VEND_PTC /;"	d	file:
AHCI_WINDOW_BASE	arch/arm/mach-mvebu/cpu.c	/^#define AHCI_WINDOW_BASE(/;"	d	file:
AHCI_WINDOW_CTRL	arch/arm/mach-mvebu/cpu.c	/^#define AHCI_WINDOW_CTRL(/;"	d	file:
AHCI_WINDOW_SIZE	arch/arm/mach-mvebu/cpu.c	/^#define AHCI_WINDOW_SIZE(/;"	d	file:
AH_ESP_V4_FLOW	include/linux/ethtool.h	/^#define	AH_ESP_V4_FLOW	/;"	d
AH_ESP_V6_FLOW	include/linux/ethtool.h	/^#define	AH_ESP_V6_FLOW	/;"	d
AH_V4_FLOW	include/linux/ethtool.h	/^#define	AH_V4_FLOW	/;"	d
AH_V6_FLOW	include/linux/ethtool.h	/^#define	AH_V6_FLOW	/;"	d
AICSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define AICSR	/;"	d
AIC_CTRL	include/radeon.h	/^#define AIC_CTRL	/;"	d
AIC_HI_ADDR	include/radeon.h	/^#define AIC_HI_ADDR	/;"	d
AIC_LO_ADDR	include/radeon.h	/^#define AIC_LO_ADDR	/;"	d
AIC_PT_BASE	include/radeon.h	/^#define AIC_PT_BASE	/;"	d
AIC_STAT	include/radeon.h	/^#define AIC_STAT	/;"	d
AIC_TLB_ADDR	include/radeon.h	/^#define AIC_TLB_ADDR	/;"	d
AIC_TLB_DATA	include/radeon.h	/^#define AIC_TLB_DATA	/;"	d
AIF1	drivers/sound/max98095.h	/^	AIF1 = 1,$/;"	e	enum:en_max_audio_interface
AIF2	drivers/sound/max98095.h	/^	AIF2,$/;"	e	enum:en_max_audio_interface
AIP	include/sym53c8xx.h	/^  #define   AIP /;"	d
AIPI1_PSR0_VAL	include/configs/imx27lite-common.h	/^#define AIPI1_PSR0_VAL	/;"	d
AIPI1_PSR1_VAL	include/configs/imx27lite-common.h	/^#define AIPI1_PSR1_VAL	/;"	d
AIPI2_PSR0_VAL	include/configs/imx27lite-common.h	/^#define AIPI2_PSR0_VAL	/;"	d
AIPI2_PSR1_VAL	include/configs/imx27lite-common.h	/^#define AIPI2_PSR1_VAL	/;"	d
AIPS0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define AIPS0_BASE_ADDR /;"	d
AIPS0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define AIPS0_BASE_ADDR	/;"	d
AIPS1_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS1_ARB_BASE_ADDR /;"	d
AIPS1_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS1_ARB_BASE_ADDR /;"	d
AIPS1_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS1_ARB_END_ADDR /;"	d
AIPS1_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS1_ARB_END_ADDR /;"	d
AIPS1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AIPS1_BASE_ADDR /;"	d
AIPS1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define AIPS1_BASE_ADDR /;"	d
AIPS1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS1_BASE_ADDR /;"	d
AIPS1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS1_BASE_ADDR	/;"	d
AIPS1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define AIPS1_BASE_ADDR /;"	d
AIPS1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define AIPS1_BASE_ADDR	/;"	d
AIPS1_CTRL_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AIPS1_CTRL_BASE_ADDR /;"	d
AIPS1_OFF_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS1_OFF_BASE_ADDR /;"	d
AIPS1_OFF_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS1_OFF_BASE_ADDR /;"	d
AIPS1_ON_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS1_ON_BASE_ADDR /;"	d
AIPS1_ON_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS1_ON_BASE_ADDR /;"	d
AIPS2_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS2_ARB_BASE_ADDR /;"	d
AIPS2_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS2_ARB_BASE_ADDR /;"	d
AIPS2_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS2_ARB_END_ADDR /;"	d
AIPS2_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS2_ARB_END_ADDR /;"	d
AIPS2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AIPS2_BASE_ADDR /;"	d
AIPS2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define AIPS2_BASE_ADDR /;"	d
AIPS2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS2_BASE_ADDR /;"	d
AIPS2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS2_BASE_ADDR	/;"	d
AIPS2_CTRL_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AIPS2_CTRL_BASE_ADDR /;"	d
AIPS2_OFF_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS2_OFF_BASE_ADDR /;"	d
AIPS2_OFF_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS2_OFF_BASE_ADDR /;"	d
AIPS2_ON_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS2_ON_BASE_ADDR /;"	d
AIPS2_ON_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS2_ON_BASE_ADDR /;"	d
AIPS3_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS3_ARB_BASE_ADDR /;"	d
AIPS3_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS3_ARB_BASE_ADDR /;"	d
AIPS3_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS3_ARB_END_ADDR /;"	d
AIPS3_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS3_ARB_END_ADDR /;"	d
AIPS3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS3_BASE_ADDR /;"	d
AIPS3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS3_BASE_ADDR	/;"	d
AIPS3_CONFIG_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS3_CONFIG_BASE_ADDR /;"	d
AIPS3_OFF_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS3_OFF_BASE_ADDR /;"	d
AIPS3_OFF_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS3_OFF_BASE_ADDR /;"	d
AIPS3_ON_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AIPS3_ON_BASE_ADDR /;"	d
AIPS3_ON_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS3_ON_BASE_ADDR /;"	d
AIPS_TZ1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS_TZ1_BASE_ADDR /;"	d
AIPS_TZ2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS_TZ2_BASE_ADDR /;"	d
AIPS_TZ3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define AIPS_TZ3_BASE_ADDR /;"	d
AIS_CMD_BOOTTBL	tools/aisimage.h	/^	AIS_CMD_BOOTTBL	= 0x58535907,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_DISCRC	tools/aisimage.h	/^	AIS_CMD_DISCRC	= 0x58535904,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_ENCRC	tools/aisimage.h	/^	AIS_CMD_ENCRC	= 0x58535903,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_FILL	tools/aisimage.h	/^	AIS_CMD_FILL	= 0x5853590A,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_FNLOAD	tools/aisimage.h	/^	AIS_CMD_FNLOAD	= 0x5853590D,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_JMP	tools/aisimage.h	/^	AIS_CMD_JMP	= 0x58535905,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_JMPCLOSE	tools/aisimage.h	/^	AIS_CMD_JMPCLOSE = 0x58535906,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_LOAD	tools/aisimage.h	/^	AIS_CMD_LOAD	= 0x58535901,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_SEQREAD	tools/aisimage.h	/^	AIS_CMD_SEQREAD	= 0x58535963,$/;"	e	enum:__anonc0bb1ffb0103
AIS_CMD_VALCRC	tools/aisimage.h	/^	AIS_CMD_VALCRC	= 0x58535902,$/;"	e	enum:__anonc0bb1ffb0103
AIS_FCN_MAX	tools/aisimage.h	/^#define AIS_FCN_MAX	/;"	d
AIS_MAGIC_WORD	tools/aisimage.h	/^#define AIS_MAGIC_WORD	/;"	d
AIS_cmd	tools/aisimage.c	/^	uint32_t AIS_cmd;$/;"	m	struct:cmd_table_t	typeref:typename:uint32_t	file:
AK	include/i8042.h	/^#define AK	/;"	d
ALARM	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	ALARM	/;"	d
ALDPS_PROXY_MODE	drivers/usb/eth/r8152.h	/^#define ALDPS_PROXY_MODE	/;"	d
ALDPS_SPDWN_RATIO	drivers/usb/eth/r8152.h	/^#define ALDPS_SPDWN_RATIO	/;"	d
ALE_ACTIVELEVEL_HIGH	board/micronas/vct/ebi.h	/^#define ALE_ACTIVELEVEL_HIGH	/;"	d
ALE_BLOCKED	drivers/net/cpsw.c	/^#define ALE_BLOCKED	/;"	d	file:
ALE_CONTROL	drivers/net/cpsw.c	/^#define ALE_CONTROL	/;"	d	file:
ALE_ENTRY_BITS	drivers/net/cpsw.c	/^#define ALE_ENTRY_BITS	/;"	d	file:
ALE_ENTRY_WORDS	drivers/net/cpsw.c	/^#define ALE_ENTRY_WORDS	/;"	d	file:
ALE_MCAST_BLOCK_LEARN_FWD	drivers/net/cpsw.c	/^#define ALE_MCAST_BLOCK_LEARN_FWD	/;"	d	file:
ALE_MCAST_FWD	drivers/net/cpsw.c	/^#define ALE_MCAST_FWD	/;"	d	file:
ALE_MCAST_FWD_2	drivers/net/cpsw.c	/^#define ALE_MCAST_FWD_2	/;"	d	file:
ALE_MCAST_FWD_LEARN	drivers/net/cpsw.c	/^#define ALE_MCAST_FWD_LEARN	/;"	d	file:
ALE_PORTCTL	drivers/net/cpsw.c	/^#define ALE_PORTCTL	/;"	d	file:
ALE_PORT_STATE_BLOCK	drivers/net/cpsw.c	/^	ALE_PORT_STATE_BLOCK	= 0x01,$/;"	e	enum:cpsw_ale_port_state	file:
ALE_PORT_STATE_DISABLE	drivers/net/cpsw.c	/^	ALE_PORT_STATE_DISABLE	= 0x00,$/;"	e	enum:cpsw_ale_port_state	file:
ALE_PORT_STATE_FORWARD	drivers/net/cpsw.c	/^	ALE_PORT_STATE_FORWARD	= 0x03,$/;"	e	enum:cpsw_ale_port_state	file:
ALE_PORT_STATE_LEARN	drivers/net/cpsw.c	/^	ALE_PORT_STATE_LEARN	= 0x02,$/;"	e	enum:cpsw_ale_port_state	file:
ALE_SECURE	drivers/net/cpsw.c	/^#define ALE_SECURE	/;"	d	file:
ALE_TABLE	drivers/net/cpsw.c	/^#define ALE_TABLE	/;"	d	file:
ALE_TABLE_CONTROL	drivers/net/cpsw.c	/^#define ALE_TABLE_CONTROL	/;"	d	file:
ALE_TABLE_WRITE	drivers/net/cpsw.c	/^#define ALE_TABLE_WRITE	/;"	d	file:
ALE_TYPE_ADDR	drivers/net/cpsw.c	/^#define ALE_TYPE_ADDR	/;"	d	file:
ALE_TYPE_FREE	drivers/net/cpsw.c	/^#define ALE_TYPE_FREE	/;"	d	file:
ALE_TYPE_VLAN	drivers/net/cpsw.c	/^#define ALE_TYPE_VLAN	/;"	d	file:
ALE_TYPE_VLAN_ADDR	drivers/net/cpsw.c	/^#define ALE_TYPE_VLAN_ADDR	/;"	d	file:
ALE_UCAST_OUI	drivers/net/cpsw.c	/^#define ALE_UCAST_OUI	/;"	d	file:
ALE_UCAST_PERSISTANT	drivers/net/cpsw.c	/^#define ALE_UCAST_PERSISTANT	/;"	d	file:
ALE_UCAST_TOUCHED	drivers/net/cpsw.c	/^#define ALE_UCAST_TOUCHED	/;"	d	file:
ALE_UCAST_UNTOUCHED	drivers/net/cpsw.c	/^#define ALE_UCAST_UNTOUCHED	/;"	d	file:
ALE_UNKNOWNVLAN	drivers/net/cpsw.c	/^#define ALE_UNKNOWNVLAN	/;"	d	file:
ALGN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define ALGN	/;"	d
ALGN_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define ALGN_P	/;"	d
ALGO_TYPE_DYNAMIC	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	ALGO_TYPE_DYNAMIC,$/;"	e	enum:hws_algo_type
ALGO_TYPE_STATIC	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	ALGO_TYPE_STATIC$/;"	e	enum:hws_algo_type
ALIGN	include/linux/kernel.h	/^#define ALIGN(/;"	d
ALIGN	tools/mksunxiboot.c	/^#define ALIGN(/;"	d	file:
ALIGN_END_ADDR	drivers/usb/host/ehci-hcd.c	/^#define ALIGN_END_ADDR(/;"	d	file:
ALIGN_ERROR_SHIFT	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^#define ALIGN_ERROR_SHIFT	/;"	d	file:
ALIGN_LMA	arch/xtensa/include/asm/ldscript.h	/^#define ALIGN_LMA	/;"	d
ALIGN_REVOC_KEY	include/fsl_validate.h	/^#define ALIGN_REVOC_KEY /;"	d
ALIGN_SHIFT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	ALIGN_SHIFT$/;"	e	enum:hws_wl_supp
ALIGN_SIZE	arch/arm/imx-common/hab.c	/^#define ALIGN_SIZE	/;"	d	file:
ALIGN_SUP	tools/kwbimage.h	/^#define ALIGN_SUP(/;"	d
ALIVE	drivers/net/davinci_emac.h	/^	dv_reg		ALIVE;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
ALI_CIO_DATA	drivers/misc/ali512x.c	/^#define ALI_CIO_DATA /;"	d	file:
ALI_CIO_INDEX	drivers/misc/ali512x.c	/^#define ALI_CIO_INDEX /;"	d	file:
ALI_CIO_PORT_SEL	drivers/misc/ali512x.c	/^#define ALI_CIO_PORT_SEL /;"	d	file:
ALI_CLOSE	drivers/misc/ali512x.c	/^#define ALI_CLOSE(/;"	d	file:
ALI_DATA	include/ali512x.h	/^# define ALI_DATA /;"	d
ALI_DISABLED	include/ali512x.h	/^# define ALI_DISABLED /;"	d
ALI_ENABLED	include/ali512x.h	/^# define ALI_ENABLED /;"	d
ALI_INDEX	include/ali512x.h	/^# define ALI_INDEX /;"	d
ALI_OPEN	drivers/misc/ali512x.c	/^#define ALI_OPEN(/;"	d	file:
ALI_SELDEV	drivers/misc/ali512x.c	/^#define ALI_SELDEV(/;"	d	file:
ALI_UART1	include/ali512x.h	/^# define ALI_UART1 /;"	d
ALI_UART2	include/ali512x.h	/^# define ALI_UART2 /;"	d
ALLINTS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define ALLINTS /;"	d
ALLOC_ALIGN_BUFFER	include/memalign.h	/^#define ALLOC_ALIGN_BUFFER(/;"	d
ALLOC_ALIGN_BUFFER_PAD	include/memalign.h	/^#define ALLOC_ALIGN_BUFFER_PAD(/;"	d
ALLOC_CACHE_ALIGN_BUFFER	include/memalign.h	/^#define ALLOC_CACHE_ALIGN_BUFFER(/;"	d
ALLOC_CACHE_ALIGN_BUFFER_PAD	include/memalign.h	/^#define ALLOC_CACHE_ALIGN_BUFFER_PAD(/;"	d
ALLOFF	include/mc34704.h	/^#define ALLOFF	/;"	d
ALL_BITS_PER_PUP	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define ALL_BITS_PER_PUP	/;"	d
ALL_EXTRA_FLAGS	fs/yaffs2/yaffs_packedtags2.c	/^#define ALL_EXTRA_FLAGS	/;"	d	file:
ALL_INTS	drivers/net/armada100_fec.h	/^#define ALL_INTS /;"	d
ALL_PUP_TRAINING	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define ALL_PUP_TRAINING	/;"	d
ALMASK	arch/mips/include/asm/asm.h	/^#define ALMASK	/;"	d
ALSZ	arch/mips/include/asm/asm.h	/^#define ALSZ	/;"	d
ALT	drivers/video/ipu.h	/^#define ALT	/;"	d
ALT	include/i8042.h	/^#define ALT	/;"	d
ALTCLKSRC_ENABLE_EXT_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define ALTCLKSRC_ENABLE_EXT_MASK	/;"	d
ALTCLKSRC_ENABLE_INT_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define ALTCLKSRC_ENABLE_INT_MASK	/;"	d
ALTCLKSRC_MODE_ACTIVE	arch/arm/include/asm/arch-omap4/clock.h	/^#define ALTCLKSRC_MODE_ACTIVE	/;"	d
ALTCLKSRC_MODE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define ALTCLKSRC_MODE_MASK	/;"	d
ALTELECTRICALSEL	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTELECTRICALSEL	include/dt-bindings/pinctrl/omap.h	/^#define ALTELECTRICALSEL	/;"	d
ALTERA	include/lattice.h	/^#define ALTERA	/;"	d
ALTERA_JTAG_AC	drivers/serial/altera_jtag_uart.c	/^#define ALTERA_JTAG_AC	/;"	d	file:
ALTERA_JTAG_RRDY	drivers/serial/altera_jtag_uart.c	/^#define ALTERA_JTAG_RRDY	/;"	d	file:
ALTERA_JTAG_RVALID	drivers/serial/altera_jtag_uart.c	/^#define ALTERA_JTAG_RVALID	/;"	d	file:
ALTERA_JTAG_UART	drivers/serial/Kconfig	/^config ALTERA_JTAG_UART$/;"	c	menu:Serial drivers
ALTERA_JTAG_UART_BYPASS	drivers/serial/Kconfig	/^config ALTERA_JTAG_UART_BYPASS$/;"	c	menu:Serial drivers
ALTERA_JTAG_WRITE_DEPTH	drivers/serial/altera_jtag_uart.c	/^#define ALTERA_JTAG_WRITE_DEPTH	/;"	d	file:
ALTERA_JTAG_WSPACE	drivers/serial/altera_jtag_uart.c	/^#define ALTERA_JTAG_WSPACE(/;"	d	file:
ALTERA_PIO	drivers/gpio/Kconfig	/^config ALTERA_PIO$/;"	c	menu:GPIO Support
ALTERA_QSPI	drivers/mtd/Kconfig	/^config ALTERA_QSPI$/;"	c	menu:MTD Support
ALTERA_SPI	drivers/spi/Kconfig	/^config ALTERA_SPI$/;"	c	menu:SPI Support
ALTERA_SPI_CONTROL_SSO_MSK	drivers/spi/altera_spi.c	/^#define ALTERA_SPI_CONTROL_SSO_MSK	/;"	d	file:
ALTERA_SPI_STATUS_RRDY_MSK	drivers/spi/altera_spi.c	/^#define ALTERA_SPI_STATUS_RRDY_MSK	/;"	d	file:
ALTERA_SYSID	drivers/misc/Kconfig	/^config ALTERA_SYSID$/;"	c	menu:Multifunction device drivers
ALTERA_TIMER	drivers/timer/Kconfig	/^config ALTERA_TIMER$/;"	c	menu:Timer Support
ALTERA_TIMER_CONT	drivers/timer/altera_timer.c	/^#define ALTERA_TIMER_CONT	/;"	d	file:
ALTERA_TIMER_START	drivers/timer/altera_timer.c	/^#define ALTERA_TIMER_START	/;"	d	file:
ALTERA_TIMER_STOP	drivers/timer/altera_timer.c	/^#define ALTERA_TIMER_STOP	/;"	d	file:
ALTERA_TSE	drivers/net/Kconfig	/^config ALTERA_TSE$/;"	c
ALTERA_TSE_CMD_ENA_10_MSK	drivers/net/altera_tse.h	/^#define ALTERA_TSE_CMD_ENA_10_MSK	/;"	d
ALTERA_TSE_CMD_ETH_SPEED_MSK	drivers/net/altera_tse.h	/^#define ALTERA_TSE_CMD_ETH_SPEED_MSK	/;"	d
ALTERA_TSE_CMD_HD_ENA_MSK	drivers/net/altera_tse.h	/^#define ALTERA_TSE_CMD_HD_ENA_MSK	/;"	d
ALTERA_TSE_CMD_RX_ENA_MSK	drivers/net/altera_tse.h	/^#define ALTERA_TSE_CMD_RX_ENA_MSK	/;"	d
ALTERA_TSE_CMD_SW_RESET_MSK	drivers/net/altera_tse.h	/^#define ALTERA_TSE_CMD_SW_RESET_MSK	/;"	d
ALTERA_TSE_CMD_TX_ENA_MSK	drivers/net/altera_tse.h	/^#define ALTERA_TSE_CMD_TX_ENA_MSK	/;"	d
ALTERA_UART	drivers/serial/Kconfig	/^config ALTERA_UART$/;"	c	menu:Serial drivers
ALTERA_UART_RRDY	drivers/serial/altera_uart.c	/^#define ALTERA_UART_RRDY	/;"	d	file:
ALTERA_UART_TMT	drivers/serial/altera_uart.c	/^#define ALTERA_UART_TMT	/;"	d	file:
ALTERA_UART_TRDY	drivers/serial/altera_uart.c	/^#define ALTERA_UART_TRDY	/;"	d	file:
ALT_BUF_DATA	drivers/mtd/nand/vf610_nfc.c	/^	ALT_BUF_DATA = 0,$/;"	e	enum:vf610_nfc_alt_buf	file:
ALT_BUF_ID	drivers/mtd/nand/vf610_nfc.c	/^	ALT_BUF_ID = 1,$/;"	e	enum:vf610_nfc_alt_buf	file:
ALT_BUF_ONFI	drivers/mtd/nand/vf610_nfc.c	/^	ALT_BUF_ONFI = 3,$/;"	e	enum:vf610_nfc_alt_buf	file:
ALT_BUF_STAT	drivers/mtd/nand/vf610_nfc.c	/^	ALT_BUF_STAT = 2,$/;"	e	enum:vf610_nfc_alt_buf	file:
ALT_GP_SMI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ALT_GP_SMI_EN	/;"	d
ALT_GP_SMI_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ALT_GP_SMI_STS	/;"	d
ALT_MSGDMA	drivers/net/altera_tse.h	/^#define ALT_MSGDMA	/;"	d
ALT_SGDMA	drivers/net/altera_tse.h	/^#define ALT_SGDMA	/;"	d
ALT_SGDMA_CONTROL_RUN_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_CONTROL_RUN_MSK	/;"	d
ALT_SGDMA_CONTROL_SOFTWARERESET_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK	/;"	d
ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK	/;"	d
ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK	/;"	d
ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK	/;"	d
ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK	/;"	d
ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK	/;"	d
ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK	/;"	d
ALT_SGDMA_STATUS_BUSY_MSK	drivers/net/altera_tse.h	/^#define ALT_SGDMA_STATUS_BUSY_MSK	/;"	d
ALT_SPD_EEPROM_ADDRESS	include/configs/sbc8548.h	/^#define ALT_SPD_EEPROM_ADDRESS	/;"	d
ALT_TSE_SGDMA_BUSY_TIMEOUT	drivers/net/altera_tse.h	/^#define ALT_TSE_SGDMA_BUSY_TIMEOUT	/;"	d
ALT_TSE_SW_RESET_TIMEOUT	drivers/net/altera_tse.h	/^#define ALT_TSE_SW_RESET_TIMEOUT	/;"	d
ALWAYSON_CTRL_BASE	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_CTRL_BASE	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_AOB_IO_SEL18_SD	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_AOB_IO_SEL18_SD	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_AOB_IO_SEL18_USIM0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_AOB_IO_SEL18_USIM0	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_AOB_IO_SEL18_USIM1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_AOB_IO_SEL18_USIM1	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_CSSYS_CTRL_PROT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_CSSYS_CTRL_PROT	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_MCU_SUBSYS_CTRL3_RESERVED	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_MCU_SUBSYS_CTRL3_RESERVED	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_RCLK_3	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_RCLK_3	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_RCLK_MASK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_RCLK_MASK	/;"	d
ALWAYSON_SC_MCU_SUBSYS_CTRL3_TCXO_AFC_OEN_CRG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_MCU_SUBSYS_CTRL3_TCXO_AFC_OEN_CRG	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_CS_DAPB_ON	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_CS_DAPB_ON	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_JTAG_AUTH	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_JTAG_AUTH	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_MCU_DAP	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_MCU_DAP	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_PDM	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_PDM	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_RTC0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_RTC0	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_RTC1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_RTC1	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_SSI_PAD	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_SSI_PAD	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_CLK_UART0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_CLK_UART0	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_HCLK_IPC_NS	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_HCLK_IPC_NS	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_HCLK_IPC_S	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_HCLK_IPC_S	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_HCLK_MCU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_HCLK_MCU	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_TIMER0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_TIMER0	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_TIMER1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_TIMER1	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_WDT0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_WDT0	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_WDT1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_CM3_WDT1	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_EFUSEC	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_EFUSEC	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_PMUSSI	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_PMUSSI	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER0	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER1	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER2	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER3	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER3	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER4	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER5	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER6	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER7	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER7	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER8	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TIMER8	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TZPC	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_TZPC	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_WDT0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_WDT0	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_WDT1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_WDT1	/;"	d
ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_WDT2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_WDT2	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_CCPU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_CCPU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_MCU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_MCU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_NS_CCPU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_NS_CCPU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_NS_MCU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_HCLK_IPC_NS_MCU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_EFUSEC_CCPU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_EFUSEC_CCPU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_EFUSEC_MCU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_EFUSEC_MCU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_PMUSSI_CCPU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_PMUSSI_CCPU	/;"	d
ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_PMUSSI_MCU	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_PMUSSI_MCU	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_HRESET_IPC_NS_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_HRESET_IPC_NS_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_HRESET_IPC_S_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_HRESET_IPC_S_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_MDM_SUBSYS_GLB	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_MDM_SUBSYS_GLB	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_TIMER0_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_TIMER0_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_TIMER1_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_TIMER1_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_WDT0_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_WDT0_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_WDT1_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_CM3_WDT1_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_EFUSEC_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_EFUSEC_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_PMUSSI_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_PMUSSI_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER0_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER0_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER1_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER1_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER2_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER2_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER3_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER3_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER4_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER4_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER5_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER5_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER6_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER6_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER7_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER7_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER8_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_TIMER8_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_UART0_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_UART0_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_WDT0_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_WDT0_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_WDT1_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_WDT1_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_WDT2_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_WDT2_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_CS_DAPB_ON_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_CS_DAPB_ON_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_JTAG_AUTH_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_JTAG_AUTH_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_DAP_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_DAP_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_ECTR_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_ECTR_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_POR_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_POR_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_SYS_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_MCU_SYS_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_RTC0_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_RTC0_N	/;"	d
ALWAYSON_SC_PERIPH_RST4_DIS_RESET_RTC1_N	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_PERIPH_RST4_DIS_RESET_RTC1_N	/;"	d
ALWAYSON_SC_SYS_CTRL0_MODE_MASK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL0_MODE_MASK	/;"	d
ALWAYSON_SC_SYS_CTRL0_MODE_NORMAL	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL0_MODE_NORMAL	/;"	d
ALWAYSON_SC_SYS_CTRL1_AARM_WD_RST_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_AARM_WD_RST_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_AARM_WD_RST_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_AARM_WD_RST_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG1	/;"	d
ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG1_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG1_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_BUS_DFS_FORE_HD_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_EFUSEC_REMAP	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_EFUSEC_REMAP	/;"	d
ALWAYSON_SC_SYS_CTRL1_EFUSEC_REMAP_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_EFUSEC_REMAP_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_EXT_PLL_SEL	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_EXT_PLL_SEL	/;"	d
ALWAYSON_SC_SYS_CTRL1_EXT_PLL_SEL_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_EXT_PLL_SEL_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_MCU_CLKEN_HARDCFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_MCU_CLKEN_HARDCFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_MCU_CLKEN_HARDCFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_MCU_CLKEN_HARDCFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_MCU_WDG0_RSTMCU_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_MCU_WDG0_RSTMCU_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_MCU_WDG0_RSTMCU_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_MCU_WDG0_RSTMCU_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_REMAP_SRAM_AARM	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_REMAP_SRAM_AARM	/;"	d
ALWAYSON_SC_SYS_CTRL1_REMAP_SRAM_AARM_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_REMAP_SRAM_AARM_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_DE_BOUNCE_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_DE_BOUNCE_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_DE_BOUNCE_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_DE_BOUNCE_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_SFT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_SFT	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_SFT_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM0_HPD_OE_SFT_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_DE_BOUNCE_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_DE_BOUNCE_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_DE_BOUNCE_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_DE_BOUNCE_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_CFG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_CFG	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_CFG_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_CFG_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_SFT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_SFT	/;"	d
ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_SFT_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL1_USIM1_HPD_OE_SFT_MSK	/;"	d
ALWAYSON_SC_SYS_CTRL2_ACPU_WDG_RST_STAT_CLEAR	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL2_ACPU_WDG_RST_STAT_CLEAR	/;"	d
ALWAYSON_SC_SYS_CTRL2_GLB_SRST_STAT_CLEAR	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL2_GLB_SRST_STAT_CLEAR	/;"	d
ALWAYSON_SC_SYS_CTRL2_MCU_SFT_RST_STAT_CLEAR	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL2_MCU_SFT_RST_STAT_CLEAR	/;"	d
ALWAYSON_SC_SYS_CTRL2_MCU_WDG0_RST_STAT_CLEAR	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL2_MCU_WDG0_RST_STAT_CLEAR	/;"	d
ALWAYSON_SC_SYS_CTRL2_MCU_WDG1_RST_STAT_CLEAR	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL2_MCU_WDG1_RST_STAT_CLEAR	/;"	d
ALWAYSON_SC_SYS_CTRL2_TSENSOR_RST_STAT_CLEAR	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_CTRL2_TSENSOR_RST_STAT_CLEAR	/;"	d
ALWAYSON_SC_SYS_STAT0_ACPU_WD_GLB_RST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_ACPU_WD_GLB_RST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT0_CM3_WDG1_RST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_CM3_WDG1_RST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT0_GLB_SRST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_GLB_SRST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT0_MCU_RST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_MCU_RST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT0_MCU_SOFTRST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_MCU_SOFTRST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT0_MCU_WDGRST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_MCU_WDGRST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT0_TSENSOR_HARDRST_STAT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT0_TSENSOR_HARDRST_STAT	/;"	d
ALWAYSON_SC_SYS_STAT1_BOOT_MODE_LOCK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_BOOT_MODE_LOCK	/;"	d
ALWAYSON_SC_SYS_STAT1_BOOT_SEL_LOCK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_BOOT_SEL_LOCK	/;"	d
ALWAYSON_SC_SYS_STAT1_EFUSE_NANDBOOT_MSK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_EFUSE_NANDBOOT_MSK	/;"	d
ALWAYSON_SC_SYS_STAT1_EFUSE_NAND_BITWIDE	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_EFUSE_NAND_BITWIDE	/;"	d
ALWAYSON_SC_SYS_STAT1_FUNC_MODE_LOCK	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_FUNC_MODE_LOCK	/;"	d
ALWAYSON_SC_SYS_STAT1_FUN_JTAG_MODE_OUT	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_FUN_JTAG_MODE_OUT	/;"	d
ALWAYSON_SC_SYS_STAT1_MODE_STATUS	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_MODE_STATUS	/;"	d
ALWAYSON_SC_SYS_STAT1_SECURITY_BOOT_FLG	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define ALWAYSON_SC_SYS_STAT1_SECURITY_BOOT_FLG	/;"	d
AM29DL800BB	drivers/mtd/jedec_flash.c	/^#define AM29DL800BB	/;"	d	file:
AM29DL800BT	drivers/mtd/jedec_flash.c	/^#define AM29DL800BT	/;"	d	file:
AM29F002T	drivers/mtd/jedec_flash.c	/^#define AM29F002T	/;"	d	file:
AM29F016D	drivers/mtd/jedec_flash.c	/^#define AM29F016D	/;"	d	file:
AM29F017D	drivers/mtd/jedec_flash.c	/^#define AM29F017D	/;"	d	file:
AM29F032B	drivers/mtd/jedec_flash.c	/^#define AM29F032B	/;"	d	file:
AM29F040	drivers/mtd/jedec_flash.c	/^#define AM29F040	/;"	d	file:
AM29F080	drivers/mtd/jedec_flash.c	/^#define AM29F080	/;"	d	file:
AM29F400BB	drivers/mtd/jedec_flash.c	/^#define AM29F400BB	/;"	d	file:
AM29F800BB	drivers/mtd/jedec_flash.c	/^#define AM29F800BB	/;"	d	file:
AM29F800BT	drivers/mtd/jedec_flash.c	/^#define AM29F800BT	/;"	d	file:
AM29LV040B	drivers/mtd/jedec_flash.c	/^#define AM29LV040B	/;"	d	file:
AM29LV160DB	drivers/mtd/jedec_flash.c	/^#define AM29LV160DB	/;"	d	file:
AM29LV160DT	drivers/mtd/jedec_flash.c	/^#define AM29LV160DT	/;"	d	file:
AM29LV400BB	drivers/mtd/jedec_flash.c	/^#define AM29LV400BB	/;"	d	file:
AM29LV400BT	drivers/mtd/jedec_flash.c	/^#define AM29LV400BT	/;"	d	file:
AM29LV800BB	drivers/mtd/jedec_flash.c	/^#define AM29LV800BB	/;"	d	file:
AM29LV800BT	drivers/mtd/jedec_flash.c	/^#define AM29LV800BT	/;"	d	file:
AM335X	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X	/;"	d
AM335XX_BOARD_FDTFILE	include/configs/am335x_sl50.h	/^#define AM335XX_BOARD_FDTFILE /;"	d
AM335X_FB_H	drivers/video/am335x-fb.h	/^#define AM335X_FB_H$/;"	d
AM335X_GMII_SEL_OFFSET	drivers/net/cpsw.c	/^#define AM335X_GMII_SEL_OFFSET	/;"	d	file:
AM335X_NAND_ECC_MASK	board/siemens/draco/board.c	/^#define AM335X_NAND_ECC_MASK /;"	d	file:
AM335X_NAND_ECC_TYPE_16	board/siemens/draco/board.c	/^#define AM335X_NAND_ECC_TYPE_16 /;"	d	file:
AM335X_ZCE_300	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCE_300	/;"	d
AM335X_ZCE_600	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCE_600	/;"	d
AM335X_ZCZ_1000	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCZ_1000	/;"	d
AM335X_ZCZ_300	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCZ_300	/;"	d
AM335X_ZCZ_600	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCZ_600	/;"	d
AM335X_ZCZ_720	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCZ_720	/;"	d
AM335X_ZCZ_800	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM335X_ZCZ_800	/;"	d
AM33XX	arch/arm/Kconfig	/^config AM33XX$/;"	c	choice:ARM architecture""choice031ab9020104
AM33XX_ECAP0_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define AM33XX_ECAP0_BASE	/;"	d
AM33XX_EPWM_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define AM33XX_EPWM_BASE	/;"	d
AM33XX_GMII_SEL_MODE_MII	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_MODE_MII	/;"	d	file:
AM33XX_GMII_SEL_MODE_RGMII	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_MODE_RGMII	/;"	d	file:
AM33XX_GMII_SEL_MODE_RMII	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_MODE_RMII	/;"	d	file:
AM33XX_GMII_SEL_RGMII1_IDMODE	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_RGMII1_IDMODE	/;"	d	file:
AM33XX_GMII_SEL_RGMII2_IDMODE	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_RGMII2_IDMODE	/;"	d	file:
AM33XX_GMII_SEL_RMII1_IO_CLK_EN	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_RMII1_IO_CLK_EN	/;"	d	file:
AM33XX_GMII_SEL_RMII2_IO_CLK_EN	drivers/net/cpsw.c	/^#define AM33XX_GMII_SEL_RMII2_IO_CLK_EN	/;"	d	file:
AM33XX_GPIO0_BASE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define AM33XX_GPIO0_BASE /;"	d
AM33XX_GPIO1_BASE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define AM33XX_GPIO1_BASE /;"	d
AM33XX_GPIO2_BASE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define AM33XX_GPIO2_BASE /;"	d
AM33XX_GPIO3_BASE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define AM33XX_GPIO3_BASE /;"	d
AM33XX_GPIO4_BASE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define AM33XX_GPIO4_BASE	/;"	d
AM33XX_GPIO5_BASE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define AM33XX_GPIO5_BASE	/;"	d
AM33XX_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM33XX_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define AM33XX_IOPAD(/;"	d
AM3505	arch/arm/include/asm/arch-omap3/omap.h	/^#define AM3505	/;"	d
AM3517	arch/arm/include/asm/arch-omap3/omap.h	/^#define AM3517	/;"	d
AM3517_IP_SW_RESET	board/logicpd/am3517evm/am3517evm.c	/^#define AM3517_IP_SW_RESET	/;"	d	file:
AM35XX_IPSS_USBOTGSS_BASE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define AM35XX_IPSS_USBOTGSS_BASE	/;"	d
AM35X_INTR_DRVVBUS	drivers/usb/musb-new/am35x.c	/^#define AM35X_INTR_DRVVBUS	/;"	d	file:
AM35X_INTR_RX_SHIFT	drivers/usb/musb-new/am35x.c	/^#define AM35X_INTR_RX_SHIFT	/;"	d	file:
AM35X_INTR_TX_SHIFT	drivers/usb/musb-new/am35x.c	/^#define AM35X_INTR_TX_SHIFT	/;"	d	file:
AM35X_INTR_USB_MASK	drivers/usb/musb-new/am35x.c	/^#define AM35X_INTR_USB_MASK	/;"	d	file:
AM35X_INTR_USB_SHIFT	drivers/usb/musb-new/am35x.c	/^#define AM35X_INTR_USB_SHIFT	/;"	d	file:
AM35X_RX_EP_MASK	drivers/usb/musb-new/am35x.c	/^#define AM35X_RX_EP_MASK	/;"	d	file:
AM35X_RX_INTR_MASK	drivers/usb/musb-new/am35x.c	/^#define AM35X_RX_INTR_MASK	/;"	d	file:
AM35X_SCM_GEN_BASE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define AM35X_SCM_GEN_BASE	/;"	d
AM35X_SOFT_RESET_MASK	drivers/usb/musb-new/am35x.c	/^#define AM35X_SOFT_RESET_MASK	/;"	d	file:
AM35X_TX_EP_MASK	drivers/usb/musb-new/am35x.c	/^#define AM35X_TX_EP_MASK	/;"	d	file:
AM35X_TX_INTR_MASK	drivers/usb/musb-new/am35x.c	/^#define AM35X_TX_INTR_MASK	/;"	d	file:
AM35X_USB_OTG_BASE	drivers/usb/musb/am35x.h	/^#define AM35X_USB_OTG_BASE	/;"	d
AM35X_USB_OTG_CORE_BASE	drivers/usb/musb/am35x.h	/^#define AM35X_USB_OTG_CORE_BASE	/;"	d
AM35X_USB_OTG_TIMEOUT	drivers/usb/musb/am35x.h	/^#define AM35X_USB_OTG_TIMEOUT	/;"	d
AM4372_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM4372_IOPAD	include/dt-bindings/pinctrl/am43xx.h	/^#define AM4372_IOPAD(/;"	d
AM437X	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define AM437X	/;"	d
AM437X_CTRL_USB2_OTGSESSEND_EN	drivers/usb/dwc3/ti_usb_phy.c	/^#define AM437X_CTRL_USB2_OTGSESSEND_EN	/;"	d	file:
AM437X_CTRL_USB2_OTGVDET_EN	drivers/usb/dwc3/ti_usb_phy.c	/^#define AM437X_CTRL_USB2_OTGVDET_EN	/;"	d	file:
AM437X_CTRL_USB2_OTG_PD	drivers/usb/dwc3/ti_usb_phy.c	/^#define AM437X_CTRL_USB2_OTG_PD	/;"	d	file:
AM437X_CTRL_USB2_PHY_PD	drivers/usb/dwc3/ti_usb_phy.c	/^#define AM437X_CTRL_USB2_PHY_PD	/;"	d	file:
AM43XX	arch/arm/Kconfig	/^config AM43XX$/;"	c	choice:ARM architecture""choice031ab9020104
AM79C9XX_ETH_PHY	drivers/net/ne2000.c	/^#define AM79C9XX_ETH_PHY	/;"	d	file:
AM79C9XX_HOME_PHY	drivers/net/ne2000.c	/^#define AM79C9XX_HOME_PHY	/;"	d	file:
AMAC0_IDM_RESET_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define AMAC0_IDM_RESET_ADDR	/;"	d
AMAC0_IO_CTRL_CLK_250_SEL_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define AMAC0_IO_CTRL_CLK_250_SEL_SHIFT	/;"	d
AMAC0_IO_CTRL_DEST_SYNC_MODE_EN_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define AMAC0_IO_CTRL_DEST_SYNC_MODE_EN_SHIFT	/;"	d
AMAC0_IO_CTRL_DIRECT_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define AMAC0_IO_CTRL_DIRECT_ADDR	/;"	d
AMAC0_IO_CTRL_GMII_MODE_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define AMAC0_IO_CTRL_GMII_MODE_SHIFT	/;"	d
AMAP_WRITE_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define AMAP_WRITE_ON	/;"	d
AMAP_WRITE_SHIFT	arch/arm/include/asm/arch-tegra/pmc.h	/^#define AMAP_WRITE_SHIFT	/;"	d
AMBA_AHB_CONF_LENGH	include/ambapp.h	/^#define AMBA_AHB_CONF_LENGH	/;"	d
AMBA_AHB_CUSTOM0_OFS	include/ambapp.h	/^#define AMBA_AHB_CUSTOM0_OFS	/;"	d
AMBA_AHB_CUSTOM1_OFS	include/ambapp.h	/^#define AMBA_AHB_CUSTOM1_OFS	/;"	d
AMBA_AHB_CUSTOM2_OFS	include/ambapp.h	/^#define AMBA_AHB_CUSTOM2_OFS	/;"	d
AMBA_AHB_ID_OFS	include/ambapp.h	/^#define AMBA_AHB_ID_OFS	/;"	d
AMBA_AHB_MBAR0_OFS	include/ambapp.h	/^#define AMBA_AHB_MBAR0_OFS	/;"	d
AMBA_AHB_MBAR1_OFS	include/ambapp.h	/^#define AMBA_AHB_MBAR1_OFS	/;"	d
AMBA_AHB_MBAR2_OFS	include/ambapp.h	/^#define AMBA_AHB_MBAR2_OFS	/;"	d
AMBA_AHB_MBAR3_OFS	include/ambapp.h	/^#define AMBA_AHB_MBAR3_OFS	/;"	d
AMBA_AHB_SLAVE_CONF_AREA	include/ambapp.h	/^#define AMBA_AHB_SLAVE_CONF_AREA /;"	d
AMBA_APB_CONF_LENGH	include/ambapp.h	/^#define AMBA_APB_CONF_LENGH	/;"	d
AMBA_APB_ID_OFS	include/ambapp.h	/^#define AMBA_APB_ID_OFS	/;"	d
AMBA_APB_IOBAR_OFS	include/ambapp.h	/^#define AMBA_APB_IOBAR_OFS	/;"	d
AMBA_CONF_AREA	include/ambapp.h	/^#define AMBA_CONF_AREA /;"	d
AMBA_DEFAULT_IOAREA	include/ambapp.h	/^#define AMBA_DEFAULT_IOAREA /;"	d
AMBA_PNP_ID	include/ambapp.h	/^#define AMBA_PNP_ID(/;"	d
AMBA_TYPE_AHBIO	include/ambapp.h	/^#define AMBA_TYPE_AHBIO /;"	d
AMBA_TYPE_APBIO	include/ambapp.h	/^#define AMBA_TYPE_APBIO /;"	d
AMBA_TYPE_MEM	include/ambapp.h	/^#define AMBA_TYPE_MEM /;"	d
AMBEN_ALL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_ALL	/;"	d
AMBEN_B0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_B0	/;"	d
AMBEN_B0_B1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_B0_B1	/;"	d
AMBEN_B0_B1_B2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_B0_B1_B2	/;"	d
AMBEN_NONE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_NONE	/;"	d
AMBEN_P0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_P0	/;"	d
AMBEN_P1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_P1	/;"	d
AMBEN_P2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMBEN_P2	/;"	d
AMCKEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMCKEN	/;"	d
AMCKEN_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMCKEN_P	/;"	d
AMD_CMD_ERASE_SECTOR	include/mtd/cfi_flash.h	/^#define AMD_CMD_ERASE_SECTOR	/;"	d
AMD_CMD_ERASE_START	include/mtd/cfi_flash.h	/^#define AMD_CMD_ERASE_START	/;"	d
AMD_CMD_PPB_LOCK_BC1	include/mtd/cfi_flash.h	/^#define AMD_CMD_PPB_LOCK_BC1	/;"	d
AMD_CMD_PPB_LOCK_BC2	include/mtd/cfi_flash.h	/^#define AMD_CMD_PPB_LOCK_BC2	/;"	d
AMD_CMD_PPB_UNLOCK_BC1	include/mtd/cfi_flash.h	/^#define AMD_CMD_PPB_UNLOCK_BC1	/;"	d
AMD_CMD_PPB_UNLOCK_BC2	include/mtd/cfi_flash.h	/^#define AMD_CMD_PPB_UNLOCK_BC2	/;"	d
AMD_CMD_RESET	include/mtd/cfi_flash.h	/^#define AMD_CMD_RESET	/;"	d
AMD_CMD_SET_PPB_ENTRY	include/mtd/cfi_flash.h	/^#define AMD_CMD_SET_PPB_ENTRY	/;"	d
AMD_CMD_SET_PPB_EXIT_BC1	include/mtd/cfi_flash.h	/^#define AMD_CMD_SET_PPB_EXIT_BC1	/;"	d
AMD_CMD_SET_PPB_EXIT_BC2	include/mtd/cfi_flash.h	/^#define AMD_CMD_SET_PPB_EXIT_BC2	/;"	d
AMD_CMD_UNLOCK_ACK	include/mtd/cfi_flash.h	/^#define AMD_CMD_UNLOCK_ACK	/;"	d
AMD_CMD_UNLOCK_START	include/mtd/cfi_flash.h	/^#define AMD_CMD_UNLOCK_START	/;"	d
AMD_CMD_WRITE	include/mtd/cfi_flash.h	/^#define AMD_CMD_WRITE	/;"	d
AMD_CMD_WRITE_BUFFER_CONFIRM	include/mtd/cfi_flash.h	/^#define AMD_CMD_WRITE_BUFFER_CONFIRM	/;"	d
AMD_CMD_WRITE_TO_BUFFER	include/mtd/cfi_flash.h	/^#define AMD_CMD_WRITE_TO_BUFFER	/;"	d
AMD_ID_DL163B	include/flash.h	/^#define AMD_ID_DL163B	/;"	d
AMD_ID_DL163T	include/flash.h	/^#define AMD_ID_DL163T	/;"	d
AMD_ID_DL322B	include/flash.h	/^#define AMD_ID_DL322B	/;"	d
AMD_ID_DL322T	include/flash.h	/^#define AMD_ID_DL322T	/;"	d
AMD_ID_DL323B	include/flash.h	/^#define AMD_ID_DL323B	/;"	d
AMD_ID_DL323T	include/flash.h	/^#define AMD_ID_DL323T	/;"	d
AMD_ID_DL324B	include/flash.h	/^#define AMD_ID_DL324B	/;"	d
AMD_ID_DL324T	include/flash.h	/^#define AMD_ID_DL324T	/;"	d
AMD_ID_DL640	include/flash.h	/^#define AMD_ID_DL640	/;"	d
AMD_ID_DL640G_2	include/flash.h	/^#define AMD_ID_DL640G_2 /;"	d
AMD_ID_DL640G_3	include/flash.h	/^#define AMD_ID_DL640G_3 /;"	d
AMD_ID_F016D	include/flash.h	/^#define AMD_ID_F016D	/;"	d
AMD_ID_F032B	include/flash.h	/^#define AMD_ID_F032B	/;"	d
AMD_ID_F033C	include/flash.h	/^#define AMD_ID_F033C	/;"	d
AMD_ID_F040B	include/flash.h	/^#define AMD_ID_F040B	/;"	d
AMD_ID_F065D	include/flash.h	/^#define AMD_ID_F065D	/;"	d
AMD_ID_F080B	include/flash.h	/^#define AMD_ID_F080B	/;"	d
AMD_ID_GL064MT_2	include/flash.h	/^#define AMD_ID_GL064MT_2 /;"	d
AMD_ID_GL064MT_3	include/flash.h	/^#define AMD_ID_GL064MT_3 /;"	d
AMD_ID_GL064M_2	include/flash.h	/^#define AMD_ID_GL064M_2 /;"	d
AMD_ID_GL064M_3	include/flash.h	/^#define AMD_ID_GL064M_3 /;"	d
AMD_ID_GL128N_2	include/flash.h	/^#define AMD_ID_GL128N_2	/;"	d
AMD_ID_GL128N_3	include/flash.h	/^#define AMD_ID_GL128N_3	/;"	d
AMD_ID_LV016B	include/flash.h	/^#define AMD_ID_LV016B	/;"	d
AMD_ID_LV033C	include/flash.h	/^#define AMD_ID_LV033C	/;"	d
AMD_ID_LV040B	include/flash.h	/^#define AMD_ID_LV040B	/;"	d
AMD_ID_LV065D	include/flash.h	/^#define AMD_ID_LV065D	/;"	d
AMD_ID_LV116DB	include/flash.h	/^#define AMD_ID_LV116DB	/;"	d
AMD_ID_LV116DT	include/flash.h	/^#define AMD_ID_LV116DT	/;"	d
AMD_ID_LV128U_2	include/flash.h	/^#define AMD_ID_LV128U_2 /;"	d
AMD_ID_LV128U_3	include/flash.h	/^#define AMD_ID_LV128U_3 /;"	d
AMD_ID_LV160B	include/flash.h	/^#define AMD_ID_LV160B	/;"	d
AMD_ID_LV160T	include/flash.h	/^#define AMD_ID_LV160T	/;"	d
AMD_ID_LV256U_2	include/flash.h	/^#define AMD_ID_LV256U_2 /;"	d
AMD_ID_LV256U_3	include/flash.h	/^#define AMD_ID_LV256U_3 /;"	d
AMD_ID_LV320B	include/flash.h	/^#define AMD_ID_LV320B	/;"	d
AMD_ID_LV320B_2	include/flash.h	/^#define AMD_ID_LV320B_2 /;"	d
AMD_ID_LV320B_3	include/flash.h	/^#define AMD_ID_LV320B_3 /;"	d
AMD_ID_LV320T	include/flash.h	/^#define AMD_ID_LV320T	/;"	d
AMD_ID_LV400B	include/flash.h	/^#define AMD_ID_LV400B	/;"	d
AMD_ID_LV400T	include/flash.h	/^#define AMD_ID_LV400T	/;"	d
AMD_ID_LV640MB_2	include/flash.h	/^#define AMD_ID_LV640MB_2 /;"	d
AMD_ID_LV640MB_3	include/flash.h	/^#define AMD_ID_LV640MB_3 /;"	d
AMD_ID_LV640MT_2	include/flash.h	/^#define AMD_ID_LV640MT_2 /;"	d
AMD_ID_LV640MT_3	include/flash.h	/^#define AMD_ID_LV640MT_3 /;"	d
AMD_ID_LV640U	include/flash.h	/^#define AMD_ID_LV640U	/;"	d
AMD_ID_LV640U_2	include/flash.h	/^#define AMD_ID_LV640U_2 /;"	d
AMD_ID_LV640U_3	include/flash.h	/^#define AMD_ID_LV640U_3 /;"	d
AMD_ID_LV650U	include/flash.h	/^#define AMD_ID_LV650U	/;"	d
AMD_ID_LV800B	include/flash.h	/^#define AMD_ID_LV800B	/;"	d
AMD_ID_LV800T	include/flash.h	/^#define AMD_ID_LV800T	/;"	d
AMD_ID_MIRROR	include/flash.h	/^#define AMD_ID_MIRROR	/;"	d
AMD_ID_PL160CB	include/flash.h	/^#define AMD_ID_PL160CB	/;"	d
AMD_MANUFACT	include/flash.h	/^#define AMD_MANUFACT	/;"	d
AMD_STATUS_ERROR	include/mtd/cfi_flash.h	/^#define AMD_STATUS_ERROR	/;"	d
AMD_STATUS_TOGGLE	include/mtd/cfi_flash.h	/^#define AMD_STATUS_TOGGLE	/;"	d
AMIC_MANUFACT	include/flash.h	/^#define AMIC_MANUFACT	/;"	d
AMIGA_BLOCK_LIMIT	disk/part_amiga.h	/^#define AMIGA_BLOCK_LIMIT /;"	d
AMIGA_ENTRY_NUMBERS	include/part.h	/^#define AMIGA_ENTRY_NUMBERS	/;"	d
AMIGA_ID_BOOT	disk/part_amiga.h	/^#define AMIGA_ID_BOOT /;"	d
AMIGA_ID_PART	disk/part_amiga.h	/^#define AMIGA_ID_PART /;"	d
AMIGA_ID_RDISK	disk/part_amiga.h	/^#define AMIGA_ID_RDISK /;"	d
AML_UART_CLR_ERR	drivers/serial/serial_meson.c	/^#define AML_UART_CLR_ERR	/;"	d	file:
AML_UART_ERR	drivers/serial/serial_meson.c	/^#define AML_UART_ERR	/;"	d	file:
AML_UART_FRAME_ERR	drivers/serial/serial_meson.c	/^#define AML_UART_FRAME_ERR	/;"	d	file:
AML_UART_PARITY_ERR	drivers/serial/serial_meson.c	/^#define AML_UART_PARITY_ERR	/;"	d	file:
AML_UART_RX_EMPTY	drivers/serial/serial_meson.c	/^#define AML_UART_RX_EMPTY	/;"	d	file:
AML_UART_RX_EN	drivers/serial/serial_meson.c	/^#define AML_UART_RX_EN	/;"	d	file:
AML_UART_RX_RST	drivers/serial/serial_meson.c	/^#define AML_UART_RX_RST	/;"	d	file:
AML_UART_TX_EMPTY	drivers/serial/serial_meson.c	/^#define AML_UART_TX_EMPTY	/;"	d	file:
AML_UART_TX_EN	drivers/serial/serial_meson.c	/^#define AML_UART_TX_EN	/;"	d	file:
AML_UART_TX_FIFO_WERR	drivers/serial/serial_meson.c	/^#define AML_UART_TX_FIFO_WERR	/;"	d	file:
AML_UART_TX_FULL	drivers/serial/serial_meson.c	/^#define AML_UART_TX_FULL	/;"	d	file:
AML_UART_TX_RST	drivers/serial/serial_meson.c	/^#define AML_UART_TX_RST	/;"	d	file:
AML_UART_XMIT_BUSY	drivers/serial/serial_meson.c	/^#define AML_UART_XMIT_BUSY	/;"	d	file:
AMP_DN	drivers/usb/eth/r8152.h	/^#define AMP_DN	/;"	d
AMQ_BMT_MASK	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define AMQ_BMT_MASK	/;"	d
AMQ_PL_MASK	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define AMQ_PL_MASK	/;"	d
AMSB0CTL_AOE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB0CTL_AOE	/;"	d
AMSB0CTL_ARE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB0CTL_ARE	/;"	d
AMSB0CTL_AWE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB0CTL_AWE	/;"	d
AMSB0CTL_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB0CTL_MASK	/;"	d
AMSB0CTL_NONE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB0CTL_NONE	/;"	d
AMSB0CTL_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB0CTL_P	/;"	d
AMSB1CTL_AOE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB1CTL_AOE	/;"	d
AMSB1CTL_ARE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB1CTL_ARE	/;"	d
AMSB1CTL_AWE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB1CTL_AWE	/;"	d
AMSB1CTL_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB1CTL_MASK	/;"	d
AMSB1CTL_NONE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB1CTL_NONE	/;"	d
AMSB1CTL_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB1CTL_P	/;"	d
AMSB2CTL_AOE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB2CTL_AOE	/;"	d
AMSB2CTL_ARE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB2CTL_ARE	/;"	d
AMSB2CTL_AWE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB2CTL_AWE	/;"	d
AMSB2CTL_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB2CTL_MASK	/;"	d
AMSB2CTL_NONE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB2CTL_NONE	/;"	d
AMSB2CTL_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB2CTL_P	/;"	d
AMSB3CTL_AOE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB3CTL_AOE	/;"	d
AMSB3CTL_ARE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB3CTL_ARE	/;"	d
AMSB3CTL_AWE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB3CTL_AWE	/;"	d
AMSB3CTL_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB3CTL_MASK	/;"	d
AMSB3CTL_NONE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB3CTL_NONE	/;"	d
AMSB3CTL_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define AMSB3CTL_P	/;"	d
AN1000FIX	include/mv88e6352.h	/^#define AN1000FIX	/;"	d
AN1000FIX_PAGE	include/mv88e6352.h	/^#define AN1000FIX_PAGE	/;"	d
ANADIG_ANA_MISC1_LVDS1_CLK_SEL_MASK	arch/arm/cpu/armv7/mx6/clock.c	/^#define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_MASK	/;"	d	file:
ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF	arch/arm/cpu/armv7/mx6/clock.c	/^#define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF	/;"	d	file:
ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF	arch/arm/cpu/armv7/mx6/clock.c	/^#define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF	/;"	d	file:
ANADIG_ANA_MISC1_LVDSCLK1_IBEN	arch/arm/cpu/armv7/mx6/clock.c	/^#define ANADIG_ANA_MISC1_LVDSCLK1_IBEN	/;"	d	file:
ANADIG_ANA_MISC1_LVDSCLK1_OBEN	arch/arm/cpu/armv7/mx6/clock.c	/^#define ANADIG_ANA_MISC1_LVDSCLK1_OBEN	/;"	d	file:
ANADIG_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ANADIG_BASE_ADDR	/;"	d
ANADIG_CLK_MISC0_PFD_480_AUTOGATE_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_CLK_MISC0_PFD_480_AUTOGATE_EN_MASK	/;"	d
ANADIG_PLL1_CTRL_DIV_SELECT	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL1_CTRL_DIV_SELECT	/;"	d
ANADIG_PLL1_CTRL_ENABLE	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL1_CTRL_ENABLE	/;"	d
ANADIG_PLL1_CTRL_POWERDOWN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL1_CTRL_POWERDOWN	/;"	d
ANADIG_PLL2_CTRL_DIV_SELECT	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL2_CTRL_DIV_SELECT	/;"	d
ANADIG_PLL2_CTRL_ENABLE	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL2_CTRL_ENABLE	/;"	d
ANADIG_PLL2_CTRL_POWERDOWN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL2_CTRL_POWERDOWN	/;"	d
ANADIG_PLL3_CTRL_BYPASS	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL3_CTRL_BYPASS /;"	d
ANADIG_PLL3_CTRL_DIV_SELECT	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL3_CTRL_DIV_SELECT /;"	d
ANADIG_PLL3_CTRL_ENABLE	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL3_CTRL_ENABLE /;"	d
ANADIG_PLL3_CTRL_POWERDOWN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL3_CTRL_POWERDOWN /;"	d
ANADIG_PLL5_CTRL_BYPASS	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL5_CTRL_BYPASS /;"	d
ANADIG_PLL5_CTRL_DIV_SELECT	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL5_CTRL_DIV_SELECT	/;"	d
ANADIG_PLL5_CTRL_ENABLE	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL5_CTRL_ENABLE /;"	d
ANADIG_PLL5_CTRL_POWERDOWN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL5_CTRL_POWERDOWN /;"	d
ANADIG_PLL7_CTRL_BYPASS	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL7_CTRL_BYPASS /;"	d
ANADIG_PLL7_CTRL_DIV_SELECT	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL7_CTRL_DIV_SELECT /;"	d
ANADIG_PLL7_CTRL_ENABLE	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL7_CTRL_ENABLE /;"	d
ANADIG_PLL7_CTRL_POWERDOWN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ANADIG_PLL7_CTRL_POWERDOWN /;"	d
ANADIG_PLL_480_PWDN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_PLL_480_PWDN_MASK	/;"	d
ANADIG_PLL_ARM_PWDN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_PLL_ARM_PWDN_MASK	/;"	d
ANADIG_PLL_CTRL_EN_USB_CLKS	drivers/usb/host/ehci-vf.c	/^#define ANADIG_PLL_CTRL_EN_USB_CLKS	/;"	d	file:
ANADIG_PLL_DDR_PWDN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_PLL_DDR_PWDN_MASK	/;"	d
ANADIG_PLL_ENET_PWDN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_PLL_ENET_PWDN_MASK	/;"	d
ANADIG_PLL_LOCK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_PLL_LOCK	/;"	d
ANADIG_PLL_VIDEO_PWDN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANADIG_PLL_VIDEO_PWDN_MASK	/;"	d
ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B	drivers/usb/host/ehci-mx6.c	/^#define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B	/;"	d	file:
ANADIG_USB2_CHRG_DETECT_EN_B	drivers/usb/host/ehci-mx6.c	/^#define ANADIG_USB2_CHRG_DETECT_EN_B	/;"	d	file:
ANADIG_USB2_PLL_480_CTRL_BYPASS	drivers/usb/host/ehci-mx6.c	/^#define ANADIG_USB2_PLL_480_CTRL_BYPASS	/;"	d	file:
ANADIG_USB2_PLL_480_CTRL_ENABLE	drivers/usb/host/ehci-mx6.c	/^#define ANADIG_USB2_PLL_480_CTRL_ENABLE	/;"	d	file:
ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS	drivers/usb/host/ehci-mx6.c	/^#define ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS	/;"	d	file:
ANADIG_USB2_PLL_480_CTRL_POWER	drivers/usb/host/ehci-mx6.c	/^#define ANADIG_USB2_PLL_480_CTRL_POWER	/;"	d	file:
ANAK	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	ANAK	/;"	d
ANALOG_PWRDOWN	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define ANALOG_PWRDOWN /;"	d
ANALOG_TOTAL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	ANALOG_TOTAL,$/;"	e	enum:analog_power_block
ANALOG_TOTAL	arch/arm/mach-exynos/include/mach/dp_info.h	/^	ANALOG_TOTAL,$/;"	e	enum:analog_power_block
ANAR	drivers/net/ns8382x.c	/^	ANAR = 0x04,$/;"	e	enum:phy_reg_offsets	file:
ANATOP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_BASE_ADDR /;"	d
ANATOP_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ANATOP_BASE_ADDR /;"	d
ANATOP_PFD480B_PFD4_FRAC_320M_VAL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANATOP_PFD480B_PFD4_FRAC_320M_VAL	/;"	d
ANATOP_PFD480B_PFD4_FRAC_392M_VAL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANATOP_PFD480B_PFD4_FRAC_392M_VAL	/;"	d
ANATOP_PFD480B_PFD4_FRAC_432M_VAL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANATOP_PFD480B_PFD4_FRAC_432M_VAL	/;"	d
ANATOP_PFD480B_PFD4_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ANATOP_PFD480B_PFD4_FRAC_MASK	/;"	d
ANATOP_PFD_CLKGATE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_PFD_CLKGATE_MASK(/;"	d
ANATOP_PFD_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_PFD_CLKGATE_SHIFT(/;"	d
ANATOP_PFD_FRAC_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_PFD_FRAC_MASK(/;"	d
ANATOP_PFD_FRAC_SHIFT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_PFD_FRAC_SHIFT(/;"	d
ANATOP_PFD_STABLE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_PFD_STABLE_MASK(/;"	d
ANATOP_PFD_STABLE_SHIFT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ANATOP_PFD_STABLE_SHIFT(/;"	d
AND	tools/buildman/kconfiglib.py	/^AND, OR, NOT, EQUAL, UNEQUAL = range(5)$/;"	v
ANDES_PCU_BSMCR_CMD	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMCR_CMD(/;"	d
ANDES_PCU_BSMCR_IE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMCR_IE(/;"	d
ANDES_PCU_BSMCR_LINK0	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMCR_LINK0(/;"	d
ANDES_PCU_BSMCR_LINK1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMCR_LINK1(/;"	d
ANDES_PCU_BSMCR_SYNCSRC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMCR_SYNCSRC(/;"	d
ANDES_PCU_BSMSR_BSMST	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMSR_BSMST(/;"	d
ANDES_PCU_BSMSR_CI0	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMSR_CI0(/;"	d
ANDES_PCU_BSMSR_CI1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMSR_CI1(/;"	d
ANDES_PCU_BSMSR_SYNCSRC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_BSMSR_SYNCSRC(/;"	d
ANDES_PCU_DCSRCR0_GMAC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR0_GMAC(/;"	d
ANDES_PCU_DCSRCR0_GPU	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR0_GPU(/;"	d
ANDES_PCU_DCSRCR0_LPC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR0_LPC(/;"	d
ANDES_PCU_DCSRCR0_TRIAHB	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR0_TRIAHB(/;"	d
ANDES_PCU_DCSRCR0_ULPI	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR0_ULPI(/;"	d
ANDES_PCU_DCSRCR1_I2C	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR1_I2C(/;"	d
ANDES_PCU_DCSRCR2_AC97	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_AC97(/;"	d
ANDES_PCU_DCSRCR2_CFC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_CFC(/;"	d
ANDES_PCU_DCSRCR2_GPIO	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_GPIO(/;"	d
ANDES_PCU_DCSRCR2_PCU	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_PCU(/;"	d
ANDES_PCU_DCSRCR2_SD	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_SD(/;"	d
ANDES_PCU_DCSRCR2_SPI	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_SPI(/;"	d
ANDES_PCU_DCSRCR2_UART1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_UART1(/;"	d
ANDES_PCU_DCSRCR2_UART2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DCSRCR2_UART2(/;"	d
ANDES_PCU_DMAES_AC97RX	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_AC97RX(/;"	d
ANDES_PCU_DMAES_AC97TX	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_AC97TX(/;"	d
ANDES_PCU_DMAES_CFCDMA	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_CFCDMA(/;"	d
ANDES_PCU_DMAES_SDDMA	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_SDDMA(/;"	d
ANDES_PCU_DMAES_UART1RX	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_UART1RX(/;"	d
ANDES_PCU_DMAES_UART1TX	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_UART1TX(/;"	d
ANDES_PCU_DMAES_UART2RX	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_UART2RX(/;"	d
ANDES_PCU_DMAES_UART2TX	include/andestech/andes_pcu.h	/^#define ANDES_PCU_DMAES_UART2TX(/;"	d
ANDES_PCU_INTR_ST_BSM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_BSM(/;"	d
ANDES_PCU_INTR_ST_PCS1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS1(/;"	d
ANDES_PCU_INTR_ST_PCS2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS2(/;"	d
ANDES_PCU_INTR_ST_PCS3	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS3(/;"	d
ANDES_PCU_INTR_ST_PCS4	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS4(/;"	d
ANDES_PCU_INTR_ST_PCS5	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS5(/;"	d
ANDES_PCU_INTR_ST_PCS6	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS6(/;"	d
ANDES_PCU_INTR_ST_PCS7	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS7(/;"	d
ANDES_PCU_INTR_ST_PCS8	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS8(/;"	d
ANDES_PCU_INTR_ST_PCS9	include/andestech/andes_pcu.h	/^#define ANDES_PCU_INTR_ST_PCS9(/;"	d
ANDES_PCU_MFPSR0_AHB_DEBUG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_AHB_DEBUG(/;"	d
ANDES_PCU_MFPSR0_AHB_TARGET	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_AHB_TARGET(/;"	d
ANDES_PCU_MFPSR0_DEFAULT_ENDIAN	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_DEFAULT_ENDIAN(/;"	d
ANDES_PCU_MFPSR0_DEFAULT_IVB	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_DEFAULT_IVB(/;"	d
ANDES_PCU_MFPSR0_IDEMODE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_IDEMODE(/;"	d
ANDES_PCU_MFPSR0_MINI_TC01	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_MINI_TC01(/;"	d
ANDES_PCU_MFPSR0_PCIMODE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR0_PCIMODE(/;"	d
ANDES_PCU_MFPSR1_AC97CLKOUT	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_AC97CLKOUT(/;"	d
ANDES_PCU_MFPSR1_AHB_FAST_REQ	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_AHB_FAST_REQ(/;"	d
ANDES_PCU_MFPSR1_DVOMODE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_DVOMODE(/;"	d
ANDES_PCU_MFPSR1_GPUPLLSRC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_GPUPLLSRC(/;"	d
ANDES_PCU_MFPSR1_HSMP_FAST_REQ	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_HSMP_FAST_REQ(/;"	d
ANDES_PCU_MFPSR1_I2C	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_I2C(/;"	d
ANDES_PCU_MFPSR1_PME	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_PME(/;"	d
ANDES_PCU_MFPSR1_PMUR_EXT_INT	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_PMUR_EXT_INT(/;"	d
ANDES_PCU_MFPSR1_PWM0	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_PWM0(/;"	d
ANDES_PCU_MFPSR1_PWM1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_PWM1(/;"	d
ANDES_PCU_MFPSR1_PWREN	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_PWREN(/;"	d
ANDES_PCU_MFPSR1_SD	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_SD(/;"	d
ANDES_PCU_MFPSR1_SPI	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_SPI(/;"	d
ANDES_PCU_MFPSR1_SUSPEND	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_SUSPEND(/;"	d
ANDES_PCU_MFPSR1_UART1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_UART1(/;"	d
ANDES_PCU_MFPSR1_UART2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_MFPSR1_UART2(/;"	d
ANDES_PCU_OSCC_OSCH2_RANGE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_OSCC_OSCH2_RANGE(/;"	d
ANDES_PCU_OSCC_OSCH3_RANGE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_OSCC_OSCH3_RANGE(/;"	d
ANDES_PCU_OSCC_OSCH_OFF	include/andestech/andes_pcu.h	/^#define ANDES_PCU_OSCC_OSCH_OFF(/;"	d
ANDES_PCU_OSCC_OSCH_RANGE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_OSCC_OSCH_RANGE(/;"	d
ANDES_PCU_OSCC_OSCH_STABLE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_OSCC_OSCH_STABLE(/;"	d
ANDES_PCU_OSCC_OSCH_TRI	include/andestech/andes_pcu.h	/^#define ANDES_PCU_OSCC_OSCH_TRI(/;"	d
ANDES_PCU_PCS8_PDD_1BYTE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS8_PDD_1BYTE(/;"	d
ANDES_PCU_PCS8_PDD_2BYTE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS8_PDD_2BYTE(/;"	d
ANDES_PCU_PCS8_PDD_3BYTE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS8_PDD_3BYTE(/;"	d
ANDES_PCU_PCS8_PDD_4BYTE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS8_PDD_4BYTE(/;"	d
ANDES_PCU_PCS9_PDD_CLRPWOFF_FLAG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_CLRPWOFF_FLAG(/;"	d
ANDES_PCU_PCS9_PDD_GPU_SRST	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_GPU_SRST(/;"	d
ANDES_PCU_PCS9_PDD_PWOFFTIME	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_PWOFFTIME(/;"	d
ANDES_PCU_PCS9_PDD_SUS2DRAM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_SUS2DRAM(/;"	d
ANDES_PCU_PCS9_PDD_TICKTYPE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_TICKTYPE(/;"	d
ANDES_PCU_PCS9_PDD_TIME1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_TIME1(/;"	d
ANDES_PCU_PCS9_PDD_TIME2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_TIME2(/;"	d
ANDES_PCU_PCS9_PDD_TIME3	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_TIME3(/;"	d
ANDES_PCU_PCS9_PDD_TIME4	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCS9_PDD_TIME4(/;"	d
ANDES_PCU_PCSX_CR_LS	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_CR_LS(/;"	d
ANDES_PCU_PCSX_CR_LW	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_CR_LW(/;"	d
ANDES_PCU_PCSX_CR_TYPE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_CR_TYPE(/;"	d
ANDES_PCU_PCSX_CR_WAKEUP_EN	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_CR_WAKEUP_EN(/;"	d
ANDES_PCU_PCSX_PARM_IE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_PARM_IE(/;"	d
ANDES_PCU_PCSX_PARM_NEXT	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_PARM_NEXT(/;"	d
ANDES_PCU_PCSX_PARM_PCSCMD	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_PARM_PCSCMD(/;"	d
ANDES_PCU_PCSX_PARM_SYNCSRC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_PARM_SYNCSRC(/;"	d
ANDES_PCU_PCSX_STAT1_ERRNO	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_STAT1_ERRNO(/;"	d
ANDES_PCU_PCSX_STAT1_ST	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_STAT1_ST(/;"	d
ANDES_PCU_PCSX_STAT2_CRNTPARM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_STAT2_CRNTPARM(/;"	d
ANDES_PCU_PCSX_STAT2_SYNCSRC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PCSX_STAT2_SYNCSRC(/;"	d
ANDES_PCU_PWMCD_PWMDIV	include/andestech/andes_pcu.h	/^#define ANDES_PCU_PWMCD_PWMDIV(/;"	d
ANDES_PCU_REV_NUMBER_PCS	include/andestech/andes_pcu.h	/^#define ANDES_PCU_REV_NUMBER_PCS(/;"	d
ANDES_PCU_REV_VER	include/andestech/andes_pcu.h	/^#define ANDES_PCU_REV_VER(/;"	d
ANDES_PCU_RSTTIMING_RG0	include/andestech/andes_pcu.h	/^#define ANDES_PCU_RSTTIMING_RG0(/;"	d
ANDES_PCU_RSTTIMING_RG1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_RSTTIMING_RG1(/;"	d
ANDES_PCU_RSTTIMING_RG2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_RSTTIMING_RG2(/;"	d
ANDES_PCU_RSTTIMING_RG3	include/andestech/andes_pcu.h	/^#define ANDES_PCU_RSTTIMING_RG3(/;"	d
ANDES_PCU_SOCMISC_300MHZSEL	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_300MHZSEL(/;"	d
ANDES_PCU_SOCMISC_CPUA_SRSTED	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_CPUA_SRSTED(/;"	d
ANDES_PCU_SOCMISC_CPUB_SRSTED	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_CPUB_SRSTED(/;"	d
ANDES_PCU_SOCMISC_DDRDDQ_TEST	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_DDRDDQ_TEST(/;"	d
ANDES_PCU_SOCMISC_DDRDLL_SRST	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_DDRDLL_SRST(/;"	d
ANDES_PCU_SOCMISC_DDRDLL_TEST	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_DDRDLL_TEST(/;"	d
ANDES_PCU_SOCMISC_DDRPLL_BYPASS	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_DDRPLL_BYPASS(/;"	d
ANDES_PCU_SOCMISC_ENCPUA	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_ENCPUA(/;"	d
ANDES_PCU_SOCMISC_ENCPUB	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_ENCPUB(/;"	d
ANDES_PCU_SOCMISC_EXLM_WAITA	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_EXLM_WAITA(/;"	d
ANDES_PCU_SOCMISC_EXLM_WAITB	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_EXLM_WAITB(/;"	d
ANDES_PCU_SOCMISC_GPUPLL_BYPASS	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_GPUPLL_BYPASS(/;"	d
ANDES_PCU_SOCMISC_HW_RESET	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_HW_RESET(/;"	d
ANDES_PCU_SOCMISC_PWON_GPIO1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_GPIO1(/;"	d
ANDES_PCU_SOCMISC_PWON_GPIO2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_GPIO2(/;"	d
ANDES_PCU_SOCMISC_PWON_GPIO3	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_GPIO3(/;"	d
ANDES_PCU_SOCMISC_PWON_GPIO4	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_GPIO4(/;"	d
ANDES_PCU_SOCMISC_PWON_GPIO5	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_GPIO5(/;"	d
ANDES_PCU_SOCMISC_PWON_PME	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_PME(/;"	d
ANDES_PCU_SOCMISC_PWON_PWBTN	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_PWBTN(/;"	d
ANDES_PCU_SOCMISC_PWON_PWFAIL	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_PWFAIL(/;"	d
ANDES_PCU_SOCMISC_PWON_RTC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_RTC(/;"	d
ANDES_PCU_SOCMISC_PWON_RTCALM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_RTCALM(/;"	d
ANDES_PCU_SOCMISC_PWON_WOL	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_WOL(/;"	d
ANDES_PCU_SOCMISC_PWON_XDBGIN	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_PWON_XDBGIN(/;"	d
ANDES_PCU_SOCMISC_RSCPUA	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_RSCPUA(/;"	d
ANDES_PCU_SOCMISC_RSCPUB	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_RSCPUB(/;"	d
ANDES_PCU_SOCMISC_RSPCI	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_RSPCI(/;"	d
ANDES_PCU_SOCMISC_USBWAKE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_USBWAKE(/;"	d
ANDES_PCU_SOCMISC_WD_RESET	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOCMISC_WD_RESET(/;"	d
ANDES_PCU_SOC_AHB_AHB2AHBMEM0	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_AHB2AHBMEM0(/;"	d
ANDES_PCU_SOC_AHB_AHB2AHBMEM1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_AHB2AHBMEM1(/;"	d
ANDES_PCU_SOC_AHB_AHB2AHBMEM2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_AHB2AHBMEM2(/;"	d
ANDES_PCU_SOC_AHB_AHB2AHBMEM3	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_AHB2AHBMEM3(/;"	d
ANDES_PCU_SOC_AHB_AHB2AHBREG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_AHB2AHBREG(/;"	d
ANDES_PCU_SOC_AHB_AHBC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_AHBC(/;"	d
ANDES_PCU_SOC_AHB_APB	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_APB(/;"	d
ANDES_PCU_SOC_AHB_APBREG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_APBREG(/;"	d
ANDES_PCU_SOC_AHB_DDR2C	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_DDR2C(/;"	d
ANDES_PCU_SOC_AHB_DDR2MEM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_DDR2MEM(/;"	d
ANDES_PCU_SOC_AHB_DLM1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_DLM1(/;"	d
ANDES_PCU_SOC_AHB_DLM2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_DLM2(/;"	d
ANDES_PCU_SOC_AHB_DMAC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_DMAC(/;"	d
ANDES_PCU_SOC_AHB_GMAC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_GMAC(/;"	d
ANDES_PCU_SOC_AHB_GPU	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_GPU(/;"	d
ANDES_PCU_SOC_AHB_IDE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_IDE(/;"	d
ANDES_PCU_SOC_AHB_INTC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_INTC(/;"	d
ANDES_PCU_SOC_AHB_L2CC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_L2CC(/;"	d
ANDES_PCU_SOC_AHB_LPCIO	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_LPCIO(/;"	d
ANDES_PCU_SOC_AHB_LPCREG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_LPCREG(/;"	d
ANDES_PCU_SOC_AHB_PCIIO	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_PCIIO(/;"	d
ANDES_PCU_SOC_AHB_PCIMEM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_PCIMEM(/;"	d
ANDES_PCU_SOC_AHB_SPIROM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_SPIROM(/;"	d
ANDES_PCU_SOC_AHB_USBOTG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_AHB_USBOTG(/;"	d
ANDES_PCU_SOC_APB_AC97I2S	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_AC97I2S(/;"	d
ANDES_PCU_SOC_APB_CFC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_CFC(/;"	d
ANDES_PCU_SOC_APB_GPIO	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_GPIO(/;"	d
ANDES_PCU_SOC_APB_I2C	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_I2C(/;"	d
ANDES_PCU_SOC_APB_PCU	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_PCU(/;"	d
ANDES_PCU_SOC_APB_PWM	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_PWM(/;"	d
ANDES_PCU_SOC_APB_RTC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_RTC(/;"	d
ANDES_PCU_SOC_APB_SDC	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_SDC(/;"	d
ANDES_PCU_SOC_APB_SSP	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_SSP(/;"	d
ANDES_PCU_SOC_APB_TMR	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_TMR(/;"	d
ANDES_PCU_SOC_APB_UART1	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_UART1(/;"	d
ANDES_PCU_SOC_APB_UART2	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_UART2(/;"	d
ANDES_PCU_SOC_APB_WDT	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_APB_WDT(/;"	d
ANDES_PCU_SOC_ID_DEVICEID	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_ID_DEVICEID(/;"	d
ANDES_PCU_SOC_ID_VER_MAJOR	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_ID_VER_MAJOR(/;"	d
ANDES_PCU_SOC_ID_VER_MINOR	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SOC_ID_VER_MINOR(/;"	d
ANDES_PCU_SPINFO_OFFSET	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SPINFO_OFFSET(/;"	d
ANDES_PCU_SPINFO_SIZE	include/andestech/andes_pcu.h	/^#define ANDES_PCU_SPINFO_SIZE(/;"	d
ANDES_PCU_WESR_POLOR	include/andestech/andes_pcu.h	/^#define ANDES_PCU_WESR_POLOR(/;"	d
ANDES_PCU_WEST_SIG	include/andestech/andes_pcu.h	/^#define ANDES_PCU_WEST_SIG(/;"	d
ANDROID_BOOT_IMAGE	cmd/fastboot/Kconfig	/^config ANDROID_BOOT_IMAGE$/;"	c	menu:Fastboot support
ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	common/image-android.c	/^#define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	/;"	d	file:
ANDR_BOOT_ARGS_SIZE	include/android_image.h	/^#define ANDR_BOOT_ARGS_SIZE /;"	d
ANDR_BOOT_MAGIC	include/android_image.h	/^#define ANDR_BOOT_MAGIC /;"	d
ANDR_BOOT_MAGIC_SIZE	include/android_image.h	/^#define ANDR_BOOT_MAGIC_SIZE /;"	d
ANDR_BOOT_NAME_SIZE	include/android_image.h	/^#define ANDR_BOOT_NAME_SIZE /;"	d
ANNOUNCE	net/link_local.c	/^	ANNOUNCE,$/;"	e	enum:ll_state_t	file:
ANNOUNCE_INTERVAL	net/link_local.c	/^	ANNOUNCE_INTERVAL = 2,$/;"	e	enum:__anonc9befdc40103	file:
ANNOUNCE_NUM	net/link_local.c	/^	ANNOUNCE_NUM = 2,$/;"	e	enum:__anonc9befdc40103	file:
ANNOUNCE_WAIT	net/link_local.c	/^	ANNOUNCE_WAIT = 2,$/;"	e	enum:__anonc9befdc40103	file:
ANOMALY_05000066	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000066 /;"	d
ANOMALY_05000067	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000067 /;"	d
ANOMALY_05000070	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000070 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000074	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000074 /;"	d
ANOMALY_05000079	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000079 /;"	d
ANOMALY_05000086	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000086 /;"	d
ANOMALY_05000088	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000088 /;"	d
ANOMALY_05000092	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000092 /;"	d
ANOMALY_05000093	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000093 /;"	d
ANOMALY_05000095	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000095 /;"	d
ANOMALY_05000096	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000096 /;"	d
ANOMALY_05000097	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000097 /;"	d
ANOMALY_05000098	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000098 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000099	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000099 /;"	d
ANOMALY_05000100	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000100 /;"	d
ANOMALY_05000101	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000101 /;"	d
ANOMALY_05000102	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000102 /;"	d
ANOMALY_05000103	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000103 /;"	d
ANOMALY_05000104	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000104 /;"	d
ANOMALY_05000105	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000105 /;"	d
ANOMALY_05000106	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000106 /;"	d
ANOMALY_05000107	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000107 /;"	d
ANOMALY_05000109	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000109 /;"	d
ANOMALY_05000114	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000114 /;"	d
ANOMALY_05000115	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000115 /;"	d
ANOMALY_05000116	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000116 /;"	d
ANOMALY_05000116	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000116 /;"	d
ANOMALY_05000117	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000117 /;"	d
ANOMALY_05000118	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000118 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000119	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000119 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000120	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000120 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000122	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000122 /;"	d
ANOMALY_05000123	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000123 /;"	d
ANOMALY_05000124	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000124 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000125	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000125 /;"	d
ANOMALY_05000126	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000126 /;"	d
ANOMALY_05000127	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000127 /;"	d
ANOMALY_05000134	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000134 /;"	d
ANOMALY_05000135	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000135 /;"	d
ANOMALY_05000136	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000136 /;"	d
ANOMALY_05000137	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000137 /;"	d
ANOMALY_05000138	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000138 /;"	d
ANOMALY_05000139	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000139 /;"	d
ANOMALY_05000140	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000140 /;"	d
ANOMALY_05000140	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000140 /;"	d
ANOMALY_05000141	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000141 /;"	d
ANOMALY_05000141	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000141 /;"	d
ANOMALY_05000142	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000142 /;"	d
ANOMALY_05000142	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000142 /;"	d
ANOMALY_05000143	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000143 /;"	d
ANOMALY_05000144	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000144 /;"	d
ANOMALY_05000144	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000144 /;"	d
ANOMALY_05000145	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000145 /;"	d
ANOMALY_05000145	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000145 /;"	d
ANOMALY_05000146	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000146 /;"	d
ANOMALY_05000146	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000146 /;"	d
ANOMALY_05000147	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000147 /;"	d
ANOMALY_05000147	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000147 /;"	d
ANOMALY_05000148	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000148 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000149	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000149 /;"	d
ANOMALY_05000150	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000150 /;"	d
ANOMALY_05000151	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000151 /;"	d
ANOMALY_05000152	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000152 /;"	d
ANOMALY_05000153	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000153 /;"	d
ANOMALY_05000153	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000153 /;"	d
ANOMALY_05000154	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000154 /;"	d
ANOMALY_05000154	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000154 /;"	d
ANOMALY_05000155	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000155 /;"	d
ANOMALY_05000156	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000156 /;"	d
ANOMALY_05000157	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000157 /;"	d
ANOMALY_05000157	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000157 /;"	d
ANOMALY_05000157	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000157 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000158 /;"	d
ANOMALY_05000158_WORKAROUND	arch/blackfin/include/asm/cplb.h	/^# define ANOMALY_05000158_WORKAROUND /;"	d
ANOMALY_05000159	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000159 /;"	d
ANOMALY_05000160	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000160 /;"	d
ANOMALY_05000161	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000161 /;"	d
ANOMALY_05000162	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000162 /;"	d
ANOMALY_05000163	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000163 /;"	d
ANOMALY_05000163	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000163 /;"	d
ANOMALY_05000166	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000166 /;"	d
ANOMALY_05000166	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000166 /;"	d
ANOMALY_05000166	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000166 /;"	d
ANOMALY_05000167	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000167 /;"	d
ANOMALY_05000167	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000167 /;"	d
ANOMALY_05000168	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000168 /;"	d
ANOMALY_05000168	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000168 /;"	d
ANOMALY_05000169	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000169 /;"	d
ANOMALY_05000169	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000169 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000171	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000171 /;"	d
ANOMALY_05000172	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000172 /;"	d
ANOMALY_05000173	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000173 /;"	d
ANOMALY_05000173	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000173 /;"	d
ANOMALY_05000174	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000174 /;"	d
ANOMALY_05000174	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000174 /;"	d
ANOMALY_05000175	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000175 /;"	d
ANOMALY_05000175	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000175 /;"	d
ANOMALY_05000176	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000176 /;"	d
ANOMALY_05000176	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000176 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000179	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000179 /;"	d
ANOMALY_05000180	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000180 /;"	d
ANOMALY_05000180	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000180 /;"	d
ANOMALY_05000180	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000180 /;"	d
ANOMALY_05000180	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000180 /;"	d
ANOMALY_05000181	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000181 /;"	d
ANOMALY_05000181	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000181 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000182	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000182 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000183	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000183 /;"	d
ANOMALY_05000184	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000184 /;"	d
ANOMALY_05000185	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000185 /;"	d
ANOMALY_05000185	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000185 /;"	d
ANOMALY_05000186	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000186 /;"	d
ANOMALY_05000187	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000187 /;"	d
ANOMALY_05000188	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000188 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000189	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000189 /;"	d
ANOMALY_05000190	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000190 /;"	d
ANOMALY_05000191	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000191 /;"	d
ANOMALY_05000191	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000191 /;"	d
ANOMALY_05000192	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000192 /;"	d
ANOMALY_05000193	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000193 /;"	d
ANOMALY_05000193	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000193 /;"	d
ANOMALY_05000193	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000193 /;"	d
ANOMALY_05000194	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000194 /;"	d
ANOMALY_05000194	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000194 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000198	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000198 /;"	d
ANOMALY_05000199	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000199 /;"	d
ANOMALY_05000199	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000199 /;"	d
ANOMALY_05000199	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000199 /;"	d
ANOMALY_05000200	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000200 /;"	d
ANOMALY_05000200	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000200 /;"	d
ANOMALY_05000201	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000201 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000202	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000202 /;"	d
ANOMALY_05000203	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000203 /;"	d
ANOMALY_05000204	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000204 /;"	d
ANOMALY_05000204	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000204 /;"	d
ANOMALY_05000205	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000205 /;"	d
ANOMALY_05000206	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000206 /;"	d
ANOMALY_05000207	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000207 /;"	d
ANOMALY_05000207	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000207 /;"	d
ANOMALY_05000208	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000208 /;"	d
ANOMALY_05000208	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000208 /;"	d
ANOMALY_05000209	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000209 /;"	d
ANOMALY_05000209	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000209 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000215	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000215 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000219	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000219 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000220	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000220 /;"	d
ANOMALY_05000225	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000225 /;"	d
ANOMALY_05000225	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000225 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000227	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000227 /;"	d
ANOMALY_05000229	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000229 /;"	d
ANOMALY_05000229	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000229 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000230	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000230 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000231	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000231 /;"	d
ANOMALY_05000232	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000232 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000233	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000233 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000234	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000234 /;"	d
ANOMALY_05000237	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000237 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000242	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000242 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000244	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000244 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000245	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000245 /;"	d
ANOMALY_05000246	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000246 /;"	d
ANOMALY_05000247	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000247 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000248	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000248 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000250	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000250 /;"	d
ANOMALY_05000251	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000251 /;"	d
ANOMALY_05000252	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000252 /;"	d
ANOMALY_05000253	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000253 /;"	d
ANOMALY_05000253	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000253 /;"	d
ANOMALY_05000253	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000253 /;"	d
ANOMALY_05000253	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000253 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000254	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000254 /;"	d
ANOMALY_05000255	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000255 /;"	d
ANOMALY_05000255	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000255 /;"	d
ANOMALY_05000256	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000256 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000257	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000257 /;"	d
ANOMALY_05000258	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000258 /;"	d
ANOMALY_05000258	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000258 /;"	d
ANOMALY_05000258	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000258 /;"	d
ANOMALY_05000260	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000260 /;"	d
ANOMALY_05000260	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000260 /;"	d
ANOMALY_05000260	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000260 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000261	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000261 /;"	d
ANOMALY_05000262	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000262 /;"	d
ANOMALY_05000262	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000262 /;"	d
ANOMALY_05000262	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000262 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000263	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000263 /;"	d
ANOMALY_05000264	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000264 /;"	d
ANOMALY_05000264	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000264 /;"	d
ANOMALY_05000264	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000264 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000265	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000265 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000266	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000266 /;"	d
ANOMALY_05000267	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000267 /;"	d
ANOMALY_05000268	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000268 /;"	d
ANOMALY_05000269	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000269 /;"	d
ANOMALY_05000269	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000269 /;"	d
ANOMALY_05000270	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000270 /;"	d
ANOMALY_05000270	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000270 /;"	d
ANOMALY_05000270	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000270 /;"	d
ANOMALY_05000270	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000270 /;"	d
ANOMALY_05000271	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000271 /;"	d
ANOMALY_05000272	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000272 /;"	d
ANOMALY_05000272	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000272 /;"	d
ANOMALY_05000272	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000272 /;"	d
ANOMALY_05000272	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000272 /;"	d
ANOMALY_05000272	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000272 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000273	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000273 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000274	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000274 /;"	d
ANOMALY_05000275	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000275 /;"	d
ANOMALY_05000276	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000276 /;"	d
ANOMALY_05000276	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000276 /;"	d
ANOMALY_05000277	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000277 /;"	d
ANOMALY_05000277	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000277 /;"	d
ANOMALY_05000277	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000277 /;"	d
ANOMALY_05000277	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000277 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000278	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000278 /;"	d
ANOMALY_05000280	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000280 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000281	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000281 /;"	d
ANOMALY_05000282	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000282 /;"	d
ANOMALY_05000282	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000282 /;"	d
ANOMALY_05000282	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000282 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000283	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000283 /;"	d
ANOMALY_05000285	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000285 /;"	d
ANOMALY_05000285	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000285 /;"	d
ANOMALY_05000285	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000285 /;"	d
ANOMALY_05000285	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000285 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000287	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000287 /;"	d
ANOMALY_05000288	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000288 /;"	d
ANOMALY_05000288	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000288 /;"	d
ANOMALY_05000288	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000288 /;"	d
ANOMALY_05000288	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000288 /;"	d
ANOMALY_05000291	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000291 /;"	d
ANOMALY_05000293	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000293 /;"	d
ANOMALY_05000294	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000294 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000301	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000301 /;"	d
ANOMALY_05000302	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000302 /;"	d
ANOMALY_05000302	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000302 /;"	d
ANOMALY_05000304	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000304 /;"	d
ANOMALY_05000304	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000304 /;"	d
ANOMALY_05000304	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000304 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000305	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000305 /;"	d
ANOMALY_05000306	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000306 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000307	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000307 /;"	d
ANOMALY_05000309	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000309 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000310	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000310 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000311	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000311 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000312	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000312 /;"	d
ANOMALY_05000313	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000313 /;"	d
ANOMALY_05000313	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000313 /;"	d
ANOMALY_05000313	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000313 /;"	d
ANOMALY_05000313	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000313 /;"	d
ANOMALY_05000313	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000313 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000315	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000315 /;"	d
ANOMALY_05000316	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000316 /;"	d
ANOMALY_05000317	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000317 /;"	d
ANOMALY_05000318	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000318 /;"	d
ANOMALY_05000319	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000319 /;"	d
ANOMALY_05000320	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000320 /;"	d
ANOMALY_05000321	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000321 /;"	d
ANOMALY_05000322	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000322 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000323	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000323 /;"	d
ANOMALY_05000324	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000324 /;"	d
ANOMALY_05000325	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000325 /;"	d
ANOMALY_05000326	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000326 /;"	d
ANOMALY_05000327	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000327 /;"	d
ANOMALY_05000328	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000328 /;"	d
ANOMALY_05000328	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000328 /;"	d
ANOMALY_05000329	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000329 /;"	d
ANOMALY_05000330	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000330 /;"	d
ANOMALY_05000330	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000330 /;"	d
ANOMALY_05000331	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000331 /;"	d
ANOMALY_05000332	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000332 /;"	d
ANOMALY_05000333	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000333 /;"	d
ANOMALY_05000334	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000334 /;"	d
ANOMALY_05000335	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000335 /;"	d
ANOMALY_05000336	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000336 /;"	d
ANOMALY_05000337	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000337 /;"	d
ANOMALY_05000337	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000337 /;"	d
ANOMALY_05000338	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000338 /;"	d
ANOMALY_05000339	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000339 /;"	d
ANOMALY_05000340	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000340 /;"	d
ANOMALY_05000341	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000341 /;"	d
ANOMALY_05000341	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000341 /;"	d
ANOMALY_05000342	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000342 /;"	d
ANOMALY_05000343	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000343 /;"	d
ANOMALY_05000344	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000344 /;"	d
ANOMALY_05000346	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000346 /;"	d
ANOMALY_05000346	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000346 /;"	d
ANOMALY_05000346_value	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000346_value /;"	d
ANOMALY_05000346_value	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000346_value /;"	d
ANOMALY_05000347	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000347 /;"	d
ANOMALY_05000347	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000347 /;"	d
ANOMALY_05000348	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000348 /;"	d
ANOMALY_05000349	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000349 /;"	d
ANOMALY_05000350	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000350 /;"	d
ANOMALY_05000351	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000351 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000353	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000353 /;"	d
ANOMALY_05000355	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000355 /;"	d
ANOMALY_05000355	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000355 /;"	d
ANOMALY_05000355	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000355 /;"	d
ANOMALY_05000355	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000355 /;"	d
ANOMALY_05000356	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000356 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000357	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000357 /;"	d
ANOMALY_05000359	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000359 /;"	d
ANOMALY_05000360	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000360 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000362	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000362 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000363	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000363 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000364	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000364 /;"	d
ANOMALY_05000365	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000365 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000366	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000366 /;"	d
ANOMALY_05000367	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000367 /;"	d
ANOMALY_05000368	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000368 /;"	d
ANOMALY_05000369	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000369 /;"	d
ANOMALY_05000370	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000370 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000371	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000371 /;"	d
ANOMALY_05000372	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000372 /;"	d
ANOMALY_05000374	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000374 /;"	d
ANOMALY_05000375	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000375 /;"	d
ANOMALY_05000376	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000376 /;"	d
ANOMALY_05000378	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000378 /;"	d
ANOMALY_05000379	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000379 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000380	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000380 /;"	d
ANOMALY_05000382	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000382 /;"	d
ANOMALY_05000382	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000382 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000383	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000383 /;"	d
ANOMALY_05000385	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000385 /;"	d
ANOMALY_05000385	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000385 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000386	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000386 /;"	d
ANOMALY_05000387	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000387 /;"	d
ANOMALY_05000387	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000387 /;"	d
ANOMALY_05000388	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000388 /;"	d
ANOMALY_05000388	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000388 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000389	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000389 /;"	d
ANOMALY_05000390	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000390 /;"	d
ANOMALY_05000391	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000391 /;"	d
ANOMALY_05000392	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000392 /;"	d
ANOMALY_05000392	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000392 /;"	d
ANOMALY_05000393	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000393 /;"	d
ANOMALY_05000393	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000393 /;"	d
ANOMALY_05000394	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000394 /;"	d
ANOMALY_05000394	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000394 /;"	d
ANOMALY_05000395	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000395 /;"	d
ANOMALY_05000395	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000395 /;"	d
ANOMALY_05000396	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000396 /;"	d
ANOMALY_05000396	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000396 /;"	d
ANOMALY_05000397	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000397 /;"	d
ANOMALY_05000397	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000397 /;"	d
ANOMALY_05000398	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000398 /;"	d
ANOMALY_05000399	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000399 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000400	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000400 /;"	d
ANOMALY_05000401	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000401 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000402	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000402 /;"	d
ANOMALY_05000403	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000403 /;"	d
ANOMALY_05000403	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000403 /;"	d
ANOMALY_05000403	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000403 /;"	d
ANOMALY_05000403	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000403 /;"	d
ANOMALY_05000403	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000403 /;"	d
ANOMALY_05000404	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000404 /;"	d
ANOMALY_05000404	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000404 /;"	d
ANOMALY_05000405	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000405 /;"	d
ANOMALY_05000405	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000405 /;"	d
ANOMALY_05000405	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000405 /;"	d
ANOMALY_05000406	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000406 /;"	d
ANOMALY_05000407	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000407 /;"	d
ANOMALY_05000407	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000407 /;"	d
ANOMALY_05000408	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000408 /;"	d
ANOMALY_05000408	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000408 /;"	d
ANOMALY_05000408	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000408 /;"	d
ANOMALY_05000409	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000409 /;"	d
ANOMALY_05000409	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000409 /;"	d
ANOMALY_05000410	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000410 /;"	d
ANOMALY_05000411	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000411 /;"	d
ANOMALY_05000411	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000411 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000412	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000412 /;"	d
ANOMALY_05000413	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000413 /;"	d
ANOMALY_05000414	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000414 /;"	d
ANOMALY_05000414	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000414 /;"	d
ANOMALY_05000415	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000415 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000416	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000416 /;"	d
ANOMALY_05000417	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000417 /;"	d
ANOMALY_05000418	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000418 /;"	d
ANOMALY_05000420	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000420 /;"	d
ANOMALY_05000421	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000421 /;"	d
ANOMALY_05000421	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000421 /;"	d
ANOMALY_05000422	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000422 /;"	d
ANOMALY_05000422	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000422 /;"	d
ANOMALY_05000423	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000423 /;"	d
ANOMALY_05000424	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000424 /;"	d
ANOMALY_05000425	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000425 /;"	d
ANOMALY_05000425	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000425 /;"	d
ANOMALY_05000425	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000425 /;"	d
ANOMALY_05000425	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000425 /;"	d
ANOMALY_05000425	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000425 /;"	d
ANOMALY_05000425	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000425 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000426	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000426 /;"	d
ANOMALY_05000427	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000427 /;"	d
ANOMALY_05000428	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000428 /;"	d
ANOMALY_05000429	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000429 /;"	d
ANOMALY_05000429	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000429 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000430	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000430 /;"	d
ANOMALY_05000431	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000431 /;"	d
ANOMALY_05000431	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000431 /;"	d
ANOMALY_05000431	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000431 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000432	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000432 /;"	d
ANOMALY_05000434	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000434 /;"	d
ANOMALY_05000434	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000434 /;"	d
ANOMALY_05000434	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000434 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000435	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000435 /;"	d
ANOMALY_05000436	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000436 /;"	d
ANOMALY_05000438	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000438 /;"	d
ANOMALY_05000439	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000439 /;"	d
ANOMALY_05000439	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000439 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000440	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000440 /;"	d
ANOMALY_05000442	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000442 /;"	d
ANOMALY_05000442	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000442 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000443	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000443 /;"	d
ANOMALY_05000444	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000444 /;"	d
ANOMALY_05000445	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000445 /;"	d
ANOMALY_05000446	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000446 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000447	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000447 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000448	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000448 /;"	d
ANOMALY_05000449	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000449 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000450	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000450 /;"	d
ANOMALY_05000451	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000451 /;"	d
ANOMALY_05000452	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000452 /;"	d
ANOMALY_05000452	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000452 /;"	d
ANOMALY_05000452	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000452 /;"	d
ANOMALY_05000453	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000453 /;"	d
ANOMALY_05000455	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000455 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000456	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000456 /;"	d
ANOMALY_05000457	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000457 /;"	d
ANOMALY_05000457	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000457 /;"	d
ANOMALY_05000458	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000458 /;"	d
ANOMALY_05000460	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000460 /;"	d
ANOMALY_05000460	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000460 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000461	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000461 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000462	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000462 /;"	d
ANOMALY_05000463	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000463 /;"	d
ANOMALY_05000464	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000464 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000465	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000465 /;"	d
ANOMALY_05000466	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000466 /;"	d
ANOMALY_05000466	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000466 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000467	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000467 /;"	d
ANOMALY_05000469	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000469 /;"	d
ANOMALY_05000469	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000469 /;"	d
ANOMALY_05000471	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000471 /;"	d
ANOMALY_05000471	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000471 /;"	d
ANOMALY_05000472	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000472 /;"	d
ANOMALY_05000472	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000472 /;"	d
ANOMALY_05000472	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000472 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000473	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000473 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000474	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000474 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000475	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000475 /;"	d
ANOMALY_05000476	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000476 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000477	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000477 /;"	d
ANOMALY_05000478	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000478 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000480	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000480 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000481	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000481 /;"	d
ANOMALY_05000482	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000482 /;"	d
ANOMALY_05000483	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000483 /;"	d
ANOMALY_05000483	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000483 /;"	d
ANOMALY_05000484	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000484 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000485	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000485 /;"	d
ANOMALY_05000486	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000486 /;"	d
ANOMALY_05000487	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000487 /;"	d
ANOMALY_05000489	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000489 /;"	d
ANOMALY_05000489	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000489 /;"	d
ANOMALY_05000489	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000489 /;"	d
ANOMALY_05000489	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000489 /;"	d
ANOMALY_05000489	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000489 /;"	d
ANOMALY_05000490	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000490 /;"	d
ANOMALY_05000490	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000490 /;"	d
ANOMALY_05000490	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000490 /;"	d
ANOMALY_05000490	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000490 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000491	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_05000491 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000494	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000494 /;"	d
ANOMALY_05000495	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000495 /;"	d
ANOMALY_05000498	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000498 /;"	d
ANOMALY_05000498	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000498 /;"	d
ANOMALY_05000498	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000498 /;"	d
ANOMALY_05000498	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000498 /;"	d
ANOMALY_05000500	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000500 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000501	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define ANOMALY_05000501 /;"	d
ANOMALY_05000502	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define ANOMALY_05000502 /;"	d
ANOMALY_16000003	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000003 /;"	d
ANOMALY_16000004	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000004 /;"	d
ANOMALY_16000005	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000005 /;"	d
ANOMALY_16000006	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000006 /;"	d
ANOMALY_16000007	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000007 /;"	d
ANOMALY_16000008	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000008 /;"	d
ANOMALY_16000009	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000009 /;"	d
ANOMALY_16000010	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000010 /;"	d
ANOMALY_16000011	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000011 /;"	d
ANOMALY_16000012	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000012 /;"	d
ANOMALY_16000013	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000013 /;"	d
ANOMALY_16000014	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000014 /;"	d
ANOMALY_16000015	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000015 /;"	d
ANOMALY_16000017	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000017 /;"	d
ANOMALY_16000018	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000018 /;"	d
ANOMALY_16000019	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000019 /;"	d
ANOMALY_16000020	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000020 /;"	d
ANOMALY_16000021	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000021 /;"	d
ANOMALY_16000022	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000022 /;"	d
ANOMALY_16000027	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000027 /;"	d
ANOMALY_16000030	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define ANOMALY_16000030 /;"	d
ANOMALY_BF526	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^# define ANOMALY_BF526 /;"	d
ANOMALY_BF527	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^# define ANOMALY_BF527 /;"	d
ANOMALY_BF531	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^# define ANOMALY_BF531 /;"	d
ANOMALY_BF532	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^# define ANOMALY_BF532 /;"	d
ANOMALY_BF533	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^# define ANOMALY_BF533 /;"	d
ANOMALY_BF534	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^# define ANOMALY_BF534 /;"	d
ANOMALY_BF536	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^# define ANOMALY_BF536 /;"	d
ANOMALY_BF537	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^# define ANOMALY_BF537 /;"	d
ANOMALY_BF538	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^# define ANOMALY_BF538 /;"	d
ANOMALY_BF539	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^# define ANOMALY_BF539 /;"	d
ANSI_CHAR_MAX	drivers/input/input.c	/^#define ANSI_CHAR_MAX	/;"	d	file:
ANSI_CLEAR_CONSOLE	include/ansi.h	/^#define ANSI_CLEAR_CONSOLE	/;"	d
ANSI_CLEAR_LINE	include/ansi.h	/^#define ANSI_CLEAR_LINE	/;"	d
ANSI_CLEAR_LINE_TO_END	include/ansi.h	/^#define ANSI_CLEAR_LINE_TO_END	/;"	d
ANSI_COLOR_RESET	include/ansi.h	/^#define ANSI_COLOR_RESET	/;"	d
ANSI_COLOR_REVERSE	include/ansi.h	/^#define ANSI_COLOR_REVERSE	/;"	d
ANSI_CURSOR_BACK	include/ansi.h	/^#define ANSI_CURSOR_BACK	/;"	d
ANSI_CURSOR_COLUMN	include/ansi.h	/^#define ANSI_CURSOR_COLUMN	/;"	d
ANSI_CURSOR_DOWN	include/ansi.h	/^#define ANSI_CURSOR_DOWN	/;"	d
ANSI_CURSOR_FORWARD	include/ansi.h	/^#define ANSI_CURSOR_FORWARD	/;"	d
ANSI_CURSOR_HIDE	include/ansi.h	/^#define ANSI_CURSOR_HIDE	/;"	d
ANSI_CURSOR_NEXTLINE	include/ansi.h	/^#define ANSI_CURSOR_NEXTLINE	/;"	d
ANSI_CURSOR_POSITION	include/ansi.h	/^#define ANSI_CURSOR_POSITION	/;"	d
ANSI_CURSOR_PREVIOUSLINE	include/ansi.h	/^#define ANSI_CURSOR_PREVIOUSLINE	/;"	d
ANSI_CURSOR_SHOW	include/ansi.h	/^#define ANSI_CURSOR_SHOW	/;"	d
ANSI_CURSOR_UP	include/ansi.h	/^#define ANSI_CURSOR_UP	/;"	d
ANSWER_SIZE	board/esd/vme8349/caddy.h	/^#define ANSWER_SIZE	/;"	d
ANX9804_ANALOG_DEBUG_REG1	drivers/video/anx9804.c	/^#define ANX9804_ANALOG_DEBUG_REG1	/;"	d	file:
ANX9804_ANALOG_DEBUG_REG3	drivers/video/anx9804.c	/^#define ANX9804_ANALOG_DEBUG_REG3	/;"	d	file:
ANX9804_ANALOG_POWER_DOWN_REG	drivers/video/anx9804.c	/^#define ANX9804_ANALOG_POWER_DOWN_REG	/;"	d	file:
ANX9804_DATA_RATE_1620M	drivers/video/anx9804.h	/^#define ANX9804_DATA_RATE_1620M	/;"	d
ANX9804_DATA_RATE_2700M	drivers/video/anx9804.h	/^#define ANX9804_DATA_RATE_2700M	/;"	d
ANX9804_DEV_IDH_REG	drivers/video/anx9804.c	/^#define ANX9804_DEV_IDH_REG	/;"	d	file:
ANX9804_HDCP_CONTROL_0_REG	drivers/video/anx9804.c	/^#define ANX9804_HDCP_CONTROL_0_REG	/;"	d	file:
ANX9804_LANE_COUNT_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_LANE_COUNT_SET_REG	/;"	d	file:
ANX9804_LINK_BW_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_LINK_BW_SET_REG	/;"	d	file:
ANX9804_LINK_DEBUG_REG	drivers/video/anx9804.c	/^#define ANX9804_LINK_DEBUG_REG	/;"	d	file:
ANX9804_LINK_TRAINING_CTRL_EN	drivers/video/anx9804.c	/^#define ANX9804_LINK_TRAINING_CTRL_EN	/;"	d	file:
ANX9804_LINK_TRAINING_CTRL_REG	drivers/video/anx9804.c	/^#define ANX9804_LINK_TRAINING_CTRL_REG	/;"	d	file:
ANX9804_PLL_CTRL3	drivers/video/anx9804.c	/^#define ANX9804_PLL_CTRL3	/;"	d	file:
ANX9804_PLL_CTRL_REG	drivers/video/anx9804.c	/^#define ANX9804_PLL_CTRL_REG	/;"	d	file:
ANX9804_PLL_FILTER_CTRL	drivers/video/anx9804.c	/^#define ANX9804_PLL_FILTER_CTRL	/;"	d	file:
ANX9804_PLL_FILTER_CTRL1	drivers/video/anx9804.c	/^#define ANX9804_PLL_FILTER_CTRL1	/;"	d	file:
ANX9804_PLL_FILTER_CTRL3	drivers/video/anx9804.c	/^#define ANX9804_PLL_FILTER_CTRL3	/;"	d	file:
ANX9804_POWERD_AUDIO	drivers/video/anx9804.c	/^#define ANX9804_POWERD_AUDIO	/;"	d	file:
ANX9804_POWERD_CTRL_REG	drivers/video/anx9804.c	/^#define ANX9804_POWERD_CTRL_REG	/;"	d	file:
ANX9804_RST_CTRL2_AC_MODE	drivers/video/anx9804.c	/^#define ANX9804_RST_CTRL2_AC_MODE	/;"	d	file:
ANX9804_RST_CTRL2_AUX	drivers/video/anx9804.c	/^#define ANX9804_RST_CTRL2_AUX	/;"	d	file:
ANX9804_RST_CTRL2_REG	drivers/video/anx9804.c	/^#define ANX9804_RST_CTRL2_REG	/;"	d	file:
ANX9804_RST_CTRL_REG	drivers/video/anx9804.c	/^#define ANX9804_RST_CTRL_REG	/;"	d	file:
ANX9804_SYS_CTRL2_CHA_STA	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL2_CHA_STA	/;"	d	file:
ANX9804_SYS_CTRL2_REG	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL2_REG	/;"	d	file:
ANX9804_SYS_CTRL3_F_HPD	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL3_F_HPD	/;"	d	file:
ANX9804_SYS_CTRL3_F_VALID	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL3_F_VALID	/;"	d	file:
ANX9804_SYS_CTRL3_HPD_CTRL	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL3_HPD_CTRL	/;"	d	file:
ANX9804_SYS_CTRL3_REG	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL3_REG	/;"	d	file:
ANX9804_SYS_CTRL3_VALID_CTRL	drivers/video/anx9804.c	/^#define ANX9804_SYS_CTRL3_VALID_CTRL	/;"	d	file:
ANX9804_TRAINING_LANE0_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_TRAINING_LANE0_SET_REG	/;"	d	file:
ANX9804_TRAINING_LANE1_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_TRAINING_LANE1_SET_REG	/;"	d	file:
ANX9804_TRAINING_LANE2_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_TRAINING_LANE2_SET_REG	/;"	d	file:
ANX9804_TRAINING_LANE3_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_TRAINING_LANE3_SET_REG	/;"	d	file:
ANX9804_TRAINING_PTN_SET_REG	drivers/video/anx9804.c	/^#define ANX9804_TRAINING_PTN_SET_REG	/;"	d	file:
ANX9804_VID_CTRL1_EDGE	drivers/video/anx9804.c	/^#define ANX9804_VID_CTRL1_EDGE	/;"	d	file:
ANX9804_VID_CTRL1_REG	drivers/video/anx9804.c	/^#define ANX9804_VID_CTRL1_REG	/;"	d	file:
ANX9804_VID_CTRL1_VID_EN	drivers/video/anx9804.c	/^#define ANX9804_VID_CTRL1_VID_EN	/;"	d	file:
ANX9804_VID_CTRL2_REG	drivers/video/anx9804.c	/^#define ANX9804_VID_CTRL2_REG	/;"	d	file:
ANY	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
ANYBUT	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
ANYOF	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
AP325RXA_FLASH_BANK_SIZE	include/configs/ap325rxa.h	/^#define AP325RXA_FLASH_BANK_SIZE	/;"	d
AP325RXA_FLASH_BASE_1	include/configs/ap325rxa.h	/^#define AP325RXA_FLASH_BASE_1	/;"	d
AP325RXA_SDRAM_BASE	include/configs/ap325rxa.h	/^#define AP325RXA_SDRAM_BASE	/;"	d
APB0_CLK_DIV_RATIO	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB0_CLK_DIV_RATIO(/;"	d
APB0_CLK_DIV_RATIO	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB0_CLK_DIV_RATIO(/;"	d
APB0_DIV_1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB0_DIV_1	/;"	d
APB0_DIV_1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB0_DIV_1	/;"	d
APB0_DIV_2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB0_DIV_2	/;"	d
APB0_DIV_2	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB0_DIV_2	/;"	d
APB0_DIV_4	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB0_DIV_4	/;"	d
APB0_DIV_4	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB0_DIV_4	/;"	d
APB0_DIV_8	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB0_DIV_8	/;"	d
APB0_DIV_8	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB0_DIV_8	/;"	d
APB0_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB0_DIV_SHIFT	/;"	d
APB0_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB0_DIV_SHIFT	/;"	d
APB0_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB0_SRC_CLK_SELECT_SHIFT /;"	d
APB0_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB0_SRC_CLK_SELECT_SHIFT /;"	d
APB0_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB0_SRC_MASK /;"	d
APB0_SRC_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB0_SRC_MASK /;"	d
APB0_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB0_SRC_OSC24M /;"	d
APB0_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB0_SRC_OSC24M /;"	d
APB0_SRC_PLL_PERIPH0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB0_SRC_PLL_PERIPH0 /;"	d
APB0_SRC_PLL_PERIPH0	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB0_SRC_PLL_PERIPH0 /;"	d
APB1_CLK_RATE_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_M(/;"	d
APB1_CLK_RATE_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_M(/;"	d
APB1_CLK_RATE_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_M_MASK /;"	d
APB1_CLK_RATE_M_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_M_MASK /;"	d
APB1_CLK_RATE_N_1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_N_1	/;"	d
APB1_CLK_RATE_N_1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_N_1	/;"	d
APB1_CLK_RATE_N_2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_N_2	/;"	d
APB1_CLK_RATE_N_2	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_N_2	/;"	d
APB1_CLK_RATE_N_4	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_N_4	/;"	d
APB1_CLK_RATE_N_4	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_N_4	/;"	d
APB1_CLK_RATE_N_8	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_N_8	/;"	d
APB1_CLK_RATE_N_8	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_N_8	/;"	d
APB1_CLK_RATE_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_RATE_N_MASK	/;"	d
APB1_CLK_RATE_N_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_RATE_N_MASK	/;"	d
APB1_CLK_SRC_LOSC	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_SRC_LOSC	/;"	d
APB1_CLK_SRC_LOSC	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_SRC_LOSC	/;"	d
APB1_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_SRC_MASK	/;"	d
APB1_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_SRC_MASK	/;"	d
APB1_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_SRC_OSC24M	/;"	d
APB1_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_SRC_OSC24M	/;"	d
APB1_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_CLK_SRC_PLL6	/;"	d
APB1_CLK_SRC_PLL6	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_CLK_SRC_PLL6	/;"	d
APB1_GATE_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_GATE_TWI_MASK	/;"	d
APB1_GATE_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_GATE_TWI_MASK	/;"	d
APB1_GATE_TWI_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_GATE_TWI_MASK	/;"	d
APB1_GATE_TWI_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_GATE_TWI_MASK	/;"	d
APB1_GATE_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_GATE_TWI_SHIFT	/;"	d
APB1_GATE_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_GATE_TWI_SHIFT	/;"	d
APB1_GATE_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_GATE_TWI_SHIFT	/;"	d
APB1_GATE_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_GATE_TWI_SHIFT	/;"	d
APB1_GATE_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_GATE_UART_MASK	/;"	d
APB1_GATE_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_GATE_UART_MASK	/;"	d
APB1_GATE_UART_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_GATE_UART_MASK	/;"	d
APB1_GATE_UART_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_GATE_UART_MASK	/;"	d
APB1_GATE_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define APB1_GATE_UART_SHIFT	/;"	d
APB1_GATE_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_GATE_UART_SHIFT	/;"	d
APB1_GATE_UART_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define APB1_GATE_UART_SHIFT	/;"	d
APB1_GATE_UART_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_GATE_UART_SHIFT	/;"	d
APB1_PERIPH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define APB1_PERIPH_BASE	/;"	d
APB1_RESET_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_RESET_TWI_MASK	/;"	d
APB1_RESET_TWI_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_RESET_TWI_MASK	/;"	d
APB1_RESET_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_RESET_TWI_SHIFT	/;"	d
APB1_RESET_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_RESET_TWI_SHIFT	/;"	d
APB1_RESET_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_RESET_UART_MASK	/;"	d
APB1_RESET_UART_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_RESET_UART_MASK	/;"	d
APB1_RESET_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define APB1_RESET_UART_SHIFT	/;"	d
APB1_RESET_UART_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define APB1_RESET_UART_SHIFT	/;"	d
APB2_26M_EN	arch/arm/include/asm/arch-armada100/armada100.h	/^#define APB2_26M_EN	/;"	d
APB2_CLK_RATE_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_M(/;"	d
APB2_CLK_RATE_M	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_M(/;"	d
APB2_CLK_RATE_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_M(/;"	d
APB2_CLK_RATE_M	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_M(/;"	d
APB2_CLK_RATE_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_M_MASK /;"	d
APB2_CLK_RATE_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_M_MASK /;"	d
APB2_CLK_RATE_M_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_M_MASK /;"	d
APB2_CLK_RATE_M_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_M_MASK /;"	d
APB2_CLK_RATE_N_1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_N_1	/;"	d
APB2_CLK_RATE_N_1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_1	/;"	d
APB2_CLK_RATE_N_1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_N_1	/;"	d
APB2_CLK_RATE_N_1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_1	/;"	d
APB2_CLK_RATE_N_2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_N_2	/;"	d
APB2_CLK_RATE_N_2	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_2	/;"	d
APB2_CLK_RATE_N_2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_N_2	/;"	d
APB2_CLK_RATE_N_2	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_2	/;"	d
APB2_CLK_RATE_N_4	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_N_4	/;"	d
APB2_CLK_RATE_N_4	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_4	/;"	d
APB2_CLK_RATE_N_4	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_N_4	/;"	d
APB2_CLK_RATE_N_4	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_4	/;"	d
APB2_CLK_RATE_N_8	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_N_8	/;"	d
APB2_CLK_RATE_N_8	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_8	/;"	d
APB2_CLK_RATE_N_8	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_N_8	/;"	d
APB2_CLK_RATE_N_8	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_8	/;"	d
APB2_CLK_RATE_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_RATE_N_MASK	/;"	d
APB2_CLK_RATE_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_MASK	/;"	d
APB2_CLK_RATE_N_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_RATE_N_MASK	/;"	d
APB2_CLK_RATE_N_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_RATE_N_MASK	/;"	d
APB2_CLK_SRC_LOSC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_SRC_LOSC	/;"	d
APB2_CLK_SRC_LOSC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_LOSC	/;"	d
APB2_CLK_SRC_LOSC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_SRC_LOSC	/;"	d
APB2_CLK_SRC_LOSC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_LOSC	/;"	d
APB2_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_SRC_MASK	/;"	d
APB2_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_MASK	/;"	d
APB2_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_SRC_MASK	/;"	d
APB2_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_MASK	/;"	d
APB2_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_SRC_OSC24M	/;"	d
APB2_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_OSC24M	/;"	d
APB2_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_SRC_OSC24M	/;"	d
APB2_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_OSC24M	/;"	d
APB2_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_CLK_SRC_PLL6	/;"	d
APB2_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_PLL6	/;"	d
APB2_CLK_SRC_PLL6	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_CLK_SRC_PLL6	/;"	d
APB2_CLK_SRC_PLL6	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_CLK_SRC_PLL6	/;"	d
APB2_GATE_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_GATE_TWI_MASK	/;"	d
APB2_GATE_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_GATE_TWI_MASK	/;"	d
APB2_GATE_TWI_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_GATE_TWI_MASK	/;"	d
APB2_GATE_TWI_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_GATE_TWI_MASK	/;"	d
APB2_GATE_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_GATE_TWI_SHIFT	/;"	d
APB2_GATE_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_GATE_TWI_SHIFT	/;"	d
APB2_GATE_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_GATE_TWI_SHIFT	/;"	d
APB2_GATE_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_GATE_TWI_SHIFT	/;"	d
APB2_GATE_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_GATE_UART_MASK	/;"	d
APB2_GATE_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_GATE_UART_MASK	/;"	d
APB2_GATE_UART_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_GATE_UART_MASK	/;"	d
APB2_GATE_UART_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_GATE_UART_MASK	/;"	d
APB2_GATE_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_GATE_UART_SHIFT	/;"	d
APB2_GATE_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_GATE_UART_SHIFT	/;"	d
APB2_GATE_UART_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_GATE_UART_SHIFT	/;"	d
APB2_GATE_UART_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_GATE_UART_SHIFT	/;"	d
APB2_PERIPH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define APB2_PERIPH_BASE	/;"	d
APB2_RESET_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_RESET_TWI_MASK	/;"	d
APB2_RESET_TWI_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_RESET_TWI_MASK	/;"	d
APB2_RESET_TWI_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_RESET_TWI_MASK	/;"	d
APB2_RESET_TWI_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_RESET_TWI_MASK	/;"	d
APB2_RESET_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_RESET_TWI_SHIFT	/;"	d
APB2_RESET_TWI_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_RESET_TWI_SHIFT	/;"	d
APB2_RESET_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_RESET_TWI_SHIFT	/;"	d
APB2_RESET_TWI_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_RESET_TWI_SHIFT	/;"	d
APB2_RESET_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_RESET_UART_MASK	/;"	d
APB2_RESET_UART_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_RESET_UART_MASK	/;"	d
APB2_RESET_UART_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_RESET_UART_MASK	/;"	d
APB2_RESET_UART_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_RESET_UART_MASK	/;"	d
APB2_RESET_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define APB2_RESET_UART_SHIFT	/;"	d
APB2_RESET_UART_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define APB2_RESET_UART_SHIFT	/;"	d
APB2_RESET_UART_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define APB2_RESET_UART_SHIFT	/;"	d
APB2_RESET_UART_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define APB2_RESET_UART_SHIFT	/;"	d
APBC_APBCLK	arch/arm/include/asm/arch-armada100/armada100.h	/^#define APBC_APBCLK /;"	d
APBC_FNCLK	arch/arm/include/asm/arch-armada100/armada100.h	/^#define APBC_FNCLK /;"	d
APBC_FNCLKSEL	arch/arm/include/asm/arch-armada100/armada100.h	/^#define APBC_FNCLKSEL(/;"	d
APBC_RST	arch/arm/include/asm/arch-armada100/armada100.h	/^#define APBC_RST /;"	d
APBDEV_PMC_DPD_SAMPLE	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_DPD_SAMPLE	/;"	d	file:
APBDEV_PMC_DPD_SAMPLE_ON_DISABLE	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_DPD_SAMPLE_ON_DISABLE	/;"	d	file:
APBDEV_PMC_DPD_SAMPLE_ON_ENABLE	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_DPD_SAMPLE_ON_ENABLE	/;"	d	file:
APBDEV_PMC_IO_DPD2_REQ	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ	/;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK /;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF /;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON /;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_CODE_IDLE	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_CODE_IDLE /;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_CODE_SHIFT	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_CODE_SHIFT /;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF	/;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_LVDS_ON	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_LVDS_ON	/;"	d	file:
APBDEV_PMC_IO_DPD2_REQ_LVDS_SHIFT	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_REQ_LVDS_SHIFT	/;"	d	file:
APBDEV_PMC_IO_DPD2_STATUS	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_STATUS	/;"	d	file:
APBDEV_PMC_IO_DPD2_STATUS_LVDS_OFF	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_OFF	/;"	d	file:
APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON	/;"	d	file:
APBDEV_PMC_IO_DPD2_STATUS_LVDS_SHIFT	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_SHIFT	/;"	d	file:
APBDEV_PMC_SEL_DPD_TIM	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_SEL_DPD_TIM	/;"	d	file:
APBDEV_PMC_SEL_DPD_TIM_SEL_DPD_TIM_DEFAULT	drivers/video/tegra124/sor.c	/^#define APBDEV_PMC_SEL_DPD_TIM_SEL_DPD_TIM_DEFAULT	/;"	d	file:
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_HSADC	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_HSADC	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_MASK	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND0	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND1	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND2	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND3	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND4	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND5	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND5	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND6	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND6	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND7	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_NAND7	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_OFFSET	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP0	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP1	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP2	/;"	d
APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_SSP3	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_HSADC	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_HSADC	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_LCDIF	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_LCDIF	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_MASK	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND0	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND1	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND2	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND3	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND4	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND5	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND5	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND6	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND6	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND7	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_NAND7	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP0	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP1	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP2	/;"	d
APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP3	/;"	d
APBH_CHn_BAR_ADDRESS_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_BAR_ADDRESS_MASK	/;"	d
APBH_CHn_BAR_ADDRESS_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_BAR_ADDRESS_OFFSET	/;"	d
APBH_CHn_CMD_CHAIN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_CHAIN	/;"	d
APBH_CHn_CMD_CMDWORDS_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_CMDWORDS_MASK	/;"	d
APBH_CHn_CMD_CMDWORDS_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_CMDWORDS_OFFSET	/;"	d
APBH_CHn_CMD_COMMAND_DMA_READ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_COMMAND_DMA_READ	/;"	d
APBH_CHn_CMD_COMMAND_DMA_SENSE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_COMMAND_DMA_SENSE	/;"	d
APBH_CHn_CMD_COMMAND_DMA_WRITE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_COMMAND_DMA_WRITE	/;"	d
APBH_CHn_CMD_COMMAND_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_COMMAND_MASK	/;"	d
APBH_CHn_CMD_COMMAND_NO_DMA_XFER	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_COMMAND_NO_DMA_XFER	/;"	d
APBH_CHn_CMD_COMMAND_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_COMMAND_OFFSET	/;"	d
APBH_CHn_CMD_HALTONTERMINATE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_HALTONTERMINATE	/;"	d
APBH_CHn_CMD_IRQONCMPLT	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_IRQONCMPLT	/;"	d
APBH_CHn_CMD_NANDLOCK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_NANDLOCK	/;"	d
APBH_CHn_CMD_NANDWAIT4READY	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_NANDWAIT4READY	/;"	d
APBH_CHn_CMD_SEMAPHORE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_SEMAPHORE	/;"	d
APBH_CHn_CMD_WAIT4ENDCMD	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_WAIT4ENDCMD	/;"	d
APBH_CHn_CMD_XFER_COUNT_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_XFER_COUNT_MASK	/;"	d
APBH_CHn_CMD_XFER_COUNT_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CMD_XFER_COUNT_OFFSET	/;"	d
APBH_CHn_CURCMDAR_CMD_ADDR_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CURCMDAR_CMD_ADDR_MASK	/;"	d
APBH_CHn_CURCMDAR_CMD_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_CURCMDAR_CMD_ADDR_OFFSET	/;"	d
APBH_CHn_DEBUG1_BURST	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_BURST	/;"	d
APBH_CHn_DEBUG1_END	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_END	/;"	d
APBH_CHn_DEBUG1_KICK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_KICK	/;"	d
APBH_CHn_DEBUG1_LOCK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_LOCK	/;"	d
APBH_CHn_DEBUG1_NEXTCMDADDRVALID	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_NEXTCMDADDRVALID	/;"	d
APBH_CHn_DEBUG1_RD_FIFO_EMPTY	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_RD_FIFO_EMPTY	/;"	d
APBH_CHn_DEBUG1_RD_FIFO_FULL	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_RD_FIFO_FULL	/;"	d
APBH_CHn_DEBUG1_READY	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_READY	/;"	d
APBH_CHn_DEBUG1_REQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_REQ	/;"	d
APBH_CHn_DEBUG1_RSVD1_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_RSVD1_MASK	/;"	d
APBH_CHn_DEBUG1_RSVD1_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_RSVD1_OFFSET	/;"	d
APBH_CHn_DEBUG1_SENSE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_SENSE	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_CHECK_CHAIN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_CHECK_CHAIN	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_CHECK_WAIT	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_CHECK_WAIT	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_HALT_AFTER_TERM	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_HALT_AFTER_TERM	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_IDLE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_IDLE	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_MASK	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_OFFSET	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_PIO_REQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_PIO_REQ	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_READ_FLUSH	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_READ_FLUSH	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_READ_REQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_READ_REQ	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_READ_WAIT	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_READ_WAIT	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD1	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD2	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD3	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_REQ_CMD4	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_REQ_WAIT	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_REQ_WAIT	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_TERMINATE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_TERMINATE	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_WAIT_END	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_WAIT_END	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_WAIT_READY	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_WAIT_READY	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_WRITE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_WRITE	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_WRITE_WAIT	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_WRITE_WAIT	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_XFER_COMPLETE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_XFER_COMPLETE	/;"	d
APBH_CHn_DEBUG1_STATEMACHINE_XFER_DECODE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_STATEMACHINE_XFER_DECODE	/;"	d
APBH_CHn_DEBUG1_WR_FIFO_EMPTY	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_WR_FIFO_EMPTY	/;"	d
APBH_CHn_DEBUG1_WR_FIFO_FULL	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG1_WR_FIFO_FULL	/;"	d
APBH_CHn_DEBUG2_AHB_BYTES_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG2_AHB_BYTES_MASK	/;"	d
APBH_CHn_DEBUG2_AHB_BYTES_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG2_AHB_BYTES_OFFSET	/;"	d
APBH_CHn_DEBUG2_APB_BYTES_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG2_APB_BYTES_MASK	/;"	d
APBH_CHn_DEBUG2_APB_BYTES_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_DEBUG2_APB_BYTES_OFFSET	/;"	d
APBH_CHn_NXTCMDAR_CMD_ADDR_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_NXTCMDAR_CMD_ADDR_MASK	/;"	d
APBH_CHn_NXTCMDAR_CMD_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_NXTCMDAR_CMD_ADDR_OFFSET	/;"	d
APBH_CHn_SEMA_INCREMENT_SEMA_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_INCREMENT_SEMA_MASK	/;"	d
APBH_CHn_SEMA_INCREMENT_SEMA_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_INCREMENT_SEMA_OFFSET	/;"	d
APBH_CHn_SEMA_PHORE_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_PHORE_MASK	/;"	d
APBH_CHn_SEMA_PHORE_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_PHORE_OFFSET	/;"	d
APBH_CHn_SEMA_RSVD1_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_RSVD1_MASK	/;"	d
APBH_CHn_SEMA_RSVD1_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_RSVD1_OFFSET	/;"	d
APBH_CHn_SEMA_RSVD2_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_RSVD2_MASK	/;"	d
APBH_CHn_SEMA_RSVD2_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CHn_SEMA_RSVD2_OFFSET	/;"	d
APBH_CTRL0_AHB_BURST8_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_AHB_BURST8_EN	/;"	d
APBH_CTRL0_APB_BURST_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_APB_BURST_EN	/;"	d
APBH_CTRL0_CLKGATE	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_HSADC	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_HSADC	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_LCDIF	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_LCDIF	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_MASK	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND0	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND1	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND2	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND3	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND4	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND5	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND5	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND6	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND6	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_NAND7	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_NAND7	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_OFFSET	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_SSP	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_SSP	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_SSP0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_SSP0	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_SSP1	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_SSP1	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_SSP2	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_SSP2	/;"	d
APBH_CTRL0_CLKGATE_CHANNEL_SSP3	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_CLKGATE_CHANNEL_SSP3	/;"	d
APBH_CTRL0_RESET_CHANNEL_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_RESET_CHANNEL_MASK	/;"	d
APBH_CTRL0_RESET_CHANNEL_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_RESET_CHANNEL_OFFSET	/;"	d
APBH_CTRL0_RSVD0_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_RSVD0_MASK	/;"	d
APBH_CTRL0_RSVD0_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_RSVD0_OFFSET	/;"	d
APBH_CTRL0_SFTRST	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL0_SFTRST	/;"	d
APBH_CTRL1_CH0_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH0_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH0_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH0_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH10_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH10_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH10_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH10_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH11_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH11_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH11_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH11_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH12_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH12_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH12_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH12_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH13_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH13_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH13_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH13_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH14_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH14_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH14_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH14_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH15_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH15_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH15_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH15_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH1_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH1_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH1_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH1_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH2_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH2_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH2_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH2_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH3_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH3_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH3_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH3_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH4_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH4_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH4_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH4_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH5_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH5_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH5_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH5_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH6_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH6_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH6_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH6_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH7_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH7_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH7_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH7_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH8_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH8_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH8_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH8_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH9_CMDCMPLT_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH9_CMDCMPLT_IRQ	/;"	d
APBH_CTRL1_CH9_CMDCMPLT_IRQ_EN	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH9_CMDCMPLT_IRQ_EN	/;"	d
APBH_CTRL1_CH_CMDCMPLT_IRQ_EN_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH_CMDCMPLT_IRQ_EN_MASK	/;"	d
APBH_CTRL1_CH_CMDCMPLT_IRQ_EN_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL1_CH_CMDCMPLT_IRQ_EN_OFFSET	/;"	d
APBH_CTRL2_CH0_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH0_ERROR_IRQ	/;"	d
APBH_CTRL2_CH0_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH0_ERROR_STATUS	/;"	d
APBH_CTRL2_CH10_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH10_ERROR_IRQ	/;"	d
APBH_CTRL2_CH10_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH10_ERROR_STATUS	/;"	d
APBH_CTRL2_CH11_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH11_ERROR_IRQ	/;"	d
APBH_CTRL2_CH11_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH11_ERROR_STATUS	/;"	d
APBH_CTRL2_CH12_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH12_ERROR_IRQ	/;"	d
APBH_CTRL2_CH12_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH12_ERROR_STATUS	/;"	d
APBH_CTRL2_CH13_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH13_ERROR_IRQ	/;"	d
APBH_CTRL2_CH13_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH13_ERROR_STATUS	/;"	d
APBH_CTRL2_CH14_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH14_ERROR_IRQ	/;"	d
APBH_CTRL2_CH14_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH14_ERROR_STATUS	/;"	d
APBH_CTRL2_CH15_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH15_ERROR_IRQ	/;"	d
APBH_CTRL2_CH15_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH15_ERROR_STATUS	/;"	d
APBH_CTRL2_CH1_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH1_ERROR_IRQ	/;"	d
APBH_CTRL2_CH1_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH1_ERROR_STATUS	/;"	d
APBH_CTRL2_CH2_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH2_ERROR_IRQ	/;"	d
APBH_CTRL2_CH2_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH2_ERROR_STATUS	/;"	d
APBH_CTRL2_CH3_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH3_ERROR_IRQ	/;"	d
APBH_CTRL2_CH3_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH3_ERROR_STATUS	/;"	d
APBH_CTRL2_CH4_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH4_ERROR_IRQ	/;"	d
APBH_CTRL2_CH4_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH4_ERROR_STATUS	/;"	d
APBH_CTRL2_CH5_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH5_ERROR_IRQ	/;"	d
APBH_CTRL2_CH5_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH5_ERROR_STATUS	/;"	d
APBH_CTRL2_CH6_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH6_ERROR_IRQ	/;"	d
APBH_CTRL2_CH6_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH6_ERROR_STATUS	/;"	d
APBH_CTRL2_CH7_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH7_ERROR_IRQ	/;"	d
APBH_CTRL2_CH7_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH7_ERROR_STATUS	/;"	d
APBH_CTRL2_CH8_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH8_ERROR_IRQ	/;"	d
APBH_CTRL2_CH8_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH8_ERROR_STATUS	/;"	d
APBH_CTRL2_CH9_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH9_ERROR_IRQ	/;"	d
APBH_CTRL2_CH9_ERROR_STATUS	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_CTRL2_CH9_ERROR_STATUS	/;"	d
APBH_DEBUG_GPMI_ONE_FIFO	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEBUG_GPMI_ONE_FIFO	/;"	d
APBH_DEVSEL_CH0_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH0_MASK	/;"	d
APBH_DEVSEL_CH0_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH0_OFFSET	/;"	d
APBH_DEVSEL_CH10_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH10_MASK	/;"	d
APBH_DEVSEL_CH10_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH10_OFFSET	/;"	d
APBH_DEVSEL_CH11_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH11_MASK	/;"	d
APBH_DEVSEL_CH11_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH11_OFFSET	/;"	d
APBH_DEVSEL_CH12_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH12_MASK	/;"	d
APBH_DEVSEL_CH12_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH12_OFFSET	/;"	d
APBH_DEVSEL_CH13_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH13_MASK	/;"	d
APBH_DEVSEL_CH13_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH13_OFFSET	/;"	d
APBH_DEVSEL_CH14_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH14_MASK	/;"	d
APBH_DEVSEL_CH14_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH14_OFFSET	/;"	d
APBH_DEVSEL_CH15_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH15_MASK	/;"	d
APBH_DEVSEL_CH15_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH15_OFFSET	/;"	d
APBH_DEVSEL_CH1_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH1_MASK	/;"	d
APBH_DEVSEL_CH1_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH1_OFFSET	/;"	d
APBH_DEVSEL_CH2_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH2_MASK	/;"	d
APBH_DEVSEL_CH2_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH2_OFFSET	/;"	d
APBH_DEVSEL_CH3_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH3_MASK	/;"	d
APBH_DEVSEL_CH3_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH3_OFFSET	/;"	d
APBH_DEVSEL_CH4_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH4_MASK	/;"	d
APBH_DEVSEL_CH4_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH4_OFFSET	/;"	d
APBH_DEVSEL_CH5_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH5_MASK	/;"	d
APBH_DEVSEL_CH5_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH5_OFFSET	/;"	d
APBH_DEVSEL_CH6_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH6_MASK	/;"	d
APBH_DEVSEL_CH6_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH6_OFFSET	/;"	d
APBH_DEVSEL_CH7_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH7_MASK	/;"	d
APBH_DEVSEL_CH7_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH7_OFFSET	/;"	d
APBH_DEVSEL_CH8_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH8_MASK	/;"	d
APBH_DEVSEL_CH8_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH8_OFFSET	/;"	d
APBH_DEVSEL_CH9_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH9_MASK	/;"	d
APBH_DEVSEL_CH9_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DEVSEL_CH9_OFFSET	/;"	d
APBH_DMA_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define APBH_DMA_ARB_BASE_ADDR /;"	d
APBH_DMA_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define APBH_DMA_ARB_BASE_ADDR /;"	d
APBH_DMA_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define APBH_DMA_ARB_END_ADDR /;"	d
APBH_DMA_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define APBH_DMA_ARB_END_ADDR /;"	d
APBH_DMA_BURST_SIZE_CH0_BURST0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH0_BURST0	/;"	d
APBH_DMA_BURST_SIZE_CH0_BURST4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH0_BURST4	/;"	d
APBH_DMA_BURST_SIZE_CH0_BURST8	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH0_BURST8	/;"	d
APBH_DMA_BURST_SIZE_CH0_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH0_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH0_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH0_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH10_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH10_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH10_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH10_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH11_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH11_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH11_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH11_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH12_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH12_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH12_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH12_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH13_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH13_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH13_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH13_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH14_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH14_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH14_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH14_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH15_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH15_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH15_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH15_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH1_BURST0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH1_BURST0	/;"	d
APBH_DMA_BURST_SIZE_CH1_BURST4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH1_BURST4	/;"	d
APBH_DMA_BURST_SIZE_CH1_BURST8	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH1_BURST8	/;"	d
APBH_DMA_BURST_SIZE_CH1_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH1_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH1_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH1_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH2_BURST0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH2_BURST0	/;"	d
APBH_DMA_BURST_SIZE_CH2_BURST4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH2_BURST4	/;"	d
APBH_DMA_BURST_SIZE_CH2_BURST8	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH2_BURST8	/;"	d
APBH_DMA_BURST_SIZE_CH2_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH2_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH2_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH2_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH3_BURST0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH3_BURST0	/;"	d
APBH_DMA_BURST_SIZE_CH3_BURST4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH3_BURST4	/;"	d
APBH_DMA_BURST_SIZE_CH3_BURST8	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH3_BURST8	/;"	d
APBH_DMA_BURST_SIZE_CH3_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH3_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH3_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH3_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH4_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH4_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH4_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH4_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH5_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH5_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH5_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH5_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH6_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH6_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH6_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH6_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH7_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH7_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH7_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH7_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH8_BURST0	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH8_BURST0	/;"	d
APBH_DMA_BURST_SIZE_CH8_BURST4	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH8_BURST4	/;"	d
APBH_DMA_BURST_SIZE_CH8_BURST8	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH8_BURST8	/;"	d
APBH_DMA_BURST_SIZE_CH8_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH8_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH8_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH8_OFFSET	/;"	d
APBH_DMA_BURST_SIZE_CH9_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH9_MASK	/;"	d
APBH_DMA_BURST_SIZE_CH9_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_DMA_BURST_SIZE_CH9_OFFSET	/;"	d
APBH_VERSION_MAJOR_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_VERSION_MAJOR_MASK	/;"	d
APBH_VERSION_MAJOR_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_VERSION_MAJOR_OFFSET	/;"	d
APBH_VERSION_MINOR_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_VERSION_MINOR_MASK	/;"	d
APBH_VERSION_MINOR_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_VERSION_MINOR_OFFSET	/;"	d
APBH_VERSION_STEP_MASK	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_VERSION_STEP_MASK	/;"	d
APBH_VERSION_STEP_OFFSET	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define	APBH_VERSION_STEP_OFFSET	/;"	d
APBMCLKOFF	include/faraday/ftpmu010.h	/^	unsigned int	APBMCLKOFF;	\/* 0x3C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
APBUART_CTRL_DBG	include/grlib/apbuart.h	/^#define APBUART_CTRL_DBG /;"	d
APBUART_CTRL_FL	include/grlib/apbuart.h	/^#define APBUART_CTRL_FL /;"	d
APBUART_CTRL_LB	include/grlib/apbuart.h	/^#define APBUART_CTRL_LB /;"	d
APBUART_CTRL_PE	include/grlib/apbuart.h	/^#define APBUART_CTRL_PE /;"	d
APBUART_CTRL_PS	include/grlib/apbuart.h	/^#define APBUART_CTRL_PS /;"	d
APBUART_CTRL_RE	include/grlib/apbuart.h	/^#define APBUART_CTRL_RE /;"	d
APBUART_CTRL_RI	include/grlib/apbuart.h	/^#define APBUART_CTRL_RI /;"	d
APBUART_CTRL_TE	include/grlib/apbuart.h	/^#define APBUART_CTRL_TE /;"	d
APBUART_CTRL_TI	include/grlib/apbuart.h	/^#define APBUART_CTRL_TI /;"	d
APBUART_STATUS_BR	include/grlib/apbuart.h	/^#define APBUART_STATUS_BR /;"	d
APBUART_STATUS_DR	include/grlib/apbuart.h	/^#define APBUART_STATUS_DR /;"	d
APBUART_STATUS_ERR	include/grlib/apbuart.h	/^#define APBUART_STATUS_ERR /;"	d
APBUART_STATUS_FE	include/grlib/apbuart.h	/^#define APBUART_STATUS_FE /;"	d
APBUART_STATUS_OE	include/grlib/apbuart.h	/^#define APBUART_STATUS_OE /;"	d
APBUART_STATUS_PE	include/grlib/apbuart.h	/^#define APBUART_STATUS_PE /;"	d
APBUART_STATUS_THE	include/grlib/apbuart.h	/^#define APBUART_STATUS_THE /;"	d
APBUART_STATUS_TSE	include/grlib/apbuart.h	/^#define APBUART_STATUS_TSE /;"	d
APB_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define APB_BASE_ADDR	/;"	d
APB_MISC_PP_PINMUX_GLOBAL_0	arch/arm/mach-tegra/pinmux-common.c	/^#define APB_MISC_PP_PINMUX_GLOBAL_0 /;"	d	file:
APB_PSC_1	arch/arm/mach-stm32/stm32f1/clock.c	/^#define APB_PSC_1	/;"	d	file:
APB_PSC_1	arch/arm/mach-stm32/stm32f4/clock.c	/^#define APB_PSC_1	/;"	d	file:
APB_PSC_1	arch/arm/mach-stm32/stm32f7/clock.c	/^#define APB_PSC_1	/;"	d	file:
APB_PSC_16	arch/arm/mach-stm32/stm32f1/clock.c	/^#define APB_PSC_16	/;"	d	file:
APB_PSC_16	arch/arm/mach-stm32/stm32f4/clock.c	/^#define APB_PSC_16	/;"	d	file:
APB_PSC_16	arch/arm/mach-stm32/stm32f7/clock.c	/^#define APB_PSC_16	/;"	d	file:
APB_PSC_2	arch/arm/mach-stm32/stm32f1/clock.c	/^#define APB_PSC_2	/;"	d	file:
APB_PSC_2	arch/arm/mach-stm32/stm32f4/clock.c	/^#define APB_PSC_2	/;"	d	file:
APB_PSC_2	arch/arm/mach-stm32/stm32f7/clock.c	/^#define APB_PSC_2	/;"	d	file:
APB_PSC_4	arch/arm/mach-stm32/stm32f1/clock.c	/^#define APB_PSC_4	/;"	d	file:
APB_PSC_4	arch/arm/mach-stm32/stm32f4/clock.c	/^#define APB_PSC_4	/;"	d	file:
APB_PSC_4	arch/arm/mach-stm32/stm32f7/clock.c	/^#define APB_PSC_4	/;"	d	file:
APB_PSC_8	arch/arm/mach-stm32/stm32f1/clock.c	/^#define APB_PSC_8	/;"	d	file:
APB_PSC_8	arch/arm/mach-stm32/stm32f4/clock.c	/^#define APB_PSC_8	/;"	d	file:
APB_PSC_8	arch/arm/mach-stm32/stm32f7/clock.c	/^#define APB_PSC_8	/;"	d	file:
APB_SFR_ARBRITATION_CONF_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define APB_SFR_ARBRITATION_CONF_OFFSET	/;"	d
APB_SFR_ARBRITATION_CONF_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define APB_SFR_ARBRITATION_CONF_VAL	/;"	d
APB_SFR_INTERLEAVE_CONF_OFFSET	arch/arm/mach-exynos/exynos4_setup.h	/^#define APB_SFR_INTERLEAVE_CONF_OFFSET	/;"	d
APB_SFR_INTERLEAVE_CONF_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define APB_SFR_INTERLEAVE_CONF_VAL	/;"	d
APB_SFR_SLV_ADDR_MAP_CONF_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define APB_SFR_SLV_ADDR_MAP_CONF_VAL	/;"	d
APCS_CLOCK_BRANCH_ENA_VOTE	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define APCS_CLOCK_BRANCH_ENA_VOTE /;"	d	file:
APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1 /;"	d	file:
APCS_GPLL_ENA_VOTE	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define APCS_GPLL_ENA_VOTE /;"	d	file:
APCS_GPLL_ENA_VOTE_GPLL0	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define APCS_GPLL_ENA_VOTE_GPLL0 /;"	d	file:
APF27_PORT_INIT	board/armadeus/apf27/apf27.c	/^#define APF27_PORT_INIT(/;"	d	file:
APF27_init_fpga	board/armadeus/apf27/fpga.c	/^void APF27_init_fpga(void)$/;"	f	typeref:typename:void
APIC_EN	arch/x86/include/asm/arch-qemu/qemu.h	/^#define APIC_EN	/;"	d
API_DEV_CLOSE	include/api_public.h	/^	API_DEV_CLOSE,$/;"	e	enum:__anonf417d2e60103
API_DEV_ENUM	include/api_public.h	/^	API_DEV_ENUM,$/;"	e	enum:__anonf417d2e60103
API_DEV_OPEN	include/api_public.h	/^	API_DEV_OPEN,$/;"	e	enum:__anonf417d2e60103
API_DEV_READ	include/api_public.h	/^	API_DEV_READ,$/;"	e	enum:__anonf417d2e60103
API_DEV_WRITE	include/api_public.h	/^	API_DEV_WRITE,$/;"	e	enum:__anonf417d2e60103
API_DISPLAY_CLEAR	include/api_public.h	/^	API_DISPLAY_CLEAR,$/;"	e	enum:__anonf417d2e60103
API_DISPLAY_DRAW_BITMAP	include/api_public.h	/^	API_DISPLAY_DRAW_BITMAP,$/;"	e	enum:__anonf417d2e60103
API_DISPLAY_GET_INFO	include/api_public.h	/^	API_DISPLAY_GET_INFO,$/;"	e	enum:__anonf417d2e60103
API_EBUSY	include/api_public.h	/^#define API_EBUSY	/;"	d
API_EINVAL	include/api_public.h	/^#define API_EINVAL	/;"	d
API_EIO	include/api_public.h	/^#define API_EIO	/;"	d
API_ENODEV	include/api_public.h	/^#define API_ENODEV	/;"	d
API_ENOMEM	include/api_public.h	/^#define API_ENOMEM	/;"	d
API_ENV_ENUM	include/api_public.h	/^	API_ENV_ENUM,$/;"	e	enum:__anonf417d2e60103
API_ENV_GET	include/api_public.h	/^	API_ENV_GET,$/;"	e	enum:__anonf417d2e60103
API_ENV_SET	include/api_public.h	/^	API_ENV_SET,$/;"	e	enum:__anonf417d2e60103
API_ESYSC	include/api_public.h	/^#define API_ESYSC	/;"	d
API_GETC	include/api_public.h	/^	API_GETC,$/;"	e	enum:__anonf417d2e60103
API_GET_SYS_INFO	include/api_public.h	/^	API_GET_SYS_INFO,$/;"	e	enum:__anonf417d2e60103
API_GET_TIMER	include/api_public.h	/^	API_GET_TIMER,$/;"	e	enum:__anonf417d2e60103
API_HAL_KM_VERIFYCERTIFICATESIGNATURE_INDEX	arch/arm/cpu/armv7/omap-common/sec-common.c	/^#define API_HAL_KM_VERIFYCERTIFICATESIGNATURE_INDEX	/;"	d	file:
API_MAXCALL	include/api_public.h	/^	API_MAXCALL$/;"	e	enum:__anonf417d2e60103
API_PUTC	include/api_public.h	/^	API_PUTC,$/;"	e	enum:__anonf417d2e60103
API_PUTS	include/api_public.h	/^	API_PUTS,$/;"	e	enum:__anonf417d2e60103
API_RESET	include/api_public.h	/^	API_RESET,$/;"	e	enum:__anonf417d2e60103
API_RSVD	include/api_public.h	/^	API_RSVD = 0,$/;"	e	enum:__anonf417d2e60103
API_SEARCH_LEN	examples/api/glue.h	/^#define API_SEARCH_LEN	/;"	d
API_SIG_MAGIC	include/api_public.h	/^#define API_SIG_MAGIC	/;"	d
API_SIG_MAGLEN	include/api_public.h	/^#define API_SIG_MAGLEN	/;"	d
API_SIG_VERSION	include/api_public.h	/^#define API_SIG_VERSION	/;"	d
API_TSTC	include/api_public.h	/^	API_TSTC,$/;"	e	enum:__anonf417d2e60103
API_UDELAY	include/api_public.h	/^	API_UDELAY,$/;"	e	enum:__anonf417d2e60103
API_dev_close	api/api.c	/^static int API_dev_close(va_list ap)$/;"	f	typeref:typename:int	file:
API_dev_enum	api/api.c	/^static int API_dev_enum(va_list ap)$/;"	f	typeref:typename:int	file:
API_dev_open	api/api.c	/^static int API_dev_open(va_list ap)$/;"	f	typeref:typename:int	file:
API_dev_read	api/api.c	/^static int API_dev_read(va_list ap)$/;"	f	typeref:typename:int	file:
API_dev_write	api/api.c	/^static int API_dev_write(va_list ap)$/;"	f	typeref:typename:int	file:
API_display_clear	api/api.c	/^static int API_display_clear(va_list ap)$/;"	f	typeref:typename:int	file:
API_display_draw_bitmap	api/api.c	/^static int API_display_draw_bitmap(va_list ap)$/;"	f	typeref:typename:int	file:
API_display_get_info	api/api.c	/^static int API_display_get_info(va_list ap)$/;"	f	typeref:typename:int	file:
API_env_enum	api/api.c	/^static int API_env_enum(va_list ap)$/;"	f	typeref:typename:int	file:
API_env_get	api/api.c	/^static int API_env_get(va_list ap)$/;"	f	typeref:typename:int	file:
API_env_set	api/api.c	/^static int API_env_set(va_list ap)$/;"	f	typeref:typename:int	file:
API_get_sys_info	api/api.c	/^static int API_get_sys_info(va_list ap)$/;"	f	typeref:typename:int	file:
API_get_timer	api/api.c	/^static int API_get_timer(va_list ap)$/;"	f	typeref:typename:int	file:
API_getc	api/api.c	/^static int API_getc(va_list ap)$/;"	f	typeref:typename:int	file:
API_putc	api/api.c	/^static int API_putc(va_list ap)$/;"	f	typeref:typename:int	file:
API_puts	api/api.c	/^static int API_puts(va_list ap)$/;"	f	typeref:typename:int	file:
API_reset	api/api.c	/^static int API_reset(va_list ap)$/;"	f	typeref:typename:int	file:
API_tstc	api/api.c	/^static int API_tstc(va_list ap)$/;"	f	typeref:typename:int	file:
API_udelay	api/api.c	/^static int API_udelay(va_list ap)$/;"	f	typeref:typename:int	file:
APLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define APLL	/;"	d
APLL	arch/arm/mach-s5pc1xx/include/mach/clk.h	/^#define APLL	/;"	d
APLL_AFC	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_AFC	/;"	d
APLL_AFC	board/samsung/trats/setup.h	/^#define APLL_AFC	/;"	d
APLL_AFC_ENB	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_AFC_ENB	/;"	d
APLL_AFC_ENB	board/samsung/trats/setup.h	/^#define APLL_AFC_ENB	/;"	d
APLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define APLL_CON0_LOCKED	/;"	d
APLL_CON0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_CON0_VAL	/;"	d
APLL_CON0_VAL	board/samsung/trats/setup.h	/^#define APLL_CON0_VAL	/;"	d
APLL_CON1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_CON1_VAL	/;"	d
APLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define APLL_CON1_VAL	/;"	d
APLL_CON1_VAL	board/samsung/trats/setup.h	/^#define APLL_CON1_VAL	/;"	d
APLL_CP_CURR	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define APLL_CP_CURR	/;"	d	file:
APLL_FOUT	arch/arm/mach-exynos/exynos5_setup.h	/^#define APLL_FOUT	/;"	d
APLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define APLL_HZ	/;"	d
APLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define APLL_HZ	/;"	d
APLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define APLL_HZ	/;"	d
APLL_L_1600_MHZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	APLL_L_1600_MHZ,$/;"	e	enum:apll_l_frequencies
APLL_L_600_MHZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	APLL_L_600_MHZ,$/;"	e	enum:apll_l_frequencies
APLL_MDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_MDIV	/;"	d
APLL_MDIV	board/samsung/trats/setup.h	/^#define APLL_MDIV	/;"	d
APLL_MODE_DEEP	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	APLL_MODE_DEEP,$/;"	e	enum:__anon3783c4e20703
APLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	APLL_MODE_MASK		= 1,$/;"	e	enum:__anon375ccd790103
APLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	APLL_MODE_MASK		= 3,$/;"	e	enum:__anon3783c4e20703
APLL_MODE_NORM	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	APLL_MODE_NORM,$/;"	e	enum:__anon375ccd790103
APLL_MODE_NORMAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	APLL_MODE_NORMAL,$/;"	e	enum:__anon3783c4e20703
APLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	APLL_MODE_SHIFT		= 0,$/;"	e	enum:__anon375ccd790103
APLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	APLL_MODE_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20703
APLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	APLL_MODE_SLOW		= 0,$/;"	e	enum:__anon375ccd790103
APLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	APLL_MODE_SLOW		= 0,$/;"	e	enum:__anon3783c4e20703
APLL_PDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_PDIV	/;"	d
APLL_PDIV	board/samsung/trats/setup.h	/^#define APLL_PDIV	/;"	d
APLL_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_RATIO	/;"	d
APLL_RATIO	board/samsung/odroid/setup.h	/^#define APLL_RATIO(/;"	d
APLL_RATIO	board/samsung/trats/setup.h	/^#define APLL_RATIO	/;"	d
APLL_SDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define APLL_SDIV	/;"	d
APLL_SDIV	board/samsung/trats/setup.h	/^#define APLL_SDIV	/;"	d
APLL_SEL	board/samsung/odroid/setup.h	/^#define APLL_SEL(/;"	d
APMC_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  APMC_EN	/;"	d
APMC_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   APMC_EN	/;"	d
APM_16_BIT_SUPPORT	include/linux/apm_bios.h	/^#define APM_16_BIT_SUPPORT	/;"	d
APM_16_CONNECTED	include/linux/apm_bios.h	/^#define APM_16_CONNECTED	/;"	d
APM_16_UNSUPPORTED	include/linux/apm_bios.h	/^#define APM_16_UNSUPPORTED	/;"	d
APM_32_BIT_SUPPORT	include/linux/apm_bios.h	/^#define APM_32_BIT_SUPPORT	/;"	d
APM_32_CONNECTED	include/linux/apm_bios.h	/^#define APM_32_CONNECTED	/;"	d
APM_32_UNSUPPORTED	include/linux/apm_bios.h	/^#define APM_32_UNSUPPORTED	/;"	d
APM_BAD_DEVICE	include/linux/apm_bios.h	/^#define APM_BAD_DEVICE	/;"	d
APM_BAD_FUNCTION	include/linux/apm_bios.h	/^#define APM_BAD_FUNCTION	/;"	d
APM_BAD_PARAM	include/linux/apm_bios.h	/^#define APM_BAD_PARAM	/;"	d
APM_BAD_STATE	include/linux/apm_bios.h	/^#define APM_BAD_STATE	/;"	d
APM_BIOS_DISABLED	include/linux/apm_bios.h	/^#define APM_BIOS_DISABLED /;"	d
APM_BIOS_DISENGAGED	include/linux/apm_bios.h	/^#define APM_BIOS_DISENGAGED /;"	d
APM_CAPABILITY_CHANGE	include/linux/apm_bios.h	/^#define APM_CAPABILITY_CHANGE	/;"	d
APM_CAP_GLOBAL_STANDBY	include/linux/apm_bios.h	/^#define APM_CAP_GLOBAL_STANDBY	/;"	d
APM_CAP_GLOBAL_SUSPEND	include/linux/apm_bios.h	/^#define APM_CAP_GLOBAL_SUSPEND	/;"	d
APM_CAP_RESUME_STANDBY_PCMCIA	include/linux/apm_bios.h	/^#define APM_CAP_RESUME_STANDBY_PCMCIA	/;"	d
APM_CAP_RESUME_STANDBY_RING	include/linux/apm_bios.h	/^#define APM_CAP_RESUME_STANDBY_RING	/;"	d
APM_CAP_RESUME_STANDBY_TIMER	include/linux/apm_bios.h	/^#define APM_CAP_RESUME_STANDBY_TIMER	/;"	d
APM_CAP_RESUME_SUSPEND_PCMCIA	include/linux/apm_bios.h	/^#define APM_CAP_RESUME_SUSPEND_PCMCIA	/;"	d
APM_CAP_RESUME_SUSPEND_RING	include/linux/apm_bios.h	/^#define APM_CAP_RESUME_SUSPEND_RING	/;"	d
APM_CAP_RESUME_SUSPEND_TIMER	include/linux/apm_bios.h	/^#define APM_CAP_RESUME_SUSPEND_TIMER	/;"	d
APM_CONNECTED	include/linux/apm_bios.h	/^#define APM_CONNECTED	/;"	d
APM_CRITICAL_RESUME	include/linux/apm_bios.h	/^#define APM_CRITICAL_RESUME	/;"	d
APM_CRITICAL_SUSPEND	include/linux/apm_bios.h	/^#define APM_CRITICAL_SUSPEND	/;"	d
APM_CS	include/linux/apm_bios.h	/^#define APM_CS	/;"	d
APM_CS_16	include/linux/apm_bios.h	/^#define APM_CS_16	/;"	d
APM_DEVICE_ALL	include/linux/apm_bios.h	/^#define APM_DEVICE_ALL	/;"	d
APM_DEVICE_BALL	include/linux/apm_bios.h	/^#define APM_DEVICE_BALL	/;"	d
APM_DEVICE_BATTERY	include/linux/apm_bios.h	/^#define APM_DEVICE_BATTERY	/;"	d
APM_DEVICE_BIOS	include/linux/apm_bios.h	/^#define APM_DEVICE_BIOS	/;"	d
APM_DEVICE_CLASS	include/linux/apm_bios.h	/^#define APM_DEVICE_CLASS	/;"	d
APM_DEVICE_DISPLAY	include/linux/apm_bios.h	/^#define APM_DEVICE_DISPLAY	/;"	d
APM_DEVICE_MASK	include/linux/apm_bios.h	/^#define APM_DEVICE_MASK	/;"	d
APM_DEVICE_NETWORK	include/linux/apm_bios.h	/^#define APM_DEVICE_NETWORK	/;"	d
APM_DEVICE_OEM	include/linux/apm_bios.h	/^#define APM_DEVICE_OEM	/;"	d
APM_DEVICE_OLD_ALL	include/linux/apm_bios.h	/^#define APM_DEVICE_OLD_ALL	/;"	d
APM_DEVICE_PARALLEL	include/linux/apm_bios.h	/^#define APM_DEVICE_PARALLEL	/;"	d
APM_DEVICE_PCMCIA	include/linux/apm_bios.h	/^#define APM_DEVICE_PCMCIA	/;"	d
APM_DEVICE_SERIAL	include/linux/apm_bios.h	/^#define APM_DEVICE_SERIAL	/;"	d
APM_DEVICE_STORAGE	include/linux/apm_bios.h	/^#define APM_DEVICE_STORAGE	/;"	d
APM_DISABLED	include/linux/apm_bios.h	/^#define APM_DISABLED	/;"	d
APM_DS	include/linux/apm_bios.h	/^#define APM_DS	/;"	d
APM_FUNC_16BIT_CONN	include/linux/apm_bios.h	/^#define	APM_FUNC_16BIT_CONN	/;"	d
APM_FUNC_32BIT_CONN	include/linux/apm_bios.h	/^#define	APM_FUNC_32BIT_CONN	/;"	d
APM_FUNC_BUSY	include/linux/apm_bios.h	/^#define	APM_FUNC_BUSY	/;"	d
APM_FUNC_DISABLE_RING	include/linux/apm_bios.h	/^#define	APM_FUNC_DISABLE_RING	/;"	d
APM_FUNC_DISABLE_TIMER	include/linux/apm_bios.h	/^#define	APM_FUNC_DISABLE_TIMER	/;"	d
APM_FUNC_DISCONN	include/linux/apm_bios.h	/^#define	APM_FUNC_DISCONN	/;"	d
APM_FUNC_ENABLE_DEV_PM	include/linux/apm_bios.h	/^#define	APM_FUNC_ENABLE_DEV_PM	/;"	d
APM_FUNC_ENABLE_PM	include/linux/apm_bios.h	/^#define	APM_FUNC_ENABLE_PM	/;"	d
APM_FUNC_ENABLE_RING	include/linux/apm_bios.h	/^#define	APM_FUNC_ENABLE_RING	/;"	d
APM_FUNC_ENGAGE_PM	include/linux/apm_bios.h	/^#define	APM_FUNC_ENGAGE_PM	/;"	d
APM_FUNC_GET_CAP	include/linux/apm_bios.h	/^#define	APM_FUNC_GET_CAP	/;"	d
APM_FUNC_GET_EVENT	include/linux/apm_bios.h	/^#define	APM_FUNC_GET_EVENT	/;"	d
APM_FUNC_GET_RING	include/linux/apm_bios.h	/^#define	APM_FUNC_GET_RING	/;"	d
APM_FUNC_GET_STATE	include/linux/apm_bios.h	/^#define	APM_FUNC_GET_STATE	/;"	d
APM_FUNC_GET_STATUS	include/linux/apm_bios.h	/^#define	APM_FUNC_GET_STATUS	/;"	d
APM_FUNC_GET_TIMER	include/linux/apm_bios.h	/^#define	APM_FUNC_GET_TIMER	/;"	d
APM_FUNC_IDLE	include/linux/apm_bios.h	/^#define	APM_FUNC_IDLE	/;"	d
APM_FUNC_INST_CHECK	include/linux/apm_bios.h	/^#define	APM_FUNC_INST_CHECK	/;"	d
APM_FUNC_REAL_CONN	include/linux/apm_bios.h	/^#define	APM_FUNC_REAL_CONN	/;"	d
APM_FUNC_RESTORE_BIOS	include/linux/apm_bios.h	/^#define	APM_FUNC_RESTORE_BIOS	/;"	d
APM_FUNC_RESUME_ON_RING	include/linux/apm_bios.h	/^#define	APM_FUNC_RESUME_ON_RING	/;"	d
APM_FUNC_RESUME_TIMER	include/linux/apm_bios.h	/^#define	APM_FUNC_RESUME_TIMER	/;"	d
APM_FUNC_SET_STATE	include/linux/apm_bios.h	/^#define	APM_FUNC_SET_STATE	/;"	d
APM_FUNC_SET_TIMER	include/linux/apm_bios.h	/^#define	APM_FUNC_SET_TIMER	/;"	d
APM_FUNC_TIMER	include/linux/apm_bios.h	/^#define	APM_FUNC_TIMER	/;"	d
APM_FUNC_TIMER_DISABLE	include/linux/apm_bios.h	/^#define	APM_FUNC_TIMER_DISABLE	/;"	d
APM_FUNC_TIMER_ENABLE	include/linux/apm_bios.h	/^#define	APM_FUNC_TIMER_ENABLE	/;"	d
APM_FUNC_TIMER_GET	include/linux/apm_bios.h	/^#define	APM_FUNC_TIMER_GET	/;"	d
APM_FUNC_VERSION	include/linux/apm_bios.h	/^#define	APM_FUNC_VERSION	/;"	d
APM_IDLE_SLOWS_CLOCK	include/linux/apm_bios.h	/^#define APM_IDLE_SLOWS_CLOCK	/;"	d
APM_IOC_STANDBY	include/linux/apm_bios.h	/^#define APM_IOC_STANDBY	/;"	d
APM_IOC_SUSPEND	include/linux/apm_bios.h	/^#define APM_IOC_SUSPEND	/;"	d
APM_LOW_BATTERY	include/linux/apm_bios.h	/^#define APM_LOW_BATTERY	/;"	d
APM_MAX_BATTERIES	include/linux/apm_bios.h	/^#define APM_MAX_BATTERIES	/;"	d
APM_NORMAL_RESUME	include/linux/apm_bios.h	/^#define APM_NORMAL_RESUME	/;"	d
APM_NOT_CONNECTED	include/linux/apm_bios.h	/^#define APM_NOT_CONNECTED	/;"	d
APM_NOT_ENGAGED	include/linux/apm_bios.h	/^#define APM_NOT_ENGAGED	/;"	d
APM_NOT_PRESENT	include/linux/apm_bios.h	/^#define APM_NOT_PRESENT	/;"	d
APM_NO_ERROR	include/linux/apm_bios.h	/^#define APM_NO_ERROR	/;"	d
APM_NO_EVENTS	include/linux/apm_bios.h	/^#define APM_NO_EVENTS	/;"	d
APM_POWER_STATUS_CHANGE	include/linux/apm_bios.h	/^#define APM_POWER_STATUS_CHANGE	/;"	d
APM_RESUME_DISABLED	include/linux/apm_bios.h	/^#define APM_RESUME_DISABLED	/;"	d
APM_STANDBY_RESUME	include/linux/apm_bios.h	/^#define APM_STANDBY_RESUME	/;"	d
APM_STATE_BUSY	include/linux/apm_bios.h	/^#define APM_STATE_BUSY	/;"	d
APM_STATE_DISABLE	include/linux/apm_bios.h	/^#define APM_STATE_DISABLE	/;"	d
APM_STATE_DISENGAGE	include/linux/apm_bios.h	/^#define APM_STATE_DISENGAGE	/;"	d
APM_STATE_ENABLE	include/linux/apm_bios.h	/^#define APM_STATE_ENABLE	/;"	d
APM_STATE_ENGAGE	include/linux/apm_bios.h	/^#define APM_STATE_ENGAGE	/;"	d
APM_STATE_OEM_DEV	include/linux/apm_bios.h	/^#define APM_STATE_OEM_DEV	/;"	d
APM_STATE_OEM_SYS	include/linux/apm_bios.h	/^#define APM_STATE_OEM_SYS	/;"	d
APM_STATE_OFF	include/linux/apm_bios.h	/^#define APM_STATE_OFF	/;"	d
APM_STATE_READY	include/linux/apm_bios.h	/^#define APM_STATE_READY	/;"	d
APM_STATE_REJECT	include/linux/apm_bios.h	/^#define APM_STATE_REJECT	/;"	d
APM_STATE_STANDBY	include/linux/apm_bios.h	/^#define APM_STATE_STANDBY	/;"	d
APM_STATE_SUSPEND	include/linux/apm_bios.h	/^#define APM_STATE_SUSPEND	/;"	d
APM_SUCCESS	include/linux/apm_bios.h	/^#define APM_SUCCESS	/;"	d
APM_SYS_STANDBY	include/linux/apm_bios.h	/^#define APM_SYS_STANDBY	/;"	d
APM_SYS_SUSPEND	include/linux/apm_bios.h	/^#define APM_SYS_SUSPEND	/;"	d
APM_UPDATE_TIME	include/linux/apm_bios.h	/^#define APM_UPDATE_TIME	/;"	d
APM_USER_STANDBY	include/linux/apm_bios.h	/^#define APM_USER_STANDBY	/;"	d
APM_USER_SUSPEND	include/linux/apm_bios.h	/^#define APM_USER_SUSPEND	/;"	d
APPEND_CMD	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD(/;"	d
APPEND_CMD	drivers/crypto/fsl/desc_constr.h	/^APPEND_CMD(operation, OPERATION)$/;"	f
APPEND_CMD_LEN	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_LEN(/;"	d
APPEND_CMD_PTR	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_PTR(/;"	d
APPEND_CMD_PTR_EXTLEN	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_PTR_EXTLEN(/;"	d
APPEND_CMD_PTR_LEN	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_PTR_LEN(/;"	d
APPEND_CMD_PTR_TO_IMM	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_PTR_TO_IMM(/;"	d
APPEND_CMD_PTR_TO_IMM2	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_PTR_TO_IMM2(/;"	d
APPEND_CMD_RAW_IMM	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_RAW_IMM(/;"	d
APPEND_CMD_RET	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_CMD_RET(/;"	d
APPEND_CMD_RET	drivers/crypto/fsl/desc_constr.h	/^APPEND_CMD_RET(jump, JUMP)$/;"	f
APPEND_SEQ_PTR_INTLEN	drivers/crypto/fsl/desc_constr.h	/^#define APPEND_SEQ_PTR_INTLEN(/;"	d
APPLECORE_UTLEON3	include/ambapp_ids.h	/^#define APPLECORE_UTLEON3 /;"	d
APPLECORE_UTLEON3DSU	include/ambapp_ids.h	/^#define APPLECORE_UTLEON3DSU /;"	d
APPLECORE_devices	cmd/ambapp.c	/^static ambapp_device_name APPLECORE_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
APPLE_AUX_TYPE	disk/part_mac.h	/^#define APPLE_AUX_TYPE	/;"	d
APPS_CMD_RGCR_UPDATE	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define APPS_CMD_RGCR_UPDATE /;"	d	file:
APP_CODE_BARKER	tools/imximage.h	/^#define APP_CODE_BARKER	/;"	d
APR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define APR	/;"	d
APR	drivers/net/sh_eth.h	/^	APR,$/;"	e	enum:__anon5ef54f5a0103
APREBIT	board/freescale/mx28evk/iomux.c	/^#define APREBIT	/;"	d	file:
APR_AP	drivers/net/sh_eth.h	/^	APR_AP = 0x00000004,$/;"	e	enum:APR_BIT
APR_BIT	drivers/net/sh_eth.h	/^enum APR_BIT {$/;"	g
APS_APS	include/power/pfuze100_pmic.h	/^#define APS_APS	/;"	d
APS_OFF	include/power/pfuze100_pmic.h	/^#define APS_OFF	/;"	d
APS_PFM	include/power/pfuze100_pmic.h	/^#define APS_PFM	/;"	d
APTC_DEFAULT	drivers/net/ftmac110.h	/^#define APTC_DEFAULT /;"	d
APTC_RX_CYCLONG	drivers/net/ftmac110.h	/^#define APTC_RX_CYCLONG /;"	d
APTC_RX_CYCNORM	drivers/net/ftmac110.h	/^#define APTC_RX_CYCNORM /;"	d
APTC_RX_PTMO	drivers/net/ftmac110.h	/^#define APTC_RX_PTMO(/;"	d
APTC_TX_CYCLONG	drivers/net/ftmac110.h	/^#define APTC_TX_CYCLONG /;"	d
APTC_TX_CYCNORM	drivers/net/ftmac110.h	/^#define APTC_TX_CYCNORM /;"	d
APTC_TX_PTMO	drivers/net/ftmac110.h	/^#define APTC_TX_PTMO(/;"	d
APU_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define APU_FREQ /;"	d
APU_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define APU_FREQ /;"	d
APU_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define APU_FREQ /;"	d
APU_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define APU_FREQ /;"	d
APU_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define APU_FREQ /;"	d
AP_26M	arch/arm/include/asm/arch-armada100/armada100.h	/^#define AP_26M	/;"	d
AP_DEFAULT_BASE	arch/x86/include/asm/sipi.h	/^#define AP_DEFAULT_BASE /;"	d
AP_DEFAULT_SIZE	arch/x86/include/asm/sipi.h	/^#define AP_DEFAULT_SIZE /;"	d
AP_STACK_SIZE	arch/x86/Kconfig	/^config AP_STACK_SIZE$/;"	c	menu:x86 architecture
AQR105_IRQ_MASK	include/configs/ls1043ardb.h	/^#define AQR105_IRQ_MASK	/;"	d
AQR105_IRQ_MASK	include/configs/ls1046ardb.h	/^#define AQR105_IRQ_MASK	/;"	d
AQR405_IRQ_MASK	include/configs/ls2080ardb.h	/^#define AQR405_IRQ_MASK	/;"	d
AQUNTIA_10G_CTL	drivers/net/phy/aquantia.c	/^#define AQUNTIA_10G_CTL	/;"	d	file:
AQUNTIA_SPEED_LSB_MASK	drivers/net/phy/aquantia.c	/^#define AQUNTIA_SPEED_LSB_MASK	/;"	d	file:
AQUNTIA_SPEED_MSB_MASK	drivers/net/phy/aquantia.c	/^#define AQUNTIA_SPEED_MSB_MASK	/;"	d	file:
AQUNTIA_VENDOR_P1	drivers/net/phy/aquantia.c	/^#define AQUNTIA_VENDOR_P1	/;"	d	file:
AQ_PHY_ADDR1	include/configs/ls2080ardb.h	/^#define AQ_PHY_ADDR1	/;"	d
AQ_PHY_ADDR2	include/configs/ls2080ardb.h	/^#define AQ_PHY_ADDR2	/;"	d
AQ_PHY_ADDR3	include/configs/ls2080ardb.h	/^#define AQ_PHY_ADDR3	/;"	d
AQ_PHY_ADDR4	include/configs/ls2080ardb.h	/^#define AQ_PHY_ADDR4	/;"	d
AR	Makefile	/^AR		= $(CROSS_COMPILE)ar$/;"	m
AR71XX_AHB_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_AHB_DIV_MASK	/;"	d
AR71XX_AHB_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_AHB_DIV_SHIFT	/;"	d
AR71XX_APB_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_APB_BASE	/;"	d
AR71XX_CPU_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_CPU_DIV_MASK	/;"	d
AR71XX_CPU_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_CPU_DIV_SHIFT	/;"	d
AR71XX_DDR_CTRL_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_CTRL_BASE /;"	d
AR71XX_DDR_CTRL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_CTRL_SIZE	/;"	d
AR71XX_DDR_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_DIV_MASK	/;"	d
AR71XX_DDR_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_DIV_SHIFT	/;"	d
AR71XX_DDR_REG_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_CONFIG	/;"	d
AR71XX_DDR_REG_CONFIG2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_CONFIG2	/;"	d
AR71XX_DDR_REG_CONTROL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_CONTROL	/;"	d
AR71XX_DDR_REG_EMR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_EMR	/;"	d
AR71XX_DDR_REG_FLUSH_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_FLUSH_GE0	/;"	d
AR71XX_DDR_REG_FLUSH_GE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_FLUSH_GE1	/;"	d
AR71XX_DDR_REG_FLUSH_PCI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_FLUSH_PCI	/;"	d
AR71XX_DDR_REG_FLUSH_USB	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_FLUSH_USB	/;"	d
AR71XX_DDR_REG_MODE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_MODE	/;"	d
AR71XX_DDR_REG_PCI_WIN0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN0	/;"	d
AR71XX_DDR_REG_PCI_WIN1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN1	/;"	d
AR71XX_DDR_REG_PCI_WIN2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN2	/;"	d
AR71XX_DDR_REG_PCI_WIN3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN3	/;"	d
AR71XX_DDR_REG_PCI_WIN4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN4	/;"	d
AR71XX_DDR_REG_PCI_WIN5	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN5	/;"	d
AR71XX_DDR_REG_PCI_WIN6	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN6	/;"	d
AR71XX_DDR_REG_PCI_WIN7	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_PCI_WIN7	/;"	d
AR71XX_DDR_REG_RD_CYCLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_RD_CYCLE	/;"	d
AR71XX_DDR_REG_REFRESH	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_REFRESH	/;"	d
AR71XX_DDR_REG_TAP_CTRL0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_TAP_CTRL0	/;"	d
AR71XX_DDR_REG_TAP_CTRL1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_DDR_REG_TAP_CTRL1	/;"	d
AR71XX_EHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_EHCI_BASE	/;"	d
AR71XX_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_EHCI_SIZE	/;"	d
AR71XX_ETH0_PLL_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_ETH0_PLL_SHIFT	/;"	d
AR71XX_ETH1_PLL_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_ETH1_PLL_SHIFT	/;"	d
AR71XX_GE0_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GE0_BASE	/;"	d
AR71XX_GE0_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GE0_SIZE	/;"	d
AR71XX_GE1_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GE1_BASE	/;"	d
AR71XX_GE1_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GE1_SIZE	/;"	d
AR71XX_GPIO_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_BASE /;"	d
AR71XX_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_COUNT	/;"	d
AR71XX_GPIO_FUNC_SLIC_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_SLIC_EN	/;"	d
AR71XX_GPIO_FUNC_SPI_CS1_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_SPI_CS1_EN	/;"	d
AR71XX_GPIO_FUNC_SPI_CS2_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_SPI_CS2_EN	/;"	d
AR71XX_GPIO_FUNC_STEREO_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_STEREO_EN	/;"	d
AR71XX_GPIO_FUNC_UART_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_UART_EN	/;"	d
AR71XX_GPIO_FUNC_USB_CLK_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_USB_CLK_EN	/;"	d
AR71XX_GPIO_FUNC_USB_OC_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_FUNC_USB_OC_EN	/;"	d
AR71XX_GPIO_REG_CLEAR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_CLEAR	/;"	d
AR71XX_GPIO_REG_FUNC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_FUNC	/;"	d
AR71XX_GPIO_REG_IN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_IN	/;"	d
AR71XX_GPIO_REG_INT_ENABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_INT_ENABLE	/;"	d
AR71XX_GPIO_REG_INT_MODE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_INT_MODE	/;"	d
AR71XX_GPIO_REG_INT_PENDING	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_INT_PENDING	/;"	d
AR71XX_GPIO_REG_INT_POLARITY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_INT_POLARITY	/;"	d
AR71XX_GPIO_REG_INT_TYPE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_INT_TYPE	/;"	d
AR71XX_GPIO_REG_OE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_OE	/;"	d
AR71XX_GPIO_REG_OUT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_OUT	/;"	d
AR71XX_GPIO_REG_SET	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_REG_SET	/;"	d
AR71XX_GPIO_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_GPIO_SIZE	/;"	d
AR71XX_MII0_CTRL_IF_GMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII0_CTRL_IF_GMII	/;"	d
AR71XX_MII0_CTRL_IF_MII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII0_CTRL_IF_MII	/;"	d
AR71XX_MII0_CTRL_IF_RGMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII0_CTRL_IF_RGMII	/;"	d
AR71XX_MII0_CTRL_IF_RMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII0_CTRL_IF_RMII	/;"	d
AR71XX_MII1_CTRL_IF_RGMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII1_CTRL_IF_RGMII	/;"	d
AR71XX_MII1_CTRL_IF_RMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII1_CTRL_IF_RMII	/;"	d
AR71XX_MII_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_BASE /;"	d
AR71XX_MII_CTRL_IF_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_CTRL_IF_MASK	/;"	d
AR71XX_MII_CTRL_SPEED_10	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_CTRL_SPEED_10	/;"	d
AR71XX_MII_CTRL_SPEED_100	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_CTRL_SPEED_100	/;"	d
AR71XX_MII_CTRL_SPEED_1000	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_CTRL_SPEED_1000	/;"	d
AR71XX_MII_CTRL_SPEED_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_CTRL_SPEED_MASK	/;"	d
AR71XX_MII_CTRL_SPEED_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_CTRL_SPEED_SHIFT	/;"	d
AR71XX_MII_REG_MII0_CTRL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_REG_MII0_CTRL	/;"	d
AR71XX_MII_REG_MII1_CTRL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_REG_MII1_CTRL	/;"	d
AR71XX_MII_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_MII_SIZE	/;"	d
AR71XX_OHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_OHCI_BASE	/;"	d
AR71XX_OHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_OHCI_SIZE	/;"	d
AR71XX_PCI_CFG_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_CFG_BASE /;"	d
AR71XX_PCI_CFG_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_CFG_SIZE	/;"	d
AR71XX_PCI_MEM_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_MEM_BASE	/;"	d
AR71XX_PCI_MEM_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_MEM_SIZE	/;"	d
AR71XX_PCI_WIN0_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN0_OFFS	/;"	d
AR71XX_PCI_WIN1_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN1_OFFS	/;"	d
AR71XX_PCI_WIN2_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN2_OFFS	/;"	d
AR71XX_PCI_WIN3_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN3_OFFS	/;"	d
AR71XX_PCI_WIN4_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN4_OFFS	/;"	d
AR71XX_PCI_WIN5_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN5_OFFS	/;"	d
AR71XX_PCI_WIN6_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN6_OFFS	/;"	d
AR71XX_PCI_WIN7_OFFS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PCI_WIN7_OFFS	/;"	d
AR71XX_PLL_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_BASE /;"	d
AR71XX_PLL_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_DIV_MASK	/;"	d
AR71XX_PLL_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_DIV_SHIFT	/;"	d
AR71XX_PLL_REG_CPU_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_REG_CPU_CONFIG	/;"	d
AR71XX_PLL_REG_ETH0_INT_CLOCK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_REG_ETH0_INT_CLOCK	/;"	d
AR71XX_PLL_REG_ETH1_INT_CLOCK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_REG_ETH1_INT_CLOCK	/;"	d
AR71XX_PLL_REG_SEC_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_REG_SEC_CONFIG	/;"	d
AR71XX_PLL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_PLL_SIZE	/;"	d
AR71XX_RESET_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_BASE /;"	d
AR71XX_RESET_CPU_COLD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_CPU_COLD	/;"	d
AR71XX_RESET_CPU_NMI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_CPU_NMI	/;"	d
AR71XX_RESET_DDR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_DDR	/;"	d
AR71XX_RESET_DMA	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_DMA	/;"	d
AR71XX_RESET_EXTERNAL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_EXTERNAL	/;"	d
AR71XX_RESET_FULL_CHIP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_FULL_CHIP	/;"	d
AR71XX_RESET_GE0_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_GE0_MAC	/;"	d
AR71XX_RESET_GE0_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_GE0_PHY	/;"	d
AR71XX_RESET_GE1_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_GE1_MAC	/;"	d
AR71XX_RESET_GE1_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_GE1_PHY	/;"	d
AR71XX_RESET_PCI_BUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_PCI_BUS	/;"	d
AR71XX_RESET_PCI_CORE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_PCI_CORE	/;"	d
AR71XX_RESET_REG_GLOBAL_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_GLOBAL_INT_STATUS	/;"	d
AR71XX_RESET_REG_MISC_INT_ENABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_MISC_INT_ENABLE	/;"	d
AR71XX_RESET_REG_MISC_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_MISC_INT_STATUS	/;"	d
AR71XX_RESET_REG_PCI_INT_ENABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_PCI_INT_ENABLE	/;"	d
AR71XX_RESET_REG_PCI_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_PCI_INT_STATUS	/;"	d
AR71XX_RESET_REG_PERFC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_PERFC0	/;"	d
AR71XX_RESET_REG_PERFC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_PERFC1	/;"	d
AR71XX_RESET_REG_PERFC_CTRL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_PERFC_CTRL	/;"	d
AR71XX_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_RESET_MODULE	/;"	d
AR71XX_RESET_REG_REV_ID	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_REV_ID	/;"	d
AR71XX_RESET_REG_TIMER	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_TIMER	/;"	d
AR71XX_RESET_REG_TIMER_RELOAD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_TIMER_RELOAD	/;"	d
AR71XX_RESET_REG_WDOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_WDOG	/;"	d
AR71XX_RESET_REG_WDOG_CTRL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_REG_WDOG_CTRL	/;"	d
AR71XX_RESET_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_SIZE	/;"	d
AR71XX_RESET_SLIC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_SLIC	/;"	d
AR71XX_RESET_STEREO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_STEREO	/;"	d
AR71XX_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_USBSUS_OVERRIDE	/;"	d
AR71XX_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_USB_HOST	/;"	d
AR71XX_RESET_USB_OHCI_DLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_USB_OHCI_DLL	/;"	d
AR71XX_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_RESET_USB_PHY	/;"	d
AR71XX_REV_ID_MINOR_AR7130	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_MINOR_AR7130	/;"	d
AR71XX_REV_ID_MINOR_AR7141	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_MINOR_AR7141	/;"	d
AR71XX_REV_ID_MINOR_AR7161	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_MINOR_AR7161	/;"	d
AR71XX_REV_ID_MINOR_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_MINOR_MASK	/;"	d
AR71XX_REV_ID_REVISION2_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_REVISION2_MASK	/;"	d
AR71XX_REV_ID_REVISION_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_REVISION_MASK	/;"	d
AR71XX_REV_ID_REVISION_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_REV_ID_REVISION_SHIFT	/;"	d
AR71XX_SPI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_BASE	/;"	d
AR71XX_SPI_CTRL_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_CTRL_DIV_MASK	/;"	d
AR71XX_SPI_CTRL_RD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_CTRL_RD	/;"	d
AR71XX_SPI_FS_GPIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_FS_GPIO	/;"	d
AR71XX_SPI_IOC_CLK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_CLK	/;"	d
AR71XX_SPI_IOC_CS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_CS(/;"	d
AR71XX_SPI_IOC_CS0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_CS0	/;"	d
AR71XX_SPI_IOC_CS1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_CS1	/;"	d
AR71XX_SPI_IOC_CS2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_CS2	/;"	d
AR71XX_SPI_IOC_CS_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_CS_ALL /;"	d
AR71XX_SPI_IOC_DO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_IOC_DO	/;"	d
AR71XX_SPI_REG_CTRL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_REG_CTRL	/;"	d
AR71XX_SPI_REG_FS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_REG_FS	/;"	d
AR71XX_SPI_REG_IOC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_REG_IOC	/;"	d
AR71XX_SPI_REG_RDS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_REG_RDS	/;"	d
AR71XX_SPI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_SPI_SIZE	/;"	d
AR71XX_UART_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_UART_BASE /;"	d
AR71XX_UART_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_UART_SIZE	/;"	d
AR71XX_USB_CTRL_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_USB_CTRL_BASE /;"	d
AR71XX_USB_CTRL_REG_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_USB_CTRL_REG_CONFIG	/;"	d
AR71XX_USB_CTRL_REG_FLADJ	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_USB_CTRL_REG_FLADJ	/;"	d
AR71XX_USB_CTRL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR71XX_USB_CTRL_SIZE	/;"	d
AR7240_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_GPIO_COUNT	/;"	d
AR7240_OHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_OHCI_BASE	/;"	d
AR7240_OHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_OHCI_SIZE	/;"	d
AR7240_RESET_OHCI_DLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_RESET_OHCI_DLL	/;"	d
AR7240_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_RESET_USB_HOST	/;"	d
AR7240_USB_CTRL_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_USB_CTRL_BASE /;"	d
AR7240_USB_CTRL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7240_USB_CTRL_SIZE	/;"	d
AR7241_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7241_GPIO_COUNT	/;"	d
AR7242_PLL_REG_ETH0_INT_CLOCK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR7242_PLL_REG_ETH0_INT_CLOCK	/;"	d
AR724X_AHB_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_AHB_DIV_MASK	/;"	d
AR724X_AHB_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_AHB_DIV_SHIFT	/;"	d
AR724X_DDR_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_DDR_DIV_MASK	/;"	d
AR724X_DDR_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_DDR_DIV_SHIFT	/;"	d
AR724X_DDR_REG_FLUSH_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_DDR_REG_FLUSH_GE0	/;"	d
AR724X_DDR_REG_FLUSH_GE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_DDR_REG_FLUSH_GE1	/;"	d
AR724X_DDR_REG_FLUSH_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_DDR_REG_FLUSH_PCIE	/;"	d
AR724X_DDR_REG_FLUSH_USB	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_DDR_REG_FLUSH_USB	/;"	d
AR724X_EHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_EHCI_BASE	/;"	d
AR724X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_EHCI_SIZE	/;"	d
AR724X_GPIO_FUNC_CLK_OBS1_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_CLK_OBS1_EN	/;"	d
AR724X_GPIO_FUNC_CLK_OBS2_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_CLK_OBS2_EN	/;"	d
AR724X_GPIO_FUNC_CLK_OBS3_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_CLK_OBS3_EN	/;"	d
AR724X_GPIO_FUNC_CLK_OBS4_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_CLK_OBS4_EN	/;"	d
AR724X_GPIO_FUNC_CLK_OBS5_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_CLK_OBS5_EN	/;"	d
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN	/;"	d
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN	/;"	d
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN	/;"	d
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN	/;"	d
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN	/;"	d
AR724X_GPIO_FUNC_GE0_MII_CLK_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN	/;"	d
AR724X_GPIO_FUNC_JTAG_DISABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_JTAG_DISABLE	/;"	d
AR724X_GPIO_FUNC_SPI_CS_EN1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_SPI_CS_EN1	/;"	d
AR724X_GPIO_FUNC_SPI_CS_EN2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_SPI_CS_EN2	/;"	d
AR724X_GPIO_FUNC_SPI_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_SPI_EN	/;"	d
AR724X_GPIO_FUNC_UART_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_UART_EN	/;"	d
AR724X_GPIO_FUNC_UART_RTS_CTS_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN	/;"	d
AR724X_PCI_CFG_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_CFG_BASE	/;"	d
AR724X_PCI_CFG_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_CFG_SIZE	/;"	d
AR724X_PCI_CRP_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_CRP_BASE /;"	d
AR724X_PCI_CRP_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_CRP_SIZE	/;"	d
AR724X_PCI_CTRL_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_CTRL_BASE /;"	d
AR724X_PCI_CTRL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_CTRL_SIZE	/;"	d
AR724X_PCI_MEM_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_MEM_BASE	/;"	d
AR724X_PCI_MEM_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PCI_MEM_SIZE	/;"	d
AR724X_PLL_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PLL_DIV_MASK	/;"	d
AR724X_PLL_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PLL_DIV_SHIFT	/;"	d
AR724X_PLL_REF_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PLL_REF_DIV_MASK	/;"	d
AR724X_PLL_REF_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PLL_REF_DIV_SHIFT	/;"	d
AR724X_PLL_REG_CPU_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PLL_REG_CPU_CONFIG	/;"	d
AR724X_PLL_REG_PCIE_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_PLL_REG_PCIE_CONFIG	/;"	d
AR724X_RESET_GE0_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_GE0_MDIO	/;"	d
AR724X_RESET_GE1_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_GE1_MDIO	/;"	d
AR724X_RESET_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_PCIE	/;"	d
AR724X_RESET_PCIE_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_PCIE_PHY	/;"	d
AR724X_RESET_PCIE_PHY_SERIAL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_PCIE_PHY_SERIAL	/;"	d
AR724X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_REG_RESET_MODULE	/;"	d
AR724X_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_USBSUS_OVERRIDE	/;"	d
AR724X_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_USB_HOST	/;"	d
AR724X_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR724X_RESET_USB_PHY	/;"	d
AR8021_driver	drivers/net/phy/atheros.c	/^static struct phy_driver AR8021_driver =  {$/;"	v	typeref:struct:phy_driver	file:
AR8031_driver	drivers/net/phy/atheros.c	/^static struct phy_driver AR8031_driver =  {$/;"	v	typeref:struct:phy_driver	file:
AR8035_driver	drivers/net/phy/atheros.c	/^static struct phy_driver AR8035_driver =  {$/;"	v	typeref:struct:phy_driver	file:
AR803x_DEBUG_REG_0	drivers/net/phy/atheros.c	/^#define AR803x_DEBUG_REG_0	/;"	d	file:
AR803x_DEBUG_REG_5	drivers/net/phy/atheros.c	/^#define AR803x_DEBUG_REG_5	/;"	d	file:
AR803x_PHY_DEBUG_ADDR_REG	drivers/net/phy/atheros.c	/^#define AR803x_PHY_DEBUG_ADDR_REG	/;"	d	file:
AR803x_PHY_DEBUG_DATA_REG	drivers/net/phy/atheros.c	/^#define AR803x_PHY_DEBUG_DATA_REG	/;"	d	file:
AR803x_RGMII_RX_CLK_DLY	drivers/net/phy/atheros.c	/^#define AR803x_RGMII_RX_CLK_DLY	/;"	d	file:
AR803x_RGMII_TX_CLK_DLY	drivers/net/phy/atheros.c	/^#define AR803x_RGMII_TX_CLK_DLY	/;"	d	file:
AR8051_DEBUG_RGMII_CLK_DLY_REG	board/compulab/cm_t335/cm_t335.c	/^#define AR8051_DEBUG_RGMII_CLK_DLY_REG	/;"	d	file:
AR8051_DEBUG_RGMII_CLK_DLY_REG	board/tcl/sl50/board.c	/^#define AR8051_DEBUG_RGMII_CLK_DLY_REG	/;"	d	file:
AR8051_DEBUG_RGMII_CLK_DLY_REG	board/ti/am335x/board.c	/^#define AR8051_DEBUG_RGMII_CLK_DLY_REG	/;"	d	file:
AR8051_DEBUG_RGMII_CLK_DLY_REG	board/vscom/baltos/board.c	/^#define AR8051_DEBUG_RGMII_CLK_DLY_REG	/;"	d	file:
AR8051_PHY_DEBUG_ADDR_REG	board/compulab/cm_t335/cm_t335.c	/^#define AR8051_PHY_DEBUG_ADDR_REG	/;"	d	file:
AR8051_PHY_DEBUG_ADDR_REG	board/tcl/sl50/board.c	/^#define AR8051_PHY_DEBUG_ADDR_REG	/;"	d	file:
AR8051_PHY_DEBUG_ADDR_REG	board/ti/am335x/board.c	/^#define AR8051_PHY_DEBUG_ADDR_REG	/;"	d	file:
AR8051_PHY_DEBUG_ADDR_REG	board/vscom/baltos/board.c	/^#define AR8051_PHY_DEBUG_ADDR_REG	/;"	d	file:
AR8051_PHY_DEBUG_DATA_REG	board/compulab/cm_t335/cm_t335.c	/^#define AR8051_PHY_DEBUG_DATA_REG	/;"	d	file:
AR8051_PHY_DEBUG_DATA_REG	board/tcl/sl50/board.c	/^#define AR8051_PHY_DEBUG_DATA_REG	/;"	d	file:
AR8051_PHY_DEBUG_DATA_REG	board/ti/am335x/board.c	/^#define AR8051_PHY_DEBUG_DATA_REG	/;"	d	file:
AR8051_PHY_DEBUG_DATA_REG	board/vscom/baltos/board.c	/^#define AR8051_PHY_DEBUG_DATA_REG	/;"	d	file:
AR8051_RGMII_TX_CLK_DLY	board/compulab/cm_t335/cm_t335.c	/^#define AR8051_RGMII_TX_CLK_DLY	/;"	d	file:
AR8051_RGMII_TX_CLK_DLY	board/tcl/sl50/board.c	/^#define AR8051_RGMII_TX_CLK_DLY	/;"	d	file:
AR8051_RGMII_TX_CLK_DLY	board/ti/am335x/board.c	/^#define AR8051_RGMII_TX_CLK_DLY	/;"	d	file:
AR8051_RGMII_TX_CLK_DLY	board/vscom/baltos/board.c	/^#define AR8051_RGMII_TX_CLK_DLY	/;"	d	file:
AR913X_AHB_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_AHB_DIV_MASK	/;"	d
AR913X_AHB_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_AHB_DIV_SHIFT	/;"	d
AR913X_DDR_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_DDR_DIV_MASK	/;"	d
AR913X_DDR_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_DDR_DIV_SHIFT	/;"	d
AR913X_DDR_REG_FLUSH_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_DDR_REG_FLUSH_GE0	/;"	d
AR913X_DDR_REG_FLUSH_GE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_DDR_REG_FLUSH_GE1	/;"	d
AR913X_DDR_REG_FLUSH_USB	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_DDR_REG_FLUSH_USB	/;"	d
AR913X_DDR_REG_FLUSH_WMAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_DDR_REG_FLUSH_WMAC	/;"	d
AR913X_EHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_EHCI_BASE	/;"	d
AR913X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_EHCI_SIZE	/;"	d
AR913X_ETH0_PLL_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_ETH0_PLL_SHIFT	/;"	d
AR913X_ETH1_PLL_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_ETH1_PLL_SHIFT	/;"	d
AR913X_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_COUNT	/;"	d
AR913X_GPIO_FUNC_EXP_PORT_CS_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN	/;"	d
AR913X_GPIO_FUNC_I2S0_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_I2S0_EN	/;"	d
AR913X_GPIO_FUNC_I2S1_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_I2S1_EN	/;"	d
AR913X_GPIO_FUNC_I2S_MCKEN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_I2S_MCKEN	/;"	d
AR913X_GPIO_FUNC_I2S_REFCLKEN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_I2S_REFCLKEN	/;"	d
AR913X_GPIO_FUNC_SLIC_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_SLIC_EN	/;"	d
AR913X_GPIO_FUNC_UART_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_UART_EN	/;"	d
AR913X_GPIO_FUNC_UART_RTSCTS_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_UART_RTSCTS_EN	/;"	d
AR913X_GPIO_FUNC_USB_CLK_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_USB_CLK_EN	/;"	d
AR913X_GPIO_FUNC_WMAC_LED_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_GPIO_FUNC_WMAC_LED_EN	/;"	d
AR913X_PLL_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_PLL_DIV_MASK	/;"	d
AR913X_PLL_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_PLL_DIV_SHIFT	/;"	d
AR913X_PLL_REG_CPU_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_PLL_REG_CPU_CONFIG	/;"	d
AR913X_PLL_REG_ETH0_INT_CLOCK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_PLL_REG_ETH0_INT_CLOCK	/;"	d
AR913X_PLL_REG_ETH1_INT_CLOCK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_PLL_REG_ETH1_INT_CLOCK	/;"	d
AR913X_PLL_REG_ETH_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_PLL_REG_ETH_CONFIG	/;"	d
AR913X_RESET_AMBA2WMAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_AMBA2WMAC	/;"	d
AR913X_RESET_REG_GLOBAL_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_REG_GLOBAL_INT_STATUS	/;"	d
AR913X_RESET_REG_PERFC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_REG_PERFC0	/;"	d
AR913X_RESET_REG_PERFC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_REG_PERFC1	/;"	d
AR913X_RESET_REG_PERF_CTRL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_REG_PERF_CTRL	/;"	d
AR913X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_REG_RESET_MODULE	/;"	d
AR913X_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_USBSUS_OVERRIDE	/;"	d
AR913X_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_USB_HOST	/;"	d
AR913X_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_RESET_USB_PHY	/;"	d
AR913X_REV_ID_MINOR_AR9130	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_REV_ID_MINOR_AR9130	/;"	d
AR913X_REV_ID_MINOR_AR9132	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_REV_ID_MINOR_AR9132	/;"	d
AR913X_WMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_WMAC_BASE /;"	d
AR913X_WMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR913X_WMAC_SIZE	/;"	d
AR933X_BOOTSTRAP_DDR2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_BOOTSTRAP_DDR2	/;"	d
AR933X_BOOTSTRAP_EEPBUSY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_BOOTSTRAP_EEPBUSY	/;"	d
AR933X_BOOTSTRAP_MDIO_GPIO_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_BOOTSTRAP_MDIO_GPIO_EN	/;"	d
AR933X_BOOTSTRAP_REF_CLK_40	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_BOOTSTRAP_REF_CLK_40	/;"	d
AR933X_DDR_REG_BURST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_BURST	/;"	d
AR933X_DDR_REG_DDR2_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_DDR2_CONFIG	/;"	d
AR933X_DDR_REG_EMR2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_EMR2	/;"	d
AR933X_DDR_REG_EMR3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_EMR3	/;"	d
AR933X_DDR_REG_FLUSH_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_FLUSH_GE0	/;"	d
AR933X_DDR_REG_FLUSH_GE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_FLUSH_GE1	/;"	d
AR933X_DDR_REG_FLUSH_USB	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_FLUSH_USB	/;"	d
AR933X_DDR_REG_FLUSH_WMAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_FLUSH_WMAC	/;"	d
AR933X_DDR_REG_TIMEOUT_ADDR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_TIMEOUT_ADDR	/;"	d
AR933X_DDR_REG_TIMEOUT_CNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_TIMEOUT_CNT	/;"	d
AR933X_DDR_REG_TIMEOUT_MAX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_DDR_REG_TIMEOUT_MAX	/;"	d
AR933X_EHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_EHCI_BASE	/;"	d
AR933X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_EHCI_SIZE	/;"	d
AR933X_ETH_CFG_GMII_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_GMII_GE0	/;"	d
AR933X_ETH_CFG_MII_CNTL_SPEED	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_MII_CNTL_SPEED	/;"	d
AR933X_ETH_CFG_MII_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_MII_GE0	/;"	d
AR933X_ETH_CFG_MII_GE0_ERR_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_MII_GE0_ERR_EN	/;"	d
AR933X_ETH_CFG_MII_GE0_MASTER	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_MII_GE0_MASTER	/;"	d
AR933X_ETH_CFG_MII_GE0_SLAVE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_MII_GE0_SLAVE	/;"	d
AR933X_ETH_CFG_RGMII_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_RGMII_GE0	/;"	d
AR933X_ETH_CFG_RMII_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_RMII_GE0	/;"	d
AR933X_ETH_CFG_RMII_GE0_SPD_10	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_RMII_GE0_SPD_10	/;"	d
AR933X_ETH_CFG_RMII_GE0_SPD_100	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_RMII_GE0_SPD_100	/;"	d
AR933X_ETH_CFG_SW_ACC_MSB_FIRST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST	/;"	d
AR933X_ETH_CFG_SW_PHY_ADDR_SWAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP	/;"	d
AR933X_ETH_CFG_SW_PHY_SWAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_ETH_CFG_SW_PHY_SWAP	/;"	d
AR933X_GMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GMAC_BASE /;"	d
AR933X_GMAC_REG_ETH_CFG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GMAC_REG_ETH_CFG	/;"	d
AR933X_GMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GMAC_SIZE	/;"	d
AR933X_GPIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO(/;"	d
AR933X_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_COUNT	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL	/;"	d
AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL	/;"	d
AR933X_GPIO_FUNC_I2SO_22_18_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_I2SO_22_18_EN	/;"	d
AR933X_GPIO_FUNC_I2SO_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_I2SO_EN	/;"	d
AR933X_GPIO_FUNC_I2S_MCK_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_I2S_MCK_EN	/;"	d
AR933X_GPIO_FUNC_JTAG_DISABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_JTAG_DISABLE	/;"	d
AR933X_GPIO_FUNC_RES_TRUE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_RES_TRUE	/;"	d
AR933X_GPIO_FUNC_SPDIF2TCK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_SPDIF2TCK	/;"	d
AR933X_GPIO_FUNC_SPDIF_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_SPDIF_EN	/;"	d
AR933X_GPIO_FUNC_SPI_CS_EN1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_SPI_CS_EN1	/;"	d
AR933X_GPIO_FUNC_SPI_CS_EN2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_SPI_CS_EN2	/;"	d
AR933X_GPIO_FUNC_SPI_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_SPI_EN	/;"	d
AR933X_GPIO_FUNC_UART_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_UART_EN	/;"	d
AR933X_GPIO_FUNC_UART_RTS_CTS_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN	/;"	d
AR933X_GPIO_FUNC_XLNA_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_FUNC_XLNA_EN	/;"	d
AR933X_GPIO_REG_FUNC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_GPIO_REG_FUNC	/;"	d
AR933X_PINCTRL	drivers/pinctrl/Kconfig	/^config AR933X_PINCTRL$/;"	c	menu:Pin controllers
AR933X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	/;"	d
AR933X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	/;"	d
AR933X_PLL_CLK_CTRL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_BYPASS	/;"	d
AR933X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	/;"	d
AR933X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	/;"	d
AR933X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	/;"	d
AR933X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	/;"	d
AR933X_PLL_CLK_CTRL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CLK_CTRL_REG	/;"	d
AR933X_PLL_CPU_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_NINT_MASK	/;"	d
AR933X_PLL_CPU_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT	/;"	d
AR933X_PLL_CPU_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK	/;"	d
AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT	/;"	d
AR933X_PLL_CPU_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK	/;"	d
AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT	/;"	d
AR933X_PLL_CPU_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_CPU_CONFIG_REG	/;"	d
AR933X_PLL_DITHER_FRAC_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_DITHER_FRAC_REG	/;"	d
AR933X_PLL_SWITCH_CLOCK_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_PLL_SWITCH_CLOCK_CONTROL_REG	/;"	d
AR933X_RESET_ETH_SWITCH	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_ETH_SWITCH	/;"	d
AR933X_RESET_ETH_SWITCH_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_ETH_SWITCH_ANALOG	/;"	d
AR933X_RESET_GE0_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_GE0_MAC	/;"	d
AR933X_RESET_GE0_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_GE0_MDIO	/;"	d
AR933X_RESET_GE1_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_GE1_MAC	/;"	d
AR933X_RESET_GE1_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_GE1_MDIO	/;"	d
AR933X_RESET_REG_BOOTSTRAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_REG_BOOTSTRAP	/;"	d
AR933X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_REG_RESET_MODULE	/;"	d
AR933X_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_USBSUS_OVERRIDE	/;"	d
AR933X_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_USB_HOST	/;"	d
AR933X_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_USB_PHY	/;"	d
AR933X_RESET_WMAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RESET_WMAC	/;"	d
AR933X_RTC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_BASE /;"	d
AR933X_RTC_REG_CAUSE_CLR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_CAUSE_CLR	/;"	d
AR933X_RTC_REG_DERIVED	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_DERIVED	/;"	d
AR933X_RTC_REG_FORCE_WAKE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_FORCE_WAKE	/;"	d
AR933X_RTC_REG_INT_CAUSE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_INT_CAUSE	/;"	d
AR933X_RTC_REG_INT_ENABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_INT_ENABLE	/;"	d
AR933X_RTC_REG_INT_MASKE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_INT_MASKE	/;"	d
AR933X_RTC_REG_RESET	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_RESET	/;"	d
AR933X_RTC_REG_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_REG_STATUS	/;"	d
AR933X_RTC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_RTC_SIZE	/;"	d
AR933X_SRIF_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_SRIF_BASE /;"	d
AR933X_SRIF_DDR_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_SRIF_DDR_DPLL1_REG	/;"	d
AR933X_SRIF_DDR_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_SRIF_DDR_DPLL2_REG	/;"	d
AR933X_SRIF_DDR_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_SRIF_DDR_DPLL3_REG	/;"	d
AR933X_SRIF_DDR_DPLL4_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_SRIF_DDR_DPLL4_REG	/;"	d
AR933X_SRIF_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_SRIF_SIZE	/;"	d
AR933X_UART	drivers/serial/Kconfig	/^config AR933X_UART$/;"	c	menu:Serial drivers
AR933X_UART_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_UART_BASE /;"	d
AR933X_UART_CLK_REG	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CLK_REG /;"	d	file:
AR933X_UART_CLK_SCALE_M	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CLK_SCALE_M /;"	d	file:
AR933X_UART_CLK_SCALE_S	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CLK_SCALE_S /;"	d	file:
AR933X_UART_CLK_STEP_M	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CLK_STEP_M /;"	d	file:
AR933X_UART_CLK_STEP_S	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CLK_STEP_S /;"	d	file:
AR933X_UART_CS_IF_MODE_DCE	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_IF_MODE_DCE /;"	d	file:
AR933X_UART_CS_IF_MODE_DTE	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_IF_MODE_DTE /;"	d	file:
AR933X_UART_CS_IF_MODE_M	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_IF_MODE_M /;"	d	file:
AR933X_UART_CS_IF_MODE_S	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_IF_MODE_S /;"	d	file:
AR933X_UART_CS_REG	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_REG /;"	d	file:
AR933X_UART_CS_RX_RDY_ORIDE	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_RX_RDY_ORIDE /;"	d	file:
AR933X_UART_CS_TX_RDY_ORIDE	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_CS_TX_RDY_ORIDE /;"	d	file:
AR933X_UART_DATA_REG	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_DATA_REG /;"	d	file:
AR933X_UART_DATA_RX_CSR	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_DATA_RX_CSR /;"	d	file:
AR933X_UART_DATA_TX_CSR	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_DATA_TX_CSR /;"	d	file:
AR933X_UART_DATA_TX_RX_MASK	drivers/serial/serial_ar933x.c	/^#define AR933X_UART_DATA_TX_RX_MASK /;"	d	file:
AR933X_UART_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_UART_SIZE	/;"	d
AR933X_WMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_WMAC_BASE /;"	d
AR933X_WMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR933X_WMAC_SIZE	/;"	d
AR934X_BOOTSTRAP_BOOT_FROM_SPI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_BOOT_FROM_SPI	/;"	d
AR934X_BOOTSTRAP_DDR1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_DDR1	/;"	d
AR934X_BOOTSTRAP_EJTAG_MODE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_EJTAG_MODE	/;"	d
AR934X_BOOTSTRAP_PCIE_RC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_PCIE_RC	/;"	d
AR934X_BOOTSTRAP_REF_CLK_40	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_REF_CLK_40	/;"	d
AR934X_BOOTSTRAP_SDRAM_DISABLED	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SDRAM_DISABLED	/;"	d
AR934X_BOOTSTRAP_SW_OPTION1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION1	/;"	d
AR934X_BOOTSTRAP_SW_OPTION2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION2	/;"	d
AR934X_BOOTSTRAP_SW_OPTION3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION3	/;"	d
AR934X_BOOTSTRAP_SW_OPTION4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION4	/;"	d
AR934X_BOOTSTRAP_SW_OPTION5	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION5	/;"	d
AR934X_BOOTSTRAP_SW_OPTION6	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION6	/;"	d
AR934X_BOOTSTRAP_SW_OPTION7	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION7	/;"	d
AR934X_BOOTSTRAP_SW_OPTION8	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_SW_OPTION8	/;"	d
AR934X_BOOTSTRAP_USB_MODE_DEVICE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_BOOTSTRAP_USB_MODE_DEVICE	/;"	d
AR934X_DDR1	arch/mips/mach-ath79/ar934x/ddr.c	/^	AR934X_DDR1,$/;"	e	enum:__anon53f0bee10103	file:
AR934X_DDR2	arch/mips/mach-ath79/ar934x/ddr.c	/^	AR934X_DDR2,$/;"	e	enum:__anon53f0bee10103	file:
AR934X_DDR_REG_BURST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_BURST	/;"	d
AR934X_DDR_REG_BURST2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_BURST2	/;"	d
AR934X_DDR_REG_CTL_CONF	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_CTL_CONF	/;"	d
AR934X_DDR_REG_DDR2_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_DDR2_CONFIG	/;"	d
AR934X_DDR_REG_EMR2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_EMR2	/;"	d
AR934X_DDR_REG_EMR3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_EMR3	/;"	d
AR934X_DDR_REG_FLUSH_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_GE0	/;"	d
AR934X_DDR_REG_FLUSH_GE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_GE1	/;"	d
AR934X_DDR_REG_FLUSH_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_PCIE	/;"	d
AR934X_DDR_REG_FLUSH_SRC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_SRC1	/;"	d
AR934X_DDR_REG_FLUSH_SRC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_SRC2	/;"	d
AR934X_DDR_REG_FLUSH_USB	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_USB	/;"	d
AR934X_DDR_REG_FLUSH_WMAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_FLUSH_WMAC	/;"	d
AR934X_DDR_REG_TAP_CTRL2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_TAP_CTRL2	/;"	d
AR934X_DDR_REG_TAP_CTRL3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_TAP_CTRL3	/;"	d
AR934X_DDR_REG_TIMEOUT_MAX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_DDR_REG_TIMEOUT_MAX	/;"	d
AR934X_EHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_EHCI_BASE	/;"	d
AR934X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_EHCI_SIZE	/;"	d
AR934X_ETH_CFG_GMII_GMAC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_GMII_GMAC0	/;"	d
AR934X_ETH_CFG_MII_GMAC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_MII_GMAC0	/;"	d
AR934X_ETH_CFG_MII_GMAC0_ERR_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN	/;"	d
AR934X_ETH_CFG_MII_GMAC0_MASTER	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_MII_GMAC0_MASTER	/;"	d
AR934X_ETH_CFG_MII_GMAC0_SLAVE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_MII_GMAC0_SLAVE	/;"	d
AR934X_ETH_CFG_RDV_DELAY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RDV_DELAY	/;"	d
AR934X_ETH_CFG_RDV_DELAY_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RDV_DELAY_MASK	/;"	d
AR934X_ETH_CFG_RDV_DELAY_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RDV_DELAY_SHIFT	/;"	d
AR934X_ETH_CFG_RGMII_GMAC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RGMII_GMAC0	/;"	d
AR934X_ETH_CFG_RMII_GMAC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RMII_GMAC0	/;"	d
AR934X_ETH_CFG_RMII_GMAC0_MASTER	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RMII_GMAC0_MASTER	/;"	d
AR934X_ETH_CFG_RXD_DELAY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RXD_DELAY	/;"	d
AR934X_ETH_CFG_RXD_DELAY_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RXD_DELAY_MASK	/;"	d
AR934X_ETH_CFG_RXD_DELAY_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_RXD_DELAY_SHIFT	/;"	d
AR934X_ETH_CFG_SW_APB_ACCESS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_SW_APB_ACCESS	/;"	d
AR934X_ETH_CFG_SW_ONLY_MODE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_SW_ONLY_MODE	/;"	d
AR934X_ETH_CFG_SW_PHY_SWAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_ETH_CFG_SW_PHY_SWAP	/;"	d
AR934X_GMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GMAC_BASE /;"	d
AR934X_GMAC_REG_ETH_CFG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GMAC_REG_ETH_CFG	/;"	d
AR934X_GMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GMAC_SIZE	/;"	d
AR934X_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_COUNT	/;"	d
AR934X_GPIO_FUNC_CLK_OBS0_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS0_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS1_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS1_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS2_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS2_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS3_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS3_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS4_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS4_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS5_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS5_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS6_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS6_EN	/;"	d
AR934X_GPIO_FUNC_CLK_OBS7_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_CLK_OBS7_EN	/;"	d
AR934X_GPIO_FUNC_JTAG_DISABLE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_FUNC_JTAG_DISABLE	/;"	d
AR934X_GPIO_OUT_EXT_LNA0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_EXT_LNA0	/;"	d
AR934X_GPIO_OUT_EXT_LNA1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_EXT_LNA1	/;"	d
AR934X_GPIO_OUT_GPIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_GPIO	/;"	d
AR934X_GPIO_OUT_LED_LINK0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_LED_LINK0	/;"	d
AR934X_GPIO_OUT_LED_LINK1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_LED_LINK1	/;"	d
AR934X_GPIO_OUT_LED_LINK2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_LED_LINK2	/;"	d
AR934X_GPIO_OUT_LED_LINK3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_LED_LINK3	/;"	d
AR934X_GPIO_OUT_LED_LINK4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_LED_LINK4	/;"	d
AR934X_GPIO_OUT_SPI_CS1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_OUT_SPI_CS1	/;"	d
AR934X_GPIO_REG_FUNC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_FUNC	/;"	d
AR934X_GPIO_REG_OUT_FUNC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_OUT_FUNC0	/;"	d
AR934X_GPIO_REG_OUT_FUNC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_OUT_FUNC1	/;"	d
AR934X_GPIO_REG_OUT_FUNC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_OUT_FUNC2	/;"	d
AR934X_GPIO_REG_OUT_FUNC3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_OUT_FUNC3	/;"	d
AR934X_GPIO_REG_OUT_FUNC4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_OUT_FUNC4	/;"	d
AR934X_GPIO_REG_OUT_FUNC5	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_GPIO_REG_OUT_FUNC5	/;"	d
AR934X_NFC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_NFC_BASE	/;"	d
AR934X_NFC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_NFC_SIZE	/;"	d
AR934X_PCIE_WMAC_INT_PCIE_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_PCIE_ALL /;"	d
AR934X_PCIE_WMAC_INT_PCIE_RC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_PCIE_RC	/;"	d
AR934X_PCIE_WMAC_INT_PCIE_RC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_PCIE_RC0	/;"	d
AR934X_PCIE_WMAC_INT_PCIE_RC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_PCIE_RC1	/;"	d
AR934X_PCIE_WMAC_INT_PCIE_RC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_PCIE_RC2	/;"	d
AR934X_PCIE_WMAC_INT_PCIE_RC3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_PCIE_RC3	/;"	d
AR934X_PCIE_WMAC_INT_WMAC_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_WMAC_ALL /;"	d
AR934X_PCIE_WMAC_INT_WMAC_MISC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_WMAC_MISC	/;"	d
AR934X_PCIE_WMAC_INT_WMAC_RXHP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_WMAC_RXHP	/;"	d
AR934X_PCIE_WMAC_INT_WMAC_RXLP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_WMAC_RXLP	/;"	d
AR934X_PCIE_WMAC_INT_WMAC_TX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PCIE_WMAC_INT_WMAC_TX	/;"	d
AR934X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	/;"	d
AR934X_PLL_CLK_CTRL_AHB_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_AHB_PLL_BYPASS	/;"	d
AR934X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	/;"	d
AR934X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	/;"	d
AR934X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	/;"	d
AR934X_PLL_CLK_CTRL_CPU_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_CPU_PLL_BYPASS	/;"	d
AR934X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	/;"	d
AR934X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	/;"	d
AR934X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	/;"	d
AR934X_PLL_CLK_CTRL_DDR_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_DDR_PLL_BYPASS	/;"	d
AR934X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	/;"	d
AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	/;"	d
AR934X_PLL_CPU_CONFIG_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK	/;"	d
AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT	/;"	d
AR934X_PLL_CPU_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_NINT_MASK	/;"	d
AR934X_PLL_CPU_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT	/;"	d
AR934X_PLL_CPU_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK	/;"	d
AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT	/;"	d
AR934X_PLL_CPU_CONFIG_PLLPWD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_PLLPWD	/;"	d
AR934X_PLL_CPU_CONFIG_RANGE_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_RANGE_MASK	/;"	d
AR934X_PLL_CPU_CONFIG_RANGE_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_RANGE_SHIFT	/;"	d
AR934X_PLL_CPU_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK	/;"	d
AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT	/;"	d
AR934X_PLL_CPU_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_REG	/;"	d
AR934X_PLL_CPU_CONFIG_UPDATING	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_CONFIG_UPDATING	/;"	d
AR934X_PLL_CPU_DDR_CLK_CTRL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG	/;"	d
AR934X_PLL_CPU_DIT_DITHER_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_DITHER_EN	/;"	d
AR934X_PLL_CPU_DIT_FRAC_MAX_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_MAX_MASK	/;"	d
AR934X_PLL_CPU_DIT_FRAC_MAX_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_MAX_SHIFT	/;"	d
AR934X_PLL_CPU_DIT_FRAC_MIN_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_MIN_MASK	/;"	d
AR934X_PLL_CPU_DIT_FRAC_MIN_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_MIN_SHIFT	/;"	d
AR934X_PLL_CPU_DIT_FRAC_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_REG	/;"	d
AR934X_PLL_CPU_DIT_FRAC_STEP_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_STEP_MASK	/;"	d
AR934X_PLL_CPU_DIT_FRAC_STEP_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_FRAC_STEP_SHIFT	/;"	d
AR934X_PLL_CPU_DIT_UPD_CNT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_UPD_CNT_MASK	/;"	d
AR934X_PLL_CPU_DIT_UPD_CNT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_CPU_DIT_UPD_CNT_SHIFT	/;"	d
AR934X_PLL_DDR_CONFIG_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK	/;"	d
AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT	/;"	d
AR934X_PLL_DDR_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_NINT_MASK	/;"	d
AR934X_PLL_DDR_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT	/;"	d
AR934X_PLL_DDR_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK	/;"	d
AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT	/;"	d
AR934X_PLL_DDR_CONFIG_PLLPWD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_PLLPWD	/;"	d
AR934X_PLL_DDR_CONFIG_RANGE_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_RANGE_MASK	/;"	d
AR934X_PLL_DDR_CONFIG_RANGE_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_RANGE_SHIFT	/;"	d
AR934X_PLL_DDR_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK	/;"	d
AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT	/;"	d
AR934X_PLL_DDR_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_REG	/;"	d
AR934X_PLL_DDR_CONFIG_UPDATING	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_CONFIG_UPDATING	/;"	d
AR934X_PLL_DDR_DIT_DITHER_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_DITHER_EN	/;"	d
AR934X_PLL_DDR_DIT_FRAC_MAX_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_MAX_MASK	/;"	d
AR934X_PLL_DDR_DIT_FRAC_MAX_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_MAX_SHIFT	/;"	d
AR934X_PLL_DDR_DIT_FRAC_MIN_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_MIN_MASK	/;"	d
AR934X_PLL_DDR_DIT_FRAC_MIN_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_MIN_SHIFT	/;"	d
AR934X_PLL_DDR_DIT_FRAC_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_REG	/;"	d
AR934X_PLL_DDR_DIT_FRAC_STEP_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_STEP_MASK	/;"	d
AR934X_PLL_DDR_DIT_FRAC_STEP_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_FRAC_STEP_SHIFT	/;"	d
AR934X_PLL_DDR_DIT_UPD_CNT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_UPD_CNT_MASK	/;"	d
AR934X_PLL_DDR_DIT_UPD_CNT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_DDR_DIT_UPD_CNT_SHIFT	/;"	d
AR934X_PLL_ETH_XMII_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_ETH_XMII_CONTROL_REG	/;"	d
AR934X_PLL_SWITCH_CLK_CTRL_MDIO_CLK_SEL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_SWITCH_CLK_CTRL_MDIO_CLK_SEL	/;"	d
AR934X_PLL_SWITCH_CLOCK_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG	/;"	d
AR934X_RESET_CHKSUM_ACC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_CHKSUM_ACC	/;"	d
AR934X_RESET_CPU_COLD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_CPU_COLD	/;"	d
AR934X_RESET_CPU_NMI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_CPU_NMI	/;"	d
AR934X_RESET_DDR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_DDR	/;"	d
AR934X_RESET_ETH_SWITCH	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_ETH_SWITCH	/;"	d
AR934X_RESET_ETH_SWITCH_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_ETH_SWITCH_ANALOG	/;"	d
AR934X_RESET_EXTERNAL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_EXTERNAL	/;"	d
AR934X_RESET_FULL_CHIP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_FULL_CHIP	/;"	d
AR934X_RESET_GE0_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_GE0_MAC	/;"	d
AR934X_RESET_GE0_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_GE0_MDIO	/;"	d
AR934X_RESET_GE1_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_GE1_MAC	/;"	d
AR934X_RESET_GE1_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_GE1_MDIO	/;"	d
AR934X_RESET_HDMA	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_HDMA	/;"	d
AR934X_RESET_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_HOST	/;"	d
AR934X_RESET_HOST_DMA_INT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_HOST_DMA_INT	/;"	d
AR934X_RESET_HOST_RESET_INT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_HOST_RESET_INT	/;"	d
AR934X_RESET_I2S	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_I2S	/;"	d
AR934X_RESET_LUT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_LUT	/;"	d
AR934X_RESET_MBOX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_MBOX	/;"	d
AR934X_RESET_NANDF	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_NANDF	/;"	d
AR934X_RESET_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_PCIE	/;"	d
AR934X_RESET_PCIE_EP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_PCIE_EP	/;"	d
AR934X_RESET_PCIE_EP_INT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_PCIE_EP_INT	/;"	d
AR934X_RESET_PCIE_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_PCIE_PHY	/;"	d
AR934X_RESET_REG_BOOTSTRAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_REG_BOOTSTRAP	/;"	d
AR934X_RESET_REG_PCIE_WMAC_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS	/;"	d
AR934X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_REG_RESET_MODULE	/;"	d
AR934X_RESET_RTC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_RTC	/;"	d
AR934X_RESET_SLIC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_SLIC	/;"	d
AR934X_RESET_UART1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_UART1	/;"	d
AR934X_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_USBSUS_OVERRIDE	/;"	d
AR934X_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_USB_HOST	/;"	d
AR934X_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_USB_PHY	/;"	d
AR934X_RESET_USB_PHY_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_USB_PHY_ANALOG	/;"	d
AR934X_RESET_USB_PHY_PLL_PWD_EXT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_RESET_USB_PHY_PLL_PWD_EXT	/;"	d
AR934X_SDRAM	arch/mips/mach-ath79/ar934x/ddr.c	/^	AR934X_SDRAM = 0,$/;"	e	enum:__anon53f0bee10103	file:
AR934X_SRIF_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_BASE /;"	d
AR934X_SRIF_CPU_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_CPU_DPLL1_REG	/;"	d
AR934X_SRIF_CPU_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_CPU_DPLL2_REG	/;"	d
AR934X_SRIF_CPU_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_CPU_DPLL3_REG	/;"	d
AR934X_SRIF_CPU_DPLL4_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_CPU_DPLL4_REG	/;"	d
AR934X_SRIF_DDR_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DDR_DPLL1_REG	/;"	d
AR934X_SRIF_DDR_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DDR_DPLL2_REG	/;"	d
AR934X_SRIF_DDR_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DDR_DPLL3_REG	/;"	d
AR934X_SRIF_DDR_DPLL4_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DDR_DPLL4_REG	/;"	d
AR934X_SRIF_DPLL1_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL1_NFRAC_MASK	/;"	d
AR934X_SRIF_DPLL1_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL1_NINT_MASK	/;"	d
AR934X_SRIF_DPLL1_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL1_NINT_SHIFT	/;"	d
AR934X_SRIF_DPLL1_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL1_REFDIV_MASK	/;"	d
AR934X_SRIF_DPLL1_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL1_REFDIV_SHIFT	/;"	d
AR934X_SRIF_DPLL2_LOCAL_PLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL2_LOCAL_PLL	/;"	d
AR934X_SRIF_DPLL2_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL2_OUTDIV_MASK	/;"	d
AR934X_SRIF_DPLL2_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT	/;"	d
AR934X_SRIF_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_SRIF_SIZE	/;"	d
AR934X_WMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_WMAC_BASE /;"	d
AR934X_WMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define AR934X_WMAC_SIZE	/;"	d
ARASAN_NAND_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ARASAN_NAND_BASEADDR	/;"	d
ARASAN_NAND_CMD_ADDR_CYCL_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_ADDR_CYCL_MASK	/;"	d	file:
ARASAN_NAND_CMD_ADDR_CYCL_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_ADDR_CYCL_SHIFT	/;"	d	file:
ARASAN_NAND_CMD_CMD12_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_CMD12_MASK	/;"	d	file:
ARASAN_NAND_CMD_CMD2_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_CMD2_SHIFT	/;"	d	file:
ARASAN_NAND_CMD_ECC_ON_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_ECC_ON_MASK	/;"	d	file:
ARASAN_NAND_CMD_PG_SIZE_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_PG_SIZE_MASK	/;"	d	file:
ARASAN_NAND_CMD_PG_SIZE_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_CMD_PG_SIZE_SHIFT	/;"	d	file:
ARASAN_NAND_COL_ADDR_CYCL_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_COL_ADDR_CYCL_MASK	/;"	d	file:
ARASAN_NAND_COL_ADDR_CYCL_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_COL_ADDR_CYCL_SHIFT	/;"	d	file:
ARASAN_NAND_ECC_BCH_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_ECC_BCH_SHIFT	/;"	d	file:
ARASAN_NAND_ECC_SIZE_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_ECC_SIZE_SHIFT	/;"	d	file:
ARASAN_NAND_INT_STS_BUF_RD_RDY_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_INT_STS_BUF_RD_RDY_MASK	/;"	d	file:
ARASAN_NAND_INT_STS_BUF_WR_RDY_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_INT_STS_BUF_WR_RDY_MASK	/;"	d	file:
ARASAN_NAND_INT_STS_ERR_EN_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_INT_STS_ERR_EN_MASK	/;"	d	file:
ARASAN_NAND_INT_STS_MUL_BIT_ERR_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_INT_STS_MUL_BIT_ERR_MASK	/;"	d	file:
ARASAN_NAND_INT_STS_XFR_CMPLT_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_INT_STS_XFR_CMPLT_MASK	/;"	d	file:
ARASAN_NAND_INVALID_ADDR_CYCL	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_INVALID_ADDR_CYCL	/;"	d	file:
ARASAN_NAND_MEM_ADDR1_COL_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR1_COL_MASK	/;"	d	file:
ARASAN_NAND_MEM_ADDR1_PAGE_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK	/;"	d	file:
ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT	/;"	d	file:
ARASAN_NAND_MEM_ADDR2_BCH_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR2_BCH_MASK	/;"	d	file:
ARASAN_NAND_MEM_ADDR2_BCH_SHIFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR2_BCH_SHIFT	/;"	d	file:
ARASAN_NAND_MEM_ADDR2_CS_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR2_CS_MASK	/;"	d	file:
ARASAN_NAND_MEM_ADDR2_PAGE_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_MEM_ADDR2_PAGE_MASK	/;"	d	file:
ARASAN_NAND_PKTSIZE_1K	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_PKTSIZE_1K	/;"	d	file:
ARASAN_NAND_PKTSIZE_512	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_PKTSIZE_512	/;"	d	file:
ARASAN_NAND_PKT_REG_PKT_CNT_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_PKT_REG_PKT_CNT_MASK	/;"	d	file:
ARASAN_NAND_PKT_REG_PKT_CNT_SHFT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_PKT_REG_PKT_CNT_SHFT	/;"	d	file:
ARASAN_NAND_PKT_REG_PKT_SIZE_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_PKT_REG_PKT_SIZE_MASK	/;"	d	file:
ARASAN_NAND_POLL_TIMEOUT	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_POLL_TIMEOUT	/;"	d	file:
ARASAN_NAND_ROW_ADDR_CYCL_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_NAND_ROW_ADDR_CYCL_MASK	/;"	d	file:
ARASAN_PROG_BLK_ERS_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_BLK_ERS_MASK	/;"	d	file:
ARASAN_PROG_CHNG_ROWADR_END_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_CHNG_ROWADR_END_MASK	/;"	d	file:
ARASAN_PROG_GET_FTRS_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_GET_FTRS_MASK	/;"	d	file:
ARASAN_PROG_PG_PROG_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_PG_PROG_MASK	/;"	d	file:
ARASAN_PROG_RD_ID_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_RD_ID_MASK	/;"	d	file:
ARASAN_PROG_RD_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_RD_MASK	/;"	d	file:
ARASAN_PROG_RD_PARAM_PG_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_RD_PARAM_PG_MASK	/;"	d	file:
ARASAN_PROG_RD_STS_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_RD_STS_MASK	/;"	d	file:
ARASAN_PROG_RST_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_RST_MASK	/;"	d	file:
ARASAN_PROG_SET_FTRS_MASK	drivers/mtd/nand/arasan_nfc.c	/^#define ARASAN_PROG_SET_FTRS_MASK	/;"	d	file:
ARBITRATION_XBAR_CTRL_PPSB_ENABLE	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define ARBITRATION_XBAR_CTRL_PPSB_ENABLE	/;"	d
ARBITRATION_XBAR_CTRL_PPSB_ENABLE	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define ARBITRATION_XBAR_CTRL_PPSB_ENABLE	/;"	d
ARBSTAT	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define ARBSTAT	/;"	d
ARB_CHANNEL_OFFSET	drivers/spmi/spmi-msm.c	/^#define ARB_CHANNEL_OFFSET(/;"	d	file:
ARB_CI_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_CI_PARK	/;"	d
ARB_CNTRL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_CNTRL	/;"	d
ARB_CORE_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_CORE_PARK	/;"	d
ARB_DMA_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_DMA_PARK	/;"	d
ARB_DMA_SLV_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_DMA_SLV_PARK	/;"	d
ARB_EX_MEM_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_EX_MEM_PARK	/;"	d
ARB_INT_MEM_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_INT_MEM_PARK	/;"	d
ARB_LCD_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_LCD_PARK	/;"	d
ARB_LOCK_FLAG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_LOCK_FLAG	/;"	d
ARB_USB_PARK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARB_USB_PARK	/;"	d
ARC	arch/Kconfig	/^config ARC$/;"	c	choice:choice07312ef30104
ARC architecture	arch/arc/Kconfig	/^menu "ARC architecture"$/;"	m
ARCH	config.mk	/^ARCH := $(CONFIG_SYS_ARCH:"%"=%)$/;"	m
ARCHES	board/amcc/canyonlands/Kconfig	/^config ARCHES$/;"	c	choice:BOARD_TYPE
ARCH_ARM_MPCORE_H	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define ARCH_ARM_MPCORE_H$/;"	d
ARCH_AT91	arch/arm/Kconfig	/^config ARCH_AT91$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_ATH79	arch/mips/Kconfig	/^config ARCH_ATH79$/;"	c	choice:MIPS architecture""choiced4351f5b0104
ARCH_BCM283X	arch/arm/Kconfig	/^config ARCH_BCM283X$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_BCU_REGS_H	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define ARCH_BCU_REGS_H$/;"	d
ARCH_CINTEGRATOR	arch/arm/mach-integrator/Kconfig	/^config ARCH_CINTEGRATOR$/;"	c	menu:Integrator Options
ARCH_DAVINCI	arch/arm/Kconfig	/^config ARCH_DAVINCI$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_DDRMPHY_REGS_H	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define ARCH_DDRMPHY_REGS_H$/;"	d
ARCH_DDRPHY_INTT_H	arch/arm/mach-uniphier/dram/ddrphy-init.h	/^#define ARCH_DDRPHY_INTT_H$/;"	d
ARCH_DDRPHY_REGS_H	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define ARCH_DDRPHY_REGS_H$/;"	d
ARCH_DMA_MINALIGN	arch/arc/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/arm/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/avr32/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/blackfin/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/m68k/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/microblaze/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/mips/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/nds32/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/nios2/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/openrisc/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN /;"	d
ARCH_DMA_MINALIGN	arch/powerpc/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/sandbox/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/sh/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/sparc/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/x86/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_DMA_MINALIGN	arch/xtensa/include/asm/cache.h	/^#define ARCH_DMA_MINALIGN	/;"	d
ARCH_EXID_AT91SAM9G15	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_EXID_AT91SAM9G15	/;"	d
ARCH_EXID_AT91SAM9G25	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_EXID_AT91SAM9G25	/;"	d
ARCH_EXID_AT91SAM9G35	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_EXID_AT91SAM9G35	/;"	d
ARCH_EXID_AT91SAM9X25	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_EXID_AT91SAM9X25	/;"	d
ARCH_EXID_AT91SAM9X35	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_EXID_AT91SAM9X35	/;"	d
ARCH_EXID_SAMA5D21CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D21CU	/;"	d
ARCH_EXID_SAMA5D22CN	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D22CN	/;"	d
ARCH_EXID_SAMA5D22CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D22CU	/;"	d
ARCH_EXID_SAMA5D23CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D23CU	/;"	d
ARCH_EXID_SAMA5D24CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D24CU	/;"	d
ARCH_EXID_SAMA5D24CX	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D24CX	/;"	d
ARCH_EXID_SAMA5D26CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D26CU	/;"	d
ARCH_EXID_SAMA5D27CN	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D27CN	/;"	d
ARCH_EXID_SAMA5D27CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D27CU	/;"	d
ARCH_EXID_SAMA5D28CN	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D28CN	/;"	d
ARCH_EXID_SAMA5D28CU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_EXID_SAMA5D28CU	/;"	d
ARCH_EXID_SAMA5D31	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ARCH_EXID_SAMA5D31	/;"	d
ARCH_EXID_SAMA5D33	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ARCH_EXID_SAMA5D33	/;"	d
ARCH_EXID_SAMA5D34	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ARCH_EXID_SAMA5D34	/;"	d
ARCH_EXID_SAMA5D35	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ARCH_EXID_SAMA5D35	/;"	d
ARCH_EXID_SAMA5D36	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ARCH_EXID_SAMA5D36	/;"	d
ARCH_EXID_SAMA5D41	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ARCH_EXID_SAMA5D41	/;"	d
ARCH_EXID_SAMA5D42	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ARCH_EXID_SAMA5D42	/;"	d
ARCH_EXID_SAMA5D43	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ARCH_EXID_SAMA5D43	/;"	d
ARCH_EXID_SAMA5D44	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ARCH_EXID_SAMA5D44	/;"	d
ARCH_EXYNOS	arch/arm/Kconfig	/^config ARCH_EXYNOS$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_EXYNOS4	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS4$/;"	c	choice:choice9b416b3d0104
ARCH_EXYNOS5	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS5$/;"	c	choice:choice9b416b3d0104
ARCH_EXYNOS7	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS7$/;"	c	choice:choice9b416b3d0104
ARCH_FIXUP_FDT	Kconfig	/^config ARCH_FIXUP_FDT$/;"	c	menu:Boot images
ARCH_HAS_PREFETCH	arch/mips/include/asm/processor.h	/^#define ARCH_HAS_PREFETCH$/;"	d
ARCH_HAS_PREFETCH	drivers/usb/gadget/pxa25x_udc.c	/^#define ARCH_HAS_PREFETCH$/;"	d	file:
ARCH_HAS_PREFETCH	include/linux/list.h	/^#define ARCH_HAS_PREFETCH$/;"	d
ARCH_HIGHBANK	arch/arm/Kconfig	/^config ARCH_HIGHBANK$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_ID_AT91SAM9X5	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_ID_AT91SAM9X5	/;"	d
ARCH_ID_SAMA5D2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ARCH_ID_SAMA5D2	/;"	d
ARCH_ID_SAMA5D3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ARCH_ID_SAMA5D3	/;"	d
ARCH_ID_SAMA5D4	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ARCH_ID_SAMA5D4	/;"	d
ARCH_ID_VERSION_MASK	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ARCH_ID_VERSION_MASK	/;"	d
ARCH_INTEGRATOR	arch/arm/Kconfig	/^config ARCH_INTEGRATOR$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_INTEGRATOR_AP	arch/arm/mach-integrator/Kconfig	/^config ARCH_INTEGRATOR_AP$/;"	c	choice:Integrator Options""choicee9c481760104
ARCH_INTEGRATOR_CP	arch/arm/mach-integrator/Kconfig	/^config ARCH_INTEGRATOR_CP$/;"	c	choice:Integrator Options""choicee9c481760104
ARCH_KEYSTONE	arch/arm/Kconfig	/^config ARCH_KEYSTONE$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_LS1012A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1012A$/;"	c
ARCH_LS1021A	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config ARCH_LS1021A$/;"	c
ARCH_LS1043A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1043A$/;"	c
ARCH_LS1046A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1046A$/;"	c
ARCH_LS2080A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS2080A$/;"	c
ARCH_MESON	arch/arm/Kconfig	/^config ARCH_MESON$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_MIN_TASKALIGN	arch/mips/include/asm/processor.h	/^#define ARCH_MIN_TASKALIGN	/;"	d
ARCH_MVEBU	arch/arm/Kconfig	/^config ARCH_MVEBU$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_MX5	arch/arm/Kconfig	/^config ARCH_MX5$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_MX6	arch/arm/Kconfig	/^config ARCH_MX6$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_MX7	arch/arm/Kconfig	/^config ARCH_MX7$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_MXC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_MXC	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ARCH_MXC$/;"	d
ARCH_RMOBILE	arch/arm/Kconfig	/^config ARCH_RMOBILE$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_ROCKCHIP	arch/arm/Kconfig	/^config ARCH_ROCKCHIP$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_S5PC1XX	arch/arm/Kconfig	/^config ARCH_S5PC1XX$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_SBC_REGS_H	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define ARCH_SBC_REGS_H$/;"	d
ARCH_SC_REGS_H	arch/arm/mach-uniphier/sc-regs.h	/^#define ARCH_SC_REGS_H$/;"	d
ARCH_SG_REGS_H	arch/arm/mach-uniphier/sg-regs.h	/^#define ARCH_SG_REGS_H$/;"	d
ARCH_SNAPDRAGON	arch/arm/Kconfig	/^config ARCH_SNAPDRAGON$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_SOCFPGA	arch/arm/Kconfig	/^config ARCH_SOCFPGA$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_SUNXI	arch/arm/Kconfig	/^config ARCH_SUNXI$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_SUPPORT_PSCI	arch/arm/cpu/armv7/Kconfig	/^config ARCH_SUPPORT_PSCI$/;"	c
ARCH_TIMER_CTRL_ENABLE	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define ARCH_TIMER_CTRL_ENABLE	/;"	d
ARCH_UMC_REGS_H	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define ARCH_UMC_REGS_H$/;"	d
ARCH_UNIPHIER	arch/arm/Kconfig	/^config ARCH_UNIPHIER$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_UNIPHIER_32BIT	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_32BIT$/;"	c
ARCH_UNIPHIER_64BIT	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_64BIT$/;"	c
ARCH_UNIPHIER_LD11	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD11$/;"	c	choice:choicee1e20a3b0104
ARCH_UNIPHIER_LD20	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD20$/;"	c	choice:choicee1e20a3b0104
ARCH_UNIPHIER_LD4	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD4$/;"	c
ARCH_UNIPHIER_LD4_SLD8	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD4_SLD8$/;"	c	choice:choicee1e20a3b0104
ARCH_UNIPHIER_LD6B	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD6B$/;"	c
ARCH_UNIPHIER_PRO4	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO4$/;"	c	choice:choicee1e20a3b0104
ARCH_UNIPHIER_PRO5	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO5$/;"	c
ARCH_UNIPHIER_PRO5_PXS2_LD6B	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO5_PXS2_LD6B$/;"	c	choice:choicee1e20a3b0104
ARCH_UNIPHIER_PXS2	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PXS2$/;"	c
ARCH_UNIPHIER_SLD3	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_SLD3$/;"	c	choice:choicee1e20a3b0104
ARCH_UNIPHIER_SLD8	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_SLD8$/;"	c
ARCH_ZYNQ	arch/arm/Kconfig	/^config ARCH_ZYNQ$/;"	c	choice:ARM architecture""choice031ab9020104
ARCH_ZYNQMP	arch/arm/Kconfig	/^config ARCH_ZYNQMP$/;"	c	choice:ARM architecture""choice031ab9020104
ARCV	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ARCV	/;"	d
ARC_APB_PERIPHERAL_BASE	include/configs/axs10x.h	/^#define ARC_APB_PERIPHERAL_BASE	/;"	d
ARC_AUX_DC_CTRL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_DC_CTRL	/;"	d
ARC_AUX_DC_FLDL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_DC_FLDL	/;"	d
ARC_AUX_DC_FLSH	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_DC_FLSH	/;"	d
ARC_AUX_DC_IVDC	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_DC_IVDC	/;"	d
ARC_AUX_DC_IVDL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_DC_IVDL	/;"	d
ARC_AUX_DC_PTAG	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_DC_PTAG	/;"	d
ARC_AUX_IC_CTRL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IC_CTRL	/;"	d
ARC_AUX_IC_IVIC	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IC_IVIC	/;"	d
ARC_AUX_IC_IVIL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IC_IVIL	/;"	d
ARC_AUX_IC_PTAG	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IC_PTAG	/;"	d
ARC_AUX_IDENTITY	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IDENTITY	/;"	d
ARC_AUX_INTR_VEC_BASE	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_INTR_VEC_BASE	/;"	d
ARC_AUX_IO_COH_AP0_BASE	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IO_COH_AP0_BASE	/;"	d
ARC_AUX_IO_COH_AP0_SIZE	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IO_COH_AP0_SIZE	/;"	d
ARC_AUX_IO_COH_ENABLE	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IO_COH_ENABLE	/;"	d
ARC_AUX_IO_COH_PARTIAL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_IO_COH_PARTIAL	/;"	d
ARC_AUX_SLC_CONFIG	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_SLC_CONFIG	/;"	d
ARC_AUX_SLC_CTRL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_SLC_CTRL	/;"	d
ARC_AUX_SLC_FLDL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_SLC_FLDL	/;"	d
ARC_AUX_SLC_FLUSH	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_SLC_FLUSH	/;"	d
ARC_AUX_SLC_INVALIDATE	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_SLC_INVALIDATE	/;"	d
ARC_AUX_SLC_IVDL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_SLC_IVDL	/;"	d
ARC_AUX_STATUS32	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_STATUS32	/;"	d
ARC_AUX_TIMER0_CNT	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_TIMER0_CNT	/;"	d
ARC_AUX_TIMER0_CTRL	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_TIMER0_CTRL	/;"	d
ARC_AUX_TIMER0_LIMIT	arch/arc/include/asm/arcregs.h	/^#define ARC_AUX_TIMER0_LIMIT	/;"	d
ARC_BCR_CLUSTER	arch/arc/include/asm/arcregs.h	/^#define ARC_BCR_CLUSTER	/;"	d
ARC_BCR_DC_BUILD	arch/arc/include/asm/arcregs.h	/^#define ARC_BCR_DC_BUILD	/;"	d
ARC_BCR_IC_BUILD	arch/arc/include/asm/arcregs.h	/^#define ARC_BCR_IC_BUILD	/;"	d
ARC_BCR_SLC	arch/arc/include/asm/arcregs.h	/^#define ARC_BCR_SLC	/;"	d
ARC_CROSS_COMPILE	arch/arc/config.mk	/^ARC_CROSS_COMPILE := arc-linux-$/;"	m
ARC_CROSS_COMPILE	arch/arc/config.mk	/^ARC_CROSS_COMPILE := arceb-linux-$/;"	m
ARC_DWGMAC_BASE	include/configs/axs10x.h	/^#define ARC_DWGMAC_BASE	/;"	d
ARC_DWMMC_BASE	include/configs/axs10x.h	/^#define ARC_DWMMC_BASE	/;"	d
ARC_FPGA_PERIPHERAL_BASE	include/configs/axs10x.h	/^#define ARC_FPGA_PERIPHERAL_BASE	/;"	d
ARC_MMU_ABSENT	arch/arc/Kconfig	/^config ARC_MMU_ABSENT$/;"	c	choice:ARC architecture""choice763e4ef80304
ARC_MMU_V2	arch/arc/Kconfig	/^config ARC_MMU_V2$/;"	c	choice:ARC architecture""choice763e4ef80304
ARC_MMU_V3	arch/arc/Kconfig	/^config ARC_MMU_V3$/;"	c	choice:ARC architecture""choice763e4ef80304
ARC_MMU_V4	arch/arc/Kconfig	/^config ARC_MMU_V4$/;"	c	choice:ARC architecture""choice763e4ef80304
AREF_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define AREF_DISABLE	/;"	d
AREF_EN	arch/arm/mach-exynos/exynos4_setup.h	/^#define AREF_EN	/;"	d
AREF_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define AREF_EN	/;"	d
ARE_ARCV_1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ARE_ARCV_1	/;"	d
ARG0_MASK	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ARG0_MASK	/;"	d
ARG1_MASK	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ARG1_MASK	/;"	d
ARGB8888	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	ARGB8888 = 0,$/;"	e	enum:rockchip_fb_data_format_t
ARGPUSH	arch/sparc/cpu/leon2/start.S	/^ARGPUSH = (WINDOWSIZE + 4)$/;"	d
ARGPUSH	arch/sparc/cpu/leon3/start.S	/^ARGPUSH = (WINDOWSIZE + 4)$/;"	d
ARGPUSHSIZE	arch/sparc/cpu/leon2/start.S	/^ARGPUSHSIZE = (6 * 4)$/;"	d
ARGPUSHSIZE	arch/sparc/cpu/leon3/start.S	/^ARGPUSHSIZE = (6 * 4)$/;"	d
ARISTAINETOS_USB_H1_PWR	include/configs/aristainetos.h	/^#define ARISTAINETOS_USB_H1_PWR	/;"	d
ARISTAINETOS_USB_H1_PWR	include/configs/aristainetos2.h	/^#define ARISTAINETOS_USB_H1_PWR	/;"	d
ARISTAINETOS_USB_H1_PWR	include/configs/aristainetos2b.h	/^#define ARISTAINETOS_USB_H1_PWR	/;"	d
ARISTAINETOS_USB_OTG_PWR	include/configs/aristainetos.h	/^#define ARISTAINETOS_USB_OTG_PWR	/;"	d
ARISTAINETOS_USB_OTG_PWR	include/configs/aristainetos2.h	/^#define ARISTAINETOS_USB_OTG_PWR	/;"	d
ARISTAINETOS_USB_OTG_PWR	include/configs/aristainetos2b.h	/^#define ARISTAINETOS_USB_OTG_PWR	/;"	d
ARM	arch/Kconfig	/^config ARM$/;"	c	choice:choice07312ef30104
ARM	arch/arm/cpu/armv7/cache_v7_asm.S	/^#define ARM(/;"	d	file:
ARM	arch/arm/include/asm/unified.h	/^#define ARM(/;"	d
ARM architecture	arch/arm/Kconfig	/^menu "ARM architecture"$/;"	m
ARM debug	arch/arm/Kconfig.debug	/^menu "ARM debug"$/;"	m
ARM64	arch/arm/Kconfig	/^config ARM64$/;"	c	menu:ARM architecture
ARM920T_CONTROL	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^#define ARM920T_CONTROL	/;"	d	file:
ARMADA_32BIT	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_32BIT$/;"	c
ARMADA_3700	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_3700$/;"	c
ARMADA_375	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_375$/;"	c
ARMADA_38X	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_38X$/;"	c
ARMADA_64BIT	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_64BIT$/;"	c
ARMADA_8K	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_8K$/;"	c
ARMADA_XP	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_XP$/;"	c
ARMADA_XP_PUP_ENABLE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define ARMADA_XP_PUP_ENABLE	/;"	d
ARMADILLO_800EVA_SDRAM_BASE	include/configs/armadillo-800eva.h	/^#define ARMADILLO_800EVA_SDRAM_BASE	/;"	d
ARMADILLO_800EVA_SDRAM_SIZE	include/configs/armadillo-800eva.h	/^#define ARMADILLO_800EVA_SDRAM_SIZE	/;"	d
ARMCLK	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	include/dt-bindings/clock/rk3036-cru.h	/^#define ARMCLK	/;"	d
ARMCLK	include/dt-bindings/clock/rk3288-cru.h	/^#define ARMCLK	/;"	d
ARMCLKB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKB	include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKB	/;"	d
ARMCLKL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMCLKL	include/dt-bindings/clock/rk3399-cru.h	/^#define ARMCLKL	/;"	d
ARMD1_APBC1_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_APBC1_BASE	/;"	d
ARMD1_APBC2_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_APBC2_BASE	/;"	d
ARMD1_APMU_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_APMU_BASE	/;"	d
ARMD1_CPU_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_CPU_BASE	/;"	d
ARMD1_DRAM_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_DRAM_BASE	/;"	d
ARMD1_FEC_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_FEC_BASE	/;"	d
ARMD1_GPIO_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_GPIO_BASE	/;"	d
ARMD1_MFPR_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_MFPR_BASE	/;"	d
ARMD1_MPMU_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_MPMU_BASE	/;"	d
ARMD1_SSP1_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_SSP1_BASE	/;"	d
ARMD1_SSP2_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_SSP2_BASE	/;"	d
ARMD1_SSP3_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_SSP3_BASE	/;"	d
ARMD1_SSP4_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_SSP4_BASE	/;"	d
ARMD1_SSP5_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_SSP5_BASE	/;"	d
ARMD1_TIMER_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_TIMER_BASE	/;"	d
ARMD1_UART1_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_UART1_BASE	/;"	d
ARMD1_UART2_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_UART2_BASE	/;"	d
ARMD1_UART3_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_UART3_BASE	/;"	d
ARMD1_USB_HOST_BASE	arch/arm/include/asm/arch-armada100/armada100.h	/^#define ARMD1_USB_HOST_BASE	/;"	d
ARMDFEC_RXQ_DESC_ALIGNED_SIZE	drivers/net/armada100_fec.h	/^#define ARMDFEC_RXQ_DESC_ALIGNED_SIZE /;"	d
ARMV7M_H	arch/arm/include/asm/armv7m.h	/^#define ARMV7M_H$/;"	d
ARMV7_BOOT_SEC_DEFAULT	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_BOOT_SEC_DEFAULT$/;"	c
ARMV7_CLIDR_CTYPE_DATA_ONLY	arch/arm/include/asm/armv7.h	/^#define ARMV7_CLIDR_CTYPE_DATA_ONLY	/;"	d
ARMV7_CLIDR_CTYPE_INSTRUCTION_DATA	arch/arm/include/asm/armv7.h	/^#define ARMV7_CLIDR_CTYPE_INSTRUCTION_DATA	/;"	d
ARMV7_CLIDR_CTYPE_INSTRUCTION_ONLY	arch/arm/include/asm/armv7.h	/^#define ARMV7_CLIDR_CTYPE_INSTRUCTION_ONLY	/;"	d
ARMV7_CLIDR_CTYPE_NO_CACHE	arch/arm/include/asm/armv7.h	/^#define ARMV7_CLIDR_CTYPE_NO_CACHE	/;"	d
ARMV7_CLIDR_CTYPE_UNIFIED	arch/arm/include/asm/armv7.h	/^#define ARMV7_CLIDR_CTYPE_UNIFIED	/;"	d
ARMV7_CSSELR_IND_DATA_UNIFIED	arch/arm/include/asm/armv7.h	/^#define ARMV7_CSSELR_IND_DATA_UNIFIED	/;"	d
ARMV7_CSSELR_IND_INSTRUCTION	arch/arm/include/asm/armv7.h	/^#define ARMV7_CSSELR_IND_INSTRUCTION	/;"	d
ARMV7_DCACHE_CLEAN_INVAL_RANGE	arch/arm/cpu/armv7/cache_v7.c	/^#define ARMV7_DCACHE_CLEAN_INVAL_RANGE	/;"	d	file:
ARMV7_DCACHE_INVAL_RANGE	arch/arm/cpu/armv7/cache_v7.c	/^#define ARMV7_DCACHE_INVAL_RANGE	/;"	d	file:
ARMV7_DCACHE_POLICY	arch/arm/cpu/armv7/omap-common/omap-cache.c	/^#define ARMV7_DCACHE_POLICY	/;"	d	file:
ARMV7_DOMAIN_CLIENT	arch/arm/cpu/armv7/omap-common/omap-cache.c	/^#define ARMV7_DOMAIN_CLIENT	/;"	d	file:
ARMV7_DOMAIN_MASK	arch/arm/cpu/armv7/omap-common/omap-cache.c	/^#define ARMV7_DOMAIN_MASK	/;"	d	file:
ARMV7_H	arch/arm/include/asm/armv7.h	/^#define ARMV7_H$/;"	d
ARMV7_LPAE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_LPAE$/;"	c
ARMV7_NONSEC	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_NONSEC$/;"	c
ARMV7_PSCI	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_PSCI$/;"	c
ARMV7_PSCI_NR_CPUS	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_PSCI_NR_CPUS$/;"	c
ARMV7_VIRT	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_VIRT$/;"	c
ARMV8_MULTIENTRY	arch/arm/cpu/armv8/Kconfig	/^config ARMV8_MULTIENTRY$/;"	c
ARMV8_SPIN_TABLE	arch/arm/cpu/armv8/Kconfig	/^config ARMV8_SPIN_TABLE$/;"	c
ARM_A7_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ARM_A7_CLK_ROOT = 0,$/;"	e	enum:clk_root_index
ARM_A7_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_ARM_MAIN_800M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_ARM_MAIN_800M_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_DRAM_MAIN_1066M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_DRAM_MAIN_1066M_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
ARM_A7_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_A7_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ARM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ARM_BASE_ADDR	/;"	d
ARM_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ARM_BASE_ADDR	/;"	d
ARM_BOOTM_H	arch/arm/include/asm/bootm.h	/^#define ARM_BOOTM_H$/;"	d
ARM_BOOTM_H	arch/x86/include/asm/bootm.h	/^#define ARM_BOOTM_H$/;"	d
ARM_DIV2_ORDER	arch/arm/lib/lib1funcs.S	/^.macro ARM_DIV2_ORDER divisor, order$/;"	m
ARM_DIV_BODY	arch/arm/lib/lib1funcs.S	/^.macro ARM_DIV_BODY dividend, divisor, result, curbit$/;"	m
ARM_DIV_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define ARM_DIV_MAX /;"	d	file:
ARM_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ARM_IPS_BASE_ADDR /;"	d
ARM_LR	arch/arm/lib/interrupts_m.c	/^#define ARM_LR	/;"	d	file:
ARM_M0_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ARM_M0_CLK_ROOT = 2,$/;"	e	enum:clk_root_index
ARM_M0_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ARM_M0_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M0_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ARM_M4_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ARM_M4_CLK_ROOT = 1,$/;"	e	enum:clk_root_index
ARM_M4_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ARM_M4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ARM_M4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ARM_MCLK	drivers/mmc/arm_pl180_mmci.h	/^#define ARM_MCLK	/;"	d
ARM_MOD_BODY	arch/arm/lib/lib1funcs.S	/^.macro ARM_MOD_BODY dividend, divisor, order, spare$/;"	m
ARM_ORIG_r0	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_ORIG_r0	/;"	d
ARM_PC	arch/arm/lib/interrupts_m.c	/^#define ARM_PC	/;"	d	file:
ARM_PERIPHBASE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ARM_PERIPHBASE /;"	d
ARM_PLL	arch/arm/include/asm/arch-s32v234/clock.h	/^	ARM_PLL = 0,$/;"	e	enum:pll_type
ARM_PLLDIV	arch/arm/mach-davinci/cpu.c	/^#define ARM_PLLDIV	/;"	d	file:
ARM_PLLDIV	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define ARM_PLLDIV	/;"	d
ARM_PLL_PHI0_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI0_FREQ	/;"	d
ARM_PLL_PHI1_DFS1_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS1_EN	/;"	d
ARM_PLL_PHI1_DFS1_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS1_MFI	/;"	d
ARM_PLL_PHI1_DFS1_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS1_MFN	/;"	d
ARM_PLL_PHI1_DFS2_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS2_EN	/;"	d
ARM_PLL_PHI1_DFS2_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS2_MFI	/;"	d
ARM_PLL_PHI1_DFS2_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS2_MFN	/;"	d
ARM_PLL_PHI1_DFS3_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS3_EN	/;"	d
ARM_PLL_PHI1_DFS3_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS3_MFI	/;"	d
ARM_PLL_PHI1_DFS3_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS3_MFN	/;"	d
ARM_PLL_PHI1_DFS_Nr	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_DFS_Nr	/;"	d
ARM_PLL_PHI1_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PHI1_FREQ	/;"	d
ARM_PLL_PLLDV_MFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PLLDV_MFD	/;"	d
ARM_PLL_PLLDV_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PLLDV_MFN	/;"	d
ARM_PLL_PLLDV_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ARM_PLL_PLLDV_PREDIV	/;"	d
ARM_PPMRR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ARM_PPMRR	/;"	d
ARM_PSCI_0_2_FN	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN(/;"	d
ARM_PSCI_0_2_FN_AFFINITY_INFO	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_AFFINITY_INFO	/;"	d
ARM_PSCI_0_2_FN_BASE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_BASE	/;"	d
ARM_PSCI_0_2_FN_CPU_OFF	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_CPU_OFF	/;"	d
ARM_PSCI_0_2_FN_CPU_ON	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_CPU_ON	/;"	d
ARM_PSCI_0_2_FN_CPU_SUSPEND	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_CPU_SUSPEND	/;"	d
ARM_PSCI_0_2_FN_MIGRATE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_MIGRATE	/;"	d
ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE	/;"	d
ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	/;"	d
ARM_PSCI_0_2_FN_PSCI_VERSION	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_PSCI_VERSION	/;"	d
ARM_PSCI_0_2_FN_SYSTEM_OFF	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_SYSTEM_OFF	/;"	d
ARM_PSCI_0_2_FN_SYSTEM_RESET	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_0_2_FN_SYSTEM_RESET	/;"	d
ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND	/;"	d
ARM_PSCI_1_0_FN_CPU_FREEZE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_CPU_FREEZE	/;"	d
ARM_PSCI_1_0_FN_NODE_HW_STATE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_NODE_HW_STATE	/;"	d
ARM_PSCI_1_0_FN_PSCI_FEATURES	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_PSCI_FEATURES	/;"	d
ARM_PSCI_1_0_FN_SET_SUSPEND_MODE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE	/;"	d
ARM_PSCI_1_0_FN_STAT_COUNT	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_STAT_COUNT	/;"	d
ARM_PSCI_1_0_FN_STAT_RESIDENCY	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_STAT_RESIDENCY	/;"	d
ARM_PSCI_1_0_FN_SYSTEM_SUSPEND	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND	/;"	d
ARM_PSCI_FN	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_FN(/;"	d
ARM_PSCI_FN_BASE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_FN_BASE	/;"	d
ARM_PSCI_FN_CPU_OFF	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_FN_CPU_OFF	/;"	d
ARM_PSCI_FN_CPU_ON	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_FN_CPU_ON	/;"	d
ARM_PSCI_FN_CPU_SUSPEND	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_FN_CPU_SUSPEND	/;"	d
ARM_PSCI_FN_MIGRATE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_FN_MIGRATE	/;"	d
ARM_PSCI_RET_ALREADY_ON	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_ALREADY_ON	/;"	d
ARM_PSCI_RET_DENIED	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_DENIED	/;"	d
ARM_PSCI_RET_DISABLED	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_DISABLED	/;"	d
ARM_PSCI_RET_INTERNAL_FAILURE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_INTERNAL_FAILURE	/;"	d
ARM_PSCI_RET_INVAL	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_INVAL	/;"	d
ARM_PSCI_RET_INVALID_ADDRESS	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_INVALID_ADDRESS	/;"	d
ARM_PSCI_RET_NI	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_NI	/;"	d
ARM_PSCI_RET_NOT_PRESENT	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_NOT_PRESENT	/;"	d
ARM_PSCI_RET_ON_PENDING	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_ON_PENDING	/;"	d
ARM_PSCI_RET_SUCCESS	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_RET_SUCCESS	/;"	d
ARM_PSCI_STACK_SHIFT	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_STACK_SHIFT	/;"	d
ARM_PSCI_STACK_SIZE	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_STACK_SIZE	/;"	d
ARM_PSCI_VER_0_2	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_VER_0_2	/;"	d
ARM_PSCI_VER_1_0	arch/arm/include/asm/psci.h	/^#define ARM_PSCI_VER_1_0	/;"	d
ARM_R0	arch/arm/lib/interrupts_m.c	/^#define ARM_R0	/;"	d	file:
ARM_R1	arch/arm/lib/interrupts_m.c	/^#define ARM_R1	/;"	d	file:
ARM_R12	arch/arm/lib/interrupts_m.c	/^#define ARM_R12	/;"	d	file:
ARM_R2	arch/arm/lib/interrupts_m.c	/^#define ARM_R2	/;"	d	file:
ARM_R3	arch/arm/lib/interrupts_m.c	/^#define ARM_R3	/;"	d	file:
ARM_SOC_BOOT0_HOOK	arch/arm/cpu/armv8/start.S	/^ARM_SOC_BOOT0_HOOK$/;"	l
ARM_SOC_BOOT0_HOOK	arch/arm/include/asm/arch-bcm235xx/boot0.h	/^#define ARM_SOC_BOOT0_HOOK	/;"	d
ARM_SOC_BOOT0_HOOK	arch/arm/include/asm/arch-bcm281xx/boot0.h	/^#define ARM_SOC_BOOT0_HOOK	/;"	d
ARM_SOC_BOOT0_HOOK	arch/arm/include/asm/arch-sunxi/boot0.h	/^#define ARM_SOC_BOOT0_HOOK	/;"	d
ARM_SOC_BOOT0_HOOK	arch/arm/include/asm/arch/boot0.h	/^#define ARM_SOC_BOOT0_HOOK	/;"	d
ARM_SOC_BOOT0_HOOK	arch/arm/lib/vectors.S	/^ARM_SOC_BOOT0_HOOK$/;"	l
ARM_STD_SVC_VERSION	include/cavium/thunderx_svc.h	/^#define ARM_STD_SVC_VERSION	/;"	d
ARM_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define ARM_SUPPORTED_SPEEDS	/;"	d
ARM_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2g.h	/^#define ARM_SUPPORTED_SPEEDS	/;"	d
ARM_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define ARM_SUPPORTED_SPEEDS	/;"	d
ARM_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define ARM_SUPPORTED_SPEEDS	/;"	d
ARM_XPSR	arch/arm/lib/interrupts_m.c	/^#define ARM_XPSR	/;"	d	file:
ARM_cpsr	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_cpsr	/;"	d
ARM_fp	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_fp	/;"	d
ARM_ip	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_ip	/;"	d
ARM_lr	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_lr	/;"	d
ARM_pc	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_pc	/;"	d
ARM_r0	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r0	/;"	d
ARM_r1	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r1	/;"	d
ARM_r10	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r10	/;"	d
ARM_r2	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r2	/;"	d
ARM_r3	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r3	/;"	d
ARM_r4	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r4	/;"	d
ARM_r5	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r5	/;"	d
ARM_r6	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r6	/;"	d
ARM_r7	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r7	/;"	d
ARM_r8	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r8	/;"	d
ARM_r9	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_r9	/;"	d
ARM_sp	arch/arm/include/asm/proc-armv/ptrace.h	/^#define ARM_sp	/;"	d
ARP	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
ARPOP_REPLY	include/net.h	/^#   define ARPOP_REPLY	/;"	d
ARPOP_REQUEST	include/net.h	/^#   define ARPOP_REQUEST /;"	d
ARP_CACHE_SIZE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ARP_CACHE_SIZE	/;"	d
ARP_ETHER	include/net.h	/^#   define ARP_ETHER	/;"	d
ARP_HDR_SIZE	include/net.h	/^#define ARP_HDR_SIZE	/;"	d
ARP_HLEN	include/net.h	/^#   define ARP_HLEN	/;"	d
ARP_PLEN	include/net.h	/^#   define ARP_PLEN	/;"	d
ARP_REPLY	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ARP_REPLY	/;"	d
ARP_REQUEST	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ARP_REQUEST	/;"	d
ARP_TIMEOUT	net/arp.c	/^# define ARP_TIMEOUT	/;"	d	file:
ARP_TIMEOUT_COUNT	net/arp.c	/^# define ARP_TIMEOUT_COUNT	/;"	d	file:
ARRAY_SIZE	common/env_flags.c	/^#define ARRAY_SIZE(/;"	d	file:
ARRAY_SIZE	include/linux/kernel.h	/^#define ARRAY_SIZE(/;"	d
ARRAY_SIZE	tools/imagetool.h	/^#define ARRAY_SIZE(/;"	d
ARRAY_SIZE	tools/mxsimage.h	/^#define ARRAY_SIZE(/;"	d
ARSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ARSR	/;"	d
ARTS	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ARTS	/;"	d
ARTS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ARTS	/;"	d
ARTS_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ARTS_P	/;"	d
AR_CLASS	arch/arm/include/asm/unified.h	/^#define AR_CLASS(/;"	d
AR_FAILED	drivers/net/smc91111.h	/^#define AR_FAILED	/;"	d
AR_REG	drivers/net/smc91111.h	/^#define	AR_REG	/;"	d
AR_REGNO_TO_A_REGNO	arch/xtensa/include/asm/ptrace.h	/^#define AR_REGNO_TO_A_REGNO(/;"	d
AS	Makefile	/^AS		= $(CROSS_COMPILE)as$/;"	m
AS	include/i8042.h	/^#define AS	/;"	d
AS3722_ASIC_ID1	drivers/power/as3722.c	/^#define AS3722_ASIC_ID1 /;"	d	file:
AS3722_ASIC_ID2	drivers/power/as3722.c	/^#define AS3722_ASIC_ID2 /;"	d	file:
AS3722_DEVICE_ID	drivers/power/as3722.c	/^#define  AS3722_DEVICE_ID /;"	d	file:
AS3722_GPIO_CONTROL	drivers/power/as3722.c	/^#define AS3722_GPIO_CONTROL(/;"	d	file:
AS3722_GPIO_CONTROL_INVERT	drivers/power/as3722.c	/^#define  AS3722_GPIO_CONTROL_INVERT /;"	d	file:
AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH	drivers/power/as3722.c	/^#define  AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH /;"	d	file:
AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL	drivers/power/as3722.c	/^#define  AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL /;"	d	file:
AS3722_GPIO_INVERT	include/power/as3722.h	/^#define AS3722_GPIO_INVERT /;"	d
AS3722_GPIO_OUTPUT_VDDH	include/power/as3722.h	/^#define AS3722_GPIO_OUTPUT_VDDH /;"	d
AS3722_GPIO_SIGNAL_OUT	drivers/power/as3722.c	/^#define AS3722_GPIO_SIGNAL_OUT /;"	d	file:
AS3722_I2C_ADDR	board/nvidia/venice2/as3722_init.h	/^#define AS3722_I2C_ADDR	/;"	d
AS3722_LDCONTROL_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDCONTROL_REG	/;"	d
AS3722_LDO2CONTROL_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDO2CONTROL_DATA	/;"	d
AS3722_LDO2VOLTAGE_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDO2VOLTAGE_DATA	/;"	d
AS3722_LDO2VOLTAGE_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDO2VOLTAGE_REG	/;"	d
AS3722_LDO6CONTROL_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDO6CONTROL_DATA	/;"	d
AS3722_LDO6VOLTAGE_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDO6VOLTAGE_DATA	/;"	d
AS3722_LDO6VOLTAGE_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_LDO6VOLTAGE_REG	/;"	d
AS3722_LDO_CONTROL	drivers/power/as3722.c	/^#define AS3722_LDO_CONTROL /;"	d	file:
AS3722_LDO_VOLTAGE	drivers/power/as3722.c	/^#define AS3722_LDO_VOLTAGE(/;"	d	file:
AS3722_SD0CONTROL_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD0CONTROL_DATA	/;"	d
AS3722_SD0VOLTAGE_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD0VOLTAGE_DATA	/;"	d
AS3722_SD0VOLTAGE_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD0VOLTAGE_REG	/;"	d
AS3722_SD1CONTROL_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD1CONTROL_DATA	/;"	d
AS3722_SD1VOLTAGE_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD1VOLTAGE_DATA	/;"	d
AS3722_SD1VOLTAGE_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD1VOLTAGE_REG	/;"	d
AS3722_SD6CONTROL_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD6CONTROL_DATA	/;"	d
AS3722_SD6VOLTAGE_DATA	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD6VOLTAGE_DATA	/;"	d
AS3722_SD6VOLTAGE_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SD6VOLTAGE_REG	/;"	d
AS3722_SDCONTROL_REG	board/nvidia/venice2/as3722_init.h	/^#define AS3722_SDCONTROL_REG	/;"	d
AS3722_SD_CONTROL	drivers/power/as3722.c	/^#define AS3722_SD_CONTROL /;"	d	file:
AS3722_SD_VOLTAGE	drivers/power/as3722.c	/^#define AS3722_SD_VOLTAGE(/;"	d	file:
ASC	drivers/usb/gadget/storage_common.c	/^#define ASC(/;"	d	file:
ASCQ	drivers/usb/gadget/storage_common.c	/^#define ASCQ(/;"	d	file:
ASCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ASCR	/;"	d
ASDCNT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ASDCNT	/;"	d
ASIX_BASE_NAME	drivers/usb/eth/asix.c	/^#define ASIX_BASE_NAME /;"	d	file:
ASIX_BASE_NAME	drivers/usb/eth/asix88179.c	/^#define ASIX_BASE_NAME /;"	d	file:
ASI_BYPASS	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_BYPASS	/;"	d
ASI_BYPASS	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_BYPASS	/;"	d
ASI_CACHEMISS	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_CACHEMISS	/;"	d
ASI_CACHEMISS	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_CACHEMISS	/;"	d
ASI_DFLUSH	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_DFLUSH	/;"	d
ASI_DFLUSH	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_DFLUSH	/;"	d
ASI_IFLUSH	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_IFLUSH	/;"	d
ASI_IFLUSH	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_IFLUSH	/;"	d
ASI_MMUFLUSH	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_MMUFLUSH	/;"	d
ASI_MMUFLUSH	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_MMUFLUSH	/;"	d
ASI_M_FLUSH_PROBE	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_M_FLUSH_PROBE	/;"	d
ASI_M_FLUSH_PROBE	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_M_FLUSH_PROBE	/;"	d
ASI_M_MMUREGS	arch/sparc/include/asm/arch-leon2/asi.h	/^#define ASI_M_MMUREGS	/;"	d
ASI_M_MMUREGS	arch/sparc/include/asm/arch-leon3/asi.h	/^#define ASI_M_MMUREGS	/;"	d
ASLC_ID	arch/x86/include/asm/acpi_table.h	/^#define ASLC_ID	/;"	d
ASLS	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define ASLS	/;"	d
ASM_0	post/lib_powerpc/cpu_asm.h	/^#define ASM_0(/;"	d
ASM_1	post/lib_powerpc/cpu_asm.h	/^#define ASM_1(/;"	d
ASM_11	post/lib_powerpc/cpu_asm.h	/^#define ASM_11(/;"	d
ASM_113	post/lib_powerpc/cpu_asm.h	/^#define ASM_113(/;"	d
ASM_11C	post/lib_powerpc/cpu_asm.h	/^#define ASM_11C(/;"	d
ASM_11I	post/lib_powerpc/cpu_asm.h	/^#define ASM_11I(/;"	d
ASM_11IF	post/lib_powerpc/cpu_asm.h	/^#define ASM_11IF(/;"	d
ASM_11IX	post/lib_powerpc/cpu_asm.h	/^#define ASM_11IX(/;"	d
ASM_11S	post/lib_powerpc/cpu_asm.h	/^#define ASM_11S(/;"	d
ASM_11X	post/lib_powerpc/cpu_asm.h	/^#define ASM_11X(/;"	d
ASM_12	post/lib_powerpc/cpu_asm.h	/^#define ASM_12(/;"	d
ASM_122	post/lib_powerpc/cpu_asm.h	/^#define ASM_122(/;"	d
ASM_12F	post/lib_powerpc/cpu_asm.h	/^#define ASM_12F(/;"	d
ASM_12X	post/lib_powerpc/cpu_asm.h	/^#define ASM_12X(/;"	d
ASM_1C	post/lib_powerpc/cpu_asm.h	/^#define ASM_1C(/;"	d
ASM_1IC	post/lib_powerpc/cpu_asm.h	/^#define ASM_1IC(/;"	d
ASM_1O	post/lib_powerpc/cpu_asm.h	/^#define ASM_1O(/;"	d
ASM_2C	post/lib_powerpc/cpu_asm.h	/^#define ASM_2C(/;"	d
ASM_3O	post/lib_powerpc/cpu_asm.h	/^#define ASM_3O(/;"	d
ASM_ADDI	post/lib_powerpc/cpu_asm.h	/^#define ASM_ADDI(/;"	d
ASM_ARCH_MXCMMC_H	arch/arm/include/asm/arch-mx27/mxcmmc.h	/^#define ASM_ARCH_MXCMMC_H$/;"	d
ASM_ARCH_PEI_DATA_H	arch/x86/include/asm/arch-broadwell/pei_data.h	/^#define ASM_ARCH_PEI_DATA_H$/;"	d
ASM_ARCH_PEI_DATA_H	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^#define ASM_ARCH_PEI_DATA_H$/;"	d
ASM_ARM_HARDWARE_PCI_V3_H	board/armltd/integrator/pci_v3.h	/^#define ASM_ARM_HARDWARE_PCI_V3_H$/;"	d
ASM_B	post/lib_powerpc/cpu_asm.h	/^#define ASM_B(/;"	d
ASM_BL	post/lib_powerpc/cpu_asm.h	/^#define ASM_BL(/;"	d
ASM_BLR	post/lib_powerpc/cpu_asm.h	/^#define ASM_BLR	/;"	d
ASM_DRAMINIT	arch/m68k/cpu/mcf5227x/start.S	/^#define ASM_DRAMINIT	/;"	d	file:
ASM_DRAMINIT	arch/m68k/cpu/mcf5445x/start.S	/^#define ASM_DRAMINIT	/;"	d	file:
ASM_DRAMINIT_N	arch/m68k/cpu/mcf5445x/start.S	/^#define ASM_DRAMINIT_N	/;"	d	file:
ASM_LI	post/lib_powerpc/cpu_asm.h	/^#define ASM_LI(/;"	d
ASM_LMW	post/lib_powerpc/cpu_asm.h	/^#define ASM_LMW(/;"	d
ASM_LSWI	post/lib_powerpc/cpu_asm.h	/^#define ASM_LSWI(/;"	d
ASM_LSWX	post/lib_powerpc/cpu_asm.h	/^#define ASM_LSWX(/;"	d
ASM_LWZ	post/lib_powerpc/cpu_asm.h	/^#define ASM_LWZ(/;"	d
ASM_MCRF	post/lib_powerpc/cpu_asm.h	/^#define ASM_MCRF(/;"	d
ASM_MCRXR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MCRXR(/;"	d
ASM_MFCR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MFCR(/;"	d
ASM_MFCTR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MFCTR(/;"	d
ASM_MFLR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MFLR(/;"	d
ASM_MFXER	post/lib_powerpc/cpu_asm.h	/^#define ASM_MFXER(/;"	d
ASM_MTCR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MTCR(/;"	d
ASM_MTCTR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MTCTR(/;"	d
ASM_MTLR	post/lib_powerpc/cpu_asm.h	/^#define ASM_MTLR(/;"	d
ASM_MTXER	post/lib_powerpc/cpu_asm.h	/^#define ASM_MTXER(/;"	d
ASM_NL	arch/arc/include/asm/linkage.h	/^#define ASM_NL	/;"	d
ASM_NL	include/linux/linkage.h	/^#define ASM_NL	/;"	d
ASM_SBF_IMG_HDR	arch/m68k/cpu/mcf5227x/start.S	/^#define ASM_SBF_IMG_HDR	/;"	d	file:
ASM_SBF_IMG_HDR	arch/m68k/cpu/mcf5445x/start.S	/^#define ASM_SBF_IMG_HDR	/;"	d	file:
ASM_STMW	post/lib_powerpc/cpu_asm.h	/^#define ASM_STMW(/;"	d
ASM_STSWI	post/lib_powerpc/cpu_asm.h	/^#define ASM_STSWI(/;"	d
ASM_STSWX	post/lib_powerpc/cpu_asm.h	/^#define ASM_STSWX(/;"	d
ASM_STW	post/lib_powerpc/cpu_asm.h	/^#define ASM_STW(/;"	d
ASPECT_5625	include/edid.h	/^	ASPECT_5625,$/;"	e	enum:edid_aspect
ASPECT_625	include/edid.h	/^	ASPECT_625 = 0,$/;"	e	enum:edid_aspect
ASPECT_75	include/edid.h	/^	ASPECT_75,$/;"	e	enum:edid_aspect
ASPECT_8	include/edid.h	/^	ASPECT_8,$/;"	e	enum:edid_aspect
ASRAM_BSRAM	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ASRAM_BSRAM	/;"	d
ASRC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ASRC_BASE_ADDR /;"	d
ASRC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ASRC_BASE_ADDR	/;"	d
ASRC_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define ASRC_PAD_CTRL /;"	d	file:
ASTKY	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ASTKY	/;"	d
ASTP	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	ASTP	/;"	d
ASTRIUM_devices	cmd/ambapp.c	/^static ambapp_device_name ASTRIUM_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
ASTRO_ID	include/configs/astro_mcf5373l.h	/^#define ASTRO_ID	/;"	d
ASYNC	arch/arm/include/asm/ti-common/ti-edma3.h	/^	ASYNC = 0,$/;"	e	enum:edma3_sync_dimension
ASYNC	arch/arm/mach-exynos/exynos4_setup.h	/^#define ASYNC	/;"	d
ASYNC_CONFIG	arch/arm/mach-exynos/exynos4_setup.h	/^#define ASYNC_CONFIG	/;"	d
AT	arch/mips/include/asm/regdef.h	/^#define AT	/;"	d
AT24MAC_ADDR	include/configs/sama5d2_xplained.h	/^#define AT24MAC_ADDR	/;"	d
AT24MAC_REG	include/configs/sama5d2_xplained.h	/^#define AT24MAC_REG	/;"	d
AT32AP700x_CHIP_HAS_LCDC	arch/avr32/include/asm/arch-at32ap700x/chip-features.h	/^#define AT32AP700x_CHIP_HAS_LCDC$/;"	d
AT32AP700x_CHIP_HAS_MACB	arch/avr32/include/asm/arch-at32ap700x/chip-features.h	/^#define AT32AP700x_CHIP_HAS_MACB$/;"	d
AT32AP700x_CHIP_HAS_MMCI	arch/avr32/include/asm/arch-at32ap700x/chip-features.h	/^#define AT32AP700x_CHIP_HAS_MMCI$/;"	d
AT32AP700x_CHIP_HAS_SPI	arch/avr32/include/asm/arch-at32ap700x/chip-features.h	/^#define AT32AP700x_CHIP_HAS_SPI$/;"	d
AT32AP700x_CHIP_HAS_USART	arch/avr32/include/asm/arch-at32ap700x/chip-features.h	/^#define AT32AP700x_CHIP_HAS_USART$/;"	d
AT45DB021	include/dataflash.h	/^#define AT45DB021	/;"	d
AT45DB081	include/dataflash.h	/^#define AT45DB081	/;"	d
AT45DB128	include/dataflash.h	/^#define AT45DB128	/;"	d
AT45DB161	include/dataflash.h	/^#define AT45DB161	/;"	d
AT45DB321	include/dataflash.h	/^#define AT45DB321	/;"	d
AT45DB642	include/dataflash.h	/^#define AT45DB642	/;"	d
AT91C_DATAFLASH_TIMEOUT	include/dataflash.h	/^#define AT91C_DATAFLASH_TIMEOUT	/;"	d
AT91C_MAIN_CLOCK	include/configs/at91rm9200ek.h	/^#define AT91C_MAIN_CLOCK	/;"	d
AT91C_MASTER_CLOCK	include/configs/at91rm9200ek.h	/^#define AT91C_MASTER_CLOCK	/;"	d
AT91C_MATRIX_VDEC_SEL_OFF	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91C_MATRIX_VDEC_SEL_OFF	/;"	d
AT91C_MATRIX_VDEC_SEL_ON	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91C_MATRIX_VDEC_SEL_ON	/;"	d
AT91C_TIMEOUT_WRDY	drivers/mtd/at45.c	/^#define AT91C_TIMEOUT_WRDY	/;"	d	file:
AT91C_XTAL_CLOCK	include/configs/at91rm9200ek.h	/^#define AT91C_XTAL_CLOCK	/;"	d
AT91F_BlockErase	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_BlockErase($/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashContinuousRead	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashContinuousRead($/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashGetStatus	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashPagePgmBuf	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash,$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashRead	drivers/mtd/at45.c	/^int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash,$/;"	f	typeref:typename:int
AT91F_DataFlashSendCommand	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash,$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashWaitReady	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashWrite	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash,$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataFlashWriteBuffer	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer($/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_DataflashInit	drivers/mtd/dataflash.c	/^int AT91F_DataflashInit (void)$/;"	f	typeref:typename:int
AT91F_DataflashProbe	drivers/mtd/at45.c	/^int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)$/;"	f	typeref:typename:int
AT91F_DataflashSelect	drivers/mtd/dataflash.c	/^AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash,$/;"	f	typeref:typename:AT91PS_DataFlash
AT91F_DataflashSetEnv	drivers/mtd/dataflash.c	/^void AT91F_DataflashSetEnv (void)$/;"	f	typeref:typename:void
AT91F_MainMemoryToBufferTransfert	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert($/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_PageErase	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_PageErase($/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_PartialPageWrite	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash,$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91F_SpiEnable	drivers/spi/atmel_dataflash_spi.c	/^void AT91F_SpiEnable(int cs)$/;"	f	typeref:typename:void
AT91F_SpiInit	drivers/spi/atmel_dataflash_spi.c	/^void AT91F_SpiInit(void)$/;"	f	typeref:typename:void
AT91F_SpiWrite	drivers/spi/atmel_dataflash_spi.c	/^unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)$/;"	f	typeref:typename:unsigned int
AT91F_WriteBufferToMain	drivers/mtd/at45.c	/^AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash,$/;"	f	typeref:typename:AT91S_DataFlashStatus
AT91PS_DATAFLASH_INFO	include/dataflash.h	/^} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;$/;"	t	typeref:struct:_AT91S_DATAFLASH_INFO *
AT91PS_DataFlash	include/dataflash.h	/^} AT91S_DataFlash, *AT91PS_DataFlash;$/;"	t	typeref:struct:_AT91S_DataFlash *
AT91PS_DataflashDesc	include/dataflash.h	/^} AT91S_DataflashDesc, *AT91PS_DataflashDesc;$/;"	t	typeref:struct:_AT91S_DataflashDesc *
AT91PS_DataflashFeatures	include/dataflash.h	/^} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures;$/;"	t	typeref:struct:_AT91S_Dataflash *
AT91RM9200_PMC_MCKUDP	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91RM9200_PMC_MCKUDP	/;"	d
AT91RM9200_PMC_MDIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91RM9200_PMC_MDIV_1	/;"	d
AT91RM9200_PMC_MDIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91RM9200_PMC_MDIV_2	/;"	d
AT91RM9200_PMC_MDIV_3	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91RM9200_PMC_MDIV_3	/;"	d
AT91RM9200_PMC_MDIV_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91RM9200_PMC_MDIV_4	/;"	d
AT91RM9200_PMC_UDP	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91RM9200_PMC_UDP	/;"	d
AT91RM9200_PMC_UHP	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91RM9200_PMC_UHP	/;"	d
AT91SAM9260_H	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define AT91SAM9260_H$/;"	d
AT91SAM9260_MATRIX_H	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91SAM9260_MATRIX_H$/;"	d
AT91SAM9261_H	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define AT91SAM9261_H$/;"	d
AT91SAM9261_MATRIX_H	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91SAM9261_MATRIX_H$/;"	d
AT91SAM9263_H	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define AT91SAM9263_H$/;"	d
AT91SAM9263_MATRIX_H	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91SAM9263_MATRIX_H$/;"	d
AT91SAM926x_PMC_UDP	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91SAM926x_PMC_UDP	/;"	d
AT91SAM926x_PMC_UHP	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91SAM926x_PMC_UHP	/;"	d
AT91SAM9G45_H	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define AT91SAM9G45_H$/;"	d
AT91SAM9G45_MATRIX_H	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91SAM9G45_MATRIX_H$/;"	d
AT91SAM9G45_SCKCR_OSC32BYP	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define AT91SAM9G45_SCKCR_OSC32BYP /;"	d
AT91SAM9G45_SCKCR_OSC32EN	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define AT91SAM9G45_SCKCR_OSC32EN /;"	d
AT91SAM9G45_SCKCR_OSCSEL	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define AT91SAM9G45_SCKCR_OSCSEL /;"	d
AT91SAM9G45_SCKCR_OSCSEL_32	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define		AT91SAM9G45_SCKCR_OSCSEL_32	/;"	d
AT91SAM9G45_SCKCR_OSCSEL_RC	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define		AT91SAM9G45_SCKCR_OSCSEL_RC	/;"	d
AT91SAM9G45_SCKCR_RCEN	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define AT91SAM9G45_SCKCR_RCEN	/;"	d
AT91SAM9RL_H	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define AT91SAM9RL_H$/;"	d
AT91SAM9RL_MATRIX_H	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91SAM9RL_MATRIX_H$/;"	d
AT91SAM9_PMC_MDIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91SAM9_PMC_MDIV_1	/;"	d
AT91SAM9_PMC_MDIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91SAM9_PMC_MDIV_2	/;"	d
AT91SAM9_PMC_MDIV_3	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91SAM9_PMC_MDIV_3	/;"	d
AT91SAM9_PMC_MDIV_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91SAM9_PMC_MDIV_4	/;"	d
AT91SAM9_PMC_MDIV_6	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91SAM9_PMC_MDIV_6	/;"	d
AT91SAM9_SDRAMC_H	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91SAM9_SDRAMC_H$/;"	d
AT91SAM9_SMC_H	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91SAM9_SMC_H$/;"	d
AT91S_DATAFLASH_INFO	include/dataflash.h	/^} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;$/;"	t	typeref:struct:_AT91S_DATAFLASH_INFO
AT91S_DataFlash	include/dataflash.h	/^} AT91S_DataFlash, *AT91PS_DataFlash;$/;"	t	typeref:struct:_AT91S_DataFlash
AT91S_DataFlashStatus	include/dataflash.h	/^typedef unsigned int AT91S_DataFlashStatus;$/;"	t	typeref:typename:unsigned int
AT91S_DataflashDesc	include/dataflash.h	/^} AT91S_DataflashDesc, *AT91PS_DataflashDesc;$/;"	t	typeref:struct:_AT91S_DataflashDesc
AT91S_DataflashFeatures	include/dataflash.h	/^} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures;$/;"	t	typeref:struct:_AT91S_Dataflash
AT91_ASM_MC_EBI_CFG	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_ASM_MC_EBI_CFG	/;"	d
AT91_ASM_MC_EBI_CSA	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_ASM_MC_EBI_CSA	/;"	d
AT91_ASM_MC_SDRAMC_CR	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_ASM_MC_SDRAMC_CR	/;"	d
AT91_ASM_MC_SDRAMC_MR	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_ASM_MC_SDRAMC_MR	/;"	d
AT91_ASM_MC_SDRAMC_TR	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_ASM_MC_SDRAMC_TR	/;"	d
AT91_ASM_MC_SMC_CSR0	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_ASM_MC_SMC_CSR0	/;"	d
AT91_ASM_PIOC_ASR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOC_ASR	/;"	d
AT91_ASM_PIOC_BSR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOC_BSR	/;"	d
AT91_ASM_PIOC_PDR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOC_PDR	/;"	d
AT91_ASM_PIOC_PUDR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOC_PUDR	/;"	d
AT91_ASM_PIOD_ASR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOD_ASR	/;"	d
AT91_ASM_PIOD_PDR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOD_PDR	/;"	d
AT91_ASM_PIOD_PUDR	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIOD_PUDR	/;"	d
AT91_ASM_PIO_RANGE	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_ASM_PIO_RANGE	/;"	d
AT91_ASM_RSTC_MR	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_ASM_RSTC_MR	/;"	d
AT91_ASM_RSTC_SR	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_ASM_RSTC_SR	/;"	d
AT91_COMMON_H	arch/arm/mach-at91/include/mach/at91_common.h	/^#define AT91_COMMON_H$/;"	d
AT91_DBU_CID_ARCH_9XExx	arch/arm/mach-at91/include/mach/at91_dbu.h	/^#define AT91_DBU_CID_ARCH_9XExx	/;"	d
AT91_DBU_CID_ARCH_9xx	arch/arm/mach-at91/include/mach/at91_dbu.h	/^#define AT91_DBU_CID_ARCH_9xx	/;"	d
AT91_DBU_CID_ARCH_MASK	arch/arm/mach-at91/include/mach/at91_dbu.h	/^#define AT91_DBU_CID_ARCH_MASK	/;"	d
AT91_DBU_H	arch/arm/mach-at91/include/mach/at91_dbu.h	/^#define AT91_DBU_H$/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ALAP	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ALAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_ASAP	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_ASAP	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_HALF	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_HALF	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_MASK	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_MASK	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_FIFOCFG_OFFSET	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_FIFOCFG_OFFSET	/;"	d
AT91_DMA_CFG_PER_ID	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID(/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_DMA_CFG_PER_ID_MASK	include/dt-bindings/dma/at91.h	/^#define AT91_DMA_CFG_PER_ID_MASK	/;"	d
AT91_EBI_CSA_CS0A	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_EBI_CSA_CS0A	/;"	d
AT91_EBI_CSA_CS1A	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_EBI_CSA_CS1A	/;"	d
AT91_EBI_CSA_CS3A	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_EBI_CSA_CS3A	/;"	d
AT91_EBI_CSA_CS4A	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_EBI_CSA_CS4A	/;"	d
AT91_EEFC_FCR_FARG_MASK	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FARG_MASK	/;"	d
AT91_EEFC_FCR_FARG_SHIFT	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FARG_SHIFT	/;"	d
AT91_EEFC_FCR_FCMD_CGPB	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_CGPB	/;"	d
AT91_EEFC_FCR_FCMD_CLB	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_CLB	/;"	d
AT91_EEFC_FCR_FCMD_EA	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_EA	/;"	d
AT91_EEFC_FCR_FCMD_EWP	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_EWP	/;"	d
AT91_EEFC_FCR_FCMD_EWPL	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_EWPL	/;"	d
AT91_EEFC_FCR_FCMD_GETD	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_GETD	/;"	d
AT91_EEFC_FCR_FCMD_GGPB	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_GGPB	/;"	d
AT91_EEFC_FCR_FCMD_GLB	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_GLB	/;"	d
AT91_EEFC_FCR_FCMD_SGPB	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_SGPB	/;"	d
AT91_EEFC_FCR_FCMD_SLB	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_SLB	/;"	d
AT91_EEFC_FCR_FCMD_WP	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_WP	/;"	d
AT91_EEFC_FCR_FCMD_WPL	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_FCMD_WPL	/;"	d
AT91_EEFC_FCR_KEY	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FCR_KEY	/;"	d
AT91_EEFC_FMR_FRDY_BIT	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FMR_FRDY_BIT	/;"	d
AT91_EEFC_FMR_FWS_MASK	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FMR_FWS_MASK	/;"	d
AT91_EEFC_FSR_FCMDE	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FSR_FCMDE	/;"	d
AT91_EEFC_FSR_FLOCKE	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FSR_FLOCKE	/;"	d
AT91_EEFC_FSR_FRDY	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_FSR_FRDY	/;"	d
AT91_EEFC_H	arch/arm/mach-at91/include/mach/at91_eefc.h	/^#define AT91_EEFC_H$/;"	d
AT91_EMAC_CFG_BIG	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_BIG	/;"	d
AT91_EMAC_CFG_BR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_BR	/;"	d
AT91_EMAC_CFG_CAF	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_CAF	/;"	d
AT91_EMAC_CFG_CLK_MASK	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_CLK_MASK	/;"	d
AT91_EMAC_CFG_EAE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_EAE	/;"	d
AT91_EMAC_CFG_FD	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_FD	/;"	d
AT91_EMAC_CFG_MCLK_16	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_MCLK_16	/;"	d
AT91_EMAC_CFG_MCLK_32	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_MCLK_32	/;"	d
AT91_EMAC_CFG_MCLK_64	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_MCLK_64	/;"	d
AT91_EMAC_CFG_MCLK_8	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_MCLK_8	/;"	d
AT91_EMAC_CFG_MTI	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_MTI	/;"	d
AT91_EMAC_CFG_NBC	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_NBC	/;"	d
AT91_EMAC_CFG_RMII	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_RMII	/;"	d
AT91_EMAC_CFG_RTY	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_RTY	/;"	d
AT91_EMAC_CFG_SPD	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_SPD	/;"	d
AT91_EMAC_CFG_UNI	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CFG_UNI	/;"	d
AT91_EMAC_CTL_BP	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_BP	/;"	d
AT91_EMAC_CTL_CSR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_CSR	/;"	d
AT91_EMAC_CTL_ISR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_ISR	/;"	d
AT91_EMAC_CTL_LB	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_LB	/;"	d
AT91_EMAC_CTL_LBL	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_LBL	/;"	d
AT91_EMAC_CTL_MPE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_MPE	/;"	d
AT91_EMAC_CTL_RE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_RE	/;"	d
AT91_EMAC_CTL_TE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_TE	/;"	d
AT91_EMAC_CTL_WES	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_CTL_WES	/;"	d
AT91_EMAC_IxR_DONE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_DONE	/;"	d
AT91_EMAC_IxR_HRESP	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_HRESP	/;"	d
AT91_EMAC_IxR_LINK	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_LINK	/;"	d
AT91_EMAC_IxR_RBNA	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_RBNA	/;"	d
AT91_EMAC_IxR_RCOM	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_RCOM	/;"	d
AT91_EMAC_IxR_ROVR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_ROVR	/;"	d
AT91_EMAC_IxR_RTRY	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_RTRY	/;"	d
AT91_EMAC_IxR_TBRE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_TBRE	/;"	d
AT91_EMAC_IxR_TCOM	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_TCOM	/;"	d
AT91_EMAC_IxR_TIDLE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_TIDLE	/;"	d
AT91_EMAC_IxR_TOVR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_TOVR	/;"	d
AT91_EMAC_IxR_TUND	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_IxR_TUND	/;"	d
AT91_EMAC_MAN_CODE_802_3	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_CODE_802_3	/;"	d
AT91_EMAC_MAN_DATA_MASK	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_DATA_MASK	/;"	d
AT91_EMAC_MAN_HIGH	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_HIGH	/;"	d
AT91_EMAC_MAN_LOW	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_LOW	/;"	d
AT91_EMAC_MAN_PHYA	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_PHYA(/;"	d
AT91_EMAC_MAN_REGA	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_REGA(/;"	d
AT91_EMAC_MAN_RW_R	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_RW_R	/;"	d
AT91_EMAC_MAN_RW_W	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_MAN_RW_W	/;"	d
AT91_EMAC_RSR_BNA	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_RSR_BNA	/;"	d
AT91_EMAC_RSR_OVR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_RSR_OVR	/;"	d
AT91_EMAC_RSR_REC	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_RSR_REC	/;"	d
AT91_EMAC_SR_IDLE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_SR_IDLE	/;"	d
AT91_EMAC_SR_LINK	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_SR_LINK	/;"	d
AT91_EMAC_SR_MDIO	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_SR_MDIO	/;"	d
AT91_EMAC_TCR_LEN	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TCR_LEN(/;"	d
AT91_EMAC_TCR_NCRC	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TCR_NCRC	/;"	d
AT91_EMAC_TSR_BNQ	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_BNQ	/;"	d
AT91_EMAC_TSR_COL	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_COL	/;"	d
AT91_EMAC_TSR_COMP	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_COMP	/;"	d
AT91_EMAC_TSR_OVR	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_OVR	/;"	d
AT91_EMAC_TSR_RLE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_RLE	/;"	d
AT91_EMAC_TSR_TXIDLE	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_TXIDLE	/;"	d
AT91_EMAC_TSR_UND	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_EMAC_TSR_UND	/;"	d
AT91_GENERIC_CLK	drivers/clk/at91/Kconfig	/^config AT91_GENERIC_CLK$/;"	c
AT91_GPBR_H	arch/arm/mach-at91/include/mach/at91_gpbr.h	/^#define AT91_GPBR_H$/;"	d
AT91_GPBR_INDEX_BOOTCOUNT	arch/arm/mach-at91/include/mach/at91_gpbr.h	/^#define AT91_GPBR_INDEX_BOOTCOUNT /;"	d
AT91_GPBR_INDEX_TIMEOFF	arch/arm/mach-at91/include/mach/at91_gpbr.h	/^#define AT91_GPBR_INDEX_TIMEOFF /;"	d
AT91_H	arch/arm/mach-at91/include/mach/at91_emac.h	/^#define AT91_H$/;"	d
AT91_H32MX	drivers/clk/at91/Kconfig	/^config AT91_H32MX$/;"	c
AT91_MATRIX_ARBT_FIXED_PRIORITY	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ARBT_FIXED_PRIORITY	/;"	d
AT91_MATRIX_ARBT_FIXED_PRIORITY	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ARBT_FIXED_PRIORITY /;"	d
AT91_MATRIX_ARBT_FIXED_PRIORITY	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ARBT_FIXED_PRIORITY	/;"	d
AT91_MATRIX_ARBT_FIXED_PRIORITY	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ARBT_FIXED_PRIORITY	/;"	d
AT91_MATRIX_ARBT_ROUND_ROBIN	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ARBT_ROUND_ROBIN	/;"	d
AT91_MATRIX_ARBT_ROUND_ROBIN	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ARBT_ROUND_ROBIN /;"	d
AT91_MATRIX_ARBT_ROUND_ROBIN	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ARBT_ROUND_ROBIN	/;"	d
AT91_MATRIX_ARBT_ROUND_ROBIN	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ARBT_ROUND_ROBIN	/;"	d
AT91_MATRIX_CS1A_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_CS1A_SDRAMC	/;"	d
AT91_MATRIX_CS1A_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_CS1A_SDRAMC /;"	d
AT91_MATRIX_CS1A_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_CS1A_SDRAMC	/;"	d
AT91_MATRIX_CS1A_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_CS1A_SDRAMC	/;"	d
AT91_MATRIX_CS3A_SMC_SMARTMEDIA	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA	/;"	d
AT91_MATRIX_CS3A_SMC_SMARTMEDIA	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA /;"	d
AT91_MATRIX_CS3A_SMC_SMARTMEDIA	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA	/;"	d
AT91_MATRIX_CS3A_SMC_SMARTMEDIA	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA	/;"	d
AT91_MATRIX_CS4A_SMC_CF1	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_CS4A_SMC_CF1	/;"	d
AT91_MATRIX_CS4A_SMC_CF1	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_CS4A_SMC_CF1 /;"	d
AT91_MATRIX_CS4A_SMC_CF1	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_CS4A_SMC_CF1	/;"	d
AT91_MATRIX_CS4A_SMC_CF1	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_CS4A_SMC_CF1	/;"	d
AT91_MATRIX_CS5A_SMC_CF2	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_CS5A_SMC_CF2	/;"	d
AT91_MATRIX_CS5A_SMC_CF2	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_CS5A_SMC_CF2 /;"	d
AT91_MATRIX_CS5A_SMC_CF2	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_CS5A_SMC_CF2	/;"	d
AT91_MATRIX_CS5A_SMC_CF2	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_CS5A_SMC_CF2	/;"	d
AT91_MATRIX_CSA_DBPUC	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_DBPUC	/;"	d
AT91_MATRIX_CSA_EBI1_CS2A	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_EBI1_CS2A	/;"	d
AT91_MATRIX_CSA_EBI_CS1A	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_EBI_CS1A	/;"	d
AT91_MATRIX_CSA_EBI_CS3A	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_EBI_CS3A	/;"	d
AT91_MATRIX_CSA_EBI_CS4A	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_EBI_CS4A	/;"	d
AT91_MATRIX_CSA_EBI_CS5A	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_EBI_CS5A	/;"	d
AT91_MATRIX_CSA_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_VDDIOMSEL_1_8V	/;"	d
AT91_MATRIX_CSA_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_CSA_VDDIOMSEL_3_3V	/;"	d
AT91_MATRIX_DBPUC	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_DBPUC	/;"	d
AT91_MATRIX_DBPUC	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_DBPUC /;"	d
AT91_MATRIX_DBPUC	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_DBPUC	/;"	d
AT91_MATRIX_DBPUC	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_DBPUC	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_FIXED /;"	d
AT91_MATRIX_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_DEFMSTR_TYPE_FIXED	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_LAST	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_LAST /;"	d
AT91_MATRIX_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_LAST	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_DEFMSTR_TYPE_LAST	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_LAST	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_LAST	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_NONE	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_NONE /;"	d
AT91_MATRIX_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_NONE	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_DEFMSTR_TYPE_NONE	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_NONE	/;"	d
AT91_MATRIX_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_DEFMSTR_TYPE_NONE	/;"	d
AT91_MATRIX_EBI_CS1A_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS1A_SDRAMC /;"	d
AT91_MATRIX_EBI_CS1A_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_CS1A_SDRAMC /;"	d
AT91_MATRIX_EBI_CS1A_SMC	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS1A_SMC /;"	d
AT91_MATRIX_EBI_CS1A_SMC	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_CS1A_SMC /;"	d
AT91_MATRIX_EBI_CS3A_SMC	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS3A_SMC /;"	d
AT91_MATRIX_EBI_CS3A_SMC	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_CS3A_SMC /;"	d
AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA /;"	d
AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA /;"	d
AT91_MATRIX_EBI_CS4A_SMC	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS4A_SMC /;"	d
AT91_MATRIX_EBI_CS4A_SMC_CF0	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS4A_SMC_CF0 /;"	d
AT91_MATRIX_EBI_CS5A_SMC	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS5A_SMC /;"	d
AT91_MATRIX_EBI_CS5A_SMC_CF1	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_CS5A_SMC_CF1 /;"	d
AT91_MATRIX_EBI_DBPD_OFF	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_DBPD_OFF /;"	d
AT91_MATRIX_EBI_DBPD_ON	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_DBPD_ON /;"	d
AT91_MATRIX_EBI_DBPU_OFF	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_DBPU_OFF /;"	d
AT91_MATRIX_EBI_DBPU_OFF	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_DBPU_OFF /;"	d
AT91_MATRIX_EBI_DBPU_ON	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_DBPU_ON /;"	d
AT91_MATRIX_EBI_DBPU_ON	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_DBPU_ON /;"	d
AT91_MATRIX_EBI_DDR_IOSR_NORMAL	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL /;"	d
AT91_MATRIX_EBI_DDR_IOSR_REDUCED	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED /;"	d
AT91_MATRIX_EBI_EBI_IOSR_NORMAL	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL /;"	d
AT91_MATRIX_EBI_EBI_IOSR_NORMAL	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL /;"	d
AT91_MATRIX_EBI_EBI_IOSR_REDUCED	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED /;"	d
AT91_MATRIX_EBI_EBI_IOSR_REDUCED	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED /;"	d
AT91_MATRIX_EBI_IOSR_SEL	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_EBI_IOSR_SEL	/;"	d
AT91_MATRIX_EBI_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V /;"	d
AT91_MATRIX_EBI_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V /;"	d
AT91_MATRIX_EBI_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V /;"	d
AT91_MATRIX_EBI_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V /;"	d
AT91_MATRIX_FIXED_DEFMSTR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT	/;"	d
AT91_MATRIX_FIXED_DEFMSTR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT /;"	d
AT91_MATRIX_FIXED_DEFMSTR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT	/;"	d
AT91_MATRIX_FIXED_DEFMSTR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT /;"	d
AT91_MATRIX_FIXED_DEFMSTR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT	/;"	d
AT91_MATRIX_FIXED_DEFMSTR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT /;"	d
AT91_MATRIX_H	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_H$/;"	d
AT91_MATRIX_M0PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_M0PR_SHIFT	/;"	d
AT91_MATRIX_M0PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_M0PR_SHIFT /;"	d
AT91_MATRIX_M0PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_M0PR_SHIFT	/;"	d
AT91_MATRIX_M0PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M0PR_SHIFT /;"	d
AT91_MATRIX_M0PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_M0PR_SHIFT	/;"	d
AT91_MATRIX_M0PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M0PR_SHIFT /;"	d
AT91_MATRIX_M10PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M10PR_SHIFT /;"	d
AT91_MATRIX_M10PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M10PR_SHIFT /;"	d
AT91_MATRIX_M11PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M11PR_SHIFT /;"	d
AT91_MATRIX_M11PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M11PR_SHIFT /;"	d
AT91_MATRIX_M1PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_M1PR_SHIFT	/;"	d
AT91_MATRIX_M1PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_M1PR_SHIFT /;"	d
AT91_MATRIX_M1PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_M1PR_SHIFT	/;"	d
AT91_MATRIX_M1PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M1PR_SHIFT /;"	d
AT91_MATRIX_M1PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_M1PR_SHIFT	/;"	d
AT91_MATRIX_M1PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M1PR_SHIFT /;"	d
AT91_MATRIX_M2PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_M2PR_SHIFT	/;"	d
AT91_MATRIX_M2PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_M2PR_SHIFT /;"	d
AT91_MATRIX_M2PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_M2PR_SHIFT	/;"	d
AT91_MATRIX_M2PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M2PR_SHIFT /;"	d
AT91_MATRIX_M2PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_M2PR_SHIFT	/;"	d
AT91_MATRIX_M2PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M2PR_SHIFT /;"	d
AT91_MATRIX_M3PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_M3PR_SHIFT	/;"	d
AT91_MATRIX_M3PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_M3PR_SHIFT /;"	d
AT91_MATRIX_M3PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_M3PR_SHIFT	/;"	d
AT91_MATRIX_M3PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M3PR_SHIFT /;"	d
AT91_MATRIX_M3PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_M3PR_SHIFT	/;"	d
AT91_MATRIX_M3PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M3PR_SHIFT /;"	d
AT91_MATRIX_M4PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_M4PR_SHIFT	/;"	d
AT91_MATRIX_M4PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_M4PR_SHIFT /;"	d
AT91_MATRIX_M4PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_M4PR_SHIFT	/;"	d
AT91_MATRIX_M4PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M4PR_SHIFT /;"	d
AT91_MATRIX_M4PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_M4PR_SHIFT	/;"	d
AT91_MATRIX_M4PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M4PR_SHIFT /;"	d
AT91_MATRIX_M5PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_M5PR_SHIFT	/;"	d
AT91_MATRIX_M5PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_M5PR_SHIFT /;"	d
AT91_MATRIX_M5PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_M5PR_SHIFT	/;"	d
AT91_MATRIX_M5PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M5PR_SHIFT /;"	d
AT91_MATRIX_M5PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_M5PR_SHIFT	/;"	d
AT91_MATRIX_M5PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M5PR_SHIFT /;"	d
AT91_MATRIX_M6PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M6PR_SHIFT /;"	d
AT91_MATRIX_M6PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M6PR_SHIFT /;"	d
AT91_MATRIX_M7PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M7PR_SHIFT /;"	d
AT91_MATRIX_M7PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M7PR_SHIFT /;"	d
AT91_MATRIX_M8PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M8PR_SHIFT /;"	d
AT91_MATRIX_M8PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M8PR_SHIFT /;"	d
AT91_MATRIX_M9PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_M9PR_SHIFT /;"	d
AT91_MATRIX_M9PR_SHIFT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_M9PR_SHIFT /;"	d
AT91_MATRIX_MASTERS	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MASTERS	/;"	d
AT91_MATRIX_MCFG_RCB0	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MCFG_RCB0	/;"	d
AT91_MATRIX_MCFG_RCB1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MCFG_RCB1	/;"	d
AT91_MATRIX_MCFG_ULBT_128	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_128	/;"	d
AT91_MATRIX_MCFG_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_EIGHT	/;"	d
AT91_MATRIX_MCFG_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_FOUR	/;"	d
AT91_MATRIX_MCFG_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_INFINITE	/;"	d
AT91_MATRIX_MCFG_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_SINGLE	/;"	d
AT91_MATRIX_MCFG_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_SIXTEEN	/;"	d
AT91_MATRIX_MCFG_ULBT_SIXTYFOUR	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR	/;"	d
AT91_MATRIX_MCFG_ULBT_THIRTYTWO	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO	/;"	d
AT91_MATRIX_MP_OFF	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_MP_OFF /;"	d
AT91_MATRIX_MP_ON	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_MP_ON /;"	d
AT91_MATRIX_MRCR_RCB0	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB0	/;"	d
AT91_MATRIX_MRCR_RCB1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB1	/;"	d
AT91_MATRIX_MRCR_RCB10	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB10	/;"	d
AT91_MATRIX_MRCR_RCB11	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB11	/;"	d
AT91_MATRIX_MRCR_RCB2	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB2	/;"	d
AT91_MATRIX_MRCR_RCB3	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB3	/;"	d
AT91_MATRIX_MRCR_RCB4	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB4	/;"	d
AT91_MATRIX_MRCR_RCB5	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB5	/;"	d
AT91_MATRIX_MRCR_RCB6	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB6	/;"	d
AT91_MATRIX_MRCR_RCB7	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB7	/;"	d
AT91_MATRIX_MRCR_RCB8	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB8	/;"	d
AT91_MATRIX_MRCR_RCB9	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_MRCR_RCB9	/;"	d
AT91_MATRIX_NFD0_ON_D0	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_NFD0_ON_D0 /;"	d
AT91_MATRIX_NFD0_ON_D16	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_NFD0_ON_D16 /;"	d
AT91_MATRIX_PRA_M0	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M0(/;"	d
AT91_MATRIX_PRA_M1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M1(/;"	d
AT91_MATRIX_PRA_M2	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M2(/;"	d
AT91_MATRIX_PRA_M3	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M3(/;"	d
AT91_MATRIX_PRA_M4	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M4(/;"	d
AT91_MATRIX_PRA_M5	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M5(/;"	d
AT91_MATRIX_PRA_M6	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M6(/;"	d
AT91_MATRIX_PRA_M7	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRA_M7(/;"	d
AT91_MATRIX_PRB_M10	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRB_M10(/;"	d
AT91_MATRIX_PRB_M8	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRB_M8(/;"	d
AT91_MATRIX_PRB_M9	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_PRB_M9(/;"	d
AT91_MATRIX_RCB0	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_RCB0	/;"	d
AT91_MATRIX_RCB0	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_RCB0 /;"	d
AT91_MATRIX_RCB0	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_RCB0	/;"	d
AT91_MATRIX_RCB0	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB0 /;"	d
AT91_MATRIX_RCB0	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_RCB0	/;"	d
AT91_MATRIX_RCB0	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB0 /;"	d
AT91_MATRIX_RCB1	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_RCB1	/;"	d
AT91_MATRIX_RCB1	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_RCB1 /;"	d
AT91_MATRIX_RCB1	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_RCB1	/;"	d
AT91_MATRIX_RCB1	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB1 /;"	d
AT91_MATRIX_RCB1	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_RCB1	/;"	d
AT91_MATRIX_RCB1	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB1 /;"	d
AT91_MATRIX_RCB10	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB10 /;"	d
AT91_MATRIX_RCB10	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB10 /;"	d
AT91_MATRIX_RCB2	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB2 /;"	d
AT91_MATRIX_RCB2	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB2 /;"	d
AT91_MATRIX_RCB3	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB3 /;"	d
AT91_MATRIX_RCB3	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB3 /;"	d
AT91_MATRIX_RCB4	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB4 /;"	d
AT91_MATRIX_RCB4	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB4 /;"	d
AT91_MATRIX_RCB5	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB5 /;"	d
AT91_MATRIX_RCB5	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB5 /;"	d
AT91_MATRIX_RCB6	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB6 /;"	d
AT91_MATRIX_RCB6	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB6 /;"	d
AT91_MATRIX_RCB7	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB7 /;"	d
AT91_MATRIX_RCB7	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB7 /;"	d
AT91_MATRIX_RCB8	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB8 /;"	d
AT91_MATRIX_RCB8	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB8 /;"	d
AT91_MATRIX_RCB9	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define AT91_MATRIX_RCB9 /;"	d
AT91_MATRIX_RCB9	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_RCB9 /;"	d
AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY	/;"	d
AT91_MATRIX_SCFG_ARBT_ROUND_ROBIN	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_SCFG_ARBT_ROUND_ROBIN	/;"	d
AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED	/;"	d
AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST	/;"	d
AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE	/;"	d
AT91_MATRIX_SCFG_FIXED_DEFMSTR	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_SCFG_FIXED_DEFMSTR(/;"	d
AT91_MATRIX_SCFG_SLOT_CYCLE	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_SCFG_SLOT_CYCLE(/;"	d
AT91_MATRIX_SLAVES	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define AT91_MATRIX_SLAVES	/;"	d
AT91_MATRIX_SLOT_CYCLE	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_SLOT_CYCLE	/;"	d
AT91_MATRIX_SLOT_CYCLE_	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_SLOT_CYCLE_(/;"	d
AT91_MATRIX_TCMR_DTCM_0	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_DTCM_0	/;"	d
AT91_MATRIX_TCMR_DTCM_16	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_DTCM_16	/;"	d
AT91_MATRIX_TCMR_DTCM_32	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_DTCM_32	/;"	d
AT91_MATRIX_TCMR_DTCM_64	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_DTCM_64	/;"	d
AT91_MATRIX_TCMR_ITCM_0	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_ITCM_0	/;"	d
AT91_MATRIX_TCMR_ITCM_16	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_ITCM_16	/;"	d
AT91_MATRIX_TCMR_ITCM_32	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_ITCM_32	/;"	d
AT91_MATRIX_TCMR_ITCM_64	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_ITCM_64	/;"	d
AT91_MATRIX_TCMR_TCM_NO_WS	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_TCM_NO_WS	/;"	d
AT91_MATRIX_TCMR_TCM_ONE_WS	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_TCMR_TCM_ONE_WS	/;"	d
AT91_MATRIX_ULBT_128	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_128	/;"	d
AT91_MATRIX_ULBT_128	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_128	/;"	d
AT91_MATRIX_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ULBT_EIGHT	/;"	d
AT91_MATRIX_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ULBT_EIGHT /;"	d
AT91_MATRIX_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ULBT_EIGHT	/;"	d
AT91_MATRIX_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_EIGHT	/;"	d
AT91_MATRIX_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ULBT_EIGHT	/;"	d
AT91_MATRIX_ULBT_EIGHT	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_EIGHT	/;"	d
AT91_MATRIX_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ULBT_FOUR	/;"	d
AT91_MATRIX_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ULBT_FOUR /;"	d
AT91_MATRIX_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ULBT_FOUR	/;"	d
AT91_MATRIX_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_FOUR	/;"	d
AT91_MATRIX_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ULBT_FOUR	/;"	d
AT91_MATRIX_ULBT_FOUR	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_FOUR	/;"	d
AT91_MATRIX_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ULBT_INFINITE	/;"	d
AT91_MATRIX_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ULBT_INFINITE /;"	d
AT91_MATRIX_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ULBT_INFINITE	/;"	d
AT91_MATRIX_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_INFINITE	/;"	d
AT91_MATRIX_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ULBT_INFINITE	/;"	d
AT91_MATRIX_ULBT_INFINITE	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_INFINITE	/;"	d
AT91_MATRIX_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ULBT_SINGLE	/;"	d
AT91_MATRIX_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ULBT_SINGLE /;"	d
AT91_MATRIX_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ULBT_SINGLE	/;"	d
AT91_MATRIX_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_SINGLE	/;"	d
AT91_MATRIX_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ULBT_SINGLE	/;"	d
AT91_MATRIX_ULBT_SINGLE	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_SINGLE	/;"	d
AT91_MATRIX_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_ULBT_SIXTEEN	/;"	d
AT91_MATRIX_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_ULBT_SIXTEEN /;"	d
AT91_MATRIX_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_ULBT_SIXTEEN	/;"	d
AT91_MATRIX_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_SIXTEEN	/;"	d
AT91_MATRIX_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_ULBT_SIXTEEN	/;"	d
AT91_MATRIX_ULBT_SIXTEEN	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_SIXTEEN	/;"	d
AT91_MATRIX_ULBT_SIXTYFOUR	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_SIXTYFOUR	/;"	d
AT91_MATRIX_ULBT_SIXTYFOUR	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_SIXTYFOUR	/;"	d
AT91_MATRIX_ULBT_THIRTYTWO	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^#define	AT91_MATRIX_ULBT_THIRTYTWO	/;"	d
AT91_MATRIX_ULBT_THIRTYTWO	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define AT91_MATRIX_ULBT_THIRTYTWO	/;"	d
AT91_MATRIX_USBPUCR_PUON	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_USBPUCR_PUON	/;"	d
AT91_MATRIX_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_1_8V	/;"	d
AT91_MATRIX_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_1_8V /;"	d
AT91_MATRIX_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_1_8V	/;"	d
AT91_MATRIX_VDDIOMSEL_1_8V	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_1_8V	/;"	d
AT91_MATRIX_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_3_3V	/;"	d
AT91_MATRIX_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_3_3V /;"	d
AT91_MATRIX_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_3_3V	/;"	d
AT91_MATRIX_VDDIOMSEL_3_3V	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^#define AT91_MATRIX_VDDIOMSEL_3_3V	/;"	d
AT91_MATRIX_WPMR_WPKEY	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_WPMR_WPKEY	/;"	d
AT91_MATRIX_WPMR_WP_WPDIS	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_WPMR_WP_WPDIS	/;"	d
AT91_MATRIX_WPMR_WP_WPEN	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_WPMR_WP_WPEN	/;"	d
AT91_MATRIX_WPSR_NO_WPV	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_WPSR_NO_WPV	/;"	d
AT91_MATRIX_WPSR_WPV	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_WPSR_WPV	/;"	d
AT91_MATRIX_WPSR_WPVSRC	arch/arm/mach-at91/include/mach/at91_matrix.h	/^#define	AT91_MATRIX_WPSR_WPVSRC	/;"	d
AT91_MC_H	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_MC_H$/;"	d
AT91_PDC_H	arch/arm/mach-at91/include/mach/at91_pdc.h	/^#define AT91_PDC_H$/;"	d
AT91_PERIPH_A	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_A	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_A	/;"	d
AT91_PERIPH_B	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_B	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_B	/;"	d
AT91_PERIPH_C	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_C	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_C	/;"	d
AT91_PERIPH_D	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_D	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_D	/;"	d
AT91_PERIPH_GPIO	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PERIPH_GPIO	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PERIPH_GPIO	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE	/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEBOUNCE_VAL	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEBOUNCE_VAL(/;"	d
AT91_PINCTRL_DEGLITCH	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DEGLITCH	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DEGLITCH	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DIS_SCHMIT	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DIS_SCHMIT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_HI	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_HI	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_LOW	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_LOW	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_DRIVE_STRENGTH_MED	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_DRIVE_STRENGTH_MED	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_MULTI_DRIVE	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_MULTI_DRIVE	/;"	d
AT91_PINCTRL_NONE	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_NONE	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_NONE	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_DOWN	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_DOWN	/;"	d
AT91_PINCTRL_PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PINCTRL_PULL_UP_DEGLITCH	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PINCTRL_PULL_UP_DEGLITCH	/;"	d
AT91_PIN_PA0	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA0	/;"	d
AT91_PIN_PA1	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA1	/;"	d
AT91_PIN_PA10	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA10	/;"	d
AT91_PIN_PA11	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA11	/;"	d
AT91_PIN_PA12	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA12	/;"	d
AT91_PIN_PA13	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA13	/;"	d
AT91_PIN_PA14	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA14	/;"	d
AT91_PIN_PA15	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA15	/;"	d
AT91_PIN_PA16	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA16	/;"	d
AT91_PIN_PA17	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA17	/;"	d
AT91_PIN_PA18	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA18	/;"	d
AT91_PIN_PA19	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA19	/;"	d
AT91_PIN_PA2	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA2	/;"	d
AT91_PIN_PA20	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA20	/;"	d
AT91_PIN_PA21	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA21	/;"	d
AT91_PIN_PA22	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA22	/;"	d
AT91_PIN_PA23	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA23	/;"	d
AT91_PIN_PA24	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA24	/;"	d
AT91_PIN_PA25	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA25	/;"	d
AT91_PIN_PA26	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA26	/;"	d
AT91_PIN_PA27	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA27	/;"	d
AT91_PIN_PA28	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA28	/;"	d
AT91_PIN_PA29	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA29	/;"	d
AT91_PIN_PA3	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA3	/;"	d
AT91_PIN_PA30	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA30	/;"	d
AT91_PIN_PA31	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA31	/;"	d
AT91_PIN_PA4	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA4	/;"	d
AT91_PIN_PA5	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA5	/;"	d
AT91_PIN_PA6	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA6	/;"	d
AT91_PIN_PA7	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA7	/;"	d
AT91_PIN_PA8	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA8	/;"	d
AT91_PIN_PA9	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PA9	/;"	d
AT91_PIN_PB0	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB0	/;"	d
AT91_PIN_PB1	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB1	/;"	d
AT91_PIN_PB10	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB10	/;"	d
AT91_PIN_PB11	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB11	/;"	d
AT91_PIN_PB12	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB12	/;"	d
AT91_PIN_PB13	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB13	/;"	d
AT91_PIN_PB14	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB14	/;"	d
AT91_PIN_PB15	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB15	/;"	d
AT91_PIN_PB16	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB16	/;"	d
AT91_PIN_PB17	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB17	/;"	d
AT91_PIN_PB18	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB18	/;"	d
AT91_PIN_PB19	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB19	/;"	d
AT91_PIN_PB2	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB2	/;"	d
AT91_PIN_PB20	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB20	/;"	d
AT91_PIN_PB21	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB21	/;"	d
AT91_PIN_PB22	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB22	/;"	d
AT91_PIN_PB23	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB23	/;"	d
AT91_PIN_PB24	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB24	/;"	d
AT91_PIN_PB25	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB25	/;"	d
AT91_PIN_PB26	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB26	/;"	d
AT91_PIN_PB27	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB27	/;"	d
AT91_PIN_PB28	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB28	/;"	d
AT91_PIN_PB29	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB29	/;"	d
AT91_PIN_PB3	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB3	/;"	d
AT91_PIN_PB30	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB30	/;"	d
AT91_PIN_PB31	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB31	/;"	d
AT91_PIN_PB4	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB4	/;"	d
AT91_PIN_PB5	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB5	/;"	d
AT91_PIN_PB6	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB6	/;"	d
AT91_PIN_PB7	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB7	/;"	d
AT91_PIN_PB8	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB8	/;"	d
AT91_PIN_PB9	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PB9	/;"	d
AT91_PIN_PC0	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC0	/;"	d
AT91_PIN_PC1	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC1	/;"	d
AT91_PIN_PC10	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC10	/;"	d
AT91_PIN_PC11	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC11	/;"	d
AT91_PIN_PC12	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC12	/;"	d
AT91_PIN_PC13	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC13	/;"	d
AT91_PIN_PC14	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC14	/;"	d
AT91_PIN_PC15	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC15	/;"	d
AT91_PIN_PC16	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC16	/;"	d
AT91_PIN_PC17	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC17	/;"	d
AT91_PIN_PC18	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC18	/;"	d
AT91_PIN_PC19	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC19	/;"	d
AT91_PIN_PC2	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC2	/;"	d
AT91_PIN_PC20	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC20	/;"	d
AT91_PIN_PC21	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC21	/;"	d
AT91_PIN_PC22	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC22	/;"	d
AT91_PIN_PC23	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC23	/;"	d
AT91_PIN_PC24	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC24	/;"	d
AT91_PIN_PC25	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC25	/;"	d
AT91_PIN_PC26	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC26	/;"	d
AT91_PIN_PC27	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC27	/;"	d
AT91_PIN_PC28	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC28	/;"	d
AT91_PIN_PC29	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC29	/;"	d
AT91_PIN_PC3	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC3	/;"	d
AT91_PIN_PC30	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC30	/;"	d
AT91_PIN_PC31	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC31	/;"	d
AT91_PIN_PC4	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC4	/;"	d
AT91_PIN_PC5	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC5	/;"	d
AT91_PIN_PC6	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC6	/;"	d
AT91_PIN_PC7	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC7	/;"	d
AT91_PIN_PC8	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC8	/;"	d
AT91_PIN_PC9	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PC9	/;"	d
AT91_PIN_PD0	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD0	/;"	d
AT91_PIN_PD1	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD1	/;"	d
AT91_PIN_PD10	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD10	/;"	d
AT91_PIN_PD11	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD11	/;"	d
AT91_PIN_PD12	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD12	/;"	d
AT91_PIN_PD13	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD13	/;"	d
AT91_PIN_PD14	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD14	/;"	d
AT91_PIN_PD15	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD15	/;"	d
AT91_PIN_PD16	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD16	/;"	d
AT91_PIN_PD17	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD17	/;"	d
AT91_PIN_PD18	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD18	/;"	d
AT91_PIN_PD19	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD19	/;"	d
AT91_PIN_PD2	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD2	/;"	d
AT91_PIN_PD20	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD20	/;"	d
AT91_PIN_PD21	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD21	/;"	d
AT91_PIN_PD22	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD22	/;"	d
AT91_PIN_PD23	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD23	/;"	d
AT91_PIN_PD24	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD24	/;"	d
AT91_PIN_PD25	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD25	/;"	d
AT91_PIN_PD26	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD26	/;"	d
AT91_PIN_PD27	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD27	/;"	d
AT91_PIN_PD28	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD28	/;"	d
AT91_PIN_PD29	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD29	/;"	d
AT91_PIN_PD3	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD3	/;"	d
AT91_PIN_PD30	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD30	/;"	d
AT91_PIN_PD31	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD31	/;"	d
AT91_PIN_PD4	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD4	/;"	d
AT91_PIN_PD5	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD5	/;"	d
AT91_PIN_PD6	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD6	/;"	d
AT91_PIN_PD7	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD7	/;"	d
AT91_PIN_PD8	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD8	/;"	d
AT91_PIN_PD9	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PD9	/;"	d
AT91_PIN_PE0	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE0	/;"	d
AT91_PIN_PE1	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE1	/;"	d
AT91_PIN_PE10	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE10	/;"	d
AT91_PIN_PE11	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE11	/;"	d
AT91_PIN_PE12	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE12	/;"	d
AT91_PIN_PE13	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE13	/;"	d
AT91_PIN_PE14	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE14	/;"	d
AT91_PIN_PE15	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE15	/;"	d
AT91_PIN_PE16	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE16	/;"	d
AT91_PIN_PE17	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE17	/;"	d
AT91_PIN_PE18	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE18	/;"	d
AT91_PIN_PE19	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE19	/;"	d
AT91_PIN_PE2	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE2	/;"	d
AT91_PIN_PE20	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE20	/;"	d
AT91_PIN_PE21	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE21	/;"	d
AT91_PIN_PE22	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE22	/;"	d
AT91_PIN_PE23	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE23	/;"	d
AT91_PIN_PE24	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE24	/;"	d
AT91_PIN_PE25	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE25	/;"	d
AT91_PIN_PE26	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE26	/;"	d
AT91_PIN_PE27	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE27	/;"	d
AT91_PIN_PE28	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE28	/;"	d
AT91_PIN_PE29	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE29	/;"	d
AT91_PIN_PE3	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE3	/;"	d
AT91_PIN_PE30	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE30	/;"	d
AT91_PIN_PE31	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE31	/;"	d
AT91_PIN_PE4	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE4	/;"	d
AT91_PIN_PE5	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE5	/;"	d
AT91_PIN_PE6	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE6	/;"	d
AT91_PIN_PE7	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE7	/;"	d
AT91_PIN_PE8	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE8	/;"	d
AT91_PIN_PE9	arch/arm/mach-at91/include/mach/gpio.h	/^#define	AT91_PIN_PE9	/;"	d
AT91_PIOA	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOA	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOA	/;"	d
AT91_PIOB	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOB	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOB	/;"	d
AT91_PIOC	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOC	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOC	/;"	d
AT91_PIOD	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOD	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOD	/;"	d
AT91_PIOE	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIOE	include/dt-bindings/pinctrl/at91.h	/^#define AT91_PIOE	/;"	d
AT91_PIO_BASE	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define AT91_PIO_BASE	/;"	d
AT91_PIO_H	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define AT91_PIO_H$/;"	d
AT91_PIO_PORTA	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define	AT91_PIO_PORTA	/;"	d
AT91_PIO_PORTA	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define AT91_PIO_PORTA	/;"	d
AT91_PIO_PORTB	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define	AT91_PIO_PORTB	/;"	d
AT91_PIO_PORTB	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define AT91_PIO_PORTB	/;"	d
AT91_PIO_PORTC	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define	AT91_PIO_PORTC	/;"	d
AT91_PIO_PORTC	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define AT91_PIO_PORTC	/;"	d
AT91_PIO_PORTD	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define	AT91_PIO_PORTD	/;"	d
AT91_PIO_PORTD	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define AT91_PIO_PORTD	/;"	d
AT91_PIO_PORTE	arch/arm/mach-at91/include/mach/at91_pio.h	/^#define	AT91_PIO_PORTE	/;"	d
AT91_PIT_H	arch/arm/mach-at91/include/mach/at91_pit.h	/^#define AT91_PIT_H$/;"	d
AT91_PIT_MR_EN	arch/arm/mach-at91/include/mach/at91_pit.h	/^#define		AT91_PIT_MR_EN	/;"	d
AT91_PIT_MR_IEN	arch/arm/mach-at91/include/mach/at91_pit.h	/^#define		AT91_PIT_MR_IEN	/;"	d
AT91_PIT_MR_PIV	arch/arm/mach-at91/include/mach/at91_pit.h	/^#define		AT91_PIT_MR_PIV(/;"	d
AT91_PIT_MR_PIV_MASK	arch/arm/mach-at91/include/mach/at91_pit.h	/^#define		AT91_PIT_MR_PIV_MASK(/;"	d
AT91_PLL_LOCK_TIMEOUT	arch/arm/mach-at91/arm926ejs/clock.c	/^#define AT91_PLL_LOCK_TIMEOUT	/;"	d	file:
AT91_PLL_LOCK_TIMEOUT	include/configs/corvus.h	/^#define AT91_PLL_LOCK_TIMEOUT	/;"	d
AT91_PLL_LOCK_TIMEOUT	include/configs/smartweb.h	/^#define AT91_PLL_LOCK_TIMEOUT	/;"	d
AT91_PLL_LOCK_TIMEOUT	include/configs/taurus.h	/^#define AT91_PLL_LOCK_TIMEOUT	/;"	d
AT91_PMC_BIASCOUNT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_BIASCOUNT	/;"	d
AT91_PMC_BIASEN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_BIASEN	/;"	d
AT91_PMC_CFDEV	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CFDEV	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_CFDEV	/;"	d
AT91_PMC_CSS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_CSS	/;"	d
AT91_PMC_CSS_MAIN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_CSS_MAIN	/;"	d
AT91_PMC_CSS_PLLA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_CSS_PLLA	/;"	d
AT91_PMC_CSS_PLLB	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_CSS_PLLB	/;"	d
AT91_PMC_CSS_SLOW	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_CSS_SLOW	/;"	d
AT91_PMC_DDR	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_DDR	/;"	d
AT91_PMC_DIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_DIV	/;"	d
AT91_PMC_GCKRDY	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_GCKRDY	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_GCKRDY	/;"	d
AT91_PMC_H	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_H$/;"	d
AT91_PMC_HCK0	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_HCK0	/;"	d
AT91_PMC_HCK1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_HCK1	/;"	d
AT91_PMC_ICP_PLLA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_ICP_PLLA(/;"	d
AT91_PMC_ICP_PLLU	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_ICP_PLLU(/;"	d
AT91_PMC_IPLL_PLLA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IPLL_PLLA(/;"	d
AT91_PMC_IVCO_PLLU	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IVCO_PLLU(/;"	d
AT91_PMC_IXR_LOCKA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_LOCKA	/;"	d
AT91_PMC_IXR_LOCKB	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_LOCKB	/;"	d
AT91_PMC_IXR_LOCKU	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_LOCKU	/;"	d
AT91_PMC_IXR_MCKRDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_MCKRDY	/;"	d
AT91_PMC_IXR_MOSCS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_MOSCS	/;"	d
AT91_PMC_IXR_MOSCSELS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_MOSCSELS	/;"	d
AT91_PMC_IXR_PCKRDY0	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_PCKRDY0	/;"	d
AT91_PMC_IXR_PCKRDY1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_PCKRDY1	/;"	d
AT91_PMC_IXR_PCKRDY2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_PCKRDY2	/;"	d
AT91_PMC_IXR_PCKRDY3	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_IXR_PCKRDY3	/;"	d
AT91_PMC_LOCKA	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKA	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKA	/;"	d
AT91_PMC_LOCKB	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKB	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKB	/;"	d
AT91_PMC_LOCKU	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_LOCKU	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_LOCKU	/;"	d
AT91_PMC_MAINF	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MAINF	/;"	d
AT91_PMC_MAINRDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MAINRDY	/;"	d
AT91_PMC_MCFR_MAINF_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCFR_MAINF_MASK	/;"	d
AT91_PMC_MCFR_MAINRDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCFR_MAINRDY	/;"	d
AT91_PMC_MCKRDY	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKRDY	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MCKRDY	/;"	d
AT91_PMC_MCKR_CSS_MAIN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_CSS_MAIN	/;"	d
AT91_PMC_MCKR_CSS_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_CSS_MASK	/;"	d
AT91_PMC_MCKR_CSS_PLLA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_CSS_PLLA	/;"	d
AT91_PMC_MCKR_CSS_PLLB	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_CSS_PLLB	/;"	d
AT91_PMC_MCKR_CSS_SLOW	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_CSS_SLOW	/;"	d
AT91_PMC_MCKR_H32MXDIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_H32MXDIV	/;"	d
AT91_PMC_MCKR_MDIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_MDIV_1	/;"	d
AT91_PMC_MCKR_MDIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_MDIV_2	/;"	d
AT91_PMC_MCKR_MDIV_3	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_MDIV_3	/;"	d
AT91_PMC_MCKR_MDIV_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_MDIV_4	/;"	d
AT91_PMC_MCKR_MDIV_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_MDIV_MASK	/;"	d
AT91_PMC_MCKR_PLLADIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PLLADIV_1	/;"	d
AT91_PMC_MCKR_PLLADIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PLLADIV_2	/;"	d
AT91_PMC_MCKR_PLLADIV_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PLLADIV_MASK	/;"	d
AT91_PMC_MCKR_PRES_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_1	/;"	d
AT91_PMC_MCKR_PRES_16	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_16	/;"	d
AT91_PMC_MCKR_PRES_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_2	/;"	d
AT91_PMC_MCKR_PRES_32	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_32	/;"	d
AT91_PMC_MCKR_PRES_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_4	/;"	d
AT91_PMC_MCKR_PRES_64	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_64	/;"	d
AT91_PMC_MCKR_PRES_8	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_8	/;"	d
AT91_PMC_MCKR_PRES_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MCKR_PRES_MASK	/;"	d
AT91_PMC_MDIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MDIV	/;"	d
AT91_PMC_MOR_KEY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MOR_KEY(/;"	d
AT91_PMC_MOR_MOSCEN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MOR_MOSCEN	/;"	d
AT91_PMC_MOR_MOSCRCEN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MOR_MOSCRCEN	/;"	d
AT91_PMC_MOR_MOSCSEL	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MOR_MOSCSEL	/;"	d
AT91_PMC_MOR_OSCBYPASS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MOR_OSCBYPASS	/;"	d
AT91_PMC_MOR_OSCOUNT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_MOR_OSCOUNT(/;"	d
AT91_PMC_MOSCEN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MOSCEN	/;"	d
AT91_PMC_MOSCRCS	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCRCS	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCRCS	/;"	d
AT91_PMC_MOSCS	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCS	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCS	/;"	d
AT91_PMC_MOSCSELS	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MOSCSELS	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_MOSCSELS	/;"	d
AT91_PMC_MUL	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_MUL	/;"	d
AT91_PMC_OSCBYPASS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_OSCBYPASS	/;"	d
AT91_PMC_OSCOUNT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_OSCOUNT	/;"	d
AT91_PMC_OUT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_OUT	/;"	d
AT91_PMC_PCK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK	/;"	d
AT91_PMC_PCK0	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK0	/;"	d
AT91_PMC_PCK0RDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK0RDY	/;"	d
AT91_PMC_PCK1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK1	/;"	d
AT91_PMC_PCK1RDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK1RDY	/;"	d
AT91_PMC_PCK2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK2	/;"	d
AT91_PMC_PCK2RDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK2RDY	/;"	d
AT91_PMC_PCK3	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK3	/;"	d
AT91_PMC_PCK3RDY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCK3RDY	/;"	d
AT91_PMC_PCKRDY	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCKRDY	include/dt-bindings/clock/at91.h	/^#define AT91_PMC_PCKRDY(/;"	d
AT91_PMC_PCR_CMD_WRITE	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_CMD_WRITE	/;"	d
AT91_PMC_PCR_DIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_DIV	/;"	d
AT91_PMC_PCR_EN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_EN	/;"	d
AT91_PMC_PCR_GCKCSS	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKCSS	/;"	d
AT91_PMC_PCR_GCKCSS_	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKCSS_(/;"	d
AT91_PMC_PCR_GCKCSS_AUDIO_CLK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCR_GCKCSS_AUDIO_CLK	/;"	d
AT91_PMC_PCR_GCKCSS_MAIN_CLK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCR_GCKCSS_MAIN_CLK	/;"	d
AT91_PMC_PCR_GCKCSS_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKCSS_MASK	/;"	d
AT91_PMC_PCR_GCKCSS_MCK_CLK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCR_GCKCSS_MCK_CLK	/;"	d
AT91_PMC_PCR_GCKCSS_OFFSET	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKCSS_OFFSET	/;"	d
AT91_PMC_PCR_GCKCSS_PLLA_CLK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCR_GCKCSS_PLLA_CLK	/;"	d
AT91_PMC_PCR_GCKCSS_SLOW_CLK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCR_GCKCSS_SLOW_CLK	/;"	d
AT91_PMC_PCR_GCKCSS_UPLL_CLK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PCR_GCKCSS_UPLL_CLK	/;"	d
AT91_PMC_PCR_GCKDIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKDIV	/;"	d
AT91_PMC_PCR_GCKDIV_	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKDIV_(/;"	d
AT91_PMC_PCR_GCKDIV_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKDIV_MASK	/;"	d
AT91_PMC_PCR_GCKDIV_OFFSET	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKDIV_OFFSET	/;"	d
AT91_PMC_PCR_GCKEN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_GCKEN	/;"	d
AT91_PMC_PCR_PID_MASK	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PCR_PID_MASK	/;"	d
AT91_PMC_PDIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PDIV	/;"	d
AT91_PMC_PDIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PDIV_1	/;"	d
AT91_PMC_PDIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PDIV_2	/;"	d
AT91_PMC_PLLAR_29	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLAR_29	/;"	d
AT91_PMC_PLLA_WR_ERRATA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PLLA_WR_ERRATA	/;"	d
AT91_PMC_PLLBR_USBDIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLBR_USBDIV_1	/;"	d
AT91_PMC_PLLBR_USBDIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLBR_USBDIV_2	/;"	d
AT91_PMC_PLLBR_USBDIV_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLBR_USBDIV_4	/;"	d
AT91_PMC_PLLCOUNT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PLLCOUNT	/;"	d
AT91_PMC_PLLXR_DIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLXR_DIV(/;"	d
AT91_PMC_PLLXR_MUL	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLXR_MUL(/;"	d
AT91_PMC_PLLXR_OUT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLXR_OUT(/;"	d
AT91_PMC_PLLXR_PLLCOUNT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define AT91_PMC_PLLXR_PLLCOUNT(/;"	d
AT91_PMC_PRES	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PRES	/;"	d
AT91_PMC_PRES_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_1	/;"	d
AT91_PMC_PRES_16	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_16	/;"	d
AT91_PMC_PRES_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_2	/;"	d
AT91_PMC_PRES_32	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_32	/;"	d
AT91_PMC_PRES_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_4	/;"	d
AT91_PMC_PRES_64	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_64	/;"	d
AT91_PMC_PRES_8	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_PRES_8	/;"	d
AT91_PMC_PROTKEY	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_PROTKEY	/;"	d
AT91_PMC_UPLLCOUNT	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_UPLLCOUNT	/;"	d
AT91_PMC_UPLLEN	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_UPLLEN	/;"	d
AT91_PMC_USB96M	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USB96M	/;"	d
AT91_PMC_USBDIV	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USBDIV	/;"	d
AT91_PMC_USBDIV_1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_USBDIV_1	/;"	d
AT91_PMC_USBDIV_10	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USBDIV_10	/;"	d
AT91_PMC_USBDIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_USBDIV_2	/;"	d
AT91_PMC_USBDIV_4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define			AT91_PMC_USBDIV_4	/;"	d
AT91_PMC_USBDIV_8	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USBDIV_8	/;"	d
AT91_PMC_USBS_USB_PLLA	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USBS_USB_PLLA	/;"	d
AT91_PMC_USBS_USB_PLLB	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USBS_USB_PLLB	/;"	d
AT91_PMC_USBS_USB_UPLL	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USBS_USB_UPLL	/;"	d
AT91_PMC_USB_DIV_2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^#define		AT91_PMC_USB_DIV_2	/;"	d
AT91_RSTC_CR_EXTRST	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_CR_EXTRST	/;"	d
AT91_RSTC_CR_PERRST	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_CR_PERRST	/;"	d
AT91_RSTC_CR_PROCRST	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_CR_PROCRST	/;"	d
AT91_RSTC_H	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_H$/;"	d
AT91_RSTC_KEY	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_KEY	/;"	d
AT91_RSTC_MR_ERSTL	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_MR_ERSTL(/;"	d
AT91_RSTC_MR_ERSTL_MASK	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_MR_ERSTL_MASK	/;"	d
AT91_RSTC_MR_URSTEN	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_MR_URSTEN	/;"	d
AT91_RSTC_MR_URSTIEN	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_MR_URSTIEN	/;"	d
AT91_RSTC_RSTTYP	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_RSTTYP	/;"	d
AT91_RSTC_RSTTYP_GENERAL	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_RSTTYP_GENERAL	/;"	d
AT91_RSTC_RSTTYP_SOFTWARE	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_RSTTYP_SOFTWARE	/;"	d
AT91_RSTC_RSTTYP_USER	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_RSTTYP_USER	/;"	d
AT91_RSTC_RSTTYP_WAKEUP	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_RSTTYP_WAKEUP	/;"	d
AT91_RSTC_RSTTYP_WATCHDOG	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_RSTTYP_WATCHDOG	/;"	d
AT91_RSTC_SR_NRSTL	arch/arm/mach-at91/include/mach/at91_rstc.h	/^#define AT91_RSTC_SR_NRSTL	/;"	d
AT91_RTC_ACKUPD	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_ACKUPD	/;"	d
AT91_RTC_ALARM	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_ALARM	/;"	d
AT91_RTC_AMPM	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_AMPM	/;"	d
AT91_RTC_CALALR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALALR	/;"	d
AT91_RTC_CALEV	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALEV	/;"	d
AT91_RTC_CALEVSEL	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALEVSEL	/;"	d
AT91_RTC_CALEVSEL_MONTH	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALEVSEL_MONTH	/;"	d
AT91_RTC_CALEVSEL_WEEK	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALEVSEL_WEEK	/;"	d
AT91_RTC_CALEVSEL_YEAR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALEVSEL_YEAR	/;"	d
AT91_RTC_CALR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CALR	/;"	d
AT91_RTC_CENT	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CENT	/;"	d
AT91_RTC_CR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_CR	/;"	d
AT91_RTC_DATE	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_DATE	/;"	d
AT91_RTC_DATEEN	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_DATEEN	/;"	d
AT91_RTC_DAY	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_DAY	/;"	d
AT91_RTC_H	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_H$/;"	d
AT91_RTC_HOUR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_HOUR	/;"	d
AT91_RTC_HOUREN	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_HOUREN	/;"	d
AT91_RTC_HRMOD	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_HRMOD	/;"	d
AT91_RTC_IDR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_IDR	/;"	d
AT91_RTC_IER	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_IER	/;"	d
AT91_RTC_IMR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_IMR	/;"	d
AT91_RTC_MIN	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_MIN	/;"	d
AT91_RTC_MINEN	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_MINEN	/;"	d
AT91_RTC_MONTH	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_MONTH	/;"	d
AT91_RTC_MR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_MR	/;"	d
AT91_RTC_MTHEN	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_MTHEN	/;"	d
AT91_RTC_NVCAL	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_NVCAL	/;"	d
AT91_RTC_NVCALALR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_NVCALALR	/;"	d
AT91_RTC_NVTIM	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_NVTIM	/;"	d
AT91_RTC_NVTIMALR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_NVTIMALR	/;"	d
AT91_RTC_SCCR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_SCCR	/;"	d
AT91_RTC_SEC	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_SEC	/;"	d
AT91_RTC_SECEN	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_SECEN	/;"	d
AT91_RTC_SECEV	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_SECEV	/;"	d
AT91_RTC_SR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_SR	/;"	d
AT91_RTC_TIMALR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMALR	/;"	d
AT91_RTC_TIMEV	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMEV	/;"	d
AT91_RTC_TIMEVSEL	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMEVSEL	/;"	d
AT91_RTC_TIMEVSEL_DAY12	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMEVSEL_DAY12	/;"	d
AT91_RTC_TIMEVSEL_DAY24	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMEVSEL_DAY24	/;"	d
AT91_RTC_TIMEVSEL_HOUR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMEVSEL_HOUR	/;"	d
AT91_RTC_TIMEVSEL_MINUTE	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMEVSEL_MINUTE /;"	d
AT91_RTC_TIMR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_TIMR	/;"	d
AT91_RTC_UPDCAL	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_UPDCAL	/;"	d
AT91_RTC_UPDTIM	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_UPDTIM	/;"	d
AT91_RTC_VER	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_VER	/;"	d
AT91_RTC_YEAR	arch/arm/mach-at91/include/mach/at91_rtc.h	/^#define AT91_RTC_YEAR	/;"	d
AT91_RTT_H	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_H$/;"	d
AT91_RTT_MR_ALMIEN	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_MR_ALMIEN	/;"	d
AT91_RTT_MR_RTPRES	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_MR_RTPRES	/;"	d
AT91_RTT_RTTINCIEN	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_RTTINCIEN	/;"	d
AT91_RTT_RTTRST	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_RTTRST	/;"	d
AT91_RTT_SR_ALMS	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_SR_ALMS	/;"	d
AT91_RTT_SR_RTTINC	arch/arm/mach-at91/include/mach/at91_rtt.h	/^#define AT91_RTT_SR_RTTINC	/;"	d
AT91_SCK_H	arch/arm/mach-at91/include/mach/at91_sck.h	/^#define AT91_SCK_H$/;"	d
AT91_SDRAMC_CAS	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_CAS	/;"	d
AT91_SDRAMC_CAS_1	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_CAS_1	/;"	d
AT91_SDRAMC_CAS_2	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_CAS_2	/;"	d
AT91_SDRAMC_CAS_3	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_CAS_3	/;"	d
AT91_SDRAMC_COUNT	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_COUNT	/;"	d
AT91_SDRAMC_CR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_CR	/;"	d
AT91_SDRAMC_DBW	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_DBW	/;"	d
AT91_SDRAMC_DBW_16	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_DBW_16	/;"	d
AT91_SDRAMC_DBW_32	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_DBW_32	/;"	d
AT91_SDRAMC_DS	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_DS	/;"	d
AT91_SDRAMC_IDR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_IDR	/;"	d
AT91_SDRAMC_IER	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_IER	/;"	d
AT91_SDRAMC_IMR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_IMR	/;"	d
AT91_SDRAMC_ISR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_ISR	/;"	d
AT91_SDRAMC_LPCB	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_LPCB	/;"	d
AT91_SDRAMC_LPCB_DEEP_POWER_DOWN	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_LPCB_DEEP_POWER_DOWN	/;"	d
AT91_SDRAMC_LPCB_DISABLE	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_LPCB_DISABLE	/;"	d
AT91_SDRAMC_LPCB_POWER_DOWN	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_LPCB_POWER_DOWN	/;"	d
AT91_SDRAMC_LPCB_SELF_REFRESH	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_LPCB_SELF_REFRESH	/;"	d
AT91_SDRAMC_LPR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_LPR	/;"	d
AT91_SDRAMC_MD	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_MD	/;"	d
AT91_SDRAMC_MDR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_MDR	/;"	d
AT91_SDRAMC_MD_LOW_POWER_SDRAM	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MD_LOW_POWER_SDRAM	/;"	d
AT91_SDRAMC_MD_SDRAM	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MD_SDRAM	/;"	d
AT91_SDRAMC_MODE	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_MODE	/;"	d
AT91_SDRAMC_MODE_DEEP	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_DEEP	/;"	d
AT91_SDRAMC_MODE_EXT_LMR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_EXT_LMR	/;"	d
AT91_SDRAMC_MODE_LMR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_LMR	/;"	d
AT91_SDRAMC_MODE_NOP	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_NOP	/;"	d
AT91_SDRAMC_MODE_NORMAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_NORMAL	/;"	d
AT91_SDRAMC_MODE_PRECHARGE	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_PRECHARGE	/;"	d
AT91_SDRAMC_MODE_REFRESH	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_MODE_REFRESH	/;"	d
AT91_SDRAMC_MR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_MR	/;"	d
AT91_SDRAMC_NB	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_NB	/;"	d
AT91_SDRAMC_NB_2	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NB_2	/;"	d
AT91_SDRAMC_NB_4	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NB_4	/;"	d
AT91_SDRAMC_NC	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_NC	/;"	d
AT91_SDRAMC_NC_10	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NC_10	/;"	d
AT91_SDRAMC_NC_11	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NC_11	/;"	d
AT91_SDRAMC_NC_8	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NC_8	/;"	d
AT91_SDRAMC_NC_9	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NC_9	/;"	d
AT91_SDRAMC_NR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_NR	/;"	d
AT91_SDRAMC_NR_11	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NR_11	/;"	d
AT91_SDRAMC_NR_12	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NR_12	/;"	d
AT91_SDRAMC_NR_13	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_NR_13	/;"	d
AT91_SDRAMC_PASR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_PASR	/;"	d
AT91_SDRAMC_RES	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_RES	/;"	d
AT91_SDRAMC_TCSR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TCSR	/;"	d
AT91_SDRAMC_TIMEOUT	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TIMEOUT	/;"	d
AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES	/;"	d
AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES	/;"	d
AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES	/;"	d
AT91_SDRAMC_TR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define AT91_SDRAMC_TR	/;"	d
AT91_SDRAMC_TRAS	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TRAS	/;"	d
AT91_SDRAMC_TRAS_VAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TRAS_VAL(/;"	d
AT91_SDRAMC_TRC	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TRC	/;"	d
AT91_SDRAMC_TRCD	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TRCD	/;"	d
AT91_SDRAMC_TRCD_VAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_TRCD_VAL(/;"	d
AT91_SDRAMC_TRC_VAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define			AT91_SDRAMC_TRC_VAL(/;"	d
AT91_SDRAMC_TRP	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TRP	/;"	d
AT91_SDRAMC_TRP_VAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TRP_VAL(/;"	d
AT91_SDRAMC_TWR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TWR	/;"	d
AT91_SDRAMC_TWR_VAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TWR_VAL(/;"	d
AT91_SDRAMC_TXSR	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TXSR	/;"	d
AT91_SDRAMC_TXSR_VAL	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^#define		AT91_SDRAMC_TXSR_VAL(/;"	d
AT91_SFR_EBICFG_DRIVE0	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE0	/;"	d
AT91_SFR_EBICFG_DRIVE0_HIGH	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE0_HIGH	/;"	d
AT91_SFR_EBICFG_DRIVE0_LOW	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE0_LOW	/;"	d
AT91_SFR_EBICFG_DRIVE0_MEDIUM	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE0_MEDIUM	/;"	d
AT91_SFR_EBICFG_DRIVE1	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE1	/;"	d
AT91_SFR_EBICFG_DRIVE1_HIGH	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE1_HIGH	/;"	d
AT91_SFR_EBICFG_DRIVE1_LOW	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE1_LOW	/;"	d
AT91_SFR_EBICFG_DRIVE1_MEDIUM	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_DRIVE1_MEDIUM	/;"	d
AT91_SFR_EBICFG_PULL0	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL0	/;"	d
AT91_SFR_EBICFG_PULL0_DOWN	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL0_DOWN	/;"	d
AT91_SFR_EBICFG_PULL0_NONE	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL0_NONE	/;"	d
AT91_SFR_EBICFG_PULL0_UP	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL0_UP	/;"	d
AT91_SFR_EBICFG_PULL1	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL1	/;"	d
AT91_SFR_EBICFG_PULL1_DOWN	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL1_DOWN	/;"	d
AT91_SFR_EBICFG_PULL1_NONE	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL1_NONE	/;"	d
AT91_SFR_EBICFG_PULL1_UP	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_PULL1_UP	/;"	d
AT91_SFR_EBICFG_SCH0	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_SCH0	/;"	d
AT91_SFR_EBICFG_SCH0_OFF	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_SCH0_OFF	/;"	d
AT91_SFR_EBICFG_SCH0_ON	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_SCH0_ON	/;"	d
AT91_SFR_EBICFG_SCH1	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_SCH1	/;"	d
AT91_SFR_EBICFG_SCH1_OFF	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_SCH1_OFF	/;"	d
AT91_SFR_EBICFG_SCH1_ON	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define AT91_SFR_EBICFG_SCH1_ON	/;"	d
AT91_SMC_CSR_ACSS_1CYCLE	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_ACSS_1CYCLE	/;"	d
AT91_SMC_CSR_ACSS_2CYCLE	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_ACSS_2CYCLE	/;"	d
AT91_SMC_CSR_ACSS_3CYCLE	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_ACSS_3CYCLE	/;"	d
AT91_SMC_CSR_ACSS_STANDARD	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_ACSS_STANDARD	/;"	d
AT91_SMC_CSR_BAT_16	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_BAT_16	/;"	d
AT91_SMC_CSR_BAT_8	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_BAT_8	/;"	d
AT91_SMC_CSR_DBW_16	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_DBW_16	/;"	d
AT91_SMC_CSR_DBW_8	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_DBW_8	/;"	d
AT91_SMC_CSR_DRP	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_DRP	/;"	d
AT91_SMC_CSR_NWS	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_NWS(/;"	d
AT91_SMC_CSR_RWHOLD	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_RWHOLD(/;"	d
AT91_SMC_CSR_RWSETUP	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_RWSETUP(/;"	d
AT91_SMC_CSR_TDF	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_TDF(/;"	d
AT91_SMC_CSR_WSEN	arch/arm/mach-at91/include/mach/at91_mc.h	/^#define AT91_SMC_CSR_WSEN	/;"	d
AT91_SMC_CYCLE_NRD	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_CYCLE_NRD(/;"	d
AT91_SMC_CYCLE_NRD	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_CYCLE_NRD(/;"	d
AT91_SMC_CYCLE_NWE	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_CYCLE_NWE(/;"	d
AT91_SMC_CYCLE_NWE	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_CYCLE_NWE(/;"	d
AT91_SMC_MODE_BAT	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_BAT	/;"	d
AT91_SMC_MODE_BAT	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_BAT	/;"	d
AT91_SMC_MODE_DBW_16	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_DBW_16	/;"	d
AT91_SMC_MODE_DBW_16	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_DBW_16	/;"	d
AT91_SMC_MODE_DBW_32	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_DBW_32	/;"	d
AT91_SMC_MODE_DBW_32	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_DBW_32	/;"	d
AT91_SMC_MODE_DBW_8	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_DBW_8	/;"	d
AT91_SMC_MODE_DBW_8	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_DBW_8	/;"	d
AT91_SMC_MODE_EXNW_DISABLE	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_EXNW_DISABLE	/;"	d
AT91_SMC_MODE_EXNW_DISABLE	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_EXNW_DISABLE	/;"	d
AT91_SMC_MODE_EXNW_FROZEN	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_EXNW_FROZEN	/;"	d
AT91_SMC_MODE_EXNW_FROZEN	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_EXNW_FROZEN	/;"	d
AT91_SMC_MODE_EXNW_READY	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_EXNW_READY	/;"	d
AT91_SMC_MODE_EXNW_READY	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_EXNW_READY	/;"	d
AT91_SMC_MODE_PMEN	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_PMEN	/;"	d
AT91_SMC_MODE_PMEN	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_PMEN	/;"	d
AT91_SMC_MODE_PS_16	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_PS_16	/;"	d
AT91_SMC_MODE_PS_16	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_PS_16	/;"	d
AT91_SMC_MODE_PS_32	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_PS_32	/;"	d
AT91_SMC_MODE_PS_32	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_PS_32	/;"	d
AT91_SMC_MODE_PS_4	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_PS_4	/;"	d
AT91_SMC_MODE_PS_4	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_PS_4	/;"	d
AT91_SMC_MODE_PS_8	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_PS_8	/;"	d
AT91_SMC_MODE_PS_8	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_PS_8	/;"	d
AT91_SMC_MODE_RM_NCS	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_RM_NCS	/;"	d
AT91_SMC_MODE_RM_NCS	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_RM_NCS	/;"	d
AT91_SMC_MODE_RM_NRD	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_RM_NRD	/;"	d
AT91_SMC_MODE_RM_NRD	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_RM_NRD	/;"	d
AT91_SMC_MODE_TDF	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_TDF	/;"	d
AT91_SMC_MODE_TDF	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_TDF	/;"	d
AT91_SMC_MODE_TDF_CYCLE	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_TDF_CYCLE(/;"	d
AT91_SMC_MODE_TDF_CYCLE	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_TDF_CYCLE(/;"	d
AT91_SMC_MODE_WM_NCS	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_WM_NCS	/;"	d
AT91_SMC_MODE_WM_NCS	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_WM_NCS	/;"	d
AT91_SMC_MODE_WM_NWE	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_MODE_WM_NWE	/;"	d
AT91_SMC_MODE_WM_NWE	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_MODE_WM_NWE	/;"	d
AT91_SMC_PULSE_NCS_RD	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_PULSE_NCS_RD(/;"	d
AT91_SMC_PULSE_NCS_RD	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_PULSE_NCS_RD(/;"	d
AT91_SMC_PULSE_NCS_WR	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_PULSE_NCS_WR(/;"	d
AT91_SMC_PULSE_NCS_WR	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_PULSE_NCS_WR(/;"	d
AT91_SMC_PULSE_NRD	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_PULSE_NRD(/;"	d
AT91_SMC_PULSE_NRD	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_PULSE_NRD(/;"	d
AT91_SMC_PULSE_NWE	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_PULSE_NWE(/;"	d
AT91_SMC_PULSE_NWE	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_PULSE_NWE(/;"	d
AT91_SMC_SETUP_NCS_RD	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_SETUP_NCS_RD(/;"	d
AT91_SMC_SETUP_NCS_RD	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_SETUP_NCS_RD(/;"	d
AT91_SMC_SETUP_NCS_WR	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_SETUP_NCS_WR(/;"	d
AT91_SMC_SETUP_NCS_WR	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_SETUP_NCS_WR(/;"	d
AT91_SMC_SETUP_NRD	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_SETUP_NRD(/;"	d
AT91_SMC_SETUP_NRD	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_SETUP_NRD(/;"	d
AT91_SMC_SETUP_NWE	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^#define AT91_SMC_SETUP_NWE(/;"	d
AT91_SMC_SETUP_NWE	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_SETUP_NWE(/;"	d
AT91_SMC_TIMINGS_NFSEL	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_NFSEL(/;"	d
AT91_SMC_TIMINGS_OCMS	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_OCMS(/;"	d
AT91_SMC_TIMINGS_RBNSEL	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_RBNSEL(/;"	d
AT91_SMC_TIMINGS_TADL	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_TADL(/;"	d
AT91_SMC_TIMINGS_TAR	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_TAR(/;"	d
AT91_SMC_TIMINGS_TCLR	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_TCLR(/;"	d
AT91_SMC_TIMINGS_TRR	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_TRR(/;"	d
AT91_SMC_TIMINGS_TWB	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define AT91_SMC_TIMINGS_TWB(/;"	d
AT91_SPI_BITS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_BITS	/;"	d
AT91_SPI_BITS_10	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_10	/;"	d
AT91_SPI_BITS_11	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_11	/;"	d
AT91_SPI_BITS_12	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_12	/;"	d
AT91_SPI_BITS_13	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_13	/;"	d
AT91_SPI_BITS_14	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_14	/;"	d
AT91_SPI_BITS_15	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_15	/;"	d
AT91_SPI_BITS_16	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_16	/;"	d
AT91_SPI_BITS_8	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_8	/;"	d
AT91_SPI_BITS_9	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_BITS_9	/;"	d
AT91_SPI_CLK	include/configs/at91sam9260ek.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/at91sam9261ek.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/at91sam9263ek.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/at91sam9rlek.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/ethernut5.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/meesc.h	/^# define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/pm9261.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/pm9263.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CLK	include/configs/usb_a9263.h	/^#define AT91_SPI_CLK	/;"	d
AT91_SPI_CPOL	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_CPOL	/;"	d
AT91_SPI_CR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_CR	/;"	d
AT91_SPI_CSAAT	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_CSAAT	/;"	d
AT91_SPI_CSR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_CSR(/;"	d
AT91_SPI_DIV32	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_DIV32	/;"	d
AT91_SPI_DLYBCS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_DLYBCS	/;"	d
AT91_SPI_DLYBCT	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_DLYBCT	/;"	d
AT91_SPI_DLYBS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_DLYBS	/;"	d
AT91_SPI_ENDRX	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_ENDRX	/;"	d
AT91_SPI_ENDTX	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_ENDTX	/;"	d
AT91_SPI_H	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_H$/;"	d
AT91_SPI_IDR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_IDR	/;"	d
AT91_SPI_IER	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_IER	/;"	d
AT91_SPI_IMR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_IMR	/;"	d
AT91_SPI_LASTXFER	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_LASTXFER	/;"	d
AT91_SPI_LLB	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_LLB	/;"	d
AT91_SPI_MODF	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_MODF	/;"	d
AT91_SPI_MODFDIS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_MODFDIS	/;"	d
AT91_SPI_MR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_MR	/;"	d
AT91_SPI_MSTR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_MSTR	/;"	d
AT91_SPI_NCPHA	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_NCPHA	/;"	d
AT91_SPI_NSSR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_NSSR	/;"	d
AT91_SPI_OVRES	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_OVRES	/;"	d
AT91_SPI_PCS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_PCS	/;"	d
AT91_SPI_PCS0_DATAFLASH_CARD	drivers/spi/atmel_dataflash_spi.c	/^#define AT91_SPI_PCS0_DATAFLASH_CARD	/;"	d	file:
AT91_SPI_PCS1_DATAFLASH_CARD	drivers/spi/atmel_dataflash_spi.c	/^#define AT91_SPI_PCS1_DATAFLASH_CARD	/;"	d	file:
AT91_SPI_PCS2_DATAFLASH_CARD	drivers/spi/atmel_dataflash_spi.c	/^#define AT91_SPI_PCS2_DATAFLASH_CARD	/;"	d	file:
AT91_SPI_PCS3_DATAFLASH_CARD	drivers/spi/atmel_dataflash_spi.c	/^#define AT91_SPI_PCS3_DATAFLASH_CARD	/;"	d	file:
AT91_SPI_PCSDEC	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_PCSDEC	/;"	d
AT91_SPI_PS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_PS	/;"	d
AT91_SPI_PS_FIXED	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_PS_FIXED	/;"	d
AT91_SPI_PS_VARIABLE	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define			AT91_SPI_PS_VARIABLE	/;"	d
AT91_SPI_PTCR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_PTCR	/;"	d
AT91_SPI_PTSR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_PTSR	/;"	d
AT91_SPI_RCR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_RCR	/;"	d
AT91_SPI_RD	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_RD	/;"	d
AT91_SPI_RDR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_RDR	/;"	d
AT91_SPI_RDRF	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_RDRF	/;"	d
AT91_SPI_RNCR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_RNCR	/;"	d
AT91_SPI_RNPR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_RNPR	/;"	d
AT91_SPI_RPR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_RPR	/;"	d
AT91_SPI_RXBUFF	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_RXBUFF	/;"	d
AT91_SPI_RXTDIS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_RXTDIS	/;"	d
AT91_SPI_RXTEN	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_RXTEN	/;"	d
AT91_SPI_SCBR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_SCBR	/;"	d
AT91_SPI_SPIDIS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_SPIDIS	/;"	d
AT91_SPI_SPIEN	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_SPIEN	/;"	d
AT91_SPI_SPIENS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_SPIENS	/;"	d
AT91_SPI_SR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_SR	/;"	d
AT91_SPI_SWRST	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_SWRST	/;"	d
AT91_SPI_TCR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_TCR	/;"	d
AT91_SPI_TD	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_TD	/;"	d
AT91_SPI_TDR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_TDR	/;"	d
AT91_SPI_TDRE	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_TDRE	/;"	d
AT91_SPI_TNCR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_TNCR	/;"	d
AT91_SPI_TNPR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_TNPR	/;"	d
AT91_SPI_TPR	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define AT91_SPI_TPR	/;"	d
AT91_SPI_TXBUFE	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_TXBUFE	/;"	d
AT91_SPI_TXEMPTY	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_TXEMPTY	/;"	d
AT91_SPI_TXTDIS	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_TXTDIS	/;"	d
AT91_SPI_TXTEN	arch/arm/mach-at91/include/mach/at91_spi.h	/^#define		AT91_SPI_TXTEN	/;"	d
AT91_ST_CR_WDRST	arch/arm/mach-at91/include/mach/at91_st.h	/^#define AT91_ST_CR_WDRST	/;"	d
AT91_ST_H	arch/arm/mach-at91/include/mach/at91_st.h	/^#define AT91_ST_H$/;"	d
AT91_ST_WDMR_EXTEN	arch/arm/mach-at91/include/mach/at91_st.h	/^#define AT91_ST_WDMR_EXTEN /;"	d
AT91_ST_WDMR_RSTEN	arch/arm/mach-at91/include/mach/at91_st.h	/^#define AT91_ST_WDMR_RSTEN	/;"	d
AT91_ST_WDMR_WDV	arch/arm/mach-at91/include/mach/at91_st.h	/^#define AT91_ST_WDMR_WDV(/;"	d
AT91_TC_BMR_TC0XC0S_NONE	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC0XC0S_NONE	/;"	d
AT91_TC_BMR_TC0XC0S_TCLK0	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC0XC0S_TCLK0	/;"	d
AT91_TC_BMR_TC0XC0S_TIOA1	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC0XC0S_TIOA1	/;"	d
AT91_TC_BMR_TC0XC0S_TIOA2	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC0XC0S_TIOA2	/;"	d
AT91_TC_BMR_TC1XC1S_NONE	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC1XC1S_NONE	/;"	d
AT91_TC_BMR_TC1XC1S_TCLK1	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC1XC1S_TCLK1	/;"	d
AT91_TC_BMR_TC1XC1S_TIOA0	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC1XC1S_TIOA0	/;"	d
AT91_TC_BMR_TC1XC1S_TIOA2	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC1XC1S_TIOA2	/;"	d
AT91_TC_BMR_TC2XC2S_NONE	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC2XC2S_NONE	/;"	d
AT91_TC_BMR_TC2XC2S_TCLK2	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC2XC2S_TCLK2	/;"	d
AT91_TC_BMR_TC2XC2S_TIOA0	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC2XC2S_TIOA0	/;"	d
AT91_TC_BMR_TC2XC2S_TIOA1	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_BMR_TC2XC2S_TIOA1	/;"	d
AT91_TC_CCR_CLKDIS	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CCR_CLKDIS	/;"	d
AT91_TC_CCR_CLKEN	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CCR_CLKEN	/;"	d
AT91_TC_CCR_SWTRG	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CCR_SWTRG	/;"	d
AT91_TC_CMR_CPCTRG	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_CPCTRG	/;"	d
AT91_TC_CMR_TCCLKS_CLOCK1	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_CLOCK1	/;"	d
AT91_TC_CMR_TCCLKS_CLOCK2	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_CLOCK2	/;"	d
AT91_TC_CMR_TCCLKS_CLOCK3	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_CLOCK3	/;"	d
AT91_TC_CMR_TCCLKS_CLOCK4	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_CLOCK4	/;"	d
AT91_TC_CMR_TCCLKS_CLOCK5	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_CLOCK5	/;"	d
AT91_TC_CMR_TCCLKS_XC0	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_XC0	/;"	d
AT91_TC_CMR_TCCLKS_XC1	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_XC1	/;"	d
AT91_TC_CMR_TCCLKS_XC2	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_CMR_TCCLKS_XC2	/;"	d
AT91_TC_H	arch/arm/mach-at91/include/mach/at91_tc.h	/^#define AT91_TC_H$/;"	d
AT91_UDC_H	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDC_H$/;"	d
AT91_UDP_CONFG	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_CONFG	/;"	d
AT91_UDP_CSR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_CSR(/;"	d
AT91_UDP_DIR	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_DIR	/;"	d
AT91_UDP_DTGLE	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_DTGLE	/;"	d
AT91_UDP_ENDBUSRES	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_ENDBUSRES	/;"	d
AT91_UDP_EP	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_EP(/;"	d
AT91_UDP_EPEDS	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_EPEDS	/;"	d
AT91_UDP_EPTYPE	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_EPTYPE	/;"	d
AT91_UDP_EPTYPE_BULK_IN	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_BULK_IN	/;"	d
AT91_UDP_EPTYPE_BULK_OUT	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_BULK_OUT	/;"	d
AT91_UDP_EPTYPE_CTRL	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_CTRL	/;"	d
AT91_UDP_EPTYPE_INT_IN	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_INT_IN	/;"	d
AT91_UDP_EPTYPE_INT_OUT	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_INT_OUT	/;"	d
AT91_UDP_EPTYPE_ISO_IN	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_ISO_IN	/;"	d
AT91_UDP_EPTYPE_ISO_OUT	drivers/usb/gadget/at91_udc.h	/^#define		AT91_UDP_EPTYPE_ISO_OUT	/;"	d
AT91_UDP_ESR	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_ESR	/;"	d
AT91_UDP_EXTRSM	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_EXTRSM	/;"	d
AT91_UDP_FADD	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_FADD	/;"	d
AT91_UDP_FADDEN	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_FADDEN	/;"	d
AT91_UDP_FADDR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_FADDR	/;"	d
AT91_UDP_FDR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_FDR(/;"	d
AT91_UDP_FEN	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_FEN	/;"	d
AT91_UDP_FORCESTALL	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_FORCESTALL	/;"	d
AT91_UDP_FRM_ERR	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_FRM_ERR	/;"	d
AT91_UDP_FRM_NUM	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_FRM_NUM	/;"	d
AT91_UDP_FRM_OK	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_FRM_OK	/;"	d
AT91_UDP_GLB_STAT	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_GLB_STAT	/;"	d
AT91_UDP_ICR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_ICR	/;"	d
AT91_UDP_IDR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_IDR	/;"	d
AT91_UDP_IER	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_IER	/;"	d
AT91_UDP_IMR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_IMR	/;"	d
AT91_UDP_ISR	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_ISR	/;"	d
AT91_UDP_NUM	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_NUM	/;"	d
AT91_UDP_RMWUPE	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RMWUPE	/;"	d
AT91_UDP_RSMINPR	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RSMINPR	/;"	d
AT91_UDP_RST_EP	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_RST_EP	/;"	d
AT91_UDP_RXBYTECNT	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RXBYTECNT	/;"	d
AT91_UDP_RXRSM	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RXRSM	/;"	d
AT91_UDP_RXSETUP	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RXSETUP	/;"	d
AT91_UDP_RXSUSP	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RXSUSP	/;"	d
AT91_UDP_RX_DATA_BK0	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RX_DATA_BK0 /;"	d
AT91_UDP_RX_DATA_BK1	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_RX_DATA_BK1 /;"	d
AT91_UDP_SOFINT	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_SOFINT	/;"	d
AT91_UDP_STALLSENT	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_STALLSENT	/;"	d
AT91_UDP_TXCOMP	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_TXCOMP	/;"	d
AT91_UDP_TXPKTRDY	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_TXPKTRDY	/;"	d
AT91_UDP_TXVC	drivers/usb/gadget/at91_udc.h	/^#define AT91_UDP_TXVC	/;"	d
AT91_UDP_TXVC_PUON	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_TXVC_PUON /;"	d
AT91_UDP_TXVC_TXVDIS	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_TXVC_TXVDIS /;"	d
AT91_UDP_WAKEUP	drivers/usb/gadget/at91_udc.h	/^#define     AT91_UDP_WAKEUP	/;"	d
AT91_UTMI	drivers/clk/at91/Kconfig	/^config AT91_UTMI$/;"	c
AT91_UTMI_PLL_CLK_FREQ	arch/arm/mach-at91/include/mach/clk.h	/^#define AT91_UTMI_PLL_CLK_FREQ	/;"	d
AT91_WDT_CR_KEY	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_CR_KEY	/;"	d
AT91_WDT_CR_WDRSTT	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_CR_WDRSTT	/;"	d
AT91_WDT_H	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_H$/;"	d
AT91_WDT_MR_WDD	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDD(/;"	d
AT91_WDT_MR_WDDBGHLT	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDDBGHLT	/;"	d
AT91_WDT_MR_WDDIS	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDDIS	/;"	d
AT91_WDT_MR_WDFIEN	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDFIEN	/;"	d
AT91_WDT_MR_WDIDLEHLT	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDIDLEHLT	/;"	d
AT91_WDT_MR_WDRPROC	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDRPROC	/;"	d
AT91_WDT_MR_WDRSTEN	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDRSTEN	/;"	d
AT91_WDT_MR_WDV	arch/arm/mach-at91/include/mach/at91_wdt.h	/^#define AT91_WDT_MR_WDV(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_MEM_IF	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_MEM_IF(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PERID	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PERID(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_GET_PER_IF	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_GET_PER_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF(/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_MASK	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_MASK	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_MEM_IF_OFFSET	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_MEM_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PERID	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID(/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_MASK	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_MASK	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PERID_OFFSET	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PERID_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF(/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_MASK	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_MASK	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
AT91_XDMAC_DT_PER_IF_OFFSET	include/dt-bindings/dma/at91.h	/^#define AT91_XDMAC_DT_PER_IF_OFFSET	/;"	d
ATACS00_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
ATACS01_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
ATACS10_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
ATACS11_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
ATADIR0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
ATADIR1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,$/;"	e	enum:__anona3077f190103	file:
ATAG0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
ATAG1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
ATAG_ACORN	arch/arm/include/asm/setup.h	/^#define ATAG_ACORN	/;"	d
ATAG_BOARD	board/nokia/rx51/tag_omap.h	/^#define ATAG_BOARD	/;"	d
ATAG_BOARDINFO	arch/avr32/include/asm/setup.h	/^#define ATAG_BOARDINFO	/;"	d
ATAG_CLOCK	arch/avr32/include/asm/setup.h	/^#define ATAG_CLOCK	/;"	d
ATAG_CMDLINE	arch/arm/include/asm/setup.h	/^#define ATAG_CMDLINE	/;"	d
ATAG_CMDLINE	arch/avr32/include/asm/setup.h	/^#define ATAG_CMDLINE	/;"	d
ATAG_CMDLINE	arch/nds32/include/asm/setup.h	/^#define ATAG_CMDLINE	/;"	d
ATAG_CORE	arch/arm/include/asm/setup.h	/^#define ATAG_CORE	/;"	d
ATAG_CORE	arch/avr32/include/asm/setup.h	/^#define ATAG_CORE	/;"	d
ATAG_CORE	arch/nds32/include/asm/setup.h	/^#define ATAG_CORE	/;"	d
ATAG_ETHERNET	arch/avr32/include/asm/setup.h	/^#define ATAG_ETHERNET	/;"	d
ATAG_INITRD	arch/arm/include/asm/setup.h	/^#define ATAG_INITRD	/;"	d
ATAG_INITRD	arch/nds32/include/asm/setup.h	/^#define ATAG_INITRD	/;"	d
ATAG_INITRD2	arch/arm/include/asm/setup.h	/^#define ATAG_INITRD2	/;"	d
ATAG_INITRD2	arch/nds32/include/asm/setup.h	/^#define ATAG_INITRD2	/;"	d
ATAG_MAGIC	arch/avr32/include/asm/setup.h	/^#define ATAG_MAGIC	/;"	d
ATAG_MEM	arch/arm/include/asm/setup.h	/^#define ATAG_MEM	/;"	d
ATAG_MEM	arch/avr32/include/asm/setup.h	/^#define ATAG_MEM	/;"	d
ATAG_MEM	arch/nds32/include/asm/setup.h	/^#define ATAG_MEM	/;"	d
ATAG_MEMCLK	arch/arm/include/asm/setup.h	/^#define ATAG_MEMCLK	/;"	d
ATAG_MV_UBOOT	board/Synology/ds109/ds109.h	/^#define ATAG_MV_UBOOT /;"	d
ATAG_NONE	arch/arm/include/asm/setup.h	/^#define ATAG_NONE	/;"	d
ATAG_NONE	arch/avr32/include/asm/setup.h	/^#define ATAG_NONE	/;"	d
ATAG_NONE	arch/nds32/include/asm/setup.h	/^#define ATAG_NONE	/;"	d
ATAG_RAMDISK	arch/arm/include/asm/setup.h	/^#define ATAG_RAMDISK	/;"	d
ATAG_RAMDISK	arch/nds32/include/asm/setup.h	/^#define ATAG_RAMDISK	/;"	d
ATAG_RDIMG	arch/avr32/include/asm/setup.h	/^#define ATAG_RDIMG	/;"	d
ATAG_REVISION	arch/arm/include/asm/setup.h	/^#define ATAG_REVISION	/;"	d
ATAG_REVISION	arch/nds32/include/asm/setup.h	/^#define ATAG_REVISION	/;"	d
ATAG_RSVD_MEM	arch/avr32/include/asm/setup.h	/^#define ATAG_RSVD_MEM	/;"	d
ATAG_SERIAL	arch/arm/include/asm/setup.h	/^#define ATAG_SERIAL	/;"	d
ATAG_SERIAL	arch/nds32/include/asm/setup.h	/^#define ATAG_SERIAL	/;"	d
ATAG_VIDEOLFB	arch/arm/include/asm/setup.h	/^#define ATAG_VIDEOLFB	/;"	d
ATAG_VIDEOLFB	arch/nds32/include/asm/setup.h	/^#define ATAG_VIDEOLFB	/;"	d
ATAG_VIDEOTEXT	arch/arm/include/asm/setup.h	/^#define ATAG_VIDEOTEXT	/;"	d
ATAG_VIDEOTEXT	arch/nds32/include/asm/setup.h	/^#define ATAG_VIDEOTEXT	/;"	d
ATAPI_ADDR	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                ATAPI_ADDR /;"	d
ATAPI_CDB_LEN	include/libata.h	/^	ATAPI_CDB_LEN		= 16,$/;"	e	enum:__anoneacac85b0103
ATAPI_CMD_IDENT	include/ata.h	/^#define ATAPI_CMD_IDENT /;"	d
ATAPI_CMD_INQUIRY	include/ata.h	/^#define ATAPI_CMD_INQUIRY /;"	d
ATAPI_CMD_PACKET	include/ata.h	/^#define ATAPI_CMD_PACKET /;"	d
ATAPI_CMD_READ_12	include/ata.h	/^#define ATAPI_CMD_READ_12 /;"	d
ATAPI_CMD_READ_CAP	include/ata.h	/^#define ATAPI_CMD_READ_CAP /;"	d
ATAPI_CMD_REQ_SENSE	include/ata.h	/^#define ATAPI_CMD_REQ_SENSE /;"	d
ATAPI_CMD_START_STOP	include/ata.h	/^#define ATAPI_CMD_START_STOP /;"	d
ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_CONTROL /;"	d
ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_CONTROL /;"	d
ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_CONTROL /;"	d
ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_CONTROL /;"	d
ATAPI_CS0N	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                ATAPI_CS0N /;"	d
ATAPI_CS1N	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                ATAPI_CS1N /;"	d
ATAPI_DASP	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                ATAPI_DASP /;"	d
ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_DEV_ADDR /;"	d
ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_DEV_ADDR /;"	d
ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_DEV_ADDR /;"	d
ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_DEV_ADDR /;"	d
ATAPI_DEV_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define             ATAPI_DEV_INT /;"	d
ATAPI_DEV_INT_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define        ATAPI_DEV_INT_MASK /;"	d
ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_DEV_RXBUF /;"	d
ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_DEV_RXBUF /;"	d
ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_DEV_RXBUF /;"	d
ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_DEV_RXBUF /;"	d
ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_DEV_TXBUF /;"	d
ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_DEV_TXBUF /;"	d
ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_DEV_TXBUF /;"	d
ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_DEV_TXBUF /;"	d
ATAPI_DIORN	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               ATAPI_DIORN /;"	d
ATAPI_DIOWN	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               ATAPI_DIOWN /;"	d
ATAPI_DMAACKN	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define             ATAPI_DMAACKN /;"	d
ATAPI_DMADIR	include/libata.h	/^	ATAPI_DMADIR		= (1 << 2),	\/* ATAPI data dir:$/;"	e	enum:__anoneacac85b0103
ATAPI_DMAREQ	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define              ATAPI_DMAREQ /;"	d
ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_DMA_TFRCNT /;"	d
ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_DMA_TFRCNT /;"	d
ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_DMA_TFRCNT /;"	d
ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_DMA_TFRCNT /;"	d
ATAPI_DRIVE_NOT_READY	common/ide.c	/^#define ATAPI_DRIVE_NOT_READY	/;"	d	file:
ATAPI_GET_CONTROL	drivers/block/pata_bfin.h	/^#define ATAPI_GET_CONTROL(/;"	d
ATAPI_GET_DEV_ADDR	drivers/block/pata_bfin.h	/^#define ATAPI_GET_DEV_ADDR(/;"	d
ATAPI_GET_DEV_RXBUF	drivers/block/pata_bfin.h	/^#define ATAPI_GET_DEV_RXBUF(/;"	d
ATAPI_GET_DEV_TXBUF	drivers/block/pata_bfin.h	/^#define ATAPI_GET_DEV_TXBUF(/;"	d
ATAPI_GET_DMA_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_GET_DMA_TFRCNT(/;"	d
ATAPI_GET_INT_MASK	drivers/block/pata_bfin.h	/^#define ATAPI_GET_INT_MASK(/;"	d
ATAPI_GET_INT_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_GET_INT_STATUS(/;"	d
ATAPI_GET_LINE_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_GET_LINE_STATUS(/;"	d
ATAPI_GET_MULTI_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_GET_MULTI_TIM_0(/;"	d
ATAPI_GET_MULTI_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_GET_MULTI_TIM_1(/;"	d
ATAPI_GET_MULTI_TIM_2	drivers/block/pata_bfin.h	/^#define ATAPI_GET_MULTI_TIM_2(/;"	d
ATAPI_GET_PIO_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_GET_PIO_TFRCNT(/;"	d
ATAPI_GET_PIO_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_GET_PIO_TIM_0(/;"	d
ATAPI_GET_PIO_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_GET_PIO_TIM_1(/;"	d
ATAPI_GET_REG_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_GET_REG_TIM_0(/;"	d
ATAPI_GET_SM_STATE	drivers/block/pata_bfin.h	/^#define ATAPI_GET_SM_STATE(/;"	d
ATAPI_GET_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_GET_STATUS(/;"	d
ATAPI_GET_TERMINATE	drivers/block/pata_bfin.h	/^#define ATAPI_GET_TERMINATE(/;"	d
ATAPI_GET_UDMAOUT_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_GET_UDMAOUT_TFRCNT(/;"	d
ATAPI_GET_ULTRA_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_GET_ULTRA_TIM_0(/;"	d
ATAPI_GET_ULTRA_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_GET_ULTRA_TIM_1(/;"	d
ATAPI_GET_ULTRA_TIM_2	drivers/block/pata_bfin.h	/^#define ATAPI_GET_ULTRA_TIM_2(/;"	d
ATAPI_GET_ULTRA_TIM_3	drivers/block/pata_bfin.h	/^#define ATAPI_GET_ULTRA_TIM_3(/;"	d
ATAPI_GET_UMAIN_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_GET_UMAIN_TFRCNT(/;"	d
ATAPI_GET_XFER_LEN	drivers/block/pata_bfin.h	/^#define ATAPI_GET_XFER_LEN(/;"	d
ATAPI_HOST_TERM	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define           ATAPI_HOST_TERM /;"	d
ATAPI_INTR	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                ATAPI_INTR /;"	d
ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_INT_MASK /;"	d
ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_INT_MASK /;"	d
ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_INT_MASK /;"	d
ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_INT_MASK /;"	d
ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_INT_STATUS /;"	d
ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_INT_STATUS /;"	d
ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_INT_STATUS /;"	d
ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_INT_STATUS /;"	d
ATAPI_IORDY	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               ATAPI_IORDY /;"	d
ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_LINE_STATUS /;"	d
ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_LINE_STATUS /;"	d
ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_LINE_STATUS /;"	d
ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_LINE_STATUS /;"	d
ATAPI_MAX_DRAIN	drivers/block/sata_dwc.h	/^	ATAPI_MAX_DRAIN		= 16 << 10,$/;"	e	enum:__anone5f668490203
ATAPI_MISC	drivers/block/sata_dwc.h	/^	ATAPI_MISC		= 4,$/;"	e	enum:__anone5f668490203
ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_MULTI_TIM_0 /;"	d
ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_MULTI_TIM_0 /;"	d
ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_MULTI_TIM_0 /;"	d
ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_MULTI_TIM_0 /;"	d
ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_MULTI_TIM_1 /;"	d
ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_MULTI_TIM_1 /;"	d
ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_MULTI_TIM_1 /;"	d
ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_MULTI_TIM_1 /;"	d
ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_MULTI_TIM_2 /;"	d
ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_MULTI_TIM_2 /;"	d
ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_MULTI_TIM_2 /;"	d
ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_MULTI_TIM_2 /;"	d
ATAPI_OFFSET_CONTROL	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_CONTROL	/;"	d
ATAPI_OFFSET_DEV_ADDR	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_DEV_ADDR	/;"	d
ATAPI_OFFSET_DEV_RXBUF	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_DEV_RXBUF	/;"	d
ATAPI_OFFSET_DEV_TXBUF	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_DEV_TXBUF	/;"	d
ATAPI_OFFSET_DMA_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_DMA_TFRCNT	/;"	d
ATAPI_OFFSET_INT_MASK	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_INT_MASK	/;"	d
ATAPI_OFFSET_INT_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_INT_STATUS	/;"	d
ATAPI_OFFSET_LINE_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_LINE_STATUS	/;"	d
ATAPI_OFFSET_MULTI_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_MULTI_TIM_0	/;"	d
ATAPI_OFFSET_MULTI_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_MULTI_TIM_1	/;"	d
ATAPI_OFFSET_MULTI_TIM_2	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_MULTI_TIM_2	/;"	d
ATAPI_OFFSET_PIO_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_PIO_TFRCNT	/;"	d
ATAPI_OFFSET_PIO_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_PIO_TIM_0	/;"	d
ATAPI_OFFSET_PIO_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_PIO_TIM_1	/;"	d
ATAPI_OFFSET_REG_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_REG_TIM_0	/;"	d
ATAPI_OFFSET_SM_STATE	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_SM_STATE	/;"	d
ATAPI_OFFSET_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_STATUS	/;"	d
ATAPI_OFFSET_TERMINATE	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_TERMINATE	/;"	d
ATAPI_OFFSET_UDMAOUT_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_UDMAOUT_TFRCNT	/;"	d
ATAPI_OFFSET_ULTRA_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_ULTRA_TIM_0	/;"	d
ATAPI_OFFSET_ULTRA_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_ULTRA_TIM_1	/;"	d
ATAPI_OFFSET_ULTRA_TIM_2	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_ULTRA_TIM_2	/;"	d
ATAPI_OFFSET_ULTRA_TIM_3	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_ULTRA_TIM_3	/;"	d
ATAPI_OFFSET_UMAIN_TFRCNT	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_UMAIN_TFRCNT	/;"	d
ATAPI_OFFSET_XFER_LEN	drivers/block/pata_bfin.h	/^#define ATAPI_OFFSET_XFER_LEN	/;"	d
ATAPI_PASS_THRU	drivers/block/sata_dwc.h	/^	ATAPI_PASS_THRU		= 3,$/;"	e	enum:__anone5f668490203
ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_PIO_TFRCNT /;"	d
ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_PIO_TFRCNT /;"	d
ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_PIO_TFRCNT /;"	d
ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_PIO_TFRCNT /;"	d
ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_PIO_TIM_0 /;"	d
ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_PIO_TIM_0 /;"	d
ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_PIO_TIM_0 /;"	d
ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_PIO_TIM_0 /;"	d
ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_PIO_TIM_1 /;"	d
ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_PIO_TIM_1 /;"	d
ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_PIO_TIM_1 /;"	d
ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_PIO_TIM_1 /;"	d
ATAPI_PKT_DMA	include/libata.h	/^	ATAPI_PKT_DMA		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATAPI_PROT_DMA	include/libata.h	/^	ATAPI_PROT_DMA,		\/* packet command with special DMA sauce *\/$/;"	e	enum:ata_tf_protocols
ATAPI_PROT_NODATA	include/libata.h	/^	ATAPI_PROT_NODATA,	\/* packet command, no data *\/$/;"	e	enum:ata_tf_protocols
ATAPI_PROT_PIO	include/libata.h	/^	ATAPI_PROT_PIO,		\/* packet command, PIO data xfer*\/$/;"	e	enum:ata_tf_protocols
ATAPI_READ	drivers/block/sata_dwc.h	/^	ATAPI_READ		= 0,$/;"	e	enum:__anone5f668490203
ATAPI_READ_BLOCK_SIZE	common/ide.c	/^#define ATAPI_READ_BLOCK_SIZE	/;"	d	file:
ATAPI_READ_CD	drivers/block/sata_dwc.h	/^	ATAPI_READ_CD		= 2,$/;"	e	enum:__anone5f668490203
ATAPI_READ_MAX_BLOCK	common/ide.c	/^#define ATAPI_READ_MAX_BLOCK	/;"	d	file:
ATAPI_READ_MAX_BYTES	common/ide.c	/^#define ATAPI_READ_MAX_BYTES	/;"	d	file:
ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_REG_TIM_0 /;"	d
ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_REG_TIM_0 /;"	d
ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_REG_TIM_0 /;"	d
ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_REG_TIM_0 /;"	d
ATAPI_SET_CONTROL	drivers/block/pata_bfin.h	/^#define ATAPI_SET_CONTROL(/;"	d
ATAPI_SET_DEV_ADDR	drivers/block/pata_bfin.h	/^#define ATAPI_SET_DEV_ADDR(/;"	d
ATAPI_SET_DEV_RXBUF	drivers/block/pata_bfin.h	/^#define ATAPI_SET_DEV_RXBUF(/;"	d
ATAPI_SET_DEV_TXBUF	drivers/block/pata_bfin.h	/^#define ATAPI_SET_DEV_TXBUF(/;"	d
ATAPI_SET_INT_MASK	drivers/block/pata_bfin.h	/^#define ATAPI_SET_INT_MASK(/;"	d
ATAPI_SET_INT_STATUS	drivers/block/pata_bfin.h	/^#define ATAPI_SET_INT_STATUS(/;"	d
ATAPI_SET_MULTI_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_SET_MULTI_TIM_0(/;"	d
ATAPI_SET_MULTI_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_SET_MULTI_TIM_1(/;"	d
ATAPI_SET_MULTI_TIM_2	drivers/block/pata_bfin.h	/^#define ATAPI_SET_MULTI_TIM_2(/;"	d
ATAPI_SET_PIO_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_SET_PIO_TIM_0(/;"	d
ATAPI_SET_PIO_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_SET_PIO_TIM_1(/;"	d
ATAPI_SET_REG_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_SET_REG_TIM_0(/;"	d
ATAPI_SET_TERMINATE	drivers/block/pata_bfin.h	/^#define ATAPI_SET_TERMINATE(/;"	d
ATAPI_SET_ULTRA_TIM_0	drivers/block/pata_bfin.h	/^#define ATAPI_SET_ULTRA_TIM_0(/;"	d
ATAPI_SET_ULTRA_TIM_1	drivers/block/pata_bfin.h	/^#define ATAPI_SET_ULTRA_TIM_1(/;"	d
ATAPI_SET_ULTRA_TIM_2	drivers/block/pata_bfin.h	/^#define ATAPI_SET_ULTRA_TIM_2(/;"	d
ATAPI_SET_ULTRA_TIM_3	drivers/block/pata_bfin.h	/^#define ATAPI_SET_ULTRA_TIM_3(/;"	d
ATAPI_SET_XFER_LEN	drivers/block/pata_bfin.h	/^#define ATAPI_SET_XFER_LEN(/;"	d
ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_SM_STATE /;"	d
ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_SM_STATE /;"	d
ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_SM_STATE /;"	d
ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_SM_STATE /;"	d
ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_STATUS /;"	d
ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_STATUS /;"	d
ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_STATUS /;"	d
ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_STATUS /;"	d
ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_TERMINATE /;"	d
ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_TERMINATE /;"	d
ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_TERMINATE /;"	d
ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_TERMINATE /;"	d
ATAPI_TIME_OUT	common/ide.c	/^#define ATAPI_TIME_OUT	/;"	d	file:
ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_UDMAOUT_TFRCNT /;"	d
ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_UDMAOUT_TFRCNT /;"	d
ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_UDMAOUT_TFRCNT /;"	d
ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_UDMAOUT_TFRCNT /;"	d
ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_ULTRA_TIM_0 /;"	d
ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_ULTRA_TIM_0 /;"	d
ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_ULTRA_TIM_0 /;"	d
ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_ULTRA_TIM_0 /;"	d
ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_ULTRA_TIM_1 /;"	d
ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_ULTRA_TIM_1 /;"	d
ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_ULTRA_TIM_1 /;"	d
ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_ULTRA_TIM_1 /;"	d
ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_ULTRA_TIM_2 /;"	d
ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_ULTRA_TIM_2 /;"	d
ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_ULTRA_TIM_2 /;"	d
ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_ULTRA_TIM_2 /;"	d
ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_ULTRA_TIM_3 /;"	d
ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_ULTRA_TIM_3 /;"	d
ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_ULTRA_TIM_3 /;"	d
ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_ULTRA_TIM_3 /;"	d
ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_UMAIN_TFRCNT /;"	d
ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_UMAIN_TFRCNT /;"	d
ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_UMAIN_TFRCNT /;"	d
ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_UMAIN_TFRCNT /;"	d
ATAPI_UNIT_ATTN	common/ide.c	/^#define ATAPI_UNIT_ATTN	/;"	d	file:
ATAPI_WRITE	drivers/block/sata_dwc.h	/^	ATAPI_WRITE		= 1,$/;"	e	enum:__anone5f668490203
ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define ATAPI_XFER_LEN /;"	d
ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define ATAPI_XFER_LEN /;"	d
ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define ATAPI_XFER_LEN /;"	d
ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define ATAPI_XFER_LEN /;"	d
ATARD0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona3077f190103	file:
ATARD1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
ATAWR0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
ATAWR1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
ATA_ABORTED	include/libata.h	/^	ATA_ABORTED		= (1 << 2),	\/* command aborted *\/$/;"	e	enum:__anoneacac85b0103
ATA_BAD_R_STAT	include/ata.h	/^#define ATA_BAD_R_STAT	/;"	d
ATA_BAD_STAT	include/ata.h	/^#define ATA_BAD_STAT	/;"	d
ATA_BAD_W_STAT	include/ata.h	/^#define ATA_BAD_W_STAT	/;"	d
ATA_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ATA_BASE_ADDR /;"	d
ATA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ATA_BASE_ADDR	/;"	d
ATA_BASE_ADDR	include/configs/aria.h	/^#define ATA_BASE_ADDR	/;"	d
ATA_BASE_ADDR	include/configs/mpc5121ads.h	/^#define ATA_BASE_ADDR	/;"	d
ATA_BLOCKSHIFT	include/ata.h	/^#define ATA_BLOCKSHIFT	/;"	d
ATA_BLOCKSIZE	include/ata.h	/^#define ATA_BLOCKSIZE	/;"	d
ATA_BUSY	include/libata.h	/^	ATA_BUSY		= (1 << 7),	\/* BSY status bit *\/$/;"	e	enum:__anoneacac85b0103
ATA_CBL_NONE	include/libata.h	/^	ATA_CBL_NONE		= 0,$/;"	e	enum:__anoneacac85b0103
ATA_CBL_PATA40	include/libata.h	/^	ATA_CBL_PATA40		= 1,$/;"	e	enum:__anoneacac85b0103
ATA_CBL_PATA40_SHORT	include/libata.h	/^	ATA_CBL_PATA40_SHORT	= 3,	\/* 40 wire cable to high UDMA spec *\/$/;"	e	enum:__anoneacac85b0103
ATA_CBL_PATA80	include/libata.h	/^	ATA_CBL_PATA80		= 2,$/;"	e	enum:__anoneacac85b0103
ATA_CBL_PATA_IGN	include/libata.h	/^	ATA_CBL_PATA_IGN	= 5,	\/* don't know, ignore cable handling *\/$/;"	e	enum:__anoneacac85b0103
ATA_CBL_PATA_UNK	include/libata.h	/^	ATA_CBL_PATA_UNK	= 4,	\/* don't know, maybe 80c? *\/$/;"	e	enum:__anoneacac85b0103
ATA_CBL_SATA	include/libata.h	/^	ATA_CBL_SATA		= 6,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_CHK_POWER	include/libata.h	/^	ATA_CMD_CHK_POWER	= 0xE5, \/* check power mode *\/$/;"	e	enum:__anoneacac85b0103
ATA_CMD_CHK_PWR	include/ata.h	/^#define ATA_CMD_CHK_PWR	/;"	d
ATA_CMD_CONF_OVERLAY	include/libata.h	/^	ATA_CMD_CONF_OVERLAY	= 0xB1,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_DEV_RESET	include/libata.h	/^	ATA_CMD_DEV_RESET	= 0x08, \/* ATAPI device reset *\/$/;"	e	enum:__anoneacac85b0103
ATA_CMD_DIAG	include/ata.h	/^#define ATA_CMD_DIAG	/;"	d
ATA_CMD_EDD	include/libata.h	/^	ATA_CMD_EDD		= 0x90,	\/* execute device diagnostic *\/$/;"	e	enum:__anoneacac85b0103
ATA_CMD_FLUSH	include/ata.h	/^#define ATA_CMD_FLUSH /;"	d
ATA_CMD_FLUSH	include/libata.h	/^	ATA_CMD_FLUSH		= 0xE7,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_FLUSH_EXT	include/ata.h	/^#define ATA_CMD_FLUSH_EXT /;"	d
ATA_CMD_FLUSH_EXT	include/libata.h	/^	ATA_CMD_FLUSH_EXT	= 0xEA,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_FPDMA_READ	include/libata.h	/^	ATA_CMD_FPDMA_READ	= 0x60,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_FPDMA_WRITE	include/libata.h	/^	ATA_CMD_FPDMA_WRITE	= 0x61,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_IDENT	include/ata.h	/^#define ATA_CMD_IDENT	/;"	d
ATA_CMD_IDLE	drivers/block/sata_sil3114.h	/^#define ATA_CMD_IDLE	/;"	d
ATA_CMD_IDLE	include/libata.h	/^	ATA_CMD_IDLE		= 0xE3, \/* place in idle power mode *\/$/;"	e	enum:__anoneacac85b0103
ATA_CMD_IDLEIMMEDIATE	drivers/block/sata_sil3114.h	/^#define ATA_CMD_IDLEIMMEDIATE	/;"	d
ATA_CMD_IDLEIMMEDIATE	include/libata.h	/^	ATA_CMD_IDLEIMMEDIATE	= 0xE1,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_ID_ATA	include/libata.h	/^	ATA_CMD_ID_ATA		= 0xEC,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_ID_ATAPI	include/libata.h	/^	ATA_CMD_ID_ATAPI	= 0xA1,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_INIT	include/ata.h	/^#define ATA_CMD_INIT	/;"	d
ATA_CMD_INIT_DEV_PARAMS	include/libata.h	/^	ATA_CMD_INIT_DEV_PARAMS	= 0x91,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PACKET	include/libata.h	/^	ATA_CMD_PACKET		= 0xA0,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PIO_READ	include/libata.h	/^	ATA_CMD_PIO_READ	= 0x20,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PIO_READ_EXT	include/libata.h	/^	ATA_CMD_PIO_READ_EXT	= 0x24,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PIO_WRITE	include/libata.h	/^	ATA_CMD_PIO_WRITE	= 0x30,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PIO_WRITE_EXT	include/libata.h	/^	ATA_CMD_PIO_WRITE_EXT	= 0x34,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PMP_READ	include/libata.h	/^	ATA_CMD_PMP_READ	= 0xE4,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_PMP_WRITE	include/libata.h	/^	ATA_CMD_PMP_WRITE	= 0xE8,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_RD_DMA	include/ata.h	/^#define ATA_CMD_RD_DMA	/;"	d
ATA_CMD_RD_DMAN	include/ata.h	/^#define ATA_CMD_RD_DMAN	/;"	d
ATA_CMD_RD_MULT	include/ata.h	/^#define ATA_CMD_RD_MULT	/;"	d
ATA_CMD_READ	include/ata.h	/^#define ATA_CMD_READ	/;"	d
ATA_CMD_READ	include/libata.h	/^	ATA_CMD_READ		= 0xC8,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READN	include/ata.h	/^#define ATA_CMD_READN	/;"	d
ATA_CMD_READ_EXT	include/ata.h	/^#define ATA_CMD_READ_EXT /;"	d
ATA_CMD_READ_EXT	include/libata.h	/^	ATA_CMD_READ_EXT	= 0x25,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_LOG_EXT	include/libata.h	/^	ATA_CMD_READ_LOG_EXT	= 0x2f,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_LONG	include/libata.h	/^	ATA_CMD_READ_LONG	= 0x22,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_LONG_ONCE	include/libata.h	/^	ATA_CMD_READ_LONG_ONCE	= 0x23,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_MULTI	include/libata.h	/^	ATA_CMD_READ_MULTI	= 0xC4,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_MULTI_EXT	include/libata.h	/^	ATA_CMD_READ_MULTI_EXT	= 0x29,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_NATIVE_MAX	include/libata.h	/^	ATA_CMD_READ_NATIVE_MAX	= 0xF8,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_READ_NATIVE_MAX_EXT	include/libata.h	/^	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_SEC_FREEZE_LOCK	include/libata.h	/^	ATA_CMD_SEC_FREEZE_LOCK	= 0xF5,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_SEEK	include/ata.h	/^#define ATA_CMD_SEEK	/;"	d
ATA_CMD_SETF	include/ata.h	/^#define ATA_CMD_SETF	/;"	d
ATA_CMD_SETMULT	include/ata.h	/^#define ATA_CMD_SETMULT	/;"	d
ATA_CMD_SET_FEATURES	include/libata.h	/^	ATA_CMD_SET_FEATURES	= 0xEF,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_SET_MAX	include/libata.h	/^	ATA_CMD_SET_MAX		= 0xF9,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_SET_MAX_EXT	include/libata.h	/^	ATA_CMD_SET_MAX_EXT	= 0x37,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_SET_MULTI	include/libata.h	/^	ATA_CMD_SET_MULTI	= 0xC6,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_SLEEP	include/libata.h	/^	ATA_CMD_SLEEP		= 0xE6,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_STANDBY	drivers/block/sata_sil3114.h	/^#define ATA_CMD_STANDBY	/;"	d
ATA_CMD_STANDBY	include/libata.h	/^	ATA_CMD_STANDBY		= 0xE2, \/* place in standby power mode *\/$/;"	e	enum:__anoneacac85b0103
ATA_CMD_STANDBYNOW1	drivers/block/sata_sil3114.h	/^#define ATA_CMD_STANDBYNOW1	/;"	d
ATA_CMD_STANDBYNOW1	include/libata.h	/^	ATA_CMD_STANDBYNOW1	= 0xE0,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_VERIFY	include/libata.h	/^	ATA_CMD_VERIFY		= 0x40,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_VERIFY_EXT	include/libata.h	/^	ATA_CMD_VERIFY_EXT	= 0x42,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_VRFY	include/ata.h	/^#define ATA_CMD_VRFY	/;"	d
ATA_CMD_VRFYN	include/ata.h	/^#define ATA_CMD_VRFYN	/;"	d
ATA_CMD_VRFY_EXT	include/ata.h	/^#define ATA_CMD_VRFY_EXT	/;"	d
ATA_CMD_WRITE	include/ata.h	/^#define ATA_CMD_WRITE	/;"	d
ATA_CMD_WRITE	include/libata.h	/^	ATA_CMD_WRITE		= 0xCA,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITEN	include/ata.h	/^#define ATA_CMD_WRITEN	/;"	d
ATA_CMD_WRITE_EXT	include/ata.h	/^#define ATA_CMD_WRITE_EXT	/;"	d
ATA_CMD_WRITE_EXT	include/libata.h	/^	ATA_CMD_WRITE_EXT	= 0x35,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITE_FUA_EXT	include/libata.h	/^	ATA_CMD_WRITE_FUA_EXT	= 0x3D,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITE_LONG	include/libata.h	/^	ATA_CMD_WRITE_LONG	= 0x32,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITE_LONG_ONCE	include/libata.h	/^	ATA_CMD_WRITE_LONG_ONCE	= 0x33,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITE_MULTI	include/libata.h	/^	ATA_CMD_WRITE_MULTI	= 0xC5,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITE_MULTI_EXT	include/libata.h	/^	ATA_CMD_WRITE_MULTI_EXT	= 0x39,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WRITE_MULTI_FUA_EXT	include/libata.h	/^	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,$/;"	e	enum:__anoneacac85b0103
ATA_CMD_WR_DMA	include/ata.h	/^#define ATA_CMD_WR_DMA	/;"	d
ATA_CMD_WR_DMAN	include/ata.h	/^#define ATA_CMD_WR_DMAN	/;"	d
ATA_CMD_WR_MULT	include/ata.h	/^#define ATA_CMD_WR_MULT	/;"	d
ATA_COMMAND	include/ata.h	/^#define ATA_COMMAND	/;"	d
ATA_CURR_BASE	include/ide.h	/^#define	ATA_CURR_BASE(/;"	d
ATA_CYL_HIGH	include/ata.h	/^#define ATA_CYL_HIGH	/;"	d
ATA_CYL_LOW	include/ata.h	/^#define ATA_CYL_LOW	/;"	d
ATA_DATA_EVEN	include/ata.h	/^#define ATA_DATA_EVEN	/;"	d
ATA_DATA_ODD	include/ata.h	/^#define ATA_DATA_ODD	/;"	d
ATA_DATA_READY	include/ata.h	/^#define ATA_DATA_READY	/;"	d
ATA_DATA_REG	include/ata.h	/^#define ATA_DATA_REG	/;"	d
ATA_DCO_FREEZE_LOCK	include/libata.h	/^	ATA_DCO_FREEZE_LOCK	= 0xC1,$/;"	e	enum:__anoneacac85b0103
ATA_DCO_IDENTIFY	include/libata.h	/^	ATA_DCO_IDENTIFY	= 0xC2,$/;"	e	enum:__anoneacac85b0103
ATA_DCO_RESTORE	include/libata.h	/^	ATA_DCO_RESTORE		= 0xC0,$/;"	e	enum:__anoneacac85b0103
ATA_DCO_SET	include/libata.h	/^	ATA_DCO_SET		= 0xC3,$/;"	e	enum:__anoneacac85b0103
ATA_DEFER_LINK	drivers/block/sata_dwc.h	/^	ATA_DEFER_LINK		= 1,$/;"	e	enum:__anone5f668490203
ATA_DEFER_PORT	drivers/block/sata_dwc.h	/^	ATA_DEFER_PORT		= 2,$/;"	e	enum:__anone5f668490203
ATA_DEF_BUSY_WAIT	drivers/block/sata_dwc.h	/^	ATA_DEF_BUSY_WAIT	= 10000,$/;"	e	enum:__anone5f668490203
ATA_DEF_QUEUE	drivers/block/sata_dwc.h	/^	ATA_DEF_QUEUE		= 1,$/;"	e	enum:__anone5f668490203
ATA_DEV1	include/libata.h	/^	ATA_DEV1		= (1 << 4),	\/* Select Device 1 (slave) *\/$/;"	e	enum:__anoneacac85b0103
ATA_DEVCTL_OBS	include/libata.h	/^	ATA_DEVCTL_OBS		= (1 << 3),	\/* obsolete bit in devctl reg *\/$/;"	e	enum:__anoneacac85b0103
ATA_DEVICE	include/ata.h	/^#define ATA_DEVICE(/;"	d
ATA_DEVICE_OBS	include/libata.h	/^	ATA_DEVICE_OBS		= (1 << 7) | (1 << 5), \/* obs bits in dev reg *\/$/;"	e	enum:__anoneacac85b0103
ATA_DEV_ATA	include/libata.h	/^	ATA_DEV_ATA,		\/* ATA device *\/$/;"	e	enum:ata_dev_typed
ATA_DEV_ATAPI	include/libata.h	/^	ATA_DEV_ATAPI,		\/* ATAPI device *\/$/;"	e	enum:ata_dev_typed
ATA_DEV_CTL	include/ata.h	/^#define ATA_DEV_CTL	/;"	d
ATA_DEV_HD	include/ata.h	/^#define ATA_DEV_HD	/;"	d
ATA_DEV_PMP	include/libata.h	/^	ATA_DEV_PMP,		\/* Port Multiplier Port *\/$/;"	e	enum:ata_dev_typed
ATA_DEV_UNKNOWN	include/libata.h	/^	ATA_DEV_UNKNOWN,	\/* unknown *\/$/;"	e	enum:ata_dev_typed
ATA_DF	include/libata.h	/^	ATA_DF			= (1 << 5),	\/* device fault *\/$/;"	e	enum:__anoneacac85b0103
ATA_DFLAG_ACPI_FAILED	drivers/block/sata_dwc.h	/^	ATA_DFLAG_ACPI_FAILED	= (1 << 6),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_ACPI_PENDING	drivers/block/sata_dwc.h	/^	ATA_DFLAG_ACPI_PENDING 	= (1 << 5),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_AN	drivers/block/sata_dwc.h	/^	ATA_DFLAG_AN		= (1 << 7),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_CDB_INTR	drivers/block/sata_dwc.h	/^	ATA_DFLAG_CDB_INTR	= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_CFG_MASK	drivers/block/sata_dwc.h	/^	ATA_DFLAG_CFG_MASK	= (1 << 12) - 1,$/;"	e	enum:__anone5f668490203
ATA_DFLAG_DETACH	drivers/block/sata_dwc.h	/^	ATA_DFLAG_DETACH	= (1 << 24),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_DETACHED	drivers/block/sata_dwc.h	/^	ATA_DFLAG_DETACHED	= (1 << 25),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_DIPM	drivers/block/sata_dwc.h	/^	ATA_DFLAG_DIPM		= (1 << 9),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_DMADIR	drivers/block/sata_dwc.h	/^	ATA_DFLAG_DMADIR	= (1 << 10),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_DUBIOUS_XFER	drivers/block/sata_dwc.h	/^	ATA_DFLAG_DUBIOUS_XFER	= (1 << 16),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_FLUSH_EXT	drivers/block/sata_dwc.h	/^	ATA_DFLAG_FLUSH_EXT	= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_HIPM	drivers/block/sata_dwc.h	/^	ATA_DFLAG_HIPM		= (1 << 8),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_INIT_MASK	drivers/block/sata_dwc.h	/^	ATA_DFLAG_INIT_MASK	= (1 << 24) - 1,$/;"	e	enum:__anone5f668490203
ATA_DFLAG_LBA	drivers/block/sata_dwc.h	/^	ATA_DFLAG_LBA		= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_LBA48	drivers/block/sata_dwc.h	/^	ATA_DFLAG_LBA48		= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_NCQ	drivers/block/sata_dwc.h	/^	ATA_DFLAG_NCQ		= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_NCQ_OFF	drivers/block/sata_dwc.h	/^	ATA_DFLAG_NCQ_OFF	= (1 << 13),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_PIO	drivers/block/sata_dwc.h	/^	ATA_DFLAG_PIO		= (1 << 12),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_SLEEPING	drivers/block/sata_dwc.h	/^	ATA_DFLAG_SLEEPING	= (1 << 15),$/;"	e	enum:__anone5f668490203
ATA_DFLAG_SPUNDOWN	drivers/block/sata_dwc.h	/^	ATA_DFLAG_SPUNDOWN	= (1 << 14),$/;"	e	enum:__anone5f668490203
ATA_DMA_ACTIVE	include/libata.h	/^	ATA_DMA_ACTIVE		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATA_DMA_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ATA_DMA_BASE_ADDR /;"	d
ATA_DMA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ATA_DMA_BASE_ADDR	/;"	d
ATA_DMA_CMD	include/libata.h	/^	ATA_DMA_CMD		= 0,$/;"	e	enum:__anoneacac85b0103
ATA_DMA_ERR	include/libata.h	/^	ATA_DMA_ERR		= (1 << 1),$/;"	e	enum:__anoneacac85b0103
ATA_DMA_INTR	include/libata.h	/^	ATA_DMA_INTR		= (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_DMA_MASK_ATA	drivers/block/sata_dwc.h	/^	ATA_DMA_MASK_ATA	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_DMA_MASK_ATAPI	drivers/block/sata_dwc.h	/^	ATA_DMA_MASK_ATAPI	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_DMA_MASK_CFA	drivers/block/sata_dwc.h	/^	ATA_DMA_MASK_CFA	= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_DMA_PAD_SZ	drivers/block/sata_dwc.h	/^	ATA_DMA_PAD_SZ		= 4,$/;"	e	enum:__anone5f668490203
ATA_DMA_START	include/libata.h	/^	ATA_DMA_START		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATA_DMA_STATUS	include/libata.h	/^	ATA_DMA_STATUS		= 2,$/;"	e	enum:__anoneacac85b0103
ATA_DMA_TABLE_OFS	include/libata.h	/^	ATA_DMA_TABLE_OFS	= 4,$/;"	e	enum:__anoneacac85b0103
ATA_DMA_WR	include/libata.h	/^	ATA_DMA_WR		= (1 << 3),$/;"	e	enum:__anoneacac85b0103
ATA_DNXFER_40C	drivers/block/sata_dwc.h	/^	ATA_DNXFER_40C		= 2,$/;"	e	enum:__anone5f668490103
ATA_DNXFER_DMA	drivers/block/sata_dwc.h	/^	ATA_DNXFER_DMA		= 1,$/;"	e	enum:__anone5f668490103
ATA_DNXFER_FORCE_PIO	drivers/block/sata_dwc.h	/^	ATA_DNXFER_FORCE_PIO	= 3,$/;"	e	enum:__anone5f668490103
ATA_DNXFER_FORCE_PIO0	drivers/block/sata_dwc.h	/^	ATA_DNXFER_FORCE_PIO0	= 4,$/;"	e	enum:__anone5f668490103
ATA_DNXFER_PIO	drivers/block/sata_dwc.h	/^	ATA_DNXFER_PIO		= 0,$/;"	e	enum:__anone5f668490103
ATA_DNXFER_QUIET	drivers/block/sata_dwc.h	/^	ATA_DNXFER_QUIET	= (1 << 31),$/;"	e	enum:__anone5f668490103
ATA_DRDY	include/libata.h	/^	ATA_DRDY		= (1 << 6),	\/* device ready *\/$/;"	e	enum:__anoneacac85b0103
ATA_DRIVE_READY	include/ata.h	/^#define ATA_DRIVE_READY	/;"	d
ATA_DRQ	include/libata.h	/^	ATA_DRQ			= (1 << 3),	\/* data request i\/o *\/$/;"	e	enum:__anoneacac85b0103
ATA_EHI_DID_HARDRESET	drivers/block/sata_dwc.h	/^	ATA_EHI_DID_HARDRESET	= (1 << 17),$/;"	e	enum:__anone5f668490203
ATA_EHI_DID_RESET	drivers/block/sata_dwc.h	/^	ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,$/;"	e	enum:__anone5f668490203
ATA_EHI_DID_SOFTRESET	drivers/block/sata_dwc.h	/^	ATA_EHI_DID_SOFTRESET	= (1 << 16),$/;"	e	enum:__anone5f668490203
ATA_EHI_HOTPLUGGED	drivers/block/sata_dwc.h	/^	ATA_EHI_HOTPLUGGED	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_EHI_NO_AUTOPSY	drivers/block/sata_dwc.h	/^	ATA_EHI_NO_AUTOPSY	= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_EHI_POST_SETMODE	drivers/block/sata_dwc.h	/^	ATA_EHI_POST_SETMODE	= (1 << 20),$/;"	e	enum:__anone5f668490203
ATA_EHI_PRINTINFO	drivers/block/sata_dwc.h	/^	ATA_EHI_PRINTINFO	= (1 << 18),$/;"	e	enum:__anone5f668490203
ATA_EHI_QUIET	drivers/block/sata_dwc.h	/^	ATA_EHI_QUIET		= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_EHI_RESET_MODIFIER_MASK	drivers/block/sata_dwc.h	/^	ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,$/;"	e	enum:__anone5f668490203
ATA_EHI_RESUME_LINK	drivers/block/sata_dwc.h	/^	ATA_EHI_RESUME_LINK	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_EHI_SETMODE	drivers/block/sata_dwc.h	/^	ATA_EHI_SETMODE		= (1 << 19),$/;"	e	enum:__anone5f668490203
ATA_EH_DESC_LEN	drivers/block/sata_dwc.h	/^	ATA_EH_DESC_LEN		= 80,$/;"	e	enum:__anone5f668490203
ATA_EH_DEV_TRIES	drivers/block/sata_dwc.h	/^	ATA_EH_DEV_TRIES	= 3,$/;"	e	enum:__anone5f668490203
ATA_EH_ENABLE_LINK	drivers/block/sata_dwc.h	/^	ATA_EH_ENABLE_LINK	= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_EH_HARDRESET	drivers/block/sata_dwc.h	/^	ATA_EH_HARDRESET	= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_EH_LPM	drivers/block/sata_dwc.h	/^	ATA_EH_LPM		= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_EH_MAX_TRIES	drivers/block/sata_dwc.h	/^	ATA_EH_MAX_TRIES	= 5,$/;"	e	enum:__anone5f668490203
ATA_EH_PERDEV_MASK	drivers/block/sata_dwc.h	/^	ATA_EH_PERDEV_MASK	= ATA_EH_REVALIDATE,$/;"	e	enum:__anone5f668490203
ATA_EH_PMP_LINK_TRIES	drivers/block/sata_dwc.h	/^	ATA_EH_PMP_LINK_TRIES	= 3,$/;"	e	enum:__anone5f668490203
ATA_EH_PMP_TRIES	drivers/block/sata_dwc.h	/^	ATA_EH_PMP_TRIES	= 5,$/;"	e	enum:__anone5f668490203
ATA_EH_RESET_MASK	drivers/block/sata_dwc.h	/^	ATA_EH_RESET_MASK	= ATA_EH_SOFTRESET | ATA_EH_HARDRESET,$/;"	e	enum:__anone5f668490203
ATA_EH_REVALIDATE	drivers/block/sata_dwc.h	/^	ATA_EH_REVALIDATE	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_EH_SOFTRESET	drivers/block/sata_dwc.h	/^	ATA_EH_SOFTRESET	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_ERING_SIZE	drivers/block/sata_dwc.h	/^	ATA_ERING_SIZE		= 32,$/;"	e	enum:__anone5f668490203
ATA_ERR	include/libata.h	/^	ATA_ERR			= (1 << 0),	\/* have an error *\/$/;"	e	enum:__anoneacac85b0103
ATA_ERROR_REG	include/ata.h	/^#define ATA_ERROR_REG	/;"	d
ATA_FLAG_ACPI_SATA	drivers/block/sata_dwc.h	/^	ATA_FLAG_ACPI_SATA	= (1 << 17),$/;"	e	enum:__anone5f668490203
ATA_FLAG_AN	drivers/block/sata_dwc.h	/^	ATA_FLAG_AN		= (1 << 18),$/;"	e	enum:__anone5f668490203
ATA_FLAG_DEBUGMSG	drivers/block/sata_dwc.h	/^	ATA_FLAG_DEBUGMSG	= (1 << 13),$/;"	e	enum:__anone5f668490203
ATA_FLAG_DISABLED	drivers/block/sata_dwc.h	/^	ATA_FLAG_DISABLED	= (1 << 23),$/;"	e	enum:__anone5f668490203
ATA_FLAG_IGN_SIMPLEX	drivers/block/sata_dwc.h	/^	ATA_FLAG_IGN_SIMPLEX	= (1 << 15),$/;"	e	enum:__anone5f668490203
ATA_FLAG_IPM	drivers/block/sata_dwc.h	/^	ATA_FLAG_IPM		= (1 << 20),$/;"	e	enum:__anone5f668490203
ATA_FLAG_MMIO	drivers/block/sata_dwc.h	/^	ATA_FLAG_MMIO		= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_FLAG_MMIO	include/ahci.h	/^#define ATA_FLAG_MMIO	/;"	d
ATA_FLAG_NCQ	drivers/block/sata_dwc.h	/^	ATA_FLAG_NCQ		= (1 << 10),$/;"	e	enum:__anone5f668490203
ATA_FLAG_NO_ATAPI	drivers/block/sata_dwc.h	/^	ATA_FLAG_NO_ATAPI	= (1 << 6),$/;"	e	enum:__anone5f668490203
ATA_FLAG_NO_ATAPI	include/ahci.h	/^#define ATA_FLAG_NO_ATAPI	/;"	d
ATA_FLAG_NO_IORDY	drivers/block/sata_dwc.h	/^	ATA_FLAG_NO_IORDY	= (1 << 16),$/;"	e	enum:__anone5f668490203
ATA_FLAG_NO_LEGACY	drivers/block/sata_dwc.h	/^	ATA_FLAG_NO_LEGACY	= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_FLAG_NO_LEGACY	include/ahci.h	/^#define ATA_FLAG_NO_LEGACY	/;"	d
ATA_FLAG_PIO_DMA	drivers/block/sata_dwc.h	/^	ATA_FLAG_PIO_DMA	= (1 << 7),$/;"	e	enum:__anone5f668490203
ATA_FLAG_PIO_DMA	include/ahci.h	/^#define ATA_FLAG_PIO_DMA	/;"	d
ATA_FLAG_PIO_LBA48	drivers/block/sata_dwc.h	/^	ATA_FLAG_PIO_LBA48	= (1 << 8),$/;"	e	enum:__anone5f668490203
ATA_FLAG_PIO_POLLING	drivers/block/sata_dwc.h	/^	ATA_FLAG_PIO_POLLING	= (1 << 9),$/;"	e	enum:__anone5f668490203
ATA_FLAG_PMP	drivers/block/sata_dwc.h	/^	ATA_FLAG_PMP		= (1 << 19),$/;"	e	enum:__anone5f668490203
ATA_FLAG_SATA	drivers/block/sata_dwc.h	/^	ATA_FLAG_SATA		= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_FLAG_SATA	include/ahci.h	/^#define ATA_FLAG_SATA	/;"	d
ATA_FLAG_SATA_RESET	drivers/block/sata_dwc.h	/^	ATA_FLAG_SATA_RESET	= (1 << 5),$/;"	e	enum:__anone5f668490203
ATA_FLAG_SATA_RESET	include/ahci.h	/^#define ATA_FLAG_SATA_RESET	/;"	d
ATA_FLAG_SLAVE_POSS	drivers/block/sata_dwc.h	/^	ATA_FLAG_SLAVE_POSS	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_FLAG_SRST	drivers/block/sata_dwc.h	/^	ATA_FLAG_SRST		= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_GET_ERR	include/ata.h	/^#define ATA_GET_ERR(/;"	d
ATA_GET_STAT	include/ata.h	/^#define ATA_GET_STAT(/;"	d
ATA_HOB	include/libata.h	/^	ATA_HOB			= (1 << 7),	\/* LBA48 selector *\/$/;"	e	enum:__anoneacac85b0103
ATA_HORKAGE_BROKEN_HPA	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_BROKEN_HPA	= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_DIAGNOSTIC	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_DIAGNOSTIC	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_HPA_SIZE	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_HPA_SIZE	= (1 << 6),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_IPM	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_IPM		= (1 << 7),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_IVB	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_IVB		= (1 << 8),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_MAX_SEC_128	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_MAX_SEC_128	= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_NODMA	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_NODMA	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_NONCQ	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_NONCQ	= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_SKIP_PM	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_SKIP_PM	= (1 << 5),$/;"	e	enum:__anone5f668490203
ATA_HORKAGE_STUCK_ERR	drivers/block/sata_dwc.h	/^	ATA_HORKAGE_STUCK_ERR	= (1 << 9),$/;"	e	enum:__anone5f668490203
ATA_HOST_SIMPLEX	drivers/block/sata_dwc.h	/^	ATA_HOST_SIMPLEX	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_HOST_STARTED	drivers/block/sata_dwc.h	/^	ATA_HOST_STARTED	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_ICRC	include/libata.h	/^	ATA_ICRC		= (1 << 7),	\/* interface CRC error *\/$/;"	e	enum:__anoneacac85b0103
ATA_IDNF	include/libata.h	/^	ATA_IDNF		= (1 << 4),	\/* ID not found *\/$/;"	e	enum:__anoneacac85b0103
ATA_ID_EIDE_DMA_MIN	include/libata.h	/^	ATA_ID_EIDE_DMA_MIN	= 65,$/;"	e	enum:__anoneacac85b0103
ATA_ID_EIDE_PIO	include/libata.h	/^	ATA_ID_EIDE_PIO		= 67,$/;"	e	enum:__anoneacac85b0103
ATA_ID_EIDE_PIO_IORDY	include/libata.h	/^	ATA_ID_EIDE_PIO_IORDY	= 68,$/;"	e	enum:__anoneacac85b0103
ATA_ID_FIELD_VALID	include/libata.h	/^	ATA_ID_FIELD_VALID	= 53,$/;"	e	enum:__anoneacac85b0103
ATA_ID_FW_REV	include/libata.h	/^	ATA_ID_FW_REV		= 23,$/;"	e	enum:__anoneacac85b0103
ATA_ID_FW_REV_LEN	include/libata.h	/^	ATA_ID_FW_REV_LEN	= 8,$/;"	e	enum:__anoneacac85b0103
ATA_ID_LBA48_SECTORS	include/libata.h	/^	ATA_ID_LBA48_SECTORS	= 100,$/;"	e	enum:__anoneacac85b0103
ATA_ID_LBA_SECTORS	include/libata.h	/^	ATA_ID_LBA_SECTORS	= 60,$/;"	e	enum:__anoneacac85b0103
ATA_ID_MAJOR_VER	include/libata.h	/^	ATA_ID_MAJOR_VER	= 80,$/;"	e	enum:__anoneacac85b0103
ATA_ID_MINOR_VER	include/libata.h	/^	ATA_ID_MINOR_VER	= 81,$/;"	e	enum:__anoneacac85b0103
ATA_ID_MWDMA_MODES	include/libata.h	/^	ATA_ID_MWDMA_MODES	= 63,$/;"	e	enum:__anoneacac85b0103
ATA_ID_OLD_PIO_MODES	include/libata.h	/^	ATA_ID_OLD_PIO_MODES	= 51,$/;"	e	enum:__anoneacac85b0103
ATA_ID_PIO4	include/libata.h	/^	ATA_ID_PIO4		= (1 << 1),$/;"	e	enum:__anoneacac85b0103
ATA_ID_PIO_MODES	include/libata.h	/^	ATA_ID_PIO_MODES	= 64,$/;"	e	enum:__anoneacac85b0103
ATA_ID_PROD	include/libata.h	/^	ATA_ID_PROD		= 27,$/;"	e	enum:__anoneacac85b0103
ATA_ID_PROD_LEN	include/libata.h	/^	ATA_ID_PROD_LEN		= 40,$/;"	e	enum:__anoneacac85b0103
ATA_ID_QUEUE_DEPTH	include/libata.h	/^	ATA_ID_QUEUE_DEPTH	= 75,$/;"	e	enum:__anoneacac85b0103
ATA_ID_SATA_CAP	include/libata.h	/^	ATA_ID_SATA_CAP		= 76,$/;"	e	enum:__anoneacac85b0103
ATA_ID_SATA_FEATURES	include/libata.h	/^	ATA_ID_SATA_FEATURES	= 78,$/;"	e	enum:__anoneacac85b0103
ATA_ID_SATA_FEATURES_EN	include/libata.h	/^	ATA_ID_SATA_FEATURES_EN	= 79,$/;"	e	enum:__anoneacac85b0103
ATA_ID_SERNO	include/libata.h	/^	ATA_ID_SERNO		= 10,$/;"	e	enum:__anoneacac85b0103
ATA_ID_SERNO_LEN	include/libata.h	/^	ATA_ID_SERNO_LEN	= 20,$/;"	e	enum:__anoneacac85b0103
ATA_ID_UDMA_MODES	include/libata.h	/^	ATA_ID_UDMA_MODES	= 88,$/;"	e	enum:__anoneacac85b0103
ATA_ID_WORDS	include/libata.h	/^	ATA_ID_WORDS		= 256,$/;"	e	enum:__anoneacac85b0103
ATA_IOC_GET_IO32	include/libata.h	/^	ATA_IOC_GET_IO32	= 0x309,$/;"	e	enum:ata_ioctls
ATA_IOC_SET_IO32	include/libata.h	/^	ATA_IOC_SET_IO32	= 0x324,$/;"	e	enum:ata_ioctls
ATA_IO_ALT	include/ata.h	/^#define ATA_IO_ALT(/;"	d
ATA_IO_DATA	include/ata.h	/^#define ATA_IO_DATA(/;"	d
ATA_IO_REG	include/ata.h	/^#define ATA_IO_REG(/;"	d
ATA_LBA	include/ata.h	/^#define ATA_LBA	/;"	d
ATA_LBA	include/libata.h	/^	ATA_LBA			= (1 << 6),	\/* LBA28 selector *\/$/;"	e	enum:__anoneacac85b0103
ATA_LBA_HIGH	include/ata.h	/^#define ATA_LBA_HIGH	/;"	d
ATA_LBA_LOW	include/ata.h	/^#define ATA_LBA_LOW	/;"	d
ATA_LBA_MID	include/ata.h	/^#define ATA_LBA_MID	/;"	d
ATA_LBA_SEL	include/ata.h	/^#define ATA_LBA_SEL	/;"	d
ATA_LFLAG_ASSUME_ATA	drivers/block/sata_dwc.h	/^	ATA_LFLAG_ASSUME_ATA		= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_LFLAG_ASSUME_CLASS	drivers/block/sata_dwc.h	/^	ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,$/;"	e	enum:__anone5f668490203
ATA_LFLAG_ASSUME_SEMB	drivers/block/sata_dwc.h	/^	ATA_LFLAG_ASSUME_SEMB		= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_LFLAG_DISABLED	drivers/block/sata_dwc.h	/^	ATA_LFLAG_DISABLED		= (1 << 6),$/;"	e	enum:__anone5f668490203
ATA_LFLAG_HRST_TO_RESUME	drivers/block/sata_dwc.h	/^	ATA_LFLAG_HRST_TO_RESUME	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_LFLAG_NO_RETRY	drivers/block/sata_dwc.h	/^	ATA_LFLAG_NO_RETRY		= (1 << 5),$/;"	e	enum:__anone5f668490203
ATA_LFLAG_NO_SRST	drivers/block/sata_dwc.h	/^	ATA_LFLAG_NO_SRST		= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_LFLAG_SKIP_D2H_BSY	drivers/block/sata_dwc.h	/^	ATA_LFLAG_SKIP_D2H_BSY		= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_LOG_SATA_NCQ	include/libata.h	/^	ATA_LOG_SATA_NCQ	= 0x10,$/;"	e	enum:__anoneacac85b0103
ATA_MASK_MWDMA	drivers/block/sata_dwc.h	/^	ATA_MASK_MWDMA	= ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA,$/;"	e	enum:ata_xfer_mask
ATA_MASK_PIO	drivers/block/sata_dwc.h	/^	ATA_MASK_PIO	= ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO,$/;"	e	enum:ata_xfer_mask
ATA_MASK_UDMA	drivers/block/sata_dwc.h	/^	ATA_MASK_UDMA	= ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA,$/;"	e	enum:ata_xfer_mask
ATA_MAX_BUS	drivers/block/sata_dwc.h	/^	ATA_MAX_BUS		= 2,$/;"	e	enum:__anone5f668490203
ATA_MAX_DEVICES	include/libata.h	/^	ATA_MAX_DEVICES		= 2,	\/* per bus\/port *\/$/;"	e	enum:__anoneacac85b0103
ATA_MAX_PORTS	drivers/block/sata_dwc.h	/^	ATA_MAX_PORTS		= 8,$/;"	e	enum:__anone5f668490203
ATA_MAX_PRD	include/libata.h	/^	ATA_MAX_PRD		= 256,	\/* we could make these 256\/256 *\/$/;"	e	enum:__anoneacac85b0103
ATA_MAX_QUEUE	drivers/block/sata_dwc.h	/^	ATA_MAX_QUEUE		= 32,$/;"	e	enum:__anone5f668490203
ATA_MAX_SECTORS	include/libata.h	/^	ATA_MAX_SECTORS		= 256,$/;"	e	enum:__anoneacac85b0103
ATA_MAX_SECTORS_128	include/libata.h	/^	ATA_MAX_SECTORS_128	= 128,$/;"	e	enum:__anoneacac85b0103
ATA_MAX_SECTORS_LBA48	include/libata.h	/^	ATA_MAX_SECTORS_LBA48	= 65535,$/;"	e	enum:__anoneacac85b0103
ATA_MAX_SECTORS_TAPE	include/libata.h	/^	ATA_MAX_SECTORS_TAPE	= 65535,$/;"	e	enum:__anoneacac85b0103
ATA_MWDMA0	include/libata.h	/^	ATA_MWDMA0		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATA_MWDMA1	include/libata.h	/^	ATA_MWDMA1		= ATA_MWDMA0 | (1 << 1),$/;"	e	enum:__anoneacac85b0103
ATA_MWDMA12_ONLY	include/libata.h	/^	ATA_MWDMA12_ONLY	= (1 << 1) | (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_MWDMA2	include/libata.h	/^	ATA_MWDMA2		= ATA_MWDMA1 | (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_MWDMA2_ONLY	include/libata.h	/^	ATA_MWDMA2_ONLY		= (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_NIEN	include/libata.h	/^	ATA_NIEN		= (1 << 1),	\/* disable-irq flag *\/$/;"	e	enum:__anoneacac85b0103
ATA_NR_MWDMA_MODES	drivers/block/sata_dwc.h	/^	ATA_NR_MWDMA_MODES	= 5,$/;"	e	enum:__anone5f668490203
ATA_NR_PIO_MODES	drivers/block/sata_dwc.h	/^	ATA_NR_PIO_MODES	= 7,$/;"	e	enum:__anone5f668490203
ATA_NR_UDMA_MODES	drivers/block/sata_dwc.h	/^	ATA_NR_UDMA_MODES	= 8,$/;"	e	enum:__anone5f668490203
ATA_OK_STAT	include/ata.h	/^#define ATA_OK_STAT(/;"	d
ATA_PCI_CTL_OFS	include/libata.h	/^	ATA_PCI_CTL_OFS		= 2,$/;"	e	enum:__anoneacac85b0103
ATA_PFLAG_EH_IN_PROGRESS	drivers/block/sata_dwc.h	/^	ATA_PFLAG_EH_IN_PROGRESS	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_EH_PENDING	drivers/block/sata_dwc.h	/^	ATA_PFLAG_EH_PENDING		= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_FROZEN	drivers/block/sata_dwc.h	/^	ATA_PFLAG_FROZEN		= (1 << 2),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_INITIALIZING	drivers/block/sata_dwc.h	/^	ATA_PFLAG_INITIALIZING		= (1 << 7),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_LOADING	drivers/block/sata_dwc.h	/^	ATA_PFLAG_LOADING		= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_PM_PENDING	drivers/block/sata_dwc.h	/^	ATA_PFLAG_PM_PENDING		= (1 << 18),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_RECOVERED	drivers/block/sata_dwc.h	/^	ATA_PFLAG_RECOVERED		= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_RESETTING	drivers/block/sata_dwc.h	/^	ATA_PFLAG_RESETTING		= (1 << 8),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_SCSI_HOTPLUG	drivers/block/sata_dwc.h	/^	ATA_PFLAG_SCSI_HOTPLUG		= (1 << 6),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_SUSPENDED	drivers/block/sata_dwc.h	/^	ATA_PFLAG_SUSPENDED		= (1 << 17),$/;"	e	enum:__anone5f668490203
ATA_PFLAG_UNLOADING	drivers/block/sata_dwc.h	/^	ATA_PFLAG_UNLOADING		= (1 << 5),$/;"	e	enum:__anone5f668490203
ATA_PIO0	include/libata.h	/^	ATA_PIO0		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATA_PIO1	include/libata.h	/^	ATA_PIO1		= ATA_PIO0 | (1 << 1),$/;"	e	enum:__anoneacac85b0103
ATA_PIO2	include/libata.h	/^	ATA_PIO2		= ATA_PIO1 | (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_PIO3	include/libata.h	/^	ATA_PIO3		= ATA_PIO2 | (1 << 3),$/;"	e	enum:__anoneacac85b0103
ATA_PIO4	include/libata.h	/^	ATA_PIO4		= ATA_PIO3 | (1 << 4),$/;"	e	enum:__anoneacac85b0103
ATA_PIO5	include/libata.h	/^	ATA_PIO5		= ATA_PIO4 | (1 << 5),$/;"	e	enum:__anoneacac85b0103
ATA_PIO6	include/libata.h	/^	ATA_PIO6		= ATA_PIO5 | (1 << 6),$/;"	e	enum:__anoneacac85b0103
ATA_PRD_EOT	include/libata.h	/^	ATA_PRD_EOT		= (1 << 31),	\/* end-of-table flag *\/$/;"	e	enum:__anoneacac85b0103
ATA_PRD_SZ	include/libata.h	/^	ATA_PRD_SZ		= 8,$/;"	e	enum:__anoneacac85b0103
ATA_PRD_TBL_SZ	include/libata.h	/^	ATA_PRD_TBL_SZ		= (ATA_MAX_PRD * ATA_PRD_SZ),$/;"	e	enum:__anoneacac85b0103
ATA_PROBE_MAX_TRIES	drivers/block/sata_dwc.h	/^	ATA_PROBE_MAX_TRIES	= 3,$/;"	e	enum:__anone5f668490203
ATA_PROT_DMA	include/libata.h	/^	ATA_PROT_DMA,		\/* DMA *\/$/;"	e	enum:ata_tf_protocols
ATA_PROT_FLAG_ATAPI	include/libata.h	/^	ATA_PROT_FLAG_ATAPI	= (1 << 3), \/* is ATAPI *\/$/;"	e	enum:__anoneacac85b0103
ATA_PROT_FLAG_DATA	include/libata.h	/^	ATA_PROT_FLAG_DATA	= ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,$/;"	e	enum:__anoneacac85b0103
ATA_PROT_FLAG_DMA	include/libata.h	/^	ATA_PROT_FLAG_DMA	= (1 << 1), \/* is DMA *\/$/;"	e	enum:__anoneacac85b0103
ATA_PROT_FLAG_NCQ	include/libata.h	/^	ATA_PROT_FLAG_NCQ	= (1 << 2), \/* is NCQ *\/$/;"	e	enum:__anoneacac85b0103
ATA_PROT_FLAG_PIO	include/libata.h	/^	ATA_PROT_FLAG_PIO	= (1 << 0), \/* is PIO *\/$/;"	e	enum:__anoneacac85b0103
ATA_PROT_NCQ	include/libata.h	/^	ATA_PROT_NCQ,		\/* NCQ *\/$/;"	e	enum:ata_tf_protocols
ATA_PROT_NODATA	include/libata.h	/^	ATA_PROT_NODATA,	\/* no data *\/$/;"	e	enum:ata_tf_protocols
ATA_PROT_PIO	include/libata.h	/^	ATA_PROT_PIO,		\/* PIO data xfer *\/$/;"	e	enum:ata_tf_protocols
ATA_PROT_UNKNOWN	include/libata.h	/^	ATA_PROT_UNKNOWN,	\/* unknown\/invalid *\/$/;"	e	enum:ata_tf_protocols
ATA_QCFLAG_ACTIVE	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_ACTIVE	= (1 << 0),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_CLEAR_EXCL	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_CLEAR_EXCL	= (1 << 5),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_DMAMAP	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_DMAMAP	= (1 << 1),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_EH_SCHEDULED	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_EH_SCHEDULED	= (1 << 18),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_FAILED	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_FAILED	= (1 << 16),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_IO	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_IO		= (1 << 3),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_QUIET	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_QUIET	= (1 << 6),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_RESULT_TF	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_RESULT_TF	= (1 << 4),$/;"	e	enum:__anone5f668490203
ATA_QCFLAG_SENSE_VALID	drivers/block/sata_dwc.h	/^	ATA_QCFLAG_SENSE_VALID	= (1 << 17),$/;"	e	enum:__anone5f668490203
ATA_READID_POSTRESET	drivers/block/sata_dwc.h	/^	ATA_READID_POSTRESET	= (1 << 0),$/;"	e	enum:__anone5f668490103
ATA_REG_ALTSTATUS	drivers/block/pata_bfin.h	/^#define ATA_REG_ALTSTATUS	/;"	d
ATA_REG_BYTEH	include/libata.h	/^	ATA_REG_BYTEH		= ATA_REG_LBAH,$/;"	e	enum:__anoneacac85b0103
ATA_REG_BYTEL	include/libata.h	/^	ATA_REG_BYTEL		= ATA_REG_LBAM,$/;"	e	enum:__anoneacac85b0103
ATA_REG_CMD	include/libata.h	/^	ATA_REG_CMD		= ATA_REG_STATUS,$/;"	e	enum:__anoneacac85b0103
ATA_REG_CTRL	drivers/block/pata_bfin.h	/^#define ATA_REG_CTRL	/;"	d
ATA_REG_DATA	include/libata.h	/^	ATA_REG_DATA		= 0x00,$/;"	e	enum:__anoneacac85b0103
ATA_REG_DEVICE	include/libata.h	/^	ATA_REG_DEVICE		= 0x06,$/;"	e	enum:__anoneacac85b0103
ATA_REG_DEVSEL	include/libata.h	/^	ATA_REG_DEVSEL		= ATA_REG_DEVICE,$/;"	e	enum:__anoneacac85b0103
ATA_REG_ERR	include/libata.h	/^	ATA_REG_ERR		= 0x01,$/;"	e	enum:__anoneacac85b0103
ATA_REG_FEATURE	include/libata.h	/^	ATA_REG_FEATURE		= ATA_REG_ERR, \/* and their aliases *\/$/;"	e	enum:__anoneacac85b0103
ATA_REG_IRQ	include/libata.h	/^	ATA_REG_IRQ		= ATA_REG_NSECT,$/;"	e	enum:__anoneacac85b0103
ATA_REG_LBAH	include/libata.h	/^	ATA_REG_LBAH		= 0x05,$/;"	e	enum:__anoneacac85b0103
ATA_REG_LBAL	include/libata.h	/^	ATA_REG_LBAL		= 0x03,$/;"	e	enum:__anoneacac85b0103
ATA_REG_LBAM	include/libata.h	/^	ATA_REG_LBAM		= 0x04,$/;"	e	enum:__anoneacac85b0103
ATA_REG_NSECT	include/libata.h	/^	ATA_REG_NSECT		= 0x02,$/;"	e	enum:__anoneacac85b0103
ATA_REG_STATUS	include/libata.h	/^	ATA_REG_STATUS		= 0x07,$/;"	e	enum:__anoneacac85b0103
ATA_RESET_TIME	include/ata.h	/^#define ATA_RESET_TIME	/;"	d
ATA_RESET_TIME	include/configs/MPC8349ITX.h	/^#define ATA_RESET_TIME	/;"	d
ATA_SECTORWORDS	include/ata.h	/^#define ATA_SECTORWORDS	/;"	d
ATA_SECTOR_WORDS	drivers/block/pata_bfin.c	/^#define ATA_SECTOR_WORDS /;"	d	file:
ATA_SECTOR_WORDS	drivers/block/sata_sil.c	/^#define ATA_SECTOR_WORDS /;"	d	file:
ATA_SECTOR_WORDS	drivers/block/sata_sil3114.c	/^#define ATA_SECTOR_WORDS /;"	d	file:
ATA_SECTOR_WORDS	include/configs/canyonlands.h	/^#define ATA_SECTOR_WORDS /;"	d
ATA_SECT_CNT	include/ata.h	/^#define ATA_SECT_CNT	/;"	d
ATA_SECT_NUM	include/ata.h	/^#define ATA_SECT_NUM	/;"	d
ATA_SECT_SIZE	include/libata.h	/^	ATA_SECT_SIZE		= 512,$/;"	e	enum:__anoneacac85b0103
ATA_SET_MAX_ADDR	include/libata.h	/^	ATA_SET_MAX_ADDR	= 0x00,$/;"	e	enum:__anoneacac85b0103
ATA_SET_MAX_FREEZE_LOCK	include/libata.h	/^	ATA_SET_MAX_FREEZE_LOCK	= 0x04,$/;"	e	enum:__anoneacac85b0103
ATA_SET_MAX_LOCK	include/libata.h	/^	ATA_SET_MAX_LOCK	= 0x02,$/;"	e	enum:__anoneacac85b0103
ATA_SET_MAX_PASSWD	include/libata.h	/^	ATA_SET_MAX_PASSWD	= 0x01,$/;"	e	enum:__anoneacac85b0103
ATA_SET_MAX_UNLOCK	include/libata.h	/^	ATA_SET_MAX_UNLOCK	= 0x03,$/;"	e	enum:__anoneacac85b0103
ATA_SHIFT_MWDMA	drivers/block/sata_dwc.h	/^	ATA_SHIFT_MWDMA		= ATA_SHIFT_PIO + ATA_NR_PIO_MODES,$/;"	e	enum:__anone5f668490203
ATA_SHIFT_PIO	drivers/block/sata_dwc.h	/^	ATA_SHIFT_PIO		= 0,$/;"	e	enum:__anone5f668490203
ATA_SHIFT_UDMA	drivers/block/sata_dwc.h	/^	ATA_SHIFT_UDMA		= ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES,$/;"	e	enum:__anone5f668490203
ATA_SHORT_PAUSE	drivers/block/sata_dwc.h	/^#define	ATA_SHORT_PAUSE	/;"	d
ATA_SHT_CMD_PER_LUN	drivers/block/sata_dwc.h	/^	ATA_SHT_CMD_PER_LUN	= 1,$/;"	e	enum:__anone5f668490203
ATA_SHT_EMULATED	drivers/block/sata_dwc.h	/^	ATA_SHT_EMULATED	= 1,$/;"	e	enum:__anone5f668490203
ATA_SHT_THIS_ID	drivers/block/sata_dwc.h	/^	ATA_SHT_THIS_ID		= -1,$/;"	e	enum:__anone5f668490203
ATA_SHT_USE_CLUSTERING	drivers/block/sata_dwc.h	/^	ATA_SHT_USE_CLUSTERING	= 1,$/;"	e	enum:__anone5f668490203
ATA_SRST	include/libata.h	/^	ATA_SRST		= (1 << 2),	\/* software reset *\/$/;"	e	enum:__anoneacac85b0103
ATA_STATUS	include/ata.h	/^#define ATA_STATUS	/;"	d
ATA_STAT_BUSY	include/ata.h	/^#define ATA_STAT_BUSY	/;"	d
ATA_STAT_CORR	include/ata.h	/^#define ATA_STAT_CORR	/;"	d
ATA_STAT_DRQ	include/ata.h	/^#define ATA_STAT_DRQ	/;"	d
ATA_STAT_ERR	include/ata.h	/^#define ATA_STAT_ERR	/;"	d
ATA_STAT_FAULT	include/ata.h	/^#define ATA_STAT_FAULT	/;"	d
ATA_STAT_INDEX	include/ata.h	/^#define ATA_STAT_INDEX	/;"	d
ATA_STAT_READY	include/ata.h	/^#define ATA_STAT_READY	/;"	d
ATA_STAT_SEEK	include/ata.h	/^#define ATA_STAT_SEEK	/;"	d
ATA_SWDMA0	include/libata.h	/^	ATA_SWDMA0		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATA_SWDMA1	include/libata.h	/^	ATA_SWDMA1		= ATA_SWDMA0 | (1 << 1),$/;"	e	enum:__anoneacac85b0103
ATA_SWDMA2	include/libata.h	/^	ATA_SWDMA2		= ATA_SWDMA1 | (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_SWDMA2_ONLY	include/libata.h	/^	ATA_SWDMA2_ONLY		= (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_TAG_INTERNAL	drivers/block/sata_dwc.h	/^	ATA_TAG_INTERNAL	= ATA_MAX_QUEUE - 1,$/;"	e	enum:__anone5f668490203
ATA_TAG_POISON	drivers/block/sata_dwc.h	/^#define ATA_TAG_POISON	/;"	d
ATA_TFLAG_DEVICE	include/libata.h	/^	ATA_TFLAG_DEVICE	= (1 << 2), \/* enable r\/w to device reg *\/$/;"	e	enum:__anoneacac85b0103
ATA_TFLAG_FUA	include/libata.h	/^	ATA_TFLAG_FUA		= (1 << 5), \/* enable FUA *\/$/;"	e	enum:__anoneacac85b0103
ATA_TFLAG_ISADDR	include/libata.h	/^	ATA_TFLAG_ISADDR	= (1 << 1), \/* enable r\/w to nsect\/lba regs *\/$/;"	e	enum:__anoneacac85b0103
ATA_TFLAG_LBA	include/libata.h	/^	ATA_TFLAG_LBA		= (1 << 4), \/* enable LBA *\/$/;"	e	enum:__anoneacac85b0103
ATA_TFLAG_LBA48	include/libata.h	/^	ATA_TFLAG_LBA48		= (1 << 0), \/* enable 48-bit LBA and "HOB" *\/$/;"	e	enum:__anoneacac85b0103
ATA_TFLAG_POLLING	include/libata.h	/^	ATA_TFLAG_POLLING	= (1 << 6), \/* set nIEN to 1 and use polling *\/$/;"	e	enum:__anoneacac85b0103
ATA_TFLAG_WRITE	include/libata.h	/^	ATA_TFLAG_WRITE		= (1 << 3), \/* data dir: host->dev==1 (write) *\/$/;"	e	enum:__anoneacac85b0103
ATA_TMOUT_BOOT	drivers/block/pata_bfin.h	/^#define ATA_TMOUT_BOOT	/;"	d
ATA_TMOUT_BOOT	drivers/block/sata_dwc.h	/^	ATA_TMOUT_BOOT			= 30 * 100,$/;"	e	enum:__anone5f668490203
ATA_TMOUT_BOOT_QUICK	drivers/block/pata_bfin.h	/^#define ATA_TMOUT_BOOT_QUICK	/;"	d
ATA_TMOUT_BOOT_QUICK	drivers/block/sata_dwc.h	/^	ATA_TMOUT_BOOT_QUICK		= 7 * 100,$/;"	e	enum:__anone5f668490203
ATA_TMOUT_FF_WAIT	drivers/block/sata_dwc.h	/^	ATA_TMOUT_FF_WAIT	= 4 * 100 \/ 5,$/;"	e	enum:__anone5f668490203
ATA_TMOUT_INTERNAL	drivers/block/sata_dwc.h	/^	ATA_TMOUT_INTERNAL		= 30 * 100,$/;"	e	enum:__anone5f668490203
ATA_TMOUT_INTERNAL_QUICK	drivers/block/sata_dwc.h	/^	ATA_TMOUT_INTERNAL_QUICK	= 5 * 100,$/;"	e	enum:__anone5f668490203
ATA_UDMA0	include/libata.h	/^	ATA_UDMA0		= (1 << 0),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA1	include/libata.h	/^	ATA_UDMA1		= ATA_UDMA0 | (1 << 1),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA2	include/libata.h	/^	ATA_UDMA2		= ATA_UDMA1 | (1 << 2),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA3	include/libata.h	/^	ATA_UDMA3		= ATA_UDMA2 | (1 << 3),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA4	include/libata.h	/^	ATA_UDMA4		= ATA_UDMA3 | (1 << 4),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA5	include/libata.h	/^	ATA_UDMA5		= ATA_UDMA4 | (1 << 5),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA6	include/libata.h	/^	ATA_UDMA6		= ATA_UDMA5 | (1 << 6),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA7	include/libata.h	/^	ATA_UDMA7		= ATA_UDMA6 | (1 << 7),$/;"	e	enum:__anoneacac85b0103
ATA_UDMA_MASK_40C	include/libata.h	/^	ATA_UDMA_MASK_40C	= ATA_UDMA2,	\/* udma0-2 *\/$/;"	e	enum:__anoneacac85b0103
ATA_UNC	include/libata.h	/^	ATA_UNC			= (1 << 6),	\/* uncorrectable media error *\/$/;"	e	enum:__anoneacac85b0103
ATB_DIV_1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define ATB_DIV_1	/;"	d
ATB_DIV_1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define ATB_DIV_1	/;"	d
ATB_DIV_2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define ATB_DIV_2	/;"	d
ATB_DIV_2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define ATB_DIV_2	/;"	d
ATB_DIV_4	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define ATB_DIV_4	/;"	d
ATB_DIV_4	arch/arm/include/asm/arch/clock_sun6i.h	/^#define ATB_DIV_4	/;"	d
ATB_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define ATB_DIV_SHIFT	/;"	d
ATB_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define ATB_DIV_SHIFT	/;"	d
ATB_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ATB_RATIO	/;"	d
ATB_RATIO	board/samsung/odroid/setup.h	/^#define ATB_RATIO(/;"	d
ATB_RATIO	board/samsung/trats/setup.h	/^#define ATB_RATIO	/;"	d
ATCLK_CORE_DIV_CON_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ATCLK_CORE_DIV_CON_MASK	= 0x1f,$/;"	e	enum:__anon3783c4e20503
ATCLK_CORE_DIV_CON_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ATCLK_CORE_DIV_CON_SHIFT = 4,$/;"	e	enum:__anon3783c4e20503
ATCLK_CORE_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define ATCLK_CORE_HZ	/;"	d
ATCLK_CORE_L_DIV_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	ATCLK_CORE_L_DIV_MASK		= 0x1f << ATCLK_CORE_L_DIV_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
ATCLK_CORE_L_DIV_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	ATCLK_CORE_L_DIV_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
ATH79_SOC_AR7130	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR7130,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR7141	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR7141,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR7161	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR7161,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR7240	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR7240,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR7241	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR7241,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR7242	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR7242,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9130	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9130,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9132	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9132,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9330	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9330,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9331	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9331,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9341	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9341,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9342	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9342,$/;"	e	enum:ath79_soc_type
ATH79_SOC_AR9344	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_AR9344,$/;"	e	enum:ath79_soc_type
ATH79_SOC_QCA9533	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_QCA9533,$/;"	e	enum:ath79_soc_type
ATH79_SOC_QCA9556	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_QCA9556,$/;"	e	enum:ath79_soc_type
ATH79_SOC_QCA9558	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_QCA9558,$/;"	e	enum:ath79_soc_type
ATH79_SOC_QCA9561	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_QCA9561,$/;"	e	enum:ath79_soc_type
ATH79_SOC_TP9343	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_TP9343,$/;"	e	enum:ath79_soc_type
ATH79_SOC_UNKNOWN	arch/mips/mach-ath79/include/mach/ath79.h	/^	ATH79_SOC_UNKNOWN,$/;"	e	enum:ath79_soc_type
ATH79_SPI	drivers/spi/Kconfig	/^config ATH79_SPI$/;"	c	menu:SPI Support
ATH79_SPI_CLK_DIV	drivers/spi/ath79_spi.c	/^#define ATH79_SPI_CLK_DIV(/;"	d	file:
ATH79_SPI_MHZ	drivers/spi/ath79_spi.c	/^#define ATH79_SPI_MHZ /;"	d	file:
ATH79_SPI_RRW_DELAY_FACTOR	drivers/spi/ath79_spi.c	/^#define ATH79_SPI_RRW_DELAY_FACTOR /;"	d	file:
ATMEL_BASE_2DGE	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_2DGE	/;"	d
ATMEL_BASE_AC97C	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_AC97C	/;"	d
ATMEL_BASE_AC97C	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_AC97C	/;"	d
ATMEL_BASE_AC97C	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_AC97C	/;"	d
ATMEL_BASE_ADC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_ADC	/;"	d
ATMEL_BASE_ADC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_ADC	/;"	d
ATMEL_BASE_ADC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_ADC	/;"	d
ATMEL_BASE_AES	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_AES	/;"	d
ATMEL_BASE_AES	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_AES	/;"	d
ATMEL_BASE_AESB	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_AESB	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AIC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_AIC	/;"	d
ATMEL_BASE_AUDIOC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_AUDIOC	/;"	d
ATMEL_BASE_AXI	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_AXI	/;"	d
ATMEL_BASE_AXI	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_AXI	/;"	d
ATMEL_BASE_BOOT	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_BOOT	/;"	d
ATMEL_BASE_CAN	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CAN	/;"	d
ATMEL_BASE_CAN0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CAN0	/;"	d
ATMEL_BASE_CAN1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CAN1	/;"	d
ATMEL_BASE_CAN1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_CAN1	/;"	d
ATMEL_BASE_CCFG	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CCFG /;"	d
ATMEL_BASE_CCFG	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CCFG	/;"	d
ATMEL_BASE_CCFG	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CCFG	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_CS0	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_CS1	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_CS2	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_CS3	/;"	d
ATMEL_BASE_CS4	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS4	/;"	d
ATMEL_BASE_CS4	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS4	/;"	d
ATMEL_BASE_CS4	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS4	/;"	d
ATMEL_BASE_CS4	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS4	/;"	d
ATMEL_BASE_CS4	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CS4	/;"	d
ATMEL_BASE_CS4	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CS4	/;"	d
ATMEL_BASE_CS5	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS5	/;"	d
ATMEL_BASE_CS5	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS5	/;"	d
ATMEL_BASE_CS5	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS5	/;"	d
ATMEL_BASE_CS5	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS5	/;"	d
ATMEL_BASE_CS5	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_CS5	/;"	d
ATMEL_BASE_CS5	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_CS5	/;"	d
ATMEL_BASE_CS6	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS6	/;"	d
ATMEL_BASE_CS6	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS6	/;"	d
ATMEL_BASE_CS6	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS6	/;"	d
ATMEL_BASE_CS6	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS6	/;"	d
ATMEL_BASE_CS7	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_CS7	/;"	d
ATMEL_BASE_CS7	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_CS7	/;"	d
ATMEL_BASE_CS7	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_CS7	/;"	d
ATMEL_BASE_CS7	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_CS7	/;"	d
ATMEL_BASE_DAC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_DAC	/;"	d
ATMEL_BASE_DAP	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_DAP	/;"	d
ATMEL_BASE_DAP	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_DAP	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DBGU	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_DBGU	/;"	d
ATMEL_BASE_DDRCS	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_DDRCS	/;"	d
ATMEL_BASE_DDRCS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_DDRCS	/;"	d
ATMEL_BASE_DDRCS	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_DDRCS	/;"	d
ATMEL_BASE_DDRSDRC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_DDRSDRC	/;"	d
ATMEL_BASE_DDRSDRC0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_DDRSDRC0	/;"	d
ATMEL_BASE_DDRSDRC1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_DDRSDRC1	/;"	d
ATMEL_BASE_DMA	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_DMA	/;"	d
ATMEL_BASE_DMA	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_DMA	/;"	d
ATMEL_BASE_DMAC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_DMAC	/;"	d
ATMEL_BASE_DMAC0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_DMAC0	/;"	d
ATMEL_BASE_DMAC0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_DMAC0	/;"	d
ATMEL_BASE_DMAC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_DMAC0	/;"	d
ATMEL_BASE_DMAC1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_DMAC1	/;"	d
ATMEL_BASE_DMAC1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_DMAC1	/;"	d
ATMEL_BASE_DMAC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_DMAC1	/;"	d
ATMEL_BASE_ECC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_ECC	/;"	d
ATMEL_BASE_ECC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_ECC	/;"	d
ATMEL_BASE_ECC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_ECC	/;"	d
ATMEL_BASE_ECC0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_ECC0	/;"	d
ATMEL_BASE_ECC1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_ECC1	/;"	d
ATMEL_BASE_EEFC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_EEFC	/;"	d
ATMEL_BASE_EHCI	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_EHCI	/;"	d
ATMEL_BASE_EHCI	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_EHCI	/;"	d
ATMEL_BASE_EHCI	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_EHCI	/;"	d
ATMEL_BASE_EHCI	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_EHCI	/;"	d
ATMEL_BASE_EHCI	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_EHCI	/;"	d
ATMEL_BASE_EMAC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_EMAC	/;"	d
ATMEL_BASE_EMAC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_EMAC	/;"	d
ATMEL_BASE_EMAC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_EMAC	/;"	d
ATMEL_BASE_EMAC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_EMAC	/;"	d
ATMEL_BASE_EMAC0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_EMAC0	/;"	d
ATMEL_BASE_EMAC0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_EMAC0	/;"	d
ATMEL_BASE_EMAC1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_EMAC1	/;"	d
ATMEL_BASE_FLASH	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_FLASH	/;"	d
ATMEL_BASE_FUSE	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_FUSE	/;"	d
ATMEL_BASE_FUSE	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_FUSE	/;"	d
ATMEL_BASE_GMAC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_GMAC	/;"	d
ATMEL_BASE_GMAC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_GMAC	/;"	d
ATMEL_BASE_GMAC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_GMAC0	/;"	d
ATMEL_BASE_GMAC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_GMAC1	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_GPBR	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_GPBR	/;"	d
ATMEL_BASE_HCI	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_HCI	/;"	d
ATMEL_BASE_HISI	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_HISI	/;"	d
ATMEL_BASE_HMATRIX	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_HMATRIX	/;"	d
ATMEL_BASE_HSDRAMC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_HSDRAMC	/;"	d
ATMEL_BASE_HSMC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_HSMC	/;"	d
ATMEL_BASE_HSMC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_HSMC	/;"	d
ATMEL_BASE_HSMCI0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_HSMCI0	/;"	d
ATMEL_BASE_HSMCI1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_HSMCI1	/;"	d
ATMEL_BASE_INTC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_INTC	/;"	d
ATMEL_BASE_ISI	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_ISI	/;"	d
ATMEL_BASE_ISI	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_ISI	/;"	d
ATMEL_BASE_ISI	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_ISI	/;"	d
ATMEL_BASE_ISI	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_ISI	/;"	d
ATMEL_BASE_ISI	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_ISI	/;"	d
ATMEL_BASE_ISI0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_ISI0	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_LCDC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_LCDC	/;"	d
ATMEL_BASE_MACB0	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_MACB0	/;"	d
ATMEL_BASE_MACB1	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_MACB1	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_MATRIX	/;"	d
ATMEL_BASE_MATRIX0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_MATRIX0	/;"	d
ATMEL_BASE_MATRIX0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_MATRIX0	/;"	d
ATMEL_BASE_MATRIX1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_MATRIX1	/;"	d
ATMEL_BASE_MATRIX1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_MATRIX1	/;"	d
ATMEL_BASE_MC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_MC	/;"	d
ATMEL_BASE_MCI	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_MCI	/;"	d
ATMEL_BASE_MCI	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_MCI	/;"	d
ATMEL_BASE_MCI	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_MCI	/;"	d
ATMEL_BASE_MCI	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_MCI	/;"	d
ATMEL_BASE_MCI0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_MCI0	/;"	d
ATMEL_BASE_MCI0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_MCI0	/;"	d
ATMEL_BASE_MCI0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_MCI0	/;"	d
ATMEL_BASE_MCI0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_MCI0	/;"	d
ATMEL_BASE_MCI1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_MCI1	/;"	d
ATMEL_BASE_MCI1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_MCI1	/;"	d
ATMEL_BASE_MCI1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_MCI1	/;"	d
ATMEL_BASE_MCI1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_MCI1	/;"	d
ATMEL_BASE_MCI2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_MCI2	/;"	d
ATMEL_BASE_MMCI	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_MMCI	/;"	d
ATMEL_BASE_MMCI	include/configs/sama5d3xek.h	/^#define ATMEL_BASE_MMCI	/;"	d
ATMEL_BASE_MMCI	include/configs/sama5d4_xplained.h	/^#define ATMEL_BASE_MMCI	/;"	d
ATMEL_BASE_MMCI	include/configs/sama5d4ek.h	/^#define ATMEL_BASE_MMCI	/;"	d
ATMEL_BASE_MMCI	include/configs/vinco.h	/^#define ATMEL_BASE_MMCI	/;"	d
ATMEL_BASE_MPDDRC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_MPDDRC	/;"	d
ATMEL_BASE_MPDDRC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_MPDDRC	/;"	d
ATMEL_BASE_MPDDRC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_MPDDRC	/;"	d
ATMEL_BASE_NFC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_NFC	/;"	d
ATMEL_BASE_OHCI	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_OHCI	/;"	d
ATMEL_BASE_OHCI	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_OHCI	/;"	d
ATMEL_BASE_OHCI	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_OHCI	/;"	d
ATMEL_BASE_OHCI	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_OHCI	/;"	d
ATMEL_BASE_PIO	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_PIO	/;"	d
ATMEL_BASE_PIO	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_PIO	/;"	d
ATMEL_BASE_PIO	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_PIO	/;"	d
ATMEL_BASE_PIO	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIO	/;"	d
ATMEL_BASE_PIO	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIO	/;"	d
ATMEL_BASE_PIO	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PIO	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOA	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PIOA	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOB	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PIOB	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOC	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PIOC	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOD	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PIOD	/;"	d
ATMEL_BASE_PIOE	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIOE	/;"	d
ATMEL_BASE_PIOE	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIOE	/;"	d
ATMEL_BASE_PIOE	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PIOE	/;"	d
ATMEL_BASE_PIOE	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PIOE	/;"	d
ATMEL_BASE_PIOE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PIOE	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PIT	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PIT	/;"	d
ATMEL_BASE_PKCC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PKCC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PMC	/;"	d
ATMEL_BASE_PMECC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PMECC	/;"	d
ATMEL_BASE_PMECC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PMECC	/;"	d
ATMEL_BASE_PMECC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PMECC	/;"	d
ATMEL_BASE_PMECC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PMECC	/;"	d
ATMEL_BASE_PMERRLOC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PMERRLOC	/;"	d
ATMEL_BASE_PMERRLOC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_PMERRLOC	/;"	d
ATMEL_BASE_PMERRLOC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PMERRLOC	/;"	d
ATMEL_BASE_PMERRLOC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PMERRLOC	/;"	d
ATMEL_BASE_PSIF	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PSIF	/;"	d
ATMEL_BASE_PWM	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_PWM	/;"	d
ATMEL_BASE_PWM	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_PWM	/;"	d
ATMEL_BASE_PWMC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_PWMC	/;"	d
ATMEL_BASE_PWMC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_PWMC	/;"	d
ATMEL_BASE_PWMC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_PWMC	/;"	d
ATMEL_BASE_PWMC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_PWMC	/;"	d
ATMEL_BASE_PWMC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_PWMC	/;"	d
ATMEL_BASE_QSPI0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_QSPI0	/;"	d
ATMEL_BASE_QSPI0_AES_MEM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_QSPI0_AES_MEM	/;"	d
ATMEL_BASE_QSPI0_MEM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_QSPI0_MEM	/;"	d
ATMEL_BASE_QSPI1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_QSPI1	/;"	d
ATMEL_BASE_QSPI1_AES_MEM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_QSPI1_AES_MEM	/;"	d
ATMEL_BASE_QSPI1_MEM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_QSPI1_MEM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_ROM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_ROM	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RSTC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_RSTC	/;"	d
ATMEL_BASE_RTC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_RTC	/;"	d
ATMEL_BASE_RTC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_RTC	/;"	d
ATMEL_BASE_RTC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_RTC	/;"	d
ATMEL_BASE_RTC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_RTC	/;"	d
ATMEL_BASE_RTC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_RTC	/;"	d
ATMEL_BASE_RTC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_RTC	/;"	d
ATMEL_BASE_RTT	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_RTT	/;"	d
ATMEL_BASE_RTT	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_RTT	/;"	d
ATMEL_BASE_RTT	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_RTT	/;"	d
ATMEL_BASE_RTT	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_RTT	/;"	d
ATMEL_BASE_RTT0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_RTT0	/;"	d
ATMEL_BASE_RTT1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_RTT1	/;"	d
ATMEL_BASE_SCC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_SCC	/;"	d
ATMEL_BASE_SCKC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SCKC	/;"	d
ATMEL_BASE_SCKCR	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SCKCR	/;"	d
ATMEL_BASE_SCKCR	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SCKCR	/;"	d
ATMEL_BASE_SCKCR	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SCKCR	/;"	d
ATMEL_BASE_SDMMC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SDMMC0	/;"	d
ATMEL_BASE_SDMMC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SDMMC1	/;"	d
ATMEL_BASE_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SDRAMC	/;"	d
ATMEL_BASE_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SDRAMC	/;"	d
ATMEL_BASE_SDRAMC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SDRAMC	/;"	d
ATMEL_BASE_SDRAMC0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SDRAMC0	/;"	d
ATMEL_BASE_SDRAMC1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SDRAMC1	/;"	d
ATMEL_BASE_SFR	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SFR	/;"	d
ATMEL_BASE_SFR	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SFR	/;"	d
ATMEL_BASE_SFR	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SFR	/;"	d
ATMEL_BASE_SHA	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SHA	/;"	d
ATMEL_BASE_SHA	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SHA	/;"	d
ATMEL_BASE_SHDWC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SHDWC	/;"	d
ATMEL_BASE_SHDWC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SHDWC	/;"	d
ATMEL_BASE_SHDWC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SHDWC	/;"	d
ATMEL_BASE_SHDWC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SHDWC	/;"	d
ATMEL_BASE_SHDWN	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SHDWN	/;"	d
ATMEL_BASE_SHDWN	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SHDWN	/;"	d
ATMEL_BASE_SHDWN	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SHDWN	/;"	d
ATMEL_BASE_SHDWN	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SHDWN	/;"	d
ATMEL_BASE_SM	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_SM	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SMC	/;"	d
ATMEL_BASE_SMC0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SMC0	/;"	d
ATMEL_BASE_SMC1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SMC1	/;"	d
ATMEL_BASE_SMD	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SMD	/;"	d
ATMEL_BASE_SMD	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SMD	/;"	d
ATMEL_BASE_SMD	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SMD	/;"	d
ATMEL_BASE_SPI	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_SPI	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI0	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_SPI0	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI1	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_SPI1	/;"	d
ATMEL_BASE_SPI2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SPI2	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SRAM	/;"	d
ATMEL_BASE_SRAM0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_SRAM0	/;"	d
ATMEL_BASE_SRAM0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SRAM0	/;"	d
ATMEL_BASE_SRAM0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SRAM0	/;"	d
ATMEL_BASE_SRAM1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_SRAM1	/;"	d
ATMEL_BASE_SRAM1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SRAM1	/;"	d
ATMEL_BASE_SRAM1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SRAM1	/;"	d
ATMEL_BASE_SSC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SSC	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC0	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_SSC0	/;"	d
ATMEL_BASE_SSC1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC1	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_SSC1	/;"	d
ATMEL_BASE_SSC2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SSC2	/;"	d
ATMEL_BASE_SSC2	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_SSC2	/;"	d
ATMEL_BASE_ST	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_ST	/;"	d
ATMEL_BASE_SYS	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_SYS	/;"	d
ATMEL_BASE_SYS	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_SYS	/;"	d
ATMEL_BASE_SYS	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_SYS	/;"	d
ATMEL_BASE_SYS	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_SYS	/;"	d
ATMEL_BASE_SYS	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_SYS	/;"	d
ATMEL_BASE_SYS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_SYS	/;"	d
ATMEL_BASE_SYSC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_SYSC	/;"	d
ATMEL_BASE_TC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_TC	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TC0	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TC1	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TC2	/;"	d
ATMEL_BASE_TC3	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TC3	/;"	d
ATMEL_BASE_TC3	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TC3	/;"	d
ATMEL_BASE_TC3	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TC3	/;"	d
ATMEL_BASE_TC3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TC3	/;"	d
ATMEL_BASE_TC4	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TC4	/;"	d
ATMEL_BASE_TC4	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TC4	/;"	d
ATMEL_BASE_TC4	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TC4	/;"	d
ATMEL_BASE_TC5	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TC5	/;"	d
ATMEL_BASE_TC5	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TC5	/;"	d
ATMEL_BASE_TC5	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TC5	/;"	d
ATMEL_BASE_TCB0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TCB0	/;"	d
ATMEL_BASE_TCB0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_TCB0	/;"	d
ATMEL_BASE_TCB0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_TCB0	/;"	d
ATMEL_BASE_TCB0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TCB0	/;"	d
ATMEL_BASE_TCB1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TCB1	/;"	d
ATMEL_BASE_TDES	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TDES	/;"	d
ATMEL_BASE_TDES	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TDES	/;"	d
ATMEL_BASE_TIMER0	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_TIMER0	/;"	d
ATMEL_BASE_TIMER1	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_TIMER1	/;"	d
ATMEL_BASE_TRNG	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TRNG	/;"	d
ATMEL_BASE_TRNG	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TRNG	/;"	d
ATMEL_BASE_TRNG	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TRNG	/;"	d
ATMEL_BASE_TSADC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TSADC	/;"	d
ATMEL_BASE_TSC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TSC	/;"	d
ATMEL_BASE_TSC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TSC	/;"	d
ATMEL_BASE_TWI	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_TWI	/;"	d
ATMEL_BASE_TWI	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_TWI	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI0	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_TWI0	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TWI1	/;"	d
ATMEL_BASE_TWI2	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_TWI2	/;"	d
ATMEL_BASE_TWI2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_TWI2	/;"	d
ATMEL_BASE_TWI2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TWI2	/;"	d
ATMEL_BASE_TWI3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_TWI3	/;"	d
ATMEL_BASE_UART0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_UART0	/;"	d
ATMEL_BASE_UART0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UART0	/;"	d
ATMEL_BASE_UART0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_UART0	/;"	d
ATMEL_BASE_UART0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_UART0	/;"	d
ATMEL_BASE_UART1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_UART1	/;"	d
ATMEL_BASE_UART1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UART1	/;"	d
ATMEL_BASE_UART1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_UART1	/;"	d
ATMEL_BASE_UART1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_UART1	/;"	d
ATMEL_BASE_UART2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UART2	/;"	d
ATMEL_BASE_UART3	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UART3	/;"	d
ATMEL_BASE_UART4	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UART4	/;"	d
ATMEL_BASE_UDP	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_UDP	/;"	d
ATMEL_BASE_UDP	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_UDP	/;"	d
ATMEL_BASE_UDP0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_UDP0	/;"	d
ATMEL_BASE_UDP0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_UDP0	/;"	d
ATMEL_BASE_UDPHS	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_UDPHS	/;"	d
ATMEL_BASE_UDPHS	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_UDPHS	/;"	d
ATMEL_BASE_UDPHS	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_UDPHS	/;"	d
ATMEL_BASE_UDPHS	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UDPHS	/;"	d
ATMEL_BASE_UDPHS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_UDPHS	/;"	d
ATMEL_BASE_UDPHS	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_UDPHS	/;"	d
ATMEL_BASE_UDPHS_FIFO	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_UDPHS_FIFO	/;"	d
ATMEL_BASE_UDPHS_FIFO	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_UDPHS_FIFO	/;"	d
ATMEL_BASE_UDPHS_FIFO	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_UDPHS_FIFO	/;"	d
ATMEL_BASE_UDPHS_FIFO	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_UDPHS_FIFO	/;"	d
ATMEL_BASE_UDPHS_FIFO	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_UDPHS_FIFO	/;"	d
ATMEL_BASE_UHP	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_UHP	/;"	d
ATMEL_BASE_UHP	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_UHP	/;"	d
ATMEL_BASE_USART	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_USART	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART0	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_USART0	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART1	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_USART1	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART2	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_USART2	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART3	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_USART3	/;"	d
ATMEL_BASE_USART4	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_USART4	/;"	d
ATMEL_BASE_USART4	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_USART4	/;"	d
ATMEL_BASE_USART5	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_BASE_USART5	/;"	d
ATMEL_BASE_USB	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define ATMEL_BASE_USB	/;"	d
ATMEL_BASE_VDEC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_VDEC	/;"	d
ATMEL_BASE_VDEC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_VDEC	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_WDT	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_BASE_WDT	/;"	d
ATMEL_BASE_XDMAC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_XDMAC0	/;"	d
ATMEL_BASE_XDMAC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_BASE_XDMAC1	/;"	d
ATMEL_CHIPID_CIDR	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_CHIPID_CIDR	/;"	d
ATMEL_CHIPID_CIDR	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_CHIPID_CIDR	/;"	d
ATMEL_CHIPID_CIDR	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_CHIPID_CIDR	/;"	d
ATMEL_CHIPID_CIDR_VERSION	arch/arm/mach-at91/armv7/cpu.c	/^#define ATMEL_CHIPID_CIDR_VERSION	/;"	d	file:
ATMEL_CHIPID_EXID	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_CHIPID_EXID	/;"	d
ATMEL_CHIPID_EXID	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_CHIPID_EXID	/;"	d
ATMEL_CHIPID_EXID	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_CHIPID_EXID	/;"	d
ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_CPU_NAME	/;"	d
ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91sam9261.h	/^# define ATMEL_CPU_NAME	/;"	d
ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_CPU_NAME	/;"	d
ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_CPU_NAME	/;"	d
ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_CPU_NAME	/;"	d
ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_CPU_NAME	/;"	d
ATMEL_ECC_BITADDR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_BITADDR	/;"	d
ATMEL_ECC_CR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define ATMEL_ECC_CR	/;"	d
ATMEL_ECC_ECCERR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_ECCERR	/;"	d
ATMEL_ECC_MR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define ATMEL_ECC_MR	/;"	d
ATMEL_ECC_MULERR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_MULERR	/;"	d
ATMEL_ECC_NPARITY	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_NPARITY	/;"	d
ATMEL_ECC_NPR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define ATMEL_ECC_NPR	/;"	d
ATMEL_ECC_PAGESIZE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_PAGESIZE	/;"	d
ATMEL_ECC_PAGESIZE_1056	drivers/mtd/nand/atmel_nand_ecc.h	/^#define			ATMEL_ECC_PAGESIZE_1056	/;"	d
ATMEL_ECC_PAGESIZE_2112	drivers/mtd/nand/atmel_nand_ecc.h	/^#define			ATMEL_ECC_PAGESIZE_2112	/;"	d
ATMEL_ECC_PAGESIZE_4224	drivers/mtd/nand/atmel_nand_ecc.h	/^#define			ATMEL_ECC_PAGESIZE_4224	/;"	d
ATMEL_ECC_PAGESIZE_528	drivers/mtd/nand/atmel_nand_ecc.h	/^#define			ATMEL_ECC_PAGESIZE_528	/;"	d
ATMEL_ECC_PR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define ATMEL_ECC_PR	/;"	d
ATMEL_ECC_RECERR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_RECERR	/;"	d
ATMEL_ECC_RST	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_RST	/;"	d
ATMEL_ECC_SR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define ATMEL_ECC_SR	/;"	d
ATMEL_ECC_WORDADDR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		ATMEL_ECC_WORDADDR	/;"	d
ATMEL_GET_PIN_FUNC	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_GET_PIN_FUNC(/;"	d
ATMEL_GET_PIN_IOSET	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_GET_PIN_IOSET(/;"	d
ATMEL_GET_PIN_NO	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_GET_PIN_NO(/;"	d
ATMEL_ID_2DGE	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_2DGE	/;"	d
ATMEL_ID_AC97C	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_AC97C	/;"	d
ATMEL_ID_AC97C	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_AC97C	/;"	d
ATMEL_ID_AC97C	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_AC97C	/;"	d
ATMEL_ID_ACC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_ACC	/;"	d
ATMEL_ID_ADC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_ADC	/;"	d
ATMEL_ID_ADC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_ADC	/;"	d
ATMEL_ID_ADC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_ADC	/;"	d
ATMEL_ID_ADC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_ADC	/;"	d
ATMEL_ID_AES	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_AES	/;"	d
ATMEL_ID_AES	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_AES	/;"	d
ATMEL_ID_AES	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_AES	/;"	d
ATMEL_ID_AESB	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_AESB	/;"	d
ATMEL_ID_AESB	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_AESB	/;"	d
ATMEL_ID_AESTDESSHA	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_AESTDESSHA /;"	d
ATMEL_ID_AIC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_AIC	/;"	d
ATMEL_ID_AIC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_AIC	/;"	d
ATMEL_ID_AIC_IRQ	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_AIC_IRQ	/;"	d
ATMEL_ID_ARM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_ARM	/;"	d
ATMEL_ID_ARM	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_ARM	/;"	d
ATMEL_ID_ARM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_ARM	/;"	d
ATMEL_ID_CAN	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_CAN	/;"	d
ATMEL_ID_CAN0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_CAN0	/;"	d
ATMEL_ID_CAN0_INT0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_CAN0_INT0	/;"	d
ATMEL_ID_CAN0_INT1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_CAN0_INT1	/;"	d
ATMEL_ID_CAN1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_CAN1	/;"	d
ATMEL_ID_CAN1_INT0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_CAN1_INT0	/;"	d
ATMEL_ID_CAN1_INT1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_CAN1_INT1	/;"	d
ATMEL_ID_CATB	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_CATB	/;"	d
ATMEL_ID_CHIPID	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_CHIPID	/;"	d
ATMEL_ID_CLASSD	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_CLASSD	/;"	d
ATMEL_ID_DBGU	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_DBGU	/;"	d
ATMEL_ID_DBGU	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_DBGU	/;"	d
ATMEL_ID_DMA	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_DMA	/;"	d
ATMEL_ID_DMA	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_DMA	/;"	d
ATMEL_ID_DMA	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_DMA	/;"	d
ATMEL_ID_DMA0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_DMA0	/;"	d
ATMEL_ID_DMA0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_DMA0	/;"	d
ATMEL_ID_DMA1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_DMA1	/;"	d
ATMEL_ID_DMAC0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_DMAC0	/;"	d
ATMEL_ID_DMAC1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_DMAC1	/;"	d
ATMEL_ID_EMAC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_EMAC	/;"	d
ATMEL_ID_EMAC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_EMAC	/;"	d
ATMEL_ID_EMAC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_EMAC	/;"	d
ATMEL_ID_EMAC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_EMAC	/;"	d
ATMEL_ID_EMAC0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_EMAC0	/;"	d
ATMEL_ID_EMAC0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_EMAC0	/;"	d
ATMEL_ID_EMAC1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_EMAC1	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FIQ	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_FIQ	/;"	d
ATMEL_ID_FLEXCOM0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_FLEXCOM0	/;"	d
ATMEL_ID_FLEXCOM1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_FLEXCOM1	/;"	d
ATMEL_ID_FLEXCOM2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_FLEXCOM2	/;"	d
ATMEL_ID_FLEXCOM3	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_FLEXCOM3	/;"	d
ATMEL_ID_FLEXCOM4	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_FLEXCOM4	/;"	d
ATMEL_ID_FUSE	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_FUSE	/;"	d
ATMEL_ID_FUSE	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_FUSE	/;"	d
ATMEL_ID_GMAC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_GMAC	/;"	d
ATMEL_ID_GMAC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_GMAC	/;"	d
ATMEL_ID_GMAC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_GMAC0	/;"	d
ATMEL_ID_GMAC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_GMAC1	/;"	d
ATMEL_ID_GMAC_Q1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_GMAC_Q1	/;"	d
ATMEL_ID_GMAC_Q2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_GMAC_Q2	/;"	d
ATMEL_ID_HSMC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_HSMC	/;"	d
ATMEL_ID_HSMCI0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_HSMCI0	/;"	d
ATMEL_ID_HSMCI1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_HSMCI1	/;"	d
ATMEL_ID_I2SC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_I2SC0	/;"	d
ATMEL_ID_I2SC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_I2SC1	/;"	d
ATMEL_ID_ICM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_ICM	/;"	d
ATMEL_ID_ICM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_ICM	/;"	d
ATMEL_ID_IRQ	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_IRQ	/;"	d
ATMEL_ID_IRQ	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_IRQ	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_IRQ0	/;"	d
ATMEL_ID_IRQ1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ1	/;"	d
ATMEL_ID_IRQ1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_IRQ1	/;"	d
ATMEL_ID_IRQ1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_IRQ1	/;"	d
ATMEL_ID_IRQ1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_IRQ1	/;"	d
ATMEL_ID_IRQ2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ2	/;"	d
ATMEL_ID_IRQ2	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_IRQ2	/;"	d
ATMEL_ID_IRQ2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_IRQ2	/;"	d
ATMEL_ID_IRQ3	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ3	/;"	d
ATMEL_ID_IRQ4	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ4	/;"	d
ATMEL_ID_IRQ5	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ5	/;"	d
ATMEL_ID_IRQ6	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_IRQ6	/;"	d
ATMEL_ID_ISI	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_ISI	/;"	d
ATMEL_ID_ISI	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_ISI	/;"	d
ATMEL_ID_ISI	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_ISI	/;"	d
ATMEL_ID_ISI	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_ISI	/;"	d
ATMEL_ID_ISI	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_ISI	/;"	d
ATMEL_ID_ISI	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_ISI	/;"	d
ATMEL_ID_L2CC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_L2CC	/;"	d
ATMEL_ID_L2CC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_L2CC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_LCDC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_LCDC	/;"	d
ATMEL_ID_MATRIX0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_MATRIX0	/;"	d
ATMEL_ID_MATRIX0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_MATRIX0	/;"	d
ATMEL_ID_MATRIX1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_MATRIX1	/;"	d
ATMEL_ID_MATRIX1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_MATRIX1	/;"	d
ATMEL_ID_MCI	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_MCI	/;"	d
ATMEL_ID_MCI	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_MCI	/;"	d
ATMEL_ID_MCI	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_MCI	/;"	d
ATMEL_ID_MCI	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_MCI	/;"	d
ATMEL_ID_MCI0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_MCI0	/;"	d
ATMEL_ID_MCI0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_MCI0	/;"	d
ATMEL_ID_MCI0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_MCI0	/;"	d
ATMEL_ID_MCI0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_MCI0	/;"	d
ATMEL_ID_MCI1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_MCI1	/;"	d
ATMEL_ID_MCI1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_MCI1	/;"	d
ATMEL_ID_MCI1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_MCI1	/;"	d
ATMEL_ID_MCI1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_MCI1	/;"	d
ATMEL_ID_MCI2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_MCI2	/;"	d
ATMEL_ID_MPDDRC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_MPDDRC	/;"	d
ATMEL_ID_MPDDRC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_MPDDRC	/;"	d
ATMEL_ID_MPDDRC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_MPDDRC	/;"	d
ATMEL_ID_PDMIC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PDMIC	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOA	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PIOA	/;"	d
ATMEL_ID_PIOAB	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_PIOAB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOB	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PIOB	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PIOC	/;"	d
ATMEL_ID_PIOCD	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_PIOCD	/;"	d
ATMEL_ID_PIOCDE	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_PIOCDE	/;"	d
ATMEL_ID_PIOD	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_PIOD	/;"	d
ATMEL_ID_PIOD	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_PIOD	/;"	d
ATMEL_ID_PIOD	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PIOD	/;"	d
ATMEL_ID_PIOD	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PIOD	/;"	d
ATMEL_ID_PIOD	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PIOD	/;"	d
ATMEL_ID_PIODE	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_PIODE	/;"	d
ATMEL_ID_PIOE	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PIOE	/;"	d
ATMEL_ID_PIOE	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PIOE	/;"	d
ATMEL_ID_PIT	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PIT	/;"	d
ATMEL_ID_PIT	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PIT	/;"	d
ATMEL_ID_PIT	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PIT	/;"	d
ATMEL_ID_PKCC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PKCC	/;"	d
ATMEL_ID_PWM	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_PWM	/;"	d
ATMEL_ID_PWM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_PWM	/;"	d
ATMEL_ID_PWMC	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_PWMC	/;"	d
ATMEL_ID_PWMC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_PWMC	/;"	d
ATMEL_ID_PWMC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_PWMC	/;"	d
ATMEL_ID_PWMC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_PWMC	/;"	d
ATMEL_ID_PWMC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_PWMC	/;"	d
ATMEL_ID_QSPI0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_QSPI0	/;"	d
ATMEL_ID_QSPI1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_QSPI1	/;"	d
ATMEL_ID_RXLP	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_RXLP	/;"	d
ATMEL_ID_SAIC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SAIC	/;"	d
ATMEL_ID_SAIC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SAIC	/;"	d
ATMEL_ID_SBM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SBM	/;"	d
ATMEL_ID_SDMMC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SDMMC0	/;"	d
ATMEL_ID_SDMMC0_TIMER	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SDMMC0_TIMER	/;"	d
ATMEL_ID_SDMMC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SDMMC1	/;"	d
ATMEL_ID_SDMMC1_TIMER	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SDMMC1_TIMER	/;"	d
ATMEL_ID_SECUMOD	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SECUMOD	/;"	d
ATMEL_ID_SECURAM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SECURAM	/;"	d
ATMEL_ID_SECURAM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SECURAM	/;"	d
ATMEL_ID_SFC	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SFC	/;"	d
ATMEL_ID_SFC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SFC	/;"	d
ATMEL_ID_SFR	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SFR	/;"	d
ATMEL_ID_SFR	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SFR	/;"	d
ATMEL_ID_SFRBU	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SFRBU	/;"	d
ATMEL_ID_SHA	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SHA	/;"	d
ATMEL_ID_SHA	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SHA	/;"	d
ATMEL_ID_SHA	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SHA /;"	d
ATMEL_ID_SMC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SMC	/;"	d
ATMEL_ID_SMC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SMC	/;"	d
ATMEL_ID_SMD	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_SMD	/;"	d
ATMEL_ID_SMD	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SMD	/;"	d
ATMEL_ID_SMD	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SMD	/;"	d
ATMEL_ID_SPI	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_SPI	/;"	d
ATMEL_ID_SPI	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_SPI	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SPI0	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SPI1	/;"	d
ATMEL_ID_SPI2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SPI2	/;"	d
ATMEL_ID_SSC	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_SSC	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SSC0	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SSC1	/;"	d
ATMEL_ID_SSC2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_SSC2	/;"	d
ATMEL_ID_SSC2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_SSC2	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_SYS	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_SYS	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TC0	/;"	d
ATMEL_ID_TC01	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_TC01	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TC1	/;"	d
ATMEL_ID_TC2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TC2	/;"	d
ATMEL_ID_TC2	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TC2	/;"	d
ATMEL_ID_TC2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_TC2	/;"	d
ATMEL_ID_TC2	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_TC2	/;"	d
ATMEL_ID_TC2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TC2	/;"	d
ATMEL_ID_TC3	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TC3	/;"	d
ATMEL_ID_TC3	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TC3	/;"	d
ATMEL_ID_TC4	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TC4	/;"	d
ATMEL_ID_TC4	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TC4	/;"	d
ATMEL_ID_TC5	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TC5	/;"	d
ATMEL_ID_TC5	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TC5	/;"	d
ATMEL_ID_TCB	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_TCB	/;"	d
ATMEL_ID_TCB	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_TCB	/;"	d
ATMEL_ID_TDES	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_TDES	/;"	d
ATMEL_ID_TDES	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TDES	/;"	d
ATMEL_ID_TDES	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TDES	/;"	d
ATMEL_ID_TRNG	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_TRNG	/;"	d
ATMEL_ID_TRNG	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_TRNG	/;"	d
ATMEL_ID_TRNG	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_TRNG	/;"	d
ATMEL_ID_TRNG	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TRNG	/;"	d
ATMEL_ID_TRNG	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TRNG	/;"	d
ATMEL_ID_TSC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_TSC	/;"	d
ATMEL_ID_TSC	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_TSC	/;"	d
ATMEL_ID_TSC	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TSC	/;"	d
ATMEL_ID_TWI	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_TWI	/;"	d
ATMEL_ID_TWI	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_TWI	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TWI0	/;"	d
ATMEL_ID_TWI1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_ID_TWI1	/;"	d
ATMEL_ID_TWI1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_TWI1	/;"	d
ATMEL_ID_TWI1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_TWI1	/;"	d
ATMEL_ID_TWI1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_TWI1	/;"	d
ATMEL_ID_TWI1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TWI1	/;"	d
ATMEL_ID_TWI1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TWI1	/;"	d
ATMEL_ID_TWI2	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_TWI2	/;"	d
ATMEL_ID_TWI2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_TWI2	/;"	d
ATMEL_ID_TWI2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TWI2	/;"	d
ATMEL_ID_TWI3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_TWI3	/;"	d
ATMEL_ID_TWIHS0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_TWIHS0	/;"	d
ATMEL_ID_TWIHS1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_TWIHS1	/;"	d
ATMEL_ID_UART0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_UART0	/;"	d
ATMEL_ID_UART0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UART0	/;"	d
ATMEL_ID_UART0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_UART0	/;"	d
ATMEL_ID_UART0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_UART0	/;"	d
ATMEL_ID_UART1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_UART1	/;"	d
ATMEL_ID_UART1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UART1	/;"	d
ATMEL_ID_UART1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_UART1	/;"	d
ATMEL_ID_UART1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_UART1	/;"	d
ATMEL_ID_UART2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UART2	/;"	d
ATMEL_ID_UART3	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UART3	/;"	d
ATMEL_ID_UART4	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UART4	/;"	d
ATMEL_ID_UDP	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_UDP	/;"	d
ATMEL_ID_UDP	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_UDP	/;"	d
ATMEL_ID_UDP	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_UDP	/;"	d
ATMEL_ID_UDP	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_UDP	/;"	d
ATMEL_ID_UDPHS	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_UDPHS	/;"	d
ATMEL_ID_UDPHS	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_UDPHS	/;"	d
ATMEL_ID_UDPHS	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_UDPHS	/;"	d
ATMEL_ID_UDPHS	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UDPHS	/;"	d
ATMEL_ID_UDPHS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_UDPHS	/;"	d
ATMEL_ID_UDPHS	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_UDPHS	/;"	d
ATMEL_ID_UHP	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	include/configs/sama5d3_xplained.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHP	include/configs/sama5d3xek.h	/^#define ATMEL_ID_UHP	/;"	d
ATMEL_ID_UHPHS	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_UHPHS	/;"	d
ATMEL_ID_UHPHS	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_UHPHS	/;"	d
ATMEL_ID_UHPHS	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_UHPHS	/;"	d
ATMEL_ID_UHPHS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_UHPHS	/;"	d
ATMEL_ID_UHPHS	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_UHPHS	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_USART0	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_USART1	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_USART2	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_USART3	/;"	d
ATMEL_ID_USART4	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_ID_USART4	/;"	d
ATMEL_ID_USART4	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_USART4	/;"	d
ATMEL_ID_USART5	arch/arm/mach-at91/include/mach/at91sam9260.h	/^# define ATMEL_ID_USART5	/;"	d
ATMEL_ID_VDEC	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_ID_VDEC	/;"	d
ATMEL_ID_VDEC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_VDEC	/;"	d
ATMEL_ID_WDT	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_WDT	/;"	d
ATMEL_ID_WDT	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_ID_WDT	/;"	d
ATMEL_ID_WDT	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_WDT	/;"	d
ATMEL_ID_XDMAC0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_XDMAC0	/;"	d
ATMEL_ID_XDMAC1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_ID_XDMAC1	/;"	d
ATMEL_ID_XDMAC1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_ID_XDMAC1	/;"	d
ATMEL_LCDC_ADDRINC	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_ADDRINC	/;"	d
ATMEL_LCDC_ADDRINC_OFFSET	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_ADDRINC_OFFSET	/;"	d
ATMEL_LCDC_BLENGTH	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_BLENGTH	/;"	d
ATMEL_LCDC_BLENGTH_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_BLENGTH_OFFSET	/;"	d
ATMEL_LCDC_BUSY	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_BUSY	/;"	d
ATMEL_LCDC_BYPASS	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_BYPASS	/;"	d
ATMEL_LCDC_CLKMOD	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_CLKMOD	/;"	d
ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY	/;"	d
ATMEL_LCDC_CLKMOD_ALWAYSACTIVE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_CLKMOD_ALWAYSACTIVE	/;"	d
ATMEL_LCDC_CLKVAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_CLKVAL	/;"	d
ATMEL_LCDC_CLKVAL_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_CLKVAL_OFFSET	/;"	d
ATMEL_LCDC_CONTRAST_CTR	include/atmel_lcdc.h	/^#define ATMEL_LCDC_CONTRAST_CTR	/;"	d
ATMEL_LCDC_CONTRAST_VAL	include/atmel_lcdc.h	/^#define ATMEL_LCDC_CONTRAST_VAL	/;"	d
ATMEL_LCDC_CVAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_CVAL	/;"	d
ATMEL_LCDC_CVAL_DEFAULT	drivers/video/atmel_hlcdfb.c	/^#define ATMEL_LCDC_CVAL_DEFAULT	/;"	d	file:
ATMEL_LCDC_CVAL_DEFAULT	drivers/video/atmel_lcdfb.c	/^#define ATMEL_LCDC_CVAL_DEFAULT	/;"	d	file:
ATMEL_LCDC_DISTYPE	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DISTYPE	/;"	d
ATMEL_LCDC_DISTYPE_STNCOLOR	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_DISTYPE_STNCOLOR	/;"	d
ATMEL_LCDC_DISTYPE_STNMONO	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_DISTYPE_STNMONO	/;"	d
ATMEL_LCDC_DISTYPE_TFT	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_DISTYPE_TFT	/;"	d
ATMEL_LCDC_DMA2DCFG	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMA2DCFG	/;"	d
ATMEL_LCDC_DMA2DEN	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_DMA2DEN	/;"	d
ATMEL_LCDC_DMABADDR1	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMABADDR1	/;"	d
ATMEL_LCDC_DMABADDR2	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMABADDR2	/;"	d
ATMEL_LCDC_DMABUSY	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DMABUSY	/;"	d
ATMEL_LCDC_DMACON	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMACON	/;"	d
ATMEL_LCDC_DMAEN	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DMAEN	/;"	d
ATMEL_LCDC_DMAFRMADD1	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMAFRMADD1	/;"	d
ATMEL_LCDC_DMAFRMADD2	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMAFRMADD2	/;"	d
ATMEL_LCDC_DMAFRMCFG	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMAFRMCFG	/;"	d
ATMEL_LCDC_DMAFRMPT1	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMAFRMPT1	/;"	d
ATMEL_LCDC_DMAFRMPT2	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DMAFRMPT2	/;"	d
ATMEL_LCDC_DMARST	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DMARST	/;"	d
ATMEL_LCDC_DMAUPDT	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_DMAUPDT	/;"	d
ATMEL_LCDC_DMA_BURST_LEN	drivers/video/atmel_hlcdfb.c	/^#define ATMEL_LCDC_DMA_BURST_LEN	/;"	d	file:
ATMEL_LCDC_DMA_BURST_LEN	drivers/video/atmel_lcdfb.c	/^#define ATMEL_LCDC_DMA_BURST_LEN	/;"	d	file:
ATMEL_LCDC_DP1_2	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP1_2	/;"	d
ATMEL_LCDC_DP1_2_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP1_2_VAL	/;"	d
ATMEL_LCDC_DP2_3	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP2_3	/;"	d
ATMEL_LCDC_DP2_3_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP2_3_VAL	/;"	d
ATMEL_LCDC_DP3_4	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP3_4	/;"	d
ATMEL_LCDC_DP3_4_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP3_4_VAL	/;"	d
ATMEL_LCDC_DP3_5	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP3_5	/;"	d
ATMEL_LCDC_DP3_5_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP3_5_VAL	/;"	d
ATMEL_LCDC_DP4_5	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP4_5	/;"	d
ATMEL_LCDC_DP4_5_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP4_5_VAL	/;"	d
ATMEL_LCDC_DP4_7	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP4_7	/;"	d
ATMEL_LCDC_DP4_7_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP4_7_VAL	/;"	d
ATMEL_LCDC_DP5_7	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP5_7	/;"	d
ATMEL_LCDC_DP5_7_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP5_7_VAL	/;"	d
ATMEL_LCDC_DP6_7	include/atmel_lcdc.h	/^#define ATMEL_LCDC_DP6_7	/;"	d
ATMEL_LCDC_DP6_7_VAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_DP6_7_VAL	/;"	d
ATMEL_LCDC_ENA	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_ENA	/;"	d
ATMEL_LCDC_ENA_PWMDISABLE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_ENA_PWMDISABLE	/;"	d
ATMEL_LCDC_ENA_PWMENABLE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_ENA_PWMENABLE	/;"	d
ATMEL_LCDC_EOFI	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_EOFI	/;"	d
ATMEL_LCDC_FIFO	include/atmel_lcdc.h	/^#define ATMEL_LCDC_FIFO	/;"	d
ATMEL_LCDC_FIFOTH	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_FIFOTH	/;"	d
ATMEL_LCDC_FIFO_SIZE	drivers/video/atmel_hlcdfb.c	/^#define ATMEL_LCDC_FIFO_SIZE	/;"	d	file:
ATMEL_LCDC_FIFO_SIZE	drivers/video/atmel_lcdfb.c	/^#define ATMEL_LCDC_FIFO_SIZE	/;"	d	file:
ATMEL_LCDC_FRSIZE	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_FRSIZE	/;"	d
ATMEL_LCDC_GUARDT	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_GUARDT	/;"	d
ATMEL_LCDC_GUARDT_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_GUARDT_OFFSET	/;"	d
ATMEL_LCDC_GUARD_TIME	drivers/video/atmel_hlcdfb.c	/^#define ATMEL_LCDC_GUARD_TIME	/;"	d	file:
ATMEL_LCDC_GUARD_TIME	drivers/video/atmel_lcdfb.c	/^#define ATMEL_LCDC_GUARD_TIME	/;"	d	file:
ATMEL_LCDC_HBP	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HBP	/;"	d
ATMEL_LCDC_HFP	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HFP	/;"	d
ATMEL_LCDC_HFP_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HFP_OFFSET	/;"	d
ATMEL_LCDC_HOZVAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HOZVAL	/;"	d
ATMEL_LCDC_HOZVAL_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HOZVAL_OFFSET	/;"	d
ATMEL_LCDC_HPW	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HPW	/;"	d
ATMEL_LCDC_HPW_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_HPW_OFFSET	/;"	d
ATMEL_LCDC_ICR	include/atmel_lcdc.h	/^#define ATMEL_LCDC_ICR	/;"	d
ATMEL_LCDC_IDR	include/atmel_lcdc.h	/^#define ATMEL_LCDC_IDR	/;"	d
ATMEL_LCDC_IER	include/atmel_lcdc.h	/^#define ATMEL_LCDC_IER	/;"	d
ATMEL_LCDC_IFWIDTH	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_IFWIDTH	/;"	d
ATMEL_LCDC_IFWIDTH_16	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_IFWIDTH_16	/;"	d
ATMEL_LCDC_IFWIDTH_4	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_IFWIDTH_4	/;"	d
ATMEL_LCDC_IFWIDTH_8	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_IFWIDTH_8	/;"	d
ATMEL_LCDC_IMR	include/atmel_lcdc.h	/^#define ATMEL_LCDC_IMR	/;"	d
ATMEL_LCDC_INVCLK	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_INVCLK	/;"	d
ATMEL_LCDC_INVCLK_INVERTED	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVCLK_INVERTED	/;"	d
ATMEL_LCDC_INVCLK_NORMAL	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVCLK_NORMAL	/;"	d
ATMEL_LCDC_INVDVAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_INVDVAL	/;"	d
ATMEL_LCDC_INVDVAL_INVERTED	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVDVAL_INVERTED	/;"	d
ATMEL_LCDC_INVDVAL_NORMAL	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVDVAL_NORMAL	/;"	d
ATMEL_LCDC_INVFRAME	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_INVFRAME	/;"	d
ATMEL_LCDC_INVFRAME_INVERTED	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVFRAME_INVERTED	/;"	d
ATMEL_LCDC_INVFRAME_NORMAL	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVFRAME_NORMAL	/;"	d
ATMEL_LCDC_INVLINE	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_INVLINE	/;"	d
ATMEL_LCDC_INVLINE_INVERTED	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVLINE_INVERTED	/;"	d
ATMEL_LCDC_INVLINE_NORMAL	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVLINE_NORMAL	/;"	d
ATMEL_LCDC_INVVD	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_INVVD	/;"	d
ATMEL_LCDC_INVVD_INVERTED	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVVD_INVERTED	/;"	d
ATMEL_LCDC_INVVD_NORMAL	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_INVVD_NORMAL	/;"	d
ATMEL_LCDC_ISR	include/atmel_lcdc.h	/^#define ATMEL_LCDC_ISR	/;"	d
ATMEL_LCDC_LCDCON1	include/atmel_lcdc.h	/^#define ATMEL_LCDC_LCDCON1	/;"	d
ATMEL_LCDC_LCDCON2	include/atmel_lcdc.h	/^#define ATMEL_LCDC_LCDCON2	/;"	d
ATMEL_LCDC_LCDFRMCFG	include/atmel_lcdc.h	/^#define ATMEL_LCDC_LCDFRMCFG	/;"	d
ATMEL_LCDC_LINCNT	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_LINCNT	/;"	d
ATMEL_LCDC_LINEVAL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_LINEVAL	/;"	d
ATMEL_LCDC_LNI	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_LNI	/;"	d
ATMEL_LCDC_LSTLNI	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_LSTLNI	/;"	d
ATMEL_LCDC_LUT	include/atmel_hlcdc.h	/^#define ATMEL_LCDC_LUT(/;"	d
ATMEL_LCDC_LUT	include/atmel_lcdc.h	/^#define ATMEL_LCDC_LUT(/;"	d
ATMEL_LCDC_MEMOR	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_MEMOR	/;"	d
ATMEL_LCDC_MEMOR_BIG	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_MEMOR_BIG	/;"	d
ATMEL_LCDC_MEMOR_LITTLE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_MEMOR_LITTLE	/;"	d
ATMEL_LCDC_MERI	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_MERI	/;"	d
ATMEL_LCDC_MVAL	include/atmel_lcdc.h	/^#define ATMEL_LCDC_MVAL	/;"	d
ATMEL_LCDC_OWRI	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_OWRI	/;"	d
ATMEL_LCDC_PIXELOFF	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELOFF	/;"	d
ATMEL_LCDC_PIXELOFF_OFFSET	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELOFF_OFFSET	/;"	d
ATMEL_LCDC_PIXELSIZE	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_PIXELSIZE	/;"	d
ATMEL_LCDC_PIXELSIZE_1	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_1	/;"	d
ATMEL_LCDC_PIXELSIZE_16	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_16	/;"	d
ATMEL_LCDC_PIXELSIZE_2	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_2	/;"	d
ATMEL_LCDC_PIXELSIZE_24	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_24	/;"	d
ATMEL_LCDC_PIXELSIZE_32	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_32	/;"	d
ATMEL_LCDC_PIXELSIZE_4	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_4	/;"	d
ATMEL_LCDC_PIXELSIZE_8	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PIXELSIZE_8	/;"	d
ATMEL_LCDC_POL	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_POL	/;"	d
ATMEL_LCDC_POL_NEGATIVE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_POL_NEGATIVE	/;"	d
ATMEL_LCDC_POL_POSITIVE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_POL_POSITIVE	/;"	d
ATMEL_LCDC_PS	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_PS	/;"	d
ATMEL_LCDC_PS_DIV1	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PS_DIV1	/;"	d
ATMEL_LCDC_PS_DIV2	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PS_DIV2	/;"	d
ATMEL_LCDC_PS_DIV4	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PS_DIV4	/;"	d
ATMEL_LCDC_PS_DIV8	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_PS_DIV8	/;"	d
ATMEL_LCDC_PWR	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_PWR	/;"	d
ATMEL_LCDC_PWRCON	include/atmel_lcdc.h	/^#define ATMEL_LCDC_PWRCON	/;"	d
ATMEL_LCDC_SCANMOD	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_SCANMOD	/;"	d
ATMEL_LCDC_SCANMOD_DUAL	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_SCANMOD_DUAL	/;"	d
ATMEL_LCDC_SCANMOD_SINGLE	include/atmel_lcdc.h	/^#define		ATMEL_LCDC_SCANMOD_SINGLE	/;"	d
ATMEL_LCDC_TIM1	include/atmel_lcdc.h	/^#define ATMEL_LCDC_TIM1	/;"	d
ATMEL_LCDC_TIM2	include/atmel_lcdc.h	/^#define ATMEL_LCDC_TIM2	/;"	d
ATMEL_LCDC_UFLWI	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_UFLWI	/;"	d
ATMEL_LCDC_VBP	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VBP	/;"	d
ATMEL_LCDC_VBP_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VBP_OFFSET	/;"	d
ATMEL_LCDC_VFP	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VFP	/;"	d
ATMEL_LCDC_VHDLY	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VHDLY	/;"	d
ATMEL_LCDC_VHDLY_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VHDLY_OFFSET	/;"	d
ATMEL_LCDC_VPW	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VPW	/;"	d
ATMEL_LCDC_VPW_OFFSET	include/atmel_lcdc.h	/^#define	ATMEL_LCDC_VPW_OFFSET	/;"	d
ATMEL_MATRIX_WPMR_WPEN	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^#define ATMEL_MATRIX_WPMR_WPEN	/;"	d
ATMEL_MATRIX_WPMR_WPKEY	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^#define ATMEL_MATRIX_WPMR_WPKEY	/;"	d
ATMEL_MPDDRC_CR_CAS_DDR_CAS2	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_CAS_DDR_CAS2	/;"	d
ATMEL_MPDDRC_CR_CAS_DDR_CAS3	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_CAS_DDR_CAS3	/;"	d
ATMEL_MPDDRC_CR_CAS_DDR_CAS4	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_CAS_DDR_CAS4	/;"	d
ATMEL_MPDDRC_CR_CAS_DDR_CAS5	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_CAS_DDR_CAS5	/;"	d
ATMEL_MPDDRC_CR_CAS_DDR_CAS6	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_CAS_DDR_CAS6	/;"	d
ATMEL_MPDDRC_CR_CAS_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_CAS_MASK	/;"	d
ATMEL_MPDDRC_CR_DECOD_INTERLEAVED	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_DECOD_INTERLEAVED	/;"	d
ATMEL_MPDDRC_CR_DIC_DS	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_DIC_DS	/;"	d
ATMEL_MPDDRC_CR_DIS_DLL	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_DIS_DLL	/;"	d
ATMEL_MPDDRC_CR_DLL_RESET_ENABLED	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_DLL_RESET_ENABLED	/;"	d
ATMEL_MPDDRC_CR_DQMS_SHARED	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_DQMS_SHARED	/;"	d
ATMEL_MPDDRC_CR_ENRDM_ON	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_ENRDM_ON	/;"	d
ATMEL_MPDDRC_CR_NB_8BANKS	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NB_8BANKS	/;"	d
ATMEL_MPDDRC_CR_NC_COL_10	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NC_COL_10	/;"	d
ATMEL_MPDDRC_CR_NC_COL_11	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NC_COL_11	/;"	d
ATMEL_MPDDRC_CR_NC_COL_12	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NC_COL_12	/;"	d
ATMEL_MPDDRC_CR_NC_COL_9	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NC_COL_9	/;"	d
ATMEL_MPDDRC_CR_NC_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NC_MASK	/;"	d
ATMEL_MPDDRC_CR_NDQS_DISABLED	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NDQS_DISABLED	/;"	d
ATMEL_MPDDRC_CR_NR_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NR_MASK	/;"	d
ATMEL_MPDDRC_CR_NR_ROW_11	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NR_ROW_11	/;"	d
ATMEL_MPDDRC_CR_NR_ROW_12	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NR_ROW_12	/;"	d
ATMEL_MPDDRC_CR_NR_ROW_13	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NR_ROW_13	/;"	d
ATMEL_MPDDRC_CR_NR_ROW_14	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_NR_ROW_14	/;"	d
ATMEL_MPDDRC_CR_OCD_DEFAULT	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_OCD_DEFAULT	/;"	d
ATMEL_MPDDRC_CR_UNAL_SUPPORTED	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_CR_UNAL_SUPPORTED	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_105	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_105	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_35	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_35	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_43	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_43	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_52	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_52	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_70	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_70	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_110	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_110	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_37	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_37	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_44	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_44	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55	/;"	d
ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_73	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_73	/;"	d
ATMEL_MPDDRC_IO_CALIBR_EN_CALIB	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_EN_CALIB	/;"	d
ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_120	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_120	/;"	d
ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_34_3	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_34_3	/;"	d
ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_40	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_40	/;"	d
ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_48	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_48	/;"	d
ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_60	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_60	/;"	d
ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_80	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_80	/;"	d
ATMEL_MPDDRC_IO_CALIBR_RDIV	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_RDIV	/;"	d
ATMEL_MPDDRC_IO_CALIBR_TZQIO	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_TZQIO	/;"	d
ATMEL_MPDDRC_IO_CALIBR_TZQIO_	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_IO_CALIBR_TZQIO_(/;"	d
ATMEL_MPDDRC_MD_DBW_16_BITS	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_DBW_16_BITS	/;"	d
ATMEL_MPDDRC_MD_DBW_32_BITS	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_DBW_32_BITS	/;"	d
ATMEL_MPDDRC_MD_DBW_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_DBW_MASK	/;"	d
ATMEL_MPDDRC_MD_DDR2_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_DDR2_SDRAM	/;"	d
ATMEL_MPDDRC_MD_DDR3_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_DDR3_SDRAM	/;"	d
ATMEL_MPDDRC_MD_DDR_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_DDR_SDRAM	/;"	d
ATMEL_MPDDRC_MD_LPDDR3_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_LPDDR3_SDRAM	/;"	d
ATMEL_MPDDRC_MD_LPDDR_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_LPDDR_SDRAM	/;"	d
ATMEL_MPDDRC_MD_LP_SDR_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_LP_SDR_SDRAM	/;"	d
ATMEL_MPDDRC_MD_SDR_SDRAM	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MD_SDR_SDRAM	/;"	d
ATMEL_MPDDRC_MR_MODE_DEEP_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_DEEP_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_EXT_LMR_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_EXT_LMR_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_LMR_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_LMR_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_NOP_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_NOP_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_NORMAL_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_NORMAL_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_PRCGALL_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_PRCGALL_CMD	/;"	d
ATMEL_MPDDRC_MR_MODE_RFSH_CMD	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_MR_MODE_RFSH_CMD	/;"	d
ATMEL_MPDDRC_RD_DATA_PATH_NO_SHIFT	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_RD_DATA_PATH_NO_SHIFT	/;"	d
ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE	/;"	d
ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_SAMPLING	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_SAMPLING	/;"	d
ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_THREE_CYCLE	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_THREE_CYCLE	/;"	d
ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE	/;"	d
ATMEL_MPDDRC_TPR0_RDC_WRRD_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_RDC_WRRD_MASK	/;"	d
ATMEL_MPDDRC_TPR0_RDC_WRRD_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_RDC_WRRD_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TMRD_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TMRD_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TMRD_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TMRD_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TRAS_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRAS_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TRAS_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRAS_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TRCD_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRCD_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TRCD_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRCD_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TRC_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRC_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TRC_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRC_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TRP_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRP_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TRP_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRP_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TRRD_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRRD_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TRRD_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TRRD_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TWR_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TWR_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TWR_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TWR_OFFSET	/;"	d
ATMEL_MPDDRC_TPR0_TWTR_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TWTR_MASK	/;"	d
ATMEL_MPDDRC_TPR0_TWTR_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR0_TWTR_OFFSET	/;"	d
ATMEL_MPDDRC_TPR1_TRFC_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TRFC_MASK	/;"	d
ATMEL_MPDDRC_TPR1_TRFC_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TRFC_OFFSET	/;"	d
ATMEL_MPDDRC_TPR1_TXP_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TXP_MASK	/;"	d
ATMEL_MPDDRC_TPR1_TXP_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TXP_OFFSET	/;"	d
ATMEL_MPDDRC_TPR1_TXSNR_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TXSNR_MASK	/;"	d
ATMEL_MPDDRC_TPR1_TXSNR_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TXSNR_OFFSET	/;"	d
ATMEL_MPDDRC_TPR1_TXSRD_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TXSRD_MASK	/;"	d
ATMEL_MPDDRC_TPR1_TXSRD_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR1_TXSRD_OFFSET	/;"	d
ATMEL_MPDDRC_TPR2_TFAW_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TFAW_MASK	/;"	d
ATMEL_MPDDRC_TPR2_TFAW_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TFAW_OFFSET	/;"	d
ATMEL_MPDDRC_TPR2_TRPA_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TRPA_MASK	/;"	d
ATMEL_MPDDRC_TPR2_TRPA_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TRPA_OFFSET	/;"	d
ATMEL_MPDDRC_TPR2_TRTP_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TRTP_MASK	/;"	d
ATMEL_MPDDRC_TPR2_TRTP_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TRTP_OFFSET	/;"	d
ATMEL_MPDDRC_TPR2_TXARDS_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TXARDS_MASK	/;"	d
ATMEL_MPDDRC_TPR2_TXARDS_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TXARDS_OFFSET	/;"	d
ATMEL_MPDDRC_TPR2_TXARD_MASK	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TXARD_MASK	/;"	d
ATMEL_MPDDRC_TPR2_TXARD_OFFSET	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define ATMEL_MPDDRC_TPR2_TXARD_OFFSET	/;"	d
ATMEL_NAND_ECC_H	drivers/mtd/nand/atmel_nand_ecc.h	/^#define ATMEL_NAND_ECC_H$/;"	d
ATMEL_PIO4	drivers/gpio/Kconfig	/^config ATMEL_PIO4$/;"	c	menu:GPIO Support
ATMEL_PIO_BANK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_BANK(/;"	d
ATMEL_PIO_BANK_OFFSET	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_BANK_OFFSET	/;"	d
ATMEL_PIO_CFGR_EVTSEL_BOTH	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_EVTSEL_BOTH	/;"	d
ATMEL_PIO_CFGR_EVTSEL_FALLING	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_EVTSEL_FALLING	/;"	d
ATMEL_PIO_CFGR_EVTSEL_HIGH	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_EVTSEL_HIGH	/;"	d
ATMEL_PIO_CFGR_EVTSEL_LOW	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_EVTSEL_LOW	/;"	d
ATMEL_PIO_CFGR_EVTSEL_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_EVTSEL_MASK	/;"	d
ATMEL_PIO_CFGR_EVTSEL_RISING	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_EVTSEL_RISING	/;"	d
ATMEL_PIO_CFGR_FUNC_GPIO	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_GPIO	/;"	d
ATMEL_PIO_CFGR_FUNC_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_MASK	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_A	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_A	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_B	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_B	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_C	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_C	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_D	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_D	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_E	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_E	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_F	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_F	/;"	d
ATMEL_PIO_CFGR_FUNC_PERIPH_G	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_CFGR_FUNC_PERIPH_G	/;"	d
ATMEL_PIO_DIR_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_DIR_MASK	/;"	d
ATMEL_PIO_IFEN_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_IFEN_MASK	/;"	d
ATMEL_PIO_IFSCEN_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_IFSCEN_MASK	/;"	d
ATMEL_PIO_LINE	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_LINE(/;"	d
ATMEL_PIO_NPINS_PER_BANK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_NPINS_PER_BANK	/;"	d
ATMEL_PIO_OPD_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_OPD_MASK	/;"	d
ATMEL_PIO_PDEN_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_PDEN_MASK	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_PIO_PORTS /;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PORTS	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_PIO_PORTS	/;"	d
ATMEL_PIO_PUEN_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_PUEN_MASK	/;"	d
ATMEL_PIO_SCHMITT_MASK	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define ATMEL_PIO_SCHMITT_MASK	/;"	d
ATMEL_PMC_UHP	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	include/configs/sama5d3_xplained.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMC_UHP	include/configs/sama5d3xek.h	/^#define ATMEL_PMC_UHP	/;"	d
ATMEL_PMECC_INDEX_OFFSET_1024	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_PMECC_INDEX_OFFSET_1024	/;"	d
ATMEL_PMECC_INDEX_OFFSET_1024	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_PMECC_INDEX_OFFSET_1024	/;"	d
ATMEL_PMECC_INDEX_OFFSET_512	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define ATMEL_PMECC_INDEX_OFFSET_512	/;"	d
ATMEL_PMECC_INDEX_OFFSET_512	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define ATMEL_PMECC_INDEX_OFFSET_512	/;"	d
ATMEL_PMX_AA_ECRS	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ECRS	/;"	d
ATMEL_PMX_AA_ECRSDV	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ECRSDV	/;"	d
ATMEL_PMX_AA_EMDC	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_EMDC	/;"	d
ATMEL_PMX_AA_EMDIO	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_EMDIO	/;"	d
ATMEL_PMX_AA_EREFCK	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_EREFCK	/;"	d
ATMEL_PMX_AA_ERX0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ERX0	/;"	d
ATMEL_PMX_AA_ERX1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ERX1	/;"	d
ATMEL_PMX_AA_ERXER	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ERXER	/;"	d
ATMEL_PMX_AA_ETX0	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ETX0	/;"	d
ATMEL_PMX_AA_ETX1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ETX1	/;"	d
ATMEL_PMX_AA_ETXCK	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ETXCK	/;"	d
ATMEL_PMX_AA_ETXEN	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_ETXEN	/;"	d
ATMEL_PMX_AA_TWCK	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_TWCK	/;"	d
ATMEL_PMX_AA_TWD	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_TWD	/;"	d
ATMEL_PMX_AA_TXD2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_AA_TXD2	/;"	d
ATMEL_PMX_BA_ECOL	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ECOL	/;"	d
ATMEL_PMX_BA_ERX2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ERX2	/;"	d
ATMEL_PMX_BA_ERX3	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ERX3	/;"	d
ATMEL_PMX_BA_ERXCK	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ERXCK	/;"	d
ATMEL_PMX_BA_ERXDV	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ERXDV	/;"	d
ATMEL_PMX_BA_ETX2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ETX2	/;"	d
ATMEL_PMX_BA_ETX3	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ETX3	/;"	d
ATMEL_PMX_BA_ETXER	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_BA_ETXER	/;"	d
ATMEL_PMX_CA_A23	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_A23	/;"	d
ATMEL_PMX_CA_A24	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_A24	/;"	d
ATMEL_PMX_CA_A25	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_A25	/;"	d
ATMEL_PMX_CA_BFAVD	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_BFAVD	/;"	d
ATMEL_PMX_CA_BFBAA	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_BFBAA	/;"	d
ATMEL_PMX_CA_BFCK	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_BFCK	/;"	d
ATMEL_PMX_CA_BFOE	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_BFOE	/;"	d
ATMEL_PMX_CA_BFRDY	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_BFRDY	/;"	d
ATMEL_PMX_CA_BFWE	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_BFWE	/;"	d
ATMEL_PMX_CA_CFCE1	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_CFCE1	/;"	d
ATMEL_PMX_CA_CFCE2	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_CFCE2	/;"	d
ATMEL_PMX_CA_CFCS	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_CFCS	/;"	d
ATMEL_PMX_CA_CFRNW	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_CFRNW	/;"	d
ATMEL_PMX_CA_D16_31	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_D16_31	/;"	d
ATMEL_PMX_CA_NCS4	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_NCS4	/;"	d
ATMEL_PMX_CA_NCS5	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_NCS5	/;"	d
ATMEL_PMX_CA_NCS6	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_NCS6	/;"	d
ATMEL_PMX_CA_NCS7	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_NCS7	/;"	d
ATMEL_PMX_CA_NWAIT	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_NWAIT	/;"	d
ATMEL_PMX_CA_SMOE	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_SMOE	/;"	d
ATMEL_PMX_CA_SMWE	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_PMX_CA_SMWE	/;"	d
ATMEL_SAMA5_BOOT_DEV_ID_MASK	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_DEV_ID_MASK	/;"	d
ATMEL_SAMA5_BOOT_DEV_ID_OFF	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_DEV_ID_OFF	/;"	d
ATMEL_SAMA5_BOOT_FROM_MASK	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_MASK	/;"	d
ATMEL_SAMA5_BOOT_FROM_MCI	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_MCI	/;"	d
ATMEL_SAMA5_BOOT_FROM_OFF	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_OFF	/;"	d
ATMEL_SAMA5_BOOT_FROM_QSPI	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_QSPI	/;"	d
ATMEL_SAMA5_BOOT_FROM_SAMBA	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_SAMBA	/;"	d
ATMEL_SAMA5_BOOT_FROM_SMC	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_SMC	/;"	d
ATMEL_SAMA5_BOOT_FROM_SPI	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_SPI	/;"	d
ATMEL_SAMA5_BOOT_FROM_TWI	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define ATMEL_SAMA5_BOOT_FROM_TWI	/;"	d
ATMEL_SDHCI	drivers/mmc/Kconfig	/^config ATMEL_SDHCI$/;"	c	menu:MMC Host controller Support
ATMEL_SDHC_MIN_FREQ	drivers/mmc/atmel_sdhci.c	/^#define ATMEL_SDHC_MIN_FREQ	/;"	d	file:
ATMEL_SFR_AICREDIR_KEY	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define ATMEL_SFR_AICREDIR_KEY	/;"	d
ATMEL_SFR_AICREDIR_KEY	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define ATMEL_SFR_AICREDIR_KEY	/;"	d
ATMEL_SFR_AICREDIR_NSAIC	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define ATMEL_SFR_AICREDIR_NSAIC	/;"	d
ATMEL_SFR_DDRCFG_FDQIEN	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define ATMEL_SFR_DDRCFG_FDQIEN	/;"	d
ATMEL_SFR_DDRCFG_FDQSIEN	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define ATMEL_SFR_DDRCFG_FDQSIEN	/;"	d
ATMEL_SIZE_ROM	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_SIZE_ROM	/;"	d
ATMEL_SIZE_SRAM	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define ATMEL_SIZE_SRAM	/;"	d
ATMEL_SPI	drivers/spi/Kconfig	/^config ATMEL_SPI$/;"	c	menu:SPI Support
ATMEL_SPI_BITS_10	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_10	/;"	d
ATMEL_SPI_BITS_11	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_11	/;"	d
ATMEL_SPI_BITS_12	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_12	/;"	d
ATMEL_SPI_BITS_13	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_13	/;"	d
ATMEL_SPI_BITS_14	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_14	/;"	d
ATMEL_SPI_BITS_15	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_15	/;"	d
ATMEL_SPI_BITS_16	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_16	/;"	d
ATMEL_SPI_BITS_8	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_8	/;"	d
ATMEL_SPI_BITS_9	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_BITS_9	/;"	d
ATMEL_SPI_CR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CR	/;"	d
ATMEL_SPI_CR_LASTXFER	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CR_LASTXFER	/;"	d
ATMEL_SPI_CR_SPIDIS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CR_SPIDIS	/;"	d
ATMEL_SPI_CR_SPIEN	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CR_SPIEN	/;"	d
ATMEL_SPI_CR_SWRST	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CR_SWRST	/;"	d
ATMEL_SPI_CSR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSR(/;"	d
ATMEL_SPI_CSRx_BITS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_BITS(/;"	d
ATMEL_SPI_CSRx_CPOL	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_CPOL	/;"	d
ATMEL_SPI_CSRx_CSAAT	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_CSAAT	/;"	d
ATMEL_SPI_CSRx_DLYBCT	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_DLYBCT(/;"	d
ATMEL_SPI_CSRx_DLYBS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_DLYBS(/;"	d
ATMEL_SPI_CSRx_NCPHA	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_NCPHA	/;"	d
ATMEL_SPI_CSRx_SCBR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_SCBR(/;"	d
ATMEL_SPI_CSRx_SCBR_MAX	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_CSRx_SCBR_MAX	/;"	d
ATMEL_SPI_IDR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_IDR	/;"	d
ATMEL_SPI_IER	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_IER	/;"	d
ATMEL_SPI_IMR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_IMR	/;"	d
ATMEL_SPI_MR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR	/;"	d
ATMEL_SPI_MR_DLYBCS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_DLYBCS(/;"	d
ATMEL_SPI_MR_FDIV	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_FDIV	/;"	d
ATMEL_SPI_MR_LLB	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_LLB	/;"	d
ATMEL_SPI_MR_MODFDIS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_MODFDIS	/;"	d
ATMEL_SPI_MR_MSTR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_MSTR	/;"	d
ATMEL_SPI_MR_PCS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_PCS(/;"	d
ATMEL_SPI_MR_PCSDEC	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_PCSDEC	/;"	d
ATMEL_SPI_MR_PS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_PS	/;"	d
ATMEL_SPI_MR_WDRBT	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_MR_WDRBT	/;"	d
ATMEL_SPI_RDR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_RDR	/;"	d
ATMEL_SPI_RDR_PCS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_RDR_PCS(/;"	d
ATMEL_SPI_RDR_RD	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_RDR_RD(/;"	d
ATMEL_SPI_SR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR	/;"	d
ATMEL_SPI_SR_ENDRX	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_ENDRX	/;"	d
ATMEL_SPI_SR_ENDTX	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_ENDTX	/;"	d
ATMEL_SPI_SR_MODF	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_MODF	/;"	d
ATMEL_SPI_SR_NSSR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_NSSR	/;"	d
ATMEL_SPI_SR_OVRES	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_OVRES	/;"	d
ATMEL_SPI_SR_RDRF	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_RDRF	/;"	d
ATMEL_SPI_SR_RXBUFF	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_RXBUFF	/;"	d
ATMEL_SPI_SR_SPIENS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_SPIENS	/;"	d
ATMEL_SPI_SR_TDRE	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_TDRE	/;"	d
ATMEL_SPI_SR_TXBUFE	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_TXBUFE	/;"	d
ATMEL_SPI_SR_TXEMPTY	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_SR_TXEMPTY	/;"	d
ATMEL_SPI_TDR	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_TDR	/;"	d
ATMEL_SPI_TDR_LASTXFER	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_TDR_LASTXFER	/;"	d
ATMEL_SPI_TDR_PCS	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_TDR_PCS(/;"	d
ATMEL_SPI_TDR_TD	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_TDR_TD(/;"	d
ATMEL_SPI_VERSION	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_VERSION	/;"	d
ATMEL_SPI_VERSION_MFN	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_VERSION_MFN(/;"	d
ATMEL_SPI_VERSION_REV	drivers/spi/atmel_spi.h	/^#define ATMEL_SPI_VERSION_REV(/;"	d
ATMEL_TPM_TIMEOUT_MS	drivers/tpm/tpm_atmel_twi.c	/^#define ATMEL_TPM_TIMEOUT_MS /;"	d	file:
ATMEL_UHP_BASE	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define ATMEL_UHP_BASE	/;"	d
ATMEL_UHP_BASE	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define ATMEL_UHP_BASE	/;"	d
ATMEL_USART	drivers/serial/Kconfig	/^config ATMEL_USART$/;"	c	menu:Serial drivers
ATMEL_USB_HOST_BASE	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define ATMEL_USB_HOST_BASE	/;"	d
ATMU_SIZE_128K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_128K,$/;"	e	enum:atmu_size
ATMU_SIZE_128M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_128M,$/;"	e	enum:atmu_size
ATMU_SIZE_16G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_16G,$/;"	e	enum:atmu_size
ATMU_SIZE_16K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_16K,$/;"	e	enum:atmu_size
ATMU_SIZE_16M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_16M,$/;"	e	enum:atmu_size
ATMU_SIZE_1G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_1G,$/;"	e	enum:atmu_size
ATMU_SIZE_1M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_1M,$/;"	e	enum:atmu_size
ATMU_SIZE_256K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_256K,$/;"	e	enum:atmu_size
ATMU_SIZE_256M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_256M,$/;"	e	enum:atmu_size
ATMU_SIZE_2G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_2G,$/;"	e	enum:atmu_size
ATMU_SIZE_2M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_2M,$/;"	e	enum:atmu_size
ATMU_SIZE_32G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_32G,$/;"	e	enum:atmu_size
ATMU_SIZE_32K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_32K,$/;"	e	enum:atmu_size
ATMU_SIZE_32M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_32M,$/;"	e	enum:atmu_size
ATMU_SIZE_4G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_4G,$/;"	e	enum:atmu_size
ATMU_SIZE_4K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_4K = 0xb,$/;"	e	enum:atmu_size
ATMU_SIZE_4M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_4M,$/;"	e	enum:atmu_size
ATMU_SIZE_512K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_512K,$/;"	e	enum:atmu_size
ATMU_SIZE_512M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_512M,$/;"	e	enum:atmu_size
ATMU_SIZE_64G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_64G,$/;"	e	enum:atmu_size
ATMU_SIZE_64K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_64K,$/;"	e	enum:atmu_size
ATMU_SIZE_64M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_64M,$/;"	e	enum:atmu_size
ATMU_SIZE_8G	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_8G,$/;"	e	enum:atmu_size
ATMU_SIZE_8K	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_8K,$/;"	e	enum:atmu_size
ATMU_SIZE_8M	arch/powerpc/include/asm/fsl_srio.h	/^	ATMU_SIZE_8M,$/;"	e	enum:atmu_size
ATM_CMD_LOCK_SECT	include/mtd/cfi_flash.h	/^#define ATM_CMD_LOCK_SECT	/;"	d
ATM_CMD_SOFTLOCK_START	include/mtd/cfi_flash.h	/^#define ATM_CMD_SOFTLOCK_START	/;"	d
ATM_CMD_UNLOCK_SECT	include/mtd/cfi_flash.h	/^#define ATM_CMD_UNLOCK_SECT	/;"	d
ATM_ID_BV1614	include/flash.h	/^#define ATM_ID_BV1614	/;"	d
ATM_ID_BV1614A	include/flash.h	/^#define ATM_ID_BV1614A	/;"	d
ATM_ID_BV6416	include/flash.h	/^#define ATM_ID_BV6416	/;"	d
ATM_ID_LV040	include/flash.h	/^#define ATM_ID_LV040	/;"	d
ATM_LNC_C6_AUTO_DEMOTE	arch/x86/include/asm/msr-index.h	/^#define ATM_LNC_C6_AUTO_DEMOTE	/;"	d
ATM_MANUFACT	include/flash.h	/^#define ATM_MANUFACT	/;"	d
ATNGW100_DATAFLASH_CS_PIN	board/atmel/atngw100/atngw100.c	/^#define ATNGW100_DATAFLASH_CS_PIN	/;"	d	file:
ATNGW100_DATAFLASH_CS_PIN	board/atmel/atngw100mkii/atngw100mkii.c	/^#define ATNGW100_DATAFLASH_CS_PIN	/;"	d	file:
ATOMIC_HASH	arch/nios2/include/asm/bitops/atomic.h	/^#  define ATOMIC_HASH(/;"	d
ATOMIC_HASH_SIZE	arch/nios2/include/asm/bitops/atomic.h	/^#  define ATOMIC_HASH_SIZE /;"	d
ATOMIC_INIT	arch/arm/include/asm/atomic.h	/^#define ATOMIC_INIT(/;"	d
ATOMIC_INIT	arch/powerpc/include/asm/atomic.h	/^#define ATOMIC_INIT(/;"	d
ATOMIC_INIT	arch/x86/include/asm/atomic.h	/^#define ATOMIC_INIT(/;"	d
ATOMIC_INIT	arch/xtensa/include/asm/atomic.h	/^#define ATOMIC_INIT(/;"	d
ATOMIC_LONG_INIT	include/asm-generic/atomic-long.h	/^#define ATOMIC_LONG_INIT(/;"	d
ATREPM	drivers/usb/host/r8a66597.h	/^#define	ATREPM	/;"	d
ATR_ATO	include/mpc83xx.h	/^#define ATR_ATO	/;"	d
ATR_ATO_SHIFT	include/mpc83xx.h	/^#define ATR_ATO_SHIFT	/;"	d
ATR_DTO	include/mpc83xx.h	/^#define ATR_DTO	/;"	d
ATR_DTO_SHIFT	include/mpc83xx.h	/^#define ATR_DTO_SHIFT	/;"	d
ATTACHEDDEVICEPAGELENGTH	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define ATTACHEDDEVICEPAGELENGTH(/;"	d
ATTCH	drivers/usb/host/r8a66597.h	/^#define	ATTCH	/;"	d
ATTCHE	drivers/usb/host/r8a66597.h	/^#define	ATTCHE	/;"	d
ATTRELI_INIT_SETTINGS	include/tsec.h	/^#define ATTRELI_INIT_SETTINGS	/;"	d
ATTRS	drivers/net/lpc32xx_eth.c	/^#define ATTRS(/;"	d	file:
ATTR_ARCH	include/fat.h	/^#define ATTR_ARCH	/;"	d
ATTR_ATIME	fs/yaffs2/yportenv.h	/^#define ATTR_ATIME	/;"	d
ATTR_CTIME	fs/yaffs2/yportenv.h	/^#define ATTR_CTIME	/;"	d
ATTR_DIR	include/fat.h	/^#define ATTR_DIR	/;"	d
ATTR_GID	fs/yaffs2/yportenv.h	/^#define ATTR_GID	/;"	d
ATTR_HIDDEN	include/fat.h	/^#define ATTR_HIDDEN	/;"	d
ATTR_HW_COHERENCY	arch/arm/mach-mvebu/mbus.c	/^#define ATTR_HW_COHERENCY	/;"	d	file:
ATTR_INIT_SETTINGS	include/tsec.h	/^#define ATTR_INIT_SETTINGS	/;"	d
ATTR_MAX	scripts/kconfig/nconf.h	/^	ATTR_MAX$/;"	e	enum:__anon6c8863760103
ATTR_MODE	fs/yaffs2/yportenv.h	/^#define ATTR_MODE	/;"	d
ATTR_MTIME	fs/yaffs2/yportenv.h	/^#define ATTR_MTIME	/;"	d
ATTR_RO	include/fat.h	/^#define ATTR_RO	/;"	d
ATTR_SEEN_MAX	cmd/efi.c	/^#define ATTR_SEEN_MAX	/;"	d	file:
ATTR_SIZE	fs/yaffs2/yportenv.h	/^#define ATTR_SIZE	/;"	d
ATTR_SYS	include/fat.h	/^#define ATTR_SYS	/;"	d
ATTR_UID	fs/yaffs2/yportenv.h	/^#define ATTR_UID	/;"	d
ATTR_VFAT	include/fat.h	/^#define ATTR_VFAT	/;"	d
ATTR_VOLUME	include/fat.h	/^#define ATTR_VOLUME	/;"	d
ATT_C	drivers/bios_emulator/include/biosemu.h	/^#define ATT_C /;"	d
ATZ1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ATZ1_BASE_ADDR /;"	d
ATZ2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ATZ2_BASE_ADDR /;"	d
ATZ3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ATZ3_BASE_ADDR /;"	d
AU1000_ETH0_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_ETH0_BASE /;"	d
AU1000_ETH1_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_ETH1_BASE /;"	d
AU1000_GPIO_16	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_16 /;"	d
AU1000_GPIO_17	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_17 /;"	d
AU1000_GPIO_18	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_18 /;"	d
AU1000_GPIO_19	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_19 /;"	d
AU1000_GPIO_20	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_20 /;"	d
AU1000_GPIO_21	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_21 /;"	d
AU1000_GPIO_22	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_22 /;"	d
AU1000_GPIO_23	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_23 /;"	d
AU1000_GPIO_24	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_24 /;"	d
AU1000_GPIO_25	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_25 /;"	d
AU1000_GPIO_26	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_26 /;"	d
AU1000_GPIO_27	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_27 /;"	d
AU1000_GPIO_28	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_28 /;"	d
AU1000_GPIO_29	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_29 /;"	d
AU1000_GPIO_30	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_30 /;"	d
AU1000_GPIO_31	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_GPIO_31 /;"	d
AU1000_I2S_UO_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_I2S_UO_INT /;"	d
AU1000_IRDA_RX_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_IRDA_RX_INT /;"	d
AU1000_IRDA_TX_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_IRDA_TX_INT /;"	d
AU1000_MAC0_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_MAC0_ENABLE /;"	d
AU1000_MAC1_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_MAC1_ENABLE /;"	d
AU1000_SSI0_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_SSI0_INT /;"	d
AU1000_SSI1_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_SSI1_INT /;"	d
AU1000_UART1_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_UART1_INT /;"	d
AU1000_UART2_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1000_UART2_INT /;"	d
AU1100_ETH0_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1100_ETH0_BASE	/;"	d
AU1100_GPIO_208_215	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define	AU1100_GPIO_208_215	/;"	d
AU1100_MAC0_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1100_MAC0_ENABLE /;"	d
AU1100_SD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1100_SD	/;"	d
AU1500_ETH0_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_ETH0_BASE	/;"	d
AU1500_ETH1_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_ETH1_BASE	/;"	d
AU1500_GPIO_20	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_20 /;"	d
AU1500_GPIO_200	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_200 /;"	d
AU1500_GPIO_201	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_201 /;"	d
AU1500_GPIO_202	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_202 /;"	d
AU1500_GPIO_203	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_203 /;"	d
AU1500_GPIO_204	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_204 /;"	d
AU1500_GPIO_205	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_205 /;"	d
AU1500_GPIO_206	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_206 /;"	d
AU1500_GPIO_207	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_207 /;"	d
AU1500_GPIO_208_215	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_208_215 /;"	d
AU1500_GPIO_23	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_23 /;"	d
AU1500_GPIO_24	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_24 /;"	d
AU1500_GPIO_25	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_25 /;"	d
AU1500_GPIO_26	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_26 /;"	d
AU1500_GPIO_27	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_27 /;"	d
AU1500_GPIO_28	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_GPIO_28 /;"	d
AU1500_MAC0_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_MAC0_ENABLE /;"	d
AU1500_MAC1_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_MAC1_ENABLE /;"	d
AU1500_PCI_INTA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_PCI_INTA /;"	d
AU1500_PCI_INTB	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_PCI_INTB /;"	d
AU1500_PCI_INTC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_PCI_INTC /;"	d
AU1500_PCI_INTD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1500_PCI_INTD /;"	d
AU1500_SYS_ADDR	board/dbau1x00/lowlevel_init.S	/^#define AU1500_SYS_ADDR	/;"	d	file:
AU1500_SYS_ADDR	board/pb1x00/lowlevel_init.S	/^#define AU1500_SYS_ADDR	/;"	d	file:
AU1550_ETH0_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1550_ETH0_BASE	/;"	d
AU1550_ETH1_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1550_ETH1_BASE	/;"	d
AU1550_MAC0_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1550_MAC0_ENABLE /;"	d
AU1550_MAC1_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1550_MAC1_ENABLE /;"	d
AU1X00_AC97C_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_AC97C_INT /;"	d
AU1X00_ACSYNC_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_ACSYNC_INT /;"	d
AU1X00_DMA_INT_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_DMA_INT_BASE /;"	d
AU1X00_ETH0_IRQ	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_ETH0_IRQ /;"	d
AU1X00_ETH1_IRQ	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_ETH1_IRQ /;"	d
AU1X00_GPIO_0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_0 /;"	d
AU1X00_GPIO_1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_1 /;"	d
AU1X00_GPIO_10	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_10 /;"	d
AU1X00_GPIO_11	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_11 /;"	d
AU1X00_GPIO_12	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_12 /;"	d
AU1X00_GPIO_13	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_13 /;"	d
AU1X00_GPIO_14	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_14 /;"	d
AU1X00_GPIO_15	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_15 /;"	d
AU1X00_GPIO_2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_2 /;"	d
AU1X00_GPIO_3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_3 /;"	d
AU1X00_GPIO_4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_4 /;"	d
AU1X00_GPIO_5	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_5 /;"	d
AU1X00_GPIO_6	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_6 /;"	d
AU1X00_GPIO_7	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_7 /;"	d
AU1X00_GPIO_8	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_8 /;"	d
AU1X00_GPIO_9	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_GPIO_9 /;"	d
AU1X00_LAST_INTC0_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_LAST_INTC0_INT /;"	d
AU1X00_MAC0_DMA_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_MAC0_DMA_INT /;"	d
AU1X00_MAC1_DMA_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_MAC1_DMA_INT /;"	d
AU1X00_MAX_INTR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_MAX_INTR /;"	d
AU1X00_RTC_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_RTC_INT /;"	d
AU1X00_RTC_MATCH0_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_RTC_MATCH0_INT /;"	d
AU1X00_RTC_MATCH1_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_RTC_MATCH1_INT /;"	d
AU1X00_RTC_MATCH2_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_RTC_MATCH2_INT /;"	d
AU1X00_TOY_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_TOY_INT /;"	d
AU1X00_TOY_MATCH0_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_TOY_MATCH0_INT /;"	d
AU1X00_TOY_MATCH1_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_TOY_MATCH1_INT /;"	d
AU1X00_TOY_MATCH2_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_TOY_MATCH2_INT /;"	d
AU1X00_UART0_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_UART0_INT /;"	d
AU1X00_UART3_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_UART3_INT /;"	d
AU1X00_USB_DEV_REQ_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_USB_DEV_REQ_INT /;"	d
AU1X00_USB_DEV_SUS_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_USB_DEV_SUS_INT /;"	d
AU1X00_USB_HOST_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X00_USB_HOST_INT /;"	d
AU1X_SOCK0_IO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X_SOCK0_IO /;"	d
AU1X_SOCK0_PHYS_ATTR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X_SOCK0_PHYS_ATTR /;"	d
AU1X_SOCK0_PHYS_MEM	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X_SOCK0_PHYS_MEM /;"	d
AU1X_SOCK1_IO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X_SOCK1_IO /;"	d
AU1X_SOCK1_PHYS_ATTR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X_SOCK1_PHYS_ATTR /;"	d
AU1X_SOCK1_PHYS_MEM	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define AU1X_SOCK1_PHYS_MEM /;"	d
AUDIO0_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO0_RATIO	/;"	d
AUDIO0_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO0_SEL	/;"	d
AUDIO0_SEL_EPLL	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO0_SEL_EPLL	/;"	d
AUDIO0_SEL_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define AUDIO0_SEL_MASK	/;"	d
AUDIO1_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO1_RATIO	/;"	d
AUDIO1_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO1_SEL	/;"	d
AUDIO1_SEL_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define AUDIO1_SEL_MASK	/;"	d
AUDIO2_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO2_RATIO	/;"	d
AUDIO2_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define AUDIO2_SEL	/;"	d
AUDIO_0_RATIO_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define AUDIO_0_RATIO_MASK	/;"	d
AUDIO_1_RATIO_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define AUDIO_1_RATIO_MASK	/;"	d
AUDIO_CLKA_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKA_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKA_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKA_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SCL_C_MARK, AUDIO_CLKA_B_MARK, AVB_MDIO_MARK, SSI_SCK78_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AUDIO_CLKA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKA_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKA_C_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKA_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, PCMOE_N_MARK, SSI_SCK0129_MARK,$/;"	e	enum:__anona307901d0103	file:
AUDIO_CLKA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKA_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	AUDIO_CLKA_MARK,$/;"	e	enum:__anona307835a0103	file:
AUDIO_CLKA_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	AUDIO_CLKA_MARK, AUDIO_CLKB_MARK,$/;"	e	enum:__anona307879b0103	file:
AUDIO_CLKA_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKA_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AUDIO_CLKB_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKB_A_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKB_B_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKB_B_GMARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKB_B_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKB_B_IMARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKB_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AUDIO_CLKB_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HTX_MARK, VI0_R5_MARK, I2C1_SDA_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AUDIO_CLKB_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	AUDIO_CLKA_MARK, AUDIO_CLKB_MARK,$/;"	e	enum:__anona307879b0103	file:
AUDIO_CLKB_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AUDIO_CLKC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HSCK_MARK, SCIF_CLK_B_MARK, AVB_CRS_MARK, AUDIO_CLKC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AUDIO_CLKC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AUDIO_CLKMUX_ASS	arch/arm/mach-exynos/include/mach/clock.h	/^#define AUDIO_CLKMUX_ASS	/;"	d
AUDIO_CLKOUT1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT_A_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKOUT_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SDA_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_EN_MARK, ETH_MDIO_MARK,$/;"	e	enum:__anona307901d0103	file:
AUDIO_CLKOUT_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKOUT_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT_C_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKOUT_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AUDIO_CLKOUT_D_MARK,$/;"	e	enum:__anona307945e0103	file:
AUDIO_CLKOUT_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,$/;"	e	enum:__anona3077f190103	file:
AUDIO_CLKOUT_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK,$/;"	e	enum:__anona307879b0103	file:
AUDIO_CLKOUT_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AUDIO_CODEC	arch/arm/mach-exynos/include/mach/sound.h	/^#define AUDIO_CODEC	/;"	d
AUDIO_COMPAT	arch/arm/mach-exynos/include/mach/sound.h	/^#define AUDIO_COMPAT	/;"	d
AUDIO_COMPAT_I2C	include/sound.h	/^	AUDIO_COMPAT_I2C,$/;"	e	enum:sound_compat
AUDIO_COMPAT_SPI	include/sound.h	/^	AUDIO_COMPAT_SPI,$/;"	e	enum:sound_compat
AUDIO_EXTERNAL_CLK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define AUDIO_EXTERNAL_CLK	/;"	d
AUDIO_I2C_BUS	arch/arm/mach-exynos/include/mach/sound.h	/^#define AUDIO_I2C_BUS	/;"	d
AUDIO_I2C_REG	arch/arm/mach-exynos/include/mach/sound.h	/^#define AUDIO_I2C_REG	/;"	d
AUDIO_MCLK_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	AUDIO_MCLK_CLK_ROOT = 121,$/;"	e	enum:clk_root_index
AUDIO_MCLK_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
AUDIO_MCLK_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define AUDIO_MCLK_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
AUDIO_MODE_MASTER_MODE	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUDIO_MODE_MASTER_MODE	/;"	d
AUDIO_MODE_SPDIF_MODE	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUDIO_MODE_SPDIF_MODE	/;"	d
AUDIO_NONE	board/gdsys/405ep/dlvision-10g.c	/^	AUDIO_NONE = 0,$/;"	e	enum:__anon678ede200303	file:
AUDIO_NONE	board/gdsys/405ep/iocon.c	/^	AUDIO_NONE = 0,$/;"	e	enum:__anon023d8a7b0503	file:
AUDIO_NONE	board/gdsys/common/ioep-fpga.c	/^	AUDIO_NONE = 0,$/;"	e	enum:__anoneadcbf560403	file:
AUDIO_RX	board/gdsys/405ep/dlvision-10g.c	/^	AUDIO_RX = 2,$/;"	e	enum:__anon678ede200303	file:
AUDIO_RX	board/gdsys/405ep/iocon.c	/^	AUDIO_RX = 2,$/;"	e	enum:__anon023d8a7b0503	file:
AUDIO_RX	board/gdsys/common/ioep-fpga.c	/^	AUDIO_RX = 2,$/;"	e	enum:__anoneadcbf560403	file:
AUDIO_RXTX	board/gdsys/405ep/dlvision-10g.c	/^	AUDIO_RXTX = 3,$/;"	e	enum:__anon678ede200303	file:
AUDIO_RXTX	board/gdsys/405ep/iocon.c	/^	AUDIO_RXTX = 3,$/;"	e	enum:__anon023d8a7b0503	file:
AUDIO_RXTX	board/gdsys/common/ioep-fpga.c	/^	AUDIO_RXTX = 3,$/;"	e	enum:__anoneadcbf560403	file:
AUDIO_TX	board/gdsys/405ep/dlvision-10g.c	/^	AUDIO_TX = 1,$/;"	e	enum:__anon678ede200303	file:
AUDIO_TX	board/gdsys/405ep/iocon.c	/^	AUDIO_TX = 1,$/;"	e	enum:__anon023d8a7b0503	file:
AUDIO_TX	board/gdsys/common/ioep-fpga.c	/^	AUDIO_TX = 1,$/;"	e	enum:__anoneadcbf560403	file:
AUDMUX_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define AUDMUX_BASE_ADDR	/;"	d
AUDMUX_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define AUDMUX_BASE_ADDR /;"	d
AUD_CLK_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUD_CLK_CHG	/;"	d
AUD_CLK_CHG	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUD_CLK_CHG	/;"	d
AUD_FIFO_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUD_FIFO_FUNC_EN_N	/;"	d
AUD_FIFO_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUD_FIFO_FUNC_EN_N	/;"	d
AUD_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUD_FUNC_EN_N	/;"	d
AUD_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUD_FUNC_EN_N	/;"	d
AUD_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AUD_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define AUD_NR_CLK	/;"	d
AURORA	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	AURORA,$/;"	e	enum:srds_prtcl
AURORA	arch/powerpc/include/asm/fsl_serdes.h	/^	AURORA,$/;"	e	enum:srds_prtcl
AUS	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define AUS	/;"	d
AUTHOR	doc/mkimage.1	/^.SH AUTHOR$/;"	s	title:MKIMAGE
AUTHORS	doc/kwboot.1	/^.SH "AUTHORS"$/;"	s	title:KWBOOT
AUTO	include/miiphy.h	/^#define AUTO	/;"	d
AUTOBOOT	cmd/Kconfig	/^config AUTOBOOT$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_DELAY_STR	cmd/Kconfig	/^config AUTOBOOT_DELAY_STR$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_ENCRYPTION	cmd/Kconfig	/^config AUTOBOOT_ENCRYPTION$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_KEYED	cmd/Kconfig	/^config AUTOBOOT_KEYED$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_KEYED_CTRLC	cmd/Kconfig	/^config AUTOBOOT_KEYED_CTRLC$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_PROMPT	cmd/Kconfig	/^config AUTOBOOT_PROMPT$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_STOP_STR	cmd/Kconfig	/^config AUTOBOOT_STOP_STR$/;"	c	menu:Command line interface""Autoboot options
AUTOBOOT_STOP_STR_SHA256	cmd/Kconfig	/^config AUTOBOOT_STOP_STR_SHA256$/;"	c	menu:Command line interface""Autoboot options
AUTOCLEAR_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define AUTOCLEAR_R	/;"	d
AUTOIDLE	drivers/usb/musb-new/omap2430.h	/^#	define	AUTOIDLE	/;"	d
AUTOLOAD_DONE	drivers/usb/eth/r8152.h	/^#define AUTOLOAD_DONE	/;"	d
AUTONEG_ADVERTISE_10_100_ALL	drivers/net/e1000.h	/^#define AUTONEG_ADVERTISE_10_100_ALL /;"	d
AUTONEG_ADVERTISE_10_ALL	drivers/net/e1000.h	/^#define AUTONEG_ADVERTISE_10_ALL /;"	d
AUTONEG_ADVERTISE_SPEED_DEFAULT	drivers/net/e1000.h	/^#define AUTONEG_ADVERTISE_SPEED_DEFAULT /;"	d
AUTONEG_DISABLE	drivers/usb/eth/r8152.h	/^#define AUTONEG_DISABLE /;"	d
AUTONEG_DISABLE	include/linux/ethtool.h	/^#define AUTONEG_DISABLE	/;"	d
AUTONEG_EN	include/mv88e6352.h	/^#define AUTONEG_EN	/;"	d
AUTONEG_ENABLE	drivers/usb/eth/r8152.h	/^#define AUTONEG_ENABLE /;"	d
AUTONEG_ENABLE	include/linux/ethtool.h	/^#define AUTONEG_ENABLE	/;"	d
AUTONEG_RST	include/mv88e6352.h	/^#define AUTONEG_RST	/;"	d
AUTOPAD_CRC	drivers/net/ax88180.h	/^  #define AUTOPAD_CRC	/;"	d
AUTOREQ_RH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define AUTOREQ_RH	/;"	d
AUTOSET_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define AUTOSET_T	/;"	d
AUTO_ALL_MODES	drivers/net/e1000.h	/^#define AUTO_ALL_MODES	/;"	d
AUTO_CAL_ENABLED	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define AUTO_CAL_ENABLED	/;"	d
AUTO_CAL_PD_OFFSET	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define AUTO_CAL_PD_OFFSET	/;"	d
AUTO_CAL_PU_OFFSET	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define AUTO_CAL_PU_OFFSET	/;"	d
AUTO_DETECTION_SUPPORT	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define AUTO_DETECTION_SUPPORT$/;"	d
AUTO_MDIX_EN	include/mv88e6352.h	/^#define AUTO_MDIX_EN	/;"	d
AUTO_MEDIA	drivers/net/ax88180.h	/^#define AUTO_MEDIA	/;"	d
AUTO_MEMORY_CONFIG	include/configs/bubinga.h	/^#define        AUTO_MEMORY_CONFIG$/;"	d
AUTO_POLARITY_DISABLE	drivers/net/e1000.h	/^#define AUTO_POLARITY_DISABLE	/;"	d
AUTO_RD_DQS_GATING_CALIBRATION_EN	include/fsl_mmdc.h	/^#define AUTO_RD_DQS_GATING_CALIBRATION_EN	/;"	d
AUTO_ZQC_TIMING	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  AUTO_ZQC_TIMING	/;"	d
AUXCLK_CLKDIV_16	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_CLKDIV_16	/;"	d
AUXCLK_CLKDIV_2	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_CLKDIV_2	/;"	d
AUXCLK_CLKDIV_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_CLKDIV_MASK	/;"	d
AUXCLK_CLKDIV_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_CLKDIV_MASK	/;"	d
AUXCLK_CLKDIV_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_CLKDIV_SHIFT	/;"	d
AUXCLK_CLKDIV_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_CLKDIV_SHIFT	/;"	d
AUXCLK_ENABLE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_ENABLE_MASK	/;"	d
AUXCLK_ENABLE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_ENABLE_MASK	/;"	d
AUXCLK_SRCSELECT_ALTERNATE	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_SRCSELECT_ALTERNATE	/;"	d
AUXCLK_SRCSELECT_ALTERNATE	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_SRCSELECT_ALTERNATE	/;"	d
AUXCLK_SRCSELECT_CORE_DPLL	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_SRCSELECT_CORE_DPLL	/;"	d
AUXCLK_SRCSELECT_CORE_DPLL	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_SRCSELECT_CORE_DPLL	/;"	d
AUXCLK_SRCSELECT_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_SRCSELECT_MASK	/;"	d
AUXCLK_SRCSELECT_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_SRCSELECT_MASK	/;"	d
AUXCLK_SRCSELECT_PER_DPLL	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_SRCSELECT_PER_DPLL	/;"	d
AUXCLK_SRCSELECT_PER_DPLL	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_SRCSELECT_PER_DPLL	/;"	d
AUXCLK_SRCSELECT_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_SRCSELECT_SHIFT	/;"	d
AUXCLK_SRCSELECT_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_SRCSELECT_SHIFT	/;"	d
AUXCLK_SRCSELECT_SYS_CLK	arch/arm/include/asm/arch-omap4/clock.h	/^#define AUXCLK_SRCSELECT_SYS_CLK	/;"	d
AUXCLK_SRCSELECT_SYS_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define AUXCLK_SRCSELECT_SYS_CLK	/;"	d
AUX_ACK	include/pc_keyb.h	/^#define AUX_ACK	/;"	d
AUX_ADDR_15_8	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_ADDR_15_8(/;"	d
AUX_ADDR_15_8	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_ADDR_15_8(/;"	d
AUX_ADDR_19_16	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_ADDR_19_16(/;"	d
AUX_ADDR_19_16	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_ADDR_19_16(/;"	d
AUX_ADDR_7_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_ADDR_7_0(/;"	d
AUX_ADDR_7_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_ADDR_7_0(/;"	d
AUX_BIT_PERIOD_EXPECTED_DELAY	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_BIT_PERIOD_EXPECTED_DELAY(/;"	d
AUX_BLOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	AUX_BLOCK,$/;"	e	enum:analog_power_block
AUX_BLOCK	arch/arm/mach-exynos/include/mach/dp_info.h	/^	AUX_BLOCK,$/;"	e	enum:analog_power_block
AUX_BUF_SIZE	include/pc_keyb.h	/^#define AUX_BUF_SIZE	/;"	d
AUX_BUSY	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_BUSY	/;"	d
AUX_BUSY	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_BUSY	/;"	d
AUX_DISABLE_DEV	include/pc_keyb.h	/^#define AUX_DISABLE_DEV	/;"	d
AUX_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_EN	/;"	d
AUX_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_EN	/;"	d
AUX_ENABLE_DEV	include/pc_keyb.h	/^#define AUX_ENABLE_DEV	/;"	d
AUX_ERR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_ERR	/;"	d
AUX_ERR	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_ERR	/;"	d
AUX_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_FUNC_EN_N	/;"	d
AUX_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_FUNC_EN_N	/;"	d
AUX_GET_SCALE	include/pc_keyb.h	/^#define AUX_GET_SCALE	/;"	d
AUX_HW_RETRY_COUNT_SEL	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_HW_RETRY_COUNT_SEL(/;"	d
AUX_HW_RETRY_INTERVAL_1000_MICROSECONDS	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_HW_RETRY_INTERVAL_1000_MICROSECONDS	/;"	d
AUX_HW_RETRY_INTERVAL_1800_MICROSECONDS	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_HW_RETRY_INTERVAL_1800_MICROSECONDS	/;"	d
AUX_HW_RETRY_INTERVAL_600_MICROSECONDS	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_HW_RETRY_INTERVAL_600_MICROSECONDS	/;"	d
AUX_HW_RETRY_INTERVAL_800_MICROSECONDS	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_HW_RETRY_INTERVAL_800_MICROSECONDS	/;"	d
AUX_HW_RETRY_INTERVAL_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_HW_RETRY_INTERVAL_MASK	/;"	d
AUX_LENGTH	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_LENGTH(/;"	d
AUX_LENGTH	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_LENGTH(/;"	d
AUX_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_PD	/;"	d
AUX_RESET	include/pc_keyb.h	/^#define AUX_RESET	/;"	d
AUX_RX_COMM_AUX_DEFER	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_RX_COMM_AUX_DEFER	/;"	d
AUX_RX_COMM_AUX_DEFER	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_RX_COMM_AUX_DEFER	/;"	d
AUX_RX_COMM_I2C_DEFER	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_RX_COMM_I2C_DEFER	/;"	d
AUX_RX_COMM_I2C_DEFER	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_RX_COMM_I2C_DEFER	/;"	d
AUX_SET_RES	include/pc_keyb.h	/^#define AUX_SET_RES	/;"	d
AUX_SET_SAMPLE	include/pc_keyb.h	/^#define AUX_SET_SAMPLE	/;"	d
AUX_SET_SCALE11	include/pc_keyb.h	/^#define AUX_SET_SCALE11	/;"	d
AUX_SET_SCALE21	include/pc_keyb.h	/^#define AUX_SET_SCALE21	/;"	d
AUX_SET_STREAM	include/pc_keyb.h	/^#define AUX_SET_STREAM	/;"	d
AUX_STATUS_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_STATUS_MASK	/;"	d
AUX_STATUS_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_STATUS_MASK	/;"	d
AUX_STAT_OBF	board/mpl/common/kbd.c	/^#define AUX_STAT_OBF /;"	d	file:
AUX_STAT_OBF	include/pc_keyb.h	/^#define AUX_STAT_OBF /;"	d
AUX_TERMINAL_CTRL_102_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TERMINAL_CTRL_102_OHM	/;"	d
AUX_TERMINAL_CTRL_200_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TERMINAL_CTRL_200_OHM	/;"	d
AUX_TERMINAL_CTRL_37_5_OHM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TERMINAL_CTRL_37_5_OHM	/;"	d
AUX_TERMINAL_CTRL_45_OHM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TERMINAL_CTRL_45_OHM	/;"	d
AUX_TERMINAL_CTRL_50_OHM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TERMINAL_CTRL_50_OHM	/;"	d
AUX_TERMINAL_CTRL_52_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TERMINAL_CTRL_52_OHM	/;"	d
AUX_TERMINAL_CTRL_65_OHM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TERMINAL_CTRL_65_OHM	/;"	d
AUX_TERMINAL_CTRL_69_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TERMINAL_CTRL_69_OHM	/;"	d
AUX_TERM_50OHM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TERM_50OHM	/;"	d
AUX_TX_COMM_DP_TRANSACTION	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TX_COMM_DP_TRANSACTION	/;"	d
AUX_TX_COMM_DP_TRANSACTION	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TX_COMM_DP_TRANSACTION	/;"	d
AUX_TX_COMM_I2C_TRANSACTION	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TX_COMM_I2C_TRANSACTION	/;"	d
AUX_TX_COMM_I2C_TRANSACTION	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TX_COMM_I2C_TRANSACTION	/;"	d
AUX_TX_COMM_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TX_COMM_MASK	/;"	d
AUX_TX_COMM_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TX_COMM_MASK	/;"	d
AUX_TX_COMM_MOT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TX_COMM_MOT	/;"	d
AUX_TX_COMM_MOT	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TX_COMM_MOT	/;"	d
AUX_TX_COMM_READ	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TX_COMM_READ	/;"	d
AUX_TX_COMM_READ	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TX_COMM_READ	/;"	d
AUX_TX_COMM_WRITE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define AUX_TX_COMM_WRITE	/;"	d
AUX_TX_COMM_WRITE	arch/arm/mach-exynos/include/mach/dp.h	/^#define AUX_TX_COMM_WRITE	/;"	d
AUX_WINDOW_HORZ_CNTL	include/radeon.h	/^#define AUX_WINDOW_HORZ_CNTL	/;"	d
AUX_WINDOW_VERT_CNTL	include/radeon.h	/^#define AUX_WINDOW_VERT_CNTL	/;"	d
AVB_AVTP_CAPTURE_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_CAPTURE_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_AVTP_CAPTURE_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_CAPTURE_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_AVTP_CAPTURE_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_CAPTURE_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AVB_AVTP_MATCH_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_MATCH_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_AVTP_MATCH_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_MATCH_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_AVTP_MATCH_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_MATCH_B_MARK,$/;"	e	enum:__anona307945e0103	file:
AVB_AVTP_PPS_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_AVTP_PPS_MARK,$/;"	e	enum:__anona307945e0103	file:
AVB_COL_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_COL_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_COL_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_COL_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IERX_C_MARK, AVB_COL_MARK, VI0_VSYNC_N_MARK, SCIF0_TXD_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HSCK_MARK, SCIF_CLK_B_MARK, AVB_CRS_MARK, AUDIO_CLKC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_GTXREFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_GTXREFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_GTXREFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_GTXREFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_GTXREFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_GTXREFCLK_MARK, CAN1_RX_D_MARK, TPUTO0_B_MARK, I2C0_SDA_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_GTX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_GTX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_GTX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_GTX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF3_RXD_B_MARK, I2C4_SCL_E_MARK, AVB_GTX_CLK_MARK, SSI_WS6_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_LINK_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_LINK_GMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_LINK_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_LINK_IMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_LINK_MARK, SSI_WS78_B_MARK, HSCIF0_HCTS_N_MARK, VI0_R6_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_MAGIC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_MAGIC_GMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_MAGIC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_MAGIC_IMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_RXD_D_MARK, I2C0_SCL_E_MARK, AVB_MAGIC_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_MDC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_MDC_GMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_MDC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_MDC_IMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA7_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA7_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_MDC_MARK, SSI_SDATA6_B_MARK, HSCIF0_HRX_MARK, VI0_R4_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SCL_C_MARK, AUDIO_CLKA_B_MARK, AVB_MDIO_MARK, SSI_SCK78_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_PHY_INT_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_PHY_INT_GMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_PHY_INT_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVB_PHY_INT_IMARK,$/;"	e	enum:__anona307945e0103	file:
AVB_PHY_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_PHY_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_PHY_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_PHY_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_PHY_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_PHY_INT_MARK, SSI_SDATA8_B_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_DV_MARK, VI0_DATA1_VI0_B1_MARK, AVB_RXD0_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_DATA2_VI0_B2_MARK, AVB_RXD1_MARK, VI0_DATA3_VI0_B3_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD2_MARK, VI0_DATA4_VI0_B4_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD2_MARK, VI0_DATA4_VI0_B4_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_DATA5_VI0_B5_MARK, AVB_RXD4_MARK, VI0_DATA6_VI0_B6_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD5_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RXD6_MARK, VI0_CLKENB_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD5_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RXD6_MARK, VI0_CLKENB_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C3_SCL_MARK, SCIFA5_RXD_C_MARK, IETX_C_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CC50_STATE31_MARK, VI0_CLK_MARK, AVB_RX_CLK_MARK, VI0_DATA0_VI0_B0_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_DV_MARK, VI0_DATA1_VI0_B1_MARK, AVB_RXD0_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_ER_MARK, VI0_HSYNC_N_MARK, SCIF0_RXD_B_MARK, I2C0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SCK_B_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, ADICLK_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_FIELD_MARK, AVB_TXD2_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN0_TX_B_MARK, AVB_TXD2_MARK, ADICHS0_MARK, AD_NCS_N_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD3_MARK, ADICHS1_MARK, ETH_LINK_MARK, VI0_G5_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SS2_B_MARK, SCIF4_TXD_D_MARK, AVB_TXD4_MARK, ADICHS2_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_REFCLK_MARK, VI0_G6_MARK, SCIF2_SCK_C_MARK, AVB_TXD5_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IIC1_SCL_D_MARK, AVB_TXD6_MARK, SSI_WS5_B_MARK, ETH_TX_EN_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_R0_MARK, SCIF2_TXD_C_MARK, IIC1_SDA_D_MARK, AVB_TXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_G0_MARK, MSIOF2_RXD_B_MARK, IIC0_SCL_D_MARK, AVB_TX_CLK_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
AVB_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SDA_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_EN_MARK, ETH_MDIO_MARK,$/;"	e	enum:__anona307901d0103	file:
AVB_TX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
AVB_TX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,$/;"	e	enum:__anona307879b0103	file:
AVB_TX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
AVB_TX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TX_ER_MARK, SSI_SCK6_B_MARK, ETH_TXD0_MARK, VI0_R2_MARK,$/;"	e	enum:__anona307901d0103	file:
AVG_TRB_LENGTH_FOR_EP	drivers/usb/host/xhci.h	/^#define AVG_TRB_LENGTH_FOR_EP(/;"	d
AVIC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AVIC_BASE_ADDR	/;"	d
AVIC_INTTYPEH	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AVIC_INTTYPEH	/;"	d
AVIC_INTTYPEL	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AVIC_INTTYPEL	/;"	d
AVIC_NIMASK	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define AVIC_NIMASK	/;"	d
AVR32	arch/Kconfig	/^config AVR32$/;"	c	choice:choice07312ef30104
AVR32 architecture	arch/avr32/Kconfig	/^menu "AVR32 architecture"$/;"	m
AVS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona3077f190103	file:
AVS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona307879b0103	file:
AVS1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVS1_MARK,$/;"	e	enum:__anona307945e0103	file:
AVS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona3077f190103	file:
AVS2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona307879b0103	file:
AVS2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	AVS2_MARK,$/;"	e	enum:__anona307945e0103	file:
AVS_DEBUG_CNTR_DEFAULT_VALUE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_DEBUG_CNTR_DEFAULT_VALUE	/;"	d
AVS_DEBUG_CNTR_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_DEBUG_CNTR_REG	/;"	d
AVS_ENABLED_CONTROL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_ENABLED_CONTROL	/;"	d
AVS_HIGH_VDD_LIMIT_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_HIGH_VDD_LIMIT_MASK	/;"	d
AVS_HIGH_VDD_LIMIT_OFFS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_HIGH_VDD_LIMIT_OFFS	/;"	d
AVS_HIGH_VDD_LIMIT_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_HIGH_VDD_LIMIT_VAL	/;"	d
AVS_LOW_VDD_LIMIT_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_LOW_VDD_LIMIT_MASK	/;"	d
AVS_LOW_VDD_LIMIT_OFFS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_LOW_VDD_LIMIT_OFFS	/;"	d
AVS_LOW_VDD_LIMIT_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define AVS_LOW_VDD_LIMIT_VAL	/;"	d
AWA_DUMMY_READ	arch/blackfin/cpu/gpio.c	/^#define AWA_DUMMY_READ(/;"	d	file:
AWA_both	arch/blackfin/cpu/gpio.c	/^	AWA_both = SPORT1_STAT,$/;"	e	enum:__anonb4c211320103	file:
AWA_data	arch/blackfin/cpu/gpio.c	/^	AWA_data = SYSCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_data_clear	arch/blackfin/cpu/gpio.c	/^	AWA_data_clear = SYSCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_data_set	arch/blackfin/cpu/gpio.c	/^	AWA_data_set = SYSCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_dir	arch/blackfin/cpu/gpio.c	/^	AWA_dir = SPORT1_STAT,$/;"	e	enum:__anonb4c211320103	file:
AWA_edge	arch/blackfin/cpu/gpio.c	/^	AWA_edge = SPORT1_STAT,$/;"	e	enum:__anonb4c211320103	file:
AWA_inen	arch/blackfin/cpu/gpio.c	/^	AWA_inen = TIMER_ENABLE,$/;"	e	enum:__anonb4c211320103	file:
AWA_maska	arch/blackfin/cpu/gpio.c	/^	AWA_maska = UART_SCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_maska_clear	arch/blackfin/cpu/gpio.c	/^	AWA_maska_clear = UART_SCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_maska_set	arch/blackfin/cpu/gpio.c	/^	AWA_maska_set = UART_SCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_maska_toggle	arch/blackfin/cpu/gpio.c	/^	AWA_maska_toggle = UART_SCR,$/;"	e	enum:__anonb4c211320103	file:
AWA_maskb	arch/blackfin/cpu/gpio.c	/^	AWA_maskb = UART_GCTL,$/;"	e	enum:__anonb4c211320103	file:
AWA_maskb_clear	arch/blackfin/cpu/gpio.c	/^	AWA_maskb_clear = UART_GCTL,$/;"	e	enum:__anonb4c211320103	file:
AWA_maskb_set	arch/blackfin/cpu/gpio.c	/^	AWA_maskb_set = UART_GCTL,$/;"	e	enum:__anonb4c211320103	file:
AWA_maskb_toggle	arch/blackfin/cpu/gpio.c	/^	AWA_maskb_toggle = UART_GCTL,$/;"	e	enum:__anonb4c211320103	file:
AWA_polar	arch/blackfin/cpu/gpio.c	/^	AWA_polar = SPORT1_STAT,$/;"	e	enum:__anonb4c211320103	file:
AWA_toggle	arch/blackfin/cpu/gpio.c	/^	AWA_toggle = SYSCR,$/;"	e	enum:__anonb4c211320103	file:
AWK	Makefile	/^AWK		= awk$/;"	m
AWR_ON	arch/arm/mach-exynos/exynos4_setup.h	/^#define AWR_ON	/;"	d
AX88178_MEDIUM_DEFAULT	drivers/usb/eth/asix.c	/^#define AX88178_MEDIUM_DEFAULT	/;"	d	file:
AX88179_BULKIN_SIZE	drivers/usb/eth/asix88179.c	/^} AX88179_BULKIN_SIZE[] =	{$/;"	v	typeref:typename:const struct __anond17683530108[]
AX88179_EEPROM_MAGIC	drivers/usb/eth/asix88179.c	/^#define AX88179_EEPROM_MAGIC	/;"	d	file:
AX88179_PHY_ID	drivers/usb/eth/asix88179.c	/^#define AX88179_PHY_ID	/;"	d	file:
AX88180_BASE	include/configs/blackvme.h	/^#define AX88180_BASE	/;"	d
AX88180_BASE	include/configs/ibf-dsp561.h	/^#define AX88180_BASE	/;"	d
AX88180_MEMORY_SIZE	drivers/net/ax88180.h	/^  #define AX88180_MEMORY_SIZE	/;"	d
AX88772_IPG0_DEFAULT	drivers/usb/eth/asix.c	/^#define AX88772_IPG0_DEFAULT	/;"	d	file:
AX88772_IPG1_DEFAULT	drivers/usb/eth/asix.c	/^#define AX88772_IPG1_DEFAULT	/;"	d	file:
AX88772_IPG2_DEFAULT	drivers/usb/eth/asix.c	/^#define AX88772_IPG2_DEFAULT	/;"	d	file:
AX88772_MEDIUM_DEFAULT	drivers/usb/eth/asix.c	/^#define AX88772_MEDIUM_DEFAULT	/;"	d	file:
AX88796L_ADDRESS_BYTE	drivers/net/ax88796.h	/^#define AX88796L_ADDRESS_BYTE	/;"	d
AX88796L_BASE_ADDRESS	drivers/net/ax88796.h	/^#define AX88796L_BASE_ADDRESS	/;"	d
AX88796L_BYTE_ACCESS	drivers/net/ax88796.h	/^#define AX88796L_BYTE_ACCESS	/;"	d
AX88796L_CR	drivers/net/ax88796.h	/^#define AX88796L_CR	/;"	d
AX88796L_MEMR	drivers/net/ax88796.h	/^#define AX88796L_MEMR	/;"	d
AX88796L_OFFSET	drivers/net/ax88796.h	/^#define AX88796L_OFFSET	/;"	d
AX88796L_REG_CR	drivers/net/ax88796.h	/^#define AX88796L_REG_CR	/;"	d
AX88796L_REG_MEMR	drivers/net/ax88796.h	/^#define AX88796L_REG_MEMR	/;"	d
AXBS_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define AXBS_BASE_ADDR	/;"	d
AXC003_CREG_CPU_START	board/synopsys/axs10x/axs10x.c	/^#define AXC003_CREG_CPU_START	/;"	d	file:
AXI0_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI0_DIV_SHIFT	/;"	d
AXI0_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI0_DIV_SHIFT	/;"	d
AXI1_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI1_DIV_SHIFT	/;"	d
AXI1_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI1_DIV_SHIFT	/;"	d
AXIM_FLASH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define AXIM_FLASH_BASE	/;"	d
AXI_DIV_1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AXI_DIV_1	/;"	d
AXI_DIV_1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AXI_DIV_1	/;"	d
AXI_DIV_1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI_DIV_1	/;"	d
AXI_DIV_1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AXI_DIV_1	/;"	d
AXI_DIV_1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AXI_DIV_1	/;"	d
AXI_DIV_1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI_DIV_1	/;"	d
AXI_DIV_2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AXI_DIV_2	/;"	d
AXI_DIV_2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AXI_DIV_2	/;"	d
AXI_DIV_2	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI_DIV_2	/;"	d
AXI_DIV_2	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AXI_DIV_2	/;"	d
AXI_DIV_2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AXI_DIV_2	/;"	d
AXI_DIV_2	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI_DIV_2	/;"	d
AXI_DIV_3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AXI_DIV_3	/;"	d
AXI_DIV_3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AXI_DIV_3	/;"	d
AXI_DIV_3	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI_DIV_3	/;"	d
AXI_DIV_3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AXI_DIV_3	/;"	d
AXI_DIV_3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AXI_DIV_3	/;"	d
AXI_DIV_3	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI_DIV_3	/;"	d
AXI_DIV_4	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AXI_DIV_4	/;"	d
AXI_DIV_4	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AXI_DIV_4	/;"	d
AXI_DIV_4	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI_DIV_4	/;"	d
AXI_DIV_4	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AXI_DIV_4	/;"	d
AXI_DIV_4	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AXI_DIV_4	/;"	d
AXI_DIV_4	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI_DIV_4	/;"	d
AXI_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define AXI_DIV_SHIFT	/;"	d
AXI_DIV_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AXI_DIV_SHIFT	/;"	d
AXI_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define AXI_DIV_SHIFT	/;"	d
AXI_DIV_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AXI_DIV_SHIFT	/;"	d
AXI_GATE_OFFSET_DRAM	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define AXI_GATE_OFFSET_DRAM	/;"	d
AXI_GATE_OFFSET_DRAM	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define AXI_GATE_OFFSET_DRAM	/;"	d
AXI_GATE_OFFSET_DRAM	arch/arm/include/asm/arch/clock_sun6i.h	/^#define AXI_GATE_OFFSET_DRAM	/;"	d
AXI_GATE_OFFSET_DRAM	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define AXI_GATE_OFFSET_DRAM	/;"	d
AXP152_CHIP_VERSION	include/axp152.h	/^	AXP152_CHIP_VERSION = 0x3,$/;"	e	enum:axp152_reg
AXP152_DCDC2_VOLTAGE	include/axp152.h	/^	AXP152_DCDC2_VOLTAGE = 0x23,$/;"	e	enum:axp152_reg
AXP152_DCDC3_VOLTAGE	include/axp152.h	/^	AXP152_DCDC3_VOLTAGE = 0x27,$/;"	e	enum:axp152_reg
AXP152_DCDC4_VOLTAGE	include/axp152.h	/^	AXP152_DCDC4_VOLTAGE = 0x2B,$/;"	e	enum:axp152_reg
AXP152_I2C_ADDR	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP152_I2C_ADDR	/;"	d	file:
AXP152_LDO2_VOLTAGE	include/axp152.h	/^	AXP152_LDO2_VOLTAGE = 0x2A,$/;"	e	enum:axp152_reg
AXP152_POWER	drivers/power/Kconfig	/^config AXP152_POWER$/;"	c	choice:Power""choice187d87300104
AXP152_POWEROFF	include/axp152.h	/^#define AXP152_POWEROFF	/;"	d
AXP152_SHUTDOWN	include/axp152.h	/^	AXP152_SHUTDOWN = 0x32,$/;"	e	enum:axp152_reg
AXP209_CHIP_VERSION	include/axp209.h	/^	AXP209_CHIP_VERSION = 0x03,$/;"	e	enum:axp209_reg
AXP209_DCDC2_VOLTAGE	include/axp209.h	/^	AXP209_DCDC2_VOLTAGE = 0x23,$/;"	e	enum:axp209_reg
AXP209_DCDC3_VOLTAGE	include/axp209.h	/^	AXP209_DCDC3_VOLTAGE = 0x27,$/;"	e	enum:axp209_reg
AXP209_I2C_ADDR	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP209_I2C_ADDR	/;"	d	file:
AXP209_IRQ5_PEK_DOWN	include/axp209.h	/^#define AXP209_IRQ5_PEK_DOWN	/;"	d
AXP209_IRQ5_PEK_UP	include/axp209.h	/^#define AXP209_IRQ5_PEK_UP	/;"	d
AXP209_IRQ_ENABLE1	include/axp209.h	/^	AXP209_IRQ_ENABLE1 = 0x40,$/;"	e	enum:axp209_reg
AXP209_IRQ_ENABLE2	include/axp209.h	/^	AXP209_IRQ_ENABLE2 = 0x41,$/;"	e	enum:axp209_reg
AXP209_IRQ_ENABLE3	include/axp209.h	/^	AXP209_IRQ_ENABLE3 = 0x42,$/;"	e	enum:axp209_reg
AXP209_IRQ_ENABLE4	include/axp209.h	/^	AXP209_IRQ_ENABLE4 = 0x43,$/;"	e	enum:axp209_reg
AXP209_IRQ_ENABLE5	include/axp209.h	/^	AXP209_IRQ_ENABLE5 = 0x44,$/;"	e	enum:axp209_reg
AXP209_IRQ_STATUS5	include/axp209.h	/^	AXP209_IRQ_STATUS5 = 0x4c,$/;"	e	enum:axp209_reg
AXP209_LDO24_VOLTAGE	include/axp209.h	/^	AXP209_LDO24_VOLTAGE = 0x28,$/;"	e	enum:axp209_reg
AXP209_LDO3_VOLTAGE	include/axp209.h	/^	AXP209_LDO3_VOLTAGE = 0x29,$/;"	e	enum:axp209_reg
AXP209_OUTPUT_CTRL	include/axp209.h	/^	AXP209_OUTPUT_CTRL = 0x12,$/;"	e	enum:axp209_reg
AXP209_OUTPUT_CTRL_DCDC2	include/axp209.h	/^#define AXP209_OUTPUT_CTRL_DCDC2	/;"	d
AXP209_OUTPUT_CTRL_DCDC3	include/axp209.h	/^#define AXP209_OUTPUT_CTRL_DCDC3	/;"	d
AXP209_OUTPUT_CTRL_EXTEN	include/axp209.h	/^#define AXP209_OUTPUT_CTRL_EXTEN	/;"	d
AXP209_OUTPUT_CTRL_LDO2	include/axp209.h	/^#define AXP209_OUTPUT_CTRL_LDO2	/;"	d
AXP209_OUTPUT_CTRL_LDO3	include/axp209.h	/^#define AXP209_OUTPUT_CTRL_LDO3	/;"	d
AXP209_OUTPUT_CTRL_LDO4	include/axp209.h	/^#define AXP209_OUTPUT_CTRL_LDO4	/;"	d
AXP209_POWER	drivers/power/Kconfig	/^config AXP209_POWER$/;"	c	choice:Power""choice187d87300104
AXP209_POWEROFF	include/axp209.h	/^#define AXP209_POWEROFF	/;"	d
AXP209_POWER_STATUS	include/axp209.h	/^	AXP209_POWER_STATUS = 0x00,$/;"	e	enum:axp209_reg
AXP209_POWER_STATUS_ON_BY_DC	include/axp209.h	/^#define AXP209_POWER_STATUS_ON_BY_DC	/;"	d
AXP209_POWER_STATUS_VBUS_USABLE	include/axp209.h	/^#define AXP209_POWER_STATUS_VBUS_USABLE	/;"	d
AXP209_SHUTDOWN	include/axp209.h	/^	AXP209_SHUTDOWN = 0x32,$/;"	e	enum:axp209_reg
AXP221_ALDO1_CTRL	include/axp221.h	/^#define AXP221_ALDO1_CTRL	/;"	d
AXP221_ALDO2_CTRL	include/axp221.h	/^#define AXP221_ALDO2_CTRL	/;"	d
AXP221_ALDO3_CTRL	include/axp221.h	/^#define AXP221_ALDO3_CTRL	/;"	d
AXP221_CHIP_ADDR	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP221_CHIP_ADDR	/;"	d	file:
AXP221_CHIP_ID	include/axp221.h	/^#define AXP221_CHIP_ID	/;"	d
AXP221_CTRL_ADDR	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP221_CTRL_ADDR	/;"	d	file:
AXP221_DCDC1_CTRL	include/axp221.h	/^#define AXP221_DCDC1_CTRL	/;"	d
AXP221_DCDC2_CTRL	include/axp221.h	/^#define AXP221_DCDC2_CTRL	/;"	d
AXP221_DCDC3_CTRL	include/axp221.h	/^#define AXP221_DCDC3_CTRL	/;"	d
AXP221_DCDC4_CTRL	include/axp221.h	/^#define AXP221_DCDC4_CTRL	/;"	d
AXP221_DCDC5_CTRL	include/axp221.h	/^#define AXP221_DCDC5_CTRL	/;"	d
AXP221_DLDO1_CTRL	include/axp221.h	/^#define AXP221_DLDO1_CTRL	/;"	d
AXP221_DLDO2_CTRL	include/axp221.h	/^#define AXP221_DLDO2_CTRL	/;"	d
AXP221_DLDO3_CTRL	include/axp221.h	/^#define AXP221_DLDO3_CTRL	/;"	d
AXP221_DLDO4_CTRL	include/axp221.h	/^#define AXP221_DLDO4_CTRL	/;"	d
AXP221_ELDO1_CTRL	include/axp221.h	/^#define AXP221_ELDO1_CTRL	/;"	d
AXP221_ELDO2_CTRL	include/axp221.h	/^#define AXP221_ELDO2_CTRL	/;"	d
AXP221_ELDO3_CTRL	include/axp221.h	/^#define AXP221_ELDO3_CTRL	/;"	d
AXP221_INIT_DATA	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP221_INIT_DATA	/;"	d	file:
AXP221_OUTPUT_CTRL1	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1	/;"	d
AXP221_OUTPUT_CTRL1_ALDO1_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_ALDO1_EN	/;"	d
AXP221_OUTPUT_CTRL1_ALDO2_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_ALDO2_EN	/;"	d
AXP221_OUTPUT_CTRL1_DCDC0_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_DCDC0_EN	/;"	d
AXP221_OUTPUT_CTRL1_DCDC1_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_DCDC1_EN	/;"	d
AXP221_OUTPUT_CTRL1_DCDC2_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_DCDC2_EN	/;"	d
AXP221_OUTPUT_CTRL1_DCDC3_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_DCDC3_EN	/;"	d
AXP221_OUTPUT_CTRL1_DCDC4_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_DCDC4_EN	/;"	d
AXP221_OUTPUT_CTRL1_DCDC5_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL1_DCDC5_EN	/;"	d
AXP221_OUTPUT_CTRL2	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2	/;"	d
AXP221_OUTPUT_CTRL2_DCDC1SW_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_DCDC1SW_EN	/;"	d
AXP221_OUTPUT_CTRL2_DLDO1_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_DLDO1_EN	/;"	d
AXP221_OUTPUT_CTRL2_DLDO2_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_DLDO2_EN	/;"	d
AXP221_OUTPUT_CTRL2_DLDO3_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_DLDO3_EN	/;"	d
AXP221_OUTPUT_CTRL2_DLDO4_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_DLDO4_EN	/;"	d
AXP221_OUTPUT_CTRL2_ELDO1_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_ELDO1_EN	/;"	d
AXP221_OUTPUT_CTRL2_ELDO2_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_ELDO2_EN	/;"	d
AXP221_OUTPUT_CTRL2_ELDO3_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL2_ELDO3_EN	/;"	d
AXP221_OUTPUT_CTRL3	include/axp221.h	/^#define AXP221_OUTPUT_CTRL3	/;"	d
AXP221_OUTPUT_CTRL3_ALDO3_EN	include/axp221.h	/^#define AXP221_OUTPUT_CTRL3_ALDO3_EN	/;"	d
AXP221_PAGE	include/axp221.h	/^#define AXP221_PAGE	/;"	d
AXP221_POWER	drivers/power/Kconfig	/^config AXP221_POWER$/;"	c	choice:Power""choice187d87300104
AXP221_SHUTDOWN	include/axp221.h	/^#define AXP221_SHUTDOWN	/;"	d
AXP221_SHUTDOWN_POWEROFF	include/axp221.h	/^#define AXP221_SHUTDOWN_POWEROFF	/;"	d
AXP221_SID	include/axp221.h	/^#define AXP221_SID	/;"	d
AXP223_DEVICE_ADDR	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP223_DEVICE_ADDR	/;"	d	file:
AXP223_RUNTIME_ADDR	arch/arm/mach-sunxi/pmic_bus.c	/^#define AXP223_RUNTIME_ADDR	/;"	d	file:
AXP809_ALDO1_CTRL	include/axp809.h	/^#define AXP809_ALDO1_CTRL	/;"	d
AXP809_ALDO2_CTRL	include/axp809.h	/^#define AXP809_ALDO2_CTRL	/;"	d
AXP809_ALDO3_CTRL	include/axp809.h	/^#define AXP809_ALDO3_CTRL	/;"	d
AXP809_CHIP_ID	include/axp809.h	/^#define AXP809_CHIP_ID	/;"	d
AXP809_DC5LDO_CTRL	include/axp809.h	/^#define AXP809_DC5LDO_CTRL	/;"	d
AXP809_DCDC1_CTRL	include/axp809.h	/^#define AXP809_DCDC1_CTRL	/;"	d
AXP809_DCDC2_CTRL	include/axp809.h	/^#define AXP809_DCDC2_CTRL	/;"	d
AXP809_DCDC3_CTRL	include/axp809.h	/^#define AXP809_DCDC3_CTRL	/;"	d
AXP809_DCDC4_CTRL	include/axp809.h	/^#define AXP809_DCDC4_CTRL	/;"	d
AXP809_DCDC5_CTRL	include/axp809.h	/^#define AXP809_DCDC5_CTRL	/;"	d
AXP809_DLDO1_CTRL	include/axp809.h	/^#define AXP809_DLDO1_CTRL	/;"	d
AXP809_DLDO2_CTRL	include/axp809.h	/^#define AXP809_DLDO2_CTRL	/;"	d
AXP809_ELDO1_CTRL	include/axp809.h	/^#define AXP809_ELDO1_CTRL	/;"	d
AXP809_ELDO2_CTRL	include/axp809.h	/^#define AXP809_ELDO2_CTRL	/;"	d
AXP809_ELDO3_CTRL	include/axp809.h	/^#define AXP809_ELDO3_CTRL	/;"	d
AXP809_OUTPUT_CTRL1	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1	/;"	d
AXP809_OUTPUT_CTRL1_ALDO1_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_ALDO1_EN	/;"	d
AXP809_OUTPUT_CTRL1_ALDO2_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_ALDO2_EN	/;"	d
AXP809_OUTPUT_CTRL1_DC5LDO_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_DC5LDO_EN	/;"	d
AXP809_OUTPUT_CTRL1_DCDC1_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_DCDC1_EN	/;"	d
AXP809_OUTPUT_CTRL1_DCDC2_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_DCDC2_EN	/;"	d
AXP809_OUTPUT_CTRL1_DCDC3_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_DCDC3_EN	/;"	d
AXP809_OUTPUT_CTRL1_DCDC4_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_DCDC4_EN	/;"	d
AXP809_OUTPUT_CTRL1_DCDC5_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL1_DCDC5_EN	/;"	d
AXP809_OUTPUT_CTRL2	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2	/;"	d
AXP809_OUTPUT_CTRL2_ALDO3_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_ALDO3_EN	/;"	d
AXP809_OUTPUT_CTRL2_DC1SW_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_DC1SW_EN	/;"	d
AXP809_OUTPUT_CTRL2_DLDO1_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_DLDO1_EN	/;"	d
AXP809_OUTPUT_CTRL2_DLDO2_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_DLDO2_EN	/;"	d
AXP809_OUTPUT_CTRL2_ELDO1_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_ELDO1_EN	/;"	d
AXP809_OUTPUT_CTRL2_ELDO2_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_ELDO2_EN	/;"	d
AXP809_OUTPUT_CTRL2_ELDO3_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_ELDO3_EN	/;"	d
AXP809_OUTPUT_CTRL2_SWOUT_EN	include/axp809.h	/^#define AXP809_OUTPUT_CTRL2_SWOUT_EN	/;"	d
AXP809_POWER	drivers/power/Kconfig	/^config AXP809_POWER$/;"	c	choice:Power""choice187d87300104
AXP809_SHUTDOWN	include/axp809.h	/^#define AXP809_SHUTDOWN	/;"	d
AXP809_SHUTDOWN_POWEROFF	include/axp809.h	/^#define AXP809_SHUTDOWN_POWEROFF	/;"	d
AXP818_ALDO1_CTRL	include/axp818.h	/^#define AXP818_ALDO1_CTRL	/;"	d
AXP818_ALDO2_CTRL	include/axp818.h	/^#define AXP818_ALDO2_CTRL	/;"	d
AXP818_ALDO3_CTRL	include/axp818.h	/^#define AXP818_ALDO3_CTRL	/;"	d
AXP818_CHIP_ID	include/axp818.h	/^#define AXP818_CHIP_ID	/;"	d
AXP818_DCDC1_CTRL	include/axp818.h	/^#define AXP818_DCDC1_CTRL	/;"	d
AXP818_DCDC2_CTRL	include/axp818.h	/^#define AXP818_DCDC2_CTRL	/;"	d
AXP818_DCDC3_CTRL	include/axp818.h	/^#define AXP818_DCDC3_CTRL	/;"	d
AXP818_DCDC4_CTRL	include/axp818.h	/^#define AXP818_DCDC4_CTRL	/;"	d
AXP818_DCDC5_CTRL	include/axp818.h	/^#define AXP818_DCDC5_CTRL	/;"	d
AXP818_DCDC6_CTRL	include/axp818.h	/^#define AXP818_DCDC6_CTRL	/;"	d
AXP818_DCDC7_CTRL	include/axp818.h	/^#define AXP818_DCDC7_CTRL	/;"	d
AXP818_DLDO1_CTRL	include/axp818.h	/^#define AXP818_DLDO1_CTRL	/;"	d
AXP818_DLDO2_CTRL	include/axp818.h	/^#define AXP818_DLDO2_CTRL	/;"	d
AXP818_DLDO3_CTRL	include/axp818.h	/^#define AXP818_DLDO3_CTRL	/;"	d
AXP818_DLDO4_CTRL	include/axp818.h	/^#define AXP818_DLDO4_CTRL	/;"	d
AXP818_ELDO1_CTRL	include/axp818.h	/^#define AXP818_ELDO1_CTRL	/;"	d
AXP818_ELDO2_CTRL	include/axp818.h	/^#define AXP818_ELDO2_CTRL	/;"	d
AXP818_ELDO3_CTRL	include/axp818.h	/^#define AXP818_ELDO3_CTRL	/;"	d
AXP818_FLDO1_CTRL	include/axp818.h	/^#define AXP818_FLDO1_CTRL	/;"	d
AXP818_FLDO2_3_CTRL	include/axp818.h	/^#define AXP818_FLDO2_3_CTRL	/;"	d
AXP818_FLDO2_3_CTRL_FLDO3_VOL	include/axp818.h	/^#define AXP818_FLDO2_3_CTRL_FLDO3_VOL	/;"	d
AXP818_OUTPUT_CTRL1	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1	/;"	d
AXP818_OUTPUT_CTRL1_DCDC1_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC1_EN	/;"	d
AXP818_OUTPUT_CTRL1_DCDC2_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC2_EN	/;"	d
AXP818_OUTPUT_CTRL1_DCDC3_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC3_EN	/;"	d
AXP818_OUTPUT_CTRL1_DCDC4_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC4_EN	/;"	d
AXP818_OUTPUT_CTRL1_DCDC5_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC5_EN	/;"	d
AXP818_OUTPUT_CTRL1_DCDC6_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC6_EN	/;"	d
AXP818_OUTPUT_CTRL1_DCDC7_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL1_DCDC7_EN	/;"	d
AXP818_OUTPUT_CTRL2	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2	/;"	d
AXP818_OUTPUT_CTRL2_DLDO1_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_DLDO1_EN	/;"	d
AXP818_OUTPUT_CTRL2_DLDO2_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_DLDO2_EN	/;"	d
AXP818_OUTPUT_CTRL2_DLDO3_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_DLDO3_EN	/;"	d
AXP818_OUTPUT_CTRL2_DLDO4_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_DLDO4_EN	/;"	d
AXP818_OUTPUT_CTRL2_ELDO1_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_ELDO1_EN	/;"	d
AXP818_OUTPUT_CTRL2_ELDO2_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_ELDO2_EN	/;"	d
AXP818_OUTPUT_CTRL2_ELDO3_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_ELDO3_EN	/;"	d
AXP818_OUTPUT_CTRL2_SW_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL2_SW_EN	/;"	d
AXP818_OUTPUT_CTRL3	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3	/;"	d
AXP818_OUTPUT_CTRL3_ALDO1_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3_ALDO1_EN	/;"	d
AXP818_OUTPUT_CTRL3_ALDO2_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3_ALDO2_EN	/;"	d
AXP818_OUTPUT_CTRL3_ALDO3_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3_ALDO3_EN	/;"	d
AXP818_OUTPUT_CTRL3_FLDO1_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3_FLDO1_EN	/;"	d
AXP818_OUTPUT_CTRL3_FLDO2_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3_FLDO2_EN	/;"	d
AXP818_OUTPUT_CTRL3_FLDO3_EN	include/axp818.h	/^#define AXP818_OUTPUT_CTRL3_FLDO3_EN	/;"	d
AXP818_POWER	drivers/power/Kconfig	/^config AXP818_POWER$/;"	c	choice:Power""choice187d87300104
AXP818_SHUTDOWN	include/axp818.h	/^#define AXP818_SHUTDOWN	/;"	d
AXP818_SHUTDOWN_POWEROFF	include/axp818.h	/^#define AXP818_SHUTDOWN_POWEROFF	/;"	d
AXP_ALDO1_VOLT	drivers/power/Kconfig	/^config AXP_ALDO1_VOLT$/;"	c	menu:Power
AXP_ALDO2_VOLT	drivers/power/Kconfig	/^config AXP_ALDO2_VOLT$/;"	c	menu:Power
AXP_ALDO3_VOLT	drivers/power/Kconfig	/^config AXP_ALDO3_VOLT$/;"	c	menu:Power
AXP_ALDO4_VOLT	drivers/power/Kconfig	/^config AXP_ALDO4_VOLT$/;"	c	menu:Power
AXP_DCDC1_VOLT	drivers/power/Kconfig	/^config AXP_DCDC1_VOLT$/;"	c	menu:Power
AXP_DCDC2_VOLT	drivers/power/Kconfig	/^config AXP_DCDC2_VOLT$/;"	c	menu:Power
AXP_DCDC3_VOLT	drivers/power/Kconfig	/^config AXP_DCDC3_VOLT$/;"	c	menu:Power
AXP_DCDC4_VOLT	drivers/power/Kconfig	/^config AXP_DCDC4_VOLT$/;"	c	menu:Power
AXP_DCDC5_VOLT	drivers/power/Kconfig	/^config AXP_DCDC5_VOLT$/;"	c	menu:Power
AXP_DLDO1_VOLT	drivers/power/Kconfig	/^config AXP_DLDO1_VOLT$/;"	c	menu:Power
AXP_DLDO2_VOLT	drivers/power/Kconfig	/^config AXP_DLDO2_VOLT$/;"	c	menu:Power
AXP_DLDO3_VOLT	drivers/power/Kconfig	/^config AXP_DLDO3_VOLT$/;"	c	menu:Power
AXP_DLDO4_VOLT	drivers/power/Kconfig	/^config AXP_DLDO4_VOLT$/;"	c	menu:Power
AXP_ELDO1_VOLT	drivers/power/Kconfig	/^config AXP_ELDO1_VOLT$/;"	c	menu:Power
AXP_ELDO2_VOLT	drivers/power/Kconfig	/^config AXP_ELDO2_VOLT$/;"	c	menu:Power
AXP_ELDO3_VOLT	drivers/power/Kconfig	/^config AXP_ELDO3_VOLT$/;"	c	menu:Power
AXP_FLDO1_VOLT	drivers/power/Kconfig	/^config AXP_FLDO1_VOLT$/;"	c	menu:Power
AXP_FLDO2_VOLT	drivers/power/Kconfig	/^config AXP_FLDO2_VOLT$/;"	c	menu:Power
AXP_FLDO3_VOLT	drivers/power/Kconfig	/^config AXP_FLDO3_VOLT$/;"	c	menu:Power
AXP_GPIO	board/sunxi/Kconfig	/^config AXP_GPIO$/;"	c
AXP_GPIO0_CTRL	include/axp152.h	/^#define AXP_GPIO0_CTRL	/;"	d
AXP_GPIO0_CTRL	include/axp209.h	/^#define AXP_GPIO0_CTRL	/;"	d
AXP_GPIO0_CTRL	include/axp221.h	/^#define AXP_GPIO0_CTRL	/;"	d
AXP_GPIO0_CTRL	include/axp809.h	/^#define AXP_GPIO0_CTRL	/;"	d
AXP_GPIO0_CTRL	include/axp818.h	/^#define AXP_GPIO0_CTRL	/;"	d
AXP_GPIO1_CTRL	include/axp152.h	/^#define AXP_GPIO1_CTRL	/;"	d
AXP_GPIO1_CTRL	include/axp209.h	/^#define AXP_GPIO1_CTRL	/;"	d
AXP_GPIO1_CTRL	include/axp221.h	/^#define AXP_GPIO1_CTRL	/;"	d
AXP_GPIO1_CTRL	include/axp809.h	/^#define AXP_GPIO1_CTRL	/;"	d
AXP_GPIO1_CTRL	include/axp818.h	/^#define AXP_GPIO1_CTRL	/;"	d
AXP_GPIO2_CTRL	include/axp152.h	/^#define AXP_GPIO2_CTRL	/;"	d
AXP_GPIO2_CTRL	include/axp209.h	/^#define AXP_GPIO2_CTRL	/;"	d
AXP_GPIO3_CTRL	include/axp152.h	/^#define AXP_GPIO3_CTRL	/;"	d
AXP_GPIO_CTRL_INPUT	include/axp152.h	/^#define AXP_GPIO_CTRL_INPUT	/;"	d
AXP_GPIO_CTRL_INPUT	include/axp209.h	/^#define AXP_GPIO_CTRL_INPUT	/;"	d
AXP_GPIO_CTRL_INPUT	include/axp221.h	/^#define AXP_GPIO_CTRL_INPUT	/;"	d
AXP_GPIO_CTRL_INPUT	include/axp809.h	/^#define AXP_GPIO_CTRL_INPUT	/;"	d
AXP_GPIO_CTRL_INPUT	include/axp818.h	/^#define AXP_GPIO_CTRL_INPUT	/;"	d
AXP_GPIO_CTRL_OUTPUT_HIGH	include/axp152.h	/^#define AXP_GPIO_CTRL_OUTPUT_HIGH	/;"	d
AXP_GPIO_CTRL_OUTPUT_HIGH	include/axp209.h	/^#define AXP_GPIO_CTRL_OUTPUT_HIGH	/;"	d
AXP_GPIO_CTRL_OUTPUT_HIGH	include/axp221.h	/^#define AXP_GPIO_CTRL_OUTPUT_HIGH	/;"	d
AXP_GPIO_CTRL_OUTPUT_HIGH	include/axp809.h	/^#define AXP_GPIO_CTRL_OUTPUT_HIGH	/;"	d
AXP_GPIO_CTRL_OUTPUT_HIGH	include/axp818.h	/^#define AXP_GPIO_CTRL_OUTPUT_HIGH	/;"	d
AXP_GPIO_CTRL_OUTPUT_LOW	include/axp152.h	/^#define AXP_GPIO_CTRL_OUTPUT_LOW	/;"	d
AXP_GPIO_CTRL_OUTPUT_LOW	include/axp209.h	/^#define AXP_GPIO_CTRL_OUTPUT_LOW	/;"	d
AXP_GPIO_CTRL_OUTPUT_LOW	include/axp221.h	/^#define AXP_GPIO_CTRL_OUTPUT_LOW	/;"	d
AXP_GPIO_CTRL_OUTPUT_LOW	include/axp809.h	/^#define AXP_GPIO_CTRL_OUTPUT_LOW	/;"	d
AXP_GPIO_CTRL_OUTPUT_LOW	include/axp818.h	/^#define AXP_GPIO_CTRL_OUTPUT_LOW	/;"	d
AXP_GPIO_STATE	include/axp152.h	/^#define AXP_GPIO_STATE	/;"	d
AXP_GPIO_STATE	include/axp209.h	/^#define AXP_GPIO_STATE	/;"	d
AXP_GPIO_STATE	include/axp221.h	/^#define AXP_GPIO_STATE	/;"	d
AXP_GPIO_STATE	include/axp809.h	/^#define AXP_GPIO_STATE	/;"	d
AXP_GPIO_STATE	include/axp818.h	/^#define AXP_GPIO_STATE	/;"	d
AXP_GPIO_STATE_OFFSET	include/axp152.h	/^#define AXP_GPIO_STATE_OFFSET	/;"	d
AXP_GPIO_STATE_OFFSET	include/axp209.h	/^#define AXP_GPIO_STATE_OFFSET	/;"	d
AXP_GPIO_STATE_OFFSET	include/axp221.h	/^#define AXP_GPIO_STATE_OFFSET	/;"	d
AXP_GPIO_STATE_OFFSET	include/axp809.h	/^#define AXP_GPIO_STATE_OFFSET	/;"	d
AXP_GPIO_STATE_OFFSET	include/axp818.h	/^#define AXP_GPIO_STATE_OFFSET	/;"	d
AXP_MISC_CTRL	include/axp221.h	/^#define AXP_MISC_CTRL	/;"	d
AXP_MISC_CTRL	include/axp809.h	/^#define AXP_MISC_CTRL	/;"	d
AXP_MISC_CTRL	include/axp818.h	/^#define AXP_MISC_CTRL	/;"	d
AXP_MISC_CTRL_N_VBUSEN_FUNC	include/axp221.h	/^#define AXP_MISC_CTRL_N_VBUSEN_FUNC	/;"	d
AXP_MISC_CTRL_N_VBUSEN_FUNC	include/axp809.h	/^#define AXP_MISC_CTRL_N_VBUSEN_FUNC	/;"	d
AXP_MISC_CTRL_N_VBUSEN_FUNC	include/axp818.h	/^#define AXP_MISC_CTRL_N_VBUSEN_FUNC	/;"	d
AXP_POWER_STATUS	include/axp209.h	/^#define AXP_POWER_STATUS	/;"	d
AXP_POWER_STATUS	include/axp221.h	/^#define AXP_POWER_STATUS	/;"	d
AXP_POWER_STATUS	include/axp809.h	/^#define AXP_POWER_STATUS	/;"	d
AXP_POWER_STATUS	include/axp818.h	/^#define AXP_POWER_STATUS	/;"	d
AXP_POWER_STATUS_VBUS_PRESENT	include/axp209.h	/^#define AXP_POWER_STATUS_VBUS_PRESENT	/;"	d
AXP_POWER_STATUS_VBUS_PRESENT	include/axp221.h	/^#define AXP_POWER_STATUS_VBUS_PRESENT	/;"	d
AXP_POWER_STATUS_VBUS_PRESENT	include/axp809.h	/^#define AXP_POWER_STATUS_VBUS_PRESENT	/;"	d
AXP_POWER_STATUS_VBUS_PRESENT	include/axp818.h	/^#define AXP_POWER_STATUS_VBUS_PRESENT	/;"	d
AXP_SW_ON	drivers/power/Kconfig	/^config AXP_SW_ON$/;"	c	menu:Power
AXP_VBUS_IPSOUT	include/axp221.h	/^#define AXP_VBUS_IPSOUT	/;"	d
AXP_VBUS_IPSOUT	include/axp809.h	/^#define AXP_VBUS_IPSOUT	/;"	d
AXP_VBUS_IPSOUT	include/axp818.h	/^#define AXP_VBUS_IPSOUT	/;"	d
AXP_VBUS_IPSOUT_DRIVEBUS	include/axp221.h	/^#define AXP_VBUS_IPSOUT_DRIVEBUS	/;"	d
AXP_VBUS_IPSOUT_DRIVEBUS	include/axp809.h	/^#define AXP_VBUS_IPSOUT_DRIVEBUS	/;"	d
AXP_VBUS_IPSOUT_DRIVEBUS	include/axp818.h	/^#define AXP_VBUS_IPSOUT_DRIVEBUS	/;"	d
AXS_MB_CREG	board/synopsys/axs10x/axs10x.c	/^#define AXS_MB_CREG	/;"	d	file:
AXS_MB_V2	board/synopsys/axs10x/axs10x.h	/^	AXS_MB_V2,$/;"	e	enum:__anon10ad4b320103
AXS_MB_V3	board/synopsys/axs10x/axs10x.h	/^	AXS_MB_V3$/;"	e	enum:__anon10ad4b320103
AX_ACCESS_EEPROM	drivers/usb/eth/asix88179.c	/^#define AX_ACCESS_EEPROM	/;"	d	file:
AX_ACCESS_EFUS	drivers/usb/eth/asix88179.c	/^#define AX_ACCESS_EFUS	/;"	d	file:
AX_ACCESS_MAC	drivers/usb/eth/asix88179.c	/^#define AX_ACCESS_MAC	/;"	d	file:
AX_ACCESS_PHY	drivers/usb/eth/asix88179.c	/^#define AX_ACCESS_PHY	/;"	d	file:
AX_CLK_SELECT	drivers/usb/eth/asix88179.c	/^#define AX_CLK_SELECT	/;"	d	file:
AX_CLK_SELECT_ACS	drivers/usb/eth/asix88179.c	/^	#define AX_CLK_SELECT_ACS	/;"	d	file:
AX_CLK_SELECT_BCS	drivers/usb/eth/asix88179.c	/^	#define AX_CLK_SELECT_BCS	/;"	d	file:
AX_CLK_SELECT_ULR	drivers/usb/eth/asix88179.c	/^	#define AX_CLK_SELECT_ULR	/;"	d	file:
AX_CMD_READ_EEPROM	drivers/usb/eth/asix.c	/^#define AX_CMD_READ_EEPROM	/;"	d	file:
AX_CMD_READ_MII_REG	drivers/usb/eth/asix.c	/^#define AX_CMD_READ_MII_REG	/;"	d	file:
AX_CMD_READ_NODE_ID	drivers/usb/eth/asix.c	/^#define AX_CMD_READ_NODE_ID	/;"	d	file:
AX_CMD_READ_PHY_ID	drivers/usb/eth/asix.c	/^#define AX_CMD_READ_PHY_ID	/;"	d	file:
AX_CMD_READ_RX_CTL	drivers/usb/eth/asix.c	/^#define AX_CMD_READ_RX_CTL	/;"	d	file:
AX_CMD_SET_HW_MII	drivers/usb/eth/asix.c	/^#define AX_CMD_SET_HW_MII	/;"	d	file:
AX_CMD_SET_SW_MII	drivers/usb/eth/asix.c	/^#define AX_CMD_SET_SW_MII	/;"	d	file:
AX_CMD_SW_PHY_SELECT	drivers/usb/eth/asix.c	/^#define AX_CMD_SW_PHY_SELECT	/;"	d	file:
AX_CMD_SW_RESET	drivers/usb/eth/asix.c	/^#define AX_CMD_SW_RESET	/;"	d	file:
AX_CMD_WRITE_GPIOS	drivers/usb/eth/asix.c	/^#define AX_CMD_WRITE_GPIOS	/;"	d	file:
AX_CMD_WRITE_IPG0	drivers/usb/eth/asix.c	/^#define AX_CMD_WRITE_IPG0	/;"	d	file:
AX_CMD_WRITE_MEDIUM_MODE	drivers/usb/eth/asix.c	/^#define AX_CMD_WRITE_MEDIUM_MODE	/;"	d	file:
AX_CMD_WRITE_MII_REG	drivers/usb/eth/asix.c	/^#define AX_CMD_WRITE_MII_REG	/;"	d	file:
AX_CMD_WRITE_NODE_ID	drivers/usb/eth/asix.c	/^#define AX_CMD_WRITE_NODE_ID	/;"	d	file:
AX_CMD_WRITE_RX_CTL	drivers/usb/eth/asix.c	/^#define AX_CMD_WRITE_RX_CTL	/;"	d	file:
AX_DEFAULT_RX_CTL	drivers/usb/eth/asix.c	/^#define AX_DEFAULT_RX_CTL	/;"	d	file:
AX_EEPROM_LEN	drivers/usb/eth/asix88179.c	/^#define AX_EEPROM_LEN	/;"	d	file:
AX_ENDPOINT_IN	drivers/usb/eth/asix88179.c	/^#define AX_ENDPOINT_IN	/;"	d	file:
AX_ENDPOINT_INT	drivers/usb/eth/asix88179.c	/^#define AX_ENDPOINT_INT	/;"	d	file:
AX_ENDPOINT_OUT	drivers/usb/eth/asix88179.c	/^#define AX_ENDPOINT_OUT	/;"	d	file:
AX_GPIO_CTRL	drivers/usb/eth/asix88179.c	/^#define AX_GPIO_CTRL	/;"	d	file:
AX_GPIO_CTRL_GPIO1EN	drivers/usb/eth/asix88179.c	/^	#define AX_GPIO_CTRL_GPIO1EN	/;"	d	file:
AX_GPIO_CTRL_GPIO2EN	drivers/usb/eth/asix88179.c	/^	#define AX_GPIO_CTRL_GPIO2EN	/;"	d	file:
AX_GPIO_CTRL_GPIO3EN	drivers/usb/eth/asix88179.c	/^	#define AX_GPIO_CTRL_GPIO3EN	/;"	d	file:
AX_GPIO_GPO2EN	drivers/usb/eth/asix.c	/^#define AX_GPIO_GPO2EN	/;"	d	file:
AX_GPIO_GPO_2	drivers/usb/eth/asix.c	/^#define AX_GPIO_GPO_2	/;"	d	file:
AX_GPIO_RSE	drivers/usb/eth/asix.c	/^#define AX_GPIO_RSE	/;"	d	file:
AX_INT_PPLS_LINK	drivers/usb/eth/asix88179.c	/^#define AX_INT_PPLS_LINK	/;"	d	file:
AX_LEDCTRL	drivers/usb/eth/asix88179.c	/^#define AX_LEDCTRL	/;"	d	file:
AX_MAX_MCAST	drivers/usb/eth/asix88179.c	/^#define AX_MAX_MCAST	/;"	d	file:
AX_MCAST_FLTSIZE	drivers/usb/eth/asix88179.c	/^#define AX_MCAST_FLTSIZE	/;"	d	file:
AX_MEDIUM_AC	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_AC	/;"	d	file:
AX_MEDIUM_ENCK	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_ENCK	/;"	d	file:
AX_MEDIUM_EN_125MHZ	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_EN_125MHZ	/;"	d	file:
AX_MEDIUM_FD	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_FD	/;"	d	file:
AX_MEDIUM_FULL_DUPLEX	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_FULL_DUPLEX	/;"	d	file:
AX_MEDIUM_GIGAMODE	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_GIGAMODE	/;"	d	file:
AX_MEDIUM_GM	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_GM	/;"	d	file:
AX_MEDIUM_JFE	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_JFE	/;"	d	file:
AX_MEDIUM_JUMBO_EN	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_JUMBO_EN	/;"	d	file:
AX_MEDIUM_PF	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_PF	/;"	d	file:
AX_MEDIUM_PS	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_PS	/;"	d	file:
AX_MEDIUM_PS	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_PS	/;"	d	file:
AX_MEDIUM_RE	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_RE	/;"	d	file:
AX_MEDIUM_RECEIVE_EN	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_RECEIVE_EN	/;"	d	file:
AX_MEDIUM_RFC	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_RFC	/;"	d	file:
AX_MEDIUM_RXFLOW_CTRLEN	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_RXFLOW_CTRLEN	/;"	d	file:
AX_MEDIUM_SBP	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_SBP	/;"	d	file:
AX_MEDIUM_SM	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_SM	/;"	d	file:
AX_MEDIUM_STATUS_MODE	drivers/usb/eth/asix88179.c	/^#define AX_MEDIUM_STATUS_MODE	/;"	d	file:
AX_MEDIUM_TFC	drivers/usb/eth/asix.c	/^#define AX_MEDIUM_TFC	/;"	d	file:
AX_MEDIUM_TXFLOW_CTRLEN	drivers/usb/eth/asix88179.c	/^	#define AX_MEDIUM_TXFLOW_CTRLEN	/;"	d	file:
AX_MONITOR_MOD	drivers/usb/eth/asix88179.c	/^#define AX_MONITOR_MOD	/;"	d	file:
AX_MONITOR_MODE_PMEPOL	drivers/usb/eth/asix88179.c	/^	#define AX_MONITOR_MODE_PMEPOL	/;"	d	file:
AX_MONITOR_MODE_PMETYPE	drivers/usb/eth/asix88179.c	/^	#define AX_MONITOR_MODE_PMETYPE	/;"	d	file:
AX_MONITOR_MODE_RWLC	drivers/usb/eth/asix88179.c	/^	#define AX_MONITOR_MODE_RWLC	/;"	d	file:
AX_MONITOR_MODE_RWMP	drivers/usb/eth/asix88179.c	/^	#define AX_MONITOR_MODE_RWMP	/;"	d	file:
AX_MULFLTARY	drivers/usb/eth/asix88179.c	/^#define AX_MULFLTARY	/;"	d	file:
AX_NODE_ID	drivers/usb/eth/asix88179.c	/^#define AX_NODE_ID	/;"	d	file:
AX_PAUSE_WATERLVL_HIGH	drivers/usb/eth/asix88179.c	/^#define AX_PAUSE_WATERLVL_HIGH	/;"	d	file:
AX_PAUSE_WATERLVL_LOW	drivers/usb/eth/asix88179.c	/^#define AX_PAUSE_WATERLVL_LOW	/;"	d	file:
AX_PHYPWR_RSTCTL	drivers/usb/eth/asix88179.c	/^#define AX_PHYPWR_RSTCTL	/;"	d	file:
AX_PHYPWR_RSTCTL_AT	drivers/usb/eth/asix88179.c	/^	#define AX_PHYPWR_RSTCTL_AT	/;"	d	file:
AX_PHYPWR_RSTCTL_BZ	drivers/usb/eth/asix88179.c	/^	#define AX_PHYPWR_RSTCTL_BZ	/;"	d	file:
AX_PHYPWR_RSTCTL_IPRL	drivers/usb/eth/asix88179.c	/^	#define AX_PHYPWR_RSTCTL_IPRL	/;"	d	file:
AX_RXCOE_CTL	drivers/usb/eth/asix88179.c	/^#define AX_RXCOE_CTL	/;"	d	file:
AX_RXCOE_IP	drivers/usb/eth/asix88179.c	/^	#define AX_RXCOE_IP	/;"	d	file:
AX_RXCOE_TCP	drivers/usb/eth/asix88179.c	/^	#define AX_RXCOE_TCP	/;"	d	file:
AX_RXCOE_TCPV6	drivers/usb/eth/asix88179.c	/^	#define AX_RXCOE_TCPV6	/;"	d	file:
AX_RXCOE_UDP	drivers/usb/eth/asix88179.c	/^	#define AX_RXCOE_UDP	/;"	d	file:
AX_RXCOE_UDPV6	drivers/usb/eth/asix88179.c	/^	#define AX_RXCOE_UDPV6	/;"	d	file:
AX_RXHDR_CRC_ERR	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_CRC_ERR	/;"	d	file:
AX_RXHDR_DROP_ERR	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_DROP_ERR	/;"	d	file:
AX_RXHDR_L3CSUM_ERR	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_L3CSUM_ERR	/;"	d	file:
AX_RXHDR_L4CSUM_ERR	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_L4CSUM_ERR	/;"	d	file:
AX_RXHDR_L4_TYPE_MASK	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_L4_TYPE_MASK	/;"	d	file:
AX_RXHDR_L4_TYPE_TCP	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_L4_TYPE_TCP	/;"	d	file:
AX_RXHDR_L4_TYPE_UDP	drivers/usb/eth/asix88179.c	/^#define AX_RXHDR_L4_TYPE_UDP	/;"	d	file:
AX_RX_BULKIN_QCTRL	drivers/usb/eth/asix88179.c	/^#define AX_RX_BULKIN_QCTRL	/;"	d	file:
AX_RX_CTL	drivers/usb/eth/asix88179.c	/^#define AX_RX_CTL	/;"	d	file:
AX_RX_CTL_AB	drivers/usb/eth/asix.c	/^#define AX_RX_CTL_AB	/;"	d	file:
AX_RX_CTL_AB	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_AB	/;"	d	file:
AX_RX_CTL_AM	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_AM	/;"	d	file:
AX_RX_CTL_AMALL	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_AMALL	/;"	d	file:
AX_RX_CTL_AP	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_AP	/;"	d	file:
AX_RX_CTL_DROPCRCERR	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_DROPCRCERR	/;"	d	file:
AX_RX_CTL_IPE	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_IPE	/;"	d	file:
AX_RX_CTL_PRO	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_PRO	/;"	d	file:
AX_RX_CTL_SO	drivers/usb/eth/asix.c	/^#define AX_RX_CTL_SO	/;"	d	file:
AX_RX_CTL_START	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_START	/;"	d	file:
AX_RX_CTL_STOP	drivers/usb/eth/asix88179.c	/^	#define AX_RX_CTL_STOP	/;"	d	file:
AX_RX_URB_SIZE	drivers/usb/eth/asix.c	/^#define AX_RX_URB_SIZE /;"	d	file:
AX_RX_URB_SIZE	drivers/usb/eth/asix88179.c	/^#define AX_RX_URB_SIZE /;"	d	file:
AX_SECLD	drivers/usb/eth/asix88179.c	/^	#define	AX_SECLD	/;"	d	file:
AX_SROM_ADDR	drivers/usb/eth/asix88179.c	/^#define AX_SROM_ADDR	/;"	d	file:
AX_SROM_CMD	drivers/usb/eth/asix88179.c	/^#define AX_SROM_CMD	/;"	d	file:
AX_SROM_DATA_HIGH	drivers/usb/eth/asix88179.c	/^#define AX_SROM_DATA_HIGH	/;"	d	file:
AX_SROM_DATA_LOW	drivers/usb/eth/asix88179.c	/^#define AX_SROM_DATA_LOW	/;"	d	file:
AX_SWRESET_CLEAR	drivers/usb/eth/asix.c	/^#define AX_SWRESET_CLEAR	/;"	d	file:
AX_SWRESET_IPPD	drivers/usb/eth/asix.c	/^#define AX_SWRESET_IPPD	/;"	d	file:
AX_SWRESET_IPRL	drivers/usb/eth/asix.c	/^#define AX_SWRESET_IPRL	/;"	d	file:
AX_SWRESET_PRL	drivers/usb/eth/asix.c	/^#define AX_SWRESET_PRL	/;"	d	file:
AX_SWRESET_PRTE	drivers/usb/eth/asix.c	/^#define AX_SWRESET_PRTE	/;"	d	file:
AX_TXCOE_CTL	drivers/usb/eth/asix88179.c	/^#define AX_TXCOE_CTL	/;"	d	file:
AX_TXCOE_IP	drivers/usb/eth/asix88179.c	/^	#define AX_TXCOE_IP	/;"	d	file:
AX_TXCOE_TCP	drivers/usb/eth/asix88179.c	/^	#define AX_TXCOE_TCP	/;"	d	file:
AX_TXCOE_TCPV6	drivers/usb/eth/asix88179.c	/^	#define AX_TXCOE_TCPV6	/;"	d	file:
AX_TXCOE_UDP	drivers/usb/eth/asix88179.c	/^	#define AX_TXCOE_UDP	/;"	d	file:
AX_TXCOE_UDPV6	drivers/usb/eth/asix88179.c	/^	#define AX_TXCOE_UDPV6	/;"	d	file:
AX_USB_HS	drivers/usb/eth/asix88179.c	/^	#define	AX_USB_HS	/;"	d	file:
AX_USB_SS	drivers/usb/eth/asix88179.c	/^	#define	AX_USB_SS	/;"	d	file:
A_0	arch/arm/lib/uldivmod.S	/^A_0	.req	r0$/;"	l
A_1	arch/arm/lib/uldivmod.S	/^A_1	.req	r1$/;"	l
A_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define A_BIT	/;"	d
A_MASK	include/bedbug/ppc.h	/^#define A_MASK /;"	d
A_OPCODE	include/bedbug/ppc.h	/^#define A_OPCODE(/;"	d
A_SESSION_VALID	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define A_SESSION_VALID	/;"	d
AcceptAllBroadcast	drivers/net/ns8382x.c	/^	AcceptAllBroadcast	= 0x40000000,$/;"	e	enum:rx_mode_bits	file:
AcceptAllMulticast	drivers/net/natsemi.c	/^	AcceptAllMulticast = 0x20000000,$/;"	e	enum:rx_mode_bits	file:
AcceptAllMulticast	drivers/net/ns8382x.c	/^	AcceptAllMulticast	= 0x20000000,$/;"	e	enum:rx_mode_bits	file:
AcceptAllPhys	drivers/net/natsemi.c	/^	AcceptAllPhys	= 0x10000000,$/;"	e	enum:rx_mode_bits	file:
AcceptAllPhys	drivers/net/rtl8139.c	/^	AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,$/;"	e	enum:rx_mode_bits	file:
AcceptAllPhys	drivers/net/rtl8169.c	/^	AcceptAllPhys = 0x01,$/;"	e	enum:RTL8169_register_content	file:
AcceptAllUnicast	drivers/net/ns8382x.c	/^	AcceptAllUnicast	= 0x10000000,$/;"	e	enum:rx_mode_bits	file:
AcceptBroadcast	drivers/net/natsemi.c	/^	AcceptBroadcast	= 0xC0000000,$/;"	e	enum:rx_mode_bits	file:
AcceptBroadcast	drivers/net/rtl8139.c	/^	AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,$/;"	e	enum:rx_mode_bits	file:
AcceptBroadcast	drivers/net/rtl8169.c	/^	AcceptBroadcast = 0x08,$/;"	e	enum:RTL8169_register_content	file:
AcceptErr	drivers/net/natsemi.c	/^	AcceptErr	= 0x20,$/;"	e	enum:rx_mode_bits	file:
AcceptErr	drivers/net/rtl8139.c	/^	AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,$/;"	e	enum:rx_mode_bits	file:
AcceptErr	drivers/net/rtl8169.c	/^	AcceptErr = 0x20,$/;"	e	enum:RTL8169_register_content	file:
AcceptMulticast	drivers/net/natsemi.c	/^	AcceptMulticast	= 0x00200000,$/;"	e	enum:rx_mode_bits	file:
AcceptMulticast	drivers/net/rtl8139.c	/^	AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,$/;"	e	enum:rx_mode_bits	file:
AcceptMulticast	drivers/net/rtl8169.c	/^	AcceptMulticast = 0x04,$/;"	e	enum:RTL8169_register_content	file:
AcceptMyPhys	drivers/net/natsemi.c	/^	AcceptMyPhys	= 0x08000000$/;"	e	enum:rx_mode_bits	file:
AcceptMyPhys	drivers/net/rtl8139.c	/^	AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,$/;"	e	enum:rx_mode_bits	file:
AcceptMyPhys	drivers/net/rtl8169.c	/^	AcceptMyPhys = 0x02,$/;"	e	enum:RTL8169_register_content	file:
AcceptPerfectMatch	drivers/net/ns8382x.c	/^	AcceptPerfectMatch	= 0x08000000,$/;"	e	enum:rx_mode_bits	file:
AcceptRunt	drivers/net/natsemi.c	/^	AcceptRunt	= 0x10,$/;"	e	enum:rx_mode_bits	file:
AcceptRunt	drivers/net/rtl8139.c	/^	AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,$/;"	e	enum:rx_mode_bits	file:
AcceptRunt	drivers/net/rtl8169.c	/^	AcceptRunt = 0x10,$/;"	e	enum:RTL8169_register_content	file:
Add	tools/buildman/builder.py	/^    def Add(self, fname, key, value):$/;"	m	class:Config
Add	tools/buildman/toolchain.py	/^    def Add(self, fname, test=True, verbose=False, priority=PRIORITY_CALC,$/;"	m	class:Toolchains
AddBoard	tools/buildman/board.py	/^    def AddBoard(self, board):$/;"	m	class:Boards
AddCc	tools/patman/commit.py	/^    def AddCc(self, cc_list):$/;"	m	class:Commit
AddChange	tools/patman/commit.py	/^    def AddChange(self, version, info):$/;"	m	class:Commit
AddChange	tools/patman/series.py	/^    def AddChange(self, version, commit, info):$/;"	m	class:Series
AddCommit	tools/patman/series.py	/^    def AddCommit(self, commit):$/;"	m	class:Series
AddDesc	tools/rkmux.py	/^    def AddDesc(self, desc):$/;"	m	class:RegField
AddExpr	tools/buildman/board.py	/^    def AddExpr(self, expr):$/;"	m	class:Term
AddFile	tools/buildman/bsettings.py	/^def AddFile(data):$/;"	f
AddLine	tools/buildman/builder.py	/^        def AddLine(lines_summary, lines_boards, line, board):$/;"	f	member:Builder.GetResultSummary	file:
AddOutcome	tools/buildman/builder.py	/^    def AddOutcome(self, board_dict, arch_list, changes, char, color):$/;"	m	class:Builder
AddTag	tools/patman/series.py	/^    def AddTag(self, commit, line, name, value):$/;"	m	class:Series
AddToCommit	tools/patman/patchstream.py	/^    def AddToCommit(self, line, name, value):$/;"	m	class:PatchStream
AddToSeries	tools/patman/patchstream.py	/^    def AddToSeries(self, line, name, value):$/;"	m	class:PatchStream
Address	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^typedef void		*Address ;$/;"	t	typeref:typename:void *
Address	include/SA-1100.h	/^typedef void		*Address ;$/;"	t	typeref:typename:void *
AddressOfEntryPoint	include/pe.h	/^	uint32_t AddressOfEntryPoint;            \/* 0x10 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
AddressOfEntryPoint	include/pe.h	/^	uint32_t AddressOfEntryPoint;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
AddressingReset	drivers/usb/gadget/rndis.h	/^	__le32	AddressingReset;$/;"	m	struct:rndis_reset_cmplt_type	typeref:typename:__le32
Align	lib/lzma/LzmaDec.c	/^#define Align /;"	d	file:
Align	tools/patman/tools.py	/^def Align(pos, align):$/;"	f
AlignPage	common/dlmalloc.c	/^#define AlignPage(/;"	d	file:
AlignPage64K	common/dlmalloc.c	/^#define AlignPage64K(/;"	d	file:
Alignment	arch/powerpc/cpu/mpc512x/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc5xx/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc5xxx/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc8260/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc83xx/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc85xx/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc86xx/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/mpc8xx/start.S	/^Alignment:$/;"	l
Alignment	arch/powerpc/cpu/ppc4xx/start.S	/^Alignment:$/;"	l
AlignmentException	arch/powerpc/cpu/mpc512x/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc5xx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc5xxx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc8260/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc83xx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc85xx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc86xx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/mpc8xx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
AlignmentException	arch/powerpc/cpu/ppc4xx/traps.c	/^void AlignmentException(struct pt_regs *regs)$/;"	f	typeref:typename:void
Alloc	lib/lzma/Types.h	/^  void *(*Alloc)(void *p, size_t size);$/;"	m	struct:__anonf2a2f1b90c08	typeref:typename:void * (*)(void * p,size_t size)
Altera_ACEX1K	include/altera.h	/^	Altera_ACEX1K,$/;"	e	enum:altera_family
Altera_ACEX1K_Passive_Serial_fns	include/ACEX1K.h	/^} Altera_ACEX1K_Passive_Serial_fns;$/;"	t	typeref:struct:__anon8a29702b0108
Altera_CYC2	include/altera.h	/^	Altera_CYC2,$/;"	e	enum:altera_family
Altera_CYC2_Passive_Serial_fns	include/ACEX1K.h	/^} Altera_CYC2_Passive_Serial_fns;$/;"	t	typeref:struct:__anon8a29702b0208
Altera_EP1K100_DESC	include/ACEX1K.h	/^#define Altera_EP1K100_DESC(/;"	d
Altera_EP1K100_SIZE	include/ACEX1K.h	/^#define Altera_EP1K100_SIZE	/;"	d
Altera_EP2C20_SIZE	include/ACEX1K.h	/^#define Altera_EP2C20_SIZE	/;"	d
Altera_EP2C35_SIZE	include/ACEX1K.h	/^#define Altera_EP2C35_SIZE	/;"	d
Altera_EP2C8_SIZE	include/ACEX1K.h	/^#define Altera_EP2C8_SIZE	/;"	d
Altera_EP3C5_SIZE	include/ACEX1K.h	/^#define Altera_EP3C5_SIZE	/;"	d
Altera_SoCFPGA	include/altera.h	/^	Altera_SoCFPGA,$/;"	e	enum:altera_family
Altera_StratixII	include/altera.h	/^	Altera_StratixII,$/;"	e	enum:altera_family
Altera_StratixV	include/altera.h	/^	Altera_StratixV,$/;"	e	enum:altera_family
Altera_abort_fn	include/altera.h	/^typedef int (*Altera_abort_fn)( int cookie );$/;"	t	typeref:typename:int (*)(int cookie)
Altera_clk_fn	include/altera.h	/^typedef int (*Altera_clk_fn)( int assert_clk, int flush, int cookie );$/;"	t	typeref:typename:int (*)(int assert_clk,int flush,int cookie)
Altera_config_fn	include/altera.h	/^typedef int (*Altera_config_fn)( int assert_config, int flush, int cookie );$/;"	t	typeref:typename:int (*)(int assert_config,int flush,int cookie)
Altera_data_fn	include/altera.h	/^typedef int (*Altera_data_fn)( int assert_data, int flush, int cookie );$/;"	t	typeref:typename:int (*)(int assert_data,int flush,int cookie)
Altera_desc	include/altera.h	/^} Altera_desc;$/;"	t	typeref:struct:__anond5297d870108
Altera_done_fn	include/altera.h	/^typedef int (*Altera_done_fn)( int cookie );$/;"	t	typeref:typename:int (*)(int cookie)
Altera_post_fn	include/altera.h	/^typedef int (*Altera_post_fn)( int cookie );$/;"	t	typeref:typename:int (*)(int cookie)
Altera_pre_fn	include/altera.h	/^typedef int (*Altera_pre_fn)( int cookie );$/;"	t	typeref:typename:int (*)(int cookie)
Altera_status_fn	include/altera.h	/^typedef int (*Altera_status_fn)( int cookie );$/;"	t	typeref:typename:int (*)(int cookie)
Altera_write_fn	include/altera.h	/^typedef int(*Altera_write_fn)(const void *buf, size_t len, int flush, int cookie);$/;"	t	typeref:typename:int (*)(const void * buf,size_t len,int flush,int cookie)
AnegDis100Full	drivers/net/natsemi.c	/^	AnegDis100Full	= 0x0000C000,$/;"	e	enum:ChipConfigBits	file:
AnegDis100Half	drivers/net/natsemi.c	/^	AnegDis100Half	= 0x00008000,$/;"	e	enum:ChipConfigBits	file:
AnegDis10Full	drivers/net/natsemi.c	/^	AnegDis10Full	= 0x00004000,$/;"	e	enum:ChipConfigBits	file:
AnegDis10Half	drivers/net/natsemi.c	/^	AnegDis10Half	= 0x00000000,$/;"	e	enum:ChipConfigBits	file:
AnegDone	drivers/net/natsemi.c	/^	AnegDone	= 0x08000000,$/;"	e	enum:ChipConfigBits	file:
AnegEn100Both	drivers/net/natsemi.c	/^	AnegEn100Both	= 0x0000A000,$/;"	e	enum:ChipConfigBits	file:
AnegEn10Both	drivers/net/natsemi.c	/^	AnegEn10Both	= 0x00002000,$/;"	e	enum:ChipConfigBits	file:
AnegEnBothBoth	drivers/net/natsemi.c	/^	AnegEnBothBoth	= 0x0000E000,$/;"	e	enum:ChipConfigBits	file:
AnegEnBothHalf	drivers/net/natsemi.c	/^	AnegEnBothHalf	= 0x00006000,$/;"	e	enum:ChipConfigBits	file:
AnegMask	drivers/net/natsemi.c	/^	AnegMask	= 0x00002000,$/;"	e	enum:ChipConfigBits	file:
ArbitraryAttributeContainer	test/py/conftest.py	/^    class ArbitraryAttributeContainer(object):$/;"	c	function:pytest_configure	file:
Arr_1_Dim	lib/dhry/dhry.h	/^typedef int     Arr_1_Dim [50];$/;"	t	typeref:typename:int[50]
Arr_1_Glob	lib/dhry/dhry_1.c	/^int             Arr_1_Glob [50];$/;"	v	typeref:typename:int[50]
Arr_2_Dim	lib/dhry/dhry.h	/^typedef int     Arr_2_Dim [50] [50];$/;"	t	typeref:typename:int[50][50]
Arr_2_Glob	lib/dhry/dhry_1.c	/^int             Arr_2_Glob [50] [50];$/;"	v	typeref:typename:int[50][50]
As	doc/README.x86	/^As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit$/;"	l
As	doc/README.x86	/^As for the video ROM, you can get it here [3] and rename it to vga.bin.$/;"	l
As	doc/README.x86	/^As for the video ROM, you need manually extract it from the Intel provided$/;"	l
Assembly	include/SA-1100.h	/^#define Assembly	/;"	d
Assert	lib/zlib/zutil.h	/^#  define Assert(/;"	d
AssertD	lib/bzip2/bzlib_private.h	/^#define AssertD(/;"	d
AssertH	lib/bzip2/bzlib_private.h	/^#define AssertH(/;"	d
Au1500_CFG_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_CFG_BASE /;"	d
Au1500_EXT_CFG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_EXT_CFG /;"	d
Au1500_EXT_CFG_TYPE1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_EXT_CFG_TYPE1 /;"	d
Au1500_PCI_B2B0_VID	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_B2B0_VID /;"	d
Au1500_PCI_B2B1_ID	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_B2B1_ID /;"	d
Au1500_PCI_B2BMASK_CCH	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_B2BMASK_CCH /;"	d
Au1500_PCI_CFG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_CFG /;"	d
Au1500_PCI_CLASSREV	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_CLASSREV /;"	d
Au1500_PCI_CMEM	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_CMEM /;"	d
Au1500_PCI_ERR_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_ERR_ADDR /;"	d
Au1500_PCI_HDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_HDR /;"	d
Au1500_PCI_HDRTYPE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_HDRTYPE /;"	d
Au1500_PCI_ID	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_ID /;"	d
Au1500_PCI_IO_END	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_IO_END /;"	d
Au1500_PCI_IO_START	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_IO_START /;"	d
Au1500_PCI_MBAR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_MBAR /;"	d
Au1500_PCI_MEM_END	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_MEM_END /;"	d
Au1500_PCI_MEM_START	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_MEM_START /;"	d
Au1500_PCI_MWBASE_REV_CCL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_MWBASE_REV_CCL /;"	d
Au1500_PCI_MWMASK_DEV	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_MWMASK_DEV /;"	d
Au1500_PCI_SPEC_INTACK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_SPEC_INTACK /;"	d
Au1500_PCI_STATCMD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define Au1500_PCI_STATCMD /;"	d
Autoboot options	cmd/Kconfig	/^menu "Autoboot options"$/;"	m	menu:Command line interface
B	arch/avr32/include/asm/hmatrix-common.h	/^		u32	B;$/;"	m	struct:hmatrix_regs::__anonb63485bb0108	typeref:typename:u32
B	arch/x86/cpu/quark/smc.h	/^	B,	\/* BOTTOM VREF *\/$/;"	e	enum:__anone34d010a0103
B	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register A, B, C, D;$/;"	m	struct:i386_general_regs	typeref:typename:i386_general_register
B01DBCTL0	arch/x86/cpu/quark/smc.h	/^#define B01DBCTL0	/;"	d
B01DBCTL1	arch/x86/cpu/quark/smc.h	/^#define B01DBCTL1	/;"	d
B01LATCTL1	arch/x86/cpu/quark/smc.h	/^#define B01LATCTL1	/;"	d
B01PTRCTL0	arch/x86/cpu/quark/smc.h	/^#define B01PTRCTL0	/;"	d
B01PTRCTL1	arch/x86/cpu/quark/smc.h	/^#define B01PTRCTL1	/;"	d
B0COMPSLV1	arch/x86/cpu/quark/smc.h	/^#define B0COMPSLV1	/;"	d
B0COMPSLV2	arch/x86/cpu/quark/smc.h	/^#define B0COMPSLV2	/;"	d
B0COMPSLV3	arch/x86/cpu/quark/smc.h	/^#define B0COMPSLV3	/;"	d
B0DLLPICODER0	arch/x86/cpu/quark/smc.h	/^#define B0DLLPICODER0	/;"	d
B0DLLPICODER1	arch/x86/cpu/quark/smc.h	/^#define B0DLLPICODER1	/;"	d
B0DLLPICODER2	arch/x86/cpu/quark/smc.h	/^#define B0DLLPICODER2	/;"	d
B0DLLPICODER3	arch/x86/cpu/quark/smc.h	/^#define B0DLLPICODER3	/;"	d
B0HT_0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0HT_0	/;"	d
B0HT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0HT_1	/;"	d
B0HT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0HT_2	/;"	d
B0HT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0HT_3	/;"	d
B0LATCTL0	arch/x86/cpu/quark/smc.h	/^#define B0LATCTL0	/;"	d
B0MODE_ASYNC	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0MODE_ASYNC	/;"	d
B0MODE_BURST	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0MODE_BURST	/;"	d
B0MODE_FLASH	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0MODE_FLASH	/;"	d
B0MODE_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0MODE_MASK	/;"	d
B0MODE_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0MODE_P	/;"	d
B0MODE_PAGE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0MODE_PAGE	/;"	d
B0ONDURCTL	arch/x86/cpu/quark/smc.h	/^#define B0ONDURCTL	/;"	d
B0OVRCTL	arch/x86/cpu/quark/smc.h	/^#define B0OVRCTL	/;"	d
B0RAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_1	/;"	d
B0RAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_10	/;"	d
B0RAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_11	/;"	d
B0RAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_12	/;"	d
B0RAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_13	/;"	d
B0RAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_14	/;"	d
B0RAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_15	/;"	d
B0RAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_2	/;"	d
B0RAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_3	/;"	d
B0RAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_4	/;"	d
B0RAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_5	/;"	d
B0RAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_6	/;"	d
B0RAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_7	/;"	d
B0RAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_8	/;"	d
B0RAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RAT_9	/;"	d
B0RDYEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RDYEN	/;"	d
B0RDYPOL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0RDYPOL	/;"	d
B0RK2RKCHGPTRCTRL	arch/x86/cpu/quark/smc.h	/^#define B0RK2RKCHGPTRCTRL	/;"	d
B0RK2RKLAT	arch/x86/cpu/quark/smc.h	/^#define B0RK2RKLAT	/;"	d
B0RXDQPICODER10	arch/x86/cpu/quark/smc.h	/^#define B0RXDQPICODER10	/;"	d
B0RXDQPICODER32	arch/x86/cpu/quark/smc.h	/^#define B0RXDQPICODER32	/;"	d
B0RXDQSPICODE	arch/x86/cpu/quark/smc.h	/^#define B0RXDQSPICODE	/;"	d
B0RXIOBUFCTL	arch/x86/cpu/quark/smc.h	/^#define B0RXIOBUFCTL	/;"	d
B0RXOFFSET0	arch/x86/cpu/quark/smc.h	/^#define B0RXOFFSET0	/;"	d
B0RXOFFSET1	arch/x86/cpu/quark/smc.h	/^#define B0RXOFFSET1	/;"	d
B0ST_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0ST_1	/;"	d
B0ST_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0ST_2	/;"	d
B0ST_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0ST_3	/;"	d
B0ST_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0ST_4	/;"	d
B0TT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0TT_1	/;"	d
B0TT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0TT_2	/;"	d
B0TT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0TT_3	/;"	d
B0TT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0TT_4	/;"	d
B0VREFCTL	arch/x86/cpu/quark/smc.h	/^#define B0VREFCTL	/;"	d
B0WAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_1	/;"	d
B0WAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_10	/;"	d
B0WAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_11	/;"	d
B0WAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_12	/;"	d
B0WAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_13	/;"	d
B0WAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_14	/;"	d
B0WAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_15	/;"	d
B0WAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_2	/;"	d
B0WAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_3	/;"	d
B0WAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_4	/;"	d
B0WAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_5	/;"	d
B0WAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_6	/;"	d
B0WAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_7	/;"	d
B0WAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_8	/;"	d
B0WAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0WAT_9	/;"	d
B0_PEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0_PEN	/;"	d
B0_PEN_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B0_PEN_P	/;"	d
B0_PMC	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_PMC	/;"	d	file:
B0_PMC_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_PMC_200	/;"	d	file:
B0_PMC_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_PMC_250	/;"	d	file:
B0_PMC_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_PMC_266	/;"	d	file:
B0_Tacc	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_Tacc	/;"	d	file:
B0_Tacc_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacc_200	/;"	d	file:
B0_Tacc_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacc_250	/;"	d	file:
B0_Tacc_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacc_266	/;"	d	file:
B0_Tacp	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_Tacp	/;"	d	file:
B0_Tacp_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacp_200	/;"	d	file:
B0_Tacp_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacp_250	/;"	d	file:
B0_Tacp_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacp_266	/;"	d	file:
B0_Tacs	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_Tacs	/;"	d	file:
B0_Tacs_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacs_200	/;"	d	file:
B0_Tacs_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacs_250	/;"	d	file:
B0_Tacs_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tacs_266	/;"	d	file:
B0_Tah	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_Tah	/;"	d	file:
B0_Tcah_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcah_200	/;"	d	file:
B0_Tcah_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcah_250	/;"	d	file:
B0_Tcah_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcah_266	/;"	d	file:
B0_Tcoh	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_Tcoh	/;"	d	file:
B0_Tcoh_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcoh_200	/;"	d	file:
B0_Tcoh_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcoh_250	/;"	d	file:
B0_Tcoh_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcoh_266	/;"	d	file:
B0_Tcos	board/samsung/smdk2410/lowlevel_init.S	/^#define B0_Tcos	/;"	d	file:
B0_Tcos_200	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcos_200	/;"	d	file:
B0_Tcos_250	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcos_250	/;"	d	file:
B0_Tcos_266	board/mpl/vcma9/lowlevel_init.S	/^#define B0_Tcos_266	/;"	d	file:
B1COMPSLV1	arch/x86/cpu/quark/smc.h	/^#define B1COMPSLV1	/;"	d
B1COMPSLV2	arch/x86/cpu/quark/smc.h	/^#define B1COMPSLV2	/;"	d
B1COMPSLV3	arch/x86/cpu/quark/smc.h	/^#define B1COMPSLV3	/;"	d
B1DLLPICODER0	arch/x86/cpu/quark/smc.h	/^#define B1DLLPICODER0	/;"	d
B1DLLPICODER1	arch/x86/cpu/quark/smc.h	/^#define B1DLLPICODER1	/;"	d
B1DLLPICODER2	arch/x86/cpu/quark/smc.h	/^#define B1DLLPICODER2	/;"	d
B1DLLPICODER3	arch/x86/cpu/quark/smc.h	/^#define B1DLLPICODER3	/;"	d
B1HT_0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1HT_0	/;"	d
B1HT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1HT_1	/;"	d
B1HT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1HT_2	/;"	d
B1HT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1HT_3	/;"	d
B1LATCTL0	arch/x86/cpu/quark/smc.h	/^#define B1LATCTL0	/;"	d
B1MODE_ASYNC	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1MODE_ASYNC	/;"	d
B1MODE_BURST	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1MODE_BURST	/;"	d
B1MODE_FLASH	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1MODE_FLASH	/;"	d
B1MODE_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1MODE_MASK	/;"	d
B1MODE_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1MODE_P	/;"	d
B1MODE_PAGE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1MODE_PAGE	/;"	d
B1ONDURCTL	arch/x86/cpu/quark/smc.h	/^#define B1ONDURCTL	/;"	d
B1OVRCTL	arch/x86/cpu/quark/smc.h	/^#define B1OVRCTL	/;"	d
B1RAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_1	/;"	d
B1RAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_10	/;"	d
B1RAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_11	/;"	d
B1RAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_12	/;"	d
B1RAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_13	/;"	d
B1RAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_14	/;"	d
B1RAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_15	/;"	d
B1RAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_2	/;"	d
B1RAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_3	/;"	d
B1RAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_4	/;"	d
B1RAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_5	/;"	d
B1RAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_6	/;"	d
B1RAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_7	/;"	d
B1RAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_8	/;"	d
B1RAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RAT_9	/;"	d
B1RDYEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RDYEN	/;"	d
B1RDYPOL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1RDYPOL	/;"	d
B1RK2RKCHGPTRCTRL	arch/x86/cpu/quark/smc.h	/^#define B1RK2RKCHGPTRCTRL	/;"	d
B1RK2RKLAT	arch/x86/cpu/quark/smc.h	/^#define B1RK2RKLAT	/;"	d
B1RXDQPICODER10	arch/x86/cpu/quark/smc.h	/^#define B1RXDQPICODER10	/;"	d
B1RXDQPICODER32	arch/x86/cpu/quark/smc.h	/^#define B1RXDQPICODER32	/;"	d
B1RXDQSPICODE	arch/x86/cpu/quark/smc.h	/^#define B1RXDQSPICODE	/;"	d
B1RXIOBUFCTL	arch/x86/cpu/quark/smc.h	/^#define B1RXIOBUFCTL	/;"	d
B1RXOFFSET0	arch/x86/cpu/quark/smc.h	/^#define B1RXOFFSET0	/;"	d
B1RXOFFSET1	arch/x86/cpu/quark/smc.h	/^#define B1RXOFFSET1	/;"	d
B1ST_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1ST_1	/;"	d
B1ST_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1ST_2	/;"	d
B1ST_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1ST_3	/;"	d
B1ST_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1ST_4	/;"	d
B1TT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1TT_1	/;"	d
B1TT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1TT_2	/;"	d
B1TT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1TT_3	/;"	d
B1TT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1TT_4	/;"	d
B1VREFCTL	arch/x86/cpu/quark/smc.h	/^#define B1VREFCTL	/;"	d
B1WAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_1	/;"	d
B1WAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_10	/;"	d
B1WAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_11	/;"	d
B1WAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_12	/;"	d
B1WAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_13	/;"	d
B1WAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_14	/;"	d
B1WAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_15	/;"	d
B1WAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_2	/;"	d
B1WAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_3	/;"	d
B1WAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_4	/;"	d
B1WAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_5	/;"	d
B1WAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_6	/;"	d
B1WAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_7	/;"	d
B1WAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_8	/;"	d
B1WAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1WAT_9	/;"	d
B1_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_BWSCON	/;"	d	file:
B1_PEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1_PEN	/;"	d
B1_PEN_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B1_PEN_P	/;"	d
B1_PMC	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_PMC	/;"	d	file:
B1_PMC_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_PMC_200	/;"	d	file:
B1_PMC_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_PMC_250	/;"	d	file:
B1_PMC_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_PMC_266	/;"	d	file:
B1_Tacc	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_Tacc	/;"	d	file:
B1_Tacc_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacc_200	/;"	d	file:
B1_Tacc_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacc_250	/;"	d	file:
B1_Tacc_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacc_266	/;"	d	file:
B1_Tacp	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_Tacp	/;"	d	file:
B1_Tacp_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacp_200	/;"	d	file:
B1_Tacp_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacp_250	/;"	d	file:
B1_Tacp_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacp_266	/;"	d	file:
B1_Tacs	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_Tacs	/;"	d	file:
B1_Tacs_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacs_200	/;"	d	file:
B1_Tacs_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacs_250	/;"	d	file:
B1_Tacs_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tacs_266	/;"	d	file:
B1_Tah	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_Tah	/;"	d	file:
B1_Tcah_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcah_200	/;"	d	file:
B1_Tcah_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcah_250	/;"	d	file:
B1_Tcah_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcah_266	/;"	d	file:
B1_Tcoh	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_Tcoh	/;"	d	file:
B1_Tcoh_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcoh_200	/;"	d	file:
B1_Tcoh_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcoh_250	/;"	d	file:
B1_Tcoh_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcoh_266	/;"	d	file:
B1_Tcos	board/samsung/smdk2410/lowlevel_init.S	/^#define B1_Tcos	/;"	d	file:
B1_Tcos_200	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcos_200	/;"	d	file:
B1_Tcos_250	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcos_250	/;"	d	file:
B1_Tcos_266	board/mpl/vcma9/lowlevel_init.S	/^#define B1_Tcos_266	/;"	d	file:
B2HT_0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2HT_0	/;"	d
B2HT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2HT_1	/;"	d
B2HT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2HT_2	/;"	d
B2HT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2HT_3	/;"	d
B2MODE_ASYNC	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2MODE_ASYNC	/;"	d
B2MODE_BURST	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2MODE_BURST	/;"	d
B2MODE_FLASH	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2MODE_FLASH	/;"	d
B2MODE_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2MODE_MASK	/;"	d
B2MODE_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2MODE_P	/;"	d
B2MODE_PAGE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2MODE_PAGE	/;"	d
B2RAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_1	/;"	d
B2RAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_10	/;"	d
B2RAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_11	/;"	d
B2RAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_12	/;"	d
B2RAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_13	/;"	d
B2RAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_14	/;"	d
B2RAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_15	/;"	d
B2RAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_2	/;"	d
B2RAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_3	/;"	d
B2RAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_4	/;"	d
B2RAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_5	/;"	d
B2RAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_6	/;"	d
B2RAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_7	/;"	d
B2RAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_8	/;"	d
B2RAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RAT_9	/;"	d
B2RDYEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RDYEN	/;"	d
B2RDYPOL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2RDYPOL	/;"	d
B2ST_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2ST_1	/;"	d
B2ST_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2ST_2	/;"	d
B2ST_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2ST_3	/;"	d
B2ST_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2ST_4	/;"	d
B2TT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2TT_1	/;"	d
B2TT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2TT_2	/;"	d
B2TT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2TT_3	/;"	d
B2TT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2TT_4	/;"	d
B2WAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_1	/;"	d
B2WAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_10	/;"	d
B2WAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_11	/;"	d
B2WAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_12	/;"	d
B2WAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_13	/;"	d
B2WAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_14	/;"	d
B2WAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_15	/;"	d
B2WAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_2	/;"	d
B2WAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_3	/;"	d
B2WAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_4	/;"	d
B2WAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_5	/;"	d
B2WAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_6	/;"	d
B2WAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_7	/;"	d
B2WAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_8	/;"	d
B2WAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2WAT_9	/;"	d
B2_B3	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^#define B2_B3 /;"	d	file:
B2_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_BWSCON	/;"	d	file:
B2_PEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2_PEN	/;"	d
B2_PEN_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B2_PEN_P	/;"	d
B2_PMC	board/mpl/vcma9/lowlevel_init.S	/^#define B2_PMC	/;"	d	file:
B2_PMC	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_PMC	/;"	d	file:
B2_SAMPLE	board/bosch/shc/Kconfig	/^config B2_SAMPLE$/;"	c	choice:choice6f6e98480204
B2_Tacc	board/mpl/vcma9/lowlevel_init.S	/^#define B2_Tacc	/;"	d	file:
B2_Tacc	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_Tacc	/;"	d	file:
B2_Tacp	board/mpl/vcma9/lowlevel_init.S	/^#define B2_Tacp	/;"	d	file:
B2_Tacp	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_Tacp	/;"	d	file:
B2_Tacs	board/mpl/vcma9/lowlevel_init.S	/^#define B2_Tacs	/;"	d	file:
B2_Tacs	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_Tacs	/;"	d	file:
B2_Tah	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_Tah	/;"	d	file:
B2_Tcah	board/mpl/vcma9/lowlevel_init.S	/^#define B2_Tcah	/;"	d	file:
B2_Tcoh	board/mpl/vcma9/lowlevel_init.S	/^#define B2_Tcoh	/;"	d	file:
B2_Tcoh	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_Tcoh	/;"	d	file:
B2_Tcos	board/mpl/vcma9/lowlevel_init.S	/^#define B2_Tcos	/;"	d	file:
B2_Tcos	board/samsung/smdk2410/lowlevel_init.S	/^#define B2_Tcos	/;"	d	file:
B32NOT16	arch/arm/include/asm/arch-omap3/cpu.h	/^#define B32NOT16	/;"	d
B3HT_0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3HT_0	/;"	d
B3HT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3HT_1	/;"	d
B3HT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3HT_2	/;"	d
B3HT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3HT_3	/;"	d
B3MODE_ASYNC	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3MODE_ASYNC	/;"	d
B3MODE_BURST	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3MODE_BURST	/;"	d
B3MODE_FLASH	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3MODE_FLASH	/;"	d
B3MODE_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3MODE_MASK	/;"	d
B3MODE_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3MODE_P	/;"	d
B3MODE_PAGE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3MODE_PAGE	/;"	d
B3RAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_1	/;"	d
B3RAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_10	/;"	d
B3RAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_11	/;"	d
B3RAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_12	/;"	d
B3RAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_13	/;"	d
B3RAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_14	/;"	d
B3RAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_15	/;"	d
B3RAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_2	/;"	d
B3RAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_3	/;"	d
B3RAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_4	/;"	d
B3RAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_5	/;"	d
B3RAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_6	/;"	d
B3RAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_7	/;"	d
B3RAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_8	/;"	d
B3RAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RAT_9	/;"	d
B3RDYEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RDYEN	/;"	d
B3RDYPOL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3RDYPOL	/;"	d
B3ST_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3ST_1	/;"	d
B3ST_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3ST_2	/;"	d
B3ST_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3ST_3	/;"	d
B3ST_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3ST_4	/;"	d
B3TT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3TT_1	/;"	d
B3TT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3TT_2	/;"	d
B3TT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3TT_3	/;"	d
B3TT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3TT_4	/;"	d
B3WAT_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_1	/;"	d
B3WAT_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_10	/;"	d
B3WAT_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_11	/;"	d
B3WAT_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_12	/;"	d
B3WAT_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_13	/;"	d
B3WAT_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_14	/;"	d
B3WAT_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_15	/;"	d
B3WAT_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_2	/;"	d
B3WAT_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_3	/;"	d
B3WAT_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_4	/;"	d
B3WAT_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_5	/;"	d
B3WAT_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_6	/;"	d
B3WAT_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_7	/;"	d
B3WAT_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_8	/;"	d
B3WAT_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3WAT_9	/;"	d
B3_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_BWSCON	/;"	d	file:
B3_PEN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3_PEN	/;"	d
B3_PEN_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define B3_PEN_P	/;"	d
B3_PMC	board/mpl/vcma9/lowlevel_init.S	/^#define B3_PMC	/;"	d	file:
B3_PMC	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_PMC	/;"	d	file:
B3_Tacc	board/mpl/vcma9/lowlevel_init.S	/^#define B3_Tacc	/;"	d	file:
B3_Tacc	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_Tacc	/;"	d	file:
B3_Tacp	board/mpl/vcma9/lowlevel_init.S	/^#define B3_Tacp	/;"	d	file:
B3_Tacp	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_Tacp	/;"	d	file:
B3_Tacs	board/mpl/vcma9/lowlevel_init.S	/^#define B3_Tacs	/;"	d	file:
B3_Tacs	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_Tacs	/;"	d	file:
B3_Tah	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_Tah	/;"	d	file:
B3_Tcah	board/mpl/vcma9/lowlevel_init.S	/^#define B3_Tcah	/;"	d	file:
B3_Tcoh	board/mpl/vcma9/lowlevel_init.S	/^#define B3_Tcoh	/;"	d	file:
B3_Tcoh	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_Tcoh	/;"	d	file:
B3_Tcos	board/mpl/vcma9/lowlevel_init.S	/^#define B3_Tcos	/;"	d	file:
B3_Tcos	board/samsung/smdk2410/lowlevel_init.S	/^#define B3_Tcos	/;"	d	file:
B3_V1	board/amcc/bamboo/bamboo.h	/^typedef enum block3_value { B3_V1,  B3_V2,  B3_V3,  B3_V4,  B3_V5,$/;"	e	enum:block3_value
B3_V10	board/amcc/bamboo/bamboo.h	/^			    B3_V6,  B3_V7,  B3_V8,  B3_V9,  B3_V10,$/;"	e	enum:block3_value
B3_V11	board/amcc/bamboo/bamboo.h	/^			    B3_V11, B3_V12, B3_V13, B3_V14, B3_V15,$/;"	e	enum:block3_value
B3_V12	board/amcc/bamboo/bamboo.h	/^			    B3_V11, B3_V12, B3_V13, B3_V14, B3_V15,$/;"	e	enum:block3_value
B3_V13	board/amcc/bamboo/bamboo.h	/^			    B3_V11, B3_V12, B3_V13, B3_V14, B3_V15,$/;"	e	enum:block3_value
B3_V14	board/amcc/bamboo/bamboo.h	/^			    B3_V11, B3_V12, B3_V13, B3_V14, B3_V15,$/;"	e	enum:block3_value
B3_V15	board/amcc/bamboo/bamboo.h	/^			    B3_V11, B3_V12, B3_V13, B3_V14, B3_V15,$/;"	e	enum:block3_value
B3_V16	board/amcc/bamboo/bamboo.h	/^			    B3_V16, B3_VALUE_UNKNOWN$/;"	e	enum:block3_value
B3_V2	board/amcc/bamboo/bamboo.h	/^typedef enum block3_value { B3_V1,  B3_V2,  B3_V3,  B3_V4,  B3_V5,$/;"	e	enum:block3_value
B3_V3	board/amcc/bamboo/bamboo.h	/^typedef enum block3_value { B3_V1,  B3_V2,  B3_V3,  B3_V4,  B3_V5,$/;"	e	enum:block3_value
B3_V4	board/amcc/bamboo/bamboo.h	/^typedef enum block3_value { B3_V1,  B3_V2,  B3_V3,  B3_V4,  B3_V5,$/;"	e	enum:block3_value
B3_V5	board/amcc/bamboo/bamboo.h	/^typedef enum block3_value { B3_V1,  B3_V2,  B3_V3,  B3_V4,  B3_V5,$/;"	e	enum:block3_value
B3_V6	board/amcc/bamboo/bamboo.h	/^			    B3_V6,  B3_V7,  B3_V8,  B3_V9,  B3_V10,$/;"	e	enum:block3_value
B3_V7	board/amcc/bamboo/bamboo.h	/^			    B3_V6,  B3_V7,  B3_V8,  B3_V9,  B3_V10,$/;"	e	enum:block3_value
B3_V8	board/amcc/bamboo/bamboo.h	/^			    B3_V6,  B3_V7,  B3_V8,  B3_V9,  B3_V10,$/;"	e	enum:block3_value
B3_V9	board/amcc/bamboo/bamboo.h	/^			    B3_V6,  B3_V7,  B3_V8,  B3_V9,  B3_V10,$/;"	e	enum:block3_value
B3_VALUE_UNKNOWN	board/amcc/bamboo/bamboo.h	/^			    B3_V16, B3_VALUE_UNKNOWN$/;"	e	enum:block3_value
B4_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_BWSCON	/;"	d	file:
B4_PMC	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_PMC	/;"	d	file:
B4_PMC_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_PMC_200	/;"	d	file:
B4_PMC_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_PMC_250	/;"	d	file:
B4_PMC_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_PMC_266	/;"	d	file:
B4_Tacc	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_Tacc	/;"	d	file:
B4_Tacc_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacc_200	/;"	d	file:
B4_Tacc_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacc_250	/;"	d	file:
B4_Tacc_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacc_266	/;"	d	file:
B4_Tacp	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_Tacp	/;"	d	file:
B4_Tacp_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacp_200	/;"	d	file:
B4_Tacp_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacp_250	/;"	d	file:
B4_Tacp_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacp_266	/;"	d	file:
B4_Tacs	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_Tacs	/;"	d	file:
B4_Tacs_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacs_200	/;"	d	file:
B4_Tacs_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacs_250	/;"	d	file:
B4_Tacs_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tacs_266	/;"	d	file:
B4_Tah	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_Tah	/;"	d	file:
B4_Tcah_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcah_200	/;"	d	file:
B4_Tcah_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcah_250	/;"	d	file:
B4_Tcah_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcah_266	/;"	d	file:
B4_Tcoh	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_Tcoh	/;"	d	file:
B4_Tcoh_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcoh_200	/;"	d	file:
B4_Tcoh_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcoh_250	/;"	d	file:
B4_Tcoh_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcoh_266	/;"	d	file:
B4_Tcos	board/samsung/smdk2410/lowlevel_init.S	/^#define B4_Tcos	/;"	d	file:
B4_Tcos_200	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcos_200	/;"	d	file:
B4_Tcos_250	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcos_250	/;"	d	file:
B4_Tcos_266	board/mpl/vcma9/lowlevel_init.S	/^#define B4_Tcos_266	/;"	d	file:
B5_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_BWSCON	/;"	d	file:
B5_PMC	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_PMC	/;"	d	file:
B5_PMC_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_PMC_200	/;"	d	file:
B5_PMC_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_PMC_250	/;"	d	file:
B5_PMC_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_PMC_266	/;"	d	file:
B5_Tacc	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_Tacc	/;"	d	file:
B5_Tacc_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacc_200	/;"	d	file:
B5_Tacc_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacc_250	/;"	d	file:
B5_Tacc_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacc_266	/;"	d	file:
B5_Tacp	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_Tacp	/;"	d	file:
B5_Tacp_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacp_200	/;"	d	file:
B5_Tacp_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacp_250	/;"	d	file:
B5_Tacp_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacp_266	/;"	d	file:
B5_Tacs	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_Tacs	/;"	d	file:
B5_Tacs_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacs_200	/;"	d	file:
B5_Tacs_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacs_250	/;"	d	file:
B5_Tacs_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tacs_266	/;"	d	file:
B5_Tah	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_Tah	/;"	d	file:
B5_Tcah_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcah_200	/;"	d	file:
B5_Tcah_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcah_250	/;"	d	file:
B5_Tcah_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcah_266	/;"	d	file:
B5_Tcoh	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_Tcoh	/;"	d	file:
B5_Tcoh_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcoh_200	/;"	d	file:
B5_Tcoh_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcoh_250	/;"	d	file:
B5_Tcoh_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcoh_266	/;"	d	file:
B5_Tcos	board/samsung/smdk2410/lowlevel_init.S	/^#define B5_Tcos	/;"	d	file:
B5_Tcos_200	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcos_200	/;"	d	file:
B5_Tcos_250	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcos_250	/;"	d	file:
B5_Tcos_266	board/mpl/vcma9/lowlevel_init.S	/^#define B5_Tcos_266	/;"	d	file:
B6_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B6_BWSCON	/;"	d	file:
B6_MT	board/mpl/vcma9/lowlevel_init.S	/^#define B6_MT	/;"	d	file:
B6_MT	board/samsung/smdk2410/lowlevel_init.S	/^#define B6_MT	/;"	d	file:
B6_SCAN	board/mpl/vcma9/lowlevel_init.S	/^#define B6_SCAN	/;"	d	file:
B6_SCAN	board/samsung/smdk2410/lowlevel_init.S	/^#define B6_SCAN	/;"	d	file:
B6_Trcd	board/samsung/smdk2410/lowlevel_init.S	/^#define B6_Trcd	/;"	d	file:
B6_Trcd_200	board/mpl/vcma9/lowlevel_init.S	/^#define B6_Trcd_200	/;"	d	file:
B6_Trcd_250	board/mpl/vcma9/lowlevel_init.S	/^#define B6_Trcd_250	/;"	d	file:
B6_Trcd_266	board/mpl/vcma9/lowlevel_init.S	/^#define B6_Trcd_266	/;"	d	file:
B7_BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define B7_BWSCON	/;"	d	file:
B7_MT	board/mpl/vcma9/lowlevel_init.S	/^#define B7_MT	/;"	d	file:
B7_MT	board/samsung/smdk2410/lowlevel_init.S	/^#define B7_MT	/;"	d	file:
B7_SCAN	board/mpl/vcma9/lowlevel_init.S	/^#define B7_SCAN	/;"	d	file:
B7_SCAN	board/samsung/smdk2410/lowlevel_init.S	/^#define B7_SCAN	/;"	d	file:
B7_Trcd	board/samsung/smdk2410/lowlevel_init.S	/^#define B7_Trcd	/;"	d	file:
B7_Trcd_200	board/mpl/vcma9/lowlevel_init.S	/^#define B7_Trcd_200	/;"	d	file:
B7_Trcd_250	board/mpl/vcma9/lowlevel_init.S	/^#define B7_Trcd_250	/;"	d	file:
B7_Trcd_266	board/mpl/vcma9/lowlevel_init.S	/^#define B7_Trcd_266	/;"	d	file:
BACK2BACK_SETUP_RECEIVED	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define BACK2BACK_SETUP_RECEIVED	/;"	d
BACKLIGHT_DUTY_CYCLE_MASK	drivers/video/i915_reg.h	/^#define   BACKLIGHT_DUTY_CYCLE_MASK	/;"	d
BACKLIGHT_DUTY_CYCLE_MASK_PNV	drivers/video/i915_reg.h	/^#define   BACKLIGHT_DUTY_CYCLE_MASK_PNV	/;"	d
BACKLIGHT_DUTY_CYCLE_SHIFT	drivers/video/i915_reg.h	/^#define   BACKLIGHT_DUTY_CYCLE_SHIFT	/;"	d
BACKLIGHT_ENABLE	board/socrates/socrates.c	/^#define BACKLIGHT_ENABLE	/;"	d	file:
BACKLIGHT_MODULATION_FREQ_MASK	drivers/video/i915_reg.h	/^#define   BACKLIGHT_MODULATION_FREQ_MASK	/;"	d
BACKLIGHT_MODULATION_FREQ_SHIFT	drivers/video/i915_reg.h	/^#define   BACKLIGHT_MODULATION_FREQ_SHIFT	/;"	d
BACKWARD	arch/x86/cpu/quark/mrc_util.h	/^	BACKWARD,$/;"	e	enum:__anon78bf36a60103
BACK_BUTTON_GPIO	board/bosch/shc/board.h	/^#define BACK_BUTTON_GPIO /;"	d
BAD	lib/zlib/inflate.h	/^    BAD,        \/* got a data error -- remain here until reset *\/$/;"	e	enum:__anon43d5a4c40103
BADBLOCK_MARKER_LENGTH	drivers/mtd/nand/omap_gpmc.c	/^#define BADBLOCK_MARKER_LENGTH	/;"	d	file:
BADBLOCK_SCAN_MASK	drivers/mtd/nand/nand_bbt.c	/^#define BADBLOCK_SCAN_MASK /;"	d	file:
BAD_CLK_INDEX	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BAD_CLK_INDEX	/;"	d
BAD_CLK_INDEX	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BAD_CLK_INDEX	/;"	d
BAD_CLK_NAME	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BAD_CLK_NAME	/;"	d
BAD_CLK_NAME	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BAD_CLK_NAME	/;"	d
BAD_REGISTER_NUMBER	drivers/bios_emulator/bios.c	/^#define BAD_REGISTER_NUMBER /;"	d	file:
BAD_SCALED_DIV_VALUE	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BAD_SCALED_DIV_VALUE	/;"	d
BAD_SCALED_DIV_VALUE	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BAD_SCALED_DIV_VALUE	/;"	d
BAD_TRAP	arch/sparc/cpu/leon2/start.S	/^#define BAD_TRAP /;"	d	file:
BAD_TRAP	arch/sparc/cpu/leon3/start.S	/^#define BAD_TRAP /;"	d	file:
BAD_VENDOR_ID	drivers/bios_emulator/bios.c	/^#define BAD_VENDOR_ID /;"	d	file:
BAFXR	arch/sh/include/asm/cpu_sh7722.h	/^#define BAFXR /;"	d
BALCK_WHITE_V_LINES	arch/arm/mach-exynos/include/mach/dp_info.h	/^	BALCK_WHITE_V_LINES,$/;"	e	enum:pattern_type
BAMRA	arch/sh/include/asm/cpu_sh7750.h	/^#define BAMRA	/;"	d
BAMRB	arch/sh/include/asm/cpu_sh7750.h	/^#define BAMRB	/;"	d
BANK	drivers/mtd/nand/denali.c	/^#define BANK(/;"	d	file:
BANK	drivers/mtd/nand/denali_spl.c	/^#define BANK(/;"	d	file:
BANK0	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	BANK0,$/;"	e	enum:memory_bank
BANK0	arch/arm/mach-mvebu/include/mach/cpu.h	/^	BANK0,$/;"	e	enum:memory_bank
BANK0	arch/arm/mach-orion5x/include/mach/cpu.h	/^	BANK0,$/;"	e	enum:memory_bank
BANK0	drivers/net/lan91c96.h	/^#define BANK0 /;"	d
BANK0	include/linux/mtd/st_smi.h	/^#define BANK0	/;"	d
BANK0_SEL	include/linux/mtd/st_smi.h	/^#define BANK0_SEL	/;"	d
BANK1	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	BANK1,$/;"	e	enum:memory_bank
BANK1	arch/arm/mach-mvebu/include/mach/cpu.h	/^	BANK1,$/;"	e	enum:memory_bank
BANK1	arch/arm/mach-orion5x/include/mach/cpu.h	/^	BANK1,$/;"	e	enum:memory_bank
BANK1	drivers/net/lan91c96.h	/^#define BANK1 /;"	d
BANK1	include/linux/mtd/st_smi.h	/^#define BANK1	/;"	d
BANK1_SEL	include/linux/mtd/st_smi.h	/^#define BANK1_SEL	/;"	d
BANK2	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	BANK2,$/;"	e	enum:memory_bank
BANK2	arch/arm/mach-mvebu/include/mach/cpu.h	/^	BANK2,$/;"	e	enum:memory_bank
BANK2	arch/arm/mach-orion5x/include/mach/cpu.h	/^	BANK2,$/;"	e	enum:memory_bank
BANK2	drivers/net/lan91c96.h	/^#define BANK2 /;"	d
BANK2	include/linux/mtd/st_smi.h	/^#define BANK2	/;"	d
BANK2_SEL	include/linux/mtd/st_smi.h	/^#define BANK2_SEL	/;"	d
BANK3	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	BANK3$/;"	e	enum:memory_bank
BANK3	arch/arm/mach-mvebu/include/mach/cpu.h	/^	BANK3$/;"	e	enum:memory_bank
BANK3	arch/arm/mach-orion5x/include/mach/cpu.h	/^	BANK3$/;"	e	enum:memory_bank
BANK3	drivers/net/lan91c96.h	/^#define BANK3 /;"	d
BANK3	include/linux/mtd/st_smi.h	/^#define BANK3	/;"	d
BANK3_SEL	include/linux/mtd/st_smi.h	/^#define BANK3_SEL	/;"	d
BANK4	drivers/net/lan91c96.h	/^#define BANK4 /;"	d
BANKALLOCATION	arch/arm/include/asm/arch-omap3/cpu.h	/^#define BANKALLOCATION	/;"	d
BANKPARMS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^typedef struct bank_param BANKPARMS;$/;"	t	typeref:struct:bank_param	file:
BANKS1	arch/arm/include/asm/emif.h	/^#define BANKS1 /;"	d
BANKS2	arch/arm/include/asm/emif.h	/^#define BANKS2 /;"	d
BANKS4	arch/arm/include/asm/emif.h	/^#define BANKS4 /;"	d
BANKS8	arch/arm/include/asm/emif.h	/^#define BANKS8 /;"	d
BANKSEL_SHIFT	include/linux/mtd/st_smi.h	/^#define BANKSEL_SHIFT	/;"	d
BANK_ADDR_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	BANK_ADDR_MASK			= 7,$/;"	e	enum:__anon957231910203	file:
BANK_ADDR_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	BANK_ADDR_SHIFT			= 17,$/;"	e	enum:__anon957231910203	file:
BANK_EN	include/linux/mtd/st_smi.h	/^#define BANK_EN	/;"	d
BANK_INTERLEAVING	include/configs/sbc8641d.h	/^#define BANK_INTERLEAVING	/;"	d
BANK_INTLV	include/configs/T102xRDB.h	/^#define BANK_INTLV /;"	d
BANK_MASK	board/freescale/ls1021atwr/ls1021atwr.c	/^#define BANK_MASK	/;"	d	file:
BANK_SELECT	drivers/net/smc91111.h	/^#define	BANK_SELECT	/;"	d
BANK_SZ	drivers/gpio/pca953x_gpio.c	/^#define BANK_SZ /;"	d	file:
BANK_TO_GPIO	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define BANK_TO_GPIO(/;"	d
BANK_TO_GPIO	arch/arm/include/asm/arch/gpio.h	/^#define BANK_TO_GPIO(/;"	d
BAR	arch/sh/include/asm/cpu_sh7722.h	/^#define BAR /;"	d
BARA	arch/sh/include/asm/cpu_sh7750.h	/^#define BARA	/;"	d
BARB	arch/sh/include/asm/cpu_sh7750.h	/^#define BARB	/;"	d
BAR_EN	arch/x86/include/asm/arch-qemu/qemu.h	/^#define BAR_EN	/;"	d
BASE	drivers/net/ax88180.h	/^#define BASE	/;"	d
BASE	lib/zlib/adler32.c	/^#define BASE /;"	d	file:
BASEADDRESS	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define BASEADDRESS(/;"	d
BASECLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASECLK	include/dt-bindings/clock/microchip,clock.h	/^#define BASECLK	/;"	d
BASEHD	fs/ubifs/ubifs.h	/^#define BASEHD /;"	d
BASE_ADDR	board/micronas/vct/gpio.c	/^#define BASE_ADDR(/;"	d	file:
BASE_ADDR_HIGH	include/ns87308.h	/^#define BASE_ADDR_HIGH /;"	d
BASE_ADDR_LOW	include/ns87308.h	/^#define BASE_ADDR_LOW /;"	d
BASE_CODE	include/radeon.h	/^#define BASE_CODE	/;"	d
BASE_DIR	tools/buildman/test.py	/^BASE_DIR = 'base'$/;"	v
BASE_DIST	drivers/usb/host/ehci-sunxi.c	/^#define BASE_DIST	/;"	d	file:
BASE_DIST	drivers/usb/host/ohci-sunxi.c	/^#define BASE_DIST	/;"	d	file:
BASE_IO_ADDR	drivers/net/sh_eth.h	/^#define BASE_IO_ADDR	/;"	d
BASE_REG	drivers/net/smc91111.h	/^#define	BASE_REG	/;"	d
BASE_REV_IVB	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define BASE_REV_IVB	/;"	d
BASE_REV_MASK	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define BASE_REV_MASK	/;"	d
BASE_REV_SNB	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define BASE_REV_SNB	/;"	d
BASRA	arch/sh/include/asm/cpu_sh7750.h	/^#define BASRA	/;"	d
BASRB	arch/sh/include/asm/cpu_sh7750.h	/^#define BASRB	/;"	d
BAT	arch/powerpc/include/asm/mmu.h	/^} BAT;$/;"	t	typeref:struct:_BAT
BATL	arch/powerpc/include/asm/mmu.h	/^} BATL;$/;"	t	typeref:struct:_BATL
BATLOW_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   BATLOW_EN	/;"	d
BATLOW_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   BATLOW_STS	/;"	d
BATLOW_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   BATLOW_STS	/;"	d
BATL_CACHEINHIBIT	arch/powerpc/include/asm/mmu.h	/^#define BATL_CACHEINHIBIT /;"	d
BATL_GUARDEDSTORAGE	arch/powerpc/include/asm/mmu.h	/^#define BATL_GUARDEDSTORAGE /;"	d
BATL_MEMCOHERENCE	arch/powerpc/include/asm/mmu.h	/^#define BATL_MEMCOHERENCE	/;"	d
BATL_NO_ACCESS	arch/powerpc/include/asm/mmu.h	/^#define BATL_NO_ACCESS	/;"	d
BATL_PADDR	arch/powerpc/include/asm/mmu.h	/^#define BATL_PADDR(/;"	d
BATL_PP_00	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_00	/;"	d
BATL_PP_01	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_01	/;"	d
BATL_PP_10	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_10	/;"	d
BATL_PP_11	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_11	/;"	d
BATL_PP_MSK	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_MSK	/;"	d
BATL_PP_NO_ACCESS	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_NO_ACCESS	/;"	d
BATL_PP_RO	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_RO	/;"	d
BATL_PP_RW	arch/powerpc/include/asm/mmu.h	/^#define BATL_PP_RW	/;"	d
BATL_WRITETHROUGH	arch/powerpc/include/asm/mmu.h	/^#define BATL_WRITETHROUGH /;"	d
BATTDETEN	include/fsl_pmic.h	/^#define BATTDETEN	/;"	d
BATU	arch/powerpc/include/asm/mmu.h	/^} BATU;$/;"	t	typeref:struct:_BATU
BATU_BL_128K	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_128K /;"	d
BATU_BL_128M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_128M /;"	d
BATU_BL_16M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_16M /;"	d
BATU_BL_1G	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_1G /;"	d
BATU_BL_1M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_1M /;"	d
BATU_BL_256K	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_256K /;"	d
BATU_BL_256M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_256M /;"	d
BATU_BL_2G	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_2G /;"	d
BATU_BL_2M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_2M /;"	d
BATU_BL_32M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_32M /;"	d
BATU_BL_4G	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_4G /;"	d
BATU_BL_4M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_4M /;"	d
BATU_BL_512K	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_512K /;"	d
BATU_BL_512M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_512M /;"	d
BATU_BL_64M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_64M /;"	d
BATU_BL_8M	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_8M /;"	d
BATU_BL_MAX	arch/powerpc/include/asm/mmu.h	/^#define BATU_BL_MAX	/;"	d
BATU_INVALID	arch/powerpc/include/asm/mmu.h	/^#define BATU_INVALID /;"	d
BATU_SIZE	arch/powerpc/include/asm/mmu.h	/^#define BATU_SIZE(/;"	d
BATU_VADDR	arch/powerpc/include/asm/mmu.h	/^#define BATU_VADDR(/;"	d
BATU_VALID	arch/powerpc/include/asm/mmu.h	/^#define BATU_VALID(/;"	d
BATU_VP	arch/powerpc/include/asm/mmu.h	/^#define BATU_VP /;"	d
BATU_VS	arch/powerpc/include/asm/mmu.h	/^#define BATU_VS /;"	d
BAT_I2C_ADDRESS	board/nvidia/dalmore/dalmore.c	/^#define BAT_I2C_ADDRESS	/;"	d	file:
BAT_PHYS_ADDR	include/configs/MPC8641HPCN.h	/^#define BAT_PHYS_ADDR(/;"	d
BAUDRATE	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define BAUDRATE	/;"	d	file:
BAV335A	board/birdland/bav335x/board.h	/^enum board_type {UNKNOWN, BAV335A, BAV335B};$/;"	e	enum:board_type
BAV335B	board/birdland/bav335x/board.h	/^enum board_type {UNKNOWN, BAV335A, BAV335B};$/;"	e	enum:board_type
BAV_VERSION	board/birdland/bav335x/Kconfig	/^config BAV_VERSION$/;"	c
BA_BITS	drivers/ddr/microchip/ddr2_timing.h	/^#define BA_BITS	/;"	d
BA_MASK	drivers/ddr/microchip/ddr2_timing.h	/^#define BA_MASK	/;"	d
BA_RSHFT	drivers/ddr/microchip/ddr2_timing.h	/^#define BA_RSHFT	/;"	d
BBG_PMMR_A	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMMR_A:		.long	0xFF800010$/;"	l
BBG_PMMR_D_PMSR1	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMMR_D_PMSR1:	.long	0xffffbffd$/;"	l
BBG_PMMR_D_PMSR2	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMMR_D_PMSR2:	.long	0xfc21a7ff$/;"	l
BBG_PMMR_D_PMSR3	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMMR_D_PMSR3:	.long	0xfffffff8$/;"	l
BBG_PMMR_D_PMSR4	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMMR_D_PMSR4:	.long	0xdffdfff9$/;"	l
BBG_PMMR_D_PMSRG	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMMR_D_PMSRG:	.long	0xffffffff$/;"	l
BBG_PMSR1_A	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR1_A:		.long	0xFF800014$/;"	l
BBG_PMSR1_D	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR1_D:		.long	0x00004002$/;"	l
BBG_PMSR2_A	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR2_A:		.long	0xFF800018$/;"	l
BBG_PMSR2_D	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR2_D:		.long	0x03de5800$/;"	l
BBG_PMSR3_A	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR3_A:		.long	0xFF80001C$/;"	l
BBG_PMSR3_D	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR3_D:		.long	0x00000007$/;"	l
BBG_PMSR4_A	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR4_A:		.long	0xFF800020$/;"	l
BBG_PMSR4_D	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSR4_D:		.long	0x20020006$/;"	l
BBG_PMSRG_A	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSRG_A:		.long	0xFF800024$/;"	l
BBG_PMSRG_D	board/renesas/r7780mp/lowlevel_init.S	/^BBG_PMSRG_D:		.long	0x00000000$/;"	l
BBIF1_FLOW_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_FLOW_MARK,	BBIF1_RX_FLOW_N_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_FLOW_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_FLAG_MARK, BBIF1_SS1_MARK, BBIF1_FLOW_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_RSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_TSCK_MARK,	BBIF1_RSCK_MARK,	BBIF1_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_RSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_READY_MARK, BBIF1_RSCK_MARK, PORT115_I2C_SCL2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_RSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_TSCK_MARK,	BBIF1_RSCK_MARK,	BBIF1_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_RSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_WAKE_MARK, BBIF1_RSYNC_MARK, PORT116_I2C_SDA2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_RXD_MARK,		BBIF1_TXD_MARK,		BBIF1_TSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_DATA_MARK, BBIF1_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_RX_FLOW_N_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_FLOW_MARK,	BBIF1_RX_FLOW_N_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_FLAG_MARK, BBIF1_SS1_MARK, BBIF1_FLOW_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF1_SS2_MARK, SCIFA3_RTS__MARK, MFG3_OUT1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_TSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_TSCK_MARK,	BBIF1_RSCK_MARK,	BBIF1_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_TSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_WAKE_MARK, BBIF1_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_TSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_RXD_MARK,		BBIF1_TXD_MARK,		BBIF1_TSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_TSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_DATA_MARK, BBIF1_TSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF1_RXD_MARK,		BBIF1_TXD_MARK,		BBIF1_TSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF1_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_READY_MARK, BBIF1_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_RXD2_PORT60_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_RXD2_PORT60_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF2_RXD2_PORT90_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_RXD2_PORT90_MARK, \/* MSEL5CR_0_1 *\/$/;"	e	enum:__anona304c1340103	file:
BBIF2_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF2_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF2_SCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_SYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF2_SYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TSCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD2_MARK, PORT194_SCIFA5_RTS__MARK, BBIF2_TSCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TSCK2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, FSIAIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TSCK2_PORT59_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_TSCK2_PORT59_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF2_TSCK2_PORT89_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_TSCK2_PORT89_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF2_TSYNC1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD1_MARK, PORT193_SCIFA5_CTS__MARK, BBIF2_TSYNC1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TSYNC2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, FSIAILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TSYNC2_PORT184_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_TSYNC2_PORT184_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF2_TSYNC2_PORT6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_TSYNC2_PORT6_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF2_TXD1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD3_MARK, PORT195_SCIFA5_RXD_MARK, BBIF2_TXD1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TXD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOSLD_MARK, BBIF2_TXD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBIF2_TXD2_PORT183_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_TXD2_PORT183_MARK,$/;"	e	enum:__anona304c1340103	file:
BBIF2_TXD2_PORT5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	BBIF2_TXD2_PORT5_MARK, \/* MSEL5CR_0_0 *\/$/;"	e	enum:__anona304c1340103	file:
BBIF2_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF2_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BBLCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define BBLCR0 /;"	d
BBLCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BBLCR1 /;"	d
BBRA	arch/sh/include/asm/cpu_sh7750.h	/^#define BBRA	/;"	d
BBRB	arch/sh/include/asm/cpu_sh7750.h	/^#define BBRB	/;"	d
BBRSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define BBRSTR /;"	d
BBTOYS_LCD	board/ti/beagle/beagle.c	/^#define BBTOYS_LCD	/;"	d	file:
BBTOYS_VGA	board/ti/beagle/beagle.c	/^#define BBTOYS_VGA	/;"	d	file:
BBTOYS_WIFI	board/ti/beagle/beagle.c	/^#define BBTOYS_WIFI	/;"	d	file:
BBT_BLOCK_FACTORY_BAD	drivers/mtd/nand/nand_bbt.c	/^#define BBT_BLOCK_FACTORY_BAD	/;"	d	file:
BBT_BLOCK_GOOD	drivers/mtd/nand/nand_bbt.c	/^#define BBT_BLOCK_GOOD	/;"	d	file:
BBT_BLOCK_RESERVED	drivers/mtd/nand/nand_bbt.c	/^#define BBT_BLOCK_RESERVED	/;"	d	file:
BBT_BLOCK_WORN	drivers/mtd/nand/nand_bbt.c	/^#define BBT_BLOCK_WORN	/;"	d	file:
BBT_ENTRY_MASK	drivers/mtd/nand/nand_bbt.c	/^#define BBT_ENTRY_MASK	/;"	d	file:
BBT_ENTRY_SHIFT	drivers/mtd/nand/nand_bbt.c	/^#define BBT_ENTRY_SHIFT	/;"	d	file:
BB_BANNER	common/cli_hush.c	/^#define BB_BANNER$/;"	d	file:
BB_CHRG_EN	include/palmas.h	/^#define BB_CHRG_EN	/;"	d
BB_HIGH_ICHRG	include/palmas.h	/^#define BB_HIGH_ICHRG	/;"	d
BB_LOW_ICHRG	include/palmas.h	/^#define BB_LOW_ICHRG	/;"	d
BB_MEAS	include/twl6030.h	/^#define BB_MEAS	/;"	d
BB_MII_DEVNAME	include/miiphy.h	/^#define BB_MII_DEVNAME	/;"	d
BB_MII_RELOCATE	drivers/net/phy/miiphybb.c	/^#define BB_MII_RELOCATE(/;"	d	file:
BB_VRTC_CTRL	include/palmas.h	/^#define BB_VRTC_CTRL	/;"	d
BB_VSEL_2V5	include/palmas.h	/^#define BB_VSEL_2V5	/;"	d
BB_VSEL_3V0	include/palmas.h	/^#define BB_VSEL_3V0	/;"	d
BB_VSEL_3V15	include/palmas.h	/^#define BB_VSEL_3V15	/;"	d
BB_VSEL_VBAT	include/palmas.h	/^#define BB_VSEL_VBAT	/;"	d
BC1_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BC1_SHIFT	/;"	d	file:
BC2_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BC2_SHIFT	/;"	d	file:
BC3_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BC3_SHIFT	/;"	d	file:
BCACHE	arch/mips/include/asm/cachectl.h	/^#define	BCACHE	/;"	d
BCAP_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BCAP_MASK	/;"	d	file:
BCAP_OVD_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BCAP_OVD_MASK	/;"	d	file:
BCD	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define BCD(/;"	d
BCE_DISABLE	arch/arm/include/asm/omap_mmc.h	/^#define BCE_DISABLE	/;"	d
BCE_ENABLE	arch/arm/include/asm/omap_mmc.h	/^#define BCE_ENABLE	/;"	d
BCFR	drivers/net/sh_eth.h	/^	BCFR,$/;"	e	enum:__anon5ef54f5a0103
BCFRR	drivers/net/sh_eth.h	/^	BCFRR,$/;"	e	enum:__anon5ef54f5a0103
BCFR_BIT	drivers/net/sh_eth.h	/^enum BCFR_BIT {$/;"	g
BCFR_RPAUSE	drivers/net/sh_eth.h	/^	BCFR_RPAUSE = 0x0000ffff,$/;"	e	enum:BCFR_BIT
BCFR_UNLIMITED	drivers/net/sh_eth.h	/^	BCFR_UNLIMITED = 0,$/;"	e	enum:BCFR_BIT
BCH4_BIT_PAD	drivers/mtd/nand/omap_gpmc.c	/^#define BCH4_BIT_PAD	/;"	d	file:
BCHG	drivers/usb/host/r8a66597.h	/^#define	BCHG	/;"	d
BCHGE	drivers/usb/host/r8a66597.h	/^#define	BCHGE	/;"	d
BCH_16_BIT	include/linux/mtd/omap_elm.h	/^	BCH_16_BIT$/;"	e	enum:bch_level
BCH_4_BIT	include/linux/mtd/omap_elm.h	/^	BCH_4_BIT = 0,$/;"	e	enum:bch_level
BCH_8_BIT	include/linux/mtd/omap_elm.h	/^	BCH_8_BIT,$/;"	e	enum:bch_level
BCH_BLOCKNAME_NAME_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_BLOCKNAME_NAME_MASK	/;"	d
BCH_BLOCKNAME_NAME_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_BLOCKNAME_NAME_OFFSET	/;"	d
BCH_CONFIG_0	drivers/mtd/nand/tegra_nand.h	/^#define BCH_CONFIG_0	/;"	d
BCH_CONFIG_BCH_ECC_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define BCH_CONFIG_BCH_ECC_DISABLE	/;"	d
BCH_CONFIG_BCH_ECC_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define BCH_CONFIG_BCH_ECC_ENABLE	/;"	d
BCH_CONFIG_BCH_ECC_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_CONFIG_BCH_ECC_MASK	/;"	d
BCH_CONFIG_BCH_TVAL14	drivers/mtd/nand/tegra_nand.h	/^	BCH_CONFIG_BCH_TVAL14	= 2 << BCH_CONFIG_BCH_TVALUE_SHIFT,$/;"	e	enum:__anonf17bc6a00703
BCH_CONFIG_BCH_TVAL16	drivers/mtd/nand/tegra_nand.h	/^	BCH_CONFIG_BCH_TVAL16	= 3 << BCH_CONFIG_BCH_TVALUE_SHIFT$/;"	e	enum:__anonf17bc6a00703
BCH_CONFIG_BCH_TVAL4	drivers/mtd/nand/tegra_nand.h	/^	BCH_CONFIG_BCH_TVAL4	= 0 << BCH_CONFIG_BCH_TVALUE_SHIFT,$/;"	e	enum:__anonf17bc6a00703
BCH_CONFIG_BCH_TVAL8	drivers/mtd/nand/tegra_nand.h	/^	BCH_CONFIG_BCH_TVAL8	= 1 << BCH_CONFIG_BCH_TVALUE_SHIFT,$/;"	e	enum:__anonf17bc6a00703
BCH_CONFIG_BCH_TVALUE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_CONFIG_BCH_TVALUE_MASK	/;"	d
BCH_CONFIG_BCH_TVALUE_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define BCH_CONFIG_BCH_TVALUE_SHIFT	/;"	d
BCH_CTRL_BM_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_BM_ERROR_IRQ	/;"	d
BCH_CTRL_CLKGATE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_CLKGATE	/;"	d
BCH_CTRL_COMPLETE_IRQ	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_COMPLETE_IRQ	/;"	d
BCH_CTRL_COMPLETE_IRQ_EN	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_COMPLETE_IRQ_EN	/;"	d
BCH_CTRL_DEBUGSYNDROME	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_DEBUGSYNDROME	/;"	d
BCH_CTRL_DEBUG_STALL_IRQ	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_DEBUG_STALL_IRQ	/;"	d
BCH_CTRL_DEBUG_STALL_IRQ_EN	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_DEBUG_STALL_IRQ_EN	/;"	d
BCH_CTRL_M2M_ENABLE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_M2M_ENABLE	/;"	d
BCH_CTRL_M2M_ENCODE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_M2M_ENCODE	/;"	d
BCH_CTRL_M2M_LAYOUT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_M2M_LAYOUT_MASK	/;"	d
BCH_CTRL_M2M_LAYOUT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_M2M_LAYOUT_OFFSET	/;"	d
BCH_CTRL_SFTRST	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_CTRL_SFTRST	/;"	d
BCH_DATAPTR_ADDR_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DATAPTR_ADDR_MASK	/;"	d
BCH_DATAPTR_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DATAPTR_ADDR_OFFSET	/;"	d
BCH_DBGAHBMREAD_VALUES_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGAHBMREAD_VALUES_MASK	/;"	d
BCH_DBGAHBMREAD_VALUES_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGAHBMREAD_VALUES_OFFSET	/;"	d
BCH_DBGCSFEREAD_VALUES_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGCSFEREAD_VALUES_MASK	/;"	d
BCH_DBGCSFEREAD_VALUES_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGCSFEREAD_VALUES_OFFSET	/;"	d
BCH_DBGKESREAD_VALUES_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGKESREAD_VALUES_MASK	/;"	d
BCH_DBGKESREAD_VALUES_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGKESREAD_VALUES_OFFSET	/;"	d
BCH_DBGSYNDGENREAD_VALUES_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGSYNDGENREAD_VALUES_MASK	/;"	d
BCH_DBGSYNDGENREAD_VALUES_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DBGSYNDGENREAD_VALUES_OFFSET	/;"	d
BCH_DEBUG0_BM_KES_TEST_BYPASS	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_BM_KES_TEST_BYPASS	/;"	d
BCH_DEBUG0_DEBUG_REG_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_DEBUG_REG_SELECT_MASK	/;"	d
BCH_DEBUG0_DEBUG_REG_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_DEBUG_REG_SELECT_OFFSET	/;"	d
BCH_DEBUG0_KES_DEBUG_KICK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_KICK	/;"	d
BCH_DEBUG0_KES_DEBUG_MODE4K	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_MODE4K	/;"	d
BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG	/;"	d
BCH_DEBUG0_KES_DEBUG_SHIFT_SYND	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_SHIFT_SYND	/;"	d
BCH_DEBUG0_KES_DEBUG_STALL	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_STALL	/;"	d
BCH_DEBUG0_KES_DEBUG_STEP	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_STEP	/;"	d
BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_MASK	/;"	d
BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_NORMAL	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_NORMAL	/;"	d
BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_OFFSET	/;"	d
BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_TEST_MODE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_TEST_MODE	/;"	d
BCH_DEBUG0_KES_STANDALONE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_KES_STANDALONE	/;"	d
BCH_DEBUG0_ROM_BIST_COMPLETE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_ROM_BIST_COMPLETE	/;"	d
BCH_DEBUG0_ROM_BIST_ENABLE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_ROM_BIST_ENABLE	/;"	d
BCH_DEBUG0_RSVD0_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_RSVD0_MASK	/;"	d
BCH_DEBUG0_RSVD0_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_RSVD0_OFFSET	/;"	d
BCH_DEBUG0_RSVD1_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_RSVD1_MASK	/;"	d
BCH_DEBUG0_RSVD1_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_DEBUG0_RSVD1_OFFSET	/;"	d
BCH_DEC_RESULT_0	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_RESULT_0	/;"	d
BCH_DEC_RESULT_CORRFAIL_ERR_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_RESULT_CORRFAIL_ERR_MASK	/;"	d
BCH_DEC_RESULT_PAGE_COUNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_RESULT_PAGE_COUNT_MASK	/;"	d
BCH_DEC_STATUS_BUF_0	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_BUF_0	/;"	d
BCH_DEC_STATUS_CORR_SEC_FLAG_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_CORR_SEC_FLAG_MASK	/;"	d
BCH_DEC_STATUS_CORR_TAG_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_CORR_TAG_MASK	/;"	d
BCH_DEC_STATUS_FAIL_SEC_FLAG_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_FAIL_SEC_FLAG_MASK	/;"	d
BCH_DEC_STATUS_FAIL_TAG_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_FAIL_TAG_MASK	/;"	d
BCH_DEC_STATUS_MAX_CORR_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_MAX_CORR_CNT_MASK	/;"	d
BCH_DEC_STATUS_PAGE_NUMBER_MASK	drivers/mtd/nand/tegra_nand.h	/^#define BCH_DEC_STATUS_PAGE_NUMBER_MASK	/;"	d
BCH_ECC_BYTES	lib/bch.c	/^#define BCH_ECC_BYTES(/;"	d	file:
BCH_ECC_WORDS	lib/bch.c	/^#define BCH_ECC_WORDS(/;"	d	file:
BCH_ENCODEPTR_ADDR_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_ENCODEPTR_ADDR_MASK	/;"	d
BCH_ENCODEPTR_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_ENCODEPTR_ADDR_OFFSET	/;"	d
BCH_FLASHLAYOUT0_DATA0_SIZE_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_DATA0_SIZE_MASK	/;"	d
BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC10	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC10	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC12	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC12	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC14	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC14	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC16	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC16	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC18	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC18	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC2	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC2	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC20	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC20	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC22	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC22	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC24	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC24	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC26	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC26	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC28	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC28	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC30	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC30	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC32	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC32	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC4	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC4	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC6	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC6	/;"	d
BCH_FLASHLAYOUT0_ECC0_ECC8	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_ECC8	/;"	d
BCH_FLASHLAYOUT0_ECC0_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_MASK	/;"	d
BCH_FLASHLAYOUT0_ECC0_NONE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_NONE	/;"	d
BCH_FLASHLAYOUT0_ECC0_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_ECC0_OFFSET	/;"	d
BCH_FLASHLAYOUT0_GF13_0_GF14_1	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_GF13_0_GF14_1	/;"	d
BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET	/;"	d
BCH_FLASHLAYOUT0_META_SIZE_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_META_SIZE_MASK	/;"	d
BCH_FLASHLAYOUT0_META_SIZE_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_META_SIZE_OFFSET	/;"	d
BCH_FLASHLAYOUT0_NBLOCKS_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_NBLOCKS_MASK	/;"	d
BCH_FLASHLAYOUT0_NBLOCKS_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT0_NBLOCKS_OFFSET	/;"	d
BCH_FLASHLAYOUT1_DATAN_SIZE_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_DATAN_SIZE_MASK	/;"	d
BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC10	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC10	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC12	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC12	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC14	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC14	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC16	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC16	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC18	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC18	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC2	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC2	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC20	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC20	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC22	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC22	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC24	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC24	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC26	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC26	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC28	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC28	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC30	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC30	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC32	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC32	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC4	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC4	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC6	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC6	/;"	d
BCH_FLASHLAYOUT1_ECCN_ECC8	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_ECC8	/;"	d
BCH_FLASHLAYOUT1_ECCN_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_MASK	/;"	d
BCH_FLASHLAYOUT1_ECCN_NONE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_NONE	/;"	d
BCH_FLASHLAYOUT1_ECCN_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_ECCN_OFFSET	/;"	d
BCH_FLASHLAYOUT1_GF13_0_GF14_1	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_GF13_0_GF14_1	/;"	d
BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET	/;"	d
BCH_FLASHLAYOUT1_PAGE_SIZE_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_PAGE_SIZE_MASK	/;"	d
BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS0_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS0_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS0_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS0_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS10_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS10_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS10_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS10_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS11_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS11_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS11_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS11_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS12_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS12_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS12_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS12_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS13_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS13_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS13_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS13_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS14_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS14_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS14_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS14_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS15_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS15_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS15_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS15_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS1_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS1_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS1_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS1_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS2_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS2_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS2_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS2_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS3_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS3_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS3_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS3_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS4_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS4_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS4_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS4_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS5_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS5_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS5_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS5_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS6_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS6_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS6_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS6_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS7_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS7_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS7_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS7_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS8_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS8_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS8_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS8_SELECT_OFFSET	/;"	d
BCH_LAYOUTSELECT_CS9_SELECT_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS9_SELECT_MASK	/;"	d
BCH_LAYOUTSELECT_CS9_SELECT_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_LAYOUTSELECT_CS9_SELECT_OFFSET	/;"	d
BCH_METAPTR_ADDR_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_METAPTR_ADDR_MASK	/;"	d
BCH_METAPTR_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_METAPTR_ADDR_OFFSET	/;"	d
BCH_MODE_ERASE_THRESHOLD_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_MODE_ERASE_THRESHOLD_MASK	/;"	d
BCH_MODE_ERASE_THRESHOLD_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_MODE_ERASE_THRESHOLD_OFFSET	/;"	d
BCH_STATUS0_ALLONES	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_ALLONES	/;"	d
BCH_STATUS0_COMPLETED_CE_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_COMPLETED_CE_MASK	/;"	d
BCH_STATUS0_COMPLETED_CE_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_COMPLETED_CE_OFFSET	/;"	d
BCH_STATUS0_CORRECTED	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_CORRECTED	/;"	d
BCH_STATUS0_HANDLE_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_HANDLE_MASK	/;"	d
BCH_STATUS0_HANDLE_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_HANDLE_OFFSET	/;"	d
BCH_STATUS0_STATUS_BLK0_ERASED	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_ERASED	/;"	d
BCH_STATUS0_STATUS_BLK0_ERROR1	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_ERROR1	/;"	d
BCH_STATUS0_STATUS_BLK0_ERROR2	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_ERROR2	/;"	d
BCH_STATUS0_STATUS_BLK0_ERROR3	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_ERROR3	/;"	d
BCH_STATUS0_STATUS_BLK0_ERROR4	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_ERROR4	/;"	d
BCH_STATUS0_STATUS_BLK0_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_MASK	/;"	d
BCH_STATUS0_STATUS_BLK0_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_OFFSET	/;"	d
BCH_STATUS0_STATUS_BLK0_UNCORRECTABLE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_UNCORRECTABLE	/;"	d
BCH_STATUS0_STATUS_BLK0_ZERO	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_STATUS_BLK0_ZERO	/;"	d
BCH_STATUS0_UNCORRECTABLE	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_STATUS0_UNCORRECTABLE	/;"	d
BCH_VERSION_MAJOR_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_VERSION_MAJOR_MASK	/;"	d
BCH_VERSION_MAJOR_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_VERSION_MAJOR_OFFSET	/;"	d
BCH_VERSION_MINOR_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_VERSION_MINOR_MASK	/;"	d
BCH_VERSION_MINOR_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_VERSION_MINOR_OFFSET	/;"	d
BCH_VERSION_STEP_MASK	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_VERSION_STEP_MASK	/;"	d
BCH_VERSION_STEP_OFFSET	arch/arm/include/asm/imx-common/regs-bch.h	/^#define	BCH_VERSION_STEP_OFFSET	/;"	d
BCIPPCCHR	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR(/;"	d
BCIPPCCHR0	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR0	/;"	d
BCIPPCCHR1	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR1	/;"	d
BCIPPCCHR2	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR2	/;"	d
BCIPPCCHR3	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR3	/;"	d
BCIPPCCHR4	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR4	/;"	d
BCIPPCCHR5	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCIPPCCHR5	/;"	d
BCLK_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define BCLK_2	/;"	d
BCLK_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define BCLK_3	/;"	d
BCLK_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define BCLK_4	/;"	d
BCLK_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define BCLK_MASK	/;"	d
BCLK_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define BCLK_P	/;"	d
BCLR	drivers/usb/host/r8a66597.h	/^#define	BCLR	/;"	d
BCM2835	arch/arm/mach-bcm283x/Kconfig	/^config BCM2835$/;"	c
BCM2835_CHAN_MASK	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_CHAN_MASK	/;"	d
BCM2835_GPIO_ALT0	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_ALT0	/;"	d
BCM2835_GPIO_ALT1	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_ALT1	/;"	d
BCM2835_GPIO_ALT2	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_ALT2	/;"	d
BCM2835_GPIO_ALT3	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_ALT3	/;"	d
BCM2835_GPIO_ALT4	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_ALT4	/;"	d
BCM2835_GPIO_ALT5	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_ALT5	/;"	d
BCM2835_GPIO_BASE	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_BASE	/;"	d
BCM2835_GPIO_COMMON_BANK	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_COMMON_BANK(/;"	d
BCM2835_GPIO_COMMON_SHIFT	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_COMMON_SHIFT(/;"	d
BCM2835_GPIO_COUNT	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_COUNT	/;"	d
BCM2835_GPIO_FSEL_BANK	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_FSEL_BANK(/;"	d
BCM2835_GPIO_FSEL_MASK	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_FSEL_MASK	/;"	d
BCM2835_GPIO_FSEL_SHIFT	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_FSEL_SHIFT(/;"	d
BCM2835_GPIO_INPUT	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_INPUT	/;"	d
BCM2835_GPIO_OUTPUT	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define BCM2835_GPIO_OUTPUT	/;"	d
BCM2835_MBOX_ALPHA_MODE_0_OPAQUE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE	/;"	d
BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT	/;"	d
BCM2835_MBOX_ALPHA_MODE_IGNORED	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_ALPHA_MODE_IGNORED	/;"	d
BCM2835_MBOX_CLOCK_ID_ARM	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_ARM	/;"	d
BCM2835_MBOX_CLOCK_ID_CORE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_CORE	/;"	d
BCM2835_MBOX_CLOCK_ID_EMMC	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_EMMC	/;"	d
BCM2835_MBOX_CLOCK_ID_H264	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_H264	/;"	d
BCM2835_MBOX_CLOCK_ID_ISP	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_ISP	/;"	d
BCM2835_MBOX_CLOCK_ID_PIXEL	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_PIXEL	/;"	d
BCM2835_MBOX_CLOCK_ID_PWM	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_PWM	/;"	d
BCM2835_MBOX_CLOCK_ID_SDRAM	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_SDRAM	/;"	d
BCM2835_MBOX_CLOCK_ID_UART	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_UART	/;"	d
BCM2835_MBOX_CLOCK_ID_V3D	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_CLOCK_ID_V3D	/;"	d
BCM2835_MBOX_INIT_HDR	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_INIT_HDR(/;"	d
BCM2835_MBOX_INIT_TAG	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_INIT_TAG(/;"	d
BCM2835_MBOX_INIT_TAG_NO_REQ	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_INIT_TAG_NO_REQ(/;"	d
BCM2835_MBOX_PACK	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_PACK(/;"	d
BCM2835_MBOX_PHYSADDR	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_PHYSADDR	/;"	d
BCM2835_MBOX_PIXEL_ORDER_BGR	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_PIXEL_ORDER_BGR	/;"	d
BCM2835_MBOX_PIXEL_ORDER_RGB	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_PIXEL_ORDER_RGB	/;"	d
BCM2835_MBOX_POWER_DEVID_CCP2TX	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_CCP2TX	/;"	d
BCM2835_MBOX_POWER_DEVID_I2C0	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_I2C0	/;"	d
BCM2835_MBOX_POWER_DEVID_I2C1	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_I2C1	/;"	d
BCM2835_MBOX_POWER_DEVID_I2C2	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_I2C2	/;"	d
BCM2835_MBOX_POWER_DEVID_SDHCI	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_SDHCI	/;"	d
BCM2835_MBOX_POWER_DEVID_SPI	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_SPI	/;"	d
BCM2835_MBOX_POWER_DEVID_UART0	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_UART0	/;"	d
BCM2835_MBOX_POWER_DEVID_UART1	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_UART1	/;"	d
BCM2835_MBOX_POWER_DEVID_USB_HCD	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_DEVID_USB_HCD	/;"	d
BCM2835_MBOX_POWER_STATE_RESP_NODEV	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_STATE_RESP_NODEV	/;"	d
BCM2835_MBOX_POWER_STATE_RESP_ON	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_POWER_STATE_RESP_ON	/;"	d
BCM2835_MBOX_PROP_CHAN	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_PROP_CHAN	/;"	d
BCM2835_MBOX_REQ_CODE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_REQ_CODE	/;"	d
BCM2835_MBOX_RESP_CODE_SUCCESS	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_RESP_CODE_SUCCESS	/;"	d
BCM2835_MBOX_SET_POWER_STATE_REQ_ON	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_SET_POWER_STATE_REQ_ON	/;"	d
BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT	/;"	d
BCM2835_MBOX_STATUS_RD_EMPTY	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_STATUS_RD_EMPTY	/;"	d
BCM2835_MBOX_STATUS_WR_FULL	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_STATUS_WR_FULL	/;"	d
BCM2835_MBOX_TAG_ALLOCATE_BUFFER	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER	/;"	d
BCM2835_MBOX_TAG_BLANK_SCREEN	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_BLANK_SCREEN	/;"	d
BCM2835_MBOX_TAG_GET_ALPHA_MODE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_ALPHA_MODE	/;"	d
BCM2835_MBOX_TAG_GET_ARM_MEMORY	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_ARM_MEMORY	/;"	d
BCM2835_MBOX_TAG_GET_BOARD_REV	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_BOARD_REV	/;"	d
BCM2835_MBOX_TAG_GET_BOARD_SERIAL	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_BOARD_SERIAL	/;"	d
BCM2835_MBOX_TAG_GET_CLOCK_RATE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_CLOCK_RATE	/;"	d
BCM2835_MBOX_TAG_GET_DEPTH	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_DEPTH	/;"	d
BCM2835_MBOX_TAG_GET_MAC_ADDRESS	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS	/;"	d
BCM2835_MBOX_TAG_GET_OVERSCAN	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_OVERSCAN	/;"	d
BCM2835_MBOX_TAG_GET_PALETTE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_PALETTE	/;"	d
BCM2835_MBOX_TAG_GET_PHYSICAL_W_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H	/;"	d
BCM2835_MBOX_TAG_GET_PITCH	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_PITCH	/;"	d
BCM2835_MBOX_TAG_GET_PIXEL_ORDER	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER	/;"	d
BCM2835_MBOX_TAG_GET_POWER_STATE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_POWER_STATE	/;"	d
BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET	/;"	d
BCM2835_MBOX_TAG_GET_VIRTUAL_W_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H	/;"	d
BCM2835_MBOX_TAG_RELEASE_BUFFER	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_RELEASE_BUFFER	/;"	d
BCM2835_MBOX_TAG_SET_ALPHA_MODE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_ALPHA_MODE	/;"	d
BCM2835_MBOX_TAG_SET_DEPTH	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_DEPTH	/;"	d
BCM2835_MBOX_TAG_SET_OVERSCAN	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_OVERSCAN	/;"	d
BCM2835_MBOX_TAG_SET_PALETTE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_PALETTE	/;"	d
BCM2835_MBOX_TAG_SET_PHYSICAL_W_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H	/;"	d
BCM2835_MBOX_TAG_SET_PIXEL_ORDER	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER	/;"	d
BCM2835_MBOX_TAG_SET_POWER_STATE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_POWER_STATE	/;"	d
BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET	/;"	d
BCM2835_MBOX_TAG_SET_VIRTUAL_W_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H	/;"	d
BCM2835_MBOX_TAG_TEST_ALPHA_MODE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE	/;"	d
BCM2835_MBOX_TAG_TEST_DEPTH	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_DEPTH	/;"	d
BCM2835_MBOX_TAG_TEST_OVERSCAN	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_OVERSCAN	/;"	d
BCM2835_MBOX_TAG_TEST_PALETTE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_PALETTE	/;"	d
BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H	/;"	d
BCM2835_MBOX_TAG_TEST_PIXEL_ORDER	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER	/;"	d
BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET	/;"	d
BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H	/;"	d
BCM2835_MBOX_TAG_VAL_LEN_RESPONSE	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE	/;"	d
BCM2835_MBOX_UNPACK_CHAN	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_UNPACK_CHAN(/;"	d
BCM2835_MBOX_UNPACK_DATA	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define BCM2835_MBOX_UNPACK_DATA(/;"	d
BCM2835_SDHCI_BASE	arch/arm/mach-bcm283x/include/mach/sdhci.h	/^#define BCM2835_SDHCI_BASE /;"	d
BCM2835_TIMER_CS_M0	arch/arm/mach-bcm283x/include/mach/timer.h	/^#define BCM2835_TIMER_CS_M0	/;"	d
BCM2835_TIMER_CS_M1	arch/arm/mach-bcm283x/include/mach/timer.h	/^#define BCM2835_TIMER_CS_M1	/;"	d
BCM2835_TIMER_CS_M2	arch/arm/mach-bcm283x/include/mach/timer.h	/^#define BCM2835_TIMER_CS_M2	/;"	d
BCM2835_TIMER_CS_M3	arch/arm/mach-bcm283x/include/mach/timer.h	/^#define BCM2835_TIMER_CS_M3	/;"	d
BCM2835_TIMER_PHYSADDR	arch/arm/mach-bcm283x/include/mach/timer.h	/^#define BCM2835_TIMER_PHYSADDR	/;"	d
BCM2835_WDOG_PASSWORD	arch/arm/mach-bcm283x/include/mach/wdog.h	/^#define BCM2835_WDOG_PASSWORD	/;"	d
BCM2835_WDOG_PHYSADDR	arch/arm/mach-bcm283x/include/mach/wdog.h	/^#define BCM2835_WDOG_PHYSADDR	/;"	d
BCM2835_WDOG_RSTC_WRCFG_FULL_RESET	arch/arm/mach-bcm283x/include/mach/wdog.h	/^#define BCM2835_WDOG_RSTC_WRCFG_FULL_RESET	/;"	d
BCM2835_WDOG_RSTC_WRCFG_MASK	arch/arm/mach-bcm283x/include/mach/wdog.h	/^#define BCM2835_WDOG_RSTC_WRCFG_MASK	/;"	d
BCM2835_WDOG_WDOG_TIMEOUT_MASK	arch/arm/mach-bcm283x/include/mach/wdog.h	/^#define BCM2835_WDOG_WDOG_TIMEOUT_MASK	/;"	d
BCM2836	arch/arm/mach-bcm283x/Kconfig	/^config BCM2836$/;"	c
BCM2837	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837$/;"	c
BCM2837_32B	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837_32B$/;"	c
BCM2837_64B	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837_64B$/;"	c
BCM283X_MU_LCR_DATA_SIZE_8	drivers/serial/serial_bcm283x_mu.c	/^#define BCM283X_MU_LCR_DATA_SIZE_8	/;"	d	file:
BCM283X_MU_LSR_RX_READY	drivers/serial/serial_bcm283x_mu.c	/^#define BCM283X_MU_LSR_RX_READY	/;"	d	file:
BCM283X_MU_LSR_TX_EMPTY	drivers/serial/serial_bcm283x_mu.c	/^#define BCM283X_MU_LSR_TX_EMPTY	/;"	d	file:
BCM283X_MU_LSR_TX_IDLE	drivers/serial/serial_bcm283x_mu.c	/^#define BCM283X_MU_LSR_TX_IDLE	/;"	d	file:
BCM5461S_driver	drivers/net/phy/broadcom.c	/^static struct phy_driver BCM5461S_driver = {$/;"	v	typeref:struct:phy_driver	file:
BCM5464S_driver	drivers/net/phy/broadcom.c	/^static struct phy_driver BCM5464S_driver = {$/;"	v	typeref:struct:phy_driver	file:
BCM5482S_driver	drivers/net/phy/broadcom.c	/^static struct phy_driver BCM5482S_driver = {$/;"	v	typeref:struct:phy_driver	file:
BCM_CLK_DIV_FLAGS_EXISTS	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_DIV_FLAGS_EXISTS	/;"	d
BCM_CLK_DIV_FLAGS_EXISTS	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_DIV_FLAGS_EXISTS	/;"	d
BCM_CLK_DIV_FLAGS_FIXED	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_DIV_FLAGS_FIXED	/;"	d
BCM_CLK_DIV_FLAGS_FIXED	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_DIV_FLAGS_FIXED	/;"	d
BCM_CLK_GATE_FLAGS_ENABLED	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_ENABLED	/;"	d
BCM_CLK_GATE_FLAGS_ENABLED	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_ENABLED	/;"	d
BCM_CLK_GATE_FLAGS_EXISTS	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_EXISTS	/;"	d
BCM_CLK_GATE_FLAGS_EXISTS	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_EXISTS	/;"	d
BCM_CLK_GATE_FLAGS_HW	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_HW	/;"	d
BCM_CLK_GATE_FLAGS_HW	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_HW	/;"	d
BCM_CLK_GATE_FLAGS_NO_DISABLE	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_NO_DISABLE	/;"	d
BCM_CLK_GATE_FLAGS_NO_DISABLE	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_NO_DISABLE	/;"	d
BCM_CLK_GATE_FLAGS_SW	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_SW	/;"	d
BCM_CLK_GATE_FLAGS_SW	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_SW	/;"	d
BCM_CLK_GATE_FLAGS_SW_MANAGED	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_SW_MANAGED	/;"	d
BCM_CLK_GATE_FLAGS_SW_MANAGED	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_GATE_FLAGS_SW_MANAGED	/;"	d
BCM_CLK_TRIG_FLAGS_EXISTS	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define BCM_CLK_TRIG_FLAGS_EXISTS	/;"	d
BCM_CLK_TRIG_FLAGS_EXISTS	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define BCM_CLK_TRIG_FLAGS_EXISTS	/;"	d
BCM_CMD_NOACTION	drivers/i2c/kona_i2c.c	/^	BCM_CMD_NOACTION = 0,$/;"	e	enum:bcm_kona_cmd_t	file:
BCM_CMD_RESTART	drivers/i2c/kona_i2c.c	/^	BCM_CMD_RESTART,$/;"	e	enum:bcm_kona_cmd_t	file:
BCM_CMD_START	drivers/i2c/kona_i2c.c	/^	BCM_CMD_START,$/;"	e	enum:bcm_kona_cmd_t	file:
BCM_CMD_STOP	drivers/i2c/kona_i2c.c	/^	BCM_CMD_STOP,$/;"	e	enum:bcm_kona_cmd_t	file:
BCM_CYGNUS_driver	drivers/net/phy/broadcom.c	/^static struct phy_driver BCM_CYGNUS_driver = {$/;"	v	typeref:struct:phy_driver	file:
BCM_ETH_MAX_PORT_NUM	drivers/net/bcm-sf2-eth.h	/^#define BCM_ETH_MAX_PORT_NUM	/;"	d
BCM_NET_MODULE_DESCRIPTION	drivers/net/bcm-sf2-eth.c	/^#define BCM_NET_MODULE_DESCRIPTION	/;"	d	file:
BCM_NET_MODULE_VERSION	drivers/net/bcm-sf2-eth.c	/^#define BCM_NET_MODULE_VERSION	/;"	d	file:
BCM_SF2_ETH_DEV_NAME	drivers/net/bcm-sf2-eth.c	/^#define BCM_SF2_ETH_DEV_NAME	/;"	d	file:
BCM_SF2_ETH_MAC_NAME	drivers/net/bcm-sf2-eth-gmac.h	/^#define BCM_SF2_ETH_MAC_NAME	/;"	d
BCM_SPD_100K	drivers/i2c/kona_i2c.c	/^	BCM_SPD_100K = 0,$/;"	e	enum:bus_speed_index	file:
BCM_SPD_1MHZ	drivers/i2c/kona_i2c.c	/^	BCM_SPD_1MHZ,$/;"	e	enum:bus_speed_index	file:
BCM_SPD_400K	drivers/i2c/kona_i2c.c	/^	BCM_SPD_400K,$/;"	e	enum:bus_speed_index	file:
BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	BCR	/;"	d
BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define BCR	/;"	d
BCR1	arch/sh/include/asm/cpu_sh7706.h	/^#define	BCR1	/;"	d
BCR1	arch/sh/include/asm/cpu_sh7750.h	/^#define BCR1	/;"	d
BCR1_A	board/ms7750se/lowlevel_init.S	/^BCR1_A:		.long	BCR1$/;"	l
BCR1_A	board/renesas/r2dplus/lowlevel_init.S	/^BCR1_A:		.long	BCR1		\/* BCR1 Address *\/$/;"	l
BCR1_BREQEN	drivers/pci/pci_sh7751.c	/^#define BCR1_BREQEN	/;"	d	file:
BCR1_D	board/ms7750se/lowlevel_init.S	/^BCR1_D:		.long	0x00000008	\/* Area 3 SDRAM *\/$/;"	l
BCR1_D	board/renesas/r2dplus/lowlevel_init.S	/^BCR1_D:		.long	0x00180008$/;"	l
BCR2	arch/sh/include/asm/cpu_sh7706.h	/^#define	BCR2	/;"	d
BCR2	arch/sh/include/asm/cpu_sh7750.h	/^#define BCR2	/;"	d
BCR2_A	board/ms7750se/lowlevel_init.S	/^BCR2_A:		.long	BCR2$/;"	l
BCR2_A	board/renesas/r2dplus/lowlevel_init.S	/^BCR2_A:		.long	BCR2		\/* BCR2 Address *\/$/;"	l
BCR2_D	board/ms7750se/lowlevel_init.S	/^BCR2_D:		.long	BCR2_D_VALUE	\/* Bus width settings *\/$/;"	l
BCR2_D	board/renesas/r2dplus/lowlevel_init.S	/^BCR2_D:		.long	0xabe8$/;"	l
BCR2_D_VALUE	board/ms7750se/lowlevel_init.S	/^#define BCR2_D_VALUE	/;"	d	file:
BCR3	arch/sh/include/asm/cpu_sh7750.h	/^#define BCR3	/;"	d
BCR3_A	board/renesas/r2dplus/lowlevel_init.S	/^BCR3_A:		.long	BCR3		\/* BCR3 Address *\/$/;"	l
BCR3_D	board/renesas/r2dplus/lowlevel_init.S	/^BCR3_D:		.long	0x0000$/;"	l
BCR4	arch/sh/include/asm/cpu_sh7750.h	/^#define BCR4	/;"	d
BCR4_A	board/renesas/r2dplus/lowlevel_init.S	/^BCR4_A:		.long	BCR4		\/* BCR4 Address *\/$/;"	l
BCR4_D	board/renesas/r2dplus/lowlevel_init.S	/^BCR4_D:		.long	0x00000010$/;"	l
BCR_A	board/espt/lowlevel_init.S	/^BCR_A:		.long	0xFF801000$/;"	l
BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^BCR_A:			.long	BCR$/;"	l
BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^BCR_A:		.long	0xFF801000$/;"	l
BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^BCR_A:		.long	BCR$/;"	l
BCR_APD_MSK	include/mpc8260.h	/^#define BCR_APD_MSK	/;"	d
BCR_D	board/espt/lowlevel_init.S	/^BCR_D:		.long	0x05000000$/;"	l
BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^BCR_D:			.long	0x00000000$/;"	l
BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^BCR_D:		.long	0x00000000$/;"	l
BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^BCR_D:		.long	0x80000003$/;"	l
BCR_EAV	include/mpc8260.h	/^#define BCR_EAV	/;"	d
BCR_EBM	include/mpc8260.h	/^#define BCR_EBM	/;"	d
BCR_EPAR	include/mpc8260.h	/^#define BCR_EPAR	/;"	d
BCR_ETM	include/mpc8260.h	/^#define BCR_ETM	/;"	d
BCR_EXDD	include/mpc8260.h	/^#define BCR_EXDD	/;"	d
BCR_GBR	arch/m68k/include/asm/m5301x.h	/^#define BCR_GBR	/;"	d
BCR_GBR	arch/m68k/include/asm/m5329.h	/^#define BCR_GBR	/;"	d
BCR_GBW	arch/m68k/include/asm/m5301x.h	/^#define BCR_GBW	/;"	d
BCR_GBW	arch/m68k/include/asm/m5329.h	/^#define BCR_GBW	/;"	d
BCR_ISPS	include/mpc8260.h	/^#define BCR_ISPS	/;"	d
BCR_L2C	include/mpc8260.h	/^#define BCR_L2C	/;"	d
BCR_L2D_MSK	include/mpc8260.h	/^#define BCR_L2D_MSK	/;"	d
BCR_LEPAR	include/mpc8260.h	/^#define BCR_LEPAR	/;"	d
BCR_LETM	include/mpc8260.h	/^#define BCR_LETM	/;"	d
BCR_NPQM0	include/mpc8260.h	/^#define BCR_NPQM0	/;"	d
BCR_NPQM1	include/mpc8260.h	/^#define BCR_NPQM1	/;"	d
BCR_NPQM2	include/mpc8260.h	/^#define BCR_NPQM2	/;"	d
BCR_PLDP	include/mpc8260.h	/^#define BCR_PLDP	/;"	d
BCR_S1	arch/m68k/include/asm/m5301x.h	/^#define BCR_S1	/;"	d
BCR_S1	arch/m68k/include/asm/m5329.h	/^#define BCR_S1	/;"	d
BCR_S4	arch/m68k/include/asm/m5301x.h	/^#define BCR_S4	/;"	d
BCR_S4	arch/m68k/include/asm/m5329.h	/^#define BCR_S4	/;"	d
BCR_S6	arch/m68k/include/asm/m5301x.h	/^#define BCR_S6	/;"	d
BCR_S6	arch/m68k/include/asm/m5329.h	/^#define BCR_S6	/;"	d
BCR_S7	arch/m68k/include/asm/m5301x.h	/^#define BCR_S7	/;"	d
BCR_S7	arch/m68k/include/asm/m5329.h	/^#define BCR_S7	/;"	d
BCS	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define BCS(/;"	d
BCSCR	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR(/;"	d
BCSCR0	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR0	/;"	d
BCSCR1	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR1	/;"	d
BCSCR2	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR2	/;"	d
BCSCR3	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR3	/;"	d
BCSCR4	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR4	/;"	d
BCSCR5	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCSCR5	/;"	d
BCSR10_UCC4_GETH_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR10_UCC4_GETH_EN	/;"	d
BCSR10_UCC4_RGMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR10_UCC4_RGMII_EN	/;"	d
BCSR10_UCC4_RTBI_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR10_UCC4_RTBI_EN	/;"	d
BCSR11_LED0	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR11_LED0	/;"	d
BCSR11_LED1	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR11_LED1	/;"	d
BCSR11_LED2	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR11_LED2	/;"	d
BCSR12_UCC6_RMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR12_UCC6_RMII_EN	/;"	d
BCSR12_UCC8_RMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR12_UCC8_RMII_EN	/;"	d
BCSR15_QEUART_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR15_QEUART_EN	/;"	d
BCSR15_SMII6_DIS	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR15_SMII6_DIS	/;"	d
BCSR15_SMII8_DIS	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR15_SMII8_DIS	/;"	d
BCSR16_UPC1_DEV2	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR16_UPC1_DEV2	/;"	d
BCSR17_FLASH_nWP	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR17_FLASH_nWP	/;"	d
BCSR17_USBMODE	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR17_USBMODE	/;"	d
BCSR17_USBVCC	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR17_USBVCC	/;"	d
BCSR17_nUSBEN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR17_nUSBEN	/;"	d
BCSR17_nUSBLOWSPD	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR17_nUSBLOWSPD	/;"	d
BCSR6_SD_CARD_1BIT	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_SD_CARD_1BIT	/;"	d
BCSR6_SD_CARD_4BITS	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_SD_CARD_4BITS	/;"	d
BCSR6_TDM2G_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_TDM2G_EN	/;"	d
BCSR6_UCC7_RMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_UCC7_RMII_EN	/;"	d
BCSR6_UPC1_ADDR_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_UPC1_ADDR_EN	/;"	d
BCSR6_UPC1_DEV2	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_UPC1_DEV2	/;"	d
BCSR6_UPC1_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_UPC1_EN	/;"	d
BCSR6_UPC1_POS_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR6_UPC1_POS_EN	/;"	d
BCSR7_BRD_WRT_PROTECT	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR7_BRD_WRT_PROTECT	/;"	d
BCSR7_GETHRST_MRVL	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR7_GETHRST_MRVL	/;"	d
BCSR7_UCC1_GETH_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR7_UCC1_GETH_EN	/;"	d
BCSR7_UCC1_RGMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR7_UCC1_RGMII_EN	/;"	d
BCSR7_UCC1_RTBI_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR7_UCC1_RTBI_EN	/;"	d
BCSR8_UCC2_GETH_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR8_UCC2_GETH_EN	/;"	d
BCSR8_UCC2_RGMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR8_UCC2_RGMII_EN	/;"	d
BCSR8_UCC2_RTBI_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR8_UCC2_RTBI_EN	/;"	d
BCSR8_UEM_MARVEL_RESET	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR8_UEM_MARVEL_RESET	/;"	d
BCSR9_UCC3_GETH_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR9_UCC3_GETH_EN	/;"	d
BCSR9_UCC3_RGMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR9_UCC3_RGMII_EN	/;"	d
BCSR9_UCC3_RMII_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR9_UCC3_RMII_EN	/;"	d
BCSR9_UCC3_RTBI_EN	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR9_UCC3_RTBI_EN	/;"	d
BCSR9_UCC3_UEM_MICREL	board/freescale/mpc8569mds/bcsr.h	/^#define BCSR9_UCC3_UEM_MICREL	/;"	d
BCSR_PCMCIA_PC0DRVEN	board/dbau1x00/dbau1x00.c	/^#define BCSR_PCMCIA_PC0DRVEN	/;"	d	file:
BCSR_PCMCIA_PC0DRVEN	board/pb1x00/pb1x00.c	/^#define BCSR_PCMCIA_PC0DRVEN	/;"	d	file:
BCSR_PCMCIA_PC0RST	board/dbau1x00/dbau1x00.c	/^#define BCSR_PCMCIA_PC0RST	/;"	d	file:
BCSR_PCMCIA_PC0RST	board/pb1x00/pb1x00.c	/^#define BCSR_PCMCIA_PC0RST	/;"	d	file:
BCSR_SELECT_PCIE	include/configs/canyonlands.h	/^#define BCSR_SELECT_PCIE	/;"	d
BCSR_UCC1_GETH_EN	board/freescale/mpc8568mds/bcsr.h	/^#define BCSR_UCC1_GETH_EN	/;"	d
BCSR_UCC1_MODE_MSK	board/freescale/mpc8568mds/bcsr.h	/^#define BCSR_UCC1_MODE_MSK	/;"	d
BCSR_UCC2_GETH_EN	board/freescale/mpc8568mds/bcsr.h	/^#define BCSR_UCC2_GETH_EN	/;"	d
BCSR_UCC2_MODE_MSK	board/freescale/mpc8568mds/bcsr.h	/^#define BCSR_UCC2_MODE_MSK	/;"	d
BCSR_USBCTRL_HOST_RST	include/configs/canyonlands.h	/^#define BCSR_USBCTRL_HOST_RST	/;"	d
BCSR_USBCTRL_OTG_RST	include/configs/canyonlands.h	/^#define BCSR_USBCTRL_OTG_RST	/;"	d
BCTRL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define BCTRL	/;"	d
BCTRL1	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define BCTRL1	/;"	d
BCT_BRETTL3	board/ti/beagle/beagle.c	/^#define BCT_BRETTL3	/;"	d	file:
BCT_BRETTL4	board/ti/beagle/beagle.c	/^#define BCT_BRETTL4	/;"	d	file:
BCT_ODMDATA_OFFSET	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define BCT_ODMDATA_OFFSET	/;"	d
BCT_ODMDATA_OFFSET	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define BCT_ODMDATA_OFFSET	/;"	d
BCT_ODMDATA_OFFSET	arch/arm/include/asm/arch-tegra20/tegra.h	/^#define BCT_ODMDATA_OFFSET	/;"	d
BCT_ODMDATA_OFFSET	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define BCT_ODMDATA_OFFSET	/;"	d
BCT_ODMDATA_OFFSET	arch/arm/include/asm/arch-tegra30/tegra.h	/^#define BCT_ODMDATA_OFFSET	/;"	d
BCT_SDRAM_ARB_CONFIG_WORDS	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^#define BCT_SDRAM_ARB_CONFIG_WORDS /;"	d
BCULR	drivers/net/sh_eth.h	/^	BCULR,$/;"	e	enum:__anon5ef54f5a0103
BCU_BASE	arch/arm/mach-uniphier/bcu/bcu-regs.h	/^#define	BCU_BASE	/;"	d
BCU_BSS1	board/micronas/vct/bcu.h	/^	BCU_BSS1		= 2,$/;"	e	enum:bcu_tags
BCU_BSS2	board/micronas/vct/bcu.h	/^	BCU_BSS2		= 3,$/;"	e	enum:bcu_tags
BCU_BSS_COPY	board/micronas/vct/bcu.h	/^	BCU_BSS_COPY		= 17,$/;"	e	enum:bcu_tags
BCU_BSS_EXT1	board/micronas/vct/bcu.h	/^	BCU_BSS_EXT1		= 18,$/;"	e	enum:bcu_tags
BCU_BSS_EXT2	board/micronas/vct/bcu.h	/^	BCU_BSS_EXT2		= 19,$/;"	e	enum:bcu_tags
BCU_CLUT_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_CLUT_BUFFER_0	= 106,$/;"	e	enum:bcu_tags
BCU_CLUT_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_CLUT_BUFFER_1	= 107,$/;"	e	enum:bcu_tags
BCU_DVP_OSD_FRAME_BUFFER0	board/micronas/vct/bcu.h	/^	BCU_DVP_OSD_FRAME_BUFFER0 = 113,$/;"	e	enum:bcu_tags
BCU_DVP_OSD_FRAME_BUFFER1	board/micronas/vct/bcu.h	/^	BCU_DVP_OSD_FRAME_BUFFER1 = 114,$/;"	e	enum:bcu_tags
BCU_DVP_VBI_REINSERTION	board/micronas/vct/bcu.h	/^	BCU_DVP_VBI_REINSERTION	= 112,$/;"	e	enum:bcu_tags
BCU_EBI_CPU_BUFFER	board/micronas/vct/bcu.h	/^	BCU_EBI_CPU_BUFFER	= 21,$/;"	e	enum:bcu_tags
BCU_EWARP_BUFFER	board/micronas/vct/bcu.h	/^	BCU_EWARP_BUFFER	= 136,$/;"	e	enum:bcu_tags
BCU_FE_3DCOMB_0	board/micronas/vct/bcu.h	/^	BCU_FE_3DCOMB_0		= 120,$/;"	e	enum:bcu_tags
BCU_FE_3DCOMB_1	board/micronas/vct/bcu.h	/^	BCU_FE_3DCOMB_1		= 121,$/;"	e	enum:bcu_tags
BCU_FE_3DCOMB_2	board/micronas/vct/bcu.h	/^	BCU_FE_3DCOMB_2		= 122,$/;"	e	enum:bcu_tags
BCU_FE_3DCOMB_3	board/micronas/vct/bcu.h	/^	BCU_FE_3DCOMB_3		= 123,$/;"	e	enum:bcu_tags
BCU_FH_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_FH_BUFFER_0		= 23,$/;"	e	enum:bcu_tags
BCU_FH_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_FH_BUFFER_1		= 24,$/;"	e	enum:bcu_tags
BCU_GAI_BUFFER	board/micronas/vct/bcu.h	/^	BCU_GAI_BUFFER		= 115,$/;"	e	enum:bcu_tags
BCU_GA_SRC_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_GA_SRC_BUFFER_0	= 116,$/;"	e	enum:bcu_tags
BCU_GA_SRC_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_GA_SRC_BUFFER_1	= 117,$/;"	e	enum:bcu_tags
BCU_GLOBAL_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_GLOBAL_BUFFER_0	= 139,$/;"	e	enum:bcu_tags
BCU_GLOBAL_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_GLOBAL_BUFFER_1	= 140,$/;"	e	enum:bcu_tags
BCU_GRAPHIC_FRAME_BUFFER0	board/micronas/vct/bcu.h	/^	BCU_GRAPHIC_FRAME_BUFFER0 = 110,$/;"	e	enum:bcu_tags
BCU_GRAPHIC_FRAME_BUFFER1	board/micronas/vct/bcu.h	/^	BCU_GRAPHIC_FRAME_BUFFER1 = 111,$/;"	e	enum:bcu_tags
BCU_MAX	board/micronas/vct/bcu.h	/^	BCU_MAX			= 141$/;"	e	enum:bcu_tags
BCU_MVAL_BUFFER	board/micronas/vct/bcu.h	/^	BCU_MVAL_BUFFER		= 127,$/;"	e	enum:bcu_tags
BCU_OSD_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_OSD_BUFFER_0	= 137,$/;"	e	enum:bcu_tags
BCU_OSD_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_OSD_BUFFER_1	= 138,$/;"	e	enum:bcu_tags
BCU_OSD_FRAME_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_OSD_FRAME_BUFFER_0	= 108,$/;"	e	enum:bcu_tags
BCU_OSD_FRAME_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_OSD_FRAME_BUFFER_1	= 109,$/;"	e	enum:bcu_tags
BCU_PCM1	board/micronas/vct/bcu.h	/^	BCU_PCM1		= 15,$/;"	e	enum:bcu_tags
BCU_PCM2	board/micronas/vct/bcu.h	/^	BCU_PCM2		= 16,$/;"	e	enum:bcu_tags
BCU_PCM_DELAY	board/micronas/vct/bcu.h	/^	BCU_PCM_DELAY		= 22,$/;"	e	enum:bcu_tags
BCU_PCM_DELAY_LINEAR	board/micronas/vct/bcu.h	/^	BCU_PCM_DELAY_LINEAR	= 87,$/;"	e	enum:bcu_tags
BCU_PCM_JINGLE	board/micronas/vct/bcu.h	/^	BCU_PCM_JINGLE		= 20,$/;"	e	enum:bcu_tags
BCU_PIP_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_PIP_BUFFER_0	= 132,$/;"	e	enum:bcu_tags
BCU_PIP_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_PIP_BUFFER_1	= 133,$/;"	e	enum:bcu_tags
BCU_PIP_BUFFER_2	board/micronas/vct/bcu.h	/^	BCU_PIP_BUFFER_2	= 134,$/;"	e	enum:bcu_tags
BCU_PIP_BUFFER_3	board/micronas/vct/bcu.h	/^	BCU_PIP_BUFFER_3	= 135,$/;"	e	enum:bcu_tags
BCU_RC_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_RC_BUFFER_0		= 128,$/;"	e	enum:bcu_tags
BCU_RC_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_RC_BUFFER_1		= 129,$/;"	e	enum:bcu_tags
BCU_RC_BUFFER_2	board/micronas/vct/bcu.h	/^	BCU_RC_BUFFER_2		= 130,$/;"	e	enum:bcu_tags
BCU_RC_BUFFER_3	board/micronas/vct/bcu.h	/^	BCU_RC_BUFFER_3		= 131,$/;"	e	enum:bcu_tags
BCU_SECURE_BUFFER	board/micronas/vct/bcu.h	/^	BCU_SECURE_BUFFER	= 14,$/;"	e	enum:bcu_tags
BCU_TNR_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_TNR_BUFFER_0	= 124,$/;"	e	enum:bcu_tags
BCU_TNR_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_TNR_BUFFER_1	= 125,$/;"	e	enum:bcu_tags
BCU_TNR_BUFFER_2	board/micronas/vct/bcu.h	/^	BCU_TNR_BUFFER_2	= 126,$/;"	e	enum:bcu_tags
BCU_TSD_PES_0	board/micronas/vct/bcu.h	/^	BCU_TSD_PES_0		= 6,$/;"	e	enum:bcu_tags
BCU_TSD_PES_1	board/micronas/vct/bcu.h	/^	BCU_TSD_PES_1		= 7,$/;"	e	enum:bcu_tags
BCU_TSD_PES_2	board/micronas/vct/bcu.h	/^	BCU_TSD_PES_2		= 8,$/;"	e	enum:bcu_tags
BCU_TSD_PES_3	board/micronas/vct/bcu.h	/^	BCU_TSD_PES_3		= 9,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_0	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_0	= 25,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_1	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_1	= 26,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_10	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_10	= 35,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_11	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_11	= 36,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_12	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_12	= 37,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_13	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_13	= 38,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_14	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_14	= 39,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_15	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_15	= 40,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_16	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_16	= 41,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_17	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_17	= 42,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_18	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_18	= 43,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_19	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_19	= 44,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_2	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_2	= 27,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_20	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_20	= 45,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_21	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_21	= 46,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_22	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_22	= 47,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_23	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_23	= 48,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_24	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_24	= 49,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_25	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_25	= 50,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_26	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_26	= 51,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_27	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_27	= 52,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_28	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_28	= 53,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_29	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_29	= 54,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_3	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_3	= 28,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_30	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_30	= 55,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_31	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_31	= 56,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_32	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_32	= 57,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_33	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_33	= 58,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_34	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_34	= 59,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_35	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_35	= 60,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_36	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_36	= 61,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_37	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_37	= 62,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_38	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_38	= 63,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_39	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_39	= 64,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_4	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_4	= 29,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_40	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_40	= 65,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_41	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_41	= 66,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_42	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_42	= 67,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_43	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_43	= 68,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_44	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_44	= 69,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_45	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_45	= 70,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_46	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_46	= 71,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_47	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_47	= 72,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_48	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_48	= 73,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_49	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_49	= 74,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_5	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_5	= 30,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_50	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_50	= 75,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_51	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_51	= 76,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_52	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_52	= 77,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_53	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_53	= 78,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_6	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_6	= 31,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_7	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_7	= 32,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_8	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_8	= 33,$/;"	e	enum:bcu_tags
BCU_TSD_SECTION_9	board/micronas/vct/bcu.h	/^	BCU_TSD_SECTION_9	= 34,$/;"	e	enum:bcu_tags
BCU_TSD_SUBTITLES	board/micronas/vct/bcu.h	/^	BCU_TSD_SUBTITLES	= 5,$/;"	e	enum:bcu_tags
BCU_TSD_TXT	board/micronas/vct/bcu.h	/^	BCU_TSD_TXT		= 4,$/;"	e	enum:bcu_tags
BCU_TSIO_PLAYBACK_0	board/micronas/vct/bcu.h	/^	BCU_TSIO_PLAYBACK_0	= 12,$/;"	e	enum:bcu_tags
BCU_TSIO_PLAYBACK_1	board/micronas/vct/bcu.h	/^	BCU_TSIO_PLAYBACK_1	= 13,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_0	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_0	= 10,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_1	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_1	= 11,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_2	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_2	= 79,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_3	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_3	= 80,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_4	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_4	= 81,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_5	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_5	= 82,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_6	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_6	= 83,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_7	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_7	= 84,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_8	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_8	= 85,$/;"	e	enum:bcu_tags
BCU_TSIO_RECORD_9	board/micronas/vct/bcu.h	/^	BCU_TSIO_RECORD_9	= 86,$/;"	e	enum:bcu_tags
BCU_USB_BUFFER_0	board/micronas/vct/bcu.h	/^	BCU_USB_BUFFER_0	= 118,$/;"	e	enum:bcu_tags
BCU_USB_BUFFER_1	board/micronas/vct/bcu.h	/^	BCU_USB_BUFFER_1	= 119,$/;"	e	enum:bcu_tags
BCU_VBV1	board/micronas/vct/bcu.h	/^	BCU_VBV1		= 0,$/;"	e	enum:bcu_tags
BCU_VBV2	board/micronas/vct/bcu.h	/^	BCU_VBV2		= 1,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_DISP0_C	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_DISP0_C	= 97,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_DISP0_Y	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_DISP0_Y	= 94,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_DISP1_C	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_DISP1_C	= 98,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_DISP1_Y	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_DISP1_Y	= 95,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_DISP2_C	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_DISP2_C	= 99,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_DISP2_Y	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_DISP2_Y	= 96,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_REF0	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_REF0	= 90,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_REF1	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_REF1	= 91,$/;"	e	enum:bcu_tags
BCU_VD_MASTER_USER_DATA	board/micronas/vct/bcu.h	/^	BCU_VD_MASTER_USER_DATA	= 88,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_DISP0_C	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_DISP0_C	= 103,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_DISP0_Y	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_DISP0_Y	= 100,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_DISP1_C	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_DISP1_C	= 104,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_DISP1_Y	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_DISP1_Y	= 101,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_DISP2_C	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_DISP2_C	= 105,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_DISP2_Y	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_DISP2_Y	= 102,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_REF0	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_REF0	= 92,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_REF1	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_REF1	= 93,$/;"	e	enum:bcu_tags
BCU_VD_SLAVE_USER_DATA	board/micronas/vct/bcu.h	/^	BCU_VD_SLAVE_USER_DATA	= 89,$/;"	e	enum:bcu_tags
BC_MAGIC	drivers/bootcount/bootcount_i2c.c	/^#define BC_MAGIC	/;"	d	file:
BC_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BC_MASK	/;"	d	file:
BDACR	arch/sh/include/asm/cpu_sh7722.h	/^#define BDACR /;"	d
BDAYR	arch/sh/include/asm/cpu_sh7722.h	/^#define BDAYR /;"	d
BDIS	include/sym53c8xx.h	/^	#define   BDIS /;"	d
BDMA_CMD	drivers/block/sata_mv.c	/^#define BDMA_CMD	/;"	d	file:
BDMA_DRH	drivers/block/sata_mv.c	/^#define BDMA_DRH	/;"	d	file:
BDMA_DRL	drivers/block/sata_mv.c	/^#define BDMA_DRL	/;"	d	file:
BDMA_DTHB	drivers/block/sata_mv.c	/^#define BDMA_DTHB	/;"	d	file:
BDMA_DTLB	drivers/block/sata_mv.c	/^#define BDMA_DTLB	/;"	d	file:
BDMA_STATUS	drivers/block/sata_mv.c	/^#define BDMA_STATUS	/;"	d	file:
BDMRB	arch/sh/include/asm/cpu_sh7750.h	/^#define BDMRB	/;"	d
BDMWR	arch/sh/include/asm/cpu_sh7722.h	/^#define BDMWR /;"	d
BDRB	arch/sh/include/asm/cpu_sh7750.h	/^#define BDRB	/;"	d
BD_ADVANCE	drivers/qe/uec.h	/^#define BD_ADVANCE(/;"	d
BD_CLEAN	drivers/qe/uec.h	/^#define BD_CLEAN	/;"	d
BD_DATA	drivers/qe/uec.h	/^#define BD_DATA(/;"	d
BD_DATA_CLEAR	drivers/qe/uec.h	/^#define BD_DATA_CLEAR(/;"	d
BD_DATA_SET	drivers/qe/uec.h	/^#define BD_DATA_SET(/;"	d
BD_ENET_RX_BC	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_BC	/;"	d
BD_ENET_RX_BC	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_BC	/;"	d
BD_ENET_RX_BC	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_BC	/;"	d
BD_ENET_RX_CL	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_CL	/;"	d
BD_ENET_RX_CL	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_CL	/;"	d
BD_ENET_RX_CL	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_CL	/;"	d
BD_ENET_RX_CL	include/commproc.h	/^#define BD_ENET_RX_CL	/;"	d
BD_ENET_RX_CR	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_CR	/;"	d
BD_ENET_RX_CR	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_CR	/;"	d
BD_ENET_RX_CR	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_CR	/;"	d
BD_ENET_RX_CR	include/commproc.h	/^#define BD_ENET_RX_CR	/;"	d
BD_ENET_RX_EMPTY	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_EMPTY	/;"	d
BD_ENET_RX_EMPTY	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_EMPTY	/;"	d
BD_ENET_RX_EMPTY	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_EMPTY	/;"	d
BD_ENET_RX_EMPTY	include/commproc.h	/^#define BD_ENET_RX_EMPTY	/;"	d
BD_ENET_RX_ERR	drivers/net/fsl_mcdmafec.c	/^#define BD_ENET_RX_ERR	/;"	d	file:
BD_ENET_RX_ERRS	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define BD_ENET_RX_ERRS	/;"	d	file:
BD_ENET_RX_FIRST	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_FIRST	/;"	d
BD_ENET_RX_FIRST	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_FIRST	/;"	d
BD_ENET_RX_FIRST	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_FIRST	/;"	d
BD_ENET_RX_FIRST	include/commproc.h	/^#define BD_ENET_RX_FIRST	/;"	d
BD_ENET_RX_INTR	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_INTR	/;"	d
BD_ENET_RX_INTR	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_INTR	/;"	d
BD_ENET_RX_INTR	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_INTR	/;"	d
BD_ENET_RX_INTR	include/commproc.h	/^#define BD_ENET_RX_INTR	/;"	d
BD_ENET_RX_LAST	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_LAST	/;"	d
BD_ENET_RX_LAST	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_LAST	/;"	d
BD_ENET_RX_LAST	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_LAST	/;"	d
BD_ENET_RX_LAST	include/commproc.h	/^#define BD_ENET_RX_LAST	/;"	d
BD_ENET_RX_LG	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_LG	/;"	d
BD_ENET_RX_LG	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_LG	/;"	d
BD_ENET_RX_LG	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_LG	/;"	d
BD_ENET_RX_LG	include/commproc.h	/^#define BD_ENET_RX_LG	/;"	d
BD_ENET_RX_MC	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_MC	/;"	d
BD_ENET_RX_MC	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_MC	/;"	d
BD_ENET_RX_MC	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_MC	/;"	d
BD_ENET_RX_MISS	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_MISS	/;"	d
BD_ENET_RX_MISS	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_MISS	/;"	d
BD_ENET_RX_MISS	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_MISS	/;"	d
BD_ENET_RX_MISS	include/commproc.h	/^#define BD_ENET_RX_MISS	/;"	d
BD_ENET_RX_NO	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_NO	/;"	d
BD_ENET_RX_NO	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_NO	/;"	d
BD_ENET_RX_NO	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_NO	/;"	d
BD_ENET_RX_NO	include/commproc.h	/^#define BD_ENET_RX_NO	/;"	d
BD_ENET_RX_OV	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_OV	/;"	d
BD_ENET_RX_OV	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_OV	/;"	d
BD_ENET_RX_OV	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_OV	/;"	d
BD_ENET_RX_OV	include/commproc.h	/^#define BD_ENET_RX_OV	/;"	d
BD_ENET_RX_RO1	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_RO1	/;"	d
BD_ENET_RX_RO2	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_RO2	/;"	d
BD_ENET_RX_SH	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_SH	/;"	d
BD_ENET_RX_SH	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_SH	/;"	d
BD_ENET_RX_SH	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_SH	/;"	d
BD_ENET_RX_SH	include/commproc.h	/^#define BD_ENET_RX_SH	/;"	d
BD_ENET_RX_STATS	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_STATS	/;"	d
BD_ENET_RX_STATS	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_STATS	/;"	d
BD_ENET_RX_STATS	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_STATS	/;"	d
BD_ENET_RX_STATS	include/commproc.h	/^#define BD_ENET_RX_STATS	/;"	d
BD_ENET_RX_TR	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_TR	/;"	d
BD_ENET_RX_WRAP	arch/m68k/include/asm/fec.h	/^#define BD_ENET_RX_WRAP	/;"	d
BD_ENET_RX_WRAP	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_RX_WRAP	/;"	d
BD_ENET_RX_WRAP	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_RX_WRAP	/;"	d
BD_ENET_RX_WRAP	include/commproc.h	/^#define BD_ENET_RX_WRAP	/;"	d
BD_ENET_RX_W_E	drivers/net/fsl_mcdmafec.c	/^#define BD_ENET_RX_W_E	/;"	d	file:
BD_ENET_RX_W_E	drivers/net/mcffec.c	/^#define BD_ENET_RX_W_E	/;"	d	file:
BD_ENET_TX_ABC	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_ABC	/;"	d
BD_ENET_TX_CSL	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_CSL	/;"	d
BD_ENET_TX_CSL	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_CSL	/;"	d
BD_ENET_TX_CSL	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_CSL	/;"	d
BD_ENET_TX_CSL	include/commproc.h	/^#define BD_ENET_TX_CSL	/;"	d
BD_ENET_TX_DEF	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_DEF	/;"	d
BD_ENET_TX_DEF	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_DEF	/;"	d
BD_ENET_TX_DEF	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_DEF	/;"	d
BD_ENET_TX_DEF	include/commproc.h	/^#define BD_ENET_TX_DEF	/;"	d
BD_ENET_TX_HB	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_HB	/;"	d
BD_ENET_TX_HB	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_HB	/;"	d
BD_ENET_TX_HB	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_HB	/;"	d
BD_ENET_TX_HB	include/commproc.h	/^#define BD_ENET_TX_HB	/;"	d
BD_ENET_TX_INTR	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_INTR	/;"	d
BD_ENET_TX_INTR	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_INTR	/;"	d
BD_ENET_TX_INTR	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_INTR	/;"	d
BD_ENET_TX_INTR	include/commproc.h	/^#define BD_ENET_TX_INTR	/;"	d
BD_ENET_TX_LAST	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_LAST	/;"	d
BD_ENET_TX_LAST	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_LAST	/;"	d
BD_ENET_TX_LAST	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_LAST	/;"	d
BD_ENET_TX_LAST	include/commproc.h	/^#define BD_ENET_TX_LAST	/;"	d
BD_ENET_TX_LC	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_LC	/;"	d
BD_ENET_TX_LC	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_LC	/;"	d
BD_ENET_TX_LC	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_LC	/;"	d
BD_ENET_TX_LC	include/commproc.h	/^#define BD_ENET_TX_LC	/;"	d
BD_ENET_TX_PAD	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_PAD	/;"	d
BD_ENET_TX_PAD	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_PAD	/;"	d
BD_ENET_TX_PAD	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_PAD	/;"	d
BD_ENET_TX_PAD	include/commproc.h	/^#define BD_ENET_TX_PAD	/;"	d
BD_ENET_TX_RCMASK	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_RCMASK	/;"	d
BD_ENET_TX_RCMASK	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_RCMASK	/;"	d
BD_ENET_TX_RCMASK	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_RCMASK	/;"	d
BD_ENET_TX_RCMASK	include/commproc.h	/^#define BD_ENET_TX_RCMASK	/;"	d
BD_ENET_TX_RDY_LST	drivers/net/fsl_mcdmafec.c	/^#define BD_ENET_TX_RDY_LST	/;"	d	file:
BD_ENET_TX_RDY_LST	drivers/net/mcffec.c	/^#define BD_ENET_TX_RDY_LST	/;"	d	file:
BD_ENET_TX_READY	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_READY	/;"	d
BD_ENET_TX_READY	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_READY	/;"	d
BD_ENET_TX_READY	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_READY	/;"	d
BD_ENET_TX_READY	include/commproc.h	/^#define BD_ENET_TX_READY	/;"	d
BD_ENET_TX_RL	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_RL	/;"	d
BD_ENET_TX_RL	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_RL	/;"	d
BD_ENET_TX_RL	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_RL	/;"	d
BD_ENET_TX_RL	include/commproc.h	/^#define BD_ENET_TX_RL	/;"	d
BD_ENET_TX_STATS	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_STATS	/;"	d
BD_ENET_TX_STATS	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_STATS	/;"	d
BD_ENET_TX_STATS	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_STATS	/;"	d
BD_ENET_TX_STATS	include/commproc.h	/^#define BD_ENET_TX_STATS	/;"	d
BD_ENET_TX_TC	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_TC	/;"	d
BD_ENET_TX_TC	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_TC	/;"	d
BD_ENET_TX_TC	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_TC	/;"	d
BD_ENET_TX_TC	include/commproc.h	/^#define BD_ENET_TX_TC	/;"	d
BD_ENET_TX_TO1	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_TO1	/;"	d
BD_ENET_TX_TO2	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_TO2	/;"	d
BD_ENET_TX_UN	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_UN	/;"	d
BD_ENET_TX_UN	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_UN	/;"	d
BD_ENET_TX_UN	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_UN	/;"	d
BD_ENET_TX_UN	include/commproc.h	/^#define BD_ENET_TX_UN	/;"	d
BD_ENET_TX_WRAP	arch/m68k/include/asm/fec.h	/^#define BD_ENET_TX_WRAP	/;"	d
BD_ENET_TX_WRAP	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_ENET_TX_WRAP	/;"	d
BD_ENET_TX_WRAP	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_ENET_TX_WRAP	/;"	d
BD_ENET_TX_WRAP	include/commproc.h	/^#define BD_ENET_TX_WRAP	/;"	d
BD_I2C_RX_ERR	arch/powerpc/cpu/mpc8260/i2c.c	/^#define BD_I2C_RX_ERR	/;"	d	file:
BD_I2C_RX_ERR	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define BD_I2C_RX_ERR	/;"	d	file:
BD_I2C_TX_CL	arch/powerpc/cpu/mpc8260/i2c.c	/^#define BD_I2C_TX_CL	/;"	d	file:
BD_I2C_TX_CL	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define BD_I2C_TX_CL	/;"	d	file:
BD_I2C_TX_ERR	arch/powerpc/cpu/mpc8260/i2c.c	/^#define BD_I2C_TX_ERR	/;"	d	file:
BD_I2C_TX_ERR	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define BD_I2C_TX_ERR	/;"	d	file:
BD_I2C_TX_NAK	arch/powerpc/cpu/mpc8260/i2c.c	/^#define BD_I2C_TX_NAK	/;"	d	file:
BD_I2C_TX_NAK	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define BD_I2C_TX_NAK	/;"	d	file:
BD_I2C_TX_START	arch/powerpc/cpu/mpc8260/i2c.c	/^#define BD_I2C_TX_START /;"	d	file:
BD_I2C_TX_START	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define BD_I2C_TX_START /;"	d	file:
BD_I2C_TX_UN	arch/powerpc/cpu/mpc8260/i2c.c	/^#define BD_I2C_TX_UN	/;"	d	file:
BD_I2C_TX_UN	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define BD_I2C_TX_UN	/;"	d	file:
BD_IIC_START	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_IIC_START	/;"	d
BD_IIC_START	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_IIC_START	/;"	d
BD_IIC_START	include/commproc.h	/^#define BD_IIC_START	/;"	d
BD_INT	drivers/qe/uec.h	/^#define BD_INT	/;"	d
BD_IS_DATA	drivers/qe/uec.h	/^#define BD_IS_DATA(/;"	d
BD_LAST	drivers/net/fm/fm.h	/^#define BD_LAST	/;"	d
BD_LAST	drivers/qe/uec.h	/^#define BD_LAST	/;"	d
BD_LENGTH	drivers/qe/uec.h	/^#define BD_LENGTH(/;"	d
BD_LENGTH_SET	drivers/qe/uec.h	/^#define BD_LENGTH_SET(/;"	d
BD_SCC_TX_LAST	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SCC_TX_LAST	/;"	d
BD_SCC_TX_LAST	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SCC_TX_LAST	/;"	d
BD_SCC_TX_LAST	include/commproc.h	/^#define BD_SCC_TX_LAST	/;"	d
BD_SC_BR	arch/m68k/include/asm/fec.h	/^#define BD_SC_BR	/;"	d
BD_SC_BR	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_BR	/;"	d
BD_SC_BR	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_BR	/;"	d
BD_SC_BR	include/commproc.h	/^#define BD_SC_BR	/;"	d
BD_SC_CD	arch/m68k/include/asm/fec.h	/^#define BD_SC_CD	/;"	d
BD_SC_CD	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_CD	/;"	d
BD_SC_CD	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_CD	/;"	d
BD_SC_CD	include/commproc.h	/^#define BD_SC_CD	/;"	d
BD_SC_CM	arch/m68k/include/asm/fec.h	/^#define BD_SC_CM	/;"	d
BD_SC_CM	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_CM	/;"	d
BD_SC_CM	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_CM	/;"	d
BD_SC_CM	include/commproc.h	/^#define BD_SC_CM	/;"	d
BD_SC_EMPTY	arch/m68k/include/asm/fec.h	/^#define BD_SC_EMPTY	/;"	d
BD_SC_EMPTY	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_EMPTY	/;"	d
BD_SC_EMPTY	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_EMPTY	/;"	d
BD_SC_EMPTY	include/commproc.h	/^#define BD_SC_EMPTY	/;"	d
BD_SC_FR	arch/m68k/include/asm/fec.h	/^#define BD_SC_FR	/;"	d
BD_SC_FR	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_FR	/;"	d
BD_SC_FR	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_FR	/;"	d
BD_SC_FR	include/commproc.h	/^#define BD_SC_FR	/;"	d
BD_SC_ID	arch/m68k/include/asm/fec.h	/^#define BD_SC_ID	/;"	d
BD_SC_ID	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_ID	/;"	d
BD_SC_ID	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_ID	/;"	d
BD_SC_ID	include/commproc.h	/^#define BD_SC_ID	/;"	d
BD_SC_INTRPT	arch/m68k/include/asm/fec.h	/^#define BD_SC_INTRPT	/;"	d
BD_SC_INTRPT	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_INTRPT	/;"	d
BD_SC_INTRPT	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_INTRPT	/;"	d
BD_SC_INTRPT	include/commproc.h	/^#define BD_SC_INTRPT	/;"	d
BD_SC_LAST	arch/m68k/include/asm/fec.h	/^#define BD_SC_LAST	/;"	d
BD_SC_LAST	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_LAST	/;"	d
BD_SC_LAST	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_LAST	/;"	d
BD_SC_LAST	include/commproc.h	/^#define BD_SC_LAST	/;"	d
BD_SC_OV	arch/m68k/include/asm/fec.h	/^#define BD_SC_OV	/;"	d
BD_SC_OV	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_OV	/;"	d
BD_SC_OV	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_OV	/;"	d
BD_SC_OV	include/commproc.h	/^#define BD_SC_OV	/;"	d
BD_SC_P	arch/m68k/include/asm/fec.h	/^#define BD_SC_P	/;"	d
BD_SC_P	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_P	/;"	d
BD_SC_P	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_P	/;"	d
BD_SC_P	include/commproc.h	/^#define BD_SC_P	/;"	d
BD_SC_PR	arch/m68k/include/asm/fec.h	/^#define BD_SC_PR	/;"	d
BD_SC_PR	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_PR	/;"	d
BD_SC_PR	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_PR	/;"	d
BD_SC_PR	include/commproc.h	/^#define BD_SC_PR	/;"	d
BD_SC_READY	arch/m68k/include/asm/fec.h	/^#define BD_SC_READY	/;"	d
BD_SC_READY	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_READY	/;"	d
BD_SC_READY	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_READY	/;"	d
BD_SC_READY	include/commproc.h	/^#define BD_SC_READY	/;"	d
BD_SC_TC	arch/m68k/include/asm/fec.h	/^#define BD_SC_TC	/;"	d
BD_SC_TC	include/commproc.h	/^#define BD_SC_TC	/;"	d
BD_SC_WRAP	arch/m68k/include/asm/fec.h	/^#define BD_SC_WRAP	/;"	d
BD_SC_WRAP	arch/powerpc/include/asm/cpm_8260.h	/^#define BD_SC_WRAP	/;"	d
BD_SC_WRAP	arch/powerpc/include/asm/cpm_85xx.h	/^#define BD_SC_WRAP	/;"	d
BD_SC_WRAP	include/commproc.h	/^#define BD_SC_WRAP	/;"	d
BD_SEPRN_SPACE	drivers/net/zynq_gem.c	/^#define BD_SEPRN_SPACE	/;"	d	file:
BD_SIZES_BUFFER1_MASK	board/synopsys/axs10x/nand.c	/^#define BD_SIZES_BUFFER1_MASK	/;"	d	file:
BD_SPACE	drivers/net/mvneta.c	/^#define BD_SPACE	/;"	d	file:
BD_SPACE	drivers/net/mvpp2.c	/^#define BD_SPACE	/;"	d	file:
BD_SPACE	drivers/net/zynq_gem.c	/^#define BD_SPACE	/;"	d	file:
BD_STATUS	drivers/qe/uec.h	/^#define BD_STATUS(/;"	d
BD_STATUS_SET	drivers/qe/uec.h	/^#define BD_STATUS_SET(/;"	d
BD_STAT_BD_COMPLETE	board/synopsys/axs10x/nand.c	/^#define BD_STAT_BD_COMPLETE	/;"	d	file:
BD_STAT_BD_FIRST	board/synopsys/axs10x/nand.c	/^#define BD_STAT_BD_FIRST	/;"	d	file:
BD_STAT_BD_LAST	board/synopsys/axs10x/nand.c	/^#define BD_STAT_BD_LAST	/;"	d	file:
BD_STAT_OWN	board/synopsys/axs10x/nand.c	/^#define BD_STAT_OWN	/;"	d	file:
BD_TO_HW	drivers/net/davinci_emac.c	/^#define BD_TO_HW(/;"	d	file:
BD_TO_HW	drivers/net/davinci_emac.c	/^static inline unsigned long BD_TO_HW(unsigned long x)$/;"	f	typeref:typename:unsigned long	file:
BD_WRAP	drivers/qe/uec.h	/^#define BD_WRAP	/;"	d
BE0	drivers/net/ks8851_mll.c	/^#define BE0 /;"	d	file:
BE1	drivers/net/ks8851_mll.c	/^#define BE1 /;"	d	file:
BE2	drivers/net/ks8851_mll.c	/^#define BE2 /;"	d	file:
BE3	drivers/net/ks8851_mll.c	/^#define BE3 /;"	d	file:
BEAGLE_LED_USR0	board/ti/beagle/led.c	/^#define BEAGLE_LED_USR0	/;"	d	file:
BEAGLE_LED_USR1	board/ti/beagle/led.c	/^#define BEAGLE_LED_USR1	/;"	d	file:
BEAGLE_NO_EEPROM	board/ti/beagle/beagle.c	/^#define BEAGLE_NO_EEPROM	/;"	d	file:
BEGIN	scripts/kconfig/zconf.lex.c	/^#define BEGIN /;"	d	file:
BEGINNING_OF_LINE	common/cli_readline.c	/^#define BEGINNING_OF_LINE(/;"	d	file:
BEIER	arch/sh/include/asm/cpu_sh7722.h	/^#define BEIER /;"	d
BEMP	drivers/usb/host/r8a66597.h	/^#define	BEMP	/;"	d
BEMP0	drivers/usb/host/r8a66597.h	/^#define	BEMP0	/;"	d
BEMP1	drivers/usb/host/r8a66597.h	/^#define	BEMP1	/;"	d
BEMP2	drivers/usb/host/r8a66597.h	/^#define	BEMP2	/;"	d
BEMP3	drivers/usb/host/r8a66597.h	/^#define	BEMP3	/;"	d
BEMP4	drivers/usb/host/r8a66597.h	/^#define	BEMP4	/;"	d
BEMP5	drivers/usb/host/r8a66597.h	/^#define	BEMP5	/;"	d
BEMP6	drivers/usb/host/r8a66597.h	/^#define	BEMP6	/;"	d
BEMP7	drivers/usb/host/r8a66597.h	/^#define	BEMP7	/;"	d
BEMP8	drivers/usb/host/r8a66597.h	/^#define	BEMP8	/;"	d
BEMP9	drivers/usb/host/r8a66597.h	/^#define	BEMP9	/;"	d
BEMPE	drivers/usb/host/r8a66597.h	/^#define	BEMPE	/;"	d
BEMPENB	drivers/usb/host/r8a66597.h	/^#define BEMPENB	/;"	d
BEMPSTS	drivers/usb/host/r8a66597.h	/^#define BEMPSTS	/;"	d
BEMode	drivers/net/natsemi.c	/^	BEMode		= 0x00000001,$/;"	e	enum:ChipConfigBits	file:
BEMode	drivers/net/ns8382x.c	/^	BEMode = 0x00000001,$/;"	e	enum:ChipConfigBits	file:
BESR_DMES	arch/powerpc/include/asm/processor.h	/^#define   BESR_DMES	/;"	d
BESR_DSES	arch/powerpc/include/asm/processor.h	/^#define   BESR_DSES	/;"	d
BESR_ETMASK	arch/powerpc/include/asm/processor.h	/^#define   BESR_ETMASK	/;"	d
BESR_RWS	arch/powerpc/include/asm/processor.h	/^#define   BESR_RWS	/;"	d
BESTR	arch/sh/include/asm/cpu_sh7722.h	/^#define BESTR /;"	d
BEVTR	arch/sh/include/asm/cpu_sh7722.h	/^#define BEVTR /;"	d
BE_VGAInfo	include/bios_emul.h	/^} BE_VGAInfo;$/;"	t	typeref:struct:__anoneb05efed0108
BE_accessReg	drivers/bios_emulator/besys.c	/^static u32 BE_accessReg(int regOffset, u32 value, int func)$/;"	f	typeref:typename:u32	file:
BE_biosDate	drivers/bios_emulator/besys.c	/^static char *BE_biosDate = "08\/14\/99";$/;"	v	typeref:typename:char *	file:
BE_callRealMode	drivers/bios_emulator/biosemu.c	/^void X86API BE_callRealMode(uint seg, uint off, RMREGS * regs, RMSREGS * sregs)$/;"	f	typeref:typename:void X86API
BE_constLE_32	drivers/bios_emulator/bios.c	/^#define BE_constLE_32(/;"	d	file:
BE_exit	drivers/bios_emulator/biosemu.c	/^void X86API BE_exit(void)$/;"	f	typeref:typename:void X86API
BE_exports	drivers/bios_emulator/include/biosemu.h	/^} BE_exports;$/;"	t	typeref:struct:__anon964d10140908
BE_getVESABuf	drivers/bios_emulator/biosemu.c	/^void *X86API BE_getVESABuf(uint * len, uint * rseg, uint * roff)$/;"	f	typeref:typename:void * X86API
BE_getVGA	drivers/bios_emulator/biosemu.c	/^void X86API BE_getVGA(BE_VGAInfo * info)$/;"	f	typeref:typename:void X86API
BE_inb	drivers/bios_emulator/besys.c	/^u8 X86API BE_inb(X86EMU_pioAddr port)$/;"	f	typeref:typename:u8 X86API
BE_init	drivers/bios_emulator/biosemu.c	/^int X86API BE_init(u32 debugFlags, int memSize, BE_VGAInfo * info, int shared)$/;"	f	typeref:typename:int X86API
BE_initLibrary_t	drivers/bios_emulator/include/biosemu.h	/^typedef BE_exports *(PMAPIP BE_initLibrary_t) (PM_imports * PMImp);$/;"	t	typeref:typename:BE_exports * (PMAPIP)(PM_imports * PMImp)
BE_inl	drivers/bios_emulator/besys.c	/^u32 X86API BE_inl(X86EMU_pioAddr port)$/;"	f	typeref:typename:u32 X86API
BE_int86	drivers/bios_emulator/biosemu.c	/^int X86API BE_int86(int intno, RMREGS * in, RMREGS * out)$/;"	f	typeref:typename:int X86API
BE_int86x	drivers/bios_emulator/biosemu.c	/^int X86API BE_int86x(int intno, RMREGS * in, RMREGS * out, RMSREGS * sregs)$/;"	f	typeref:typename:int X86API
BE_inw	drivers/bios_emulator/besys.c	/^u16 X86API BE_inw(X86EMU_pioAddr port)$/;"	f	typeref:typename:u16 X86API
BE_mapRealPointer	drivers/bios_emulator/biosemu.c	/^void *X86API BE_mapRealPointer(uint r_seg, uint r_off)$/;"	f	typeref:typename:void * X86API
BE_memaddr	drivers/bios_emulator/besys.c	/^static u8 *BE_memaddr(u32 addr)$/;"	f	typeref:typename:u8 *	file:
BE_model	drivers/bios_emulator/besys.c	/^static u8 BE_model = 0xFC;$/;"	v	typeref:typename:u8	file:
BE_outb	drivers/bios_emulator/besys.c	/^void X86API BE_outb(X86EMU_pioAddr port, u8 val)$/;"	f	typeref:typename:void X86API
BE_outl	drivers/bios_emulator/besys.c	/^void X86API BE_outl(X86EMU_pioAddr port, u32 val)$/;"	f	typeref:typename:void X86API
BE_outw	drivers/bios_emulator/besys.c	/^void X86API BE_outw(X86EMU_pioAddr port, u16 val)$/;"	f	typeref:typename:void X86API
BE_portInfo	drivers/bios_emulator/biosemui.h	/^} BE_portInfo;$/;"	t	typeref:struct:__anonb186e4ea0308
BE_rdb	drivers/bios_emulator/besys.c	/^u8 X86API BE_rdb(u32 addr)$/;"	f	typeref:typename:u8 X86API
BE_rdl	drivers/bios_emulator/besys.c	/^u32 X86API BE_rdl(u32 addr)$/;"	f	typeref:typename:u32 X86API
BE_rdw	drivers/bios_emulator/besys.c	/^u16 X86API BE_rdw(u32 addr)$/;"	f	typeref:typename:u16 X86API
BE_setVGA	drivers/bios_emulator/biosemu.c	/^void X86API BE_setVGA(BE_VGAInfo * info)$/;"	f	typeref:typename:void X86API
BE_submodel	drivers/bios_emulator/besys.c	/^static u8 BE_submodel = 0x00;$/;"	v	typeref:typename:u8	file:
BE_sysEnv	drivers/bios_emulator/include/biosemu.h	/^} BE_sysEnv;$/;"	t	typeref:struct:__anon964d10140108
BE_wrb	drivers/bios_emulator/besys.c	/^void X86API BE_wrb(u32 addr, u8 val)$/;"	f	typeref:typename:void X86API
BE_wrl	drivers/bios_emulator/besys.c	/^void X86API BE_wrl(u32 addr, u32 val)$/;"	f	typeref:typename:void X86API
BE_wrw	drivers/bios_emulator/besys.c	/^void X86API BE_wrw(u32 addr, u16 val)$/;"	f	typeref:typename:void X86API
BF	drivers/misc/mxc_ocotp.c	/^#define BF(/;"	d	file:
BF	include/sym53c8xx.h	/^  #define   BF /;"	d
BF32_DECODE	include/zfs/spa.h	/^#define	BF32_DECODE(/;"	d
BF32_ENCODE	include/zfs/spa.h	/^#define	BF32_ENCODE(/;"	d
BF32_GET	include/zfs/spa.h	/^#define	BF32_GET(/;"	d
BF32_GET_SB	include/zfs/spa.h	/^#define	BF32_GET_SB(/;"	d
BF32_SET	include/zfs/spa.h	/^#define	BF32_SET(/;"	d
BF32_SET_SB	include/zfs/spa.h	/^#define	BF32_SET_SB(/;"	d
BF533_FAMILY	arch/blackfin/include/asm/mach-bf533/def_local.h	/^#define BF533_FAMILY /;"	d
BF537_FAMILY	arch/blackfin/include/asm/mach-bf537/def_local.h	/^#define BF537_FAMILY /;"	d
BF538_FAMILY	arch/blackfin/include/asm/mach-bf538/def_local.h	/^#define BF538_FAMILY /;"	d
BF561_FAMILY	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define BF561_FAMILY /;"	d
BF64_DECODE	include/zfs/spa.h	/^#define	BF64_DECODE(/;"	d
BF64_ENCODE	include/zfs/spa.h	/^#define	BF64_ENCODE(/;"	d
BF64_GET	include/zfs/spa.h	/^#define	BF64_GET(/;"	d
BF64_GET_SB	include/zfs/spa.h	/^#define	BF64_GET_SB(/;"	d
BF64_SET	include/zfs/spa.h	/^#define	BF64_SET(/;"	d
BF64_SET_SB	include/zfs/spa.h	/^#define	BF64_SET_SB(/;"	d
BFD_ROOT_DIR	tools/gdb/Makefile	/^BFD_ROOT_DIR =		\/opt\/powerpc$/;"	m
BFD_ROOT_DIR	tools/gdb/Makefile	/^BFD_ROOT_DIR =		\/usr$/;"	m
BFD_ROOT_DIR	tools/gdb/Makefile	/^BFD_ROOT_DIR =		\/usr\/local\/tools$/;"	m
BFIN_A0_DOT_W	arch/blackfin/lib/kgdb.h	/^  BFIN_A0_DOT_W,$/;"	e	enum:regnames
BFIN_A0_DOT_X	arch/blackfin/lib/kgdb.h	/^  BFIN_A0_DOT_X,$/;"	e	enum:regnames
BFIN_A1_DOT_W	arch/blackfin/lib/kgdb.h	/^  BFIN_A1_DOT_W,$/;"	e	enum:regnames
BFIN_A1_DOT_X	arch/blackfin/lib/kgdb.h	/^  BFIN_A1_DOT_X,$/;"	e	enum:regnames
BFIN_ASTAT	arch/blackfin/lib/kgdb.h	/^  BFIN_ASTAT,$/;"	e	enum:regnames
BFIN_B0	arch/blackfin/lib/kgdb.h	/^  BFIN_B0,$/;"	e	enum:regnames
BFIN_B1	arch/blackfin/lib/kgdb.h	/^  BFIN_B1,$/;"	e	enum:regnames
BFIN_B2	arch/blackfin/lib/kgdb.h	/^  BFIN_B2,$/;"	e	enum:regnames
BFIN_B3	arch/blackfin/lib/kgdb.h	/^  BFIN_B3,$/;"	e	enum:regnames
BFIN_BOOT_16HOST_DMA	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_16HOST_DMA /;"	d
BFIN_BOOT_8HOST_DMA	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_8HOST_DMA /;"	d
BFIN_BOOT_BYPASS	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_BYPASS /;"	d
BFIN_BOOT_FIFO	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_FIFO /;"	d
BFIN_BOOT_IDLE	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_IDLE /;"	d
BFIN_BOOT_LP_SLAVE	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_LP_SLAVE /;"	d
BFIN_BOOT_MEM	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_MEM /;"	d
BFIN_BOOT_NAND	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_NAND /;"	d
BFIN_BOOT_PARA	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_PARA /;"	d
BFIN_BOOT_RSI_MASTER	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_RSI_MASTER /;"	d
BFIN_BOOT_SPI_MASTER	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_SPI_MASTER /;"	d
BFIN_BOOT_SPI_SLAVE	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_SPI_SLAVE /;"	d
BFIN_BOOT_SPI_SSEL	arch/blackfin/include/asm/config-pre.h	/^# define BFIN_BOOT_SPI_SSEL /;"	d
BFIN_BOOT_TWI_MASTER	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_TWI_MASTER /;"	d
BFIN_BOOT_TWI_SLAVE	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_TWI_SLAVE /;"	d
BFIN_BOOT_UART	arch/blackfin/include/asm/config-pre.h	/^#define BFIN_BOOT_UART /;"	d
BFIN_BUG	arch/blackfin/include/asm/blackfin_local.h	/^#define BFIN_BUG(/;"	d
BFIN_CC	arch/blackfin/lib/kgdb.h	/^  BFIN_CC,$/;"	e	enum:regnames
BFIN_CCLK	arch/blackfin/cpu/initcode.c	/^# define BFIN_CCLK /;"	d	file:
BFIN_CYCLES	arch/blackfin/lib/kgdb.h	/^  BFIN_CYCLES,$/;"	e	enum:regnames
BFIN_CYCLES2	arch/blackfin/lib/kgdb.h	/^  BFIN_CYCLES2,$/;"	e	enum:regnames
BFIN_DEBUG_EARLY_SERIAL	arch/blackfin/include/asm/serial.h	/^# define BFIN_DEBUG_EARLY_SERIAL /;"	d
BFIN_EXTRA1	arch/blackfin/lib/kgdb.h	/^  BFIN_EXTRA1,		\/* Address of .text section.  *\/$/;"	e	enum:regnames
BFIN_EXTRA2	arch/blackfin/lib/kgdb.h	/^  BFIN_EXTRA2,		\/* Address of .data section.  *\/$/;"	e	enum:regnames
BFIN_EXTRA3	arch/blackfin/lib/kgdb.h	/^  BFIN_EXTRA3,		\/* Address of .bss section.  *\/$/;"	e	enum:regnames
BFIN_FDPIC_EXEC	arch/blackfin/lib/kgdb.h	/^  BFIN_FDPIC_EXEC,$/;"	e	enum:regnames
BFIN_FDPIC_INTERP	arch/blackfin/lib/kgdb.h	/^  BFIN_FDPIC_INTERP,$/;"	e	enum:regnames
BFIN_FP	arch/blackfin/lib/kgdb.h	/^  BFIN_FP,$/;"	e	enum:regnames
BFIN_I0	arch/blackfin/lib/kgdb.h	/^  BFIN_I0,$/;"	e	enum:regnames
BFIN_I1	arch/blackfin/lib/kgdb.h	/^  BFIN_I1,$/;"	e	enum:regnames
BFIN_I2	arch/blackfin/lib/kgdb.h	/^  BFIN_I2,$/;"	e	enum:regnames
BFIN_I3	arch/blackfin/lib/kgdb.h	/^  BFIN_I3,$/;"	e	enum:regnames
BFIN_IN_INITCODE	arch/blackfin/cpu/initcode.c	/^#define BFIN_IN_INITCODE$/;"	d	file:
BFIN_IPEND	arch/blackfin/lib/kgdb.h	/^  BFIN_IPEND,$/;"	e	enum:regnames
BFIN_L0	arch/blackfin/lib/kgdb.h	/^  BFIN_L0,$/;"	e	enum:regnames
BFIN_L1	arch/blackfin/lib/kgdb.h	/^  BFIN_L1,$/;"	e	enum:regnames
BFIN_L2	arch/blackfin/lib/kgdb.h	/^  BFIN_L2,$/;"	e	enum:regnames
BFIN_L3	arch/blackfin/lib/kgdb.h	/^  BFIN_L3,$/;"	e	enum:regnames
BFIN_LB0	arch/blackfin/lib/kgdb.h	/^  BFIN_LB0,$/;"	e	enum:regnames
BFIN_LB1	arch/blackfin/lib/kgdb.h	/^  BFIN_LB1,$/;"	e	enum:regnames
BFIN_LC0	arch/blackfin/lib/kgdb.h	/^  BFIN_LC0,$/;"	e	enum:regnames
BFIN_LC1	arch/blackfin/lib/kgdb.h	/^  BFIN_LC1,$/;"	e	enum:regnames
BFIN_LT0	arch/blackfin/lib/kgdb.h	/^  BFIN_LT0,$/;"	e	enum:regnames
BFIN_LT1	arch/blackfin/lib/kgdb.h	/^  BFIN_LT1,$/;"	e	enum:regnames
BFIN_M0	arch/blackfin/lib/kgdb.h	/^  BFIN_M0,$/;"	e	enum:regnames
BFIN_M1	arch/blackfin/lib/kgdb.h	/^  BFIN_M1,$/;"	e	enum:regnames
BFIN_M2	arch/blackfin/lib/kgdb.h	/^  BFIN_M2,$/;"	e	enum:regnames
BFIN_M3	arch/blackfin/lib/kgdb.h	/^  BFIN_M3,$/;"	e	enum:regnames
BFIN_NAND_ALE	include/configs/bf537-pnav.h	/^#define BFIN_NAND_ALE(/;"	d
BFIN_NAND_ALE	include/configs/bf537-stamp.h	/^#define BFIN_NAND_ALE(/;"	d
BFIN_NAND_ALE	include/configs/bf561-acvilon.h	/^#define BFIN_NAND_ALE(/;"	d
BFIN_NAND_ALE	include/configs/br4.h	/^#define BFIN_NAND_ALE(/;"	d
BFIN_NAND_ALE	include/configs/ip04.h	/^#define BFIN_NAND_ALE(/;"	d
BFIN_NAND_ALE	include/configs/pr1.h	/^#define BFIN_NAND_ALE(/;"	d
BFIN_NAND_CLE	include/configs/bf537-pnav.h	/^#define BFIN_NAND_CLE(/;"	d
BFIN_NAND_CLE	include/configs/bf537-stamp.h	/^#define BFIN_NAND_CLE(/;"	d
BFIN_NAND_CLE	include/configs/bf561-acvilon.h	/^#define BFIN_NAND_CLE(/;"	d
BFIN_NAND_CLE	include/configs/br4.h	/^#define BFIN_NAND_CLE(/;"	d
BFIN_NAND_CLE	include/configs/ip04.h	/^#define BFIN_NAND_CLE(/;"	d
BFIN_NAND_CLE	include/configs/pr1.h	/^#define BFIN_NAND_CLE(/;"	d
BFIN_NAND_WRITE	include/configs/bf537-pnav.h	/^#define BFIN_NAND_WRITE(/;"	d
BFIN_NAND_WRITE	include/configs/bf537-stamp.h	/^#define BFIN_NAND_WRITE(/;"	d
BFIN_NAND_WRITE	include/configs/bf561-acvilon.h	/^#define BFIN_NAND_WRITE(/;"	d
BFIN_NAND_WRITE	include/configs/br4.h	/^#define BFIN_NAND_WRITE(/;"	d
BFIN_NAND_WRITE	include/configs/ip04.h	/^#define BFIN_NAND_WRITE(/;"	d
BFIN_NAND_WRITE	include/configs/pr1.h	/^#define BFIN_NAND_WRITE(/;"	d
BFIN_NUM_REGS	arch/blackfin/lib/kgdb.h	/^  BFIN_NUM_REGS		\/* The number of all registers.  *\/$/;"	e	enum:regnames
BFIN_P0	arch/blackfin/lib/kgdb.h	/^  BFIN_P0,$/;"	e	enum:regnames
BFIN_P1	arch/blackfin/lib/kgdb.h	/^  BFIN_P1,$/;"	e	enum:regnames
BFIN_P2	arch/blackfin/lib/kgdb.h	/^  BFIN_P2,$/;"	e	enum:regnames
BFIN_P3	arch/blackfin/lib/kgdb.h	/^  BFIN_P3,$/;"	e	enum:regnames
BFIN_P4	arch/blackfin/lib/kgdb.h	/^  BFIN_P4,$/;"	e	enum:regnames
BFIN_P5	arch/blackfin/lib/kgdb.h	/^  BFIN_P5,$/;"	e	enum:regnames
BFIN_PC	arch/blackfin/lib/kgdb.h	/^  BFIN_PC,$/;"	e	enum:regnames
BFIN_R0	arch/blackfin/lib/kgdb.h	/^  BFIN_R0 = 0,$/;"	e	enum:regnames
BFIN_R1	arch/blackfin/lib/kgdb.h	/^  BFIN_R1,$/;"	e	enum:regnames
BFIN_R2	arch/blackfin/lib/kgdb.h	/^  BFIN_R2,$/;"	e	enum:regnames
BFIN_R3	arch/blackfin/lib/kgdb.h	/^  BFIN_R3,$/;"	e	enum:regnames
BFIN_R4	arch/blackfin/lib/kgdb.h	/^  BFIN_R4,$/;"	e	enum:regnames
BFIN_R5	arch/blackfin/lib/kgdb.h	/^  BFIN_R5,$/;"	e	enum:regnames
BFIN_R6	arch/blackfin/lib/kgdb.h	/^  BFIN_R6,$/;"	e	enum:regnames
BFIN_R7	arch/blackfin/lib/kgdb.h	/^  BFIN_R7,$/;"	e	enum:regnames
BFIN_RETE	arch/blackfin/lib/kgdb.h	/^  BFIN_RETE,$/;"	e	enum:regnames
BFIN_RETI	arch/blackfin/lib/kgdb.h	/^  BFIN_RETI,$/;"	e	enum:regnames
BFIN_RETN	arch/blackfin/lib/kgdb.h	/^  BFIN_RETN,$/;"	e	enum:regnames
BFIN_RETS	arch/blackfin/lib/kgdb.h	/^  BFIN_RETS,$/;"	e	enum:regnames
BFIN_RETX	arch/blackfin/lib/kgdb.h	/^  BFIN_RETX,$/;"	e	enum:regnames
BFIN_SCLK	arch/blackfin/include/asm/blackfin_local.h	/^#define BFIN_SCLK /;"	d
BFIN_SEQSTAT	arch/blackfin/lib/kgdb.h	/^  BFIN_SEQSTAT,$/;"	e	enum:regnames
BFIN_SP	arch/blackfin/lib/kgdb.h	/^  BFIN_SP,$/;"	e	enum:regnames
BFIN_SPECIAL_GPIO_BANKS	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define BFIN_SPECIAL_GPIO_BANKS /;"	d
BFIN_SYSCFG	arch/blackfin/lib/kgdb.h	/^  BFIN_SYSCFG,$/;"	e	enum:regnames
BFIN_UART_HW_VER	arch/blackfin/include/asm/serial.h	/^# define BFIN_UART_HW_VER /;"	d
BFIN_UART_USE_RTS	arch/blackfin/cpu/initcode.c	/^#  define BFIN_UART_USE_RTS /;"	d	file:
BFIN_USP	arch/blackfin/lib/kgdb.h	/^  BFIN_USP,$/;"	e	enum:regnames
BFLAG_53X_COMPRESSED	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_COMPRESSED /;"	d
BFLAG_53X_FINAL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_FINAL /;"	d
BFLAG_53X_IGNORE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_IGNORE /;"	d
BFLAG_53X_INIT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_INIT /;"	d
BFLAG_53X_PFLAG_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_PFLAG_MASK /;"	d
BFLAG_53X_PFLAG_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_PFLAG_SHIFT /;"	d
BFLAG_53X_PPORT_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_PPORT_MASK /;"	d
BFLAG_53X_PPORT_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_PPORT_SHIFT /;"	d
BFLAG_53X_RESVECT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_RESVECT /;"	d
BFLAG_53X_ZEROFILL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_53X_ZEROFILL /;"	d
BFLAG_AUX	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_AUX /;"	d
BFLAG_CALLBACK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_CALLBACK /;"	d
BFLAG_DMACODE_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_DMACODE_MASK /;"	d
BFLAG_FASTREAD	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_FASTREAD /;"	d
BFLAG_FILL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_FILL /;"	d
BFLAG_FINAL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_FINAL /;"	d
BFLAG_FIRST	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_FIRST /;"	d
BFLAG_HDRCHK_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HDRCHK_MASK /;"	d
BFLAG_HDRCHK_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HDRCHK_SHIFT /;"	d
BFLAG_HDRINDIRECT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HDRINDIRECT /;"	d
BFLAG_HDRSIGN_MAGIC	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HDRSIGN_MAGIC /;"	d
BFLAG_HDRSIGN_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HDRSIGN_MASK /;"	d
BFLAG_HDRSIGN_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HDRSIGN_SHIFT /;"	d
BFLAG_HOOK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_HOOK /;"	d
BFLAG_IGNORE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_IGNORE /;"	d
BFLAG_INDIRECT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_INDIRECT /;"	d
BFLAG_INIT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_INIT /;"	d
BFLAG_NEXTDXE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_NEXTDXE /;"	d
BFLAG_NOAUTO	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_NOAUTO /;"	d
BFLAG_NONRESTORE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_NONRESTORE /;"	d
BFLAG_PERIPHERAL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_PERIPHERAL /;"	d
BFLAG_QUICKBOOT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_QUICKBOOT /;"	d
BFLAG_RESET	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_RESET /;"	d
BFLAG_RETURN	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_RETURN /;"	d
BFLAG_SAFE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_SAFE /;"	d
BFLAG_SLAVE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_SLAVE /;"	d
BFLAG_TYPE_1	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_TYPE_1 /;"	d
BFLAG_TYPE_2	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_TYPE_2 /;"	d
BFLAG_TYPE_3	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_TYPE_3 /;"	d
BFLAG_TYPE_4	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_TYPE_4 /;"	d
BFLAG_TYPE_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_TYPE_MASK /;"	d
BFLAG_WAKEUP	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BFLAG_WAKEUP /;"	d
BFTIC4_RST	board/keymile/kmp204x/kmp204x.c	/^#define BFTIC4_RST	/;"	d	file:
BFTICU_DIPSWITCH_MASK	board/keymile/common/common.h	/^#define BFTICU_DIPSWITCH_MASK /;"	d
BF_ANADIG_PFD_480_PFD0_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_480_PFD0_FRAC(/;"	d
BF_ANADIG_PFD_480_PFD1_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_480_PFD1_FRAC(/;"	d
BF_ANADIG_PFD_480_PFD2_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_480_PFD2_FRAC(/;"	d
BF_ANADIG_PFD_480_PFD3_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_480_PFD3_FRAC(/;"	d
BF_ANADIG_PFD_528_PFD0_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_528_PFD0_FRAC(/;"	d
BF_ANADIG_PFD_528_PFD1_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_528_PFD1_FRAC(/;"	d
BF_ANADIG_PFD_528_PFD2_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_528_PFD2_FRAC(/;"	d
BF_ANADIG_PFD_528_PFD3_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PFD_528_PFD3_FRAC(/;"	d
BF_ANADIG_PLL_528_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_BYPASS_CLK_SRC(/;"	d
BF_ANADIG_PLL_528_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_DENOM_B(/;"	d
BF_ANADIG_PLL_528_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_DENOM_RSVD0(/;"	d
BF_ANADIG_PLL_528_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_NUM_A(/;"	d
BF_ANADIG_PLL_528_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_NUM_RSVD0(/;"	d
BF_ANADIG_PLL_528_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_RSVD0(/;"	d
BF_ANADIG_PLL_528_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_RSVD1(/;"	d
BF_ANADIG_PLL_528_SS_STEP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_SS_STEP(/;"	d
BF_ANADIG_PLL_528_SS_STOP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_528_SS_STOP(/;"	d
BF_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC(/;"	d
BF_ANADIG_PLL_AUDIO_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_DENOM_B(/;"	d
BF_ANADIG_PLL_AUDIO_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_DENOM_RSVD0(/;"	d
BF_ANADIG_PLL_AUDIO_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_DIV_SELECT(/;"	d
BF_ANADIG_PLL_AUDIO_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_NUM_A(/;"	d
BF_ANADIG_PLL_AUDIO_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_NUM_RSVD0(/;"	d
BF_ANADIG_PLL_AUDIO_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_RSVD0(/;"	d
BF_ANADIG_PLL_AUDIO_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_AUDIO_TEST_DIV_SELECT(/;"	d
BF_ANADIG_PLL_ENET2_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_ENET2_DIV_SELECT(/;"	d
BF_ANADIG_PLL_ENET_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_ENET_BYPASS_CLK_SRC(/;"	d
BF_ANADIG_PLL_ENET_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_ENET_DIV_SELECT(/;"	d
BF_ANADIG_PLL_ENET_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_ENET_RSVD0(/;"	d
BF_ANADIG_PLL_ENET_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_ENET_RSVD1(/;"	d
BF_ANADIG_PLL_SYS_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_SYS_BYPASS_CLK_SRC(/;"	d
BF_ANADIG_PLL_SYS_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_SYS_DIV_SELECT(/;"	d
BF_ANADIG_PLL_SYS_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_SYS_RSVD0(/;"	d
BF_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC(/;"	d
BF_ANADIG_PLL_VIDEO_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_DENOM_B(/;"	d
BF_ANADIG_PLL_VIDEO_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_DENOM_RSVD0(/;"	d
BF_ANADIG_PLL_VIDEO_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_DIV_SELECT(/;"	d
BF_ANADIG_PLL_VIDEO_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_NUM_A(/;"	d
BF_ANADIG_PLL_VIDEO_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_NUM_RSVD0(/;"	d
BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(/;"	d
BF_ANADIG_PLL_VIDEO_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_PLL_VIDEO_RSVD0(/;"	d
BF_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC(/;"	d
BF_ANADIG_USB1_PLL_480_CTRL_CONTROL0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_USB1_PLL_480_CTRL_CONTROL0(/;"	d
BF_ANADIG_USB1_PLL_480_CTRL_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_USB1_PLL_480_CTRL_DIV_SELECT(/;"	d
BF_ANADIG_USB1_PLL_480_CTRL_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BF_ANADIG_USB1_PLL_480_CTRL_RSVD1(/;"	d
BGSTAT	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define BGSTAT	/;"	d
BGT_NAME_PATTERN	fs/ubifs/ubifs.h	/^#define BGT_NAME_PATTERN /;"	d
BI	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define BI	/;"	d
BI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define BI	/;"	d
BIDCOS_RST_GPIO	board/bosch/shc/board.h	/^# define BIDCOS_RST_GPIO /;"	d
BIGEND	drivers/usb/host/r8a66597.h	/^#define	BIGEND	/;"	d
BIGFREQ	lib/bzip2/bzlib_blocksort.c	/^#define BIGFREQ(/;"	d	file:
BIG_ENDIAN	drivers/ddr/microchip/ddr2_regs.h	/^#define BIG_ENDIAN(/;"	d
BIG_ENDIAN	include/zfs_common.h	/^	BIG_ENDIAN = 0$/;"	e	enum:zfs_endian
BIG_KERNEL_FLAG	arch/x86/include/asm/zimage.h	/^#define BIG_KERNEL_FLAG /;"	d
BINARY_MAX_ARGS	tools/kwbimage.c	/^#define BINARY_MAX_ARGS /;"	d	file:
BINBLOCKWIDTH	common/dlmalloc.c	/^#define BINBLOCKWIDTH /;"	d	file:
BIN_REGISTER_SET	drivers/video/i915_reg.h	/^#define  BIN_REGISTER_SET	/;"	d
BIN_SERDES_CFG	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^#define BIN_SERDES_CFG /;"	d
BIOS	doc/README.x86	/^BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM$/;"	l
BIOSImage	include/bios_emul.h	/^	void *BIOSImage;$/;"	m	struct:__anoneb05efed0108	typeref:typename:void *
BIOSImageLen	include/bios_emul.h	/^	u32 BIOSImageLen;$/;"	m	struct:__anoneb05efed0108	typeref:typename:u32
BIOS_0_SCRATCH	include/radeon.h	/^#define BIOS_0_SCRATCH	/;"	d
BIOS_1_SCRATCH	include/radeon.h	/^#define BIOS_1_SCRATCH	/;"	d
BIOS_2_SCRATCH	include/radeon.h	/^#define BIOS_2_SCRATCH	/;"	d
BIOS_3_SCRATCH	include/radeon.h	/^#define BIOS_3_SCRATCH	/;"	d
BIOS_4_SCRATCH	include/radeon.h	/^#define BIOS_4_SCRATCH	/;"	d
BIOS_5_SCRATCH	include/radeon.h	/^#define BIOS_5_SCRATCH	/;"	d
BIOS_6_SCRATCH	include/radeon.h	/^#define BIOS_6_SCRATCH	/;"	d
BIOS_7_SCRATCH	include/radeon.h	/^#define BIOS_7_SCRATCH	/;"	d
BIOS_CHARACTERISTICS_EXT1_ACPI	include/smbios.h	/^#define BIOS_CHARACTERISTICS_EXT1_ACPI	/;"	d
BIOS_CHARACTERISTICS_EXT1_UEFI	include/smbios.h	/^#define BIOS_CHARACTERISTICS_EXT1_UEFI	/;"	d
BIOS_CHARACTERISTICS_EXT2_TARGET	include/smbios.h	/^#define BIOS_CHARACTERISTICS_EXT2_TARGET	/;"	d
BIOS_CHARACTERISTICS_PCI_SUPPORTED	include/smbios.h	/^#define BIOS_CHARACTERISTICS_PCI_SUPPORTED	/;"	d
BIOS_CHARACTERISTICS_SELECTABLE_BOOT	include/smbios.h	/^#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT	/;"	d
BIOS_CHARACTERISTICS_UPGRADEABLE	include/smbios.h	/^#define BIOS_CHARACTERISTICS_UPGRADEABLE	/;"	d
BIOS_CNTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define BIOS_CNTL	/;"	d
BIOS_CTRL	arch/x86/cpu/broadwell/pch.c	/^#define BIOS_CTRL	/;"	d	file:
BIOS_CTRL	arch/x86/cpu/ivybridge/bd82x6x.c	/^#define BIOS_CTRL	/;"	d	file:
BIOS_CTRL	drivers/pch/pch7.c	/^#define BIOS_CTRL	/;"	d	file:
BIOS_CTRL_BIOSWE	include/pch.h	/^#define BIOS_CTRL_BIOSWE	/;"	d
BIOS_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  BIOS_EN	/;"	d
BIOS_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   BIOS_EN	/;"	d
BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG	include/qfw.h	/^	BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG = 0x2,$/;"	e	enum:__anona601a7fc0203
BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH	include/qfw.h	/^	BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH = 0x1,$/;"	e	enum:__anona601a7fc0203
BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM	include/qfw.h	/^	BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM = 0x3,$/;"	e	enum:__anona601a7fc0103
BIOS_LINKER_LOADER_COMMAND_ADD_POINTER	include/qfw.h	/^	BIOS_LINKER_LOADER_COMMAND_ADD_POINTER  = 0x2,$/;"	e	enum:__anona601a7fc0103
BIOS_LINKER_LOADER_COMMAND_ALLOCATE	include/qfw.h	/^	BIOS_LINKER_LOADER_COMMAND_ALLOCATE	= 0x1,$/;"	e	enum:__anona601a7fc0103
BIOS_LINKER_LOADER_FILESZ	include/qfw.h	/^#define BIOS_LINKER_LOADER_FILESZ /;"	d
BIOS_MAILBOX_DATA	arch/x86/include/asm/arch-broadwell/pch.h	/^#define BIOS_MAILBOX_DATA	/;"	d
BIOS_MAILBOX_INTERFACE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define BIOS_MAILBOX_INTERFACE	/;"	d
BIOS_RESET_CPL	arch/x86/include/asm/arch-broadwell/pch.h	/^#define BIOS_RESET_CPL	/;"	d
BIOS_RESET_CPL	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define BIOS_RESET_CPL	/;"	d
BIOS_RLS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  BIOS_RLS	/;"	d
BIOS_RLS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   BIOS_RLS	/;"	d
BIOS_ROM	include/radeon.h	/^#define BIOS_ROM	/;"	d
BIOS_SEG	drivers/bios_emulator/biosemui.h	/^#define BIOS_SEG	/;"	d
BIPR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BIPR1(/;"	d
BIPR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BIPR2(/;"	d
BIPR3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BIPR3(/;"	d
BIPR4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BIPR4(/;"	d
BIST	include/radeon.h	/^#define BIST	/;"	d
BIST_CR	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define BIST_CR	/;"	d	file:
BIST_CR_EN	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define BIST_CR_EN	/;"	d	file:
BIST_CR_STAT	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define BIST_CR_STAT	/;"	d	file:
BIST_CTRL	drivers/usb/eth/r8152.h	/^#define BIST_CTRL	/;"	d
BIST_CTRL_SW_RESET	drivers/usb/eth/r8152.h	/^#define BIST_CTRL_SW_RESET /;"	d
BIST_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BIST_EN	/;"	d
BIST_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_EN	/;"	d
BIST_PATTERN1	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define BIST_PATTERN1	/;"	d	file:
BIST_PATTERN2	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define BIST_PATTERN2	/;"	d	file:
BIST_START	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	BIST_START = 1$/;"	e	enum:hws_bist_operation
BIST_STOP	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	BIST_STOP = 0,$/;"	e	enum:hws_bist_operation
BIST_TYPE_COLOR_BAR	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_TYPE_COLOR_BAR	/;"	d
BIST_TYPE_COLR_BAR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BIST_TYPE_COLR_BAR	/;"	d
BIST_TYPE_GRAY_BAR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BIST_TYPE_GRAY_BAR	/;"	d
BIST_TYPE_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_TYPE_MASK	/;"	d
BIST_TYPE_MOBILE_BAR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BIST_TYPE_MOBILE_BAR	/;"	d
BIST_TYPE_MOBILE_WHITE_BAR	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_TYPE_MOBILE_WHITE_BAR	/;"	d
BIST_TYPE_WHITE_GRAY_BLACK_BAR	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_TYPE_WHITE_GRAY_BLACK_BAR	/;"	d
BIST_WH_32	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BIST_WH_32	/;"	d
BIST_WH_64	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BIST_WH_64	/;"	d
BIST_WIDTH_BAR_32_PIXEL	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_WIDTH_BAR_32_PIXEL	/;"	d
BIST_WIDTH_BAR_64_PIXEL	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_WIDTH_BAR_64_PIXEL	/;"	d
BIST_WIDTH_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define BIST_WIDTH_MASK	/;"	d
BIT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define BIT(/;"	d
BIT	include/linux/bitops.h	/^#define BIT(/;"	d
BITMAPINFOHEADER	board/esd/common/lcd.h	/^} BITMAPINFOHEADER;$/;"	t	typeref:struct:__anon5a5858080208
BITMASK	arch/powerpc/cpu/mpc8xx/video.c	/^#define BITMASK(/;"	d	file:
BITMASK	drivers/net/cpsw.c	/^#define BITMASK(/;"	d	file:
BITPOS	drivers/mtd/nand/mxc_nand.c	/^#define BITPOS(/;"	d	file:
BITRATE	drivers/usb/gadget/ether.c	/^static inline int BITRATE(struct usb_gadget *g)$/;"	f	typeref:typename:int	file:
BITS	lib/zlib/inflate.c	/^#define BITS(/;"	d	file:
BITS_CORE_SEL	board/synopsys/axs10x/axs10x.c	/^#define BITS_CORE_SEL	/;"	d	file:
BITS_MULTICORE	board/synopsys/axs10x/axs10x.c	/^#define BITS_MULTICORE	/;"	d	file:
BITS_PER_BYTE	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define BITS_PER_BYTE /;"	d
BITS_PER_BYTE	drivers/mtd/nand/nand_base.c	/^#define BITS_PER_BYTE /;"	d	file:
BITS_PER_BYTE	include/usb/lin_gadget_compat.h	/^#define BITS_PER_BYTE	/;"	d
BITS_PER_LONG	arch/arc/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/arm/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/avr32/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/blackfin/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/m68k/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/microblaze/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/mips/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/nds32/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/nios2/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/openrisc/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/powerpc/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/sandbox/include/asm/types.h	/^#define BITS_PER_LONG	/;"	d
BITS_PER_LONG	arch/sh/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/sparc/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/x86/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG	arch/xtensa/include/asm/types.h	/^#define BITS_PER_LONG /;"	d
BITS_PER_LONG_LONG	include/asm-generic/bitsperlong.h	/^#define BITS_PER_LONG_LONG /;"	d
BITS_PER_UNIT	arch/arc/lib/libgcc2.h	/^#define BITS_PER_UNIT /;"	d
BITS_PER_UNIT	arch/blackfin/lib/muldi3.c	/^#define BITS_PER_UNIT /;"	d	file:
BITS_PER_UNIT	arch/m68k/lib/ashldi3.c	/^#define BITS_PER_UNIT /;"	d	file:
BITS_PER_UNIT	arch/m68k/lib/lshrdi3.c	/^#define BITS_PER_UNIT /;"	d	file:
BITS_PER_UNIT	arch/microblaze/lib/muldi3.c	/^#define BITS_PER_UNIT /;"	d	file:
BITS_PER_UNIT	arch/nios2/lib/libgcc.c	/^#define BITS_PER_UNIT /;"	d	file:
BITS_POLARITY	board/synopsys/axs10x/axs10x.c	/^#define BITS_POLARITY	/;"	d	file:
BITS_START	board/synopsys/axs10x/axs10x.c	/^#define BITS_START	/;"	d	file:
BITS_TO_LONGS	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define BITS_TO_LONGS(/;"	d
BITS_TO_LONGS	include/usb/lin_gadget_compat.h	/^#define BITS_TO_LONGS(/;"	d
BIT_BLOCK_CLK_CAM	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_CAM	/;"	d
BIT_BLOCK_CLK_G3D	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_G3D	/;"	d
BIT_BLOCK_CLK_GPS	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_GPS	/;"	d
BIT_BLOCK_CLK_LCD0	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_LCD0	/;"	d
BIT_BLOCK_CLK_LCD1	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_LCD1	/;"	d
BIT_BLOCK_CLK_MFC	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_MFC	/;"	d
BIT_BLOCK_CLK_RESERVED	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_RESERVED	/;"	d
BIT_BLOCK_CLK_TV	board/samsung/trats/setup.h	/^#define BIT_BLOCK_CLK_TV	/;"	d
BIT_C	post/lib_powerpc/cpu_asm.h	/^#define BIT_C	/;"	d
BIT_CAM_CLK_CSIS0	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_CSIS0	/;"	d
BIT_CAM_CLK_CSIS1	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_CSIS1	/;"	d
BIT_CAM_CLK_FIMC0	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_FIMC0	/;"	d
BIT_CAM_CLK_FIMC1	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_FIMC1	/;"	d
BIT_CAM_CLK_FIMC2	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_FIMC2	/;"	d
BIT_CAM_CLK_FIMC3	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_FIMC3	/;"	d
BIT_CAM_CLK_JPEG	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_JPEG	/;"	d
BIT_CAM_CLK_PIXELASYNCM0	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_PIXELASYNCM0	/;"	d
BIT_CAM_CLK_PIXELASYNCM1	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_PIXELASYNCM1	/;"	d
BIT_CAM_CLK_PPMUCAMIF	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_PPMUCAMIF	/;"	d
BIT_CAM_CLK_QEFIMC0	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_QEFIMC0	/;"	d
BIT_CAM_CLK_QEFIMC1	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_QEFIMC1	/;"	d
BIT_CAM_CLK_QEFIMC2	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_QEFIMC2	/;"	d
BIT_CAM_CLK_QEFIMC3	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_QEFIMC3	/;"	d
BIT_CAM_CLK_SMMUFIMC0	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_SMMUFIMC0	/;"	d
BIT_CAM_CLK_SMMUFIMC1	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_SMMUFIMC1	/;"	d
BIT_CAM_CLK_SMMUFIMC2	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_SMMUFIMC2	/;"	d
BIT_CAM_CLK_SMMUFIMC3	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_SMMUFIMC3	/;"	d
BIT_CAM_CLK_SMMUJPEG	board/samsung/trats/setup.h	/^#define BIT_CAM_CLK_SMMUJPEG	/;"	d
BIT_DAT	board/samsung/trats/setup.h	/^#define BIT_DAT	/;"	d
BIT_DUMMY	board/renesas/sh7785lcr/rtl8169.h	/^#define BIT_DUMMY	/;"	d
BIT_DUMMY	drivers/net/ax88796.h	/^#define BIT_DUMMY	/;"	d
BIT_EN	board/samsung/trats/setup.h	/^#define BIT_EN	/;"	d
BIT_ERASE_DONE	board/cobra5272/flash.c	/^#define BIT_ERASE_DONE	/;"	d	file:
BIT_FSYS_CLK_NFCON	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_NFCON	/;"	d
BIT_FSYS_CLK_ONENAND	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_ONENAND	/;"	d
BIT_FSYS_CLK_PCIE	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_PCIE	/;"	d
BIT_FSYS_CLK_PCIEPHY	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_PCIEPHY	/;"	d
BIT_FSYS_CLK_PDMA0	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_PDMA0	/;"	d
BIT_FSYS_CLK_PDMA1	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_PDMA1	/;"	d
BIT_FSYS_CLK_PPMUFILE	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_PPMUFILE	/;"	d
BIT_FSYS_CLK_SATA	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SATA	/;"	d
BIT_FSYS_CLK_SATAPHY	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SATAPHY	/;"	d
BIT_FSYS_CLK_SDMMC0	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SDMMC0	/;"	d
BIT_FSYS_CLK_SDMMC1	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SDMMC1	/;"	d
BIT_FSYS_CLK_SDMMC2	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SDMMC2	/;"	d
BIT_FSYS_CLK_SDMMC3	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SDMMC3	/;"	d
BIT_FSYS_CLK_SDMMC4	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SDMMC4	/;"	d
BIT_FSYS_CLK_SMMUPCIE	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SMMUPCIE	/;"	d
BIT_FSYS_CLK_SROMC	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_SROMC	/;"	d
BIT_FSYS_CLK_TSI	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_TSI	/;"	d
BIT_FSYS_CLK_USBDEVICE	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_USBDEVICE	/;"	d
BIT_FSYS_CLK_USBHOST	board/samsung/trats/setup.h	/^#define BIT_FSYS_CLK_USBHOST	/;"	d
BIT_FULL	include/fpga.h	/^	BIT_FULL = 0,$/;"	e	enum:__anon4d3ae96c0403
BIT_G3D_CLK_G3D	board/samsung/trats/setup.h	/^#define BIT_G3D_CLK_G3D	/;"	d
BIT_G3D_CLK_PPMUG3D	board/samsung/trats/setup.h	/^#define BIT_G3D_CLK_PPMUG3D	/;"	d
BIT_G3D_CLK_QEG3D	board/samsung/trats/setup.h	/^#define BIT_G3D_CLK_QEG3D	/;"	d
BIT_GPS_CLK_GPS	board/samsung/trats/setup.h	/^#define BIT_GPS_CLK_GPS	/;"	d
BIT_GPS_CLK_SMMUGPS	board/samsung/trats/setup.h	/^#define BIT_GPS_CLK_SMMUGPS	/;"	d
BIT_IMAGE_CLK_G2D	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_G2D	/;"	d
BIT_IMAGE_CLK_MDMA	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_MDMA	/;"	d
BIT_IMAGE_CLK_PPMUIMAGE	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_PPMUIMAGE	/;"	d
BIT_IMAGE_CLK_QEG2D	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_QEG2D	/;"	d
BIT_IMAGE_CLK_QEMDMA	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_QEMDMA	/;"	d
BIT_IMAGE_CLK_QEROTATOR	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_QEROTATOR	/;"	d
BIT_IMAGE_CLK_ROTATOR	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_ROTATOR	/;"	d
BIT_IMAGE_CLK_SMMUG2D	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_SMMUG2D	/;"	d
BIT_IMAGE_CLK_SMMUMDMA	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_SMMUMDMA	/;"	d
BIT_IMAGE_CLK_SMMUROTATOR	board/samsung/trats/setup.h	/^#define BIT_IMAGE_CLK_SMMUROTATOR	/;"	d
BIT_LCD0_CLK_DSIM0	board/samsung/trats/setup.h	/^#define BIT_LCD0_CLK_DSIM0	/;"	d
BIT_LCD0_CLK_FIMD0	board/samsung/trats/setup.h	/^#define BIT_LCD0_CLK_FIMD0	/;"	d
BIT_LCD0_CLK_MDNIE0	board/samsung/trats/setup.h	/^#define BIT_LCD0_CLK_MDNIE0	/;"	d
BIT_LCD0_CLK_MIE0	board/samsung/trats/setup.h	/^#define BIT_LCD0_CLK_MIE0	/;"	d
BIT_LCD0_CLK_PPMULCD0	board/samsung/trats/setup.h	/^#define BIT_LCD0_CLK_PPMULCD0	/;"	d
BIT_LCD0_CLK_SMMUFIMD0	board/samsung/trats/setup.h	/^#define BIT_LCD0_CLK_SMMUFIMD0	/;"	d
BIT_LCD1_CLK_DSIM1	board/samsung/trats/setup.h	/^#define BIT_LCD1_CLK_DSIM1	/;"	d
BIT_LCD1_CLK_FIMD1	board/samsung/trats/setup.h	/^#define BIT_LCD1_CLK_FIMD1	/;"	d
BIT_LCD1_CLK_MDNIE1	board/samsung/trats/setup.h	/^#define BIT_LCD1_CLK_MDNIE1	/;"	d
BIT_LCD1_CLK_MIE1	board/samsung/trats/setup.h	/^#define BIT_LCD1_CLK_MIE1	/;"	d
BIT_LCD1_CLK_PPMULCD1	board/samsung/trats/setup.h	/^#define BIT_LCD1_CLK_PPMULCD1	/;"	d
BIT_LCD1_CLK_SMMUFIMD1	board/samsung/trats/setup.h	/^#define BIT_LCD1_CLK_SMMUFIMD1	/;"	d
BIT_MASK	include/linux/bitops.h	/^#define BIT_MASK(/;"	d
BIT_MFC_CLK_MFC	board/samsung/trats/setup.h	/^#define BIT_MFC_CLK_MFC	/;"	d
BIT_MFC_CLK_PPMUMFC_L	board/samsung/trats/setup.h	/^#define BIT_MFC_CLK_PPMUMFC_L	/;"	d
BIT_MFC_CLK_PPMUMFC_R	board/samsung/trats/setup.h	/^#define BIT_MFC_CLK_PPMUMFC_R	/;"	d
BIT_MFC_CLK_SMMUMFC_L	board/samsung/trats/setup.h	/^#define BIT_MFC_CLK_SMMUMFC_L	/;"	d
BIT_MFC_CLK_SMMUMFC_R	board/samsung/trats/setup.h	/^#define BIT_MFC_CLK_SMMUMFC_R	/;"	d
BIT_NONE	include/fpga.h	/^	BIT_NONE = 0xFF,$/;"	e	enum:__anon4d3ae96c0403
BIT_PARTIAL	include/fpga.h	/^	BIT_PARTIAL,$/;"	e	enum:__anon4d3ae96c0403
BIT_PERIL_CLK_AC97	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_AC97	/;"	d
BIT_PERIL_CLK_I2C0	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C0	/;"	d
BIT_PERIL_CLK_I2C1	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C1	/;"	d
BIT_PERIL_CLK_I2C2	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C2	/;"	d
BIT_PERIL_CLK_I2C3	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C3	/;"	d
BIT_PERIL_CLK_I2C4	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C4	/;"	d
BIT_PERIL_CLK_I2C5	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C5	/;"	d
BIT_PERIL_CLK_I2C6	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C6	/;"	d
BIT_PERIL_CLK_I2C7	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2C7	/;"	d
BIT_PERIL_CLK_I2CHDMI	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2CHDMI	/;"	d
BIT_PERIL_CLK_I2S1	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2S1	/;"	d
BIT_PERIL_CLK_I2S2	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_I2S2	/;"	d
BIT_PERIL_CLK_MODEMIF	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_MODEMIF	/;"	d
BIT_PERIL_CLK_PCM1	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_PCM1	/;"	d
BIT_PERIL_CLK_PCM2	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_PCM2	/;"	d
BIT_PERIL_CLK_PWM	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_PWM	/;"	d
BIT_PERIL_CLK_RESERVED0	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_RESERVED0	/;"	d
BIT_PERIL_CLK_RESERVED1	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_RESERVED1	/;"	d
BIT_PERIL_CLK_SLIMBUS	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_SLIMBUS	/;"	d
BIT_PERIL_CLK_SPDIF	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_SPDIF	/;"	d
BIT_PERIL_CLK_SPI0	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_SPI0	/;"	d
BIT_PERIL_CLK_SPI1	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_SPI1	/;"	d
BIT_PERIL_CLK_SPI2	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_SPI2	/;"	d
BIT_PERIL_CLK_TSADC	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_TSADC	/;"	d
BIT_PERIL_CLK_UART0	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_UART0	/;"	d
BIT_PERIL_CLK_UART1	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_UART1	/;"	d
BIT_PERIL_CLK_UART2	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_UART2	/;"	d
BIT_PERIL_CLK_UART3	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_UART3	/;"	d
BIT_PERIL_CLK_UART4	board/samsung/trats/setup.h	/^#define BIT_PERIL_CLK_UART4	/;"	d
BIT_PERIR_CLK_CHIP_ID	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_CHIP_ID	/;"	d
BIT_PERIR_CLK_CMU_APBIF	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_CMU_APBIF	/;"	d
BIT_PERIR_CLK_CMU_DMCPART	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_CMU_DMCPART	/;"	d
BIT_PERIR_CLK_HDMI_CEC	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_HDMI_CEC	/;"	d
BIT_PERIR_CLK_KEYIF	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_KEYIF	/;"	d
BIT_PERIR_CLK_MCT	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_MCT	/;"	d
BIT_PERIR_CLK_RESERVED	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_RESERVED	/;"	d
BIT_PERIR_CLK_RTC	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_RTC	/;"	d
BIT_PERIR_CLK_SECKEY	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_SECKEY	/;"	d
BIT_PERIR_CLK_SYSREG	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_SYSREG	/;"	d
BIT_PERIR_CLK_TMU_APBIF	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TMU_APBIF	/;"	d
BIT_PERIR_CLK_TZPC0	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TZPC0	/;"	d
BIT_PERIR_CLK_TZPC1	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TZPC1	/;"	d
BIT_PERIR_CLK_TZPC2	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TZPC2	/;"	d
BIT_PERIR_CLK_TZPC3	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TZPC3	/;"	d
BIT_PERIR_CLK_TZPC4	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TZPC4	/;"	d
BIT_PERIR_CLK_TZPC5	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_TZPC5	/;"	d
BIT_PERIR_CLK_WDT	board/samsung/trats/setup.h	/^#define BIT_PERIR_CLK_WDT	/;"	d
BIT_PROGRAM_ERROR	board/cobra5272/flash.c	/^#define BIT_PROGRAM_ERROR	/;"	d	file:
BIT_RDY_MASK	board/cobra5272/flash.c	/^#define BIT_RDY_MASK	/;"	d	file:
BIT_TIMEOUT	board/cobra5272/flash.c	/^#define BIT_TIMEOUT	/;"	d	file:
BIT_VP_CLK_HDMI	board/samsung/trats/setup.h	/^#define BIT_VP_CLK_HDMI	/;"	d
BIT_VP_CLK_MIXER	board/samsung/trats/setup.h	/^#define BIT_VP_CLK_MIXER	/;"	d
BIT_VP_CLK_PPMUTV	board/samsung/trats/setup.h	/^#define BIT_VP_CLK_PPMUTV	/;"	d
BIT_VP_CLK_SMMUTV	board/samsung/trats/setup.h	/^#define BIT_VP_CLK_SMMUTV	/;"	d
BIT_VP_CLK_TVENC	board/samsung/trats/setup.h	/^#define BIT_VP_CLK_TVENC	/;"	d
BIT_VP_CLK_VP	board/samsung/trats/setup.h	/^#define BIT_VP_CLK_VP	/;"	d
BIT_WORD	include/linux/bitops.h	/^#define BIT_WORD(/;"	d
BIT_WRITEABLE_SHIFT	drivers/usb/phy/rockchip_usb2_phy.c	/^#define BIT_WRITEABLE_SHIFT	/;"	d	file:
BI_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define BI_P	/;"	d
BI_PHYMODE_GMII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_GMII /;"	d	file:
BI_PHYMODE_MII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_MII /;"	d	file:
BI_PHYMODE_NONE	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_NONE	/;"	d	file:
BI_PHYMODE_RGMII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_RGMII /;"	d	file:
BI_PHYMODE_RMII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_RMII /;"	d	file:
BI_PHYMODE_RTBI	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_RTBI /;"	d	file:
BI_PHYMODE_SGMII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_SGMII /;"	d	file:
BI_PHYMODE_SMII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_SMII /;"	d	file:
BI_PHYMODE_TBI	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_TBI /;"	d	file:
BI_PHYMODE_ZMII	drivers/net/4xx_enet.c	/^#define BI_PHYMODE_ZMII	/;"	d	file:
BKPRSEN	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	BKPRSEN	/;"	d
BL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define BL(/;"	d
BL	drivers/ddr/microchip/ddr2_timing.h	/^#define BL	/;"	d
BL1_SIZE	include/configs/origen.h	/^#define BL1_SIZE	/;"	d
BL1_SIZE	include/configs/smdkv310.h	/^#define BL1_SIZE	/;"	d
BL2_SIZE_BLOC_COUNT	include/configs/exynos5-common.h	/^#define BL2_SIZE_BLOC_COUNT	/;"	d
BL2_SIZE_BLOC_COUNT	include/configs/origen.h	/^#define BL2_SIZE_BLOC_COUNT	/;"	d
BL2_SIZE_BLOC_COUNT	include/configs/smdkv310.h	/^#define BL2_SIZE_BLOC_COUNT	/;"	d
BL2_START_OFFSET	include/configs/exynos5-common.h	/^#define BL2_START_OFFSET	/;"	d
BL2_START_OFFSET	include/configs/origen.h	/^#define BL2_START_OFFSET	/;"	d
BL2_START_OFFSET	include/configs/smdkv310.h	/^#define BL2_START_OFFSET	/;"	d
BL30_HIKEY	board/hisilicon/hikey/build-tf.mak	/^BL30_HIKEY	:= $(output_dir)\/mcuimage.bin$/;"	m
BL33_HIKEY	board/hisilicon/hikey/build-tf.mak	/^BL33_HIKEY	:= $(output_dir)\/u-boot-hikey.bin$/;"	m
BLACK	board/bf533-stamp/video.h	/^#define BLACK /;"	d
BLACK	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
BLACKFIN	arch/Kconfig	/^config BLACKFIN$/;"	c	choice:choice07312ef30104
BLANK	include/linux/kbuild.h	/^#define BLANK(/;"	d
BLANKGEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define BLANKGEN /;"	d
BLC_HIST_CTL	drivers/video/i915_reg.h	/^#define BLC_HIST_CTL	/;"	d
BLC_PWM2_ENABLE	drivers/video/i915_reg.h	/^#define  BLC_PWM2_ENABLE /;"	d
BLC_PWM_CPU_CTL	drivers/video/i915_reg.h	/^#define BLC_PWM_CPU_CTL	/;"	d
BLC_PWM_CPU_CTL2	drivers/video/i915_reg.h	/^#define BLC_PWM_CPU_CTL2	/;"	d
BLC_PWM_CTL	drivers/video/i915_reg.h	/^#define BLC_PWM_CTL	/;"	d
BLC_PWM_CTL2	drivers/video/i915_reg.h	/^#define BLC_PWM_CTL2	/;"	d
BLC_PWM_PCH_CTL1	drivers/video/i915_reg.h	/^#define BLC_PWM_PCH_CTL1	/;"	d
BLC_PWM_PCH_CTL2	drivers/video/i915_reg.h	/^#define BLC_PWM_PCH_CTL2	/;"	d
BLEN_512BYTESLEN	arch/arm/include/asm/omap_mmc.h	/^#define BLEN_512BYTESLEN	/;"	d
BLINK_TIMER_HZ	arch/powerpc/cpu/mpc8xx/video.c	/^#define BLINK_TIMER_HZ	/;"	d	file:
BLINK_TIMER_ID	arch/powerpc/cpu/mpc8xx/video.c	/^#define BLINK_TIMER_ID	/;"	d	file:
BLK	drivers/block/Kconfig	/^config BLK$/;"	c
BLKATTR	include/fsl_esdhc.h	/^#define BLKATTR	/;"	d
BLKATTR_CNT	include/fsl_esdhc.h	/^#define BLKATTR_CNT(/;"	d
BLKATTR_SIZE	include/fsl_esdhc.h	/^#define BLKATTR_SIZE(/;"	d
BLKH_SIZE	fs/reiserfs/reiserfs_private.h	/^#define BLKH_SIZE /;"	d
BLK_FRAME_SIZE	drivers/usb/eth/asix88179.c	/^#define BLK_FRAME_SIZE /;"	d	file:
BLK_H	include/blk.h	/^#define BLK_H$/;"	d
BLK_RW_CMP	include/linux/mtd/samsung_onenand.h	/^#define BLK_RW_CMP /;"	d
BLK_STATE_ALLDIRTY	fs/jffs2/summary.h	/^#define BLK_STATE_ALLDIRTY	/;"	d
BLK_STATE_ALLFF	fs/jffs2/summary.h	/^#define BLK_STATE_ALLFF	/;"	d
BLK_STATE_BADBLOCK	fs/jffs2/summary.h	/^#define BLK_STATE_BADBLOCK	/;"	d
BLK_STATE_CLEAN	fs/jffs2/summary.h	/^#define BLK_STATE_CLEAN	/;"	d
BLK_STATE_CLEANMARKER	fs/jffs2/summary.h	/^#define BLK_STATE_CLEANMARKER	/;"	d
BLK_STATE_PARTDIRTY	fs/jffs2/summary.h	/^#define BLK_STATE_PARTDIRTY	/;"	d
BLM_COMBINATION_MODE	drivers/video/i915_reg.h	/^#define   BLM_COMBINATION_MODE	/;"	d
BLM_HIST_CTL	drivers/video/i915_reg.h	/^#define BLM_HIST_CTL	/;"	d
BLM_HIST_ENH	drivers/video/i915_reg.h	/^#define BLM_HIST_ENH	/;"	d
BLM_HIST_EVENT_STATUS	drivers/video/i915_reg.h	/^#define  BLM_HIST_EVENT_STATUS	/;"	d
BLM_HIST_GUARD_BAND	drivers/video/i915_reg.h	/^#define BLM_HIST_GUARD_BAND	/;"	d
BLM_HIST_INTR_DELAY_MASK	drivers/video/i915_reg.h	/^#define  BLM_HIST_INTR_DELAY_MASK	/;"	d
BLM_HIST_INTR_DELAY_SHIFT	drivers/video/i915_reg.h	/^#define  BLM_HIST_INTR_DELAY_SHIFT	/;"	d
BLM_HIST_INTR_ENABLE	drivers/video/i915_reg.h	/^#define  BLM_HIST_INTR_ENABLE	/;"	d
BLM_LEGACY_MODE	drivers/video/i915_reg.h	/^#define   BLM_LEGACY_MODE	/;"	d
BLM_PCH_OVERRIDE_ENABLE	drivers/video/i915_reg.h	/^#define   BLM_PCH_OVERRIDE_ENABLE	/;"	d
BLM_PCH_POLARITY	drivers/video/i915_reg.h	/^#define   BLM_PCH_POLARITY	/;"	d
BLM_PCH_PWM_ENABLE	drivers/video/i915_reg.h	/^#define   BLM_PCH_PWM_ENABLE	/;"	d
BLM_PHASE_IN_COUNT_MASK	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_COUNT_MASK	/;"	d
BLM_PHASE_IN_COUNT_SHIFT	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_COUNT_SHIFT	/;"	d
BLM_PHASE_IN_ENABLE	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_ENABLE	/;"	d
BLM_PHASE_IN_INCR_MASK	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_INCR_MASK	/;"	d
BLM_PHASE_IN_INCR_SHIFT	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_INCR_SHIFT	/;"	d
BLM_PHASE_IN_INTERUPT_ENABL	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_INTERUPT_ENABL	/;"	d
BLM_PHASE_IN_INTERUPT_STATUS	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_INTERUPT_STATUS	/;"	d
BLM_PHASE_IN_TIME_BASE_MASK	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_TIME_BASE_MASK	/;"	d
BLM_PHASE_IN_TIME_BASE_SHIFT	drivers/video/i915_reg.h	/^#define   BLM_PHASE_IN_TIME_BASE_SHIFT	/;"	d
BLM_PIPE	drivers/video/i915_reg.h	/^#define   BLM_PIPE(/;"	d
BLM_PIPE_A	drivers/video/i915_reg.h	/^#define   BLM_PIPE_A	/;"	d
BLM_PIPE_B	drivers/video/i915_reg.h	/^#define   BLM_PIPE_B	/;"	d
BLM_PIPE_C	drivers/video/i915_reg.h	/^#define   BLM_PIPE_C	/;"	d
BLM_PIPE_SELECT	drivers/video/i915_reg.h	/^#define   BLM_PIPE_SELECT	/;"	d
BLM_PIPE_SELECT_IVB	drivers/video/i915_reg.h	/^#define   BLM_PIPE_SELECT_IVB	/;"	d
BLM_POLARITY_I965	drivers/video/i915_reg.h	/^#define   BLM_POLARITY_I965	/;"	d
BLM_POLARITY_PNV	drivers/video/i915_reg.h	/^#define   BLM_POLARITY_PNV	/;"	d
BLM_PWM_ENABLE	drivers/video/i915_reg.h	/^#define   BLM_PWM_ENABLE	/;"	d
BLOB_SIZE	include/fsl_sec.h	/^#define BLOB_SIZE(/;"	d
BLOCKHEAD	fs/reiserfs/reiserfs_private.h	/^#define BLOCKHEAD(/;"	d
BLOCK_CACHE	drivers/block/Kconfig	/^config BLOCK_CACHE$/;"	c
BLOCK_CNT	include/blk.h	/^#define BLOCK_CNT(/;"	d
BLOCK_IO_GUID	include/efi_api.h	/^#define BLOCK_IO_GUID /;"	d
BLOCK_NO_ONE	fs/ext4/ext4_common.h	/^#define BLOCK_NO_ONE	/;"	d
BLOCK_SIZE	tools/mksunxiboot.c	/^#define BLOCK_SIZE /;"	d	file:
BLOCK_SIZE_L1	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define BLOCK_SIZE_L1	/;"	d	file:
BLOCK_SIZE_L2	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define BLOCK_SIZE_L2	/;"	d	file:
BLOCK_SIZE_MASK	drivers/mmc/sh_mmcif.h	/^#define BLOCK_SIZE_MASK	/;"	d
BLOCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BLOCR1 /;"	d
BLOCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BLOCR2 /;"	d
BLOCR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BLOCR3 /;"	d
BLR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BLR(/;"	d
BLSP1_AHB_CBCR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_AHB_CBCR /;"	d	file:
BLSP1_UART2_APPS_CBCR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_APPS_CBCR /;"	d	file:
BLSP1_UART2_APPS_CFG_RCGR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_APPS_CFG_RCGR /;"	d	file:
BLSP1_UART2_APPS_CMD_RCGR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_APPS_CMD_RCGR /;"	d	file:
BLSP1_UART2_APPS_D	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_APPS_D /;"	d	file:
BLSP1_UART2_APPS_M	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_APPS_M /;"	d	file:
BLSP1_UART2_APPS_N	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_APPS_N /;"	d	file:
BLSP1_UART2_BCR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define BLSP1_UART2_BCR /;"	d	file:
BLUE	board/bf533-stamp/video.h	/^#define BLUE /;"	d
BLUE	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
BL_1	include/sym53c8xx.h	/^	#define   BL_1 /;"	d
BL_2	include/sym53c8xx.h	/^	#define   BL_2 /;"	d
BL_8	arch/arm/mach-exynos/exynos4_setup.h	/^#define BL_8	/;"	d
BL_CODES	lib/zlib/deflate.h	/^#define BL_CODES /;"	d
BL_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define BL_MASK /;"	d
BL_OFF	board/tqc/tqm5200/cmd_stk52xx.c	/^#define BL_OFF	/;"	d	file:
BL_ON	board/tqc/tqm5200/cmd_stk52xx.c	/^#define BL_ON	/;"	d	file:
BMATTRIBUTE_RESERVED	include/usbdescriptors.h	/^#define BMATTRIBUTE_RESERVED	/;"	d
BMATTRIBUTE_SELF_POWERED	include/usbdescriptors.h	/^#define BMATTRIBUTE_SELF_POWERED	/;"	d
BMCR	drivers/net/ns8382x.c	/^	BMCR = 0x00,$/;"	e	enum:phy_reg_offsets	file:
BMCRDuplex	drivers/net/rtl8139.c	/^	BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,$/;"	e	enum:MIIBMCRBits	file:
BMCRNWayEnable	drivers/net/rtl8139.c	/^	BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,$/;"	e	enum:MIIBMCRBits	file:
BMCRReset	drivers/net/rtl8139.c	/^	BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,$/;"	e	enum:MIIBMCRBits	file:
BMCRRestartNWay	drivers/net/rtl8139.c	/^	BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,$/;"	e	enum:MIIBMCRBits	file:
BMCRSpeed100	drivers/net/rtl8139.c	/^	BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,$/;"	e	enum:MIIBMCRBits	file:
BMCR_ANENABLE	include/linux/mii.h	/^#define BMCR_ANENABLE	/;"	d
BMCR_ANRESTART	include/linux/mii.h	/^#define BMCR_ANRESTART	/;"	d
BMCR_CTST	include/linux/mii.h	/^#define BMCR_CTST	/;"	d
BMCR_FULLDPLX	include/linux/mii.h	/^#define BMCR_FULLDPLX	/;"	d
BMCR_ISOLATE	include/linux/mii.h	/^#define BMCR_ISOLATE	/;"	d
BMCR_LOOPBACK	include/linux/mii.h	/^#define BMCR_LOOPBACK	/;"	d
BMCR_PDOWN	include/linux/mii.h	/^#define BMCR_PDOWN	/;"	d
BMCR_RESET	include/linux/mii.h	/^#define BMCR_RESET	/;"	d
BMCR_RESV	include/linux/mii.h	/^#define BMCR_RESV	/;"	d
BMCR_SPEED100	include/linux/mii.h	/^#define BMCR_SPEED100	/;"	d
BMCR_SPEED1000	include/linux/mii.h	/^#define BMCR_SPEED1000	/;"	d
BMCSR_HALFSPD	include/usb/fusbh200.h	/^#define BMCSR_HALFSPD /;"	d
BMCSR_HFT	include/usb/fusbh200.h	/^#define BMCSR_HFT /;"	d
BMCSR_HFT_LONG	include/usb/fusbh200.h	/^#define BMCSR_HFT_LONG /;"	d
BMCSR_IRQLH	include/usb/fusbh200.h	/^#define BMCSR_IRQLH /;"	d
BMCSR_IRQLL	include/usb/fusbh200.h	/^#define BMCSR_IRQLL /;"	d
BMCSR_SPD	include/usb/fusbh200.h	/^#define BMCSR_SPD(/;"	d
BMCSR_SPD_FULL	include/usb/fusbh200.h	/^#define BMCSR_SPD_FULL /;"	d
BMCSR_SPD_HIGH	include/usb/fusbh200.h	/^#define BMCSR_SPD_HIGH /;"	d
BMCSR_SPD_LOW	include/usb/fusbh200.h	/^#define BMCSR_SPD_LOW /;"	d
BMCSR_SPD_MASK	include/usb/fusbh200.h	/^#define BMCSR_SPD_MASK /;"	d
BMCSR_SPD_SHIFT	include/usb/fusbh200.h	/^#define BMCSR_SPD_SHIFT /;"	d
BMCSR_VBUS	include/usb/fusbh200.h	/^#define BMCSR_VBUS /;"	d
BMCSR_VBUS_OFF	include/usb/fusbh200.h	/^#define BMCSR_VBUS_OFF /;"	d
BMCSR_VBUS_ON	include/usb/fusbh200.h	/^#define BMCSR_VBUS_ON /;"	d
BMCSR_VFT	include/usb/fusbh200.h	/^#define BMCSR_VFT /;"	d
BMCSR_VFT_LONG	include/usb/fusbh200.h	/^#define BMCSR_VFT_LONG /;"	d
BMCTL_EEOB	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_EEOB	/;"	d
BMCTL_EH1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_EH1	/;"	d
BMCTL_EH2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_EH2	/;"	d
BMCTL_MT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_MT	/;"	d
BMCTL_RXCHR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_RXCHR	/;"	d
BMCTL_RXDIS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_RXDIS	/;"	d
BMCTL_RXEN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_RXEN	/;"	d
BMCTL_TT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_TT	/;"	d
BMCTL_TXCHR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_TXCHR	/;"	d
BMCTL_TXDIS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_TXDIS	/;"	d
BMCTL_TXEN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_TXEN	/;"	d
BMCTL_UNH	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMCTL_UNH	/;"	d
BME1000_E_PHY_ID	drivers/net/e1000.h	/^#define BME1000_E_PHY_ID /;"	d
BMISR_DEVRM	include/usb/fusbh200.h	/^#define BMISR_DEVRM /;"	d
BMISR_DMA	include/usb/fusbh200.h	/^#define BMISR_DMA /;"	d
BMISR_DMAERR	include/usb/fusbh200.h	/^#define BMISR_DMAERR /;"	d
BMISR_OVD	include/usb/fusbh200.h	/^#define BMISR_OVD /;"	d
BMISR_VBUSERR	include/usb/fusbh200.h	/^#define BMISR_VBUSERR /;"	d
BMLOCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BMLOCR1 /;"	d
BMLOCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BMLOCR2 /;"	d
BMLOCR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BMLOCR3 /;"	d
BMLOCR4	arch/sh/include/asm/cpu_sh7722.h	/^#define BMLOCR4 /;"	d
BMPCCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BMPCCR1 /;"	d
BMPCCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BMPCCR2 /;"	d
BMPR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BMPR1(/;"	d
BMPR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BMPR2(/;"	d
BMPR3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BMPR3(/;"	d
BMPR4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BMPR4(/;"	d
BMP_ALIGN_CENTER	common/lcd.c	/^#define BMP_ALIGN_CENTER	/;"	d	file:
BMP_ALIGN_CENTER	drivers/video/video_bmp.c	/^#define BMP_ALIGN_CENTER	/;"	d	file:
BMP_ALIGN_CENTER	include/splash.h	/^#define BMP_ALIGN_CENTER	/;"	d
BMP_BI_RGB	include/bmp_layout.h	/^#define BMP_BI_RGB	/;"	d
BMP_BI_RLE4	include/bmp_layout.h	/^#define BMP_BI_RLE4	/;"	d
BMP_BI_RLE8	include/bmp_layout.h	/^#define BMP_BI_RLE8	/;"	d
BMP_DATA_ALIGN	include/bmp_layout.h	/^#define BMP_DATA_ALIGN	/;"	d
BMP_LOGO_COLORS	board/bluewater/gurnard/splash_logo.h	/^#define BMP_LOGO_COLORS /;"	d
BMP_LOGO_COLORS	include/bmp_logo.h	/^#define BMP_LOGO_COLORS	/;"	d
BMP_LOGO_HEIGHT	board/bluewater/gurnard/splash_logo.h	/^#define BMP_LOGO_HEIGHT /;"	d
BMP_LOGO_HEIGHT	include/bmp_logo.h	/^#define BMP_LOGO_HEIGHT	/;"	d
BMP_LOGO_OFFSET	board/bluewater/gurnard/splash_logo.h	/^#define BMP_LOGO_OFFSET /;"	d
BMP_LOGO_OFFSET	include/bmp_logo.h	/^#define BMP_LOGO_OFFSET	/;"	d
BMP_LOGO_WIDTH	board/bluewater/gurnard/splash_logo.h	/^#define BMP_LOGO_WIDTH /;"	d
BMP_LOGO_WIDTH	include/bmp_logo.h	/^#define BMP_LOGO_WIDTH	/;"	d
BMP_RLE8_DELTA	common/lcd.c	/^#define BMP_RLE8_DELTA	/;"	d	file:
BMP_RLE8_DELTA	drivers/video/video_bmp.c	/^#define BMP_RLE8_DELTA	/;"	d	file:
BMP_RLE8_EOBMP	common/lcd.c	/^#define BMP_RLE8_EOBMP	/;"	d	file:
BMP_RLE8_EOBMP	drivers/video/video_bmp.c	/^#define BMP_RLE8_EOBMP	/;"	d	file:
BMP_RLE8_EOL	common/lcd.c	/^#define BMP_RLE8_EOL	/;"	d	file:
BMP_RLE8_EOL	drivers/video/video_bmp.c	/^#define BMP_RLE8_EOL	/;"	d	file:
BMP_RLE8_ESCAPE	common/lcd.c	/^#define BMP_RLE8_ESCAPE	/;"	d	file:
BMP_RLE8_ESCAPE	drivers/video/video_bmp.c	/^#define BMP_RLE8_ESCAPE	/;"	d	file:
BMR_BDB_SECONDARY_BUS	drivers/qe/uec.h	/^#define BMR_BDB_SECONDARY_BUS	/;"	d
BMR_BO_BE	drivers/qe/uec.h	/^#define BMR_BO_BE	/;"	d
BMR_DTB_SECONDARY_BUS	drivers/qe/uec.h	/^#define BMR_DTB_SECONDARY_BUS	/;"	d
BMR_GLB	drivers/qe/uec.h	/^#define BMR_GLB	/;"	d
BMR_INIT_VALUE	drivers/qe/uec.h	/^#define BMR_INIT_VALUE	/;"	d
BMR_SCL	drivers/i2c/fti2c010.h	/^#define BMR_SCL /;"	d
BMR_SDA	drivers/i2c/fti2c010.h	/^#define BMR_SDA /;"	d
BMR_SHIFT	drivers/qe/uec.h	/^#define BMR_SHIFT	/;"	d
BMR_SWR	drivers/net/dc2114x.c	/^#define BMR_SWR	/;"	d	file:
BMSACR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSACR1 /;"	d
BMSACR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSACR2 /;"	d
BMSACR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSACR3 /;"	d
BMSACR4	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSACR4 /;"	d
BMSAYR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSAYR1 /;"	d
BMSAYR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSAYR2 /;"	d
BMSAYR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSAYR3 /;"	d
BMSAYR4	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSAYR4 /;"	d
BMSIFR	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSIFR /;"	d
BMSMWR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSMWR1 /;"	d
BMSMWR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSMWR2 /;"	d
BMSMWR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSMWR3 /;"	d
BMSMWR4	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSMWR4 /;"	d
BMSR	drivers/net/ns8382x.c	/^	BMSR = 0x01,$/;"	e	enum:phy_reg_offsets	file:
BMSR_100BASE4	include/linux/mii.h	/^#define BMSR_100BASE4	/;"	d
BMSR_100FULL	include/linux/mii.h	/^#define BMSR_100FULL	/;"	d
BMSR_100FULL2	include/linux/mii.h	/^#define BMSR_100FULL2	/;"	d
BMSR_100HALF	include/linux/mii.h	/^#define BMSR_100HALF	/;"	d
BMSR_100HALF2	include/linux/mii.h	/^#define BMSR_100HALF2	/;"	d
BMSR_10FULL	include/linux/mii.h	/^#define BMSR_10FULL	/;"	d
BMSR_10HALF	include/linux/mii.h	/^#define BMSR_10HALF	/;"	d
BMSR_ANEGCAPABLE	include/linux/mii.h	/^#define BMSR_ANEGCAPABLE	/;"	d
BMSR_ANEGCOMPLETE	include/linux/mii.h	/^#define BMSR_ANEGCOMPLETE	/;"	d
BMSR_ERCAP	include/linux/mii.h	/^#define BMSR_ERCAP	/;"	d
BMSR_ESTATEN	include/linux/mii.h	/^#define BMSR_ESTATEN	/;"	d
BMSR_JCD	include/linux/mii.h	/^#define BMSR_JCD	/;"	d
BMSR_LSTATUS	include/linux/mii.h	/^#define BMSR_LSTATUS	/;"	d
BMSR_RESV	include/linux/mii.h	/^#define BMSR_RESV	/;"	d
BMSR_RFAULT	include/linux/mii.h	/^#define BMSR_RFAULT	/;"	d
BMSSZR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSSZR1 /;"	d
BMSSZR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSSZR2 /;"	d
BMSSZR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSSZR3 /;"	d
BMSSZR4	arch/sh/include/asm/cpu_sh7722.h	/^#define BMSSZR4 /;"	d
BMSTS_QID_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_MASK	/;"	d
BMSTS_QID_RXDATA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_RXDATA	/;"	d
BMSTS_QID_RXDESC	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_RXDESC	/;"	d
BMSTS_QID_RXSTS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_RXSTS	/;"	d
BMSTS_QID_TXDATA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_TXDATA	/;"	d
BMSTS_QID_TXDESC	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_TXDESC	/;"	d
BMSTS_QID_TXSTS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_QID_TXSTS	/;"	d
BMSTS_RXACT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_RXACT	/;"	d
BMSTS_TP	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_TP	/;"	d
BMSTS_TXACT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define BMSTS_TXACT	/;"	d
BMT_1024	arch/m68k/include/asm/m5329.h	/^#define BMT_1024	/;"	d
BMT_128	arch/m68k/include/asm/m5329.h	/^#define BMT_128	/;"	d
BMT_16	arch/m68k/include/asm/m5329.h	/^#define BMT_16	/;"	d
BMT_256	arch/m68k/include/asm/m5329.h	/^#define BMT_256	/;"	d
BMT_32	arch/m68k/include/asm/m5329.h	/^#define BMT_32	/;"	d
BMT_512	arch/m68k/include/asm/m5329.h	/^#define BMT_512	/;"	d
BMT_64	arch/m68k/include/asm/m5329.h	/^#define BMT_64	/;"	d
BMT_8	arch/m68k/include/asm/m5329.h	/^#define BMT_8	/;"	d
BMT_BME	arch/m68k/include/asm/m5329.h	/^#define BMT_BME	/;"	d
BMWCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define BMWCR0 /;"	d
BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF /;"	d
BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ /;"	d
BM_ANADIG_PFD_480_PFD0_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD0_CLKGATE /;"	d
BM_ANADIG_PFD_480_PFD0_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD0_FRAC /;"	d
BM_ANADIG_PFD_480_PFD0_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD0_STABLE /;"	d
BM_ANADIG_PFD_480_PFD1_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD1_CLKGATE /;"	d
BM_ANADIG_PFD_480_PFD1_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD1_FRAC /;"	d
BM_ANADIG_PFD_480_PFD1_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD1_STABLE /;"	d
BM_ANADIG_PFD_480_PFD2_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD2_CLKGATE /;"	d
BM_ANADIG_PFD_480_PFD2_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD2_FRAC /;"	d
BM_ANADIG_PFD_480_PFD2_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD2_STABLE /;"	d
BM_ANADIG_PFD_480_PFD3_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD3_CLKGATE /;"	d
BM_ANADIG_PFD_480_PFD3_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD3_FRAC /;"	d
BM_ANADIG_PFD_480_PFD3_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_480_PFD3_STABLE /;"	d
BM_ANADIG_PFD_528_PFD0_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD0_CLKGATE /;"	d
BM_ANADIG_PFD_528_PFD0_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD0_FRAC /;"	d
BM_ANADIG_PFD_528_PFD0_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD0_STABLE /;"	d
BM_ANADIG_PFD_528_PFD1_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD1_CLKGATE /;"	d
BM_ANADIG_PFD_528_PFD1_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD1_FRAC /;"	d
BM_ANADIG_PFD_528_PFD1_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD1_STABLE /;"	d
BM_ANADIG_PFD_528_PFD2_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD2_CLKGATE /;"	d
BM_ANADIG_PFD_528_PFD2_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD2_FRAC /;"	d
BM_ANADIG_PFD_528_PFD2_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD2_STABLE /;"	d
BM_ANADIG_PFD_528_PFD3_CLKGATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD3_CLKGATE /;"	d
BM_ANADIG_PFD_528_PFD3_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD3_FRAC /;"	d
BM_ANADIG_PFD_528_PFD3_STABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PFD_528_PFD3_STABLE /;"	d
BM_ANADIG_PLL_528_BYPASS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_BYPASS /;"	d
BM_ANADIG_PLL_528_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_BYPASS_CLK_SRC /;"	d
BM_ANADIG_PLL_528_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_DENOM_B /;"	d
BM_ANADIG_PLL_528_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_DENOM_RSVD0 /;"	d
BM_ANADIG_PLL_528_DITHER_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_DITHER_ENABLE /;"	d
BM_ANADIG_PLL_528_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_DIV_SELECT /;"	d
BM_ANADIG_PLL_528_DOUBLE_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_DOUBLE_CP /;"	d
BM_ANADIG_PLL_528_DOUBLE_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_DOUBLE_LF /;"	d
BM_ANADIG_PLL_528_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_ENABLE /;"	d
BM_ANADIG_PLL_528_HALF_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_HALF_CP /;"	d
BM_ANADIG_PLL_528_HALF_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_HALF_LF /;"	d
BM_ANADIG_PLL_528_HOLD_RING_OFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_HOLD_RING_OFF /;"	d
BM_ANADIG_PLL_528_LOCK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_LOCK /;"	d
BM_ANADIG_PLL_528_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_NUM_A /;"	d
BM_ANADIG_PLL_528_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_NUM_RSVD0 /;"	d
BM_ANADIG_PLL_528_PFD_OFFSET_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_PFD_OFFSET_EN /;"	d
BM_ANADIG_PLL_528_POWERDOWN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_POWERDOWN /;"	d
BM_ANADIG_PLL_528_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_RSVD0 /;"	d
BM_ANADIG_PLL_528_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_RSVD1 /;"	d
BM_ANADIG_PLL_528_SS_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_SS_ENABLE /;"	d
BM_ANADIG_PLL_528_SS_STEP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_SS_STEP /;"	d
BM_ANADIG_PLL_528_SS_STOP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_528_SS_STOP /;"	d
BM_ANADIG_PLL_AUDIO_BYPASS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_BYPASS /;"	d
BM_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC /;"	d
BM_ANADIG_PLL_AUDIO_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_DENOM_B /;"	d
BM_ANADIG_PLL_AUDIO_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_DENOM_RSVD0 /;"	d
BM_ANADIG_PLL_AUDIO_DITHER_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_DITHER_ENABLE /;"	d
BM_ANADIG_PLL_AUDIO_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_DIV_SELECT /;"	d
BM_ANADIG_PLL_AUDIO_DOUBLE_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_DOUBLE_CP /;"	d
BM_ANADIG_PLL_AUDIO_DOUBLE_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_DOUBLE_LF /;"	d
BM_ANADIG_PLL_AUDIO_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_ENABLE /;"	d
BM_ANADIG_PLL_AUDIO_HALF_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_HALF_CP /;"	d
BM_ANADIG_PLL_AUDIO_HALF_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_HALF_LF /;"	d
BM_ANADIG_PLL_AUDIO_HOLD_RING_OFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_HOLD_RING_OFF /;"	d
BM_ANADIG_PLL_AUDIO_LOCK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_LOCK /;"	d
BM_ANADIG_PLL_AUDIO_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_NUM_A /;"	d
BM_ANADIG_PLL_AUDIO_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_NUM_RSVD0 /;"	d
BM_ANADIG_PLL_AUDIO_PFD_OFFSET_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_PFD_OFFSET_EN /;"	d
BM_ANADIG_PLL_AUDIO_POWERDOWN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_POWERDOWN /;"	d
BM_ANADIG_PLL_AUDIO_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_RSVD0 /;"	d
BM_ANADIG_PLL_AUDIO_SSC_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_SSC_EN /;"	d
BM_ANADIG_PLL_AUDIO_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_AUDIO_TEST_DIV_SELECT /;"	d
BM_ANADIG_PLL_ENET2_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET2_DIV_SELECT /;"	d
BM_ANADIG_PLL_ENET2_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET2_ENABLE /;"	d
BM_ANADIG_PLL_ENET_BYPASS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_BYPASS /;"	d
BM_ANADIG_PLL_ENET_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_BYPASS_CLK_SRC /;"	d
BM_ANADIG_PLL_ENET_DITHER_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_DITHER_ENABLE /;"	d
BM_ANADIG_PLL_ENET_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_DIV_SELECT /;"	d
BM_ANADIG_PLL_ENET_DOUBLE_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_DOUBLE_CP /;"	d
BM_ANADIG_PLL_ENET_DOUBLE_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_DOUBLE_LF /;"	d
BM_ANADIG_PLL_ENET_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_ENABLE /;"	d
BM_ANADIG_PLL_ENET_ENABLE_PCIE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_ENABLE_PCIE /;"	d
BM_ANADIG_PLL_ENET_ENABLE_SATA	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_ENABLE_SATA /;"	d
BM_ANADIG_PLL_ENET_HALF_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_HALF_CP /;"	d
BM_ANADIG_PLL_ENET_HALF_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_HALF_LF /;"	d
BM_ANADIG_PLL_ENET_HOLD_RING_OFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_HOLD_RING_OFF /;"	d
BM_ANADIG_PLL_ENET_LOCK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_LOCK /;"	d
BM_ANADIG_PLL_ENET_PFD_OFFSET_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_PFD_OFFSET_EN /;"	d
BM_ANADIG_PLL_ENET_POWERDOWN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_POWERDOWN /;"	d
BM_ANADIG_PLL_ENET_REF_25M_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_REF_25M_ENABLE /;"	d
BM_ANADIG_PLL_ENET_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_RSVD0 /;"	d
BM_ANADIG_PLL_ENET_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_ENET_RSVD1 /;"	d
BM_ANADIG_PLL_SYS_BYPASS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_BYPASS /;"	d
BM_ANADIG_PLL_SYS_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_BYPASS_CLK_SRC /;"	d
BM_ANADIG_PLL_SYS_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_DIV_SELECT /;"	d
BM_ANADIG_PLL_SYS_DOUBLE_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_DOUBLE_CP /;"	d
BM_ANADIG_PLL_SYS_DOUBLE_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_DOUBLE_LF /;"	d
BM_ANADIG_PLL_SYS_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_ENABLE /;"	d
BM_ANADIG_PLL_SYS_HALF_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_HALF_CP /;"	d
BM_ANADIG_PLL_SYS_HALF_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_HALF_LF /;"	d
BM_ANADIG_PLL_SYS_HOLD_RING_OFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_HOLD_RING_OFF /;"	d
BM_ANADIG_PLL_SYS_LOCK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_LOCK /;"	d
BM_ANADIG_PLL_SYS_LVDS_24MHZ_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_LVDS_24MHZ_SEL /;"	d
BM_ANADIG_PLL_SYS_LVDS_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_LVDS_SEL /;"	d
BM_ANADIG_PLL_SYS_PLL_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_PLL_SEL /;"	d
BM_ANADIG_PLL_SYS_POWERDOWN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_POWERDOWN /;"	d
BM_ANADIG_PLL_SYS_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_SYS_RSVD0 /;"	d
BM_ANADIG_PLL_VIDEO_BYPASS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_BYPASS /;"	d
BM_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC /;"	d
BM_ANADIG_PLL_VIDEO_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_DENOM_B /;"	d
BM_ANADIG_PLL_VIDEO_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_DENOM_RSVD0 /;"	d
BM_ANADIG_PLL_VIDEO_DITHER_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_DITHER_ENABLE /;"	d
BM_ANADIG_PLL_VIDEO_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_DIV_SELECT /;"	d
BM_ANADIG_PLL_VIDEO_DOUBLE_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_DOUBLE_CP /;"	d
BM_ANADIG_PLL_VIDEO_DOUBLE_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_DOUBLE_LF /;"	d
BM_ANADIG_PLL_VIDEO_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_ENABLE /;"	d
BM_ANADIG_PLL_VIDEO_HALF_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_HALF_CP /;"	d
BM_ANADIG_PLL_VIDEO_HALF_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_HALF_LF /;"	d
BM_ANADIG_PLL_VIDEO_HOLD_RING_OFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_HOLD_RING_OFF /;"	d
BM_ANADIG_PLL_VIDEO_LOCK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_LOCK /;"	d
BM_ANADIG_PLL_VIDEO_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_NUM_A /;"	d
BM_ANADIG_PLL_VIDEO_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_NUM_RSVD0 /;"	d
BM_ANADIG_PLL_VIDEO_PFD_OFFSET_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_PFD_OFFSET_EN /;"	d
BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT /;"	d
BM_ANADIG_PLL_VIDEO_POWERDOWN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_POWERDOWN /;"	d
BM_ANADIG_PLL_VIDEO_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_RSVD0 /;"	d
BM_ANADIG_PLL_VIDEO_SSC_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_PLL_VIDEO_SSC_EN /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_BYPASS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_BYPASS /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_CONTROL0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_CONTROL0 /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_DIV_SELECT /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_DOUBLE_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_DOUBLE_CP /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_DOUBLE_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_DOUBLE_LF /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_ENABLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_ENABLE /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_EN_USB_CLKS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_EN_USB_CLKS /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_HALF_CP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_HALF_CP /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_HALF_LF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_HALF_LF /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_HOLD_RING_OFF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_HOLD_RING_OFF /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_LOCK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_LOCK /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_POWER	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_POWER /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_RSVD0 /;"	d
BM_ANADIG_USB1_PLL_480_CTRL_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_ANADIG_USB1_PLL_480_CTRL_RSVD1 /;"	d
BM_COLD	arch/x86/include/asm/arch-quark/mrc.h	/^	BM_COLD = 1,	\/* full training *\/$/;"	e	enum:__anon4be506e00403
BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7	/;"	d	file:
BM_CTRL_ADDR	drivers/misc/mxc_ocotp.c	/^#define BM_CTRL_ADDR	/;"	d	file:
BM_CTRL_ADDR	drivers/misc/mxc_ocotp.c	/^#define BM_CTRL_ADDR /;"	d	file:
BM_CTRL_BUSY	drivers/misc/mxc_ocotp.c	/^#define BM_CTRL_BUSY	/;"	d	file:
BM_CTRL_ERROR	drivers/misc/mxc_ocotp.c	/^#define BM_CTRL_ERROR	/;"	d	file:
BM_CTRL_RELOAD	drivers/misc/mxc_ocotp.c	/^#define BM_CTRL_RELOAD /;"	d	file:
BM_CTRL_WR_UNLOCK	drivers/misc/mxc_ocotp.c	/^#define BM_CTRL_WR_UNLOCK	/;"	d	file:
BM_FAST	arch/x86/include/asm/arch-quark/mrc.h	/^	BM_FAST = 2,	\/* restore timing parameters *\/$/;"	e	enum:__anon4be506e00403
BM_PMU_MISC2_AUDIO_DIV_LSB	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_PMU_MISC2_AUDIO_DIV_LSB /;"	d
BM_PMU_MISC2_AUDIO_DIV_MSB	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BM_PMU_MISC2_AUDIO_DIV_MSB /;"	d
BM_READ_CTRL_READ_FUSE	drivers/misc/mxc_ocotp.c	/^#define BM_READ_CTRL_READ_FUSE	/;"	d	file:
BM_RLD	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  BM_RLD	/;"	d
BM_RLD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   BM_RLD	/;"	d
BM_S3	arch/x86/include/asm/arch-quark/mrc.h	/^	BM_S3   = 4,	\/* resume from S3 *\/$/;"	e	enum:__anon4be506e00403
BM_STATUS	include/radeon.h	/^#define BM_STATUS	/;"	d
BM_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  BM_STS	/;"	d
BM_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   BM_STS	/;"	d
BM_TIMING_FSOURCE	drivers/misc/mxc_ocotp.c	/^#define BM_TIMING_FSOURCE /;"	d	file:
BM_TIMING_PROG	drivers/misc/mxc_ocotp.c	/^#define BM_TIMING_PROG /;"	d	file:
BM_TIMING_RELAX	drivers/misc/mxc_ocotp.c	/^#define BM_TIMING_RELAX	/;"	d	file:
BM_TIMING_STROBE_PROG	drivers/misc/mxc_ocotp.c	/^#define BM_TIMING_STROBE_PROG	/;"	d	file:
BM_TIMING_STROBE_READ	drivers/misc/mxc_ocotp.c	/^#define BM_TIMING_STROBE_READ	/;"	d	file:
BM_UNKNOWN	arch/x86/include/asm/arch-quark/mrc.h	/^	BM_UNKNOWN,$/;"	e	enum:__anon4be506e00403
BM_WARM	arch/x86/include/asm/arch-quark/mrc.h	/^	BM_WARM = 8$/;"	e	enum:__anon4be506e00403
BOARD	config.mk	/^BOARD := $(CONFIG_SYS_BOARD:"%"=%)$/;"	m
BOARDDIR	config.mk	/^BOARDDIR = $(BOARD)$/;"	m
BOARDDIR	config.mk	/^BOARDDIR = $(VENDOR)\/$(BOARD)$/;"	m
BOARD_AP	board/mpl/mip405/mip405.h	/^#define BOARD_AP	/;"	d
BOARD_ARCHES	board/amcc/canyonlands/canyonlands.c	/^#define BOARD_ARCHES	/;"	d	file:
BOARD_BACK_LIGHT	include/configs/pxm2.h	/^#define BOARD_BACK_LIGHT	/;"	d
BOARD_BEM	board/mpl/mip405/mip405.h	/^#define BOARD_BEM	/;"	d
BOARD_BME	board/mpl/mip405/mip405.h	/^#define BOARD_BME	/;"	d
BOARD_BS	board/mpl/mip405/mip405.h	/^#define BOARD_BS	/;"	d
BOARD_BU	board/mpl/mip405/mip405.h	/^#define BOARD_BU	/;"	d
BOARD_BW	board/mpl/mip405/mip405.h	/^#define BOARD_BW	/;"	d
BOARD_CANYONLANDS_PCIE	board/amcc/canyonlands/canyonlands.c	/^#define BOARD_CANYONLANDS_PCIE	/;"	d	file:
BOARD_CANYONLANDS_SATA	board/amcc/canyonlands/canyonlands.c	/^#define BOARD_CANYONLANDS_SATA	/;"	d	file:
BOARD_CR	board/mpl/mip405/mip405.h	/^#define BOARD_CR	/;"	d
BOARD_CSN	board/mpl/mip405/mip405.h	/^#define BOARD_CSN	/;"	d
BOARD_DFU_BUTTON_GPIO	include/configs/draco.h	/^#define BOARD_DFU_BUTTON_GPIO	/;"	d
BOARD_DFU_BUTTON_GPIO	include/configs/etamin.h	/^#define BOARD_DFU_BUTTON_GPIO	/;"	d
BOARD_DFU_BUTTON_GPIO	include/configs/pxm2.h	/^#define BOARD_DFU_BUTTON_GPIO	/;"	d
BOARD_DFU_BUTTON_GPIO	include/configs/rastaban.h	/^#define BOARD_DFU_BUTTON_GPIO	/;"	d
BOARD_DFU_BUTTON_GPIO	include/configs/thuban.h	/^#define BOARD_DFU_BUTTON_GPIO	/;"	d
BOARD_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^# define BOARD_ENV_SETTINGS$/;"	d
BOARD_EXTRA_ENV_SETTINGS	include/configs/cardhu.h	/^#define BOARD_EXTRA_ENV_SETTINGS /;"	d
BOARD_EXTRA_ENV_SETTINGS	include/configs/colibri_t20.h	/^#define BOARD_EXTRA_ENV_SETTINGS /;"	d
BOARD_EXTRA_ENV_SETTINGS	include/configs/tegra-common-post.h	/^#define BOARD_EXTRA_ENV_SETTINGS$/;"	d
BOARD_GLACIER	board/amcc/canyonlands/canyonlands.c	/^#define BOARD_GLACIER	/;"	d	file:
BOARD_GPP_OUT_ENA_LOW	board/solidrun/clearfog/clearfog.c	/^#define BOARD_GPP_OUT_ENA_LOW	/;"	d	file:
BOARD_GPP_OUT_ENA_MID	board/solidrun/clearfog/clearfog.c	/^#define BOARD_GPP_OUT_ENA_MID	/;"	d	file:
BOARD_GPP_OUT_VAL_LOW	board/solidrun/clearfog/clearfog.c	/^#define BOARD_GPP_OUT_VAL_LOW	/;"	d	file:
BOARD_GPP_OUT_VAL_MID	board/solidrun/clearfog/clearfog.c	/^#define BOARD_GPP_OUT_VAL_MID	/;"	d	file:
BOARD_GPP_POL_LOW	board/solidrun/clearfog/clearfog.c	/^#define BOARD_GPP_POL_LOW	/;"	d	file:
BOARD_GPP_POL_MID	board/solidrun/clearfog/clearfog.c	/^#define BOARD_GPP_POL_MID	/;"	d	file:
BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define BOARD_ID_BASE	/;"	d
BOARD_ID_BASE	board/Synology/ds109/ds109.h	/^#define BOARD_ID_BASE /;"	d
BOARD_ID_FAMILY_K7	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define BOARD_ID_FAMILY_K7 /;"	d	file:
BOARD_ID_FAMILY_MASK	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define BOARD_ID_FAMILY_MASK /;"	d	file:
BOARD_ID_FAMILY_V5	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define BOARD_ID_FAMILY_V5 /;"	d	file:
BOARD_ID_GPIO	board/logicpd/omap3som/omap3logic.c	/^#define BOARD_ID_GPIO	/;"	d	file:
BOARD_ID_REG	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define BOARD_ID_REG	/;"	d	file:
BOARD_ID_STR	board/bosch/shc/board.h	/^#  define BOARD_ID_STR /;"	d
BOARD_ID_STR	board/bosch/shc/board.h	/^# define BOARD_ID_STR /;"	d
BOARD_INFO_CPU_TRACE_MODE	board/amcc/yucca/yucca.h	/^#define BOARD_INFO_CPU_TRACE_MODE	/;"	d
BOARD_INFO_UART1_CTS_RTS_MODE	board/amcc/yucca/yucca.h	/^#define BOARD_INFO_UART1_CTS_RTS_MODE	/;"	d
BOARD_INFO_UART2_IN_SERVICE_MODE	board/amcc/yucca/yucca.h	/^#define BOARD_INFO_UART2_IN_SERVICE_MODE	/;"	d
BOARD_IS_MARSBOARD	board/embest/mx6boards/mx6boards.c	/^#define BOARD_IS_MARSBOARD	/;"	d	file:
BOARD_IS_RIOTBOARD	board/embest/mx6boards/mx6boards.c	/^#define BOARD_IS_RIOTBOARD	/;"	d	file:
BOARD_LATE_INIT	include/configs/armadillo-800eva.h	/^#define BOARD_LATE_INIT$/;"	d
BOARD_LCD_POWER	include/configs/pxm2.h	/^#define BOARD_LCD_POWER	/;"	d
BOARD_LCD_RESET	include/configs/rut.h	/^#define BOARD_LCD_RESET	/;"	d
BOARD_MAGIC	board/birdland/bav335x/board.h	/^#define BOARD_MAGIC /;"	d
BOARD_NAME	board/el/el6x/el6x.c	/^#define BOARD_NAME /;"	d	file:
BOARD_NAME	board/micronas/vct/vct.c	/^#define BOARD_NAME	/;"	d	file:
BOARD_NAME	board/mpl/mip405/mip405.c	/^#define BOARD_NAME	/;"	d	file:
BOARD_NAME	board/mpl/pati/pati.c	/^#define BOARD_NAME	/;"	d	file:
BOARD_NAME_ADD	board/micronas/vct/vct.c	/^#define BOARD_NAME_ADD	/;"	d	file:
BOARD_OEN	board/mpl/mip405/mip405.h	/^#define BOARD_OEN	/;"	d
BOARD_OPTION_NOT_SELECTED	board/amcc/yucca/yucca.h	/^#define BOARD_OPTION_NOT_SELECTED	/;"	d
BOARD_OPTION_SELECTED	board/amcc/yucca/yucca.h	/^#define BOARD_OPTION_SELECTED	/;"	d
BOARD_PEN	board/mpl/mip405/mip405.h	/^#define BOARD_PEN	/;"	d
BOARD_POST_CRC32_END	include/configs/o2d.h	/^#define BOARD_POST_CRC32_END	/;"	d
BOARD_POST_CRC32_END	include/configs/o2d300.h	/^#define BOARD_POST_CRC32_END	/;"	d
BOARD_POST_CRC32_END	include/configs/o2dnt2.h	/^#define BOARD_POST_CRC32_END	/;"	d
BOARD_POST_CRC32_END	include/configs/o2i.h	/^#define BOARD_POST_CRC32_END	/;"	d
BOARD_POST_CRC32_END	include/configs/o2mnt.h	/^#define BOARD_POST_CRC32_END	/;"	d
BOARD_POST_CRC32_END	include/configs/o3dnt.h	/^#define BOARD_POST_CRC32_END	/;"	d
BOARD_RE	board/mpl/mip405/mip405.h	/^#define BOARD_RE	/;"	d
BOARD_REV_1_0	arch/arm/include/asm/arch-imx/cpu.h	/^#define BOARD_REV_1_0 /;"	d
BOARD_REV_1_0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define BOARD_REV_1_0	/;"	d
BOARD_REV_2_0	arch/arm/include/asm/arch-imx/cpu.h	/^#define BOARD_REV_2_0 /;"	d
BOARD_REV_2_0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define BOARD_REV_2_0	/;"	d
BOARD_REV_A	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define BOARD_REV_A /;"	d	file:
BOARD_REV_B	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define BOARD_REV_B /;"	d	file:
BOARD_REV_OFFSET	board/compulab/common/eeprom.c	/^#define BOARD_REV_OFFSET	/;"	d	file:
BOARD_REV_OFFSET_LEGACY	board/compulab/common/eeprom.c	/^#define BOARD_REV_OFFSET_LEGACY	/;"	d	file:
BOARD_REV_SIZE	board/compulab/common/eeprom.c	/^#define BOARD_REV_SIZE	/;"	d	file:
BOARD_ROMSIZE_KB_1024	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_1024$/;"	c	menu:x86 architecture
BOARD_ROMSIZE_KB_16384	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_16384$/;"	c	menu:x86 architecture
BOARD_ROMSIZE_KB_2048	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_2048$/;"	c	menu:x86 architecture
BOARD_ROMSIZE_KB_4096	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_4096$/;"	c	menu:x86 architecture
BOARD_ROMSIZE_KB_512	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_512$/;"	c	menu:x86 architecture
BOARD_ROMSIZE_KB_8192	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_8192$/;"	c	menu:x86 architecture
BOARD_SDRAM_SIZE	board/cadence/xtfpga/Kconfig	/^config BOARD_SDRAM_SIZE$/;"	c
BOARD_SERIAL_OFFSET	board/compulab/common/eeprom.c	/^#define BOARD_SERIAL_OFFSET	/;"	d	file:
BOARD_SERIAL_OFFSET_LEGACY	board/compulab/common/eeprom.c	/^#define BOARD_SERIAL_OFFSET_LEGACY	/;"	d	file:
BOARD_SIZE_CHECK	Makefile	/^BOARD_SIZE_CHECK = \\$/;"	m
BOARD_SIZE_CHECK	Makefile	/^BOARD_SIZE_CHECK =$/;"	m
BOARD_SOR	board/mpl/mip405/mip405.h	/^#define BOARD_SOR	/;"	d
BOARD_TH	board/mpl/mip405/mip405.h	/^#define BOARD_TH	/;"	d
BOARD_TOUCH_POWER	include/configs/pxm2.h	/^#define BOARD_TOUCH_POWER	/;"	d
BOARD_TPLINK_WDR4300	arch/mips/mach-ath79/Kconfig	/^config BOARD_TPLINK_WDR4300$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
BOARD_TWE	board/mpl/mip405/mip405.h	/^#define BOARD_TWE	/;"	d
BOARD_TYPE	board/amcc/canyonlands/Kconfig	/^choice BOARD_TYPE$/;"	C
BOARD_TYPE_CRB_DESKTOP	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_CRB_DESKTOP,		\/* CRB Desktop *\/$/;"	e	enum:board_type
BOARD_TYPE_CRB_EMBDEDDED	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_CRB_EMBDEDDED,	\/* CRB Embedded *\/$/;"	e	enum:board_type
BOARD_TYPE_CRB_MOBILE	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_CRB_MOBILE = 0,	\/* CRB Mobile *\/$/;"	e	enum:board_type
BOARD_TYPE_ULT	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_ULT,			\/* ULT *\/$/;"	e	enum:board_type
BOARD_TYPE_UNKNOWN	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_UNKNOWN,$/;"	e	enum:board_type
BOARD_TYPE_USER1	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_USER1,		\/* SV mobile *\/$/;"	e	enum:board_type
BOARD_TYPE_USER2	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_USER2,		\/* SV desktop *\/$/;"	e	enum:board_type
BOARD_TYPE_USER3	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	BOARD_TYPE_USER3,		\/* SV server *\/$/;"	e	enum:board_type
BOARD_UART_CLOCK	board/amcc/yucca/yucca.h	/^#define BOARD_UART_CLOCK	/;"	d
BOARD_VER_OFFSET	arch/arm/include/asm/arch-imx/cpu.h	/^#define BOARD_VER_OFFSET /;"	d
BOARD_WBF	board/mpl/mip405/mip405.h	/^#define BOARD_WBF	/;"	d
BOARD_WBN	board/mpl/mip405/mip405.h	/^#define BOARD_WBN	/;"	d
BOCO	board/keymile/km_arm/km_arm.c	/^#define BOCO	/;"	d	file:
BOCO2_ID	board/keymile/km_arm/fpga_config.c	/^#define BOCO2_ID	/;"	d	file:
BOCO_ADDR	board/keymile/km_arm/fpga_config.c	/^#define BOCO_ADDR	/;"	d	file:
BOF	include/sym53c8xx.h	/^	#define   BOF /;"	d
BOFFTEST	drivers/net/davinci_emac.h	/^	dv_reg		BOFFTEST;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
BOL	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
BOLD	tools/patman/terminal.py	/^    BOLD = -1$/;"	v	class:Color
BOLD_START	tools/patman/terminal.py	/^    BOLD_START = '\\033[1m'$/;"	v	class:Color
BOLMT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	BOLMT	/;"	d
BOLMT_1	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	BOLMT_1	/;"	d
BOLMT_10	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	BOLMT_10	/;"	d
BOLMT_4	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	BOLMT_4	/;"	d
BOLMT_8	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	BOLMT_8	/;"	d
BOOKE_PAGESZ_128GB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_128GB	/;"	d
BOOKE_PAGESZ_128K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_128K	/;"	d
BOOKE_PAGESZ_128M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_128M	/;"	d
BOOKE_PAGESZ_16GB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_16GB	/;"	d
BOOKE_PAGESZ_16K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_16K	/;"	d
BOOKE_PAGESZ_16M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_16M	/;"	d
BOOKE_PAGESZ_1G	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_1G	/;"	d
BOOKE_PAGESZ_1K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_1K	/;"	d
BOOKE_PAGESZ_1M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_1M	/;"	d
BOOKE_PAGESZ_1TB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_1TB	/;"	d
BOOKE_PAGESZ_256GB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_256GB	/;"	d
BOOKE_PAGESZ_256K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_256K	/;"	d
BOOKE_PAGESZ_256M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_256M	/;"	d
BOOKE_PAGESZ_2G	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_2G	/;"	d
BOOKE_PAGESZ_2K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_2K	/;"	d
BOOKE_PAGESZ_2M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_2M	/;"	d
BOOKE_PAGESZ_2TB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_2TB	/;"	d
BOOKE_PAGESZ_32GB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_32GB	/;"	d
BOOKE_PAGESZ_32K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_32K	/;"	d
BOOKE_PAGESZ_32M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_32M	/;"	d
BOOKE_PAGESZ_4G	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_4G	/;"	d
BOOKE_PAGESZ_4K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_4K	/;"	d
BOOKE_PAGESZ_4M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_4M	/;"	d
BOOKE_PAGESZ_512GB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_512GB	/;"	d
BOOKE_PAGESZ_512K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_512K	/;"	d
BOOKE_PAGESZ_512M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_512M	/;"	d
BOOKE_PAGESZ_64GB	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_64GB	/;"	d
BOOKE_PAGESZ_64K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_64K	/;"	d
BOOKE_PAGESZ_64M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_64M	/;"	d
BOOKE_PAGESZ_8G	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_8G	/;"	d
BOOKE_PAGESZ_8K	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_8K	/;"	d
BOOKE_PAGESZ_8M	arch/powerpc/include/asm/mmu.h	/^#define BOOKE_PAGESZ_8M	/;"	d
BOOKS	doc/DocBook/Makefile	/^BOOKS := $(addprefix $(obj)\/,$(DOCBOOKS))$/;"	m
BOOL	tools/buildman/kconfiglib.py	/^UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6)$/;"	v
BOOL_STR	tools/buildman/kconfiglib.py	/^BOOL_STR = {False: "false", True: "true"}$/;"	v
BOOT0_MAGIC	arch/arm/include/asm/arch-sunxi/spl.h	/^#define BOOT0_MAGIC	/;"	d
BOOT0_MAGIC	arch/arm/include/asm/arch/spl.h	/^#define BOOT0_MAGIC	/;"	d
BOOTCMD_SUNXI_COMPAT	include/configs/sunxi-common.h	/^#define BOOTCMD_SUNXI_COMPAT /;"	d
BOOTCMD_SUNXI_COMPAT	include/configs/sunxi-common.h	/^#define BOOTCMD_SUNXI_COMPAT$/;"	d
BOOTCOUNT_ADDR	include/configs/km/km_arm.h	/^#define BOOTCOUNT_ADDR /;"	d
BOOTCOUNT_ADDR	include/configs/theadorable.h	/^#define BOOTCOUNT_ADDR	/;"	d
BOOTCOUNT_MAGIC	include/common.h	/^#define BOOTCOUNT_MAGIC	/;"	d
BOOTDELAY	common/Kconfig	/^config BOOTDELAY$/;"	c
BOOTEFI_NAME	include/config_distro_bootcmd.h	/^#define BOOTEFI_NAME /;"	d
BOOTENV	include/config_distro_bootcmd.h	/^#define BOOTENV /;"	d
BOOTENV	include/configs/tegra-common-post.h	/^#define BOOTENV$/;"	d
BOOTENV_BOOT_TARGETS	include/config_distro_bootcmd.h	/^#define BOOTENV_BOOT_TARGETS /;"	d
BOOTENV_DEV	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV(/;"	d
BOOTENV_DEV_BLKDEV	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_BLKDEV(/;"	d
BOOTENV_DEV_DHCP	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_DHCP /;"	d
BOOTENV_DEV_DHCP	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_DHCP(/;"	d
BOOTENV_DEV_FEL	include/configs/sunxi-common.h	/^#define BOOTENV_DEV_FEL(/;"	d
BOOTENV_DEV_HOST	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_HOST	/;"	d
BOOTENV_DEV_HOST	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_HOST /;"	d
BOOTENV_DEV_IDE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_IDE	/;"	d
BOOTENV_DEV_IDE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_IDE /;"	d
BOOTENV_DEV_LEGACY_MMC	include/configs/am335x_evm.h	/^#define BOOTENV_DEV_LEGACY_MMC(/;"	d
BOOTENV_DEV_LEGACY_MMC	include/configs/ti_omap4_common.h	/^#define BOOTENV_DEV_LEGACY_MMC(/;"	d
BOOTENV_DEV_MMC	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_MMC	/;"	d
BOOTENV_DEV_MMC	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_MMC /;"	d
BOOTENV_DEV_NAME	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME(/;"	d
BOOTENV_DEV_NAME_BLKDEV	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_BLKDEV(/;"	d
BOOTENV_DEV_NAME_DHCP	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_DHCP /;"	d
BOOTENV_DEV_NAME_DHCP	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_DHCP(/;"	d
BOOTENV_DEV_NAME_FEL	include/configs/sunxi-common.h	/^#define BOOTENV_DEV_NAME_FEL(/;"	d
BOOTENV_DEV_NAME_HOST	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_HOST	/;"	d
BOOTENV_DEV_NAME_HOST	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_HOST /;"	d
BOOTENV_DEV_NAME_IDE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_IDE	/;"	d
BOOTENV_DEV_NAME_IDE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_IDE /;"	d
BOOTENV_DEV_NAME_LEGACY_MMC	include/configs/am335x_evm.h	/^#define BOOTENV_DEV_NAME_LEGACY_MMC(/;"	d
BOOTENV_DEV_NAME_LEGACY_MMC	include/configs/ti_omap4_common.h	/^#define BOOTENV_DEV_NAME_LEGACY_MMC(/;"	d
BOOTENV_DEV_NAME_MMC	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_MMC	/;"	d
BOOTENV_DEV_NAME_MMC	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_MMC /;"	d
BOOTENV_DEV_NAME_NAND	include/configs/am335x_evm.h	/^#define BOOTENV_DEV_NAME_NAND(/;"	d
BOOTENV_DEV_NAME_NAND	include/configs/ti_omap4_common.h	/^#define BOOTENV_DEV_NAME_NAND(/;"	d
BOOTENV_DEV_NAME_PXE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_PXE /;"	d
BOOTENV_DEV_NAME_PXE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_PXE(/;"	d
BOOTENV_DEV_NAME_SATA	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_SATA	/;"	d
BOOTENV_DEV_NAME_SATA	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_SATA /;"	d
BOOTENV_DEV_NAME_SCSI	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_SCSI	/;"	d
BOOTENV_DEV_NAME_SCSI	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_SCSI /;"	d
BOOTENV_DEV_NAME_UBIFS	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_UBIFS	/;"	d
BOOTENV_DEV_NAME_UBIFS	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_UBIFS /;"	d
BOOTENV_DEV_NAME_USB	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_USB	/;"	d
BOOTENV_DEV_NAME_USB	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_NAME_USB /;"	d
BOOTENV_DEV_NAND	include/configs/am335x_evm.h	/^#define BOOTENV_DEV_NAND(/;"	d
BOOTENV_DEV_PXE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_PXE /;"	d
BOOTENV_DEV_PXE	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_PXE(/;"	d
BOOTENV_DEV_SATA	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_SATA	/;"	d
BOOTENV_DEV_SATA	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_SATA /;"	d
BOOTENV_DEV_SCSI	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_SCSI	/;"	d
BOOTENV_DEV_SCSI	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_SCSI /;"	d
BOOTENV_DEV_UBIFS	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_UBIFS	/;"	d
BOOTENV_DEV_UBIFS	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_UBIFS /;"	d
BOOTENV_DEV_USB	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_USB	/;"	d
BOOTENV_DEV_USB	include/config_distro_bootcmd.h	/^#define BOOTENV_DEV_USB /;"	d
BOOTENV_EFI_PXE_ARCH	include/config_distro_bootcmd.h	/^#define BOOTENV_EFI_PXE_ARCH /;"	d
BOOTENV_EFI_PXE_VCI	include/config_distro_bootcmd.h	/^#define BOOTENV_EFI_PXE_VCI /;"	d
BOOTENV_EFI_RUN_DHCP	include/config_distro_bootcmd.h	/^#define BOOTENV_EFI_RUN_DHCP /;"	d
BOOTENV_EFI_RUN_DHCP	include/config_distro_bootcmd.h	/^#define BOOTENV_EFI_RUN_DHCP$/;"	d
BOOTENV_EFI_SET_FDTFILE_FALLBACK	include/config_distro_bootcmd.h	/^#define BOOTENV_EFI_SET_FDTFILE_FALLBACK /;"	d
BOOTENV_EFI_SET_FDTFILE_FALLBACK	include/config_distro_bootcmd.h	/^#define BOOTENV_EFI_SET_FDTFILE_FALLBACK$/;"	d
BOOTENV_RUN_NET_PCI_ENUM	include/config_distro_bootcmd.h	/^#define BOOTENV_RUN_NET_PCI_ENUM /;"	d
BOOTENV_RUN_NET_PCI_ENUM	include/config_distro_bootcmd.h	/^#define BOOTENV_RUN_NET_PCI_ENUM$/;"	d
BOOTENV_RUN_NET_USB_START	include/config_distro_bootcmd.h	/^#define BOOTENV_RUN_NET_USB_START /;"	d
BOOTENV_RUN_NET_USB_START	include/config_distro_bootcmd.h	/^#define BOOTENV_RUN_NET_USB_START$/;"	d
BOOTENV_RUN_SCSI_INIT	include/config_distro_bootcmd.h	/^#define BOOTENV_RUN_SCSI_INIT /;"	d
BOOTENV_RUN_SCSI_INIT	include/config_distro_bootcmd.h	/^#define BOOTENV_RUN_SCSI_INIT$/;"	d
BOOTENV_SET_SCSI_NEED_INIT	include/config_distro_bootcmd.h	/^#define BOOTENV_SET_SCSI_NEED_INIT /;"	d
BOOTENV_SET_SCSI_NEED_INIT	include/config_distro_bootcmd.h	/^#define BOOTENV_SET_SCSI_NEED_INIT$/;"	d
BOOTENV_SHARED_BLKDEV	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_BLKDEV(/;"	d
BOOTENV_SHARED_BLKDEV_BODY	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_BLKDEV_BODY(/;"	d
BOOTENV_SHARED_EFI	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_EFI /;"	d
BOOTENV_SHARED_EFI	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_EFI$/;"	d
BOOTENV_SHARED_HOST	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_HOST	/;"	d
BOOTENV_SHARED_HOST	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_HOST$/;"	d
BOOTENV_SHARED_IDE	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_IDE	/;"	d
BOOTENV_SHARED_IDE	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_IDE$/;"	d
BOOTENV_SHARED_MMC	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_MMC	/;"	d
BOOTENV_SHARED_MMC	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_MMC$/;"	d
BOOTENV_SHARED_PCI	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_PCI /;"	d
BOOTENV_SHARED_PCI	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_PCI$/;"	d
BOOTENV_SHARED_SATA	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_SATA	/;"	d
BOOTENV_SHARED_SATA	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_SATA$/;"	d
BOOTENV_SHARED_SCSI	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_SCSI /;"	d
BOOTENV_SHARED_SCSI	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_SCSI$/;"	d
BOOTENV_SHARED_UBIFS	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_UBIFS /;"	d
BOOTENV_SHARED_UBIFS	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_UBIFS$/;"	d
BOOTENV_SHARED_USB	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_USB /;"	d
BOOTENV_SHARED_USB	include/config_distro_bootcmd.h	/^#define BOOTENV_SHARED_USB$/;"	d
BOOTFLASH_START	include/configs/km/km83xx-common.h	/^#define BOOTFLASH_START	/;"	d
BOOTFLASH_START	include/configs/km/km_arm.h	/^#define BOOTFLASH_START	/;"	d
BOOTFLASH_START	include/configs/km82xx.h	/^#define BOOTFLASH_START	/;"	d
BOOTMODE_MAGIC	post/post.c	/^#define BOOTMODE_MAGIC	/;"	d	file:
BOOTM_ENABLE_CMDLINE_TAG	arch/arm/include/asm/bootm.h	/^ #define BOOTM_ENABLE_CMDLINE_TAG	/;"	d
BOOTM_ENABLE_INITRD_TAG	arch/arm/include/asm/bootm.h	/^ #define BOOTM_ENABLE_INITRD_TAG	/;"	d
BOOTM_ENABLE_MEMORY_TAGS	arch/arm/include/asm/bootm.h	/^# define BOOTM_ENABLE_MEMORY_TAGS	/;"	d
BOOTM_ENABLE_REVISION_TAG	arch/arm/include/asm/bootm.h	/^ #define BOOTM_ENABLE_REVISION_TAG	/;"	d
BOOTM_ENABLE_SERIAL_TAG	arch/arm/include/asm/bootm.h	/^ #define BOOTM_ENABLE_SERIAL_TAG	/;"	d
BOOTM_ENABLE_TAGS	arch/arm/include/asm/bootm.h	/^# define BOOTM_ENABLE_TAGS	/;"	d
BOOTM_ERR_OVERLAP	include/bootm.h	/^#define BOOTM_ERR_OVERLAP	/;"	d
BOOTM_ERR_RESET	include/bootm.h	/^#define BOOTM_ERR_RESET	/;"	d
BOOTM_ERR_UNIMPLEMENTED	include/bootm.h	/^#define BOOTM_ERR_UNIMPLEMENTED	/;"	d
BOOTM_STATE_FDT	include/image.h	/^#define	BOOTM_STATE_FDT	/;"	d
BOOTM_STATE_FINDOS	include/image.h	/^#define	BOOTM_STATE_FINDOS	/;"	d
BOOTM_STATE_FINDOTHER	include/image.h	/^#define	BOOTM_STATE_FINDOTHER	/;"	d
BOOTM_STATE_LOADOS	include/image.h	/^#define	BOOTM_STATE_LOADOS	/;"	d
BOOTM_STATE_OS_BD_T	include/image.h	/^#define	BOOTM_STATE_OS_BD_T	/;"	d
BOOTM_STATE_OS_CMDLINE	include/image.h	/^#define	BOOTM_STATE_OS_CMDLINE	/;"	d
BOOTM_STATE_OS_FAKE_GO	include/image.h	/^#define	BOOTM_STATE_OS_FAKE_GO	/;"	d
BOOTM_STATE_OS_GO	include/image.h	/^#define	BOOTM_STATE_OS_GO	/;"	d
BOOTM_STATE_OS_PREP	include/image.h	/^#define	BOOTM_STATE_OS_PREP	/;"	d
BOOTM_STATE_RAMDISK	include/image.h	/^#define	BOOTM_STATE_RAMDISK	/;"	d
BOOTM_STATE_START	include/image.h	/^#define	BOOTM_STATE_START	/;"	d
BOOTP	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
BOOTP_HDR_SIZE	net/bootp.h	/^#define BOOTP_HDR_SIZE	/;"	d
BOOTP_PXE_CLIENTARCH	net/Kconfig	/^config BOOTP_PXE_CLIENTARCH$/;"	c
BOOTP_VCI_STRING	net/Kconfig	/^config BOOTP_VCI_STRING$/;"	c
BOOTP_VENDOR_MAGIC	net/bootp.c	/^#define BOOTP_VENDOR_MAGIC	/;"	d	file:
BOOTROM_CALLED_FUNC_ATTR	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^# define BOOTROM_CALLED_FUNC_ATTR /;"	d
BOOTROM_CALLED_FUNC_ATTR	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^# define BOOTROM_CALLED_FUNC_ATTR$/;"	d
BOOTROM_CAPS_ADI_BOOT_STRUCTS	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BOOTROM_CAPS_ADI_BOOT_STRUCTS /;"	d
BOOTROM_ECC	drivers/mtd/nand/bfin_nand.c	/^# define BOOTROM_ECC /;"	d	file:
BOOTROM_ERR_MODE_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOTROM_ERR_MODE_MASK	/;"	d
BOOTROM_ERR_MODE_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOTROM_ERR_MODE_OFFS	/;"	d
BOOTROM_ERR_MODE_UART	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOTROM_ERR_MODE_UART	/;"	d
BOOTROM_FOLLOWS_C_ABI	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define BOOTROM_FOLLOWS_C_ABI /;"	d
BOOTROM_SUPPORTS_SPI_FAST_READ	arch/blackfin/cpu/initcode.c	/^# define BOOTROM_SUPPORTS_SPI_FAST_READ /;"	d	file:
BOOTSTAGE	common/Kconfig	/^config BOOTSTAGE$/;"	c	menu:Boot timing
BOOTSTAGEF_ALLOC	include/bootstage.h	/^	BOOTSTAGEF_ALLOC	= 1 << 1,	\/* Allocate an id *\/$/;"	e	enum:bootstage_flags
BOOTSTAGEF_ERROR	include/bootstage.h	/^	BOOTSTAGEF_ERROR	= 1 << 0,	\/* Error record *\/$/;"	e	enum:bootstage_flags
BOOTSTAGE_DIGITS	common/bootstage.c	/^	BOOTSTAGE_DIGITS	= 9,$/;"	e	enum:__anona60889960103	file:
BOOTSTAGE_FDT	common/Kconfig	/^config BOOTSTAGE_FDT$/;"	c	menu:Boot timing
BOOTSTAGE_ID_ACCUM_DECOMP	include/bootstage.h	/^	BOOTSTAGE_ID_ACCUM_DECOMP,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_ACCUM_LCD	include/bootstage.h	/^	BOOTSTAGE_ID_ACCUM_LCD,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_ACCUM_SCSI	include/bootstage.h	/^	BOOTSTAGE_ID_ACCUM_SCSI,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_ACCUM_SPI	include/bootstage.h	/^	BOOTSTAGE_ID_ACCUM_SPI,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_ALLOC	include/bootstage.h	/^	BOOTSTAGE_ID_ALLOC,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_AWAKE	include/bootstage.h	/^	BOOTSTAGE_ID_AWAKE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_DONE	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_DONE,	\/* Board init done, off to main loop *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_ENV	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_ENV,		\/* Environment is relocated & ready *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_FLASH	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_FLASH,	\/* We have configured flash banks *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_FLASH_37	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_FLASH_37,	\/* In case you didn't hear... *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_GLOBAL_DATA	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_GLOBAL_DATA,	\/* Global data is set up *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_INIT	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_INIT,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_INIT_DONE	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_INIT_DONE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_INIT_R	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_INIT_R,	\/* We have relocated *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_INIT_SEQ	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_INIT_SEQ,	\/* We completed the init sequence *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_INTERRUPTS	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_INTERRUPTS,	\/* Exceptions \/ interrupts ready *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOARD_PCI	include/bootstage.h	/^	BOOTSTAGE_ID_BOARD_PCI,		\/* PCI is up *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOOTM_HANDOFF	include/bootstage.h	/^	BOOTSTAGE_ID_BOOTM_HANDOFF,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOOTM_START	include/bootstage.h	/^	BOOTSTAGE_ID_BOOTM_START,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOOTP_START	include/bootstage.h	/^	BOOTSTAGE_ID_BOOTP_START,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOOTP_STOP	include/bootstage.h	/^	BOOTSTAGE_ID_BOOTP_STOP,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_BOOT_OS_RETURNED	include/bootstage.h	/^	BOOTSTAGE_ID_BOOT_OS_RETURNED,	\/* Tried to boot OS, but it returned *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_ARCH	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_ARCH,	\/* Checking architecture *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_BOOT_OS	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_BOOT_OS,	\/* Calling OS-specific boot function *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_CHECKSUM	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_CHECKSUM,	\/* Checking image checksum *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_HEADER	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_HEADER,	\/* Checking image header *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_IMAGETYPE	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_IMAGETYPE = 5,\/* Checking image type *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_MAGIC	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_MAGIC,	\/* Checking image magic *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CHECK_RAMDISK	include/bootstage.h	/^	BOOTSTAGE_ID_CHECK_RAMDISK = 9,	\/* Checking ram disk *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_COPY_RAMDISK	include/bootstage.h	/^	BOOTSTAGE_ID_COPY_RAMDISK = 12,	\/* Copying ram disk into place *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_COUNT	include/bootstage.h	/^	BOOTSTAGE_ID_COUNT = BOOTSTAGE_ID_USER + CONFIG_BOOTSTAGE_USER_COUNT,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_CPU_AWAKE	include/bootstage.h	/^	BOOTSTAGE_ID_CPU_AWAKE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_DECOMP_IMAGE	include/bootstage.h	/^	BOOTSTAGE_ID_DECOMP_IMAGE,	\/* Decompressing image *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_DECOMP_UNIMPL	include/bootstage.h	/^	BOOTSTAGE_ID_DECOMP_UNIMPL = 7,	\/* Odd decompression algorithm *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_ETH_START	include/bootstage.h	/^	BOOTSTAGE_ID_ETH_START,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_COMPRESSION	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_COMPRESSION,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_CONFIG	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_CONFIG = 110,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_FDT_START	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_FDT_START = 90,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_KERNEL_INFO	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_KERNEL_INFO,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_KERNEL_START	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_KERNEL_START = 100,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_LOADABLE_START	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_LOADABLE_START = 160,	\/* for Loadable Images *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_LOADADDR	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_LOADADDR,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_OS	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_OS,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_RD_START	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_RD_START = 120,	\/* Ramdisk stages *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_SETUP_START	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_SETUP_START = 130,	\/* x86 setup stages *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FIT_TYPE	include/bootstage.h	/^	BOOTSTAGE_ID_FIT_TYPE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_FPGA_INIT	include/bootstage.h	/^	BOOTSTAGE_ID_FPGA_INIT,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_ADDR	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_ADDR,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_BOOT_DEVICE	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_BOOT_DEVICE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_CHECKSUM	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_CHECKSUM,	\/* 50 *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_FIT_READ	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_FIT_READ = 140,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_FIT_READ_OK	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_FIT_READ_OK,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_FORMAT	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_FORMAT,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_PART	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_PART,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_PART_INFO	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_PART_INFO,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_PART_READ	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_PART_READ,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_PART_TYPE	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_PART_TYPE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_READ	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_READ,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_START	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_START = 41,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_IDE_TYPE	include/bootstage.h	/^	BOOTSTAGE_ID_IDE_TYPE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_KERNEL_LOADED	include/bootstage.h	/^	BOOTSTAGE_ID_KERNEL_LOADED,	\/* Kernel has been loaded *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_MAIN_CPU_AWAKE	include/bootstage.h	/^	BOOTSTAGE_ID_MAIN_CPU_AWAKE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_MAIN_CPU_READY	include/bootstage.h	/^	BOOTSTAGE_ID_MAIN_CPU_READY,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_MAIN_LOOP	include/bootstage.h	/^	BOOTSTAGE_ID_MAIN_LOOP,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_AVAILABLE	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_AVAILABLE = 55,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_BOOT_DEVICE	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_BOOT_DEVICE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_FIT_READ	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_FIT_READ = 150,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_FIT_READ_OK	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_FIT_READ_OK,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_HDR_READ	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_HDR_READ = 55,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_PART	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_PART,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_READ	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_READ,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_SUFFIX	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_SUFFIX,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NAND_TYPE	include/bootstage.h	/^	BOOTSTAGE_ID_NAND_TYPE = 57,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NEED_RESET	include/bootstage.h	/^	BOOTSTAGE_ID_NEED_RESET = 30,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_CHECKSUM	include/bootstage.h	/^	BOOTSTAGE_ID_NET_CHECKSUM = 60,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_DONE	include/bootstage.h	/^	BOOTSTAGE_ID_NET_DONE,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_DONE_ERR	include/bootstage.h	/^	BOOTSTAGE_ID_NET_DONE_ERR,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_ETH_INIT	include/bootstage.h	/^	BOOTSTAGE_ID_NET_ETH_INIT,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_ETH_START	include/bootstage.h	/^	BOOTSTAGE_ID_NET_ETH_START = 64,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_LOADED	include/bootstage.h	/^	BOOTSTAGE_ID_NET_LOADED,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_NETLOOP_OK	include/bootstage.h	/^	BOOTSTAGE_ID_NET_NETLOOP_OK,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NET_START	include/bootstage.h	/^	BOOTSTAGE_ID_NET_START = 80,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_NO_RAMDISK	include/bootstage.h	/^	BOOTSTAGE_ID_NO_RAMDISK,	\/* No ram disk found (not an error) *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_OVERWRITTEN	include/bootstage.h	/^	BOOTSTAGE_ID_OVERWRITTEN,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_POST_FAIL	include/bootstage.h	/^	BOOTSTAGE_ID_POST_FAIL,		\/* Post failure *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_POST_FAIL_R	include/bootstage.h	/^	BOOTSTAGE_ID_POST_FAIL_R,	\/* Post failure reported after reloc *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_RAMDISK	include/bootstage.h	/^	BOOTSTAGE_ID_RAMDISK,		\/* Checking for valid ramdisk *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_RD_CHECKSUM	include/bootstage.h	/^	BOOTSTAGE_ID_RD_CHECKSUM,	\/* Checking ram disk checksum *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_RD_HDR_CHECKSUM	include/bootstage.h	/^	BOOTSTAGE_ID_RD_HDR_CHECKSUM,	\/* Checking ram disk heder checksum *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_RD_MAGIC	include/bootstage.h	/^	BOOTSTAGE_ID_RD_MAGIC,		\/* Checking ram disk magic *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_RUN_OS	include/bootstage.h	/^	BOOTSTAGE_ID_RUN_OS	= 15,	\/* Exiting U-Boot, entering OS *\/$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_START	include/bootstage.h	/^	BOOTSTAGE_ID_START = 0,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_START_SPL	include/bootstage.h	/^	BOOTSTAGE_ID_START_SPL,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_START_UBOOT_F	include/bootstage.h	/^	BOOTSTAGE_ID_START_UBOOT_F,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_START_UBOOT_R	include/bootstage.h	/^	BOOTSTAGE_ID_START_UBOOT_R,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_USB_START	include/bootstage.h	/^	BOOTSTAGE_ID_USB_START,$/;"	e	enum:bootstage_id
BOOTSTAGE_ID_USER	include/bootstage.h	/^	BOOTSTAGE_ID_USER,$/;"	e	enum:bootstage_id
BOOTSTAGE_KERNELREAD_START	include/bootstage.h	/^	BOOTSTAGE_KERNELREAD_START,$/;"	e	enum:bootstage_id
BOOTSTAGE_KERNELREAD_STOP	include/bootstage.h	/^	BOOTSTAGE_KERNELREAD_STOP,$/;"	e	enum:bootstage_id
BOOTSTAGE_MAGIC	common/bootstage.c	/^	BOOTSTAGE_MAGIC		= 0xb00757a3,$/;"	e	enum:__anona60889960103	file:
BOOTSTAGE_MARKER	include/bootstage.h	/^#define BOOTSTAGE_MARKER(/;"	d
BOOTSTAGE_REPORT	common/Kconfig	/^config BOOTSTAGE_REPORT$/;"	c	menu:Boot timing
BOOTSTAGE_STASH	common/Kconfig	/^config BOOTSTAGE_STASH$/;"	c	menu:Boot timing
BOOTSTAGE_STASH_ADDR	common/Kconfig	/^config BOOTSTAGE_STASH_ADDR$/;"	c	menu:Boot timing
BOOTSTAGE_STASH_SIZE	common/Kconfig	/^config BOOTSTAGE_STASH_SIZE$/;"	c	menu:Boot timing
BOOTSTAGE_SUB_CHECK	include/bootstage.h	/^	BOOTSTAGE_SUB_CHECK,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_CHECK_ALL	include/bootstage.h	/^	BOOTSTAGE_SUB_CHECK_ALL,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_CHECK_ALL_OK	include/bootstage.h	/^	BOOTSTAGE_SUB_CHECK_ALL_OK = 7,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_CHECK_ARCH	include/bootstage.h	/^	BOOTSTAGE_SUB_CHECK_ARCH = 5,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_FORMAT	include/bootstage.h	/^	BOOTSTAGE_SUB_FORMAT,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_FORMAT_OK	include/bootstage.h	/^	BOOTSTAGE_SUB_FORMAT_OK,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_GET_DATA	include/bootstage.h	/^	BOOTSTAGE_SUB_GET_DATA,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_GET_DATA_OK	include/bootstage.h	/^	BOOTSTAGE_SUB_GET_DATA_OK,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_HASH	include/bootstage.h	/^	BOOTSTAGE_SUB_HASH = 5,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_LOAD	include/bootstage.h	/^	BOOTSTAGE_SUB_LOAD,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_NO_UNIT_NAME	include/bootstage.h	/^	BOOTSTAGE_SUB_NO_UNIT_NAME,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_SUBNODE	include/bootstage.h	/^	BOOTSTAGE_SUB_SUBNODE,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_SUB_UNIT_NAME	include/bootstage.h	/^	BOOTSTAGE_SUB_UNIT_NAME,$/;"	e	enum:__anon15305af60103
BOOTSTAGE_USER_COUNT	common/Kconfig	/^config BOOTSTAGE_USER_COUNT$/;"	c	menu:Boot timing
BOOTSTAGE_VERSION	common/bootstage.c	/^	BOOTSTAGE_VERSION	= 0,$/;"	e	enum:__anona60889960103	file:
BOOT_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_0	/;"	d
BOOT_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_1	/;"	d
BOOT_10	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_10	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_10	/;"	d
BOOT_11	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_11	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_11	/;"	d
BOOT_12	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_12	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_12	/;"	d
BOOT_13	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_13	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_13	/;"	d
BOOT_14	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_14	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_14	/;"	d
BOOT_15	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_15	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_15	/;"	d
BOOT_16	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_16	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_16	/;"	d
BOOT_17	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_17	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_17	/;"	d
BOOT_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_2	/;"	d
BOOT_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_3	/;"	d
BOOT_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_4	/;"	d
BOOT_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_5	/;"	d
BOOT_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_6	/;"	d
BOOT_7	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_7	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_7	/;"	d
BOOT_8	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_8	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_8	/;"	d
BOOT_9	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_9	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	BOOT_9	/;"	d
BOOT_ACK_EN	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               BOOT_ACK_EN /;"	d
BOOT_CHARGING	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define BOOT_CHARGING	/;"	d
BOOT_DEF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define BOOT_DEF	/;"	d
BOOT_DEFAULT_SETTINGS	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_DEFAULT_SETTINGS	/;"	d
BOOT_DEVICE_BOARD	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_BOARD,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_BOARD	arch/sandbox/include/asm/spl.h	/^	BOOT_DEVICE_BOARD,$/;"	e	enum:__anon53a932380103
BOOT_DEVICE_CPGMAC	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_CPGMAC	/;"	d
BOOT_DEVICE_DFU	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_DFU	/;"	d
BOOT_DEVICE_DFU	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_DFU,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_I2C	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_I2C,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_MMC1	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_MMC1	/;"	d
BOOT_DEVICE_MMC1	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_MMC1	/;"	d
BOOT_DEVICE_MMC1	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_MMC1	/;"	d
BOOT_DEVICE_MMC1	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_MMC1	/;"	d
BOOT_DEVICE_MMC1	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_MMC1	/;"	d
BOOT_DEVICE_MMC1	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_MMC1,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_MMC2	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_MMC2	/;"	d
BOOT_DEVICE_MMC2	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_MMC2	/;"	d
BOOT_DEVICE_MMC2	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_MMC2	/;"	d
BOOT_DEVICE_MMC2	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_MMC2	/;"	d
BOOT_DEVICE_MMC2	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_MMC2	/;"	d
BOOT_DEVICE_MMC2	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_MMC2,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_MMC2_2	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_MMC2_2	/;"	d
BOOT_DEVICE_MMC2_2	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_MMC2_2	/;"	d
BOOT_DEVICE_MMC2_2	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_MMC2_2 /;"	d
BOOT_DEVICE_MMC2_2	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_MMC2_2	/;"	d
BOOT_DEVICE_MMC2_2	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_MMC2_2	/;"	d
BOOT_DEVICE_MMC2_2	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_MMC2_2,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_NAND	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_NAND	/;"	d
BOOT_DEVICE_NAND	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_NAND	/;"	d
BOOT_DEVICE_NAND	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_NAND	/;"	d
BOOT_DEVICE_NAND	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_NAND	/;"	d
BOOT_DEVICE_NAND	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_NAND	/;"	d
BOOT_DEVICE_NAND	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_NAND,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_NAND_I2C	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_NAND_I2C	/;"	d
BOOT_DEVICE_NONE	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_NONE	/;"	d
BOOT_DEVICE_NONE	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_NONE	/;"	d
BOOT_DEVICE_NONE	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_NONE	/;"	d
BOOT_DEVICE_NONE	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_NONE	/;"	d
BOOT_DEVICE_NONE	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_NONE	/;"	d
BOOT_DEVICE_NONE	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_NONE$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_NONE	common/spl/spl.c	/^#define BOOT_DEVICE_NONE /;"	d	file:
BOOT_DEVICE_NOR	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_NOR	/;"	d
BOOT_DEVICE_NOR	arch/arm/include/asm/arch-orion5x/spl.h	/^#define BOOT_DEVICE_NOR	/;"	d
BOOT_DEVICE_NOR	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_NOR,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_NOR	arch/microblaze/include/asm/spl.h	/^#define BOOT_DEVICE_NOR	/;"	d
BOOT_DEVICE_NOR	arch/powerpc/include/asm/spl.h	/^#define BOOT_DEVICE_NOR	/;"	d
BOOT_DEVICE_ONENAD	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_ONENAD	/;"	d
BOOT_DEVICE_ONENAND	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_ONENAND	/;"	d
BOOT_DEVICE_ONENAND	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_ONENAND	/;"	d
BOOT_DEVICE_ONENAND	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_ONENAND	/;"	d
BOOT_DEVICE_ONENAND	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_ONENAND	/;"	d
BOOT_DEVICE_ONENAND	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_ONENAND,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_QSPI_1	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_QSPI_1	/;"	d
BOOT_DEVICE_QSPI_4	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_QSPI_4	/;"	d
BOOT_DEVICE_RAM	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_RAM,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_RAM	arch/microblaze/include/asm/spl.h	/^#define BOOT_DEVICE_RAM	/;"	d
BOOT_DEVICE_SATA	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_SATA	/;"	d
BOOT_DEVICE_SATA	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_SATA,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_SPI	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_SPI	/;"	d
BOOT_DEVICE_SPI	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_SPI	/;"	d
BOOT_DEVICE_SPI	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_SPI	/;"	d
BOOT_DEVICE_SPI	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_SPI,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_SPI	arch/microblaze/include/asm/spl.h	/^#define BOOT_DEVICE_SPI	/;"	d
BOOT_DEVICE_UART	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_UART	/;"	d
BOOT_DEVICE_UART	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_UART	/;"	d
BOOT_DEVICE_UART	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_UART	/;"	d
BOOT_DEVICE_UART	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_UART	/;"	d
BOOT_DEVICE_UART	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_UART,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_UNKNOWN	board/amcc/bamboo/bamboo.h	/^#define BOOT_DEVICE_UNKNOWN	/;"	d
BOOT_DEVICE_UNKNOWN	board/amcc/redwood/redwood.c	/^#define BOOT_DEVICE_UNKNOWN	/;"	d	file:
BOOT_DEVICE_UNKNOWN	board/amcc/yucca/yucca.c	/^#define BOOT_DEVICE_UNKNOWN	/;"	d	file:
BOOT_DEVICE_USB	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_USB	/;"	d
BOOT_DEVICE_USB	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_USB	/;"	d
BOOT_DEVICE_USB	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_USB	/;"	d
BOOT_DEVICE_USB	arch/arm/include/asm/spl.h	/^	BOOT_DEVICE_USB,$/;"	e	enum:__anonb996e2890103
BOOT_DEVICE_USBETH	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_USBETH	/;"	d
BOOT_DEVICE_XIP	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_XIP	/;"	d
BOOT_DEVICE_XIP	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_XIP	/;"	d
BOOT_DEVICE_XIP	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_XIP	/;"	d
BOOT_DEVICE_XIP	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_XIP	/;"	d
BOOT_DEVICE_XIP	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_XIP	/;"	d
BOOT_DEVICE_XIPWAIT	arch/arm/include/asm/arch-am33xx/spl.h	/^#define BOOT_DEVICE_XIPWAIT	/;"	d
BOOT_DEVICE_XIPWAIT	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define BOOT_DEVICE_XIPWAIT	/;"	d
BOOT_DEVICE_XIPWAIT	arch/arm/include/asm/arch-omap3/spl.h	/^#define BOOT_DEVICE_XIPWAIT	/;"	d
BOOT_DEVICE_XIPWAIT	arch/arm/include/asm/arch-omap4/spl.h	/^#define BOOT_DEVICE_XIPWAIT	/;"	d
BOOT_DEVICE_XIPWAIT	arch/arm/include/asm/arch-omap5/spl.h	/^#define BOOT_DEVICE_XIPWAIT	/;"	d
BOOT_DEV_NUM	arch/arm/include/asm/imx-common/boot_mode.h	/^	BOOT_DEV_NUM = UNKNOWN_BOOT,$/;"	e	enum:boot_device
BOOT_DEV_SEL_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOT_DEV_SEL_MASK	/;"	d
BOOT_DEV_SEL_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOT_DEV_SEL_OFFS	/;"	d
BOOT_EEPROM_PAGE_OFFSET	board/esd/pmc440/pmc440.c	/^#define	BOOT_EEPROM_PAGE_OFFSET(/;"	d	file:
BOOT_EEPROM_PAGE_SIZE	board/esd/pmc440/pmc440.c	/^#define	BOOT_EEPROM_PAGE_SIZE	/;"	d	file:
BOOT_EN	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   BOOT_EN /;"	d
BOOT_ENTRY_ADDR_LOWER	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_ADDR_LOWER	/;"	d
BOOT_ENTRY_ADDR_UPPER	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_ADDR_UPPER	/;"	d
BOOT_ENTRY_PIR	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_PIR	/;"	d
BOOT_ENTRY_R3_LOWER	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_R3_LOWER	/;"	d
BOOT_ENTRY_R3_UPPER	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_R3_UPPER	/;"	d
BOOT_ENTRY_R6_LOWER	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_R6_LOWER	/;"	d
BOOT_ENTRY_R6_UPPER	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_R6_UPPER	/;"	d
BOOT_ENTRY_RESV	arch/powerpc/cpu/mpc85xx/mp.h	/^#define BOOT_ENTRY_RESV	/;"	d
BOOT_ENV_SETTINGS	include/configs/bf537-minotaur.h	/^#define BOOT_ENV_SETTINGS /;"	d
BOOT_ENV_SETTINGS	include/configs/bf537-srv1.h	/^#define BOOT_ENV_SETTINGS /;"	d
BOOT_EXT_FLASH	board/mpl/pati/pati.h	/^#define BOOT_EXT_FLASH	/;"	d
BOOT_FASTBOOT	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define BOOT_FASTBOOT	/;"	d
BOOT_FROM_16BIT_NOR	board/amcc/redwood/redwood.c	/^#define BOOT_FROM_16BIT_NOR	/;"	d	file:
BOOT_FROM_16BIT_SRAM	board/amcc/redwood/redwood.c	/^#define BOOT_FROM_16BIT_SRAM	/;"	d	file:
BOOT_FROM_32BIT_SRAM	board/amcc/redwood/redwood.c	/^#define BOOT_FROM_32BIT_SRAM	/;"	d	file:
BOOT_FROM_8BIT_NAND	board/amcc/redwood/redwood.c	/^#define BOOT_FROM_8BIT_NAND	/;"	d	file:
BOOT_FROM_8BIT_SRAM	board/amcc/redwood/redwood.c	/^#define BOOT_FROM_8BIT_SRAM	/;"	d	file:
BOOT_FROM_LARGE_FLASH_OR_SRAM	board/amcc/bamboo/bamboo.h	/^#define BOOT_FROM_LARGE_FLASH_OR_SRAM	/;"	d
BOOT_FROM_LARGE_FLASH_OR_SRAM	board/amcc/yucca/yucca.c	/^#define BOOT_FROM_LARGE_FLASH_OR_SRAM	/;"	d	file:
BOOT_FROM_LOWER_BANK	board/freescale/ls1021atwr/ls1021atwr.c	/^#define BOOT_FROM_LOWER_BANK	/;"	d	file:
BOOT_FROM_MMC	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOT_FROM_MMC	/;"	d
BOOT_FROM_MMC_ALT	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOT_FROM_MMC_ALT	/;"	d
BOOT_FROM_NAND_FLASH0	board/amcc/bamboo/bamboo.h	/^#define BOOT_FROM_NAND_FLASH0	/;"	d
BOOT_FROM_PCI	board/amcc/bamboo/bamboo.h	/^#define BOOT_FROM_PCI	/;"	d
BOOT_FROM_PCI	board/amcc/yucca/yucca.c	/^#define BOOT_FROM_PCI	/;"	d	file:
BOOT_FROM_PCI	board/mpl/pati/pati.h	/^#define BOOT_FROM_PCI	/;"	d
BOOT_FROM_SDRAM	board/mpl/pati/pati.h	/^#define BOOT_FROM_SDRAM	/;"	d
BOOT_FROM_SMALL_FLASH	board/amcc/bamboo/bamboo.h	/^#define BOOT_FROM_SMALL_FLASH	/;"	d
BOOT_FROM_SMALL_FLASH	board/amcc/yucca/yucca.c	/^#define BOOT_FROM_SMALL_FLASH	/;"	d	file:
BOOT_FROM_SPI	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOT_FROM_SPI	/;"	d
BOOT_FROM_UART	arch/arm/mach-mvebu/include/mach/soc.h	/^#define BOOT_FROM_UART	/;"	d
BOOT_FROM_UPPER_BANK	board/freescale/ls1021atwr/ls1021atwr.c	/^#define BOOT_FROM_UPPER_BANK	/;"	d	file:
BOOT_FULL_CONFIG	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_FULL_CONFIG	/;"	d
BOOT_FULL_CONFIG_PLUS_DIAG	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_FULL_CONFIG_PLUS_DIAG	/;"	d
BOOT_INFO_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define BOOT_INFO_ADDR	/;"	d
BOOT_INFO_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define BOOT_INFO_ADDR	/;"	d
BOOT_INT_FLASH	board/mpl/pati/pati.h	/^#define BOOT_INT_FLASH	/;"	d
BOOT_IN_RECOVERY_MODE	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_IN_RECOVERY_MODE	/;"	d
BOOT_LOADER	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define BOOT_LOADER	/;"	d
BOOT_LOADER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define BOOT_LOADER_BASE_ADDR	/;"	d
BOOT_MINIMAL_CONFIG	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_MINIMAL_CONFIG	/;"	d
BOOT_MODE	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 BOOT_MODE /;"	d
BOOT_MODES_MASK	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define BOOT_MODES_MASK	/;"	d
BOOT_MODE_ALT_SHIFT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define BOOT_MODE_ALT_SHIFT	/;"	d
BOOT_MODE_DFU	include/samsung/misc.h	/^	BOOT_MODE_DFU,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_EMMC	arch/arm/mach-exynos/include/mach/power.h	/^	BOOT_MODE_EMMC = 8,     \/* EMMC4.4 | USB *\/$/;"	e	enum:__anon48af4cfa0103
BOOT_MODE_EMMC_SD	arch/arm/mach-exynos/include/mach/power.h	/^	BOOT_MODE_EMMC_SD = 40, \/* EMMC4.4 | SD_CH2 *\/$/;"	e	enum:__anon48af4cfa0103
BOOT_MODE_ENV	include/samsung/misc.h	/^	BOOT_MODE_ENV,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_EXIT	include/samsung/misc.h	/^	BOOT_MODE_EXIT,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_GPT	include/samsung/misc.h	/^	BOOT_MODE_GPT,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_INFO	include/samsung/misc.h	/^	BOOT_MODE_INFO,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_OFFSET	arch/arm/include/asm/omap_common.h	/^#define BOOT_MODE_OFFSET	/;"	d
BOOT_MODE_OM	arch/arm/mach-exynos/include/mach/power.h	/^	BOOT_MODE_OM = 32,$/;"	e	enum:__anon48af4cfa0103
BOOT_MODE_SD	arch/arm/mach-exynos/include/mach/power.h	/^	BOOT_MODE_SD = 4,      \/* SD_CH2  | USB *\/$/;"	e	enum:__anon48af4cfa0103
BOOT_MODE_SERIAL	arch/arm/mach-exynos/include/mach/power.h	/^	BOOT_MODE_SERIAL = 20,$/;"	e	enum:__anon48af4cfa0103
BOOT_MODE_THOR	include/samsung/misc.h	/^	BOOT_MODE_THOR,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_UMS	include/samsung/misc.h	/^	BOOT_MODE_UMS,$/;"	e	enum:__anon40b3ab870103
BOOT_MODE_USB	arch/arm/mach-exynos/include/mach/power.h	/^	BOOT_MODE_USB,	\/* Boot using USB download *\/$/;"	e	enum:__anon48af4cfa0103
BOOT_MODE_USE_ALT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define BOOT_MODE_USE_ALT	/;"	d
BOOT_MPS	board/mpl/common/common_util.h	/^#define BOOT_MPS	/;"	d
BOOT_NORMAL	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define BOOT_NORMAL	/;"	d
BOOT_NO_CONFIG_CHANGES	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_NO_CONFIG_CHANGES	/;"	d
BOOT_ON_FLASH_UPDATE	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_ON_FLASH_UPDATE	/;"	d
BOOT_ON_S2_RESUME	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_ON_S2_RESUME	/;"	d
BOOT_ON_S3_RESUME	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_ON_S3_RESUME	/;"	d
BOOT_ON_S4_RESUME	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_ON_S4_RESUME	/;"	d
BOOT_ON_S5_RESUME	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define BOOT_ON_S5_RESUME	/;"	d
BOOT_PAGE_OFFSET	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^#define BOOT_PAGE_OFFSET /;"	d	file:
BOOT_PAGE_OFFSET	include/configs/B4860QDS.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T102xQDS.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T102xRDB.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T104xRDB.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T208xQDS.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T208xRDB.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T4240QDS.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PAGE_OFFSET	include/configs/T4240RDB.h	/^#define BOOT_PAGE_OFFSET	/;"	d
BOOT_PART_COMP	include/part.h	/^#define BOOT_PART_COMP	/;"	d
BOOT_PART_TYPE	include/part.h	/^#define BOOT_PART_TYPE	/;"	d
BOOT_PCI	board/mpl/common/common_util.h	/^#define BOOT_PCI	/;"	d
BOOT_RAM_BASE	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define BOOT_RAM_BASE	/;"	d	file:
BOOT_RAM_SIZE	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define BOOT_RAM_SIZE	/;"	d	file:
BOOT_RAM_WAYS	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define BOOT_RAM_WAYS	/;"	d	file:
BOOT_RECOVERY	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define BOOT_RECOVERY	/;"	d
BOOT_ROM_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_ROM_BASE_ADDR /;"	d
BOOT_SEG	arch/x86/cpu/start16.S	/^#define BOOT_SEG	/;"	d	file:
BOOT_STRAP_OPTION_A	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define BOOT_STRAP_OPTION_A	/;"	d
BOOT_STRAP_OPTION_B	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define BOOT_STRAP_OPTION_B	/;"	d
BOOT_STRAP_OPTION_D	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define BOOT_STRAP_OPTION_D	/;"	d
BOOT_STRAP_OPTION_E	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define BOOT_STRAP_OPTION_E	/;"	d
BOOT_TARGET_DEVICES	include/configs/am335x_evm.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/am335x_sl50.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/dragonboard410c.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/el6x_common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/embestmx6boards.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/exynos5-common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/exynos7420-common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/hikey.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/miniarm_rk3288.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/mx6cuboxi.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/novena.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/omap3_igep00x0.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/omap3_pandora.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/pic32mzdask.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/rockchip-common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/rpi.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/s32v234evb.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/sandbox.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/sunxi-common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/tegra-common-post.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/ti_omap4_common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/usbarmory.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/vexpress_common.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/wandboard.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES	include/configs/xilinx_zynqmp.h	/^#define BOOT_TARGET_DEVICES(/;"	d
BOOT_TARGET_DEVICES_MMC	include/configs/sunxi-common.h	/^#define BOOT_TARGET_DEVICES_MMC(/;"	d
BOOT_TARGET_DEVICES_MMC	include/configs/xilinx_zynqmp.h	/^# define BOOT_TARGET_DEVICES_MMC(/;"	d
BOOT_TARGET_DEVICES_MMC_EXTRA	include/configs/sunxi-common.h	/^#define BOOT_TARGET_DEVICES_MMC_EXTRA(/;"	d
BOOT_TARGET_DEVICES_SCSI	include/configs/sunxi-common.h	/^#define BOOT_TARGET_DEVICES_SCSI(/;"	d
BOOT_TARGET_DEVICES_SCSI	include/configs/xilinx_zynqmp.h	/^# define BOOT_TARGET_DEVICES_SCSI(/;"	d
BOOT_TARGET_DEVICES_USB	include/configs/sunxi-common.h	/^#define BOOT_TARGET_DEVICES_USB(/;"	d
BOOT_TARGET_DEVICES_USB	include/configs/xilinx_zynqmp.h	/^# define BOOT_TARGET_DEVICES_USB(/;"	d
BOOT_TYPE_MMC	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_TYPE_MMC	/;"	d
BOOT_TYPE_NAND	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_TYPE_NAND	/;"	d
BOOT_TYPE_QSPI	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_TYPE_QSPI	/;"	d
BOOT_TYPE_SD	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_TYPE_SD	/;"	d
BOOT_TYPE_SPINOR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_TYPE_SPINOR	/;"	d
BOOT_TYPE_WEIM	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define BOOT_TYPE_WEIM	/;"	d
BOOT_UMS	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define BOOT_UMS	/;"	d
BOSTON_CLK_CPU	arch/arm/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	arch/mips/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	arch/nios2/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	arch/x86/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_CPU	include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_CPU /;"	d
BOSTON_CLK_SYS	arch/arm/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	arch/microblaze/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	arch/mips/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	arch/nios2/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	arch/sandbox/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	arch/x86/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	arch/xtensa/dts/include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_CLK_SYS	include/dt-bindings/clock/boston-clock.h	/^#define BOSTON_CLK_SYS /;"	d
BOSTON_LCD_BASE	board/imgtec/boston/boston-regs.h	/^#define BOSTON_LCD_BASE	/;"	d
BOSTON_PLAT_BASE	board/imgtec/boston/boston-regs.h	/^#define BOSTON_PLAT_BASE	/;"	d
BOSTON_PLAT_CORE_CL	board/imgtec/boston/boston-regs.h	/^#define BOSTON_PLAT_CORE_CL	/;"	d
BOSTON_PLAT_DDR3STAT	board/imgtec/boston/boston-regs.h	/^#define BOSTON_PLAT_DDR3STAT	/;"	d
BOSTON_PLAT_DDR3STAT_CALIB	board/imgtec/boston/boston-regs.h	/^# define BOSTON_PLAT_DDR3STAT_CALIB	/;"	d
BOSTON_PLAT_DDRCONF0	board/imgtec/boston/boston-regs.h	/^#define BOSTON_PLAT_DDRCONF0	/;"	d
BOSTON_PLAT_DDRCONF0_SIZE	board/imgtec/boston/boston-regs.h	/^# define BOSTON_PLAT_DDRCONF0_SIZE	/;"	d
BOSTON_PLAT_MMCMDIV	drivers/clk/clk_boston.c	/^#define BOSTON_PLAT_MMCMDIV	/;"	d	file:
BOSTON_PLAT_MMCMDIV_CLK0DIV	drivers/clk/clk_boston.c	/^# define BOSTON_PLAT_MMCMDIV_CLK0DIV	/;"	d	file:
BOSTON_PLAT_MMCMDIV_CLK1DIV	drivers/clk/clk_boston.c	/^# define BOSTON_PLAT_MMCMDIV_CLK1DIV	/;"	d	file:
BOSTON_PLAT_MMCMDIV_INPUT	drivers/clk/clk_boston.c	/^# define BOSTON_PLAT_MMCMDIV_INPUT	/;"	d	file:
BOSTON_PLAT_MMCMDIV_MUL	drivers/clk/clk_boston.c	/^# define BOSTON_PLAT_MMCMDIV_MUL	/;"	d	file:
BOTH_LEDS	board/Seagate/dockstar/dockstar.c	/^#define BOTH_LEDS	/;"	d	file:
BOTH_LEDS	board/Seagate/goflexhome/goflexhome.c	/^#define BOTH_LEDS	/;"	d	file:
BOTH_OFF	drivers/video/mxc_ipuv3_fb.c	/^	BOTH_OFF$/;"	e	enum:__anon46dcecef0103	file:
BOTH_ON	drivers/video/mxc_ipuv3_fb.c	/^	BOTH_ON,$/;"	e	enum:__anon46dcecef0103	file:
BOTTOM_UP_HEIGHT	fs/ubifs/ubifs.h	/^#define BOTTOM_UP_HEIGHT /;"	d
BOT_RESET_REQUEST	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^#define BOT_RESET_REQUEST	/;"	d	file:
BOUND	net/bootp.h	/^	       BOUND,$/;"	e	enum:__anon7cb633f50103
BO_CTRL_ADDR	drivers/misc/mxc_ocotp.c	/^#define BO_CTRL_ADDR	/;"	d	file:
BO_CTRL_WR_UNLOCK	drivers/misc/mxc_ocotp.c	/^#define BO_CTRL_WR_UNLOCK	/;"	d	file:
BO_TIMING_FSOURCE	drivers/misc/mxc_ocotp.c	/^#define BO_TIMING_FSOURCE /;"	d	file:
BO_TIMING_PROG	drivers/misc/mxc_ocotp.c	/^#define BO_TIMING_PROG /;"	d	file:
BO_TIMING_RELAX	drivers/misc/mxc_ocotp.c	/^#define BO_TIMING_RELAX	/;"	d	file:
BO_TIMING_STROBE_PROG	drivers/misc/mxc_ocotp.c	/^#define BO_TIMING_STROBE_PROG	/;"	d	file:
BO_TIMING_STROBE_READ	drivers/misc/mxc_ocotp.c	/^#define BO_TIMING_STROBE_READ	/;"	d	file:
BP	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register SP, BP, SI, DI, IP;$/;"	m	struct:i386_special_regs	typeref:typename:i386_general_register
BPCCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR0 /;"	d
BPCCR11	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR11 /;"	d
BPCCR12	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR12 /;"	d
BPCCR21	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR21 /;"	d
BPCCR22	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR22 /;"	d
BPCCR31	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR31 /;"	d
BPCCR32	arch/sh/include/asm/cpu_sh7722.h	/^#define BPCCR32 /;"	d
BPFCLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	BPFCLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
BPFCLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
BPFCLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	BPFCLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
BPFCLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
BPFCLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	TS_SCK_D_MARK, BPFCLK_C_MARK, MSIOF0_RXD_MARK, SCIF5_RXD_MARK,$/;"	e	enum:__anona307901d0103	file:
BPFCLK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
BPFCLK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
BPFCLK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIF_CLK_MARK, BPFCLK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
BPFCLK_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,$/;"	e	enum:__anona3077f190103	file:
BPFCLK_G_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,$/;"	e	enum:__anona3077f190103	file:
BPFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,$/;"	e	enum:__anona3077f190103	file:
BPKFR	arch/sh/include/asm/cpu_sh7722.h	/^#define BPKFR /;"	d
BPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define BPLL	/;"	d
BPLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define BPLL_CON0_LOCKED	/;"	d
BPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define BPLL_CON1_VAL	/;"	d
BPLL_FOUT_SEL_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define BPLL_FOUT_SEL_MASK	/;"	d
BPLL_FOUT_SEL_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define BPLL_FOUT_SEL_SHIFT	/;"	d
BPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define BPLL_SEL_MASK /;"	d
BPMP_ABI_RATCHET_VALUE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ABI_RATCHET_VALUE /;"	d
BPMP_EACCES	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_EACCES	/;"	d
BPMP_EBADCMD	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_EBADCMD	/;"	d
BPMP_EFAULT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_EFAULT	/;"	d
BPMP_EINVAL	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_EINVAL	/;"	d
BPMP_EIO	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_EIO	/;"	d
BPMP_EISDIR	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_EISDIR	/;"	d
BPMP_ENODEV	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ENODEV	/;"	d
BPMP_ENOENT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ENOENT	/;"	d
BPMP_ENOHANDLER	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ENOHANDLER	/;"	d
BPMP_ENOMEM	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ENOMEM	/;"	d
BPMP_ERANGE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ERANGE	/;"	d
BPMP_ETIMEDOUT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define BPMP_ETIMEDOUT /;"	d
BPMP_FLAG_DO_ACK	drivers/misc/tegra186_bpmp.c	/^#define BPMP_FLAG_DO_ACK	/;"	d	file:
BPMP_FLAG_RING_DOORBELL	drivers/misc/tegra186_bpmp.c	/^#define BPMP_FLAG_RING_DOORBELL	/;"	d	file:
BPMP_IVC_FRAME_COUNT	drivers/misc/tegra186_bpmp.c	/^#define BPMP_IVC_FRAME_COUNT /;"	d	file:
BPMP_IVC_FRAME_SIZE	drivers/misc/tegra186_bpmp.c	/^#define BPMP_IVC_FRAME_SIZE /;"	d	file:
BPP_16_RGB565	drivers/video/fsl_dcu_fb.c	/^#define BPP_16_RGB565	/;"	d	file:
BPP_24_RGB888	drivers/video/fsl_dcu_fb.c	/^#define BPP_24_RGB888	/;"	d	file:
BPP_32_ARGB8888	drivers/video/fsl_dcu_fb.c	/^#define BPP_32_ARGB8888	/;"	d	file:
BPP_RW	arch/powerpc/include/asm/mmu.h	/^#define BPP_RW	/;"	d
BPP_RX	arch/powerpc/include/asm/mmu.h	/^#define BPP_RX	/;"	d
BPP_XX	arch/powerpc/include/asm/mmu.h	/^#define BPP_XX	/;"	d
BPROCR	arch/sh/include/asm/cpu_sh7722.h	/^#define BPROCR /;"	d
BPS_SETTING_VALUE	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define BPS_SETTING_VALUE	/;"	d	file:
BPTR_BPHW	drivers/net/dm9000x.h	/^#define BPTR_BPHW(/;"	d
BPTR_JPT_200US	drivers/net/dm9000x.h	/^#define BPTR_JPT_200US	/;"	d
BPTR_JPT_600US	drivers/net/dm9000x.h	/^#define BPTR_JPT_600US	/;"	d
BP_ANADIG_PFD_480_PFD0_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_480_PFD0_FRAC /;"	d
BP_ANADIG_PFD_480_PFD1_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_480_PFD1_FRAC /;"	d
BP_ANADIG_PFD_480_PFD2_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_480_PFD2_FRAC /;"	d
BP_ANADIG_PFD_480_PFD3_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_480_PFD3_FRAC /;"	d
BP_ANADIG_PFD_528_PFD0_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_528_PFD0_FRAC /;"	d
BP_ANADIG_PFD_528_PFD1_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_528_PFD1_FRAC /;"	d
BP_ANADIG_PFD_528_PFD2_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_528_PFD2_FRAC /;"	d
BP_ANADIG_PFD_528_PFD3_FRAC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PFD_528_PFD3_FRAC /;"	d
BP_ANADIG_PLL_528_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_BYPASS_CLK_SRC /;"	d
BP_ANADIG_PLL_528_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_DENOM_B /;"	d
BP_ANADIG_PLL_528_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_DENOM_RSVD0 /;"	d
BP_ANADIG_PLL_528_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_NUM_A /;"	d
BP_ANADIG_PLL_528_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_NUM_RSVD0 /;"	d
BP_ANADIG_PLL_528_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_RSVD0 /;"	d
BP_ANADIG_PLL_528_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_RSVD1 /;"	d
BP_ANADIG_PLL_528_SS_STEP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_SS_STEP /;"	d
BP_ANADIG_PLL_528_SS_STOP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_528_SS_STOP /;"	d
BP_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC /;"	d
BP_ANADIG_PLL_AUDIO_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_DENOM_B /;"	d
BP_ANADIG_PLL_AUDIO_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_DENOM_RSVD0 /;"	d
BP_ANADIG_PLL_AUDIO_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_DIV_SELECT /;"	d
BP_ANADIG_PLL_AUDIO_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_NUM_A /;"	d
BP_ANADIG_PLL_AUDIO_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_NUM_RSVD0 /;"	d
BP_ANADIG_PLL_AUDIO_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_RSVD0 /;"	d
BP_ANADIG_PLL_AUDIO_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_AUDIO_TEST_DIV_SELECT /;"	d
BP_ANADIG_PLL_ENET_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_ENET_BYPASS_CLK_SRC /;"	d
BP_ANADIG_PLL_ENET_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_ENET_DIV_SELECT /;"	d
BP_ANADIG_PLL_ENET_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_ENET_RSVD0 /;"	d
BP_ANADIG_PLL_ENET_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_ENET_RSVD1 /;"	d
BP_ANADIG_PLL_SYS_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_SYS_BYPASS_CLK_SRC /;"	d
BP_ANADIG_PLL_SYS_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_SYS_DIV_SELECT /;"	d
BP_ANADIG_PLL_SYS_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_SYS_RSVD0 /;"	d
BP_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC /;"	d
BP_ANADIG_PLL_VIDEO_DENOM_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_DENOM_B /;"	d
BP_ANADIG_PLL_VIDEO_DENOM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_DENOM_RSVD0 /;"	d
BP_ANADIG_PLL_VIDEO_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_DIV_SELECT /;"	d
BP_ANADIG_PLL_VIDEO_NUM_A	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_NUM_A /;"	d
BP_ANADIG_PLL_VIDEO_NUM_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_NUM_RSVD0 /;"	d
BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT /;"	d
BP_ANADIG_PLL_VIDEO_RSVD0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_PLL_VIDEO_RSVD0 /;"	d
BP_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC /;"	d
BP_ANADIG_USB1_PLL_480_CTRL_CONTROL0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_USB1_PLL_480_CTRL_CONTROL0 /;"	d
BP_ANADIG_USB1_PLL_480_CTRL_DIV_SELECT	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_USB1_PLL_480_CTRL_DIV_SELECT /;"	d
BP_ANADIG_USB1_PLL_480_CTRL_RSVD1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_ANADIG_USB1_PLL_480_CTRL_RSVD1 /;"	d
BP_COUNT_GANG	include/zfs/spa.h	/^#define	BP_COUNT_GANG(/;"	d
BP_EQUAL	include/zfs/spa.h	/^#define	BP_EQUAL(/;"	d
BP_GET_ASIZE	include/zfs/spa.h	/^#define	BP_GET_ASIZE(/;"	d
BP_GET_BYTEORDER	include/zfs/spa.h	/^#define	BP_GET_BYTEORDER(/;"	d
BP_GET_CHECKSUM	include/zfs/spa.h	/^#define	BP_GET_CHECKSUM(/;"	d
BP_GET_COMPRESS	include/zfs/spa.h	/^#define	BP_GET_COMPRESS(/;"	d
BP_GET_DEDUP	include/zfs/spa.h	/^#define	BP_GET_DEDUP(/;"	d
BP_GET_LEVEL	include/zfs/spa.h	/^#define	BP_GET_LEVEL(/;"	d
BP_GET_LSIZE	include/zfs/spa.h	/^#define	BP_GET_LSIZE(/;"	d
BP_GET_NDVAS	include/zfs/spa.h	/^#define	BP_GET_NDVAS(/;"	d
BP_GET_PROP_BIT_61	include/zfs/spa.h	/^#define	BP_GET_PROP_BIT_61(/;"	d
BP_GET_TYPE	include/zfs/spa.h	/^#define	BP_GET_TYPE(/;"	d
BP_GET_UCSIZE	include/zfs/spa.h	/^#define	BP_GET_UCSIZE(/;"	d
BP_IDENTITY	include/zfs/spa.h	/^#define	BP_IDENTITY(/;"	d
BP_IS_GANG	include/zfs/spa.h	/^#define	BP_IS_GANG(/;"	d
BP_IS_HOLE	include/zfs/spa.h	/^#define	BP_IS_HOLE(/;"	d
BP_IS_RAIDZ	include/zfs/spa.h	/^#define	BP_IS_RAIDZ(/;"	d
BP_PHYSICAL_BIRTH	include/zfs/spa.h	/^#define	BP_PHYSICAL_BIRTH(/;"	d
BP_PMU_MISC2_AUDIO_DIV_LSB	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_PMU_MISC2_AUDIO_DIV_LSB /;"	d
BP_PMU_MISC2_AUDIO_DIV_MSB	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BP_PMU_MISC2_AUDIO_DIV_MSB /;"	d
BP_SET_BIRTH	include/zfs/spa.h	/^#define	BP_SET_BIRTH(/;"	d
BP_SET_BYTEORDER	include/zfs/spa.h	/^#define	BP_SET_BYTEORDER(/;"	d
BP_SET_CHECKSUM	include/zfs/spa.h	/^#define	BP_SET_CHECKSUM(/;"	d
BP_SET_COMPRESS	include/zfs/spa.h	/^#define	BP_SET_COMPRESS(/;"	d
BP_SET_DEDUP	include/zfs/spa.h	/^#define	BP_SET_DEDUP(/;"	d
BP_SET_LEVEL	include/zfs/spa.h	/^#define	BP_SET_LEVEL(/;"	d
BP_SET_LSIZE	include/zfs/spa.h	/^#define	BP_SET_LSIZE(/;"	d
BP_SET_PROP_BIT_61	include/zfs/spa.h	/^#define	BP_SET_PROP_BIT_61(/;"	d
BP_SET_TYPE	include/zfs/spa.h	/^#define	BP_SET_TYPE(/;"	d
BP_SPRINTF_LEN	include/zfs/spa.h	/^#define	BP_SPRINTF_LEN	/;"	d
BP_SRC_A7RCR0_A7_CORE_RESET0	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define BP_SRC_A7RCR0_A7_CORE_RESET0	/;"	d	file:
BP_SRC_A7RCR1_A7_CORE1_ENABLE	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define BP_SRC_A7RCR1_A7_CORE1_ENABLE	/;"	d	file:
BP_TAG_COMMAND_LINE	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_COMMAND_LINE	/;"	d
BP_TAG_FDT	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_FDT	/;"	d
BP_TAG_FIRST	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_FIRST	/;"	d
BP_TAG_INITRD	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_INITRD	/;"	d
BP_TAG_LAST	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_LAST	/;"	d
BP_TAG_MEMORY	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_MEMORY	/;"	d
BP_TAG_SERIAL_BAUDRATE	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_SERIAL_BAUDRATE	/;"	d
BP_TAG_SERIAL_PORT	arch/xtensa/include/asm/bootparam.h	/^#define BP_TAG_SERIAL_PORT	/;"	d
BP_VERSION	arch/xtensa/include/asm/bootparam.h	/^#define BP_VERSION /;"	d
BP_ZERO	include/zfs/spa.h	/^#define	BP_ZERO(/;"	d
BR0	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR0	/;"	d
BR00_o	drivers/video/ct69000.c	/^#define BR00_o	/;"	d	file:
BR01_o	drivers/video/ct69000.c	/^#define BR01_o	/;"	d	file:
BR02_o	drivers/video/ct69000.c	/^#define BR02_o	/;"	d	file:
BR03_o	drivers/video/ct69000.c	/^#define BR03_o	/;"	d	file:
BR04_o	drivers/video/ct69000.c	/^#define BR04_o	/;"	d	file:
BR05_o	drivers/video/ct69000.c	/^#define BR05_o	/;"	d	file:
BR06_o	drivers/video/ct69000.c	/^#define BR06_o	/;"	d	file:
BR07_o	drivers/video/ct69000.c	/^#define BR07_o	/;"	d	file:
BR08_o	drivers/video/ct69000.c	/^#define BR08_o	/;"	d	file:
BR09_o	drivers/video/ct69000.c	/^#define BR09_o	/;"	d	file:
BR0A_o	drivers/video/ct69000.c	/^#define BR0A_o	/;"	d	file:
BR1	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR1	/;"	d
BR2	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR2	/;"	d
BR3	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR3	/;"	d
BR4	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR4	/;"	d
BR5	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR5	/;"	d
BR6	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR6	/;"	d
BR7	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR7	/;"	d
BRAINMUX_LCDOG	board/ti/beagle/beagle.c	/^#define BRAINMUX_LCDOG	/;"	d	file:
BRAINMUX_LCDOGTOUCH	board/ti/beagle/beagle.c	/^#define BRAINMUX_LCDOGTOUCH	/;"	d	file:
BRANCH	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
BRBRSVCONFIG_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define BRBRSVCONFIG_VAL	/;"	d
BRBRSVCONTROL_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define BRBRSVCONTROL_VAL	/;"	d
BRCHR	arch/sh/include/asm/cpu_sh7722.h	/^#define BRCHR /;"	d
BRCNTR	arch/sh/include/asm/cpu_sh7722.h	/^#define BRCNTR /;"	d
BRCR	arch/sh/include/asm/cpu_sh7750.h	/^#define BRCR	/;"	d
BRDCFG12_SD3EN_MASK	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD3EN_MASK /;"	d
BRDCFG12_SD3EN_MASK	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD3EN_MASK	/;"	d
BRDCFG12_SD3MX_MASK	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD3MX_MASK /;"	d
BRDCFG12_SD3MX_MASK	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD3MX_MASK	/;"	d
BRDCFG12_SD3MX_SLOT5	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD3MX_SLOT5 /;"	d
BRDCFG12_SD3MX_SLOT5	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD3MX_SLOT5	/;"	d
BRDCFG12_SD3MX_SLOT6	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD3MX_SLOT6 /;"	d
BRDCFG12_SD3MX_SLOT6	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD3MX_SLOT6	/;"	d
BRDCFG12_SD4EN_MASK	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD4EN_MASK /;"	d
BRDCFG12_SD4EN_MASK	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD4EN_MASK	/;"	d
BRDCFG12_SD4MX_AURO_SATA	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD4MX_AURO_SATA /;"	d
BRDCFG12_SD4MX_AURO_SATA	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD4MX_AURO_SATA	/;"	d
BRDCFG12_SD4MX_MASK	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD4MX_MASK /;"	d
BRDCFG12_SD4MX_MASK	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD4MX_MASK	/;"	d
BRDCFG12_SD4MX_SLOT7	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD4MX_SLOT7 /;"	d
BRDCFG12_SD4MX_SLOT7	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD4MX_SLOT7	/;"	d
BRDCFG12_SD4MX_SLOT8	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG12_SD4MX_SLOT8 /;"	d
BRDCFG12_SD4MX_SLOT8	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG12_SD4MX_SLOT8	/;"	d
BRDCFG13_HDLC_LOOPBACK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG13_HDLC_LOOPBACK	/;"	d
BRDCFG13_TDM_INTERFACE	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG13_TDM_INTERFACE	/;"	d
BRDCFG13_TDM_LOOPBACK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG13_TDM_LOOPBACK	/;"	d
BRDCFG13_TDM_MASK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG13_TDM_MASK	/;"	d
BRDCFG15_DIUSEL_HDMI	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_DIUSEL_HDMI	/;"	d
BRDCFG15_DIUSEL_HDMI	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG15_DIUSEL_HDMI	/;"	d
BRDCFG15_DIUSEL_LCD	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_DIUSEL_LCD	/;"	d
BRDCFG15_DIUSEL_MASK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_DIUSEL_MASK	/;"	d
BRDCFG15_DIUSEL_MASK	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG15_DIUSEL_MASK	/;"	d
BRDCFG15_DIUSEL_TDM	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_DIUSEL_TDM	/;"	d
BRDCFG15_DIUSEL_UCC	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_DIUSEL_UCC	/;"	d
BRDCFG15_LCDFM	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_LCDFM	/;"	d
BRDCFG15_LCDPD	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_LCDPD	/;"	d
BRDCFG15_LCDPD_ENABLED	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_LCDPD_ENABLED	/;"	d
BRDCFG15_LCDPD_ENABLED	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG15_LCDPD_ENABLED	/;"	d
BRDCFG15_LCDPD_MASK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG15_LCDPD_MASK	/;"	d
BRDCFG15_LCDPD_MASK	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG15_LCDPD_MASK	/;"	d
BRDCFG1_EMI1_EN	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_EN	/;"	d	file:
BRDCFG1_EMI1_EN	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_EN	/;"	d	file:
BRDCFG1_EMI1_SEL_MASK	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_MASK	/;"	d	file:
BRDCFG1_EMI1_SEL_MASK	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_MASK	/;"	d	file:
BRDCFG1_EMI1_SEL_RGMII	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_RGMII	/;"	d	file:
BRDCFG1_EMI1_SEL_RGMII	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_RGMII	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT1	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT1	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT1	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT1	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT2	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT2	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT2	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT2	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT3	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT3	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT5	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT5	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT5	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT5	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT6	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT6	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT6	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT6	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT7	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT7	/;"	d	file:
BRDCFG1_EMI1_SEL_SLOT7	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI1_SEL_SLOT7	/;"	d	file:
BRDCFG1_EMI2_SEL_MASK	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI2_SEL_MASK	/;"	d	file:
BRDCFG1_EMI2_SEL_MASK	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI2_SEL_MASK	/;"	d	file:
BRDCFG1_EMI2_SEL_SLOT1	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI2_SEL_SLOT1	/;"	d	file:
BRDCFG1_EMI2_SEL_SLOT1	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI2_SEL_SLOT1	/;"	d	file:
BRDCFG1_EMI2_SEL_SLOT2	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG1_EMI2_SEL_SLOT2	/;"	d	file:
BRDCFG1_EMI2_SEL_SLOT2	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG1_EMI2_SEL_SLOT2	/;"	d	file:
BRDCFG2_REG_GPIO_SEL	board/freescale/corenet_ds/eth_hydra.c	/^#define BRDCFG2_REG_GPIO_SEL	/;"	d	file:
BRDCFG2_REG_GPIO_SEL	board/freescale/corenet_ds/eth_superhydra.c	/^#define BRDCFG2_REG_GPIO_SEL	/;"	d	file:
BRDCFG4_EMISEL_MASK	board/freescale/b4860qds/b4860qds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_MASK	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG4_EMISEL_MASK /;"	d
BRDCFG4_EMISEL_MASK	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG4_EMISEL_MASK	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/b4860qds/b4860qds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT /;"	d
BRDCFG4_EMISEL_SHIFT	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG4_EMISEL_SHIFT	/;"	d
BRDCFG5_IMX_DIU	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG5_IMX_DIU	/;"	d
BRDCFG5_IMX_DIU	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG5_IMX_DIU	/;"	d
BRDCFG5_IMX_MASK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG5_IMX_MASK	/;"	d
BRDCFG5_IMX_MASK	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG5_IMX_MASK	/;"	d
BRDCFG5_IRE	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG5_IRE /;"	d
BRDCFG5_IRE	board/freescale/t4qds/t4240qds_qixis.h	/^#define BRDCFG5_IRE	/;"	d
BRDCFG5_SPIRTE_MASK	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG5_SPIRTE_MASK	/;"	d
BRDCFG5_SPIRTE_SDHC	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG5_SPIRTE_SDHC	/;"	d
BRDCFG5_SPIRTE_TDM	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG5_SPIRTE_TDM	/;"	d
BRDCFG9_EPHY2_MASK	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG9_EPHY2_MASK /;"	d
BRDCFG9_EPHY2_VAL	board/freescale/t1040qds/t1040qds_qixis.h	/^#define BRDCFG9_EPHY2_VAL /;"	d
BRDCFG9_SFPTX_MASK	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define BRDCFG9_SFPTX_MASK	/;"	d
BRDCFG9_SFPTX_SHIFT	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define BRDCFG9_SFPTX_SHIFT	/;"	d
BRDCFG9_SFP_TX_EN	board/freescale/t208xqds/t208xqds_qixis.h	/^#define BRDCFG9_SFP_TX_EN	/;"	d
BRDCFG9_XFI_TX_DISABLE	board/freescale/t102xqds/t102xqds_qixis.h	/^#define BRDCFG9_XFI_TX_DISABLE	/;"	d
BRDY	drivers/usb/host/r8a66597.h	/^#define	BRDY	/;"	d
BRDY0	drivers/usb/host/r8a66597.h	/^#define	BRDY0	/;"	d
BRDY1	drivers/usb/host/r8a66597.h	/^#define	BRDY1	/;"	d
BRDY2	drivers/usb/host/r8a66597.h	/^#define	BRDY2	/;"	d
BRDY3	drivers/usb/host/r8a66597.h	/^#define	BRDY3	/;"	d
BRDY4	drivers/usb/host/r8a66597.h	/^#define	BRDY4	/;"	d
BRDY5	drivers/usb/host/r8a66597.h	/^#define	BRDY5	/;"	d
BRDY6	drivers/usb/host/r8a66597.h	/^#define	BRDY6	/;"	d
BRDY7	drivers/usb/host/r8a66597.h	/^#define	BRDY7	/;"	d
BRDY8	drivers/usb/host/r8a66597.h	/^#define	BRDY8	/;"	d
BRDY9	drivers/usb/host/r8a66597.h	/^#define	BRDY9	/;"	d
BRDYE	drivers/usb/host/r8a66597.h	/^#define	BRDYE	/;"	d
BRDYENB	drivers/usb/host/r8a66597.h	/^#define BRDYENB	/;"	d
BRDYM	drivers/usb/host/r8a66597.h	/^#define	BRDYM	/;"	d
BRDYSTS	drivers/usb/host/r8a66597.h	/^#define BRDYSTS	/;"	d
BREAK_INSTR_SIZE	arch/blackfin/lib/kgdb.h	/^#define BREAK_INSTR_SIZE	/;"	d
BREAK_TYPE	cmd/load.c	/^#define BREAK_TYPE /;"	d	file:
BRGASEL	arch/sh/include/asm/cpu_sh7722.h	/^#define BRGASEL /;"	d
BRGBSEL	arch/sh/include/asm/cpu_sh7722.h	/^#define BRGBSEL /;"	d
BRG_CLK	drivers/qe/qe.c	/^#define BRG_CLK	/;"	d	file:
BRG_INT_CLK	arch/powerpc/cpu/mpc8260/commproc.c	/^#define BRG_INT_CLK	/;"	d	file:
BRG_INT_CLK	arch/powerpc/cpu/mpc85xx/commproc.c	/^#define BRG_INT_CLK	/;"	d	file:
BRG_UART_CLK	arch/powerpc/cpu/mpc8260/commproc.c	/^#define BRG_UART_CLK	/;"	d	file:
BRG_UART_CLK	arch/powerpc/cpu/mpc85xx/commproc.c	/^#define BRG_UART_CLK	/;"	d	file:
BRIDGE_ID	include/configs/MPC8541CDS.h	/^#define BRIDGE_ID /;"	d
BRIDGE_ID	include/configs/MPC8548CDS.h	/^#define BRIDGE_ID /;"	d
BRIDGE_ID	include/configs/MPC8555CDS.h	/^#define BRIDGE_ID /;"	d
BRIGHT_START	tools/patman/terminal.py	/^    BRIGHT_START = '\\033[1;%dm'$/;"	v	class:Color
BRK	include/i8042.h	/^#define BRK	/;"	d
BROADCAST_ID	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define BROADCAST_ID	/;"	d
BROADWELL_BCLK	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define BROADWELL_BCLK	/;"	d
BROADWELL_FAMILY_ULT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define BROADWELL_FAMILY_ULT	/;"	d
BRRA	arch/sh/include/asm/cpu_sh7722.h	/^#define BRRA /;"	d
BRRB	arch/sh/include/asm/cpu_sh7722.h	/^#define BRRB /;"	d
BRR_MASK	arch/arm/include/asm/omap_mmc.h	/^#define BRR_MASK	/;"	d
BRUSH_SOLIDCOLOR	include/radeon.h	/^#define BRUSH_SOLIDCOLOR	/;"	d
BRVD	disk/part_iso.h	/^#define BRVD	/;"	d
BR_ATOM	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_ATOM	/;"	d
BR_ATOM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_ATOM_SHIFT	/;"	d
BR_AT_MSK	include/mpc8xx.h	/^#define BR_AT_MSK	/;"	d
BR_BA	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_BA	/;"	d
BR_BA_MSK	include/mpc8xx.h	/^#define BR_BA_MSK	/;"	d
BR_BA_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_BA_SHIFT	/;"	d
BR_BI	include/mpc5xx.h	/^#define BR_BI	/;"	d
BR_DECC	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_DECC	/;"	d
BR_DECC_CHK	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_DECC_CHK	/;"	d
BR_DECC_CHK_GEN	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_DECC_CHK_GEN	/;"	d
BR_DECC_OFF	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_DECC_OFF	/;"	d
BR_DECC_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_DECC_SHIFT	/;"	d
BR_LBDIR	include/mpc5xx.h	/^#define BR_LBDIR	/;"	d
BR_MSEL	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MSEL	/;"	d
BR_MSEL_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MSEL_SHIFT	/;"	d
BR_MS_FCM	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MS_FCM	/;"	d
BR_MS_GPCM	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MS_GPCM	/;"	d
BR_MS_GPCM	include/mpc8xx.h	/^#define BR_MS_GPCM	/;"	d
BR_MS_MSK	include/mpc8xx.h	/^#define BR_MS_MSK	/;"	d
BR_MS_SDRAM	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MS_SDRAM	/;"	d
BR_MS_UPMA	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MS_UPMA	/;"	d
BR_MS_UPMA	include/mpc8xx.h	/^#define BR_MS_UPMA	/;"	d
BR_MS_UPMB	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MS_UPMB	/;"	d
BR_MS_UPMB	include/mpc8xx.h	/^#define BR_MS_UPMB	/;"	d
BR_MS_UPMC	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_MS_UPMC	/;"	d
BR_PARE	include/mpc8xx.h	/^#define BR_PARE	/;"	d
BR_PHYS_ADDR	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_PHYS_ADDR(/;"	d
BR_PS	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_PS	/;"	d
BR_PS_16	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_PS_16	/;"	d
BR_PS_16	include/mpc5xx.h	/^#define BR_PS_16	/;"	d
BR_PS_16	include/mpc8xx.h	/^#define BR_PS_16	/;"	d
BR_PS_32	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_PS_32	/;"	d
BR_PS_32	include/mpc5xx.h	/^#define BR_PS_32	/;"	d
BR_PS_32	include/mpc8xx.h	/^#define BR_PS_32	/;"	d
BR_PS_8	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_PS_8	/;"	d
BR_PS_8	include/mpc5xx.h	/^#define BR_PS_8	/;"	d
BR_PS_8	include/mpc8xx.h	/^#define BR_PS_8	/;"	d
BR_PS_MSK	include/mpc8xx.h	/^#define BR_PS_MSK	/;"	d
BR_PS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_PS_SHIFT	/;"	d
BR_RES	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_RES	/;"	d
BR_SETA	include/mpc5xx.h	/^#define BR_SETA	/;"	d
BR_UPMx_TO_MSEL	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_UPMx_TO_MSEL(/;"	d
BR_V	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_V	/;"	d
BR_V	include/mpc5xx.h	/^#define BR_V	/;"	d
BR_V	include/mpc8xx.h	/^#define BR_V	/;"	d
BR_V_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_V_SHIFT	/;"	d
BR_WP	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_WP	/;"	d
BR_WP	include/mpc8xx.h	/^#define BR_WP	/;"	d
BR_WP_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_WP_SHIFT	/;"	d
BR_XBA	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_XBA	/;"	d
BR_XBA_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define BR_XBA_SHIFT	/;"	d
BRx_ATOM_MSK	include/mpc8260.h	/^#define BRx_ATOM_MSK	/;"	d
BRx_ATOM_RAWA	include/mpc8260.h	/^#define BRx_ATOM_RAWA	/;"	d
BRx_ATOM_WARA	include/mpc8260.h	/^#define BRx_ATOM_WARA	/;"	d
BRx_BA_MSK	include/mpc8260.h	/^#define BRx_BA_MSK	/;"	d
BRx_DECC_ECC	include/mpc8260.h	/^#define BRx_DECC_ECC	/;"	d
BRx_DECC_MSK	include/mpc8260.h	/^#define BRx_DECC_MSK	/;"	d
BRx_DECC_NONE	include/mpc8260.h	/^#define BRx_DECC_NONE	/;"	d
BRx_DECC_NORMAL	include/mpc8260.h	/^#define BRx_DECC_NORMAL	/;"	d
BRx_DECC_RMWPC	include/mpc8260.h	/^#define BRx_DECC_RMWPC	/;"	d
BRx_DR	include/mpc8260.h	/^#define BRx_DR	/;"	d
BRx_EMEMC	include/mpc8260.h	/^#define BRx_EMEMC	/;"	d
BRx_MS_GPCM_L	include/mpc8260.h	/^#define BRx_MS_GPCM_L	/;"	d
BRx_MS_GPCM_P	include/mpc8260.h	/^#define BRx_MS_GPCM_P	/;"	d
BRx_MS_MSK	include/mpc8260.h	/^#define BRx_MS_MSK	/;"	d
BRx_MS_SDRAM_L	include/mpc8260.h	/^#define BRx_MS_SDRAM_L	/;"	d
BRx_MS_SDRAM_P	include/mpc8260.h	/^#define BRx_MS_SDRAM_P	/;"	d
BRx_MS_UPMA	include/mpc8260.h	/^#define BRx_MS_UPMA	/;"	d
BRx_MS_UPMB	include/mpc8260.h	/^#define BRx_MS_UPMB	/;"	d
BRx_MS_UPMC	include/mpc8260.h	/^#define BRx_MS_UPMC	/;"	d
BRx_PS_16	include/mpc8260.h	/^#define BRx_PS_16	/;"	d
BRx_PS_32	include/mpc8260.h	/^#define BRx_PS_32	/;"	d
BRx_PS_64	include/mpc8260.h	/^#define BRx_PS_64	/;"	d
BRx_PS_8	include/mpc8260.h	/^#define BRx_PS_8	/;"	d
BRx_PS_MSK	include/mpc8260.h	/^#define BRx_PS_MSK	/;"	d
BRx_V	include/mpc8260.h	/^#define BRx_V	/;"	d
BRx_WP	include/mpc8260.h	/^#define BRx_WP	/;"	d
BSAAR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BSAAR1 /;"	d
BSAAR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BSAAR2 /;"	d
BSAAR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BSAAR3 /;"	d
BSACR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BSACR1 /;"	d
BSACR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BSACR2 /;"	d
BSACR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BSACR3 /;"	d
BSAYR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BSAYR1 /;"	d
BSAYR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BSAYR2 /;"	d
BSAYR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BSAYR3 /;"	d
BSC1_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define BSC1_BASE_ADDR	/;"	d
BSC1_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define BSC1_BASE_ADDR	/;"	d
BSC2_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define BSC2_BASE_ADDR	/;"	d
BSC2_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define BSC2_BASE_ADDR	/;"	d
BSC3_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define BSC3_BASE_ADDR	/;"	d
BSC3_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define BSC3_BASE_ADDR	/;"	d
BSC_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define BSC_BASE	/;"	d
BSC_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define BSC_BASE /;"	d
BSC_BASE	arch/sh/include/asm/cpu_sh7720.h	/^#define BSC_BASE	/;"	d
BSC_BASE	board/mpr2/lowlevel_init.S	/^#define BSC_BASE	/;"	d	file:
BSC_BASE	board/ms7720se/lowlevel_init.S	/^#define BSC_BASE	/;"	d	file:
BSEC_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define BSEC_BASE_ADDR /;"	d
BSIFR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BSIFR1 /;"	d
BSIFR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BSIFR2 /;"	d
BSIFR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BSIFR3 /;"	d
BSMWR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BSMWR1 /;"	d
BSMWR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BSMWR2 /;"	d
BSMWR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BSMWR3 /;"	d
BSP	common/xyzModem.c	/^#define BSP /;"	d	file:
BSP_COREID	arch/arm/include/asm/system.h	/^#define BSP_COREID	/;"	d
BSP_VS_HWPARAM	board/vscom/baltos/board.h	/^} __attribute__ ((packed)) BSP_VS_HWPARAM;$/;"	t	typeref:struct:_BSP_VS_HWPARAM
BSR_REG	drivers/net/smc91111.h	/^#define BSR_REG	/;"	d
BSSZR1	arch/sh/include/asm/cpu_sh7722.h	/^#define BSSZR1 /;"	d
BSSZR2	arch/sh/include/asm/cpu_sh7722.h	/^#define BSSZR2 /;"	d
BSSZR3	arch/sh/include/asm/cpu_sh7722.h	/^#define BSSZR3 /;"	d
BSTAR	arch/sh/include/asm/cpu_sh7722.h	/^#define BSTAR /;"	d
BSTS	drivers/usb/host/r8a66597.h	/^#define	BSTS	/;"	d
BSWPR	arch/sh/include/asm/cpu_sh7722.h	/^#define BSWPR /;"	d
BS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CKO_MARK,	BS_MARK,	RDWR_MARK,$/;"	e	enum:__anona304c1340103	file:
BS_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,$/;"	e	enum:__anona307879b0103	file:
BS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
BS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A0_MARK, BS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
BSx_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	BSx_GMARK,$/;"	e	enum:__anona307945e0103	file:
BSx_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	BSx_IMARK,$/;"	e	enum:__anona307945e0103	file:
BTN_0	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_0	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_0	/;"	d
BTN_1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_1	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_1	/;"	d
BTN_2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_2	/;"	d
BTN_3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_3	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_3	/;"	d
BTN_4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_4	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_4	/;"	d
BTN_5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_5	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_5	/;"	d
BTN_6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_6	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_6	/;"	d
BTN_7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_7	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_7	/;"	d
BTN_8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_8	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_8	/;"	d
BTN_9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_9	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_9	/;"	d
BTN_A	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_A	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_A	/;"	d
BTN_B	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_B	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_B	/;"	d
BTN_BACK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BACK	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BACK	/;"	d
BTN_BASE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE	/;"	d
BTN_BASE2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE2	/;"	d
BTN_BASE3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE3	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE3	/;"	d
BTN_BASE4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE4	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE4	/;"	d
BTN_BASE5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE5	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE5	/;"	d
BTN_BASE6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_BASE6	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_BASE6	/;"	d
BTN_C	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_C	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_C	/;"	d
BTN_DEAD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DEAD	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DEAD	/;"	d
BTN_DIGI	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DIGI	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DIGI	/;"	d
BTN_DPAD_DOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_DOWN	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_DOWN	/;"	d
BTN_DPAD_LEFT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_LEFT	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_LEFT	/;"	d
BTN_DPAD_RIGHT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_RIGHT	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_RIGHT	/;"	d
BTN_DPAD_UP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_DPAD_UP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_DPAD_UP	/;"	d
BTN_EAST	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EAST	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EAST	/;"	d
BTN_EXTRA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_EXTRA	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_EXTRA	/;"	d
BTN_FORWARD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_FORWARD	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_FORWARD	/;"	d
BTN_GAMEPAD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GAMEPAD	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GAMEPAD	/;"	d
BTN_GEAR_DOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_DOWN	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_DOWN	/;"	d
BTN_GEAR_UP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_GEAR_UP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_GEAR_UP	/;"	d
BTN_JOYSTICK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_JOYSTICK	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_JOYSTICK	/;"	d
BTN_LEFT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_LEFT	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_LEFT	/;"	d
BTN_MIDDLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MIDDLE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MIDDLE	/;"	d
BTN_MISC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MISC	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MISC	/;"	d
BTN_MODE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MODE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MODE	/;"	d
BTN_MOUSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_MOUSE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_MOUSE	/;"	d
BTN_NORTH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_NORTH	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_NORTH	/;"	d
BTN_PINKIE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_PINKIE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_PINKIE	/;"	d
BTN_RIGHT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_RIGHT	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_RIGHT	/;"	d
BTN_SELECT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SELECT	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SELECT	/;"	d
BTN_SIDE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SIDE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SIDE	/;"	d
BTN_SOUTH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_SOUTH	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_SOUTH	/;"	d
BTN_START	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_START	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_START	/;"	d
BTN_STYLUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS	/;"	d
BTN_STYLUS2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_STYLUS2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_STYLUS2	/;"	d
BTN_TASK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_TASK	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TASK	/;"	d
BTN_THUMB	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB	/;"	d
BTN_THUMB2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMB2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMB2	/;"	d
BTN_THUMBL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBL	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBL	/;"	d
BTN_THUMBR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_THUMBR	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_THUMBR	/;"	d
BTN_TL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL	/;"	d
BTN_TL2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TL2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TL2	/;"	d
BTN_TOOL_AIRBRUSH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_AIRBRUSH	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_AIRBRUSH	/;"	d
BTN_TOOL_BRUSH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_BRUSH	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_BRUSH	/;"	d
BTN_TOOL_DOUBLETAP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_DOUBLETAP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_DOUBLETAP	/;"	d
BTN_TOOL_FINGER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_FINGER	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_FINGER	/;"	d
BTN_TOOL_LENS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_LENS	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_LENS	/;"	d
BTN_TOOL_MOUSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_MOUSE	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_MOUSE	/;"	d
BTN_TOOL_PEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PEN	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PEN	/;"	d
BTN_TOOL_PENCIL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_PENCIL	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_PENCIL	/;"	d
BTN_TOOL_QUADTAP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUADTAP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUADTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_QUINTTAP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_QUINTTAP	/;"	d
BTN_TOOL_RUBBER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_RUBBER	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_RUBBER	/;"	d
BTN_TOOL_TRIPLETAP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOOL_TRIPLETAP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOOL_TRIPLETAP	/;"	d
BTN_TOP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP	/;"	d
BTN_TOP2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOP2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOP2	/;"	d
BTN_TOUCH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TOUCH	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TOUCH	/;"	d
BTN_TR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR	/;"	d
BTN_TR2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TR2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TR2	/;"	d
BTN_TRIGGER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER	/;"	d
BTN_TRIGGER_HAPPY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY	/;"	d
BTN_TRIGGER_HAPPY1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY1	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY1	/;"	d
BTN_TRIGGER_HAPPY10	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY10	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY10	/;"	d
BTN_TRIGGER_HAPPY11	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY11	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY11	/;"	d
BTN_TRIGGER_HAPPY12	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY12	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY12	/;"	d
BTN_TRIGGER_HAPPY13	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY13	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY13	/;"	d
BTN_TRIGGER_HAPPY14	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY14	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY14	/;"	d
BTN_TRIGGER_HAPPY15	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY15	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY15	/;"	d
BTN_TRIGGER_HAPPY16	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY16	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY16	/;"	d
BTN_TRIGGER_HAPPY17	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY17	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY17	/;"	d
BTN_TRIGGER_HAPPY18	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY18	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY18	/;"	d
BTN_TRIGGER_HAPPY19	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY19	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY19	/;"	d
BTN_TRIGGER_HAPPY2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY2	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY2	/;"	d
BTN_TRIGGER_HAPPY20	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY20	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY20	/;"	d
BTN_TRIGGER_HAPPY21	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY21	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY21	/;"	d
BTN_TRIGGER_HAPPY22	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY22	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY22	/;"	d
BTN_TRIGGER_HAPPY23	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY23	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY23	/;"	d
BTN_TRIGGER_HAPPY24	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY24	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY24	/;"	d
BTN_TRIGGER_HAPPY25	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY25	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY25	/;"	d
BTN_TRIGGER_HAPPY26	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY26	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY26	/;"	d
BTN_TRIGGER_HAPPY27	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY27	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY27	/;"	d
BTN_TRIGGER_HAPPY28	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY28	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY28	/;"	d
BTN_TRIGGER_HAPPY29	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY29	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY29	/;"	d
BTN_TRIGGER_HAPPY3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY3	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY3	/;"	d
BTN_TRIGGER_HAPPY30	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY30	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY30	/;"	d
BTN_TRIGGER_HAPPY31	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY31	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY31	/;"	d
BTN_TRIGGER_HAPPY32	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY32	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY32	/;"	d
BTN_TRIGGER_HAPPY33	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY33	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY33	/;"	d
BTN_TRIGGER_HAPPY34	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY34	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY34	/;"	d
BTN_TRIGGER_HAPPY35	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY35	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY35	/;"	d
BTN_TRIGGER_HAPPY36	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY36	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY36	/;"	d
BTN_TRIGGER_HAPPY37	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY37	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY37	/;"	d
BTN_TRIGGER_HAPPY38	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY38	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY38	/;"	d
BTN_TRIGGER_HAPPY39	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY39	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY39	/;"	d
BTN_TRIGGER_HAPPY4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY4	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY4	/;"	d
BTN_TRIGGER_HAPPY40	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY40	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY40	/;"	d
BTN_TRIGGER_HAPPY5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY5	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY5	/;"	d
BTN_TRIGGER_HAPPY6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY6	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY6	/;"	d
BTN_TRIGGER_HAPPY7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY7	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY7	/;"	d
BTN_TRIGGER_HAPPY8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY8	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY8	/;"	d
BTN_TRIGGER_HAPPY9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_TRIGGER_HAPPY9	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_TRIGGER_HAPPY9	/;"	d
BTN_WEST	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WEST	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WEST	/;"	d
BTN_WHEEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_WHEEL	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_WHEEL	/;"	d
BTN_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_X	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_X	/;"	d
BTN_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Y	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Y	/;"	d
BTN_Z	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTN_Z	include/dt-bindings/input/linux-event-codes.h	/^#define BTN_Z	/;"	d
BTPSR	arch/sh/include/asm/cpu_sh7722.h	/^#define BTPSR /;"	d
BTUART_BASE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	BTUART_BASE	/;"	d
BTUART_INDEX	drivers/serial/serial_pxa.c	/^#define	BTUART_INDEX	/;"	d	file:
BT_NPWD	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	BT_NPWD,$/;"	e	enum:qn	file:
BUC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define BUC	/;"	d
BUC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define BUC	/;"	d
BUCK1	test/dm/regulator.c	/^	BUCK1,$/;"	e	enum:__anone475d93a0103	file:
BUCK2	test/dm/regulator.c	/^	BUCK2,$/;"	e	enum:__anone475d93a0103	file:
BUCK_EN_MASK	include/power/act8846_pmic.h	/^#define BUCK_EN_MASK /;"	d
BUCK_OM_COUNT	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_COUNT	/;"	d
BUCK_OM_COUNT	include/power/sandbox_pmic.h	/^	BUCK_OM_COUNT,$/;"	e	enum:__anon64fe6be10303
BUCK_OM_OFF	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_OFF	/;"	d
BUCK_OM_OFF	include/power/sandbox_pmic.h	/^	BUCK_OM_OFF = 0,$/;"	e	enum:__anon64fe6be10303
BUCK_OM_ON	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_ON	/;"	d
BUCK_OM_ON	include/power/sandbox_pmic.h	/^	BUCK_OM_ON,$/;"	e	enum:__anon64fe6be10303
BUCK_OM_PWM	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	include/dt-bindings/pmic/sandbox_pmic.h	/^#define BUCK_OM_PWM	/;"	d
BUCK_OM_PWM	include/power/sandbox_pmic.h	/^	BUCK_OM_PWM,$/;"	e	enum:__anon64fe6be10303
BUCK_VOL_MASK	include/power/act8846_pmic.h	/^#define BUCK_VOL_MASK /;"	d
BUCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define BUCR(/;"	d
BUCSR	arch/powerpc/include/asm/processor.h	/^#define BUCSR	/;"	d
BUCSR_BBFI	arch/powerpc/include/asm/processor.h	/^#define	  BUCSR_BBFI	/;"	d
BUCSR_BPEN	arch/powerpc/include/asm/processor.h	/^#define	  BUCSR_BPEN	/;"	d
BUCSR_ENABLE	arch/powerpc/include/asm/processor.h	/^#define   BUCSR_ENABLE /;"	d
BUCSR_LS_EN	arch/powerpc/include/asm/processor.h	/^#define	  BUCSR_LS_EN	/;"	d
BUCSR_STAC_EN	arch/powerpc/include/asm/processor.h	/^#define	  BUCSR_STAC_EN	/;"	d
BUFFER_SIZE	board/bf533-ezkit/flash-defines.h	/^#define BUFFER_SIZE	/;"	d
BUFFER_TOO_SMALL	drivers/bios_emulator/bios.c	/^#define BUFFER_TOO_SMALL /;"	d	file:
BUFLEN	arch/arm/mach-orion5x/cpu.c	/^#define BUFLEN	/;"	d	file:
BUFMAX	arch/blackfin/lib/kgdb.h	/^#define BUFMAX /;"	d
BUFMAX	common/kgdb.c	/^#define BUFMAX /;"	d	file:
BUFNMB	drivers/usb/host/r8a66597.h	/^#define	BUFNMB	/;"	d
BUFNO_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define BUFNO_MASK	/;"	d	file:
BUFNO_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define BUFNO_SHIFT	/;"	d	file:
BUFRDERR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	BUFRDERR	/;"	d
BUFSIZ	tools/xway-swap-bytes.c	/^# define BUFSIZ /;"	d	file:
BUFSIZE	board/samsung/origen/tools/mkorigenspl.c	/^#define BUFSIZE	/;"	d	file:
BUFSIZE	board/samsung/smdkv310/tools/mksmdkv310spl.c	/^#define BUFSIZE	/;"	d	file:
BUFSIZE	drivers/usb/host/r8a66597.h	/^#define	BUFSIZE	/;"	d
BUFWRERR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	BUFWRERR	/;"	d
BUF_ACC_ATYP	drivers/mmc/sh_mmcif.h	/^#define BUF_ACC_ATYP	/;"	d
BUF_ACC_BUSW_16	drivers/mmc/sh_mmcif.h	/^#define BUF_ACC_BUSW_16	/;"	d
BUF_ACC_BUSW_32	drivers/mmc/sh_mmcif.h	/^#define BUF_ACC_BUSW_32	/;"	d
BUF_ACC_DMAREN	drivers/mmc/sh_mmcif.h	/^#define BUF_ACC_DMAREN	/;"	d
BUF_ACC_DMAWEN	drivers/mmc/sh_mmcif.h	/^#define BUF_ACC_DMAWEN	/;"	d
BUF_CLR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BUF_CLR	/;"	d
BUF_CLR	arch/arm/mach-exynos/include/mach/dp.h	/^#define BUF_CLR	/;"	d
BUF_DATA_COUNT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BUF_DATA_COUNT(/;"	d
BUF_DATA_COUNT	arch/arm/mach-exynos/include/mach/dp.h	/^#define BUF_DATA_COUNT(/;"	d
BUF_DOUBLE	include/linux/usb/musb.h	/^	BUF_DOUBLE$/;"	e	enum:musb_buf_mode
BUF_HAVE_DATA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define BUF_HAVE_DATA	/;"	d
BUF_OWNED_BY_DMA	drivers/net/armada100_fec.h	/^#define BUF_OWNED_BY_DMA /;"	d
BUF_SINGLE	include/linux/usb/musb.h	/^	BUF_SINGLE,$/;"	e	enum:musb_buf_mode
BUF_SIZE	common/spl/spl_ymodem.c	/^#define BUF_SIZE /;"	d	file:
BUF_SIZE	scripts/kconfig/lxdialog/dialog.h	/^#define BUF_SIZE /;"	d
BUF_STATE_BUSY	drivers/usb/gadget/storage_common.c	/^	BUF_STATE_BUSY$/;"	e	enum:fsg_buffer_state	file:
BUF_STATE_EMPTY	drivers/usb/gadget/storage_common.c	/^	BUF_STATE_EMPTY = 0,$/;"	e	enum:fsg_buffer_state	file:
BUF_STATE_FULL	drivers/usb/gadget/storage_common.c	/^	BUF_STATE_FULL,$/;"	e	enum:fsg_buffer_state	file:
BUF_STEP	board/amcc/makalu/cmd_pll.c	/^#define BUF_STEP	/;"	d	file:
BUF_SZ	examples/api/demo.c	/^#define BUF_SZ	/;"	d	file:
BUG	fs/yaffs2/yportenv.h	/^#define BUG(/;"	d
BUG	include/common.h	/^#define BUG(/;"	d
BUG	include/linux/compat.h	/^#define BUG(/;"	d
BUG_ON	include/common.h	/^#define BUG_ON(/;"	d
BUG_ON	include/linux/compat.h	/^#define BUG_ON(/;"	d
BUILDIO_IOPORT	arch/mips/include/asm/io.h	/^#define BUILDIO_IOPORT(/;"	d
BUILDIO_MEM	arch/mips/include/asm/io.h	/^#define BUILDIO_MEM(/;"	d
BUILDIO_MEM	arch/mips/include/asm/io.h	/^BUILDIO_MEM(b, u8)$/;"	f
BUILDSTRING	arch/mips/include/asm/io.h	/^#define BUILDSTRING(/;"	d
BUILD_BUG	include/linux/bug.h	/^#define BUILD_BUG(/;"	d
BUILD_BUG_ON	include/linux/bug.h	/^#define BUILD_BUG_ON(/;"	d
BUILD_BUG_ON_INVALID	include/linux/bug.h	/^#define BUILD_BUG_ON_INVALID(/;"	d
BUILD_BUG_ON_NOT_POWER_OF_2	include/linux/bug.h	/^#define BUILD_BUG_ON_NOT_POWER_OF_2(/;"	d
BUILD_BUG_ON_NULL	include/linux/bug.h	/^#define BUILD_BUG_ON_NULL(/;"	d
BUILD_BUG_ON_ZERO	include/linux/bug.h	/^#define BUILD_BUG_ON_ZERO(/;"	d
BUILD_CLRSETBITS	arch/mips/include/asm/io.h	/^#define BUILD_CLRSETBITS(/;"	d
BUILD_SPI_FIFO_RW	drivers/spi/pic32_spi.c	/^#define BUILD_SPI_FIFO_RW(/;"	d	file:
BULK	include/usbdescriptors.h	/^#define BULK	/;"	d
BULK_ERASE	include/linux/mtd/st_smi.h	/^#define BULK_ERASE	/;"	d
BULK_FIFO_SIZE	drivers/usb/gadget/pxa25x_udc.h	/^#define BULK_FIFO_SIZE	/;"	d
BULK_IN_BUFNUM	drivers/usb/host/r8a66597.h	/^#define BULK_IN_BUFNUM	/;"	d
BULK_IN_DLY	drivers/usb/eth/smsc95xx.c	/^#define BULK_IN_DLY	/;"	d	file:
BULK_IN_EP	drivers/usb/host/xhci.h	/^#define BULK_IN_EP	/;"	d
BULK_IN_PIPENUM	drivers/usb/host/r8a66597.h	/^#define BULK_IN_PIPENUM	/;"	d
BULK_OUT_BUFNUM	drivers/usb/host/r8a66597.h	/^#define BULK_OUT_BUFNUM	/;"	d
BULK_OUT_EP	drivers/usb/host/xhci.h	/^#define BULK_OUT_EP	/;"	d
BULK_OUT_PIPENUM	drivers/usb/host/r8a66597.h	/^#define BULK_OUT_PIPENUM	/;"	d
BULK_TO	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define BULK_TO	/;"	d	file:
BULK_TO	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define BULK_TO	/;"	d	file:
BULK_TO	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define BULK_TO	/;"	d	file:
BULK_TO	drivers/usb/host/ohci-s3c24xx.c	/^#define BULK_TO	/;"	d	file:
BURST	drivers/usb/host/r8a66597.h	/^#define	BURST	/;"	d
BURSTCOMPLETE_GROUP7	arch/arm/include/asm/arch-omap3/cpu.h	/^#define BURSTCOMPLETE_GROUP7	/;"	d
BURSTLENGTH4	arch/arm/include/asm/arch-omap3/cpu.h	/^#define BURSTLENGTH4	/;"	d
BURSTLENGTH_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define BURSTLENGTH_SHIFT	/;"	d
BURST_CAP	drivers/usb/eth/smsc95xx.c	/^#define BURST_CAP	/;"	d	file:
BURST_EN	board/mpl/vcma9/lowlevel_init.S	/^#define BURST_EN	/;"	d	file:
BURST_INCR	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define BURST_INCR	/;"	d
BURST_INCR16	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define BURST_INCR16	/;"	d
BURST_INCR4	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define BURST_INCR4	/;"	d
BURST_INCR8	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define BURST_INCR8	/;"	d
BURST_LEN_4	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define BURST_LEN_4	/;"	d	file:
BURST_SINGLE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define BURST_SINGLE	/;"	d
BURST_SIZE_WORDS	board/micronas/vct/ebi_onenand.c	/^#define BURST_SIZE_WORDS	/;"	d	file:
BUR_COMMON_ENV	include/configs/bur_cfg_common.h	/^#define BUR_COMMON_ENV /;"	d
BUSBUSY	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	BUSBUSY	/;"	d
BUSDIV	arch/m68k/cpu/mcf532x/speed.c	/^#define BUSDIV	/;"	d	file:
BUSERROR	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define BUSERROR	/;"	d
BUSIF_RD_CG_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define BUSIF_RD_CG_EN	/;"	d
BUSIF_WR_CG_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define BUSIF_WR_CG_EN	/;"	d
BUSRDTORD_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define BUSRDTORD_SHIFT	/;"	d
BUSRDTOWR_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define BUSRDTOWR_SHIFT	/;"	d
BUSTURNAROUND	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define BUSTURNAROUND(/;"	d
BUSTYPE_CBUS	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_CBUS	/;"	d
BUSTYPE_CBUSII	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_CBUSII	/;"	d
BUSTYPE_EISA	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_EISA	/;"	d
BUSTYPE_FUTURE	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_FUTURE	/;"	d
BUSTYPE_INTERN	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_INTERN	/;"	d
BUSTYPE_ISA	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_ISA	/;"	d
BUSTYPE_MBI	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_MBI	/;"	d
BUSTYPE_MBII	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_MBII	/;"	d
BUSTYPE_MCA	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_MCA	/;"	d
BUSTYPE_MPI	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_MPI	/;"	d
BUSTYPE_MPSA	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_MPSA	/;"	d
BUSTYPE_NUBUS	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_NUBUS	/;"	d
BUSTYPE_PCI	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_PCI	/;"	d
BUSTYPE_PCMCIA	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_PCMCIA	/;"	d
BUSTYPE_TC	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_TC	/;"	d
BUSTYPE_VL	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_VL	/;"	d
BUSTYPE_VME	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_VME	/;"	d
BUSTYPE_XPRESS	arch/x86/include/asm/mpspec.h	/^#define BUSTYPE_XPRESS	/;"	d
BUSWRTORD_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define BUSWRTORD_SHIFT	/;"	d
BUSY	include/dataflash.h	/^#define BUSY	/;"	d
BUSY_STATE	lib/zlib/deflate.h	/^#define BUSY_STATE /;"	d
BUS_AGP_AD_STEPPING_EN	include/radeon.h	/^#define BUS_AGP_AD_STEPPING_EN	/;"	d
BUS_CNTL	include/radeon.h	/^#define BUS_CNTL	/;"	d
BUS_CNTL1	include/radeon.h	/^#define BUS_CNTL1	/;"	d
BUS_CNTL1_AGPCLK_VALID	include/radeon.h	/^#define BUS_CNTL1_AGPCLK_VALID	/;"	d
BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK	include/radeon.h	/^#define BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK	/;"	d
BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT	include/radeon.h	/^#define BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT	/;"	d
BUS_CNTL1__AGPCLK_VALID	include/radeon.h	/^#define BUS_CNTL1__AGPCLK_VALID	/;"	d
BUS_CNTL1__AGPCLK_VALID_MASK	include/radeon.h	/^#define BUS_CNTL1__AGPCLK_VALID_MASK	/;"	d
BUS_CNTL1__AGPCLK_VALID__SHIFT	include/radeon.h	/^#define BUS_CNTL1__AGPCLK_VALID__SHIFT	/;"	d
BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS	include/radeon.h	/^#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS	/;"	d
BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS_MASK	include/radeon.h	/^#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS_MASK /;"	d
BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS__SHIFT	include/radeon.h	/^#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS__SHIFT /;"	d
BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS	include/radeon.h	/^#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS	/;"	d
BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS_MASK	include/radeon.h	/^#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS_MASK	/;"	d
BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS__SHIFT	include/radeon.h	/^#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS__SHIFT	/;"	d
BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE	include/radeon.h	/^#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE	/;"	d
BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE_MASK	include/radeon.h	/^#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE_MASK	/;"	d
BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE__SHIFT	include/radeon.h	/^#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE__SHIFT	/;"	d
BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS	include/radeon.h	/^#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS	/;"	d
BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS_MASK	include/radeon.h	/^#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS_MASK	/;"	d
BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS__SHIFT	include/radeon.h	/^#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS__SHIFT	/;"	d
BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS	include/radeon.h	/^#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS	/;"	d
BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS_MASK	include/radeon.h	/^#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS_MASK	/;"	d
BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS__SHIFT	include/radeon.h	/^#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS__SHIFT	/;"	d
BUS_CNTL1__MOBILE_PLATFORM_SEL_MASK	include/radeon.h	/^#define BUS_CNTL1__MOBILE_PLATFORM_SEL_MASK	/;"	d
BUS_CNTL1__MOBILE_PLATFORM_SEL__SHIFT	include/radeon.h	/^#define BUS_CNTL1__MOBILE_PLATFORM_SEL__SHIFT	/;"	d
BUS_CNTL1__PMI_BM_DISABLE	include/radeon.h	/^#define BUS_CNTL1__PMI_BM_DISABLE	/;"	d
BUS_CNTL1__PMI_BM_DISABLE_MASK	include/radeon.h	/^#define BUS_CNTL1__PMI_BM_DISABLE_MASK	/;"	d
BUS_CNTL1__PMI_BM_DISABLE__SHIFT	include/radeon.h	/^#define BUS_CNTL1__PMI_BM_DISABLE__SHIFT	/;"	d
BUS_CNTL1__PMI_INT_DISABLE	include/radeon.h	/^#define BUS_CNTL1__PMI_INT_DISABLE	/;"	d
BUS_CNTL1__PMI_INT_DISABLE_MASK	include/radeon.h	/^#define BUS_CNTL1__PMI_INT_DISABLE_MASK	/;"	d
BUS_CNTL1__PMI_INT_DISABLE__SHIFT	include/radeon.h	/^#define BUS_CNTL1__PMI_INT_DISABLE__SHIFT	/;"	d
BUS_CNTL1__PMI_IO_DISABLE	include/radeon.h	/^#define BUS_CNTL1__PMI_IO_DISABLE	/;"	d
BUS_CNTL1__PMI_IO_DISABLE_MASK	include/radeon.h	/^#define BUS_CNTL1__PMI_IO_DISABLE_MASK	/;"	d
BUS_CNTL1__PMI_IO_DISABLE__SHIFT	include/radeon.h	/^#define BUS_CNTL1__PMI_IO_DISABLE__SHIFT	/;"	d
BUS_CNTL1__PMI_MEM_DISABLE	include/radeon.h	/^#define BUS_CNTL1__PMI_MEM_DISABLE	/;"	d
BUS_CNTL1__PMI_MEM_DISABLE_MASK	include/radeon.h	/^#define BUS_CNTL1__PMI_MEM_DISABLE_MASK	/;"	d
BUS_CNTL1__PMI_MEM_DISABLE__SHIFT	include/radeon.h	/^#define BUS_CNTL1__PMI_MEM_DISABLE__SHIFT	/;"	d
BUS_CNTL1__SEND_SBA_LATENCY_MASK	include/radeon.h	/^#define BUS_CNTL1__SEND_SBA_LATENCY_MASK	/;"	d
BUS_CNTL1__SEND_SBA_LATENCY__SHIFT	include/radeon.h	/^#define BUS_CNTL1__SEND_SBA_LATENCY__SHIFT	/;"	d
BUS_DBL_RESYNC	include/radeon.h	/^#define BUS_DBL_RESYNC	/;"	d
BUS_DIS_ROM	include/radeon.h	/^#define BUS_DIS_ROM	/;"	d
BUS_DMA	drivers/block/sata_dwc.h	/^	BUS_DMA			= 1,$/;"	e	enum:__anone5f668490203
BUS_EDD	drivers/block/sata_dwc.h	/^	BUS_EDD			= 7,$/;"	e	enum:__anone5f668490203
BUS_FLUSH_BUF	include/radeon.h	/^#define BUS_FLUSH_BUF	/;"	d
BUS_IDENTIFY	drivers/block/sata_dwc.h	/^	BUS_IDENTIFY		= 8,$/;"	e	enum:__anone5f668490203
BUS_IDLE	drivers/block/sata_dwc.h	/^	BUS_IDLE		= 2,$/;"	e	enum:__anone5f668490203
BUS_MASK_16BIT	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define BUS_MASK_16BIT	/;"	d
BUS_MASK_16BIT_ECC	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define BUS_MASK_16BIT_ECC	/;"	d
BUS_MASK_16BIT_ECC_PUP3	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define BUS_MASK_16BIT_ECC_PUP3	/;"	d
BUS_MASK_32BIT	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define BUS_MASK_32BIT	/;"	d
BUS_MASK_32BIT_ECC	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define BUS_MASK_32BIT_ECC	/;"	d
BUS_MASTER_DIS	include/radeon.h	/^#define BUS_MASTER_DIS	/;"	d
BUS_MODE_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define             BUS_MODE_MASK /;"	d
BUS_MSTR_DISCONNECT_EN	include/radeon.h	/^#define BUS_MSTR_DISCONNECT_EN	/;"	d
BUS_MSTR_RD_LINE	include/radeon.h	/^#define BUS_MSTR_RD_LINE	/;"	d
BUS_MSTR_RD_MULT	include/radeon.h	/^#define BUS_MSTR_RD_MULT	/;"	d
BUS_MSTR_RESET	include/radeon.h	/^#define BUS_MSTR_RESET	/;"	d
BUS_MSTR_WS	include/radeon.h	/^#define BUS_MSTR_WS	/;"	d
BUS_NODATA	drivers/block/sata_dwc.h	/^	BUS_NODATA		= 4,$/;"	e	enum:__anone5f668490203
BUS_NOINTR	drivers/block/sata_dwc.h	/^	BUS_NOINTR		= 3,$/;"	e	enum:__anone5f668490203
BUS_PACKET	drivers/block/sata_dwc.h	/^	BUS_PACKET		= 9,$/;"	e	enum:__anone5f668490203
BUS_PARKING_DIS	include/radeon.h	/^#define BUS_PARKING_DIS	/;"	d
BUS_PCI_READ_RETRY_EN	include/radeon.h	/^#define BUS_PCI_READ_RETRY_EN	/;"	d
BUS_PCI_WRT_RETRY_EN	include/radeon.h	/^#define BUS_PCI_WRT_RETRY_EN	/;"	d
BUS_PIO	drivers/block/sata_dwc.h	/^	BUS_PIO			= 6,$/;"	e	enum:__anone5f668490203
BUS_RDY_READ_DLY	include/radeon.h	/^#define BUS_RDY_READ_DLY	/;"	d
BUS_RD_ABORT_EN	include/radeon.h	/^#define BUS_RD_ABORT_EN	/;"	d
BUS_RD_DISCARD_EN	include/radeon.h	/^#define BUS_RD_DISCARD_EN	/;"	d
BUS_READ_BURST	include/radeon.h	/^#define BUS_READ_BURST	/;"	d
BUS_ROM_WRT_EN	include/radeon.h	/^#define BUS_ROM_WRT_EN	/;"	d
BUS_ROTATION_DIS	include/radeon.h	/^#define BUS_ROTATION_DIS	/;"	d
BUS_STOP_REQ_DIS	include/radeon.h	/^#define BUS_STOP_REQ_DIS	/;"	d
BUS_SUBTRACTIVE_DECODE	arch/x86/include/asm/mpspec.h	/^#define BUS_SUBTRACTIVE_DECODE	/;"	d
BUS_SUSPEND	include/radeon.h	/^#define BUS_SUSPEND	/;"	d
BUS_TIMER	drivers/block/sata_dwc.h	/^	BUS_TIMER		= 5,$/;"	e	enum:__anone5f668490203
BUS_UNKNOWN	drivers/block/sata_dwc.h	/^	BUS_UNKNOWN		= 0,$/;"	e	enum:__anone5f668490203
BUS_WIDTH	board/synopsys/axs10x/nand.c	/^#define BUS_WIDTH	/;"	d	file:
BUS_WIDTH	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define BUS_WIDTH	/;"	d
BUS_WIDTH	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define BUS_WIDTH /;"	d
BUS_WIDTH_16	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	BUS_WIDTH_16,$/;"	e	enum:hws_bus_width
BUS_WIDTH_16	drivers/net/ax88180.h	/^#define BUS_WIDTH_16	/;"	d
BUS_WIDTH_32	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	BUS_WIDTH_32$/;"	e	enum:hws_bus_width
BUS_WIDTH_32	drivers/net/ax88180.h	/^#define BUS_WIDTH_32	/;"	d
BUS_WIDTH_4	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	BUS_WIDTH_4,$/;"	e	enum:hws_bus_width
BUS_WIDTH_8	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	BUS_WIDTH_8,$/;"	e	enum:hws_bus_width
BUS_WIDTH_ECC_TWSI_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define BUS_WIDTH_ECC_TWSI_ADDR	/;"	d
BUS_WIDTH_ECC_TWSI_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define BUS_WIDTH_ECC_TWSI_ADDR	/;"	d
BUS_WIDTH_IN_BITS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define BUS_WIDTH_IN_BITS	/;"	d
BUS_WRT_BURST	include/radeon.h	/^#define BUS_WRT_BURST	/;"	d
BUTTON_PAD_CTRL	board/boundary/nitrogen6x/nitrogen6x.c	/^#define BUTTON_PAD_CTRL /;"	d	file:
BUTTON_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define BUTTON_PAD_CTRL	/;"	d	file:
BUZZER	board/teejet/mt_ventoux/mt_ventoux.c	/^#define BUZZER	/;"	d	file:
BUZZER_GPT	board/inka4x0/inkadiag.c	/^#define BUZZER_GPT	/;"	d	file:
BVAL	drivers/usb/host/r8a66597.h	/^#define	BVAL	/;"	d
BV_ANADIG_PLL_528_BYPASS_CLK_SRC__ANACLK_1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_528_BYPASS_CLK_SRC__ANACLK_1 /;"	d
BV_ANADIG_PLL_528_BYPASS_CLK_SRC__ANACLK_2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_528_BYPASS_CLK_SRC__ANACLK_2 /;"	d
BV_ANADIG_PLL_528_BYPASS_CLK_SRC__OSC_24M	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_528_BYPASS_CLK_SRC__OSC_24M /;"	d
BV_ANADIG_PLL_528_BYPASS_CLK_SRC__XOR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_528_BYPASS_CLK_SRC__XOR /;"	d
BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__ANACLK_1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__ANACLK_1 /;"	d
BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__ANACLK_2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__ANACLK_2 /;"	d
BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__OSC_24M	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__OSC_24M /;"	d
BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__XOR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC__XOR /;"	d
BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__ANACLK_1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__ANACLK_1 /;"	d
BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__ANACLK_2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__ANACLK_2 /;"	d
BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__OSC_24M	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__OSC_24M /;"	d
BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__XOR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_ENET_BYPASS_CLK_SRC__XOR /;"	d
BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__ANACLK_1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__ANACLK_1 /;"	d
BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__ANACLK_2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__ANACLK_2 /;"	d
BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__OSC_24M	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__OSC_24M /;"	d
BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__XOR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_SYS_BYPASS_CLK_SRC__XOR /;"	d
BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__ANACLK_1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__ANACLK_1 /;"	d
BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__ANACLK_2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__ANACLK_2 /;"	d
BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__OSC_24M	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__OSC_24M /;"	d
BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__XOR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_PLL_VIDEO_BYPASS_CLK_SRC__XOR /;"	d
BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__ANACLK_1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__ANACLK_1 /;"	d
BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__ANACLK_2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__ANACLK_2 /;"	d
BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__OSC_24M	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__OSC_24M /;"	d
BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__XOR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define BV_ANADIG_USB1_PLL_480_CTRL_BYPASS_CLK_SRC__XOR /;"	d
BV_CTRL_WR_UNLOCK_KEY	drivers/misc/mxc_ocotp.c	/^#define BV_CTRL_WR_UNLOCK_KEY	/;"	d	file:
BV_TIMING_FSOURCE_NS	drivers/misc/mxc_ocotp.c	/^#define BV_TIMING_FSOURCE_NS /;"	d	file:
BV_TIMING_PROG_US	drivers/misc/mxc_ocotp.c	/^#define BV_TIMING_PROG_US /;"	d	file:
BV_TIMING_RELAX_NS	drivers/misc/mxc_ocotp.c	/^#define BV_TIMING_RELAX_NS	/;"	d	file:
BV_TIMING_STROBE_PROG_US	drivers/misc/mxc_ocotp.c	/^#define BV_TIMING_STROBE_PROG_US	/;"	d	file:
BV_TIMING_STROBE_READ_NS	drivers/misc/mxc_ocotp.c	/^#define BV_TIMING_STROBE_READ_NS	/;"	d	file:
BWF_EN	drivers/usb/eth/r8152.h	/^#define BWF_EN	/;"	d
BWR_MASK	arch/arm/include/asm/omap_mmc.h	/^#define BWR_MASK	/;"	d
BWSCON	board/mpl/vcma9/lowlevel_init.S	/^#define BWSCON	/;"	d	file:
BWSCON	board/samsung/smdk2410/lowlevel_init.S	/^#define BWSCON	/;"	d	file:
BW_LIMITER_BW_FRAC_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define BW_LIMITER_BW_FRAC_MASK /;"	d
BW_LIMITER_BW_INT_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define BW_LIMITER_BW_INT_MASK /;"	d
BW_LIMITER_BW_WATERMARK_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define BW_LIMITER_BW_WATERMARK_MASK /;"	d
BW_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define BW_PHY_REG	/;"	d
BX50V3_BOOTARGS_EXTRA	include/configs/ge_bx50v3.h	/^#define BX50V3_BOOTARGS_EXTRA	/;"	d
BX50V3_BOOTARGS_EXTRA	include/configs/ge_bx50v3.h	/^#define BX50V3_BOOTARGS_EXTRA$/;"	d
BYPASS	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define BYPASS	/;"	d
BYPASS_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define BYPASS_EN	/;"	d
BYP_CAL_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define BYP_CAL_MASK	/;"	d	file:
BYTE	lib/lz4_wrapper.c	/^typedef  uint8_t BYTE;$/;"	t	typeref:typename:uint8_t	file:
BYTEBITS	lib/zlib/inflate.c	/^#define BYTEBITS(/;"	d	file:
BYTEMASK_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define BYTEMASK_MASK /;"	d
BYTES2MAXP	drivers/usb/gadget/dwc2_udc_otg.c	/^#define BYTES2MAXP(/;"	d	file:
BYTES_PER_BLOCK	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define BYTES_PER_BLOCK /;"	d	file:
BYTES_PER_DOT	drivers/usb/gadget/f_fastboot.c	/^#define BYTES_PER_DOT	/;"	d	file:
BYTES_PER_LONG	drivers/video/mxc_ipuv3_fb.c	/^#define BYTES_PER_LONG /;"	d	file:
BYTES_PER_PAGE	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define BYTES_PER_PAGE /;"	d	file:
BYTES_PER_PANEL	drivers/video/pxa_lcd.c	/^	#define BYTES_PER_PANEL	/;"	d	file:
BYTE_BIG	drivers/usb/host/r8a66597.h	/^#define	  BYTE_BIG	/;"	d
BYTE_BUS_8	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                BYTE_BUS_8 /;"	d
BYTE_COPY_FWD	arch/x86/lib/string.c	/^#define BYTE_COPY_FWD(/;"	d	file:
BYTE_EN	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define BYTE_EN	/;"	d
BYTE_EN_BYTE	drivers/usb/eth/r8152.h	/^#define BYTE_EN_BYTE	/;"	d
BYTE_EN_DWORD	drivers/usb/eth/r8152.h	/^#define BYTE_EN_DWORD	/;"	d
BYTE_EN_END_MASK	drivers/usb/eth/r8152.h	/^#define BYTE_EN_END_MASK	/;"	d
BYTE_EN_SIX_BYTES	drivers/usb/eth/r8152.h	/^#define BYTE_EN_SIX_BYTES	/;"	d
BYTE_EN_START_MASK	drivers/usb/eth/r8152.h	/^#define BYTE_EN_START_MASK	/;"	d
BYTE_EN_WORD	drivers/usb/eth/r8152.h	/^#define BYTE_EN_WORD	/;"	d
BYTE_LITTLE	drivers/usb/host/r8a66597.h	/^#define	  BYTE_LITTLE	/;"	d
BYTE_MODE	arch/arm/include/asm/omap_mmc.h	/^#define BYTE_MODE	/;"	d
BYTE_ORDER_LSB_TO_MSB	include/radeon.h	/^#define BYTE_ORDER_LSB_TO_MSB	/;"	d
BYTE_ORDER_MSB_TO_LSB	include/radeon.h	/^#define BYTE_ORDER_MSB_TO_LSB	/;"	d
BYTE_RDLVL_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define BYTE_RDLVL_EN	/;"	d
BYTE_SWAP_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define BYTE_SWAP_MASK	/;"	d
BYTE_SWAP_NOSWAP	arch/arm/include/asm/arch-tegra/dc.h	/^	BYTE_SWAP_NOSWAP,$/;"	e	enum:__anonf53c9cce0a03
BYTE_SWAP_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define BYTE_SWAP_SHIFT	/;"	d
BYTE_SWAP_SWAP2	arch/arm/include/asm/arch-tegra/dc.h	/^	BYTE_SWAP_SWAP2,$/;"	e	enum:__anonf53c9cce0a03
BYTE_SWAP_SWAP4	arch/arm/include/asm/arch-tegra/dc.h	/^	BYTE_SWAP_SWAP4,$/;"	e	enum:__anonf53c9cce0a03
BYTE_SWAP_SWAP4HW	arch/arm/include/asm/arch-tegra/dc.h	/^	BYTE_SWAP_SWAP4HW$/;"	e	enum:__anonf53c9cce0a03
BYTE_TEST	board/micronas/vct/smc_eeprom.c	/^#define BYTE_TEST	/;"	d	file:
BYTE_TEST	drivers/net/smc911x.h	/^#define BYTE_TEST	/;"	d
BYTE_TIME_FULLSPEED	drivers/usb/host/isp116x.h	/^#define BYTE_TIME_FULLSPEED	/;"	d
BYTE_TIME_LOWSPEED	drivers/usb/host/isp116x.h	/^#define BYTE_TIME_LOWSPEED	/;"	d
BYT_PRV_CLK	arch/x86/cpu/baytrail/cpu.c	/^#define BYT_PRV_CLK	/;"	d	file:
BYT_PRV_CLK_EN	arch/x86/cpu/baytrail/cpu.c	/^#define BYT_PRV_CLK_EN	/;"	d	file:
BYT_PRV_CLK_M_VAL_SHIFT	arch/x86/cpu/baytrail/cpu.c	/^#define BYT_PRV_CLK_M_VAL_SHIFT	/;"	d	file:
BYT_PRV_CLK_N_VAL_SHIFT	arch/x86/cpu/baytrail/cpu.c	/^#define BYT_PRV_CLK_N_VAL_SHIFT	/;"	d	file:
BYT_PRV_CLK_UPDATE	arch/x86/cpu/baytrail/cpu.c	/^#define BYT_PRV_CLK_UPDATE	/;"	d	file:
BZ2_blockSort	lib/bzip2/bzlib_blocksort.c	/^void BZ2_blockSort ( EState* s )$/;"	f	typeref:typename:void
BZ2_bsInitWrite	lib/bzip2/bzlib_compress.c	/^void BZ2_bsInitWrite ( EState* s )$/;"	f	typeref:typename:void
BZ2_bz__AssertH__fail	lib/bzip2/bzlib.c	/^void BZ2_bz__AssertH__fail ( int errcode )$/;"	f	typeref:typename:void
BZ2_compressBlock	lib/bzip2/bzlib_compress.c	/^void BZ2_compressBlock ( EState* s, Bool is_last_block )$/;"	f	typeref:typename:void
BZ2_crc32Table	lib/bzip2/bzlib_crctable.c	/^UInt32 BZ2_crc32Table[256] = {$/;"	v	typeref:typename:UInt32[256]
BZ2_decompress	lib/bzip2/bzlib_decompress.c	/^Int32 BZ2_decompress ( DState* s )$/;"	f	typeref:typename:Int32
BZ2_hbAssignCodes	lib/bzip2/bzlib_huffman.c	/^void BZ2_hbAssignCodes ( Int32 *code,$/;"	f	typeref:typename:void
BZ2_hbCreateDecodeTables	lib/bzip2/bzlib_huffman.c	/^void BZ2_hbCreateDecodeTables ( Int32 *limit,$/;"	f	typeref:typename:void
BZ2_hbMakeCodeLengths	lib/bzip2/bzlib_huffman.c	/^void BZ2_hbMakeCodeLengths ( UChar *len,$/;"	f	typeref:typename:void
BZ2_indexIntoF	lib/bzip2/bzlib.c	/^__inline__ Int32 BZ2_indexIntoF ( Int32 indx, Int32 *cftab )$/;"	f	typeref:typename:Int32
BZ2_rNums	lib/bzip2/bzlib_randtable.c	/^Int32 BZ2_rNums[512] = {$/;"	v	typeref:typename:Int32[512]
BZALLOC	lib/bzip2/bzlib_private.h	/^#define BZALLOC(/;"	d
BZFILE	include/bzlib.h	/^typedef void BZFILE;$/;"	t	typeref:typename:void
BZFREE	lib/bzip2/bzlib_private.h	/^#define BZFREE(/;"	d
BZIMAGE_LOAD_ADDR	arch/x86/include/asm/zimage.h	/^#define BZIMAGE_LOAD_ADDR /;"	d
BZIMAGE_MAX_SIZE	arch/x86/include/asm/zimage.h	/^#define BZIMAGE_MAX_SIZE /;"	d
BZ_API	include/bzlib.h	/^#   define BZ_API(/;"	d
BZ_API	lib/bzip2/bzlib.c	/^BZFILE * BZ_API(BZ2_bzdopen)$/;"	f	typeref:typename:BZFILE *
BZ_API	lib/bzip2/bzlib.c	/^BZFILE * BZ_API(BZ2_bzopen)$/;"	f	typeref:typename:BZFILE *
BZ_API	lib/bzip2/bzlib.c	/^BZFILE* BZ_API(BZ2_bzReadOpen)$/;"	f	typeref:typename:BZFILE *
BZ_API	lib/bzip2/bzlib.c	/^BZFILE* BZ_API(BZ2_bzWriteOpen)$/;"	f	typeref:typename:BZFILE *
BZ_API	lib/bzip2/bzlib.c	/^const char * BZ_API(BZ2_bzerror) (BZFILE *b, int *errnum)$/;"	f	typeref:typename:const char *
BZ_API	lib/bzip2/bzlib.c	/^const char * BZ_API(BZ2_bzlibVersion)(void)$/;"	f	typeref:typename:const char *
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzBuffToBuffCompress)$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzBuffToBuffDecompress)$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzCompress) ( bz_stream *strm, int action )$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzCompressEnd)  ( bz_stream *strm )$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzCompressInit)$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzDecompress) ( bz_stream *strm )$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzDecompressEnd)  ( bz_stream *strm )$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzDecompressInit)$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzRead)$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzflush) (BZFILE *b)$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzread) (BZFILE* b, void* buf, int len )$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^int BZ_API(BZ2_bzwrite) (BZFILE* b, void* buf, int len )$/;"	f	typeref:typename:int
BZ_API	lib/bzip2/bzlib.c	/^void BZ_API(BZ2_bzReadClose) ( int *bzerror, BZFILE *b )$/;"	f	typeref:typename:void
BZ_API	lib/bzip2/bzlib.c	/^void BZ_API(BZ2_bzReadGetUnused)$/;"	f	typeref:typename:void
BZ_API	lib/bzip2/bzlib.c	/^void BZ_API(BZ2_bzWrite)$/;"	f	typeref:typename:void
BZ_API	lib/bzip2/bzlib.c	/^void BZ_API(BZ2_bzWriteClose)$/;"	f	typeref:typename:void
BZ_API	lib/bzip2/bzlib.c	/^void BZ_API(BZ2_bzWriteClose64)$/;"	f	typeref:typename:void
BZ_API	lib/bzip2/bzlib.c	/^void BZ_API(BZ2_bzclose) (BZFILE* b)$/;"	f	typeref:typename:void
BZ_CONFIG_ERROR	include/bzlib.h	/^#define BZ_CONFIG_ERROR /;"	d
BZ_DATA_ERROR	include/bzlib.h	/^#define BZ_DATA_ERROR /;"	d
BZ_DATA_ERROR_MAGIC	include/bzlib.h	/^#define BZ_DATA_ERROR_MAGIC /;"	d
BZ_EXPORT	include/bzlib.h	/^#define BZ_EXPORT$/;"	d
BZ_EXTERN	include/bzlib.h	/^#   define BZ_EXTERN /;"	d
BZ_EXTERN	include/bzlib.h	/^#   define BZ_EXTERN$/;"	d
BZ_FINALISE_CRC	lib/bzip2/bzlib_private.h	/^#define BZ_FINALISE_CRC(/;"	d
BZ_FINISH	include/bzlib.h	/^#define BZ_FINISH /;"	d
BZ_FINISH_OK	include/bzlib.h	/^#define BZ_FINISH_OK /;"	d
BZ_FLUSH	include/bzlib.h	/^#define BZ_FLUSH /;"	d
BZ_FLUSH_OK	include/bzlib.h	/^#define BZ_FLUSH_OK /;"	d
BZ_GET_FAST	lib/bzip2/bzlib_private.h	/^#define BZ_GET_FAST(/;"	d
BZ_GET_FAST_C	lib/bzip2/bzlib_private.h	/^#define BZ_GET_FAST_C(/;"	d
BZ_GET_SMALL	lib/bzip2/bzlib_private.h	/^#define BZ_GET_SMALL(/;"	d
BZ_GREATER_ICOST	lib/bzip2/bzlib_compress.c	/^#define BZ_GREATER_ICOST /;"	d	file:
BZ_G_SIZE	lib/bzip2/bzlib_private.h	/^#define BZ_G_SIZE /;"	d
BZ_HDR_0	lib/bzip2/bzlib_private.h	/^#define BZ_HDR_0 /;"	d
BZ_HDR_B	lib/bzip2/bzlib_private.h	/^#define BZ_HDR_B /;"	d
BZ_HDR_Z	lib/bzip2/bzlib_private.h	/^#define BZ_HDR_Z /;"	d
BZ_HDR_h	lib/bzip2/bzlib_private.h	/^#define BZ_HDR_h /;"	d
BZ_INITIALISE_CRC	lib/bzip2/bzlib_private.h	/^#define BZ_INITIALISE_CRC(/;"	d
BZ_IO_ERROR	include/bzlib.h	/^#define BZ_IO_ERROR /;"	d
BZ_ITAH	lib/bzip2/bzlib_compress.c	/^#           define BZ_ITAH(/;"	d	file:
BZ_ITER	lib/bzip2/bzlib_compress.c	/^#           define BZ_ITER(/;"	d	file:
BZ_ITUR	lib/bzip2/bzlib_compress.c	/^#           define BZ_ITUR(/;"	d	file:
BZ_LESSER_ICOST	lib/bzip2/bzlib_compress.c	/^#define BZ_LESSER_ICOST /;"	d	file:
BZ_MAX_ALPHA_SIZE	lib/bzip2/bzlib_private.h	/^#define BZ_MAX_ALPHA_SIZE /;"	d
BZ_MAX_CODE_LEN	lib/bzip2/bzlib_private.h	/^#define BZ_MAX_CODE_LEN /;"	d
BZ_MAX_SELECTORS	lib/bzip2/bzlib_private.h	/^#define BZ_MAX_SELECTORS /;"	d
BZ_MAX_UNUSED	include/bzlib.h	/^#define BZ_MAX_UNUSED /;"	d
BZ_MEM_ERROR	include/bzlib.h	/^#define BZ_MEM_ERROR /;"	d
BZ_M_FINISHING	lib/bzip2/bzlib_private.h	/^#define BZ_M_FINISHING /;"	d
BZ_M_FLUSHING	lib/bzip2/bzlib_private.h	/^#define BZ_M_FLUSHING /;"	d
BZ_M_IDLE	lib/bzip2/bzlib_private.h	/^#define BZ_M_IDLE /;"	d
BZ_M_RUNNING	lib/bzip2/bzlib_private.h	/^#define BZ_M_RUNNING /;"	d
BZ_NO_COMPRESS	include/bzlib.h	/^#define BZ_NO_COMPRESS$/;"	d
BZ_NO_STDIO	include/bzlib.h	/^#define BZ_NO_STDIO$/;"	d
BZ_N_GROUPS	lib/bzip2/bzlib_private.h	/^#define BZ_N_GROUPS /;"	d
BZ_N_ITERS	lib/bzip2/bzlib_private.h	/^#define BZ_N_ITERS /;"	d
BZ_N_OVERSHOOT	lib/bzip2/bzlib_private.h	/^#define BZ_N_OVERSHOOT /;"	d
BZ_N_QSORT	lib/bzip2/bzlib_private.h	/^#define BZ_N_QSORT /;"	d
BZ_N_RADIX	lib/bzip2/bzlib_private.h	/^#define BZ_N_RADIX /;"	d
BZ_N_SHELL	lib/bzip2/bzlib_private.h	/^#define BZ_N_SHELL /;"	d
BZ_OK	include/bzlib.h	/^#define BZ_OK /;"	d
BZ_OUTBUFF_FULL	include/bzlib.h	/^#define BZ_OUTBUFF_FULL /;"	d
BZ_PARAM_ERROR	include/bzlib.h	/^#define BZ_PARAM_ERROR /;"	d
BZ_RAND_DECLS	lib/bzip2/bzlib_private.h	/^#define BZ_RAND_DECLS /;"	d
BZ_RAND_INIT_MASK	lib/bzip2/bzlib_private.h	/^#define BZ_RAND_INIT_MASK /;"	d
BZ_RAND_MASK	lib/bzip2/bzlib_private.h	/^#define BZ_RAND_MASK /;"	d
BZ_RAND_UPD_MASK	lib/bzip2/bzlib_private.h	/^#define BZ_RAND_UPD_MASK /;"	d
BZ_RUN	include/bzlib.h	/^#define BZ_RUN /;"	d
BZ_RUNA	lib/bzip2/bzlib_private.h	/^#define BZ_RUNA /;"	d
BZ_RUNB	lib/bzip2/bzlib_private.h	/^#define BZ_RUNB /;"	d
BZ_RUN_OK	include/bzlib.h	/^#define BZ_RUN_OK /;"	d
BZ_SEQUENCE_ERROR	include/bzlib.h	/^#define BZ_SEQUENCE_ERROR /;"	d
BZ_SETERR	lib/bzip2/bzlib.c	/^#define BZ_SETERR(/;"	d	file:
BZ_STREAM_END	include/bzlib.h	/^#define BZ_STREAM_END /;"	d
BZ_S_INPUT	lib/bzip2/bzlib_private.h	/^#define BZ_S_INPUT /;"	d
BZ_S_OUTPUT	lib/bzip2/bzlib_private.h	/^#define BZ_S_OUTPUT /;"	d
BZ_UNEXPECTED_EOF	include/bzlib.h	/^#define BZ_UNEXPECTED_EOF /;"	d
BZ_UPDATE_CRC	lib/bzip2/bzlib_private.h	/^#define BZ_UPDATE_CRC(/;"	d
BZ_VERSION	lib/bzip2/bzlib_private.h	/^#define BZ_VERSION /;"	d
BZ_X_BCRC_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_BCRC_1 /;"	d
BZ_X_BCRC_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_BCRC_2 /;"	d
BZ_X_BCRC_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_BCRC_3 /;"	d
BZ_X_BCRC_4	lib/bzip2/bzlib_private.h	/^#define BZ_X_BCRC_4 /;"	d
BZ_X_BLKHDR_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_BLKHDR_1 /;"	d
BZ_X_BLKHDR_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_BLKHDR_2 /;"	d
BZ_X_BLKHDR_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_BLKHDR_3 /;"	d
BZ_X_BLKHDR_4	lib/bzip2/bzlib_private.h	/^#define BZ_X_BLKHDR_4 /;"	d
BZ_X_BLKHDR_5	lib/bzip2/bzlib_private.h	/^#define BZ_X_BLKHDR_5 /;"	d
BZ_X_BLKHDR_6	lib/bzip2/bzlib_private.h	/^#define BZ_X_BLKHDR_6 /;"	d
BZ_X_CCRC_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_CCRC_1 /;"	d
BZ_X_CCRC_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_CCRC_2 /;"	d
BZ_X_CCRC_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_CCRC_3 /;"	d
BZ_X_CCRC_4	lib/bzip2/bzlib_private.h	/^#define BZ_X_CCRC_4 /;"	d
BZ_X_CODING_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_CODING_1 /;"	d
BZ_X_CODING_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_CODING_2 /;"	d
BZ_X_CODING_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_CODING_3 /;"	d
BZ_X_ENDHDR_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_ENDHDR_2 /;"	d
BZ_X_ENDHDR_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_ENDHDR_3 /;"	d
BZ_X_ENDHDR_4	lib/bzip2/bzlib_private.h	/^#define BZ_X_ENDHDR_4 /;"	d
BZ_X_ENDHDR_5	lib/bzip2/bzlib_private.h	/^#define BZ_X_ENDHDR_5 /;"	d
BZ_X_ENDHDR_6	lib/bzip2/bzlib_private.h	/^#define BZ_X_ENDHDR_6 /;"	d
BZ_X_IDLE	lib/bzip2/bzlib_private.h	/^#define BZ_X_IDLE /;"	d
BZ_X_MAGIC_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_MAGIC_1 /;"	d
BZ_X_MAGIC_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_MAGIC_2 /;"	d
BZ_X_MAGIC_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_MAGIC_3 /;"	d
BZ_X_MAGIC_4	lib/bzip2/bzlib_private.h	/^#define BZ_X_MAGIC_4 /;"	d
BZ_X_MAPPING_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_MAPPING_1 /;"	d
BZ_X_MAPPING_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_MAPPING_2 /;"	d
BZ_X_MTF_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_MTF_1 /;"	d
BZ_X_MTF_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_MTF_2 /;"	d
BZ_X_MTF_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_MTF_3 /;"	d
BZ_X_MTF_4	lib/bzip2/bzlib_private.h	/^#define BZ_X_MTF_4 /;"	d
BZ_X_MTF_5	lib/bzip2/bzlib_private.h	/^#define BZ_X_MTF_5 /;"	d
BZ_X_MTF_6	lib/bzip2/bzlib_private.h	/^#define BZ_X_MTF_6 /;"	d
BZ_X_ORIGPTR_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_ORIGPTR_1 /;"	d
BZ_X_ORIGPTR_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_ORIGPTR_2 /;"	d
BZ_X_ORIGPTR_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_ORIGPTR_3 /;"	d
BZ_X_OUTPUT	lib/bzip2/bzlib_private.h	/^#define BZ_X_OUTPUT /;"	d
BZ_X_RANDBIT	lib/bzip2/bzlib_private.h	/^#define BZ_X_RANDBIT /;"	d
BZ_X_SELECTOR_1	lib/bzip2/bzlib_private.h	/^#define BZ_X_SELECTOR_1 /;"	d
BZ_X_SELECTOR_2	lib/bzip2/bzlib_private.h	/^#define BZ_X_SELECTOR_2 /;"	d
BZ_X_SELECTOR_3	lib/bzip2/bzlib_private.h	/^#define BZ_X_SELECTOR_3 /;"	d
B_0	arch/arm/lib/uldivmod.S	/^B_0	.req	r2$/;"	l
B_1	arch/arm/lib/uldivmod.S	/^B_1	.req	r3$/;"	l
B_CHUNK	common/cli_hush.c	/^#define B_CHUNK /;"	d	file:
B_CT_ADDRESS	board/synopsys/axs10x/nand.c	/^#define B_CT_ADDRESS	/;"	d	file:
B_CT_COMMAND	board/synopsys/axs10x/nand.c	/^#define B_CT_COMMAND	/;"	d	file:
B_CT_READ	board/synopsys/axs10x/nand.c	/^#define B_CT_READ	/;"	d	file:
B_CT_WRITE	board/synopsys/axs10x/nand.c	/^#define B_CT_WRITE	/;"	d	file:
B_DEVICE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define B_DEVICE	/;"	d
B_IWC	board/synopsys/axs10x/nand.c	/^#define B_IWC	/;"	d	file:
B_LC	board/synopsys/axs10x/nand.c	/^#define B_LC	/;"	d	file:
B_MASK	include/bedbug/ppc.h	/^#define B_MASK /;"	d
B_NOSPAC	common/cli_hush.c	/^#define B_NOSPAC /;"	d	file:
B_OPCODE	include/bedbug/ppc.h	/^#define B_OPCODE(/;"	d
B_SAMPLE	board/bosch/shc/Kconfig	/^config B_SAMPLE$/;"	c	choice:choice6f6e98480204
B_SESSION_VALID	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define B_SESSION_VALID	/;"	d
B_WFR	board/synopsys/axs10x/nand.c	/^#define B_WFR	/;"	d	file:
BaseOfCode	include/pe.h	/^	uint32_t BaseOfCode;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
BaseOfCode	include/pe.h	/^	uint32_t BaseOfCode;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
BaseOfData	include/pe.h	/^	uint32_t BaseOfData;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
BasicControl	drivers/net/natsemi.c	/^	BasicControl	= 0x80,$/;"	e	enum:register_offsets	file:
BasicStatus	drivers/net/natsemi.c	/^	BasicStatus	= 0x84,$/;"	e	enum:register_offsets	file:
Begin_Time	lib/dhry/dhry_1.c	/^long            Begin_Time,$/;"	v	typeref:typename:long
Bits	board/micronas/vct/top.c	/^	} Bits;$/;"	m	union:_TOP_PINMUX_t	typeref:struct:_TOP_PINMUX_t::__anon904a4b870108	file:
Blackfin architecture	arch/blackfin/Kconfig	/^menu "Blackfin architecture"$/;"	m
BlockEraseVal	board/bf533-ezkit/flash-defines.h	/^#define BlockEraseVal	/;"	d
Bmcr_AutoNegEn	drivers/net/ns8382x.c	/^	Bmcr_AutoNegEn = 0x1000,	\/*if set ignores Duplex, Speed[01] *\/$/;"	e	enum:bmcr_bits	file:
Bmcr_Duplex	drivers/net/ns8382x.c	/^	Bmcr_Duplex = 0x0100,$/;"	e	enum:bmcr_bits	file:
Bmcr_Force1000F	drivers/net/ns8382x.c	/^	Bmcr_Force1000F = 0x0140,$/;"	e	enum:bmcr_bits	file:
Bmcr_Force1000H	drivers/net/ns8382x.c	/^	Bmcr_Force1000H = 0x0040,$/;"	e	enum:bmcr_bits	file:
Bmcr_Force100F	drivers/net/ns8382x.c	/^	Bmcr_Force100F = 0x2100,$/;"	e	enum:bmcr_bits	file:
Bmcr_Force100H	drivers/net/ns8382x.c	/^	Bmcr_Force100H = 0x2000,$/;"	e	enum:bmcr_bits	file:
Bmcr_Force10F	drivers/net/ns8382x.c	/^	Bmcr_Force10F = 0x0100,$/;"	e	enum:bmcr_bits	file:
Bmcr_Force10H	drivers/net/ns8382x.c	/^	Bmcr_Force10H = 0x0000,$/;"	e	enum:bmcr_bits	file:
Bmcr_Loop	drivers/net/ns8382x.c	/^	Bmcr_Loop = 0x4000,$/;"	e	enum:bmcr_bits	file:
Bmcr_Reset	drivers/net/ns8382x.c	/^	Bmcr_Reset = 0x8000,$/;"	e	enum:bmcr_bits	file:
Bmcr_RstAutoNeg	drivers/net/ns8382x.c	/^	Bmcr_RstAutoNeg = 0x0200,$/;"	e	enum:bmcr_bits	file:
Bmcr_Speed0	drivers/net/ns8382x.c	/^	Bmcr_Speed0 = 0x2000,$/;"	e	enum:bmcr_bits	file:
Bmcr_Speed1	drivers/net/ns8382x.c	/^	Bmcr_Speed1 = 0x0040,$/;"	e	enum:bmcr_bits	file:
Board	tools/buildman/board.py	/^class Board:$/;"	c
Board module parameter usage	test/py/README.md	/^### Board module parameter usage$/;"	S	section:U-Boot pytest suite""Testing real hardware
Board-type-specific configuration	test/py/README.md	/^### Board-type-specific configuration$/;"	S	section:U-Boot pytest suite""Testing real hardware
Boards	tools/buildman/board.py	/^class Boards:$/;"	c
Bool	lib/bzip2/bzlib_private.h	/^typedef unsigned char   Bool;$/;"	t	typeref:typename:unsigned char
Bool	lib/lzma/Types.h	/^typedef int Bool;$/;"	t	typeref:typename:int
Bool_Glob	lib/dhry/dhry_1.c	/^Boolean         Bool_Glob;$/;"	v	typeref:typename:Boolean
Boolean	lib/dhry/dhry.h	/^typedef int     Boolean;$/;"	t	typeref:typename:int
Boot commands	cmd/Kconfig	/^menu "Boot commands"$/;"	m	menu:Command line interface
Boot images	Kconfig	/^menu "Boot images"$/;"	m
Boot media	common/Kconfig	/^menu "Boot media"$/;"	m
Boot timing	common/Kconfig	/^menu "Boot timing"$/;"	m
BootRomDisable	drivers/net/natsemi.c	/^	BootRomDisable	= 0x00000004,$/;"	e	enum:ChipConfigBits	file:
BootVideoCardBIOS	drivers/bios_emulator/atibios.c	/^int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,$/;"	f	typeref:typename:int
Broadcom BCM283X family	arch/arm/mach-bcm283x/Kconfig	/^menu "Broadcom BCM283X family"$/;"	m
Buf	tools/dtoc/dtoc	/^    def Buf(self, str):$/;"	m	class:DtbPlatdata
Buf	tools/dtoc/dtoc.py	/^    def Buf(self, str):$/;"	m	class:DtbPlatdata
Buf_size	lib/zlib/trees.c	/^#define Buf_size /;"	d	file:
BufferDesc	drivers/net/natsemi.c	/^} BufferDesc;$/;"	t	typeref:struct:_BufferDesc	file:
BufferDesc	drivers/net/ns8382x.c	/^} BufferDesc;$/;"	t	typeref:struct:_BufferDesc	file:
BufferDescriptor	drivers/net/mpc512x_fec.h	/^typedef struct BufferDescriptor {$/;"	s
BufferDescriptor	drivers/net/mpc5xxx_fec.h	/^typedef struct BufferDescriptor {$/;"	s
Build	doc/README.x86	/^Build Instructions for U-Boot as BIOS replacement (bare mode)$/;"	l
Build	doc/README.x86	/^Build Instructions for U-Boot as coreboot payload$/;"	l
BuildBoards	tools/buildman/builder.py	/^    def BuildBoards(self, commits, board_selected, keep_outputs, verbose):$/;"	m	class:Builder
BuildEmailList	tools/patman/gitutil.py	/^def BuildEmailList(in_list, tag=None, alias=None, raise_on_error=True):$/;"	f
BuildSRecord	tools/img2srec.c	/^static char* BuildSRecord(char* pa, uint16_t sType, uint32_t addr,$/;"	f	typeref:typename:char *	file:
Builder	tools/buildman/builder.py	/^class Builder:$/;"	c
BuilderJob	tools/buildman/builderthread.py	/^class BuilderJob:$/;"	c
BuilderThread	tools/buildman/builderthread.py	/^class BuilderThread(threading.Thread):$/;"	c
Building	doc/README.x86	/^Building U-Boot as a coreboot payload is just like building U-Boot for targets$/;"	l
Building	doc/README.x86	/^Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a$/;"	l
BusWidth	drivers/net/ax88180.h	/^	unsigned char BusWidth;$/;"	m	struct:ax88180_private	typeref:typename:unsigned char
Byte	include/lzma/LzmaTypes.h	/^#define Byte /;"	d
Byte	include/u-boot/zlib.h	/^#  define Byte /;"	d
Byte	include/u-boot/zlib.h	/^typedef unsigned char  Byte;  \/* 8 bits *\/$/;"	t	typeref:typename:unsigned char
Byte	lib/lzma/Types.h	/^typedef unsigned char Byte;$/;"	t	typeref:typename:unsigned char
Bytef	include/u-boot/zlib.h	/^   typedef Byte  FAR Bytef;$/;"	t	typeref:typename:Byte FAR
Bytef	include/u-boot/zlib.h	/^#  define Bytef /;"	d
BytesToValue	tools/dtoc/fdt.py	/^    def BytesToValue(self, bytes):$/;"	m	class:PropBase
C	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register A, B, C, D;$/;"	m	struct:i386_general_regs	typeref:typename:i386_general_register
C	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define C /;"	d
C	include/SA-1100.h	/^#define C	/;"	d
C0NC	arch/arm/include/asm/arch-tegra/pmc.h	/^#define C0NC	/;"	d
C0_CFG_APB0_CLK_DIV_RATIO	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C0_CFG_APB0_CLK_DIV_RATIO(/;"	d
C0_CFG_APB0_CLK_DIV_RATIO	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C0_CFG_APB0_CLK_DIV_RATIO(/;"	d
C0_CFG_AXI0_CLK_DIV_RATIO	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C0_CFG_AXI0_CLK_DIV_RATIO(/;"	d
C0_CFG_AXI0_CLK_DIV_RATIO	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C0_CFG_AXI0_CLK_DIV_RATIO(/;"	d
C0_CPUX_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_MASK /;"	d
C0_CPUX_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_MASK /;"	d
C0_CPUX_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_OSC24M	/;"	d
C0_CPUX_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_OSC24M	/;"	d
C0_CPUX_CLK_SRC_PLL1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_PLL1	/;"	d
C0_CPUX_CLK_SRC_PLL1	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_PLL1	/;"	d
C0_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define C0_CPUX_CLK_SRC_SHIFT	/;"	d
C0_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_SHIFT /;"	d
C0_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define C0_CPUX_CLK_SRC_SHIFT	/;"	d
C0_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C0_CPUX_CLK_SRC_SHIFT /;"	d
C1_CPUX_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_MASK /;"	d
C1_CPUX_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_MASK /;"	d
C1_CPUX_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_OSC24M	/;"	d
C1_CPUX_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_OSC24M	/;"	d
C1_CPUX_CLK_SRC_PLL2	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_PLL2	/;"	d
C1_CPUX_CLK_SRC_PLL2	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_PLL2	/;"	d
C1_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define C1_CPUX_CLK_SRC_SHIFT	/;"	d
C1_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_SHIFT /;"	d
C1_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define C1_CPUX_CLK_SRC_SHIFT	/;"	d
C1_CPUX_CLK_SRC_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define C1_CPUX_CLK_SRC_SHIFT /;"	d
C29XPCIE_HARDWARE_REVA	board/freescale/c29xpcie/ddr.c	/^#define C29XPCIE_HARDWARE_REVA	/;"	d	file:
C2C_ACLK_RATIO	board/samsung/odroid/setup.h	/^#define C2C_ACLK_RATIO(/;"	d
C2C_CLKIN0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_CLKIN0	/;"	d
C2C_CLKIN1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_CLKIN1	/;"	d
C2C_CLKOUT0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_CLKOUT0	/;"	d
C2C_CLKOUT1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_CLKOUT1	/;"	d
C2C_CLK_400_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define C2C_CLK_400_RATIO	/;"	d
C2C_DATA10	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA10	/;"	d
C2C_DATA11	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define C2C_DATA11	/;"	d
C2C_DATA11	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA11	/;"	d
C2C_DATA12	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define C2C_DATA12	/;"	d
C2C_DATA12	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA12	/;"	d
C2C_DATA13	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define C2C_DATA13	/;"	d
C2C_DATA13	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA13	/;"	d
C2C_DATA14	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define C2C_DATA14	/;"	d
C2C_DATA14	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA14	/;"	d
C2C_DATA15	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define C2C_DATA15	/;"	d
C2C_DATA15	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA15	/;"	d
C2C_DATA8	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA8	/;"	d
C2C_DATA9	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATA9	/;"	d
C2C_DATAIN0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN0	/;"	d
C2C_DATAIN1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN1	/;"	d
C2C_DATAIN2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN2	/;"	d
C2C_DATAIN3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN3	/;"	d
C2C_DATAIN4	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN4	/;"	d
C2C_DATAIN5	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN5	/;"	d
C2C_DATAIN6	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN6	/;"	d
C2C_DATAIN7	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAIN7	/;"	d
C2C_DATAOUT0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT0	/;"	d
C2C_DATAOUT1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT1	/;"	d
C2C_DATAOUT2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT2	/;"	d
C2C_DATAOUT3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT3	/;"	d
C2C_DATAOUT4	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT4	/;"	d
C2C_DATAOUT5	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT5	/;"	d
C2C_DATAOUT6	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT6	/;"	d
C2C_DATAOUT7	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define C2C_DATAOUT7	/;"	d
C2C_RATIO	board/samsung/odroid/setup.h	/^#define C2C_RATIO(/;"	d
C2C_SEL	board/samsung/odroid/setup.h	/^#define C2C_SEL(/;"	d
C2_SAMPLE	board/bosch/shc/Kconfig	/^config C2_SAMPLE$/;"	c	choice:choice6f6e98480204
C3_RES	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define C3_RES	/;"	d
C3_SAMPLE	board/bosch/shc/Kconfig	/^config C3_SAMPLE$/;"	c	choice:choice6f6e98480204
CA5SCU_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CA5SCU_BASE_ADDR	/;"	d
CA5_INTD_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CA5_INTD_BASE_ADDR	/;"	d
CA5_L2C_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CA5_L2C_BASE_ADDR	/;"	d
CAAM_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CAAM_ARB_BASE_ADDR /;"	d
CAAM_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CAAM_ARB_BASE_ADDR /;"	d
CAAM_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CAAM_ARB_END_ADDR /;"	d
CAAM_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CAAM_ARB_END_ADDR /;"	d
CAAM_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CAAM_BASE_ADDR /;"	d
CAAM_CMD_SZ	drivers/crypto/fsl/desc_constr.h	/^#define CAAM_CMD_SZ /;"	d
CAAM_DESC_BYTES_MAX	drivers/crypto/fsl/desc_constr.h	/^#define CAAM_DESC_BYTES_MAX /;"	d
CAAM_ERROR_STR_MAX	drivers/crypto/fsl/error.c	/^#define CAAM_ERROR_STR_MAX /;"	d	file:
CAAM_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CAAM_IPS_BASE_ADDR /;"	d
CAAM_PTR_SZ	drivers/crypto/fsl/desc_constr.h	/^#define CAAM_PTR_SZ /;"	d
CAAM_SMAG1JR	include/fsl_sec.h	/^#define CAAM_SMAG1JR(/;"	d
CAAM_SMAG2JR	include/fsl_sec.h	/^#define CAAM_SMAG2JR(/;"	d
CAAM_SMAPJR	include/fsl_sec.h	/^#define CAAM_SMAPJR(/;"	d
CAAM_SMCJR	include/fsl_sec.h	/^#define CAAM_SMCJR(/;"	d
CAAM_SMCSJR	include/fsl_sec.h	/^#define CAAM_SMCSJR(/;"	d
CAAM_SMPO_0	include/fsl_sec.h	/^#define CAAM_SMPO_0	/;"	d
CABRT	include/sym53c8xx.h	/^  #define   CABRT /;"	d
CACHE	fs/reiserfs/reiserfs_private.h	/^#define CACHE(/;"	d
CACHEABLE	arch/mips/include/asm/cachectl.h	/^#define CACHEABLE	/;"	d
CACHECRBA	arch/powerpc/include/asm/cache.h	/^#define CACHECRBA /;"	d
CACHELINE_MASK	arch/powerpc/include/asm/ppc4xx.h	/^#define CACHELINE_MASK	/;"	d
CACHELINE_SIZE	drivers/usb/dwc3/io.h	/^#define	CACHELINE_SIZE	/;"	d
CACHELINE_SIZE	drivers/usb/host/xhci-mem.c	/^#define CACHELINE_SIZE	/;"	d	file:
CACHE_AS_RAM_BASE	arch/x86/cpu/intel_common/car.S	/^#define CACHE_AS_RAM_BASE	/;"	d	file:
CACHE_AS_RAM_SIZE	arch/x86/cpu/intel_common/car.S	/^#define CACHE_AS_RAM_SIZE	/;"	d	file:
CACHE_BARRIER	arch/mips/include/asm/cacheops.h	/^#define CACHE_BARRIER	/;"	d
CACHE_BYPASS	arch/nios2/include/asm/nios2.h	/^#define CACHE_BYPASS(/;"	d
CACHE_CMD_DISABLE	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define CACHE_CMD_DISABLE	/;"	d	file:
CACHE_CMD_ENABLE	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define CACHE_CMD_ENABLE	/;"	d	file:
CACHE_CMD_INVALIDATE	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define CACHE_CMD_INVALIDATE	/;"	d	file:
CACHE_CMD_LOAD_LOCK	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define CACHE_CMD_LOAD_LOCK	/;"	d	file:
CACHE_CMD_UNLOCK_ALL	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define CACHE_CMD_UNLOCK_ALL	/;"	d	file:
CACHE_CMD_UNLOCK_LINE	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define CACHE_CMD_UNLOCK_LINE	/;"	d	file:
CACHE_DATA_RAM_LATENCY_2_CYCLES	arch/arm/mach-exynos/common_setup.h	/^	CACHE_DATA_RAM_LATENCY_2_CYCLES = (2 << 0),$/;"	e	enum:l2_cache_params
CACHE_DATA_RAM_LATENCY_3_CYCLES	arch/arm/mach-exynos/common_setup.h	/^	CACHE_DATA_RAM_LATENCY_3_CYCLES = (3 << 0),$/;"	e	enum:l2_cache_params
CACHE_DATA_RAM_SETUP	arch/arm/mach-exynos/common_setup.h	/^	CACHE_DATA_RAM_SETUP = (1 << 5),$/;"	e	enum:l2_cache_params
CACHE_DISABLE	arch/sh/cpu/sh3/cache.c	/^#define CACHE_DISABLE /;"	d	file:
CACHE_DISABLE	arch/sh/cpu/sh4/cache.c	/^#define CACHE_DISABLE /;"	d	file:
CACHE_DISABLE_CLEAN_EVICT	arch/arm/mach-exynos/common_setup.h	/^	CACHE_DISABLE_CLEAN_EVICT = (1 << 3),$/;"	e	enum:l2_cache_params
CACHE_ECC_AND_PARITY	arch/arm/mach-exynos/common_setup.h	/^	CACHE_ECC_AND_PARITY = (1 << 21),$/;"	e	enum:l2_cache_params
CACHE_ENABLE	arch/sh/cpu/sh3/cache.c	/^#define CACHE_ENABLE /;"	d	file:
CACHE_ENABLE	arch/sh/cpu/sh4/cache.c	/^#define CACHE_ENABLE /;"	d	file:
CACHE_ENABLE_FORCE_L2_LOGIC	arch/arm/mach-exynos/common_setup.h	/^	CACHE_ENABLE_FORCE_L2_LOGIC = (1 << 27)$/;"	e	enum:l2_cache_params
CACHE_ENABLE_HAZARD_DETECT	arch/arm/mach-exynos/common_setup.h	/^	CACHE_ENABLE_HAZARD_DETECT = (1 << 7),$/;"	e	enum:l2_cache_params
CACHE_FLUSH_IS_SAFE	arch/blackfin/lib/kgdb.h	/^#define CACHE_FLUSH_IS_SAFE	/;"	d
CACHE_LINE	include/radeon.h	/^#define CACHE_LINE	/;"	d
CACHE_LINE_INTERLEAVING	include/configs/sbc8641d.h	/^#define CACHE_LINE_INTERLEAVING	/;"	d
CACHE_LINE_MASK	arch/arc/lib/cache.c	/^#define CACHE_LINE_MASK	/;"	d	file:
CACHE_LINE_SIZE	arch/nds32/lib/cache.c	/^static inline unsigned long CACHE_LINE_SIZE(enum cache_t cache)$/;"	f	typeref:typename:unsigned long	file:
CACHE_LINE_SIZE	arch/powerpc/cpu/mpc86xx/cache.S	/^# define CACHE_LINE_SIZE /;"	d	file:
CACHE_LINE_SIZE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define CACHE_LINE_SIZE /;"	d
CACHE_LINE_SIZE	examples/standalone/test_burst.h	/^#define CACHE_LINE_SIZE	/;"	d
CACHE_MRC_BASE	arch/x86/cpu/intel_common/car.S	/^#define CACHE_MRC_BASE	/;"	d	file:
CACHE_MRC_BIN	arch/x86/Kconfig	/^config CACHE_MRC_BIN$/;"	c	menu:x86 architecture
CACHE_MRC_BYTES	arch/x86/cpu/intel_common/car.S	/^#define CACHE_MRC_BYTES	/;"	d	file:
CACHE_MRC_MASK	arch/x86/cpu/intel_common/car.S	/^#define CACHE_MRC_MASK	/;"	d	file:
CACHE_MRC_SIZE_KB	arch/x86/Kconfig	/^config CACHE_MRC_SIZE_KB$/;"	c	menu:x86 architecture
CACHE_NLINES	arch/powerpc/cpu/ppc4xx/cache.S	/^#define CACHE_NLINES /;"	d	file:
CACHE_NO_BYPASS	arch/nios2/include/asm/nios2.h	/^#define CACHE_NO_BYPASS(/;"	d
CACHE_NWAYS	arch/powerpc/cpu/ppc4xx/cache.S	/^#define CACHE_NWAYS /;"	d	file:
CACHE_OC_ADDRESS_ARRAY	arch/sh/include/asm/cpu_sh2.h	/^#define CACHE_OC_ADDRESS_ARRAY	/;"	d
CACHE_OC_ADDRESS_ARRAY	arch/sh/include/asm/cpu_sh3.h	/^#define CACHE_OC_ADDRESS_ARRAY	/;"	d
CACHE_OC_ADDRESS_ARRAY	arch/sh/include/asm/cpu_sh4.h	/^#define CACHE_OC_ADDRESS_ARRAY	/;"	d
CACHE_OC_ENTRY_SHIFT	arch/sh/include/asm/cpu_sh2.h	/^#define CACHE_OC_ENTRY_SHIFT	/;"	d
CACHE_OC_ENTRY_SHIFT	arch/sh/include/asm/cpu_sh3.h	/^#define CACHE_OC_ENTRY_SHIFT	/;"	d
CACHE_OC_ENTRY_SHIFT	arch/sh/include/asm/cpu_sh4.h	/^#define CACHE_OC_ENTRY_SHIFT	/;"	d
CACHE_OC_NUM_ENTRIES	arch/sh/include/asm/cpu_sh2.h	/^#define CACHE_OC_NUM_ENTRIES	/;"	d
CACHE_OC_NUM_ENTRIES	arch/sh/include/asm/cpu_sh3.h	/^#define CACHE_OC_NUM_ENTRIES	/;"	d
CACHE_OC_NUM_ENTRIES	arch/sh/include/asm/cpu_sh4.h	/^#define CACHE_OC_NUM_ENTRIES	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7706.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7710.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7720.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7722.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7723.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7724.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7734.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7750.h	/^#define CACHE_OC_NUM_WAYS /;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7752.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7753.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7757.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7763.h	/^#define CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7780.h	/^#define	CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_NUM_WAYS	arch/sh/include/asm/cpu_sh7785.h	/^#define	CACHE_OC_NUM_WAYS	/;"	d
CACHE_OC_WAY_SHIFT	arch/sh/include/asm/cpu_sh2.h	/^#define CACHE_OC_WAY_SHIFT	/;"	d
CACHE_OC_WAY_SHIFT	arch/sh/include/asm/cpu_sh3.h	/^#define CACHE_OC_WAY_SHIFT	/;"	d
CACHE_OC_WAY_SHIFT	arch/sh/include/asm/cpu_sh4.h	/^#define CACHE_OC_WAY_SHIFT	/;"	d
CACHE_OP_ERR	include/linux/mtd/samsung_onenand.h	/^#define CACHE_OP_ERR /;"	d
CACHE_POST_CHECK	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_CHECK(/;"	d	file:
CACHE_POST_DFLUSH	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_DFLUSH(/;"	d	file:
CACHE_POST_DINVALIDATE	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_DINVALIDATE(/;"	d	file:
CACHE_POST_DISABLE	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_DISABLE(/;"	d	file:
CACHE_POST_DSTORE	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_DSTORE(/;"	d	file:
CACHE_POST_DTOUCH	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_DTOUCH(/;"	d	file:
CACHE_POST_IINVALIDATE	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_IINVALIDATE(/;"	d	file:
CACHE_POST_MEMSET	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_MEMSET(/;"	d	file:
CACHE_POST_SIZE	post/cpu/mpc8xx/cache.c	/^#define CACHE_POST_SIZE	/;"	d	file:
CACHE_POST_SIZE	post/cpu/ppc4xx/cache.c	/^#define CACHE_POST_SIZE	/;"	d	file:
CACHE_POST_WB	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_WB(/;"	d	file:
CACHE_POST_WT	post/cpu/ppc4xx/cache_4xx.S	/^#define CACHE_POST_WT(/;"	d	file:
CACHE_READ_ENABLE	drivers/mtd/nand/denali.h	/^#define CACHE_READ_ENABLE	/;"	d
CACHE_READ_ENABLE__FLAG	drivers/mtd/nand/denali.h	/^#define     CACHE_READ_ENABLE__FLAG	/;"	d
CACHE_READ_SUPPORT	drivers/mtd/nand/denali.h	/^#define CACHE_READ_SUPPORT /;"	d
CACHE_ROM_BASE	arch/x86/include/asm/mtrr.h	/^#define CACHE_ROM_BASE	/;"	d
CACHE_TAG_RAM_LATENCY_2_CYCLES	arch/arm/mach-exynos/common_setup.h	/^	CACHE_TAG_RAM_LATENCY_2_CYCLES = (2 << 6),$/;"	e	enum:l2_cache_params
CACHE_TAG_RAM_LATENCY_3_CYCLES	arch/arm/mach-exynos/common_setup.h	/^	CACHE_TAG_RAM_LATENCY_3_CYCLES = (3 << 6),$/;"	e	enum:l2_cache_params
CACHE_TAG_RAM_SETUP	arch/arm/mach-exynos/common_setup.h	/^	CACHE_TAG_RAM_SETUP = (1 << 9),$/;"	e	enum:l2_cache_params
CACHE_UNIPHIER	arch/arm/mach-uniphier/Kconfig	/^config CACHE_UNIPHIER$/;"	c
CACHE_UPDATED	arch/sh/cpu/sh3/cache.c	/^#define CACHE_UPDATED /;"	d	file:
CACHE_UPDATED	arch/sh/cpu/sh4/cache.c	/^#define CACHE_UPDATED /;"	d	file:
CACHE_VALID	arch/sh/cpu/sh3/cache.c	/^#define CACHE_VALID /;"	d	file:
CACHE_VALID	arch/sh/cpu/sh4/cache.c	/^#define CACHE_VALID /;"	d	file:
CACHE_VER_NUM_MASK	arch/arc/lib/cache.c	/^#define CACHE_VER_NUM_MASK	/;"	d	file:
CACHE_WRITE_ENABLE	drivers/mtd/nand/denali.h	/^#define CACHE_WRITE_ENABLE	/;"	d
CACHE_WRITE_ENABLE__FLAG	drivers/mtd/nand/denali.h	/^#define     CACHE_WRITE_ENABLE__FLAG	/;"	d
CACHE_WRITE_SUPPORT	drivers/mtd/nand/denali.h	/^#define CACHE_WRITE_SUPPORT /;"	d
CACK	include/sym53c8xx.h	/^	#define   CACK	/;"	d
CACR_STATUS	include/configs/M54418TWR.h	/^#define CACR_STATUS	/;"	d
CAC_BASE	arch/mips/include/asm/mach-generic/spaces.h	/^#define CAC_BASE	/;"	d
CADDR	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define CADDR	/;"	d
CADDR_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define CADDR_P	/;"	d
CADDY_CMD_CONFIG_READ_16	board/esd/vme8349/caddy.h	/^	CADDY_CMD_CONFIG_READ_16,$/;"	e	enum:caddy_cmds
CADDY_CMD_CONFIG_READ_32	board/esd/vme8349/caddy.h	/^	CADDY_CMD_CONFIG_READ_32,$/;"	e	enum:caddy_cmds
CADDY_CMD_CONFIG_READ_8	board/esd/vme8349/caddy.h	/^	CADDY_CMD_CONFIG_READ_8,$/;"	e	enum:caddy_cmds
CADDY_CMD_CONFIG_WRITE_16	board/esd/vme8349/caddy.h	/^	CADDY_CMD_CONFIG_WRITE_16,$/;"	e	enum:caddy_cmds
CADDY_CMD_CONFIG_WRITE_32	board/esd/vme8349/caddy.h	/^	CADDY_CMD_CONFIG_WRITE_32,$/;"	e	enum:caddy_cmds
CADDY_CMD_CONFIG_WRITE_8	board/esd/vme8349/caddy.h	/^	CADDY_CMD_CONFIG_WRITE_8,$/;"	e	enum:caddy_cmds
CADDY_CMD_IO_READ_16	board/esd/vme8349/caddy.h	/^	CADDY_CMD_IO_READ_16,$/;"	e	enum:caddy_cmds
CADDY_CMD_IO_READ_32	board/esd/vme8349/caddy.h	/^	CADDY_CMD_IO_READ_32,$/;"	e	enum:caddy_cmds
CADDY_CMD_IO_READ_8	board/esd/vme8349/caddy.h	/^	CADDY_CMD_IO_READ_8,$/;"	e	enum:caddy_cmds
CADDY_CMD_IO_WRITE_16	board/esd/vme8349/caddy.h	/^	CADDY_CMD_IO_WRITE_16,$/;"	e	enum:caddy_cmds
CADDY_CMD_IO_WRITE_32	board/esd/vme8349/caddy.h	/^	CADDY_CMD_IO_WRITE_32,$/;"	e	enum:caddy_cmds
CADDY_CMD_IO_WRITE_8	board/esd/vme8349/caddy.h	/^	CADDY_CMD_IO_WRITE_8,$/;"	e	enum:caddy_cmds
CADDY_MAGIC	board/esd/vme8349/caddy.h	/^#define CADDY_MAGIC	/;"	d
CADENCE_QSPI	drivers/spi/Kconfig	/^config CADENCE_QSPI$/;"	c	menu:SPI Support
CADMUS_BASE_ADDR	include/configs/MPC8541CDS.h	/^#define CADMUS_BASE_ADDR /;"	d
CADMUS_BASE_ADDR	include/configs/MPC8548CDS.h	/^#define CADMUS_BASE_ADDR /;"	d
CADMUS_BASE_ADDR	include/configs/MPC8555CDS.h	/^#define CADMUS_BASE_ADDR /;"	d
CADMUS_BASE_ADDR_PHYS	include/configs/MPC8548CDS.h	/^#define CADMUS_BASE_ADDR_PHYS	/;"	d
CAIFR	arch/sh/include/asm/cpu_sh7722.h	/^#define CAIFR /;"	d
CAIOCR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define CAIOCR(/;"	d
CAIOCR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define CAIOCR(/;"	d
CALCULATED_M	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CALCULATED_M,$/;"	e	enum:clock_recovery_m_value_type
CALCULATED_M	arch/arm/mach-exynos/include/mach/dp_info.h	/^	CALCULATED_M,$/;"	e	enum:__anon79d8640c0d03
CALC_DENT_SIZE	fs/ubifs/ubifs.h	/^#define CALC_DENT_SIZE(/;"	d
CALC_ODT_R	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CALC_ODT_R(/;"	d	file:
CALC_ODT_RW	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CALC_ODT_RW(/;"	d	file:
CALC_ODT_W	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CALC_ODT_W(/;"	d	file:
CALC_TIMING	arch/powerpc/cpu/mpc512x/ide.c	/^#define CALC_TIMING(/;"	d	file:
CALC_TIMING	arch/powerpc/cpu/mpc5xxx/ide.c	/^#define CALC_TIMING(/;"	d	file:
CALC_TIMING	board/freescale/m5253demo/m5253demo.c	/^#define CALC_TIMING(/;"	d	file:
CALC_TIMING	board/freescale/m5253evbe/m5253evbe.c	/^#define CALC_TIMING(/;"	d	file:
CALC_TIMING	board/freescale/m54455evb/m54455evb.c	/^#define CALC_TIMING(/;"	d	file:
CALC_XATTR_BYTES	fs/ubifs/ubifs.h	/^#define CALC_XATTR_BYTES(/;"	d
CALGN	arch/arm/include/asm/assembler.h	/^#define CALGN(/;"	d
CALIBRATED_OBJECTS_REG_ADDR_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CALIBRATED_OBJECTS_REG_ADDR_OFFSET	/;"	d
CALIBRATION_CTRL_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CALIBRATION_CTRL_REG	/;"	d
CALIB_IN_RTL_SIM	drivers/ddr/altera/sequencer.h	/^#define CALIB_IN_RTL_SIM	/;"	d
CALIB_LFIFO_OFFSET	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/denx/mcvevk/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/ebv/socrates/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/is1/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/sr1500/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_LFIFO_OFFSET	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET /;"	d
CALIB_LFIFO_OFFSET	board/terasic/sockit/qts/sdram_config.h	/^#define CALIB_LFIFO_OFFSET	/;"	d
CALIB_MACHINE_CTRL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CALIB_MACHINE_CTRL_REG	/;"	d
CALIB_OBJ_PRFA_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CALIB_OBJ_PRFA_REG	/;"	d
CALIB_SKIP_ALL	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_ALL	/;"	d
CALIB_SKIP_ALL_BITS_CHK	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_ALL_BITS_CHK	/;"	d
CALIB_SKIP_DELAY_LOOPS	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_DELAY_LOOPS	/;"	d
CALIB_SKIP_DELAY_SWEEPS	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_DELAY_SWEEPS	/;"	d
CALIB_SKIP_FULL_TEST	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_FULL_TEST	/;"	d
CALIB_SKIP_LFIFO	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_LFIFO	/;"	d
CALIB_SKIP_VFIFO	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_VFIFO	/;"	d
CALIB_SKIP_WLEVEL	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_WLEVEL	/;"	d
CALIB_SKIP_WRITES	drivers/ddr/altera/sequencer.h	/^#define CALIB_SKIP_WRITES	/;"	d
CALIB_VFIFO_OFFSET	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/denx/mcvevk/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/ebv/socrates/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/is1/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/sr1500/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIB_VFIFO_OFFSET	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET /;"	d
CALIB_VFIFO_OFFSET	board/terasic/sockit/qts/sdram_config.h	/^#define CALIB_VFIFO_OFFSET	/;"	d
CALIMAIN_HWVERSION_MASK	board/omicron/calimain/calimain.c	/^#define CALIMAIN_HWVERSION_MASK /;"	d	file:
CALIMAIN_HWVERSION_SHIFT	board/omicron/calimain/calimain.c	/^#define CALIMAIN_HWVERSION_SHIFT /;"	d	file:
CALL_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define  CALL_TRACE(/;"	d
CALL_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define CALL_TRACE(/;"	d
CAL_DDRCTRL	include/ambapp_ids.h	/^#define CAL_DDRCTRL /;"	d
CAL_DONE_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CAL_DONE_MASK				= 3,$/;"	e	enum:__anon957231910103	file:
CAL_REG6	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CAL_REG6	/;"	d
CAL_STAGE_CAL_ABORTED	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_CAL_ABORTED	/;"	d
CAL_STAGE_CAL_SKIPPED	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_CAL_SKIPPED	/;"	d
CAL_STAGE_FULLTEST	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_FULLTEST	/;"	d
CAL_STAGE_LFIFO	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_LFIFO	/;"	d
CAL_STAGE_NIL	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_NIL	/;"	d
CAL_STAGE_REFRESH	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_REFRESH	/;"	d
CAL_STAGE_VFIFO	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_VFIFO	/;"	d
CAL_STAGE_VFIFO_AFTER_WRITES	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_VFIFO_AFTER_WRITES	/;"	d
CAL_STAGE_WLEVEL	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_WLEVEL	/;"	d
CAL_STAGE_WRITES	drivers/ddr/altera/sequencer.h	/^#define CAL_STAGE_WRITES	/;"	d
CAL_SUBSTAGE_DQS_EN_PHASE	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_DQS_EN_PHASE	/;"	d
CAL_SUBSTAGE_GUARANTEED_READ	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_GUARANTEED_READ	/;"	d
CAL_SUBSTAGE_LAST_WORKING_DELAY	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_LAST_WORKING_DELAY	/;"	d
CAL_SUBSTAGE_NIL	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_NIL	/;"	d
CAL_SUBSTAGE_READ_LATENCY	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_READ_LATENCY	/;"	d
CAL_SUBSTAGE_REFRESH	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_REFRESH	/;"	d
CAL_SUBSTAGE_VFIFO_CENTER	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_VFIFO_CENTER	/;"	d
CAL_SUBSTAGE_WLEVEL_COPY	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_WLEVEL_COPY	/;"	d
CAL_SUBSTAGE_WORKING_DELAY	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_WORKING_DELAY	/;"	d
CAL_SUBSTAGE_WRITES_CENTER	drivers/ddr/altera/sequencer.h	/^#define CAL_SUBSTAGE_WRITES_CENTER	/;"	d
CAL_devices	cmd/ambapp.c	/^static ambapp_device_name CAL_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
CAM0_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define CAM0_SEL_XUSBXTI	/;"	d
CAM1_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define CAM1_SEL_XUSBXTI	/;"	d
CAMCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CAMCR /;"	d
CAMOR	arch/sh/include/asm/cpu_sh7722.h	/^#define CAMOR /;"	d
CAMR0	arch/sh/include/asm/cpu_sh7722.h	/^#define CAMR0 /;"	d
CAMR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	CAMR0	/;"	d
CAMR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CAMR1 /;"	d
CAMR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CAMR1	/;"	d
CAM_GLOBALRESET	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CAM_GLOBALRESET	/;"	d
CAM_GLOBALRESET	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CAM_GLOBALRESET	/;"	d
CAM_SHUTTER	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CAM_SHUTTER	/;"	d
CAM_SHUTTER	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CAM_SHUTTER	/;"	d
CAM_STROBE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CAM_STROBE	/;"	d
CAM_STROBE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CAM_STROBE	/;"	d
CAN	common/xyzModem.c	/^#define CAN /;"	d	file:
CAN	tools/kwboot.c	/^#define CAN	/;"	d	file:
CAN0RX_EN	board/bf609-ezkit/soft_switch.h	/^#define CAN0RX_EN /;"	d
CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AA1 /;"	d
CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AA1 /;"	d
CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AA1 /;"	d
CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AA1 /;"	d
CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AA2 /;"	d
CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AA2 /;"	d
CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AA2 /;"	d
CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AA2 /;"	d
CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM00H /;"	d
CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM00H /;"	d
CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM00H /;"	d
CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM00H /;"	d
CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM00L /;"	d
CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM00L /;"	d
CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM00L /;"	d
CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM00L /;"	d
CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM01H /;"	d
CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM01H /;"	d
CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM01H /;"	d
CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM01H /;"	d
CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM01L /;"	d
CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM01L /;"	d
CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM01L /;"	d
CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM01L /;"	d
CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM02H /;"	d
CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM02H /;"	d
CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM02H /;"	d
CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM02H /;"	d
CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM02L /;"	d
CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM02L /;"	d
CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM02L /;"	d
CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM02L /;"	d
CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM03H /;"	d
CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM03H /;"	d
CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM03H /;"	d
CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM03H /;"	d
CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM03L /;"	d
CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM03L /;"	d
CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM03L /;"	d
CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM03L /;"	d
CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM04H /;"	d
CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM04H /;"	d
CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM04H /;"	d
CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM04H /;"	d
CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM04L /;"	d
CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM04L /;"	d
CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM04L /;"	d
CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM04L /;"	d
CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM05H /;"	d
CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM05H /;"	d
CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM05H /;"	d
CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM05H /;"	d
CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM05L /;"	d
CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM05L /;"	d
CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM05L /;"	d
CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM05L /;"	d
CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM06H /;"	d
CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM06H /;"	d
CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM06H /;"	d
CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM06H /;"	d
CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM06L /;"	d
CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM06L /;"	d
CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM06L /;"	d
CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM06L /;"	d
CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM07H /;"	d
CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM07H /;"	d
CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM07H /;"	d
CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM07H /;"	d
CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM07L /;"	d
CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM07L /;"	d
CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM07L /;"	d
CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM07L /;"	d
CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM08H /;"	d
CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM08H /;"	d
CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM08H /;"	d
CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM08H /;"	d
CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM08L /;"	d
CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM08L /;"	d
CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM08L /;"	d
CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM08L /;"	d
CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM09H /;"	d
CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM09H /;"	d
CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM09H /;"	d
CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM09H /;"	d
CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM09L /;"	d
CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM09L /;"	d
CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM09L /;"	d
CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM09L /;"	d
CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM10H /;"	d
CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM10H /;"	d
CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM10H /;"	d
CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM10H /;"	d
CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM10L /;"	d
CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM10L /;"	d
CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM10L /;"	d
CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM10L /;"	d
CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM11H /;"	d
CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM11H /;"	d
CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM11H /;"	d
CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM11H /;"	d
CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM11L /;"	d
CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM11L /;"	d
CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM11L /;"	d
CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM11L /;"	d
CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM12H /;"	d
CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM12H /;"	d
CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM12H /;"	d
CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM12H /;"	d
CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM12L /;"	d
CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM12L /;"	d
CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM12L /;"	d
CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM12L /;"	d
CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM13H /;"	d
CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM13H /;"	d
CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM13H /;"	d
CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM13H /;"	d
CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM13L /;"	d
CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM13L /;"	d
CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM13L /;"	d
CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM13L /;"	d
CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM14H /;"	d
CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM14H /;"	d
CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM14H /;"	d
CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM14H /;"	d
CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM14L /;"	d
CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM14L /;"	d
CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM14L /;"	d
CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM14L /;"	d
CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM15H /;"	d
CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM15H /;"	d
CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM15H /;"	d
CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM15H /;"	d
CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM15L /;"	d
CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM15L /;"	d
CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM15L /;"	d
CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM15L /;"	d
CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM16H /;"	d
CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM16H /;"	d
CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM16H /;"	d
CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM16H /;"	d
CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM16L /;"	d
CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM16L /;"	d
CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM16L /;"	d
CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM16L /;"	d
CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM17H /;"	d
CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM17H /;"	d
CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM17H /;"	d
CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM17H /;"	d
CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM17L /;"	d
CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM17L /;"	d
CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM17L /;"	d
CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM17L /;"	d
CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM18H /;"	d
CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM18H /;"	d
CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM18H /;"	d
CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM18H /;"	d
CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM18L /;"	d
CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM18L /;"	d
CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM18L /;"	d
CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM18L /;"	d
CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM19H /;"	d
CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM19H /;"	d
CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM19H /;"	d
CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM19H /;"	d
CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM19L /;"	d
CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM19L /;"	d
CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM19L /;"	d
CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM19L /;"	d
CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM20H /;"	d
CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM20H /;"	d
CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM20H /;"	d
CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM20H /;"	d
CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM20L /;"	d
CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM20L /;"	d
CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM20L /;"	d
CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM20L /;"	d
CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM21H /;"	d
CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM21H /;"	d
CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM21H /;"	d
CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM21H /;"	d
CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM21L /;"	d
CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM21L /;"	d
CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM21L /;"	d
CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM21L /;"	d
CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM22H /;"	d
CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM22H /;"	d
CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM22H /;"	d
CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM22H /;"	d
CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM22L /;"	d
CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM22L /;"	d
CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM22L /;"	d
CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM22L /;"	d
CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM23H /;"	d
CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM23H /;"	d
CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM23H /;"	d
CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM23H /;"	d
CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM23L /;"	d
CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM23L /;"	d
CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM23L /;"	d
CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM23L /;"	d
CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM24H /;"	d
CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM24H /;"	d
CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM24H /;"	d
CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM24H /;"	d
CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM24L /;"	d
CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM24L /;"	d
CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM24L /;"	d
CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM24L /;"	d
CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM25H /;"	d
CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM25H /;"	d
CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM25H /;"	d
CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM25H /;"	d
CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM25L /;"	d
CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM25L /;"	d
CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM25L /;"	d
CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM25L /;"	d
CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM26H /;"	d
CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM26H /;"	d
CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM26H /;"	d
CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM26H /;"	d
CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM26L /;"	d
CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM26L /;"	d
CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM26L /;"	d
CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM26L /;"	d
CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM27H /;"	d
CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM27H /;"	d
CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM27H /;"	d
CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM27H /;"	d
CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM27L /;"	d
CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM27L /;"	d
CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM27L /;"	d
CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM27L /;"	d
CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM28H /;"	d
CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM28H /;"	d
CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM28H /;"	d
CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM28H /;"	d
CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM28L /;"	d
CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM28L /;"	d
CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM28L /;"	d
CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM28L /;"	d
CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM29H /;"	d
CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM29H /;"	d
CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM29H /;"	d
CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM29H /;"	d
CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM29L /;"	d
CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM29L /;"	d
CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM29L /;"	d
CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM29L /;"	d
CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM30H /;"	d
CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM30H /;"	d
CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM30H /;"	d
CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM30H /;"	d
CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM30L /;"	d
CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM30L /;"	d
CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM30L /;"	d
CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM30L /;"	d
CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM31H /;"	d
CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM31H /;"	d
CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM31H /;"	d
CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM31H /;"	d
CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_AM31L /;"	d
CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_AM31L /;"	d
CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_AM31L /;"	d
CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_AM31L /;"	d
CAN0_BA	include/configs/PLU405.h	/^#define CAN0_BA	/;"	d
CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_CEC /;"	d
CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_CEC /;"	d
CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_CEC /;"	d
CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_CEC /;"	d
CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_CLOCK /;"	d
CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_CLOCK /;"	d
CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_CLOCK /;"	d
CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_CLOCK /;"	d
CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_CONTROL /;"	d
CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_CONTROL /;"	d
CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_CONTROL /;"	d
CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_CONTROL /;"	d
CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_DEBUG /;"	d
CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_DEBUG /;"	d
CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_DEBUG /;"	d
CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_DEBUG /;"	d
CAN0_ERR_EN	board/bf609-ezkit/soft_switch.h	/^#define CAN0_ERR_EN /;"	d
CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_ESR /;"	d
CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_ESR /;"	d
CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_ESR /;"	d
CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_ESR /;"	d
CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_EWR /;"	d
CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_EWR /;"	d
CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_EWR /;"	d
CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_EWR /;"	d
CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_GIF /;"	d
CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_GIF /;"	d
CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_GIF /;"	d
CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_GIF /;"	d
CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_GIM /;"	d
CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_GIM /;"	d
CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_GIM /;"	d
CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_GIM /;"	d
CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_GIS /;"	d
CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_GIS /;"	d
CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_GIS /;"	d
CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_GIS /;"	d
CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_INTR /;"	d
CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_INTR /;"	d
CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_INTR /;"	d
CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_INTR /;"	d
CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_DATA0 /;"	d
CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_DATA0 /;"	d
CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_DATA0 /;"	d
CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_DATA0 /;"	d
CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_DATA1 /;"	d
CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_DATA1 /;"	d
CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_DATA1 /;"	d
CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_DATA1 /;"	d
CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_DATA2 /;"	d
CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_DATA2 /;"	d
CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_DATA2 /;"	d
CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_DATA2 /;"	d
CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_DATA3 /;"	d
CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_DATA3 /;"	d
CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_DATA3 /;"	d
CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_DATA3 /;"	d
CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_ID0 /;"	d
CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_ID0 /;"	d
CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_ID0 /;"	d
CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_ID0 /;"	d
CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_ID1 /;"	d
CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_ID1 /;"	d
CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_ID1 /;"	d
CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_ID1 /;"	d
CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_LENGTH /;"	d
CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_LENGTH /;"	d
CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_LENGTH /;"	d
CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_LENGTH /;"	d
CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB00_TIMESTAMP /;"	d
CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB00_TIMESTAMP /;"	d
CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB00_TIMESTAMP /;"	d
CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB00_TIMESTAMP /;"	d
CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_DATA0 /;"	d
CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_DATA0 /;"	d
CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_DATA0 /;"	d
CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_DATA0 /;"	d
CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_DATA1 /;"	d
CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_DATA1 /;"	d
CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_DATA1 /;"	d
CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_DATA1 /;"	d
CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_DATA2 /;"	d
CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_DATA2 /;"	d
CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_DATA2 /;"	d
CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_DATA2 /;"	d
CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_DATA3 /;"	d
CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_DATA3 /;"	d
CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_DATA3 /;"	d
CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_DATA3 /;"	d
CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_ID0 /;"	d
CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_ID0 /;"	d
CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_ID0 /;"	d
CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_ID0 /;"	d
CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_ID1 /;"	d
CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_ID1 /;"	d
CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_ID1 /;"	d
CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_ID1 /;"	d
CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_LENGTH /;"	d
CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_LENGTH /;"	d
CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_LENGTH /;"	d
CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_LENGTH /;"	d
CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB01_TIMESTAMP /;"	d
CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB01_TIMESTAMP /;"	d
CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB01_TIMESTAMP /;"	d
CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB01_TIMESTAMP /;"	d
CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_DATA0 /;"	d
CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_DATA0 /;"	d
CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_DATA0 /;"	d
CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_DATA0 /;"	d
CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_DATA1 /;"	d
CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_DATA1 /;"	d
CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_DATA1 /;"	d
CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_DATA1 /;"	d
CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_DATA2 /;"	d
CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_DATA2 /;"	d
CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_DATA2 /;"	d
CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_DATA2 /;"	d
CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_DATA3 /;"	d
CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_DATA3 /;"	d
CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_DATA3 /;"	d
CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_DATA3 /;"	d
CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_ID0 /;"	d
CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_ID0 /;"	d
CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_ID0 /;"	d
CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_ID0 /;"	d
CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_ID1 /;"	d
CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_ID1 /;"	d
CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_ID1 /;"	d
CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_ID1 /;"	d
CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_LENGTH /;"	d
CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_LENGTH /;"	d
CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_LENGTH /;"	d
CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_LENGTH /;"	d
CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB02_TIMESTAMP /;"	d
CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB02_TIMESTAMP /;"	d
CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB02_TIMESTAMP /;"	d
CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB02_TIMESTAMP /;"	d
CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_DATA0 /;"	d
CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_DATA0 /;"	d
CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_DATA0 /;"	d
CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_DATA0 /;"	d
CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_DATA1 /;"	d
CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_DATA1 /;"	d
CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_DATA1 /;"	d
CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_DATA1 /;"	d
CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_DATA2 /;"	d
CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_DATA2 /;"	d
CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_DATA2 /;"	d
CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_DATA2 /;"	d
CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_DATA3 /;"	d
CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_DATA3 /;"	d
CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_DATA3 /;"	d
CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_DATA3 /;"	d
CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_ID0 /;"	d
CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_ID0 /;"	d
CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_ID0 /;"	d
CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_ID0 /;"	d
CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_ID1 /;"	d
CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_ID1 /;"	d
CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_ID1 /;"	d
CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_ID1 /;"	d
CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_LENGTH /;"	d
CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_LENGTH /;"	d
CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_LENGTH /;"	d
CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_LENGTH /;"	d
CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB03_TIMESTAMP /;"	d
CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB03_TIMESTAMP /;"	d
CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB03_TIMESTAMP /;"	d
CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB03_TIMESTAMP /;"	d
CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_DATA0 /;"	d
CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_DATA0 /;"	d
CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_DATA0 /;"	d
CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_DATA0 /;"	d
CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_DATA1 /;"	d
CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_DATA1 /;"	d
CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_DATA1 /;"	d
CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_DATA1 /;"	d
CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_DATA2 /;"	d
CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_DATA2 /;"	d
CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_DATA2 /;"	d
CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_DATA2 /;"	d
CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_DATA3 /;"	d
CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_DATA3 /;"	d
CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_DATA3 /;"	d
CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_DATA3 /;"	d
CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_ID0 /;"	d
CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_ID0 /;"	d
CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_ID0 /;"	d
CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_ID0 /;"	d
CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_ID1 /;"	d
CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_ID1 /;"	d
CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_ID1 /;"	d
CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_ID1 /;"	d
CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_LENGTH /;"	d
CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_LENGTH /;"	d
CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_LENGTH /;"	d
CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_LENGTH /;"	d
CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB04_TIMESTAMP /;"	d
CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB04_TIMESTAMP /;"	d
CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB04_TIMESTAMP /;"	d
CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB04_TIMESTAMP /;"	d
CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_DATA0 /;"	d
CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_DATA0 /;"	d
CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_DATA0 /;"	d
CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_DATA0 /;"	d
CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_DATA1 /;"	d
CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_DATA1 /;"	d
CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_DATA1 /;"	d
CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_DATA1 /;"	d
CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_DATA2 /;"	d
CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_DATA2 /;"	d
CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_DATA2 /;"	d
CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_DATA2 /;"	d
CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_DATA3 /;"	d
CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_DATA3 /;"	d
CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_DATA3 /;"	d
CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_DATA3 /;"	d
CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_ID0 /;"	d
CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_ID0 /;"	d
CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_ID0 /;"	d
CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_ID0 /;"	d
CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_ID1 /;"	d
CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_ID1 /;"	d
CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_ID1 /;"	d
CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_ID1 /;"	d
CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_LENGTH /;"	d
CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_LENGTH /;"	d
CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_LENGTH /;"	d
CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_LENGTH /;"	d
CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB05_TIMESTAMP /;"	d
CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB05_TIMESTAMP /;"	d
CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB05_TIMESTAMP /;"	d
CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB05_TIMESTAMP /;"	d
CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_DATA0 /;"	d
CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_DATA0 /;"	d
CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_DATA0 /;"	d
CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_DATA0 /;"	d
CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_DATA1 /;"	d
CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_DATA1 /;"	d
CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_DATA1 /;"	d
CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_DATA1 /;"	d
CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_DATA2 /;"	d
CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_DATA2 /;"	d
CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_DATA2 /;"	d
CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_DATA2 /;"	d
CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_DATA3 /;"	d
CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_DATA3 /;"	d
CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_DATA3 /;"	d
CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_DATA3 /;"	d
CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_ID0 /;"	d
CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_ID0 /;"	d
CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_ID0 /;"	d
CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_ID0 /;"	d
CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_ID1 /;"	d
CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_ID1 /;"	d
CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_ID1 /;"	d
CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_ID1 /;"	d
CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_LENGTH /;"	d
CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_LENGTH /;"	d
CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_LENGTH /;"	d
CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_LENGTH /;"	d
CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB06_TIMESTAMP /;"	d
CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB06_TIMESTAMP /;"	d
CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB06_TIMESTAMP /;"	d
CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB06_TIMESTAMP /;"	d
CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_DATA0 /;"	d
CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_DATA0 /;"	d
CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_DATA0 /;"	d
CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_DATA0 /;"	d
CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_DATA1 /;"	d
CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_DATA1 /;"	d
CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_DATA1 /;"	d
CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_DATA1 /;"	d
CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_DATA2 /;"	d
CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_DATA2 /;"	d
CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_DATA2 /;"	d
CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_DATA2 /;"	d
CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_DATA3 /;"	d
CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_DATA3 /;"	d
CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_DATA3 /;"	d
CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_DATA3 /;"	d
CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_ID0 /;"	d
CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_ID0 /;"	d
CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_ID0 /;"	d
CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_ID0 /;"	d
CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_ID1 /;"	d
CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_ID1 /;"	d
CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_ID1 /;"	d
CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_ID1 /;"	d
CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_LENGTH /;"	d
CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_LENGTH /;"	d
CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_LENGTH /;"	d
CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_LENGTH /;"	d
CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB07_TIMESTAMP /;"	d
CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB07_TIMESTAMP /;"	d
CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB07_TIMESTAMP /;"	d
CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB07_TIMESTAMP /;"	d
CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_DATA0 /;"	d
CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_DATA0 /;"	d
CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_DATA0 /;"	d
CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_DATA0 /;"	d
CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_DATA1 /;"	d
CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_DATA1 /;"	d
CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_DATA1 /;"	d
CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_DATA1 /;"	d
CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_DATA2 /;"	d
CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_DATA2 /;"	d
CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_DATA2 /;"	d
CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_DATA2 /;"	d
CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_DATA3 /;"	d
CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_DATA3 /;"	d
CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_DATA3 /;"	d
CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_DATA3 /;"	d
CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_ID0 /;"	d
CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_ID0 /;"	d
CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_ID0 /;"	d
CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_ID0 /;"	d
CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_ID1 /;"	d
CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_ID1 /;"	d
CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_ID1 /;"	d
CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_ID1 /;"	d
CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_LENGTH /;"	d
CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_LENGTH /;"	d
CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_LENGTH /;"	d
CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_LENGTH /;"	d
CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB08_TIMESTAMP /;"	d
CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB08_TIMESTAMP /;"	d
CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB08_TIMESTAMP /;"	d
CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB08_TIMESTAMP /;"	d
CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_DATA0 /;"	d
CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_DATA0 /;"	d
CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_DATA0 /;"	d
CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_DATA0 /;"	d
CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_DATA1 /;"	d
CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_DATA1 /;"	d
CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_DATA1 /;"	d
CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_DATA1 /;"	d
CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_DATA2 /;"	d
CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_DATA2 /;"	d
CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_DATA2 /;"	d
CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_DATA2 /;"	d
CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_DATA3 /;"	d
CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_DATA3 /;"	d
CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_DATA3 /;"	d
CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_DATA3 /;"	d
CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_ID0 /;"	d
CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_ID0 /;"	d
CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_ID0 /;"	d
CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_ID0 /;"	d
CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_ID1 /;"	d
CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_ID1 /;"	d
CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_ID1 /;"	d
CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_ID1 /;"	d
CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_LENGTH /;"	d
CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_LENGTH /;"	d
CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_LENGTH /;"	d
CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_LENGTH /;"	d
CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB09_TIMESTAMP /;"	d
CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB09_TIMESTAMP /;"	d
CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB09_TIMESTAMP /;"	d
CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB09_TIMESTAMP /;"	d
CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_DATA0 /;"	d
CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_DATA0 /;"	d
CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_DATA0 /;"	d
CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_DATA0 /;"	d
CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_DATA1 /;"	d
CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_DATA1 /;"	d
CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_DATA1 /;"	d
CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_DATA1 /;"	d
CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_DATA2 /;"	d
CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_DATA2 /;"	d
CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_DATA2 /;"	d
CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_DATA2 /;"	d
CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_DATA3 /;"	d
CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_DATA3 /;"	d
CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_DATA3 /;"	d
CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_DATA3 /;"	d
CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_ID0 /;"	d
CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_ID0 /;"	d
CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_ID0 /;"	d
CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_ID0 /;"	d
CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_ID1 /;"	d
CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_ID1 /;"	d
CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_ID1 /;"	d
CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_ID1 /;"	d
CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_LENGTH /;"	d
CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_LENGTH /;"	d
CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_LENGTH /;"	d
CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_LENGTH /;"	d
CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB10_TIMESTAMP /;"	d
CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB10_TIMESTAMP /;"	d
CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB10_TIMESTAMP /;"	d
CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB10_TIMESTAMP /;"	d
CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_DATA0 /;"	d
CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_DATA0 /;"	d
CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_DATA0 /;"	d
CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_DATA0 /;"	d
CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_DATA1 /;"	d
CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_DATA1 /;"	d
CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_DATA1 /;"	d
CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_DATA1 /;"	d
CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_DATA2 /;"	d
CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_DATA2 /;"	d
CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_DATA2 /;"	d
CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_DATA2 /;"	d
CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_DATA3 /;"	d
CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_DATA3 /;"	d
CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_DATA3 /;"	d
CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_DATA3 /;"	d
CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_ID0 /;"	d
CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_ID0 /;"	d
CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_ID0 /;"	d
CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_ID0 /;"	d
CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_ID1 /;"	d
CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_ID1 /;"	d
CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_ID1 /;"	d
CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_ID1 /;"	d
CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_LENGTH /;"	d
CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_LENGTH /;"	d
CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_LENGTH /;"	d
CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_LENGTH /;"	d
CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB11_TIMESTAMP /;"	d
CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB11_TIMESTAMP /;"	d
CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB11_TIMESTAMP /;"	d
CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB11_TIMESTAMP /;"	d
CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_DATA0 /;"	d
CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_DATA0 /;"	d
CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_DATA0 /;"	d
CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_DATA0 /;"	d
CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_DATA1 /;"	d
CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_DATA1 /;"	d
CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_DATA1 /;"	d
CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_DATA1 /;"	d
CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_DATA2 /;"	d
CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_DATA2 /;"	d
CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_DATA2 /;"	d
CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_DATA2 /;"	d
CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_DATA3 /;"	d
CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_DATA3 /;"	d
CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_DATA3 /;"	d
CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_DATA3 /;"	d
CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_ID0 /;"	d
CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_ID0 /;"	d
CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_ID0 /;"	d
CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_ID0 /;"	d
CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_ID1 /;"	d
CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_ID1 /;"	d
CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_ID1 /;"	d
CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_ID1 /;"	d
CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_LENGTH /;"	d
CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_LENGTH /;"	d
CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_LENGTH /;"	d
CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_LENGTH /;"	d
CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB12_TIMESTAMP /;"	d
CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB12_TIMESTAMP /;"	d
CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB12_TIMESTAMP /;"	d
CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB12_TIMESTAMP /;"	d
CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_DATA0 /;"	d
CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_DATA0 /;"	d
CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_DATA0 /;"	d
CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_DATA0 /;"	d
CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_DATA1 /;"	d
CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_DATA1 /;"	d
CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_DATA1 /;"	d
CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_DATA1 /;"	d
CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_DATA2 /;"	d
CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_DATA2 /;"	d
CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_DATA2 /;"	d
CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_DATA2 /;"	d
CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_DATA3 /;"	d
CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_DATA3 /;"	d
CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_DATA3 /;"	d
CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_DATA3 /;"	d
CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_ID0 /;"	d
CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_ID0 /;"	d
CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_ID0 /;"	d
CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_ID0 /;"	d
CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_ID1 /;"	d
CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_ID1 /;"	d
CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_ID1 /;"	d
CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_ID1 /;"	d
CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_LENGTH /;"	d
CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_LENGTH /;"	d
CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_LENGTH /;"	d
CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_LENGTH /;"	d
CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB13_TIMESTAMP /;"	d
CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB13_TIMESTAMP /;"	d
CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB13_TIMESTAMP /;"	d
CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB13_TIMESTAMP /;"	d
CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_DATA0 /;"	d
CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_DATA0 /;"	d
CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_DATA0 /;"	d
CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_DATA0 /;"	d
CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_DATA1 /;"	d
CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_DATA1 /;"	d
CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_DATA1 /;"	d
CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_DATA1 /;"	d
CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_DATA2 /;"	d
CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_DATA2 /;"	d
CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_DATA2 /;"	d
CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_DATA2 /;"	d
CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_DATA3 /;"	d
CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_DATA3 /;"	d
CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_DATA3 /;"	d
CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_DATA3 /;"	d
CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_ID0 /;"	d
CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_ID0 /;"	d
CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_ID0 /;"	d
CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_ID0 /;"	d
CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_ID1 /;"	d
CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_ID1 /;"	d
CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_ID1 /;"	d
CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_ID1 /;"	d
CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_LENGTH /;"	d
CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_LENGTH /;"	d
CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_LENGTH /;"	d
CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_LENGTH /;"	d
CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB14_TIMESTAMP /;"	d
CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB14_TIMESTAMP /;"	d
CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB14_TIMESTAMP /;"	d
CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB14_TIMESTAMP /;"	d
CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_DATA0 /;"	d
CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_DATA0 /;"	d
CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_DATA0 /;"	d
CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_DATA0 /;"	d
CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_DATA1 /;"	d
CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_DATA1 /;"	d
CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_DATA1 /;"	d
CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_DATA1 /;"	d
CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_DATA2 /;"	d
CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_DATA2 /;"	d
CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_DATA2 /;"	d
CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_DATA2 /;"	d
CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_DATA3 /;"	d
CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_DATA3 /;"	d
CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_DATA3 /;"	d
CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_DATA3 /;"	d
CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_ID0 /;"	d
CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_ID0 /;"	d
CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_ID0 /;"	d
CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_ID0 /;"	d
CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_ID1 /;"	d
CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_ID1 /;"	d
CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_ID1 /;"	d
CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_ID1 /;"	d
CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_LENGTH /;"	d
CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_LENGTH /;"	d
CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_LENGTH /;"	d
CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_LENGTH /;"	d
CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB15_TIMESTAMP /;"	d
CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB15_TIMESTAMP /;"	d
CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB15_TIMESTAMP /;"	d
CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB15_TIMESTAMP /;"	d
CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_DATA0 /;"	d
CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_DATA0 /;"	d
CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_DATA0 /;"	d
CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_DATA0 /;"	d
CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_DATA1 /;"	d
CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_DATA1 /;"	d
CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_DATA1 /;"	d
CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_DATA1 /;"	d
CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_DATA2 /;"	d
CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_DATA2 /;"	d
CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_DATA2 /;"	d
CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_DATA2 /;"	d
CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_DATA3 /;"	d
CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_DATA3 /;"	d
CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_DATA3 /;"	d
CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_DATA3 /;"	d
CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_ID0 /;"	d
CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_ID0 /;"	d
CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_ID0 /;"	d
CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_ID0 /;"	d
CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_ID1 /;"	d
CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_ID1 /;"	d
CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_ID1 /;"	d
CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_ID1 /;"	d
CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_LENGTH /;"	d
CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_LENGTH /;"	d
CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_LENGTH /;"	d
CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_LENGTH /;"	d
CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB16_TIMESTAMP /;"	d
CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB16_TIMESTAMP /;"	d
CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB16_TIMESTAMP /;"	d
CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB16_TIMESTAMP /;"	d
CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_DATA0 /;"	d
CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_DATA0 /;"	d
CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_DATA0 /;"	d
CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_DATA0 /;"	d
CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_DATA1 /;"	d
CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_DATA1 /;"	d
CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_DATA1 /;"	d
CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_DATA1 /;"	d
CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_DATA2 /;"	d
CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_DATA2 /;"	d
CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_DATA2 /;"	d
CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_DATA2 /;"	d
CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_DATA3 /;"	d
CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_DATA3 /;"	d
CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_DATA3 /;"	d
CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_DATA3 /;"	d
CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_ID0 /;"	d
CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_ID0 /;"	d
CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_ID0 /;"	d
CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_ID0 /;"	d
CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_ID1 /;"	d
CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_ID1 /;"	d
CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_ID1 /;"	d
CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_ID1 /;"	d
CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_LENGTH /;"	d
CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_LENGTH /;"	d
CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_LENGTH /;"	d
CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_LENGTH /;"	d
CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB17_TIMESTAMP /;"	d
CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB17_TIMESTAMP /;"	d
CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB17_TIMESTAMP /;"	d
CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB17_TIMESTAMP /;"	d
CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_DATA0 /;"	d
CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_DATA0 /;"	d
CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_DATA0 /;"	d
CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_DATA0 /;"	d
CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_DATA1 /;"	d
CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_DATA1 /;"	d
CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_DATA1 /;"	d
CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_DATA1 /;"	d
CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_DATA2 /;"	d
CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_DATA2 /;"	d
CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_DATA2 /;"	d
CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_DATA2 /;"	d
CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_DATA3 /;"	d
CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_DATA3 /;"	d
CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_DATA3 /;"	d
CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_DATA3 /;"	d
CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_ID0 /;"	d
CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_ID0 /;"	d
CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_ID0 /;"	d
CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_ID0 /;"	d
CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_ID1 /;"	d
CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_ID1 /;"	d
CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_ID1 /;"	d
CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_ID1 /;"	d
CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_LENGTH /;"	d
CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_LENGTH /;"	d
CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_LENGTH /;"	d
CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_LENGTH /;"	d
CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB18_TIMESTAMP /;"	d
CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB18_TIMESTAMP /;"	d
CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB18_TIMESTAMP /;"	d
CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB18_TIMESTAMP /;"	d
CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_DATA0 /;"	d
CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_DATA0 /;"	d
CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_DATA0 /;"	d
CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_DATA0 /;"	d
CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_DATA1 /;"	d
CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_DATA1 /;"	d
CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_DATA1 /;"	d
CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_DATA1 /;"	d
CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_DATA2 /;"	d
CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_DATA2 /;"	d
CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_DATA2 /;"	d
CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_DATA2 /;"	d
CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_DATA3 /;"	d
CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_DATA3 /;"	d
CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_DATA3 /;"	d
CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_DATA3 /;"	d
CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_ID0 /;"	d
CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_ID0 /;"	d
CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_ID0 /;"	d
CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_ID0 /;"	d
CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_ID1 /;"	d
CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_ID1 /;"	d
CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_ID1 /;"	d
CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_ID1 /;"	d
CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_LENGTH /;"	d
CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_LENGTH /;"	d
CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_LENGTH /;"	d
CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_LENGTH /;"	d
CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB19_TIMESTAMP /;"	d
CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB19_TIMESTAMP /;"	d
CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB19_TIMESTAMP /;"	d
CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB19_TIMESTAMP /;"	d
CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_DATA0 /;"	d
CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_DATA0 /;"	d
CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_DATA0 /;"	d
CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_DATA0 /;"	d
CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_DATA1 /;"	d
CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_DATA1 /;"	d
CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_DATA1 /;"	d
CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_DATA1 /;"	d
CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_DATA2 /;"	d
CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_DATA2 /;"	d
CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_DATA2 /;"	d
CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_DATA2 /;"	d
CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_DATA3 /;"	d
CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_DATA3 /;"	d
CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_DATA3 /;"	d
CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_DATA3 /;"	d
CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_ID0 /;"	d
CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_ID0 /;"	d
CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_ID0 /;"	d
CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_ID0 /;"	d
CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_ID1 /;"	d
CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_ID1 /;"	d
CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_ID1 /;"	d
CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_ID1 /;"	d
CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_LENGTH /;"	d
CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_LENGTH /;"	d
CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_LENGTH /;"	d
CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_LENGTH /;"	d
CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB20_TIMESTAMP /;"	d
CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB20_TIMESTAMP /;"	d
CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB20_TIMESTAMP /;"	d
CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB20_TIMESTAMP /;"	d
CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_DATA0 /;"	d
CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_DATA0 /;"	d
CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_DATA0 /;"	d
CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_DATA0 /;"	d
CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_DATA1 /;"	d
CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_DATA1 /;"	d
CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_DATA1 /;"	d
CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_DATA1 /;"	d
CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_DATA2 /;"	d
CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_DATA2 /;"	d
CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_DATA2 /;"	d
CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_DATA2 /;"	d
CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_DATA3 /;"	d
CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_DATA3 /;"	d
CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_DATA3 /;"	d
CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_DATA3 /;"	d
CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_ID0 /;"	d
CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_ID0 /;"	d
CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_ID0 /;"	d
CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_ID0 /;"	d
CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_ID1 /;"	d
CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_ID1 /;"	d
CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_ID1 /;"	d
CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_ID1 /;"	d
CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_LENGTH /;"	d
CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_LENGTH /;"	d
CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_LENGTH /;"	d
CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_LENGTH /;"	d
CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB21_TIMESTAMP /;"	d
CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB21_TIMESTAMP /;"	d
CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB21_TIMESTAMP /;"	d
CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB21_TIMESTAMP /;"	d
CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_DATA0 /;"	d
CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_DATA0 /;"	d
CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_DATA0 /;"	d
CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_DATA0 /;"	d
CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_DATA1 /;"	d
CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_DATA1 /;"	d
CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_DATA1 /;"	d
CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_DATA1 /;"	d
CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_DATA2 /;"	d
CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_DATA2 /;"	d
CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_DATA2 /;"	d
CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_DATA2 /;"	d
CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_DATA3 /;"	d
CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_DATA3 /;"	d
CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_DATA3 /;"	d
CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_DATA3 /;"	d
CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_ID0 /;"	d
CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_ID0 /;"	d
CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_ID0 /;"	d
CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_ID0 /;"	d
CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_ID1 /;"	d
CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_ID1 /;"	d
CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_ID1 /;"	d
CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_ID1 /;"	d
CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_LENGTH /;"	d
CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_LENGTH /;"	d
CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_LENGTH /;"	d
CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_LENGTH /;"	d
CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB22_TIMESTAMP /;"	d
CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB22_TIMESTAMP /;"	d
CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB22_TIMESTAMP /;"	d
CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB22_TIMESTAMP /;"	d
CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_DATA0 /;"	d
CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_DATA0 /;"	d
CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_DATA0 /;"	d
CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_DATA0 /;"	d
CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_DATA1 /;"	d
CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_DATA1 /;"	d
CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_DATA1 /;"	d
CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_DATA1 /;"	d
CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_DATA2 /;"	d
CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_DATA2 /;"	d
CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_DATA2 /;"	d
CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_DATA2 /;"	d
CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_DATA3 /;"	d
CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_DATA3 /;"	d
CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_DATA3 /;"	d
CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_DATA3 /;"	d
CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_ID0 /;"	d
CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_ID0 /;"	d
CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_ID0 /;"	d
CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_ID0 /;"	d
CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_ID1 /;"	d
CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_ID1 /;"	d
CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_ID1 /;"	d
CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_ID1 /;"	d
CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_LENGTH /;"	d
CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_LENGTH /;"	d
CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_LENGTH /;"	d
CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_LENGTH /;"	d
CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB23_TIMESTAMP /;"	d
CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB23_TIMESTAMP /;"	d
CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB23_TIMESTAMP /;"	d
CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB23_TIMESTAMP /;"	d
CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_DATA0 /;"	d
CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_DATA0 /;"	d
CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_DATA0 /;"	d
CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_DATA0 /;"	d
CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_DATA1 /;"	d
CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_DATA1 /;"	d
CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_DATA1 /;"	d
CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_DATA1 /;"	d
CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_DATA2 /;"	d
CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_DATA2 /;"	d
CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_DATA2 /;"	d
CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_DATA2 /;"	d
CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_DATA3 /;"	d
CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_DATA3 /;"	d
CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_DATA3 /;"	d
CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_DATA3 /;"	d
CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_ID0 /;"	d
CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_ID0 /;"	d
CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_ID0 /;"	d
CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_ID0 /;"	d
CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_ID1 /;"	d
CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_ID1 /;"	d
CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_ID1 /;"	d
CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_ID1 /;"	d
CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_LENGTH /;"	d
CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_LENGTH /;"	d
CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_LENGTH /;"	d
CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_LENGTH /;"	d
CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB24_TIMESTAMP /;"	d
CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB24_TIMESTAMP /;"	d
CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB24_TIMESTAMP /;"	d
CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB24_TIMESTAMP /;"	d
CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_DATA0 /;"	d
CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_DATA0 /;"	d
CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_DATA0 /;"	d
CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_DATA0 /;"	d
CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_DATA1 /;"	d
CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_DATA1 /;"	d
CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_DATA1 /;"	d
CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_DATA1 /;"	d
CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_DATA2 /;"	d
CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_DATA2 /;"	d
CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_DATA2 /;"	d
CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_DATA2 /;"	d
CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_DATA3 /;"	d
CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_DATA3 /;"	d
CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_DATA3 /;"	d
CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_DATA3 /;"	d
CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_ID0 /;"	d
CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_ID0 /;"	d
CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_ID0 /;"	d
CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_ID0 /;"	d
CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_ID1 /;"	d
CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_ID1 /;"	d
CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_ID1 /;"	d
CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_ID1 /;"	d
CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_LENGTH /;"	d
CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_LENGTH /;"	d
CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_LENGTH /;"	d
CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_LENGTH /;"	d
CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB25_TIMESTAMP /;"	d
CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB25_TIMESTAMP /;"	d
CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB25_TIMESTAMP /;"	d
CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB25_TIMESTAMP /;"	d
CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_DATA0 /;"	d
CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_DATA0 /;"	d
CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_DATA0 /;"	d
CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_DATA0 /;"	d
CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_DATA1 /;"	d
CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_DATA1 /;"	d
CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_DATA1 /;"	d
CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_DATA1 /;"	d
CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_DATA2 /;"	d
CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_DATA2 /;"	d
CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_DATA2 /;"	d
CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_DATA2 /;"	d
CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_DATA3 /;"	d
CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_DATA3 /;"	d
CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_DATA3 /;"	d
CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_DATA3 /;"	d
CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_ID0 /;"	d
CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_ID0 /;"	d
CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_ID0 /;"	d
CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_ID0 /;"	d
CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_ID1 /;"	d
CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_ID1 /;"	d
CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_ID1 /;"	d
CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_ID1 /;"	d
CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_LENGTH /;"	d
CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_LENGTH /;"	d
CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_LENGTH /;"	d
CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_LENGTH /;"	d
CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB26_TIMESTAMP /;"	d
CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB26_TIMESTAMP /;"	d
CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB26_TIMESTAMP /;"	d
CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB26_TIMESTAMP /;"	d
CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_DATA0 /;"	d
CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_DATA0 /;"	d
CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_DATA0 /;"	d
CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_DATA0 /;"	d
CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_DATA1 /;"	d
CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_DATA1 /;"	d
CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_DATA1 /;"	d
CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_DATA1 /;"	d
CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_DATA2 /;"	d
CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_DATA2 /;"	d
CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_DATA2 /;"	d
CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_DATA2 /;"	d
CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_DATA3 /;"	d
CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_DATA3 /;"	d
CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_DATA3 /;"	d
CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_DATA3 /;"	d
CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_ID0 /;"	d
CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_ID0 /;"	d
CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_ID0 /;"	d
CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_ID0 /;"	d
CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_ID1 /;"	d
CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_ID1 /;"	d
CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_ID1 /;"	d
CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_ID1 /;"	d
CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_LENGTH /;"	d
CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_LENGTH /;"	d
CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_LENGTH /;"	d
CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_LENGTH /;"	d
CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB27_TIMESTAMP /;"	d
CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB27_TIMESTAMP /;"	d
CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB27_TIMESTAMP /;"	d
CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB27_TIMESTAMP /;"	d
CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_DATA0 /;"	d
CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_DATA0 /;"	d
CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_DATA0 /;"	d
CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_DATA0 /;"	d
CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_DATA1 /;"	d
CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_DATA1 /;"	d
CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_DATA1 /;"	d
CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_DATA1 /;"	d
CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_DATA2 /;"	d
CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_DATA2 /;"	d
CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_DATA2 /;"	d
CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_DATA2 /;"	d
CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_DATA3 /;"	d
CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_DATA3 /;"	d
CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_DATA3 /;"	d
CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_DATA3 /;"	d
CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_ID0 /;"	d
CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_ID0 /;"	d
CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_ID0 /;"	d
CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_ID0 /;"	d
CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_ID1 /;"	d
CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_ID1 /;"	d
CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_ID1 /;"	d
CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_ID1 /;"	d
CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_LENGTH /;"	d
CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_LENGTH /;"	d
CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_LENGTH /;"	d
CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_LENGTH /;"	d
CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB28_TIMESTAMP /;"	d
CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB28_TIMESTAMP /;"	d
CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB28_TIMESTAMP /;"	d
CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB28_TIMESTAMP /;"	d
CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_DATA0 /;"	d
CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_DATA0 /;"	d
CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_DATA0 /;"	d
CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_DATA0 /;"	d
CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_DATA1 /;"	d
CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_DATA1 /;"	d
CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_DATA1 /;"	d
CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_DATA1 /;"	d
CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_DATA2 /;"	d
CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_DATA2 /;"	d
CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_DATA2 /;"	d
CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_DATA2 /;"	d
CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_DATA3 /;"	d
CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_DATA3 /;"	d
CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_DATA3 /;"	d
CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_DATA3 /;"	d
CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_ID0 /;"	d
CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_ID0 /;"	d
CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_ID0 /;"	d
CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_ID0 /;"	d
CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_ID1 /;"	d
CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_ID1 /;"	d
CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_ID1 /;"	d
CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_ID1 /;"	d
CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_LENGTH /;"	d
CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_LENGTH /;"	d
CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_LENGTH /;"	d
CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_LENGTH /;"	d
CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB29_TIMESTAMP /;"	d
CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB29_TIMESTAMP /;"	d
CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB29_TIMESTAMP /;"	d
CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB29_TIMESTAMP /;"	d
CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_DATA0 /;"	d
CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_DATA0 /;"	d
CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_DATA0 /;"	d
CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_DATA0 /;"	d
CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_DATA1 /;"	d
CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_DATA1 /;"	d
CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_DATA1 /;"	d
CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_DATA1 /;"	d
CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_DATA2 /;"	d
CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_DATA2 /;"	d
CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_DATA2 /;"	d
CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_DATA2 /;"	d
CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_DATA3 /;"	d
CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_DATA3 /;"	d
CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_DATA3 /;"	d
CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_DATA3 /;"	d
CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_ID0 /;"	d
CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_ID0 /;"	d
CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_ID0 /;"	d
CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_ID0 /;"	d
CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_ID1 /;"	d
CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_ID1 /;"	d
CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_ID1 /;"	d
CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_ID1 /;"	d
CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_LENGTH /;"	d
CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_LENGTH /;"	d
CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_LENGTH /;"	d
CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_LENGTH /;"	d
CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB30_TIMESTAMP /;"	d
CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB30_TIMESTAMP /;"	d
CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB30_TIMESTAMP /;"	d
CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB30_TIMESTAMP /;"	d
CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_DATA0 /;"	d
CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_DATA0 /;"	d
CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_DATA0 /;"	d
CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_DATA0 /;"	d
CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_DATA1 /;"	d
CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_DATA1 /;"	d
CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_DATA1 /;"	d
CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_DATA1 /;"	d
CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_DATA2 /;"	d
CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_DATA2 /;"	d
CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_DATA2 /;"	d
CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_DATA2 /;"	d
CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_DATA3 /;"	d
CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_DATA3 /;"	d
CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_DATA3 /;"	d
CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_DATA3 /;"	d
CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_ID0 /;"	d
CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_ID0 /;"	d
CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_ID0 /;"	d
CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_ID0 /;"	d
CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_ID1 /;"	d
CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_ID1 /;"	d
CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_ID1 /;"	d
CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_ID1 /;"	d
CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_LENGTH /;"	d
CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_LENGTH /;"	d
CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_LENGTH /;"	d
CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_LENGTH /;"	d
CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MB31_TIMESTAMP /;"	d
CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MB31_TIMESTAMP /;"	d
CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MB31_TIMESTAMP /;"	d
CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MB31_TIMESTAMP /;"	d
CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBIM1 /;"	d
CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBIM1 /;"	d
CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBIM1 /;"	d
CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBIM1 /;"	d
CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBIM2 /;"	d
CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBIM2 /;"	d
CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBIM2 /;"	d
CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBIM2 /;"	d
CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBRIF1 /;"	d
CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBRIF1 /;"	d
CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBRIF1 /;"	d
CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBRIF1 /;"	d
CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBRIF2 /;"	d
CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBRIF2 /;"	d
CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBRIF2 /;"	d
CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBRIF2 /;"	d
CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBTD /;"	d
CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBTD /;"	d
CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBTD /;"	d
CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBTD /;"	d
CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBTIF1 /;"	d
CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBTIF1 /;"	d
CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBTIF1 /;"	d
CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBTIF1 /;"	d
CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MBTIF2 /;"	d
CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MBTIF2 /;"	d
CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MBTIF2 /;"	d
CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MBTIF2 /;"	d
CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MC1 /;"	d
CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MC1 /;"	d
CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MC1 /;"	d
CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MC1 /;"	d
CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MC2 /;"	d
CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MC2 /;"	d
CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MC2 /;"	d
CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MC2 /;"	d
CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MD1 /;"	d
CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MD1 /;"	d
CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MD1 /;"	d
CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MD1 /;"	d
CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_MD2 /;"	d
CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_MD2 /;"	d
CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_MD2 /;"	d
CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_MD2 /;"	d
CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_OPSS1 /;"	d
CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_OPSS1 /;"	d
CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_OPSS1 /;"	d
CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_OPSS1 /;"	d
CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_OPSS2 /;"	d
CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_OPSS2 /;"	d
CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_OPSS2 /;"	d
CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_OPSS2 /;"	d
CAN0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN0_RESET	/;"	d
CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_RFH1 /;"	d
CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_RFH1 /;"	d
CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_RFH1 /;"	d
CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_RFH1 /;"	d
CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_RFH2 /;"	d
CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_RFH2 /;"	d
CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_RFH2 /;"	d
CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_RFH2 /;"	d
CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_RML1 /;"	d
CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_RML1 /;"	d
CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_RML1 /;"	d
CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_RML1 /;"	d
CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_RML2 /;"	d
CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_RML2 /;"	d
CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_RML2 /;"	d
CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_RML2 /;"	d
CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_RMP1 /;"	d
CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_RMP1 /;"	d
CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_RMP1 /;"	d
CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_RMP1 /;"	d
CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_RMP2 /;"	d
CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_RMP2 /;"	d
CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_RMP2 /;"	d
CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_RMP2 /;"	d
CAN0_RX_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN0_RX_A_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN0_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN0_RX_B_MARK, VI1_DATA4_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SCK_B_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, ADICLK_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN0_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN0_RX_B_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN0_RX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_RX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
CAN0_RX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_RX_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_RX_E_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona307835a0103	file:
CAN0_RX_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_RX_F_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona307879b0103	file:
CAN0_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_STATUS /;"	d
CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_STATUS /;"	d
CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_STATUS /;"	d
CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_STATUS /;"	d
CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TA1 /;"	d
CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TA1 /;"	d
CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TA1 /;"	d
CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TA1 /;"	d
CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TA2 /;"	d
CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TA2 /;"	d
CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TA2 /;"	d
CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TA2 /;"	d
CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TIMING /;"	d
CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TIMING /;"	d
CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TIMING /;"	d
CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TIMING /;"	d
CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TRR1 /;"	d
CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TRR1 /;"	d
CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TRR1 /;"	d
CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TRR1 /;"	d
CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TRR2 /;"	d
CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TRR2 /;"	d
CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TRR2 /;"	d
CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TRR2 /;"	d
CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TRS1 /;"	d
CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TRS1 /;"	d
CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TRS1 /;"	d
CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TRS1 /;"	d
CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_TRS2 /;"	d
CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_TRS2 /;"	d
CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_TRS2 /;"	d
CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_TRS2 /;"	d
CAN0_TX_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN0_TX_A_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN0_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN0_TX_B_MARK, VI1_DATA5_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN0_TX_B_MARK, AVB_TXD2_MARK, ADICHS0_MARK, AD_NCS_N_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN0_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN0_TX_B_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN0_TX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_TX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
CAN0_TX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_TX_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_TX_F_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN0_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN0_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona307879b0103	file:
CAN0_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_UCCNF /;"	d
CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_UCCNF /;"	d
CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_UCCNF /;"	d
CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_UCCNF /;"	d
CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_UCCNT /;"	d
CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_UCCNT /;"	d
CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_UCCNT /;"	d
CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_UCCNT /;"	d
CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CAN0_UCRC /;"	d
CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN0_UCRC /;"	d
CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN0_UCRC /;"	d
CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN0_UCRC /;"	d
CAN1_2_STBY	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	CAN1_2_STBY,$/;"	e	enum:qn	file:
CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AA1 /;"	d
CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AA1 /;"	d
CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AA1 /;"	d
CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AA2 /;"	d
CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AA2 /;"	d
CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AA2 /;"	d
CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM00H /;"	d
CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM00H /;"	d
CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM00H /;"	d
CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM00L /;"	d
CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM00L /;"	d
CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM00L /;"	d
CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM01H /;"	d
CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM01H /;"	d
CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM01H /;"	d
CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM01L /;"	d
CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM01L /;"	d
CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM01L /;"	d
CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM02H /;"	d
CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM02H /;"	d
CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM02H /;"	d
CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM02L /;"	d
CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM02L /;"	d
CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM02L /;"	d
CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM03H /;"	d
CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM03H /;"	d
CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM03H /;"	d
CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM03L /;"	d
CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM03L /;"	d
CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM03L /;"	d
CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM04H /;"	d
CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM04H /;"	d
CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM04H /;"	d
CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM04L /;"	d
CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM04L /;"	d
CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM04L /;"	d
CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM05H /;"	d
CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM05H /;"	d
CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM05H /;"	d
CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM05L /;"	d
CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM05L /;"	d
CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM05L /;"	d
CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM06H /;"	d
CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM06H /;"	d
CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM06H /;"	d
CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM06L /;"	d
CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM06L /;"	d
CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM06L /;"	d
CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM07H /;"	d
CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM07H /;"	d
CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM07H /;"	d
CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM07L /;"	d
CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM07L /;"	d
CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM07L /;"	d
CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM08H /;"	d
CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM08H /;"	d
CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM08H /;"	d
CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM08L /;"	d
CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM08L /;"	d
CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM08L /;"	d
CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM09H /;"	d
CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM09H /;"	d
CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM09H /;"	d
CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM09L /;"	d
CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM09L /;"	d
CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM09L /;"	d
CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM10H /;"	d
CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM10H /;"	d
CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM10H /;"	d
CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM10L /;"	d
CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM10L /;"	d
CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM10L /;"	d
CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM11H /;"	d
CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM11H /;"	d
CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM11H /;"	d
CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM11L /;"	d
CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM11L /;"	d
CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM11L /;"	d
CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM12H /;"	d
CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM12H /;"	d
CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM12H /;"	d
CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM12L /;"	d
CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM12L /;"	d
CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM12L /;"	d
CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM13H /;"	d
CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM13H /;"	d
CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM13H /;"	d
CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM13L /;"	d
CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM13L /;"	d
CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM13L /;"	d
CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM14H /;"	d
CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM14H /;"	d
CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM14H /;"	d
CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM14L /;"	d
CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM14L /;"	d
CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM14L /;"	d
CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM15H /;"	d
CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM15H /;"	d
CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM15H /;"	d
CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM15L /;"	d
CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM15L /;"	d
CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM15L /;"	d
CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM16H /;"	d
CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM16H /;"	d
CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM16H /;"	d
CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM16L /;"	d
CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM16L /;"	d
CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM16L /;"	d
CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM17H /;"	d
CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM17H /;"	d
CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM17H /;"	d
CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM17L /;"	d
CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM17L /;"	d
CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM17L /;"	d
CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM18H /;"	d
CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM18H /;"	d
CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM18H /;"	d
CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM18L /;"	d
CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM18L /;"	d
CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM18L /;"	d
CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM19H /;"	d
CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM19H /;"	d
CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM19H /;"	d
CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM19L /;"	d
CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM19L /;"	d
CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM19L /;"	d
CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM20H /;"	d
CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM20H /;"	d
CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM20H /;"	d
CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM20L /;"	d
CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM20L /;"	d
CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM20L /;"	d
CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM21H /;"	d
CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM21H /;"	d
CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM21H /;"	d
CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM21L /;"	d
CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM21L /;"	d
CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM21L /;"	d
CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM22H /;"	d
CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM22H /;"	d
CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM22H /;"	d
CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM22L /;"	d
CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM22L /;"	d
CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM22L /;"	d
CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM23H /;"	d
CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM23H /;"	d
CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM23H /;"	d
CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM23L /;"	d
CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM23L /;"	d
CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM23L /;"	d
CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM24H /;"	d
CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM24H /;"	d
CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM24H /;"	d
CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM24L /;"	d
CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM24L /;"	d
CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM24L /;"	d
CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM25H /;"	d
CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM25H /;"	d
CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM25H /;"	d
CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM25L /;"	d
CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM25L /;"	d
CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM25L /;"	d
CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM26H /;"	d
CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM26H /;"	d
CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM26H /;"	d
CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM26L /;"	d
CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM26L /;"	d
CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM26L /;"	d
CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM27H /;"	d
CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM27H /;"	d
CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM27H /;"	d
CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM27L /;"	d
CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM27L /;"	d
CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM27L /;"	d
CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM28H /;"	d
CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM28H /;"	d
CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM28H /;"	d
CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM28L /;"	d
CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM28L /;"	d
CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM28L /;"	d
CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM29H /;"	d
CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM29H /;"	d
CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM29H /;"	d
CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM29L /;"	d
CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM29L /;"	d
CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM29L /;"	d
CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM30H /;"	d
CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM30H /;"	d
CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM30H /;"	d
CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM30L /;"	d
CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM30L /;"	d
CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM30L /;"	d
CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM31H /;"	d
CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM31H /;"	d
CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM31H /;"	d
CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_AM31L /;"	d
CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_AM31L /;"	d
CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_AM31L /;"	d
CAN1_BA	include/configs/PLU405.h	/^#define CAN1_BA	/;"	d
CAN1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CAN1_BASE_ADDR /;"	d
CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_CEC /;"	d
CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_CEC /;"	d
CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_CEC /;"	d
CAN1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	CAN1_CLK_ROOT = 89,$/;"	e	enum:clk_root_index
CAN1_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
CAN1_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
CAN1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
CAN1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
CAN1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
CAN1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
CAN1_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
CAN1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_CLOCK /;"	d
CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_CLOCK /;"	d
CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_CLOCK /;"	d
CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_CONTROL /;"	d
CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_CONTROL /;"	d
CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_CONTROL /;"	d
CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_DEBUG /;"	d
CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_DEBUG /;"	d
CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_DEBUG /;"	d
CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_ESR /;"	d
CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_ESR /;"	d
CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_ESR /;"	d
CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_EWR /;"	d
CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_EWR /;"	d
CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_EWR /;"	d
CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_GIF /;"	d
CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_GIF /;"	d
CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_GIF /;"	d
CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_GIM /;"	d
CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_GIM /;"	d
CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_GIM /;"	d
CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_GIS /;"	d
CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_GIS /;"	d
CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_GIS /;"	d
CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_INTR /;"	d
CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_INTR /;"	d
CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_INTR /;"	d
CAN1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CAN1_IPS_BASE_ADDR /;"	d
CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_DATA0 /;"	d
CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_DATA0 /;"	d
CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_DATA0 /;"	d
CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_DATA1 /;"	d
CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_DATA1 /;"	d
CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_DATA1 /;"	d
CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_DATA2 /;"	d
CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_DATA2 /;"	d
CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_DATA2 /;"	d
CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_DATA3 /;"	d
CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_DATA3 /;"	d
CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_DATA3 /;"	d
CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_ID0 /;"	d
CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_ID0 /;"	d
CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_ID0 /;"	d
CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_ID1 /;"	d
CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_ID1 /;"	d
CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_ID1 /;"	d
CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_LENGTH /;"	d
CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_LENGTH /;"	d
CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_LENGTH /;"	d
CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB00_TIMESTAMP /;"	d
CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB00_TIMESTAMP /;"	d
CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB00_TIMESTAMP /;"	d
CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_DATA0 /;"	d
CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_DATA0 /;"	d
CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_DATA0 /;"	d
CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_DATA1 /;"	d
CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_DATA1 /;"	d
CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_DATA1 /;"	d
CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_DATA2 /;"	d
CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_DATA2 /;"	d
CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_DATA2 /;"	d
CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_DATA3 /;"	d
CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_DATA3 /;"	d
CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_DATA3 /;"	d
CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_ID0 /;"	d
CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_ID0 /;"	d
CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_ID0 /;"	d
CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_ID1 /;"	d
CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_ID1 /;"	d
CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_ID1 /;"	d
CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_LENGTH /;"	d
CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_LENGTH /;"	d
CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_LENGTH /;"	d
CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB01_TIMESTAMP /;"	d
CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB01_TIMESTAMP /;"	d
CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB01_TIMESTAMP /;"	d
CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_DATA0 /;"	d
CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_DATA0 /;"	d
CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_DATA0 /;"	d
CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_DATA1 /;"	d
CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_DATA1 /;"	d
CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_DATA1 /;"	d
CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_DATA2 /;"	d
CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_DATA2 /;"	d
CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_DATA2 /;"	d
CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_DATA3 /;"	d
CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_DATA3 /;"	d
CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_DATA3 /;"	d
CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_ID0 /;"	d
CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_ID0 /;"	d
CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_ID0 /;"	d
CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_ID1 /;"	d
CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_ID1 /;"	d
CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_ID1 /;"	d
CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_LENGTH /;"	d
CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_LENGTH /;"	d
CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_LENGTH /;"	d
CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB02_TIMESTAMP /;"	d
CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB02_TIMESTAMP /;"	d
CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB02_TIMESTAMP /;"	d
CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_DATA0 /;"	d
CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_DATA0 /;"	d
CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_DATA0 /;"	d
CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_DATA1 /;"	d
CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_DATA1 /;"	d
CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_DATA1 /;"	d
CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_DATA2 /;"	d
CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_DATA2 /;"	d
CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_DATA2 /;"	d
CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_DATA3 /;"	d
CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_DATA3 /;"	d
CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_DATA3 /;"	d
CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_ID0 /;"	d
CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_ID0 /;"	d
CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_ID0 /;"	d
CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_ID1 /;"	d
CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_ID1 /;"	d
CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_ID1 /;"	d
CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_LENGTH /;"	d
CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_LENGTH /;"	d
CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_LENGTH /;"	d
CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB03_TIMESTAMP /;"	d
CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB03_TIMESTAMP /;"	d
CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB03_TIMESTAMP /;"	d
CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_DATA0 /;"	d
CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_DATA0 /;"	d
CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_DATA0 /;"	d
CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_DATA1 /;"	d
CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_DATA1 /;"	d
CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_DATA1 /;"	d
CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_DATA2 /;"	d
CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_DATA2 /;"	d
CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_DATA2 /;"	d
CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_DATA3 /;"	d
CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_DATA3 /;"	d
CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_DATA3 /;"	d
CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_ID0 /;"	d
CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_ID0 /;"	d
CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_ID0 /;"	d
CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_ID1 /;"	d
CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_ID1 /;"	d
CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_ID1 /;"	d
CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_LENGTH /;"	d
CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_LENGTH /;"	d
CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_LENGTH /;"	d
CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB04_TIMESTAMP /;"	d
CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB04_TIMESTAMP /;"	d
CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB04_TIMESTAMP /;"	d
CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_DATA0 /;"	d
CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_DATA0 /;"	d
CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_DATA0 /;"	d
CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_DATA1 /;"	d
CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_DATA1 /;"	d
CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_DATA1 /;"	d
CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_DATA2 /;"	d
CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_DATA2 /;"	d
CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_DATA2 /;"	d
CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_DATA3 /;"	d
CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_DATA3 /;"	d
CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_DATA3 /;"	d
CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_ID0 /;"	d
CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_ID0 /;"	d
CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_ID0 /;"	d
CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_ID1 /;"	d
CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_ID1 /;"	d
CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_ID1 /;"	d
CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_LENGTH /;"	d
CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_LENGTH /;"	d
CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_LENGTH /;"	d
CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB05_TIMESTAMP /;"	d
CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB05_TIMESTAMP /;"	d
CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB05_TIMESTAMP /;"	d
CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_DATA0 /;"	d
CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_DATA0 /;"	d
CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_DATA0 /;"	d
CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_DATA1 /;"	d
CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_DATA1 /;"	d
CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_DATA1 /;"	d
CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_DATA2 /;"	d
CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_DATA2 /;"	d
CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_DATA2 /;"	d
CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_DATA3 /;"	d
CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_DATA3 /;"	d
CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_DATA3 /;"	d
CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_ID0 /;"	d
CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_ID0 /;"	d
CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_ID0 /;"	d
CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_ID1 /;"	d
CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_ID1 /;"	d
CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_ID1 /;"	d
CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_LENGTH /;"	d
CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_LENGTH /;"	d
CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_LENGTH /;"	d
CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB06_TIMESTAMP /;"	d
CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB06_TIMESTAMP /;"	d
CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB06_TIMESTAMP /;"	d
CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_DATA0 /;"	d
CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_DATA0 /;"	d
CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_DATA0 /;"	d
CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_DATA1 /;"	d
CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_DATA1 /;"	d
CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_DATA1 /;"	d
CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_DATA2 /;"	d
CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_DATA2 /;"	d
CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_DATA2 /;"	d
CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_DATA3 /;"	d
CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_DATA3 /;"	d
CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_DATA3 /;"	d
CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_ID0 /;"	d
CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_ID0 /;"	d
CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_ID0 /;"	d
CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_ID1 /;"	d
CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_ID1 /;"	d
CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_ID1 /;"	d
CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_LENGTH /;"	d
CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_LENGTH /;"	d
CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_LENGTH /;"	d
CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB07_TIMESTAMP /;"	d
CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB07_TIMESTAMP /;"	d
CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB07_TIMESTAMP /;"	d
CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_DATA0 /;"	d
CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_DATA0 /;"	d
CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_DATA0 /;"	d
CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_DATA1 /;"	d
CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_DATA1 /;"	d
CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_DATA1 /;"	d
CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_DATA2 /;"	d
CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_DATA2 /;"	d
CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_DATA2 /;"	d
CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_DATA3 /;"	d
CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_DATA3 /;"	d
CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_DATA3 /;"	d
CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_ID0 /;"	d
CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_ID0 /;"	d
CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_ID0 /;"	d
CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_ID1 /;"	d
CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_ID1 /;"	d
CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_ID1 /;"	d
CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_LENGTH /;"	d
CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_LENGTH /;"	d
CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_LENGTH /;"	d
CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB08_TIMESTAMP /;"	d
CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB08_TIMESTAMP /;"	d
CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB08_TIMESTAMP /;"	d
CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_DATA0 /;"	d
CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_DATA0 /;"	d
CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_DATA0 /;"	d
CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_DATA1 /;"	d
CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_DATA1 /;"	d
CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_DATA1 /;"	d
CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_DATA2 /;"	d
CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_DATA2 /;"	d
CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_DATA2 /;"	d
CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_DATA3 /;"	d
CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_DATA3 /;"	d
CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_DATA3 /;"	d
CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_ID0 /;"	d
CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_ID0 /;"	d
CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_ID0 /;"	d
CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_ID1 /;"	d
CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_ID1 /;"	d
CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_ID1 /;"	d
CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_LENGTH /;"	d
CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_LENGTH /;"	d
CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_LENGTH /;"	d
CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB09_TIMESTAMP /;"	d
CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB09_TIMESTAMP /;"	d
CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB09_TIMESTAMP /;"	d
CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_DATA0 /;"	d
CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_DATA0 /;"	d
CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_DATA0 /;"	d
CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_DATA1 /;"	d
CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_DATA1 /;"	d
CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_DATA1 /;"	d
CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_DATA2 /;"	d
CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_DATA2 /;"	d
CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_DATA2 /;"	d
CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_DATA3 /;"	d
CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_DATA3 /;"	d
CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_DATA3 /;"	d
CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_ID0 /;"	d
CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_ID0 /;"	d
CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_ID0 /;"	d
CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_ID1 /;"	d
CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_ID1 /;"	d
CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_ID1 /;"	d
CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_LENGTH /;"	d
CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_LENGTH /;"	d
CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_LENGTH /;"	d
CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB10_TIMESTAMP /;"	d
CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB10_TIMESTAMP /;"	d
CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB10_TIMESTAMP /;"	d
CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_DATA0 /;"	d
CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_DATA0 /;"	d
CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_DATA0 /;"	d
CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_DATA1 /;"	d
CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_DATA1 /;"	d
CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_DATA1 /;"	d
CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_DATA2 /;"	d
CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_DATA2 /;"	d
CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_DATA2 /;"	d
CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_DATA3 /;"	d
CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_DATA3 /;"	d
CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_DATA3 /;"	d
CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_ID0 /;"	d
CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_ID0 /;"	d
CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_ID0 /;"	d
CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_ID1 /;"	d
CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_ID1 /;"	d
CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_ID1 /;"	d
CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_LENGTH /;"	d
CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_LENGTH /;"	d
CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_LENGTH /;"	d
CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB11_TIMESTAMP /;"	d
CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB11_TIMESTAMP /;"	d
CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB11_TIMESTAMP /;"	d
CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_DATA0 /;"	d
CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_DATA0 /;"	d
CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_DATA0 /;"	d
CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_DATA1 /;"	d
CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_DATA1 /;"	d
CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_DATA1 /;"	d
CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_DATA2 /;"	d
CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_DATA2 /;"	d
CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_DATA2 /;"	d
CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_DATA3 /;"	d
CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_DATA3 /;"	d
CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_DATA3 /;"	d
CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_ID0 /;"	d
CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_ID0 /;"	d
CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_ID0 /;"	d
CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_ID1 /;"	d
CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_ID1 /;"	d
CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_ID1 /;"	d
CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_LENGTH /;"	d
CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_LENGTH /;"	d
CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_LENGTH /;"	d
CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB12_TIMESTAMP /;"	d
CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB12_TIMESTAMP /;"	d
CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB12_TIMESTAMP /;"	d
CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_DATA0 /;"	d
CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_DATA0 /;"	d
CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_DATA0 /;"	d
CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_DATA1 /;"	d
CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_DATA1 /;"	d
CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_DATA1 /;"	d
CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_DATA2 /;"	d
CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_DATA2 /;"	d
CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_DATA2 /;"	d
CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_DATA3 /;"	d
CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_DATA3 /;"	d
CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_DATA3 /;"	d
CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_ID0 /;"	d
CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_ID0 /;"	d
CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_ID0 /;"	d
CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_ID1 /;"	d
CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_ID1 /;"	d
CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_ID1 /;"	d
CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_LENGTH /;"	d
CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_LENGTH /;"	d
CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_LENGTH /;"	d
CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB13_TIMESTAMP /;"	d
CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB13_TIMESTAMP /;"	d
CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB13_TIMESTAMP /;"	d
CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_DATA0 /;"	d
CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_DATA0 /;"	d
CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_DATA0 /;"	d
CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_DATA1 /;"	d
CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_DATA1 /;"	d
CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_DATA1 /;"	d
CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_DATA2 /;"	d
CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_DATA2 /;"	d
CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_DATA2 /;"	d
CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_DATA3 /;"	d
CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_DATA3 /;"	d
CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_DATA3 /;"	d
CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_ID0 /;"	d
CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_ID0 /;"	d
CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_ID0 /;"	d
CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_ID1 /;"	d
CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_ID1 /;"	d
CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_ID1 /;"	d
CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_LENGTH /;"	d
CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_LENGTH /;"	d
CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_LENGTH /;"	d
CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB14_TIMESTAMP /;"	d
CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB14_TIMESTAMP /;"	d
CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB14_TIMESTAMP /;"	d
CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_DATA0 /;"	d
CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_DATA0 /;"	d
CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_DATA0 /;"	d
CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_DATA1 /;"	d
CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_DATA1 /;"	d
CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_DATA1 /;"	d
CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_DATA2 /;"	d
CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_DATA2 /;"	d
CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_DATA2 /;"	d
CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_DATA3 /;"	d
CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_DATA3 /;"	d
CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_DATA3 /;"	d
CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_ID0 /;"	d
CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_ID0 /;"	d
CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_ID0 /;"	d
CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_ID1 /;"	d
CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_ID1 /;"	d
CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_ID1 /;"	d
CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_LENGTH /;"	d
CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_LENGTH /;"	d
CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_LENGTH /;"	d
CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB15_TIMESTAMP /;"	d
CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB15_TIMESTAMP /;"	d
CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB15_TIMESTAMP /;"	d
CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_DATA0 /;"	d
CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_DATA0 /;"	d
CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_DATA0 /;"	d
CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_DATA1 /;"	d
CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_DATA1 /;"	d
CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_DATA1 /;"	d
CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_DATA2 /;"	d
CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_DATA2 /;"	d
CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_DATA2 /;"	d
CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_DATA3 /;"	d
CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_DATA3 /;"	d
CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_DATA3 /;"	d
CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_ID0 /;"	d
CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_ID0 /;"	d
CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_ID0 /;"	d
CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_ID1 /;"	d
CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_ID1 /;"	d
CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_ID1 /;"	d
CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_LENGTH /;"	d
CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_LENGTH /;"	d
CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_LENGTH /;"	d
CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB16_TIMESTAMP /;"	d
CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB16_TIMESTAMP /;"	d
CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB16_TIMESTAMP /;"	d
CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_DATA0 /;"	d
CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_DATA0 /;"	d
CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_DATA0 /;"	d
CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_DATA1 /;"	d
CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_DATA1 /;"	d
CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_DATA1 /;"	d
CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_DATA2 /;"	d
CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_DATA2 /;"	d
CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_DATA2 /;"	d
CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_DATA3 /;"	d
CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_DATA3 /;"	d
CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_DATA3 /;"	d
CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_ID0 /;"	d
CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_ID0 /;"	d
CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_ID0 /;"	d
CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_ID1 /;"	d
CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_ID1 /;"	d
CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_ID1 /;"	d
CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_LENGTH /;"	d
CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_LENGTH /;"	d
CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_LENGTH /;"	d
CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB17_TIMESTAMP /;"	d
CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB17_TIMESTAMP /;"	d
CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB17_TIMESTAMP /;"	d
CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_DATA0 /;"	d
CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_DATA0 /;"	d
CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_DATA0 /;"	d
CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_DATA1 /;"	d
CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_DATA1 /;"	d
CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_DATA1 /;"	d
CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_DATA2 /;"	d
CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_DATA2 /;"	d
CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_DATA2 /;"	d
CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_DATA3 /;"	d
CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_DATA3 /;"	d
CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_DATA3 /;"	d
CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_ID0 /;"	d
CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_ID0 /;"	d
CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_ID0 /;"	d
CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_ID1 /;"	d
CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_ID1 /;"	d
CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_ID1 /;"	d
CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_LENGTH /;"	d
CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_LENGTH /;"	d
CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_LENGTH /;"	d
CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB18_TIMESTAMP /;"	d
CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB18_TIMESTAMP /;"	d
CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB18_TIMESTAMP /;"	d
CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_DATA0 /;"	d
CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_DATA0 /;"	d
CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_DATA0 /;"	d
CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_DATA1 /;"	d
CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_DATA1 /;"	d
CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_DATA1 /;"	d
CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_DATA2 /;"	d
CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_DATA2 /;"	d
CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_DATA2 /;"	d
CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_DATA3 /;"	d
CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_DATA3 /;"	d
CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_DATA3 /;"	d
CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_ID0 /;"	d
CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_ID0 /;"	d
CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_ID0 /;"	d
CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_ID1 /;"	d
CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_ID1 /;"	d
CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_ID1 /;"	d
CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_LENGTH /;"	d
CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_LENGTH /;"	d
CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_LENGTH /;"	d
CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB19_TIMESTAMP /;"	d
CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB19_TIMESTAMP /;"	d
CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB19_TIMESTAMP /;"	d
CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_DATA0 /;"	d
CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_DATA0 /;"	d
CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_DATA0 /;"	d
CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_DATA1 /;"	d
CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_DATA1 /;"	d
CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_DATA1 /;"	d
CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_DATA2 /;"	d
CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_DATA2 /;"	d
CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_DATA2 /;"	d
CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_DATA3 /;"	d
CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_DATA3 /;"	d
CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_DATA3 /;"	d
CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_ID0 /;"	d
CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_ID0 /;"	d
CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_ID0 /;"	d
CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_ID1 /;"	d
CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_ID1 /;"	d
CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_ID1 /;"	d
CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_LENGTH /;"	d
CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_LENGTH /;"	d
CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_LENGTH /;"	d
CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB20_TIMESTAMP /;"	d
CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB20_TIMESTAMP /;"	d
CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB20_TIMESTAMP /;"	d
CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_DATA0 /;"	d
CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_DATA0 /;"	d
CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_DATA0 /;"	d
CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_DATA1 /;"	d
CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_DATA1 /;"	d
CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_DATA1 /;"	d
CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_DATA2 /;"	d
CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_DATA2 /;"	d
CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_DATA2 /;"	d
CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_DATA3 /;"	d
CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_DATA3 /;"	d
CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_DATA3 /;"	d
CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_ID0 /;"	d
CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_ID0 /;"	d
CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_ID0 /;"	d
CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_ID1 /;"	d
CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_ID1 /;"	d
CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_ID1 /;"	d
CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_LENGTH /;"	d
CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_LENGTH /;"	d
CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_LENGTH /;"	d
CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB21_TIMESTAMP /;"	d
CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB21_TIMESTAMP /;"	d
CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB21_TIMESTAMP /;"	d
CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_DATA0 /;"	d
CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_DATA0 /;"	d
CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_DATA0 /;"	d
CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_DATA1 /;"	d
CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_DATA1 /;"	d
CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_DATA1 /;"	d
CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_DATA2 /;"	d
CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_DATA2 /;"	d
CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_DATA2 /;"	d
CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_DATA3 /;"	d
CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_DATA3 /;"	d
CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_DATA3 /;"	d
CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_ID0 /;"	d
CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_ID0 /;"	d
CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_ID0 /;"	d
CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_ID1 /;"	d
CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_ID1 /;"	d
CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_ID1 /;"	d
CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_LENGTH /;"	d
CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_LENGTH /;"	d
CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_LENGTH /;"	d
CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB22_TIMESTAMP /;"	d
CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB22_TIMESTAMP /;"	d
CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB22_TIMESTAMP /;"	d
CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_DATA0 /;"	d
CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_DATA0 /;"	d
CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_DATA0 /;"	d
CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_DATA1 /;"	d
CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_DATA1 /;"	d
CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_DATA1 /;"	d
CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_DATA2 /;"	d
CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_DATA2 /;"	d
CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_DATA2 /;"	d
CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_DATA3 /;"	d
CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_DATA3 /;"	d
CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_DATA3 /;"	d
CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_ID0 /;"	d
CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_ID0 /;"	d
CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_ID0 /;"	d
CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_ID1 /;"	d
CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_ID1 /;"	d
CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_ID1 /;"	d
CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_LENGTH /;"	d
CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_LENGTH /;"	d
CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_LENGTH /;"	d
CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB23_TIMESTAMP /;"	d
CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB23_TIMESTAMP /;"	d
CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB23_TIMESTAMP /;"	d
CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_DATA0 /;"	d
CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_DATA0 /;"	d
CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_DATA0 /;"	d
CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_DATA1 /;"	d
CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_DATA1 /;"	d
CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_DATA1 /;"	d
CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_DATA2 /;"	d
CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_DATA2 /;"	d
CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_DATA2 /;"	d
CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_DATA3 /;"	d
CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_DATA3 /;"	d
CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_DATA3 /;"	d
CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_ID0 /;"	d
CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_ID0 /;"	d
CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_ID0 /;"	d
CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_ID1 /;"	d
CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_ID1 /;"	d
CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_ID1 /;"	d
CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_LENGTH /;"	d
CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_LENGTH /;"	d
CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_LENGTH /;"	d
CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB24_TIMESTAMP /;"	d
CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB24_TIMESTAMP /;"	d
CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB24_TIMESTAMP /;"	d
CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_DATA0 /;"	d
CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_DATA0 /;"	d
CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_DATA0 /;"	d
CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_DATA1 /;"	d
CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_DATA1 /;"	d
CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_DATA1 /;"	d
CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_DATA2 /;"	d
CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_DATA2 /;"	d
CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_DATA2 /;"	d
CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_DATA3 /;"	d
CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_DATA3 /;"	d
CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_DATA3 /;"	d
CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_ID0 /;"	d
CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_ID0 /;"	d
CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_ID0 /;"	d
CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_ID1 /;"	d
CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_ID1 /;"	d
CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_ID1 /;"	d
CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_LENGTH /;"	d
CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_LENGTH /;"	d
CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_LENGTH /;"	d
CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB25_TIMESTAMP /;"	d
CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB25_TIMESTAMP /;"	d
CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB25_TIMESTAMP /;"	d
CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_DATA0 /;"	d
CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_DATA0 /;"	d
CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_DATA0 /;"	d
CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_DATA1 /;"	d
CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_DATA1 /;"	d
CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_DATA1 /;"	d
CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_DATA2 /;"	d
CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_DATA2 /;"	d
CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_DATA2 /;"	d
CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_DATA3 /;"	d
CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_DATA3 /;"	d
CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_DATA3 /;"	d
CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_ID0 /;"	d
CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_ID0 /;"	d
CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_ID0 /;"	d
CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_ID1 /;"	d
CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_ID1 /;"	d
CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_ID1 /;"	d
CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_LENGTH /;"	d
CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_LENGTH /;"	d
CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_LENGTH /;"	d
CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB26_TIMESTAMP /;"	d
CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB26_TIMESTAMP /;"	d
CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB26_TIMESTAMP /;"	d
CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_DATA0 /;"	d
CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_DATA0 /;"	d
CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_DATA0 /;"	d
CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_DATA1 /;"	d
CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_DATA1 /;"	d
CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_DATA1 /;"	d
CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_DATA2 /;"	d
CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_DATA2 /;"	d
CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_DATA2 /;"	d
CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_DATA3 /;"	d
CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_DATA3 /;"	d
CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_DATA3 /;"	d
CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_ID0 /;"	d
CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_ID0 /;"	d
CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_ID0 /;"	d
CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_ID1 /;"	d
CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_ID1 /;"	d
CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_ID1 /;"	d
CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_LENGTH /;"	d
CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_LENGTH /;"	d
CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_LENGTH /;"	d
CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB27_TIMESTAMP /;"	d
CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB27_TIMESTAMP /;"	d
CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB27_TIMESTAMP /;"	d
CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_DATA0 /;"	d
CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_DATA0 /;"	d
CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_DATA0 /;"	d
CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_DATA1 /;"	d
CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_DATA1 /;"	d
CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_DATA1 /;"	d
CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_DATA2 /;"	d
CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_DATA2 /;"	d
CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_DATA2 /;"	d
CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_DATA3 /;"	d
CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_DATA3 /;"	d
CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_DATA3 /;"	d
CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_ID0 /;"	d
CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_ID0 /;"	d
CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_ID0 /;"	d
CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_ID1 /;"	d
CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_ID1 /;"	d
CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_ID1 /;"	d
CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_LENGTH /;"	d
CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_LENGTH /;"	d
CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_LENGTH /;"	d
CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB28_TIMESTAMP /;"	d
CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB28_TIMESTAMP /;"	d
CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB28_TIMESTAMP /;"	d
CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_DATA0 /;"	d
CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_DATA0 /;"	d
CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_DATA0 /;"	d
CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_DATA1 /;"	d
CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_DATA1 /;"	d
CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_DATA1 /;"	d
CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_DATA2 /;"	d
CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_DATA2 /;"	d
CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_DATA2 /;"	d
CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_DATA3 /;"	d
CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_DATA3 /;"	d
CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_DATA3 /;"	d
CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_ID0 /;"	d
CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_ID0 /;"	d
CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_ID0 /;"	d
CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_ID1 /;"	d
CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_ID1 /;"	d
CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_ID1 /;"	d
CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_LENGTH /;"	d
CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_LENGTH /;"	d
CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_LENGTH /;"	d
CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB29_TIMESTAMP /;"	d
CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB29_TIMESTAMP /;"	d
CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB29_TIMESTAMP /;"	d
CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_DATA0 /;"	d
CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_DATA0 /;"	d
CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_DATA0 /;"	d
CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_DATA1 /;"	d
CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_DATA1 /;"	d
CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_DATA1 /;"	d
CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_DATA2 /;"	d
CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_DATA2 /;"	d
CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_DATA2 /;"	d
CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_DATA3 /;"	d
CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_DATA3 /;"	d
CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_DATA3 /;"	d
CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_ID0 /;"	d
CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_ID0 /;"	d
CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_ID0 /;"	d
CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_ID1 /;"	d
CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_ID1 /;"	d
CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_ID1 /;"	d
CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_LENGTH /;"	d
CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_LENGTH /;"	d
CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_LENGTH /;"	d
CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB30_TIMESTAMP /;"	d
CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB30_TIMESTAMP /;"	d
CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB30_TIMESTAMP /;"	d
CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_DATA0 /;"	d
CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_DATA0 /;"	d
CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_DATA0 /;"	d
CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_DATA1 /;"	d
CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_DATA1 /;"	d
CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_DATA1 /;"	d
CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_DATA2 /;"	d
CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_DATA2 /;"	d
CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_DATA2 /;"	d
CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_DATA3 /;"	d
CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_DATA3 /;"	d
CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_DATA3 /;"	d
CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_ID0 /;"	d
CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_ID0 /;"	d
CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_ID0 /;"	d
CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_ID1 /;"	d
CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_ID1 /;"	d
CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_ID1 /;"	d
CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_LENGTH /;"	d
CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_LENGTH /;"	d
CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_LENGTH /;"	d
CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MB31_TIMESTAMP /;"	d
CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MB31_TIMESTAMP /;"	d
CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MB31_TIMESTAMP /;"	d
CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBIM1 /;"	d
CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBIM1 /;"	d
CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBIM1 /;"	d
CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBIM2 /;"	d
CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBIM2 /;"	d
CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBIM2 /;"	d
CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBRIF1 /;"	d
CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBRIF1 /;"	d
CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBRIF1 /;"	d
CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBRIF2 /;"	d
CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBRIF2 /;"	d
CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBRIF2 /;"	d
CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBTD /;"	d
CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBTD /;"	d
CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBTD /;"	d
CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBTIF1 /;"	d
CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBTIF1 /;"	d
CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBTIF1 /;"	d
CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MBTIF2 /;"	d
CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MBTIF2 /;"	d
CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MBTIF2 /;"	d
CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MC1 /;"	d
CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MC1 /;"	d
CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MC1 /;"	d
CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MC2 /;"	d
CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MC2 /;"	d
CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MC2 /;"	d
CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MD1 /;"	d
CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MD1 /;"	d
CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MD1 /;"	d
CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_MD2 /;"	d
CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_MD2 /;"	d
CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_MD2 /;"	d
CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_OPSS1 /;"	d
CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_OPSS1 /;"	d
CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_OPSS1 /;"	d
CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_OPSS2 /;"	d
CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_OPSS2 /;"	d
CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_OPSS2 /;"	d
CAN1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define CAN1_RESET	/;"	d
CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_RFH1 /;"	d
CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_RFH1 /;"	d
CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_RFH1 /;"	d
CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_RFH2 /;"	d
CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_RFH2 /;"	d
CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_RFH2 /;"	d
CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_RML1 /;"	d
CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_RML1 /;"	d
CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_RML1 /;"	d
CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_RML2 /;"	d
CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_RML2 /;"	d
CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_RML2 /;"	d
CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_RMP1 /;"	d
CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_RMP1 /;"	d
CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_RMP1 /;"	d
CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_RMP2 /;"	d
CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_RMP2 /;"	d
CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_RMP2 /;"	d
CAN1_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN1_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN1_RX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,$/;"	e	enum:__anona307835a0103	file:
CAN1_RX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN1_RX_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN1_RX_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_GTXREFCLK_MARK, CAN1_RX_D_MARK, TPUTO0_B_MARK, I2C0_SDA_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN1_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN1_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,$/;"	e	enum:__anona307879b0103	file:
CAN1_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_RX_MARK, MMC_D7_MARK, SCIF0_TXD_MARK, I2C2_SDA_B_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN1_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN1_RX_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_STATUS /;"	d
CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_STATUS /;"	d
CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_STATUS /;"	d
CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TA1 /;"	d
CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TA1 /;"	d
CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TA1 /;"	d
CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TA2 /;"	d
CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TA2 /;"	d
CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TA2 /;"	d
CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TIMING /;"	d
CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TIMING /;"	d
CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TIMING /;"	d
CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TRR1 /;"	d
CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TRR1 /;"	d
CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TRR1 /;"	d
CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TRR2 /;"	d
CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TRR2 /;"	d
CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TRR2 /;"	d
CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TRS1 /;"	d
CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TRS1 /;"	d
CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TRS1 /;"	d
CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_TRS2 /;"	d
CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_TRS2 /;"	d
CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_TRS2 /;"	d
CAN1_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN1_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN1_TX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,$/;"	e	enum:__anona307835a0103	file:
CAN1_TX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN1_TX_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN1_TX_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_D_MARK, I2C1_SCL_MARK, SCIF4_RXD_MARK, PWM5_B_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN1_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN1_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,$/;"	e	enum:__anona307879b0103	file:
CAN1_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN1_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN1_TX_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_UCCNF /;"	d
CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_UCCNF /;"	d
CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_UCCNF /;"	d
CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_UCCNT /;"	d
CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_UCCNT /;"	d
CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_UCCNT /;"	d
CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CAN1_UCRC /;"	d
CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CAN1_UCRC /;"	d
CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CAN1_UCRC /;"	d
CAN2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CAN2_BASE_ADDR /;"	d
CAN2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	CAN2_CLK_ROOT = 90,$/;"	e	enum:clk_root_index
CAN2_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
CAN2_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
CAN2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
CAN2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
CAN2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
CAN2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
CAN2_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
CAN2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CAN2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
CAN2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CAN2_IPS_BASE_ADDR /;"	d
CANFD0_RX_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CANFD0_RX_A_MARK,$/;"	e	enum:__anona307945e0103	file:
CANFD0_RX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CANFD0_RX_B_MARK,$/;"	e	enum:__anona307945e0103	file:
CANFD0_TX_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CANFD0_TX_A_MARK,$/;"	e	enum:__anona307945e0103	file:
CANFD0_TX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CANFD0_TX_B_MARK,$/;"	e	enum:__anona307945e0103	file:
CANFD1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CANFD1_BASE_ADDR /;"	d
CANFD1_RX_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CANFD1_RX_MARK,$/;"	e	enum:__anona307945e0103	file:
CANFD1_TX_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CANFD1_TX_MARK,$/;"	e	enum:__anona307945e0103	file:
CANFD2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CANFD2_BASE_ADDR /;"	d
CANFD_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CANFD_BASE_ADDR /;"	d
CANWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CANWE	/;"	d
CANYONLANDS	board/amcc/canyonlands/Kconfig	/^config CANYONLANDS$/;"	c	choice:BOARD_TYPE
CAN_AA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AA1 /;"	d
CAN_AA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AA1 /;"	d
CAN_AA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AA1 /;"	d
CAN_AA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AA2 /;"	d
CAN_AA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AA2 /;"	d
CAN_AA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AA2 /;"	d
CAN_AM00H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM00H /;"	d
CAN_AM00H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM00H /;"	d
CAN_AM00H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM00H /;"	d
CAN_AM00L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM00L /;"	d
CAN_AM00L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM00L /;"	d
CAN_AM00L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM00L /;"	d
CAN_AM01H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM01H /;"	d
CAN_AM01H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM01H /;"	d
CAN_AM01H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM01H /;"	d
CAN_AM01L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM01L /;"	d
CAN_AM01L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM01L /;"	d
CAN_AM01L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM01L /;"	d
CAN_AM02H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM02H /;"	d
CAN_AM02H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM02H /;"	d
CAN_AM02H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM02H /;"	d
CAN_AM02L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM02L /;"	d
CAN_AM02L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM02L /;"	d
CAN_AM02L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM02L /;"	d
CAN_AM03H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM03H /;"	d
CAN_AM03H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM03H /;"	d
CAN_AM03H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM03H /;"	d
CAN_AM03L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM03L /;"	d
CAN_AM03L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM03L /;"	d
CAN_AM03L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM03L /;"	d
CAN_AM04H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM04H /;"	d
CAN_AM04H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM04H /;"	d
CAN_AM04H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM04H /;"	d
CAN_AM04L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM04L /;"	d
CAN_AM04L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM04L /;"	d
CAN_AM04L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM04L /;"	d
CAN_AM05H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM05H /;"	d
CAN_AM05H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM05H /;"	d
CAN_AM05H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM05H /;"	d
CAN_AM05L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM05L /;"	d
CAN_AM05L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM05L /;"	d
CAN_AM05L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM05L /;"	d
CAN_AM06H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM06H /;"	d
CAN_AM06H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM06H /;"	d
CAN_AM06H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM06H /;"	d
CAN_AM06L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM06L /;"	d
CAN_AM06L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM06L /;"	d
CAN_AM06L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM06L /;"	d
CAN_AM07H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM07H /;"	d
CAN_AM07H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM07H /;"	d
CAN_AM07H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM07H /;"	d
CAN_AM07L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM07L /;"	d
CAN_AM07L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM07L /;"	d
CAN_AM07L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM07L /;"	d
CAN_AM08H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM08H /;"	d
CAN_AM08H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM08H /;"	d
CAN_AM08H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM08H /;"	d
CAN_AM08L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM08L /;"	d
CAN_AM08L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM08L /;"	d
CAN_AM08L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM08L /;"	d
CAN_AM09H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM09H /;"	d
CAN_AM09H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM09H /;"	d
CAN_AM09H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM09H /;"	d
CAN_AM09L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM09L /;"	d
CAN_AM09L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM09L /;"	d
CAN_AM09L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM09L /;"	d
CAN_AM10H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM10H /;"	d
CAN_AM10H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM10H /;"	d
CAN_AM10H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM10H /;"	d
CAN_AM10L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM10L /;"	d
CAN_AM10L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM10L /;"	d
CAN_AM10L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM10L /;"	d
CAN_AM11H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM11H /;"	d
CAN_AM11H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM11H /;"	d
CAN_AM11H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM11H /;"	d
CAN_AM11L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM11L /;"	d
CAN_AM11L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM11L /;"	d
CAN_AM11L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM11L /;"	d
CAN_AM12H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM12H /;"	d
CAN_AM12H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM12H /;"	d
CAN_AM12H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM12H /;"	d
CAN_AM12L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM12L /;"	d
CAN_AM12L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM12L /;"	d
CAN_AM12L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM12L /;"	d
CAN_AM13H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM13H /;"	d
CAN_AM13H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM13H /;"	d
CAN_AM13H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM13H /;"	d
CAN_AM13L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM13L /;"	d
CAN_AM13L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM13L /;"	d
CAN_AM13L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM13L /;"	d
CAN_AM14H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM14H /;"	d
CAN_AM14H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM14H /;"	d
CAN_AM14H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM14H /;"	d
CAN_AM14L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM14L /;"	d
CAN_AM14L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM14L /;"	d
CAN_AM14L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM14L /;"	d
CAN_AM15H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM15H /;"	d
CAN_AM15H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM15H /;"	d
CAN_AM15H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM15H /;"	d
CAN_AM15L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM15L /;"	d
CAN_AM15L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM15L /;"	d
CAN_AM15L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM15L /;"	d
CAN_AM16H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM16H /;"	d
CAN_AM16H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM16H /;"	d
CAN_AM16H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM16H /;"	d
CAN_AM16L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM16L /;"	d
CAN_AM16L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM16L /;"	d
CAN_AM16L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM16L /;"	d
CAN_AM17H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM17H /;"	d
CAN_AM17H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM17H /;"	d
CAN_AM17H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM17H /;"	d
CAN_AM17L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM17L /;"	d
CAN_AM17L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM17L /;"	d
CAN_AM17L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM17L /;"	d
CAN_AM18H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM18H /;"	d
CAN_AM18H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM18H /;"	d
CAN_AM18H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM18H /;"	d
CAN_AM18L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM18L /;"	d
CAN_AM18L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM18L /;"	d
CAN_AM18L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM18L /;"	d
CAN_AM19H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM19H /;"	d
CAN_AM19H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM19H /;"	d
CAN_AM19H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM19H /;"	d
CAN_AM19L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM19L /;"	d
CAN_AM19L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM19L /;"	d
CAN_AM19L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM19L /;"	d
CAN_AM20H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM20H /;"	d
CAN_AM20H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM20H /;"	d
CAN_AM20H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM20H /;"	d
CAN_AM20L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM20L /;"	d
CAN_AM20L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM20L /;"	d
CAN_AM20L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM20L /;"	d
CAN_AM21H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM21H /;"	d
CAN_AM21H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM21H /;"	d
CAN_AM21H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM21H /;"	d
CAN_AM21L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM21L /;"	d
CAN_AM21L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM21L /;"	d
CAN_AM21L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM21L /;"	d
CAN_AM22H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM22H /;"	d
CAN_AM22H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM22H /;"	d
CAN_AM22H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM22H /;"	d
CAN_AM22L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM22L /;"	d
CAN_AM22L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM22L /;"	d
CAN_AM22L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM22L /;"	d
CAN_AM23H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM23H /;"	d
CAN_AM23H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM23H /;"	d
CAN_AM23H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM23H /;"	d
CAN_AM23L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM23L /;"	d
CAN_AM23L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM23L /;"	d
CAN_AM23L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM23L /;"	d
CAN_AM24H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM24H /;"	d
CAN_AM24H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM24H /;"	d
CAN_AM24H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM24H /;"	d
CAN_AM24L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM24L /;"	d
CAN_AM24L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM24L /;"	d
CAN_AM24L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM24L /;"	d
CAN_AM25H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM25H /;"	d
CAN_AM25H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM25H /;"	d
CAN_AM25H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM25H /;"	d
CAN_AM25L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM25L /;"	d
CAN_AM25L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM25L /;"	d
CAN_AM25L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM25L /;"	d
CAN_AM26H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM26H /;"	d
CAN_AM26H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM26H /;"	d
CAN_AM26H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM26H /;"	d
CAN_AM26L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM26L /;"	d
CAN_AM26L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM26L /;"	d
CAN_AM26L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM26L /;"	d
CAN_AM27H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM27H /;"	d
CAN_AM27H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM27H /;"	d
CAN_AM27H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM27H /;"	d
CAN_AM27L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM27L /;"	d
CAN_AM27L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM27L /;"	d
CAN_AM27L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM27L /;"	d
CAN_AM28H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM28H /;"	d
CAN_AM28H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM28H /;"	d
CAN_AM28H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM28H /;"	d
CAN_AM28L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM28L /;"	d
CAN_AM28L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM28L /;"	d
CAN_AM28L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM28L /;"	d
CAN_AM29H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM29H /;"	d
CAN_AM29H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM29H /;"	d
CAN_AM29H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM29H /;"	d
CAN_AM29L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM29L /;"	d
CAN_AM29L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM29L /;"	d
CAN_AM29L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM29L /;"	d
CAN_AM30H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM30H /;"	d
CAN_AM30H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM30H /;"	d
CAN_AM30H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM30H /;"	d
CAN_AM30L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM30L /;"	d
CAN_AM30L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM30L /;"	d
CAN_AM30L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM30L /;"	d
CAN_AM31H	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM31H /;"	d
CAN_AM31H	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM31H /;"	d
CAN_AM31H	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM31H /;"	d
CAN_AM31L	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_AM31L /;"	d
CAN_AM31L	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_AM31L /;"	d
CAN_AM31L	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_AM31L /;"	d
CAN_BA	include/configs/VOM405.h	/^#define CAN_BA	/;"	d
CAN_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define CAN_BASE_ADDR /;"	d
CAN_CEC	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_CEC /;"	d
CAN_CEC	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_CEC /;"	d
CAN_CEC	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_CEC /;"	d
CAN_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona307835a0103	file:
CAN_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN_CLK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, PCMOE_N_MARK, SSI_SCK0129_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,$/;"	e	enum:__anona307879b0103	file:
CAN_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3078bdc0103	file:
CAN_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_TXD_C_MARK, TPUTO0_MARK, CAN_CLK_MARK, DVC_MUTE_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CAN_CLK_MARK,$/;"	e	enum:__anona307945e0103	file:
CAN_CLOCK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_CLOCK /;"	d
CAN_CLOCK	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_CLOCK /;"	d
CAN_CLOCK	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_CLOCK /;"	d
CAN_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_CONTROL /;"	d
CAN_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_CONTROL /;"	d
CAN_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_CONTROL /;"	d
CAN_CTRL_BOFFMSK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_BOFFMSK	/;"	d
CAN_CTRL_BOFFREC	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_BOFFREC	/;"	d
CAN_CTRL_CLKSRC	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_CLKSRC	/;"	d
CAN_CTRL_ERRMSK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_ERRMSK	/;"	d
CAN_CTRL_LBUF	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_LBUF	/;"	d
CAN_CTRL_LOM	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_LOM	/;"	d
CAN_CTRL_LPB	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_LPB	/;"	d
CAN_CTRL_PRESDIV	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PRESDIV(/;"	d
CAN_CTRL_PRESDIV_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PRESDIV_MASK	/;"	d
CAN_CTRL_PROPSEG	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PROPSEG(/;"	d
CAN_CTRL_PROPSEG_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PROPSEG_MASK	/;"	d
CAN_CTRL_PSEG1	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PSEG1(/;"	d
CAN_CTRL_PSEG1_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PSEG1_MASK	/;"	d
CAN_CTRL_PSEG2	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PSEG2(/;"	d
CAN_CTRL_PSEG2_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_PSEG2_MASK	/;"	d
CAN_CTRL_RJW	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_RJW(/;"	d
CAN_CTRL_RJW_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_RJW_MASK	/;"	d
CAN_CTRL_RXMODE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_RXMODE	/;"	d
CAN_CTRL_SMP	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_SMP	/;"	d
CAN_CTRL_TSYNC	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_TSYNC	/;"	d
CAN_CTRL_TXMODE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_TXMODE(/;"	d
CAN_CTRL_TXMODE_CAN0	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_TXMODE_CAN0	/;"	d
CAN_CTRL_TXMODE_CAN1	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_TXMODE_CAN1	/;"	d
CAN_CTRL_TXMODE_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_TXMODE_MASK	/;"	d
CAN_CTRL_TXMODE_OPEN	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_CTRL_TXMODE_OPEN	/;"	d
CAN_DEBUG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_DEBUG /;"	d
CAN_DEBUG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_DEBUG /;"	d
CAN_DEBUG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_DEBUG /;"	d
CAN_DEBUGOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT10_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT11_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT11_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT11_MARK, SSI_SDATA5_MARK, SCIFA3_TXD_MARK, I2C3_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_DEBUGOUT12_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT12_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DOTCLKOUT1_MARK, CAN_DEBUGOUT12_MARK, SSI_SCK6_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_DEBUGOUT13_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT13_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA1_SCK_B_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, CAN_DEBUGOUT13_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_DEBUGOUT14_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT14_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_EXVSYNC_DU1_VSYNC_MARK, CAN_DEBUGOUT14_MARK, SSI_SDATA6_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_DEBUGOUT15_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT15_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT15_MARK, SSI_SCK78_MARK, SCIFA2_SCK_B_MARK, IIC0_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
CAN_DEBUGOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT4_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT8_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUGOUT9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_DEBUG_HW_TRIGGER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_EN	board/bf609-ezkit/soft_switch.h	/^#define CAN_EN /;"	d
CAN_ERRCNT_RXECTR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRCNT_RXECTR(/;"	d
CAN_ERRCNT_RXECTR_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRCNT_RXECTR_MASK	/;"	d
CAN_ERRCNT_TXECTR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRCNT_TXECTR(/;"	d
CAN_ERRCNT_TXECTR_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRCNT_TXECTR_MASK	/;"	d
CAN_ERRSTAT_ACKERR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_ACKERR	/;"	d
CAN_ERRSTAT_BITERR0	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_BITERR0	/;"	d
CAN_ERRSTAT_BITERR1	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_BITERR1	/;"	d
CAN_ERRSTAT_BOFFINT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_BOFFINT	/;"	d
CAN_ERRSTAT_CRCERR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_CRCERR	/;"	d
CAN_ERRSTAT_ERRINT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_ERRINT	/;"	d
CAN_ERRSTAT_FLT_ACTIVE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_FLT_ACTIVE	/;"	d
CAN_ERRSTAT_FLT_BUSOFF	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_FLT_BUSOFF	/;"	d
CAN_ERRSTAT_FLT_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_FLT_MASK	/;"	d
CAN_ERRSTAT_FLT_PASSIVE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_FLT_PASSIVE	/;"	d
CAN_ERRSTAT_FRMERR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_FRMERR	/;"	d
CAN_ERRSTAT_IDLE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_IDLE	/;"	d
CAN_ERRSTAT_RXWRN	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_RXWRN	/;"	d
CAN_ERRSTAT_STFERR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_STFERR	/;"	d
CAN_ERRSTAT_TXRX	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_TXRX	/;"	d
CAN_ERRSTAT_TXWRN	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_TXWRN	/;"	d
CAN_ERRSTAT_WAKEINT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_ERRSTAT_WAKEINT	/;"	d
CAN_ESR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_ESR /;"	d
CAN_ESR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_ESR /;"	d
CAN_ESR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_ESR /;"	d
CAN_EWR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_EWR /;"	d
CAN_EWR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_EWR /;"	d
CAN_EWR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_EWR /;"	d
CAN_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define CAN_FREQ /;"	d
CAN_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define CAN_FREQ /;"	d
CAN_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define CAN_FREQ /;"	d
CAN_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define CAN_FREQ /;"	d
CAN_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define CAN_FREQ /;"	d
CAN_GIF	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_GIF /;"	d
CAN_GIF	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_GIF /;"	d
CAN_GIF	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_GIF /;"	d
CAN_GIM	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_GIM /;"	d
CAN_GIM	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_GIM /;"	d
CAN_GIM	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_GIM /;"	d
CAN_GIS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_GIS /;"	d
CAN_GIS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_GIS /;"	d
CAN_GIS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_GIS /;"	d
CAN_IFLAG_BUFnM	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_IFLAG_BUFnM(/;"	d
CAN_IFLAG_BUFnM_MASKBIT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_IFLAG_BUFnM_MASKBIT(/;"	d
CAN_IMASK_BUFnM	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_IMASK_BUFnM(/;"	d
CAN_IMASK_BUFnM_MASKBIT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_IMASK_BUFnM_MASKBIT(/;"	d
CAN_INTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_INTR /;"	d
CAN_INTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_INTR /;"	d
CAN_INTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_INTR /;"	d
CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_DATA0 /;"	d
CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_DATA0 /;"	d
CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_DATA0 /;"	d
CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_DATA1 /;"	d
CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_DATA1 /;"	d
CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_DATA1 /;"	d
CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_DATA2 /;"	d
CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_DATA2 /;"	d
CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_DATA2 /;"	d
CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_DATA3 /;"	d
CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_DATA3 /;"	d
CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_DATA3 /;"	d
CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_ID0 /;"	d
CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_ID0 /;"	d
CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_ID0 /;"	d
CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_ID1 /;"	d
CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_ID1 /;"	d
CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_ID1 /;"	d
CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_LENGTH /;"	d
CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_LENGTH /;"	d
CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_LENGTH /;"	d
CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB00_TIMESTAMP /;"	d
CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB00_TIMESTAMP /;"	d
CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB00_TIMESTAMP /;"	d
CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_DATA0 /;"	d
CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_DATA0 /;"	d
CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_DATA0 /;"	d
CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_DATA1 /;"	d
CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_DATA1 /;"	d
CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_DATA1 /;"	d
CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_DATA2 /;"	d
CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_DATA2 /;"	d
CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_DATA2 /;"	d
CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_DATA3 /;"	d
CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_DATA3 /;"	d
CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_DATA3 /;"	d
CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_ID0 /;"	d
CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_ID0 /;"	d
CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_ID0 /;"	d
CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_ID1 /;"	d
CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_ID1 /;"	d
CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_ID1 /;"	d
CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_LENGTH /;"	d
CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_LENGTH /;"	d
CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_LENGTH /;"	d
CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB01_TIMESTAMP /;"	d
CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB01_TIMESTAMP /;"	d
CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB01_TIMESTAMP /;"	d
CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_DATA0 /;"	d
CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_DATA0 /;"	d
CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_DATA0 /;"	d
CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_DATA1 /;"	d
CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_DATA1 /;"	d
CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_DATA1 /;"	d
CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_DATA2 /;"	d
CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_DATA2 /;"	d
CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_DATA2 /;"	d
CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_DATA3 /;"	d
CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_DATA3 /;"	d
CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_DATA3 /;"	d
CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_ID0 /;"	d
CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_ID0 /;"	d
CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_ID0 /;"	d
CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_ID1 /;"	d
CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_ID1 /;"	d
CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_ID1 /;"	d
CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_LENGTH /;"	d
CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_LENGTH /;"	d
CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_LENGTH /;"	d
CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB02_TIMESTAMP /;"	d
CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB02_TIMESTAMP /;"	d
CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB02_TIMESTAMP /;"	d
CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_DATA0 /;"	d
CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_DATA0 /;"	d
CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_DATA0 /;"	d
CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_DATA1 /;"	d
CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_DATA1 /;"	d
CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_DATA1 /;"	d
CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_DATA2 /;"	d
CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_DATA2 /;"	d
CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_DATA2 /;"	d
CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_DATA3 /;"	d
CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_DATA3 /;"	d
CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_DATA3 /;"	d
CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_ID0 /;"	d
CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_ID0 /;"	d
CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_ID0 /;"	d
CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_ID1 /;"	d
CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_ID1 /;"	d
CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_ID1 /;"	d
CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_LENGTH /;"	d
CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_LENGTH /;"	d
CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_LENGTH /;"	d
CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB03_TIMESTAMP /;"	d
CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB03_TIMESTAMP /;"	d
CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB03_TIMESTAMP /;"	d
CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_DATA0 /;"	d
CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_DATA0 /;"	d
CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_DATA0 /;"	d
CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_DATA1 /;"	d
CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_DATA1 /;"	d
CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_DATA1 /;"	d
CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_DATA2 /;"	d
CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_DATA2 /;"	d
CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_DATA2 /;"	d
CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_DATA3 /;"	d
CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_DATA3 /;"	d
CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_DATA3 /;"	d
CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_ID0 /;"	d
CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_ID0 /;"	d
CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_ID0 /;"	d
CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_ID1 /;"	d
CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_ID1 /;"	d
CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_ID1 /;"	d
CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_LENGTH /;"	d
CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_LENGTH /;"	d
CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_LENGTH /;"	d
CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB04_TIMESTAMP /;"	d
CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB04_TIMESTAMP /;"	d
CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB04_TIMESTAMP /;"	d
CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_DATA0 /;"	d
CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_DATA0 /;"	d
CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_DATA0 /;"	d
CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_DATA1 /;"	d
CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_DATA1 /;"	d
CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_DATA1 /;"	d
CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_DATA2 /;"	d
CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_DATA2 /;"	d
CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_DATA2 /;"	d
CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_DATA3 /;"	d
CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_DATA3 /;"	d
CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_DATA3 /;"	d
CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_ID0 /;"	d
CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_ID0 /;"	d
CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_ID0 /;"	d
CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_ID1 /;"	d
CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_ID1 /;"	d
CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_ID1 /;"	d
CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_LENGTH /;"	d
CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_LENGTH /;"	d
CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_LENGTH /;"	d
CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB05_TIMESTAMP /;"	d
CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB05_TIMESTAMP /;"	d
CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB05_TIMESTAMP /;"	d
CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_DATA0 /;"	d
CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_DATA0 /;"	d
CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_DATA0 /;"	d
CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_DATA1 /;"	d
CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_DATA1 /;"	d
CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_DATA1 /;"	d
CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_DATA2 /;"	d
CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_DATA2 /;"	d
CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_DATA2 /;"	d
CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_DATA3 /;"	d
CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_DATA3 /;"	d
CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_DATA3 /;"	d
CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_ID0 /;"	d
CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_ID0 /;"	d
CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_ID0 /;"	d
CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_ID1 /;"	d
CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_ID1 /;"	d
CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_ID1 /;"	d
CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_LENGTH /;"	d
CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_LENGTH /;"	d
CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_LENGTH /;"	d
CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB06_TIMESTAMP /;"	d
CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB06_TIMESTAMP /;"	d
CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB06_TIMESTAMP /;"	d
CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_DATA0 /;"	d
CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_DATA0 /;"	d
CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_DATA0 /;"	d
CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_DATA1 /;"	d
CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_DATA1 /;"	d
CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_DATA1 /;"	d
CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_DATA2 /;"	d
CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_DATA2 /;"	d
CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_DATA2 /;"	d
CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_DATA3 /;"	d
CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_DATA3 /;"	d
CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_DATA3 /;"	d
CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_ID0 /;"	d
CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_ID0 /;"	d
CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_ID0 /;"	d
CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_ID1 /;"	d
CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_ID1 /;"	d
CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_ID1 /;"	d
CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_LENGTH /;"	d
CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_LENGTH /;"	d
CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_LENGTH /;"	d
CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB07_TIMESTAMP /;"	d
CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB07_TIMESTAMP /;"	d
CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB07_TIMESTAMP /;"	d
CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_DATA0 /;"	d
CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_DATA0 /;"	d
CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_DATA0 /;"	d
CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_DATA1 /;"	d
CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_DATA1 /;"	d
CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_DATA1 /;"	d
CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_DATA2 /;"	d
CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_DATA2 /;"	d
CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_DATA2 /;"	d
CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_DATA3 /;"	d
CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_DATA3 /;"	d
CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_DATA3 /;"	d
CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_ID0 /;"	d
CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_ID0 /;"	d
CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_ID0 /;"	d
CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_ID1 /;"	d
CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_ID1 /;"	d
CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_ID1 /;"	d
CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_LENGTH /;"	d
CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_LENGTH /;"	d
CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_LENGTH /;"	d
CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB08_TIMESTAMP /;"	d
CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB08_TIMESTAMP /;"	d
CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB08_TIMESTAMP /;"	d
CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_DATA0 /;"	d
CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_DATA0 /;"	d
CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_DATA0 /;"	d
CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_DATA1 /;"	d
CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_DATA1 /;"	d
CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_DATA1 /;"	d
CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_DATA2 /;"	d
CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_DATA2 /;"	d
CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_DATA2 /;"	d
CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_DATA3 /;"	d
CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_DATA3 /;"	d
CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_DATA3 /;"	d
CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_ID0 /;"	d
CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_ID0 /;"	d
CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_ID0 /;"	d
CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_ID1 /;"	d
CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_ID1 /;"	d
CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_ID1 /;"	d
CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_LENGTH /;"	d
CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_LENGTH /;"	d
CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_LENGTH /;"	d
CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB09_TIMESTAMP /;"	d
CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB09_TIMESTAMP /;"	d
CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB09_TIMESTAMP /;"	d
CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_DATA0 /;"	d
CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_DATA0 /;"	d
CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_DATA0 /;"	d
CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_DATA1 /;"	d
CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_DATA1 /;"	d
CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_DATA1 /;"	d
CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_DATA2 /;"	d
CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_DATA2 /;"	d
CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_DATA2 /;"	d
CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_DATA3 /;"	d
CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_DATA3 /;"	d
CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_DATA3 /;"	d
CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_ID0 /;"	d
CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_ID0 /;"	d
CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_ID0 /;"	d
CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_ID1 /;"	d
CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_ID1 /;"	d
CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_ID1 /;"	d
CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_LENGTH /;"	d
CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_LENGTH /;"	d
CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_LENGTH /;"	d
CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB10_TIMESTAMP /;"	d
CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB10_TIMESTAMP /;"	d
CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB10_TIMESTAMP /;"	d
CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_DATA0 /;"	d
CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_DATA0 /;"	d
CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_DATA0 /;"	d
CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_DATA1 /;"	d
CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_DATA1 /;"	d
CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_DATA1 /;"	d
CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_DATA2 /;"	d
CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_DATA2 /;"	d
CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_DATA2 /;"	d
CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_DATA3 /;"	d
CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_DATA3 /;"	d
CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_DATA3 /;"	d
CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_ID0 /;"	d
CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_ID0 /;"	d
CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_ID0 /;"	d
CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_ID1 /;"	d
CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_ID1 /;"	d
CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_ID1 /;"	d
CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_LENGTH /;"	d
CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_LENGTH /;"	d
CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_LENGTH /;"	d
CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB11_TIMESTAMP /;"	d
CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB11_TIMESTAMP /;"	d
CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB11_TIMESTAMP /;"	d
CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_DATA0 /;"	d
CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_DATA0 /;"	d
CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_DATA0 /;"	d
CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_DATA1 /;"	d
CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_DATA1 /;"	d
CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_DATA1 /;"	d
CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_DATA2 /;"	d
CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_DATA2 /;"	d
CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_DATA2 /;"	d
CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_DATA3 /;"	d
CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_DATA3 /;"	d
CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_DATA3 /;"	d
CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_ID0 /;"	d
CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_ID0 /;"	d
CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_ID0 /;"	d
CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_ID1 /;"	d
CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_ID1 /;"	d
CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_ID1 /;"	d
CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_LENGTH /;"	d
CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_LENGTH /;"	d
CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_LENGTH /;"	d
CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB12_TIMESTAMP /;"	d
CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB12_TIMESTAMP /;"	d
CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB12_TIMESTAMP /;"	d
CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_DATA0 /;"	d
CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_DATA0 /;"	d
CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_DATA0 /;"	d
CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_DATA1 /;"	d
CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_DATA1 /;"	d
CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_DATA1 /;"	d
CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_DATA2 /;"	d
CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_DATA2 /;"	d
CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_DATA2 /;"	d
CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_DATA3 /;"	d
CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_DATA3 /;"	d
CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_DATA3 /;"	d
CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_ID0 /;"	d
CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_ID0 /;"	d
CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_ID0 /;"	d
CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_ID1 /;"	d
CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_ID1 /;"	d
CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_ID1 /;"	d
CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_LENGTH /;"	d
CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_LENGTH /;"	d
CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_LENGTH /;"	d
CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB13_TIMESTAMP /;"	d
CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB13_TIMESTAMP /;"	d
CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB13_TIMESTAMP /;"	d
CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_DATA0 /;"	d
CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_DATA0 /;"	d
CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_DATA0 /;"	d
CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_DATA1 /;"	d
CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_DATA1 /;"	d
CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_DATA1 /;"	d
CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_DATA2 /;"	d
CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_DATA2 /;"	d
CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_DATA2 /;"	d
CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_DATA3 /;"	d
CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_DATA3 /;"	d
CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_DATA3 /;"	d
CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_ID0 /;"	d
CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_ID0 /;"	d
CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_ID0 /;"	d
CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_ID1 /;"	d
CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_ID1 /;"	d
CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_ID1 /;"	d
CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_LENGTH /;"	d
CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_LENGTH /;"	d
CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_LENGTH /;"	d
CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB14_TIMESTAMP /;"	d
CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB14_TIMESTAMP /;"	d
CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB14_TIMESTAMP /;"	d
CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_DATA0 /;"	d
CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_DATA0 /;"	d
CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_DATA0 /;"	d
CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_DATA1 /;"	d
CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_DATA1 /;"	d
CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_DATA1 /;"	d
CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_DATA2 /;"	d
CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_DATA2 /;"	d
CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_DATA2 /;"	d
CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_DATA3 /;"	d
CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_DATA3 /;"	d
CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_DATA3 /;"	d
CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_ID0 /;"	d
CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_ID0 /;"	d
CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_ID0 /;"	d
CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_ID1 /;"	d
CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_ID1 /;"	d
CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_ID1 /;"	d
CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_LENGTH /;"	d
CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_LENGTH /;"	d
CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_LENGTH /;"	d
CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB15_TIMESTAMP /;"	d
CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB15_TIMESTAMP /;"	d
CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB15_TIMESTAMP /;"	d
CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_DATA0 /;"	d
CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_DATA0 /;"	d
CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_DATA0 /;"	d
CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_DATA1 /;"	d
CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_DATA1 /;"	d
CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_DATA1 /;"	d
CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_DATA2 /;"	d
CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_DATA2 /;"	d
CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_DATA2 /;"	d
CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_DATA3 /;"	d
CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_DATA3 /;"	d
CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_DATA3 /;"	d
CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_ID0 /;"	d
CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_ID0 /;"	d
CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_ID0 /;"	d
CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_ID1 /;"	d
CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_ID1 /;"	d
CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_ID1 /;"	d
CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_LENGTH /;"	d
CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_LENGTH /;"	d
CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_LENGTH /;"	d
CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB16_TIMESTAMP /;"	d
CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB16_TIMESTAMP /;"	d
CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB16_TIMESTAMP /;"	d
CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_DATA0 /;"	d
CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_DATA0 /;"	d
CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_DATA0 /;"	d
CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_DATA1 /;"	d
CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_DATA1 /;"	d
CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_DATA1 /;"	d
CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_DATA2 /;"	d
CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_DATA2 /;"	d
CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_DATA2 /;"	d
CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_DATA3 /;"	d
CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_DATA3 /;"	d
CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_DATA3 /;"	d
CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_ID0 /;"	d
CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_ID0 /;"	d
CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_ID0 /;"	d
CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_ID1 /;"	d
CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_ID1 /;"	d
CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_ID1 /;"	d
CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_LENGTH /;"	d
CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_LENGTH /;"	d
CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_LENGTH /;"	d
CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB17_TIMESTAMP /;"	d
CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB17_TIMESTAMP /;"	d
CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB17_TIMESTAMP /;"	d
CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_DATA0 /;"	d
CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_DATA0 /;"	d
CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_DATA0 /;"	d
CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_DATA1 /;"	d
CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_DATA1 /;"	d
CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_DATA1 /;"	d
CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_DATA2 /;"	d
CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_DATA2 /;"	d
CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_DATA2 /;"	d
CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_DATA3 /;"	d
CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_DATA3 /;"	d
CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_DATA3 /;"	d
CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_ID0 /;"	d
CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_ID0 /;"	d
CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_ID0 /;"	d
CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_ID1 /;"	d
CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_ID1 /;"	d
CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_ID1 /;"	d
CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_LENGTH /;"	d
CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_LENGTH /;"	d
CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_LENGTH /;"	d
CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB18_TIMESTAMP /;"	d
CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB18_TIMESTAMP /;"	d
CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB18_TIMESTAMP /;"	d
CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_DATA0 /;"	d
CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_DATA0 /;"	d
CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_DATA0 /;"	d
CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_DATA1 /;"	d
CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_DATA1 /;"	d
CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_DATA1 /;"	d
CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_DATA2 /;"	d
CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_DATA2 /;"	d
CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_DATA2 /;"	d
CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_DATA3 /;"	d
CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_DATA3 /;"	d
CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_DATA3 /;"	d
CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_ID0 /;"	d
CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_ID0 /;"	d
CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_ID0 /;"	d
CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_ID1 /;"	d
CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_ID1 /;"	d
CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_ID1 /;"	d
CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_LENGTH /;"	d
CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_LENGTH /;"	d
CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_LENGTH /;"	d
CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB19_TIMESTAMP /;"	d
CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB19_TIMESTAMP /;"	d
CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB19_TIMESTAMP /;"	d
CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_DATA0 /;"	d
CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_DATA0 /;"	d
CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_DATA0 /;"	d
CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_DATA1 /;"	d
CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_DATA1 /;"	d
CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_DATA1 /;"	d
CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_DATA2 /;"	d
CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_DATA2 /;"	d
CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_DATA2 /;"	d
CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_DATA3 /;"	d
CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_DATA3 /;"	d
CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_DATA3 /;"	d
CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_ID0 /;"	d
CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_ID0 /;"	d
CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_ID0 /;"	d
CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_ID1 /;"	d
CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_ID1 /;"	d
CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_ID1 /;"	d
CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_LENGTH /;"	d
CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_LENGTH /;"	d
CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_LENGTH /;"	d
CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB20_TIMESTAMP /;"	d
CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB20_TIMESTAMP /;"	d
CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB20_TIMESTAMP /;"	d
CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_DATA0 /;"	d
CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_DATA0 /;"	d
CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_DATA0 /;"	d
CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_DATA1 /;"	d
CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_DATA1 /;"	d
CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_DATA1 /;"	d
CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_DATA2 /;"	d
CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_DATA2 /;"	d
CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_DATA2 /;"	d
CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_DATA3 /;"	d
CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_DATA3 /;"	d
CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_DATA3 /;"	d
CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_ID0 /;"	d
CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_ID0 /;"	d
CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_ID0 /;"	d
CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_ID1 /;"	d
CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_ID1 /;"	d
CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_ID1 /;"	d
CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_LENGTH /;"	d
CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_LENGTH /;"	d
CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_LENGTH /;"	d
CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB21_TIMESTAMP /;"	d
CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB21_TIMESTAMP /;"	d
CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB21_TIMESTAMP /;"	d
CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_DATA0 /;"	d
CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_DATA0 /;"	d
CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_DATA0 /;"	d
CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_DATA1 /;"	d
CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_DATA1 /;"	d
CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_DATA1 /;"	d
CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_DATA2 /;"	d
CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_DATA2 /;"	d
CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_DATA2 /;"	d
CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_DATA3 /;"	d
CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_DATA3 /;"	d
CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_DATA3 /;"	d
CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_ID0 /;"	d
CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_ID0 /;"	d
CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_ID0 /;"	d
CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_ID1 /;"	d
CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_ID1 /;"	d
CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_ID1 /;"	d
CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_LENGTH /;"	d
CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_LENGTH /;"	d
CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_LENGTH /;"	d
CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB22_TIMESTAMP /;"	d
CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB22_TIMESTAMP /;"	d
CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB22_TIMESTAMP /;"	d
CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_DATA0 /;"	d
CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_DATA0 /;"	d
CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_DATA0 /;"	d
CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_DATA1 /;"	d
CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_DATA1 /;"	d
CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_DATA1 /;"	d
CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_DATA2 /;"	d
CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_DATA2 /;"	d
CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_DATA2 /;"	d
CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_DATA3 /;"	d
CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_DATA3 /;"	d
CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_DATA3 /;"	d
CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_ID0 /;"	d
CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_ID0 /;"	d
CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_ID0 /;"	d
CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_ID1 /;"	d
CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_ID1 /;"	d
CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_ID1 /;"	d
CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_LENGTH /;"	d
CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_LENGTH /;"	d
CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_LENGTH /;"	d
CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB23_TIMESTAMP /;"	d
CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB23_TIMESTAMP /;"	d
CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB23_TIMESTAMP /;"	d
CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_DATA0 /;"	d
CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_DATA0 /;"	d
CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_DATA0 /;"	d
CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_DATA1 /;"	d
CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_DATA1 /;"	d
CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_DATA1 /;"	d
CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_DATA2 /;"	d
CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_DATA2 /;"	d
CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_DATA2 /;"	d
CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_DATA3 /;"	d
CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_DATA3 /;"	d
CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_DATA3 /;"	d
CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_ID0 /;"	d
CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_ID0 /;"	d
CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_ID0 /;"	d
CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_ID1 /;"	d
CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_ID1 /;"	d
CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_ID1 /;"	d
CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_LENGTH /;"	d
CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_LENGTH /;"	d
CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_LENGTH /;"	d
CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB24_TIMESTAMP /;"	d
CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB24_TIMESTAMP /;"	d
CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB24_TIMESTAMP /;"	d
CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_DATA0 /;"	d
CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_DATA0 /;"	d
CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_DATA0 /;"	d
CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_DATA1 /;"	d
CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_DATA1 /;"	d
CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_DATA1 /;"	d
CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_DATA2 /;"	d
CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_DATA2 /;"	d
CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_DATA2 /;"	d
CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_DATA3 /;"	d
CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_DATA3 /;"	d
CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_DATA3 /;"	d
CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_ID0 /;"	d
CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_ID0 /;"	d
CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_ID0 /;"	d
CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_ID1 /;"	d
CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_ID1 /;"	d
CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_ID1 /;"	d
CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_LENGTH /;"	d
CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_LENGTH /;"	d
CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_LENGTH /;"	d
CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB25_TIMESTAMP /;"	d
CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB25_TIMESTAMP /;"	d
CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB25_TIMESTAMP /;"	d
CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_DATA0 /;"	d
CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_DATA0 /;"	d
CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_DATA0 /;"	d
CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_DATA1 /;"	d
CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_DATA1 /;"	d
CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_DATA1 /;"	d
CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_DATA2 /;"	d
CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_DATA2 /;"	d
CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_DATA2 /;"	d
CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_DATA3 /;"	d
CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_DATA3 /;"	d
CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_DATA3 /;"	d
CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_ID0 /;"	d
CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_ID0 /;"	d
CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_ID0 /;"	d
CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_ID1 /;"	d
CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_ID1 /;"	d
CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_ID1 /;"	d
CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_LENGTH /;"	d
CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_LENGTH /;"	d
CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_LENGTH /;"	d
CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB26_TIMESTAMP /;"	d
CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB26_TIMESTAMP /;"	d
CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB26_TIMESTAMP /;"	d
CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_DATA0 /;"	d
CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_DATA0 /;"	d
CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_DATA0 /;"	d
CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_DATA1 /;"	d
CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_DATA1 /;"	d
CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_DATA1 /;"	d
CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_DATA2 /;"	d
CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_DATA2 /;"	d
CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_DATA2 /;"	d
CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_DATA3 /;"	d
CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_DATA3 /;"	d
CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_DATA3 /;"	d
CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_ID0 /;"	d
CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_ID0 /;"	d
CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_ID0 /;"	d
CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_ID1 /;"	d
CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_ID1 /;"	d
CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_ID1 /;"	d
CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_LENGTH /;"	d
CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_LENGTH /;"	d
CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_LENGTH /;"	d
CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB27_TIMESTAMP /;"	d
CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB27_TIMESTAMP /;"	d
CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB27_TIMESTAMP /;"	d
CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_DATA0 /;"	d
CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_DATA0 /;"	d
CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_DATA0 /;"	d
CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_DATA1 /;"	d
CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_DATA1 /;"	d
CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_DATA1 /;"	d
CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_DATA2 /;"	d
CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_DATA2 /;"	d
CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_DATA2 /;"	d
CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_DATA3 /;"	d
CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_DATA3 /;"	d
CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_DATA3 /;"	d
CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_ID0 /;"	d
CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_ID0 /;"	d
CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_ID0 /;"	d
CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_ID1 /;"	d
CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_ID1 /;"	d
CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_ID1 /;"	d
CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_LENGTH /;"	d
CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_LENGTH /;"	d
CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_LENGTH /;"	d
CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB28_TIMESTAMP /;"	d
CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB28_TIMESTAMP /;"	d
CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB28_TIMESTAMP /;"	d
CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_DATA0 /;"	d
CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_DATA0 /;"	d
CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_DATA0 /;"	d
CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_DATA1 /;"	d
CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_DATA1 /;"	d
CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_DATA1 /;"	d
CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_DATA2 /;"	d
CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_DATA2 /;"	d
CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_DATA2 /;"	d
CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_DATA3 /;"	d
CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_DATA3 /;"	d
CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_DATA3 /;"	d
CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_ID0 /;"	d
CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_ID0 /;"	d
CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_ID0 /;"	d
CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_ID1 /;"	d
CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_ID1 /;"	d
CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_ID1 /;"	d
CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_LENGTH /;"	d
CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_LENGTH /;"	d
CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_LENGTH /;"	d
CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB29_TIMESTAMP /;"	d
CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB29_TIMESTAMP /;"	d
CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB29_TIMESTAMP /;"	d
CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_DATA0 /;"	d
CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_DATA0 /;"	d
CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_DATA0 /;"	d
CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_DATA1 /;"	d
CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_DATA1 /;"	d
CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_DATA1 /;"	d
CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_DATA2 /;"	d
CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_DATA2 /;"	d
CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_DATA2 /;"	d
CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_DATA3 /;"	d
CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_DATA3 /;"	d
CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_DATA3 /;"	d
CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_ID0 /;"	d
CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_ID0 /;"	d
CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_ID0 /;"	d
CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_ID1 /;"	d
CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_ID1 /;"	d
CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_ID1 /;"	d
CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_LENGTH /;"	d
CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_LENGTH /;"	d
CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_LENGTH /;"	d
CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB30_TIMESTAMP /;"	d
CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB30_TIMESTAMP /;"	d
CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB30_TIMESTAMP /;"	d
CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_DATA0 /;"	d
CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_DATA0 /;"	d
CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_DATA0 /;"	d
CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_DATA1 /;"	d
CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_DATA1 /;"	d
CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_DATA1 /;"	d
CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_DATA2 /;"	d
CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_DATA2 /;"	d
CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_DATA2 /;"	d
CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_DATA3 /;"	d
CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_DATA3 /;"	d
CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_DATA3 /;"	d
CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_ID0 /;"	d
CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_ID0 /;"	d
CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_ID0 /;"	d
CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_ID1 /;"	d
CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_ID1 /;"	d
CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_ID1 /;"	d
CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_LENGTH /;"	d
CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_LENGTH /;"	d
CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_LENGTH /;"	d
CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MB31_TIMESTAMP /;"	d
CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MB31_TIMESTAMP /;"	d
CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MB31_TIMESTAMP /;"	d
CAN_MBIM1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBIM1 /;"	d
CAN_MBIM1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBIM1 /;"	d
CAN_MBIM1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBIM1 /;"	d
CAN_MBIM2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBIM2 /;"	d
CAN_MBIM2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBIM2 /;"	d
CAN_MBIM2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBIM2 /;"	d
CAN_MBRIF1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBRIF1 /;"	d
CAN_MBRIF1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBRIF1 /;"	d
CAN_MBRIF1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBRIF1 /;"	d
CAN_MBRIF2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBRIF2 /;"	d
CAN_MBRIF2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBRIF2 /;"	d
CAN_MBRIF2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBRIF2 /;"	d
CAN_MBTD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBTD /;"	d
CAN_MBTD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBTD /;"	d
CAN_MBTD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBTD /;"	d
CAN_MBTIF1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBTIF1 /;"	d
CAN_MBTIF1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBTIF1 /;"	d
CAN_MBTIF1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBTIF1 /;"	d
CAN_MBTIF2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MBTIF2 /;"	d
CAN_MBTIF2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MBTIF2 /;"	d
CAN_MBTIF2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MBTIF2 /;"	d
CAN_MC1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MC1 /;"	d
CAN_MC1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MC1 /;"	d
CAN_MC1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MC1 /;"	d
CAN_MC2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MC2 /;"	d
CAN_MC2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MC2 /;"	d
CAN_MC2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MC2 /;"	d
CAN_MCF_BCC	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCF_BCC	/;"	d
CAN_MCF_WAKEMSK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCF_WAKEMSK	/;"	d
CAN_MCR_APS	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_APS	/;"	d
CAN_MCR_FRZ	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_FRZ	/;"	d
CAN_MCR_FRZACK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_FRZACK	/;"	d
CAN_MCR_HALT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_HALT	/;"	d
CAN_MCR_LPMACK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_LPMACK	/;"	d
CAN_MCR_MAXMB	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_MAXMB(/;"	d
CAN_MCR_MAXMB_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_MAXMB_MASK	/;"	d
CAN_MCR_MDIS	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_MDIS	/;"	d
CAN_MCR_NORDY	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_NORDY	/;"	d
CAN_MCR_SELFWAKE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_SELFWAKE	/;"	d
CAN_MCR_SOFTRST	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_SOFTRST	/;"	d
CAN_MCR_SUPV	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MCR_SUPV	/;"	d
CAN_MD1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MD1 /;"	d
CAN_MD1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MD1 /;"	d
CAN_MD1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MD1 /;"	d
CAN_MD2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_MD2 /;"	d
CAN_MD2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_MD2 /;"	d
CAN_MD2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_MD2 /;"	d
CAN_MSGBUF_CTRL_CODE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_CODE(/;"	d
CAN_MSGBUF_CTRL_CODE_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_CODE_MASK	/;"	d
CAN_MSGBUF_CTRL_IDE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_IDE	/;"	d
CAN_MSGBUF_CTRL_LEN	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_LEN(/;"	d
CAN_MSGBUF_CTRL_LEN_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_LEN_MASK	/;"	d
CAN_MSGBUF_CTRL_RTR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_RTR	/;"	d
CAN_MSGBUF_CTRL_SRR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_CTRL_SRR	/;"	d
CAN_MSGBUF_IDH_EXTH	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDH_EXTH(/;"	d
CAN_MSGBUF_IDH_EXTH_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDH_EXTH_MASK	/;"	d
CAN_MSGBUF_IDH_IDE	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDH_IDE	/;"	d
CAN_MSGBUF_IDH_SRR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDH_SRR	/;"	d
CAN_MSGBUF_IDH_STD	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDH_STD(/;"	d
CAN_MSGBUF_IDH_STD_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDH_STD_MASK	/;"	d
CAN_MSGBUF_IDL_EXTL	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDL_EXTL(/;"	d
CAN_MSGBUF_IDL_EXTL_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDL_EXTL_MASK	/;"	d
CAN_MSGBUF_IDL_RTR	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_IDL_RTR	/;"	d
CAN_MSGBUF_ID_EXT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_ID_EXT(/;"	d
CAN_MSGBUF_ID_EXT_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_ID_EXT_MASK	/;"	d
CAN_MSGBUF_ID_STD	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_ID_STD(/;"	d
CAN_MSGBUF_ID_STD_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_MSGBUF_ID_STD_MASK	/;"	d
CAN_OPSS1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_OPSS1 /;"	d
CAN_OPSS1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_OPSS1 /;"	d
CAN_OPSS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_OPSS1 /;"	d
CAN_OPSS2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_OPSS2 /;"	d
CAN_OPSS2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_OPSS2 /;"	d
CAN_OPSS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_OPSS2 /;"	d
CAN_RFH1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_RFH1 /;"	d
CAN_RFH1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_RFH1 /;"	d
CAN_RFH1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_RFH1 /;"	d
CAN_RFH2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_RFH2 /;"	d
CAN_RFH2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_RFH2 /;"	d
CAN_RFH2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_RFH2 /;"	d
CAN_RML1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_RML1 /;"	d
CAN_RML1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_RML1 /;"	d
CAN_RML1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_RML1 /;"	d
CAN_RML2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_RML2 /;"	d
CAN_RML2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_RML2 /;"	d
CAN_RML2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_RML2 /;"	d
CAN_RMP1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_RMP1 /;"	d
CAN_RMP1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_RMP1 /;"	d
CAN_RMP1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_RMP1 /;"	d
CAN_RMP2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_RMP2 /;"	d
CAN_RMP2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_RMP2 /;"	d
CAN_RMP2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_RMP2 /;"	d
CAN_RXGMSK_MI_EXT	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_RXGMSK_MI_EXT(/;"	d
CAN_RXGMSK_MI_EXT_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_RXGMSK_MI_EXT_MASK	/;"	d
CAN_RXGMSK_MI_STD	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_RXGMSK_MI_STD(/;"	d
CAN_RXGMSK_MI_STD_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_RXGMSK_MI_STD_MASK	/;"	d
CAN_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_STATUS /;"	d
CAN_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_STATUS /;"	d
CAN_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_STATUS /;"	d
CAN_STB	board/bf609-ezkit/soft_switch.h	/^#define CAN_STB /;"	d
CAN_STEP0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_TA1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TA1 /;"	d
CAN_TA1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TA1 /;"	d
CAN_TA1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TA1 /;"	d
CAN_TA2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TA2 /;"	d
CAN_TA2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TA2 /;"	d
CAN_TA2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TA2 /;"	d
CAN_TIMER	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_TIMER(/;"	d
CAN_TIMER_MASK	arch/m68k/include/asm/coldfire/flexcan.h	/^#define CAN_TIMER_MASK	/;"	d
CAN_TIMING	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TIMING /;"	d
CAN_TIMING	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TIMING /;"	d
CAN_TIMING	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TIMING /;"	d
CAN_TRR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TRR1 /;"	d
CAN_TRR1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TRR1 /;"	d
CAN_TRR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TRR1 /;"	d
CAN_TRR2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TRR2 /;"	d
CAN_TRR2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TRR2 /;"	d
CAN_TRR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TRR2 /;"	d
CAN_TRS1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TRS1 /;"	d
CAN_TRS1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TRS1 /;"	d
CAN_TRS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TRS1 /;"	d
CAN_TRS2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_TRS2 /;"	d
CAN_TRS2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_TRS2 /;"	d
CAN_TRS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_TRS2 /;"	d
CAN_TXCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
CAN_UCCNF	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_UCCNF /;"	d
CAN_UCCNF	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_UCCNF /;"	d
CAN_UCCNF	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_UCCNF /;"	d
CAN_UCCNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_UCCNT /;"	d
CAN_UCCNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_UCCNT /;"	d
CAN_UCCNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_UCCNT /;"	d
CAN_UCRC	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CAN_UCRC /;"	d
CAN_UCRC	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_UCRC /;"	d
CAN_UCRC	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_UCRC /;"	d
CAN_UCREG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_UCREG /;"	d
CAN_UCREG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_UCREG /;"	d
CAN_USE_HEAP	arch/x86/include/asm/bootparam.h	/^#define CAN_USE_HEAP	/;"	d
CAN_VERSION	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_VERSION /;"	d
CAN_VERSION	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_VERSION /;"	d
CAN_VERSION2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CAN_VERSION2 /;"	d
CAN_VERSION2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CAN_VERSION2 /;"	d
CAP	drivers/video/tegra124/sor.h	/^#define CAP	/;"	d
CAP0_TRIG_CNTL	include/radeon.h	/^#define CAP0_TRIG_CNTL	/;"	d
CAP1_TRIG_CNTL	include/radeon.h	/^#define CAP1_TRIG_CNTL	/;"	d
CAPABILITIES_PTR	include/radeon.h	/^#define CAPABILITIES_PTR	/;"	d
CAPCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CAPCR /;"	d
CAPITAL_MASK	common/usb_kbd.c	/^#define CAPITAL_MASK	/;"	d	file:
CAPS	include/i8042.h	/^#define CAPS	/;"	d
CAPSR	arch/sh/include/asm/cpu_sh7722.h	/^#define CAPSR /;"	d
CAPS_LOCK	common/usb_kbd.c	/^#define CAPS_LOCK	/;"	d	file:
CAPTURE_ECC_ECE	include/mpc83xx.h	/^#define CAPTURE_ECC_ECE	/;"	d
CAPTURE_ECC_ECE_SHIFT	include/mpc83xx.h	/^#define CAPTURE_ECC_ECE_SHIFT	/;"	d
CAPWKFRM	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	CAPWKFRM	/;"	d
CAPWR	arch/sh/include/asm/cpu_sh7722.h	/^#define CAPWR /;"	d
CAP_DP_A_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define CAP_DP_A_DEFAULT_MASK	/;"	d
CAP_DP_A_FALSE	drivers/video/tegra124/sor.h	/^#define CAP_DP_A_FALSE	/;"	d
CAP_DP_A_SHIFT	drivers/video/tegra124/sor.h	/^#define CAP_DP_A_SHIFT	/;"	d
CAP_DP_A_TRUE	drivers/video/tegra124/sor.h	/^#define CAP_DP_A_TRUE	/;"	d
CAP_DP_B_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define CAP_DP_B_DEFAULT_MASK	/;"	d
CAP_DP_B_FALSE	drivers/video/tegra124/sor.h	/^#define CAP_DP_B_FALSE	/;"	d
CAP_DP_B_SHIFT	drivers/video/tegra124/sor.h	/^#define CAP_DP_B_SHIFT	/;"	d
CAP_DP_B_TRUE	drivers/video/tegra124/sor.h	/^#define CAP_DP_B_TRUE	/;"	d
CAP_START_POS	include/pci.h	/^#define CAP_START_POS /;"	d
CAR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CAR	/;"	d
CAR0	arch/sh/include/asm/cpu_sh7722.h	/^#define CAR0 /;"	d
CAR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	CAR0	/;"	d
CAR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CAR1 /;"	d
CAR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CAR1	/;"	d
CARD_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_0	/;"	d
CARD_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_1	/;"	d
CARD_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_2	/;"	d
CARD_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_3	/;"	d
CARD_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_4	/;"	d
CARD_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_5	/;"	d
CARD_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	CARD_6	/;"	d
CARD_BUSY	include/mvebu_mmc.h	/^#define CARD_BUSY	/;"	d
CARD_DETECT	board/freescale/mx25pdk/mx25pdk.c	/^#define CARD_DETECT	/;"	d	file:
CARD_TYPE_CEATA	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define           CARD_TYPE_CEATA /;"	d
CARD_TYPE_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define            CARD_TYPE_MASK /;"	d
CARD_TYPE_OFFSET	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          CARD_TYPE_OFFSET /;"	d
CARD_TYPE_SD	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              CARD_TYPE_SD /;"	d
CARD_TYPE_SDIO	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define            CARD_TYPE_SDIO /;"	d
CARD_TYPE_eMMC	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define            CARD_TYPE_eMMC /;"	d
CARKITMODE	drivers/usb/phy/twl4030.c	/^#define CARKITMODE	/;"	d	file:
CARRIER_EXTENSION	drivers/net/e1000.h	/^#define CARRIER_EXTENSION /;"	d
CARRIER_NAME	board/tqc/tqm5200/tqm5200.c	/^# define CARRIER_NAME	/;"	d	file:
CARRIER_SPEED_1G	board/gdsys/405ep/iocon.c	/^	CARRIER_SPEED_1G = 0,$/;"	e	enum:__anon023d8a7b0803	file:
CARRIER_SPEED_1G	board/gdsys/common/ioep-fpga.c	/^	CARRIER_SPEED_1G = 0,$/;"	e	enum:__anoneadcbf560703	file:
CARRIER_SPEED_2_5G	board/gdsys/405ep/iocon.c	/^	CARRIER_SPEED_2_5G = 1,$/;"	e	enum:__anon023d8a7b0803	file:
CARRIER_SPEED_2_5G	board/gdsys/common/ioep-fpga.c	/^	CARRIER_SPEED_2_5G = 1,$/;"	e	enum:__anoneadcbf560703	file:
CARRYSET	include/sym53c8xx.h	/^#define CARRYSET /;"	d
CAR_CAIP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CAR_CAIP	/;"	d
CASCADE	include/lattice.h	/^#define CASCADE	/;"	d
CASL3	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CASL3	/;"	d
CASWIDTH_10BITS	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CASWIDTH_10BITS	/;"	d
CAS_LATENCY	include/configs/t3corp.h	/^#define CAS_LATENCY	/;"	d
CAT	arch/mips/include/asm/asm.h	/^#define CAT(/;"	d
CATN	include/sym53c8xx.h	/^	#define   CATN	/;"	d
CAT_BASE_ADDR	arch/arm/include/asm/arch-armada100/spi.h	/^#define CAT_BASE_ADDR(/;"	d
CAUSEB_BD	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_BD	/;"	d
CAUSEB_CE	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_CE	/;"	d
CAUSEB_EXCCODE	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_EXCCODE	/;"	d
CAUSEB_FDCI	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_FDCI	/;"	d
CAUSEB_IP	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_IP	/;"	d
CAUSEB_IP0	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP0	/;"	d
CAUSEB_IP1	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP1	/;"	d
CAUSEB_IP2	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP2	/;"	d
CAUSEB_IP3	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP3	/;"	d
CAUSEB_IP4	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP4	/;"	d
CAUSEB_IP5	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP5	/;"	d
CAUSEB_IP6	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP6	/;"	d
CAUSEB_IP7	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEB_IP7	/;"	d
CAUSEB_IV	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_IV	/;"	d
CAUSEB_PCI	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_PCI	/;"	d
CAUSEB_TI	arch/mips/include/asm/mipsregs.h	/^#define CAUSEB_TI	/;"	d
CAUSEF_BD	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_BD	/;"	d
CAUSEF_CE	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_CE	/;"	d
CAUSEF_EXCCODE	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_EXCCODE	/;"	d
CAUSEF_FDCI	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_FDCI	/;"	d
CAUSEF_IP	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_IP	/;"	d
CAUSEF_IP0	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP0	/;"	d
CAUSEF_IP1	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP1	/;"	d
CAUSEF_IP2	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP2	/;"	d
CAUSEF_IP3	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP3	/;"	d
CAUSEF_IP4	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP4	/;"	d
CAUSEF_IP5	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP5	/;"	d
CAUSEF_IP6	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP6	/;"	d
CAUSEF_IP7	arch/mips/include/asm/mipsregs.h	/^#define	 CAUSEF_IP7	/;"	d
CAUSEF_IV	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_IV	/;"	d
CAUSEF_PCI	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_PCI	/;"	d
CAUSEF_TI	arch/mips/include/asm/mipsregs.h	/^#define CAUSEF_TI	/;"	d
CA_ADR_DRVR_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CA_ADR_DRVR_DS_OFFSET	/;"	d
CA_CKE_DRVR_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CA_CKE_DRVR_DS_OFFSET	/;"	d
CA_CK_DRVR_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CA_CK_DRVR_DS_OFFSET	/;"	d
CA_CS_DRVR_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CA_CS_DRVR_DS_OFFSET	/;"	d
CA_SWAP_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define CA_SWAP_EN	/;"	d
CA_WRITEBACK	arch/xtensa/cpu/start.S	/^#define CA_WRITEBACK	/;"	d	file:
CBAR_MASK	arch/arm/include/asm/armv7.h	/^#define CBAR_MASK	/;"	d
CBASE_HIGH	include/ns87308.h	/^#define CBASE_HIGH	/;"	d
CBASE_LOW	include/ns87308.h	/^#define CBASE_LOW	/;"	d
CBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CBCR /;"	d
CBCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CBCR	/;"	d
CBCR_BRANCH_ENABLE_BIT	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CBCR_BRANCH_ENABLE_BIT /;"	d	file:
CBCR_BRANCH_OFF_BIT	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CBCR_BRANCH_OFF_BIT /;"	d	file:
CBDSR	arch/sh/include/asm/cpu_sh7722.h	/^#define CBDSR /;"	d
CBD_TX_BITMASK	include/usb/mpc8xx_udc.h	/^#define CBD_TX_BITMASK /;"	d
CBFS_BAD_FILE	include/cbfs.h	/^	CBFS_BAD_FILE,$/;"	e	enum:cbfs_result
CBFS_BAD_HEADER	include/cbfs.h	/^	CBFS_BAD_HEADER,$/;"	e	enum:cbfs_result
CBFS_COMPONENT_CMOS_DEFAULT	include/cbfs.h	/^	CBFS_COMPONENT_CMOS_DEFAULT = 0xaa,$/;"	e	enum:cbfs_filetype
CBFS_COMPONENT_CMOS_LAYOUT	include/cbfs.h	/^	CBFS_COMPONENT_CMOS_LAYOUT = 0x01aa$/;"	e	enum:cbfs_filetype
CBFS_FILE_NOT_FOUND	include/cbfs.h	/^	CBFS_FILE_NOT_FOUND$/;"	e	enum:cbfs_result
CBFS_NOT_INITIALIZED	include/cbfs.h	/^	CBFS_NOT_INITIALIZED,$/;"	e	enum:cbfs_result
CBFS_SUCCESS	include/cbfs.h	/^	CBFS_SUCCESS = 0,$/;"	e	enum:cbfs_result
CBFS_TYPE_BOOTSPLASH	include/cbfs.h	/^	CBFS_TYPE_BOOTSPLASH = 0x40,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_MBI	include/cbfs.h	/^	CBFS_TYPE_MBI = 0x52,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_MICROCODE	include/cbfs.h	/^	CBFS_TYPE_MICROCODE = 0x53,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_OPTIONROM	include/cbfs.h	/^	CBFS_TYPE_OPTIONROM = 0x30,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_PAYLOAD	include/cbfs.h	/^	CBFS_TYPE_PAYLOAD = 0x20,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_RAW	include/cbfs.h	/^	CBFS_TYPE_RAW = 0x50,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_STAGE	include/cbfs.h	/^	CBFS_TYPE_STAGE = 0x10,$/;"	e	enum:cbfs_filetype
CBFS_TYPE_VSA	include/cbfs.h	/^	CBFS_TYPE_VSA = 0x51,$/;"	e	enum:cbfs_filetype
CBI_INTERRUPT_DATA_LEN	drivers/usb/gadget/storage_common.c	/^#define CBI_INTERRUPT_DATA_LEN	/;"	d	file:
CBL_ALL	include/common.h	/^	CBL_ALL				= 3,$/;"	e	enum:__anon84d717570103
CBL_DISABLE_CACHES	include/common.h	/^	CBL_DISABLE_CACHES		= 1 << 0,$/;"	e	enum:__anon84d717570103
CBL_SHOW_BOOTSTAGE_REPORT	include/common.h	/^	CBL_SHOW_BOOTSTAGE_REPORT	= 1 << 1,$/;"	e	enum:__anon84d717570103
CBMEM_CONSOLE	arch/x86/cpu/coreboot/Kconfig	/^config CBMEM_CONSOLE$/;"	c
CBMEM_ID_ACPI	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_ACPI	/;"	d
CBMEM_ID_CBTABLE	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_CBTABLE	/;"	d
CBMEM_ID_CONSOLE	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_CONSOLE	/;"	d
CBMEM_ID_FREESPACE	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_FREESPACE	/;"	d
CBMEM_ID_GDT	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_GDT	/;"	d
CBMEM_ID_MPTABLE	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_MPTABLE	/;"	d
CBMEM_ID_MRCDATA	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_MRCDATA	/;"	d
CBMEM_ID_NONE	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_NONE	/;"	d
CBMEM_ID_PIRQ	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_PIRQ	/;"	d
CBMEM_ID_RESUME	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_RESUME	/;"	d
CBMEM_ID_RESUME_SCRATCH	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_RESUME_SCRATCH	/;"	d
CBMEM_ID_SMBIOS	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_SMBIOS	/;"	d
CBMEM_ID_TIMESTAMP	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_ID_TIMESTAMP	/;"	d
CBMEM_MAGIC	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_MAGIC	/;"	d
CBMEM_TOC_RESERVED	arch/x86/include/asm/coreboot_tables.h	/^#define CBMEM_TOC_RESERVED	/;"	d
CBM_RR_GLOBAL_RESET	arch/x86/include/asm/me_common.h	/^#define CBM_RR_GLOBAL_RESET	/;"	d
CBR0	arch/sh/include/asm/cpu_sh7722.h	/^#define CBR0 /;"	d
CBR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	CBR0	/;"	d
CBR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CBR1 /;"	d
CBR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CBR1	/;"	d
CBSY	include/sym53c8xx.h	/^	#define   CBSY	/;"	d
CBWCDB	include/usb_defs.h	/^	__u8		CBWCDB[CBWCDBLENGTH];$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u8[]
CBWCDBLENGTH	include/usb_defs.h	/^#	define CBWCDBLENGTH	/;"	d
CBWFLAGS_IN	include/usb_defs.h	/^#	define CBWFLAGS_IN	/;"	d
CBWFLAGS_OUT	include/usb_defs.h	/^#	define CBWFLAGS_OUT	/;"	d
CBWFLAGS_SBZ	include/usb_defs.h	/^#	define CBWFLAGS_SBZ	/;"	d
CBWSIGNATURE	include/usb_defs.h	/^#	define CBWSIGNATURE	/;"	d
CBWTag	common/usb_storage.c	/^static __u32 CBWTag;$/;"	v	typeref:typename:__u32	file:
CB_BCR_CB_RESET	include/pcmcia/yenta.h	/^#define  CB_BCR_CB_RESET	/;"	d
CB_BCR_ISA_ENA	include/pcmcia/yenta.h	/^#define  CB_BCR_ISA_ENA	/;"	d
CB_BCR_ISA_IRQ	include/pcmcia/yenta.h	/^#define  CB_BCR_ISA_IRQ	/;"	d
CB_BCR_MABORT	include/pcmcia/yenta.h	/^#define  CB_BCR_MABORT	/;"	d
CB_BCR_PARITY_ENA	include/pcmcia/yenta.h	/^#define  CB_BCR_PARITY_ENA	/;"	d
CB_BCR_PREFETCH	include/pcmcia/yenta.h	/^#define  CB_BCR_PREFETCH(/;"	d
CB_BCR_SERR_ENA	include/pcmcia/yenta.h	/^#define  CB_BCR_SERR_ENA	/;"	d
CB_BCR_VGA_ENA	include/pcmcia/yenta.h	/^#define  CB_BCR_VGA_ENA	/;"	d
CB_BCR_WRITE_POST	include/pcmcia/yenta.h	/^#define  CB_BCR_WRITE_POST	/;"	d
CB_BRIDGE_CONTROL	include/pcmcia/yenta.h	/^#define CB_BRIDGE_CONTROL	/;"	d
CB_CARDBUS_BUS	include/pcmcia/yenta.h	/^#define CB_CARDBUS_BUS	/;"	d
CB_IO_BASE	include/pcmcia/yenta.h	/^#define CB_IO_BASE(/;"	d
CB_IO_LIMIT	include/pcmcia/yenta.h	/^#define CB_IO_LIMIT(/;"	d
CB_LATENCY_TIMER	include/pcmcia/yenta.h	/^#define CB_LATENCY_TIMER	/;"	d
CB_LEGACY_MODE_BASE	include/pcmcia/yenta.h	/^#define CB_LEGACY_MODE_BASE	/;"	d
CB_MEM_ACPI	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_ACPI	/;"	d
CB_MEM_BASE	include/pcmcia/yenta.h	/^#define CB_MEM_BASE(/;"	d
CB_MEM_LIMIT	include/pcmcia/yenta.h	/^#define CB_MEM_LIMIT(/;"	d
CB_MEM_NVS	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_NVS	/;"	d
CB_MEM_PAGE	include/pcmcia/yenta.h	/^#define CB_MEM_PAGE(/;"	d
CB_MEM_RAM	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_RAM	/;"	d
CB_MEM_RESERVED	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_RESERVED	/;"	d
CB_MEM_TABLE	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_TABLE	/;"	d
CB_MEM_UNUSABLE	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_UNUSABLE	/;"	d
CB_MEM_VENDOR_RSVD	arch/x86/include/asm/coreboot_tables.h	/^#define CB_MEM_VENDOR_RSVD	/;"	d
CB_PRIMARY_BUS	include/pcmcia/yenta.h	/^#define CB_PRIMARY_BUS	/;"	d
CB_SC_CCLK_STOP	include/pcmcia/yenta.h	/^#define  CB_SC_CCLK_STOP	/;"	d
CB_SC_VCC_3V	include/pcmcia/yenta.h	/^#define   CB_SC_VCC_3V	/;"	d
CB_SC_VCC_5V	include/pcmcia/yenta.h	/^#define   CB_SC_VCC_5V	/;"	d
CB_SC_VCC_MASK	include/pcmcia/yenta.h	/^#define  CB_SC_VCC_MASK	/;"	d
CB_SC_VCC_OFF	include/pcmcia/yenta.h	/^#define   CB_SC_VCC_OFF	/;"	d
CB_SC_VCC_XV	include/pcmcia/yenta.h	/^#define   CB_SC_VCC_XV	/;"	d
CB_SC_VCC_YV	include/pcmcia/yenta.h	/^#define   CB_SC_VCC_YV	/;"	d
CB_SC_VPP_12V	include/pcmcia/yenta.h	/^#define   CB_SC_VPP_12V	/;"	d
CB_SC_VPP_3V	include/pcmcia/yenta.h	/^#define   CB_SC_VPP_3V	/;"	d
CB_SC_VPP_5V	include/pcmcia/yenta.h	/^#define   CB_SC_VPP_5V	/;"	d
CB_SC_VPP_MASK	include/pcmcia/yenta.h	/^#define  CB_SC_VPP_MASK	/;"	d
CB_SC_VPP_OFF	include/pcmcia/yenta.h	/^#define   CB_SC_VPP_OFF	/;"	d
CB_SC_VPP_XV	include/pcmcia/yenta.h	/^#define   CB_SC_VPP_XV	/;"	d
CB_SC_VPP_YV	include/pcmcia/yenta.h	/^#define   CB_SC_VPP_YV	/;"	d
CB_SERIAL_TYPE_IO_MAPPED	arch/x86/include/asm/coreboot_tables.h	/^#define CB_SERIAL_TYPE_IO_MAPPED	/;"	d
CB_SERIAL_TYPE_MEMORY_MAPPED	arch/x86/include/asm/coreboot_tables.h	/^#define CB_SERIAL_TYPE_MEMORY_MAPPED	/;"	d
CB_SE_CCD	include/pcmcia/yenta.h	/^#define  CB_SE_CCD	/;"	d
CB_SE_CCD1	include/pcmcia/yenta.h	/^#define  CB_SE_CCD1	/;"	d
CB_SE_CCD2	include/pcmcia/yenta.h	/^#define  CB_SE_CCD2	/;"	d
CB_SE_CSTSCHG	include/pcmcia/yenta.h	/^#define  CB_SE_CSTSCHG	/;"	d
CB_SE_PWRCYCLE	include/pcmcia/yenta.h	/^#define  CB_SE_PWRCYCLE	/;"	d
CB_SF_CVSTEST	include/pcmcia/yenta.h	/^#define  CB_SF_CVSTEST	/;"	d
CB_SM_CCD	include/pcmcia/yenta.h	/^#define  CB_SM_CCD	/;"	d
CB_SM_CSTSCHG	include/pcmcia/yenta.h	/^#define  CB_SM_CSTSCHG	/;"	d
CB_SM_PWRCYCLE	include/pcmcia/yenta.h	/^#define  CB_SM_PWRCYCLE	/;"	d
CB_SOCKET_CONTROL	include/pcmcia/yenta.h	/^#define CB_SOCKET_CONTROL	/;"	d
CB_SOCKET_EVENT	include/pcmcia/yenta.h	/^#define CB_SOCKET_EVENT	/;"	d
CB_SOCKET_FORCE	include/pcmcia/yenta.h	/^#define CB_SOCKET_FORCE	/;"	d
CB_SOCKET_MASK	include/pcmcia/yenta.h	/^#define CB_SOCKET_MASK	/;"	d
CB_SOCKET_POWER	include/pcmcia/yenta.h	/^#define CB_SOCKET_POWER	/;"	d
CB_SOCKET_STATE	include/pcmcia/yenta.h	/^#define CB_SOCKET_STATE	/;"	d
CB_SP_ACCESS	include/pcmcia/yenta.h	/^#define  CB_SP_ACCESS	/;"	d
CB_SP_CLK_CTRL	include/pcmcia/yenta.h	/^#define  CB_SP_CLK_CTRL	/;"	d
CB_SP_CLK_CTRL_ENA	include/pcmcia/yenta.h	/^#define  CB_SP_CLK_CTRL_ENA	/;"	d
CB_SP_CLK_MODE	include/pcmcia/yenta.h	/^#define  CB_SP_CLK_MODE	/;"	d
CB_SS_16BIT	include/pcmcia/yenta.h	/^#define  CB_SS_16BIT	/;"	d
CB_SS_32BIT	include/pcmcia/yenta.h	/^#define  CB_SS_32BIT	/;"	d
CB_SS_3VCARD	include/pcmcia/yenta.h	/^#define  CB_SS_3VCARD	/;"	d
CB_SS_3VSOCKET	include/pcmcia/yenta.h	/^#define  CB_SS_3VSOCKET	/;"	d
CB_SS_5VCARD	include/pcmcia/yenta.h	/^#define  CB_SS_5VCARD	/;"	d
CB_SS_5VSOCKET	include/pcmcia/yenta.h	/^#define  CB_SS_5VSOCKET	/;"	d
CB_SS_BADCARD	include/pcmcia/yenta.h	/^#define  CB_SS_BADCARD	/;"	d
CB_SS_BADVCC	include/pcmcia/yenta.h	/^#define  CB_SS_BADVCC	/;"	d
CB_SS_CCD	include/pcmcia/yenta.h	/^#define  CB_SS_CCD	/;"	d
CB_SS_CCD1	include/pcmcia/yenta.h	/^#define  CB_SS_CCD1	/;"	d
CB_SS_CCD2	include/pcmcia/yenta.h	/^#define  CB_SS_CCD2	/;"	d
CB_SS_CINT	include/pcmcia/yenta.h	/^#define  CB_SS_CINT	/;"	d
CB_SS_CSTSCHG	include/pcmcia/yenta.h	/^#define  CB_SS_CSTSCHG	/;"	d
CB_SS_DATALOST	include/pcmcia/yenta.h	/^#define  CB_SS_DATALOST	/;"	d
CB_SS_PWRCYCLE	include/pcmcia/yenta.h	/^#define  CB_SS_PWRCYCLE	/;"	d
CB_SS_VSENSE	include/pcmcia/yenta.h	/^#define  CB_SS_VSENSE	/;"	d
CB_SS_XVCARD	include/pcmcia/yenta.h	/^#define  CB_SS_XVCARD	/;"	d
CB_SS_XVSOCKET	include/pcmcia/yenta.h	/^#define  CB_SS_XVSOCKET	/;"	d
CB_SS_YVCARD	include/pcmcia/yenta.h	/^#define  CB_SS_YVCARD	/;"	d
CB_SS_YVSOCKET	include/pcmcia/yenta.h	/^#define  CB_SS_YVSOCKET	/;"	d
CB_SUBORD_BUS	include/pcmcia/yenta.h	/^#define CB_SUBORD_BUS	/;"	d
CB_TABLE_ADDR	arch/x86/include/asm/tables.h	/^#define CB_TABLE_ADDR	/;"	d
CB_TAG_ASSEMBLER	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_ASSEMBLER	/;"	d
CB_TAG_BUILD	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_BUILD	/;"	d
CB_TAG_CBMEM_CONSOLE	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CBMEM_CONSOLE	/;"	d
CB_TAG_CMOS_OPTION_TABLE	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CMOS_OPTION_TABLE	/;"	d
CB_TAG_COMPILER	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_COMPILER	/;"	d
CB_TAG_COMPILE_BY	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_COMPILE_BY	/;"	d
CB_TAG_COMPILE_DOMAIN	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_COMPILE_DOMAIN	/;"	d
CB_TAG_COMPILE_HOST	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_COMPILE_HOST	/;"	d
CB_TAG_COMPILE_TIME	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_COMPILE_TIME	/;"	d
CB_TAG_CONSOLE	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE	/;"	d
CB_TAG_CONSOLE_BTEXT	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE_BTEXT	/;"	d
CB_TAG_CONSOLE_EHCI	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE_EHCI	/;"	d
CB_TAG_CONSOLE_LOGBUF	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE_LOGBUF	/;"	d
CB_TAG_CONSOLE_SERIAL8250	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE_SERIAL8250	/;"	d
CB_TAG_CONSOLE_SROM	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE_SROM	/;"	d
CB_TAG_CONSOLE_VGA	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_CONSOLE_VGA	/;"	d
CB_TAG_EXTRA_VERSION	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_EXTRA_VERSION	/;"	d
CB_TAG_FDT	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_FDT	/;"	d
CB_TAG_FORWARD	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_FORWARD	/;"	d
CB_TAG_FRAMEBUFFER	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_FRAMEBUFFER	/;"	d
CB_TAG_GPIO	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_GPIO	/;"	d
CB_TAG_HWRPB	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_HWRPB	/;"	d
CB_TAG_LINKER	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_LINKER	/;"	d
CB_TAG_MAINBOARD	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_MAINBOARD	/;"	d
CB_TAG_MEMORY	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_MEMORY	/;"	d
CB_TAG_MRC_CACHE	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_MRC_CACHE	/;"	d
CB_TAG_OPTION	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_OPTION	/;"	d
CB_TAG_OPTION_CHECKSUM	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_OPTION_CHECKSUM	/;"	d
CB_TAG_OPTION_DEFAULTS	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_OPTION_DEFAULTS	/;"	d
CB_TAG_OPTION_ENUM	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_OPTION_ENUM	/;"	d
CB_TAG_SERIAL	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_SERIAL	/;"	d
CB_TAG_TIMESTAMPS	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_TIMESTAMPS	/;"	d
CB_TAG_UNUSED	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_UNUSED	/;"	d
CB_TAG_VBNV	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_VBNV	/;"	d
CB_TAG_VDAT	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_VDAT	/;"	d
CB_TAG_VERSION	arch/x86/include/asm/coreboot_tables.h	/^#define CB_TAG_VERSION	/;"	d
CC	Makefile	/^CC		= $(CROSS_COMPILE)gcc$/;"	m
CC	arch/blackfin/cpu/interrupt.S	/^	CC = R0 == 0;$/;"	d
CC	arch/blackfin/lib/__kgdb.S	/^	CC = R0 == 0;$/;"	d
CC	arch/blackfin/lib/memcmp.S	/^	CC =  AZ;			\/* AZ set if zero. *\/$/;"	d
CC	arch/blackfin/lib/memcmp.S	/^	CC = P2 == 0;		\/* Check zero count*\/$/;"	d
CC	arch/blackfin/lib/memcmp.S	/^	CC = R0 == R1;$/;"	d
CC	arch/blackfin/lib/memcmp.S	/^	CC = R2 <= 7(IU);$/;"	d
CC	arch/blackfin/lib/memcpy.S	/^	CC = P2 <= 2;$/;"	d
CC	arch/blackfin/lib/memcpy.S	/^	CC = R0 < R3;	\/* and dst < src+len *\/$/;"	d
CC	arch/blackfin/lib/memcpy.S	/^	CC = R1 < R0;	\/* src < dst *\/$/;"	d
CC	arch/blackfin/lib/memcpy.S	/^	CC = R2 <=  0;	\/* length not positive?*\/$/;"	d
CC	arch/blackfin/lib/memcpy.S	/^	CC = R3 == 0;$/;"	d
CC	arch/blackfin/lib/memcpy.S	/^	CC = R3;	\/* low bits set on either address? *\/$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC =  AZ;                 \/* AZ set if zero.*\/$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC = P2 == 0;             \/* Check zero count*\/$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC = P2 == 0;             \/* any remaining bytes? *\/$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC = P2 == 0;$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC = R0 <= R3 (IU);       \/* (From+len) >= To *\/$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC = R1 < R0 (IU);        \/* From < To *\/$/;"	d
CC	arch/blackfin/lib/memmove.S	/^	CC = R2 <= R3;$/;"	d
CC	arch/blackfin/lib/memset.S	/^	CC =  R2 == 0;             \/* AZ set if zero.	*\/$/;"	d
CC	arch/blackfin/lib/memset.S	/^	CC = BITTST (R0, 0);  \/* odd byte *\/$/;"	d
CC	arch/blackfin/lib/memset.S	/^	CC = P0 == P2;$/;"	d
CC	arch/blackfin/lib/memset.S	/^	CC = P2 == 0;           \/* Check zero count *\/$/;"	d
CC	arch/blackfin/lib/memset.S	/^	CC = R2 <= 2;          \/* 2 bytes *\/$/;"	d
CC	arch/blackfin/lib/memset.S	/^	CC = R2 <= 7(IU);$/;"	d
CC50_STATE28_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK, CC50_STATE28_MARK,$/;"	e	enum:__anona307901d0103	file:
CC50_STATE29_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CC50_STATE29_MARK,$/;"	e	enum:__anona307901d0103	file:
CC50_STATE30_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK,$/;"	e	enum:__anona307901d0103	file:
CC50_STATE31_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CC50_STATE31_MARK, VI0_CLK_MARK, AVB_RX_CLK_MARK, VI0_DATA0_VI0_B0_MARK,$/;"	e	enum:__anona307901d0103	file:
CC5_OSCOUT_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CC5_OSCOUT_MARK,$/;"	e	enum:__anona307945e0103	file:
CCBF0EN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CCBF0EN	/;"	d
CCBF1EN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CCBF1EN	/;"	d
CCBONUS0	arch/x86/cpu/quark/smc.h	/^#define CCBONUS0	/;"	d
CCBONUS1	arch/x86/cpu/quark/smc.h	/^#define CCBONUS1	/;"	d
CCBUFODTCH0	arch/x86/cpu/quark/smc.h	/^#define CCBUFODTCH0	/;"	d
CCCE_CHECK	arch/arm/include/asm/omap_mmc.h	/^#define CCCE_CHECK	/;"	d
CCCE_NOCHECK	arch/arm/include/asm/omap_mmc.h	/^#define CCCE_NOCHECK	/;"	d
CCCFGREG0	arch/x86/cpu/quark/smc.h	/^#define CCCFGREG0	/;"	d
CCCFGREG1	arch/x86/cpu/quark/smc.h	/^#define CCCFGREG1	/;"	d
CCCLKALIGNREG0	arch/x86/cpu/quark/smc.h	/^#define CCCLKALIGNREG0	/;"	d
CCCLKALIGNREG1	arch/x86/cpu/quark/smc.h	/^#define CCCLKALIGNREG1	/;"	d
CCCLKALIGNREG2	arch/x86/cpu/quark/smc.h	/^#define CCCLKALIGNREG2	/;"	d
CCCLKALIGNSTS0	arch/x86/cpu/quark/smc.h	/^#define CCCLKALIGNSTS0	/;"	d
CCCLKALIGNSTS1	arch/x86/cpu/quark/smc.h	/^#define CCCLKALIGNSTS1	/;"	d
CCCLKGATE	arch/x86/cpu/quark/smc.h	/^#define CCCLKGATE	/;"	d
CCCOMPSLV1	arch/x86/cpu/quark/smc.h	/^#define CCCOMPSLV1	/;"	d
CCCOMPSLV2	arch/x86/cpu/quark/smc.h	/^#define CCCOMPSLV2	/;"	d
CCCOMPSLV3	arch/x86/cpu/quark/smc.h	/^#define CCCOMPSLV3	/;"	d
CCCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCCR	/;"	d
CCCR_L09	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_L09 /;"	d
CCCR_L27	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_L27 /;"	d
CCCR_L32	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_L32 /;"	d
CCCR_L36	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_L36 /;"	d
CCCR_L40	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_L40 /;"	d
CCCR_L45	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_L45 /;"	d
CCCR_L_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCCR_L_MASK	/;"	d
CCCR_M1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_M1 /;"	d
CCCR_M2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_M2 /;"	d
CCCR_M4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_M4 /;"	d
CCCR_M_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCCR_M_MASK	/;"	d
CCCR_N10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_N10 /;"	d
CCCR_N15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_N15 /;"	d
CCCR_N20	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_N20 /;"	d
CCCR_N25	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_N25 /;"	d
CCCR_N30	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	 CCCR_N30 /;"	d
CCCR_N_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCCR_N_MASK	/;"	d
CCDDR3RESETCTL	arch/x86/cpu/quark/smc.h	/^#define CCDDR3RESETCTL	/;"	d
CCDLLPICODER0	arch/x86/cpu/quark/smc.h	/^#define CCDLLPICODER0	/;"	d
CCDLLPICODER1	arch/x86/cpu/quark/smc.h	/^#define CCDLLPICODER1	/;"	d
CCDLLRXCTL	arch/x86/cpu/quark/smc.h	/^#define CCDLLRXCTL	/;"	d
CCDLLTXCTL	arch/x86/cpu/quark/smc.h	/^#define CCDLLTXCTL	/;"	d
CCDM_AUTO_FIRST_STAGE	board/gdsys/p1022/controlcenterd-id.c	/^#define CCDM_AUTO_FIRST_STAGE$/;"	d	file:
CCDM_DEVELOP	board/gdsys/p1022/controlcenterd-id.c	/^#define CCDM_DEVELOP$/;"	d	file:
CCDM_FIRST_STAGE	board/gdsys/p1022/controlcenterd-id.c	/^#define CCDM_FIRST_STAGE$/;"	d	file:
CCDM_SECOND_STAGE	board/gdsys/p1022/controlcenterd-id.c	/^#define CCDM_SECOND_STAGE$/;"	d	file:
CCEN	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define CCEN	/;"	d
CCFG_UNRS	arch/x86/include/asm/arch-quark/quark.h	/^#define CCFG_UNRS	/;"	d
CCFG_UNSD	arch/x86/include/asm/arch-quark/quark.h	/^#define CCFG_UNSD	/;"	d
CCFG_UPRS	arch/x86/include/asm/arch-quark/quark.h	/^#define CCFG_UPRS	/;"	d
CCFG_UPSD	arch/x86/include/asm/arch-quark/quark.h	/^#define CCFG_UPSD	/;"	d
CCGR0	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR2;	\/* 0x0070 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR2;	\/* 0x0070 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR3	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR3;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR3	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR3;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR4	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR4;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR4	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR4;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR5	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR5;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR5	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR5;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR6	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR6;	\/* 0x0080 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR6	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR6;	\/* 0x0080 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR7	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 CCGR7;      \/* 0x0084 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR7	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 CCGR7;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
CCGR_ADC	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ADC = 32,$/;"	e	enum:clk_ccgr_index
CCGR_ANATOP	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ANATOP = 33,$/;"	e	enum:clk_ccgr_index
CCGR_CAAM	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_CAAM = 36,$/;"	e	enum:clk_ccgr_index
CCGR_CAN1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_CAN1 = 116,$/;"	e	enum:clk_ccgr_index
CCGR_CAN2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_CAN2 = 117,$/;"	e	enum:clk_ccgr_index
CCGR_CPU	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_CPU = 0,$/;"	e	enum:clk_ccgr_index
CCGR_CSI	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_CSI = 73,$/;"	e	enum:clk_ccgr_index
CCGR_CSU	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_CSU = 45,$/;"	e	enum:clk_ccgr_index
CCGR_DBGMON	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_DBGMON = 46,$/;"	e	enum:clk_ccgr_index
CCGR_DEBUG	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_DEBUG = 47,$/;"	e	enum:clk_ccgr_index
CCGR_DRAM	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_DRAM = 19,$/;"	e	enum:clk_ccgr_index
CCGR_DVFS	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_DVFS = 41,$/;"	e	enum:clk_ccgr_index
CCGR_ECSPI1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ECSPI1 = 120,$/;"	e	enum:clk_ccgr_index
CCGR_ECSPI2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ECSPI2 = 121,$/;"	e	enum:clk_ccgr_index
CCGR_ECSPI3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ECSPI3 = 122,$/;"	e	enum:clk_ccgr_index
CCGR_ECSPI4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ECSPI4 = 123,$/;"	e	enum:clk_ccgr_index
CCGR_ENET1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ENET1 = 112,$/;"	e	enum:clk_ccgr_index
CCGR_ENET2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ENET2 = 113,$/;"	e	enum:clk_ccgr_index
CCGR_EPDC	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_EPDC = 74,$/;"	e	enum:clk_ccgr_index
CCGR_FTM1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_FTM1 = 128,$/;"	e	enum:clk_ccgr_index
CCGR_FTM2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_FTM2 = 129,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO1 = 160,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO2 = 161,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO3 = 162,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO4 = 163,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO5	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO5 = 164,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO6	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO6 = 165,$/;"	e	enum:clk_ccgr_index
CCGR_GPIO7	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPIO7 = 166,$/;"	e	enum:clk_ccgr_index
CCGR_GPT1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPT1 = 124,$/;"	e	enum:clk_ccgr_index
CCGR_GPT2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPT2 = 125,$/;"	e	enum:clk_ccgr_index
CCGR_GPT3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPT3 = 126,$/;"	e	enum:clk_ccgr_index
CCGR_GPT4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_GPT4 = 127,$/;"	e	enum:clk_ccgr_index
CCGR_HS	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_HS = 40,$/;"	e	enum:clk_ccgr_index
CCGR_I2C1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_I2C1 = 136,$/;"	e	enum:clk_ccgr_index
CCGR_I2C2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_I2C2 = 137,$/;"	e	enum:clk_ccgr_index
CCGR_I2C3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_I2C3 = 138,$/;"	e	enum:clk_ccgr_index
CCGR_I2C4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_I2C4 = 139,$/;"	e	enum:clk_ccgr_index
CCGR_IOMUX	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_IOMUX = 168,$/;"	e	enum:clk_ccgr_index
CCGR_IOMUX_LPSR	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_IOMUX_LPSR = 169,$/;"	e	enum:clk_ccgr_index
CCGR_IPMUX1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_IPMUX1 = 10,$/;"	e	enum:clk_ccgr_index
CCGR_IPMUX2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_IPMUX2 = 11,$/;"	e	enum:clk_ccgr_index
CCGR_IPMUX3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_IPMUX3 = 12,$/;"	e	enum:clk_ccgr_index
CCGR_KPP	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_KPP = 170,$/;"	e	enum:clk_ccgr_index
CCGR_LCDIF	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_LCDIF = 75,$/;"	e	enum:clk_ccgr_index
CCGR_M4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_M4 = 1,$/;"	e	enum:clk_ccgr_index
CCGR_MAX	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_MAX,$/;"	e	enum:clk_ccgr_index
CCGR_MIPI_CSI	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_MIPI_CSI = 100,$/;"	e	enum:clk_ccgr_index
CCGR_MIPI_DSI	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_MIPI_DSI = 101,$/;"	e	enum:clk_ccgr_index
CCGR_MIPI_MEM_PHY	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_MIPI_MEM_PHY = 102,$/;"	e	enum:clk_ccgr_index
CCGR_MU	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_MU = 39,$/;"	e	enum:clk_ccgr_index
CCGR_OCOTP	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_OCOTP = 35,$/;"	e	enum:clk_ccgr_index
CCGR_OCRAM	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_OCRAM = 17,$/;"	e	enum:clk_ccgr_index
CCGR_OCRAM_S	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_OCRAM_S = 18,$/;"	e	enum:clk_ccgr_index
CCGR_PCIE	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PCIE = 96,$/;"	e	enum:clk_ccgr_index
CCGR_PERFMON1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PERFMON1 = 68,$/;"	e	enum:clk_ccgr_index
CCGR_PERFMON2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PERFMON2 = 69,$/;"	e	enum:clk_ccgr_index
CCGR_PWM1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PWM1 = 132,$/;"	e	enum:clk_ccgr_index
CCGR_PWM2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PWM2 = 133,$/;"	e	enum:clk_ccgr_index
CCGR_PWM3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PWM3 = 134,$/;"	e	enum:clk_ccgr_index
CCGR_PWM4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PWM4 = 135,$/;"	e	enum:clk_ccgr_index
CCGR_PXP	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_PXP = 76,$/;"	e	enum:clk_ccgr_index
CCGR_QOS	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_QOS = 42,$/;"	e	enum:clk_ccgr_index
CCGR_QOS_DISPMIX	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_QOS_DISPMIX = 43,$/;"	e	enum:clk_ccgr_index
CCGR_QOS_MEGAMIX	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_QOS_MEGAMIX = 44,$/;"	e	enum:clk_ccgr_index
CCGR_QSPI	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_QSPI = 21,$/;"	e	enum:clk_ccgr_index
CCGR_RAWNAND	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_RAWNAND = 20,$/;"	e	enum:clk_ccgr_index
CCGR_RDC	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_RDC = 38,$/;"	e	enum:clk_ccgr_index
CCGR_ROM	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_ROM = 16,$/;"	e	enum:clk_ccgr_index
CCGR_SAI1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SAI1 = 140,$/;"	e	enum:clk_ccgr_index
CCGR_SAI2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SAI2 = 141,$/;"	e	enum:clk_ccgr_index
CCGR_SAI3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SAI3 = 142,$/;"	e	enum:clk_ccgr_index
CCGR_SCTR	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SCTR = 34,$/;"	e	enum:clk_ccgr_index
CCGR_SDMA	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SDMA = 72,$/;"	e	enum:clk_ccgr_index
CCGR_SEC_DEBUG	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SEC_DEBUG = 49,$/;"	e	enum:clk_ccgr_index
CCGR_SEMA1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SEMA1 = 64,$/;"	e	enum:clk_ccgr_index
CCGR_SEMA2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SEMA2 = 65,$/;"	e	enum:clk_ccgr_index
CCGR_SIM1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM1 = 144,$/;"	e	enum:clk_ccgr_index
CCGR_SIM2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM2 = 145,$/;"	e	enum:clk_ccgr_index
CCGR_SIM_DISPLAY	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM_DISPLAY = 5,$/;"	e	enum:clk_ccgr_index
CCGR_SIM_ENET	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM_ENET = 6,$/;"	e	enum:clk_ccgr_index
CCGR_SIM_M	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM_M = 7,$/;"	e	enum:clk_ccgr_index
CCGR_SIM_MAIN	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM_MAIN = 4,$/;"	e	enum:clk_ccgr_index
CCGR_SIM_S	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM_S = 8,$/;"	e	enum:clk_ccgr_index
CCGR_SIM_WAKEUP	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SIM_WAKEUP = 9,$/;"	e	enum:clk_ccgr_index
CCGR_SKIP	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SKIP,$/;"	e	enum:clk_ccgr_index
CCGR_SNVS	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_SNVS = 37,$/;"	e	enum:clk_ccgr_index
CCGR_TRACE	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_TRACE = 48,$/;"	e	enum:clk_ccgr_index
CCGR_UART1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART1 = 148,$/;"	e	enum:clk_ccgr_index
CCGR_UART2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART2 = 149,$/;"	e	enum:clk_ccgr_index
CCGR_UART3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART3 = 150,$/;"	e	enum:clk_ccgr_index
CCGR_UART4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART4 = 151,$/;"	e	enum:clk_ccgr_index
CCGR_UART5	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART5 = 152,$/;"	e	enum:clk_ccgr_index
CCGR_UART6	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART6 = 153,$/;"	e	enum:clk_ccgr_index
CCGR_UART7	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_UART7 = 154,$/;"	e	enum:clk_ccgr_index
CCGR_USB_CTRL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USB_CTRL = 104,$/;"	e	enum:clk_ccgr_index
CCGR_USB_HSIC	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USB_HSIC = 105,$/;"	e	enum:clk_ccgr_index
CCGR_USB_PHY1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USB_PHY1 = 106,$/;"	e	enum:clk_ccgr_index
CCGR_USB_PHY2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USB_PHY2 = 107,$/;"	e	enum:clk_ccgr_index
CCGR_USDHC1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USDHC1 = 108,$/;"	e	enum:clk_ccgr_index
CCGR_USDHC2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USDHC2 = 109,$/;"	e	enum:clk_ccgr_index
CCGR_USDHC3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_USDHC3 = 110,$/;"	e	enum:clk_ccgr_index
CCGR_WDOG1	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_WDOG1 = 156,$/;"	e	enum:clk_ccgr_index
CCGR_WDOG2	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_WDOG2 = 157,$/;"	e	enum:clk_ccgr_index
CCGR_WDOG3	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_WDOG3 = 158,$/;"	e	enum:clk_ccgr_index
CCGR_WDOG4	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_WDOG4 = 159,$/;"	e	enum:clk_ccgr_index
CCGR_WEIM	arch/arm/include/asm/arch-mx7/clock.h	/^	CCGR_WEIM = 22,$/;"	e	enum:clk_ccgr_index
CCI1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define CCI1_BASE_ADDR	/;"	d
CCI400_CLK_DIV_RATIO	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCI400_CLK_DIV_RATIO(/;"	d
CCI400_CLK_DIV_RATIO	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCI400_CLK_DIV_RATIO(/;"	d
CCI400_CTRLORD_EN_BARRIER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CCI400_CTRLORD_EN_BARRIER	/;"	d
CCI400_CTRLORD_EN_BARRIER	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCI400_CTRLORD_EN_BARRIER	/;"	d
CCI400_CTRLORD_TERM_BARRIER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CCI400_CTRLORD_TERM_BARRIER	/;"	d
CCI400_CTRLORD_TERM_BARRIER	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCI400_CTRLORD_TERM_BARRIER	/;"	d
CCI400_DVM_MESSAGE_REQ_EN	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CCI400_DVM_MESSAGE_REQ_EN	/;"	d
CCI400_DVM_MESSAGE_REQ_EN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCI400_DVM_MESSAGE_REQ_EN	/;"	d
CCI400_SHAORD_NON_SHAREABLE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CCI400_SHAORD_NON_SHAREABLE	/;"	d
CCI400_SHAORD_NON_SHAREABLE	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCI400_SHAORD_NON_SHAREABLE	/;"	d
CCI400_SNOOP_REQ_EN	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CCI400_SNOOP_REQ_EN	/;"	d
CCI400_SNOOP_REQ_EN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCI400_SNOOP_REQ_EN	/;"	d
CCI400_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCI400_SRC_CLK_SELECT_SHIFT /;"	d
CCI400_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCI400_SRC_CLK_SELECT_SHIFT /;"	d
CCI400_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCI400_SRC_MASK /;"	d
CCI400_SRC_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCI400_SRC_MASK /;"	d
CCI400_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCI400_SRC_OSC24M /;"	d
CCI400_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCI400_SRC_OSC24M /;"	d
CCI400_SRC_PLL_PERIPH0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCI400_SRC_PLL_PERIPH0 /;"	d
CCI400_SRC_PLL_PERIPH0	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCI400_SRC_PLL_PERIPH0 /;"	d
CCI400_SRC_PLL_PERIPH1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCI400_SRC_PLL_PERIPH1 /;"	d
CCI400_SRC_PLL_PERIPH1	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCI400_SRC_PLL_PERIPH1 /;"	d
CCI500_BASE	arch/arm/mach-uniphier/arm64/arm-cci500.c	/^#define CCI500_BASE	/;"	d	file:
CCI500_SLAVE_OFFSET	arch/arm/mach-uniphier/arm64/arm-cci500.c	/^#define CCI500_SLAVE_OFFSET	/;"	d	file:
CCI500_SNOOP_CTRL	arch/arm/mach-uniphier/arm64/arm-cci500.c	/^#define CCI500_SNOOP_CTRL$/;"	d	file:
CCI500_SNOOP_CTRL_EN_DVM	arch/arm/mach-uniphier/arm64/arm-cci500.c	/^#define   CCI500_SNOOP_CTRL_EN_DVM	/;"	d	file:
CCI500_SNOOP_CTRL_EN_SNOOP	arch/arm/mach-uniphier/arm64/arm-cci500.c	/^#define   CCI500_SNOOP_CTRL_EN_SNOOP	/;"	d	file:
CCI_400_MAXOT_1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_400_MAXOT_1	/;"	d
CCI_400_MAXOT_2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_400_MAXOT_2	/;"	d
CCI_400_QOSCNTL_1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_400_QOSCNTL_1	/;"	d
CCI_400_QOSCNTL_2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_400_QOSCNTL_2	/;"	d
CCI_AUX_CONTROL_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_AUX_CONTROL_BASE(/;"	d
CCI_AXI_AX2ADDRMASK	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_AX2ADDRMASK	/;"	d
CCI_AXI_CCISLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_CCISLVDMSCR	/;"	d
CCI_AXI_DVMDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_DVMDMSCR	/;"	d
CCI_AXI_IPMMUDSDVMCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_IPMMUDSDVMCR	/;"	d
CCI_AXI_IPMMUIDVMCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_IPMMUIDVMCR	/;"	d
CCI_AXI_IPMMUMPDVMCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_IPMMUMPDVMCR	/;"	d
CCI_AXI_IPMMURDVMCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_IPMMURDVMCR	/;"	d
CCI_AXI_IPMMUS0DVMCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_IPMMUS0DVMCR	/;"	d
CCI_AXI_IPMMUS1DVMCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_IPMMUS1DVMCR	/;"	d
CCI_AXI_MMUDSDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUDSDMSCR	/;"	d
CCI_AXI_MMUDS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUDS_BASE	/;"	d
CCI_AXI_MMUMDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUMDMSCR	/;"	d
CCI_AXI_MMUMPDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUMPDMSCR	/;"	d
CCI_AXI_MMUMP_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUMP_BASE	/;"	d
CCI_AXI_MMUM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUM_BASE	/;"	d
CCI_AXI_MMURDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMURDMSCR	/;"	d
CCI_AXI_MMUR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUR_BASE	/;"	d
CCI_AXI_MMUS0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUS0DMSCR	/;"	d
CCI_AXI_MMUS0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUS0_BASE	/;"	d
CCI_AXI_MMUS1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUS1DMSCR	/;"	d
CCI_AXI_MMUS1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MMUS1_BASE	/;"	d
CCI_AXI_MXIDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MXIDMSCR	/;"	d
CCI_AXI_MXI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_MXI_BASE	/;"	d
CCI_AXI_SYX2DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_SYX2DMSCR	/;"	d
CCI_AXI_SYX2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CCI_AXI_SYX2_BASE	/;"	d
CCI_HN_F_0_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_HN_F_0_BASE	/;"	d
CCI_HN_F_1_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_HN_F_1_BASE	/;"	d
CCI_MN_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_MN_BASE	/;"	d
CCI_MN_DVM_DOMAIN_CTL	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_MN_DVM_DOMAIN_CTL	/;"	d
CCI_MN_DVM_DOMAIN_CTL_SET	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_MN_DVM_DOMAIN_CTL_SET	/;"	d
CCI_MN_RNF_NODEID_LIST	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_MN_RNF_NODEID_LIST	/;"	d
CCI_RN_I_0_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_RN_I_0_BASE	/;"	d
CCI_RN_I_12_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_RN_I_12_BASE	/;"	d
CCI_RN_I_16_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_RN_I_16_BASE	/;"	d
CCI_RN_I_20_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_RN_I_20_BASE	/;"	d
CCI_RN_I_2_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_RN_I_2_BASE	/;"	d
CCI_RN_I_6_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_RN_I_6_BASE	/;"	d
CCI_S0_QOS_CONTROL_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_S0_QOS_CONTROL_BASE(/;"	d
CCI_S1_QOS_CONTROL_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_S1_QOS_CONTROL_BASE(/;"	d
CCI_S2_QOS_CONTROL_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCI_S2_QOS_CONTROL_BASE(/;"	d
CCLK_BURST_POLICY	arch/arm/include/asm/arch-tegra/ap.h	/^#define CCLK_BURST_POLICY	/;"	d
CCLK_BURST_POLICY	arch/arm/mach-tegra/cpu.h	/^#define CCLK_BURST_POLICY	/;"	d
CCLK_DIV1	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CCLK_DIV1	/;"	d
CCLK_DIV2	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CCLK_DIV2	/;"	d
CCLK_DIV4	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CCLK_DIV4	/;"	d
CCLK_DIV8	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CCLK_DIV8	/;"	d
CCLK_NUM	board/bf537-stamp/post-memory.c	/^#define CCLK_NUM	/;"	d	file:
CCLK_PLLP_BURST_POLICY	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CCLK_PLLP_BURST_POLICY	/;"	d
CCLK_VLEV_120	arch/blackfin/cpu/initcode.c	/^#  define CCLK_VLEV_120	/;"	d	file:
CCLK_VLEV_125	arch/blackfin/cpu/initcode.c	/^#  define CCLK_VLEV_125	/;"	d	file:
CCMDLLCTL	arch/x86/cpu/quark/smc.h	/^#define CCMDLLCTL	/;"	d
CCMFR	arch/sh/include/asm/cpu_sh7722.h	/^#define CCMFR /;"	d
CCMFR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CCMFR	/;"	d
CCMR_CKIH	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCMR_CKIH	/;"	d
CCMR_FPM	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCMR_FPM	/;"	d
CCMR_MDS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCMR_MDS	/;"	d
CCMR_MPE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCMR_MPE	/;"	d
CCMR_PRCS_MASK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCMR_PRCS_MASK	/;"	d
CCMR_SBYCS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCMR_SBYCS	/;"	d
CCM_AHB_CHANNEL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCM_AHB_CHANNEL,$/;"	e	enum:clk_root_type
CCM_AHB_GATE_ACE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_AHB_GATE_ACE /;"	d
CCM_AHB_GATE_ACE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_AHB_GATE_ACE /;"	d
CCM_AHB_GATE_DLL	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_AHB_GATE_DLL /;"	d
CCM_AHB_GATE_DLL	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_AHB_GATE_DLL /;"	d
CCM_AHB_GATE_GPS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_AHB_GATE_GPS /;"	d
CCM_AHB_GATE_GPS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_AHB_GATE_GPS /;"	d
CCM_AHB_GATE_SDRAM	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_AHB_GATE_SDRAM /;"	d
CCM_AHB_GATE_SDRAM	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_AHB_GATE_SDRAM /;"	d
CCM_AHB_GATING0	drivers/mtd/spi/sunxi_spi_spl.c	/^#define CCM_AHB_GATING0 /;"	d	file:
CCM_ANALOG_CLK_MISC0_ACLK2_PREDIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_ACLK2_PREDIV_MASK /;"	d
CCM_ANALOG_CLK_MISC0_ACLK2_PREDIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_ACLK2_PREDIV_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_CLR_ACLK2_PREDIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_ACLK2_PREDIV_MASK /;"	d
CCM_ANALOG_CLK_MISC0_CLR_ACLK2_PREDIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_ACLK2_PREDIV_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDS1_CLK_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDS1_CLK_SEL(/;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDS1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDS1_CLK_SEL_MASK /;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDS1_CLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDS1_CLK_SEL_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_IBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_IBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_IBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_IBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_OBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_OBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_OBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_LVDSCLK1_OBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_RSVD0(/;"	d
CCM_ANALOG_CLK_MISC0_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_RSVD0_MASK /;"	d
CCM_ANALOG_CLK_MISC0_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_CLR_RSVD0_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_LVDS1_CLK_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDS1_CLK_SEL(/;"	d
CCM_ANALOG_CLK_MISC0_LVDS1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDS1_CLK_SEL_MASK /;"	d
CCM_ANALOG_CLK_MISC0_LVDS1_CLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDS1_CLK_SEL_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_LVDSCLK1_IBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDSCLK1_IBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_LVDSCLK1_IBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDSCLK1_IBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_LVDSCLK1_OBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDSCLK1_OBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_LVDSCLK1_OBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_LVDSCLK1_OBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_RSVD0(/;"	d
CCM_ANALOG_CLK_MISC0_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_RSVD0_MASK /;"	d
CCM_ANALOG_CLK_MISC0_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_RSVD0_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_SET_ACLK2_PREDIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_ACLK2_PREDIV_MASK /;"	d
CCM_ANALOG_CLK_MISC0_SET_ACLK2_PREDIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_ACLK2_PREDIV_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDS1_CLK_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDS1_CLK_SEL(/;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDS1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDS1_CLK_SEL_MASK /;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDS1_CLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDS1_CLK_SEL_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_IBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_IBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_IBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_IBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_OBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_OBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_OBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_LVDSCLK1_OBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_RSVD0(/;"	d
CCM_ANALOG_CLK_MISC0_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_RSVD0_MASK /;"	d
CCM_ANALOG_CLK_MISC0_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_SET_RSVD0_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_TOG_ACLK2_PREDIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_ACLK2_PREDIV_MASK /;"	d
CCM_ANALOG_CLK_MISC0_TOG_ACLK2_PREDIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_ACLK2_PREDIV_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDS1_CLK_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDS1_CLK_SEL(/;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDS1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDS1_CLK_SEL_MASK /;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDS1_CLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDS1_CLK_SEL_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_IBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_IBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_IBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_IBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_OBEN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_OBEN_MASK /;"	d
CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_OBEN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_LVDSCLK1_OBEN_SHIFT /;"	d
CCM_ANALOG_CLK_MISC0_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_RSVD0(/;"	d
CCM_ANALOG_CLK_MISC0_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_RSVD0_MASK /;"	d
CCM_ANALOG_CLK_MISC0_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_CLK_MISC0_TOG_RSVD0_SHIFT /;"	d
CCM_ANALOG_PFD_480A_PFD0_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD0_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD0_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD0_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD0_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD0_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD0_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD0_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD0_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD0_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD0_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD0_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD1_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD1_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD1_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD1_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD1_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD1_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD1_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD1_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD1_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD1_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD1_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD1_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD2_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD2_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD2_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD2_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD2_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD2_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD2_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD2_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD2_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD2_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD2_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD2_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD3_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD3_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD3_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD3_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD3_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD3_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD3_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD3_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480A_PFD3_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD3_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480A_PFD3_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480A_PFD3_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD4_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD4_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD4_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD4_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD4_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD4_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD4_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD4_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD4_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD4_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD4_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD4_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD5_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD5_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD5_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD5_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD5_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD5_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD5_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD5_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD5_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD5_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD5_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD5_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD6_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD6_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD6_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD6_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD6_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD6_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD6_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD6_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD6_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD6_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD6_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD6_STABLE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD7_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD7_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD7_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD7_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD7_FRAC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD7_FRAC_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD7_FRAC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD7_FRAC_SHIFT	/;"	d
CCM_ANALOG_PFD_480B_PFD7_STABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD7_STABLE_MASK	/;"	d
CCM_ANALOG_PFD_480B_PFD7_STABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PFD_480B_PFD7_STABLE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_BYPASS_CLK_SRC_MASK	/;"	d
CCM_ANALOG_PLL_480_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_BYPASS_CLK_SRC_SHIFT	/;"	d
CCM_ANALOG_PLL_480_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_BYPASS_MASK	/;"	d
CCM_ANALOG_PLL_480_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_BYPASS_SHIFT	/;"	d
CCM_ANALOG_PLL_480_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_DIV_SELECT_MASK	/;"	d
CCM_ANALOG_PLL_480_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_DIV_SELECT_SHIFT	/;"	d
CCM_ANALOG_PLL_480_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_DOUBLE_CP_MASK	/;"	d
CCM_ANALOG_PLL_480_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_DOUBLE_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_480_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_DOUBLE_LF_MASK	/;"	d
CCM_ANALOG_PLL_480_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_DOUBLE_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_480_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_ENABLE_CLK_MASK	/;"	d
CCM_ANALOG_PLL_480_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_ENABLE_CLK_SHIFT	/;"	d
CCM_ANALOG_PLL_480_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_HALF_CP_MASK	/;"	d
CCM_ANALOG_PLL_480_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_HALF_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_480_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_HALF_LF_MASK	/;"	d
CCM_ANALOG_PLL_480_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_HALF_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_480_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_HOLD_RING_OFF_MASK	/;"	d
CCM_ANALOG_PLL_480_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_HOLD_RING_OFF_SHIFT	/;"	d
CCM_ANALOG_PLL_480_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_LOCK_MASK	/;"	d
CCM_ANALOG_PLL_480_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_LOCK_SHIFT	/;"	d
CCM_ANALOG_PLL_480_MAIN_DIV1_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_MAIN_DIV1_CLKGATE_MASK	/;"	d
CCM_ANALOG_PLL_480_MAIN_DIV1_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_MAIN_DIV1_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_MAIN_DIV2_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_MAIN_DIV2_CLKGATE_MASK	/;"	d
CCM_ANALOG_PLL_480_MAIN_DIV2_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_MAIN_DIV2_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_MAIN_DIV4_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_MAIN_DIV4_CLKGATE_MASK	/;"	d
CCM_ANALOG_PLL_480_MAIN_DIV4_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_MAIN_DIV4_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD0_DIV2_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD0_DIV2_CLKGATE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD0_DIV2_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD0_DIV2_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD0_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD0_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD0_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD0_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD1_DIV2_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD1_DIV2_CLKGATE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD1_DIV2_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD1_DIV2_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD1_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD1_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD1_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD1_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD2_DIV2_CLKGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD2_DIV2_CLKGATE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD2_DIV2_CLKGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD2_DIV2_CLKGATE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD2_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD2_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD2_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD2_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD3_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD3_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD3_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD3_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD4_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD4_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD4_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD4_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD5_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD5_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD5_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD5_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD6_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD6_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD6_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD6_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PFD7_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD7_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PFD7_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PFD7_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_PLL_480_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PLL_480_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_480_PLL_480_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_PLL_480_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_480_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_POWERDOWN_MASK	/;"	d
CCM_ANALOG_PLL_480_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_POWERDOWN_SHIFT	/;"	d
CCM_ANALOG_PLL_480_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_RSVD0_MASK	/;"	d
CCM_ANALOG_PLL_480_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_RSVD0_SHIFT	/;"	d
CCM_ANALOG_PLL_480_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_RSVD1_MASK	/;"	d
CCM_ANALOG_PLL_480_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_480_RSVD1_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK	/;"	d
CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_BYPASS_MASK	/;"	d
CCM_ANALOG_PLL_ARM_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_BYPASS_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK	/;"	d
CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_DOUBLE_CP_MASK	/;"	d
CCM_ANALOG_PLL_ARM_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_DOUBLE_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_DOUBLE_LF_MASK	/;"	d
CCM_ANALOG_PLL_ARM_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_DOUBLE_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_ENABLE_CLK_MASK	/;"	d
CCM_ANALOG_PLL_ARM_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_ENABLE_CLK_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_HALF_CP_MASK	/;"	d
CCM_ANALOG_PLL_ARM_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_HALF_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_HALF_LF_MASK	/;"	d
CCM_ANALOG_PLL_ARM_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_HALF_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_HOLD_RING_OFF_MASK	/;"	d
CCM_ANALOG_PLL_ARM_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_HOLD_RING_OFF_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_LOCK_MASK	/;"	d
CCM_ANALOG_PLL_ARM_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_LOCK_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_LVDS_24MHZ_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_LVDS_24MHZ_SEL_MASK	/;"	d
CCM_ANALOG_PLL_ARM_LVDS_24MHZ_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_LVDS_24MHZ_SEL_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_LVDS_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_LVDS_SEL_MASK	/;"	d
CCM_ANALOG_PLL_ARM_LVDS_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_LVDS_SEL_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_PLL_ARM_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_PLL_ARM_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_ARM_PLL_ARM_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_PLL_ARM_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_PLL_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_PLL_SEL_MASK	/;"	d
CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_POWERDOWN_MASK	/;"	d
CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT	/;"	d
CCM_ANALOG_PLL_ARM_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_RSVD0_MASK	/;"	d
CCM_ANALOG_PLL_ARM_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ARM_RSVD0_SHIFT	/;"	d
CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_PLL_AUDIO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_PLL_AUDIO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_PLL_AUDIO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_PLL_AUDIO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_RSVD1(/;"	d
CCM_ANALOG_PLL_AUDIO_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_CLR_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_CLR_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_CLR_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_DENOM_B	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DENOM_B(/;"	d
CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_DENOM_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DENOM_RSVD0(/;"	d
CCM_ANALOG_PLL_AUDIO_DENOM_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DENOM_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_DENOM_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DENOM_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_LOCK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_NUM_A	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_NUM_A(/;"	d
CCM_ANALOG_PLL_AUDIO_NUM_A_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_NUM_A_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_NUM_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_NUM_RSVD0(/;"	d
CCM_ANALOG_PLL_AUDIO_NUM_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_NUM_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_NUM_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_NUM_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_PLL_AUDIO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_PLL_AUDIO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_PLL_AUDIO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_PLL_AUDIO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_AUDIO_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_RSVD1(/;"	d
CCM_ANALOG_PLL_AUDIO_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_PLL_AUDIO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_PLL_AUDIO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_PLL_AUDIO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_PLL_AUDIO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_RSVD1(/;"	d
CCM_ANALOG_PLL_AUDIO_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SET_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_SET_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SET_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SET_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SS_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SS_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SS_STEP	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_STEP(/;"	d
CCM_ANALOG_PLL_AUDIO_SS_STEP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_STEP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SS_STEP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_STEP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_SS_STOP	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_STOP(/;"	d
CCM_ANALOG_PLL_AUDIO_SS_STOP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_STOP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_SS_STOP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_SS_STOP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_PLL_AUDIO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_PLL_AUDIO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_PLL_AUDIO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_PLL_AUDIO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_RSVD1(/;"	d
CCM_ANALOG_PLL_AUDIO_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_AUDIO_TOG_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_AUDIO_TOG_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_AUDIO_TOG_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_DDR_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_BYPASS_CLK_SRC_MASK	/;"	d
CCM_ANALOG_PLL_DDR_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_BYPASS_CLK_SRC_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_BYPASS_MASK	/;"	d
CCM_ANALOG_PLL_DDR_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_BYPASS_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DITHER_ENABLE_MASK	/;"	d
CCM_ANALOG_PLL_DDR_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DITHER_ENABLE_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_MASK	/;"	d
CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DIV_SELECT_MASK	/;"	d
CCM_ANALOG_PLL_DDR_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DIV_SELECT_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DOUBLE_CP_MASK	/;"	d
CCM_ANALOG_PLL_DDR_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DOUBLE_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DOUBLE_LF_MASK	/;"	d
CCM_ANALOG_PLL_DDR_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_DOUBLE_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_ENABLE_CLK_MASK	/;"	d
CCM_ANALOG_PLL_DDR_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_ENABLE_CLK_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_HALF_CP_MASK	/;"	d
CCM_ANALOG_PLL_DDR_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_HALF_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_HALF_LF_MASK	/;"	d
CCM_ANALOG_PLL_DDR_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_HALF_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_HOLD_RING_OFF_MASK	/;"	d
CCM_ANALOG_PLL_DDR_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_HOLD_RING_OFF_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_LOCK_MASK	/;"	d
CCM_ANALOG_PLL_DDR_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_LOCK_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_PFD_OFFSET_EN_MASK	/;"	d
CCM_ANALOG_PLL_DDR_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_PFD_OFFSET_EN_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_PLL_DDR_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_PLL_DDR_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_DDR_PLL_DDR_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_PLL_DDR_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_POWERDOWN_MASK	/;"	d
CCM_ANALOG_PLL_DDR_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_POWERDOWN_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_RSVD1_MASK	/;"	d
CCM_ANALOG_PLL_DDR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_RSVD1_SHIFT	/;"	d
CCM_ANALOG_PLL_DDR_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_TEST_DIV_SELECT_MASK	/;"	d
CCM_ANALOG_PLL_DDR_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_DDR_TEST_DIV_SELECT_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK	/;"	d
CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_BYPASS_MASK	/;"	d
CCM_ANALOG_PLL_ENET_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_BYPASS_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_DITHER_ENABLE_MASK	/;"	d
CCM_ANALOG_PLL_ENET_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_DITHER_ENABLE_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_DOUBLE_CP_MASK	/;"	d
CCM_ANALOG_PLL_ENET_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_DOUBLE_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_DOUBLE_LF_MASK	/;"	d
CCM_ANALOG_PLL_ENET_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_DOUBLE_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_100MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_100MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_100MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_100MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_125MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_125MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_125MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_125MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_250MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_250MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_250MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_250MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_25MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_25MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_25MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_25MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_40MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_40MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_40MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_40MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_500MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_500MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_500MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_500MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_50MHZ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_50MHZ_MASK	/;"	d
CCM_ANALOG_PLL_ENET_ENABLE_CLK_50MHZ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_ENABLE_CLK_50MHZ_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_HALF_CP_MASK	/;"	d
CCM_ANALOG_PLL_ENET_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_HALF_CP_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_HALF_LF_MASK	/;"	d
CCM_ANALOG_PLL_ENET_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_HALF_LF_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_HOLD_RING_OFF_MASK	/;"	d
CCM_ANALOG_PLL_ENET_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_HOLD_RING_OFF_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_LOCK_MASK	/;"	d
CCM_ANALOG_PLL_ENET_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_LOCK_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK	/;"	d
CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_PLL_ENET_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_PLL_ENET_OVERRIDE_MASK	/;"	d
CCM_ANALOG_PLL_ENET_PLL_ENET_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_PLL_ENET_OVERRIDE_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_POWERDOWN_MASK	/;"	d
CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT	/;"	d
CCM_ANALOG_PLL_ENET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_RSVD1_MASK	/;"	d
CCM_ANALOG_PLL_ENET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_ENET_RSVD1_SHIFT	/;"	d
CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_PLL_VIDEO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_PLL_VIDEO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_PLL_VIDEO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_PLL_VIDEO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_RSVD1(/;"	d
CCM_ANALOG_PLL_VIDEO_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_CLR_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_CLR_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_CLR_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_DENOM_B	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DENOM_B(/;"	d
CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_DENOM_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DENOM_RSVD0(/;"	d
CCM_ANALOG_PLL_VIDEO_DENOM_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DENOM_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_DENOM_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DENOM_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_LOCK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_NUM_A	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_NUM_A(/;"	d
CCM_ANALOG_PLL_VIDEO_NUM_A_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_NUM_A_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_NUM_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_NUM_RSVD0(/;"	d
CCM_ANALOG_PLL_VIDEO_NUM_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_NUM_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_NUM_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_NUM_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_PLL_VIDEO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_PLL_VIDEO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_PLL_VIDEO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_PLL_VIDEO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_VIDEO_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_RSVD1(/;"	d
CCM_ANALOG_PLL_VIDEO_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_PLL_VIDEO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_PLL_VIDEO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_PLL_VIDEO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_PLL_VIDEO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_RSVD1(/;"	d
CCM_ANALOG_PLL_VIDEO_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SET_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_SET_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SET_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SET_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SS_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SS_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SS_STEP	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_STEP(/;"	d
CCM_ANALOG_PLL_VIDEO_SS_STEP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_STEP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SS_STEP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_STEP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_SS_STOP	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_STOP(/;"	d
CCM_ANALOG_PLL_VIDEO_SS_STOP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_STOP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_SS_STOP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_SS_STOP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TEST_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC(/;"	d
CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DITHER_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DITHER_ENABLE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DITHER_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DITHER_ENABLE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_DOUBLE_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_CLK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_CLK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_CLK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_CLK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_HALF_CP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_HALF_CP_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_HALF_CP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_HALF_CP_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_HALF_LF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_HALF_LF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_HALF_LF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_HALF_LF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_HOLD_RING_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_HOLD_RING_OFF_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_HOLD_RING_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_HOLD_RING_OFF_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_PLL_VIDEO_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_PLL_VIDEO_OVERRIDE_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_PLL_VIDEO_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_PLL_VIDEO_OVERRIDE_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SEL(/;"	d
CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SEL_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SEL_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_RSVD0_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_RSVD0_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_RSVD1(/;"	d
CCM_ANALOG_PLL_VIDEO_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_RSVD1_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_RSVD1_SHIFT /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_TEST_DIV_SELECT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_TEST_DIV_SELECT(/;"	d
CCM_ANALOG_PLL_VIDEO_TOG_TEST_DIV_SELECT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_TEST_DIV_SELECT_MASK /;"	d
CCM_ANALOG_PLL_VIDEO_TOG_TEST_DIV_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ANALOG_PLL_VIDEO_TOG_TEST_DIV_SELECT_SHIFT /;"	d
CCM_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_BASE	/;"	d
CCM_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CCM_BASE_ADDR /;"	d
CCM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CCM_BASE_ADDR	/;"	d
CCM_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CCM_BASE_ADDR /;"	d
CCM_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CCM_BASE_ADDR /;"	d
CCM_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CCM_BASE_ADDR	/;"	d
CCM_BUS_CHANNEL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCM_BUS_CHANNEL,$/;"	e	enum:clk_root_type
CCM_CACRR_ARM_CLK_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_ARM_CLK_DIV(/;"	d
CCM_CACRR_ARM_CLK_DIV_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_ARM_CLK_DIV_MASK	/;"	d
CCM_CACRR_ARM_CLK_DIV_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_ARM_CLK_DIV_OFFSET	/;"	d
CCM_CACRR_BUS_CLK_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_BUS_CLK_DIV(/;"	d
CCM_CACRR_BUS_CLK_DIV_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_BUS_CLK_DIV_MASK	/;"	d
CCM_CACRR_BUS_CLK_DIV_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_BUS_CLK_DIV_OFFSET	/;"	d
CCM_CACRR_IPG_CLK_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_IPG_CLK_DIV(/;"	d
CCM_CACRR_IPG_CLK_DIV_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_IPG_CLK_DIV_MASK	/;"	d
CCM_CACRR_IPG_CLK_DIV_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CACRR_IPG_CLK_DIV_OFFSET	/;"	d
CCM_CCGR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_CCGR(/;"	d
CCM_CCGR0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR0	/;"	d
CCM_CCGR0_DSPI0_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR0_DSPI0_CTRL_MASK	/;"	d
CCM_CCGR0_DSPI1_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR0_DSPI1_CTRL_MASK	/;"	d
CCM_CCGR0_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define	CCM_CCGR0_OFFSET	/;"	d
CCM_CCGR0_UART0_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR0_UART0_CTRL_MASK /;"	d
CCM_CCGR0_UART1_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR0_UART1_CTRL_MASK	/;"	d
CCM_CCGR1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR1	/;"	d
CCM_CCGR10_I2C2_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR10_I2C2_CTRL_MASK	/;"	d
CCM_CCGR10_I2C3_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR10_I2C3_CTRL_MASK	/;"	d
CCM_CCGR10_NFC_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR10_NFC_CTRL_MASK	/;"	d
CCM_CCGR1_PIT_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR1_PIT_CTRL_MASK	/;"	d
CCM_CCGR1_USBC0_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR1_USBC0_CTRL_MASK /;"	d
CCM_CCGR1_WDOGA5_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR1_WDOGA5_CTRL_MASK	/;"	d
CCM_CCGR2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR2	/;"	d
CCM_CCGR2_IOMUXC_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_IOMUXC_CTRL_MASK	/;"	d
CCM_CCGR2_PORTA_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_PORTA_CTRL_MASK	/;"	d
CCM_CCGR2_PORTB_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_PORTB_CTRL_MASK	/;"	d
CCM_CCGR2_PORTC_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_PORTC_CTRL_MASK	/;"	d
CCM_CCGR2_PORTD_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_PORTD_CTRL_MASK	/;"	d
CCM_CCGR2_PORTE_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_PORTE_CTRL_MASK	/;"	d
CCM_CCGR2_QSPI0_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR2_QSPI0_CTRL_MASK	/;"	d
CCM_CCGR3	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR3	/;"	d
CCM_CCGR3_ANADIG_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR3_ANADIG_CTRL_MASK	/;"	d
CCM_CCGR3_SCSC_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR3_SCSC_CTRL_MASK /;"	d
CCM_CCGR4	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR4	/;"	d
CCM_CCGR4_CCM_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR4_CCM_CTRL_MASK	/;"	d
CCM_CCGR4_GPC_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR4_GPC_CTRL_MASK	/;"	d
CCM_CCGR4_I2C0_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR4_I2C0_CTRL_MASK	/;"	d
CCM_CCGR4_I2C1_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR4_I2C1_CTRL_MASK	/;"	d
CCM_CCGR4_WKUP_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR4_WKUP_CTRL_MASK	/;"	d
CCM_CCGR5	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR5	/;"	d
CCM_CCGR6	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCGR6	/;"	d
CCM_CCGR6_DDRMC_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR6_DDRMC_CTRL_MASK	/;"	d
CCM_CCGR6_DSPI2_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR6_DSPI2_CTRL_MASK	/;"	d
CCM_CCGR6_DSPI3_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR6_DSPI3_CTRL_MASK	/;"	d
CCM_CCGR6_OCOTP_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR6_OCOTP_CTRL_MASK	/;"	d
CCM_CCGR7_SDHC1_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR7_SDHC1_CTRL_MASK	/;"	d
CCM_CCGR7_USBC1_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR7_USBC1_CTRL_MASK /;"	d
CCM_CCGR9_FEC0_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR9_FEC0_CTRL_MASK	/;"	d
CCM_CCGR9_FEC1_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCGR9_FEC1_CTRL_MASK	/;"	d
CCM_CCGR_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_CCGR_CLR(/;"	d
CCM_CCGR_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_CCGR_SET(/;"	d
CCM_CCGR_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_CCGR_TOGGLE(/;"	d
CCM_CCI400_CLK_SEL_HSIC	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_CCI400_CLK_SEL_HSIC	/;"	d
CCM_CCI400_CLK_SEL_HSIC	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_CCI400_CLK_SEL_HSIC	/;"	d
CCM_CCMR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_CCMR	/;"	d
CCM_CCMR_CONFIG	board/CarMediaLab/flea3/flea3.c	/^#define CCM_CCMR_CONFIG	/;"	d	file:
CCM_CCMR_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define CCM_CCMR_CONFIG	/;"	d
CCM_CCMR_CONFIG	board/woodburn/woodburn.c	/^#define CCM_CCMR_CONFIG	/;"	d	file:
CCM_CCMR_SETUP	include/configs/mx31pdk.h	/^#define CCM_CCMR_SETUP	/;"	d
CCM_CCOSR	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CCM_CCOSR	/;"	d
CCM_CCR_256_FBCONFIG	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG(/;"	d
CCM_CCR_256_FBCONFIG_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_MASK	/;"	d
CCM_CCR_256_FBCONFIG_M_16	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_M_16	/;"	d
CCM_CCR_256_FBCONFIG_M_32	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_M_32	/;"	d
CCM_CCR_256_FBCONFIG_M_8	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_M_8	/;"	d
CCM_CCR_256_FBCONFIG_NM_16	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_NM_16	/;"	d
CCM_CCR_256_FBCONFIG_NM_32	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_NM_32	/;"	d
CCM_CCR_256_FBCONFIG_NM_8	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_FBCONFIG_NM_8	/;"	d
CCM_CCR_256_OSCMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_OSCMODE	/;"	d
CCM_CCR_256_PLLMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMODE	/;"	d
CCM_CCR_256_PLLMULT3	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3(/;"	d
CCM_CCR_256_PLLMULT3_10X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_10X	/;"	d
CCM_CCR_256_PLLMULT3_12X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_12X	/;"	d
CCM_CCR_256_PLLMULT3_16X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_16X	/;"	d
CCM_CCR_256_PLLMULT3_18X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_18X	/;"	d
CCM_CCR_256_PLLMULT3_20X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_20X	/;"	d
CCM_CCR_256_PLLMULT3_24X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_24X	/;"	d
CCM_CCR_256_PLLMULT3_6X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_6X	/;"	d
CCM_CCR_256_PLLMULT3_8X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_8X	/;"	d
CCM_CCR_256_PLLMULT3_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_256_PLLMULT3_MASK	/;"	d
CCM_CCR_360_FBCONFIG	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG(/;"	d
CCM_CCR_360_FBCONFIG_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_MASK	/;"	d
CCM_CCR_360_FBCONFIG_M_NP_16	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_M_NP_16	/;"	d
CCM_CCR_360_FBCONFIG_M_NP_32	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_M_NP_32	/;"	d
CCM_CCR_360_FBCONFIG_M_NP_8	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_M_NP_8	/;"	d
CCM_CCR_360_FBCONFIG_M_P_16	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_M_P_16	/;"	d
CCM_CCR_360_FBCONFIG_M_P_8	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_M_P_8	/;"	d
CCM_CCR_360_FBCONFIG_NM_NP_16	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_NM_NP_16	/;"	d
CCM_CCR_360_FBCONFIG_NM_NP_32	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_NM_NP_32	/;"	d
CCM_CCR_360_FBCONFIG_NM_NP_8	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_FBCONFIG_NM_NP_8	/;"	d
CCM_CCR_360_OSCMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_OSCMODE	/;"	d
CCM_CCR_360_PCIMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PCIMODE	/;"	d
CCM_CCR_360_PCISLEW	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PCISLEW	/;"	d
CCM_CCR_360_PLLMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMODE	/;"	d
CCM_CCR_360_PLLMULT2	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT2(/;"	d
CCM_CCR_360_PLLMULT2_12X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT2_12X	/;"	d
CCM_CCR_360_PLLMULT2_16X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT2_16X	/;"	d
CCM_CCR_360_PLLMULT2_6X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT2_6X	/;"	d
CCM_CCR_360_PLLMULT2_8X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT2_8X	/;"	d
CCM_CCR_360_PLLMULT2_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT2_MASK	/;"	d
CCM_CCR_360_PLLMULT3	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3(/;"	d
CCM_CCR_360_PLLMULT3_10X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_10X	/;"	d
CCM_CCR_360_PLLMULT3_12X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_12X	/;"	d
CCM_CCR_360_PLLMULT3_16X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_16X	/;"	d
CCM_CCR_360_PLLMULT3_18X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_18X	/;"	d
CCM_CCR_360_PLLMULT3_20X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_20X	/;"	d
CCM_CCR_360_PLLMULT3_24X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_24X	/;"	d
CCM_CCR_360_PLLMULT3_6X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_6X	/;"	d
CCM_CCR_360_PLLMULT3_8X	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_8X	/;"	d
CCM_CCR_360_PLLMULT3_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CCR_360_PLLMULT3_MASK	/;"	d
CCM_CCR_ALESEL	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_ALESEL	/;"	d
CCM_CCR_BME	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BME	/;"	d
CCM_CCR_BMT	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT(/;"	d
CCM_CCR_BMT_16K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_16K	/;"	d
CCM_CCR_BMT_1K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_1K	/;"	d
CCM_CCR_BMT_2K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_2K	/;"	d
CCM_CCR_BMT_32K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_32K	/;"	d
CCM_CCR_BMT_4K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_4K	/;"	d
CCM_CCR_BMT_512	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_512	/;"	d
CCM_CCR_BMT_64K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_64K	/;"	d
CCM_CCR_BMT_8K	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_8K	/;"	d
CCM_CCR_BMT_MASK	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_BMT_MASK	/;"	d
CCM_CCR_BOOTMEM	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTMEM	/;"	d
CCM_CCR_BOOTMOD	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTMOD	/;"	d
CCM_CCR_BOOTPS	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_BOOTPS(/;"	d
CCM_CCR_BOOTPS	arch/m68k/include/asm/m5301x.h	/^#define CCM_CCR_BOOTPS	/;"	d
CCM_CCR_BOOTPS	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_BOOTPS(/;"	d
CCM_CCR_BOOTPS	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTPS	/;"	d
CCM_CCR_BOOTPS_	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTPS_	/;"	d
CCM_CCR_BOOTPS_16	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTPS_16	/;"	d
CCM_CCR_BOOTPS_32	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTPS_32	/;"	d
CCM_CCR_BOOTPS_8	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_BOOTPS_8	/;"	d
CCM_CCR_BOOTPS_PS16	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_BOOTPS_PS16	/;"	d
CCM_CCR_BOOTPS_PS32	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_BOOTPS_PS32	/;"	d
CCM_CCR_BOOTPS_PS8	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_BOOTPS_PS8	/;"	d
CCM_CCR_BOOTPS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_BOOTPS_UNMASK	/;"	d
CCM_CCR_CSC	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_CSC	/;"	d
CCM_CCR_CSC	arch/m68k/include/asm/m5301x.h	/^#define CCM_CCR_CSC	/;"	d
CCM_CCR_CSC	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_CSC(/;"	d
CCM_CCR_CSC_FBCS5_A22	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_CSC_FBCS5_A22	/;"	d
CCM_CCR_CSC_FBCS5_CS4	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_CSC_FBCS5_CS4	/;"	d
CCM_CCR_CSC_FB_A23_A22	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_CSC_FB_A23_A22	/;"	d
CCM_CCR_CSC_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_CSC_UNMASK	/;"	d
CCM_CCR_DRAMSEL	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_DRAMSEL	/;"	d
CCM_CCR_FIRC_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCR_FIRC_EN	/;"	d
CCM_CCR_LIMP	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_LIMP	/;"	d
CCM_CCR_LIMP	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_LIMP	/;"	d
CCM_CCR_LIMP	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_LIMP	/;"	d
CCM_CCR_LOAD	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_LOAD	/;"	d
CCM_CCR_LOAD	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_LOAD	/;"	d
CCM_CCR_LOAD	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_LOAD	/;"	d
CCM_CCR_LOAD	arch/m68k/include/asm/m5301x.h	/^#define CCM_CCR_LOAD	/;"	d
CCM_CCR_LOAD	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_LOAD	/;"	d
CCM_CCR_OSCFREQ	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_OSCFREQ	/;"	d
CCM_CCR_OSCMOD	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_OSCMOD	/;"	d
CCM_CCR_OSCMODE_OSCBYPASS	arch/m68k/include/asm/m5227x.h	/^#define CCM_CCR_OSCMODE_OSCBYPASS	/;"	d
CCM_CCR_OSCNT	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCR_OSCNT(/;"	d
CCM_CCR_OSCNT_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCR_OSCNT_MASK	/;"	d
CCM_CCR_OSC_MODE	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_OSC_MODE	/;"	d
CCM_CCR_OSC_MODE	arch/m68k/include/asm/m5301x.h	/^#define CCM_CCR_OSC_MODE	/;"	d
CCM_CCR_OSC_MODE	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_OSC_MODE	/;"	d
CCM_CCR_PLLMOD	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_PLLMOD	/;"	d
CCM_CCR_PLLMULT	arch/m68k/include/asm/m5441x.h	/^#define CCM_CCR_PLLMULT	/;"	d
CCM_CCR_PLL_MODE	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_PLL_MODE	/;"	d
CCM_CCR_PLL_MODE	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_PLL_MODE	/;"	d
CCM_CCR_PSTEN	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_PSTEN	/;"	d
CCM_CCR_RESERVED	arch/m68k/include/asm/m520x.h	/^#define CCM_CCR_RESERVED	/;"	d
CCM_CCR_RESERVED	arch/m68k/include/asm/m5301x.h	/^#define CCM_CCR_RESERVED	/;"	d
CCM_CCR_RESERVED	arch/m68k/include/asm/m5329.h	/^#define CCM_CCR_RESERVED	/;"	d
CCM_CCR_SDR_MODE	arch/m68k/include/asm/m5301x.h	/^#define CCM_CCR_SDR_MODE	/;"	d
CCM_CCR_SZEN	arch/m68k/include/asm/m5235.h	/^#define CCM_CCR_SZEN	/;"	d
CCM_CCSR_DDRC_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_DDRC_CLK_SEL(/;"	d
CCM_CCSR_FAST_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_FAST_CLK_SEL(/;"	d
CCM_CCSR_PLL1_PFD1_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD1_EN	/;"	d
CCM_CCSR_PLL1_PFD2_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD2_EN	/;"	d
CCM_CCSR_PLL1_PFD3_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD3_EN	/;"	d
CCM_CCSR_PLL1_PFD4_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD4_EN	/;"	d
CCM_CCSR_PLL1_PFD_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD_CLK_SEL(/;"	d
CCM_CCSR_PLL1_PFD_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD_CLK_SEL_MASK	/;"	d
CCM_CCSR_PLL1_PFD_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL1_PFD_CLK_SEL_OFFSET	/;"	d
CCM_CCSR_PLL2_PFD1_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD1_EN	/;"	d
CCM_CCSR_PLL2_PFD2_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD2_EN	/;"	d
CCM_CCSR_PLL2_PFD3_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD3_EN	/;"	d
CCM_CCSR_PLL2_PFD4_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD4_EN	/;"	d
CCM_CCSR_PLL2_PFD_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD_CLK_SEL(/;"	d
CCM_CCSR_PLL2_PFD_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD_CLK_SEL_MASK	/;"	d
CCM_CCSR_PLL2_PFD_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_PLL2_PFD_CLK_SEL_OFFSET	/;"	d
CCM_CCSR_SYS_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_SYS_CLK_SEL(/;"	d
CCM_CCSR_SYS_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_SYS_CLK_SEL_MASK	/;"	d
CCM_CCSR_SYS_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CCSR_SYS_CLK_SEL_OFFSET	/;"	d
CCM_CCTL_AHB_DIV_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CCTL_AHB_DIV_MASK	/;"	d
CCM_CCTL_AHB_DIV_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CCTL_AHB_DIV_SHIFT	/;"	d
CCM_CCTL_ARM_DIV_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CCTL_ARM_DIV_MASK	/;"	d
CCM_CCTL_ARM_DIV_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CCTL_ARM_DIV_SHIFT	/;"	d
CCM_CCTL_ARM_SRC	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CCTL_ARM_SRC	/;"	d
CCM_CDRH_SSI0DIV	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDRH_SSI0DIV(/;"	d
CCM_CDRH_SSI0DIV_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDRH_SSI0DIV_MASK	/;"	d
CCM_CDRH_SSI1DIV	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDRH_SSI1DIV(/;"	d
CCM_CDRH_SSI1DIV_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDRH_SSI1DIV_MASK	/;"	d
CCM_CDRL_LPDIV	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDRL_LPDIV(/;"	d
CCM_CDRL_LPDIV_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDRL_LPDIV_MASK	/;"	d
CCM_CDR_LPDIV	arch/m68k/include/asm/m5227x.h	/^#define CCM_CDR_LPDIV(/;"	d
CCM_CDR_LPDIV	arch/m68k/include/asm/m5301x.h	/^#define CCM_CDR_LPDIV(/;"	d
CCM_CDR_LPDIV	arch/m68k/include/asm/m5329.h	/^#define CCM_CDR_LPDIV(/;"	d
CCM_CDR_LPDIV	arch/m68k/include/asm/m5441x.h	/^#define CCM_CDR_LPDIV(/;"	d
CCM_CDR_LPDIV	arch/m68k/include/asm/m5445x.h	/^#define CCM_CDR_LPDIV(/;"	d
CCM_CDR_SSIDIV	arch/m68k/include/asm/m5227x.h	/^#define CCM_CDR_SSIDIV(/;"	d
CCM_CDR_SSIDIV	arch/m68k/include/asm/m5301x.h	/^#define CCM_CDR_SSIDIV(/;"	d
CCM_CDR_SSIDIV	arch/m68k/include/asm/m5329.h	/^#define CCM_CDR_SSIDIV(/;"	d
CCM_CDR_SSIDIV	arch/m68k/include/asm/m5445x.h	/^#define CCM_CDR_SSIDIV(/;"	d
CCM_CDR_USBDIV	arch/m68k/include/asm/m5227x.h	/^#define CCM_CDR_USBDIV(/;"	d
CCM_CGR0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_CGR0	/;"	d
CCM_CGR1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_CGR1	/;"	d
CCM_CGR1_GPT1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CGR1_GPT1	/;"	d
CCM_CGR2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_CGR2	/;"	d
CCM_CIR_PIN	arch/m68k/include/asm/m520x.h	/^#define CCM_CIR_PIN(/;"	d
CCM_CIR_PIN	arch/m68k/include/asm/m5227x.h	/^#define CCM_CIR_PIN(/;"	d
CCM_CIR_PIN	arch/m68k/include/asm/m5235.h	/^#define CCM_CIR_PIN(/;"	d
CCM_CIR_PIN	arch/m68k/include/asm/m5301x.h	/^#define CCM_CIR_PIN(/;"	d
CCM_CIR_PIN	arch/m68k/include/asm/m5329.h	/^#define CCM_CIR_PIN(/;"	d
CCM_CIR_PIN	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN(/;"	d
CCM_CIR_PIN_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PIN_MASK	/;"	d
CCM_CIR_PIN_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MASK	/;"	d
CCM_CIR_PIN_MCF52277	arch/m68k/include/asm/m5227x.h	/^#define CCM_CIR_PIN_MCF52277	/;"	d
CCM_CIR_PIN_MCF54410	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PIN_MCF54410	/;"	d
CCM_CIR_PIN_MCF54415	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PIN_MCF54415	/;"	d
CCM_CIR_PIN_MCF54416	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PIN_MCF54416	/;"	d
CCM_CIR_PIN_MCF54417	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PIN_MCF54417	/;"	d
CCM_CIR_PIN_MCF54418	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PIN_MCF54418	/;"	d
CCM_CIR_PIN_MCF54450	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MCF54450	/;"	d
CCM_CIR_PIN_MCF54451	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MCF54451	/;"	d
CCM_CIR_PIN_MCF54452	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MCF54452	/;"	d
CCM_CIR_PIN_MCF54453	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MCF54453	/;"	d
CCM_CIR_PIN_MCF54454	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MCF54454	/;"	d
CCM_CIR_PIN_MCF54455	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PIN_MCF54455	/;"	d
CCM_CIR_PRN	arch/m68k/include/asm/m520x.h	/^#define CCM_CIR_PRN(/;"	d
CCM_CIR_PRN	arch/m68k/include/asm/m5227x.h	/^#define CCM_CIR_PRN(/;"	d
CCM_CIR_PRN	arch/m68k/include/asm/m5235.h	/^#define CCM_CIR_PRN(/;"	d
CCM_CIR_PRN	arch/m68k/include/asm/m5301x.h	/^#define CCM_CIR_PRN(/;"	d
CCM_CIR_PRN	arch/m68k/include/asm/m5329.h	/^#define CCM_CIR_PRN(/;"	d
CCM_CIR_PRN	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PRN(/;"	d
CCM_CIR_PRN_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_CIR_PRN_MASK	/;"	d
CCM_CIR_PRN_MASK	arch/m68k/include/asm/m5445x.h	/^#define CCM_CIR_PRN_MASK	/;"	d
CCM_CLK_ON_MSK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_CLK_ON_MSK	/;"	d
CCM_CODCR_BGREN	arch/m68k/include/asm/m5301x.h	/^#define CCM_CODCR_BGREN	/;"	d
CCM_CODCR_REGEN	arch/m68k/include/asm/m5301x.h	/^#define CCM_CODCR_REGEN	/;"	d
CCM_CORE_CHANNEL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCM_CORE_CHANNEL,$/;"	e	enum:clk_root_type
CCM_COSR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_COSR	/;"	d
CCM_CRDR_BT_UART_SRC_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CRDR_BT_UART_SRC_MASK	/;"	d
CCM_CRDR_BT_UART_SRC_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_CRDR_BT_UART_SRC_SHIFT	/;"	d
CCM_CSCDR1_RMII_CLK_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR1_RMII_CLK_EN	/;"	d
CCM_CSCDR2_ESDHC1_CLK_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_ESDHC1_CLK_DIV(/;"	d
CCM_CSCDR2_ESDHC1_CLK_DIV_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_ESDHC1_CLK_DIV_MASK	/;"	d
CCM_CSCDR2_ESDHC1_CLK_DIV_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_ESDHC1_CLK_DIV_OFFSET	/;"	d
CCM_CSCDR2_ESDHC1_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_ESDHC1_EN	/;"	d
CCM_CSCDR2_NFC_CLK_INV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_NFC_CLK_INV	/;"	d
CCM_CSCDR2_NFC_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_NFC_EN	/;"	d
CCM_CSCDR2_NFC_FRAC_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_NFC_FRAC_DIV(/;"	d
CCM_CSCDR2_NFC_FRAC_DIV_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_NFC_FRAC_DIV_EN	/;"	d
CCM_CSCDR2_NFC_FRAC_DIV_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_NFC_FRAC_DIV_MASK	/;"	d
CCM_CSCDR2_NFC_FRAC_DIV_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR2_NFC_FRAC_DIV_OFFSET	/;"	d
CCM_CSCDR3_NFC_PRE_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_NFC_PRE_DIV(/;"	d
CCM_CSCDR3_NFC_PRE_DIV_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_NFC_PRE_DIV_MASK	/;"	d
CCM_CSCDR3_NFC_PRE_DIV_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_NFC_PRE_DIV_OFFSET	/;"	d
CCM_CSCDR3_QSPI0_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_QSPI0_DIV(/;"	d
CCM_CSCDR3_QSPI0_EN	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_QSPI0_EN	/;"	d
CCM_CSCDR3_QSPI0_X2_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_QSPI0_X2_DIV(/;"	d
CCM_CSCDR3_QSPI0_X4_DIV	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCDR3_QSPI0_X4_DIV(/;"	d
CCM_CSCMR1_ESDHC1_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_ESDHC1_CLK_SEL(/;"	d
CCM_CSCMR1_ESDHC1_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_ESDHC1_CLK_SEL_MASK	/;"	d
CCM_CSCMR1_ESDHC1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_ESDHC1_CLK_SEL_OFFSET	/;"	d
CCM_CSCMR1_NFC_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_NFC_CLK_SEL(/;"	d
CCM_CSCMR1_NFC_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_NFC_CLK_SEL_MASK	/;"	d
CCM_CSCMR1_NFC_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_NFC_CLK_SEL_OFFSET	/;"	d
CCM_CSCMR1_QSPI0_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_QSPI0_CLK_SEL(/;"	d
CCM_CSCMR1_QSPI0_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_QSPI0_CLK_SEL_MASK	/;"	d
CCM_CSCMR1_QSPI0_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR1_QSPI0_CLK_SEL_OFFSET	/;"	d
CCM_CSCMR2_RMII_CLK_SEL	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR2_RMII_CLK_SEL(/;"	d
CCM_CSCMR2_RMII_CLK_SEL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR2_RMII_CLK_SEL_MASK	/;"	d
CCM_CSCMR2_RMII_CLK_SEL_OFFSET	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_CSCMR2_RMII_CLK_SEL_OFFSET	/;"	d
CCM_DE_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_GATE	/;"	d
CCM_DE_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_GATE	/;"	d
CCM_DE_CTRL_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_GATE	/;"	d
CCM_DE_CTRL_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_GATE	/;"	d
CCM_DE_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_M(/;"	d
CCM_DE_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_M(/;"	d
CCM_DE_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_M(/;"	d
CCM_DE_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_M(/;"	d
CCM_DE_CTRL_PLL10	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL10	/;"	d
CCM_DE_CTRL_PLL10	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL10	/;"	d
CCM_DE_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL3	/;"	d
CCM_DE_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL3	/;"	d
CCM_DE_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL3	/;"	d
CCM_DE_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL3	/;"	d
CCM_DE_CTRL_PLL5P	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL5P	/;"	d
CCM_DE_CTRL_PLL5P	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL5P	/;"	d
CCM_DE_CTRL_PLL6_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL6_2X	/;"	d
CCM_DE_CTRL_PLL6_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL6_2X	/;"	d
CCM_DE_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL7	/;"	d
CCM_DE_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL7	/;"	d
CCM_DE_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL7	/;"	d
CCM_DE_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL7	/;"	d
CCM_DE_CTRL_PLL8	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL8	/;"	d
CCM_DE_CTRL_PLL8	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL8	/;"	d
CCM_DE_CTRL_PLL9	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL9	/;"	d
CCM_DE_CTRL_PLL9	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL9	/;"	d
CCM_DE_CTRL_PLL_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL_MASK	/;"	d
CCM_DE_CTRL_PLL_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL_MASK	/;"	d
CCM_DE_CTRL_PLL_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_PLL_MASK	/;"	d
CCM_DE_CTRL_PLL_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DE_CTRL_PLL_MASK	/;"	d
CCM_DE_CTRL_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DE_CTRL_RST	/;"	d
CCM_DE_CTRL_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DE_CTRL_RST	/;"	d
CCM_DRAMCLK_CFG_DIV	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV(/;"	d
CCM_DRAMCLK_CFG_DIV	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV(/;"	d
CCM_DRAMCLK_CFG_DIV	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV(/;"	d
CCM_DRAMCLK_CFG_DIV	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV(/;"	d
CCM_DRAMCLK_CFG_DIV0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV0(/;"	d
CCM_DRAMCLK_CFG_DIV0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV0(/;"	d
CCM_DRAMCLK_CFG_DIV0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV0(/;"	d
CCM_DRAMCLK_CFG_DIV0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV0(/;"	d
CCM_DRAMCLK_CFG_DIV0_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV0_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV0_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV0_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV0_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV0_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV0_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV0_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_DIV_MASK	/;"	d
CCM_DRAMCLK_CFG_DIV_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_DIV_MASK	/;"	d
CCM_DRAMCLK_CFG_RST	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_RST	/;"	d
CCM_DRAMCLK_CFG_RST	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_RST	/;"	d
CCM_DRAMCLK_CFG_RST	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_RST	/;"	d
CCM_DRAMCLK_CFG_RST	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_RST	/;"	d
CCM_DRAMCLK_CFG_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_SRC_MASK	/;"	d
CCM_DRAMCLK_CFG_SRC_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_SRC_MASK	/;"	d
CCM_DRAMCLK_CFG_SRC_PLL5	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_SRC_PLL5	/;"	d
CCM_DRAMCLK_CFG_SRC_PLL5	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_SRC_PLL5	/;"	d
CCM_DRAMCLK_CFG_SRC_PLL6x2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_SRC_PLL6x2	/;"	d
CCM_DRAMCLK_CFG_SRC_PLL6x2	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_SRC_PLL6x2	/;"	d
CCM_DRAMCLK_CFG_UPD	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_UPD	/;"	d
CCM_DRAMCLK_CFG_UPD	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_UPD	/;"	d
CCM_DRAMCLK_CFG_UPD	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMCLK_CFG_UPD	/;"	d
CCM_DRAMCLK_CFG_UPD	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMCLK_CFG_UPD	/;"	d
CCM_DRAMPLL_CFG_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMPLL_CFG_SRC_MASK	/;"	d
CCM_DRAMPLL_CFG_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMPLL_CFG_SRC_MASK	/;"	d
CCM_DRAMPLL_CFG_SRC_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMPLL_CFG_SRC_MASK	/;"	d
CCM_DRAMPLL_CFG_SRC_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMPLL_CFG_SRC_MASK	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL11	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL11	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL11	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL11	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL11	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL11	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL11	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL11	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL5	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL5	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL5	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL5	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL5	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL5	/;"	d
CCM_DRAMPLL_CFG_SRC_PLL5	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAMPLL_CFG_SRC_PLL5	/;"	d
CCM_DRAM_CHANNEL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCM_DRAM_CHANNEL,$/;"	e	enum:clk_root_type
CCM_DRAM_CTRL_DCLK_OUT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DRAM_CTRL_DCLK_OUT /;"	d
CCM_DRAM_CTRL_DCLK_OUT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DRAM_CTRL_DCLK_OUT /;"	d
CCM_DRAM_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_BE1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_BE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE0	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE1	/;"	d
CCM_DRAM_GATE_OFFSET_DE_FE1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_DRAM_GATE_OFFSET_DE_FE1	/;"	d
CCM_DRAM_PHYM_CHANNEL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCM_DRAM_PHYM_CHANNEL,$/;"	e	enum:clk_root_type
CCM_FNACR_MCC	arch/m68k/include/asm/m5441x.h	/^#define CCM_FNACR_MCC(/;"	d
CCM_FNACR_MCC_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_FNACR_MCC_MASK	/;"	d
CCM_FNACR_PCR	arch/m68k/include/asm/m5441x.h	/^#define CCM_FNACR_PCR(/;"	d
CCM_FNACR_PCR_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_FNACR_PCR_MASK	/;"	d
CCM_GET_DIVIDER	arch/arm/cpu/arm1136/mx35/generic.c	/^#define CCM_GET_DIVIDER(/;"	d	file:
CCM_GMAC_CTRL_GPIT_MII	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_GPIT_MII /;"	d
CCM_GMAC_CTRL_GPIT_MII	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_GPIT_MII	/;"	d
CCM_GMAC_CTRL_GPIT_MII	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_GPIT_MII	/;"	d
CCM_GMAC_CTRL_GPIT_MII	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_GPIT_MII /;"	d
CCM_GMAC_CTRL_GPIT_MII	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_GPIT_MII	/;"	d
CCM_GMAC_CTRL_GPIT_MII	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_GPIT_MII	/;"	d
CCM_GMAC_CTRL_GPIT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_GPIT_RGMII /;"	d
CCM_GMAC_CTRL_GPIT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_GPIT_RGMII	/;"	d
CCM_GMAC_CTRL_GPIT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_GPIT_RGMII	/;"	d
CCM_GMAC_CTRL_GPIT_RGMII	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_GPIT_RGMII /;"	d
CCM_GMAC_CTRL_GPIT_RGMII	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_GPIT_RGMII	/;"	d
CCM_GMAC_CTRL_GPIT_RGMII	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_GPIT_RGMII	/;"	d
CCM_GMAC_CTRL_RX_CLK_DELAY	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_RX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_RX_CLK_DELAY	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_RX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_RX_CLK_DELAY	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_RX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_RX_CLK_DELAY	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_RX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_RX_CLK_DELAY	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_RX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_RX_CLK_DELAY	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_RX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_DELAY	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_DELAY	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_DELAY	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_DELAY	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_DELAY	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_DELAY	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_DELAY(/;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_MII	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_MII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_MII	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_MII	/;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_MII	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_MII	/;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_MII	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_MII /;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_MII	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_MII	/;"	d
CCM_GMAC_CTRL_TX_CLK_SRC_MII	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_GMAC_CTRL_TX_CLK_SRC_MII	/;"	d
CCM_GPR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_GPR(/;"	d
CCM_GPR0_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define	CCM_GPR0_OFFSET	/;"	d
CCM_GPR_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_GPR_CLR(/;"	d
CCM_GPR_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_GPR_SET(/;"	d
CCM_GPR_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_GPR_TOGGLE(/;"	d
CCM_GPS_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GPS_CTRL_GATE /;"	d
CCM_GPS_CTRL_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GPS_CTRL_GATE /;"	d
CCM_GPS_CTRL_RESET	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_GPS_CTRL_RESET /;"	d
CCM_GPS_CTRL_RESET	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_GPS_CTRL_RESET /;"	d
CCM_HDMI_CTRL_DDC_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_DDC_GATE	/;"	d
CCM_HDMI_CTRL_DDC_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_DDC_GATE	/;"	d
CCM_HDMI_CTRL_DDC_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_DDC_GATE	/;"	d
CCM_HDMI_CTRL_DDC_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_DDC_GATE	/;"	d
CCM_HDMI_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_GATE	/;"	d
CCM_HDMI_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_GATE	/;"	d
CCM_HDMI_CTRL_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_GATE	/;"	d
CCM_HDMI_CTRL_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_GATE	/;"	d
CCM_HDMI_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_M(/;"	d
CCM_HDMI_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_M(/;"	d
CCM_HDMI_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_M(/;"	d
CCM_HDMI_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_M(/;"	d
CCM_HDMI_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_M_MASK	/;"	d
CCM_HDMI_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_M_MASK	/;"	d
CCM_HDMI_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL3	/;"	d
CCM_HDMI_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL3	/;"	d
CCM_HDMI_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL3	/;"	d
CCM_HDMI_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL3	/;"	d
CCM_HDMI_CTRL_PLL3_2X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL3_2X	/;"	d
CCM_HDMI_CTRL_PLL3_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL3_2X	/;"	d
CCM_HDMI_CTRL_PLL3_2X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL3_2X	/;"	d
CCM_HDMI_CTRL_PLL3_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL3_2X	/;"	d
CCM_HDMI_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL7	/;"	d
CCM_HDMI_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL7	/;"	d
CCM_HDMI_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL7	/;"	d
CCM_HDMI_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL7	/;"	d
CCM_HDMI_CTRL_PLL7_2X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL7_2X	/;"	d
CCM_HDMI_CTRL_PLL7_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL7_2X	/;"	d
CCM_HDMI_CTRL_PLL7_2X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL7_2X	/;"	d
CCM_HDMI_CTRL_PLL7_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL7_2X	/;"	d
CCM_HDMI_CTRL_PLL_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL_MASK	/;"	d
CCM_HDMI_CTRL_PLL_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL_MASK	/;"	d
CCM_HDMI_CTRL_PLL_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_HDMI_CTRL_PLL_MASK	/;"	d
CCM_HDMI_CTRL_PLL_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_CTRL_PLL_MASK	/;"	d
CCM_HDMI_SLOW_CTRL_DDC_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_HDMI_SLOW_CTRL_DDC_GATE	/;"	d
CCM_HDMI_SLOW_CTRL_DDC_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_HDMI_SLOW_CTRL_DDC_GATE	/;"	d
CCM_IP_CHANNEL	arch/arm/include/asm/arch-mx7/clock.h	/^	CCM_IP_CHANNEL,$/;"	e	enum:clk_root_type
CCM_LCD_CH0_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_GATE	/;"	d
CCM_LCD_CH0_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_GATE	/;"	d
CCM_LCD_CH0_CTRL_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_GATE	/;"	d
CCM_LCD_CH0_CTRL_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_GATE	/;"	d
CCM_LCD_CH0_CTRL_MIPI_PLL	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_MIPI_PLL	/;"	d
CCM_LCD_CH0_CTRL_MIPI_PLL	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_MIPI_PLL	/;"	d
CCM_LCD_CH0_CTRL_MIPI_PLL	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_MIPI_PLL	/;"	d
CCM_LCD_CH0_CTRL_MIPI_PLL	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_MIPI_PLL	/;"	d
CCM_LCD_CH0_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL3	/;"	d
CCM_LCD_CH0_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL3	/;"	d
CCM_LCD_CH0_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL3	/;"	d
CCM_LCD_CH0_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL3	/;"	d
CCM_LCD_CH0_CTRL_PLL3_2X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL3_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL3_2X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL3_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL7	/;"	d
CCM_LCD_CH0_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL7	/;"	d
CCM_LCD_CH0_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL7	/;"	d
CCM_LCD_CH0_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL7	/;"	d
CCM_LCD_CH0_CTRL_PLL7_2X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL7_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL7_2X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH0_CTRL_PLL7_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH0_CTRL_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_RST	/;"	d
CCM_LCD_CH0_CTRL_RST	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_RST	/;"	d
CCM_LCD_CH0_CTRL_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_RST	/;"	d
CCM_LCD_CH0_CTRL_RST	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH0_CTRL_RST	/;"	d
CCM_LCD_CH0_CTRL_TVE_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_TVE_RST	/;"	d
CCM_LCD_CH0_CTRL_TVE_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH0_CTRL_TVE_RST	/;"	d
CCM_LCD_CH1_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_GATE	/;"	d
CCM_LCD_CH1_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_GATE	/;"	d
CCM_LCD_CH1_CTRL_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_GATE	/;"	d
CCM_LCD_CH1_CTRL_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_GATE	/;"	d
CCM_LCD_CH1_CTRL_HALF_SCLK1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_HALF_SCLK1	/;"	d
CCM_LCD_CH1_CTRL_HALF_SCLK1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_HALF_SCLK1	/;"	d
CCM_LCD_CH1_CTRL_HALF_SCLK1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_HALF_SCLK1	/;"	d
CCM_LCD_CH1_CTRL_HALF_SCLK1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_HALF_SCLK1	/;"	d
CCM_LCD_CH1_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_M(/;"	d
CCM_LCD_CH1_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_M(/;"	d
CCM_LCD_CH1_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_M(/;"	d
CCM_LCD_CH1_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_M(/;"	d
CCM_LCD_CH1_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL3	/;"	d
CCM_LCD_CH1_CTRL_PLL3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL3	/;"	d
CCM_LCD_CH1_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL3	/;"	d
CCM_LCD_CH1_CTRL_PLL3	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL3	/;"	d
CCM_LCD_CH1_CTRL_PLL3_2X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL3_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL3_2X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL3_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL3_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL7	/;"	d
CCM_LCD_CH1_CTRL_PLL7	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL7	/;"	d
CCM_LCD_CH1_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL7	/;"	d
CCM_LCD_CH1_CTRL_PLL7	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL7	/;"	d
CCM_LCD_CH1_CTRL_PLL7_2X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL7_2X	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL7_2X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LCD_CH1_CTRL_PLL7_2X	/;"	d
CCM_LCD_CH1_CTRL_PLL7_2X	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_LCD_CH1_CTRL_PLL7_2X	/;"	d
CCM_LVDS_CTRL_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_LVDS_CTRL_RST	/;"	d
CCM_LVDS_CTRL_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_LVDS_CTRL_RST	/;"	d
CCM_MBUS_CTRL_CLK_SRC	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC(/;"	d
CCM_MBUS_CTRL_CLK_SRC	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC(/;"	d
CCM_MBUS_CTRL_CLK_SRC_HOSC	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_HOSC /;"	d
CCM_MBUS_CTRL_CLK_SRC_HOSC	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_HOSC /;"	d
CCM_MBUS_CTRL_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_MASK /;"	d
CCM_MBUS_CTRL_CLK_SRC_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_MASK /;"	d
CCM_MBUS_CTRL_CLK_SRC_PLL5	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_PLL5 /;"	d
CCM_MBUS_CTRL_CLK_SRC_PLL5	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_PLL5 /;"	d
CCM_MBUS_CTRL_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_PLL6 /;"	d
CCM_MBUS_CTRL_CLK_SRC_PLL6	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_CLK_SRC_PLL6 /;"	d
CCM_MBUS_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_GATE /;"	d
CCM_MBUS_CTRL_GATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_GATE /;"	d
CCM_MBUS_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_M(/;"	d
CCM_MBUS_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_M(/;"	d
CCM_MBUS_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_M_MASK /;"	d
CCM_MBUS_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_M_MASK /;"	d
CCM_MBUS_CTRL_M_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_M_X(/;"	d
CCM_MBUS_CTRL_M_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_M_X(/;"	d
CCM_MBUS_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_N(/;"	d
CCM_MBUS_CTRL_N	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_N(/;"	d
CCM_MBUS_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_N_MASK /;"	d
CCM_MBUS_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_N_MASK /;"	d
CCM_MBUS_CTRL_N_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MBUS_CTRL_N_X(/;"	d
CCM_MBUS_CTRL_N_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MBUS_CTRL_N_X(/;"	d
CCM_MBUS_RESET_RESET	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MBUS_RESET_RESET	/;"	d
CCM_MBUS_RESET_RESET	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MBUS_RESET_RESET	/;"	d
CCM_MBUS_RESET_RESET	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MBUS_RESET_RESET	/;"	d
CCM_MBUS_RESET_RESET	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MBUS_RESET_RESET	/;"	d
CCM_MIPI_PLL_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_EN	/;"	d
CCM_MIPI_PLL_CTRL_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_EN	/;"	d
CCM_MIPI_PLL_CTRL_K	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_K(/;"	d
CCM_MIPI_PLL_CTRL_K	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_K(/;"	d
CCM_MIPI_PLL_CTRL_K_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_K_MASK	/;"	d
CCM_MIPI_PLL_CTRL_K_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_K_MASK	/;"	d
CCM_MIPI_PLL_CTRL_K_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_K_SHIFT	/;"	d
CCM_MIPI_PLL_CTRL_K_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_K_SHIFT	/;"	d
CCM_MIPI_PLL_CTRL_LDO_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_LDO_EN	/;"	d
CCM_MIPI_PLL_CTRL_LDO_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_LDO_EN	/;"	d
CCM_MIPI_PLL_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_M(/;"	d
CCM_MIPI_PLL_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_M(/;"	d
CCM_MIPI_PLL_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_M_MASK	/;"	d
CCM_MIPI_PLL_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_M_MASK	/;"	d
CCM_MIPI_PLL_CTRL_M_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_M_SHIFT	/;"	d
CCM_MIPI_PLL_CTRL_M_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_M_SHIFT	/;"	d
CCM_MIPI_PLL_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_N(/;"	d
CCM_MIPI_PLL_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_N(/;"	d
CCM_MIPI_PLL_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_N_MASK	/;"	d
CCM_MIPI_PLL_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_N_MASK	/;"	d
CCM_MIPI_PLL_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_N_SHIFT	/;"	d
CCM_MIPI_PLL_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MIPI_PLL_CTRL_N_SHIFT	/;"	d
CCM_MISC2_DPS	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISC2_DPS	/;"	d
CCM_MISC2_IGNLL	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISC2_IGNLL	/;"	d
CCM_MISCCR2_ADC3SEL	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_ADC3SEL	/;"	d
CCM_MISCCR2_ADC7SEL	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_ADC7SEL	/;"	d
CCM_MISCCR2_ADCEN	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_ADCEN	/;"	d
CCM_MISCCR2_DAC0SEL	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_DAC0SEL	/;"	d
CCM_MISCCR2_DAC1SEL	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_DAC1SEL	/;"	d
CCM_MISCCR2_DCCBYP	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_DCCBYP	/;"	d
CCM_MISCCR2_DDR2CLK	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_DDR2CLK	/;"	d
CCM_MISCCR2_EXTCLKBYP	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_EXTCLKBYP	/;"	d
CCM_MISCCR2_FBHALF	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_FBHALF	/;"	d
CCM_MISCCR2_PLLMODE	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_PLLMODE(/;"	d
CCM_MISCCR2_PLLMODE_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_PLLMODE_MASK	/;"	d
CCM_MISCCR2_RGPIO_HALF	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_RGPIO_HALF	/;"	d
CCM_MISCCR2_SWTSCR	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_SWTSCR	/;"	d
CCM_MISCCR2_ULPI	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR2_ULPI	/;"	d
CCM_MISCCR3_ENETCLK	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK(/;"	d
CCM_MISCCR3_ENETCLK_INTBUS	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_INTBUS	/;"	d
CCM_MISCCR3_ENETCLK_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_MASK	/;"	d
CCM_MISCCR3_ENETCLK_MII	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_MII	/;"	d
CCM_MISCCR3_ENETCLK_OSC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_OSC	/;"	d
CCM_MISCCR3_ENETCLK_TMR0	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_TMR0	/;"	d
CCM_MISCCR3_ENETCLK_TMR1	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_TMR1	/;"	d
CCM_MISCCR3_ENETCLK_TMR2	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_TMR2	/;"	d
CCM_MISCCR3_ENETCLK_TMR3	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_TMR3	/;"	d
CCM_MISCCR3_ENETCLK_USB	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_ENETCLK_USB	/;"	d
CCM_MISCCR3_TMR_ENET	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR3_TMR_ENET	/;"	d
CCM_MISCCR_BME	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BME	/;"	d
CCM_MISCCR_BME	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BME	/;"	d
CCM_MISCCR_BME	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BME	/;"	d
CCM_MISCCR_BME	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BME	/;"	d
CCM_MISCCR_BMT	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT(/;"	d
CCM_MISCCR_BMT	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT(/;"	d
CCM_MISCCR_BMT	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT(/;"	d
CCM_MISCCR_BMT_1024	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_1024	/;"	d
CCM_MISCCR_BMT_1024	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_1024	/;"	d
CCM_MISCCR_BMT_1024	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_1024	/;"	d
CCM_MISCCR_BMT_1024	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_1024	/;"	d
CCM_MISCCR_BMT_16384	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_16384	/;"	d
CCM_MISCCR_BMT_16384	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_16384	/;"	d
CCM_MISCCR_BMT_16384	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_16384	/;"	d
CCM_MISCCR_BMT_16384	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_16384	/;"	d
CCM_MISCCR_BMT_2048	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_2048	/;"	d
CCM_MISCCR_BMT_2048	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_2048	/;"	d
CCM_MISCCR_BMT_2048	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_2048	/;"	d
CCM_MISCCR_BMT_2048	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_2048	/;"	d
CCM_MISCCR_BMT_32768	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_32768	/;"	d
CCM_MISCCR_BMT_32768	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_32768	/;"	d
CCM_MISCCR_BMT_32768	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_32768	/;"	d
CCM_MISCCR_BMT_32768	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_32768	/;"	d
CCM_MISCCR_BMT_4096	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_4096	/;"	d
CCM_MISCCR_BMT_4096	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_4096	/;"	d
CCM_MISCCR_BMT_4096	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_4096	/;"	d
CCM_MISCCR_BMT_4096	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_4096	/;"	d
CCM_MISCCR_BMT_512	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_512	/;"	d
CCM_MISCCR_BMT_512	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_512	/;"	d
CCM_MISCCR_BMT_512	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_512	/;"	d
CCM_MISCCR_BMT_512	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_512	/;"	d
CCM_MISCCR_BMT_65536	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_65536	/;"	d
CCM_MISCCR_BMT_65536	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_65536	/;"	d
CCM_MISCCR_BMT_65536	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_65536	/;"	d
CCM_MISCCR_BMT_65536	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_65536	/;"	d
CCM_MISCCR_BMT_8192	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_BMT_8192	/;"	d
CCM_MISCCR_BMT_8192	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_8192	/;"	d
CCM_MISCCR_BMT_8192	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_BMT_8192	/;"	d
CCM_MISCCR_BMT_8192	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_BMT_8192	/;"	d
CCM_MISCCR_BMT_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_BMT_UNMASK	/;"	d
CCM_MISCCR_CDCSRC	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_CDCSRC	/;"	d
CCM_MISCCR_FECM	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_FECM	/;"	d
CCM_MISCCR_LCDCHEN	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_LCDCHEN	/;"	d
CCM_MISCCR_LCD_CHEN	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_LCD_CHEN	/;"	d
CCM_MISCCR_LIMP	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_LIMP	/;"	d
CCM_MISCCR_LIMP	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_LIMP	/;"	d
CCM_MISCCR_LIMP	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_LIMP	/;"	d
CCM_MISCCR_LIMP	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_LIMP	/;"	d
CCM_MISCCR_LIMP	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_LIMP	/;"	d
CCM_MISCCR_PLL_LOCK	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_PLL_LOCK	/;"	d
CCM_MISCCR_PLL_LOCK	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_PLL_LOCK	/;"	d
CCM_MISCCR_PWM_EXTCLK	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_PWM_EXTCLK(/;"	d
CCM_MISCCR_PWM_EXTCLK_MASK	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_PWM_EXTCLK_MASK	/;"	d
CCM_MISCCR_PWM_EXTCLK_TMR0	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_PWM_EXTCLK_TMR0	/;"	d
CCM_MISCCR_PWM_EXTCLK_TMR1	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_PWM_EXTCLK_TMR1	/;"	d
CCM_MISCCR_PWM_EXTCLK_TMR2	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_PWM_EXTCLK_TMR2	/;"	d
CCM_MISCCR_PWM_EXTCLK_TMR3	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_PWM_EXTCLK_TMR3	/;"	d
CCM_MISCCR_RTCSRC	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_RTCSRC	/;"	d
CCM_MISCCR_SDHCSRC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_SDHCSRC	/;"	d
CCM_MISCCR_SSI0SRC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_SSI0SRC	/;"	d
CCM_MISCCR_SSI1SRC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_SSI1SRC	/;"	d
CCM_MISCCR_SSIPUE	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_SSIPUE	/;"	d
CCM_MISCCR_SSIPUE	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSIPUE	/;"	d
CCM_MISCCR_SSIPUS	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_SSIPUS	/;"	d
CCM_MISCCR_SSIPUS	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSIPUS	/;"	d
CCM_MISCCR_SSIPUS_DOWN	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSIPUS_DOWN	/;"	d
CCM_MISCCR_SSIPUS_UP	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSIPUS_UP	/;"	d
CCM_MISCCR_SSISRC	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_SSISRC	/;"	d
CCM_MISCCR_SSISRC	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSISRC	/;"	d
CCM_MISCCR_SSISRC_CLKIN	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSISRC_CLKIN	/;"	d
CCM_MISCCR_SSISRC_PLL	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_SSISRC_PLL	/;"	d
CCM_MISCCR_SSI_PUE	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_SSI_PUE	/;"	d
CCM_MISCCR_SSI_PUS	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_SSI_PUS	/;"	d
CCM_MISCCR_SSI_SRC	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_SSI_SRC	/;"	d
CCM_MISCCR_SSI_SRC	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_SSI_SRC	/;"	d
CCM_MISCCR_TIMDMA	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_TIMDMA	/;"	d
CCM_MISCCR_TIMDMA	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_TIMDMA	/;"	d
CCM_MISCCR_TIMDMA_SSI	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_TIMDMA_SSI	/;"	d
CCM_MISCCR_TIMDMA_TIM	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_TIMDMA_TIM	/;"	d
CCM_MISCCR_TIM_DMA	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_TIM_DMA	/;"	d
CCM_MISCCR_TIM_DMA	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_TIM_DMA	/;"	d
CCM_MISCCR_USBDIV	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_USBDIV	/;"	d
CCM_MISCCR_USBHOC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_USBHOC	/;"	d
CCM_MISCCR_USBH_OC	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_USBH_OC	/;"	d
CCM_MISCCR_USBOC	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_USBOC	/;"	d
CCM_MISCCR_USBOC	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBOC	/;"	d
CCM_MISCCR_USBOC_ACTHI	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBOC_ACTHI	/;"	d
CCM_MISCCR_USBOOC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_USBOOC	/;"	d
CCM_MISCCR_USBOV_ACTLO	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBOV_ACTLO	/;"	d
CCM_MISCCR_USBO_OC	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_USBO_OC	/;"	d
CCM_MISCCR_USBPUE	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_USBPUE	/;"	d
CCM_MISCCR_USBPUE	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_USBPUE	/;"	d
CCM_MISCCR_USBPUE	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBPUE	/;"	d
CCM_MISCCR_USBSRC	arch/m68k/include/asm/m5227x.h	/^#define CCM_MISCCR_USBSRC	/;"	d
CCM_MISCCR_USBSRC	arch/m68k/include/asm/m5329.h	/^#define CCM_MISCCR_USBSRC	/;"	d
CCM_MISCCR_USBSRC	arch/m68k/include/asm/m5441x.h	/^#define CCM_MISCCR_USBSRC	/;"	d
CCM_MISCCR_USBSRC	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBSRC	/;"	d
CCM_MISCCR_USBSRC_CLKIN	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBSRC_CLKIN	/;"	d
CCM_MISCCR_USBSRC_PLL	arch/m68k/include/asm/m5445x.h	/^#define CCM_MISCCR_USBSRC_PLL	/;"	d
CCM_MISCCR_USB_PUE	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_USB_PUE	/;"	d
CCM_MISCCR_USB_SRC	arch/m68k/include/asm/m5301x.h	/^#define CCM_MISCCR_USB_SRC	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_ENABLE	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_ENABLE	/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_M(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_N	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_N(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OCLK_DLY	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_OCLK_DLY(/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_OSCM24	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_OSCM24	/;"	d
CCM_MMC_CTRL_PLL5	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_PLL5	/;"	d
CCM_MMC_CTRL_PLL5	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_PLL5	/;"	d
CCM_MMC_CTRL_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_PLL6	/;"	d
CCM_MMC_CTRL_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_PLL6	/;"	d
CCM_MMC_CTRL_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_PLL6	/;"	d
CCM_MMC_CTRL_PLL6	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_PLL6	/;"	d
CCM_MMC_CTRL_PLL6	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_PLL6	/;"	d
CCM_MMC_CTRL_PLL6	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_PLL6	/;"	d
CCM_MMC_CTRL_PLL_PERIPH0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_PLL_PERIPH0	/;"	d
CCM_MMC_CTRL_PLL_PERIPH0	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_PLL_PERIPH0	/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MMC_CTRL_SCLK_DLY	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_MMC_CTRL_SCLK_DLY(/;"	d
CCM_MPCTL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_MPCTL	/;"	d
CCM_MPCTL_SETUP_532MHZ	include/configs/mx31pdk.h	/^#define CCM_MPCTL_SETUP_532MHZ	/;"	d
CCM_MPLL_399_HZ	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CCM_MPLL_399_HZ /;"	d
CCM_MPLL_532_HZ	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CCM_MPLL_532_HZ	/;"	d
CCM_NAND_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_NAND_CTRL_ENABLE	/;"	d
CCM_NAND_CTRL_ENABLE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_NAND_CTRL_ENABLE	/;"	d
CCM_NAND_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_NAND_CTRL_M(/;"	d
CCM_NAND_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_NAND_CTRL_M(/;"	d
CCM_NAND_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_NAND_CTRL_N(/;"	d
CCM_NAND_CTRL_N	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_NAND_CTRL_N(/;"	d
CCM_NAND_CTRL_OSCM24	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_NAND_CTRL_OSCM24	/;"	d
CCM_NAND_CTRL_OSCM24	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_NAND_CTRL_OSCM24	/;"	d
CCM_NAND_CTRL_PLL5	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_NAND_CTRL_PLL5	/;"	d
CCM_NAND_CTRL_PLL5	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_NAND_CTRL_PLL5	/;"	d
CCM_NAND_CTRL_PLL6	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_NAND_CTRL_PLL6	/;"	d
CCM_NAND_CTRL_PLL6	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_NAND_CTRL_PLL6	/;"	d
CCM_OBSERVE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_OBSERVE(/;"	d
CCM_OBSERVE0_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define	CCM_OBSERVE0_OFFSET	/;"	d
CCM_OBSERVE_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_OBSERVE_CLR(/;"	d
CCM_OBSERVE_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_OBSERVE_SET(/;"	d
CCM_OBSERVE_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_OBSERVE_TOGGLE(/;"	d
CCM_PDR0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_PDR0	/;"	d
CCM_PDR0_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define CCM_PDR0_CONFIG	/;"	d
CCM_PDR0_SETUP_532MHZ	include/configs/mx31pdk.h	/^#define CCM_PDR0_SETUP_532MHZ	/;"	d
CCM_PDR1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_PDR1	/;"	d
CCM_PERCLK_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PERCLK_MASK	/;"	d
CCM_PERCLK_REG	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PERCLK_REG(/;"	d
CCM_PERCLK_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PERCLK_SHIFT(/;"	d
CCM_PLL10_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_EN	/;"	d
CCM_PLL10_CTRL_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_EN	/;"	d
CCM_PLL10_CTRL_INTEGER_MODE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_INTEGER_MODE	/;"	d
CCM_PLL10_CTRL_INTEGER_MODE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_INTEGER_MODE	/;"	d
CCM_PLL10_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_M(/;"	d
CCM_PLL10_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_M(/;"	d
CCM_PLL10_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_M_MASK	/;"	d
CCM_PLL10_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_M_MASK	/;"	d
CCM_PLL10_CTRL_M_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_M_SHIFT	/;"	d
CCM_PLL10_CTRL_M_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_M_SHIFT	/;"	d
CCM_PLL10_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_N(/;"	d
CCM_PLL10_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_N(/;"	d
CCM_PLL10_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_N_MASK	/;"	d
CCM_PLL10_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_N_MASK	/;"	d
CCM_PLL10_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL10_CTRL_N_SHIFT	/;"	d
CCM_PLL10_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL10_CTRL_N_SHIFT	/;"	d
CCM_PLL11_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL11_CTRL_EN	/;"	d
CCM_PLL11_CTRL_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL11_CTRL_EN	/;"	d
CCM_PLL11_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL11_CTRL_N(/;"	d
CCM_PLL11_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL11_CTRL_N(/;"	d
CCM_PLL11_CTRL_SIGMA_DELTA_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL11_CTRL_SIGMA_DELTA_EN	/;"	d
CCM_PLL11_CTRL_SIGMA_DELTA_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL11_CTRL_SIGMA_DELTA_EN	/;"	d
CCM_PLL11_CTRL_UPD	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL11_CTRL_UPD	/;"	d
CCM_PLL11_CTRL_UPD	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL11_CTRL_UPD	/;"	d
CCM_PLL11_PATTERN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL11_PATTERN	/;"	d
CCM_PLL11_PATTERN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL11_PATTERN	/;"	d
CCM_PLL12_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL12_CTRL_EN	/;"	d
CCM_PLL12_CTRL_EN	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL12_CTRL_EN	/;"	d
CCM_PLL12_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL12_CTRL_N(/;"	d
CCM_PLL12_CTRL_N	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL12_CTRL_N(/;"	d
CCM_PLL1_CFG_BIAS_CUR_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_BIAS_CUR_SHIFT	/;"	d
CCM_PLL1_CFG_BIAS_CUR_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_BIAS_CUR_SHIFT	/;"	d
CCM_PLL1_CFG_DIVP_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_DIVP_SHIFT	/;"	d
CCM_PLL1_CFG_DIVP_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_DIVP_SHIFT	/;"	d
CCM_PLL1_CFG_ENABLE_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_ENABLE_SHIFT	/;"	d
CCM_PLL1_CFG_ENABLE_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_ENABLE_SHIFT	/;"	d
CCM_PLL1_CFG_FACTOR_K_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_FACTOR_K_SHIFT	/;"	d
CCM_PLL1_CFG_FACTOR_K_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_FACTOR_K_SHIFT	/;"	d
CCM_PLL1_CFG_FACTOR_M_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_FACTOR_M_SHIFT	/;"	d
CCM_PLL1_CFG_FACTOR_M_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_FACTOR_M_SHIFT	/;"	d
CCM_PLL1_CFG_FACTOR_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_FACTOR_N_SHIFT	/;"	d
CCM_PLL1_CFG_FACTOR_N_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_FACTOR_N_SHIFT	/;"	d
CCM_PLL1_CFG_LCK_TMR_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_LCK_TMR_SHIFT	/;"	d
CCM_PLL1_CFG_LCK_TMR_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_LCK_TMR_SHIFT	/;"	d
CCM_PLL1_CFG_PLL4_EXCH_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_PLL4_EXCH_SHIFT	/;"	d
CCM_PLL1_CFG_PLL4_EXCH_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_PLL4_EXCH_SHIFT	/;"	d
CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT	/;"	d
CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT	/;"	d
CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT	/;"	d
CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT	/;"	d
CCM_PLL1_CFG_VCO_BIAS_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_VCO_BIAS_SHIFT	/;"	d
CCM_PLL1_CFG_VCO_BIAS_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_VCO_BIAS_SHIFT	/;"	d
CCM_PLL1_CFG_VCO_RST_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL1_CFG_VCO_RST_SHIFT	/;"	d
CCM_PLL1_CFG_VCO_RST_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL1_CFG_VCO_RST_SHIFT	/;"	d
CCM_PLL1_CLOCK_TIME_2	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL1_CLOCK_TIME_2	/;"	d
CCM_PLL1_CLOCK_TIME_2	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL1_CLOCK_TIME_2	/;"	d
CCM_PLL1_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL1_CTRL_EN	/;"	d
CCM_PLL1_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL1_CTRL_EN	/;"	d
CCM_PLL1_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL1_CTRL_EN	/;"	d
CCM_PLL1_CTRL_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL1_CTRL_EN	/;"	d
CCM_PLL1_CTRL_EN	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL1_CTRL_EN	/;"	d
CCM_PLL1_CTRL_EN	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL1_CTRL_EN	/;"	d
CCM_PLL1_CTRL_K	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL1_CTRL_K(/;"	d
CCM_PLL1_CTRL_K	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL1_CTRL_K(/;"	d
CCM_PLL1_CTRL_LOCK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL1_CTRL_LOCK	/;"	d
CCM_PLL1_CTRL_LOCK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL1_CTRL_LOCK	/;"	d
CCM_PLL1_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL1_CTRL_M(/;"	d
CCM_PLL1_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL1_CTRL_M(/;"	d
CCM_PLL1_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL1_CTRL_N(/;"	d
CCM_PLL1_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL1_CTRL_N(/;"	d
CCM_PLL1_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL1_CTRL_N(/;"	d
CCM_PLL1_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL1_CTRL_N(/;"	d
CCM_PLL1_CTRL_N	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL1_CTRL_N(/;"	d
CCM_PLL1_CTRL_N	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL1_CTRL_N(/;"	d
CCM_PLL1_CTRL_P	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL1_CTRL_P(/;"	d
CCM_PLL1_CTRL_P	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL1_CTRL_P(/;"	d
CCM_PLL1_CTRL_P	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL1_CTRL_P(/;"	d
CCM_PLL1_CTRL_P	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL1_CTRL_P(/;"	d
CCM_PLL1_CTRL_P	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL1_CTRL_P(/;"	d
CCM_PLL1_CTRL_P	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL1_CTRL_P(/;"	d
CCM_PLL2_CLOCK_TIME_2	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL2_CLOCK_TIME_2	/;"	d
CCM_PLL2_CLOCK_TIME_2	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL2_CLOCK_TIME_2	/;"	d
CCM_PLL2_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL2_CTRL_EN	/;"	d
CCM_PLL2_CTRL_EN	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL2_CTRL_EN	/;"	d
CCM_PLL2_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL2_CTRL_N(/;"	d
CCM_PLL2_CTRL_N	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL2_CTRL_N(/;"	d
CCM_PLL2_CTRL_P	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL2_CTRL_P(/;"	d
CCM_PLL2_CTRL_P	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL2_CTRL_P(/;"	d
CCM_PLL3_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL3_CTRL_EN	/;"	d
CCM_PLL3_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_EN	/;"	d
CCM_PLL3_CTRL_EN	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL3_CTRL_EN	/;"	d
CCM_PLL3_CTRL_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_EN	/;"	d
CCM_PLL3_CTRL_INTEGER_MODE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL3_CTRL_INTEGER_MODE	/;"	d
CCM_PLL3_CTRL_INTEGER_MODE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_INTEGER_MODE	/;"	d
CCM_PLL3_CTRL_INTEGER_MODE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL3_CTRL_INTEGER_MODE	/;"	d
CCM_PLL3_CTRL_INTEGER_MODE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_INTEGER_MODE	/;"	d
CCM_PLL3_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL3_CTRL_M(/;"	d
CCM_PLL3_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_M(/;"	d
CCM_PLL3_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL3_CTRL_M(/;"	d
CCM_PLL3_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_M(/;"	d
CCM_PLL3_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL3_CTRL_M_MASK	/;"	d
CCM_PLL3_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_M_MASK	/;"	d
CCM_PLL3_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL3_CTRL_M_MASK	/;"	d
CCM_PLL3_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_M_MASK	/;"	d
CCM_PLL3_CTRL_M_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL3_CTRL_M_SHIFT	/;"	d
CCM_PLL3_CTRL_M_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_M_SHIFT	/;"	d
CCM_PLL3_CTRL_M_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL3_CTRL_M_SHIFT	/;"	d
CCM_PLL3_CTRL_M_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_M_SHIFT	/;"	d
CCM_PLL3_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_N(/;"	d
CCM_PLL3_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_N(/;"	d
CCM_PLL3_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_N_MASK	/;"	d
CCM_PLL3_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_N_MASK	/;"	d
CCM_PLL3_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL3_CTRL_N_SHIFT	/;"	d
CCM_PLL3_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL3_CTRL_N_SHIFT	/;"	d
CCM_PLL4_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_EN	/;"	d
CCM_PLL4_CTRL_EN	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_EN	/;"	d
CCM_PLL4_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_M_MASK	/;"	d
CCM_PLL4_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_M_MASK	/;"	d
CCM_PLL4_CTRL_M_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_M_SHIFT	/;"	d
CCM_PLL4_CTRL_M_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_M_SHIFT	/;"	d
CCM_PLL4_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_N(/;"	d
CCM_PLL4_CTRL_N	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_N(/;"	d
CCM_PLL4_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_N_MASK	/;"	d
CCM_PLL4_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_N_MASK	/;"	d
CCM_PLL4_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_N_SHIFT	/;"	d
CCM_PLL4_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_N_SHIFT	/;"	d
CCM_PLL4_CTRL_P_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_P_MASK	/;"	d
CCM_PLL4_CTRL_P_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_P_MASK	/;"	d
CCM_PLL4_CTRL_P_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL4_CTRL_P_SHIFT	/;"	d
CCM_PLL4_CTRL_P_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL4_CTRL_P_SHIFT	/;"	d
CCM_PLL5_CTRL_BIAS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BIAS(/;"	d
CCM_PLL5_CTRL_BIAS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BIAS(/;"	d
CCM_PLL5_CTRL_BIAS_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BIAS_MASK /;"	d
CCM_PLL5_CTRL_BIAS_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BIAS_MASK /;"	d
CCM_PLL5_CTRL_BIAS_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BIAS_X(/;"	d
CCM_PLL5_CTRL_BIAS_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BIAS_X(/;"	d
CCM_PLL5_CTRL_BW	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BW /;"	d
CCM_PLL5_CTRL_BW	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BW /;"	d
CCM_PLL5_CTRL_BYPASS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BYPASS /;"	d
CCM_PLL5_CTRL_BYPASS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_BYPASS /;"	d
CCM_PLL5_CTRL_DDR_CLK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_DDR_CLK /;"	d
CCM_PLL5_CTRL_DDR_CLK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_DDR_CLK /;"	d
CCM_PLL5_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_EN /;"	d
CCM_PLL5_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_CTRL_EN	/;"	d
CCM_PLL5_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL5_CTRL_EN	/;"	d
CCM_PLL5_CTRL_EN	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_EN /;"	d
CCM_PLL5_CTRL_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_CTRL_EN	/;"	d
CCM_PLL5_CTRL_EN	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL5_CTRL_EN	/;"	d
CCM_PLL5_CTRL_K	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K(/;"	d
CCM_PLL5_CTRL_K	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_CTRL_K(/;"	d
CCM_PLL5_CTRL_K	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K(/;"	d
CCM_PLL5_CTRL_K	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_CTRL_K(/;"	d
CCM_PLL5_CTRL_K_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K_MASK /;"	d
CCM_PLL5_CTRL_K_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K_MASK /;"	d
CCM_PLL5_CTRL_K_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K_SHIFT /;"	d
CCM_PLL5_CTRL_K_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K_SHIFT /;"	d
CCM_PLL5_CTRL_K_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K_X(/;"	d
CCM_PLL5_CTRL_K_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_K_X(/;"	d
CCM_PLL5_CTRL_LDO	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_LDO /;"	d
CCM_PLL5_CTRL_LDO	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_LDO /;"	d
CCM_PLL5_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M(/;"	d
CCM_PLL5_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_CTRL_M(/;"	d
CCM_PLL5_CTRL_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M(/;"	d
CCM_PLL5_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_CTRL_M(/;"	d
CCM_PLL5_CTRL_M1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M1(/;"	d
CCM_PLL5_CTRL_M1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M1(/;"	d
CCM_PLL5_CTRL_M1_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M1_MASK /;"	d
CCM_PLL5_CTRL_M1_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M1_MASK /;"	d
CCM_PLL5_CTRL_M1_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M1_X(/;"	d
CCM_PLL5_CTRL_M1_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M1_X(/;"	d
CCM_PLL5_CTRL_M_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M_MASK /;"	d
CCM_PLL5_CTRL_M_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M_MASK /;"	d
CCM_PLL5_CTRL_M_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M_X(/;"	d
CCM_PLL5_CTRL_M_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_M_X(/;"	d
CCM_PLL5_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N(/;"	d
CCM_PLL5_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_CTRL_N(/;"	d
CCM_PLL5_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL5_CTRL_N(/;"	d
CCM_PLL5_CTRL_N	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N(/;"	d
CCM_PLL5_CTRL_N	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_CTRL_N(/;"	d
CCM_PLL5_CTRL_N	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL5_CTRL_N(/;"	d
CCM_PLL5_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N_MASK /;"	d
CCM_PLL5_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N_MASK /;"	d
CCM_PLL5_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N_SHIFT /;"	d
CCM_PLL5_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N_SHIFT /;"	d
CCM_PLL5_CTRL_N_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N_X(/;"	d
CCM_PLL5_CTRL_N_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_N_X(/;"	d
CCM_PLL5_CTRL_P	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P(/;"	d
CCM_PLL5_CTRL_P	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P(/;"	d
CCM_PLL5_CTRL_P_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P_MASK /;"	d
CCM_PLL5_CTRL_P_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P_MASK /;"	d
CCM_PLL5_CTRL_P_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P_SHIFT /;"	d
CCM_PLL5_CTRL_P_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P_SHIFT /;"	d
CCM_PLL5_CTRL_P_X	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P_X(/;"	d
CCM_PLL5_CTRL_P_X	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_P_X(/;"	d
CCM_PLL5_CTRL_SIGMA_DELTA_EN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_CTRL_SIGMA_DELTA_EN	/;"	d
CCM_PLL5_CTRL_SIGMA_DELTA_EN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_CTRL_SIGMA_DELTA_EN	/;"	d
CCM_PLL5_CTRL_UPD	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_CTRL_UPD	/;"	d
CCM_PLL5_CTRL_UPD	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL5_CTRL_UPD	/;"	d
CCM_PLL5_CTRL_UPD	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_CTRL_UPD	/;"	d
CCM_PLL5_CTRL_UPD	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL5_CTRL_UPD	/;"	d
CCM_PLL5_CTRL_VCO_BIAS	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_VCO_BIAS /;"	d
CCM_PLL5_CTRL_VCO_BIAS	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_VCO_BIAS /;"	d
CCM_PLL5_CTRL_VCO_GAIN	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL5_CTRL_VCO_GAIN /;"	d
CCM_PLL5_CTRL_VCO_GAIN	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL5_CTRL_VCO_GAIN /;"	d
CCM_PLL5_DIV1_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL5_DIV1_SHIFT	/;"	d
CCM_PLL5_DIV1_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL5_DIV1_SHIFT	/;"	d
CCM_PLL5_DIV2_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL5_DIV2_SHIFT	/;"	d
CCM_PLL5_DIV2_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL5_DIV2_SHIFT	/;"	d
CCM_PLL5_PATTERN	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_PATTERN	/;"	d
CCM_PLL5_PATTERN	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_PATTERN	/;"	d
CCM_PLL5_TUN_INIT_FREQ	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_TUN_INIT_FREQ(/;"	d
CCM_PLL5_TUN_INIT_FREQ	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_TUN_INIT_FREQ(/;"	d
CCM_PLL5_TUN_INIT_FREQ_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_TUN_INIT_FREQ_MASK	/;"	d
CCM_PLL5_TUN_INIT_FREQ_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_TUN_INIT_FREQ_MASK	/;"	d
CCM_PLL5_TUN_LOCK_TIME	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_TUN_LOCK_TIME(/;"	d
CCM_PLL5_TUN_LOCK_TIME	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_TUN_LOCK_TIME(/;"	d
CCM_PLL5_TUN_LOCK_TIME_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL5_TUN_LOCK_TIME_MASK	/;"	d
CCM_PLL5_TUN_LOCK_TIME_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL5_TUN_LOCK_TIME_MASK	/;"	d
CCM_PLL6_CFG_UPDATE	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL6_CFG_UPDATE /;"	d
CCM_PLL6_CFG_UPDATE	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL6_CFG_UPDATE /;"	d
CCM_PLL6_CTRL_BYPASS_EN	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_BYPASS_EN	/;"	d
CCM_PLL6_CTRL_BYPASS_EN	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_BYPASS_EN	/;"	d
CCM_PLL6_CTRL_DIV1_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV1_MASK	/;"	d
CCM_PLL6_CTRL_DIV1_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV1_MASK	/;"	d
CCM_PLL6_CTRL_DIV1_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV1_SHIFT	/;"	d
CCM_PLL6_CTRL_DIV1_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV1_SHIFT	/;"	d
CCM_PLL6_CTRL_DIV2_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV2_MASK	/;"	d
CCM_PLL6_CTRL_DIV2_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV2_MASK	/;"	d
CCM_PLL6_CTRL_DIV2_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV2_SHIFT	/;"	d
CCM_PLL6_CTRL_DIV2_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_DIV2_SHIFT	/;"	d
CCM_PLL6_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_EN	/;"	d
CCM_PLL6_CTRL_EN	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL6_CTRL_EN	/;"	d
CCM_PLL6_CTRL_EN	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_EN	/;"	d
CCM_PLL6_CTRL_EN	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL6_CTRL_EN	/;"	d
CCM_PLL6_CTRL_K_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_K_MASK	/;"	d
CCM_PLL6_CTRL_K_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL6_CTRL_K_MASK	/;"	d
CCM_PLL6_CTRL_K_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_K_MASK	/;"	d
CCM_PLL6_CTRL_K_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL6_CTRL_K_MASK	/;"	d
CCM_PLL6_CTRL_K_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_K_SHIFT	/;"	d
CCM_PLL6_CTRL_K_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL6_CTRL_K_SHIFT	/;"	d
CCM_PLL6_CTRL_K_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_K_SHIFT	/;"	d
CCM_PLL6_CTRL_K_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL6_CTRL_K_SHIFT	/;"	d
CCM_PLL6_CTRL_LOCK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL6_CTRL_LOCK	/;"	d
CCM_PLL6_CTRL_LOCK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL6_CTRL_LOCK	/;"	d
CCM_PLL6_CTRL_N	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL6_CTRL_N(/;"	d
CCM_PLL6_CTRL_N	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL6_CTRL_N(/;"	d
CCM_PLL6_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_N_MASK	/;"	d
CCM_PLL6_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL6_CTRL_N_MASK	/;"	d
CCM_PLL6_CTRL_N_MASK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_N_MASK	/;"	d
CCM_PLL6_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_N_MASK	/;"	d
CCM_PLL6_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL6_CTRL_N_MASK	/;"	d
CCM_PLL6_CTRL_N_MASK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_N_MASK	/;"	d
CCM_PLL6_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_N_SHIFT	/;"	d
CCM_PLL6_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_PLL6_CTRL_N_SHIFT	/;"	d
CCM_PLL6_CTRL_N_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_N_SHIFT	/;"	d
CCM_PLL6_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_N_SHIFT	/;"	d
CCM_PLL6_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_PLL6_CTRL_N_SHIFT	/;"	d
CCM_PLL6_CTRL_N_SHIFT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_PLL6_CTRL_N_SHIFT	/;"	d
CCM_PLL6_CTRL_P	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define CCM_PLL6_CTRL_P(/;"	d
CCM_PLL6_CTRL_P	arch/arm/include/asm/arch/clock_sun9i.h	/^#define CCM_PLL6_CTRL_P(/;"	d
CCM_PLL6_CTRL_SATA_EN_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_PLL6_CTRL_SATA_EN_SHIFT	/;"	d
CCM_PLL6_CTRL_SATA_EN_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_PLL6_CTRL_SATA_EN_SHIFT	/;"	d
CCM_PLL_MFD_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_MFD_MASK	/;"	d
CCM_PLL_MFD_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_MFD_SHIFT	/;"	d
CCM_PLL_MFI_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_MFI_MASK	/;"	d
CCM_PLL_MFI_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_MFI_SHIFT	/;"	d
CCM_PLL_MFN_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_MFN_MASK	/;"	d
CCM_PLL_MFN_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_MFN_SHIFT	/;"	d
CCM_PLL_PD_MASK	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_PD_MASK	/;"	d
CCM_PLL_PD_SHIFT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_PLL_PD_SHIFT	/;"	d
CCM_PPLL_300_HZ	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CCM_PPLL_300_HZ /;"	d
CCM_RCON_256_FBCONFIG	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_256_FBCONFIG(/;"	d
CCM_RCON_256_OSCMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_256_OSCMODE	/;"	d
CCM_RCON_256_PLLMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_256_PLLMODE	/;"	d
CCM_RCON_256_PLLMULT	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_256_PLLMULT(/;"	d
CCM_RCON_360_FBCONFIG	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_360_FBCONFIG(/;"	d
CCM_RCON_360_PCIMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_360_PCIMODE	/;"	d
CCM_RCON_360_PCISLEW	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_360_PCISLEW	/;"	d
CCM_RCON_360_PLLMODE	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_360_PLLMODE	/;"	d
CCM_RCON_360_PLLMULT	arch/m68k/include/asm/m5445x.h	/^#define CCM_RCON_360_PLLMULT(/;"	d
CCM_RCON_BOOTPS	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_BOOTPS(/;"	d
CCM_RCON_BOOTPS	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_BOOTPS(/;"	d
CCM_RCON_BOOTPS_16	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_BOOTPS_16	/;"	d
CCM_RCON_BOOTPS_32	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_BOOTPS_32	/;"	d
CCM_RCON_BOOTPS_8	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_BOOTPS_8	/;"	d
CCM_RCON_BOOTPS_MASK	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_BOOTPS_MASK	/;"	d
CCM_RCON_BOOTPS_PS16	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_BOOTPS_PS16	/;"	d
CCM_RCON_BOOTPS_PS32	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_BOOTPS_PS32	/;"	d
CCM_RCON_BOOTPS_PS8	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_BOOTPS_PS8	/;"	d
CCM_RCON_BOOTPS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_BOOTPS_UNMASK	/;"	d
CCM_RCON_CSC	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_CSC(/;"	d
CCM_RCON_CSC_FBCS5_A22	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_CSC_FBCS5_A22	/;"	d
CCM_RCON_CSC_FBCS5_CS4	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_CSC_FBCS5_CS4	/;"	d
CCM_RCON_CSC_FB_A23_A22	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_CSC_FB_A23_A22	/;"	d
CCM_RCON_CSC_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_CSC_UNMASK	/;"	d
CCM_RCON_DDR_16BIT_SPLIT	arch/m68k/include/asm/m5301x.h	/^#define CCM_RCON_DDR_16BIT_SPLIT	/;"	d
CCM_RCON_DDR_8BIT_SPLIT	arch/m68k/include/asm/m5301x.h	/^#define CCM_RCON_DDR_8BIT_SPLIT	/;"	d
CCM_RCON_LIMP	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_LIMP	/;"	d
CCM_RCON_LIMP	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_LIMP	/;"	d
CCM_RCON_LOAD	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_LOAD	/;"	d
CCM_RCON_LOAD	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_LOAD	/;"	d
CCM_RCON_MODE	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_MODE	/;"	d
CCM_RCON_OSCMODE_OSCBYPASS	arch/m68k/include/asm/m5227x.h	/^#define CCM_RCON_OSCMODE_OSCBYPASS	/;"	d
CCM_RCON_OSC_MODE	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_OSC_MODE	/;"	d
CCM_RCON_PLL_MODE	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_PLL_MODE	/;"	d
CCM_RCON_RCSC	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_RCSC(/;"	d
CCM_RCON_RESERVED	arch/m68k/include/asm/m5329.h	/^#define CCM_RCON_RESERVED	/;"	d
CCM_RCON_RLOAD	arch/m68k/include/asm/m5235.h	/^#define CCM_RCON_RLOAD	/;"	d
CCM_RCON_SDR_16BIT_UNIFIED	arch/m68k/include/asm/m5301x.h	/^#define CCM_RCON_SDR_16BIT_UNIFIED	/;"	d
CCM_RCON_SDR_32BIT_UNIFIED	arch/m68k/include/asm/m5301x.h	/^#define CCM_RCON_SDR_32BIT_UNIFIED	/;"	d
CCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5235.h	/^#define CCM_RCR_FRCRSTOUT	/;"	d
CCM_RCR_SOFTRST	arch/m68k/include/asm/m5235.h	/^#define CCM_RCR_SOFTRST	/;"	d
CCM_RCSR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_RCSR	/;"	d
CCM_RCSR_NF16B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_RCSR_NF16B	/;"	d
CCM_RCSR_NFMS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_RCSR_NFMS	/;"	d
CCM_RCSR_NF_16BIT_SEL	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_RCSR_NF_16BIT_SEL	/;"	d
CCM_RCSR_NF_16BIT_SEL	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CCM_RCSR_NF_16BIT_SEL	/;"	d
CCM_RCSR_NF_PS	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define CCM_RCSR_NF_PS(/;"	d
CCM_REG_CTRL_MASK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define CCM_REG_CTRL_MASK	/;"	d
CCM_ROOT0_TARGET_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define	CCM_ROOT0_TARGET_OFFSET	/;"	d
CCM_ROOT_TARGET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TARGET(/;"	d
CCM_ROOT_TARGET_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TARGET_CLR(/;"	d
CCM_ROOT_TARGET_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TARGET_SET(/;"	d
CCM_ROOT_TARGET_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TARGET_TOGGLE(/;"	d
CCM_ROOT_TGT_ENABLE_MSK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_ENABLE_MSK	/;"	d
CCM_ROOT_TGT_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_ENABLE_SHIFT	/;"	d
CCM_ROOT_TGT_MUX_MSK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_MUX_MSK	/;"	d
CCM_ROOT_TGT_MUX_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_MUX_SHIFT	/;"	d
CCM_ROOT_TGT_MUX_TO	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_MUX_TO(/;"	d
CCM_ROOT_TGT_POST_DIV	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_POST_DIV(/;"	d
CCM_ROOT_TGT_POST_DIV_MSK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_POST_DIV_MSK	/;"	d
CCM_ROOT_TGT_POST_DIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_POST_DIV_SHIFT	/;"	d
CCM_ROOT_TGT_PRE_DIV	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_PRE_DIV(/;"	d
CCM_ROOT_TGT_PRE_DIV_MSK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_PRE_DIV_MSK	/;"	d
CCM_ROOT_TGT_PRE_DIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_ROOT_TGT_PRE_DIV_SHIFT	/;"	d
CCM_RSR_EXT	arch/m68k/include/asm/m5235.h	/^#define CCM_RSR_EXT	/;"	d
CCM_RSR_LOC	arch/m68k/include/asm/m5235.h	/^#define CCM_RSR_LOC	/;"	d
CCM_RSR_LOL	arch/m68k/include/asm/m5235.h	/^#define CCM_RSR_LOL	/;"	d
CCM_RSR_POR	arch/m68k/include/asm/m5235.h	/^#define CCM_RSR_POR	/;"	d
CCM_RSR_SOFT	arch/m68k/include/asm/m5235.h	/^#define CCM_RSR_SOFT	/;"	d
CCM_RSR_WDR	arch/m68k/include/asm/m5235.h	/^#define CCM_RSR_WDR	/;"	d
CCM_SCTRL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_SCTRL(/;"	d
CCM_SCTRL0_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define	CCM_SCTRL0_OFFSET	/;"	d
CCM_SCTRL_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_SCTRL_CLR(/;"	d
CCM_SCTRL_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_SCTRL_SET(/;"	d
CCM_SCTRL_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CCM_SCTRL_TOGGLE(/;"	d
CCM_SEC_SWITCH_BUS_NONSEC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_SEC_SWITCH_BUS_NONSEC	/;"	d
CCM_SEC_SWITCH_BUS_NONSEC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_SEC_SWITCH_BUS_NONSEC	/;"	d
CCM_SEC_SWITCH_MBUS_NONSEC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_SEC_SWITCH_MBUS_NONSEC	/;"	d
CCM_SEC_SWITCH_MBUS_NONSEC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_SEC_SWITCH_MBUS_NONSEC	/;"	d
CCM_SEC_SWITCH_PLL_NONSEC	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_SEC_SWITCH_PLL_NONSEC	/;"	d
CCM_SEC_SWITCH_PLL_NONSEC	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_SEC_SWITCH_PLL_NONSEC	/;"	d
CCM_SPCTL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_SPCTL	/;"	d
CCM_SPI0_CLK	drivers/mtd/spi/sunxi_spi_spl.c	/^#define CCM_SPI0_CLK /;"	d	file:
CCM_TCON0_CTRL_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_TCON0_CTRL_GATE	/;"	d
CCM_TCON0_CTRL_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_TCON0_CTRL_GATE	/;"	d
CCM_TCON0_CTRL_M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_TCON0_CTRL_M(/;"	d
CCM_TCON0_CTRL_M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_TCON0_CTRL_M(/;"	d
CCM_UHCSR_DRV_VBUS	arch/m68k/include/asm/m5301x.h	/^#define CCM_UHCSR_DRV_VBUS	/;"	d
CCM_UHCSR_DRV_VBUS	arch/m68k/include/asm/m5441x.h	/^#define CCM_UHCSR_DRV_VBUS	/;"	d
CCM_UHCSR_PORTIND	arch/m68k/include/asm/m5301x.h	/^#define CCM_UHCSR_PORTIND(/;"	d
CCM_UHCSR_PORTIND	arch/m68k/include/asm/m5329.h	/^#define CCM_UHCSR_PORTIND(/;"	d
CCM_UHCSR_PWRFLT	arch/m68k/include/asm/m5301x.h	/^#define CCM_UHCSR_PWRFLT	/;"	d
CCM_UHCSR_PWRFLT	arch/m68k/include/asm/m5441x.h	/^#define CCM_UHCSR_PWRFLT	/;"	d
CCM_UHCSR_UHMIE	arch/m68k/include/asm/m5301x.h	/^#define CCM_UHCSR_UHMIE	/;"	d
CCM_UHCSR_UHMIE	arch/m68k/include/asm/m5329.h	/^#define CCM_UHCSR_UHMIE	/;"	d
CCM_UHCSR_UOMIE	arch/m68k/include/asm/m5441x.h	/^#define CCM_UHCSR_UOMIE	/;"	d
CCM_UHCSR_WKUP	arch/m68k/include/asm/m5301x.h	/^#define CCM_UHCSR_WKUP	/;"	d
CCM_UHCSR_WKUP	arch/m68k/include/asm/m5329.h	/^#define CCM_UHCSR_WKUP	/;"	d
CCM_UHCSR_WKUP	arch/m68k/include/asm/m5441x.h	/^#define CCM_UHCSR_WKUP	/;"	d
CCM_UHCSR_XPDE	arch/m68k/include/asm/m5301x.h	/^#define CCM_UHCSR_XPDE	/;"	d
CCM_UHCSR_XPDE	arch/m68k/include/asm/m5329.h	/^#define CCM_UHCSR_XPDE	/;"	d
CCM_UHCSR_XPDE	arch/m68k/include/asm/m5441x.h	/^#define CCM_UHCSR_XPDE	/;"	d
CCM_UOCSR_AVLD	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_AVLD	/;"	d
CCM_UOCSR_AVLD	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_AVLD	/;"	d
CCM_UOCSR_AVLD	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_AVLD	/;"	d
CCM_UOCSR_AVLD	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_AVLD	/;"	d
CCM_UOCSR_AVLD	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_AVLD	/;"	d
CCM_UOCSR_BVLD	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_BVLD	/;"	d
CCM_UOCSR_BVLD	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_BVLD	/;"	d
CCM_UOCSR_BVLD	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_BVLD	/;"	d
CCM_UOCSR_BVLD	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_BVLD	/;"	d
CCM_UOCSR_BVLD	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_BVLD	/;"	d
CCM_UOCSR_CRG_VBUS	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_CRG_VBUS	/;"	d
CCM_UOCSR_CRG_VBUS	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_CRG_VBUS	/;"	d
CCM_UOCSR_CRG_VBUS	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_CRG_VBUS	/;"	d
CCM_UOCSR_CRG_VBUS	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_CRG_VBUS	/;"	d
CCM_UOCSR_CRG_VBUS	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_CRG_VBUS	/;"	d
CCM_UOCSR_DCR_VBUS	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_DCR_VBUS	/;"	d
CCM_UOCSR_DCR_VBUS	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_DCR_VBUS	/;"	d
CCM_UOCSR_DCR_VBUS	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_DCR_VBUS	/;"	d
CCM_UOCSR_DCR_VBUS	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_DCR_VBUS	/;"	d
CCM_UOCSR_DCR_VBUS	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_DCR_VBUS	/;"	d
CCM_UOCSR_DMPD	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_DMPD	/;"	d
CCM_UOCSR_DMPD	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_DMPD	/;"	d
CCM_UOCSR_DMPD	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_DMPD	/;"	d
CCM_UOCSR_DMPD	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_DMPD	/;"	d
CCM_UOCSR_DMPD	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_DMPD	/;"	d
CCM_UOCSR_DPPD	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_DPPD	/;"	d
CCM_UOCSR_DPPD	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_DPPD	/;"	d
CCM_UOCSR_DPPD	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_DPPD	/;"	d
CCM_UOCSR_DPPD	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_DPPD	/;"	d
CCM_UOCSR_DPPD	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_DPPD	/;"	d
CCM_UOCSR_DPPU	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_DPPU	/;"	d
CCM_UOCSR_DPPU	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_DPPU	/;"	d
CCM_UOCSR_DPPU	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_DPPU	/;"	d
CCM_UOCSR_DPPU	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_DPPU	/;"	d
CCM_UOCSR_DPPU	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_DPPU	/;"	d
CCM_UOCSR_DRV_VBUS	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_DRV_VBUS	/;"	d
CCM_UOCSR_DRV_VBUS	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_DRV_VBUS	/;"	d
CCM_UOCSR_DRV_VBUS	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_DRV_VBUS	/;"	d
CCM_UOCSR_PORTIND	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_PORTIND(/;"	d
CCM_UOCSR_PWRFLT	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_PWRFLT	/;"	d
CCM_UOCSR_PWRFLT	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_PWRFLT	/;"	d
CCM_UOCSR_PWRFLT	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_PWRFLT	/;"	d
CCM_UOCSR_PWRFLT	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_PWRFLT	/;"	d
CCM_UOCSR_SEND	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_SEND	/;"	d
CCM_UOCSR_SEND	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_SEND	/;"	d
CCM_UOCSR_SEND	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_SEND	/;"	d
CCM_UOCSR_SEND	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_SEND	/;"	d
CCM_UOCSR_SEND	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_SEND	/;"	d
CCM_UOCSR_UOMIE	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_UOMIE	/;"	d
CCM_UOCSR_UOMIE	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_UOMIE	/;"	d
CCM_UOCSR_UOMIE	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_UOMIE	/;"	d
CCM_UOCSR_UOMIE	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_UOMIE	/;"	d
CCM_UOCSR_UOMIE	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_UOMIE	/;"	d
CCM_UOCSR_VVLD	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_VVLD	/;"	d
CCM_UOCSR_VVLD	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_VVLD	/;"	d
CCM_UOCSR_VVLD	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_VVLD	/;"	d
CCM_UOCSR_VVLD	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_VVLD	/;"	d
CCM_UOCSR_VVLD	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_VVLD	/;"	d
CCM_UOCSR_WKUP	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_WKUP	/;"	d
CCM_UOCSR_WKUP	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_WKUP	/;"	d
CCM_UOCSR_WKUP	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_WKUP	/;"	d
CCM_UOCSR_WKUP	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_WKUP	/;"	d
CCM_UOCSR_WKUP	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_WKUP	/;"	d
CCM_UOCSR_XPDE	arch/m68k/include/asm/m5227x.h	/^#define CCM_UOCSR_XPDE	/;"	d
CCM_UOCSR_XPDE	arch/m68k/include/asm/m5301x.h	/^#define CCM_UOCSR_XPDE	/;"	d
CCM_UOCSR_XPDE	arch/m68k/include/asm/m5329.h	/^#define CCM_UOCSR_XPDE	/;"	d
CCM_UOCSR_XPDE	arch/m68k/include/asm/m5441x.h	/^#define CCM_UOCSR_XPDE	/;"	d
CCM_UOCSR_XPDE	arch/m68k/include/asm/m5445x.h	/^#define CCM_UOCSR_XPDE	/;"	d
CCM_UPCTL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CCM_UPCTL	/;"	d
CCM_USB_CTRL_12M_CLK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_12M_CLK /;"	d
CCM_USB_CTRL_12M_CLK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_12M_CLK /;"	d
CCM_USB_CTRL_HSIC_CLK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_HSIC_CLK /;"	d
CCM_USB_CTRL_HSIC_CLK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_HSIC_CLK /;"	d
CCM_USB_CTRL_HSIC_RST	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_HSIC_RST /;"	d
CCM_USB_CTRL_HSIC_RST	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_HSIC_RST /;"	d
CCM_USB_CTRL_OHCI0_CLK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_OHCI0_CLK /;"	d
CCM_USB_CTRL_OHCI0_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_OHCI0_CLK /;"	d
CCM_USB_CTRL_OHCI0_CLK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_OHCI0_CLK /;"	d
CCM_USB_CTRL_OHCI0_CLK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_OHCI0_CLK /;"	d
CCM_USB_CTRL_OHCI0_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_OHCI0_CLK /;"	d
CCM_USB_CTRL_OHCI0_CLK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_OHCI0_CLK /;"	d
CCM_USB_CTRL_OHCI1_CLK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_OHCI1_CLK /;"	d
CCM_USB_CTRL_OHCI1_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_OHCI1_CLK /;"	d
CCM_USB_CTRL_OHCI1_CLK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_OHCI1_CLK /;"	d
CCM_USB_CTRL_OHCI1_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_OHCI1_CLK /;"	d
CCM_USB_CTRL_OHCI2_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_OHCI2_CLK /;"	d
CCM_USB_CTRL_OHCI2_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_OHCI2_CLK /;"	d
CCM_USB_CTRL_PHY0_CLK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY0_CLK /;"	d
CCM_USB_CTRL_PHY0_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY0_CLK /;"	d
CCM_USB_CTRL_PHY0_CLK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY0_CLK /;"	d
CCM_USB_CTRL_PHY0_CLK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY0_CLK /;"	d
CCM_USB_CTRL_PHY0_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY0_CLK /;"	d
CCM_USB_CTRL_PHY0_CLK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY0_CLK /;"	d
CCM_USB_CTRL_PHY0_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY0_RST /;"	d
CCM_USB_CTRL_PHY0_RST	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY0_RST /;"	d
CCM_USB_CTRL_PHY0_RST	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY0_RST /;"	d
CCM_USB_CTRL_PHY0_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY0_RST /;"	d
CCM_USB_CTRL_PHY0_RST	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY0_RST /;"	d
CCM_USB_CTRL_PHY0_RST	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY0_RST /;"	d
CCM_USB_CTRL_PHY1_CLK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY1_CLK /;"	d
CCM_USB_CTRL_PHY1_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY1_CLK /;"	d
CCM_USB_CTRL_PHY1_CLK	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY1_CLK /;"	d
CCM_USB_CTRL_PHY1_CLK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY1_CLK /;"	d
CCM_USB_CTRL_PHY1_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY1_CLK /;"	d
CCM_USB_CTRL_PHY1_CLK	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY1_CLK /;"	d
CCM_USB_CTRL_PHY1_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY1_RST /;"	d
CCM_USB_CTRL_PHY1_RST	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY1_RST /;"	d
CCM_USB_CTRL_PHY1_RST	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY1_RST /;"	d
CCM_USB_CTRL_PHY1_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY1_RST /;"	d
CCM_USB_CTRL_PHY1_RST	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY1_RST /;"	d
CCM_USB_CTRL_PHY1_RST	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHY1_RST /;"	d
CCM_USB_CTRL_PHY2_CLK	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY2_CLK /;"	d
CCM_USB_CTRL_PHY2_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY2_CLK /;"	d
CCM_USB_CTRL_PHY2_CLK	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY2_CLK /;"	d
CCM_USB_CTRL_PHY2_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY2_CLK /;"	d
CCM_USB_CTRL_PHY2_RST	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY2_RST /;"	d
CCM_USB_CTRL_PHY2_RST	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY2_RST /;"	d
CCM_USB_CTRL_PHY2_RST	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHY2_RST /;"	d
CCM_USB_CTRL_PHY2_RST	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY2_RST /;"	d
CCM_USB_CTRL_PHY3_CLK	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY3_CLK /;"	d
CCM_USB_CTRL_PHY3_CLK	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY3_CLK /;"	d
CCM_USB_CTRL_PHY3_RST	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY3_RST /;"	d
CCM_USB_CTRL_PHY3_RST	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHY3_RST /;"	d
CCM_USB_CTRL_PHYGATE	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CCM_USB_CTRL_PHYGATE /;"	d
CCM_USB_CTRL_PHYGATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CCM_USB_CTRL_PHYGATE /;"	d
CCM_USB_CTRL_PHYGATE	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHYGATE /;"	d
CCM_USB_CTRL_PHYGATE	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CCM_USB_CTRL_PHYGATE /;"	d
CCM_USB_CTRL_PHYGATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CCM_USB_CTRL_PHYGATE /;"	d
CCM_USB_CTRL_PHYGATE	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CCM_USB_CTRL_PHYGATE /;"	d
CCN_HN_F_SAM_CTL	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCN_HN_F_SAM_CTL	/;"	d
CCN_HN_F_SAM_NODEID_DDR0	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCN_HN_F_SAM_NODEID_DDR0	/;"	d
CCN_HN_F_SAM_NODEID_DDR1	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCN_HN_F_SAM_NODEID_DDR1	/;"	d
CCN_HN_F_SAM_NODEID_MASK	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CCN_HN_F_SAM_NODEID_MASK	/;"	d
CCN_PRR	arch/sh/include/asm/cpu_sh7757.h	/^#define CCN_PRR	/;"	d
CCOBSCKEBBCTL	arch/x86/cpu/quark/smc.h	/^#define CCOBSCKEBBCTL	/;"	d
CCOR	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	CCOR	/;"	d
CCORE_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCORE_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define CCORE_NR_CLK	/;"	d
CCPL	drivers/usb/host/r8a66597.h	/^#define	CCPL	/;"	d
CCPMCONFIG0	arch/x86/cpu/quark/smc.h	/^#define CCPMCONFIG0	/;"	d
CCPMDLYREG0	arch/x86/cpu/quark/smc.h	/^#define CCPMDLYREG0	/;"	d
CCPMDLYREG1	arch/x86/cpu/quark/smc.h	/^#define CCPMDLYREG1	/;"	d
CCPMDLYREG2	arch/x86/cpu/quark/smc.h	/^#define CCPMDLYREG2	/;"	d
CCPMDLYREG3	arch/x86/cpu/quark/smc.h	/^#define CCPMDLYREG3	/;"	d
CCPMDLYREG4	arch/x86/cpu/quark/smc.h	/^#define CCPMDLYREG4	/;"	d
CCPMSTS0	arch/x86/cpu/quark/smc.h	/^#define CCPMSTS0	/;"	d
CCPMSTS1	arch/x86/cpu/quark/smc.h	/^#define CCPMSTS1	/;"	d
CCPTRREG	arch/x86/cpu/quark/smc.h	/^#define CCPTRREG	/;"	d
CCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR(/;"	d
CCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7203.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7264.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7269.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7706.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7734.h	/^#define CCR /;"	d
CCR	arch/sh/include/asm/cpu_sh7750.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7752.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7753.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7757.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7763.h	/^#define CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CCR	/;"	d
CCR	arch/sh/include/asm/cpu_sh7785.h	/^#define	CCR	/;"	d
CCR0_DAPUIB	arch/powerpc/include/asm/ppc440.h	/^#define CCR0_DAPUIB	/;"	d
CCR0_DTB	arch/powerpc/include/asm/ppc440.h	/^#define CCR0_DTB	/;"	d
CCR1	arch/sh/include/asm/cpu_sh7203.h	/^#define CCR1	/;"	d
CCR1	arch/sh/include/asm/cpu_sh7264.h	/^#define CCR1	/;"	d
CCR1	arch/sh/include/asm/cpu_sh7269.h	/^#define CCR1	/;"	d
CCR1_A	board/renesas/rsk7203/lowlevel_init.S	/^CCR1_A:		.long CCR1$/;"	l
CCR1_A	board/renesas/rsk7264/lowlevel_init.S	/^CCR1_A:		.long CCR1$/;"	l
CCR1_A	board/renesas/rsk7269/lowlevel_init.S	/^CCR1_A:		.long CCR1$/;"	l
CCR1_D	board/renesas/rsk7203/lowlevel_init.S	/^CCR1_D:		.long 0x0000090B$/;"	l
CCR1_D	board/renesas/rsk7264/lowlevel_init.S	/^CCR1_D:		.long 0x0000090B$/;"	l
CCR1_D	board/renesas/rsk7269/lowlevel_init.S	/^CCR1_D:		.long 0x0000090B$/;"	l
CCRCOMPIO	arch/x86/cpu/quark/smc.h	/^#define CCRCOMPIO	/;"	d
CCRCOMPODT	arch/x86/cpu/quark/smc.h	/^#define CCRCOMPODT	/;"	d
CCR_16BIT	drivers/net/ks8851_mll.h	/^#define CCR_16BIT	/;"	d
CCR_32BIT	drivers/net/ks8851_mll.h	/^#define CCR_32BIT	/;"	d
CCR_32PIN	drivers/net/ks8851_mll.h	/^#define CCR_32PIN	/;"	d
CCR_8BIT	drivers/net/ks8851_mll.h	/^#define CCR_8BIT	/;"	d
CCR_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CCR_A:	.long	0xFF00001C$/;"	l
CCR_A	board/espt/lowlevel_init.S	/^CCR_A:		.long	0xFF00001C$/;"	l
CCR_A	board/ms7720se/lowlevel_init.S	/^CCR_A:		.long	0xFFFFFFEC$/;"	l
CCR_A	board/ms7722se/lowlevel_init.S	/^CCR_A:		.long	CCR$/;"	l
CCR_A	board/ms7750se/lowlevel_init.S	/^CCR_A:		 .long	CCR$/;"	l
CCR_A	board/renesas/MigoR/lowlevel_init.S	/^CCR_A:		.long	CCR$/;"	l
CCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CCR_A:		.long	0xff00001c$/;"	l
CCR_A	board/renesas/ecovec/lowlevel_init.S	/^CCR_A:		.long	CCR$/;"	l
CCR_A	board/renesas/r0p7734/lowlevel_init.S	/^CCR_A:	.long	0xFF00001C$/;"	l
CCR_A	board/renesas/r2dplus/lowlevel_init.S	/^CCR_A:		.long	CCR		\/* Cache Control Register *\/$/;"	l
CCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CCR_A:			.long	CCR$/;"	l
CCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^CCR_A:		.long	CCR$/;"	l
CCR_A	board/renesas/sh7753evb/lowlevel_init.S	/^CCR_A:		.long	CCR$/;"	l
CCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^CCR_A:		.long	CCR$/;"	l
CCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CCR_A:		.long	0xFF00001C$/;"	l
CCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CCR_A:		.long	0xff00001c$/;"	l
CCR_CACHE_D_2	board/espt/lowlevel_init.S	/^CCR_CACHE_D_2:	.long	0x00000103$/;"	l
CCR_CACHE_D_2	board/renesas/sh7763rdp/lowlevel_init.S	/^CCR_CACHE_D_2:	.long	0x00000103$/;"	l
CCR_CACHE_ENABLE	arch/sh/include/asm/cpu_sh2.h	/^#define CCR_CACHE_ENABLE	/;"	d
CCR_CACHE_ENABLE	arch/sh/include/asm/cpu_sh3.h	/^#define CCR_CACHE_ENABLE /;"	d
CCR_CACHE_ENABLE	arch/sh/include/asm/cpu_sh4.h	/^#define CCR_CACHE_ENABLE /;"	d
CCR_CACHE_ICI	arch/sh/include/asm/cpu_sh2.h	/^#define CCR_CACHE_ICI	/;"	d
CCR_CACHE_ICI	arch/sh/include/asm/cpu_sh3.h	/^#define CCR_CACHE_ICI /;"	d
CCR_CACHE_ICI	arch/sh/include/asm/cpu_sh4.h	/^#define CCR_CACHE_ICI /;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7706.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7710.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7720.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7722.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7723.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7724.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7734.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7750.h	/^#define CCR_CACHE_INIT /;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7752.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7753.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7757.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7763.h	/^#define CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7780.h	/^#define	CCR_CACHE_INIT	/;"	d
CCR_CACHE_INIT	arch/sh/include/asm/cpu_sh7785.h	/^#define	CCR_CACHE_INIT	/;"	d
CCR_CACHE_STOP	arch/sh/include/asm/cpu_sh2.h	/^#define CCR_CACHE_STOP	/;"	d
CCR_CACHE_STOP	arch/sh/include/asm/cpu_sh3.h	/^#define CCR_CACHE_STOP /;"	d
CCR_CACHE_STOP	arch/sh/include/asm/cpu_sh4.h	/^#define CCR_CACHE_STOP /;"	d
CCR_CEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_CEN /;"	d
CCR_CEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCR_CEN	/;"	d
CCR_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CCR_D:	.long	0x0000090B$/;"	l
CCR_D	board/ms7720se/lowlevel_init.S	/^CCR_D:		.long	0x0000000B$/;"	l
CCR_D	board/ms7722se/lowlevel_init.S	/^CCR_D:		.long	0x00000800$/;"	l
CCR_D	board/renesas/MigoR/lowlevel_init.S	/^CCR_D:		.long	0x00000800$/;"	l
CCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CCR_D:		.long	0x0000090d$/;"	l
CCR_D	board/renesas/ecovec/lowlevel_init.S	/^CCR_D:		.long	0x0000090B$/;"	l
CCR_D	board/renesas/r0p7734/lowlevel_init.S	/^CCR_D:	.long	0x0000090B$/;"	l
CCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CCR_D:			.long	0x0000090b$/;"	l
CCR_D	board/renesas/sh7752evb/lowlevel_init.S	/^CCR_D:		.long	CCR_CACHE_INIT$/;"	l
CCR_D	board/renesas/sh7753evb/lowlevel_init.S	/^CCR_D:		.long	CCR_CACHE_INIT$/;"	l
CCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^CCR_D:		.long	CCR_CACHE_INIT$/;"	l
CCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CCR_D:		.long	0x0000090b$/;"	l
CCR_DMOD_2D	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DMOD_2D /;"	d
CCR_DMOD_EOBFIFO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DMOD_EOBFIFO /;"	d
CCR_DMOD_FIFO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DMOD_FIFO /;"	d
CCR_DMOD_LINEAR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DMOD_LINEAR /;"	d
CCR_DSIZ_16	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DSIZ_16 /;"	d
CCR_DSIZ_32	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DSIZ_32 /;"	d
CCR_DSIZ_8	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_DSIZ_8 /;"	d
CCR_DST_AMODE_CONSTANT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_DST_AMODE_CONSTANT /;"	d
CCR_DST_AMODE_POST_INC	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_DST_AMODE_POST_INC /;"	d
CCR_DST_AMODE_SINGLE_IDX	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_DST_AMODE_SINGLE_IDX /;"	d
CCR_DST_AMODE_SOUBLE_IDX	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_DST_AMODE_SOUBLE_IDX /;"	d
CCR_D_2	board/ms7722se/lowlevel_init.S	/^CCR_D_2:	.long	0x00000103$/;"	l
CCR_D_2	board/renesas/MigoR/lowlevel_init.S	/^CCR_D_2:	.long	0x00000103$/;"	l
CCR_D_2	board/renesas/r7780mp/lowlevel_init.S	/^CCR_D_2:		.long	0x00000103$/;"	l
CCR_D_D	board/renesas/r2dplus/lowlevel_init.S	/^CCR_D_D:	.long	0x0808		\/* Flush the cache, disable *\/$/;"	l
CCR_D_DISABLE	board/ms7750se/lowlevel_init.S	/^CCR_D_DISABLE:	.long	0x0808$/;"	l
CCR_D_E	board/renesas/r2dplus/lowlevel_init.S	/^CCR_D_E:	.long	0x8000090B$/;"	l
CCR_EEPROM	drivers/net/ks8851_mll.h	/^#define CCR_EEPROM	/;"	d
CCR_ENABLE_DISABLED	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_ENABLE_DISABLED /;"	d
CCR_ENABLE_ENABLE	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_ENABLE_ENABLE /;"	d
CCR_FRC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_FRC /;"	d
CCR_HOUR	drivers/rtc/x1205.c	/^#define CCR_HOUR	/;"	d	file:
CCR_MDAY	drivers/rtc/x1205.c	/^#define CCR_MDAY	/;"	d	file:
CCR_MDIR_DEC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_MDIR_DEC /;"	d
CCR_MIN	drivers/rtc/x1205.c	/^#define CCR_MIN	/;"	d	file:
CCR_MONTH	drivers/rtc/x1205.c	/^#define CCR_MONTH	/;"	d	file:
CCR_MSEL_B	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_MSEL_B /;"	d
CCR_RD_ACTIVE_MASK	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_RD_ACTIVE_MASK /;"	d
CCR_READ_PRIORITY_HIGH	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_READ_PRIORITY_HIGH /;"	d
CCR_READ_PRIORITY_LOW	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_READ_PRIORITY_LOW /;"	d
CCR_REN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_REN /;"	d
CCR_RPT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_RPT /;"	d
CCR_SEC	drivers/rtc/x1205.c	/^#define CCR_SEC	/;"	d	file:
CCR_SHARED	drivers/net/ks8851_mll.h	/^#define CCR_SHARED	/;"	d
CCR_SMOD_2D	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SMOD_2D /;"	d
CCR_SMOD_EOBFIFO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SMOD_EOBFIFO /;"	d
CCR_SMOD_FIFO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SMOD_FIFO /;"	d
CCR_SMOD_LINEAR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SMOD_LINEAR /;"	d
CCR_SPI	drivers/net/ks8851_mll.h	/^#define CCR_SPI	/;"	d
CCR_SRC_AMODE_CONSTANT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_SRC_AMODE_CONSTANT /;"	d
CCR_SRC_AMODE_DOUBLE_IDX	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_SRC_AMODE_DOUBLE_IDX /;"	d
CCR_SRC_AMODE_POST_INC	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_SRC_AMODE_POST_INC /;"	d
CCR_SRC_AMODE_SINGLE_IDX	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_SRC_AMODE_SINGLE_IDX /;"	d
CCR_SSIZ_16	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SSIZ_16 /;"	d
CCR_SSIZ_32	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SSIZ_32 /;"	d
CCR_SSIZ_8	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CCR_SSIZ_8 /;"	d
CCR_WDAY	drivers/rtc/x1205.c	/^#define CCR_WDAY	/;"	d	file:
CCR_WR_ACTIVE_MASK	arch/arm/include/asm/arch-omap3/dma.h	/^#define CCR_WR_ACTIVE_MASK /;"	d
CCR_Y2K	drivers/rtc/x1205.c	/^#define CCR_Y2K	/;"	d	file:
CCR_YEAR	drivers/rtc/x1205.c	/^#define CCR_YEAR	/;"	d	file:
CCSIDR_ASSOCIATIVITY_MASK	arch/arm/include/asm/armv7.h	/^#define CCSIDR_ASSOCIATIVITY_MASK	/;"	d
CCSIDR_ASSOCIATIVITY_OFFSET	arch/arm/include/asm/armv7.h	/^#define CCSIDR_ASSOCIATIVITY_OFFSET	/;"	d
CCSIDR_LINE_SIZE_MASK	arch/arm/include/asm/armv7.h	/^#define CCSIDR_LINE_SIZE_MASK	/;"	d
CCSIDR_LINE_SIZE_OFFSET	arch/arm/include/asm/armv7.h	/^#define CCSIDR_LINE_SIZE_OFFSET	/;"	d
CCSIDR_NUM_SETS_MASK	arch/arm/include/asm/armv7.h	/^#define CCSIDR_NUM_SETS_MASK	/;"	d
CCSIDR_NUM_SETS_OFFSET	arch/arm/include/asm/armv7.h	/^#define CCSIDR_NUM_SETS_OFFSET	/;"	d
CCSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CCSR	/;"	d
CCSRAR_C	arch/powerpc/cpu/mpc85xx/start.S	/^#define CCSRAR_C	/;"	d	file:
CCSRAR_C	arch/powerpc/include/asm/immap_85xx.h	/^#define CCSRAR_C	/;"	d
CCSRBAR_LAWAR	arch/powerpc/cpu/mpc85xx/start.S	/^#define CCSRBAR_LAWAR	/;"	d	file:
CCSRBAR_PHYS_RS12	arch/powerpc/cpu/mpc85xx/start.S	/^#define CCSRBAR_PHYS_RS12 /;"	d	file:
CCSR_BRR_OFFSET	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCSR_BRR_OFFSET	/;"	d
CCSR_GICC_CTLR	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define CCSR_GICC_CTLR	/;"	d	file:
CCSR_GICD_CTLR	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define CCSR_GICD_CTLR	/;"	d	file:
CCSR_LAWBARH0	arch/powerpc/cpu/mpc85xx/start.S	/^#define CCSR_LAWBARH0	/;"	d	file:
CCSR_SCRATCHRW1_OFFSET	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CCSR_SCRATCHRW1_OFFSET	/;"	d
CCSR_VIRT_TO_PHYS	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define CCSR_VIRT_TO_PHYS(/;"	d	file:
CCTIMINGCTL	arch/x86/cpu/quark/smc.h	/^#define CCTIMINGCTL	/;"	d
CCVISACONTROLCR	arch/x86/cpu/quark/smc.h	/^#define CCVISACONTROLCR	/;"	d
CCVISALANECR0	arch/x86/cpu/quark/smc.h	/^#define CCVISALANECR0	/;"	d
CCVISALANECR1	arch/x86/cpu/quark/smc.h	/^#define CCVISALANECR1	/;"	d
CC_AE	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_AE	/;"	d
CC_AT	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_AT	/;"	d
CC_CF	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_CF	/;"	d
CC_CFE	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_CFE	/;"	d
CC_C_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define CC_C_BIT	/;"	d
CC_D	include/sym53c8xx.h	/^	#define   CC_D	/;"	d
CC_ES_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_ES_MASK	/;"	d
CC_ES_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_ES_SHIFT	/;"	d
CC_HD	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_HD	/;"	d
CC_HD_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_HD_SHIFT	/;"	d
CC_MASK	arch/arm/include/asm/omap_mmc.h	/^#define CC_MASK	/;"	d
CC_ML	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_ML	/;"	d
CC_NLC	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_NLC	/;"	d
CC_N_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define CC_N_BIT	/;"	d
CC_OPTIMIZE_FOR_SIZE	Kconfig	/^config CC_OPTIMIZE_FOR_SIZE$/;"	c	menu:General setup
CC_OPTIMIZE_LIBS_FOR_SPEED	lib/Kconfig	/^config CC_OPTIMIZE_LIBS_FOR_SPEED$/;"	c	menu:Library routines
CC_PAD_EN	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_PAD_EN	/;"	d
CC_PE	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_PE	/;"	d
CC_PF	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_PF	/;"	d
CC_PROM	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_PROM	/;"	d
CC_RE	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_RE	/;"	d
CC_RED	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_RED	/;"	d
CC_RL	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_RL	/;"	d
CC_RPI	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_RPI	/;"	d
CC_SR	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_SR	/;"	d
CC_TAI	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_TAI	/;"	d
CC_TE	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_TE	/;"	d
CC_TPI	drivers/net/bcm-sf2-eth-gmac.h	/^#define CC_TPI	/;"	d
CC_VERSION_STRING	include/generated/version_autogenerated.h	/^#define CC_VERSION_STRING /;"	d
CC_V_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define CC_V_BIT	/;"	d
CC_Z_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define CC_Z_BIT	/;"	d
CDACR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDACR /;"	d
CDACR2	arch/sh/include/asm/cpu_sh7722.h	/^#define CDACR2 /;"	d
CDAYR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDAYR /;"	d
CDAYR2	arch/sh/include/asm/cpu_sh7722.h	/^#define CDAYR2 /;"	d
CDB	drivers/usb/gadget/storage_common.c	/^	u8	CDB[16];		\/* Command Data Block *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:u8[16]	file:
CDBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDBCR /;"	d
CDBCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define CDBCR2 /;"	d
CDBYR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDBYR /;"	d
CDBYR2	arch/sh/include/asm/cpu_sh7722.h	/^#define CDBYR2 /;"	d
CDCR	drivers/net/sh_eth.h	/^	CDCR,$/;"	e	enum:__anon5ef54f5a0103
CDC_PRODUCT_NUM	drivers/usb/gadget/ether.c	/^#define CDC_PRODUCT_NUM	/;"	d	file:
CDC_VENDOR_NUM	drivers/usb/gadget/ether.c	/^#define CDC_VENDOR_NUM	/;"	d	file:
CDDAR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDDAR /;"	d
CDDBG	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CDDBG	/;"	d
CDDCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDDCR /;"	d
CDID	include/linux/usb/ch9.h	/^	__u8 CDID[16];		\/* device id (unique w\/in host context) *\/$/;"	m	struct:usb_connection_context	typeref:typename:__u8[16]
CDID	include/linux/usb/ch9.h	/^	__u8 CDID[16];$/;"	m	struct:usb_handshake	typeref:typename:__u8[16]
CDMAC_BD_APP0_MADDRU_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP0_MADDRU_MASK	/;"	d
CDMAC_BD_APP0_MADDRU_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP0_MADDRU_POS	/;"	d
CDMAC_BD_APP0_TXCSCNTRL	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP0_TXCSCNTRL	/;"	d
CDMAC_BD_APP1_MADDRL_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP1_MADDRL_MASK	/;"	d
CDMAC_BD_APP1_MADDRL_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP1_MADDRL_POS	/;"	d
CDMAC_BD_APP1_TXCSBEGIN_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP1_TXCSBEGIN_MASK	/;"	d
CDMAC_BD_APP1_TXCSBEGIN_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP1_TXCSBEGIN_POS	/;"	d
CDMAC_BD_APP1_TXCSINSERT_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP1_TXCSINSERT_MASK	/;"	d
CDMAC_BD_APP1_TXCSINSERT_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP1_TXCSINSERT_POS	/;"	d
CDMAC_BD_APP2_BCAST_FRAME	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP2_BCAST_FRAME	/;"	d
CDMAC_BD_APP2_IPC_MCAST_FRAME	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP2_IPC_MCAST_FRAME	/;"	d
CDMAC_BD_APP2_MAC_MCAST_FRAME	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP2_MAC_MCAST_FRAME	/;"	d
CDMAC_BD_APP2_TXCSINIT_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP2_TXCSINIT_MASK	/;"	d
CDMAC_BD_APP2_TXCSINIT_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP2_TXCSINIT_POS	/;"	d
CDMAC_BD_APP3_RXCSRAW_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP3_RXCSRAW_MASK	/;"	d
CDMAC_BD_APP3_RXCSRAW_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP3_RXCSRAW_POS	/;"	d
CDMAC_BD_APP3_TLTPID_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP3_TLTPID_MASK	/;"	d
CDMAC_BD_APP3_TLTPID_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP3_TLTPID_POS	/;"	d
CDMAC_BD_APP4_RXBYTECNT_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP4_RXBYTECNT_MASK	/;"	d
CDMAC_BD_APP4_RXBYTECNT_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP4_RXBYTECNT_POS	/;"	d
CDMAC_BD_APP4_VLANTAG_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP4_VLANTAG_MASK	/;"	d
CDMAC_BD_APP4_VLANTAG_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_APP4_VLANTAG_POS	/;"	d
CDMAC_BD_STCTRL_COMPLETED	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_COMPLETED	/;"	d
CDMAC_BD_STCTRL_DMACHBUSY	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_DMACHBUSY	/;"	d
CDMAC_BD_STCTRL_EOP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_EOP	/;"	d
CDMAC_BD_STCTRL_ERROR	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_ERROR	/;"	d
CDMAC_BD_STCTRL_IRQ_ON_END	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_IRQ_ON_END	/;"	d
CDMAC_BD_STCTRL_SOP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_SOP	/;"	d
CDMAC_BD_STCTRL_STOP_ON_END	drivers/net/xilinx_ll_temac_sdma.h	/^#define CDMAC_BD_STCTRL_STOP_ON_END	/;"	d
CDMR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CDMR1 /;"	d
CDMR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CDMR1	/;"	d
CDNS_I2C_CONTROL_ACKEN	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_ACKEN	/;"	d	file:
CDNS_I2C_CONTROL_CLR_FIFO	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_CLR_FIFO	/;"	d	file:
CDNS_I2C_CONTROL_DIV_A_MASK	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_DIV_A_MASK	/;"	d	file:
CDNS_I2C_CONTROL_DIV_A_SHIFT	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_DIV_A_SHIFT	/;"	d	file:
CDNS_I2C_CONTROL_DIV_B_MASK	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_DIV_B_MASK	/;"	d	file:
CDNS_I2C_CONTROL_DIV_B_SHIFT	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_DIV_B_SHIFT	/;"	d	file:
CDNS_I2C_CONTROL_HOLD	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_HOLD	/;"	d	file:
CDNS_I2C_CONTROL_MS	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_MS	/;"	d	file:
CDNS_I2C_CONTROL_NEA	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_NEA	/;"	d	file:
CDNS_I2C_CONTROL_RW	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_RW	/;"	d	file:
CDNS_I2C_CONTROL_SLVMON	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_CONTROL_SLVMON	/;"	d	file:
CDNS_I2C_DIVA_MAX	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_DIVA_MAX	/;"	d	file:
CDNS_I2C_DIVB_MAX	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_DIVB_MAX	/;"	d	file:
CDNS_I2C_FIFO_DEPTH	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_FIFO_DEPTH	/;"	d	file:
CDNS_I2C_INTERRUPT_ARBLOST	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_ARBLOST	/;"	d	file:
CDNS_I2C_INTERRUPT_COMP	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_COMP	/;"	d	file:
CDNS_I2C_INTERRUPT_DATA	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_DATA	/;"	d	file:
CDNS_I2C_INTERRUPT_NACK	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_NACK	/;"	d	file:
CDNS_I2C_INTERRUPT_RXOVF	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_RXOVF	/;"	d	file:
CDNS_I2C_INTERRUPT_RXUNF	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_RXUNF	/;"	d	file:
CDNS_I2C_INTERRUPT_SLVRDY	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_SLVRDY	/;"	d	file:
CDNS_I2C_INTERRUPT_TO	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_TO	/;"	d	file:
CDNS_I2C_INTERRUPT_TXOVF	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_INTERRUPT_TXOVF	/;"	d	file:
CDNS_I2C_STATUS_BA	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_STATUS_BA	/;"	d	file:
CDNS_I2C_STATUS_RXDV	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_STATUS_RXDV	/;"	d	file:
CDNS_I2C_STATUS_RXOVF	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_STATUS_RXOVF	/;"	d	file:
CDNS_I2C_STATUS_TXDV	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_STATUS_TXDV	/;"	d	file:
CDNS_I2C_TRANSFER_SIZE_MAX	drivers/i2c/i2c-cdns.c	/^#define CDNS_I2C_TRANSFER_SIZE_MAX	/;"	d	file:
CDOCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDOCR /;"	d
CDP	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
CDPRIO	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CDPRIO	/;"	d
CDPRIO_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CDPRIO_P	/;"	d
CDP_ACTIVEHIGH	arch/arm/include/asm/omap_mmc.h	/^#define CDP_ACTIVEHIGH	/;"	d
CDP_ADDRESS_TLV	net/cdp.c	/^#define CDP_ADDRESS_TLV	/;"	d	file:
CDP_APPLIANCE_VLAN_TLV	net/cdp.c	/^#define CDP_APPLIANCE_VLAN_TLV	/;"	d	file:
CDP_CAPABILITIES_TLV	net/cdp.c	/^#define CDP_CAPABILITIES_TLV	/;"	d	file:
CDP_DEVICE_ID_TLV	net/cdp.c	/^#define CDP_DEVICE_ID_TLV	/;"	d	file:
CDP_MANAGEMENT_ADDRESS_TLV	net/cdp.c	/^#define CDP_MANAGEMENT_ADDRESS_TLV	/;"	d	file:
CDP_NATIVE_VLAN_TLV	net/cdp.c	/^#define CDP_NATIVE_VLAN_TLV	/;"	d	file:
CDP_PLATFORM_TLV	net/cdp.c	/^#define CDP_PLATFORM_TLV	/;"	d	file:
CDP_PORT_ID_TLV	net/cdp.c	/^#define CDP_PORT_ID_TLV	/;"	d	file:
CDP_POWER_CONSUMPTION_TLV	net/cdp.c	/^#define CDP_POWER_CONSUMPTION_TLV	/;"	d	file:
CDP_SYSNAME_TLV	net/cdp.c	/^#define CDP_SYSNAME_TLV	/;"	d	file:
CDP_SYSOBJECT_TLV	net/cdp.c	/^#define CDP_SYSOBJECT_TLV	/;"	d	file:
CDP_TIMEOUT	net/cdp.c	/^#define CDP_TIMEOUT	/;"	d	file:
CDP_TRIGGER_TLV	net/cdp.c	/^#define CDP_TRIGGER_TLV	/;"	d	file:
CDP_VERSION_TLV	net/cdp.c	/^#define CDP_VERSION_TLV	/;"	d	file:
CDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CDR1 /;"	d
CDR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CDR1	/;"	d
CDRATIO_x1	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define CDRATIO_x1	/;"	d
CDRATIO_x2	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define CDRATIO_x2	/;"	d
CDRATIO_x4	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define CDRATIO_x4	/;"	d
CDRATIO_x8	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define CDRATIO_x8	/;"	d
CDRU_IOMUX_FORCE_PAD_IN_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define CDRU_IOMUX_FORCE_PAD_IN_SHIFT	/;"	d
CDRU_SWITCH_BYPASS_SWITCH_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define CDRU_SWITCH_BYPASS_SWITCH_SHIFT	/;"	d
CDR_DIV	drivers/i2c/fti2c010.h	/^#define CDR_DIV(/;"	d
CDSN_CTRL_ALE	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_ALE	/;"	d
CDSN_CTRL_CE	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_CE	/;"	d
CDSN_CTRL_CLE	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_CLE	/;"	d
CDSN_CTRL_ECC_IO	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_ECC_IO	/;"	d
CDSN_CTRL_FLASH_IO	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_FLASH_IO	/;"	d
CDSN_CTRL_FR_B	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_FR_B	/;"	d
CDSN_CTRL_FR_B0	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_FR_B0	/;"	d
CDSN_CTRL_FR_B1	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_FR_B1	/;"	d
CDSN_CTRL_WP	include/linux/mtd/doc2000.h	/^#define CDSN_CTRL_WP	/;"	d
CDWDR	arch/sh/include/asm/cpu_sh7722.h	/^#define CDWDR /;"	d
CD_CLKCTRL_CLKTRCTRL_HW_AUTO	arch/arm/include/asm/arch-omap4/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_HW_AUTO	/;"	d
CD_CLKCTRL_CLKTRCTRL_HW_AUTO	arch/arm/include/asm/arch-omap5/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_HW_AUTO	/;"	d
CD_CLKCTRL_CLKTRCTRL_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_MASK	/;"	d
CD_CLKCTRL_CLKTRCTRL_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_MASK	/;"	d
CD_CLKCTRL_CLKTRCTRL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_MASK	/;"	d
CD_CLKCTRL_CLKTRCTRL_NO_SLEEP	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_NO_SLEEP	/;"	d
CD_CLKCTRL_CLKTRCTRL_NO_SLEEP	arch/arm/include/asm/arch-omap4/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_NO_SLEEP	/;"	d
CD_CLKCTRL_CLKTRCTRL_NO_SLEEP	arch/arm/include/asm/arch-omap5/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_NO_SLEEP	/;"	d
CD_CLKCTRL_CLKTRCTRL_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SHIFT	/;"	d
CD_CLKCTRL_CLKTRCTRL_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SHIFT	/;"	d
CD_CLKCTRL_CLKTRCTRL_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SHIFT	/;"	d
CD_CLKCTRL_CLKTRCTRL_SW_SLEEP	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SW_SLEEP	/;"	d
CD_CLKCTRL_CLKTRCTRL_SW_SLEEP	arch/arm/include/asm/arch-omap4/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SW_SLEEP	/;"	d
CD_CLKCTRL_CLKTRCTRL_SW_SLEEP	arch/arm/include/asm/arch-omap5/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SW_SLEEP	/;"	d
CD_CLKCTRL_CLKTRCTRL_SW_WKUP	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SW_WKUP	/;"	d
CD_CLKCTRL_CLKTRCTRL_SW_WKUP	arch/arm/include/asm/arch-omap4/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SW_WKUP	/;"	d
CD_CLKCTRL_CLKTRCTRL_SW_WKUP	arch/arm/include/asm/arch-omap5/clock.h	/^#define CD_CLKCTRL_CLKTRCTRL_SW_WKUP	/;"	d
CD_SECTSIZE	disk/part_iso.c	/^#define CD_SECTSIZE /;"	d	file:
CE0	arch/arm/include/asm/arch-tegra/pmc.h	/^#define CE0	/;"	d
CEA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CEA$/;"	e	enum:dynamic_range
CEA	arch/arm/mach-exynos/include/mach/dp_info.h	/^	CEA$/;"	e	enum:__anon79d8640c0303
CEC_I2C_ADDR	board/gdsys/common/adv7611.c	/^	CEC_I2C_ADDR = 0x40,$/;"	e	enum:__anon3d55bc280103	file:
CEC_PINMUX	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define CEC_PINMUX(/;"	d
CEECR	drivers/net/sh_eth.h	/^	CEECR,$/;"	e	enum:__anon5ef54f5a0103
CEFCR	drivers/net/sh_eth.h	/^	CEFCR,$/;"	e	enum:__anon5ef54f5a0103
CEH_NORMAL_CE	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define CEH_NORMAL_CE /;"	d	file:
CEIER	arch/sh/include/asm/cpu_sh7722.h	/^#define CEIER /;"	d
CEIL_DIVIDE	drivers/ddr/marvell/a38x/ddr3_training.c	/^#define CEIL_DIVIDE(/;"	d	file:
CENTRALIZATION_RX	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	CENTRALIZATION_RX,$/;"	e	enum:auto_tune_stage
CENTRALIZATION_RX_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define CENTRALIZATION_RX_MASK_BIT	/;"	d
CENTRALIZATION_TX	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	CENTRALIZATION_TX,$/;"	e	enum:auto_tune_stage
CENTRALIZATION_TX_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define CENTRALIZATION_TX_MASK_BIT	/;"	d
CENTRAL_RX	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^#define CENTRAL_RX	/;"	d	file:
CENTRAL_TX	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^#define CENTRAL_TX	/;"	d	file:
CENTURY	drivers/rtc/mvrtc.c	/^#define CENTURY /;"	d	file:
CEN_DISABLE	arch/arm/include/asm/omap_mmc.h	/^#define CEN_DISABLE	/;"	d
CEN_ENABLE	arch/arm/include/asm/omap_mmc.h	/^#define CEN_ENABLE	/;"	d
CEN_MASK	arch/arm/include/asm/omap_mmc.h	/^#define CEN_MASK	/;"	d
CERCR	drivers/net/sh_eth.h	/^	CERCR,$/;"	e	enum:__anon5ef54f5a0103
CETCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CETCR /;"	d
CETON_devices	cmd/ambapp.c	/^static ambapp_device_name CETON_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
CETR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CETR1 /;"	d
CETR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CETR1	/;"	d
CEVA_FLAG_BROKEN_GEN2	drivers/block/sata_ceva.c	/^#define CEVA_FLAG_BROKEN_GEN2	/;"	d	file:
CE_DONT_CARE_SUPPORT	drivers/mtd/nand/denali.h	/^#define CE_DONT_CARE_SUPPORT /;"	d
CFATR_CACHE	arch/m68k/include/asm/m5329.h	/^#define CFATR_CACHE	/;"	d
CFATR_MODE	arch/m68k/include/asm/m5329.h	/^#define CFATR_MODE	/;"	d
CFATR_SZ08	arch/m68k/include/asm/m5329.h	/^#define CFATR_SZ08	/;"	d
CFATR_SZ16	arch/m68k/include/asm/m5329.h	/^#define CFATR_SZ16	/;"	d
CFATR_SZ32	arch/m68k/include/asm/m5329.h	/^#define CFATR_SZ32	/;"	d
CFATR_TYPE	arch/m68k/include/asm/m5329.h	/^#define CFATR_TYPE	/;"	d
CFATR_WRITE	arch/m68k/include/asm/m5329.h	/^#define CFATR_WRITE	/;"	d
CFB_CONSOLE	drivers/video/Kconfig	/^config CFB_CONSOLE$/;"	c	menu:Graphics support
CFB_CONSOLE_ANSI	drivers/video/Kconfig	/^config CFB_CONSOLE_ANSI$/;"	c	menu:Graphics support
CFCDINTCLR_EN	board/renesas/r2dplus/r2dplus.c	/^#define CFCDINTCLR_EN	/;"	d	file:
CFCTL_EN	board/renesas/r2dplus/r2dplus.c	/^#define CFCTL_EN	/;"	d	file:
CFC_RACC	include/faraday/ftpmu010.h	/^	unsigned int	CFC_RACC;	\/* 0xA0 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
CFGCHIP2_DATPOL	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_DATPOL /;"	d
CFGCHIP2_FORCE_DEVICE	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_FORCE_DEVICE /;"	d
CFGCHIP2_FORCE_HOST	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_FORCE_HOST	/;"	d
CFGCHIP2_FORCE_HOST_VBUS_LOW	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_FORCE_HOST_VBUS_LOW /;"	d
CFGCHIP2_NO_OVERRIDE	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_NO_OVERRIDE	/;"	d
CFGCHIP2_OTGMODE	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_OTGMODE	/;"	d
CFGCHIP2_OTGPWRDN	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_OTGPWRDN	/;"	d
CFGCHIP2_PHYCLKGD	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_PHYCLKGD	/;"	d
CFGCHIP2_PHYPWRDN	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_PHYPWRDN	/;"	d
CFGCHIP2_PHY_PLLON	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_PHY_PLLON	/;"	d
CFGCHIP2_REFFREQ	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_REFFREQ	/;"	d
CFGCHIP2_REFFREQ_12MHZ	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_REFFREQ_12MHZ	/;"	d
CFGCHIP2_REFFREQ_24MHZ	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_REFFREQ_24MHZ	/;"	d
CFGCHIP2_REFFREQ_48MHZ	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_REFFREQ_48MHZ	/;"	d
CFGCHIP2_RESET	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_RESET	/;"	d
CFGCHIP2_SESENDEN	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_SESENDEN	/;"	d
CFGCHIP2_USB1PHYCLKMUX	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_USB1PHYCLKMUX	/;"	d
CFGCHIP2_USB1SUSPENDM	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_USB1SUSPENDM	/;"	d
CFGCHIP2_USB2PHYCLKMUX	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_USB2PHYCLKMUX	/;"	d
CFGCHIP2_VBDTCTEN	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_VBDTCTEN	/;"	d
CFGCHIP2_VBUSSENSE	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define CFGCHIP2_VBUSSENSE	/;"	d
CFGCON	arch/mips/mach-pic32/include/mach/pic32.h	/^#define CFGCON	/;"	d
CFGEBIA	arch/mips/mach-pic32/include/mach/pic32.h	/^#define CFGEBIA	/;"	d
CFGEBIC	arch/mips/mach-pic32/include/mach/pic32.h	/^#define CFGEBIC	/;"	d
CFGMISCCH0	arch/x86/cpu/quark/smc.h	/^#define CFGMISCCH0	/;"	d
CFGMPLL	arch/mips/mach-pic32/include/mach/pic32.h	/^#define CFGMPLL	/;"	d
CFGPG	arch/mips/mach-pic32/include/mach/pic32.h	/^#define CFGPG	/;"	d
CFGTEST	arch/arm/mach-davinci/lowlevel_init.S	/^CFGTEST:$/;"	l
CFG_0	drivers/mtd/nand/tegra_nand.h	/^#define CFG_0	/;"	d
CFG_83XX_DDR_USES_CS0	include/configs/km/km83xx-common.h	/^#define CFG_83XX_DDR_USES_CS0$/;"	d
CFG_ALT_MEMTEST	include/configs/intip.h	/^#define CFG_ALT_MEMTEST$/;"	d
CFG_ALT_MEMTEST	include/configs/t3corp.h	/^#define CFG_ALT_MEMTEST$/;"	d
CFG_AUTOLOAD	include/configs/blackvme.h	/^#define CFG_AUTOLOAD	/;"	d
CFG_BUS_WIDTH_16BIT	drivers/mtd/nand/tegra_nand.h	/^#define CFG_BUS_WIDTH_16BIT	/;"	d
CFG_BUS_WIDTH_8BIT	drivers/mtd/nand/tegra_nand.h	/^#define CFG_BUS_WIDTH_8BIT	/;"	d
CFG_BUS_WIDTH_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_BUS_WIDTH_MASK	/;"	d
CFG_CE_LOW	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CFG_CE_LOW	/;"	d	file:
CFG_CLK_SRC_CXO	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CFG_CLK_SRC_CXO /;"	d	file:
CFG_CLK_SRC_GPLL0	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CFG_CLK_SRC_GPLL0 /;"	d	file:
CFG_CLK_SRC_MASK	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CFG_CLK_SRC_MASK /;"	d	file:
CFG_CMD_TIMEOUT	drivers/mmc/ftsdc010_mci.c	/^#define CFG_CMD_TIMEOUT /;"	d	file:
CFG_CMD_TIMEOUT	drivers/usb/gadget/fotg210.c	/^#define CFG_CMD_TIMEOUT /;"	d	file:
CFG_COMMAND	tools/aisimage.h	/^	CFG_COMMAND,$/;"	e	enum:aisimage_fld_types
CFG_COMMAND	tools/imximage.h	/^	CFG_COMMAND,$/;"	e	enum:imximage_fld_types
CFG_COMMAND	tools/kwbimage.h	/^	CFG_COMMAND,$/;"	e	enum:kwbimage_cmd_types
CFG_COMMAND	tools/ublimage.h	/^	CFG_COMMAND,$/;"	e	enum:ublimage_fld_types
CFG_COM_BSY_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_COM_BSY_DISABLE	/;"	d
CFG_COM_BSY_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_COM_BSY_ENABLE	/;"	d
CFG_COM_BSY_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_COM_BSY_MASK	/;"	d
CFG_CONSOLE_IS_IN_ENV	include/configs/icon.h	/^#define CFG_CONSOLE_IS_IN_ENV$/;"	d
CFG_DATA0	tools/kwbimage.h	/^	CFG_DATA0,$/;"	e	enum:kwbimage_cmd_types
CFG_DATA1	tools/kwbimage.h	/^	CFG_DATA1$/;"	e	enum:kwbimage_cmd_types
CFG_DIVIDER_MASK	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CFG_DIVIDER_MASK /;"	d	file:
CFG_DMA_BURST	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CFG_DMA_BURST	/;"	d	file:
CFG_DMA_DIR	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CFG_DMA_DIR	/;"	d	file:
CFG_DMA_ECC	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CFG_DMA_ECC	/;"	d	file:
CFG_ECC_EN	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CFG_ECC_EN	/;"	d	file:
CFG_ECC_EN_TAG_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_ECC_EN_TAG_DISABLE	/;"	d
CFG_ECC_EN_TAG_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_ECC_EN_TAG_ENABLE	/;"	d
CFG_ECC_EN_TAG_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_ECC_EN_TAG_MASK	/;"	d
CFG_EDO_MODE_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_EDO_MODE_DISABLE	/;"	d
CFG_EDO_MODE_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_EDO_MODE_ENABLE	/;"	d
CFG_EDO_MODE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_EDO_MODE_MASK	/;"	d
CFG_EEPROM	board/keymile/km_arm/fpga_config.c	/^#define CFG_EEPROM	/;"	d	file:
CFG_EP0_MAX_PACKET_SIZE	drivers/usb/gadget/fotg210.c	/^#define CFG_EP0_MAX_PACKET_SIZE	/;"	d	file:
CFG_EPX_MAX_PACKET_SIZE	drivers/usb/gadget/fotg210.c	/^#define CFG_EPX_MAX_PACKET_SIZE	/;"	d	file:
CFG_FLASH_CLK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_FLASH_CLK	/;"	d
CFG_FLASH_CS_NC	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_FLASH_CS_NC	/;"	d
CFG_GPIOB_16_UART_TX	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOB_16_UART_TX	/;"	d
CFG_GPIOB_17_UART_RX	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOB_17_UART_RX	/;"	d
CFG_GPIOC_30_MODE_HIGH	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOC_30_MODE_HIGH	/;"	d
CFG_GPIOC_30_MODE_LOW	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOC_30_MODE_LOW	/;"	d
CFG_GPIOC_30_UART_TX	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOC_30_UART_TX	/;"	d
CFG_GPIOC_31_MODE_OD	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOC_31_MODE_OD	/;"	d
CFG_GPIOC_31_MODE_PP	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOC_31_MODE_PP	/;"	d
CFG_GPIOC_31_UART_RX	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define CFG_GPIOC_31_UART_RX	/;"	d
CFG_HW_ECC_CORRECTION_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_CORRECTION_DISABLE	/;"	d
CFG_HW_ECC_CORRECTION_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_CORRECTION_ENABLE	/;"	d
CFG_HW_ECC_CORRECTION_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_CORRECTION_MASK	/;"	d
CFG_HW_ECC_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_DISABLE	/;"	d
CFG_HW_ECC_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_ENABLE	/;"	d
CFG_HW_ECC_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_MASK	/;"	d
CFG_HW_ECC_SEL_HAMMING	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_SEL_HAMMING	/;"	d
CFG_HW_ECC_SEL_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_SEL_MASK	/;"	d
CFG_HW_ECC_SEL_RS	drivers/mtd/nand/tegra_nand.h	/^#define CFG_HW_ECC_SEL_RS	/;"	d
CFG_INVALID	tools/aisimage.h	/^	CFG_INVALID = -1,$/;"	e	enum:aisimage_fld_types
CFG_INVALID	tools/imximage.h	/^	CFG_INVALID = -1,$/;"	e	enum:imximage_fld_types
CFG_INVALID	tools/kwbimage.h	/^	CFG_INVALID = -1,$/;"	e	enum:kwbimage_cmd_types
CFG_INVALID	tools/ublimage.h	/^	CFG_INVALID = -1,$/;"	e	enum:ublimage_fld_types
CFG_IODELAY_LOCK_KEY	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_IODELAY_LOCK_KEY	/;"	d
CFG_IODELAY_UNLOCK_KEY	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_IODELAY_UNLOCK_KEY	/;"	d
CFG_LINKUP_TIMEOUT	drivers/net/ftmac110.c	/^#define CFG_LINKUP_TIMEOUT /;"	d	file:
CFG_LPDDR1_MODE_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_LPDDR1_MODE_DISABLE	/;"	d
CFG_LPDDR1_MODE_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_LPDDR1_MODE_ENABLE	/;"	d
CFG_LPDDR1_MODE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_LPDDR1_MODE_MASK	/;"	d
CFG_LPUART_EN	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_LPUART_EN	/;"	d	file:
CFG_MAC_ADDR_OFFSET	board/davinci/da8xxevm/da850evm.c	/^#define CFG_MAC_ADDR_OFFSET	/;"	d	file:
CFG_MAC_ADDR_OFFSET	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define CFG_MAC_ADDR_OFFSET	/;"	d	file:
CFG_MAC_ADDR_SPI_BUS	board/davinci/da8xxevm/da850evm.c	/^#define CFG_MAC_ADDR_SPI_BUS	/;"	d	file:
CFG_MAC_ADDR_SPI_BUS	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define CFG_MAC_ADDR_SPI_BUS	/;"	d	file:
CFG_MAC_ADDR_SPI_CS	board/davinci/da8xxevm/da850evm.c	/^#define CFG_MAC_ADDR_SPI_CS	/;"	d	file:
CFG_MAC_ADDR_SPI_CS	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define CFG_MAC_ADDR_SPI_CS	/;"	d	file:
CFG_MAC_ADDR_SPI_MAX_HZ	board/davinci/da8xxevm/da850evm.c	/^#define CFG_MAC_ADDR_SPI_MAX_HZ	/;"	d	file:
CFG_MAC_ADDR_SPI_MAX_HZ	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define CFG_MAC_ADDR_SPI_MAX_HZ	/;"	d	file:
CFG_MAC_ADDR_SPI_MODE	board/davinci/da8xxevm/da850evm.c	/^#define CFG_MAC_ADDR_SPI_MODE	/;"	d	file:
CFG_MAC_ADDR_SPI_MODE	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define CFG_MAC_ADDR_SPI_MODE	/;"	d	file:
CFG_MASK	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CFG_MASK /;"	d	file:
CFG_MDIORD_TIMEOUT	drivers/net/ftmac110.c	/^#define CFG_MDIORD_TIMEOUT /;"	d	file:
CFG_MDIOWR_TIMEOUT	drivers/net/ftmac110.c	/^#define CFG_MDIOWR_TIMEOUT /;"	d	file:
CFG_MFG_ADDR_OFFSET	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define CFG_MFG_ADDR_OFFSET	/;"	d	file:
CFG_MODE_DUAL_EDGE	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define CFG_MODE_DUAL_EDGE /;"	d	file:
CFG_MONITOR_BASE	include/configs/pm9263.h	/^#define CFG_MONITOR_BASE	/;"	d
CFG_NUM_ENDPOINTS	drivers/usb/gadget/fotg210.c	/^#define CFG_NUM_ENDPOINTS	/;"	d	file:
CFG_PAGE_SIZE_1024	drivers/mtd/nand/tegra_nand.h	/^	CFG_PAGE_SIZE_1024	= 2 << 16,$/;"	e	enum:__anonf17bc6a00403
CFG_PAGE_SIZE_2048	drivers/mtd/nand/tegra_nand.h	/^	CFG_PAGE_SIZE_2048	= 3 << 16,$/;"	e	enum:__anonf17bc6a00403
CFG_PAGE_SIZE_256	drivers/mtd/nand/tegra_nand.h	/^	CFG_PAGE_SIZE_256	= 0 << 16,$/;"	e	enum:__anonf17bc6a00403
CFG_PAGE_SIZE_4096	drivers/mtd/nand/tegra_nand.h	/^	CFG_PAGE_SIZE_4096	= 4 << 16$/;"	e	enum:__anonf17bc6a00403
CFG_PAGE_SIZE_512	drivers/mtd/nand/tegra_nand.h	/^	CFG_PAGE_SIZE_512	= 1 << 16,$/;"	e	enum:__anonf17bc6a00403
CFG_PAGE_SIZE_SEL_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_PAGE_SIZE_SEL_MASK	/;"	d
CFG_PIPELINE_EN_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_PIPELINE_EN_DISABLE	/;"	d
CFG_PIPELINE_EN_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_PIPELINE_EN_ENABLE	/;"	d
CFG_PIPELINE_EN_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_PIPELINE_EN_MASK	/;"	d
CFG_PLLCTL0_BWADJ_BITS	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_BWADJ_BITS	/;"	d
CFG_PLLCTL0_BWADJ_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_BWADJ_MASK	/;"	d
CFG_PLLCTL0_BWADJ_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_BWADJ_SHIFT	/;"	d
CFG_PLLCTL0_BYPASS_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_BYPASS_MASK	/;"	d
CFG_PLLCTL0_BYPASS_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_BYPASS_SHIFT	/;"	d
CFG_PLLCTL0_CLKOD_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_CLKOD_MASK	/;"	d
CFG_PLLCTL0_CLKOD_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_CLKOD_SHIFT	/;"	d
CFG_PLLCTL0_PLLD_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_PLLD_MASK	/;"	d
CFG_PLLCTL0_PLLD_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_PLLD_SHIFT	/;"	d
CFG_PLLCTL0_PLLM_HI_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_PLLM_HI_MASK	/;"	d
CFG_PLLCTL0_PLLM_HI_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_PLLM_HI_SHIFT	/;"	d
CFG_PLLCTL0_PLLM_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_PLLM_MASK	/;"	d
CFG_PLLCTL0_PLLM_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL0_PLLM_SHIFT	/;"	d
CFG_PLLCTL1_BWADJ_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_BWADJ_MASK	/;"	d
CFG_PLLCTL1_BWADJ_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_BWADJ_SHIFT	/;"	d
CFG_PLLCTL1_ENSAT_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_ENSAT_MASK	/;"	d
CFG_PLLCTL1_ENSAT_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_ENSAT_SHIFT	/;"	d
CFG_PLLCTL1_PAPLL_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_PAPLL_MASK	/;"	d
CFG_PLLCTL1_PAPLL_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_PAPLL_SHIFT	/;"	d
CFG_PLLCTL1_RST_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_RST_MASK	/;"	d
CFG_PLLCTL1_RST_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define CFG_PLLCTL1_RST_SHIFT	/;"	d
CFG_REG	board/birdland/bav335x/mux.c	/^#define CFG_REG	/;"	d	file:
CFG_REG	board/ti/am335x/mux.c	/^#define CFG_REG	/;"	d	file:
CFG_REGS	drivers/ddr/fsl/interactive.c	/^#define CFG_REGS(/;"	d	file:
CFG_REGS_CS	drivers/ddr/fsl/interactive.c	/^#define CFG_REGS_CS(/;"	d	file:
CFG_REG_0_OFFSET	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_0_OFFSET	/;"	d
CFG_REG_2_OFFSET	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_2_OFFSET	/;"	d
CFG_REG_3_OFFSET	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_3_OFFSET	/;"	d
CFG_REG_4_OFFSET	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_4_OFFSET	/;"	d
CFG_REG_8_OFFSET	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_8_OFFSET	/;"	d
CFG_REG_ADDRESS	tools/imximage.h	/^	CFG_REG_ADDRESS,$/;"	e	enum:imximage_fld_types
CFG_REG_CALIB_END	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_CALIB_END	/;"	d
CFG_REG_CALIB_STRT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_CALIB_STRT	/;"	d
CFG_REG_CALIB_STRT_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_CALIB_STRT_MASK	/;"	d
CFG_REG_CALIB_STRT_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_CALIB_STRT_SHIFT	/;"	d
CFG_REG_DLY_CNT_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_DLY_CNT_MASK	/;"	d
CFG_REG_DLY_CNT_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_DLY_CNT_SHIFT	/;"	d
CFG_REG_REFCLK_PERIOD	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_REFCLK_PERIOD	/;"	d
CFG_REG_REFCLK_PERIOD_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_REFCLK_PERIOD_MASK	/;"	d
CFG_REG_REFCLK_PERIOD_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_REFCLK_PERIOD_SHIFT	/;"	d
CFG_REG_REF_CNT_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_REF_CNT_MASK	/;"	d
CFG_REG_REF_CNT_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_REF_CNT_SHIFT	/;"	d
CFG_REG_ROM_READ_END	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_ROM_READ_END	/;"	d
CFG_REG_ROM_READ_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_ROM_READ_MASK	/;"	d
CFG_REG_ROM_READ_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_ROM_READ_SHIFT	/;"	d
CFG_REG_ROM_READ_START	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_REG_ROM_READ_START	/;"	d
CFG_REG_SIZE	tools/imximage.h	/^	CFG_REG_SIZE,$/;"	e	enum:imximage_fld_types
CFG_REG_VALUE	tools/imximage.h	/^	CFG_REG_VALUE$/;"	e	enum:imximage_fld_types
CFG_REG_VALUE	tools/ublimage.h	/^	CFG_REG_VALUE$/;"	e	enum:ublimage_fld_types
CFG_RST_TIMEOUT	drivers/mmc/ftsdc010_mci.c	/^#define CFG_RST_TIMEOUT /;"	d	file:
CFG_RXDES_NUM	drivers/net/ftmac110.c	/^#define CFG_RXDES_NUM /;"	d	file:
CFG_SD_MUX1_SLOT1	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX1_SLOT1	/;"	d	file:
CFG_SD_MUX1_SLOT2	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX1_SLOT2	/;"	d	file:
CFG_SD_MUX2_SLOT1	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX2_SLOT1	/;"	d	file:
CFG_SD_MUX2_SLOT3	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX2_SLOT3	/;"	d	file:
CFG_SD_MUX3_MUX4	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX3_MUX4	/;"	d	file:
CFG_SD_MUX3_SLOT4	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX3_SLOT4	/;"	d	file:
CFG_SD_MUX4_SLOT1	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX4_SLOT1	/;"	d	file:
CFG_SD_MUX4_SLOT3	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_SD_MUX4_SLOT3	/;"	d	file:
CFG_SKIP_SPARE_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_SKIP_SPARE_DISABLE	/;"	d
CFG_SKIP_SPARE_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CFG_SKIP_SPARE_ENABLE	/;"	d
CFG_SKIP_SPARE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_SKIP_SPARE_MASK	/;"	d
CFG_SKIP_SPARE_SEL_12	drivers/mtd/nand/tegra_nand.h	/^	CFG_SKIP_SPARE_SEL_12	= 2 << 14,$/;"	e	enum:__anonf17bc6a00503
CFG_SKIP_SPARE_SEL_16	drivers/mtd/nand/tegra_nand.h	/^	CFG_SKIP_SPARE_SEL_16	= 3 << 14$/;"	e	enum:__anonf17bc6a00503
CFG_SKIP_SPARE_SEL_4	drivers/mtd/nand/tegra_nand.h	/^	CFG_SKIP_SPARE_SEL_4	= 0 << 14,$/;"	e	enum:__anonf17bc6a00503
CFG_SKIP_SPARE_SEL_8	drivers/mtd/nand/tegra_nand.h	/^	CFG_SKIP_SPARE_SEL_8	= 1 << 14,$/;"	e	enum:__anonf17bc6a00503
CFG_SKIP_SPARE_SEL_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_SKIP_SPARE_SEL_MASK	/;"	d
CFG_STATE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define CFG_STATE	/;"	d
CFG_STATE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CFG_STATE			= 1,$/;"	e	enum:__anon957231910203	file:
CFG_TAG_BYTE_SIZE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_TAG_BYTE_SIZE_MASK	/;"	d
CFG_TVAL4	drivers/mtd/nand/tegra_nand.h	/^	CFG_TVAL4 = 0 << 24,$/;"	e	enum:__anonf17bc6a00303
CFG_TVAL6	drivers/mtd/nand/tegra_nand.h	/^	CFG_TVAL6 = 1 << 24,$/;"	e	enum:__anonf17bc6a00303
CFG_TVAL8	drivers/mtd/nand/tegra_nand.h	/^	CFG_TVAL8 = 2 << 24$/;"	e	enum:__anonf17bc6a00303
CFG_TVALUE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CFG_TVALUE_MASK	/;"	d
CFG_TXDES_NUM	drivers/net/ftmac110.c	/^#define CFG_TXDES_NUM /;"	d	file:
CFG_UART_MUX_MASK	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_UART_MUX_MASK	/;"	d	file:
CFG_UART_MUX_SHIFT	board/freescale/ls1043aqds/ls1043aqds.c	/^#define CFG_UART_MUX_SHIFT	/;"	d	file:
CFG_VALUE	tools/aisimage.h	/^	CFG_VALUE,$/;"	e	enum:aisimage_fld_types
CFG_XBUF_SIZE	drivers/net/ftgmac100.c	/^#define CFG_XBUF_SIZE	/;"	d	file:
CFG_XBUF_SIZE	drivers/net/ftmac110.c	/^#define CFG_XBUF_SIZE /;"	d	file:
CFG_X_COARSE_DLY_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_COARSE_DLY_MASK	/;"	d
CFG_X_COARSE_DLY_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_COARSE_DLY_SHIFT	/;"	d
CFG_X_FINE_DLY_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_FINE_DLY_MASK	/;"	d
CFG_X_FINE_DLY_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_FINE_DLY_SHIFT	/;"	d
CFG_X_LOCK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_LOCK	/;"	d
CFG_X_LOCK_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_LOCK_MASK	/;"	d
CFG_X_LOCK_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_LOCK_SHIFT	/;"	d
CFG_X_SIGNATURE	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_SIGNATURE	/;"	d
CFG_X_SIGNATURE_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_SIGNATURE_MASK	/;"	d
CFG_X_SIGNATURE_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CFG_X_SIGNATURE_SHIFT	/;"	d
CFIER_ECFEI	arch/m68k/include/asm/m5329.h	/^#define CFIER_ECFEI	/;"	d
CFIFO	drivers/usb/host/r8a66597.h	/^#define CFIFO	/;"	d
CFIFOCTR	drivers/usb/host/r8a66597.h	/^#define CFIFOCTR	/;"	d
CFIFOSEL	drivers/usb/host/r8a66597.h	/^#define CFIFOSEL	/;"	d
CFIFOSIE	drivers/usb/host/r8a66597.h	/^#define CFIFOSIE	/;"	d
CFIFO_ERR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define CFIFO_ERR /;"	d
CFIFO_RXFLUSH	drivers/serial/serial_lpuart.c	/^#define CFIFO_RXFLUSH	/;"	d	file:
CFIFO_TXFLUSH	drivers/serial/serial_lpuart.c	/^#define CFIFO_TXFLUSH	/;"	d	file:
CFI_CMDSET_AMD_EXTENDED	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_AMD_EXTENDED	/;"	d
CFI_CMDSET_AMD_LEGACY	include/flash.h	/^#define CFI_CMDSET_AMD_LEGACY	/;"	d
CFI_CMDSET_AMD_STANDARD	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_AMD_STANDARD	/;"	d
CFI_CMDSET_INTEL_EXTENDED	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_INTEL_EXTENDED	/;"	d
CFI_CMDSET_INTEL_PROG_REGIONS	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_INTEL_PROG_REGIONS	/;"	d
CFI_CMDSET_INTEL_STANDARD	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_INTEL_STANDARD	/;"	d
CFI_CMDSET_MITSU_EXTENDED	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_MITSU_EXTENDED	/;"	d
CFI_CMDSET_MITSU_STANDARD	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_MITSU_STANDARD	/;"	d
CFI_CMDSET_NONE	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_NONE	/;"	d
CFI_CMDSET_SST	include/mtd/cfi_flash.h	/^#define CFI_CMDSET_SST	/;"	d
CFI_FLASH	drivers/mtd/Kconfig	/^config CFI_FLASH$/;"	c	menu:MTD Support
CFI_FLASH_SHIFT_WIDTH	include/flash.h	/^#define CFI_FLASH_SHIFT_WIDTH	/;"	d
CFI_MAX_FLASH_BANKS	include/mtd/cfi_flash.h	/^#define CFI_MAX_FLASH_BANKS	/;"	d
CFLAGS_EFI	arch/x86/config.mk	/^CFLAGS_EFI := -fpic -fshort-wchar$/;"	m
CFLAGS_NON_EFI	arch/x86/config.mk	/^CFLAGS_NON_EFI := -mregparm=3$/;"	m
CFLAGS_REMOVE_efi.o	lib/efi/Makefile	/^CFLAGS_REMOVE_efi.o := -mregparm=3 \\$/;"	m
CFLAGS_REMOVE_efi_stub.o	lib/efi/Makefile	/^CFLAGS_REMOVE_efi_stub.o := -mregparm=3 \\$/;"	m
CFLAGS_REMOVE_initcode.o	arch/blackfin/cpu/Makefile	/^CFLAGS_REMOVE_initcode.o := -ffunction-sections -fdata-sections$/;"	m
CFLAGS_REMOVE_ps7_init_gpl.o	board/xilinx/zynq/Makefile	/^CFLAGS_REMOVE_ps7_init_gpl.o := -Wstrict-prototypes$/;"	m
CFLAGS_REMOVE_psu_init_gpl.o	board/xilinx/zynqmp/Makefile	/^CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes$/;"	m
CFLAGS_cache-cp15.o	arch/arm/lib/Makefile	/^CFLAGS_cache-cp15.o := -marm$/;"	m
CFLAGS_cache.o	arch/arm/cpu/arm926ejs/Makefile	/^CFLAGS_cache.o := -marm$/;"	m
CFLAGS_cache.o	arch/arm/lib/Makefile	/^CFLAGS_cache.o := -marm$/;"	m
CFLAGS_cache.o	arch/arm/mach-kirkwood/Makefile	/^CFLAGS_cache.o := -marm$/;"	m
CFLAGS_cpu.o	arch/arm/cpu/arm920t/Makefile	/^CFLAGS_cpu.o := -marm$/;"	m
CFLAGS_cpu.o	arch/arm/cpu/arm926ejs/Makefile	/^CFLAGS_cpu.o := -marm$/;"	m
CFLAGS_cpu.o	arch/arm/mach-kirkwood/Makefile	/^CFLAGS_cpu.o := -marm$/;"	m
CFLAGS_cpu.o	arch/arm/mach-orion5x/Makefile	/^CFLAGS_cpu.o := -marm$/;"	m
CFLAGS_display_options.o	lib/Makefile	/^CFLAGS_display_options.o := $(if $(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"')$/;"	m
CFLAGS_efi.o	lib/efi/Makefile	/^CFLAGS_efi.o := -fpic -fshort-wchar$/;"	m
CFLAGS_efi_stub.o	lib/efi/Makefile	/^CFLAGS_efi_stub.o := -fpic -fshort-wchar$/;"	m
CFLAGS_env_embedded.o	common/Makefile	/^CFLAGS_env_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools\/envcrc 2>\/dev\/null)$/;"	m
CFLAGS_ps7_init_gpl.o	board/xilinx/zynq/Makefile	/^CFLAGS_ps7_init_gpl.o := -I$(srctree)\/$(src)$/;"	m
CFLAGS_psu_init_gpl.o	board/xilinx/zynqmp/Makefile	/^CFLAGS_psu_init_gpl.o := -I$(srctree)\/$(src)$/;"	m
CFLAGS_stubs.o	examples/standalone/Makefile	/^CFLAGS_stubs.o := -marm$/;"	m
CFLAGS_warmboot_avp.o	arch/arm/mach-tegra/tegra20/Makefile	/^CFLAGS_warmboot_avp.o = -march=armv4t -U__LINUX_ARM_ARCH__ \\$/;"	m
CFLCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CFLCR /;"	d
CFLOC_LOC	arch/m68k/include/asm/m5329.h	/^#define CFLOC_LOC	/;"	d
CFPOW_ON	board/renesas/r2dplus/r2dplus.c	/^#define CFPOW_ON	/;"	d	file:
CFRV_RN	drivers/net/dc2114x.c	/^#define CFRV_RN	/;"	d	file:
CFSZR	arch/sh/include/asm/cpu_sh7722.h	/^#define CFSZR /;"	d
CFS_MASK	drivers/spi/rk_spi.h	/^	CFS_MASK	= 0xf,$/;"	e	enum:__anondde5bacc0103
CFS_SHIFT	drivers/spi/rk_spi.h	/^	CFS_SHIFT	= 2,	\/* Control Frame Size *\/$/;"	e	enum:__anondde5bacc0103
CFS_SRAM0_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define CFS_SRAM0_BASE_ADDR /;"	d
CFS_SRAM1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define CFS_SRAM1_BASE_ADDR /;"	d
CF_ACR_ADR	arch/m68k/include/asm/cache.h	/^#define CF_ACR_ADR(/;"	d
CF_ACR_ADRMSK	arch/m68k/include/asm/cache.h	/^#define CF_ACR_ADRMSK(/;"	d
CF_ACR_ADRMSK_UNMASK	arch/m68k/include/asm/cache.h	/^#define CF_ACR_ADRMSK_UNMASK	/;"	d
CF_ACR_ADR_UNMASK	arch/m68k/include/asm/cache.h	/^#define CF_ACR_ADR_UNMASK	/;"	d
CF_ACR_AMM	arch/m68k/include/asm/cache.h	/^#define CF_ACR_AMM	/;"	d
CF_ACR_BWE	arch/m68k/include/asm/cache.h	/^#define CF_ACR_BWE	/;"	d
CF_ACR_CM	arch/m68k/include/asm/cache.h	/^#define CF_ACR_CM	/;"	d
CF_ACR_CM_CB	arch/m68k/include/asm/cache.h	/^#define CF_ACR_CM_CB	/;"	d
CF_ACR_CM_IP	arch/m68k/include/asm/cache.h	/^#define CF_ACR_CM_IP	/;"	d
CF_ACR_CM_P	arch/m68k/include/asm/cache.h	/^#define CF_ACR_CM_P	/;"	d
CF_ACR_CM_UNMASK	arch/m68k/include/asm/cache.h	/^#define CF_ACR_CM_UNMASK	/;"	d
CF_ACR_CM_WT	arch/m68k/include/asm/cache.h	/^#define CF_ACR_CM_WT	/;"	d
CF_ACR_EN	arch/m68k/include/asm/cache.h	/^#define CF_ACR_EN	/;"	d
CF_ACR_SM_ALL	arch/m68k/include/asm/cache.h	/^#define CF_ACR_SM_ALL	/;"	d
CF_ACR_SM_SM	arch/m68k/include/asm/cache.h	/^#define CF_ACR_SM_SM	/;"	d
CF_ACR_SM_UM	arch/m68k/include/asm/cache.h	/^#define CF_ACR_SM_UM	/;"	d
CF_ACR_SM_UNMASK	arch/m68k/include/asm/cache.h	/^#define CF_ACR_SM_UNMASK	/;"	d
CF_ACR_SP	arch/m68k/include/asm/cache.h	/^#define CF_ACR_SP	/;"	d
CF_ACR_WP	arch/m68k/include/asm/cache.h	/^#define CF_ACR_WP	/;"	d
CF_ADDRMASK	arch/m68k/include/asm/cache.h	/^#define CF_ADDRMASK(/;"	d
CF_BASE	include/configs/MPC8641HPCN.h	/^#define CF_BASE	/;"	d
CF_BASE_PHYS	include/configs/MPC8641HPCN.h	/^#define CF_BASE_PHYS	/;"	d
CF_CACR_BCINVA	arch/m68k/include/asm/cache.h	/^#define CF_CACR_BCINVA	/;"	d
CF_CACR_BEC	arch/m68k/include/asm/cache.h	/^#define CF_CACR_BEC	/;"	d
CF_CACR_CEIB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_CEIB	/;"	d
CF_CACR_CENB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_CENB	/;"	d
CF_CACR_CFRZ	arch/m68k/include/asm/cache.h	/^#define CF_CACR_CFRZ	/;"	d
CF_CACR_CINV	arch/m68k/include/asm/cache.h	/^#define CF_CACR_CINV	/;"	d
CF_CACR_CINVA	arch/m68k/include/asm/cache.h	/^#define CF_CACR_CINVA	/;"	d
CF_CACR_CPD	arch/m68k/include/asm/cache.h	/^#define CF_CACR_CPD	/;"	d
CF_CACR_DBWE	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DBWE	/;"	d
CF_CACR_DCINVA	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCINVA	/;"	d
CF_CACR_DCM	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCM	/;"	d
CF_CACR_DCM_CB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCM_CB	/;"	d
CF_CACR_DCM_IP	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCM_IP	/;"	d
CF_CACR_DCM_P	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCM_P	/;"	d
CF_CACR_DCM_UNMASK	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCM_UNMASK	/;"	d
CF_CACR_DCM_WT	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DCM_WT	/;"	d
CF_CACR_DDCM_CB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDCM_CB	/;"	d
CF_CACR_DDCM_IP	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDCM_IP	/;"	d
CF_CACR_DDCM_P	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDCM_P	/;"	d
CF_CACR_DDCM_UNMASK	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDCM_UNMASK	/;"	d
CF_CACR_DDCM_WT	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDCM_WT	/;"	d
CF_CACR_DDPI	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDPI	/;"	d
CF_CACR_DDSP	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DDSP	/;"	d
CF_CACR_DEC	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DEC	/;"	d
CF_CACR_DESB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DESB	/;"	d
CF_CACR_DF	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DF	/;"	d
CF_CACR_DHLCK	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DHLCK	/;"	d
CF_CACR_DISD	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DISD	/;"	d
CF_CACR_DISI	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DISI	/;"	d
CF_CACR_DNFB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DNFB	/;"	d
CF_CACR_DPI	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DPI	/;"	d
CF_CACR_DW	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DW	/;"	d
CF_CACR_DWP	arch/m68k/include/asm/cache.h	/^#define CF_CACR_DWP	/;"	d
CF_CACR_EC	arch/m68k/include/asm/cache.h	/^#define CF_CACR_EC	/;"	d
CF_CACR_ESB	arch/m68k/include/asm/cache.h	/^#define CF_CACR_ESB	/;"	d
CF_CACR_EUSP	arch/m68k/include/asm/cache.h	/^#define CF_CACR_EUSP	/;"	d
CF_CACR_HLCK	arch/m68k/include/asm/cache.h	/^#define CF_CACR_HLCK	/;"	d
CF_CACR_ICINVA	arch/m68k/include/asm/cache.h	/^#define CF_CACR_ICINVA	/;"	d
CF_CACR_IDCM	arch/m68k/include/asm/cache.h	/^#define CF_CACR_IDCM	/;"	d
CF_CACR_IDPI	arch/m68k/include/asm/cache.h	/^#define CF_CACR_IDPI	/;"	d
CF_CACR_IDSP	arch/m68k/include/asm/cache.h	/^#define CF_CACR_IDSP	/;"	d
CF_CACR_IEC	arch/m68k/include/asm/cache.h	/^#define CF_CACR_IEC	/;"	d
CF_CACR_IHLCK	arch/m68k/include/asm/cache.h	/^#define CF_CACR_IHLCK	/;"	d
CF_CACR_INVD	arch/m68k/include/asm/cache.h	/^#define CF_CACR_INVD	/;"	d
CF_CACR_INVI	arch/m68k/include/asm/cache.h	/^#define CF_CACR_INVI	/;"	d
CF_CACR_IVO	arch/m68k/include/asm/cache.h	/^#define CF_CACR_IVO	/;"	d
CF_CACR_SPA	arch/m68k/include/asm/cache.h	/^#define CF_CACR_SPA	/;"	d
CF_STAT_BITS	board/bf533-stamp/ide-cf.c	/^#define CF_STAT_BITS	/;"	d	file:
CG	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define CG	/;"	d
CG	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define CG	/;"	d
CGET	arch/microblaze/include/asm/asm.h	/^#define CGET(/;"	d
CGM_ACn_DCm	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define CGM_ACn_DCm(/;"	d
CGM_ACn_SC	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define CGM_ACn_SC(/;"	d
CGM_ACn_SS	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define CGM_ACn_SS(/;"	d
CGM_CMU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define CGM_CMU_BASE_ADDR	/;"	d
CGM_SC_DCn	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define CGM_SC_DCn(/;"	d
CGM_SC_SS	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define CGM_SC_SS(/;"	d
CGU_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define CGU_BASE_ADDR /;"	d
CGU_CLKOUTSEL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define CGU_CLKOUTSEL /;"	d
CGU_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define CGU_CTL /;"	d
CGU_DIV	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define CGU_DIV /;"	d
CGU_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define CGU_STAT /;"	d
CG_CTRL0_ENC_MASK	include/power/tps65090.h	/^	CG_CTRL0_ENC_MASK	= 0x01,$/;"	e	enum:__anon01d79aa50203
CG_PLL0_CTRL0	include/tsi108.h	/^#define CG_PLL0_CTRL0	/;"	d
CG_PLL0_CTRL1	include/tsi108.h	/^#define CG_PLL0_CTRL1	/;"	d
CG_PLL1_CTRL0	include/tsi108.h	/^#define CG_PLL1_CTRL0	/;"	d
CG_PLL1_CTRL1	include/tsi108.h	/^#define CG_PLL1_CTRL1	/;"	d
CG_PWRUP_STATUS	include/tsi108.h	/^#define CG_PWRUP_STATUS	/;"	d
CH	drivers/rtc/ds1302.c	/^	unsigned char CH:1;		\/* clock halt 1=stop 0=start *\/$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:1	file:
CH0_AMP_0_MV	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH0_AMP_0_MV	/;"	d
CH0_BLOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CH0_BLOCK,$/;"	e	enum:analog_power_block
CH0_BLOCK	arch/arm/mach-exynos/include/mach/dp_info.h	/^	CH0_BLOCK,$/;"	e	enum:analog_power_block
CH0_CH2_SWING_EMP_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CH0_CH2_SWING_EMP_CTRL	/;"	d
CH0_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH0_PD	/;"	d
CH0_TEST	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH0_TEST	/;"	d
CH1_AMP_0_MV	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH1_AMP_0_MV	/;"	d
CH1_BLOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CH1_BLOCK,$/;"	e	enum:analog_power_block
CH1_BLOCK	arch/arm/mach-exynos/include/mach/dp_info.h	/^	CH1_BLOCK,$/;"	e	enum:analog_power_block
CH1_CH3_SWING_EMP_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CH1_CH3_SWING_EMP_CTRL	/;"	d
CH1_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH1_PD	/;"	d
CH1_TEST	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH1_TEST	/;"	d
CH2_AMP_0_MV	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH2_AMP_0_MV	/;"	d
CH2_BLOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CH2_BLOCK,$/;"	e	enum:analog_power_block
CH2_BLOCK	arch/arm/mach-exynos/include/mach/dp_info.h	/^	CH2_BLOCK,$/;"	e	enum:analog_power_block
CH2_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH2_PD	/;"	d
CH3_AMP_0_MV	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH3_AMP_0_MV	/;"	d
CH3_BLOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CH3_BLOCK,$/;"	e	enum:analog_power_block
CH3_BLOCK	arch/arm/mach-exynos/include/mach/dp_info.h	/^	CH3_BLOCK,$/;"	e	enum:analog_power_block
CH3_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define CH3_PD	/;"	d
CH7301_CD	board/gdsys/common/ch7301.c	/^	CH7301_CD = 0x20,		\/* Connection Detect Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_CM	board/gdsys/common/ch7301.c	/^	CH7301_CM = 0x1c,		\/* Clock Mode Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_DC	board/gdsys/common/ch7301.c	/^	CH7301_DC = 0x21,		\/* DAC Control Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_DID	board/gdsys/common/ch7301.c	/^	CH7301_DID = 0x4b,		\/* Device ID Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_DSP	board/gdsys/common/ch7301.c	/^	CH7301_DSP = 0x56,		\/* DVI Sync polarity Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_GPIO	board/gdsys/common/ch7301.c	/^	CH7301_GPIO = 0x1e,		\/* GPIO Control Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_HPD	board/gdsys/common/ch7301.c	/^	CH7301_HPD = 0x23,		\/* Hot Plug Detection Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_I2C_ADDR	board/gdsys/common/ch7301.c	/^#define CH7301_I2C_ADDR /;"	d	file:
CH7301_IC	board/gdsys/common/ch7301.c	/^	CH7301_IC = 0x1d,		\/* Input Clock Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_IDF	board/gdsys/common/ch7301.c	/^	CH7301_IDF = 0x1f,		\/* Input Data Format Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_PM	board/gdsys/common/ch7301.c	/^	CH7301_PM = 0x49,		\/* Power Management register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TCT	board/gdsys/common/ch7301.c	/^	CH7301_TCT = 0x37,		\/* DVI Clock Test Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TCTL	board/gdsys/common/ch7301.c	/^	CH7301_TCTL = 0x31,		\/* DVI Control Input Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TPCP	board/gdsys/common/ch7301.c	/^	CH7301_TPCP = 0x33,		\/* DVI PLL Charge Pump Ctrl Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TPD	board/gdsys/common/ch7301.c	/^	CH7301_TPD = 0x34,		\/* DVI PLL Divide Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TPF	board/gdsys/common/ch7301.c	/^	CH7301_TPF = 0x36,		\/* DVI PLL Filter Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TPVT	board/gdsys/common/ch7301.c	/^	CH7301_TPVT = 0x35,		\/* DVI PLL Supply Control Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_TSTP	board/gdsys/common/ch7301.c	/^	CH7301_TSTP = 0x48,		\/* Test Pattern Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CH7301_VID	board/gdsys/common/ch7301.c	/^	CH7301_VID = 0x4a,		\/* Version ID Register *\/$/;"	e	enum:__anonf726c7d40103	file:
CHAIN_END	fs/zfs/zfs.c	/^#define	CHAIN_END	/;"	d	file:
CHANGELOG	Makefile	/^CHANGELOG:$/;"	t
CHANGE_PLL_SETTINGS	arch/arm/cpu/armv7/mx5/clock.c	/^#define CHANGE_PLL_SETTINGS(/;"	d	file:
CHAN_NONE	drivers/video/ipu.h	/^	CHAN_NONE = -1,$/;"	e	enum:__anon4a35f9fd0203
CHAN_NR_MAX	arch/arm/include/asm/arch-omap3/dma.h	/^#define CHAN_NR_MAX	/;"	d
CHAN_NR_MIN	arch/arm/include/asm/arch-omap3/dma.h	/^#define CHAN_NR_MIN	/;"	d
CHARGE	include/power/power_chrg.h	/^	CHARGE,$/;"	e	enum:__anond3b5e45a0203
CHARGERUSB_CINLIMIT	include/twl6030.h	/^#define CHARGERUSB_CINLIMIT	/;"	d
CHARGERUSB_CIN_LIMIT_100	include/twl6030.h	/^#define CHARGERUSB_CIN_LIMIT_100	/;"	d
CHARGERUSB_CIN_LIMIT_300	include/twl6030.h	/^#define CHARGERUSB_CIN_LIMIT_300	/;"	d
CHARGERUSB_CIN_LIMIT_500	include/twl6030.h	/^#define CHARGERUSB_CIN_LIMIT_500	/;"	d
CHARGERUSB_CIN_LIMIT_NONE	include/twl6030.h	/^#define CHARGERUSB_CIN_LIMIT_NONE	/;"	d
CHARGERUSB_CTRL1	include/twl6030.h	/^#define CHARGERUSB_CTRL1	/;"	d
CHARGERUSB_CTRL2	include/twl6030.h	/^#define CHARGERUSB_CTRL2	/;"	d
CHARGERUSB_CTRL2_VITERM_100	include/twl6030.h	/^#define CHARGERUSB_CTRL2_VITERM_100	/;"	d
CHARGERUSB_CTRL2_VITERM_150	include/twl6030.h	/^#define CHARGERUSB_CTRL2_VITERM_150	/;"	d
CHARGERUSB_CTRL2_VITERM_400	include/twl6030.h	/^#define CHARGERUSB_CTRL2_VITERM_400	/;"	d
CHARGERUSB_CTRL2_VITERM_50	include/twl6030.h	/^#define CHARGERUSB_CTRL2_VITERM_50	/;"	d
CHARGERUSB_CTRL3	include/twl6030.h	/^#define CHARGERUSB_CTRL3	/;"	d
CHARGERUSB_CTRLLIMIT1	include/twl6030.h	/^#define CHARGERUSB_CTRLLIMIT1	/;"	d
CHARGERUSB_INT_MASK	include/twl6030.h	/^#define CHARGERUSB_INT_MASK	/;"	d
CHARGERUSB_INT_STATUS	include/twl6030.h	/^#define CHARGERUSB_INT_STATUS	/;"	d
CHARGERUSB_STAT1	include/twl6030.h	/^#define CHARGERUSB_STAT1	/;"	d
CHARGERUSB_STATUS_INT1	include/twl6030.h	/^#define CHARGERUSB_STATUS_INT1	/;"	d
CHARGERUSB_STATUS_INT2	include/twl6030.h	/^#define CHARGERUSB_STATUS_INT2	/;"	d
CHARGERUSB_VICHRG	include/twl6030.h	/^#define CHARGERUSB_VICHRG	/;"	d
CHARGERUSB_VICHRG_1500	include/twl6030.h	/^#define CHARGERUSB_VICHRG_1500	/;"	d
CHARGERUSB_VICHRG_500	include/twl6030.h	/^#define CHARGERUSB_VICHRG_500	/;"	d
CHARGERUSB_VOREG	include/twl6030.h	/^#define CHARGERUSB_VOREG	/;"	d
CHARGERUSB_VOREG_3P52	include/twl6030.h	/^#define CHARGERUSB_VOREG_3P52	/;"	d
CHARGERUSB_VOREG_4P0	include/twl6030.h	/^#define CHARGERUSB_VOREG_4P0	/;"	d
CHARGERUSB_VOREG_4P2	include/twl6030.h	/^#define CHARGERUSB_VOREG_4P2	/;"	d
CHARGERUSB_VOREG_4P76	include/twl6030.h	/^#define CHARGERUSB_VOREG_4P76	/;"	d
CHARGER_CURRENT_RESOLUTION	include/power/max8997_pmic.h	/^#define CHARGER_CURRENT_RESOLUTION /;"	d
CHARGER_MAX_CURRENT	include/power/max77693_pmic.h	/^#define CHARGER_MAX_CURRENT /;"	d
CHARGER_MAX_CURRENT	include/power/max8997_pmic.h	/^#define CHARGER_MAX_CURRENT /;"	d
CHARGER_MIN_CURRENT	include/power/max77693_pmic.h	/^#define CHARGER_MIN_CURRENT /;"	d
CHARGER_MIN_CURRENT	include/power/max8997_pmic.h	/^#define CHARGER_MIN_CURRENT /;"	d
CHARGER_NO	include/power/power_chrg.h	/^	CHARGER_NO = 0,$/;"	e	enum:__anond3b5e45a0103
CHARGER_TA	include/power/power_chrg.h	/^	CHARGER_TA,$/;"	e	enum:__anond3b5e45a0103
CHARGER_TA_500	include/power/power_chrg.h	/^	CHARGER_TA_500,$/;"	e	enum:__anond3b5e45a0103
CHARGER_UNKNOWN	include/power/power_chrg.h	/^	CHARGER_UNKNOWN,$/;"	e	enum:__anond3b5e45a0103
CHARGER_USB	include/power/power_chrg.h	/^	CHARGER_USB,$/;"	e	enum:__anond3b5e45a0103
CHAR_PATH_SEPARATOR	lib/lzma/Types.h	/^#define CHAR_PATH_SEPARATOR /;"	d
CHA_CRI	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CHA_CRI(/;"	d
CHA_CRI	arch/arm/mach-exynos/include/mach/dp.h	/^#define CHA_CRI(/;"	d
CHA_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CHA_CTRL	/;"	d
CHA_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define CHA_CTRL	/;"	d
CHA_STA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CHA_STA	/;"	d
CHA_STA	arch/arm/mach-exynos/include/mach/dp.h	/^#define CHA_STA	/;"	d
CHCR0	arch/sh/include/asm/cpu_sh7750.h	/^#define CHCR0	/;"	d
CHCR1	arch/sh/include/asm/cpu_sh7750.h	/^#define CHCR1	/;"	d
CHCR2	arch/sh/include/asm/cpu_sh7750.h	/^#define CHCR2	/;"	d
CHCR3	arch/sh/include/asm/cpu_sh7750.h	/^#define CHCR3	/;"	d
CHCR_0	arch/sh/include/asm/cpu_sh7722.h	/^#define CHCR_0 /;"	d
CHCR_1	arch/sh/include/asm/cpu_sh7722.h	/^#define CHCR_1 /;"	d
CHCR_2	arch/sh/include/asm/cpu_sh7722.h	/^#define CHCR_2 /;"	d
CHCR_3	arch/sh/include/asm/cpu_sh7722.h	/^#define CHCR_3 /;"	d
CHCR_4	arch/sh/include/asm/cpu_sh7722.h	/^#define CHCR_4 /;"	d
CHCR_5	arch/sh/include/asm/cpu_sh7722.h	/^#define CHCR_5 /;"	d
CHECK	Makefile	/^CHECK		= sparse$/;"	m
CHECK	lib/fdtdec_test.c	/^#define CHECK(/;"	d	file:
CHECK	lib/zlib/inflate.h	/^    CHECK,      \/* i: waiting for 32-bit check value *\/$/;"	e	enum:__anon43d5a4c40103
CHECKEXTENSIONSPRESENT	include/linux/edd.h	/^#define CHECKEXTENSIONSPRESENT /;"	d
CHECKFLAGS	Makefile	/^CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \\$/;"	m
CHECKLIST_HEIGTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define CHECKLIST_HEIGTH_MIN /;"	d
CHECKLIST_WIDTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define CHECKLIST_WIDTH_MIN /;"	d
CHECKOK	lib/fdtdec_test.c	/^#define CHECKOK(/;"	d	file:
CHECKSUM_NONE	arch/x86/include/asm/coreboot_tables.h	/^#define CHECKSUM_NONE	/;"	d
CHECKSUM_OFFSET	board/samsung/smdkv310/tools/mksmdkv310spl.c	/^#define CHECKSUM_OFFSET	/;"	d	file:
CHECKSUM_OFFSET	tools/mkexynosspl.c	/^#define CHECKSUM_OFFSET	/;"	d	file:
CHECKSUM_PCBIOS	arch/x86/include/asm/coreboot_tables.h	/^#define CHECKSUM_PCBIOS	/;"	d
CHECKSUM_RESULT_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CHECKSUM_RESULT_ADDR	/;"	d
CHECKSUM_RESULT_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CHECKSUM_RESULT_ADDR	/;"	d
CHECKVAL	lib/fdtdec_test.c	/^#define CHECKVAL(/;"	d	file:
CHECK_CLUST	include/fat.h	/^#define CHECK_CLUST(/;"	d
CHECK_CTL	drivers/gpio/stm32_gpio.c	/^#define CHECK_CTL(/;"	d	file:
CHECK_DATA_ACCESS	drivers/bios_emulator/include/x86emu/debug.h	/^# define CHECK_DATA_ACCESS(/;"	d
CHECK_DATA_ACCESS_F	drivers/bios_emulator/include/x86emu/debug.h	/^#define CHECK_DATA_ACCESS_F	/;"	d
CHECK_DSC	drivers/gpio/stm32_gpio.c	/^#define CHECK_DSC(/;"	d	file:
CHECK_IDE_DEVICE	cmd/pcmcia.c	/^#define	CHECK_IDE_DEVICE$/;"	d	file:
CHECK_IP_FETCH	drivers/bios_emulator/include/x86emu/debug.h	/^# define CHECK_IP_FETCH(/;"	d
CHECK_IP_FETCH_F	drivers/bios_emulator/include/x86emu/debug.h	/^#define CHECK_IP_FETCH_F	/;"	d
CHECK_KEY_LEN	board/freescale/common/fsl_validate.c	/^#define CHECK_KEY_LEN(/;"	d	file:
CHECK_LED	board/inka4x0/inkadiag.c	/^#define CHECK_LED(/;"	d	file:
CHECK_MASK	drivers/adc/adc-uclass.c	/^#define CHECK_MASK	/;"	d	file:
CHECK_MEM_ACCESS	drivers/bios_emulator/include/x86emu/debug.h	/^# define CHECK_MEM_ACCESS(/;"	d
CHECK_MEM_ACCESS_F	drivers/bios_emulator/include/x86emu/debug.h	/^#define CHECK_MEM_ACCESS_F	/;"	d
CHECK_NACK	drivers/i2c/davinci_i2c.c	/^#define CHECK_NACK(/;"	d	file:
CHECK_NUMBER	drivers/adc/adc-uclass.c	/^#define CHECK_NUMBER	/;"	d	file:
CHECK_SP_ACCESS	drivers/bios_emulator/include/x86emu/debug.h	/^# define CHECK_SP_ACCESS(/;"	d
CHECK_SP_ACCESS_F	drivers/bios_emulator/include/x86emu/debug.h	/^#define CHECK_SP_ACCESS_F	/;"	d
CHECK_STATUS	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define CHECK_STATUS(/;"	d
CHGAUTOB	include/mc13892.h	/^#define CHGAUTOB	/;"	d
CHGAUTOVIB	include/mc13892.h	/^#define CHGAUTOVIB	/;"	d
CHGRESTART	include/mc13892.h	/^#define CHGRESTART	/;"	d
CHGTMRRST	include/mc13892.h	/^#define CHGTMRRST	/;"	d
CHG_PUMP_CUR_SEL_5US	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CHG_PUMP_CUR_SEL_5US	/;"	d
CHG_PUMP_INOUT_CTRL_1200MV	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CHG_PUMP_INOUT_CTRL_1200MV	/;"	d
CHG_PUMP_INPUT_CTRL_OP	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define CHG_PUMP_INPUT_CTRL_OP	/;"	d
CHID	include/linux/usb/ch9.h	/^	__u8 CHID[16];		\/* persistent host id *\/$/;"	m	struct:usb_connection_context	typeref:typename:__u8[16]
CHIP	drivers/hwmon/ds620.c	/^#define CHIP(/;"	d	file:
CHIP0_BASE	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP0_BASE	/;"	d
CHIP0_NOT_EMPTY	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP0_NOT_EMPTY	/;"	d
CHIP1_BASE	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP1_BASE	/;"	d
CHIP1_NOT_EMPTY	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP1_NOT_EMPTY	/;"	d
CHIPA_CHIP_ID_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define CHIPA_CHIP_ID_ADDR	/;"	d
CHIPID	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf548/BF542_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf548/BF544_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf548/BF547_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf548/BF548_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf548/BF549_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define CHIPID /;"	d
CHIPID	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define                           CHIPID /;"	d
CHIPID	drivers/net/bcm-sf2-eth-gmac.h	/^#define CHIPID	/;"	d
CHIPIDEA_USB2	drivers/usb/common/fsl-dt-fixup.c	/^#define CHIPIDEA_USB2	/;"	d	file:
CHIPID_FAMILY	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define                    CHIPID_FAMILY /;"	d
CHIPID_MANUFACTURE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define               CHIPID_MANUFACTURE /;"	d
CHIPID_TEGRA114	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define CHIPID_TEGRA114	/;"	d
CHIPID_TEGRA124	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define CHIPID_TEGRA124	/;"	d
CHIPID_TEGRA20	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define CHIPID_TEGRA20	/;"	d
CHIPID_TEGRA210	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define CHIPID_TEGRA210	/;"	d
CHIPID_TEGRA30	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define CHIPID_TEGRA30	/;"	d
CHIPID_VERSION	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define                   CHIPID_VERSION /;"	d
CHIPREV	drivers/net/bcm-sf2-eth-gmac.h	/^#define CHIPREV	/;"	d
CHIPSKU	drivers/net/bcm-sf2-eth-gmac.h	/^#define CHIPSKU	/;"	d
CHIP_89218	drivers/net/smc911x.h	/^#define CHIP_89218	/;"	d
CHIP_91100	drivers/net/smc91111.h	/^#define CHIP_91100	/;"	d
CHIP_91100FD	drivers/net/smc91111.h	/^#define CHIP_91100FD	/;"	d
CHIP_91111FD	drivers/net/smc91111.h	/^#define CHIP_91111FD	/;"	d
CHIP_9115	drivers/net/smc911x.h	/^#define CHIP_9115	/;"	d
CHIP_9116	drivers/net/smc911x.h	/^#define CHIP_9116	/;"	d
CHIP_9117	drivers/net/smc911x.h	/^#define CHIP_9117	/;"	d
CHIP_9118	drivers/net/smc911x.h	/^#define CHIP_9118	/;"	d
CHIP_9192	drivers/net/smc91111.h	/^#define CHIP_9192	/;"	d
CHIP_9194	drivers/net/smc91111.h	/^#define CHIP_9194	/;"	d
CHIP_9195	drivers/net/smc91111.h	/^#define CHIP_9195	/;"	d
CHIP_9196	drivers/net/smc91111.h	/^#define CHIP_9196	/;"	d
CHIP_9211	drivers/net/smc911x.h	/^#define CHIP_9211	/;"	d
CHIP_9215	drivers/net/smc911x.h	/^#define CHIP_9215	/;"	d
CHIP_9216	drivers/net/smc911x.h	/^#define CHIP_9216	/;"	d
CHIP_9217	drivers/net/smc911x.h	/^#define CHIP_9217	/;"	d
CHIP_9218	drivers/net/smc911x.h	/^#define CHIP_9218	/;"	d
CHIP_9220	drivers/net/smc911x.h	/^#define CHIP_9220	/;"	d
CHIP_9221	drivers/net/smc911x.h	/^#define CHIP_9221	/;"	d
CHIP_BANK_8	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP_BANK_8	/;"	d
CHIP_BASE_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CHIP_BASE_OFFSET	/;"	d
CHIP_COL_10	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP_COL_10	/;"	d
CHIP_DELAY_TIMEOUT	drivers/mtd/nand/pxa3xx_nand.c	/^#define	CHIP_DELAY_TIMEOUT	/;"	d	file:
CHIP_DRU_BASE	drivers/net/bcm-sf2-eth-gmac.h	/^#define CHIP_DRU_BASE	/;"	d
CHIP_ENABLE_DONT_CARE	drivers/mtd/nand/denali.h	/^#define CHIP_ENABLE_DONT_CARE	/;"	d
CHIP_EN_DONT_CARE__FLAG	drivers/mtd/nand/denali.h	/^#define     CHIP_EN_DONT_CARE__FLAG	/;"	d
CHIP_FAMILY_LAST	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_LAST,$/;"	e	enum:radeon_family
CHIP_FAMILY_LEGACY	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_LEGACY,$/;"	e	enum:radeon_family
CHIP_FAMILY_R200	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_R200,$/;"	e	enum:radeon_family
CHIP_FAMILY_R300	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_R300,$/;"	e	enum:radeon_family
CHIP_FAMILY_R350	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_R350,$/;"	e	enum:radeon_family
CHIP_FAMILY_R420	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_R420,     \/* R420\/R423\/M18 *\/$/;"	e	enum:radeon_family
CHIP_FAMILY_RADEON	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RADEON,$/;"	e	enum:radeon_family
CHIP_FAMILY_RS100	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RS100,    \/* U1 (IGP320M) or A3 (IGP320)*\/$/;"	e	enum:radeon_family
CHIP_FAMILY_RS200	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RS200,    \/* U2 (IGP330M\/340M\/350M) or A4 (IGP330\/340\/345\/350),$/;"	e	enum:radeon_family
CHIP_FAMILY_RS300	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RS300,    \/* Radeon 9000 IGP *\/$/;"	e	enum:radeon_family
CHIP_FAMILY_RV100	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RV100,$/;"	e	enum:radeon_family
CHIP_FAMILY_RV200	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RV200,$/;"	e	enum:radeon_family
CHIP_FAMILY_RV250	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RV250,$/;"	e	enum:radeon_family
CHIP_FAMILY_RV280	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RV280,$/;"	e	enum:radeon_family
CHIP_FAMILY_RV350	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RV350,$/;"	e	enum:radeon_family
CHIP_FAMILY_RV380	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_RV380,    \/* RV370\/RV380\/M22\/M24 *\/$/;"	e	enum:radeon_family
CHIP_FAMILY_UNKNOW	drivers/video/ati_radeon_fb.h	/^	CHIP_FAMILY_UNKNOW,$/;"	e	enum:radeon_family
CHIP_MAP_INTERLEAVED	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP_MAP_INTERLEAVED	/;"	d
CHIP_MASK	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP_MASK	/;"	d
CHIP_REV_1_0	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_1_0 /;"	d
CHIP_REV_1_0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CHIP_REV_1_0	/;"	d
CHIP_REV_1_1	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_1_1 /;"	d
CHIP_REV_1_2	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_1_2 /;"	d
CHIP_REV_1_5	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_1_5 /;"	d
CHIP_REV_2_0	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_2_0 /;"	d
CHIP_REV_2_0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CHIP_REV_2_0	/;"	d
CHIP_REV_2_5	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_2_5 /;"	d
CHIP_REV_3_0	arch/arm/include/asm/arch-imx/cpu.h	/^#define CHIP_REV_3_0 /;"	d
CHIP_REV_ID_REG	arch/arm/mach-davinci/include/mach/hardware.h	/^#define CHIP_REV_ID_REG	/;"	d
CHIP_ROW_14	arch/arm/mach-exynos/exynos4_setup.h	/^#define CHIP_ROW_14	/;"	d
CHIP_SELECT_END	board/micronas/vct/ebi.h	/^#define CHIP_SELECT_END	/;"	d
CHIP_SELECT_INVALID	drivers/mtd/nand/denali.c	/^#define CHIP_SELECT_INVALID	/;"	d	file:
CHIP_SELECT_START	board/micronas/vct/ebi.h	/^#define CHIP_SELECT_START	/;"	d
CHK	scripts/checkpatch.pl	/^sub CHK {$/;"	s
CHM	include/sym53c8xx.h	/^	#define   CHM /;"	d
CHNLBUFSTATIC	arch/x86/cpu/quark/smc.h	/^#define CHNLBUFSTATIC	/;"	d
CHNL_ACTIVE	drivers/mtd/nand/denali.h	/^#define CHNL_ACTIVE	/;"	d
CHNL_ACTIVE__CHANNEL0	drivers/mtd/nand/denali.h	/^#define     CHNL_ACTIVE__CHANNEL0	/;"	d
CHNL_ACTIVE__CHANNEL1	drivers/mtd/nand/denali.h	/^#define     CHNL_ACTIVE__CHANNEL1	/;"	d
CHNL_ACTIVE__CHANNEL2	drivers/mtd/nand/denali.h	/^#define     CHNL_ACTIVE__CHANNEL2	/;"	d
CHNL_ACTIVE__CHANNEL3	drivers/mtd/nand/denali.h	/^#define     CHNL_ACTIVE__CHANNEL3	/;"	d
CHNL_CTRL_AME	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_AME	/;"	d
CHNL_CTRL_ICE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_ICE	/;"	d
CHNL_CTRL_IC_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IC_MASK	/;"	d
CHNL_CTRL_IC_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IC_POS	/;"	d
CHNL_CTRL_IDE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IDE	/;"	d
CHNL_CTRL_IE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IE	/;"	d
CHNL_CTRL_IEE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IEE	/;"	d
CHNL_CTRL_IOE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IOE	/;"	d
CHNL_CTRL_IRQ_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_IRQ_MASK	/;"	d
CHNL_CTRL_ITO_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_ITO_MASK	/;"	d
CHNL_CTRL_ITO_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_ITO_POS	/;"	d
CHNL_CTRL_LIC	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_LIC	/;"	d
CHNL_CTRL_MSBADDR_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_MSBADDR_MASK	/;"	d
CHNL_CTRL_MSBADDR_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_MSBADDR_POS	/;"	d
CHNL_CTRL_OBWC	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_CTRL_OBWC	/;"	d
CHNL_STS_CMPLT	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_CMPLT	/;"	d
CHNL_STS_EBUSY	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_EBUSY	/;"	d
CHNL_STS_EOP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_EOP	/;"	d
CHNL_STS_ERROR	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR	/;"	d
CHNL_STS_ERROR_ADDR	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR_ADDR	/;"	d
CHNL_STS_ERROR_BSYWR	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR_BSYWR	/;"	d
CHNL_STS_ERROR_CMP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR_CMP	/;"	d
CHNL_STS_ERROR_CURP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR_CURP	/;"	d
CHNL_STS_ERROR_NXTP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR_NXTP	/;"	d
CHNL_STS_ERROR_TAIL	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_ERROR_TAIL	/;"	d
CHNL_STS_IOE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_IOE	/;"	d
CHNL_STS_SOE	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_SOE	/;"	d
CHNL_STS_SOP	drivers/net/xilinx_ll_temac_sdma.h	/^#define CHNL_STS_SOP	/;"	d
CHRGLEDEN	include/mc13892.h	/^#define CHRGLEDEN	/;"	d
CHRG_DET_N	include/twl6030.h	/^#define CHRG_DET_N	/;"	d
CHRG_EXTCHRG_STATZ	include/twl6030.h	/^#define CHRG_EXTCHRG_STATZ	/;"	d
CHRG_VBUS_END	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CHRG_VBUS_END	/;"	d
CHRG_VBUS_END_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CHRG_VBUS_END_ENA	/;"	d
CHRG_VBUS_START	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CHRG_VBUS_START	/;"	d
CHRG_VBUS_START_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CHRG_VBUS_START_ENA	/;"	d
CHSCCDR_CLK_SEL_LDB_DI0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CHSCCDR_CLK_SEL_LDB_DI0	/;"	d
CHSCCDR_IPU_PRE_CLK_540M_PFD	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CHSCCDR_IPU_PRE_CLK_540M_PFD	/;"	d
CHSCCDR_PODF_DIVIDE_BY_3	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define CHSCCDR_PODF_DIVIDE_BY_3	/;"	d
CHUNKSZ	include/image.h	/^#define CHUNKSZ /;"	d
CHUNKSZ_CRC32	include/image.h	/^#define CHUNKSZ_CRC32 /;"	d
CHUNKSZ_MD5	include/image.h	/^#define CHUNKSZ_MD5 /;"	d
CHUNKSZ_SHA1	include/image.h	/^#define CHUNKSZ_SHA1 /;"	d
CHUNKSZ_SHA256	include/u-boot/sha256.h	/^#define CHUNKSZ_SHA256	/;"	d
CHUNK_TYPE_CRC32	include/sparse_format.h	/^#define CHUNK_TYPE_CRC32 /;"	d
CHUNK_TYPE_DONT_CARE	include/sparse_format.h	/^#define CHUNK_TYPE_DONT_CARE	/;"	d
CHUNK_TYPE_FILL	include/sparse_format.h	/^#define CHUNK_TYPE_FILL	/;"	d
CHUNK_TYPE_RAW	include/sparse_format.h	/^#define CHUNK_TYPE_RAW	/;"	d
CHX_REGS	arch/x86/cpu/quark/smc.h	/^#define CHX_REGS	/;"	d
CH_FLAGS_CHFLASH	arch/arm/include/asm/omap_common.h	/^#define CH_FLAGS_CHFLASH	/;"	d
CH_FLAGS_CHMMCSD	arch/arm/include/asm/omap_common.h	/^#define CH_FLAGS_CHMMCSD	/;"	d
CH_FLAGS_CHRAM	arch/arm/include/asm/omap_common.h	/^#define CH_FLAGS_CHRAM	/;"	d
CH_FLAGS_CHSETTINGS	arch/arm/include/asm/omap_common.h	/^#define CH_FLAGS_CHSETTINGS	/;"	d
CICADA_CIS8201_PHYSID0	drivers/net/ax88180.h	/^#define CICADA_CIS8201_PHYSID0	/;"	d
CICADA_DEFAULT_MACCFG1	drivers/net/ax88180.h	/^  #define CICADA_DEFAULT_MACCFG1	/;"	d
CICE_CHECK	arch/arm/include/asm/omap_mmc.h	/^#define CICE_CHECK	/;"	d
CICE_NOCHECK	arch/arm/include/asm/omap_mmc.h	/^#define CICE_NOCHECK	/;"	d
CICR_HP_MASK	include/commproc.h	/^#define CICR_HP_MASK	/;"	d
CICR_IEN	include/commproc.h	/^#define CICR_IEN	/;"	d
CICR_IRL_MASK	include/commproc.h	/^#define CICR_IRL_MASK	/;"	d
CICR_SCA_SCC1	include/commproc.h	/^#define	CICR_SCA_SCC1	/;"	d
CICR_SCB_SCC2	include/commproc.h	/^#define	CICR_SCB_SCC2	/;"	d
CICR_SCC_SCC3	include/commproc.h	/^#define	CICR_SCC_SCC3	/;"	d
CICR_SCD_SCC4	include/commproc.h	/^#define	CICR_SCD_SCC4	/;"	d
CICR_SPS	include/commproc.h	/^#define CICR_SPS	/;"	d
CID	include/power/max77696_pmic.h	/^	CID =	0x9c,$/;"	e	enum:__anoncca498ab0103
CIDER_ID	drivers/net/ks8851_mll.h	/^#define CIDER_ID	/;"	d
CIDER_REV_GET	drivers/net/ks8851_mll.h	/^#define CIDER_REV_GET(/;"	d
CIDER_REV_MASK	drivers/net/ks8851_mll.h	/^#define CIDER_REV_MASK	/;"	d
CIDER_REV_SHIFT	drivers/net/ks8851_mll.h	/^#define CIDER_REV_SHIFT	/;"	d
CIE	arch/powerpc/include/asm/xilinx_irq.h	/^#define CIE	/;"	d
CIM_ATA_DADDR	arch/m68k/include/asm/m5253.h	/^#define CIM_ATA_DADDR	/;"	d
CIM_ATA_DADDR_ATAADDR	arch/m68k/include/asm/m5253.h	/^#define CIM_ATA_DADDR_ATAADDR(/;"	d
CIM_ATA_DADDR_RAMADDR	arch/m68k/include/asm/m5253.h	/^#define CIM_ATA_DADDR_RAMADDR(/;"	d
CIM_ATA_DCOUNT	arch/m68k/include/asm/m5253.h	/^#define CIM_ATA_DCOUNT	/;"	d
CIM_ATA_DCOUNT_COUNT	arch/m68k/include/asm/m5253.h	/^#define CIM_ATA_DCOUNT_COUNT(/;"	d
CIM_MISCCR	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR	/;"	d
CIM_MISCCR_ADIC	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_ADIC	/;"	d
CIM_MISCCR_ADIE	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_ADIE	/;"	d
CIM_MISCCR_ADIP	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_ADIP	/;"	d
CIM_MISCCR_ADTA	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_ADTA	/;"	d
CIM_MISCCR_ADTD	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_ADTD	/;"	d
CIM_MISCCR_CPUEND	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_CPUEND	/;"	d
CIM_MISCCR_DMAEND	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_DMAEND	/;"	d
CIM_MISCCR_RTCCLR	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_RTCCLR	/;"	d
CIM_MISCCR_RTCPL	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_RTCPL	/;"	d
CIM_MISCCR_URIC	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_URIC	/;"	d
CIM_MISCCR_URIE	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_URIE	/;"	d
CIM_MISCCR_URIP	arch/m68k/include/asm/m5253.h	/^#define CIM_MISCCR_URIP	/;"	d
CIM_RTC_TIME	arch/m68k/include/asm/m5253.h	/^#define CIM_RTC_TIME	/;"	d
CIM_USB_CANCLK	arch/m68k/include/asm/m5253.h	/^#define CIM_USB_CANCLK	/;"	d
CINS_TIMEOUT	include/fsl_esdhc.h	/^#define CINS_TIMEOUT	/;"	d
CIRC_BUF_IDX	common/console.c	/^#define CIRC_BUF_IDX(/;"	d	file:
CIRC_CNT	drivers/crypto/fsl/jr.c	/^#define CIRC_CNT(/;"	d	file:
CIRC_SPACE	drivers/crypto/fsl/jr.c	/^#define CIRC_SPACE(/;"	d	file:
CISTPL_ALTSTR	include/pcmcia.h	/^#define CISTPL_ALTSTR	/;"	d
CISTPL_BAR	include/pcmcia.h	/^#define CISTPL_BAR	/;"	d
CISTPL_CFTABLE_ENTRY	include/pcmcia.h	/^#define CISTPL_CFTABLE_ENTRY	/;"	d
CISTPL_CFTABLE_ENTRY_CB	include/pcmcia.h	/^#define CISTPL_CFTABLE_ENTRY_CB /;"	d
CISTPL_CHECKSUM	include/pcmcia.h	/^#define CISTPL_CHECKSUM	/;"	d
CISTPL_CONFIG	include/pcmcia.h	/^#define CISTPL_CONFIG	/;"	d
CISTPL_CONFIG_CB	include/pcmcia.h	/^#define CISTPL_CONFIG_CB	/;"	d
CISTPL_DEVICE	include/pcmcia.h	/^#define CISTPL_DEVICE	/;"	d
CISTPL_DEVICE_A	include/pcmcia.h	/^#define CISTPL_DEVICE_A	/;"	d
CISTPL_DEVICE_GEO	include/pcmcia.h	/^#define CISTPL_DEVICE_GEO	/;"	d
CISTPL_DEVICE_GEO_A	include/pcmcia.h	/^#define CISTPL_DEVICE_GEO_A	/;"	d
CISTPL_DEVICE_OA	include/pcmcia.h	/^#define CISTPL_DEVICE_OA	/;"	d
CISTPL_DEVICE_OC	include/pcmcia.h	/^#define CISTPL_DEVICE_OC	/;"	d
CISTPL_END	include/pcmcia.h	/^#define CISTPL_END	/;"	d
CISTPL_EXTDEVICE	include/pcmcia.h	/^#define CISTPL_EXTDEVICE	/;"	d
CISTPL_FUNCE	include/pcmcia.h	/^#define CISTPL_FUNCE	/;"	d
CISTPL_FUNCE_IDE_IFACE	include/pcmcia.h	/^#define CISTPL_FUNCE_IDE_IFACE	/;"	d
CISTPL_FUNCE_IDE_MASTER	include/pcmcia.h	/^#define CISTPL_FUNCE_IDE_MASTER	/;"	d
CISTPL_FUNCE_IDE_SLAVE	include/pcmcia.h	/^#define CISTPL_FUNCE_IDE_SLAVE	/;"	d
CISTPL_FUNCID	include/pcmcia.h	/^#define CISTPL_FUNCID	/;"	d
CISTPL_FUNCID_AIMS	include/pcmcia.h	/^#define CISTPL_FUNCID_AIMS	/;"	d
CISTPL_FUNCID_FIXED	include/pcmcia.h	/^#define CISTPL_FUNCID_FIXED	/;"	d
CISTPL_FUNCID_MEMORY	include/pcmcia.h	/^#define CISTPL_FUNCID_MEMORY	/;"	d
CISTPL_FUNCID_MULTI	include/pcmcia.h	/^#define CISTPL_FUNCID_MULTI	/;"	d
CISTPL_FUNCID_NETWORK	include/pcmcia.h	/^#define CISTPL_FUNCID_NETWORK	/;"	d
CISTPL_FUNCID_PARALLEL	include/pcmcia.h	/^#define CISTPL_FUNCID_PARALLEL	/;"	d
CISTPL_FUNCID_SCSI	include/pcmcia.h	/^#define CISTPL_FUNCID_SCSI	/;"	d
CISTPL_FUNCID_SERIAL	include/pcmcia.h	/^#define CISTPL_FUNCID_SERIAL	/;"	d
CISTPL_FUNCID_VIDEO	include/pcmcia.h	/^#define CISTPL_FUNCID_VIDEO	/;"	d
CISTPL_IDE_DUAL	include/pcmcia.h	/^#define CISTPL_IDE_DUAL	/;"	d
CISTPL_IDE_HAS_IDLE	include/pcmcia.h	/^#define CISTPL_IDE_HAS_IDLE	/;"	d
CISTPL_IDE_HAS_INDEX	include/pcmcia.h	/^#define CISTPL_IDE_HAS_INDEX	/;"	d
CISTPL_IDE_HAS_SLEEP	include/pcmcia.h	/^#define CISTPL_IDE_HAS_SLEEP	/;"	d
CISTPL_IDE_HAS_STANDBY	include/pcmcia.h	/^#define CISTPL_IDE_HAS_STANDBY	/;"	d
CISTPL_IDE_INTERFACE	include/pcmcia.h	/^#define CISTPL_IDE_INTERFACE	/;"	d
CISTPL_IDE_IOIS16	include/pcmcia.h	/^#define CISTPL_IDE_IOIS16	/;"	d
CISTPL_IDE_LOW_POWER	include/pcmcia.h	/^#define CISTPL_IDE_LOW_POWER	/;"	d
CISTPL_IDE_REG_INHIBIT	include/pcmcia.h	/^#define CISTPL_IDE_REG_INHIBIT	/;"	d
CISTPL_IDE_SILICON	include/pcmcia.h	/^#define CISTPL_IDE_SILICON	/;"	d
CISTPL_IDE_UNIQUE	include/pcmcia.h	/^#define CISTPL_IDE_UNIQUE	/;"	d
CISTPL_INDIRECT	include/pcmcia.h	/^#define CISTPL_INDIRECT	/;"	d
CISTPL_JEDEC_A	include/pcmcia.h	/^#define CISTPL_JEDEC_A	/;"	d
CISTPL_JEDEC_C	include/pcmcia.h	/^#define CISTPL_JEDEC_C	/;"	d
CISTPL_LINKTARGET	include/pcmcia.h	/^#define CISTPL_LINKTARGET	/;"	d
CISTPL_LONGLINK_A	include/pcmcia.h	/^#define CISTPL_LONGLINK_A	/;"	d
CISTPL_LONGLINK_C	include/pcmcia.h	/^#define CISTPL_LONGLINK_C	/;"	d
CISTPL_LONGLINK_CB	include/pcmcia.h	/^#define CISTPL_LONGLINK_CB	/;"	d
CISTPL_LONGLINK_MFC	include/pcmcia.h	/^#define CISTPL_LONGLINK_MFC	/;"	d
CISTPL_MANFID	include/pcmcia.h	/^#define CISTPL_MANFID	/;"	d
CISTPL_NO_LINK	include/pcmcia.h	/^#define CISTPL_NO_LINK	/;"	d
CISTPL_NULL	include/pcmcia.h	/^#define CISTPL_NULL	/;"	d
CISTPL_PWR_MGMNT	include/pcmcia.h	/^#define CISTPL_PWR_MGMNT	/;"	d
CISTPL_SWIL	include/pcmcia.h	/^#define CISTPL_SWIL	/;"	d
CISTPL_VERS_1	include/pcmcia.h	/^#define CISTPL_VERS_1	/;"	d
CIS_1000FULL	drivers/net/ax88180.h	/^  #define CIS_1000FULL	/;"	d
CIS_1000HALF	drivers/net/ax88180.h	/^  #define CIS_1000HALF	/;"	d
CIS_100FULL	drivers/net/ax88180.h	/^  #define CIS_100FULL	/;"	d
CIS_100HALF	drivers/net/ax88180.h	/^  #define CIS_100HALF	/;"	d
CIS_10FULL	drivers/net/ax88180.h	/^  #define CIS_10FULL	/;"	d
CIS_10HALF	drivers/net/ax88180.h	/^  #define CIS_10HALF	/;"	d
CIS_AUTONEG_COMPLETE	drivers/net/ax88180.h	/^  #define CIS_AUTONEG_COMPLETE	/;"	d
CIS_AUX_CTRL_STATUS	drivers/net/ax88180.h	/^#define CIS_AUX_CTRL_STATUS	/;"	d
CIS_DUPLEX	drivers/net/ax88180.h	/^  #define CIS_DUPLEX	/;"	d
CIS_IMR	drivers/net/ax88180.h	/^#define CIS_IMR	/;"	d
CIS_INT_ENABLE	drivers/net/ax88180.h	/^  #define CIS_INT_ENABLE	/;"	d
CIS_INT_PENDING	drivers/net/ax88180.h	/^  #define CIS_INT_PENDING	/;"	d
CIS_ISR	drivers/net/ax88180.h	/^#define CIS_ISR	/;"	d
CIS_LINK_CHANGE_INT	drivers/net/ax88180.h	/^  #define CIS_LINK_CHANGE_INT	/;"	d
CIS_LINK_CHANGE_STATUS	drivers/net/ax88180.h	/^  #define CIS_LINK_CHANGE_STATUS	/;"	d
CIS_MEDIA_MASK	drivers/net/ax88180.h	/^  #define CIS_MEDIA_MASK	/;"	d
CIS_SMI_PRIORITY	drivers/net/ax88180.h	/^  #define CIS_SMI_PRIORITY	/;"	d
CIS_SPEED_10	drivers/net/ax88180.h	/^  #define CIS_SPEED_10	/;"	d
CIS_SPEED_100	drivers/net/ax88180.h	/^  #define CIS_SPEED_100	/;"	d
CIS_SPEED_1000	drivers/net/ax88180.h	/^  #define CIS_SPEED_1000	/;"	d
CIS_SPEED_MASK	drivers/net/ax88180.h	/^  #define CIS_SPEED_MASK	/;"	d
CI_O	include/sym53c8xx.h	/^	#define   CI_O	/;"	d
CI_UDC	drivers/usb/gadget/Kconfig	/^config CI_UDC$/;"	c
CK	include/linux/usb/ch9.h	/^	__u8 CK[16];		\/* connection key *\/$/;"	m	struct:usb_connection_context	typeref:typename:__u8[16]
CK60_PHSEL	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define CK60_PHSEL	/;"	d
CKADSEL_L	drivers/usb/eth/r8152.h	/^#define CKADSEL_L	/;"	d
CKCTL	arch/sh/include/asm/cpu_sh7722.h	/^#define CKCTL /;"	d
CKELOW	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CKELOW	/;"	d
CKEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN	/;"	d
CKEN0_PWM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN0_PWM0	/;"	d
CKEN10_USBHOST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN10_USBHOST	/;"	d
CKEN11_USB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN11_USB	/;"	d
CKEN12_MMC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN12_MMC	/;"	d
CKEN13_FICP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN13_FICP	/;"	d
CKEN14_I2C	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN14_I2C	/;"	d
CKEN15_PWRI2C	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN15_PWRI2C	/;"	d
CKEN15_PWR_I2C	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN15_PWR_I2C	/;"	d
CKEN16_LCD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN16_LCD	/;"	d
CKEN17_MSL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN17_MSL	/;"	d
CKEN18_USIM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN18_USIM	/;"	d
CKEN19_KEYPAD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN19_KEYPAD	/;"	d
CKEN1_PWM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN1_PWM1	/;"	d
CKEN20_IM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN20_IM	/;"	d
CKEN21_MEMSTK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN21_MEMSTK	/;"	d
CKEN21_MSHC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN21_MSHC	/;"	d
CKEN22_MEMC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN22_MEMC	/;"	d
CKEN23_SSP1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN23_SSP1	/;"	d
CKEN24_CAMERA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN24_CAMERA	/;"	d
CKEN2_AC97	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN2_AC97	/;"	d
CKEN3_SSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN3_SSP	/;"	d
CKEN4_SSP3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN4_SSP3	/;"	d
CKEN5_STUART	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN5_STUART	/;"	d
CKEN6_FFUART	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN6_FFUART	/;"	d
CKEN7_BTUART	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN7_BTUART	/;"	d
CKEN8_I2S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN8_I2S	/;"	d
CKEN9_OST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKEN9_OST	/;"	d
CKENA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA	/;"	d
CKENA_10_SRAM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_10_SRAM	/;"	d
CKENA_11_FLASH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_11_FLASH	/;"	d
CKENA_12_MMC0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_12_MMC0	/;"	d
CKENA_13_MMC1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_13_MMC1	/;"	d
CKENA_14_KEY	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_14_KEY	/;"	d
CKENA_15_CIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_15_CIR	/;"	d
CKENA_17_USIM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_17_USIM0	/;"	d
CKENA_18_USIM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_18_USIM1	/;"	d
CKENA_19_TPM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_19_TPM	/;"	d
CKENA_1_LCD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_1_LCD	/;"	d
CKENA_20_UDC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_20_UDC	/;"	d
CKENA_21_BTUART	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_21_BTUART	/;"	d
CKENA_22_FFUART	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_22_FFUART	/;"	d
CKENA_23_STUART	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_23_STUART	/;"	d
CKENA_24_AC97	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_24_AC97	/;"	d
CKENA_25_TSI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_25_TSI	/;"	d
CKENA_26_SSP1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_26_SSP1	/;"	d
CKENA_27_SSP2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_27_SSP2	/;"	d
CKENA_28_SSP3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_28_SSP3	/;"	d
CKENA_29_SSP4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_29_SSP4	/;"	d
CKENA_2_USBHOST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_2_USBHOST	/;"	d
CKENA_30_MSL0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_30_MSL0	/;"	d
CKENA_3_CAMERA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_3_CAMERA	/;"	d
CKENA_4_NAND	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_4_NAND	/;"	d
CKENA_6_USBCLI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_6_USBCLI	/;"	d
CKENA_7_GRAPHICS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_7_GRAPHICS /;"	d
CKENA_8_DMC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_8_DMC	/;"	d
CKENA_9_SMC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENA_9_SMC	/;"	d
CKENB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB	/;"	d
CKENB_0_PWM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_0_PWM0	/;"	d
CKENB_1_PWM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_1_PWM1	/;"	d
CKENB_4_I2C	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_4_I2C	/;"	d
CKENB_6_IRQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_6_IRQ	/;"	d
CKENB_7_GPIO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_7_GPIO	/;"	d
CKENB_8_1WIRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_8_1WIRE	/;"	d
CKENB_9_SYSBUS2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define CKENB_9_SYSBUS2	/;"	d
CKE_LOW	drivers/ddr/microchip/ddr2_regs.h	/^#define CKE_LOW	/;"	d
CKOBUFFER_CLK_ENABLE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CKOBUFFER_CLK_ENABLE_MASK	/;"	d
CKO_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CKO_MARK,	BS_MARK,	RDWR_MARK,$/;"	e	enum:__anona304c1340103	file:
CKO_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CKO_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
CKREV	arch/sh/include/asm/cpu_sh7722.h	/^#define CKREV /;"	d
CKSEG0	arch/mips/include/asm/addrspace.h	/^#define CKSEG0	/;"	d
CKSEG0ADDR	arch/mips/include/asm/addrspace.h	/^#define CKSEG0ADDR(/;"	d
CKSEG1	arch/mips/include/asm/addrspace.h	/^#define CKSEG1	/;"	d
CKSEG1ADDR	arch/mips/include/asm/addrspace.h	/^#define CKSEG1ADDR(/;"	d
CKSEG2	arch/mips/include/asm/addrspace.h	/^#define CKSEG2	/;"	d
CKSEG2ADDR	arch/mips/include/asm/addrspace.h	/^#define CKSEG2ADDR(/;"	d
CKSEG3	arch/mips/include/asm/addrspace.h	/^#define CKSEG3	/;"	d
CKSEG3ADDR	arch/mips/include/asm/addrspace.h	/^#define CKSEG3ADDR(/;"	d
CKSSEG	arch/mips/include/asm/addrspace.h	/^#define CKSSEG	/;"	d
CKUSEG	arch/mips/include/asm/addrspace.h	/^#define CKUSEG	/;"	d
CL	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 CL;$/;"	m	struct:dram_sun9i_cl_cwl_timing	typeref:typename:u32	file:
CLAMP_INPUTS_WHEN_TRISTATED	arch/arm/mach-tegra/pinmux-common.c	/^#define CLAMP_INPUTS_WHEN_TRISTATED /;"	d	file:
CLASS_1	drivers/crypto/fsl/desc.h	/^#define CLASS_1	/;"	d
CLASS_2	drivers/crypto/fsl/desc.h	/^#define CLASS_2	/;"	d
CLASS_BCD_VERSION	include/usbdescriptors.h	/^#define CLASS_BCD_VERSION	/;"	d
CLASS_BOTH	drivers/crypto/fsl/desc.h	/^#define CLASS_BOTH	/;"	d
CLASS_MASK	drivers/crypto/fsl/desc.h	/^#define CLASS_MASK	/;"	d
CLASS_NONE	drivers/crypto/fsl/desc.h	/^#define CLASS_NONE	/;"	d
CLASS_SHIFT	drivers/crypto/fsl/desc.h	/^#define CLASS_SHIFT	/;"	d
CLCDCLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  CLCDCLK_48MHZ	/;"	d
CLCDCLK_EXT	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  CLCDCLK_EXT	/;"	d
CLCDCLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  CLCDCLK_SYNTH	/;"	d
CLEARALL_FLAG	drivers/bios_emulator/include/x86emu/regs.h	/^#define CLEARALL_FLAG(/;"	d
CLEARMASK	lib/bzip2/bzlib_blocksort.c	/^#define CLEARMASK /;"	d	file:
CLEAR_BH	lib/bzip2/bzlib_blocksort.c	/^#define     CLEAR_BH(/;"	d	file:
CLEAR_BIT	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define CLEAR_BIT(/;"	d
CLEAR_BIT	drivers/net/cpsw.c	/^#define CLEAR_BIT	/;"	d	file:
CLEAR_CMOS	drivers/rtc/mc146818.c	/^#define CLEAR_CMOS	/;"	d	file:
CLEAR_DATATOGGLE_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CLEAR_DATATOGGLE_R	/;"	d
CLEAR_DATATOGGLE_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CLEAR_DATATOGGLE_T	/;"	d
CLEAR_DELAY	drivers/misc/pdsp188x.c	/^#define CLEAR_DELAY	/;"	d	file:
CLEAR_FLAG	drivers/bios_emulator/include/x86emu/regs.h	/^#define CLEAR_FLAG(/;"	d
CLEAR_HASH	lib/zlib/deflate.c	/^#define CLEAR_HASH(/;"	d	file:
CLEAR_IMR	drivers/net/ax88180.h	/^  #define CLEAR_IMR	/;"	d
CLF	include/sym53c8xx.h	/^	#define   CLF	/;"	d
CLFCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CLFCR /;"	d
CLIENT_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define CLIENT_BASE_ADDR	/;"	d
CLIENT_CTRL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define CLIENT_CTRL_REG	/;"	d
CLI_INNER	arch/blackfin/lib/ins.S	/^# define CLI_INNER /;"	d	file:
CLI_INNER_NOP	arch/blackfin/lib/ins.S	/^# define CLI_INNER_NOP /;"	d	file:
CLI_INNER_NOP	arch/blackfin/lib/ins.S	/^# define CLI_INNER_NOP$/;"	d	file:
CLI_OUTER	arch/blackfin/lib/ins.S	/^# define CLI_OUTER /;"	d	file:
CLI_OUTER	arch/blackfin/lib/ins.S	/^# define CLI_OUTER$/;"	d	file:
CLK	arch/arm/mach-tegra/tegra114/clock.c	/^#define CLK(/;"	d	file:
CLK	arch/arm/mach-tegra/tegra124/clock.c	/^#define CLK(/;"	d	file:
CLK	arch/arm/mach-tegra/tegra20/clock.c	/^#define CLK(/;"	d	file:
CLK	arch/arm/mach-tegra/tegra210/clock.c	/^#define CLK(/;"	d	file:
CLK	arch/arm/mach-tegra/tegra30/clock.c	/^#define CLK(/;"	d	file:
CLK	drivers/clk/Kconfig	/^config CLK$/;"	c	menu:Clock
CLK2	board/freescale/common/ics307_clk.c	/^#define CLK2	/;"	d	file:
CLK2MHZ	arch/arm/mach-rmobile/timer.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/alt/alt.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/gose/gose.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/koelsch/koelsch.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/lager/lager.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/porter/porter.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/salvator-x/salvator-x.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/silk/silk.c	/^#define CLK2MHZ(/;"	d	file:
CLK2MHZ	board/renesas/stout/stout.c	/^#define CLK2MHZ(/;"	d	file:
CLK32KGAUDIO_CTRL	include/palmas.h	/^#define CLK32KGAUDIO_CTRL	/;"	d
CLK32K_EN	drivers/usb/phy/twl4030.c	/^#define CLK32K_EN	/;"	d	file:
CLKACTIVATIONTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CLKACTIVATIONTIME(/;"	d
CLKANADLYPDCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANADLYPDCTL	/;"	d
CLKANADLYPUCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANADLYPUCTL	/;"	d
CLKANADRVPDCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANADRVPDCTL	/;"	d
CLKANADRVPUCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANADRVPUCTL	/;"	d
CLKANAODTPDCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANAODTPDCTL	/;"	d
CLKANAODTPUCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANAODTPUCTL	/;"	d
CLKANATCOPDCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANATCOPDCTL	/;"	d
CLKANATCOPUCTL	arch/x86/cpu/quark/smc.h	/^#define CLKANATCOPUCTL	/;"	d
CLKBASE	board/mpl/vcma9/lowlevel_init.S	/^#define CLKBASE	/;"	d	file:
CLKBUFOE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CLKBUFOE	/;"	d
CLKCTL_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CLKCTL_BASE_ADDR /;"	d
CLKCTRL_CLKSEQ_BYPASS_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_CPU	/;"	d
CLKCTRL_CLKSEQ_BYPASS_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_CPU	/;"	d
CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF	/;"	d
CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF_BYPASS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF_BYPASS	/;"	d
CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF_PFD	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF_PFD	/;"	d
CLKCTRL_CLKSEQ_BYPASS_EMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_EMI	/;"	d
CLKCTRL_CLKSEQ_BYPASS_EMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_EMI	/;"	d
CLKCTRL_CLKSEQ_BYPASS_ETM	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_ETM	/;"	d
CLKCTRL_CLKSEQ_BYPASS_ETM	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_ETM	/;"	d
CLKCTRL_CLKSEQ_BYPASS_GPMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_GPMI	/;"	d
CLKCTRL_CLKSEQ_BYPASS_GPMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_GPMI	/;"	d
CLKCTRL_CLKSEQ_BYPASS_IR	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_IR	/;"	d
CLKCTRL_CLKSEQ_BYPASS_PIX	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_PIX	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SAIF	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SAIF	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SAIF0	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SAIF0	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SAIF1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SAIF1	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SSP0	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SSP0	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SSP0	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SSP0	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SSP1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SSP1	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SSP2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SSP2	/;"	d
CLKCTRL_CLKSEQ_BYPASS_SSP3	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CLKSEQ_BYPASS_SSP3	/;"	d
CLKCTRL_CPU_BUSY_REF_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_BUSY_REF_CPU	/;"	d
CLKCTRL_CPU_BUSY_REF_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_BUSY_REF_CPU	/;"	d
CLKCTRL_CPU_BUSY_REF_XTAL	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_BUSY_REF_XTAL	/;"	d
CLKCTRL_CPU_BUSY_REF_XTAL	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_BUSY_REF_XTAL	/;"	d
CLKCTRL_CPU_DIV_CPU_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_DIV_CPU_FRAC_EN	/;"	d
CLKCTRL_CPU_DIV_CPU_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_DIV_CPU_FRAC_EN	/;"	d
CLKCTRL_CPU_DIV_CPU_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_DIV_CPU_MASK	/;"	d
CLKCTRL_CPU_DIV_CPU_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_DIV_CPU_MASK	/;"	d
CLKCTRL_CPU_DIV_CPU_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_DIV_CPU_OFFSET	/;"	d
CLKCTRL_CPU_DIV_CPU_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_DIV_CPU_OFFSET	/;"	d
CLKCTRL_CPU_DIV_XTAL_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_DIV_XTAL_FRAC_EN	/;"	d
CLKCTRL_CPU_DIV_XTAL_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_DIV_XTAL_FRAC_EN	/;"	d
CLKCTRL_CPU_DIV_XTAL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_DIV_XTAL_MASK	/;"	d
CLKCTRL_CPU_DIV_XTAL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_DIV_XTAL_MASK	/;"	d
CLKCTRL_CPU_DIV_XTAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_DIV_XTAL_OFFSET	/;"	d
CLKCTRL_CPU_DIV_XTAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_DIV_XTAL_OFFSET	/;"	d
CLKCTRL_CPU_INTERRUPT_WAIT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_CPU_INTERRUPT_WAIT	/;"	d
CLKCTRL_CPU_INTERRUPT_WAIT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_CPU_INTERRUPT_WAIT	/;"	d
CLKCTRL_DIS_LCDIF_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_DIS_LCDIF_BUSY	/;"	d
CLKCTRL_DIS_LCDIF_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_DIS_LCDIF_CLKGATE	/;"	d
CLKCTRL_DIS_LCDIF_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_DIS_LCDIF_DIV_FRAC_EN	/;"	d
CLKCTRL_DIS_LCDIF_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_DIS_LCDIF_DIV_MASK	/;"	d
CLKCTRL_DIS_LCDIF_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_DIS_LCDIF_DIV_OFFSET	/;"	d
CLKCTRL_EMI_BUSY_DCC_RESYNC	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_BUSY_DCC_RESYNC	/;"	d
CLKCTRL_EMI_BUSY_DCC_RESYNC	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_BUSY_DCC_RESYNC	/;"	d
CLKCTRL_EMI_BUSY_REF_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_BUSY_REF_CPU	/;"	d
CLKCTRL_EMI_BUSY_REF_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_BUSY_REF_CPU	/;"	d
CLKCTRL_EMI_BUSY_REF_EMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_BUSY_REF_EMI	/;"	d
CLKCTRL_EMI_BUSY_REF_EMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_BUSY_REF_EMI	/;"	d
CLKCTRL_EMI_BUSY_REF_XTAL	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_BUSY_REF_XTAL	/;"	d
CLKCTRL_EMI_BUSY_REF_XTAL	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_BUSY_REF_XTAL	/;"	d
CLKCTRL_EMI_BUSY_SYNC_MODE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_BUSY_SYNC_MODE	/;"	d
CLKCTRL_EMI_BUSY_SYNC_MODE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_BUSY_SYNC_MODE	/;"	d
CLKCTRL_EMI_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_CLKGATE	/;"	d
CLKCTRL_EMI_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_CLKGATE	/;"	d
CLKCTRL_EMI_DCC_RESYNC_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_DCC_RESYNC_ENABLE	/;"	d
CLKCTRL_EMI_DCC_RESYNC_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_DCC_RESYNC_ENABLE	/;"	d
CLKCTRL_EMI_DIV_EMI_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_DIV_EMI_MASK	/;"	d
CLKCTRL_EMI_DIV_EMI_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_DIV_EMI_MASK	/;"	d
CLKCTRL_EMI_DIV_EMI_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_DIV_EMI_OFFSET	/;"	d
CLKCTRL_EMI_DIV_EMI_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_DIV_EMI_OFFSET	/;"	d
CLKCTRL_EMI_DIV_XTAL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_DIV_XTAL_MASK	/;"	d
CLKCTRL_EMI_DIV_XTAL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_DIV_XTAL_MASK	/;"	d
CLKCTRL_EMI_DIV_XTAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_DIV_XTAL_OFFSET	/;"	d
CLKCTRL_EMI_DIV_XTAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_DIV_XTAL_OFFSET	/;"	d
CLKCTRL_EMI_SYNC_MODE_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_EMI_SYNC_MODE_EN	/;"	d
CLKCTRL_EMI_SYNC_MODE_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_EMI_SYNC_MODE_EN	/;"	d
CLKCTRL_ENET_BUSY_TIME	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_BUSY_TIME	/;"	d
CLKCTRL_ENET_CLK_OUT_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_CLK_OUT_EN	/;"	d
CLKCTRL_ENET_DISABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_DISABLE	/;"	d
CLKCTRL_ENET_DIV_TIME_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_DIV_TIME_MASK	/;"	d
CLKCTRL_ENET_DIV_TIME_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_DIV_TIME_OFFSET	/;"	d
CLKCTRL_ENET_RESET_BY_SW	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_RESET_BY_SW	/;"	d
CLKCTRL_ENET_RESET_BY_SW_CHIP	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_RESET_BY_SW_CHIP	/;"	d
CLKCTRL_ENET_SLEEP	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_SLEEP	/;"	d
CLKCTRL_ENET_STATUS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_STATUS	/;"	d
CLKCTRL_ENET_TIME_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_TIME_SEL_MASK	/;"	d
CLKCTRL_ENET_TIME_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_TIME_SEL_OFFSET	/;"	d
CLKCTRL_ENET_TIME_SEL_PLL	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_TIME_SEL_PLL	/;"	d
CLKCTRL_ENET_TIME_SEL_RMII_CLK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_TIME_SEL_RMII_CLK	/;"	d
CLKCTRL_ENET_TIME_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_TIME_SEL_UNDEFINED	/;"	d
CLKCTRL_ENET_TIME_SEL_XTAL	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ENET_TIME_SEL_XTAL	/;"	d
CLKCTRL_ETM_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_ETM_BUSY	/;"	d
CLKCTRL_ETM_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ETM_BUSY	/;"	d
CLKCTRL_ETM_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_ETM_CLKGATE	/;"	d
CLKCTRL_ETM_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ETM_CLKGATE	/;"	d
CLKCTRL_ETM_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_ETM_DIV_FRAC_EN	/;"	d
CLKCTRL_ETM_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ETM_DIV_FRAC_EN	/;"	d
CLKCTRL_ETM_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_ETM_DIV_MASK	/;"	d
CLKCTRL_ETM_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ETM_DIV_MASK	/;"	d
CLKCTRL_ETM_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_ETM_DIV_OFFSET	/;"	d
CLKCTRL_ETM_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_ETM_DIV_OFFSET	/;"	d
CLKCTRL_FLEXCAN_CAN0_STATUS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FLEXCAN_CAN0_STATUS	/;"	d
CLKCTRL_FLEXCAN_CAN1_STATUS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FLEXCAN_CAN1_STATUS	/;"	d
CLKCTRL_FLEXCAN_STOP_CAN0	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FLEXCAN_STOP_CAN0	/;"	d
CLKCTRL_FLEXCAN_STOP_CAN1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FLEXCAN_STOP_CAN1	/;"	d
CLKCTRL_FRAC0_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC0_CPU	/;"	d
CLKCTRL_FRAC0_CPU	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC0_CPU	/;"	d
CLKCTRL_FRAC0_EMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC0_EMI	/;"	d
CLKCTRL_FRAC0_EMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC0_EMI	/;"	d
CLKCTRL_FRAC0_IO0	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC0_IO0	/;"	d
CLKCTRL_FRAC0_IO0	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC0_IO0	/;"	d
CLKCTRL_FRAC0_IO1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC0_IO1	/;"	d
CLKCTRL_FRAC0_PIX	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC0_PIX	/;"	d
CLKCTRL_FRAC1_GPMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC1_GPMI	/;"	d
CLKCTRL_FRAC1_HSADC	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC1_HSADC	/;"	d
CLKCTRL_FRAC1_PIX	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC1_PIX	/;"	d
CLKCTRL_FRAC1_VID	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC1_VID	/;"	d
CLKCTRL_FRAC_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC_CLKGATE	/;"	d
CLKCTRL_FRAC_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC_CLKGATE	/;"	d
CLKCTRL_FRAC_FRAC_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC_FRAC_MASK	/;"	d
CLKCTRL_FRAC_FRAC_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC_FRAC_MASK	/;"	d
CLKCTRL_FRAC_FRAC_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC_FRAC_OFFSET	/;"	d
CLKCTRL_FRAC_FRAC_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC_FRAC_OFFSET	/;"	d
CLKCTRL_FRAC_STABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_FRAC_STABLE	/;"	d
CLKCTRL_FRAC_STABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_FRAC_STABLE	/;"	d
CLKCTRL_GPMI_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_GPMI_BUSY	/;"	d
CLKCTRL_GPMI_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_GPMI_BUSY	/;"	d
CLKCTRL_GPMI_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_GPMI_CLKGATE	/;"	d
CLKCTRL_GPMI_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_GPMI_CLKGATE	/;"	d
CLKCTRL_GPMI_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_GPMI_DIV_FRAC_EN	/;"	d
CLKCTRL_GPMI_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_GPMI_DIV_FRAC_EN	/;"	d
CLKCTRL_GPMI_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_GPMI_DIV_MASK	/;"	d
CLKCTRL_GPMI_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_GPMI_DIV_MASK	/;"	d
CLKCTRL_GPMI_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_GPMI_DIV_OFFSET	/;"	d
CLKCTRL_GPMI_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_GPMI_DIV_OFFSET	/;"	d
CLKCTRL_HBUS_APBHDMA_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_APBHDMA_AS_ENABLE	/;"	d
CLKCTRL_HBUS_APBHDMA_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_APBHDMA_AS_ENABLE	/;"	d
CLKCTRL_HBUS_APBXDMA_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_APBXDMA_AS_ENABLE	/;"	d
CLKCTRL_HBUS_APBXDMA_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_APBXDMA_AS_ENABLE	/;"	d
CLKCTRL_HBUS_ASM_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_ASM_BUSY	/;"	d
CLKCTRL_HBUS_ASM_EMIPORT_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_ASM_EMIPORT_AS_ENABLE	/;"	d
CLKCTRL_HBUS_ASM_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_ASM_ENABLE	/;"	d
CLKCTRL_HBUS_AUTO_CLEAR_DIV_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_AUTO_CLEAR_DIV_ENABLE	/;"	d
CLKCTRL_HBUS_AUTO_SLOW_MODE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_AUTO_SLOW_MODE	/;"	d
CLKCTRL_HBUS_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_BUSY	/;"	d
CLKCTRL_HBUS_CPU_DATA_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_CPU_DATA_AS_ENABLE	/;"	d
CLKCTRL_HBUS_CPU_DATA_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_CPU_DATA_AS_ENABLE	/;"	d
CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	/;"	d
CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	/;"	d
CLKCTRL_HBUS_DCP_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_DCP_AS_ENABLE	/;"	d
CLKCTRL_HBUS_DCP_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_DCP_AS_ENABLE	/;"	d
CLKCTRL_HBUS_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_DIV_FRAC_EN	/;"	d
CLKCTRL_HBUS_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_DIV_FRAC_EN	/;"	d
CLKCTRL_HBUS_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_DIV_MASK	/;"	d
CLKCTRL_HBUS_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_DIV_MASK	/;"	d
CLKCTRL_HBUS_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_DIV_OFFSET	/;"	d
CLKCTRL_HBUS_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_DIV_OFFSET	/;"	d
CLKCTRL_HBUS_PXP_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_PXP_AS_ENABLE	/;"	d
CLKCTRL_HBUS_PXP_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_PXP_AS_ENABLE	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY1	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY1	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY16	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY16	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY16	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY16	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY2	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY2	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY32	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY32	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY32	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY32	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY4	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY4	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY4	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY4	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY8	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY8	/;"	d
CLKCTRL_HBUS_SLOW_DIV_BY8	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_BY8	/;"	d
CLKCTRL_HBUS_SLOW_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_MASK	/;"	d
CLKCTRL_HBUS_SLOW_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_MASK	/;"	d
CLKCTRL_HBUS_SLOW_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_OFFSET	/;"	d
CLKCTRL_HBUS_SLOW_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_SLOW_DIV_OFFSET	/;"	d
CLKCTRL_HBUS_TRAFFIC_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_TRAFFIC_AS_ENABLE	/;"	d
CLKCTRL_HBUS_TRAFFIC_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_TRAFFIC_AS_ENABLE	/;"	d
CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	/;"	d
CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	/;"	d
CLKCTRL_HSADC_FREQDIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HSADC_FREQDIV_MASK	/;"	d
CLKCTRL_HSADC_FREQDIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HSADC_FREQDIV_OFFSET	/;"	d
CLKCTRL_HSADC_RESETB	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_HSADC_RESETB	/;"	d
CLKCTRL_IR_AUTO_DIV	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_AUTO_DIV	/;"	d
CLKCTRL_IR_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_CLKGATE	/;"	d
CLKCTRL_IR_IROV_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_IROV_BUSY	/;"	d
CLKCTRL_IR_IROV_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_IROV_DIV_MASK	/;"	d
CLKCTRL_IR_IROV_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_IROV_DIV_OFFSET	/;"	d
CLKCTRL_IR_IR_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_IR_BUSY	/;"	d
CLKCTRL_IR_IR_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_IR_DIV_MASK	/;"	d
CLKCTRL_IR_IR_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_IR_IR_DIV_OFFSET	/;"	d
CLKCTRL_PIX_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PIX_BUSY	/;"	d
CLKCTRL_PIX_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PIX_CLKGATE	/;"	d
CLKCTRL_PIX_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PIX_DIV_FRAC_EN	/;"	d
CLKCTRL_PIX_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PIX_DIV_MASK	/;"	d
CLKCTRL_PIX_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PIX_DIV_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL0CTRL0_EN_USB_CLKS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_EN_USB_CLKS	/;"	d
CLKCTRL_PLL0CTRL0_EN_USB_CLKS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_EN_USB_CLKS	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_MASK	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL0CTRL0_POWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL0_POWER	/;"	d
CLKCTRL_PLL0CTRL0_POWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL0_POWER	/;"	d
CLKCTRL_PLL0CTRL1_FORCE_LOCK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL1_FORCE_LOCK	/;"	d
CLKCTRL_PLL0CTRL1_FORCE_LOCK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL1_FORCE_LOCK	/;"	d
CLKCTRL_PLL0CTRL1_LOCK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL1_LOCK	/;"	d
CLKCTRL_PLL0CTRL1_LOCK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL1_LOCK	/;"	d
CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK	/;"	d
CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK	/;"	d
CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET	/;"	d
CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET	/;"	d
CLKCTRL_PLL1CTRL0_CLKGATEEMI	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CLKGATEEMI	/;"	d
CLKCTRL_PLL1CTRL0_CP_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CP_SEL_DEFAULT	/;"	d
CLKCTRL_PLL1CTRL0_CP_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CP_SEL_MASK	/;"	d
CLKCTRL_PLL1CTRL0_CP_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CP_SEL_OFFSET	/;"	d
CLKCTRL_PLL1CTRL0_CP_SEL_TIMES_05	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CP_SEL_TIMES_05	/;"	d
CLKCTRL_PLL1CTRL0_CP_SEL_TIMES_2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CP_SEL_TIMES_2	/;"	d
CLKCTRL_PLL1CTRL0_CP_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_CP_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL1CTRL0_DIV_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_DIV_SEL_DEFAULT	/;"	d
CLKCTRL_PLL1CTRL0_DIV_SEL_LOWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_DIV_SEL_LOWER	/;"	d
CLKCTRL_PLL1CTRL0_DIV_SEL_LOWEST	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_DIV_SEL_LOWEST	/;"	d
CLKCTRL_PLL1CTRL0_DIV_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_DIV_SEL_MASK	/;"	d
CLKCTRL_PLL1CTRL0_DIV_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_DIV_SEL_OFFSET	/;"	d
CLKCTRL_PLL1CTRL0_DIV_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_DIV_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL1CTRL0_EN_USB_CLKS	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_EN_USB_CLKS	/;"	d
CLKCTRL_PLL1CTRL0_LFR_SEL_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_LFR_SEL_DEFAULT	/;"	d
CLKCTRL_PLL1CTRL0_LFR_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_LFR_SEL_MASK	/;"	d
CLKCTRL_PLL1CTRL0_LFR_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_LFR_SEL_OFFSET	/;"	d
CLKCTRL_PLL1CTRL0_LFR_SEL_TIMES_05	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_LFR_SEL_TIMES_05	/;"	d
CLKCTRL_PLL1CTRL0_LFR_SEL_TIMES_2	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_LFR_SEL_TIMES_2	/;"	d
CLKCTRL_PLL1CTRL0_LFR_SEL_UNDEFINED	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_LFR_SEL_UNDEFINED	/;"	d
CLKCTRL_PLL1CTRL0_POWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL0_POWER	/;"	d
CLKCTRL_PLL1CTRL1_FORCE_LOCK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL1_FORCE_LOCK	/;"	d
CLKCTRL_PLL1CTRL1_LOCK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL1_LOCK	/;"	d
CLKCTRL_PLL1CTRL1_LOCK_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL1_LOCK_COUNT_MASK	/;"	d
CLKCTRL_PLL1CTRL1_LOCK_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL1CTRL1_LOCK_COUNT_OFFSET	/;"	d
CLKCTRL_PLL2CTRL0_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_CLKGATE	/;"	d
CLKCTRL_PLL2CTRL0_CP_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_CP_SEL_MASK	/;"	d
CLKCTRL_PLL2CTRL0_CP_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_CP_SEL_OFFSET	/;"	d
CLKCTRL_PLL2CTRL0_HOLD_RING_OFF_B	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_HOLD_RING_OFF_B	/;"	d
CLKCTRL_PLL2CTRL0_LFR_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_LFR_SEL_MASK	/;"	d
CLKCTRL_PLL2CTRL0_LFR_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_LFR_SEL_OFFSET	/;"	d
CLKCTRL_PLL2CTRL0_POWER	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_PLL2CTRL0_POWER	/;"	d
CLKCTRL_RESET_CHIP	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_RESET_CHIP	/;"	d
CLKCTRL_RESET_CHIP	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_RESET_CHIP	/;"	d
CLKCTRL_RESET_DIG	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_RESET_DIG	/;"	d
CLKCTRL_RESET_DIG	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_RESET_DIG	/;"	d
CLKCTRL_RESET_EXTERNAL_RESET_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_RESET_EXTERNAL_RESET_ENABLE	/;"	d
CLKCTRL_RESET_THERMAL_RESET_DEFAULT	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_RESET_THERMAL_RESET_DEFAULT	/;"	d
CLKCTRL_RESET_THERMAL_RESET_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_RESET_THERMAL_RESET_ENABLE	/;"	d
CLKCTRL_RESET_WDOG_POR_DISABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_RESET_WDOG_POR_DISABLE	/;"	d
CLKCTRL_SAIF0_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SAIF0_BUSY	/;"	d
CLKCTRL_SAIF0_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF0_BUSY	/;"	d
CLKCTRL_SAIF0_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SAIF0_CLKGATE	/;"	d
CLKCTRL_SAIF0_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF0_CLKGATE	/;"	d
CLKCTRL_SAIF0_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SAIF0_DIV_FRAC_EN	/;"	d
CLKCTRL_SAIF0_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF0_DIV_FRAC_EN	/;"	d
CLKCTRL_SAIF0_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SAIF0_DIV_MASK	/;"	d
CLKCTRL_SAIF0_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF0_DIV_MASK	/;"	d
CLKCTRL_SAIF0_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SAIF0_DIV_OFFSET	/;"	d
CLKCTRL_SAIF0_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF0_DIV_OFFSET	/;"	d
CLKCTRL_SAIF1_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF1_BUSY	/;"	d
CLKCTRL_SAIF1_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF1_CLKGATE	/;"	d
CLKCTRL_SAIF1_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF1_DIV_FRAC_EN	/;"	d
CLKCTRL_SAIF1_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF1_DIV_MASK	/;"	d
CLKCTRL_SAIF1_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SAIF1_DIV_OFFSET	/;"	d
CLKCTRL_SPDIF_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SPDIF_CLKGATE	/;"	d
CLKCTRL_SPDIF_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SPDIF_CLKGATE	/;"	d
CLKCTRL_SSP_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SSP_BUSY	/;"	d
CLKCTRL_SSP_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SSP_BUSY	/;"	d
CLKCTRL_SSP_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SSP_CLKGATE	/;"	d
CLKCTRL_SSP_CLKGATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SSP_CLKGATE	/;"	d
CLKCTRL_SSP_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SSP_DIV_FRAC_EN	/;"	d
CLKCTRL_SSP_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SSP_DIV_FRAC_EN	/;"	d
CLKCTRL_SSP_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SSP_DIV_MASK	/;"	d
CLKCTRL_SSP_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SSP_DIV_MASK	/;"	d
CLKCTRL_SSP_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_SSP_DIV_OFFSET	/;"	d
CLKCTRL_SSP_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_SSP_DIV_OFFSET	/;"	d
CLKCTRL_STATUS_CPU_LIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_STATUS_CPU_LIMIT_MASK	/;"	d
CLKCTRL_STATUS_CPU_LIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_STATUS_CPU_LIMIT_MASK	/;"	d
CLKCTRL_STATUS_CPU_LIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_STATUS_CPU_LIMIT_OFFSET	/;"	d
CLKCTRL_STATUS_CPU_LIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_STATUS_CPU_LIMIT_OFFSET	/;"	d
CLKCTRL_TV_CLK_TV108M_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_TV_CLK_TV108M_GATE	/;"	d
CLKCTRL_TV_CLK_TV_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_TV_CLK_TV_GATE	/;"	d
CLKCTRL_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_VERSION_MAJOR_MASK	/;"	d
CLKCTRL_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_VERSION_MAJOR_MASK	/;"	d
CLKCTRL_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_VERSION_MAJOR_OFFSET	/;"	d
CLKCTRL_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_VERSION_MAJOR_OFFSET	/;"	d
CLKCTRL_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_VERSION_MINOR_MASK	/;"	d
CLKCTRL_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_VERSION_MINOR_MASK	/;"	d
CLKCTRL_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_VERSION_MINOR_OFFSET	/;"	d
CLKCTRL_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_VERSION_MINOR_OFFSET	/;"	d
CLKCTRL_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_VERSION_STEP_MASK	/;"	d
CLKCTRL_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_VERSION_STEP_MASK	/;"	d
CLKCTRL_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_VERSION_STEP_OFFSET	/;"	d
CLKCTRL_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_VERSION_STEP_OFFSET	/;"	d
CLKCTRL_XBUS_AUTO_CLEAR_DIV_ENABLE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XBUS_AUTO_CLEAR_DIV_ENABLE	/;"	d
CLKCTRL_XBUS_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XBUS_BUSY	/;"	d
CLKCTRL_XBUS_BUSY	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XBUS_BUSY	/;"	d
CLKCTRL_XBUS_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XBUS_DIV_FRAC_EN	/;"	d
CLKCTRL_XBUS_DIV_FRAC_EN	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XBUS_DIV_FRAC_EN	/;"	d
CLKCTRL_XBUS_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XBUS_DIV_MASK	/;"	d
CLKCTRL_XBUS_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XBUS_DIV_MASK	/;"	d
CLKCTRL_XBUS_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XBUS_DIV_OFFSET	/;"	d
CLKCTRL_XBUS_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XBUS_DIV_OFFSET	/;"	d
CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE	/;"	d
CLKCTRL_XTAL_DIV_UART_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_DIV_UART_MASK	/;"	d
CLKCTRL_XTAL_DIV_UART_MASK	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XTAL_DIV_UART_MASK	/;"	d
CLKCTRL_XTAL_DIV_UART_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_DIV_UART_OFFSET	/;"	d
CLKCTRL_XTAL_DIV_UART_OFFSET	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XTAL_DIV_UART_OFFSET	/;"	d
CLKCTRL_XTAL_DRI_CLK24M_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_DRI_CLK24M_GATE	/;"	d
CLKCTRL_XTAL_FILT_CLK24M_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_FILT_CLK24M_GATE	/;"	d
CLKCTRL_XTAL_PWM_CLK24M_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_PWM_CLK24M_GATE	/;"	d
CLKCTRL_XTAL_PWM_CLK24M_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XTAL_PWM_CLK24M_GATE	/;"	d
CLKCTRL_XTAL_TIMROT_CLK32K_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_TIMROT_CLK32K_GATE	/;"	d
CLKCTRL_XTAL_TIMROT_CLK32K_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XTAL_TIMROT_CLK32K_GATE	/;"	d
CLKCTRL_XTAL_UART_CLK_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define	CLKCTRL_XTAL_UART_CLK_GATE	/;"	d
CLKCTRL_XTAL_UART_CLK_GATE	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define	CLKCTRL_XTAL_UART_CLK_GATE	/;"	d
CLKDEV_EMMC_DATA	drivers/mmc/sh_mmcif.h	/^#define CLKDEV_EMMC_DATA	/;"	d
CLKDEV_HS_DATA	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define CLKDEV_HS_DATA	/;"	d
CLKDEV_INIT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define	CLKDEV_INIT	/;"	d
CLKDEV_MMC_DATA	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define CLKDEV_MMC_DATA	/;"	d
CLKDEV_SD_DATA	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define	CLKDEV_SD_DATA	/;"	d
CLKDIV	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                    CLKDIV /;"	d
CLKDIVN	arch/arm/cpu/arm920t/start.S	/^#  define CLKDIVN	/;"	d	file:
CLKDIV_BYPASS	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define             CLKDIV_BYPASS /;"	d
CLKDLYPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKDLYPDCTLCH0	/;"	d
CLKDLYPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKDLYPUCTLCH0	/;"	d
CLKDRVPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKDRVPDCTLCH0	/;"	d
CLKDRVPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKDRVPUCTLCH0	/;"	d
CLKD_MASK	arch/arm/include/asm/omap_mmc.h	/^#define CLKD_MASK	/;"	d
CLKD_OFFSET	arch/arm/include/asm/omap_mmc.h	/^#define CLKD_OFFSET	/;"	d
CLKEN_AUTOSENSE_OFF_MASK	drivers/i2c/kona_i2c.c	/^#define CLKEN_AUTOSENSE_OFF_MASK	/;"	d	file:
CLKEN_CLKEN_MASK	drivers/i2c/kona_i2c.c	/^#define CLKEN_CLKEN_MASK	/;"	d	file:
CLKEN_M_SHIFT	drivers/i2c/kona_i2c.c	/^#define CLKEN_M_SHIFT	/;"	d	file:
CLKEN_N_SHIFT	drivers/i2c/kona_i2c.c	/^#define CLKEN_N_SHIFT	/;"	d	file:
CLKEN_OFFSET	drivers/i2c/kona_i2c.c	/^#define CLKEN_OFFSET	/;"	d	file:
CLKF_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLKF_MASK		= 0x1fff,$/;"	e	enum:__anon3783c4e20903
CLKF_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLKF_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20903
CLKHI	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define CLKHI(/;"	d
CLKIN	board/bf537-stamp/post-memory.c	/^#define CLKIN /;"	d	file:
CLKIN_SEL_SYS_CLK	include/usb/ehci-ci.h	/^#define CLKIN_SEL_SYS_CLK	/;"	d
CLKIN_SEL_SYS_CLK2	include/usb/ehci-ci.h	/^#define CLKIN_SEL_SYS_CLK2	/;"	d
CLKIN_SEL_USB_CLK	include/usb/ehci-ci.h	/^#define CLKIN_SEL_USB_CLK	/;"	d
CLKIN_SEL_USB_CLK2	include/usb/ehci-ci.h	/^#define CLKIN_SEL_USB_CLK2	/;"	d
CLKLOW	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	CLKLOW(/;"	d
CLKMGRCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGRCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define CLKMGRCOLD_RESET	/;"	d
CLKMGR_BYPASS_MAINPLL	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_MAINPLL	/;"	d
CLKMGR_BYPASS_MAINPLL_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_MAINPLL_OFFSET	/;"	d
CLKMGR_BYPASS_PERPLL	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_PERPLL	/;"	d
CLKMGR_BYPASS_PERPLLSRC	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_PERPLLSRC	/;"	d
CLKMGR_BYPASS_PERPLLSRC_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_PERPLLSRC_OFFSET	/;"	d
CLKMGR_BYPASS_PERPLL_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_PERPLL_OFFSET	/;"	d
CLKMGR_BYPASS_SDRPLL	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_SDRPLL	/;"	d
CLKMGR_BYPASS_SDRPLLSRC	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_SDRPLLSRC	/;"	d
CLKMGR_BYPASS_SDRPLLSRC_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_SDRPLLSRC_OFFSET	/;"	d
CLKMGR_BYPASS_SDRPLL_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_BYPASS_SDRPLL_OFFSET	/;"	d
CLKMGR_CTRL_SAFEMODE	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_CTRL_SAFEMODE	/;"	d
CLKMGR_CTRL_SAFEMODE_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_CTRL_SAFEMODE_OFFSET	/;"	d
CLKMGR_INTER_MAINPLLLOCKED_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_INTER_MAINPLLLOCKED_MASK	/;"	d
CLKMGR_INTER_MAINPLLLOST_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_INTER_MAINPLLLOST_MASK	/;"	d
CLKMGR_INTER_PERPLLLOCKED_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_INTER_PERPLLLOCKED_MASK	/;"	d
CLKMGR_INTER_PERPLLLOST_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_INTER_PERPLLLOST_MASK	/;"	d
CLKMGR_INTER_SDRPLLLOCKED_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_INTER_SDRPLLLOCKED_MASK	/;"	d
CLKMGR_INTER_SDRPLLLOST_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_INTER_SDRPLLLOST_MASK	/;"	d
CLKMGR_L4_SP_CLK_SRC_MAINPLL	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_L4_SP_CLK_SRC_MAINPLL	/;"	d
CLKMGR_L4_SP_CLK_SRC_PERPLL	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_L4_SP_CLK_SRC_PERPLL	/;"	d
CLKMGR_MAINPLLGRP_CFGS2FUSER0CLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_CFGS2FUSER0CLK_CNT_MASK	/;"	d
CLKMGR_MAINPLLGRP_CFGS2FUSER0CLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_CFGS2FUSER0CLK_CNT_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_DBGATCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_DBGATCLK_CNT_MASK	/;"	d
CLKMGR_MAINPLLGRP_DBGATCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_DBGATCLK_CNT_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_DBGDIV_DBGATCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_DBGDIV_DBGATCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_DBGDIV_DBGATCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_DBGDIV_DBGATCLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_EN_DBGATCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_EN_DBGATCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_EN_DBGCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_EN_DBGCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_EN_DBGTIMERCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_EN_DBGTIMERCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_EN_DBGTRACECLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_EN_DBGTRACECLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_EN_L4MPCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_EN_L4MPCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_EN_S2FUSER0CLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_EN_S2FUSER0CLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_L4SRC_L4MP	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_L4SRC_L4MP	/;"	d
CLKMGR_MAINPLLGRP_L4SRC_L4MP_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_L4SRC_L4MP_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_L4SRC_L4SP	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_L4SRC_L4SP	/;"	d
CLKMGR_MAINPLLGRP_L4SRC_L4SP_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_L4SRC_L4SP_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_L4SRC_RESET_VALUE	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_L4SRC_RESET_VALUE	/;"	d
CLKMGR_MAINPLLGRP_MAINCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINCLK_CNT_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINCLK_CNT_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L3MPCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L3MPCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L3MPCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L3MPCLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L3SPCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L3SPCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L3SPCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L3SPCLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L4MPCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L4MPCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L4MPCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L4MPCLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MAINNANDSDMMCCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINNANDSDMMCCLK_CNT_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINNANDSDMMCCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINNANDSDMMCCLK_CNT_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_MASK	/;"	d
CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_MPUCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MPUCLK_CNT_MASK	/;"	d
CLKMGR_MAINPLLGRP_MPUCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_MPUCLK_CNT_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_TRACEDIV_TRACECLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_TRACEDIV_TRACECLK_MASK	/;"	d
CLKMGR_MAINPLLGRP_TRACEDIV_TRACECLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_TRACEDIV_TRACECLK_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_VCO_BGPWRDN	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_BGPWRDN	/;"	d
CLKMGR_MAINPLLGRP_VCO_BGPWRDN_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_BGPWRDN_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_VCO_DENOM_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_DENOM_MASK	/;"	d
CLKMGR_MAINPLLGRP_VCO_DENOM_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_DENOM_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_VCO_EN	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_EN	/;"	d
CLKMGR_MAINPLLGRP_VCO_EN_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_EN_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_VCO_NUMER_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_NUMER_MASK	/;"	d
CLKMGR_MAINPLLGRP_VCO_NUMER_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_NUMER_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_VCO_OUTRESETALL_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_OUTRESETALL_MASK	/;"	d
CLKMGR_MAINPLLGRP_VCO_PWRDN	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_PWRDN	/;"	d
CLKMGR_MAINPLLGRP_VCO_PWRDN_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_PWRDN_OFFSET	/;"	d
CLKMGR_MAINPLLGRP_VCO_REGEXTSEL_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_REGEXTSEL_MASK	/;"	d
CLKMGR_MAINPLLGRP_VCO_RESET_VALUE	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_MAINPLLGRP_VCO_RESET_VALUE	/;"	d
CLKMGR_PERPLLGRP_DIV_CAN0CLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_CAN0CLK_MASK	/;"	d
CLKMGR_PERPLLGRP_DIV_CAN0CLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_CAN0CLK_OFFSET	/;"	d
CLKMGR_PERPLLGRP_DIV_CAN1CLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_CAN1CLK_MASK	/;"	d
CLKMGR_PERPLLGRP_DIV_CAN1CLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_CAN1CLK_OFFSET	/;"	d
CLKMGR_PERPLLGRP_DIV_SPIMCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_SPIMCLK_OFFSET	/;"	d
CLKMGR_PERPLLGRP_DIV_USBCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_USBCLK_MASK	/;"	d
CLKMGR_PERPLLGRP_DIV_USBCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_DIV_USBCLK_OFFSET	/;"	d
CLKMGR_PERPLLGRP_EMAC0CLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_EMAC0CLK_CNT_MASK	/;"	d
CLKMGR_PERPLLGRP_EMAC0CLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_EMAC0CLK_CNT_OFFSET	/;"	d
CLKMGR_PERPLLGRP_EMAC1CLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_EMAC1CLK_CNT_MASK	/;"	d
CLKMGR_PERPLLGRP_EMAC1CLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_EMAC1CLK_CNT_OFFSET	/;"	d
CLKMGR_PERPLLGRP_EN_NANDCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_EN_NANDCLK_MASK	/;"	d
CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK	/;"	d
CLKMGR_PERPLLGRP_GPIODIV_GPIODBCLK_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_GPIODIV_GPIODBCLK_MASK	/;"	d
CLKMGR_PERPLLGRP_GPIODIV_GPIODBCLK_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_GPIODIV_GPIODBCLK_OFFSET	/;"	d
CLKMGR_PERPLLGRP_PERBASECLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_PERBASECLK_CNT_MASK	/;"	d
CLKMGR_PERPLLGRP_PERBASECLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_PERBASECLK_CNT_OFFSET	/;"	d
CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_MASK	/;"	d
CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_OFFSET	/;"	d
CLKMGR_PERPLLGRP_PERQSPICLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_PERQSPICLK_CNT_MASK	/;"	d
CLKMGR_PERPLLGRP_PERQSPICLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_PERQSPICLK_CNT_OFFSET	/;"	d
CLKMGR_PERPLLGRP_S2FUSER1CLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_S2FUSER1CLK_CNT_MASK	/;"	d
CLKMGR_PERPLLGRP_S2FUSER1CLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_S2FUSER1CLK_CNT_OFFSET	/;"	d
CLKMGR_PERPLLGRP_SRC_NAND_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_NAND_MASK	/;"	d
CLKMGR_PERPLLGRP_SRC_NAND_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_NAND_OFFSET	/;"	d
CLKMGR_PERPLLGRP_SRC_QSPI_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_QSPI_MASK	/;"	d
CLKMGR_PERPLLGRP_SRC_QSPI_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_QSPI_OFFSET	/;"	d
CLKMGR_PERPLLGRP_SRC_RESET_VALUE	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_RESET_VALUE	/;"	d
CLKMGR_PERPLLGRP_SRC_SDMMC_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_SDMMC_MASK	/;"	d
CLKMGR_PERPLLGRP_SRC_SDMMC_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_SRC_SDMMC_OFFSET	/;"	d
CLKMGR_PERPLLGRP_VCO_DENOM_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_DENOM_MASK	/;"	d
CLKMGR_PERPLLGRP_VCO_DENOM_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_DENOM_OFFSET	/;"	d
CLKMGR_PERPLLGRP_VCO_NUMER_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_NUMER_MASK	/;"	d
CLKMGR_PERPLLGRP_VCO_NUMER_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_NUMER_OFFSET	/;"	d
CLKMGR_PERPLLGRP_VCO_OUTRESETALL_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_OUTRESETALL_MASK	/;"	d
CLKMGR_PERPLLGRP_VCO_PSRC_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_PSRC_MASK	/;"	d
CLKMGR_PERPLLGRP_VCO_PSRC_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_PSRC_OFFSET	/;"	d
CLKMGR_PERPLLGRP_VCO_REGEXTSEL_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_REGEXTSEL_MASK	/;"	d
CLKMGR_PERPLLGRP_VCO_RESET_VALUE	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_RESET_VALUE	/;"	d
CLKMGR_PERPLLGRP_VCO_SSRC_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_SSRC_MASK	/;"	d
CLKMGR_PERPLLGRP_VCO_SSRC_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_PERPLLGRP_VCO_SSRC_OFFSET	/;"	d
CLKMGR_QSPI_CLK_SRC_F2S	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_QSPI_CLK_SRC_F2S	/;"	d
CLKMGR_QSPI_CLK_SRC_MAIN	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_QSPI_CLK_SRC_MAIN	/;"	d
CLKMGR_QSPI_CLK_SRC_PER	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_QSPI_CLK_SRC_PER	/;"	d
CLKMGR_SDMMC_CLK_SRC_F2S	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDMMC_CLK_SRC_F2S	/;"	d
CLKMGR_SDMMC_CLK_SRC_MAIN	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDMMC_CLK_SRC_MAIN	/;"	d
CLKMGR_SDMMC_CLK_SRC_PER	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDMMC_CLK_SRC_PER	/;"	d
CLKMGR_SDRPLLGRP_DDR2XDQSCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDR2XDQSCLK_CNT_MASK	/;"	d
CLKMGR_SDRPLLGRP_DDR2XDQSCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDR2XDQSCLK_CNT_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_MASK	/;"	d
CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK	/;"	d
CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_DDRDQCLK_PHASE_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQCLK_PHASE_MASK	/;"	d
CLKMGR_SDRPLLGRP_DDRDQCLK_PHASE_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQCLK_PHASE_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_DDRDQSCLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQSCLK_CNT_MASK	/;"	d
CLKMGR_SDRPLLGRP_DDRDQSCLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQSCLK_CNT_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_MASK	/;"	d
CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_MASK	/;"	d
CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_MASK	/;"	d
CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_VCO_DENOM_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_DENOM_MASK	/;"	d
CLKMGR_SDRPLLGRP_VCO_DENOM_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_DENOM_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_VCO_NUMER_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_NUMER_MASK	/;"	d
CLKMGR_SDRPLLGRP_VCO_NUMER_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_NUMER_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_VCO_OUTRESETALL	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_OUTRESETALL	/;"	d
CLKMGR_SDRPLLGRP_VCO_OUTRESETALL_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_OUTRESETALL_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_VCO_OUTRESET_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_OUTRESET_MASK	/;"	d
CLKMGR_SDRPLLGRP_VCO_OUTRESET_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_OUTRESET_OFFSET	/;"	d
CLKMGR_SDRPLLGRP_VCO_REGEXTSEL_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_REGEXTSEL_MASK	/;"	d
CLKMGR_SDRPLLGRP_VCO_RESET_VALUE	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_RESET_VALUE	/;"	d
CLKMGR_SDRPLLGRP_VCO_SSRC_MASK	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_SSRC_MASK	/;"	d
CLKMGR_SDRPLLGRP_VCO_SSRC_OFFSET	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_SDRPLLGRP_VCO_SSRC_OFFSET	/;"	d
CLKMGR_STAT_BUSY	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_STAT_BUSY	/;"	d
CLKMGR_VCO_SSRC_EOSC1	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_VCO_SSRC_EOSC1	/;"	d
CLKMGR_VCO_SSRC_EOSC2	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_VCO_SSRC_EOSC2	/;"	d
CLKMGR_VCO_SSRC_F2S	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define CLKMGR_VCO_SSRC_F2S	/;"	d
CLKMODE_AUTO	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CLKMODE_AUTO	/;"	d
CLKMODE_CONSUMER	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CLKMODE_CONSUMER	/;"	d
CLKODTPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKODTPDCTLCH0	/;"	d
CLKODTPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKODTPUCTLCH0	/;"	d
CLKOD_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLKOD_MASK		= 0xf,$/;"	e	enum:__anon3783c4e20803
CLKOD_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLKOD_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20803
CLKON	arch/sh/include/asm/cpu_sh7722.h	/^#define CLKON /;"	d
CLKON	arch/sh/include/asm/cpu_sh7780.h	/^#define	CLKON	/;"	d
CLKOUTSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL	/;"	d
CLKOUTSEL_CCLK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_CCLK	/;"	d
CLKOUTSEL_CLKIN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_CLKIN	/;"	d
CLKOUTSEL_DCLK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_DCLK	/;"	d
CLKOUTSEL_GND	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_GND	/;"	d
CLKOUTSEL_OUTCLK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_OUTCLK	/;"	d
CLKOUTSEL_PMON	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_PMON	/;"	d
CLKOUTSEL_SCLK0	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_SCLK0	/;"	d
CLKOUTSEL_SCLK1	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_SCLK1	/;"	d
CLKOUTSEL_SYSCLK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_SYSCLK	/;"	d
CLKOUTSEL_USB_CLKIN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_USB_CLKIN	/;"	d
CLKOUTSEL_USB_PLL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_USB_PLL	/;"	d
CLKOUTSEL_WDOG	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKOUTSEL_WDOG	/;"	d
CLKPMU_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKPMU_NR_CLKS	include/dt-bindings/clock/rk3399-cru.h	/^#define CLKPMU_NR_CLKS	/;"	d
CLKR_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLKR_MASK		= 0x3f,$/;"	e	enum:__anon3783c4e20803
CLKR_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLKR_SHIFT		= 8,$/;"	e	enum:__anon3783c4e20803
CLKSALGN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CLKSALGN	/;"	d
CLKSEL_CORE_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CLKSEL_CORE_SHIFT	/;"	d
CLKSEL_CORE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_CORE_SHIFT	/;"	d
CLKSEL_CORE_X2_DIV_1	arch/arm/include/asm/arch-omap4/clock.h	/^#define CLKSEL_CORE_X2_DIV_1	/;"	d
CLKSEL_CORE_X2_DIV_1	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_CORE_X2_DIV_1	/;"	d
CLKSEL_GPT1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CLKSEL_GPT1	/;"	d
CLKSEL_GPU_CORE_GCLK_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_GPU_CORE_GCLK_MASK	/;"	d
CLKSEL_GPU_HYD_GCLK_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_GPU_HYD_GCLK_MASK	/;"	d
CLKSEL_L3_CORE_DIV_2	arch/arm/include/asm/arch-omap4/clock.h	/^#define CLKSEL_L3_CORE_DIV_2	/;"	d
CLKSEL_L3_CORE_DIV_2	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_L3_CORE_DIV_2	/;"	d
CLKSEL_L3_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CLKSEL_L3_SHIFT	/;"	d
CLKSEL_L3_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_L3_SHIFT	/;"	d
CLKSEL_L4_L3_DIV_2	arch/arm/include/asm/arch-omap4/clock.h	/^#define CLKSEL_L4_L3_DIV_2	/;"	d
CLKSEL_L4_L3_DIV_2	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_L4_L3_DIV_2	/;"	d
CLKSEL_L4_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CLKSEL_L4_SHIFT	/;"	d
CLKSEL_L4_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CLKSEL_L4_SHIFT	/;"	d
CLKSET2_VAL	board/cirrus/edb93xx/edb93xx.c	/^#define CLKSET2_VAL	/;"	d	file:
CLKSTP	arch/sh/include/asm/cpu_sh7750.h	/^#define CLKSTP	/;"	d
CLKSTPCLR	arch/sh/include/asm/cpu_sh7750.h	/^#define CLKSTPCLR	/;"	d
CLKS_EN	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   CLKS_EN /;"	d
CLKS_SHIFT	arch/arm/cpu/armv7/bcm281xx/reset.c	/^#define CLKS_SHIFT	/;"	d	file:
CLKTCOPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKTCOPDCTLCH0	/;"	d
CLKTCOPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CLKTCOPUCTLCH0	/;"	d
CLKVREFCH0	arch/x86/cpu/quark/smc.h	/^#define CLKVREFCH0	/;"	d
CLK_24MHZ	arch/arm/mach-exynos/include/mach/ehci.h	/^#define CLK_24MHZ	/;"	d
CLK_400KHZ	arch/arm/include/asm/omap_mmc.h	/^#define CLK_400KHZ	/;"	d
CLK_ACLK_FSYS0_200	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS0_200	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS0_200	/;"	d
CLK_ACLK_FSYS1_200	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_FSYS1_200	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_FSYS1_200	/;"	d
CLK_ACLK_PERIC0_66	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC0_66	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC0_66	/;"	d
CLK_ACLK_PERIC1_66	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_ACLK_PERIC1_66	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_ACLK_PERIC1_66	/;"	d
CLK_AC_DIG	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_AC_DIG	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AC_DIG	/;"	d
CLK_ARM	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_ARM,$/;"	e	enum:rk_clk_id
CLK_AT91	drivers/clk/at91/Kconfig	/^config CLK_AT91$/;"	c
CLK_AVS	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_AVS	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_AVS	/;"	d
CLK_BOSTON	drivers/clk/Kconfig	/^config CLK_BOSTON$/;"	c	menu:Clock
CLK_BUS_CE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CE	/;"	d
CLK_BUS_CODEC	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CODEC	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CODEC	/;"	d
CLK_BUS_CSI	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_CSI	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_CSI	/;"	d
CLK_BUS_DBG	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DBG	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DBG	/;"	d
CLK_BUS_DE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DE	/;"	d
CLK_BUS_DEINTERLACE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DEINTERLACE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DEINTERLACE	/;"	d
CLK_BUS_DMA	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DMA	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DMA	/;"	d
CLK_BUS_DRAM	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_DRAM	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_DRAM	/;"	d
CLK_BUS_EHCI0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI0	/;"	d
CLK_BUS_EHCI1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI1	/;"	d
CLK_BUS_EHCI2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI2	/;"	d
CLK_BUS_EHCI3	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EHCI3	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EHCI3	/;"	d
CLK_BUS_EMAC	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EMAC	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EMAC	/;"	d
CLK_BUS_EPHY	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_EPHY	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_EPHY	/;"	d
CLK_BUS_GPU	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_GPU	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_GPU	/;"	d
CLK_BUS_HDMI	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HDMI	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HDMI	/;"	d
CLK_BUS_HSTIMER	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_HSTIMER	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_HSTIMER	/;"	d
CLK_BUS_I2C0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C0	/;"	d
CLK_BUS_I2C1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C1	/;"	d
CLK_BUS_I2C2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2C2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2C2	/;"	d
CLK_BUS_I2S0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S0	/;"	d
CLK_BUS_I2S1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S1	/;"	d
CLK_BUS_I2S2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_I2S2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_I2S2	/;"	d
CLK_BUS_MMC0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC0	/;"	d
CLK_BUS_MMC1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC1	/;"	d
CLK_BUS_MMC2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MMC2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MMC2	/;"	d
CLK_BUS_MSGBOX	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_MSGBOX	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_MSGBOX	/;"	d
CLK_BUS_NAND	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_NAND	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_NAND	/;"	d
CLK_BUS_OHCI0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI0	/;"	d
CLK_BUS_OHCI1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI1	/;"	d
CLK_BUS_OHCI2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI2	/;"	d
CLK_BUS_OHCI3	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OHCI3	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OHCI3	/;"	d
CLK_BUS_OTG	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_OTG	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_OTG	/;"	d
CLK_BUS_PIO	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_PIO	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_PIO	/;"	d
CLK_BUS_SCR	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SCR	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SCR	/;"	d
CLK_BUS_SPDIF	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPDIF	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPDIF	/;"	d
CLK_BUS_SPI0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI0	/;"	d
CLK_BUS_SPI1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPI1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPI1	/;"	d
CLK_BUS_SPINLOCK	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_SPINLOCK	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_SPINLOCK	/;"	d
CLK_BUS_TCON0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON0	/;"	d
CLK_BUS_TCON1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_TCON1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TCON1	/;"	d
CLK_BUS_THS	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_THS	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_THS	/;"	d
CLK_BUS_TS	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TS	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TS	/;"	d
CLK_BUS_TVE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_TVE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_TVE	/;"	d
CLK_BUS_UART0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART0	/;"	d
CLK_BUS_UART1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART1	/;"	d
CLK_BUS_UART2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART2	/;"	d
CLK_BUS_UART3	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_UART3	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_UART3	/;"	d
CLK_BUS_VE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_BUS_VE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_BUS_VE	/;"	d
CLK_CE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CE	/;"	d
CLK_CHANGE_DELAY	drivers/mmc/arm_pl180_mmci.h	/^#define CLK_CHANGE_DELAY	/;"	d
CLK_CLEAR	drivers/mmc/sh_mmcif.h	/^#define CLK_CLEAR	/;"	d
CLK_CNTRL	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL	/;"	d
CLK_CNTRL_DP_CLK_SEL_DIFF_DPCLK	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_CLK_SEL_DIFF_DPCLK	/;"	d
CLK_CNTRL_DP_CLK_SEL_DIFF_PCLK	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_CLK_SEL_DIFF_PCLK	/;"	d
CLK_CNTRL_DP_CLK_SEL_MASK	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_CLK_SEL_MASK	/;"	d
CLK_CNTRL_DP_CLK_SEL_SHIFT	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_CLK_SEL_SHIFT	/;"	d
CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK	/;"	d
CLK_CNTRL_DP_CLK_SEL_SINGLE_PCLK	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_CLK_SEL_SINGLE_PCLK	/;"	d
CLK_CNTRL_DP_LINK_SPEED_G1_62	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_LINK_SPEED_G1_62	/;"	d
CLK_CNTRL_DP_LINK_SPEED_G2_7	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_LINK_SPEED_G2_7	/;"	d
CLK_CNTRL_DP_LINK_SPEED_LVDS	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_LINK_SPEED_LVDS	/;"	d
CLK_CNTRL_DP_LINK_SPEED_MASK	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_LINK_SPEED_MASK	/;"	d
CLK_CNTRL_DP_LINK_SPEED_SHIFT	drivers/video/tegra124/sor.h	/^#define CLK_CNTRL_DP_LINK_SPEED_SHIFT	/;"	d
CLK_CODE	arch/arm/cpu/arm1136/mx35/generic.c	/^#define CLK_CODE(/;"	d	file:
CLK_CODEC	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_CODEC,$/;"	e	enum:rk_clk_id
CLK_CODE_AHB	arch/arm/cpu/arm1136/mx35/generic.c	/^#define CLK_CODE_AHB(/;"	d	file:
CLK_CODE_ARM	arch/arm/cpu/arm1136/mx35/generic.c	/^#define CLK_CODE_ARM(/;"	d	file:
CLK_CODE_PATH	arch/arm/cpu/arm1136/mx35/generic.c	/^#define CLK_CODE_PATH(/;"	d	file:
CLK_CORE_L_DIV_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_DIV_MASK		= 0x1f,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_DIV_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_DIV_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_PLL_SEL_ABPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_PLL_SEL_ABPLL	= 0x1,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_PLL_SEL_ALPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_PLL_SEL_ALPLL	= 0x0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_PLL_SEL_DPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_PLL_SEL_DPLL		= 0x10,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_PLL_SEL_GPLL		= 0x11,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_PLL_SEL_MASK		= 3 << CLK_CORE_L_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
CLK_CORE_L_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_CORE_L_PLL_SEL_SHIFT	= 6,$/;"	e	enum:__anon06b9221d0103	file:
CLK_COUNT	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_COUNT,$/;"	e	enum:rk_clk_id
CLK_CPU	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU	/;"	d
CLK_CPU	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU	/;"	d
CLK_CPUX	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPUX	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CPUX	/;"	d
CLK_CPU_1000	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1000	/;"	d
CLK_CPU_1000	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1000	/;"	d
CLK_CPU_1066	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1066	/;"	d
CLK_CPU_1066	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1066	/;"	d
CLK_CPU_1200	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1200	/;"	d
CLK_CPU_1200	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1200	/;"	d
CLK_CPU_1333	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1333	/;"	d
CLK_CPU_1333	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1333	/;"	d
CLK_CPU_1500	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1500	/;"	d
CLK_CPU_1500	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1500	/;"	d
CLK_CPU_1600	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1600	/;"	d
CLK_CPU_1600	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1600	/;"	d
CLK_CPU_1666	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1666	/;"	d
CLK_CPU_1666	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1666	/;"	d
CLK_CPU_1800	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_1800	/;"	d
CLK_CPU_1800	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_1800	/;"	d
CLK_CPU_2000	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_2000	/;"	d
CLK_CPU_2000	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_2000	/;"	d
CLK_CPU_2133	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_2133	/;"	d
CLK_CPU_2133	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_2133	/;"	d
CLK_CPU_2200	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_2200	/;"	d
CLK_CPU_2200	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_2200	/;"	d
CLK_CPU_2400	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_2400	/;"	d
CLK_CPU_2400	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_2400	/;"	d
CLK_CPU_600	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_600	/;"	d
CLK_CPU_600	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_600	/;"	d
CLK_CPU_667	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_667	/;"	d
CLK_CPU_667	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_667	/;"	d
CLK_CPU_800	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_CPU_800	/;"	d
CLK_CPU_800	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_CPU_800	/;"	d
CLK_CSI_MCLK	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MCLK	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MCLK	/;"	d
CLK_CSI_MISC	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_MISC	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_MISC	/;"	d
CLK_CSI_SCLK	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CSI_SCLK	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_CSI_SCLK	/;"	d
CLK_CTRL_DIV0_MASK	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV0_MASK	/;"	d	file:
CLK_CTRL_DIV0_SHIFT	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV0_SHIFT	/;"	d	file:
CLK_CTRL_DIV1_MASK	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV1_MASK	/;"	d	file:
CLK_CTRL_DIV1_SHIFT	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV1_SHIFT	/;"	d	file:
CLK_CTRL_DIV2X_MASK	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV2X_MASK	/;"	d	file:
CLK_CTRL_DIV2X_SHIFT	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV2X_SHIFT	/;"	d	file:
CLK_CTRL_DIV3X_MASK	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV3X_MASK	/;"	d	file:
CLK_CTRL_DIV3X_SHIFT	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_DIV3X_SHIFT	/;"	d	file:
CLK_CTRL_SRCSEL_MASK	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_SRCSEL_MASK	/;"	d	file:
CLK_CTRL_SRCSEL_SHIFT	arch/arm/mach-zynq/clk.c	/^#define CLK_CTRL_SRCSEL_SHIFT	/;"	d	file:
CLK_D	arch/arm/mach-s5pc1xx/clock.c	/^#define CLK_D	/;"	d	file:
CLK_DDR	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_DDR,$/;"	e	enum:rk_clk_id
CLK_DDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_DDR	/;"	d
CLK_DDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_DDR	/;"	d
CLK_DE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DE	/;"	d
CLK_DEINTERLACE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DEINTERLACE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DEINTERLACE	/;"	d
CLK_DIS	board/samsung/trats/setup.h	/^#define CLK_DIS	/;"	d
CLK_DIV2_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV2_RATIO	/;"	d
CLK_DIV4_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV4_RATIO	/;"	d
CLK_DIVIDER	arch/arm/include/asm/arch-tegra/ap.h	/^#define CLK_DIVIDER(/;"	d
CLK_DIVIDER	arch/arm/mach-tegra/cpu.h	/^#define CLK_DIVIDER(/;"	d
CLK_DIV_ACP_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_ACP_VAL /;"	d
CLK_DIV_CAM_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_CAM_VAL	/;"	d
CLK_DIV_CDREX0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CDREX0_VAL	/;"	d
CLK_DIV_CDREX1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CDREX1_VAL	/;"	d
CLK_DIV_CDREX_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CDREX_VAL	/;"	d
CLK_DIV_CDREX_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CDREX_VAL /;"	d
CLK_DIV_CORE0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CORE0_VAL /;"	d
CLK_DIV_CORE1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CORE1_VAL /;"	d
CLK_DIV_CPERI1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CPERI1_VAL	/;"	d
CLK_DIV_CPU0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_CPU0_VAL	/;"	d
CLK_DIV_CPU0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CPU0_VAL	/;"	d
CLK_DIV_CPU0_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_CPU0_VAL	/;"	d
CLK_DIV_CPU1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_CPU1_VAL	/;"	d
CLK_DIV_CPU1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_CPU1_VAL /;"	d
CLK_DIV_CPU1_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_CPU1_VAL	/;"	d
CLK_DIV_DISP1_0_FIMD1	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_DISP1_0_FIMD1	/;"	d
CLK_DIV_DISP1_0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_DISP1_0_VAL	/;"	d
CLK_DIV_DMC0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_DMC0_VAL	/;"	d
CLK_DIV_DMC0_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_DMC0_VAL	/;"	d
CLK_DIV_DMC1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_DMC1_VAL	/;"	d
CLK_DIV_DMC1_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_DMC1_VAL	/;"	d
CLK_DIV_FSYS0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_FSYS0_VAL	/;"	d
CLK_DIV_FSYS1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_FSYS1_VAL	/;"	d
CLK_DIV_FSYS1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_FSYS1_VAL	/;"	d
CLK_DIV_FSYS1_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_FSYS1_VAL	/;"	d
CLK_DIV_FSYS2_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_FSYS2_VAL	/;"	d
CLK_DIV_FSYS2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_FSYS2_VAL	/;"	d
CLK_DIV_FSYS2_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_FSYS2_VAL	/;"	d
CLK_DIV_FSYS3_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_FSYS3_VAL	/;"	d
CLK_DIV_FSYS3_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_FSYS3_VAL	/;"	d
CLK_DIV_G2D	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_G2D	/;"	d
CLK_DIV_G3D_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_G3D_VAL	/;"	d
CLK_DIV_HS_MODE	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define CLK_DIV_HS_MODE	/;"	d
CLK_DIV_ISP0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_ISP0_VAL	/;"	d
CLK_DIV_ISP1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_ISP1_VAL	/;"	d
CLK_DIV_ISP2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_ISP2_VAL /;"	d
CLK_DIV_KFC_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_KFC_VAL	/;"	d
CLK_DIV_LCD0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_LCD0_VAL	/;"	d
CLK_DIV_LEFTBUS_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_LEFTBUS_VAL	/;"	d
CLK_DIV_LEFTBUS_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_LEFTBUS_VAL	/;"	d
CLK_DIV_LEX_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_LEX_VAL /;"	d
CLK_DIV_MFC_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_MFC_VAL	/;"	d
CLK_DIV_PERIC0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_PERIC0_VAL	/;"	d
CLK_DIV_PERIC1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_PERIC1_VAL	/;"	d
CLK_DIV_PERIC2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_PERIC2_VAL	/;"	d
CLK_DIV_PERIC3_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_PERIC3_VAL	/;"	d
CLK_DIV_PERIC4_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_PERIC4_VAL	/;"	d
CLK_DIV_PERIL0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_PERIL0_VAL	/;"	d
CLK_DIV_PERIL0_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_PERIL0_VAL	/;"	d
CLK_DIV_PERIL3_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_PERIL3_VAL	/;"	d
CLK_DIV_R0X_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_R0X_VAL /;"	d
CLK_DIV_R1X_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_R1X_VAL /;"	d
CLK_DIV_RIGHTBUS_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_RIGHTBUS_VAL	/;"	d
CLK_DIV_RIGHTBUS_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_RIGHTBUS_VAL	/;"	d
CLK_DIV_STD_FAST_MODE	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define CLK_DIV_STD_FAST_MODE	/;"	d
CLK_DIV_SYSLFT_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_SYSLFT_VAL /;"	d
CLK_DIV_SYSRGT_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_SYSRGT_VAL /;"	d
CLK_DIV_TOP0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_TOP0_VAL	/;"	d
CLK_DIV_TOP1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_TOP1_VAL	/;"	d
CLK_DIV_TOP2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_DIV_TOP2_VAL	/;"	d
CLK_DIV_TOP_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_DIV_TOP_VAL	/;"	d
CLK_DIV_TOP_VAL	board/samsung/trats/setup.h	/^#define CLK_DIV_TOP_VAL	/;"	d
CLK_DMA_ENABLE	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_DMA_ENABLE	/;"	d
CLK_DRAM_CSI	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_CSI	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_CSI	/;"	d
CLK_DRAM_DEINTERLACE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_DEINTERLACE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_DEINTERLACE	/;"	d
CLK_DRAM_TS	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_TS	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_TS	/;"	d
CLK_DRAM_VE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_DRAM_VE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_DRAM_VE	/;"	d
CLK_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                     CLK_E /;"	d
CLK_EMMC_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_EMMC_DIV_CON_MASK           = 0x7f << CLK_EMMC_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
CLK_EMMC_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_EMMC_DIV_CON_SHIFT          = 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_EMMC_PLL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_EMMC_PLL_MASK               = 0x7 << CLK_EMMC_PLL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
CLK_EMMC_PLL_SEL_24M	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_EMMC_PLL_SEL_24M            = 0x5,$/;"	e	enum:__anon06b9221d0103	file:
CLK_EMMC_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_EMMC_PLL_SEL_GPLL           = 0x1,$/;"	e	enum:__anon06b9221d0103	file:
CLK_EMMC_PLL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_EMMC_PLL_SHIFT              = 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_EN	board/samsung/trats/setup.h	/^#define CLK_EN	/;"	d
CLK_ENABLE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define CLK_ENABLE	/;"	d
CLK_ENABLE	drivers/mmc/sh_mmcif.h	/^#define CLK_ENABLE	/;"	d
CLK_ENB_CPU	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CLK_ENB_CPU	/;"	d
CLK_ETH_MCLK	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_ETH_MCLK	/;"	d
CLK_ETH_PLL1	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_ETH_PLL1	/;"	d
CLK_ETH_PLL2	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_ETH_PLL2	/;"	d
CLK_EXYNOS	drivers/clk/exynos/Kconfig	/^config CLK_EXYNOS$/;"	c
CLK_EXYNOS7420	drivers/clk/exynos/Kconfig	/^config CLK_EXYNOS7420$/;"	c	menu:Clock drivers for Exynos SoCs
CLK_FREQUENCY	arch/arm/include/asm/arch-tegra/ap.h	/^#define CLK_FREQUENCY(/;"	d
CLK_FREQUENCY	arch/arm/mach-tegra/cpu.h	/^#define CLK_FREQUENCY(/;"	d
CLK_GATE_BLOCK_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_BLOCK_ALL_DIS	/;"	d
CLK_GATE_BLOCK_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_BLOCK_ALL_EN	/;"	d
CLK_GATE_BLOCK_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_BLOCK_VAL	/;"	d
CLK_GATE_CLOSE	arch/arm/include/asm/arch-sunxi/clock.h	/^#define CLK_GATE_CLOSE	/;"	d
CLK_GATE_CLOSE	arch/arm/include/asm/arch/clock.h	/^#define CLK_GATE_CLOSE	/;"	d
CLK_GATE_DELAY_USEC	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^#define CLK_GATE_DELAY_USEC /;"	d	file:
CLK_GATE_DELAY_USEC	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^#define CLK_GATE_DELAY_USEC /;"	d	file:
CLK_GATE_DP1_ALLOW	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_GATE_DP1_ALLOW	/;"	d
CLK_GATE_IP_CAM_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_CAM_ALL_DIS	/;"	d
CLK_GATE_IP_CAM_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_CAM_ALL_EN	/;"	d
CLK_GATE_IP_CAM_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_CAM_VAL	/;"	d
CLK_GATE_IP_FSYS_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_FSYS_ALL_DIS	/;"	d
CLK_GATE_IP_FSYS_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_FSYS_ALL_EN	/;"	d
CLK_GATE_IP_FSYS_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_FSYS_VAL	/;"	d
CLK_GATE_IP_G3D_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_G3D_ALL_DIS	/;"	d
CLK_GATE_IP_G3D_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_G3D_ALL_EN	/;"	d
CLK_GATE_IP_G3D_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_G3D_VAL	/;"	d
CLK_GATE_IP_GPS_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_GPS_ALL_DIS	/;"	d
CLK_GATE_IP_GPS_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_GPS_ALL_EN	/;"	d
CLK_GATE_IP_GPS_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_GPS_VAL	/;"	d
CLK_GATE_IP_IMAGE_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_IMAGE_ALL_DIS	/;"	d
CLK_GATE_IP_IMAGE_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_IMAGE_ALL_EN	/;"	d
CLK_GATE_IP_IMAGE_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_IMAGE_VAL	/;"	d
CLK_GATE_IP_LCD0_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_LCD0_ALL_DIS	/;"	d
CLK_GATE_IP_LCD0_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_LCD0_ALL_EN	/;"	d
CLK_GATE_IP_LCD0_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_LCD0_VAL	/;"	d
CLK_GATE_IP_LCD1_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_LCD1_ALL_DIS	/;"	d
CLK_GATE_IP_LCD1_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_LCD1_ALL_EN	/;"	d
CLK_GATE_IP_LCD1_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_LCD1_VAL	/;"	d
CLK_GATE_IP_MFC_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_MFC_ALL_DIS	/;"	d
CLK_GATE_IP_MFC_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_MFC_ALL_EN	/;"	d
CLK_GATE_IP_MFC_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_MFC_VAL	/;"	d
CLK_GATE_IP_PERIL_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_PERIL_ALL_DIS	/;"	d
CLK_GATE_IP_PERIL_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_PERIL_ALL_EN	/;"	d
CLK_GATE_IP_PERIL_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_PERIL_VAL	/;"	d
CLK_GATE_IP_PERIR_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_PERIR_ALL_DIS	/;"	d
CLK_GATE_IP_PERIR_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_PERIR_ALL_EN	/;"	d
CLK_GATE_IP_PERIR_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_PERIR_VAL	/;"	d
CLK_GATE_IP_VP_ALL_DIS	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_VP_ALL_DIS	/;"	d
CLK_GATE_IP_VP_ALL_EN	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_VP_ALL_EN	/;"	d
CLK_GATE_IP_VP_VAL	board/samsung/trats/setup.h	/^#define CLK_GATE_IP_VP_VAL	/;"	d
CLK_GATE_OPEN	arch/arm/include/asm/arch-sunxi/clock.h	/^#define CLK_GATE_OPEN	/;"	d
CLK_GATE_OPEN	arch/arm/include/asm/arch/clock.h	/^#define CLK_GATE_OPEN	/;"	d
CLK_GENERAL	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_GENERAL,$/;"	e	enum:rk_clk_id
CLK_GPU	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_GPU	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_GPU	/;"	d
CLK_HCLK_ARM_PLL_DIV_1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_ARM_PLL_DIV_1	/;"	d
CLK_HCLK_ARM_PLL_DIV_2	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_ARM_PLL_DIV_2	/;"	d
CLK_HCLK_ARM_PLL_DIV_4	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_ARM_PLL_DIV_4	/;"	d
CLK_HCLK_ARM_PLL_DIV_MASK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_ARM_PLL_DIV_MASK	/;"	d
CLK_HCLK_DDRAM_HALF	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_DDRAM_HALF	/;"	d
CLK_HCLK_DDRAM_MASK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_DDRAM_MASK	/;"	d
CLK_HCLK_DDRAM_NOMINAL	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_DDRAM_NOMINAL	/;"	d
CLK_HCLK_DDRAM_STOPPED	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_DDRAM_STOPPED	/;"	d
CLK_HCLK_PERIPH_DIV	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PERIPH_DIV(/;"	d
CLK_HCLK_PERIPH_DIV_MASK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PERIPH_DIV_MASK	/;"	d
CLK_HCLK_PLL_BYPASS	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_BYPASS	/;"	d
CLK_HCLK_PLL_DIRECT	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_DIRECT	/;"	d
CLK_HCLK_PLL_FEEDBACK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_FEEDBACK	/;"	d
CLK_HCLK_PLL_FEEDBACK_DIV	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_FEEDBACK_DIV(/;"	d
CLK_HCLK_PLL_FEEDBACK_DIV_MASK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_FEEDBACK_DIV_MASK	/;"	d
CLK_HCLK_PLL_LOCKED	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_LOCKED	/;"	d
CLK_HCLK_PLL_OPERATING	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_OPERATING	/;"	d
CLK_HCLK_PLL_POSTDIV_16	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_POSTDIV_16	/;"	d
CLK_HCLK_PLL_POSTDIV_2	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_POSTDIV_2	/;"	d
CLK_HCLK_PLL_POSTDIV_4	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_POSTDIV_4	/;"	d
CLK_HCLK_PLL_POSTDIV_8	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_POSTDIV_8	/;"	d
CLK_HCLK_PLL_POSTDIV_MASK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_POSTDIV_MASK	/;"	d
CLK_HCLK_PLL_PREDIV_1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_PREDIV_1	/;"	d
CLK_HCLK_PLL_PREDIV_2	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_PREDIV_2	/;"	d
CLK_HCLK_PLL_PREDIV_3	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_PREDIV_3	/;"	d
CLK_HCLK_PLL_PREDIV_4	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_PREDIV_4	/;"	d
CLK_HCLK_PLL_PREDIV_MASK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_HCLK_PLL_PREDIV_MASK	/;"	d
CLK_HDMI	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI	/;"	d
CLK_HDMI_DDC	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_HDMI_DDC	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_HDMI_DDC	/;"	d
CLK_I2C0_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C0_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C1_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C1_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C1_ENABLE	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_I2C1_ENABLE	/;"	d
CLK_I2C1_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C1_PLL_SEL_SHIFT		= 7,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C2_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C2_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C2_ENABLE	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_I2C2_ENABLE	/;"	d
CLK_I2C2_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C2_PLL_SEL_SHIFT		= 7,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C3_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C3_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C3_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C3_PLL_SEL_SHIFT		= 7,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C4_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C4_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C5_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C5_DIV_CON_SHIFT		= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C5_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C5_PLL_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C6_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C6_DIV_CON_SHIFT		= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C6_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C6_PLL_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C7_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C7_DIV_CON_SHIFT		= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C7_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C7_PLL_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C8_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C8_DIV_CON_SHIFT		= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C_PLL_SEL_CPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C_PLL_SEL_CPLL		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C_PLL_SEL_GPLL		= 1,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2C_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_I2C_PLL_SEL_MASK		= 1,$/;"	e	enum:__anon06b9221d0103	file:
CLK_I2S0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S0	/;"	d
CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S1	/;"	d
CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_I2S2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_I2S2	/;"	d
CLK_INITSEQ	arch/arm/include/asm/omap_mmc.h	/^#define CLK_INITSEQ	/;"	d
CLK_L2RAM_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLK_L2RAM_DIV_MASK	= 7,$/;"	e	enum:__anon3783c4e20503
CLK_L2RAM_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CLK_L2RAM_DIV_SHIFT	= 0,$/;"	e	enum:__anon3783c4e20503
CLK_LIST	arch/arm/mach-keystone/include/mach/clock.h	/^	CLK_LIST(GENERATE_ENUM)$/;"	e	enum:clk_e
CLK_LIST	arch/arm/mach-keystone/include/mach/clock.h	/^#define CLK_LIST(/;"	d
CLK_LK	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define CLK_LK(/;"	d
CLK_LK	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define CLK_LK(/;"	d
CLK_M	arch/arm/mach-s5pc1xx/clock.c	/^#define CLK_M	/;"	d	file:
CLK_MAC_MASTER	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_MAC_MASTER	/;"	d
CLK_MAC_MII	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_MAC_MII	/;"	d
CLK_MAC_REG	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_MAC_REG	/;"	d
CLK_MAC_RMII	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_MAC_RMII	/;"	d
CLK_MAC_SLAVE	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_MAC_SLAVE	/;"	d
CLK_MHZ	arch/mips/mach-pic32/cpu.c	/^#define CLK_MHZ(/;"	d	file:
CLK_MISC	arch/arm/include/asm/omap_mmc.h	/^#define CLK_MISC	/;"	d
CLK_MMC0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0	/;"	d
CLK_MMC0_OUTPUT	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_OUTPUT	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_OUTPUT	/;"	d
CLK_MMC0_SAMPLE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC0_SAMPLE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC0_SAMPLE	/;"	d
CLK_MMC1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1	/;"	d
CLK_MMC1_OUTPUT	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_OUTPUT	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_OUTPUT	/;"	d
CLK_MMC1_SAMPLE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC1_SAMPLE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC1_SAMPLE	/;"	d
CLK_MMC2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2	/;"	d
CLK_MMC2_OUTPUT	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_OUTPUT	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_OUTPUT	/;"	d
CLK_MMC2_SAMPLE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MMC2_SAMPLE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_MMC2_SAMPLE	/;"	d
CLK_MULTI	drivers/mtd/nand/denali.h	/^#define CLK_MULTI /;"	d
CLK_MULT_STD_FAST_MODE	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define CLK_MULT_STD_FAST_MODE	/;"	d
CLK_MUX_SEL_MASK	board/freescale/b4860qds/b4860qds.c	/^#define CLK_MUX_SEL_MASK	/;"	d	file:
CLK_NAND	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_NAND	/;"	d
CLK_NAND_MLC	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_NAND_MLC	/;"	d
CLK_NAND_MLC_INT	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_NAND_MLC_INT	/;"	d
CLK_NAND_SLC	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_NAND_SLC	/;"	d
CLK_NAND_SLC_SELECT	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_NAND_SLC_SELECT	/;"	d
CLK_NEW	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_NEW,$/;"	e	enum:rk_clk_id
CLK_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	include/dt-bindings/clock/rk3036-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	include/dt-bindings/clock/rk3288-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_NR_CLKS	include/dt-bindings/clock/rk3399-cru.h	/^#define CLK_NR_CLKS	/;"	d
CLK_OSC	arch/arm/include/asm/arch-rockchip/clock.h	/^	CLK_OSC,$/;"	e	enum:rk_clk_id
CLK_P	arch/arm/mach-s5pc1xx/clock.c	/^#define CLK_P	/;"	d	file:
CLK_PCLK	drivers/mmc/sh_mmcif.h	/^#define CLK_PCLK	/;"	d
CLK_PIN_CNTL	include/radeon.h	/^#define CLK_PIN_CNTL	/;"	d
CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND	include/radeon.h	/^#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND	/;"	d
CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND_MASK	/;"	d
CLK_PIN_CNTL__CG_CLK_TO_OUTPIN	include/radeon.h	/^#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN	/;"	d
CLK_PIN_CNTL__CG_CLK_TO_OUTPIN_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN_MASK	/;"	d
CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN	include/radeon.h	/^#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN	/;"	d
CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN_MASK	/;"	d
CLK_PIN_CNTL__CG_SPARE	include/radeon.h	/^#define CLK_PIN_CNTL__CG_SPARE	/;"	d
CLK_PIN_CNTL__CG_SPARE_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__CG_SPARE_MASK	/;"	d
CLK_PIN_CNTL__CG_SPARE_RD_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__CG_SPARE_RD_MASK	/;"	d
CLK_PIN_CNTL__CP_CLK_RUNNING	include/radeon.h	/^#define CLK_PIN_CNTL__CP_CLK_RUNNING	/;"	d
CLK_PIN_CNTL__CP_CLK_RUNNING_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__CP_CLK_RUNNING_MASK	/;"	d
CLK_PIN_CNTL__DONT_USE_XTALIN	include/radeon.h	/^#define CLK_PIN_CNTL__DONT_USE_XTALIN	/;"	d
CLK_PIN_CNTL__DONT_USE_XTALIN_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__DONT_USE_XTALIN_MASK	/;"	d
CLK_PIN_CNTL__OSC_EN	include/radeon.h	/^#define CLK_PIN_CNTL__OSC_EN	/;"	d
CLK_PIN_CNTL__OSC_EN_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__OSC_EN_MASK	/;"	d
CLK_PIN_CNTL__PWRSEQ_DELAY_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__PWRSEQ_DELAY_MASK	/;"	d
CLK_PIN_CNTL__SCLK_DYN_START_CNTL	include/radeon.h	/^#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL	/;"	d
CLK_PIN_CNTL__SCLK_DYN_START_CNTL_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL_MASK	/;"	d
CLK_PIN_CNTL__SLOW_CLOCK_SOURCE	include/radeon.h	/^#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE	/;"	d
CLK_PIN_CNTL__SLOW_CLOCK_SOURCE_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE_MASK	/;"	d
CLK_PIN_CNTL__XTALIN_ALWAYS_ONb	include/radeon.h	/^#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb	/;"	d
CLK_PIN_CNTL__XTALIN_ALWAYS_ONb_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb_MASK	/;"	d
CLK_PIN_CNTL__XTL_LOW_GAIN	include/radeon.h	/^#define CLK_PIN_CNTL__XTL_LOW_GAIN	/;"	d
CLK_PIN_CNTL__XTL_LOW_GAIN_MASK	include/radeon.h	/^#define CLK_PIN_CNTL__XTL_LOW_GAIN_MASK	/;"	d
CLK_PM_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define CLK_PM_BASE	/;"	d
CLK_PWRMGT_CNTL	include/radeon.h	/^#define CLK_PWRMGT_CNTL	/;"	d
CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK	/;"	d
CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT	/;"	d
CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK	/;"	d
CLK_PWRMGT_CNTL__CG_NO1_DEBUG__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG__SHIFT	/;"	d
CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT	/;"	d
CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK	/;"	d
CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT__SHIFT	/;"	d
CLK_PWRMGT_CNTL__DISP_PM	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DISP_PM	/;"	d
CLK_PWRMGT_CNTL__DISP_PM_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DISP_PM_MASK	/;"	d
CLK_PWRMGT_CNTL__DISP_PM__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DISP_PM__SHIFT	/;"	d
CLK_PWRMGT_CNTL__DLL_READY	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DLL_READY	/;"	d
CLK_PWRMGT_CNTL__DLL_READY_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DLL_READY_MASK	/;"	d
CLK_PWRMGT_CNTL__DLL_READY__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DLL_READY__SHIFT	/;"	d
CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK	/;"	d
CLK_PWRMGT_CNTL__DYN_STOP_MODE__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__DYN_STOP_MODE__SHIFT	/;"	d
CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE	include/radeon.h	/^#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE	/;"	d
CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK	/;"	d
CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE__SHIFT	/;"	d
CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN	include/radeon.h	/^#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN	/;"	d
CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN_MASK	/;"	d
CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN__SHIFT	/;"	d
CLK_PWRMGT_CNTL__MCLK_TURNOFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MCLK_TURNOFF	/;"	d
CLK_PWRMGT_CNTL__MCLK_TURNOFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MCLK_TURNOFF_MASK	/;"	d
CLK_PWRMGT_CNTL__MCLK_TURNOFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MCLK_TURNOFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__MC_BUSY	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_BUSY	/;"	d
CLK_PWRMGT_CNTL__MC_BUSY_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_BUSY_MASK	/;"	d
CLK_PWRMGT_CNTL__MC_BUSY__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_BUSY__SHIFT	/;"	d
CLK_PWRMGT_CNTL__MC_CH_MODE	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_CH_MODE	/;"	d
CLK_PWRMGT_CNTL__MC_CH_MODE_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_CH_MODE_MASK	/;"	d
CLK_PWRMGT_CNTL__MC_CH_MODE__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_CH_MODE__SHIFT	/;"	d
CLK_PWRMGT_CNTL__MC_INT_CNTL	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_INT_CNTL	/;"	d
CLK_PWRMGT_CNTL__MC_INT_CNTL_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_INT_CNTL_MASK	/;"	d
CLK_PWRMGT_CNTL__MC_INT_CNTL__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_INT_CNTL__SHIFT	/;"	d
CLK_PWRMGT_CNTL__MC_SWITCH	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_SWITCH	/;"	d
CLK_PWRMGT_CNTL__MC_SWITCH_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_SWITCH_MASK	/;"	d
CLK_PWRMGT_CNTL__MC_SWITCH__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MC_SWITCH__SHIFT	/;"	d
CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF	/;"	d
CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF_MASK	/;"	d
CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__P2CLK_TURNOFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF	/;"	d
CLK_PWRMGT_CNTL__P2CLK_TURNOFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF_MASK	/;"	d
CLK_PWRMGT_CNTL__P2CLK_TURNOFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF	/;"	d
CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF_MASK	/;"	d
CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__PCLK_TURNOFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__PCLK_TURNOFF	/;"	d
CLK_PWRMGT_CNTL__PCLK_TURNOFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__PCLK_TURNOFF_MASK	/;"	d
CLK_PWRMGT_CNTL__PCLK_TURNOFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__PCLK_TURNOFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF	/;"	d
CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF_MASK	/;"	d
CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__SCLK_TURNOFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__SCLK_TURNOFF	/;"	d
CLK_PWRMGT_CNTL__SCLK_TURNOFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__SCLK_TURNOFF_MASK	/;"	d
CLK_PWRMGT_CNTL__SCLK_TURNOFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__SCLK_TURNOFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF	/;"	d
CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF_MASK	/;"	d
CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__TEST_MODE	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TEST_MODE	/;"	d
CLK_PWRMGT_CNTL__TEST_MODE_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TEST_MODE_MASK	/;"	d
CLK_PWRMGT_CNTL__TEST_MODE__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TEST_MODE__SHIFT	/;"	d
CLK_PWRMGT_CNTL__TVCLK_TURNOFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF	/;"	d
CLK_PWRMGT_CNTL__TVCLK_TURNOFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF_MASK	/;"	d
CLK_PWRMGT_CNTL__TVCLK_TURNOFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF__SHIFT	/;"	d
CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF	/;"	d
CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF_MASK	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF_MASK	/;"	d
CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF__SHIFT	include/radeon.h	/^#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF__SHIFT	/;"	d
CLK_PWR_EMC_SREFREQ	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_EMC_SREFREQ	/;"	d
CLK_PWR_EMC_SREFREQ_UPDATE	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_EMC_SREFREQ_UPDATE	/;"	d
CLK_PWR_HCLK_RUN_PERIPH	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_HCLK_RUN_PERIPH	/;"	d
CLK_PWR_HIGHCORE_CTRL	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_HIGHCORE_CTRL	/;"	d
CLK_PWR_HIGHCORE_LEVEL	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_HIGHCORE_LEVEL	/;"	d
CLK_PWR_NORMAL_RUN	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_NORMAL_RUN	/;"	d
CLK_PWR_SDRAM_SREFREQ	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_SDRAM_SREFREQ	/;"	d
CLK_PWR_STOP_MODE	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_STOP_MODE	/;"	d
CLK_PWR_SYSCLKEN_CTRL	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_SYSCLKEN_CTRL	/;"	d
CLK_PWR_SYSCLKEN_LEVEL	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_PWR_SYSCLKEN_LEVEL	/;"	d
CLK_QSPI_MCLK	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_QSPI_MCLK	/;"	d
CLK_QSPI_OSC	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_QSPI_OSC	/;"	d
CLK_QSPI_PLL1	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_QSPI_PLL1	/;"	d
CLK_QSPI_PLL2	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_QSPI_PLL2	/;"	d
CLK_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_RATIO	/;"	d
CLK_REG_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_REG_DISABLE	/;"	d
CLK_RET_DEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CLK_RET_DEL	/;"	d
CLK_ROOT_ALT0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT0	/;"	d
CLK_ROOT_ALT1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT1	/;"	d
CLK_ROOT_ALT2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT2	/;"	d
CLK_ROOT_ALT3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT3	/;"	d
CLK_ROOT_ALT4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT4	/;"	d
CLK_ROOT_ALT5	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT5	/;"	d
CLK_ROOT_ALT6	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT6	/;"	d
CLK_ROOT_ALT7	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ALT7	/;"	d
CLK_ROOT_AUTO_DIV	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_DIV(/;"	d
CLK_ROOT_AUTO_DIV1	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_AUTO_DIV1 = 0,$/;"	e	enum:root_auto_div
CLK_ROOT_AUTO_DIV16	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_AUTO_DIV16,$/;"	e	enum:root_auto_div
CLK_ROOT_AUTO_DIV2	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_AUTO_DIV2,$/;"	e	enum:root_auto_div
CLK_ROOT_AUTO_DIV4	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_AUTO_DIV4,$/;"	e	enum:root_auto_div
CLK_ROOT_AUTO_DIV8	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_AUTO_DIV8,$/;"	e	enum:root_auto_div
CLK_ROOT_AUTO_DIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_DIV_MASK	/;"	d
CLK_ROOT_AUTO_DIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_DIV_SHIFT	/;"	d
CLK_ROOT_AUTO_EN	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_EN	/;"	d
CLK_ROOT_AUTO_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_EN_MASK	/;"	d
CLK_ROOT_AUTO_OFF	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_OFF	/;"	d
CLK_ROOT_AUTO_ON	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_AUTO_ON	/;"	d
CLK_ROOT_ENABLE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ENABLE_MASK	/;"	d
CLK_ROOT_ENABLE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ENABLE_SHIFT	/;"	d
CLK_ROOT_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_EN_MASK	/;"	d
CLK_ROOT_MAX	arch/arm/include/asm/arch-mx7/clock.h	/^	CLK_ROOT_MAX,$/;"	e	enum:clk_root_index
CLK_ROOT_MUX_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_MUX_MASK	/;"	d
CLK_ROOT_MUX_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_MUX_SHIFT	/;"	d
CLK_ROOT_OFF	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_OFF	/;"	d
CLK_ROOT_ON	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_ON	/;"	d
CLK_ROOT_POST_DIV	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_POST_DIV(/;"	d
CLK_ROOT_POST_DIV1	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV1 = 0,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV10	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV10,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV11	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV11,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV12	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV12,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV13	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV13,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV14	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV14,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV15	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV15,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV16	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV16,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV17	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV17,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV18	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV18,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV19	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV19,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV2	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV2,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV20	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV20,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV21	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV21,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV22	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV22,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV23	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV23,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV24	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV24,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV25	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV25,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV26	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV26,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV27	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV27,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV28	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV28,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV29	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV29,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV3	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV3,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV30	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV30,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV31	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV31,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV32	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV32,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV33	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV33,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV34	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV34,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV35	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV35,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV36	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV36,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV37	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV37,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV38	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV38,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV39	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV39,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV4	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV4,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV40	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV40,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV41	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV41,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV42	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV42,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV43	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV43,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV44	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV44,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV45	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV45,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV46	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV46,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV47	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV47,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV48	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV48,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV49	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV49,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV5	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV5,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV50	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV50,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV51	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV51,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV52	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV52,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV53	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV53,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV54	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV54,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV55	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV55,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV56	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV56,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV57	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV57,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV58	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV58,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV59	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV59,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV6	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV6,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV60	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV60,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV61	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV61,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV62	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV62,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV63	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV63,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV64	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV64,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV7	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV7,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV8	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV8,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV9	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_POST_DIV9,$/;"	e	enum:root_post_div
CLK_ROOT_POST_DIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_POST_DIV_MASK	/;"	d
CLK_ROOT_POST_DIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_POST_DIV_SHIFT	/;"	d
CLK_ROOT_PRE_DIV	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_PRE_DIV(/;"	d
CLK_ROOT_PRE_DIV1	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV1 = 0,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV2	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV2,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV3	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV3,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV4	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV4,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV5	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV5,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV6	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV6,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV7	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV7,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV8	arch/arm/include/asm/arch-mx7/clock_slice.h	/^	CLK_ROOT_PRE_DIV8,$/;"	e	enum:root_pre_div
CLK_ROOT_PRE_DIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_PRE_DIV_MASK	/;"	d
CLK_ROOT_PRE_DIV_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CLK_ROOT_PRE_DIV_SHIFT	/;"	d
CLK_RST_XUSBIO_PLL_CFG0	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define CLK_RST_XUSBIO_PLL_CFG0 /;"	d	file:
CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL /;"	d	file:
CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL /;"	d	file:
CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ /;"	d	file:
CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET /;"	d	file:
CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE /;"	d	file:
CLK_RX_DL_CFG_GMAC_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	CLK_RX_DL_CFG_GMAC_MASK		= 0x7f,$/;"	e	enum:__anonbeb2b9771403
CLK_RX_DL_CFG_GMAC_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	CLK_RX_DL_CFG_GMAC_SHIFT	= 0x7,$/;"	e	enum:__anonbeb2b9771403
CLK_SARADC_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SARADC_DIV_CON_MASK		= 0xff << CLK_SARADC_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SARADC_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SARADC_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SCLK_I2S1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_I2S1	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_I2S1	/;"	d
CLK_SCLK_MMC0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC0	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC0	/;"	d
CLK_SCLK_MMC1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC1	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC1	/;"	d
CLK_SCLK_MMC2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_MMC2	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_MMC2	/;"	d
CLK_SCLK_PCM1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PCM1	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PCM1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_PHY_FSYS1_26M	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_PHY_FSYS1_26M	/;"	d
CLK_SCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPDIF	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPDIF	/;"	d
CLK_SCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI0	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI0	/;"	d
CLK_SCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI1	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI1	/;"	d
CLK_SCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI2	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI2	/;"	d
CLK_SCLK_SPI3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI3	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI3	/;"	d
CLK_SCLK_SPI4	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_SPI4	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_SPI4	/;"	d
CLK_SCLK_UART0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART0	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART0	/;"	d
CLK_SCLK_UART1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART1	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART1	/;"	d
CLK_SCLK_UART2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART2	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART2	/;"	d
CLK_SCLK_UART3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UART3	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UART3	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SCLK_UFSUNIPRO20	include/dt-bindings/clock/exynos7420-clk.h	/^#define CLK_SCLK_UFSUNIPRO20	/;"	d
CLK_SDRAM_DDR_SEL	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_SDRAM_DDR_SEL	/;"	d
CLK_SEL	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define CLK_SEL	/;"	d
CLK_SEL_12MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define CLK_SEL_12MHZ /;"	d
CLK_SEL_24MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define CLK_SEL_24MHZ /;"	d
CLK_SEL_48MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define CLK_SEL_48MHZ /;"	d
CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPDIF	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPDIF	/;"	d
CLK_SPI0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI0	/;"	d
CLK_SPI0_PLL_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI0_PLL_DIV_CON_SHIFT	= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI0_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI0_PLL_SEL_SHIFT		= 7,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_SPI1	/;"	d
CLK_SPI1_PLL_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI1_PLL_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI1_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI1_PLL_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI2_PLL_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI2_PLL_DIV_CON_SHIFT	= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI2_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI2_PLL_SEL_SHIFT		= 7,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI4_PLL_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI4_PLL_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI4_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI4_PLL_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI5_PLL_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI5_PLL_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI5_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI5_PLL_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI_PLL_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI_PLL_DIV_CON_MASK	= 0x7f,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI_PLL_SEL_CPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI_PLL_SEL_CPLL		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI_PLL_SEL_GPLL		= 1,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SPI_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_SPI_PLL_SEL_MASK		= 1,$/;"	e	enum:__anon06b9221d0103	file:
CLK_SRC_CAM_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_CAM_VAL	/;"	d
CLK_SRC_CDREX_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_CDREX_VAL /;"	d
CLK_SRC_CORE0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_CORE0_VAL /;"	d
CLK_SRC_CORE1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_CORE1_VAL /;"	d
CLK_SRC_CPU_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_CPU_VAL	/;"	d
CLK_SRC_CPU_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_CPU_VAL	/;"	d
CLK_SRC_CPU_VAL	board/samsung/trats/setup.h	/^#define CLK_SRC_CPU_VAL	/;"	d
CLK_SRC_DISP1_0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_DISP1_0_VAL	/;"	d
CLK_SRC_DMC_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_DMC_VAL	/;"	d
CLK_SRC_FSYS0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_FSYS0_VAL /;"	d
CLK_SRC_FSYS_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_FSYS_VAL	/;"	d
CLK_SRC_FSYS_VAL	board/samsung/trats/setup.h	/^#define CLK_SRC_FSYS_VAL	/;"	d
CLK_SRC_G3D_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_G3D_VAL	/;"	d
CLK_SRC_ISP_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_ISP_VAL	/;"	d
CLK_SRC_KFC_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_KFC_VAL	/;"	d
CLK_SRC_LCD0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_LCD0_VAL	/;"	d
CLK_SRC_LEFTBUS_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_LEFTBUS_VAL	/;"	d
CLK_SRC_LEX_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_LEX_VAL /;"	d
CLK_SRC_MFC_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_MFC_VAL	/;"	d
CLK_SRC_MOUT_EPLL	arch/arm/mach-exynos/include/mach/clock.h	/^#define CLK_SRC_MOUT_EPLL	/;"	d
CLK_SRC_PERIC0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_PERIC0_VAL	/;"	d
CLK_SRC_PERIC1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_PERIC1_VAL	/;"	d
CLK_SRC_PERIL0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_PERIL0_VAL	/;"	d
CLK_SRC_PERIL0_VAL	board/samsung/trats/setup.h	/^#define CLK_SRC_PERIL0_VAL	/;"	d
CLK_SRC_RIGHTBUS_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_RIGHTBUS_VAL	/;"	d
CLK_SRC_SCLK_EPLL	arch/arm/mach-exynos/include/mach/clock.h	/^#define CLK_SRC_SCLK_EPLL	/;"	d
CLK_SRC_TOP0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_TOP0_VAL	/;"	d
CLK_SRC_TOP0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP0_VAL	/;"	d
CLK_SRC_TOP0_VAL	board/samsung/trats/setup.h	/^#define CLK_SRC_TOP0_VAL	/;"	d
CLK_SRC_TOP1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_SRC_TOP1_VAL	/;"	d
CLK_SRC_TOP1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP1_VAL	/;"	d
CLK_SRC_TOP2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP2_VAL	/;"	d
CLK_SRC_TOP3_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP3_VAL	/;"	d
CLK_SRC_TOP4_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP4_VAL	/;"	d
CLK_SRC_TOP5_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP5_VAL	/;"	d
CLK_SRC_TOP6_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP6_VAL	/;"	d
CLK_SRC_TOP7_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_SRC_TOP7_VAL	/;"	d
CLK_SSP0_ENABLE_CLOCK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_SSP0_ENABLE_CLOCK	/;"	d
CLK_STOP_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define CLK_STOP_DISABLE	/;"	d
CLK_STOP_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define CLK_STOP_EN	/;"	d
CLK_SYNTHESIZER_BYTE_MODE	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define CLK_SYNTHESIZER_BYTE_MODE	/;"	d
CLK_SYNTHESIZER_I2C_ADDR	include/configs/am335x_evm.h	/^#define CLK_SYNTHESIZER_I2C_ADDR /;"	d
CLK_SYNTHESIZER_ID_REG	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define CLK_SYNTHESIZER_ID_REG	/;"	d
CLK_SYNTHESIZER_MUX_REG	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define CLK_SYNTHESIZER_MUX_REG	/;"	d
CLK_SYNTHESIZER_PDIV2_REG	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define CLK_SYNTHESIZER_PDIV2_REG	/;"	d
CLK_SYNTHESIZER_PDIV3_REG	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define CLK_SYNTHESIZER_PDIV3_REG	/;"	d
CLK_SYNTHESIZER_XCSEL	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define CLK_SYNTHESIZER_XCSEL	/;"	d
CLK_SYSCLK_MUX	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_SYSCLK_MUX	/;"	d
CLK_SYSCLK_PLL397	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_SYSCLK_PLL397	/;"	d
CLK_SYS_RATE_AHB_RATE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_AHB_RATE_MASK /;"	d
CLK_SYS_RATE_AHB_RATE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_AHB_RATE_SHIFT /;"	d
CLK_SYS_RATE_APB_RATE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_APB_RATE_MASK /;"	d
CLK_SYS_RATE_APB_RATE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_APB_RATE_SHIFT /;"	d
CLK_SYS_RATE_HCLK_DISABLE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_HCLK_DISABLE_MASK /;"	d
CLK_SYS_RATE_HCLK_DISABLE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_HCLK_DISABLE_SHIFT /;"	d
CLK_SYS_RATE_PCLK_DISABLE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_PCLK_DISABLE_MASK /;"	d
CLK_SYS_RATE_PCLK_DISABLE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLK_SYS_RATE_PCLK_DISABLE_SHIFT /;"	d
CLK_TCON0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_TCON0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TCON0	/;"	d
CLK_THS	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_THS	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_THS	/;"	d
CLK_TIMCLK_HSTIMER	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_HSTIMER	/;"	d
CLK_TIMCLK_MOTOR	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_MOTOR	/;"	d
CLK_TIMCLK_TIMER0	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_TIMER0	/;"	d
CLK_TIMCLK_TIMER1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_TIMER1	/;"	d
CLK_TIMCLK_TIMER2	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_TIMER2	/;"	d
CLK_TIMCLK_TIMER3	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_TIMER3	/;"	d
CLK_TIMCLK_TIMER4	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_TIMER4	/;"	d
CLK_TIMCLK_TIMER5	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_TIMER5	/;"	d
CLK_TIMCLK_WATCHDOG	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_TIMCLK_WATCHDOG	/;"	d
CLK_TMR_MCLK	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_TMR_MCLK	/;"	d
CLK_TMR_OSC	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_TMR_OSC	/;"	d
CLK_TMR_PLL1	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_TMR_PLL1	/;"	d
CLK_TMR_PLL2	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_TMR_PLL2	/;"	d
CLK_TS	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TS	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TS	/;"	d
CLK_TSADC_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_TSADC_DIV_CON_MASK		= 0x3ff,$/;"	e	enum:__anon06b9221d0103	file:
CLK_TSADC_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_TSADC_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_TSADC_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_TSADC_SEL_MASK		= 1 << CLK_TSADC_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
CLK_TSADC_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_TSADC_SEL_SHIFT		= 15,$/;"	e	enum:__anon06b9221d0103	file:
CLK_TSADC_SEL_X24M	drivers/clk/rockchip/clk_rk3399.c	/^	CLK_TSADC_SEL_X24M		= 0x0,$/;"	e	enum:__anon06b9221d0103	file:
CLK_TVE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TVE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_TVE	/;"	d
CLK_TX_DL_CFG_GMAC_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	CLK_TX_DL_CFG_GMAC_MASK		= 0x7f,$/;"	e	enum:__anonbeb2b9771403
CLK_TX_DL_CFG_GMAC_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	CLK_TX_DL_CFG_GMAC_SHIFT	= 0x0,$/;"	e	enum:__anonbeb2b9771403
CLK_UART	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_UART(/;"	d
CLK_UART_HCLK	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_UART_HCLK	/;"	d
CLK_UART_MCLK	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_UART_MCLK	/;"	d
CLK_UART_PLL1	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_UART_PLL1	/;"	d
CLK_UART_PLL2	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define CLK_UART_PLL2	/;"	d
CLK_UART_X_DIV	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_UART_X_DIV(/;"	d
CLK_UART_Y_DIV	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_UART_Y_DIV(/;"	d
CLK_UNIPHIER	drivers/clk/uniphier/Kconfig	/^config CLK_UNIPHIER$/;"	c
CLK_USBCTRL_BUS_KEEPER	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_BUS_KEEPER	/;"	d
CLK_USBCTRL_CLK_EN1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_CLK_EN1	/;"	d
CLK_USBCTRL_CLK_EN2	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_CLK_EN2	/;"	d
CLK_USBCTRL_FDBK_PLUS1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_FDBK_PLUS1(/;"	d
CLK_USBCTRL_HCLK_EN	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_HCLK_EN	/;"	d
CLK_USBCTRL_PLL_PWRUP	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_PLL_PWRUP	/;"	d
CLK_USBCTRL_PLL_STS	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_PLL_STS	/;"	d
CLK_USBCTRL_POSTDIV_2POW	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_POSTDIV_2POW(/;"	d
CLK_USBCTRL_USBDVND_EN	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_USBDVND_EN	/;"	d
CLK_USBCTRL_USBHSTND_EN	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define CLK_USBCTRL_USBHSTND_EN	/;"	d
CLK_USB_OHCI0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI0	/;"	d
CLK_USB_OHCI1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI1	/;"	d
CLK_USB_OHCI2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI2	/;"	d
CLK_USB_OHCI3	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_OHCI3	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_OHCI3	/;"	d
CLK_USB_PHY0	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY0	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY0	/;"	d
CLK_USB_PHY1	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY1	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY1	/;"	d
CLK_USB_PHY2	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY2	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY2	/;"	d
CLK_USB_PHY3	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_USB_PHY3	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_USB_PHY3	/;"	d
CLK_VCO	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CLK_VCO	/;"	d
CLK_VCO	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CLK_VCO	/;"	d
CLK_VE	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_VE	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define CLK_VE	/;"	d
CLK_WR_ACCESS_PASSWORD	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^#define CLK_WR_ACCESS_PASSWORD	/;"	d	file:
CLK_WR_ACCESS_PASSWORD	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^#define CLK_WR_ACCESS_PASSWORD	/;"	d	file:
CLK_X	drivers/mtd/nand/denali.h	/^#define CLK_X /;"	d
CLOCKGATING_EN	drivers/usb/phy/twl4030.c	/^#define CLOCKGATING_EN	/;"	d	file:
CLOCKRATE	examples/standalone/timer.c	/^#  define CLOCKRATE /;"	d	file:
CLOCKS	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define CLOCKS(/;"	d
CLOCKS	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define CLOCKS(/;"	d
CLOCKS_PPIX	board/bf527-ezkit/video.c	/^#define CLOCKS_PPIX	/;"	d	file:
CLOCK_1K	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^#define CLOCK_1K	/;"	d	file:
CLOCK_1K	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^#define CLOCK_1K	/;"	d	file:
CLOCK_1M	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^#define CLOCK_1M	/;"	d	file:
CLOCK_1M	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^#define CLOCK_1M	/;"	d	file:
CLOCK_AHB	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	CLOCK_AHB,$/;"	e	enum:clock
CLOCK_AHB	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	CLOCK_AHB,$/;"	e	enum:clock
CLOCK_AHB	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	CLOCK_AHB,$/;"	e	enum:clock
CLOCK_APB1	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	CLOCK_APB1,$/;"	e	enum:clock
CLOCK_APB1	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	CLOCK_APB1,$/;"	e	enum:clock
CLOCK_APB1	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	CLOCK_APB1,$/;"	e	enum:clock
CLOCK_APB2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	CLOCK_APB2$/;"	e	enum:clock
CLOCK_APB2	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	CLOCK_APB2$/;"	e	enum:clock
CLOCK_APB2	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	CLOCK_APB2$/;"	e	enum:clock
CLOCK_CNTL_DATA	include/radeon.h	/^#define CLOCK_CNTL_DATA	/;"	d
CLOCK_CNTL_INDEX	include/radeon.h	/^#define CLOCK_CNTL_INDEX	/;"	d
CLOCK_CORE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	CLOCK_CORE,$/;"	e	enum:clock
CLOCK_CORE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	CLOCK_CORE,$/;"	e	enum:clock
CLOCK_CORE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	CLOCK_CORE,$/;"	e	enum:clock
CLOCK_EN	board/esd/pmc440/pmc440.h	/^#define CLOCK_EN /;"	d
CLOCK_HIGH	drivers/rtc/ds1302.c	/^#define CLOCK_HIGH	/;"	d	file:
CLOCK_ID_32KHZ	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_32KHZ	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_32KHZ	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_32KHZ	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_32KHZ	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_AUDIO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_AUDIO,$/;"	e	enum:clock_id
CLOCK_ID_AUDIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_AUDIO,$/;"	e	enum:clock_id
CLOCK_ID_AUDIO	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_AUDIO,$/;"	e	enum:clock_id
CLOCK_ID_AUDIO	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_AUDIO,$/;"	e	enum:clock_id
CLOCK_ID_AUDIO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_AUDIO,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_CGENERAL2,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL2,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_CGENERAL3,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL3,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL4_0	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL4_0,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL4_1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL4_1,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL4_2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL4_2,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL_0	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL_0,$/;"	e	enum:clock_id
CLOCK_ID_CGENERAL_1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CGENERAL_1,$/;"	e	enum:clock_id
CLOCK_ID_CLK_M	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_CLK_M,$/;"	e	enum:clock_id
CLOCK_ID_CLK_M	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_CLK_M,$/;"	e	enum:clock_id
CLOCK_ID_CLK_M	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_CLK_M,$/;"	e	enum:clock_id
CLOCK_ID_CLK_M	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_CLK_M,$/;"	e	enum:clock_id
CLOCK_ID_CLK_M	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_CLK_M,$/;"	e	enum:clock_id
CLOCK_ID_COUNT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_COUNT,	\/* number of PLLs *\/$/;"	e	enum:clock_id
CLOCK_ID_COUNT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_COUNT,	\/* number of PLLs *\/$/;"	e	enum:clock_id
CLOCK_ID_COUNT	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_COUNT,	\/* number of clocks *\/$/;"	e	enum:clock_id
CLOCK_ID_COUNT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_COUNT,	\/* number of PLLs *\/$/;"	e	enum:clock_id
CLOCK_ID_COUNT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_COUNT,	\/* number of PLLs *\/$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_DISPLAY,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_DISPLAY,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_DISPLAY,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_DISPLAY,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_DISPLAY,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_DISPLAY2,	\/* placeholder *\/$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_DISPLAY2,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_DISPLAY2,$/;"	e	enum:clock_id
CLOCK_ID_DISPLAY2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_DISPLAY2,	\/* Tegra3, placeholder *\/$/;"	e	enum:clock_id
CLOCK_ID_DP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_DP,	\/* Special for Tegra124 *\/$/;"	e	enum:clock_id
CLOCK_ID_DP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_DP,$/;"	e	enum:clock_id
CLOCK_ID_EPCI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_EPCI,$/;"	e	enum:clock_id
CLOCK_ID_EPCI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_EPCI,$/;"	e	enum:clock_id
CLOCK_ID_EPCI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_EPCI,$/;"	e	enum:clock_id
CLOCK_ID_EPCI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_EPCI,$/;"	e	enum:clock_id
CLOCK_ID_EPCI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_EPCI,$/;"	e	enum:clock_id
CLOCK_ID_FIRST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_FIRST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_FIRST	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_FIRST	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_FIRST,$/;"	e	enum:clock_id
CLOCK_ID_FIRST_SIMPLE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_FIRST_SIMPLE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_FIRST_SIMPLE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_FIRST_SIMPLE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_FIRST_SIMPLE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_MEMORY,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_MEMORY,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_MEMORY,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_MEMORY,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_MEMORY,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_MEMORY2,$/;"	e	enum:clock_id
CLOCK_ID_MEMORY2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_MEMORY2,$/;"	e	enum:clock_id
CLOCK_ID_NONE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_NONE = -1,$/;"	e	enum:clock_id
CLOCK_ID_NONE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_NONE = -1,$/;"	e	enum:clock_id
CLOCK_ID_NONE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_NONE = -1,$/;"	e	enum:clock_id
CLOCK_ID_NONE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_NONE = -1,$/;"	e	enum:clock_id
CLOCK_ID_NONE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_NONE = -1,$/;"	e	enum:clock_id
CLOCK_ID_OSC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_OSC,$/;"	e	enum:clock_id
CLOCK_ID_OSC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_OSC,$/;"	e	enum:clock_id
CLOCK_ID_OSC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_OSC,$/;"	e	enum:clock_id
CLOCK_ID_OSC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_OSC,$/;"	e	enum:clock_id
CLOCK_ID_OSC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_OSC,$/;"	e	enum:clock_id
CLOCK_ID_PERIPH	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_PERIPH,$/;"	e	enum:clock_id
CLOCK_ID_PERIPH	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_PERIPH,$/;"	e	enum:clock_id
CLOCK_ID_PERIPH	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_PERIPH,$/;"	e	enum:clock_id
CLOCK_ID_PERIPH	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_PERIPH,$/;"	e	enum:clock_id
CLOCK_ID_PERIPH	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_PERIPH,$/;"	e	enum:clock_id
CLOCK_ID_PLL_COUNT	arch/arm/include/asm/arch-tegra/clock.h	/^#define CLOCK_ID_PLL_COUNT	/;"	d
CLOCK_ID_SFROM32KHZ	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_SFROM32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_SFROM32KHZ	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_SFROM32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_SFROM32KHZ	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_SFROM32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_SFROM32KHZ	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_SFROM32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_SFROM32KHZ	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_SFROM32KHZ,$/;"	e	enum:clock_id
CLOCK_ID_SRC2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_SRC2,$/;"	e	enum:clock_id
CLOCK_ID_SRC2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_SRC2,$/;"	e	enum:clock_id
CLOCK_ID_USB	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_USB,$/;"	e	enum:clock_id
CLOCK_ID_USB	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_USB,$/;"	e	enum:clock_id
CLOCK_ID_USB	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_USB,$/;"	e	enum:clock_id
CLOCK_ID_USB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_USB,$/;"	e	enum:clock_id
CLOCK_ID_USB	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_USB,$/;"	e	enum:clock_id
CLOCK_ID_XCPU	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_XCPU	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_XCPU	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_XCPU	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_ID_XCPU	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,$/;"	e	enum:clock_id
CLOCK_IN	board/esd/pmc440/pmc440.h	/^#define CLOCK_IN /;"	d
CLOCK_INDEXES_LIST	arch/arm/mach-keystone/include/mach/clock.h	/^#define CLOCK_INDEXES_LIST	/;"	d
CLOCK_LOW	drivers/rtc/ds1302.c	/^#define CLOCK_LOW	/;"	d	file:
CLOCK_LPD_MAX	arch/m68k/cpu/mcf5227x/speed.c	/^#define CLOCK_LPD_MAX	/;"	d	file:
CLOCK_LPD_MAX	arch/m68k/cpu/mcf5445x/speed.c	/^#define CLOCK_LPD_MAX	/;"	d	file:
CLOCK_LPD_MIN	arch/m68k/cpu/mcf5227x/speed.c	/^#define CLOCK_LPD_MIN	/;"	d	file:
CLOCK_LPD_MIN	arch/m68k/cpu/mcf5445x/speed.c	/^#define CLOCK_LPD_MIN	/;"	d	file:
CLOCK_MAX_MUX	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_MAX_MUX   = 8     \/* number of source options for each clock *\/$/;"	e	enum:__anondabbd67e0103	file:
CLOCK_MAX_MUX	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_MAX_MUX   = 8     \/* number of source options for each clock *\/$/;"	e	enum:__anondec6679f0103	file:
CLOCK_MAX_MUX	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_MAX_MUX	= 4	\/* number of source options for each clock *\/$/;"	e	enum:__anon1d838aaa0103	file:
CLOCK_MAX_MUX	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_MAX_MUX   = 8     \/* number of source options for each clock *\/$/;"	e	enum:__anon8e26c7bb0103	file:
CLOCK_MAX_MUX	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_MAX_MUX   = 8     \/* number of source options for each clock *\/$/;"	e	enum:__anon218e1bcb0103	file:
CLOCK_OSC_FREQ_12_0	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_12_0,$/;"	e	enum:clock_osc_freq
CLOCK_OSC_FREQ_13_0	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_13_0,$/;"	e	enum:clock_osc_freq
CLOCK_OSC_FREQ_19_2	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_19_2,$/;"	e	enum:clock_osc_freq
CLOCK_OSC_FREQ_26_0	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_26_0,$/;"	e	enum:clock_osc_freq
CLOCK_OSC_FREQ_38_4	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_38_4,$/;"	e	enum:clock_osc_freq
CLOCK_OSC_FREQ_48_0	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_48_0,$/;"	e	enum:clock_osc_freq
CLOCK_OSC_FREQ_COUNT	arch/arm/include/asm/arch-tegra/clock.h	/^	CLOCK_OSC_FREQ_COUNT,$/;"	e	enum:clock_osc_freq
CLOCK_OUT	board/esd/pmc440/pmc440.h	/^#define CLOCK_OUT /;"	d
CLOCK_PLL_FSYS_MAX	arch/m68k/cpu/mcf5227x/speed.c	/^#define CLOCK_PLL_FSYS_MAX	/;"	d	file:
CLOCK_PLL_FSYS_MAX	arch/m68k/cpu/mcf5445x/speed.c	/^#define CLOCK_PLL_FSYS_MAX	/;"	d	file:
CLOCK_PLL_FSYS_MIN	arch/m68k/cpu/mcf5227x/speed.c	/^#define CLOCK_PLL_FSYS_MIN	/;"	d	file:
CLOCK_PLL_FSYS_MIN	arch/m68k/cpu/mcf5445x/speed.c	/^#define CLOCK_PLL_FSYS_MIN	/;"	d	file:
CLOCK_PLL_FVCO_MAX	arch/m68k/cpu/mcf5227x/speed.c	/^#define CLOCK_PLL_FVCO_MAX	/;"	d	file:
CLOCK_PLL_FVCO_MAX	arch/m68k/cpu/mcf5445x/speed.c	/^#define CLOCK_PLL_FVCO_MAX	/;"	d	file:
CLOCK_PLL_FVCO_MIN	arch/m68k/cpu/mcf5227x/speed.c	/^#define CLOCK_PLL_FVCO_MIN	/;"	d	file:
CLOCK_PLL_FVCO_MIN	arch/m68k/cpu/mcf5445x/speed.c	/^#define CLOCK_PLL_FVCO_MIN	/;"	d	file:
CLOCK_PLL_STABLE_DELAY_US	arch/arm/include/asm/arch-tegra/clock.h	/^#define CLOCK_PLL_STABLE_DELAY_US /;"	d
CLOCK_SCCR1_CFG_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_CFG_EN	/;"	d
CLOCK_SCCR1_DDR_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_DDR_EN	/;"	d
CLOCK_SCCR1_FEC_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_FEC_EN	/;"	d
CLOCK_SCCR1_LPC_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_LPC_EN	/;"	d
CLOCK_SCCR1_NFC_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_NFC_EN	/;"	d
CLOCK_SCCR1_PATA_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_PATA_EN	/;"	d
CLOCK_SCCR1_PCI_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_PCI_EN	/;"	d
CLOCK_SCCR1_PSCFIFO_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_PSCFIFO_EN	/;"	d
CLOCK_SCCR1_PSC_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_PSC_EN(/;"	d
CLOCK_SCCR1_SATA_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_SATA_EN	/;"	d
CLOCK_SCCR1_TPR_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR1_TPR_EN	/;"	d
CLOCK_SCCR2_AXE_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_AXE_EN	/;"	d
CLOCK_SCCR2_BDLC_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_BDLC_EN	/;"	d
CLOCK_SCCR2_DIU_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_DIU_EN	/;"	d
CLOCK_SCCR2_I2C_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_I2C_EN	/;"	d
CLOCK_SCCR2_IIM_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_IIM_EN	/;"	d
CLOCK_SCCR2_MBX_3D_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_MBX_3D_EN	/;"	d
CLOCK_SCCR2_MBX_BUS_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_MBX_BUS_EN	/;"	d
CLOCK_SCCR2_MBX_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_MBX_EN	/;"	d
CLOCK_SCCR2_MEM_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_MEM_EN	/;"	d
CLOCK_SCCR2_SDHC_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_SDHC_EN	/;"	d
CLOCK_SCCR2_SPDIF_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_SPDIF_EN	/;"	d
CLOCK_SCCR2_USB1_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_USB1_EN	/;"	d
CLOCK_SCCR2_USB2_EN	arch/powerpc/include/asm/immap_512x.h	/^#define CLOCK_SCCR2_USB2_EN	/;"	d
CLOCK_SHIFT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	CLOCK_SHIFT,$/;"	e	enum:hws_wl_supp
CLOCK_TYPE_AC2CC3P_TS2	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_AC2CC3P_TS2,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_AC2CC3P_TS2	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_AC2CC3P_TS2,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ACPT	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_ACPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ACPT	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_ACPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ACPT	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_ACPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ACPT	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_ACPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ASPTE	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_ASPTE,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ASPTE	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_ASPTE,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ASPTE	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_ASPTE,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_ASPTE	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_ASPTE,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_AXPT	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_AXPT,	\/* PLL_A, PLL_X, PLL_P, CLK_M *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_AXPT	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_AXPT,	\/* PLL_A, PLL_X, PLL_P, CLK_M *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_AXPT	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_AXPT,	\/* PLL_A, PLL_X, PLL_P, CLK_M *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_AXPT	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_AXPT,	\/* PLL_A, PLL_X, PLL_P, CLK_M *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_AXPT	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_AXPT,	\/* PLL_A, PLL_X, PLL_P, CLK_M *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_COUNT	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_COUNT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_COUNT	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_COUNT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_COUNT	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_COUNT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_COUNT	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_COUNT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_COUNT	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_COUNT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_DP	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_DP,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_DP	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_DP,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_M	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_M,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_M	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_M,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MC2CC3P_A	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_MC2CC3P_A,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MC2CC3P_A	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_MC2CC3P_A,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPA	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_MCPA,	\/* and so on *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPA	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_MCPA,	\/* and so on *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPA	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_MCPA,	\/* and so on *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPA	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_MCPA,	\/* and so on *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPA	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_MCPA,	\/* and so on *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPT	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_MCPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPT	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_MCPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPT	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_MCPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPT	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_MCPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPT	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_MCPT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPTM2C2C3	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_MCPTM2C2C3,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_MCPTM2C2C3	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_MCPTM2C2C3,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_NONE	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_NONE = -1,   \/* invalid clock type *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_NONE	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_NONE = -1,   \/* invalid clock type *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_NONE	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_NONE = -1,	\/* invalid clock type *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_NONE	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_NONE = -1,   \/* invalid clock type *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_NONE	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_NONE = -1,   \/* invalid clock type *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC01C00_C42C41TC40	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PC01C00_C42C41TC40,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3M	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PC2CC3M,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3M	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PC2CC3M,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3M_T	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PC2CC3M_T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3M_T	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PC2CC3M_T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3M_T16	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PC2CC3M_T16,	\/* PC2CC3M_T, but w\/16-bit divisor (I2C) *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3M_T16	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PC2CC3M_T16,	\/* PC2CC3M_T, but w\/16-bit divisor (I2C) *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3S_T	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PC2CC3S_T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3S_T	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PC2CC3S_T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3T_S	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PC2CC3T_S,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PC2CC3T_S	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PC2CC3T_S,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCM	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_PCM,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCM	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PCM,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCM	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_PCM,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCM	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PCM,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCM	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_PCM,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_PCMT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PCMT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_PCMT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PCMT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_PCMT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT16	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_PCMT16,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT16	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_PCMT16,	\/* CLOCK_TYPE_PCMT with 16-bit divider *\/$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCMT16	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_PCMT16,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCST	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_PCST,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCST	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PCST,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCST	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PCST,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCST	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_PCST,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PCXTS	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_PCXTS,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PDCT	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_PDCT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PDCT	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PDCT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PDCT	arch/arm/mach-tegra/tegra20/clock.c	/^	CLOCK_TYPE_PDCT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PDCT	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PDCT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PDCT	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_PDCT,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PMDACD2T	arch/arm/mach-tegra/tegra114/clock.c	/^	CLOCK_TYPE_PMDACD2T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PMDACD2T	arch/arm/mach-tegra/tegra124/clock.c	/^	CLOCK_TYPE_PMDACD2T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PMDACD2T	arch/arm/mach-tegra/tegra210/clock.c	/^	CLOCK_TYPE_PMDACD2T,$/;"	e	enum:clock_type_id	file:
CLOCK_TYPE_PMDACD2T	arch/arm/mach-tegra/tegra30/clock.c	/^	CLOCK_TYPE_PMDACD2T,$/;"	e	enum:clock_type_id	file:
CLOSE	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
CLR_CMP_CLR_DST	include/radeon.h	/^#define CLR_CMP_CLR_DST	/;"	d
CLR_CMP_CLR_SRC	include/radeon.h	/^#define CLR_CMP_CLR_SRC	/;"	d
CLR_CMP_CNTL	include/radeon.h	/^#define CLR_CMP_CNTL	/;"	d
CLR_CMP_MSK	include/radeon.h	/^#define CLR_CMP_MSK	/;"	d
CLR_CORERESET0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CORERESET0	/;"	d
CLR_CORERESET1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CORERESET1	/;"	d
CLR_CORERESET2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CORERESET2	/;"	d
CLR_CORERESET3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CORERESET3	/;"	d
CLR_CPU0_CLK_STP	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPU0_CLK_STP	/;"	d
CLR_CPU1_CLK_STP	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPU1_CLK_STP	/;"	d
CLR_CPU2_CLK_STP	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPU2_CLK_STP	/;"	d
CLR_CPU3_CLK_STP	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPU3_CLK_STP	/;"	d
CLR_CPURESET0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPURESET0	/;"	d
CLR_CPURESET1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPURESET1	/;"	d
CLR_CPURESET2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPURESET2	/;"	d
CLR_CPURESET3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CPURESET3	/;"	d
CLR_CXRESET0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CXRESET0	/;"	d
CLR_CXRESET1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CXRESET1	/;"	d
CLR_CXRESET2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CXRESET2	/;"	d
CLR_CXRESET3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_CXRESET3	/;"	d
CLR_DBGRESET0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_DBGRESET0	/;"	d
CLR_DBGRESET1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_DBGRESET1	/;"	d
CLR_DBGRESET2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_DBGRESET2	/;"	d
CLR_DBGRESET3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_DBGRESET3	/;"	d
CLR_FX	drivers/usb/gadget/at91_udc.c	/^#define	CLR_FX	/;"	d	file:
CLR_L2RESET	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_L2RESET	/;"	d
CLR_NONCPURESET	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_NONCPURESET	/;"	d
CLR_PRESETDBG	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CLR_PRESETDBG	/;"	d
CLSE	include/sym53c8xx.h	/^	#define   CLSE /;"	d
CLSEL1_EMU_VAL	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CLSEL1_EMU_VAL /;"	d
CLUT	arch/sh/include/asm/cpu_sh7722.h	/^#define CLUT /;"	d
CL_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CL_2	/;"	d
CL_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CL_3	/;"	d
CL_BIT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define CL_BIT(/;"	d
CL_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define CL_MASK /;"	d
CL_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	CL_MASK	/;"	d
CL_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	CL_MASK	/;"	d
CLookToRead	lib/lzma/Types.h	/^} CLookToRead;$/;"	t	typeref:struct:__anonf2a2f1b90808
CLzmaDec	lib/lzma/LzmaDec.h	/^} CLzmaDec;$/;"	t	typeref:struct:__anon7c0cd2440108
CLzmaProb	lib/lzma/LzmaDec.h	/^#define CLzmaProb /;"	d
CLzmaProps	lib/lzma/LzmaDec.h	/^} CLzmaProps;$/;"	t	typeref:struct:_CLzmaProps
CM1136	arch/arm/mach-integrator/Kconfig	/^config CM1136$/;"	c	choice:Integrator Options""choicee9c481760204
CM11_QA	board/cm5200/cm5200.h	/^	CM11_QA,$/;"	e	enum:__anonb595836f0303
CM1_QA	board/cm5200/cm5200.h	/^	CM1_QA,$/;"	e	enum:__anonb595836f0303
CM5200_UNKNOWN_MODULE	board/cm5200/cm5200.h	/^#define CM5200_UNKNOWN_MODULE	/;"	d
CM720T	arch/arm/mach-integrator/Kconfig	/^config CM720T$/;"	c	choice:Integrator Options""choicee9c481760204
CM920T	arch/arm/mach-integrator/Kconfig	/^config CM920T$/;"	c	choice:Integrator Options""choicee9c481760204
CM926EJ_S	arch/arm/mach-integrator/Kconfig	/^config CM926EJ_S$/;"	c	choice:Integrator Options""choicee9c481760204
CM946ES	arch/arm/mach-integrator/Kconfig	/^config CM946ES$/;"	c	choice:Integrator Options""choicee9c481760204
CMAP_ADDR	board/compulab/common/omap3_display.c	/^#define CMAP_ADDR	/;"	d	file:
CMASK	include/lattice.h	/^#define CMASK	/;"	d
CMASK_DATA	include/lattice.h	/^#define CMASK_DATA	/;"	d
CMCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define CMCNT /;"	d
CMCNT	arch/sh/include/asm/cpu_sh7723.h	/^#define CMCNT /;"	d
CMCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define CMCNT /;"	d
CMCNT_0	arch/sh/include/asm/cpu_sh7203.h	/^#define CMCNT_0 /;"	d
CMCNT_0	arch/sh/include/asm/cpu_sh7264.h	/^#define CMCNT_0 /;"	d
CMCNT_0	arch/sh/include/asm/cpu_sh7269.h	/^#define CMCNT_0	/;"	d
CMCNT_1	arch/sh/include/asm/cpu_sh7203.h	/^#define CMCNT_1 /;"	d
CMCNT_1	arch/sh/include/asm/cpu_sh7264.h	/^#define CMCNT_1 /;"	d
CMCOR	arch/sh/include/asm/cpu_sh7722.h	/^#define CMCOR /;"	d
CMCOR	arch/sh/include/asm/cpu_sh7723.h	/^#define CMCOR /;"	d
CMCOR	arch/sh/include/asm/cpu_sh7724.h	/^#define CMCOR /;"	d
CMCOR_0	arch/sh/include/asm/cpu_sh7203.h	/^#define CMCOR_0 /;"	d
CMCOR_0	arch/sh/include/asm/cpu_sh7264.h	/^#define CMCOR_0 /;"	d
CMCOR_0	arch/sh/include/asm/cpu_sh7269.h	/^#define CMCOR_0	/;"	d
CMCOR_1	arch/sh/include/asm/cpu_sh7203.h	/^#define CMCOR_1	/;"	d
CMCOR_1	arch/sh/include/asm/cpu_sh7264.h	/^#define CMCOR_1	/;"	d
CMCSR	arch/sh/include/asm/cpu_sh7722.h	/^#define CMCSR /;"	d
CMCSR	arch/sh/include/asm/cpu_sh7723.h	/^#define CMCSR /;"	d
CMCSR	arch/sh/include/asm/cpu_sh7724.h	/^#define CMCSR /;"	d
CMCSR_0	arch/sh/include/asm/cpu_sh7203.h	/^#define CMCSR_0 /;"	d
CMCSR_0	arch/sh/include/asm/cpu_sh7264.h	/^#define CMCSR_0 /;"	d
CMCSR_0	arch/sh/include/asm/cpu_sh7269.h	/^#define CMCSR_0	/;"	d
CMCSR_1	arch/sh/include/asm/cpu_sh7203.h	/^#define CMCSR_1 /;"	d
CMCSR_1	arch/sh/include/asm/cpu_sh7264.h	/^#define CMCSR_1 /;"	d
CMCYR	arch/sh/include/asm/cpu_sh7722.h	/^#define CMCYR /;"	d
CMC_ADDR	arch/x86/cpu/quark/Kconfig	/^config CMC_ADDR$/;"	c
CMC_ADDR	arch/x86/cpu/queensbay/Kconfig	/^config CMC_ADDR$/;"	c
CMC_FILE	arch/x86/cpu/quark/Kconfig	/^config CMC_FILE$/;"	c
CMC_FILE	arch/x86/cpu/queensbay/Kconfig	/^config CMC_FILE$/;"	c
CMD	board/synopsys/axs10x/axs10x.c	/^#define CMD	/;"	d	file:
CMD	drivers/net/ax88180.h	/^#define CMD	/;"	d
CMDANADLYPDCTL	arch/x86/cpu/quark/smc.h	/^#define CMDANADLYPDCTL	/;"	d
CMDANADLYPUCTL	arch/x86/cpu/quark/smc.h	/^#define CMDANADLYPUCTL	/;"	d
CMDANADRVPDCTL	arch/x86/cpu/quark/smc.h	/^#define CMDANADRVPDCTL	/;"	d
CMDANADRVPUCTL	arch/x86/cpu/quark/smc.h	/^#define CMDANADRVPUCTL	/;"	d
CMDARG	include/fsl_esdhc.h	/^#define CMDARG	/;"	d
CMDBONUS0	arch/x86/cpu/quark/smc.h	/^#define CMDBONUS0	/;"	d
CMDBONUS1	arch/x86/cpu/quark/smc.h	/^#define CMDBONUS1	/;"	d
CMDCFGREG0	arch/x86/cpu/quark/smc.h	/^#define CMDCFGREG0	/;"	d
CMDCLKALIGNREG0	arch/x86/cpu/quark/smc.h	/^#define CMDCLKALIGNREG0	/;"	d
CMDCLKALIGNREG1	arch/x86/cpu/quark/smc.h	/^#define CMDCLKALIGNREG1	/;"	d
CMDCLKALIGNREG2	arch/x86/cpu/quark/smc.h	/^#define CMDCLKALIGNREG2	/;"	d
CMDCLKALIGNSTS0	arch/x86/cpu/quark/smc.h	/^#define CMDCLKALIGNSTS0	/;"	d
CMDCLKALIGNSTS1	arch/x86/cpu/quark/smc.h	/^#define CMDCLKALIGNSTS1	/;"	d
CMDCLKGATE	arch/x86/cpu/quark/smc.h	/^#define CMDCLKGATE	/;"	d
CMDCOMPSLV	arch/x86/cpu/quark/smc.h	/^#define CMDCOMPSLV	/;"	d
CMDDLLPICODER0	arch/x86/cpu/quark/smc.h	/^#define CMDDLLPICODER0	/;"	d
CMDDLLPICODER1	arch/x86/cpu/quark/smc.h	/^#define CMDDLLPICODER1	/;"	d
CMDDLLRXCTL	arch/x86/cpu/quark/smc.h	/^#define CMDDLLRXCTL	/;"	d
CMDDLLTXCTL	arch/x86/cpu/quark/smc.h	/^#define CMDDLLTXCTL	/;"	d
CMDDLYPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CMDDLYPDCTLCH0	/;"	d
CMDDLYPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CMDDLYPUCTLCH0	/;"	d
CMDDRVPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CMDDRVPDCTLCH0	/;"	d
CMDDRVPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CMDDRVPUCTLCH0	/;"	d
CMDI_MASK	arch/arm/include/asm/omap_mmc.h	/^#define CMDI_MASK	/;"	d
CMDLINE	cmd/Kconfig	/^config CMDLINE$/;"	c	menu:Command line interface
CMDMDLLCTL	arch/x86/cpu/quark/smc.h	/^#define CMDMDLLCTL	/;"	d
CMDOBSCKEBBCTL	arch/x86/cpu/quark/smc.h	/^#define CMDOBSCKEBBCTL	/;"	d
CMDPMCONFIG0	arch/x86/cpu/quark/smc.h	/^#define CMDPMCONFIG0	/;"	d
CMDPMDLYREG0	arch/x86/cpu/quark/smc.h	/^#define CMDPMDLYREG0	/;"	d
CMDPMDLYREG1	arch/x86/cpu/quark/smc.h	/^#define CMDPMDLYREG1	/;"	d
CMDPMDLYREG2	arch/x86/cpu/quark/smc.h	/^#define CMDPMDLYREG2	/;"	d
CMDPMDLYREG3	arch/x86/cpu/quark/smc.h	/^#define CMDPMDLYREG3	/;"	d
CMDPMDLYREG4	arch/x86/cpu/quark/smc.h	/^#define CMDPMDLYREG4	/;"	d
CMDPMSTS0	arch/x86/cpu/quark/smc.h	/^#define CMDPMSTS0	/;"	d
CMDPMSTS1	arch/x86/cpu/quark/smc.h	/^#define CMDPMSTS1	/;"	d
CMDPTRREG	arch/x86/cpu/quark/smc.h	/^#define CMDPTRREG	/;"	d
CMDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDR0 /;"	d
CMDR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDR0	/;"	d
CMDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDR1 /;"	d
CMDR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDR1	/;"	d
CMDR2	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDR2 /;"	d
CMDR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDR2	/;"	d
CMDR3	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDR3 /;"	d
CMDR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDR3	/;"	d
CMDR4	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDR4 /;"	d
CMDR4	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDR4	/;"	d
CMDR5	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDR5 /;"	d
CMDR5	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDR5	/;"	d
CMDRCOMPODT	arch/x86/cpu/quark/smc.h	/^#define CMDRCOMPODT	/;"	d
CMDRSP0	include/fsl_esdhc.h	/^#define CMDRSP0	/;"	d
CMDRSP1	include/fsl_esdhc.h	/^#define CMDRSP1	/;"	d
CMDRSP2	include/fsl_esdhc.h	/^#define CMDRSP2	/;"	d
CMDRSP3	include/fsl_esdhc.h	/^#define CMDRSP3	/;"	d
CMDSTRT	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDSTRT /;"	d
CMDSTRT	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDSTRT	/;"	d
CMDTIMINGCTRL	arch/x86/cpu/quark/smc.h	/^#define CMDTIMINGCTRL	/;"	d
CMDTYR	arch/sh/include/asm/cpu_sh7722.h	/^#define CMDTYR /;"	d
CMDTYR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMDTYR	/;"	d
CMDVISACONTROLCR	arch/x86/cpu/quark/smc.h	/^#define CMDVISACONTROLCR	/;"	d
CMDVISALANECR0	arch/x86/cpu/quark/smc.h	/^#define CMDVISALANECR0	/;"	d
CMDVISALANECR1	arch/x86/cpu/quark/smc.h	/^#define CMDVISALANECR1	/;"	d
CMDVREFCH0	arch/x86/cpu/quark/smc.h	/^#define CMDVREFCH0	/;"	d
CMD_ACT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   CMD_ACT /;"	d
CMD_ACT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              CMD_ACT_MASK /;"	d
CMD_ADDR_LSB_MR_ADDR	include/fsl_mmdc.h	/^#define CMD_ADDR_LSB_MR_ADDR(/;"	d
CMD_ADDR_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_ADDR_MASK			= 0x1fff,$/;"	e	enum:__anon957231910203	file:
CMD_ADDR_MSB_MR_OP	include/fsl_mmdc.h	/^#define CMD_ADDR_MSB_MR_OP(/;"	d
CMD_ADDR_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_ADDR_SHIFT			= 4,$/;"	e	enum:__anon957231910203	file:
CMD_AFT_DAT_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define CMD_AFT_DAT_DISABLE	/;"	d
CMD_AFT_DAT_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define CMD_AFT_DAT_ENABLE	/;"	d
CMD_AFT_DAT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define CMD_AFT_DAT_MASK	/;"	d
CMD_ALE	drivers/mtd/nand/tegra_nand.h	/^#define CMD_ALE	/;"	d
CMD_ALE_BYTES1	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES1 = 0,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES2	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES2,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES3	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES3,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES4	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES4,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES5	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES5,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES6	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES6,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES7	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES7,$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTES8	drivers/mtd/nand/tegra_nand.h	/^	CMD_ALE_BYTES8$/;"	e	enum:__anonf17bc6a00203
CMD_ALE_BYTE_SIZE_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define CMD_ALE_BYTE_SIZE_SHIFT	/;"	d
CMD_AMBAPP	cmd/Kconfig	/^config CMD_AMBAPP$/;"	c	menu:Command line interface""Misc commands
CMD_ARG_RD_DOLOAD	arch/sh/include/asm/zimage.h	/^#define CMD_ARG_RD_DOLOAD	/;"	d
CMD_ARG_RD_PROMPT	arch/sh/include/asm/zimage.h	/^#define CMD_ARG_RD_PROMPT	/;"	d
CMD_ARMFLASH	cmd/Kconfig	/^config CMD_ARMFLASH$/;"	c	menu:Command line interface""Device access commands
CMD_ASE	drivers/usb/host/ehci.h	/^#define CMD_ASE	/;"	d
CMD_ASKENV	cmd/Kconfig	/^config CMD_ASKENV$/;"	c	menu:Command line interface""Environment commands
CMD_ATA	drivers/block/fsl_sata.h	/^	CMD_ATA,	\/* None of all above *\/$/;"	e	enum:cmd_type
CMD_ATAPI	drivers/block/fsl_sata.h	/^	CMD_ATAPI,$/;"	e	enum:cmd_type
CMD_ATF	board/cavium/thunderx/Kconfig	/^config CMD_ATF$/;"	c
CMD_AUTOCMD12ACTIVE	include/mvebu_mmc.h	/^#define CMD_AUTOCMD12ACTIVE	/;"	d
CMD_AUTOREFRESH	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_AUTOREFRESH	/;"	d
CMD_AUTO_REFRESH	include/fsl_mmdc.h	/^#define	CMD_AUTO_REFRESH	/;"	d
CMD_A_VALID	drivers/mtd/nand/tegra_nand.h	/^#define CMD_A_VALID	/;"	d
CMD_BANKADDR_BRRD	drivers/mtd/spi/sf_internal.h	/^# define CMD_BANKADDR_BRRD	/;"	d
CMD_BANKADDR_BRWR	drivers/mtd/spi/sf_internal.h	/^# define CMD_BANKADDR_BRWR	/;"	d
CMD_BANK_ADDR_0	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_0	/;"	d
CMD_BANK_ADDR_1	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_1	/;"	d
CMD_BANK_ADDR_2	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_2	/;"	d
CMD_BANK_ADDR_3	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_3	/;"	d
CMD_BANK_ADDR_4	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_4	/;"	d
CMD_BANK_ADDR_5	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_5	/;"	d
CMD_BANK_ADDR_6	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_6	/;"	d
CMD_BANK_ADDR_7	include/fsl_mmdc.h	/^#define CMD_BANK_ADDR_7	/;"	d
CMD_BASE	drivers/net/ax88180.h	/^  #define CMD_BASE	/;"	d
CMD_BDI	cmd/Kconfig	/^config CMD_BDI$/;"	c	menu:Command line interface""Info commands
CMD_BFC	drivers/net/enc28j60.h	/^#define CMD_BFC(/;"	d
CMD_BFS	drivers/net/enc28j60.h	/^#define CMD_BFS(/;"	d
CMD_BIST	drivers/block/fsl_sata.h	/^	CMD_BIST,$/;"	e	enum:cmd_type
CMD_BLOCK_CACHE	cmd/Kconfig	/^config CMD_BLOCK_CACHE$/;"	c	menu:Command line interface""Misc commands
CMD_BOOTD	cmd/Kconfig	/^config CMD_BOOTD$/;"	c	menu:Command line interface""Boot commands
CMD_BOOTEFI	cmd/Kconfig	/^config CMD_BOOTEFI$/;"	c	menu:Command line interface""Boot commands
CMD_BOOTI	cmd/Kconfig	/^config CMD_BOOTI$/;"	c	menu:Command line interface""Boot commands
CMD_BOOTM	cmd/Kconfig	/^config CMD_BOOTM$/;"	c	menu:Command line interface""Boot commands
CMD_BOOTSTAGE	cmd/Kconfig	/^config CMD_BOOTSTAGE$/;"	c	menu:Command line interface
CMD_BOOTTABLE	tools/aisimage.h	/^	CMD_BOOTTABLE$/;"	e	enum:ais_file_cmd
CMD_BOOTZ	cmd/Kconfig	/^config CMD_BOOTZ$/;"	c	menu:Command line interface""Boot commands
CMD_BOOT_FROM	tools/imximage.h	/^	CMD_BOOT_FROM,$/;"	e	enum:imximage_cmd
CMD_BOOT_FROM	tools/kwbimage.h	/^	CMD_BOOT_FROM,$/;"	e	enum:kwbimage_cmd
CMD_BOOT_MODE	tools/ublimage.h	/^	CMD_BOOT_MODE,$/;"	e	enum:ublimage_cmd
CMD_BOOT_OFFSET	tools/imximage.h	/^	CMD_BOOT_OFFSET,$/;"	e	enum:imximage_cmd
CMD_BUS_BUSY	include/mvebu_mmc.h	/^#define CMD_BUS_BUSY	/;"	d
CMD_BYTE1_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_BYTE1_MASK	/;"	d	file:
CMD_BYTE1_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_BYTE1_SHIFT	/;"	d	file:
CMD_BYTE2_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_BYTE2_MASK	/;"	d	file:
CMD_BYTE2_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_BYTE2_SHIFT	/;"	d	file:
CMD_B_VALID	drivers/mtd/nand/tegra_nand.h	/^#define CMD_B_VALID	/;"	d
CMD_CACHE	cmd/Kconfig	/^config CMD_CACHE$/;"	c	menu:Command line interface""Misc commands
CMD_CDP	cmd/Kconfig	/^config CMD_CDP$/;"	c	menu:Command line interface""Network commands
CMD_CE0	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE0	/;"	d
CMD_CE1	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE1	/;"	d
CMD_CE2	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE2	/;"	d
CMD_CE3	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE3	/;"	d
CMD_CE4	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE4	/;"	d
CMD_CE5	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE5	/;"	d
CMD_CE6	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE6	/;"	d
CMD_CE7	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CE7	/;"	d
CMD_CFG	examples/standalone/atmel_df_pow2.c	/^#define CMD_CFG /;"	d	file:
CMD_CHECK_BITS_CLR	tools/imximage.h	/^	CMD_CHECK_BITS_CLR,$/;"	e	enum:imximage_cmd
CMD_CHECK_BITS_SET	tools/imximage.h	/^	CMD_CHECK_BITS_SET,$/;"	e	enum:imximage_cmd
CMD_CKE_HIGH	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_CKE_HIGH	/;"	d
CMD_CKE_LOW	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_CKE_LOW	/;"	d
CMD_CLE	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CLE	/;"	d
CMD_CLE_BYTES1	drivers/mtd/nand/tegra_nand.h	/^	CMD_CLE_BYTES1 = 0,$/;"	e	enum:__anonf17bc6a00103
CMD_CLE_BYTES2	drivers/mtd/nand/tegra_nand.h	/^	CMD_CLE_BYTES2,$/;"	e	enum:__anonf17bc6a00103
CMD_CLE_BYTES3	drivers/mtd/nand/tegra_nand.h	/^	CMD_CLE_BYTES3,$/;"	e	enum:__anonf17bc6a00103
CMD_CLE_BYTES4	drivers/mtd/nand/tegra_nand.h	/^	CMD_CLE_BYTES4,$/;"	e	enum:__anonf17bc6a00103
CMD_CLE_BYTE_SIZE_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define CMD_CLE_BYTE_SIZE_SHIFT	/;"	d
CMD_CLK	tools/aisimage.h	/^	CMD_CLK,$/;"	e	enum:ais_file_cmd
CMD_CLK_DISABLE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_DISABLE = 8,$/;"	e	enum:__anonb38d42410403
CMD_CLK_ENABLE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_ENABLE = 7,$/;"	e	enum:__anonb38d42410403
CMD_CLK_GET_ALL_INFO	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_GET_ALL_INFO = 14,$/;"	e	enum:__anonb38d42410403
CMD_CLK_GET_MAX_CLK_ID	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_GET_MAX_CLK_ID = 15,$/;"	e	enum:__anonb38d42410403
CMD_CLK_GET_PARENT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_GET_PARENT = 4,$/;"	e	enum:__anonb38d42410403
CMD_CLK_GET_RATE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_GET_RATE = 1,$/;"	e	enum:__anonb38d42410403
CMD_CLK_IS_ENABLED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_IS_ENABLED = 6,$/;"	e	enum:__anonb38d42410403
CMD_CLK_MAX	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_MAX,$/;"	e	enum:__anonb38d42410403
CMD_CLK_ROUND_RATE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_ROUND_RATE = 3,$/;"	e	enum:__anonb38d42410403
CMD_CLK_SET_PARENT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_SET_PARENT = 5,$/;"	e	enum:__anonb38d42410403
CMD_CLK_SET_RATE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_CLK_SET_RATE = 2,$/;"	e	enum:__anonb38d42410403
CMD_CODE_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_CODE_MASK	/;"	d	file:
CMD_CODE_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_CODE_SHIFT	/;"	d	file:
CMD_COMPLETE	include/fsl_sec.h	/^#define CMD_COMPLETE	/;"	d
CMD_CONSOLE	cmd/Kconfig	/^config CMD_CONSOLE$/;"	c	menu:Command line interface""Info commands
CMD_CPU	cmd/Kconfig	/^config CMD_CPU$/;"	c	menu:Command line interface""Info commands
CMD_CRC32	cmd/Kconfig	/^config CMD_CRC32$/;"	c	menu:Command line interface""Memory commands
CMD_CRCCHECK	tools/aisimage.h	/^	CMD_CRCCHECK,$/;"	e	enum:ais_file_cmd
CMD_CRCOFF	tools/aisimage.h	/^	CMD_CRCOFF,$/;"	e	enum:ais_file_cmd
CMD_CRCON	tools/aisimage.h	/^	CMD_CRCON,$/;"	e	enum:ais_file_cmd
CMD_CRC_CHECK_D	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define           CMD_CRC_CHECK_D /;"	d
CMD_CRC_FAIL	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              CMD_CRC_FAIL /;"	d
CMD_CRC_FAIL_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         CMD_CRC_FAIL_MASK /;"	d
CMD_CRC_FAIL_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         CMD_CRC_FAIL_STAT /;"	d
CMD_CROS_EC	cmd/Kconfig	/^config CMD_CROS_EC$/;"	c	menu:Command line interface""Firmware commands
CMD_CROS_EC	drivers/misc/Kconfig	/^config CMD_CROS_EC$/;"	c	menu:Multifunction device drivers
CMD_CRS	drivers/usb/host/xhci.h	/^#define CMD_CRS	/;"	d
CMD_CSF	tools/imximage.h	/^	CMD_CSF,$/;"	e	enum:imximage_cmd
CMD_CSS	drivers/usb/host/xhci.h	/^#define CMD_CSS	/;"	d
CMD_CTRL_BREAK	drivers/mmc/sh_mmcif.h	/^#define CMD_CTRL_BREAK	/;"	d
CMD_DATA	tools/aisimage.h	/^	CMD_DATA,$/;"	e	enum:ais_file_cmd
CMD_DATA	tools/kwbimage.h	/^	CMD_DATA$/;"	e	enum:kwbimage_cmd
CMD_DATA0_BUSY	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define            CMD_DATA0_BUSY /;"	d
CMD_DATA_SIZE	include/command.h	/^#define CMD_DATA_SIZE$/;"	d
CMD_DATA_STR	tools/aisimage.h	/^#define CMD_DATA_STR	/;"	d
CMD_DATA_STR	tools/imximage.h	/^#define CMD_DATA_STR	/;"	d
CMD_DAT_CONT_BUS_WIDTH_4	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_BUS_WIDTH_4	/;"	d	file:
CMD_DAT_CONT_CMD_RESP_LONG_OFF	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_CMD_RESP_LONG_OFF	/;"	d	file:
CMD_DAT_CONT_DATA_ENABLE	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_DATA_ENABLE	/;"	d	file:
CMD_DAT_CONT_INIT	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_INIT	/;"	d	file:
CMD_DAT_CONT_RESPONSE_136BIT	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_RESPONSE_136BIT	/;"	d	file:
CMD_DAT_CONT_RESPONSE_48BIT	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_RESPONSE_48BIT	/;"	d	file:
CMD_DAT_CONT_RESPONSE_48BIT_CRC	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_RESPONSE_48BIT_CRC	/;"	d	file:
CMD_DAT_CONT_START_READWAIT	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_START_READWAIT	/;"	d	file:
CMD_DAT_CONT_STOP_READWAIT	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_STOP_READWAIT	/;"	d	file:
CMD_DAT_CONT_WRITE	drivers/mmc/mxcmmc.c	/^#define CMD_DAT_CONT_WRITE	/;"	d	file:
CMD_DDR2	tools/aisimage.h	/^	CMD_DDR2,$/;"	e	enum:ais_file_cmd
CMD_DDRMPHY_DUMP	arch/arm/mach-uniphier/Kconfig	/^config CMD_DDRMPHY_DUMP$/;"	c
CMD_DDRPHY_DUMP	arch/arm/mach-uniphier/Kconfig	/^config CMD_DDRPHY_DUMP$/;"	c
CMD_DDR_INIT_DELAY	tools/kwbimage.h	/^	CMD_DDR_INIT_DELAY,$/;"	e	enum:kwbimage_cmd
CMD_DEBUGFS_DUMPDIR	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_DEBUGFS_DUMPDIR = 3,$/;"	e	enum:mrq_debugfs_commands
CMD_DEBUGFS_MAX	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_DEBUGFS_MAX$/;"	e	enum:mrq_debugfs_commands
CMD_DEBUGFS_READ	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_DEBUGFS_READ = 1,$/;"	e	enum:mrq_debugfs_commands
CMD_DEBUGFS_WRITE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_DEBUGFS_WRITE = 2,$/;"	e	enum:mrq_debugfs_commands
CMD_DEFAULT_LPDDR3	arch/arm/mach-exynos/exynos5_setup.h	/^#define CMD_DEFAULT_LPDDR3	/;"	d
CMD_DEFUALT_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CMD_DEFUALT_OFFSET	/;"	d
CMD_DEMO	cmd/Kconfig	/^config CMD_DEMO$/;"	c	menu:Command line interface""Device access commands
CMD_DESC_HDR	drivers/crypto/fsl/desc.h	/^#define CMD_DESC_HDR	/;"	d
CMD_DFU	cmd/Kconfig	/^config CMD_DFU$/;"	c	menu:Command line interface""Device access commands
CMD_DHCP	cmd/Kconfig	/^config CMD_DHCP$/;"	c	menu:Command line interface""Network commands
CMD_DHRYSTONE	lib/dhry/Kconfig	/^config CMD_DHRYSTONE$/;"	c
CMD_DLL_BYPASS	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_DLL_BYPASS				= 1 << 4,$/;"	e	enum:__anon957231910103	file:
CMD_DLL_BYPASS_DISABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_DLL_BYPASS_DISABLE			= 0 << 4,$/;"	e	enum:__anon957231910103	file:
CMD_DM	cmd/Kconfig	/^config CMD_DM$/;"	c	menu:Command line interface""Device access commands
CMD_DMA	drivers/mtd/nand/denali.h	/^#define CMD_DMA /;"	d
CMD_DNS	cmd/Kconfig	/^config CMD_DNS$/;"	c	menu:Command line interface""Network commands
CMD_DONE_CLEAR_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CMD_DONE_CLEAR_BIT	/;"	d	file:
CMD_DRAIN_OUTPUT	include/i8042.h	/^#define CMD_DRAIN_OUTPUT /;"	d
CMD_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                     CMD_E /;"	d
CMD_E1000	drivers/net/Kconfig	/^config CMD_E1000$/;"	c
CMD_ECHO	cmd/Kconfig	/^config CMD_ECHO$/;"	c	menu:Command line interface""Shell scripting commands
CMD_EDITENV	cmd/Kconfig	/^config CMD_EDITENV$/;"	c	menu:Command line interface""Environment commands
CMD_EEPROM_H	board/intercontrol/digsy_mtc/eeprom.h	/^#define CMD_EEPROM_H$/;"	d
CMD_EIE	drivers/usb/host/xhci.h	/^#define CMD_EIE	/;"	d
CMD_ELF	cmd/Kconfig	/^config CMD_ELF$/;"	c	menu:Command line interface""Boot commands
CMD_EMIFA	tools/aisimage.h	/^	CMD_EMIFA,$/;"	e	enum:ais_file_cmd
CMD_EMIFA_ASYNC	tools/aisimage.h	/^	CMD_EMIFA_ASYNC,$/;"	e	enum:ais_file_cmd
CMD_EMR	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CMD_EMR	/;"	d	file:
CMD_ENTRY	tools/ublimage.h	/^	CMD_ENTRY,$/;"	e	enum:ublimage_cmd
CMD_ENTR_PWRDOWN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_ENTR_PWRDOWN	/;"	d
CMD_ENTR_SRFRSH	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_ENTR_SRFRSH	/;"	d
CMD_ENV_EXISTS	cmd/Kconfig	/^config CMD_ENV_EXISTS$/;"	c	menu:Command line interface""Environment commands
CMD_ERASE_4K	drivers/mtd/spi/sf_internal.h	/^#define CMD_ERASE_4K	/;"	d
CMD_ERASE_64K	drivers/mtd/spi/sf_internal.h	/^#define CMD_ERASE_64K	/;"	d
CMD_ERASE_CHIP	drivers/mtd/spi/sf_internal.h	/^#define CMD_ERASE_CHIP	/;"	d
CMD_ERASE_CONFIRM	board/cobra5272/flash.c	/^#define CMD_ERASE_CONFIRM	/;"	d	file:
CMD_ERASE_SETUP	board/cobra5272/flash.c	/^#define CMD_ERASE_SETUP	/;"	d	file:
CMD_ERR	drivers/block/sata_sil.h	/^	CMD_ERR		= 0x21,$/;"	e	enum:__anone6fe50d30103
CMD_ERR	include/fsl_esdhc.h	/^#define CMD_ERR	/;"	d
CMD_EWE	drivers/usb/host/xhci.h	/^#define CMD_EWE	/;"	d
CMD_EXIT_PWRDOWN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_EXIT_PWRDOWN	/;"	d
CMD_EXPORTENV	cmd/Kconfig	/^config CMD_EXPORTENV$/;"	c	menu:Command line interface""Environment commands
CMD_EXT2	cmd/Kconfig	/^config CMD_EXT2$/;"	c	menu:Command line interface""Filesystem commands
CMD_EXT4	cmd/Kconfig	/^config CMD_EXT4$/;"	c	menu:Command line interface""Filesystem commands
CMD_EXT4_WRITE	cmd/Kconfig	/^config CMD_EXT4_WRITE$/;"	c	menu:Command line interface""Filesystem commands
CMD_EXTNADDR_RDEAR	drivers/mtd/spi/sf_internal.h	/^# define CMD_EXTNADDR_RDEAR	/;"	d
CMD_EXTNADDR_WREAR	drivers/mtd/spi/sf_internal.h	/^# define CMD_EXTNADDR_WREAR	/;"	d
CMD_FASTBOOT	cmd/fastboot/Kconfig	/^config CMD_FASTBOOT$/;"	c	menu:Fastboot support
CMD_FAT	cmd/Kconfig	/^config CMD_FAT$/;"	c	menu:Command line interface""Filesystem commands
CMD_FDT	cmd/Kconfig	/^config CMD_FDT$/;"	c	menu:Command line interface""Boot commands
CMD_FEEDBACK_ENABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_FEEDBACK_ENABLE			= 1 << 5,$/;"	e	enum:__anon957231910103	file:
CMD_FIFO_EMPTY	include/mvebu_mmc.h	/^#define CMD_FIFO_EMPTY	/;"	d
CMD_FIFO_LOAD	drivers/crypto/fsl/desc.h	/^#define CMD_FIFO_LOAD	/;"	d
CMD_FIFO_STORE	drivers/crypto/fsl/desc.h	/^#define CMD_FIFO_STORE	/;"	d
CMD_FILL	tools/aisimage.h	/^	CMD_FILL,$/;"	e	enum:ais_file_cmd
CMD_FLAG_BOOTD	include/command.h	/^#define CMD_FLAG_BOOTD	/;"	d
CMD_FLAG_ENV	include/command.h	/^#define CMD_FLAG_ENV	/;"	d
CMD_FLAG_REPEAT	include/command.h	/^#define CMD_FLAG_REPEAT	/;"	d
CMD_FLAG_STATUS	drivers/mtd/spi/sf_internal.h	/^#define CMD_FLAG_STATUS	/;"	d
CMD_FLASH	cmd/Kconfig	/^config CMD_FLASH$/;"	c	menu:Command line interface""Device access commands
CMD_FPGA	cmd/Kconfig	/^config CMD_FPGA$/;"	c	menu:Command line interface""Device access commands
CMD_FS_GENERIC	cmd/Kconfig	/^config CMD_FS_GENERIC$/;"	c	menu:Command line interface""Filesystem commands
CMD_FW_VERSION	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define	CMD_FW_VERSION	/;"	d
CMD_GET_VIM	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define	CMD_GET_VIM	/;"	d
CMD_GO	cmd/Kconfig	/^config CMD_GO$/;"	c	menu:Command line interface""Boot commands
CMD_GO	drivers/mtd/nand/tegra_nand.h	/^#define CMD_GO	/;"	d
CMD_GPIO	cmd/Kconfig	/^config CMD_GPIO$/;"	c	menu:Command line interface""Device access commands
CMD_GREPENV	cmd/Kconfig	/^config CMD_GREPENV$/;"	c	menu:Command line interface""Environment commands
CMD_HDR_ATTR_ATAPI	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_ATAPI	/;"	d
CMD_HDR_ATTR_ATAPI	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_ATAPI	/;"	d
CMD_HDR_ATTR_BIST	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_BIST	/;"	d
CMD_HDR_ATTR_BIST	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_BIST	/;"	d
CMD_HDR_ATTR_FPDMA	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_FPDMA	/;"	d
CMD_HDR_ATTR_FPDMA	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_FPDMA	/;"	d
CMD_HDR_ATTR_RES	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_RES	/;"	d
CMD_HDR_ATTR_RES	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_RES	/;"	d
CMD_HDR_ATTR_RESET	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_RESET	/;"	d
CMD_HDR_ATTR_RESET	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_RESET	/;"	d
CMD_HDR_ATTR_SNOOP	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_SNOOP	/;"	d
CMD_HDR_ATTR_SNOOP	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_SNOOP	/;"	d
CMD_HDR_ATTR_TAG	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_TAG	/;"	d
CMD_HDR_ATTR_TAG	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_TAG	/;"	d
CMD_HDR_ATTR_VBIST	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_ATTR_VBIST	/;"	d
CMD_HDR_ATTR_VBIST	drivers/block/fsl_sata.h	/^#define CMD_HDR_ATTR_VBIST	/;"	d
CMD_HDR_CDA_ALIGN	drivers/block/fsl_sata.h	/^#define CMD_HDR_CDA_ALIGN	/;"	d
CMD_HDR_DI_A	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_A	/;"	d
CMD_HDR_DI_B	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_B	/;"	d
CMD_HDR_DI_C	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_C	/;"	d
CMD_HDR_DI_CFL_MASK	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_CFL_MASK	/;"	d
CMD_HDR_DI_CFL_OFFSET	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_CFL_OFFSET	/;"	d
CMD_HDR_DI_P	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_P	/;"	d
CMD_HDR_DI_PMP_MASK	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_PMP_MASK	/;"	d
CMD_HDR_DI_PMP_OFFSET	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_PMP_OFFSET	/;"	d
CMD_HDR_DI_PRDTL	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_PRDTL	/;"	d
CMD_HDR_DI_PRDTL_OFFSET	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_PRDTL_OFFSET	/;"	d
CMD_HDR_DI_R	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_R	/;"	d
CMD_HDR_DI_W	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_DI_W	/;"	d
CMD_HDR_FIS_LEN_SHIFT	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_FIS_LEN_SHIFT	/;"	d
CMD_HDR_FIS_LEN_SHIFT	drivers/block/fsl_sata.h	/^#define CMD_HDR_FIS_LEN_SHIFT	/;"	d
CMD_HDR_PRD_ENTRY_MASK	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_PRD_ENTRY_MASK	/;"	d
CMD_HDR_PRD_ENTRY_MASK	drivers/block/fsl_sata.h	/^#define CMD_HDR_PRD_ENTRY_MASK	/;"	d
CMD_HDR_PRD_ENTRY_SHIFT	drivers/block/dwc_ahsata.h	/^#define CMD_HDR_PRD_ENTRY_SHIFT	/;"	d
CMD_HDR_PRD_ENTRY_SHIFT	drivers/block/fsl_sata.h	/^#define CMD_HDR_PRD_ENTRY_SHIFT	/;"	d
CMD_HSEIE	drivers/usb/host/xhci.h	/^#define CMD_HSEIE	/;"	d
CMD_I2C	cmd/Kconfig	/^config CMD_I2C$/;"	c	menu:Command line interface""Device access commands
CMD_I2C_XFER	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_I2C_XFER = 1$/;"	e	enum:__anonb38d42410303
CMD_IAAD	drivers/usb/host/ehci.h	/^#define CMD_IAAD	/;"	d
CMD_ID	examples/standalone/atmel_df_pow2.c	/^#define CMD_ID /;"	d	file:
CMD_IDX	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   CMD_IDX /;"	d
CMD_IMAGE_VERSION	tools/imximage.h	/^	CMD_IMAGE_VERSION,$/;"	e	enum:imximage_cmd
CMD_IMI	cmd/Kconfig	/^config CMD_IMI$/;"	c	menu:Command line interface""Boot commands
CMD_IMLS	cmd/Kconfig	/^config CMD_IMLS$/;"	c	menu:Command line interface""Boot commands
CMD_IMPORTENV	cmd/Kconfig	/^config CMD_IMPORTENV$/;"	c	menu:Command line interface""Environment commands
CMD_INHIBIT	include/mvebu_mmc.h	/^#define CMD_INHIBIT	/;"	d
CMD_INQUIRY	include/fsl_sec.h	/^#define CMD_INQUIRY	/;"	d
CMD_INT_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 CMD_INT_E /;"	d
CMD_INVALID	tools/aisimage.h	/^	CMD_INVALID,$/;"	e	enum:ais_file_cmd
CMD_INVALID	tools/imximage.h	/^	CMD_INVALID,$/;"	e	enum:imximage_cmd
CMD_INVALID	tools/kwbimage.h	/^	CMD_INVALID,$/;"	e	enum:kwbimage_cmd
CMD_INVALID	tools/ublimage.h	/^	CMD_INVALID,$/;"	e	enum:ublimage_cmd
CMD_ITEST	cmd/Kconfig	/^config CMD_ITEST$/;"	c	menu:Command line interface""Shell scripting commands
CMD_JMP	tools/aisimage.h	/^	CMD_JMP,$/;"	e	enum:ais_file_cmd
CMD_JMPCLOSE	tools/aisimage.h	/^	CMD_JMPCLOSE,$/;"	e	enum:ais_file_cmd
CMD_JUMP	drivers/crypto/fsl/desc.h	/^#define CMD_JUMP	/;"	d
CMD_KBD_DIS	include/i8042.h	/^#define CMD_KBD_DIS	/;"	d
CMD_KBD_EN	include/i8042.h	/^#define CMD_KBD_EN	/;"	d
CMD_KEY	drivers/crypto/fsl/desc.h	/^#define CMD_KEY	/;"	d
CMD_LD_ADDR	tools/ublimage.h	/^	CMD_LD_ADDR$/;"	e	enum:ublimage_cmd
CMD_LICENSE	cmd/Kconfig	/^config CMD_LICENSE$/;"	c	menu:Command line interface""Info commands
CMD_LINK_LOCAL	cmd/Kconfig	/^config CMD_LINK_LOCAL$/;"	c	menu:Command line interface""Network commands
CMD_LOAD	drivers/crypto/fsl/desc.h	/^#define CMD_LOAD	/;"	d
CMD_LOADB	cmd/Kconfig	/^config CMD_LOADB$/;"	c	menu:Command line interface""Device access commands
CMD_LOADS	cmd/Kconfig	/^config CMD_LOADS$/;"	c	menu:Command line interface""Device access commands
CMD_LOAD_MODE_REG	include/fsl_mmdc.h	/^#define	CMD_LOAD_MODE_REG	/;"	d
CMD_LRESET	drivers/usb/host/ehci.h	/^#define CMD_LRESET	/;"	d
CMD_LRESET	drivers/usb/host/xhci.h	/^#define CMD_LRESET	/;"	d
CMD_L_RSP	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 CMD_L_RSP /;"	d
CMD_MAP_00	drivers/mtd/onenand/samsung.c	/^#define CMD_MAP_00(/;"	d	file:
CMD_MAP_01	drivers/mtd/onenand/samsung.c	/^#define CMD_MAP_01(/;"	d	file:
CMD_MAP_10	drivers/mtd/onenand/samsung.c	/^#define CMD_MAP_10(/;"	d	file:
CMD_MAP_11	drivers/mtd/onenand/samsung.c	/^#define CMD_MAP_11(/;"	d	file:
CMD_MAP_SIZE	drivers/net/ax88180.h	/^#define CMD_MAP_SIZE	/;"	d
CMD_MASK	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define CMD_MASK	/;"	d
CMD_MASK	drivers/crypto/fsl/desc.h	/^#define CMD_MASK	/;"	d
CMD_MASK	drivers/mmc/sh_mmcif.h	/^#define CMD_MASK	/;"	d
CMD_MATH	drivers/crypto/fsl/desc.h	/^#define CMD_MATH	/;"	d
CMD_MEMINFO	cmd/Kconfig	/^config CMD_MEMINFO$/;"	c	menu:Command line interface""Memory commands
CMD_MEMORY	cmd/Kconfig	/^config CMD_MEMORY$/;"	c	menu:Command line interface""Memory commands
CMD_MEMTEST	cmd/Kconfig	/^config CMD_MEMTEST$/;"	c	menu:Command line interface""Memory commands
CMD_MII	cmd/Kconfig	/^config CMD_MII$/;"	c	menu:Command line interface""Network commands
CMD_MISC	cmd/Kconfig	/^config CMD_MISC$/;"	c	menu:Command line interface""Misc commands
CMD_MMC	cmd/Kconfig	/^config CMD_MMC$/;"	c	menu:Command line interface""Device access commands
CMD_MOVE	drivers/crypto/fsl/desc.h	/^#define CMD_MOVE	/;"	d
CMD_MOVE_LEN	drivers/crypto/fsl/desc.h	/^#define CMD_MOVE_LEN	/;"	d
CMD_MRR	include/fsl_mmdc.h	/^#define	CMD_MRR	/;"	d
CMD_MTC_H	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define CMD_MTC_H$/;"	d
CMD_MX_CYCLIC	cmd/Kconfig	/^config CMD_MX_CYCLIC$/;"	c	menu:Command line interface""Memory commands
CMD_NAND	cmd/Kconfig	/^config CMD_NAND$/;"	c	menu:Command line interface""Device access commands
CMD_NAND_ECC_MODE	tools/kwbimage.h	/^	CMD_NAND_ECC_MODE,$/;"	e	enum:kwbimage_cmd
CMD_NAND_PAGE_SIZE	tools/kwbimage.h	/^	CMD_NAND_PAGE_SIZE,$/;"	e	enum:kwbimage_cmd
CMD_NCQ	drivers/block/fsl_sata.h	/^	CMD_NCQ,$/;"	e	enum:cmd_type
CMD_NET	cmd/Kconfig	/^config CMD_NET$/;"	c	menu:Command line interface""Network commands
CMD_NFS	cmd/Kconfig	/^config CMD_NFS$/;"	c	menu:Command line interface""Network commands
CMD_NOP	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_NOP	/;"	d
CMD_NOP	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CMD_NOP	/;"	d	file:
CMD_NORMAL	include/fsl_mmdc.h	/^#define	CMD_NORMAL	/;"	d
CMD_OPERATION	drivers/crypto/fsl/desc.h	/^#define CMD_OPERATION	/;"	d
CMD_PAGE	tools/ublimage.h	/^	CMD_PAGE,$/;"	e	enum:ublimage_cmd
CMD_PAGE_ALLOC	include/fsl_sec.h	/^#define CMD_PAGE_ALLOC	/;"	d
CMD_PAGE_DEALLOC	include/fsl_sec.h	/^#define CMD_PAGE_DEALLOC	/;"	d
CMD_PAGE_PROGRAM	drivers/mtd/spi/sf_internal.h	/^#define CMD_PAGE_PROGRAM	/;"	d
CMD_PARK	drivers/usb/host/ehci.h	/^#define CMD_PARK	/;"	d
CMD_PARK_CNT	drivers/usb/host/ehci.h	/^#define CMD_PARK_CNT(/;"	d
CMD_PART_DEALLOC	include/fsl_sec.h	/^#define CMD_PART_DEALLOC	/;"	d
CMD_PEND_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                CMD_PEND_E /;"	d
CMD_PING	cmd/Kconfig	/^config CMD_PING$/;"	c	menu:Command line interface""Network commands
CMD_PINMON	arch/arm/mach-uniphier/Kconfig	/^config CMD_PINMON$/;"	c
CMD_PINMUX	tools/aisimage.h	/^	CMD_PINMUX,$/;"	e	enum:ais_file_cmd
CMD_PIO	drivers/mtd/nand/tegra_nand.h	/^#define CMD_PIO	/;"	d
CMD_PLL	tools/aisimage.h	/^	CMD_PLL,$/;"	e	enum:ais_file_cmd
CMD_PLL0	tools/aisimage.h	/^	CMD_PLL0,$/;"	e	enum:ais_file_cmd
CMD_PLL1	tools/aisimage.h	/^	CMD_PLL1,$/;"	e	enum:ais_file_cmd
CMD_PLUGIN	tools/imximage.h	/^	CMD_PLUGIN,$/;"	e	enum:imximage_cmd
CMD_PMIC	cmd/Kconfig	/^config CMD_PMIC$/;"	c	menu:Command line interface""Power commands
CMD_PM_INDEX	drivers/usb/host/xhci.h	/^#define CMD_PM_INDEX	/;"	d
CMD_POWEROFF	cmd/Kconfig	/^config CMD_POWEROFF$/;"	c	menu:Command line interface""Boot commands
CMD_PRECHARGE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CMD_PRECHARGE	/;"	d
CMD_PRECHARGE	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CMD_PRECHARGE	/;"	d	file:
CMD_PRECHARGE	include/fsl_mmdc.h	/^#define	CMD_PRECHARGE	/;"	d
CMD_PRECHARGE_BANK_OPEN	include/fsl_mmdc.h	/^#define	CMD_PRECHARGE_BANK_OPEN	/;"	d
CMD_PRINTENV	tools/env/fw_env_main.c	/^#define CMD_PRINTENV	/;"	d	file:
CMD_PROGRAM	board/cobra5272/flash.c	/^#define CMD_PROGRAM	/;"	d	file:
CMD_PSC	tools/aisimage.h	/^	CMD_PSC,$/;"	e	enum:ais_file_cmd
CMD_PSE	drivers/usb/host/ehci.h	/^#define CMD_PSE	/;"	d
CMD_QFW	cmd/Kconfig	/^config CMD_QFW$/;"	c	menu:Command line interface""Misc commands
CMD_QUAD_PAGE_PROGRAM	drivers/mtd/spi/sf_internal.h	/^#define CMD_QUAD_PAGE_PROGRAM	/;"	d
CMD_RARP	cmd/Kconfig	/^config CMD_RARP$/;"	c	menu:Command line interface""Network commands
CMD_RBM	drivers/net/enc28j60.h	/^#define CMD_RBM	/;"	d
CMD_RCR	drivers/net/enc28j60.h	/^#define CMD_RCR(/;"	d
CMD_RD_CONFIG	include/i8042.h	/^#define CMD_RD_CONFIG	/;"	d
CMD_RD_STATUS_CHK	drivers/mtd/nand/tegra_nand.h	/^#define CMD_RD_STATUS_CHK	/;"	d
CMD_READ	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CMD_READ	/;"	d	file:
CMD_READ	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define CMD_READ	/;"	d
CMD_READ_ARRAY	board/cobra5272/flash.c	/^#define CMD_READ_ARRAY	/;"	d	file:
CMD_READ_ARRAY_FAST	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_ARRAY_FAST	/;"	d
CMD_READ_ARRAY_SLOW	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_ARRAY_SLOW	/;"	d
CMD_READ_CONFIG	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_CONFIG	/;"	d
CMD_READ_DUAL_IO_FAST	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_DUAL_IO_FAST	/;"	d
CMD_READ_DUAL_OUTPUT_FAST	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_DUAL_OUTPUT_FAST	/;"	d
CMD_READ_EVCR	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_EVCR	/;"	d
CMD_READ_ID	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_ID	/;"	d
CMD_READ_QUAD_IO_FAST	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_QUAD_IO_FAST	/;"	d
CMD_READ_QUAD_OUTPUT_FAST	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_QUAD_OUTPUT_FAST	/;"	d
CMD_READ_STATUS	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_STATUS	/;"	d
CMD_READ_STATUS1	drivers/mtd/spi/sf_internal.h	/^#define CMD_READ_STATUS1	/;"	d
CMD_REFRESH	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CMD_REFRESH	/;"	d	file:
CMD_REG1_0	drivers/mtd/nand/tegra_nand.h	/^#define CMD_REG1_0	/;"	d
CMD_REG2_0	drivers/mtd/nand/tegra_nand.h	/^#define CMD_REG2_0	/;"	d
CMD_REGULATOR	cmd/Kconfig	/^config CMD_REGULATOR$/;"	c	menu:Command line interface""Power commands
CMD_REMOTEPROC	cmd/Kconfig	/^config CMD_REMOTEPROC$/;"	c	menu:Command line interface""Device access commands
CMD_RESET	drivers/block/fsl_sata.h	/^	CMD_RESET,	\/* SRST or device reset *\/$/;"	e	enum:cmd_type
CMD_RESET	drivers/usb/host/ehci.h	/^#define CMD_RESET	/;"	d
CMD_RESET	drivers/usb/host/xhci.h	/^#define CMD_RESET	/;"	d
CMD_RESET_ASSERT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_RESET_ASSERT = 1,$/;"	e	enum:mrq_reset_commands
CMD_RESET_DEASSERT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_RESET_DEASSERT = 2,$/;"	e	enum:mrq_reset_commands
CMD_RESET_KBD	include/i8042.h	/^#define CMD_RESET_KBD	/;"	d
CMD_RESET_MAX	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_RESET_MAX, \/* not part of ABI and subject to change *\/$/;"	e	enum:mrq_reset_commands
CMD_RESET_MODULE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_RESET_MODULE = 3,$/;"	e	enum:mrq_reset_commands
CMD_RESP_END	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              CMD_RESP_END /;"	d
CMD_RESP_END_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         CMD_RESP_END_MASK /;"	d
CMD_RESP_END_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         CMD_RESP_END_STAT /;"	d
CMD_RET_FAILURE	include/command.h	/^	CMD_RET_FAILURE,	\/* 1 = Failure *\/$/;"	e	enum:command_ret_t
CMD_RET_SUCCESS	include/command.h	/^	CMD_RET_SUCCESS,	\/* 0 = Success *\/$/;"	e	enum:command_ret_t
CMD_RET_USAGE	include/command.h	/^	CMD_RET_USAGE = -1,	\/* Failure, please report 'usage' error *\/$/;"	e	enum:command_ret_t
CMD_RING_ABORT	drivers/usb/host/xhci.h	/^#define CMD_RING_ABORT	/;"	d
CMD_RING_PAUSE	drivers/usb/host/xhci.h	/^#define CMD_RING_PAUSE	/;"	d
CMD_RING_RSVD_BITS	drivers/usb/host/xhci.h	/^#define CMD_RING_RSVD_BITS	/;"	d
CMD_RING_RUNNING	drivers/usb/host/xhci.h	/^#define CMD_RING_RUNNING	/;"	d
CMD_RSP	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   CMD_RSP /;"	d
CMD_RUN	cmd/Kconfig	/^config CMD_RUN$/;"	c	menu:Command line interface""Boot commands
CMD_RUN	drivers/usb/host/ehci.h	/^#define CMD_RUN	/;"	d
CMD_RUN	drivers/usb/host/xhci.h	/^#define CMD_RUN	/;"	d
CMD_RX	drivers/mtd/nand/tegra_nand.h	/^#define CMD_RX	/;"	d
CMD_RXACTIVE	include/mvebu_mmc.h	/^#define CMD_RXACTIVE	/;"	d
CMD_R_BSY_CHK	drivers/mtd/nand/tegra_nand.h	/^#define CMD_R_BSY_CHK	/;"	d
CMD_SATA_PIO_MODE	tools/kwbimage.h	/^	CMD_SATA_PIO_MODE,$/;"	e	enum:kwbimage_cmd
CMD_SAVEENV	cmd/Kconfig	/^config CMD_SAVEENV$/;"	c	menu:Command line interface""Environment commands
CMD_SAVEENV	common/env_flash.c	/^#define CMD_SAVEENV$/;"	d	file:
CMD_SAVEENV	common/env_nand.c	/^#define CMD_SAVEENV$/;"	d	file:
CMD_SEC_CMD	drivers/mtd/nand/tegra_nand.h	/^#define CMD_SEC_CMD	/;"	d
CMD_SELF_TEST	include/i8042.h	/^#define CMD_SELF_TEST	/;"	d
CMD_SENT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                  CMD_SENT /;"	d
CMD_SENT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define             CMD_SENT_MASK /;"	d
CMD_SENT_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define             CMD_SENT_STAT /;"	d
CMD_SEQREAD	tools/aisimage.h	/^	CMD_SEQREAD,$/;"	e	enum:ais_file_cmd
CMD_SEQ_FIFO_LOAD	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_FIFO_LOAD	/;"	d
CMD_SEQ_FIFO_STORE	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_FIFO_STORE	/;"	d
CMD_SEQ_IN_PTR	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_IN_PTR	/;"	d
CMD_SEQ_KEY	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_KEY	/;"	d
CMD_SEQ_LOAD	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_LOAD	/;"	d
CMD_SEQ_OUT_PTR	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_OUT_PTR	/;"	d
CMD_SEQ_STORE	drivers/crypto/fsl/desc.h	/^#define CMD_SEQ_STORE	/;"	d
CMD_SERR	include/mpc106.h	/^#define CMD_SERR	/;"	d
CMD_SETENV	tools/env/fw_env_main.c	/^#define CMD_SETENV	/;"	d	file:
CMD_SETEXPR	cmd/Kconfig	/^config CMD_SETEXPR$/;"	c	menu:Command line interface""Shell scripting commands
CMD_SETGETDCR	cmd/Kconfig	/^config CMD_SETGETDCR$/;"	c	menu:Command line interface""Misc commands
CMD_SET_CCSEN	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CCSEN	/;"	d
CMD_SET_CCSH	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CCSH	/;"	d
CMD_SET_CMD12EN	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CMD12EN	/;"	d
CMD_SET_CMLTE	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CMLTE	/;"	d
CMD_SET_CRC16C	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CRC16C	/;"	d
CMD_SET_CRC7C	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CRC7C	/;"	d
CMD_SET_CRC7C_BITS	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CRC7C_BITS	/;"	d
CMD_SET_CRC7C_INTERNAL	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CRC7C_INTERNAL	/;"	d
CMD_SET_CRCSTE	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_CRCSTE	/;"	d
CMD_SET_DATW_1	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_DATW_1	/;"	d
CMD_SET_DATW_4	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_DATW_4	/;"	d
CMD_SET_DATW_8	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_DATW_8	/;"	d
CMD_SET_DWEN	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_DWEN	/;"	d
CMD_SET_KBD_LED	include/i8042.h	/^#define CMD_SET_KBD_LED	/;"	d
CMD_SET_LED	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define	CMD_SET_LED	/;"	d
CMD_SET_OPDM	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_OPDM	/;"	d
CMD_SET_RBSY	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RBSY	/;"	d
CMD_SET_RIDXC_BITS	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RIDXC_BITS	/;"	d
CMD_SET_RIDXC_INDEX	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RIDXC_INDEX	/;"	d
CMD_SET_RIDXC_NO	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RIDXC_NO	/;"	d
CMD_SET_RTYP_17B	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RTYP_17B	/;"	d
CMD_SET_RTYP_6B	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RTYP_6B	/;"	d
CMD_SET_RTYP_NO	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_RTYP_NO	/;"	d
CMD_SET_TBIT	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_TBIT	/;"	d
CMD_SET_WDAT	drivers/mmc/sh_mmcif.h	/^#define CMD_SET_WDAT	/;"	d
CMD_SF	cmd/Kconfig	/^config CMD_SF$/;"	c	menu:Command line interface""Device access commands
CMD_SHARED_DESC_HDR	drivers/crypto/fsl/desc.h	/^#define CMD_SHARED_DESC_HDR	/;"	d
CMD_SHIFT	drivers/crypto/fsl/desc.h	/^#define CMD_SHIFT	/;"	d
CMD_SIGNATURE	drivers/crypto/fsl/desc.h	/^#define CMD_SIGNATURE	/;"	d
CMD_SIZE	board/esd/vme8349/caddy.h	/^#define CMD_SIZE	/;"	d
CMD_SLAVE_DLL_ENALBE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_SLAVE_DLL_ENALBE			= 1 << 3,$/;"	e	enum:__anon957231910103	file:
CMD_SLAVE_DLL_INVERSE_MODE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_SLAVE_DLL_INVERSE_MODE		= 1 << 4,$/;"	e	enum:__anon957231910103	file:
CMD_SLAVE_DLL_NO_INVERSE_MODE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_SLAVE_DLL_NO_INVERSE_MODE		= 0 << 4,$/;"	e	enum:__anon957231910103	file:
CMD_SNTP	cmd/Kconfig	/^config CMD_SNTP$/;"	c	menu:Command line interface""Network commands
CMD_SOUND	cmd/Kconfig	/^config CMD_SOUND$/;"	c	menu:Command line interface""Misc commands
CMD_SOURCE	cmd/Kconfig	/^config CMD_SOURCE$/;"	c	menu:Command line interface""Shell scripting commands
CMD_SPANSION_RDAR	drivers/mtd/spi/sf_internal.h	/^#define CMD_SPANSION_RDAR	/;"	d
CMD_SPANSION_WRAR	drivers/mtd/spi/sf_internal.h	/^#define CMD_SPANSION_WRAR	/;"	d
CMD_SPI	cmd/Kconfig	/^config CMD_SPI$/;"	c	menu:Command line interface""Device access commands
CMD_SRC	drivers/net/enc28j60.h	/^#define CMD_SRC	/;"	d
CMD_SST_AAI_WP	drivers/mtd/spi/sf_internal.h	/^# define CMD_SST_AAI_WP	/;"	d
CMD_SST_BP	drivers/mtd/spi/sf_internal.h	/^# define CMD_SST_BP	/;"	d
CMD_STAT	examples/standalone/atmel_df_pow2.c	/^#define CMD_STAT /;"	d	file:
CMD_STORE	drivers/crypto/fsl/desc.h	/^#define CMD_STORE	/;"	d
CMD_ST_BLOCK	tools/ublimage.h	/^	CMD_ST_BLOCK,$/;"	e	enum:ublimage_cmd
CMD_ST_PAGE	tools/ublimage.h	/^	CMD_ST_PAGE,$/;"	e	enum:ublimage_cmd
CMD_TFTPPUT	cmd/Kconfig	/^config CMD_TFTPPUT$/;"	c	menu:Command line interface""Network commands
CMD_TFTPSRV	cmd/Kconfig	/^config CMD_TFTPSRV$/;"	c	menu:Command line interface""Network commands
CMD_THERMAL_BPMP_TO_HOST_NUM	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_BPMP_TO_HOST_NUM$/;"	e	enum:mrq_thermal_bpmp_to_host_cmd
CMD_THERMAL_GET_NUM_ZONES	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_GET_NUM_ZONES = 3,$/;"	e	enum:mrq_thermal_host_to_bpmp_cmd
CMD_THERMAL_GET_TEMP	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_GET_TEMP = 1,$/;"	e	enum:mrq_thermal_host_to_bpmp_cmd
CMD_THERMAL_HOST_TO_BPMP_NUM	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_HOST_TO_BPMP_NUM$/;"	e	enum:mrq_thermal_host_to_bpmp_cmd
CMD_THERMAL_HOST_TRIP_REACHED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_HOST_TRIP_REACHED = 100,$/;"	e	enum:mrq_thermal_bpmp_to_host_cmd
CMD_THERMAL_QUERY_ABI	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_QUERY_ABI = 0,$/;"	e	enum:mrq_thermal_host_to_bpmp_cmd
CMD_THERMAL_SET_TRIP	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	CMD_THERMAL_SET_TRIP = 2,$/;"	e	enum:mrq_thermal_host_to_bpmp_cmd
CMD_TIME	cmd/Kconfig	/^config CMD_TIME$/;"	c	menu:Command line interface""Misc commands
CMD_TIMEOUT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          CMD_TIMEOUT_MASK /;"	d
CMD_TIMEOUT_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          CMD_TIMEOUT_STAT /;"	d
CMD_TIMER	cmd/Kconfig	/^config CMD_TIMER$/;"	c	menu:Command line interface""Misc commands
CMD_TIME_OUT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              CMD_TIME_OUT /;"	d
CMD_TIMING	drivers/block/ftide020.h	/^#define CMD_TIMING	/;"	d
CMD_TPM	cmd/Kconfig	/^config CMD_TPM$/;"	c	menu:Command line interface""Security commands
CMD_TPM_TEST	cmd/Kconfig	/^config CMD_TPM_TEST$/;"	c	menu:Command line interface""Security commands
CMD_TRANS_SIZE_PAGE	drivers/mtd/nand/tegra_nand.h	/^#define CMD_TRANS_SIZE_PAGE	/;"	d
CMD_TRANS_SIZE_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define CMD_TRANS_SIZE_SHIFT	/;"	d
CMD_TX	drivers/mtd/nand/tegra_nand.h	/^#define CMD_TX	/;"	d
CMD_TXACTIVE	include/mvebu_mmc.h	/^#define CMD_TXACTIVE	/;"	d
CMD_TX_SLAVE_DLL_DELAY_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_TX_SLAVE_DLL_DELAY_MASK		= 7,$/;"	e	enum:__anon957231910103	file:
CMD_TX_SLAVE_DLL_DELAY_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CMD_TX_SLAVE_DLL_DELAY_SHIFT		= 0,$/;"	e	enum:__anon957231910103	file:
CMD_TYPE_NORMAL	arch/arm/include/asm/omap_mmc.h	/^#define CMD_TYPE_NORMAL	/;"	d
CMD_UBI	cmd/Kconfig	/^config CMD_UBI$/;"	c	menu:Command line interface
CMD_UNLOCK1	board/cobra5272/flash.c	/^#define CMD_UNLOCK1	/;"	d	file:
CMD_UNLOCK2	board/cobra5272/flash.c	/^#define CMD_UNLOCK2	/;"	d	file:
CMD_UNLOCK_BYPASS	board/cobra5272/flash.c	/^#define CMD_UNLOCK_BYPASS	/;"	d	file:
CMD_USB	cmd/Kconfig	/^config CMD_USB$/;"	c	menu:Command line interface""Device access commands
CMD_USB_MASS_STORAGE	cmd/Kconfig	/^config CMD_USB_MASS_STORAGE$/;"	c	menu:Command line interface""Device access commands
CMD_VALID	drivers/ddr/microchip/ddr2_regs.h	/^#define CMD_VALID	/;"	d
CMD_VENDOR_BIST	drivers/block/fsl_sata.h	/^	CMD_VENDOR_BIST,$/;"	e	enum:cmd_type
CMD_WBM	drivers/net/enc28j60.h	/^#define CMD_WBM	/;"	d
CMD_WCR	drivers/net/enc28j60.h	/^#define CMD_WCR(/;"	d
CMD_WD_PARA	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define	CMD_WD_PARA	/;"	d
CMD_WD_WDSTATE	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define	CMD_WD_WDSTATE	/;"	d
CMD_WRITE	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define CMD_WRITE	/;"	d	file:
CMD_WRITE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define CMD_WRITE	/;"	d
CMD_WRITE_CLR_BIT	tools/imximage.h	/^	CMD_WRITE_CLR_BIT,$/;"	e	enum:imximage_cmd
CMD_WRITE_DATA	tools/imximage.h	/^	CMD_WRITE_DATA,$/;"	e	enum:imximage_cmd
CMD_WRITE_DISABLE	drivers/mtd/spi/sf_internal.h	/^#define CMD_WRITE_DISABLE	/;"	d
CMD_WRITE_ENABLE	drivers/mtd/spi/sf_internal.h	/^#define CMD_WRITE_ENABLE	/;"	d
CMD_WRITE_EVCR	drivers/mtd/spi/sf_internal.h	/^#define CMD_WRITE_EVCR	/;"	d
CMD_WRITE_STATUS	drivers/mtd/spi/sf_internal.h	/^#define CMD_WRITE_STATUS	/;"	d
CMD_WR_CONFIG	include/i8042.h	/^#define CMD_WR_CONFIG	/;"	d
CMD_XIMG	cmd/Kconfig	/^config CMD_XIMG$/;"	c	menu:Command line interface""Boot commands
CMD_ZQ_CALIBRATION	include/fsl_mmdc.h	/^#define	CMD_ZQ_CALIBRATION	/;"	d
CMMASK_CMxx6_COMMON	include/armcoremodule.h	/^#define CMMASK_CMxx6_COMMON	/;"	d
CMMASK_INIT_102	include/armcoremodule.h	/^#define CMMASK_INIT_102	/;"	d
CMMASK_LE	include/armcoremodule.h	/^#define CMMASK_LE	/;"	d
CMMASK_LOWVEC	include/armcoremodule.h	/^#define CMMASK_LOWVEC	/;"	d
CMMASK_MAP_SIMPLE	include/armcoremodule.h	/^#define CMMASK_MAP_SIMPLE	/;"	d
CMMASK_REMAP	include/armcoremodule.h	/^#define CMMASK_REMAP	/;"	d
CMMASK_RESET	include/armcoremodule.h	/^#define CMMASK_RESET	/;"	d
CMMASK_TCRAM_DISABLE	include/armcoremodule.h	/^#define CMMASK_TCRAM_DISABLE	/;"	d
CMM_PLL1_CLOCK_TIME_2	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CMM_PLL1_CLOCK_TIME_2	/;"	d
CMM_PLL1_CLOCK_TIME_2	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CMM_PLL1_CLOCK_TIME_2	/;"	d
CMNCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CMNCR	/;"	d
CMNCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CMNCR	/;"	d
CMNCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CMNCR	/;"	d
CMNCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CMNCR	/;"	d
CMNCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CMNCR	/;"	d
CMNCR_A	board/ms7720se/lowlevel_init.S	/^CMNCR_A:	.long	BSC_BASE$/;"	l
CMNCR_A	board/ms7722se/lowlevel_init.S	/^CMNCR_A:	.long	CMNCR$/;"	l
CMNCR_A	board/renesas/MigoR/lowlevel_init.S	/^CMNCR_A:	.long	CMNCR$/;"	l
CMNCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CMNCR_A:	.long	CMNCR$/;"	l
CMNCR_A	board/renesas/ecovec/lowlevel_init.S	/^CMNCR_A:	.long	CMNCR$/;"	l
CMNCR_A	board/renesas/rsk7203/lowlevel_init.S	/^CMNCR_A:	.long 0xFFFC0000$/;"	l
CMNCR_BROMMD	board/kmc/kzm9g/kzm9g.c	/^#define CMNCR_BROMMD	/;"	d	file:
CMNCR_BROMMD0	board/kmc/kzm9g/kzm9g.c	/^#define CMNCR_BROMMD0 /;"	d	file:
CMNCR_BROMMD1	board/kmc/kzm9g/kzm9g.c	/^#define CMNCR_BROMMD1 /;"	d	file:
CMNCR_D	board/ms7720se/lowlevel_init.S	/^CMNCR_D:	.long	0x00000010$/;"	l
CMNCR_D	board/ms7722se/lowlevel_init.S	/^CMNCR_D:	.long	0x00000013$/;"	l
CMNCR_D	board/renesas/MigoR/lowlevel_init.S	/^CMNCR_D:	.long	0x0000001B$/;"	l
CMNCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CMNCR_D:	.long	0x00000013$/;"	l
CMNCR_D	board/renesas/ecovec/lowlevel_init.S	/^CMNCR_D:	.long	0x00000013$/;"	l
CMNCR_D	board/renesas/rsk7203/lowlevel_init.S	/^CMNCR_D:	.long 0x00001810$/;"	l
CMOS_ADDR_PORT	arch/x86/include/asm/arch-qemu/qemu.h	/^#define CMOS_ADDR_PORT	/;"	d
CMOS_CONFIG_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CMOS_CONFIG_PHY_REG	/;"	d
CMOS_DATA_PORT	arch/x86/include/asm/arch-qemu/qemu.h	/^#define CMOS_DATA_PORT	/;"	d
CMOS_IMAGE_BUFFER_SIZE	arch/x86/include/asm/coreboot_tables.h	/^#define CMOS_IMAGE_BUFFER_SIZE	/;"	d
CMOS_MAX_NAME_LENGTH	arch/x86/include/asm/coreboot_tables.h	/^#define CMOS_MAX_NAME_LENGTH	/;"	d
CMOS_MAX_TEXT_LENGTH	arch/x86/include/asm/coreboot_tables.h	/^#define CMOS_MAX_TEXT_LENGTH	/;"	d
CMOS_OFFSET_MRC_SEED	arch/x86/cpu/ivybridge/sdram.c	/^#define CMOS_OFFSET_MRC_SEED	/;"	d	file:
CMOS_OFFSET_MRC_SEED_CHK	arch/x86/cpu/ivybridge/sdram.c	/^#define CMOS_OFFSET_MRC_SEED_CHK	/;"	d	file:
CMOS_OFFSET_MRC_SEED_S3	arch/x86/cpu/ivybridge/sdram.c	/^#define CMOS_OFFSET_MRC_SEED_S3	/;"	d	file:
CMOS_READ	arch/powerpc/include/asm/mc146818rtc.h	/^#define CMOS_READ(/;"	d
CMOS_WRITE	arch/powerpc/include/asm/mc146818rtc.h	/^#define CMOS_WRITE(/;"	d
CMP	include/sym53c8xx.h	/^  #define   CMP /;"	d
CMPCTRL	arch/x86/cpu/quark/smc.h	/^#define CMPCTRL	/;"	d
CMPLB	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define CMPLB /;"	d
CMPLB_SINGLE	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define CMPLB_SINGLE /;"	d
CMPLP_DOUBLE	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define CMPLP_DOUBLE /;"	d
CMP_BYTE_MASK	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define CMP_BYTE_MASK /;"	d
CMP_BYTE_SHIFT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define CMP_BYTE_SHIFT /;"	d
CMSG	include/sym53c8xx.h	/^	#define   CMSG	/;"	d
CMSTR	arch/sh/include/asm/cpu_sh7203.h	/^#define CMSTR /;"	d
CMSTR	arch/sh/include/asm/cpu_sh7264.h	/^#define CMSTR	/;"	d
CMSTR	arch/sh/include/asm/cpu_sh7269.h	/^#define CMSTR	/;"	d
CMSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define CMSTR /;"	d
CMSTR	arch/sh/include/asm/cpu_sh7723.h	/^#define CMSTR /;"	d
CMSTR	arch/sh/include/asm/cpu_sh7724.h	/^#define CMSTR /;"	d
CMT1_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define CMT1_BASE	/;"	d
CMTCFG	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCFG	/;"	d
CMTCH0C	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH0C	/;"	d
CMTCH0ST	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH0ST	/;"	d
CMTCH0T	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH0T	/;"	d
CMTCH1C	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH1C	/;"	d
CMTCH1ST	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH1ST	/;"	d
CMTCH1T	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH1T	/;"	d
CMTCH2C	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH2C	/;"	d
CMTCH2T	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH2T	/;"	d
CMTCH3C	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH3C	/;"	d
CMTCH3T	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCH3T	/;"	d
CMTCTL	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTCTL	/;"	d
CMTFRT	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTFRT	/;"	d
CMTIRQS	arch/sh/include/asm/cpu_sh7780.h	/^#define	CMTIRQS	/;"	d
CMT_CLK_DIVIDER	include/configs/rsk7203.h	/^#define CMT_CLK_DIVIDER	/;"	d
CMT_CLK_DIVIDER	include/configs/rsk7264.h	/^#define CMT_CLK_DIVIDER	/;"	d
CMT_CLK_DIVIDER	include/configs/rsk7269.h	/^#define CMT_CLK_DIVIDER	/;"	d
CMT_CMCSR_CALIB	arch/sh/lib/time_sh2.c	/^#define CMT_CMCSR_CALIB /;"	d	file:
CMT_CMCSR_INIT	arch/sh/lib/time_sh2.c	/^#define CMT_CMCSR_INIT	/;"	d	file:
CMT_MAX_COUNTER	arch/sh/lib/time_sh2.c	/^#define CMT_MAX_COUNTER /;"	d	file:
CMT_TIMER_RESET	arch/sh/lib/time_sh2.c	/^#define CMT_TIMER_RESET /;"	d	file:
CMU1_QA	board/cm5200/cm5200.h	/^	CMU1_QA,$/;"	e	enum:__anonb595836f0303
CMU_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CMU_BASE_ADDR	/;"	d
CMVAL_LOCK1	include/armcoremodule.h	/^#define CMVAL_LOCK1	/;"	d
CMVAL_LOCK2	include/armcoremodule.h	/^#define CMVAL_LOCK2	/;"	d
CMVAL_UNLOCK	include/armcoremodule.h	/^#define CMVAL_UNLOCK	/;"	d
CMXFCR_FC1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_FC1 /;"	d
CMXFCR_FC1	include/mpc8260.h	/^#define CMXFCR_FC1	/;"	d
CMXFCR_FC2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_FC2 /;"	d
CMXFCR_FC2	include/mpc8260.h	/^#define CMXFCR_FC2	/;"	d
CMXFCR_FC3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_FC3 /;"	d
CMXFCR_FC3	include/mpc8260.h	/^#define CMXFCR_FC3	/;"	d
CMXFCR_RF1CS_BRG5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_BRG5 /;"	d
CMXFCR_RF1CS_BRG5	include/mpc8260.h	/^#define CMXFCR_RF1CS_BRG5 /;"	d
CMXFCR_RF1CS_BRG6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_BRG6 /;"	d
CMXFCR_RF1CS_BRG6	include/mpc8260.h	/^#define CMXFCR_RF1CS_BRG6 /;"	d
CMXFCR_RF1CS_BRG7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_BRG7 /;"	d
CMXFCR_RF1CS_BRG7	include/mpc8260.h	/^#define CMXFCR_RF1CS_BRG7 /;"	d
CMXFCR_RF1CS_BRG8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_BRG8 /;"	d
CMXFCR_RF1CS_BRG8	include/mpc8260.h	/^#define CMXFCR_RF1CS_BRG8 /;"	d
CMXFCR_RF1CS_CLK10	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_CLK10 /;"	d
CMXFCR_RF1CS_CLK10	include/mpc8260.h	/^#define CMXFCR_RF1CS_CLK10 /;"	d
CMXFCR_RF1CS_CLK11	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_CLK11 /;"	d
CMXFCR_RF1CS_CLK11	include/mpc8260.h	/^#define CMXFCR_RF1CS_CLK11 /;"	d
CMXFCR_RF1CS_CLK12	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_CLK12 /;"	d
CMXFCR_RF1CS_CLK12	include/mpc8260.h	/^#define CMXFCR_RF1CS_CLK12 /;"	d
CMXFCR_RF1CS_CLK9	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_CLK9 /;"	d
CMXFCR_RF1CS_CLK9	include/mpc8260.h	/^#define CMXFCR_RF1CS_CLK9 /;"	d
CMXFCR_RF1CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF1CS_MSK /;"	d
CMXFCR_RF1CS_MSK	include/mpc8260.h	/^#define CMXFCR_RF1CS_MSK /;"	d
CMXFCR_RF2CS_BRG5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_BRG5 /;"	d
CMXFCR_RF2CS_BRG5	include/mpc8260.h	/^#define CMXFCR_RF2CS_BRG5 /;"	d
CMXFCR_RF2CS_BRG6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_BRG6 /;"	d
CMXFCR_RF2CS_BRG6	include/mpc8260.h	/^#define CMXFCR_RF2CS_BRG6 /;"	d
CMXFCR_RF2CS_BRG7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_BRG7 /;"	d
CMXFCR_RF2CS_BRG7	include/mpc8260.h	/^#define CMXFCR_RF2CS_BRG7 /;"	d
CMXFCR_RF2CS_BRG8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_BRG8 /;"	d
CMXFCR_RF2CS_BRG8	include/mpc8260.h	/^#define CMXFCR_RF2CS_BRG8 /;"	d
CMXFCR_RF2CS_CLK13	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_CLK13 /;"	d
CMXFCR_RF2CS_CLK13	include/mpc8260.h	/^#define CMXFCR_RF2CS_CLK13 /;"	d
CMXFCR_RF2CS_CLK14	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_CLK14 /;"	d
CMXFCR_RF2CS_CLK14	include/mpc8260.h	/^#define CMXFCR_RF2CS_CLK14 /;"	d
CMXFCR_RF2CS_CLK15	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_CLK15 /;"	d
CMXFCR_RF2CS_CLK15	include/mpc8260.h	/^#define CMXFCR_RF2CS_CLK15 /;"	d
CMXFCR_RF2CS_CLK16	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_CLK16 /;"	d
CMXFCR_RF2CS_CLK16	include/mpc8260.h	/^#define CMXFCR_RF2CS_CLK16 /;"	d
CMXFCR_RF2CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF2CS_MSK /;"	d
CMXFCR_RF2CS_MSK	include/mpc8260.h	/^#define CMXFCR_RF2CS_MSK /;"	d
CMXFCR_RF3CS_BRG5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_BRG5 /;"	d
CMXFCR_RF3CS_BRG5	include/mpc8260.h	/^#define CMXFCR_RF3CS_BRG5 /;"	d
CMXFCR_RF3CS_BRG6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_BRG6 /;"	d
CMXFCR_RF3CS_BRG6	include/mpc8260.h	/^#define CMXFCR_RF3CS_BRG6 /;"	d
CMXFCR_RF3CS_BRG7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_BRG7 /;"	d
CMXFCR_RF3CS_BRG7	include/mpc8260.h	/^#define CMXFCR_RF3CS_BRG7 /;"	d
CMXFCR_RF3CS_BRG8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_BRG8 /;"	d
CMXFCR_RF3CS_BRG8	include/mpc8260.h	/^#define CMXFCR_RF3CS_BRG8 /;"	d
CMXFCR_RF3CS_CLK13	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_CLK13 /;"	d
CMXFCR_RF3CS_CLK13	include/mpc8260.h	/^#define CMXFCR_RF3CS_CLK13 /;"	d
CMXFCR_RF3CS_CLK14	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_CLK14 /;"	d
CMXFCR_RF3CS_CLK14	include/mpc8260.h	/^#define CMXFCR_RF3CS_CLK14 /;"	d
CMXFCR_RF3CS_CLK15	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_CLK15 /;"	d
CMXFCR_RF3CS_CLK15	include/mpc8260.h	/^#define CMXFCR_RF3CS_CLK15 /;"	d
CMXFCR_RF3CS_CLK16	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_CLK16 /;"	d
CMXFCR_RF3CS_CLK16	include/mpc8260.h	/^#define CMXFCR_RF3CS_CLK16 /;"	d
CMXFCR_RF3CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_RF3CS_MSK /;"	d
CMXFCR_RF3CS_MSK	include/mpc8260.h	/^#define CMXFCR_RF3CS_MSK /;"	d
CMXFCR_TF1CS_BRG5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_BRG5 /;"	d
CMXFCR_TF1CS_BRG5	include/mpc8260.h	/^#define CMXFCR_TF1CS_BRG5 /;"	d
CMXFCR_TF1CS_BRG6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_BRG6 /;"	d
CMXFCR_TF1CS_BRG6	include/mpc8260.h	/^#define CMXFCR_TF1CS_BRG6 /;"	d
CMXFCR_TF1CS_BRG7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_BRG7 /;"	d
CMXFCR_TF1CS_BRG7	include/mpc8260.h	/^#define CMXFCR_TF1CS_BRG7 /;"	d
CMXFCR_TF1CS_BRG8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_BRG8 /;"	d
CMXFCR_TF1CS_BRG8	include/mpc8260.h	/^#define CMXFCR_TF1CS_BRG8 /;"	d
CMXFCR_TF1CS_CLK10	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_CLK10 /;"	d
CMXFCR_TF1CS_CLK10	include/mpc8260.h	/^#define CMXFCR_TF1CS_CLK10 /;"	d
CMXFCR_TF1CS_CLK11	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_CLK11 /;"	d
CMXFCR_TF1CS_CLK11	include/mpc8260.h	/^#define CMXFCR_TF1CS_CLK11 /;"	d
CMXFCR_TF1CS_CLK12	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_CLK12 /;"	d
CMXFCR_TF1CS_CLK12	include/mpc8260.h	/^#define CMXFCR_TF1CS_CLK12 /;"	d
CMXFCR_TF1CS_CLK9	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_CLK9 /;"	d
CMXFCR_TF1CS_CLK9	include/mpc8260.h	/^#define CMXFCR_TF1CS_CLK9 /;"	d
CMXFCR_TF1CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF1CS_MSK /;"	d
CMXFCR_TF1CS_MSK	include/mpc8260.h	/^#define CMXFCR_TF1CS_MSK /;"	d
CMXFCR_TF2CS_BRG5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_BRG5 /;"	d
CMXFCR_TF2CS_BRG5	include/mpc8260.h	/^#define CMXFCR_TF2CS_BRG5 /;"	d
CMXFCR_TF2CS_BRG6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_BRG6 /;"	d
CMXFCR_TF2CS_BRG6	include/mpc8260.h	/^#define CMXFCR_TF2CS_BRG6 /;"	d
CMXFCR_TF2CS_BRG7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_BRG7 /;"	d
CMXFCR_TF2CS_BRG7	include/mpc8260.h	/^#define CMXFCR_TF2CS_BRG7 /;"	d
CMXFCR_TF2CS_BRG8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_BRG8 /;"	d
CMXFCR_TF2CS_BRG8	include/mpc8260.h	/^#define CMXFCR_TF2CS_BRG8 /;"	d
CMXFCR_TF2CS_CLK13	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_CLK13 /;"	d
CMXFCR_TF2CS_CLK13	include/mpc8260.h	/^#define CMXFCR_TF2CS_CLK13 /;"	d
CMXFCR_TF2CS_CLK14	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_CLK14 /;"	d
CMXFCR_TF2CS_CLK14	include/mpc8260.h	/^#define CMXFCR_TF2CS_CLK14 /;"	d
CMXFCR_TF2CS_CLK15	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_CLK15 /;"	d
CMXFCR_TF2CS_CLK15	include/mpc8260.h	/^#define CMXFCR_TF2CS_CLK15 /;"	d
CMXFCR_TF2CS_CLK16	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_CLK16 /;"	d
CMXFCR_TF2CS_CLK16	include/mpc8260.h	/^#define CMXFCR_TF2CS_CLK16 /;"	d
CMXFCR_TF2CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF2CS_MSK /;"	d
CMXFCR_TF2CS_MSK	include/mpc8260.h	/^#define CMXFCR_TF2CS_MSK /;"	d
CMXFCR_TF3CS_BRG5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_BRG5 /;"	d
CMXFCR_TF3CS_BRG5	include/mpc8260.h	/^#define CMXFCR_TF3CS_BRG5 /;"	d
CMXFCR_TF3CS_BRG6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_BRG6 /;"	d
CMXFCR_TF3CS_BRG6	include/mpc8260.h	/^#define CMXFCR_TF3CS_BRG6 /;"	d
CMXFCR_TF3CS_BRG7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_BRG7 /;"	d
CMXFCR_TF3CS_BRG7	include/mpc8260.h	/^#define CMXFCR_TF3CS_BRG7 /;"	d
CMXFCR_TF3CS_BRG8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_BRG8 /;"	d
CMXFCR_TF3CS_BRG8	include/mpc8260.h	/^#define CMXFCR_TF3CS_BRG8 /;"	d
CMXFCR_TF3CS_CLK13	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_CLK13 /;"	d
CMXFCR_TF3CS_CLK13	include/mpc8260.h	/^#define CMXFCR_TF3CS_CLK13 /;"	d
CMXFCR_TF3CS_CLK14	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_CLK14 /;"	d
CMXFCR_TF3CS_CLK14	include/mpc8260.h	/^#define CMXFCR_TF3CS_CLK14 /;"	d
CMXFCR_TF3CS_CLK15	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_CLK15 /;"	d
CMXFCR_TF3CS_CLK15	include/mpc8260.h	/^#define CMXFCR_TF3CS_CLK15 /;"	d
CMXFCR_TF3CS_CLK16	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_CLK16 /;"	d
CMXFCR_TF3CS_CLK16	include/mpc8260.h	/^#define CMXFCR_TF3CS_CLK16 /;"	d
CMXFCR_TF3CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXFCR_TF3CS_MSK /;"	d
CMXFCR_TF3CS_MSK	include/mpc8260.h	/^#define CMXFCR_TF3CS_MSK /;"	d
CMXSCR_GR1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_GR1 /;"	d
CMXSCR_GR1	include/mpc8260.h	/^#define CMXSCR_GR1	/;"	d
CMXSCR_GR2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_GR2 /;"	d
CMXSCR_GR2	include/mpc8260.h	/^#define CMXSCR_GR2	/;"	d
CMXSCR_GR3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_GR3 /;"	d
CMXSCR_GR3	include/mpc8260.h	/^#define CMXSCR_GR3	/;"	d
CMXSCR_GR4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_GR4 /;"	d
CMXSCR_GR4	include/mpc8260.h	/^#define CMXSCR_GR4	/;"	d
CMXSCR_MASK	arch/powerpc/cpu/mpc8260/ether_scc.c	/^#  define CMXSCR_MASK /;"	d	file:
CMXSCR_MASK	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define CMXSCR_MASK	/;"	d	file:
CMXSCR_MASK	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^#define CMXSCR_MASK	/;"	d	file:
CMXSCR_RS1CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_BRG1 /;"	d
CMXSCR_RS1CS_BRG1	include/mpc8260.h	/^#define CMXSCR_RS1CS_BRG1 /;"	d
CMXSCR_RS1CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_BRG2 /;"	d
CMXSCR_RS1CS_BRG2	include/mpc8260.h	/^#define CMXSCR_RS1CS_BRG2 /;"	d
CMXSCR_RS1CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_BRG3 /;"	d
CMXSCR_RS1CS_BRG3	include/mpc8260.h	/^#define CMXSCR_RS1CS_BRG3 /;"	d
CMXSCR_RS1CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_BRG4 /;"	d
CMXSCR_RS1CS_BRG4	include/mpc8260.h	/^#define CMXSCR_RS1CS_BRG4 /;"	d
CMXSCR_RS1CS_CLK11	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_CLK11 /;"	d
CMXSCR_RS1CS_CLK11	include/mpc8260.h	/^#define CMXSCR_RS1CS_CLK11 /;"	d
CMXSCR_RS1CS_CLK12	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_CLK12 /;"	d
CMXSCR_RS1CS_CLK12	include/mpc8260.h	/^#define CMXSCR_RS1CS_CLK12 /;"	d
CMXSCR_RS1CS_CLK3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_CLK3 /;"	d
CMXSCR_RS1CS_CLK3	include/mpc8260.h	/^#define CMXSCR_RS1CS_CLK3 /;"	d
CMXSCR_RS1CS_CLK4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_CLK4 /;"	d
CMXSCR_RS1CS_CLK4	include/mpc8260.h	/^#define CMXSCR_RS1CS_CLK4 /;"	d
CMXSCR_RS1CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS1CS_MSK /;"	d
CMXSCR_RS1CS_MSK	include/mpc8260.h	/^#define CMXSCR_RS1CS_MSK /;"	d
CMXSCR_RS2CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_BRG1 /;"	d
CMXSCR_RS2CS_BRG1	include/mpc8260.h	/^#define CMXSCR_RS2CS_BRG1 /;"	d
CMXSCR_RS2CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_BRG2 /;"	d
CMXSCR_RS2CS_BRG2	include/mpc8260.h	/^#define CMXSCR_RS2CS_BRG2 /;"	d
CMXSCR_RS2CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_BRG3 /;"	d
CMXSCR_RS2CS_BRG3	include/mpc8260.h	/^#define CMXSCR_RS2CS_BRG3 /;"	d
CMXSCR_RS2CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_BRG4 /;"	d
CMXSCR_RS2CS_BRG4	include/mpc8260.h	/^#define CMXSCR_RS2CS_BRG4 /;"	d
CMXSCR_RS2CS_CLK11	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_CLK11 /;"	d
CMXSCR_RS2CS_CLK11	include/mpc8260.h	/^#define CMXSCR_RS2CS_CLK11 /;"	d
CMXSCR_RS2CS_CLK12	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_CLK12 /;"	d
CMXSCR_RS2CS_CLK12	include/mpc8260.h	/^#define CMXSCR_RS2CS_CLK12 /;"	d
CMXSCR_RS2CS_CLK3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_CLK3 /;"	d
CMXSCR_RS2CS_CLK3	include/mpc8260.h	/^#define CMXSCR_RS2CS_CLK3 /;"	d
CMXSCR_RS2CS_CLK4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_CLK4 /;"	d
CMXSCR_RS2CS_CLK4	include/mpc8260.h	/^#define CMXSCR_RS2CS_CLK4 /;"	d
CMXSCR_RS2CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS2CS_MSK /;"	d
CMXSCR_RS2CS_MSK	include/mpc8260.h	/^#define CMXSCR_RS2CS_MSK /;"	d
CMXSCR_RS3CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_BRG1 /;"	d
CMXSCR_RS3CS_BRG1	include/mpc8260.h	/^#define CMXSCR_RS3CS_BRG1 /;"	d
CMXSCR_RS3CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_BRG2 /;"	d
CMXSCR_RS3CS_BRG2	include/mpc8260.h	/^#define CMXSCR_RS3CS_BRG2 /;"	d
CMXSCR_RS3CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_BRG3 /;"	d
CMXSCR_RS3CS_BRG3	include/mpc8260.h	/^#define CMXSCR_RS3CS_BRG3 /;"	d
CMXSCR_RS3CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_BRG4 /;"	d
CMXSCR_RS3CS_BRG4	include/mpc8260.h	/^#define CMXSCR_RS3CS_BRG4 /;"	d
CMXSCR_RS3CS_CLK5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_CLK5 /;"	d
CMXSCR_RS3CS_CLK5	include/mpc8260.h	/^#define CMXSCR_RS3CS_CLK5 /;"	d
CMXSCR_RS3CS_CLK6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_CLK6 /;"	d
CMXSCR_RS3CS_CLK6	include/mpc8260.h	/^#define CMXSCR_RS3CS_CLK6 /;"	d
CMXSCR_RS3CS_CLK7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_CLK7 /;"	d
CMXSCR_RS3CS_CLK7	include/mpc8260.h	/^#define CMXSCR_RS3CS_CLK7 /;"	d
CMXSCR_RS3CS_CLK8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_CLK8 /;"	d
CMXSCR_RS3CS_CLK8	include/mpc8260.h	/^#define CMXSCR_RS3CS_CLK8 /;"	d
CMXSCR_RS3CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS3CS_MSK /;"	d
CMXSCR_RS3CS_MSK	include/mpc8260.h	/^#define CMXSCR_RS3CS_MSK /;"	d
CMXSCR_RS4CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_BRG1 /;"	d
CMXSCR_RS4CS_BRG1	include/mpc8260.h	/^#define CMXSCR_RS4CS_BRG1 /;"	d
CMXSCR_RS4CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_BRG2 /;"	d
CMXSCR_RS4CS_BRG2	include/mpc8260.h	/^#define CMXSCR_RS4CS_BRG2 /;"	d
CMXSCR_RS4CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_BRG3 /;"	d
CMXSCR_RS4CS_BRG3	include/mpc8260.h	/^#define CMXSCR_RS4CS_BRG3 /;"	d
CMXSCR_RS4CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_BRG4 /;"	d
CMXSCR_RS4CS_BRG4	include/mpc8260.h	/^#define CMXSCR_RS4CS_BRG4 /;"	d
CMXSCR_RS4CS_CLK5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_CLK5 /;"	d
CMXSCR_RS4CS_CLK5	include/mpc8260.h	/^#define CMXSCR_RS4CS_CLK5 /;"	d
CMXSCR_RS4CS_CLK6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_CLK6 /;"	d
CMXSCR_RS4CS_CLK6	include/mpc8260.h	/^#define CMXSCR_RS4CS_CLK6 /;"	d
CMXSCR_RS4CS_CLK7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_CLK7 /;"	d
CMXSCR_RS4CS_CLK7	include/mpc8260.h	/^#define CMXSCR_RS4CS_CLK7 /;"	d
CMXSCR_RS4CS_CLK8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_CLK8 /;"	d
CMXSCR_RS4CS_CLK8	include/mpc8260.h	/^#define CMXSCR_RS4CS_CLK8 /;"	d
CMXSCR_RS4CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_RS4CS_MSK /;"	d
CMXSCR_RS4CS_MSK	include/mpc8260.h	/^#define CMXSCR_RS4CS_MSK /;"	d
CMXSCR_SC1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_SC1 /;"	d
CMXSCR_SC1	include/mpc8260.h	/^#define CMXSCR_SC1	/;"	d
CMXSCR_SC2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_SC2 /;"	d
CMXSCR_SC2	include/mpc8260.h	/^#define CMXSCR_SC2	/;"	d
CMXSCR_SC3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_SC3 /;"	d
CMXSCR_SC3	include/mpc8260.h	/^#define CMXSCR_SC3	/;"	d
CMXSCR_SC4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_SC4 /;"	d
CMXSCR_SC4	include/mpc8260.h	/^#define CMXSCR_SC4	/;"	d
CMXSCR_TS1CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_BRG1 /;"	d
CMXSCR_TS1CS_BRG1	include/mpc8260.h	/^#define CMXSCR_TS1CS_BRG1 /;"	d
CMXSCR_TS1CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_BRG2 /;"	d
CMXSCR_TS1CS_BRG2	include/mpc8260.h	/^#define CMXSCR_TS1CS_BRG2 /;"	d
CMXSCR_TS1CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_BRG3 /;"	d
CMXSCR_TS1CS_BRG3	include/mpc8260.h	/^#define CMXSCR_TS1CS_BRG3 /;"	d
CMXSCR_TS1CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_BRG4 /;"	d
CMXSCR_TS1CS_BRG4	include/mpc8260.h	/^#define CMXSCR_TS1CS_BRG4 /;"	d
CMXSCR_TS1CS_CLK11	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_CLK11 /;"	d
CMXSCR_TS1CS_CLK11	include/mpc8260.h	/^#define CMXSCR_TS1CS_CLK11 /;"	d
CMXSCR_TS1CS_CLK12	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_CLK12 /;"	d
CMXSCR_TS1CS_CLK12	include/mpc8260.h	/^#define CMXSCR_TS1CS_CLK12 /;"	d
CMXSCR_TS1CS_CLK3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_CLK3 /;"	d
CMXSCR_TS1CS_CLK3	include/mpc8260.h	/^#define CMXSCR_TS1CS_CLK3 /;"	d
CMXSCR_TS1CS_CLK4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_CLK4 /;"	d
CMXSCR_TS1CS_CLK4	include/mpc8260.h	/^#define CMXSCR_TS1CS_CLK4 /;"	d
CMXSCR_TS1CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS1CS_MSK /;"	d
CMXSCR_TS1CS_MSK	include/mpc8260.h	/^#define CMXSCR_TS1CS_MSK /;"	d
CMXSCR_TS2CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_BRG1 /;"	d
CMXSCR_TS2CS_BRG1	include/mpc8260.h	/^#define CMXSCR_TS2CS_BRG1 /;"	d
CMXSCR_TS2CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_BRG2 /;"	d
CMXSCR_TS2CS_BRG2	include/mpc8260.h	/^#define CMXSCR_TS2CS_BRG2 /;"	d
CMXSCR_TS2CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_BRG3 /;"	d
CMXSCR_TS2CS_BRG3	include/mpc8260.h	/^#define CMXSCR_TS2CS_BRG3 /;"	d
CMXSCR_TS2CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_BRG4 /;"	d
CMXSCR_TS2CS_BRG4	include/mpc8260.h	/^#define CMXSCR_TS2CS_BRG4 /;"	d
CMXSCR_TS2CS_CLK11	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_CLK11 /;"	d
CMXSCR_TS2CS_CLK11	include/mpc8260.h	/^#define CMXSCR_TS2CS_CLK11 /;"	d
CMXSCR_TS2CS_CLK12	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_CLK12 /;"	d
CMXSCR_TS2CS_CLK12	include/mpc8260.h	/^#define CMXSCR_TS2CS_CLK12 /;"	d
CMXSCR_TS2CS_CLK3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_CLK3 /;"	d
CMXSCR_TS2CS_CLK3	include/mpc8260.h	/^#define CMXSCR_TS2CS_CLK3 /;"	d
CMXSCR_TS2CS_CLK4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_CLK4 /;"	d
CMXSCR_TS2CS_CLK4	include/mpc8260.h	/^#define CMXSCR_TS2CS_CLK4 /;"	d
CMXSCR_TS2CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS2CS_MSK /;"	d
CMXSCR_TS2CS_MSK	include/mpc8260.h	/^#define CMXSCR_TS2CS_MSK /;"	d
CMXSCR_TS3CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_BRG1 /;"	d
CMXSCR_TS3CS_BRG1	include/mpc8260.h	/^#define CMXSCR_TS3CS_BRG1 /;"	d
CMXSCR_TS3CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_BRG2 /;"	d
CMXSCR_TS3CS_BRG2	include/mpc8260.h	/^#define CMXSCR_TS3CS_BRG2 /;"	d
CMXSCR_TS3CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_BRG3 /;"	d
CMXSCR_TS3CS_BRG3	include/mpc8260.h	/^#define CMXSCR_TS3CS_BRG3 /;"	d
CMXSCR_TS3CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_BRG4 /;"	d
CMXSCR_TS3CS_BRG4	include/mpc8260.h	/^#define CMXSCR_TS3CS_BRG4 /;"	d
CMXSCR_TS3CS_CLK5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_CLK5 /;"	d
CMXSCR_TS3CS_CLK5	include/mpc8260.h	/^#define CMXSCR_TS3CS_CLK5 /;"	d
CMXSCR_TS3CS_CLK6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_CLK6 /;"	d
CMXSCR_TS3CS_CLK6	include/mpc8260.h	/^#define CMXSCR_TS3CS_CLK6 /;"	d
CMXSCR_TS3CS_CLK7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_CLK7 /;"	d
CMXSCR_TS3CS_CLK7	include/mpc8260.h	/^#define CMXSCR_TS3CS_CLK7 /;"	d
CMXSCR_TS3CS_CLK8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_CLK8 /;"	d
CMXSCR_TS3CS_CLK8	include/mpc8260.h	/^#define CMXSCR_TS3CS_CLK8 /;"	d
CMXSCR_TS3CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS3CS_MSK /;"	d
CMXSCR_TS3CS_MSK	include/mpc8260.h	/^#define CMXSCR_TS3CS_MSK /;"	d
CMXSCR_TS4CS_BRG1	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_BRG1 /;"	d
CMXSCR_TS4CS_BRG1	include/mpc8260.h	/^#define CMXSCR_TS4CS_BRG1 /;"	d
CMXSCR_TS4CS_BRG2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_BRG2 /;"	d
CMXSCR_TS4CS_BRG2	include/mpc8260.h	/^#define CMXSCR_TS4CS_BRG2 /;"	d
CMXSCR_TS4CS_BRG3	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_BRG3 /;"	d
CMXSCR_TS4CS_BRG3	include/mpc8260.h	/^#define CMXSCR_TS4CS_BRG3 /;"	d
CMXSCR_TS4CS_BRG4	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_BRG4 /;"	d
CMXSCR_TS4CS_BRG4	include/mpc8260.h	/^#define CMXSCR_TS4CS_BRG4 /;"	d
CMXSCR_TS4CS_CLK5	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_CLK5 /;"	d
CMXSCR_TS4CS_CLK5	include/mpc8260.h	/^#define CMXSCR_TS4CS_CLK5 /;"	d
CMXSCR_TS4CS_CLK6	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_CLK6 /;"	d
CMXSCR_TS4CS_CLK6	include/mpc8260.h	/^#define CMXSCR_TS4CS_CLK6 /;"	d
CMXSCR_TS4CS_CLK7	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_CLK7 /;"	d
CMXSCR_TS4CS_CLK7	include/mpc8260.h	/^#define CMXSCR_TS4CS_CLK7 /;"	d
CMXSCR_TS4CS_CLK8	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_CLK8 /;"	d
CMXSCR_TS4CS_CLK8	include/mpc8260.h	/^#define CMXSCR_TS4CS_CLK8 /;"	d
CMXSCR_TS4CS_MSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CMXSCR_TS4CS_MSK /;"	d
CMXSCR_TS4CS_MSK	include/mpc8260.h	/^#define CMXSCR_TS4CS_MSK /;"	d
CMXSCR_VALUE	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define CMXSCR_VALUE	/;"	d	file:
CMXSCR_VALUE	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^#define CMXSCR_VALUE	/;"	d	file:
CMXSMR_MASK	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define CMXSMR_MASK	/;"	d	file:
CMXSMR_SMC1	include/mpc8260.h	/^#define CMXSMR_SMC1	/;"	d
CMXSMR_SMC1CS_BRG1	include/mpc8260.h	/^#define CMXSMR_SMC1CS_BRG1 /;"	d
CMXSMR_SMC1CS_BRG7	include/mpc8260.h	/^#define CMXSMR_SMC1CS_BRG7 /;"	d
CMXSMR_SMC1CS_CLK7	include/mpc8260.h	/^#define CMXSMR_SMC1CS_CLK7 /;"	d
CMXSMR_SMC1CS_CLK9	include/mpc8260.h	/^#define CMXSMR_SMC1CS_CLK9 /;"	d
CMXSMR_SMC1CS_MSK	include/mpc8260.h	/^#define CMXSMR_SMC1CS_MSK /;"	d
CMXSMR_SMC2	include/mpc8260.h	/^#define CMXSMR_SMC2	/;"	d
CMXSMR_SMC2CS_BRG2	include/mpc8260.h	/^#define CMXSMR_SMC2CS_BRG2 /;"	d
CMXSMR_SMC2CS_BRG8	include/mpc8260.h	/^#define CMXSMR_SMC2CS_BRG8 /;"	d
CMXSMR_SMC2CS_CLK19	include/mpc8260.h	/^#define CMXSMR_SMC2CS_CLK19 /;"	d
CMXSMR_SMC2CS_CLK20	include/mpc8260.h	/^#define CMXSMR_SMC2CS_CLK20 /;"	d
CMXSMR_SMC2CS_MSK	include/mpc8260.h	/^#define CMXSMR_SMC2CS_MSK /;"	d
CMXSMR_VALUE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define CMXSMR_VALUE	/;"	d	file:
CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK	/;"	d
CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK	/;"	d
CM_ABE_PLL_SYS_CLKSEL_SYSCLK1	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_ABE_PLL_SYS_CLKSEL_SYSCLK1	/;"	d
CM_ABE_PLL_SYS_CLKSEL_SYSCLK2	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_ABE_PLL_SYS_CLKSEL_SYSCLK2	/;"	d
CM_ALWON_BASE	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^#define CM_ALWON_BASE /;"	d
CM_ALWON_CUST_EFUSE_CLKCTRL	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define CM_ALWON_CUST_EFUSE_CLKCTRL	/;"	d	file:
CM_BASE	include/armcoremodule.h	/^#define CM_BASE	/;"	d
CM_BYPCLK_DPLL_IVA_CLKSEL_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_BYPCLK_DPLL_IVA_CLKSEL_MASK	/;"	d
CM_BYPCLK_DPLL_IVA_CLKSEL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_BYPCLK_DPLL_IVA_CLKSEL_MASK	/;"	d
CM_BYPCLK_DPLL_IVA_CLKSEL_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_BYPCLK_DPLL_IVA_CLKSEL_SHIFT	/;"	d
CM_BYPCLK_DPLL_IVA_CLKSEL_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_BYPCLK_DPLL_IVA_CLKSEL_SHIFT	/;"	d
CM_CLKEN_PLL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CM_CLKEN_PLL	/;"	d
CM_CLKMODE_DPLL_DPLL_EN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_DPLL_EN_MASK	/;"	d
CM_CLKMODE_DPLL_DPLL_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_DPLL_EN_MASK	/;"	d
CM_CLKMODE_DPLL_DPLL_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_DPLL_EN_MASK	/;"	d
CM_CLKMODE_DPLL_DPLL_EN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_DPLL_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_DPLL_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_DPLL_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_DPLL_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_DPLL_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	/;"	d
CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	/;"	d
CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	/;"	d
CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_EN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_EN_MASK	/;"	d
CM_CLKMODE_DPLL_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_EN_MASK	/;"	d
CM_CLKMODE_DPLL_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_EN_MASK	/;"	d
CM_CLKMODE_DPLL_EN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_LPMODE_EN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_LPMODE_EN_MASK	/;"	d
CM_CLKMODE_DPLL_LPMODE_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_LPMODE_EN_MASK	/;"	d
CM_CLKMODE_DPLL_LPMODE_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_LPMODE_EN_MASK	/;"	d
CM_CLKMODE_DPLL_LPMODE_EN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_LPMODE_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_LPMODE_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_RAMP_RATE_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_RAMP_RATE_MASK	/;"	d
CM_CLKMODE_DPLL_RAMP_RATE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_RAMP_RATE_MASK	/;"	d
CM_CLKMODE_DPLL_RAMP_RATE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_RAMP_RATE_MASK	/;"	d
CM_CLKMODE_DPLL_RAMP_RATE_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT	/;"	d
CM_CLKMODE_DPLL_RAMP_RATE_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT	/;"	d
CM_CLKMODE_DPLL_RAMP_RATE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT	/;"	d
CM_CLKMODE_DPLL_REGM4XEN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_REGM4XEN_MASK	/;"	d
CM_CLKMODE_DPLL_REGM4XEN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_REGM4XEN_MASK	/;"	d
CM_CLKMODE_DPLL_REGM4XEN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_REGM4XEN_MASK	/;"	d
CM_CLKMODE_DPLL_REGM4XEN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_REGM4XEN_SHIFT	/;"	d
CM_CLKMODE_DPLL_REGM4XEN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_REGM4XEN_SHIFT	/;"	d
CM_CLKMODE_DPLL_REGM4XEN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_REGM4XEN_SHIFT	/;"	d
CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	/;"	d
CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	/;"	d
CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	/;"	d
CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_SSC_ACK_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_SSC_ACK_MASK	/;"	d
CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK	/;"	d
CM_CLKMODE_DPLL_SSC_EN_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_SSC_EN_MASK	/;"	d
CM_CLKMODE_DPLL_SSC_EN_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_SSC_EN_SHIFT	/;"	d
CM_CLKMODE_DPLL_SSC_TYPE_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKMODE_DPLL_SSC_TYPE_MASK	/;"	d
CM_CLKSEL1_EMU	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CM_CLKSEL1_EMU	/;"	d
CM_CLKSEL1_PLL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CM_CLKSEL1_PLL	/;"	d
CM_CLKSEL_ABE_PLL_SYS_CLKSEL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_ABE_PLL_SYS_CLKSEL_MASK	/;"	d
CM_CLKSEL_ABE_PLL_SYS_CLKSEL_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_ABE_PLL_SYS_CLKSEL_SHIFT	/;"	d
CM_CLKSEL_CORE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CM_CLKSEL_CORE	/;"	d
CM_CLKSEL_DCC_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DCC_EN_MASK	/;"	d
CM_CLKSEL_DCC_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DCC_EN_MASK	/;"	d
CM_CLKSEL_DCC_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DCC_EN_SHIFT	/;"	d
CM_CLKSEL_DCC_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DCC_EN_SHIFT	/;"	d
CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK	/;"	d
CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK	/;"	d
CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT	/;"	d
CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT	/;"	d
CM_CLKSEL_DPLL_M_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKSEL_DPLL_M_MASK	/;"	d
CM_CLKSEL_DPLL_M_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DPLL_M_MASK	/;"	d
CM_CLKSEL_DPLL_M_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DPLL_M_MASK	/;"	d
CM_CLKSEL_DPLL_M_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKSEL_DPLL_M_SHIFT	/;"	d
CM_CLKSEL_DPLL_M_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DPLL_M_SHIFT	/;"	d
CM_CLKSEL_DPLL_M_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DPLL_M_SHIFT	/;"	d
CM_CLKSEL_DPLL_N_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKSEL_DPLL_N_MASK	/;"	d
CM_CLKSEL_DPLL_N_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DPLL_N_MASK	/;"	d
CM_CLKSEL_DPLL_N_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DPLL_N_MASK	/;"	d
CM_CLKSEL_DPLL_N_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define CM_CLKSEL_DPLL_N_SHIFT	/;"	d
CM_CLKSEL_DPLL_N_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_CLKSEL_DPLL_N_SHIFT	/;"	d
CM_CLKSEL_DPLL_N_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_CLKSEL_DPLL_N_SHIFT	/;"	d
CM_CLKSEL_GFX	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CM_CLKSEL_GFX	/;"	d
CM_CLKSEL_WKUP	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CM_CLKSEL_WKUP	/;"	d
CM_DEFAULT_BASE	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^#define CM_DEFAULT_BASE /;"	d
CM_DEVICE	include/usb/ehci-ci.h	/^#define CM_DEVICE	/;"	d
CM_DEVICE_INST	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CM_DEVICE_INST	/;"	d
CM_DLL_CTRL_NO_OVERRIDE	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define CM_DLL_CTRL_NO_OVERRIDE	/;"	d
CM_DLL_CTRL_NO_OVERRIDE	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_DLL_CTRL_NO_OVERRIDE	/;"	d
CM_DLL_CTRL_NO_OVERRIDE	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_DLL_CTRL_NO_OVERRIDE	/;"	d
CM_DLL_CTRL_OVERRIDE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_DLL_CTRL_OVERRIDE_MASK	/;"	d
CM_DLL_CTRL_OVERRIDE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_DLL_CTRL_OVERRIDE_MASK	/;"	d
CM_DLL_CTRL_OVERRIDE_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_DLL_CTRL_OVERRIDE_SHIFT	/;"	d
CM_DLL_CTRL_OVERRIDE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_DLL_CTRL_OVERRIDE_SHIFT	/;"	d
CM_DLL_READYST	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define CM_DLL_READYST	/;"	d
CM_DPLL	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CM_DPLL	/;"	d
CM_DPLL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CM_DPLL	/;"	d
CM_FX6_DDR_IOMUX_CFG	board/compulab/cm_fx6/spl.c	/^#define CM_FX6_DDR_IOMUX_CFG /;"	d	file:
CM_FX6_ECSPI_BUS0_CS0	board/compulab/cm_fx6/common.h	/^#define CM_FX6_ECSPI_BUS0_CS0	/;"	d
CM_FX6_ENET_NRST	board/compulab/cm_fx6/common.h	/^#define CM_FX6_ENET_NRST	/;"	d
CM_FX6_GPR_IOMUX_CFG	board/compulab/cm_fx6/spl.c	/^#define CM_FX6_GPR_IOMUX_CFG /;"	d	file:
CM_FX6_GREEN_LED	board/compulab/cm_fx6/common.h	/^#define CM_FX6_GREEN_LED	/;"	d
CM_FX6_SATA_INIT_RETRIES	board/compulab/cm_fx6/cm_fx6.c	/^#define CM_FX6_SATA_INIT_RETRIES	/;"	d	file:
CM_FX6_SATA_LDO_EN	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_LDO_EN	/;"	d
CM_FX6_SATA_NRSTDLY	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_NRSTDLY	/;"	d
CM_FX6_SATA_NSTANDBY1	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_NSTANDBY1	/;"	d
CM_FX6_SATA_NSTANDBY2	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_NSTANDBY2	/;"	d
CM_FX6_SATA_PHY_SLP	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_PHY_SLP	/;"	d
CM_FX6_SATA_PWLOSS_INT	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_PWLOSS_INT	/;"	d
CM_FX6_SATA_PWREN	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_PWREN	/;"	d
CM_FX6_SATA_STBY_REQ	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_STBY_REQ	/;"	d
CM_FX6_SATA_VDDC_CTRL	board/compulab/cm_fx6/common.h	/^#define CM_FX6_SATA_VDDC_CTRL	/;"	d
CM_FX6_USB_HUB_RST	board/compulab/cm_fx6/common.h	/^#define CM_FX6_USB_HUB_RST	/;"	d
CM_HOST	include/usb/ehci-ci.h	/^#define CM_HOST	/;"	d
CM_IDLE	include/usb/ehci-ci.h	/^#define CM_IDLE	/;"	d
CM_L3INIT_HSUSBHOST_CLKCTRL	arch/arm/include/asm/arch-omap4/ehci.h	/^#define CM_L3INIT_HSUSBHOST_CLKCTRL	/;"	d
CM_PER	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CM_PER	/;"	d
CM_PER	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define	CM_PER	/;"	d
CM_PER	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define CM_PER	/;"	d
CM_PHY_OTG_PWRDN	arch/arm/cpu/armv7/am33xx/board.c	/^#define CM_PHY_OTG_PWRDN	/;"	d	file:
CM_PHY_PWRDN	arch/arm/cpu/armv7/am33xx/board.c	/^#define CM_PHY_PWRDN	/;"	d	file:
CM_PLL_BASE	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define CM_PLL_BASE	/;"	d	file:
CM_RESERVED	include/usb/ehci-ci.h	/^#define CM_RESERVED	/;"	d
CM_RTC	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CM_RTC	/;"	d
CM_RTC	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CM_RTC	/;"	d
CM_SYSCLK10_CLKSEL	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define CM_SYSCLK10_CLKSEL	/;"	d	file:
CM_SYS_CLKSEL_SYS_CLKSEL_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK /;"	d
CM_SYS_CLKSEL_SYS_CLKSEL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK /;"	d
CM_T3517_USB_HUB_RESET_GPIO	board/compulab/cm_t3517/cm_t3517.c	/^#define CM_T3517_USB_HUB_RESET_GPIO	/;"	d	file:
CM_T3X_SMC911X_BASE	include/configs/cm_t35.h	/^#define CM_T3X_SMC911X_BASE	/;"	d
CM_TIMER1_CLKSEL	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define CM_TIMER1_CLKSEL	/;"	d	file:
CM_WKUP	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CM_WKUP	/;"	d
CM_WKUP	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define	CM_WKUP	/;"	d
CM_WKUP	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define CM_WKUP	/;"	d
CN	include/i8042.h	/^#define CN	/;"	d
CNDCR	drivers/net/sh_eth.h	/^	CNDCR,$/;"	e	enum:__anon5ef54f5a0103
CNF1_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  CNF1_LPC_EN	/;"	d
CNF2_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  CNF2_LPC_EN	/;"	d
CNT0DG_EN	board/bf609-ezkit/soft_switch.h	/^#define CNT0DG_EN /;"	d
CNT0UD_EN	board/bf609-ezkit/soft_switch.h	/^#define CNT0UD_EN /;"	d
CNT0ZM_EN	board/bf609-ezkit/soft_switch.h	/^#define CNT0ZM_EN /;"	d
CNT0_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_COMMAND /;"	d
CNT0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_CONFIG /;"	d
CNT0_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_COUNTER /;"	d
CNT0_DEBOUNCE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_DEBOUNCE /;"	d
CNT0_IMASK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_IMASK /;"	d
CNT0_MAX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_MAX /;"	d
CNT0_MIN	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_MIN /;"	d
CNT0_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT0_STATUS /;"	d
CNT1_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_COMMAND /;"	d
CNT1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_CONFIG /;"	d
CNT1_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_COUNTER /;"	d
CNT1_DEBOUNCE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_DEBOUNCE /;"	d
CNT1_IMASK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_IMASK /;"	d
CNT1_MAX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_MAX /;"	d
CNT1_MIN	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_MIN /;"	d
CNT1_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define CNT1_STATUS /;"	d
CNTCR	arch/arm/mach-uniphier/arm64/timer.c	/^#define CNTCR	/;"	d	file:
CNTCR_EN	arch/arm/mach-uniphier/arm64/timer.c	/^#define   CNTCR_EN	/;"	d	file:
CNTMR_CTRL_REG	arch/arm/mach-orion5x/timer.c	/^#define CNTMR_CTRL_REG	/;"	d	file:
CNTMR_CTRL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CNTMR_CTRL_REG(/;"	d
CNTMR_RELOAD_REG	arch/arm/mach-orion5x/timer.c	/^#define CNTMR_RELOAD_REG(/;"	d	file:
CNTMR_RELOAD_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CNTMR_RELOAD_REG(/;"	d
CNTMR_VAL_REG	arch/arm/mach-orion5x/timer.c	/^#define CNTMR_VAL_REG(/;"	d	file:
CNTMR_VAL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CNTMR_VAL_REG(/;"	d
CNTR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CNTR(/;"	d
CNTRL_DCR_BASE	arch/powerpc/include/asm/ppc440gp.h	/^#define CNTRL_DCR_BASE	/;"	d
CNTRL_PUP_DESKEW	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define CNTRL_PUP_DESKEW /;"	d
CNTR_CNT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CNTR_CNT(/;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_COMMAND /;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_COMMAND /;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_COMMAND /;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_COMMAND /;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_COMMAND /;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_COMMAND /;"	d
CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_COMMAND /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_CONFIG /;"	d
CNT_CONTROL_BASE	arch/arm/mach-uniphier/arm64/timer.c	/^#define CNT_CONTROL_BASE	/;"	d	file:
CNT_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_COUNTER /;"	d
CNT_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_COUNTER /;"	d
CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_COUNTER /;"	d
CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_COUNTER /;"	d
CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_COUNTER /;"	d
CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_COUNTER /;"	d
CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_COUNTER /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_DEBOUNCE /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_IMASK /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_IMASK /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_IMASK /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_IMASK /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_IMASK /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_IMASK /;"	d
CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_IMASK /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_MAX /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_MAX /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_MAX /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_MAX /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_MAX /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_MAX /;"	d
CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_MAX /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_MIN /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_MIN /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_MIN /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_MIN /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_MIN /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_MIN /;"	d
CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_MIN /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define CNT_STATUS /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define CNT_STATUS /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define CNT_STATUS /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define CNT_STATUS /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define CNT_STATUS /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define CNT_STATUS /;"	d
CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define CNT_STATUS /;"	d
COALESCE_HIGH	drivers/usb/eth/r8152.h	/^#define COALESCE_HIGH	/;"	d
COALESCE_SLOW	drivers/usb/eth/r8152.h	/^#define COALESCE_SLOW	/;"	d
COALESCE_SUPER	drivers/usb/eth/r8152.h	/^#define COALESCE_SUPER	/;"	d
COBJS	examples/standalone/Makefile	/^COBJS	:= $(ELF:=.o)$/;"	m
CODEC_MAX	include/sound.h	/^	CODEC_MAX$/;"	e	enum:en_sound_codec
CODEC_MAX_98095	include/sound.h	/^	CODEC_MAX_98095,$/;"	e	enum:en_sound_codec
CODEC_WM_8994	include/sound.h	/^	CODEC_WM_8994,$/;"	e	enum:en_sound_codec
CODEC_WM_8995	include/sound.h	/^	CODEC_WM_8995,$/;"	e	enum:en_sound_codec
CODELENS	lib/zlib/inflate.h	/^        CODELENS,   \/* i: waiting for length\/lit and distance code lengths *\/$/;"	e	enum:__anon43d5a4c40103
CODES	lib/zlib/inftrees.h	/^    CODES,$/;"	e	enum:__anon4cf584e10203
CODE_NOT_FOUND	include/jffs2/mini_inflate.h	/^#define CODE_NOT_FOUND /;"	d
CODE_SDQCR_DQSRC	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define CODE_SDQCR_DQSRC(/;"	d	file:
CODE_SEG	arch/x86/cpu/sipi_vector.S	/^#define CODE_SEG	/;"	d	file:
CODFIG_CMD_PCI	include/configs/jupiter.h	/^#define CODFIG_CMD_PCI$/;"	d
COE_CR	drivers/usb/eth/smsc95xx.c	/^#define COE_CR	/;"	d	file:
COINCHEN	include/fsl_pmic.h	/^#define COINCHEN	/;"	d
COLIBRI_IMX7_EXT_PHYCLK	board/toradex/colibri_imx7/Kconfig	/^config COLIBRI_IMX7_EXT_PHYCLK$/;"	c
COLLCONF	drivers/net/ethoc.c	/^#define	COLLCONF	/;"	d	file:
COLORBAR_32	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLORBAR_32,$/;"	e	enum:pattern_type
COLORBAR_64	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLORBAR_64,$/;"	e	enum:pattern_type
COLOR_10	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	COLOR_10,$/;"	e	enum:color_depth
COLOR_10	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_10,$/;"	e	enum:__anon79d8640c0503
COLOR_12	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	COLOR_12$/;"	e	enum:color_depth
COLOR_12	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_12$/;"	e	enum:__anon79d8640c0503
COLOR_6	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	COLOR_6,$/;"	e	enum:color_depth
COLOR_6	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_6,$/;"	e	enum:__anon79d8640c0503
COLOR_8	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	COLOR_8,$/;"	e	enum:color_depth
COLOR_8	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_8,$/;"	e	enum:__anon79d8640c0503
COLOR_ACTIVE	drivers/video/da8xx-fb.h	/^	COLOR_ACTIVE,$/;"	e	enum:panel_shade
COLOR_ALWAYS	tools/patman/terminal.py	/^COLOR_IF_TERMINAL, COLOR_ALWAYS, COLOR_NEVER = range(3)$/;"	v
COLOR_BLACK	tools/moveconfig.py	/^COLOR_BLACK        = '0;30'$/;"	v
COLOR_BLUE	tools/moveconfig.py	/^COLOR_BLUE         = '0;34'$/;"	v
COLOR_BROWN	tools/moveconfig.py	/^COLOR_BROWN        = '0;33'$/;"	v
COLOR_CYAN	tools/moveconfig.py	/^COLOR_CYAN         = '0;36'$/;"	v
COLOR_DARK_GRAY	tools/moveconfig.py	/^COLOR_DARK_GRAY    = '1;30'$/;"	v
COLOR_DEPTH_AB5G5R5	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_AB5G5R5,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_B4G4R4A4	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_B4G4R4A4,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_B5G5R5A	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_B5G5R5A,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_B5G6R5	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_B5G6R5,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_B6x2G6x2R6x2A8	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_B6x2G6x2R6x2A8,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_B8G8R8A8	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_B8G8R8A8 = 12,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_P1	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_P1,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_P2	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_P2,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_P4	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_P4,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_P8	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_P8,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_R6x2G6x2B6x2A8	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_R6x2G6x2B6x2A8,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_R8G8B8A8	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_R8G8B8A8,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YCbCr420P	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YCbCr420P,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YCbCr422	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YCbCr422,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YCbCr422P	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YCbCr422P,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YCbCr422R	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YCbCr422R,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YCbCr422RA	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YCbCr422RA,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YUV420P	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YUV420P,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YUV422	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YUV422,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YUV422P	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YUV422P,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YUV422R	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YUV422R,$/;"	e	enum:win_color_depth_id
COLOR_DEPTH_YUV422RA	arch/arm/include/asm/arch-tegra/dc.h	/^	COLOR_DEPTH_YUV422RA,$/;"	e	enum:win_color_depth_id
COLOR_EXPAND	arch/arm/include/asm/arch-tegra/dc.h	/^#define COLOR_EXPAND	/;"	d
COLOR_GREEN	tools/moveconfig.py	/^COLOR_GREEN        = '0;32'$/;"	v
COLOR_IF_TERMINAL	tools/patman/terminal.py	/^COLOR_IF_TERMINAL, COLOR_ALWAYS, COLOR_NEVER = range(3)$/;"	v
COLOR_LIGHT_BLUE	tools/moveconfig.py	/^COLOR_LIGHT_BLUE   = '1;34'$/;"	v
COLOR_LIGHT_CYAN	tools/moveconfig.py	/^COLOR_LIGHT_CYAN   = '1;36'$/;"	v
COLOR_LIGHT_GRAY	tools/moveconfig.py	/^COLOR_LIGHT_GRAY   = '0;37'$/;"	v
COLOR_LIGHT_GREEN	tools/moveconfig.py	/^COLOR_LIGHT_GREEN  = '1;32'$/;"	v
COLOR_LIGHT_PURPLE	tools/moveconfig.py	/^COLOR_LIGHT_PURPLE = '1;35'$/;"	v
COLOR_LIGHT_RED	tools/moveconfig.py	/^COLOR_LIGHT_RED    = '1;31'$/;"	v
COLOR_NEVER	tools/patman/terminal.py	/^COLOR_IF_TERMINAL, COLOR_ALWAYS, COLOR_NEVER = range(3)$/;"	v
COLOR_PASSIVE	drivers/video/da8xx-fb.h	/^	COLOR_PASSIVE,$/;"	e	enum:panel_shade
COLOR_PURPLE	tools/moveconfig.py	/^COLOR_PURPLE       = '0;35'$/;"	v
COLOR_RAMP	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_RAMP,$/;"	e	enum:pattern_type
COLOR_RED	tools/moveconfig.py	/^COLOR_RED          = '0;31'$/;"	v
COLOR_RGB	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_RGB,$/;"	e	enum:__anon79d8640c0203
COLOR_SQUARE	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_SQUARE,$/;"	e	enum:pattern_type
COLOR_WHITE	tools/moveconfig.py	/^COLOR_WHITE        = '1;37'$/;"	v
COLOR_YCBCR422	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_YCBCR422,$/;"	e	enum:__anon79d8640c0203
COLOR_YCBCR444	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_YCBCR444$/;"	e	enum:__anon79d8640c0203
COLOR_YCBCR601	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	COLOR_YCBCR601,$/;"	e	enum:color_coefficient
COLOR_YCBCR601	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_YCBCR601,$/;"	e	enum:__anon79d8640c0403
COLOR_YCBCR709	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	COLOR_YCBCR709$/;"	e	enum:color_coefficient
COLOR_YCBCR709	arch/arm/mach-exynos/include/mach/dp_info.h	/^	COLOR_YCBCR709$/;"	e	enum:__anon79d8640c0403
COLOR_YELLOW	tools/moveconfig.py	/^COLOR_YELLOW       = '1;33'$/;"	v
COLPOS	drivers/mtd/nand/mxc_nand.c	/^#define COLPOS(/;"	d	file:
COLUMN_SIZE	board/freescale/mx28evk/iomux.c	/^#define COLUMN_SIZE	/;"	d	file:
COL_10	arch/arm/include/asm/emif.h	/^#define COL_10 /;"	d
COL_11	arch/arm/include/asm/emif.h	/^#define COL_11 /;"	d
COL_7	arch/arm/include/asm/emif.h	/^#define COL_7 /;"	d
COL_8	arch/arm/include/asm/emif.h	/^#define COL_8 /;"	d
COL_9	arch/arm/include/asm/emif.h	/^#define COL_9 /;"	d
COL_ADDR_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define COL_ADDR_MASK	/;"	d	file:
COL_ADDR_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define COL_ADDR_SHIFT	/;"	d	file:
COL_BITS	drivers/ddr/microchip/ddr2_timing.h	/^#define COL_BITS	/;"	d
COL_BLACK	tools/fdtgrep.c	/^	COL_BLACK,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_BLUE	tools/fdtgrep.c	/^	COL_BLUE,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_BTNACT	scripts/kconfig/gconf.c	/^	COL_PIXVIS, COL_BTNVIS, COL_BTNACT, COL_BTNINC, COL_BTNRAD,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_BTNINC	scripts/kconfig/gconf.c	/^	COL_PIXVIS, COL_BTNVIS, COL_BTNACT, COL_BTNINC, COL_BTNRAD,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_BTNRAD	scripts/kconfig/gconf.c	/^	COL_PIXVIS, COL_BTNVIS, COL_BTNACT, COL_BTNINC, COL_BTNRAD,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_BTNVIS	scripts/kconfig/gconf.c	/^	COL_PIXVIS, COL_BTNVIS, COL_BTNACT, COL_BTNINC, COL_BTNRAD,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_COLOR	scripts/kconfig/gconf.c	/^	COL_MENU, COL_COLOR, COL_EDIT, COL_PIXBUF,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_CYAN	tools/fdtgrep.c	/^	COL_CYAN,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_EDIT	scripts/kconfig/gconf.c	/^	COL_MENU, COL_COLOR, COL_EDIT, COL_PIXBUF,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_GREEN	tools/fdtgrep.c	/^	COL_GREEN,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_HI_MASK	drivers/ddr/microchip/ddr2_timing.h	/^#define COL_HI_MASK	/;"	d
COL_HI_RSHFT	drivers/ddr/microchip/ddr2_timing.h	/^#define COL_HI_RSHFT	/;"	d
COL_LO_MASK	drivers/ddr/microchip/ddr2_timing.h	/^#define COL_LO_MASK	/;"	d
COL_MAGENTA	tools/fdtgrep.c	/^	COL_MAGENTA,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_MENU	scripts/kconfig/gconf.c	/^	COL_MENU, COL_COLOR, COL_EDIT, COL_PIXBUF,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_MOD	scripts/kconfig/gconf.c	/^	COL_OPTION, COL_NAME, COL_NO, COL_MOD, COL_YES, COL_VALUE,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_NAME	scripts/kconfig/gconf.c	/^	COL_OPTION, COL_NAME, COL_NO, COL_MOD, COL_YES, COL_VALUE,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_NO	scripts/kconfig/gconf.c	/^	COL_OPTION, COL_NAME, COL_NO, COL_MOD, COL_YES, COL_VALUE,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_NONE	tools/fdtgrep.c	/^	COL_NONE = -1,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_NUMBER	scripts/kconfig/gconf.c	/^	COL_NUMBER$/;"	e	enum:__anon51b0ba2a0303	file:
COL_OPTION	scripts/kconfig/gconf.c	/^	COL_OPTION, COL_NAME, COL_NO, COL_MOD, COL_YES, COL_VALUE,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_PIXBUF	scripts/kconfig/gconf.c	/^	COL_MENU, COL_COLOR, COL_EDIT, COL_PIXBUF,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_PIXVIS	scripts/kconfig/gconf.c	/^	COL_PIXVIS, COL_BTNVIS, COL_BTNACT, COL_BTNINC, COL_BTNRAD,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_RED	tools/fdtgrep.c	/^	COL_RED,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_VALUE	scripts/kconfig/gconf.c	/^	COL_OPTION, COL_NAME, COL_NO, COL_MOD, COL_YES, COL_VALUE,$/;"	e	enum:__anon51b0ba2a0303	file:
COL_WHITE	tools/fdtgrep.c	/^	COL_WHITE,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_YELLOW	tools/fdtgrep.c	/^	COL_YELLOW,$/;"	e	enum:__anon8b0dbcc20103	file:
COL_YES	scripts/kconfig/gconf.c	/^	COL_OPTION, COL_NAME, COL_NO, COL_MOD, COL_YES, COL_VALUE,$/;"	e	enum:__anon51b0ba2a0303	file:
COMA_DEC_RANGE	arch/x86/include/asm/lpc_common.h	/^#define  COMA_DEC_RANGE	/;"	d
COMA_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  COMA_LPC_EN	/;"	d
COMBO_DDR	arch/arm/include/asm/arch-omap3/mem.h	/^	COMBO_DDR = 2,$/;"	e	enum:__anonba94f5130103
COMB_DEC_RANGE	arch/x86/include/asm/lpc_common.h	/^#define  COMB_DEC_RANGE	/;"	d
COMB_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  COMB_LPC_EN	/;"	d
COMMAND	cmd/fdc.c	/^#define COMMAND	/;"	d	file:
COMMAND	include/radeon.h	/^#define COMMAND	/;"	d
COMMAND	scripts/kconfig/zconf.l	/^%x COMMAND HELP STRING PARAM$/;"	c
COMMAND	scripts/kconfig/zconf.lex.c	/^#define COMMAND /;"	d	file:
COMMAND_0	drivers/mtd/nand/tegra_nand.h	/^#define COMMAND_0	/;"	d
COMMAND_BUFFER_SIZE	lib/tpm.c	/^	COMMAND_BUFFER_SIZE		= 256,$/;"	e	enum:__anoneb7c99ad0103	file:
COMMAND_CYCLE	drivers/mtd/nand/denali.c	/^#define COMMAND_CYCLE	/;"	d	file:
COMMAND_FULL_DUPLEX	drivers/net/lpc32xx_eth.c	/^#define COMMAND_FULL_DUPLEX /;"	d	file:
COMMAND_LINE	arch/sh/include/asm/zimage.h	/^#define COMMAND_LINE	/;"	d
COMMAND_LINE_MAGIC	arch/x86/include/asm/zimage.h	/^#define COMMAND_LINE_MAGIC /;"	d
COMMAND_LINE_OFFSET	arch/x86/lib/bootm.c	/^#define COMMAND_LINE_OFFSET /;"	d	file:
COMMAND_LINE_OFFSET	arch/x86/lib/zimage.c	/^#define COMMAND_LINE_OFFSET	/;"	d	file:
COMMAND_LINE_SIZE	arch/arm/include/asm/setup.h	/^#define COMMAND_LINE_SIZE /;"	d
COMMAND_LINE_SIZE	arch/avr32/include/asm/setup.h	/^#define COMMAND_LINE_SIZE /;"	d
COMMAND_LINE_SIZE	arch/nds32/include/asm/setup.h	/^#define COMMAND_LINE_SIZE /;"	d
COMMAND_LINE_SIZE	arch/x86/lib/zimage.c	/^#define COMMAND_LINE_SIZE	/;"	d	file:
COMMAND_PASSRUNTFRAME	drivers/net/lpc32xx_eth.c	/^#define COMMAND_PASSRUNTFRAME /;"	d	file:
COMMAND_REG	drivers/net/phy/mv88e6352.c	/^#define COMMAND_REG	/;"	d	file:
COMMAND_REG_DELAY	drivers/mmc/arm_pl180_mmci.h	/^#define COMMAND_REG_DELAY	/;"	d
COMMAND_RESETS	drivers/net/lpc32xx_eth.c	/^#define COMMAND_RESETS /;"	d	file:
COMMAND_RMII	drivers/net/lpc32xx_eth.c	/^#define COMMAND_RMII /;"	d	file:
COMMAND_RXENABLE	drivers/net/lpc32xx_eth.c	/^#define COMMAND_RXENABLE /;"	d	file:
COMMAND_TXENABLE	drivers/net/lpc32xx_eth.c	/^#define COMMAND_TXENABLE /;"	d	file:
COMMENT	include/lattice.h	/^#define COMMENT	/;"	d
COMMENT	include/linux/kbuild.h	/^#define COMMENT(/;"	d
COMMENT	lib/gunzip.c	/^#define COMMENT	/;"	d	file:
COMMENT	lib/zlib/inflate.h	/^    COMMENT,    \/* i: waiting for end of comment (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
COMMENT_BLOCK	tools/genboardscfg.py	/^COMMENT_BLOCK = '''#$/;"	v
COMMENT_STATE	lib/zlib/deflate.h	/^#define COMMENT_STATE /;"	d
COMMIT_BACKGROUND	fs/ubifs/ubifs.h	/^	COMMIT_BACKGROUND,$/;"	e	enum:__anonf648d0840703
COMMIT_BROKEN	fs/ubifs/ubifs.h	/^	COMMIT_BROKEN,$/;"	e	enum:__anonf648d0840703
COMMIT_REQUIRED	fs/ubifs/ubifs.h	/^	COMMIT_REQUIRED,$/;"	e	enum:__anonf648d0840703
COMMIT_RESTING	fs/ubifs/ubifs.h	/^	COMMIT_RESTING = 0,$/;"	e	enum:__anonf648d0840703
COMMIT_RUNNING_BACKGROUND	fs/ubifs/ubifs.h	/^	COMMIT_RUNNING_BACKGROUND,$/;"	e	enum:__anonf648d0840703
COMMIT_RUNNING_REQUIRED	fs/ubifs/ubifs.h	/^	COMMIT_RUNNING_REQUIRED,$/;"	e	enum:__anonf648d0840703
COMMON_ENV_DFU_ARGS	include/configs/etamin.h	/^#define COMMON_ENV_DFU_ARGS	/;"	d
COMMON_ENV_DFU_ARGS	include/configs/siemens-am33x-common.h	/^#define COMMON_ENV_DFU_ARGS	/;"	d
COMMON_ENV_NAND_BOOT	include/configs/siemens-am33x-common.h	/^#define COMMON_ENV_NAND_BOOT /;"	d
COMMON_ENV_NAND_CMDS	include/configs/siemens-am33x-common.h	/^#define COMMON_ENV_NAND_CMDS	/;"	d
COMMON_ENV_SETTINGS	include/configs/siemens-am33x-common.h	/^#define COMMON_ENV_SETTINGS /;"	d
COMMON_INS	arch/blackfin/lib/ins.S	/^#define COMMON_INS(/;"	d	file:
COMMON_INT_MASK_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define COMMON_INT_MASK_1	/;"	d
COMMON_INT_MASK_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define COMMON_INT_MASK_2	/;"	d
COMMON_INT_MASK_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define COMMON_INT_MASK_3	/;"	d
COMMON_INT_MASK_4	arch/arm/mach-exynos/include/mach/dp.h	/^#define COMMON_INT_MASK_4	/;"	d
COMMON_ON_N0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define COMMON_ON_N0 /;"	d
COMMON_ON_N1	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define COMMON_ON_N1 /;"	d
COMMON_PHYS_SELECTORS_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define COMMON_PHYS_SELECTORS_REG	/;"	d
COMMON_PHY_BASE_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define COMMON_PHY_BASE_ADDR	/;"	d
COMMON_PHY_CFG1_CORE_RSTN_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_CORE_RSTN_MASK	/;"	d
COMMON_PHY_CFG1_CORE_RSTN_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_CORE_RSTN_OFFSET	/;"	d
COMMON_PHY_CFG1_PIPE_SELECT_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_PIPE_SELECT_MASK	/;"	d
COMMON_PHY_CFG1_PIPE_SELECT_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_PIPE_SELECT_OFFSET	/;"	d
COMMON_PHY_CFG1_PWR_ON_RESET_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_PWR_ON_RESET_MASK	/;"	d
COMMON_PHY_CFG1_PWR_ON_RESET_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_PWR_ON_RESET_OFFSET	/;"	d
COMMON_PHY_CFG1_PWR_UP_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_PWR_UP_MASK	/;"	d
COMMON_PHY_CFG1_PWR_UP_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_PWR_UP_OFFSET	/;"	d
COMMON_PHY_CFG1_REG	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG1_REG	/;"	d
COMMON_PHY_CFG6_IF_40_SEL_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG6_IF_40_SEL_MASK	/;"	d
COMMON_PHY_CFG6_IF_40_SEL_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG6_IF_40_SEL_OFFSET	/;"	d
COMMON_PHY_CFG6_REG	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_CFG6_REG	/;"	d
COMMON_PHY_CONFIGURATION1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define COMMON_PHY_CONFIGURATION1_REG	/;"	d
COMMON_PHY_CONFIGURATION2_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define COMMON_PHY_CONFIGURATION2_REG	/;"	d
COMMON_PHY_CONFIGURATION4_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define COMMON_PHY_CONFIGURATION4_REG	/;"	d
COMMON_PHY_PHY_MODE_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_PHY_MODE_MASK	/;"	d
COMMON_PHY_PHY_MODE_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_PHY_MODE_OFFSET	/;"	d
COMMON_PHY_SD_CTRL1	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1	/;"	d
COMMON_PHY_SD_CTRL1_COMPHY_0_4_PORT_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_COMPHY_0_4_PORT_MASK	/;"	d
COMMON_PHY_SD_CTRL1_COMPHY_0_4_PORT_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_COMPHY_0_4_PORT_OFFSET	/;"	d
COMMON_PHY_SD_CTRL1_PCIE_X2_EN_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_PCIE_X2_EN_MASK	/;"	d
COMMON_PHY_SD_CTRL1_PCIE_X2_EN_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_PCIE_X2_EN_OFFSET	/;"	d
COMMON_PHY_SD_CTRL1_PCIE_X4_EN_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_PCIE_X4_EN_MASK	/;"	d
COMMON_PHY_SD_CTRL1_PCIE_X4_EN_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_PCIE_X4_EN_OFFSET	/;"	d
COMMON_PHY_SD_CTRL1_RXAUI0_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_RXAUI0_MASK	/;"	d
COMMON_PHY_SD_CTRL1_RXAUI0_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_RXAUI0_OFFSET	/;"	d
COMMON_PHY_SD_CTRL1_RXAUI1_MASK	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_RXAUI1_MASK	/;"	d
COMMON_PHY_SD_CTRL1_RXAUI1_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_PHY_SD_CTRL1_RXAUI1_OFFSET	/;"	d
COMMON_PHY_STATUS1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define COMMON_PHY_STATUS1_REG	/;"	d
COMMON_SELECTOR_PHY_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_SELECTOR_PHY_OFFSET	/;"	d
COMMON_SELECTOR_PIPE_OFFSET	drivers/phy/marvell/comphy.h	/^#define COMMON_SELECTOR_PIPE_OFFSET	/;"	d
COMMON_TIMING	drivers/ddr/fsl/interactive.c	/^#define COMMON_TIMING(/;"	d	file:
COMMON_TIMING_PARAMS_H	include/common_timing_params.h	/^#define COMMON_TIMING_PARAMS_H$/;"	d
COMMUNICATIONS_ACM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_ACM_SUBCLASS	/;"	d
COMMUNICATIONS_ANCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_ANCM_SUBCLASS	/;"	d
COMMUNICATIONS_CCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_CCM_SUBCLASS	/;"	d
COMMUNICATIONS_DEVICE_CLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_DEVICE_CLASS	/;"	d
COMMUNICATIONS_DLCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_DLCM_SUBCLASS	/;"	d
COMMUNICATIONS_DMM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_DMM_SUBCLASS	/;"	d
COMMUNICATIONS_ENCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_ENCM_SUBCLASS	/;"	d
COMMUNICATIONS_INTERFACE_CLASS_CONTROL	include/usbdescriptors.h	/^#define COMMUNICATIONS_INTERFACE_CLASS_CONTROL	/;"	d
COMMUNICATIONS_INTERFACE_CLASS_DATA	include/usbdescriptors.h	/^#define COMMUNICATIONS_INTERFACE_CLASS_DATA	/;"	d
COMMUNICATIONS_INTERFACE_CLASS_VENDOR	include/usbdescriptors.h	/^#define COMMUNICATIONS_INTERFACE_CLASS_VENDOR	/;"	d
COMMUNICATIONS_MCCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_MCCM_SUBCLASS	/;"	d
COMMUNICATIONS_MDLM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_MDLM_SUBCLASS	/;"	d
COMMUNICATIONS_NO_PROTOCOL	include/usbdescriptors.h	/^#define COMMUNICATIONS_NO_PROTOCOL	/;"	d
COMMUNICATIONS_NO_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_NO_SUBCLASS	/;"	d
COMMUNICATIONS_OBEX_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_OBEX_SUBCLASS	/;"	d
COMMUNICATIONS_TCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_TCM_SUBCLASS	/;"	d
COMMUNICATIONS_V25TER_PROTOCOL	include/usbdescriptors.h	/^#define COMMUNICATIONS_V25TER_PROTOCOL	/;"	d
COMMUNICATIONS_WHCM_SUBCLASS	include/usbdescriptors.h	/^#define COMMUNICATIONS_WHCM_SUBCLASS	/;"	d
COMM_DIR_NONE	include/fsl_qe.h	/^	COMM_DIR_NONE		= 0,$/;"	e	enum:comm_dir
COMM_DIR_RX	include/fsl_qe.h	/^	COMM_DIR_RX		= 1,$/;"	e	enum:comm_dir
COMM_DIR_RX_AND_TX	include/fsl_qe.h	/^	COMM_DIR_RX_AND_TX	= 3$/;"	e	enum:comm_dir
COMM_DIR_TX	include/fsl_qe.h	/^	COMM_DIR_TX		= 2,$/;"	e	enum:comm_dir
COMPARE_ADDR	cmd/i2c.c	/^#define COMPARE_ADDR(/;"	d	file:
COMPARE_BUS	cmd/i2c.c	/^#define COMPARE_BUS(/;"	d	file:
COMPARE_DESTINATION	include/radeon.h	/^#define COMPARE_DESTINATION	/;"	d
COMPARE_DST_EQUAL	include/radeon.h	/^#define COMPARE_DST_EQUAL	/;"	d
COMPARE_DST_FALSE	include/radeon.h	/^#define COMPARE_DST_FALSE	/;"	d
COMPARE_DST_NOT_EQUAL	include/radeon.h	/^#define COMPARE_DST_NOT_EQUAL	/;"	d
COMPARE_DST_TRUE	include/radeon.h	/^#define COMPARE_DST_TRUE	/;"	d
COMPARE_SOURCE	include/radeon.h	/^#define COMPARE_SOURCE	/;"	d
COMPARE_SRC_AND_DST	include/radeon.h	/^#define COMPARE_SRC_AND_DST	/;"	d
COMPARE_SRC_EQUAL	include/radeon.h	/^#define COMPARE_SRC_EQUAL	/;"	d
COMPARE_SRC_EQUAL_FLIP	include/radeon.h	/^#define COMPARE_SRC_EQUAL_FLIP	/;"	d
COMPARE_SRC_FALSE	include/radeon.h	/^#define COMPARE_SRC_FALSE	/;"	d
COMPARE_SRC_NOT_EQUAL	include/radeon.h	/^#define COMPARE_SRC_NOT_EQUAL	/;"	d
COMPARE_SRC_TRUE	include/radeon.h	/^#define COMPARE_SRC_TRUE	/;"	d
COMPAT	lib/fdtdec.c	/^#define COMPAT(/;"	d	file:
COMPAT_ALTERA_SOCFPGA_DWC2USB	include/fdtdec.h	/^	COMPAT_ALTERA_SOCFPGA_DWC2USB,	\/* SoCFPGA DWC2 USB controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_ALTERA_SOCFPGA_DWMAC	include/fdtdec.h	/^	COMPAT_ALTERA_SOCFPGA_DWMAC,	\/* SoCFPGA Ethernet controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_ALTERA_SOCFPGA_DWMMC	include/fdtdec.h	/^	COMPAT_ALTERA_SOCFPGA_DWMMC,	\/* SoCFPGA DWMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_AMS_AS3722	include/fdtdec.h	/^	COMPAT_AMS_AS3722,		\/* AMS AS3722 PMIC *\/$/;"	e	enum:fdt_compat_id
COMPAT_COUNT	include/fdtdec.h	/^	COMPAT_COUNT,$/;"	e	enum:fdt_compat_id
COMPAT_GENERIC_SPI_FLASH	include/fdtdec.h	/^	COMPAT_GENERIC_SPI_FLASH,	\/* Generic SPI Flash chip *\/$/;"	e	enum:fdt_compat_id
COMPAT_INTEL_BAYTRAIL_FSP	include/fdtdec.h	/^	COMPAT_INTEL_BAYTRAIL_FSP,	\/* Intel Bay Trail FSP *\/$/;"	e	enum:fdt_compat_id
COMPAT_INTEL_BAYTRAIL_FSP_MDP	include/fdtdec.h	/^	COMPAT_INTEL_BAYTRAIL_FSP_MDP,	\/* Intel FSP memory-down params *\/$/;"	e	enum:fdt_compat_id
COMPAT_INTEL_IVYBRIDGE_FSP	include/fdtdec.h	/^	COMPAT_INTEL_IVYBRIDGE_FSP,	\/* Intel Ivy Bridge FSP *\/$/;"	e	enum:fdt_compat_id
COMPAT_INTEL_MICROCODE	include/fdtdec.h	/^	COMPAT_INTEL_MICROCODE,		\/* Intel microcode update *\/$/;"	e	enum:fdt_compat_id
COMPAT_INTEL_QRK_MRC	include/fdtdec.h	/^	COMPAT_INTEL_QRK_MRC,		\/* Intel Quark MRC *\/$/;"	e	enum:fdt_compat_id
COMPAT_K1BASE32	arch/mips/include/asm/addrspace.h	/^#define COMPAT_K1BASE32	/;"	d
COMPAT_MAXIM_98095_CODEC	include/fdtdec.h	/^	COMPAT_MAXIM_98095_CODEC,	\/* MAX98095 Codec *\/$/;"	e	enum:fdt_compat_id
COMPAT_MAXIM_MAX77686_PMIC	include/fdtdec.h	/^	COMPAT_MAXIM_MAX77686_PMIC,	\/* MAX77686 PMIC *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA124_PMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA124_PMC,	\/* Tegra 124 power mgmt controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA124_SDMMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA124_SDMMC,	\/* Tegra124 SDMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA186_SDMMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA186_SDMMC,	\/* Tegra186 SDMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA20_EMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA20_EMC,	\/* Tegra20 memory controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA20_EMC_TABLE	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA20_EMC_TABLE, \/* Tegra20 memory timing table *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA20_NAND	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA20_NAND,	\/* Tegra2 NAND controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA20_SDMMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA20_SDMMC,	\/* Tegra20 SDMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA210_SDMMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA210_SDMMC,	\/* Tegra210 SDMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,$/;"	e	enum:fdt_compat_id
COMPAT_NVIDIA_TEGRA30_SDMMC	include/fdtdec.h	/^	COMPAT_NVIDIA_TEGRA30_SDMMC,	\/* Tegra30 SDMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS5_I2C	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS5_I2C,	\/* Exynos5 High Speed I2C Controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS5_SOUND	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS5_SOUND,	\/* Exynos Sound *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS5_SROMC	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS5_SROMC,	\/* Exynos5 SROMC *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS5_USB3_PHY	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,\/* Exynos phy controller for usb3.0 *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS_DWMMC	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS_DWMMC,	\/* Exynos DWMMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS_MIPI_DSI	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS_MIPI_DSI,	\/* Exynos mipi dsi *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS_MMC	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS_MMC,	\/* Exynos MMC controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS_SYSMMU	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS_SYSMMU,	\/* Exynos sysmmu *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS_TMU	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS_TMU,	\/* Exynos TMU *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_EXYNOS_USB_PHY	include/fdtdec.h	/^	COMPAT_SAMSUNG_EXYNOS_USB_PHY,	\/* Exynos phy controller for usb2.0 *\/$/;"	e	enum:fdt_compat_id
COMPAT_SAMSUNG_S3C2440_I2C	include/fdtdec.h	/^	COMPAT_SAMSUNG_S3C2440_I2C,	\/* Exynos I2C Controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_SMSC_LAN9215	include/fdtdec.h	/^	COMPAT_SMSC_LAN9215,		\/* SMSC 10\/100 Ethernet LAN9215 *\/$/;"	e	enum:fdt_compat_id
COMPAT_SUNXI_NAND	include/fdtdec.h	/^	COMPAT_SUNXI_NAND,		\/* SUNXI NAND controller *\/$/;"	e	enum:fdt_compat_id
COMPAT_UNKNOWN	include/fdtdec.h	/^	COMPAT_UNKNOWN,$/;"	e	enum:fdt_compat_id
COMPAT_WOLFSON_WM8994_CODEC	include/fdtdec.h	/^	COMPAT_WOLFSON_WM8994_CODEC,	\/* Wolfson WM8994 Sound Codec *\/$/;"	e	enum:fdt_compat_id
COMPBONUS0	arch/x86/cpu/quark/smc.h	/^#define COMPBONUS0	/;"	d
COMPBUFFDBG0	arch/x86/cpu/quark/smc.h	/^#define COMPBUFFDBG0	/;"	d
COMPBUFFDBG1	arch/x86/cpu/quark/smc.h	/^#define COMPBUFFDBG1	/;"	d
COMPEN0CH0	arch/x86/cpu/quark/smc.h	/^#define COMPEN0CH0	/;"	d
COMPEN1CH0	arch/x86/cpu/quark/smc.h	/^#define COMPEN1CH0	/;"	d
COMPEN2CH0	arch/x86/cpu/quark/smc.h	/^#define COMPEN2CH0	/;"	d
COMPHY_ADDR	drivers/phy/marvell/comphy_cp110.c	/^#define COMPHY_ADDR(/;"	d	file:
COMPHY_MAX_CHIP	drivers/phy/marvell/comphy_core.c	/^#define COMPHY_MAX_CHIP /;"	d	file:
COMPHY_PHY_CFG1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define COMPHY_PHY_CFG1_ADDR(/;"	d
COMPHY_PHY_STAT1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define COMPHY_PHY_STAT1_ADDR(/;"	d
COMPHY_REFCLK_ALIGNMENT	arch/arm/mach-mvebu/include/mach/soc.h	/^#define COMPHY_REFCLK_ALIGNMENT	/;"	d
COMPHY_SEL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define COMPHY_SEL_ADDR	/;"	d
COMPOBSCNTRL	arch/x86/cpu/quark/smc.h	/^#define COMPOBSCNTRL	/;"	d
COMPONENT_DENSITY_16MB	tools/ifdtool.h	/^	COMPONENT_DENSITY_16MB  = 5,$/;"	e	enum:component_density
COMPONENT_DENSITY_1MB	tools/ifdtool.h	/^	COMPONENT_DENSITY_1MB   = 1,$/;"	e	enum:component_density
COMPONENT_DENSITY_2MB	tools/ifdtool.h	/^	COMPONENT_DENSITY_2MB   = 2,$/;"	e	enum:component_density
COMPONENT_DENSITY_4MB	tools/ifdtool.h	/^	COMPONENT_DENSITY_4MB   = 3,$/;"	e	enum:component_density
COMPONENT_DENSITY_512KB	tools/ifdtool.h	/^	COMPONENT_DENSITY_512KB = 0,$/;"	e	enum:component_density
COMPONENT_DENSITY_8MB	tools/ifdtool.h	/^	COMPONENT_DENSITY_8MB   = 4,$/;"	e	enum:component_density
COMPRESS	include/lattice.h	/^#define COMPRESS	/;"	d
COMPRESSED_DATA_NODE_BUF_SZ	fs/ubifs/ubifs.h	/^#define COMPRESSED_DATA_NODE_BUF_SZ /;"	d
COMPRESSION_NONE	board/gdsys/405ep/iocon.c	/^	COMPRESSION_NONE = 0,$/;"	e	enum:__anon023d8a7b0403	file:
COMPRESSION_NONE	board/gdsys/common/ioep-fpga.c	/^	COMPRESSION_NONE = 0,$/;"	e	enum:__anoneadcbf560303	file:
COMPRESSION_TYPE1_DELTA	board/gdsys/405ep/iocon.c	/^	COMPRESSION_TYPE1_DELTA = 1,$/;"	e	enum:__anon023d8a7b0403	file:
COMPRESSION_TYPE1_TYPE2_DELTA	board/gdsys/405ep/iocon.c	/^	COMPRESSION_TYPE1_TYPE2_DELTA = 3,$/;"	e	enum:__anon023d8a7b0403	file:
COMPRESSION_TYPE_1	board/gdsys/common/ioep-fpga.c	/^	COMPRESSION_TYPE_1 = 1,$/;"	e	enum:__anoneadcbf560303	file:
COMPRESSION_TYPE_1_2	board/gdsys/common/ioep-fpga.c	/^	COMPRESSION_TYPE_1_2 = 3,$/;"	e	enum:__anoneadcbf560303	file:
COMPRESSION_TYPE_1_2_3	board/gdsys/common/ioep-fpga.c	/^	COMPRESSION_TYPE_1_2_3 = 7,$/;"	e	enum:__anoneadcbf560303	file:
COMPVISACONTROLCR	arch/x86/cpu/quark/smc.h	/^#define COMPVISACONTROLCR	/;"	d
COMPVISALANECR0	arch/x86/cpu/quark/smc.h	/^#define COMPVISALANECR0	/;"	d
COMPVISALANECR1	arch/x86/cpu/quark/smc.h	/^#define COMPVISALANECR1	/;"	d
COMP_2ND_BW_ERR	drivers/usb/host/xhci.h	/^	COMP_2ND_BW_ERR, \/* 35 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_BABBLE	drivers/usb/host/xhci.h	/^	COMP_BABBLE, \/* 3 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_BUFF_OVER	drivers/usb/host/xhci.h	/^	COMP_BUFF_OVER = 31,$/;"	e	enum:__anonfefbfedb0103
COMP_BW_ERR	drivers/usb/host/xhci.h	/^	COMP_BW_ERR, \/* 8 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_BW_OVER	drivers/usb/host/xhci.h	/^	COMP_BW_OVER,\/* 18 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_CMD_ABORT	drivers/usb/host/xhci.h	/^	COMP_CMD_ABORT, \/* 25 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_CMD_STOP	drivers/usb/host/xhci.h	/^	COMP_CMD_STOP, \/* 24 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_CODE_MASK	drivers/usb/host/xhci.h	/^#define	COMP_CODE_MASK	/;"	d
COMP_CODE_SHIFT	drivers/usb/host/xhci.h	/^#define	COMP_CODE_SHIFT	/;"	d
COMP_CTX_STATE	drivers/usb/host/xhci.h	/^	COMP_CTX_STATE,\/* 19 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_DBG_ABORT	drivers/usb/host/xhci.h	/^	COMP_DBG_ABORT, \/* 28 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_DB_ERR	drivers/usb/host/xhci.h	/^	COMP_DB_ERR, \/* 2 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_DEV_ERR	drivers/usb/host/xhci.h	/^	COMP_DEV_ERR,\/* 22 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_EBADEP	drivers/usb/host/xhci.h	/^	COMP_EBADEP,\/* 12 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_EBADSLT	drivers/usb/host/xhci.h	/^	COMP_EBADSLT, \/* 11 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_EINVAL	drivers/usb/host/xhci.h	/^	COMP_EINVAL, \/* 17 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_ENOMEM	drivers/usb/host/xhci.h	/^	COMP_ENOMEM, \/* 7 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_ENOSLOTS	drivers/usb/host/xhci.h	/^	COMP_ENOSLOTS, \/* 9 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_ER_FULL	drivers/usb/host/xhci.h	/^	COMP_ER_FULL,\/* 21 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_GZIP	tools/easylogo/easylogo.c	/^	COMP_GZIP,$/;"	e	enum:comp_t	file:
COMP_ISSUES	drivers/usb/host/xhci.h	/^	COMP_ISSUES, \/* 32 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_LZMA	tools/easylogo/easylogo.c	/^	COMP_LZMA,$/;"	e	enum:comp_t	file:
COMP_MEL_ERR	drivers/usb/host/xhci.h	/^	COMP_MEL_ERR,\/* 29 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_MISSED_INT	drivers/usb/host/xhci.h	/^	COMP_MISSED_INT,\/* 23 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_MODE_ENABLE	board/armltd/integrator/integrator.c	/^#define COMP_MODE_ENABLE /;"	d	file:
COMP_NONE	tools/easylogo/easylogo.c	/^	COMP_NONE,$/;"	e	enum:comp_t	file:
COMP_OVERRUN	drivers/usb/host/xhci.h	/^	COMP_OVERRUN, \/* 15 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_PING_ERR	drivers/usb/host/xhci.h	/^	COMP_PING_ERR,\/* 20 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_SHORT_TX	drivers/usb/host/xhci.h	/^	COMP_SHORT_TX, \/* 13 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_SPLIT_ERR	drivers/usb/host/xhci.h	/^	COMP_SPLIT_ERR \/* 36 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_STALL	drivers/usb/host/xhci.h	/^	COMP_STALL, \/* 6 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_STOP	drivers/usb/host/xhci.h	/^	COMP_STOP,\/* 26 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_STOP_INVAL	drivers/usb/host/xhci.h	/^	COMP_STOP_INVAL, \/* 27*\/$/;"	e	enum:__anonfefbfedb0103
COMP_STREAM_ERR	drivers/usb/host/xhci.h	/^	COMP_STREAM_ERR, \/* 10 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_STRID_ERR	drivers/usb/host/xhci.h	/^	COMP_STRID_ERR, \/* 34 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_SUCCESS	drivers/usb/host/xhci.h	/^	COMP_SUCCESS = 1,$/;"	e	enum:__anonfefbfedb0103
COMP_TRB_ERR	drivers/usb/host/xhci.h	/^	COMP_TRB_ERR, \/* 5 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_TX_ERR	drivers/usb/host/xhci.h	/^	COMP_TX_ERR, \/* 4 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_UNDERRUN	drivers/usb/host/xhci.h	/^	COMP_UNDERRUN, \/* 14 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_UNKNOWN	drivers/usb/host/xhci.h	/^	COMP_UNKNOWN, \/* 33 *\/$/;"	e	enum:__anonfefbfedb0103
COMP_UNKNOWN	include/jffs2/mini_inflate.h	/^#define COMP_UNKNOWN /;"	d
COMP_VF_FULL	drivers/usb/host/xhci.h	/^	COMP_VF_FULL, \/* 16 *\/$/;"	e	enum:__anonfefbfedb0103
COM_BASE	drivers/input/ps2ser.c	/^#define COM_BASE /;"	d	file:
CON	include/sym53c8xx.h	/^  #define   CON /;"	d
CONCAT	drivers/mtd/mtdconcat.c	/^#define CONCAT(/;"	d	file:
CONCAT1	arch/arc/lib/_millicodethunk.S	/^ #define CONCAT1(/;"	d	file:
CONCAT2	arch/arc/lib/_millicodethunk.S	/^ #define CONCAT2(/;"	d	file:
CONCONTROL_AREF_EN_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define CONCONTROL_AREF_EN_SHIFT	/;"	d
CONCONTROL_DFI_INIT_START_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define CONCONTROL_DFI_INIT_START_SHIFT	/;"	d
CONCONTROL_RD_FETCH_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define CONCONTROL_RD_FETCH_MASK	/;"	d
CONCONTROL_RD_FETCH_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define CONCONTROL_RD_FETCH_SHIFT	/;"	d
CONCONTROL_UPDATE_MODE	arch/arm/mach-exynos/include/mach/dmc.h	/^#define CONCONTROL_UPDATE_MODE	/;"	d
CONCONTROL_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CONCONTROL_VAL	/;"	d
CONDITIONAL_SET_FLAG	drivers/bios_emulator/include/x86emu/regs.h	/^#define CONDITIONAL_SET_FLAG(/;"	d
CONF2_DATPOL	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_DATPOL	/;"	d
CONF2_FORCE_DEVICE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_FORCE_DEVICE	/;"	d
CONF2_FORCE_HOST	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_FORCE_HOST	/;"	d
CONF2_FORCE_HOST_VBUS_LOW	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_FORCE_HOST_VBUS_LOW /;"	d
CONF2_NO_OVERRIDE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_NO_OVERRIDE	/;"	d
CONF2_OTGMODE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_OTGMODE	/;"	d
CONF2_OTGPWRDN	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_OTGPWRDN	/;"	d
CONF2_PHYCLKGD	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_PHYCLKGD	/;"	d
CONF2_PHYPWRDN	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_PHYPWRDN	/;"	d
CONF2_PHY_GPIOMODE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_PHY_GPIOMODE	/;"	d
CONF2_PHY_PLLON	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_PHY_PLLON	/;"	d
CONF2_REFFREQ	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_REFFREQ	/;"	d
CONF2_REFFREQ_13MHZ	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_REFFREQ_13MHZ	/;"	d
CONF2_REFFREQ_24MHZ	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_REFFREQ_24MHZ	/;"	d
CONF2_REFFREQ_26MHZ	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_REFFREQ_26MHZ	/;"	d
CONF2_RESET	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_RESET	/;"	d
CONF2_SESENDEN	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_SESENDEN	/;"	d
CONF2_VBDTCTEN	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_VBDTCTEN	/;"	d
CONF2_VBUSSENSE	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CONF2_VBUSSENSE	/;"	d
CONFA_DIR_INPUT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_DIR_INPUT		= 1 << CONFA_DIR_SHIFT,$/;"	e	enum:__anond5044f050203
CONFA_DIR_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_DIR_SHIFT		= 2,$/;"	e	enum:__anond5044f050203
CONFA_INVERT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_INVERT		= 1 << CONFA_INVERT_SHIFT,$/;"	e	enum:__anond5044f050203
CONFA_INVERT_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_INVERT_SHIFT	= 3,$/;"	e	enum:__anond5044f050203
CONFA_LEVEL_HIGH	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_LEVEL_HIGH	= 1UL << CONFA_LEVEL_SHIFT,$/;"	e	enum:__anond5044f050203
CONFA_LEVEL_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_LEVEL_SHIFT	= 30,$/;"	e	enum:__anond5044f050203
CONFA_MODE_GPIO	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_MODE_GPIO		= 1 << CONFA_MODE_SHIFT,$/;"	e	enum:__anond5044f050203
CONFA_MODE_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_MODE_SHIFT	= 0,$/;"	e	enum:__anond5044f050203
CONFA_OUTPUT_HIGH	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_OUTPUT_HIGH	= 1UL << CONFA_OUTPUT_SHIFT,$/;"	e	enum:__anond5044f050203
CONFA_OUTPUT_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_OUTPUT_SHIFT	= 31,$/;"	e	enum:__anond5044f050203
CONFA_TRIGGER_LEVEL	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_TRIGGER_LEVEL	= 1 << CONFA_TRIGGER_SHIFT,$/;"	e	enum:__anond5044f050203
CONFA_TRIGGER_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFA_TRIGGER_SHIFT	= 4,$/;"	e	enum:__anond5044f050203
CONFB_SENSE_DISABLE	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFB_SENSE_DISABLE	= 1 << CONFB_SENSE_SHIFT,$/;"	e	enum:__anond5044f050203
CONFB_SENSE_SHIFT	arch/x86/include/asm/arch-broadwell/gpio.h	/^	CONFB_SENSE_SHIFT	= 2,$/;"	e	enum:__anond5044f050203
CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	include/configs/lager.h	/^#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	/;"	d
CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	include/configs/stout.h	/^#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	/;"	d
CONFIG	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define CONFIG	/;"	d
CONFIG	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CONFIG,$/;"	e	enum:__anon957231910203	file:
CONFIG	drivers/net/bfin_mac.h	/^		ADI_DMA_CONFIG_REG CONFIG;$/;"	m	union:dma_descriptor::__anon82b289ee010a	typeref:typename:ADI_DMA_CONFIG_REG
CONFIG0	cmd/fdc.c	/^#define CONFIG0	/;"	d	file:
CONFIG1	cmd/fdc.c	/^#define CONFIG1	/;"	d	file:
CONFIG2	cmd/fdc.c	/^#define CONFIG2	/;"	d	file:
CONFIGURATION_NUMBER	drivers/usb/gadget/g_dnl.c	/^#define CONFIGURATION_NUMBER /;"	d	file:
CONFIG_	scripts/kconfig/lkc.h	/^#define CONFIG_ /;"	d
CONFIG_16BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_16BIT	/;"	d	file:
CONFIG_32BIT	arch/mips/Kconfig	/^config 32BIT$/;"	c	menu:MIPS architecture
CONFIG_32BIT_MODULE	arch/mips/Kconfig	/^config 32BIT$/;"	c	menu:MIPS architecture
CONFIG_400MHZ_MODE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_400MHZ_MODE	/;"	d
CONFIG_400MHZ_MODE	include/configs/r0p7734.h	/^#define CONFIG_400MHZ_MODE	/;"	d
CONFIG_405	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_405	/;"	d
CONFIG_405EP	include/configs/PLU405.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/PMC405DE.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/VOM405.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/bubinga.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/dlvision-10g.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/dlvision.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/io.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/iocon.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EP	include/configs/neo.h	/^#define CONFIG_405EP	/;"	d
CONFIG_405EX	include/configs/io64.h	/^#define CONFIG_405EX	/;"	d
CONFIG_405EX	include/configs/kilauea.h	/^#define CONFIG_405EX	/;"	d
CONFIG_405EX	include/configs/makalu.h	/^#define CONFIG_405EX	/;"	d
CONFIG_405EX_CHIP21_ECID3_REV_D	arch/powerpc/include/asm/processor.h	/^#define CONFIG_405EX_CHIP21_ECID3_REV_D	/;"	d
CONFIG_405EX_CHIP21_PVR_REV_C	arch/powerpc/include/asm/processor.h	/^#define CONFIG_405EX_CHIP21_PVR_REV_C	/;"	d
CONFIG_405EX_CHIP21_PVR_REV_D	arch/powerpc/include/asm/processor.h	/^#define CONFIG_405EX_CHIP21_PVR_REV_D	/;"	d
CONFIG_405EZ	include/configs/acadia.h	/^#define CONFIG_405EZ	/;"	d
CONFIG_405GP	arch/powerpc/cpu/ppc4xx/kgdb.S	/^#define CONFIG_405GP /;"	d	file:
CONFIG_405GP	include/configs/CPCI2DP.h	/^#define CONFIG_405GP	/;"	d
CONFIG_405GP	include/configs/CPCI4052.h	/^#define CONFIG_405GP	/;"	d
CONFIG_405GP	include/configs/MIP405.h	/^#define CONFIG_405GP	/;"	d
CONFIG_405GP	include/configs/PIP405.h	/^#define CONFIG_405GP	/;"	d
CONFIG_405GP	include/configs/walnut.h	/^#define CONFIG_405GP	/;"	d
CONFIG_440	include/configs/PMC440.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/bamboo.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/canyonlands.h	/^#define CONFIG_440$/;"	d
CONFIG_440	include/configs/gdppc440etx.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/icon.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/intip.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/katmai.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/luan.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/lwmon5.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/redwood.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/sequoia.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/t3corp.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/xpedite1000.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/yosemite.h	/^#define CONFIG_440	/;"	d
CONFIG_440	include/configs/yucca.h	/^#define CONFIG_440	/;"	d
CONFIG_440EP	include/configs/bamboo.h	/^#define CONFIG_440EP	/;"	d
CONFIG_440EP	include/configs/yosemite.h	/^#define CONFIG_440EP	/;"	d
CONFIG_440EPX	include/configs/PMC440.h	/^#define CONFIG_440EPX	/;"	d
CONFIG_440EPX	include/configs/lwmon5.h	/^#define CONFIG_440EPX	/;"	d
CONFIG_440EPX	include/configs/sequoia.h	/^#define CONFIG_440EPX	/;"	d
CONFIG_440GR	include/configs/gdppc440etx.h	/^#define CONFIG_440GR	/;"	d
CONFIG_440GR	include/configs/yosemite.h	/^#define CONFIG_440GR	/;"	d
CONFIG_440GRX	include/configs/sequoia.h	/^#define CONFIG_440GRX	/;"	d
CONFIG_440GX	include/configs/xpedite1000.h	/^#define CONFIG_440GX	/;"	d
CONFIG_440SP	include/configs/luan.h	/^#define CONFIG_440SP	/;"	d
CONFIG_440SPE	include/configs/icon.h	/^#define CONFIG_440SPE	/;"	d
CONFIG_440SPE	include/configs/katmai.h	/^#define CONFIG_440SPE	/;"	d
CONFIG_440SPE	include/configs/yucca.h	/^#define CONFIG_440SPE	/;"	d
CONFIG_440SPE_REVA	include/configs/katmai.h	/^#define CONFIG_440SPE_REVA	/;"	d
CONFIG_440SPE_REVA	include/configs/yucca.h	/^#define CONFIG_440SPE_REVA	/;"	d
CONFIG_4430SDP	include/configs/omap4_sdp4430.h	/^#define CONFIG_4430SDP	/;"	d
CONFIG_460EX	include/configs/canyonlands.h	/^#define CONFIG_460EX	/;"	d
CONFIG_460EX	include/configs/intip.h	/^#define CONFIG_460EX	/;"	d
CONFIG_460GT	include/configs/canyonlands.h	/^#define CONFIG_460GT	/;"	d
CONFIG_460GT	include/configs/t3corp.h	/^#define CONFIG_460GT	/;"	d
CONFIG_460SX	include/configs/redwood.h	/^#define CONFIG_460SX	/;"	d
CONFIG_4xx	arch/powerpc/Kconfig	/^config 4xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/PMC405DE.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/canyonlands.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/icon.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/intip.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/io64.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/katmai.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/kilauea.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/sequoia.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_BLOCKSIZE	include/configs/t3corp.h	/^#define CONFIG_4xx_CONFIG_BLOCKSIZE	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/canyonlands.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/icon.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/intip.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/io64.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/katmai.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/kilauea.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/sequoia.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	include/configs/t3corp.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/PMC405DE.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/canyonlands.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/icon.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/intip.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/io64.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/katmai.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/kilauea.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/sequoia.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	include/configs/t3corp.h	/^#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	/;"	d
CONFIG_4xx_DCACHE	include/configs/lwmon5.h	/^#define CONFIG_4xx_DCACHE	/;"	d
CONFIG_4xx_DCACHE	include/configs/sequoia.h	/^#define CONFIG_4xx_DCACHE	/;"	d
CONFIG_4xx_MODULE	arch/powerpc/Kconfig	/^config 4xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_521X	arch/powerpc/cpu/mpc512x/start.S	/^#define CONFIG_521X	/;"	d	file:
CONFIG_5xx	arch/powerpc/Kconfig	/^config 5xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_5xx_CONS_SCI1	include/configs/PATI.h	/^#define	CONFIG_5xx_CONS_SCI1$/;"	d
CONFIG_5xx_MODULE	arch/powerpc/Kconfig	/^config 5xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_64BIT	arch/mips/Kconfig	/^config 64BIT$/;"	c	menu:MIPS architecture
CONFIG_64BIT_MODULE	arch/mips/Kconfig	/^config 64BIT$/;"	c	menu:MIPS architecture
CONFIG_8260_CLKIN	include/configs/km82xx.h	/^#define CONFIG_8260_CLKIN	/;"	d
CONFIG_83XX	arch/powerpc/cpu/mpc83xx/start.S	/^#define CONFIG_83XX	/;"	d	file:
CONFIG_83XX_CLKIN	include/configs/MPC8308RDB.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC8313ERDB.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC8315ERDB.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC8323ERDB.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC832XEMDS.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC8349EMDS.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC8349ITX.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC837XEMDS.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/MPC837XERDB.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/TQM834x.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/hrcon.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/ids8313.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/km/km83xx-common.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/mpc8308_p1m.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/sbc8349.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/strider.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/ve8313.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_CLKIN	include/configs/vme8349.h	/^#define CONFIG_83XX_CLKIN	/;"	d
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES	include/configs/MPC8308RDB.h	/^#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES /;"	d
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES	include/configs/hrcon.h	/^#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES /;"	d
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES	include/configs/mpc8308_p1m.h	/^#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES /;"	d
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES	include/configs/strider.h	/^#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES /;"	d
CONFIG_83XX_PCICLK	include/configs/MPC832XEMDS.h	/^#define CONFIG_83XX_PCICLK	/;"	d
CONFIG_83XX_PCICLK	include/configs/MPC8349EMDS.h	/^#define CONFIG_83XX_PCICLK	/;"	d
CONFIG_83XX_PCICLK	include/configs/MPC837XEMDS.h	/^#define CONFIG_83XX_PCICLK	/;"	d
CONFIG_83XX_PCICLK	include/configs/MPC837XERDB.h	/^#define CONFIG_83XX_PCICLK	/;"	d
CONFIG_83XX_PCICLK	include/configs/km/km83xx-common.h	/^#define CONFIG_83XX_PCICLK	/;"	d
CONFIG_83XX_PCI_STREAMING	include/configs/MPC832XEMDS.h	/^#define CONFIG_83XX_PCI_STREAMING$/;"	d
CONFIG_83XX_PCI_STREAMING	include/configs/MPC8349EMDS.h	/^#define CONFIG_83XX_PCI_STREAMING$/;"	d
CONFIG_88F5182	include/configs/edminiv2.h	/^#define CONFIG_88F5182	/;"	d
CONFIG_88F6820	arch/arm/mach-mvebu/Kconfig	/^config 88F6820$/;"	c
CONFIG_88F6820_MODULE	arch/arm/mach-mvebu/Kconfig	/^config 88F6820$/;"	c
CONFIG_8xx	arch/powerpc/Kconfig	/^config 8xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_8xx_CONS_SMC1	include/configs/TQM823L.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM823M.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM850L.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM850M.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM855L.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM855M.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM860L.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM860M.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM862L.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM862M.h	/^#define	CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM866M.h	/^#define CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CONS_SMC1	include/configs/TQM885D.h	/^#define CONFIG_8xx_CONS_SMC1	/;"	d
CONFIG_8xx_CPUCLK_DEFAULT	include/configs/TQM866M.h	/^#define CONFIG_8xx_CPUCLK_DEFAULT	/;"	d
CONFIG_8xx_CPUCLK_DEFAULT	include/configs/TQM885D.h	/^#define CONFIG_8xx_CPUCLK_DEFAULT	/;"	d
CONFIG_8xx_MODULE	arch/powerpc/Kconfig	/^config 8xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_8xx_OSCLK	include/configs/TQM866M.h	/^#define CONFIG_8xx_OSCLK	/;"	d
CONFIG_8xx_OSCLK	include/configs/TQM885D.h	/^#define CONFIG_8xx_OSCLK	/;"	d
CONFIG_A003399_NOR_WORKAROUND	include/configs/P1010RDB.h	/^#define CONFIG_A003399_NOR_WORKAROUND$/;"	d
CONFIG_A008044_WORKAROUND	include/configs/T104xRDB.h	/^#define CONFIG_A008044_WORKAROUND$/;"	d
CONFIG_A3M071	include/configs/a3m071.h	/^#define CONFIG_A3M071	/;"	d
CONFIG_A4M072	include/configs/a4m072.h	/^#define CONFIG_A4M072	/;"	d
CONFIG_AC14XX	include/configs/ac14xx.h	/^#define CONFIG_AC14XX /;"	d
CONFIG_ACADIA	include/configs/acadia.h	/^#define CONFIG_ACADIA	/;"	d
CONFIG_ACPI_GPE0_BASE	arch/x86/cpu/quark/Kconfig	/^config ACPI_GPE0_BASE$/;"	c
CONFIG_ACPI_GPE0_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config ACPI_GPE0_BASE$/;"	c
CONFIG_ACPI_PBLK_BASE	arch/x86/cpu/quark/Kconfig	/^config ACPI_PBLK_BASE$/;"	c
CONFIG_ACPI_PBLK_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config ACPI_PBLK_BASE$/;"	c
CONFIG_ACPI_PM1_BASE	arch/x86/cpu/qemu/Kconfig	/^config ACPI_PM1_BASE$/;"	c
CONFIG_ACPI_PM1_BASE	arch/x86/cpu/quark/Kconfig	/^config ACPI_PM1_BASE$/;"	c
CONFIG_ACPI_PM1_BASE_MODULE	arch/x86/cpu/qemu/Kconfig	/^config ACPI_PM1_BASE$/;"	c
CONFIG_ACPI_PM1_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config ACPI_PM1_BASE$/;"	c
CONFIG_ADC	drivers/adc/Kconfig	/^config ADC$/;"	c
CONFIG_ADC_EXYNOS	drivers/adc/Kconfig	/^config ADC_EXYNOS$/;"	c
CONFIG_ADC_EXYNOS_MODULE	drivers/adc/Kconfig	/^config ADC_EXYNOS$/;"	c
CONFIG_ADC_MODULE	drivers/adc/Kconfig	/^config ADC$/;"	c
CONFIG_ADC_SANDBOX	drivers/adc/Kconfig	/^config ADC_SANDBOX$/;"	c
CONFIG_ADC_SANDBOX_MODULE	drivers/adc/Kconfig	/^config ADC_SANDBOX$/;"	c
CONFIG_ADDMISC	include/configs/amcc-common.h	/^#define CONFIG_ADDMISC	/;"	d
CONFIG_ADDMISC	include/configs/makalu.h	/^#define CONFIG_ADDMISC	/;"	d
CONFIG_ADDR_AUTO_INCR_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_ADDR_AUTO_INCR_BIT	/;"	d	file:
CONFIG_ADDR_MAP	include/configs/B4860QDS.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/C29XPCIE.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/MPC8536DS.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/MPC8548CDS.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/MPC8572DS.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/MPC8641HPCN.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/P1010RDB.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/P1022DS.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/P2041RDB.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/T102xQDS.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/T102xRDB.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/T1040QDS.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/T104xRDB.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/T208xQDS.h	/^#define CONFIG_ADDR_MAP /;"	d
CONFIG_ADDR_MAP	include/configs/T208xRDB.h	/^#define CONFIG_ADDR_MAP /;"	d
CONFIG_ADDR_MAP	include/configs/T4240RDB.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/controlcenterd.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/corenet_ds.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/cyrus.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/km/kmp204x-common.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ADDR_MAP	/;"	d
CONFIG_ADDR_MAP	include/configs/qemu-ppce500.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_MAP	include/configs/t4qds.h	/^#define CONFIG_ADDR_MAP$/;"	d
CONFIG_ADDR_STREAMING	include/configs/C29XPCIE.h	/^#define CONFIG_ADDR_STREAMING	/;"	d
CONFIG_ADDR_STREAMING	include/configs/P1010RDB.h	/^#define CONFIG_ADDR_STREAMING	/;"	d
CONFIG_ADI_GPIO1	include/configs/bfin_adi_common.h	/^# define CONFIG_ADI_GPIO1$/;"	d
CONFIG_ADI_GPIO2	include/configs/bf548-ezkit.h	/^#define CONFIG_ADI_GPIO2$/;"	d
CONFIG_ADI_GPIO2	include/configs/bf609-ezkit.h	/^#define CONFIG_ADI_GPIO2$/;"	d
CONFIG_ADI_GPIO2	include/configs/cm-bf548.h	/^#define CONFIG_ADI_GPIO2$/;"	d
CONFIG_ADP_AG101P	include/configs/adp-ag101p.h	/^#define CONFIG_ADP_AG101P$/;"	d
CONFIG_AEABI	arch/arm/lib/lib1funcs.S	/^#define CONFIG_AEABI$/;"	d	file:
CONFIG_AEMIF_CNTRL_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_AEMIF_CNTRL_BASE	/;"	d
CONFIG_AES	include/configs/seaboard.h	/^#define CONFIG_AES$/;"	d
CONFIG_AG7XXX	drivers/net/Kconfig	/^config AG7XXX$/;"	c
CONFIG_AG7XXX_MODULE	drivers/net/Kconfig	/^config AG7XXX$/;"	c
CONFIG_AHCI	arch/x86/Kconfig	/^config AHCI$/;"	c	menu:x86 architecture
CONFIG_AHCI	drivers/block/Kconfig	/^config AHCI$/;"	c
CONFIG_AHCI	include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h	/^#define CONFIG_AHCI$/;"	d
CONFIG_AHCI_MODULE	arch/x86/Kconfig	/^config AHCI$/;"	c	menu:x86 architecture
CONFIG_AHCI_MODULE	drivers/block/Kconfig	/^config AHCI$/;"	c
CONFIG_ALTERA_JTAG_UART	drivers/serial/Kconfig	/^config ALTERA_JTAG_UART$/;"	c	menu:Serial drivers
CONFIG_ALTERA_JTAG_UART_BYPASS	drivers/serial/Kconfig	/^config ALTERA_JTAG_UART_BYPASS$/;"	c	menu:Serial drivers
CONFIG_ALTERA_JTAG_UART_BYPASS_MODULE	drivers/serial/Kconfig	/^config ALTERA_JTAG_UART_BYPASS$/;"	c	menu:Serial drivers
CONFIG_ALTERA_JTAG_UART_MODULE	drivers/serial/Kconfig	/^config ALTERA_JTAG_UART$/;"	c	menu:Serial drivers
CONFIG_ALTERA_PIO	drivers/gpio/Kconfig	/^config ALTERA_PIO$/;"	c	menu:GPIO Support
CONFIG_ALTERA_PIO_MODULE	drivers/gpio/Kconfig	/^config ALTERA_PIO$/;"	c	menu:GPIO Support
CONFIG_ALTERA_QSPI	drivers/mtd/Kconfig	/^config ALTERA_QSPI$/;"	c	menu:MTD Support
CONFIG_ALTERA_QSPI_MODULE	drivers/mtd/Kconfig	/^config ALTERA_QSPI$/;"	c	menu:MTD Support
CONFIG_ALTERA_SDRAM	include/configs/socfpga_common.h	/^#define CONFIG_ALTERA_SDRAM$/;"	d
CONFIG_ALTERA_SPI	drivers/spi/Kconfig	/^config ALTERA_SPI$/;"	c	menu:SPI Support
CONFIG_ALTERA_SPI_IDLE_VAL	drivers/spi/altera_spi.c	/^#define CONFIG_ALTERA_SPI_IDLE_VAL	/;"	d	file:
CONFIG_ALTERA_SPI_MODULE	drivers/spi/Kconfig	/^config ALTERA_SPI$/;"	c	menu:SPI Support
CONFIG_ALTERA_SYSID	drivers/misc/Kconfig	/^config ALTERA_SYSID$/;"	c	menu:Multifunction device drivers
CONFIG_ALTERA_SYSID_MODULE	drivers/misc/Kconfig	/^config ALTERA_SYSID$/;"	c	menu:Multifunction device drivers
CONFIG_ALTERA_TIMER	drivers/timer/Kconfig	/^config ALTERA_TIMER$/;"	c	menu:Timer Support
CONFIG_ALTERA_TIMER_MODULE	drivers/timer/Kconfig	/^config ALTERA_TIMER$/;"	c	menu:Timer Support
CONFIG_ALTERA_TSE	drivers/net/Kconfig	/^config ALTERA_TSE$/;"	c
CONFIG_ALTERA_TSE_MODULE	drivers/net/Kconfig	/^config ALTERA_TSE$/;"	c
CONFIG_ALTERA_UART	drivers/serial/Kconfig	/^config ALTERA_UART$/;"	c	menu:Serial drivers
CONFIG_ALTERA_UART_MODULE	drivers/serial/Kconfig	/^config ALTERA_UART$/;"	c	menu:Serial drivers
CONFIG_ALTIVEC	include/configs/MPC8610HPCD.h	/^#define CONFIG_ALTIVEC	/;"	d
CONFIG_ALTIVEC	include/configs/MPC8641HPCN.h	/^#define CONFIG_ALTIVEC	/;"	d
CONFIG_ALTIVEC	include/configs/sbc8641d.h	/^#define CONFIG_ALTIVEC /;"	d
CONFIG_ALTIVEC	include/configs/xpedite517x.h	/^#define CONFIG_ALTIVEC	/;"	d
CONFIG_ALT_LB_ADDR	include/configs/lwmon5.h	/^#define CONFIG_ALT_LB_ADDR	/;"	d
CONFIG_ALT_LH_ADDR	include/configs/lwmon5.h	/^#define CONFIG_ALT_LH_ADDR	/;"	d
CONFIG_ALU	include/configs/B4860QDS.h	/^#define CONFIG_ALU	/;"	d
CONFIG_ALU	include/configs/T208xQDS.h	/^#define CONFIG_ALU	/;"	d
CONFIG_ALU	include/configs/T208xRDB.h	/^#define CONFIG_ALU	/;"	d
CONFIG_ALU	include/configs/T4240QDS.h	/^#define CONFIG_ALU	/;"	d
CONFIG_AM335X_LCD	include/configs/brppt1.h	/^#define CONFIG_AM335X_LCD$/;"	d
CONFIG_AM335X_LCD	include/configs/brxre1.h	/^#define CONFIG_AM335X_LCD$/;"	d
CONFIG_AM335X_USB0	include/configs/am335x_evm.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/baltos.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/bav335x.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/brppt1.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/brxre1.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/pcm051.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/pengwyn.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0	include/configs/siemens-am33x-common.h	/^#define CONFIG_AM335X_USB0$/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/am335x_evm.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/baltos.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/bav335x.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/brppt1.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/brxre1.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/pcm051.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/pengwyn.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB0_MODE	include/configs/siemens-am33x-common.h	/^#define CONFIG_AM335X_USB0_MODE	/;"	d
CONFIG_AM335X_USB1	include/configs/am335x_evm.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/baltos.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/bav335x.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/brppt1.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/brxre1.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/pcm051.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/pengwyn.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1	include/configs/siemens-am33x-common.h	/^#define CONFIG_AM335X_USB1$/;"	d
CONFIG_AM335X_USB1_MODE	include/configs/am335x_evm.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM335X_USB1_MODE	include/configs/baltos.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM335X_USB1_MODE	include/configs/bav335x.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM335X_USB1_MODE	include/configs/brppt1.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM335X_USB1_MODE	include/configs/brxre1.h	/^#define CONFIG_AM335X_USB1_MODE	/;"	d
CONFIG_AM335X_USB1_MODE	include/configs/pcm051.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM335X_USB1_MODE	include/configs/pengwyn.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM335X_USB1_MODE	include/configs/siemens-am33x-common.h	/^#define CONFIG_AM335X_USB1_MODE /;"	d
CONFIG_AM33XX	arch/arm/Kconfig	/^config AM33XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_AM33XX	include/configs/bur_am335x_common.h	/^#define CONFIG_AM33XX$/;"	d
CONFIG_AM33XX	include/configs/siemens-am33x-common.h	/^#define CONFIG_AM33XX$/;"	d
CONFIG_AM33XX_MODULE	arch/arm/Kconfig	/^config AM33XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_AM437X_USB2PHY2_HOST	include/configs/am43xx_evm.h	/^#define CONFIG_AM437X_USB2PHY2_HOST$/;"	d
CONFIG_AM437X_USB2PHY2_HOST	include/configs/cm_t43.h	/^#define CONFIG_AM437X_USB2PHY2_HOST$/;"	d
CONFIG_AM43XX	arch/arm/Kconfig	/^config AM43XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_AM43XX	include/configs/cm_t43.h	/^#define CONFIG_AM43XX$/;"	d
CONFIG_AM43XX_MODULE	arch/arm/Kconfig	/^config AM43XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_AM57XX	include/configs/am57xx_evm.h	/^#define CONFIG_AM57XX$/;"	d
CONFIG_AMBAPP_IOAREA	arch/sparc/cpu/leon3/cpu_init.c	/^#define CONFIG_AMBAPP_IOAREA /;"	d	file:
CONFIG_AMBAPP_IOAREA	arch/sparc/cpu/leon3/start.S	/^#define CONFIG_AMBAPP_IOAREA /;"	d	file:
CONFIG_AMCC_DEF_ENV	include/configs/amcc-common.h	/^#define CONFIG_AMCC_DEF_ENV	/;"	d
CONFIG_AMCC_DEF_ENV_NOR_UPD	include/configs/amcc-common.h	/^#define CONFIG_AMCC_DEF_ENV_NOR_UPD	/;"	d
CONFIG_AMCC_DEF_ENV_POWERPC	include/configs/amcc-common.h	/^#define CONFIG_AMCC_DEF_ENV_POWERPC	/;"	d
CONFIG_AMCC_DEF_ENV_PPC	include/configs/amcc-common.h	/^#define CONFIG_AMCC_DEF_ENV_PPC	/;"	d
CONFIG_AMCC_DEF_ENV_PPC_OLD	include/configs/amcc-common.h	/^#define CONFIG_AMCC_DEF_ENV_PPC_OLD	/;"	d
CONFIG_AMCC_DEF_ENV_ROOTPATH	include/configs/amcc-common.h	/^#define CONFIG_AMCC_DEF_ENV_ROOTPATH	/;"	d
CONFIG_AMCORE	include/configs/amcore.h	/^#define CONFIG_AMCORE$/;"	d
CONFIG_AMIGA_PARTITION	include/configs/sandbox.h	/^#define CONFIG_AMIGA_PARTITION$/;"	d
CONFIG_ANDES_PCU_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_ANDES_PCU_BASE	/;"	d
CONFIG_ANDROID_BOOT_IMAGE	cmd/fastboot/Kconfig	/^config ANDROID_BOOT_IMAGE$/;"	c	menu:Fastboot support
CONFIG_ANDROID_BOOT_IMAGE	include/configs/am335x_evm.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/bav335x.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/cgtqmx6eval.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/kc1.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/mx6sabre_common.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/nitrogen6x.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/omap3_beagle.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/omap3_logic.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/sandbox.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/sniper.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE	include/configs/sunxi-common.h	/^#define CONFIG_ANDROID_BOOT_IMAGE$/;"	d
CONFIG_ANDROID_BOOT_IMAGE_MODULE	cmd/fastboot/Kconfig	/^config ANDROID_BOOT_IMAGE$/;"	c	menu:Fastboot support
CONFIG_AP325RXA	include/configs/ap325rxa.h	/^#define CONFIG_AP325RXA	/;"	d
CONFIG_APBH_DMA	include/configs/aristainetos-common.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/cm_fx6.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/colibri_imx7.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/gw_ventana.h	/^  #define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/imx6qdl_icore.h	/^# define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/mx6qsabreauto.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/mx6sxsabreauto.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/mx7dsabresd.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/mxs.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/pcm058.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/platinum.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA	include/configs/titanium.h	/^#define CONFIG_APBH_DMA$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/aristainetos-common.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/cm_fx6.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/colibri_imx7.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/gw_ventana.h	/^  #define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/imx6qdl_icore.h	/^# define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/mx6qsabreauto.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/mx6sxsabreauto.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/mx7dsabresd.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/pcm058.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/platinum.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST	include/configs/titanium.h	/^#define CONFIG_APBH_DMA_BURST$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/aristainetos-common.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/cm_fx6.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/colibri_imx7.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/gw_ventana.h	/^  #define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/imx6qdl_icore.h	/^# define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/mx6qsabreauto.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/mx6sxsabreauto.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/mx7dsabresd.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/pcm058.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/platinum.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APBH_DMA_BURST8	include/configs/titanium.h	/^#define CONFIG_APBH_DMA_BURST8$/;"	d
CONFIG_APER_0_BASE	include/radeon.h	/^#define CONFIG_APER_0_BASE	/;"	d
CONFIG_APER_1_BASE	include/radeon.h	/^#define CONFIG_APER_1_BASE	/;"	d
CONFIG_APER_SIZE	include/radeon.h	/^#define CONFIG_APER_SIZE	/;"	d
CONFIG_API	include/configs/PMC440.h	/^#define CONFIG_API	/;"	d
CONFIG_API	include/configs/lsxl.h	/^#define CONFIG_API$/;"	d
CONFIG_AP_SH4A_4A	include/configs/ap_sh4a_4a.h	/^#define CONFIG_AP_SH4A_4A	/;"	d
CONFIG_AP_STACK_SIZE	arch/x86/Kconfig	/^config AP_STACK_SIZE$/;"	c	menu:x86 architecture
CONFIG_AP_STACK_SIZE_MODULE	arch/x86/Kconfig	/^config AP_STACK_SIZE$/;"	c	menu:x86 architecture
CONFIG_AR933X_PINCTRL	drivers/pinctrl/Kconfig	/^config AR933X_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_AR933X_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config AR933X_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_AR933X_UART	drivers/serial/Kconfig	/^config AR933X_UART$/;"	c	menu:Serial drivers
CONFIG_AR933X_UART_MODULE	drivers/serial/Kconfig	/^config AR933X_UART$/;"	c	menu:Serial drivers
CONFIG_ARC	arch/Kconfig	/^config ARC$/;"	c	choice:choice07312ef30104
CONFIG_ARCHES	board/amcc/canyonlands/Kconfig	/^config ARCHES$/;"	c	choice:BOARD_TYPE
CONFIG_ARCHES_MODULE	board/amcc/canyonlands/Kconfig	/^config ARCHES$/;"	c	choice:BOARD_TYPE
CONFIG_ARCH_AT91	arch/arm/Kconfig	/^config ARCH_AT91$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_AT91_MODULE	arch/arm/Kconfig	/^config ARCH_AT91$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_ATH79	arch/mips/Kconfig	/^config ARCH_ATH79$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_ARCH_ATH79_MODULE	arch/mips/Kconfig	/^config ARCH_ATH79$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_ARCH_BCM283X	arch/arm/Kconfig	/^config ARCH_BCM283X$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_BCM283X_MODULE	arch/arm/Kconfig	/^config ARCH_BCM283X$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_CINTEGRATOR	arch/arm/mach-integrator/Kconfig	/^config ARCH_CINTEGRATOR$/;"	c	menu:Integrator Options
CONFIG_ARCH_CINTEGRATOR_MODULE	arch/arm/mach-integrator/Kconfig	/^config ARCH_CINTEGRATOR$/;"	c	menu:Integrator Options
CONFIG_ARCH_CPU_INIT	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define CONFIG_ARCH_CPU_INIT	/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/am43xx_evm.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/armadillo-800eva.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/at91-sama5_common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/at91sam9260ek.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/at91sam9263ek.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/at91sam9rlek.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/calimain.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/cm_t43.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/colibri_pxa270.h	/^#define	CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/da850evm.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/edminiv2.h	/^#define CONFIG_ARCH_CPU_INIT	/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/ethernut5.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/exynos-common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/exynos7420-common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/km/km_arm.h	/^#define CONFIG_ARCH_CPU_INIT	/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/kzm9g.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/meesc.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/mv-common.h	/^#define CONFIG_ARCH_CPU_INIT	/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ARCH_CPU_INIT	/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ARCH_CPU_INIT	/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/pm9261.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/pm9263.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/pm9g45.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/rcar-gen2-common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/rcar-gen3-common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/rpi.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/s5p_goni.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/smdkc100.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/snapper9260.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/spear-common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/taurus.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/ti814x_evm.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/ti816x_evm.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/ti_am335x_common.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/usb_a9263.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/x600.h	/^#define CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_CPU_INIT	include/configs/zipitz2.h	/^#define	CONFIG_ARCH_CPU_INIT$/;"	d
CONFIG_ARCH_DAVINCI	arch/arm/Kconfig	/^config ARCH_DAVINCI$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_DAVINCI_MODULE	arch/arm/Kconfig	/^config ARCH_DAVINCI$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_DEVICE_TREE	arch/sandbox/config.mk	/^CONFIG_ARCH_DEVICE_TREE := sandbox$/;"	m
CONFIG_ARCH_EARLY_INIT_R	arch/arc/include/asm/config.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/crownbay.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/galileo.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/ls1012a_common.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/ls1043a_common.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/ls1046a_common.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/ls2080a_common.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/minnowmax.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/qemu-x86.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/rut.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/socfpga_common.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/som-6896.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/som-db5800-som-6867.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EARLY_INIT_R	include/configs/x86-chromebook.h	/^#define CONFIG_ARCH_EARLY_INIT_R$/;"	d
CONFIG_ARCH_EXYNOS	arch/arm/Kconfig	/^config ARCH_EXYNOS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_EXYNOS4	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS4$/;"	c	choice:choice9b416b3d0104
CONFIG_ARCH_EXYNOS4_MODULE	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS4$/;"	c	choice:choice9b416b3d0104
CONFIG_ARCH_EXYNOS5	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS5$/;"	c	choice:choice9b416b3d0104
CONFIG_ARCH_EXYNOS5_MODULE	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS5$/;"	c	choice:choice9b416b3d0104
CONFIG_ARCH_EXYNOS7	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS7$/;"	c	choice:choice9b416b3d0104
CONFIG_ARCH_EXYNOS7_MODULE	arch/arm/mach-exynos/Kconfig	/^config ARCH_EXYNOS7$/;"	c	choice:choice9b416b3d0104
CONFIG_ARCH_EXYNOS_MODULE	arch/arm/Kconfig	/^config ARCH_EXYNOS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_FIXUP_FDT	Kconfig	/^config ARCH_FIXUP_FDT$/;"	c	menu:Boot images
CONFIG_ARCH_FIXUP_FDT	include/config/auto.conf	/^CONFIG_ARCH_FIXUP_FDT=y$/;"	k
CONFIG_ARCH_FIXUP_FDT	include/generated/autoconf.h	/^#define CONFIG_ARCH_FIXUP_FDT /;"	d
CONFIG_ARCH_FIXUP_FDT_MODULE	Kconfig	/^config ARCH_FIXUP_FDT$/;"	c	menu:Boot images
CONFIG_ARCH_HIGHBANK	arch/arm/Kconfig	/^config ARCH_HIGHBANK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_HIGHBANK_MODULE	arch/arm/Kconfig	/^config ARCH_HIGHBANK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_INTEGRATOR	arch/arm/Kconfig	/^config ARCH_INTEGRATOR$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_INTEGRATOR_AP	arch/arm/mach-integrator/Kconfig	/^config ARCH_INTEGRATOR_AP$/;"	c	choice:Integrator Options""choicee9c481760104
CONFIG_ARCH_INTEGRATOR_AP_MODULE	arch/arm/mach-integrator/Kconfig	/^config ARCH_INTEGRATOR_AP$/;"	c	choice:Integrator Options""choicee9c481760104
CONFIG_ARCH_INTEGRATOR_CP	arch/arm/mach-integrator/Kconfig	/^config ARCH_INTEGRATOR_CP$/;"	c	choice:Integrator Options""choicee9c481760104
CONFIG_ARCH_INTEGRATOR_CP_MODULE	arch/arm/mach-integrator/Kconfig	/^config ARCH_INTEGRATOR_CP$/;"	c	choice:Integrator Options""choicee9c481760104
CONFIG_ARCH_INTEGRATOR_MODULE	arch/arm/Kconfig	/^config ARCH_INTEGRATOR$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_KEYSTONE	arch/arm/Kconfig	/^config ARCH_KEYSTONE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_KEYSTONE_MODULE	arch/arm/Kconfig	/^config ARCH_KEYSTONE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_LS1012A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1012A$/;"	c
CONFIG_ARCH_LS1012A_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1012A$/;"	c
CONFIG_ARCH_LS1021A	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config ARCH_LS1021A$/;"	c
CONFIG_ARCH_LS1021A_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config ARCH_LS1021A$/;"	c
CONFIG_ARCH_LS1043A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1043A$/;"	c
CONFIG_ARCH_LS1043A_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1043A$/;"	c
CONFIG_ARCH_LS1046A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1046A$/;"	c
CONFIG_ARCH_LS1046A_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS1046A$/;"	c
CONFIG_ARCH_LS2080A	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS2080A$/;"	c
CONFIG_ARCH_LS2080A_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config ARCH_LS2080A$/;"	c
CONFIG_ARCH_MESON	arch/arm/Kconfig	/^config ARCH_MESON$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MESON_MODULE	arch/arm/Kconfig	/^config ARCH_MESON$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MISC_INIT	arch/blackfin/include/asm/config.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/am335x_evm.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/apalis_t30.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/baltos.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/bav335x.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/bayleybay.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/brppt1.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/brxre1.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/colibri_t20.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/colibri_t30.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/colibri_vf.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/edminiv2.h	/^#define CONFIG_ARCH_MISC_INIT	/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/galileo.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/km/km_arm.h	/^#define CONFIG_ARCH_MISC_INIT	/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/ls2080a_common.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/minnowmax.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/mv-common.h	/^#define CONFIG_ARCH_MISC_INIT	/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/mx7_common.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/mxs.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/pcm051.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/pengwyn.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/siemens-am33x-common.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/socfpga_common.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MISC_INIT	include/configs/som-db5800-som-6867.h	/^#define CONFIG_ARCH_MISC_INIT$/;"	d
CONFIG_ARCH_MVEBU	arch/arm/Kconfig	/^config ARCH_MVEBU$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MVEBU_MODULE	arch/arm/Kconfig	/^config ARCH_MVEBU$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MX5	arch/arm/Kconfig	/^config ARCH_MX5$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MX5_MODULE	arch/arm/Kconfig	/^config ARCH_MX5$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MX6	arch/arm/Kconfig	/^config ARCH_MX6$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MX6_MODULE	arch/arm/Kconfig	/^config ARCH_MX6$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MX7	arch/arm/Kconfig	/^config ARCH_MX7$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_MX7_MODULE	arch/arm/Kconfig	/^config ARCH_MX7$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_OMAP4	drivers/usb/musb-new/linux-compat.h	/^#define CONFIG_ARCH_OMAP4$/;"	d
CONFIG_ARCH_RMOBILE	arch/arm/Kconfig	/^config ARCH_RMOBILE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/alt.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/armadillo-800eva.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/gose.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/koelsch.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/kzm9g.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING	/;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/lager.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/porter.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/silk.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_BOARD_STRING	include/configs/stout.h	/^#define CONFIG_ARCH_RMOBILE_BOARD_STRING /;"	d
CONFIG_ARCH_RMOBILE_MODULE	arch/arm/Kconfig	/^config ARCH_RMOBILE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_ROCKCHIP	arch/arm/Kconfig	/^config ARCH_ROCKCHIP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_ROCKCHIP_MODULE	arch/arm/Kconfig	/^config ARCH_ROCKCHIP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_S5PC1XX	arch/arm/Kconfig	/^config ARCH_S5PC1XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_S5PC1XX_MODULE	arch/arm/Kconfig	/^config ARCH_S5PC1XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SNAPDRAGON	arch/arm/Kconfig	/^config ARCH_SNAPDRAGON$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SNAPDRAGON_MODULE	arch/arm/Kconfig	/^config ARCH_SNAPDRAGON$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SOCFPGA	arch/arm/Kconfig	/^config ARCH_SOCFPGA$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SOCFPGA_MODULE	arch/arm/Kconfig	/^config ARCH_SOCFPGA$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SUNXI	arch/arm/Kconfig	/^config ARCH_SUNXI$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SUNXI	include/config/auto.conf	/^CONFIG_ARCH_SUNXI=y$/;"	k
CONFIG_ARCH_SUNXI	include/generated/autoconf.h	/^#define CONFIG_ARCH_SUNXI /;"	d
CONFIG_ARCH_SUNXI	tools/Makefile	/^CONFIG_ARCH_SUNXI = y$/;"	m
CONFIG_ARCH_SUNXI_MODULE	arch/arm/Kconfig	/^config ARCH_SUNXI$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_SUPPORT_PSCI	arch/arm/cpu/armv7/Kconfig	/^config ARCH_SUPPORT_PSCI$/;"	c
CONFIG_ARCH_SUPPORT_PSCI	include/config/auto.conf	/^CONFIG_ARCH_SUPPORT_PSCI=y$/;"	k
CONFIG_ARCH_SUPPORT_PSCI	include/generated/autoconf.h	/^#define CONFIG_ARCH_SUPPORT_PSCI /;"	d
CONFIG_ARCH_SUPPORT_PSCI_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARCH_SUPPORT_PSCI$/;"	c
CONFIG_ARCH_UNIPHIER	arch/arm/Kconfig	/^config ARCH_UNIPHIER$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_UNIPHIER_32BIT	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_32BIT$/;"	c
CONFIG_ARCH_UNIPHIER_32BIT_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_32BIT$/;"	c
CONFIG_ARCH_UNIPHIER_64BIT	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_64BIT$/;"	c
CONFIG_ARCH_UNIPHIER_64BIT_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_64BIT$/;"	c
CONFIG_ARCH_UNIPHIER_LD11	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD11$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_LD11_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD11$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_LD20	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD20$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_LD20_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD20$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_LD4	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD4$/;"	c
CONFIG_ARCH_UNIPHIER_LD4_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD4$/;"	c
CONFIG_ARCH_UNIPHIER_LD4_SLD8	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD4_SLD8$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_LD4_SLD8_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD4_SLD8$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_LD6B	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD6B$/;"	c
CONFIG_ARCH_UNIPHIER_LD6B_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_LD6B$/;"	c
CONFIG_ARCH_UNIPHIER_MODULE	arch/arm/Kconfig	/^config ARCH_UNIPHIER$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_UNIPHIER_PRO4	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO4$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_PRO4_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO4$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_PRO5	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO5$/;"	c
CONFIG_ARCH_UNIPHIER_PRO5_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO5$/;"	c
CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO5_PXS2_LD6B$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PRO5_PXS2_LD6B$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_PXS2	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PXS2$/;"	c
CONFIG_ARCH_UNIPHIER_PXS2_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_PXS2$/;"	c
CONFIG_ARCH_UNIPHIER_SLD3	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_SLD3$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_SLD3_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_SLD3$/;"	c	choice:choicee1e20a3b0104
CONFIG_ARCH_UNIPHIER_SLD8	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_SLD8$/;"	c
CONFIG_ARCH_UNIPHIER_SLD8_MODULE	arch/arm/mach-uniphier/Kconfig	/^config ARCH_UNIPHIER_SLD8$/;"	c
CONFIG_ARCH_ZYNQ	arch/arm/Kconfig	/^config ARCH_ZYNQ$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_ZYNQMP	arch/arm/Kconfig	/^config ARCH_ZYNQMP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_ZYNQMP_MODULE	arch/arm/Kconfig	/^config ARCH_ZYNQMP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARCH_ZYNQ_MODULE	arch/arm/Kconfig	/^config ARCH_ZYNQ$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ARC_MMU_ABSENT	arch/arc/Kconfig	/^config ARC_MMU_ABSENT$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_ABSENT_MODULE	arch/arc/Kconfig	/^config ARC_MMU_ABSENT$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_V2	arch/arc/Kconfig	/^config ARC_MMU_V2$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_V2_MODULE	arch/arc/Kconfig	/^config ARC_MMU_V2$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_V3	arch/arc/Kconfig	/^config ARC_MMU_V3$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_V3_MODULE	arch/arc/Kconfig	/^config ARC_MMU_V3$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_V4	arch/arc/Kconfig	/^config ARC_MMU_V4$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_V4_MODULE	arch/arc/Kconfig	/^config ARC_MMU_V4$/;"	c	choice:ARC architecture""choice763e4ef80304
CONFIG_ARC_MMU_VER	arch/arc/include/asm/cache.h	/^#define CONFIG_ARC_MMU_VER /;"	d
CONFIG_ARC_MODULE	arch/Kconfig	/^config ARC$/;"	c	choice:choice07312ef30104
CONFIG_ARC_SERIAL	include/configs/nsim.h	/^#define CONFIG_ARC_SERIAL$/;"	d
CONFIG_ARC_UART_BASE	include/configs/nsim.h	/^#define CONFIG_ARC_UART_BASE	/;"	d
CONFIG_ARIA	include/configs/aria.h	/^#define CONFIG_ARIA /;"	d
CONFIG_ARIA_FPGA	include/configs/aria.h	/^#define CONFIG_ARIA_FPGA	/;"	d
CONFIG_ARM	arch/Kconfig	/^config ARM$/;"	c	choice:choice07312ef30104
CONFIG_ARM	include/config/auto.conf	/^CONFIG_ARM=y$/;"	k
CONFIG_ARM	include/generated/autoconf.h	/^#define CONFIG_ARM /;"	d
CONFIG_ARM64	arch/arm/Kconfig	/^config ARM64$/;"	c	menu:ARM architecture
CONFIG_ARM64_MODULE	arch/arm/Kconfig	/^config ARM64$/;"	c	menu:ARM architecture
CONFIG_ARM926EJS	include/configs/omapl138_lcdk.h	/^#define CONFIG_ARM926EJS	/;"	d
CONFIG_ARMADA100	include/configs/aspenite.h	/^#define CONFIG_ARMADA100	/;"	d
CONFIG_ARMADA100	include/configs/gplugd.h	/^#define CONFIG_ARMADA100	/;"	d
CONFIG_ARMADA100_FEC	include/configs/gplugd.h	/^#define CONFIG_ARMADA100_FEC$/;"	d
CONFIG_ARMADA100_SPI	include/configs/gplugd.h	/^#define CONFIG_ARMADA100_SPI$/;"	d
CONFIG_ARMADA168	include/configs/aspenite.h	/^#define CONFIG_ARMADA168	/;"	d
CONFIG_ARMADA168	include/configs/gplugd.h	/^#define CONFIG_ARMADA168	/;"	d
CONFIG_ARMADA_32BIT	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_32BIT$/;"	c
CONFIG_ARMADA_32BIT_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_32BIT$/;"	c
CONFIG_ARMADA_3700	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_3700$/;"	c
CONFIG_ARMADA_3700_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_3700$/;"	c
CONFIG_ARMADA_375	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_375$/;"	c
CONFIG_ARMADA_375_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_375$/;"	c
CONFIG_ARMADA_38X	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_38X$/;"	c
CONFIG_ARMADA_38X_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_38X$/;"	c
CONFIG_ARMADA_64BIT	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_64BIT$/;"	c
CONFIG_ARMADA_64BIT_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_64BIT$/;"	c
CONFIG_ARMADA_8K	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_8K$/;"	c
CONFIG_ARMADA_8K_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_8K$/;"	c
CONFIG_ARMADA_XP	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_XP$/;"	c
CONFIG_ARMADA_XP_MODULE	arch/arm/mach-mvebu/Kconfig	/^config ARMADA_XP$/;"	c
CONFIG_ARMCORTEXA9	include/configs/tegra-common.h	/^#define CONFIG_ARMCORTEXA9	/;"	d
CONFIG_ARMV7_BOOT_SEC_DEFAULT	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_BOOT_SEC_DEFAULT$/;"	c
CONFIG_ARMV7_BOOT_SEC_DEFAULT_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_BOOT_SEC_DEFAULT$/;"	c
CONFIG_ARMV7_LPAE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_LPAE$/;"	c
CONFIG_ARMV7_LPAE_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_LPAE$/;"	c
CONFIG_ARMV7_NONSEC	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_NONSEC$/;"	c
CONFIG_ARMV7_NONSEC	include/config/auto.conf	/^CONFIG_ARMV7_NONSEC=y$/;"	k
CONFIG_ARMV7_NONSEC	include/generated/autoconf.h	/^#define CONFIG_ARMV7_NONSEC /;"	d
CONFIG_ARMV7_NONSEC_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_NONSEC$/;"	c
CONFIG_ARMV7_PSCI	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_PSCI$/;"	c
CONFIG_ARMV7_PSCI	include/config/auto.conf	/^CONFIG_ARMV7_PSCI=y$/;"	k
CONFIG_ARMV7_PSCI	include/configs/cei-tk1-som.h	/^#define CONFIG_ARMV7_PSCI	/;"	d
CONFIG_ARMV7_PSCI	include/generated/autoconf.h	/^#define CONFIG_ARMV7_PSCI /;"	d
CONFIG_ARMV7_PSCI_1_0	include/configs/ls1021aqds.h	/^#define CONFIG_ARMV7_PSCI_1_0$/;"	d
CONFIG_ARMV7_PSCI_1_0	include/configs/ls1021atwr.h	/^#define CONFIG_ARMV7_PSCI_1_0$/;"	d
CONFIG_ARMV7_PSCI_1_0	include/configs/uniphier.h	/^#define CONFIG_ARMV7_PSCI_1_0$/;"	d
CONFIG_ARMV7_PSCI_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_PSCI$/;"	c
CONFIG_ARMV7_PSCI_NR_CPUS	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_PSCI_NR_CPUS$/;"	c
CONFIG_ARMV7_PSCI_NR_CPUS	include/config/auto.conf	/^CONFIG_ARMV7_PSCI_NR_CPUS=4$/;"	k
CONFIG_ARMV7_PSCI_NR_CPUS	include/configs/cei-tk1-som.h	/^#define CONFIG_ARMV7_PSCI_NR_CPUS	/;"	d
CONFIG_ARMV7_PSCI_NR_CPUS	include/generated/autoconf.h	/^#define CONFIG_ARMV7_PSCI_NR_CPUS /;"	d
CONFIG_ARMV7_PSCI_NR_CPUS_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_PSCI_NR_CPUS$/;"	c
CONFIG_ARMV7_SECURE_BASE	arch/arm/cpu/u-boot.lds	/^	.secure_text CONFIG_ARMV7_SECURE_BASE :$/;"	S
CONFIG_ARMV7_SECURE_BASE	arch/arm/cpu/u-boot.lds	/^#define CONFIG_ARMV7_SECURE_BASE$/;"	d	file:
CONFIG_ARMV7_SECURE_BASE	include/configs/cei-tk1-som.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_BASE	include/configs/jetson-tk1.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_BASE	include/configs/mx7_common.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_BASE	include/configs/sun6i.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_BASE	include/configs/sun7i.h	/^#define CONFIG_ARMV7_SECURE_BASE	/;"	d
CONFIG_ARMV7_SECURE_MAX_SIZE	include/configs/sun6i.h	/^#define CONFIG_ARMV7_SECURE_MAX_SIZE /;"	d
CONFIG_ARMV7_SECURE_MAX_SIZE	include/configs/sun7i.h	/^#define CONFIG_ARMV7_SECURE_MAX_SIZE	/;"	d
CONFIG_ARMV7_SECURE_RESERVE_SIZE	include/configs/cei-tk1-som.h	/^#define CONFIG_ARMV7_SECURE_RESERVE_SIZE	/;"	d
CONFIG_ARMV7_SECURE_RESERVE_SIZE	include/configs/jetson-tk1.h	/^#define CONFIG_ARMV7_SECURE_RESERVE_SIZE	/;"	d
CONFIG_ARMV7_VIRT	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_VIRT$/;"	c
CONFIG_ARMV7_VIRT	include/config/auto.conf	/^CONFIG_ARMV7_VIRT=y$/;"	k
CONFIG_ARMV7_VIRT	include/generated/autoconf.h	/^#define CONFIG_ARMV7_VIRT /;"	d
CONFIG_ARMV7_VIRT_MODULE	arch/arm/cpu/armv7/Kconfig	/^config ARMV7_VIRT$/;"	c
CONFIG_ARMV8_MULTIENTRY	arch/arm/cpu/armv8/Kconfig	/^config ARMV8_MULTIENTRY$/;"	c
CONFIG_ARMV8_MULTIENTRY_MODULE	arch/arm/cpu/armv8/Kconfig	/^config ARMV8_MULTIENTRY$/;"	c
CONFIG_ARMV8_PSCI	include/configs/ls1043ardb.h	/^#define CONFIG_ARMV8_PSCI$/;"	d
CONFIG_ARMV8_PSCI	include/configs/ls1046ardb.h	/^#define CONFIG_ARMV8_PSCI$/;"	d
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT	include/configs/ls1043ardb.h	/^#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT$/;"	d
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT	include/configs/ls1046ardb.h	/^#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT$/;"	d
CONFIG_ARMV8_SPIN_TABLE	arch/arm/cpu/armv8/Kconfig	/^config ARMV8_SPIN_TABLE$/;"	c
CONFIG_ARMV8_SPIN_TABLE_MODULE	arch/arm/cpu/armv8/Kconfig	/^config ARMV8_SPIN_TABLE$/;"	c
CONFIG_ARMV8_SWITCH_TO_EL1	include/configs/vexpress_aemv8a.h	/^#define CONFIG_ARMV8_SWITCH_TO_EL1$/;"	d
CONFIG_ARM_ARCH_CP15_ERRATA	include/configs/sniper.h	/^#define CONFIG_ARM_ARCH_CP15_ERRATA$/;"	d
CONFIG_ARM_DCC	include/configs/xilinx_zynqmp.h	/^#define CONFIG_ARM_DCC$/;"	d
CONFIG_ARM_DCC	include/configs/zynq-common.h	/^#define CONFIG_ARM_DCC$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/am3517_crane.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/am3517_evm.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/cm_t35.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/cm_t3517.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/mcx.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/nokia_rx51.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/omap3_evm.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/sniper.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/tam3517-common.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/tao3530.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/ti_omap3_common.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_430973	include/configs/tricorder.h	/^#define CONFIG_ARM_ERRATA_430973$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/am3517_crane.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/am3517_evm.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/cm_t35.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/cm_t3517.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/mcx.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/nokia_rx51.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/omap3_evm.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/sniper.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/tam3517-common.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/tao3530.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/ti_omap3_common.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_454179	include/configs/tricorder.h	/^#define CONFIG_ARM_ERRATA_454179$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/am3517_crane.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/am3517_evm.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/cm_t35.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/cm_t3517.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/mcx.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/nokia_rx51.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/omap3_evm.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/sniper.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/tam3517-common.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/tao3530.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/ti_omap3_common.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_621766	include/configs/tricorder.h	/^#define CONFIG_ARM_ERRATA_621766$/;"	d
CONFIG_ARM_ERRATA_716044	include/configs/tegra20-common.h	/^#define CONFIG_ARM_ERRATA_716044$/;"	d
CONFIG_ARM_ERRATA_742230	include/configs/tegra20-common.h	/^#define CONFIG_ARM_ERRATA_742230$/;"	d
CONFIG_ARM_ERRATA_743622	include/configs/mx6_common.h	/^#define CONFIG_ARM_ERRATA_743622$/;"	d
CONFIG_ARM_ERRATA_743622	include/configs/tegra30-common.h	/^#define CONFIG_ARM_ERRATA_743622$/;"	d
CONFIG_ARM_ERRATA_751472	include/configs/mx6_common.h	/^#define CONFIG_ARM_ERRATA_751472$/;"	d
CONFIG_ARM_ERRATA_751472	include/configs/tegra20-common.h	/^#define CONFIG_ARM_ERRATA_751472$/;"	d
CONFIG_ARM_ERRATA_751472	include/configs/tegra30-common.h	/^#define CONFIG_ARM_ERRATA_751472$/;"	d
CONFIG_ARM_ERRATA_761320	include/configs/mx6_common.h	/^#define CONFIG_ARM_ERRATA_761320$/;"	d
CONFIG_ARM_ERRATA_773022	include/configs/arndale.h	/^#define CONFIG_ARM_ERRATA_773022$/;"	d
CONFIG_ARM_ERRATA_774769	include/configs/arndale.h	/^#define CONFIG_ARM_ERRATA_774769$/;"	d
CONFIG_ARM_ERRATA_794072	include/configs/mx6_common.h	/^#define CONFIG_ARM_ERRATA_794072$/;"	d
CONFIG_ARM_ERRATA_798870	include/configs/ti_omap5_common.h	/^#define CONFIG_ARM_ERRATA_798870$/;"	d
CONFIG_ARM_ERRATA_826974	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_ARM_ERRATA_826974$/;"	d
CONFIG_ARM_ERRATA_828024	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_ARM_ERRATA_828024$/;"	d
CONFIG_ARM_ERRATA_829520	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_ARM_ERRATA_829520$/;"	d
CONFIG_ARM_ERRATA_833471	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_ARM_ERRATA_833471$/;"	d
CONFIG_ARM_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_ARM_FREQ	/;"	d
CONFIG_ARM_GIC_BASE_ADDRESS	include/configs/arndale.h	/^#define CONFIG_ARM_GIC_BASE_ADDRESS	/;"	d
CONFIG_ARM_MODULE	arch/Kconfig	/^config ARM$/;"	c	choice:choice07312ef30104
CONFIG_ARM_PL180_MMCI	include/configs/vexpress_common.h	/^#define CONFIG_ARM_PL180_MMCI$/;"	d
CONFIG_ARM_PL180_MMCI_BASE	include/configs/vexpress_common.h	/^#define CONFIG_ARM_PL180_MMCI_BASE	/;"	d
CONFIG_ARM_PL180_MMCI_CLOCK_FREQ	include/configs/vexpress_common.h	/^#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ /;"	d
CONFIG_ARP_TIMEOUT	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/ac14xx.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ARP_TIMEOUT /;"	d
CONFIG_ARP_TIMEOUT	include/configs/aristainetos-common.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/cm_fx6.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/cm_t3517.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/el6x_common.h	/^#define CONFIG_ARP_TIMEOUT /;"	d
CONFIG_ARP_TIMEOUT	include/configs/embestmx6boards.h	/^#define CONFIG_ARP_TIMEOUT /;"	d
CONFIG_ARP_TIMEOUT	include/configs/flea3.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/ge_bx50v3.h	/^#define CONFIG_ARP_TIMEOUT /;"	d
CONFIG_ARP_TIMEOUT	include/configs/gw_ventana.h	/^#define CONFIG_ARP_TIMEOUT /;"	d
CONFIG_ARP_TIMEOUT	include/configs/ma5d4evk.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx31ads.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx35pdk.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx51evk.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx53ard.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx53evk.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx53loco.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx53smd.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx6qarm2.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/mx6sabre_common.h	/^#define CONFIG_ARP_TIMEOUT /;"	d
CONFIG_ARP_TIMEOUT	include/configs/novena.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/pic32mzdask.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/socfpga_is1.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/tqma6.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_ARP_TIMEOUT	include/configs/woodburn_common.h	/^#define CONFIG_ARP_TIMEOUT	/;"	d
CONFIG_AS3722_POWER	include/configs/cei-tk1-som.h	/^#define CONFIG_AS3722_POWER$/;"	d
CONFIG_AS3722_POWER	include/configs/jetson-tk1.h	/^#define CONFIG_AS3722_POWER$/;"	d
CONFIG_AS3722_POWER	include/configs/nyan-big.h	/^#define CONFIG_AS3722_POWER$/;"	d
CONFIG_ASTRO5373L	include/configs/astro_mcf5373l.h	/^#define CONFIG_ASTRO5373L	/;"	d
CONFIG_ASTRO_V532	include/configs/astro_mcf5373l.h	/^#define CONFIG_ASTRO_V532	/;"	d
CONFIG_AT32AP	include/configs/atngw100.h	/^#define CONFIG_AT32AP$/;"	d
CONFIG_AT32AP	include/configs/atngw100mkii.h	/^#define CONFIG_AT32AP$/;"	d
CONFIG_AT32AP	include/configs/atstk1002.h	/^#define CONFIG_AT32AP$/;"	d
CONFIG_AT32AP	include/configs/grasshopper.h	/^#define CONFIG_AT32AP$/;"	d
CONFIG_AT32AP7000	include/configs/atngw100.h	/^#define CONFIG_AT32AP7000$/;"	d
CONFIG_AT32AP7000	include/configs/atngw100mkii.h	/^#define CONFIG_AT32AP7000$/;"	d
CONFIG_AT32AP7000	include/configs/atstk1002.h	/^#define CONFIG_AT32AP7000$/;"	d
CONFIG_AT32AP7000	include/configs/grasshopper.h	/^#define CONFIG_AT32AP7000$/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91FAMILY	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define CONFIG_AT91FAMILY	/;"	d
CONFIG_AT91RM9200	include/configs/at91rm9200ek.h	/^#define CONFIG_AT91RM9200$/;"	d
CONFIG_AT91RM9200EK	include/configs/at91rm9200ek.h	/^#define CONFIG_AT91RM9200EK$/;"	d
CONFIG_AT91SAM9260EK	include/configs/at91sam9260ek.h	/^# define CONFIG_AT91SAM9260EK	/;"	d
CONFIG_AT91SAM9261EK	include/configs/at91sam9261ek.h	/^#define CONFIG_AT91SAM9261EK	/;"	d
CONFIG_AT91SAM9263EK	include/configs/at91sam9263ek.h	/^#define CONFIG_AT91SAM9263EK	/;"	d
CONFIG_AT91SAM9G10EK	include/configs/at91sam9261ek.h	/^#define CONFIG_AT91SAM9G10EK	/;"	d
CONFIG_AT91SAM9G20EK	include/configs/at91sam9260ek.h	/^# define CONFIG_AT91SAM9G20EK	/;"	d
CONFIG_AT91SAM9G45_LCD_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AT91SAM9G45_LCD_BASE	/;"	d
CONFIG_AT91SAM9G45_LCD_BASE	include/configs/picosam9g45.h	/^#define CONFIG_AT91SAM9G45_LCD_BASE	/;"	d
CONFIG_AT91SAM9G45_LCD_BASE	include/configs/pm9g45.h	/^#define CONFIG_AT91SAM9G45_LCD_BASE	/;"	d
CONFIG_AT91SAM9M10G45EK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AT91SAM9M10G45EK$/;"	d
CONFIG_AT91SAM9RLEK	include/configs/at91sam9rlek.h	/^#define CONFIG_AT91SAM9RLEK	/;"	d
CONFIG_AT91SAM9X5EK	include/configs/at91sam9x5ek.h	/^#define CONFIG_AT91SAM9X5EK$/;"	d
CONFIG_AT91SAM9_WATCHDOG	include/configs/picosam9g45.h	/^#define CONFIG_AT91SAM9_WATCHDOG$/;"	d
CONFIG_AT91SAM9_WATCHDOG	include/configs/smartweb.h	/^#define CONFIG_AT91SAM9_WATCHDOG$/;"	d
CONFIG_AT91SAM9_WATCHDOG	include/configs/taurus.h	/^#define CONFIG_AT91SAM9_WATCHDOG$/;"	d
CONFIG_AT91_EFLASH	include/configs/ethernut5.h	/^# define CONFIG_AT91_EFLASH$/;"	d
CONFIG_AT91_GENERIC_CLK	drivers/clk/at91/Kconfig	/^config AT91_GENERIC_CLK$/;"	c
CONFIG_AT91_GENERIC_CLK_MODULE	drivers/clk/at91/Kconfig	/^config AT91_GENERIC_CLK$/;"	c
CONFIG_AT91_GPIO	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/at91-sama5_common.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9260ek.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9261ek.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9263ek.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9n12ek.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9rlek.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/at91sam9x5ek.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/corvus.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/ethernut5.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/meesc.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/picosam9g45.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/pm9261.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/pm9263.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/pm9g45.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/smartweb.h	/^#define CONFIG_AT91_GPIO	/;"	d
CONFIG_AT91_GPIO	include/configs/snapper9260.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/snapper9g45.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/taurus.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO	include/configs/usb_a9263.h	/^#define CONFIG_AT91_GPIO$/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/at91sam9260ek.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/at91sam9261ek.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/at91sam9263ek.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/at91sam9rlek.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/corvus.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/picosam9g45.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/smartweb.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/snapper9260.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/snapper9g45.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_GPIO_PULLUP	include/configs/taurus.h	/^#define CONFIG_AT91_GPIO_PULLUP	/;"	d
CONFIG_AT91_H32MX	drivers/clk/at91/Kconfig	/^config AT91_H32MX$/;"	c
CONFIG_AT91_H32MX_MODULE	drivers/clk/at91/Kconfig	/^config AT91_H32MX$/;"	c
CONFIG_AT91_HW_WDT_TIMEOUT	include/configs/smartweb.h	/^#define CONFIG_AT91_HW_WDT_TIMEOUT	/;"	d
CONFIG_AT91_HW_WDT_TIMEOUT	include/configs/taurus.h	/^#define CONFIG_AT91_HW_WDT_TIMEOUT	/;"	d
CONFIG_AT91_LED	include/configs/at91sam9260ek.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/at91sam9261ek.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/at91sam9263ek.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/at91sam9rlek.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/corvus.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/meesc.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/picosam9g45.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/pm9261.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/pm9263.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_LED	include/configs/pm9g45.h	/^#define CONFIG_AT91_LED$/;"	d
CONFIG_AT91_UTMI	drivers/clk/at91/Kconfig	/^config AT91_UTMI$/;"	c
CONFIG_AT91_UTMI_MODULE	drivers/clk/at91/Kconfig	/^config AT91_UTMI$/;"	c
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/at91sam9260ek.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/at91sam9263ek.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/corvus.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/picosam9g45.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/smartweb.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/snapper9260.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/snapper9g45.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/taurus.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_AT91_WANTS_COMMON_PHY	include/configs/usb_a9263.h	/^#define CONFIG_AT91_WANTS_COMMON_PHY$/;"	d
CONFIG_ATAPI	include/configs/M5253DEMO.h	/^#	define CONFIG_ATAPI$/;"	d
CONFIG_ATAPI	include/configs/M5253EVBE.h	/^#define CONFIG_ATAPI$/;"	d
CONFIG_ATAPI	include/configs/M54455EVB.h	/^#define CONFIG_ATAPI$/;"	d
CONFIG_ATAPI	include/configs/MIP405.h	/^#define CONFIG_ATAPI	/;"	d
CONFIG_ATAPI	include/configs/PIP405.h	/^#define CONFIG_ATAPI	/;"	d
CONFIG_ATAPI	include/configs/TQM5200.h	/^#define CONFIG_ATAPI	/;"	d
CONFIG_ATAPI	include/configs/a4m072.h	/^#define CONFIG_ATAPI /;"	d
CONFIG_ATAPI	include/configs/dbau1x00.h	/^#define CONFIG_ATAPI /;"	d
CONFIG_ATAPI	include/configs/digsy_mtc.h	/^#define CONFIG_ATAPI	/;"	d
CONFIG_ATAPI	include/configs/inka4x0.h	/^#define CONFIG_ATAPI /;"	d
CONFIG_ATAPI	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_ATAPI /;"	d
CONFIG_ATAPI	include/configs/pcm030.h	/^#define CONFIG_ATAPI	/;"	d
CONFIG_ATAPI	include/configs/qemu-x86.h	/^#define CONFIG_ATAPI$/;"	d
CONFIG_ATH79_SPI	drivers/spi/Kconfig	/^config ATH79_SPI$/;"	c	menu:SPI Support
CONFIG_ATH79_SPI_MODULE	drivers/spi/Kconfig	/^config ATH79_SPI$/;"	c	menu:SPI Support
CONFIG_ATI_RADEON_FB	include/configs/MPC8536DS.h	/^#define CONFIG_ATI_RADEON_FB$/;"	d
CONFIG_ATI_RADEON_FB	include/configs/MPC8544DS.h	/^#define CONFIG_ATI_RADEON_FB$/;"	d
CONFIG_ATI_RADEON_FB	include/configs/MPC8572DS.h	/^#define CONFIG_ATI_RADEON_FB$/;"	d
CONFIG_ATI_RADEON_FB	include/configs/MPC8641HPCN.h	/^#define CONFIG_ATI_RADEON_FB$/;"	d
CONFIG_ATI_RADEON_FB	include/configs/P1022DS.h	/^#define CONFIG_ATI_RADEON_FB$/;"	d
CONFIG_ATI_RADEON_FB	include/configs/sequoia.h	/^#define CONFIG_ATI_RADEON_FB	/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/at91sam9260ek.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/at91sam9261ek.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/at91sam9263ek.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/at91sam9rlek.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/ethernut5.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/meesc.h	/^# define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/pm9261.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/pm9263.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_DATAFLASH_SPI	include/configs/usb_a9263.h	/^#define CONFIG_ATMEL_DATAFLASH_SPI$/;"	d
CONFIG_ATMEL_HLCD	include/configs/at91sam9n12ek.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_HLCD	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_HLCD	include/configs/ma5d4evk.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_HLCD	include/configs/sama5d2_xplained.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_HLCD	include/configs/sama5d3xek.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_HLCD	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_HLCD	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_HLCD$/;"	d
CONFIG_ATMEL_LCD	include/configs/at91sam9261ek.h	/^#define CONFIG_ATMEL_LCD$/;"	d
CONFIG_ATMEL_LCD	include/configs/at91sam9263ek.h	/^#define CONFIG_ATMEL_LCD	/;"	d
CONFIG_ATMEL_LCD	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ATMEL_LCD$/;"	d
CONFIG_ATMEL_LCD	include/configs/at91sam9rlek.h	/^#define CONFIG_ATMEL_LCD	/;"	d
CONFIG_ATMEL_LCD	include/configs/picosam9g45.h	/^#define CONFIG_ATMEL_LCD$/;"	d
CONFIG_ATMEL_LCD	include/configs/pm9261.h	/^#define CONFIG_ATMEL_LCD	/;"	d
CONFIG_ATMEL_LCD	include/configs/pm9263.h	/^#define CONFIG_ATMEL_LCD	/;"	d
CONFIG_ATMEL_LCD	include/configs/snapper9g45.h	/^#define CONFIG_ATMEL_LCD$/;"	d
CONFIG_ATMEL_LCD_BGR555	include/configs/at91sam9261ek.h	/^#define CONFIG_ATMEL_LCD_BGR555$/;"	d
CONFIG_ATMEL_LCD_BGR555	include/configs/at91sam9263ek.h	/^#define CONFIG_ATMEL_LCD_BGR555	/;"	d
CONFIG_ATMEL_LCD_BGR555	include/configs/pm9261.h	/^#define CONFIG_ATMEL_LCD_BGR555	/;"	d
CONFIG_ATMEL_LCD_BGR555	include/configs/pm9263.h	/^#define CONFIG_ATMEL_LCD_BGR555	/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/at91sam9n12ek.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/at91sam9rlek.h	/^#define CONFIG_ATMEL_LCD_RGB565	/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/picosam9g45.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/sama5d2_xplained.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/sama5d3xek.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LCD_RGB565	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_LCD_RGB565$/;"	d
CONFIG_ATMEL_LEGACY	drivers/spi/atmel_dataflash_spi.c	/^# define CONFIG_ATMEL_LEGACY$/;"	d	file:
CONFIG_ATMEL_LEGACY	include/configs/at91sam9260ek.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_LEGACY	include/configs/at91sam9261ek.h	/^#define CONFIG_ATMEL_LEGACY$/;"	d
CONFIG_ATMEL_LEGACY	include/configs/at91sam9263ek.h	/^#define CONFIG_ATMEL_LEGACY$/;"	d
CONFIG_ATMEL_LEGACY	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_LEGACY	include/configs/at91sam9rlek.h	/^#define CONFIG_ATMEL_LEGACY$/;"	d
CONFIG_ATMEL_LEGACY	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_LEGACY	include/configs/corvus.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_LEGACY	include/configs/picosam9g45.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_LEGACY	include/configs/smartweb.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_LEGACY	include/configs/snapper9260.h	/^#define CONFIG_ATMEL_LEGACY$/;"	d
CONFIG_ATMEL_LEGACY	include/configs/snapper9g45.h	/^#define CONFIG_ATMEL_LEGACY$/;"	d
CONFIG_ATMEL_LEGACY	include/configs/taurus.h	/^#define CONFIG_ATMEL_LEGACY	/;"	d
CONFIG_ATMEL_MCI_8BIT	include/configs/sama5d3_xplained.h	/^#define CONFIG_ATMEL_MCI_8BIT$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/at91sam9n12ek.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_NAND_HWECC	/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/sama5d2_ptc.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/sama5d3_xplained.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/sama5d3xek.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HWECC	include/configs/snapper9g45.h	/^#define CONFIG_ATMEL_NAND_HWECC$/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/at91sam9n12ek.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC$/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC	/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/sama5d2_ptc.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC$/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/sama5d3_xplained.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC$/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/sama5d3xek.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC$/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC$/;"	d
CONFIG_ATMEL_NAND_HW_PMECC	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_NAND_HW_PMECC$/;"	d
CONFIG_ATMEL_PIO4	drivers/gpio/Kconfig	/^config ATMEL_PIO4$/;"	c	menu:GPIO Support
CONFIG_ATMEL_PIO4	include/configs/sama5d2_ptc.h	/^#define CONFIG_ATMEL_PIO4$/;"	d
CONFIG_ATMEL_PIO4_MODULE	drivers/gpio/Kconfig	/^config ATMEL_PIO4$/;"	c	menu:GPIO Support
CONFIG_ATMEL_SDHCI	drivers/mmc/Kconfig	/^config ATMEL_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_ATMEL_SDHCI_MODULE	drivers/mmc/Kconfig	/^config ATMEL_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_ATMEL_SPI	drivers/spi/Kconfig	/^config ATMEL_SPI$/;"	c	menu:SPI Support
CONFIG_ATMEL_SPI	include/configs/at91sam9n12ek.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/atngw100.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/atngw100mkii.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/ethernut5.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/ma5d4evk.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/sama5d2_ptc.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/sama5d3xek.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/snapper9g45.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/taurus.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI	include/configs/vinco.h	/^#define CONFIG_ATMEL_SPI$/;"	d
CONFIG_ATMEL_SPI0	include/configs/ma5d4evk.h	/^#define CONFIG_ATMEL_SPI0$/;"	d
CONFIG_ATMEL_SPI0	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_SPI0$/;"	d
CONFIG_ATMEL_SPI0	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_SPI0$/;"	d
CONFIG_ATMEL_SPI0	include/configs/vinco.h	/^#define CONFIG_ATMEL_SPI0$/;"	d
CONFIG_ATMEL_SPI_MODULE	drivers/spi/Kconfig	/^config ATMEL_SPI$/;"	c	menu:SPI Support
CONFIG_ATMEL_USART	drivers/serial/Kconfig	/^config ATMEL_USART$/;"	c	menu:Serial drivers
CONFIG_ATMEL_USART	include/configs/at91rm9200ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9260ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9261ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9263ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9n12ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9rlek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/at91sam9x5ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/atngw100.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/atngw100mkii.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/atstk1002.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/corvus.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/ethernut5.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/grasshopper.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/ma5d4evk.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/meesc.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/picosam9g45.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/pm9261.h	/^#define CONFIG_ATMEL_USART	/;"	d
CONFIG_ATMEL_USART	include/configs/pm9263.h	/^#define CONFIG_ATMEL_USART	/;"	d
CONFIG_ATMEL_USART	include/configs/pm9g45.h	/^#define CONFIG_ATMEL_USART	/;"	d
CONFIG_ATMEL_USART	include/configs/sama5d2_ptc.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/sama5d3_xplained.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/sama5d3xek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/sama5d4_xplained.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/sama5d4ek.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/smartweb.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/snapper9260.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/snapper9g45.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/taurus.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/usb_a9263.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART	include/configs/vinco.h	/^#define CONFIG_ATMEL_USART$/;"	d
CONFIG_ATMEL_USART_MODULE	drivers/serial/Kconfig	/^config ATMEL_USART$/;"	c	menu:Serial drivers
CONFIG_ATNGW100	include/configs/atngw100.h	/^#define CONFIG_ATNGW100$/;"	d
CONFIG_ATNGW100MKII	include/configs/atngw100mkii.h	/^#define CONFIG_ATNGW100MKII$/;"	d
CONFIG_ATSTK1000	include/configs/atstk1002.h	/^#define CONFIG_ATSTK1000$/;"	d
CONFIG_ATSTK1002	include/configs/atstk1002.h	/^#define CONFIG_ATSTK1002$/;"	d
CONFIG_AT_TRANS	include/i8042.h	/^#define CONFIG_AT_TRANS	/;"	d
CONFIG_AUTOBOOT	cmd/Kconfig	/^config AUTOBOOT$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT	include/config/auto.conf	/^CONFIG_AUTOBOOT=y$/;"	k
CONFIG_AUTOBOOT	include/generated/autoconf.h	/^#define CONFIG_AUTOBOOT /;"	d
CONFIG_AUTOBOOT_DELAY_STR	cmd/Kconfig	/^config AUTOBOOT_DELAY_STR$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_DELAY_STR_MODULE	cmd/Kconfig	/^config AUTOBOOT_DELAY_STR$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_ENCRYPTION	cmd/Kconfig	/^config AUTOBOOT_ENCRYPTION$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_ENCRYPTION_MODULE	cmd/Kconfig	/^config AUTOBOOT_ENCRYPTION$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_KEYED	cmd/Kconfig	/^config AUTOBOOT_KEYED$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_KEYED_CTRLC	cmd/Kconfig	/^config AUTOBOOT_KEYED_CTRLC$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_KEYED_CTRLC_MODULE	cmd/Kconfig	/^config AUTOBOOT_KEYED_CTRLC$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_KEYED_MODULE	cmd/Kconfig	/^config AUTOBOOT_KEYED$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_MODULE	cmd/Kconfig	/^config AUTOBOOT$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_PROMPT	cmd/Kconfig	/^config AUTOBOOT_PROMPT$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_PROMPT_MODULE	cmd/Kconfig	/^config AUTOBOOT_PROMPT$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_STOP_STR	cmd/Kconfig	/^config AUTOBOOT_STOP_STR$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_STOP_STR_MODULE	cmd/Kconfig	/^config AUTOBOOT_STOP_STR$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_STOP_STR_SHA256	cmd/Kconfig	/^config AUTOBOOT_STOP_STR_SHA256$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOBOOT_STOP_STR_SHA256_MODULE	cmd/Kconfig	/^config AUTOBOOT_STOP_STR_SHA256$/;"	c	menu:Command line interface""Autoboot options
CONFIG_AUTOCALIB	include/configs/canyonlands.h	/^#define CONFIG_AUTOCALIB	/;"	d
CONFIG_AUTOCALIB	include/configs/intip.h	/^#define CONFIG_AUTOCALIB	/;"	d
CONFIG_AUTOCALIB	include/configs/io64.h	/^#define CONFIG_AUTOCALIB	/;"	d
CONFIG_AUTOCALIB	include/configs/kilauea.h	/^#define CONFIG_AUTOCALIB	/;"	d
CONFIG_AUTOCALIB	include/configs/t3corp.h	/^#define CONFIG_AUTOCALIB	/;"	d
CONFIG_AUTONEG_TIMEOUT	include/configs/socfpga_common.h	/^#define CONFIG_AUTONEG_TIMEOUT	/;"	d
CONFIG_AUTO_COMPLETE	include/autoconf.mk	/^CONFIG_AUTO_COMPLETE=y$/;"	m
CONFIG_AUTO_COMPLETE	include/config_distro_defaults.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/10m50_devboard.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/3c120_devboard.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/B4860QDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/BSC9131RDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/BSC9132QDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/C29XPCIE.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/CPCI2DP.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/M5249EVB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8313ERDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8315ERDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8323ERDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC832XEMDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8349EMDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8349ITX.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC837XEMDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC837XERDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8536DS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8540ADS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8541CDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8544DS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8548CDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8555CDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8560ADS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8568MDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8569MDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/MPC8572DS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/P1010RDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/P1022DS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/P2041RDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/PLU405.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T102xQDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T102xRDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T1040QDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T104xRDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T208xQDS.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T208xRDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/T4240RDB.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/TQM834x.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/am3517_crane.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/am3517_evm.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/amcc-common.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/amcore.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ap121.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ap143.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/apf27.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91-sama5_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91rm9200ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9260ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9261ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9263ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9n12ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9rlek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/at91sam9x5ek.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/axs10x.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/bcm23550_w1d.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/bcm28155_ap.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/bcm_ep_board.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/bfin_adi_common.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/blackstamp.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/blackvme.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/bur_cfg_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/calimain.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/cm_t35.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/cm_t3517.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/colibri_pxa270.h	/^#define	CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/controlcenterd.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/corenet_ds.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/corvus.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/cyrus.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/da850evm.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/devkit3250.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/digsy_mtc.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ea20.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/eco5pk.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/flea3.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ge_bx50v3.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/grasshopper.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/hrcon.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ipam390.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/kc1.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/km/keymile-common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/legoev3.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1012a_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1021aqds.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1021atwr.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1043a_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1043aqds.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1046a_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls1046aqds.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ls2080a_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/m53evk.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/malta.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/manroland/common.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mcx.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/meesc.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mt_ventoux.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mv-common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx25pdk.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx35pdk.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx51evk.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx53ard.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx53evk.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx53loco.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx53smd.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx6_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mx7_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/mxs.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/nas220.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/nokia_rx51.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/nsim.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/omap3_evm.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/omap3_logic.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/omapl138_lcdk.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/pcm052.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/picosam9g45.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/pm9g45.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/qemu-mips.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/qemu-mips64.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/qemu-ppce500.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/sandbox.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/sbc8349.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/sbc8548.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/sh7752evb.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/sh7753evb.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/siemens-am33x-common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/smartweb.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/snapper9260.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/snapper9g45.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/sniper.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/socfpga_common.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/socrates.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/stm32f429-discovery.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/stm32f746-disco.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/strider.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/t4qds.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/tam3517-common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/tao3530.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/taurus.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/tb100.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ti_armv7_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/tplink_wdr4300.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/tricorder.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ts4800.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/usb_a9263.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/ve8313.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/vme8349.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/woodburn_common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/work_92105.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/x600.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/x86-common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/xilinx-ppc.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AUTO_COMPLETE	include/configs/xpedite520x.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/xpedite537x.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/xpedite550x.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/xtfpga.h	/^#define CONFIG_AUTO_COMPLETE	/;"	d
CONFIG_AUTO_COMPLETE	include/configs/zynq-common.h	/^#define CONFIG_AUTO_COMPLETE$/;"	d
CONFIG_AVR32	arch/Kconfig	/^config AVR32$/;"	c	choice:choice07312ef30104
CONFIG_AVR32_MODULE	arch/Kconfig	/^config AVR32$/;"	c	choice:choice07312ef30104
CONFIG_AXP152_POWER	drivers/power/Kconfig	/^config AXP152_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP152_POWER_MODULE	drivers/power/Kconfig	/^config AXP152_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP209_POWER	drivers/power/Kconfig	/^config AXP209_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP209_POWER_MODULE	drivers/power/Kconfig	/^config AXP209_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP221_POWER	drivers/power/Kconfig	/^config AXP221_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP221_POWER_MODULE	drivers/power/Kconfig	/^config AXP221_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP809_POWER	drivers/power/Kconfig	/^config AXP809_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP809_POWER_MODULE	drivers/power/Kconfig	/^config AXP809_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP818_POWER	drivers/power/Kconfig	/^config AXP818_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP818_POWER_MODULE	drivers/power/Kconfig	/^config AXP818_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_AXP_ALDO1_VOLT	drivers/power/Kconfig	/^config AXP_ALDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO1_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ALDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO2_VOLT	drivers/power/Kconfig	/^config AXP_ALDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO2_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ALDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO3_VOLT	drivers/power/Kconfig	/^config AXP_ALDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO3_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ALDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO4_VOLT	drivers/power/Kconfig	/^config AXP_ALDO4_VOLT$/;"	c	menu:Power
CONFIG_AXP_ALDO4_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ALDO4_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC1_VOLT	drivers/power/Kconfig	/^config AXP_DCDC1_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC1_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DCDC1_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC2_VOLT	drivers/power/Kconfig	/^config AXP_DCDC2_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC2_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DCDC2_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC3_VOLT	drivers/power/Kconfig	/^config AXP_DCDC3_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC3_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DCDC3_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC4_VOLT	drivers/power/Kconfig	/^config AXP_DCDC4_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC4_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DCDC4_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC5_VOLT	drivers/power/Kconfig	/^config AXP_DCDC5_VOLT$/;"	c	menu:Power
CONFIG_AXP_DCDC5_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DCDC5_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO1_VOLT	drivers/power/Kconfig	/^config AXP_DLDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO1_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DLDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO2_VOLT	drivers/power/Kconfig	/^config AXP_DLDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO2_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DLDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO3_VOLT	drivers/power/Kconfig	/^config AXP_DLDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO3_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DLDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO4_VOLT	drivers/power/Kconfig	/^config AXP_DLDO4_VOLT$/;"	c	menu:Power
CONFIG_AXP_DLDO4_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_DLDO4_VOLT$/;"	c	menu:Power
CONFIG_AXP_ELDO1_VOLT	drivers/power/Kconfig	/^config AXP_ELDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_ELDO1_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ELDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_ELDO2_VOLT	drivers/power/Kconfig	/^config AXP_ELDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_ELDO2_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ELDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_ELDO3_VOLT	drivers/power/Kconfig	/^config AXP_ELDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_ELDO3_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_ELDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_FLDO1_VOLT	drivers/power/Kconfig	/^config AXP_FLDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_FLDO1_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_FLDO1_VOLT$/;"	c	menu:Power
CONFIG_AXP_FLDO2_VOLT	drivers/power/Kconfig	/^config AXP_FLDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_FLDO2_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_FLDO2_VOLT$/;"	c	menu:Power
CONFIG_AXP_FLDO3_VOLT	drivers/power/Kconfig	/^config AXP_FLDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_FLDO3_VOLT_MODULE	drivers/power/Kconfig	/^config AXP_FLDO3_VOLT$/;"	c	menu:Power
CONFIG_AXP_GPIO	board/sunxi/Kconfig	/^config AXP_GPIO$/;"	c
CONFIG_AXP_GPIO_MODULE	board/sunxi/Kconfig	/^config AXP_GPIO$/;"	c
CONFIG_AXP_SW_ON	drivers/power/Kconfig	/^config AXP_SW_ON$/;"	c	menu:Power
CONFIG_AXP_SW_ON_MODULE	drivers/power/Kconfig	/^config AXP_SW_ON$/;"	c	menu:Power
CONFIG_B2_SAMPLE	board/bosch/shc/Kconfig	/^config B2_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_B2_SAMPLE_MODULE	board/bosch/shc/Kconfig	/^config B2_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_B4860QDS	include/configs/B4860QDS.h	/^#define CONFIG_B4860QDS$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/P2041RDB.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/T102xQDS.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/T102xRDB.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/T1040QDS.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/T104xRDB.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/corenet_ds.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/cyrus.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BACKSIDE_L2_CACHE	include/configs/km/kmp204x-common.h	/^#define CONFIG_BACKSIDE_L2_CACHE$/;"	d
CONFIG_BAMBOO	include/configs/bamboo.h	/^#define CONFIG_BAMBOO	/;"	d
CONFIG_BAMBOO_NAND	include/configs/bamboo.h	/^#define CONFIG_BAMBOO_NAND /;"	d
CONFIG_BARIX_IPAM390	include/configs/ipam390.h	/^#define CONFIG_BARIX_IPAM390$/;"	d
CONFIG_BAT_PAIR	arch/powerpc/cpu/mpc86xx/start.S	/^#define CONFIG_BAT_PAIR(/;"	d	file:
CONFIG_BAT_RW	include/configs/MPC8610HPCD.h	/^#define CONFIG_BAT_RW	/;"	d
CONFIG_BAT_RW	include/configs/MPC8641HPCN.h	/^#define CONFIG_BAT_RW	/;"	d
CONFIG_BAT_RW	include/configs/sbc8641d.h	/^#define CONFIG_BAT_RW	/;"	d
CONFIG_BAT_RW	include/configs/xpedite517x.h	/^#define CONFIG_BAT_RW	/;"	d
CONFIG_BAUDRATE	include/autoconf.mk	/^CONFIG_BAUDRATE=115200$/;"	m
CONFIG_BAUDRATE	include/configs/10m50_devboard.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/3c120_devboard.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/B4860QDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/BSC9131RDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/BSC9132QDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/C29XPCIE.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/CPCI2DP.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/CPCI4052.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5208EVBE.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M52277EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5235EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5249EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5253DEMO.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5253EVBE.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5272C3.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5275EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5282EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M53017EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5329EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5373EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M54418TWR.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M54451EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M54455EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5475EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/M5485EVB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MIP405.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8308RDB.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/MPC8313ERDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8315ERDB.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/MPC8323ERDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC832XEMDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8349EMDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8349ITX.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC837XEMDS.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/MPC837XERDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8536DS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8540ADS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8541CDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8544DS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8548CDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8555CDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8560ADS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8568MDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8569MDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8572DS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8610HPCD.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MPC8641HPCN.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/MigoR.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/P1010RDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/P1022DS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/P1023RDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/P2041RDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/PATI.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/PIP405.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/PLU405.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/PMC405DE.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/PMC440.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T102xQDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T102xRDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T1040QDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T104xRDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T208xQDS.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T208xRDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/T4240RDB.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM5200.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM823L.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM823M.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM834x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM850L.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM850M.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM855L.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM855M.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM860L.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM860M.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM862L.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM862M.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM866M.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/TQM885D.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/UCP1020.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/VCMA9.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/VOM405.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/a3m071.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/a4m072.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ac14xx.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/adp-ag101p.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am335x_evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am335x_igep0033.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am335x_shc.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am335x_sl50.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am3517_crane.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am3517_evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/am57xx_evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/amcc-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/amcore.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ap121.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/ap143.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/ap325rxa.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/apf27.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/aria.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/armadillo-800eva.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/astro_mcf5373l.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91-sama5_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91rm9200ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9260ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9261ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9263ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9n12ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9rlek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/at91sam9x5ek.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/atngw100.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/atngw100mkii.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/atstk1002.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/axs10x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/baltos.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bav335x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bcm23550_w1d.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bcm28155_ap.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bcm_ep_board.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bct-brettl2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bf506f-ezkit.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/bf525-ucr2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bf537-minotaur.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bf537-pnav.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bf537-srv1.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bf561-acvilon.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bfin_adi_common.h	/^# define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/blackstamp.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/blackvme.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/boston.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/br4.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/bur_am335x_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/calimain.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/canmb.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm-bf527.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm-bf533.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm-bf537e.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm-bf537u.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm-bf548.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm-bf561.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm5200.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm_fx6.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm_t335.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm_t35.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm_t3517.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cm_t54.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cobra5272.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/colibri_pxa270.h	/^#define	CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/colibri_vf.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/controlcenterd.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/corenet_ds.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/corvus.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/cyrus.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/da850evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/dbau1x00.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/devkit3250.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/digsy_mtc.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/dnp5370.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/dra7xx_evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/dragonboard410c.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ea20.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/eb_cpu5282.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ecovec.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/edb93xx.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/edminiv2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/el6x_common.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/espt.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/ethernut5.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/exynos-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/exynos5-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/exynos7420-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/flea3.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ge_bx50v3.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/gr_ep2s60.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/grasshopper.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/grsim.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/grsim_leon2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/h2200.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/highbank.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/hikey.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/hrcon.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/ids8313.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/imx27lite-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/imx31_phycore.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/inka4x0.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/integrator-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ip04.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ipam390.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ipek01.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/jupiter.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/kc1.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/km/keymile-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/kzm9g.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/legoev3.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ls1012a_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ls1021aqds.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ls1021atwr.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ls1043a_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ls1046a_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ls2080a_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/lwmon5.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/m53evk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/malta.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mcx.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mecp5123.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/meesc.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/microblaze-generic.h	/^# define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/motionpro.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mpc5121-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mpc5121ads.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mpc8308_p1m.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/mpr2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ms7720se.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ms7722se.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ms7750se.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/munices.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mv-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx25pdk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx31ads.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx31pdk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx35pdk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx51evk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx53ard.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx53evk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx53loco.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx53smd.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/mx6_common.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/mx7_common.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/mxs.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/nokia_rx51.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/nsim.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/o2dnt-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/odroid-c2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/odroid.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/omap3_evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/omap5_uevm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/omapl138_lcdk.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/openrisc-generic.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/origen.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/p1_twr.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pb1x00.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pcm030.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pcm052.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pengwyn.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pic32mzdask.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/picosam9g45.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pm9261.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pm9263.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pm9g45.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/pr1.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/qemu-mips.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/qemu-mips64.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/qemu-ppce500.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/r0p7734.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/r2dplus.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/r7780mp.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rcar-gen2-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rcar-gen3-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rk3036_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rk3288_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rk3399_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rpi.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rsk7203.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rsk7264.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/rsk7269.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/s32v234evb.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/s5p_goni.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/s5pc210_universal.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sandbox.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sbc8349.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sbc8548.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sbc8641d.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sh7752evb.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sh7753evb.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sh7757lcr.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sh7763rdp.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/sh7785lcr.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/shmin.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/siemens-am33x-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/smartweb.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/smdk2410.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/smdkc100.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/snapper9260.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/snapper9g45.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sniper.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/socfpga_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/socrates.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/spear-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/stm32f429-discovery.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/stm32f746-disco.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/strider.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/stv0991.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/sunxi-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/t4qds.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tam3517-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tao3530.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/taurus.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tb100.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tbs2910.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tcm-bf518.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tcm-bf537.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tegra-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/thunderx_88xx.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ti814x_evm.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ti816x_evm.h	/^#define CONFIG_BAUDRATE /;"	d
CONFIG_BAUDRATE	include/configs/ti_armv7_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tplink_wdr4300.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/trats.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/trats2.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/tricorder.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ts4800.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/uniphier.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/usb_a9263.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/usbarmory.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/v38b.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/vct.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/ve8313.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/vexpress_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/vf610twr.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/vme8349.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/woodburn_common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/work_92105.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/x600.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/x86-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xilinx-ppc.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xpedite1000.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xpedite517x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xpedite520x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xpedite537x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xpedite550x.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/xtfpga.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/zipitz2.h	/^#define	CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/zmx25.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	include/configs/zynq-common.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAUDRATE	spl/include/autoconf.mk	/^CONFIG_BAUDRATE=115200$/;"	m
CONFIG_BAUDRATE	tools/env/fw_env.h	/^#define CONFIG_BAUDRATE	/;"	d
CONFIG_BAV_VERSION	board/birdland/bav335x/Kconfig	/^config BAV_VERSION$/;"	c
CONFIG_BAV_VERSION_MODULE	board/birdland/bav335x/Kconfig	/^config BAV_VERSION$/;"	c
CONFIG_BCH	include/configs/am3517_evm.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/km/km_arm.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/km/kmp204x-common.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/km8360.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/omap3_igep00x0.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/omap3_logic.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/omap3_overo.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/suvd3.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/tricorder.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCH	include/configs/x600.h	/^#define CONFIG_BCH$/;"	d
CONFIG_BCM2835	arch/arm/mach-bcm283x/Kconfig	/^config BCM2835$/;"	c
CONFIG_BCM2835_GPIO	include/configs/rpi.h	/^#define CONFIG_BCM2835_GPIO$/;"	d
CONFIG_BCM2835_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config BCM2835$/;"	c
CONFIG_BCM2835_SDHCI	include/configs/rpi.h	/^#define CONFIG_BCM2835_SDHCI$/;"	d
CONFIG_BCM2836	arch/arm/mach-bcm283x/Kconfig	/^config BCM2836$/;"	c
CONFIG_BCM2836_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config BCM2836$/;"	c
CONFIG_BCM2837	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837$/;"	c
CONFIG_BCM2837_32B	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837_32B$/;"	c
CONFIG_BCM2837_32B_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837_32B$/;"	c
CONFIG_BCM2837_64B	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837_64B$/;"	c
CONFIG_BCM2837_64B_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837_64B$/;"	c
CONFIG_BCM2837_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config BCM2837$/;"	c
CONFIG_BCM283X_MU_SERIAL	include/configs/rpi.h	/^#define CONFIG_BCM283X_MU_SERIAL$/;"	d
CONFIG_BCM_SF2_ETH	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_BCM_SF2_ETH$/;"	d
CONFIG_BCM_SF2_ETH_DEFAULT_PORT	drivers/net/bcm-sf2-eth.h	/^#define CONFIG_BCM_SF2_ETH_DEFAULT_PORT	/;"	d
CONFIG_BCM_SF2_ETH_GMAC	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_BCM_SF2_ETH_GMAC$/;"	d
CONFIG_BD_NUM_CPUS	include/configs/canyonlands.h	/^#define CONFIG_BD_NUM_CPUS	/;"	d
CONFIG_BF50x	arch/blackfin/include/asm/mach-bf506/def_local.h	/^#define CONFIG_BF50x /;"	d
CONFIG_BF51x	arch/blackfin/include/asm/mach-bf518/def_local.h	/^#define CONFIG_BF51x /;"	d
CONFIG_BF52x	arch/blackfin/include/asm/mach-bf527/def_local.h	/^#define CONFIG_BF52x /;"	d
CONFIG_BF54x	arch/blackfin/include/asm/mach-bf548/def_local.h	/^#define CONFIG_BF54x /;"	d
CONFIG_BF60x	arch/blackfin/include/asm/mach-bf609/def_local.h	/^#define CONFIG_BF60x /;"	d
CONFIG_BFIN_ATAPI_BASE_ADDR	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_ATAPI_BASE_ADDR	/;"	d
CONFIG_BFIN_ATA_MODE	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_ATA_MODE	/;"	d
CONFIG_BFIN_BOARD_VERSION_1_0	include/configs/bf609-ezkit.h	/^#define CONFIG_BFIN_BOARD_VERSION_1_0$/;"	d
CONFIG_BFIN_BOOTROM_USES_EVT1	arch/blackfin/include/asm/config-pre.h	/^# define CONFIG_BFIN_BOOTROM_USES_EVT1$/;"	d
CONFIG_BFIN_BOOT_MODE	arch/blackfin/config.mk	/^CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%))$/;"	m
CONFIG_BFIN_BOOT_MODE	include/configs/bct-brettl2.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf506f-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf525-ucr2.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf526-ezbrd.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf527-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf527-sdp.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf533-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf533-stamp.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf537-minotaur.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf537-pnav.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf537-srv1.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf537-stamp.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf538f-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf561-acvilon.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf561-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/bf609-ezkit.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/blackstamp.h	/^#define CONFIG_BFIN_BOOT_MODE	/;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/blackvme.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/br4.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/cm-bf527.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/cm-bf533.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/cm-bf537e.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/cm-bf537u.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/cm-bf548.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/cm-bf561.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/dnp5370.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/ibf-dsp561.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/ip04.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/pr1.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/tcm-bf518.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_BOOT_MODE	include/configs/tcm-bf537.h	/^#define CONFIG_BFIN_BOOT_MODE /;"	d
CONFIG_BFIN_CPU	arch/blackfin/config.mk	/^CONFIG_BFIN_CPU := $(strip $(CONFIG_BFIN_CPU:"%"=%))$/;"	m
CONFIG_BFIN_CPU	arch/blackfin/config.mk	/^CONFIG_BFIN_CPU := \\$/;"	m
CONFIG_BFIN_CPU	include/configs/bct-brettl2.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf506f-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf525-ucr2.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf526-ezbrd.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf527-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf527-sdp.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf533-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf533-stamp.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf537-minotaur.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf537-pnav.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf537-srv1.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf537-stamp.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf538f-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf561-acvilon.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf561-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/bf609-ezkit.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/blackstamp.h	/^#define CONFIG_BFIN_CPU	/;"	d
CONFIG_BFIN_CPU	include/configs/blackvme.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/br4.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/cm-bf527.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/cm-bf533.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/cm-bf537e.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/cm-bf537u.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/cm-bf548.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/cm-bf561.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/dnp5370.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/ibf-dsp561.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/ip04.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/pr1.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/tcm-bf518.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_CPU	include/configs/tcm-bf537.h	/^#define CONFIG_BFIN_CPU /;"	d
CONFIG_BFIN_GET_DCLK_M	arch/blackfin/cpu/initcode.c	/^#define CONFIG_BFIN_GET_DCLK_M /;"	d	file:
CONFIG_BFIN_IDE	include/configs/bf537-stamp.h	/^# define CONFIG_BFIN_IDE	/;"	d
CONFIG_BFIN_INS_LOWOVERHEAD	arch/blackfin/include/asm/config-pre.h	/^#define CONFIG_BFIN_INS_LOWOVERHEAD$/;"	d
CONFIG_BFIN_MAC	include/configs/bct-brettl2.h	/^#define CONFIG_BFIN_MAC	/;"	d
CONFIG_BFIN_MAC	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/bf526-ezbrd.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/bf527-ezkit.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/bf537-minotaur.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/bf537-pnav.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/bf537-srv1.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/bf537-stamp.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/br4.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/cm-bf527.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/cm-bf537e.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/dnp5370.h	/^#define CONFIG_BFIN_MAC /;"	d
CONFIG_BFIN_MAC	include/configs/pr1.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/tcm-bf518.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC	include/configs/tcm-bf537.h	/^#define CONFIG_BFIN_MAC$/;"	d
CONFIG_BFIN_MAC_PINS	drivers/net/bfin_mac.c	/^#  define CONFIG_BFIN_MAC_PINS /;"	d	file:
CONFIG_BFIN_MAC_PINS	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BFIN_MAC_PINS /;"	d
CONFIG_BFIN_NFC	include/configs/bf526-ezbrd.h	/^# define CONFIG_BFIN_NFC$/;"	d
CONFIG_BFIN_NFC	include/configs/bf527-ad7160-eval.h	/^# define CONFIG_BFIN_NFC$/;"	d
CONFIG_BFIN_NFC	include/configs/bf527-ezkit.h	/^# define CONFIG_BFIN_NFC$/;"	d
CONFIG_BFIN_NFC_BOOTROM_ECC	include/configs/bf526-ezbrd.h	/^# define CONFIG_BFIN_NFC_BOOTROM_ECC$/;"	d
CONFIG_BFIN_NFC_BOOTROM_ECC	include/configs/bf527-ad7160-eval.h	/^# define CONFIG_BFIN_NFC_BOOTROM_ECC$/;"	d
CONFIG_BFIN_NFC_BOOTROM_ECC	include/configs/bf527-ezkit.h	/^# define CONFIG_BFIN_NFC_BOOTROM_ECC$/;"	d
CONFIG_BFIN_NFC_BOOTROM_ECC	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_NFC_BOOTROM_ECC$/;"	d
CONFIG_BFIN_NFC_CTL_VAL	include/configs/bf526-ezbrd.h	/^#define CONFIG_BFIN_NFC_CTL_VAL	/;"	d
CONFIG_BFIN_NFC_CTL_VAL	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_BFIN_NFC_CTL_VAL	/;"	d
CONFIG_BFIN_NFC_CTL_VAL	include/configs/bf527-ezkit.h	/^#define CONFIG_BFIN_NFC_CTL_VAL	/;"	d
CONFIG_BFIN_NFC_CTL_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_NFC_CTL_VAL /;"	d
CONFIG_BFIN_NFC_CTL_VAL	include/configs/cm-bf527.h	/^#define CONFIG_BFIN_NFC_CTL_VAL	/;"	d
CONFIG_BFIN_SCRATCH_REG	arch/blackfin/cpu/interrupt.S	/^	CONFIG_BFIN_SCRATCH_REG = sp;$/;"	d
CONFIG_BFIN_SCRATCH_REG	arch/blackfin/include/asm/config.h	/^# define CONFIG_BFIN_SCRATCH_REG /;"	d
CONFIG_BFIN_SDH	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BFIN_SDH$/;"	d
CONFIG_BFIN_SDH	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_SDH$/;"	d
CONFIG_BFIN_SDH	include/configs/bf609-ezkit.h	/^#define CONFIG_BFIN_SDH$/;"	d
CONFIG_BFIN_SERIAL	include/configs/bf506f-ezkit.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/bf525-ucr2.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/bf537-minotaur.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/bf537-srv1.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/bfin_adi_common.h	/^# define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/blackstamp.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/blackvme.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SERIAL	include/configs/dnp5370.h	/^#define CONFIG_BFIN_SERIAL$/;"	d
CONFIG_BFIN_SOFT_SWITCH	include/configs/bf609-ezkit.h	/^#define CONFIG_BFIN_SOFT_SWITCH$/;"	d
CONFIG_BFIN_SPI	include/configs/bf506f-ezkit.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf525-ucr2.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf526-ezbrd.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf527-ezkit.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf527-sdp.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf533-stamp.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf537-minotaur.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf537-pnav.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf537-srv1.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf537-stamp.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf538f-ezkit.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/bf561-acvilon.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/blackstamp.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/blackvme.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/br4.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/cm-bf537e.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/cm-bf537u.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/ip04.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/pr1.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/tcm-bf518.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI	include/configs/tcm-bf537.h	/^#define CONFIG_BFIN_SPI$/;"	d
CONFIG_BFIN_SPI6XX	include/configs/bf609-ezkit.h	/^#define CONFIG_BFIN_SPI6XX$/;"	d
CONFIG_BFIN_SPI_GPIO_CS	include/configs/bfin_adi_common.h	/^#define CONFIG_BFIN_SPI_GPIO_CS /;"	d
CONFIG_BFIN_SPI_IDLE_VAL	drivers/spi/bfin_spi.c	/^# define CONFIG_BFIN_SPI_IDLE_VAL /;"	d	file:
CONFIG_BFIN_SPI_IDLE_VAL	drivers/spi/bfin_spi6xx.c	/^# define CONFIG_BFIN_SPI_IDLE_VAL /;"	d	file:
CONFIG_BFIN_SPI_IMG_SIZE	include/configs/bf548-ezkit.h	/^#define CONFIG_BFIN_SPI_IMG_SIZE /;"	d
CONFIG_BFIN_SPI_IMG_SIZE	include/configs/bfin_adi_common.h	/^#    define CONFIG_BFIN_SPI_IMG_SIZE /;"	d
CONFIG_BFIN_WATCHDOG	include/configs/bfin_adi_common.h	/^# define CONFIG_BFIN_WATCHDOG$/;"	d
CONFIG_BIOSEMU	include/configs/MPC8536DS.h	/^#define CONFIG_BIOSEMU$/;"	d
CONFIG_BIOSEMU	include/configs/MPC8544DS.h	/^#define CONFIG_BIOSEMU$/;"	d
CONFIG_BIOSEMU	include/configs/MPC8572DS.h	/^#define CONFIG_BIOSEMU$/;"	d
CONFIG_BIOSEMU	include/configs/MPC8641HPCN.h	/^#define CONFIG_BIOSEMU$/;"	d
CONFIG_BIOSEMU	include/configs/P1022DS.h	/^#define CONFIG_BIOSEMU$/;"	d
CONFIG_BIOSEMU	include/configs/sequoia.h	/^#define CONFIG_BIOSEMU	/;"	d
CONFIG_BIOSEMU	include/configs/x86-chromebook.h	/^#define CONFIG_BIOSEMU$/;"	d
CONFIG_BITBANGMII	include/configs/MPC8560ADS.h	/^#define CONFIG_BITBANGMII	/;"	d
CONFIG_BITBANGMII	include/configs/alt.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/ap_sh4a_4a.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/armadillo-800eva.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/ecovec.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/espt.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/gose.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/hrcon.h	/^#define CONFIG_BITBANGMII	/;"	d
CONFIG_BITBANGMII	include/configs/io.h	/^#define CONFIG_BITBANGMII	/;"	d
CONFIG_BITBANGMII	include/configs/io64.h	/^#define CONFIG_BITBANGMII	/;"	d
CONFIG_BITBANGMII	include/configs/iocon.h	/^#define CONFIG_BITBANGMII	/;"	d
CONFIG_BITBANGMII	include/configs/koelsch.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/lager.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/porter.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/r0p7734.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/sh7752evb.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/sh7753evb.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/sh7757lcr.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/sh7763rdp.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/silk.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/stout.h	/^#define CONFIG_BITBANGMII$/;"	d
CONFIG_BITBANGMII	include/configs/strider.h	/^#define CONFIG_BITBANGMII	/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/alt.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/ap_sh4a_4a.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/armadillo-800eva.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/ecovec.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/espt.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/gose.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/hrcon.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/io.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/io64.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/iocon.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/koelsch.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/lager.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/porter.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/r0p7734.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/sh7752evb.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/sh7753evb.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/sh7757lcr.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/sh7763rdp.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/silk.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/stout.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BITBANGMII_MULTI	include/configs/strider.h	/^#define CONFIG_BITBANGMII_MULTI$/;"	d
CONFIG_BL1_OFFSET	include/configs/exynos5-common.h	/^#define CONFIG_BL1_OFFSET	/;"	d
CONFIG_BL1_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_BL1_SIZE	/;"	d
CONFIG_BL2_OFFSET	include/configs/exynos5-common.h	/^#define CONFIG_BL2_OFFSET	/;"	d
CONFIG_BL2_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_BL2_SIZE	/;"	d
CONFIG_BLACKFIN	arch/Kconfig	/^config BLACKFIN$/;"	c	choice:choice07312ef30104
CONFIG_BLACKFIN_MODULE	arch/Kconfig	/^config BLACKFIN$/;"	c	choice:choice07312ef30104
CONFIG_BLK	drivers/block/Kconfig	/^config BLK$/;"	c
CONFIG_BLK_MODULE	drivers/block/Kconfig	/^config BLK$/;"	c
CONFIG_BLOCK_CACHE	drivers/block/Kconfig	/^config BLOCK_CACHE$/;"	c
CONFIG_BLOCK_CACHE_MODULE	drivers/block/Kconfig	/^config BLOCK_CACHE$/;"	c
CONFIG_BMP_16BPP	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/aristainetos-common.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/cgtqmx6eval.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/cm_t35.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/cm_t3517.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/colibri_imx7.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/embestmx6boards.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/ge_bx50v3.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/imx31_phycore.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/m28evk.h	/^#define	CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/m53evk.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/ma5d4evk.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx23evk.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx28evk.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx51evk.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx53loco.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx6cuboxi.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx6sabre_common.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx6sxsabresd.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/mx7dsabresd.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/nitrogen6x.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/novena.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/s5pc210_universal.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/trats.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/trats2.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_16BPP	include/configs/wandboard.h	/^#define CONFIG_BMP_16BPP$/;"	d
CONFIG_BMP_24BMP	include/configs/brxre1.h	/^#define CONFIG_BMP_24BMP$/;"	d
CONFIG_BMP_24BPP	include/configs/ma5d4evk.h	/^#define CONFIG_BMP_24BPP$/;"	d
CONFIG_BMP_32BPP	include/configs/brxre1.h	/^#define CONFIG_BMP_32BPP$/;"	d
CONFIG_BMP_32BPP	include/configs/ma5d4evk.h	/^#define CONFIG_BMP_32BPP$/;"	d
CONFIG_BOARDDIR	include/autoconf.mk	/^CONFIG_BOARDDIR="board\/sunxi"$/;"	m
CONFIG_BOARDDIR	include/config.h	/^#define CONFIG_BOARDDIR /;"	d
CONFIG_BOARDDIR	spl/include/autoconf.mk	/^CONFIG_BOARDDIR="board\/sunxi"$/;"	m
CONFIG_BOARDINFO	include/configs/pcm030.h	/^#define CONFIG_BOARDINFO	/;"	d
CONFIG_BOARDNAME	include/configs/T102xRDB.h	/^#define CONFIG_BOARDNAME /;"	d
CONFIG_BOARDNAME	include/configs/UCP1020.h	/^#define CONFIG_BOARDNAME /;"	d
CONFIG_BOARDNAME	include/configs/aristainetos.h	/^#define CONFIG_BOARDNAME	/;"	d
CONFIG_BOARDNAME	include/configs/aristainetos2.h	/^#define CONFIG_BOARDNAME	/;"	d
CONFIG_BOARDNAME	include/configs/aristainetos2b.h	/^#define CONFIG_BOARDNAME	/;"	d
CONFIG_BOARDNAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOARDNAME /;"	d
CONFIG_BOARDNAME	include/configs/p1_twr.h	/^#define CONFIG_BOARDNAME /;"	d
CONFIG_BOARDNAME_LOCAL	include/configs/UCP1020.h	/^#define CONFIG_BOARDNAME_LOCAL /;"	d
CONFIG_BOARD_BOOTCMD	include/configs/o2d.h	/^#define CONFIG_BOARD_BOOTCMD	/;"	d
CONFIG_BOARD_BOOTCMD	include/configs/o2d300.h	/^#define CONFIG_BOARD_BOOTCMD	/;"	d
CONFIG_BOARD_BOOTCMD	include/configs/o2dnt2.h	/^#define CONFIG_BOARD_BOOTCMD	/;"	d
CONFIG_BOARD_BOOTCMD	include/configs/o2i.h	/^#define CONFIG_BOARD_BOOTCMD	/;"	d
CONFIG_BOARD_BOOTCMD	include/configs/o2mnt.h	/^#define CONFIG_BOARD_BOOTCMD	/;"	d
CONFIG_BOARD_BOOTCMD	include/configs/o3dnt.h	/^#define CONFIG_BOARD_BOOTCMD	/;"	d
CONFIG_BOARD_COMMON	include/configs/espresso7420.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/exynos4-common.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/exynos5-dt-common.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/odroid_xu3.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/smdk5250.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/smdk5420.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/snow.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_COMMON	include/configs/spring.h	/^#define CONFIG_BOARD_COMMON$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/BSC9131RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/BSC9132QDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/CPCI2DP.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/CPCI4052.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MIP405.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8315ERDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC837XERDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8536DS.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8568MDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8569MDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/P1010RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/P1022DS.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/P1023RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/P2041RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/PATI.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/PIP405.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/PLU405.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/PMC405DE.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/PMC440.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/T102xQDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/T102xRDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/T1040QDS.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/T104xRDB.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/TQM5200.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/UCP1020.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/VCMA9.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/VOM405.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/acadia.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/am43xx_evm.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/am57xx_evm.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ap121.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ap143.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/aristainetos-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/armadillo-800eva.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91-sama5_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91rm9200ek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91sam9260ek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91sam9263ek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91sam9n12ek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91sam9rlek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/atngw100.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/atngw100mkii.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/atstk1002.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/axs10x.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/bamboo.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/bf506f-ezkit.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/bf518f-ezbrd.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/bf548-ezkit.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/bf609-ezkit.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/bubinga.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/canyonlands.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/cgtqmx6eval.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/cm-bf548.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/colibri_imx7.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/colibri_vf.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/controlcenterd.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/corenet_ds.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/corvus.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/cougarcanyon2.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/crownbay.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/cyrus.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/da850evm.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/devkit3250.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/dfi-bt700.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/dlvision-10g.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/dlvision.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/dra7xx_evm.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ea20.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/edb93xx.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/el6x_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/embestmx6boards.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/exynos-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/exynos7420-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/flea3.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/galileo.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/gdppc440etx.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ge_bx50v3.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/grasshopper.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/gw_ventana.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/hikey.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/hrcon.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/icon.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/imx31_phycore.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/intip.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/io.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/io64.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/iocon.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ipam390.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/jupiter.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/katmai.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/kilauea.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/km/km_arm.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/km/kmp204x-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/kzm9g.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/legoev3.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ls1012a_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ls1021aqds.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ls1021atwr.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ls1043a_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ls1046a_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ls2080a_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/luan.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/lwmon5.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/m53evk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/makalu.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/malta.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mecp5123.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/meesc.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mpc5121ads.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mv-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx25pdk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx31ads.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx31pdk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx35pdk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx51evk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx53ard.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx53evk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx53loco.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx53smd.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6cuboxi.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6qarm2.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6sabre_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6slevk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6sxsabreauto.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6sxsabresd.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx6ullevk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mx7dsabresd.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/mxs.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/neo.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/nitrogen6x.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/novena.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ot1200.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/p1_twr.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/pcm052.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/pcm058.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/pico-imx6ul.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/picosam9g45.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/platinum.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/pm9261.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/pm9263.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/pm9g45.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/qemu-ppce500.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/rcar-gen2-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/rcar-gen3-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/redwood.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/rpi.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/s32v234evb.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/sama5d2_xplained.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/sbc8548.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/sbc8641d.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/secomx6quq7.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/sequoia.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/smartweb.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/smdk2410.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/snapper9g45.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/socfpga_sr1500.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/som-6896.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/som-db5800-som-6867.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/spear-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/stm32f429-discovery.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/stm32f746-disco.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/strider.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/stv0991.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/t3corp.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/taurus.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/tbs2910.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/tegra-common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ti_am335x_common.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/titanium.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/tplink_wdr4300.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/tqma6.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ts4800.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/udoo.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/usbarmory.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/v38b.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/ve8313.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/vf610twr.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/walnut.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/wandboard.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/warp.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/warp7.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/woodburn.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/work_92105.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/x86-chromebook.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/xpedite1000.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/xpress.h	/^#define CONFIG_BOARD_EARLY_INIT_F$/;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/yosemite.h	/^#define CONFIG_BOARD_EARLY_INIT_F /;"	d
CONFIG_BOARD_EARLY_INIT_F	include/configs/yucca.h	/^#define CONFIG_BOARD_EARLY_INIT_F	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/B4860QDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/BSC9132QDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/C29XPCIE.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MIP405.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MPC8536DS.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MPC8569MDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/MPC8572DS.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/P1010RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/P1022DS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/P1023RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/P2041RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/PIP405.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T102xQDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T102xRDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T1040QDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T104xRDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T208xQDS.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T208xRDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/T4240RDB.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/TQM5200.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/TQM834x.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/UCP1020.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/atngw100.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/atngw100mkii.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/atstk1002.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/canmb.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/canyonlands.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/cm5200.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/controlcenterd.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/corenet_ds.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/cyrus.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/digsy_mtc.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/dlvision-10g.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/grasshopper.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/hrcon.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/icon.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/intip.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/io.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/io64.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/iocon.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/jupiter.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/km/km-powerpc.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/km/kmp204x-common.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/lwmon5.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/manroland/common.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/motionpro.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/neo.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/o2dnt-common.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/p1_twr.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/socrates.h	/^#define CONFIG_BOARD_EARLY_INIT_R /;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/strider.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/t3corp.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/t4qds.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/v38b.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/work_92105.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOARD_EARLY_INIT_R$/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/xpedite517x.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/xpedite520x.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/xpedite537x.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_EARLY_INIT_R	include/configs/xpedite550x.h	/^#define CONFIG_BOARD_EARLY_INIT_R	/;"	d
CONFIG_BOARD_ECC_SUPPORT	include/configs/db-mv784mp-gp.h	/^#define CONFIG_BOARD_ECC_SUPPORT	/;"	d
CONFIG_BOARD_ECC_SUPPORT	include/configs/maxbcm.h	/^#define CONFIG_BOARD_ECC_SUPPORT	/;"	d
CONFIG_BOARD_EMAC_COUNT	include/configs/kilauea.h	/^#define CONFIG_BOARD_EMAC_COUNT$/;"	d
CONFIG_BOARD_H2200	include/configs/h2200.h	/^#define CONFIG_BOARD_H2200$/;"	d
CONFIG_BOARD_LATE_INIT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/VCMA9.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/am335x_evm.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/am335x_shc.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/am335x_sl50.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/am43xx_evm.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/am57xx_evm.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/aristainetos2.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/aristainetos2b.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/baltos.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/bav335x.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/bur_cfg_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/cgtqmx6eval.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/colibri_imx7.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/colibri_vf.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/dra7xx_evm.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/draco.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ea20.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ecovec.h	/^#define CONFIG_BOARD_LATE_INIT	/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/el6x_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/embestmx6boards.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/etamin.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ge_bx50v3.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/imx31_phycore.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/km/km_arm.h	/^#define	CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1012aqds.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1012ardb.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1043a_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1043aqds.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1043ardb.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1046a_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1046aqds.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls1046ardb.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls2080aqds.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ls2080ardb.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mcx.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/microblaze-generic.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/ms7750se.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx25pdk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx31pdk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx35pdk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx51evk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx53evk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx53loco.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx6cuboxi.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx6sabre_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx6sxsabreauto.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx6ullevk.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/mx7dsabresd.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/novena.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/omap3_logic.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/pcm058.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/r0p7734.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/r2dplus.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/rastaban.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/rk3036_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/rk3288_common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/sama5d3xek.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/sandbox.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/sh7752evb.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/sh7753evb.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/sh7757lcr.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/snapper9g45.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/tegra-common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/theadorable.h	/^#define CONFIG_BOARD_LATE_INIT	/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/thuban.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/tqma6.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/udoo.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/uniphier.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/wandboard.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/warp.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/warp7.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/x600.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/xpress.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/zmx25.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_LATE_INIT	include/configs/zynq-common.h	/^#define CONFIG_BOARD_LATE_INIT$/;"	d
CONFIG_BOARD_MEM_LIMIT	include/configs/o2d.h	/^#define CONFIG_BOARD_MEM_LIMIT	/;"	d
CONFIG_BOARD_MEM_LIMIT	include/configs/o2d300.h	/^#define CONFIG_BOARD_MEM_LIMIT	/;"	d
CONFIG_BOARD_MEM_LIMIT	include/configs/o2dnt2.h	/^#define CONFIG_BOARD_MEM_LIMIT	/;"	d
CONFIG_BOARD_MEM_LIMIT	include/configs/o2i.h	/^#define CONFIG_BOARD_MEM_LIMIT	/;"	d
CONFIG_BOARD_MEM_LIMIT	include/configs/o2mnt.h	/^#define CONFIG_BOARD_MEM_LIMIT	/;"	d
CONFIG_BOARD_MEM_LIMIT	include/configs/o3dnt.h	/^#define CONFIG_BOARD_MEM_LIMIT	/;"	d
CONFIG_BOARD_NAME	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/apf27.h	/^#define CONFIG_BOARD_NAME /;"	d
CONFIG_BOARD_NAME	include/configs/el6x_common.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/ge_bx50v3.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/o2d.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/o2d300.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/o2dnt2.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/o2i.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/o2mnt.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/o3dnt.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_NAME	include/configs/openrisc-generic.h	/^#define CONFIG_BOARD_NAME	/;"	d
CONFIG_BOARD_POSTCLK_INIT	include/configs/lwmon5.h	/^#define CONFIG_BOARD_POSTCLK_INIT	/;"	d
CONFIG_BOARD_POSTCLK_INIT	include/configs/mx6_common.h	/^#define CONFIG_BOARD_POSTCLK_INIT$/;"	d
CONFIG_BOARD_POSTCLK_INIT	include/configs/xtfpga.h	/^#define CONFIG_BOARD_POSTCLK_INIT$/;"	d
CONFIG_BOARD_RESET	include/configs/lwmon5.h	/^#define CONFIG_BOARD_RESET	/;"	d
CONFIG_BOARD_RESET	include/configs/yosemite.h	/^#define CONFIG_BOARD_RESET	/;"	d
CONFIG_BOARD_REVISION_TAG	include/configs/secomx6quq7.h	/^#define CONFIG_BOARD_REVISION_TAG$/;"	d
CONFIG_BOARD_ROMSIZE_KB_1024	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_1024$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_1024_MODULE	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_1024$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_16384	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_16384$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_16384_MODULE	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_16384$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_2048	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_2048$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_2048_MODULE	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_2048$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_4096	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_4096$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_4096_MODULE	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_4096$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_512	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_512$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_512_MODULE	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_512$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_8192	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_8192$/;"	c	menu:x86 architecture
CONFIG_BOARD_ROMSIZE_KB_8192_MODULE	arch/x86/Kconfig	/^config BOARD_ROMSIZE_KB_8192$/;"	c	menu:x86 architecture
CONFIG_BOARD_SDRAM_SIZE	board/cadence/xtfpga/Kconfig	/^config BOARD_SDRAM_SIZE$/;"	c
CONFIG_BOARD_SDRAM_SIZE_MODULE	board/cadence/xtfpga/Kconfig	/^config BOARD_SDRAM_SIZE$/;"	c
CONFIG_BOARD_SIZE_LIMIT	include/configs/bf548-ezkit.h	/^#define CONFIG_BOARD_SIZE_LIMIT /;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/bf609-ezkit.h	/^#define CONFIG_BOARD_SIZE_LIMIT /;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/bfin_adi_common.h	/^# define CONFIG_BOARD_SIZE_LIMIT /;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/cm-bf537e.h	/^#define CONFIG_BOARD_SIZE_LIMIT /;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/cm-bf537u.h	/^#define CONFIG_BOARD_SIZE_LIMIT /;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/colibri_pxa270.h	/^#define CONFIG_BOARD_SIZE_LIMIT	/;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/colibri_vf.h	/^#define CONFIG_BOARD_SIZE_LIMIT	/;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/openrd.h	/^#define CONFIG_BOARD_SIZE_LIMIT	/;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/pcm052.h	/^#define CONFIG_BOARD_SIZE_LIMIT	/;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/tcm-bf537.h	/^#define CONFIG_BOARD_SIZE_LIMIT /;"	d
CONFIG_BOARD_SIZE_LIMIT	include/configs/vf610twr.h	/^#define CONFIG_BOARD_SIZE_LIMIT	/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/bf526-ezbrd.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/bf533-stamp.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/cm_t335.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/cm_t35.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/cm_t3517.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/eb_cpu5282.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/edb93xx.h	/^#define CONFIG_BOARD_SPECIFIC_LED	/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/motionpro.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/mx23_olinuxino.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/omap3_beagle.h	/^#define CONFIG_BOARD_SPECIFIC_LED	/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/omap3_igep00x0.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/stm32f429-discovery.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/tqma6_wru4.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/tricorder.h	/^#define CONFIG_BOARD_SPECIFIC_LED$/;"	d
CONFIG_BOARD_SPECIFIC_LED	include/configs/v38b.h	/^#define  CONFIG_BOARD_SPECIFIC_LED	/;"	d
CONFIG_BOARD_TPLINK_WDR4300	arch/mips/mach-ath79/Kconfig	/^config BOARD_TPLINK_WDR4300$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
CONFIG_BOARD_TPLINK_WDR4300_MODULE	arch/mips/mach-ath79/Kconfig	/^config BOARD_TPLINK_WDR4300$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
CONFIG_BOARD_TYPES	include/configs/PMC405DE.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/PMC440.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM823L.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM823M.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM850L.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM850M.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM855L.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM855M.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM860L.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM860M.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM862L.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM862M.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM866M.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/TQM885D.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/axs10x.h	/^#define CONFIG_BOARD_TYPES$/;"	d
CONFIG_BOARD_TYPES	include/configs/canyonlands.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/cm5200.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/intip.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOARD_TYPES	include/configs/kilauea.h	/^#define CONFIG_BOARD_TYPES$/;"	d
CONFIG_BOARD_TYPES	include/configs/odroid.h	/^#define CONFIG_BOARD_TYPES$/;"	d
CONFIG_BOARD_TYPES	include/configs/odroid_xu3.h	/^#define CONFIG_BOARD_TYPES$/;"	d
CONFIG_BOARD_TYPES	include/configs/t3corp.h	/^#define CONFIG_BOARD_TYPES	/;"	d
CONFIG_BOOKE	arch/powerpc/include/asm/processor.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/B4860QDS.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/BSC9131RDB.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/BSC9132QDS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/C29XPCIE.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8536DS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8544DS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/MPC8572DS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/P1010RDB.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/P1022DS.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/P1023RDB.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/P2041RDB.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T102xQDS.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T102xRDB.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T1040QDS.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T104xRDB.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T208xQDS.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T208xRDB.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/T4240RDB.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/UCP1020.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/controlcenterd.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/corenet_ds.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/cyrus.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/km/kmp204x-common.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/p1_twr.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/qemu-ppce500.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/sbc8548.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/socrates.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/t4qds.h	/^#define CONFIG_BOOKE$/;"	d
CONFIG_BOOKE	include/configs/xpedite520x.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/xpedite537x.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOKE	include/configs/xpedite550x.h	/^#define CONFIG_BOOKE	/;"	d
CONFIG_BOOTARGS	include/configs/M53017EVB.h	/^#	define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/M54418TWR.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/M54451EVB.h	/^#	define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/M54455EVB.h	/^#	define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/MIP405.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/MPC8349ITX.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/MigoR.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/PATI.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/PIP405.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/UCP1020.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ap121.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/ap143.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/ap325rxa.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ap_sh4a_4a.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/apf27.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/armadillo-800eva.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/astro_mcf5373l.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91-sama5_common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91sam9260ek.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91sam9261ek.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91sam9263ek.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91sam9rlek.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/atngw100.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/atngw100mkii.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/atstk1002.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/axs10x.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/bf525-ucr2.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/bf537-minotaur.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/bf537-srv1.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/bfin_adi_common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/bg0900.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/blackstamp.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/blackvme.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/calimain.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/colibri_pxa270.h	/^#define	CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/corvus.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/da850evm.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/devkit3250.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/dfi-bt700.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/dnp5370.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/dragonboard410c.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/ds414.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ecovec.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/edb93xx.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/espt.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/ethernut5.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/h2200.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/hikey.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/integratorap.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/integratorcp.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/kzm9g.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/lacie_kw.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/ls1012a_common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ls1043a_common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ls1046a_common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ls2080a_common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ls2080ardb.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/lsxl.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/m28evk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/m53evk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ma5d4evk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/microblaze-generic.h	/^#define	CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/mpr2.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ms7720se.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ms7722se.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ms7750se.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/novena.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/nsim.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/odroid.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/p1_twr.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/picosam9g45.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/pm9261.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/pm9261.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/pm9263.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/pm9g45.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/r0p7734.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/r2dplus.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/r7780mp.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/rcar-gen2-common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/rcar-gen3-common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/rsk7203.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/rsk7264.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/rsk7269.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/s32v234evb.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/s5p_goni.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/s5pc210_universal.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sama5d2_ptc.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sama5d2_xplained.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/sandbox.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/sansa_fuze_plus.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sc_sps_1.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sh7752evb.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sh7753evb.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sh7757lcr.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/sh7763rdp.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/sh7785lcr.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/shmin.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/smdkc100.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/snapper9260.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_is1.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_mcvevk.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_sockit.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_socrates.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_sr1500.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/spear-common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/stm32f429-discovery.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/stm32f746-disco.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/taurus.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/tb100.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/thunderx_88xx.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ti816x_evm.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/tplink_wdr4300.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/trats.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/trats2.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/usb_a9263.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/usbarmory.h	/^#define CONFIG_BOOTARGS /;"	d
CONFIG_BOOTARGS	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/vinco.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/work_92105.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/x86-common.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/xfi3.h	/^#define CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS	include/configs/zipitz2.h	/^#define	CONFIG_BOOTARGS	/;"	d
CONFIG_BOOTARGS_AXM	include/configs/taurus.h	/^#define CONFIG_BOOTARGS_AXM	/;"	d
CONFIG_BOOTARGS_ROOT	include/configs/bf537-pnav.h	/^#define CONFIG_BOOTARGS_ROOT	/;"	d
CONFIG_BOOTARGS_ROOT	include/configs/bfin_adi_common.h	/^# define CONFIG_BOOTARGS_ROOT /;"	d
CONFIG_BOOTARGS_TAURUS	include/configs/taurus.h	/^#define	CONFIG_BOOTARGS_TAURUS	/;"	d
CONFIG_BOOTARGS_VIDEO	include/configs/bfin_adi_common.h	/^# define CONFIG_BOOTARGS_VIDEO /;"	d
CONFIG_BOOTBLOCK	include/configs/s5pc210_universal.h	/^#define CONFIG_BOOTBLOCK	/;"	d
CONFIG_BOOTBLOCK	include/configs/trats.h	/^#define CONFIG_BOOTBLOCK	/;"	d
CONFIG_BOOTCOMMAND	include/autoconf.mk	/^CONFIG_BOOTCOMMAND="run loadsplash; run distro_bootcmd"$/;"	m
CONFIG_BOOTCOMMAND	include/config_distro_bootcmd.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/B4860QDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/BSC9131RDB.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/BSC9132QDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/C29XPCIE.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/M5275EVB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MIP405.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8315ERDB.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8536DS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8544DS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8572DS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/MPC8641HPCN.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/P1010RDB.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/P1022DS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/P1023RDB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/P2041RDB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/PATI.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/PIP405.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T102xQDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T102xRDB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T1040QDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T104xRDB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T208xQDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T208xRDB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T4240QDS.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/T4240RDB.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM5200.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM823L.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM823M.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM834x.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM850L.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM850M.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM855L.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM855M.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM860L.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM860M.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM862L.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM862M.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM866M.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/TQM885D.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/a3m071.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ac14xx.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/am335x_evm.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/am335x_igep0033.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/am335x_shc.h	/^# define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/am3517_crane.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/am3517_evm.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/amcc-common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/amcore.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ap121.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ap143.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/apf27.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/apx4devkit.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/aria.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/aristainetos-common.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/astro_mcf5373l.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91-sama5_common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9260ek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9261ek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9263ek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9n12ek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9rlek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/atngw100.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/atngw100mkii.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/atstk1002.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/baltos.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/bav335x.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/bcm23550_w1d.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bcm28155_ap.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bf525-ucr2.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bf537-minotaur.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bf537-pnav.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bf537-srv1.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bfin_adi_common.h	/^# define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/bg0900.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/blackstamp.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/blackvme.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/br4.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/brppt1.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/brxre1.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/calimain.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/canmb.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cgtqmx6eval.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/cm-bf527.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm-bf533.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm-bf537e.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm-bf537u.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm-bf548.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm-bf561.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm5200.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cm_fx6.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/cm_t335.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/cm_t35.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/cm_t3517.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/cm_t43.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/cm_t54.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/colibri_imx7.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/colibri_pxa270.h	/^#define	CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/colibri_vf.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/controlcenterd.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/corenet_ds.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/corvus.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/cyrus.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/dbau1x00.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/devkit3250.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/devkit8000.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/dfi-bt700.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/digsy_mtc.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/dnp5370.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/dns325.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/dockstar.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/draco.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/draco.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/dreamplug.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ds109.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ds414.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/eb_cpu5282.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/el6x_common.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/etamin.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/etamin.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ethernut5.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ge_bx50v3.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/goflexhome.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/gr_ep2s60.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/gr_xc3s_1500.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/grsim.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/grsim_leon2.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/guruplug.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/gw_ventana.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/h2200.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/hrcon.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ib62x0.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/iconnect.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ids8313.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/imx6qdl_icore.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/inka4x0.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/integratorap.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/integratorcp.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ip04.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ipek01.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/jupiter.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/k2g_evm.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/kc1.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/lacie_kw.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/legoev3.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ls1012a_common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ls1043a_common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ls1046aqds.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ls1046ardb.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ls2080a_common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/lsxl.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/lwmon5.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/m28evk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/m53evk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ma5d4evk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/manroland/common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/mecp5123.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/microblaze-generic.h	/^#define	CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/motionpro.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/mpc5121ads.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/munices.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/mx23_olinuxino.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx23evk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx25pdk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx28evk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx51evk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx53ard.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx53evk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx53loco.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx53smd.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6cuboxi.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6qarm2.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6sabre_common.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6slevk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6sxsabreauto.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6sxsabresd.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx6ullevk.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/mx7dsabresd.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/nas220.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/nitrogen6x.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/nokia_rx51.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/novena.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/nsa310s.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/o2dnt-common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/odroid.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_beagle.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_cairo.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_evm.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_logic.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_overo.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_pandora.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omap3_zoom1.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/openrd.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/origen.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/p1_twr.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pb1x00.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pcm030.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pcm051.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/pcm052.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pdm360ng.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pengwyn.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/pepper.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/pic32mzdask.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pico-imx6ul.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/picosam9g45.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/platinum.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pm9261.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pm9263.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pm9g45.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pogo_e02.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/pr1.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pxm2.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/pxm2.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/qemu-mips.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/qemu-mips64.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/qemu-ppce500.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/rastaban.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/rastaban.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/rcar-gen3-common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/redwood.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/rut.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/rut.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/s32v234evb.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/s5p_goni.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/s5pc210_universal.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sama5d2_ptc.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sama5d2_xplained.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sandbox.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/sbc8349.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sbc8548.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sbc8641d.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/sc_sps_1.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sheevaplug.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/smartweb.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/smdkc100.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/smdkv310.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/sniper.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_mcvevk.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_sockit.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_socrates.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_sr1500.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/socrates.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/spear-common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/stm32f429-discovery.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/stm32f746-disco.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/strider.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/stv0991.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/tao3530.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/taurus.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/tbs2910.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/tcm-bf518.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/tcm-bf537.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/thuban.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/thuban.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ti814x_evm.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ti816x_evm.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/ti_omap4_common.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ti_omap5_common.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/titanium.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/tplink_wdr4300.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/tqma6.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/trats.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/trats2.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/tricorder.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/ts4800.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/udoo.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/uniphier.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/usb_a9263.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/usbarmory.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/v38b.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/vct.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/vexpress_common.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/vf610twr.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/vinco.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/vme8349.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/wandboard.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/warp.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/warp7.h	/^#define CONFIG_BOOTCOMMAND /;"	d
CONFIG_BOOTCOMMAND	include/configs/x86-common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/zipitz2.h	/^#define	CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	include/configs/zynq-common.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOMMAND	tools/env/fw_env.h	/^#define CONFIG_BOOTCOMMAND	/;"	d
CONFIG_BOOTCOUNT_ALEN	include/configs/ids8313.h	/^#define CONFIG_BOOTCOUNT_ALEN	/;"	d
CONFIG_BOOTCOUNT_AM33XX	include/configs/am335x_evm.h	/^#define CONFIG_BOOTCOUNT_AM33XX$/;"	d
CONFIG_BOOTCOUNT_AM33XX	include/configs/am335x_sl50.h	/^#define CONFIG_BOOTCOUNT_AM33XX$/;"	d
CONFIG_BOOTCOUNT_AM33XX	include/configs/baltos.h	/^#define CONFIG_BOOTCOUNT_AM33XX$/;"	d
CONFIG_BOOTCOUNT_AM33XX	include/configs/bav335x.h	/^#define CONFIG_BOOTCOUNT_AM33XX$/;"	d
CONFIG_BOOTCOUNT_AM33XX	include/configs/brppt1.h	/^#define CONFIG_BOOTCOUNT_AM33XX$/;"	d
CONFIG_BOOTCOUNT_ENV	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTCOUNT_ENV$/;"	d
CONFIG_BOOTCOUNT_I2C	include/configs/ids8313.h	/^#define CONFIG_BOOTCOUNT_I2C$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM5200.h	/^#define CONFIG_BOOTCOUNT_LIMIT	/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM823L.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM823M.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM850L.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM850M.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM855L.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM855M.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM860L.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM860M.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM862L.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM862M.h	/^#define	CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM866M.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/TQM885D.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/a3m071.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/am335x_evm.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/am335x_sl50.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/baltos.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/bav335x.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/brppt1.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/calimain.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/highbank.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/ids8313.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/km/keymile-common.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/km/km-powerpc.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/km/kmp204x-common.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/socfpga_is1.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/socfpga_sr1500.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/theadorable.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/tqma6_wru4.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_LIMIT	include/configs/x600.h	/^#define CONFIG_BOOTCOUNT_LIMIT$/;"	d
CONFIG_BOOTCOUNT_RAM	include/configs/km/km_arm.h	/^#define CONFIG_BOOTCOUNT_RAM$/;"	d
CONFIG_BOOTCOUNT_RAM	include/configs/theadorable.h	/^#define CONFIG_BOOTCOUNT_RAM$/;"	d
CONFIG_BOOTDELAY	common/Kconfig	/^config BOOTDELAY$/;"	c
CONFIG_BOOTDELAY	include/config/auto.conf	/^CONFIG_BOOTDELAY=2$/;"	k
CONFIG_BOOTDELAY	include/generated/autoconf.h	/^#define CONFIG_BOOTDELAY /;"	d
CONFIG_BOOTDELAY	tools/env/fw_env.h	/^#define CONFIG_BOOTDELAY	/;"	d
CONFIG_BOOTDELAY_MODULE	common/Kconfig	/^config BOOTDELAY$/;"	c
CONFIG_BOOTFILE	include/configs/B4860QDS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/BSC9131RDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/BSC9132QDS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/C29XPCIE.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/M5235EVB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8323ERDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8349ITX.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC837XERDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8536DS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/MPC8544DS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/MPC8572DS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/MPC8641HPCN.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/P1010RDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/P1022DS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/P1023RDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/P2041RDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T102xQDS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T102xRDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T1040QDS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T104xRDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T208xQDS.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T208xRDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/T4240RDB.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/UCP1020.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/am3517_crane.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/am3517_evm.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/apf27.h	/^#define	CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/apx4devkit.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/aria.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/axs10x.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/bg0900.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/calimain.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/controlcenterd.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/corenet_ds.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/cyrus.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/da850evm.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/devkit3250.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/ea20.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/eco5pk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/edb93xx.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/gr_ep2s60.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/grsim.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/grsim_leon2.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/hrcon.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/ids8313.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/inka4x0.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/integratorcp.h	/^#define CONFIG_BOOTFILE /;"	d
CONFIG_BOOTFILE	include/configs/ipam390.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/legoev3.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/m28evk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/m53evk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/ma5d4evk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mcx.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mecp5123.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mpc5121ads.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mpr2.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/ms7720se.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mt_ventoux.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mx23_olinuxino.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mx23evk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/mx28evk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/novena.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/nsim.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/omap3_cairo.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/omap3_evm.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/openrisc-generic.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/p1_twr.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/qemu-ppce500.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/sbc8349.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/sbc8548.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/sbc8641d.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/sc_sps_1.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_is1.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_mcvevk.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_sockit.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_socrates.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_sr1500.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/strider.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/t4qds.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/tb100.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/twister.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/uniphier.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/vme8349.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/work_92105.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/x86-common.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/xfi3.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTFILE	include/configs/xtfpga.h	/^#define CONFIG_BOOTFILE	/;"	d
CONFIG_BOOTMAPSZ	include/configs/km/km_arm.h	/^#define CONFIG_BOOTMAPSZ	/;"	d
CONFIG_BOOTMODE	include/configs/P1010RDB.h	/^#define CONFIG_BOOTMODE /;"	d
CONFIG_BOOTM_LINUX	include/autoconf.mk	/^CONFIG_BOOTM_LINUX=y$/;"	m
CONFIG_BOOTM_LINUX	include/config_defaults.h	/^#define CONFIG_BOOTM_LINUX /;"	d
CONFIG_BOOTM_LINUX	spl/include/autoconf.mk	/^CONFIG_BOOTM_LINUX=y$/;"	m
CONFIG_BOOTM_NETBSD	include/autoconf.mk	/^CONFIG_BOOTM_NETBSD=y$/;"	m
CONFIG_BOOTM_NETBSD	include/config_defaults.h	/^#define CONFIG_BOOTM_NETBSD /;"	d
CONFIG_BOOTM_NETBSD	spl/include/autoconf.mk	/^CONFIG_BOOTM_NETBSD=y$/;"	m
CONFIG_BOOTM_PLAN9	include/autoconf.mk	/^CONFIG_BOOTM_PLAN9=y$/;"	m
CONFIG_BOOTM_PLAN9	include/config_defaults.h	/^#define CONFIG_BOOTM_PLAN9 /;"	d
CONFIG_BOOTM_PLAN9	spl/include/autoconf.mk	/^CONFIG_BOOTM_PLAN9=y$/;"	m
CONFIG_BOOTM_RTEMS	include/autoconf.mk	/^CONFIG_BOOTM_RTEMS=y$/;"	m
CONFIG_BOOTM_RTEMS	include/config_defaults.h	/^#define CONFIG_BOOTM_RTEMS /;"	d
CONFIG_BOOTM_RTEMS	spl/include/autoconf.mk	/^CONFIG_BOOTM_RTEMS=y$/;"	m
CONFIG_BOOTM_VXWORKS	include/autoconf.mk	/^CONFIG_BOOTM_VXWORKS=y$/;"	m
CONFIG_BOOTM_VXWORKS	include/config_defaults.h	/^#define CONFIG_BOOTM_VXWORKS /;"	d
CONFIG_BOOTM_VXWORKS	spl/include/autoconf.mk	/^CONFIG_BOOTM_VXWORKS=y$/;"	m
CONFIG_BOOTP_BOOTFILE	include/configs/ot1200.h	/^#define CONFIG_BOOTP_BOOTFILE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/10m50_devboard.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/3c120_devboard.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/CPCI2DP.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M52277EVB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M5235EVB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M5272C3.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M5275EVB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M5282EVB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M54418TWR.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M54451EVB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/M54455EVB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MIP405.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8544DS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/PATI.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/PIP405.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/PLU405.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM5200.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM823L.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM823M.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM834x.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM850L.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM850M.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM855L.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM855M.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM860L.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM860M.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM862L.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM862M.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM866M.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/TQM885D.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/VCMA9.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/a4m072.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/amcc-common.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/apf27.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91-sama5_common.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91sam9260ek.h	/^#define CONFIG_BOOTP_BOOTFILESIZE	/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91sam9261ek.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91sam9263ek.h	/^#define CONFIG_BOOTP_BOOTFILESIZE	/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/canmb.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/cobra5272.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/corvus.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/dbau1x00.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/dragonboard410c.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/eb_cpu5282.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/ethernut5.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/hikey.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/ids8313.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/inka4x0.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/integratorap.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/jupiter.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/km/keymile-common.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/lwmon5.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/meesc.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/microblaze-generic.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/motionpro.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/openrisc-generic.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/pb1x00.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/pic32mzdask.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/picosam9g45.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/pm9261.h	/^#define CONFIG_BOOTP_BOOTFILESIZE	/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/pm9263.h	/^#define CONFIG_BOOTP_BOOTFILESIZE	/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/pm9g45.h	/^#define CONFIG_BOOTP_BOOTFILESIZE	/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/qemu-mips.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/qemu-mips64.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/s32v234evb.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/sbc8349.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/sbc8548.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/smartweb.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/smdk2410.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/snapper9260.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/snapper9g45.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/socrates.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/thunderx_88xx.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/usb_a9263.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/v38b.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/vct.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/ve8313.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/vexpress_common.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/vme8349.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/x86-common.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/xpedite1000.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/xpedite520x.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTFILESIZE	include/configs/zmx25.h	/^#define CONFIG_BOOTP_BOOTFILESIZE$/;"	d
CONFIG_BOOTP_BOOTPATH	include/autoconf.mk	/^CONFIG_BOOTP_BOOTPATH=y$/;"	m
CONFIG_BOOTP_BOOTPATH	include/config_distro_defaults.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/10m50_devboard.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/3c120_devboard.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/CPCI2DP.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M52277EVB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M5235EVB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M5272C3.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M5275EVB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M5282EVB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M54418TWR.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M54451EVB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/M54455EVB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MIP405.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8308RDB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8315ERDB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8323ERDB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8349ITX.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC837XERDB.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8544DS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/MPC8641HPCN.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/PATI.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/PIP405.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/PLU405.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM5200.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM823L.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM823M.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM834x.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM850L.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM850M.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM855L.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM855M.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM860L.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM860M.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM862L.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM862M.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM866M.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/TQM885D.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/VCMA9.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/VOM405.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/a3m071.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/a4m072.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/amcc-common.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/apf27.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91-sama5_common.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91sam9260ek.h	/^#define CONFIG_BOOTP_BOOTPATH	/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91sam9261ek.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91sam9263ek.h	/^#define CONFIG_BOOTP_BOOTPATH	/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91sam9n12ek.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/canmb.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/cobra5272.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/colibri_pxa270.h	/^#define	CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/corvus.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/dbau1x00.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/eb_cpu5282.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/ethernut5.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/ids8313.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/inka4x0.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/integratorap.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/jupiter.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/km/keymile-common.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/lwmon5.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/meesc.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/microblaze-generic.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/motionpro.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/mpc8308_p1m.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/omap3_evm.h	/^#define CONFIG_BOOTP_BOOTPATH	/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/openrisc-generic.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/pb1x00.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/pic32mzdask.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/picosam9g45.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/pm9261.h	/^#define CONFIG_BOOTP_BOOTPATH	/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/pm9263.h	/^#define CONFIG_BOOTP_BOOTPATH	/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/pm9g45.h	/^#define CONFIG_BOOTP_BOOTPATH	/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/qemu-mips.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/qemu-mips64.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/s32v234evb.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/sbc8349.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/sbc8548.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/smartweb.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/smdk2410.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/snapper9260.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/snapper9g45.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/socrates.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/thunderx_88xx.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/usb_a9263.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/v38b.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/vct.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/ve8313.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/vexpress_common.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/vme8349.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/x86-common.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/xpedite1000.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/xpedite520x.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/zmx25.h	/^#define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_BOOTPATH	include/configs/zynq-common.h	/^# define CONFIG_BOOTP_BOOTPATH$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/am335x_shc.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/am3517_evm.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/cm_t43.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/ipam390.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DEFAULT	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOOTP_DEFAULT$/;"	d
CONFIG_BOOTP_DHCP_REQUEST_DELAY	include/configs/gplugd.h	/^#define CONFIG_BOOTP_DHCP_REQUEST_DELAY	/;"	d
CONFIG_BOOTP_DNS	include/autoconf.mk	/^CONFIG_BOOTP_DNS=y$/;"	m
CONFIG_BOOTP_DNS	include/config_distro_defaults.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/VOM405.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/am335x_shc.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/am3517_evm.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/am57xx_evm.h	/^#define CONFIG_BOOTP_DNS	/;"	d
CONFIG_BOOTP_DNS	include/configs/apf27.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/bfin_adi_common.h	/^#  define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/bur_cfg_common.h	/^#define CONFIG_BOOTP_DNS	/;"	d
CONFIG_BOOTP_DNS	include/configs/calimain.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/da850evm.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/dra7xx_evm.h	/^#define CONFIG_BOOTP_DNS	/;"	d
CONFIG_BOOTP_DNS	include/configs/ea20.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/flea3.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/ipam390.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/mcx.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/mx35pdk.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/sandbox.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/tam3517-common.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/ti814x_evm.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/ti_am335x_common.h	/^#define CONFIG_BOOTP_DNS	/;"	d
CONFIG_BOOTP_DNS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/woodburn_common.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_DNS$/;"	d
CONFIG_BOOTP_DNS2	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/VOM405.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/am335x_shc.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/am3517_evm.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/am57xx_evm.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/apf27.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/calimain.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/da850evm.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/dra7xx_evm.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/ea20.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/ipam390.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/mcx.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/sandbox.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/tam3517-common.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/ti814x_evm.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/ti_am335x_common.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_DNS2	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOOTP_DNS2$/;"	d
CONFIG_BOOTP_GATEWAY	include/autoconf.mk	/^CONFIG_BOOTP_GATEWAY=y$/;"	m
CONFIG_BOOTP_GATEWAY	include/config_distro_defaults.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/10m50_devboard.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/3c120_devboard.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/CPCI2DP.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M52277EVB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M5235EVB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M5272C3.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M5275EVB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M5282EVB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M54418TWR.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M54451EVB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/M54455EVB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MIP405.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8308RDB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8315ERDB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8323ERDB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8349ITX.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC837XERDB.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8544DS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/MPC8641HPCN.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/PATI.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/PIP405.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/PLU405.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM5200.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM823L.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM823M.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM834x.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM850L.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM850M.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM855L.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM855M.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM860L.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM860M.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM862L.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM862M.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM866M.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/TQM885D.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/VCMA9.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/VOM405.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/a3m071.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/a4m072.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/am335x_shc.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/am57xx_evm.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/amcc-common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/apf27.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91-sama5_common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91sam9260ek.h	/^#define CONFIG_BOOTP_GATEWAY	/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91sam9261ek.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91sam9263ek.h	/^#define CONFIG_BOOTP_GATEWAY	/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91sam9n12ek.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/atngw100.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/atngw100mkii.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/atstk1002.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/bfin_adi_common.h	/^#  define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/bur_cfg_common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/canmb.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/cm_t43.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/cobra5272.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/colibri_pxa270.h	/^#define	CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/corvus.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/dbau1x00.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/dra7xx_evm.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/eb_cpu5282.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/ethernut5.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/flea3.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/grasshopper.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/ids8313.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/inka4x0.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/integratorap.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/jupiter.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/km/keymile-common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/lwmon5.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/meesc.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/microblaze-generic.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/motionpro.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/mpc8308_p1m.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/mx35pdk.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/omap3_evm.h	/^#define CONFIG_BOOTP_GATEWAY	/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/openrisc-generic.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/pb1x00.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/pic32mzdask.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/picosam9g45.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/pm9261.h	/^#define CONFIG_BOOTP_GATEWAY	/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/pm9263.h	/^#define CONFIG_BOOTP_GATEWAY	/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/pm9g45.h	/^#define CONFIG_BOOTP_GATEWAY	/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/qemu-mips.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/qemu-mips64.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/s32v234evb.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/sbc8349.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/sbc8548.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/smartweb.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/smdk2410.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/snapper9260.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/snapper9g45.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/socrates.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/thunderx_88xx.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/ti814x_evm.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/ti_am335x_common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/usb_a9263.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/v38b.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/vct.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/ve8313.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/vexpress_common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/vme8349.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/woodburn_common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/x86-common.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/xpedite1000.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/xpedite520x.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/zmx25.h	/^#define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_GATEWAY	include/configs/zynq-common.h	/^# define CONFIG_BOOTP_GATEWAY$/;"	d
CONFIG_BOOTP_HOSTNAME	include/autoconf.mk	/^CONFIG_BOOTP_HOSTNAME=y$/;"	m
CONFIG_BOOTP_HOSTNAME	include/config_distro_defaults.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/10m50_devboard.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/3c120_devboard.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/CPCI2DP.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M52277EVB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M5235EVB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M5272C3.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M5275EVB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M5282EVB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M54418TWR.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M54451EVB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/M54455EVB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MIP405.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8308RDB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8313ERDB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8315ERDB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8323ERDB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC832XEMDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8349EMDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8349ITX.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC837XEMDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC837XERDB.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8540ADS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8541CDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8544DS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8548CDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8555CDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8560ADS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8568MDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8569MDS.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8610HPCD.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/PATI.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/PIP405.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/PLU405.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM5200.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM823L.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM823M.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM834x.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM850L.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM850M.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM855L.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM855M.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM860L.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM860M.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM862L.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM862M.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM866M.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/TQM885D.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/VCMA9.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/VOM405.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/a4m072.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/amcc-common.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/apf27.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91-sama5_common.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91sam9260ek.h	/^#define CONFIG_BOOTP_HOSTNAME	/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91sam9261ek.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91sam9263ek.h	/^#define CONFIG_BOOTP_HOSTNAME	/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91sam9n12ek.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/at91sam9x5ek.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/canmb.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/cobra5272.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/colibri_pxa270.h	/^#define	CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/corvus.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/dbau1x00.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/eb_cpu5282.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/ethernut5.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/ids8313.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/inka4x0.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/integratorap.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/jupiter.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/km/keymile-common.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/lwmon5.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/meesc.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/microblaze-generic.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/motionpro.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/mpc8308_p1m.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/omap3_evm.h	/^#define CONFIG_BOOTP_HOSTNAME	/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/openrisc-generic.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/pb1x00.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/pic32mzdask.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/picosam9g45.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/pm9261.h	/^#define CONFIG_BOOTP_HOSTNAME	/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/pm9263.h	/^#define CONFIG_BOOTP_HOSTNAME	/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/pm9g45.h	/^#define CONFIG_BOOTP_HOSTNAME	/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/qemu-mips.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/qemu-mips64.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/s32v234evb.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/sbc8349.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/sbc8548.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/smartweb.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/smdk2410.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/snapper9260.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/snapper9g45.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/socrates.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/thunderx_88xx.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/usb_a9263.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/v38b.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/vct.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/ve8313.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/vexpress_common.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/vme8349.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/x86-common.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/xpedite1000.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/zmx25.h	/^#define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_HOSTNAME	include/configs/zynq-common.h	/^# define CONFIG_BOOTP_HOSTNAME$/;"	d
CONFIG_BOOTP_ID_CACHE_SIZE	net/bootp.c	/^#define CONFIG_BOOTP_ID_CACHE_SIZE /;"	d	file:
CONFIG_BOOTP_MAY_FAIL	include/configs/a3m071.h	/^#define CONFIG_BOOTP_MAY_FAIL$/;"	d
CONFIG_BOOTP_MAY_FAIL	include/configs/bur_cfg_common.h	/^#define CONFIG_BOOTP_MAY_FAIL	/;"	d
CONFIG_BOOTP_MAY_FAIL	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_MAY_FAIL$/;"	d
CONFIG_BOOTP_MAY_FAIL	include/configs/zynq-common.h	/^# define CONFIG_BOOTP_MAY_FAIL$/;"	d
CONFIG_BOOTP_NISDOMAIN	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_NISDOMAIN$/;"	d
CONFIG_BOOTP_NTPSERVER	include/configs/bfin_adi_common.h	/^#  define CONFIG_BOOTP_NTPSERVER$/;"	d
CONFIG_BOOTP_NTPSERVER	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_NTPSERVER$/;"	d
CONFIG_BOOTP_PXE	include/autoconf.mk	/^CONFIG_BOOTP_PXE=y$/;"	m
CONFIG_BOOTP_PXE	include/config_distro_defaults.h	/^#define CONFIG_BOOTP_PXE$/;"	d
CONFIG_BOOTP_PXE	include/configs/thunderx_88xx.h	/^#define CONFIG_BOOTP_PXE$/;"	d
CONFIG_BOOTP_PXE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_BOOTP_PXE$/;"	d
CONFIG_BOOTP_PXE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_PXE$/;"	d
CONFIG_BOOTP_PXE_CLIENTARCH	include/config/auto.conf	/^CONFIG_BOOTP_PXE_CLIENTARCH=0x15$/;"	k
CONFIG_BOOTP_PXE_CLIENTARCH	include/generated/autoconf.h	/^#define CONFIG_BOOTP_PXE_CLIENTARCH /;"	d
CONFIG_BOOTP_PXE_CLIENTARCH	net/Kconfig	/^config BOOTP_PXE_CLIENTARCH$/;"	c
CONFIG_BOOTP_PXE_CLIENTARCH_MODULE	net/Kconfig	/^config BOOTP_PXE_CLIENTARCH$/;"	c
CONFIG_BOOTP_RANDOM_DELAY	include/configs/bfin_adi_common.h	/^#  define CONFIG_BOOTP_RANDOM_DELAY$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/VOM405.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/a3m071.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/am335x_shc.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/am3517_evm.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/am57xx_evm.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/bur_cfg_common.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/calimain.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/cm_t43.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/da850evm.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/dra7xx_evm.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/ea20.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/ipam390.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/mcx.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/omapl138_lcdk.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/sandbox.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/tam3517-common.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/ti814x_evm.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/ti_am335x_common.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SEND_HOSTNAME	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_BOOTP_SEND_HOSTNAME$/;"	d
CONFIG_BOOTP_SERVERIP	include/configs/UCP1020.h	/^#define CONFIG_BOOTP_SERVERIP$/;"	d
CONFIG_BOOTP_SERVERIP	include/configs/a3m071.h	/^#define CONFIG_BOOTP_SERVERIP$/;"	d
CONFIG_BOOTP_SERVERIP	include/configs/ot1200.h	/^#define CONFIG_BOOTP_SERVERIP$/;"	d
CONFIG_BOOTP_SERVERIP	include/configs/sandbox.h	/^#define CONFIG_BOOTP_SERVERIP$/;"	d
CONFIG_BOOTP_SERVERIP	include/configs/zynq-common.h	/^# define CONFIG_BOOTP_SERVERIP$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/autoconf.mk	/^CONFIG_BOOTP_SUBNETMASK=y$/;"	m
CONFIG_BOOTP_SUBNETMASK	include/config_distro_defaults.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/CPCI4052.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/PMC405DE.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM823L.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM823M.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM850L.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM850M.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM855L.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM855M.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM860L.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM860M.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM862L.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM862M.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM866M.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/TQM885D.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/VOM405.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/am335x_shc.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/am43xx_evm.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/am57xx_evm.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/amcc-common.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/apf27.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/atngw100.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/atngw100mkii.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/atstk1002.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/bfin_adi_common.h	/^#  define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/bur_cfg_common.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/dra7xx_evm.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/flea3.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/grasshopper.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/ids8313.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/mx35pdk.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/omap3_evm.h	/^#define CONFIG_BOOTP_SUBNETMASK	/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/ti814x_evm.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/ti_am335x_common.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/vct.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/woodburn_common.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_SUBNETMASK	include/configs/xilinx_zynqmp.h	/^#define CONFIG_BOOTP_SUBNETMASK$/;"	d
CONFIG_BOOTP_TIMEOFFSET	include/configs/devkit8000.h	/^#define CONFIG_BOOTP_TIMEOFFSET$/;"	d
CONFIG_BOOTP_VCI_STRING	include/config/auto.conf	/^CONFIG_BOOTP_VCI_STRING="U-Boot.armv7"$/;"	k
CONFIG_BOOTP_VCI_STRING	include/generated/autoconf.h	/^#define CONFIG_BOOTP_VCI_STRING /;"	d
CONFIG_BOOTP_VCI_STRING	net/Kconfig	/^config BOOTP_VCI_STRING$/;"	c
CONFIG_BOOTP_VCI_STRING_MODULE	net/Kconfig	/^config BOOTP_VCI_STRING$/;"	c
CONFIG_BOOTROM_ERR_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define CONFIG_BOOTROM_ERR_REG	/;"	d
CONFIG_BOOTSCRIPT_ADDR	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BOOTSCRIPT_ADDR	/;"	d
CONFIG_BOOTSCRIPT_COPY_RAM	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BOOTSCRIPT_COPY_RAM$/;"	d
CONFIG_BOOTSCRIPT_COPY_RAM	include/configs/T104xRDB.h	/^#define CONFIG_BOOTSCRIPT_COPY_RAM$/;"	d
CONFIG_BOOTSCRIPT_COPY_RAM	include/configs/corenet_ds.h	/^#define CONFIG_BOOTSCRIPT_COPY_RAM$/;"	d
CONFIG_BOOTSCRIPT_HDR_ADDR	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BOOTSCRIPT_HDR_ADDR	/;"	d
CONFIG_BOOTSCRIPT_HDR_ADDR	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BOOTSCRIPT_HDR_ADDR	/;"	d
CONFIG_BOOTSTAGE	common/Kconfig	/^config BOOTSTAGE$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_FDT	common/Kconfig	/^config BOOTSTAGE_FDT$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_FDT_MODULE	common/Kconfig	/^config BOOTSTAGE_FDT$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_MODULE	common/Kconfig	/^config BOOTSTAGE$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_REPORT	common/Kconfig	/^config BOOTSTAGE_REPORT$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_REPORT_MODULE	common/Kconfig	/^config BOOTSTAGE_REPORT$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_STASH	common/Kconfig	/^config BOOTSTAGE_STASH$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_STASH_ADDR	common/Kconfig	/^config BOOTSTAGE_STASH_ADDR$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_STASH_ADDR	include/config/auto.conf	/^CONFIG_BOOTSTAGE_STASH_ADDR=0$/;"	k
CONFIG_BOOTSTAGE_STASH_ADDR	include/generated/autoconf.h	/^#define CONFIG_BOOTSTAGE_STASH_ADDR /;"	d
CONFIG_BOOTSTAGE_STASH_ADDR_MODULE	common/Kconfig	/^config BOOTSTAGE_STASH_ADDR$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_STASH_MODULE	common/Kconfig	/^config BOOTSTAGE_STASH$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_STASH_SIZE	common/Kconfig	/^config BOOTSTAGE_STASH_SIZE$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_STASH_SIZE	include/config/auto.conf	/^CONFIG_BOOTSTAGE_STASH_SIZE=4096$/;"	k
CONFIG_BOOTSTAGE_STASH_SIZE	include/generated/autoconf.h	/^#define CONFIG_BOOTSTAGE_STASH_SIZE /;"	d
CONFIG_BOOTSTAGE_STASH_SIZE_MODULE	common/Kconfig	/^config BOOTSTAGE_STASH_SIZE$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_USER_COUNT	common/Kconfig	/^config BOOTSTAGE_USER_COUNT$/;"	c	menu:Boot timing
CONFIG_BOOTSTAGE_USER_COUNT	include/bootstage.h	/^#define CONFIG_BOOTSTAGE_USER_COUNT	/;"	d
CONFIG_BOOTSTAGE_USER_COUNT	include/config/auto.conf	/^CONFIG_BOOTSTAGE_USER_COUNT=20$/;"	k
CONFIG_BOOTSTAGE_USER_COUNT	include/generated/autoconf.h	/^#define CONFIG_BOOTSTAGE_USER_COUNT /;"	d
CONFIG_BOOTSTAGE_USER_COUNT_MODULE	common/Kconfig	/^config BOOTSTAGE_USER_COUNT$/;"	c	menu:Boot timing
CONFIG_BOOT_DIR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BOOT_DIR	/;"	d
CONFIG_BOOT_MODE_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_BOOT_MODE_BIT	/;"	d	file:
CONFIG_BOOT_OS_NET	include/configs/xpedite1000.h	/^#define CONFIG_BOOT_OS_NET	/;"	d
CONFIG_BOOT_OS_NET	include/configs/xpedite517x.h	/^#define CONFIG_BOOT_OS_NET	/;"	d
CONFIG_BOOT_OS_NET	include/configs/xpedite520x.h	/^#define CONFIG_BOOT_OS_NET	/;"	d
CONFIG_BOOT_OS_NET	include/configs/xpedite537x.h	/^#define CONFIG_BOOT_OS_NET	/;"	d
CONFIG_BOOT_OS_NET	include/configs/xpedite550x.h	/^#define CONFIG_BOOT_OS_NET	/;"	d
CONFIG_BOOT_PARAMS_ADDR	include/configs/spear-common.h	/^#define CONFIG_BOOT_PARAMS_ADDR	/;"	d
CONFIG_BOOT_PARAMS_ADDR	include/configs/x600.h	/^#define CONFIG_BOOT_PARAMS_ADDR	/;"	d
CONFIG_BOOT_RETRY_MIN	common/bootretry.c	/^#define CONFIG_BOOT_RETRY_MIN /;"	d	file:
CONFIG_BOOT_RETRY_MIN	include/configs/ids8313.h	/^#define CONFIG_BOOT_RETRY_MIN	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/VCMA9.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/am335x_shc.h	/^# define CONFIG_BOOT_RETRY_TIME /;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/bf537-minotaur.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/bf537-srv1.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/calimain.h	/^#define CONFIG_BOOT_RETRY_TIME /;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/eb_cpu5282.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/highbank.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/ids8313.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/ip04.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/siemens-am33x-common.h	/^#define CONFIG_BOOT_RETRY_TIME /;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/smdk2410.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOOT_RETRY_TIME	include/configs/xtfpga.h	/^#define CONFIG_BOOT_RETRY_TIME	/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/advantech_dms-ba16.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/axs10x.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/bcm_ep_board.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/exynos-common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/ge_bx50v3.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/hikey.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/mx6_common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/mx7_common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/mxs.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/rk3036_common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/rk3288_common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/rk3399_common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/socfpga_common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BOUNCE_BUFFER	include/configs/tegra-common.h	/^#define CONFIG_BOUNCE_BUFFER$/;"	d
CONFIG_BPTR_VIRT_ADDR	arch/powerpc/include/asm/config.h	/^#define CONFIG_BPTR_VIRT_ADDR	/;"	d
CONFIG_BPTR_VIRT_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_BPTR_VIRT_ADDR	/;"	d
CONFIG_BPTR_VIRT_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_BPTR_VIRT_ADDR	/;"	d
CONFIG_BSC9131	include/configs/BSC9131RDB.h	/^#define CONFIG_BSC9131$/;"	d
CONFIG_BSC9132	include/configs/BSC9132QDS.h	/^#define CONFIG_BSC9132$/;"	d
CONFIG_BS_ADDR_DEVICE	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_ADDR_DEVICE	/;"	d
CONFIG_BS_ADDR_DEVICE	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_ADDR_DEVICE	/;"	d
CONFIG_BS_ADDR_RAM	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_ADDR_RAM	/;"	d
CONFIG_BS_ADDR_RAM	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_ADDR_RAM	/;"	d
CONFIG_BS_COPY_CMD	include/config_fsl_chain_trust.h	/^#define CONFIG_BS_COPY_CMD /;"	d
CONFIG_BS_COPY_CMD	include/config_fsl_chain_trust.h	/^#define CONFIG_BS_COPY_CMD$/;"	d
CONFIG_BS_COPY_ENV	include/config_fsl_chain_trust.h	/^#define CONFIG_BS_COPY_ENV /;"	d
CONFIG_BS_COPY_ENV	include/config_fsl_chain_trust.h	/^#define CONFIG_BS_COPY_ENV$/;"	d
CONFIG_BS_HDR_ADDR_DEVICE	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_HDR_ADDR_DEVICE	/;"	d
CONFIG_BS_HDR_ADDR_DEVICE	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_HDR_ADDR_DEVICE	/;"	d
CONFIG_BS_HDR_ADDR_RAM	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_HDR_ADDR_RAM	/;"	d
CONFIG_BS_HDR_ADDR_RAM	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_HDR_ADDR_RAM	/;"	d
CONFIG_BS_HDR_SIZE	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_HDR_SIZE	/;"	d
CONFIG_BS_HDR_SIZE	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_HDR_SIZE	/;"	d
CONFIG_BS_SIZE	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_SIZE	/;"	d
CONFIG_BS_SIZE	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_BS_SIZE	/;"	d
CONFIG_BTB	include/configs/B4860QDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/BSC9131RDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/BSC9132QDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/C29XPCIE.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8536DS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8540ADS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8541CDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8544DS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8548CDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8555CDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8560ADS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8568MDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8569MDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/MPC8572DS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/P1010RDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/P1022DS.h	/^#define CONFIG_BTB$/;"	d
CONFIG_BTB	include/configs/P1023RDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/P2041RDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T102xQDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T102xRDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T1040QDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T104xRDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T208xQDS.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T208xRDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/T4240RDB.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/UCP1020.h	/^#define CONFIG_BTB$/;"	d
CONFIG_BTB	include/configs/controlcenterd.h	/^#define CONFIG_BTB$/;"	d
CONFIG_BTB	include/configs/corenet_ds.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/cyrus.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/km/kmp204x-common.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_BTB$/;"	d
CONFIG_BTB	include/configs/p1_twr.h	/^#define CONFIG_BTB$/;"	d
CONFIG_BTB	include/configs/sbc8548.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/socrates.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/t4qds.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/xpedite520x.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/xpedite537x.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BTB	include/configs/xpedite550x.h	/^#define CONFIG_BTB	/;"	d
CONFIG_BUBINGA	include/configs/bubinga.h	/^#define CONFIG_BUBINGA	/;"	d
CONFIG_BUFNO_AUTO_INCR_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_BUFNO_AUTO_INCR_BIT	/;"	d	file:
CONFIG_BUILD_ENVCRC	arch/blackfin/include/asm/config.h	/^# define CONFIG_BUILD_ENVCRC$/;"	d
CONFIG_BUILD_ENVCRC	tools/Makefile	/^CONFIG_BUILD_ENVCRC ?= $(ENVCRC-y)$/;"	m
CONFIG_BUILD_ENVCRC	tools/envcrc.c	/^# define CONFIG_BUILD_ENVCRC$/;"	d	file:
CONFIG_BUILD_TARGET	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_BUILD_TARGET	/;"	d
CONFIG_BUILD_TARGET	include/configs/ib62x0.h	/^#define CONFIG_BUILD_TARGET /;"	d
CONFIG_BUILD_TARGET	include/configs/mv-plug-common.h	/^#define CONFIG_BUILD_TARGET /;"	d
CONFIG_BUILD_TARGET	include/configs/nsa310s.h	/^#define CONFIG_BUILD_TARGET	/;"	d
CONFIG_BUILD_TARGET	include/configs/socfpga_common.h	/^#define CONFIG_BUILD_TARGET	/;"	d
CONFIG_BUS_WIDTH	drivers/ddr/marvell/axp/ddr3_init.h	/^	CONFIG_BUS_WIDTH$/;"	e	enum:config_type
CONFIG_BZIP2	include/configs/MIP405.h	/^#define CONFIG_BZIP2	/;"	d
CONFIG_BZIP2	include/configs/PIP405.h	/^#define CONFIG_BZIP2	/;"	d
CONFIG_BZIP2	include/configs/VCMA9.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/digsy_mtc.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/ib62x0.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/iconnect.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/mv-plug-common.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/nsa310s.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/sandbox.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_BZIP2	include/configs/smdk2410.h	/^#define CONFIG_BZIP2$/;"	d
CONFIG_B_SAMPLE	board/bosch/shc/Kconfig	/^config B_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_B_SAMPLE_MODULE	board/bosch/shc/Kconfig	/^config B_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_C2_SAMPLE	board/bosch/shc/Kconfig	/^config C2_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_C2_SAMPLE_MODULE	board/bosch/shc/Kconfig	/^config C2_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_C3_SAMPLE	board/bosch/shc/Kconfig	/^config C3_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_C3_SAMPLE_MODULE	board/bosch/shc/Kconfig	/^config C3_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_CACHE_MRC_BIN	arch/x86/Kconfig	/^config CACHE_MRC_BIN$/;"	c	menu:x86 architecture
CONFIG_CACHE_MRC_BIN_MODULE	arch/x86/Kconfig	/^config CACHE_MRC_BIN$/;"	c	menu:x86 architecture
CONFIG_CACHE_MRC_SIZE_KB	arch/x86/Kconfig	/^config CACHE_MRC_SIZE_KB$/;"	c	menu:x86 architecture
CONFIG_CACHE_MRC_SIZE_KB_MODULE	arch/x86/Kconfig	/^config CACHE_MRC_SIZE_KB$/;"	c	menu:x86 architecture
CONFIG_CACHE_UNIPHIER	arch/arm/mach-uniphier/Kconfig	/^config CACHE_UNIPHIER$/;"	c
CONFIG_CACHE_UNIPHIER_MODULE	arch/arm/mach-uniphier/Kconfig	/^config CACHE_UNIPHIER$/;"	c
CONFIG_CADENCE_QSPI	drivers/spi/Kconfig	/^config CADENCE_QSPI$/;"	c	menu:SPI Support
CONFIG_CADENCE_QSPI	include/configs/k2g_evm.h	/^#define CONFIG_CADENCE_QSPI$/;"	d
CONFIG_CADENCE_QSPI_MODULE	drivers/spi/Kconfig	/^config CADENCE_QSPI$/;"	c	menu:SPI Support
CONFIG_CALXEDA_XGMAC	include/configs/highbank.h	/^#define CONFIG_CALXEDA_XGMAC$/;"	d
CONFIG_CANMB	include/configs/canmb.h	/^#define CONFIG_CANMB	/;"	d
CONFIG_CANYONLANDS	board/amcc/canyonlands/Kconfig	/^config CANYONLANDS$/;"	c	choice:BOARD_TYPE
CONFIG_CANYONLANDS_MODULE	board/amcc/canyonlands/Kconfig	/^config CANYONLANDS$/;"	c	choice:BOARD_TYPE
CONFIG_CBMEM_CONSOLE	arch/x86/cpu/coreboot/Kconfig	/^config CBMEM_CONSOLE$/;"	c
CONFIG_CBMEM_CONSOLE_MODULE	arch/x86/cpu/coreboot/Kconfig	/^config CBMEM_CONSOLE$/;"	c
CONFIG_CCLK_ACT_DIV	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_CCLK_ACT_DIV /;"	d	file:
CONFIG_CCLK_DIV	include/configs/bct-brettl2.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf506f-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf518f-ezbrd.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf525-ucr2.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf526-ezbrd.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf527-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf527-sdp.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf533-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf533-stamp.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf537-minotaur.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf537-pnav.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf537-srv1.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf537-stamp.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf538f-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf548-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf561-acvilon.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf561-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/bf609-ezkit.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/blackstamp.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/blackvme.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/br4.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/cm-bf527.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/cm-bf533.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/cm-bf537e.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/cm-bf537u.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/cm-bf548.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/cm-bf561.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/dnp5370.h	/^#define CONFIG_CCLK_DIV /;"	d
CONFIG_CCLK_DIV	include/configs/ibf-dsp561.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/ip04.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/pr1.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/tcm-bf518.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_DIV	include/configs/tcm-bf537.h	/^#define CONFIG_CCLK_DIV	/;"	d
CONFIG_CCLK_HZ	arch/blackfin/include/asm/config.h	/^#  define CONFIG_CCLK_HZ /;"	d
CONFIG_CC_OPTIMIZE_FOR_SIZE	Kconfig	/^config CC_OPTIMIZE_FOR_SIZE$/;"	c	menu:General setup
CONFIG_CC_OPTIMIZE_FOR_SIZE	include/config/auto.conf	/^CONFIG_CC_OPTIMIZE_FOR_SIZE=y$/;"	k
CONFIG_CC_OPTIMIZE_FOR_SIZE	include/generated/autoconf.h	/^#define CONFIG_CC_OPTIMIZE_FOR_SIZE /;"	d
CONFIG_CC_OPTIMIZE_FOR_SIZE_MODULE	Kconfig	/^config CC_OPTIMIZE_FOR_SIZE$/;"	c	menu:General setup
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED	lib/Kconfig	/^config CC_OPTIMIZE_LIBS_FOR_SPEED$/;"	c	menu:Library routines
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED_MODULE	lib/Kconfig	/^config CC_OPTIMIZE_LIBS_FOR_SPEED$/;"	c	menu:Library routines
CONFIG_CFB_CONSOLE	drivers/video/Kconfig	/^config CFB_CONSOLE$/;"	c	menu:Graphics support
CONFIG_CFB_CONSOLE	include/config/auto.conf	/^CONFIG_CFB_CONSOLE=y$/;"	k
CONFIG_CFB_CONSOLE	include/generated/autoconf.h	/^#define CONFIG_CFB_CONSOLE /;"	d
CONFIG_CFB_CONSOLE_ANSI	drivers/video/Kconfig	/^config CFB_CONSOLE_ANSI$/;"	c	menu:Graphics support
CONFIG_CFB_CONSOLE_ANSI_MODULE	drivers/video/Kconfig	/^config CFB_CONSOLE_ANSI$/;"	c	menu:Graphics support
CONFIG_CFB_CONSOLE_MODULE	drivers/video/Kconfig	/^config CFB_CONSOLE$/;"	c	menu:Graphics support
CONFIG_CFG_DATA_SECTOR	drivers/mmc/fsl_esdhc_spl.c	/^#define CONFIG_CFG_DATA_SECTOR	/;"	d	file:
CONFIG_CFG_DATA_SECTOR	drivers/mtd/spi/fsl_espi_spl.c	/^#define CONFIG_CFG_DATA_SECTOR	/;"	d	file:
CONFIG_CFG_FAT	include/configs/TQM5200.h	/^    #define CONFIG_CFG_FAT$/;"	d
CONFIG_CFG_USB	include/configs/TQM5200.h	/^    #define CONFIG_CFG_USB$/;"	d
CONFIG_CFI_FLASH	drivers/mtd/Kconfig	/^config CFI_FLASH$/;"	c	menu:MTD Support
CONFIG_CFI_FLASH_MODULE	drivers/mtd/Kconfig	/^config CFI_FLASH$/;"	c	menu:MTD Support
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/P1022DS.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/T102xQDS.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/T102xRDB.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/T1040QDS.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/bct-brettl2.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/bf609-ezkit.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/blanche.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/cm-bf527.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/cm-bf537e.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/cm-bf537u.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/ls1021aqds.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/ls1021atwr.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/ls1043aqds.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/ls1043ardb.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/ls1046aqds.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/t3corp.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/tcm-bf537.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS	include/configs/vct.h	/^#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS$/;"	d
CONFIG_CF_ATASEL_DIS	include/configs/bf537-stamp.h	/^#define CONFIG_CF_ATASEL_DIS	/;"	d
CONFIG_CF_ATASEL_ENA	include/configs/bf537-stamp.h	/^#define CONFIG_CF_ATASEL_ENA	/;"	d
CONFIG_CF_DSPI	include/configs/M52277EVB.h	/^#define CONFIG_CF_DSPI$/;"	d
CONFIG_CF_DSPI	include/configs/M54418TWR.h	/^#define CONFIG_CF_DSPI$/;"	d
CONFIG_CF_DSPI	include/configs/M54451EVB.h	/^#define CONFIG_CF_DSPI$/;"	d
CONFIG_CF_DSPI	include/configs/M54455EVB.h	/^#define CONFIG_CF_DSPI$/;"	d
CONFIG_CF_SPI	include/configs/M52277EVB.h	/^#define CONFIG_CF_SPI$/;"	d
CONFIG_CF_SPI	include/configs/M54418TWR.h	/^#define CONFIG_CF_SPI$/;"	d
CONFIG_CF_SPI	include/configs/M54451EVB.h	/^#define CONFIG_CF_SPI$/;"	d
CONFIG_CF_SPI	include/configs/M54455EVB.h	/^#define CONFIG_CF_SPI$/;"	d
CONFIG_CF_V2	arch/m68k/include/asm/cache.h	/^#define CONFIG_CF_V2$/;"	d
CONFIG_CF_V3	arch/m68k/include/asm/cache.h	/^#define CONFIG_CF_V3$/;"	d
CONFIG_CF_V4	arch/m68k/include/asm/cache.h	/^#define CONFIG_CF_V4$/;"	d
CONFIG_CF_V4E	arch/m68k/include/asm/cache.h	/^#define CONFIG_CF_V4E	/;"	d
CONFIG_CGU_CTL_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_CGU_CTL_VAL /;"	d	file:
CONFIG_CGU_DIV_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_CGU_DIV_VAL /;"	d	file:
CONFIG_CHAIN_BOOT_CMD	include/config_fsl_chain_trust.h	/^#define CONFIG_CHAIN_BOOT_CMD	/;"	d
CONFIG_CHAIN_OF_TRUST	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_CHAIN_OF_TRUST$/;"	d
CONFIG_CHAIN_OF_TRUST	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_CHAIN_OF_TRUST$/;"	d
CONFIG_CHARON	include/configs/charon.h	/^#define CONFIG_CHARON$/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/B4860QDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/BSC9131RDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/BSC9132QDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/C29XPCIE.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8349EMDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8536DS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8540ADS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8541CDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8544DS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8548CDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8555CDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8560ADS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8568MDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8569MDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8572DS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8610HPCD.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/MPC8641HPCN.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/P1010RDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/P1022DS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/P1023RDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/P2041RDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T102xQDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T102xRDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T1040QDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T104xRDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T208xQDS.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T208xRDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/T4240RDB.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/UCP1020.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/controlcenterd.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/corenet_ds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/cyrus.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/km/kmp204x-common.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1012afrdm.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1012aqds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1012ardb.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1021aqds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1043aqds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1043ardb.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1046aqds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls1046ardb.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls2080a_common.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls2080a_emu.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls2080a_simu.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls2080aqds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/ls2080ardb.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/p1_twr.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/qemu-ppce500.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/sbc8548.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/sbc8641d.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/socrates.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/t4qds.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/xpedite517x.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/xpedite520x.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/xpedite537x.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL	/;"	d
CONFIG_CHIP_SELECTS_PER_CTRL	include/configs/xpedite550x.h	/^#define CONFIG_CHIP_SELECTS_PER_CTRL /;"	d
CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS	include/configs/tegra-common-post.h	/^#define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS$/;"	d
CONFIG_CIS8201_PHY	include/configs/icon.h	/^#define CONFIG_CIS8201_PHY	/;"	d
CONFIG_CIS8201_PHY	include/configs/katmai.h	/^#define CONFIG_CIS8201_PHY	/;"	d
CONFIG_CIS8201_PHY	include/configs/luan.h	/^#define CONFIG_CIS8201_PHY	/;"	d
CONFIG_CIS8201_PHY	include/configs/yucca.h	/^#define CONFIG_CIS8201_PHY	/;"	d
CONFIG_CI_UDC	drivers/usb/gadget/Kconfig	/^config CI_UDC$/;"	c
CONFIG_CI_UDC	include/configs/ge_bx50v3.h	/^#define CONFIG_CI_UDC$/;"	d
CONFIG_CI_UDC_HAS_HOSTPC	include/configs/tegra-common-usb-gadget.h	/^#define CONFIG_CI_UDC_HAS_HOSTPC$/;"	d
CONFIG_CI_UDC_MODULE	drivers/usb/gadget/Kconfig	/^config CI_UDC$/;"	c
CONFIG_CLK	drivers/clk/Kconfig	/^config CLK$/;"	c	menu:Clock
CONFIG_CLK0_DIV	board/armadeus/apf27/apf27.h	/^#define CONFIG_CLK0_DIV	/;"	d
CONFIG_CLK0_EN	board/armadeus/apf27/apf27.h	/^#define CONFIG_CLK0_EN	/;"	d
CONFIG_CLKIN_HALF	include/configs/bct-brettl2.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf506f-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf518f-ezbrd.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf525-ucr2.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf526-ezbrd.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf527-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf527-sdp.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf533-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf533-stamp.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf537-minotaur.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf537-pnav.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf537-srv1.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf537-stamp.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf538f-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf548-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf561-acvilon.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf561-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/bf609-ezkit.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/blackstamp.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/blackvme.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/br4.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/cm-bf527.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/cm-bf533.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/cm-bf537e.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/cm-bf537u.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/cm-bf548.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/cm-bf561.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/dnp5370.h	/^#define CONFIG_CLKIN_HALF /;"	d
CONFIG_CLKIN_HALF	include/configs/ibf-dsp561.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/ip04.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/pr1.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/tcm-bf518.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HALF	include/configs/tcm-bf537.h	/^#define CONFIG_CLKIN_HALF	/;"	d
CONFIG_CLKIN_HZ	include/configs/bct-brettl2.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf506f-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf518f-ezbrd.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf525-ucr2.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf526-ezbrd.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf527-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf527-sdp.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf533-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf533-stamp.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf537-minotaur.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf537-pnav.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf537-srv1.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf537-stamp.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf538f-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf548-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf561-acvilon.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf561-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/bf609-ezkit.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/blackstamp.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/blackvme.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/br4.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/cm-bf527.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/cm-bf533.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/cm-bf537e.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/cm-bf537u.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/cm-bf548.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/cm-bf561.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/dnp5370.h	/^#define CONFIG_CLKIN_HZ /;"	d
CONFIG_CLKIN_HZ	include/configs/ibf-dsp561.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/ip04.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/pr1.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/tcm-bf518.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLKIN_HZ	include/configs/tcm-bf537.h	/^#define CONFIG_CLKIN_HZ	/;"	d
CONFIG_CLK_1000_400_200	include/configs/origen.h	/^#define CONFIG_CLK_1000_400_200$/;"	d
CONFIG_CLK_1000_400_200	include/configs/smdkv310.h	/^#define CONFIG_CLK_1000_400_200$/;"	d
CONFIG_CLK_AT91	drivers/clk/at91/Kconfig	/^config CLK_AT91$/;"	c
CONFIG_CLK_AT91_MODULE	drivers/clk/at91/Kconfig	/^config CLK_AT91$/;"	c
CONFIG_CLK_BOSTON	drivers/clk/Kconfig	/^config CLK_BOSTON$/;"	c	menu:Clock
CONFIG_CLK_BOSTON_MODULE	drivers/clk/Kconfig	/^config CLK_BOSTON$/;"	c	menu:Clock
CONFIG_CLK_EXYNOS	drivers/clk/exynos/Kconfig	/^config CLK_EXYNOS$/;"	c
CONFIG_CLK_EXYNOS7420	drivers/clk/exynos/Kconfig	/^config CLK_EXYNOS7420$/;"	c	menu:Clock drivers for Exynos SoCs
CONFIG_CLK_EXYNOS7420_MODULE	drivers/clk/exynos/Kconfig	/^config CLK_EXYNOS7420$/;"	c	menu:Clock drivers for Exynos SoCs
CONFIG_CLK_EXYNOS_MODULE	drivers/clk/exynos/Kconfig	/^config CLK_EXYNOS$/;"	c
CONFIG_CLK_MODULE	drivers/clk/Kconfig	/^config CLK$/;"	c	menu:Clock
CONFIG_CLK_UNIPHIER	drivers/clk/uniphier/Kconfig	/^config CLK_UNIPHIER$/;"	c
CONFIG_CLK_UNIPHIER_MODULE	drivers/clk/uniphier/Kconfig	/^config CLK_UNIPHIER$/;"	c
CONFIG_CLOCKS	include/configs/da850evm.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/ea20.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/ipam390.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/legoev3.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/omapl138_lcdk.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/socfpga_common.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCKS	include/configs/zynq-common.h	/^#define CONFIG_CLOCKS$/;"	d
CONFIG_CLOCK_SYNTHESIZER	include/configs/am335x_evm.h	/^#define CONFIG_CLOCK_SYNTHESIZER$/;"	d
CONFIG_CM1136	arch/arm/mach-integrator/Kconfig	/^config CM1136$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM1136_MODULE	arch/arm/mach-integrator/Kconfig	/^config CM1136$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM5200	include/configs/cm5200.h	/^#define CONFIG_CM5200	/;"	d
CONFIG_CM720T	arch/arm/mach-integrator/Kconfig	/^config CM720T$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM720T_MODULE	arch/arm/mach-integrator/Kconfig	/^config CM720T$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM920T	arch/arm/mach-integrator/Kconfig	/^config CM920T$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM920T_MODULE	arch/arm/mach-integrator/Kconfig	/^config CM920T$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM926EJ_S	arch/arm/mach-integrator/Kconfig	/^config CM926EJ_S$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM926EJ_S_MODULE	arch/arm/mach-integrator/Kconfig	/^config CM926EJ_S$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM946ES	arch/arm/mach-integrator/Kconfig	/^config CM946ES$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CM946ES_MODULE	arch/arm/mach-integrator/Kconfig	/^config CM946ES$/;"	c	choice:Integrator Options""choicee9c481760204
CONFIG_CMC_ADDR	arch/x86/cpu/quark/Kconfig	/^config CMC_ADDR$/;"	c
CONFIG_CMC_ADDR	arch/x86/cpu/queensbay/Kconfig	/^config CMC_ADDR$/;"	c
CONFIG_CMC_ADDR_MODULE	arch/x86/cpu/quark/Kconfig	/^config CMC_ADDR$/;"	c
CONFIG_CMC_ADDR_MODULE	arch/x86/cpu/queensbay/Kconfig	/^config CMC_ADDR$/;"	c
CONFIG_CMC_FILE	arch/x86/cpu/quark/Kconfig	/^config CMC_FILE$/;"	c
CONFIG_CMC_FILE	arch/x86/cpu/queensbay/Kconfig	/^config CMC_FILE$/;"	c
CONFIG_CMC_FILE_MODULE	arch/x86/cpu/quark/Kconfig	/^config CMC_FILE$/;"	c
CONFIG_CMC_FILE_MODULE	arch/x86/cpu/queensbay/Kconfig	/^config CMC_FILE$/;"	c
CONFIG_CMDLINE	cmd/Kconfig	/^config CMDLINE$/;"	c	menu:Command line interface
CONFIG_CMDLINE	include/config/auto.conf	/^CONFIG_CMDLINE=y$/;"	k
CONFIG_CMDLINE	include/generated/autoconf.h	/^#define CONFIG_CMDLINE /;"	d
CONFIG_CMDLINE_EDITING	include/autoconf.mk	/^CONFIG_CMDLINE_EDITING=y$/;"	m
CONFIG_CMDLINE_EDITING	include/config_distro_defaults.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/10m50_devboard.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/3c120_devboard.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/B4860QDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/BSC9131RDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/BSC9132QDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/C29XPCIE.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/CPCI4052.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8308RDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8313ERDB.h	/^#define CONFIG_CMDLINE_EDITING /;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8315ERDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8323ERDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC832XEMDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8349EMDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8349ITX.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC837XEMDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC837XERDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8536DS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8540ADS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8541CDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8544DS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8548CDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8555CDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8560ADS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8568MDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8569MDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8572DS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8610HPCD.h	/^#define CONFIG_CMDLINE_EDITING /;"	d
CONFIG_CMDLINE_EDITING	include/configs/MPC8641HPCN.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/P1010RDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/P1022DS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/P1023RDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/P2041RDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/PLU405.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/PMC405DE.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/PMC440.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T102xQDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T102xRDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T1040QDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T104xRDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T208xQDS.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T208xRDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/T4240RDB.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM5200.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM823L.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM823M.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM834x.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM850L.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM850M.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM855L.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM855M.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM860L.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM860M.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM862L.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM862M.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM866M.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/TQM885D.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/UCP1020.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/VCMA9.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/VOM405.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/a3m071.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/a4m072.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ac14xx.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/advantech_dms-ba16.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/am3517_evm.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/amcc-common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ap121.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ap143.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/apf27.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/aria.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/astro_mcf5373l.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91-sama5_common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91rm9200ek.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9260ek.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9261ek.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9263ek.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9n12ek.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9rlek.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/at91sam9x5ek.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bcm23550_w1d.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bcm28155_ap.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bcm_ep_board.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bf537-minotaur.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bf537-srv1.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bfin_adi_common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/blackstamp.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/blackvme.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/bur_cfg_common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/calimain.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/cm_t35.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/cm_t3517.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/colibri_pxa270.h	/^#define	CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/colibri_vf.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/controlcenterd.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/corenet_ds.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/corvus.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/cyrus.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/da850evm.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/devkit3250.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/digsy_mtc.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ea20.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/eb_cpu5282.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/edminiv2.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ethernut5.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/flea3.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ge_bx50v3.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/grasshopper.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/hikey.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/hrcon.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ids8313.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/imx27lite-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/imx31_phycore.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ipam390.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ipek01.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/jupiter.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/km/keymile-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/legoev3.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ls1012a_common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ls1021aqds.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ls1021atwr.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ls1043a_common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ls1046a_common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ls2080a_common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/lwmon5.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/m53evk.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/malta.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/manroland/common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mcx.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mecp5123.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/meesc.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/meson-gxbb-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/microblaze-generic.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/motionpro.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mpc5121-common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mpc5121ads.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mpc8308_p1m.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/munices.h	/^#define CONFIG_CMDLINE_EDITING /;"	d
CONFIG_CMDLINE_EDITING	include/configs/mv-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx25pdk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx31ads.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx31pdk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx35pdk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx51evk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx53ard.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx53evk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx53loco.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx53smd.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx6_common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mx7_common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/mxs.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/nas220.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/nokia_rx51.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/o2dnt-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/omap3_logic.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/openrisc-generic.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/p1_twr.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/pcm030.h	/^#define CONFIG_CMDLINE_EDITING /;"	d
CONFIG_CMDLINE_EDITING	include/configs/pcm052.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/pic32mzdask.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/pico-imx6ul.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/picosam9g45.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/pm9261.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/pm9263.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/pm9g45.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/qemu-mips.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/qemu-mips64.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/qemu-ppce500.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/rcar-gen2-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/s32v234evb.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/s5p_goni.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/sandbox.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/sbc8349.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/sbc8548.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/sbc8641d.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/sh7752evb.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/sh7753evb.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/siemens-am33x-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/smartweb.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/smdk2410.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/smdkc100.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/snapper9260.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/snapper9g45.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/socfpga_common.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/socrates.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/spear-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/stm32f429-discovery.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/stm32f746-disco.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/strider.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/stv0991.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/t4qds.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/tam3517-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/tao3530.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/taurus.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/thunderx_88xx.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ti_armv7_common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/tplink_wdr4300.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/tricorder.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ts4800.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/uniphier.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/usb_a9263.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/vct.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/ve8313.h	/^#define CONFIG_CMDLINE_EDITING /;"	d
CONFIG_CMDLINE_EDITING	include/configs/vexpress_aemv8a.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/vme8349.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/woodburn_common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/work_92105.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/x600.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/x86-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xilinx-ppc.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xpedite1000.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xpedite517x.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xpedite520x.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xpedite537x.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xpedite550x.h	/^#define CONFIG_CMDLINE_EDITING	/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xpress.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/xtfpga.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/zmx25.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_EDITING	include/configs/zynq-common.h	/^#define CONFIG_CMDLINE_EDITING$/;"	d
CONFIG_CMDLINE_MODULE	cmd/Kconfig	/^config CMDLINE$/;"	c	menu:Command line interface
CONFIG_CMDLINE_PS_SUPPORT	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_CMDLINE_PS_SUPPORT$/;"	d
CONFIG_CMDLINE_TAG	include/autoconf.mk	/^CONFIG_CMDLINE_TAG=y$/;"	m
CONFIG_CMDLINE_TAG	include/configs/VCMA9.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/adp-ag101p.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/advantech_dms-ba16.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/am3517_crane.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/am3517_evm.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/apf27.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91rm9200ek.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9260ek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9261ek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9263ek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9n12ek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9rlek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/at91sam9x5ek.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/atngw100.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/atngw100mkii.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/atstk1002.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/brppt1.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/brxre1.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/calimain.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/cm_t35.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/cm_t3517.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/colibri_pxa270.h	/^#define	CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/corvus.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/da850evm.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/devkit3250.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/ea20.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/edb93xx.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/edminiv2.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ethernut5.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/exynos-common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/flea3.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ge_bx50v3.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/grasshopper.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/h2200.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/imx27lite-common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/imx31_phycore.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/integrator-common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ipam390.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/kc1.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/km/km_arm.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/kzm9g.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/legoev3.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/ls1021aqds.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/ls1021atwr.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/ls1043aqds.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/ls1046aqds.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/m53evk.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/ma5d4evk.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/mcx.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/meesc.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mv-common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx25pdk.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx31ads.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx31pdk.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx35pdk.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx51evk.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx53ard.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx53evk.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx53loco.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx53smd.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/mx6_common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/mxs.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/nokia_rx51.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/omap3_evm.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/omap3_logic.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/pcm052.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/picosam9g45.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/pm9261.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/pm9263.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/pm9g45.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/rcar-gen2-common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/rpi.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/s32v234evb.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/s5p_goni.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/siemens-am33x-common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/smartweb.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/smdk2410.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/smdkc100.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/snapper9260.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/snapper9g45.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/sniper.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/spear-common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/stm32f429-discovery.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/stm32f746-disco.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/sunxi-common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/tam3517-common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/tao3530.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/taurus.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/tec-ng.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/tegra-common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ti814x_evm.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ti816x_evm.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ti_armv7_common.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/tricorder.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/ts4800.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/usb_a9263.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/vexpress_common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/vf610twr.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/woodburn_common.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	include/configs/work_92105.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/x600.h	/^#define CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/zipitz2.h	/^#define	CONFIG_CMDLINE_TAG$/;"	d
CONFIG_CMDLINE_TAG	include/configs/zmx25.h	/^#define CONFIG_CMDLINE_TAG	/;"	d
CONFIG_CMDLINE_TAG	spl/include/autoconf.mk	/^CONFIG_CMDLINE_TAG=y$/;"	m
CONFIG_CMD_AMBAPP	cmd/Kconfig	/^config CMD_AMBAPP$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_AMBAPP_MODULE	cmd/Kconfig	/^config CMD_AMBAPP$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_ARMFLASH	cmd/Kconfig	/^config CMD_ARMFLASH$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_ARMFLASH_MODULE	cmd/Kconfig	/^config CMD_ARMFLASH$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_ASKEN	include/configs/ti816x_evm.h	/^#define CONFIG_CMD_ASKEN$/;"	d
CONFIG_CMD_ASKENV	cmd/Kconfig	/^config CMD_ASKENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_ASKENV_MODULE	cmd/Kconfig	/^config CMD_ASKENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_ATF	board/cavium/thunderx/Kconfig	/^config CMD_ATF$/;"	c
CONFIG_CMD_ATF_MODULE	board/cavium/thunderx/Kconfig	/^config CMD_ATF$/;"	c
CONFIG_CMD_BAT	include/configs/omap4_sdp4430.h	/^#define CONFIG_CMD_BAT	/;"	d
CONFIG_CMD_BDI	cmd/Kconfig	/^config CMD_BDI$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_BDI	include/config/auto.conf	/^CONFIG_CMD_BDI=y$/;"	k
CONFIG_CMD_BDI	include/generated/autoconf.h	/^#define CONFIG_CMD_BDI /;"	d
CONFIG_CMD_BDI_MODULE	cmd/Kconfig	/^config CMD_BDI$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_BEDBUG	include/config_cmd_all.h	/^#define CONFIG_CMD_BEDBUG	/;"	d
CONFIG_CMD_BEDBUG	include/configs/motionpro.h	/^#define CONFIG_CMD_BEDBUG$/;"	d
CONFIG_CMD_BLOB	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_CMD_BLOB$/;"	d
CONFIG_CMD_BLOB	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_CMD_BLOB$/;"	d
CONFIG_CMD_BLOCK_CACHE	cmd/Kconfig	/^config CMD_BLOCK_CACHE$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_BLOCK_CACHE_MODULE	cmd/Kconfig	/^config CMD_BLOCK_CACHE$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_BMODE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/cgtqmx6eval.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/colibri_imx7.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/el6x_common.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/embestmx6boards.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/ge_bx50v3.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/gw_ventana.h	/^#define CONFIG_CMD_BMODE /;"	d
CONFIG_CMD_BMODE	include/configs/mx53evk.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/mx6sabre_common.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/mx6ullevk.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/nitrogen6x.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/novena.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/ot1200.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/pcm058.h	/^#define CONFIG_CMD_BMODE /;"	d
CONFIG_CMD_BMODE	include/configs/platinum.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/secomx6quq7.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/tbs2910.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/titanium.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/tqma6.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/udoo.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/wandboard.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMODE	include/configs/xpress.h	/^#define CONFIG_CMD_BMODE$/;"	d
CONFIG_CMD_BMP	include/autoconf.mk	/^CONFIG_CMD_BMP=y$/;"	m
CONFIG_CMD_BMP	include/config_cmd_all.h	/^#define CONFIG_CMD_BMP	/;"	d
CONFIG_CMD_BMP	include/config_fallbacks.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/MPC8610HPCD.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/P1022DS.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/T102xQDS.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/T102xRDB.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/T1040QDS.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/T104xRDB.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/TQM5200.h	/^    #define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/TQM823L.h	/^    #define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/aristainetos2.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/aristainetos2b.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/brxre1.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/cm_fx6.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/cm_t35.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/cm_t3517.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/colibri_imx7.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/colibri_pxa270.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/colibri_t20.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/controlcenterd.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/dfi-bt700.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/ea20.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/icon.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/imx31_phycore.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/ipek01.h	/^#define CONFIG_CMD_BMP	/;"	d
CONFIG_CMD_BMP	include/configs/ls1021aqds.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/ls1021atwr.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/lwmon5.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/m28evk.h	/^#define	CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/m28evk.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/m53evk.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/ma5d4evk.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mcx.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mt_ventoux.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mx23evk.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mx28evk.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mx6sxsabresd.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/mx7dsabresd.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/nitrogen6x.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/nyan-big.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/pdm360ng.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/pxm2.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/rut.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/sandbox.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/sequoia.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/socrates.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/sunxi-common.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	include/configs/theadorable.h	/^#define CONFIG_CMD_BMP$/;"	d
CONFIG_CMD_BMP	spl/include/autoconf.mk	/^CONFIG_CMD_BMP=y$/;"	m
CONFIG_CMD_BOOTD	cmd/Kconfig	/^config CMD_BOOTD$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTD	include/config/auto.conf	/^CONFIG_CMD_BOOTD=y$/;"	k
CONFIG_CMD_BOOTD	include/generated/autoconf.h	/^#define CONFIG_CMD_BOOTD /;"	d
CONFIG_CMD_BOOTD_MODULE	cmd/Kconfig	/^config CMD_BOOTD$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTEFI	cmd/Kconfig	/^config CMD_BOOTEFI$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTEFI	include/config/auto.conf	/^CONFIG_CMD_BOOTEFI=y$/;"	k
CONFIG_CMD_BOOTEFI	include/generated/autoconf.h	/^#define CONFIG_CMD_BOOTEFI /;"	d
CONFIG_CMD_BOOTEFI_MODULE	cmd/Kconfig	/^config CMD_BOOTEFI$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTI	cmd/Kconfig	/^config CMD_BOOTI$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTI_MODULE	cmd/Kconfig	/^config CMD_BOOTI$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTLDR	include/configs/bf537-minotaur.h	/^#define CONFIG_CMD_BOOTLDR$/;"	d
CONFIG_CMD_BOOTLDR	include/configs/bf537-srv1.h	/^#define CONFIG_CMD_BOOTLDR$/;"	d
CONFIG_CMD_BOOTLDR	include/configs/bfin_adi_common.h	/^# define CONFIG_CMD_BOOTLDR$/;"	d
CONFIG_CMD_BOOTLDR	include/configs/blackstamp.h	/^#define CONFIG_CMD_BOOTLDR$/;"	d
CONFIG_CMD_BOOTLDR	include/configs/blackvme.h	/^#define CONFIG_CMD_BOOTLDR$/;"	d
CONFIG_CMD_BOOTM	cmd/Kconfig	/^config CMD_BOOTM$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTM	include/config/auto.conf	/^CONFIG_CMD_BOOTM=y$/;"	k
CONFIG_CMD_BOOTM	include/generated/autoconf.h	/^#define CONFIG_CMD_BOOTM /;"	d
CONFIG_CMD_BOOTMENU	include/configs/nokia_rx51.h	/^#define CONFIG_CMD_BOOTMENU	/;"	d
CONFIG_CMD_BOOTM_MODULE	cmd/Kconfig	/^config CMD_BOOTM$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTSTAGE	cmd/Kconfig	/^config CMD_BOOTSTAGE$/;"	c	menu:Command line interface
CONFIG_CMD_BOOTSTAGE_MODULE	cmd/Kconfig	/^config CMD_BOOTSTAGE$/;"	c	menu:Command line interface
CONFIG_CMD_BOOTZ	cmd/Kconfig	/^config CMD_BOOTZ$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BOOTZ	include/config/auto.conf	/^CONFIG_CMD_BOOTZ=y$/;"	k
CONFIG_CMD_BOOTZ	include/configs/el6x_common.h	/^#define CONFIG_CMD_BOOTZ$/;"	d
CONFIG_CMD_BOOTZ	include/generated/autoconf.h	/^#define CONFIG_CMD_BOOTZ /;"	d
CONFIG_CMD_BOOTZ_MODULE	cmd/Kconfig	/^config CMD_BOOTZ$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_BSP	include/config_cmd_all.h	/^#define CONFIG_CMD_BSP	/;"	d
CONFIG_CMD_BSP	include/configs/CPCI2DP.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/CPCI4052.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/MIP405.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/PATI.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/PIP405.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/PMC405DE.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/PMC440.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/TQM5200.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/VCMA9.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/VOM405.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/a3m071.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/apf27.h	/^#define CONFIG_CMD_BSP	/;"	d
CONFIG_CMD_BSP	include/configs/cm5200.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/ethernut5.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/o3dnt.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/openrisc-generic.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_BSP	include/configs/smdk2410.h	/^#define CONFIG_CMD_BSP$/;"	d
CONFIG_CMD_CACHE	cmd/Kconfig	/^config CMD_CACHE$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_CACHE	include/configs/am335x_shc.h	/^#define CONFIG_CMD_CACHE$/;"	d
CONFIG_CMD_CACHE	include/configs/s32v234evb.h	/^#define CONFIG_CMD_CACHE$/;"	d
CONFIG_CMD_CACHE	include/configs/snapper9g45.h	/^#define CONFIG_CMD_CACHE$/;"	d
CONFIG_CMD_CACHE_MODULE	cmd/Kconfig	/^config CMD_CACHE$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_CBFS	include/configs/sandbox.h	/^#define CONFIG_CMD_CBFS$/;"	d
CONFIG_CMD_CBFS	include/configs/x86-common.h	/^#define CONFIG_CMD_CBFS$/;"	d
CONFIG_CMD_CDP	cmd/Kconfig	/^config CMD_CDP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_CDP_MODULE	cmd/Kconfig	/^config CMD_CDP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_CHIP_CONFIG	include/configs/PMC405DE.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/canyonlands.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/icon.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/intip.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/io64.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/katmai.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/kilauea.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/sequoia.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CHIP_CONFIG	include/configs/t3corp.h	/^#define CONFIG_CMD_CHIP_CONFIG$/;"	d
CONFIG_CMD_CLEAR	include/configs/nokia_rx51.h	/^#define CONFIG_CMD_CLEAR	/;"	d
CONFIG_CMD_CLK	include/config_cmd_all.h	/^#define CONFIG_CMD_CLK	/;"	d
CONFIG_CMD_CLK	include/configs/pic32mzdask.h	/^#define CONFIG_CMD_CLK$/;"	d
CONFIG_CMD_CLK	include/configs/zynq-common.h	/^#define CONFIG_CMD_CLK$/;"	d
CONFIG_CMD_CONSOLE	cmd/Kconfig	/^config CMD_CONSOLE$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_CONSOLE	include/config/auto.conf	/^CONFIG_CMD_CONSOLE=y$/;"	k
CONFIG_CMD_CONSOLE	include/generated/autoconf.h	/^#define CONFIG_CMD_CONSOLE /;"	d
CONFIG_CMD_CONSOLE_MODULE	cmd/Kconfig	/^config CMD_CONSOLE$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_CPLBINFO	include/configs/bfin_adi_common.h	/^# define CONFIG_CMD_CPLBINFO$/;"	d
CONFIG_CMD_CPLBINFO	include/configs/blackstamp.h	/^#define CONFIG_CMD_CPLBINFO$/;"	d
CONFIG_CMD_CPLBINFO	include/configs/blackvme.h	/^#define CONFIG_CMD_CPLBINFO$/;"	d
CONFIG_CMD_CPU	cmd/Kconfig	/^config CMD_CPU$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_CPU_MODULE	cmd/Kconfig	/^config CMD_CPU$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_CRAMFS	include/configs/UCP1020.h	/^#define CONFIG_CMD_CRAMFS$/;"	d
CONFIG_CMD_CRAMFS	include/configs/km/keymile-common.h	/^#define CONFIG_CMD_CRAMFS$/;"	d
CONFIG_CMD_CRAMFS	include/configs/sandbox.h	/^#define CONFIG_CMD_CRAMFS$/;"	d
CONFIG_CMD_CRC32	cmd/Kconfig	/^config CMD_CRC32$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_CRC32	include/config/auto.conf	/^CONFIG_CMD_CRC32=y$/;"	k
CONFIG_CMD_CRC32	include/generated/autoconf.h	/^#define CONFIG_CMD_CRC32 /;"	d
CONFIG_CMD_CRC32_MODULE	cmd/Kconfig	/^config CMD_CRC32$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_CROS_EC	cmd/Kconfig	/^config CMD_CROS_EC$/;"	c	menu:Command line interface""Firmware commands
CONFIG_CMD_CROS_EC	drivers/misc/Kconfig	/^config CMD_CROS_EC$/;"	c	menu:Multifunction device drivers
CONFIG_CMD_CROS_EC_MODULE	cmd/Kconfig	/^config CMD_CROS_EC$/;"	c	menu:Command line interface""Firmware commands
CONFIG_CMD_CROS_EC_MODULE	drivers/misc/Kconfig	/^config CMD_CROS_EC$/;"	c	menu:Multifunction device drivers
CONFIG_CMD_DATE	include/config_cmd_all.h	/^#define CONFIG_CMD_DATE	/;"	d
CONFIG_CMD_DATE	include/configs/B4860QDS.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/CPCI4052.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/M52277EVB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/M53017EVB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/M5329EVB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/M5373EVB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/M54451EVB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/M54455EVB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MIP405.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC8308RDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC8313ERDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC8315ERDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC8349EMDS.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC8349ITX.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC837XEMDS.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/MPC837XERDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/P1010RDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/PIP405.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/PLU405.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/PMC405DE.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/PMC440.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/T102xQDS.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/T102xRDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/T1040QDS.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/T104xRDB.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM5200.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM823L.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM823M.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM834x.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM850L.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM850M.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM855L.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM855M.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM860L.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM860M.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM862L.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM862M.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/TQM885D.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/UCP1020.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/VCMA9.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/adp-ag101p.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/apf27.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/apx4devkit.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/astro_mcf5373l.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/bamboo.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/bf537-minotaur.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/bf537-srv1.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/bf561-acvilon.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/blackstamp.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/bubinga.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/canmb.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/canyonlands.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/cm5200.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/cyrus.h	/^#define CONFIG_CMD_DATE	/;"	d
CONFIG_CMD_DATE	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/dns325.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/eb_cpu5282.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/ethernut5.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/goflexhome.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/icon.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/ids8313.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/inka4x0.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/intip.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/ipek01.h	/^#define CONFIG_CMD_DATE	/;"	d
CONFIG_CMD_DATE	include/configs/katmai.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/kilauea.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/ls2080aqds.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/ls2080ardb.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/lwmon5.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/m28evk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/m53evk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/makalu.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/malta.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/manroland/common.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mcx.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mecp5123.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/motionpro.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mv-plug-common.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx25pdk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx28evk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx31ads.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx31pdk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx35pdk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx51evk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/mx53evk.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/nas220.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/pcm030.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/pcm052.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/pdm360ng.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/sandbox.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/smdk2410.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/socrates.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/tbs2910.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/tqma6_wru4.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/v38b.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/vme8349.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/walnut.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/woodburn_common.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/work_92105.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/x600.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/x86-common.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/xpedite1000.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/xpedite517x.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/xpedite520x.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/xpedite537x.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DATE	include/configs/xpedite550x.h	/^#define CONFIG_CMD_DATE$/;"	d
CONFIG_CMD_DDRMPHY_DUMP	arch/arm/mach-uniphier/Kconfig	/^config CMD_DDRMPHY_DUMP$/;"	c
CONFIG_CMD_DDRMPHY_DUMP_MODULE	arch/arm/mach-uniphier/Kconfig	/^config CMD_DDRMPHY_DUMP$/;"	c
CONFIG_CMD_DDRPHY_DUMP	arch/arm/mach-uniphier/Kconfig	/^config CMD_DDRPHY_DUMP$/;"	c
CONFIG_CMD_DDRPHY_DUMP_MODULE	arch/arm/mach-uniphier/Kconfig	/^config CMD_DDRPHY_DUMP$/;"	c
CONFIG_CMD_DEFAULTENV_VARS	include/configs/km/keymile-common.h	/^#define CONFIG_CMD_DEFAULTENV_VARS$/;"	d
CONFIG_CMD_DEKBLOB	include/configs/mx6_common.h	/^#define CONFIG_CMD_DEKBLOB$/;"	d
CONFIG_CMD_DEKBLOB	include/configs/mx7_common.h	/^#define CONFIG_CMD_DEKBLOB$/;"	d
CONFIG_CMD_DEMO	cmd/Kconfig	/^config CMD_DEMO$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_DEMO_MODULE	cmd/Kconfig	/^config CMD_DEMO$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_DFL	include/configs/armadillo-800eva.h	/^#define CONFIG_CMD_DFL$/;"	d
CONFIG_CMD_DFL	include/configs/rcar-gen2-common.h	/^#define CONFIG_CMD_DFL$/;"	d
CONFIG_CMD_DFL	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_DFL$/;"	d
CONFIG_CMD_DFL	include/configs/sh7752evb.h	/^#define CONFIG_CMD_DFL$/;"	d
CONFIG_CMD_DFL	include/configs/sh7753evb.h	/^#define CONFIG_CMD_DFL$/;"	d
CONFIG_CMD_DFU	cmd/Kconfig	/^config CMD_DFU$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_DFU_MODULE	cmd/Kconfig	/^config CMD_DFU$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_DHCP	cmd/Kconfig	/^config CMD_DHCP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_DHCP	include/config/auto.conf	/^CONFIG_CMD_DHCP=y$/;"	k
CONFIG_CMD_DHCP	include/configs/am335x_shc.h	/^#define CONFIG_CMD_DHCP$/;"	d
CONFIG_CMD_DHCP	include/configs/s32v234evb.h	/^#define CONFIG_CMD_DHCP$/;"	d
CONFIG_CMD_DHCP	include/configs/snapper9g45.h	/^#define CONFIG_CMD_DHCP$/;"	d
CONFIG_CMD_DHCP	include/generated/autoconf.h	/^#define CONFIG_CMD_DHCP /;"	d
CONFIG_CMD_DHCP_MODULE	cmd/Kconfig	/^config CMD_DHCP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_DHRYSTONE	lib/dhry/Kconfig	/^config CMD_DHRYSTONE$/;"	c
CONFIG_CMD_DHRYSTONE_MODULE	lib/dhry/Kconfig	/^config CMD_DHRYSTONE$/;"	c
CONFIG_CMD_DIAG	include/config_cmd_all.h	/^#define CONFIG_CMD_DIAG	/;"	d
CONFIG_CMD_DIAG	include/configs/TQM5200.h	/^    #define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/amcc-common.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/amcore.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/calimain.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/cm5200.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/da850evm.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/ea20.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/gr_ep2s60.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/gr_xc3s_1500.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/grsim.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/grsim_leon2.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/imx27lite-common.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/ipam390.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/km/km8309-common.h	/^#define CONFIG_CMD_DIAG	/;"	d
CONFIG_CMD_DIAG	include/configs/km/km_arm.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/km8360.h	/^#define CONFIG_CMD_DIAG	/;"	d
CONFIG_CMD_DIAG	include/configs/legoev3.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/lwmon5.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/o2dnt-common.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/pengwyn.h	/^#define CONFIG_CMD_DIAG /;"	d
CONFIG_CMD_DIAG	include/configs/v38b.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/xilinx-ppc.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DIAG	include/configs/xtfpga.h	/^#define CONFIG_CMD_DIAG$/;"	d
CONFIG_CMD_DISPLAY	include/config_cmd_all.h	/^#define CONFIG_CMD_DISPLAY	/;"	d
CONFIG_CMD_DISPLAY	include/configs/a4m072.h	/^#define CONFIG_CMD_DISPLAY$/;"	d
CONFIG_CMD_DISPLAY	include/configs/manroland/common.h	/^#define CONFIG_CMD_DISPLAY$/;"	d
CONFIG_CMD_DM	cmd/Kconfig	/^config CMD_DM$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_DM	include/config/auto.conf	/^CONFIG_CMD_DM=y$/;"	k
CONFIG_CMD_DM	include/generated/autoconf.h	/^#define CONFIG_CMD_DM /;"	d
CONFIG_CMD_DM_MODULE	cmd/Kconfig	/^config CMD_DM$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_DNS	cmd/Kconfig	/^config CMD_DNS$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_DNS_MODULE	cmd/Kconfig	/^config CMD_DNS$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_DOC	include/config_cmd_all.h	/^#define CONFIG_CMD_DOC	/;"	d
CONFIG_CMD_DS4510	include/configs/xpedite517x.h	/^#define CONFIG_CMD_DS4510$/;"	d
CONFIG_CMD_DS4510	include/configs/xpedite537x.h	/^#define CONFIG_CMD_DS4510$/;"	d
CONFIG_CMD_DS4510_INFO	include/configs/xpedite517x.h	/^#define CONFIG_CMD_DS4510_INFO$/;"	d
CONFIG_CMD_DS4510_INFO	include/configs/xpedite537x.h	/^#define CONFIG_CMD_DS4510_INFO$/;"	d
CONFIG_CMD_DTT	include/config_cmd_all.h	/^#define CONFIG_CMD_DTT	/;"	d
CONFIG_CMD_DTT	include/configs/PMC440.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/TQM834x.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/UCP1020.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/acadia.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/bf561-acvilon.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/canyonlands.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/dlvision-10g.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/dlvision.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/exynos5-common.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/intip.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/io.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/io64.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/km/km-powerpc.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/makalu.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/manroland/common.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/motionpro.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/neo.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/sequoia.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/socrates.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/tqma6.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/work_92105.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/xpedite517x.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/xpedite537x.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/xpedite550x.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_DTT	include/configs/yosemite.h	/^#define CONFIG_CMD_DTT$/;"	d
CONFIG_CMD_E1000	drivers/net/Kconfig	/^config CMD_E1000$/;"	c
CONFIG_CMD_E1000_MODULE	drivers/net/Kconfig	/^config CMD_E1000$/;"	c
CONFIG_CMD_ECCTEST	include/configs/katmai.h	/^#define CONFIG_CMD_ECCTEST$/;"	d
CONFIG_CMD_ECCTEST	include/configs/t3corp.h	/^#define CONFIG_CMD_ECCTEST$/;"	d
CONFIG_CMD_ECHO	cmd/Kconfig	/^config CMD_ECHO$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_ECHO	include/config/auto.conf	/^CONFIG_CMD_ECHO=y$/;"	k
CONFIG_CMD_ECHO	include/generated/autoconf.h	/^#define CONFIG_CMD_ECHO /;"	d
CONFIG_CMD_ECHO_MODULE	cmd/Kconfig	/^config CMD_ECHO$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_EDITENV	cmd/Kconfig	/^config CMD_EDITENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_EDITENV	include/config/auto.conf	/^CONFIG_CMD_EDITENV=y$/;"	k
CONFIG_CMD_EDITENV	include/generated/autoconf.h	/^#define CONFIG_CMD_EDITENV /;"	d
CONFIG_CMD_EDITENV_MODULE	cmd/Kconfig	/^config CMD_EDITENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_EECONFIG	include/configs/gw_ventana.h	/^#define CONFIG_CMD_EECONFIG /;"	d
CONFIG_CMD_EECONFIG	include/configs/pcm058.h	/^#define CONFIG_CMD_EECONFIG /;"	d
CONFIG_CMD_EEPROM	include/config_cmd_all.h	/^#define CONFIG_CMD_EEPROM	/;"	d
CONFIG_CMD_EEPROM	include/configs/B4860QDS.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/CPCI2DP.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/CPCI4052.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/MIP405.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/MPC8323ERDB.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/P1010RDB.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/PATI.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/PIP405.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/PLU405.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/PMC405DE.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/PMC440.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/T102xQDS.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/T102xRDB.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/T1040QDS.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/TQM5200.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/TQM834x.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/TQM855M.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/TQM866M.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/TQM885D.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/VCMA9.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/VOM405.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/a4m072.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/ac14xx.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/am335x_evm.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/am335x_sl50.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/am43xx_evm.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/amcc-common.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/apf27.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/aria.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/baltos.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/bav335x.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/cm_fx6.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/cm_t335.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/cm_t35.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/cm_t3517.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/cm_t43.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/cm_t54.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/controlcenterd.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/imx31_phycore.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/km/keymile-common.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/lacie_kw.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/ls2080aqds.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/ls2080ardb.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/lwmon5.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/m28evk.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/manroland/common.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/mecp5123.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/motionpro.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/novena.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/o2dnt-common.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/ot1200.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/p1_twr.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/pcm030.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/pcm051.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/pcm052.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/pdm360ng.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/pengwyn.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/tam3517-common.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/tqma6.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/tricorder.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/vct.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/work_92105.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xilinx_zynqmp.h	/^# define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xpedite1000.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xpedite517x.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xpedite520x.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xpedite537x.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/xpedite550x.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/zynq-common.h	/^# define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM	include/configs/zynq_zybo.h	/^#define CONFIG_CMD_EEPROM$/;"	d
CONFIG_CMD_EEPROM_LAYOUT	include/configs/cm_fx6.h	/^#define CONFIG_CMD_EEPROM_LAYOUT$/;"	d
CONFIG_CMD_EEPROM_LAYOUT	include/configs/cm_t335.h	/^#define CONFIG_CMD_EEPROM_LAYOUT$/;"	d
CONFIG_CMD_EEPROM_LAYOUT	include/configs/cm_t35.h	/^#define CONFIG_CMD_EEPROM_LAYOUT$/;"	d
CONFIG_CMD_EEPROM_LAYOUT	include/configs/cm_t3517.h	/^#define CONFIG_CMD_EEPROM_LAYOUT$/;"	d
CONFIG_CMD_EEPROM_LAYOUT	include/configs/cm_t43.h	/^#define CONFIG_CMD_EEPROM_LAYOUT$/;"	d
CONFIG_CMD_EEPROM_LAYOUT	include/configs/cm_t54.h	/^#define CONFIG_CMD_EEPROM_LAYOUT$/;"	d
CONFIG_CMD_ELF	cmd/Kconfig	/^config CMD_ELF$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_ELF	include/config/auto.conf	/^CONFIG_CMD_ELF=y$/;"	k
CONFIG_CMD_ELF	include/generated/autoconf.h	/^#define CONFIG_CMD_ELF /;"	d
CONFIG_CMD_ELF_MODULE	cmd/Kconfig	/^config CMD_ELF$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_ENTERRCM	include/configs/tegra-common.h	/^#define CONFIG_CMD_ENTERRCM$/;"	d
CONFIG_CMD_ENV	include/configs/ap_sh4a_4a.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/calimain.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/clearfog.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/colibri_pxa270.h	/^#define	CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/da850evm.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/db-88f6720.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/db-88f6820-amc.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/db-88f6820-gp.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/db-mv784mp-gp.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/dns325.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/dockstar.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ds414.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ea20.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ecovec.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/espt.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/goflexhome.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/hikey.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/iconnect.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ipam390.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/lacie_kw.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ls1012a_common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ls1043a_common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ls1046a_common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/ls2080a_common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/lsxl.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/maxbcm.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/meson-gxbb-common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/mv-plug-common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/openrd.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/pogo_e02.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/r0p7734.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/s32v234evb.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/shmin.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/spear-common.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/theadorable.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/vexpress_aemv8a.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/x600.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV	include/configs/zipitz2.h	/^#define	CONFIG_CMD_ENV$/;"	d
CONFIG_CMD_ENV_CALLBACK	include/configs/sandbox.h	/^#define CONFIG_CMD_ENV_CALLBACK$/;"	d
CONFIG_CMD_ENV_EXISTS	cmd/Kconfig	/^config CMD_ENV_EXISTS$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_ENV_EXISTS	include/config/auto.conf	/^CONFIG_CMD_ENV_EXISTS=y$/;"	k
CONFIG_CMD_ENV_EXISTS	include/generated/autoconf.h	/^#define CONFIG_CMD_ENV_EXISTS /;"	d
CONFIG_CMD_ENV_EXISTS_MODULE	cmd/Kconfig	/^config CMD_ENV_EXISTS$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_ENV_FLAGS	include/configs/ids8313.h	/^#define CONFIG_CMD_ENV_FLAGS$/;"	d
CONFIG_CMD_ENV_FLAGS	include/configs/sandbox.h	/^#define CONFIG_CMD_ENV_FLAGS$/;"	d
CONFIG_CMD_ERRATA	include/configs/B4860QDS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/MPC8572DS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/P1010RDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/P1022DS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/P2041RDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T102xQDS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T102xRDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T1040QDS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T104xRDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T208xQDS.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T208xRDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/T4240RDB.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/UCP1020.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/controlcenterd.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/corenet_ds.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/cyrus.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/km/kmp204x-common.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ERRATA	include/configs/t4qds.h	/^#define CONFIG_CMD_ERRATA$/;"	d
CONFIG_CMD_ESBC_VALIDATE	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_CMD_ESBC_VALIDATE$/;"	d
CONFIG_CMD_ESBC_VALIDATE	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_CMD_ESBC_VALIDATE$/;"	d
CONFIG_CMD_ETHSW	include/configs/T1040QDS.h	/^#define CONFIG_CMD_ETHSW$/;"	d
CONFIG_CMD_ETHSW	include/configs/T104xRDB.h	/^#define CONFIG_CMD_ETHSW$/;"	d
CONFIG_CMD_EXPORTENV	cmd/Kconfig	/^config CMD_EXPORTENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_EXPORTENV	include/config/auto.conf	/^CONFIG_CMD_EXPORTENV=y$/;"	k
CONFIG_CMD_EXPORTENV	include/generated/autoconf.h	/^#define CONFIG_CMD_EXPORTENV /;"	d
CONFIG_CMD_EXPORTENV_MODULE	cmd/Kconfig	/^config CMD_EXPORTENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_EXT2	cmd/Kconfig	/^config CMD_EXT2$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_EXT2	include/config/auto.conf	/^CONFIG_CMD_EXT2=y$/;"	k
CONFIG_CMD_EXT2	include/configs/ds109.h	/^#define CONFIG_CMD_EXT2$/;"	d
CONFIG_CMD_EXT2	include/configs/ls1043ardb.h	/^#define CONFIG_CMD_EXT2$/;"	d
CONFIG_CMD_EXT2	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_EXT2$/;"	d
CONFIG_CMD_EXT2	include/generated/autoconf.h	/^#define CONFIG_CMD_EXT2 /;"	d
CONFIG_CMD_EXT2_MODULE	cmd/Kconfig	/^config CMD_EXT2$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_EXT4	cmd/Kconfig	/^config CMD_EXT4$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_EXT4	include/config/auto.conf	/^CONFIG_CMD_EXT4=y$/;"	k
CONFIG_CMD_EXT4	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_EXT4$/;"	d
CONFIG_CMD_EXT4	include/generated/autoconf.h	/^#define CONFIG_CMD_EXT4 /;"	d
CONFIG_CMD_EXT4_MODULE	cmd/Kconfig	/^config CMD_EXT4$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_EXT4_WRITE	cmd/Kconfig	/^config CMD_EXT4_WRITE$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_EXT4_WRITE	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_EXT4_WRITE$/;"	d
CONFIG_CMD_EXT4_WRITE_MODULE	cmd/Kconfig	/^config CMD_EXT4_WRITE$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_FASTBOOT	cmd/fastboot/Kconfig	/^config CMD_FASTBOOT$/;"	c	menu:Fastboot support
CONFIG_CMD_FASTBOOT	include/configs/am335x_evm.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/bav335x.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/cgtqmx6eval.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/kc1.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/mx6sabre_common.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/nitrogen6x.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/omap3_beagle.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/omap3_logic.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/rk3036_common.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/rk3288_common.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/sniper.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT	include/configs/sunxi-common.h	/^#define CONFIG_CMD_FASTBOOT$/;"	d
CONFIG_CMD_FASTBOOT_MODULE	cmd/fastboot/Kconfig	/^config CMD_FASTBOOT$/;"	c	menu:Fastboot support
CONFIG_CMD_FAT	cmd/Kconfig	/^config CMD_FAT$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_FAT	include/config/auto.conf	/^CONFIG_CMD_FAT=y$/;"	k
CONFIG_CMD_FAT	include/configs/ds109.h	/^#define CONFIG_CMD_FAT$/;"	d
CONFIG_CMD_FAT	include/configs/ls1043ardb.h	/^#define CONFIG_CMD_FAT$/;"	d
CONFIG_CMD_FAT	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_FAT$/;"	d
CONFIG_CMD_FAT	include/configs/s32v234evb.h	/^#define CONFIG_CMD_FAT	/;"	d
CONFIG_CMD_FAT	include/configs/sama5d2_ptc.h	/^#define CONFIG_CMD_FAT$/;"	d
CONFIG_CMD_FAT	include/configs/snapper9g45.h	/^#define CONFIG_CMD_FAT$/;"	d
CONFIG_CMD_FAT	include/generated/autoconf.h	/^#define CONFIG_CMD_FAT /;"	d
CONFIG_CMD_FAT_MODULE	cmd/Kconfig	/^config CMD_FAT$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_FDC	include/config_cmd_all.h	/^#define CONFIG_CMD_FDC	/;"	d
CONFIG_CMD_FDC	include/configs/PIP405.h	/^#define CONFIG_CMD_FDC$/;"	d
CONFIG_CMD_FDT	cmd/Kconfig	/^config CMD_FDT$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_FDT	include/config/auto.conf	/^CONFIG_CMD_FDT=y$/;"	k
CONFIG_CMD_FDT	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_FDT$/;"	d
CONFIG_CMD_FDT	include/generated/autoconf.h	/^#define CONFIG_CMD_FDT /;"	d
CONFIG_CMD_FDT_MAX_DUMP	cmd/fdt.c	/^#define CONFIG_CMD_FDT_MAX_DUMP /;"	d	file:
CONFIG_CMD_FDT_MODULE	cmd/Kconfig	/^config CMD_FDT$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_FLASH	cmd/Kconfig	/^config CMD_FLASH$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_FLASH_MODULE	cmd/Kconfig	/^config CMD_FLASH$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_FPGA	cmd/Kconfig	/^config CMD_FPGA$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_FPGAD	include/configs/hrcon.h	/^#define CONFIG_CMD_FPGAD$/;"	d
CONFIG_CMD_FPGAD	include/configs/iocon.h	/^#define CONFIG_CMD_FPGAD$/;"	d
CONFIG_CMD_FPGAD	include/configs/strider.h	/^#define CONFIG_CMD_FPGAD$/;"	d
CONFIG_CMD_FPGA_LOADBP	include/configs/zynq-common.h	/^#define CONFIG_CMD_FPGA_LOADBP$/;"	d
CONFIG_CMD_FPGA_LOADFS	include/configs/zynq-common.h	/^#define CONFIG_CMD_FPGA_LOADFS$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/astro_mcf5373l.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/grsim.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/grsim_leon2.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/mt_ventoux.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/x600.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/x86-common.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADMK	include/configs/zynq-common.h	/^#define CONFIG_CMD_FPGA_LOADMK$/;"	d
CONFIG_CMD_FPGA_LOADP	include/configs/zynq-common.h	/^#define CONFIG_CMD_FPGA_LOADP$/;"	d
CONFIG_CMD_FPGA_MODULE	cmd/Kconfig	/^config CMD_FPGA$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_FS_GENERIC	cmd/Kconfig	/^config CMD_FS_GENERIC$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_FS_GENERIC	include/config/auto.conf	/^CONFIG_CMD_FS_GENERIC=y$/;"	k
CONFIG_CMD_FS_GENERIC	include/generated/autoconf.h	/^#define CONFIG_CMD_FS_GENERIC /;"	d
CONFIG_CMD_FS_GENERIC_MODULE	cmd/Kconfig	/^config CMD_FS_GENERIC$/;"	c	menu:Command line interface""Filesystem commands
CONFIG_CMD_FUSE	include/config_cmd_all.h	/^#define CONFIG_CMD_FUSE	/;"	d
CONFIG_CMD_FUSE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/colibri_vf.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/ge_bx50v3.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/mx51evk.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/mx6_common.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/mx7_common.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/usbarmory.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_FUSE	include/configs/vf610twr.h	/^#define CONFIG_CMD_FUSE$/;"	d
CONFIG_CMD_GETTIME	include/config_cmd_all.h	/^#define CONFIG_CMD_GETTIME	/;"	d
CONFIG_CMD_GETTIME	include/configs/x86-common.h	/^#define CONFIG_CMD_GETTIME$/;"	d
CONFIG_CMD_GO	cmd/Kconfig	/^config CMD_GO$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_GO	include/config/auto.conf	/^CONFIG_CMD_GO=y$/;"	k
CONFIG_CMD_GO	include/generated/autoconf.h	/^#define CONFIG_CMD_GO /;"	d
CONFIG_CMD_GO_MODULE	cmd/Kconfig	/^config CMD_GO$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_GPIO	cmd/Kconfig	/^config CMD_GPIO$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_GPIO	include/config/auto.conf	/^CONFIG_CMD_GPIO=y$/;"	k
CONFIG_CMD_GPIO	include/generated/autoconf.h	/^#define CONFIG_CMD_GPIO /;"	d
CONFIG_CMD_GPIO_MODULE	cmd/Kconfig	/^config CMD_GPIO$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_GPT	include/configs/am335x_evm.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/am335x_shc.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/am335x_sl50.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/am43xx_evm.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/am57xx_evm.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/baltos.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/bav335x.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/cm_t43.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/dra7xx_evm.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/exynos4-common.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/omap5_uevm.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/rockchip-common.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/s5p_goni.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/sandbox.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GPT	include/configs/vinco.h	/^#define CONFIG_CMD_GPT$/;"	d
CONFIG_CMD_GREPENV	cmd/Kconfig	/^config CMD_GREPENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_GREPENV_MODULE	cmd/Kconfig	/^config CMD_GREPENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_GSC	include/configs/gw_ventana.h	/^#define CONFIG_CMD_GSC$/;"	d
CONFIG_CMD_GSC	include/configs/pcm058.h	/^#define CONFIG_CMD_GSC$/;"	d
CONFIG_CMD_HASH	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/config_cmd_all.h	/^#define CONFIG_CMD_HASH	/;"	d
CONFIG_CMD_HASH	include/configs/B4860QDS.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/P1010RDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/P2041RDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T102xQDS.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T102xRDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T1040QDS.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T104xRDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T208xQDS.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T208xRDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T4240QDS.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/T4240RDB.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/bcm_ep_board.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/corenet_ds.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/exynos5-common.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/ids8313.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/ls1021aqds.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/ls1021atwr.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/ls1043a_common.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/ls1046a_common.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/ls2080a_common.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HASH	include/configs/sandbox.h	/^#define CONFIG_CMD_HASH$/;"	d
CONFIG_CMD_HD44760	include/configs/work_92105.h	/^#define CONFIG_CMD_HD44760$/;"	d
CONFIG_CMD_HDMIDETECT	include/configs/gw_ventana.h	/^#define CONFIG_CMD_HDMIDETECT /;"	d
CONFIG_CMD_HDMIDETECT	include/configs/gw_ventana.h	/^#define CONFIG_CMD_HDMIDETECT$/;"	d
CONFIG_CMD_HDMIDETECT	include/configs/mx6cuboxi.h	/^#define CONFIG_CMD_HDMIDETECT$/;"	d
CONFIG_CMD_HDMIDETECT	include/configs/nitrogen6x.h	/^#define CONFIG_CMD_HDMIDETECT$/;"	d
CONFIG_CMD_HDMIDETECT	include/configs/novena.h	/^#define CONFIG_CMD_HDMIDETECT$/;"	d
CONFIG_CMD_HDMIDETECT	include/configs/pcm058.h	/^#define CONFIG_CMD_HDMIDETECT /;"	d
CONFIG_CMD_HDMIDETECT	include/configs/tbs2910.h	/^#define CONFIG_CMD_HDMIDETECT$/;"	d
CONFIG_CMD_HDMIDETECT	include/configs/wandboard.h	/^#define CONFIG_CMD_HDMIDETECT$/;"	d
CONFIG_CMD_I2C	cmd/Kconfig	/^config CMD_I2C$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_I2C_MODULE	cmd/Kconfig	/^config CMD_I2C$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_IDE	include/config_cmd_all.h	/^#define CONFIG_CMD_IDE	/;"	d
CONFIG_CMD_IDE	include/configs/CPCI4052.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/M5253DEMO.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/M5253EVBE.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/M54455EVB.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/MIP405.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/MPC8349ITX.h	/^	#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/PIP405.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/PLU405.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM5200.h	/^    #define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM823L.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM823M.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM850L.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM850M.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM855L.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM855M.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM860L.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM860M.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM862L.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM862M.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM866M.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/TQM885D.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/a4m072.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/ap325rxa.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/bf537-stamp.h	/^# define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/dbau1x00.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/dns325.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/edminiv2.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/goflexhome.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/ib62x0.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/inka4x0.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/ipek01.h	/^#define CONFIG_CMD_IDE	/;"	d
CONFIG_CMD_IDE	include/configs/lacie_kw.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/lsxl.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/malta.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/manroland/common.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/motionpro.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/ms7720se.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/mv-plug-common.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/nas220.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/nsa310s.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/openrd.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/qemu-mips.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/qemu-mips64.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/qemu-x86.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/r2dplus.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/r7780mp.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/sandbox.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IDE	include/configs/v38b.h	/^#define CONFIG_CMD_IDE$/;"	d
CONFIG_CMD_IMI	cmd/Kconfig	/^config CMD_IMI$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_IMI	include/config/auto.conf	/^CONFIG_CMD_IMI=y$/;"	k
CONFIG_CMD_IMI	include/generated/autoconf.h	/^#define CONFIG_CMD_IMI /;"	d
CONFIG_CMD_IMI_MODULE	cmd/Kconfig	/^config CMD_IMI$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_IMLS	cmd/Kconfig	/^config CMD_IMLS$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_IMLS_MODULE	cmd/Kconfig	/^config CMD_IMLS$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_IMMAP	include/config_cmd_all.h	/^#define CONFIG_CMD_IMMAP	/;"	d
CONFIG_CMD_IMMAP	include/configs/canmb.h	/^#define CONFIG_CMD_IMMAP$/;"	d
CONFIG_CMD_IMMAP	include/configs/km/keymile-common.h	/^#define CONFIG_CMD_IMMAP$/;"	d
CONFIG_CMD_IMMAP	include/configs/motionpro.h	/^#define CONFIG_CMD_IMMAP$/;"	d
CONFIG_CMD_IMMAP	include/configs/munices.h	/^#define CONFIG_CMD_IMMAP$/;"	d
CONFIG_CMD_IMPORTENV	cmd/Kconfig	/^config CMD_IMPORTENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_IMPORTENV	include/config/auto.conf	/^CONFIG_CMD_IMPORTENV=y$/;"	k
CONFIG_CMD_IMPORTENV	include/generated/autoconf.h	/^#define CONFIG_CMD_IMPORTENV /;"	d
CONFIG_CMD_IMPORTENV_MODULE	cmd/Kconfig	/^config CMD_IMPORTENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_IMXOTP	include/configs/ot1200.h	/^#define CONFIG_CMD_IMXOTP$/;"	d
CONFIG_CMD_IMX_FUSE	include/configs/apf27.h	/^#define CONFIG_CMD_IMX_FUSE	/;"	d
CONFIG_CMD_IO	include/config_cmd_all.h	/^#define CONFIG_CMD_IO	/;"	d
CONFIG_CMD_IO	include/configs/sandbox.h	/^#define CONFIG_CMD_IO$/;"	d
CONFIG_CMD_IO	include/configs/x86-common.h	/^#define CONFIG_CMD_IO$/;"	d
CONFIG_CMD_IOLOOP	include/configs/hrcon.h	/^#define CONFIG_CMD_IOLOOP$/;"	d
CONFIG_CMD_IOLOOP	include/configs/strider.h	/^#define CONFIG_CMD_IOLOOP$/;"	d
CONFIG_CMD_IOTRACE	include/configs/sandbox.h	/^#define CONFIG_CMD_IOTRACE$/;"	d
CONFIG_CMD_IRQ	include/config_cmd_all.h	/^#define CONFIG_CMD_IRQ	/;"	d
CONFIG_CMD_IRQ	include/configs/B4860QDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/CPCI2DP.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/CPCI4052.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MIP405.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8349ITX.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8536DS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8540ADS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8541CDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8544DS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8548CDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8555CDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8560ADS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8568MDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8569MDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/MPC8572DS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/P1010RDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/P1022DS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/P1023RDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/P2041RDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/PATI.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/PIP405.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/PLU405.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/PMC405DE.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/T102xQDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/T102xRDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/T1040QDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/T104xRDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/T208xQDS.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/T4240RDB.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/UCP1020.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/VOM405.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/amcc-common.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/controlcenterd.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/corenet_ds.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/cyrus.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/gr_ep2s60.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/gr_xc3s_1500.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/grsim.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/grsim_leon2.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/ipek01.h	/^#define CONFIG_CMD_IRQ	/;"	d
CONFIG_CMD_IRQ	include/configs/lwmon5.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/microblaze-generic.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/openrisc-generic.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/p1_twr.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/qemu-ppce500.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/t4qds.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/v38b.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/x86-common.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/xilinx-ppc.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/xpedite1000.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_IRQ	include/configs/xpedite517x.h	/^#define CONFIG_CMD_IRQ$/;"	d
CONFIG_CMD_ITEST	cmd/Kconfig	/^config CMD_ITEST$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_ITEST	include/config/auto.conf	/^CONFIG_CMD_ITEST=y$/;"	k
CONFIG_CMD_ITEST	include/generated/autoconf.h	/^#define CONFIG_CMD_ITEST /;"	d
CONFIG_CMD_ITEST_MODULE	cmd/Kconfig	/^config CMD_ITEST$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_JFFS2	include/config_cmd_all.h	/^#define CONFIG_CMD_JFFS2	/;"	d
CONFIG_CMD_JFFS2	include/configs/M52277EVB.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/M54455EVB.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/MIP405.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM5200.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM823L.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM823M.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM834x.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM850L.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM850M.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM855L.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM855M.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM860L.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM860M.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM862L.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM862M.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/TQM866M.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/VCMA9.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/ac14xx.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/am3517_crane.h	/^#define CONFIG_CMD_JFFS2	/;"	d
CONFIG_CMD_JFFS2	include/configs/aria.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/astro_mcf5373l.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/atngw100.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/atngw100mkii.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/atstk1002.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/cm5200.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/devkit3250.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/devkit8000.h	/^#define CONFIG_CMD_JFFS2	/;"	d
CONFIG_CMD_JFFS2	include/configs/dockstar.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/edb93xx.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/ethernut5.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/grasshopper.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/iconnect.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/ids8313.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/imx27lite-common.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/km/keymile-common.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/mcx.h	/^#define CONFIG_CMD_JFFS2	/;"	d
CONFIG_CMD_JFFS2	include/configs/mecp5123.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/microblaze-generic.h	/^# define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/motionpro.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/ms7722se.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/mv-common.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/nas220.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/omap3_evm.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/pcm030.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/pm9263.h	/^#define CONFIG_CMD_JFFS2	/;"	d
CONFIG_CMD_JFFS2	include/configs/pm9g45.h	/^#define CONFIG_CMD_JFFS2	/;"	d
CONFIG_CMD_JFFS2	include/configs/pogo_e02.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/sh7763rdp.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/v38b.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/vct.h	/^#define	CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/xilinx-ppc.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/xpedite1000.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/xpedite517x.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/xpedite520x.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/xpedite537x.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_JFFS2	include/configs/xpedite550x.h	/^#define CONFIG_CMD_JFFS2$/;"	d
CONFIG_CMD_KGDB	include/config_cmd_all.h	/^#define CONFIG_CMD_KGDB	/;"	d
CONFIG_CMD_KGDB	include/configs/bfin_adi_common.h	/^# define CONFIG_CMD_KGDB$/;"	d
CONFIG_CMD_LDRINFO	include/configs/bfin_adi_common.h	/^# define CONFIG_CMD_LDRINFO$/;"	d
CONFIG_CMD_LED	include/configs/eb_cpu5282.h	/^#define CONFIG_CMD_LED$/;"	d
CONFIG_CMD_LED	include/configs/mx23_olinuxino.h	/^#define CONFIG_CMD_LED$/;"	d
CONFIG_CMD_LED	include/configs/omap3_beagle.h	/^#define CONFIG_CMD_LED	/;"	d
CONFIG_CMD_LED	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_CMD_LED$/;"	d
CONFIG_CMD_LED	include/configs/tqma6_wru4.h	/^#define CONFIG_CMD_LED$/;"	d
CONFIG_CMD_LED	include/configs/tricorder.h	/^#define CONFIG_CMD_LED	/;"	d
CONFIG_CMD_LICENSE	cmd/Kconfig	/^config CMD_LICENSE$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_LICENSE_MODULE	cmd/Kconfig	/^config CMD_LICENSE$/;"	c	menu:Command line interface""Info commands
CONFIG_CMD_LINK_LOCAL	cmd/Kconfig	/^config CMD_LINK_LOCAL$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_LINK_LOCAL_MODULE	cmd/Kconfig	/^config CMD_LINK_LOCAL$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_LOADB	cmd/Kconfig	/^config CMD_LOADB$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_LOADB	include/config/auto.conf	/^CONFIG_CMD_LOADB=y$/;"	k
CONFIG_CMD_LOADB	include/generated/autoconf.h	/^#define CONFIG_CMD_LOADB /;"	d
CONFIG_CMD_LOADB_MODULE	cmd/Kconfig	/^config CMD_LOADB$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_LOADS	cmd/Kconfig	/^config CMD_LOADS$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_LOADS	include/config/auto.conf	/^CONFIG_CMD_LOADS=y$/;"	k
CONFIG_CMD_LOADS	include/generated/autoconf.h	/^#define CONFIG_CMD_LOADS /;"	d
CONFIG_CMD_LOADS	tools/Makefile	/^CONFIG_CMD_LOADS = y$/;"	m
CONFIG_CMD_LOADS_MODULE	cmd/Kconfig	/^config CMD_LOADS$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_LZMADEC	include/configs/sandbox.h	/^#define CONFIG_CMD_LZMADEC$/;"	d
CONFIG_CMD_MAX6957	include/configs/work_92105.h	/^#define CONFIG_CMD_MAX6957$/;"	d
CONFIG_CMD_MD5SUM	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_MD5SUM$/;"	d
CONFIG_CMD_MD5SUM	include/configs/sandbox.h	/^#define CONFIG_CMD_MD5SUM$/;"	d
CONFIG_CMD_MD5SUM	include/configs/sh7752evb.h	/^#define CONFIG_CMD_MD5SUM$/;"	d
CONFIG_CMD_MD5SUM	include/configs/sh7753evb.h	/^#define CONFIG_CMD_MD5SUM$/;"	d
CONFIG_CMD_MD5SUM	include/configs/sh7757lcr.h	/^#define CONFIG_CMD_MD5SUM$/;"	d
CONFIG_CMD_MEM	include/configs/stm32f429-discovery.h	/^#define CONFIG_CMD_MEM$/;"	d
CONFIG_CMD_MEM	include/configs/stm32f746-disco.h	/^#define CONFIG_CMD_MEM$/;"	d
CONFIG_CMD_MEMINFO	cmd/Kconfig	/^config CMD_MEMINFO$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MEMINFO	include/configs/ls1012afrdm.h	/^#define CONFIG_CMD_MEMINFO$/;"	d
CONFIG_CMD_MEMINFO	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_MEMINFO$/;"	d
CONFIG_CMD_MEMINFO	include/configs/ls1012ardb.h	/^#define CONFIG_CMD_MEMINFO$/;"	d
CONFIG_CMD_MEMINFO_MODULE	cmd/Kconfig	/^config CMD_MEMINFO$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MEMORY	cmd/Kconfig	/^config CMD_MEMORY$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MEMORY	include/config/auto.conf	/^CONFIG_CMD_MEMORY=y$/;"	k
CONFIG_CMD_MEMORY	include/generated/autoconf.h	/^#define CONFIG_CMD_MEMORY /;"	d
CONFIG_CMD_MEMORY_MODULE	cmd/Kconfig	/^config CMD_MEMORY$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MEMTEST	cmd/Kconfig	/^config CMD_MEMTEST$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MEMTEST	include/configs/ap121.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/ap143.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/el6x_common.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/ls1012afrdm.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/ls1012ardb.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/s32v234evb.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST	include/configs/tplink_wdr4300.h	/^#define CONFIG_CMD_MEMTEST$/;"	d
CONFIG_CMD_MEMTEST_MODULE	cmd/Kconfig	/^config CMD_MEMTEST$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MFSL	include/config_cmd_all.h	/^#define CONFIG_CMD_MFSL	/;"	d
CONFIG_CMD_MFSL	include/configs/microblaze-generic.h	/^#define CONFIG_CMD_MFSL$/;"	d
CONFIG_CMD_MII	cmd/Kconfig	/^config CMD_MII$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_MII	include/config/auto.conf	/^CONFIG_CMD_MII=y$/;"	k
CONFIG_CMD_MII	include/configs/snapper9g45.h	/^#define CONFIG_CMD_MII$/;"	d
CONFIG_CMD_MII	include/configs/tplink_wdr4300.h	/^#define CONFIG_CMD_MII$/;"	d
CONFIG_CMD_MII	include/generated/autoconf.h	/^#define CONFIG_CMD_MII /;"	d
CONFIG_CMD_MII_MODULE	cmd/Kconfig	/^config CMD_MII$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_MISC	cmd/Kconfig	/^config CMD_MISC$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_MISC	include/config/auto.conf	/^CONFIG_CMD_MISC=y$/;"	k
CONFIG_CMD_MISC	include/generated/autoconf.h	/^#define CONFIG_CMD_MISC /;"	d
CONFIG_CMD_MISC_MODULE	cmd/Kconfig	/^config CMD_MISC$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_MMC	cmd/Kconfig	/^config CMD_MMC$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_MMC	include/config/auto.conf	/^CONFIG_CMD_MMC=y$/;"	k
CONFIG_CMD_MMC	include/configs/s32v234evb.h	/^#define CONFIG_CMD_MMC$/;"	d
CONFIG_CMD_MMC	include/configs/snapper9g45.h	/^#define CONFIG_CMD_MMC$/;"	d
CONFIG_CMD_MMC	include/generated/autoconf.h	/^#define CONFIG_CMD_MMC /;"	d
CONFIG_CMD_MMC_MODULE	cmd/Kconfig	/^config CMD_MMC$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_MMC_SPI	include/configs/UCP1020.h	/^#define CONFIG_CMD_MMC_SPI$/;"	d
CONFIG_CMD_MMC_SPI	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_MMC_SPI$/;"	d
CONFIG_CMD_MTDPARTS	include/config_cmd_all.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/M54418TWR.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/MPC8313ERDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/MPC8315ERDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/P1010RDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/P1022DS.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/PLU405.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/T102xQDS.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/T102xRDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/T1040QDS.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/T104xRDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/T208xQDS.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/T208xRDB.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM5200.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM823L.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM823M.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM834x.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM850L.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM850M.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM855L.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM855M.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM860L.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM860M.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM862L.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM862M.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/TQM866M.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/VCMA9.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/a3m071.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/am3517_evm.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ap121.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ap143.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/apf27.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/apx4devkit.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/aria.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/at91sam9n12ek.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/at91sam9x5ek.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/baltos.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/brppt1.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/cm5200.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/cm_fx6.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/cm_t35.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/cm_t3517.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/colibri_imx7.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/colibri_t20.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/colibri_vf.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/corvus.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/da850evm.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/dockstar.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ea20.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ethernut5.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/flea3.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/gw_ventana.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/iconnect.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ids8313.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/imx27lite-common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/imx6qdl_icore.h	/^# define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ipam390.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/km/keymile-common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/km/km_arm.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/m28evk.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/m53evk.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/mcx.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/microblaze-generic.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/motionpro.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/mv-common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/mx28evk.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/mx35pdk.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/nas220.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/nokia_rx51.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/omap3_igep00x0.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/omap3_logic.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/p1_twr.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/pcm052.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/pcm058.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/pdm360ng.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/pengwyn.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/platinum.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/pogo_e02.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/sama5d3_xplained.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/siemens-am33x-common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/smartweb.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/smdk2410.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/smdkc100.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/socfpga_common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/tam3517-common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/tao3530.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/taurus.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/ti_armv7_common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/titanium.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/tricorder.h	/^#define CONFIG_CMD_MTDPARTS	/;"	d
CONFIG_CMD_MTDPARTS	include/configs/vct.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/vf610twr.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/woodburn_common.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/x600.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MTDPARTS	include/configs/xilinx-ppc.h	/^#define CONFIG_CMD_MTDPARTS$/;"	d
CONFIG_CMD_MX_CYCLIC	cmd/Kconfig	/^config CMD_MX_CYCLIC$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_MX_CYCLIC_MODULE	cmd/Kconfig	/^config CMD_MX_CYCLIC$/;"	c	menu:Command line interface""Memory commands
CONFIG_CMD_NAND	cmd/Kconfig	/^config CMD_NAND$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_NAND	include/config_cmd_all.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/B4860QDS.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/M5329EVB.h	/^#      define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/M5373EVB.h	/^#      define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/MPC8313ERDB.h	/^#define CONFIG_CMD_NAND /;"	d
CONFIG_CMD_NAND	include/configs/MPC8315ERDB.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/MPC837XEMDS.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/MPC8536DS.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/MPC8569MDS.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/MPC8572DS.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/P1010RDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/P1022DS.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/P1023RDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/P2041RDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/PLU405.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/PMC440.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T102xQDS.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T102xRDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T1040QDS.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T104xRDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T208xQDS.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T208xRDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T4240QDS.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/T4240RDB.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/VCMA9.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/acadia.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/am3517_crane.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/am3517_evm.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/apf27.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/apx4devkit.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/aria.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9260ek.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9261ek.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9263ek.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9n12ek.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9rlek.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/at91sam9x5ek.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/axs10x.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/baltos.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/bamboo.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/bf526-ezbrd.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/bf561-acvilon.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/bg0900.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/canyonlands.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/cm-bf527.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/cm_fx6.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/cm_t335.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/cm_t35.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/cm_t3517.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/colibri_t20.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/colibri_vf.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/corenet_ds.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/corvus.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/da850evm.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/db-mv784mp-gp.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/devkit3250.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/dns325.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/dockstar.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ea20.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ethernut5.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/flea3.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/goflexhome.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/gw_ventana.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/harmony.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/iconnect.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ids8313.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/imx27lite-common.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ipam390.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/kilauea.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/km/km_arm.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/km/kmp204x-common.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/km8360.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls1021aqds.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls1043aqds.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls1043ardb.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls1046aqds.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls1046ardb.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls2080a_simu.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls2080aqds.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ls2080ardb.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/m28evk.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/m53evk.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mcx.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/mecp5123.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/medcom-wide.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/meesc.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/mx28evk.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mx31pdk.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mx35pdk.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mx53ard.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mx6qsabreauto.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mx6sxsabreauto.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/mx7dsabresd.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/nas220.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/omap3_beagle.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/omap3_evm.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/omap3_logic.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/openrd.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/pcm052.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/pcm058.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/pdm360ng.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/pengwyn.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/platinum.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/plutux.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/pm9261.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/pm9263.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/pm9g45.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/pogo_e02.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/s32v234evb.h	/^#define	CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/sama5d2_ptc.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/sama5d3_xplained.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/sama5d3xek.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/sama5d4_xplained.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/sama5d4ek.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/seaboard.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/sequoia.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/siemens-am33x-common.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/smartweb.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/smdk2410.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/snapper9260.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/snapper9g45.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/socrates.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/spear-common.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/suvd3.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/tam3517-common.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/tao3530.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/taurus.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/tec.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ti_armv7_omap.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/titanium.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/tricorder.h	/^#define CONFIG_CMD_NAND	/;"	d
CONFIG_CMD_NAND	include/configs/usb_a9263.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/vct.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/ve8313.h	/^#define CONFIG_CMD_NAND /;"	d
CONFIG_CMD_NAND	include/configs/vf610twr.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/woodburn_common.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/work_92105.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/x600.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/xpedite517x.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/xpedite520x.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/xpedite537x.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND	include/configs/xpedite550x.h	/^#define CONFIG_CMD_NAND$/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/apf27.h	/^#define CONFIG_CMD_NAND_LOCK_UNLOCK$/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_NAND_LOCK_UNLOCK$/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/devkit8000.h	/^#define CONFIG_CMD_NAND_LOCK_UNLOCK	/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/omap3_cairo.h	/^#define CONFIG_CMD_NAND_LOCK_UNLOCK$/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/omap3_logic.h	/^#define CONFIG_CMD_NAND_LOCK_UNLOCK	/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/omap3_zoom1.h	/^#define CONFIG_CMD_NAND_LOCK_UNLOCK /;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/tricorder.h	/^#define CONFIG_CMD_NAND_LOCK_UNLOCK	/;"	d
CONFIG_CMD_NAND_LOCK_UNLOCK	include/configs/xilinx_zynqmp.h	/^# define CONFIG_CMD_NAND_LOCK_UNLOCK$/;"	d
CONFIG_CMD_NAND_MODULE	cmd/Kconfig	/^config CMD_NAND$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_NAND_TORTURE	include/configs/colibri_imx7.h	/^#define CONFIG_CMD_NAND_TORTURE$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/apf27.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/at91sam9n12ek.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/at91sam9x5ek.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/bg0900.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/colibri_imx7.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/gw_ventana.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/ids8313.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/ipam390.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/m28evk.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/m53evk.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/mx28evk.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/mx6qsabreauto.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/mx7dsabresd.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/pcm052.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/pcm058.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/platinum.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/sama5d2_ptc.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/sama5d3_xplained.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/sama5d3xek.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/titanium.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NAND_TRIMFFS	include/configs/vf610twr.h	/^#define CONFIG_CMD_NAND_TRIMFFS$/;"	d
CONFIG_CMD_NET	cmd/Kconfig	/^config CMD_NET$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_NET	include/config/auto.conf	/^CONFIG_CMD_NET=y$/;"	k
CONFIG_CMD_NET	include/generated/autoconf.h	/^#define CONFIG_CMD_NET /;"	d
CONFIG_CMD_NET	tools/Makefile	/^CONFIG_CMD_NET = y$/;"	m
CONFIG_CMD_NET_MODULE	cmd/Kconfig	/^config CMD_NET$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_NFS	cmd/Kconfig	/^config CMD_NFS$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_NFS	include/config/auto.conf	/^CONFIG_CMD_NFS=y$/;"	k
CONFIG_CMD_NFS	include/generated/autoconf.h	/^#define CONFIG_CMD_NFS /;"	d
CONFIG_CMD_NFS_MODULE	cmd/Kconfig	/^config CMD_NFS$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_ONENAND	include/config_cmd_all.h	/^#define CONFIG_CMD_ONENAND	/;"	d
CONFIG_CMD_ONENAND	include/configs/nokia_rx51.h	/^#define CONFIG_CMD_ONENAND	/;"	d
CONFIG_CMD_ONENAND	include/configs/omap3_igep00x0.h	/^#define CONFIG_CMD_ONENAND$/;"	d
CONFIG_CMD_ONENAND	include/configs/s5p_goni.h	/^#define CONFIG_CMD_ONENAND$/;"	d
CONFIG_CMD_ONENAND	include/configs/smdkc100.h	/^#define CONFIG_CMD_ONENAND$/;"	d
CONFIG_CMD_ONENAND	include/configs/vct.h	/^#define CONFIG_CMD_ONENAND$/;"	d
CONFIG_CMD_OTP	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_OTP$/;"	d
CONFIG_CMD_PART	include/autoconf.mk	/^CONFIG_CMD_PART=y$/;"	m
CONFIG_CMD_PART	include/config_distro_bootcmd.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/am3517_evm.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/baltos.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/exynos-common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/kc1.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/pic32mzdask.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/rk3036_common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/rk3288_common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/rk3399_common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/rpi.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/sandbox.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/snapper9g45.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/sniper.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/tbs2910.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/tegra-common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/ti_armv7_common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/warp7.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PART	include/configs/x86-common.h	/^#define CONFIG_CMD_PART$/;"	d
CONFIG_CMD_PCA953X	include/configs/cm_t335.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/ot1200.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/snapper9260.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/strider.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/xpedite517x.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/xpedite520x.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/xpedite537x.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X	include/configs/xpedite550x.h	/^#define CONFIG_CMD_PCA953X$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/cm_t335.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/ot1200.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/snapper9260.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/strider.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/xpedite517x.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/xpedite520x.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/xpedite537x.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCA953X_INFO	include/configs/xpedite550x.h	/^#define CONFIG_CMD_PCA953X_INFO$/;"	d
CONFIG_CMD_PCI	include/config_cmd_all.h	/^#define CONFIG_CMD_PCI	/;"	d
CONFIG_CMD_PCI	include/configs/B4860QDS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/CPCI2DP.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/CPCI4052.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/M5235EVB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/M5475EVB.h	/^#		define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/M5475EVB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/M5485EVB.h	/^#		define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/M5485EVB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MIP405.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8308RDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8313ERDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8315ERDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8323ERDB.h	/^	#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC832XEMDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8349EMDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8349ITX.h	/^	#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC837XEMDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC837XERDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8536DS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8540ADS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8541CDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8544DS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8548CDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8555CDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8560ADS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8568MDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8569MDS.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8572DS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8610HPCD.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/MPC8641HPCN.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/P1010RDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/P1022DS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/P1023RDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/P2041RDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/PIP405.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/PLU405.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/PMC405DE.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/PMC440.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T102xQDS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T102xRDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T1040QDS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T104xRDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T208xQDS.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T208xRDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/T4240RDB.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/TQM5200.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/TQM834x.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/UCP1020.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/a4m072.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ac14xx.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/apalis_t30.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/aria.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/bamboo.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/beaver.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/boston.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/bubinga.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/canyonlands.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/cardhu.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/cei-tk1-som.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/clearfog.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/controlcenterd.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/corenet_ds.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/cyrus.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/db-88f6820-amc.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/db-88f6820-gp.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/db-mv784mp-gp.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ds414.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/gdppc440etx.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/gw_ventana.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/hrcon.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/icon.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/inka4x0.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/integratorap.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/intip.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ipek01.h	/^#define CONFIG_CMD_PCI	/;"	d
CONFIG_CMD_PCI	include/configs/jetson-tk1.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/katmai.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/kilauea.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/km/km83xx-common.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/km/kmp204x-common.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls1012ardb.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls1021aqds.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls1021atwr.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls1043a_common.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls2080aqds.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ls2080ardb.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/luan.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/makalu.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/malta.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/mpc8308_p1m.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/mx6sabresd.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/mx6sxsabresd.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/novena.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/o2dnt-common.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/p1_twr.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/p2371-2180.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/p2771-0000.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/pcm030.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/qemu-ppce500.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/r2dplus.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/r7780mp.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/sandbox.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/sbc8349.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/sbc8548.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/sbc8641d.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/sequoia.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/sh7785lcr.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/socrates.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/strider.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/t3corp.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/t4qds.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/tbs2910.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/theadorable.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/trimslice.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/ve8313.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/vme8349.h	/^    #define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/walnut.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/x86-common.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/xpedite1000.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/xpedite517x.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/xpedite520x.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/xpedite537x.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/xpedite550x.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/yosemite.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/yucca.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI	include/configs/zc5202.h	/^#define CONFIG_CMD_PCI$/;"	d
CONFIG_CMD_PCI_ENUM	include/configs/ds414.h	/^#define CONFIG_CMD_PCI_ENUM$/;"	d
CONFIG_CMD_PCI_ENUM	include/configs/xpedite517x.h	/^#define CONFIG_CMD_PCI_ENUM$/;"	d
CONFIG_CMD_PCI_ENUM	include/configs/xpedite520x.h	/^#define CONFIG_CMD_PCI_ENUM$/;"	d
CONFIG_CMD_PCI_ENUM	include/configs/xpedite537x.h	/^#define CONFIG_CMD_PCI_ENUM$/;"	d
CONFIG_CMD_PCI_ENUM	include/configs/xpedite550x.h	/^#define CONFIG_CMD_PCI_ENUM$/;"	d
CONFIG_CMD_PCMCIA	include/config_cmd_all.h	/^#define CONFIG_CMD_PCMCIA	/;"	d
CONFIG_CMD_PCMCIA	include/configs/ms7720se.h	/^#define CONFIG_CMD_PCMCIA$/;"	d
CONFIG_CMD_PING	cmd/Kconfig	/^config CMD_PING$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_PING	include/config/auto.conf	/^CONFIG_CMD_PING=y$/;"	k
CONFIG_CMD_PING	include/configs/am335x_shc.h	/^#define CONFIG_CMD_PING$/;"	d
CONFIG_CMD_PING	include/configs/snapper9g45.h	/^#define CONFIG_CMD_PING$/;"	d
CONFIG_CMD_PING	include/generated/autoconf.h	/^#define CONFIG_CMD_PING /;"	d
CONFIG_CMD_PING_MODULE	cmd/Kconfig	/^config CMD_PING$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_PINMON	arch/arm/mach-uniphier/Kconfig	/^config CMD_PINMON$/;"	c
CONFIG_CMD_PINMON_MODULE	arch/arm/mach-uniphier/Kconfig	/^config CMD_PINMON$/;"	c
CONFIG_CMD_PMIC	cmd/Kconfig	/^config CMD_PMIC$/;"	c	menu:Command line interface""Power commands
CONFIG_CMD_PMIC_MODULE	cmd/Kconfig	/^config CMD_PMIC$/;"	c	menu:Command line interface""Power commands
CONFIG_CMD_PORTIO	include/config_cmd_all.h	/^#define CONFIG_CMD_PORTIO	/;"	d
CONFIG_CMD_POWEROFF	cmd/Kconfig	/^config CMD_POWEROFF$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_POWEROFF_MODULE	cmd/Kconfig	/^config CMD_POWEROFF$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_PXE	include/autoconf.mk	/^CONFIG_CMD_PXE=y$/;"	m
CONFIG_CMD_PXE	include/config_distro_defaults.h	/^#define CONFIG_CMD_PXE$/;"	d
CONFIG_CMD_PXE	include/configs/ls1043a_common.h	/^#define CONFIG_CMD_PXE$/;"	d
CONFIG_CMD_PXE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_CMD_PXE$/;"	d
CONFIG_CMD_PXE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CMD_PXE$/;"	d
CONFIG_CMD_QFW	cmd/Kconfig	/^config CMD_QFW$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_QFW_MODULE	cmd/Kconfig	/^config CMD_QFW$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_RARP	cmd/Kconfig	/^config CMD_RARP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_RARP_MODULE	cmd/Kconfig	/^config CMD_RARP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_READ	include/config_cmd_all.h	/^#define CONFIG_CMD_READ	/;"	d
CONFIG_CMD_REGINFO	include/config_cmd_all.h	/^#define CONFIG_CMD_REGINFO	/;"	d
CONFIG_CMD_REGINFO	include/configs/B4860QDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/BSC9131RDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/BSC9132QDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/C29XPCIE.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M5208EVBE.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M52277EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M5235EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M53017EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M5329EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M5373EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M54418TWR.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M54451EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M54455EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M5475EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/M5485EVB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MIP405.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8536DS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8541CDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8544DS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8548CDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8555CDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8560ADS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8568MDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8569MDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8572DS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8610HPCD.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/MPC8641HPCN.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/P1010RDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/P1022DS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/P1023RDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/PATI.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/PIP405.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/PMC440.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T102xQDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T102xRDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T1040QDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T104xRDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T208xQDS.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T208xRDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/T4240RDB.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/TQM5200.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/TQM834x.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/UCP1020.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/VCMA9.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/a3m071.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/ac14xx.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/amcc-common.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/aria.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/astro_mcf5373l.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/bfin_adi_common.h	/^# define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/canmb.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/cm5200.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/controlcenterd.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/corenet_ds.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/cyrus.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_REGINFO	/;"	d
CONFIG_CMD_REGINFO	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/gr_ep2s60.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/gr_xc3s_1500.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/grasshopper.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/grsim.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/grsim_leon2.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/lwmon5.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/mecp5123.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/motionpro.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/mpc5121ads.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/munices.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/o3dnt.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/p1_twr.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/pdm360ng.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/qemu-ppce500.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/s5p_goni.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/sbc8548.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/sbc8641d.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/smdk2410.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/smdkc100.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/socrates.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/t4qds.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/xilinx-ppc.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/xpedite517x.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/xpedite520x.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/xpedite537x.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGINFO	include/configs/xpedite550x.h	/^#define CONFIG_CMD_REGINFO$/;"	d
CONFIG_CMD_REGULATOR	cmd/Kconfig	/^config CMD_REGULATOR$/;"	c	menu:Command line interface""Power commands
CONFIG_CMD_REGULATOR_MODULE	cmd/Kconfig	/^config CMD_REGULATOR$/;"	c	menu:Command line interface""Power commands
CONFIG_CMD_REISER	include/config_cmd_all.h	/^#define CONFIG_CMD_REISER	/;"	d
CONFIG_CMD_REISER	include/configs/ethernut5.h	/^#define CONFIG_CMD_REISER$/;"	d
CONFIG_CMD_REMOTEPROC	cmd/Kconfig	/^config CMD_REMOTEPROC$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_REMOTEPROC_MODULE	cmd/Kconfig	/^config CMD_REMOTEPROC$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_RUN	cmd/Kconfig	/^config CMD_RUN$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_RUN	include/config/auto.conf	/^CONFIG_CMD_RUN=y$/;"	k
CONFIG_CMD_RUN	include/generated/autoconf.h	/^#define CONFIG_CMD_RUN /;"	d
CONFIG_CMD_RUN_MODULE	cmd/Kconfig	/^config CMD_RUN$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_SANDBOX	include/config_cmd_all.h	/^#define CONFIG_CMD_SANDBOX	/;"	d
CONFIG_CMD_SANDBOX	include/configs/sandbox.h	/^#define CONFIG_CMD_SANDBOX$/;"	d
CONFIG_CMD_SATA	include/configs/MPC8315ERDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/MPC8349ITX.h	/^	#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/MPC837XEMDS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/MPC837XERDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/MPC8536DS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/P1010RDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/P1022DS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/P2041RDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/P4080DS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T102xQDS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T1040QDS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T104xRDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T208xQDS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T208xRDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T4240QDS.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/T4240RDB.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/UCP1020.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/advantech_dms-ba16.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/canyonlands.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/cgtqmx6eval.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/cm_fx6.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/controlcenterd.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/corenet_ds.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/cyrus.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/db-mv784mp-gp.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/gw_ventana.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/m53evk.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/mx53loco.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/nitrogen6x.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/novena.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/ot1200.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/p1_twr.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/sandbox.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/t4qds.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/tbs2910.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/theadorable.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/udoo.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SATA	include/configs/wandboard.h	/^#define CONFIG_CMD_SATA$/;"	d
CONFIG_CMD_SAVEENV	cmd/Kconfig	/^config CMD_SAVEENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_SAVEENV	include/config/auto.conf	/^CONFIG_CMD_SAVEENV=y$/;"	k
CONFIG_CMD_SAVEENV	include/generated/autoconf.h	/^#define CONFIG_CMD_SAVEENV /;"	d
CONFIG_CMD_SAVEENV_MODULE	cmd/Kconfig	/^config CMD_SAVEENV$/;"	c	menu:Command line interface""Environment commands
CONFIG_CMD_SAVES	include/config_cmd_all.h	/^#define CONFIG_CMD_SAVES	/;"	d
CONFIG_CMD_SAVES	include/configs/MIP405.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/PIP405.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/calimain.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/da850evm.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/digsy_mtc.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/ea20.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/ethernut5.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/ipam390.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/legoev3.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/microblaze-generic.h	/^#  define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/spear-common.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/x600.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SAVES	include/configs/xtfpga.h	/^#define CONFIG_CMD_SAVES$/;"	d
CONFIG_CMD_SCSI	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_SCSI$/;"	d
CONFIG_CMD_SCSI	include/configs/ls1012ardb.h	/^#define CONFIG_CMD_SCSI$/;"	d
CONFIG_CMD_SCSI	include/configs/ls1043ardb.h	/^#define CONFIG_CMD_SCSI$/;"	d
CONFIG_CMD_SDRAM	include/config_cmd_all.h	/^#define CONFIG_CMD_SDRAM	/;"	d
CONFIG_CMD_SDRAM	include/configs/MPC8349ITX.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/MigoR.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/PIP405.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/ap325rxa.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/ap_sh4a_4a.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/armadillo-800eva.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/bamboo.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/bubinga.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/canyonlands.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/ecovec.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/espt.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/icon.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/intip.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/katmai.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/luan.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/lwmon5.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/ms7720se.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/ms7722se.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/r0p7734.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/r7780mp.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/rcar-gen2-common.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/rcar-gen3-common.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/redwood.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/rsk7203.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/sequoia.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/sh7752evb.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/sh7753evb.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/sh7757lcr.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/sh7763rdp.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/sh7785lcr.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/shmin.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/socrates.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/t3corp.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/v38b.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/walnut.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SDRAM	include/configs/yucca.h	/^#define CONFIG_CMD_SDRAM$/;"	d
CONFIG_CMD_SETEXPR	cmd/Kconfig	/^config CMD_SETEXPR$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_SETEXPR	include/config/auto.conf	/^CONFIG_CMD_SETEXPR=y$/;"	k
CONFIG_CMD_SETEXPR	include/generated/autoconf.h	/^#define CONFIG_CMD_SETEXPR /;"	d
CONFIG_CMD_SETEXPR_MODULE	cmd/Kconfig	/^config CMD_SETEXPR$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_SETGETDCR	cmd/Kconfig	/^config CMD_SETGETDCR$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_SETGETDCR_MODULE	cmd/Kconfig	/^config CMD_SETGETDCR$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_SF	cmd/Kconfig	/^config CMD_SF$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_SF_MODULE	cmd/Kconfig	/^config CMD_SF$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_SF_TEST	include/configs/chromebook_jerry.h	/^#define CONFIG_CMD_SF_TEST$/;"	d
CONFIG_CMD_SF_TEST	include/configs/sandbox.h	/^#define CONFIG_CMD_SF_TEST$/;"	d
CONFIG_CMD_SF_TEST	include/configs/x86-common.h	/^#define CONFIG_CMD_SF_TEST$/;"	d
CONFIG_CMD_SH_ZIMAGEBOOT	include/configs/r2dplus.h	/^#define CONFIG_CMD_SH_ZIMAGEBOOT$/;"	d
CONFIG_CMD_SH_ZIMAGEBOOT	include/configs/sh7785lcr.h	/^#define CONFIG_CMD_SH_ZIMAGEBOOT$/;"	d
CONFIG_CMD_SNTP	cmd/Kconfig	/^config CMD_SNTP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_SNTP_MODULE	cmd/Kconfig	/^config CMD_SNTP$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_SOFTSWITCH	include/configs/bf609-ezkit.h	/^#define CONFIG_CMD_SOFTSWITCH$/;"	d
CONFIG_CMD_SOUND	cmd/Kconfig	/^config CMD_SOUND$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_SOUND_MODULE	cmd/Kconfig	/^config CMD_SOUND$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_SOURCE	cmd/Kconfig	/^config CMD_SOURCE$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_SOURCE	include/config/auto.conf	/^CONFIG_CMD_SOURCE=y$/;"	k
CONFIG_CMD_SOURCE	include/generated/autoconf.h	/^#define CONFIG_CMD_SOURCE /;"	d
CONFIG_CMD_SOURCE_MODULE	cmd/Kconfig	/^config CMD_SOURCE$/;"	c	menu:Command line interface""Shell scripting commands
CONFIG_CMD_SPI	cmd/Kconfig	/^config CMD_SPI$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_SPI	include/configs/ls1012aqds.h	/^#define CONFIG_CMD_SPI$/;"	d
CONFIG_CMD_SPIBOOTLDR	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_SPIBOOTLDR$/;"	d
CONFIG_CMD_SPI_MODULE	cmd/Kconfig	/^config CMD_SPI$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_SPL	include/configs/gw_ventana.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/ipam390.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/microblaze-generic.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/mx6sabresd.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/ti_armv7_common.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/trats.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/twister.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL	include/configs/zynq-common.h	/^#define CONFIG_CMD_SPL$/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/am335x_evm.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/am43xx_evm.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/baltos.h	/^#define CONFIG_CMD_SPL_NAND_OFS /;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/bav335x.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/brppt1.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/cm_t335.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/devkit8000.h	/^#define CONFIG_CMD_SPL_NAND_OFS /;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/dra7xx_evm.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/gw_ventana.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/ipam390.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/omap3_beagle.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/omap3_cairo.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/omap3_logic.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/omap3_overo.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/omap3_zoom1.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/pengwyn.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_NAND_OFS	include/configs/twister.h	/^#define CONFIG_CMD_SPL_NAND_OFS	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/baltos.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/bav335x.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/brppt1.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/cm_t335.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/devkit8000.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE /;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/gw_ventana.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/ipam390.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/mx6sabresd.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE /;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/omap3_overo.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/omap3_zoom1.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/pengwyn.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_SPL_WRITE_SIZE	include/configs/twister.h	/^#define CONFIG_CMD_SPL_WRITE_SIZE	/;"	d
CONFIG_CMD_STRINGS	include/configs/bfin_adi_common.h	/^# define CONFIG_CMD_STRINGS$/;"	d
CONFIG_CMD_STRINGS	include/configs/dnp5370.h	/^#define CONFIG_CMD_STRINGS$/;"	d
CONFIG_CMD_TCA642X	include/configs/omap5_uevm.h	/^#define CONFIG_CMD_TCA642X$/;"	d
CONFIG_CMD_TERMINAL	include/config_cmd_all.h	/^#define CONFIG_CMD_TERMINAL	/;"	d
CONFIG_CMD_TFTP	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_TFTP$/;"	d
CONFIG_CMD_TFTPPUT	cmd/Kconfig	/^config CMD_TFTPPUT$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_TFTPPUT_MODULE	cmd/Kconfig	/^config CMD_TFTPPUT$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_TFTPSRV	cmd/Kconfig	/^config CMD_TFTPSRV$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_TFTPSRV_MODULE	cmd/Kconfig	/^config CMD_TFTPSRV$/;"	c	menu:Command line interface""Network commands
CONFIG_CMD_THOR_DOWNLOAD	include/configs/exynos4-common.h	/^#define CONFIG_CMD_THOR_DOWNLOAD$/;"	d
CONFIG_CMD_THOR_DOWNLOAD	include/configs/odroid_xu3.h	/^#define CONFIG_CMD_THOR_DOWNLOAD$/;"	d
CONFIG_CMD_THOR_DOWNLOAD	include/configs/s5p_goni.h	/^#define CONFIG_CMD_THOR_DOWNLOAD$/;"	d
CONFIG_CMD_THOR_DOWNLOAD	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CMD_THOR_DOWNLOAD$/;"	d
CONFIG_CMD_THOR_DOWNLOAD	include/configs/zynq-common.h	/^# define CONFIG_CMD_THOR_DOWNLOAD$/;"	d
CONFIG_CMD_TIME	cmd/Kconfig	/^config CMD_TIME$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_TIMER	cmd/Kconfig	/^config CMD_TIMER$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_TIMER_MODULE	cmd/Kconfig	/^config CMD_TIMER$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_TIME_MODULE	cmd/Kconfig	/^config CMD_TIME$/;"	c	menu:Command line interface""Misc commands
CONFIG_CMD_TPM	cmd/Kconfig	/^config CMD_TPM$/;"	c	menu:Command line interface""Security commands
CONFIG_CMD_TPM_MODULE	cmd/Kconfig	/^config CMD_TPM$/;"	c	menu:Command line interface""Security commands
CONFIG_CMD_TPM_TEST	cmd/Kconfig	/^config CMD_TPM_TEST$/;"	c	menu:Command line interface""Security commands
CONFIG_CMD_TPM_TEST_MODULE	cmd/Kconfig	/^config CMD_TPM_TEST$/;"	c	menu:Command line interface""Security commands
CONFIG_CMD_TRACE	include/configs/exynos5-common.h	/^#define CONFIG_CMD_TRACE$/;"	d
CONFIG_CMD_TRACE	include/configs/sandbox.h	/^#define CONFIG_CMD_TRACE$/;"	d
CONFIG_CMD_TSI148	include/configs/vme8349.h	/^#define CONFIG_CMD_TSI148$/;"	d
CONFIG_CMD_UBI	cmd/Kconfig	/^config CMD_UBI$/;"	c	menu:Command line interface
CONFIG_CMD_UBIFS	include/config_cmd_all.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/VCMA9.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/a3m071.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/am3517_evm.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/apf27.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/apx4devkit.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/aristainetos-common.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/at91sam9x5ek.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/baltos.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/colibri_imx7.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/colibri_t20.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/colibri_vf.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/da850evm.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/dockstar.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/ea20.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/ethernut5.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/gw_ventana.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/iconnect.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/ids8313.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/ipam390.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/m28evk.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/m53evk.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/mcx.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/mv-common.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/mx28evk.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/nas220.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/nokia_rx51.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/omap3_logic.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/omap3_overo.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/omap3_pandora.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/omapl138_lcdk.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/pcm052.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/pcm058.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/platinum.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/pogo_e02.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/sama5d3_xplained.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/siemens-am33x-common.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/smdk2410.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/socfpga_common.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/tam3517-common.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/titanium.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/tricorder.h	/^#define CONFIG_CMD_UBIFS	/;"	d
CONFIG_CMD_UBIFS	include/configs/vf610twr.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBIFS	include/configs/x600.h	/^#define CONFIG_CMD_UBIFS$/;"	d
CONFIG_CMD_UBI_MODULE	cmd/Kconfig	/^config CMD_UBI$/;"	c	menu:Command line interface
CONFIG_CMD_UNIVERSE	include/config_cmd_all.h	/^#define CONFIG_CMD_UNIVERSE	/;"	d
CONFIG_CMD_UNZIP	include/config_cmd_all.h	/^#define CONFIG_CMD_UNZIP	/;"	d
CONFIG_CMD_UNZIP	include/configs/brxre1.h	/^#define CONFIG_CMD_UNZIP$/;"	d
CONFIG_CMD_UNZIP	include/configs/dragonboard410c.h	/^#define CONFIG_CMD_UNZIP$/;"	d
CONFIG_CMD_UNZIP	include/configs/ethernut5.h	/^#define CONFIG_CMD_UNZIP$/;"	d
CONFIG_CMD_UNZIP	include/configs/hikey.h	/^#define CONFIG_CMD_UNZIP$/;"	d
CONFIG_CMD_UNZIP	include/configs/vexpress_aemv8a.h	/^#define CONFIG_CMD_UNZIP$/;"	d
CONFIG_CMD_UNZIP	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CMD_UNZIP$/;"	d
CONFIG_CMD_USB	cmd/Kconfig	/^config CMD_USB$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_USB	include/config/auto.conf	/^CONFIG_CMD_USB=y$/;"	k
CONFIG_CMD_USB	include/configs/sama5d2_ptc.h	/^#define CONFIG_CMD_USB$/;"	d
CONFIG_CMD_USB	include/configs/snapper9g45.h	/^#define CONFIG_CMD_USB$/;"	d
CONFIG_CMD_USB	include/generated/autoconf.h	/^#define CONFIG_CMD_USB /;"	d
CONFIG_CMD_USB_MASS_STORAGE	cmd/Kconfig	/^config CMD_USB_MASS_STORAGE$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_USB_MASS_STORAGE	include/configs/rk3036_common.h	/^#define CONFIG_CMD_USB_MASS_STORAGE$/;"	d
CONFIG_CMD_USB_MASS_STORAGE	include/configs/rk3288_common.h	/^#define CONFIG_CMD_USB_MASS_STORAGE$/;"	d
CONFIG_CMD_USB_MASS_STORAGE_MODULE	cmd/Kconfig	/^config CMD_USB_MASS_STORAGE$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_USB_MODULE	cmd/Kconfig	/^config CMD_USB$/;"	c	menu:Command line interface""Device access commands
CONFIG_CMD_USB_STORAGE	include/configs/bfin_adi_common.h	/^#  define CONFIG_CMD_USB_STORAGE$/;"	d
CONFIG_CMD_XIMG	cmd/Kconfig	/^config CMD_XIMG$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_XIMG	include/config/auto.conf	/^CONFIG_CMD_XIMG=y$/;"	k
CONFIG_CMD_XIMG	include/generated/autoconf.h	/^#define CONFIG_CMD_XIMG /;"	d
CONFIG_CMD_XIMG_MODULE	cmd/Kconfig	/^config CMD_XIMG$/;"	c	menu:Command line interface""Boot commands
CONFIG_CMD_ZBOOT	include/configs/x86-common.h	/^#define CONFIG_CMD_ZBOOT$/;"	d
CONFIG_CMD_ZFS	include/config_cmd_all.h	/^#define CONFIG_CMD_ZFS	/;"	d
CONFIG_CM_INIT	include/armcoremodule.h	/^#define CONFIG_CM_INIT	/;"	d
CONFIG_CM_INIT	include/configs/integrator-common.h	/^#define CONFIG_CM_INIT$/;"	d
CONFIG_CM_MULTIPLE_SSRAM	include/armcoremodule.h	/^#define	CONFIG_CM_MULTIPLE_SSRAM	/;"	d
CONFIG_CM_REMAP	include/armcoremodule.h	/^#define CONFIG_CM_REMAP	/;"	d
CONFIG_CM_REMAP	include/configs/integrator-common.h	/^#define CONFIG_CM_REMAP$/;"	d
CONFIG_CM_SPD_DETECT	include/armcoremodule.h	/^#define CONFIG_CM_SPD_DETECT	/;"	d
CONFIG_CM_SPD_DETECT	include/configs/integrator-common.h	/^#define CONFIG_CM_SPD_DETECT$/;"	d
CONFIG_CM_T335	include/configs/cm_t335.h	/^#define CONFIG_CM_T335$/;"	d
CONFIG_CM_T3517	include/configs/cm_t3517.h	/^#define CONFIG_CM_T3517	/;"	d
CONFIG_CM_T3X	include/configs/cm_t35.h	/^#define CONFIG_CM_T3X	/;"	d
CONFIG_CM_T43	include/configs/cm_t43.h	/^#define CONFIG_CM_T43$/;"	d
CONFIG_CM_T54	include/configs/cm_t54.h	/^#define CONFIG_CM_T54$/;"	d
CONFIG_CM_TCRAM	include/armcoremodule.h	/^#define CONFIG_CM_TCRAM	/;"	d
CONFIG_CNTL	include/radeon.h	/^#define CONFIG_CNTL	/;"	d
CONFIG_COLIBRI_IMX7_EXT_PHYCLK	board/toradex/colibri_imx7/Kconfig	/^config COLIBRI_IMX7_EXT_PHYCLK$/;"	c
CONFIG_COLIBRI_IMX7_EXT_PHYCLK_MODULE	board/toradex/colibri_imx7/Kconfig	/^config COLIBRI_IMX7_EXT_PHYCLK$/;"	c
CONFIG_COMMAND_HISTORY	include/configs/bcm_ep_board.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMAND_HISTORY	include/configs/hikey.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMAND_HISTORY	include/configs/rpi.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMAND_HISTORY	include/configs/sandbox.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMAND_HISTORY	include/configs/tao3530.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMAND_HISTORY	include/configs/tegra-common.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMAND_HISTORY	include/configs/x86-common.h	/^#define CONFIG_COMMAND_HISTORY$/;"	d
CONFIG_COMMON_BOOT	include/configs/s5p_goni.h	/^#define CONFIG_COMMON_BOOT	/;"	d
CONFIG_COMMON_BOOT	include/configs/smdkc100.h	/^#define CONFIG_COMMON_BOOT	/;"	d
CONFIG_COMMON_ENV_MISC	include/configs/platinum.h	/^#define CONFIG_COMMON_ENV_MISC	/;"	d
CONFIG_COMMON_ENV_SETTINGS	include/configs/platinum.h	/^#define CONFIG_COMMON_ENV_SETTINGS	/;"	d
CONFIG_COMMON_ENV_SETTINGS	include/configs/tricorder.h	/^#define CONFIG_COMMON_ENV_SETTINGS /;"	d
CONFIG_COMMON_ENV_UBI	include/configs/platinum.h	/^#define CONFIG_COMMON_ENV_UBI	/;"	d
CONFIG_COMPACT_FLASH	include/configs/MPC8349ITX.h	/^#define CONFIG_COMPACT_FLASH$/;"	d
CONFIG_CONSOLE_EXTRA_INFO	drivers/video/Kconfig	/^config CONSOLE_EXTRA_INFO$/;"	c	menu:Graphics support
CONFIG_CONSOLE_EXTRA_INFO_MODULE	drivers/video/Kconfig	/^config CONSOLE_EXTRA_INFO$/;"	c	menu:Graphics support
CONFIG_CONSOLE_MUX	common/Kconfig	/^config CONSOLE_MUX$/;"	c	menu:Console
CONFIG_CONSOLE_MUX	include/config/auto.conf	/^CONFIG_CONSOLE_MUX=y$/;"	k
CONFIG_CONSOLE_MUX	include/generated/autoconf.h	/^#define CONFIG_CONSOLE_MUX /;"	d
CONFIG_CONSOLE_MUX_MODULE	common/Kconfig	/^config CONSOLE_MUX$/;"	c	menu:Console
CONFIG_CONSOLE_NORMAL	drivers/video/Kconfig	/^config CONSOLE_NORMAL$/;"	c	menu:Graphics support
CONFIG_CONSOLE_NORMAL_MODULE	drivers/video/Kconfig	/^config CONSOLE_NORMAL$/;"	c	menu:Graphics support
CONFIG_CONSOLE_RECORD	common/Kconfig	/^config CONSOLE_RECORD$/;"	c	menu:Console
CONFIG_CONSOLE_RECORD_IN_SIZE	common/Kconfig	/^config CONSOLE_RECORD_IN_SIZE$/;"	c	menu:Console
CONFIG_CONSOLE_RECORD_IN_SIZE_MODULE	common/Kconfig	/^config CONSOLE_RECORD_IN_SIZE$/;"	c	menu:Console
CONFIG_CONSOLE_RECORD_MODULE	common/Kconfig	/^config CONSOLE_RECORD$/;"	c	menu:Console
CONFIG_CONSOLE_RECORD_OUT_SIZE	common/Kconfig	/^config CONSOLE_RECORD_OUT_SIZE$/;"	c	menu:Console
CONFIG_CONSOLE_RECORD_OUT_SIZE_MODULE	common/Kconfig	/^config CONSOLE_RECORD_OUT_SIZE$/;"	c	menu:Console
CONFIG_CONSOLE_ROTATION	drivers/video/Kconfig	/^config CONSOLE_ROTATION$/;"	c	menu:Graphics support
CONFIG_CONSOLE_ROTATION_MODULE	drivers/video/Kconfig	/^config CONSOLE_ROTATION$/;"	c	menu:Graphics support
CONFIG_CONSOLE_SCROLL_LINES	drivers/video/Kconfig	/^config CONSOLE_SCROLL_LINES$/;"	c	menu:Graphics support
CONFIG_CONSOLE_SCROLL_LINES	drivers/video/cfb_console.c	/^#define CONFIG_CONSOLE_SCROLL_LINES /;"	d	file:
CONFIG_CONSOLE_SCROLL_LINES	drivers/video/vidconsole-uclass.c	/^#define CONFIG_CONSOLE_SCROLL_LINES /;"	d	file:
CONFIG_CONSOLE_SCROLL_LINES	include/config/auto.conf	/^CONFIG_CONSOLE_SCROLL_LINES=1$/;"	k
CONFIG_CONSOLE_SCROLL_LINES	include/generated/autoconf.h	/^#define CONFIG_CONSOLE_SCROLL_LINES /;"	d
CONFIG_CONSOLE_SCROLL_LINES_MODULE	drivers/video/Kconfig	/^config CONSOLE_SCROLL_LINES$/;"	c	menu:Graphics support
CONFIG_CONSOLE_TRUETYPE	drivers/video/Kconfig	/^config CONSOLE_TRUETYPE$/;"	c	menu:Graphics support
CONFIG_CONSOLE_TRUETYPE_ANKACODER	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_ANKACODER$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_ANKACODER_MODULE	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_ANKACODER$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_CANTORAONE	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_CANTORAONE$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_CANTORAONE_MODULE	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_CANTORAONE$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_MODULE	drivers/video/Kconfig	/^config CONSOLE_TRUETYPE$/;"	c	menu:Graphics support
CONFIG_CONSOLE_TRUETYPE_NIMBUS	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_NIMBUS$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_NIMBUS_MODULE	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_NIMBUS$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_RUFSCRIPT	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_RUFSCRIPT$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_RUFSCRIPT_MODULE	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_RUFSCRIPT$/;"	c	menu:TrueType Fonts
CONFIG_CONSOLE_TRUETYPE_SIZE	drivers/video/Kconfig	/^config CONSOLE_TRUETYPE_SIZE$/;"	c	menu:Graphics support
CONFIG_CONSOLE_TRUETYPE_SIZE_MODULE	drivers/video/Kconfig	/^config CONSOLE_TRUETYPE_SIZE$/;"	c	menu:Graphics support
CONFIG_CONS_INDEX	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	arch/arm/include/asm/arch-bcmnsp/configs.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	board/birdland/bav335x/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	board/hisilicon/hikey/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	board/tcl/sl50/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	board/ti/am335x/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	board/ti/am57xx/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	board/ti/dra7xx/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	board/vscom/baltos/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX	include/autoconf.mk	/^CONFIG_CONS_INDEX=y$/;"	m
CONFIG_CONS_INDEX	include/configs/B4860QDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/BSC9131RDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/BSC9132QDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/C29XPCIE.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/CPCI2DP.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/CPCI4052.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MIP405.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8308RDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8313ERDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8315ERDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8323ERDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC832XEMDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8349EMDS.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/MPC8349ITX.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC837XEMDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC837XERDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8536DS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8540ADS.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/MPC8541CDS.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/MPC8544DS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8548CDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8555CDS.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/MPC8560ADS.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/MPC8568MDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8569MDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8572DS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8610HPCD.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/MPC8641HPCN.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/P1010RDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/P1022DS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/P1023RDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/P2041RDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/PIP405.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/PLU405.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/PMC405DE.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/PMC440.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T102xQDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T102xRDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T1040QDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T104xRDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T208xQDS.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T208xRDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/T4240RDB.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/TQM834x.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/UCP1020.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/VOM405.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ac14xx.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/acadia.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/adp-ag101p.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/advantech_dms-ba16.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/am335x_igep0033.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/am335x_shc.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/am3517_crane.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/am3517_evm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/apf27.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/aria.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/bamboo.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/bcm23550_w1d.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/bcm28155_ap.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/bubinga.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/calimain.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/canyonlands.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/cm_t335.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/cm_t35.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/cm_t3517.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/cm_t43.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/cm_t54.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/colibri_pxa270.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/controlcenterd.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/corenet_ds.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/cyrus.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/da850evm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/dlvision-10g.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/dlvision.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ea20.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/eco5pk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/edb93xx.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/edminiv2.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/flea3.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/gdppc440etx.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ge_bx50v3.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/h2200.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/highbank.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/hrcon.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/icon.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ids8313.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/imx27lite-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/imx31_phycore.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/integrator-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/intip.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/io.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/io64.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/iocon.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ipam390.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/katmai.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/kc1.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/kilauea.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/km/km83xx-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/km/km_arm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/km/kmp204x-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/km82xx.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/legoev3.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ls1012a_common.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/ls1021aqds.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ls1021atwr.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ls1043a_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ls1046a_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ls2080a_common.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/ls2080ardb.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/luan.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/lwmon5.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/m53evk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/makalu.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mcx.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mecp5123.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/mpc5121ads.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/mpc8308_p1m.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mv-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx25pdk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx31ads.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx31pdk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx35pdk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx51evk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx53ard.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx53evk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx53loco.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx53smd.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/mx6_common.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/mx7_common.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/mxs.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/neo.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/nokia_rx51.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/odroid-c2.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/omap3_cairo.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/omap3_evm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/omap3_logic.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/omap5_uevm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/omapl138_lcdk.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/openrisc-generic.h	/^# define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/p1_twr.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/pcm051.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/pdm360ng.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/pengwyn.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/pepper.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/qemu-mips.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/qemu-mips64.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/qemu-ppce500.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/redwood.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/rpi.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/salvator-x.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/sbc8349.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/sbc8548.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/sbc8641d.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/sequoia.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/siemens-am33x-common.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/sniper.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/socfpga_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/socrates.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/spear-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/strider.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/sunxi-common.h	/^#define CONFIG_CONS_INDEX /;"	d
CONFIG_CONS_INDEX	include/configs/t3corp.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/t4qds.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/tam3517-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/tao3530.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/tbs2910.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/tegra-common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/thunderx_88xx.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ti814x_evm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ti816x_evm.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ti_omap3_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ti_omap4_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/tricorder.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ts4800.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/uniphier.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/usbarmory.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/vct.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/ve8313.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/vexpress_aemv8a.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/vexpress_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/vme8349.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/walnut.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/woodburn_common.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/x600.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xpedite1000.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xpedite517x.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xpedite520x.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xpedite537x.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xpedite550x.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/xtfpga.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/yosemite.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/yucca.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/zipitz2.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	include/configs/zmx25.h	/^#define CONFIG_CONS_INDEX	/;"	d
CONFIG_CONS_INDEX	spl/include/autoconf.mk	/^CONFIG_CONS_INDEX=y$/;"	m
CONFIG_CONS_INDEX_MODULE	board/birdland/bav335x/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX_MODULE	board/hisilicon/hikey/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX_MODULE	board/tcl/sl50/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX_MODULE	board/ti/am335x/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX_MODULE	board/ti/am57xx/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX_MODULE	board/ti/dra7xx/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_INDEX_MODULE	board/vscom/baltos/Kconfig	/^config CONS_INDEX$/;"	c
CONFIG_CONS_ON_SCC	include/configs/MPC8560ADS.h	/^#define CONFIG_CONS_ON_SCC	/;"	d
CONFIG_CONS_ON_SMC	include/configs/km82xx.h	/^#define	CONFIG_CONS_ON_SMC	/;"	d
CONFIG_CONS_SCIF0	include/configs/MigoR.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/blanche.h	/^#define CONFIG_CONS_SCIF0$/;"	d
CONFIG_CONS_SCIF0	include/configs/ecovec.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/espt.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/mpr2.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/ms7720se.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/ms7722se.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/r7780mp.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/rsk7203.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF0	include/configs/shmin.h	/^#define CONFIG_CONS_SCIF0	/;"	d
CONFIG_CONS_SCIF1	include/configs/armadillo-800eva.h	/^#define CONFIG_CONS_SCIF1$/;"	d
CONFIG_CONS_SCIF1	include/configs/ms7750se.h	/^#define CONFIG_CONS_SCIF1	/;"	d
CONFIG_CONS_SCIF1	include/configs/r2dplus.h	/^#define CONFIG_CONS_SCIF1	/;"	d
CONFIG_CONS_SCIF1	include/configs/sh7785lcr.h	/^#define CONFIG_CONS_SCIF1	/;"	d
CONFIG_CONS_SCIF2	include/configs/salvator-x.h	/^#define CONFIG_CONS_SCIF2$/;"	d
CONFIG_CONS_SCIF2	include/configs/sh7752evb.h	/^#define CONFIG_CONS_SCIF2	/;"	d
CONFIG_CONS_SCIF2	include/configs/sh7753evb.h	/^#define CONFIG_CONS_SCIF2	/;"	d
CONFIG_CONS_SCIF2	include/configs/sh7757lcr.h	/^#define CONFIG_CONS_SCIF2	/;"	d
CONFIG_CONS_SCIF2	include/configs/sh7763rdp.h	/^#define CONFIG_CONS_SCIF2	/;"	d
CONFIG_CONS_SCIF3	include/configs/r0p7734.h	/^#define CONFIG_CONS_SCIF3	/;"	d
CONFIG_CONS_SCIF3	include/configs/rsk7264.h	/^#define CONFIG_CONS_SCIF3	/;"	d
CONFIG_CONS_SCIF4	include/configs/ap_sh4a_4a.h	/^#define CONFIG_CONS_SCIF4	/;"	d
CONFIG_CONS_SCIF4	include/configs/kzm9g.h	/^#define CONFIG_CONS_SCIF4$/;"	d
CONFIG_CONS_SCIF5	include/configs/ap325rxa.h	/^#define CONFIG_CONS_SCIF5	/;"	d
CONFIG_CONS_SCIF7	include/configs/rsk7269.h	/^#define CONFIG_CONS_SCIF7$/;"	d
CONFIG_CONTROL	include/ns87308.h	/^#define CONFIG_CONTROL /;"	d
CONFIG_CONTROLCENTERD	include/configs/controlcenterd.h	/^#define CONFIG_CONTROLCENTERD$/;"	d
CONFIG_CON_ROT	include/configs/pm9261.h	/^#define CONFIG_CON_ROT /;"	d
CONFIG_CON_ROT	include/configs/pm9263.h	/^#define CONFIG_CON_ROT	/;"	d
CONFIG_CORE_COUNT	include/configs/exynos5420-common.h	/^#define CONFIG_CORE_COUNT	/;"	d
CONFIG_CORE_COUNT	include/configs/exynos7420-common.h	/^#define CONFIG_CORE_COUNT	/;"	d
CONFIG_CORTINA_FW_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_CORTINA_FW_ADDR	/;"	d
CONFIG_CORTINA_FW_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_CORTINA_FW_ADDR	/;"	d
CONFIG_CORTINA_FW_ADDR	include/configs/ls2080ardb.h	/^#define CONFIG_CORTINA_FW_ADDR	/;"	d
CONFIG_CORTINA_FW_LENGTH	include/configs/T208xRDB.h	/^#define CONFIG_CORTINA_FW_LENGTH	/;"	d
CONFIG_CORTINA_FW_LENGTH	include/configs/T4240RDB.h	/^#define CONFIG_CORTINA_FW_LENGTH	/;"	d
CONFIG_CORTINA_FW_LENGTH	include/configs/ls2080ardb.h	/^#define CONFIG_CORTINA_FW_LENGTH	/;"	d
CONFIG_CPCI405	include/configs/CPCI4052.h	/^#define CONFIG_CPCI405	/;"	d
CONFIG_CPCI405_VER2	include/configs/CPCI4052.h	/^#define CONFIG_CPCI405_VER2	/;"	d
CONFIG_CPCI_AX2000	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_CPCI_AX2000	/;"	d
CONFIG_CPLD_BR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CPLD_BR_PRELIM	/;"	d
CONFIG_CPLD_OR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_CPLD_OR_PRELIM	/;"	d
CONFIG_CPM2	include/configs/MPC8541CDS.h	/^#define CONFIG_CPM2	/;"	d
CONFIG_CPM2	include/configs/MPC8555CDS.h	/^#define CONFIG_CPM2	/;"	d
CONFIG_CPM2	include/configs/MPC8560ADS.h	/^#define CONFIG_CPM2	/;"	d
CONFIG_CPU	arch/blackfin/include/asm/config.h	/^#define CONFIG_CPU /;"	d
CONFIG_CPU	drivers/cpu/Kconfig	/^config CPU$/;"	c
CONFIG_CPUAT91	include/configs/at91rm9200ek.h	/^#define CONFIG_CPUAT91$/;"	d
CONFIG_CPU_ADDR_BITS	arch/x86/Kconfig	/^config CPU_ADDR_BITS$/;"	c	menu:x86 architecture
CONFIG_CPU_ADDR_BITS	arch/x86/cpu/queensbay/Kconfig	/^config CPU_ADDR_BITS$/;"	c
CONFIG_CPU_ADDR_BITS_MODULE	arch/x86/Kconfig	/^config CPU_ADDR_BITS$/;"	c	menu:x86 architecture
CONFIG_CPU_ADDR_BITS_MODULE	arch/x86/cpu/queensbay/Kconfig	/^config CPU_ADDR_BITS$/;"	c
CONFIG_CPU_ARC750D	arch/arc/Kconfig	/^config CPU_ARC750D$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARC750D_MODULE	arch/arc/Kconfig	/^config CPU_ARC750D$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARC770D	arch/arc/Kconfig	/^config CPU_ARC770D$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARC770D_MODULE	arch/arc/Kconfig	/^config CPU_ARC770D$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARCEM6	arch/arc/Kconfig	/^config CPU_ARCEM6$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARCEM6_MODULE	arch/arc/Kconfig	/^config CPU_ARCEM6$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARCHS36	arch/arc/Kconfig	/^config CPU_ARCHS36$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARCHS36_MODULE	arch/arc/Kconfig	/^config CPU_ARCHS36$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARCHS38	arch/arc/Kconfig	/^config CPU_ARCHS38$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARCHS38_MODULE	arch/arc/Kconfig	/^config CPU_ARCHS38$/;"	c	choice:ARC architecture""choice763e4ef80204
CONFIG_CPU_ARM1136	arch/arm/Kconfig	/^config CPU_ARM1136$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM1136_MODULE	arch/arm/Kconfig	/^config CPU_ARM1136$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM1176	arch/arm/Kconfig	/^config CPU_ARM1176$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM1176_MODULE	arch/arm/Kconfig	/^config CPU_ARM1176$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM720T	arch/arm/Kconfig	/^config CPU_ARM720T$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM720T	arch/arm/Makefile	/^CONFIG_CPU_ARM720T=y$/;"	m
CONFIG_CPU_ARM720T_MODULE	arch/arm/Kconfig	/^config CPU_ARM720T$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM920T	arch/arm/Kconfig	/^config CPU_ARM920T$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM920T_MODULE	arch/arm/Kconfig	/^config CPU_ARM920T$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM926EJS	arch/arm/Kconfig	/^config CPU_ARM926EJS$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM926EJS_MODULE	arch/arm/Kconfig	/^config CPU_ARM926EJS$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM946ES	arch/arm/Kconfig	/^config CPU_ARM946ES$/;"	c	menu:ARM architecture
CONFIG_CPU_ARM946ES_MODULE	arch/arm/Kconfig	/^config CPU_ARM946ES$/;"	c	menu:ARM architecture
CONFIG_CPU_ARMV8	include/configs/meson-gxbb-common.h	/^#define CONFIG_CPU_ARMV8$/;"	d
CONFIG_CPU_ARMV8	include/configs/xilinx_zynqmp.h	/^#define CONFIG_CPU_ARMV8$/;"	d
CONFIG_CPU_BIG_ENDIAN	arch/arc/Kconfig	/^config CPU_BIG_ENDIAN$/;"	c	menu:ARC architecture
CONFIG_CPU_BIG_ENDIAN_MODULE	arch/arc/Kconfig	/^config CPU_BIG_ENDIAN$/;"	c	menu:ARC architecture
CONFIG_CPU_FREQ_HZ	include/configs/zynq-common.h	/^# define CONFIG_CPU_FREQ_HZ	/;"	d
CONFIG_CPU_MIPS32	arch/mips/Kconfig	/^config CPU_MIPS32$/;"	c	menu:MIPS architecture
CONFIG_CPU_MIPS32_MODULE	arch/mips/Kconfig	/^config CPU_MIPS32$/;"	c	menu:MIPS architecture
CONFIG_CPU_MIPS32_R1	arch/mips/Kconfig	/^config CPU_MIPS32_R1$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS32_R1_MODULE	arch/mips/Kconfig	/^config CPU_MIPS32_R1$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS32_R2	arch/mips/Kconfig	/^config CPU_MIPS32_R2$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS32_R2_MODULE	arch/mips/Kconfig	/^config CPU_MIPS32_R2$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS32_R6	arch/mips/Kconfig	/^config CPU_MIPS32_R6$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS32_R6_MODULE	arch/mips/Kconfig	/^config CPU_MIPS32_R6$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS64	arch/mips/Kconfig	/^config CPU_MIPS64$/;"	c	menu:MIPS architecture
CONFIG_CPU_MIPS64_MODULE	arch/mips/Kconfig	/^config CPU_MIPS64$/;"	c	menu:MIPS architecture
CONFIG_CPU_MIPS64_R1	arch/mips/Kconfig	/^config CPU_MIPS64_R1$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS64_R1_MODULE	arch/mips/Kconfig	/^config CPU_MIPS64_R1$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS64_R2	arch/mips/Kconfig	/^config CPU_MIPS64_R2$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS64_R2_MODULE	arch/mips/Kconfig	/^config CPU_MIPS64_R2$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS64_R6	arch/mips/Kconfig	/^config CPU_MIPS64_R6$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MIPS64_R6_MODULE	arch/mips/Kconfig	/^config CPU_MIPS64_R6$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CONFIG_CPU_MODULE	drivers/cpu/Kconfig	/^config CPU$/;"	c
CONFIG_CPU_MONAHANS	arch/arm/include/asm/arch-pxa/hardware.h	/^#define	CONFIG_CPU_MONAHANS$/;"	d
CONFIG_CPU_PXA	arch/arm/Kconfig	/^config CPU_PXA$/;"	c	menu:ARM architecture
CONFIG_CPU_PXA25X	include/configs/h2200.h	/^#define CONFIG_CPU_PXA25X	/;"	d
CONFIG_CPU_PXA27X	include/configs/colibri_pxa270.h	/^#define	CONFIG_CPU_PXA27X	/;"	d
CONFIG_CPU_PXA27X	include/configs/zipitz2.h	/^#define	CONFIG_CPU_PXA27X	/;"	d
CONFIG_CPU_PXA_MODULE	arch/arm/Kconfig	/^config CPU_PXA$/;"	c	menu:ARM architecture
CONFIG_CPU_SA1100	arch/arm/Kconfig	/^config CPU_SA1100$/;"	c	menu:ARM architecture
CONFIG_CPU_SA1100_MODULE	arch/arm/Kconfig	/^config CPU_SA1100$/;"	c	menu:ARM architecture
CONFIG_CPU_SH2	arch/sh/Kconfig	/^config CPU_SH2$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH2A	arch/sh/Kconfig	/^config CPU_SH2A$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH2A_MODULE	arch/sh/Kconfig	/^config CPU_SH2A$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH2_MODULE	arch/sh/Kconfig	/^config CPU_SH2$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH3	arch/sh/Kconfig	/^config CPU_SH3$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH3_MODULE	arch/sh/Kconfig	/^config CPU_SH3$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH4	arch/sh/Kconfig	/^config CPU_SH4$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH4A	arch/sh/Kconfig	/^config CPU_SH4A$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH4A_MODULE	arch/sh/Kconfig	/^config CPU_SH4A$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH4_MODULE	arch/sh/Kconfig	/^config CPU_SH4$/;"	c	menu:SuperH architecture
CONFIG_CPU_SH7203	include/configs/rsk7203.h	/^#define CONFIG_CPU_SH7203	/;"	d
CONFIG_CPU_SH7264	include/configs/rsk7264.h	/^#define CONFIG_CPU_SH7264	/;"	d
CONFIG_CPU_SH7269	include/configs/rsk7269.h	/^#define CONFIG_CPU_SH7269	/;"	d
CONFIG_CPU_SH7706	include/configs/shmin.h	/^#define CONFIG_CPU_SH7706	/;"	d
CONFIG_CPU_SH7720	include/configs/mpr2.h	/^#define CONFIG_CPU_SH7720	/;"	d
CONFIG_CPU_SH7720	include/configs/ms7720se.h	/^#define CONFIG_CPU_SH7720	/;"	d
CONFIG_CPU_SH7722	include/configs/MigoR.h	/^#define CONFIG_CPU_SH7722	/;"	d
CONFIG_CPU_SH7722	include/configs/ms7722se.h	/^#define CONFIG_CPU_SH7722	/;"	d
CONFIG_CPU_SH7723	include/configs/ap325rxa.h	/^#define CONFIG_CPU_SH7723	/;"	d
CONFIG_CPU_SH7724	include/configs/ecovec.h	/^#define CONFIG_CPU_SH7724	/;"	d
CONFIG_CPU_SH7734	include/configs/ap_sh4a_4a.h	/^#define CONFIG_CPU_SH7734	/;"	d
CONFIG_CPU_SH7734	include/configs/r0p7734.h	/^#define CONFIG_CPU_SH7734	/;"	d
CONFIG_CPU_SH7750	include/configs/ms7750se.h	/^#define CONFIG_CPU_SH7750	/;"	d
CONFIG_CPU_SH7751	include/configs/r2dplus.h	/^#define CONFIG_CPU_SH7751	/;"	d
CONFIG_CPU_SH7752	include/configs/sh7752evb.h	/^#define CONFIG_CPU_SH7752	/;"	d
CONFIG_CPU_SH7753	include/configs/sh7753evb.h	/^#define CONFIG_CPU_SH7753	/;"	d
CONFIG_CPU_SH7757	include/configs/sh7757lcr.h	/^#define CONFIG_CPU_SH7757	/;"	d
CONFIG_CPU_SH7763	include/configs/espt.h	/^#define CONFIG_CPU_SH7763	/;"	d
CONFIG_CPU_SH7763	include/configs/sh7763rdp.h	/^#define CONFIG_CPU_SH7763	/;"	d
CONFIG_CPU_SH7780	include/configs/r7780mp.h	/^#define CONFIG_CPU_SH7780	/;"	d
CONFIG_CPU_SH7785	include/configs/sh7785lcr.h	/^#define CONFIG_CPU_SH7785	/;"	d
CONFIG_CPU_SH_TYPE_R	include/configs/r2dplus.h	/^#define CONFIG_CPU_SH_TYPE_R	/;"	d
CONFIG_CPU_SPECIFIC_OPTIONS	arch/x86/cpu/broadwell/Kconfig	/^config CPU_SPECIFIC_OPTIONS$/;"	c
CONFIG_CPU_SPECIFIC_OPTIONS	arch/x86/cpu/ivybridge/Kconfig	/^config CPU_SPECIFIC_OPTIONS$/;"	c
CONFIG_CPU_SPECIFIC_OPTIONS_MODULE	arch/x86/cpu/broadwell/Kconfig	/^config CPU_SPECIFIC_OPTIONS$/;"	c
CONFIG_CPU_SPECIFIC_OPTIONS_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config CPU_SPECIFIC_OPTIONS$/;"	c
CONFIG_CPU_V7	arch/arm/Kconfig	/^config CPU_V7$/;"	c	menu:ARM architecture
CONFIG_CPU_V7	arch/arm/Makefile	/^CONFIG_CPU_V7=$/;"	m
CONFIG_CPU_V7	include/config/auto.conf	/^CONFIG_CPU_V7=y$/;"	k
CONFIG_CPU_V7	include/generated/autoconf.h	/^#define CONFIG_CPU_V7 /;"	d
CONFIG_CPU_V7M	arch/arm/Kconfig	/^config CPU_V7M$/;"	c	menu:ARM architecture
CONFIG_CPU_V7M_MODULE	arch/arm/Kconfig	/^config CPU_V7M$/;"	c	menu:ARM architecture
CONFIG_CPU_V7_HAS_NONSEC	arch/arm/cpu/armv7/Kconfig	/^config CPU_V7_HAS_NONSEC$/;"	c
CONFIG_CPU_V7_HAS_NONSEC	include/config/auto.conf	/^CONFIG_CPU_V7_HAS_NONSEC=y$/;"	k
CONFIG_CPU_V7_HAS_NONSEC	include/generated/autoconf.h	/^#define CONFIG_CPU_V7_HAS_NONSEC /;"	d
CONFIG_CPU_V7_HAS_NONSEC_MODULE	arch/arm/cpu/armv7/Kconfig	/^config CPU_V7_HAS_NONSEC$/;"	c
CONFIG_CPU_V7_HAS_VIRT	arch/arm/cpu/armv7/Kconfig	/^config CPU_V7_HAS_VIRT$/;"	c
CONFIG_CPU_V7_HAS_VIRT	include/config/auto.conf	/^CONFIG_CPU_V7_HAS_VIRT=y$/;"	k
CONFIG_CPU_V7_HAS_VIRT	include/generated/autoconf.h	/^#define CONFIG_CPU_V7_HAS_VIRT /;"	d
CONFIG_CPU_V7_HAS_VIRT_MODULE	arch/arm/cpu/armv7/Kconfig	/^config CPU_V7_HAS_VIRT$/;"	c
CONFIG_CPU_V7_MODULE	arch/arm/Kconfig	/^config CPU_V7$/;"	c	menu:ARM architecture
CONFIG_CP_CLK_FREQ	include/configs/salvator-x.h	/^#define CONFIG_CP_CLK_FREQ	/;"	d
CONFIG_CQSPI_DECODER	include/configs/k2g_evm.h	/^#define CONFIG_CQSPI_DECODER /;"	d
CONFIG_CQSPI_DECODER	include/configs/socfpga_common.h	/^#define CONFIG_CQSPI_DECODER	/;"	d
CONFIG_CQSPI_DECODER	include/configs/stv0991.h	/^#define CONFIG_CQSPI_DECODER	/;"	d
CONFIG_CQSPI_REF_CLK	include/configs/k2g_evm.h	/^#define CONFIG_CQSPI_REF_CLK /;"	d
CONFIG_CQSPI_REF_CLK	include/configs/socfpga_common.h	/^#define CONFIG_CQSPI_REF_CLK	/;"	d
CONFIG_CQSPI_REF_CLK	include/configs/stv0991.h	/^#define CONFIG_CQSPI_REF_CLK	/;"	d
CONFIG_CRC32	include/image.h	/^#  define CONFIG_CRC32	/;"	d
CONFIG_CRC32_VERIFY	include/configs/bcm23550_w1d.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/bcm28155_ap.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/bcm_ep_board.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/calimain.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/da850evm.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/ea20.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/ipam390.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/legoev3.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/omapl138_lcdk.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/socfpga_common.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/tegra-common.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CRC32_VERIFY	include/configs/xtfpga.h	/^#define CONFIG_CRC32_VERIFY$/;"	d
CONFIG_CREATE_ARCH_SYMLINK	arch/Kconfig	/^config CREATE_ARCH_SYMLINK$/;"	c
CONFIG_CREATE_ARCH_SYMLINK	include/config/auto.conf	/^CONFIG_CREATE_ARCH_SYMLINK=y$/;"	k
CONFIG_CREATE_ARCH_SYMLINK	include/generated/autoconf.h	/^#define CONFIG_CREATE_ARCH_SYMLINK /;"	d
CONFIG_CREATE_ARCH_SYMLINK_MODULE	arch/Kconfig	/^config CREATE_ARCH_SYMLINK$/;"	c
CONFIG_CROS_EC	drivers/misc/Kconfig	/^config CROS_EC$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_I2C	drivers/misc/Kconfig	/^config CROS_EC_I2C$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_I2C_MODULE	drivers/misc/Kconfig	/^config CROS_EC_I2C$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_KEYB	drivers/input/Kconfig	/^config CROS_EC_KEYB$/;"	c
CONFIG_CROS_EC_KEYB_MODULE	drivers/input/Kconfig	/^config CROS_EC_KEYB$/;"	c
CONFIG_CROS_EC_LPC	drivers/misc/Kconfig	/^config CROS_EC_LPC$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_LPC_MODULE	drivers/misc/Kconfig	/^config CROS_EC_LPC$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_MODULE	drivers/misc/Kconfig	/^config CROS_EC$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_SANDBOX	drivers/misc/Kconfig	/^config CROS_EC_SANDBOX$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_SANDBOX_MODULE	drivers/misc/Kconfig	/^config CROS_EC_SANDBOX$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_SPI	drivers/misc/Kconfig	/^config CROS_EC_SPI$/;"	c	menu:Multifunction device drivers
CONFIG_CROS_EC_SPI_MODULE	drivers/misc/Kconfig	/^config CROS_EC_SPI$/;"	c	menu:Multifunction device drivers
CONFIG_CS8900	include/configs/VCMA9.h	/^#define CONFIG_CS8900	/;"	d
CONFIG_CS8900	include/configs/mx31ads.h	/^#define CONFIG_CS8900$/;"	d
CONFIG_CS8900	include/configs/smdk2410.h	/^#define CONFIG_CS8900	/;"	d
CONFIG_CS8900_BASE	include/configs/VCMA9.h	/^#define CONFIG_CS8900_BASE	/;"	d
CONFIG_CS8900_BASE	include/configs/mx31ads.h	/^#define CONFIG_CS8900_BASE	/;"	d
CONFIG_CS8900_BASE	include/configs/smdk2410.h	/^#define CONFIG_CS8900_BASE	/;"	d
CONFIG_CS8900_BUS16	include/configs/VCMA9.h	/^#define CONFIG_CS8900_BUS16$/;"	d
CONFIG_CS8900_BUS16	include/configs/mx31ads.h	/^#define CONFIG_CS8900_BUS16	/;"	d
CONFIG_CS8900_BUS16	include/configs/smdk2410.h	/^#define CONFIG_CS8900_BUS16	/;"	d
CONFIG_CSF_SIZE	include/configs/mx6_common.h	/^#define CONFIG_CSF_SIZE	/;"	d
CONFIG_CSF_SIZE	include/configs/mx6ullevk.h	/^#define CONFIG_CSF_SIZE /;"	d
CONFIG_CSF_SIZE	include/configs/mx7_common.h	/^#define CONFIG_CSF_SIZE	/;"	d
CONFIG_CTL_JTAG	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CONFIG_CTL_JTAG	/;"	d
CONFIG_CTL_TBE	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CONFIG_CTL_TBE	/;"	d
CONFIG_CTRD1_PROBE_T1	drivers/block/ftide020.h	/^#define CONFIG_CTRD1_PROBE_T1	/;"	d
CONFIG_CTRD1_PROBE_T2	drivers/block/ftide020.h	/^#define CONFIG_CTRD1_PROBE_T2	/;"	d
CONFIG_CYRUS	include/configs/cyrus.h	/^#define CONFIG_CYRUS$/;"	d
CONFIG_C_SAMPLE	board/bosch/shc/Kconfig	/^config C_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_C_SAMPLE_MODULE	board/bosch/shc/Kconfig	/^config C_SAMPLE$/;"	c	choice:choice6f6e98480204
CONFIG_DA850_EVM_MAX_CPU_CLK	board/Barix/ipam390/ipam390.c	/^#define CONFIG_DA850_EVM_MAX_CPU_CLK	/;"	d	file:
CONFIG_DA850_EVM_MAX_CPU_CLK	board/davinci/da8xxevm/da850evm.c	/^#define CONFIG_DA850_EVM_MAX_CPU_CLK	/;"	d	file:
CONFIG_DA850_EVM_MAX_CPU_CLK	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define CONFIG_DA850_EVM_MAX_CPU_CLK	/;"	d	file:
CONFIG_DA850_LOWLEVEL	include/configs/calimain.h	/^#define CONFIG_DA850_LOWLEVEL$/;"	d
CONFIG_DA850_LOWLEVEL	include/configs/da850evm.h	/^#define CONFIG_DA850_LOWLEVEL$/;"	d
CONFIG_DA8XX_GPIO	include/configs/calimain.h	/^#define CONFIG_DA8XX_GPIO$/;"	d
CONFIG_DA8XX_GPIO	include/configs/da850evm.h	/^#define CONFIG_DA8XX_GPIO$/;"	d
CONFIG_DA8XX_GPIO	include/configs/ea20.h	/^#define CONFIG_DA8XX_GPIO$/;"	d
CONFIG_DA8XX_GPIO	include/configs/ipam390.h	/^#define CONFIG_DA8XX_GPIO$/;"	d
CONFIG_DATA	drivers/net/bfin_mac.h	/^		u16 CONFIG_DATA;$/;"	m	union:dma_descriptor::__anon82b289ee010a	typeref:typename:u16
CONFIG_DAVINCI_MMC	include/configs/da850evm.h	/^#define CONFIG_DAVINCI_MMC$/;"	d
CONFIG_DAVINCI_MMC	include/configs/legoev3.h	/^#define CONFIG_DAVINCI_MMC$/;"	d
CONFIG_DAVINCI_MMC	include/configs/omapl138_lcdk.h	/^#define CONFIG_DAVINCI_MMC$/;"	d
CONFIG_DAVINCI_MMC_SD1	include/configs/da850evm.h	/^#define CONFIG_DAVINCI_MMC_SD1$/;"	d
CONFIG_DAVINCI_MMC_SD1	include/configs/legoev3.h	/^#define CONFIG_DAVINCI_MMC_SD1$/;"	d
CONFIG_DAVINCI_SPI	include/configs/da850evm.h	/^#define CONFIG_DAVINCI_SPI$/;"	d
CONFIG_DAVINCI_SPI	include/configs/ea20.h	/^#define CONFIG_DAVINCI_SPI$/;"	d
CONFIG_DAVINCI_SPI	include/configs/legoev3.h	/^#define CONFIG_DAVINCI_SPI$/;"	d
CONFIG_DAVINCI_SPI	include/configs/omapl138_lcdk.h	/^#define CONFIG_DAVINCI_SPI$/;"	d
CONFIG_DAVINCI_SPI	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_DAVINCI_SPI$/;"	d
CONFIG_DBAU1100	board/dbau1x00/Kconfig	/^config DBAU1100$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
CONFIG_DBAU1100_MODULE	board/dbau1x00/Kconfig	/^config DBAU1100$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
CONFIG_DBAU1500	board/dbau1x00/Kconfig	/^config DBAU1500$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
CONFIG_DBAU1500_MODULE	board/dbau1x00/Kconfig	/^config DBAU1500$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
CONFIG_DBAU1550	board/dbau1x00/Kconfig	/^config DBAU1550$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
CONFIG_DBAU1550_MODULE	board/dbau1x00/Kconfig	/^config DBAU1550$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
CONFIG_DBAU1X00	include/configs/dbau1x00.h	/^#define CONFIG_DBAU1X00	/;"	d
CONFIG_DBG_MONITOR	include/configs/mx7dsabresd.h	/^#define CONFIG_DBG_MONITOR$/;"	d
CONFIG_DB_784MP_GP	include/configs/db-mv784mp-gp.h	/^#define CONFIG_DB_784MP_GP	/;"	d
CONFIG_DCACHE	include/configs/microblaze-generic.h	/^# define CONFIG_DCACHE$/;"	d
CONFIG_DCACHE_OFF	include/configs/bf506f-ezkit.h	/^#define CONFIG_DCACHE_OFF$/;"	d
CONFIG_DCACHE_RAM_BASE	arch/x86/Kconfig	/^config DCACHE_RAM_BASE$/;"	c	menu:x86 architecture
CONFIG_DCACHE_RAM_BASE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_BASE$/;"	c
CONFIG_DCACHE_RAM_BASE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_BASE$/;"	c
CONFIG_DCACHE_RAM_BASE_MODULE	arch/x86/Kconfig	/^config DCACHE_RAM_BASE$/;"	c	menu:x86 architecture
CONFIG_DCACHE_RAM_BASE_MODULE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_BASE$/;"	c
CONFIG_DCACHE_RAM_BASE_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_BASE$/;"	c
CONFIG_DCACHE_RAM_MRC_VAR_SIZE	arch/x86/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c	menu:x86 architecture
CONFIG_DCACHE_RAM_MRC_VAR_SIZE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c
CONFIG_DCACHE_RAM_MRC_VAR_SIZE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c
CONFIG_DCACHE_RAM_MRC_VAR_SIZE_MODULE	arch/x86/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c	menu:x86 architecture
CONFIG_DCACHE_RAM_MRC_VAR_SIZE_MODULE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c
CONFIG_DCACHE_RAM_MRC_VAR_SIZE_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c
CONFIG_DCACHE_RAM_SIZE	arch/x86/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c	menu:x86 architecture
CONFIG_DCACHE_RAM_SIZE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c
CONFIG_DCACHE_RAM_SIZE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c
CONFIG_DCACHE_RAM_SIZE_MODULE	arch/x86/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c	menu:x86 architecture
CONFIG_DCACHE_RAM_SIZE_MODULE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c
CONFIG_DCACHE_RAM_SIZE_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c
CONFIG_DCFG_ADDR	board/freescale/common/fsl_chain_of_trust.c	/^#define CONFIG_DCFG_ADDR	/;"	d	file:
CONFIG_DCLK_DIV	include/configs/bf609-ezkit.h	/^#define CONFIG_DCLK_DIV	/;"	d
CONFIG_DDR_2HCLK	include/configs/x600.h	/^#define CONFIG_DDR_2HCLK	/;"	d
CONFIG_DDR_2T_TIMING	include/configs/sbc8349.h	/^#define CONFIG_DDR_2T_TIMING$/;"	d
CONFIG_DDR_2T_TIMING	include/configs/vme8349.h	/^#define CONFIG_DDR_2T_TIMING$/;"	d
CONFIG_DDR_32BIT	include/configs/ds414.h	/^#define CONFIG_DDR_32BIT$/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/B4860QDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/BSC9131RDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/BSC9132QDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/C29XPCIE.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/MPC8536DS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/MPC8569MDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/MPC8572DS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/P1010RDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/P1022DS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/P1023RDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T102xQDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T102xRDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T1040QDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T104xRDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T208xQDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T208xRDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T4240QDS.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/T4240RDB.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/UCP1020.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/controlcenterd.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1012a_common.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1021aqds.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1021atwr.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1043aqds.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1043ardb.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1046aqds.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls1046ardb.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls2080a_emu.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls2080a_simu.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls2080aqds.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/ls2080ardb.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/p1_twr.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/xpedite537x.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_CLK_FREQ	include/configs/xpedite550x.h	/^#define CONFIG_DDR_CLK_FREQ	/;"	d
CONFIG_DDR_DATA_EYE	include/configs/PMC440.h	/^#define CONFIG_DDR_DATA_EYE	/;"	d
CONFIG_DDR_DATA_EYE	include/configs/lwmon5.h	/^#define CONFIG_DDR_DATA_EYE	/;"	d
CONFIG_DDR_DATA_EYE	include/configs/sequoia.h	/^#define CONFIG_DDR_DATA_EYE	/;"	d
CONFIG_DDR_DEFAULT_CL	include/configs/socrates.h	/^#define CONFIG_DDR_DEFAULT_CL	/;"	d
CONFIG_DDR_ECC	include/configs/B4860QDS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/C29XPCIE.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/MPC8349EMDS.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/MPC8548CDS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/MPC8572DS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T102xQDS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T102xRDB.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T1040QDS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T104xRDB.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T208xQDS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T208xRDB.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T4240QDS.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/T4240RDB.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/canyonlands.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/corenet_ds.h	/^#define	CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/cyrus.h	/^#define	CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/icon.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/katmai.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/ls1021aqds.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/ls1043aqds.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/ls1046aqds.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/ls1046ardb.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/ls2080aqds.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/ls2080ardb.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/luan.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/lwmon5.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/redwood.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/t3corp.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/vme8349.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC	include/configs/xpedite517x.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/xpedite520x.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/xpedite537x.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/xpedite550x.h	/^#define CONFIG_DDR_ECC$/;"	d
CONFIG_DDR_ECC	include/configs/yucca.h	/^#define CONFIG_DDR_ECC	/;"	d
CONFIG_DDR_ECC_CMD	include/configs/MPC8349EMDS.h	/^#define CONFIG_DDR_ECC_CMD	/;"	d
CONFIG_DDR_ECC_CMD	include/configs/vme8349.h	/^#define CONFIG_DDR_ECC_CMD	/;"	d
CONFIG_DDR_ECC_ENABLE	include/configs/UCP1020.h	/^#define CONFIG_DDR_ECC_ENABLE$/;"	d
CONFIG_DDR_FIXED_SIZE	include/configs/maxbcm.h	/^#define CONFIG_DDR_FIXED_SIZE	/;"	d
CONFIG_DDR_FIXED_SIZE	include/configs/theadorable.h	/^#define CONFIG_DDR_FIXED_SIZE	/;"	d
CONFIG_DDR_HCLK	include/configs/x600.h	/^#define CONFIG_DDR_HCLK	/;"	d
CONFIG_DDR_II	include/configs/km/km83xx-common.h	/^#define CONFIG_DDR_II$/;"	d
CONFIG_DDR_K4H511638C	include/configs/inka4x0.h	/^#define CONFIG_DDR_K4H511638C$/;"	d
CONFIG_DDR_MT47H128M8	include/configs/x600.h	/^#define CONFIG_DDR_MT47H128M8	/;"	d
CONFIG_DDR_MT47H32M16	include/configs/x600.h	/^#define CONFIG_DDR_MT47H32M16	/;"	d
CONFIG_DDR_MT47H64M16	include/configs/x600.h	/^#define CONFIG_DDR_MT47H64M16	/;"	d
CONFIG_DDR_PLL2	include/configs/x600.h	/^#define CONFIG_DDR_PLL2	/;"	d
CONFIG_DDR_RFDC_FIXED	include/configs/t3corp.h	/^#define CONFIG_DDR_RFDC_FIXED	/;"	d
CONFIG_DDR_RQDC_FIXED	include/configs/canyonlands.h	/^#define CONFIG_DDR_RQDC_FIXED	/;"	d
CONFIG_DDR_RQDC_FIXED	include/configs/icon.h	/^#define CONFIG_DDR_RQDC_FIXED	/;"	d
CONFIG_DDR_RQDC_FIXED	include/configs/katmai.h	/^#define CONFIG_DDR_RQDC_FIXED	/;"	d
CONFIG_DDR_SPD	include/configs/B4860QDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/C29XPCIE.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8536DS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8540ADS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8541CDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8544DS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8548CDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8555CDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8560ADS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8568MDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8569MDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8572DS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8610HPCD.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/MPC8641HPCN.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/P1010RDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/P1022DS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/P1023RDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/P2041RDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T102xQDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T102xRDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T1040QDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T104xRDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T208xQDS.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T208xRDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/T4240RDB.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/UCP1020.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/corenet_ds.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/cyrus.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/k2e_evm.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/k2hk_evm.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/km/kmp204x-common.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls1021aqds.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls1043aqds.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls1046aqds.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls1046ardb.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls2080a_emu.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls2080aqds.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/ls2080ardb.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/socrates.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/t4qds.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/xpedite517x.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/xpedite520x.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/xpedite537x.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DDR_SPD	include/configs/xpedite550x.h	/^#define CONFIG_DDR_SPD$/;"	d
CONFIG_DEBUG_DEVRES	drivers/core/Kconfig	/^config DEBUG_DEVRES$/;"	c	menu:Generic Driver Options
CONFIG_DEBUG_DEVRES_MODULE	drivers/core/Kconfig	/^config DEBUG_DEVRES$/;"	c	menu:Generic Driver Options
CONFIG_DEBUG_DUMP	include/configs/bfin_adi_common.h	/^#define CONFIG_DEBUG_DUMP	/;"	d
CONFIG_DEBUG_EFI_CONSOLE	drivers/serial/Kconfig	/^config DEBUG_EFI_CONSOLE$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_EFI_CONSOLE_MODULE	drivers/serial/Kconfig	/^config DEBUG_EFI_CONSOLE$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_LED	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_DEBUG_LED	/;"	d
CONFIG_DEBUG_LED	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_DEBUG_LED	/;"	d
CONFIG_DEBUG_LL	arch/arm/Kconfig.debug	/^config DEBUG_LL$/;"	c	menu:ARM debug
CONFIG_DEBUG_LL_INCLUDE	arch/arm/Kconfig.debug	/^config DEBUG_LL_INCLUDE$/;"	c	menu:ARM debug
CONFIG_DEBUG_LL_INCLUDE_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_LL_INCLUDE$/;"	c	menu:ARM debug
CONFIG_DEBUG_LL_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_LL$/;"	c	menu:ARM debug
CONFIG_DEBUG_LL_UART_8250	arch/arm/Kconfig.debug	/^	config DEBUG_LL_UART_8250$/;"	c	choice:ARM debug""choice510de4770104
CONFIG_DEBUG_LL_UART_8250_MODULE	arch/arm/Kconfig.debug	/^	config DEBUG_LL_UART_8250$/;"	c	choice:ARM debug""choice510de4770104
CONFIG_DEBUG_MVEBU_A3700_UART	drivers/serial/Kconfig	/^config DEBUG_MVEBU_A3700_UART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_MVEBU_A3700_UART_MODULE	drivers/serial/Kconfig	/^config DEBUG_MVEBU_A3700_UART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART	drivers/serial/Kconfig	/^config DEBUG_UART$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_8250	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_FLOW_CONTROL	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_FLOW_CONTROL$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_FLOW_CONTROL_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_FLOW_CONTROL$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_SHIFT	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_SHIFT$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_SHIFT_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_SHIFT$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_WORD	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_WORD$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_8250_WORD_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_WORD$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_ALTERA_JTAGUART	drivers/serial/Kconfig	/^config DEBUG_UART_ALTERA_JTAGUART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ALTERA_JTAGUART_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_ALTERA_JTAGUART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ALTERA_UART	drivers/serial/Kconfig	/^config DEBUG_UART_ALTERA_UART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ALTERA_UART_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_ALTERA_UART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ANNOUNCE	drivers/serial/Kconfig	/^config DEBUG_UART_ANNOUNCE$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_ANNOUNCE_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_ANNOUNCE$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_APBUART	drivers/serial/Kconfig	/^config DEBUG_UART_APBUART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_APBUART_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_APBUART$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_AR933X	drivers/serial/Kconfig	/^config DEBUG_UART_AR933X$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_AR933X_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_AR933X$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ARM_DCC	drivers/serial/Kconfig	/^config DEBUG_UART_ARM_DCC$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ARM_DCC_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_ARM_DCC$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ATMEL	drivers/serial/Kconfig	/^config DEBUG_UART_ATMEL$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ATMEL_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_ATMEL$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_BASE	drivers/serial/Kconfig	/^config DEBUG_UART_BASE$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_BASE	include/configs/s32v234evb.h	/^#define CONFIG_DEBUG_UART_BASE	/;"	d
CONFIG_DEBUG_UART_BASE_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_BASE$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_BOARD_INIT	drivers/serial/Kconfig	/^config DEBUG_UART_BOARD_INIT$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_BOARD_INIT_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_BOARD_INIT$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_CLOCK	drivers/serial/Kconfig	/^config DEBUG_UART_CLOCK$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_CLOCK_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_CLOCK$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_LINFLEXUART	include/configs/s32v234evb.h	/^#define CONFIG_DEBUG_UART_LINFLEXUART$/;"	d
CONFIG_DEBUG_UART_MESON	drivers/serial/Kconfig	/^config DEBUG_UART_MESON$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_MESON_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_MESON$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_NS16550	drivers/serial/Kconfig	/^config DEBUG_UART_NS16550$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_NS16550_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_NS16550$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_PHYS	arch/arm/Kconfig.debug	/^config DEBUG_UART_PHYS$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_PHYS_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_UART_PHYS$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_PIC32	drivers/serial/Kconfig	/^config DEBUG_UART_PIC32$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_PIC32_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_PIC32$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_PL010	drivers/serial/Kconfig	/^config DEBUG_UART_PL010$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_PL010_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_PL010$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_PL011	drivers/serial/Kconfig	/^config DEBUG_UART_PL011$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_PL011_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_PL011$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_S5P	drivers/serial/Kconfig	/^config DEBUG_UART_S5P$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_S5P_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_S5P$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_SHIFT	drivers/serial/Kconfig	/^config DEBUG_UART_SHIFT$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_SHIFT_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_SHIFT$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_SKIP_INIT	drivers/serial/Kconfig	/^config DEBUG_UART_SKIP_INIT$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_SKIP_INIT_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_SKIP_INIT$/;"	c	menu:Serial drivers
CONFIG_DEBUG_UART_UARTLITE	drivers/serial/Kconfig	/^config DEBUG_UART_UARTLITE$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_UARTLITE_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_UARTLITE$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_UNIPHIER	drivers/serial/Kconfig	/^config DEBUG_UART_UNIPHIER$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_UNIPHIER_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_UNIPHIER$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_VIRT	arch/arm/Kconfig.debug	/^config DEBUG_UART_VIRT$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_VIRT_MODULE	arch/arm/Kconfig.debug	/^config DEBUG_UART_VIRT$/;"	c	menu:ARM debug
CONFIG_DEBUG_UART_ZYNQ	drivers/serial/Kconfig	/^config DEBUG_UART_ZYNQ$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEBUG_UART_ZYNQ_MODULE	drivers/serial/Kconfig	/^config DEBUG_UART_ZYNQ$/;"	c	choice:Serial drivers""choice334d94630104
CONFIG_DEB_DMA_URGENT	include/configs/bf548-ezkit.h	/^#define CONFIG_DEB_DMA_URGENT$/;"	d
CONFIG_DEB_DMA_URGENT	include/configs/cm-bf548.h	/^# define CONFIG_DEB_DMA_URGENT$/;"	d
CONFIG_DEEP_SLEEP	include/configs/T102xQDS.h	/^#define CONFIG_DEEP_SLEEP$/;"	d
CONFIG_DEEP_SLEEP	include/configs/T102xRDB.h	/^#define CONFIG_DEEP_SLEEP$/;"	d
CONFIG_DEEP_SLEEP	include/configs/T1040QDS.h	/^#define CONFIG_DEEP_SLEEP$/;"	d
CONFIG_DEEP_SLEEP	include/configs/T104xRDB.h	/^#define CONFIG_DEEP_SLEEP$/;"	d
CONFIG_DEEP_SLEEP	include/configs/ls1021aqds.h	/^#define CONFIG_DEEP_SLEEP$/;"	d
CONFIG_DEEP_SLEEP	include/configs/ls1021atwr.h	/^#define CONFIG_DEEP_SLEEP$/;"	d
CONFIG_DEFAULT	drivers/net/smc91111.h	/^#define CONFIG_DEFAULT	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/arndale.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/espresso7420.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/odroid.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/odroid_xu3.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/origen.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/peach-pi.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/peach-pit.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/s5p_goni.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/s5pc210_universal.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/smdk5250.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/smdk5420.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/smdkv310.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/snow.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/spring.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/trats.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_CONSOLE	include/configs/trats2.h	/^#define CONFIG_DEFAULT_CONSOLE	/;"	d
CONFIG_DEFAULT_DEVICE_TREE	board/coreboot/coreboot/Kconfig	/^config DEFAULT_DEVICE_TREE$/;"	c
CONFIG_DEFAULT_DEVICE_TREE	dts/Kconfig	/^config DEFAULT_DEVICE_TREE$/;"	c	menu:Device Tree Control
CONFIG_DEFAULT_DEVICE_TREE	include/config/auto.conf	/^CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one"$/;"	k
CONFIG_DEFAULT_DEVICE_TREE	include/generated/autoconf.h	/^#define CONFIG_DEFAULT_DEVICE_TREE /;"	d
CONFIG_DEFAULT_DEVICE_TREE_MODULE	board/coreboot/coreboot/Kconfig	/^config DEFAULT_DEVICE_TREE$/;"	c
CONFIG_DEFAULT_DEVICE_TREE_MODULE	dts/Kconfig	/^config DEFAULT_DEVICE_TREE$/;"	c	menu:Device Tree Control
CONFIG_DEFAULT_FDT_FILE	common/Kconfig	/^config DEFAULT_FDT_FILE$/;"	c
CONFIG_DEFAULT_FDT_FILE	include/config/auto.conf	/^CONFIG_DEFAULT_FDT_FILE=""$/;"	k
CONFIG_DEFAULT_FDT_FILE	include/generated/autoconf.h	/^#define CONFIG_DEFAULT_FDT_FILE /;"	d
CONFIG_DEFAULT_FDT_FILE_MODULE	common/Kconfig	/^config DEFAULT_FDT_FILE$/;"	c
CONFIG_DEFAULT_IMMR	arch/powerpc/include/asm/immap_512x.h	/^#define CONFIG_DEFAULT_IMMR	/;"	d
CONFIG_DEFAULT_IMMR	include/configs/MPC8313ERDB.h	/^#define CONFIG_DEFAULT_IMMR	/;"	d
CONFIG_DEFAULT_IMMR	include/mpc83xx.h	/^#define CONFIG_DEFAULT_IMMR	/;"	d
CONFIG_DEFAULT_KERNEL_COMMAND_LINE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE /;"	d
CONFIG_DEFAULT_KERNEL_COMMAND_LINE	include/configs/gr_ep2s60.h	/^#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE /;"	d
CONFIG_DEFAULT_KERNEL_COMMAND_LINE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE /;"	d
CONFIG_DEFAULT_KERNEL_COMMAND_LINE	include/configs/grsim.h	/^#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE /;"	d
CONFIG_DEFAULT_KERNEL_COMMAND_LINE	include/configs/grsim_leon2.h	/^#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE /;"	d
CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC	arch/arm/include/asm/arch-omap5/clock.h	/^#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC	/;"	d
CONFIG_DEFAULT_SPI_BUS	cmd/spi.c	/^#   define CONFIG_DEFAULT_SPI_BUS	/;"	d	file:
CONFIG_DEFAULT_SPI_BUS	include/configs/bg0900.h	/^#define CONFIG_DEFAULT_SPI_BUS	/;"	d
CONFIG_DEFAULT_SPI_BUS	include/configs/ls1012aqds.h	/^#define CONFIG_DEFAULT_SPI_BUS /;"	d
CONFIG_DEFAULT_SPI_BUS	include/configs/m28evk.h	/^#define CONFIG_DEFAULT_SPI_BUS	/;"	d
CONFIG_DEFAULT_SPI_BUS	include/configs/mx28evk.h	/^#define CONFIG_DEFAULT_SPI_BUS	/;"	d
CONFIG_DEFAULT_SPI_BUS	include/configs/mx31ads.h	/^#define CONFIG_DEFAULT_SPI_BUS	/;"	d
CONFIG_DEFAULT_SPI_BUS	include/configs/mx31pdk.h	/^#define CONFIG_DEFAULT_SPI_BUS	/;"	d
CONFIG_DEFAULT_SPI_CS	include/configs/bg0900.h	/^#define CONFIG_DEFAULT_SPI_CS	/;"	d
CONFIG_DEFAULT_SPI_CS	include/configs/m28evk.h	/^#define CONFIG_DEFAULT_SPI_CS	/;"	d
CONFIG_DEFAULT_SPI_MODE	cmd/spi.c	/^#   define CONFIG_DEFAULT_SPI_MODE	/;"	d	file:
CONFIG_DEFAULT_SPI_MODE	include/configs/bg0900.h	/^#define CONFIG_DEFAULT_SPI_MODE	/;"	d
CONFIG_DEFAULT_SPI_MODE	include/configs/cm_t43.h	/^#define CONFIG_DEFAULT_SPI_MODE	/;"	d
CONFIG_DEFAULT_SPI_MODE	include/configs/m28evk.h	/^#define CONFIG_DEFAULT_SPI_MODE	/;"	d
CONFIG_DEFAULT_SPI_MODE	include/configs/mx28evk.h	/^#define CONFIG_DEFAULT_SPI_MODE	/;"	d
CONFIG_DEFAULT_SPI_MODE	include/configs/mx31ads.h	/^#define CONFIG_DEFAULT_SPI_MODE	/;"	d
CONFIG_DEFAULT_SPI_MODE	include/configs/mx31pdk.h	/^#define CONFIG_DEFAULT_SPI_MODE	/;"	d
CONFIG_DEF_HWCONFIG	include/configs/BSC9132QDS.h	/^#define CONFIG_DEF_HWCONFIG	/;"	d
CONFIG_DEF_HWCONFIG	include/configs/C29XPCIE.h	/^#define CONFIG_DEF_HWCONFIG	/;"	d
CONFIG_DESIGNWARE_ETH	include/configs/galileo.h	/^#define CONFIG_DESIGNWARE_ETH$/;"	d
CONFIG_DESIGNWARE_SPI	drivers/spi/Kconfig	/^config DESIGNWARE_SPI$/;"	c	menu:SPI Support
CONFIG_DESIGNWARE_SPI_MODULE	drivers/spi/Kconfig	/^config DESIGNWARE_SPI$/;"	c	menu:SPI Support
CONFIG_DESIGNWARE_WATCHDOG	include/configs/socfpga_common.h	/^#define CONFIG_DESIGNWARE_WATCHDOG$/;"	d
CONFIG_DEVICE_TREE_LIST	include/configs/exynos5420-common.h	/^#define CONFIG_DEVICE_TREE_LIST /;"	d
CONFIG_DEVICE_TREE_LIST	include/configs/exynos7420-common.h	/^#define CONFIG_DEVICE_TREE_LIST /;"	d
CONFIG_DEVRES	drivers/core/Kconfig	/^config DEVRES$/;"	c	menu:Generic Driver Options
CONFIG_DEVRES_MODULE	drivers/core/Kconfig	/^config DEVRES$/;"	c	menu:Generic Driver Options
CONFIG_DEV_USB_PHY_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_DEV_USB_PHY_BASE	/;"	d
CONFIG_DFU_ALT	include/configs/odroid.h	/^#define CONFIG_DFU_ALT /;"	d
CONFIG_DFU_ALT	include/configs/s5p_goni.h	/^#define CONFIG_DFU_ALT /;"	d
CONFIG_DFU_ALT	include/configs/trats.h	/^#define CONFIG_DFU_ALT /;"	d
CONFIG_DFU_ALT	include/configs/trats2.h	/^#define CONFIG_DFU_ALT /;"	d
CONFIG_DFU_ALT_BOOT_EMMC	include/configs/odroid.h	/^#define CONFIG_DFU_ALT_BOOT_EMMC /;"	d
CONFIG_DFU_ALT_BOOT_EMMC	include/configs/odroid_xu3.h	/^#define CONFIG_DFU_ALT_BOOT_EMMC /;"	d
CONFIG_DFU_ALT_BOOT_SD	include/configs/odroid.h	/^#define CONFIG_DFU_ALT_BOOT_SD /;"	d
CONFIG_DFU_ALT_BOOT_SD	include/configs/odroid_xu3.h	/^#define CONFIG_DFU_ALT_BOOT_SD /;"	d
CONFIG_DFU_ALT_SYSTEM	include/configs/odroid_xu3.h	/^#define CONFIG_DFU_ALT_SYSTEM /;"	d
CONFIG_DFU_ENV_SETTINGS	include/configs/mx7dsabresd.h	/^#define CONFIG_DFU_ENV_SETTINGS /;"	d
CONFIG_DFU_ENV_SETTINGS	include/configs/warp7.h	/^#define CONFIG_DFU_ENV_SETTINGS /;"	d
CONFIG_DFU_MMC	drivers/dfu/Kconfig	/^config DFU_MMC$/;"	c	menu:DFU support
CONFIG_DFU_MMC_MODULE	drivers/dfu/Kconfig	/^config DFU_MMC$/;"	c	menu:DFU support
CONFIG_DFU_MTD	include/configs/etamin.h	/^#define CONFIG_DFU_MTD$/;"	d
CONFIG_DFU_NAND	drivers/dfu/Kconfig	/^config DFU_NAND$/;"	c	menu:DFU support
CONFIG_DFU_NAND_MODULE	drivers/dfu/Kconfig	/^config DFU_NAND$/;"	c	menu:DFU support
CONFIG_DFU_RAM	drivers/dfu/Kconfig	/^config DFU_RAM$/;"	c	menu:DFU support
CONFIG_DFU_RAM_MODULE	drivers/dfu/Kconfig	/^config DFU_RAM$/;"	c	menu:DFU support
CONFIG_DFU_SF	drivers/dfu/Kconfig	/^config DFU_SF$/;"	c	menu:DFU support
CONFIG_DFU_SF_MODULE	drivers/dfu/Kconfig	/^config DFU_SF$/;"	c	menu:DFU support
CONFIG_DFU_TFTP	drivers/dfu/Kconfig	/^config DFU_TFTP$/;"	c	menu:DFU support
CONFIG_DFU_TFTP_MODULE	drivers/dfu/Kconfig	/^config DFU_TFTP$/;"	c	menu:DFU support
CONFIG_DHCP_MIN_EXT_LEN	net/bootp.c	/^#define CONFIG_DHCP_MIN_EXT_LEN /;"	d	file:
CONFIG_DIALOG_POWER	include/configs/mx53loco.h	/^#define CONFIG_DIALOG_POWER$/;"	d
CONFIG_DIGSY_MTC	include/configs/digsy_mtc.h	/^#define CONFIG_DIGSY_MTC	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/B4860QDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/BSC9131RDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/BSC9132QDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/C29XPCIE.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8349EMDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8536DS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8540ADS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8541CDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8544DS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8548CDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8555CDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8560ADS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8568MDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8569MDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8572DS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8610HPCD.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/MPC8641HPCN.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/P1010RDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/P1022DS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/P1023RDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/P2041RDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T102xQDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T102xRDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T1040QDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T104xRDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T208xQDS.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T208xRDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/T4240RDB.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/UCP1020.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/controlcenterd.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/corenet_ds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/cyrus.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/km/kmp204x-common.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1012afrdm.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1012aqds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1012ardb.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1021aqds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1043aqds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1043ardb.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1046aqds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls1046ardb.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls2080a_emu.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls2080a_simu.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls2080aqds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/ls2080ardb.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/p1_twr.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/sbc8548.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/sbc8641d.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/socrates.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/t4qds.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/xpedite517x.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/xpedite520x.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/xpedite537x.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIMM_SLOTS_PER_CTLR	include/configs/xpedite550x.h	/^#define CONFIG_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DIR	tools/genboardscfg.py	/^CONFIG_DIR = 'configs'$/;"	v
CONFIG_DISABLE_IGD	arch/x86/cpu/queensbay/Kconfig	/^config DISABLE_IGD$/;"	c
CONFIG_DISABLE_IGD_MODULE	arch/x86/cpu/queensbay/Kconfig	/^config DISABLE_IGD$/;"	c
CONFIG_DISCOVER_PHY	include/configs/m53evk.h	/^#define CONFIG_DISCOVER_PHY$/;"	d
CONFIG_DISCOVER_PHY	include/configs/woodburn_common.h	/^#define CONFIG_DISCOVER_PHY$/;"	d
CONFIG_DISPLAY	drivers/video/Kconfig	/^config DISPLAY$/;"	c	menu:Graphics support
CONFIG_DISPLAY	include/configs/zynq_zybo.h	/^#define CONFIG_DISPLAY$/;"	d
CONFIG_DISPLAY_BOARDINFO	common/Kconfig	/^config DISPLAY_BOARDINFO$/;"	c
CONFIG_DISPLAY_BOARDINFO	include/config/auto.conf	/^CONFIG_DISPLAY_BOARDINFO=y$/;"	k
CONFIG_DISPLAY_BOARDINFO	include/generated/autoconf.h	/^#define CONFIG_DISPLAY_BOARDINFO /;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/10m50_devboard.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/3c120_devboard.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/clearfog.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/colibri_imx7.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/db-88f6720.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/db-88f6820-amc.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/db-88f6820-gp.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/ds414.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/gw_ventana.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/ls1012a_common.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/maxbcm.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/nyan-big.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/pcm058.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/socfpga_common.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/theadorable.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/x86-common.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_LATE	include/configs/zynq-common.h	/^#define CONFIG_DISPLAY_BOARDINFO_LATE$/;"	d
CONFIG_DISPLAY_BOARDINFO_MODULE	common/Kconfig	/^config DISPLAY_BOARDINFO$/;"	c
CONFIG_DISPLAY_CPUINFO	common/Kconfig	/^config DISPLAY_CPUINFO$/;"	c
CONFIG_DISPLAY_CPUINFO	include/config/auto.conf	/^CONFIG_DISPLAY_CPUINFO=y$/;"	k
CONFIG_DISPLAY_CPUINFO	include/generated/autoconf.h	/^#define CONFIG_DISPLAY_CPUINFO /;"	d
CONFIG_DISPLAY_CPUINFO_MODULE	common/Kconfig	/^config DISPLAY_CPUINFO$/;"	c
CONFIG_DISPLAY_MODULE	drivers/video/Kconfig	/^config DISPLAY$/;"	c	menu:Graphics support
CONFIG_DISTRO_DEFAULTS	Kconfig	/^config DISTRO_DEFAULTS$/;"	c	menu:General setup
CONFIG_DISTRO_DEFAULTS	include/config/auto.conf	/^CONFIG_DISTRO_DEFAULTS=y$/;"	k
CONFIG_DISTRO_DEFAULTS	include/generated/autoconf.h	/^#define CONFIG_DISTRO_DEFAULTS /;"	d
CONFIG_DISTRO_DEFAULTS_MODULE	Kconfig	/^config DISTRO_DEFAULTS$/;"	c	menu:General setup
CONFIG_DLVISION	include/configs/dlvision.h	/^#define CONFIG_DLVISION	/;"	d
CONFIG_DLVISION_10G	include/configs/dlvision-10g.h	/^#define CONFIG_DLVISION_10G	/;"	d
CONFIG_DM	drivers/core/Kconfig	/^config DM$/;"	c	menu:Generic Driver Options
CONFIG_DM	include/config/auto.conf	/^CONFIG_DM=y$/;"	k
CONFIG_DM	include/configs/s32v234evb.h	/^#define CONFIG_DM$/;"	d
CONFIG_DM	include/generated/autoconf.h	/^#define CONFIG_DM /;"	d
CONFIG_DM9000_BASE	include/configs/M5253DEMO.h	/^#	define CONFIG_DM9000_BASE	/;"	d
CONFIG_DM9000_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_DM9000_BASE	/;"	d
CONFIG_DM9000_BASE	include/configs/colibri_pxa270.h	/^#define CONFIG_DM9000_BASE	/;"	d
CONFIG_DM9000_BASE	include/configs/devkit8000.h	/^#define	CONFIG_DM9000_BASE	/;"	d
CONFIG_DM9000_BASE	include/configs/ip04.h	/^#define CONFIG_DM9000_BASE	/;"	d
CONFIG_DM9000_BASE	include/configs/pm9261.h	/^#define CONFIG_DM9000_BASE	/;"	d
CONFIG_DM9000_BYTE_SWAPPED	include/configs/M5253DEMO.h	/^#	define CONFIG_DM9000_BYTE_SWAPPED$/;"	d
CONFIG_DM9000_NO_SROM	include/configs/at91sam9261ek.h	/^#define CONFIG_DM9000_NO_SROM$/;"	d
CONFIG_DM9000_NO_SROM	include/configs/devkit8000.h	/^#define CONFIG_DM9000_NO_SROM	/;"	d
CONFIG_DM9000_NO_SROM	include/configs/ip04.h	/^#define CONFIG_DM9000_NO_SROM$/;"	d
CONFIG_DM9000_USE_16BIT	include/configs/at91sam9261ek.h	/^#define CONFIG_DM9000_USE_16BIT$/;"	d
CONFIG_DM9000_USE_16BIT	include/configs/devkit8000.h	/^#define	CONFIG_DM9000_USE_16BIT	/;"	d
CONFIG_DM9000_USE_16BIT	include/configs/pm9261.h	/^#define CONFIG_DM9000_USE_16BIT	/;"	d
CONFIG_DMA	drivers/dma/Kconfig	/^config DMA$/;"	c	menu:DMA Support
CONFIG_DMA_ADDR_T_64BIT	arch/arm/Kconfig	/^config DMA_ADDR_T_64BIT$/;"	c	menu:ARM architecture
CONFIG_DMA_ADDR_T_64BIT_MODULE	arch/arm/Kconfig	/^config DMA_ADDR_T_64BIT$/;"	c	menu:ARM architecture
CONFIG_DMA_COHERENT	include/configs/siemens-am33x-common.h	/^#define CONFIG_DMA_COHERENT$/;"	d
CONFIG_DMA_COHERENT_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_DMA_COHERENT_SIZE	/;"	d
CONFIG_DMA_LPC32XX	include/configs/devkit3250.h	/^#define CONFIG_DMA_LPC32XX$/;"	d
CONFIG_DMA_MODULE	drivers/dma/Kconfig	/^config DMA$/;"	c	menu:DMA Support
CONFIG_DMA_REQ_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_DMA_REQ_BIT	/;"	d	file:
CONFIG_DM_74X164	drivers/gpio/Kconfig	/^config DM_74X164$/;"	c	menu:GPIO Support
CONFIG_DM_74X164_MODULE	drivers/gpio/Kconfig	/^config DM_74X164$/;"	c	menu:GPIO Support
CONFIG_DM_DEMO	drivers/demo/Kconfig	/^config DM_DEMO$/;"	c	menu:Demo for driver model
CONFIG_DM_DEMO_MODULE	drivers/demo/Kconfig	/^config DM_DEMO$/;"	c	menu:Demo for driver model
CONFIG_DM_DEMO_SHAPE	drivers/demo/Kconfig	/^config DM_DEMO_SHAPE$/;"	c	menu:Demo for driver model
CONFIG_DM_DEMO_SHAPE_MODULE	drivers/demo/Kconfig	/^config DM_DEMO_SHAPE$/;"	c	menu:Demo for driver model
CONFIG_DM_DEMO_SIMPLE	drivers/demo/Kconfig	/^config DM_DEMO_SIMPLE$/;"	c	menu:Demo for driver model
CONFIG_DM_DEMO_SIMPLE_MODULE	drivers/demo/Kconfig	/^config DM_DEMO_SIMPLE$/;"	c	menu:Demo for driver model
CONFIG_DM_DEVICE_REMOVE	drivers/core/Kconfig	/^config DM_DEVICE_REMOVE$/;"	c	menu:Generic Driver Options
CONFIG_DM_DEVICE_REMOVE	include/config/auto.conf	/^CONFIG_DM_DEVICE_REMOVE=y$/;"	k
CONFIG_DM_DEVICE_REMOVE	include/generated/autoconf.h	/^#define CONFIG_DM_DEVICE_REMOVE /;"	d
CONFIG_DM_DEVICE_REMOVE_MODULE	drivers/core/Kconfig	/^config DM_DEVICE_REMOVE$/;"	c	menu:Generic Driver Options
CONFIG_DM_ETH	drivers/net/Kconfig	/^config DM_ETH$/;"	c
CONFIG_DM_ETH	include/config/auto.conf	/^CONFIG_DM_ETH=y$/;"	k
CONFIG_DM_ETH	include/generated/autoconf.h	/^#define CONFIG_DM_ETH /;"	d
CONFIG_DM_ETH_MODULE	drivers/net/Kconfig	/^config DM_ETH$/;"	c
CONFIG_DM_GPIO	drivers/gpio/Kconfig	/^config DM_GPIO$/;"	c	menu:GPIO Support
CONFIG_DM_GPIO	include/config/auto.conf	/^CONFIG_DM_GPIO=y$/;"	k
CONFIG_DM_GPIO	include/configs/gw_ventana.h	/^#define CONFIG_DM_GPIO$/;"	d
CONFIG_DM_GPIO	include/generated/autoconf.h	/^#define CONFIG_DM_GPIO /;"	d
CONFIG_DM_GPIO_MODULE	drivers/gpio/Kconfig	/^config DM_GPIO$/;"	c	menu:GPIO Support
CONFIG_DM_I2C	drivers/i2c/Kconfig	/^config DM_I2C$/;"	c	menu:I2C support
CONFIG_DM_I2C_COMPAT	drivers/i2c/Kconfig	/^config DM_I2C_COMPAT$/;"	c	menu:I2C support
CONFIG_DM_I2C_COMPAT	include/configs/ti_armv7_common.h	/^#define CONFIG_DM_I2C_COMPAT$/;"	d
CONFIG_DM_I2C_COMPAT_MODULE	drivers/i2c/Kconfig	/^config DM_I2C_COMPAT$/;"	c	menu:I2C support
CONFIG_DM_I2C_GPIO	drivers/i2c/Kconfig	/^config DM_I2C_GPIO$/;"	c	menu:I2C support
CONFIG_DM_I2C_GPIO_MODULE	drivers/i2c/Kconfig	/^config DM_I2C_GPIO$/;"	c	menu:I2C support
CONFIG_DM_I2C_MODULE	drivers/i2c/Kconfig	/^config DM_I2C$/;"	c	menu:I2C support
CONFIG_DM_KEYBOARD	drivers/input/Kconfig	/^config DM_KEYBOARD$/;"	c
CONFIG_DM_KEYBOARD	include/config/auto.conf	/^CONFIG_DM_KEYBOARD=y$/;"	k
CONFIG_DM_KEYBOARD	include/generated/autoconf.h	/^#define CONFIG_DM_KEYBOARD /;"	d
CONFIG_DM_KEYBOARD_MODULE	drivers/input/Kconfig	/^config DM_KEYBOARD$/;"	c
CONFIG_DM_MAILBOX	drivers/mailbox/Kconfig	/^config DM_MAILBOX$/;"	c	menu:Mailbox Controller Support
CONFIG_DM_MAILBOX_MODULE	drivers/mailbox/Kconfig	/^config DM_MAILBOX$/;"	c	menu:Mailbox Controller Support
CONFIG_DM_MMC	drivers/mmc/Kconfig	/^config DM_MMC$/;"	c	menu:MMC Host controller Support
CONFIG_DM_MMC_MODULE	drivers/mmc/Kconfig	/^config DM_MMC$/;"	c	menu:MMC Host controller Support
CONFIG_DM_MMC_OPS	drivers/mmc/Kconfig	/^config DM_MMC_OPS$/;"	c	menu:MMC Host controller Support
CONFIG_DM_MMC_OPS_MODULE	drivers/mmc/Kconfig	/^config DM_MMC_OPS$/;"	c	menu:MMC Host controller Support
CONFIG_DM_MODULE	drivers/core/Kconfig	/^config DM$/;"	c	menu:Generic Driver Options
CONFIG_DM_MOD_EXP	drivers/crypto/rsa_mod_exp/Kconfig	/^config DM_MOD_EXP$/;"	c
CONFIG_DM_MOD_EXP_MODULE	drivers/crypto/rsa_mod_exp/Kconfig	/^config DM_MOD_EXP$/;"	c
CONFIG_DM_PCA953X	drivers/gpio/Kconfig	/^config DM_PCA953X$/;"	c	menu:GPIO Support
CONFIG_DM_PCA953X_MODULE	drivers/gpio/Kconfig	/^config DM_PCA953X$/;"	c	menu:GPIO Support
CONFIG_DM_PCI	drivers/pci/Kconfig	/^config DM_PCI$/;"	c
CONFIG_DM_PCI_COMPAT	drivers/pci/Kconfig	/^config DM_PCI_COMPAT$/;"	c
CONFIG_DM_PCI_COMPAT_MODULE	drivers/pci/Kconfig	/^config DM_PCI_COMPAT$/;"	c
CONFIG_DM_PCI_MODULE	drivers/pci/Kconfig	/^config DM_PCI$/;"	c
CONFIG_DM_PMIC	drivers/power/pmic/Kconfig	/^config DM_PMIC$/;"	c
CONFIG_DM_PMIC_MAX77686	drivers/power/pmic/Kconfig	/^config DM_PMIC_MAX77686$/;"	c
CONFIG_DM_PMIC_MAX77686_MODULE	drivers/power/pmic/Kconfig	/^config DM_PMIC_MAX77686$/;"	c
CONFIG_DM_PMIC_MODULE	drivers/power/pmic/Kconfig	/^config DM_PMIC$/;"	c
CONFIG_DM_PMIC_PFUZE100	drivers/power/pmic/Kconfig	/^config DM_PMIC_PFUZE100$/;"	c
CONFIG_DM_PMIC_PFUZE100_MODULE	drivers/power/pmic/Kconfig	/^config DM_PMIC_PFUZE100$/;"	c
CONFIG_DM_PMIC_SANDBOX	drivers/power/pmic/Kconfig	/^config DM_PMIC_SANDBOX$/;"	c
CONFIG_DM_PMIC_SANDBOX_MODULE	drivers/power/pmic/Kconfig	/^config DM_PMIC_SANDBOX$/;"	c
CONFIG_DM_PWM	drivers/pwm/Kconfig	/^config DM_PWM$/;"	c
CONFIG_DM_PWM_MODULE	drivers/pwm/Kconfig	/^config DM_PWM$/;"	c
CONFIG_DM_REGULATOR	drivers/power/regulator/Kconfig	/^config DM_REGULATOR$/;"	c
CONFIG_DM_REGULATOR_FIXED	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_FIXED$/;"	c
CONFIG_DM_REGULATOR_FIXED_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_FIXED$/;"	c
CONFIG_DM_REGULATOR_GPIO	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_GPIO$/;"	c
CONFIG_DM_REGULATOR_GPIO_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_GPIO$/;"	c
CONFIG_DM_REGULATOR_LP873X	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_LP873X$/;"	c
CONFIG_DM_REGULATOR_LP873X_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_LP873X$/;"	c
CONFIG_DM_REGULATOR_MAX77686	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_MAX77686$/;"	c
CONFIG_DM_REGULATOR_MAX77686_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_MAX77686$/;"	c
CONFIG_DM_REGULATOR_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR$/;"	c
CONFIG_DM_REGULATOR_PALMAS	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_PALMAS$/;"	c
CONFIG_DM_REGULATOR_PALMAS_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_PALMAS$/;"	c
CONFIG_DM_REGULATOR_PFUZE100	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_PFUZE100$/;"	c
CONFIG_DM_REGULATOR_PFUZE100_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_PFUZE100$/;"	c
CONFIG_DM_REGULATOR_SANDBOX	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_SANDBOX$/;"	c
CONFIG_DM_REGULATOR_SANDBOX_MODULE	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_SANDBOX$/;"	c
CONFIG_DM_RESET	drivers/reset/Kconfig	/^config DM_RESET$/;"	c	menu:Reset Controller Support
CONFIG_DM_RESET_MODULE	drivers/reset/Kconfig	/^config DM_RESET$/;"	c	menu:Reset Controller Support
CONFIG_DM_RTC	drivers/rtc/Kconfig	/^config DM_RTC$/;"	c	menu:Real Time Clock
CONFIG_DM_RTC_MODULE	drivers/rtc/Kconfig	/^config DM_RTC$/;"	c	menu:Real Time Clock
CONFIG_DM_SEQ_ALIAS	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_DM_SEQ_ALIAS	/;"	d
CONFIG_DM_SEQ_ALIAS	drivers/core/Kconfig	/^config DM_SEQ_ALIAS$/;"	c	menu:Generic Driver Options
CONFIG_DM_SEQ_ALIAS	include/config/auto.conf	/^CONFIG_DM_SEQ_ALIAS=y$/;"	k
CONFIG_DM_SEQ_ALIAS	include/generated/autoconf.h	/^#define CONFIG_DM_SEQ_ALIAS /;"	d
CONFIG_DM_SEQ_ALIAS_MODULE	drivers/core/Kconfig	/^config DM_SEQ_ALIAS$/;"	c	menu:Generic Driver Options
CONFIG_DM_SERIAL	drivers/serial/Kconfig	/^config DM_SERIAL$/;"	c	menu:Serial drivers
CONFIG_DM_SERIAL	include/config/auto.conf	/^CONFIG_DM_SERIAL=y$/;"	k
CONFIG_DM_SERIAL	include/configs/s32v234evb.h	/^#define CONFIG_DM_SERIAL$/;"	d
CONFIG_DM_SERIAL	include/generated/autoconf.h	/^#define CONFIG_DM_SERIAL /;"	d
CONFIG_DM_SERIAL_MODULE	drivers/serial/Kconfig	/^config DM_SERIAL$/;"	c	menu:Serial drivers
CONFIG_DM_SPI	drivers/spi/Kconfig	/^config DM_SPI$/;"	c	menu:SPI Support
CONFIG_DM_SPI_FLASH	drivers/mtd/spi/Kconfig	/^config DM_SPI_FLASH$/;"	c	menu:SPI Flash Support
CONFIG_DM_SPI_FLASH	include/configs/ls1021aqds.h	/^#define CONFIG_DM_SPI_FLASH$/;"	d
CONFIG_DM_SPI_FLASH	include/configs/ls1021atwr.h	/^#define CONFIG_DM_SPI_FLASH$/;"	d
CONFIG_DM_SPI_FLASH	include/configs/ls1043a_common.h	/^#define CONFIG_DM_SPI_FLASH$/;"	d
CONFIG_DM_SPI_FLASH_MODULE	drivers/mtd/spi/Kconfig	/^config DM_SPI_FLASH$/;"	c	menu:SPI Flash Support
CONFIG_DM_SPI_MODULE	drivers/spi/Kconfig	/^config DM_SPI$/;"	c	menu:SPI Support
CONFIG_DM_STDIO	drivers/core/Kconfig	/^config DM_STDIO$/;"	c	menu:Generic Driver Options
CONFIG_DM_STDIO	include/config/auto.conf	/^CONFIG_DM_STDIO=y$/;"	k
CONFIG_DM_STDIO	include/generated/autoconf.h	/^#define CONFIG_DM_STDIO /;"	d
CONFIG_DM_STDIO_MODULE	drivers/core/Kconfig	/^config DM_STDIO$/;"	c	menu:Generic Driver Options
CONFIG_DM_THERMAL	drivers/thermal/Kconfig	/^config DM_THERMAL$/;"	c
CONFIG_DM_THERMAL	include/configs/gw_ventana.h	/^#define CONFIG_DM_THERMAL$/;"	d
CONFIG_DM_THERMAL_MODULE	drivers/thermal/Kconfig	/^config DM_THERMAL$/;"	c
CONFIG_DM_USB	drivers/usb/Kconfig	/^config DM_USB$/;"	c
CONFIG_DM_USB	include/config/auto.conf	/^CONFIG_DM_USB=y$/;"	k
CONFIG_DM_USB	include/configs/ds414.h	/^#define CONFIG_DM_USB$/;"	d
CONFIG_DM_USB	include/generated/autoconf.h	/^#define CONFIG_DM_USB /;"	d
CONFIG_DM_USB_MODULE	drivers/usb/Kconfig	/^config DM_USB$/;"	c
CONFIG_DM_VIDEO	drivers/video/Kconfig	/^config DM_VIDEO$/;"	c	menu:Graphics support
CONFIG_DM_VIDEO_MODULE	drivers/video/Kconfig	/^config DM_VIDEO$/;"	c	menu:Graphics support
CONFIG_DM_WARN	drivers/core/Kconfig	/^config DM_WARN$/;"	c	menu:Generic Driver Options
CONFIG_DM_WARN	include/config/auto.conf	/^CONFIG_DM_WARN=y$/;"	k
CONFIG_DM_WARN	include/generated/autoconf.h	/^#define CONFIG_DM_WARN /;"	d
CONFIG_DM_WARN_MODULE	drivers/core/Kconfig	/^config DM_WARN$/;"	c	menu:Generic Driver Options
CONFIG_DNET_AUTONEG_TIMEOUT	drivers/net/dnet.c	/^#define CONFIG_DNET_AUTONEG_TIMEOUT	/;"	d	file:
CONFIG_DNP5370_EXT_WD_DISABLE	include/configs/dnp5370.h	/^#define CONFIG_DNP5370_EXT_WD_DISABLE /;"	d
CONFIG_DOS_PARTITION	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/autoconf.mk	/^CONFIG_DOS_PARTITION=y$/;"	m
CONFIG_DOS_PARTITION	include/config_distro_defaults.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/B4860QDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/BSC9131RDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/BSC9132QDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/C29XPCIE.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/CPCI4052.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/M52277EVB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/M5253DEMO.h	/^#	define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/M5253EVBE.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/M54455EVB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/M5475EVB.h	/^#	define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/M5485EVB.h	/^#	define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MIP405.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8308RDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8315ERDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8349ITX.h	/^	#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC837XEMDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC837XERDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8536DS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8544DS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8569MDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8572DS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8610HPCD.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/MPC8641HPCN.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/P1010RDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/P1022DS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/P1023RDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/P2041RDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/PIP405.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/PLU405.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/PMC440.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T102xQDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T102xRDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T1040QDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T104xRDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T208xQDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T208xRDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T4240QDS.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/T4240RDB.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM5200.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM823L.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM823M.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM850L.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM850M.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM855L.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM855M.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM860L.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM860M.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM862L.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM862M.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM866M.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/TQM885D.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/UCP1020.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/VCMA9.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/a4m072.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ac14xx.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/acadia.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/adp-ag101p.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/advantech_dms-ba16.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/am3517_crane.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/am3517_evm.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ap325rxa.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/apf27.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/apx4devkit.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/aria.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/at91rm9200ek.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9260ek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9261ek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9263ek.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9n12ek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9rlek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/at91sam9x5ek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/atngw100.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/atngw100mkii.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/atstk1002.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/axs10x.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/bamboo.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/bcm23550_w1d.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/bcm28155_ap.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/bcm_ep_board.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/bf533-stamp.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/bf537-stamp.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/bfin_adi_common.h	/^#  define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/bg0900.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/brppt1.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/brxre1.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/canyonlands.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/clearfog.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/cm5200.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/cm_t35.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/cm_t3517.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/colibri_vf.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/controlcenterd.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/corenet_ds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/corvus.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/cyrus.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/da850evm.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/db-88f6820-amc.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/db-88f6820-gp.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/db-mv784mp-gp.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/devkit3250.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/digsy_mtc.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ds414.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ecovec.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/edminiv2.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ethernut5.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ge_bx50v3.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/gplugd.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/gr_ep2s60.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/gr_xc3s_1500.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/grsim.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/grsim_leon2.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/hrcon.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ib62x0.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/icon.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/imx27lite-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/inka4x0.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/intip.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ipek01.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/jupiter.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/katmai.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/km/kmp204x-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/kzm9g.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/lacie_kw.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/legoev3.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1012aqds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1012ardb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1021aqds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1021atwr.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1043a_common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1043aqds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1043ardb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1046a_common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1046aqds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls1046ardb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls2080a_simu.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls2080aqds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ls2080ardb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/lsxl.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/lwmon5.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/m28evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/m53evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ma5d4evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/manroland/common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mcx.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mecp5123.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/motionpro.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mpc5121ads.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ms7720se.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/mv-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx23_olinuxino.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx23evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx25pdk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx28evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx35pdk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx51evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx53ard.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx53evk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx53loco.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx53smd.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx6_common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/mx7_common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/nas220.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/nokia_rx51.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/nsa310s.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/o2dnt-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/omap3_evm.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/omapl138_lcdk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/p1_twr.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/pcm030.h	/^#define CONFIG_DOS_PARTITION /;"	d
CONFIG_DOS_PARTITION	include/configs/pcm052.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/pic32mzdask.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/pico-imx6ul.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/picosam9g45.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/pm9261.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/pm9263.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/pm9g45.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/pxa-common.h	/^#define	CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/qemu-mips.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/qemu-mips64.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/qemu-ppce500.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/r2dplus.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/r7780mp.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/rcar-gen2-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/rcar-gen3-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/s32v234evb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/s5p_goni.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/sama5d2_ptc.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sama5d2_xplained.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sama5d3_xplained.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sama5d3xek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sama5d4_xplained.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sama5d4ek.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sandbox.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sansa_fuze_plus.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sbc8641d.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sc_sps_1.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sequoia.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sh7752evb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sh7753evb.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sh7757lcr.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sh7785lcr.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/sheevaplug.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/siemens-am33x-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/smdk2410.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/smdkc100.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/snapper9260.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/snapper9g45.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_is1.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_mcvevk.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_sockit.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_socrates.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_sr1500.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/socrates.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/strider.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/t4qds.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/tam3517-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/tao3530.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/theadorable.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ti814x_evm.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ti816x_evm.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ti_armv7_common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/tplink_wdr4300.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/tricorder.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/ts4800.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/uniphier.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/usb_a9263.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/v38b.h	/^#define CONFIG_DOS_PARTITION	/;"	d
CONFIG_DOS_PARTITION	include/configs/vct.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/vexpress_aemv8a.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/vf610twr.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/vinco.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/woodburn_common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/work_92105.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/x600.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/x86-common.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/xfi3.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/xilinx_zynqmp.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/xpedite550x.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/yosemite.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/zipitz2.h	/^#define	CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/zmx25.h	/^#define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DOS_PARTITION	include/configs/zynq-common.h	/^# define CONFIG_DOS_PARTITION$/;"	d
CONFIG_DP_DDR_CTRL	include/configs/ls2080a_common.h	/^#define CONFIG_DP_DDR_CTRL	/;"	d
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	include/configs/ls2080a_emu.h	/^#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	include/configs/ls2080a_simu.h	/^#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	include/configs/ls2080aqds.h	/^#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	include/configs/ls2080ardb.h	/^#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	/;"	d
CONFIG_DP_DDR_NUM_CTRLS	include/configs/ls2080a_common.h	/^#define CONFIG_DP_DDR_NUM_CTRLS	/;"	d
CONFIG_DRA7XX	include/configs/dra7xx_evm.h	/^#define CONFIG_DRA7XX$/;"	d
CONFIG_DRAM_2G	include/configs/cm_t54.h	/^#define CONFIG_DRAM_2G$/;"	d
CONFIG_DRAM_CLK	board/sunxi/Kconfig	/^config DRAM_CLK$/;"	c
CONFIG_DRAM_CLK	include/config/auto.conf	/^CONFIG_DRAM_CLK=408$/;"	k
CONFIG_DRAM_CLK	include/generated/autoconf.h	/^#define CONFIG_DRAM_CLK /;"	d
CONFIG_DRAM_CLK_MODULE	board/sunxi/Kconfig	/^config DRAM_CLK$/;"	c
CONFIG_DRAM_DQS_GATING_DELAY	board/sunxi/Kconfig	/^config DRAM_DQS_GATING_DELAY$/;"	c
CONFIG_DRAM_DQS_GATING_DELAY_MODULE	board/sunxi/Kconfig	/^config DRAM_DQS_GATING_DELAY$/;"	c
CONFIG_DRAM_EMR1	board/sunxi/Kconfig	/^config DRAM_EMR1$/;"	c
CONFIG_DRAM_EMR1_MODULE	board/sunxi/Kconfig	/^config DRAM_EMR1$/;"	c
CONFIG_DRAM_MBUS_CLK	board/sunxi/Kconfig	/^config DRAM_MBUS_CLK$/;"	c
CONFIG_DRAM_MBUS_CLK_MODULE	board/sunxi/Kconfig	/^config DRAM_MBUS_CLK$/;"	c
CONFIG_DRAM_ODT_CORRECTION	board/sunxi/Kconfig	/^config DRAM_ODT_CORRECTION$/;"	c
CONFIG_DRAM_ODT_CORRECTION_MODULE	board/sunxi/Kconfig	/^config DRAM_ODT_CORRECTION$/;"	c
CONFIG_DRAM_ODT_EN	board/sunxi/Kconfig	/^config DRAM_ODT_EN$/;"	c
CONFIG_DRAM_ODT_EN	include/config/auto.conf	/^CONFIG_DRAM_ODT_EN=y$/;"	k
CONFIG_DRAM_ODT_EN	include/generated/autoconf.h	/^#define CONFIG_DRAM_ODT_EN /;"	d
CONFIG_DRAM_ODT_EN_MODULE	board/sunxi/Kconfig	/^config DRAM_ODT_EN$/;"	c
CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H	board/sunxi/Kconfig	/^config DRAM_TIMINGS_DDR3_1066F_1333H$/;"	c	choice:choicebcdb41430204
CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H_MODULE	board/sunxi/Kconfig	/^config DRAM_TIMINGS_DDR3_1066F_1333H$/;"	c	choice:choicebcdb41430204
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J	board/sunxi/Kconfig	/^config DRAM_TIMINGS_DDR3_800E_1066G_1333J$/;"	c	choice:choicebcdb41430204
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J_MODULE	board/sunxi/Kconfig	/^config DRAM_TIMINGS_DDR3_800E_1066G_1333J$/;"	c	choice:choicebcdb41430204
CONFIG_DRAM_TIMINGS_VENDOR_MAGIC	board/sunxi/Kconfig	/^config DRAM_TIMINGS_VENDOR_MAGIC$/;"	c	choice:choicebcdb41430204
CONFIG_DRAM_TIMINGS_VENDOR_MAGIC_MODULE	board/sunxi/Kconfig	/^config DRAM_TIMINGS_VENDOR_MAGIC$/;"	c	choice:choicebcdb41430204
CONFIG_DRAM_TPR3	board/sunxi/Kconfig	/^config DRAM_TPR3$/;"	c
CONFIG_DRAM_TPR3_MODULE	board/sunxi/Kconfig	/^config DRAM_TPR3$/;"	c
CONFIG_DRAM_TYPE	board/sunxi/Kconfig	/^config DRAM_TYPE$/;"	c
CONFIG_DRAM_TYPE_MODULE	board/sunxi/Kconfig	/^config DRAM_TYPE$/;"	c
CONFIG_DRAM_ZQ	board/sunxi/Kconfig	/^config DRAM_ZQ$/;"	c
CONFIG_DRAM_ZQ	include/config/auto.conf	/^CONFIG_DRAM_ZQ=3881979$/;"	k
CONFIG_DRAM_ZQ	include/generated/autoconf.h	/^#define CONFIG_DRAM_ZQ /;"	d
CONFIG_DRAM_ZQ_MODULE	board/sunxi/Kconfig	/^config DRAM_ZQ$/;"	c
CONFIG_DRIVER_AT91EMAC	include/configs/at91rm9200ek.h	/^#define CONFIG_DRIVER_AT91EMAC$/;"	d
CONFIG_DRIVER_AT91EMAC_PHYADDR	drivers/net/at91_emac.c	/^#define CONFIG_DRIVER_AT91EMAC_PHYADDR	/;"	d	file:
CONFIG_DRIVER_AX88180	include/configs/blackvme.h	/^#define CONFIG_DRIVER_AX88180	/;"	d
CONFIG_DRIVER_AX88180	include/configs/ibf-dsp561.h	/^#define CONFIG_DRIVER_AX88180	/;"	d
CONFIG_DRIVER_AX88796L	include/configs/r7780mp.h	/^#define CONFIG_DRIVER_AX88796L$/;"	d
CONFIG_DRIVER_DM9000	include/configs/M5253DEMO.h	/^#define CONFIG_DRIVER_DM9000$/;"	d
CONFIG_DRIVER_DM9000	include/configs/at91sam9261ek.h	/^#define CONFIG_DRIVER_DM9000$/;"	d
CONFIG_DRIVER_DM9000	include/configs/colibri_pxa270.h	/^#define	CONFIG_DRIVER_DM9000	/;"	d
CONFIG_DRIVER_DM9000	include/configs/devkit8000.h	/^#define	CONFIG_DRIVER_DM9000	/;"	d
CONFIG_DRIVER_DM9000	include/configs/ip04.h	/^#define CONFIG_DRIVER_DM9000	/;"	d
CONFIG_DRIVER_DM9000	include/configs/pm9261.h	/^#define CONFIG_DRIVER_DM9000	/;"	d
CONFIG_DRIVER_EP93XX_MAC	include/configs/edb93xx.h	/^#define CONFIG_DRIVER_EP93XX_MAC$/;"	d
CONFIG_DRIVER_NAND_BFIN	include/configs/bf526-ezbrd.h	/^#define CONFIG_DRIVER_NAND_BFIN$/;"	d
CONFIG_DRIVER_NAND_BFIN	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_DRIVER_NAND_BFIN$/;"	d
CONFIG_DRIVER_NAND_BFIN	include/configs/bf527-ezkit.h	/^#define CONFIG_DRIVER_NAND_BFIN$/;"	d
CONFIG_DRIVER_NAND_BFIN	include/configs/bf548-ezkit.h	/^#define CONFIG_DRIVER_NAND_BFIN$/;"	d
CONFIG_DRIVER_NE2000	include/configs/qemu-mips.h	/^#define CONFIG_DRIVER_NE2000$/;"	d
CONFIG_DRIVER_NE2000	include/configs/qemu-mips64.h	/^#define CONFIG_DRIVER_NE2000$/;"	d
CONFIG_DRIVER_NE2000	include/configs/shmin.h	/^#define CONFIG_DRIVER_NE2000$/;"	d
CONFIG_DRIVER_NE2000_BASE	include/configs/qemu-mips.h	/^#define CONFIG_DRIVER_NE2000_BASE	/;"	d
CONFIG_DRIVER_NE2000_BASE	include/configs/qemu-mips64.h	/^#define CONFIG_DRIVER_NE2000_BASE	/;"	d
CONFIG_DRIVER_NE2000_BASE	include/configs/r7780mp.h	/^#define CONFIG_DRIVER_NE2000_BASE	/;"	d
CONFIG_DRIVER_NE2000_BASE	include/configs/shmin.h	/^#define CONFIG_DRIVER_NE2000_BASE /;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/am335x_shc.h	/^#define CONFIG_DRIVER_TI_CPSW$/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/am43xx_evm.h	/^#define CONFIG_DRIVER_TI_CPSW$/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/am57xx_evm.h	/^#define CONFIG_DRIVER_TI_CPSW	/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/bur_am335x_common.h	/^#define CONFIG_DRIVER_TI_CPSW	/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/cm_t43.h	/^#define CONFIG_DRIVER_TI_CPSW$/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/dra7xx_evm.h	/^#define CONFIG_DRIVER_TI_CPSW	/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/siemens-am33x-common.h	/^#define CONFIG_DRIVER_TI_CPSW$/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/ti814x_evm.h	/^#define CONFIG_DRIVER_TI_CPSW$/;"	d
CONFIG_DRIVER_TI_CPSW	include/configs/ti_am335x_common.h	/^#define CONFIG_DRIVER_TI_CPSW	/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/am3517_evm.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/calimain.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/cm_t3517.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/da850evm.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/ea20.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/ipam390.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/mcx.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/omapl138_lcdk.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC	include/configs/tam3517-common.h	/^#define CONFIG_DRIVER_TI_EMAC$/;"	d
CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE	include/configs/ea20.h	/^#define CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE$/;"	d
CONFIG_DRIVER_TI_EMAC_USE_RMII	include/configs/am3517_evm.h	/^#define CONFIG_DRIVER_TI_EMAC_USE_RMII$/;"	d
CONFIG_DRIVER_TI_EMAC_USE_RMII	include/configs/cm_t3517.h	/^#define CONFIG_DRIVER_TI_EMAC_USE_RMII$/;"	d
CONFIG_DRIVER_TI_EMAC_USE_RMII	include/configs/ea20.h	/^#define CONFIG_DRIVER_TI_EMAC_USE_RMII$/;"	d
CONFIG_DRIVER_TI_EMAC_USE_RMII	include/configs/ipam390.h	/^#define CONFIG_DRIVER_TI_EMAC_USE_RMII$/;"	d
CONFIG_DRIVER_TI_EMAC_USE_RMII	include/configs/mcx.h	/^#define CONFIG_DRIVER_TI_EMAC_USE_RMII$/;"	d
CONFIG_DRIVER_TI_EMAC_USE_RMII	include/configs/tam3517-common.h	/^#define CONFIG_DRIVER_TI_EMAC_USE_RMII$/;"	d
CONFIG_DRIVER_TI_KEYSTONE_NET	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_DRIVER_TI_KEYSTONE_NET$/;"	d
CONFIG_DRIVE_MMC	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_MMC /;"	d
CONFIG_DRIVE_MMC	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_MMC$/;"	d
CONFIG_DRIVE_SATA	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_SATA /;"	d
CONFIG_DRIVE_SATA	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_SATA$/;"	d
CONFIG_DRIVE_TYPES	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_TYPES /;"	d
CONFIG_DRIVE_USB	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_USB /;"	d
CONFIG_DRIVE_USB	include/configs/nitrogen6x.h	/^#define CONFIG_DRIVE_USB$/;"	d
CONFIG_DS4510	include/configs/xpedite517x.h	/^#define CONFIG_DS4510$/;"	d
CONFIG_DS4510	include/configs/xpedite537x.h	/^#define CONFIG_DS4510$/;"	d
CONFIG_DSP_CLUSTER_START	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_DSP_CLUSTER_START	/;"	d
CONFIG_DTT	include/dtt.h	/^#define CONFIG_DTT	/;"	d
CONFIG_DTT_AD7414	include/configs/acadia.h	/^#define CONFIG_DTT_AD7414	/;"	d
CONFIG_DTT_AD7414	include/configs/canyonlands.h	/^#define CONFIG_DTT_AD7414	/;"	d
CONFIG_DTT_AD7414	include/configs/sequoia.h	/^#define CONFIG_DTT_AD7414	/;"	d
CONFIG_DTT_AD7414	include/configs/yosemite.h	/^#define CONFIG_DTT_AD7414	/;"	d
CONFIG_DTT_ADM1021	include/configs/PMC440.h	/^#define CONFIG_DTT_ADM1021$/;"	d
CONFIG_DTT_ADM1021	include/configs/UCP1020.h	/^#define CONFIG_DTT_ADM1021	/;"	d
CONFIG_DTT_ADM1021	include/configs/katmai.h	/^#define CONFIG_DTT_ADM1021	/;"	d
CONFIG_DTT_DS1621	include/configs/xpedite517x.h	/^#define CONFIG_DTT_DS1621$/;"	d
CONFIG_DTT_DS1621	include/configs/xpedite537x.h	/^#define CONFIG_DTT_DS1621$/;"	d
CONFIG_DTT_DS1775	include/configs/kilauea.h	/^#define CONFIG_DTT_DS1775	/;"	d
CONFIG_DTT_DS1775	include/configs/makalu.h	/^#define CONFIG_DTT_DS1775	/;"	d
CONFIG_DTT_DS620	include/configs/work_92105.h	/^#define CONFIG_DTT_DS620$/;"	d
CONFIG_DTT_HYSTERESIS	include/configs/tqma6.h	/^#define CONFIG_DTT_HYSTERESIS	/;"	d
CONFIG_DTT_LM63	include/configs/dlvision-10g.h	/^#define CONFIG_DTT_LM63	/;"	d
CONFIG_DTT_LM63	include/configs/intip.h	/^#define CONFIG_DTT_LM63 /;"	d
CONFIG_DTT_LM63	include/configs/io.h	/^#define CONFIG_DTT_LM63	/;"	d
CONFIG_DTT_LM63	include/configs/io64.h	/^#define CONFIG_DTT_LM63	/;"	d
CONFIG_DTT_LM63	include/configs/neo.h	/^#define CONFIG_DTT_LM63	/;"	d
CONFIG_DTT_LM75	include/configs/TQM834x.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/acadia.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/bf561-acvilon.h	/^#define CONFIG_DTT_LM75 /;"	d
CONFIG_DTT_LM75	include/configs/canyonlands.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/km/km83xx-common.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/km82xx.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/motionpro.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/sequoia.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/socrates.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM75	include/configs/tqma6.h	/^#define CONFIG_DTT_LM75$/;"	d
CONFIG_DTT_LM75	include/configs/xpedite550x.h	/^#define CONFIG_DTT_LM75$/;"	d
CONFIG_DTT_LM75	include/configs/yosemite.h	/^#define CONFIG_DTT_LM75	/;"	d
CONFIG_DTT_LM81	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_DTT_LM81	/;"	d
CONFIG_DTT_MAX_TEMP	include/configs/tqma6.h	/^#define CONFIG_DTT_MAX_TEMP	/;"	d
CONFIG_DTT_MIN_TEMP	include/configs/tqma6.h	/^#define CONFIG_DTT_MIN_TEMP	/;"	d
CONFIG_DTT_PWM_LOOKUPTABLE	include/configs/dlvision-10g.h	/^#define CONFIG_DTT_PWM_LOOKUPTABLE	/;"	d
CONFIG_DTT_PWM_LOOKUPTABLE	include/configs/intip.h	/^#define CONFIG_DTT_PWM_LOOKUPTABLE /;"	d
CONFIG_DTT_PWM_LOOKUPTABLE	include/configs/io.h	/^#define CONFIG_DTT_PWM_LOOKUPTABLE	/;"	d
CONFIG_DTT_PWM_LOOKUPTABLE	include/configs/io64.h	/^#define CONFIG_DTT_PWM_LOOKUPTABLE	/;"	d
CONFIG_DTT_PWM_LOOKUPTABLE	include/configs/neo.h	/^#define CONFIG_DTT_PWM_LOOKUPTABLE	/;"	d
CONFIG_DTT_SENSORS	include/configs/PMC440.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/TQM834x.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/UCP1020.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/acadia.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/bf561-acvilon.h	/^#define CONFIG_DTT_SENSORS /;"	d
CONFIG_DTT_SENSORS	include/configs/canyonlands.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/dlvision-10g.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/intip.h	/^#define CONFIG_DTT_SENSORS /;"	d
CONFIG_DTT_SENSORS	include/configs/io.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/io64.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/katmai.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/kilauea.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/km/km83xx-common.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/km82xx.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/makalu.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/motionpro.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/neo.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/sequoia.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/socrates.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/tqma6.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/tqma6_mba6.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/tqma6_wru4.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/work_92105.h	/^#define CONFIG_DTT_SENSORS /;"	d
CONFIG_DTT_SENSORS	include/configs/xpedite517x.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/xpedite537x.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/xpedite550x.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_SENSORS	include/configs/yosemite.h	/^#define CONFIG_DTT_SENSORS	/;"	d
CONFIG_DTT_TACH_LIMIT	include/configs/dlvision-10g.h	/^#define CONFIG_DTT_TACH_LIMIT	/;"	d
CONFIG_DTT_TACH_LIMIT	include/configs/intip.h	/^#define CONFIG_DTT_TACH_LIMIT /;"	d
CONFIG_DTT_TACH_LIMIT	include/configs/io.h	/^#define CONFIG_DTT_TACH_LIMIT	/;"	d
CONFIG_DTT_TACH_LIMIT	include/configs/io64.h	/^#define CONFIG_DTT_TACH_LIMIT	/;"	d
CONFIG_DTT_TACH_LIMIT	include/configs/neo.h	/^#define CONFIG_DTT_TACH_LIMIT	/;"	d
CONFIG_DUOVERO	include/configs/duovero.h	/^#define CONFIG_DUOVERO$/;"	d
CONFIG_DV_USBPHY_CTL	drivers/usb/musb/davinci.c	/^#define CONFIG_DV_USBPHY_CTL /;"	d	file:
CONFIG_DWAPB_GPIO	drivers/gpio/Kconfig	/^config DWAPB_GPIO$/;"	c	menu:GPIO Support
CONFIG_DWAPB_GPIO_MODULE	drivers/gpio/Kconfig	/^config DWAPB_GPIO$/;"	c	menu:GPIO Support
CONFIG_DWC2_DMA_BURST_SIZE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_DMA_BURST_SIZE	/;"	d
CONFIG_DWC2_DMA_ENABLE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_DMA_ENABLE$/;"	d
CONFIG_DWC2_ENABLE_DYNAMIC_FIFO	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO	/;"	d
CONFIG_DWC2_ENABLE_DYNAMIC_FIFO	include/configs/hikey.h	/^#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO$/;"	d
CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE	/;"	d
CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE	/;"	d
CONFIG_DWC2_HOST_RX_FIFO_SIZE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_HOST_RX_FIFO_SIZE	/;"	d
CONFIG_DWC2_MAX_CHANNELS	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_MAX_CHANNELS	/;"	d
CONFIG_DWC2_MAX_PACKET_COUNT	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_MAX_PACKET_COUNT	/;"	d
CONFIG_DWC2_MAX_TRANSFER_SIZE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_MAX_TRANSFER_SIZE	/;"	d
CONFIG_DWC2_PHY_TYPE	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_PHY_TYPE	/;"	d
CONFIG_DWC2_PHY_ULPI_EXT_VBUS	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_PHY_ULPI_EXT_VBUS	/;"	d
CONFIG_DWC2_TX_THR_LENGTH	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_TX_THR_LENGTH	/;"	d
CONFIG_DWC2_UTMI_WIDTH	drivers/usb/host/dwc2.h	/^#define CONFIG_DWC2_UTMI_WIDTH	/;"	d
CONFIG_DWCDDR21MCTL_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_DWCDDR21MCTL_BASE	/;"	d
CONFIG_DWC_AHSATA	include/configs/advantech_dms-ba16.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/cgtqmx6eval.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/cm_fx6.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/ge_bx50v3.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/gw_ventana.h	/^  #define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/m53evk.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/mx53loco.h	/^	#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/nitrogen6x.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/novena.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/ot1200.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/tbs2910.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/udoo.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA	include/configs/wandboard.h	/^#define CONFIG_DWC_AHSATA$/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/cm_fx6.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/gw_ventana.h	/^  #define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/m53evk.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/mx53loco.h	/^	#define CONFIG_DWC_AHSATA_BASE_ADDR /;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/nitrogen6x.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/novena.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/ot1200.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/tbs2910.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/udoo.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_BASE_ADDR	include/configs/wandboard.h	/^#define CONFIG_DWC_AHSATA_BASE_ADDR	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/advantech_dms-ba16.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/cgtqmx6eval.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/cm_fx6.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/ge_bx50v3.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/gw_ventana.h	/^  #define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/m53evk.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/mx53loco.h	/^	#define CONFIG_DWC_AHSATA_PORT_ID /;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/nitrogen6x.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/novena.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/ot1200.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/tbs2910.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/udoo.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_AHSATA_PORT_ID	include/configs/wandboard.h	/^#define CONFIG_DWC_AHSATA_PORT_ID	/;"	d
CONFIG_DWC_ETH_QOS	drivers/net/Kconfig	/^config DWC_ETH_QOS$/;"	c
CONFIG_DWC_ETH_QOS_MODULE	drivers/net/Kconfig	/^config DWC_ETH_QOS$/;"	c
CONFIG_DWMMC	include/configs/axs10x.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DWMMC	include/configs/exynos-common.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DWMMC	include/configs/hikey.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DWMMC	include/configs/rk3036_common.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DWMMC	include/configs/rk3288_common.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DWMMC	include/configs/rk3399_common.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DWMMC	include/configs/socfpga_common.h	/^#define CONFIG_DWMMC$/;"	d
CONFIG_DW_ALTDESCRIPTOR	include/configs/bf609-ezkit.h	/^#define CONFIG_DW_ALTDESCRIPTOR$/;"	d
CONFIG_DW_ALTDESCRIPTOR	include/configs/galileo.h	/^#define CONFIG_DW_ALTDESCRIPTOR$/;"	d
CONFIG_DW_ALTDESCRIPTOR	include/configs/socfpga_common.h	/^#define CONFIG_DW_ALTDESCRIPTOR$/;"	d
CONFIG_DW_ALTDESCRIPTOR	include/configs/spear3xx_evb.h	/^#define CONFIG_DW_ALTDESCRIPTOR$/;"	d
CONFIG_DW_ALTDESCRIPTOR	include/configs/stv0991.h	/^#define CONFIG_DW_ALTDESCRIPTOR$/;"	d
CONFIG_DW_GMAC_DEFAULT_DMA_PBL	drivers/net/designware.h	/^#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL /;"	d
CONFIG_DW_PORTS	include/configs/bf609-ezkit.h	/^#define CONFIG_DW_PORTS	/;"	d
CONFIG_DW_SERIAL	include/configs/axs10x.h	/^#define CONFIG_DW_SERIAL$/;"	d
CONFIG_DW_UDC	include/configs/spear-common.h	/^#define CONFIG_DW_UDC$/;"	d
CONFIG_DW_WDT_BASE	include/configs/socfpga_common.h	/^#define CONFIG_DW_WDT_BASE	/;"	d
CONFIG_DW_WDT_CLOCK_KHZ	include/configs/socfpga_common.h	/^#define CONFIG_DW_WDT_CLOCK_KHZ	/;"	d
CONFIG_DYNAMIC_IO_PORT_BASE	arch/mips/Kconfig	/^config DYNAMIC_IO_PORT_BASE$/;"	c	menu:MIPS architecture
CONFIG_DYNAMIC_IO_PORT_BASE_MODULE	arch/mips/Kconfig	/^config DYNAMIC_IO_PORT_BASE$/;"	c	menu:MIPS architecture
CONFIG_DYNAMIC_MMC_DEVNO	include/configs/secomx6quq7.h	/^	#define CONFIG_DYNAMIC_MMC_DEVNO$/;"	d
CONFIG_E1000	drivers/net/Kconfig	/^config E1000$/;"	c
CONFIG_E1000	include/configs/ls1043a_common.h	/^#define CONFIG_E1000$/;"	d
CONFIG_E1000_MODULE	drivers/net/Kconfig	/^config E1000$/;"	c
CONFIG_E1000_NO_NVM	include/configs/apalis_t30.h	/^#define CONFIG_E1000_NO_NVM$/;"	d
CONFIG_E1000_SPI	drivers/net/Kconfig	/^config E1000_SPI$/;"	c
CONFIG_E1000_SPI_GENERIC	drivers/net/Kconfig	/^config E1000_SPI_GENERIC$/;"	c
CONFIG_E1000_SPI_GENERIC_MODULE	drivers/net/Kconfig	/^config E1000_SPI_GENERIC$/;"	c
CONFIG_E1000_SPI_MODULE	drivers/net/Kconfig	/^config E1000_SPI$/;"	c
CONFIG_E300	include/configs/MPC8308RDB.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC8313ERDB.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC8315ERDB.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC8323ERDB.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC832XEMDS.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC8349EMDS.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC837XEMDS.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/MPC837XERDB.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/TQM834x.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/ac14xx.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/aria.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/hrcon.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/km/km8309-common.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/mecp5123.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/mpc5121ads.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/mpc8308_p1m.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/pdm360ng.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/sbc8349.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/strider.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/ve8313.h	/^#define CONFIG_E300	/;"	d
CONFIG_E300	include/configs/vme8349.h	/^#define CONFIG_E300	/;"	d
CONFIG_E500	include/configs/B4860QDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/BSC9131RDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/BSC9132QDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/C29XPCIE.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8536DS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8540ADS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8541CDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8544DS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8548CDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8555CDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8560ADS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8568MDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8569MDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/MPC8572DS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/P1010RDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/P1022DS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/P1023RDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/P2041RDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T102xQDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T102xRDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T1040QDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T104xRDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T208xQDS.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T208xRDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/T4240RDB.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/UCP1020.h	/^#define CONFIG_E500$/;"	d
CONFIG_E500	include/configs/controlcenterd.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/corenet_ds.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/cyrus.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/km/kmp204x-common.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_E500$/;"	d
CONFIG_E500	include/configs/p1_twr.h	/^#define CONFIG_E500$/;"	d
CONFIG_E500	include/configs/qemu-ppce500.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/sbc8548.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/socrates.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/t4qds.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/xpedite520x.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/xpedite537x.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500	include/configs/xpedite550x.h	/^#define CONFIG_E500	/;"	d
CONFIG_E500MC	include/configs/B4860QDS.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/P2041RDB.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T102xQDS.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T102xRDB.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T1040QDS.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T104xRDB.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T208xQDS.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T208xRDB.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/T4240RDB.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/corenet_ds.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/cyrus.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/km/kmp204x-common.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E500MC	include/configs/t4qds.h	/^#define CONFIG_E500MC	/;"	d
CONFIG_E5500	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_E5500$/;"	d
CONFIG_E6500	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_E6500$/;"	d
CONFIG_EARLY_POST_CROS_EC	board/google/chromebook_link/Kconfig	/^config EARLY_POST_CROS_EC$/;"	c
CONFIG_EARLY_POST_CROS_EC	board/google/chromebook_samus/Kconfig	/^config EARLY_POST_CROS_EC$/;"	c
CONFIG_EARLY_POST_CROS_EC_MODULE	board/google/chromebook_link/Kconfig	/^config EARLY_POST_CROS_EC$/;"	c
CONFIG_EARLY_POST_CROS_EC_MODULE	board/google/chromebook_samus/Kconfig	/^config EARLY_POST_CROS_EC$/;"	c
CONFIG_EBCAW_VAL	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_EBCAW_VAL /;"	d	file:
CONFIG_EBC_PPC4xx_IBM_VER1	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define CONFIG_EBC_PPC4xx_IBM_VER1$/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bct-brettl2.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf506f-ezkit.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf518f-ezbrd.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf525-ucr2.h	/^#define CONFIG_EBIU_AMBCTL0_VAL /;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf526-ezbrd.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf527-ezkit.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf533-ezkit.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf533-stamp.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf537-minotaur.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf537-pnav.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf537-srv1.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf537-stamp.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf538f-ezkit.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf561-acvilon.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/bf561-ezkit.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/blackstamp.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/blackvme.h	/^#define CONFIG_EBIU_AMBCTL0_VAL /;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/br4.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/cm-bf527.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/cm-bf533.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/cm-bf537e.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/cm-bf537u.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/cm-bf561.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/dnp5370.h	/^#define CONFIG_EBIU_AMBCTL0_VAL /;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/ibf-dsp561.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/ip04.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/pr1.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/tcm-bf518.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL0_VAL	include/configs/tcm-bf537.h	/^#define CONFIG_EBIU_AMBCTL0_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bct-brettl2.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf506f-ezkit.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf518f-ezbrd.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf525-ucr2.h	/^#define CONFIG_EBIU_AMBCTL1_VAL /;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf526-ezbrd.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf527-ezkit.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf533-ezkit.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf533-stamp.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf537-minotaur.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf537-pnav.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf537-srv1.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf537-stamp.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf538f-ezkit.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf561-acvilon.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/bf561-ezkit.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/blackstamp.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/blackvme.h	/^#define CONFIG_EBIU_AMBCTL1_VAL /;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/br4.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/cm-bf527.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/cm-bf533.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/cm-bf537e.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/cm-bf537u.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/cm-bf561.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/dnp5370.h	/^#define CONFIG_EBIU_AMBCTL1_VAL /;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/ibf-dsp561.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/ip04.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/pr1.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/tcm-bf518.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMBCTL1_VAL	include/configs/tcm-bf537.h	/^#define CONFIG_EBIU_AMBCTL1_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bct-brettl2.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf506f-ezkit.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf518f-ezbrd.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf525-ucr2.h	/^#define CONFIG_EBIU_AMGCTL_VAL /;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf526-ezbrd.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf527-ezkit.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf533-ezkit.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf533-stamp.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf537-minotaur.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf537-pnav.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf537-srv1.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf537-stamp.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf538f-ezkit.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf561-acvilon.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/bf561-ezkit.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/blackstamp.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/blackvme.h	/^#define CONFIG_EBIU_AMGCTL_VAL /;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/br4.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/cm-bf527.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/cm-bf533.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/cm-bf537e.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/cm-bf537u.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/cm-bf561.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/dnp5370.h	/^#define CONFIG_EBIU_AMGCTL_VAL /;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/ibf-dsp561.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/ip04.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/pr1.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/tcm-bf518.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_AMGCTL_VAL	include/configs/tcm-bf537.h	/^#define CONFIG_EBIU_AMGCTL_VAL	/;"	d
CONFIG_EBIU_DDRCTL0_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_DDRCTL0_VAL	/;"	d
CONFIG_EBIU_DDRCTL0_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_DDRCTL0_VAL	/;"	d
CONFIG_EBIU_DDRCTL1_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_DDRCTL1_VAL	/;"	d
CONFIG_EBIU_DDRCTL1_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_DDRCTL1_VAL	/;"	d
CONFIG_EBIU_DDRCTL2_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_DDRCTL2_VAL	/;"	d
CONFIG_EBIU_DDRCTL2_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_DDRCTL2_VAL	/;"	d
CONFIG_EBIU_FCTL_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_FCTL_VAL	/;"	d
CONFIG_EBIU_FCTL_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_FCTL_VAL	/;"	d
CONFIG_EBIU_MBSCTL_VAL	arch/blackfin/cpu/initcode.h	/^# define CONFIG_EBIU_MBSCTL_VAL /;"	d
CONFIG_EBIU_MODE_VAL	include/configs/bf548-ezkit.h	/^#define CONFIG_EBIU_MODE_VAL	/;"	d
CONFIG_EBIU_MODE_VAL	include/configs/cm-bf548.h	/^#define CONFIG_EBIU_MODE_VAL	/;"	d
CONFIG_EBIU_RSTCTL_VAL	arch/blackfin/cpu/initcode.h	/^# define CONFIG_EBIU_RSTCTL_VAL /;"	d
CONFIG_EBIU_SDBCTL_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_EBIU_SDBCTL_VAL /;"	d	file:
CONFIG_EBIU_SDBCTL_VAL	include/configs/dnp5370.h	/^#define CONFIG_EBIU_SDBCTL_VAL /;"	d
CONFIG_EBIU_SDBCTL_VAL	include/configs/ibf-dsp561.h	/^#define CONFIG_EBIU_SDBCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bct-brettl2.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf518f-ezbrd.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf525-ucr2.h	/^#define CONFIG_EBIU_SDGCTL_VAL /;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf526-ezbrd.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf527-ezkit.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf533-ezkit.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf533-stamp.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf537-minotaur.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf537-pnav.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf537-srv1.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf537-stamp.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf538f-ezkit.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf561-acvilon.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/bf561-ezkit.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/blackstamp.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/blackvme.h	/^#define CONFIG_EBIU_SDGCTL_VAL /;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/br4.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/cm-bf527.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/cm-bf533.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/cm-bf537e.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/cm-bf537u.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/cm-bf561.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/dnp5370.h	/^#define CONFIG_EBIU_SDGCTL_VAL /;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/ibf-dsp561.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/ip04.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/pr1.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/tcm-bf518.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDGCTL_VAL	include/configs/tcm-bf537.h	/^#define CONFIG_EBIU_SDGCTL_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bct-brettl2.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf518f-ezbrd.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf525-ucr2.h	/^#define CONFIG_EBIU_SDRRC_VAL /;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf526-ezbrd.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf527-ezkit.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf533-ezkit.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf533-stamp.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf537-minotaur.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf537-pnav.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf537-srv1.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf537-stamp.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf538f-ezkit.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf561-acvilon.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/bf561-ezkit.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/blackstamp.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/blackvme.h	/^#define CONFIG_EBIU_SDRRC_VAL /;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/br4.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/cm-bf527.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/cm-bf533.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/cm-bf537e.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/cm-bf537u.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/cm-bf561.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/dnp5370.h	/^#define CONFIG_EBIU_SDRRC_VAL /;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/ibf-dsp561.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/ip04.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/pr1.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/tcm-bf518.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBIU_SDRRC_VAL	include/configs/tcm-bf537.h	/^#define CONFIG_EBIU_SDRRC_VAL	/;"	d
CONFIG_EBSZ_VAL	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_EBSZ_VAL /;"	d	file:
CONFIG_ECC	drivers/ddr/marvell/axp/ddr3_init.h	/^	CONFIG_ECC,$/;"	e	enum:config_type
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/B4860QDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/C29XPCIE.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8349EMDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8536DS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8544DS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8548CDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8568MDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8569MDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8572DS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8610HPCD.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/MPC8641HPCN.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/P1022DS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T102xQDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T102xRDB.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T1040QDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T104xRDB.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T208xQDS.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T208xRDB.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/T4240RDB.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/corenet_ds.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/cyrus.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls1021aqds.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls1043aqds.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls1043ardb.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls1046aqds.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls1046ardb.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls2080aqds.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/ls2080ardb.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/sbc8548.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/sbc8641d.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/t4qds.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/xpedite517x.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/xpedite520x.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/xpedite537x.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_INIT_VIA_DDRCONTROLLER	include/configs/xpedite550x.h	/^#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER$/;"	d
CONFIG_ECC_MODE_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_ECC_MODE_MASK	/;"	d	file:
CONFIG_ECC_MODE_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_ECC_MODE_SHIFT	/;"	d	file:
CONFIG_ECC_SRAM_ADDR_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_ECC_SRAM_ADDR_MASK	/;"	d	file:
CONFIG_ECC_SRAM_ADDR_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_ECC_SRAM_ADDR_SHIFT	/;"	d	file:
CONFIG_ECC_SRAM_REQ_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_ECC_SRAM_REQ_BIT	/;"	d	file:
CONFIG_ECOVEC	include/configs/ecovec.h	/^#define CONFIG_ECOVEC	/;"	d
CONFIG_ECOVEC_ROMIMAGE_ADDR	include/configs/ecovec.h	/^#define CONFIG_ECOVEC_ROMIMAGE_ADDR /;"	d
CONFIG_EDB9301	include/configs/edb93xx.h	/^#define CONFIG_EDB9301$/;"	d
CONFIG_EDB9302	include/configs/edb93xx.h	/^#define CONFIG_EDB9302$/;"	d
CONFIG_EDB9302A	include/configs/edb93xx.h	/^#define CONFIG_EDB9302A$/;"	d
CONFIG_EDB9307	include/configs/edb93xx.h	/^#define CONFIG_EDB9307$/;"	d
CONFIG_EDB9307A	include/configs/edb93xx.h	/^#define CONFIG_EDB9307A$/;"	d
CONFIG_EDB9312	include/configs/edb93xx.h	/^#define CONFIG_EDB9312$/;"	d
CONFIG_EDB9315	include/configs/edb93xx.h	/^#define CONFIG_EDB9315$/;"	d
CONFIG_EDB9315A	include/configs/edb93xx.h	/^#define CONFIG_EDB9315A$/;"	d
CONFIG_EDB93XX_SDCS0	include/configs/edb93xx.h	/^#define CONFIG_EDB93XX_SDCS0$/;"	d
CONFIG_EDB93XX_SDCS3	include/configs/edb93xx.h	/^#define CONFIG_EDB93XX_SDCS3$/;"	d
CONFIG_EEPRO100	include/configs/MPC8315ERDB.h	/^#define CONFIG_EEPRO100$/;"	d
CONFIG_EEPRO100	include/configs/TQM5200.h	/^#define CONFIG_EEPRO100	/;"	d
CONFIG_EEPRO100	include/configs/TQM834x.h	/^#define CONFIG_EEPRO100$/;"	d
CONFIG_EEPRO100	include/configs/integratorap.h	/^#define CONFIG_EEPRO100$/;"	d
CONFIG_EEPRO100	include/configs/ipek01.h	/^#define CONFIG_EEPRO100	/;"	d
CONFIG_EEPRO100	include/configs/katmai.h	/^#define CONFIG_EEPRO100$/;"	d
CONFIG_EEPRO100	include/configs/yucca.h	/^#define CONFIG_EEPRO100$/;"	d
CONFIG_EEPROM_BUS_ADDRESS	include/configs/am57xx_evm.h	/^#define CONFIG_EEPROM_BUS_ADDRESS /;"	d
CONFIG_EEPROM_BUS_ADDRESS	include/configs/dra7xx_evm.h	/^#define CONFIG_EEPROM_BUS_ADDRESS /;"	d
CONFIG_EEPROM_CHIP_ADDRESS	include/configs/am57xx_evm.h	/^#define CONFIG_EEPROM_CHIP_ADDRESS /;"	d
CONFIG_EEPROM_CHIP_ADDRESS	include/configs/dra7xx_evm.h	/^#define CONFIG_EEPROM_CHIP_ADDRESS /;"	d
CONFIG_EEPROM_LAYOUT_HELP_STRING	cmd/eeprom.c	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d	file:
CONFIG_EEPROM_LAYOUT_HELP_STRING	include/configs/cm_fx6.h	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d
CONFIG_EEPROM_LAYOUT_HELP_STRING	include/configs/cm_t335.h	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d
CONFIG_EEPROM_LAYOUT_HELP_STRING	include/configs/cm_t35.h	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d
CONFIG_EEPROM_LAYOUT_HELP_STRING	include/configs/cm_t3517.h	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d
CONFIG_EEPROM_LAYOUT_HELP_STRING	include/configs/cm_t43.h	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d
CONFIG_EEPROM_LAYOUT_HELP_STRING	include/configs/cm_t54.h	/^#define CONFIG_EEPROM_LAYOUT_HELP_STRING /;"	d
CONFIG_EFI	lib/efi/Kconfig	/^config EFI$/;"	c
CONFIG_EFI_APP	lib/efi/Kconfig	/^config EFI_APP$/;"	c	choice:choice04ede3cf0104
CONFIG_EFI_APP_MODULE	lib/efi/Kconfig	/^config EFI_APP$/;"	c	choice:choice04ede3cf0104
CONFIG_EFI_LOADER	include/config/auto.conf	/^CONFIG_EFI_LOADER=y$/;"	k
CONFIG_EFI_LOADER	include/generated/autoconf.h	/^#define CONFIG_EFI_LOADER /;"	d
CONFIG_EFI_LOADER	lib/efi_loader/Kconfig	/^config EFI_LOADER$/;"	c
CONFIG_EFI_LOADER_BOUNCE_BUFFER	lib/efi_loader/Kconfig	/^config EFI_LOADER_BOUNCE_BUFFER$/;"	c
CONFIG_EFI_LOADER_BOUNCE_BUFFER_MODULE	lib/efi_loader/Kconfig	/^config EFI_LOADER_BOUNCE_BUFFER$/;"	c
CONFIG_EFI_LOADER_MODULE	lib/efi_loader/Kconfig	/^config EFI_LOADER$/;"	c
CONFIG_EFI_MODULE	lib/efi/Kconfig	/^config EFI$/;"	c
CONFIG_EFI_PARTITION	include/autoconf.mk	/^CONFIG_EFI_PARTITION=y$/;"	m
CONFIG_EFI_PARTITION	include/config_distro_defaults.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/am335x_evm.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/am335x_shc.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/am335x_sl50.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/am43xx_evm.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/am57xx_evm.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/baltos.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/bav335x.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/bcm23550_w1d.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/bcm28155_ap.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/clearfog.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/cm_t43.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/db-88f6820-amc.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/db-88f6820-gp.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/db-mv784mp-gp.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/dra7xx_evm.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/lacie_kw.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/lsxl.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/mx35pdk.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/nas220.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/omap3_evm.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/omap5_uevm.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/s5p_goni.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/sandbox.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/sunxi-common.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/tbs2910.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/theadorable.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/vinco.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/woodburn_common.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/x86-common.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_PARTITION	include/configs/xilinx_zynqmp.h	/^#define CONFIG_EFI_PARTITION$/;"	d
CONFIG_EFI_RAM_SIZE	lib/efi/Kconfig	/^config EFI_RAM_SIZE$/;"	c
CONFIG_EFI_RAM_SIZE_MODULE	lib/efi/Kconfig	/^config EFI_RAM_SIZE$/;"	c
CONFIG_EFI_STUB	lib/efi/Kconfig	/^config EFI_STUB$/;"	c	choice:choice04ede3cf0104
CONFIG_EFI_STUB_32BIT	lib/efi/Kconfig	/^config EFI_STUB_32BIT$/;"	c	choice:choice04ede3cf0204
CONFIG_EFI_STUB_32BIT_MODULE	lib/efi/Kconfig	/^config EFI_STUB_32BIT$/;"	c	choice:choice04ede3cf0204
CONFIG_EFI_STUB_64BIT	lib/efi/Kconfig	/^config EFI_STUB_64BIT$/;"	c	choice:choice04ede3cf0204
CONFIG_EFI_STUB_64BIT_MODULE	lib/efi/Kconfig	/^config EFI_STUB_64BIT$/;"	c	choice:choice04ede3cf0204
CONFIG_EFI_STUB_MODULE	lib/efi/Kconfig	/^config EFI_STUB$/;"	c	choice:choice04ede3cf0104
CONFIG_EFLASH_PROTSECTORS	include/configs/ethernut5.h	/^# define CONFIG_EFLASH_PROTSECTORS	/;"	d
CONFIG_EHCI_DESC_BIG_ENDIAN	include/configs/lwmon5.h	/^#define CONFIG_EHCI_DESC_BIG_ENDIAN$/;"	d
CONFIG_EHCI_DESC_BIG_ENDIAN	include/configs/mpc5121ads.h	/^#define CONFIG_EHCI_DESC_BIG_ENDIAN$/;"	d
CONFIG_EHCI_DESC_BIG_ENDIAN	include/configs/sequoia.h	/^#define CONFIG_EHCI_DESC_BIG_ENDIAN$/;"	d
CONFIG_EHCI_DESC_BIG_ENDIAN	include/configs/tplink_wdr4300.h	/^#define CONFIG_EHCI_DESC_BIG_ENDIAN$/;"	d
CONFIG_EHCI_DESC_BIG_ENDIAN	include/configs/vct.h	/^#define CONFIG_EHCI_DESC_BIG_ENDIAN$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/B4860QDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/BSC9131RDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/BSC9132QDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/MPC8315ERDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/MPC837XEMDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/MPC837XERDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/MPC8536DS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/MPC8544DS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/MPC8572DS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/P1010RDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/P1022DS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/P1023RDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/P2041RDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T102xQDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T102xRDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T1040QDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T104xRDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T208xQDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T208xRDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T4240QDS.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/T4240RDB.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/UCP1020.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/advantech_dms-ba16.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/aristainetos-common.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/cgtqmx6eval.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/cm_fx6.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/cm_t54.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/colibri_imx7.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/colibri_vf.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/controlcenterd.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/corenet_ds.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/cyrus.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/dragonboard410c.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/embestmx6boards.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/ge_bx50v3.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/gw_ventana.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/ls1012aqds.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/ls1021aqds.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/ls1021atwr.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/lwmon5.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx35pdk.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6cuboxi.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6qarm2.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6qsabreauto.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6sabresd.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6slevk.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6sxsabreauto.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6sxsabresd.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/mx7dsabresd.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/nitrogen6x.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/omap5_uevm.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/p1_twr.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/pico-imx6ul.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/sequoia.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/tbs2910.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/tqma6.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/vct.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/warp.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/warp7.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/xpedite550x.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/xpress.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_HCD_INIT_AFTER_RESET	include/configs/zmx25.h	/^#define CONFIG_EHCI_HCD_INIT_AFTER_RESET$/;"	d
CONFIG_EHCI_IS_TDI	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/clearfog.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/cyrus.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/db-88f6720.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/db-88f6820-amc.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/db-88f6820-gp.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/db-mv784mp-gp.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/ds414.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/gplugd.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/mpc5121ads.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/mx35pdk.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/mxs.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/nas220.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/tegra114-common.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/tegra124-common.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/tegra20-common.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/tegra210-common.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/tegra30-common.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/theadorable.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/tplink_wdr4300.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/vct.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/zmx25.h	/^#define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_IS_TDI	include/configs/zynq-common.h	/^# define CONFIG_EHCI_IS_TDI$/;"	d
CONFIG_EHCI_MMIO_BIG_ENDIAN	include/configs/lwmon5.h	/^#define CONFIG_EHCI_MMIO_BIG_ENDIAN$/;"	d
CONFIG_EHCI_MMIO_BIG_ENDIAN	include/configs/mpc5121ads.h	/^#define CONFIG_EHCI_MMIO_BIG_ENDIAN	/;"	d
CONFIG_EHCI_MMIO_BIG_ENDIAN	include/configs/sequoia.h	/^#define CONFIG_EHCI_MMIO_BIG_ENDIAN$/;"	d
CONFIG_EHCI_MMIO_BIG_ENDIAN	include/configs/tplink_wdr4300.h	/^#define CONFIG_EHCI_MMIO_BIG_ENDIAN$/;"	d
CONFIG_EHCI_MMIO_BIG_ENDIAN	include/configs/vct.h	/^#define CONFIG_EHCI_MMIO_BIG_ENDIAN$/;"	d
CONFIG_EHCI_MXS_PORT0	include/configs/m28evk.h	/^#define CONFIG_EHCI_MXS_PORT0$/;"	d
CONFIG_EHCI_MXS_PORT0	include/configs/mx23_olinuxino.h	/^#define CONFIG_EHCI_MXS_PORT0$/;"	d
CONFIG_EHCI_MXS_PORT0	include/configs/mx23evk.h	/^#define CONFIG_EHCI_MXS_PORT0$/;"	d
CONFIG_EHCI_MXS_PORT0	include/configs/sansa_fuze_plus.h	/^#define CONFIG_EHCI_MXS_PORT0$/;"	d
CONFIG_EHCI_MXS_PORT0	include/configs/sc_sps_1.h	/^#define CONFIG_EHCI_MXS_PORT0$/;"	d
CONFIG_EHCI_MXS_PORT0	include/configs/xfi3.h	/^#define CONFIG_EHCI_MXS_PORT0$/;"	d
CONFIG_EHCI_MXS_PORT1	include/configs/apx4devkit.h	/^#define CONFIG_EHCI_MXS_PORT1$/;"	d
CONFIG_EHCI_MXS_PORT1	include/configs/m28evk.h	/^#define CONFIG_EHCI_MXS_PORT1$/;"	d
CONFIG_EHCI_MXS_PORT1	include/configs/mx28evk.h	/^#define CONFIG_EHCI_MXS_PORT1$/;"	d
CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE	include/configs/P1022DS.h	/^#define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE$/;"	d
CONFIG_EMAC_MDIO_PHY_NUM	include/configs/calimain.h	/^#define CONFIG_EMAC_MDIO_PHY_NUM	/;"	d
CONFIG_EMAC_MDIO_PHY_NUM	include/configs/ea20.h	/^#define CONFIG_EMAC_MDIO_PHY_NUM	/;"	d
CONFIG_EMAC_MDIO_PHY_NUM	include/configs/omapl138_lcdk.h	/^#define CONFIG_EMAC_MDIO_PHY_NUM	/;"	d
CONFIG_EMAC_MDIO_PHY_NUM	include/configs/tam3517-common.h	/^#define CONFIG_EMAC_MDIO_PHY_NUM	/;"	d
CONFIG_EMAC_NR_START	drivers/net/4xx_enet.c	/^#define CONFIG_EMAC_NR_START	/;"	d	file:
CONFIG_EMAC_PHY_MODE	include/configs/io64.h	/^#define CONFIG_EMAC_PHY_MODE	/;"	d
CONFIG_EMAC_PHY_MODE	include/configs/kilauea.h	/^#define CONFIG_EMAC_PHY_MODE	/;"	d
CONFIG_EMAC_PHY_MODE	include/configs/makalu.h	/^#define CONFIG_EMAC_PHY_MODE	/;"	d
CONFIG_EMIF4	include/configs/am3517_crane.h	/^#define CONFIG_EMIF4	/;"	d
CONFIG_EMIF4	include/configs/am3517_evm.h	/^#define CONFIG_EMIF4	/;"	d
CONFIG_EMIF4	include/configs/cm_t3517.h	/^#define CONFIG_EMIF4	/;"	d
CONFIG_EMIF4	include/configs/mcx.h	/^#define CONFIG_EMIF4	/;"	d
CONFIG_EMIF4	include/configs/tam3517-common.h	/^#define CONFIG_EMIF4	/;"	d
CONFIG_EMMC_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config EMMC_MODE$/;"	c	choice:choice5ba020940104
CONFIG_EMMC_MODE_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config EMMC_MODE$/;"	c	choice:choice5ba020940104
CONFIG_ENABLE_36BIT_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/MPC8568MDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/P1022DS.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/UCP1020.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/controlcenterd.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/cyrus.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/qemu-ppce500.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/sbc8548.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/socrates.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/t4qds.h	/^#define CONFIG_ENABLE_36BIT_PHYS$/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/xpedite520x.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/xpedite537x.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_36BIT_PHYS	include/configs/xpedite550x.h	/^#define CONFIG_ENABLE_36BIT_PHYS	/;"	d
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK	arch/arm/Kconfig	/^config ENABLE_ARM_SOC_BOOT0_HOOK$/;"	c	menu:ARM architecture
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK_MODULE	arch/arm/Kconfig	/^config ENABLE_ARM_SOC_BOOT0_HOOK$/;"	c	menu:ARM architecture
CONFIG_ENABLE_MMU	include/configs/smdkc100.h	/^#define CONFIG_ENABLE_MMU$/;"	d
CONFIG_ENABLE_MRC_CACHE	arch/x86/Kconfig	/^config ENABLE_MRC_CACHE$/;"	c	menu:x86 architecture
CONFIG_ENABLE_MRC_CACHE_MODULE	arch/x86/Kconfig	/^config ENABLE_MRC_CACHE$/;"	c	menu:x86 architecture
CONFIG_ENABLE_VMX	arch/x86/cpu/ivybridge/Kconfig	/^config ENABLE_VMX$/;"	c
CONFIG_ENABLE_VMX_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config ENABLE_VMX$/;"	c
CONFIG_ENV_ADDR	include/configs/10m50_devboard.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/3c120_devboard.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M5253DEMO.h	/^#	define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M5253EVBE.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M5272C3.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M5275EVB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M5282EVB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M54418TWR.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8315ERDB.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8323ERDB.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC832XEMDS.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8349EMDS.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8349ITX.h	/^  #define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC837XEMDS.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC837XERDB.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8536DS.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8540ADS.h	/^  #define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8541CDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8544DS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8548CDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8555CDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8560ADS.h	/^  #define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8572DS.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MPC8641HPCN.h	/^    #define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/MigoR.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/P1022DS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/PMC440.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T4240QDS.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/TQM5200.h	/^# define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/TQM834x.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/UCP1020.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/a3m071.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/a4m072.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ac14xx.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/acadia.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/adp-ag101p.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/am3517_crane.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/am3517_evm.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/amcore.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ap325rxa.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/aria.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/astro_mcf5373l.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/at91rm9200ek.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/at91sam9261ek.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/atngw100.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/atngw100mkii.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/atstk1002.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bamboo.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf533-ezkit.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf561-ezkit.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/blanche.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/boston.h	/^# define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/bubinga.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/calimain.h	/^#define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/canyonlands.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/clearfog.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm-bf527.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm-bf537e.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm-bf537u.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm-bf548.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm5200.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm_t35.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cm_t3517.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/cobra5272.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/colibri_pxa270.h	/^#define	CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/dbau1x00.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/dlvision-10g.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/dlvision.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/dnp5370.h	/^#define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/dns325.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/dockstar.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/dreamplug.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ds109.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/eb_cpu5282.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ecovec.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/edb93xx.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/espt.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ethernut5.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/flea3.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/gdppc440etx.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/goflexhome.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/gr_ep2s60.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/grasshopper.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/grsim.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/grsim_leon2.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/highbank.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/hrcon.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ibf-dsp561.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/icon.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ids8313.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/inka4x0.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/integratorcp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/intip.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/io.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/io64.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/iocon.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ipek01.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/jupiter.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/katmai.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/kilauea.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/km82xx.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/kzm9g.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/lacie_kw.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ls2080ardb.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/luan.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/lwmon5.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/makalu.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/malta.h	/^#define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/mcx.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/meesc.h	/^# define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/microblaze-generic.h	/^# define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/motionpro.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/mpr2.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ms7720se.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ms7722se.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ms7750se.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/munices.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/mx31ads.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/neo.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/o2dnt-common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_beagle.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_cairo.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_evm.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_logic.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_overo.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_pandora.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/omap3_zoom1.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/openrd.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/openrisc-generic.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/p1_twr.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/pb1x00.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/pdm360ng.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/pm9261.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/pm9263.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/qemu-mips.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/qemu-mips64.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/r0p7734.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/r2dplus.h	/^#define CONFIG_ENV_ADDR /;"	d
CONFIG_ENV_ADDR	include/configs/r7780mp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/redwood.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/rsk7203.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/rsk7264.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/rsk7269.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sbc8349.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sbc8548.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sbc8641d.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sequoia.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sh7752evb.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sh7753evb.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/sheevaplug.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/shmin.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/smdk2410.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/smdkc100.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/socrates.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/spear-common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/strider.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/stv0991.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/suvd3.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/t3corp.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/t4qds.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/tam3517-common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/tao3530.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/tcm-bf537.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/usb_a9263.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/v38b.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/vct.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/ve8313.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/vexpress_aemv8a.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/vexpress_common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/vme8349.h	/^	#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/walnut.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/woodburn_common.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/work_92105.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/x600.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/yosemite.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/yucca.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/zipitz2.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/configs/zmx25.h	/^#define CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	include/environment.h	/^#  define	CONFIG_ENV_ADDR	/;"	d
CONFIG_ENV_ADDR	tools/envcrc.c	/^#  define CONFIG_ENV_ADDR	/;"	d	file:
CONFIG_ENV_ADDR_REDUND	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/MPC8349EMDS.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/PMC440.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/TQM5200.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/TQM834x.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/UCP1020.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/a3m071.h	/^#define CONFIG_ENV_ADDR_REDUND /;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/a4m072.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/ac14xx.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/acadia.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/am335x_igep0033.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/aria.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/bamboo.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/bubinga.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/calimain.h	/^#define CONFIG_ENV_ADDR_REDUND /;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/canyonlands.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/cm5200.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/dlvision-10g.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/dlvision.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/edb93xx.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/espt.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/gdppc440etx.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/hrcon.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/icon.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/ids8313.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/intip.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/io.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/io64.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/iocon.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/ipek01.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/jupiter.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/katmai.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/kilauea.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/luan.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/lwmon5.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/makalu.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/motionpro.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/mpc5121ads.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/ms7722se.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/munices.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/mx31ads.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/neo.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/o2d300.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/pdm360ng.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/sbc8349.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/sequoia.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/socrates.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/strider.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/t3corp.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/vct.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/vme8349.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/walnut.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/x600.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/configs/yosemite.h	/^#define CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	include/environment.h	/^#  define	CONFIG_ENV_ADDR_REDUND	/;"	d
CONFIG_ENV_ADDR_REDUND	tools/envcrc.c	/^#  define CONFIG_ENV_ADDR_REDUND	/;"	d	file:
CONFIG_ENV_BASE	include/configs/UCP1020.h	/^#define CONFIG_ENV_BASE	/;"	d
CONFIG_ENV_CALLBACK_LIST_STATIC	include/env_callback.h	/^#define CONFIG_ENV_CALLBACK_LIST_STATIC$/;"	d
CONFIG_ENV_COMMON_BOOT	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_COMMON_BOOT	/;"	d
CONFIG_ENV_COMMON_BOOT	include/configs/trats.h	/^#define CONFIG_ENV_COMMON_BOOT	/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/am335x_evm.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/baltos.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/bav335x.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/cm_fx6.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/cm_t335.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/cm_t35.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/cm_t3517.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/cm_t43.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/cm_t54.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/km/km_arm.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/ot1200.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/pcm051.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/pengwyn.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_EEPROM_IS_ON_I2C	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_ENV_EEPROM_IS_ON_I2C$/;"	d
CONFIG_ENV_FLAGS_LIST_STATIC	include/configs/ids8313.h	/^#define CONFIG_ENV_FLAGS_LIST_STATIC /;"	d
CONFIG_ENV_FLAGS_LIST_STATIC	include/env_flags.h	/^#define CONFIG_ENV_FLAGS_LIST_STATIC /;"	d
CONFIG_ENV_FLASHBOOT	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_FLASHBOOT	/;"	d
CONFIG_ENV_IS_EMBEDDED	include/configs/sh7752evb.h	/^#define CONFIG_ENV_IS_EMBEDDED$/;"	d
CONFIG_ENV_IS_EMBEDDED	include/configs/sh7753evb.h	/^#define CONFIG_ENV_IS_EMBEDDED$/;"	d
CONFIG_ENV_IS_EMBEDDED	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_IS_EMBEDDED$/;"	d
CONFIG_ENV_IS_EMBEDDED	include/environment.h	/^#   define CONFIG_ENV_IS_EMBEDDED$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bct-brettl2.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/br4.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/cm-bf527.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/cm-bf548.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/cm-bf561.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/ibf-dsp561.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/pr1.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_EMBEDDED_IN_LDR	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_IS_EMBEDDED_IN_LDR$/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH	/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/at91sam9261ek.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH$/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH	/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH	/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/meesc.h	/^# define CONFIG_ENV_IS_IN_DATAFLASH$/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/pm9261.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH	/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/pm9263.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH$/;"	d
CONFIG_ENV_IS_IN_DATAFLASH	include/configs/usb_a9263.h	/^#define CONFIG_ENV_IS_IN_DATAFLASH$/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/CPCI2DP.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/CPCI4052.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/MIP405.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/PATI.h	/^#define	CONFIG_ENV_IS_IN_EEPROM$/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/PIP405.h	/^#define CONFIG_ENV_IS_IN_EEPROM /;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/PLU405.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/PMC405DE.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/PMC440.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/VCMA9.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/VOM405.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/axs10x.h	/^#define CONFIG_ENV_IS_IN_EEPROM$/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/imx31_phycore.h	/^#define CONFIG_ENV_IS_IN_EEPROM$/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/km/km_arm.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/mecp5123.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/pcm030.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_EEPROM	include/configs/yosemite.h	/^#define CONFIG_ENV_IS_IN_EEPROM	/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/am335x_evm.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/am57xx_evm.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/hikey.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/k2g_evm.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/omap4_panda.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/picosam9g45.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FAT	include/configs/rpi.h	/^#define CONFIG_ENV_IS_IN_FAT$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/10m50_devboard.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/3c120_devboard.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/B4860QDS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5208EVBE.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5235EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5249EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5253DEMO.h	/^#	define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5253EVBE.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5272C3.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5275EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5282EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M53017EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5329EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5373EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5475EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/M5485EVB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8315ERDB.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8323ERDB.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC832XEMDS.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8349EMDS.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8349ITX.h	/^  #define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC837XEMDS.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC837XERDB.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8536DS.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8540ADS.h	/^  #define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8541CDS.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8544DS.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8548CDS.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8555CDS.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8560ADS.h	/^  #define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8568MDS.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8569MDS.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8572DS.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8610HPCD.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MPC8641HPCN.h	/^    #define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/MigoR.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/P1010RDB.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/P1022DS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/P1023RDB.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T102xQDS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T102xRDB.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T1040QDS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T104xRDB.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T208xQDS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T208xRDB.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T4240QDS.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/T4240RDB.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM5200.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM823L.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM823M.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM834x.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM850L.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM850M.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM855L.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM855M.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM860L.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM860M.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM862L.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM862M.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM866M.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/TQM885D.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/UCP1020.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/a3m071.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/a4m072.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ac14xx.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/acadia.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/adp-ag101p.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/am335x_evm.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/amcore.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ap325rxa.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/aria.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/astro_mcf5373l.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/at91rm9200ek.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/atngw100.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/atngw100mkii.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/atstk1002.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bamboo.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bav335x.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bct-brettl2.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf533-ezkit.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf538f-ezkit.h	/^#define	CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf561-ezkit.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/blanche.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/boston.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/bubinga.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/calimain.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/canmb.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/canyonlands.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm-bf527.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm-bf533.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm-bf537e.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm-bf537u.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm-bf548.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm-bf561.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cm5200.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/cobra5272.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/colibri_pxa270.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/corenet_ds.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/da850evm.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/digsy_mtc.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/dlvision-10g.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/dlvision.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/dnp5370.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/eb_cpu5282.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ecovec.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/edb93xx.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/edminiv2.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/espt.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/flea3.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/gdppc440etx.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/gr_ep2s60.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/grasshopper.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/hrcon.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ibf-dsp561.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/icon.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ids8313.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/imx27lite-common.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/inka4x0.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/integratorcp.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/intip.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/io.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/io64.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/iocon.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ipek01.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/jupiter.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/katmai.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/kilauea.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/km82xx.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/kzm9g.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ls2080ardb.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/luan.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/lwmon5.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/makalu.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/malta.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/motionpro.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/mpc5121ads.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/mpr2.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ms7720se.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ms7722se.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ms7750se.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/munices.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/mx31ads.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/mx35pdk.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/neo.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/o2dnt-common.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/p1_twr.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/pdm360ng.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/pm9261.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/pm9263.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/qemu-mips.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/qemu-mips64.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/r0p7734.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/r2dplus.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/r7780mp.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/redwood.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/rsk7203.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/rsk7264.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/rsk7269.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/sbc8349.h	/^	#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/sbc8548.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/sbc8641d.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/sequoia.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/shmin.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/smdk2410.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/socrates.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/spear3xx_evb.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/spear6xx_evb.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/stm32f429-discovery.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/strider.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/t3corp.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/tcm-bf537.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/v38b.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/vct.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/ve8313.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/vexpress_aemv8a.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/vexpress_common.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/vme8349.h	/^	#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/walnut.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/woodburn_common.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/x600.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xilinx-ppc440-generic.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xpedite1000.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xpedite517x.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xpedite520x.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xpedite537x.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xpedite550x.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/xtfpga.h	/^#define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/yosemite.h	/^#define CONFIG_ENV_IS_IN_FLASH /;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/yucca.h	/^#define	CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/zipitz2.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/zmx25.h	/^#define CONFIG_ENV_IS_IN_FLASH	/;"	d
CONFIG_ENV_IS_IN_FLASH	include/configs/zynq-common.h	/^#  define CONFIG_ENV_IS_IN_FLASH$/;"	d
CONFIG_ENV_IS_IN_MMC	include/autoconf.mk	/^CONFIG_ENV_IS_IN_MMC=y$/;"	m
CONFIG_ENV_IS_IN_MMC	include/configs/B4860QDS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/P1010RDB.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/P1022DS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T102xQDS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T102xRDB.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T1040QDS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T104xRDB.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T208xQDS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T208xRDB.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T4240QDS.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/T4240RDB.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/UCP1020.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/am335x_evm.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/am335x_shc.h	/^#define CONFIG_ENV_IS_IN_MMC	/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/apalis_t30.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/arndale.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/bav335x.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/bcm23550_w1d.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/bcm28155_ap.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/beaver.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/brppt1.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/brxre1.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/cardhu.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/cei-tk1-som.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/clearfog.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/cm_t54.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/colibri_t30.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/controlcenterd.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/corenet_ds.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/cyrus.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/dalmore.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/e2220-1170.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/el6x_common.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/evb_rk3288.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/evb_rk3399.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/fennec_rk3288.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/firefly-rk3288.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/jetson-tk1.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/kylin_rk3036.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ls1046ardb.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/miniarm_rk3288.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx23_olinuxino.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx23evk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx25pdk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx51evk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx53ard.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx53evk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx53loco.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx53smd.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6cuboxi.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6qarm2.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6sabre_common.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6slevk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6sxsabreauto.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6sxsabresd.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx6ullevk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/mx7dsabresd.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/novena.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/nyan-big.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/odroid.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/odroid_xu3.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/omap4_sdp4430.h	/^#define CONFIG_ENV_IS_IN_MMC	/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/omap5_uevm.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/origen.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/p1_twr.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/p2371-0000.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/p2371-2180.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/p2571.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/p2771-0000.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/paz00.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/pico-imx6ul.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/platinum.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/popmetal_rk3288.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/rock2.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/s32v234evb.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/s5p_goni.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/sc_sps_1.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/seaboard.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/smdkv310.h	/^#define CONFIG_ENV_IS_IN_MMC	/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/socfpga_mcvevk.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/socfpga_sockit.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/socfpga_socrates.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/sunxi-common.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/tbs2910.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/tec-ng.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/titanium.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/tqma6.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/trats.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/trats2.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ts4800.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/udoo.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/uniphier.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/usbarmory.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/venice2.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/ventana.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/wandboard.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/warp.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/warp7.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/whistler.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	include/configs/xpress.h	/^#define CONFIG_ENV_IS_IN_MMC$/;"	d
CONFIG_ENV_IS_IN_MMC	spl/include/autoconf.mk	/^CONFIG_ENV_IS_IN_MMC=y$/;"	m
CONFIG_ENV_IS_IN_MRAM	include/configs/M54418TWR.h	/^#define CONFIG_ENV_IS_IN_MRAM	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/B4860QDS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/P1010RDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/P1022DS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/P2041RDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T102xQDS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T102xRDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T1040QDS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T104xRDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T208xQDS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T208xRDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T4240QDS.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/T4240RDB.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/am335x_igep0033.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/am3517_crane.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/am3517_evm.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/apf27.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/apx4devkit.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9261ek.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/bav335x.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/brppt1.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/cm_t335.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/cm_t35.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/cm_t3517.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/colibri_imx7.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/colibri_t20.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/corenet_ds.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/corvus.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/da850evm.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/devkit3250.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/devkit8000.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/dns325.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/dockstar.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/goflexhome.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/guruplug.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/gw_ventana.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/harmony.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ib62x0.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/iconnect.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ipam390.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ls2080ardb.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/m28evk.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/m53evk.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/mcx.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/medcom-wide.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/meesc.h	/^# define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/mx31pdk.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/mx35pdk.h	/^	#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/nas220.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/nsa310s.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_beagle.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_cairo.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_evm.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_logic.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_overo.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_pandora.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omap3_zoom1.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/openrd.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/pengwyn.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/platinum.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/plutux.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/pm9261.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/pm9263.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/pm9g45.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/pogo_e02.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/sama5d2_ptc.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/sheevaplug.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/smartweb.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/snapper9260.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/snapper9g45.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/spear3xx_evb.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/spear6xx_evb.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/tam3517-common.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/tao3530.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/taurus.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/tec.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/titanium.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/tricorder.h	/^#define CONFIG_ENV_IS_IN_NAND$/;"	d
CONFIG_ENV_IS_IN_NAND	include/configs/work_92105.h	/^#define CONFIG_ENV_IS_IN_NAND	/;"	d
CONFIG_ENV_IS_IN_NVRAM	include/configs/bubinga.h	/^#define CONFIG_ENV_IS_IN_NVRAM	/;"	d
CONFIG_ENV_IS_IN_NVRAM	include/configs/highbank.h	/^#define CONFIG_ENV_IS_IN_NVRAM$/;"	d
CONFIG_ENV_IS_IN_NVRAM	include/configs/walnut.h	/^#define CONFIG_ENV_IS_IN_NVRAM	/;"	d
CONFIG_ENV_IS_IN_ONENAND	include/configs/omap3_evm.h	/^#define CONFIG_ENV_IS_IN_ONENAND$/;"	d
CONFIG_ENV_IS_IN_ONENAND	include/configs/smdkc100.h	/^#define CONFIG_ENV_IS_IN_ONENAND	/;"	d
CONFIG_ENV_IS_IN_ONENAND	include/configs/vct.h	/^#define	CONFIG_ENV_IS_IN_ONENAND$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/P2041RDB.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/T102xQDS.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/T102xRDB.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/T208xQDS.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/T208xRDB.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_REMOTE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_IS_IN_REMOTE$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/B4860QDS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/M54418TWR.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH	/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_IS_IN_SPI_FLASH	/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/P1010RDB.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/P1022DS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T102xQDS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T102xRDB.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T1040QDS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T104xRDB.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T208xQDS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T208xRDB.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T4240QDS.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/T4240RDB.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/UCP1020.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/am335x_evm.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ap121.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ap143.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bav335x.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf525-ucr2.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf561-acvilon.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/blackstamp.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/blackvme.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/br4.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/brppt1.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/cm_fx6.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/cm_t43.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/controlcenterd.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/corenet_ds.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/da850evm.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/db-88f6720.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/db-88f6820-amc.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/db-88f6820-gp.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/db-mv784mp-gp.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/dreamplug.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH	/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ds109.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH	/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ds414.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ea20.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ethernut5.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/exynos5-dt-common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/gplugd.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/gw_ventana.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ip04.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/km/km_arm.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH /;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/lacie_kw.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls1046ardb.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/lsxl.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH	/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ma5d4evk.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/maxbcm.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_IS_IN_SPI_FLASH	/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/mx6slevk.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/ot1200.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/pcm058.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/pr1.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/sh7752evb.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/sh7753evb.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/siemens-am33x-common.h	/^# define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/socfpga_is1.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/stv0991.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/theadorable.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/tqma6.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/trimslice.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/x86-chromebook.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/x86-common.h	/^#define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_SPI_FLASH	include/configs/zynq-common.h	/^#  define CONFIG_ENV_IS_IN_SPI_FLASH$/;"	d
CONFIG_ENV_IS_IN_UBI	include/configs/omap3_igep00x0.h	/^#define CONFIG_ENV_IS_IN_UBI	/;"	d
CONFIG_ENV_IS_NOWHERE	include/config_fsl_chain_trust.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/M54418TWR.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8315ERDB.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8323ERDB.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC832XEMDS.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8349EMDS.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8349ITX.h	/^  #define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC837XEMDS.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC837XERDB.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8536DS.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8540ADS.h	/^  #define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8560ADS.h	/^  #define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8610HPCD.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/MPC8641HPCN.h	/^    #define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/P1010RDB.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/P1022DS.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/P2041RDB.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/UCP1020.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/am335x_evm.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/am335x_shc.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/aspenite.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/baltos.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/bav335x.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/bcm_ep_board.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/bf506f-ezkit.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/bg0900.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/brppt1.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/chromebook_jerry.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/colibri_pxa270.h	/^#define	CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/controlcenterd.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/da850evm.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/dbau1x00.h	/^#define	CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/dns325.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/dockstar.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/dragonboard410c.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/dreamplug.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ds109.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/duovero.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ea20.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/efi-x86.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/espresso7420.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/goflexhome.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/grsim.h	/^#define CONFIG_ENV_IS_NOWHERE /;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/grsim_leon2.h	/^#define CONFIG_ENV_IS_NOWHERE /;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/guruplug.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/h2200.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/hrcon.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ib62x0.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/iconnect.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/integratorap.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/kc1.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/legoev3.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ls2080a_emu.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ls2080a_simu.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/lsxl.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/m28evk.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/m53evk.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/meson-gxbb-common.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/microblaze-generic.h	/^# define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/nas220.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/nokia_rx51.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/novena.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/nsa310s.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/nsim.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/openrd.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/openrisc-generic.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/p1_twr.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/pb1x00.h	/^#define	CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/pcm051.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/pepper.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/pic32mzdask.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/pogo_e02.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/qemu-ppce500.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/qemu-x86.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/rk3036_common.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/salvator-x.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sama5d3_xplained.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sama5d3xek.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sandbox.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sbc8349.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sc_sps_1.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sequoia.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sheevaplug.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sniper.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/stm32f746-disco.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/strider.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/sunxi-common.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/tb100.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/thunderx_88xx.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ti814x_evm.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/ti816x_evm.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/tplink_wdr4300.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/tricorder.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/vme8349.h	/^	#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/xfi3.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/xilinx-ppc.h	/^#define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_ENV_IS_NOWHERE	/;"	d
CONFIG_ENV_IS_NOWHERE	include/configs/zynq-common.h	/^#  define CONFIG_ENV_IS_NOWHERE$/;"	d
CONFIG_ENV_MAX_ENTRIES	include/configs/xilinx_zynqmp.h	/^# define CONFIG_ENV_MAX_ENTRIES	/;"	d
CONFIG_ENV_MAX_ENTRIES	lib/hashtable.c	/^#define	CONFIG_ENV_MAX_ENTRIES /;"	d	file:
CONFIG_ENV_MIN_ENTRIES	include/configs/clearfog.h	/^#define CONFIG_ENV_MIN_ENTRIES	/;"	d
CONFIG_ENV_MIN_ENTRIES	lib/hashtable.c	/^#define	CONFIG_ENV_MIN_ENTRIES /;"	d	file:
CONFIG_ENV_OFFSET	common/env_mmc.c	/^#define CONFIG_ENV_OFFSET /;"	d	file:
CONFIG_ENV_OFFSET	common/env_remote.c	/^#define CONFIG_ENV_OFFSET /;"	d	file:
CONFIG_ENV_OFFSET	include/autoconf.mk	/^CONFIG_ENV_OFFSET="(544 << 10)"$/;"	m
CONFIG_ENV_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/CPCI2DP.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5208EVBE.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5235EVB.h	/^#	define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5249EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5253DEMO.h	/^#	define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5272C3.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5275EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M53017EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5329EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5373EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M54418TWR.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5475EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/M5485EVB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/MIP405.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/MigoR.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/P1010RDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/P1022DS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/P2041RDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/PATI.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/PIP405.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/PLU405.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/PMC405DE.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/PMC440.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T102xQDS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T102xRDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T4240QDS.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T4240QDS.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/T4240RDB.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/T4240RDB.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/TQM823L.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM823M.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM850L.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM850M.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM855L.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM855M.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM860L.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM860M.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM862L.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM862M.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/UCP1020.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/VCMA9.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/VOM405.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/am335x_evm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/am335x_igep0033.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/am335x_shc.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/am3517_crane.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/am3517_evm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/ap121.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/ap143.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/ap325rxa.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/apalis_t30.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/apf27.h	/^#define	CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/apx4devkit.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/arndale.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/astro_mcf5373l.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9261ek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/axs10x.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bamboo.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bav335x.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bayleybay.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bcm23550_w1d.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bcm28155_ap.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bct-brettl2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/beaver.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf525-ucr2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf561-acvilon.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf561-ezkit.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/blackstamp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/blackvme.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/blanche.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/br4.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/brppt1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/brxre1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/canmb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cardhu.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cei-tk1-som.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/chromebook_link.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/chromebook_samus.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/clearfog.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm-bf527.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm-bf533.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm-bf537e.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm-bf537u.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm-bf548.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm-bf561.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm_fx6.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm_t335.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm_t35.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm_t3517.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm_t43.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cm_t54.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cobra5272.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/colibri_imx7.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/colibri_t20.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/colibri_t30.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/colibri_vf.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/controlcenterd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/corvus.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cougarcanyon2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/crownbay.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/cyrus.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/da850evm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/dalmore.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/db-88f6720.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/db-88f6820-amc.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/db-88f6820-gp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/db-mv784mp-gp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/devkit3250.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/devkit8000.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/dfi-bt700.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/dnp5370.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/dns325.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/dockstar.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/dreamplug.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ds109.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ds414.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/e2220-1170.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ea20.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ecovec.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/edminiv2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/el6x_common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/espt.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/etamin.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/ethernut5.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/evb_rk3288.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/evb_rk3399.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/exynos5-dt-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/fennec_rk3288.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/firefly-rk3288.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/galileo.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/goflexhome.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/gplugd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/guruplug.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/harmony.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ib62x0.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ibf-dsp561.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/iconnect.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/imx31_phycore.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/imx6qdl_icore.h	/^#  define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ip04.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ipam390.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/jetson-tk1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/km/km_arm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/km82xx.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/kylin_rk3036.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/kzm9g.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/lacie_kw.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls1046ardb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ls2080ardb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/lsxl.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/m28evk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/m53evk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ma5d4evk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/maxbcm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mcx.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mecp5123.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/medcom-wide.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/meesc.h	/^# define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/miniarm_rk3288.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/minnowmax.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ms7722se.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/munices.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx23_olinuxino.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx23evk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx25pdk.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx28evk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx31pdk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx35pdk.h	/^	#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx51evk.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx53ard.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx53evk.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx53loco.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx53smd.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx6cuboxi.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6qarm2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6sabre_common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6slevk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6slevk.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/mx6sxsabreauto.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6sxsabresd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx6ullevk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/mx7dsabresd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/nas220.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/novena.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/nsa310s.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/nsim.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/nyan-big.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/odroid.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/odroid_xu3.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_beagle.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_cairo.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_evm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_logic.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_overo.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_pandora.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap3_zoom1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap4_sdp4430.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omap5_uevm.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/openrd.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/origen.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ot1200.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/p2371-0000.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/p2371-2180.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/p2571.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/p2771-0000.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/paz00.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/pcm030.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pcm052.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pcm058.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pcm058.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/pengwyn.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pico-imx6ul.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/platinum.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/plutux.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pm9261.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pm9263.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pm9g45.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/pogo_e02.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/popmetal_rk3288.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/pr1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/r0p7734.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/rock2.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/rsk7264.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/rsk7269.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/s32v234evb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/s5p_goni.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sama5d2_ptc.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sc_sps_1.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/seaboard.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/secomx6quq7.h	/^	#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sh7752evb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sh7753evb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sheevaplug.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/siemens-am33x-common.h	/^# define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/smartweb.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/smdkc100.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/smdkv310.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/snapper9260.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/snapper9g45.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/socfpga_common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/som-6896.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/som-db5800-som-6867.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/spear-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/stm32f429-discovery.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/stv0991.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/sunxi-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/suvd3.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tam3517-common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tao3530.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/taurus.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tb100.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tbs2910.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tcm-bf537.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tec-ng.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tec.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/theadorable.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/titanium.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tqma6.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/trats.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/trats2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/tricorder.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/trimslice.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ts4800.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/udoo.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/uniphier.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/usb_a9263.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/usbarmory.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/venice2.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/ventana.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/vexpress_common.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/vf610twr.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/vinco.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/wandboard.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/warp.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/warp7.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/whistler.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/work_92105.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/x86-chromebook.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/xpress.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/xtfpga.h	/^#define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/configs/yosemite.h	/^#define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/configs/zynq-common.h	/^# define CONFIG_ENV_OFFSET	/;"	d
CONFIG_ENV_OFFSET	include/environment.h	/^#  define	CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	include/environment.h	/^#  define CONFIG_ENV_OFFSET /;"	d
CONFIG_ENV_OFFSET	spl/include/autoconf.mk	/^CONFIG_ENV_OFFSET="(544 << 10)"$/;"	m
CONFIG_ENV_OFFSET	tools/envcrc.c	/^#  define CONFIG_ENV_OFFSET /;"	d	file:
CONFIG_ENV_OFFSET_REDUND	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM823L.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM823M.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM850L.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM850M.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM855L.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM855M.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM860L.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM860M.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM862L.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM862M.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM866M.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/TQM885D.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/UCP1020.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/am335x_evm.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/am335x_shc.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/apf27.h	/^#define	CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/apx4devkit.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9261ek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/bav335x.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/brppt1.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/brxre1.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/cm_t54.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/corvus.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/draco.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/eco5pk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/etamin.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/flea3.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/imx27lite-common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/km/km_arm.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/km82xx.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/kylin_rk3036.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/m28evk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/m53evk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/ma5d4evk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/mcx.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/munices.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/mx28evk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/mx31pdk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/mx35pdk.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/novena.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/omap5_uevm.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/pcm052.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/pcm058.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/platinum.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/pm9261.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/pm9263.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/pm9g45.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/rastaban.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/sama5d2_ptc.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/smartweb.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/tam3517-common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/taurus.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/thuban.h	/^#define CONFIG_ENV_OFFSET_REDUND /;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/titanium.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/tqma6.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/tricorder.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/ve8313.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/woodburn_common.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OFFSET_REDUND	include/configs/work_92105.h	/^#define CONFIG_ENV_OFFSET_REDUND	/;"	d
CONFIG_ENV_OVERWRITE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/10m50_devboard.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/3c120_devboard.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/M52277EVB.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8313ERDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8315ERDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8323ERDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC832XEMDS.h	/^ *\/ #define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8349EMDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8349ITX.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC837XEMDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC837XERDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8540ADS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8541CDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8544DS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8548CDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8555CDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8560ADS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8568MDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8569MDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8572DS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8610HPCD.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MPC8641HPCN.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/MigoR.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/P1010RDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/P1023RDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/P2041RDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T102xQDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T102xRDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T104xRDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T208xQDS.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T208xRDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/UCP1020.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/VCMA9.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/a3m071.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/a4m072.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ac14xx.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/adp-ag101p.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/am3517_crane.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/am3517_evm.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ap325rxa.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/apf27.h	/^#define	CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/apx4devkit.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/aria.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/arndale.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/at91rm9200ek.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bcm_ep_board.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bf525-ucr2.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bfin_adi_common.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bg0900.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/blackstamp.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/bur_cfg_common.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/cm5200.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/cm_t35.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/cm_t3517.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/colibri_pxa270.h	/^#define	CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/colibri_vf.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/cyrus.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/digsy_mtc.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ecovec.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/edb93xx.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/edminiv2.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/el6x_common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/espt.h	/^#define CONFIG_ENV_OVERWRITE /;"	d
CONFIG_ENV_OVERWRITE	include/configs/exynos-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/flea3.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/gr_ep2s60.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/grsim.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/grsim_leon2.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/hrcon.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/imx31_phycore.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/imx6qdl_icore.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/inka4x0.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ip04.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ipek01.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/jupiter.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/kc1.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/km/km_arm.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls1046ardb.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ls2080a_common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mcx.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ms7722se.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ms7750se.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/munices.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx23_olinuxino.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx23evk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx25pdk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx28evk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx31ads.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx31pdk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx35pdk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx51evk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx53ard.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx53evk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx53loco.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx53smd.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx6_common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/mx7_common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/nokia_rx51.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/o2dnt-common.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/odroid.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/omap3_beagle.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/omap3_cairo.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/omap3_evm.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/omap4_panda.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/p1_twr.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/pcm030.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/pcm052.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/pdm360ng.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/pm9261.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/pm9263.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/qemu-mips.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/qemu-mips64.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/qemu-ppce500.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/r0p7734.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/r2dplus.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/r7780mp.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/rcar-gen3-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/s32v234evb.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/s5p_goni.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sbc8349.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sbc8548.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sbc8641d.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sh7752evb.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sh7753evb.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_OVERWRITE /;"	d
CONFIG_ENV_OVERWRITE	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/smartweb.h	/^#define CONFIG_ENV_OVERWRITE /;"	d
CONFIG_ENV_OVERWRITE	include/configs/smdk2410.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/smdkc100.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/smdkv310.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/snapper9260.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/snapper9g45.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/sniper.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/socfpga_mcvevk.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/spear-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/strider.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/t4qds.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/tam3517-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/tao3530.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/tbs2910.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/tegra-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/theadorable.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ti814x_evm.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ti816x_evm.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/ti_armv7_common.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/trats.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/trats2.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/tricorder.h	/^#define CONFIG_ENV_OVERWRITE /;"	d
CONFIG_ENV_OVERWRITE	include/configs/ts4800.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/v38b.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/vexpress_common.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/vf610twr.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/vme8349.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/woodburn_common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/x86-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/xfi3.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/yucca.h	/^#define CONFIG_ENV_OVERWRITE	/;"	d
CONFIG_ENV_OVERWRITE	include/configs/zipitz2.h	/^#define	CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_OVERWRITE	include/configs/zynq-common.h	/^#define CONFIG_ENV_OVERWRITE$/;"	d
CONFIG_ENV_RANGE	common/env_nand.c	/^#define CONFIG_ENV_RANGE	/;"	d	file:
CONFIG_ENV_RANGE	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/P1010RDB.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/P1022DS.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/apf27.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/apx4devkit.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/colibri_vf.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/draco.h	/^#define CONFIG_ENV_RANGE /;"	d
CONFIG_ENV_RANGE	include/configs/etamin.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/m28evk.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/m53evk.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/mx28evk.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/rastaban.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/smartweb.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/spear-common.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/thuban.h	/^#define CONFIG_ENV_RANGE /;"	d
CONFIG_ENV_RANGE	include/configs/tricorder.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RANGE	include/configs/vf610twr.h	/^#define CONFIG_ENV_RANGE	/;"	d
CONFIG_ENV_RDADDR	include/configs/tricorder.h	/^#define CONFIG_ENV_RDADDR	/;"	d
CONFIG_ENV_REFLASH	include/configs/dragonboard410c.h	/^#define CONFIG_ENV_REFLASH /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5208EVBE.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5235EVB.h	/^#	define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5249EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5253DEMO.h	/^#	define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5253EVBE.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5272C3.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5275EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M53017EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5329EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5373EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/M5485EVB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8315ERDB.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8323ERDB.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC832XEMDS.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8349EMDS.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8349ITX.h	/^  #define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC837XEMDS.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC837XERDB.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8536DS.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8540ADS.h	/^  #define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8560ADS.h	/^  #define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8572DS.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MPC8641HPCN.h	/^    #define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/MigoR.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/P1022DS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/PMC440.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM5200.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM823M.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM834x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM850M.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM855M.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM860M.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM862M.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM866M.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/TQM885D.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/UCP1020.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/a3m071.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/a4m072.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ac14xx.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/acadia.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/adp-ag101p.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/amcore.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ap121.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ap143.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ap325rxa.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/apx4devkit.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/aria.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bamboo.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bav335x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bayleybay.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bct-brettl2.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf525-ucr2.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf533-ezkit.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf538f-ezkit.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf561-acvilon.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf561-ezkit.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/blackstamp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/blackvme.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/blanche.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/boston.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/br4.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/brppt1.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/bubinga.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/calimain.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/canmb.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/canyonlands.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/chromebook_link.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/chromebook_samus.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/clearfog.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm-bf527.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm-bf533.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm-bf537e.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm-bf537u.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm-bf561.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm5200.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm_fx6.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cm_t43.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cobra5272.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/colibri_imx7.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/cougarcanyon2.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/crownbay.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/da850evm.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/db-88f6720.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/db-88f6820-amc.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/db-88f6820-gp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dfi-bt700.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dlvision-10g.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dlvision.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dnp5370.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dns325.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dockstar.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/dreamplug.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ds109.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ds414.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ea20.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/eb_cpu5282.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ecovec.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/edb93xx.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/edminiv2.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/espt.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ethernut5.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/flea3.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/galileo.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gdppc440etx.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/goflexhome.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gplugd.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/grsim.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/guruplug.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/hrcon.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ib62x0.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ibf-dsp561.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/icon.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/iconnect.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/imx6qdl_icore.h	/^#  define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/inka4x0.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/integratorcp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/intip.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/io.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/io64.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/iocon.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ip04.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ipek01.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/jupiter.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/katmai.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/kilauea.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/km82xx.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/lacie_kw.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls1046ardb.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ls2080ardb.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/lsxl.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/luan.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/lwmon5.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/m28evk.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/m53evk.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ma5d4evk.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/makalu.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/malta.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/maxbcm.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/minnowmax.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/motionpro.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mpr2.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ms7720se.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ms7722se.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ms7750se.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/munices.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mx28evk.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mx31ads.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mx35pdk.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/mx6slevk.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/nas220.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/neo.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/nsa310s.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/openrd.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ot1200.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/p1_twr.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pcm052.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pcm058.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pcm058.h	/^#define CONFIG_ENV_SECT_SIZE /;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/platinum.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pm9261.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pm9263.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pogo_e02.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/pr1.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/r0p7734.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/r2dplus.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/r7780mp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/rcar-gen3-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/redwood.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/rsk7203.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/rsk7264.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/rsk7269.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sbc8349.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sbc8548.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sequoia.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sh7752evb.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sh7753evb.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/sheevaplug.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/shmin.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/siemens-am33x-common.h	/^# define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/socrates.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/som-6896.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/som-db5800-som-6867.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/spear-common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/stm32f429-discovery.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/strider.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/stv0991.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/t3corp.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/tcm-bf537.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/theadorable.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/titanium.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/tqma6.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/trimslice.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/v38b.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/vct.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/ve8313.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/vexpress_common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/vf610twr.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/vme8349.h	/^	#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/walnut.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/woodburn_common.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/x600.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/x86-chromebook.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xilinx-ppc440-generic.h	/^#define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xpedite1000.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xpedite520x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/xpedite550x.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/yosemite.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/yucca.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/zmx25.h	/^#define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/configs/zynq-common.h	/^# define CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SECT_SIZE	include/environment.h	/^#   define	CONFIG_ENV_SECT_SIZE	/;"	d
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS	include/configs/draco.h	/^#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS /;"	d
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS	include/configs/etamin.h	/^#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS /;"	d
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS	include/configs/pxm2.h	/^#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS /;"	d
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS	include/configs/rastaban.h	/^#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS /;"	d
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS	include/configs/thuban.h	/^#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS /;"	d
CONFIG_ENV_SETTINGS_NAND_V1	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_SETTINGS_NAND_V1 /;"	d
CONFIG_ENV_SETTINGS_NAND_V2	include/configs/etamin.h	/^#define CONFIG_ENV_SETTINGS_NAND_V2 /;"	d
CONFIG_ENV_SETTINGS_NAND_V2	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_SETTINGS_NAND_V2 /;"	d
CONFIG_ENV_SETTINGS_V1	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_SETTINGS_V1 /;"	d
CONFIG_ENV_SETTINGS_V2	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_SETTINGS_V2 /;"	d
CONFIG_ENV_SIZE	include/autoconf.mk	/^CONFIG_ENV_SIZE="(128 << 10)"$/;"	m
CONFIG_ENV_SIZE	include/configs/10m50_devboard.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/3c120_devboard.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/CPCI2DP.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/CPCI4052.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M5208EVBE.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M5235EVB.h	/^#	define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M5249EVB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M5282EVB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M53017EVB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MIP405.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8315ERDB.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8323ERDB.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC832XEMDS.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8349EMDS.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8349ITX.h	/^  #define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC837XEMDS.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC837XERDB.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8536DS.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8540ADS.h	/^  #define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8560ADS.h	/^  #define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8572DS.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/MigoR.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/P1022DS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/PATI.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/PATI.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/PIP405.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/PLU405.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/PMC405DE.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/PMC440.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/TQM5200.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM823L.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM823M.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM834x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM850L.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM850M.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM855L.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM855M.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM860L.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM860M.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM862L.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM862M.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM866M.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/TQM885D.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/UCP1020.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/VCMA9.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/VOM405.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/a3m071.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/a4m072.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ac14xx.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/acadia.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/adp-ag101p.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am335x_igep0033.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am335x_shc.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/am57xx_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/amcore.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ap121.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/ap143.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/ap325rxa.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/apf27.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/apx4devkit.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/aria.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/aspenite.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91rm9200ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9260ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9261ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9263ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9rlek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/atngw100.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/atngw100mkii.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/atstk1002.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/axs10x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/baltos.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bamboo.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bamboo.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bav335x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bcm_ep_board.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bct-brettl2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf506f-ezkit.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf525-ucr2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf561-acvilon.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf561-ezkit.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/bg0900.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/blackstamp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/blackvme.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/blanche.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/boston.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/br4.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/brppt1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/brxre1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bubinga.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/bubinga.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/calimain.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/canmb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/canyonlands.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/clearfog.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm-bf527.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm-bf533.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm-bf537e.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm-bf537u.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm-bf548.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm-bf561.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm5200.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm_fx6.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm_t335.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm_t35.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm_t3517.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm_t43.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cm_t54.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/colibri_imx7.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/colibri_t20.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/colibri_vf.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/corvus.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/cyrus.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/da850evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/db-88f6720.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/db-88f6820-amc.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/db-88f6820-gp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dbau1x00.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/devkit3250.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/devkit8000.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dlvision-10g.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dlvision.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dnp5370.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/dns325.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dockstar.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dragonboard410c.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/dreamplug.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ds109.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ds414.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ea20.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ecovec.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/edb93xx.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/edminiv2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/el6x_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/espt.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ethernut5.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/exynos7420-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/flea3.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gdppc440etx.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/goflexhome.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gplugd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/grasshopper.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/grsim.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/guruplug.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/h2200.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/highbank.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/hikey.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/hrcon.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ib62x0.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ibf-dsp561.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/icon.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/iconnect.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ids8313.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/imx27lite-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/imx31_phycore.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/imx6qdl_icore.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/inka4x0.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/integratorap.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/integratorcp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/intip.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/io.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/io64.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/iocon.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ip04.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ipam390.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ipek01.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/jupiter.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/katmai.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/kc1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/kilauea.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/km/km-powerpc.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/kylin_rk3036.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/kzm9g.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/lacie_kw.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/legoev3.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1043aqds.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1043ardb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1046aqds.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls1046ardb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls2080a_emu.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls2080a_simu.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls2080aqds.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ls2080ardb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/lsxl.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/luan.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/lwmon5.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/m28evk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/m53evk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ma5d4evk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/makalu.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/malta.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/maxbcm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mcx.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mecp5123.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/meesc.h	/^# define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/meson-gxbb-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/microblaze-generic.h	/^# define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/motionpro.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mpr2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ms7720se.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ms7722se.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ms7750se.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/munices.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx23_olinuxino.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx23evk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx25pdk.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/mx28evk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx31ads.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx35pdk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx51evk.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/mx53ard.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/mx53evk.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/mx53loco.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/mx53smd.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/mx6cuboxi.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6qarm2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6sabre_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6slevk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6sxsabresd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx6ullevk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/mx7dsabresd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/nas220.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/neo.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/nokia_rx51.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/novena.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/nsa310s.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/nsim.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/odroid.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/odroid_xu3.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_overo.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_pandora.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap3_zoom1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omap5_uevm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/openrd.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/openrisc-generic.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/origen.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ot1200.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/p1_twr.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pb1x00.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pcm030.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pcm051.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pcm052.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pcm058.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pengwyn.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pepper.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pic32mzdask.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pico-imx6ul.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/picosam9g45.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/platinum.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pm9261.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pm9261.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pm9263.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pm9263.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pm9g45.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pogo_e02.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/pr1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/qemu-mips.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/qemu-mips64.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/qemu-ppce500.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/r0p7734.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/r2dplus.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/r7780mp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rcar-gen3-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/redwood.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rk3036_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rk3288_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rk3399_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rpi.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rsk7203.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rsk7264.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/rsk7269.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/s32v234evb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/s5p_goni.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sandbox.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sbc8349.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sbc8548.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sc_sps_1.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/secomx6quq7.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sequoia.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sequoia.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sh7752evb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sh7753evb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sheevaplug.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/shmin.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/smartweb.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/smdk2410.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/smdkc100.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/smdkv310.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/snapper9260.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/snapper9g45.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sniper.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/socrates.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/spear-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/stm32f429-discovery.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/stm32f746-disco.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/strider.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/stv0991.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/sunxi-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/t3corp.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tao3530.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/taurus.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tb100.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tbs2910.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tcm-bf537.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tegra-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/theadorable.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/thunderx_88xx.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ti_omap4_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/titanium.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tplink_wdr4300.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tqma6.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/trats.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/trats2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/tricorder.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ts4800.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/udoo.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/uniphier.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/usb_a9263.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/usbarmory.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/v38b.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/vct.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/ve8313.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/vexpress_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/vf610twr.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/vinco.h	/^#define CONFIG_ENV_SIZE /;"	d
CONFIG_ENV_SIZE	include/configs/vme8349.h	/^	#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/walnut.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/wandboard.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/warp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/warp7.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/woodburn_common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/work_92105.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/x600.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/x86-chromebook.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/x86-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xfi3.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xilinx-ppc440-generic.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xpedite1000.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xpedite520x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xpedite550x.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xpress.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/xtfpga.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/yosemite.h	/^#define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/yosemite.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/yucca.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/zipitz2.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/zmx25.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/configs/zynq-common.h	/^#define CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	include/environment.h	/^#   define	CONFIG_ENV_SIZE	/;"	d
CONFIG_ENV_SIZE	spl/include/autoconf.mk	/^CONFIG_ENV_SIZE="(128 << 10)"$/;"	m
CONFIG_ENV_SIZE	tools/envcrc.c	/^#  define CONFIG_ENV_SIZE	/;"	d	file:
CONFIG_ENV_SIZE_REDUND	include/configs/MPC8308RDB.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/MPC8313ERDB.h	/^	#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/MPC8349EMDS.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/MigoR.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/PMC440.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM5200.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM823L.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM823M.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM834x.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM850L.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM850M.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM855L.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM855M.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM860L.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM860M.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM862L.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM862M.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM866M.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/TQM885D.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/UCP1020.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/a3m071.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/a4m072.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ac14xx.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/acadia.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/am335x_igep0033.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/am335x_shc.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ap325rxa.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ap_sh4a_4a.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/apf27.h	/^#define	CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/apx4devkit.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/aria.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/armadillo-800eva.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/bamboo.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/blanche.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/bubinga.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/calimain.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/canyonlands.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/cm5200.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/dlvision-10g.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/dlvision.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/draco.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ecovec.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/edb93xx.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/espt.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/etamin.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/flea3.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/gdppc440etx.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/hrcon.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/icon.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ids8313.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/imx27lite-common.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/intip.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/io.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/io64.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/iocon.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ipek01.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/jupiter.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/katmai.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/kilauea.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/km/km83xx-common.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/km82xx.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/luan.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/lwmon5.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/m28evk.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/m53evk.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ma5d4evk.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/makalu.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/mcx.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/motionpro.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/mpc5121ads.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/mpc8308_p1m.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ms7722se.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/munices.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/mx28evk.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/mx31ads.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/mx35pdk.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/neo.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/novena.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/o2d300.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/pcm052.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/pcm058.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/pdm360ng.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/platinum.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/r0p7734.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/rastaban.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/rcar-gen2-common.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/rcar-gen3-common.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sbc8349.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sequoia.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sh7752evb.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sh7753evb.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sh7757lcr.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sh7763rdp.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/sh7785lcr.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/socrates.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/strider.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/t3corp.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/tam3517-common.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/thuban.h	/^#define CONFIG_ENV_SIZE_REDUND /;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/titanium.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/vct.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/ve8313.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/vme8349.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/walnut.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/woodburn_common.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/x600.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/configs/yosemite.h	/^#define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	include/environment.h	/^#  define CONFIG_ENV_SIZE_REDUND	/;"	d
CONFIG_ENV_SIZE_REDUND	tools/envcrc.c	/^#  define CONFIG_ENV_SIZE_REDUND	/;"	d	file:
CONFIG_ENV_SPI_BASE	include/configs/exynos5-dt-common.h	/^#define CONFIG_ENV_SPI_BASE	/;"	d
CONFIG_ENV_SPI_BUS	arch/arm/mach-kirkwood/include/mach/config.h	/^# define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	arch/arm/mach-mvebu/include/mach/config.h	/^# define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	common/env_sf.c	/^# define CONFIG_ENV_SPI_BUS	/;"	d	file:
CONFIG_ENV_SPI_BUS	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/P1010RDB.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/P1022DS.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/T102xQDS.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/T102xRDB.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/T208xQDS.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/T208xRDB.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/UCP1020.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/bg0900.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/cm_fx6.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/controlcenterd.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/db-88f6820-amc.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/dreamplug.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/ds109.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/exynos5-common.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/ls1043a_common.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/ls1046a_common.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/m28evk.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/mx28evk.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/mx6slevk.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/ot1200.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/pcm058.h	/^#define CONFIG_ENV_SPI_BUS /;"	d
CONFIG_ENV_SPI_BUS	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/tqma6.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_BUS	include/configs/vinco.h	/^#define CONFIG_ENV_SPI_BUS	/;"	d
CONFIG_ENV_SPI_CS	arch/arm/mach-kirkwood/include/mach/config.h	/^# define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	arch/arm/mach-mvebu/include/mach/config.h	/^# define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	arch/blackfin/include/asm/config.h	/^# define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	common/env_sf.c	/^# define CONFIG_ENV_SPI_CS	/;"	d	file:
CONFIG_ENV_SPI_CS	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/M52277EVB.h	/^#	define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/M54418TWR.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/M54451EVB.h	/^#	define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/M54455EVB.h	/^#	define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/P1010RDB.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/P1022DS.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/T102xQDS.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/T102xRDB.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/T208xQDS.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/T208xRDB.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/UCP1020.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/bg0900.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/cm_fx6.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/controlcenterd.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/dreamplug.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/ds109.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/gplugd.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/ls1043a_common.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/ls1046a_common.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/m28evk.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/mx28evk.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/mx6slevk.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/ot1200.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/pcm058.h	/^#define CONFIG_ENV_SPI_CS /;"	d
CONFIG_ENV_SPI_CS	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/tqma6.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_CS	include/configs/vinco.h	/^#define CONFIG_ENV_SPI_CS	/;"	d
CONFIG_ENV_SPI_MAX_HZ	arch/arm/mach-kirkwood/include/mach/config.h	/^# define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	arch/arm/mach-mvebu/include/mach/config.h	/^# define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	common/env_sf.c	/^# define CONFIG_ENV_SPI_MAX_HZ	/;"	d	file:
CONFIG_ENV_SPI_MAX_HZ	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/P1010RDB.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/P1022DS.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T102xQDS.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T102xRDB.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T208xQDS.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T208xRDB.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/UCP1020.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/am335x_evm.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ap121.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ap143.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/at91sam9x5ek.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bav335x.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf506f-ezkit.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf518f-ezbrd.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf525-ucr2.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf526-ezbrd.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf527-ezkit.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf527-sdp.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf533-stamp.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf537-minotaur.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf537-pnav.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf537-srv1.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf537-stamp.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf538f-ezkit.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf548-ezkit.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf561-acvilon.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bf609-ezkit.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/bg0900.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/blackstamp.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/blackvme.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/br4.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/brppt1.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/cm-bf537e.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/cm-bf537u.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/cm_fx6.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/cm_t43.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/controlcenterd.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/da850evm.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/dra7xx_evm.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/dreamplug.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ds109.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ea20.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/exynos5-common.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ip04.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/lacie_kw.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/legoev3.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ls1043a_common.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ls1046a_common.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/lsxl.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/m28evk.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/mx28evk.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/mx6slevk.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/omapl138_lcdk.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ot1200.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/pcm058.h	/^#define CONFIG_ENV_SPI_MAX_HZ /;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/pr1.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/siemens-am33x-common.h	/^# define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/tcm-bf518.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/tcm-bf537.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/tqma6.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/trimslice.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MAX_HZ	include/configs/vinco.h	/^#define CONFIG_ENV_SPI_MAX_HZ	/;"	d
CONFIG_ENV_SPI_MODE	common/env_sf.c	/^# define CONFIG_ENV_SPI_MODE	/;"	d	file:
CONFIG_ENV_SPI_MODE	include/configs/B4860QDS.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/BSC9131RDB.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/BSC9132QDS.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/C29XPCIE.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/MPC8536DS.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/P1010RDB.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/P1022DS.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/P2041RDB.h	/^	#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/T102xQDS.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/T102xRDB.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/T1040QDS.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/T104xRDB.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/T208xQDS.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/T208xRDB.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/T4240QDS.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/T4240RDB.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/UCP1020.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/aristainetos-common.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/at91sam9n12ek.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/bg0900.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/cm_fx6.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/controlcenterd.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/corenet_ds.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/embestmx6boards.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/exynos5-common.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/ge_bx50v3.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/gw_ventana.h	/^  #define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/km/km_arm.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/ls1012a_common.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/ls1043a_common.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/ls1046a_common.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/m28evk.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/microblaze-generic.h	/^#  define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/mx28evk.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/mx6slevk.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/nitrogen6x.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/ot1200.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/pcm058.h	/^#define CONFIG_ENV_SPI_MODE /;"	d
CONFIG_ENV_SPI_MODE	include/configs/socfpga_sr1500.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/tqma6.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/trimslice.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SPI_MODE	include/configs/vinco.h	/^#define CONFIG_ENV_SPI_MODE	/;"	d
CONFIG_ENV_SROM_BANK	include/configs/exynos5-common.h	/^#define CONFIG_ENV_SROM_BANK	/;"	d
CONFIG_ENV_SROM_BANK	include/configs/smdkc100.h	/^#define CONFIG_ENV_SROM_BANK /;"	d
CONFIG_ENV_SROM_BANK	include/configs/smdkv310.h	/^#define CONFIG_ENV_SROM_BANK	/;"	d
CONFIG_ENV_TOTAL_SIZE	include/configs/km/km_arm.h	/^#define CONFIG_ENV_TOTAL_SIZE	/;"	d
CONFIG_ENV_TOTAL_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_ENV_TOTAL_SIZE	/;"	d
CONFIG_ENV_UBIFS_OPTION	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_UBIFS_OPTION	/;"	d
CONFIG_ENV_UBI_MTD	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_UBI_MTD	/;"	d
CONFIG_ENV_UBI_PART	include/configs/omap3_igep00x0.h	/^#define CONFIG_ENV_UBI_PART	/;"	d
CONFIG_ENV_UBI_VOLUME	include/configs/omap3_igep00x0.h	/^#define CONFIG_ENV_UBI_VOLUME	/;"	d
CONFIG_ENV_UBI_VOLUME_REDUND	include/configs/omap3_igep00x0.h	/^#define CONFIG_ENV_UBI_VOLUME_REDUND	/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/autoconf.mk	/^CONFIG_ENV_VARS_UBOOT_CONFIG=y$/;"	m
CONFIG_ENV_VARS_UBOOT_CONFIG	include/config_distro_defaults.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/am335x_shc.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/apf27.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/at91-sama5_common.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/dragonboard410c.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/hikey.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/rpi.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/s5p_goni.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/siemens-am33x-common.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/tegra-common.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/ti814x_evm.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/ti_armv7_common.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG	/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/trats.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/trats2.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_CONFIG	include/configs/xilinx_zynqmp.h	/^#define CONFIG_ENV_VARS_UBOOT_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/am335x_evm.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/am335x_igep0033.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/am335x_shc.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/am335x_sl50.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/am43xx_evm.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/baltos.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/bav335x.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/cgtqmx6eval.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/cm_t43.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/colibri_vf.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/duovero.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/el6x_common.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/mx6cuboxi.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/mx6sabre_common.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/mx6ullevk.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/odroid.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/odroid_xu3.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/omap4_panda.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/pcm051.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/pengwyn.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/pepper.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/rpi.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/s5p_goni.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/s5pc210_universal.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/sama5d3xek.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/ti814x_evm.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/ti_omap5_common.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/trats.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/trats2.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/udoo.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG	include/configs/wandboard.h	/^#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG$/;"	d
CONFIG_ENV_VERSION	include/configs/apf27.h	/^#define CONFIG_ENV_VERSION	/;"	d
CONFIG_EP9301	include/configs/edb93xx.h	/^#define CONFIG_EP9301$/;"	d
CONFIG_EP9302	include/configs/edb93xx.h	/^#define CONFIG_EP9302$/;"	d
CONFIG_EP9307	include/configs/edb93xx.h	/^#define CONFIG_EP9307$/;"	d
CONFIG_EP9312	include/configs/edb93xx.h	/^#define CONFIG_EP9312$/;"	d
CONFIG_EP9315	include/configs/edb93xx.h	/^#define CONFIG_EP9315$/;"	d
CONFIG_EP93XX	include/configs/edb93xx.h	/^#define CONFIG_EP93XX	/;"	d
CONFIG_EP93XX_SPI	include/configs/edb93xx.h	/^#define CONFIG_EP93XX_SPI$/;"	d
CONFIG_EPH_POWER_EN	drivers/net/smc91111.h	/^#define CONFIG_EPH_POWER_EN /;"	d
CONFIG_ERRNO_STR	lib/Kconfig	/^config ERRNO_STR$/;"	c	menu:Library routines
CONFIG_ERRNO_STR_MODULE	lib/Kconfig	/^config ERRNO_STR$/;"	c	menu:Library routines
CONFIG_ESBC_ADDR_64BIT	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_ESBC_ADDR_64BIT$/;"	d
CONFIG_ESBC_HDR_LS	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_ESBC_HDR_LS$/;"	d
CONFIG_ESDHC_DETECT_8_BIT_QUIRK	include/configs/T4240QDS.h	/^#define CONFIG_ESDHC_DETECT_8_BIT_QUIRK /;"	d
CONFIG_ESDHC_DETECT_QUIRK	include/configs/T4240QDS.h	/^#define CONFIG_ESDHC_DETECT_QUIRK /;"	d
CONFIG_ESDHC_DETECT_QUIRK	include/configs/ls2080aqds.h	/^#define CONFIG_ESDHC_DETECT_QUIRK /;"	d
CONFIG_ESDHC_HC_BLK_ADDR	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_ESDHC_HC_BLK_ADDR$/;"	d
CONFIG_ESPRESSO7420	include/configs/espresso7420.h	/^#define CONFIG_ESPRESSO7420$/;"	d
CONFIG_ESPT	include/configs/espt.h	/^#define CONFIG_ESPT	/;"	d
CONFIG_ESRAM_BASE	arch/x86/cpu/quark/Kconfig	/^config ESRAM_BASE$/;"	c
CONFIG_ESRAM_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config ESRAM_BASE$/;"	c
CONFIG_ET1100_BASE	include/configs/meesc.h	/^#define CONFIG_ET1100_BASE	/;"	d
CONFIG_ETH1ADDR	include/configs/UCP1020.h	/^#define CONFIG_ETH1ADDR	/;"	d
CONFIG_ETH2ADDR	include/configs/UCP1020.h	/^#define CONFIG_ETH2ADDR	/;"	d
CONFIG_ETHADDR	include/configs/UCP1020.h	/^#define CONFIG_ETHADDR	/;"	d
CONFIG_ETHBASE	include/configs/xtfpga.h	/^#define CONFIG_ETHBASE	/;"	d
CONFIG_ETHER_INDEX	include/configs/MPC8560ADS.h	/^#define CONFIG_ETHER_INDEX /;"	d
CONFIG_ETHER_INDEX	include/configs/km82xx.h	/^#define CONFIG_ETHER_INDEX	/;"	d
CONFIG_ETHER_ON_FEC1	arch/powerpc/cpu/mpc8xx/fec.c	/^#define CONFIG_ETHER_ON_FEC1 /;"	d	file:
CONFIG_ETHER_ON_FEC1	include/configs/TQM885D.h	/^#define CONFIG_ETHER_ON_FEC1	/;"	d
CONFIG_ETHER_ON_FEC2	include/configs/TQM885D.h	/^#define CONFIG_ETHER_ON_FEC2	/;"	d
CONFIG_ETHER_ON_SCC	include/configs/km82xx.h	/^#define	CONFIG_ETHER_ON_SCC	/;"	d
CONFIG_ETHOC	drivers/net/Kconfig	/^config ETHOC$/;"	c
CONFIG_ETHOC_MODULE	drivers/net/Kconfig	/^config ETHOC$/;"	c
CONFIG_ETHPRIME	include/configs/B4860QDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/BSC9131RDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/BSC9132QDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/C29XPCIE.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/M54418TWR.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/M54451EVB.h	/^#	define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/M54455EVB.h	/^#	define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8308RDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8313ERDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8315ERDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8323ERDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC832XEMDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8349EMDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8349ITX.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC837XEMDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC837XERDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8536DS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8540ADS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8541CDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8544DS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8548CDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8555CDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8560ADS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8568MDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8568MDS.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/MPC8569MDS.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/MPC8572DS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/MPC8641HPCN.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/P1010RDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/P1022DS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/P1023RDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/P2041RDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T102xQDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T102xRDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T1040QDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T104xRDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T208xQDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T208xRDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T4240QDS.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/T4240RDB.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM834x.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM855L.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM855M.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM860L.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM860M.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM862L.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM862M.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM866M.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/TQM885D.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/UCP1020.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/advantech_dms-ba16.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/apx4devkit.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/aristainetos-common.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/cgtqmx6eval.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/cm_fx6.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/colibri_imx7.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/controlcenterd.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/corenet_ds.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/cyrus.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/embestmx6boards.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ge_bx50v3.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/hrcon.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ids8313.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/imx6qdl_icore.h	/^# define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/km/km83xx-common.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/km/kmp204x-common.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ls1021aqds.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ls1021atwr.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ls1043ardb.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ls1046ardb.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ls2080aqds.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ls2080ardb.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/m53evk.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mpc8308_p1m.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx35pdk.h	/^#define CONFIG_ETHPRIME$/;"	d
CONFIG_ETHPRIME	include/configs/mx51evk.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx53ard.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx53evk.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx53loco.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx53smd.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx6sabre_common.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx6sxsabreauto.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/mx6sxsabresd.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/mx7dsabresd.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/mxs.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/nitrogen6x.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/novena.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ot1200.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/p1_twr.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/pcm058.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/sbc8349.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/sbc8548.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/sbc8641d.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/secomx6quq7.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/socrates.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/strider.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/t4qds.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/tbs2910.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/tqma6_mba6.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/tqma6_wru4.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/ts4800.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/udoo.h	/^#define CONFIG_ETHPRIME /;"	d
CONFIG_ETHPRIME	include/configs/ve8313.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/vme8349.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/wandboard.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/xpedite1000.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/xpedite517x.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/xpedite520x.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/xpedite537x.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/xpedite550x.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/xpress.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/zc5202.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETHPRIME	include/configs/zc5601.h	/^#define CONFIG_ETHPRIME	/;"	d
CONFIG_ETH_BUFSIZE	drivers/net/ag7xxx.c	/^#define CONFIG_ETH_BUFSIZE	/;"	d	file:
CONFIG_ETH_BUFSIZE	drivers/net/designware.h	/^#define CONFIG_ETH_BUFSIZE	/;"	d
CONFIG_ETH_BUFSIZE	drivers/net/sun8i_emac.c	/^#define CONFIG_ETH_BUFSIZE	/;"	d	file:
CONFIG_ETH_DESIGNWARE	drivers/net/Kconfig	/^config ETH_DESIGNWARE$/;"	c
CONFIG_ETH_DESIGNWARE_MODULE	drivers/net/Kconfig	/^config ETH_DESIGNWARE$/;"	c
CONFIG_ETH_RXSIZE	drivers/net/sun8i_emac.c	/^#define CONFIG_ETH_RXSIZE	/;"	d	file:
CONFIG_ETH_SANDBOX	drivers/net/Kconfig	/^config ETH_SANDBOX$/;"	c
CONFIG_ETH_SANDBOX_MODULE	drivers/net/Kconfig	/^config ETH_SANDBOX$/;"	c
CONFIG_ETH_SANDBOX_RAW	drivers/net/Kconfig	/^config ETH_SANDBOX_RAW$/;"	c
CONFIG_ETH_SANDBOX_RAW_MODULE	drivers/net/Kconfig	/^config ETH_SANDBOX_RAW$/;"	c
CONFIG_EXCEPTION_DEFER	arch/blackfin/include/asm/config.h	/^# define CONFIG_EXCEPTION_DEFER	/;"	d
CONFIG_EXPERT	Kconfig	/^menuconfig EXPERT$/;"	c	menu:General setup
CONFIG_EXPERT	include/config/auto.conf	/^CONFIG_EXPERT=y$/;"	k
CONFIG_EXPERT	include/generated/autoconf.h	/^#define CONFIG_EXPERT /;"	d
CONFIG_EXPERT_MODULE	Kconfig	/^menuconfig EXPERT$/;"	c	menu:General setup
CONFIG_EXT4_WRITE	include/config_fallbacks.h	/^#define CONFIG_EXT4_WRITE$/;"	d
CONFIG_EXT4_WRITE	include/configs/brppt1.h	/^#define CONFIG_EXT4_WRITE$/;"	d
CONFIG_EXT4_WRITE	include/configs/rcar-gen2-common.h	/^#define CONFIG_EXT4_WRITE$/;"	d
CONFIG_EXT4_WRITE	include/configs/rcar-gen3-common.h	/^#define CONFIG_EXT4_WRITE$/;"	d
CONFIG_EXT4_WRITE	include/configs/s5p_goni.h	/^#define CONFIG_EXT4_WRITE$/;"	d
CONFIG_EXT4_WRITE	include/configs/sandbox.h	/^#define CONFIG_EXT4_WRITE$/;"	d
CONFIG_EXTRA_BOOTARGS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_EXTRA_BOOTARGS	/;"	d
CONFIG_EXTRA_CLOCK	include/configs/M52277EVB.h	/^#define CONFIG_EXTRA_CLOCK$/;"	d
CONFIG_EXTRA_CLOCK	include/configs/M54418TWR.h	/^#define CONFIG_EXTRA_CLOCK$/;"	d
CONFIG_EXTRA_CLOCK	include/configs/M54451EVB.h	/^#define CONFIG_EXTRA_CLOCK$/;"	d
CONFIG_EXTRA_CLOCK	include/configs/M54455EVB.h	/^#define CONFIG_EXTRA_CLOCK$/;"	d
CONFIG_EXTRA_ENV	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_EXTRA_ENV /;"	d
CONFIG_EXTRA_ENV	include/config_fsl_chain_trust.h	/^#define CONFIG_EXTRA_ENV	/;"	d
CONFIG_EXTRA_ENV_BOARD_SETTINGS	include/configs/aristainetos.h	/^#define CONFIG_EXTRA_ENV_BOARD_SETTINGS /;"	d
CONFIG_EXTRA_ENV_BOARD_SETTINGS	include/configs/aristainetos2.h	/^#define CONFIG_EXTRA_ENV_BOARD_SETTINGS /;"	d
CONFIG_EXTRA_ENV_BOARD_SETTINGS	include/configs/aristainetos2b.h	/^#define CONFIG_EXTRA_ENV_BOARD_SETTINGS /;"	d
CONFIG_EXTRA_ENV_ITB	include/configs/exynos4-common.h	/^#define CONFIG_EXTRA_ENV_ITB /;"	d
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	include/configs/k2e_evm.h	/^#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	include/configs/k2g_evm.h	/^#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	include/configs/k2hk_evm.h	/^#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	include/configs/k2l_evm.h	/^#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/autoconf.mk	/^CONFIG_EXTRA_ENV_SETTINGS="CONSOLE_ENV_SETTINGS MEM_LAYOUT_ENV_SETTINGS DFU_ALT_INFO_RAM "fdtfil/;"	m
CONFIG_EXTRA_ENV_SETTINGS	include/configs/B4860QDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/BSC9131RDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/BSC9132QDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/C29XPCIE.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5208EVBE.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M52277EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5235EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5253DEMO.h	/^#	define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5272C3.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5275EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5282EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M53017EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5329EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5373EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M54418TWR.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M54451EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M54455EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5475EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/M5485EVB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8308RDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8313ERDB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8315ERDB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8323ERDB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC832XEMDS.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8349EMDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8349ITX.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC837XEMDS.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC837XERDB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8536DS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8540ADS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8541CDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8544DS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8548CDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8555CDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8560ADS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8568MDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8569MDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8572DS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8610HPCD.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8610HPCD.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/MPC8641HPCN.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/P1010RDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/P1022DS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/P1023RDB.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/P2041RDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/PMC440.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T102xQDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T102xRDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T1040QDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T104xRDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T208xQDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T208xRDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T4240QDS.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/T4240RDB.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM5200.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM823L.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM823M.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM834x.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM850L.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM850M.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM855L.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM855M.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM860L.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM860M.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM862L.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM862M.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM866M.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/TQM885D.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/UCP1020.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/a3m071.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/a4m072.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ac14xx.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/acadia.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am335x_evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am335x_igep0033.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am335x_shc.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am335x_sl50.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am3517_crane.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am3517_evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/am43xx_evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/amcore.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/apf27.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/apx4devkit.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/aria.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/aristainetos-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/astro_mcf5373l.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/at91sam9263ek.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/at91sam9n12ek.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/baltos.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bamboo.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bav335x.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bf525-ucr2.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bf537-minotaur.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bf537-srv1.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bg0900.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/blackvme.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/brppt1.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/brxre1.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/bubinga.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/calimain.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/canmb.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/canyonlands.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cgtqmx6eval.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/clearfog.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm5200.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm_fx6.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm_t335.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm_t35.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm_t3517.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm_t43.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cm_t54.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/colibri_imx7.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/colibri_vf.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/controlcenterd.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/corenet_ds.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/cyrus.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/da850evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/db-88f6820-amc.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/db-88f6820-gp.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dbau1x00.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/devkit3250.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/devkit8000.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dfi-bt700.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/digsy_mtc.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dlvision-10g.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dlvision.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dnp5370.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dns325.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dockstar.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/draco.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dragonboard410c.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/dreamplug.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ds109.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ea20.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/eco5pk.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/el6x_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/embestmx6boards.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/etamin.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/exynos5-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/exynos7420-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/flea3.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/gdppc440etx.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ge_bx50v3.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/goflexhome.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/gr_cpci_ax2000.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/gr_ep2s60.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/gr_xc3s_1500.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/grsim.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/grsim_leon2.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/guruplug.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/gw_ventana.h	/^	#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/h2200.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/hikey.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/hrcon.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ib62x0.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/icon.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/iconnect.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ids8313.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/imx27lite-common.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/imx31_phycore.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/imx6qdl_icore.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/inka4x0.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/intip.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/io.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/io64.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/iocon.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ipam390.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ipek01.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/jupiter.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/katmai.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/kc1.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/kilauea.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/km/km83xx-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/km/km_arm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/km/kmp204x-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/km82xx.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/lacie_kw.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/legoev3.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1012a_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1012afrdm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1021aqds.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1021aqds.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1021atwr.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1021atwr.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1043a_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls1046a_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls2080a_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls2080aqds.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ls2080ardb.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/lsxl.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/luan.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/lwmon5.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/m28evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/m53evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ma5d4evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/makalu.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/manroland/common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mcx.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mecp5123.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/microblaze-generic.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/motionpro.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mpc5121ads.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mpc8308_p1m.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mt_ventoux.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/munices.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx23_olinuxino.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx23evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx25pdk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx28evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx31ads.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx31pdk.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx35pdk.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx51evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx53ard.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx53evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx53loco.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx53smd.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6cuboxi.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6cuboxi.h	/^#define CONFIG_EXTRA_ENV_SETTINGS$/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6qarm2.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6sabre_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6slevk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6sxsabresd.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx6ullevk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/mx7dsabresd.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/nas220.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/neo.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/nitrogen6x.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/nokia_rx51.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/novena.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/novena.h	/^#define CONFIG_EXTRA_ENV_SETTINGS$/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/nsa310s.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/o2d.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/o2d300.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/o2dnt2.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/o2i.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/o2mnt.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/o3dnt.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/odroid.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/odroid_xu3.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_beagle.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_cairo.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_igep00x0.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_logic.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_overo.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_pandora.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/omap3_zoom1.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/openrd.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/origen.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/p1_p2_rdb_pc.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/p1_twr.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pb1x00.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pcm030.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pcm051.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pcm052.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pengwyn.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pepper.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pic32mzdask.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pico-imx6ul.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/platinum_picon.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/platinum_titanium.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pm9261.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pm9263.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pogo_e02.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/pxm2.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/qemu-mips.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/qemu-mips64.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rastaban.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rcar-gen3-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/redwood.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rk3036_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rk3288_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rk3399_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rpi.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/rut.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/s32v234evb.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/s5p_goni.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/s5pc210_universal.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sandbox.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sbc8349.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sbc8548.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sbc8641d.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sc_sps_1.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/secomx6quq7.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sequoia.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sh7752evb.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sh7753evb.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sh7757lcr.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sh7785lcr.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sheevaplug.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/smartweb.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/smdkc100.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/snapper9g45.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sniper.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_mcvevk.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_sockit.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_socrates.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_sr1500.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/socrates.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/spear3xx_evb.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/spear6xx_evb.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/stm32f429-discovery.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/stm32f746-disco.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/strider.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sunxi-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/sunxi-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS$/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/t3corp.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/tao3530.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/tbs2910.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/tegra-common-post.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/theadorable.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/thuban.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/thunderx_88xx.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ti814x_evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ti816x_evm.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ti_omap4_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ti_omap5_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/titanium.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/tqma6.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/trats.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/trats2.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/tricorder.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ts4800.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/twister.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/udoo.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/uniphier.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/usb_a9263.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/usbarmory.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/v38b.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/ve8313.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/vexpress_aemv8a.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/vexpress_common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/vf610twr.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/vinco.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/vme8349.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/walnut.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/wandboard.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/warp.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/warp7.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/woodburn_common.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/x600.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/x86-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xilinx_zynqmp.h	/^# define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xilinx_zynqmp.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xpedite1000.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xpedite517x.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xpedite520x.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xpedite537x.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xpedite550x.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/xpress.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/yosemite.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/yucca.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/zmx25.h	/^#define CONFIG_EXTRA_ENV_SETTINGS /;"	d
CONFIG_EXTRA_ENV_SETTINGS	include/configs/zynq-common.h	/^#define CONFIG_EXTRA_ENV_SETTINGS	/;"	d
CONFIG_EXTRA_ENV_SETTINGS	spl/include/autoconf.mk	/^CONFIG_EXTRA_ENV_SETTINGS=y$/;"	m
CONFIG_EXTRA_ENV_SETTINGS_BASE	include/configs/gr_cpci_ax2000.h	/^#define	CONFIG_EXTRA_ENV_SETTINGS_BASE	/;"	d
CONFIG_EXTRA_ENV_SETTINGS_COMMON	include/configs/gw_ventana.h	/^#define CONFIG_EXTRA_ENV_SETTINGS_COMMON /;"	d
CONFIG_EXTRA_ENV_SETTINGS_DEVEL	include/configs/ac14xx.h	/^#define CONFIG_EXTRA_ENV_SETTINGS_DEVEL	/;"	d
CONFIG_EXTRA_ENV_SETTINGS_SELECT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_EXTRA_ENV_SETTINGS_SELECT /;"	d
CONFIG_EXTRA_ENV_UNLOCK	include/configs/spear3xx_evb.h	/^#define CONFIG_EXTRA_ENV_UNLOCK /;"	d
CONFIG_EXTRA_ENV_USBTTY	include/configs/spear-common.h	/^#define CONFIG_EXTRA_ENV_USBTTY	/;"	d
CONFIG_EXT_AHB2AHB_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_EXT_AHB2AHB_BASE	/;"	d
CONFIG_EXT_AHBAPBBRG_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_EXT_AHBAPBBRG_BASE	/;"	d
CONFIG_EXT_AHBPCIBRG_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_EXT_AHBPCIBRG_BASE	/;"	d
CONFIG_EXT_AHBSLAVE01_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_EXT_AHBSLAVE01_BASE	/;"	d
CONFIG_EXT_AHBSLAVE02_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_EXT_AHBSLAVE02_BASE	/;"	d
CONFIG_EXT_PHY	drivers/net/smc91111.h	/^#define CONFIG_EXT_PHY	/;"	d
CONFIG_EXT_USB_HOST_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_EXT_USB_HOST_BASE	/;"	d
CONFIG_EXYNOS4	include/configs/exynos4-common.h	/^#define CONFIG_EXYNOS4	/;"	d
CONFIG_EXYNOS4210	include/configs/origen.h	/^#define CONFIG_EXYNOS4210	/;"	d
CONFIG_EXYNOS4210	include/configs/smdkv310.h	/^#define CONFIG_EXYNOS4210	/;"	d
CONFIG_EXYNOS5	include/configs/exynos5-common.h	/^#define CONFIG_EXYNOS5	/;"	d
CONFIG_EXYNOS5250	include/configs/exynos5250-common.h	/^#define CONFIG_EXYNOS5250$/;"	d
CONFIG_EXYNOS5420	include/configs/exynos5420-common.h	/^#define CONFIG_EXYNOS5420$/;"	d
CONFIG_EXYNOS5800	include/configs/exynos5420-common.h	/^#define CONFIG_EXYNOS5800$/;"	d
CONFIG_EXYNOS5_DT	include/configs/exynos5-dt-common.h	/^#define CONFIG_EXYNOS5_DT$/;"	d
CONFIG_EXYNOS5_DT	include/configs/exynos5420-common.h	/^#define CONFIG_EXYNOS5_DT$/;"	d
CONFIG_EXYNOS7420	include/configs/exynos7420-common.h	/^#define CONFIG_EXYNOS7420	/;"	d
CONFIG_EXYNOS_ACE_SHA	include/configs/exynos5-common.h	/^#define CONFIG_EXYNOS_ACE_SHA$/;"	d
CONFIG_EXYNOS_ACE_SHA	include/configs/odroid.h	/^#define CONFIG_EXYNOS_ACE_SHA$/;"	d
CONFIG_EXYNOS_ACE_SHA	include/configs/trats.h	/^#define CONFIG_EXYNOS_ACE_SHA$/;"	d
CONFIG_EXYNOS_ACE_SHA	include/configs/trats2.h	/^#define CONFIG_EXYNOS_ACE_SHA$/;"	d
CONFIG_EXYNOS_DP	include/configs/exynos5-dt-common.h	/^#define CONFIG_EXYNOS_DP$/;"	d
CONFIG_EXYNOS_DP	include/configs/peach-pi.h	/^#define CONFIG_EXYNOS_DP$/;"	d
CONFIG_EXYNOS_DWMMC	include/configs/exynos-common.h	/^#define CONFIG_EXYNOS_DWMMC$/;"	d
CONFIG_EXYNOS_FB	include/configs/exynos5-dt-common.h	/^#define CONFIG_EXYNOS_FB$/;"	d
CONFIG_EXYNOS_FB	include/configs/peach-pi.h	/^#define CONFIG_EXYNOS_FB$/;"	d
CONFIG_EXYNOS_MIPI_DSIM	include/configs/trats.h	/^#define CONFIG_EXYNOS_MIPI_DSIM$/;"	d
CONFIG_EXYNOS_MIPI_DSIM	include/configs/trats2.h	/^#define CONFIG_EXYNOS_MIPI_DSIM$/;"	d
CONFIG_EXYNOS_RELOCATE_CODE_BASE	include/configs/exynos5420-common.h	/^#define CONFIG_EXYNOS_RELOCATE_CODE_BASE	/;"	d
CONFIG_EXYNOS_SPI	drivers/spi/Kconfig	/^config EXYNOS_SPI$/;"	c	menu:SPI Support
CONFIG_EXYNOS_SPI_MODULE	drivers/spi/Kconfig	/^config EXYNOS_SPI$/;"	c	menu:SPI Support
CONFIG_EXYNOS_SPL	include/configs/arndale.h	/^#define CONFIG_EXYNOS_SPL$/;"	d
CONFIG_EXYNOS_SPL	include/configs/exynos5-common.h	/^#define CONFIG_EXYNOS_SPL$/;"	d
CONFIG_EXYNOS_TMU	include/configs/exynos5-common.h	/^#define CONFIG_EXYNOS_TMU$/;"	d
CONFIG_FACTORYSET	include/configs/draco.h	/^#define CONFIG_FACTORYSET$/;"	d
CONFIG_FACTORYSET	include/configs/etamin.h	/^#define CONFIG_FACTORYSET$/;"	d
CONFIG_FACTORYSET	include/configs/pxm2.h	/^#define CONFIG_FACTORYSET$/;"	d
CONFIG_FACTORYSET	include/configs/rastaban.h	/^#define CONFIG_FACTORYSET$/;"	d
CONFIG_FACTORYSET	include/configs/rut.h	/^#define CONFIG_FACTORYSET$/;"	d
CONFIG_FACTORYSET	include/configs/thuban.h	/^#define CONFIG_FACTORYSET$/;"	d
CONFIG_FASTBOOT	cmd/fastboot/Kconfig	/^config FASTBOOT$/;"	c
CONFIG_FASTBOOT_BUF_ADDR	cmd/fastboot/Kconfig	/^config FASTBOOT_BUF_ADDR$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_BUF_ADDR	include/configs/am335x_evm.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/bav335x.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_FASTBOOT_BUF_ADDR /;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/kc1.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/mx6sabre_common.h	/^#define CONFIG_FASTBOOT_BUF_ADDR /;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/nitrogen6x.h	/^#define CONFIG_FASTBOOT_BUF_ADDR /;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/omap3_beagle.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/omap3_logic.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/rk3036_common.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/rk3288_common.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/sniper.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_FASTBOOT_BUF_ADDR	/;"	d
CONFIG_FASTBOOT_BUF_ADDR_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT_BUF_ADDR$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_BUF_SIZE	cmd/fastboot/Kconfig	/^config FASTBOOT_BUF_SIZE$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_BUF_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/bav335x.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/cgtqmx6eval.h	/^#define CONFIG_FASTBOOT_BUF_SIZE /;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/kc1.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/mx6sabre_common.h	/^#define CONFIG_FASTBOOT_BUF_SIZE /;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/nitrogen6x.h	/^#define CONFIG_FASTBOOT_BUF_SIZE /;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/rk3036_common.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/rk3288_common.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/sniper.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE	include/configs/sunxi-common.h	/^#define CONFIG_FASTBOOT_BUF_SIZE	/;"	d
CONFIG_FASTBOOT_BUF_SIZE_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT_BUF_SIZE$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_FLASH	cmd/fastboot/Kconfig	/^config FASTBOOT_FLASH$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_FLASH	include/configs/kc1.h	/^#define CONFIG_FASTBOOT_FLASH$/;"	d
CONFIG_FASTBOOT_FLASH	include/configs/rk3036_common.h	/^#define CONFIG_FASTBOOT_FLASH$/;"	d
CONFIG_FASTBOOT_FLASH	include/configs/rk3288_common.h	/^#define CONFIG_FASTBOOT_FLASH$/;"	d
CONFIG_FASTBOOT_FLASH	include/configs/sniper.h	/^#define CONFIG_FASTBOOT_FLASH$/;"	d
CONFIG_FASTBOOT_FLASH	include/configs/sunxi-common.h	/^#define CONFIG_FASTBOOT_FLASH$/;"	d
CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE	common/image-sparse.c	/^#define CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE /;"	d	file:
CONFIG_FASTBOOT_FLASH_MMC_DEV	cmd/fastboot/Kconfig	/^config FASTBOOT_FLASH_MMC_DEV$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/am335x_evm.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV /;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/am335x_shc.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV /;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/am335x_sl50.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV /;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/bav335x.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV /;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/kc1.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV	/;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/rk3036_common.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV	/;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/rk3288_common.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV	/;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/sniper.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV	/;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV	include/configs/sunxi-common.h	/^#define CONFIG_FASTBOOT_FLASH_MMC_DEV	/;"	d
CONFIG_FASTBOOT_FLASH_MMC_DEV_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT_FLASH_MMC_DEV$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_FLASH_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT_FLASH$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_GPT_NAME	cmd/fastboot/Kconfig	/^config FASTBOOT_GPT_NAME$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_GPT_NAME	common/fb_mmc.c	/^#define CONFIG_FASTBOOT_GPT_NAME /;"	d	file:
CONFIG_FASTBOOT_GPT_NAME_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT_GPT_NAME$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_MBR_NAME	cmd/fastboot/Kconfig	/^config FASTBOOT_MBR_NAME$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_MBR_NAME	common/fb_mmc.c	/^#define CONFIG_FASTBOOT_MBR_NAME /;"	d	file:
CONFIG_FASTBOOT_MBR_NAME_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT_MBR_NAME$/;"	c	menu:Fastboot support
CONFIG_FASTBOOT_MODULE	cmd/fastboot/Kconfig	/^config FASTBOOT$/;"	c
CONFIG_FAST_FLASH_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_FAST_FLASH_BIT	/;"	d	file:
CONFIG_FAT_WRITE	include/autoconf.mk	/^CONFIG_FAT_WRITE=y$/;"	m
CONFIG_FAT_WRITE	include/configs/am43xx_evm.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/apalis_t30.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/at91-sama5_common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/at91sam9n12ek.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/at91sam9rlek.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/at91sam9x5ek.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/bcm23550_w1d.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/bcm28155_ap.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/bcm_ep_board.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/brppt1.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/brxre1.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/colibri_t20.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/colibri_t30.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/exynos-common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/hikey.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/m28evk.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/m53evk.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/ma5d4evk.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/novena.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/pic32mzdask.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/picosam9g45.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/rcar-gen2-common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/rcar-gen3-common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/rk3036_common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/rk3288_common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/rk3399_common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/rpi.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/s5p_goni.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/sama5d3_xplained.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/sama5d3xek.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/sandbox.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_is1.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_mcvevk.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_sockit.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_socrates.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_sr1500.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/sunxi-common.h	/^#define CONFIG_FAT_WRITE	/;"	d
CONFIG_FAT_WRITE	include/configs/tegra-common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/ti_armv7_common.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/uniphier.h	/^#define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	include/configs/zynq-common.h	/^# define CONFIG_FAT_WRITE$/;"	d
CONFIG_FAT_WRITE	spl/include/autoconf.mk	/^CONFIG_FAT_WRITE=y$/;"	m
CONFIG_FB_ADDR	include/configs/rpi.h	/^#define CONFIG_FB_ADDR	/;"	d
CONFIG_FB_ADDR	include/configs/trats.h	/^#define CONFIG_FB_ADDR	/;"	d
CONFIG_FB_ADDR	include/configs/trats2.h	/^#define CONFIG_FB_ADDR	/;"	d
CONFIG_FDT1_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_FDT1_ENV_ADDR	/;"	d
CONFIG_FDT1_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_FDT1_ENV_ADDR	/;"	d
CONFIG_FDT1_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_FDT1_ENV_ADDR	/;"	d
CONFIG_FDT1_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_FDT1_ENV_ADDR	/;"	d
CONFIG_FDT2_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_FDT2_ENV_ADDR	/;"	d
CONFIG_FDT2_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_FDT2_ENV_ADDR	/;"	d
CONFIG_FDT2_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_FDT2_ENV_ADDR	/;"	d
CONFIG_FDT2_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_FDT2_ENV_ADDR	/;"	d
CONFIG_FDTADDR	include/configs/colibri_vf.h	/^#define CONFIG_FDTADDR	/;"	d
CONFIG_FDTFILE	include/configs/MPC8313ERDB.h	/^#define CONFIG_FDTFILE	/;"	d
CONFIG_FDTFILE	include/configs/MPC8323ERDB.h	/^#define CONFIG_FDTFILE	/;"	d
CONFIG_FDTFILE	include/configs/MPC8349ITX.h	/^#define CONFIG_FDTFILE	/;"	d
CONFIG_FDTFILE	include/configs/MPC837XERDB.h	/^#define CONFIG_FDTFILE	/;"	d
CONFIG_FDTFILE	include/configs/embestmx6boards.h	/^#define CONFIG_FDTFILE	/;"	d
CONFIG_FDTFILE	include/configs/ids8313.h	/^#define CONFIG_FDTFILE	/;"	d
CONFIG_FDTFILE	include/configs/lsxl.h	/^#define CONFIG_FDTFILE /;"	d
CONFIG_FDT_ENV_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_FDT_ENV_ADDR	/;"	d
CONFIG_FDT_FIXUP_NOR_FLASH_SIZE	include/configs/amcc-common.h	/^#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE$/;"	d
CONFIG_FDT_FIXUP_NOR_FLASH_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE$/;"	d
CONFIG_FDT_FIXUP_NOR_FLASH_SIZE	include/configs/lwmon5.h	/^#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE$/;"	d
CONFIG_FDT_FIXUP_PARTITIONS	lib/Kconfig	/^config FDT_FIXUP_PARTITIONS$/;"	c	menu:Library routines
CONFIG_FDT_FIXUP_PARTITIONS_MODULE	lib/Kconfig	/^config FDT_FIXUP_PARTITIONS$/;"	c	menu:Library routines
CONFIG_FDT_FIXUP_PCI_IRQ	include/configs/xpedite550x.h	/^#define CONFIG_FDT_FIXUP_PCI_IRQ	/;"	d
CONFIG_FEC_AN_TIMEOUT	include/configs/ac14xx.h	/^#define CONFIG_FEC_AN_TIMEOUT	/;"	d
CONFIG_FEC_AN_TIMEOUT	include/configs/aria.h	/^#define CONFIG_FEC_AN_TIMEOUT	/;"	d
CONFIG_FEC_AN_TIMEOUT	include/configs/mecp5123.h	/^#define CONFIG_FEC_AN_TIMEOUT	/;"	d
CONFIG_FEC_AN_TIMEOUT	include/configs/mpc5121ads.h	/^#define CONFIG_FEC_AN_TIMEOUT	/;"	d
CONFIG_FEC_AN_TIMEOUT	include/configs/pdm360ng.h	/^#define CONFIG_FEC_AN_TIMEOUT	/;"	d
CONFIG_FEC_ENET	include/configs/TQM855L.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM855M.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM860L.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM860M.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM862L.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM862M.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM866M.h	/^#define CONFIG_FEC_ENET$/;"	d
CONFIG_FEC_ENET	include/configs/TQM885D.h	/^#define CONFIG_FEC_ENET	/;"	d
CONFIG_FEC_ENET_DEV	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_FEC_ENET_DEV	/;"	d
CONFIG_FEC_ENET_DEV	include/configs/xpress.h	/^#define CONFIG_FEC_ENET_DEV	/;"	d
CONFIG_FEC_FIXED_SPEED	include/configs/zc5601.h	/^#define CONFIG_FEC_FIXED_SPEED	/;"	d
CONFIG_FEC_MXC	drivers/net/Kconfig	/^config FEC_MXC$/;"	c
CONFIG_FEC_MXC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/apf27.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/apx4devkit.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/aristainetos-common.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/bg0900.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/cgtqmx6eval.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/cm_fx6.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/colibri_imx7.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/colibri_vf.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/embestmx6boards.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/flea3.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/ge_bx50v3.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/gw_ventana.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/imx27lite-common.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/m28evk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/m53evk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx25pdk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx28evk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx35pdk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx51evk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx53evk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx53loco.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx53smd.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6cuboxi.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6qarm2.h	/^#define	CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6sabre_common.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6slevk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6sxsabreauto.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6sxsabresd.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/mx7dsabresd.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/nitrogen6x.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/novena.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/ot1200.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/pcm052.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/pcm058.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/pico-imx6ul.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/platinum.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/sc_sps_1.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/secomx6quq7.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/tbs2910.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/titanium.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/tqma6.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/ts4800.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/udoo.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/vf610twr.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/wandboard.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/woodburn_common.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/xpress.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/zc5202.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/zc5601.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC	include/configs/zmx25.h	/^#define CONFIG_FEC_MXC$/;"	d
CONFIG_FEC_MXC_MODULE	drivers/net/Kconfig	/^config FEC_MXC$/;"	c
CONFIG_FEC_MXC_PHYADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/apf27.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/apx4devkit.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/aristainetos-common.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/cm_fx6.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/colibri_imx7.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/colibri_vf.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/embestmx6boards.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/flea3.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/gw_ventana.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/imx27lite-common.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/imx6qdl_icore.h	/^# define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/m53evk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx25pdk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx35pdk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx51evk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx53evk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx53loco.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx53smd.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6cuboxi.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6qarm2.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6sabre_common.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6slevk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6sxsabreauto.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6sxsabresd.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/mx7dsabresd.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/nitrogen6x.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/novena.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/ot1200.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/pcm052.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/pcm058.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/pico-imx6ul.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/platinum_picon.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/platinum_titanium.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/secomx6quq7.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/tbs2910.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/titanium.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/tqma6_mba6.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/tqma6_wru4.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/ts4800.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/udoo.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/vf610twr.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/wandboard.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/woodburn_common.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/xpress.h	/^#define CONFIG_FEC_MXC_PHYADDR /;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/zc5202.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/zc5601.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_PHYADDR	include/configs/zmx25.h	/^#define CONFIG_FEC_MXC_PHYADDR	/;"	d
CONFIG_FEC_MXC_SWAP_PACKET	drivers/net/fec_mxc.c	/^#define CONFIG_FEC_MXC_SWAP_PACKET$/;"	d	file:
CONFIG_FEC_XCV_TYPE	drivers/net/fec_mxc.c	/^#define CONFIG_FEC_XCV_TYPE /;"	d	file:
CONFIG_FEC_XCV_TYPE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/aristainetos.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/aristainetos2.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/aristainetos2b.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/cgtqmx6eval.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/cm_fx6.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/colibri_imx7.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/colibri_vf.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/embestmx6boards.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/ge_bx50v3.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/gw_ventana.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/imx6qdl_icore.h	/^# define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/m53evk.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6cuboxi.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6qarm2.h	/^#define	CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6sabre_common.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6slevk.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6sxsabresd.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mx7dsabresd.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/mxs.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/nitrogen6x.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/novena.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/ot1200.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/pcm052.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/pcm058.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/pico-imx6ul.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/platinum_picon.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/platinum_titanium.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/secomx6quq7.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/tbs2910.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/titanium.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/tqma6_mba6.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/tqma6_wru4.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/udoo.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/vf610twr.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/wandboard.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/xpress.h	/^#define CONFIG_FEC_XCV_TYPE /;"	d
CONFIG_FEC_XCV_TYPE	include/configs/zc5202.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEC_XCV_TYPE	include/configs/zc5601.h	/^#define CONFIG_FEC_XCV_TYPE	/;"	d
CONFIG_FEROCEON	include/configs/edminiv2.h	/^#define CONFIG_FEROCEON	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/dns325.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/dockstar.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/goflexhome.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/ib62x0.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/iconnect.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/km/km_arm.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/lacie_kw.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/lsxl.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/nas220.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/nsa310s.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/pogo_e02.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FEROCEON_88FR131	include/configs/sheevaplug.h	/^#define CONFIG_FEROCEON_88FR131	/;"	d
CONFIG_FFUART	include/configs/colibri_pxa270.h	/^#define	CONFIG_FFUART	/;"	d
CONFIG_FFUART	include/configs/h2200.h	/^#define CONFIG_FFUART$/;"	d
CONFIG_FILE	tools/env/fw_env.h	/^#define CONFIG_FILE /;"	d
CONFIG_FILENAMES	tools/buildman/builder.py	/^CONFIG_FILENAMES = [$/;"	v
CONFIG_FIRMWARE_OFFSET	include/configs/apf27.h	/^#define	CONFIG_FIRMWARE_OFFSET	/;"	d
CONFIG_FIRMWARE_SIZE	include/configs/apf27.h	/^#define	CONFIG_FIRMWARE_SIZE	/;"	d
CONFIG_FIT	Kconfig	/^config FIT$/;"	c	menu:Boot images
CONFIG_FIT_BEST_MATCH	Kconfig	/^config FIT_BEST_MATCH$/;"	c	menu:Boot images
CONFIG_FIT_BEST_MATCH_MODULE	Kconfig	/^config FIT_BEST_MATCH$/;"	c	menu:Boot images
CONFIG_FIT_DISABLE_SHA256	include/configs/dlvision-10g.h	/^#define CONFIG_FIT_DISABLE_SHA256$/;"	d
CONFIG_FIT_DISABLE_SHA256	include/configs/dlvision.h	/^#define CONFIG_FIT_DISABLE_SHA256$/;"	d
CONFIG_FIT_DISABLE_SHA256	include/configs/h2200.h	/^#define CONFIG_FIT_DISABLE_SHA256$/;"	d
CONFIG_FIT_DISABLE_SHA256	include/configs/io.h	/^#define CONFIG_FIT_DISABLE_SHA256$/;"	d
CONFIG_FIT_DISABLE_SHA256	include/configs/iocon.h	/^#define CONFIG_FIT_DISABLE_SHA256$/;"	d
CONFIG_FIT_DISABLE_SHA256	include/configs/neo.h	/^#define CONFIG_FIT_DISABLE_SHA256$/;"	d
CONFIG_FIT_IMAGE_POST_PROCESS	Kconfig	/^config FIT_IMAGE_POST_PROCESS$/;"	c	menu:Boot images
CONFIG_FIT_IMAGE_POST_PROCESS_MODULE	Kconfig	/^config FIT_IMAGE_POST_PROCESS$/;"	c	menu:Boot images
CONFIG_FIT_MODULE	Kconfig	/^config FIT$/;"	c	menu:Boot images
CONFIG_FIT_SIGNATURE	Kconfig	/^config FIT_SIGNATURE$/;"	c	menu:Boot images
CONFIG_FIT_SIGNATURE_MODULE	Kconfig	/^config FIT_SIGNATURE$/;"	c	menu:Boot images
CONFIG_FIT_VERBOSE	Kconfig	/^config FIT_VERBOSE$/;"	c	menu:Boot images
CONFIG_FIT_VERBOSE	include/image.h	/^#define CONFIG_FIT_VERBOSE	/;"	d
CONFIG_FIT_VERBOSE_MODULE	Kconfig	/^config FIT_VERBOSE$/;"	c	menu:Boot images
CONFIG_FIXED_PHY	drivers/net/4xx_enet.c	/^#define CONFIG_FIXED_PHY	/;"	d	file:
CONFIG_FIXED_PHY	drivers/qe/uec_phy.c	/^#define CONFIG_FIXED_PHY	/;"	d	file:
CONFIG_FIXED_PHY	include/configs/canyonlands.h	/^#define CONFIG_FIXED_PHY	/;"	d
CONFIG_FIXED_PHY	include/configs/suvd3.h	/^#define CONFIG_FIXED_PHY	/;"	d
CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	include/configs/clearfog.h	/^#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	/;"	d
CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	include/configs/db-88f6820-gp.h	/^#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	/;"	d
CONFIG_FLASHBOOTCOMMAND	include/configs/sbc8641d.h	/^#define CONFIG_FLASHBOOTCOMMAND	/;"	d
CONFIG_FLASH_16BIT	include/configs/dbau1x00.h	/^#define CONFIG_FLASH_16BIT$/;"	d
CONFIG_FLASH_16BIT	include/configs/digsy_mtc.h	/^#define CONFIG_FLASH_16BIT$/;"	d
CONFIG_FLASH_16BIT	include/configs/motionpro.h	/^#define CONFIG_FLASH_16BIT	/;"	d
CONFIG_FLASH_16BIT	include/configs/o2dnt-common.h	/^#define CONFIG_FLASH_16BIT$/;"	d
CONFIG_FLASH_16BIT	include/configs/pb1x00.h	/^#define CONFIG_FLASH_16BIT$/;"	d
CONFIG_FLASH_BASE	include/configs/vct.h	/^#define CONFIG_FLASH_BASE	/;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_FLASH_BR_PRELIM	/;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_BR_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_FLASH_BR_PRELIM /;"	d
CONFIG_FLASH_CFI_DRIVER	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/3c120_devboard.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/B4860QDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/BSC9132QDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/C29XPCIE.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5208EVBE.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M52277EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5235EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5249EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5253DEMO.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5253EVBE.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5272C3.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5275EVB.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5282EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M53017EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5329EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5373EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M54418TWR.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M54451EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M54455EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5475EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/M5485EVB.h	/^#	define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MIP405.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8308RDB.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8313ERDB.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8315ERDB.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8323ERDB.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC832XEMDS.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8349EMDS.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8349ITX.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC837XEMDS.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC837XERDB.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8536DS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8540ADS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8541CDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8544DS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8548CDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8555CDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8560ADS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8568MDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8569MDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8572DS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8610HPCD.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MPC8641HPCN.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/MigoR.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/P1010RDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/P1022DS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/P1023RDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/P2041RDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/PATI.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/PIP405.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/PMC405DE.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/PMC440.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T102xQDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T102xRDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T1040QDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T104xRDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T208xQDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T208xRDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T4240QDS.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/T4240RDB.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM5200.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM823L.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM823M.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM834x.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM850L.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM850M.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM855L.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM855M.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM860L.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM860M.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM862L.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM862M.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM866M.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/TQM885D.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/UCP1020.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/VCMA9.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/a3m071.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/a4m072.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ac14xx.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/acadia.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/adp-ag101p.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/am335x_evm.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/amcore.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ap325rxa.h	/^#define CONFIG_FLASH_CFI_DRIVER /;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ap_sh4a_4a.h	/^#define CONFIG_FLASH_CFI_DRIVER /;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/aria.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/astro_mcf5373l.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/at91rm9200ek.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/at91sam9263ek.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/atngw100.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/atngw100mkii.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/atstk1002.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bav335x.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bct-brettl2.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf518f-ezbrd.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf526-ezbrd.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf527-ezkit.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf527-sdp.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf533-stamp.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf537-pnav.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf537-stamp.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf538f-ezkit.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf548-ezkit.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf561-ezkit.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/bf609-ezkit.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/blanche.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/boston.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/calimain.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/canmb.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/canyonlands.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm-bf527.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm-bf533.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm-bf537e.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm-bf537u.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm-bf548.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm-bf561.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/cm5200.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/colibri_pxa270.h	/^#define	CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/corenet_ds.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/da850evm.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/dbau1x00.h	/^#define CONFIG_FLASH_CFI_DRIVER /;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/digsy_mtc.h	/^#define	CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/dlvision-10g.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/dlvision.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/dnp5370.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/dra7xx_evm.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/eb_cpu5282.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ecovec.h	/^#define CONFIG_FLASH_CFI_DRIVER /;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/edb93xx.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/edminiv2.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/espt.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/flea3.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/gdppc440etx.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/gr_ep2s60.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/gr_xc3s_1500.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/grasshopper.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/grsim.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/grsim_leon2.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/hrcon.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ibf-dsp561.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/icon.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ids8313.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/imx27lite-common.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/imx31_phycore.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/inka4x0.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/integrator-common.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/intip.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/io.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/io64.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/iocon.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ipek01.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/jupiter.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/katmai.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/kilauea.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/km/km83xx-common.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/km82xx.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/kzm9g.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls1021aqds.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls1021atwr.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls1043a_common.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls1046aqds.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls2080a_simu.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls2080aqds.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ls2080ardb.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/lwmon5.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/makalu.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/malta.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mecp5123.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/microblaze-generic.h	/^# define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/motionpro.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mpc5121ads.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mpc8308_p1m.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mpr2.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ms7720se.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ms7722se.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ms7750se.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/munices.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mx31ads.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mx35pdk.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/mx6qsabreauto.h	/^#define CONFIG_FLASH_CFI_DRIVER /;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/neo.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/o2dnt-common.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/omapl138_lcdk.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/p1_twr.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/pcm030.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/pdm360ng.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/pm9261.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/pm9263.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/qemu-mips.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/qemu-mips64.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/r0p7734.h	/^#define CONFIG_FLASH_CFI_DRIVER /;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/r2dplus.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/r7780mp.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/redwood.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/rsk7203.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/rsk7264.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/rsk7269.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sama5d3xek.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sbc8349.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sbc8548.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sbc8641d.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sequoia.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sh7763rdp.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/sh7785lcr.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/shmin.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/smdk2410.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/socrates.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/spear3xx_evb.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/strider.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/t3corp.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/tcm-bf518.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/tcm-bf537.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/uniphier.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/v38b.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/vct.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/ve8313.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/vexpress_aemv8a.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/vexpress_common.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/vme8349.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/woodburn_common.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xilinx-ppc.h	/^#define	CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xpedite1000.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xpedite517x.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xpedite520x.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xpedite537x.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xpedite550x.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/xtfpga.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/yosemite.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/zipitz2.h	/^#define CONFIG_FLASH_CFI_DRIVER	/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/zmx25.h	/^#define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_DRIVER	include/configs/zynq-common.h	/^# define CONFIG_FLASH_CFI_DRIVER$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/M5253DEMO.h	/^#	define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/M54455EVB.h	/^#	define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/VCMA9.h	/^#define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/hrcon.h	/^#define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/shmin.h	/^#define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/smdk2410.h	/^#define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_LEGACY	include/configs/strider.h	/^#define CONFIG_FLASH_CFI_LEGACY$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/BSC9132QDS.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/P1022DS.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/T102xQDS.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/T102xRDB.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/T1040QDS.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/T104xRDB.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/T208xQDS.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/T208xRDB.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM5200.h	/^#define CONFIG_FLASH_CFI_MTD	/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM823L.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM823M.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM834x.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM850L.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM850M.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM855L.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM855M.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM860L.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM860M.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM862L.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM862M.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/TQM866M.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/a3m071.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/am335x_evm.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/aria.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/bav335x.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/cm5200.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/dra7xx_evm.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/flea3.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/ids8313.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/imx27lite-common.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/km/km-powerpc.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/microblaze-generic.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/motionpro.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/mpc5121ads.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/mx35pdk.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/p1_twr.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/pdm360ng.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/woodburn_common.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_CFI_MTD	include/configs/xilinx-ppc.h	/^#define CONFIG_FLASH_CFI_MTD$/;"	d
CONFIG_FLASH_END	include/configs/vct.h	/^#define CONFIG_FLASH_END	/;"	d
CONFIG_FLASH_NOT_MEM_MAPPED	include/configs/vct.h	/^#define CONFIG_FLASH_NOT_MEM_MAPPED$/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/MPC8569MDS.h	/^#define	CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_FLASH_OR_PRELIM /;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_OR_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_FLASH_OR_PRELIM	/;"	d
CONFIG_FLASH_PIC32	drivers/mtd/Kconfig	/^config FLASH_PIC32$/;"	c	menu:MTD Support
CONFIG_FLASH_PIC32_MODULE	drivers/mtd/Kconfig	/^config FLASH_PIC32$/;"	c	menu:MTD Support
CONFIG_FLASH_SECTOR_SIZE	include/configs/adp-ag101p.h	/^#define CONFIG_FLASH_SECTOR_SIZE	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/B4860QDS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/BSC9132QDS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/C29XPCIE.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/MIP405.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/MPC8536DS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS /;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/MPC8544DS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS /;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/MPC8572DS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS /;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/P1010RDB.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/P1022DS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/P2041RDB.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/PATI.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/PIP405.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T102xQDS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T102xRDB.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T1040QDS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T104xRDB.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T208xQDS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T208xRDB.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T4240QDS.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/T4240RDB.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/UCP1020.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/VCMA9.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/apf27.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/bfin_adi_common.h	/^#define CONFIG_FLASH_SHOW_PROGRESS /;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/blanche.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/corenet_ds.h	/^#define CONFIG_FLASH_SHOW_PROGRESS /;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/eb_cpu5282.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ids8313.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls1021aqds.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls1021atwr.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls1043a_common.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls1046aqds.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls2080a_simu.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls2080aqds.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/ls2080ardb.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/p1_twr.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/smdk2410.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/uniphier.h	/^#define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SHOW_PROGRESS	include/configs/zynq-common.h	/^# define CONFIG_FLASH_SHOW_PROGRESS	/;"	d
CONFIG_FLASH_SPANSION_S29WS_N	include/configs/M52277EVB.h	/^#	define CONFIG_FLASH_SPANSION_S29WS_N	/;"	d
CONFIG_FLASH_SPANSION_S29WS_N	include/configs/M53017EVB.h	/^#	define CONFIG_FLASH_SPANSION_S29WS_N	/;"	d
CONFIG_FLASH_SPANSION_S29WS_N	include/configs/mx31ads.h	/^#define CONFIG_FLASH_SPANSION_S29WS_N	/;"	d
CONFIG_FLASH_SPANSION_S29WS_N	include/configs/mx35pdk.h	/^#define CONFIG_FLASH_SPANSION_S29WS_N$/;"	d
CONFIG_FLASH_VERIFY	include/configs/a3m071.h	/^#define CONFIG_FLASH_VERIFY$/;"	d
CONFIG_FMAN_ENET	include/configs/B4860QDS.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/P1023RDB.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/P2041RDB.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T102xQDS.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T102xRDB.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T1040QDS.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T104xRDB.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T208xQDS.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T208xRDB.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T4240QDS.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/T4240RDB.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/corenet_ds.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/cyrus.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/km/kmp204x-common.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/ls1043aqds.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/ls1043ardb.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/ls1046aqds.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FMAN_ENET	include/configs/ls1046ardb.h	/^#define CONFIG_FMAN_ENET$/;"	d
CONFIG_FM_PLAT_CLK_DIV	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_FM_PLAT_CLK_DIV	/;"	d
CONFIG_FORMIKE	include/configs/rut.h	/^#define CONFIG_FORMIKE$/;"	d
CONFIG_FPGA	drivers/fpga/Kconfig	/^config FPGA$/;"	c	menu:FPGA support
CONFIG_FPGA	include/configs/PMC440.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/apf27.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/astro_mcf5373l.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/mt_ventoux.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/socfpga_common.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/theadorable.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/x600.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA	include/configs/zynq-common.h	/^#define CONFIG_FPGA$/;"	d
CONFIG_FPGA_ALTERA	include/configs/astro_mcf5373l.h	/^#define CONFIG_FPGA_ALTERA$/;"	d
CONFIG_FPGA_ALTERA	include/configs/socfpga_common.h	/^#define CONFIG_FPGA_ALTERA$/;"	d
CONFIG_FPGA_ALTERA	include/configs/theadorable.h	/^#define CONFIG_FPGA_ALTERA$/;"	d
CONFIG_FPGA_COUNT	include/configs/PMC440.h	/^#define CONFIG_FPGA_COUNT	/;"	d
CONFIG_FPGA_COUNT	include/configs/apf27.h	/^#define CONFIG_FPGA_COUNT	/;"	d
CONFIG_FPGA_COUNT	include/configs/astro_mcf5373l.h	/^#define CONFIG_FPGA_COUNT	/;"	d
CONFIG_FPGA_COUNT	include/configs/socfpga_common.h	/^#define CONFIG_FPGA_COUNT	/;"	d
CONFIG_FPGA_COUNT	include/configs/x600.h	/^#define CONFIG_FPGA_COUNT	/;"	d
CONFIG_FPGA_CYCLON2	include/configs/astro_mcf5373l.h	/^#define CONFIG_FPGA_CYCLON2$/;"	d
CONFIG_FPGA_DELAY	drivers/fpga/ACEX1K.c	/^#define CONFIG_FPGA_DELAY(/;"	d	file:
CONFIG_FPGA_DELAY	drivers/fpga/cyclon2.c	/^#define CONFIG_FPGA_DELAY(/;"	d	file:
CONFIG_FPGA_DELAY	drivers/fpga/spartan2.c	/^#define CONFIG_FPGA_DELAY(/;"	d	file:
CONFIG_FPGA_DELAY	drivers/fpga/spartan3.c	/^#define CONFIG_FPGA_DELAY(/;"	d	file:
CONFIG_FPGA_DELAY	drivers/fpga/virtex2.c	/^#define CONFIG_FPGA_DELAY(/;"	d	file:
CONFIG_FPGA_DELAY	include/configs/mt_ventoux.h	/^#define CONFIG_FPGA_DELAY(/;"	d
CONFIG_FPGA_MODULE	drivers/fpga/Kconfig	/^config FPGA$/;"	c	menu:FPGA support
CONFIG_FPGA_SOCFPGA	include/configs/socfpga_common.h	/^#define CONFIG_FPGA_SOCFPGA$/;"	d
CONFIG_FPGA_SPARTAN2	include/configs/PMC440.h	/^#define CONFIG_FPGA_SPARTAN2$/;"	d
CONFIG_FPGA_SPARTAN3	include/configs/PMC440.h	/^#define CONFIG_FPGA_SPARTAN3$/;"	d
CONFIG_FPGA_SPARTAN3	include/configs/apf27.h	/^#define CONFIG_FPGA_SPARTAN3$/;"	d
CONFIG_FPGA_SPARTAN3	include/configs/astro_mcf5373l.h	/^#define	CONFIG_FPGA_SPARTAN3$/;"	d
CONFIG_FPGA_SPARTAN3	include/configs/mt_ventoux.h	/^#define CONFIG_FPGA_SPARTAN3$/;"	d
CONFIG_FPGA_SPARTAN3	include/configs/x600.h	/^#define CONFIG_FPGA_SPARTAN3$/;"	d
CONFIG_FPGA_STRATIX_V	include/configs/theadorable.h	/^#define CONFIG_FPGA_STRATIX_V$/;"	d
CONFIG_FPGA_XILINX	drivers/fpga/Kconfig	/^config FPGA_XILINX$/;"	c	menu:FPGA support
CONFIG_FPGA_XILINX	include/configs/PMC440.h	/^#define CONFIG_FPGA_XILINX$/;"	d
CONFIG_FPGA_XILINX	include/configs/apf27.h	/^#define CONFIG_FPGA_XILINX$/;"	d
CONFIG_FPGA_XILINX	include/configs/astro_mcf5373l.h	/^#define	CONFIG_FPGA_XILINX$/;"	d
CONFIG_FPGA_XILINX	include/configs/mt_ventoux.h	/^#define CONFIG_FPGA_XILINX$/;"	d
CONFIG_FPGA_XILINX	include/configs/x600.h	/^#define CONFIG_FPGA_XILINX$/;"	d
CONFIG_FPGA_XILINX	include/configs/zynq-common.h	/^#define CONFIG_FPGA_XILINX$/;"	d
CONFIG_FPGA_XILINX_MODULE	drivers/fpga/Kconfig	/^config FPGA_XILINX$/;"	c	menu:FPGA support
CONFIG_FPGA_ZYNQMPPL	drivers/fpga/Kconfig	/^config FPGA_ZYNQMPPL$/;"	c	menu:FPGA support
CONFIG_FPGA_ZYNQMPPL_MODULE	drivers/fpga/Kconfig	/^config FPGA_ZYNQMPPL$/;"	c	menu:FPGA support
CONFIG_FPGA_ZYNQPL	include/configs/zynq-common.h	/^#define CONFIG_FPGA_ZYNQPL$/;"	d
CONFIG_FRAMEBUFFER_SET_VESA_MODE	drivers/video/Kconfig	/^config FRAMEBUFFER_SET_VESA_MODE$/;"	c	menu:Graphics support
CONFIG_FRAMEBUFFER_SET_VESA_MODE_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_SET_VESA_MODE$/;"	c	menu:Graphics support
CONFIG_FRAMEBUFFER_VESA_MODE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE$/;"	c	menu:Graphics support
CONFIG_FRAMEBUFFER_VESA_MODE_100	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_100$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_100_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_100$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_101	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_101$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_101_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_101$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_102	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_102$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_102_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_102$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_103	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_103$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_103_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_103$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_104	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_104$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_104_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_104$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_105	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_105$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_105_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_105$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_106	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_106$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_106_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_106$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_107	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_107$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_107_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_107$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_108	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_108$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_108_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_108$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_109	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_109$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_109_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_109$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10A	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10A$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10A_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10A$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10B	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10B$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10B_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10B$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10C	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10C$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10C_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10C$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10D	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10D$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10D_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10D$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10E	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10E$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10E_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10E$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10F	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10F$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_10F_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10F$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_110	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_110$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_110_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_110$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_111	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_111$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_111_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_111$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_112	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_112$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_112_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_112$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_113	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_113$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_113_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_113$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_114	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_114$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_114_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_114$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_115	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_115$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_115_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_115$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_116	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_116$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_116_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_116$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_117	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_117$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_117_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_117$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_118	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_118$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_118_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_118$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_119	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_119$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_119_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_119$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_11A	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_11A$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_11A_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_11A$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_11B	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_11B$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_11B_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_11B$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE$/;"	c	menu:Graphics support
CONFIG_FRAMEBUFFER_VESA_MODE_USER	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_USER$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FRAMEBUFFER_VESA_MODE_USER_MODULE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_USER$/;"	c	choice:Graphics support""choice8bacc91a0104
CONFIG_FSLDMAFEC	include/configs/M5475EVB.h	/^#define CONFIG_FSLDMAFEC$/;"	d
CONFIG_FSLDMAFEC	include/configs/M5485EVB.h	/^#define CONFIG_FSLDMAFEC$/;"	d
CONFIG_FSL_CAAM	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_FSL_CAAM$/;"	d
CONFIG_FSL_CAAM	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_FSL_CAAM$/;"	d
CONFIG_FSL_CAAM	drivers/crypto/fsl/Kconfig	/^config FSL_CAAM$/;"	c
CONFIG_FSL_CAAM	include/configs/B4860QDS.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/BSC9131RDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/C29XPCIE.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/P1010RDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/P2041RDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T102xQDS.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T102xRDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T1040QDS.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T104xRDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T208xQDS.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T208xRDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T4240QDS.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/T4240RDB.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/corenet_ds.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/ls1021atwr.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/ls1043a_common.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/ls1046a_common.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/ls2080a_common.h	/^#define CONFIG_FSL_CAAM	/;"	d
CONFIG_FSL_CAAM	include/configs/mx6_common.h	/^#define CONFIG_FSL_CAAM$/;"	d
CONFIG_FSL_CAAM	include/configs/mx7_common.h	/^#define CONFIG_FSL_CAAM$/;"	d
CONFIG_FSL_CAAM_MODULE	drivers/crypto/fsl/Kconfig	/^config FSL_CAAM$/;"	c
CONFIG_FSL_CADMUS	include/configs/MPC8541CDS.h	/^#define CONFIG_FSL_CADMUS$/;"	d
CONFIG_FSL_CADMUS	include/configs/MPC8548CDS.h	/^#define CONFIG_FSL_CADMUS$/;"	d
CONFIG_FSL_CADMUS	include/configs/MPC8555CDS.h	/^#define CONFIG_FSL_CADMUS$/;"	d
CONFIG_FSL_CORENET	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_FSL_CORENET	/;"	d
CONFIG_FSL_CORENET	include/configs/km/kmp204x-common.h	/^#define CONFIG_FSL_CORENET	/;"	d
CONFIG_FSL_CPLD	include/configs/P2041RDB.h	/^#define CONFIG_FSL_CPLD$/;"	d
CONFIG_FSL_DCU_FB	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_DCU_FB$/;"	d
CONFIG_FSL_DCU_FB	include/configs/ls1021atwr.h	/^#define CONFIG_FSL_DCU_FB$/;"	d
CONFIG_FSL_DCU_SII9022A	include/configs/ls1021atwr.h	/^#define CONFIG_FSL_DCU_SII9022A$/;"	d
CONFIG_FSL_DDR_BIST	include/configs/ls1043ardb.h	/^#define CONFIG_FSL_DDR_BIST$/;"	d
CONFIG_FSL_DDR_BIST	include/configs/ls1046ardb.h	/^#define CONFIG_FSL_DDR_BIST	/;"	d
CONFIG_FSL_DDR_BIST	include/configs/ls2080aqds.h	/^#define CONFIG_FSL_DDR_BIST	/;"	d
CONFIG_FSL_DDR_BIST	include/configs/ls2080ardb.h	/^#define CONFIG_FSL_DDR_BIST	/;"	d
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE	include/configs/T208xQDS.h	/^#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE$/;"	d
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE	include/configs/T4240RDB.h	/^#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE$/;"	d
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE	include/configs/t4qds.h	/^#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/B4860QDS.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/P1023RDB.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/T102xRDB.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/T1040QDS.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/T208xQDS.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/km/kmp204x-common.h	/^#define CONFIG_FSL_DDR_INTERACTIVE$/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_DDR_INTERACTIVE	/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/ls1043aqds.h	/^#define CONFIG_FSL_DDR_INTERACTIVE	/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/ls1043ardb.h	/^#define CONFIG_FSL_DDR_INTERACTIVE	/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/ls1046aqds.h	/^#define CONFIG_FSL_DDR_INTERACTIVE	/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/ls1046ardb.h	/^#define CONFIG_FSL_DDR_INTERACTIVE	/;"	d
CONFIG_FSL_DDR_INTERACTIVE	include/configs/ls2080a_common.h	/^#define CONFIG_FSL_DDR_INTERACTIVE	/;"	d
CONFIG_FSL_DDR_SYNC_REFRESH	include/configs/ls2080a_emu.h	/^#define CONFIG_FSL_DDR_SYNC_REFRESH$/;"	d
CONFIG_FSL_DEVICE_DISABLE	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_DEVICE_DISABLE$/;"	d
CONFIG_FSL_DEVICE_DISABLE	include/configs/ls1021atwr.h	/^#define CONFIG_FSL_DEVICE_DISABLE$/;"	d
CONFIG_FSL_DIU_CH7301	include/configs/T102xQDS.h	/^#define CONFIG_FSL_DIU_CH7301$/;"	d
CONFIG_FSL_DIU_CH7301	include/configs/T1040QDS.h	/^#define CONFIG_FSL_DIU_CH7301$/;"	d
CONFIG_FSL_DIU_CH7301	include/configs/T104xRDB.h	/^#define CONFIG_FSL_DIU_CH7301$/;"	d
CONFIG_FSL_DIU_CH7301	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_DIU_CH7301$/;"	d
CONFIG_FSL_DIU_FB	include/configs/MPC8610HPCD.h	/^#define CONFIG_FSL_DIU_FB$/;"	d
CONFIG_FSL_DIU_FB	include/configs/T102xQDS.h	/^#define CONFIG_FSL_DIU_FB$/;"	d
CONFIG_FSL_DIU_FB	include/configs/T1040QDS.h	/^#define CONFIG_FSL_DIU_FB$/;"	d
CONFIG_FSL_DIU_FB	include/configs/T104xRDB.h	/^#define CONFIG_FSL_DIU_FB$/;"	d
CONFIG_FSL_DIU_FB	include/configs/aria.h	/^#define CONFIG_FSL_DIU_FB	/;"	d
CONFIG_FSL_DIU_FB	include/configs/controlcenterd.h	/^#define CONFIG_FSL_DIU_FB$/;"	d
CONFIG_FSL_DIU_FB	include/configs/pdm360ng.h	/^#define CONFIG_FSL_DIU_FB	/;"	d
CONFIG_FSL_DMA	arch/powerpc/include/asm/config.h	/^#define CONFIG_FSL_DMA$/;"	d
CONFIG_FSL_DSPI	drivers/spi/Kconfig	/^config FSL_DSPI$/;"	c	menu:SPI Support
CONFIG_FSL_DSPI	include/configs/ls1043a_common.h	/^#define CONFIG_FSL_DSPI$/;"	d
CONFIG_FSL_DSPI1	include/configs/ls1012aqds.h	/^#define CONFIG_FSL_DSPI1$/;"	d
CONFIG_FSL_DSPI_MODULE	drivers/spi/Kconfig	/^config FSL_DSPI$/;"	c	menu:SPI Support
CONFIG_FSL_ELBC	include/configs/MPC8313ERDB.h	/^#define CONFIG_FSL_ELBC /;"	d
CONFIG_FSL_ELBC	include/configs/MPC8315ERDB.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/MPC8569MDS.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/MPC8572DS.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/P1022DS.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/P1023RDB.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/P2041RDB.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/UCP1020.h	/^#define CONFIG_FSL_ELBC$/;"	d
CONFIG_FSL_ELBC	include/configs/controlcenterd.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/corenet_ds.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/cyrus.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/ids8313.h	/^#define CONFIG_FSL_ELBC$/;"	d
CONFIG_FSL_ELBC	include/configs/km/kmp204x-common.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_ELBC$/;"	d
CONFIG_FSL_ELBC	include/configs/p1_twr.h	/^#define CONFIG_FSL_ELBC$/;"	d
CONFIG_FSL_ELBC	include/configs/ve8313.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/xpedite537x.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ELBC	include/configs/xpedite550x.h	/^#define CONFIG_FSL_ELBC	/;"	d
CONFIG_FSL_ESDHC	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/MPC8308RDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/MPC8569MDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/P1010RDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/P1022DS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/P2041RDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T102xQDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T102xRDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T1040QDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T104xRDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T208xQDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T208xRDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T4240QDS.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/T4240RDB.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/UCP1020.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/colibri_vf.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/controlcenterd.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/corenet_ds.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/cyrus.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ge_bx50v3.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/hrcon.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls1012aqds.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls1012ardb.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls1021atwr.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls1043a_common.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls1046a_common.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls2080a_simu.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls2080aqds.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ls2080ardb.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/m53evk.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx25pdk.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx35pdk.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx51evk.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx53ard.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx53evk.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx53loco.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx53smd.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx6_common.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/mx7_common.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/p1_twr.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/pcm052.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/pico-imx6ul.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/s32v234evb.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/strider.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/ts4800.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/usbarmory.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/vf610twr.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC	include/configs/woodburn_common.h	/^#define CONFIG_FSL_ESDHC$/;"	d
CONFIG_FSL_ESDHC_ADAPTER_IDENT	include/configs/T1040QDS.h	/^#define CONFIG_FSL_ESDHC_ADAPTER_IDENT$/;"	d
CONFIG_FSL_ESDHC_ADAPTER_IDENT	include/configs/T208xQDS.h	/^#define CONFIG_FSL_ESDHC_ADAPTER_IDENT$/;"	d
CONFIG_FSL_ESDHC_PIN_MUX	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_ESDHC_PIN_MUX$/;"	d
CONFIG_FSL_ESDHC_PIN_MUX	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_ESDHC_PIN_MUX$/;"	d
CONFIG_FSL_ESDHC_PIN_MUX	include/configs/MPC8569MDS.h	/^#define CONFIG_FSL_ESDHC_PIN_MUX$/;"	d
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK	include/configs/T1040QDS.h	/^#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK$/;"	d
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK	include/configs/T208xQDS.h	/^#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK$/;"	d
CONFIG_FSL_ESPI	drivers/spi/Kconfig	/^config FSL_ESPI$/;"	c	menu:SPI Support
CONFIG_FSL_ESPI_MODULE	drivers/spi/Kconfig	/^config FSL_ESPI$/;"	c	menu:SPI Support
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/P1010RDB.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/P1022DS.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/P2041RDB.h	/^	#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/UCP1020.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/controlcenterd.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/corenet_ds.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/cyrus.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FIXED_MMC_LOCATION	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_FIXED_MMC_LOCATION$/;"	d
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION$/;"	d
CONFIG_FSL_IFC	include/configs/B4860QDS.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/BSC9131RDB.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/C29XPCIE.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/P1010RDB.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T102xQDS.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T102xRDB.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T1040QDS.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T104xRDB.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T208xQDS.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T208xRDB.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/T4240RDB.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IFC	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_IFC$/;"	d
CONFIG_FSL_IFC	include/configs/ls1021atwr.h	/^#define CONFIG_FSL_IFC$/;"	d
CONFIG_FSL_IFC	include/configs/ls1043a_common.h	/^#define CONFIG_FSL_IFC$/;"	d
CONFIG_FSL_IFC	include/configs/ls1046aqds.h	/^#define	CONFIG_FSL_IFC$/;"	d
CONFIG_FSL_IFC	include/configs/ls1046ardb.h	/^#define CONFIG_FSL_IFC$/;"	d
CONFIG_FSL_IFC	include/configs/ls2080a_common.h	/^#define CONFIG_FSL_IFC$/;"	d
CONFIG_FSL_IFC	include/configs/t4qds.h	/^#define CONFIG_FSL_IFC	/;"	d
CONFIG_FSL_IIM	include/configs/mx51evk.h	/^#define CONFIG_FSL_IIM$/;"	d
CONFIG_FSL_IIM	include/configs/usbarmory.h	/^#define CONFIG_FSL_IIM$/;"	d
CONFIG_FSL_ISBC_KEY_EXT	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_FSL_ISBC_KEY_EXT$/;"	d
CONFIG_FSL_ISBC_KEY_EXT	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_FSL_ISBC_KEY_EXT$/;"	d
CONFIG_FSL_LAW	include/configs/B4860QDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/B4860QDS.h	/^#define CONFIG_FSL_LAW /;"	d
CONFIG_FSL_LAW	include/configs/BSC9131RDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/C29XPCIE.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8540ADS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8541CDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8544DS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8548CDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8555CDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8560ADS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8568MDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8569MDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8572DS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8610HPCD.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/MPC8641HPCN.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/P1010RDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/P1010RDB.h	/^#define CONFIG_FSL_LAW /;"	d
CONFIG_FSL_LAW	include/configs/P1022DS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/P1023RDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/P2041RDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T102xQDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T102xRDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T1040QDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T104xRDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T104xRDB.h	/^#define CONFIG_FSL_LAW /;"	d
CONFIG_FSL_LAW	include/configs/T208xQDS.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T208xRDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T4240QDS.h	/^#define CONFIG_FSL_LAW /;"	d
CONFIG_FSL_LAW	include/configs/T4240RDB.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/T4240RDB.h	/^#define CONFIG_FSL_LAW /;"	d
CONFIG_FSL_LAW	include/configs/UCP1020.h	/^#define CONFIG_FSL_LAW$/;"	d
CONFIG_FSL_LAW	include/configs/controlcenterd.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/corenet_ds.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/cyrus.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/km/kmp204x-common.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_LAW /;"	d
CONFIG_FSL_LAW	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_LAW$/;"	d
CONFIG_FSL_LAW	include/configs/p1_twr.h	/^#define CONFIG_FSL_LAW$/;"	d
CONFIG_FSL_LAW	include/configs/sbc8548.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/sbc8641d.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/socrates.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/t4qds.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/xpedite517x.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/xpedite520x.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/xpedite537x.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAW	include/configs/xpedite550x.h	/^#define CONFIG_FSL_LAW	/;"	d
CONFIG_FSL_LAYERSCAPE	include/configs/ls1012a_common.h	/^#define CONFIG_FSL_LAYERSCAPE$/;"	d
CONFIG_FSL_LAYERSCAPE	include/configs/ls1043a_common.h	/^#define CONFIG_FSL_LAYERSCAPE$/;"	d
CONFIG_FSL_LAYERSCAPE	include/configs/ls1046a_common.h	/^#define CONFIG_FSL_LAYERSCAPE$/;"	d
CONFIG_FSL_LAYERSCAPE	include/configs/ls2080a_common.h	/^#define CONFIG_FSL_LAYERSCAPE$/;"	d
CONFIG_FSL_LBC	arch/powerpc/include/asm/config.h	/^#define CONFIG_FSL_LBC$/;"	d
CONFIG_FSL_LINFLEXUART	include/configs/s32v234evb.h	/^#define CONFIG_FSL_LINFLEXUART$/;"	d
CONFIG_FSL_LPUART	drivers/serial/Kconfig	/^config FSL_LPUART$/;"	c	menu:Serial drivers
CONFIG_FSL_LPUART_MODULE	drivers/serial/Kconfig	/^config FSL_LPUART$/;"	c	menu:Serial drivers
CONFIG_FSL_LSCH2	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config FSL_LSCH2$/;"	c
CONFIG_FSL_LSCH2_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config FSL_LSCH2$/;"	c
CONFIG_FSL_LSCH3	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config FSL_LSCH3$/;"	c
CONFIG_FSL_LSCH3_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config FSL_LSCH3$/;"	c
CONFIG_FSL_MC9SDZ60	include/configs/mx35pdk.h	/^#define CONFIG_FSL_MC9SDZ60$/;"	d
CONFIG_FSL_MC_ENET	include/configs/ls2080a_common.h	/^#define CONFIG_FSL_MC_ENET$/;"	d
CONFIG_FSL_MEMAC	include/configs/ls2080aqds.h	/^#define CONFIG_FSL_MEMAC$/;"	d
CONFIG_FSL_MEMAC	include/configs/ls2080ardb.h	/^#define CONFIG_FSL_MEMAC$/;"	d
CONFIG_FSL_NFC_CHIPS	include/configs/aria.h	/^#define CONFIG_FSL_NFC_CHIPS	/;"	d
CONFIG_FSL_NFC_CHIPS	include/configs/mecp5123.h	/^#define CONFIG_FSL_NFC_CHIPS	/;"	d
CONFIG_FSL_NFC_CHIPS	include/configs/mpc5121ads.h	/^#define CONFIG_FSL_NFC_CHIPS /;"	d
CONFIG_FSL_NFC_CHIPS	include/configs/pdm360ng.h	/^#define CONFIG_FSL_NFC_CHIPS /;"	d
CONFIG_FSL_NFC_SPARE_SIZE	include/configs/aria.h	/^#define CONFIG_FSL_NFC_SPARE_SIZE	/;"	d
CONFIG_FSL_NFC_SPARE_SIZE	include/configs/mecp5123.h	/^#define CONFIG_FSL_NFC_SPARE_SIZE	/;"	d
CONFIG_FSL_NFC_SPARE_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_FSL_NFC_SPARE_SIZE /;"	d
CONFIG_FSL_NFC_SPARE_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_FSL_NFC_SPARE_SIZE /;"	d
CONFIG_FSL_NFC_WIDTH	include/configs/aria.h	/^#define CONFIG_FSL_NFC_WIDTH	/;"	d
CONFIG_FSL_NFC_WIDTH	include/configs/mecp5123.h	/^#define CONFIG_FSL_NFC_WIDTH	/;"	d
CONFIG_FSL_NFC_WIDTH	include/configs/mpc5121ads.h	/^#define CONFIG_FSL_NFC_WIDTH /;"	d
CONFIG_FSL_NFC_WIDTH	include/configs/pdm360ng.h	/^#define CONFIG_FSL_NFC_WIDTH /;"	d
CONFIG_FSL_NFC_WRITE_SIZE	include/configs/aria.h	/^#define CONFIG_FSL_NFC_WRITE_SIZE	/;"	d
CONFIG_FSL_NFC_WRITE_SIZE	include/configs/mecp5123.h	/^#define CONFIG_FSL_NFC_WRITE_SIZE	/;"	d
CONFIG_FSL_NFC_WRITE_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_FSL_NFC_WRITE_SIZE /;"	d
CONFIG_FSL_NFC_WRITE_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_FSL_NFC_WRITE_SIZE /;"	d
CONFIG_FSL_NGPIXIS	include/configs/P1022DS.h	/^#define CONFIG_FSL_NGPIXIS$/;"	d
CONFIG_FSL_NGPIXIS	include/configs/P3041DS.h	/^#define CONFIG_FSL_NGPIXIS	/;"	d
CONFIG_FSL_NGPIXIS	include/configs/P4080DS.h	/^#define CONFIG_FSL_NGPIXIS	/;"	d
CONFIG_FSL_NGPIXIS	include/configs/P5020DS.h	/^#define CONFIG_FSL_NGPIXIS	/;"	d
CONFIG_FSL_NGPIXIS	include/configs/P5040DS.h	/^#define CONFIG_FSL_NGPIXIS	/;"	d
CONFIG_FSL_PCIE_DISABLE_ASPM	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_FSL_PCIE_DISABLE_ASPM$/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/C29XPCIE.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/MPC8544DS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/MPC8548CDS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/MPC8568MDS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/MPC8569MDS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/MPC8572DS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/P1010RDB.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/P1022DS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/P1023RDB.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/T208xQDS.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/T208xQDS.h	/^#define CONFIG_FSL_PCIE_RESET$/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/T208xRDB.h	/^#define CONFIG_FSL_PCIE_RESET /;"	d
CONFIG_FSL_PCIE_RESET	include/configs/UCP1020.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/controlcenterd.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/p1_twr.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/sbc8548.h	/^#define CONFIG_FSL_PCIE_RESET /;"	d
CONFIG_FSL_PCIE_RESET	include/configs/xpedite537x.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCIE_RESET	include/configs/xpedite550x.h	/^#define CONFIG_FSL_PCIE_RESET	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/B4860QDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/C29XPCIE.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8544DS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8548CDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8568MDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8569MDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8572DS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8610HPCD.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/MPC8641HPCN.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/P1010RDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/P1022DS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/P1023RDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/P2041RDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T102xQDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T102xRDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T1040QDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T104xRDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T208xQDS.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T208xRDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/T4240RDB.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/UCP1020.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/controlcenterd.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/corenet_ds.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/cyrus.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/km/kmp204x-common.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/p1_twr.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/qemu-ppce500.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/sbc8548.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/sbc8641d.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/t4qds.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/xpedite517x.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/xpedite520x.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/xpedite537x.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PCI_INIT	include/configs/xpedite550x.h	/^#define CONFIG_FSL_PCI_INIT	/;"	d
CONFIG_FSL_PIXIS	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_PIXIS	/;"	d
CONFIG_FSL_PIXIS	include/configs/MPC8544DS.h	/^#define CONFIG_FSL_PIXIS	/;"	d
CONFIG_FSL_PIXIS	include/configs/MPC8572DS.h	/^#define CONFIG_FSL_PIXIS	/;"	d
CONFIG_FSL_PIXIS	include/configs/MPC8610HPCD.h	/^#define CONFIG_FSL_PIXIS	/;"	d
CONFIG_FSL_PIXIS	include/configs/MPC8641HPCN.h	/^#define CONFIG_FSL_PIXIS	/;"	d
CONFIG_FSL_PMIC_BITLEN	include/configs/mx31ads.h	/^#define CONFIG_FSL_PMIC_BITLEN	/;"	d
CONFIG_FSL_PMIC_BITLEN	include/configs/mx31pdk.h	/^#define CONFIG_FSL_PMIC_BITLEN	/;"	d
CONFIG_FSL_PMIC_BITLEN	include/configs/mx51evk.h	/^#define CONFIG_FSL_PMIC_BITLEN	/;"	d
CONFIG_FSL_PMIC_BUS	include/configs/mx31ads.h	/^#define CONFIG_FSL_PMIC_BUS	/;"	d
CONFIG_FSL_PMIC_BUS	include/configs/mx31pdk.h	/^#define CONFIG_FSL_PMIC_BUS	/;"	d
CONFIG_FSL_PMIC_BUS	include/configs/mx51evk.h	/^#define CONFIG_FSL_PMIC_BUS	/;"	d
CONFIG_FSL_PMIC_CLK	include/configs/mx31ads.h	/^#define CONFIG_FSL_PMIC_CLK	/;"	d
CONFIG_FSL_PMIC_CLK	include/configs/mx31pdk.h	/^#define CONFIG_FSL_PMIC_CLK	/;"	d
CONFIG_FSL_PMIC_CLK	include/configs/mx51evk.h	/^#define CONFIG_FSL_PMIC_CLK	/;"	d
CONFIG_FSL_PMIC_CS	include/configs/mx31ads.h	/^#define CONFIG_FSL_PMIC_CS	/;"	d
CONFIG_FSL_PMIC_CS	include/configs/mx31pdk.h	/^#define CONFIG_FSL_PMIC_CS	/;"	d
CONFIG_FSL_PMIC_CS	include/configs/mx51evk.h	/^#define CONFIG_FSL_PMIC_CS	/;"	d
CONFIG_FSL_PMIC_MODE	include/configs/mx31ads.h	/^#define CONFIG_FSL_PMIC_MODE	/;"	d
CONFIG_FSL_PMIC_MODE	include/configs/mx31pdk.h	/^#define CONFIG_FSL_PMIC_MODE	/;"	d
CONFIG_FSL_PMIC_MODE	include/configs/mx51evk.h	/^#define CONFIG_FSL_PMIC_MODE	/;"	d
CONFIG_FSL_QIXIS	include/configs/B4860QDS.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS	include/configs/BSC9132QDS.h	/^#define CONFIG_FSL_QIXIS$/;"	d
CONFIG_FSL_QIXIS	include/configs/T102xQDS.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS	include/configs/T1040QDS.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS	include/configs/T208xQDS.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS	include/configs/T4240QDS.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS	include/configs/ls1012aqds.h	/^#define CONFIG_FSL_QIXIS$/;"	d
CONFIG_FSL_QIXIS	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_QIXIS$/;"	d
CONFIG_FSL_QIXIS	include/configs/ls1043aqds.h	/^#define CONFIG_FSL_QIXIS$/;"	d
CONFIG_FSL_QIXIS	include/configs/ls1046aqds.h	/^#define CONFIG_FSL_QIXIS$/;"	d
CONFIG_FSL_QIXIS	include/configs/ls2080aqds.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS	include/configs/ls2080ardb.h	/^#define CONFIG_FSL_QIXIS	/;"	d
CONFIG_FSL_QIXIS_V2	include/configs/B4860QDS.h	/^#define CONFIG_FSL_QIXIS_V2$/;"	d
CONFIG_FSL_QSPI	drivers/spi/Kconfig	/^config FSL_QSPI$/;"	c	menu:SPI Support
CONFIG_FSL_QSPI	include/configs/ls1012a_common.h	/^#define CONFIG_FSL_QSPI$/;"	d
CONFIG_FSL_QSPI	include/configs/ls1043aqds.h	/^#define CONFIG_FSL_QSPI$/;"	d
CONFIG_FSL_QSPI_MODULE	drivers/spi/Kconfig	/^config FSL_QSPI$/;"	c	menu:SPI Support
CONFIG_FSL_SATA	include/configs/MPC8315ERDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/P1010RDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/P1022DS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/P2041RDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T102xQDS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T1040QDS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T104xRDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T208xQDS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T208xRDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T4240QDS.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/T4240RDB.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/controlcenterd.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/corenet_ds.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/cyrus.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA	include/configs/t4qds.h	/^#define CONFIG_FSL_SATA$/;"	d
CONFIG_FSL_SATA_ERRATUM_A001	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_FSL_SATA_ERRATUM_A001$/;"	d
CONFIG_FSL_SATA_V2	include/configs/P1010RDB.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/P1022DS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/P2041RDB.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/P3041DS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/P5020DS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/P5040DS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T102xQDS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T1040QDS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T104xRDB.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T208xQDS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T208xRDB.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T4240QDS.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/T4240RDB.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SATA_V2	include/configs/cyrus.h	/^#define CONFIG_FSL_SATA_V2$/;"	d
CONFIG_FSL_SDHC_V2_3	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_FSL_SDHC_V2_3$/;"	d
CONFIG_FSL_SDRAM_TYPE	include/fsl_ddr_sdram.h	/^#define CONFIG_FSL_SDRAM_TYPE	/;"	d
CONFIG_FSL_SEC_MON	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_FSL_SEC_MON$/;"	d
CONFIG_FSL_SEC_MON	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_FSL_SEC_MON$/;"	d
CONFIG_FSL_SEC_MON	drivers/misc/Kconfig	/^config FSL_SEC_MON$/;"	c	menu:Multifunction device drivers
CONFIG_FSL_SEC_MON_MODULE	drivers/misc/Kconfig	/^config FSL_SEC_MON$/;"	c	menu:Multifunction device drivers
CONFIG_FSL_SERDES	include/configs/MPC8308RDB.h	/^#define CONFIG_FSL_SERDES$/;"	d
CONFIG_FSL_SERDES	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_SERDES$/;"	d
CONFIG_FSL_SERDES	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_SERDES$/;"	d
CONFIG_FSL_SERDES	include/configs/hrcon.h	/^#define CONFIG_FSL_SERDES$/;"	d
CONFIG_FSL_SERDES	include/configs/mpc8308_p1m.h	/^#define CONFIG_FSL_SERDES$/;"	d
CONFIG_FSL_SERDES	include/configs/strider.h	/^#define CONFIG_FSL_SERDES$/;"	d
CONFIG_FSL_SERDES1	include/configs/MPC8308RDB.h	/^#define CONFIG_FSL_SERDES1	/;"	d
CONFIG_FSL_SERDES1	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_SERDES1	/;"	d
CONFIG_FSL_SERDES1	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_SERDES1	/;"	d
CONFIG_FSL_SERDES1	include/configs/hrcon.h	/^#define CONFIG_FSL_SERDES1	/;"	d
CONFIG_FSL_SERDES1	include/configs/mpc8308_p1m.h	/^#define CONFIG_FSL_SERDES1	/;"	d
CONFIG_FSL_SERDES1	include/configs/strider.h	/^#define CONFIG_FSL_SERDES1	/;"	d
CONFIG_FSL_SERDES2	include/configs/MPC837XEMDS.h	/^#define CONFIG_FSL_SERDES2	/;"	d
CONFIG_FSL_SERDES2	include/configs/MPC837XERDB.h	/^#define CONFIG_FSL_SERDES2	/;"	d
CONFIG_FSL_SGMII_RISER	include/configs/MPC8536DS.h	/^#define CONFIG_FSL_SGMII_RISER	/;"	d
CONFIG_FSL_SGMII_RISER	include/configs/MPC8544DS.h	/^#define CONFIG_FSL_SGMII_RISER	/;"	d
CONFIG_FSL_SGMII_RISER	include/configs/MPC8572DS.h	/^#define CONFIG_FSL_SGMII_RISER	/;"	d
CONFIG_FSL_SGMII_RISER	include/configs/ls1021aqds.h	/^#define CONFIG_FSL_SGMII_RISER	/;"	d
CONFIG_FSL_SPI_INTERFACE	include/configs/ls1012a_common.h	/^#define CONFIG_FSL_SPI_INTERFACE$/;"	d
CONFIG_FSL_TBCLK_EXTRA_DIV	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define CONFIG_FSL_TBCLK_EXTRA_DIV /;"	d	file:
CONFIG_FSL_TRUST_ARCH_v1	arch/powerpc/include/asm/fsl_secure_boot.h	/^	#define	CONFIG_FSL_TRUST_ARCH_v1$/;"	d
CONFIG_FSL_TZPC_BP147	include/configs/ls2080a_common.h	/^#define CONFIG_FSL_TZPC_BP147$/;"	d
CONFIG_FSL_USDHC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_FSL_USDHC$/;"	d
CONFIG_FSL_USDHC	include/configs/ge_bx50v3.h	/^#define CONFIG_FSL_USDHC$/;"	d
CONFIG_FSL_USDHC	include/configs/mx6_common.h	/^#define CONFIG_FSL_USDHC$/;"	d
CONFIG_FSL_USDHC	include/configs/mx7_common.h	/^#define CONFIG_FSL_USDHC$/;"	d
CONFIG_FSL_USDHC	include/configs/pico-imx6ul.h	/^#define CONFIG_FSL_USDHC$/;"	d
CONFIG_FSL_USDHC	include/configs/s32v234evb.h	/^#define CONFIG_FSL_USDHC$/;"	d
CONFIG_FSL_VIA	include/configs/MPC8541CDS.h	/^#define CONFIG_FSL_VIA$/;"	d
CONFIG_FSL_VIA	include/configs/MPC8548CDS.h	/^#define CONFIG_FSL_VIA$/;"	d
CONFIG_FSL_VIA	include/configs/MPC8555CDS.h	/^#define CONFIG_FSL_VIA$/;"	d
CONFIG_FSMC_NAND_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_FSMC_NAND_BASE	/;"	d
CONFIG_FSMTDBLK	include/configs/spear-common.h	/^#define CONFIG_FSMTDBLK	/;"	d
CONFIG_FSP_ADDR	arch/x86/Kconfig	/^config FSP_ADDR$/;"	c	menu:x86 architecture
CONFIG_FSP_ADDR	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_ADDR$/;"	c
CONFIG_FSP_ADDR_MODULE	arch/x86/Kconfig	/^config FSP_ADDR$/;"	c	menu:x86 architecture
CONFIG_FSP_ADDR_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_ADDR$/;"	c
CONFIG_FSP_BROKEN_HOB	arch/x86/Kconfig	/^config FSP_BROKEN_HOB$/;"	c	menu:x86 architecture
CONFIG_FSP_BROKEN_HOB	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_BROKEN_HOB$/;"	c
CONFIG_FSP_BROKEN_HOB_MODULE	arch/x86/Kconfig	/^config FSP_BROKEN_HOB$/;"	c	menu:x86 architecture
CONFIG_FSP_BROKEN_HOB_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_BROKEN_HOB$/;"	c
CONFIG_FSP_FILE	arch/x86/Kconfig	/^config FSP_FILE$/;"	c	menu:x86 architecture
CONFIG_FSP_FILE_MODULE	arch/x86/Kconfig	/^config FSP_FILE$/;"	c	menu:x86 architecture
CONFIG_FSP_SYS_MALLOC_F_LEN	arch/x86/Kconfig	/^config FSP_SYS_MALLOC_F_LEN$/;"	c	menu:x86 architecture
CONFIG_FSP_SYS_MALLOC_F_LEN_MODULE	arch/x86/Kconfig	/^config FSP_SYS_MALLOC_F_LEN$/;"	c	menu:x86 architecture
CONFIG_FSP_TEMP_RAM_ADDR	arch/x86/Kconfig	/^config FSP_TEMP_RAM_ADDR$/;"	c	menu:x86 architecture
CONFIG_FSP_TEMP_RAM_ADDR_MODULE	arch/x86/Kconfig	/^config FSP_TEMP_RAM_ADDR$/;"	c	menu:x86 architecture
CONFIG_FSP_USE_UPD	arch/x86/Kconfig	/^config FSP_USE_UPD$/;"	c	menu:x86 architecture
CONFIG_FSP_USE_UPD	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_USE_UPD$/;"	c
CONFIG_FSP_USE_UPD_MODULE	arch/x86/Kconfig	/^config FSP_USE_UPD$/;"	c	menu:x86 architecture
CONFIG_FSP_USE_UPD_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_USE_UPD$/;"	c
CONFIG_FS_EXT4	include/autoconf.mk	/^CONFIG_FS_EXT4=y$/;"	m
CONFIG_FS_EXT4	include/config_fallbacks.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/brppt1.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/hikey.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/pic32mzdask.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/rcar-gen2-common.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/rcar-gen3-common.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/rk3399_common.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	include/configs/sandbox.h	/^#define CONFIG_FS_EXT4$/;"	d
CONFIG_FS_EXT4	spl/include/autoconf.mk	/^CONFIG_FS_EXT4=y$/;"	m
CONFIG_FS_FAT	include/autoconf.mk	/^CONFIG_FS_FAT=y$/;"	m
CONFIG_FS_FAT	include/config_fallbacks.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	include/configs/pic32mzdask.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	include/configs/rk3399_common.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	include/configs/sandbox.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	include/configs/siemens-am33x-common.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	include/configs/ti816x_evm.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_FS_FAT$/;"	d
CONFIG_FS_FAT	spl/include/autoconf.mk	/^CONFIG_FS_FAT=y$/;"	m
CONFIG_FS_FAT_MAX_CLUSTSIZE	include/fat.h	/^#define CONFIG_FS_FAT_MAX_CLUSTSIZE /;"	d
CONFIG_FTAHBC020S	include/configs/adp-ag101p.h	/^#define CONFIG_FTAHBC020S$/;"	d
CONFIG_FTAHBC020S_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTAHBC020S_BASE	/;"	d
CONFIG_FTAHBC020S_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTAHBC020S_BASE	/;"	d
CONFIG_FTAPBBRG020S_01_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTAPBBRG020S_01_BASE	/;"	d
CONFIG_FTAPBBRG020S_01_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTAPBBRG020S_01_BASE	/;"	d
CONFIG_FTCFC010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTCFC010_BASE	/;"	d
CONFIG_FTCFC010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTCFC010_BASE	/;"	d
CONFIG_FTDMAC020_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTDMAC020_BASE	/;"	d
CONFIG_FTDMAC020_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTDMAC020_BASE	/;"	d
CONFIG_FTGMAC100_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTGMAC100_BASE	/;"	d
CONFIG_FTGPIO010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTGPIO010_BASE	/;"	d
CONFIG_FTGPIO010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTGPIO010_BASE	/;"	d
CONFIG_FTI2C010_CLOCK	drivers/i2c/fti2c010.c	/^#define CONFIG_FTI2C010_CLOCK /;"	d	file:
CONFIG_FTI2C010_TIMEOUT	drivers/i2c/fti2c010.c	/^#define CONFIG_FTI2C010_TIMEOUT /;"	d	file:
CONFIG_FTIDE020S_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTIDE020S_BASE	/;"	d
CONFIG_FTIIC010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTIIC010_BASE	/;"	d
CONFIG_FTIIC010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTIIC010_BASE	/;"	d
CONFIG_FTINTC010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTINTC010_BASE	/;"	d
CONFIG_FTLCDC100_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTLCDC100_BASE	/;"	d
CONFIG_FTMAC100	include/configs/adp-ag101p.h	/^#define CONFIG_FTMAC100$/;"	d
CONFIG_FTMAC100_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTMAC100_BASE	/;"	d
CONFIG_FTPCI100_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTPCI100_BASE	/;"	d
CONFIG_FTPMU010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTPMU010_BASE	/;"	d
CONFIG_FTPMU010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTPMU010_BASE	/;"	d
CONFIG_FTPMU010_POWER	include/configs/adp-ag101p.h	/^#define CONFIG_FTPMU010_POWER$/;"	d
CONFIG_FTPWM010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTPWM010_BASE	/;"	d
CONFIG_FTRTC010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTRTC010_BASE	/;"	d
CONFIG_FTRTC010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTRTC010_BASE	/;"	d
CONFIG_FTRTC010_PCLK	include/configs/adp-ag101p.h	/^#define CONFIG_FTRTC010_PCLK$/;"	d
CONFIG_FTSDC010	include/configs/adp-ag101p.h	/^#define CONFIG_FTSDC010$/;"	d
CONFIG_FTSDC010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTSDC010_BASE	/;"	d
CONFIG_FTSDC010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTSDC010_BASE	/;"	d
CONFIG_FTSDC010_NUMBER	include/configs/adp-ag101p.h	/^#define CONFIG_FTSDC010_NUMBER	/;"	d
CONFIG_FTSDC010_SDIO	include/configs/adp-ag101p.h	/^#define CONFIG_FTSDC010_SDIO$/;"	d
CONFIG_FTSDC021_CLOCK	drivers/mmc/ftsdc021_sdhci.c	/^#define CONFIG_FTSDC021_CLOCK /;"	d	file:
CONFIG_FTSDMC021	include/configs/adp-ag101p.h	/^#define CONFIG_FTSDMC021$/;"	d
CONFIG_FTSDMC021_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTSDMC021_BASE	/;"	d
CONFIG_FTSMC020	include/configs/adp-ag101p.h	/^#define CONFIG_FTSMC020$/;"	d
CONFIG_FTSMC020_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTSMC020_BASE	/;"	d
CONFIG_FTSSP010_01_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTSSP010_01_BASE	/;"	d
CONFIG_FTSSP010_01_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTSSP010_01_BASE	/;"	d
CONFIG_FTSSP010_02_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTSSP010_02_BASE	/;"	d
CONFIG_FTSSP010_02_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTSSP010_02_BASE	/;"	d
CONFIG_FTTMR010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTTMR010_BASE	/;"	d
CONFIG_FTTMR010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTTMR010_BASE	/;"	d
CONFIG_FTUART010_01_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTUART010_01_BASE	/;"	d
CONFIG_FTUART010_01_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTUART010_01_BASE	/;"	d
CONFIG_FTUART010_02_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTUART010_02_BASE	/;"	d
CONFIG_FTUART010_02_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTUART010_02_BASE	/;"	d
CONFIG_FTUART010_03_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTUART010_03_BASE	/;"	d
CONFIG_FTWDT010_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_FTWDT010_BASE	/;"	d
CONFIG_FTWDT010_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FTWDT010_BASE	/;"	d
CONFIG_FTWDT010_WATCHDOG	include/configs/adp-ag101p.h	/^#define CONFIG_FTWDT010_WATCHDOG$/;"	d
CONFIG_FUNC_ISRAM_ADDR	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^#define CONFIG_FUNC_ISRAM_ADDR	/;"	d	file:
CONFIG_FZOTG266HD0A_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_FZOTG266HD0A_BASE	/;"	d
CONFIG_GATEWAYIP	include/configs/M5208EVBE.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5235EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5272C3.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5282EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M53017EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5329EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5373EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M54418TWR.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M54451EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M54455EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5475EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/M5485EVB.h	/^#	define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/MPC8536DS.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/MPC8540ADS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8541CDS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8544DS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8548CDS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8555CDS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8560ADS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8568MDS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8569MDS.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/MPC8572DS.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/MPC8610HPCD.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/MPC8641HPCN.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/UCP1020.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/bct-brettl2.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/bf537-minotaur.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/bf537-srv1.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/bfin_adi_common.h	/^#  define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/blackstamp.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/blackvme.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/gr_ep2s60.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/gr_xc3s_1500.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/grsim.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/grsim_leon2.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/microblaze-generic.h	/^#define	CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/sbc8548.h	/^#define CONFIG_GATEWAYIP /;"	d
CONFIG_GATEWAYIP	include/configs/sbc8641d.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GATEWAYIP	include/configs/uniphier.h	/^#define CONFIG_GATEWAYIP	/;"	d
CONFIG_GENERATE_ACPI_TABLE	arch/x86/Kconfig	/^config GENERATE_ACPI_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_ACPI_TABLE_MODULE	arch/x86/Kconfig	/^config GENERATE_ACPI_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_MP_TABLE	arch/x86/Kconfig	/^config GENERATE_MP_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_MP_TABLE_MODULE	arch/x86/Kconfig	/^config GENERATE_MP_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_PIRQ_TABLE	arch/x86/Kconfig	/^config GENERATE_PIRQ_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_PIRQ_TABLE_MODULE	arch/x86/Kconfig	/^config GENERATE_PIRQ_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_SFI_TABLE	arch/x86/Kconfig	/^config GENERATE_SFI_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_SFI_TABLE_MODULE	arch/x86/Kconfig	/^config GENERATE_SFI_TABLE$/;"	c	menu:x86 architecture""System tables
CONFIG_GENERATE_SMBIOS_TABLE	include/config/auto.conf	/^CONFIG_GENERATE_SMBIOS_TABLE=y$/;"	k
CONFIG_GENERATE_SMBIOS_TABLE	include/generated/autoconf.h	/^#define CONFIG_GENERATE_SMBIOS_TABLE /;"	d
CONFIG_GENERATE_SMBIOS_TABLE	lib/Kconfig	/^config GENERATE_SMBIOS_TABLE$/;"	c	menu:Library routines""System tables
CONFIG_GENERATE_SMBIOS_TABLE_MODULE	lib/Kconfig	/^config GENERATE_SMBIOS_TABLE$/;"	c	menu:Library routines""System tables
CONFIG_GENERIC_ATMEL_MCI	include/configs/at91sam9260ek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/at91sam9263ek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/at91sam9n12ek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/at91sam9rlek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/at91sam9x5ek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/atngw100.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/atngw100mkii.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/atstk1002.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/ethernut5.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/ma5d4evk.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/picosam9g45.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/sama5d3_xplained.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/sama5d3xek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/sama5d4_xplained.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/sama5d4ek.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/snapper9g45.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_ATMEL_MCI	include/configs/vinco.h	/^#define CONFIG_GENERIC_ATMEL_MCI$/;"	d
CONFIG_GENERIC_MMC	include/autoconf.mk	/^CONFIG_GENERIC_MMC=y$/;"	m
CONFIG_GENERIC_MMC	include/configs/BSC9132QDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/MPC8308RDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/MPC837XEMDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/MPC837XERDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/MPC8536DS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/MPC8569MDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/P1010RDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/P1022DS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/P2041RDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T102xQDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T102xRDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T1040QDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T104xRDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T208xQDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T208xRDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T4240QDS.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/T4240RDB.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/UCP1020.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/adp-ag101p.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/alt.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/am3517_crane.h	/^#define CONFIG_GENERIC_MMC	/;"	d
CONFIG_GENERIC_MMC	include/configs/am3517_evm.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/apalis_t30.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/apf27.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/at91sam9260ek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/at91sam9263ek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/at91sam9n12ek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/at91sam9rlek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/at91sam9x5ek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/atngw100.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/atngw100mkii.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/atstk1002.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/axs10x.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bayleybay.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bcm23550_w1d.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bcm28155_ap.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/beaver.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bf518f-ezbrd.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bf537-stamp.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bf548-ezkit.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/bf609-ezkit.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/blanche.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/brppt1.h	/^ #define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/brxre1.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cardhu.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cei-tk1-som.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/clearfog.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cm-bf537e.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cm-bf537u.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cm_t35.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cm_t3517.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/colibri_t20.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/colibri_t30.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/colibri_vf.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/controlcenterd.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/corenet_ds.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/crownbay.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/cyrus.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/da850evm.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/dalmore.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/db-88f6820-gp.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/dfi-bt700.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/dragonboard410c.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/e2220-1170.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/edb93xx.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ethernut5.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/exynos-common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/galileo.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ge_bx50v3.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/gose.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/harmony.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/hikey.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/hrcon.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/imx27lite-common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/jetson-tk1.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/k2g_evm.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/kc1.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/koelsch.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/lager.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/legoev3.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls1012aqds.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls1012ardb.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls1021aqds.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls1021atwr.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls1043a_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls1046a_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls2080a_simu.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls2080aqds.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ls2080ardb.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/m53evk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ma5d4evk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mcx.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/medcom-wide.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/minnowmax.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx25pdk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx35pdk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx51evk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx53ard.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx53evk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx53loco.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx53smd.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx6_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mx7_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/mxs.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/nokia_rx51.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/nyan-big.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/omap3_evm.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/omapl138_lcdk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/openrd.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/p1_twr.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/p2371-0000.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/p2371-2180.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/p2571.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/p2771-0000.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/paz00.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/pcm052.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/pic32mzdask.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/pico-imx6ul.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/picosam9g45.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/plutux.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/porter.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/pxa-common.h	/^#define	CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/rk3036_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/rk3288_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/rk3399_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/rpi.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/s32v234evb.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/s5p_goni.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sama5d2_xplained.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sama5d3_xplained.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sama5d3xek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sama5d4_xplained.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sama5d4ek.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sandbox.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/seaboard.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sh7752evb.h	/^#define CONFIG_GENERIC_MMC	/;"	d
CONFIG_GENERIC_MMC	include/configs/sh7753evb.h	/^#define CONFIG_GENERIC_MMC	/;"	d
CONFIG_GENERIC_MMC	include/configs/sh7757lcr.h	/^#define CONFIG_GENERIC_MMC	/;"	d
CONFIG_GENERIC_MMC	include/configs/sheevaplug.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/siemens-am33x-common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/silk.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/snapper9g45.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sniper.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/socfpga_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/stout.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/strider.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/sunxi-common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/tam3517-common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/tao3530.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/tcm-bf537.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/tec-ng.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/tec.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ti814x_evm.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ti816x_evm.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ti_armv7_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/tricorder.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/trimslice.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ts4800.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/uniphier.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/usbarmory.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/venice2.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/ventana.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/vexpress_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/vf610twr.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/vinco.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/whistler.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/woodburn_common.h	/^#define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/xilinx_zynqmp.h	/^# define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/zipitz2.h	/^#define	CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	include/configs/zynq-common.h	/^# define CONFIG_GENERIC_MMC$/;"	d
CONFIG_GENERIC_MMC	spl/include/autoconf.mk	/^CONFIG_GENERIC_MMC=y$/;"	m
CONFIG_GICV2	include/configs/ls1012a_common.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/ls1043a_common.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/ls1046a_common.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/s32v234evb.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/salvator-x.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/tegra186-common.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/tegra210-common.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV2	include/configs/xilinx_zynqmp.h	/^#define CONFIG_GICV2$/;"	d
CONFIG_GICV3	include/configs/ls2080a_common.h	/^#define CONFIG_GICV3$/;"	d
CONFIG_GICV3	include/configs/uniphier.h	/^#define CONFIG_GICV3$/;"	d
CONFIG_GLACIER	board/amcc/canyonlands/Kconfig	/^config GLACIER$/;"	c	choice:BOARD_TYPE
CONFIG_GLACIER_MODULE	board/amcc/canyonlands/Kconfig	/^config GLACIER$/;"	c	choice:BOARD_TYPE
CONFIG_GLOBAL_TIMER	include/configs/kzm9g.h	/^#define CONFIG_GLOBAL_TIMER$/;"	d
CONFIG_GMAC_TX_DELAY	board/sunxi/Kconfig	/^config GMAC_TX_DELAY$/;"	c
CONFIG_GMAC_TX_DELAY	include/config/auto.conf	/^CONFIG_GMAC_TX_DELAY=0$/;"	k
CONFIG_GMAC_TX_DELAY	include/generated/autoconf.h	/^#define CONFIG_GMAC_TX_DELAY /;"	d
CONFIG_GMAC_TX_DELAY_MODULE	board/sunxi/Kconfig	/^config GMAC_TX_DELAY$/;"	c
CONFIG_GMII	include/configs/MPC8313ERDB.h	/^#define CONFIG_GMII	/;"	d
CONFIG_GMII	include/configs/MPC8349EMDS.h	/^#define CONFIG_GMII	/;"	d
CONFIG_GMII	include/configs/MPC837XERDB.h	/^#define CONFIG_GMII	/;"	d
CONFIG_GMII	include/configs/vme8349.h	/^#define CONFIG_GMII	/;"	d
CONFIG_GPCNTRL	drivers/net/smc91111.h	/^#define CONFIG_GPCNTRL	/;"	d
CONFIG_GPCS_PHY1_ADDR	include/configs/canyonlands.h	/^#define CONFIG_GPCS_PHY1_ADDR /;"	d
CONFIG_GPCS_PHY2_ADDR	include/configs/canyonlands.h	/^#define CONFIG_GPCS_PHY2_ADDR /;"	d
CONFIG_GPCS_PHY_ADDR	include/configs/canyonlands.h	/^#define CONFIG_GPCS_PHY_ADDR /;"	d
CONFIG_GPIO	drivers/gpio/tegra_gpio.c	/^static const int CONFIG_GPIO = 1;$/;"	v	typeref:typename:const int	file:
CONFIG_GPIO_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_GPIO_BASE	/;"	d
CONFIG_GPIO_BASE	arch/x86/cpu/quark/Kconfig	/^config GPIO_BASE$/;"	c
CONFIG_GPIO_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config GPIO_BASE$/;"	c
CONFIG_GPIO_ENABLE_SPI_FLASH	include/configs/aristainetos.h	/^#define CONFIG_GPIO_ENABLE_SPI_FLASH	/;"	d
CONFIG_GPIO_ENABLE_SPI_FLASH	include/configs/aristainetos2.h	/^#define CONFIG_GPIO_ENABLE_SPI_FLASH	/;"	d
CONFIG_GPIO_ENABLE_SPI_FLASH	include/configs/aristainetos2b.h	/^#define CONFIG_GPIO_ENABLE_SPI_FLASH	/;"	d
CONFIG_GPIO_LED	include/configs/bf526-ezbrd.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/bf533-stamp.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/cm_t335.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/cm_t35.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/cm_t3517.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/mx23_olinuxino.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/omap3_igep00x0.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_GPIO_LED$/;"	d
CONFIG_GPIO_LED_INVERTED_TABLE	drivers/misc/gpio_led.c	/^#define CONFIG_GPIO_LED_INVERTED_TABLE /;"	d	file:
CONFIG_GPIO_UNIPHIER	drivers/gpio/Kconfig	/^config GPIO_UNIPHIER$/;"	c	menu:GPIO Support
CONFIG_GPIO_UNIPHIER_MODULE	drivers/gpio/Kconfig	/^config GPIO_UNIPHIER$/;"	c	menu:GPIO Support
CONFIG_GREEN_LED	include/configs/at91sam9260ek.h	/^#define	CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/at91sam9261ek.h	/^#define	CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/at91sam9263ek.h	/^#define	CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/at91sam9m10g45ek.h	/^#define	CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/at91sam9rlek.h	/^#define	CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/corvus.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/picosam9g45.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/pm9261.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/pm9263.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/pm9g45.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/smartweb.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GREEN_LED	include/configs/stm32f429-discovery.h	/^#define CONFIG_GREEN_LED	/;"	d
CONFIG_GRETH	include/configs/gr_ep2s60.h	/^#define CONFIG_GRETH	/;"	d
CONFIG_GRETH	include/configs/gr_xc3s_1500.h	/^#define CONFIG_GRETH	/;"	d
CONFIG_GRETH	include/configs/grsim.h	/^#define CONFIG_GRETH	/;"	d
CONFIG_GRSIM	include/configs/grsim.h	/^#define CONFIG_GRSIM	/;"	d
CONFIG_GRSIM	include/configs/grsim_leon2.h	/^#define CONFIG_GRSIM	/;"	d
CONFIG_GRXC3S1500	include/configs/gr_xc3s_1500.h	/^#define CONFIG_GRXC3S1500	/;"	d
CONFIG_GR_EP2S60	include/configs/gr_ep2s60.h	/^#define CONFIG_GR_EP2S60	/;"	d
CONFIG_GURNARD_SPLASH	include/configs/snapper9g45.h	/^#define CONFIG_GURNARD_SPLASH$/;"	d
CONFIG_GZIP	include/autoconf.mk	/^CONFIG_GZIP=y$/;"	m
CONFIG_GZIP	include/config_defaults.h	/^#define CONFIG_GZIP /;"	d
CONFIG_GZIP	spl/include/autoconf.mk	/^CONFIG_GZIP=y$/;"	m
CONFIG_GZIP_COMPRESSED	include/configs/sandbox.h	/^#define CONFIG_GZIP_COMPRESSED$/;"	d
CONFIG_GZIP_COMPRESS_DEF_SZ	lib/gzip.c	/^#define CONFIG_GZIP_COMPRESS_DEF_SZ	/;"	d	file:
CONFIG_G_DNL_MANUFACTURER	drivers/usb/gadget/Kconfig	/^config G_DNL_MANUFACTURER$/;"	c
CONFIG_G_DNL_MANUFACTURER	include/configs/ge_bx50v3.h	/^#define CONFIG_G_DNL_MANUFACTURER /;"	d
CONFIG_G_DNL_MANUFACTURER	include/configs/rk3036_common.h	/^#define CONFIG_G_DNL_MANUFACTURER	/;"	d
CONFIG_G_DNL_MANUFACTURER	include/configs/rk3288_common.h	/^#define CONFIG_G_DNL_MANUFACTURER	/;"	d
CONFIG_G_DNL_MANUFACTURER_MODULE	drivers/usb/gadget/Kconfig	/^config G_DNL_MANUFACTURER$/;"	c
CONFIG_G_DNL_PRODUCT_NUM	drivers/usb/gadget/Kconfig	/^config G_DNL_PRODUCT_NUM$/;"	c
CONFIG_G_DNL_PRODUCT_NUM	include/configs/ge_bx50v3.h	/^#define CONFIG_G_DNL_PRODUCT_NUM /;"	d
CONFIG_G_DNL_PRODUCT_NUM	include/configs/rk3036_common.h	/^#define CONFIG_G_DNL_PRODUCT_NUM	/;"	d
CONFIG_G_DNL_PRODUCT_NUM	include/configs/rk3288_common.h	/^#define CONFIG_G_DNL_PRODUCT_NUM	/;"	d
CONFIG_G_DNL_PRODUCT_NUM_MODULE	drivers/usb/gadget/Kconfig	/^config G_DNL_PRODUCT_NUM$/;"	c
CONFIG_G_DNL_THOR_PRODUCT_NUM	include/configs/exynos4-common.h	/^#define CONFIG_G_DNL_THOR_PRODUCT_NUM /;"	d
CONFIG_G_DNL_THOR_PRODUCT_NUM	include/configs/odroid_xu3.h	/^#define CONFIG_G_DNL_THOR_PRODUCT_NUM	/;"	d
CONFIG_G_DNL_THOR_PRODUCT_NUM	include/configs/s5p_goni.h	/^#define CONFIG_G_DNL_THOR_PRODUCT_NUM /;"	d
CONFIG_G_DNL_THOR_VENDOR_NUM	include/configs/exynos4-common.h	/^#define CONFIG_G_DNL_THOR_VENDOR_NUM /;"	d
CONFIG_G_DNL_THOR_VENDOR_NUM	include/configs/odroid_xu3.h	/^#define CONFIG_G_DNL_THOR_VENDOR_NUM	/;"	d
CONFIG_G_DNL_THOR_VENDOR_NUM	include/configs/s5p_goni.h	/^#define CONFIG_G_DNL_THOR_VENDOR_NUM /;"	d
CONFIG_G_DNL_UMS_PRODUCT_NUM	include/configs/exynos4-common.h	/^#define CONFIG_G_DNL_UMS_PRODUCT_NUM /;"	d
CONFIG_G_DNL_UMS_PRODUCT_NUM	include/configs/odroid_xu3.h	/^#define CONFIG_G_DNL_UMS_PRODUCT_NUM	/;"	d
CONFIG_G_DNL_UMS_PRODUCT_NUM	include/configs/s5p_goni.h	/^#define CONFIG_G_DNL_UMS_PRODUCT_NUM /;"	d
CONFIG_G_DNL_UMS_PRODUCT_NUM	include/configs/socfpga_common.h	/^#define CONFIG_G_DNL_UMS_PRODUCT_NUM	/;"	d
CONFIG_G_DNL_UMS_VENDOR_NUM	include/configs/exynos4-common.h	/^#define CONFIG_G_DNL_UMS_VENDOR_NUM /;"	d
CONFIG_G_DNL_UMS_VENDOR_NUM	include/configs/odroid_xu3.h	/^#define CONFIG_G_DNL_UMS_VENDOR_NUM	/;"	d
CONFIG_G_DNL_UMS_VENDOR_NUM	include/configs/s5p_goni.h	/^#define CONFIG_G_DNL_UMS_VENDOR_NUM /;"	d
CONFIG_G_DNL_UMS_VENDOR_NUM	include/configs/socfpga_common.h	/^#define CONFIG_G_DNL_UMS_VENDOR_NUM	/;"	d
CONFIG_G_DNL_VENDOR_NUM	drivers/usb/gadget/Kconfig	/^config G_DNL_VENDOR_NUM$/;"	c
CONFIG_G_DNL_VENDOR_NUM	include/configs/ge_bx50v3.h	/^#define CONFIG_G_DNL_VENDOR_NUM /;"	d
CONFIG_G_DNL_VENDOR_NUM	include/configs/rk3036_common.h	/^#define CONFIG_G_DNL_VENDOR_NUM	/;"	d
CONFIG_G_DNL_VENDOR_NUM	include/configs/rk3288_common.h	/^#define CONFIG_G_DNL_VENDOR_NUM	/;"	d
CONFIG_G_DNL_VENDOR_NUM_MODULE	drivers/usb/gadget/Kconfig	/^config G_DNL_VENDOR_NUM$/;"	c
CONFIG_H264_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_H264_FREQ	/;"	d
CONFIG_HARD_I2C	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/TQM5200.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/a4m072.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/ac14xx.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/ap_sh4a_4a.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/aria.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/bf561-acvilon.h	/^#define CONFIG_HARD_I2C$/;"	d
CONFIG_HARD_I2C	include/configs/cm5200.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/digsy_mtc.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/ids8313.h	/^#define CONFIG_HARD_I2C$/;"	d
CONFIG_HARD_I2C	include/configs/ipek01.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/mecp5123.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/motionpro.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/mpc5121ads.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/mxs.h	/^#define CONFIG_HARD_I2C$/;"	d
CONFIG_HARD_I2C	include/configs/o2dnt-common.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/pcm030.h	/^#define CONFIG_HARD_I2C /;"	d
CONFIG_HARD_I2C	include/configs/pdm360ng.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/r0p7734.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_I2C	include/configs/v38b.h	/^#define CONFIG_HARD_I2C	/;"	d
CONFIG_HARD_SPI	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_HARD_SPI	/;"	d
CONFIG_HARD_SPI	arch/powerpc/include/asm/config.h	/^#  define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/M52277EVB.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/M54418TWR.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/M54451EVB.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/M54455EVB.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/MPC8536DS.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/P1022DS.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/UCP1020.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/controlcenterd.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/digsy_mtc.h	/^#define CONFIG_HARD_SPI	/;"	d
CONFIG_HARD_SPI	include/configs/dreamplug.h	/^#define CONFIG_HARD_SPI	/;"	d
CONFIG_HARD_SPI	include/configs/ds109.h	/^#define CONFIG_HARD_SPI	/;"	d
CONFIG_HARD_SPI	include/configs/ids8313.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/imx31_phycore.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/mx31ads.h	/^#define CONFIG_HARD_SPI	/;"	d
CONFIG_HARD_SPI	include/configs/mx31pdk.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/mxs.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/p1_twr.h	/^#define CONFIG_HARD_SPI$/;"	d
CONFIG_HARD_SPI	include/configs/ts4800.h	/^#define CONFIG_HARD_SPI /;"	d
CONFIG_HASH_VERIFY	include/configs/bcm_ep_board.h	/^#define CONFIG_HASH_VERIFY$/;"	d
CONFIG_HASH_VERIFY	include/configs/exynos5-common.h	/^#define CONFIG_HASH_VERIFY$/;"	d
CONFIG_HASH_VERIFY	include/configs/sandbox.h	/^#define CONFIG_HASH_VERIFY$/;"	d
CONFIG_HASH_VERIFY	include/hash.h	/^#define CONFIG_HASH_VERIFY$/;"	d
CONFIG_HAS_DATAFLASH	include/configs/at91sam9260ek.h	/^#define CONFIG_HAS_DATAFLASH	/;"	d
CONFIG_HAS_DATAFLASH	include/configs/at91sam9261ek.h	/^#define CONFIG_HAS_DATAFLASH$/;"	d
CONFIG_HAS_DATAFLASH	include/configs/at91sam9263ek.h	/^#define CONFIG_HAS_DATAFLASH	/;"	d
CONFIG_HAS_DATAFLASH	include/configs/at91sam9rlek.h	/^#define CONFIG_HAS_DATAFLASH	/;"	d
CONFIG_HAS_DATAFLASH	include/configs/ethernut5.h	/^#define CONFIG_HAS_DATAFLASH$/;"	d
CONFIG_HAS_DATAFLASH	include/configs/meesc.h	/^# define CONFIG_HAS_DATAFLASH$/;"	d
CONFIG_HAS_DATAFLASH	include/configs/pm9261.h	/^#define CONFIG_HAS_DATAFLASH$/;"	d
CONFIG_HAS_DATAFLASH	include/configs/pm9263.h	/^#define CONFIG_HAS_DATAFLASH	/;"	d
CONFIG_HAS_DATAFLASH	include/configs/usb_a9263.h	/^#define CONFIG_HAS_DATAFLASH$/;"	d
CONFIG_HAS_ETH0	include/configs/BSC9131RDB.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/BSC9132QDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/C29XPCIE.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8308RDB.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8313ERDB.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8315ERDB.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8323ERDB.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/MPC832XEMDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8349EMDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8349ITX.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC837XEMDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC837XERDB.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8536DS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8540ADS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8541CDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8544DS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8548CDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8555CDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8560ADS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8568MDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8569MDS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8572DS.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/MPC8641HPCN.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/P1010RDB.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/PMC440.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/UCP1020.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/ac14xx.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/acadia.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/aria.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/bamboo.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/bubinga.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/canyonlands.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/dlvision-10g.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/dlvision.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/hrcon.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/icon.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/ids8313.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/intip.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/io.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/io64.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/iocon.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/katmai.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/kilauea.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/km/km83xx-common.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/km82xx.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/ls1021aqds.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/ls1021atwr.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/luan.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/lwmon5.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/makalu.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/mecp5123.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/mpc5121ads.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/mpc8308_p1m.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/neo.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/p1_twr.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/pdm360ng.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/redwood.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/sbc8349.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/sbc8548.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/sbc8641d.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/sequoia.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/socrates.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/strider.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/t3corp.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/ve8313.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/vme8349.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/walnut.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/xpedite517x.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/xpedite520x.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/xpedite537x.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/xpedite550x.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH0	include/configs/yosemite.h	/^#define CONFIG_HAS_ETH0	/;"	d
CONFIG_HAS_ETH0	include/configs/yucca.h	/^#define CONFIG_HAS_ETH0$/;"	d
CONFIG_HAS_ETH1	include/configs/BSC9132QDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/C29XPCIE.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M5208EVBE.h	/^#	define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M5275EVB.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M53017EVB.h	/^#	define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M54418TWR.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M54455EVB.h	/^#	define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M5475EVB.h	/^#	define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/M5485EVB.h	/^#	define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8308RDB.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8313ERDB.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8315ERDB.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8323ERDB.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/MPC832XEMDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8349EMDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8349ITX.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC837XEMDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC837XERDB.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8536DS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8540ADS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8541CDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8544DS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8548CDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8555CDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8560ADS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8568MDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8569MDS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8572DS.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/MPC8641HPCN.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/P1010RDB.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/PMC405DE.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/PMC440.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/UCP1020.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/bamboo.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/bubinga.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/canyonlands.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/dlvision-10g.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/dlvision.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/gdppc440etx.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/ids8313.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/intip.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/io.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/io64.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/kilauea.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/ls1021aqds.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/ls1021atwr.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/lwmon5.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/makalu.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/mpc8308_p1m.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/mx35pdk.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/mx53ard.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/mx53smd.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/neo.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/p1_twr.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/redwood.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/sbc8349.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/sbc8548.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/sbc8641d.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/sequoia.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH1	include/configs/socrates.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/suvd3.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/vme8349.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/xpedite517x.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/xpedite520x.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/xpedite537x.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/xpedite550x.h	/^#define CONFIG_HAS_ETH1$/;"	d
CONFIG_HAS_ETH1	include/configs/yosemite.h	/^#define CONFIG_HAS_ETH1	/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8536DS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8540ADS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8541CDS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8548CDS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8555CDS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8560ADS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8568MDS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8569MDS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8572DS.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/MPC8641HPCN.h	/^#define CONFIG_HAS_ETH2	/;"	d
CONFIG_HAS_ETH2	include/configs/P1010RDB.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/UCP1020.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/canyonlands.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/ls1021aqds.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/ls1021atwr.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/sbc8641d.h	/^#define CONFIG_HAS_ETH2	/;"	d
CONFIG_HAS_ETH2	include/configs/xpedite1000.h	/^#define CONFIG_HAS_ETH2	/;"	d
CONFIG_HAS_ETH2	include/configs/xpedite520x.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH2	include/configs/xpedite550x.h	/^#define CONFIG_HAS_ETH2$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8536DS.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8548CDS.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8560ADS.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8568MDS.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8569MDS.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8572DS.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/MPC8641HPCN.h	/^#define CONFIG_HAS_ETH3	/;"	d
CONFIG_HAS_ETH3	include/configs/canyonlands.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH3	include/configs/sbc8641d.h	/^#define CONFIG_HAS_ETH3	/;"	d
CONFIG_HAS_ETH3	include/configs/xpedite1000.h	/^#define CONFIG_HAS_ETH3	/;"	d
CONFIG_HAS_ETH3	include/configs/xpedite520x.h	/^#define CONFIG_HAS_ETH3$/;"	d
CONFIG_HAS_ETH5	include/configs/MPC8569MDS.h	/^#define CONFIG_HAS_ETH5$/;"	d
CONFIG_HAS_ETH7	include/configs/MPC8569MDS.h	/^#define CONFIG_HAS_ETH7$/;"	d
CONFIG_HAS_FEC	include/configs/MPC8540ADS.h	/^#define CONFIG_HAS_FEC	/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/B4860QDS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/BSC9131RDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/BSC9132QDS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/MPC8315ERDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/MPC8349ITX.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/MPC837XEMDS.h	/^#define CONFIG_HAS_FSL_DR_USB	/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/MPC837XERDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/P1010RDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/P1022DS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/P1023RDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/P2041RDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T102xQDS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T102xRDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T1040QDS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T104xRDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T208xQDS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T208xRDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T4240QDS.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/T4240RDB.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/UCP1020.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/controlcenterd.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/corenet_ds.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/cyrus.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/ids8313.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_DR_USB	include/configs/p1_twr.h	/^#define CONFIG_HAS_FSL_DR_USB$/;"	d
CONFIG_HAS_FSL_MPH_USB	include/configs/MPC8349ITX.h	/^#define CONFIG_HAS_FSL_MPH_USB$/;"	d
CONFIG_HAS_FSL_MPH_USB	include/configs/MPC8536DS.h	/^#define CONFIG_HAS_FSL_MPH_USB$/;"	d
CONFIG_HAS_FSL_MPH_USB	include/configs/P2041RDB.h	/^#define CONFIG_HAS_FSL_MPH_USB$/;"	d
CONFIG_HAS_FSL_MPH_USB	include/configs/corenet_ds.h	/^#define CONFIG_HAS_FSL_MPH_USB$/;"	d
CONFIG_HAS_FSL_MPH_USB	include/configs/cyrus.h	/^#define CONFIG_HAS_FSL_MPH_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1012afrdm.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1012aqds.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1012ardb.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1021aqds.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1021atwr.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1043aqds.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls1043ardb.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls2080aqds.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_FSL_XHCI_USB	include/configs/ls2080ardb.h	/^#define CONFIG_HAS_FSL_XHCI_USB$/;"	d
CONFIG_HAS_POST	include/common.h	/^#define CONFIG_HAS_POST$/;"	d
CONFIG_HAS_THUMB2	arch/arm/Kconfig	/^config HAS_THUMB2$/;"	c	menu:ARM architecture
CONFIG_HAS_THUMB2	include/config/auto.conf	/^CONFIG_HAS_THUMB2=y$/;"	k
CONFIG_HAS_THUMB2	include/generated/autoconf.h	/^#define CONFIG_HAS_THUMB2 /;"	d
CONFIG_HAS_THUMB2_MODULE	arch/arm/Kconfig	/^config HAS_THUMB2$/;"	c	menu:ARM architecture
CONFIG_HAS_VBAR	arch/arm/Kconfig	/^config HAS_VBAR$/;"	c	menu:ARM architecture
CONFIG_HAS_VBAR	include/config/auto.conf	/^CONFIG_HAS_VBAR=y$/;"	k
CONFIG_HAS_VBAR	include/generated/autoconf.h	/^#define CONFIG_HAS_VBAR /;"	d
CONFIG_HAS_VBAR_MODULE	arch/arm/Kconfig	/^config HAS_VBAR$/;"	c	menu:ARM architecture
CONFIG_HAS_VR	arch/blackfin/cpu/initcode.c	/^# define CONFIG_HAS_VR /;"	d	file:
CONFIG_HAVE_ARCH_IOREMAP	arch/Kconfig	/^config HAVE_ARCH_IOREMAP$/;"	c
CONFIG_HAVE_ARCH_IOREMAP_MODULE	arch/Kconfig	/^config HAVE_ARCH_IOREMAP$/;"	c
CONFIG_HAVE_CMC	arch/x86/cpu/quark/Kconfig	/^config HAVE_CMC$/;"	c
CONFIG_HAVE_CMC	arch/x86/cpu/queensbay/Kconfig	/^config HAVE_CMC$/;"	c
CONFIG_HAVE_CMC_MODULE	arch/x86/cpu/quark/Kconfig	/^config HAVE_CMC$/;"	c
CONFIG_HAVE_CMC_MODULE	arch/x86/cpu/queensbay/Kconfig	/^config HAVE_CMC$/;"	c
CONFIG_HAVE_FSP	arch/x86/Kconfig	/^config HAVE_FSP$/;"	c	menu:x86 architecture
CONFIG_HAVE_FSP_MODULE	arch/x86/Kconfig	/^config HAVE_FSP$/;"	c	menu:x86 architecture
CONFIG_HAVE_INTEL_ME	arch/x86/Kconfig	/^config HAVE_INTEL_ME$/;"	c	menu:x86 architecture
CONFIG_HAVE_INTEL_ME_MODULE	arch/x86/Kconfig	/^config HAVE_INTEL_ME$/;"	c	menu:x86 architecture
CONFIG_HAVE_MRC	arch/x86/Kconfig	/^config HAVE_MRC$/;"	c	menu:x86 architecture
CONFIG_HAVE_MRC_MODULE	arch/x86/Kconfig	/^config HAVE_MRC$/;"	c	menu:x86 architecture
CONFIG_HAVE_PRIVATE_LIBGCC	include/config/auto.conf	/^CONFIG_HAVE_PRIVATE_LIBGCC=y$/;"	k
CONFIG_HAVE_PRIVATE_LIBGCC	include/generated/autoconf.h	/^#define CONFIG_HAVE_PRIVATE_LIBGCC /;"	d
CONFIG_HAVE_PRIVATE_LIBGCC	lib/Kconfig	/^config HAVE_PRIVATE_LIBGCC$/;"	c	menu:Library routines
CONFIG_HAVE_PRIVATE_LIBGCC_MODULE	lib/Kconfig	/^config HAVE_PRIVATE_LIBGCC$/;"	c	menu:Library routines
CONFIG_HAVE_REFCODE	arch/x86/Kconfig	/^config HAVE_REFCODE$/;"	c	menu:x86 architecture
CONFIG_HAVE_REFCODE_MODULE	arch/x86/Kconfig	/^config HAVE_REFCODE$/;"	c	menu:x86 architecture
CONFIG_HAVE_RMU	arch/x86/cpu/quark/Kconfig	/^config HAVE_RMU$/;"	c
CONFIG_HAVE_RMU_MODULE	arch/x86/cpu/quark/Kconfig	/^config HAVE_RMU$/;"	c
CONFIG_HAVE_VGA_BIOS	arch/x86/Kconfig	/^config HAVE_VGA_BIOS$/;"	c	menu:x86 architecture
CONFIG_HAVE_VGA_BIOS_MODULE	arch/x86/Kconfig	/^config HAVE_VGA_BIOS$/;"	c	menu:x86 architecture
CONFIG_HCLK_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_HCLK_FREQ	/;"	d
CONFIG_HDBOOT	include/configs/B4860QDS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/BSC9132QDS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/MPC8536DS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/MPC8572DS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/P1022DS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/P1023RDB.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/P2041RDB.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/T1040QDS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/T104xRDB.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/T208xQDS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/T208xRDB.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/T4240QDS.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/T4240RDB.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/corenet_ds.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/cyrus.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDBOOT	include/configs/p1_twr.h	/^#define CONFIG_HDBOOT	/;"	d
CONFIG_HDMI_ENCODER_I2C_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_HDMI_ENCODER_I2C_ADDR /;"	d
CONFIG_HETROGENOUS_CLUSTERS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_HETROGENOUS_CLUSTERS /;"	d
CONFIG_HIDE_LOGO_VERSION	include/configs/gw_ventana.h	/^#define CONFIG_HIDE_LOGO_VERSION /;"	d
CONFIG_HIGH_BATS	include/configs/MPC8313ERDB.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC8315ERDB.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC8323ERDB.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC832XEMDS.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC8349EMDS.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC8349ITX.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC837XEMDS.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC837XERDB.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC8610HPCD.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/MPC8641HPCN.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/TQM5200.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/TQM834x.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/a4m072.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/ac14xx.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/aria.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/canmb.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/cm5200.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/ids8313.h	/^#define CONFIG_HIGH_BATS$/;"	d
CONFIG_HIGH_BATS	include/configs/inka4x0.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/jupiter.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/km/km83xx-common.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/mecp5123.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/motionpro.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/mpc5121ads.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/munices.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/pdm360ng.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/sbc8349.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/sbc8641d.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/v38b.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/ve8313.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/vme8349.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_BATS	include/configs/xpedite517x.h	/^#define CONFIG_HIGH_BATS	/;"	d
CONFIG_HIGH_TABLE_SIZE	arch/x86/Kconfig	/^config HIGH_TABLE_SIZE$/;"	c	menu:x86 architecture
CONFIG_HIGH_TABLE_SIZE_MODULE	arch/x86/Kconfig	/^config HIGH_TABLE_SIZE$/;"	c	menu:x86 architecture
CONFIG_HIKEY_DWMMC	include/configs/hikey.h	/^#define CONFIG_HIKEY_DWMMC$/;"	d
CONFIG_HIKEY_GPIO	include/configs/hikey.h	/^#define CONFIG_HIKEY_GPIO$/;"	d
CONFIG_HOSTNAME	include/configs/BSC9131RDB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/BSC9132QDS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5208EVBE.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M52277EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5235EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5253DEMO.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5272C3.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5282EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M53017EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5329EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5373EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M54418TWR.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M54451EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M54455EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5475EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/M5485EVB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8313ERDB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8323ERDB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8349EMDS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8349ITX.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC837XERDB.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8536DS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8540ADS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8541CDS.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/MPC8544DS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8548CDS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8555CDS.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/MPC8560ADS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8568MDS.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/MPC8569MDS.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/MPC8572DS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8610HPCD.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/P1022DS.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/PMC440.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/UCP1020.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/a3m071.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/acadia.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/amcore.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/apf27.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/aria.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/aristainetos.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/aristainetos2.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/aristainetos2b.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bamboo.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bct-brettl2.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf518f-ezbrd.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf526-ezbrd.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf527-ezkit.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf533-ezkit.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf533-stamp.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf537-minotaur.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf537-pnav.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf537-srv1.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf537-stamp.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf538f-ezkit.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf548-ezkit.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf561-acvilon.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf561-ezkit.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bf609-ezkit.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/blackstamp.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/blackvme.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/br4.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/bubinga.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/canyonlands.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/charon.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/cm-bf527.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/cm-bf533.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/cm-bf537e.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/cm-bf537u.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/cm-bf548.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/cm-bf561.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/controlcenterd.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/dlvision-10g.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/dlvision.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/ea20.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/flea3.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/gdppc440etx.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/gr_ep2s60.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/gr_xc3s_1500.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/grsim.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/grsim_leon2.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/hrcon.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/ibf-dsp561.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/icon.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/ids8313.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/intip.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/io.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/io64.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/iocon.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/ip04.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/katmai.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/kilauea.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/km82xx.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/km8360.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/km_kirkwood.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/kmp204x.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/luan.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/lwmon5.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/m28evk.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/m53evk.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/ma5d4evk.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/makalu.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/mcx.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/mecp5123.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/microblaze-generic.h	/^#define	CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/mpc5121ads.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/mt_ventoux.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/mx35pdk.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/neo.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/novena.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/p1_twr.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/pdm360ng.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/platinum_picon.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/platinum_titanium.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/pr1.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/redwood.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/sbc8349.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/sbc8548.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/sbc8641d.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/sequoia.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/strider.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/suvd3.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/suvd3.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/t3corp.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/tcm-bf518.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/tcm-bf537.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/titanium.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/tuxx1.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/tuxx1.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/twister.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/usbarmory.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/ve8313.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/vme8349.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/walnut.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/woodburn_common.h	/^#define CONFIG_HOSTNAME /;"	d
CONFIG_HOSTNAME	include/configs/x600.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/x86-common.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/yosemite.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOSTNAME	include/configs/yucca.h	/^#define CONFIG_HOSTNAME	/;"	d
CONFIG_HOST_MAX_DEVICES	include/configs/sandbox.h	/^#define CONFIG_HOST_MAX_DEVICES /;"	d
CONFIG_HPET_ADDRESS	arch/x86/Kconfig	/^config HPET_ADDRESS$/;"	c	menu:x86 architecture
CONFIG_HPET_ADDRESS_MODULE	arch/x86/Kconfig	/^config HPET_ADDRESS$/;"	c	menu:x86 architecture
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_DBGATCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_DBGATCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MAINCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MAINCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_ALTERAGRP_MPUCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_ALTERAGRP_MPUCLK /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN0_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN0_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_CAN1_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_CAN1_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC0_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC0_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_EMAC1_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_EMAC1_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_PER_REF_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_PER_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_F2S_SDR_REF_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_GPIODB_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_GPIODB_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_MP_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_MP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_L4_SP_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_L4_SP_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_MAINVCO_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_MAINVCO_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_NAND_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_NAND_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC1_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC1_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_OSC2_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_OSC2_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_PERVCO_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_PERVCO_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_QSPI_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_QSPI_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDMMC_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDMMC_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SDRVCO_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SDRVCO_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_SPIM_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_SPIM_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_CLK_USBCLK_HZ	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_CLK_USBCLK_HZ /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_DBCTRL_STAYOSC1	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_DBCTRL_STAYOSC1 /;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/altera/arria5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/denx/mcvevk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/ebv/socrates/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/is1/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/samtec/vining_fpga/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/sr1500/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	board/terasic/sockit/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/altera/arria5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/denx/mcvevk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/ebv/socrates/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/is1/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/samtec/vining_fpga/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/sr1500/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	board/terasic/sockit/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/altera/arria5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/denx/mcvevk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/ebv/socrates/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/is1/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/samtec/vining_fpga/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/sr1500/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	board/terasic/sockit/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/altera/arria5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/denx/mcvevk/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/ebv/socrates/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/is1/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/samtec/vining_fpga/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/sr1500/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	board/terasic/sockit/qts/iocsr_config.h	/^#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH	/;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_DENOM	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_MAINPLLGRP_VCO_NUMER	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_DIV_USBCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_NAND	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_NAND /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_QSPI	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_QSPI /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_SRC_SDMMC	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_DENOM	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_NUMER	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_PERPLLGRP_VCO_PSRC	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_PERPLLGRP_VCO_PSRC /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_DENOM	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_NUMER	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/altera/arria5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/denx/mcvevk/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/ebv/socrates/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/is1/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/samtec/vining_fpga/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/sr1500/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDRPLLGRP_VCO_SSRC	board/terasic/sockit/qts/pll_config.h	/^#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC /;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT	/;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP /;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED	/;"	d
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 /;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 /;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 /;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 /;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 /;"	d
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/denx/mcvevk/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/ebv/socrates/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/is1/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/sr1500/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	board/terasic/sockit/qts/sdram_config.h	/^#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP	/;"	d
CONFIG_HP_CLK_FREQ	include/configs/lager.h	/^#define CONFIG_HP_CLK_FREQ	/;"	d
CONFIG_HP_CLK_FREQ	include/configs/stout.h	/^#define CONFIG_HP_CLK_FREQ	/;"	d
CONFIG_HRCON	include/configs/hrcon.h	/^#define CONFIG_HRCON	/;"	d
CONFIG_HRCON_FANS	include/configs/hrcon.h	/^#define CONFIG_HRCON_FANS	/;"	d
CONFIG_HSMMC2_8BIT	include/configs/am335x_shc.h	/^#define CONFIG_HSMMC2_8BIT$/;"	d
CONFIG_HSMMC2_8BIT	include/configs/cm_t43.h	/^#define CONFIG_HSMMC2_8BIT$/;"	d
CONFIG_HSMMC2_8BIT	include/configs/cm_t54.h	/^#define CONFIG_HSMMC2_8BIT$/;"	d
CONFIG_HSMMC2_8BIT	include/configs/dra7xx_evm.h	/^#define CONFIG_HSMMC2_8BIT$/;"	d
CONFIG_HSMMC2_8BIT	include/configs/omap5_uevm.h	/^#define CONFIG_HSMMC2_8BIT$/;"	d
CONFIG_HUSH_INIT_VAR	include/configs/km/keymile-common.h	/^#define CONFIG_HUSH_INIT_VAR$/;"	d
CONFIG_HUSH_PARSER	cmd/Kconfig	/^config HUSH_PARSER$/;"	c	menu:Command line interface
CONFIG_HUSH_PARSER	include/config/auto.conf	/^CONFIG_HUSH_PARSER=y$/;"	k
CONFIG_HUSH_PARSER	include/generated/autoconf.h	/^#define CONFIG_HUSH_PARSER /;"	d
CONFIG_HUSH_PARSER_MODULE	cmd/Kconfig	/^config HUSH_PARSER$/;"	c	menu:Command line interface
CONFIG_HVBOOT	include/configs/B4860QDS.h	/^#define CONFIG_HVBOOT	/;"	d
CONFIG_HVBOOT	include/configs/T208xQDS.h	/^#define CONFIG_HVBOOT	/;"	d
CONFIG_HVBOOT	include/configs/T208xRDB.h	/^#define CONFIG_HVBOOT	/;"	d
CONFIG_HVBOOT	include/configs/T4240QDS.h	/^#define CONFIG_HVBOOT	/;"	d
CONFIG_HVBOOT	include/configs/T4240RDB.h	/^#define CONFIG_HVBOOT	/;"	d
CONFIG_HVBOOT	include/configs/t4qds.h	/^#define CONFIG_HVBOOT	/;"	d
CONFIG_HWCONFIG	include/configs/B4860QDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/BSC9131RDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/BSC9132QDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/C29XPCIE.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/MPC8315ERDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/MPC837XEMDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/MPC837XERDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/MPC8536DS.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/MPC8548CDS.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/MPC8569MDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/MPC8572DS.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/MPC8641HPCN.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/P1010RDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/P1022DS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/P1023RDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/P2041RDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T102xQDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T102xRDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T1040QDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T104xRDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T208xQDS.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T208xRDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/T4240RDB.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/TQM823L.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM823M.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM850L.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM850M.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM855L.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM855M.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM860L.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM860M.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM862L.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM862M.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM866M.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/TQM885D.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/UCP1020.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/corenet_ds.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/cyrus.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/da850evm.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/gw_ventana.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ids8313.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ipam390.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/km/kmp204x-common.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/legoev3.h	/^#define CONFIG_HWCONFIG	/;"	d
CONFIG_HWCONFIG	include/configs/ls1012a_common.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ls1021aqds.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ls1021atwr.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ls1043a_common.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ls1046a_common.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/ls2080a_common.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/p1_twr.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/qemu-ppce500.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HWCONFIG	include/configs/t4qds.h	/^#define CONFIG_HWCONFIG$/;"	d
CONFIG_HW_ENV_SETTINGS	include/configs/km/kmp204x-common.h	/^#define CONFIG_HW_ENV_SETTINGS	/;"	d
CONFIG_HW_WATCHDOG	include/configs/a3m071.h	/^#define CONFIG_HW_WATCHDOG	/;"	d
CONFIG_HW_WATCHDOG	include/configs/aristainetos-common.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/bf609-ezkit.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/brppt1.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/calimain.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/controlcenterd.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/eb_cpu5282.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/luan.h	/^#define CONFIG_HW_WATCHDOG	/;"	d
CONFIG_HW_WATCHDOG	include/configs/lwmon5.h	/^#define CONFIG_HW_WATCHDOG	/;"	d
CONFIG_HW_WATCHDOG	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/microblaze-generic.h	/^#  define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/nokia_rx51.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/picosam9g45.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/siemens-am33x-common.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/smartweb.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_is1.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_mcvevk.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_sockit.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_socrates.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_sr1500.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/taurus.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/ti_am335x_common.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/tqma6_wru4.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/ts4800.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/warp.h	/^#define CONFIG_HW_WATCHDOG$/;"	d
CONFIG_HW_WATCHDOG	include/configs/yosemite.h	/^#define CONFIG_HW_WATCHDOG	/;"	d
CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE /;"	d	file:
CONFIG_HW_WATCHDOG_TIMEOUT_MS	include/configs/socfpga_common.h	/^#define CONFIG_HW_WATCHDOG_TIMEOUT_MS	/;"	d
CONFIG_I2C	include/configs/siemens-am33x-common.h	/^#define CONFIG_I2C$/;"	d
CONFIG_I2C	include/configs/ti_armv7_common.h	/^#define CONFIG_I2C$/;"	d
CONFIG_I2C0_ENABLE	board/sunxi/Kconfig	/^config I2C0_ENABLE$/;"	c
CONFIG_I2C0_ENABLE_MODULE	board/sunxi/Kconfig	/^config I2C0_ENABLE$/;"	c
CONFIG_I2C1_ENABLE	board/sunxi/Kconfig	/^config I2C1_ENABLE$/;"	c
CONFIG_I2C1_ENABLE_MODULE	board/sunxi/Kconfig	/^config I2C1_ENABLE$/;"	c
CONFIG_I2C2_ENABLE	board/sunxi/Kconfig	/^config I2C2_ENABLE$/;"	c
CONFIG_I2C2_ENABLE_MODULE	board/sunxi/Kconfig	/^config I2C2_ENABLE$/;"	c
CONFIG_I2C3_ENABLE	board/sunxi/Kconfig	/^config I2C3_ENABLE$/;"	c
CONFIG_I2C3_ENABLE_MODULE	board/sunxi/Kconfig	/^config I2C3_ENABLE$/;"	c
CONFIG_I2C4_ENABLE	board/sunxi/Kconfig	/^config I2C4_ENABLE$/;"	c
CONFIG_I2C4_ENABLE_MODULE	board/sunxi/Kconfig	/^config I2C4_ENABLE$/;"	c
CONFIG_I2C_ARB_GPIO_CHALLENGE	drivers/i2c/muxes/Kconfig	/^config I2C_ARB_GPIO_CHALLENGE$/;"	c
CONFIG_I2C_ARB_GPIO_CHALLENGE_MODULE	drivers/i2c/muxes/Kconfig	/^config I2C_ARB_GPIO_CHALLENGE$/;"	c
CONFIG_I2C_CHIPADDRESS	include/configs/spear-common.h	/^#define CONFIG_I2C_CHIPADDRESS	/;"	d
CONFIG_I2C_CHIPADDRESS	include/configs/x600.h	/^#define CONFIG_I2C_CHIPADDRESS	/;"	d
CONFIG_I2C_CMD_TREE	include/configs/cyrus.h	/^#define CONFIG_I2C_CMD_TREE$/;"	d
CONFIG_I2C_CMD_TREE	include/configs/km/kmp204x-common.h	/^#define CONFIG_I2C_CMD_TREE$/;"	d
CONFIG_I2C_CMD_TREE	include/configs/pdm360ng.h	/^#define CONFIG_I2C_CMD_TREE$/;"	d
CONFIG_I2C_CROS_EC_LDO	drivers/i2c/Kconfig	/^config I2C_CROS_EC_LDO$/;"	c	menu:I2C support
CONFIG_I2C_CROS_EC_LDO_MODULE	drivers/i2c/Kconfig	/^config I2C_CROS_EC_LDO$/;"	c	menu:I2C support
CONFIG_I2C_CROS_EC_TUNNEL	drivers/i2c/Kconfig	/^config I2C_CROS_EC_TUNNEL$/;"	c	menu:I2C support
CONFIG_I2C_CROS_EC_TUNNEL_MODULE	drivers/i2c/Kconfig	/^config I2C_CROS_EC_TUNNEL$/;"	c	menu:I2C support
CONFIG_I2C_EDID	drivers/video/Kconfig	/^config I2C_EDID$/;"	c	menu:Graphics support
CONFIG_I2C_EDID	include/autoconf.mk	/^CONFIG_I2C_EDID=y$/;"	m
CONFIG_I2C_EDID	include/configs/gw_ventana.h	/^#define CONFIG_I2C_EDID$/;"	d
CONFIG_I2C_EDID	include/configs/nitrogen6x.h	/^#define CONFIG_I2C_EDID$/;"	d
CONFIG_I2C_EDID	include/configs/sandbox.h	/^#define CONFIG_I2C_EDID$/;"	d
CONFIG_I2C_EDID	include/configs/sunxi-common.h	/^#define CONFIG_I2C_EDID$/;"	d
CONFIG_I2C_EDID	include/configs/tbs2910.h	/^#define CONFIG_I2C_EDID$/;"	d
CONFIG_I2C_EDID	include/configs/zynq_zybo.h	/^#define CONFIG_I2C_EDID$/;"	d
CONFIG_I2C_EDID	spl/include/autoconf.mk	/^CONFIG_I2C_EDID=y$/;"	m
CONFIG_I2C_EDID_MODULE	drivers/video/Kconfig	/^config I2C_EDID$/;"	c	menu:Graphics support
CONFIG_I2C_EEPROM	drivers/misc/Kconfig	/^config I2C_EEPROM$/;"	c	menu:Multifunction device drivers
CONFIG_I2C_EEPROM_MODULE	drivers/misc/Kconfig	/^config I2C_EEPROM$/;"	c	menu:Multifunction device drivers
CONFIG_I2C_ENV_EEPROM_BUS	include/configs/PMC440.h	/^#define CONFIG_I2C_ENV_EEPROM_BUS	/;"	d
CONFIG_I2C_ENV_EEPROM_BUS	include/configs/axs10x.h	/^#define CONFIG_I2C_ENV_EEPROM_BUS	/;"	d
CONFIG_I2C_ENV_EEPROM_BUS	include/configs/km/km_arm.h	/^#define CONFIG_I2C_ENV_EEPROM_BUS /;"	d
CONFIG_I2C_FPGA	include/configs/BSC9132QDS.h	/^#define CONFIG_I2C_FPGA$/;"	d
CONFIG_I2C_GSC	include/configs/gw_ventana.h	/^#define CONFIG_I2C_GSC	/;"	d
CONFIG_I2C_MBB_TIMEOUT	drivers/i2c/fsl_i2c.c	/^#define CONFIG_I2C_MBB_TIMEOUT	/;"	d	file:
CONFIG_I2C_MULTI_BUS	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_I2C_MULTI_BUS	/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/ac14xx.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/ap_sh4a_4a.h	/^#define CONFIG_I2C_MULTI_BUS	/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/aria.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/charon.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/cm_t35.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/cm_t3517.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/cyrus.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/kc1.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/mecp5123.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/mpc5121ads.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/novena.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/omap3_beagle.h	/^#define CONFIG_I2C_MULTI_BUS	/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/omap3_cairo.h	/^#define CONFIG_I2C_MULTI_BUS	/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/pdm360ng.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/r0p7734.h	/^#define CONFIG_I2C_MULTI_BUS	/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/s5p_goni.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/s5pc210_universal.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/sniper.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/tao3530.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MULTI_BUS	include/configs/tqma6.h	/^#define CONFIG_I2C_MULTI_BUS$/;"	d
CONFIG_I2C_MUX	drivers/i2c/muxes/Kconfig	/^config I2C_MUX$/;"	c
CONFIG_I2C_MUX_MODULE	drivers/i2c/muxes/Kconfig	/^config I2C_MUX$/;"	c
CONFIG_I2C_MUX_PCA954x	drivers/i2c/muxes/Kconfig	/^config I2C_MUX_PCA954x$/;"	c
CONFIG_I2C_MUX_PCA954x_MODULE	drivers/i2c/muxes/Kconfig	/^config I2C_MUX_PCA954x$/;"	c
CONFIG_I2C_MV	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_I2C_MV	/;"	d
CONFIG_I2C_MV	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_I2C_MV$/;"	d
CONFIG_I2C_MVTWSI	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_I2C_MVTWSI$/;"	d
CONFIG_I2C_MVTWSI_BASE0	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/clearfog.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/db-88f6720.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/db-88f6820-amc.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/db-88f6820-gp.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/db-mv784mp-gp.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/ds414.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/edminiv2.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/maxbcm.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE0	include/configs/theadorable.h	/^#define CONFIG_I2C_MVTWSI_BASE0	/;"	d
CONFIG_I2C_MVTWSI_BASE1	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE1	/;"	d
CONFIG_I2C_MVTWSI_BASE1	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE1	/;"	d
CONFIG_I2C_MVTWSI_BASE1	include/configs/theadorable.h	/^#define CONFIG_I2C_MVTWSI_BASE1	/;"	d
CONFIG_I2C_MVTWSI_BASE2	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE2	/;"	d
CONFIG_I2C_MVTWSI_BASE2	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE2	/;"	d
CONFIG_I2C_MVTWSI_BASE3	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE3	/;"	d
CONFIG_I2C_MVTWSI_BASE3	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE3	/;"	d
CONFIG_I2C_MVTWSI_BASE4	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE4	/;"	d
CONFIG_I2C_MVTWSI_BASE4	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE4	/;"	d
CONFIG_I2C_MVTWSI_BASE5	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE5 /;"	d
CONFIG_I2C_MVTWSI_BASE5	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_I2C_MVTWSI_BASE5 /;"	d
CONFIG_I2C_MXC	include/configs/novena.h	/^#define CONFIG_I2C_MXC$/;"	d
CONFIG_I2C_PMIC	include/configs/gw_ventana.h	/^#define CONFIG_I2C_PMIC	/;"	d
CONFIG_I2C_RTC_ADDR	include/configs/eb_cpu5282.h	/^#define CONFIG_I2C_RTC_ADDR	/;"	d
CONFIG_I2C_TIMEOUT	drivers/i2c/fsl_i2c.c	/^#define CONFIG_I2C_TIMEOUT	/;"	d	file:
CONFIG_I2S	drivers/sound/Kconfig	/^config I2S$/;"	c	menu:Sound support
CONFIG_I2S_MODULE	drivers/sound/Kconfig	/^config I2S$/;"	c	menu:Sound support
CONFIG_I2S_SAMSUNG	drivers/sound/Kconfig	/^config I2S_SAMSUNG$/;"	c	menu:Sound support
CONFIG_I2S_SAMSUNG_MODULE	drivers/sound/Kconfig	/^config I2S_SAMSUNG$/;"	c	menu:Sound support
CONFIG_I8042_KEYB	drivers/input/Kconfig	/^config I8042_KEYB$/;"	c
CONFIG_I8042_KEYB_MODULE	drivers/input/Kconfig	/^config I8042_KEYB$/;"	c
CONFIG_I8254_TIMER	arch/x86/Kconfig	/^config I8254_TIMER$/;"	c	menu:x86 architecture
CONFIG_I8254_TIMER_MODULE	arch/x86/Kconfig	/^config I8254_TIMER$/;"	c	menu:x86 architecture
CONFIG_I8259_PIC	arch/x86/Kconfig	/^config I8259_PIC$/;"	c	menu:x86 architecture
CONFIG_I8259_PIC_MODULE	arch/x86/Kconfig	/^config I8259_PIC$/;"	c	menu:x86 architecture
CONFIG_IBM_EMAC4_V4	include/configs/PMC440.h	/^#define CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/canyonlands.h	/^#define CONFIG_IBM_EMAC4_V4$/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/icon.h	/^#define	CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/intip.h	/^#define CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/io64.h	/^#define CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/katmai.h	/^#define	CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/kilauea.h	/^#define CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/lwmon5.h	/^#define	CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/makalu.h	/^#define CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/redwood.h	/^#define	CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/sequoia.h	/^#define	CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/t3corp.h	/^#define CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_IBM_EMAC4_V4	include/configs/yucca.h	/^#define	CONFIG_IBM_EMAC4_V4	/;"	d
CONFIG_ICACHE	include/configs/microblaze-generic.h	/^# define CONFIG_ICACHE$/;"	d
CONFIG_ICACHE_OFF	include/configs/bf506f-ezkit.h	/^#define CONFIG_ICACHE_OFF$/;"	d
CONFIG_ICH_SPI	drivers/spi/Kconfig	/^config ICH_SPI$/;"	c	menu:SPI Support
CONFIG_ICH_SPI_MODULE	drivers/spi/Kconfig	/^config ICH_SPI$/;"	c	menu:SPI Support
CONFIG_ICON	include/configs/icon.h	/^#define CONFIG_ICON	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/MPC8536DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/MPC8572DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/P1022DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/P3041DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/P4080DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/P5020DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/P5040DS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/T208xQDS.h	/^#define CONFIG_ICS307_REFCLK_HZ /;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/T208xRDB.h	/^#define CONFIG_ICS307_REFCLK_HZ /;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/T4240QDS.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_ICS307_REFCLK_HZ	include/configs/T4240RDB.h	/^#define CONFIG_ICS307_REFCLK_HZ	/;"	d
CONFIG_IDENT_STRING	board/sunxi/Kconfig	/^config IDENT_STRING$/;"	c
CONFIG_IDENT_STRING	common/Kconfig	/^config IDENT_STRING$/;"	c	menu:Console
CONFIG_IDENT_STRING	include/config/auto.conf	/^CONFIG_IDENT_STRING=" Allwinner Technology"$/;"	k
CONFIG_IDENT_STRING	include/generated/autoconf.h	/^#define CONFIG_IDENT_STRING /;"	d
CONFIG_IDENT_STRING_MODULE	board/sunxi/Kconfig	/^config IDENT_STRING$/;"	c
CONFIG_IDENT_STRING_MODULE	common/Kconfig	/^config IDENT_STRING$/;"	c	menu:Console
CONFIG_IDE_8xx_PCCARD	include/configs/TQM823L.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM823M.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM850L.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM850M.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM855L.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM855M.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM860L.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM860M.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM862L.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM862M.h	/^#define	CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM866M.h	/^#define CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_8xx_PCCARD	include/configs/TQM885D.h	/^#define CONFIG_IDE_8xx_PCCARD	/;"	d
CONFIG_IDE_PCMCIA	include/configs/dbau1x00.h	/^#define CONFIG_IDE_PCMCIA /;"	d
CONFIG_IDE_PCMCIA	include/configs/ms7720se.h	/^#define CONFIG_IDE_PCMCIA	/;"	d
CONFIG_IDE_PREINIT	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/M5253DEMO.h	/^#	define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/M5253EVBE.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/M54455EVB.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM5200.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM823L.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM823M.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM850L.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM850M.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM855L.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM855M.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM860L.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM860M.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM862L.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM862M.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM866M.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/TQM885D.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/a4m072.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/aria.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/digsy_mtc.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/edminiv2.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/ib62x0.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/inka4x0.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/ipek01.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_IDE_PREINIT	/;"	d
CONFIG_IDE_PREINIT	include/configs/motionpro.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/mpc5121ads.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/nsa310s.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/pcm030.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/sheevaplug.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_PREINIT	include/configs/v38b.h	/^#define CONFIG_IDE_PREINIT$/;"	d
CONFIG_IDE_REG_CS	drivers/block/ftide020.h	/^#define CONFIG_IDE_REG_CS	/;"	d
CONFIG_IDE_RESET	include/configs/CPCI4052.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/M5253DEMO.h	/^#	define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/M5253EVBE.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/M54455EVB.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/MIP405.h	/^#define CONFIG_IDE_RESET /;"	d
CONFIG_IDE_RESET	include/configs/PIP405.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/PLU405.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/TQM5200.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/ap325rxa.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/aria.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/digsy_mtc.h	/^#define CONFIG_IDE_RESET$/;"	d
CONFIG_IDE_RESET	include/configs/mpc5121ads.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/pcm030.h	/^#define	CONFIG_IDE_RESET /;"	d
CONFIG_IDE_RESET	include/configs/r2dplus.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET	include/configs/r7780mp.h	/^#define CONFIG_IDE_RESET /;"	d
CONFIG_IDE_RESET	include/configs/v38b.h	/^#define CONFIG_IDE_RESET	/;"	d
CONFIG_IDE_RESET_ROUTINE	include/configs/MIP405.h	/^#define CONFIG_IDE_RESET_ROUTINE /;"	d
CONFIG_IDE_RESET_ROUTINE	include/configs/PIP405.h	/^#define CONFIG_IDE_RESET_ROUTINE	/;"	d
CONFIG_IDE_SWAP_IO	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	arch/powerpc/include/asm/config.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/ap325rxa.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/edminiv2.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/ms7720se.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/qemu-mips.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/qemu-mips64.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/r2dplus.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDE_SWAP_IO	include/configs/r7780mp.h	/^#define CONFIG_IDE_SWAP_IO$/;"	d
CONFIG_IDS8313	include/configs/ids8313.h	/^#define CONFIG_IDS8313$/;"	d
CONFIG_IDT8T49N222A	include/configs/B4860QDS.h	/^#define CONFIG_IDT8T49N222A$/;"	d
CONFIG_ID_EEPROM	include/configs/B4860QDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/BSC9132QDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8536DS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8541CDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8548CDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8555CDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8569MDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8572DS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8610HPCD.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/MPC8641HPCN.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/P1010RDB.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/P1022DS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/P1023RDB.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/P2041RDB.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/T102xQDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/T102xRDB.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/T1040QDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/T208xQDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/T208xRDB.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/T4240QDS.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/corenet_ds.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/cyrus.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls1012aqds.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls1021atwr.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls1043aqds.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls1043ardb.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls1046aqds.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls1046ardb.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls2080aqds.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_ID_EEPROM	include/configs/ls2080ardb.h	/^#define CONFIG_ID_EEPROM$/;"	d
CONFIG_IFM_DEFAULT_ENV_NEW	include/configs/o2dnt-common.h	/^#define CONFIG_IFM_DEFAULT_ENV_NEW	/;"	d
CONFIG_IFM_DEFAULT_ENV_OLD	include/configs/o2dnt-common.h	/^#define CONFIG_IFM_DEFAULT_ENV_OLD	/;"	d
CONFIG_IFM_DEFAULT_ENV_SETTINGS	include/configs/o2dnt-common.h	/^#define	CONFIG_IFM_DEFAULT_ENV_SETTINGS	/;"	d
CONFIG_IFM_SENSOR_TYPE	include/configs/o2mnt.h	/^#define CONFIG_IFM_SENSOR_TYPE	/;"	d
CONFIG_IMAGE_FORMAT_LEGACY	include/autoconf.mk	/^CONFIG_IMAGE_FORMAT_LEGACY=y$/;"	m
CONFIG_IMAGE_FORMAT_LEGACY	include/config_fallbacks.h	/^#define CONFIG_IMAGE_FORMAT_LEGACY$/;"	d
CONFIG_IMAGE_FORMAT_LEGACY	include/configs/ids8313.h	/^#define CONFIG_IMAGE_FORMAT_LEGACY$/;"	d
CONFIG_IMAGE_FORMAT_LEGACY	include/configs/zynq-common.h	/^#define CONFIG_IMAGE_FORMAT_LEGACY /;"	d
CONFIG_IMAGE_FORMAT_LEGACY	spl/include/autoconf.mk	/^CONFIG_IMAGE_FORMAT_LEGACY=y$/;"	m
CONFIG_IMX6_PWM_PER_CLK	include/configs/advantech_dms-ba16.h	/^#define CONFIG_IMX6_PWM_PER_CLK /;"	d
CONFIG_IMX6_PWM_PER_CLK	include/configs/aristainetos-common.h	/^#define CONFIG_IMX6_PWM_PER_CLK	/;"	d
CONFIG_IMX6_PWM_PER_CLK	include/configs/aristainetos2.h	/^#define CONFIG_IMX6_PWM_PER_CLK	/;"	d
CONFIG_IMX6_PWM_PER_CLK	include/configs/aristainetos2b.h	/^#define CONFIG_IMX6_PWM_PER_CLK	/;"	d
CONFIG_IMX6_PWM_PER_CLK	include/configs/ge_bx50v3.h	/^#define CONFIG_IMX6_PWM_PER_CLK	/;"	d
CONFIG_IMX_BOOTAUX	arch/arm/imx-common/Kconfig	/^config IMX_BOOTAUX$/;"	c
CONFIG_IMX_BOOTAUX_MODULE	arch/arm/imx-common/Kconfig	/^config IMX_BOOTAUX$/;"	c
CONFIG_IMX_CONFIG	arch/arm/imx-common/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG	board/advantech/dms-ba16/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG	board/ge/bx50v3/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG	board/inversepath/usbarmory/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG	board/seco/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG	board/tbs/tbs2910/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG	board/tqc/tqma6/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	arch/arm/imx-common/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	board/advantech/dms-ba16/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	board/ge/bx50v3/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	board/inversepath/usbarmory/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	board/seco/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	board/tbs/tbs2910/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_CONFIG_MODULE	board/tqc/tqma6/Kconfig	/^config IMX_CONFIG$/;"	c
CONFIG_IMX_HDMI	include/configs/advantech_dms-ba16.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/cgtqmx6eval.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/cm_fx6.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/embestmx6boards.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/ge_bx50v3.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/gw_ventana.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/mx6cuboxi.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/mx6sabre_common.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/nitrogen6x.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/novena.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/tbs2910.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_HDMI	include/configs/wandboard.h	/^#define CONFIG_IMX_HDMI$/;"	d
CONFIG_IMX_OTP	include/configs/ot1200.h	/^#define CONFIG_IMX_OTP$/;"	d
CONFIG_IMX_RDC	arch/arm/imx-common/Kconfig	/^config IMX_RDC$/;"	c
CONFIG_IMX_RDC_MODULE	arch/arm/imx-common/Kconfig	/^config IMX_RDC$/;"	c
CONFIG_IMX_THERMAL	drivers/thermal/Kconfig	/^config IMX_THERMAL$/;"	c
CONFIG_IMX_THERMAL	include/configs/cgtqmx6eval.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/colibri_imx7.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/el6x_common.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/embestmx6boards.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/gw_ventana.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6cuboxi.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6sabre_common.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6slevk.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6sxsabreauto.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6sxsabresd.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx6ullevk.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/mx7dsabresd.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/pcm058.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/tbs2910.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/warp7.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL	include/configs/xpress.h	/^#define CONFIG_IMX_THERMAL$/;"	d
CONFIG_IMX_THERMAL_MODULE	drivers/thermal/Kconfig	/^config IMX_THERMAL$/;"	c
CONFIG_IMX_VIDEO_SKIP	include/configs/advantech_dms-ba16.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/aristainetos-common.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/embestmx6boards.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/ge_bx50v3.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/gw_ventana.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/mx6cuboxi.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/mx6sabre_common.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/nitrogen6x.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/novena.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/tbs2910.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_VIDEO_SKIP	include/configs/wandboard.h	/^#define CONFIG_IMX_VIDEO_SKIP$/;"	d
CONFIG_IMX_WATCHDOG	include/configs/aristainetos-common.h	/^#define CONFIG_IMX_WATCHDOG$/;"	d
CONFIG_IMX_WATCHDOG	include/configs/tqma6_wru4.h	/^#define CONFIG_IMX_WATCHDOG$/;"	d
CONFIG_IMX_WATCHDOG	include/configs/warp.h	/^#define CONFIG_IMX_WATCHDOG$/;"	d
CONFIG_INITIAL_USB_SCAN_DELAY	board/sunxi/Kconfig	/^config INITIAL_USB_SCAN_DELAY$/;"	c
CONFIG_INITIAL_USB_SCAN_DELAY	include/config/auto.conf	/^CONFIG_INITIAL_USB_SCAN_DELAY=0$/;"	k
CONFIG_INITIAL_USB_SCAN_DELAY	include/generated/autoconf.h	/^#define CONFIG_INITIAL_USB_SCAN_DELAY /;"	d
CONFIG_INITIAL_USB_SCAN_DELAY_MODULE	board/sunxi/Kconfig	/^config INITIAL_USB_SCAN_DELAY$/;"	c
CONFIG_INITRD_TAG	include/autoconf.mk	/^CONFIG_INITRD_TAG=y$/;"	m
CONFIG_INITRD_TAG	include/configs/VCMA9.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/adp-ag101p.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/advantech_dms-ba16.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/am3517_crane.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/am3517_evm.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/apf27.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/at91rm9200ek.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9260ek.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9261ek.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9263ek.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9n12ek.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9rlek.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/at91sam9x5ek.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/atngw100.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/atngw100mkii.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/atstk1002.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/brppt1.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/brxre1.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/cm_t35.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/cm_t3517.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/corvus.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/edb93xx.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/edminiv2.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/ethernut5.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/exynos-common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/flea3.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/ge_bx50v3.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/grasshopper.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/h2200.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/imx27lite-common.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/imx31_phycore.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/kc1.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/km/km_arm.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/kzm9g.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/m53evk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/ma5d4evk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mcx.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/meesc.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mv-common.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/mx25pdk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx31ads.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/mx31pdk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx35pdk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx51evk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx53ard.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx53evk.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx53loco.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx53smd.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/mx6_common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/nokia_rx51.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/omap3_evm.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/omap3_logic.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/picosam9g45.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/pm9261.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/pm9263.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/pm9g45.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/rcar-gen2-common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/rcar-gen3-common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/rpi.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/s5p_goni.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/siemens-am33x-common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/smartweb.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/smdk2410.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/smdkc100.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/snapper9260.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/snapper9g45.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/sniper.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/stm32f429-discovery.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/stm32f746-disco.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/sunxi-common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/tam3517-common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/tao3530.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/taurus.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/tec-ng.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/ti814x_evm.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/ti816x_evm.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/ti_armv7_common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/tricorder.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/ts4800.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/usb_a9263.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/vexpress_common.h	/^#define CONFIG_INITRD_TAG	/;"	d
CONFIG_INITRD_TAG	include/configs/woodburn_common.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/work_92105.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	include/configs/zmx25.h	/^#define CONFIG_INITRD_TAG$/;"	d
CONFIG_INITRD_TAG	spl/include/autoconf.mk	/^CONFIG_INITRD_TAG=y$/;"	m
CONFIG_INKA4X0	include/configs/inka4x0.h	/^#define CONFIG_INKA4X0	/;"	d
CONFIG_INTEGRITY	include/configs/xpedite1000.h	/^#define CONFIG_INTEGRITY	/;"	d
CONFIG_INTEGRITY	include/configs/xpedite517x.h	/^#define CONFIG_INTEGRITY	/;"	d
CONFIG_INTEGRITY	include/configs/xpedite520x.h	/^#define CONFIG_INTEGRITY	/;"	d
CONFIG_INTEGRITY	include/configs/xpedite537x.h	/^#define CONFIG_INTEGRITY	/;"	d
CONFIG_INTEGRITY	include/configs/xpedite550x.h	/^#define CONFIG_INTEGRITY	/;"	d
CONFIG_INTEL_BAYTRAIL	arch/x86/cpu/baytrail/Kconfig	/^config INTEL_BAYTRAIL$/;"	c
CONFIG_INTEL_BAYTRAIL_MODULE	arch/x86/cpu/baytrail/Kconfig	/^config INTEL_BAYTRAIL$/;"	c
CONFIG_INTEL_BROADWELL	arch/x86/cpu/broadwell/Kconfig	/^config INTEL_BROADWELL$/;"	c
CONFIG_INTEL_BROADWELL_GPIO	drivers/gpio/Kconfig	/^config INTEL_BROADWELL_GPIO$/;"	c	menu:GPIO Support
CONFIG_INTEL_BROADWELL_GPIO_MODULE	drivers/gpio/Kconfig	/^config INTEL_BROADWELL_GPIO$/;"	c	menu:GPIO Support
CONFIG_INTEL_BROADWELL_MODULE	arch/x86/cpu/broadwell/Kconfig	/^config INTEL_BROADWELL$/;"	c
CONFIG_INTEL_ICH6_GPIO	include/configs/x86-common.h	/^#define CONFIG_INTEL_ICH6_GPIO$/;"	d
CONFIG_INTEL_QUARK	arch/x86/cpu/quark/Kconfig	/^config INTEL_QUARK$/;"	c
CONFIG_INTEL_QUARK_MODULE	arch/x86/cpu/quark/Kconfig	/^config INTEL_QUARK$/;"	c
CONFIG_INTEL_QUEENSBAY	arch/x86/cpu/queensbay/Kconfig	/^config INTEL_QUEENSBAY$/;"	c
CONFIG_INTEL_QUEENSBAY_MODULE	arch/x86/cpu/queensbay/Kconfig	/^config INTEL_QUEENSBAY$/;"	c
CONFIG_INTERNAL_UART	arch/x86/cpu/baytrail/Kconfig	/^config INTERNAL_UART$/;"	c
CONFIG_INTERNAL_UART_MODULE	arch/x86/cpu/baytrail/Kconfig	/^config INTERNAL_UART$/;"	c
CONFIG_INTERRUPTS	include/configs/MPC8544DS.h	/^#define CONFIG_INTERRUPTS	/;"	d
CONFIG_INTERRUPTS	include/configs/MPC8548CDS.h	/^#define CONFIG_INTERRUPTS	/;"	d
CONFIG_INTERRUPTS	include/configs/MPC8610HPCD.h	/^#define CONFIG_INTERRUPTS	/;"	d
CONFIG_INTERRUPTS	include/configs/sbc8548.h	/^#define CONFIG_INTERRUPTS	/;"	d
CONFIG_INTERRUPTS	include/configs/xpedite520x.h	/^#define CONFIG_INTERRUPTS	/;"	d
CONFIG_IO	include/configs/io.h	/^#define CONFIG_IO	/;"	d
CONFIG_IO64	include/configs/io64.h	/^#define CONFIG_IO64	/;"	d
CONFIG_IOCON	include/configs/iocon.h	/^#define CONFIG_IOCON	/;"	d
CONFIG_IODELAY_RECALIBRATION	include/configs/am57xx_evm.h	/^#define CONFIG_IODELAY_RECALIBRATION$/;"	d
CONFIG_IODELAY_RECALIBRATION	include/configs/dra7xx_evm.h	/^#define CONFIG_IODELAY_RECALIBRATION$/;"	d
CONFIG_IOMUX_LPSR	include/configs/mx6ullevk.h	/^#define CONFIG_IOMUX_LPSR$/;"	d
CONFIG_IOMUX_LPSR	include/configs/mx7_common.h	/^#define CONFIG_IOMUX_LPSR$/;"	d
CONFIG_IOMUX_SHARE_CONF_REG	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define CONFIG_IOMUX_SHARE_CONF_REG$/;"	d
CONFIG_IOMUX_SHARE_CONF_REG	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CONFIG_IOMUX_SHARE_CONF_REG$/;"	d
CONFIG_IOS	drivers/usb/gadget/ci_udc.h	/^#define CONFIG_IOS	/;"	d
CONFIG_IO_TRACE	include/configs/sandbox.h	/^#define CONFIG_IO_TRACE$/;"	d
CONFIG_IPADDR	include/configs/M5208EVBE.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5235EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5272C3.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5282EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M53017EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5329EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5373EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M54418TWR.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M54451EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M54455EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5475EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/M5485EVB.h	/^#	define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MIP405.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MPC8536DS.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MPC8540ADS.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/MPC8541CDS.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/MPC8544DS.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MPC8548CDS.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MPC8555CDS.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/MPC8560ADS.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/MPC8572DS.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/MPC8641HPCN.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/PIP405.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/UCP1020.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/VCMA9.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/bct-brettl2.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/bf537-minotaur.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/bf537-srv1.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/bfin_adi_common.h	/^#  define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/blackstamp.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/blackvme.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/colibri_imx7.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/colibri_vf.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/gr_ep2s60.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/gr_xc3s_1500.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/grsim.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/grsim_leon2.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/gw_ventana.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/imx31_phycore.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/inka4x0.h	/^#define	CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/integratorcp.h	/^#define CONFIG_IPADDR /;"	d
CONFIG_IPADDR	include/configs/microblaze-generic.h	/^#define	CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/sbc8548.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/sbc8641d.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/smdk2410.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR	include/configs/uniphier.h	/^#define CONFIG_IPADDR	/;"	d
CONFIG_IPADDR1	include/configs/UCP1020.h	/^#define CONFIG_IPADDR1	/;"	d
CONFIG_IPADDR2	include/configs/UCP1020.h	/^#define CONFIG_IPADDR2	/;"	d
CONFIG_IPAM390_GPIO_BOOTMODE	include/configs/ipam390.h	/^#define CONFIG_IPAM390_GPIO_BOOTMODE	/;"	d
CONFIG_IPAM390_GPIO_LED_GREEN	include/configs/ipam390.h	/^#define CONFIG_IPAM390_GPIO_LED_GREEN	/;"	d
CONFIG_IPAM390_GPIO_LED_RED	include/configs/ipam390.h	/^#define CONFIG_IPAM390_GPIO_LED_RED	/;"	d
CONFIG_IPEK01	include/configs/ipek01.h	/^#define CONFIG_IPEK01 /;"	d
CONFIG_IPROC	arch/arm/include/asm/iproc-common/configs.h	/^#define CONFIG_IPROC$/;"	d
CONFIG_IPUV3_CLK	include/configs/advantech_dms-ba16.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/aristainetos-common.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/cgtqmx6eval.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/cm_fx6.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/embestmx6boards.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/ge_bx50v3.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/gw_ventana.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/m53evk.h	/^#define CONFIG_IPUV3_CLK	/;"	d
CONFIG_IPUV3_CLK	include/configs/mx51evk.h	/^#define CONFIG_IPUV3_CLK	/;"	d
CONFIG_IPUV3_CLK	include/configs/mx53loco.h	/^#define CONFIG_IPUV3_CLK	/;"	d
CONFIG_IPUV3_CLK	include/configs/mx6cuboxi.h	/^#define CONFIG_IPUV3_CLK	/;"	d
CONFIG_IPUV3_CLK	include/configs/mx6sabre_common.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/nitrogen6x.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IPUV3_CLK	include/configs/novena.h	/^#define CONFIG_IPUV3_CLK	/;"	d
CONFIG_IPUV3_CLK	include/configs/tbs2910.h	/^#define CONFIG_IPUV3_CLK	/;"	d
CONFIG_IPUV3_CLK	include/configs/wandboard.h	/^#define CONFIG_IPUV3_CLK /;"	d
CONFIG_IP_DEFRAG	include/configs/apalis_t30.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/bfin_adi_common.h	/^# define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/colibri_imx7.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/colibri_t20.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/colibri_t30.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/ma5d4evk.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/sandbox.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IP_DEFRAG	include/configs/tqma6.h	/^#define CONFIG_IP_DEFRAG$/;"	d
CONFIG_IRAM_BASE	include/configs/exynos7420-common.h	/^#define CONFIG_IRAM_BASE	/;"	d
CONFIG_IRAM_END	include/configs/exynos7420-common.h	/^#define CONFIG_IRAM_END	/;"	d
CONFIG_IRAM_SIZE	include/configs/exynos7420-common.h	/^#define CONFIG_IRAM_SIZE	/;"	d
CONFIG_IRAM_STACK	include/configs/arndale.h	/^#define CONFIG_IRAM_STACK	/;"	d
CONFIG_IRAM_STACK	include/configs/exynos5250-common.h	/^#define CONFIG_IRAM_STACK	/;"	d
CONFIG_IRAM_TOP	include/configs/exynos5420-common.h	/^#define CONFIG_IRAM_TOP	/;"	d
CONFIG_IRDA_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_IRDA_BASE	/;"	d
CONFIG_IRQ_SLOT_COUNT	arch/x86/Kconfig	/^config IRQ_SLOT_COUNT$/;"	c	menu:x86 architecture
CONFIG_IRQ_SLOT_COUNT_MODULE	arch/x86/Kconfig	/^config IRQ_SLOT_COUNT$/;"	c	menu:x86 architecture
CONFIG_ISA_ARCOMPACT	arch/arc/Kconfig	/^config ISA_ARCOMPACT$/;"	c	choice:ARC architecture""choice763e4ef80104
CONFIG_ISA_ARCOMPACT_MODULE	arch/arc/Kconfig	/^config ISA_ARCOMPACT$/;"	c	choice:ARC architecture""choice763e4ef80104
CONFIG_ISA_ARCV2	arch/arc/Kconfig	/^config ISA_ARCV2$/;"	c	choice:ARC architecture""choice763e4ef80104
CONFIG_ISA_ARCV2_MODULE	arch/arc/Kconfig	/^config ISA_ARCV2$/;"	c	choice:ARC architecture""choice763e4ef80104
CONFIG_ISO_PARTITION	include/autoconf.mk	/^CONFIG_ISO_PARTITION=y$/;"	m
CONFIG_ISO_PARTITION	include/config_distro_defaults.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/M52277EVB.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/M54455EVB.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/MIP405.h	/^#define CONFIG_ISO_PARTITION /;"	d
CONFIG_ISO_PARTITION	include/configs/PIP405.h	/^#define CONFIG_ISO_PARTITION /;"	d
CONFIG_ISO_PARTITION	include/configs/PMC440.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/TQM5200.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/ac14xx.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/acadia.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/aria.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/bamboo.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/canyonlands.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/cm5200.h	/^#define CONFIG_ISO_PARTITION	/;"	d
CONFIG_ISO_PARTITION	include/configs/ds414.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/edminiv2.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/gplugd.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/gr_ep2s60.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/grsim.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/grsim_leon2.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/inka4x0.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/intip.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/jupiter.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/lwmon5.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/mpc5121ads.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/mv-common.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_ISO_PARTITION	/;"	d
CONFIG_ISO_PARTITION	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_ISO_PARTITION	/;"	d
CONFIG_ISO_PARTITION	include/configs/o2dnt-common.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/sandbox.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/sequoia.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/vct.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/x86-common.h	/^#define CONFIG_ISO_PARTITION	/;"	d
CONFIG_ISO_PARTITION	include/configs/xilinx_zynqmp.h	/^# define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_PARTITION	include/configs/yosemite.h	/^#define CONFIG_ISO_PARTITION$/;"	d
CONFIG_ISO_STRING	board/mpl/mip405/Kconfig	/^config ISO_STRING$/;"	c
CONFIG_ISO_STRING	board/mpl/pati/Kconfig	/^config ISO_STRING$/;"	c
CONFIG_ISO_STRING	board/mpl/pip405/Kconfig	/^config ISO_STRING$/;"	c
CONFIG_ISO_STRING_MODULE	board/mpl/mip405/Kconfig	/^config ISO_STRING$/;"	c
CONFIG_ISO_STRING_MODULE	board/mpl/pati/Kconfig	/^config ISO_STRING$/;"	c
CONFIG_ISO_STRING_MODULE	board/mpl/pip405/Kconfig	/^config ISO_STRING$/;"	c
CONFIG_ISW_ENTRY_ADDR	arch/arm/cpu/armv7/am33xx/Kconfig	/^config ISW_ENTRY_ADDR$/;"	c
CONFIG_ISW_ENTRY_ADDR_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config ISW_ENTRY_ADDR$/;"	c
CONFIG_IS_BUILTIN	include/linux/kconfig.h	/^#define CONFIG_IS_BUILTIN(/;"	d
CONFIG_IS_BUILTIN(option)	include/autoconf.mk	/^CONFIG_IS_BUILTIN(option)="config_enabled(CONFIG_VAL(option))"$/;"	m
CONFIG_IS_BUILTIN(option)	spl/include/autoconf.mk	/^CONFIG_IS_BUILTIN(option)="config_enabled(CONFIG_VAL(option))"$/;"	m
CONFIG_IS_ENABLED	include/linux/kconfig.h	/^#define CONFIG_IS_ENABLED(/;"	d
CONFIG_IS_ENABLED(option)	include/autoconf.mk	/^CONFIG_IS_ENABLED(option)="(config_enabled(CONFIG_VAL(option)) || config_enabled(CONFIG_VAL(opti/;"	m
CONFIG_IS_ENABLED(option)	spl/include/autoconf.mk	/^CONFIG_IS_ENABLED(option)="(config_enabled(CONFIG_VAL(option)) || config_enabled(CONFIG_VAL(opti/;"	m
CONFIG_IS_INVALID	board/amcc/bamboo/bamboo.h	/^			       CONFIG_IS_INVALID$/;"	e	enum:config_validity
CONFIG_IS_MODULE	include/linux/kconfig.h	/^#define CONFIG_IS_MODULE(/;"	d
CONFIG_IS_MODULE(option)	include/autoconf.mk	/^CONFIG_IS_MODULE(option)="config_enabled(CONFIG_VAL(option ##_MODULE))"$/;"	m
CONFIG_IS_MODULE(option)	spl/include/autoconf.mk	/^CONFIG_IS_MODULE(option)="config_enabled(CONFIG_VAL(option ##_MODULE))"$/;"	m
CONFIG_IS_VALID	board/amcc/bamboo/bamboo.h	/^typedef enum config_validity { CONFIG_IS_VALID,$/;"	e	enum:config_validity
CONFIG_JFFS2_CMDLINE	include/configs/ethernut5.h	/^#define CONFIG_JFFS2_CMDLINE$/;"	d
CONFIG_JFFS2_CMDLINE	include/configs/km/km-powerpc.h	/^#define CONFIG_JFFS2_CMDLINE$/;"	d
CONFIG_JFFS2_CMDLINE	include/configs/pcm030.h	/^#define CONFIG_JFFS2_CMDLINE$/;"	d
CONFIG_JFFS2_CMDLINE	include/configs/pm9263.h	/^#define CONFIG_JFFS2_CMDLINE	/;"	d
CONFIG_JFFS2_CMDLINE	include/configs/pm9g45.h	/^#define CONFIG_JFFS2_CMDLINE	/;"	d
CONFIG_JFFS2_DEV	include/configs/M52277EVB.h	/^#	define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/M5329EVB.h	/^#	define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/M5373EVB.h	/^#	define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/M54418TWR.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/M54451EVB.h	/^#	define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/M54455EVB.h	/^#	define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/MIP405.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/am3517_crane.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/devkit8000.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/ids8313.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/imx31_phycore.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/mcx.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/mx31ads.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/omap3_evm.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/pm9263.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_DEV	include/configs/pm9g45.h	/^#define CONFIG_JFFS2_DEV	/;"	d
CONFIG_JFFS2_LZO	include/configs/nas220.h	/^#define CONFIG_JFFS2_LZO$/;"	d
CONFIG_JFFS2_NAND	include/configs/M5329EVB.h	/^#	define CONFIG_JFFS2_NAND	/;"	d
CONFIG_JFFS2_NAND	include/configs/M5373EVB.h	/^#	define CONFIG_JFFS2_NAND	/;"	d
CONFIG_JFFS2_NAND	include/configs/M54418TWR.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/am3517_crane.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/aria.h	/^#define CONFIG_JFFS2_NAND	/;"	d
CONFIG_JFFS2_NAND	include/configs/devkit8000.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/ethernut5.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/ids8313.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/imx27lite-common.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/mcx.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/mpc5121ads.h	/^#define CONFIG_JFFS2_NAND	/;"	d
CONFIG_JFFS2_NAND	include/configs/nas220.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/omap3_evm.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/pcm052.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/pm9263.h	/^#define CONFIG_JFFS2_NAND	/;"	d
CONFIG_JFFS2_NAND	include/configs/pm9g45.h	/^#define CONFIG_JFFS2_NAND	/;"	d
CONFIG_JFFS2_NAND	include/configs/s32v234evb.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_NAND	include/configs/xpedite517x.h	/^#define CONFIG_JFFS2_NAND$/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/M52277EVB.h	/^#	define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/M5329EVB.h	/^#	define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/M5373EVB.h	/^#	define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/M54418TWR.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/M54451EVB.h	/^#	define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/M54455EVB.h	/^#	define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/MIP405.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/am3517_crane.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/devkit8000.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/mcx.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/omap3_evm.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/pm9263.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_OFFSET	include/configs/pm9g45.h	/^#define CONFIG_JFFS2_PART_OFFSET	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/M52277EVB.h	/^#	define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/M5329EVB.h	/^#	define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/M5373EVB.h	/^#	define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/M54451EVB.h	/^#	define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/M54455EVB.h	/^#	define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/MIP405.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/devkit8000.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/mcx.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/pm9263.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_PART_SIZE	include/configs/pm9g45.h	/^#define CONFIG_JFFS2_PART_SIZE	/;"	d
CONFIG_JFFS2_SUMMARY	include/configs/bfin_adi_common.h	/^#  define CONFIG_JFFS2_SUMMARY$/;"	d
CONFIG_JRSTARTR_JR0	include/fsl_sec.h	/^#define CONFIG_JRSTARTR_JR0	/;"	d
CONFIG_JTAG_CONSOLE	include/configs/bfin_adi_common.h	/^#define CONFIG_JTAG_CONSOLE$/;"	d
CONFIG_JTAG_CONSOLE_TIMEOUT	arch/blackfin/cpu/jtag-console.c	/^# define CONFIG_JTAG_CONSOLE_TIMEOUT /;"	d	file:
CONFIG_JTAG_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config JTAG_MODE$/;"	c	choice:choice5ba020940104
CONFIG_JTAG_MODE_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config JTAG_MODE$/;"	c	choice:choice5ba020940104
CONFIG_JUPITER	include/configs/jupiter.h	/^#define CONFIG_JUPITER	/;"	d
CONFIG_K2E_EVM	include/configs/k2e_evm.h	/^#define CONFIG_K2E_EVM$/;"	d
CONFIG_K2G_EVM	include/configs/k2g_evm.h	/^#define CONFIG_K2G_EVM$/;"	d
CONFIG_K2HK_EVM	include/configs/k2hk_evm.h	/^#define CONFIG_K2HK_EVM$/;"	d
CONFIG_K2L_EVM	include/configs/k2l_evm.h	/^#define CONFIG_K2L_EVM$/;"	d
CONFIG_KALLSYMS	include/configs/bfin_adi_common.h	/^#define CONFIG_KALLSYMS	/;"	d
CONFIG_KATMAI	include/configs/katmai.h	/^#define CONFIG_KATMAI	/;"	d
CONFIG_KCLK_DIS	include/i8042.h	/^#define CONFIG_KCLK_DIS	/;"	d
CONFIG_KEEP_SERVERADDR	include/configs/bfin_adi_common.h	/^#  define CONFIG_KEEP_SERVERADDR$/;"	d
CONFIG_KEEP_SERVERADDR	include/configs/sandbox.h	/^#define CONFIG_KEEP_SERVERADDR$/;"	d
CONFIG_KERNEL_OFFSET	include/configs/apf27.h	/^#define	CONFIG_KERNEL_OFFSET	/;"	d
CONFIG_KEYBOARD	include/configs/chromebook_jerry.h	/^#define CONFIG_KEYBOARD$/;"	d
CONFIG_KEYBOARD	include/configs/exynos5-dt-common.h	/^#define CONFIG_KEYBOARD$/;"	d
CONFIG_KEYBOARD	include/configs/novena.h	/^#define CONFIG_KEYBOARD$/;"	d
CONFIG_KEYBOARD	include/configs/nyan-big.h	/^#define CONFIG_KEYBOARD$/;"	d
CONFIG_KEYBOARD	include/configs/sandbox.h	/^#define CONFIG_KEYBOARD$/;"	d
CONFIG_KEYBOARD	include/configs/seaboard.h	/^#define CONFIG_KEYBOARD$/;"	d
CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE	drivers/mtd/nand/davinci_nand.c	/^#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE	/;"	d	file:
CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	/;"	d
CONFIG_KEYSTONE_RBL_NAND	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KEYSTONE_RBL_NAND$/;"	d
CONFIG_KEY_REVOCATION	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_KEY_REVOCATION$/;"	d
CONFIG_KEY_REVOCATION	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_KEY_REVOCATION$/;"	d
CONFIG_KEY_REVOCATION	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_KEY_REVOCATION$/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/B4860QDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/BSC9131RDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/BSC9132QDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MIP405.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8315ERDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8323ERDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC832XEMDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8349EMDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8349ITX.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC837XEMDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC837XERDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8536DS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8540ADS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8541CDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8544DS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8548CDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8555CDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8560ADS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8568MDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8569MDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8572DS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8610HPCD.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/MPC8641HPCN.h	/^    #define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/P1010RDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/P1022DS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/P2041RDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/PIP405.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/PMC440.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T102xQDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T102xRDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T1040QDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T104xRDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T208xQDS.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T208xRDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/T4240RDB.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/TQM834x.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/UCP1020.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/VCMA9.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/ac14xx.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/amcc-common.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/aria.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/corenet_ds.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/cyrus.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/km/kmp204x-common.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/lwmon5.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/mecp5123.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/mpc5121ads.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/pdm360ng.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/pxa-common.h	/^#define	CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/sbc8349.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/sbc8548.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/sbc8641d.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/smdk2410.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/socrates.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/t4qds.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/vme8349.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_BAUDRATE	include/configs/x86-common.h	/^#define CONFIG_KGDB_BAUDRATE	/;"	d
CONFIG_KGDB_SER_INDEX	include/configs/T208xQDS.h	/^#define CONFIG_KGDB_SER_INDEX	/;"	d
CONFIG_KGDB_SER_INDEX	include/configs/T208xRDB.h	/^#define CONFIG_KGDB_SER_INDEX	/;"	d
CONFIG_KGDB_SER_INDEX	include/configs/UCP1020.h	/^#define CONFIG_KGDB_SER_INDEX	/;"	d
CONFIG_KILAUEA	include/configs/kilauea.h	/^#define CONFIG_KILAUEA	/;"	d
CONFIG_KIRKWOOD	arch/arm/Kconfig	/^config KIRKWOOD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_KIRKWOOD_EGIGA_INIT	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_KIRKWOOD_EGIGA_INIT	/;"	d
CONFIG_KIRKWOOD_GPIO	include/configs/dns325.h	/^#define CONFIG_KIRKWOOD_GPIO$/;"	d
CONFIG_KIRKWOOD_GPIO	include/configs/km/km_arm.h	/^#define	CONFIG_KIRKWOOD_GPIO	/;"	d
CONFIG_KIRKWOOD_GPIO	include/configs/lacie_kw.h	/^#define CONFIG_KIRKWOOD_GPIO$/;"	d
CONFIG_KIRKWOOD_GPIO	include/configs/lsxl.h	/^#define CONFIG_KIRKWOOD_GPIO$/;"	d
CONFIG_KIRKWOOD_GPIO	include/configs/nas220.h	/^#define CONFIG_KIRKWOOD_GPIO$/;"	d
CONFIG_KIRKWOOD_MODULE	arch/arm/Kconfig	/^config KIRKWOOD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_KIRKWOOD_PCIE_INIT	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_KIRKWOOD_PCIE_INIT /;"	d
CONFIG_KIRKWOOD_RGMII_PAD_1V8	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/;"	d
CONFIG_KIRKWOOD_SPI	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_KIRKWOOD_SPI	/;"	d
CONFIG_KIRKWOOD_SPI	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_KIRKWOOD_SPI$/;"	d
CONFIG_KIRKWOOD_SPI	include/configs/dreamplug.h	/^#define CONFIG_KIRKWOOD_SPI	/;"	d
CONFIG_KIRKWOOD_SPI	include/configs/ds109.h	/^#define CONFIG_KIRKWOOD_SPI	/;"	d
CONFIG_KIRKWOOD_SPI	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_KIRKWOOD_SPI$/;"	d
CONFIG_KIRQ_EN	include/i8042.h	/^#define CONFIG_KIRQ_EN	/;"	d
CONFIG_KM8321	include/configs/km/km8321-common.h	/^#define CONFIG_KM8321	/;"	d
CONFIG_KMP204X	include/configs/kmp204x.h	/^#define CONFIG_KMP204X$/;"	d
CONFIG_KM_82XX	include/configs/km82xx.h	/^#define CONFIG_KM_82XX$/;"	d
CONFIG_KM_BOARD_EXTRA_ENV	include/configs/km/km_arm.h	/^#define CONFIG_KM_BOARD_EXTRA_ENV /;"	d
CONFIG_KM_BOARD_EXTRA_ENV	include/configs/km82xx.h	/^#define CONFIG_KM_BOARD_EXTRA_ENV	/;"	d
CONFIG_KM_BOARD_EXTRA_ENV	include/configs/km_kirkwood.h	/^#define CONFIG_KM_BOARD_EXTRA_ENV	/;"	d
CONFIG_KM_BOARD_NAME	include/configs/km8360.h	/^#define CONFIG_KM_BOARD_NAME	/;"	d
CONFIG_KM_BOARD_NAME	include/configs/km8360.h	/^#define CONFIG_KM_BOARD_NAME /;"	d
CONFIG_KM_BOARD_NAME	include/configs/kmp204x.h	/^#define CONFIG_KM_BOARD_NAME	/;"	d
CONFIG_KM_BOARD_NAME	include/configs/suvd3.h	/^#define CONFIG_KM_BOARD_NAME /;"	d
CONFIG_KM_BOARD_NAME	include/configs/tuxx1.h	/^#define CONFIG_KM_BOARD_NAME	/;"	d
CONFIG_KM_BOARD_NAME	include/configs/tuxx1.h	/^#define CONFIG_KM_BOARD_NAME /;"	d
CONFIG_KM_COMMON_ETH_INIT	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_COMMON_ETH_INIT$/;"	d
CONFIG_KM_COMMON_ETH_INIT	include/configs/km/km_arm.h	/^#define CONFIG_KM_COMMON_ETH_INIT /;"	d
CONFIG_KM_CONSOLE_TTY	include/configs/km/km83xx-common.h	/^#define CONFIG_KM_CONSOLE_TTY	/;"	d
CONFIG_KM_CONSOLE_TTY	include/configs/km/km_arm.h	/^#define CONFIG_KM_CONSOLE_TTY	/;"	d
CONFIG_KM_CONSOLE_TTY	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_CONSOLE_TTY	/;"	d
CONFIG_KM_CONSOLE_TTY	include/configs/km82xx.h	/^#define CONFIG_KM_CONSOLE_TTY	/;"	d
CONFIG_KM_CRAMFS_ADDR	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_CRAMFS_ADDR	/;"	d
CONFIG_KM_CRAMFS_ADDR	include/configs/km/km_arm.h	/^#define CONFIG_KM_CRAMFS_ADDR	/;"	d
CONFIG_KM_CRAMFS_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_CRAMFS_ADDR	/;"	d
CONFIG_KM_DEF_ARCH	include/configs/km/km8309-common.h	/^#define CONFIG_KM_DEF_ARCH	/;"	d
CONFIG_KM_DEF_ARCH	include/configs/km/km8321-common.h	/^#define CONFIG_KM_DEF_ARCH	/;"	d
CONFIG_KM_DEF_ARCH	include/configs/km/km83xx-common.h	/^#define CONFIG_KM_DEF_ARCH	/;"	d
CONFIG_KM_DEF_ARCH	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_DEF_ARCH	/;"	d
CONFIG_KM_DEF_BOOT_ARGS_CPU	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_DEF_BOOT_ARGS_CPU	/;"	d
CONFIG_KM_DEF_BOOT_ARGS_CPU	include/configs/km/km_arm.h	/^#define CONFIG_KM_DEF_BOOT_ARGS_CPU	/;"	d
CONFIG_KM_DEF_BOOT_ARGS_CPU	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_DEF_BOOT_ARGS_CPU	/;"	d
CONFIG_KM_DEF_ENV	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_ENV	/;"	d
CONFIG_KM_DEF_ENV	include/configs/km/km83xx-common.h	/^#define CONFIG_KM_DEF_ENV /;"	d
CONFIG_KM_DEF_ENV	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_DEF_ENV /;"	d
CONFIG_KM_DEF_ENV_BOOTARGS	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_ENV_BOOTARGS	/;"	d
CONFIG_KM_DEF_ENV_BOOTPARAMS	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_ENV_BOOTPARAMS /;"	d
CONFIG_KM_DEF_ENV_BOOTTARGETS	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_ENV_BOOTTARGETS	/;"	d
CONFIG_KM_DEF_ENV_CONSTANTS	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_ENV_CONSTANTS	/;"	d
CONFIG_KM_DEF_ENV_CPU	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_DEF_ENV_CPU	/;"	d
CONFIG_KM_DEF_ENV_CPU	include/configs/km/km_arm.h	/^#define CONFIG_KM_DEF_ENV_CPU	/;"	d
CONFIG_KM_DEF_ENV_CPU	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_DEF_ENV_CPU	/;"	d
CONFIG_KM_DEF_ENV_FLASH_BOOT	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_ENV_FLASH_BOOT	/;"	d
CONFIG_KM_DEF_NETDEV	include/configs/km/keymile-common.h	/^#define CONFIG_KM_DEF_NETDEV	/;"	d
CONFIG_KM_DEF_NETDEV	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_DEF_NETDEV	/;"	d
CONFIG_KM_DEF_NETDEV	include/configs/km8360.h	/^#define CONFIG_KM_DEF_NETDEV	/;"	d
CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI	include/configs/km/keymile-common.h	/^# define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI	/;"	d
CONFIG_KM_DISABLE_PCIE	include/configs/km_kirkwood.h	/^#define CONFIG_KM_DISABLE_PCIE$/;"	d
CONFIG_KM_ECC_MODE	include/configs/km/keymile-common.h	/^#define CONFIG_KM_ECC_MODE /;"	d
CONFIG_KM_ECC_MODE	include/configs/km/keymile-common.h	/^#define CONFIG_KM_ECC_MODE$/;"	d
CONFIG_KM_ENV_IS_IN_SPI_NOR	include/configs/km_kirkwood.h	/^#define CONFIG_KM_ENV_IS_IN_SPI_NOR$/;"	d
CONFIG_KM_FDT_ADDR	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_FDT_ADDR	/;"	d
CONFIG_KM_FDT_ADDR	include/configs/km/km_arm.h	/^#define CONFIG_KM_FDT_ADDR	/;"	d
CONFIG_KM_FDT_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_FDT_ADDR	/;"	d
CONFIG_KM_FPGA_CONFIG	include/configs/km_kirkwood.h	/^#define CONFIG_KM_FPGA_CONFIG$/;"	d
CONFIG_KM_I2C_ABORT	include/configs/km82xx.h	/^#define CONFIG_KM_I2C_ABORT$/;"	d
CONFIG_KM_IVM_BUS	include/configs/km/km83xx-common.h	/^#define CONFIG_KM_IVM_BUS	/;"	d
CONFIG_KM_IVM_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_IVM_BUS	/;"	d
CONFIG_KM_IVM_BUS	include/configs/km82xx.h	/^#define CONFIG_KM_IVM_BUS	/;"	d
CONFIG_KM_IVM_BUS	include/configs/km_kirkwood.h	/^#define CONFIG_KM_IVM_BUS	/;"	d
CONFIG_KM_KERNEL_ADDR	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_KERNEL_ADDR	/;"	d
CONFIG_KM_KERNEL_ADDR	include/configs/km/km_arm.h	/^#define CONFIG_KM_KERNEL_ADDR	/;"	d
CONFIG_KM_KERNEL_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_KERNEL_ADDR	/;"	d
CONFIG_KM_MVEXTSW_ADDR	include/configs/km_kirkwood.h	/^#define CONFIG_KM_MVEXTSW_ADDR	/;"	d
CONFIG_KM_MVEXTSW_ADDR	include/configs/suvd3.h	/^#define CONFIG_KM_MVEXTSW_ADDR	/;"	d
CONFIG_KM_NEW_ENV	include/configs/km/km_arm.h	/^#define CONFIG_KM_NEW_ENV	/;"	d
CONFIG_KM_NEW_ENV	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_NEW_ENV	/;"	d
CONFIG_KM_PHRAM	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_PHRAM	/;"	d
CONFIG_KM_PHRAM	include/configs/km/km_arm.h	/^#define CONFIG_KM_PHRAM	/;"	d
CONFIG_KM_PHRAM	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_PHRAM	/;"	d
CONFIG_KM_PIGGY4_88E6061	include/configs/km_kirkwood.h	/^#define CONFIG_KM_PIGGY4_88E6061$/;"	d
CONFIG_KM_PIGGY4_88E6352	include/configs/km_kirkwood.h	/^#define CONFIG_KM_PIGGY4_88E6352$/;"	d
CONFIG_KM_PNVRAM	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_PNVRAM	/;"	d
CONFIG_KM_PNVRAM	include/configs/km/km_arm.h	/^#define CONFIG_KM_PNVRAM	/;"	d
CONFIG_KM_PNVRAM	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_PNVRAM	/;"	d
CONFIG_KM_RESERVED_PRAM	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_RESERVED_PRAM	/;"	d
CONFIG_KM_RESERVED_PRAM	include/configs/km/km_arm.h	/^#define CONFIG_KM_RESERVED_PRAM /;"	d
CONFIG_KM_RESERVED_PRAM	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_RESERVED_PRAM	/;"	d
CONFIG_KM_ROOTFSSIZE	include/configs/km/km-powerpc.h	/^#define CONFIG_KM_ROOTFSSIZE	/;"	d
CONFIG_KM_ROOTFSSIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_ROOTFSSIZE	/;"	d
CONFIG_KM_UBI_LINUX_MTD	include/configs/km/keymile-common.h	/^# define CONFIG_KM_UBI_LINUX_MTD	/;"	d
CONFIG_KM_UBI_PARTITION_NAME_APP	include/configs/km8360.h	/^#define CONFIG_KM_UBI_PARTITION_NAME_APP	/;"	d
CONFIG_KM_UBI_PARTITION_NAME_APP	include/configs/suvd3.h	/^#define CONFIG_KM_UBI_PARTITION_NAME_APP	/;"	d
CONFIG_KM_UBI_PARTITION_NAME_BOOT	include/configs/km/keymile-common.h	/^#define CONFIG_KM_UBI_PARTITION_NAME_BOOT	/;"	d
CONFIG_KM_UBI_PARTITION_NAME_BOOT	include/configs/km8360.h	/^#define CONFIG_KM_UBI_PARTITION_NAME_BOOT	/;"	d
CONFIG_KM_UBI_PARTITION_NAME_BOOT	include/configs/suvd3.h	/^#define CONFIG_KM_UBI_PARTITION_NAME_BOOT	/;"	d
CONFIG_KM_UBI_PART_BOOT_OPTS	include/configs/km/keymile-common.h	/^#define CONFIG_KM_UBI_PART_BOOT_OPTS	/;"	d
CONFIG_KM_UBI_PART_BOOT_OPTS	include/configs/km/kmp204x-common.h	/^#define CONFIG_KM_UBI_PART_BOOT_OPTS	/;"	d
CONFIG_KM_UBI_PART_BOOT_OPTS	include/configs/km_kirkwood.h	/^#define CONFIG_KM_UBI_PART_BOOT_OPTS	/;"	d
CONFIG_KM_UIMAGE_NAME	include/configs/km/keymile-common.h	/^#define CONFIG_KM_UIMAGE_NAME /;"	d
CONFIG_KM_UPDATE_UBOOT	include/configs/km/km_arm.h	/^#define	CONFIG_KM_UPDATE_UBOOT	/;"	d
CONFIG_KONA	include/configs/bcm23550_w1d.h	/^#define CONFIG_KONA$/;"	d
CONFIG_KONA	include/configs/bcm28155_ap.h	/^#define CONFIG_KONA$/;"	d
CONFIG_KONA_GPIO	include/configs/bcm23550_w1d.h	/^#define CONFIG_KONA_GPIO$/;"	d
CONFIG_KONA_GPIO	include/configs/bcm28155_ap.h	/^#define CONFIG_KONA_GPIO$/;"	d
CONFIG_KONA_RESET_S	include/configs/bcm23550_w1d.h	/^#define CONFIG_KONA_RESET_S$/;"	d
CONFIG_KONA_SDHCI	include/configs/bcm23550_w1d.h	/^#define CONFIG_KONA_SDHCI$/;"	d
CONFIG_KONA_SDHCI	include/configs/bcm28155_ap.h	/^#define CONFIG_KONA_SDHCI$/;"	d
CONFIG_KS8851_MLL	include/configs/at91sam9n12ek.h	/^#define CONFIG_KS8851_MLL$/;"	d
CONFIG_KS8851_MLL_BASEADDR	include/configs/at91sam9n12ek.h	/^#define CONFIG_KS8851_MLL_BASEADDR	/;"	d
CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_RX_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM	/;"	d
CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM	/;"	d
CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_TX_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE	/;"	d
CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM	/;"	d
CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE	/;"	d
CONFIG_KSNAV_PKTDMA_NETCP	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_PKTDMA_NETCP$/;"	d
CONFIG_KSNAV_QM_BASE_ADDRESS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_BASE_ADDRESS	/;"	d
CONFIG_KSNAV_QM_CONF_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_CONF_BASE	/;"	d
CONFIG_KSNAV_QM_DESC_SETUP_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_DESC_SETUP_BASE	/;"	d
CONFIG_KSNAV_QM_INTD_CONF_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_INTD_CONF_BASE	/;"	d
CONFIG_KSNAV_QM_LINK_RAM_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_LINK_RAM_BASE	/;"	d
CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE	/;"	d
CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE	/;"	d
CONFIG_KSNAV_QM_PDSP1_CMD_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE	/;"	d
CONFIG_KSNAV_QM_PDSP1_CTRL_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE	/;"	d
CONFIG_KSNAV_QM_PDSP1_IRAM_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE	/;"	d
CONFIG_KSNAV_QM_QPOOL_NUM	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_QPOOL_NUM	/;"	d
CONFIG_KSNAV_QM_QUEUE_STATUS_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE	/;"	d
CONFIG_KSNAV_QM_REGION_NUM	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_REGION_NUM	/;"	d
CONFIG_KSNAV_QM_STATUS_RAM_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNAV_QM_STATUS_RAM_BASE	/;"	d
CONFIG_KSNET_CPSW_NUM_PORTS	include/configs/k2e_evm.h	/^#define CONFIG_KSNET_CPSW_NUM_PORTS	/;"	d
CONFIG_KSNET_CPSW_NUM_PORTS	include/configs/k2g_evm.h	/^#define CONFIG_KSNET_CPSW_NUM_PORTS	/;"	d
CONFIG_KSNET_CPSW_NUM_PORTS	include/configs/k2hk_evm.h	/^#define CONFIG_KSNET_CPSW_NUM_PORTS	/;"	d
CONFIG_KSNET_CPSW_NUM_PORTS	include/configs/k2l_evm.h	/^#define CONFIG_KSNET_CPSW_NUM_PORTS	/;"	d
CONFIG_KSNET_MAC_ID_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNET_MAC_ID_BASE	/;"	d
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE	include/configs/k2e_evm.h	/^#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE$/;"	d
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE	include/configs/k2g_evm.h	/^#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE$/;"	d
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE	include/configs/k2l_evm.h	/^#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE$/;"	d
CONFIG_KSNET_NETCP_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNET_NETCP_BASE	/;"	d
CONFIG_KSNET_NETCP_V1_0	include/configs/k2hk_evm.h	/^#define CONFIG_KSNET_NETCP_V1_0$/;"	d
CONFIG_KSNET_NETCP_V1_5	include/configs/k2e_evm.h	/^#define CONFIG_KSNET_NETCP_V1_5$/;"	d
CONFIG_KSNET_NETCP_V1_5	include/configs/k2g_evm.h	/^#define CONFIG_KSNET_NETCP_V1_5$/;"	d
CONFIG_KSNET_NETCP_V1_5	include/configs/k2l_evm.h	/^#define CONFIG_KSNET_NETCP_V1_5$/;"	d
CONFIG_KSNET_SERDES_LANES_PER_SGMII	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNET_SERDES_LANES_PER_SGMII	/;"	d
CONFIG_KSNET_SERDES_SGMII2_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNET_SERDES_SGMII2_BASE	/;"	d
CONFIG_KSNET_SERDES_SGMII_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_KSNET_SERDES_SGMII_BASE	/;"	d
CONFIG_KW88F6192	include/configs/lacie_kw.h	/^#define CONFIG_KW88F6192$/;"	d
CONFIG_KW88F6192	include/configs/nas220.h	/^#define CONFIG_KW88F6192	/;"	d
CONFIG_KW88F6192	include/configs/nsa310s.h	/^#define CONFIG_KW88F6192	/;"	d
CONFIG_KW88F6281	include/configs/dns325.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/dockstar.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/goflexhome.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/ib62x0.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/iconnect.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/km/km_arm.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/lacie_kw.h	/^#define CONFIG_KW88F6281$/;"	d
CONFIG_KW88F6281	include/configs/lsxl.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/mv-plug-common.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/openrd.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6281	include/configs/pogo_e02.h	/^#define CONFIG_KW88F6281	/;"	d
CONFIG_KW88F6702	include/configs/nsa310s.h	/^#define CONFIG_KW88F6702	/;"	d
CONFIG_KZM_A9_GT	include/configs/kzm9g.h	/^#define CONFIG_KZM_A9_GT$/;"	d
CONFIG_L1_INIT_RAM	include/configs/B4860QDS.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/P2041RDB.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T102xQDS.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T102xRDB.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T1040QDS.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T104xRDB.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T208xQDS.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T208xRDB.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/T4240RDB.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/corenet_ds.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/cyrus.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/km/kmp204x-common.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L1_INIT_RAM	include/configs/t4qds.h	/^#define CONFIG_L1_INIT_RAM$/;"	d
CONFIG_L2_CACHE	include/configs/BSC9131RDB.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/BSC9132QDS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/C29XPCIE.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8536DS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8540ADS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8541CDS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8544DS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8548CDS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8555CDS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8560ADS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8568MDS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8569MDS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/MPC8572DS.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/P1010RDB.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/P1022DS.h	/^#define CONFIG_L2_CACHE$/;"	d
CONFIG_L2_CACHE	include/configs/P1023RDB.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/UCP1020.h	/^#define CONFIG_L2_CACHE$/;"	d
CONFIG_L2_CACHE	include/configs/controlcenterd.h	/^#define CONFIG_L2_CACHE$/;"	d
CONFIG_L2_CACHE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_L2_CACHE$/;"	d
CONFIG_L2_CACHE	include/configs/p1_twr.h	/^#define CONFIG_L2_CACHE$/;"	d
CONFIG_L2_CACHE	include/configs/sbc8548.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/socrates.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/xpedite520x.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/xpedite537x.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_L2_CACHE	include/configs/xpedite550x.h	/^#define CONFIG_L2_CACHE	/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/MIP405.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/PATI.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/PIP405.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/TQM5200.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/UCP1020.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/cm5200.h	/^#define CONFIG_LAST_STAGE_INIT	/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/controlcenterd.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/dlvision-10g.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/hrcon.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/io.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/io64.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/iocon.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/km/km-powerpc.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/km/kmp204x-common.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/neo.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/qemu-ppce500.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/strider.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAST_STAGE_INIT	include/configs/x86-common.h	/^#define CONFIG_LAST_STAGE_INIT$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1012a_common.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1021aqds.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1021atwr.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1043aqds.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1043ardb.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1046aqds.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LAYERSCAPE_NS_ACCESS	include/configs/ls1046ardb.h	/^#define CONFIG_LAYERSCAPE_NS_ACCESS$/;"	d
CONFIG_LBA48	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/MPC8315ERDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/MPC8349ITX.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/MPC837XEMDS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/MPC837XERDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/MPC8536DS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/P1010RDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/P1022DS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/P2041RDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/P4080DS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T102xQDS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T1040QDS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T104xRDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T208xQDS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T208xRDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T4240QDS.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/T4240RDB.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/UCP1020.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/advantech_dms-ba16.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/bf548-ezkit.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/cgtqmx6eval.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/cm_fx6.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/controlcenterd.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/corenet_ds.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/cyrus.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/db-mv784mp-gp.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/digsy_mtc.h	/^#define CONFIG_LBA48	/;"	d
CONFIG_LBA48	include/configs/edminiv2.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/ge_bx50v3.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/gw_ventana.h	/^  #define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/m53evk.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/mx53loco.h	/^	#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/nitrogen6x.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/novena.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/ot1200.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/p1_twr.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/qemu-ppce500.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/t4qds.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/tbs2910.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/theadorable.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/udoo.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/wandboard.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LBA48	include/configs/x86-common.h	/^#define CONFIG_LBA48$/;"	d
CONFIG_LCD	drivers/video/Kconfig	/^config LCD$/;"	c	menu:Graphics support
CONFIG_LCD_ALIGNMENT	common/lcd.c	/^#define CONFIG_LCD_ALIGNMENT /;"	d	file:
CONFIG_LCD_ALIGNMENT	include/configs/nyan-big.h	/^#define CONFIG_LCD_ALIGNMENT	/;"	d
CONFIG_LCD_ALIGNMENT	include/configs/tegra20-common.h	/^#define CONFIG_LCD_ALIGNMENT	/;"	d
CONFIG_LCD_BMP_RLE8	include/configs/sandbox.h	/^#define CONFIG_LCD_BMP_RLE8$/;"	d
CONFIG_LCD_DT_SIMPLEFB	include/configs/brppt1.h	/^#define CONFIG_LCD_DT_SIMPLEFB$/;"	d
CONFIG_LCD_DT_SIMPLEFB	include/configs/rpi.h	/^#define CONFIG_LCD_DT_SIMPLEFB$/;"	d
CONFIG_LCD_INFO	drivers/video/mpc8xx_lcd.c	/^#define CONFIG_LCD_INFO	/;"	d	file:
CONFIG_LCD_INFO	include/configs/TQM823L.h	/^#define CONFIG_LCD_INFO	/;"	d
CONFIG_LCD_INFO	include/configs/at91sam9261ek.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/at91sam9263ek.h	/^#define CONFIG_LCD_INFO	/;"	d
CONFIG_LCD_INFO	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/at91sam9n12ek.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/at91sam9rlek.h	/^#define CONFIG_LCD_INFO	/;"	d
CONFIG_LCD_INFO	include/configs/at91sam9x5ek.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/picosam9g45.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/pm9261.h	/^#define CONFIG_LCD_INFO	/;"	d
CONFIG_LCD_INFO	include/configs/pm9263.h	/^#define CONFIG_LCD_INFO	/;"	d
CONFIG_LCD_INFO	include/configs/sama5d2_xplained.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/sama5d3xek.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/sama5d4_xplained.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO	include/configs/sama5d4ek.h	/^#define CONFIG_LCD_INFO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	drivers/video/mpc8xx_lcd.c	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d	file:
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/at91sam9261ek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/at91sam9263ek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO	/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/at91sam9n12ek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/at91sam9rlek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO	/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/at91sam9x5ek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/picosam9g45.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/pm9261.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO	/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/pm9263.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO	/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/sama5d2_xplained.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/sama5d3xek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/sama5d4_xplained.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_INFO_BELOW_LOGO	include/configs/sama5d4ek.h	/^#define CONFIG_LCD_INFO_BELOW_LOGO$/;"	d
CONFIG_LCD_IN_PSRAM	include/configs/pm9263.h	/^#define CONFIG_LCD_IN_PSRAM	/;"	d
CONFIG_LCD_LOGO	include/configs/M52277EVB.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/TQM823L.h	/^#define CONFIG_LCD_LOGO	/;"	d
CONFIG_LCD_LOGO	include/configs/at91sam9261ek.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/at91sam9263ek.h	/^#define CONFIG_LCD_LOGO	/;"	d
CONFIG_LCD_LOGO	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/at91sam9n12ek.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/at91sam9rlek.h	/^#define CONFIG_LCD_LOGO	/;"	d
CONFIG_LCD_LOGO	include/configs/at91sam9x5ek.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/colibri_pxa270.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/colibri_t20.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/picosam9g45.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/pm9261.h	/^#define CONFIG_LCD_LOGO	/;"	d
CONFIG_LCD_LOGO	include/configs/pm9263.h	/^#define CONFIG_LCD_LOGO	/;"	d
CONFIG_LCD_LOGO	include/configs/sama5d2_xplained.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/sama5d3xek.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/sama5d4_xplained.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	include/configs/sama5d4ek.h	/^#define CONFIG_LCD_LOGO$/;"	d
CONFIG_LCD_LOGO	tools/Makefile	/^CONFIG_LCD_LOGO = y$/;"	m
CONFIG_LCD_MENU	include/configs/s5pc210_universal.h	/^#define CONFIG_LCD_MENU$/;"	d
CONFIG_LCD_MENU	include/configs/trats.h	/^#define CONFIG_LCD_MENU$/;"	d
CONFIG_LCD_MENU	include/configs/trats2.h	/^#define CONFIG_LCD_MENU$/;"	d
CONFIG_LCD_MENU_BOARD	include/configs/s5pc210_universal.h	/^#define CONFIG_LCD_MENU_BOARD$/;"	d
CONFIG_LCD_MENU_BOARD	include/configs/trats.h	/^#define CONFIG_LCD_MENU_BOARD$/;"	d
CONFIG_LCD_MENU_BOARD	include/configs/trats2.h	/^#define CONFIG_LCD_MENU_BOARD$/;"	d
CONFIG_LCD_MODULE	drivers/video/Kconfig	/^config LCD$/;"	c	menu:Graphics support
CONFIG_LCD_NOSTDOUT	include/configs/brxre1.h	/^#define CONFIG_LCD_NOSTDOUT$/;"	d
CONFIG_LCD_ROTATION	include/configs/brppt1.h	/^#define CONFIG_LCD_ROTATION$/;"	d
CONFIG_LCD_ROTATION	include/configs/zipitz2.h	/^#define	CONFIG_LCD_ROTATION$/;"	d
CONFIG_LD9040	include/configs/s5pc210_universal.h	/^#define CONFIG_LD9040$/;"	d
CONFIG_LED	drivers/led/Kconfig	/^config LED$/;"	c	menu:LED Support
CONFIG_LED_GPIO	drivers/led/Kconfig	/^config LED_GPIO$/;"	c	menu:LED Support
CONFIG_LED_GPIO_MODULE	drivers/led/Kconfig	/^config LED_GPIO$/;"	c	menu:LED Support
CONFIG_LED_MODULE	drivers/led/Kconfig	/^config LED$/;"	c	menu:LED Support
CONFIG_LEGACY_BOOTCMD_ENV	include/configs/pic32mzdask.h	/^#define CONFIG_LEGACY_BOOTCMD_ENV	/;"	d
CONFIG_LEON	arch/sparc/Kconfig	/^config LEON$/;"	c	menu:SPARC architecture
CONFIG_LEON2	arch/sparc/Kconfig	/^config LEON2$/;"	c	menu:SPARC architecture
CONFIG_LEON2_MODULE	arch/sparc/Kconfig	/^config LEON2$/;"	c	menu:SPARC architecture
CONFIG_LEON3	arch/sparc/Kconfig	/^config LEON3$/;"	c	menu:SPARC architecture
CONFIG_LEON3_MODULE	arch/sparc/Kconfig	/^config LEON3$/;"	c	menu:SPARC architecture
CONFIG_LEON_MODULE	arch/sparc/Kconfig	/^config LEON$/;"	c	menu:SPARC architecture
CONFIG_LEON_RAM_SDRAM	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_LEON_RAM_SDRAM /;"	d
CONFIG_LEON_RAM_SDRAM_NOSRAM	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_LEON_RAM_SDRAM_NOSRAM /;"	d
CONFIG_LEON_RAM_SELECT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_LEON_RAM_SELECT /;"	d
CONFIG_LEON_RAM_SRAM	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_LEON_RAM_SRAM /;"	d
CONFIG_LG4573	include/configs/aristainetos2.h	/^#define CONFIG_LG4573$/;"	d
CONFIG_LG4573	include/configs/aristainetos2b.h	/^#define CONFIG_LG4573$/;"	d
CONFIG_LG4573_BUS	include/configs/aristainetos2.h	/^#define CONFIG_LG4573_BUS /;"	d
CONFIG_LG4573_BUS	include/configs/aristainetos2b.h	/^#define CONFIG_LG4573_BUS /;"	d
CONFIG_LG4573_CS	include/configs/aristainetos2.h	/^#define CONFIG_LG4573_CS /;"	d
CONFIG_LG4573_CS	include/configs/aristainetos2b.h	/^#define CONFIG_LG4573_CS /;"	d
CONFIG_LIBATA	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8315ERDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8349ITX.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC837XEMDS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC837XERDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8536DS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8544DS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8572DS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8610HPCD.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/MPC8641HPCN.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/P1010RDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/P1022DS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/P2041RDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/P4080DS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T102xQDS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T1040QDS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T104xRDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T208xQDS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T208xRDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T4240QDS.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/T4240RDB.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/UCP1020.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/advantech_dms-ba16.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/am57xx_evm.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/bf548-ezkit.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/canyonlands.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/cgtqmx6eval.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/cm_fx6.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/cm_t54.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/controlcenterd.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/corenet_ds.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/cyrus.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/db-88f6820-gp.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/db-mv784mp-gp.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/dra7xx_evm.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ge_bx50v3.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/gw_ventana.h	/^  #define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/highbank.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls1012aqds.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls1012ardb.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls1043aqds.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls1043ardb.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls1046aqds.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls1046ardb.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls2080aqds.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ls2080ardb.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/m53evk.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/mx53loco.h	/^	#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/nitrogen6x.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/novena.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/omap5_uevm.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/ot1200.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/p1_twr.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/sunxi-common.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/t4qds.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/tbs2910.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/theadorable.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/udoo.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/wandboard.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/x86-common.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIBATA	include/configs/xilinx_zynqmp.h	/^#define CONFIG_LIBATA$/;"	d
CONFIG_LIB_HW_RAND	include/configs/odroid.h	/^#define CONFIG_LIB_HW_RAND$/;"	d
CONFIG_LIB_HW_RAND	include/configs/trats.h	/^#define CONFIG_LIB_HW_RAND$/;"	d
CONFIG_LIB_HW_RAND	include/configs/trats2.h	/^#define CONFIG_LIB_HW_RAND$/;"	d
CONFIG_LIB_RAND	include/config_fallbacks.h	/^#define CONFIG_LIB_RAND$/;"	d
CONFIG_LIB_RAND	include/configs/ds414.h	/^#define CONFIG_LIB_RAND$/;"	d
CONFIG_LIB_RAND	include/configs/thunderx_88xx.h	/^#define CONFIG_LIB_RAND$/;"	d
CONFIG_LIB_RAND	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_LIB_RAND$/;"	d
CONFIG_LIB_RAND	lib/Kconfig	/^config LIB_RAND$/;"	c	menu:Library routines
CONFIG_LIB_RAND_MODULE	lib/Kconfig	/^config LIB_RAND$/;"	c	menu:Library routines
CONFIG_LIB_UUID	include/autoconf.mk	/^CONFIG_LIB_UUID=y$/;"	m
CONFIG_LIB_UUID	include/config_fallbacks.h	/^#define CONFIG_LIB_UUID$/;"	d
CONFIG_LINUX	include/configs/B4860QDS.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX	include/configs/T102xQDS.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX	include/configs/T102xRDB.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX	include/configs/T1040QDS.h	/^#define CONFIG_LINUX /;"	d
CONFIG_LINUX	include/configs/T104xRDB.h	/^#define CONFIG_LINUX /;"	d
CONFIG_LINUX	include/configs/T208xQDS.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX	include/configs/T208xRDB.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX	include/configs/T4240QDS.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX	include/configs/T4240RDB.h	/^#define CONFIG_LINUX	/;"	d
CONFIG_LINUX_CMDLINE_ADDR	arch/blackfin/include/asm/config.h	/^# define CONFIG_LINUX_CMDLINE_ADDR /;"	d
CONFIG_LINUX_CMDLINE_SIZE	arch/blackfin/include/asm/config.h	/^# define CONFIG_LINUX_CMDLINE_SIZE /;"	d
CONFIG_LINUX_RESET_VEC	include/configs/MPC8610HPCD.h	/^#define CONFIG_LINUX_RESET_VEC	/;"	d
CONFIG_LINUX_RESET_VEC	include/configs/MPC8641HPCN.h	/^#define CONFIG_LINUX_RESET_VEC	/;"	d
CONFIG_LINUX_RESET_VEC	include/configs/sbc8641d.h	/^#define CONFIG_LINUX_RESET_VEC /;"	d
CONFIG_LINUX_RESET_VEC	include/configs/xpedite517x.h	/^#define CONFIG_LINUX_RESET_VEC	/;"	d
CONFIG_LMB	arch/arc/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/arm/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/m68k/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/mips/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/powerpc/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/sparc/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/x86/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	arch/xtensa/include/asm/config.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	include/autoconf.mk	/^CONFIG_LMB=y$/;"	m
CONFIG_LMB	include/configs/10m50_devboard.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	include/configs/3c120_devboard.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	include/configs/microblaze-generic.h	/^#define CONFIG_LMB	/;"	d
CONFIG_LMB	include/configs/openrisc-generic.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	include/configs/sandbox.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	include/configs/x86-common.h	/^#define CONFIG_LMB$/;"	d
CONFIG_LMB	spl/include/autoconf.mk	/^CONFIG_LMB=y$/;"	m
CONFIG_LMS283GF05	include/configs/zipitz2.h	/^#define	CONFIG_LMS283GF05$/;"	d
CONFIG_LOADADDR	arch/blackfin/include/asm/config.h	/^# define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/10m50_devboard.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/3c120_devboard.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/B4860QDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/C29XPCIE.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8313ERDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8315ERDB.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8323ERDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8349EMDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8349ITX.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC837XEMDS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC837XERDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8536DS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8540ADS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8541CDS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8544DS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8548CDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8555CDS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8560ADS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/MPC8572DS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/MPC8641HPCN.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/P1010RDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/P1022DS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/P1023RDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/P2041RDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T102xQDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T102xRDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T1040QDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T104xRDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T208xQDS.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T208xRDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/T4240RDB.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/TQM834x.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/UCP1020.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ac14xx.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/apf27.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/apx4devkit.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/aria.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/axs10x.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/bct-brettl2.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/bg0900.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/br4.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/calimain.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/colibri_vf.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/controlcenterd.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/corenet_ds.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/cyrus.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/devkit3250.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ds414.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ethernut5.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/flea3.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/hrcon.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ids8313.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/imx27lite-common.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/lsxl.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/m28evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/m53evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ma5d4evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mecp5123.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mpc5121ads.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mpc8308_p1m.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mpr2.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ms7720se.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx23_olinuxino.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx23evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx25pdk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx28evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx31ads.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx35pdk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx51evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx53ard.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx53evk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx53loco.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx53smd.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx6_common.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/mx7_common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/nsim.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/nyan-big.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/openrisc-generic.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/p1_twr.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/pcm052.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/pdm360ng.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/pr1.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/qemu-ppce500.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/rpi.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/rsk7203.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/s32v234evb.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/sansa_fuze_plus.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/sbc8349.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/sbc8548.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/sbc8641d.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/sc_sps_1.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_is1.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_mcvevk.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_sockit.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_socrates.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_sr1500.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/socrates.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/stm32f429-discovery.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/stm32f746-disco.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/strider.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/t4qds.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/tb100.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/tegra114-common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/tegra124-common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/tegra186-common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/tegra20-common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/tegra210-common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/tegra30-common.h	/^#define CONFIG_LOADADDR /;"	d
CONFIG_LOADADDR	include/configs/tplink_wdr4300.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/tricorder.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/ts4800.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/uniphier.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/usbarmory.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/vme8349.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/woodburn_common.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/work_92105.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/x86-common.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/xfi3.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/xpedite517x.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/xpedite520x.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/xpedite537x.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADADDR	include/configs/xpedite550x.h	/^#define CONFIG_LOADADDR	/;"	d
CONFIG_LOADCMD	include/configs/advantech_dms-ba16.h	/^#define CONFIG_LOADCMD /;"	d
CONFIG_LOADS_ECHO	include/configs/B4860QDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/BSC9131RDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/BSC9132QDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/C29XPCIE.h	/^#define CONFIG_LOADS_ECHO$/;"	d
CONFIG_LOADS_ECHO	include/configs/CPCI2DP.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/CPCI4052.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MIP405.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8308RDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8313ERDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8315ERDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8323ERDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC832XEMDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8349EMDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8349ITX.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC837XEMDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC837XERDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8536DS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8540ADS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8541CDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8544DS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8548CDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8555CDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8560ADS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8568MDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8569MDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8572DS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8610HPCD.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/MPC8641HPCN.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/P1010RDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/P1022DS.h	/^#define CONFIG_LOADS_ECHO$/;"	d
CONFIG_LOADS_ECHO	include/configs/P1023RDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/P2041RDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/PATI.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/PIP405.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/PMC440.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/T102xQDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/T102xRDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/T1040QDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/T104xRDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/T208xQDS.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/T4240RDB.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM823L.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM823M.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM834x.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM850L.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM850M.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM855L.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM855M.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM860L.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM860M.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM862L.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM862M.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM866M.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/TQM885D.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/UCP1020.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/ac14xx.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/amcc-common.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/aria.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/bf537-minotaur.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/bf537-srv1.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/bfin_adi_common.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/blackstamp.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/blackvme.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/controlcenterd.h	/^#define CONFIG_LOADS_ECHO$/;"	d
CONFIG_LOADS_ECHO	include/configs/corenet_ds.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/cyrus.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/hrcon.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/ids8313.h	/^#define CONFIG_LOADS_ECHO$/;"	d
CONFIG_LOADS_ECHO	include/configs/km/keymile-common.h	/^#define CONFIG_LOADS_ECHO$/;"	d
CONFIG_LOADS_ECHO	include/configs/km/kmp204x-common.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/lwmon5.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/mecp5123.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/mpc5121ads.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/mpc8308_p1m.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/p1_twr.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/pdm360ng.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/qemu-ppce500.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/sbc8349.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/sbc8548.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/sbc8641d.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/socrates.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/strider.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/t4qds.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/ve8313.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/vme8349.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/xilinx-ppc.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/xpedite1000.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/xpedite517x.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/xpedite520x.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/xpedite537x.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOADS_ECHO	include/configs/xpedite550x.h	/^#define CONFIG_LOADS_ECHO	/;"	d
CONFIG_LOCALVERSION	Kconfig	/^config LOCALVERSION$/;"	c	menu:General setup
CONFIG_LOCALVERSION	include/config/auto.conf	/^CONFIG_LOCALVERSION=""$/;"	k
CONFIG_LOCALVERSION	include/generated/autoconf.h	/^#define CONFIG_LOCALVERSION /;"	d
CONFIG_LOCALVERSION_AUTO	Kconfig	/^config LOCALVERSION_AUTO$/;"	c	menu:General setup
CONFIG_LOCALVERSION_AUTO	include/config/auto.conf	/^CONFIG_LOCALVERSION_AUTO=y$/;"	k
CONFIG_LOCALVERSION_AUTO	include/generated/autoconf.h	/^#define CONFIG_LOCALVERSION_AUTO /;"	d
CONFIG_LOCALVERSION_AUTO_MODULE	Kconfig	/^config LOCALVERSION_AUTO$/;"	c	menu:General setup
CONFIG_LOCALVERSION_MODULE	Kconfig	/^config LOCALVERSION$/;"	c	menu:General setup
CONFIG_LOGBUFFER	include/configs/PMC440.h	/^#define CONFIG_LOGBUFFER$/;"	d
CONFIG_LOGBUFFER	include/configs/io64.h	/^#define CONFIG_LOGBUFFER$/;"	d
CONFIG_LOGBUFFER	include/configs/kilauea.h	/^#define CONFIG_LOGBUFFER$/;"	d
CONFIG_LOGBUFFER	include/configs/lwmon5.h	/^#define CONFIG_LOGBUFFER$/;"	d
CONFIG_LOGBUFFER	include/configs/makalu.h	/^#define CONFIG_LOGBUFFER$/;"	d
CONFIG_LOGBUFFER	include/configs/sequoia.h	/^#define CONFIG_LOGBUFFER$/;"	d
CONFIG_LOOPW	cmd/Kconfig	/^config LOOPW$/;"	c	menu:Command line interface""Memory commands
CONFIG_LOOPW_MODULE	cmd/Kconfig	/^config LOOPW$/;"	c	menu:Command line interface""Memory commands
CONFIG_LOWPOWER_ADDR	include/configs/exynos5420-common.h	/^#define CONFIG_LOWPOWER_ADDR	/;"	d
CONFIG_LOWPOWER_FLAG	include/configs/exynos5420-common.h	/^#define CONFIG_LOWPOWER_FLAG	/;"	d
CONFIG_LPC32XX_ETH	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_ETH$/;"	d
CONFIG_LPC32XX_ETH	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_ETH$/;"	d
CONFIG_LPC32XX_ETH_BUFS_BASE	drivers/net/lpc32xx_eth.c	/^#define CONFIG_LPC32XX_ETH_BUFS_BASE /;"	d	file:
CONFIG_LPC32XX_GPIO	drivers/gpio/Kconfig	/^config LPC32XX_GPIO$/;"	c	menu:GPIO Support
CONFIG_LPC32XX_GPIO	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_GPIO$/;"	d
CONFIG_LPC32XX_GPIO	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_GPIO$/;"	d
CONFIG_LPC32XX_GPIO_MODULE	drivers/gpio/Kconfig	/^config LPC32XX_GPIO$/;"	c	menu:GPIO Support
CONFIG_LPC32XX_HSUART	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_LPC32XX_HSUART$/;"	d
CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY /;"	d
CONFIG_LPC32XX_NAND_MLC_NAND_TA	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_NAND_TA /;"	d
CONFIG_LPC32XX_NAND_MLC_RD_HIGH	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_RD_HIGH /;"	d
CONFIG_LPC32XX_NAND_MLC_RD_LOW	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_RD_LOW /;"	d
CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY /;"	d
CONFIG_LPC32XX_NAND_MLC_WR_HIGH	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_WR_HIGH /;"	d
CONFIG_LPC32XX_NAND_MLC_WR_LOW	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_NAND_MLC_WR_LOW /;"	d
CONFIG_LPC32XX_NAND_SLC_RDR_CLKS	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS	/;"	d
CONFIG_LPC32XX_NAND_SLC_RHOLD	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_RHOLD	/;"	d
CONFIG_LPC32XX_NAND_SLC_RSETUP	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_RSETUP	/;"	d
CONFIG_LPC32XX_NAND_SLC_RWIDTH	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_RWIDTH	/;"	d
CONFIG_LPC32XX_NAND_SLC_WDR_CLKS	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS	/;"	d
CONFIG_LPC32XX_NAND_SLC_WHOLD	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_WHOLD	/;"	d
CONFIG_LPC32XX_NAND_SLC_WSETUP	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_WSETUP	/;"	d
CONFIG_LPC32XX_NAND_SLC_WWIDTH	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_NAND_SLC_WWIDTH	/;"	d
CONFIG_LPC32XX_SPL	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_SPL$/;"	d
CONFIG_LPC32XX_SSP	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_SSP$/;"	d
CONFIG_LPC32XX_SSP	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_SSP$/;"	d
CONFIG_LPC32XX_SSP_TIMEOUT	include/configs/devkit3250.h	/^#define CONFIG_LPC32XX_SSP_TIMEOUT	/;"	d
CONFIG_LPC32XX_SSP_TIMEOUT	include/configs/work_92105.h	/^#define CONFIG_LPC32XX_SSP_TIMEOUT /;"	d
CONFIG_LPC_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_LPC_BASE	/;"	d
CONFIG_LPC_IO_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_LPC_IO_BASE	/;"	d
CONFIG_LPUART_32B_REG	include/configs/ls1021aqds.h	/^#define CONFIG_LPUART_32B_REG$/;"	d
CONFIG_LPUART_32B_REG	include/configs/ls1021atwr.h	/^#define CONFIG_LPUART_32B_REG$/;"	d
CONFIG_LPUART_32B_REG	include/configs/ls1043aqds.h	/^#define CONFIG_LPUART_32B_REG$/;"	d
CONFIG_LQ035Q1_LCD_MODE	board/bf527-ezkit/video.c	/^#define CONFIG_LQ035Q1_LCD_MODE	/;"	d	file:
CONFIG_LQ035Q1_SPI_BUS	include/configs/bf527-ezkit.h	/^# define CONFIG_LQ035Q1_SPI_BUS	/;"	d
CONFIG_LQ035Q1_SPI_CS	include/configs/bf527-ezkit.h	/^# define CONFIG_LQ035Q1_SPI_CS	/;"	d
CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI	include/configs/bf527-ezkit.h	/^# define CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI$/;"	d
CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI	include/configs/bf527-ezkit.h	/^# define CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI$/;"	d
CONFIG_LS102XA	include/configs/ls1021aqds.h	/^#define CONFIG_LS102XA$/;"	d
CONFIG_LS102XA	include/configs/ls1021atwr.h	/^#define CONFIG_LS102XA$/;"	d
CONFIG_LS102XA_STREAM_ID	include/configs/ls1021aqds.h	/^#define CONFIG_LS102XA_STREAM_ID$/;"	d
CONFIG_LS102XA_STREAM_ID	include/configs/ls1021atwr.h	/^#define CONFIG_LS102XA_STREAM_ID$/;"	d
CONFIG_LS1043A	include/configs/ls1043a_common.h	/^#define CONFIG_LS1043A$/;"	d
CONFIG_LS1_DEEP_SLEEP	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config LS1_DEEP_SLEEP$/;"	c	menu:LS102xA architecture
CONFIG_LS1_DEEP_SLEEP_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config LS1_DEEP_SLEEP$/;"	c	menu:LS102xA architecture
CONFIG_LUAN	include/configs/luan.h	/^#define CONFIG_LUAN	/;"	d
CONFIG_LWMON5	include/configs/lwmon5.h	/^#define CONFIG_LWMON5	/;"	d
CONFIG_LXT971_NO_SLEEP	include/configs/CPCI4052.h	/^#define CONFIG_LXT971_NO_SLEEP /;"	d
CONFIG_LXT971_NO_SLEEP	include/configs/PLU405.h	/^#define CONFIG_LXT971_NO_SLEEP /;"	d
CONFIG_LXT971_NO_SLEEP	include/configs/VOM405.h	/^#define CONFIG_LXT971_NO_SLEEP /;"	d
CONFIG_LZ4	lib/Kconfig	/^config LZ4$/;"	c	menu:Library routines""Compression Support
CONFIG_LZ4_MODULE	lib/Kconfig	/^config LZ4$/;"	c	menu:Library routines""Compression Support
CONFIG_LZMA	include/configs/VCMA9.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/ap121.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/ap143.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/bfin_adi_common.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/ib62x0.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/iconnect.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/mv-plug-common.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/nsa310s.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/qemu-mips.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/qemu-mips64.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/sandbox.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/smdk2410.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/tplink_wdr4300.h	/^#define CONFIG_LZMA$/;"	d
CONFIG_LZMA	include/configs/zipitz2.h	/^#define	CONFIG_LZMA	/;"	d
CONFIG_LZO	include/configs/PLU405.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/VCMA9.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/a3m071.h	/^#define CONFIG_LZO	/;"	d
CONFIG_LZO	include/configs/am335x_evm.h	/^# define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/am335x_igep0033.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/am335x_shc.h	/^# define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/am335x_sl50.h	/^# define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/am3517_evm.h	/^#define CONFIG_LZO	/;"	d
CONFIG_LZO	include/configs/apf27.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/apx4devkit.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/aristainetos-common.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/at91sam9x5ek.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/baltos.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/bav335x.h	/^# define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/colibri_imx7.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/colibri_t20.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/colibri_vf.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/da850evm.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/dockstar.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/ea20.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/ethernut5.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/gw_ventana.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/iconnect.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/ids8313.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/ipam390.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/m28evk.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/m53evk.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/mcx.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/microblaze-generic.h	/^# define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/mv-common.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/mx28evk.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/nas220.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/nokia_rx51.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/omap3_logic.h	/^#define CONFIG_LZO	/;"	d
CONFIG_LZO	include/configs/omap3_overo.h	/^#define CONFIG_LZO	/;"	d
CONFIG_LZO	include/configs/omap3_pandora.h	/^#define CONFIG_LZO	/;"	d
CONFIG_LZO	include/configs/omapl138_lcdk.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/pcm052.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/pcm058.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/platinum.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/pogo_e02.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/sama5d3_xplained.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/sandbox.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/siemens-am33x-common.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/smdk2410.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/socfpga_common.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/tam3517-common.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/titanium.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/tricorder.h	/^#define CONFIG_LZO	/;"	d
CONFIG_LZO	include/configs/vf610twr.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/x600.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/x86-common.h	/^#define CONFIG_LZO$/;"	d
CONFIG_LZO	include/configs/zmx25.h	/^#define CONFIG_LZO$/;"	d
CONFIG_M5208	arch/m68k/Kconfig	/^config M5208$/;"	c	menu:M68000 architecture
CONFIG_M5208_MODULE	arch/m68k/Kconfig	/^config M5208$/;"	c	menu:M68000 architecture
CONFIG_M52277	arch/m68k/Kconfig	/^config M52277$/;"	c	menu:M68000 architecture
CONFIG_M52277EVB	include/configs/M52277EVB.h	/^#define CONFIG_M52277EVB	/;"	d
CONFIG_M52277_MODULE	arch/m68k/Kconfig	/^config M52277$/;"	c	menu:M68000 architecture
CONFIG_M5235	arch/m68k/Kconfig	/^config M5235$/;"	c	menu:M68000 architecture
CONFIG_M5235_MODULE	arch/m68k/Kconfig	/^config M5235$/;"	c	menu:M68000 architecture
CONFIG_M5249	arch/m68k/Kconfig	/^config M5249$/;"	c	menu:M68000 architecture
CONFIG_M5249_MODULE	arch/m68k/Kconfig	/^config M5249$/;"	c	menu:M68000 architecture
CONFIG_M5253	arch/m68k/Kconfig	/^config M5253$/;"	c	menu:M68000 architecture
CONFIG_M5253DEMO	include/configs/M5253DEMO.h	/^#define CONFIG_M5253DEMO	/;"	d
CONFIG_M5253EVBE	include/configs/M5253EVBE.h	/^#define CONFIG_M5253EVBE	/;"	d
CONFIG_M5253_MODULE	arch/m68k/Kconfig	/^config M5253$/;"	c	menu:M68000 architecture
CONFIG_M5271	arch/m68k/Kconfig	/^config M5271$/;"	c	menu:M68000 architecture
CONFIG_M5271_MODULE	arch/m68k/Kconfig	/^config M5271$/;"	c	menu:M68000 architecture
CONFIG_M5272	arch/m68k/Kconfig	/^config M5272$/;"	c	menu:M68000 architecture
CONFIG_M5272_MODULE	arch/m68k/Kconfig	/^config M5272$/;"	c	menu:M68000 architecture
CONFIG_M5275	arch/m68k/Kconfig	/^config M5275$/;"	c	menu:M68000 architecture
CONFIG_M5275EVB	include/configs/M5275EVB.h	/^#define CONFIG_M5275EVB	/;"	d
CONFIG_M5275_MODULE	arch/m68k/Kconfig	/^config M5275$/;"	c	menu:M68000 architecture
CONFIG_M5282	arch/m68k/Kconfig	/^config M5282$/;"	c	menu:M68000 architecture
CONFIG_M5282_MODULE	arch/m68k/Kconfig	/^config M5282$/;"	c	menu:M68000 architecture
CONFIG_M53015	arch/m68k/Kconfig	/^config M53015$/;"	c	menu:M68000 architecture
CONFIG_M53015_MODULE	arch/m68k/Kconfig	/^config M53015$/;"	c	menu:M68000 architecture
CONFIG_M5307	arch/m68k/Kconfig	/^config M5307$/;"	c	menu:M68000 architecture
CONFIG_M5307_MODULE	arch/m68k/Kconfig	/^config M5307$/;"	c	menu:M68000 architecture
CONFIG_M5329	arch/m68k/Kconfig	/^config M5329$/;"	c	menu:M68000 architecture
CONFIG_M5329_MODULE	arch/m68k/Kconfig	/^config M5329$/;"	c	menu:M68000 architecture
CONFIG_M5373	arch/m68k/Kconfig	/^config M5373$/;"	c	menu:M68000 architecture
CONFIG_M5373_MODULE	arch/m68k/Kconfig	/^config M5373$/;"	c	menu:M68000 architecture
CONFIG_M54418	arch/m68k/Kconfig	/^config M54418$/;"	c	menu:M68000 architecture
CONFIG_M54418TWR	include/configs/M54418TWR.h	/^#define CONFIG_M54418TWR	/;"	d
CONFIG_M54418_MODULE	arch/m68k/Kconfig	/^config M54418$/;"	c	menu:M68000 architecture
CONFIG_M54451	arch/m68k/Kconfig	/^config M54451$/;"	c	menu:M68000 architecture
CONFIG_M54451EVB	include/configs/M54451EVB.h	/^#define CONFIG_M54451EVB	/;"	d
CONFIG_M54451_MODULE	arch/m68k/Kconfig	/^config M54451$/;"	c	menu:M68000 architecture
CONFIG_M54455	arch/m68k/Kconfig	/^config M54455$/;"	c	menu:M68000 architecture
CONFIG_M54455EVB	include/configs/M54455EVB.h	/^#define CONFIG_M54455EVB	/;"	d
CONFIG_M54455_MODULE	arch/m68k/Kconfig	/^config M54455$/;"	c	menu:M68000 architecture
CONFIG_M547x	arch/m68k/Kconfig	/^config M547x$/;"	c	menu:M68000 architecture
CONFIG_M547x_MODULE	arch/m68k/Kconfig	/^config M547x$/;"	c	menu:M68000 architecture
CONFIG_M548x	arch/m68k/Kconfig	/^config M548x$/;"	c	menu:M68000 architecture
CONFIG_M548x_MODULE	arch/m68k/Kconfig	/^config M548x$/;"	c	menu:M68000 architecture
CONFIG_M68K	arch/Kconfig	/^config M68K$/;"	c	choice:choice07312ef30104
CONFIG_M68K_MODULE	arch/Kconfig	/^config M68K$/;"	c	choice:choice07312ef30104
CONFIG_M88E1111_DISABLE_FIBER	include/configs/t3corp.h	/^#define CONFIG_M88E1111_DISABLE_FIBER$/;"	d
CONFIG_M88E1111_PHY	include/configs/io64.h	/^#define CONFIG_M88E1111_PHY	/;"	d
CONFIG_M88E1111_PHY	include/configs/kilauea.h	/^#define CONFIG_M88E1111_PHY	/;"	d
CONFIG_M88E1111_PHY	include/configs/makalu.h	/^#define CONFIG_M88E1111_PHY	/;"	d
CONFIG_M88E1111_PHY	include/configs/sequoia.h	/^#define CONFIG_M88E1111_PHY	/;"	d
CONFIG_M88E1111_PHY	include/configs/t3corp.h	/^#define CONFIG_M88E1111_PHY$/;"	d
CONFIG_M88E1112_PHY	include/configs/canyonlands.h	/^#define CONFIG_M88E1112_PHY$/;"	d
CONFIG_M88E1141_PHY	include/configs/redwood.h	/^#define CONFIG_M88E1141_PHY	/;"	d
CONFIG_MACB	include/configs/at91sam9260ek.h	/^#define CONFIG_MACB	/;"	d
CONFIG_MACB	include/configs/at91sam9263ek.h	/^#define CONFIG_MACB	/;"	d
CONFIG_MACB	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/at91sam9x5ek.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/atngw100.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/atngw100mkii.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/atstk1002.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/corvus.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/ethernut5.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/grasshopper.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/ma5d4evk.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/meesc.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/picosam9g45.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/pm9263.h	/^#define CONFIG_MACB	/;"	d
CONFIG_MACB	include/configs/pm9g45.h	/^#define CONFIG_MACB	/;"	d
CONFIG_MACB	include/configs/sama5d2_ptc.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/sama5d2_xplained.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/sama5d3_xplained.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/sama5d3xek.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/sama5d4_xplained.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/sama5d4ek.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/smartweb.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/snapper9260.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/snapper9g45.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/spear3xx_evb.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/taurus.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/usb_a9263.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB	include/configs/vinco.h	/^#define CONFIG_MACB$/;"	d
CONFIG_MACB0_PHY	include/configs/spear3xx_evb.h	/^#define CONFIG_MACB0_PHY	/;"	d
CONFIG_MACB1_PHY	include/configs/spear3xx_evb.h	/^#define CONFIG_MACB1_PHY	/;"	d
CONFIG_MACB2_PHY	include/configs/spear3xx_evb.h	/^#define CONFIG_MACB2_PHY	/;"	d
CONFIG_MACB3_PHY	include/configs/spear3xx_evb.h	/^#define CONFIG_MACB3_PHY	/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/at91sam9x5ek.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/ethernut5.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/ma5d4evk.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/sama5d2_ptc.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/sama5d2_xplained.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/sama5d3_xplained.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/sama5d3xek.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/sama5d4_xplained.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/sama5d4ek.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACB_SEARCH_PHY	include/configs/vinco.h	/^#define CONFIG_MACB_SEARCH_PHY$/;"	d
CONFIG_MACH_ASPENITE	include/configs/aspenite.h	/^#define CONFIG_MACH_ASPENITE	/;"	d
CONFIG_MACH_DAVINCI_CALIMAIN	include/configs/calimain.h	/^#define CONFIG_MACH_DAVINCI_CALIMAIN$/;"	d
CONFIG_MACH_DAVINCI_DA850_EVM	include/configs/da850evm.h	/^#define CONFIG_MACH_DAVINCI_DA850_EVM$/;"	d
CONFIG_MACH_DAVINCI_DA850_EVM	include/configs/ea20.h	/^#define CONFIG_MACH_DAVINCI_DA850_EVM$/;"	d
CONFIG_MACH_DAVINCI_DA850_EVM	include/configs/ipam390.h	/^#define CONFIG_MACH_DAVINCI_DA850_EVM$/;"	d
CONFIG_MACH_DAVINCI_DA850_EVM	include/configs/legoev3.h	/^#define CONFIG_MACH_DAVINCI_DA850_EVM$/;"	d
CONFIG_MACH_DOCKSTAR	include/configs/dockstar.h	/^#define CONFIG_MACH_DOCKSTAR	/;"	d
CONFIG_MACH_EDMINIV2	include/configs/edminiv2.h	/^#define CONFIG_MACH_EDMINIV2	/;"	d
CONFIG_MACH_GOFLEXHOME	include/configs/goflexhome.h	/^#define CONFIG_MACH_GOFLEXHOME	/;"	d
CONFIG_MACH_GONI	include/configs/s5p_goni.h	/^#define CONFIG_MACH_GONI	/;"	d
CONFIG_MACH_GURUPLUG	include/configs/guruplug.h	/^#define CONFIG_MACH_GURUPLUG	/;"	d
CONFIG_MACH_KM_KIRKWOOD	include/configs/km/km_arm.h	/^#define CONFIG_MACH_KM_KIRKWOOD	/;"	d
CONFIG_MACH_OMAPL138_LCDK	include/configs/omapl138_lcdk.h	/^#define CONFIG_MACH_OMAPL138_LCDK$/;"	d
CONFIG_MACH_OPENRD_BASE	include/configs/openrd.h	/^#define CONFIG_MACH_OPENRD_BASE	/;"	d
CONFIG_MACH_PIC32	arch/mips/Kconfig	/^config MACH_PIC32$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_MACH_PIC32_MODULE	arch/mips/Kconfig	/^config MACH_PIC32$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_MACH_SHEEVAPLUG	include/configs/sheevaplug.h	/^#define CONFIG_MACH_SHEEVAPLUG	/;"	d
CONFIG_MACH_SUN4I	board/sunxi/Kconfig	/^config MACH_SUN4I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN4I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN4I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN50I	board/sunxi/Kconfig	/^config MACH_SUN50I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN50I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN50I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN5I	board/sunxi/Kconfig	/^config MACH_SUN5I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN5I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN5I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN6I	board/sunxi/Kconfig	/^config MACH_SUN6I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN6I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN6I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN7I	board/sunxi/Kconfig	/^config MACH_SUN7I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN7I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN7I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I	board/sunxi/Kconfig	/^config MACH_SUN8I$/;"	c
CONFIG_MACH_SUN8I	include/config/auto.conf	/^CONFIG_MACH_SUN8I=y$/;"	k
CONFIG_MACH_SUN8I	include/generated/autoconf.h	/^#define CONFIG_MACH_SUN8I /;"	d
CONFIG_MACH_SUN8I_A23	board/sunxi/Kconfig	/^config MACH_SUN8I_A23$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_A23_MODULE	board/sunxi/Kconfig	/^config MACH_SUN8I_A23$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_A33	board/sunxi/Kconfig	/^config MACH_SUN8I_A33$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_A33_MODULE	board/sunxi/Kconfig	/^config MACH_SUN8I_A33$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_A83T	board/sunxi/Kconfig	/^config MACH_SUN8I_A83T$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_A83T_MODULE	board/sunxi/Kconfig	/^config MACH_SUN8I_A83T$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_H3	board/sunxi/Kconfig	/^config MACH_SUN8I_H3$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_H3	include/config/auto.conf	/^CONFIG_MACH_SUN8I_H3=y$/;"	k
CONFIG_MACH_SUN8I_H3	include/generated/autoconf.h	/^#define CONFIG_MACH_SUN8I_H3 /;"	d
CONFIG_MACH_SUN8I_H3_MODULE	board/sunxi/Kconfig	/^config MACH_SUN8I_H3$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN8I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN8I$/;"	c
CONFIG_MACH_SUN9I	board/sunxi/Kconfig	/^config MACH_SUN9I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_SUN9I_MODULE	board/sunxi/Kconfig	/^config MACH_SUN9I$/;"	c	choice:choicebcdb41430104
CONFIG_MACH_TYPE	include/configs/VCMA9.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/am335x_evm.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/am335x_igep0033.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/am335x_shc.h	/^# define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/apalis_t30.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/apf27.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/apx4devkit.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/aristainetos-common.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/at91sam9260ek.h	/^#  define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/at91sam9260ek.h	/^# define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/baltos.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/bav335x.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/beaver.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/brppt1.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/brxre1.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/calimain.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/cardhu.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/cgtqmx6eval.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/cm_fx6.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/cm_t335.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/cm_t3517.h	/^#define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/colibri_t20.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/colibri_t30.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/dalmore.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/devkit3250.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/devkit8000.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/dns325.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/dreamplug.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/ds109.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/duovero.h	/^#define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/eco5pk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/edb93xx.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/ethernut5.h	/^#define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/exynos5250-common.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/exynos5420-common.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/flea3.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/gplugd.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/gw_ventana.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/h2200.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/harmony.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/iconnect.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/km/km_arm.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/kzm9g.h	/^#define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/lacie_kw.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/lsxl.h	/^#define CONFIG_MACH_TYPE /;"	d
CONFIG_MACH_TYPE	include/configs/m28evk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mcx.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mt_ventoux.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx23_olinuxino.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx23evk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx25pdk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx28evk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx31ads.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx31pdk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx51evk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx53ard.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx53evk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx53loco.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx53smd.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx6qsabreauto.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx6sabresd.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/mx6slevk.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/nas220.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/nitrogen6x.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/nokia_rx51.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/odroid.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/omap3_cairo.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/omap4_sdp4430.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/origen.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/paz00.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/pcm051.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/pepper.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/pm9261.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/pm9263.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/pm9g45.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/pogo_e02.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/rpi.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/s32v234evb.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/sc_sps_1.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/seaboard.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/siemens-am33x-common.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/smartweb.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/smdkv310.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/sun4i.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/sun5i.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/sun7i.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/tbs2910.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/ti814x_evm.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/ti816x_evm.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/titanium.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/trats.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/tricorder.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/trimslice.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/ts4800.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/twister.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/udoo.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/usb_a9263.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/ventana.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/vf610twr.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/wandboard.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/whistler.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/woodburn_common.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/work_92105.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE	include/configs/zmx25.h	/^#define CONFIG_MACH_TYPE	/;"	d
CONFIG_MACH_TYPE_COMPAT_REV	include/autoconf.mk	/^CONFIG_MACH_TYPE_COMPAT_REV=y$/;"	m
CONFIG_MACH_TYPE_COMPAT_REV	include/configs/sunxi-common.h	/^# define CONFIG_MACH_TYPE_COMPAT_REV	/;"	d
CONFIG_MACH_TYPE_COMPAT_REV	spl/include/autoconf.mk	/^CONFIG_MACH_TYPE_COMPAT_REV=y$/;"	m
CONFIG_MACRESET_TIMEOUT	drivers/net/designware.h	/^#define CONFIG_MACRESET_TIMEOUT	/;"	d
CONFIG_MAC_OFFSET	include/configs/cm5200.h	/^#define CONFIG_MAC_OFFSET	/;"	d
CONFIG_MAC_PARTITION	include/configs/CPCI4052.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/M52277EVB.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/M5253DEMO.h	/^#	define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/M5253EVBE.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/MIP405.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/PIP405.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/PLU405.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/PMC440.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM5200.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM823L.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM823M.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM850L.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM850M.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM855L.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM855M.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM860L.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM860M.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM862L.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM862M.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM866M.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/TQM885D.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/a4m072.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/ac14xx.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/acadia.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/aria.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/bamboo.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/canyonlands.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/cm5200.h	/^#define CONFIG_MAC_PARTITION	/;"	d
CONFIG_MAC_PARTITION	include/configs/dbau1x00.h	/^#define CONFIG_MAC_PARTITION /;"	d
CONFIG_MAC_PARTITION	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/gr_ep2s60.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/gr_xc3s_1500.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/grsim.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/grsim_leon2.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/inka4x0.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/intip.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/jupiter.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/lwmon5.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/mpc5121ads.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/o2dnt-common.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/sandbox.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/sequoia.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/sh7752evb.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/sh7753evb.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/sh7757lcr.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/sh7785lcr.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/v38b.h	/^#define CONFIG_MAC_PARTITION	/;"	d
CONFIG_MAC_PARTITION	include/configs/x86-common.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAC_PARTITION	include/configs/yosemite.h	/^#define CONFIG_MAC_PARTITION$/;"	d
CONFIG_MAKALU	include/configs/makalu.h	/^#define CONFIG_MAKALU	/;"	d
CONFIG_MALLOC_F_ADDR	include/configs/sandbox.h	/^#define CONFIG_MALLOC_F_ADDR	/;"	d
CONFIG_MALTA	include/configs/malta.h	/^#define CONFIG_MALTA$/;"	d
CONFIG_MARUBUN_PCCARD	include/configs/ms7720se.h	/^#define CONFIG_MARUBUN_PCCARD	/;"	d
CONFIG_MARVELL	include/configs/edminiv2.h	/^#define CONFIG_MARVELL	/;"	d
CONFIG_MARVELL	include/configs/km/km_arm.h	/^#define CONFIG_MARVELL$/;"	d
CONFIG_MARVELL	include/configs/mv-common.h	/^#define CONFIG_MARVELL	/;"	d
CONFIG_MARVELL_GPIO	include/configs/gplugd.h	/^#define CONFIG_MARVELL_GPIO$/;"	d
CONFIG_MARVELL_MFP	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_MARVELL_MFP	/;"	d
CONFIG_MAX_CPUS	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config MAX_CPUS$/;"	c	menu:LS102xA architecture
CONFIG_MAX_CPUS	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config MAX_CPUS$/;"	c	menu:Layerscape architecture
CONFIG_MAX_CPUS	arch/powerpc/include/asm/config.h	/^#define CONFIG_MAX_CPUS	/;"	d
CONFIG_MAX_CPUS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_MAX_CPUS	/;"	d
CONFIG_MAX_CPUS	arch/powerpc/include/asm/config_mpc86xx.h	/^#define CONFIG_MAX_CPUS	/;"	d
CONFIG_MAX_CPUS	arch/x86/Kconfig	/^config MAX_CPUS$/;"	c	menu:x86 architecture
CONFIG_MAX_CPUS_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config MAX_CPUS$/;"	c	menu:LS102xA architecture
CONFIG_MAX_CPUS_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config MAX_CPUS$/;"	c	menu:Layerscape architecture
CONFIG_MAX_CPUS_MODULE	arch/x86/Kconfig	/^config MAX_CPUS$/;"	c	menu:x86 architecture
CONFIG_MAX_DSP_CPUS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_MAX_DSP_CPUS	/;"	d
CONFIG_MAX_FPGA_DEVICES	drivers/fpga/fpga.c	/^#define CONFIG_MAX_FPGA_DEVICES	/;"	d	file:
CONFIG_MAX_FPGA_DEVICES	include/configs/mt_ventoux.h	/^#define CONFIG_MAX_FPGA_DEVICES	/;"	d
CONFIG_MAX_FPGA_DEVICES	include/fpga.h	/^#define CONFIG_MAX_FPGA_DEVICES	/;"	d
CONFIG_MAX_I2C_NUM	drivers/i2c/s3c24x0_i2c.c	/^#define CONFIG_MAX_I2C_NUM /;"	d	file:
CONFIG_MAX_I2C_NUM	include/configs/trats.h	/^#define CONFIG_MAX_I2C_NUM	/;"	d
CONFIG_MAX_I2C_NUM	include/configs/trats2.h	/^#define CONFIG_MAX_I2C_NUM	/;"	d
CONFIG_MAX_MEM_MAPPED	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_MAX_MEM_MAPPED	/;"	d
CONFIG_MAX_MEM_MAPPED	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_MAX_MEM_MAPPED /;"	d
CONFIG_MAX_MEM_MAPPED	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_MAX_MEM_MAPPED	/;"	d
CONFIG_MAX_MEM_MAPPED	arch/powerpc/include/asm/config.h	/^#define CONFIG_MAX_MEM_MAPPED	/;"	d
CONFIG_MAX_MEM_MAPPED	arch/xtensa/include/asm/config.h	/^#define CONFIG_MAX_MEM_MAPPED /;"	d
CONFIG_MAX_MEM_MAPPED	include/configs/MPC8349ITX.h	/^#define CONFIG_MAX_MEM_MAPPED /;"	d
CONFIG_MAX_MEM_MAPPED	include/configs/dra7xx_evm.h	/^#define CONFIG_MAX_MEM_MAPPED	/;"	d
CONFIG_MAX_MEM_MAPPED	include/configs/xtfpga.h	/^#define CONFIG_MAX_MEM_MAPPED	/;"	d
CONFIG_MAX_PIRQ_LINKS	arch/x86/Kconfig	/^config MAX_PIRQ_LINKS$/;"	c	menu:x86 architecture
CONFIG_MAX_PIRQ_LINKS_MODULE	arch/x86/Kconfig	/^config MAX_PIRQ_LINKS$/;"	c	menu:x86 architecture
CONFIG_MAX_PKT	drivers/usb/gadget/ci_udc.h	/^#define CONFIG_MAX_PKT(/;"	d
CONFIG_MAX_RAM_BANK_SIZE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/bur_am335x_common.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/calimain.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/cm_t335.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/cm_t43.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/da850evm.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/draco.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/ea20.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/etamin.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/ipam390.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/legoev3.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_MAX_RAM_BANK_SIZE /;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/pxm2.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/rastaban.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/rut.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/thuban.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/ti_am335x_common.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MAX_RAM_BANK_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_MAX_RAM_BANK_SIZE	/;"	d
CONFIG_MBA6	board/tqc/tqma6/Kconfig	/^config MBA6$/;"	c	choice:choice3e84a7cc0304
CONFIG_MBA6_MODULE	board/tqc/tqma6/Kconfig	/^config MBA6$/;"	c	choice:choice3e84a7cc0304
CONFIG_MCF520x	arch/m68k/Kconfig	/^config MCF520x$/;"	c	menu:M68000 architecture
CONFIG_MCF520x_MODULE	arch/m68k/Kconfig	/^config MCF520x$/;"	c	menu:M68000 architecture
CONFIG_MCF5227x	arch/m68k/Kconfig	/^config MCF5227x$/;"	c	menu:M68000 architecture
CONFIG_MCF5227x_MODULE	arch/m68k/Kconfig	/^config MCF5227x$/;"	c	menu:M68000 architecture
CONFIG_MCF523x	arch/m68k/Kconfig	/^config MCF523x$/;"	c	menu:M68000 architecture
CONFIG_MCF523x_MODULE	arch/m68k/Kconfig	/^config MCF523x$/;"	c	menu:M68000 architecture
CONFIG_MCF52x2	arch/m68k/Kconfig	/^config MCF52x2$/;"	c	menu:M68000 architecture
CONFIG_MCF52x2_MODULE	arch/m68k/Kconfig	/^config MCF52x2$/;"	c	menu:M68000 architecture
CONFIG_MCF5301x	arch/m68k/Kconfig	/^config MCF5301x$/;"	c	menu:M68000 architecture
CONFIG_MCF5301x_MODULE	arch/m68k/Kconfig	/^config MCF5301x$/;"	c	menu:M68000 architecture
CONFIG_MCF530x	arch/m68k/Kconfig	/^config MCF530x$/;"	c	menu:M68000 architecture
CONFIG_MCF530x_MODULE	arch/m68k/Kconfig	/^config MCF530x$/;"	c	menu:M68000 architecture
CONFIG_MCF532x	arch/m68k/Kconfig	/^config MCF532x$/;"	c	menu:M68000 architecture
CONFIG_MCF532x_MODULE	arch/m68k/Kconfig	/^config MCF532x$/;"	c	menu:M68000 architecture
CONFIG_MCF537x	arch/m68k/Kconfig	/^config MCF537x$/;"	c	menu:M68000 architecture
CONFIG_MCF537x_MODULE	arch/m68k/Kconfig	/^config MCF537x$/;"	c	menu:M68000 architecture
CONFIG_MCF5441x	arch/m68k/Kconfig	/^config MCF5441x$/;"	c	menu:M68000 architecture
CONFIG_MCF5441x_MODULE	arch/m68k/Kconfig	/^config MCF5441x$/;"	c	menu:M68000 architecture
CONFIG_MCF5445x	arch/m68k/Kconfig	/^config MCF5445x$/;"	c	menu:M68000 architecture
CONFIG_MCF5445x_MODULE	arch/m68k/Kconfig	/^config MCF5445x$/;"	c	menu:M68000 architecture
CONFIG_MCF547x_8x	arch/m68k/Kconfig	/^config MCF547x_8x$/;"	c	menu:M68000 architecture
CONFIG_MCF547x_8x_MODULE	arch/m68k/Kconfig	/^config MCF547x_8x$/;"	c	menu:M68000 architecture
CONFIG_MCFFEC	include/configs/M5208EVBE.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M5235EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M5272C3.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M5275EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M5282EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M53017EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M5329EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M5373EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M54418TWR.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M54451EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/M54455EVB.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/cobra5272.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFFEC	include/configs/eb_cpu5282.h	/^#define CONFIG_MCFFEC$/;"	d
CONFIG_MCFRTC	include/configs/M52277EVB.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFRTC	include/configs/M53017EVB.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFRTC	include/configs/M5329EVB.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFRTC	include/configs/M5373EVB.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFRTC	include/configs/M54451EVB.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFRTC	include/configs/M54455EVB.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFRTC	include/configs/astro_mcf5373l.h	/^#define CONFIG_MCFRTC$/;"	d
CONFIG_MCFTMR	include/configs/M5208EVBE.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M52277EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5235EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5249EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5253DEMO.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5253EVBE.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5272C3.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5275EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5282EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M53017EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5329EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M5373EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M54418TWR.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M54451EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/M54455EVB.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/amcore.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/astro_mcf5373l.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/cobra5272.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFTMR	include/configs/eb_cpu5282.h	/^#define CONFIG_MCFTMR$/;"	d
CONFIG_MCFUART	include/configs/M5208EVBE.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M52277EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5235EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5249EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5253DEMO.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5253EVBE.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5272C3.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5275EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5282EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M53017EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5329EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5373EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M54418TWR.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M54451EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M54455EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5475EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/M5485EVB.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/amcore.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/astro_mcf5373l.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/cobra5272.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCFUART	include/configs/eb_cpu5282.h	/^#define CONFIG_MCFUART$/;"	d
CONFIG_MCLK_DIS	include/i8042.h	/^#define CONFIG_MCLK_DIS	/;"	d
CONFIG_MD5	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_MD5	/;"	d
CONFIG_MD5	include/configs/dragonboard410c.h	/^#define CONFIG_MD5$/;"	d
CONFIG_MD5	include/configs/sh7752evb.h	/^#define CONFIG_MD5$/;"	d
CONFIG_MD5	include/configs/sh7753evb.h	/^#define CONFIG_MD5$/;"	d
CONFIG_MD5	include/configs/sh7757lcr.h	/^#define CONFIG_MD5$/;"	d
CONFIG_MD5	include/image.h	/^#  define CONFIG_MD5	/;"	d
CONFIG_MDIO_TIMEOUT	drivers/net/designware.h	/^#define CONFIG_MDIO_TIMEOUT	/;"	d
CONFIG_MDIO_TIMEOUT	drivers/net/sun8i_emac.c	/^#define CONFIG_MDIO_TIMEOUT	/;"	d	file:
CONFIG_MECP5123	include/configs/mecp5123.h	/^#define CONFIG_MECP5123 /;"	d
CONFIG_MEMSIZE	include/radeon.h	/^#define CONFIG_MEMSIZE	/;"	d
CONFIG_MEMSIZE_IN_BYTES	include/configs/dbau1x00.h	/^#define CONFIG_MEMSIZE_IN_BYTES$/;"	d
CONFIG_MEMSIZE_IN_BYTES	include/configs/malta.h	/^#define CONFIG_MEMSIZE_IN_BYTES$/;"	d
CONFIG_MEMSIZE_IN_BYTES	include/configs/pb1x00.h	/^#define CONFIG_MEMSIZE_IN_BYTES$/;"	d
CONFIG_MEMSIZE_MASK	include/radeon.h	/^#define CONFIG_MEMSIZE_MASK	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bct-brettl2.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf518f-ezbrd.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf525-ucr2.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf526-ezbrd.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf527-ezkit.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf527-sdp.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf533-ezkit.h	/^# define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf533-stamp.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf537-minotaur.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf537-pnav.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf537-srv1.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf537-stamp.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf538f-ezkit.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf548-ezkit.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf561-acvilon.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/bf561-ezkit.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/blackstamp.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/blackvme.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/br4.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/cm-bf527.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/cm-bf533.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/cm-bf537e.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/cm-bf537u.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/cm-bf548.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/cm-bf561.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/dnp5370.h	/^#define CONFIG_MEM_ADD_WDTH /;"	d
CONFIG_MEM_ADD_WDTH	include/configs/ibf-dsp561.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/ip04.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/pr1.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/tcm-bf518.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_ADD_WDTH	include/configs/tcm-bf537.h	/^#define CONFIG_MEM_ADD_WDTH	/;"	d
CONFIG_MEM_HOLE_16M	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define	CONFIG_MEM_HOLE_16M	/;"	d	file:
CONFIG_MEM_INIT_VALUE	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_MEM_INIT_VALUE	/;"	d	file:
CONFIG_MEM_INIT_VALUE	include/configs/B4860QDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/BSC9131RDB.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/BSC9132QDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/C29XPCIE.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8349EMDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8536DS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8540ADS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8541CDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8544DS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8548CDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8555CDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8560ADS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8568MDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8569MDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8572DS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8610HPCD.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/MPC8641HPCN.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/P1010RDB.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/P1022DS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T102xQDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T102xRDB.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T1040QDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T104xRDB.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T208xQDS.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T208xRDB.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/T4240RDB.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/corenet_ds.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/cyrus.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls1021aqds.h	/^#define CONFIG_MEM_INIT_VALUE /;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls1043aqds.h	/^#define CONFIG_MEM_INIT_VALUE /;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls1043ardb.h	/^#define CONFIG_MEM_INIT_VALUE /;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls1046aqds.h	/^#define CONFIG_MEM_INIT_VALUE /;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls1046ardb.h	/^#define CONFIG_MEM_INIT_VALUE /;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls2080aqds.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/ls2080ardb.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/sbc8548.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/sbc8641d.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/socrates.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/t4qds.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/xpedite517x.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/xpedite520x.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/xpedite537x.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_INIT_VALUE	include/configs/xpedite550x.h	/^#define CONFIG_MEM_INIT_VALUE	/;"	d
CONFIG_MEM_REMAP	include/configs/adp-ag101p.h	/^#define CONFIG_MEM_REMAP$/;"	d
CONFIG_MEM_SIZE	include/configs/bct-brettl2.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf506f-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf525-ucr2.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf526-ezbrd.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf527-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf527-sdp.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf533-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf533-stamp.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf537-minotaur.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf537-pnav.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf537-srv1.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf537-stamp.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf538f-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf548-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf561-acvilon.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf561-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/bf609-ezkit.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/blackstamp.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/blackvme.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/br4.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/cm-bf527.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/cm-bf533.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/cm-bf537e.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/cm-bf537u.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/cm-bf548.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/cm-bf561.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/dnp5370.h	/^#define CONFIG_MEM_SIZE /;"	d
CONFIG_MEM_SIZE	include/configs/ibf-dsp561.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/ip04.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/pr1.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/tcm-bf518.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MEM_SIZE	include/configs/tcm-bf537.h	/^#define CONFIG_MEM_SIZE	/;"	d
CONFIG_MENU	include/autoconf.mk	/^CONFIG_MENU=y$/;"	m
CONFIG_MENU	include/config_distro_defaults.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU	include/configs/hikey.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU	include/configs/ls1043a_common.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU	include/configs/nokia_rx51.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU	include/configs/thunderx_88xx.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU	include/configs/vexpress_aemv8a.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU	include/configs/xilinx_zynqmp.h	/^#define CONFIG_MENU$/;"	d
CONFIG_MENU_SHOW	include/configs/nokia_rx51.h	/^#define CONFIG_MENU_SHOW$/;"	d
CONFIG_MESON_GXBB	arch/arm/mach-meson/Kconfig	/^config MESON_GXBB$/;"	c
CONFIG_MESON_GXBB_MODULE	arch/arm/mach-meson/Kconfig	/^config MESON_GXBB$/;"	c
CONFIG_MESON_SERIAL	drivers/serial/Kconfig	/^config MESON_SERIAL$/;"	c	menu:Serial drivers
CONFIG_MESON_SERIAL_MODULE	drivers/serial/Kconfig	/^config MESON_SERIAL$/;"	c	menu:Serial drivers
CONFIG_MFG_ENV_SETTINGS	include/configs/mx7dsabresd.h	/^#define CONFIG_MFG_ENV_SETTINGS /;"	d
CONFIG_MICROBLAZE	arch/Kconfig	/^config MICROBLAZE$/;"	c	choice:choice07312ef30104
CONFIG_MICROBLAZE_MODULE	arch/Kconfig	/^config MICROBLAZE$/;"	c	choice:choice07312ef30104
CONFIG_MICRO_SUPPORT_CARD	arch/arm/mach-uniphier/Kconfig	/^config MICRO_SUPPORT_CARD$/;"	c
CONFIG_MICRO_SUPPORT_CARD_MODULE	arch/arm/mach-uniphier/Kconfig	/^config MICRO_SUPPORT_CARD$/;"	c
CONFIG_MIGO_R	include/configs/MigoR.h	/^#define CONFIG_MIGO_R	/;"	d
CONFIG_MII	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/B4860QDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/BSC9131RDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/BSC9132QDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/C29XPCIE.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/CPCI2DP.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/CPCI4052.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5208EVBE.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5235EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5272C3.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5275EVB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5282EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M53017EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5329EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5373EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M54418TWR.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M54451EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M54455EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5475EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/M5485EVB.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MIP405.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8308RDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8315ERDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8349ITX.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/MPC837XEMDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8536DS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8540ADS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8541CDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8544DS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8548CDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8555CDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8560ADS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8568MDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8572DS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/MPC8641HPCN.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/P1010RDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/P1022DS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/P1023RDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/P2041RDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/PIP405.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/PLU405.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/PMC405DE.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/PMC440.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T102xQDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T102xRDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T1040QDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T104xRDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T208xQDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T208xRDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T4240QDS.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/T4240RDB.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/TQM834x.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/UCP1020.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/VOM405.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/ac14xx.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/am335x_shc.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/am3517_evm.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/am43xx_evm.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/am57xx_evm.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/amcc-common.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/apf27.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/aria.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/aristainetos-common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/at91rm9200ek.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/axs10x.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/baltos.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/bf609-ezkit.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/bur_am335x_common.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/calimain.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/cgtqmx6eval.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/cm_fx6.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/cm_t3517.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/cm_t43.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/cobra5272.h	/^#	define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/colibri_imx7.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/colibri_vf.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/controlcenterd.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/corenet_ds.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/cyrus.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/da850evm.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/dra7xx_evm.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/ea20.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/eb_cpu5282.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/edb93xx.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/edminiv2.h	/^#define	CONFIG_MII	/;"	d
CONFIG_MII	include/configs/embestmx6boards.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/flea3.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ge_bx50v3.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/gplugd.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/gw_ventana.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/hrcon.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/ids8313.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/imx27lite-common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/imx6qdl_icore.h	/^# define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/inka4x0.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ipek01.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/jupiter.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/km/km_arm.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/ls1021aqds.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ls1021atwr.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ls2080aqds.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/ls2080ardb.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/lwmon5.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/m53evk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/mcx.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mecp5123.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/microblaze-generic.h	/^# define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/mpc5121ads.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/mpc8308_p1m.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/munices.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/mx25pdk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx35pdk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx51evk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx53ard.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx53evk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx53loco.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx53smd.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6cuboxi.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6qarm2.h	/^#define	CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6sabre_common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6slevk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6sxsabreauto.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6sxsabresd.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mx7dsabresd.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/mxs.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/nitrogen6x.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/novena.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/omapl138_lcdk.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ot1200.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/p1_twr.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/pcm052.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/pcm058.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/pdm360ng.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/pic32mzdask.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/pico-imx6ul.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/platinum.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/sbc8548.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/secomx6quq7.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/siemens-am33x-common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/socfpga_common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/socrates.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/spear-common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/strider.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/stv0991.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/sunxi-common.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/t4qds.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/tam3517-common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/tbs2910.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ti814x_evm.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ti_am335x_common.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/titanium.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/tqma6.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/ts4800.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/udoo.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/v38b.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/vf610twr.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/wandboard.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/woodburn_common.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/x600.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/xilinx_zynqmp.h	/^# define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/xpedite1000.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/xpedite517x.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/xpedite520x.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/xpedite537x.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/xpedite550x.h	/^#define CONFIG_MII	/;"	d
CONFIG_MII	include/configs/xpress.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/zc5202.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/zc5601.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/zmx25.h	/^#define CONFIG_MII$/;"	d
CONFIG_MII	include/configs/zynq-common.h	/^# define CONFIG_MII$/;"	d
CONFIG_MIIM_ADDRESS	include/configs/MPC8568MDS.h	/^#define CONFIG_MIIM_ADDRESS	/;"	d
CONFIG_MIIM_ADDRESS	include/configs/MPC8569MDS.h	/^#define CONFIG_MIIM_ADDRESS	/;"	d
CONFIG_MIIM_ADDRESS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_MIIM_ADDRESS	/;"	d
CONFIG_MIIM_ADDRESS	include/configs/p1_twr.h	/^#define CONFIG_MIIM_ADDRESS	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/BSC9131RDB.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/BSC9132QDS.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/C29XPCIE.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/MPC8536DS.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/MPC8544DS.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/MPC8572DS.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/P1010RDB.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/ls1021aqds.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/ls1021atwr.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/xpedite537x.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_DEFAULT_TSEC	include/configs/xpedite550x.h	/^#define CONFIG_MII_DEFAULT_TSEC	/;"	d
CONFIG_MII_INIT	include/configs/M5208EVBE.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5235EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5272C3.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5275EVB.h	/^#define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5282EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M53017EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5329EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5373EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M54418TWR.h	/^#define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M54451EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M54455EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5475EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/M5485EVB.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/TQM885D.h	/^#define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/cobra5272.h	/^#	define CONFIG_MII_INIT	/;"	d
CONFIG_MII_INIT	include/configs/eb_cpu5282.h	/^#define CONFIG_MII_INIT	/;"	d
CONFIG_MII_SUPPRESS_PREAMBLE	include/configs/edb93xx.h	/^#define CONFIG_MII_SUPPRESS_PREAMBLE$/;"	d
CONFIG_MIPS	arch/Kconfig	/^config MIPS$/;"	c	choice:choice07312ef30104
CONFIG_MIPS_BOOT_CMDLINE_LEGACY	arch/mips/Kconfig	/^config MIPS_BOOT_CMDLINE_LEGACY$/;"	c	menu:MIPS architecture""OS boot interface
CONFIG_MIPS_BOOT_CMDLINE_LEGACY_MODULE	arch/mips/Kconfig	/^config MIPS_BOOT_CMDLINE_LEGACY$/;"	c	menu:MIPS architecture""OS boot interface
CONFIG_MIPS_BOOT_ENV_LEGACY	arch/mips/Kconfig	/^config MIPS_BOOT_ENV_LEGACY$/;"	c	menu:MIPS architecture""OS boot interface
CONFIG_MIPS_BOOT_ENV_LEGACY_MODULE	arch/mips/Kconfig	/^config MIPS_BOOT_ENV_LEGACY$/;"	c	menu:MIPS architecture""OS boot interface
CONFIG_MIPS_BOOT_FDT	arch/mips/Kconfig	/^config MIPS_BOOT_FDT$/;"	c	menu:MIPS architecture""OS boot interface
CONFIG_MIPS_BOOT_FDT_MODULE	arch/mips/Kconfig	/^config MIPS_BOOT_FDT$/;"	c	menu:MIPS architecture""OS boot interface
CONFIG_MIPS_CM	arch/mips/Kconfig	/^config MIPS_CM$/;"	c	menu:MIPS architecture
CONFIG_MIPS_CM_BASE	arch/mips/Kconfig	/^config MIPS_CM_BASE$/;"	c	menu:MIPS architecture
CONFIG_MIPS_CM_BASE_MODULE	arch/mips/Kconfig	/^config MIPS_CM_BASE$/;"	c	menu:MIPS architecture
CONFIG_MIPS_CM_MODULE	arch/mips/Kconfig	/^config MIPS_CM$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_4	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_4$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_4_MODULE	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_4$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_5	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_5$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_5_MODULE	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_5$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_6	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_6$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_6_MODULE	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_6$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_7	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_7$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_7_MODULE	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_7$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L1_CACHE_SHIFT_MODULE	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L2_CACHE	arch/mips/Kconfig	/^config MIPS_L2_CACHE$/;"	c	menu:MIPS architecture
CONFIG_MIPS_L2_CACHE_MODULE	arch/mips/Kconfig	/^config MIPS_L2_CACHE$/;"	c	menu:MIPS architecture
CONFIG_MIPS_MODULE	arch/Kconfig	/^config MIPS$/;"	c	choice:choice07312ef30104
CONFIG_MIPS_TUNE_14KC	arch/mips/Kconfig	/^config MIPS_TUNE_14KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_14KC_MODULE	arch/mips/Kconfig	/^config MIPS_TUNE_14KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_24KC	arch/mips/Kconfig	/^config MIPS_TUNE_24KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_24KC_MODULE	arch/mips/Kconfig	/^config MIPS_TUNE_24KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_34KC	arch/mips/Kconfig	/^config MIPS_TUNE_34KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_34KC_MODULE	arch/mips/Kconfig	/^config MIPS_TUNE_34KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_4KC	arch/mips/Kconfig	/^config MIPS_TUNE_4KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_4KC_MODULE	arch/mips/Kconfig	/^config MIPS_TUNE_4KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_74KC	arch/mips/Kconfig	/^config MIPS_TUNE_74KC$/;"	c	menu:MIPS architecture
CONFIG_MIPS_TUNE_74KC_MODULE	arch/mips/Kconfig	/^config MIPS_TUNE_74KC$/;"	c	menu:MIPS architecture
CONFIG_MIRQ_EN	include/i8042.h	/^#define CONFIG_MIRQ_EN	/;"	d
CONFIG_MISC	drivers/misc/Kconfig	/^config MISC$/;"	c	menu:Multifunction device drivers
CONFIG_MISC_COMMON	include/configs/odroid.h	/^#define CONFIG_MISC_COMMON$/;"	d
CONFIG_MISC_COMMON	include/configs/odroid_xu3.h	/^#define CONFIG_MISC_COMMON$/;"	d
CONFIG_MISC_COMMON	include/configs/s5p_goni.h	/^#define CONFIG_MISC_COMMON$/;"	d
CONFIG_MISC_COMMON	include/configs/s5pc210_universal.h	/^#define CONFIG_MISC_COMMON$/;"	d
CONFIG_MISC_COMMON	include/configs/trats.h	/^#define CONFIG_MISC_COMMON$/;"	d
CONFIG_MISC_COMMON	include/configs/trats2.h	/^#define CONFIG_MISC_COMMON$/;"	d
CONFIG_MISC_INIT_F	include/configs/MPC8349ITX.h	/^#define CONFIG_MISC_INIT_F$/;"	d
CONFIG_MISC_INIT_F	include/configs/PMC440.h	/^#define CONFIG_MISC_INIT_F	/;"	d
CONFIG_MISC_INIT_F	include/configs/acadia.h	/^#define CONFIG_MISC_INIT_F	/;"	d
CONFIG_MISC_INIT_F	include/configs/inka4x0.h	/^#define CONFIG_MISC_INIT_F	/;"	d
CONFIG_MISC_INIT_F	include/configs/km/kmp204x-common.h	/^#define CONFIG_MISC_INIT_F$/;"	d
CONFIG_MISC_INIT_F	include/configs/yucca.h	/^#define	CONFIG_MISC_INIT_F	/;"	d
CONFIG_MISC_INIT_R	include/autoconf.mk	/^CONFIG_MISC_INIT_R=y$/;"	m
CONFIG_MISC_INIT_R	include/configs/B4860QDS.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/BSC9132QDS.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/CPCI4052.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/MIP405.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/MPC8308RDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/MPC8313ERDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/MPC8349ITX.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/MPC837XERDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/MPC8610HPCD.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/P1010RDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/P1022DS.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/P2041RDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/PIP405.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/PLU405.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/PMC405DE.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/PMC440.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/T102xQDS.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/T102xRDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/T1040QDS.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/T104xRDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/T208xQDS.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/T208xRDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/T4240RDB.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM823L.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM823M.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM850L.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM850M.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM855L.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM855M.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM860L.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM860M.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM862L.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM862M.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/TQM866M.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/VOM405.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/a3m071.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/a4m072.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ac14xx.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/am3517_crane.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/am3517_evm.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/aria.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/astro_mcf5373l.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/bcm23550_w1d.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/bcm28155_ap.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/bct-brettl2.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf518f-ezbrd.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf526-ezbrd.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf527-ezkit.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf527-sdp.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf533-ezkit.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf533-stamp.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/bf537-stamp.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/canyonlands.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/cgtqmx6eval.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cm-bf527.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cm-bf537e.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cm-bf537u.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cm5200.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/cm_fx6.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cm_t35.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cm_t3517.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/controlcenterd.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/corenet_ds.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/cyrus.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/da850evm.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/devkit8000.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/digsy_mtc.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/dlvision-10g.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/dlvision.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/dnp5370.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/dragonboard410c.h	/^#define CONFIG_MISC_INIT_R /;"	d
CONFIG_MISC_INIT_R	include/configs/eb_cpu5282.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/gdppc440etx.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/gw_ventana.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/highbank.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/hikey.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ids8313.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/integrator-common.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/intip.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/io.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/io64.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ipam390.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ipek01.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/kc1.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/kilauea.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/km/km83xx-common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/km/km_arm.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/km/kmp204x-common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/km82xx.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/lacie_kw.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1012aqds.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1021aqds.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1021atwr.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1043aqds.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1043ardb.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1046aqds.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls1046ardb.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ls2080ardb.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/lsxl.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/luan.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/lwmon5.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/makalu.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/malta.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/manroland/common.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/mcx.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/mecp5123.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/meesc.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/meson-gxbb-common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/mpc5121ads.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/neo.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/nitrogen6x.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/nokia_rx51.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/novena.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/odroid.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/odroid_xu3.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_beagle.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_cairo.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_evm.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_igep00x0.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_logic.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_overo.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_pandora.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap3_zoom1.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omap5_uevm.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/omapl138_lcdk.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ot1200.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/pdm360ng.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/platinum.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/qemu-mips.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/qemu-mips64.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/rpi.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/s5p_goni.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/s5pc210_universal.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/sama5d2_xplained.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/sequoia.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/sniper.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/socrates.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/som-6896.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/spear-common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/stm32f429-discovery.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/sunxi-common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/t3corp.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	include/configs/t4qds.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/tam3517-common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/tao3530.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/tcm-bf537.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/ti_omap4_common.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/titanium.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/tqma6_wru4.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/trats.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/trats2.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/tricorder.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/v38b.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/vme8349.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/x600.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/x86-chromebook.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/xtfpga.h	/^#define CONFIG_MISC_INIT_R$/;"	d
CONFIG_MISC_INIT_R	include/configs/yosemite.h	/^#define CONFIG_MISC_INIT_R	/;"	d
CONFIG_MISC_INIT_R	spl/include/autoconf.mk	/^CONFIG_MISC_INIT_R=y$/;"	m
CONFIG_MISC_MODULE	drivers/misc/Kconfig	/^config MISC$/;"	c	menu:Multifunction device drivers
CONFIG_MIU_2BIT_21_7_INTERLEAVED	include/configs/origen.h	/^#define CONFIG_MIU_2BIT_21_7_INTERLEAVED$/;"	d
CONFIG_MIU_2BIT_INTERLEAVED	include/configs/smdkv310.h	/^#define CONFIG_MIU_2BIT_INTERLEAVED$/;"	d
CONFIG_MMC	board/sunxi/Kconfig	/^config MMC$/;"	c
CONFIG_MMC	drivers/mmc/Kconfig	/^config MMC$/;"	c	menu:MMC Host controller Support
CONFIG_MMC	include/config/auto.conf	/^CONFIG_MMC=y$/;"	k
CONFIG_MMC	include/configs/BSC9132QDS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/MPC8308RDB.h	/^#define CONFIG_MMC /;"	d
CONFIG_MMC	include/configs/MPC837XEMDS.h	/^#define CONFIG_MMC /;"	d
CONFIG_MMC	include/configs/MPC837XERDB.h	/^#define CONFIG_MMC /;"	d
CONFIG_MMC	include/configs/MPC8536DS.h	/^#define CONFIG_MMC /;"	d
CONFIG_MMC	include/configs/MPC8569MDS.h	/^#define CONFIG_MMC /;"	d
CONFIG_MMC	include/configs/P1010RDB.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/P1022DS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/P2041RDB.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/P3041DS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/P4080DS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/P5020DS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/P5040DS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T102xQDS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T102xRDB.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T1040QDS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T104xRDB.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T208xQDS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T208xRDB.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T4240QDS.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/T4240RDB.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/UCP1020.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/adp-ag101p.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/alt.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/am3517_crane.h	/^#define CONFIG_MMC	/;"	d
CONFIG_MMC	include/configs/am3517_evm.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/apalis_t30.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/apf27.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/at91sam9260ek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/at91sam9263ek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/at91sam9n12ek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/at91sam9rlek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/at91sam9x5ek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/atngw100.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/atngw100mkii.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/atstk1002.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/axs10x.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bayleybay.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bcm23550_w1d.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bcm28155_ap.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/beaver.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bf518f-ezbrd.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bf537-stamp.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bf548-ezkit.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/bf609-ezkit.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/brppt1.h	/^ #define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/brxre1.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cardhu.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cei-tk1-som.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/clearfog.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cm-bf537e.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cm-bf537u.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cm_t35.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cm_t3517.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/colibri_t20.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/colibri_t30.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/colibri_vf.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/controlcenterd.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/crownbay.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/cyrus.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/da850evm.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/dalmore.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/db-88f6820-gp.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/dfi-bt700.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/dragonboard410c.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/e2220-1170.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/edb93xx.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ethernut5.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/exynos-common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/galileo.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ge_bx50v3.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/gose.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/harmony.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/hikey.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/hrcon.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/imx27lite-common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/jetson-tk1.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/k2g_evm.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/kc1.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/koelsch.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/lager.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/legoev3.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls1012aqds.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls1012ardb.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls1021aqds.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls1021atwr.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls1043a_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls1046a_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls2080a_simu.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls2080aqds.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ls2080ardb.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/m53evk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ma5d4evk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mcx.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/medcom-wide.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/minnowmax.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx25pdk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx35pdk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx51evk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx53ard.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx53evk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx53loco.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx53smd.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx6_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mx7_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/mxs.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/nokia_rx51.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/nyan-big.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/omap3_evm.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/omapl138_lcdk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/openrd.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/p1_twr.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/p2371-0000.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/p2371-2180.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/p2571.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/p2771-0000.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/paz00.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/pcm052.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/pepper.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/pic32mzdask.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/pico-imx6ul.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/picosam9g45.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/plutux.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/porter.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/pxa-common.h	/^#define	CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/rk3036_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/rk3288_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/rk3399_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/rpi.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/s32v234evb.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/s5p_goni.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/sama5d3_xplained.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/sama5d3xek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/sama5d4_xplained.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/sama5d4ek.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/seaboard.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/sh7752evb.h	/^#define CONFIG_MMC	/;"	d
CONFIG_MMC	include/configs/sh7753evb.h	/^#define CONFIG_MMC	/;"	d
CONFIG_MMC	include/configs/sh7757lcr.h	/^#define CONFIG_MMC	/;"	d
CONFIG_MMC	include/configs/sheevaplug.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/siemens-am33x-common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/silk.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/snapper9g45.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/sniper.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/socfpga_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/stout.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/strider.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/tam3517-common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/tao3530.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/tcm-bf537.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/tec-ng.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/tec.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ti814x_evm.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ti816x_evm.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ti_armv7_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/tricorder.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/trimslice.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ts4800.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/usbarmory.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/venice2.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/ventana.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/vexpress_common.h	/^#define CONFIG_MMC	/;"	d
CONFIG_MMC	include/configs/vf610twr.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/vinco.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/whistler.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/woodburn_common.h	/^#define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/xilinx_zynqmp.h	/^# define CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/zipitz2.h	/^#define	CONFIG_MMC$/;"	d
CONFIG_MMC	include/configs/zynq-common.h	/^# define CONFIG_MMC$/;"	d
CONFIG_MMC	include/generated/autoconf.h	/^#define CONFIG_MMC /;"	d
CONFIG_MMC0_CD_PIN	board/sunxi/Kconfig	/^config MMC0_CD_PIN$/;"	c
CONFIG_MMC0_CD_PIN	include/config/auto.conf	/^CONFIG_MMC0_CD_PIN="PF6"$/;"	k
CONFIG_MMC0_CD_PIN	include/generated/autoconf.h	/^#define CONFIG_MMC0_CD_PIN /;"	d
CONFIG_MMC0_CD_PIN_MODULE	board/sunxi/Kconfig	/^config MMC0_CD_PIN$/;"	c
CONFIG_MMC1_CD_PIN	board/sunxi/Kconfig	/^config MMC1_CD_PIN$/;"	c
CONFIG_MMC1_CD_PIN	include/config/auto.conf	/^CONFIG_MMC1_CD_PIN=""$/;"	k
CONFIG_MMC1_CD_PIN	include/generated/autoconf.h	/^#define CONFIG_MMC1_CD_PIN /;"	d
CONFIG_MMC1_CD_PIN_MODULE	board/sunxi/Kconfig	/^config MMC1_CD_PIN$/;"	c
CONFIG_MMC1_PINS	board/sunxi/Kconfig	/^config MMC1_PINS$/;"	c
CONFIG_MMC1_PINS	include/config/auto.conf	/^CONFIG_MMC1_PINS=""$/;"	k
CONFIG_MMC1_PINS	include/generated/autoconf.h	/^#define CONFIG_MMC1_PINS /;"	d
CONFIG_MMC1_PINS_MODULE	board/sunxi/Kconfig	/^config MMC1_PINS$/;"	c
CONFIG_MMC2_CD_PIN	board/sunxi/Kconfig	/^config MMC2_CD_PIN$/;"	c
CONFIG_MMC2_CD_PIN	include/config/auto.conf	/^CONFIG_MMC2_CD_PIN=""$/;"	k
CONFIG_MMC2_CD_PIN	include/generated/autoconf.h	/^#define CONFIG_MMC2_CD_PIN /;"	d
CONFIG_MMC2_CD_PIN_MODULE	board/sunxi/Kconfig	/^config MMC2_CD_PIN$/;"	c
CONFIG_MMC2_PINS	board/sunxi/Kconfig	/^config MMC2_PINS$/;"	c
CONFIG_MMC2_PINS	include/config/auto.conf	/^CONFIG_MMC2_PINS=""$/;"	k
CONFIG_MMC2_PINS	include/generated/autoconf.h	/^#define CONFIG_MMC2_PINS /;"	d
CONFIG_MMC2_PINS_MODULE	board/sunxi/Kconfig	/^config MMC2_PINS$/;"	c
CONFIG_MMC3_CD_PIN	board/sunxi/Kconfig	/^config MMC3_CD_PIN$/;"	c
CONFIG_MMC3_CD_PIN	include/config/auto.conf	/^CONFIG_MMC3_CD_PIN=""$/;"	k
CONFIG_MMC3_CD_PIN	include/generated/autoconf.h	/^#define CONFIG_MMC3_CD_PIN /;"	d
CONFIG_MMC3_CD_PIN_MODULE	board/sunxi/Kconfig	/^config MMC3_CD_PIN$/;"	c
CONFIG_MMC3_PINS	board/sunxi/Kconfig	/^config MMC3_PINS$/;"	c
CONFIG_MMC3_PINS	include/config/auto.conf	/^CONFIG_MMC3_PINS=""$/;"	k
CONFIG_MMC3_PINS	include/generated/autoconf.h	/^#define CONFIG_MMC3_PINS /;"	d
CONFIG_MMC3_PINS_MODULE	board/sunxi/Kconfig	/^config MMC3_PINS$/;"	c
CONFIG_MMCBOOTCOMMAND	include/configs/ge_bx50v3.h	/^#define CONFIG_MMCBOOTCOMMAND /;"	d
CONFIG_MMCBOOTCOMMAND	include/configs/hrcon.h	/^#define CONFIG_MMCBOOTCOMMAND	/;"	d
CONFIG_MMCBOOTCOMMAND	include/configs/strider.h	/^#define CONFIG_MMCBOOTCOMMAND	/;"	d
CONFIG_MMCROOT	include/configs/aristainetos-common.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/cgtqmx6eval.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/colibri_imx7.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/embestmx6boards.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/mx6qsabreauto.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/mx6sabresd.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/mx6ullevk.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/mx7dsabresd.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/pico-imx6ul.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/xpress.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/zc5202.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMCROOT	include/configs/zc5601.h	/^#define CONFIG_MMCROOT	/;"	d
CONFIG_MMC_DEFAULT_DEV	include/configs/exynos4-common.h	/^#define CONFIG_MMC_DEFAULT_DEV	/;"	d
CONFIG_MMC_DEFAULT_DEV	include/configs/s5p_goni.h	/^#define CONFIG_MMC_DEFAULT_DEV	/;"	d
CONFIG_MMC_MODULE	board/sunxi/Kconfig	/^config MMC$/;"	c
CONFIG_MMC_MODULE	drivers/mmc/Kconfig	/^config MMC$/;"	c	menu:MMC Host controller Support
CONFIG_MMC_SDHCI_IO_ACCESSORS	include/configs/rpi.h	/^#define CONFIG_MMC_SDHCI_IO_ACCESSORS$/;"	d
CONFIG_MMC_SDMA	include/configs/bayleybay.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/bcm23550_w1d.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/bcm28155_ap.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/clearfog.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/crownbay.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/db-88f6820-gp.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/dfi-bt700.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/exynos4-common.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/galileo.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SDMA	include/configs/minnowmax.h	/^#define CONFIG_MMC_SDMA$/;"	d
CONFIG_MMC_SPI	include/configs/UCP1020.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI	include/configs/bf537-stamp.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI	include/configs/cm-bf537e.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI	include/configs/cm-bf537u.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI	include/configs/edb93xx.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI	include/configs/tcm-bf537.h	/^#define CONFIG_MMC_SPI$/;"	d
CONFIG_MMC_SPI_BUS	cmd/mmc_spi.c	/^# define CONFIG_MMC_SPI_BUS /;"	d	file:
CONFIG_MMC_SPI_CS	cmd/mmc_spi.c	/^# define CONFIG_MMC_SPI_CS /;"	d	file:
CONFIG_MMC_SPI_CS_EPGIO	board/cirrus/edb93xx/edb93xx.c	/^# define CONFIG_MMC_SPI_CS_EPGIO	/;"	d	file:
CONFIG_MMC_SPI_MODE	board/cirrus/edb93xx/edb93xx.c	/^# define CONFIG_MMC_SPI_MODE	/;"	d	file:
CONFIG_MMC_SPI_MODE	cmd/mmc_spi.c	/^# define CONFIG_MMC_SPI_MODE /;"	d	file:
CONFIG_MMC_SPI_NPOWER_EGPIO	include/configs/edb93xx.h	/^#define CONFIG_MMC_SPI_NPOWER_EGPIO	/;"	d
CONFIG_MMC_SPI_SPEED	board/cirrus/edb93xx/edb93xx.c	/^# define CONFIG_MMC_SPI_SPEED	/;"	d	file:
CONFIG_MMC_SPI_SPEED	cmd/mmc_spi.c	/^# define CONFIG_MMC_SPI_SPEED /;"	d	file:
CONFIG_MMC_SUNXI	include/autoconf.mk	/^CONFIG_MMC_SUNXI=y$/;"	m
CONFIG_MMC_SUNXI	include/configs/sunxi-common.h	/^#define CONFIG_MMC_SUNXI$/;"	d
CONFIG_MMC_SUNXI	spl/include/autoconf.mk	/^CONFIG_MMC_SUNXI=y$/;"	m
CONFIG_MMC_SUNXI_SLOT	include/autoconf.mk	/^CONFIG_MMC_SUNXI_SLOT=0$/;"	m
CONFIG_MMC_SUNXI_SLOT	include/configs/sunxi-common.h	/^#define CONFIG_MMC_SUNXI_SLOT	/;"	d
CONFIG_MMC_SUNXI_SLOT	spl/include/autoconf.mk	/^CONFIG_MMC_SUNXI_SLOT=0$/;"	m
CONFIG_MMC_SUNXI_SLOT_EXTRA	board/sunxi/Kconfig	/^config MMC_SUNXI_SLOT_EXTRA$/;"	c
CONFIG_MMC_SUNXI_SLOT_EXTRA	include/config/auto.conf	/^CONFIG_MMC_SUNXI_SLOT_EXTRA=-1$/;"	k
CONFIG_MMC_SUNXI_SLOT_EXTRA	include/generated/autoconf.h	/^#define CONFIG_MMC_SUNXI_SLOT_EXTRA /;"	d
CONFIG_MMC_SUNXI_SLOT_EXTRA_MODULE	board/sunxi/Kconfig	/^config MMC_SUNXI_SLOT_EXTRA$/;"	c
CONFIG_MMC_UNIPHIER	drivers/mmc/Kconfig	/^config MMC_UNIPHIER$/;"	c	menu:MMC Host controller Support
CONFIG_MMC_UNIPHIER_MODULE	drivers/mmc/Kconfig	/^config MMC_UNIPHIER$/;"	c	menu:MMC Host controller Support
CONFIG_MMU	arch/arc/config.mk	/^CONFIG_MMU = 1$/;"	m
CONFIG_MONITOR_IS_IN_RAM	include/configs/10m50_devboard.h	/^#define CONFIG_MONITOR_IS_IN_RAM$/;"	d
CONFIG_MONITOR_IS_IN_RAM	include/configs/3c120_devboard.h	/^#define CONFIG_MONITOR_IS_IN_RAM$/;"	d
CONFIG_MONITOR_IS_IN_RAM	include/configs/astro_mcf5373l.h	/^#define CONFIG_MONITOR_IS_IN_RAM$/;"	d
CONFIG_MONITOR_IS_IN_RAM	include/configs/bfin_adi_common.h	/^#define CONFIG_MONITOR_IS_IN_RAM$/;"	d
CONFIG_MONITOR_IS_IN_RAM	include/configs/openrisc-generic.h	/^#define CONFIG_MONITOR_IS_IN_RAM$/;"	d
CONFIG_MOTIONPRO	include/configs/motionpro.h	/^#define CONFIG_MOTIONPRO	/;"	d
CONFIG_MP	include/configs/B4860QDS.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/BSC9132QDS.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/MPC8572DS.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/MPC8641HPCN.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/P1022DS.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/P1023RDB.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/P2041RDB.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T102xQDS.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T102xRDB.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T1040QDS.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T104xRDB.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T208xQDS.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T208xRDB.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/T4240RDB.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/UCP1020.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/controlcenterd.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/corenet_ds.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/cyrus.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/km/kmp204x-common.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/ls1043a_common.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/ls1046a_common.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/ls2080a_common.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/mx6_common.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/p1_twr.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/sbc8641d.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/t4qds.h	/^#define CONFIG_MP	/;"	d
CONFIG_MP	include/configs/xilinx_zynqmp.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/xpedite537x.h	/^#define CONFIG_MP$/;"	d
CONFIG_MP	include/configs/xpedite550x.h	/^#define CONFIG_MP$/;"	d
CONFIG_MPC5121ADS	include/configs/mpc5121ads.h	/^#define CONFIG_MPC5121ADS /;"	d
CONFIG_MPC512X	arch/powerpc/Kconfig	/^config MPC512X$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC512X_MODULE	arch/powerpc/Kconfig	/^config MPC512X$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC512x_FEC	include/configs/ac14xx.h	/^#define CONFIG_MPC512x_FEC	/;"	d
CONFIG_MPC512x_FEC	include/configs/aria.h	/^#define CONFIG_MPC512x_FEC	/;"	d
CONFIG_MPC512x_FEC	include/configs/mecp5123.h	/^#define CONFIG_MPC512x_FEC	/;"	d
CONFIG_MPC512x_FEC	include/configs/mpc5121ads.h	/^#define CONFIG_MPC512x_FEC	/;"	d
CONFIG_MPC512x_FEC	include/configs/pdm360ng.h	/^#define CONFIG_MPC512x_FEC	/;"	d
CONFIG_MPC5200	include/configs/TQM5200.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/a3m071.h	/^#define CONFIG_MPC5200$/;"	d
CONFIG_MPC5200	include/configs/a4m072.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/canmb.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/cm5200.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/digsy_mtc.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/inka4x0.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/ipek01.h	/^#define CONFIG_MPC5200$/;"	d
CONFIG_MPC5200	include/configs/jupiter.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/motionpro.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/munices.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/o2dnt-common.h	/^#define CONFIG_MPC5200$/;"	d
CONFIG_MPC5200	include/configs/pcm030.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200	include/configs/v38b.h	/^#define CONFIG_MPC5200	/;"	d
CONFIG_MPC5200_DDR	include/configs/a4m072.h	/^#define CONFIG_MPC5200_DDR	/;"	d
CONFIG_MPC5200_DDR	include/configs/ipek01.h	/^#define CONFIG_MPC5200_DDR	/;"	d
CONFIG_MPC5200_DDR	include/configs/munices.h	/^#define CONFIG_MPC5200_DDR	/;"	d
CONFIG_MPC5200_DDR	include/configs/pcm030.h	/^#define CONFIG_MPC5200_DDR	/;"	d
CONFIG_MPC5200_DDR	include/configs/v38b.h	/^#define CONFIG_MPC5200_DDR	/;"	d
CONFIG_MPC52XX_SPI	include/configs/digsy_mtc.h	/^#define CONFIG_MPC52XX_SPI	/;"	d
CONFIG_MPC555	include/configs/PATI.h	/^#define CONFIG_MPC555	/;"	d
CONFIG_MPC5xxx	arch/powerpc/Kconfig	/^config MPC5xxx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC5xxx_FEC	include/configs/TQM5200.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/a3m071.h	/^#define CONFIG_MPC5xxx_FEC$/;"	d
CONFIG_MPC5xxx_FEC	include/configs/a4m072.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/canmb.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/cm5200.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/digsy_mtc.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/inka4x0.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/ipek01.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/jupiter.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/motionpro.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/munices.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/o2dnt-common.h	/^#define CONFIG_MPC5xxx_FEC$/;"	d
CONFIG_MPC5xxx_FEC	include/configs/pcm030.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC	include/configs/v38b.h	/^#define CONFIG_MPC5xxx_FEC	/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/TQM5200.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/a3m071.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/a4m072.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/canmb.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/cm5200.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/digsy_mtc.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/inka4x0.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/ipek01.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/jupiter.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/motionpro.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/munices.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/o2dnt-common.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/pcm030.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_FEC_MII100	include/configs/v38b.h	/^#define CONFIG_MPC5xxx_FEC_MII100$/;"	d
CONFIG_MPC5xxx_MODULE	arch/powerpc/Kconfig	/^config MPC5xxx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC823	include/configs/TQM823L.h	/^#define CONFIG_MPC823	/;"	d
CONFIG_MPC823	include/configs/TQM823M.h	/^#define CONFIG_MPC823	/;"	d
CONFIG_MPC8247	include/configs/km82xx.h	/^#define CONFIG_MPC8247$/;"	d
CONFIG_MPC8260	arch/powerpc/Kconfig	/^config MPC8260$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC8260_MODULE	arch/powerpc/Kconfig	/^config MPC8260$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC8272_FAMILY	include/common.h	/^#define CONFIG_MPC8272_FAMILY	/;"	d
CONFIG_MPC8308	include/configs/MPC8308RDB.h	/^#define CONFIG_MPC8308	/;"	d
CONFIG_MPC8308	include/configs/hrcon.h	/^#define CONFIG_MPC8308	/;"	d
CONFIG_MPC8308	include/configs/mpc8308_p1m.h	/^#define CONFIG_MPC8308	/;"	d
CONFIG_MPC8308	include/configs/strider.h	/^#define CONFIG_MPC8308	/;"	d
CONFIG_MPC8308RDB	include/configs/MPC8308RDB.h	/^#define CONFIG_MPC8308RDB	/;"	d
CONFIG_MPC8308_P1M	include/configs/mpc8308_p1m.h	/^#define CONFIG_MPC8308_P1M	/;"	d
CONFIG_MPC8309	include/configs/km/km8309-common.h	/^#define CONFIG_MPC8309	/;"	d
CONFIG_MPC830x	include/configs/MPC8308RDB.h	/^#define CONFIG_MPC830x	/;"	d
CONFIG_MPC830x	include/configs/hrcon.h	/^#define CONFIG_MPC830x	/;"	d
CONFIG_MPC830x	include/configs/km/km8309-common.h	/^#define CONFIG_MPC830x	/;"	d
CONFIG_MPC830x	include/configs/mpc8308_p1m.h	/^#define CONFIG_MPC830x	/;"	d
CONFIG_MPC830x	include/configs/strider.h	/^#define CONFIG_MPC830x	/;"	d
CONFIG_MPC8313	include/configs/MPC8313ERDB.h	/^#define CONFIG_MPC8313	/;"	d
CONFIG_MPC8313	include/configs/ids8313.h	/^#define CONFIG_MPC8313$/;"	d
CONFIG_MPC8313	include/configs/ve8313.h	/^#define CONFIG_MPC8313	/;"	d
CONFIG_MPC8313ERDB	include/configs/MPC8313ERDB.h	/^#define CONFIG_MPC8313ERDB	/;"	d
CONFIG_MPC8315	include/configs/MPC8315ERDB.h	/^#define CONFIG_MPC8315	/;"	d
CONFIG_MPC8315ERDB	include/configs/MPC8315ERDB.h	/^#define CONFIG_MPC8315ERDB	/;"	d
CONFIG_MPC831x	include/configs/MPC8313ERDB.h	/^#define CONFIG_MPC831x	/;"	d
CONFIG_MPC831x	include/configs/MPC8315ERDB.h	/^#define CONFIG_MPC831x	/;"	d
CONFIG_MPC831x	include/configs/ids8313.h	/^#define CONFIG_MPC831x$/;"	d
CONFIG_MPC831x	include/configs/ve8313.h	/^#define CONFIG_MPC831x	/;"	d
CONFIG_MPC832XEMDS	include/configs/MPC832XEMDS.h	/^#define CONFIG_MPC832XEMDS	/;"	d
CONFIG_MPC832x	include/configs/MPC8323ERDB.h	/^#define CONFIG_MPC832x	/;"	d
CONFIG_MPC832x	include/configs/MPC832XEMDS.h	/^#define CONFIG_MPC832x	/;"	d
CONFIG_MPC832x	include/configs/km/km8321-common.h	/^#define CONFIG_MPC832x	/;"	d
CONFIG_MPC8349	include/configs/MPC8349EMDS.h	/^#define CONFIG_MPC8349	/;"	d
CONFIG_MPC8349	include/configs/MPC8349ITX.h	/^#define CONFIG_MPC8349	/;"	d
CONFIG_MPC8349	include/configs/TQM834x.h	/^#define CONFIG_MPC8349	/;"	d
CONFIG_MPC8349	include/configs/sbc8349.h	/^#define CONFIG_MPC8349	/;"	d
CONFIG_MPC8349	include/configs/vme8349.h	/^#define CONFIG_MPC8349	/;"	d
CONFIG_MPC8349EMDS	include/configs/MPC8349EMDS.h	/^#define CONFIG_MPC8349EMDS	/;"	d
CONFIG_MPC834x	include/configs/MPC8349EMDS.h	/^#define CONFIG_MPC834x	/;"	d
CONFIG_MPC834x	include/configs/MPC8349ITX.h	/^#define CONFIG_MPC834x	/;"	d
CONFIG_MPC834x	include/configs/TQM834x.h	/^#define CONFIG_MPC834x	/;"	d
CONFIG_MPC834x	include/configs/sbc8349.h	/^#define CONFIG_MPC834x	/;"	d
CONFIG_MPC834x	include/configs/vme8349.h	/^#define CONFIG_MPC834x	/;"	d
CONFIG_MPC8360	include/configs/km8360.h	/^#define CONFIG_MPC8360	/;"	d
CONFIG_MPC837XEMDS	include/configs/MPC837XEMDS.h	/^#define CONFIG_MPC837XEMDS	/;"	d
CONFIG_MPC837XERDB	include/configs/MPC837XERDB.h	/^#define CONFIG_MPC837XERDB	/;"	d
CONFIG_MPC837x	include/configs/MPC837XEMDS.h	/^#define CONFIG_MPC837x	/;"	d
CONFIG_MPC837x	include/configs/MPC837XERDB.h	/^#define CONFIG_MPC837x	/;"	d
CONFIG_MPC83XX_GPIO	include/configs/MPC8313ERDB.h	/^#define CONFIG_MPC83XX_GPIO /;"	d
CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION	drivers/gpio/mpc83xx_gpio.c	/^#define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION /;"	d	file:
CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN	drivers/gpio/mpc83xx_gpio.c	/^#define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN /;"	d	file:
CONFIG_MPC83XX_GPIO_0_INIT_VALUE	drivers/gpio/mpc83xx_gpio.c	/^#define CONFIG_MPC83XX_GPIO_0_INIT_VALUE /;"	d	file:
CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION	drivers/gpio/mpc83xx_gpio.c	/^#define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION /;"	d	file:
CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN	drivers/gpio/mpc83xx_gpio.c	/^#define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN /;"	d	file:
CONFIG_MPC83XX_GPIO_1_INIT_VALUE	drivers/gpio/mpc83xx_gpio.c	/^#define CONFIG_MPC83XX_GPIO_1_INIT_VALUE /;"	d	file:
CONFIG_MPC83XX_PCI2	include/configs/MPC8349ITX.h	/^#define CONFIG_MPC83XX_PCI2$/;"	d
CONFIG_MPC83xx	arch/powerpc/Kconfig	/^config MPC83xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC83xx	include/configs/hrcon.h	/^#define CONFIG_MPC83xx	/;"	d
CONFIG_MPC83xx	include/configs/strider.h	/^#define CONFIG_MPC83xx	/;"	d
CONFIG_MPC83xx_MODULE	arch/powerpc/Kconfig	/^config MPC83xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC850	include/configs/TQM850L.h	/^#define CONFIG_MPC850	/;"	d
CONFIG_MPC850	include/configs/TQM850M.h	/^#define CONFIG_MPC850	/;"	d
CONFIG_MPC8536	include/configs/MPC8536DS.h	/^#define CONFIG_MPC8536	/;"	d
CONFIG_MPC8536DS	include/configs/MPC8536DS.h	/^#define CONFIG_MPC8536DS	/;"	d
CONFIG_MPC8540	include/configs/MPC8540ADS.h	/^#define CONFIG_MPC8540	/;"	d
CONFIG_MPC8540ADS	include/configs/MPC8540ADS.h	/^#define CONFIG_MPC8540ADS	/;"	d
CONFIG_MPC8541	include/configs/MPC8541CDS.h	/^#define CONFIG_MPC8541	/;"	d
CONFIG_MPC8541CDS	include/configs/MPC8541CDS.h	/^#define CONFIG_MPC8541CDS	/;"	d
CONFIG_MPC8544	include/configs/MPC8544DS.h	/^#define CONFIG_MPC8544	/;"	d
CONFIG_MPC8544	include/configs/socrates.h	/^#define CONFIG_MPC8544	/;"	d
CONFIG_MPC8544DS	include/configs/MPC8544DS.h	/^#define CONFIG_MPC8544DS	/;"	d
CONFIG_MPC8548	include/configs/MPC8548CDS.h	/^#define CONFIG_MPC8548	/;"	d
CONFIG_MPC8548	include/configs/sbc8548.h	/^#define CONFIG_MPC8548	/;"	d
CONFIG_MPC8548	include/configs/xpedite520x.h	/^#define CONFIG_MPC8548	/;"	d
CONFIG_MPC8548CDS	include/configs/MPC8548CDS.h	/^#define CONFIG_MPC8548CDS	/;"	d
CONFIG_MPC855	include/configs/TQM855L.h	/^#define CONFIG_MPC855	/;"	d
CONFIG_MPC855	include/configs/TQM855M.h	/^#define CONFIG_MPC855	/;"	d
CONFIG_MPC8555	include/configs/MPC8555CDS.h	/^#define CONFIG_MPC8555	/;"	d
CONFIG_MPC8555CDS	include/configs/MPC8555CDS.h	/^#define CONFIG_MPC8555CDS	/;"	d
CONFIG_MPC8560	include/configs/MPC8560ADS.h	/^#define CONFIG_MPC8560	/;"	d
CONFIG_MPC8560ADS	include/configs/MPC8560ADS.h	/^#define CONFIG_MPC8560ADS	/;"	d
CONFIG_MPC8568	include/configs/MPC8568MDS.h	/^#define CONFIG_MPC8568	/;"	d
CONFIG_MPC8568MDS	include/configs/MPC8568MDS.h	/^#define CONFIG_MPC8568MDS	/;"	d
CONFIG_MPC8569	include/configs/MPC8569MDS.h	/^#define CONFIG_MPC8569	/;"	d
CONFIG_MPC8569MDS	include/configs/MPC8569MDS.h	/^#define CONFIG_MPC8569MDS	/;"	d
CONFIG_MPC8572	include/configs/MPC8572DS.h	/^#define CONFIG_MPC8572	/;"	d
CONFIG_MPC8572	include/configs/xpedite537x.h	/^#define CONFIG_MPC8572	/;"	d
CONFIG_MPC8572DS	include/configs/MPC8572DS.h	/^#define CONFIG_MPC8572DS	/;"	d
CONFIG_MPC85XX_FEC	include/configs/MPC8540ADS.h	/^#define CONFIG_MPC85XX_FEC	/;"	d
CONFIG_MPC85XX_FEC_NAME	include/configs/MPC8540ADS.h	/^#define CONFIG_MPC85XX_FEC_NAME	/;"	d
CONFIG_MPC85XX_GPIO	drivers/gpio/Kconfig	/^config MPC85XX_GPIO$/;"	c	menu:GPIO Support
CONFIG_MPC85XX_GPIO_MODULE	drivers/gpio/Kconfig	/^config MPC85XX_GPIO$/;"	c	menu:GPIO Support
CONFIG_MPC85XX_PCI2	include/configs/MPC8541CDS.h	/^#define CONFIG_MPC85XX_PCI2$/;"	d
CONFIG_MPC85XX_PCI2	include/configs/MPC8555CDS.h	/^#define CONFIG_MPC85XX_PCI2$/;"	d
CONFIG_MPC85xx	arch/powerpc/Kconfig	/^config MPC85xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC85xx_MODULE	arch/powerpc/Kconfig	/^config MPC85xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC860	include/configs/TQM860L.h	/^#define CONFIG_MPC860	/;"	d
CONFIG_MPC860	include/configs/TQM860M.h	/^#define CONFIG_MPC860	/;"	d
CONFIG_MPC860	include/configs/TQM862L.h	/^#define CONFIG_MPC860	/;"	d
CONFIG_MPC860	include/configs/TQM862M.h	/^#define CONFIG_MPC860	/;"	d
CONFIG_MPC860T	include/configs/TQM862L.h	/^#define CONFIG_MPC860T	/;"	d
CONFIG_MPC860T	include/configs/TQM862M.h	/^#define CONFIG_MPC860T	/;"	d
CONFIG_MPC8610	include/configs/MPC8610HPCD.h	/^#define CONFIG_MPC8610	/;"	d
CONFIG_MPC8610HPCD	include/configs/MPC8610HPCD.h	/^#define CONFIG_MPC8610HPCD	/;"	d
CONFIG_MPC862	include/configs/TQM862L.h	/^#define CONFIG_MPC862	/;"	d
CONFIG_MPC862	include/configs/TQM862M.h	/^#define CONFIG_MPC862	/;"	d
CONFIG_MPC8641	include/configs/MPC8641HPCN.h	/^#define CONFIG_MPC8641	/;"	d
CONFIG_MPC8641	include/configs/sbc8641d.h	/^#define CONFIG_MPC8641	/;"	d
CONFIG_MPC8641	include/configs/xpedite517x.h	/^#define CONFIG_MPC8641	/;"	d
CONFIG_MPC8641HPCN	include/configs/MPC8641HPCN.h	/^#define CONFIG_MPC8641HPCN	/;"	d
CONFIG_MPC866	include/configs/TQM866M.h	/^#define CONFIG_MPC866	/;"	d
CONFIG_MPC866_FAMILY	include/common.h	/^# define CONFIG_MPC866_FAMILY /;"	d
CONFIG_MPC86x	include/common.h	/^# define CONFIG_MPC86x /;"	d
CONFIG_MPC86xx	arch/powerpc/Kconfig	/^config MPC86xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC86xx_MODULE	arch/powerpc/Kconfig	/^config MPC86xx$/;"	c	choice:PowerPC architecture""choice207a02820104
CONFIG_MPC885	include/configs/TQM885D.h	/^#define CONFIG_MPC885	/;"	d
CONFIG_MPC885_FAMILY	include/common.h	/^# define CONFIG_MPC885_FAMILY /;"	d
CONFIG_MPC8XXX_SPI	include/configs/MPC8349EMDS.h	/^#define CONFIG_MPC8XXX_SPI$/;"	d
CONFIG_MPC8XXX_SPI	include/configs/ids8313.h	/^#define CONFIG_MPC8XXX_SPI$/;"	d
CONFIG_MPC8XX_LCD	include/configs/TQM823L.h	/^#define CONFIG_MPC8XX_LCD$/;"	d
CONFIG_MPC8XX_LCD	include/configs/TQM823M.h	/^#define CONFIG_MPC8XX_LCD$/;"	d
CONFIG_MPC8xxx_DISABLE_BPTR	include/configs/xpedite537x.h	/^#define CONFIG_MPC8xxx_DISABLE_BPTR	/;"	d
CONFIG_MPC8xxx_DISABLE_BPTR	include/configs/xpedite550x.h	/^#define CONFIG_MPC8xxx_DISABLE_BPTR	/;"	d
CONFIG_MPLL_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_MPLL_FREQ	/;"	d
CONFIG_MPR2	include/configs/mpr2.h	/^#define CONFIG_MPR2	/;"	d
CONFIG_MPX5200	include/configs/ipek01.h	/^#define CONFIG_MPX5200	/;"	d
CONFIG_MP_CLK_FREQ	include/configs/lager.h	/^#define CONFIG_MP_CLK_FREQ	/;"	d
CONFIG_MP_CLK_FREQ	include/configs/stout.h	/^#define CONFIG_MP_CLK_FREQ	/;"	d
CONFIG_MS7720SE	include/configs/ms7720se.h	/^#define CONFIG_MS7720SE	/;"	d
CONFIG_MS7722SE	include/configs/ms7722se.h	/^#define CONFIG_MS7722SE	/;"	d
CONFIG_MS7750SE	include/configs/ms7750se.h	/^#define CONFIG_MS7750SE	/;"	d
CONFIG_MSHC_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_MSHC_FREQ	/;"	d
CONFIG_MSM_GPIO	drivers/gpio/Kconfig	/^config MSM_GPIO$/;"	c	menu:GPIO Support
CONFIG_MSM_GPIO_MODULE	drivers/gpio/Kconfig	/^config MSM_GPIO$/;"	c	menu:GPIO Support
CONFIG_MSM_SDHCI	drivers/mmc/Kconfig	/^config MSM_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_MSM_SDHCI_MODULE	drivers/mmc/Kconfig	/^config MSM_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_MSM_SERIAL	drivers/serial/Kconfig	/^config MSM_SERIAL$/;"	c	menu:Serial drivers
CONFIG_MSM_SERIAL_MODULE	drivers/serial/Kconfig	/^config MSM_SERIAL$/;"	c	menu:Serial drivers
CONFIG_MTD	drivers/mtd/Kconfig	/^config MTD$/;"	c	menu:MTD Support
CONFIG_MTDMAP	include/configs/apf27.h	/^#define CONFIG_MTDMAP	/;"	d
CONFIG_MTDPARTS	include/configs/dockstar.h	/^#define CONFIG_MTDPARTS	/;"	d
CONFIG_MTDPARTS	include/configs/goflexhome.h	/^#define CONFIG_MTDPARTS /;"	d
CONFIG_MTDPARTS	include/configs/guruplug.h	/^#define CONFIG_MTDPARTS	/;"	d
CONFIG_MTDPARTS	include/configs/ib62x0.h	/^#define CONFIG_MTDPARTS /;"	d
CONFIG_MTDPARTS	include/configs/iconnect.h	/^#define CONFIG_MTDPARTS /;"	d
CONFIG_MTDPARTS	include/configs/nsa310s.h	/^#define CONFIG_MTDPARTS /;"	d
CONFIG_MTDPARTS	include/configs/sheevaplug.h	/^#define CONFIG_MTDPARTS	/;"	d
CONFIG_MTD_CONCAT	include/configs/etamin.h	/^#define CONFIG_MTD_CONCAT$/;"	d
CONFIG_MTD_CONCAT	include/configs/km/keymile-common.h	/^#define CONFIG_MTD_CONCAT$/;"	d
CONFIG_MTD_DEVICE	include/configs/10m50_devboard.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/BSC9131RDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/BSC9132QDS.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/M54418TWR.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/M54418TWR.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/MPC8313ERDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/MPC8315ERDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/P1010RDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/P1022DS.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/PLU405.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/T102xQDS.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/T102xRDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/T1040QDS.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/T104xRDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/T208xQDS.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/T208xRDB.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM5200.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM823L.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM823M.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM834x.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM850L.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM850M.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM855L.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM855M.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM860L.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM860M.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM862L.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM862M.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/TQM866M.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/VCMA9.h	/^#define CONFIG_MTD_DEVICE /;"	d
CONFIG_MTD_DEVICE	include/configs/a3m071.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/am335x_igep0033.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/am3517_evm.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/apf27.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/apx4devkit.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/aria.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/aristainetos-common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/at91sam9n12ek.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/at91sam9x5ek.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/atngw100mkii.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/baltos.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/bct-brettl2.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/brppt1.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/cm5200.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/cm_fx6.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/cm_t35.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/cm_t3517.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/colibri_imx7.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/colibri_t20.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/colibri_vf.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/corvus.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/da850evm.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/dockstar.h	/^#define CONFIG_MTD_DEVICE /;"	d
CONFIG_MTD_DEVICE	include/configs/ea20.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/ethernut5.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/flea3.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/gw_ventana.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/iconnect.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/ids8313.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/imx27lite-common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/imx6qdl_icore.h	/^# define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/ipam390.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/km/keymile-common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/m28evk.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/m53evk.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/mcx.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/microblaze-generic.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/motionpro.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/mpc5121ads.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/mv-common.h	/^#define CONFIG_MTD_DEVICE /;"	d
CONFIG_MTD_DEVICE	include/configs/mx28evk.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/mx35pdk.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/nas220.h	/^#define CONFIG_MTD_DEVICE /;"	d
CONFIG_MTD_DEVICE	include/configs/nokia_rx51.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/omap3_logic.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/omapl138_lcdk.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/p1_twr.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/pcm052.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/pcm058.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/pdm360ng.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/platinum.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/pogo_e02.h	/^#define CONFIG_MTD_DEVICE /;"	d
CONFIG_MTD_DEVICE	include/configs/s5pc210_universal.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/sama5d3_xplained.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/siemens-am33x-common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/smartweb.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/smdk2410.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/smdkc100.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/socfpga_common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/spear-common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/tam3517-common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/tao3530.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/taurus.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/ti_armv7_common.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/titanium.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/tricorder.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/tricorder.h	/^#define CONFIG_MTD_DEVICE /;"	d
CONFIG_MTD_DEVICE	include/configs/uniphier.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/vct.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/vf610twr.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/woodburn_common.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/x600.h	/^#define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_DEVICE	include/configs/xilinx-ppc.h	/^#define CONFIG_MTD_DEVICE	/;"	d
CONFIG_MTD_DEVICE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_MTD_DEVICE$/;"	d
CONFIG_MTD_ECC_SOFT	include/configs/x600.h	/^#define CONFIG_MTD_ECC_SOFT$/;"	d
CONFIG_MTD_MODULE	drivers/mtd/Kconfig	/^config MTD$/;"	c	menu:MTD Support
CONFIG_MTD_NAND_ECC_SMC	drivers/mtd/nand/nand_ecc.c	/^#define CONFIG_MTD_NAND_ECC_SMC$/;"	d	file:
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls1043aqds.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls1043ardb.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls1046aqds.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls1046ardb.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls2080a_simu.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls2080aqds.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_NAND_VERIFY_WRITE	include/configs/ls2080ardb.h	/^#define CONFIG_MTD_NAND_VERIFY_WRITE$/;"	d
CONFIG_MTD_PARTITION	include/configs/MPC8313ERDB.h	/^#define CONFIG_MTD_PARTITION$/;"	d
CONFIG_MTD_PARTITION	include/configs/MPC8315ERDB.h	/^#define CONFIG_MTD_PARTITION$/;"	d
CONFIG_MTD_PARTITION	include/configs/P1010RDB.h	/^#define CONFIG_MTD_PARTITION$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/BSC9131RDB.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/BSC9132QDS.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/M54418TWR.h	/^#define CONFIG_MTD_PARTITIONS	/;"	d
CONFIG_MTD_PARTITIONS	include/configs/P1022DS.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/PLU405.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/T102xQDS.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/T102xRDB.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/T1040QDS.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/T104xRDB.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/T208xQDS.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/T208xRDB.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/VCMA9.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/a3m071.h	/^#define CONFIG_MTD_PARTITIONS	/;"	d
CONFIG_MTD_PARTITIONS	include/configs/am335x_igep0033.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/am3517_evm.h	/^#define CONFIG_MTD_PARTITIONS	/;"	d
CONFIG_MTD_PARTITIONS	include/configs/apf27.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/apx4devkit.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/aristainetos-common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/at91sam9n12ek.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/at91sam9x5ek.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/atngw100mkii.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/baltos.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/bct-brettl2.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/cm_fx6.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/cm_t35.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/cm_t3517.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/colibri_imx7.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/colibri_t20.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/colibri_vf.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/corvus.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/da850evm.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/dockstar.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/ea20.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/ethernut5.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/flea3.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/gw_ventana.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/hikey.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/iconnect.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/ids8313.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/imx6qdl_icore.h	/^# define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/ipam390.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/km/keymile-common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/m28evk.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/m53evk.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/mcx.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/microblaze-generic.h	/^# define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/mv-common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/mx28evk.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/mx35pdk.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/nas220.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/nokia_rx51.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/omap3_igep00x0.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/omap3_logic.h	/^#define CONFIG_MTD_PARTITIONS	/;"	d
CONFIG_MTD_PARTITIONS	include/configs/omap3_overo.h	/^#define CONFIG_MTD_PARTITIONS	/;"	d
CONFIG_MTD_PARTITIONS	include/configs/omap3_pandora.h	/^#define CONFIG_MTD_PARTITIONS	/;"	d
CONFIG_MTD_PARTITIONS	include/configs/omapl138_lcdk.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/p1_twr.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/pcm052.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/pcm058.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/platinum.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/pogo_e02.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/s5pc210_universal.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/sama5d3_xplained.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/siemens-am33x-common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/smartweb.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/smdk2410.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/smdkc100.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/socfpga_common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/spear-common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/tam3517-common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/taurus.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/titanium.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/tricorder.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/vct.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/vf610twr.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/woodburn_common.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_PARTITIONS	include/configs/x600.h	/^#define CONFIG_MTD_PARTITIONS$/;"	d
CONFIG_MTD_UBI	drivers/mtd/ubi/Kconfig	/^config MTD_UBI$/;"	c	menu:UBI support
CONFIG_MTD_UBI_BEB_LIMIT	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_BEB_LIMIT$/;"	c	menu:UBI support
CONFIG_MTD_UBI_BEB_LIMIT_MODULE	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_BEB_LIMIT$/;"	c	menu:UBI support
CONFIG_MTD_UBI_BEB_RESERVE	include/ubi_uboot.h	/^#define CONFIG_MTD_UBI_BEB_RESERVE	/;"	d
CONFIG_MTD_UBI_FASTMAP	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FASTMAP$/;"	c	menu:UBI support
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FASTMAP_AUTOCONVERT$/;"	c	menu:UBI support
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT	drivers/mtd/ubi/build.c	/^#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT /;"	d	file:
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT_MODULE	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FASTMAP_AUTOCONVERT$/;"	c	menu:UBI support
CONFIG_MTD_UBI_FASTMAP_MODULE	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FASTMAP$/;"	c	menu:UBI support
CONFIG_MTD_UBI_FM_DEBUG	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FM_DEBUG$/;"	c	menu:UBI support
CONFIG_MTD_UBI_FM_DEBUG	drivers/mtd/ubi/build.c	/^#define CONFIG_MTD_UBI_FM_DEBUG /;"	d	file:
CONFIG_MTD_UBI_FM_DEBUG_MODULE	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FM_DEBUG$/;"	c	menu:UBI support
CONFIG_MTD_UBI_MODULE	drivers/mtd/ubi/Kconfig	/^config MTD_UBI$/;"	c	menu:UBI support
CONFIG_MTD_UBI_MODULE	include/ubi_uboot.h	/^#define CONFIG_MTD_UBI_MODULE$/;"	d
CONFIG_MTD_UBI_WL_THRESHOLD	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_WL_THRESHOLD$/;"	c	menu:UBI support
CONFIG_MTD_UBI_WL_THRESHOLD_MODULE	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_WL_THRESHOLD$/;"	c	menu:UBI support
CONFIG_MULTI_CS	drivers/ddr/marvell/axp/ddr3_init.h	/^	CONFIG_MULTI_CS,$/;"	e	enum:config_type
CONFIG_MUNICES	include/configs/munices.h	/^#define CONFIG_MUNICES	/;"	d
CONFIG_MV78230	arch/arm/mach-mvebu/Kconfig	/^config MV78230$/;"	c
CONFIG_MV78230_MODULE	arch/arm/mach-mvebu/Kconfig	/^config MV78230$/;"	c
CONFIG_MV78260	arch/arm/mach-mvebu/Kconfig	/^config MV78260$/;"	c
CONFIG_MV78260_MODULE	arch/arm/mach-mvebu/Kconfig	/^config MV78260$/;"	c
CONFIG_MV78460	arch/arm/mach-mvebu/Kconfig	/^config MV78460$/;"	c
CONFIG_MV78460_MODULE	arch/arm/mach-mvebu/Kconfig	/^config MV78460$/;"	c
CONFIG_MV88E61XX_FIXED_PORTS	drivers/net/phy/mv88e61xx.c	/^#define CONFIG_MV88E61XX_FIXED_PORTS /;"	d	file:
CONFIG_MV88E6352_SWITCH	include/configs/km_kirkwood.h	/^#define CONFIG_MV88E6352_SWITCH$/;"	d
CONFIG_MV88E6352_SWITCH	include/configs/suvd3.h	/^#define CONFIG_MV88E6352_SWITCH$/;"	d
CONFIG_MV88E6352_SWITCH	include/configs/zc5202.h	/^#define CONFIG_MV88E6352_SWITCH$/;"	d
CONFIG_MVEBU_A3700_SPI	drivers/spi/Kconfig	/^config MVEBU_A3700_SPI$/;"	c	menu:SPI Support
CONFIG_MVEBU_A3700_SPI_MODULE	drivers/spi/Kconfig	/^config MVEBU_A3700_SPI$/;"	c	menu:SPI Support
CONFIG_MVEBU_A3700_UART	drivers/serial/Kconfig	/^config MVEBU_A3700_UART$/;"	c	menu:Serial drivers
CONFIG_MVEBU_A3700_UART_MODULE	drivers/serial/Kconfig	/^config MVEBU_A3700_UART$/;"	c	menu:Serial drivers
CONFIG_MVEBU_COMPHY_SUPPORT	drivers/phy/marvell/Kconfig	/^config MVEBU_COMPHY_SUPPORT$/;"	c
CONFIG_MVEBU_COMPHY_SUPPORT_MODULE	drivers/phy/marvell/Kconfig	/^config MVEBU_COMPHY_SUPPORT$/;"	c
CONFIG_MVEBU_GPIO	drivers/gpio/Kconfig	/^config MVEBU_GPIO$/;"	c	menu:GPIO Support
CONFIG_MVEBU_GPIO_MODULE	drivers/gpio/Kconfig	/^config MVEBU_GPIO$/;"	c	menu:GPIO Support
CONFIG_MVEBU_MMC	include/configs/openrd.h	/^#define CONFIG_MVEBU_MMC$/;"	d
CONFIG_MVEBU_MMC	include/configs/sheevaplug.h	/^#define CONFIG_MVEBU_MMC$/;"	d
CONFIG_MVGBE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_MVGBE	/;"	d
CONFIG_MVGBE	include/configs/edminiv2.h	/^#define CONFIG_MVGBE	/;"	d
CONFIG_MVGBE	include/configs/km/km_arm.h	/^#define CONFIG_MVGBE	/;"	d
CONFIG_MVGBE_PORTS	drivers/net/mvgbe.c	/^# define CONFIG_MVGBE_PORTS /;"	d	file:
CONFIG_MVGBE_PORTS	include/configs/dns325.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/dockstar.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/dreamplug.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/ds109.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/edminiv2.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/goflexhome.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/guruplug.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/ib62x0.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/iconnect.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/km/km_arm.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/lacie_kw.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/lsxl.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/nas220.h	/^#define CONFIG_MVGBE_PORTS /;"	d
CONFIG_MVGBE_PORTS	include/configs/nsa310s.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/openrd.h	/^#  define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/pogo_e02.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVGBE_PORTS	include/configs/sheevaplug.h	/^#define CONFIG_MVGBE_PORTS	/;"	d
CONFIG_MVNETA	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_MVNETA	/;"	d
CONFIG_MVNETA	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_MVNETA	/;"	d
CONFIG_MVPP2	drivers/net/Kconfig	/^config MVPP2$/;"	c
CONFIG_MVPP2_MODULE	drivers/net/Kconfig	/^config MVPP2$/;"	c
CONFIG_MVSATA_IDE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_MVSATA_IDE$/;"	d
CONFIG_MVSATA_IDE	include/configs/edminiv2.h	/^#define CONFIG_MVSATA_IDE$/;"	d
CONFIG_MVSATA_IDE_USE_PORT0	include/configs/ib62x0.h	/^#define CONFIG_MVSATA_IDE_USE_PORT0$/;"	d
CONFIG_MVSATA_IDE_USE_PORT0	include/configs/nsa310s.h	/^#define CONFIG_MVSATA_IDE_USE_PORT0$/;"	d
CONFIG_MVSATA_IDE_USE_PORT0	include/configs/sheevaplug.h	/^#define CONFIG_MVSATA_IDE_USE_PORT0$/;"	d
CONFIG_MVSATA_IDE_USE_PORT1	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_MVSATA_IDE_USE_PORT1$/;"	d
CONFIG_MVSATA_IDE_USE_PORT1	include/configs/edminiv2.h	/^#define CONFIG_MVSATA_IDE_USE_PORT1$/;"	d
CONFIG_MVSATA_IDE_USE_PORT1	include/configs/ib62x0.h	/^#define CONFIG_MVSATA_IDE_USE_PORT1$/;"	d
CONFIG_MVSATA_IDE_USE_PORT1	include/configs/sheevaplug.h	/^#define CONFIG_MVSATA_IDE_USE_PORT1$/;"	d
CONFIG_MV_ETH_RXQ	drivers/net/mvpp2.c	/^#define CONFIG_MV_ETH_RXQ	/;"	d	file:
CONFIG_MV_I2C_NUM	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_MV_I2C_NUM	/;"	d
CONFIG_MV_I2C_REG	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_MV_I2C_REG	/;"	d
CONFIG_MV_SDHCI	include/configs/clearfog.h	/^#define CONFIG_MV_SDHCI$/;"	d
CONFIG_MV_SDHCI	include/configs/db-88f6820-gp.h	/^#define CONFIG_MV_SDHCI$/;"	d
CONFIG_MX23	include/configs/mx23_olinuxino.h	/^#define CONFIG_MX23	/;"	d
CONFIG_MX23	include/configs/mx23evk.h	/^#define CONFIG_MX23	/;"	d
CONFIG_MX23	include/configs/sansa_fuze_plus.h	/^#define CONFIG_MX23	/;"	d
CONFIG_MX23	include/configs/xfi3.h	/^#define CONFIG_MX23	/;"	d
CONFIG_MX25	include/configs/mx25pdk.h	/^#define CONFIG_MX25$/;"	d
CONFIG_MX25	include/configs/zmx25.h	/^#define CONFIG_MX25$/;"	d
CONFIG_MX27	include/configs/apf27.h	/^#define CONFIG_MX27	/;"	d
CONFIG_MX27	include/configs/imx27lite-common.h	/^#define CONFIG_MX27$/;"	d
CONFIG_MX27_CLK32	include/configs/apf27.h	/^#define CONFIG_MX27_CLK32	/;"	d
CONFIG_MX27_CLK32	include/configs/imx27lite-common.h	/^#define CONFIG_MX27_CLK32	/;"	d
CONFIG_MX28	include/configs/apx4devkit.h	/^#define CONFIG_MX28	/;"	d
CONFIG_MX28	include/configs/bg0900.h	/^#define CONFIG_MX28	/;"	d
CONFIG_MX28	include/configs/m28evk.h	/^#define CONFIG_MX28	/;"	d
CONFIG_MX28	include/configs/mx28evk.h	/^#define CONFIG_MX28	/;"	d
CONFIG_MX28	include/configs/sc_sps_1.h	/^#define CONFIG_MX28	/;"	d
CONFIG_MX28_FEC_MAC_IN_OCOTP	include/configs/mx28evk.h	/^#define CONFIG_MX28_FEC_MAC_IN_OCOTP$/;"	d
CONFIG_MX31	include/configs/imx31_phycore.h	/^#define CONFIG_MX31	/;"	d
CONFIG_MX31	include/configs/mx31ads.h	/^#define CONFIG_MX31	/;"	d
CONFIG_MX31	include/configs/mx31pdk.h	/^#define CONFIG_MX31	/;"	d
CONFIG_MX31_CLK32	include/configs/imx31_phycore.h	/^#define CONFIG_MX31_CLK32	/;"	d
CONFIG_MX35	include/configs/flea3.h	/^#define CONFIG_MX35$/;"	d
CONFIG_MX35	include/configs/mx35pdk.h	/^#define CONFIG_MX35$/;"	d
CONFIG_MX35	include/configs/woodburn_common.h	/^#define CONFIG_MX35$/;"	d
CONFIG_MX35_HCLK_FREQ	include/configs/woodburn_common.h	/^#define CONFIG_MX35_HCLK_FREQ	/;"	d
CONFIG_MX5	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX5$/;"	c
CONFIG_MX51	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX51$/;"	c
CONFIG_MX51	include/configs/mx51evk.h	/^#define CONFIG_MX51	/;"	d
CONFIG_MX51	include/configs/ts4800.h	/^#define CONFIG_MX51$/;"	d
CONFIG_MX51_MODULE	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX51$/;"	c
CONFIG_MX53	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX53$/;"	c
CONFIG_MX53	include/configs/m53evk.h	/^#define CONFIG_MX53$/;"	d
CONFIG_MX53	include/configs/mx53ard.h	/^#define CONFIG_MX53$/;"	d
CONFIG_MX53	include/configs/mx53evk.h	/^#define CONFIG_MX53$/;"	d
CONFIG_MX53	include/configs/mx53loco.h	/^#define CONFIG_MX53$/;"	d
CONFIG_MX53	include/configs/mx53smd.h	/^#define CONFIG_MX53$/;"	d
CONFIG_MX53	include/configs/usbarmory.h	/^#define CONFIG_MX53$/;"	d
CONFIG_MX53_MODULE	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX53$/;"	c
CONFIG_MX5_MODULE	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX5$/;"	c
CONFIG_MX6	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6$/;"	c
CONFIG_MX6	include/configs/mx6_common.h	/^#define CONFIG_MX6$/;"	d
CONFIG_MX6D	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6D$/;"	c
CONFIG_MX6DL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6DL$/;"	c
CONFIG_MX6DL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6DL$/;"	c
CONFIG_MX6D_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6D$/;"	c
CONFIG_MX6Q	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6Q$/;"	c
CONFIG_MX6Q	board/tbs/tbs2910/Kconfig	/^config MX6Q$/;"	c
CONFIG_MX6Q	include/configs/titanium.h	/^#define CONFIG_MX6Q$/;"	d
CONFIG_MX6QDL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6QDL$/;"	c
CONFIG_MX6QDL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6QDL$/;"	c
CONFIG_MX6Q_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6Q$/;"	c
CONFIG_MX6Q_MODULE	board/tbs/tbs2910/Kconfig	/^config MX6Q$/;"	c
CONFIG_MX6S	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6S$/;"	c
CONFIG_MX6SL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6SL$/;"	c
CONFIG_MX6SL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6SL$/;"	c
CONFIG_MX6SX	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6SX$/;"	c
CONFIG_MX6SX_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6SX$/;"	c
CONFIG_MX6S_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6S$/;"	c
CONFIG_MX6UL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6UL$/;"	c
CONFIG_MX6ULL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6ULL$/;"	c
CONFIG_MX6ULL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6ULL$/;"	c
CONFIG_MX6UL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6UL$/;"	c
CONFIG_MX6_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6$/;"	c
CONFIG_MX7	arch/arm/cpu/armv7/mx7/Kconfig	/^config MX7$/;"	c
CONFIG_MX7	include/configs/mx7_common.h	/^#define CONFIG_MX7$/;"	d
CONFIG_MX7D	arch/arm/cpu/armv7/mx7/Kconfig	/^config MX7D$/;"	c
CONFIG_MX7D_MODULE	arch/arm/cpu/armv7/mx7/Kconfig	/^config MX7D$/;"	c
CONFIG_MX7_MODULE	arch/arm/cpu/armv7/mx7/Kconfig	/^config MX7$/;"	c
CONFIG_MXC_GPIO	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/apf27.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/flea3.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/imx27lite-common.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/imx31_phycore.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/m53evk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx25pdk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx31ads.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx31pdk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx35pdk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx51evk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx53ard.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx53evk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx53loco.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx53smd.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx6_common.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx6ullevk.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/mx7_common.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/ts4800.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/usbarmory.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/woodburn_common.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPIO	include/configs/zmx25.h	/^#define CONFIG_MXC_GPIO$/;"	d
CONFIG_MXC_GPT_HCLK	include/configs/mx6_common.h	/^#define CONFIG_MXC_GPT_HCLK$/;"	d
CONFIG_MXC_GPT_HCLK	include/configs/mx7_common.h	/^#define CONFIG_MXC_GPT_HCLK$/;"	d
CONFIG_MXC_MCI_REGS_BASE	include/configs/apf27.h	/^#define CONFIG_MXC_MCI_REGS_BASE	/;"	d
CONFIG_MXC_MMC	include/configs/apf27.h	/^#define CONFIG_MXC_MMC$/;"	d
CONFIG_MXC_MMC	include/configs/imx27lite-common.h	/^#define CONFIG_MXC_MMC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/apf27.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/flea3.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/imx27lite-common.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/m53evk.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/mx31pdk.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/mx35pdk.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/mx53ard.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_HWECC	include/configs/woodburn_common.h	/^#define CONFIG_MXC_NAND_HWECC$/;"	d
CONFIG_MXC_NAND_IP_REGS_BASE	include/configs/m53evk.h	/^#define CONFIG_MXC_NAND_IP_REGS_BASE	/;"	d
CONFIG_MXC_NAND_IP_REGS_BASE	include/configs/mx53ard.h	/^#define CONFIG_MXC_NAND_IP_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/apf27.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/flea3.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/m53evk.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/mx31pdk.h	/^#define CONFIG_MXC_NAND_REGS_BASE /;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/mx35pdk.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/mx53ard.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_NAND_REGS_BASE	include/configs/woodburn_common.h	/^#define CONFIG_MXC_NAND_REGS_BASE	/;"	d
CONFIG_MXC_OCOTP	drivers/misc/Kconfig	/^config MXC_OCOTP$/;"	c	menu:Multifunction device drivers
CONFIG_MXC_OCOTP	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_OCOTP$/;"	d
CONFIG_MXC_OCOTP	include/configs/colibri_vf.h	/^#define CONFIG_MXC_OCOTP$/;"	d
CONFIG_MXC_OCOTP	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_OCOTP$/;"	d
CONFIG_MXC_OCOTP	include/configs/mx6_common.h	/^#define CONFIG_MXC_OCOTP$/;"	d
CONFIG_MXC_OCOTP	include/configs/mx7_common.h	/^#define CONFIG_MXC_OCOTP$/;"	d
CONFIG_MXC_OCOTP	include/configs/vf610twr.h	/^#define CONFIG_MXC_OCOTP$/;"	d
CONFIG_MXC_OCOTP_MODULE	drivers/misc/Kconfig	/^config MXC_OCOTP$/;"	c	menu:Multifunction device drivers
CONFIG_MXC_SPI	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/aristainetos-common.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/cgtqmx6eval.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/cm_fx6.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/el6x_common.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/embestmx6boards.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/flea3.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/gw_ventana.h	/^  #define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/imx31_phycore.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/mx31ads.h	/^#define CONFIG_MXC_SPI	/;"	d
CONFIG_MXC_SPI	include/configs/mx31pdk.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/mx35pdk.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/mx51evk.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/mx6sabre_common.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/mx6slevk.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/nitrogen6x.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/ot1200.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/pcm058.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/tqma6.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_SPI	include/configs/ts4800.h	/^#define CONFIG_MXC_SPI /;"	d
CONFIG_MXC_SPI	include/configs/woodburn_common.h	/^#define CONFIG_MXC_SPI$/;"	d
CONFIG_MXC_UART	drivers/serial/Kconfig	/^config MXC_UART$/;"	c	menu:Serial drivers
CONFIG_MXC_UART	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/apf27.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/aristainetos-common.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/cgtqmx6eval.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/cm_fx6.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/el6x_common.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/embestmx6boards.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/flea3.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/gw_ventana.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/imx27lite-common.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/imx31_phycore.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/m53evk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx25pdk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx31ads.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx31pdk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx35pdk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx51evk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx53ard.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx53evk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx53loco.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx53smd.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6cuboxi.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6qarm2.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6sabre_common.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6slevk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6sxsabreauto.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6sxsabresd.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx6ullevk.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/mx7_common.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/nitrogen6x.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/novena.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/ot1200.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/pcm058.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/pico-imx6ul.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/platinum.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/secomx6quq7.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/tbs2910.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/titanium.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/tqma6.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/ts4800.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/udoo.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/usbarmory.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/wandboard.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/warp.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/woodburn_common.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/xpress.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART	include/configs/zmx25.h	/^#define CONFIG_MXC_UART$/;"	d
CONFIG_MXC_UART_BASE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/apf27.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/aristainetos.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/aristainetos2.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/aristainetos2b.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/cgtqmx6eval.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/cm_fx6.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/el6x_common.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/embestmx6boards.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/flea3.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/gw_ventana.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/imx31_phycore.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/imx6qdl_icore.h	/^# define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/m53evk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx25pdk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx31ads.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx31pdk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx35pdk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx51evk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx53ard.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx53evk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx53loco.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx53smd.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6cuboxi.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6qarm2.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6qsabreauto.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6sabresd.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6slevk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6sxsabresd.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx6ullevk.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/mx7dsabresd.h	/^#define CONFIG_MXC_UART_BASE /;"	d
CONFIG_MXC_UART_BASE	include/configs/nitrogen6x.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/novena.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/ot1200.h	/^#define CONFIG_MXC_UART_BASE /;"	d
CONFIG_MXC_UART_BASE	include/configs/pcm058.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/pico-imx6ul.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/platinum.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/secomx6quq7.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/tbs2910.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/titanium.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/tqma6_mba6.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/tqma6_wru4.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/ts4800.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/udoo.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/usbarmory.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/wandboard.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/warp.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/warp7.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/woodburn_common.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/xpress.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/zc5202.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/zc5601.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_BASE	include/configs/zmx25.h	/^#define CONFIG_MXC_UART_BASE	/;"	d
CONFIG_MXC_UART_MODULE	drivers/serial/Kconfig	/^config MXC_UART$/;"	c	menu:Serial drivers
CONFIG_MXC_USB_FLAGS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/aristainetos-common.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/cgtqmx6eval.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/cm_fx6.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/colibri_imx7.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/embestmx6boards.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/gw_ventana.h	/^#define CONFIG_MXC_USB_FLAGS /;"	d
CONFIG_MXC_USB_FLAGS	include/configs/m53evk.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx35pdk.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx51evk.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx53loco.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6cuboxi.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6qarm2.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6qsabreauto.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6sabresd.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6slevk.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_MXC_USB_FLAGS /;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6sxsabresd.h	/^#define CONFIG_MXC_USB_FLAGS /;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_MXC_USB_FLAGS /;"	d
CONFIG_MXC_USB_FLAGS	include/configs/mx7dsabresd.h	/^#define CONFIG_MXC_USB_FLAGS /;"	d
CONFIG_MXC_USB_FLAGS	include/configs/nitrogen6x.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/novena.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/pico-imx6ul.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/platinum.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/titanium.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/usbarmory.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/wandboard.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/warp.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/warp7.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/xpress.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_FLAGS	include/configs/zmx25.h	/^#define CONFIG_MXC_USB_FLAGS	/;"	d
CONFIG_MXC_USB_OTG_HACTIVE	drivers/usb/host/Kconfig	/^config MXC_USB_OTG_HACTIVE$/;"	c
CONFIG_MXC_USB_OTG_HACTIVE_MODULE	drivers/usb/host/Kconfig	/^config MXC_USB_OTG_HACTIVE$/;"	c
CONFIG_MXC_USB_PORT	include/configs/m53evk.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/mx35pdk.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/mx51evk.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/mx53loco.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/platinum.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/titanium.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/usbarmory.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORT	include/configs/zmx25.h	/^#define CONFIG_MXC_USB_PORT	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/aristainetos-common.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/cgtqmx6eval.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/cm_fx6.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/colibri_imx7.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/embestmx6boards.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/ge_bx50v3.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/gw_ventana.h	/^#define CONFIG_MXC_USB_PORTSC /;"	d
CONFIG_MXC_USB_PORTSC	include/configs/m53evk.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx35pdk.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx51evk.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx53loco.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6cuboxi.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6qarm2.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6qsabreauto.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6sabresd.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6slevk.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6sxsabreauto.h	/^#define CONFIG_MXC_USB_PORTSC /;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6sxsabresd.h	/^#define CONFIG_MXC_USB_PORTSC /;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_MXC_USB_PORTSC /;"	d
CONFIG_MXC_USB_PORTSC	include/configs/mx7dsabresd.h	/^#define CONFIG_MXC_USB_PORTSC /;"	d
CONFIG_MXC_USB_PORTSC	include/configs/nitrogen6x.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/novena.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/ot1200.h	/^#define CONFIG_MXC_USB_PORTSC /;"	d
CONFIG_MXC_USB_PORTSC	include/configs/pico-imx6ul.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/platinum.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/tbs2910.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/titanium.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/tqma6.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/usbarmory.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/wandboard.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/warp.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/warp7.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/xpress.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXC_USB_PORTSC	include/configs/zmx25.h	/^#define CONFIG_MXC_USB_PORTSC	/;"	d
CONFIG_MXS_GPIO	include/configs/mxs.h	/^#define CONFIG_MXS_GPIO$/;"	d
CONFIG_MXS_MMC	include/configs/mxs.h	/^#define CONFIG_MXS_MMC$/;"	d
CONFIG_MXS_OCOTP	include/configs/mxs.h	/^#define CONFIG_MXS_OCOTP$/;"	d
CONFIG_MXS_SPI	include/configs/mxs.h	/^#define CONFIG_MXS_SPI$/;"	d
CONFIG_MX_CYCLIC	include/configs/M5249EVB.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/PMC405DE.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/PMC440.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/amcc-common.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/amcore.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/bcm23550_w1d.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/bcm28155_ap.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/bcm_ep_board.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/calimain.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/da850evm.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/digsy_mtc.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/ea20.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/ipam390.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/legoev3.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/lwmon5.h	/^#define CONFIG_MX_CYCLIC /;"	d
CONFIG_MX_CYCLIC	include/configs/omapl138_lcdk.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_MX_CYCLIC	include/configs/x600.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/xilinx-ppc.h	/^#define CONFIG_MX_CYCLIC	/;"	d
CONFIG_MX_CYCLIC	include/configs/xtfpga.h	/^#define CONFIG_MX_CYCLIC$/;"	d
CONFIG_NAND	include/configs/am335x_igep0033.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/cm_t335.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/cm_t43.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/devkit8000.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/mcx.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/omap3_cairo.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/omap3_igep00x0.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/omap3_overo.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/omap3_pandora.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/omap3_zoom1.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/pengwyn.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/siemens-am33x-common.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND	include/configs/tam3517-common.h	/^#define CONFIG_NAND$/;"	d
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC	include/configs/ipam390.h	/^#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC$/;"	d
CONFIG_NAND_ACTL	include/configs/xpedite517x.h	/^#define CONFIG_NAND_ACTL$/;"	d
CONFIG_NAND_ACTL	include/configs/xpedite520x.h	/^#define CONFIG_NAND_ACTL$/;"	d
CONFIG_NAND_ARASAN	drivers/mtd/nand/Kconfig	/^config NAND_ARASAN$/;"	c	menu:NAND Device Support
CONFIG_NAND_ARASAN_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_ARASAN$/;"	c	menu:NAND Device Support
CONFIG_NAND_ATMEL	include/configs/at91sam9260ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/at91sam9261ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/at91sam9263ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/at91sam9n12ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/at91sam9rlek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/at91sam9x5ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/corvus.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/ethernut5.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/meesc.h	/^# define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/pm9261.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/pm9263.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/pm9g45.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/sama5d2_ptc.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/sama5d3_xplained.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/sama5d3xek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/sama5d4_xplained.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/sama5d4ek.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/smartweb.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/snapper9260.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/snapper9g45.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/taurus.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_ATMEL	include/configs/usb_a9263.h	/^#define CONFIG_NAND_ATMEL$/;"	d
CONFIG_NAND_BOOT	common/Kconfig	/^config NAND_BOOT$/;"	c	menu:Boot media
CONFIG_NAND_BOOT_MODULE	common/Kconfig	/^config NAND_BOOT$/;"	c	menu:Boot media
CONFIG_NAND_CS_INIT	include/configs/etamin.h	/^#define CONFIG_NAND_CS_INIT$/;"	d
CONFIG_NAND_DATA_REG	drivers/mtd/nand/kmeter1_nand.c	/^#define CONFIG_NAND_DATA_REG	/;"	d	file:
CONFIG_NAND_DAVINCI	include/configs/da850evm.h	/^#define CONFIG_NAND_DAVINCI$/;"	d
CONFIG_NAND_DAVINCI	include/configs/ea20.h	/^#define CONFIG_NAND_DAVINCI$/;"	d
CONFIG_NAND_DAVINCI	include/configs/ipam390.h	/^#define CONFIG_NAND_DAVINCI$/;"	d
CONFIG_NAND_DAVINCI	include/configs/omapl138_lcdk.h	/^#define CONFIG_NAND_DAVINCI$/;"	d
CONFIG_NAND_DAVINCI	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_NAND_DAVINCI$/;"	d
CONFIG_NAND_DENALI	drivers/mtd/nand/Kconfig	/^config NAND_DENALI$/;"	c	menu:NAND Device Support
CONFIG_NAND_DENALI_ECC_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_NAND_DENALI_ECC_SIZE	/;"	d
CONFIG_NAND_DENALI_ECC_SIZE	include/configs/uniphier.h	/^#define CONFIG_NAND_DENALI_ECC_SIZE	/;"	d
CONFIG_NAND_DENALI_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_DENALI$/;"	c	menu:NAND Device Support
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES	drivers/mtd/nand/Kconfig	/^config NAND_DENALI_SPARE_AREA_SKIP_BYTES$/;"	c	menu:NAND Device Support
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_DENALI_SPARE_AREA_SKIP_BYTES$/;"	c	menu:NAND Device Support
CONFIG_NAND_ECC_BCH	include/configs/km/km_arm.h	/^#define CONFIG_NAND_ECC_BCH$/;"	d
CONFIG_NAND_ECC_BCH	include/configs/km/kmp204x-common.h	/^#define CONFIG_NAND_ECC_BCH$/;"	d
CONFIG_NAND_ECC_BCH	include/configs/km8360.h	/^#define CONFIG_NAND_ECC_BCH$/;"	d
CONFIG_NAND_ECC_BCH	include/configs/suvd3.h	/^#define CONFIG_NAND_ECC_BCH$/;"	d
CONFIG_NAND_ECC_BCH	include/configs/x600.h	/^#define CONFIG_NAND_ECC_BCH$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/MPC8313ERDB.h	/^#define CONFIG_NAND_FSL_ELBC /;"	d
CONFIG_NAND_FSL_ELBC	include/configs/MPC8315ERDB.h	/^#define CONFIG_NAND_FSL_ELBC	/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/MPC837XEMDS.h	/^#define CONFIG_NAND_FSL_ELBC	/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/MPC8536DS.h	/^#define CONFIG_NAND_FSL_ELBC	/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/MPC8569MDS.h	/^#define CONFIG_NAND_FSL_ELBC	/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/MPC8572DS.h	/^#define CONFIG_NAND_FSL_ELBC	/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/P1022DS.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/P1023RDB.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/P2041RDB.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/P3041DS.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/P5020DS.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/P5040DS.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/ids8313.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/km/kmp204x-common.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/ve8313.h	/^#define CONFIG_NAND_FSL_ELBC /;"	d
CONFIG_NAND_FSL_ELBC	include/configs/xpedite537x.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_ELBC	include/configs/xpedite550x.h	/^#define CONFIG_NAND_FSL_ELBC$/;"	d
CONFIG_NAND_FSL_IFC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/B4860QDS.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/BSC9131RDB.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/C29XPCIE.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/P1010RDB.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T102xQDS.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T102xRDB.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T1040QDS.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T104xRDB.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T208xQDS.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T208xRDB.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T4240QDS.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/T4240RDB.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls1021aqds.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls1043aqds.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls1043ardb.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls1046aqds.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls1046ardb.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls2080a_simu.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls2080aqds.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_IFC	include/configs/ls2080ardb.h	/^#define CONFIG_NAND_FSL_IFC$/;"	d
CONFIG_NAND_FSL_NFC	include/configs/M54418TWR.h	/^#define CONFIG_NAND_FSL_NFC$/;"	d
CONFIG_NAND_FSL_NFC	include/configs/s32v234evb.h	/^#define CONFIG_NAND_FSL_NFC$/;"	d
CONFIG_NAND_FSMC	include/configs/spear-common.h	/^#define CONFIG_NAND_FSMC$/;"	d
CONFIG_NAND_FSMC	include/configs/x600.h	/^#define CONFIG_NAND_FSMC$/;"	d
CONFIG_NAND_KIRKWOOD	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_NAND_KIRKWOOD$/;"	d
CONFIG_NAND_KMETER1	include/configs/km/km83xx-common.h	/^#define CONFIG_NAND_KMETER1$/;"	d
CONFIG_NAND_KMETER1	include/configs/km8360.h	/^#define CONFIG_NAND_KMETER1$/;"	d
CONFIG_NAND_KMETER1	include/configs/suvd3.h	/^#define CONFIG_NAND_KMETER1$/;"	d
CONFIG_NAND_LPC32XX_MLC	include/configs/work_92105.h	/^#define CONFIG_NAND_LPC32XX_MLC$/;"	d
CONFIG_NAND_LPC32XX_SLC	include/configs/devkit3250.h	/^#define CONFIG_NAND_LPC32XX_SLC$/;"	d
CONFIG_NAND_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config NAND_MODE$/;"	c	choice:choice5ba020940104
CONFIG_NAND_MODE_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config NAND_MODE$/;"	c	choice:choice5ba020940104
CONFIG_NAND_MODE_REG	drivers/mtd/nand/kmeter1_nand.c	/^#define CONFIG_NAND_MODE_REG	/;"	d	file:
CONFIG_NAND_MPC5121_NFC	include/configs/aria.h	/^#define CONFIG_NAND_MPC5121_NFC$/;"	d
CONFIG_NAND_MPC5121_NFC	include/configs/mecp5123.h	/^#define CONFIG_NAND_MPC5121_NFC$/;"	d
CONFIG_NAND_MPC5121_NFC	include/configs/mpc5121ads.h	/^#define CONFIG_NAND_MPC5121_NFC$/;"	d
CONFIG_NAND_MPC5121_NFC	include/configs/pdm360ng.h	/^#define CONFIG_NAND_MPC5121_NFC$/;"	d
CONFIG_NAND_MXC	include/configs/apf27.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/flea3.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/imx27lite-common.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/m53evk.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/mx31pdk.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/mx35pdk.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/mx53ard.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC	include/configs/woodburn_common.h	/^#define CONFIG_NAND_MXC$/;"	d
CONFIG_NAND_MXC_V1_1	include/configs/woodburn_common.h	/^#define CONFIG_NAND_MXC_V1_1$/;"	d
CONFIG_NAND_MXS	drivers/mtd/nand/Kconfig	/^config NAND_MXS$/;"	c	menu:NAND Device Support
CONFIG_NAND_MXS	include/configs/aristainetos-common.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/cm_fx6.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/colibri_imx7.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/gw_ventana.h	/^  #define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/mx6qsabreauto.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/mxs.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/pcm058.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/platinum.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS	include/configs/titanium.h	/^#define CONFIG_NAND_MXS$/;"	d
CONFIG_NAND_MXS_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_MXS$/;"	c	menu:NAND Device Support
CONFIG_NAND_NDFC	arch/powerpc/include/asm/ppc405ex.h	/^#define CONFIG_NAND_NDFC$/;"	d
CONFIG_NAND_NDFC	arch/powerpc/include/asm/ppc405ez.h	/^#define CONFIG_NAND_NDFC$/;"	d
CONFIG_NAND_NDFC	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_NAND_NDFC$/;"	d
CONFIG_NAND_NDFC	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_NAND_NDFC$/;"	d
CONFIG_NAND_NDFC	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_NAND_NDFC$/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/am335x_evm.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/am335x_igep0033.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/am3517_crane.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/am3517_evm.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/am43xx_evm.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/baltos.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/bav335x.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/brppt1.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/cm_t35.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/cm_t43.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/devkit8000.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/dra7xx_evm.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/etamin.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/mcx.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_beagle.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_cairo.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_evm.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_igep00x0.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_logic.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_overo.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/omap3_pandora.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/pengwyn.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/siemens-am33x-common.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/tam3517-common.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/tao3530.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ECCSCHEME	include/configs/tricorder.h	/^#define CONFIG_NAND_OMAP_ECCSCHEME	/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/am335x_evm.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/am335x_igep0033.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/am43xx_evm.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/baltos.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/bav335x.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/brppt1.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/cm_t43.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/dra7xx_evm.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/pengwyn.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_ELM	include/configs/siemens-am33x-common.h	/^#define CONFIG_NAND_OMAP_ELM$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/am335x_evm.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/am3517_crane.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/am3517_evm.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/am43xx_evm.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/baltos.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/bav335x.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/brppt1.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/cm_t35.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/cm_t3517.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/dra7xx_evm.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/mcx.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/omap3_beagle.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/omap3_cairo.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/omap3_evm.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/omap3_igep00x0.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/omap3_logic.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/pengwyn.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/siemens-am33x-common.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/tam3517-common.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/tao3530.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/ti_armv7_omap.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC	include/configs/tricorder.h	/^#define CONFIG_NAND_OMAP_GPMC$/;"	d
CONFIG_NAND_OMAP_GPMC_PREFETCH	include/configs/am335x_evm.h	/^#define CONFIG_NAND_OMAP_GPMC_PREFETCH$/;"	d
CONFIG_NAND_OMAP_GPMC_PREFETCH	include/configs/am3517_evm.h	/^#define CONFIG_NAND_OMAP_GPMC_PREFETCH$/;"	d
CONFIG_NAND_OMAP_GPMC_PREFETCH	include/configs/baltos.h	/^#define CONFIG_NAND_OMAP_GPMC_PREFETCH$/;"	d
CONFIG_NAND_OMAP_GPMC_PREFETCH	include/configs/mcx.h	/^#define CONFIG_NAND_OMAP_GPMC_PREFETCH$/;"	d
CONFIG_NAND_OMAP_GPMC_PREFETCH	include/configs/tam3517-common.h	/^#define CONFIG_NAND_OMAP_GPMC_PREFETCH$/;"	d
CONFIG_NAND_OMAP_GPMC_WSCFG	include/configs/brppt1.h	/^#define CONFIG_NAND_OMAP_GPMC_WSCFG	/;"	d
CONFIG_NAND_PLAT	include/configs/bf537-pnav.h	/^#define CONFIG_NAND_PLAT$/;"	d
CONFIG_NAND_PLAT	include/configs/bf561-acvilon.h	/^#define CONFIG_NAND_PLAT$/;"	d
CONFIG_NAND_PLAT	include/configs/br4.h	/^#define CONFIG_NAND_PLAT$/;"	d
CONFIG_NAND_PLAT	include/configs/ip04.h	/^#define CONFIG_NAND_PLAT$/;"	d
CONFIG_NAND_PLAT	include/configs/pr1.h	/^#define CONFIG_NAND_PLAT$/;"	d
CONFIG_NAND_PXA3XX	drivers/mtd/nand/Kconfig	/^config NAND_PXA3XX$/;"	c	menu:NAND Device Support
CONFIG_NAND_PXA3XX_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_PXA3XX$/;"	c	menu:NAND Device Support
CONFIG_NAND_S3C2410	include/configs/VCMA9.h	/^#define CONFIG_NAND_S3C2410$/;"	d
CONFIG_NAND_S3C2410	include/configs/smdk2410.h	/^#define CONFIG_NAND_S3C2410$/;"	d
CONFIG_NAND_SUNXI	drivers/mtd/nand/Kconfig	/^config NAND_SUNXI$/;"	c	menu:NAND Device Support
CONFIG_NAND_SUNXI_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_SUNXI$/;"	c	menu:NAND Device Support
CONFIG_NAND_VF610_NFC	drivers/mtd/nand/Kconfig	/^config NAND_VF610_NFC$/;"	c	menu:NAND Device Support
CONFIG_NAND_VF610_NFC_MODULE	drivers/mtd/nand/Kconfig	/^config NAND_VF610_NFC$/;"	c	menu:NAND Device Support
CONFIG_NB	board/amcc/yucca/yucca.h	/^	CONFIG_NB$/;"	e	enum:config_list
CONFIG_NCEL2C100_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_NCEL2C100_BASE	/;"	d
CONFIG_NCEMIC100_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_NCEMIC100_BASE	/;"	d
CONFIG_NDS32	arch/Kconfig	/^config NDS32$/;"	c	choice:choice07312ef30104
CONFIG_NDS32_MODULE	arch/Kconfig	/^config NDS32$/;"	c	choice:choice07312ef30104
CONFIG_NDS_DLM1_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_NDS_DLM1_BASE	/;"	d
CONFIG_NDS_DLM2_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_NDS_DLM2_BASE	/;"	d
CONFIG_NEEDS_MANUAL_RELOC	arch/avr32/include/asm/config.h	/^#define CONFIG_NEEDS_MANUAL_RELOC$/;"	d
CONFIG_NEEDS_MANUAL_RELOC	arch/m68k/include/asm/config.h	/^#define CONFIG_NEEDS_MANUAL_RELOC$/;"	d
CONFIG_NEEDS_MANUAL_RELOC	arch/microblaze/include/asm/config.h	/^#define CONFIG_NEEDS_MANUAL_RELOC$/;"	d
CONFIG_NEEDS_MANUAL_RELOC	arch/sparc/include/asm/config.h	/^#define CONFIG_NEEDS_MANUAL_RELOC$/;"	d
CONFIG_NEO	include/configs/neo.h	/^#define CONFIG_NEO	/;"	d
CONFIG_NET	include/config/auto.conf	/^CONFIG_NET=y$/;"	k
CONFIG_NET	include/generated/autoconf.h	/^#define CONFIG_NET /;"	d
CONFIG_NET	net/Kconfig	/^menuconfig NET$/;"	c
CONFIG_NETCONSOLE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/TQM823L.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM823M.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM850L.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM850M.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM855L.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM855M.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM860L.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM860M.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM862L.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM862M.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/TQM866M.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/a3m071.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/amcc-common.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bct-brettl2.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf526-ezbrd.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf527-ezkit.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf537-minotaur.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf537-srv1.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf537-stamp.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/bf609-ezkit.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/br4.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/bur_cfg_common.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/cm-bf527.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/cm-bf537e.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/cm-bf537u.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/digsy_mtc.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/dns325.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/edminiv2.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/gw_ventana.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/km/km_arm.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/lacie_kw.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/motionpro.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/nitrogen6x.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/novena.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/nsa310s.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/o2mnt.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/pr1.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	include/configs/tcm-bf518.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/tcm-bf537.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/v38b.h	/^#define CONFIG_NETCONSOLE	/;"	d
CONFIG_NETCONSOLE	include/configs/xfi3.h	/^#define CONFIG_NETCONSOLE$/;"	d
CONFIG_NETCONSOLE	net/Kconfig	/^config NETCONSOLE$/;"	c
CONFIG_NETCONSOLE	tools/Makefile	/^CONFIG_NETCONSOLE = y$/;"	m
CONFIG_NETCONSOLE_BUFFER_SIZE	drivers/net/netconsole.c	/^#define CONFIG_NETCONSOLE_BUFFER_SIZE /;"	d	file:
CONFIG_NETCONSOLE_MODULE	net/Kconfig	/^config NETCONSOLE$/;"	c
CONFIG_NETDEV	include/configs/MPC8313ERDB.h	/^#define CONFIG_NETDEV	/;"	d
CONFIG_NETDEV	include/configs/MPC8323ERDB.h	/^#define CONFIG_NETDEV	/;"	d
CONFIG_NETDEV	include/configs/MPC8349ITX.h	/^#define CONFIG_NETDEV	/;"	d
CONFIG_NETDEV	include/configs/MPC837XERDB.h	/^#define CONFIG_NETDEV	/;"	d
CONFIG_NETDEV	include/configs/ids8313.h	/^#define CONFIG_NETDEV	/;"	d
CONFIG_NETDEV	include/configs/ve8313.h	/^#define CONFIG_NETDEV	/;"	d
CONFIG_NETDEVICES	drivers/net/Kconfig	/^menuconfig NETDEVICES$/;"	c
CONFIG_NETDEVICES	include/config/auto.conf	/^CONFIG_NETDEVICES=y$/;"	k
CONFIG_NETDEVICES	include/generated/autoconf.h	/^#define CONFIG_NETDEVICES /;"	d
CONFIG_NETDEVICES_MODULE	drivers/net/Kconfig	/^menuconfig NETDEVICES$/;"	c
CONFIG_NETMASK	include/configs/M5208EVBE.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5235EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5272C3.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5282EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M53017EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5329EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5373EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M54418TWR.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M54451EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M54455EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5475EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/M5485EVB.h	/^#	define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/MPC8536DS.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/MPC8540ADS.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/MPC8541CDS.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/MPC8544DS.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/MPC8548CDS.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/MPC8555CDS.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/MPC8560ADS.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/MPC8568MDS.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/MPC8569MDS.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/MPC8572DS.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/MPC8610HPCD.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/MPC8641HPCN.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/UCP1020.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/VCMA9.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/bf537-minotaur.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/bf537-srv1.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/bfin_adi_common.h	/^# define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/blackstamp.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/blackvme.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/colibri_imx7.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/colibri_vf.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/gr_ep2s60.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/gr_xc3s_1500.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/grsim.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/grsim_leon2.h	/^#define CONFIG_NETMASK /;"	d
CONFIG_NETMASK	include/configs/imx31_phycore.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/inka4x0.h	/^#define	CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/sbc8548.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/sbc8641d.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/smdk2410.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NETMASK	include/configs/uniphier.h	/^#define CONFIG_NETMASK	/;"	d
CONFIG_NET_MAXDEFRAG	net/net.c	/^#define CONFIG_NET_MAXDEFRAG /;"	d	file:
CONFIG_NET_MODULE	net/Kconfig	/^menuconfig NET$/;"	c
CONFIG_NET_MULTI	include/configs/am335x_shc.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/blanche.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/cm_t43.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/cyrus.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/ls1012aqds.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/ls1012ardb.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/ls1043a_common.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/nsa310s.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/pengwyn.h	/^#define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_MULTI	include/configs/xilinx_zynqmp.h	/^# define CONFIG_NET_MULTI$/;"	d
CONFIG_NET_RANDOM_ETHADDR	include/configs/ds414.h	/^#define CONFIG_NET_RANDOM_ETHADDR$/;"	d
CONFIG_NET_RANDOM_ETHADDR	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_NET_RANDOM_ETHADDR$/;"	d
CONFIG_NET_RANDOM_ETHADDR	net/Kconfig	/^config NET_RANDOM_ETHADDR$/;"	c
CONFIG_NET_RANDOM_ETHADDR_MODULE	net/Kconfig	/^config NET_RANDOM_ETHADDR$/;"	c
CONFIG_NET_RETRY_COUNT	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/M5275EVB.h	/^#	define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/TQM885D.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/a3m071.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/am335x_shc.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/am3517_evm.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/am43xx_evm.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/am57xx_evm.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/at91sam9260ek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/at91sam9261ek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/at91sam9263ek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/at91sam9x5ek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/bfin_adi_common.h	/^# define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/bur_cfg_common.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/calimain.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/cm_fx6.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/cm_t3517.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/colibri_pxa270.h	/^#define	CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/corvus.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/da850evm.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/devkit8000.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/dra7xx_evm.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ea20.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ethernut5.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/flea3.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/gr_ep2s60.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ipam390.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ma5d4evk.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/mcx.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/meesc.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/mx35pdk.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/omapl138_lcdk.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/pic32mzdask.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/picosam9g45.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/pm9261.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/pm9263.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/pm9g45.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/sama5d2_ptc.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/sama5d2_xplained.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/sama5d3_xplained.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/sama5d3xek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/sama5d4_xplained.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/sama5d4ek.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/siemens-am33x-common.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/smartweb.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/snapper9260.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/snapper9g45.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/tam3517-common.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ti814x_evm.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ti_am335x_common.h	/^#define CONFIG_NET_RETRY_COUNT /;"	d
CONFIG_NET_RETRY_COUNT	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/usb_a9263.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/vct.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/vinco.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_RETRY_COUNT	include/configs/woodburn_common.h	/^#define CONFIG_NET_RETRY_COUNT	/;"	d
CONFIG_NET_TFTP_VARS	include/config/auto.conf	/^CONFIG_NET_TFTP_VARS=y$/;"	k
CONFIG_NET_TFTP_VARS	include/generated/autoconf.h	/^#define CONFIG_NET_TFTP_VARS /;"	d
CONFIG_NET_TFTP_VARS	net/Kconfig	/^config NET_TFTP_VARS$/;"	c
CONFIG_NET_TFTP_VARS_MODULE	net/Kconfig	/^config NET_TFTP_VARS$/;"	c
CONFIG_NEVER_ASSERT_ODT_TO_CPU	include/configs/MPC837XEMDS.h	/^#define CONFIG_NEVER_ASSERT_ODT_TO_CPU /;"	d
CONFIG_NFC_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_NFC_FREQ	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/B4860QDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/BSC9132QDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8313ERDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8315ERDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8323ERDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC832XEMDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8349EMDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8349ITX.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC837XEMDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC837XERDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8536DS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8540ADS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8541CDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8544DS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8548CDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8555CDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8560ADS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8568MDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8569MDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8572DS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8610HPCD.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/MPC8641HPCN.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/P1022DS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/P1023RDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/P2041RDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T102xQDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T102xRDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T1040QDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T104xRDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T208xQDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T208xRDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T4240QDS.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/T4240RDB.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/controlcenterd.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/corenet_ds.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/cyrus.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/hrcon.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/ids8313.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/p1_twr.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/sbc8349.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/sbc8548.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/sbc8641d.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/smartweb.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/spear-common.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/strider.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/uniphier.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/vme8349.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFSBOOTCOMMAND	include/configs/x86-common.h	/^#define CONFIG_NFSBOOTCOMMAND	/;"	d
CONFIG_NFS_READ_SIZE	include/configs/tqma6.h	/^#define CONFIG_NFS_READ_SIZE	/;"	d
CONFIG_NFS_TIMEOUT	include/configs/kzm9g.h	/^#define CONFIG_NFS_TIMEOUT /;"	d
CONFIG_NIOS2	arch/Kconfig	/^config NIOS2$/;"	c	choice:choice07312ef30104
CONFIG_NIOS2_MODULE	arch/Kconfig	/^config NIOS2$/;"	c	choice:choice07312ef30104
CONFIG_NOR	board/ti/am335x/Kconfig	/^config NOR$/;"	c
CONFIG_NORBOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_NORBOOT	/;"	d
CONFIG_NORBOOT	include/configs/p1_twr.h	/^#define CONFIG_NORBOOT	/;"	d
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE	arch/x86/cpu/ivybridge/Kconfig	/^config NORTHBRIDGE_INTEL_IVYBRIDGE$/;"	c
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config NORTHBRIDGE_INTEL_IVYBRIDGE$/;"	c
CONFIG_NOR_BOOT	common/Kconfig	/^config NOR_BOOT$/;"	c	menu:Boot media
CONFIG_NOR_BOOT_MODULE	common/Kconfig	/^config NOR_BOOT$/;"	c	menu:Boot media
CONFIG_NOR_MODULE	board/ti/am335x/Kconfig	/^config NOR$/;"	c
CONFIG_NOT_SELECTED	board/amcc/yucca/yucca.h	/^	CONFIG_NOT_SELECTED,$/;"	e	enum:config_selection
CONFIG_NO_RELOCATION	include/configs/thunderx_88xx.h	/^#define CONFIG_NO_RELOCATION	/;"	d
CONFIG_NO_SERIAL_EEPROM	include/configs/acadia.h	/^#define CONFIG_NO_SERIAL_EEPROM$/;"	d
CONFIG_NO_SERIAL_EEPROM	include/configs/bubinga.h	/^#define CONFIG_NO_SERIAL_EEPROM$/;"	d
CONFIG_NO_WAIT	drivers/net/smc91111.h	/^#define CONFIG_NO_WAIT	/;"	d
CONFIG_NR_CPUS	drivers/net/mvneta.c	/^#define CONFIG_NR_CPUS	/;"	d	file:
CONFIG_NR_CPUS	drivers/net/mvpp2.c	/^#define CONFIG_NR_CPUS	/;"	d	file:
CONFIG_NR_DRAM_BANKS	arch/microblaze/include/asm/config.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/autoconf.mk	/^CONFIG_NR_DRAM_BANKS=y$/;"	m
CONFIG_NR_DRAM_BANKS	include/configs/10m50_devboard.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/3c120_devboard.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/VCMA9.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/adp-ag101p.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/am3517_crane.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/am3517_evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/am57xx_evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/apf27.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/apx4devkit.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/aristainetos-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/armadillo-800eva.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91rm9200ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9260ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9261ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9263ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9n12ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9rlek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/at91sam9x5ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/atngw100.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/atngw100mkii.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/atstk1002.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/bcm23550_w1d.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/bcm28155_ap.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/bcm_ep_board.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/bg0900.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/bur_am335x_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/calimain.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/cgtqmx6eval.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/cm_fx6.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/cm_t35.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/cm_t3517.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/colibri_imx7.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/colibri_pxa270.h	/^#define	CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/colibri_vf.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/corvus.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/da850evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/dbau1x00.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/devkit3250.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/devkit8000.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/dns325.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/dra7xx_evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/dragonboard410c.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ea20.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/edb93xx.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/edminiv2.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/el6x_common.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/embestmx6boards.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/espresso7420.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ethernut5.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/exynos5250-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/flea3.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ge_bx50v3.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/grasshopper.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/gw_ventana.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/h2200.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/highbank.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/hikey.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/imx27lite-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/imx31_phycore.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/imx6qdl_icore.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/integrator-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ipam390.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/kc1.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/km/km_arm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/kzm9g.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/lacie_kw.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/legoev3.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1012afrdm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1012aqds.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1012ardb.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1021aqds.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1021atwr.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1043aqds.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1043ardb.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1046aqds.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls1046ardb.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ls2080a_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/m28evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/m53evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ma5d4evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mcx.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/meesc.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/meson-gxbb-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mv-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx23_olinuxino.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx23evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx25pdk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx28evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx31ads.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx31pdk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx35pdk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx51evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx53ard.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx53evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx53loco.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx53smd.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6cuboxi.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6qarm2.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6sabre_common.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6slevk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6sxsabresd.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx6ullevk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/mx7dsabresd.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/nitrogen6x.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/nokia_rx51.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/novena.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/odroid.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/odroid_xu3.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_beagle.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_cairo.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_igep00x0.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_logic.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_overo.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_pandora.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omap3_zoom1.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/omapl138_lcdk.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/origen.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ot1200.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pb1x00.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pcm052.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pcm058.h	/^#define CONFIG_NR_DRAM_BANKS /;"	d
CONFIG_NR_DRAM_BANKS	include/configs/peach-pi.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/peach-pit.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pico-imx6ul.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/picosam9g45.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/platinum.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pm9261.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pm9263.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/pm9g45.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/rcar-gen2-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/rcar-gen3-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/rk3036_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/rk3288_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/rk3399_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/rpi.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/s32v234evb.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/s5p_goni.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/s5pc210_universal.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sama5d2_ptc.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sama5d2_xplained.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sama5d3_xplained.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sama5d3xek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sama5d4_xplained.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sama5d4ek.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sandbox.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sansa_fuze_plus.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sc_sps_1.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/secomx6quq7.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/siemens-am33x-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/smartweb.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/smdk2410.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/smdk5420.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/smdkc100.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/smdkv310.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/snapper9260.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/snapper9g45.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sniper.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/socfpga_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/spear-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/stm32f429-discovery.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/stm32f746-disco.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/stv0991.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/sunxi-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/tam3517-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/tao3530.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/taurus.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/tbs2910.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/tegra-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/thunderx_88xx.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ti814x_evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ti816x_evm.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ti_armv7_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/titanium.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/tqma6.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/trats.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/trats2.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/tricorder.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/ts4800.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/udoo.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/uniphier.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/usb_a9263.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/usbarmory.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/vexpress_aemv8a.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/vexpress_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/vf610twr.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/vinco.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/wandboard.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/warp.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/warp7.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/woodburn_common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/work_92105.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/x600.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/x86-common.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/xfi3.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/xilinx_zynqmp.h	/^# define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/xpress.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/zipitz2.h	/^#define	CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/zmx25.h	/^#define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	include/configs/zynq-common.h	/^# define CONFIG_NR_DRAM_BANKS	/;"	d
CONFIG_NR_DRAM_BANKS	spl/include/autoconf.mk	/^CONFIG_NR_DRAM_BANKS=y$/;"	m
CONFIG_NR_DRAM_BANKS_MAX	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_NR_DRAM_BANKS_MAX	/;"	d
CONFIG_NR_DRAM_BANKS_MAX	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_NR_DRAM_BANKS_MAX	/;"	d
CONFIG_NR_DRAM_BANKS_MAX	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_NR_DRAM_BANKS_MAX	/;"	d
CONFIG_NR_DRAM_BANKS_MAX	include/configs/aspenite.h	/^#define CONFIG_NR_DRAM_BANKS_MAX	/;"	d
CONFIG_NR_DRAM_BANKS_MAX	include/configs/gplugd.h	/^#define CONFIG_NR_DRAM_BANKS_MAX	/;"	d
CONFIG_NR_DRAM_POPULATED	include/configs/apf27.h	/^#define CONFIG_NR_DRAM_POPULATED /;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/BSC9131RDB.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/BSC9132QDS.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/C29XPCIE.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/MPC8313ERDB.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/MPC8536DS.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/MPC8569MDS.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/MPC8572DS.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/P1010RDB.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/P1022DS.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/UCP1020.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS16550_MIN_FUNCTIONS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_NS16550_MIN_FUNCTIONS$/;"	d
CONFIG_NS8382X	include/configs/TQM5200.h	/^#define CONFIG_NS8382X	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config NUM_DDR_CONTROLLERS$/;"	c	menu:LS102xA architecture
CONFIG_NUM_DDR_CONTROLLERS	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config NUM_DDR_CONTROLLERS$/;"	c	menu:Layerscape architecture
CONFIG_NUM_DDR_CONTROLLERS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/BSC9131RDB.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8349EMDS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8536DS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8540ADS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8541CDS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8544DS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8548CDS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8555CDS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8560ADS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8568MDS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8569MDS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8572DS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8610HPCD.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/MPC8641HPCN.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/P1022DS.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/UCP1020.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/controlcenterd.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/p1_twr.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/sbc8548.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/sbc8641d.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/sbc8641d.h	/^#define CONFIG_NUM_DDR_CONTROLLERS /;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/socrates.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/xpedite517x.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/xpedite520x.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/xpedite537x.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS	include/configs/xpedite550x.h	/^#define CONFIG_NUM_DDR_CONTROLLERS	/;"	d
CONFIG_NUM_DDR_CONTROLLERS_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config NUM_DDR_CONTROLLERS$/;"	c	menu:LS102xA architecture
CONFIG_NUM_DDR_CONTROLLERS_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config NUM_DDR_CONTROLLERS$/;"	c	menu:Layerscape architecture
CONFIG_NUM_DSP_CPUS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_NUM_DSP_CPUS	/;"	d
CONFIG_NUM_PAMU	arch/powerpc/include/asm/fsl_pamu.h	/^#define CONFIG_NUM_PAMU	/;"	d
CONFIG_NUVOTON_NCT6102D	drivers/misc/Kconfig	/^config NUVOTON_NCT6102D$/;"	c	menu:Multifunction device drivers
CONFIG_NUVOTON_NCT6102D_MODULE	drivers/misc/Kconfig	/^config NUVOTON_NCT6102D$/;"	c	menu:Multifunction device drivers
CONFIG_OCLK_DIV	include/configs/bf609-ezkit.h	/^#define CONFIG_OCLK_DIV	/;"	d
CONFIG_ODROID_REV_AIN	include/configs/odroid_xu3.h	/^#define CONFIG_ODROID_REV_AIN	/;"	d
CONFIG_OF_BOARD_SETUP	Kconfig	/^config OF_BOARD_SETUP$/;"	c	menu:Boot images
CONFIG_OF_BOARD_SETUP	include/config/auto.conf	/^CONFIG_OF_BOARD_SETUP=y$/;"	k
CONFIG_OF_BOARD_SETUP	include/generated/autoconf.h	/^#define CONFIG_OF_BOARD_SETUP /;"	d
CONFIG_OF_BOARD_SETUP_MODULE	Kconfig	/^config OF_BOARD_SETUP$/;"	c	menu:Boot images
CONFIG_OF_CONTROL	dts/Kconfig	/^config OF_CONTROL$/;"	c	menu:Device Tree Control
CONFIG_OF_CONTROL	include/config/auto.conf	/^CONFIG_OF_CONTROL=y$/;"	k
CONFIG_OF_CONTROL	include/generated/autoconf.h	/^#define CONFIG_OF_CONTROL /;"	d
CONFIG_OF_CONTROL_MODULE	dts/Kconfig	/^config OF_CONTROL$/;"	c	menu:Device Tree Control
CONFIG_OF_EMBED	dts/Kconfig	/^config OF_EMBED$/;"	c	choice:Device Tree Control""choice08bc65400104
CONFIG_OF_EMBED_MODULE	dts/Kconfig	/^config OF_EMBED$/;"	c	choice:Device Tree Control""choice08bc65400104
CONFIG_OF_HOSTFILE	dts/Kconfig	/^config OF_HOSTFILE$/;"	c	choice:Device Tree Control""choice08bc65400104
CONFIG_OF_HOSTFILE_MODULE	dts/Kconfig	/^config OF_HOSTFILE$/;"	c	choice:Device Tree Control""choice08bc65400104
CONFIG_OF_IDE_FIXUP	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_OF_IDE_FIXUP$/;"	d
CONFIG_OF_ISA_BUS	drivers/core/Kconfig	/^config OF_ISA_BUS$/;"	c	menu:Generic Driver Options
CONFIG_OF_ISA_BUS_MODULE	drivers/core/Kconfig	/^config OF_ISA_BUS$/;"	c	menu:Generic Driver Options
CONFIG_OF_LIBFDT	include/config/auto.conf	/^CONFIG_OF_LIBFDT=y$/;"	k
CONFIG_OF_LIBFDT	include/configs/rcar-gen3-common.h	/^#define CONFIG_OF_LIBFDT$/;"	d
CONFIG_OF_LIBFDT	include/generated/autoconf.h	/^#define CONFIG_OF_LIBFDT /;"	d
CONFIG_OF_LIBFDT	lib/Kconfig	/^config OF_LIBFDT$/;"	c	menu:Library routines
CONFIG_OF_LIBFDT_MODULE	lib/Kconfig	/^config OF_LIBFDT$/;"	c	menu:Library routines
CONFIG_OF_LIBFDT_OVERLAY	lib/Kconfig	/^config OF_LIBFDT_OVERLAY$/;"	c	menu:Library routines
CONFIG_OF_LIBFDT_OVERLAY_MODULE	lib/Kconfig	/^config OF_LIBFDT_OVERLAY$/;"	c	menu:Library routines
CONFIG_OF_LIST	dts/Kconfig	/^config OF_LIST$/;"	c	menu:Device Tree Control
CONFIG_OF_LIST_MODULE	dts/Kconfig	/^config OF_LIST$/;"	c	menu:Device Tree Control
CONFIG_OF_SEPARATE	dts/Kconfig	/^config OF_SEPARATE$/;"	c	choice:Device Tree Control""choice08bc65400104
CONFIG_OF_SEPARATE	include/config/auto.conf	/^CONFIG_OF_SEPARATE=y$/;"	k
CONFIG_OF_SEPARATE	include/generated/autoconf.h	/^#define CONFIG_OF_SEPARATE /;"	d
CONFIG_OF_SEPARATE_MODULE	dts/Kconfig	/^config OF_SEPARATE$/;"	c	choice:Device Tree Control""choice08bc65400104
CONFIG_OF_SPL_REMOVE_PROPS	dts/Kconfig	/^config OF_SPL_REMOVE_PROPS$/;"	c	menu:Device Tree Control
CONFIG_OF_SPL_REMOVE_PROPS_MODULE	dts/Kconfig	/^config OF_SPL_REMOVE_PROPS$/;"	c	menu:Device Tree Control
CONFIG_OF_STDOUT_VIA_ALIAS	Kconfig	/^config OF_STDOUT_VIA_ALIAS$/;"	c	menu:Boot images
CONFIG_OF_STDOUT_VIA_ALIAS_MODULE	Kconfig	/^config OF_STDOUT_VIA_ALIAS$/;"	c	menu:Boot images
CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	include/configs/ac14xx.h	/^#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	/;"	d
CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	include/configs/aria.h	/^#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	/;"	d
CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	include/configs/mpc5121ads.h	/^#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	/;"	d
CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	include/configs/pdm360ng.h	/^#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	/;"	d
CONFIG_OF_SYSTEM_SETUP	Kconfig	/^config OF_SYSTEM_SETUP$/;"	c	menu:Boot images
CONFIG_OF_SYSTEM_SETUP_MODULE	Kconfig	/^config OF_SYSTEM_SETUP$/;"	c	menu:Boot images
CONFIG_OF_TRANSLATE	drivers/core/Kconfig	/^config OF_TRANSLATE$/;"	c	menu:Generic Driver Options
CONFIG_OF_TRANSLATE	include/config/auto.conf	/^CONFIG_OF_TRANSLATE=y$/;"	k
CONFIG_OF_TRANSLATE	include/generated/autoconf.h	/^#define CONFIG_OF_TRANSLATE /;"	d
CONFIG_OF_TRANSLATE_MODULE	drivers/core/Kconfig	/^config OF_TRANSLATE$/;"	c	menu:Generic Driver Options
CONFIG_OLD_SUNXI_KERNEL_COMPAT	board/sunxi/Kconfig	/^config OLD_SUNXI_KERNEL_COMPAT$/;"	c
CONFIG_OLD_SUNXI_KERNEL_COMPAT_MODULE	board/sunxi/Kconfig	/^config OLD_SUNXI_KERNEL_COMPAT$/;"	c
CONFIG_OMAP	include/configs/am3517_crane.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/am3517_evm.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/bur_am335x_common.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/cm_t35.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/cm_t3517.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/kc1.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/mcx.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/omap3_evm.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/siemens-am33x-common.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/sniper.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/tam3517-common.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/tao3530.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP	include/configs/ti814x_evm.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/ti816x_evm.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/ti_armv7_omap.h	/^#define CONFIG_OMAP$/;"	d
CONFIG_OMAP	include/configs/tricorder.h	/^#define CONFIG_OMAP	/;"	d
CONFIG_OMAP3430	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP3430	/;"	d
CONFIG_OMAP34XX	arch/arm/Kconfig	/^config OMAP34XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OMAP34XX_MODULE	arch/arm/Kconfig	/^config OMAP34XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OMAP3_AM3517CRANE	include/configs/am3517_crane.h	/^#define CONFIG_OMAP3_AM3517CRANE	/;"	d
CONFIG_OMAP3_DEVKIT8000	include/configs/devkit8000.h	/^#define CONFIG_OMAP3_DEVKIT8000	/;"	d
CONFIG_OMAP3_EVM	include/configs/omap3_evm.h	/^#define CONFIG_OMAP3_EVM	/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/cm_t35.h	/^#define CONFIG_OMAP3_GPIO_2$/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/cm_t3517.h	/^#define CONFIG_OMAP3_GPIO_2$/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/mcx.h	/^#define CONFIG_OMAP3_GPIO_2$/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/omap3_overo.h	/^#define CONFIG_OMAP3_GPIO_2	/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/sniper.h	/^#define CONFIG_OMAP3_GPIO_2$/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/tao3530.h	/^#define CONFIG_OMAP3_GPIO_2	/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/tricorder.h	/^#define CONFIG_OMAP3_GPIO_2	/;"	d
CONFIG_OMAP3_GPIO_2	include/configs/twister.h	/^#define CONFIG_OMAP3_GPIO_2$/;"	d
CONFIG_OMAP3_GPIO_3	include/configs/omap3_igep00x0.h	/^#define CONFIG_OMAP3_GPIO_3	/;"	d
CONFIG_OMAP3_GPIO_3	include/configs/omap3_overo.h	/^#define CONFIG_OMAP3_GPIO_3	/;"	d
CONFIG_OMAP3_GPIO_3	include/configs/sniper.h	/^#define CONFIG_OMAP3_GPIO_3$/;"	d
CONFIG_OMAP3_GPIO_3	include/configs/tao3530.h	/^#define CONFIG_OMAP3_GPIO_3	/;"	d
CONFIG_OMAP3_GPIO_4	include/configs/mt_ventoux.h	/^#define CONFIG_OMAP3_GPIO_4$/;"	d
CONFIG_OMAP3_GPIO_4	include/configs/omap3_overo.h	/^#define CONFIG_OMAP3_GPIO_4	/;"	d
CONFIG_OMAP3_GPIO_4	include/configs/omap3_pandora.h	/^#define CONFIG_OMAP3_GPIO_4	/;"	d
CONFIG_OMAP3_GPIO_4	include/configs/sniper.h	/^#define CONFIG_OMAP3_GPIO_4$/;"	d
CONFIG_OMAP3_GPIO_4	include/configs/tao3530.h	/^#define CONFIG_OMAP3_GPIO_4	/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/cm_t35.h	/^#define CONFIG_OMAP3_GPIO_5$/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/cm_t3517.h	/^#define CONFIG_OMAP3_GPIO_5$/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/mcx.h	/^#define CONFIG_OMAP3_GPIO_5$/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/omap3_beagle.h	/^#define CONFIG_OMAP3_GPIO_5	/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/omap3_igep00x0.h	/^#define CONFIG_OMAP3_GPIO_5	/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/omap3_overo.h	/^#define CONFIG_OMAP3_GPIO_5	/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/sniper.h	/^#define CONFIG_OMAP3_GPIO_5$/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/tam3517-common.h	/^#define CONFIG_OMAP3_GPIO_5$/;"	d
CONFIG_OMAP3_GPIO_5	include/configs/tao3530.h	/^#define CONFIG_OMAP3_GPIO_5	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/cm_t35.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/cm_t3517.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/omap3_beagle.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/omap3_igep00x0.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/omap3_logic.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/omap3_overo.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/omap3_pandora.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/sniper.h	/^#define CONFIG_OMAP3_GPIO_6$/;"	d
CONFIG_OMAP3_GPIO_6	include/configs/tao3530.h	/^#define CONFIG_OMAP3_GPIO_6	/;"	d
CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID	include/configs/omap3_logic.h	/^#define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID$/;"	d
CONFIG_OMAP3_MCX	include/configs/mcx.h	/^#define CONFIG_OMAP3_MCX	/;"	d
CONFIG_OMAP3_MICRON_DDR	include/configs/tam3517-common.h	/^#define CONFIG_OMAP3_MICRON_DDR	/;"	d
CONFIG_OMAP3_RX51	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP3_RX51	/;"	d
CONFIG_OMAP3_SPI	drivers/spi/Kconfig	/^config OMAP3_SPI$/;"	c	menu:SPI Support
CONFIG_OMAP3_SPI	include/configs/brppt1.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/cm_t35.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/cm_t3517.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/omap3_beagle.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/omap3_cairo.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/rut.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/siemens-am33x-common.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/tao3530.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI	include/configs/ti_armv7_omap.h	/^#define CONFIG_OMAP3_SPI$/;"	d
CONFIG_OMAP3_SPI_MODULE	drivers/spi/Kconfig	/^config OMAP3_SPI$/;"	c	menu:SPI Support
CONFIG_OMAP3_ZOOM1	include/configs/omap3_zoom1.h	/^#define CONFIG_OMAP3_ZOOM1	/;"	d
CONFIG_OMAP4430	include/configs/kc1.h	/^#define CONFIG_OMAP4430$/;"	d
CONFIG_OMAP4430	include/configs/ti_omap4_common.h	/^#define CONFIG_OMAP4430	/;"	d
CONFIG_OMAP44XX	arch/arm/Kconfig	/^config OMAP44XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OMAP44XX_MODULE	arch/arm/Kconfig	/^config OMAP44XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OMAP54XX	arch/arm/Kconfig	/^config OMAP54XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OMAP54XX_MODULE	arch/arm/Kconfig	/^config OMAP54XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OMAP_COMMON	include/configs/am3517_crane.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/am3517_evm.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/bur_am335x_common.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/cm_t335.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/cm_t35.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/cm_t3517.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/kc1.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/mcx.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/omap3_evm.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/siemens-am33x-common.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/sniper.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/tam3517-common.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/tao3530.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/ti814x_evm.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/ti816x_evm.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/ti_armv7_omap.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_COMMON	include/configs/tricorder.h	/^#define CONFIG_OMAP_COMMON$/;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/cm_t3517.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/duovero.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/mcx.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/omap3_beagle.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/omap3_overo.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/omap4_panda.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/tam3517-common.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	include/configs/tao3530.h	/^#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	include/configs/cm_t3517.h	/^#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	include/configs/cm_t54.h	/^#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	include/configs/duovero.h	/^#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	include/configs/omap4_panda.h	/^#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	include/configs/omap5_uevm.h	/^#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO /;"	d
CONFIG_OMAP_EHCI_PHY3_RESET_GPIO	include/configs/cm_t54.h	/^#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO	/;"	d
CONFIG_OMAP_EHCI_PHY3_RESET_GPIO	include/configs/omap5_uevm.h	/^#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO /;"	d
CONFIG_OMAP_GPIO	include/configs/am3517_evm.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/bur_am335x_common.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/cm_t35.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/cm_t3517.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/kc1.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/mcx.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/omap3_evm.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/siemens-am33x-common.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/sniper.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/tam3517-common.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/tao3530.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/ti814x_evm.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/ti816x_evm.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/ti_armv7_omap.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_GPIO	include/configs/tricorder.h	/^#define CONFIG_OMAP_GPIO$/;"	d
CONFIG_OMAP_HSMMC	include/configs/am3517_crane.h	/^#define CONFIG_OMAP_HSMMC	/;"	d
CONFIG_OMAP_HSMMC	include/configs/am3517_evm.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/brppt1.h	/^ #define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/brxre1.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/cm_t35.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/cm_t3517.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/k2g_evm.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/kc1.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/mcx.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/nokia_rx51.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/omap3_evm.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/siemens-am33x-common.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/sniper.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/tam3517-common.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/tao3530.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/ti814x_evm.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/ti816x_evm.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/ti_armv7_omap.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_HSMMC	include/configs/tricorder.h	/^#define CONFIG_OMAP_HSMMC$/;"	d
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC	include/configs/cm_t54.h	/^#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC	/;"	d
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC	include/configs/omap5_uevm.h	/^#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC	/;"	d
CONFIG_OMAP_TIMER	drivers/timer/Kconfig	/^config OMAP_TIMER$/;"	c	menu:Timer Support
CONFIG_OMAP_TIMER_MODULE	drivers/timer/Kconfig	/^config OMAP_TIMER$/;"	c	menu:Timer Support
CONFIG_OMAP_USB2PHY2_HOST	include/configs/dra7xx_evm.h	/^#define CONFIG_OMAP_USB2PHY2_HOST$/;"	d
CONFIG_OMAP_USB3PHY1_HOST	include/configs/am57xx_evm.h	/^#define CONFIG_OMAP_USB3PHY1_HOST$/;"	d
CONFIG_OMAP_USB_PHY	include/configs/am43xx_evm.h	/^#define CONFIG_OMAP_USB_PHY$/;"	d
CONFIG_OMAP_USB_PHY	include/configs/am57xx_evm.h	/^#define CONFIG_OMAP_USB_PHY$/;"	d
CONFIG_OMAP_USB_PHY	include/configs/cm_t43.h	/^#define CONFIG_OMAP_USB_PHY$/;"	d
CONFIG_OMAP_USB_PHY	include/configs/dra7xx_evm.h	/^#define CONFIG_OMAP_USB_PHY$/;"	d
CONFIG_OMAP_VC_I2C_HS_MCODE	arch/arm/cpu/armv7/omap-common/vc.c	/^#define CONFIG_OMAP_VC_I2C_HS_MCODE /;"	d	file:
CONFIG_OMAP_WATCHDOG	include/configs/brppt1.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_OMAP_WATCHDOG	include/configs/draco.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_OMAP_WATCHDOG	include/configs/etamin.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_OMAP_WATCHDOG	include/configs/pxm2.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_OMAP_WATCHDOG	include/configs/rastaban.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_OMAP_WATCHDOG	include/configs/thuban.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_OMAP_WATCHDOG	include/configs/ti_am335x_common.h	/^#define CONFIG_OMAP_WATCHDOG$/;"	d
CONFIG_ONENAND_BOOT	common/Kconfig	/^config ONENAND_BOOT$/;"	c	menu:Boot media
CONFIG_ONENAND_BOOT_MODULE	common/Kconfig	/^config ONENAND_BOOT$/;"	c	menu:Boot media
CONFIG_OPENRISC	arch/Kconfig	/^config OPENRISC$/;"	c	choice:choice07312ef30104
CONFIG_OPENRISC_MODULE	arch/Kconfig	/^config OPENRISC$/;"	c	choice:choice07312ef30104
CONFIG_ORIGEN	include/configs/origen.h	/^#define CONFIG_ORIGEN	/;"	d
CONFIG_ORION5X	arch/arm/Kconfig	/^config ORION5X$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_ORION5X_MODULE	arch/arm/Kconfig	/^config ORION5X$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_OS1_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_OS1_ENV_ADDR	/;"	d
CONFIG_OS1_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_OS1_ENV_ADDR	/;"	d
CONFIG_OS1_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_OS1_ENV_ADDR	/;"	d
CONFIG_OS1_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_OS1_ENV_ADDR	/;"	d
CONFIG_OS2_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_OS2_ENV_ADDR	/;"	d
CONFIG_OS2_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_OS2_ENV_ADDR	/;"	d
CONFIG_OS2_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_OS2_ENV_ADDR	/;"	d
CONFIG_OS2_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_OS2_ENV_ADDR	/;"	d
CONFIG_OS_ENV_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_OS_ENV_ADDR	/;"	d
CONFIG_OTHBOOTARGS	include/configs/x86-common.h	/^#define CONFIG_OTHBOOTARGS	/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/M5253DEMO.h	/^#	define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/M5275EVB.h	/^#	define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/atngw100.h	/^#define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/atngw100mkii.h	/^#define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/atstk1002.h	/^#define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/eb_cpu5282.h	/^#define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_OVERWRITE_ETHADDR_ONCE	include/configs/grasshopper.h	/^#define CONFIG_OVERWRITE_ETHADDR_ONCE$/;"	d
CONFIG_P1010	include/configs/P1010RDB.h	/^#define CONFIG_P1010$/;"	d
CONFIG_P1020	include/configs/UCP1020.h	/^#define CONFIG_P1020$/;"	d
CONFIG_P1020	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_P1020$/;"	d
CONFIG_P1021	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_P1021$/;"	d
CONFIG_P1022	include/configs/P1022DS.h	/^#define CONFIG_P1022$/;"	d
CONFIG_P1022	include/configs/controlcenterd.h	/^#define CONFIG_P1022$/;"	d
CONFIG_P1022DS	include/configs/P1022DS.h	/^#define CONFIG_P1022DS$/;"	d
CONFIG_P1023	include/configs/P1023RDB.h	/^#define CONFIG_P1023$/;"	d
CONFIG_P1024	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_P1024$/;"	d
CONFIG_P1025	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_P1025$/;"	d
CONFIG_P1025	include/configs/p1_twr.h	/^#define CONFIG_P1025$/;"	d
CONFIG_P2020	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_P2020$/;"	d
CONFIG_P2020	include/configs/xpedite550x.h	/^#define CONFIG_P2020	/;"	d
CONFIG_P2041RDB	include/configs/P2041RDB.h	/^#define CONFIG_P2041RDB$/;"	d
CONFIG_P3041DS	include/configs/P3041DS.h	/^#define CONFIG_P3041DS$/;"	d
CONFIG_P4080DS	include/configs/P4080DS.h	/^#define CONFIG_P4080DS$/;"	d
CONFIG_P5020DS	include/configs/P5020DS.h	/^#define CONFIG_P5020DS$/;"	d
CONFIG_P5040DS	include/configs/P5040DS.h	/^#define CONFIG_P5040DS$/;"	d
CONFIG_PAGE_CNT_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_PAGE_CNT_MASK	/;"	d	file:
CONFIG_PAGE_CNT_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define CONFIG_PAGE_CNT_SHIFT	/;"	d	file:
CONFIG_PALMAS_POWER	include/configs/ti_omap5_common.h	/^#define CONFIG_PALMAS_POWER$/;"	d
CONFIG_PANIC_HANG	include/configs/B4860QDS.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/C29XPCIE.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PANIC_HANG	include/configs/MPC8536DS.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/MPC8544DS.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/MPC8572DS.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/P1010RDB.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/P1023RDB.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/P2041RDB.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/T102xQDS.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/T102xRDB.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/T1040QDS.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/T104xRDB.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/T4240RDB.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/UCP1020.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/bf537-minotaur.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/bf537-srv1.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/bfin_adi_common.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/blackstamp.h	/^#define CONFIG_PANIC_HANG /;"	d
CONFIG_PANIC_HANG	include/configs/blackvme.h	/^#define CONFIG_PANIC_HANG /;"	d
CONFIG_PANIC_HANG	include/configs/corenet_ds.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/cyrus.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/gdppc440etx.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PANIC_HANG	include/configs/ls1012a_common.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PANIC_HANG	include/configs/ls2080a_common.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/luan.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PANIC_HANG	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/p1_twr.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/qemu-ppce500.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/t4qds.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/tricorder.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PANIC_HANG	include/configs/uniphier.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PANIC_HANG	include/configs/xpedite1000.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/xpedite517x.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/xpedite520x.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/xpedite537x.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/xpedite550x.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/xtfpga.h	/^#define CONFIG_PANIC_HANG	/;"	d
CONFIG_PANIC_HANG	include/configs/yosemite.h	/^#define CONFIG_PANIC_HANG$/;"	d
CONFIG_PARTITIONS	include/autoconf.mk	/^CONFIG_PARTITIONS=y$/;"	m
CONFIG_PARTITIONS	include/config_defaults.h	/^#define CONFIG_PARTITIONS /;"	d
CONFIG_PARTITIONS	spl/include/autoconf.mk	/^CONFIG_PARTITIONS=y$/;"	m
CONFIG_PARTITION_UUIDS	include/autoconf.mk	/^CONFIG_PARTITION_UUIDS=y$/;"	m
CONFIG_PARTITION_UUIDS	include/config_distro_bootcmd.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/am3517_evm.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/baltos.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/dragonboard410c.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/exynos-common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/kc1.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/pic32mzdask.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/rk3036_common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/rk3288_common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/rockchip-common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/rpi.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/s5p_goni.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/sandbox.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/snapper9g45.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/sniper.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/tbs2910.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/tegra-common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/ti_armv7_common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/vinco.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/warp7.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PARTITION_UUIDS	include/configs/x86-common.h	/^#define CONFIG_PARTITION_UUIDS$/;"	d
CONFIG_PATA_BFIN	include/configs/bf548-ezkit.h	/^#define CONFIG_PATA_BFIN$/;"	d
CONFIG_PATI	include/configs/PATI.h	/^#define CONFIG_PATI	/;"	d
CONFIG_PB1X00	include/configs/pb1x00.h	/^#define CONFIG_PB1X00	/;"	d
CONFIG_PCA953X	include/configs/cm_t335.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/hrcon.h	/^#define CONFIG_PCA953X	/;"	d
CONFIG_PCA953X	include/configs/iocon.h	/^#define CONFIG_PCA953X	/;"	d
CONFIG_PCA953X	include/configs/mx6qsabreauto.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/mx6sxsabreauto.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/ot1200.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/snapper9260.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/strider.h	/^#define CONFIG_PCA953X	/;"	d
CONFIG_PCA953X	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/xpedite517x.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/xpedite520x.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/xpedite537x.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA953X	include/configs/xpedite550x.h	/^#define CONFIG_PCA953X$/;"	d
CONFIG_PCA9551_I2C_ADDR	drivers/misc/Kconfig	/^config PCA9551_I2C_ADDR$/;"	c	menu:Multifunction device drivers
CONFIG_PCA9551_I2C_ADDR_MODULE	drivers/misc/Kconfig	/^config PCA9551_I2C_ADDR$/;"	c	menu:Multifunction device drivers
CONFIG_PCA9551_LED	drivers/misc/Kconfig	/^config PCA9551_LED$/;"	c	menu:Multifunction device drivers
CONFIG_PCA9551_LED_MODULE	drivers/misc/Kconfig	/^config PCA9551_LED$/;"	c	menu:Multifunction device drivers
CONFIG_PCA9564_BASE	include/configs/bf561-acvilon.h	/^#define CONFIG_PCA9564_BASE	/;"	d
CONFIG_PCA9564_I2C	include/configs/bf561-acvilon.h	/^#define CONFIG_PCA9564_I2C$/;"	d
CONFIG_PCA9698	include/configs/controlcenterd.h	/^#define CONFIG_PCA9698	/;"	d
CONFIG_PCA9698	include/configs/hrcon.h	/^#define CONFIG_PCA9698	/;"	d
CONFIG_PCA9698	include/configs/io64.h	/^#define CONFIG_PCA9698	/;"	d
CONFIG_PCA9698	include/configs/iocon.h	/^#define CONFIG_PCA9698	/;"	d
CONFIG_PCA9698	include/configs/strider.h	/^#define CONFIG_PCA9698	/;"	d
CONFIG_PCF8575_GPIO	drivers/gpio/Kconfig	/^config PCF8575_GPIO$/;"	c	menu:GPIO Support
CONFIG_PCF8575_GPIO_MODULE	drivers/gpio/Kconfig	/^config PCF8575_GPIO$/;"	c	menu:GPIO Support
CONFIG_PCH_GBE	drivers/net/Kconfig	/^config PCH_GBE$/;"	c
CONFIG_PCH_GBE_MODULE	drivers/net/Kconfig	/^config PCH_GBE$/;"	c
CONFIG_PCI	drivers/pci/Kconfig	/^menuconfig PCI$/;"	c
CONFIG_PCI1	include/configs/MPC8536DS.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCI1	include/configs/MPC8544DS.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCI1	include/configs/MPC8548CDS.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCI1	include/configs/MPC8568MDS.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCI1	include/configs/MPC8610HPCD.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCI1	include/configs/qemu-ppce500.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCI1	include/configs/sbc8548.h	/^#define CONFIG_PCI1$/;"	d
CONFIG_PCI1	include/configs/xpedite520x.h	/^#define CONFIG_PCI1	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/M54455EVB.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/M5475EVB.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/M5485EVB.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/TQM5200.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/a4m072.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/inka4x0.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	include/configs/jupiter.h	/^#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	/;"	d
CONFIG_PCIE	include/configs/MPC8308RDB.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE	include/configs/MPC8315ERDB.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE	include/configs/MPC837XEMDS.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE	include/configs/MPC837XERDB.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE	include/configs/hrcon.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE	include/configs/mpc8308_p1m.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE	include/configs/strider.h	/^#define CONFIG_PCIE$/;"	d
CONFIG_PCIE1	include/configs/B4860QDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/BSC9132QDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/C29XPCIE.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8536DS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8544DS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8548CDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8568MDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8569MDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8572DS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8610HPCD.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/MPC8641HPCN.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/P1010RDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/P1022DS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/P1023RDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/P2041RDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T102xQDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T102xRDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T1040QDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T104xRDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T208xQDS.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T208xRDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/T4240RDB.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/UCP1020.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/controlcenterd.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/corenet_ds.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/cyrus.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/km/kmp204x-common.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/ls1012aqds.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/ls1012ardb.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/ls1021aqds.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/ls1021atwr.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/ls1043a_common.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/ls2080a_common.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/p1_twr.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/sbc8548.h	/^#define CONFIG_PCIE1$/;"	d
CONFIG_PCIE1	include/configs/sbc8641d.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/t4qds.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/xpedite517x.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/xpedite537x.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE1	include/configs/xpedite550x.h	/^#define CONFIG_PCIE1	/;"	d
CONFIG_PCIE2	include/configs/MPC8536DS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/MPC8544DS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/MPC8572DS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/MPC8610HPCD.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/MPC8641HPCN.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/P1010RDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/P1022DS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/P1023RDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/P2041RDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T102xQDS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T102xRDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T1040QDS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T104xRDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T208xQDS.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T208xRDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/T4240RDB.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/UCP1020.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/corenet_ds.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/cyrus.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/ls1021aqds.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/ls1021atwr.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/ls1043a_common.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/ls2080a_common.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/p1_twr.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/sbc8641d.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/t4qds.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/xpedite517x.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE2	include/configs/xpedite537x.h	/^#define CONFIG_PCIE2	/;"	d
CONFIG_PCIE3	include/configs/MPC8536DS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/MPC8544DS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/MPC8572DS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/P1022DS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/P1023RDB.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/P2041RDB.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/P3041DS.h	/^#define CONFIG_PCIE3$/;"	d
CONFIG_PCIE3	include/configs/P4080DS.h	/^#define CONFIG_PCIE3$/;"	d
CONFIG_PCIE3	include/configs/P5020DS.h	/^#define CONFIG_PCIE3$/;"	d
CONFIG_PCIE3	include/configs/P5040DS.h	/^#define CONFIG_PCIE3$/;"	d
CONFIG_PCIE3	include/configs/T102xQDS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/T102xRDB.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/T1040QDS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/T104xRDB.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/T208xQDS.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/T208xRDB.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/T4240RDB.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/cyrus.h	/^#define CONFIG_PCIE3$/;"	d
CONFIG_PCIE3	include/configs/km/kmp204x-common.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/ls1043a_common.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/ls2080a_common.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE3	include/configs/t4qds.h	/^#define CONFIG_PCIE3	/;"	d
CONFIG_PCIE4	include/configs/P3041DS.h	/^#define CONFIG_PCIE4$/;"	d
CONFIG_PCIE4	include/configs/P5020DS.h	/^#define CONFIG_PCIE4$/;"	d
CONFIG_PCIE4	include/configs/T102xRDB.h	/^#define CONFIG_PCIE4	/;"	d
CONFIG_PCIE4	include/configs/T1040QDS.h	/^#define CONFIG_PCIE4	/;"	d
CONFIG_PCIE4	include/configs/T104xRDB.h	/^#define CONFIG_PCIE4	/;"	d
CONFIG_PCIE4	include/configs/T208xQDS.h	/^#define CONFIG_PCIE4	/;"	d
CONFIG_PCIE4	include/configs/T208xRDB.h	/^#define CONFIG_PCIE4	/;"	d
CONFIG_PCIE4	include/configs/T4240QDS.h	/^#define CONFIG_PCIE4$/;"	d
CONFIG_PCIE4	include/configs/T4240RDB.h	/^#define CONFIG_PCIE4$/;"	d
CONFIG_PCIE4	include/configs/cyrus.h	/^#define CONFIG_PCIE4$/;"	d
CONFIG_PCIE4	include/configs/ls2080a_common.h	/^#define CONFIG_PCIE4	/;"	d
CONFIG_PCIE_ECAM_BASE	arch/x86/Kconfig	/^config PCIE_ECAM_BASE$/;"	c	menu:x86 architecture
CONFIG_PCIE_ECAM_BASE	arch/x86/cpu/quark/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/advantech/som-db5800-som-6867/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/dfi/dfi-bt700/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/google/chromebook_link/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/google/chromebook_samus/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/intel/bayleybay/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE	board/intel/minnowmax/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	arch/x86/Kconfig	/^config PCIE_ECAM_BASE$/;"	c	menu:x86 architecture
CONFIG_PCIE_ECAM_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/advantech/som-db5800-som-6867/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/dfi/dfi-bt700/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/google/chromebook_link/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/google/chromebook_samus/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/intel/bayleybay/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_BASE_MODULE	board/intel/minnowmax/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
CONFIG_PCIE_ECAM_SIZE	arch/x86/Kconfig	/^config PCIE_ECAM_SIZE$/;"	c	menu:x86 architecture
CONFIG_PCIE_ECAM_SIZE_MODULE	arch/x86/Kconfig	/^config PCIE_ECAM_SIZE$/;"	c	menu:x86 architecture
CONFIG_PCIE_IMX	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/ge_bx50v3.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/gw_ventana.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/mx6sabresd.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/mx6sxsabresd.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/nitrogen6x.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/novena.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/tbs2910.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX	include/configs/zc5202.h	/^#define CONFIG_PCIE_IMX$/;"	d
CONFIG_PCIE_IMX_PERST_GPIO	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PCIE_IMX_PERST_GPIO /;"	d
CONFIG_PCIE_IMX_PERST_GPIO	include/configs/ge_bx50v3.h	/^#define CONFIG_PCIE_IMX_PERST_GPIO	/;"	d
CONFIG_PCIE_IMX_PERST_GPIO	include/configs/mx6sabresd.h	/^#define CONFIG_PCIE_IMX_PERST_GPIO	/;"	d
CONFIG_PCIE_IMX_PERST_GPIO	include/configs/mx6sxsabresd.h	/^#define CONFIG_PCIE_IMX_PERST_GPIO	/;"	d
CONFIG_PCIE_IMX_PERST_GPIO	include/configs/novena.h	/^#define CONFIG_PCIE_IMX_PERST_GPIO	/;"	d
CONFIG_PCIE_IMX_PERST_GPIO	include/configs/tbs2910.h	/^#define CONFIG_PCIE_IMX_PERST_GPIO	/;"	d
CONFIG_PCIE_IMX_POWER_GPIO	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PCIE_IMX_POWER_GPIO /;"	d
CONFIG_PCIE_IMX_POWER_GPIO	include/configs/ge_bx50v3.h	/^#define CONFIG_PCIE_IMX_POWER_GPIO	/;"	d
CONFIG_PCIE_IMX_POWER_GPIO	include/configs/mx6sabresd.h	/^#define CONFIG_PCIE_IMX_POWER_GPIO	/;"	d
CONFIG_PCIE_IMX_POWER_GPIO	include/configs/mx6sxsabresd.h	/^#define CONFIG_PCIE_IMX_POWER_GPIO	/;"	d
CONFIG_PCIE_IMX_POWER_GPIO	include/configs/novena.h	/^#define CONFIG_PCIE_IMX_POWER_GPIO	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls1012aqds.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls1012ardb.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls1021aqds.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls1021atwr.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls1043a_common.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls2080a_common.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls2080aqds.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCIE_LAYERSCAPE	include/configs/ls2080ardb.h	/^#define CONFIG_PCIE_LAYERSCAPE	/;"	d
CONFIG_PCI_4xx_PTM_OVERWRITE	include/configs/CPCI4052.h	/^#define CONFIG_PCI_4xx_PTM_OVERWRITE	/;"	d
CONFIG_PCI_4xx_PTM_OVERWRITE	include/configs/PMC405DE.h	/^#define CONFIG_PCI_4xx_PTM_OVERWRITE	/;"	d
CONFIG_PCI_66M	include/configs/MPC8349EMDS.h	/^#define CONFIG_PCI_66M$/;"	d
CONFIG_PCI_66M	include/configs/MPC8349ITX.h	/^#define CONFIG_PCI_66M$/;"	d
CONFIG_PCI_66M	include/configs/vme8349.h	/^#define CONFIG_PCI_66M$/;"	d
CONFIG_PCI_BOOTDELAY	include/configs/CPCI2DP.h	/^#define CONFIG_PCI_BOOTDELAY /;"	d
CONFIG_PCI_BOOTDELAY	include/configs/CPCI4052.h	/^#define CONFIG_PCI_BOOTDELAY /;"	d
CONFIG_PCI_BOOTDELAY	include/configs/PMC440.h	/^#define CONFIG_PCI_BOOTDELAY /;"	d
CONFIG_PCI_BOOTDELAY	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_BOOTDELAY	/;"	d
CONFIG_PCI_BOOTDELAY	include/configs/icon.h	/^#define CONFIG_PCI_BOOTDELAY	/;"	d
CONFIG_PCI_CLK_FREQ	include/configs/socrates.h	/^#define CONFIG_PCI_CLK_FREQ	/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/CPCI2DP.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE /;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/CPCI4052.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE /;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/PLU405.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE /;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/canyonlands.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/icon.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/intip.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/katmai.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/kilauea.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/makalu.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/t3corp.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/x86-common.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_CONFIG_HOST_BRIDGE	include/configs/yucca.h	/^#define CONFIG_PCI_CONFIG_HOST_BRIDGE$/;"	d
CONFIG_PCI_DISABLE_PCIE	include/configs/intip.h	/^#define CONFIG_PCI_DISABLE_PCIE$/;"	d
CONFIG_PCI_EHCI_DEVICE	include/configs/MPC8544DS.h	/^#define CONFIG_PCI_EHCI_DEVICE	/;"	d
CONFIG_PCI_EHCI_DEVICE	include/configs/MPC8572DS.h	/^#define CONFIG_PCI_EHCI_DEVICE	/;"	d
CONFIG_PCI_EHCI_DEVNO	include/configs/socrates.h	/^#define CONFIG_PCI_EHCI_DEVNO	/;"	d
CONFIG_PCI_FIXUP_DEV	include/configs/gw_ventana.h	/^#define CONFIG_PCI_FIXUP_DEV$/;"	d
CONFIG_PCI_GT64120	include/configs/malta.h	/^#define CONFIG_PCI_GT64120$/;"	d
CONFIG_PCI_HOST	include/configs/CPCI2DP.h	/^#define CONFIG_PCI_HOST	/;"	d
CONFIG_PCI_HOST	include/configs/CPCI4052.h	/^#define CONFIG_PCI_HOST	/;"	d
CONFIG_PCI_HOST	include/configs/MIP405.h	/^#define CONFIG_PCI_HOST /;"	d
CONFIG_PCI_HOST	include/configs/PIP405.h	/^#define CONFIG_PCI_HOST /;"	d
CONFIG_PCI_HOST	include/configs/PLU405.h	/^#define CONFIG_PCI_HOST	/;"	d
CONFIG_PCI_HOST	include/configs/PMC405DE.h	/^#define CONFIG_PCI_HOST	/;"	d
CONFIG_PCI_HOST	include/configs/bubinga.h	/^#define CONFIG_PCI_HOST	/;"	d
CONFIG_PCI_HOST	include/configs/walnut.h	/^#define CONFIG_PCI_HOST /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/B4860QDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/BSC9132QDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/C29XPCIE.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/CPCI2DP.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/CPCI4052.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MIP405.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8308RDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8313ERDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8315ERDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8323ERDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC832XEMDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8349EMDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8349ITX.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC837XEMDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC837XERDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8536DS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8540ADS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8541CDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8544DS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8548CDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8555CDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8560ADS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8568MDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8569MDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8572DS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8610HPCD.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/MPC8641HPCN.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/P1010RDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/P1022DS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/P1023RDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/P2041RDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/PIP405.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/PLU405.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/PMC405DE.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/PMC440.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T102xQDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T102xRDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T1040QDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T104xRDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T208xQDS.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T208xRDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/T4240RDB.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/TQM834x.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/UCP1020.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/aria.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/bamboo.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/bubinga.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/canyonlands.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/controlcenterd.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/corenet_ds.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/cyrus.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/gdppc440etx.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/hrcon.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/icon.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/intip.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/katmai.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/kilauea.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/km/kmp204x-common.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/luan.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/makalu.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/mpc5121ads.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/mpc8308_p1m.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/p1_twr.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/qemu-ppce500.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/sbc8349.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/sbc8548.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/sbc8641d.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/sequoia.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/socrates.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/strider.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/t3corp.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/t4qds.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/ve8313.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/vme8349.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE$/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/walnut.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/xpedite1000.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/xpedite517x.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/xpedite520x.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/xpedite537x.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/xpedite550x.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE /;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/yosemite.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_INDIRECT_BRIDGE	include/configs/yucca.h	/^#define CONFIG_PCI_INDIRECT_BRIDGE	/;"	d
CONFIG_PCI_IO_BUS	include/configs/TQM5200.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/a4m072.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/inka4x0.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/ipek01.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/jupiter.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/o2dnt-common.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/pcm030.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/r2dplus.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/r7780mp.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_BUS	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_IO_BUS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/TQM5200.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/a4m072.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/inka4x0.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/ipek01.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/jupiter.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/o2dnt-common.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/pcm030.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/r2dplus.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/r7780mp.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_PHYS	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_IO_PHYS	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/TQM5200.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/a4m072.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/inka4x0.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/ipek01.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/jupiter.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/pcm030.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/r2dplus.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/r7780mp.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_IO_SIZE	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_IO_SIZE	/;"	d
CONFIG_PCI_MEMORY_BUS	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define CONFIG_PCI_MEMORY_BUS	/;"	d	file:
CONFIG_PCI_MEMORY_PHYS	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define CONFIG_PCI_MEMORY_PHYS	/;"	d	file:
CONFIG_PCI_MEMORY_SIZE	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define CONFIG_PCI_MEMORY_SIZE	/;"	d	file:
CONFIG_PCI_MEM_BUS	include/configs/TQM5200.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/a4m072.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/inka4x0.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/ipek01.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/jupiter.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/o2dnt-common.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/pcm030.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/r2dplus.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/r7780mp.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_BUS	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_MEM_BUS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/TQM5200.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/a4m072.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/inka4x0.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/ipek01.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/jupiter.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/o2dnt-common.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/pcm030.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/r2dplus.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/r7780mp.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_PHYS	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_MEM_PHYS	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/TQM5200.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/a4m072.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/inka4x0.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/ipek01.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/jupiter.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/pcm030.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/r2dplus.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/r7780mp.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MEM_SIZE	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_MEM_SIZE	/;"	d
CONFIG_PCI_MODULE	drivers/pci/Kconfig	/^menuconfig PCI$/;"	c
CONFIG_PCI_MSC01	include/configs/malta.h	/^#define CONFIG_PCI_MSC01$/;"	d
CONFIG_PCI_MVEBU	include/configs/clearfog.h	/^#define CONFIG_PCI_MVEBU$/;"	d
CONFIG_PCI_MVEBU	include/configs/db-88f6820-amc.h	/^#define CONFIG_PCI_MVEBU$/;"	d
CONFIG_PCI_MVEBU	include/configs/db-88f6820-gp.h	/^#define CONFIG_PCI_MVEBU$/;"	d
CONFIG_PCI_MVEBU	include/configs/db-mv784mp-gp.h	/^#define CONFIG_PCI_MVEBU$/;"	d
CONFIG_PCI_MVEBU	include/configs/ds414.h	/^#define CONFIG_PCI_MVEBU$/;"	d
CONFIG_PCI_MVEBU	include/configs/theadorable.h	/^#define CONFIG_PCI_MVEBU$/;"	d
CONFIG_PCI_OHCI	include/configs/M5475EVB.h	/^#	define CONFIG_PCI_OHCI$/;"	d
CONFIG_PCI_OHCI	include/configs/MPC8610HPCD.h	/^#define CONFIG_PCI_OHCI	/;"	d
CONFIG_PCI_OHCI	include/configs/MPC8641HPCN.h	/^#define CONFIG_PCI_OHCI	/;"	d
CONFIG_PCI_OHCI	include/configs/PLU405.h	/^#define CONFIG_PCI_OHCI	/;"	d
CONFIG_PCI_OHCI	include/configs/socrates.h	/^#define CONFIG_PCI_OHCI	/;"	d
CONFIG_PCI_OHCI_DEVNO	drivers/usb/host/ohci-hcd.c	/^#define CONFIG_PCI_OHCI_DEVNO	/;"	d	file:
CONFIG_PCI_OHCI_DEVNO	include/configs/socrates.h	/^#define CONFIG_PCI_OHCI_DEVNO	/;"	d
CONFIG_PCI_PNP	drivers/pci/Kconfig	/^config PCI_PNP$/;"	c
CONFIG_PCI_PNP_MODULE	drivers/pci/Kconfig	/^config PCI_PNP$/;"	c
CONFIG_PCI_PREF_BUS	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_PREF_BUS	/;"	d
CONFIG_PCI_PREF_PHYS	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_PREF_PHYS	/;"	d
CONFIG_PCI_PREF_SIZE	include/configs/x86-chromebook.h	/^#define CONFIG_PCI_PREF_SIZE	/;"	d
CONFIG_PCI_SANDBOX	drivers/pci/Kconfig	/^config PCI_SANDBOX$/;"	c
CONFIG_PCI_SANDBOX_MODULE	drivers/pci/Kconfig	/^config PCI_SANDBOX$/;"	c
CONFIG_PCI_SCAN_SHOW	include/configs/B4860QDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/BSC9132QDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/C29XPCIE.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/CPCI2DP.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/CPCI4052.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8349ITX.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8536DS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8544DS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8548CDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8555CDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8572DS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8610HPCD.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/P1010RDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/P1022DS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/P1023RDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/P2041RDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/PLU405.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/PMC405DE.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/PMC440.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T102xQDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T102xRDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T1040QDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T104xRDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T208xQDS.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T208xRDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/T4240RDB.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/TQM834x.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/UCP1020.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/a4m072.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/aria.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/bamboo.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/bubinga.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/canyonlands.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/clearfog.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/controlcenterd.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/corenet_ds.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/cyrus.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/db-88f6820-amc.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/db-88f6820-gp.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/db-mv784mp-gp.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/digsy_mtc.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ds414.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/gdppc440etx.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ge_bx50v3.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/gw_ventana.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/icon.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/inka4x0.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/intip.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ipek01.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/jupiter.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/katmai.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/kilauea.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/km/kmp204x-common.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls1012aqds.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls1012ardb.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls1021aqds.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls1021atwr.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls1043a_common.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls2080aqds.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/ls2080ardb.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/luan.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/makalu.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/mpc5121ads.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/mx6sabresd.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/mx6sxsabresd.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/nitrogen6x.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/novena.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/p1_twr.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/pcm030.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/qemu-ppce500.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/r2dplus.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/r7780mp.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/sbc8548.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/sbc8641d.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/sbc8641d.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/sequoia.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/t3corp.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/t4qds.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/tbs2910.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/vme8349.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/walnut.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/xpedite1000.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/xpedite517x.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/xpedite520x.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/xpedite537x.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/xpedite550x.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/yosemite.h	/^#define CONFIG_PCI_SCAN_SHOW /;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/yucca.h	/^#define CONFIG_PCI_SCAN_SHOW	/;"	d
CONFIG_PCI_SCAN_SHOW	include/configs/zc5202.h	/^#define CONFIG_PCI_SCAN_SHOW$/;"	d
CONFIG_PCI_SKIP_HOST_BRIDGE	include/configs/MPC8323ERDB.h	/^#define CONFIG_PCI_SKIP_HOST_BRIDGE$/;"	d
CONFIG_PCI_SYS_BUS	include/configs/r2dplus.h	/^#define CONFIG_PCI_SYS_BUS	/;"	d
CONFIG_PCI_SYS_BUS	include/configs/r7780mp.h	/^#define CONFIG_PCI_SYS_BUS /;"	d
CONFIG_PCI_SYS_BUS	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_SYS_BUS	/;"	d
CONFIG_PCI_SYS_MEM_BUS	arch/powerpc/cpu/mpc512x/pci.c	/^#define CONFIG_PCI_SYS_MEM_BUS	/;"	d	file:
CONFIG_PCI_SYS_MEM_BUS	include/configs/icon.h	/^#define CONFIG_PCI_SYS_MEM_BUS	/;"	d
CONFIG_PCI_SYS_MEM_BUS	include/configs/katmai.h	/^#define CONFIG_PCI_SYS_MEM_BUS	/;"	d
CONFIG_PCI_SYS_MEM_BUS	include/configs/redwood.h	/^#define CONFIG_PCI_SYS_MEM_BUS	/;"	d
CONFIG_PCI_SYS_MEM_BUS	include/configs/yucca.h	/^#define CONFIG_PCI_SYS_MEM_BUS	/;"	d
CONFIG_PCI_SYS_MEM_PHYS	arch/powerpc/cpu/mpc512x/pci.c	/^#define CONFIG_PCI_SYS_MEM_PHYS	/;"	d	file:
CONFIG_PCI_SYS_MEM_PHYS	include/configs/icon.h	/^#define CONFIG_PCI_SYS_MEM_PHYS	/;"	d
CONFIG_PCI_SYS_MEM_PHYS	include/configs/katmai.h	/^#define CONFIG_PCI_SYS_MEM_PHYS	/;"	d
CONFIG_PCI_SYS_MEM_PHYS	include/configs/redwood.h	/^#define CONFIG_PCI_SYS_MEM_PHYS	/;"	d
CONFIG_PCI_SYS_MEM_PHYS	include/configs/yucca.h	/^#define CONFIG_PCI_SYS_MEM_PHYS	/;"	d
CONFIG_PCI_SYS_MEM_SIZE	include/configs/icon.h	/^#define CONFIG_PCI_SYS_MEM_SIZE	/;"	d
CONFIG_PCI_SYS_MEM_SIZE	include/configs/katmai.h	/^#define CONFIG_PCI_SYS_MEM_SIZE	/;"	d
CONFIG_PCI_SYS_MEM_SIZE	include/configs/redwood.h	/^#define CONFIG_PCI_SYS_MEM_SIZE	/;"	d
CONFIG_PCI_SYS_MEM_SIZE	include/configs/yucca.h	/^#define CONFIG_PCI_SYS_MEM_SIZE	/;"	d
CONFIG_PCI_SYS_PHYS	include/configs/r2dplus.h	/^#define CONFIG_PCI_SYS_PHYS	/;"	d
CONFIG_PCI_SYS_PHYS	include/configs/r7780mp.h	/^#define CONFIG_PCI_SYS_PHYS /;"	d
CONFIG_PCI_SYS_PHYS	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_SYS_PHYS	/;"	d
CONFIG_PCI_SYS_SIZE	include/configs/r2dplus.h	/^#define CONFIG_PCI_SYS_SIZE	/;"	d
CONFIG_PCI_SYS_SIZE	include/configs/r7780mp.h	/^#define CONFIG_PCI_SYS_SIZE /;"	d
CONFIG_PCI_SYS_SIZE	include/configs/sh7785lcr.h	/^#define CONFIG_PCI_SYS_SIZE	/;"	d
CONFIG_PCI_TEGRA	drivers/pci/Kconfig	/^config PCI_TEGRA$/;"	c
CONFIG_PCI_TEGRA_MODULE	drivers/pci/Kconfig	/^config PCI_TEGRA$/;"	c
CONFIG_PCI_XILINX	drivers/pci/Kconfig	/^config PCI_XILINX$/;"	c
CONFIG_PCI_XILINX_MODULE	drivers/pci/Kconfig	/^config PCI_XILINX$/;"	c
CONFIG_PCM052_DDR_SIZE	board/phytec/pcm052/Kconfig	/^config PCM052_DDR_SIZE$/;"	c
CONFIG_PCM052_DDR_SIZE_MODULE	board/phytec/pcm052/Kconfig	/^config PCM052_DDR_SIZE$/;"	c
CONFIG_PCMCIA	drivers/pcmcia/marubun_pcmcia.c	/^#define	CONFIG_PCMCIA$/;"	d	file:
CONFIG_PCMCIA	drivers/pcmcia/mpc8xx_pcmcia.c	/^#define	CONFIG_PCMCIA$/;"	d	file:
CONFIG_PCMCIA	drivers/pcmcia/tqm8xx_pcmcia.c	/^#define	CONFIG_PCMCIA$/;"	d	file:
CONFIG_PCMCIA_SLOT_A	include/configs/dbau1x00.h	/^#define CONFIG_PCMCIA_SLOT_A$/;"	d
CONFIG_PCMCIA_SLOT_A	include/configs/ms7720se.h	/^#define CONFIG_PCMCIA_SLOT_A	/;"	d
CONFIG_PCMCIA_SLOT_B	include/pcmcia.h	/^# define	CONFIG_PCMCIA_SLOT_B	/;"	d
CONFIG_PCNET	include/configs/malta.h	/^#define CONFIG_PCNET$/;"	d
CONFIG_PCNET_79C973	include/configs/malta.h	/^#define CONFIG_PCNET_79C973$/;"	d
CONFIG_PDM360NG	include/configs/pdm360ng.h	/^#define CONFIG_PDM360NG /;"	d
CONFIG_PDSP188x	include/configs/manroland/common.h	/^#define CONFIG_PDSP188x$/;"	d
CONFIG_PEN_ADDR_BIG_ENDIAN	include/configs/ls1021aqds.h	/^#define CONFIG_PEN_ADDR_BIG_ENDIAN$/;"	d
CONFIG_PEN_ADDR_BIG_ENDIAN	include/configs/ls1021atwr.h	/^#define CONFIG_PEN_ADDR_BIG_ENDIAN$/;"	d
CONFIG_PERIF1_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_PERIF1_FREQ	/;"	d
CONFIG_PERIF2_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_PERIF2_FREQ	/;"	d
CONFIG_PERIF3_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_PERIF3_FREQ	/;"	d
CONFIG_PERIF4_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_PERIF4_FREQ	/;"	d
CONFIG_PHY1_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/PMC440.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/bamboo.h	/^#define CONFIG_PHY1_ADDR /;"	d
CONFIG_PHY1_ADDR	include/configs/bubinga.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/canyonlands.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/dlvision-10g.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/dlvision.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/gdppc440etx.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/intip.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/io.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/io64.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/kilauea.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/lwmon5.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/makalu.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/neo.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/redwood.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/sequoia.h	/^#define CONFIG_PHY1_ADDR	/;"	d
CONFIG_PHY1_ADDR	include/configs/yosemite.h	/^#define CONFIG_PHY1_ADDR /;"	d
CONFIG_PHY2_ADDR	include/configs/canyonlands.h	/^#define CONFIG_PHY2_ADDR	/;"	d
CONFIG_PHY2_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_PHY2_ADDR	/;"	d
CONFIG_PHY3_ADDR	include/configs/canyonlands.h	/^#define CONFIG_PHY3_ADDR	/;"	d
CONFIG_PHY3_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_PHY3_ADDR	/;"	d
CONFIG_PHYCORE_MPC5200B_TINY	include/configs/pcm030.h	/^#define CONFIG_PHYCORE_MPC5200B_TINY /;"	d
CONFIG_PHYLIB	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	arch/powerpc/include/asm/config.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	drivers/net/Kconfig	/^config PHYLIB$/;"	c
CONFIG_PHYLIB	include/config/auto.conf	/^CONFIG_PHYLIB=y$/;"	k
CONFIG_PHYLIB	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/alt.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/am335x_evm.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/am335x_igep0033.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/am335x_shc.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/am335x_sl50.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/am43xx_evm.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/am57xx_evm.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ap_sh4a_4a.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/aristainetos-common.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/armadillo-800eva.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/baltos.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/bav335x.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/bur_am335x_common.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/cgtqmx6eval.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/cm_fx6.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/cm_t335.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/cm_t43.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/colibri_imx7.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/colibri_vf.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/corvus.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/devkit3250.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/dra7xx_evm.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ecovec.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/embestmx6boards.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/espt.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/flea3.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ge_bx50v3.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/gose.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/gw_ventana.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/imx6qdl_icore.h	/^# define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/km/kmp204x-common.h	/^#define CONFIG_PHYLIB	/;"	d
CONFIG_PHYLIB	include/configs/koelsch.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/lager.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls1021aqds.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls1021atwr.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls1043aqds.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls1043ardb.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls1046aqds.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls1046ardb.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls2080aqds.h	/^#define	CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ls2080ardb.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/m53evk.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx6cuboxi.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx6sabre_common.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx6slevk.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx6sxsabreauto.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx6sxsabresd.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/mx7dsabresd.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/nitrogen6x.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/novena.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ot1200.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/pcm051.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/pcm052.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/pcm058.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/pengwyn.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/pepper.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/pico-imx6ul.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/platinum.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/porter.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/r0p7734.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sama5d3_xplained.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sama5d3xek.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sc_sps_1.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/secomx6quq7.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sh7752evb.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sh7753evb.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sh7757lcr.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sh7763rdp.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/siemens-am33x-common.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/silk.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/smartweb.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/snapper9g45.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/stout.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/sunxi-common.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/taurus.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/tbs2910.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ti814x_evm.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/titanium.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/tqma6.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/ts4800.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/udoo.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/vf610twr.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/wandboard.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/woodburn_common.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/work_92105.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/xpress.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/configs/zc5601.h	/^#define CONFIG_PHYLIB$/;"	d
CONFIG_PHYLIB	include/generated/autoconf.h	/^#define CONFIG_PHYLIB /;"	d
CONFIG_PHYLIB_10G	include/configs/B4860QDS.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/P2041RDB.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T102xQDS.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T102xRDB.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T1040QDS.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T208xQDS.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T208xRDB.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T4240QDS.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/T4240RDB.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/corenet_ds.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/km/kmp204x-common.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/ls1043aqds.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/ls1043ardb.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/ls1046aqds.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/ls1046ardb.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/ls2080aqds.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_10G	include/configs/ls2080ardb.h	/^#define CONFIG_PHYLIB_10G$/;"	d
CONFIG_PHYLIB_MODULE	drivers/net/Kconfig	/^config PHYLIB$/;"	c
CONFIG_PHYSMEM	include/configs/sandbox.h	/^#define CONFIG_PHYSMEM$/;"	d
CONFIG_PHYSMEM	include/configs/x86-common.h	/^#define CONFIG_PHYSMEM$/;"	d
CONFIG_PHYS_64BIT	Kconfig	/^config PHYS_64BIT$/;"	c	menu:General setup
CONFIG_PHYS_64BIT_MODULE	Kconfig	/^config PHYS_64BIT$/;"	c	menu:General setup
CONFIG_PHYS_TO_BUS	drivers/Kconfig	/^config PHYS_TO_BUS$/;"	c	menu:Device Drivers
CONFIG_PHYS_TO_BUS_MODULE	drivers/Kconfig	/^config PHYS_TO_BUS$/;"	c	menu:Device Drivers
CONFIG_PHY_ADDR	drivers/net/bfin_mac.c	/^# define CONFIG_PHY_ADDR /;"	d	file:
CONFIG_PHY_ADDR	include/configs/CPCI2DP.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/MIP405.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/PIP405.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/PLU405.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/PMC440.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/TQM5200.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/VOM405.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/a3m071.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/a4m072.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/ac14xx.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/acadia.h	/^#define	CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/am335x_shc.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/aria.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/baltos.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/bamboo.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/bf518f-ezbrd.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/bf609-ezkit.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/bubinga.h	/^#define	CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/canmb.h	/^#define	CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/canyonlands.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/cm5200.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/devkit3250.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/dlvision-10g.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/dlvision.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/dnp5370.h	/^#define CONFIG_PHY_ADDR /;"	d
CONFIG_PHY_ADDR	include/configs/ds414.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/edb93xx.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/gdppc440etx.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/gr_ep2s60.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/gr_xc3s_1500.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/grsim.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/grsim_leon2.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/icon.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/inka4x0.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/intip.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/io.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/io64.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/iocon.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/ipek01.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/jupiter.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/katmai.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/kilauea.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/luan.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/lwmon5.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/makalu.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/mecp5123.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/motionpro.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/munices.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/neo.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/o2dnt-common.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/pcm030.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/pdm360ng.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/pepper.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/redwood.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/sequoia.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/t3corp.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/v38b.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/walnut.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/work_92105.h	/^#define CONFIG_PHY_ADDR /;"	d
CONFIG_PHY_ADDR	include/configs/x600.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/yosemite.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_ADDR	include/configs/yucca.h	/^#define CONFIG_PHY_ADDR	/;"	d
CONFIG_PHY_AQUANTIA	include/configs/T102xRDB.h	/^#define CONFIG_PHY_AQUANTIA$/;"	d
CONFIG_PHY_AQUANTIA	include/configs/T208xRDB.h	/^#define CONFIG_PHY_AQUANTIA$/;"	d
CONFIG_PHY_AQUANTIA	include/configs/ls1043ardb.h	/^#define CONFIG_PHY_AQUANTIA$/;"	d
CONFIG_PHY_AQUANTIA	include/configs/ls1046ardb.h	/^#define CONFIG_PHY_AQUANTIA$/;"	d
CONFIG_PHY_AQUANTIA	include/configs/ls2080ardb.h	/^#define CONFIG_PHY_AQUANTIA$/;"	d
CONFIG_PHY_ATHEROS	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/P1023RDB.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/am335x_evm.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/baltos.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/cgtqmx6eval.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/cm_fx6.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/cm_t335.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/cm_t43.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/embestmx6boards.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/ge_bx50v3.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/ls1021atwr.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_ATHEROS	/;"	d
CONFIG_PHY_ATHEROS	include/configs/mx6cuboxi.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/mx6sabre_common.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/mx6sxsabresd.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/p1_twr.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/pxm2.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/tbs2910.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_ATHEROS	include/configs/wandboard.h	/^#define CONFIG_PHY_ATHEROS$/;"	d
CONFIG_PHY_BASE_ADR	include/configs/dockstar.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/dreamplug.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/ds109.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/edminiv2.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/goflexhome.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/guruplug.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/ib62x0.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/iconnect.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/km/km_arm.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/lsxl.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/nas220.h	/^#define CONFIG_PHY_BASE_ADR /;"	d
CONFIG_PHY_BASE_ADR	include/configs/nsa310s.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/openrd.h	/^#  define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/pogo_e02.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BASE_ADR	include/configs/sheevaplug.h	/^#define CONFIG_PHY_BASE_ADR	/;"	d
CONFIG_PHY_BCM5421S	include/configs/sbc8349.h	/^#define CONFIG_PHY_BCM5421S	/;"	d
CONFIG_PHY_BROADCOM	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_PHY_BROADCOM$/;"	d
CONFIG_PHY_BROADCOM	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_BROADCOM$/;"	d
CONFIG_PHY_BROADCOM	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_BROADCOM	/;"	d
CONFIG_PHY_BROADCOM	include/configs/mx7dsabresd.h	/^#define CONFIG_PHY_BROADCOM$/;"	d
CONFIG_PHY_CLK_FREQ	arch/powerpc/cpu/ppc4xx/miiphy.c	/^#define CONFIG_PHY_CLK_FREQ	/;"	d	file:
CONFIG_PHY_CLK_FREQ	include/configs/PLU405.h	/^#define CONFIG_PHY_CLK_FREQ	/;"	d
CONFIG_PHY_CLK_FREQ	include/configs/dlvision-10g.h	/^#define CONFIG_PHY_CLK_FREQ	/;"	d
CONFIG_PHY_CLK_FREQ	include/configs/dlvision.h	/^#define CONFIG_PHY_CLK_FREQ /;"	d
CONFIG_PHY_CLK_FREQ	include/configs/io.h	/^#define CONFIG_PHY_CLK_FREQ	/;"	d
CONFIG_PHY_CLK_FREQ	include/configs/iocon.h	/^#define CONFIG_PHY_CLK_FREQ /;"	d
CONFIG_PHY_CLK_FREQ	include/configs/neo.h	/^#define CONFIG_PHY_CLK_FREQ /;"	d
CONFIG_PHY_CLOCK_FREQ	drivers/net/bfin_mac.c	/^# define CONFIG_PHY_CLOCK_FREQ /;"	d	file:
CONFIG_PHY_CMD_DELAY	include/configs/MIP405.h	/^#define CONFIG_PHY_CMD_DELAY	/;"	d
CONFIG_PHY_CORTINA	include/configs/T208xRDB.h	/^#define CONFIG_PHY_CORTINA$/;"	d
CONFIG_PHY_CORTINA	include/configs/T4240RDB.h	/^#define CONFIG_PHY_CORTINA$/;"	d
CONFIG_PHY_CORTINA	include/configs/ls2080ardb.h	/^#define CONFIG_PHY_CORTINA$/;"	d
CONFIG_PHY_DAVICOM	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_DAVICOM$/;"	d
CONFIG_PHY_DAVICOM	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_DAVICOM	/;"	d
CONFIG_PHY_DYNAMIC_ANEG	include/configs/canyonlands.h	/^#define CONFIG_PHY_DYNAMIC_ANEG$/;"	d
CONFIG_PHY_DYNAMIC_ANEG	include/configs/intip.h	/^#define CONFIG_PHY_DYNAMIC_ANEG	/;"	d
CONFIG_PHY_DYNAMIC_ANEG	include/configs/t3corp.h	/^#define CONFIG_PHY_DYNAMIC_ANEG	/;"	d
CONFIG_PHY_ET1011C	include/configs/ti814x_evm.h	/^#define CONFIG_PHY_ET1011C$/;"	d
CONFIG_PHY_ET1011C_TX_CLK_FIX	include/configs/ti814x_evm.h	/^#define CONFIG_PHY_ET1011C_TX_CLK_FIX$/;"	d
CONFIG_PHY_GIGE	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/10m50_devboard.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/3c120_devboard.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/B4860QDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/BSC9131RDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/BSC9132QDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/C29XPCIE.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/MPC8349ITX.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/MPC8536DS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/MPC8544DS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/MPC8548CDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/MPC8572DS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/P1010RDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/P1022DS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/P1023RDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/P2041RDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/PMC440.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T102xQDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T102xRDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T1040QDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T104xRDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T208xQDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T208xRDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T4240QDS.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/T4240RDB.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/UCP1020.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/am335x_evm.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/am335x_shc.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/am335x_sl50.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/am43xx_evm.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/am57xx_evm.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/axs10x.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/baltos.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/bav335x.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/canyonlands.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/cm_t335.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/cm_t43.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/controlcenterd.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/corenet_ds.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/cyrus.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/dra7xx_evm.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/icon.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/intip.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/io64.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/katmai.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/kilauea.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/km/kmp204x-common.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/ls1021aqds.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/ls1021atwr.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/ls1043ardb.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/ls1046ardb.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/ls2080aqds.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/ls2080ardb.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/luan.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/makalu.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/nsa310s.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/p1_twr.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/pcm051.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/pepper.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/redwood.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/sbc8548.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/sequoia.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/siemens-am33x-common.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/socfpga_common.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/socrates.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/spear-common.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/sunxi-common.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/t3corp.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/t4qds.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/tb100.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/ti814x_evm.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/tplink_wdr4300.h	/^#define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/x600.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_PHY_GIGE$/;"	d
CONFIG_PHY_GIGE	include/configs/xpedite1000.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/xpedite517x.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/xpedite520x.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/xpedite537x.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/xpedite550x.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_GIGE	include/configs/yucca.h	/^#define CONFIG_PHY_GIGE	/;"	d
CONFIG_PHY_ID	include/configs/ethernut5.h	/^#define CONFIG_PHY_ID	/;"	d
CONFIG_PHY_INTERFACE_MODE	include/configs/socfpga_sr1500.h	/^#define CONFIG_PHY_INTERFACE_MODE	/;"	d
CONFIG_PHY_IRAM_BASE	include/configs/exynos5420-common.h	/^#define CONFIG_PHY_IRAM_BASE	/;"	d
CONFIG_PHY_KSZ9031	include/configs/pcm058.h	/^#define CONFIG_PHY_KSZ9031$/;"	d
CONFIG_PHY_KSZ9031	include/configs/tqma6_mba6.h	/^#define CONFIG_PHY_KSZ9031$/;"	d
CONFIG_PHY_LXT	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_LXT$/;"	d
CONFIG_PHY_LXT	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_LXT	/;"	d
CONFIG_PHY_M88E1111	include/configs/vme8349.h	/^#define CONFIG_PHY_M88E1111$/;"	d
CONFIG_PHY_MARVELL	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/10m50_devboard.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/3c120_devboard.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/MPC8548CDS.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/clearfog.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/db-88f6720.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/db-88f6820-amc.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/db-88f6820-gp.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/db-mv784mp-gp.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/ds414.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/km/kmp204x-common.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/maxbcm.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/socfpga_sr1500.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/theadorable.h	/^#define CONFIG_PHY_MARVELL	/;"	d
CONFIG_PHY_MARVELL	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/xilinx_zynqmp.h	/^# define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MARVELL	include/configs/zynq-common.h	/^# define CONFIG_PHY_MARVELL$/;"	d
CONFIG_PHY_MICREL	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/alt.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/ap_sh4a_4a.h	/^#define CONFIG_PHY_MICREL /;"	d
CONFIG_PHY_MICREL	include/configs/aristainetos-common.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/colibri_imx7.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/colibri_vf.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/cyrus.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/flea3.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/gose.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/k2g_evm.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/koelsch.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/lager.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/m53evk.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_MICREL	/;"	d
CONFIG_PHY_MICREL	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/nitrogen6x.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/novena.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/pcm052.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/pcm058.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/pepper.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/pico-imx6ul.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/platinum_titanium.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/porter.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/sama5d3xek.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/secomx6quq7.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/silk.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_is1.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_sockit.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_socrates.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/stout.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/stv0991.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/titanium.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/tqma6_mba6.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/udoo.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/vf610twr.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/woodburn_common.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL	include/configs/x600.h	/^#define CONFIG_PHY_MICREL$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/UCP1020.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/cyrus.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/nitrogen6x.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/novena.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/pepper.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/platinum_titanium.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/sama5d3xek.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/socfpga_is1.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/socfpga_sockit.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/socfpga_socrates.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9021	include/configs/titanium.h	/^#define CONFIG_PHY_MICREL_KSZ9021$/;"	d
CONFIG_PHY_MICREL_KSZ9031	include/configs/UCP1020.h	/^#define CONFIG_PHY_MICREL_KSZ9031$/;"	d
CONFIG_PHY_MICREL_KSZ9031	include/configs/aristainetos2.h	/^#define CONFIG_PHY_MICREL_KSZ9031$/;"	d
CONFIG_PHY_MICREL_KSZ9031	include/configs/aristainetos2b.h	/^#define CONFIG_PHY_MICREL_KSZ9031$/;"	d
CONFIG_PHY_MICREL_KSZ9031	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_PHY_MICREL_KSZ9031$/;"	d
CONFIG_PHY_MICREL_KSZ9031	include/configs/udoo.h	/^#define CONFIG_PHY_MICREL_KSZ9031$/;"	d
CONFIG_PHY_MICREL_KSZ9031	include/configs/x600.h	/^#define CONFIG_PHY_MICREL_KSZ9031$/;"	d
CONFIG_PHY_MODE_NEED_CHANGE	include/configs/MPC8568MDS.h	/^#define CONFIG_PHY_MODE_NEED_CHANGE$/;"	d
CONFIG_PHY_MODE_NEED_CHANGE	include/configs/MPC8569MDS.h	/^#define CONFIG_PHY_MODE_NEED_CHANGE$/;"	d
CONFIG_PHY_MODE_NEED_CHANGE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PHY_MODE_NEED_CHANGE$/;"	d
CONFIG_PHY_MODE_NEED_CHANGE	include/configs/p1_twr.h	/^#define CONFIG_PHY_MODE_NEED_CHANGE$/;"	d
CONFIG_PHY_NATSEMI	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_NATSEMI$/;"	d
CONFIG_PHY_NATSEMI	include/configs/bur_am335x_common.h	/^#define CONFIG_PHY_NATSEMI$/;"	d
CONFIG_PHY_NATSEMI	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_NATSEMI	/;"	d
CONFIG_PHY_NATSEMI	include/configs/pengwyn.h	/^#define CONFIG_PHY_NATSEMI$/;"	d
CONFIG_PHY_NATSEMI	include/configs/rut.h	/^#define CONFIG_PHY_NATSEMI$/;"	d
CONFIG_PHY_NATSEMI	include/configs/spear6xx_evb.h	/^#define CONFIG_PHY_NATSEMI$/;"	d
CONFIG_PHY_NATSEMI	include/configs/xilinx_zynqmp.h	/^# define CONFIG_PHY_NATSEMI$/;"	d
CONFIG_PHY_REALTEK	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/T102xQDS.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/T102xRDB.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/T1040QDS.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/T104xRDB.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/T208xQDS.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/T208xRDB.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/ls1021aqds.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/ls1043aqds.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/ls1043ardb.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/ls1046aqds.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/ls1046ardb.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/ls2080aqds.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_REALTEK	/;"	d
CONFIG_PHY_REALTEK	include/configs/pengwyn.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/sunxi-common.h	/^#define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/xilinx_zynqmp.h	/^# define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_REALTEK	include/configs/zynq-common.h	/^# define CONFIG_PHY_REALTEK$/;"	d
CONFIG_PHY_RESET	include/configs/canyonlands.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/icon.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/intip.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/io64.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/katmai.h	/^#define CONFIG_PHY_RESET /;"	d
CONFIG_PHY_RESET	include/configs/kilauea.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/lwmon5.h	/^#define CONFIG_PHY_RESET /;"	d
CONFIG_PHY_RESET	include/configs/makalu.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/pengwyn.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/redwood.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/sequoia.h	/^#define CONFIG_PHY_RESET /;"	d
CONFIG_PHY_RESET	include/configs/t3corp.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/xpedite1000.h	/^#define CONFIG_PHY_RESET	/;"	d
CONFIG_PHY_RESET	include/configs/yucca.h	/^#define CONFIG_PHY_RESET /;"	d
CONFIG_PHY_RESET_DELAY	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_PHY_RESET_DELAY /;"	d
CONFIG_PHY_RESET_DELAY	include/configs/MIP405.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/digsy_mtc.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/icon.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/katmai.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/lwmon5.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/pepper.h	/^#define CONFIG_PHY_RESET_DELAY /;"	d
CONFIG_PHY_RESET_DELAY	include/configs/platinum_titanium.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/redwood.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/spear-common.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/stv0991.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/x600.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_RESET_DELAY	include/configs/yucca.h	/^#define CONFIG_PHY_RESET_DELAY	/;"	d
CONFIG_PHY_SMSC	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/am335x_evm.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/am335x_igep0033.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/am335x_shc.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/am335x_sl50.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/armadillo-800eva.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/baltos.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/bav335x.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/devkit3250.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/draco.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/ecovec.h	/^#define CONFIG_PHY_SMSC /;"	d
CONFIG_PHY_SMSC	include/configs/etamin.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/imx6qdl_icore.h	/^# define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/mx6slevk.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/ot1200.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/pcm051.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/pic32mzdask.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/r0p7734.h	/^#define CONFIG_PHY_SMSC /;"	d
CONFIG_PHY_SMSC	include/configs/rastaban.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/sc_sps_1.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/thuban.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/tqma6_wru4.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/ts4800.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/vinco.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/work_92105.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_SMSC	include/configs/xpress.h	/^#define CONFIG_PHY_SMSC$/;"	d
CONFIG_PHY_TERANETICS	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/B4860QDS.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/P2041RDB.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/T102xQDS.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/T1040QDS.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/T208xQDS.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/T4240QDS.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/T4240RDB.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/corenet_ds.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TERANETICS	include/configs/ls2080aqds.h	/^#define CONFIG_PHY_TERANETICS$/;"	d
CONFIG_PHY_TI	include/configs/dra7xx_evm.h	/^#define CONFIG_PHY_TI$/;"	d
CONFIG_PHY_TI	include/configs/xilinx_zynqmp.h	/^# define CONFIG_PHY_TI$/;"	d
CONFIG_PHY_TYPE	include/configs/a4m072.h	/^#define CONFIG_PHY_TYPE	/;"	d
CONFIG_PHY_TYPE	include/configs/motionpro.h	/^#define CONFIG_PHY_TYPE	/;"	d
CONFIG_PHY_VITESSE	include/config_phylib_all_drivers.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/B4860QDS.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/P2041RDB.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/T102xQDS.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/T1040QDS.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/T104xRDB.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/T208xQDS.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/T4240QDS.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/T4240RDB.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/corenet_ds.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/ls1043aqds.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/ls1043ardb.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/ls1046aqds.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/ls2080aqds.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/microblaze-generic.h	/^# define CONFIG_PHY_VITESSE	/;"	d
CONFIG_PHY_VITESSE	include/configs/sh7752evb.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/sh7753evb.h	/^#define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_VITESSE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_PHY_VITESSE$/;"	d
CONFIG_PHY_XILINX	include/configs/zynq-common.h	/^# define CONFIG_PHY_XILINX$/;"	d
CONFIG_PIC32_ETH	drivers/net/Kconfig	/^config PIC32_ETH$/;"	c
CONFIG_PIC32_ETH_MODULE	drivers/net/Kconfig	/^config PIC32_ETH$/;"	c
CONFIG_PIC32_GPIO	drivers/gpio/Kconfig	/^config PIC32_GPIO$/;"	c	menu:GPIO Support
CONFIG_PIC32_GPIO_MODULE	drivers/gpio/Kconfig	/^config PIC32_GPIO$/;"	c	menu:GPIO Support
CONFIG_PIC32_PINCTRL	drivers/pinctrl/Kconfig	/^config PIC32_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_PIC32_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config PIC32_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_PIC32_SDHCI	drivers/mmc/Kconfig	/^config PIC32_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_PIC32_SDHCI_MODULE	drivers/mmc/Kconfig	/^config PIC32_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_PIC32_SERIAL	drivers/serial/Kconfig	/^config PIC32_SERIAL$/;"	c	menu:Serial drivers
CONFIG_PIC32_SERIAL_MODULE	drivers/serial/Kconfig	/^config PIC32_SERIAL$/;"	c	menu:Serial drivers
CONFIG_PIC32_SPI	drivers/spi/Kconfig	/^config PIC32_SPI$/;"	c	menu:SPI Support
CONFIG_PIC32_SPI_MODULE	drivers/spi/Kconfig	/^config PIC32_SPI$/;"	c	menu:SPI Support
CONFIG_PICOSAM	include/configs/picosam9g45.h	/^#define CONFIG_PICOSAM$/;"	d
CONFIG_PIGGY_MAC_ADRESS_OFFSET	board/keymile/common/common.h	/^#define CONFIG_PIGGY_MAC_ADRESS_OFFSET	/;"	d
CONFIG_PIGGY_MAC_ADRESS_OFFSET	include/configs/km_kirkwood.h	/^#define CONFIG_PIGGY_MAC_ADRESS_OFFSET	/;"	d
CONFIG_PIGGY_MAC_ADRESS_OFFSET	include/configs/km_kirkwood.h	/^#define CONFIG_PIGGY_MAC_ADRESS_OFFSET /;"	d
CONFIG_PINCONF	drivers/pinctrl/Kconfig	/^config PINCONF$/;"	c	menu:Pin controllers
CONFIG_PINCONF_MODULE	drivers/pinctrl/Kconfig	/^config PINCONF$/;"	c	menu:Pin controllers
CONFIG_PINCTRL	drivers/pinctrl/Kconfig	/^config PINCTRL$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_AT91PIO4	drivers/pinctrl/Kconfig	/^config PINCTRL_AT91PIO4$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_AT91PIO4_MODULE	drivers/pinctrl/Kconfig	/^config PINCTRL_AT91PIO4$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_EXYNOS	drivers/pinctrl/exynos/Kconfig	/^config PINCTRL_EXYNOS$/;"	c
CONFIG_PINCTRL_EXYNOS7420	drivers/pinctrl/exynos/Kconfig	/^config PINCTRL_EXYNOS7420$/;"	c
CONFIG_PINCTRL_EXYNOS7420_MODULE	drivers/pinctrl/exynos/Kconfig	/^config PINCTRL_EXYNOS7420$/;"	c
CONFIG_PINCTRL_EXYNOS_MODULE	drivers/pinctrl/exynos/Kconfig	/^config PINCTRL_EXYNOS$/;"	c
CONFIG_PINCTRL_FULL	drivers/pinctrl/Kconfig	/^config PINCTRL_FULL$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_FULL_MODULE	drivers/pinctrl/Kconfig	/^config PINCTRL_FULL$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_GENERIC	drivers/pinctrl/Kconfig	/^config PINCTRL_GENERIC$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_GENERIC_MODULE	drivers/pinctrl/Kconfig	/^config PINCTRL_GENERIC$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_IMX	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX$/;"	c
CONFIG_PINCTRL_IMX6	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX6$/;"	c
CONFIG_PINCTRL_IMX6_MODULE	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX6$/;"	c
CONFIG_PINCTRL_IMX7	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX7$/;"	c
CONFIG_PINCTRL_IMX7_MODULE	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX7$/;"	c
CONFIG_PINCTRL_IMX_MODULE	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX$/;"	c
CONFIG_PINCTRL_MESON	drivers/pinctrl/meson/Kconfig	/^config PINCTRL_MESON$/;"	c
CONFIG_PINCTRL_MESON_GXBB	drivers/pinctrl/meson/Kconfig	/^config PINCTRL_MESON_GXBB$/;"	c
CONFIG_PINCTRL_MESON_GXBB_MODULE	drivers/pinctrl/meson/Kconfig	/^config PINCTRL_MESON_GXBB$/;"	c
CONFIG_PINCTRL_MESON_MODULE	drivers/pinctrl/meson/Kconfig	/^config PINCTRL_MESON$/;"	c
CONFIG_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config PINCTRL$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_SANDBOX	drivers/pinctrl/Kconfig	/^config PINCTRL_SANDBOX$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_SANDBOX_MODULE	drivers/pinctrl/Kconfig	/^config PINCTRL_SANDBOX$/;"	c	menu:Pin controllers
CONFIG_PINCTRL_UNIPHIER	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD11	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD11$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD11_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD11$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD20	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD20$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD20_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD20$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD4	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD4$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD4_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD4$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD6B	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD6B$/;"	c
CONFIG_PINCTRL_UNIPHIER_LD6B_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD6B$/;"	c
CONFIG_PINCTRL_UNIPHIER_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER$/;"	c
CONFIG_PINCTRL_UNIPHIER_PRO4	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PRO4$/;"	c
CONFIG_PINCTRL_UNIPHIER_PRO4_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PRO4$/;"	c
CONFIG_PINCTRL_UNIPHIER_PRO5	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PRO5$/;"	c
CONFIG_PINCTRL_UNIPHIER_PRO5_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PRO5$/;"	c
CONFIG_PINCTRL_UNIPHIER_PXS2	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PXS2$/;"	c
CONFIG_PINCTRL_UNIPHIER_PXS2_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PXS2$/;"	c
CONFIG_PINCTRL_UNIPHIER_SLD3	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_SLD3$/;"	c
CONFIG_PINCTRL_UNIPHIER_SLD3_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_SLD3$/;"	c
CONFIG_PINCTRL_UNIPHIER_SLD8	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_SLD8$/;"	c
CONFIG_PINCTRL_UNIPHIER_SLD8_MODULE	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_SLD8$/;"	c
CONFIG_PINMUX	drivers/pinctrl/Kconfig	/^config PINMUX$/;"	c	menu:Pin controllers
CONFIG_PINMUX_MODULE	drivers/pinctrl/Kconfig	/^config PINMUX$/;"	c	menu:Pin controllers
CONFIG_PIP405	include/configs/PIP405.h	/^#define CONFIG_PIP405	/;"	d
CONFIG_PIXIS_BRDCFG0_SPI	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG0_SPI	/;"	d	file:
CONFIG_PIXIS_BRDCFG0_USB2	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG0_USB2	/;"	d	file:
CONFIG_PIXIS_BRDCFG1_AUDCLK_11	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG1_AUDCLK_11	/;"	d	file:
CONFIG_PIXIS_BRDCFG1_AUDCLK_12	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG1_AUDCLK_12	/;"	d	file:
CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK	/;"	d	file:
CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK	/;"	d	file:
CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI	/;"	d	file:
CONFIG_PIXIS_BRDCFG1_TDM	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_PIXIS_BRDCFG1_TDM	/;"	d	file:
CONFIG_PIXIS_SGMII_CMD	include/configs/MPC8544DS.h	/^#define CONFIG_PIXIS_SGMII_CMD$/;"	d
CONFIG_PIXIS_SGMII_CMD	include/configs/MPC8572DS.h	/^#define CONFIG_PIXIS_SGMII_CMD$/;"	d
CONFIG_PL010_SERIAL	include/configs/edb93xx.h	/^#define CONFIG_PL010_SERIAL$/;"	d
CONFIG_PL011_CLOCK	include/configs/highbank.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/mxs.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/spear-common.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/spear3xx_evb.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/thunderx_88xx.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/vexpress_aemv8a.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/vexpress_common.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_CLOCK	include/configs/x600.h	/^#define CONFIG_PL011_CLOCK	/;"	d
CONFIG_PL011_SERIAL	include/configs/highbank.h	/^#define CONFIG_PL011_SERIAL$/;"	d
CONFIG_PL011_SERIAL	include/configs/mxs.h	/^#define CONFIG_PL011_SERIAL$/;"	d
CONFIG_PL011_SERIAL	include/configs/spear-common.h	/^#define CONFIG_PL011_SERIAL$/;"	d
CONFIG_PL011_SERIAL	include/configs/vexpress_aemv8a.h	/^#define CONFIG_PL011_SERIAL$/;"	d
CONFIG_PL011_SERIAL	include/configs/vexpress_common.h	/^#define CONFIG_PL011_SERIAL$/;"	d
CONFIG_PL011_SERIAL	include/configs/x600.h	/^#define CONFIG_PL011_SERIAL$/;"	d
CONFIG_PL01X_SERIAL	include/configs/hikey.h	/^#define CONFIG_PL01X_SERIAL$/;"	d
CONFIG_PL01X_SERIAL	include/configs/integrator-common.h	/^#define CONFIG_PL01X_SERIAL$/;"	d
CONFIG_PL01X_SERIAL	include/configs/rpi.h	/^#define CONFIG_PL01X_SERIAL$/;"	d
CONFIG_PL01X_SERIAL	include/configs/stv0991.h	/^#define CONFIG_PL01X_SERIAL$/;"	d
CONFIG_PL01X_SERIAL	include/configs/thunderx_88xx.h	/^#define CONFIG_PL01X_SERIAL$/;"	d
CONFIG_PL01X_SERIAL	include/configs/vexpress_aemv8a.h	/^#define CONFIG_PL01X_SERIAL$/;"	d
CONFIG_PL01x_PORTS	include/configs/edb93xx.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PL01x_PORTS	include/configs/highbank.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PL01x_PORTS	include/configs/mxs.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PL01x_PORTS	include/configs/spear3xx_evb.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PL01x_PORTS	include/configs/spear6xx_evb.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PL01x_PORTS	include/configs/vexpress_common.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PL01x_PORTS	include/configs/x600.h	/^#define CONFIG_PL01x_PORTS	/;"	d
CONFIG_PLATFORM_ENV_SETTINGS	include/configs/platinum_picon.h	/^#define CONFIG_PLATFORM_ENV_SETTINGS	/;"	d
CONFIG_PLATFORM_ENV_SETTINGS	include/configs/platinum_titanium.h	/^#define CONFIG_PLATFORM_ENV_SETTINGS	/;"	d
CONFIG_PLATFORM_ENV_SETTINGS	include/configs/vexpress_common.h	/^#define CONFIG_PLATFORM_ENV_SETTINGS /;"	d
CONFIG_PLATINUM_BOARD	include/configs/platinum_picon.h	/^#define CONFIG_PLATINUM_BOARD	/;"	d
CONFIG_PLATINUM_BOARD	include/configs/platinum_titanium.h	/^#define CONFIG_PLATINUM_BOARD	/;"	d
CONFIG_PLATINUM_CPU	include/configs/platinum_picon.h	/^#define CONFIG_PLATINUM_CPU	/;"	d
CONFIG_PLATINUM_CPU	include/configs/platinum_titanium.h	/^#define CONFIG_PLATINUM_CPU	/;"	d
CONFIG_PLATINUM_PICON	include/configs/platinum_picon.h	/^#define CONFIG_PLATINUM_PICON$/;"	d
CONFIG_PLATINUM_PROJECT	include/configs/platinum_picon.h	/^#define CONFIG_PLATINUM_PROJECT	/;"	d
CONFIG_PLATINUM_PROJECT	include/configs/platinum_titanium.h	/^#define CONFIG_PLATINUM_PROJECT	/;"	d
CONFIG_PLATINUM_TITANIUM	include/configs/platinum_titanium.h	/^#define CONFIG_PLATINUM_TITANIUM$/;"	d
CONFIG_PLL	include/configs/atngw100.h	/^#define CONFIG_PLL$/;"	d
CONFIG_PLL	include/configs/atngw100mkii.h	/^#define CONFIG_PLL$/;"	d
CONFIG_PLL	include/configs/atstk1002.h	/^#define CONFIG_PLL$/;"	d
CONFIG_PLL	include/configs/grasshopper.h	/^#define CONFIG_PLL$/;"	d
CONFIG_PLL1_CLK_FREQ	include/configs/alt.h	/^#define CONFIG_PLL1_CLK_FREQ /;"	d
CONFIG_PLL1_CLK_FREQ	include/configs/lager.h	/^#define CONFIG_PLL1_CLK_FREQ	/;"	d
CONFIG_PLL1_CLK_FREQ	include/configs/porter.h	/^#define CONFIG_PLL1_CLK_FREQ	/;"	d
CONFIG_PLL1_CLK_FREQ	include/configs/salvator-x.h	/^#define CONFIG_PLL1_CLK_FREQ	/;"	d
CONFIG_PLL1_CLK_FREQ	include/configs/silk.h	/^#define CONFIG_PLL1_CLK_FREQ	/;"	d
CONFIG_PLL1_CLK_FREQ	include/configs/stout.h	/^#define CONFIG_PLL1_CLK_FREQ	/;"	d
CONFIG_PLL1_DIV2_CLK_FREQ	include/configs/lager.h	/^#define CONFIG_PLL1_DIV2_CLK_FREQ	/;"	d
CONFIG_PLL1_DIV2_CLK_FREQ	include/configs/stout.h	/^#define CONFIG_PLL1_DIV2_CLK_FREQ	/;"	d
CONFIG_PLL_BYPASS	include/configs/bct-brettl2.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf506f-ezkit.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf518f-ezbrd.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf525-ucr2.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf526-ezbrd.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf527-ezkit.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf527-sdp.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf533-ezkit.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf533-stamp.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf537-minotaur.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf537-pnav.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf537-srv1.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf537-stamp.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf538f-ezkit.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf548-ezkit.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf561-acvilon.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/bf561-ezkit.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/blackstamp.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/blackvme.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/br4.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/cm-bf527.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/cm-bf533.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/cm-bf537e.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/cm-bf537u.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/cm-bf548.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/cm-bf561.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/dnp5370.h	/^#define CONFIG_PLL_BYPASS /;"	d
CONFIG_PLL_BYPASS	include/configs/ibf-dsp561.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/ip04.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/pr1.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/tcm-bf518.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_BYPASS	include/configs/tcm-bf537.h	/^#define CONFIG_PLL_BYPASS	/;"	d
CONFIG_PLL_CTL_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_PLL_CTL_VAL /;"	d	file:
CONFIG_PLL_CTL_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_PLL_CTL_VAL	/;"	d
CONFIG_PLL_DIV_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_PLL_DIV_VAL /;"	d	file:
CONFIG_PLL_LOCKCNT_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_PLL_LOCKCNT_VAL /;"	d	file:
CONFIG_PLL_LOCKCNT_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_PLL_LOCKCNT_VAL	/;"	d
CONFIG_PLU405	include/configs/PLU405.h	/^#define CONFIG_PLU405	/;"	d
CONFIG_PM8916_GPIO	drivers/gpio/Kconfig	/^config PM8916_GPIO$/;"	c	menu:GPIO Support
CONFIG_PM8916_GPIO_MODULE	drivers/gpio/Kconfig	/^config PM8916_GPIO$/;"	c	menu:GPIO Support
CONFIG_PM9261	include/configs/pm9261.h	/^#define CONFIG_PM9261	/;"	d
CONFIG_PM9263	include/configs/pm9263.h	/^#define CONFIG_PM9263	/;"	d
CONFIG_PM9G45	include/configs/pm9g45.h	/^#define CONFIG_PM9G45	/;"	d
CONFIG_PMC405DE	include/configs/PMC405DE.h	/^#define CONFIG_PMC405DE	/;"	d
CONFIG_PMC_BR_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_PMC_BR_PRELIM	/;"	d
CONFIG_PMC_BR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PMC_BR_PRELIM	/;"	d
CONFIG_PMC_OR_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_PMC_OR_PRELIM	/;"	d
CONFIG_PMC_OR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_PMC_OR_PRELIM	/;"	d
CONFIG_PMECC_CAP	include/configs/at91sam9n12ek.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_CAP	include/configs/at91sam9x5ek.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_CAP	include/configs/sama5d2_ptc.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_CAP	include/configs/sama5d3_xplained.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_CAP	include/configs/sama5d3xek.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_CAP	include/configs/sama5d4_xplained.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_CAP	include/configs/sama5d4ek.h	/^#define CONFIG_PMECC_CAP	/;"	d
CONFIG_PMECC_INDEX_TABLE_OFFSET	include/configs/at91sam9n12ek.h	/^#define CONFIG_PMECC_INDEX_TABLE_OFFSET	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PMECC_SECTOR_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_PMECC_SECTOR_SIZE	/;"	d
CONFIG_PME_PLAT_CLK_DIV	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_PME_PLAT_CLK_DIV	/;"	d
CONFIG_PMIC	include/configs/arndale.h	/^#define CONFIG_PMIC$/;"	d
CONFIG_PMIC_ACT8846	drivers/power/pmic/Kconfig	/^config PMIC_ACT8846$/;"	c
CONFIG_PMIC_ACT8846_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_ACT8846$/;"	c
CONFIG_PMIC_CHILDREN	drivers/power/pmic/Kconfig	/^config PMIC_CHILDREN$/;"	c
CONFIG_PMIC_CHILDREN_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_CHILDREN$/;"	c
CONFIG_PMIC_LP873X	drivers/power/pmic/Kconfig	/^config PMIC_LP873X$/;"	c
CONFIG_PMIC_LP873X_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_LP873X$/;"	c
CONFIG_PMIC_PALMAS	drivers/power/pmic/Kconfig	/^config PMIC_PALMAS$/;"	c
CONFIG_PMIC_PALMAS_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_PALMAS$/;"	c
CONFIG_PMIC_PM8916	drivers/power/pmic/Kconfig	/^config PMIC_PM8916$/;"	c
CONFIG_PMIC_PM8916_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_PM8916$/;"	c
CONFIG_PMIC_RK808	drivers/power/pmic/Kconfig	/^config PMIC_RK808$/;"	c
CONFIG_PMIC_RK808_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_RK808$/;"	c
CONFIG_PMIC_RN5T567	drivers/power/pmic/Kconfig	/^config PMIC_RN5T567$/;"	c
CONFIG_PMIC_RN5T567_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_RN5T567$/;"	c
CONFIG_PMIC_S2MPS11	drivers/power/pmic/Kconfig	/^config PMIC_S2MPS11$/;"	c
CONFIG_PMIC_S2MPS11_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_S2MPS11$/;"	c
CONFIG_PMIC_S5M8767	drivers/power/pmic/Kconfig	/^config PMIC_S5M8767$/;"	c
CONFIG_PMIC_S5M8767_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_S5M8767$/;"	c
CONFIG_PMIC_TPS65090	drivers/power/pmic/Kconfig	/^config PMIC_TPS65090$/;"	c
CONFIG_PMIC_TPS65090_MODULE	drivers/power/pmic/Kconfig	/^config PMIC_TPS65090$/;"	c
CONFIG_PMU	include/configs/adp-ag101p.h	/^#define CONFIG_PMU$/;"	d
CONFIG_PMW_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_PMW_BASE	/;"	d
CONFIG_PORTMUX_PIO	include/configs/atngw100.h	/^#define CONFIG_PORTMUX_PIO$/;"	d
CONFIG_PORTMUX_PIO	include/configs/atngw100mkii.h	/^#define CONFIG_PORTMUX_PIO$/;"	d
CONFIG_PORTMUX_PIO	include/configs/atstk1002.h	/^#define CONFIG_PORTMUX_PIO$/;"	d
CONFIG_PORTMUX_PIO	include/configs/grasshopper.h	/^#define CONFIG_PORTMUX_PIO$/;"	d
CONFIG_PORT_ADDR	include/configs/MIP405.h	/^#define CONFIG_PORT_ADDR	/;"	d
CONFIG_PORT_ADDR	include/configs/PIP405.h	/^#define CONFIG_PORT_ADDR	/;"	d
CONFIG_PORT_AP	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_AP	/;"	d
CONFIG_PORT_BEM	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_BEM	/;"	d
CONFIG_PORT_BME	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_BME	/;"	d
CONFIG_PORT_BS	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_BS	/;"	d
CONFIG_PORT_BU	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_BU	/;"	d
CONFIG_PORT_BW	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_BW	/;"	d
CONFIG_PORT_CR	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_CR	/;"	d
CONFIG_PORT_CSN	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_CSN	/;"	d
CONFIG_PORT_OEN	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_OEN	/;"	d
CONFIG_PORT_PEN	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_PEN	/;"	d
CONFIG_PORT_RE	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_RE	/;"	d
CONFIG_PORT_SOR	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_SOR	/;"	d
CONFIG_PORT_TH	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_TH	/;"	d
CONFIG_PORT_TWE	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_TWE	/;"	d
CONFIG_PORT_WBF	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_WBF	/;"	d
CONFIG_PORT_WBN	board/mpl/pip405/pip405.h	/^#define CONFIG_PORT_WBN	/;"	d
CONFIG_POST	include/configs/P2041RDB.h	/^#define CONFIG_POST /;"	d
CONFIG_POST	include/configs/PMC440.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/TQM5200.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/cm5200.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/corenet_ds.h	/^#define CONFIG_POST /;"	d
CONFIG_POST	include/configs/io64.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/kilauea.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/km/km_arm.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/km/kmp204x-common.h	/^#define CONFIG_POST /;"	d
CONFIG_POST	include/configs/km8360.h	/^#define CONFIG_POST /;"	d
CONFIG_POST	include/configs/lwmon5.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/makalu.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/pdm360ng.h	/^#define CONFIG_POST /;"	d
CONFIG_POST	include/configs/sequoia.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/xpedite1000.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/xpedite517x.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/xpedite520x.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/xpedite537x.h	/^#define CONFIG_POST	/;"	d
CONFIG_POST	include/configs/xpedite550x.h	/^#define CONFIG_POST	/;"	d
CONFIG_POSTBOOTMENU	include/configs/nokia_rx51.h	/^#define CONFIG_POSTBOOTMENU /;"	d
CONFIG_POST_BSPEC1	arch/blackfin/include/asm/config.h	/^# define CONFIG_POST_BSPEC1 /;"	d
CONFIG_POST_BSPEC1	include/configs/lwmon5.h	/^#define CONFIG_POST_BSPEC1 /;"	d
CONFIG_POST_BSPEC1_GPIO_LEDS	include/configs/bf537-stamp.h	/^#define CONFIG_POST_BSPEC1_GPIO_LEDS /;"	d
CONFIG_POST_BSPEC1_GPIO_LEDS	include/configs/bf548-ezkit.h	/^#define CONFIG_POST_BSPEC1_GPIO_LEDS /;"	d
CONFIG_POST_BSPEC2	arch/blackfin/include/asm/config.h	/^# define CONFIG_POST_BSPEC2 /;"	d
CONFIG_POST_BSPEC2	include/configs/lwmon5.h	/^#define CONFIG_POST_BSPEC2 /;"	d
CONFIG_POST_BSPEC2_GPIO_BUTTONS	include/configs/bf537-stamp.h	/^#define CONFIG_POST_BSPEC2_GPIO_BUTTONS /;"	d
CONFIG_POST_BSPEC2_GPIO_BUTTONS	include/configs/bf548-ezkit.h	/^#define CONFIG_POST_BSPEC2_GPIO_BUTTONS /;"	d
CONFIG_POST_BSPEC2_GPIO_NAMES	include/configs/bf537-stamp.h	/^#define CONFIG_POST_BSPEC2_GPIO_NAMES /;"	d
CONFIG_POST_BSPEC2_GPIO_NAMES	include/configs/bf548-ezkit.h	/^#define CONFIG_POST_BSPEC2_GPIO_NAMES /;"	d
CONFIG_POST_BSPEC3	include/configs/lwmon5.h	/^#define CONFIG_POST_BSPEC3 /;"	d
CONFIG_POST_BSPEC4	include/configs/lwmon5.h	/^#define CONFIG_POST_BSPEC4 /;"	d
CONFIG_POST_BSPEC5	include/configs/lwmon5.h	/^#define CONFIG_POST_BSPEC5 /;"	d
CONFIG_POST_EXTERNAL_WORD_FUNCS	include/configs/km/km_arm.h	/^#define CONFIG_POST_EXTERNAL_WORD_FUNCS$/;"	d
CONFIG_POST_EXTERNAL_WORD_FUNCS	include/configs/km8360.h	/^#define CONFIG_POST_EXTERNAL_WORD_FUNCS /;"	d
CONFIG_POST_KEY_MAGIC	include/configs/lwmon5.h	/^#define	CONFIG_POST_KEY_MAGIC	/;"	d
CONFIG_POST_SKIP_ENV_FLAGS	include/configs/km/km_arm.h	/^#define CONFIG_POST_SKIP_ENV_FLAGS$/;"	d
CONFIG_POST_STD_LIST	include/common.h	/^#define CONFIG_POST_STD_LIST$/;"	d
CONFIG_POST_UART	include/configs/lwmon5.h	/^#define CONFIG_POST_UART /;"	d
CONFIG_POST_WATCHDOG	include/configs/lwmon5.h	/^#define CONFIG_POST_WATCHDOG /;"	d
CONFIG_POWER	include/configs/am43xx_evm.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/arndale.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/cgtqmx6eval.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/cm_t43.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/el6x_common.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/gw_ventana.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/hikey.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx25pdk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx31ads.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx31pdk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx35pdk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx51evk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx53evk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx53loco.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx6qsabreauto.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx6sabresd.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx6slevk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx6sxsabreauto.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx6sxsabresd.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/mx7dsabresd.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/novena.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/pico-imx6ul.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/s5p_goni.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/s5pc210_universal.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/tqma6.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/trats.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/trats2.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/warp.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/warp7.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER	include/configs/woodburn_common.h	/^#define CONFIG_POWER$/;"	d
CONFIG_POWER_BATTERY	include/configs/trats.h	/^#define CONFIG_POWER_BATTERY$/;"	d
CONFIG_POWER_BATTERY_TRATS	include/configs/trats.h	/^#define CONFIG_POWER_BATTERY_TRATS$/;"	d
CONFIG_POWER_BATTERY_TRATS2	include/configs/trats2.h	/^#define CONFIG_POWER_BATTERY_TRATS2$/;"	d
CONFIG_POWER_DOMAIN	drivers/power/domain/Kconfig	/^config POWER_DOMAIN$/;"	c	menu:Power Domain Support
CONFIG_POWER_DOMAIN_MODULE	drivers/power/domain/Kconfig	/^config POWER_DOMAIN$/;"	c	menu:Power Domain Support
CONFIG_POWER_FG	include/configs/trats.h	/^#define CONFIG_POWER_FG$/;"	d
CONFIG_POWER_FG_MAX17042	include/configs/trats.h	/^#define CONFIG_POWER_FG_MAX17042$/;"	d
CONFIG_POWER_FG_MAX77693	include/configs/trats2.h	/^#define CONFIG_POWER_FG_MAX77693$/;"	d
CONFIG_POWER_FSL	include/configs/mx25pdk.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/mx31ads.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/mx31pdk.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/mx35pdk.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/mx51evk.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/mx53evk.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/mx53loco.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL	include/configs/woodburn_common.h	/^#define CONFIG_POWER_FSL$/;"	d
CONFIG_POWER_FSL_MC13892	include/configs/mx35pdk.h	/^#define CONFIG_POWER_FSL_MC13892$/;"	d
CONFIG_POWER_FSL_MC13892	include/configs/mx53evk.h	/^#define CONFIG_POWER_FSL_MC13892$/;"	d
CONFIG_POWER_FSL_MC13892	include/configs/mx53loco.h	/^#define CONFIG_POWER_FSL_MC13892$/;"	d
CONFIG_POWER_FSL_MC13892	include/configs/woodburn_common.h	/^#define CONFIG_POWER_FSL_MC13892$/;"	d
CONFIG_POWER_FSL_MC34704	include/configs/mx25pdk.h	/^#define CONFIG_POWER_FSL_MC34704$/;"	d
CONFIG_POWER_HI6553	include/configs/hikey.h	/^#define CONFIG_POWER_HI6553$/;"	d
CONFIG_POWER_I2C	include/configs/am43xx_evm.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/arndale.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/cgtqmx6eval.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/cm_t43.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/el6x_common.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/gw_ventana.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx25pdk.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx35pdk.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx53evk.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx53loco.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx6qsabreauto.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx6sabresd.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx6slevk.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx6sxsabreauto.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx6sxsabresd.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/mx7dsabresd.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/novena.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/pico-imx6ul.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/s5p_goni.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/s5pc210_universal.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/tqma6.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/trats.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/trats2.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/warp.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/warp7.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_I2C	include/configs/woodburn_common.h	/^#define CONFIG_POWER_I2C$/;"	d
CONFIG_POWER_LTC3676	include/configs/gw_ventana.h	/^#define CONFIG_POWER_LTC3676$/;"	d
CONFIG_POWER_LTC3676_I2C_ADDR	include/configs/gw_ventana.h	/^#define CONFIG_POWER_LTC3676_I2C_ADDR /;"	d
CONFIG_POWER_MAX77686	include/configs/trats2.h	/^#define CONFIG_POWER_MAX77686$/;"	d
CONFIG_POWER_MAX77696	include/configs/warp.h	/^#define CONFIG_POWER_MAX77696$/;"	d
CONFIG_POWER_MAX77696_I2C_ADDR	include/power/max77696_pmic.h	/^#define CONFIG_POWER_MAX77696_I2C_ADDR	/;"	d
CONFIG_POWER_MAX8997	include/configs/trats.h	/^#define CONFIG_POWER_MAX8997$/;"	d
CONFIG_POWER_MAX8998	include/configs/s5p_goni.h	/^#define CONFIG_POWER_MAX8998$/;"	d
CONFIG_POWER_MAX8998	include/configs/s5pc210_universal.h	/^#define CONFIG_POWER_MAX8998$/;"	d
CONFIG_POWER_MUIC	include/configs/trats.h	/^#define CONFIG_POWER_MUIC$/;"	d
CONFIG_POWER_MUIC_MAX77693	include/configs/trats2.h	/^#define CONFIG_POWER_MUIC_MAX77693$/;"	d
CONFIG_POWER_MUIC_MAX8997	include/configs/trats.h	/^#define CONFIG_POWER_MUIC_MAX8997$/;"	d
CONFIG_POWER_PFUZE100	include/configs/cgtqmx6eval.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/el6x_common.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/gw_ventana.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/mx6qsabreauto.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/mx6sabresd.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/mx6slevk.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/mx6sxsabreauto.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/mx6sxsabresd.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/novena.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100	include/configs/tqma6.h	/^#define CONFIG_POWER_PFUZE100$/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/el6x_common.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/gw_ventana.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/mx6qsabreauto.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/mx6sabresd.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/mx6slevk.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/mx6sxsabreauto.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/mx6sxsabresd.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/novena.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE100_I2C_ADDR	include/configs/tqma6.h	/^#define CONFIG_POWER_PFUZE100_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE3000	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_POWER_PFUZE3000$/;"	d
CONFIG_POWER_PFUZE3000	include/configs/mx7dsabresd.h	/^#define CONFIG_POWER_PFUZE3000$/;"	d
CONFIG_POWER_PFUZE3000	include/configs/pico-imx6ul.h	/^#define CONFIG_POWER_PFUZE3000$/;"	d
CONFIG_POWER_PFUZE3000	include/configs/warp7.h	/^#define CONFIG_POWER_PFUZE3000$/;"	d
CONFIG_POWER_PFUZE3000_I2C_ADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_POWER_PFUZE3000_I2C_ADDR /;"	d
CONFIG_POWER_PFUZE3000_I2C_ADDR	include/configs/mx7dsabresd.h	/^#define CONFIG_POWER_PFUZE3000_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE3000_I2C_ADDR	include/configs/pico-imx6ul.h	/^#define CONFIG_POWER_PFUZE3000_I2C_ADDR	/;"	d
CONFIG_POWER_PFUZE3000_I2C_ADDR	include/configs/warp7.h	/^#define CONFIG_POWER_PFUZE3000_I2C_ADDR	/;"	d
CONFIG_POWER_PMIC_MAX77693	include/configs/trats2.h	/^#define CONFIG_POWER_PMIC_MAX77693$/;"	d
CONFIG_POWER_SPI	include/configs/mx31ads.h	/^#define CONFIG_POWER_SPI$/;"	d
CONFIG_POWER_SPI	include/configs/mx31pdk.h	/^#define CONFIG_POWER_SPI$/;"	d
CONFIG_POWER_SPI	include/configs/mx51evk.h	/^#define CONFIG_POWER_SPI$/;"	d
CONFIG_POWER_TPS62362	include/configs/am43xx_evm.h	/^#define CONFIG_POWER_TPS62362$/;"	d
CONFIG_POWER_TPS65090_EC	include/configs/peach-pi.h	/^#define CONFIG_POWER_TPS65090_EC$/;"	d
CONFIG_POWER_TPS65217	include/configs/am335x_evm.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65217	include/configs/am335x_shc.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65217	include/configs/am335x_sl50.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65217	include/configs/bav335x.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65217	include/configs/brppt1.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65217	include/configs/brxre1.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65217	include/configs/bur_am335x_common.h	/^#define CONFIG_POWER_TPS65217$/;"	d
CONFIG_POWER_TPS65218	include/configs/am43xx_evm.h	/^#define CONFIG_POWER_TPS65218$/;"	d
CONFIG_POWER_TPS65218	include/configs/cm_t43.h	/^#define CONFIG_POWER_TPS65218$/;"	d
CONFIG_POWER_TPS65910	include/configs/am335x_evm.h	/^#define CONFIG_POWER_TPS65910$/;"	d
CONFIG_POWER_TPS65910	include/configs/am335x_sl50.h	/^#define CONFIG_POWER_TPS65910$/;"	d
CONFIG_POWER_TPS65910	include/configs/baltos.h	/^#define CONFIG_POWER_TPS65910$/;"	d
CONFIG_POWER_TPS65910	include/configs/bav335x.h	/^#define CONFIG_POWER_TPS65910$/;"	d
CONFIG_PPA_KEY_HASH	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_PPA_KEY_HASH	/;"	d
CONFIG_PPC	arch/Kconfig	/^config PPC$/;"	c	choice:choice07312ef30104
CONFIG_PPC4XX_RAPIDIO_PROMISCUOUS_MODE	include/configs/canyonlands.h	/^#define CONFIG_PPC4XX_RAPIDIO_PROMISCUOUS_MODE$/;"	d
CONFIG_PPC4XX_RAPIDIO_USE_HB_PLB	include/configs/canyonlands.h	/^#define CONFIG_PPC4XX_RAPIDIO_USE_HB_PLB$/;"	d
CONFIG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/canyonlands.h	/^#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
CONFIG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/intip.h	/^#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
CONFIG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/io64.h	/^#define	CONFIG_PPC4xx_DDR_AUTOCALIBRATION$/;"	d
CONFIG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/kilauea.h	/^#define	CONFIG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
CONFIG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/t3corp.h	/^#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
CONFIG_PPC4xx_EMAC	include/configs/CPCI4052.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/MIP405.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/PIP405.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/PLU405.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/PMC405DE.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/PMC440.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/VOM405.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/amcc-common.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/lwmon5.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC4xx_EMAC	include/configs/xpedite1000.h	/^#define CONFIG_PPC4xx_EMAC$/;"	d
CONFIG_PPC_C29X	include/configs/C29XPCIE.h	/^#define CONFIG_PPC_C29X$/;"	d
CONFIG_PPC_CLUSTER_START	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_PPC_CLUSTER_START	/;"	d
CONFIG_PPC_MODULE	arch/Kconfig	/^config PPC$/;"	c	choice:choice07312ef30104
CONFIG_PPC_P2041	include/configs/P2041RDB.h	/^#define CONFIG_PPC_P2041$/;"	d
CONFIG_PPC_P2041	include/configs/km/kmp204x-common.h	/^#define CONFIG_PPC_P2041$/;"	d
CONFIG_PPC_P3041	include/configs/P3041DS.h	/^#define CONFIG_PPC_P3041$/;"	d
CONFIG_PPC_P4080	include/configs/P4080DS.h	/^#define CONFIG_PPC_P4080$/;"	d
CONFIG_PPC_P5020	include/configs/P5020DS.h	/^#define CONFIG_PPC_P5020$/;"	d
CONFIG_PPC_P5040	include/configs/P5040DS.h	/^#define CONFIG_PPC_P5040$/;"	d
CONFIG_PPC_SPINTABLE_COMPATIBLE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_PPC_SPINTABLE_COMPATIBLE$/;"	d
CONFIG_PQ_MDS_PIB	include/configs/MPC837XEMDS.h	/^#define CONFIG_PQ_MDS_PIB	/;"	d
CONFIG_PQ_MDS_PIB	include/configs/MPC8569MDS.h	/^#define CONFIG_PQ_MDS_PIB$/;"	d
CONFIG_PQ_MDS_PIB_ATM	include/configs/MPC8569MDS.h	/^#define CONFIG_PQ_MDS_PIB_ATM$/;"	d
CONFIG_PRAM	include/configs/CPCI4052.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M5208EVBE.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M52277EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M5235EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M53017EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M5329EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M5373EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M54418TWR.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M54451EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M54455EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M5475EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/M5485EVB.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/PMC405DE.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/PMC440.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/km/km-powerpc.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/km/kmp204x-common.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/nokia_rx51.h	/^#define CONFIG_PRAM	/;"	d
CONFIG_PRAM	include/configs/ti_omap5_common.h	/^#define CONFIG_PRAM /;"	d
CONFIG_PREBOOT	include/configs/CPCI2DP.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/CPCI4052.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/MIP405.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/MPC8349EMDS.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/PATI.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/PIP405.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/PLU405.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/PMC405DE.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/PMC440.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM5200.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM823L.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM823M.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM834x.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM850L.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM850M.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM855L.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM855M.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM860L.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM860M.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM862L.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM862M.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM866M.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/TQM885D.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/VOM405.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/a3m071.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/a4m072.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/ac14xx.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/am3517_crane.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/am3517_evm.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/amcc-common.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/apf27.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/aria.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/arndale.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/bur_cfg_common.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/calimain.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/canmb.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/cm5200.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/cm_fx6.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/dfi-bt700.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/ds414.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/ea20.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/gr_ep2s60.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/gr_xc3s_1500.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/grsim.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/grsim_leon2.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/gw_ventana.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/hrcon.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/ids8313.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/inka4x0.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/ip04.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/ipek01.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/jupiter.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/lwmon5.h	/^#define	CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/m28evk.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/m53evk.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/ma5d4evk.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/manroland/common.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/mcx.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/mecp5123.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/meesc.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/microblaze-generic.h	/^#define	CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/mpc5121ads.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/munices.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/mv-common.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/mx51evk.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/mx53loco.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/mx6cuboxi.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/nitrogen6x.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/nokia_rx51.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/o2dnt-common.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/omap3_evm.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/omap3_logic.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/ot1200.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/pcm030.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/pdm360ng.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/platinum.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/redwood.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/rk3036_common.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/rk3288_common.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/rpi.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/siemens-am33x-common.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/socfpga_mcvevk.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/socrates.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/strider.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/sunxi-common.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/tbs2910.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/tegra-common-post.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/theadorable.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/v38b.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xpedite1000.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xpedite517x.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xpedite520x.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xpedite537x.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/xpedite550x.h	/^#define CONFIG_PREBOOT	/;"	d
CONFIG_PREBOOT	include/configs/zipitz2.h	/^#define	CONFIG_PREBOOT$/;"	d
CONFIG_PREBOOT	include/configs/zmx25.h	/^#define CONFIG_PREBOOT /;"	d
CONFIG_PREBOOT	include/configs/zynq-common.h	/^#define CONFIG_PREBOOT$/;"	d
CONFIG_PRE_CONSOLE_BUFFER	board/sunxi/Kconfig	/^config PRE_CONSOLE_BUFFER$/;"	c
CONFIG_PRE_CONSOLE_BUFFER	common/Kconfig	/^config PRE_CONSOLE_BUFFER$/;"	c	menu:Console
CONFIG_PRE_CONSOLE_BUFFER	include/config/auto.conf	/^CONFIG_PRE_CONSOLE_BUFFER=y$/;"	k
CONFIG_PRE_CONSOLE_BUFFER	include/generated/autoconf.h	/^#define CONFIG_PRE_CONSOLE_BUFFER /;"	d
CONFIG_PRE_CONSOLE_BUFFER_MODULE	board/sunxi/Kconfig	/^config PRE_CONSOLE_BUFFER$/;"	c
CONFIG_PRE_CONSOLE_BUFFER_MODULE	common/Kconfig	/^config PRE_CONSOLE_BUFFER$/;"	c	menu:Console
CONFIG_PRE_CON_BUF_ADDR	common/Kconfig	/^config PRE_CON_BUF_ADDR$/;"	c	menu:Console
CONFIG_PRE_CON_BUF_ADDR	include/config/auto.conf	/^CONFIG_PRE_CON_BUF_ADDR=0x4f000000$/;"	k
CONFIG_PRE_CON_BUF_ADDR	include/generated/autoconf.h	/^#define CONFIG_PRE_CON_BUF_ADDR /;"	d
CONFIG_PRE_CON_BUF_ADDR_MODULE	common/Kconfig	/^config PRE_CON_BUF_ADDR$/;"	c	menu:Console
CONFIG_PRE_CON_BUF_SZ	common/Kconfig	/^config PRE_CON_BUF_SZ$/;"	c	menu:Console
CONFIG_PRE_CON_BUF_SZ	include/config/auto.conf	/^CONFIG_PRE_CON_BUF_SZ=4096$/;"	k
CONFIG_PRE_CON_BUF_SZ	include/generated/autoconf.h	/^#define CONFIG_PRE_CON_BUF_SZ /;"	d
CONFIG_PRE_CON_BUF_SZ_MODULE	common/Kconfig	/^config PRE_CON_BUF_SZ$/;"	c	menu:Console
CONFIG_PROG_FDT	include/configs/xpedite1000.h	/^#define CONFIG_PROG_FDT	/;"	d
CONFIG_PROG_FDT1	include/configs/xpedite517x.h	/^#define CONFIG_PROG_FDT1	/;"	d
CONFIG_PROG_FDT1	include/configs/xpedite520x.h	/^#define CONFIG_PROG_FDT1	/;"	d
CONFIG_PROG_FDT1	include/configs/xpedite537x.h	/^#define CONFIG_PROG_FDT1	/;"	d
CONFIG_PROG_FDT1	include/configs/xpedite550x.h	/^#define CONFIG_PROG_FDT1	/;"	d
CONFIG_PROG_FDT2	include/configs/xpedite517x.h	/^#define CONFIG_PROG_FDT2	/;"	d
CONFIG_PROG_FDT2	include/configs/xpedite520x.h	/^#define CONFIG_PROG_FDT2	/;"	d
CONFIG_PROG_FDT2	include/configs/xpedite537x.h	/^#define CONFIG_PROG_FDT2	/;"	d
CONFIG_PROG_FDT2	include/configs/xpedite550x.h	/^#define CONFIG_PROG_FDT2	/;"	d
CONFIG_PROG_OS	include/configs/xpedite1000.h	/^#define CONFIG_PROG_OS	/;"	d
CONFIG_PROG_OS1	include/configs/xpedite517x.h	/^#define CONFIG_PROG_OS1	/;"	d
CONFIG_PROG_OS1	include/configs/xpedite520x.h	/^#define CONFIG_PROG_OS1	/;"	d
CONFIG_PROG_OS1	include/configs/xpedite537x.h	/^#define CONFIG_PROG_OS1	/;"	d
CONFIG_PROG_OS1	include/configs/xpedite550x.h	/^#define CONFIG_PROG_OS1	/;"	d
CONFIG_PROG_OS2	include/configs/xpedite517x.h	/^#define CONFIG_PROG_OS2	/;"	d
CONFIG_PROG_OS2	include/configs/xpedite520x.h	/^#define CONFIG_PROG_OS2	/;"	d
CONFIG_PROG_OS2	include/configs/xpedite537x.h	/^#define CONFIG_PROG_OS2	/;"	d
CONFIG_PROG_OS2	include/configs/xpedite550x.h	/^#define CONFIG_PROG_OS2	/;"	d
CONFIG_PROG_SDRAM_TLB	include/configs/bamboo.h	/^#define CONFIG_PROG_SDRAM_TLB$/;"	d
CONFIG_PROG_UBOOT	include/configs/xpedite1000.h	/^#define CONFIG_PROG_UBOOT	/;"	d
CONFIG_PROG_UBOOT1	include/configs/xpedite517x.h	/^#define CONFIG_PROG_UBOOT1	/;"	d
CONFIG_PROG_UBOOT1	include/configs/xpedite520x.h	/^#define CONFIG_PROG_UBOOT1	/;"	d
CONFIG_PROG_UBOOT1	include/configs/xpedite537x.h	/^#define CONFIG_PROG_UBOOT1	/;"	d
CONFIG_PROG_UBOOT1	include/configs/xpedite550x.h	/^#define CONFIG_PROG_UBOOT1	/;"	d
CONFIG_PROG_UBOOT2	include/configs/xpedite517x.h	/^#define CONFIG_PROG_UBOOT2	/;"	d
CONFIG_PROG_UBOOT2	include/configs/xpedite520x.h	/^#define CONFIG_PROG_UBOOT2	/;"	d
CONFIG_PROG_UBOOT2	include/configs/xpedite537x.h	/^#define CONFIG_PROG_UBOOT2	/;"	d
CONFIG_PROG_UBOOT2	include/configs/xpedite550x.h	/^#define CONFIG_PROG_UBOOT2	/;"	d
CONFIG_PROOF_POINTS	include/configs/B4860QDS.h	/^#define CONFIG_PROOF_POINTS	/;"	d
CONFIG_PROOF_POINTS	include/configs/T208xQDS.h	/^#define CONFIG_PROOF_POINTS	/;"	d
CONFIG_PROOF_POINTS	include/configs/T208xRDB.h	/^#define CONFIG_PROOF_POINTS	/;"	d
CONFIG_PRPMC_PCI_ALIAS	include/configs/xpedite550x.h	/^#define CONFIG_PRPMC_PCI_ALIAS	/;"	d
CONFIG_PS2KBD	include/configs/TQM5200.h	/^#define CONFIG_PS2KBD	/;"	d
CONFIG_PS2MULT	include/configs/TQM5200.h	/^#define CONFIG_PS2MULT	/;"	d
CONFIG_PS2MULT_DELAY	include/configs/TQM5200.h	/^#define CONFIG_PS2MULT_DELAY	/;"	d
CONFIG_PS2MULT_DELAY	include/ps2mult.h	/^#define CONFIG_PS2MULT_DELAY	/;"	d
CONFIG_PS2SERIAL	include/configs/TQM5200.h	/^#define CONFIG_PS2SERIAL	/;"	d
CONFIG_PSCI_RESET	arch/arm/cpu/armv8/Kconfig	/^config PSCI_RESET$/;"	c
CONFIG_PSCI_RESET_MODULE	arch/arm/cpu/armv8/Kconfig	/^config PSCI_RESET$/;"	c
CONFIG_PSC_CONSOLE	include/configs/TQM5200.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/a3m071.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/a4m072.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/ac14xx.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/aria.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/canmb.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/cm5200.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/digsy_mtc.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/inka4x0.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/ipek01.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/jupiter.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/mecp5123.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/motionpro.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/mpc5121ads.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/munices.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/o2dnt-common.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/pcm030.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/pdm360ng.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSC_CONSOLE	include/configs/v38b.h	/^#define CONFIG_PSC_CONSOLE	/;"	d
CONFIG_PSRAM_SCFG	include/configs/pm9263.h	/^#define CONFIG_PSRAM_SCFG	/;"	d
CONFIG_PUB_ROM_DATA_SIZE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config PUB_ROM_DATA_SIZE$/;"	c
CONFIG_PUB_ROM_DATA_SIZE_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config PUB_ROM_DATA_SIZE$/;"	c
CONFIG_PWM	include/configs/exynos-common.h	/^#define CONFIG_PWM$/;"	d
CONFIG_PWM	include/configs/s5p_goni.h	/^#define CONFIG_PWM	/;"	d
CONFIG_PWM	include/configs/smdkc100.h	/^#define CONFIG_PWM	/;"	d
CONFIG_PWM_EXYNOS	drivers/pwm/Kconfig	/^config PWM_EXYNOS$/;"	c
CONFIG_PWM_EXYNOS_MODULE	drivers/pwm/Kconfig	/^config PWM_EXYNOS$/;"	c
CONFIG_PWM_IMX	include/configs/advantech_dms-ba16.h	/^#define CONFIG_PWM_IMX$/;"	d
CONFIG_PWM_IMX	include/configs/aristainetos-common.h	/^#define CONFIG_PWM_IMX$/;"	d
CONFIG_PWM_IMX	include/configs/aristainetos2.h	/^#define CONFIG_PWM_IMX$/;"	d
CONFIG_PWM_IMX	include/configs/aristainetos2b.h	/^#define CONFIG_PWM_IMX$/;"	d
CONFIG_PWM_IMX	include/configs/ge_bx50v3.h	/^#define CONFIG_PWM_IMX$/;"	d
CONFIG_PWM_ROCKCHIP	drivers/pwm/Kconfig	/^config PWM_ROCKCHIP$/;"	c
CONFIG_PWM_ROCKCHIP_MODULE	drivers/pwm/Kconfig	/^config PWM_ROCKCHIP$/;"	c
CONFIG_PWM_TEGRA	drivers/pwm/Kconfig	/^config PWM_TEGRA$/;"	c
CONFIG_PWM_TEGRA_MODULE	drivers/pwm/Kconfig	/^config PWM_TEGRA$/;"	c
CONFIG_PWRSEQ	drivers/misc/Kconfig	/^config PWRSEQ$/;"	c	menu:Multifunction device drivers
CONFIG_PWRSEQ_MODULE	drivers/misc/Kconfig	/^config PWRSEQ$/;"	c	menu:Multifunction device drivers
CONFIG_PXA_LCD	include/configs/colibri_pxa270.h	/^#define CONFIG_PXA_LCD$/;"	d
CONFIG_PXA_LCD	include/configs/zipitz2.h	/^#define	CONFIG_PXA_LCD$/;"	d
CONFIG_PXA_MMC_GENERIC	include/configs/pxa-common.h	/^#define	CONFIG_PXA_MMC_GENERIC$/;"	d
CONFIG_PXA_MMC_GENERIC	include/configs/zipitz2.h	/^#define	CONFIG_PXA_MMC_GENERIC$/;"	d
CONFIG_PXA_PWR_I2C	include/configs/colibri_pxa270.h	/^#define CONFIG_PXA_PWR_I2C$/;"	d
CONFIG_PXA_SERIAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_PXA_SERIAL$/;"	d
CONFIG_PXA_SERIAL	include/configs/h2200.h	/^#define CONFIG_PXA_SERIAL$/;"	d
CONFIG_PXA_SERIAL	include/configs/zipitz2.h	/^#define	CONFIG_PXA_SERIAL$/;"	d
CONFIG_PXA_STD_I2C	include/configs/colibri_pxa270.h	/^#define CONFIG_PXA_STD_I2C$/;"	d
CONFIG_PXA_VGA	include/configs/colibri_pxa270.h	/^#define CONFIG_PXA_VGA$/;"	d
CONFIG_P_CLK_FREQ	include/configs/alt.h	/^#define CONFIG_P_CLK_FREQ	/;"	d
CONFIG_P_CLK_FREQ	include/configs/porter.h	/^#define CONFIG_P_CLK_FREQ	/;"	d
CONFIG_P_CLK_FREQ	include/configs/silk.h	/^#define CONFIG_P_CLK_FREQ	/;"	d
CONFIG_QBMAN_CLK_DIV	arch/powerpc/cpu/mpc85xx/speed.c	/^#define CONFIG_QBMAN_CLK_DIV	/;"	d	file:
CONFIG_QBMAN_CLK_DIV	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_QBMAN_CLK_DIV	/;"	d
CONFIG_QCA953X_PINCTRL	drivers/pinctrl/Kconfig	/^config QCA953X_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_QCA953X_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config QCA953X_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_QE	include/configs/MPC8323ERDB.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/MPC832XEMDS.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/MPC8568MDS.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/MPC8569MDS.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/T102xQDS.h	/^#define CONFIG_QE$/;"	d
CONFIG_QE	include/configs/T102xRDB.h	/^#define CONFIG_QE$/;"	d
CONFIG_QE	include/configs/T1040QDS.h	/^#define CONFIG_QE$/;"	d
CONFIG_QE	include/configs/T104xRDB.h	/^#define CONFIG_QE$/;"	d
CONFIG_QE	include/configs/km/km8309-common.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/km/km8321-common.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/km8360.h	/^#define CONFIG_QE	/;"	d
CONFIG_QE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_QE$/;"	d
CONFIG_QE	include/configs/p1_twr.h	/^#define CONFIG_QE$/;"	d
CONFIG_QEMU	arch/x86/cpu/qemu/Kconfig	/^config QEMU$/;"	c
CONFIG_QEMU_E500	include/configs/qemu-ppce500.h	/^#define CONFIG_QEMU_E500$/;"	d
CONFIG_QEMU_MIPS	include/configs/qemu-mips.h	/^#define CONFIG_QEMU_MIPS$/;"	d
CONFIG_QEMU_MIPS	include/configs/qemu-mips64.h	/^#define CONFIG_QEMU_MIPS$/;"	d
CONFIG_QEMU_MODULE	arch/x86/cpu/qemu/Kconfig	/^config QEMU$/;"	c
CONFIG_QFW	drivers/misc/Kconfig	/^config QFW$/;"	c	menu:Multifunction device drivers
CONFIG_QFW_MODULE	drivers/misc/Kconfig	/^config QFW$/;"	c	menu:Multifunction device drivers
CONFIG_QIXIS_I2C_ACCESS	include/configs/ls1012aqds.h	/^#define CONFIG_QIXIS_I2C_ACCESS$/;"	d
CONFIG_QIXIS_I2C_ACCESS	include/configs/ls1021aqds.h	/^#define CONFIG_QIXIS_I2C_ACCESS$/;"	d
CONFIG_QIXIS_I2C_ACCESS	include/configs/ls1043aqds.h	/^#define CONFIG_QIXIS_I2C_ACCESS$/;"	d
CONFIG_QIXIS_I2C_ACCESS	include/configs/ls1046aqds.h	/^#define CONFIG_QIXIS_I2C_ACCESS$/;"	d
CONFIG_QIXIS_I2C_ACCESS	include/configs/ls2080aqds.h	/^#define CONFIG_QIXIS_I2C_ACCESS$/;"	d
CONFIG_QOS_PRI_GFX	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_GFX$/;"	c	choice:choice335b3af40204
CONFIG_QOS_PRI_GFX_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_GFX$/;"	c	choice:choice335b3af40204
CONFIG_QOS_PRI_MEDIA	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_MEDIA$/;"	c	choice:choice335b3af40204
CONFIG_QOS_PRI_MEDIA_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_MEDIA$/;"	c	choice:choice335b3af40204
CONFIG_QOS_PRI_NORMAL	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_NORMAL$/;"	c	choice:choice335b3af40204
CONFIG_QOS_PRI_NORMAL_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_NORMAL$/;"	c	choice:choice335b3af40204
CONFIG_QSPI_BOOT	common/Kconfig	/^config QSPI_BOOT$/;"	c	menu:Boot media
CONFIG_QSPI_BOOT_MODULE	common/Kconfig	/^config QSPI_BOOT$/;"	c	menu:Boot media
CONFIG_QSPI_MODE_24BIT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config QSPI_MODE_24BIT$/;"	c	choice:choice5ba020940104
CONFIG_QSPI_MODE_24BIT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config QSPI_MODE_24BIT$/;"	c	choice:choice5ba020940104
CONFIG_QSPI_MODE_32BIT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config QSPI_MODE_32BIT$/;"	c	choice:choice5ba020940104
CONFIG_QSPI_MODE_32BIT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config QSPI_MODE_32BIT$/;"	c	choice:choice5ba020940104
CONFIG_QSPI_QUAD_SUPPORT	include/configs/am43xx_evm.h	/^#define CONFIG_QSPI_QUAD_SUPPORT$/;"	d
CONFIG_QSPI_QUAD_SUPPORT	include/configs/am57xx_evm.h	/^#define CONFIG_QSPI_QUAD_SUPPORT$/;"	d
CONFIG_QSPI_QUAD_SUPPORT	include/configs/dra7xx_evm.h	/^#define CONFIG_QSPI_QUAD_SUPPORT$/;"	d
CONFIG_QSPI_SEL_GPIO	include/configs/am43xx_evm.h	/^#define CONFIG_QSPI_SEL_GPIO /;"	d
CONFIG_R0P7734	include/configs/r0p7734.h	/^#define CONFIG_R0P7734	/;"	d
CONFIG_R2DPLUS	include/configs/r2dplus.h	/^#define CONFIG_R2DPLUS	/;"	d
CONFIG_R7780MP	include/configs/r7780mp.h	/^#define CONFIG_R7780MP	/;"	d
CONFIG_R8A66597_BASE_ADDR	include/configs/ecovec.h	/^#define CONFIG_R8A66597_BASE_ADDR /;"	d
CONFIG_R8A66597_BASE_ADDR	include/configs/sh7785lcr.h	/^#define CONFIG_R8A66597_BASE_ADDR	/;"	d
CONFIG_R8A66597_ENDIAN	include/configs/ecovec.h	/^#define CONFIG_R8A66597_ENDIAN /;"	d
CONFIG_R8A66597_ENDIAN	include/configs/sh7785lcr.h	/^#define CONFIG_R8A66597_ENDIAN	/;"	d
CONFIG_R8A66597_LDRV	include/configs/ecovec.h	/^#define CONFIG_R8A66597_LDRV /;"	d
CONFIG_R8A66597_LDRV	include/configs/sh7785lcr.h	/^#define CONFIG_R8A66597_LDRV	/;"	d
CONFIG_R8A66597_XTAL	include/configs/ecovec.h	/^#define CONFIG_R8A66597_XTAL /;"	d
CONFIG_R8A66597_XTAL	include/configs/sh7785lcr.h	/^#define CONFIG_R8A66597_XTAL	/;"	d
CONFIG_R8A7740	include/configs/armadillo-800eva.h	/^#define CONFIG_R8A7740$/;"	d
CONFIG_R8A7790	include/configs/lager.h	/^#define CONFIG_R8A7790$/;"	d
CONFIG_R8A7790	include/configs/stout.h	/^#define CONFIG_R8A7790$/;"	d
CONFIG_R8A7791	include/configs/koelsch.h	/^#define CONFIG_R8A7791$/;"	d
CONFIG_R8A7791	include/configs/porter.h	/^#define CONFIG_R8A7791$/;"	d
CONFIG_R8A7792	include/configs/blanche.h	/^#define CONFIG_R8A7792$/;"	d
CONFIG_R8A7793	include/configs/gose.h	/^#define CONFIG_R8A7793$/;"	d
CONFIG_R8A7794	include/configs/alt.h	/^#define CONFIG_R8A7794$/;"	d
CONFIG_R8A7794	include/configs/silk.h	/^#define CONFIG_R8A7794$/;"	d
CONFIG_R8A7794_ETHERNET_B	board/renesas/alt/Kconfig	/^config R8A7794_ETHERNET_B$/;"	c
CONFIG_R8A7794_ETHERNET_B_MODULE	board/renesas/alt/Kconfig	/^config R8A7794_ETHERNET_B$/;"	c
CONFIG_R8A7795	arch/arm/mach-rmobile/Kconfig.64	/^config R8A7795$/;"	c
CONFIG_R8A7795_MODULE	arch/arm/mach-rmobile/Kconfig.64	/^config R8A7795$/;"	c
CONFIG_RAM	drivers/ram/Kconfig	/^config RAM$/;"	c
CONFIG_RAMBASE	arch/x86/Kconfig	/^config RAMBASE$/;"	c	menu:x86 architecture
CONFIG_RAMBASE_MODULE	arch/x86/Kconfig	/^config RAMBASE$/;"	c	menu:x86 architecture
CONFIG_RAMBOOTCOMMAND	include/configs/B4860QDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/BSC9131RDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/BSC9132QDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/C29XPCIE.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8313ERDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8315ERDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8323ERDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC832XEMDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8349EMDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8349ITX.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC837XEMDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC837XERDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8536DS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8540ADS.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8541CDS.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8544DS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8548CDS.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8555CDS.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8560ADS.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8568MDS.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8569MDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8572DS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8610HPCD.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/MPC8641HPCN.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/P1010RDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/P1022DS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/P1023RDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/P2041RDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/T1040QDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/T104xRDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/T208xQDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/T208xRDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/T4240QDS.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/T4240RDB.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/controlcenterd.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/corenet_ds.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/cyrus.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/p1_twr.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/sbc8349.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/sbc8548.h	/^#define CONFIG_RAMBOOTCOMMAND /;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/sbc8641d.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/spear-common.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/vme8349.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND	include/configs/x86-common.h	/^#define CONFIG_RAMBOOTCOMMAND	/;"	d
CONFIG_RAMBOOTCOMMAND_TFTP	include/configs/p1_twr.h	/^#define CONFIG_RAMBOOTCOMMAND_TFTP	/;"	d
CONFIG_RAMBOOT_NAND	include/configs/BSC9132QDS.h	/^#define CONFIG_RAMBOOT_NAND$/;"	d
CONFIG_RAMBOOT_NAND	include/configs/P1010RDB.h	/^#define CONFIG_RAMBOOT_NAND$/;"	d
CONFIG_RAMBOOT_NAND	include/configs/T104xRDB.h	/^#define CONFIG_RAMBOOT_NAND$/;"	d
CONFIG_RAMBOOT_NAND	include/configs/corenet_ds.h	/^#define CONFIG_RAMBOOT_NAND$/;"	d
CONFIG_RAMBOOT_PBL	include/configs/km/kmp204x-common.h	/^#define CONFIG_RAMBOOT_PBL$/;"	d
CONFIG_RAMBOOT_SDCARD	include/configs/BSC9132QDS.h	/^#define CONFIG_RAMBOOT_SDCARD$/;"	d
CONFIG_RAMBOOT_SDCARD	include/configs/MPC8536DS.h	/^#define CONFIG_RAMBOOT_SDCARD	/;"	d
CONFIG_RAMBOOT_SDCARD	include/configs/UCP1020.h	/^#define CONFIG_RAMBOOT_SDCARD$/;"	d
CONFIG_RAMBOOT_SDCARD	include/configs/controlcenterd.h	/^#define CONFIG_RAMBOOT_SDCARD$/;"	d
CONFIG_RAMBOOT_SDCARD	include/configs/p1_twr.h	/^#define CONFIG_RAMBOOT_SDCARD$/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/BSC9131RDB.h	/^#define CONFIG_RAMBOOT_SPIFLASH$/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/BSC9132QDS.h	/^#define CONFIG_RAMBOOT_SPIFLASH$/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/C29XPCIE.h	/^#define CONFIG_RAMBOOT_SPIFLASH$/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/MPC8536DS.h	/^#define CONFIG_RAMBOOT_SPIFLASH	/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/P1010RDB.h	/^#define CONFIG_RAMBOOT_SPIFLASH$/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/UCP1020.h	/^#define CONFIG_RAMBOOT_SPIFLASH$/;"	d
CONFIG_RAMBOOT_SPIFLASH	include/configs/controlcenterd.h	/^#define CONFIG_RAMBOOT_SPIFLASH$/;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/B4860QDS.h	/^#define CONFIG_RAMBOOT_TEXT_BASE	/;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/P2041RDB.h	/^#define CONFIG_RAMBOOT_TEXT_BASE	/;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/T1040QDS.h	/^#define CONFIG_RAMBOOT_TEXT_BASE	/;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/T4240QDS.h	/^#define CONFIG_RAMBOOT_TEXT_BASE /;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/T4240RDB.h	/^#define CONFIG_RAMBOOT_TEXT_BASE /;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/corenet_ds.h	/^#define CONFIG_RAMBOOT_TEXT_BASE	/;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/cyrus.h	/^#define CONFIG_RAMBOOT_TEXT_BASE	/;"	d
CONFIG_RAMBOOT_TEXT_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_RAMBOOT_TEXT_BASE	/;"	d
CONFIG_RAMDISKFILE	include/configs/MPC8323ERDB.h	/^#define CONFIG_RAMDISKFILE	/;"	d
CONFIG_RAMDISKFILE	include/configs/MPC837XERDB.h	/^#define CONFIG_RAMDISKFILE	/;"	d
CONFIG_RAMDISK_ADDR	include/configs/x86-common.h	/^#define CONFIG_RAMDISK_ADDR	/;"	d
CONFIG_RAMDISK_BOOT	include/configs/s5p_goni.h	/^#define CONFIG_RAMDISK_BOOT	/;"	d
CONFIG_RAMDISK_BOOT	include/configs/smdkc100.h	/^#define CONFIG_RAMDISK_BOOT	/;"	d
CONFIG_RAM_BOOT	board/renesas/sh7752evb/spi-boot.c	/^#define CONFIG_RAM_BOOT	/;"	d	file:
CONFIG_RAM_BOOT	board/renesas/sh7757lcr/spi-boot.c	/^#define CONFIG_RAM_BOOT	/;"	d	file:
CONFIG_RAM_BOOT_PHYS	board/renesas/sh7752evb/spi-boot.c	/^#define CONFIG_RAM_BOOT_PHYS	/;"	d	file:
CONFIG_RAM_BOOT_PHYS	board/renesas/sh7753evb/spi-boot.c	/^#define CONFIG_RAM_BOOT_PHYS	/;"	d	file:
CONFIG_RAM_BOOT_PHYS	board/renesas/sh7757lcr/spi-boot.c	/^#define CONFIG_RAM_BOOT_PHYS	/;"	d	file:
CONFIG_RAM_MODULE	drivers/ram/Kconfig	/^config RAM$/;"	c
CONFIG_RANDOM_UUID	include/configs/dra7xx_evm.h	/^#define CONFIG_RANDOM_UUID$/;"	d
CONFIG_RANDOM_UUID	include/configs/odroid.h	/^#define CONFIG_RANDOM_UUID$/;"	d
CONFIG_RANDOM_UUID	include/configs/rockchip-common.h	/^#define CONFIG_RANDOM_UUID$/;"	d
CONFIG_RANDOM_UUID	include/configs/trats.h	/^#define CONFIG_RANDOM_UUID$/;"	d
CONFIG_RANDOM_UUID	include/configs/trats2.h	/^#define CONFIG_RANDOM_UUID$/;"	d
CONFIG_RANDOM_UUID	include/configs/vinco.h	/^#define CONFIG_RANDOM_UUID$/;"	d
CONFIG_RAPIDIO	include/configs/canyonlands.h	/^#define CONFIG_RAPIDIO$/;"	d
CONFIG_RBTREE	include/configs/M54418TWR.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/PLU405.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/VCMA9.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/a3m071.h	/^#define CONFIG_RBTREE	/;"	d
CONFIG_RBTREE	include/configs/am335x_igep0033.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/am3517_evm.h	/^#define CONFIG_RBTREE	/;"	d
CONFIG_RBTREE	include/configs/apf27.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/apx4devkit.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/aristainetos-common.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/at91sam9x5ek.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/baltos.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/colibri_imx7.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/colibri_t20.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/colibri_vf.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/da850evm.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/dockstar.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/ea20.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/ethernut5.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/gw_ventana.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/iconnect.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/ids8313.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/ipam390.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/km/keymile-common.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/m28evk.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/m53evk.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/mcx.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/microblaze-generic.h	/^# define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/mv-common.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/mx28evk.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/nas220.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/nokia_rx51.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/omap3_igep00x0.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/omap3_logic.h	/^#define CONFIG_RBTREE	/;"	d
CONFIG_RBTREE	include/configs/omap3_overo.h	/^#define CONFIG_RBTREE	/;"	d
CONFIG_RBTREE	include/configs/omap3_pandora.h	/^#define CONFIG_RBTREE	/;"	d
CONFIG_RBTREE	include/configs/omapl138_lcdk.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/pcm052.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/pcm058.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/platinum.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/pogo_e02.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/sama5d3_xplained.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/siemens-am33x-common.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/smdk2410.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/socfpga_common.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/tam3517-common.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/titanium.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/tricorder.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/vct.h	/^#define	CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/vf610twr.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RBTREE	include/configs/x600.h	/^#define CONFIG_RBTREE$/;"	d
CONFIG_RCAR_32	arch/arm/mach-rmobile/Kconfig	/^config RCAR_32$/;"	c	choice:choice886758210104
CONFIG_RCAR_32_MODULE	arch/arm/mach-rmobile/Kconfig	/^config RCAR_32$/;"	c	choice:choice886758210104
CONFIG_RCAR_BOARD_STRING	include/configs/salvator-x.h	/^#define CONFIG_RCAR_BOARD_STRING /;"	d
CONFIG_RCAR_GEN3	arch/arm/mach-rmobile/Kconfig	/^config RCAR_GEN3$/;"	c	choice:choice886758210104
CONFIG_RCAR_GEN3_EXTRAM_BOOT	arch/arm/mach-rmobile/Kconfig.64	/^config RCAR_GEN3_EXTRAM_BOOT$/;"	c
CONFIG_RCAR_GEN3_EXTRAM_BOOT_MODULE	arch/arm/mach-rmobile/Kconfig.64	/^config RCAR_GEN3_EXTRAM_BOOT$/;"	c
CONFIG_RCAR_GEN3_MODULE	arch/arm/mach-rmobile/Kconfig	/^config RCAR_GEN3$/;"	c	choice:choice886758210104
CONFIG_RCBA_BASE	arch/x86/cpu/quark/Kconfig	/^config RCBA_BASE$/;"	c
CONFIG_RCBA_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config RCBA_BASE$/;"	c
CONFIG_RD_LVL	include/configs/exynos5-common.h	/^#define CONFIG_RD_LVL$/;"	d
CONFIG_RED_LED	include/configs/at91sam9260ek.h	/^#define	CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/at91sam9261ek.h	/^#define	CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/at91sam9263ek.h	/^#define	CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/at91sam9m10g45ek.h	/^#define	CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/at91sam9rlek.h	/^#define	CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/corvus.h	/^#define CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/pm9261.h	/^#define CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/pm9263.h	/^#define CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/pm9g45.h	/^#define CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/smartweb.h	/^#define CONFIG_RED_LED	/;"	d
CONFIG_RED_LED	include/configs/stm32f429-discovery.h	/^#define CONFIG_RED_LED	/;"	d
CONFIG_REG	drivers/net/smc91111.h	/^#define CONFIG_REG	/;"	d
CONFIG_REGEX	include/config/auto.conf	/^CONFIG_REGEX=y$/;"	k
CONFIG_REGEX	include/generated/autoconf.h	/^#define CONFIG_REGEX /;"	d
CONFIG_REGEX	lib/Kconfig	/^config REGEX$/;"	c	menu:Library routines
CONFIG_REGEX_MODULE	lib/Kconfig	/^config REGEX$/;"	c	menu:Library routines
CONFIG_REGMAP	drivers/core/Kconfig	/^config REGMAP$/;"	c	menu:Generic Driver Options
CONFIG_REGMAP_MODULE	drivers/core/Kconfig	/^config REGMAP$/;"	c	menu:Generic Driver Options
CONFIG_REGULATOR_ACT8846	drivers/power/regulator/Kconfig	/^config REGULATOR_ACT8846$/;"	c
CONFIG_REGULATOR_ACT8846_MODULE	drivers/power/regulator/Kconfig	/^config REGULATOR_ACT8846$/;"	c
CONFIG_REGULATOR_PWM	drivers/power/regulator/Kconfig	/^config REGULATOR_PWM$/;"	c
CONFIG_REGULATOR_PWM_MODULE	drivers/power/regulator/Kconfig	/^config REGULATOR_PWM$/;"	c
CONFIG_REGULATOR_RK808	drivers/power/regulator/Kconfig	/^config REGULATOR_RK808$/;"	c
CONFIG_REGULATOR_RK808_MODULE	drivers/power/regulator/Kconfig	/^config REGULATOR_RK808$/;"	c
CONFIG_REGULATOR_S5M8767	drivers/power/regulator/Kconfig	/^config REGULATOR_S5M8767$/;"	c
CONFIG_REGULATOR_S5M8767_MODULE	drivers/power/regulator/Kconfig	/^config REGULATOR_S5M8767$/;"	c
CONFIG_REGULATOR_TPS65090	drivers/power/regulator/Kconfig	/^config REGULATOR_TPS65090$/;"	c
CONFIG_REGULATOR_TPS65090_MODULE	drivers/power/regulator/Kconfig	/^config REGULATOR_TPS65090$/;"	c
CONFIG_REG_1_BASE	include/radeon.h	/^#define CONFIG_REG_1_BASE	/;"	d
CONFIG_REG_APER_SIZE	include/radeon.h	/^#define CONFIG_REG_APER_SIZE	/;"	d
CONFIG_REMAKE_ELF	include/configs/hikey.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/ls1043a_common.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/ls1046a_common.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/ls2080a_common.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/meson-gxbb-common.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/rcar-gen3-common.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/s32v234evb.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/thunderx_88xx.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/vexpress_aemv8a.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMAKE_ELF	include/configs/xilinx_zynqmp.h	/^#define CONFIG_REMAKE_ELF$/;"	d
CONFIG_REMOTEPROC	drivers/remoteproc/Kconfig	/^config REMOTEPROC$/;"	c	menu:Remote Processor drivers
CONFIG_REMOTEPROC_MODULE	drivers/remoteproc/Kconfig	/^config REMOTEPROC$/;"	c	menu:Remote Processor drivers
CONFIG_REMOTEPROC_SANDBOX	drivers/remoteproc/Kconfig	/^config REMOTEPROC_SANDBOX$/;"	c	menu:Remote Processor drivers
CONFIG_REMOTEPROC_SANDBOX_MODULE	drivers/remoteproc/Kconfig	/^config REMOTEPROC_SANDBOX$/;"	c	menu:Remote Processor drivers
CONFIG_REMOTEPROC_TI_POWER	drivers/remoteproc/Kconfig	/^config REMOTEPROC_TI_POWER$/;"	c	menu:Remote Processor drivers
CONFIG_REMOTEPROC_TI_POWER_MODULE	drivers/remoteproc/Kconfig	/^config REMOTEPROC_TI_POWER$/;"	c	menu:Remote Processor drivers
CONFIG_REQ	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define CONFIG_REQ	/;"	d
CONFIG_REQ	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	CONFIG_REQ,$/;"	e	enum:__anon957231910203	file:
CONFIG_REQUIRE_SERIAL_CONSOLE	drivers/serial/Kconfig	/^config REQUIRE_SERIAL_CONSOLE$/;"	c	menu:Serial drivers
CONFIG_REQUIRE_SERIAL_CONSOLE	include/config/auto.conf	/^CONFIG_REQUIRE_SERIAL_CONSOLE=y$/;"	k
CONFIG_REQUIRE_SERIAL_CONSOLE	include/generated/autoconf.h	/^#define CONFIG_REQUIRE_SERIAL_CONSOLE /;"	d
CONFIG_REQUIRE_SERIAL_CONSOLE_MODULE	drivers/serial/Kconfig	/^config REQUIRE_SERIAL_CONSOLE$/;"	c	menu:Serial drivers
CONFIG_RESERVED_01_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_RESERVED_01_BASE	/;"	d
CONFIG_RESERVED_02_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_RESERVED_02_BASE	/;"	d
CONFIG_RESERVED_03_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_RESERVED_03_BASE	/;"	d
CONFIG_RESERVED_04_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_RESERVED_04_BASE	/;"	d
CONFIG_RESET	board/freescale/ls1021atwr/ls1021atwr.c	/^#define CONFIG_RESET	/;"	d	file:
CONFIG_RESET_PHY_R	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/CPCI4052.h	/^#define CONFIG_RESET_PHY_R /;"	d
CONFIG_RESET_PHY_R	include/configs/MPC8560ADS.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/PLU405.h	/^#define CONFIG_RESET_PHY_R /;"	d
CONFIG_RESET_PHY_R	include/configs/PMC440.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/VOM405.h	/^#define CONFIG_RESET_PHY_R /;"	d
CONFIG_RESET_PHY_R	include/configs/at91sam9260ek.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/at91sam9261ek.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/at91sam9263ek.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/charon.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/edminiv2.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/gplugd.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/motionpro.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/nsa310s.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/o2dnt-common.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/picosam9g45.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/pm9261.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/pm9263.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/pm9g45.h	/^#define CONFIG_RESET_PHY_R	/;"	d
CONFIG_RESET_PHY_R	include/configs/snapper9260.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_PHY_R	include/configs/snapper9g45.h	/^#define CONFIG_RESET_PHY_R$/;"	d
CONFIG_RESET_SEG_SIZE	arch/x86/Kconfig	/^config RESET_SEG_SIZE$/;"	c	menu:x86 architecture
CONFIG_RESET_SEG_SIZE_MODULE	arch/x86/Kconfig	/^config RESET_SEG_SIZE$/;"	c	menu:x86 architecture
CONFIG_RESET_SEG_START	arch/x86/Kconfig	/^config RESET_SEG_START$/;"	c	menu:x86 architecture
CONFIG_RESET_SEG_START_MODULE	arch/x86/Kconfig	/^config RESET_SEG_START$/;"	c	menu:x86 architecture
CONFIG_RESET_TO_RETRY	include/configs/VCMA9.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/am335x_shc.h	/^# define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/calimain.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/eb_cpu5282.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/highbank.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/ids8313.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/siemens-am33x-common.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/smartweb.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_TO_RETRY	include/configs/smdk2410.h	/^#define CONFIG_RESET_TO_RETRY$/;"	d
CONFIG_RESET_UNIPHIER	drivers/reset/Kconfig	/^config RESET_UNIPHIER$/;"	c	menu:Reset Controller Support
CONFIG_RESET_UNIPHIER_MODULE	drivers/reset/Kconfig	/^config RESET_UNIPHIER$/;"	c	menu:Reset Controller Support
CONFIG_RESET_VECTOR_ADDRESS	include/configs/B4860QDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/B4860QDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/BSC9131RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/BSC9132QDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/C29XPCIE.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/MPC8536DS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/MPC8572DS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/P1010RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/P1022DS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/P1023RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/P2041RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/P2041RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T102xQDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T102xQDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T102xRDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T102xRDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T1040QDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T104xRDB.h	/^#define	CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T104xRDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T208xQDS.h	/^#define	CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T208xQDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T208xQDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T208xRDB.h	/^#define        CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T208xRDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T208xRDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T4240QDS.h	/^#define	CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T4240QDS.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T4240RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/T4240RDB.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/UCP1020.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/controlcenterd.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/corenet_ds.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/corenet_ds.h	/^#define CONFIG_RESET_VECTOR_ADDRESS /;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/cyrus.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/km/kmp204x-common.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/p1_twr.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VECTOR_ADDRESS	include/configs/t4qds.h	/^#define CONFIG_RESET_VECTOR_ADDRESS	/;"	d
CONFIG_RESET_VEC_LOC	arch/x86/Kconfig	/^config RESET_VEC_LOC$/;"	c	menu:x86 architecture
CONFIG_RESET_VEC_LOC_MODULE	arch/x86/Kconfig	/^config RESET_VEC_LOC$/;"	c	menu:x86 architecture
CONFIG_RES_BLOCK_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_RES_BLOCK_SIZE	/;"	d
CONFIG_REVISION_TAG	include/configs/advantech_dms-ba16.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/am3517_crane.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/am3517_evm.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/apx4devkit.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/calimain.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/cm_t35.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/cm_t3517.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/da850evm.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/devkit8000.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/exynos4-common.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/flea3.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/ge_bx50v3.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/ipam390.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/kc1.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/legoev3.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/m53evk.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mcx.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/meesc.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx35pdk.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx51evk.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx53ard.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx53evk.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx53loco.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx53smd.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/mx6_common.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/nokia_rx51.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/odroid_xu3.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_beagle.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_cairo.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_evm.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_igep00x0.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_logic.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_overo.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_pandora.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/omap3_zoom1.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/omapl138_lcdk.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/s5p_goni.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/sniper.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/stm32f429-discovery.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/stm32f746-disco.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/tam3517-common.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/tao3530.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/tricorder.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/ts4800.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_REVISION_TAG	include/configs/vexpress_common.h	/^#define CONFIG_REVISION_TAG	/;"	d
CONFIG_REVISION_TAG	include/configs/woodburn_common.h	/^#define CONFIG_REVISION_TAG$/;"	d
CONFIG_RFSPART	include/configs/advantech_dms-ba16.h	/^#define CONFIG_RFSPART /;"	d
CONFIG_RGMII	include/configs/sama5d3_xplained.h	/^#define CONFIG_RGMII$/;"	d
CONFIG_RGMII	include/configs/sama5d3xek.h	/^#define CONFIG_RGMII$/;"	d
CONFIG_RMII	include/configs/at91rm9200ek.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/at91sam9260ek.h	/^#define CONFIG_RMII	/;"	d
CONFIG_RMII	include/configs/at91sam9263ek.h	/^#define CONFIG_RMII	/;"	d
CONFIG_RMII	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/at91sam9x5ek.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/bf526-ezbrd.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/bf527-ezkit.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/bf537-pnav.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/cm-bf527.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/corvus.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/devkit3250.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/dnp5370.h	/^#define CONFIG_RMII /;"	d
CONFIG_RMII	include/configs/ethernut5.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/ma5d4evk.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/meesc.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/picosam9g45.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/pm9263.h	/^#define CONFIG_RMII	/;"	d
CONFIG_RMII	include/configs/pm9g45.h	/^#define CONFIG_RMII	/;"	d
CONFIG_RMII	include/configs/sama5d2_ptc.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/sama5d2_xplained.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/sama5d3_xplained.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/sama5d3xek.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/sama5d4_xplained.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/sama5d4ek.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/smartweb.h	/^#define CONFIG_RMII	/;"	d
CONFIG_RMII	include/configs/snapper9260.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/snapper9g45.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/taurus.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/usb_a9263.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMII	include/configs/vinco.h	/^#define CONFIG_RMII$/;"	d
CONFIG_RMOBILE_BOARD_STRING	include/configs/blanche.h	/^#define CONFIG_RMOBILE_BOARD_STRING /;"	d
CONFIG_RMOBILE_EXTRAM_BOOT	arch/arm/mach-rmobile/Kconfig.32	/^config RMOBILE_EXTRAM_BOOT$/;"	c
CONFIG_RMOBILE_EXTRAM_BOOT_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config RMOBILE_EXTRAM_BOOT$/;"	c
CONFIG_RMSTP0_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP0_ENA	/;"	d
CONFIG_RMSTP10_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP10_ENA	/;"	d
CONFIG_RMSTP11_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP11_ENA	/;"	d
CONFIG_RMSTP1_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP1_ENA	/;"	d
CONFIG_RMSTP2_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP2_ENA	/;"	d
CONFIG_RMSTP2_ENA	include/configs/blanche.h	/^#define CONFIG_RMSTP2_ENA	/;"	d
CONFIG_RMSTP3_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP3_ENA	/;"	d
CONFIG_RMSTP4_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP4_ENA	/;"	d
CONFIG_RMSTP5_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP5_ENA	/;"	d
CONFIG_RMSTP6_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP6_ENA	/;"	d
CONFIG_RMSTP7_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP7_ENA	/;"	d
CONFIG_RMSTP8_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP8_ENA	/;"	d
CONFIG_RMSTP9_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_RMSTP9_ENA	/;"	d
CONFIG_RMU_ADDR	arch/x86/cpu/quark/Kconfig	/^config RMU_ADDR$/;"	c
CONFIG_RMU_ADDR_MODULE	arch/x86/cpu/quark/Kconfig	/^config RMU_ADDR$/;"	c
CONFIG_RMU_FILE	arch/x86/cpu/quark/Kconfig	/^config RMU_FILE$/;"	c
CONFIG_RMU_FILE_MODULE	arch/x86/cpu/quark/Kconfig	/^config RMU_FILE$/;"	c
CONFIG_ROCKCHIP_CHIP_TAG	include/configs/rk3036_common.h	/^#define CONFIG_ROCKCHIP_CHIP_TAG	/;"	d
CONFIG_ROCKCHIP_DWMMC	drivers/mmc/Kconfig	/^config ROCKCHIP_DWMMC$/;"	c	menu:MMC Host controller Support
CONFIG_ROCKCHIP_DWMMC_MODULE	drivers/mmc/Kconfig	/^config ROCKCHIP_DWMMC$/;"	c	menu:MMC Host controller Support
CONFIG_ROCKCHIP_FAST_SPL	arch/arm/mach-rockchip/rk3288/Kconfig	/^config ROCKCHIP_FAST_SPL$/;"	c
CONFIG_ROCKCHIP_FAST_SPL_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config ROCKCHIP_FAST_SPL$/;"	c
CONFIG_ROCKCHIP_GPIO	drivers/gpio/Kconfig	/^config ROCKCHIP_GPIO$/;"	c	menu:GPIO Support
CONFIG_ROCKCHIP_GPIO_MODULE	drivers/gpio/Kconfig	/^config ROCKCHIP_GPIO$/;"	c	menu:GPIO Support
CONFIG_ROCKCHIP_MAX_INIT_SIZE	include/configs/rk3036_common.h	/^#define CONFIG_ROCKCHIP_MAX_INIT_SIZE	/;"	d
CONFIG_ROCKCHIP_RK3036	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3036$/;"	c
CONFIG_ROCKCHIP_RK3036_MODULE	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3036$/;"	c
CONFIG_ROCKCHIP_RK3036_PINCTRL	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3036_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_ROCKCHIP_RK3036_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3036_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_ROCKCHIP_RK3288	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3288$/;"	c
CONFIG_ROCKCHIP_RK3288_MODULE	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3288$/;"	c
CONFIG_ROCKCHIP_RK3288_PINCTRL	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3288_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_ROCKCHIP_RK3288_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3288_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_ROCKCHIP_RK3399	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3399$/;"	c
CONFIG_ROCKCHIP_RK3399_MODULE	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3399$/;"	c
CONFIG_ROCKCHIP_RK3399_PINCTRL	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3399_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_ROCKCHIP_RK3399_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3399_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_ROCKCHIP_SDHCI	drivers/mmc/Kconfig	/^config ROCKCHIP_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	include/configs/rk3399_common.h	/^#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	/;"	d
CONFIG_ROCKCHIP_SDHCI_MODULE	drivers/mmc/Kconfig	/^config ROCKCHIP_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_ROCKCHIP_SERIAL	drivers/serial/Kconfig	/^config ROCKCHIP_SERIAL$/;"	c	menu:Serial drivers
CONFIG_ROCKCHIP_SERIAL_MODULE	drivers/serial/Kconfig	/^config ROCKCHIP_SERIAL$/;"	c	menu:Serial drivers
CONFIG_ROCKCHIP_SPI	drivers/spi/Kconfig	/^config ROCKCHIP_SPI$/;"	c	menu:SPI Support
CONFIG_ROCKCHIP_SPI_MODULE	drivers/spi/Kconfig	/^config ROCKCHIP_SPI$/;"	c	menu:SPI Support
CONFIG_ROCKCHIP_SPL_BACK_TO_BROM	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_SPL_BACK_TO_BROM$/;"	c
CONFIG_ROCKCHIP_SPL_BACK_TO_BROM_MODULE	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_SPL_BACK_TO_BROM$/;"	c
CONFIG_ROCKCHIP_USB2_PHY	include/configs/rk3288_common.h	/^#define CONFIG_ROCKCHIP_USB2_PHY$/;"	d
CONFIG_ROM_SIZE	arch/x86/Kconfig	/^config ROM_SIZE$/;"	c	menu:x86 architecture
CONFIG_ROM_SIZE_MODULE	arch/x86/Kconfig	/^config ROM_SIZE$/;"	c	menu:x86 architecture
CONFIG_ROM_UNIFIED_SECTIONS	arch/arm/imx-common/Kconfig	/^config ROM_UNIFIED_SECTIONS$/;"	c
CONFIG_ROM_UNIFIED_SECTIONS_MODULE	arch/arm/imx-common/Kconfig	/^config ROM_UNIFIED_SECTIONS$/;"	c
CONFIG_ROOTFS_OFFSET	include/configs/apf27.h	/^#define	CONFIG_ROOTFS_OFFSET	/;"	d
CONFIG_ROOTPATH	include/configs/B4860QDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/BSC9131RDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/BSC9132QDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/C29XPCIE.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8313ERDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8323ERDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8349EMDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8349ITX.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC837XERDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8536DS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8540ADS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8541CDS.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/MPC8544DS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8548CDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8555CDS.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/MPC8560ADS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8568MDS.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/MPC8569MDS.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/MPC8572DS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8610HPCD.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/MPC8641HPCN.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/P1010RDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/P1022DS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/P2041RDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T102xQDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T102xRDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T1040QDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T104xRDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T208xQDS.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T208xRDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/T4240RDB.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/UCP1020.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/apf27.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/aria.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/bct-brettl2.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/bf537-minotaur.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/bf537-srv1.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/bfin_adi_common.h	/^#  define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/blackstamp.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/blackvme.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/controlcenterd.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/corenet_ds.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/cyrus.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/dnp5370.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/gr_ep2s60.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/gr_xc3s_1500.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/grsim.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/grsim_leon2.h	/^#define CONFIG_ROOTPATH /;"	d
CONFIG_ROOTPATH	include/configs/hrcon.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/ids8313.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/inka4x0.h	/^#define	CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/mecp5123.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/mpc5121ads.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/p1_twr.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/pm9263.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/qemu-ppce500.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/sbc8349.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/sbc8548.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/sbc8641d.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/siemens-am33x-common.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/strider.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/t4qds.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/uniphier.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/vme8349.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_ROOTPATH	include/configs/x86-common.h	/^#define CONFIG_ROOTPATH	/;"	d
CONFIG_RSA	lib/rsa/Kconfig	/^config RSA$/;"	c
CONFIG_RSA_FREESCALE_EXP	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_RSA_FREESCALE_EXP$/;"	d
CONFIG_RSA_FREESCALE_EXP	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_RSA_FREESCALE_EXP$/;"	d
CONFIG_RSA_FREESCALE_EXP	lib/rsa/Kconfig	/^config RSA_FREESCALE_EXP$/;"	c
CONFIG_RSA_FREESCALE_EXP_MODULE	lib/rsa/Kconfig	/^config RSA_FREESCALE_EXP$/;"	c
CONFIG_RSA_MODULE	lib/rsa/Kconfig	/^config RSA$/;"	c
CONFIG_RSA_SOFTWARE_EXP	lib/rsa/Kconfig	/^config RSA_SOFTWARE_EXP$/;"	c
CONFIG_RSA_SOFTWARE_EXP_MODULE	lib/rsa/Kconfig	/^config RSA_SOFTWARE_EXP$/;"	c
CONFIG_RSK7203	include/configs/rsk7203.h	/^#define CONFIG_RSK7203	/;"	d
CONFIG_RSK7264	include/configs/rsk7264.h	/^#define CONFIG_RSK7264	/;"	d
CONFIG_RSK7269	include/configs/rsk7269.h	/^#define CONFIG_RSK7269	/;"	d
CONFIG_RTC_BFIN	include/configs/bf518f-ezbrd.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf526-ezbrd.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf527-ezkit.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf533-ezkit.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf533-stamp.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf537-minotaur.h	/^#define CONFIG_RTC_BFIN	/;"	d
CONFIG_RTC_BFIN	include/configs/bf537-pnav.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf537-srv1.h	/^#define CONFIG_RTC_BFIN	/;"	d
CONFIG_RTC_BFIN	include/configs/bf537-stamp.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf538f-ezkit.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/bf548-ezkit.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/blackstamp.h	/^#define CONFIG_RTC_BFIN	/;"	d
CONFIG_RTC_BFIN	include/configs/br4.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/cm-bf527.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/cm-bf537e.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/cm-bf537u.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/cm-bf548.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/dnp5370.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/pr1.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/tcm-bf518.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_BFIN	include/configs/tcm-bf537.h	/^#define CONFIG_RTC_BFIN$/;"	d
CONFIG_RTC_DS1307	include/configs/tbs2910.h	/^#define CONFIG_RTC_DS1307$/;"	d
CONFIG_RTC_DS1337	include/configs/MPC8308RDB.h	/^#define CONFIG_RTC_DS1337	/;"	d
CONFIG_RTC_DS1337	include/configs/MPC8313ERDB.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/MPC8315ERDB.h	/^#define CONFIG_RTC_DS1337	/;"	d
CONFIG_RTC_DS1337	include/configs/MPC8349ITX.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/T102xRDB.h	/^#define CONFIG_RTC_DS1337	/;"	d
CONFIG_RTC_DS1337	include/configs/T104xRDB.h	/^#define CONFIG_RTC_DS1337 /;"	d
CONFIG_RTC_DS1337	include/configs/TQM834x.h	/^#define CONFIG_RTC_DS1337	/;"	d
CONFIG_RTC_DS1337	include/configs/TQM885D.h	/^# define CONFIG_RTC_DS1337 /;"	d
CONFIG_RTC_DS1337	include/configs/UCP1020.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/bf561-acvilon.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/digsy_mtc.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/intip.h	/^#define CONFIG_RTC_DS1337	/;"	d
CONFIG_RTC_DS1337	include/configs/mcx.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/motionpro.h	/^#define CONFIG_RTC_DS1337	/;"	d
CONFIG_RTC_DS1337	include/configs/neo.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1337	include/configs/tqma6_wru4.h	/^#define CONFIG_RTC_DS1337$/;"	d
CONFIG_RTC_DS1338	include/configs/eb_cpu5282.h	/^#define CONFIG_RTC_DS1338$/;"	d
CONFIG_RTC_DS1338	include/configs/kilauea.h	/^#define CONFIG_RTC_DS1338	/;"	d
CONFIG_RTC_DS1374	include/configs/MPC832XEMDS.h	/^#define CONFIG_RTC_DS1374	/;"	d
CONFIG_RTC_DS1374	include/configs/MPC8349EMDS.h	/^#define CONFIG_RTC_DS1374	/;"	d
CONFIG_RTC_DS1374	include/configs/MPC837XEMDS.h	/^#define CONFIG_RTC_DS1374	/;"	d
CONFIG_RTC_DS1374	include/configs/MPC837XERDB.h	/^#define CONFIG_RTC_DS1374	/;"	d
CONFIG_RTC_DS1374	include/configs/apf27.h	/^#define CONFIG_RTC_DS1374$/;"	d
CONFIG_RTC_DS1374	include/configs/work_92105.h	/^#define CONFIG_RTC_DS1374$/;"	d
CONFIG_RTC_DS1556	include/configs/bamboo.h	/^#define CONFIG_RTC_DS1556	/;"	d
CONFIG_RTC_DS174x	include/configs/bubinga.h	/^#define CONFIG_RTC_DS174x	/;"	d
CONFIG_RTC_DS174x	include/configs/walnut.h	/^#define CONFIG_RTC_DS174x	/;"	d
CONFIG_RTC_DS3231	include/configs/B4860QDS.h	/^#define CONFIG_RTC_DS3231 /;"	d
CONFIG_RTC_DS3231	include/configs/BSC9132QDS.h	/^#define CONFIG_RTC_DS3231$/;"	d
CONFIG_RTC_DS3231	include/configs/T102xQDS.h	/^#define CONFIG_RTC_DS3231	/;"	d
CONFIG_RTC_DS3231	include/configs/T1040QDS.h	/^#define CONFIG_RTC_DS3231 /;"	d
CONFIG_RTC_DS3231	include/configs/ls2080aqds.h	/^#define CONFIG_RTC_DS3231 /;"	d
CONFIG_RTC_DS3231	include/configs/ls2080ardb.h	/^#define CONFIG_RTC_DS3231 /;"	d
CONFIG_RTC_FTRTC010	include/configs/adp-ag101p.h	/^#define CONFIG_RTC_FTRTC010$/;"	d
CONFIG_RTC_IMXDI	include/configs/mx25pdk.h	/^#define CONFIG_RTC_IMXDI$/;"	d
CONFIG_RTC_INTERNAL	include/configs/m28evk.h	/^#define CONFIG_RTC_INTERNAL$/;"	d
CONFIG_RTC_M41T11	include/configs/TQM5200.h	/^# define CONFIG_RTC_M41T11 /;"	d
CONFIG_RTC_M41T11	include/configs/aristainetos-common.h	/^#define CONFIG_RTC_M41T11$/;"	d
CONFIG_RTC_M41T11	include/configs/icon.h	/^#define CONFIG_RTC_M41T11$/;"	d
CONFIG_RTC_M41T11	include/configs/katmai.h	/^#define CONFIG_RTC_M41T11	/;"	d
CONFIG_RTC_M41T11	include/configs/xpedite1000.h	/^#define CONFIG_RTC_M41T11	/;"	d
CONFIG_RTC_M41T11	include/configs/xpedite517x.h	/^#define CONFIG_RTC_M41T11	/;"	d
CONFIG_RTC_M41T11	include/configs/xpedite520x.h	/^#define CONFIG_RTC_M41T11	/;"	d
CONFIG_RTC_M41T11	include/configs/xpedite537x.h	/^#define CONFIG_RTC_M41T11	/;"	d
CONFIG_RTC_M41T11	include/configs/xpedite550x.h	/^#define CONFIG_RTC_M41T11	/;"	d
CONFIG_RTC_M41T62	include/configs/canyonlands.h	/^#define CONFIG_RTC_M41T62$/;"	d
CONFIG_RTC_M41T62	include/configs/m28evk.h	/^#define CONFIG_RTC_M41T62$/;"	d
CONFIG_RTC_M41T62	include/configs/m53evk.h	/^#define CONFIG_RTC_M41T62$/;"	d
CONFIG_RTC_M41T62	include/configs/mpc5121ads.h	/^#define CONFIG_RTC_M41T62	/;"	d
CONFIG_RTC_M41T62	include/configs/pcm052.h	/^#define CONFIG_RTC_M41T62$/;"	d
CONFIG_RTC_M41T62	include/configs/pdm360ng.h	/^#define CONFIG_RTC_M41T62	/;"	d
CONFIG_RTC_M41T62	include/configs/x600.h	/^#define CONFIG_RTC_M41T62	/;"	d
CONFIG_RTC_M48T35A	include/configs/CPCI4052.h	/^#define CONFIG_RTC_M48T35A	/;"	d
CONFIG_RTC_MC13XXX	include/configs/mx31ads.h	/^#define CONFIG_RTC_MC13XXX$/;"	d
CONFIG_RTC_MC13XXX	include/configs/mx31pdk.h	/^#define CONFIG_RTC_MC13XXX$/;"	d
CONFIG_RTC_MC13XXX	include/configs/mx35pdk.h	/^#define CONFIG_RTC_MC13XXX$/;"	d
CONFIG_RTC_MC13XXX	include/configs/mx51evk.h	/^#define CONFIG_RTC_MC13XXX$/;"	d
CONFIG_RTC_MC13XXX	include/configs/mx53evk.h	/^#define CONFIG_RTC_MC13XXX$/;"	d
CONFIG_RTC_MC13XXX	include/configs/woodburn_common.h	/^#define CONFIG_RTC_MC13XXX$/;"	d
CONFIG_RTC_MC146818	include/configs/MIP405.h	/^#define CONFIG_RTC_MC146818$/;"	d
CONFIG_RTC_MC146818	include/configs/PIP405.h	/^#define CONFIG_RTC_MC146818$/;"	d
CONFIG_RTC_MC146818	include/configs/PLU405.h	/^#define CONFIG_RTC_MC146818	/;"	d
CONFIG_RTC_MC146818	include/configs/malta.h	/^#define CONFIG_RTC_MC146818$/;"	d
CONFIG_RTC_MC146818	include/configs/x86-common.h	/^#define CONFIG_RTC_MC146818$/;"	d
CONFIG_RTC_MCFRRTC	include/configs/M54418TWR.h	/^#define CONFIG_RTC_MCFRRTC$/;"	d
CONFIG_RTC_MCP79411	include/configs/cyrus.h	/^#define CONFIG_RTC_MCP79411	/;"	d
CONFIG_RTC_MPC5200	include/configs/TQM5200.h	/^# define CONFIG_RTC_MPC5200	/;"	d
CONFIG_RTC_MPC5200	include/configs/canmb.h	/^#define CONFIG_RTC_MPC5200	/;"	d
CONFIG_RTC_MPC5200	include/configs/cm5200.h	/^#define CONFIG_RTC_MPC5200	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM823L.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM823M.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM850L.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM850M.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM855L.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM855M.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM860L.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM860M.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM862L.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MPC8xx	include/configs/TQM862M.h	/^#define	CONFIG_RTC_MPC8xx	/;"	d
CONFIG_RTC_MV	include/configs/dns325.h	/^#define CONFIG_RTC_MV$/;"	d
CONFIG_RTC_MV	include/configs/goflexhome.h	/^#define CONFIG_RTC_MV$/;"	d
CONFIG_RTC_MV	include/configs/ib62x0.h	/^#define CONFIG_RTC_MV$/;"	d
CONFIG_RTC_MV	include/configs/mv-plug-common.h	/^#define CONFIG_RTC_MV$/;"	d
CONFIG_RTC_MV	include/configs/nas220.h	/^#define CONFIG_RTC_MV$/;"	d
CONFIG_RTC_MV	include/configs/nsa310s.h	/^#define CONFIG_RTC_MV$/;"	d
CONFIG_RTC_MXS	include/configs/m28evk.h	/^#define CONFIG_RTC_MXS$/;"	d
CONFIG_RTC_MXS	include/configs/mx28evk.h	/^#define	CONFIG_RTC_MXS$/;"	d
CONFIG_RTC_PCF8563	include/configs/apx4devkit.h	/^#define CONFIG_RTC_PCF8563$/;"	d
CONFIG_RTC_PCF8563	include/configs/ethernut5.h	/^#define CONFIG_RTC_PCF8563$/;"	d
CONFIG_RTC_PCF8563	include/configs/ids8313.h	/^#define CONFIG_RTC_PCF8563$/;"	d
CONFIG_RTC_PCF8563	include/configs/ipek01.h	/^#define CONFIG_RTC_PCF8563$/;"	d
CONFIG_RTC_PCF8563	include/configs/ls1012aqds.h	/^#define CONFIG_RTC_PCF8563 /;"	d
CONFIG_RTC_PCF8563	include/configs/lwmon5.h	/^#define CONFIG_RTC_PCF8563	/;"	d
CONFIG_RTC_PCF8563	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_RTC_PCF8563$/;"	d
CONFIG_RTC_PCF8563	include/configs/pcm030.h	/^#define CONFIG_RTC_PCF8563	/;"	d
CONFIG_RTC_PCF8563	include/configs/v38b.h	/^#define CONFIG_RTC_PCF8563	/;"	d
CONFIG_RTC_PT7C4338	include/configs/P1010RDB.h	/^#define CONFIG_RTC_PT7C4338$/;"	d
CONFIG_RTC_PT7C4338	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_RTC_PT7C4338$/;"	d
CONFIG_RTC_RTC4543	include/configs/inka4x0.h	/^#define CONFIG_RTC_RTC4543 /;"	d
CONFIG_RTC_RV3029	include/configs/digsy_mtc.h	/^#define CONFIG_RTC_RV3029$/;"	d
CONFIG_RTC_RX8025	include/configs/PMC405DE.h	/^#define CONFIG_RTC_RX8025$/;"	d
CONFIG_RTC_RX8025	include/configs/PMC440.h	/^#define CONFIG_RTC_RX8025$/;"	d
CONFIG_RTC_RX8025	include/configs/mecp5123.h	/^#define CONFIG_RTC_RX8025$/;"	d
CONFIG_RTC_RX8025	include/configs/socrates.h	/^#define CONFIG_RTC_RX8025	/;"	d
CONFIG_RTC_RX8025	include/configs/vme8349.h	/^#define CONFIG_RTC_RX8025$/;"	d
CONFIG_RTC_S3C24X0	include/configs/VCMA9.h	/^#define CONFIG_RTC_S3C24X0$/;"	d
CONFIG_RTC_S3C24X0	include/configs/smdk2410.h	/^#define CONFIG_RTC_S3C24X0$/;"	d
CONFIG_RTC_X1205	include/configs/makalu.h	/^#define CONFIG_RTC_X1205	/;"	d
CONFIG_RTL8139	drivers/net/Kconfig	/^config RTL8139$/;"	c
CONFIG_RTL8139_MODULE	drivers/net/Kconfig	/^config RTL8139$/;"	c
CONFIG_RTL8169	drivers/net/Kconfig	/^config RTL8169$/;"	c
CONFIG_RTL8169_MODULE	drivers/net/Kconfig	/^config RTL8169$/;"	c
CONFIG_RTL8211X_PHY_FORCE_MASTER	drivers/net/Kconfig	/^config RTL8211X_PHY_FORCE_MASTER$/;"	c
CONFIG_RTL8211X_PHY_FORCE_MASTER_MODULE	drivers/net/Kconfig	/^config RTL8211X_PHY_FORCE_MASTER$/;"	c
CONFIG_RUN_FROM_DDR1	include/configs/s32v234evb.h	/^#define CONFIG_RUN_FROM_DDR1$/;"	d
CONFIG_RX_DESCR_NUM	drivers/net/ag7xxx.c	/^#define CONFIG_RX_DESCR_NUM	/;"	d	file:
CONFIG_RX_DESCR_NUM	drivers/net/designware.h	/^#define CONFIG_RX_DESCR_NUM	/;"	d
CONFIG_RX_DESCR_NUM	drivers/net/sun8i_emac.c	/^#define CONFIG_RX_DESCR_NUM	/;"	d	file:
CONFIG_R_I2C_ENABLE	board/sunxi/Kconfig	/^config R_I2C_ENABLE$/;"	c
CONFIG_R_I2C_ENABLE_MODULE	board/sunxi/Kconfig	/^config R_I2C_ENABLE$/;"	c
CONFIG_S32V234	include/configs/s32v234evb.h	/^#define CONFIG_S32V234$/;"	d
CONFIG_S3C2410	include/configs/VCMA9.h	/^#define CONFIG_S3C2410	/;"	d
CONFIG_S3C2410	include/configs/smdk2410.h	/^#define CONFIG_S3C2410	/;"	d
CONFIG_S3C24X0	include/configs/VCMA9.h	/^#define CONFIG_S3C24X0	/;"	d
CONFIG_S3C24X0	include/configs/smdk2410.h	/^#define CONFIG_S3C24X0	/;"	d
CONFIG_S3C24X0_SERIAL	include/configs/VCMA9.h	/^#define CONFIG_S3C24X0_SERIAL$/;"	d
CONFIG_S3C24X0_SERIAL	include/configs/smdk2410.h	/^#define CONFIG_S3C24X0_SERIAL$/;"	d
CONFIG_S3C24XX_CUSTOM_NAND_TIMING	include/configs/VCMA9.h	/^#define CONFIG_S3C24XX_CUSTOM_NAND_TIMING$/;"	d
CONFIG_S3C24XX_TACLS	include/configs/VCMA9.h	/^#define CONFIG_S3C24XX_TACLS	/;"	d
CONFIG_S3C24XX_TWRPH0	include/configs/VCMA9.h	/^#define CONFIG_S3C24XX_TWRPH0	/;"	d
CONFIG_S3C24XX_TWRPH1	include/configs/VCMA9.h	/^#define CONFIG_S3C24XX_TWRPH1	/;"	d
CONFIG_S3D2_CLK_FREQ	include/configs/salvator-x.h	/^#define CONFIG_S3D2_CLK_FREQ	/;"	d
CONFIG_S5P	include/configs/exynos-common.h	/^#define CONFIG_S5P	/;"	d
CONFIG_S5P	include/configs/exynos7420-common.h	/^#define CONFIG_S5P$/;"	d
CONFIG_S5P	include/configs/s5p_goni.h	/^#define CONFIG_S5P	/;"	d
CONFIG_S5P	include/configs/smdkc100.h	/^#define CONFIG_S5P	/;"	d
CONFIG_S5PC100	include/configs/smdkc100.h	/^#define CONFIG_S5PC100	/;"	d
CONFIG_S5PC110	include/configs/s5p_goni.h	/^#define CONFIG_S5PC110	/;"	d
CONFIG_S5P_PA_SYSRAM	include/configs/arndale.h	/^#define CONFIG_S5P_PA_SYSRAM	/;"	d
CONFIG_S5P_SDHCI	include/configs/exynos-common.h	/^#define CONFIG_S5P_SDHCI$/;"	d
CONFIG_S5P_SDHCI	include/configs/s5p_goni.h	/^#define CONFIG_S5P_SDHCI$/;"	d
CONFIG_S6E63D6	include/configs/imx31_phycore.h	/^#define CONFIG_S6E63D6$/;"	d
CONFIG_SAMA5D3_LCD_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SAMA5D3_LCD_BASE	/;"	d
CONFIG_SAMSUNG	include/configs/exynos-common.h	/^#define CONFIG_SAMSUNG	/;"	d
CONFIG_SAMSUNG	include/configs/exynos7420-common.h	/^#define CONFIG_SAMSUNG	/;"	d
CONFIG_SAMSUNG	include/configs/s5p_goni.h	/^#define CONFIG_SAMSUNG	/;"	d
CONFIG_SAMSUNG	include/configs/smdkc100.h	/^#define CONFIG_SAMSUNG	/;"	d
CONFIG_SAMSUNG_ONENAND	include/configs/s5p_goni.h	/^#define CONFIG_SAMSUNG_ONENAND	/;"	d
CONFIG_SAMSUNG_ONENAND	include/configs/s5pc210_universal.h	/^#define CONFIG_SAMSUNG_ONENAND$/;"	d
CONFIG_SAMSUNG_ONENAND	include/configs/smdkc100.h	/^#define CONFIG_SAMSUNG_ONENAND	/;"	d
CONFIG_SANDBOX	arch/Kconfig	/^config SANDBOX$/;"	c	choice:choice07312ef30104
CONFIG_SANDBOX_ARCH	arch/sandbox/include/asm/config.h	/^#define CONFIG_SANDBOX_ARCH$/;"	d
CONFIG_SANDBOX_BITS_PER_LONG	include/configs/sandbox.h	/^#define CONFIG_SANDBOX_BITS_PER_LONG	/;"	d
CONFIG_SANDBOX_GPIO	drivers/gpio/Kconfig	/^config SANDBOX_GPIO$/;"	c	menu:GPIO Support
CONFIG_SANDBOX_GPIO_COUNT	drivers/gpio/Kconfig	/^config SANDBOX_GPIO_COUNT$/;"	c	menu:GPIO Support
CONFIG_SANDBOX_GPIO_COUNT_MODULE	drivers/gpio/Kconfig	/^config SANDBOX_GPIO_COUNT$/;"	c	menu:GPIO Support
CONFIG_SANDBOX_GPIO_MODULE	drivers/gpio/Kconfig	/^config SANDBOX_GPIO$/;"	c	menu:GPIO Support
CONFIG_SANDBOX_MBOX	drivers/mailbox/Kconfig	/^config SANDBOX_MBOX$/;"	c	menu:Mailbox Controller Support
CONFIG_SANDBOX_MBOX_MODULE	drivers/mailbox/Kconfig	/^config SANDBOX_MBOX$/;"	c	menu:Mailbox Controller Support
CONFIG_SANDBOX_MMC	drivers/mmc/Kconfig	/^config SANDBOX_MMC$/;"	c	menu:MMC Host controller Support
CONFIG_SANDBOX_MMC_MODULE	drivers/mmc/Kconfig	/^config SANDBOX_MMC$/;"	c	menu:MMC Host controller Support
CONFIG_SANDBOX_MODULE	arch/Kconfig	/^config SANDBOX$/;"	c	choice:choice07312ef30104
CONFIG_SANDBOX_POWER_DOMAIN	drivers/power/domain/Kconfig	/^config SANDBOX_POWER_DOMAIN$/;"	c	menu:Power Domain Support
CONFIG_SANDBOX_POWER_DOMAIN_MODULE	drivers/power/domain/Kconfig	/^config SANDBOX_POWER_DOMAIN$/;"	c	menu:Power Domain Support
CONFIG_SANDBOX_RESET	drivers/reset/Kconfig	/^config SANDBOX_RESET$/;"	c	menu:Reset Controller Support
CONFIG_SANDBOX_RESET_MODULE	drivers/reset/Kconfig	/^config SANDBOX_RESET$/;"	c	menu:Reset Controller Support
CONFIG_SANDBOX_SDL	include/configs/sandbox.h	/^#define CONFIG_SANDBOX_SDL$/;"	d
CONFIG_SANDBOX_SERIAL	drivers/serial/Kconfig	/^config SANDBOX_SERIAL$/;"	c	menu:Serial drivers
CONFIG_SANDBOX_SERIAL_MODULE	drivers/serial/Kconfig	/^config SANDBOX_SERIAL$/;"	c	menu:Serial drivers
CONFIG_SANDBOX_SPI	drivers/spi/Kconfig	/^config SANDBOX_SPI$/;"	c	menu:SPI Support
CONFIG_SANDBOX_SPI_MAX_BUS	arch/sandbox/include/asm/config.h	/^#define CONFIG_SANDBOX_SPI_MAX_BUS /;"	d
CONFIG_SANDBOX_SPI_MAX_CS	arch/sandbox/include/asm/config.h	/^#define CONFIG_SANDBOX_SPI_MAX_CS /;"	d
CONFIG_SANDBOX_SPI_MODULE	drivers/spi/Kconfig	/^config SANDBOX_SPI$/;"	c	menu:SPI Support
CONFIG_SANDBOX_SPL	arch/sandbox/Kconfig	/^config SANDBOX_SPL$/;"	c	menu:Sandbox architecture
CONFIG_SANDBOX_SPL_MODULE	arch/sandbox/Kconfig	/^config SANDBOX_SPL$/;"	c	menu:Sandbox architecture
CONFIG_SANDBOX_TIMER	drivers/timer/Kconfig	/^config SANDBOX_TIMER$/;"	c	menu:Timer Support
CONFIG_SANDBOX_TIMER_MODULE	drivers/timer/Kconfig	/^config SANDBOX_TIMER$/;"	c	menu:Timer Support
CONFIG_SAR2_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define CONFIG_SAR2_REG	/;"	d
CONFIG_SAR_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define CONFIG_SAR_REG	/;"	d
CONFIG_SATA1	include/configs/MPC8315ERDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/MPC837XEMDS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/MPC837XERDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/MPC8536DS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/P1010RDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/P1022DS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/P2041RDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T102xQDS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T1040QDS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T104xRDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T208xQDS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T208xRDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T4240QDS.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/T4240RDB.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/controlcenterd.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/corenet_ds.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/cyrus.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA1	include/configs/t4qds.h	/^#define CONFIG_SATA1$/;"	d
CONFIG_SATA2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/MPC837XERDB.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/MPC8536DS.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/P1010RDB.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/P1022DS.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/P2041RDB.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/T1040QDS.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/T208xQDS.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/T208xRDB.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/T4240QDS.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/T4240RDB.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/controlcenterd.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/corenet_ds.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/cyrus.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA2	include/configs/t4qds.h	/^#define CONFIG_SATA2$/;"	d
CONFIG_SATA_BOOT	common/Kconfig	/^config SATA_BOOT$/;"	c	menu:Boot media
CONFIG_SATA_BOOT_MODULE	common/Kconfig	/^config SATA_BOOT$/;"	c	menu:Boot media
CONFIG_SATA_CEVA	include/configs/xilinx_zynqmp_ep.h	/^#define CONFIG_SATA_CEVA$/;"	d
CONFIG_SATA_CEVA	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_SATA_CEVA$/;"	d
CONFIG_SATA_DWC	include/configs/canyonlands.h	/^#define CONFIG_SATA_DWC$/;"	d
CONFIG_SATA_MV	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SATA_MV$/;"	d
CONFIG_SATA_MV	include/configs/theadorable.h	/^#define CONFIG_SATA_MV$/;"	d
CONFIG_SATA_SIL	include/configs/P4080DS.h	/^#define CONFIG_SATA_SIL$/;"	d
CONFIG_SATA_SIL	include/configs/UCP1020.h	/^#define CONFIG_SATA_SIL$/;"	d
CONFIG_SATA_SIL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SATA_SIL$/;"	d
CONFIG_SATA_SIL3114	include/configs/MPC8349ITX.h	/^#define CONFIG_SATA_SIL3114	/;"	d
CONFIG_SATA_SIL3114	include/configs/p1_twr.h	/^#define CONFIG_SATA_SIL3114$/;"	d
CONFIG_SATA_ULI5288	include/configs/MPC8544DS.h	/^#define CONFIG_SATA_ULI5288$/;"	d
CONFIG_SATA_ULI5288	include/configs/MPC8572DS.h	/^#define CONFIG_SATA_ULI5288$/;"	d
CONFIG_SATA_ULI5288	include/configs/MPC8610HPCD.h	/^#define CONFIG_SATA_ULI5288$/;"	d
CONFIG_SATA_ULI5288	include/configs/MPC8641HPCN.h	/^#define CONFIG_SATA_ULI5288$/;"	d
CONFIG_SATA_ULI5288	include/configs/sbc8641d.h	/^#define CONFIG_SATA_ULI5288$/;"	d
CONFIG_SBC8349	include/configs/sbc8349.h	/^#define CONFIG_SBC8349	/;"	d
CONFIG_SBC8548	include/configs/sbc8548.h	/^#define CONFIG_SBC8548	/;"	d
CONFIG_SBC8641D	include/configs/sbc8641d.h	/^#define CONFIG_SBC8641D	/;"	d
CONFIG_SCC1_ENET	include/configs/TQM855L.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC1_ENET	include/configs/TQM855M.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC1_ENET	include/configs/TQM860L.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC1_ENET	include/configs/TQM860M.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC1_ENET	include/configs/TQM862L.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC1_ENET	include/configs/TQM862M.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC1_ENET	include/configs/TQM866M.h	/^#define CONFIG_SCC1_ENET$/;"	d
CONFIG_SCC2_ENET	include/configs/TQM885D.h	/^#define CONFIG_SCC2_ENET	/;"	d
CONFIG_SCF0403_LCD	include/configs/cm_t35.h	/^#define CONFIG_SCF0403_LCD$/;"	d
CONFIG_SCF0403_LCD	include/configs/cm_t3517.h	/^#define CONFIG_SCF0403_LCD$/;"	d
CONFIG_SCIF	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SCIF	/;"	d
CONFIG_SCIF	include/configs/ecovec.h	/^#define CONFIG_SCIF	/;"	d
CONFIG_SCIF	include/configs/r0p7734.h	/^#define CONFIG_SCIF	/;"	d
CONFIG_SCIF_A	include/configs/ap325rxa.h	/^#define CONFIG_SCIF_A	/;"	d
CONFIG_SCIF_A	include/configs/armadillo-800eva.h	/^#define	CONFIG_SCIF_A$/;"	d
CONFIG_SCIF_A	include/configs/stout.h	/^#define CONFIG_SCIF_A$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/MigoR.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/alt.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/ap325rxa.h	/^#define CONFIG_SCIF_CONSOLE /;"	d
CONFIG_SCIF_CONSOLE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/armadillo-800eva.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/blanche.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/ecovec.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/espt.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/gose.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/koelsch.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/kzm9g.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/lager.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/mpr2.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/ms7720se.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/ms7722se.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/ms7750se.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/porter.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/r0p7734.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/r2dplus.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/r7780mp.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/rsk7203.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/rsk7264.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/rsk7269.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/salvator-x.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/sh7752evb.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/sh7753evb.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/sh7757lcr.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/sh7763rdp.h	/^#define CONFIG_SCIF_CONSOLE /;"	d
CONFIG_SCIF_CONSOLE	include/configs/sh7785lcr.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/shmin.h	/^#define CONFIG_SCIF_CONSOLE	/;"	d
CONFIG_SCIF_CONSOLE	include/configs/silk.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_CONSOLE	include/configs/stout.h	/^#define CONFIG_SCIF_CONSOLE$/;"	d
CONFIG_SCIF_EXT_CLOCK	include/configs/sh7785lcr.h	/^#define CONFIG_SCIF_EXT_CLOCK	/;"	d
CONFIG_SCLK0_DIV	include/configs/bf609-ezkit.h	/^#define CONFIG_SCLK0_DIV	/;"	d
CONFIG_SCLK1_DIV	include/configs/bf609-ezkit.h	/^#define CONFIG_SCLK1_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bct-brettl2.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf506f-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf525-ucr2.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf526-ezbrd.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf527-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf527-sdp.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf533-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf533-stamp.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf537-minotaur.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf537-pnav.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf537-srv1.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf537-stamp.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf538f-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf548-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf561-acvilon.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf561-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/bf609-ezkit.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/blackstamp.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/blackvme.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/br4.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/cm-bf527.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/cm-bf533.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/cm-bf537e.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/cm-bf537u.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/cm-bf548.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/cm-bf561.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/dnp5370.h	/^#define CONFIG_SCLK_DIV /;"	d
CONFIG_SCLK_DIV	include/configs/ibf-dsp561.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/ip04.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/pr1.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/tcm-bf518.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_DIV	include/configs/tcm-bf537.h	/^#define CONFIG_SCLK_DIV	/;"	d
CONFIG_SCLK_HZ	arch/blackfin/include/asm/config.h	/^#  define CONFIG_SCLK_HZ /;"	d
CONFIG_SCSI	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/config_cmd_all.h	/^#define CONFIG_SCSI	/;"	d
CONFIG_SCSI	include/configs/MPC8544DS.h	/^    #define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/MPC8572DS.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/MPC8610HPCD.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/MPC8641HPCN.h	/^    #define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/PIP405.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/am57xx_evm.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/cm_t54.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/db-88f6820-gp.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/dra7xx_evm.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/highbank.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls1012aqds.h	/^#define	CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls1012ardb.h	/^#define	CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls1043aqds.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls1046aqds.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls1046ardb.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls2080aqds.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/ls2080ardb.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/omap5_uevm.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/sandbox.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/sunxi-common.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/x86-common.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SCSI$/;"	d
CONFIG_SCSI_AHCI	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/MPC8544DS.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/MPC8572DS.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/MPC8610HPCD.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/MPC8641HPCN.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/am57xx_evm.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/cm_t54.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/db-88f6820-gp.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/dra7xx_evm.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/highbank.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls1012aqds.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls1012ardb.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls1043aqds.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls1043ardb.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls1046aqds.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls1046ardb.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls2080aqds.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/ls2080ardb.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/omap5_uevm.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/sunxi-common.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/x86-common.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SCSI_AHCI$/;"	d
CONFIG_SCSI_AHCI_PLAT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/am57xx_evm.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/cm_t54.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/db-88f6820-gp.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/dra7xx_evm.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/highbank.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls1012aqds.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls1012ardb.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls1043aqds.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls1046aqds.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls1046ardb.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls2080aqds.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/ls2080ardb.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/omap5_uevm.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/sandbox.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/sunxi-common.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_AHCI_PLAT	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SCSI_AHCI_PLAT$/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/bayleybay.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/cougarcanyon2.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/crownbay.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/dfi-bt700.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/ls1043ardb.h	/^#define CONFIG_SCSI_DEV_LIST /;"	d
CONFIG_SCSI_DEV_LIST	include/configs/minnowmax.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/qemu-x86.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/som-6896.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/som-db5800-som-6867.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_DEV_LIST	include/configs/x86-chromebook.h	/^#define CONFIG_SCSI_DEV_LIST	/;"	d
CONFIG_SCSI_SYM53C8XX	include/configs/PIP405.h	/^#define CONFIG_SCSI_SYM53C8XX$/;"	d
CONFIG_SC_TIMER_CLK	include/configs/mx7_common.h	/^#define CONFIG_SC_TIMER_CLK /;"	d
CONFIG_SDCARD	include/configs/cyrus.h	/^#define CONFIG_SDCARD$/;"	d
CONFIG_SDHCI	include/configs/bayleybay.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/bcm23550_w1d.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/bcm28155_ap.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/clearfog.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/crownbay.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/db-88f6820-gp.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/dfi-bt700.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/dragonboard410c.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/exynos-common.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/galileo.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/minnowmax.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/pic32mzdask.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/rk3399_common.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/rpi.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/s5p_goni.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/sama5d2_xplained.h	/^#define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SDHCI$/;"	d
CONFIG_SDHCI	include/configs/zynq-common.h	/^# define CONFIG_SDHCI$/;"	d
CONFIG_SDRAM_BANK0	include/configs/CPCI2DP.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/CPCI4052.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/PLU405.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/PMC405DE.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/VOM405.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/dlvision-10g.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/dlvision.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/gdppc440etx.h	/^#define CONFIG_SDRAM_BANK0$/;"	d
CONFIG_SDRAM_BANK0	include/configs/io.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/iocon.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK0	include/configs/neo.h	/^#define CONFIG_SDRAM_BANK0	/;"	d
CONFIG_SDRAM_BANK1	include/configs/gdppc440etx.h	/^#define CONFIG_SDRAM_BANK1$/;"	d
CONFIG_SDRAM_OFFSET_FOR_RT	include/configs/kzm9g.h	/^#define CONFIG_SDRAM_OFFSET_FOR_RT	/;"	d
CONFIG_SDRAM_PPC4xx_DENALI_DDR2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_SDRAM_PPC4xx_DENALI_DDR2	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR	arch/powerpc/include/asm/ppc440gp.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR	arch/powerpc/include/asm/ppc440gx.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR2	arch/powerpc/include/asm/ppc405ex.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR2	arch/powerpc/include/asm/ppc440sp.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR2	arch/powerpc/include/asm/ppc440spe.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_DDR2	arch/powerpc/include/asm/ppc460sx.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_SDRAM	arch/powerpc/include/asm/ppc405ep.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/;"	d
CONFIG_SDRAM_PPC4xx_IBM_SDRAM	arch/powerpc/include/asm/ppc405gp.h	/^#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/;"	d
CONFIG_SDRC	include/configs/cm_t35.h	/^#define CONFIG_SDRC	/;"	d
CONFIG_SDRC	include/configs/nokia_rx51.h	/^#define CONFIG_SDRC	/;"	d
CONFIG_SDRC	include/configs/omap3_evm.h	/^#define CONFIG_SDRC	/;"	d
CONFIG_SDRC	include/configs/sniper.h	/^#define CONFIG_SDRC$/;"	d
CONFIG_SDRC	include/configs/tao3530.h	/^#define CONFIG_SDRC	/;"	d
CONFIG_SDRC	include/configs/ti_omap3_common.h	/^#define CONFIG_SDRC$/;"	d
CONFIG_SDRC	include/configs/tricorder.h	/^#define CONFIG_SDRC	/;"	d
CONFIG_SD_BOOT	common/Kconfig	/^config SD_BOOT$/;"	c	menu:Boot media
CONFIG_SD_BOOT_MODULE	common/Kconfig	/^config SD_BOOT$/;"	c	menu:Boot media
CONFIG_SD_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SD_MODE$/;"	c	choice:choice5ba020940104
CONFIG_SD_MODE1	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SD_MODE1$/;"	c	choice:choice5ba020940104
CONFIG_SD_MODE1_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SD_MODE1$/;"	c	choice:choice5ba020940104
CONFIG_SD_MODE_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SD_MODE$/;"	c	choice:choice5ba020940104
CONFIG_SEABIOS	arch/x86/Kconfig	/^config SEABIOS$/;"	c	menu:x86 architecture
CONFIG_SEABIOS_MODULE	arch/x86/Kconfig	/^config SEABIOS$/;"	c	menu:x86 architecture
CONFIG_SECBOOT	include/config_fsl_chain_trust.h	/^#define CONFIG_SECBOOT /;"	d
CONFIG_SECOMX6DL	board/seco/Kconfig	/^config SECOMX6DL$/;"	c	choice:choicec671bd160204
CONFIG_SECOMX6DL_MODULE	board/seco/Kconfig	/^config SECOMX6DL$/;"	c	choice:choicec671bd160204
CONFIG_SECOMX6Q	board/seco/Kconfig	/^config SECOMX6Q$/;"	c	choice:choicec671bd160204
CONFIG_SECOMX6Q_MODULE	board/seco/Kconfig	/^config SECOMX6Q$/;"	c	choice:choicec671bd160204
CONFIG_SECOMX6S	board/seco/Kconfig	/^config SECOMX6S$/;"	c	choice:choicec671bd160204
CONFIG_SECOMX6S_MODULE	board/seco/Kconfig	/^config SECOMX6S$/;"	c	choice:choicec671bd160204
CONFIG_SECOMX6_1GB	board/seco/Kconfig	/^config SECOMX6_1GB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_1GB_MODULE	board/seco/Kconfig	/^config SECOMX6_1GB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_2GB	board/seco/Kconfig	/^config SECOMX6_2GB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_2GB_MODULE	board/seco/Kconfig	/^config SECOMX6_2GB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_4GB	board/seco/Kconfig	/^config SECOMX6_4GB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_4GB_MODULE	board/seco/Kconfig	/^config SECOMX6_4GB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_512MB	board/seco/Kconfig	/^config SECOMX6_512MB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_512MB_MODULE	board/seco/Kconfig	/^config SECOMX6_512MB$/;"	c	choice:choicec671bd160304
CONFIG_SECOMX6_Q7	board/seco/Kconfig	/^config SECOMX6_Q7$/;"	c	choice:choicec671bd160104
CONFIG_SECOMX6_Q7_MODULE	board/seco/Kconfig	/^config SECOMX6_Q7$/;"	c	choice:choicec671bd160104
CONFIG_SECOMX6_UQ7	board/seco/Kconfig	/^config SECOMX6_UQ7$/;"	c	choice:choicec671bd160104
CONFIG_SECOMX6_UQ7_MODULE	board/seco/Kconfig	/^config SECOMX6_UQ7$/;"	c	choice:choicec671bd160104
CONFIG_SECOMX6_USBC	board/seco/Kconfig	/^config SECOMX6_USBC$/;"	c	choice:choicec671bd160104
CONFIG_SECOMX6_USBC_MODULE	board/seco/Kconfig	/^config SECOMX6_USBC$/;"	c	choice:choicec671bd160104
CONFIG_SECURE_BL1_ONLY	include/configs/exynos5-common.h	/^#define CONFIG_SECURE_BL1_ONLY$/;"	d
CONFIG_SECURE_BOOT	arch/arm/imx-common/Kconfig	/^config SECURE_BOOT$/;"	c
CONFIG_SECURE_BOOT_MODULE	arch/arm/imx-common/Kconfig	/^config SECURE_BOOT$/;"	c
CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ	arch/arm/cpu/armv7/omap5/fdt.c	/^#define CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ /;"	d	file:
CONFIG_SEC_DEQ_TIMEOUT	drivers/crypto/fsl/jr.h	/^#define CONFIG_SEC_DEQ_TIMEOUT	/;"	d
CONFIG_SEC_FW_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_SEC_FW_SIZE /;"	d
CONFIG_SELECTED	board/amcc/yucca/yucca.h	/^	CONFIG_SELECTED$/;"	e	enum:config_selection
CONFIG_SEMIHOSTING	arch/arm/Kconfig	/^config SEMIHOSTING$/;"	c	menu:ARM architecture
CONFIG_SEMIHOSTING_MODULE	arch/arm/Kconfig	/^config SEMIHOSTING$/;"	c	menu:ARM architecture
CONFIG_SERIAL0	include/configs/smdkc100.h	/^#define CONFIG_SERIAL0	/;"	d
CONFIG_SERIAL1	include/configs/VCMA9.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/cm_t335.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/odroid.h	/^#define CONFIG_SERIAL1$/;"	d
CONFIG_SERIAL1	include/configs/omap3_evm.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/omap3_logic.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/pengwyn.h	/^#define CONFIG_SERIAL1$/;"	d
CONFIG_SERIAL1	include/configs/pepper.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/siemens-am33x-common.h	/^#define CONFIG_SERIAL1 /;"	d
CONFIG_SERIAL1	include/configs/smdk2410.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/smdkv310.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/tam3517-common.h	/^#define CONFIG_SERIAL1	/;"	d
CONFIG_SERIAL1	include/configs/ti816x_evm.h	/^#define CONFIG_SERIAL1$/;"	d
CONFIG_SERIAL2	include/configs/odroid_xu3.h	/^#define CONFIG_SERIAL2	/;"	d
CONFIG_SERIAL2	include/configs/omap3_cairo.h	/^#define CONFIG_SERIAL2$/;"	d
CONFIG_SERIAL2	include/configs/origen.h	/^#define CONFIG_SERIAL2$/;"	d
CONFIG_SERIAL2	include/configs/s5p_goni.h	/^#define CONFIG_SERIAL2	/;"	d
CONFIG_SERIAL2	include/configs/s5pc210_universal.h	/^#define CONFIG_SERIAL2$/;"	d
CONFIG_SERIAL2	include/configs/ti816x_evm.h	/^#define CONFIG_SERIAL2$/;"	d
CONFIG_SERIAL2	include/configs/trats.h	/^#define CONFIG_SERIAL2$/;"	d
CONFIG_SERIAL2	include/configs/trats2.h	/^#define CONFIG_SERIAL2$/;"	d
CONFIG_SERIAL3	include/configs/am3517_crane.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/am3517_evm.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/cm_t35.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/cm_t3517.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/eco5pk.h	/^#define CONFIG_SERIAL3$/;"	d
CONFIG_SERIAL3	include/configs/mcx.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/nokia_rx51.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/omap3_pandora.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/peach-pi.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/peach-pit.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/smdk5420.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/ti816x_evm.h	/^#define CONFIG_SERIAL3$/;"	d
CONFIG_SERIAL3	include/configs/ti_omap3_common.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL3	include/configs/tricorder.h	/^#define CONFIG_SERIAL3	/;"	d
CONFIG_SERIAL_BOOT	include/configs/M54418TWR.h	/^#define CONFIG_SERIAL_BOOT$/;"	d
CONFIG_SERIAL_BOOT	include/configs/M54451EVB.h	/^#	define CONFIG_SERIAL_BOOT$/;"	d
CONFIG_SERIAL_BOOT	include/configs/M54455EVB.h	/^#	define CONFIG_SERIAL_BOOT$/;"	d
CONFIG_SERIAL_FLASH	include/configs/M54418TWR.h	/^#define CONFIG_SERIAL_FLASH$/;"	d
CONFIG_SERIAL_FLASH	include/configs/M54451EVB.h	/^#define CONFIG_SERIAL_FLASH$/;"	d
CONFIG_SERIAL_MULTI	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_SERIAL_MULTI$/;"	d
CONFIG_SERIAL_MULTI	include/configs/p2571.h	/^#define CONFIG_SERIAL_MULTI$/;"	d
CONFIG_SERIAL_PRESENT	drivers/serial/Kconfig	/^config SERIAL_PRESENT$/;"	c	menu:Serial drivers
CONFIG_SERIAL_PRESENT	include/config/auto.conf	/^CONFIG_SERIAL_PRESENT=y$/;"	k
CONFIG_SERIAL_PRESENT	include/generated/autoconf.h	/^#define CONFIG_SERIAL_PRESENT /;"	d
CONFIG_SERIAL_PRESENT_MODULE	drivers/serial/Kconfig	/^config SERIAL_PRESENT$/;"	c	menu:Serial drivers
CONFIG_SERIAL_TAG	include/autoconf.mk	/^CONFIG_SERIAL_TAG=y$/;"	m
CONFIG_SERIAL_TAG	include/configs/apx4devkit.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/cm_fx6.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/cm_t35.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/cm_t3517.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/gw_ventana.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/kc1.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/legoev3.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/meesc.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/sniper.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	include/configs/sunxi-common.h	/^#define CONFIG_SERIAL_TAG$/;"	d
CONFIG_SERIAL_TAG	spl/include/autoconf.mk	/^CONFIG_SERIAL_TAG=y$/;"	m
CONFIG_SERIES	board/bosch/shc/Kconfig	/^config SERIES$/;"	c	choice:choice6f6e98480204
CONFIG_SERIES_MODULE	board/bosch/shc/Kconfig	/^config SERIES$/;"	c	choice:choice6f6e98480204
CONFIG_SERVERIP	include/configs/M5208EVBE.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5235EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5272C3.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5282EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M53017EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5329EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5373EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M54418TWR.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M54451EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M54455EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5475EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/M5485EVB.h	/^#	define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MIP405.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MPC8536DS.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MPC8540ADS.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/MPC8541CDS.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/MPC8544DS.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MPC8548CDS.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MPC8555CDS.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/MPC8560ADS.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/MPC8568MDS.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/MPC8569MDS.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/MPC8572DS.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MPC8610HPCD.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/MPC8641HPCN.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/PIP405.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/UCP1020.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/VCMA9.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/bct-brettl2.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/bf537-minotaur.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/bf537-srv1.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/bfin_adi_common.h	/^#  define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/blackstamp.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/blackvme.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/colibri_imx7.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/colibri_vf.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/gr_ep2s60.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/grsim.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/grsim_leon2.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/gw_ventana.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/imx31_phycore.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/inka4x0.h	/^#define	CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/integratorcp.h	/^#define CONFIG_SERVERIP /;"	d
CONFIG_SERVERIP	include/configs/microblaze-generic.h	/^#define	CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/sbc8548.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/sbc8641d.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/smdk2410.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SERVERIP	include/configs/uniphier.h	/^#define CONFIG_SERVERIP	/;"	d
CONFIG_SETUP_INITRD_TAG	include/configs/legoev3.h	/^#define CONFIG_SETUP_INITRD_TAG$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/autoconf.mk	/^CONFIG_SETUP_MEMORY_TAGS=y$/;"	m
CONFIG_SETUP_MEMORY_TAGS	include/configs/VCMA9.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/adp-ag101p.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/am3517_crane.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/am3517_evm.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/apf27.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91rm9200ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9260ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9261ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9263ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS /;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9rlek.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/atngw100.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/atngw100mkii.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/atstk1002.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/brppt1.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/brxre1.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/calimain.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/cm_t35.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/cm_t3517.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/colibri_pxa270.h	/^#define	CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/corvus.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/da850evm.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/devkit3250.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ea20.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/edb93xx.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/edminiv2.h	/^#define CONFIG_SETUP_MEMORY_TAGS /;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ethernut5.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/exynos-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/flea3.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ge_bx50v3.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/grasshopper.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/h2200.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/imx27lite-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/imx31_phycore.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/integrator-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ipam390.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/kc1.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/km/km_arm.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/kzm9g.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/legoev3.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/m53evk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ma5d4evk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mcx.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/meesc.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mv-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS /;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx25pdk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx31ads.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx31pdk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx35pdk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx51evk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx53ard.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx53evk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx53loco.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx53smd.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mx6_common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/mxs.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/nokia_rx51.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/omap3_evm.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/omap3_logic.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/omapl138_lcdk.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/picosam9g45.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/pm9261.h	/^#define CONFIG_SETUP_MEMORY_TAGS /;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/pm9263.h	/^#define CONFIG_SETUP_MEMORY_TAGS /;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/pm9g45.h	/^#define CONFIG_SETUP_MEMORY_TAGS /;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/rcar-gen2-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/rcar-gen3-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/rpi.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/s5p_goni.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/smartweb.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/smdk2410.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/smdkc100.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/snapper9260.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/snapper9g45.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/sniper.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/spear-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/stm32f429-discovery.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/stm32f746-disco.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/sunxi-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/tam3517-common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/tao3530.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/taurus.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/tec-ng.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ti814x_evm.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ti816x_evm.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ti_armv7_common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/tricorder.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/ts4800.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/usb_a9263.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/vexpress_common.h	/^#define CONFIG_SETUP_MEMORY_TAGS	/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/woodburn_common.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/work_92105.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/x600.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/zipitz2.h	/^#define	CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	include/configs/zmx25.h	/^#define CONFIG_SETUP_MEMORY_TAGS$/;"	d
CONFIG_SETUP_MEMORY_TAGS	spl/include/autoconf.mk	/^CONFIG_SETUP_MEMORY_TAGS=y$/;"	m
CONFIG_SET_BIST	include/i8042.h	/^#define CONFIG_SET_BIST	/;"	d
CONFIG_SET_BOOTARGS	include/config_fsl_chain_trust.h	/^#define CONFIG_SET_BOOTARGS	/;"	d
CONFIG_SET_DFU_ALT_BUF_LEN	include/configs/odroid.h	/^#define CONFIG_SET_DFU_ALT_BUF_LEN	/;"	d
CONFIG_SET_DFU_ALT_BUF_LEN	include/configs/odroid_xu3.h	/^#define CONFIG_SET_DFU_ALT_BUF_LEN	/;"	d
CONFIG_SET_DFU_ALT_INFO	include/configs/odroid.h	/^#define CONFIG_SET_DFU_ALT_INFO$/;"	d
CONFIG_SET_DFU_ALT_INFO	include/configs/odroid_xu3.h	/^#define CONFIG_SET_DFU_ALT_INFO$/;"	d
CONFIG_SFIO	drivers/gpio/tegra_gpio.c	/^static const int CONFIG_SFIO = 0;$/;"	v	typeref:typename:const int	file:
CONFIG_SF_DATAFLASH	include/configs/ls1012a_common.h	/^#define CONFIG_SF_DATAFLASH$/;"	d
CONFIG_SF_DEFAULT_BUS	board/Arcturus/ucp1020/cmd_arc.c	/^#   define CONFIG_SF_DEFAULT_BUS	/;"	d	file:
CONFIG_SF_DEFAULT_BUS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/aristainetos.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/aristainetos2.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/aristainetos2b.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/bg0900.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/cgtqmx6eval.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/cm_fx6.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/db-88f6820-amc.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/el6x_common.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/embestmx6boards.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/ge_bx50v3.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/gw_ventana.h	/^  #define CONFIG_SF_DEFAULT_BUS /;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/k2g_evm.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/ls1012aqds.h	/^#define CONFIG_SF_DEFAULT_BUS /;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/ls1043a_common.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/ls1046aqds.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/m28evk.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/ma5d4evk.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/mx28evk.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/mx6sabre_common.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/mx6slevk.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/mx7dsabresd.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/nitrogen6x.h	/^#define CONFIG_SF_DEFAULT_BUS /;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/ot1200.h	/^#define CONFIG_SF_DEFAULT_BUS /;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/pcm058.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/sama5d2_xplained.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/sama5d4ek.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/taurus.h	/^#define CONFIG_SF_DEFAULT_BUS /;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/tqma6.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/configs/vinco.h	/^#define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_BUS	include/spi_flash.h	/^# define CONFIG_SF_DEFAULT_BUS	/;"	d
CONFIG_SF_DEFAULT_CS	board/Arcturus/ucp1020/cmd_arc.c	/^#   define CONFIG_SF_DEFAULT_CS	/;"	d	file:
CONFIG_SF_DEFAULT_CS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/aristainetos.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/aristainetos2.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/aristainetos2b.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/bg0900.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/cm_fx6.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/el6x_common.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/embestmx6boards.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/ge_bx50v3.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/gw_ventana.h	/^  #define CONFIG_SF_DEFAULT_CS /;"	d
CONFIG_SF_DEFAULT_CS	include/configs/k2g_evm.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/ls1012aqds.h	/^#define CONFIG_SF_DEFAULT_CS /;"	d
CONFIG_SF_DEFAULT_CS	include/configs/ls1043a_common.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/ls1046aqds.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/m28evk.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/ma5d4evk.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/microblaze-generic.h	/^# define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/mx28evk.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/mx6sabre_common.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/mx6slevk.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/mx7dsabresd.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/nitrogen6x.h	/^#define CONFIG_SF_DEFAULT_CS /;"	d
CONFIG_SF_DEFAULT_CS	include/configs/ot1200.h	/^#define CONFIG_SF_DEFAULT_CS /;"	d
CONFIG_SF_DEFAULT_CS	include/configs/pcm058.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/sama5d2_xplained.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/sama5d4ek.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/tqma6.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/configs/vinco.h	/^#define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_CS	include/spi_flash.h	/^# define CONFIG_SF_DEFAULT_CS	/;"	d
CONFIG_SF_DEFAULT_HZ	include/configs/bf525-ucr2.h	/^#define CONFIG_SF_DEFAULT_HZ	/;"	d
CONFIG_SF_DEFAULT_MODE	board/Arcturus/ucp1020/cmd_arc.c	/^#   define CONFIG_SF_DEFAULT_MODE	/;"	d	file:
CONFIG_SF_DEFAULT_MODE	include/configs/B4860QDS.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/BSC9131RDB.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/BSC9132QDS.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/C29XPCIE.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/MPC8536DS.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/P1010RDB.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/P1022DS.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/P2041RDB.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T102xQDS.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T102xRDB.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T1040QDS.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T104xRDB.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T208xQDS.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T208xRDB.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T4240QDS.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/T4240RDB.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/UCP1020.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/am43xx_evm.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/am57xx_evm.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/aristainetos-common.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/beaver.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/bg0900.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/cardhu.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/cei-tk1-som.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/cgtqmx6eval.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/clearfog.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/cm_fx6.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/controlcenterd.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/corenet_ds.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/dalmore.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/db-88f6720.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/dra7xx_evm.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/ds414.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/e2220-1170.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/el6x_common.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/embestmx6boards.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/exynos5-common.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/ge_bx50v3.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/gw_ventana.h	/^  #define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/jetson-tk1.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/km/km_arm.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/ls1012aqds.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/m28evk.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/maxbcm.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/microblaze-generic.h	/^# define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mx28evk.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mx6sabre_common.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mx6slevk.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/mx7dsabresd.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/nitrogen6x.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/nyan-big.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/ot1200.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/p2371-0000.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/p2371-2180.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/p2571.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/pcm058.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/taurus.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/tec-ng.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/theadorable.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/tqma6.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/trimslice.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/venice2.h	/^#define CONFIG_SF_DEFAULT_MODE /;"	d
CONFIG_SF_DEFAULT_MODE	include/configs/vinco.h	/^#define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_MODE	include/spi_flash.h	/^# define CONFIG_SF_DEFAULT_MODE	/;"	d
CONFIG_SF_DEFAULT_SPEED	board/Arcturus/ucp1020/cmd_arc.c	/^#   define CONFIG_SF_DEFAULT_SPEED	/;"	d	file:
CONFIG_SF_DEFAULT_SPEED	include/configs/B4860QDS.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/BSC9131RDB.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/BSC9132QDS.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/C29XPCIE.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/MPC8536DS.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/P1010RDB.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/P1022DS.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/P2041RDB.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T102xQDS.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T102xRDB.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T1040QDS.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T104xRDB.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T208xQDS.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T208xRDB.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T4240QDS.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/T4240RDB.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/UCP1020.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/am335x_evm.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/am43xx_evm.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/am57xx_evm.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/aristainetos-common.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/at91sam9n12ek.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/at91sam9x5ek.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bav335x.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/beaver.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf506f-ezkit.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf526-ezbrd.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf527-ezkit.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf527-sdp.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf537-minotaur.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf537-pnav.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf537-srv1.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf537-stamp.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf548-ezkit.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf561-acvilon.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bf609-ezkit.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/bg0900.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/blackstamp.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/blackvme.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/br4.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/brppt1.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/cardhu.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/cei-tk1-som.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/cgtqmx6eval.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/clearfog.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/cm_fx6.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/cm_t43.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/controlcenterd.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/corenet_ds.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/da850evm.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/dalmore.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/db-88f6720.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/db-88f6820-amc.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/db-88f6820-gp.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/dra7xx_evm.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ds414.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/e2220-1170.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ea20.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/el6x_common.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/embestmx6boards.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/exynos5-common.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ge_bx50v3.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/gw_ventana.h	/^  #define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ip04.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/jetson-tk1.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/km/km_arm.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/km/kmp204x-common.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/legoev3.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ls1012aqds.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/lsxl.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/m28evk.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ma5d4evk.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/maxbcm.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/microblaze-generic.h	/^# define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mx28evk.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mx6sabre_common.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mx6slevk.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/mx7dsabresd.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/nitrogen6x.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/nyan-big.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/omapl138_lcdk.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ot1200.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/p2371-0000.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/p2371-2180.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/p2571.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/pcm051.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/pcm058.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/pr1.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/rk3036_common.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/rk3288_common.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/rk3399_common.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/sama5d2_ptc.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/sama5d2_xplained.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/sama5d3xek.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/sama5d4_xplained.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/sama5d4ek.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/siemens-am33x-common.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/socfpga_common.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/socfpga_sr1500.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/taurus.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/tcm-bf518.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/tec-ng.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/theadorable.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/tqma6.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/venice2.h	/^#define CONFIG_SF_DEFAULT_SPEED /;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/vinco.h	/^#define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/configs/zynq-common.h	/^# define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SF_DEFAULT_SPEED	include/spi_flash.h	/^# define CONFIG_SF_DEFAULT_SPEED	/;"	d
CONFIG_SH	arch/Kconfig	/^config SH$/;"	c	choice:choice07312ef30104
CONFIG_SH4_PCI	include/configs/r2dplus.h	/^#define CONFIG_SH4_PCI$/;"	d
CONFIG_SH4_PCI	include/configs/r7780mp.h	/^#define CONFIG_SH4_PCI$/;"	d
CONFIG_SH4_PCI	include/configs/sh7785lcr.h	/^#define CONFIG_SH4_PCI$/;"	d
CONFIG_SH73A0	include/configs/kzm9g.h	/^#define CONFIG_SH73A0$/;"	d
CONFIG_SH7751_PCI	include/configs/r2dplus.h	/^#define CONFIG_SH7751_PCI$/;"	d
CONFIG_SH7752EVB	include/configs/sh7752evb.h	/^#define CONFIG_SH7752EVB	/;"	d
CONFIG_SH7753EVB	include/configs/sh7753evb.h	/^#define CONFIG_SH7753EVB	/;"	d
CONFIG_SH7757LCR	include/configs/sh7757lcr.h	/^#define CONFIG_SH7757LCR	/;"	d
CONFIG_SH7757LCR_DDR_ECC	include/configs/sh7757lcr.h	/^#define CONFIG_SH7757LCR_DDR_ECC	/;"	d
CONFIG_SH7763RDP	include/configs/sh7763rdp.h	/^#define CONFIG_SH7763RDP	/;"	d
CONFIG_SH7780_PCI	include/configs/r7780mp.h	/^#define CONFIG_SH7780_PCI$/;"	d
CONFIG_SH7780_PCI	include/configs/sh7785lcr.h	/^#define CONFIG_SH7780_PCI$/;"	d
CONFIG_SH7780_PCI_BAR	include/configs/r7780mp.h	/^#define CONFIG_SH7780_PCI_BAR	/;"	d
CONFIG_SH7780_PCI_BAR	include/configs/sh7785lcr.h	/^#define CONFIG_SH7780_PCI_BAR	/;"	d
CONFIG_SH7780_PCI_LAR	include/configs/r7780mp.h	/^#define CONFIG_SH7780_PCI_LAR	/;"	d
CONFIG_SH7780_PCI_LAR	include/configs/sh7785lcr.h	/^#define CONFIG_SH7780_PCI_LAR	/;"	d
CONFIG_SH7780_PCI_LSR	include/configs/r7780mp.h	/^#define CONFIG_SH7780_PCI_LSR	/;"	d
CONFIG_SH7780_PCI_LSR	include/configs/sh7785lcr.h	/^#define CONFIG_SH7780_PCI_LSR	/;"	d
CONFIG_SH7785LCR	include/configs/sh7785lcr.h	/^#define CONFIG_SH7785LCR	/;"	d
CONFIG_SHA1	include/configs/bcm_ep_board.h	/^#define CONFIG_SHA1$/;"	d
CONFIG_SHA1	include/configs/controlcenterd.h	/^#define CONFIG_SHA1$/;"	d
CONFIG_SHA1	include/configs/exynos5-common.h	/^#define CONFIG_SHA1$/;"	d
CONFIG_SHA1	include/configs/ids8313.h	/^#define CONFIG_SHA1$/;"	d
CONFIG_SHA1	include/configs/sandbox.h	/^#define CONFIG_SHA1$/;"	d
CONFIG_SHA1	include/image.h	/^#  define CONFIG_SHA1	/;"	d
CONFIG_SHA1	lib/Kconfig	/^config SHA1$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHA1_CHECK_UB_IMG	tools/Makefile	/^CONFIG_SHA1_CHECK_UB_IMG = y$/;"	m
CONFIG_SHA1_MODULE	lib/Kconfig	/^config SHA1$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHA256	include/configs/bcm_ep_board.h	/^#define CONFIG_SHA256$/;"	d
CONFIG_SHA256	include/configs/exynos5-common.h	/^#define CONFIG_SHA256$/;"	d
CONFIG_SHA256	include/configs/ids8313.h	/^#define CONFIG_SHA256$/;"	d
CONFIG_SHA256	include/configs/sandbox.h	/^#define CONFIG_SHA256$/;"	d
CONFIG_SHA256	include/image.h	/^#  define CONFIG_SHA256	/;"	d
CONFIG_SHA256	lib/Kconfig	/^config SHA256$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHA256_MODULE	lib/Kconfig	/^config SHA256$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHARP_LQ035Q7DH06	include/configs/M52277EVB.h	/^#define CONFIG_SHARP_LQ035Q7DH06$/;"	d
CONFIG_SHA_HW_ACCEL	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/B4860QDS.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/BSC9131RDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/BSC9132QDS.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/C29XPCIE.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/P1010RDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/P2041RDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T102xQDS.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T102xRDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T1040QDS.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T104xRDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T208xQDS.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T208xRDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T4240QDS.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/T4240RDB.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/corenet_ds.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/exynos5-common.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/ls1021aqds.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/ls1021atwr.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/ls1043a_common.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/ls1046a_common.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	include/configs/ls2080a_common.h	/^#define CONFIG_SHA_HW_ACCEL$/;"	d
CONFIG_SHA_HW_ACCEL	lib/Kconfig	/^config SHA_HW_ACCEL$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHA_HW_ACCEL_MODULE	lib/Kconfig	/^config SHA_HW_ACCEL$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHA_PROG_HW_ACCEL	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_SHA_PROG_HW_ACCEL$/;"	d
CONFIG_SHA_PROG_HW_ACCEL	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SHA_PROG_HW_ACCEL$/;"	d
CONFIG_SHA_PROG_HW_ACCEL	lib/Kconfig	/^config SHA_PROG_HW_ACCEL$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHA_PROG_HW_ACCEL_MODULE	lib/Kconfig	/^config SHA_PROG_HW_ACCEL$/;"	c	menu:Library routines""Hashing Support
CONFIG_SHC_EMMC	board/bosch/shc/Kconfig	/^config SHC_EMMC$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_EMMC_MODULE	board/bosch/shc/Kconfig	/^config SHC_EMMC$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_ICT	board/bosch/shc/Kconfig	/^config SHC_ICT$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_ICT_MODULE	board/bosch/shc/Kconfig	/^config SHC_ICT$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_NETBOOT	board/bosch/shc/Kconfig	/^config SHC_NETBOOT$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_NETBOOT_MODULE	board/bosch/shc/Kconfig	/^config SHC_NETBOOT$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_SDBOOT	board/bosch/shc/Kconfig	/^config SHC_SDBOOT$/;"	c	choice:choice6f6e98480104
CONFIG_SHC_SDBOOT_MODULE	board/bosch/shc/Kconfig	/^config SHC_SDBOOT$/;"	c	choice:choice6f6e98480104
CONFIG_SHEEVA_88SV131	include/configs/dreamplug.h	/^#define CONFIG_SHEEVA_88SV131	/;"	d
CONFIG_SHEEVA_88SV131	include/configs/ds109.h	/^#define CONFIG_SHEEVA_88SV131	/;"	d
CONFIG_SHEEVA_88SV131	include/configs/guruplug.h	/^#define CONFIG_SHEEVA_88SV131	/;"	d
CONFIG_SHEEVA_88SV131	include/configs/openrd.h	/^#define CONFIG_SHEEVA_88SV131	/;"	d
CONFIG_SHEEVA_88SV331xV5	include/configs/aspenite.h	/^#define CONFIG_SHEEVA_88SV331xV5	/;"	d
CONFIG_SHEEVA_88SV331xV5	include/configs/gplugd.h	/^#define CONFIG_SHEEVA_88SV331xV5	/;"	d
CONFIG_SHELL	Makefile	/^CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \\$/;"	m
CONFIG_SHMIN	include/configs/shmin.h	/^#define CONFIG_SHMIN	/;"	d
CONFIG_SHOW_ACTIVITY	include/configs/a4m072.h	/^#define CONFIG_SHOW_ACTIVITY	/;"	d
CONFIG_SHOW_BOOT_PROGRESS	include/configs/a4m072.h	/^#define CONFIG_SHOW_BOOT_PROGRESS$/;"	d
CONFIG_SHOW_BOOT_PROGRESS	include/configs/am335x_shc.h	/^#define CONFIG_SHOW_BOOT_PROGRESS$/;"	d
CONFIG_SHOW_BOOT_PROGRESS	include/configs/ipam390.h	/^#define CONFIG_SHOW_BOOT_PROGRESS$/;"	d
CONFIG_SHOW_BOOT_PROGRESS	include/configs/lsxl.h	/^#define CONFIG_SHOW_BOOT_PROGRESS$/;"	d
CONFIG_SHOW_BOOT_PROGRESS	include/configs/x86-common.h	/^#define CONFIG_SHOW_BOOT_PROGRESS$/;"	d
CONFIG_SHOW_BOOT_PROGRESS	include/configs/xtfpga.h	/^#define CONFIG_SHOW_BOOT_PROGRESS$/;"	d
CONFIG_SH_32BIT	arch/sh/Kconfig	/^config SH_32BIT$/;"	c	menu:SuperH architecture
CONFIG_SH_32BIT_MODULE	arch/sh/Kconfig	/^config SH_32BIT$/;"	c	menu:SuperH architecture
CONFIG_SH_CMT_CLK_FREQ	include/configs/rsk7203.h	/^#define CONFIG_SH_CMT_CLK_FREQ /;"	d
CONFIG_SH_CMT_CLK_FREQ	include/configs/rsk7264.h	/^#define CONFIG_SH_CMT_CLK_FREQ /;"	d
CONFIG_SH_CMT_CLK_FREQ	include/configs/rsk7269.h	/^#define CONFIG_SH_CMT_CLK_FREQ /;"	d
CONFIG_SH_ETHER	include/configs/alt.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_ETHER /;"	d
CONFIG_SH_ETHER	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/ecovec.h	/^#define CONFIG_SH_ETHER /;"	d
CONFIG_SH_ETHER	include/configs/espt.h	/^#define CONFIG_SH_ETHER /;"	d
CONFIG_SH_ETHER	include/configs/gose.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/lager.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/porter.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/r0p7734.h	/^#define CONFIG_SH_ETHER /;"	d
CONFIG_SH_ETHER	include/configs/sh7752evb.h	/^#define CONFIG_SH_ETHER	/;"	d
CONFIG_SH_ETHER	include/configs/sh7753evb.h	/^#define CONFIG_SH_ETHER	/;"	d
CONFIG_SH_ETHER	include/configs/sh7757lcr.h	/^#define CONFIG_SH_ETHER	/;"	d
CONFIG_SH_ETHER	include/configs/sh7763rdp.h	/^#define CONFIG_SH_ETHER /;"	d
CONFIG_SH_ETHER	include/configs/silk.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER	include/configs/stout.h	/^#define CONFIG_SH_ETHER$/;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	drivers/net/sh_eth.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE /;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/alt.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE /;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/gose.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE	/;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE /;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/lager.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE	/;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/porter.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE	/;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/silk.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE	/;"	d
CONFIG_SH_ETHER_ALIGNE_SIZE	include/configs/stout.h	/^#define CONFIG_SH_ETHER_ALIGNE_SIZE	/;"	d
CONFIG_SH_ETHER_BASE_ADDR	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_ETHER_BASE_ADDR	/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/alt.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/gose.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/lager.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/porter.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/silk.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_INVALIDATE	include/configs/stout.h	/^#define CONFIG_SH_ETHER_CACHE_INVALIDATE$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/alt.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/gose.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/lager.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/porter.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/sh7752evb.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK	/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/sh7753evb.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK	/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/sh7757lcr.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK	/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/silk.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_CACHE_WRITEBACK	include/configs/stout.h	/^#define CONFIG_SH_ETHER_CACHE_WRITEBACK$/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/alt.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_ETHER_PHY_ADDR /;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/ecovec.h	/^#define CONFIG_SH_ETHER_PHY_ADDR /;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/espt.h	/^#define CONFIG_SH_ETHER_PHY_ADDR /;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/gose.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/lager.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/porter.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/r0p7734.h	/^#define CONFIG_SH_ETHER_PHY_ADDR /;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/sh7752evb.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/sh7753evb.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/sh7757lcr.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/sh7763rdp.h	/^#define CONFIG_SH_ETHER_PHY_ADDR /;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/silk.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_ADDR	include/configs/stout.h	/^#define CONFIG_SH_ETHER_PHY_ADDR	/;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/alt.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/ecovec.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/espt.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/gose.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/lager.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/porter.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/r0p7734.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/sh7752evb.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/sh7753evb.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/sh7757lcr.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/sh7763rdp.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/silk.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_PHY_MODE	include/configs/stout.h	/^#define CONFIG_SH_ETHER_PHY_MODE /;"	d
CONFIG_SH_ETHER_SH7734_MII	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_ETHER_SH7734_MII /;"	d
CONFIG_SH_ETHER_SH7734_MII	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_ETHER_SH7734_MII	/;"	d
CONFIG_SH_ETHER_SH7734_MII	include/configs/r0p7734.h	/^#define CONFIG_SH_ETHER_SH7734_MII /;"	d
CONFIG_SH_ETHER_USE_GETHER	include/configs/sh7752evb.h	/^#define CONFIG_SH_ETHER_USE_GETHER	/;"	d
CONFIG_SH_ETHER_USE_GETHER	include/configs/sh7753evb.h	/^#define CONFIG_SH_ETHER_USE_GETHER	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/alt.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_ETHER_USE_PORT /;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/ecovec.h	/^#define CONFIG_SH_ETHER_USE_PORT /;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/espt.h	/^#define CONFIG_SH_ETHER_USE_PORT /;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/gose.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/koelsch.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/lager.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/porter.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/r0p7734.h	/^#define CONFIG_SH_ETHER_USE_PORT /;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/sh7752evb.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/sh7753evb.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/sh7757lcr.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/sh7763rdp.h	/^#define CONFIG_SH_ETHER_USE_PORT /;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/silk.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_ETHER_USE_PORT	include/configs/stout.h	/^#define CONFIG_SH_ETHER_USE_PORT	/;"	d
CONFIG_SH_GPIO_PFC	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_GPIO_PFC$/;"	d
CONFIG_SH_GPIO_PFC	include/configs/kzm9g.h	/^#define CONFIG_SH_GPIO_PFC$/;"	d
CONFIG_SH_GPIO_PFC	include/configs/rcar-gen2-common.h	/^#define CONFIG_SH_GPIO_PFC$/;"	d
CONFIG_SH_GPIO_PFC	include/configs/rcar-gen3-common.h	/^#define CONFIG_SH_GPIO_PFC$/;"	d
CONFIG_SH_I2C_8BIT	include/configs/kzm9g.h	/^#define CONFIG_SH_I2C_8BIT$/;"	d
CONFIG_SH_I2C_BASE0	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_I2C_BASE0	/;"	d
CONFIG_SH_I2C_BASE0	include/configs/r0p7734.h	/^#define CONFIG_SH_I2C_BASE0	/;"	d
CONFIG_SH_I2C_BASE1	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_I2C_BASE1	/;"	d
CONFIG_SH_I2C_BASE1	include/configs/r0p7734.h	/^#define CONFIG_SH_I2C_BASE1	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/alt.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/ecovec.h	/^#define CONFIG_SH_I2C_CLOCK /;"	d
CONFIG_SH_I2C_CLOCK	include/configs/gose.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/koelsch.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/kzm9g.h	/^#define CONFIG_SH_I2C_CLOCK /;"	d
CONFIG_SH_I2C_CLOCK	include/configs/porter.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/r0p7734.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_CLOCK	include/configs/silk.h	/^#define CONFIG_SH_I2C_CLOCK	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/alt.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/ecovec.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/gose.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/koelsch.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/kzm9g.h	/^#define CONFIG_SH_I2C_DATA_HIGH /;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/porter.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/r0p7734.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_HIGH	include/configs/silk.h	/^#define CONFIG_SH_I2C_DATA_HIGH	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/alt.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/ecovec.h	/^#define CONFIG_SH_I2C_DATA_LOW /;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/gose.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/koelsch.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/kzm9g.h	/^#define CONFIG_SH_I2C_DATA_LOW /;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/porter.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/r0p7734.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_I2C_DATA_LOW	include/configs/silk.h	/^#define CONFIG_SH_I2C_DATA_LOW	/;"	d
CONFIG_SH_MMCIF	include/configs/alt.h	/^#define CONFIG_SH_MMCIF$/;"	d
CONFIG_SH_MMCIF	include/configs/lager.h	/^#define CONFIG_SH_MMCIF$/;"	d
CONFIG_SH_MMCIF	include/configs/sh7752evb.h	/^#define CONFIG_SH_MMCIF	/;"	d
CONFIG_SH_MMCIF	include/configs/sh7753evb.h	/^#define CONFIG_SH_MMCIF	/;"	d
CONFIG_SH_MMCIF	include/configs/sh7757lcr.h	/^#define CONFIG_SH_MMCIF	/;"	d
CONFIG_SH_MMCIF	include/configs/silk.h	/^#define CONFIG_SH_MMCIF$/;"	d
CONFIG_SH_MMCIF_ADDR	include/configs/alt.h	/^#define CONFIG_SH_MMCIF_ADDR	/;"	d
CONFIG_SH_MMCIF_ADDR	include/configs/lager.h	/^#define CONFIG_SH_MMCIF_ADDR	/;"	d
CONFIG_SH_MMCIF_ADDR	include/configs/sh7752evb.h	/^#define CONFIG_SH_MMCIF_ADDR	/;"	d
CONFIG_SH_MMCIF_ADDR	include/configs/sh7753evb.h	/^#define CONFIG_SH_MMCIF_ADDR	/;"	d
CONFIG_SH_MMCIF_ADDR	include/configs/sh7757lcr.h	/^#define CONFIG_SH_MMCIF_ADDR	/;"	d
CONFIG_SH_MMCIF_ADDR	include/configs/silk.h	/^#define CONFIG_SH_MMCIF_ADDR	/;"	d
CONFIG_SH_MMCIF_CLK	include/configs/alt.h	/^#define CONFIG_SH_MMCIF_CLK	/;"	d
CONFIG_SH_MMCIF_CLK	include/configs/lager.h	/^#define CONFIG_SH_MMCIF_CLK	/;"	d
CONFIG_SH_MMCIF_CLK	include/configs/sh7752evb.h	/^#define CONFIG_SH_MMCIF_CLK	/;"	d
CONFIG_SH_MMCIF_CLK	include/configs/sh7753evb.h	/^#define CONFIG_SH_MMCIF_CLK	/;"	d
CONFIG_SH_MMCIF_CLK	include/configs/sh7757lcr.h	/^#define CONFIG_SH_MMCIF_CLK	/;"	d
CONFIG_SH_MMCIF_CLK	include/configs/silk.h	/^#define CONFIG_SH_MMCIF_CLK	/;"	d
CONFIG_SH_MODULE	arch/Kconfig	/^config SH$/;"	c	choice:choice07312ef30104
CONFIG_SH_QSPI	include/configs/alt.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/blanche.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/gose.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/koelsch.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/lager.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/porter.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/silk.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI	include/configs/stout.h	/^#define CONFIG_SH_QSPI$/;"	d
CONFIG_SH_QSPI_BASE	include/configs/blanche.h	/^#define CONFIG_SH_QSPI_BASE	/;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/MigoR.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/ap325rxa.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/ecovec.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/espt.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/kzm9g.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/mpr2.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/ms7720se.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/ms7722se.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/ms7750se.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/r0p7734.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/r2dplus.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/r7780mp.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/rsk7203.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/rsk7264.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/rsk7269.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/salvator-x.h	/^#define CONFIG_SH_SCIF_CLK_FREQ	/;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/sh7752evb.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/sh7753evb.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/sh7757lcr.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/sh7763rdp.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/sh7785lcr.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SCIF_CLK_FREQ	include/configs/shmin.h	/^#define CONFIG_SH_SCIF_CLK_FREQ /;"	d
CONFIG_SH_SDHI	drivers/mmc/Kconfig	/^config SH_SDHI$/;"	c	menu:MMC Host controller Support
CONFIG_SH_SDHI_FREQ	include/configs/alt.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/blanche.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/gose.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/koelsch.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/lager.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/porter.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/silk.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_FREQ	include/configs/stout.h	/^#define CONFIG_SH_SDHI_FREQ	/;"	d
CONFIG_SH_SDHI_MODULE	drivers/mmc/Kconfig	/^config SH_SDHI$/;"	c	menu:MMC Host controller Support
CONFIG_SH_SDRAM_OFFSET	include/configs/sh7785lcr.h	/^#define CONFIG_SH_SDRAM_OFFSET	/;"	d
CONFIG_SH_SH7734_I2C	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_SH7734_I2C	/;"	d
CONFIG_SH_SH7734_I2C	include/configs/r0p7734.h	/^#define CONFIG_SH_SH7734_I2C	/;"	d
CONFIG_SH_SPI	include/configs/sh7752evb.h	/^#define CONFIG_SH_SPI	/;"	d
CONFIG_SH_SPI	include/configs/sh7753evb.h	/^#define CONFIG_SH_SPI	/;"	d
CONFIG_SH_SPI	include/configs/sh7757lcr.h	/^#define CONFIG_SH_SPI	/;"	d
CONFIG_SH_SPI_BASE	include/configs/sh7752evb.h	/^#define CONFIG_SH_SPI_BASE	/;"	d
CONFIG_SH_SPI_BASE	include/configs/sh7753evb.h	/^#define CONFIG_SH_SPI_BASE	/;"	d
CONFIG_SH_SPI_BASE	include/configs/sh7757lcr.h	/^#define CONFIG_SH_SPI_BASE	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/MigoR.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/alt.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/ap325rxa.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/armadillo-800eva.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/blanche.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/ecovec.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/espt.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/gose.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/koelsch.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/lager.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/mpr2.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/ms7720se.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/ms7722se.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/ms7750se.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/porter.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/r0p7734.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/r2dplus.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/r7780mp.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/rsk7203.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/rsk7264.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/rsk7269.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/sh7752evb.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/sh7753evb.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/sh7757lcr.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/sh7763rdp.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/sh7785lcr.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/shmin.h	/^#define CONFIG_SH_TMU_CLK_FREQ /;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/silk.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SH_TMU_CLK_FREQ	include/configs/stout.h	/^#define CONFIG_SH_TMU_CLK_FREQ	/;"	d
CONFIG_SIEMENS_DRACO	include/configs/draco.h	/^#define CONFIG_SIEMENS_DRACO$/;"	d
CONFIG_SIEMENS_MACH_TYPE	include/configs/draco.h	/^#define CONFIG_SIEMENS_MACH_TYPE	/;"	d
CONFIG_SIEMENS_MACH_TYPE	include/configs/pxm2.h	/^#define CONFIG_SIEMENS_MACH_TYPE	/;"	d
CONFIG_SIEMENS_MACH_TYPE	include/configs/rut.h	/^#define CONFIG_SIEMENS_MACH_TYPE	/;"	d
CONFIG_SIEMENS_PXM2	include/configs/pxm2.h	/^#define CONFIG_SIEMENS_PXM2$/;"	d
CONFIG_SIEMENS_RUT	include/configs/rut.h	/^#define CONFIG_SIEMENS_RUT$/;"	d
CONFIG_SILENT_CONSOLE	common/Kconfig	/^config SILENT_CONSOLE$/;"	c	menu:Console
CONFIG_SILENT_CONSOLE_MODULE	common/Kconfig	/^config SILENT_CONSOLE$/;"	c	menu:Console
CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC	common/Kconfig	/^config SILENT_CONSOLE_UPDATE_ON_RELOC$/;"	c	menu:Console
CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC_MODULE	common/Kconfig	/^config SILENT_CONSOLE_UPDATE_ON_RELOC$/;"	c	menu:Console
CONFIG_SILENT_CONSOLE_UPDATE_ON_SET	common/Kconfig	/^config SILENT_CONSOLE_UPDATE_ON_SET$/;"	c	menu:Console
CONFIG_SILENT_CONSOLE_UPDATE_ON_SET_MODULE	common/Kconfig	/^config SILENT_CONSOLE_UPDATE_ON_SET$/;"	c	menu:Console
CONFIG_SILENT_U_BOOT_ONLY	common/Kconfig	/^config SILENT_U_BOOT_ONLY$/;"	c	menu:Console
CONFIG_SILENT_U_BOOT_ONLY_MODULE	common/Kconfig	/^config SILENT_U_BOOT_ONLY$/;"	c	menu:Console
CONFIG_SIMPLE_BUS	drivers/core/Kconfig	/^config SIMPLE_BUS$/;"	c	menu:Generic Driver Options
CONFIG_SIMPLE_BUS	include/config/auto.conf	/^CONFIG_SIMPLE_BUS=y$/;"	k
CONFIG_SIMPLE_BUS	include/generated/autoconf.h	/^#define CONFIG_SIMPLE_BUS /;"	d
CONFIG_SIMPLE_BUS_MODULE	drivers/core/Kconfig	/^config SIMPLE_BUS$/;"	c	menu:Generic Driver Options
CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION	include/configs/edminiv2.h	/^#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/adp-ag101p.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/am43xx_evm.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/aspenite.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91-sama5_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91rm9200ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9260ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9261ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9263ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9n12ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9rlek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/at91sam9x5ek.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/bcm23550_w1d.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/bcm28155_ap.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/bcm_ep_board.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/bur_am335x_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/cm_t43.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/colibri_vf.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/devkit3250.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/dns325.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/dockstar.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ea20.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ethernut5.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/exynos-common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/goflexhome.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/gplugd.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/highbank.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ib62x0.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/iconnect.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/km/km_arm.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/lacie_kw.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1012a_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1021aqds.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1021atwr.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1043a_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1043aqds.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1046a_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls1046aqds.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ls2080a_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/lsxl.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/meesc.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/mv-plug-common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/mx31pdk.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/nas220.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/nokia_rx51.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/nsa310s.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/omapl138_lcdk.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/openrd.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/pcm052.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/picosam9g45.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/pm9g45.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/pogo_e02.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/rk3036_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/rk3399_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/rpi.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/s32v234evb.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/siemens-am33x-common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/smdkv310.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/snapper9260.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/tegra-common-post.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ti814x_evm.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ti816x_evm.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ti_am335x_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/ts4800.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/usb_a9263.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/vct.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/vf610twr.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT	include/configs/work_92105.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT_ONLY	include/configs/corvus.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT_ONLY	include/configs/rk3288_common.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT_ONLY	include/configs/smartweb.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY	/;"	d
CONFIG_SKIP_LOWLEVEL_INIT_ONLY	include/configs/snapper9g45.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY$/;"	d
CONFIG_SKIP_LOWLEVEL_INIT_ONLY	include/configs/taurus.h	/^#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY$/;"	d
CONFIG_SLIC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SLIC$/;"	d
CONFIG_SLTTMR	include/configs/M5475EVB.h	/^#define CONFIG_SLTTMR$/;"	d
CONFIG_SLTTMR	include/configs/M5485EVB.h	/^#define CONFIG_SLTTMR$/;"	d
CONFIG_SMBIOS_MANUFACTURER	include/config/auto.conf	/^CONFIG_SMBIOS_MANUFACTURER=""$/;"	k
CONFIG_SMBIOS_MANUFACTURER	include/generated/autoconf.h	/^#define CONFIG_SMBIOS_MANUFACTURER /;"	d
CONFIG_SMBIOS_MANUFACTURER	lib/Kconfig	/^config SMBIOS_MANUFACTURER$/;"	c	menu:Library routines""System tables
CONFIG_SMBIOS_MANUFACTURER_MODULE	lib/Kconfig	/^config SMBIOS_MANUFACTURER$/;"	c	menu:Library routines""System tables
CONFIG_SMBIOS_PRODUCT_NAME	board/intel/galileo/Kconfig	/^config SMBIOS_PRODUCT_NAME$/;"	c
CONFIG_SMBIOS_PRODUCT_NAME	include/config/auto.conf	/^CONFIG_SMBIOS_PRODUCT_NAME="sunxi"$/;"	k
CONFIG_SMBIOS_PRODUCT_NAME	include/generated/autoconf.h	/^#define CONFIG_SMBIOS_PRODUCT_NAME /;"	d
CONFIG_SMBIOS_PRODUCT_NAME	lib/Kconfig	/^config SMBIOS_PRODUCT_NAME$/;"	c	menu:Library routines""System tables
CONFIG_SMBIOS_PRODUCT_NAME_MODULE	board/intel/galileo/Kconfig	/^config SMBIOS_PRODUCT_NAME$/;"	c
CONFIG_SMBIOS_PRODUCT_NAME_MODULE	lib/Kconfig	/^config SMBIOS_PRODUCT_NAME$/;"	c	menu:Library routines""System tables
CONFIG_SMC91111	include/configs/MigoR.h	/^#define CONFIG_SMC91111$/;"	d
CONFIG_SMC91111	include/configs/bf533-ezkit.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111	include/configs/bf533-stamp.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111	include/configs/bf538f-ezkit.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111	include/configs/bf561-ezkit.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111	include/configs/blackstamp.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111	include/configs/cm-bf533.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SMC91111 /;"	d
CONFIG_SMC91111	include/configs/gr_ep2s60.h	/^#define CONFIG_SMC91111 /;"	d
CONFIG_SMC91111	include/configs/integratorcp.h	/^#define CONFIG_SMC91111$/;"	d
CONFIG_SMC91111	include/configs/ls2080a_simu.h	/^#define CONFIG_SMC91111$/;"	d
CONFIG_SMC91111	include/configs/ms7722se.h	/^#define CONFIG_SMC91111$/;"	d
CONFIG_SMC91111	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SMC91111	/;"	d
CONFIG_SMC91111_BASE	include/configs/MigoR.h	/^#define CONFIG_SMC91111_BASE /;"	d
CONFIG_SMC91111_BASE	include/configs/bf533-ezkit.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/bf533-stamp.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/bf538f-ezkit.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/bf561-ezkit.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/blackstamp.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/cm-bf533.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/integratorcp.h	/^#define CONFIG_SMC91111_BASE /;"	d
CONFIG_SMC91111_BASE	include/configs/ls2080a_simu.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC91111_BASE	include/configs/ms7722se.h	/^#define CONFIG_SMC91111_BASE /;"	d
CONFIG_SMC91111_BASE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SMC91111_BASE	/;"	d
CONFIG_SMC911X	include/configs/ap325rxa.h	/^#define CONFIG_SMC911X /;"	d
CONFIG_SMC911X	include/configs/bf548-ezkit.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/bf561-acvilon.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/blanche.h	/^#define CONFIG_SMC911X /;"	d
CONFIG_SMC911X	include/configs/cm-bf537e.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/cm-bf537u.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/cm-bf548.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/cm-bf561.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/cm_t35.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/cm_t3517.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/duovero.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/exynos5-common.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/imx31_phycore.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/kzm9g.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/mx31pdk.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/mx35pdk.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/mx53ard.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/omap3_evm.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/omap3_igep00x0.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/omap3_logic.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/omap3_overo.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/omap3_zoom1.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/r0p7734.h	/^# define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/rsk7203.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/rsk7264.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/rsk7269.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/smdkc100.h	/^#define CONFIG_SMC911X /;"	d
CONFIG_SMC911X	include/configs/smdkv310.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/tcm-bf537.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/twister.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/uniphier.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/vct.h	/^#define CONFIG_SMC911X$/;"	d
CONFIG_SMC911X	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X	include/configs/vexpress_common.h	/^#define CONFIG_SMC911X	/;"	d
CONFIG_SMC911X_16_BIT	include/configs/bf548-ezkit.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/blanche.h	/^#define CONFIG_SMC911X_16_BIT /;"	d
CONFIG_SMC911X_16_BIT	include/configs/cm-bf537e.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/cm-bf537u.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/cm-bf548.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/cm-bf561.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/exynos5-common.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/mx35pdk.h	/^#define CONFIG_SMC911X_16_BIT /;"	d
CONFIG_SMC911X_16_BIT	include/configs/mx53ard.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/r0p7734.h	/^# define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/rsk7203.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/rsk7264.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/rsk7269.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/smdkc100.h	/^#define CONFIG_SMC911X_16_BIT /;"	d
CONFIG_SMC911X_16_BIT	include/configs/smdkv310.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/tcm-bf537.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_16_BIT	include/configs/twister.h	/^#define CONFIG_SMC911X_16_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/ap325rxa.h	/^#define CONFIG_SMC911X_32_BIT /;"	d
CONFIG_SMC911X_32_BIT	include/configs/bf561-acvilon.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/cm_t35.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/cm_t3517.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/duovero.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/imx31_phycore.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/kzm9g.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/mx31pdk.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/omap3_evm.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/omap3_igep00x0.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/omap3_logic.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/omap3_overo.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/omap3_zoom1.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/uniphier.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/vct.h	/^#define CONFIG_SMC911X_32_BIT$/;"	d
CONFIG_SMC911X_32_BIT	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SMC911X_32_BIT	/;"	d
CONFIG_SMC911X_32_BIT	include/configs/vexpress_common.h	/^#define CONFIG_SMC911X_32_BIT	/;"	d
CONFIG_SMC911X_BASE	include/configs/ap325rxa.h	/^#define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/bf548-ezkit.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/bf561-acvilon.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/blanche.h	/^#define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/cm-bf537e.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/cm-bf537u.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/cm-bf548.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/cm-bf561.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/cm_t35.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/cm_t3517.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/duovero.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/exynos5-common.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/imx31_phycore.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/kzm9g.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/mx31pdk.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/mx35pdk.h	/^#define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/mx53ard.h	/^#define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/omap3_logic.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/omap3_overo.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/omap3_zoom1.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/r0p7734.h	/^# define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/rsk7203.h	/^#define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/rsk7264.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/rsk7269.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/smdkc100.h	/^#define CONFIG_SMC911X_BASE /;"	d
CONFIG_SMC911X_BASE	include/configs/smdkv310.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/tcm-bf537.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/twister.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/uniphier.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/vct.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_BASE	include/configs/vexpress_common.h	/^#define CONFIG_SMC911X_BASE	/;"	d
CONFIG_SMC911X_NO_EEPROM	include/configs/twister.h	/^#define CONFIG_SMC911X_NO_EEPROM$/;"	d
CONFIG_SMC_AUTONEG_TIMEOUT	drivers/net/smc91111.c	/^#define CONFIG_SMC_AUTONEG_TIMEOUT /;"	d	file:
CONFIG_SMC_B0CTL_VAL	include/configs/bf609-ezkit.h	/^#define CONFIG_SMC_B0CTL_VAL	/;"	d
CONFIG_SMC_B0ETIM_VAL	include/configs/bf609-ezkit.h	/^#define CONFIG_SMC_B0ETIM_VAL	/;"	d
CONFIG_SMC_B0TIM_VAL	include/configs/bf609-ezkit.h	/^#define CONFIG_SMC_B0TIM_VAL	/;"	d
CONFIG_SMC_GCTL_VAL	include/configs/bf609-ezkit.h	/^#define CONFIG_SMC_GCTL_VAL	/;"	d
CONFIG_SMC_USE_32_BIT	include/configs/bf561-ezkit.h	/^#define CONFIG_SMC_USE_32_BIT	/;"	d
CONFIG_SMC_USE_32_BIT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SMC_USE_32_BIT	/;"	d
CONFIG_SMC_USE_32_BIT	include/configs/gr_ep2s60.h	/^#define CONFIG_SMC_USE_32_BIT	/;"	d
CONFIG_SMC_USE_32_BIT	include/configs/integratorcp.h	/^#define CONFIG_SMC_USE_32_BIT$/;"	d
CONFIG_SMDK2410	include/configs/smdk2410.h	/^#define CONFIG_SMDK2410	/;"	d
CONFIG_SMDK5420	include/configs/smdk5420.h	/^#define CONFIG_SMDK5420	/;"	d
CONFIG_SMDKC100	include/configs/smdkc100.h	/^#define CONFIG_SMDKC100	/;"	d
CONFIG_SMDKV310	include/configs/smdkv310.h	/^#define CONFIG_SMDKV310	/;"	d
CONFIG_SMM_TSEG	arch/x86/Kconfig	/^config SMM_TSEG$/;"	c	menu:x86 architecture
CONFIG_SMM_TSEG_MODULE	arch/x86/Kconfig	/^config SMM_TSEG$/;"	c	menu:x86 architecture
CONFIG_SMM_TSEG_SIZE	arch/x86/Kconfig	/^config SMM_TSEG_SIZE$/;"	c	menu:x86 architecture
CONFIG_SMM_TSEG_SIZE	arch/x86/cpu/broadwell/Kconfig	/^config SMM_TSEG_SIZE$/;"	c
CONFIG_SMM_TSEG_SIZE	arch/x86/cpu/ivybridge/Kconfig	/^config SMM_TSEG_SIZE$/;"	c
CONFIG_SMM_TSEG_SIZE_MODULE	arch/x86/Kconfig	/^config SMM_TSEG_SIZE$/;"	c	menu:x86 architecture
CONFIG_SMM_TSEG_SIZE_MODULE	arch/x86/cpu/broadwell/Kconfig	/^config SMM_TSEG_SIZE$/;"	c
CONFIG_SMM_TSEG_SIZE_MODULE	arch/x86/cpu/ivybridge/Kconfig	/^config SMM_TSEG_SIZE$/;"	c
CONFIG_SMP	arch/x86/Kconfig	/^config SMP$/;"	c	menu:x86 architecture
CONFIG_SMP_MODULE	arch/x86/Kconfig	/^config SMP$/;"	c	menu:x86 architecture
CONFIG_SMP_PEN_ADDR	include/configs/arndale.h	/^#define CONFIG_SMP_PEN_ADDR	/;"	d
CONFIG_SMP_PEN_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SMP_PEN_ADDR	/;"	d
CONFIG_SMP_PEN_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SMP_PEN_ADDR	/;"	d
CONFIG_SMP_PEN_ADDR	include/configs/vexpress_ca15_tc2.h	/^#define CONFIG_SMP_PEN_ADDR	/;"	d
CONFIG_SMSC_LPC47M	include/configs/crownbay.h	/^#define CONFIG_SMSC_LPC47M$/;"	d
CONFIG_SMSC_LPC47M	include/configs/minnowmax.h	/^#define CONFIG_SMSC_LPC47M$/;"	d
CONFIG_SMSC_SIO1007	include/configs/cougarcanyon2.h	/^#define CONFIG_SMSC_SIO1007$/;"	d
CONFIG_SMSTP0_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/alt.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/blanche.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/gose.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/koelsch.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/lager.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/porter.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/silk.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP0_ENA	include/configs/stout.h	/^#define CONFIG_SMSTP0_ENA	/;"	d
CONFIG_SMSTP10_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP10_ENA	/;"	d
CONFIG_SMSTP11_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP11_ENA	/;"	d
CONFIG_SMSTP1_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP1_ENA	/;"	d
CONFIG_SMSTP2_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/alt.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/gose.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/koelsch.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/lager.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/porter.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/salvator-x.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/silk.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP2_ENA	include/configs/stout.h	/^#define CONFIG_SMSTP2_ENA	/;"	d
CONFIG_SMSTP3_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP3_ENA	/;"	d
CONFIG_SMSTP3_ENA	include/configs/blanche.h	/^#define CONFIG_SMSTP3_ENA	/;"	d
CONFIG_SMSTP4_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/alt.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/blanche.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/gose.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/koelsch.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/lager.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/porter.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/salvator-x.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/silk.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP4_ENA	include/configs/stout.h	/^#define CONFIG_SMSTP4_ENA	/;"	d
CONFIG_SMSTP5_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP5_ENA	/;"	d
CONFIG_SMSTP6_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP6_ENA	/;"	d
CONFIG_SMSTP7_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/alt.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/blanche.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/gose.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/koelsch.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/lager.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/porter.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP7_ENA	include/configs/silk.h	/^#define CONFIG_SMSTP7_ENA	/;"	d
CONFIG_SMSTP8_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP8_ENA	/;"	d
CONFIG_SMSTP9_ENA	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define CONFIG_SMSTP9_ENA	/;"	d
CONFIG_SMSTP9_ENA	include/configs/blanche.h	/^#define CONFIG_SMSTP9_ENA	/;"	d
CONFIG_SOCFPGA_DWMMC	include/configs/socfpga_common.h	/^#define CONFIG_SOCFPGA_DWMMC$/;"	d
CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH	include/configs/socfpga_common.h	/^#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH	/;"	d
CONFIG_SOCRATES	include/configs/socrates.h	/^#define CONFIG_SOCRATES	/;"	d
CONFIG_SOC_AR933X	arch/mips/mach-ath79/Kconfig	/^config SOC_AR933X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SOC_AR933X_MODULE	arch/mips/mach-ath79/Kconfig	/^config SOC_AR933X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SOC_AR934X	arch/mips/mach-ath79/Kconfig	/^config SOC_AR934X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SOC_AR934X_MODULE	arch/mips/mach-ath79/Kconfig	/^config SOC_AR934X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SOC_AU1000	include/configs/dbau1x00.h	/^#define CONFIG_SOC_AU1000	/;"	d
CONFIG_SOC_AU1000	include/configs/pb1x00.h	/^#define CONFIG_SOC_AU1000	/;"	d
CONFIG_SOC_AU1100	include/configs/dbau1x00.h	/^#define CONFIG_SOC_AU1100	/;"	d
CONFIG_SOC_AU1100	include/configs/pb1x00.h	/^#define CONFIG_SOC_AU1100	/;"	d
CONFIG_SOC_AU1500	include/configs/dbau1x00.h	/^#define CONFIG_SOC_AU1500	/;"	d
CONFIG_SOC_AU1500	include/configs/pb1x00.h	/^#define CONFIG_SOC_AU1500	/;"	d
CONFIG_SOC_AU1550	include/configs/dbau1x00.h	/^#define CONFIG_SOC_AU1550	/;"	d
CONFIG_SOC_AU1X00	include/configs/dbau1x00.h	/^#define CONFIG_SOC_AU1X00	/;"	d
CONFIG_SOC_AU1X00	include/configs/pb1x00.h	/^#define CONFIG_SOC_AU1X00	/;"	d
CONFIG_SOC_DA850	include/configs/calimain.h	/^#define CONFIG_SOC_DA850	/;"	d
CONFIG_SOC_DA850	include/configs/da850evm.h	/^#define CONFIG_SOC_DA850	/;"	d
CONFIG_SOC_DA850	include/configs/ea20.h	/^#define CONFIG_SOC_DA850	/;"	d
CONFIG_SOC_DA850	include/configs/ipam390.h	/^#define CONFIG_SOC_DA850	/;"	d
CONFIG_SOC_DA850	include/configs/legoev3.h	/^#define CONFIG_SOC_DA850	/;"	d
CONFIG_SOC_DA8XX	include/configs/calimain.h	/^#define CONFIG_SOC_DA8XX	/;"	d
CONFIG_SOC_DA8XX	include/configs/da850evm.h	/^#define CONFIG_SOC_DA8XX	/;"	d
CONFIG_SOC_DA8XX	include/configs/ea20.h	/^#define CONFIG_SOC_DA8XX	/;"	d
CONFIG_SOC_DA8XX	include/configs/ipam390.h	/^#define CONFIG_SOC_DA8XX	/;"	d
CONFIG_SOC_DA8XX	include/configs/legoev3.h	/^#define CONFIG_SOC_DA8XX	/;"	d
CONFIG_SOC_DA8XX	include/configs/omapl138_lcdk.h	/^#define CONFIG_SOC_DA8XX	/;"	d
CONFIG_SOC_K2E	include/configs/k2e_evm.h	/^#define CONFIG_SOC_K2E$/;"	d
CONFIG_SOC_K2G	include/configs/k2g_evm.h	/^#define CONFIG_SOC_K2G$/;"	d
CONFIG_SOC_K2HK	include/configs/k2hk_evm.h	/^#define CONFIG_SOC_K2HK$/;"	d
CONFIG_SOC_K2L	include/configs/k2l_evm.h	/^#define CONFIG_SOC_K2L$/;"	d
CONFIG_SOC_KEYSTONE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SOC_KEYSTONE$/;"	d
CONFIG_SOC_OMAP3430	drivers/usb/musb-new/linux-compat.h	/^#define CONFIG_SOC_OMAP3430$/;"	d
CONFIG_SOC_PIC32MZDA	arch/mips/mach-pic32/Kconfig	/^config SOC_PIC32MZDA$/;"	c	choice:Microchip PIC32 platforms""choicef4d9e1b10104
CONFIG_SOC_PIC32MZDA_MODULE	arch/mips/mach-pic32/Kconfig	/^config SOC_PIC32MZDA$/;"	c	choice:Microchip PIC32 platforms""choicef4d9e1b10104
CONFIG_SOC_QCA953X	arch/mips/mach-ath79/Kconfig	/^config SOC_QCA953X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SOC_QCA953X_MODULE	arch/mips/mach-ath79/Kconfig	/^config SOC_QCA953X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/bf533-ezkit.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/bf533-stamp.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL	/;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/bf533-stamp.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/bf561-ezkit.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/blackstamp.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/blackvme.h	/^# define CONFIG_SOFT_I2C_GPIO_SCL	/;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/ibf-dsp561.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/s5p_goni.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/s5pc210_universal.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/sunxi-common.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL	/;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/trats.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL /;"	d
CONFIG_SOFT_I2C_GPIO_SCL	include/configs/trats2.h	/^#define CONFIG_SOFT_I2C_GPIO_SCL	/;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/bf533-ezkit.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/bf533-stamp.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA	/;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/bf533-stamp.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/bf561-ezkit.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/blackstamp.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/blackvme.h	/^# define CONFIG_SOFT_I2C_GPIO_SDA	/;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/ibf-dsp561.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/s5p_goni.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/s5pc210_universal.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/sunxi-common.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA	/;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/trats.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA /;"	d
CONFIG_SOFT_I2C_GPIO_SDA	include/configs/trats2.h	/^#define CONFIG_SOFT_I2C_GPIO_SDA	/;"	d
CONFIG_SOFT_I2C_I2C10_SCL	board/samsung/common/multi_i2c.c	/^#define CONFIG_SOFT_I2C_I2C10_SCL /;"	d	file:
CONFIG_SOFT_I2C_I2C10_SDA	board/samsung/common/multi_i2c.c	/^#define CONFIG_SOFT_I2C_I2C10_SDA /;"	d	file:
CONFIG_SOFT_I2C_READ_REPEATED_START	include/configs/bfin_adi_common.h	/^#  define CONFIG_SOFT_I2C_READ_REPEATED_START$/;"	d
CONFIG_SOFT_I2C_READ_REPEATED_START	include/configs/s5pc210_universal.h	/^#define CONFIG_SOFT_I2C_READ_REPEATED_START$/;"	d
CONFIG_SOFT_I2C_READ_REPEATED_START	include/configs/snapper9260.h	/^#define CONFIG_SOFT_I2C_READ_REPEATED_START$/;"	d
CONFIG_SOFT_I2C_READ_REPEATED_START	include/configs/strider.h	/^#define CONFIG_SOFT_I2C_READ_REPEATED_START$/;"	d
CONFIG_SOFT_I2C_READ_REPEATED_START	include/configs/trats.h	/^#define CONFIG_SOFT_I2C_READ_REPEATED_START$/;"	d
CONFIG_SOFT_I2C_READ_REPEATED_START	include/configs/trats2.h	/^#define CONFIG_SOFT_I2C_READ_REPEATED_START$/;"	d
CONFIG_SOFT_SPI	include/configs/mx6ullevk.h	/^#define CONFIG_SOFT_SPI$/;"	d
CONFIG_SOFT_SPI	include/configs/s5pc210_universal.h	/^#define CONFIG_SOFT_SPI$/;"	d
CONFIG_SOFT_SPI	include/configs/zipitz2.h	/^#define	CONFIG_SOFT_SPI$/;"	d
CONFIG_SOFT_TWS	include/configs/inka4x0.h	/^#define CONFIG_SOFT_TWS	/;"	d
CONFIG_SOUND	drivers/sound/Kconfig	/^config SOUND$/;"	c	menu:Sound support
CONFIG_SOUND_MAX98095	drivers/sound/Kconfig	/^config SOUND_MAX98095$/;"	c	menu:Sound support
CONFIG_SOUND_MAX98095_MODULE	drivers/sound/Kconfig	/^config SOUND_MAX98095$/;"	c	menu:Sound support
CONFIG_SOUND_MODULE	drivers/sound/Kconfig	/^config SOUND$/;"	c	menu:Sound support
CONFIG_SOUND_SANDBOX	drivers/sound/Kconfig	/^config SOUND_SANDBOX$/;"	c	menu:Sound support
CONFIG_SOUND_SANDBOX_MODULE	drivers/sound/Kconfig	/^config SOUND_SANDBOX$/;"	c	menu:Sound support
CONFIG_SOUND_WM8994	drivers/sound/Kconfig	/^config SOUND_WM8994$/;"	c	menu:Sound support
CONFIG_SOUND_WM8994_MODULE	drivers/sound/Kconfig	/^config SOUND_WM8994$/;"	c	menu:Sound support
CONFIG_SPARC	arch/Kconfig	/^config SPARC$/;"	c	choice:choice07312ef30104
CONFIG_SPARC_MODULE	arch/Kconfig	/^config SPARC$/;"	c	choice:choice07312ef30104
CONFIG_SPD_EEPROM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8349ITX.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8536DS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8540ADS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8541CDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8544DS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8548CDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8555CDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8560ADS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8568MDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8569MDS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8572DS.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/bamboo.h	/^#define CONFIG_SPD_EEPROM /;"	d
CONFIG_SPD_EEPROM	include/configs/bubinga.h	/^#define CONFIG_SPD_EEPROM /;"	d
CONFIG_SPD_EEPROM	include/configs/canyonlands.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/controlcenterd.h	/^#define CONFIG_SPD_EEPROM$/;"	d
CONFIG_SPD_EEPROM	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/icon.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/katmai.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/luan.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/redwood.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/sbc8349.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/socrates.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/vme8349.h	/^#define CONFIG_SPD_EEPROM$/;"	d
CONFIG_SPD_EEPROM	include/configs/walnut.h	/^#define CONFIG_SPD_EEPROM /;"	d
CONFIG_SPD_EEPROM	include/configs/xpedite1000.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/xpedite517x.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/xpedite520x.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/xpedite537x.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/xpedite550x.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPD_EEPROM	include/configs/yucca.h	/^#define CONFIG_SPD_EEPROM	/;"	d
CONFIG_SPEAR3XX	include/configs/spear3xx_evb.h	/^#define CONFIG_SPEAR3XX$/;"	d
CONFIG_SPEAR600	include/configs/x600.h	/^#define CONFIG_SPEAR600	/;"	d
CONFIG_SPEAR_BOOTSTRAPCFG	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_BOOTSTRAPCFG	/;"	d
CONFIG_SPEAR_BOOTSTRAPMASK	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_BOOTSTRAPMASK	/;"	d
CONFIG_SPEAR_BOOTSTRAPSHFT	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_BOOTSTRAPSHFT	/;"	d
CONFIG_SPEAR_EMI	include/configs/spear-common.h	/^#define CONFIG_SPEAR_EMI$/;"	d
CONFIG_SPEAR_EMIBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_EMIBASE	/;"	d
CONFIG_SPEAR_ETHBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_ETHBASE	/;"	d
CONFIG_SPEAR_GPIO	include/configs/x600.h	/^#define CONFIG_SPEAR_GPIO$/;"	d
CONFIG_SPEAR_HZ	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define CONFIG_SPEAR_HZ	/;"	d
CONFIG_SPEAR_HZ_CLOCK	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define CONFIG_SPEAR_HZ_CLOCK	/;"	d
CONFIG_SPEAR_MISCBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_MISCBASE	/;"	d
CONFIG_SPEAR_MPMCBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_MPMCBASE	/;"	d
CONFIG_SPEAR_MPMCREGS	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_MPMCREGS	/;"	d
CONFIG_SPEAR_NORNAND16BOOT	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_NORNAND16BOOT	/;"	d
CONFIG_SPEAR_NORNAND8BOOT	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_NORNAND8BOOT	/;"	d
CONFIG_SPEAR_NORNANDBOOT	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_NORNANDBOOT	/;"	d
CONFIG_SPEAR_ONLYSNORBOOT	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_ONLYSNORBOOT	/;"	d
CONFIG_SPEAR_RASBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_RASBASE	/;"	d
CONFIG_SPEAR_SYSCNTLBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_SYSCNTLBASE	/;"	d
CONFIG_SPEAR_TIMERBASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_TIMERBASE	/;"	d
CONFIG_SPEAR_UART48M	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define CONFIG_SPEAR_UART48M	/;"	d
CONFIG_SPEAR_UARTCLKMSK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define CONFIG_SPEAR_UARTCLKMSK	/;"	d
CONFIG_SPEAR_USBBOOT	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SPEAR_USBBOOT	/;"	d
CONFIG_SPEAR_USBTTY	include/configs/spear3xx_evb.h	/^#define CONFIG_SPEAR_USBTTY$/;"	d
CONFIG_SPEAR_USBTTY	include/configs/spear6xx_evb.h	/^#define CONFIG_SPEAR_USBTTY$/;"	d
CONFIG_SPI	include/configs/PATI.h	/^#define CONFIG_SPI	/;"	d
CONFIG_SPI	include/configs/alt.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/blanche.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/brppt1.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/cm_fx6.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/da850evm.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/ea20.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/gose.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/koelsch.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/lager.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/legoev3.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/microblaze-generic.h	/^# define CONFIG_SPI	/;"	d
CONFIG_SPI	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/ot1200.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/porter.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/rk3036_common.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/rk3288_common.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/rk3399_common.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/rut.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/silk.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/stout.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/taurus.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/ti_armv7_common.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPI	include/configs/x86-common.h	/^#define CONFIG_SPI$/;"	d
CONFIG_SPIFLASH	board/Arcturus/ucp1020/Kconfig	/^config SPIFLASH$/;"	c
CONFIG_SPIFLASH_MODULE	board/Arcturus/ucp1020/Kconfig	/^config SPIFLASH$/;"	c
CONFIG_SPI_ADDR	board/renesas/sh7752evb/spi-boot.c	/^#define CONFIG_SPI_ADDR	/;"	d	file:
CONFIG_SPI_ADDR	board/renesas/sh7753evb/spi-boot.c	/^#define CONFIG_SPI_ADDR	/;"	d	file:
CONFIG_SPI_ADDR	board/renesas/sh7757lcr/spi-boot.c	/^#define CONFIG_SPI_ADDR	/;"	d	file:
CONFIG_SPI_BAUD_INITBLOCK	arch/blackfin/cpu/initcode.c	/^# define CONFIG_SPI_BAUD_INITBLOCK /;"	d	file:
CONFIG_SPI_BOOT	common/Kconfig	/^config SPI_BOOT$/;"	c	menu:Boot media
CONFIG_SPI_BOOTING	include/configs/exynos5-dt-common.h	/^#define CONFIG_SPI_BOOTING$/;"	d
CONFIG_SPI_BOOT_MODULE	common/Kconfig	/^config SPI_BOOT$/;"	c	menu:Boot media
CONFIG_SPI_DMA_BASE	arch/x86/cpu/quark/Kconfig	/^config SPI_DMA_BASE$/;"	c
CONFIG_SPI_DMA_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config SPI_DMA_BASE$/;"	c
CONFIG_SPI_FLASH	drivers/mtd/spi/Kconfig	/^config SPI_FLASH$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH	include/configs/cgtqmx6eval.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH	include/configs/ls2080aqds.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH	include/configs/ls2080ardb.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH	include/configs/mx7dsabresd.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH	include/configs/rk3036_common.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH	include/configs/rk3288_common.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH	include/configs/rk3399_common.h	/^#define CONFIG_SPI_FLASH$/;"	d
CONFIG_SPI_FLASH_ALL	include/configs/bf527-sdp.h	/^#define CONFIG_SPI_FLASH_ALL$/;"	d
CONFIG_SPI_FLASH_ALL	include/configs/bf537-stamp.h	/^#define CONFIG_SPI_FLASH_ALL$/;"	d
CONFIG_SPI_FLASH_ALL	include/configs/bf609-ezkit.h	/^#define CONFIG_SPI_FLASH_ALL$/;"	d
CONFIG_SPI_FLASH_ATMEL	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_ATMEL$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_ATMEL	include/configs/ma5d4evk.h	/^#define CONFIG_SPI_FLASH_ATMEL$/;"	d
CONFIG_SPI_FLASH_ATMEL	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPI_FLASH_ATMEL$/;"	d
CONFIG_SPI_FLASH_ATMEL_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_ATMEL$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_BAR	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_BAR$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_BAR	include/configs/T102xQDS.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/T102xRDB.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/T104xRDB.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/T208xQDS.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/T208xRDB.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/gw_ventana.h	/^  #define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SPI_FLASH_BAR	/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/ls1012a_common.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/ls1046ardb.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/ls2080ardb.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR	include/configs/mx7dsabresd.h	/^#define CONFIG_SPI_FLASH_BAR$/;"	d
CONFIG_SPI_FLASH_BAR_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_BAR$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_DATAFLASH	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_DATAFLASH$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_DATAFLASH	include/configs/ls1021aqds.h	/^#define CONFIG_SPI_FLASH_DATAFLASH$/;"	d
CONFIG_SPI_FLASH_DATAFLASH_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_DATAFLASH$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_EON	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_EON$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_EON	include/configs/ls1012aqds.h	/^#define CONFIG_SPI_FLASH_EON /;"	d
CONFIG_SPI_FLASH_EON	include/configs/ls1043a_common.h	/^#define CONFIG_SPI_FLASH_EON	/;"	d
CONFIG_SPI_FLASH_EON	include/configs/ls1046aqds.h	/^#define CONFIG_SPI_FLASH_EON	/;"	d
CONFIG_SPI_FLASH_EON	include/configs/ls2080aqds.h	/^#define CONFIG_SPI_FLASH_EON$/;"	d
CONFIG_SPI_FLASH_EON_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_EON$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_GIGADEVICE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_GIGADEVICE$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_GIGADEVICE	include/configs/chromebook_jerry.h	/^#define CONFIG_SPI_FLASH_GIGADEVICE$/;"	d
CONFIG_SPI_FLASH_GIGADEVICE	include/configs/rk3036_common.h	/^#define CONFIG_SPI_FLASH_GIGADEVICE$/;"	d
CONFIG_SPI_FLASH_GIGADEVICE_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_GIGADEVICE$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_ISSI	include/configs/zynq-common.h	/^# define CONFIG_SPI_FLASH_ISSI$/;"	d
CONFIG_SPI_FLASH_MACRONIX	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_MACRONIX$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_MACRONIX	include/configs/mx7dsabresd.h	/^#define CONFIG_SPI_FLASH_MACRONIX$/;"	d
CONFIG_SPI_FLASH_MACRONIX_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_MACRONIX$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_MTD	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_MTD$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_MTD	include/configs/aristainetos-common.h	/^#define CONFIG_SPI_FLASH_MTD$/;"	d
CONFIG_SPI_FLASH_MTD	include/configs/cm_fx6.h	/^#define CONFIG_SPI_FLASH_MTD$/;"	d
CONFIG_SPI_FLASH_MTD	include/configs/gw_ventana.h	/^  #define CONFIG_SPI_FLASH_MTD$/;"	d
CONFIG_SPI_FLASH_MTD	include/configs/socfpga_common.h	/^#define CONFIG_SPI_FLASH_MTD$/;"	d
CONFIG_SPI_FLASH_MTD_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_MTD$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_QUAD	include/configs/alt.h	/^#define CONFIG_SPI_FLASH_QUAD$/;"	d
CONFIG_SPI_FLASH_QUAD	include/configs/porter.h	/^#define CONFIG_SPI_FLASH_QUAD$/;"	d
CONFIG_SPI_FLASH_QUAD	include/configs/silk.h	/^#define CONFIG_SPI_FLASH_QUAD$/;"	d
CONFIG_SPI_FLASH_QUAD	include/configs/stout.h	/^#define CONFIG_SPI_FLASH_QUAD$/;"	d
CONFIG_SPI_FLASH_SANDBOX	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SANDBOX$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_SANDBOX_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SANDBOX$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_SIZE	include/configs/beaver.h	/^#define CONFIG_SPI_FLASH_SIZE /;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/cardhu.h	/^#define CONFIG_SPI_FLASH_SIZE /;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/cei-tk1-som.h	/^#define CONFIG_SPI_FLASH_SIZE	/;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/dalmore.h	/^#define CONFIG_SPI_FLASH_SIZE /;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/e2220-1170.h	/^#define CONFIG_SPI_FLASH_SIZE	/;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/jetson-tk1.h	/^#define CONFIG_SPI_FLASH_SIZE	/;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/nyan-big.h	/^#define CONFIG_SPI_FLASH_SIZE /;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/p2371-0000.h	/^#define CONFIG_SPI_FLASH_SIZE	/;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/p2371-2180.h	/^#define CONFIG_SPI_FLASH_SIZE	/;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/p2571.h	/^#define CONFIG_SPI_FLASH_SIZE	/;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/tec-ng.h	/^#define CONFIG_SPI_FLASH_SIZE /;"	d
CONFIG_SPI_FLASH_SIZE	include/configs/venice2.h	/^#define CONFIG_SPI_FLASH_SIZE /;"	d
CONFIG_SPI_FLASH_SPANSION	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SPANSION$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_SPANSION	include/configs/ls1012a_common.h	/^#define CONFIG_SPI_FLASH_SPANSION$/;"	d
CONFIG_SPI_FLASH_SPANSION	include/configs/ls1043aqds.h	/^#define CONFIG_SPI_FLASH_SPANSION$/;"	d
CONFIG_SPI_FLASH_SPANSION	include/configs/ls1046aqds.h	/^#define CONFIG_SPI_FLASH_SPANSION$/;"	d
CONFIG_SPI_FLASH_SPANSION	include/configs/ls1046ardb.h	/^#define CONFIG_SPI_FLASH_SPANSION$/;"	d
CONFIG_SPI_FLASH_SPANSION	include/configs/ls2080aqds.h	/^#define CONFIG_SPI_FLASH_SPANSION$/;"	d
CONFIG_SPI_FLASH_SPANSION_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SPANSION$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_SST	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SST$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_SST	include/configs/cgtqmx6eval.h	/^#define CONFIG_SPI_FLASH_SST$/;"	d
CONFIG_SPI_FLASH_SST	include/configs/ls1012aqds.h	/^#define CONFIG_SPI_FLASH_SST /;"	d
CONFIG_SPI_FLASH_SST	include/configs/ls1043a_common.h	/^#define CONFIG_SPI_FLASH_SST	/;"	d
CONFIG_SPI_FLASH_SST	include/configs/ls1046aqds.h	/^#define CONFIG_SPI_FLASH_SST	/;"	d
CONFIG_SPI_FLASH_SST	include/configs/ls2080aqds.h	/^#define CONFIG_SPI_FLASH_SST$/;"	d
CONFIG_SPI_FLASH_SST_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SST$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_STMICRO	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_STMICRO$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_STMICRO	include/configs/cgtqmx6eval.h	/^#define CONFIG_SPI_FLASH_STMICRO$/;"	d
CONFIG_SPI_FLASH_STMICRO	include/configs/clearfog.h	/^#define CONFIG_SPI_FLASH_STMICRO$/;"	d
CONFIG_SPI_FLASH_STMICRO	include/configs/ls1012aqds.h	/^#define CONFIG_SPI_FLASH_STMICRO /;"	d
CONFIG_SPI_FLASH_STMICRO	include/configs/ls1043a_common.h	/^#define CONFIG_SPI_FLASH_STMICRO	/;"	d
CONFIG_SPI_FLASH_STMICRO	include/configs/ls1046aqds.h	/^#define CONFIG_SPI_FLASH_STMICRO	/;"	d
CONFIG_SPI_FLASH_STMICRO	include/configs/ls2080aqds.h	/^#define CONFIG_SPI_FLASH_STMICRO$/;"	d
CONFIG_SPI_FLASH_STMICRO	include/configs/vinco.h	/^#define CONFIG_SPI_FLASH_STMICRO$/;"	d
CONFIG_SPI_FLASH_STMICRO_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_STMICRO$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_USE_4K_SECTORS	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_USE_4K_SECTORS$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_USE_4K_SECTORS_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_USE_4K_SECTORS$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_WINBOND	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_WINBOND$/;"	c	menu:SPI Flash Support
CONFIG_SPI_FLASH_WINBOND_MODULE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_WINBOND$/;"	c	menu:SPI Flash Support
CONFIG_SPI_HALF_DUPLEX	include/configs/mxs.h	/^#define CONFIG_SPI_HALF_DUPLEX$/;"	d
CONFIG_SPI_IDLE_VAL	drivers/spi/cf_spi.c	/^#define CONFIG_SPI_IDLE_VAL	/;"	d	file:
CONFIG_SPI_IDLE_VAL	drivers/spi/sandbox_spi.c	/^# define CONFIG_SPI_IDLE_VAL /;"	d	file:
CONFIG_SPI_LENGTH	board/renesas/sh7752evb/spi-boot.c	/^#define CONFIG_SPI_LENGTH	/;"	d	file:
CONFIG_SPI_LENGTH	board/renesas/sh7757lcr/spi-boot.c	/^#define CONFIG_SPI_LENGTH	/;"	d	file:
CONFIG_SPI_N25Q256A_RESET	include/configs/socfpga_sr1500.h	/^#define CONFIG_SPI_N25Q256A_RESET$/;"	d
CONFIG_SPL	common/spl/Kconfig	/^config SPL$/;"	c	menu:SPL / TPL
CONFIG_SPL	include/config/auto.conf	/^CONFIG_SPL=y$/;"	k
CONFIG_SPL	include/generated/autoconf.h	/^#define CONFIG_SPL /;"	d
CONFIG_SPLASHIMAGE_GUARD	include/configs/cm_t35.h	/^#define CONFIG_SPLASHIMAGE_GUARD$/;"	d
CONFIG_SPLASHIMAGE_GUARD	include/configs/cm_t3517.h	/^#define CONFIG_SPLASHIMAGE_GUARD$/;"	d
CONFIG_SPLASHIMAGE_GUARD	include/configs/m53evk.h	/^#define CONFIG_SPLASHIMAGE_GUARD$/;"	d
CONFIG_SPLASH_SCREEN	include/autoconf.mk	/^CONFIG_SPLASH_SCREEN=y$/;"	m
CONFIG_SPLASH_SCREEN	include/configs/M52277EVB.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/TQM5200.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/TQM823L.h	/^#define	CONFIG_SPLASH_SCREEN	/;"	d
CONFIG_SPLASH_SCREEN	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/aristainetos-common.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/cgtqmx6eval.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/cm_fx6.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/cm_t35.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/cm_t3517.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/colibri_imx7.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/digsy_mtc.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/eb_cpu5282.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/embestmx6boards.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/ge_bx50v3.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/icon.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/imx31_phycore.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/ipek01.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/lwmon5.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/m28evk.h	/^#define	CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/m53evk.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mcx.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mt_ventoux.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx23evk.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx28evk.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx51evk.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx53loco.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx6cuboxi.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx6sabre_common.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx6sxsabresd.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/mx7dsabresd.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/nitrogen6x.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/nokia_rx51.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/novena.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/pdm360ng.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/pxm2.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/rut.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/sequoia.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/socrates.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/sunxi-common.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	include/configs/wandboard.h	/^#define CONFIG_SPLASH_SCREEN$/;"	d
CONFIG_SPLASH_SCREEN	spl/include/autoconf.mk	/^CONFIG_SPLASH_SCREEN=y$/;"	m
CONFIG_SPLASH_SCREEN_ALIGN	include/autoconf.mk	/^CONFIG_SPLASH_SCREEN_ALIGN=y$/;"	m
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/aristainetos-common.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/cgtqmx6eval.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/colibri_imx7.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/ea20.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/embestmx6boards.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/ge_bx50v3.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/gw_ventana.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/m53evk.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/mx6cuboxi.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/mx6sabre_common.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/mx6sxsabresd.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/mx7dsabresd.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/nitrogen6x.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/pxm2.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/rut.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/sandbox.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/sunxi-common.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	include/configs/wandboard.h	/^#define CONFIG_SPLASH_SCREEN_ALIGN$/;"	d
CONFIG_SPLASH_SCREEN_ALIGN	spl/include/autoconf.mk	/^CONFIG_SPLASH_SCREEN_ALIGN=y$/;"	m
CONFIG_SPLASH_SOURCE	include/configs/cm_fx6.h	/^#define CONFIG_SPLASH_SOURCE$/;"	d
CONFIG_SPLASH_SOURCE	include/configs/cm_t35.h	/^#define CONFIG_SPLASH_SOURCE$/;"	d
CONFIG_SPLL_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_SPLL_FREQ	/;"	d
CONFIG_SPL_ABORT_ON_RAW_IMAGE	include/configs/imx6_spl.h	/^#define CONFIG_SPL_ABORT_ON_RAW_IMAGE$/;"	d
CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC	/;"	d
CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC	include/configs/ti_am335x_common.h	/^#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC$/;"	d
CONFIG_SPL_ATMEL_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_ATMEL_SIZE$/;"	d
CONFIG_SPL_ATMEL_SIZE	include/configs/corvus.h	/^#define CONFIG_SPL_ATMEL_SIZE$/;"	d
CONFIG_SPL_ATMEL_SIZE	include/configs/picosam9g45.h	/^#define CONFIG_SPL_ATMEL_SIZE$/;"	d
CONFIG_SPL_ATMEL_SIZE	include/configs/smartweb.h	/^#define CONFIG_SPL_ATMEL_SIZE$/;"	d
CONFIG_SPL_ATMEL_SIZE	include/configs/taurus.h	/^#define CONFIG_SPL_ATMEL_SIZE$/;"	d
CONFIG_SPL_BOARD_INIT	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/a3m071.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/am3517_crane.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/am3517_evm.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/cm_t35.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/corvus.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/da850evm.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/devkit3250.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/edminiv2.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/gw_ventana.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/ipam390.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/kc1.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/m53evk.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/mcx.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/microblaze-generic.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/omap3_evm.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/rk3288_common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sandbox_spl.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/smartweb.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/sniper.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/tam3517-common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/tao3530.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/taurus.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/tegra-common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/tricorder.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/twister.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/uniphier.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/work_92105.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_INIT	include/configs/zynq-common.h	/^#define CONFIG_SPL_BOARD_INIT$/;"	d
CONFIG_SPL_BOARD_LOAD_IMAGE	arch/sandbox/include/asm/spl.h	/^#define CONFIG_SPL_BOARD_LOAD_IMAGE$/;"	d
CONFIG_SPL_BOARD_LOAD_IMAGE	include/autoconf.mk	/^CONFIG_SPL_BOARD_LOAD_IMAGE=y$/;"	m
CONFIG_SPL_BOARD_LOAD_IMAGE	include/configs/sunxi-common.h	/^#define CONFIG_SPL_BOARD_LOAD_IMAGE$/;"	d
CONFIG_SPL_BOARD_LOAD_IMAGE	include/configs/uniphier.h	/^#define CONFIG_SPL_BOARD_LOAD_IMAGE$/;"	d
CONFIG_SPL_BOARD_LOAD_IMAGE	spl/include/autoconf.mk	/^CONFIG_SPL_BOARD_LOAD_IMAGE=y$/;"	m
CONFIG_SPL_BOOTROM_SAVE	include/configs/clearfog.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/db-88f6720.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/ds414.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/maxbcm.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOTROM_SAVE	include/configs/theadorable.h	/^#define CONFIG_SPL_BOOTROM_SAVE	/;"	d
CONFIG_SPL_BOOT_DEVICE	include/configs/clearfog.h	/^#define CONFIG_SPL_BOOT_DEVICE	/;"	d
CONFIG_SPL_BOOT_DEVICE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_BOOT_DEVICE	/;"	d
CONFIG_SPL_BOOT_DEVICE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_BOOT_DEVICE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/autoconf.mk	/^CONFIG_SPL_BSS_MAX_SIZE=0x00080000$/;"	m
CONFIG_SPL_BSS_MAX_SIZE	include/configs/a3m071.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/clearfog.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/corvus.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/db-88f6720.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/devkit8000.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ds414.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/edminiv2.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/imx6_spl.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/imx6_spl.h	/^#define CONFIG_SPL_BSS_MAX_SIZE /;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/kc1.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/maxbcm.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/mcx.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/picosam9g45.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/smartweb.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sniper.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/sunxi-common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/tao3530.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/taurus.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/theadorable.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_BSS_MAX_SIZE /;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/tricorder.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/uniphier.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	include/configs/zynq-common.h	/^#define CONFIG_SPL_BSS_MAX_SIZE	/;"	d
CONFIG_SPL_BSS_MAX_SIZE	spl/include/autoconf.mk	/^CONFIG_SPL_BSS_MAX_SIZE=0x00080000$/;"	m
CONFIG_SPL_BSS_START_ADDR	include/autoconf.mk	/^CONFIG_SPL_BSS_START_ADDR=0x4ff80000$/;"	m
CONFIG_SPL_BSS_START_ADDR	include/configs/a3m071.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/am3517_crane.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/am3517_evm.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/clearfog.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/cm_t35.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/corvus.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/db-88f6720.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/devkit8000.h	/^#define CONFIG_SPL_BSS_START_ADDR /;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ds414.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/edminiv2.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/imx6_spl.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/imx6_spl.h	/^#define CONFIG_SPL_BSS_START_ADDR /;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/kc1.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/maxbcm.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/mcx.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/omap3_beagle.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/omap3_cairo.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/omap3_evm.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/omap3_logic.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/picosam9g45.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/smartweb.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sniper.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/tam3517-common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/tao3530.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/taurus.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/theadorable.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_BSS_START_ADDR /;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/tricorder.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/uniphier.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	include/configs/zynq-common.h	/^#define CONFIG_SPL_BSS_START_ADDR	/;"	d
CONFIG_SPL_BSS_START_ADDR	spl/include/autoconf.mk	/^CONFIG_SPL_BSS_START_ADDR=0x4ff80000$/;"	m
CONFIG_SPL_BUILD	spl/include/autoconf.mk	/^CONFIG_SPL_BUILD=y$/;"	m
CONFIG_SPL_CLK	drivers/clk/Kconfig	/^config SPL_CLK$/;"	c	menu:Clock
CONFIG_SPL_CLK_MODULE	drivers/clk/Kconfig	/^config SPL_CLK$/;"	c	menu:Clock
CONFIG_SPL_COMMON_INIT_DDR	include/configs/B4860QDS.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/P1010RDB.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/P1022DS.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T102xQDS.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T102xRDB.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T104xRDB.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T208xQDS.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T208xRDB.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T4240QDS.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/T4240RDB.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_COMMON_INIT_DDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_COMMON_INIT_DDR$/;"	d
CONFIG_SPL_CONSOLE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_CONSOLE$/;"	d
CONFIG_SPL_CRC32_SUPPORT	common/spl/Kconfig	/^config SPL_CRC32_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_CRC32_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_CRC32_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_CRYPTO_SUPPORT	common/spl/Kconfig	/^config SPL_CRYPTO_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_CRYPTO_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_CRYPTO_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_DFU_RAM	Kconfig	/^config SPL_DFU_RAM$/;"	c	choice:Boot images""choice8014d1a60104
CONFIG_SPL_DFU_RAM_MODULE	Kconfig	/^config SPL_DFU_RAM$/;"	c	choice:Boot images""choice8014d1a60104
CONFIG_SPL_DFU_SUPPORT	Kconfig	/^config SPL_DFU_SUPPORT$/;"	c	menu:Boot images
CONFIG_SPL_DFU_SUPPORT_MODULE	Kconfig	/^config SPL_DFU_SUPPORT$/;"	c	menu:Boot images
CONFIG_SPL_DISPLAY_PRINT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c
CONFIG_SPL_DISPLAY_PRINT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c
CONFIG_SPL_DISPLAY_PRINT	common/spl/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c	menu:SPL / TPL
CONFIG_SPL_DISPLAY_PRINT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c
CONFIG_SPL_DISPLAY_PRINT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c
CONFIG_SPL_DISPLAY_PRINT_MODULE	common/spl/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c	menu:SPL / TPL
CONFIG_SPL_DM	drivers/core/Kconfig	/^config SPL_DM$/;"	c	menu:Generic Driver Options
CONFIG_SPL_DMA_SUPPORT	common/spl/Kconfig	/^config SPL_DMA_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_DMA_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_DMA_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_DM_MODULE	drivers/core/Kconfig	/^config SPL_DM$/;"	c	menu:Generic Driver Options
CONFIG_SPL_DM_REGULATOR	drivers/power/regulator/Kconfig	/^config SPL_DM_REGULATOR$/;"	c
CONFIG_SPL_DM_REGULATOR_MODULE	drivers/power/regulator/Kconfig	/^config SPL_DM_REGULATOR$/;"	c
CONFIG_SPL_DM_SEQ_ALIAS	drivers/core/Kconfig	/^config SPL_DM_SEQ_ALIAS$/;"	c	menu:Generic Driver Options
CONFIG_SPL_DM_SEQ_ALIAS_MODULE	drivers/core/Kconfig	/^config SPL_DM_SEQ_ALIAS$/;"	c	menu:Generic Driver Options
CONFIG_SPL_DRIVERS_MISC_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_DRIVERS_MISC_SUPPORT$/;"	c
CONFIG_SPL_DRIVERS_MISC_SUPPORT	common/spl/Kconfig	/^config SPL_DRIVERS_MISC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_DRIVERS_MISC_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_DRIVERS_MISC_SUPPORT$/;"	d
CONFIG_SPL_DRIVERS_MISC_SUPPORT_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_DRIVERS_MISC_SUPPORT$/;"	c
CONFIG_SPL_DRIVERS_MISC_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_DRIVERS_MISC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_ENV_SUPPORT	board/ti/am335x/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c
CONFIG_SPL_ENV_SUPPORT	board/ti/common/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c
CONFIG_SPL_ENV_SUPPORT	common/spl/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_ENV_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_ENV_SUPPORT$/;"	d
CONFIG_SPL_ENV_SUPPORT	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SPL_ENV_SUPPORT$/;"	d
CONFIG_SPL_ENV_SUPPORT_MODULE	board/ti/am335x/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c
CONFIG_SPL_ENV_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c
CONFIG_SPL_ENV_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_ETH_SUPPORT	common/spl/Kconfig	/^config SPL_ETH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_ETH_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_ETH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_EXT_SUPPORT	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT	board/ti/common/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT	common/spl/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_EXT_SUPPORT_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
CONFIG_SPL_EXT_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_FAT_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT	board/ti/common/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT	common/spl/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_FAT_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
CONFIG_SPL_FAT_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_FIT	Kconfig	/^config SPL_FIT$/;"	c	menu:Boot images
CONFIG_SPL_FIT_IMAGE_POST_PROCESS	Kconfig	/^config SPL_FIT_IMAGE_POST_PROCESS$/;"	c	menu:Boot images
CONFIG_SPL_FIT_IMAGE_POST_PROCESS_MODULE	Kconfig	/^config SPL_FIT_IMAGE_POST_PROCESS$/;"	c	menu:Boot images
CONFIG_SPL_FIT_MODULE	Kconfig	/^config SPL_FIT$/;"	c	menu:Boot images
CONFIG_SPL_FIT_SIGNATURE	Kconfig	/^config SPL_FIT_SIGNATURE$/;"	c	menu:Boot images
CONFIG_SPL_FIT_SIGNATURE_MODULE	Kconfig	/^config SPL_FIT_SIGNATURE$/;"	c	menu:Boot images
CONFIG_SPL_FLUSH_IMAGE	include/configs/B4860QDS.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/P1010RDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/P1022DS.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T102xQDS.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T102xRDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T104xRDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T208xQDS.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T208xRDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T4240QDS.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/T4240RDB.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FLUSH_IMAGE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_FLUSH_IMAGE$/;"	d
CONFIG_SPL_FPGA_SUPPORT	common/spl/Kconfig	/^config SPL_FPGA_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_FPGA_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_FPGA_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_FRAMEWORK	include/autoconf.mk	/^CONFIG_SPL_FRAMEWORK=y$/;"	m
CONFIG_SPL_FRAMEWORK	include/configs/a3m071.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/am3517_crane.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/am3517_evm.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/clearfog.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/cm_t35.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/corvus.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/da850evm.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/db-88f6720.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/devkit3250.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ds414.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/edminiv2.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/imx6_spl.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ipam390.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/kc1.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/m53evk.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/maxbcm.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/mcx.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/microblaze-generic.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/omap3_evm.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/picosam9g45.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/rk3288_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sandbox_spl.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/smartweb.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sniper.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/socfpga_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/sunxi-common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/tam3517-common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/tao3530.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/taurus.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/tegra-common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/theadorable.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/tricorder.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/uniphier.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/work_92105.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/x600.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	include/configs/zynq-common.h	/^#define CONFIG_SPL_FRAMEWORK$/;"	d
CONFIG_SPL_FRAMEWORK	spl/include/autoconf.mk	/^CONFIG_SPL_FRAMEWORK=y$/;"	m
CONFIG_SPL_FS_LOAD_ARGS_NAME	include/configs/tam3517-common.h	/^#define CONFIG_SPL_FS_LOAD_ARGS_NAME	/;"	d
CONFIG_SPL_FS_LOAD_ARGS_NAME	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_FS_LOAD_ARGS_NAME	/;"	d
CONFIG_SPL_FS_LOAD_ARGS_NAME	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_FS_LOAD_ARGS_NAME	/;"	d
CONFIG_SPL_FS_LOAD_ARGS_NAME	include/configs/zynq-common.h	/^#define CONFIG_SPL_FS_LOAD_ARGS_NAME	/;"	d
CONFIG_SPL_FS_LOAD_KERNEL_NAME	include/configs/tam3517-common.h	/^#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	/;"	d
CONFIG_SPL_FS_LOAD_KERNEL_NAME	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	/;"	d
CONFIG_SPL_FS_LOAD_KERNEL_NAME	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	/;"	d
CONFIG_SPL_FS_LOAD_KERNEL_NAME	include/configs/zynq-common.h	/^#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/am3517_crane.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/am3517_evm.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/cm_t35.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/imx6_spl.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME /;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/mcx.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/omap3_evm.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/picosam9g45.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/rk3288_common.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/sniper.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/socfpga_common.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/tam3517-common.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/tao3530.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME /;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME /;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/tricorder.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME /;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	/;"	d
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	include/configs/zynq-common.h	/^#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME /;"	d
CONFIG_SPL_GD_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GD_ADDR	include/configs/t4qds.h	/^#define CONFIG_SPL_GD_ADDR	/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER$/;"	d
CONFIG_SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	arch/arm/mach-exynos/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	board/sunxi/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	board/ti/common/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT	common/spl/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_GPIO_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_GPIO_SUPPORT=y$/;"	k
CONFIG_SPL_GPIO_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_GPIO_SUPPORT /;"	d
CONFIG_SPL_GPIO_SUPPORT_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	arch/arm/mach-exynos/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	arch/arm/mach-tegra/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
CONFIG_SPL_GPIO_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_HASH_SUPPORT	common/spl/Kconfig	/^config SPL_HASH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_HASH_SUPPORT	include/configs/dra7xx_evm.h	/^#define CONFIG_SPL_HASH_SUPPORT$/;"	d
CONFIG_SPL_HASH_SUPPORT	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SPL_HASH_SUPPORT$/;"	d
CONFIG_SPL_HASH_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_HASH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_I2C_MUX	drivers/i2c/muxes/Kconfig	/^config SPL_I2C_MUX$/;"	c
CONFIG_SPL_I2C_MUX_MODULE	drivers/i2c/muxes/Kconfig	/^config SPL_I2C_MUX$/;"	c
CONFIG_SPL_I2C_SUPPORT	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT	board/ti/common/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT	common/spl/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_I2C_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_I2C_SUPPORT$/;"	d
CONFIG_SPL_I2C_SUPPORT_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
CONFIG_SPL_I2C_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_INIT_MINIMAL	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_INIT_MINIMAL	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_INIT_MINIMAL	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_INIT_MINIMAL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_INIT_MINIMAL	include/configs/P1010RDB.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_INIT_MINIMAL	include/configs/P1022DS.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_INIT_MINIMAL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_INIT_MINIMAL$/;"	d
CONFIG_SPL_JR0_LIODN_NS	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_JR0_LIODN_NS	/;"	d
CONFIG_SPL_JR0_LIODN_S	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_JR0_LIODN_S	/;"	d
CONFIG_SPL_LDSCRIPT	include/autoconf.mk	/^CONFIG_SPL_LDSCRIPT="arch\/arm\/cpu\/armv7\/sunxi\/u-boot-spl.lds"$/;"	m
CONFIG_SPL_LDSCRIPT	include/configs/am335x_evm.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/am335x_igep0033.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/am335x_shc.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/am335x_sl50.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/am3517_crane.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/am3517_evm.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/am43xx_evm.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/apf27.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/baltos.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/bav335x.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/cm_t335.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/cm_t35.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/cm_t43.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/da850evm.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/edminiv2.h	/^#define CONFIG_SPL_LDSCRIPT /;"	d
CONFIG_SPL_LDSCRIPT	include/configs/exynos5-common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/imx6_spl.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ipam390.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/kc1.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_LDSCRIPT /;"	d
CONFIG_SPL_LDSCRIPT	include/configs/mcx.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/microblaze-generic.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/mx31pdk.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/mxs.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/omap3_evm.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/origen.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/pcm051.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/pengwyn.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/pepper.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/picosam9g45.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/smartweb.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/smdkv310.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sniper.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/sunxi-common.h	/^#define CONFIG_SPL_LDSCRIPT /;"	d
CONFIG_SPL_LDSCRIPT	include/configs/tam3517-common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/tao3530.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_LDSCRIPT /;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ti_omap3_common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ti_omap4_common.h	/^#define CONFIG_SPL_LDSCRIPT /;"	d
CONFIG_SPL_LDSCRIPT	include/configs/ti_omap5_common.h	/^#define CONFIG_SPL_LDSCRIPT /;"	d
CONFIG_SPL_LDSCRIPT	include/configs/tricorder.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/woodburn_sd.h	/^#define	CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/x600.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	include/configs/zynq-common.h	/^#define CONFIG_SPL_LDSCRIPT	/;"	d
CONFIG_SPL_LDSCRIPT	spl/include/autoconf.mk	/^CONFIG_SPL_LDSCRIPT="arch\/arm\/cpu\/armv7\/sunxi\/u-boot-spl.lds"$/;"	m
CONFIG_SPL_LED	drivers/led/Kconfig	/^config SPL_LED$/;"	c	menu:LED Support
CONFIG_SPL_LED_GPIO	drivers/led/Kconfig	/^config SPL_LED_GPIO$/;"	c	menu:LED Support
CONFIG_SPL_LED_GPIO_MODULE	drivers/led/Kconfig	/^config SPL_LED_GPIO$/;"	c	menu:LED Support
CONFIG_SPL_LED_MODULE	drivers/led/Kconfig	/^config SPL_LED$/;"	c	menu:LED Support
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/mach-exynos/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	board/sunxi/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	board/ti/common/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT	common/spl/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_LIBCOMMON_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_LIBCOMMON_SUPPORT=y$/;"	k
CONFIG_SPL_LIBCOMMON_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_LIBCOMMON_SUPPORT$/;"	d
CONFIG_SPL_LIBCOMMON_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_LIBCOMMON_SUPPORT /;"	d
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/mach-exynos/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/mach-tegra/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
CONFIG_SPL_LIBCOMMON_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	board/sunxi/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	board/ti/common/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT	common/spl/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_LIBDISK_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_LIBDISK_SUPPORT=y$/;"	k
CONFIG_SPL_LIBDISK_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_LIBDISK_SUPPORT /;"	d
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
CONFIG_SPL_LIBDISK_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/mach-exynos/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	board/sunxi/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	board/ti/common/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT	common/spl/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_LIBGENERIC_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_LIBGENERIC_SUPPORT=y$/;"	k
CONFIG_SPL_LIBGENERIC_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_LIBGENERIC_SUPPORT$/;"	d
CONFIG_SPL_LIBGENERIC_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_LIBGENERIC_SUPPORT /;"	d
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/mach-exynos/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/mach-tegra/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
CONFIG_SPL_LIBGENERIC_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_LOAD_FIT	Kconfig	/^config SPL_LOAD_FIT$/;"	c	menu:Boot images
CONFIG_SPL_LOAD_FIT_ADDRESS	common/spl/spl.c	/^# define CONFIG_SPL_LOAD_FIT_ADDRESS	/;"	d	file:
CONFIG_SPL_LOAD_FIT_ADDRESS	include/configs/dra7xx_evm.h	/^#define CONFIG_SPL_LOAD_FIT_ADDRESS /;"	d
CONFIG_SPL_LOAD_FIT_ADDRESS	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_LOAD_FIT_ADDRESS	/;"	d
CONFIG_SPL_LOAD_FIT_MODULE	Kconfig	/^config SPL_LOAD_FIT$/;"	c	menu:Boot images
CONFIG_SPL_MAX_FOOTPRINT	include/configs/da850evm.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/exynos5250-common.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/exynos5420-common.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/ipam390.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/microblaze-generic.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/origen.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/smdkv310.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/tegra-common.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_FOOTPRINT	include/configs/uniphier.h	/^#define CONFIG_SPL_MAX_FOOTPRINT	/;"	d
CONFIG_SPL_MAX_SIZE	include/autoconf.mk	/^CONFIG_SPL_MAX_SIZE=0x5fc0$/;"	m
CONFIG_SPL_MAX_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/apf27.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/clearfog.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/corvus.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/db-88f6720.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/devkit3250.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ds414.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/edminiv2.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/imx6_spl.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ipam390.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/kc1.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/maxbcm.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/mcx.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/picosam9g45.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/smartweb.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sniper.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/sunxi-common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/tao3530.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/taurus.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/theadorable.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/tricorder.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/uniphier.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/x600.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	include/configs/zynq-common.h	/^#define CONFIG_SPL_MAX_SIZE	/;"	d
CONFIG_SPL_MAX_SIZE	spl/include/autoconf.mk	/^CONFIG_SPL_MAX_SIZE=0x5fc0$/;"	m
CONFIG_SPL_MD5_SUPPORT	common/spl/Kconfig	/^config SPL_MD5_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MD5_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_MD5_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MMC_BOOT	include/configs/P1010RDB.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/P1022DS.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T102xQDS.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T102xRDB.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T104xRDB.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T208xQDS.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T208xRDB.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T4240QDS.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/T4240RDB.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_BOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_MMC_BOOT$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/P1010RDB.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/P1022DS.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T102xQDS.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T102xRDB.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T104xRDB.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T208xQDS.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T208xRDB.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T4240QDS.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/T4240RDB.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_MINIMAL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_MMC_MINIMAL$/;"	d
CONFIG_SPL_MMC_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	arch/arm/mach-rockchip/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	board/sunxi/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	board/ti/common/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT	common/spl/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MMC_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_MMC_SUPPORT=y$/;"	k
CONFIG_SPL_MMC_SUPPORT	include/configs/imx6qdl_icore.h	/^#  define CONFIG_SPL_MMC_SUPPORT$/;"	d
CONFIG_SPL_MMC_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_MMC_SUPPORT$/;"	d
CONFIG_SPL_MMC_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_MMC_SUPPORT /;"	d
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/mach-rockchip/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
CONFIG_SPL_MMC_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MODULE	common/spl/Kconfig	/^config SPL$/;"	c	menu:SPL / TPL
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND	include/configs/MPC8313ERDB.h	/^#define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND$/;"	d
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT	common/spl/Kconfig	/^config SPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	d
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MTD_SUPPORT	common/spl/Kconfig	/^config SPL_MTD_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MTD_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_MTD_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MUSB_NEW_SUPPORT	common/spl/Kconfig	/^config SPL_MUSB_NEW_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_MUSB_NEW_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_MUSB_NEW_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/am335x_evm.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH$/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/am43xx_evm.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH$/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/bav335x.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH$/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/brppt1.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH	/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/dra7xx_evm.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH$/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH$/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/ti_am335x_common.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH	/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/ti_omap4_common.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH	/;"	d
CONFIG_SPL_NAND_AM33XX_BCH	include/configs/ti_omap5_common.h	/^#define CONFIG_SPL_NAND_AM33XX_BCH	/;"	d
CONFIG_SPL_NAND_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/brppt1.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/cm_t35.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/corvus.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/da850evm.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/ipam390.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/mcx.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/smartweb.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/tao3530.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/taurus.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/tricorder.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BASE	include/configs/work_92105.h	/^#define CONFIG_SPL_NAND_BASE$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/B4860QDS.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/P1010RDB.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/P1022DS.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/T102xQDS.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/T102xRDB.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/T104xRDB.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/T208xQDS.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/T208xRDB.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/T4240QDS.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_BOOT	include/configs/work_92105.h	/^#define CONFIG_SPL_NAND_BOOT$/;"	d
CONFIG_SPL_NAND_DENALI	drivers/mtd/nand/Kconfig	/^config SPL_NAND_DENALI$/;"	c	menu:NAND Device Support
CONFIG_SPL_NAND_DENALI_MODULE	drivers/mtd/nand/Kconfig	/^config SPL_NAND_DENALI$/;"	c	menu:NAND Device Support
CONFIG_SPL_NAND_DRIVERS	include/configs/am3517_crane.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/am3517_evm.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/brppt1.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/cm_t35.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/corvus.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/da850evm.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/devkit3250.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/ipam390.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/mcx.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/omap3_evm.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/smartweb.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/tam3517-common.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/tao3530.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/taurus.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/tricorder.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_DRIVERS	include/configs/work_92105.h	/^#define CONFIG_SPL_NAND_DRIVERS$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/am3517_crane.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/am3517_evm.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/brppt1.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/cm_t35.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/corvus.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/da850evm.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/devkit3250.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/ipam390.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/mcx.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/omap3_evm.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/smartweb.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/tam3517-common.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/tao3530.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/taurus.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/ti_armv7_common.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_ECC	include/configs/tricorder.h	/^#define CONFIG_SPL_NAND_ECC$/;"	d
CONFIG_SPL_NAND_INIT	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_NAND_INIT$/;"	d
CONFIG_SPL_NAND_INIT	include/configs/P1010RDB.h	/^#define CONFIG_SPL_NAND_INIT$/;"	d
CONFIG_SPL_NAND_INIT	include/configs/P1022DS.h	/^#define CONFIG_SPL_NAND_INIT$/;"	d
CONFIG_SPL_NAND_INIT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_NAND_INIT$/;"	d
CONFIG_SPL_NAND_LOAD	include/configs/da850evm.h	/^#define CONFIG_SPL_NAND_LOAD$/;"	d
CONFIG_SPL_NAND_LOAD	include/configs/ipam390.h	/^#define CONFIG_SPL_NAND_LOAD$/;"	d
CONFIG_SPL_NAND_MINIMAL	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_NAND_MINIMAL$/;"	d
CONFIG_SPL_NAND_MINIMAL	include/configs/P1010RDB.h	/^#define CONFIG_SPL_NAND_MINIMAL$/;"	d
CONFIG_SPL_NAND_MXS	include/configs/imx6_spl.h	/^#define CONFIG_SPL_NAND_MXS$/;"	d
CONFIG_SPL_NAND_RAW_ONLY	include/configs/corvus.h	/^#define CONFIG_SPL_NAND_RAW_ONLY$/;"	d
CONFIG_SPL_NAND_RAW_ONLY	include/configs/devkit3250.h	/^#define CONFIG_SPL_NAND_RAW_ONLY$/;"	d
CONFIG_SPL_NAND_RAW_ONLY	include/configs/smartweb.h	/^#define CONFIG_SPL_NAND_RAW_ONLY$/;"	d
CONFIG_SPL_NAND_RAW_ONLY	include/configs/taurus.h	/^#define CONFIG_SPL_NAND_RAW_ONLY$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/am3517_crane.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/am3517_evm.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/cm_t35.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/da850evm.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/devkit3250.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/ipam390.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/mcx.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/omap3_evm.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/tao3530.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/tegra-common.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/ti_omap3_common.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SIMPLE	include/configs/tricorder.h	/^#define CONFIG_SPL_NAND_SIMPLE$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/corvus.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/devkit3250.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/mcx.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/smartweb.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/tam3517-common.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SOFTECC	include/configs/taurus.h	/^#define CONFIG_SPL_NAND_SOFTECC$/;"	d
CONFIG_SPL_NAND_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT	board/ti/common/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT	common/spl/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NAND_SUPPORT	include/configs/imx6qdl_icore.h	/^#  define CONFIG_SPL_NAND_SUPPORT$/;"	d
CONFIG_SPL_NAND_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_NAND_SUPPORT$/;"	d
CONFIG_SPL_NAND_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
CONFIG_SPL_NAND_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NAND_WORKSPACE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_NAND_WORKSPACE	/;"	d
CONFIG_SPL_NET_SUPPORT	common/spl/Kconfig	/^config SPL_NET_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NET_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_NET_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NET_VCI_STRING	common/spl/Kconfig	/^config SPL_NET_VCI_STRING$/;"	c	menu:SPL / TPL
CONFIG_SPL_NET_VCI_STRING	include/configs/baltos.h	/^#define CONFIG_SPL_NET_VCI_STRING	/;"	d
CONFIG_SPL_NET_VCI_STRING_MODULE	common/spl/Kconfig	/^config SPL_NET_VCI_STRING$/;"	c	menu:SPL / TPL
CONFIG_SPL_NOR_SUPPORT	common/spl/Kconfig	/^config SPL_NOR_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NOR_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_NOR_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NO_CPU_SUPPORT	common/spl/Kconfig	/^config SPL_NO_CPU_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_NO_CPU_SUPPORT_CODE	include/configs/mxs.h	/^#define CONFIG_SPL_NO_CPU_SUPPORT_CODE$/;"	d
CONFIG_SPL_NO_CPU_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_NO_CPU_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_OF_CONTROL	dts/Kconfig	/^config SPL_OF_CONTROL$/;"	c	menu:Device Tree Control
CONFIG_SPL_OF_CONTROL_MODULE	dts/Kconfig	/^config SPL_OF_CONTROL$/;"	c	menu:Device Tree Control
CONFIG_SPL_OF_LIBFDT	lib/Kconfig	/^config SPL_OF_LIBFDT$/;"	c	menu:Library routines
CONFIG_SPL_OF_LIBFDT_MODULE	lib/Kconfig	/^config SPL_OF_LIBFDT$/;"	c	menu:Library routines
CONFIG_SPL_OF_PLATDATA	dts/Kconfig	/^config SPL_OF_PLATDATA$/;"	c	menu:Device Tree Control
CONFIG_SPL_OF_PLATDATA_MODULE	dts/Kconfig	/^config SPL_OF_PLATDATA$/;"	c	menu:Device Tree Control
CONFIG_SPL_OF_TRANSLATE	drivers/core/Kconfig	/^config SPL_OF_TRANSLATE$/;"	c	menu:Generic Driver Options
CONFIG_SPL_OF_TRANSLATE_MODULE	drivers/core/Kconfig	/^config SPL_OF_TRANSLATE$/;"	c	menu:Generic Driver Options
CONFIG_SPL_OMAP3_ID_NAND	include/configs/cm_t35.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_OMAP3_ID_NAND	include/configs/omap3_beagle.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_OMAP3_ID_NAND	include/configs/omap3_cairo.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_OMAP3_ID_NAND	include/configs/omap3_evm.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_OMAP3_ID_NAND	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_OMAP3_ID_NAND	include/configs/omap3_logic.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_OMAP3_ID_NAND	include/configs/tao3530.h	/^#define CONFIG_SPL_OMAP3_ID_NAND$/;"	d
CONFIG_SPL_ONENAND_SUPPORT	common/spl/Kconfig	/^config SPL_ONENAND_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_ONENAND_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_ONENAND_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_OS_BOOT	common/spl/Kconfig	/^config SPL_OS_BOOT$/;"	c	menu:SPL / TPL
CONFIG_SPL_OS_BOOT	include/configs/mx6sabresd.h	/^#define CONFIG_SPL_OS_BOOT$/;"	d
CONFIG_SPL_OS_BOOT_MODULE	common/spl/Kconfig	/^config SPL_OS_BOOT$/;"	c	menu:SPL / TPL
CONFIG_SPL_PAD_TO	include/autoconf.mk	/^CONFIG_SPL_PAD_TO=32768$/;"	m
CONFIG_SPL_PAD_TO	include/config_fallbacks.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/B4860QDS.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/MPC8313ERDB.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/P1010RDB.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/P1022DS.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T102xQDS.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T102xRDB.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T104xRDB.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T208xQDS.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T208xRDB.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T4240QDS.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/T4240RDB.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/da850evm.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/devkit3250.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1043aqds.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1043ardb.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls1046aqds.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls2080aqds.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ls2080ardb.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/m53evk.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/sunxi-common.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	include/configs/work_92105.h	/^#define CONFIG_SPL_PAD_TO /;"	d
CONFIG_SPL_PAD_TO	include/configs/x600.h	/^#define CONFIG_SPL_PAD_TO	/;"	d
CONFIG_SPL_PAD_TO	spl/include/autoconf.mk	/^CONFIG_SPL_PAD_TO=32768$/;"	m
CONFIG_SPL_PBL_PAD	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_PBL_PAD$/;"	d
CONFIG_SPL_PBL_PAD	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_PBL_PAD$/;"	d
CONFIG_SPL_PINCONF	drivers/pinctrl/Kconfig	/^config SPL_PINCONF$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCONF_MODULE	drivers/pinctrl/Kconfig	/^config SPL_PINCONF$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCTRL	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCTRL_FULL	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL_FULL$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCTRL_FULL_MODULE	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL_FULL$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCTRL_GENERIC	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL_GENERIC$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCTRL_GENERIC_MODULE	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL_GENERIC$/;"	c	menu:Pin controllers
CONFIG_SPL_PINCTRL_MODULE	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL$/;"	c	menu:Pin controllers
CONFIG_SPL_PINMUX	drivers/pinctrl/Kconfig	/^config SPL_PINMUX$/;"	c	menu:Pin controllers
CONFIG_SPL_PINMUX_MODULE	drivers/pinctrl/Kconfig	/^config SPL_PINMUX$/;"	c	menu:Pin controllers
CONFIG_SPL_PMIC_CHILDREN	drivers/power/pmic/Kconfig	/^config SPL_PMIC_CHILDREN$/;"	c
CONFIG_SPL_PMIC_CHILDREN_MODULE	drivers/power/pmic/Kconfig	/^config SPL_PMIC_CHILDREN$/;"	c
CONFIG_SPL_POST_MEM_SUPPORT	common/spl/Kconfig	/^config SPL_POST_MEM_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_POST_MEM_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_POST_MEM_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_POWER_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT	board/sunxi/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT	board/ti/common/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT	common/spl/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_POWER_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_POWER_SUPPORT=y$/;"	k
CONFIG_SPL_POWER_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_POWER_SUPPORT /;"	d
CONFIG_SPL_POWER_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
CONFIG_SPL_POWER_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_PPAACT_ADDR	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_PPAACT_ADDR	/;"	d
CONFIG_SPL_PWRSEQ	drivers/misc/Kconfig	/^config SPL_PWRSEQ$/;"	c	menu:Multifunction device drivers
CONFIG_SPL_PWRSEQ_MODULE	drivers/misc/Kconfig	/^config SPL_PWRSEQ$/;"	c	menu:Multifunction device drivers
CONFIG_SPL_RAM	drivers/ram/Kconfig	/^config SPL_RAM$/;"	c
CONFIG_SPL_RAM_DEVICE	include/configs/microblaze-generic.h	/^#define CONFIG_SPL_RAM_DEVICE$/;"	d
CONFIG_SPL_RAM_DEVICE	include/configs/socfpga_common.h	/^#define CONFIG_SPL_RAM_DEVICE$/;"	d
CONFIG_SPL_RAM_DEVICE	include/configs/tegra-common.h	/^#define CONFIG_SPL_RAM_DEVICE$/;"	d
CONFIG_SPL_RAM_DEVICE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_RAM_DEVICE$/;"	d
CONFIG_SPL_RAM_DEVICE	include/configs/zynq-common.h	/^#define CONFIG_SPL_RAM_DEVICE$/;"	d
CONFIG_SPL_RAM_MODULE	drivers/ram/Kconfig	/^config SPL_RAM$/;"	c
CONFIG_SPL_REGMAP	drivers/core/Kconfig	/^config SPL_REGMAP$/;"	c	menu:Generic Driver Options
CONFIG_SPL_REGMAP_MODULE	drivers/core/Kconfig	/^config SPL_REGMAP$/;"	c	menu:Generic Driver Options
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_ADDR	include/configs/t4qds.h	/^#define CONFIG_SPL_RELOC_MALLOC_ADDR	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_MALLOC_SIZE	include/configs/t4qds.h	/^#define CONFIG_SPL_RELOC_MALLOC_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/B4860QDS.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/P1010RDB.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/P1022DS.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/T102xQDS.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/T102xRDB.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/T104xRDB.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/T208xQDS.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/T208xRDB.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/T4240RDB.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK	include/configs/t4qds.h	/^#define CONFIG_SPL_RELOC_STACK	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_STACK_SIZE	include/configs/t4qds.h	/^#define CONFIG_SPL_RELOC_STACK_SIZE	/;"	d
CONFIG_SPL_RELOC_TEXT_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_RELOC_TEXT_BASE	/;"	d
CONFIG_SPL_RELOC_TEXT_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_RELOC_TEXT_BASE	/;"	d
CONFIG_SPL_RELOC_TEXT_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_RELOC_TEXT_BASE	/;"	d
CONFIG_SPL_RELOC_TEXT_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SPL_RELOC_TEXT_BASE	/;"	d
CONFIG_SPL_RELOC_TEXT_BASE	include/configs/P1022DS.h	/^#define CONFIG_SPL_RELOC_TEXT_BASE	/;"	d
CONFIG_SPL_RELOC_TEXT_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_RELOC_TEXT_BASE	/;"	d
CONFIG_SPL_RSA	lib/rsa/Kconfig	/^config SPL_RSA$/;"	c
CONFIG_SPL_RSA_MODULE	lib/rsa/Kconfig	/^config SPL_RSA$/;"	c
CONFIG_SPL_SATA_BOOT_DEVICE	include/configs/cm_t54.h	/^#define CONFIG_SPL_SATA_BOOT_DEVICE	/;"	d
CONFIG_SPL_SATA_BOOT_DEVICE	include/configs/imx6_spl.h	/^#define CONFIG_SPL_SATA_BOOT_DEVICE	/;"	d
CONFIG_SPL_SATA_SUPPORT	common/spl/Kconfig	/^config SPL_SATA_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SATA_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_SATA_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SAVEENV	common/spl/Kconfig	/^config SPL_SAVEENV$/;"	c	menu:SPL / TPL
CONFIG_SPL_SAVEENV_MODULE	common/spl/Kconfig	/^config SPL_SAVEENV$/;"	c	menu:SPL / TPL
CONFIG_SPL_SEPARATE_BSS	common/spl/Kconfig	/^config SPL_SEPARATE_BSS$/;"	c	menu:SPL / TPL
CONFIG_SPL_SEPARATE_BSS_MODULE	common/spl/Kconfig	/^config SPL_SEPARATE_BSS$/;"	c	menu:SPL / TPL
CONFIG_SPL_SERIAL_PRESENT	drivers/serial/Kconfig	/^config SPL_SERIAL_PRESENT$/;"	c	menu:Serial drivers
CONFIG_SPL_SERIAL_PRESENT	include/config/auto.conf	/^CONFIG_SPL_SERIAL_PRESENT=y$/;"	k
CONFIG_SPL_SERIAL_PRESENT	include/generated/autoconf.h	/^#define CONFIG_SPL_SERIAL_PRESENT /;"	d
CONFIG_SPL_SERIAL_PRESENT_MODULE	drivers/serial/Kconfig	/^config SPL_SERIAL_PRESENT$/;"	c	menu:Serial drivers
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	board/sunxi/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	board/ti/common/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT	common/spl/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SERIAL_SUPPORT	include/config/auto.conf	/^CONFIG_SPL_SERIAL_SUPPORT=y$/;"	k
CONFIG_SPL_SERIAL_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_SERIAL_SUPPORT$/;"	d
CONFIG_SPL_SERIAL_SUPPORT	include/generated/autoconf.h	/^#define CONFIG_SPL_SERIAL_SUPPORT /;"	d
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/mach-tegra/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	board/sunxi/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	board/ti/common/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
CONFIG_SPL_SERIAL_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SHA1_SUPPORT	common/spl/Kconfig	/^config SPL_SHA1_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SHA1_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_SHA1_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SHA256_SUPPORT	common/spl/Kconfig	/^config SPL_SHA256_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SHA256_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_SHA256_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SIMPLE_BUS	drivers/core/Kconfig	/^config SPL_SIMPLE_BUS$/;"	c	menu:Generic Driver Options
CONFIG_SPL_SIMPLE_BUS_MODULE	drivers/core/Kconfig	/^config SPL_SIMPLE_BUS$/;"	c	menu:Generic Driver Options
CONFIG_SPL_SIZE	include/configs/clearfog.h	/^#define CONFIG_SPL_SIZE	/;"	d
CONFIG_SPL_SIZE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_SIZE	/;"	d
CONFIG_SPL_SIZE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_SIZE	/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/B4860QDS.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T102xQDS.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T102xRDB.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T104xRDB.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T208xQDS.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T208xRDB.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T4240QDS.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SKIP_RELOCATE	include/configs/T4240RDB.h	/^#define CONFIG_SPL_SKIP_RELOCATE$/;"	d
CONFIG_SPL_SPAACT_ADDR	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_SPAACT_ADDR	/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/P1010RDB.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/P1022DS.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/T102xQDS.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/T102xRDB.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/T104xRDB.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/T208xQDS.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/T208xRDB.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_BOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_SPI_BOOT$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/P1010RDB.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/P1022DS.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/T102xQDS.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/T102xRDB.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/T104xRDB.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/T208xQDS.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/T208xRDB.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_MINIMAL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_SPI_FLASH_MINIMAL$/;"	d
CONFIG_SPL_SPI_FLASH_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
CONFIG_SPL_SPI_FLASH_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
CONFIG_SPL_SPI_FLASH_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
CONFIG_SPL_SPI_FLASH_SUPPORT	common/spl/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SPI_FLASH_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
CONFIG_SPL_SPI_FLASH_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
CONFIG_SPL_SPI_FLASH_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
CONFIG_SPL_SPI_FLASH_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SPI_LOAD	include/configs/am335x_evm.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/am57xx_evm.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/bav335x.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/brppt1.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/cgtqmx6eval.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/chromebook_jerry.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/clearfog.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/cm_fx6.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/cm_t43.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/da850evm.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/db-88f6720.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/dra7xx_evm.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/ds414.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/el6x_common.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/maxbcm.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/ot1200.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/pcm051.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/pcm058.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/socfpga_common.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/taurus.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/theadorable.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_LOAD	include/configs/zynq-common.h	/^#define CONFIG_SPL_SPI_LOAD$/;"	d
CONFIG_SPL_SPI_SUNXI	drivers/mtd/spi/Kconfig	/^config SPL_SPI_SUNXI$/;"	c	menu:SPI Flash Support
CONFIG_SPL_SPI_SUNXI_MODULE	drivers/mtd/spi/Kconfig	/^config SPL_SPI_SUNXI$/;"	c	menu:SPI Flash Support
CONFIG_SPL_SPI_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
CONFIG_SPL_SPI_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
CONFIG_SPL_SPI_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
CONFIG_SPL_SPI_SUPPORT	common/spl/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_SPI_SUPPORT_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
CONFIG_SPL_SPI_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
CONFIG_SPL_SPI_SUPPORT_MODULE	arch/arm/mach-zynq/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
CONFIG_SPL_SPI_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK	include/autoconf.mk	/^CONFIG_SPL_STACK="LOW_LEVEL_SRAM_STACK"$/;"	m
CONFIG_SPL_STACK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/clearfog.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/corvus.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/da850evm.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/db-88f6720.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/devkit3250.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ds414.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/edminiv2.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/espresso7420.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/imx6_spl.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ipam390.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/m53evk.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/maxbcm.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/mcx.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/picosam9g45.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/rk3036_common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/rk3288_common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/sniper.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/socfpga_common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/sunxi-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tam3517-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/taurus.h	/^#define	CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tegra114-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tegra124-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tegra186-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tegra20-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tegra210-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/tegra30-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/theadorable.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/uniphier.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/work_92105.h	/^#define CONFIG_SPL_STACK /;"	d
CONFIG_SPL_STACK	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	include/configs/zynq-common.h	/^#define CONFIG_SPL_STACK	/;"	d
CONFIG_SPL_STACK	spl/include/autoconf.mk	/^CONFIG_SPL_STACK="LOW_LEVEL_SRAM_STACK"$/;"	m
CONFIG_SPL_STACK_ADDR	include/configs/microblaze-generic.h	/^# define CONFIG_SPL_STACK_ADDR	/;"	d
CONFIG_SPL_STACK_R	common/spl/Kconfig	/^config SPL_STACK_R$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK_R	include/config/auto.conf	/^CONFIG_SPL_STACK_R=y$/;"	k
CONFIG_SPL_STACK_R	include/configs/smartweb.h	/^#define CONFIG_SPL_STACK_R$/;"	d
CONFIG_SPL_STACK_R	include/generated/autoconf.h	/^#define CONFIG_SPL_STACK_R /;"	d
CONFIG_SPL_STACK_R_ADDR	board/sunxi/Kconfig	/^config SPL_STACK_R_ADDR$/;"	c
CONFIG_SPL_STACK_R_ADDR	common/spl/Kconfig	/^config SPL_STACK_R_ADDR$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK_R_ADDR	include/config/auto.conf	/^CONFIG_SPL_STACK_R_ADDR=0x4fe00000$/;"	k
CONFIG_SPL_STACK_R_ADDR	include/configs/smartweb.h	/^#define CONFIG_SPL_STACK_R_ADDR	/;"	d
CONFIG_SPL_STACK_R_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_SPL_STACK_R_ADDR	/;"	d
CONFIG_SPL_STACK_R_ADDR	include/generated/autoconf.h	/^#define CONFIG_SPL_STACK_R_ADDR /;"	d
CONFIG_SPL_STACK_R_ADDR_MODULE	board/sunxi/Kconfig	/^config SPL_STACK_R_ADDR$/;"	c
CONFIG_SPL_STACK_R_ADDR_MODULE	common/spl/Kconfig	/^config SPL_STACK_R_ADDR$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN	common/spl/Kconfig	/^config SPL_STACK_R_MALLOC_SIMPLE_LEN$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN	include/config/auto.conf	/^CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x100000$/;"	k
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN	include/generated/autoconf.h	/^#define CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN /;"	d
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN_MODULE	common/spl/Kconfig	/^config SPL_STACK_R_MALLOC_SIMPLE_LEN$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK_R_MODULE	common/spl/Kconfig	/^config SPL_STACK_R$/;"	c	menu:SPL / TPL
CONFIG_SPL_STACK_SIZE	include/configs/microblaze-generic.h	/^#define CONFIG_SPL_STACK_SIZE	/;"	d
CONFIG_SPL_STACK_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_STACK_SIZE	/;"	d
CONFIG_SPL_START_S_PATH	include/configs/mxs.h	/^#define CONFIG_SPL_START_S_PATH	/;"	d
CONFIG_SPL_START_S_PATH	include/configs/x600.h	/^#define	CONFIG_SPL_START_S_PATH	/;"	d
CONFIG_SPL_SYSCON	drivers/core/Kconfig	/^config SPL_SYSCON$/;"	c	menu:Generic Driver Options
CONFIG_SPL_SYSCON_MODULE	drivers/core/Kconfig	/^config SPL_SYSCON$/;"	c	menu:Generic Driver Options
CONFIG_SPL_SYS_MALLOC_SIMPLE	common/spl/Kconfig	/^config SPL_SYS_MALLOC_SIMPLE$/;"	c	menu:SPL / TPL
CONFIG_SPL_SYS_MALLOC_SIMPLE	include/config/auto.conf	/^CONFIG_SPL_SYS_MALLOC_SIMPLE=y$/;"	k
CONFIG_SPL_SYS_MALLOC_SIMPLE	include/generated/autoconf.h	/^#define CONFIG_SPL_SYS_MALLOC_SIMPLE /;"	d
CONFIG_SPL_SYS_MALLOC_SIMPLE_MODULE	common/spl/Kconfig	/^config SPL_SYS_MALLOC_SIMPLE$/;"	c	menu:SPL / TPL
CONFIG_SPL_TARGET	include/configs/B4860QDS.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/P1010RDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/P1022DS.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T102xQDS.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T102xRDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T104xRDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T208xQDS.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T208xRDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T4240QDS.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/T4240RDB.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/a3m071.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/apf27.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/m53evk.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/mx31pdk.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TARGET	include/configs/uniphier.h	/^#define CONFIG_SPL_TARGET	/;"	d
CONFIG_SPL_TEXT_BASE	include/autoconf.mk	/^CONFIG_SPL_TEXT_BASE=0x40$/;"	m
CONFIG_SPL_TEXT_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/P1022DS.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/a3m071.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/am43xx_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/apf27.h	/^#define CONFIG_SPL_TEXT_BASE /;"	d
CONFIG_SPL_TEXT_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/bur_am335x_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/clearfog.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/cm_t35.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/cm_t43.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/corvus.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/da850evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/db-88f6720.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/devkit3250.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/devkit8000.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ds414.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/edminiv2.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/exynos5250-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/exynos5420-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/imx6_spl.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ipam390.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/k2e_evm.h	/^#define CONFIG_SPL_TEXT_BASE /;"	d
CONFIG_SPL_TEXT_BASE	include/configs/k2g_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/k2hk_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/k2l_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/kc1.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ls1043a_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/m53evk.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ma5d4evk.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/maxbcm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/mcx.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/mx31pdk.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/mxs.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/omap3_logic.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/omap3_overo.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/origen.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/picosam9g45.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/rk3036_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/rk3288_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sama5d2_xplained.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sama5d4ek.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/smartweb.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/smdkv310.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sniper.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/sunxi-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tam3517-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tao3530.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/taurus.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tegra114-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tegra124-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tegra186-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tegra20-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tegra210-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tegra30-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/theadorable.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ti814x_evm.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ti816x_evm.h	/^#define CONFIG_SPL_TEXT_BASE /;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ti_am335x_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ti_omap3_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ti_omap4_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/ti_omap5_common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/tricorder.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/uniphier.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/woodburn_sd.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/work_92105.h	/^#define CONFIG_SPL_TEXT_BASE /;"	d
CONFIG_SPL_TEXT_BASE	include/configs/x600.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	include/configs/zynq-common.h	/^#define CONFIG_SPL_TEXT_BASE	/;"	d
CONFIG_SPL_TEXT_BASE	spl/include/autoconf.mk	/^CONFIG_SPL_TEXT_BASE=0x40$/;"	m
CONFIG_SPL_UBI	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI	/;"	d
CONFIG_SPL_UBI_INFO_ADDR	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_INFO_ADDR	/;"	d
CONFIG_SPL_UBI_LEB_START	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_LEB_START	/;"	d
CONFIG_SPL_UBI_LOAD_ARGS_ID	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_LOAD_ARGS_ID	/;"	d
CONFIG_SPL_UBI_LOAD_KERNEL_ID	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_LOAD_KERNEL_ID	/;"	d
CONFIG_SPL_UBI_LOAD_MONITOR_ID	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_LOAD_MONITOR_ID	/;"	d
CONFIG_SPL_UBI_MAX_PEBS	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_MAX_PEBS	/;"	d
CONFIG_SPL_UBI_MAX_PEB_SIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_MAX_PEB_SIZE	/;"	d
CONFIG_SPL_UBI_MAX_VOL_LEBS	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_MAX_VOL_LEBS	/;"	d
CONFIG_SPL_UBI_PEB_OFFSET	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_PEB_OFFSET	/;"	d
CONFIG_SPL_UBI_VID_OFFSET	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_VID_OFFSET	/;"	d
CONFIG_SPL_UBI_VOL_IDS	include/configs/omap3_igep00x0.h	/^#define CONFIG_SPL_UBI_VOL_IDS	/;"	d
CONFIG_SPL_UBOOT_KEY_HASH	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_UBOOT_KEY_HASH	/;"	d
CONFIG_SPL_UBOOT_KEY_HASH	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SPL_UBOOT_KEY_HASH	/;"	d
CONFIG_SPL_USBETH_SUPPORT	common/spl/Kconfig	/^config SPL_USBETH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_USBETH_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_USBETH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_USB_HOST_SUPPORT	common/spl/Kconfig	/^config SPL_USB_HOST_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_USB_HOST_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_USB_HOST_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_USB_SUPPORT	common/spl/Kconfig	/^config SPL_USB_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_USB_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_USB_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_WATCHDOG_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c
CONFIG_SPL_WATCHDOG_SUPPORT	board/ti/am335x/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c
CONFIG_SPL_WATCHDOG_SUPPORT	common/spl/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_WATCHDOG_SUPPORT	include/configs/ls1046a_common.h	/^#define CONFIG_SPL_WATCHDOG_SUPPORT$/;"	d
CONFIG_SPL_WATCHDOG_SUPPORT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c
CONFIG_SPL_WATCHDOG_SUPPORT_MODULE	board/ti/am335x/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c
CONFIG_SPL_WATCHDOG_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_YMODEM_SUPPORT	board/ti/am335x/Kconfig	/^config SPL_YMODEM_SUPPORT$/;"	c
CONFIG_SPL_YMODEM_SUPPORT	common/spl/Kconfig	/^config SPL_YMODEM_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_YMODEM_SUPPORT_MODULE	board/ti/am335x/Kconfig	/^config SPL_YMODEM_SUPPORT$/;"	c
CONFIG_SPL_YMODEM_SUPPORT_MODULE	common/spl/Kconfig	/^config SPL_YMODEM_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_SPL_ZYNQMP_ALT_BOOTMODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_ZYNQMP_ALT_BOOTMODE$/;"	c
CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED$/;"	c
CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED$/;"	c
CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_ZYNQMP_ALT_BOOTMODE$/;"	c
CONFIG_SPMI	drivers/spmi/Kconfig	/^config SPMI$/;"	c	menu:SPMI support
CONFIG_SPMI_MODULE	drivers/spmi/Kconfig	/^config SPMI$/;"	c	menu:SPMI support
CONFIG_SPMI_MSM	drivers/spmi/Kconfig	/^config SPMI_MSM$/;"	c	menu:SPMI support
CONFIG_SPMI_MSM_MODULE	drivers/spmi/Kconfig	/^config SPMI_MSM$/;"	c	menu:SPMI support
CONFIG_SPMI_SANDBOX	drivers/spmi/Kconfig	/^config SPMI_SANDBOX$/;"	c	menu:SPMI support
CONFIG_SPMI_SANDBOX_MODULE	drivers/spmi/Kconfig	/^config SPMI_SANDBOX$/;"	c	menu:SPMI support
CONFIG_SRAM_BASE	include/configs/ethernut5.h	/^#define CONFIG_SRAM_BASE	/;"	d
CONFIG_SRAM_BASE	include/configs/x600.h	/^#define CONFIG_SRAM_BASE	/;"	d
CONFIG_SRAM_SIZE	include/configs/ethernut5.h	/^#define CONFIG_SRAM_SIZE	/;"	d
CONFIG_SRAM_SIZE	include/configs/x600.h	/^#define CONFIG_SRAM_SIZE	/;"	d
CONFIG_SRIO1	include/configs/B4860QDS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/MPC8548CDS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/MPC8568MDS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/MPC8569MDS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/MPC8641HPCN.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/P2041RDB.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/P3041DS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/P4080DS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/P5020DS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/T208xQDS.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/sbc8641d.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO1	include/configs/t4qds.h	/^#define CONFIG_SRIO1	/;"	d
CONFIG_SRIO2	include/configs/B4860QDS.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO2	include/configs/P2041RDB.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO2	include/configs/P3041DS.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO2	include/configs/P4080DS.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO2	include/configs/P5020DS.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO2	include/configs/T208xQDS.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO2	include/configs/t4qds.h	/^#define CONFIG_SRIO2	/;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	/;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/P3041DS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/P4080DS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/P5020DS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_MASTER	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_MASTER$/;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	/;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	/;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	/;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	/;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE /;"	d
CONFIG_SSD_BR_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_SSD_BR_PRELIM	/;"	d
CONFIG_SSD_OR_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_SSD_OR_PRELIM	/;"	d
CONFIG_SSI1_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_SSI1_FREQ	/;"	d
CONFIG_SSI2_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_SSI2_FREQ	/;"	d
CONFIG_SSP1_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SSP1_BASE	/;"	d
CONFIG_SSP2_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SSP2_BASE	/;"	d
CONFIG_SSP3_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SSP3_BASE	/;"	d
CONFIG_STACKBASE	arch/blackfin/include/asm/config.h	/^# define CONFIG_STACKBASE /;"	d
CONFIG_STACKBASE	include/configs/tegra114-common.h	/^#define CONFIG_STACKBASE	/;"	d
CONFIG_STACKBASE	include/configs/tegra124-common.h	/^#define CONFIG_STACKBASE	/;"	d
CONFIG_STACKBASE	include/configs/tegra186-common.h	/^#define CONFIG_STACKBASE	/;"	d
CONFIG_STACKBASE	include/configs/tegra20-common.h	/^#define CONFIG_STACKBASE	/;"	d
CONFIG_STACKBASE	include/configs/tegra210-common.h	/^#define CONFIG_STACKBASE	/;"	d
CONFIG_STACKBASE	include/configs/tegra30-common.h	/^#define CONFIG_STACKBASE	/;"	d
CONFIG_STACKSIZE	include/autoconf.mk	/^CONFIG_STACKSIZE="(256 << 10)"$/;"	m
CONFIG_STACKSIZE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_STACKSIZE /;"	d
CONFIG_STACKSIZE	include/configs/aristainetos-common.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/atngw100.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/atngw100mkii.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/atstk1002.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/bcm_ep_board.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/cm_fx6.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/colibri_imx7.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/colibri_vf.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/edb93xx.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/el6x_common.h	/^#define CONFIG_STACKSIZE /;"	d
CONFIG_STACKSIZE	include/configs/embestmx6boards.h	/^#define CONFIG_STACKSIZE /;"	d
CONFIG_STACKSIZE	include/configs/ge_bx50v3.h	/^#define CONFIG_STACKSIZE /;"	d
CONFIG_STACKSIZE	include/configs/grasshopper.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/ls1021aqds.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/ls1021atwr.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/ls1043aqds.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/ls1046aqds.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/mx6sabre_common.h	/^#define CONFIG_STACKSIZE /;"	d
CONFIG_STACKSIZE	include/configs/mx6slevk.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/mx6sxsabresd.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/mx6ullevk.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/mx7dsabresd.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/nokia_rx51.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/pcm052.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/pic32mzdask.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/pico-imx6ul.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/s32v234evb.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/stm32f429-discovery.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/stm32f746-disco.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/sunxi-common.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/tao3530.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/tqma6.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/vf610twr.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/warp.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/warp7.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	include/configs/woodburn_common.h	/^#define CONFIG_STACKSIZE	/;"	d
CONFIG_STACKSIZE	spl/include/autoconf.mk	/^CONFIG_STACKSIZE="(256 << 10)"$/;"	m
CONFIG_STACKSIZE_FIQ	include/configs/edb93xx.h	/^#define CONFIG_STACKSIZE_FIQ	/;"	d
CONFIG_STACKSIZE_IRQ	include/configs/edb93xx.h	/^#define CONFIG_STACKSIZE_IRQ	/;"	d
CONFIG_STANDALONE_LOAD_ADDR	arch/arc/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/arm/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR = 0x80300000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/arm/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR = 0xc100000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_STANDALONE_LOAD_ADDR	/;"	d
CONFIG_STANDALONE_LOAD_ADDR	arch/avr32/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/blackfin/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x1000 -m elf32bfin$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/m68k/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x20000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/microblaze/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x80F00000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/mips/cpu/mips32/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 \\$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/mips/cpu/mips64/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 \\$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/nds32/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR = 0x300000 \\$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/nios2/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x02000000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/openrisc/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/powerpc/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/sh/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x8C000000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/sparc/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 -L $(gcclibdir) \\$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	arch/x86/config.mk	/^CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	include/autoconf.mk	/^CONFIG_STANDALONE_LOAD_ADDR=$(CONFIG_SYS_LOAD_ADDR)$/;"	m
CONFIG_STANDALONE_LOAD_ADDR	include/configs/kzm9g.h	/^#define CONFIG_STANDALONE_LOAD_ADDR	/;"	d
CONFIG_STANDALONE_LOAD_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_STANDALONE_LOAD_ADDR	/;"	d
CONFIG_STANDALONE_LOAD_ADDR	include/configs/xtfpga.h	/^#define CONFIG_STANDALONE_LOAD_ADDR	/;"	d
CONFIG_STANDALONE_LOAD_ADDR	spl/include/autoconf.mk	/^CONFIG_STANDALONE_LOAD_ADDR=$(CONFIG_SYS_LOAD_ADDR)$/;"	m
CONFIG_STATIC_RELA	arch/arm/include/asm/config.h	/^#define CONFIG_STATIC_RELA$/;"	d
CONFIG_STATUS_LED	include/configs/TQM823L.h	/^# define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM823M.h	/^# define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM850L.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM850M.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM855L.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM855M.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM860L.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM860M.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM862L.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM862M.h	/^#define	CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM866M.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/TQM885D.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/cm_t335.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/cm_t35.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/cm_t3517.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/eb_cpu5282.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/edb93xx.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/motionpro.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/mx23_olinuxino.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/omap3_beagle.h	/^#define CONFIG_STATUS_LED	/;"	d
CONFIG_STATUS_LED	include/configs/omap3_igep00x0.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/tqma6_wru4.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/tricorder.h	/^#define CONFIG_STATUS_LED$/;"	d
CONFIG_STATUS_LED	include/configs/v38b.h	/^#define  CONFIG_STATUS_LED	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/bayleybay.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/chromebook_samus.h	/^#define CONFIG_STD_DEVICES_SETTINGS /;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_STD_DEVICES_SETTINGS /;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/cougarcanyon2.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/crownbay.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/dfi-bt700.h	/^#define CONFIG_STD_DEVICES_SETTINGS /;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/efi-x86.h	/^#define CONFIG_STD_DEVICES_SETTINGS /;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/galileo.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/minnowmax.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/qemu-x86.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/som-6896.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/som-db5800-som-6867.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STD_DEVICES_SETTINGS	include/configs/x86-chromebook.h	/^#define CONFIG_STD_DEVICES_SETTINGS	/;"	d
CONFIG_STK52XX	include/configs/TQM5200.h	/^#define CONFIG_STK52XX	/;"	d
CONFIG_STM32	arch/arm/Kconfig	/^config STM32$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_STM32F1	arch/arm/mach-stm32/Kconfig	/^config STM32F1$/;"	c
CONFIG_STM32F1_MODULE	arch/arm/mach-stm32/Kconfig	/^config STM32F1$/;"	c
CONFIG_STM32F4	arch/arm/mach-stm32/Kconfig	/^config STM32F4$/;"	c
CONFIG_STM32F4DISCOVERY	include/configs/stm32f429-discovery.h	/^#define CONFIG_STM32F4DISCOVERY$/;"	d
CONFIG_STM32F4_MODULE	arch/arm/mach-stm32/Kconfig	/^config STM32F4$/;"	c
CONFIG_STM32F7	arch/arm/mach-stm32/Kconfig	/^config STM32F7$/;"	c
CONFIG_STM32F7_MODULE	arch/arm/mach-stm32/Kconfig	/^config STM32F7$/;"	c
CONFIG_STM32X7_SERIAL	include/configs/stm32f746-disco.h	/^#define CONFIG_STM32X7_SERIAL$/;"	d
CONFIG_STM32_FLASH	include/configs/stm32f429-discovery.h	/^#define CONFIG_STM32_FLASH$/;"	d
CONFIG_STM32_FLASH	include/configs/stm32f746-disco.h	/^#define CONFIG_STM32_FLASH$/;"	d
CONFIG_STM32_GPIO	include/configs/stm32f429-discovery.h	/^#define CONFIG_STM32_GPIO$/;"	d
CONFIG_STM32_GPIO	include/configs/stm32f746-disco.h	/^#define CONFIG_STM32_GPIO$/;"	d
CONFIG_STM32_HSE_HZ	include/configs/stm32f429-discovery.h	/^#define CONFIG_STM32_HSE_HZ	/;"	d
CONFIG_STM32_HSE_HZ	include/configs/stm32f746-disco.h	/^#define CONFIG_STM32_HSE_HZ	/;"	d
CONFIG_STM32_HZ	arch/arm/include/asm/arch-stm32f7/gpt.h	/^#define CONFIG_STM32_HZ	/;"	d
CONFIG_STM32_MODULE	arch/arm/Kconfig	/^config STM32$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_STM32_SERIAL	include/configs/stm32f429-discovery.h	/^#define CONFIG_STM32_SERIAL$/;"	d
CONFIG_STRIDER	include/configs/strider.h	/^#define CONFIG_STRIDER	/;"	d
CONFIG_STRIDER_FANS	include/configs/strider.h	/^#define CONFIG_STRIDER_FANS	/;"	d
CONFIG_STUART	include/configs/zipitz2.h	/^#define	CONFIG_STUART	/;"	d
CONFIG_STV0991_HZ	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define CONFIG_STV0991_HZ	/;"	d
CONFIG_STV0991_HZ_CLOCK	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define CONFIG_STV0991_HZ_CLOCK	/;"	d
CONFIG_ST_SMI	include/configs/spear-common.h	/^#define CONFIG_ST_SMI$/;"	d
CONFIG_ST_SMI	include/configs/x600.h	/^#define CONFIG_ST_SMI$/;"	d
CONFIG_SUN8I_EMAC	drivers/net/Kconfig	/^config SUN8I_EMAC$/;"	c
CONFIG_SUN8I_EMAC	include/config/auto.conf	/^CONFIG_SUN8I_EMAC=y$/;"	k
CONFIG_SUN8I_EMAC	include/generated/autoconf.h	/^#define CONFIG_SUN8I_EMAC /;"	d
CONFIG_SUN8I_EMAC_MODULE	drivers/net/Kconfig	/^config SUN8I_EMAC$/;"	c
CONFIG_SUNXI_AHCI	include/configs/sunxi-common.h	/^#define CONFIG_SUNXI_AHCI$/;"	d
CONFIG_SUNXI_DE2	include/autoconf.mk	/^CONFIG_SUNXI_DE2=y$/;"	m
CONFIG_SUNXI_DE2	include/configs/sun8i.h	/^	#define CONFIG_SUNXI_DE2	/;"	d
CONFIG_SUNXI_DE2	spl/include/autoconf.mk	/^CONFIG_SUNXI_DE2=y$/;"	m
CONFIG_SUNXI_GEN_SUN4I	board/sunxi/Kconfig	/^config SUNXI_GEN_SUN4I$/;"	c
CONFIG_SUNXI_GEN_SUN4I_MODULE	board/sunxi/Kconfig	/^config SUNXI_GEN_SUN4I$/;"	c
CONFIG_SUNXI_GEN_SUN6I	board/sunxi/Kconfig	/^config SUNXI_GEN_SUN6I$/;"	c
CONFIG_SUNXI_GEN_SUN6I	include/config/auto.conf	/^CONFIG_SUNXI_GEN_SUN6I=y$/;"	k
CONFIG_SUNXI_GEN_SUN6I	include/generated/autoconf.h	/^#define CONFIG_SUNXI_GEN_SUN6I /;"	d
CONFIG_SUNXI_GEN_SUN6I_MODULE	board/sunxi/Kconfig	/^config SUNXI_GEN_SUN6I$/;"	c
CONFIG_SUNXI_GPIO	include/autoconf.mk	/^CONFIG_SUNXI_GPIO=y$/;"	m
CONFIG_SUNXI_GPIO	include/configs/sunxi-common.h	/^#define CONFIG_SUNXI_GPIO$/;"	d
CONFIG_SUNXI_GPIO	spl/include/autoconf.mk	/^CONFIG_SUNXI_GPIO=y$/;"	m
CONFIG_SUNXI_MAX_FB_SIZE	include/autoconf.mk	/^CONFIG_SUNXI_MAX_FB_SIZE="(32 << 20)"$/;"	m
CONFIG_SUNXI_MAX_FB_SIZE	include/configs/sunxi-common.h	/^#define CONFIG_SUNXI_MAX_FB_SIZE /;"	d
CONFIG_SUNXI_MAX_FB_SIZE	spl/include/autoconf.mk	/^CONFIG_SUNXI_MAX_FB_SIZE="(32 << 20)"$/;"	m
CONFIG_SUNXI_NO_PMIC	drivers/power/Kconfig	/^config SUNXI_NO_PMIC$/;"	c	choice:Power""choice187d87300104
CONFIG_SUNXI_NO_PMIC	include/config/auto.conf	/^CONFIG_SUNXI_NO_PMIC=y$/;"	k
CONFIG_SUNXI_NO_PMIC	include/generated/autoconf.h	/^#define CONFIG_SUNXI_NO_PMIC /;"	d
CONFIG_SUNXI_NO_PMIC_MODULE	drivers/power/Kconfig	/^config SUNXI_NO_PMIC$/;"	c	choice:Power""choice187d87300104
CONFIG_SUNXI_USB_PHYS	include/autoconf.mk	/^CONFIG_SUNXI_USB_PHYS=4$/;"	m
CONFIG_SUNXI_USB_PHYS	include/configs/sun4i.h	/^#define CONFIG_SUNXI_USB_PHYS	/;"	d
CONFIG_SUNXI_USB_PHYS	include/configs/sun50i.h	/^#define CONFIG_SUNXI_USB_PHYS	/;"	d
CONFIG_SUNXI_USB_PHYS	include/configs/sun5i.h	/^#define CONFIG_SUNXI_USB_PHYS	/;"	d
CONFIG_SUNXI_USB_PHYS	include/configs/sun6i.h	/^#define CONFIG_SUNXI_USB_PHYS	/;"	d
CONFIG_SUNXI_USB_PHYS	include/configs/sun7i.h	/^#define CONFIG_SUNXI_USB_PHYS	/;"	d
CONFIG_SUNXI_USB_PHYS	include/configs/sun8i.h	/^	#define CONFIG_SUNXI_USB_PHYS	/;"	d
CONFIG_SUNXI_USB_PHYS	spl/include/autoconf.mk	/^CONFIG_SUNXI_USB_PHYS=4$/;"	m
CONFIG_SUPERH_ON_CHIP_R8A66597	include/configs/ecovec.h	/^#define CONFIG_SUPERH_ON_CHIP_R8A66597$/;"	d
CONFIG_SUPPORTS_BIG_ENDIAN	arch/mips/Kconfig	/^config SUPPORTS_BIG_ENDIAN$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_BIG_ENDIAN_MODULE	arch/mips/Kconfig	/^config SUPPORTS_BIG_ENDIAN$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS32_R1	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R1$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS32_R1_MODULE	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R1$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS32_R2	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R2$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS32_R2_MODULE	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R2$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS32_R6	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R6$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS32_R6_MODULE	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R6$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS64_R1	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R1$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS64_R1_MODULE	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R1$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS64_R2	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R2$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS64_R2_MODULE	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R2$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS64_R6	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R6$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_CPU_MIPS64_R6_MODULE	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R6$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_LITTLE_ENDIAN	arch/mips/Kconfig	/^config SUPPORTS_LITTLE_ENDIAN$/;"	c	menu:MIPS architecture
CONFIG_SUPPORTS_LITTLE_ENDIAN_MODULE	arch/mips/Kconfig	/^config SUPPORTS_LITTLE_ENDIAN$/;"	c	menu:MIPS architecture
CONFIG_SUPPORT_EMMC_BOOT	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/am57xx_evm.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/arndale.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/brppt1.h	/^ #define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/brxre1.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/cm_t54.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/dra7xx_evm.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/embestmx6boards.h	/^#define CONFIG_SUPPORT_EMMC_BOOT /;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/exynos5-common.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/ge_bx50v3.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/mx6sabresd.h	/^#define CONFIG_SUPPORT_EMMC_BOOT /;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/mx7dsabresd.h	/^#define CONFIG_SUPPORT_EMMC_BOOT	/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/omap5_uevm.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/pico-imx6ul.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/tbs2910.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/uniphier.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/vinco.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/warp.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/warp7.h	/^#define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SUPPORT_EMMC_BOOT$/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/xpress.h	/^#define CONFIG_SUPPORT_EMMC_BOOT	/;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/zc5202.h	/^#define CONFIG_SUPPORT_EMMC_BOOT /;"	d
CONFIG_SUPPORT_EMMC_BOOT	include/configs/zc5601.h	/^#define CONFIG_SUPPORT_EMMC_BOOT /;"	d
CONFIG_SUPPORT_OF_CONTROL	dts/Kconfig	/^config SUPPORT_OF_CONTROL$/;"	c
CONFIG_SUPPORT_OF_CONTROL	include/config/auto.conf	/^CONFIG_SUPPORT_OF_CONTROL=y$/;"	k
CONFIG_SUPPORT_OF_CONTROL	include/generated/autoconf.h	/^#define CONFIG_SUPPORT_OF_CONTROL /;"	d
CONFIG_SUPPORT_OF_CONTROL_MODULE	dts/Kconfig	/^config SUPPORT_OF_CONTROL$/;"	c
CONFIG_SUPPORT_RAW_INITRD	include/autoconf.mk	/^CONFIG_SUPPORT_RAW_INITRD=y$/;"	m
CONFIG_SUPPORT_RAW_INITRD	include/config_distro_defaults.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/hikey.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/ls1012a_common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/ls1043a_common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/ls1046a_common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/ls2080a_common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/lsxl.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/mx53loco.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/mx6_common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/origen.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/rcar-gen3-common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/ti_armv7_common.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_RAW_INITRD	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SUPPORT_RAW_INITRD$/;"	d
CONFIG_SUPPORT_SPL	common/spl/Kconfig	/^config SUPPORT_SPL$/;"	c	menu:SPL / TPL
CONFIG_SUPPORT_SPL	include/config/auto.conf	/^CONFIG_SUPPORT_SPL=y$/;"	k
CONFIG_SUPPORT_SPL	include/generated/autoconf.h	/^#define CONFIG_SUPPORT_SPL /;"	d
CONFIG_SUPPORT_SPL_MODULE	common/spl/Kconfig	/^config SUPPORT_SPL$/;"	c	menu:SPL / TPL
CONFIG_SUPPORT_TPL	common/spl/Kconfig	/^config SUPPORT_TPL$/;"	c	menu:SPL / TPL
CONFIG_SUPPORT_TPL_MODULE	common/spl/Kconfig	/^config SUPPORT_TPL$/;"	c	menu:SPL / TPL
CONFIG_SUPPORT_VFAT	include/configs/CPCI4052.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/MIP405.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/MPC8349ITX.h	/^	#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/PIP405.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/PLU405.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/PMC440.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/acadia.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/apf27.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/bamboo.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/clearfog.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/db-88f6720.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/db-88f6820-amc.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/db-88f6820-gp.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/ds414.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/edminiv2.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/gplugd.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/lwmon5.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/mpc5121ads.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/mv-common.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/nas220.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/pic32mzdask.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/rcar-gen2-common.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/rcar-gen3-common.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/rk3399_common.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/sequoia.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/theadorable.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/vct.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/x600.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/x86-common.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/yosemite.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/zmx25.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/configs/zynq-common.h	/^# define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SUPPORT_VFAT	include/fat.h	/^#define CONFIG_SUPPORT_VFAT$/;"	d
CONFIG_SWAP_IO_SPACE	arch/mips/Kconfig	/^config SWAP_IO_SPACE$/;"	c	menu:MIPS architecture
CONFIG_SWAP_IO_SPACE_MODULE	arch/mips/Kconfig	/^config SWAP_IO_SPACE$/;"	c	menu:MIPS architecture
CONFIG_SX151X_SPI_BUS	drivers/gpio/sx151x.c	/^#define CONFIG_SX151X_SPI_BUS /;"	d	file:
CONFIG_SY8106A_POWER	drivers/power/Kconfig	/^config SY8106A_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_SY8106A_POWER_MODULE	drivers/power/Kconfig	/^config SY8106A_POWER$/;"	c	choice:Power""choice187d87300104
CONFIG_SY8106A_VOUT1_VOLT	drivers/power/Kconfig	/^config SY8106A_VOUT1_VOLT$/;"	c	menu:Power
CONFIG_SY8106A_VOUT1_VOLT_MODULE	drivers/power/Kconfig	/^config SY8106A_VOUT1_VOLT$/;"	c	menu:Power
CONFIG_SYSCON	drivers/core/Kconfig	/^config SYSCON$/;"	c	menu:Generic Driver Options
CONFIG_SYSCON_MODULE	drivers/core/Kconfig	/^config SYSCON$/;"	c	menu:Generic Driver Options
CONFIG_SYSCOUNTER_TIMER	include/configs/mx7_common.h	/^#define CONFIG_SYSCOUNTER_TIMER$/;"	d
CONFIG_SYSFLAGS_ADDR	include/configs/vexpress_ca15_tc2.h	/^#define CONFIG_SYSFLAGS_ADDR	/;"	d
CONFIG_SYSRESET	drivers/sysreset/Kconfig	/^config SYSRESET$/;"	c	menu:System reset device drivers
CONFIG_SYSRESET_MODULE	drivers/sysreset/Kconfig	/^config SYSRESET$/;"	c	menu:System reset device drivers
CONFIG_SYSTEMACE	include/configs/icon.h	/^#define CONFIG_SYSTEMACE	/;"	d
CONFIG_SYSTEMACE	include/configs/katmai.h	/^#define CONFIG_SYSTEMACE	/;"	d
CONFIG_SYSTEMACE	include/configs/sandbox.h	/^#define CONFIG_SYSTEMACE$/;"	d
CONFIG_SYS_460GT_SRIO_ERRATA_1	include/configs/canyonlands.h	/^#define CONFIG_SYS_460GT_SRIO_ERRATA_1$/;"	d
CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY	include/configs/io64.h	/^#define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY$/;"	d
CONFIG_SYS_4xx_CHIP_21_ERRATA	arch/powerpc/include/asm/processor.h	/^#define CONFIG_SYS_4xx_CHIP_21_ERRATA$/;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/canyonlands.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/dlvision.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/intip.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/io.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/io64.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/iocon.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/kilauea.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/lwmon5.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/makalu.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/neo.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/sequoia.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_GPIO_TABLE	include/configs/t3corp.h	/^#define CONFIG_SYS_4xx_GPIO_TABLE /;"	d
CONFIG_SYS_4xx_RESET_TYPE	include/configs/icon.h	/^#define CONFIG_SYS_4xx_RESET_TYPE /;"	d
CONFIG_SYS_4xx_RESET_TYPE	include/configs/katmai.h	/^#define CONFIG_SYS_4xx_RESET_TYPE	/;"	d
CONFIG_SYS_64BIT	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_64BIT$/;"	d
CONFIG_SYS_64BIT_LBA	include/configs/highbank.h	/^#define CONFIG_SYS_64BIT_LBA$/;"	d
CONFIG_SYS_64BIT_LBA	include/configs/lsxl.h	/^#define CONFIG_SYS_64BIT_LBA$/;"	d
CONFIG_SYS_64BIT_LBA	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_64BIT_LBA$/;"	d
CONFIG_SYS_64BIT_LBA	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_64BIT_LBA$/;"	d
CONFIG_SYS_64BIT_LBA	include/configs/sunxi-common.h	/^#define CONFIG_SYS_64BIT_LBA$/;"	d
CONFIG_SYS_64BIT_LBA	include/configs/x86-common.h	/^#define CONFIG_SYS_64BIT_LBA$/;"	d
CONFIG_SYS_64BIT_VSPRINTF	include/configs/s32v234evb.h	/^#define CONFIG_SYS_64BIT_VSPRINTF	/;"	d
CONFIG_SYS_8313ERDB_BROKEN_PMC	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_8313ERDB_BROKEN_PMC /;"	d
CONFIG_SYS_83XX_DDR_USES_CS0	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_83XX_DDR_USES_CS0$/;"	d
CONFIG_SYS_83XX_DDR_USES_CS0	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_83XX_DDR_USES_CS0$/;"	d
CONFIG_SYS_83XX_DDR_USES_CS0	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_83XX_DDR_USES_CS0$/;"	d
CONFIG_SYS_83XX_DDR_USES_CS0	include/configs/sbc8349.h	/^#define CONFIG_SYS_83XX_DDR_USES_CS0	/;"	d
CONFIG_SYS_83XX_DDR_USES_CS0	include/configs/vme8349.h	/^#define CONFIG_SYS_83XX_DDR_USES_CS0	/;"	d
CONFIG_SYS_8XX_XIN	include/configs/TQM866M.h	/^#define CONFIG_SYS_8XX_XIN	/;"	d
CONFIG_SYS_8xx_CPUCLK_MAX	include/configs/TQM866M.h	/^#define CONFIG_SYS_8xx_CPUCLK_MAX	/;"	d
CONFIG_SYS_8xx_CPUCLK_MAX	include/configs/TQM885D.h	/^#define CONFIG_SYS_8xx_CPUCLK_MAX	/;"	d
CONFIG_SYS_8xx_CPUCLK_MIN	include/configs/TQM866M.h	/^#define CONFIG_SYS_8xx_CPUCLK_MIN	/;"	d
CONFIG_SYS_8xx_CPUCLK_MIN	include/configs/TQM885D.h	/^#define CONFIG_SYS_8xx_CPUCLK_MIN	/;"	d
CONFIG_SYS_ACE_BASE	include/configs/icon.h	/^#define CONFIG_SYS_ACE_BASE	/;"	d
CONFIG_SYS_ACE_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_ACE_BASE	/;"	d
CONFIG_SYS_ACE_BASE_PHYS_H	include/configs/icon.h	/^#define CONFIG_SYS_ACE_BASE_PHYS_H	/;"	d
CONFIG_SYS_ACE_BASE_PHYS_L	include/configs/icon.h	/^#define CONFIG_SYS_ACE_BASE_PHYS_L	/;"	d
CONFIG_SYS_ACR_APARK	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_ACR_APARK /;"	d
CONFIG_SYS_ACR_PARKM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_ACR_PARKM /;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/hrcon.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/ids8313.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_ACR_PIPE_DEP /;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/strider.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_PIPE_DEP	include/configs/ve8313.h	/^#define CONFIG_SYS_ACR_PIPE_DEP	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/hrcon.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/ids8313.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_ACR_RPTCNT /;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/strider.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ACR_RPTCNT	include/configs/ve8313.h	/^#define CONFIG_SYS_ACR_RPTCNT	/;"	d
CONFIG_SYS_ADV7611_I2C	include/configs/strider.h	/^#define CONFIG_SYS_ADV7611_I2C	/;"	d
CONFIG_SYS_AHB_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_AHB_BASE	/;"	d
CONFIG_SYS_AHB_BASE	include/configs/intip.h	/^#define CONFIG_SYS_AHB_BASE	/;"	d
CONFIG_SYS_ALE_MASK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_ALE_MASK	/;"	d
CONFIG_SYS_ALT_FLASH	include/configs/sbc8548.h	/^#define CONFIG_SYS_ALT_FLASH	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/B4860QDS.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/P2041RDB.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/T1040QDS.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/T4240RDB.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/TQM5200.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/TQM885D.h	/^#define CONFIG_SYS_ALT_MEMTEST	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/VCMA9.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/ac14xx.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/clearfog.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/cm5200.h	/^#define CONFIG_SYS_ALT_MEMTEST	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/corenet_ds.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/cyrus.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/db-88f6720.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/ds414.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/inka4x0.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/jupiter.h	/^#define CONFIG_SYS_ALT_MEMTEST	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_ALT_MEMTEST	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/manroland/common.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/maxbcm.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/motionpro.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/mv-plug-common.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_ALT_MEMTEST	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/strider.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/t4qds.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/tao3530.h	/^#define CONFIG_SYS_ALT_MEMTEST	/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/theadorable.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/tricorder.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/xpedite1000.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/xpedite517x.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/xpedite520x.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/xpedite537x.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_ALT_MEMTEST	include/configs/xpedite550x.h	/^#define CONFIG_SYS_ALT_MEMTEST$/;"	d
CONFIG_SYS_AMASK0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_AMASK0	/;"	d
CONFIG_SYS_AMASK1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_AMASK1	/;"	d
CONFIG_SYS_AMASK1_FINAL	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_AMASK1_FINAL	/;"	d
CONFIG_SYS_AMASK2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_AMASK2	/;"	d
CONFIG_SYS_AMASK2_FINAL	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_AMASK2_FINAL	/;"	d
CONFIG_SYS_AMASK3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMASK3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_AMASK3	/;"	d
CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP	cmd/Kconfig	/^config SYS_AMBAPP_PRINT_ON_STARTUP$/;"	c	menu:Command line interface""Misc commands
CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP_MODULE	cmd/Kconfig	/^config SYS_AMBAPP_PRINT_ON_STARTUP$/;"	c	menu:Command line interface""Misc commands
CONFIG_SYS_APP1_BASE	include/configs/suvd3.h	/^#define CONFIG_SYS_APP1_BASE	/;"	d
CONFIG_SYS_APP1_BASE	include/configs/tuxx1.h	/^#define CONFIG_SYS_APP1_BASE	/;"	d
CONFIG_SYS_APP1_SIZE	include/configs/suvd3.h	/^#define CONFIG_SYS_APP1_SIZE	/;"	d
CONFIG_SYS_APP1_SIZE	include/configs/tuxx1.h	/^#define	CONFIG_SYS_APP1_SIZE	/;"	d
CONFIG_SYS_APP2_BASE	include/configs/suvd3.h	/^#define CONFIG_SYS_APP2_BASE	/;"	d
CONFIG_SYS_APP2_BASE	include/configs/tuxx1.h	/^#define CONFIG_SYS_APP2_BASE	/;"	d
CONFIG_SYS_APP2_SIZE	include/configs/suvd3.h	/^#define CONFIG_SYS_APP2_SIZE	/;"	d
CONFIG_SYS_APP2_SIZE	include/configs/tuxx1.h	/^#define	CONFIG_SYS_APP2_SIZE	/;"	d
CONFIG_SYS_ARCH	arch/Kconfig	/^config SYS_ARCH$/;"	c
CONFIG_SYS_ARCH	arch/arc/Kconfig	/^config SYS_ARCH$/;"	c	menu:ARC architecture
CONFIG_SYS_ARCH	arch/arm/Kconfig	/^config SYS_ARCH$/;"	c	menu:ARM architecture
CONFIG_SYS_ARCH	arch/avr32/Kconfig	/^config SYS_ARCH$/;"	c	menu:AVR32 architecture
CONFIG_SYS_ARCH	arch/blackfin/Kconfig	/^config SYS_ARCH$/;"	c	menu:Blackfin architecture
CONFIG_SYS_ARCH	arch/m68k/Kconfig	/^config SYS_ARCH$/;"	c	menu:M68000 architecture
CONFIG_SYS_ARCH	arch/microblaze/Kconfig	/^config SYS_ARCH$/;"	c	menu:MicroBlaze architecture
CONFIG_SYS_ARCH	arch/mips/Kconfig	/^config SYS_ARCH$/;"	c	menu:MIPS architecture
CONFIG_SYS_ARCH	arch/nds32/Kconfig	/^config SYS_ARCH$/;"	c	menu:NDS32 architecture
CONFIG_SYS_ARCH	arch/nios2/Kconfig	/^config SYS_ARCH$/;"	c	menu:Nios II architecture
CONFIG_SYS_ARCH	arch/openrisc/Kconfig	/^config SYS_ARCH$/;"	c	menu:OpenRISC architecture
CONFIG_SYS_ARCH	arch/powerpc/Kconfig	/^config SYS_ARCH$/;"	c	menu:PowerPC architecture
CONFIG_SYS_ARCH	arch/sandbox/Kconfig	/^config SYS_ARCH$/;"	c	menu:Sandbox architecture
CONFIG_SYS_ARCH	arch/sh/Kconfig	/^config SYS_ARCH$/;"	c	menu:SuperH architecture
CONFIG_SYS_ARCH	arch/sparc/Kconfig	/^config SYS_ARCH$/;"	c	menu:SPARC architecture
CONFIG_SYS_ARCH	arch/x86/Kconfig	/^config SYS_ARCH$/;"	c	menu:x86 architecture
CONFIG_SYS_ARCH	arch/xtensa/Kconfig	/^config SYS_ARCH$/;"	c	menu:Xtensa architecture
CONFIG_SYS_ARCH	include/config/auto.conf	/^CONFIG_SYS_ARCH="arm"$/;"	k
CONFIG_SYS_ARCH	include/generated/autoconf.h	/^#define CONFIG_SYS_ARCH /;"	d
CONFIG_SYS_ARCH_MODULE	arch/Kconfig	/^config SYS_ARCH$/;"	c
CONFIG_SYS_ARCH_MODULE	arch/arc/Kconfig	/^config SYS_ARCH$/;"	c	menu:ARC architecture
CONFIG_SYS_ARCH_MODULE	arch/arm/Kconfig	/^config SYS_ARCH$/;"	c	menu:ARM architecture
CONFIG_SYS_ARCH_MODULE	arch/avr32/Kconfig	/^config SYS_ARCH$/;"	c	menu:AVR32 architecture
CONFIG_SYS_ARCH_MODULE	arch/blackfin/Kconfig	/^config SYS_ARCH$/;"	c	menu:Blackfin architecture
CONFIG_SYS_ARCH_MODULE	arch/m68k/Kconfig	/^config SYS_ARCH$/;"	c	menu:M68000 architecture
CONFIG_SYS_ARCH_MODULE	arch/microblaze/Kconfig	/^config SYS_ARCH$/;"	c	menu:MicroBlaze architecture
CONFIG_SYS_ARCH_MODULE	arch/mips/Kconfig	/^config SYS_ARCH$/;"	c	menu:MIPS architecture
CONFIG_SYS_ARCH_MODULE	arch/nds32/Kconfig	/^config SYS_ARCH$/;"	c	menu:NDS32 architecture
CONFIG_SYS_ARCH_MODULE	arch/nios2/Kconfig	/^config SYS_ARCH$/;"	c	menu:Nios II architecture
CONFIG_SYS_ARCH_MODULE	arch/openrisc/Kconfig	/^config SYS_ARCH$/;"	c	menu:OpenRISC architecture
CONFIG_SYS_ARCH_MODULE	arch/powerpc/Kconfig	/^config SYS_ARCH$/;"	c	menu:PowerPC architecture
CONFIG_SYS_ARCH_MODULE	arch/sandbox/Kconfig	/^config SYS_ARCH$/;"	c	menu:Sandbox architecture
CONFIG_SYS_ARCH_MODULE	arch/sh/Kconfig	/^config SYS_ARCH$/;"	c	menu:SuperH architecture
CONFIG_SYS_ARCH_MODULE	arch/sparc/Kconfig	/^config SYS_ARCH$/;"	c	menu:SPARC architecture
CONFIG_SYS_ARCH_MODULE	arch/x86/Kconfig	/^config SYS_ARCH$/;"	c	menu:x86 architecture
CONFIG_SYS_ARCH_MODULE	arch/xtensa/Kconfig	/^config SYS_ARCH$/;"	c	menu:Xtensa architecture
CONFIG_SYS_ARCH_TIMER	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_ARCH_TIMER$/;"	d
CONFIG_SYS_ARIA_FPGA_BASE	include/configs/aria.h	/^#define CONFIG_SYS_ARIA_FPGA_BASE	/;"	d
CONFIG_SYS_ARIA_FPGA_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_ARIA_FPGA_SIZE	/;"	d
CONFIG_SYS_ARIA_SRAM_BASE	include/configs/aria.h	/^#define CONFIG_SYS_ARIA_SRAM_BASE	/;"	d
CONFIG_SYS_ARIA_SRAM_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_ARIA_SRAM_SIZE	/;"	d
CONFIG_SYS_ARM_ARCH	arch/arm/Kconfig	/^config SYS_ARM_ARCH$/;"	c	menu:ARM architecture
CONFIG_SYS_ARM_ARCH	include/config/auto.conf	/^CONFIG_SYS_ARM_ARCH=7$/;"	k
CONFIG_SYS_ARM_ARCH	include/generated/autoconf.h	/^#define CONFIG_SYS_ARM_ARCH /;"	d
CONFIG_SYS_ARM_ARCH_MODULE	arch/arm/Kconfig	/^config SYS_ARM_ARCH$/;"	c	menu:ARM architecture
CONFIG_SYS_ARM_CACHE_WRITETHROUGH	arch/arm/include/asm/iproc-common/configs.h	/^#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH$/;"	d
CONFIG_SYS_ARM_CACHE_WRITETHROUGH	include/configs/VCMA9.h	/^#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH$/;"	d
CONFIG_SYS_ARM_CACHE_WRITETHROUGH	include/configs/pxa-common.h	/^#define	CONFIG_SYS_ARM_CACHE_WRITETHROUGH$/;"	d
CONFIG_SYS_ARM_CACHE_WRITETHROUGH	include/configs/smdk2410.h	/^#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH$/;"	d
CONFIG_SYS_AT91_CPU_NAME	include/configs/pm9261.h	/^#define CONFIG_SYS_AT91_CPU_NAME	/;"	d
CONFIG_SYS_AT91_CPU_NAME	include/configs/pm9263.h	/^#define CONFIG_SYS_AT91_CPU_NAME	/;"	d
CONFIG_SYS_AT91_CPU_NAME	include/configs/pm9g45.h	/^#define CONFIG_SYS_AT91_CPU_NAME	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	arch/arm/mach-at91/arm920t/cpu.c	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d	file:
CONFIG_SYS_AT91_MAIN_CLOCK	arch/arm/mach-at91/arm926ejs/cpu.c	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d	file:
CONFIG_SYS_AT91_MAIN_CLOCK	arch/arm/mach-at91/armv7/cpu.c	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d	file:
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/corvus.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/ethernut5.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/meesc.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/picosam9g45.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/pm9261.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/pm9263.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/pm9g45.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/smartweb.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/snapper9260.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/snapper9g45.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK /;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/taurus.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_MAIN_CLOCK	include/configs/usb_a9263.h	/^#define CONFIG_SYS_AT91_MAIN_CLOCK	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/corvus.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/picosam9g45.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/smartweb.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLA	include/configs/taurus.h	/^#define CONFIG_SYS_AT91_PLLA	/;"	d
CONFIG_SYS_AT91_PLLB	include/configs/smartweb.h	/^#define CONFIG_SYS_AT91_PLLB	/;"	d
CONFIG_SYS_AT91_PLLB	include/configs/taurus.h	/^#define CONFIG_SYS_AT91_PLLB	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK /;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK /;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/corvus.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK /;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/ethernut5.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/meesc.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/picosam9g45.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK /;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/pm9261.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/pm9263.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/pm9g45.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/smartweb.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/snapper9260.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/snapper9g45.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/taurus.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_AT91_SLOW_CLOCK	include/configs/usb_a9263.h	/^#define CONFIG_SYS_AT91_SLOW_CLOCK	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/PLU405.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM5200.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM823L.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM823M.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM850L.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM850M.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM855L.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM855M.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM860L.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM860M.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM862L.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM862M.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/a4m072.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/ap325rxa.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/aria.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/dbau1x00.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET /;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/edminiv2.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/inka4x0.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/ipek01.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/ms7720se.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/qemu-x86.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/r2dplus.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/r7780mp.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET /;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/sandbox.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_ALT_OFFSET	include/configs/v38b.h	/^#define CONFIG_SYS_ATA_ALT_OFFSET	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/MIP405.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/PIP405.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM5200.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM823L.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM823M.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM850L.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM850M.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM855L.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM860L.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM860M.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM862L.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM862M.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/a4m072.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/ap325rxa.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/aria.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/dbau1x00.h	/^#define CONFIG_SYS_ATA_BASE_ADDR /;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/edminiv2.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/inka4x0.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/ipek01.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/malta.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/motionpro.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/ms7720se.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/qemu-mips.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/qemu-x86.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/r2dplus.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/r7780mp.h	/^#define CONFIG_SYS_ATA_BASE_ADDR /;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/sandbox.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_BASE_ADDR	include/configs/v38b.h	/^#define CONFIG_SYS_ATA_BASE_ADDR	/;"	d
CONFIG_SYS_ATA_CS_ON_I2C2	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_CS_ON_I2C2$/;"	d
CONFIG_SYS_ATA_CS_ON_TIMER01	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_CS_ON_TIMER01$/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/PLU405.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM5200.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM823L.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM823M.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM850L.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM850M.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM855L.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM855M.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM860L.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM860M.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM862L.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM862M.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/a4m072.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/ap325rxa.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/aria.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/dbau1x00.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET /;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/edminiv2.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/inka4x0.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/ipek01.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/malta.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/motionpro.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/ms7720se.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/qemu-mips.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/qemu-x86.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/r2dplus.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/r7780mp.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET /;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/sandbox.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_DATA_OFFSET	include/configs/v38b.h	/^#define CONFIG_SYS_ATA_DATA_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/PLU405.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM5200.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM823L.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM823M.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM850L.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM850M.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM855L.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM855M.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM860L.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM860M.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM862L.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM862M.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/a4m072.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/aria.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/dbau1x00.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/dns325.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET /;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/dreamplug.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/ds109.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/edminiv2.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/goflexhome.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET /;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/guruplug.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/ib62x0.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/inka4x0.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/ipek01.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/lacie_kw.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET /;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/lsxl.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/malta.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/ms7720se.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/nas220.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET /;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/nsa310s.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/openrd.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/qemu-mips.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/qemu-x86.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/sandbox.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/sheevaplug.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE0_OFFSET	include/configs/v38b.h	/^#define CONFIG_SYS_ATA_IDE0_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/dns325.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET /;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/ib62x0.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/lacie_kw.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET /;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/nas220.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET /;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/openrd.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/qemu-mips.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/qemu-x86.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_IDE1_OFFSET	include/configs/sheevaplug.h	/^#define CONFIG_SYS_ATA_IDE1_OFFSET	/;"	d
CONFIG_SYS_ATA_PORT_ADDR	common/ide.c	/^#define CONFIG_SYS_ATA_PORT_ADDR(/;"	d	file:
CONFIG_SYS_ATA_REG_OFFSET	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/PLU405.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM5200.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM823L.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM823M.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM850L.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM850M.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM855L.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM855M.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM860L.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM860M.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM862L.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM862M.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/a4m072.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/ap325rxa.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/aria.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/dbau1x00.h	/^#define CONFIG_SYS_ATA_REG_OFFSET /;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/edminiv2.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/inka4x0.h	/^#define CONFIG_SYS_ATA_REG_OFFSET /;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/ipek01.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/malta.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/motionpro.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/ms7720se.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/qemu-mips.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/qemu-x86.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/r2dplus.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/r7780mp.h	/^#define CONFIG_SYS_ATA_REG_OFFSET /;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/sandbox.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_REG_OFFSET	include/configs/v38b.h	/^#define CONFIG_SYS_ATA_REG_OFFSET	/;"	d
CONFIG_SYS_ATA_STRIDE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/ata.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/TQM5200.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/a4m072.h	/^#define CONFIG_SYS_ATA_STRIDE /;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/aria.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/edminiv2.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/inka4x0.h	/^#define CONFIG_SYS_ATA_STRIDE /;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/ipek01.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_ATA_STRIDE /;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/motionpro.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/pcm030.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/r2dplus.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/r7780mp.h	/^#define CONFIG_SYS_ATA_STRIDE /;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/sandbox.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATA_STRIDE	include/configs/v38b.h	/^#define CONFIG_SYS_ATA_STRIDE	/;"	d
CONFIG_SYS_ATI_REV_A11	include/radeon.h	/^#define CONFIG_SYS_ATI_REV_A11	/;"	d
CONFIG_SYS_ATI_REV_A12	include/radeon.h	/^#define CONFIG_SYS_ATI_REV_A12	/;"	d
CONFIG_SYS_ATI_REV_A13	include/radeon.h	/^#define CONFIG_SYS_ATI_REV_A13	/;"	d
CONFIG_SYS_ATI_REV_ID_MASK	include/radeon.h	/^#define CONFIG_SYS_ATI_REV_ID_MASK	/;"	d
CONFIG_SYS_ATMEL_BASE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ATMEL_BASE	/;"	d
CONFIG_SYS_ATMEL_BASE	include/configs/shmin.h	/^#define CONFIG_SYS_ATMEL_BASE	/;"	d
CONFIG_SYS_ATMEL_CPU_NAME	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define CONFIG_SYS_ATMEL_CPU_NAME	/;"	d
CONFIG_SYS_ATMEL_REGION	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_ATMEL_REGION	/;"	d
CONFIG_SYS_ATMEL_REGION	include/configs/shmin.h	/^#define CONFIG_SYS_ATMEL_REGION	/;"	d
CONFIG_SYS_ATMEL_SECT	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_ATMEL_SECT	/;"	d
CONFIG_SYS_ATMEL_SECT	include/configs/shmin.h	/^#define CONFIG_SYS_ATMEL_SECT	/;"	d
CONFIG_SYS_ATMEL_SECTSZ	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_ATMEL_SECTSZ	/;"	d
CONFIG_SYS_ATMEL_SECTSZ	include/configs/shmin.h	/^#define CONFIG_SYS_ATMEL_SECTSZ	/;"	d
CONFIG_SYS_ATMEL_TOTALSECT	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_ATMEL_TOTALSECT	/;"	d
CONFIG_SYS_ATMEL_TOTALSECT	include/configs/shmin.h	/^#define CONFIG_SYS_ATMEL_TOTALSECT	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/a3m071.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/a4m072.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/apf27.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/bfin_adi_common.h	/^#   define CONFIG_SYS_AUTOLOAD /;"	d
CONFIG_SYS_AUTOLOAD	include/configs/blackstamp.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/cm_t335.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/cm_t35.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/cm_t3517.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/cm_t54.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/ethernut5.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_AUTOLOAD	/;"	d
CONFIG_SYS_AUTOLOAD	include/configs/smartweb.h	/^#define CONFIG_SYS_AUTOLOAD /;"	d
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION	include/configs/duovero.h	/^#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION$/;"	d
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION$/;"	d
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION$/;"	d
CONFIG_SYS_AUXCORE_BOOTDATA	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_AUXCORE_BOOTDATA /;"	d
CONFIG_SYS_AUXCORE_BOOTDATA	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_AUXCORE_BOOTDATA /;"	d
CONFIG_SYS_BARGSIZE	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	common/image.c	/^#define CONFIG_SYS_BARGSIZE /;"	d	file:
CONFIG_SYS_BARGSIZE	include/autoconf.mk	/^CONFIG_SYS_BARGSIZE=$(CONFIG_SYS_CBSIZE)$/;"	m
CONFIG_SYS_BARGSIZE	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5272C3.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/MigoR.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/PATI.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/VCMA9.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/amcc-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/amcore.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/apalis_t30.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/apf27.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/aria.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/axs10x.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/bur_cfg_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/calimain.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/canmb.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/cobra5272.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/colibri_t20.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/colibri_t30.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ea20.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ecovec.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/edb93xx.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/espt.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/exynos-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/flea3.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/grsim.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/highbank.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/hikey.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/integrator-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/kzm9g.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/legoev3.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/lwmon5.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/manroland/common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mcx.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mpr2.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ms7720se.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ms7722se.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ms7750se.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/munices.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx31ads.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx51evk.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx53ard.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx53evk.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx53loco.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx53smd.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx6_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mx7_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/mxs.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/nsim.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/pcm052.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/r0p7734.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/r2dplus.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/r7780mp.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/rsk7203.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/shmin.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/smdk2410.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/smdkc100.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/socrates.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/spear-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/strider.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/tb100.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/tegra-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ts4800.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/uniphier.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/usbarmory.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/v38b.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/vf610twr.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_BARGSIZE /;"	d
CONFIG_SYS_BARGSIZE	include/configs/work_92105.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/x600.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/x86-common.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_BARGSIZE	/;"	d
CONFIG_SYS_BARGSIZE	spl/include/autoconf.mk	/^CONFIG_SYS_BARGSIZE=$(CONFIG_SYS_CBSIZE)$/;"	m
CONFIG_SYS_BASE_BAUD	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/CPCI4052.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/MIP405.h	/^#define CONFIG_SYS_BASE_BAUD /;"	d
CONFIG_SYS_BASE_BAUD	include/configs/PIP405.h	/^#define CONFIG_SYS_BASE_BAUD /;"	d
CONFIG_SYS_BASE_BAUD	include/configs/PLU405.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/PMC405DE.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/VOM405.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/acadia.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/bubinga.h	/^#define CONFIG_SYS_BASE_BAUD /;"	d
CONFIG_SYS_BASE_BAUD	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/dlvision.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/io.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/io64.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/iocon.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/neo.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BASE_BAUD	include/configs/walnut.h	/^#define CONFIG_SYS_BASE_BAUD	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/autoconf.mk	/^CONFIG_SYS_BAUDRATE_TABLE="{ 9600, 19200, 38400, 57600, 115200 }"$/;"	m
CONFIG_SYS_BAUDRATE_TABLE	include/config_fallbacks.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MIP405.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/MigoR.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/P1022DS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/PATI.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/PIP405.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/PLU405.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/PMC440.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/TQM5200.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/TQM834x.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/UCP1020.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/VOM405.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/a3m071.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/a4m072.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/amcc-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/amcore.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ap121.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ap143.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/aria.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/atngw100.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/atstk1002.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/canmb.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/cm5200.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/cm_t35.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/cyrus.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ecovec.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/edb93xx.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/edminiv2.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/espt.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/grsim.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/h2200.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/hrcon.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ids8313.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/inka4x0.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ipek01.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/jupiter.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/kc1.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/kzm9g.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/lwmon5.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mcx.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mecp5123.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/motionpro.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mpr2.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ms7720se.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ms7722se.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/munices.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mv-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/p1_twr.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/pcm030.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/pcm051.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/r0p7734.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/rsk7203.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/rsk7264.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/rsk7269.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sandbox.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sbc8349.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sbc8548.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/shmin.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/sniper.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/socrates.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/spear-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/strider.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/t4qds.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/tricorder.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/v38b.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/ve8313.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/vme8349.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/x600.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/x86-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xilinx-ppc.h	/^# define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/xtfpga.h	/^#define CONFIG_SYS_BAUDRATE_TABLE	/;"	d
CONFIG_SYS_BAUDRATE_TABLE	include/configs/zynq-common.h	/^#define CONFIG_SYS_BAUDRATE_TABLE /;"	d
CONFIG_SYS_BAUDRATE_TABLE	spl/include/autoconf.mk	/^CONFIG_SYS_BAUDRATE_TABLE="{ 9600, 19200, 38400, 57600, 115200 }"$/;"	m
CONFIG_SYS_BCR	include/configs/km82xx.h	/^#define CONFIG_SYS_BCR	/;"	d
CONFIG_SYS_BCSR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BCSR	/;"	d
CONFIG_SYS_BCSR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BCSR	/;"	d
CONFIG_SYS_BCSR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BCSR	/;"	d
CONFIG_SYS_BCSR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BCSR	/;"	d
CONFIG_SYS_BCSR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BCSR	/;"	d
CONFIG_SYS_BCSR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BCSR /;"	d
CONFIG_SYS_BCSR3_PCIE	board/gdsys/intip/intip.c	/^#define CONFIG_SYS_BCSR3_PCIE	/;"	d	file:
CONFIG_SYS_BCSR5_PCI66EN	include/configs/sequoia.h	/^#define CONFIG_SYS_BCSR5_PCI66EN	/;"	d
CONFIG_SYS_BCSR5_PCI66EN	include/configs/yosemite.h	/^#define CONFIG_SYS_BCSR5_PCI66EN	/;"	d
CONFIG_SYS_BCSR_ADDR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BCSR_ADDR	/;"	d
CONFIG_SYS_BCSR_BASE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BCSR_BASE	/;"	d
CONFIG_SYS_BCSR_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BCSR_BASE	/;"	d
CONFIG_SYS_BCSR_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_BCSR_BASE	/;"	d
CONFIG_SYS_BCSR_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_BCSR_BASE	/;"	d
CONFIG_SYS_BCSR_BASE	include/configs/yosemite.h	/^#define CONFIG_SYS_BCSR_BASE	/;"	d
CONFIG_SYS_BCSR_BASE_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BCSR_BASE_PHYS	/;"	d
CONFIG_SYS_BCSR_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BCSR_SIZE	/;"	d
CONFIG_SYS_BD_INFO_ADDR	arch/blackfin/cpu/cpu.c	/^# define CONFIG_SYS_BD_INFO_ADDR /;"	d	file:
CONFIG_SYS_BD_REV	include/configs/sbc8548.h	/^#define CONFIG_SYS_BD_REV	/;"	d
CONFIG_SYS_BFTIC3_BASE	include/configs/km8360.h	/^#define CONFIG_SYS_BFTIC3_BASE	/;"	d
CONFIG_SYS_BFTIC3_SIZE	include/configs/km8360.h	/^#define CONFIG_SYS_BFTIC3_SIZE	/;"	d
CONFIG_SYS_BIG_ENDIAN	arch/arc/config.mk	/^CONFIG_SYS_BIG_ENDIAN = 1$/;"	m
CONFIG_SYS_BIG_ENDIAN	arch/mips/Kconfig	/^config SYS_BIG_ENDIAN$/;"	c	choice:MIPS architecture""choiced4351f5b0204
CONFIG_SYS_BIG_ENDIAN_MODULE	arch/mips/Kconfig	/^config SYS_BIG_ENDIAN$/;"	c	choice:MIPS architecture""choiced4351f5b0204
CONFIG_SYS_BITBANG_PHY_PORTS	drivers/qe/uec_phy.c	/^#define CONFIG_SYS_BITBANG_PHY_PORTS	/;"	d	file:
CONFIG_SYS_BLACK_IN_WRITE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_SYS_BLACK_IN_WRITE$/;"	d
CONFIG_SYS_BLACK_IN_WRITE	include/configs/xfi3.h	/^#define CONFIG_SYS_BLACK_IN_WRITE$/;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_CENA_BASE	/;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_CENA_BASE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE	/;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CENA_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_CINH_BASE	/;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_CINH_BASE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE	/;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_CINH_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_MEM_BASE	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_MEM_PHYS	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_MEM_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_MEM_SIZE	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_NUM_PORTALS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE	/;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CENA_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE	/;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SP_CINH_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG /;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T4240QDS.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG /;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG /;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/cyrus.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG /;"	d
CONFIG_SYS_BMAN_SWP_ISDR_REG	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_BOARD	arch/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	arch/arm/mach-bcm283x/Kconfig	/^config SYS_BOARD$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_BOARD	arch/arm/mach-highbank/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	arch/arm/mach-integrator/Kconfig	/^config SYS_BOARD$/;"	c	menu:Integrator Options
CONFIG_SYS_BOARD	arch/arm/mach-mvebu/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	arch/arm/mach-socfpga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	arch/arm/mach-zynq/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	arch/sandbox/Kconfig	/^config SYS_BOARD$/;"	c	menu:Sandbox architecture
CONFIG_SYS_BOARD	board/8dtech/eco5pk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Arcturus/ucp1020/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Barix/ipam390/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/BuR/brppt1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/BuR/brxre1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/BuS/eb_cpu5282/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/CarMediaLab/flea3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/LaCie/edminiv2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/LaCie/net2big_v2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/LaCie/netspace_v2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Marvell/aspenite/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Marvell/dreamplug/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Marvell/gplugd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Marvell/guruplug/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Marvell/openrd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Marvell/sheevaplug/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Seagate/dockstar/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Seagate/goflexhome/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Seagate/nas220/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/Synology/ds109/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/a3m071/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/a4m072/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/abilis/tb100/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/advantech/dms-ba16/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amazon/kc1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/acadia/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/bamboo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/bubinga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/canyonlands/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/katmai/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/kilauea/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/luan/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/makalu/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/redwood/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/sequoia/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/walnut/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/yosemite/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amcc/yucca/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/amlogic/odroid-c2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/aristainetos/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/armadeus/apf27/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/armltd/vexpress/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/armltd/vexpress64/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/astro/mcf5373l/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91rm9200ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9260ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9261ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9263ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9rlek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/atngw100/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/atngw100mkii/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/atstk1000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/sama5d3xek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/atmel/sama5d4ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/avionic-design/medcom-wide/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/avionic-design/plutux/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/avionic-design/tec-ng/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/avionic-design/tec/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bachmann/ot1200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/barco/platinum/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/barco/titanium/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bct-brettl2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf506f-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf518f-ezbrd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf525-ucr2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf526-ezbrd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf527-ad7160-eval/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf527-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf527-sdp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf533-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf533-stamp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf537-minotaur/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf537-pnav/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf537-srv1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf537-stamp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf538f-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf548-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf561-acvilon/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf561-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bf609-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/birdland/bav335x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/blackstamp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/blackvme/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bluegiga/apx4devkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bluewater/gurnard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bluewater/snapper9260/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/bosch/shc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/boundary/nitrogen6x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/br4/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/broadcom/bcmcygnus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/broadcom/bcmnsp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/buffalo/lsxl/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cadence/xtfpga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/calao/usb_a9263/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/canmb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cavium/thunderx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ccv/xpress/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cei/cei-tk1-som/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cirrus/edb93xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cloudengines/pogo_e02/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm-bf527/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm-bf533/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm-bf537e/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm-bf537u/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm-bf548/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm-bf561/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cm5200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/cobra5272/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compal/paz00/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/cm_fx6/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/cm_t335/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/cm_t35/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/cm_t3517/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/cm_t43/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/cm_t54/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/compulab/trimslice/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/coreboot/coreboot/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/corscience/tricorder/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/creative/xfi3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/d-link/dns325/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/davedenx/aria/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/davinci/da8xxevm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/davinci/ea20/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/dbau1x00/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/denx/m28evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/denx/m53evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/denx/ma5d4evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/dfi/dfi-bt700/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/dnp5370/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/efi/efi-x86/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/egnite/ethernut5/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/el/el6x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/embest/mx6boards/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/emulation/qemu-x86/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/engicam/icorem6/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/cpci2dp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/cpci405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/mecp5123/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/meesc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/plu405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/pmc405de/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/pmc440/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/vme8349/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/esd/vom405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/espt/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/firefly/firefly-rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/b4860qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/bsc9131rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/bsc9132qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/c29xpcie/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/corenet_ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1012afrdm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1012aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1012ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1021aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1021atwr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1043aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1043ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1046aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls1046ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls2080a/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls2080aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/ls2080ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5208evbe/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m52277evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5235evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5249evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5253demo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5253evbe/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5272c3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5275evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5282evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m53017evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5329evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m5373evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m54418twr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m54451evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m54455evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m547xevb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/m548xevb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc5121ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8308rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8313erdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8315erdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8323erdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc832xemds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8349emds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8349itx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc837xemds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc837xerdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8536ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8540ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8541cds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8544ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8548cds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8555cds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8560ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8568mds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8569mds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8572ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx23evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx25pdk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx28evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx31ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx31pdk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx35pdk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx51evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx53ard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx53evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx53loco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx53smd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6qarm2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6sabresd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6slevk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx6ullevk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/mx7dsabresd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/p1010rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/p1022ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/p1023rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/p1_twr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/p2041rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/qemu-ppce500/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/s32v234evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t102xqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t102xrdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t1040qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t104xrdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t208xqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t208xrdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t4qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/t4rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/freescale/vf610twr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gaisler/gr_cpci_ax2000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gaisler/gr_ep2s60/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gaisler/gr_xc3s_1500/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gaisler/grsim/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gaisler/grsim_leon2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gateworks/gw_ventana/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/405ep/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/405ex/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/dlvision/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/gdppc440etx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/intip/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/mpc8308/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gdsys/p1022/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ge/bx50v3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/google/chromebook_jerry/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/google/chromebook_link/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/google/chromebook_samus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/google/chromebox_panther/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gumstix/duovero/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/gumstix/pepper/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/h2200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/hisilicon/hikey/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/htkw/mcx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ibf-dsp561/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ids/ids8313/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ifm/ac14xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ifm/o2dnt2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/imgtec/boston/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/imgtec/malta/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/imgtec/xilfpga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/imx31_phycore/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/in-circuit/grasshopper/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/inka4x0/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/intel/bayleybay/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/intel/cougarcanyon2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/intel/crownbay/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/intel/galileo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/intel/minnowmax/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/inversepath/usbarmory/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/iomega/iconnect/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ip04/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ipek01/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/isee/igep0033/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/isee/igep00x0/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/jupiter/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/keymile/km82xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/keymile/km83xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/keymile/km_arm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/keymile/kmp204x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/kmc/kzm9g/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/kosagi/novena/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/l+g/vinco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/lego/ev3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/lg/sniper/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/liebherr/lwmon5/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/logicpd/am3517evm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/logicpd/omap3som/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/logicpd/zoom1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/microchip/pic32mzda/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/micronas/vct/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mini-box/picosam9g45/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mosaixtech/icon/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/motionpro/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mpc8308_p1m/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mpl/mip405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mpl/pati/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mpl/pip405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mpl/vcma9/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/mpr2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ms7720se/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ms7722se/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ms7750se/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/munices/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nokia/rx51/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/beaver/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/cardhu/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/dalmore/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/e2220-1170/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/harmony/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/jetson-tk1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/nyan-big/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/p2371-0000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/p2371-2180/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/p2571/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/p2771-0000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/seaboard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/venice2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/ventana/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/nvidia/whistler/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/omicron/calimain/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/openrisc/openrisc-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/overo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/pandora/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/pb1x00/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/pdm360ng/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/phytec/pcm030/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/phytec/pcm051/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/phytec/pcm052/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/phytec/pcm058/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ppcag/bg0900/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/pr1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/qca/ap121/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/qca/ap143/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/qemu-mips/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/quipos/cairo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/radxa/rock2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/raidsonic/ib62x0/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/MigoR/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/alt/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/ap325rxa/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/blanche/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/ecovec/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/gose/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/koelsch/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/lager/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/porter/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/r0p7734/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/r2dplus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/r7780mp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/rsk7203/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/rsk7264/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/rsk7269/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/salvator-x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/sh7752evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/sh7753evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/sh7757lcr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/sh7763rdp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/sh7785lcr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/silk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/renesas/stout/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/rockchip/evb_rk3036/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/rockchip/evb_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/rockchip/evb_rk3399/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ronetix/pm9261/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ronetix/pm9263/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ronetix/pm9g45/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/arndale/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/espresso7420/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/goni/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/odroid/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/origen/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/smdk2410/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/smdk5250/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/smdk5420/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/smdkc100/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/smdkv310/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/trats/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/trats2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/samsung/universal_c210/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/sbc8349/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/sbc8548/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/sbc8641d/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/seco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/shmin/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/siemens/corvus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/siemens/draco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/siemens/pxm2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/siemens/rut/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/siemens/smartweb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/siemens/taurus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/silica/pengwyn/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/socrates/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/spear/spear300/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/spear/spear310/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/spear/spear320/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/spear/spear600/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/spear/x600/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/st/stm32f429-discovery/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/st/stm32f746-disco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/st/stv0991/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/sunxi/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/synopsys/axs10x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/sysam/amcore/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/syteco/zmx25/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/t3corp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tbs/tbs2910/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tcl/sl50/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tcm-bf518/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tcm-bf537/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/technexion/pico-imx6ul/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/technexion/tao3530/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/technexion/twister/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/technologic/ts4800/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/teejet/mt_ventoux/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/am335x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/am3517crane/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/am43xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/am57xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/beagle/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/dra7xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/evm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/ks2_evm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/omap5_uevm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/panda/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/sdp4430/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/ti814x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ti/ti816x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/timll/devkit3250/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/timll/devkit8000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/toradex/apalis_t30/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/toradex/colibri_imx7/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/toradex/colibri_pxa270/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/toradex/colibri_t20/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/toradex/colibri_t30/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/toradex/colibri_vf/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tplink/wdr4300/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tqc/tqm5200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tqc/tqm834x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tqc/tqm8xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/tqc/tqma6/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/udoo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/v38b/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/varisys/cyrus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/ve8313/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/vscom/baltos/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/wandboard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/warp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/warp7/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/woodburn/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/work-microwave/work_92105/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xes/xpedite1000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xes/xpedite517x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xes/xpedite520x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xes/xpedite537x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xes/xpedite550x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xilinx/microblaze-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xilinx/ppc405-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/xilinx/ppc440-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/zipitz2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	board/zyxel/nsa310s/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD	include/config/auto.conf	/^CONFIG_SYS_BOARD="sunxi"$/;"	k
CONFIG_SYS_BOARD	include/configs/odroid_xu3.h	/^#define CONFIG_SYS_BOARD	/;"	d
CONFIG_SYS_BOARD	include/generated/autoconf.h	/^#define CONFIG_SYS_BOARD /;"	d
CONFIG_SYS_BOARD_MODULE	arch/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config SYS_BOARD$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_BOARD_MODULE	arch/arm/mach-highbank/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	arch/arm/mach-integrator/Kconfig	/^config SYS_BOARD$/;"	c	menu:Integrator Options
CONFIG_SYS_BOARD_MODULE	arch/arm/mach-mvebu/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	arch/arm/mach-zynq/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	arch/sandbox/Kconfig	/^config SYS_BOARD$/;"	c	menu:Sandbox architecture
CONFIG_SYS_BOARD_MODULE	board/8dtech/eco5pk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Arcturus/ucp1020/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Barix/ipam390/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/BuR/brppt1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/BuR/brxre1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/BuS/eb_cpu5282/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/CarMediaLab/flea3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/LaCie/edminiv2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/LaCie/net2big_v2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/LaCie/netspace_v2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Marvell/aspenite/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Marvell/dreamplug/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Marvell/gplugd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Marvell/guruplug/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Marvell/openrd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Marvell/sheevaplug/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Seagate/dockstar/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Seagate/goflexhome/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Seagate/nas220/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/Synology/ds109/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/a3m071/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/a4m072/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/abilis/tb100/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/advantech/dms-ba16/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amazon/kc1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/acadia/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/bamboo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/bubinga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/canyonlands/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/katmai/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/kilauea/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/luan/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/makalu/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/redwood/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/sequoia/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/walnut/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/yosemite/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amcc/yucca/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/amlogic/odroid-c2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/aristainetos/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/armadeus/apf27/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/armltd/vexpress/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/armltd/vexpress64/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/astro/mcf5373l/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91rm9200ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9260ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9261ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9263ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9rlek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/atngw100/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/atngw100mkii/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/atstk1000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/sama5d3xek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/atmel/sama5d4ek/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/avionic-design/medcom-wide/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/avionic-design/plutux/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/avionic-design/tec-ng/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/avionic-design/tec/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bachmann/ot1200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/barco/platinum/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/barco/titanium/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bct-brettl2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf506f-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf518f-ezbrd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf525-ucr2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf526-ezbrd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf527-ad7160-eval/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf527-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf527-sdp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf533-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf533-stamp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf537-minotaur/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf537-pnav/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf537-srv1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf537-stamp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf538f-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf548-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf561-acvilon/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf561-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bf609-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/birdland/bav335x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/blackstamp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/blackvme/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bluegiga/apx4devkit/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bluewater/gurnard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bluewater/snapper9260/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/bosch/shc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/boundary/nitrogen6x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/br4/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/broadcom/bcmcygnus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/broadcom/bcmnsp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/buffalo/lsxl/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cadence/xtfpga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/calao/usb_a9263/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/canmb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cavium/thunderx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ccv/xpress/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cei/cei-tk1-som/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cirrus/edb93xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cloudengines/pogo_e02/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm-bf527/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm-bf533/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm-bf537e/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm-bf537u/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm-bf548/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm-bf561/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cm5200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/cobra5272/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compal/paz00/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/cm_fx6/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/cm_t335/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/cm_t35/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/cm_t3517/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/cm_t43/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/cm_t54/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/compulab/trimslice/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/corscience/tricorder/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/creative/xfi3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/d-link/dns325/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/davedenx/aria/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/davinci/da8xxevm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/davinci/ea20/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/dbau1x00/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/denx/m28evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/denx/m53evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/denx/ma5d4evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/dfi/dfi-bt700/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/dnp5370/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/efi/efi-x86/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/egnite/ethernut5/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/el/el6x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/embest/mx6boards/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/emulation/qemu-x86/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/engicam/icorem6/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/cpci2dp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/cpci405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/mecp5123/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/meesc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/plu405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/pmc405de/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/pmc440/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/vme8349/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/esd/vom405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/espt/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/firefly/firefly-rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/b4860qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/bsc9131rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/bsc9132qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/c29xpcie/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/corenet_ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1012afrdm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1012aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1012ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1021aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1021atwr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1043aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1043ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1046aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls1046ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls2080a/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls2080aqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/ls2080ardb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5208evbe/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m52277evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5235evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5249evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5253demo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5253evbe/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5272c3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5275evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5282evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m53017evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5329evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m5373evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m54418twr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m54451evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m54455evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m547xevb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/m548xevb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc5121ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8308rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8313erdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8315erdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8323erdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc832xemds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8349emds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8349itx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc837xemds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc837xerdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8536ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8540ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8541cds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8544ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8548cds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8555cds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8560ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8568mds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8569mds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8572ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx23evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx25pdk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx28evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx31ads/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx31pdk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx35pdk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx51evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx53ard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx53evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx53loco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx53smd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6qarm2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6sabresd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6slevk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx6ullevk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/mx7dsabresd/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/p1010rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/p1022ds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/p1023rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/p1_twr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/p2041rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/qemu-ppce500/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/s32v234evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t102xqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t102xrdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t1040qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t104xrdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t208xqds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t208xrdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t4qds/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/t4rdb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/freescale/vf610twr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gaisler/gr_cpci_ax2000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gaisler/gr_ep2s60/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gaisler/gr_xc3s_1500/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gaisler/grsim/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gaisler/grsim_leon2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gateworks/gw_ventana/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/405ep/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/405ex/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/dlvision/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/gdppc440etx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/intip/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/mpc8308/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gdsys/p1022/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ge/bx50v3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/google/chromebook_jerry/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gumstix/duovero/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/gumstix/pepper/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/h2200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/hisilicon/hikey/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/htkw/mcx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ibf-dsp561/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ids/ids8313/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ifm/ac14xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ifm/o2dnt2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/imgtec/boston/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/imgtec/malta/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/imgtec/xilfpga/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/imx31_phycore/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/in-circuit/grasshopper/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/inka4x0/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/intel/bayleybay/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/intel/cougarcanyon2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/intel/crownbay/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/intel/galileo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/intel/minnowmax/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/inversepath/usbarmory/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/iomega/iconnect/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ip04/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ipek01/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/isee/igep0033/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/isee/igep00x0/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/jupiter/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/keymile/km82xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/keymile/km83xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/keymile/km_arm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/keymile/kmp204x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/kmc/kzm9g/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/kosagi/novena/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/l+g/vinco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/lego/ev3/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/lg/sniper/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/liebherr/lwmon5/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/logicpd/am3517evm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/logicpd/omap3som/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/logicpd/zoom1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/microchip/pic32mzda/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/micronas/vct/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mini-box/picosam9g45/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mosaixtech/icon/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/motionpro/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mpc8308_p1m/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mpl/mip405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mpl/pati/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mpl/pip405/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mpl/vcma9/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/mpr2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ms7720se/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ms7722se/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ms7750se/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/munices/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nokia/rx51/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/beaver/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/cardhu/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/dalmore/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/e2220-1170/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/harmony/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/jetson-tk1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/nyan-big/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/p2371-0000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/p2371-2180/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/p2571/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/p2771-0000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/seaboard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/venice2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/ventana/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/nvidia/whistler/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/omicron/calimain/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/openrisc/openrisc-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/overo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/pandora/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/pb1x00/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/pdm360ng/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/phytec/pcm030/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/phytec/pcm051/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/phytec/pcm052/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/phytec/pcm058/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ppcag/bg0900/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/pr1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/qca/ap121/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/qca/ap143/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/qemu-mips/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/quipos/cairo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/radxa/rock2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/raidsonic/ib62x0/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/MigoR/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/alt/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/ap325rxa/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/blanche/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/ecovec/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/gose/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/koelsch/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/lager/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/porter/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/r0p7734/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/r2dplus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/r7780mp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/rsk7203/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/rsk7264/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/rsk7269/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/salvator-x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/sh7752evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/sh7753evb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/sh7757lcr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/sh7763rdp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/sh7785lcr/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/silk/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/renesas/stout/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/rockchip/evb_rk3036/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/rockchip/evb_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/rockchip/evb_rk3399/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ronetix/pm9261/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ronetix/pm9263/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ronetix/pm9g45/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/arndale/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/espresso7420/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/goni/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/odroid/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/origen/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/smdk2410/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/smdk5250/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/smdk5420/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/smdkc100/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/smdkv310/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/trats/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/trats2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/samsung/universal_c210/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/sbc8349/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/sbc8548/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/sbc8641d/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/seco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/shmin/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/siemens/corvus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/siemens/draco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/siemens/pxm2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/siemens/rut/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/siemens/smartweb/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/siemens/taurus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/silica/pengwyn/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/socrates/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/spear/spear300/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/spear/spear310/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/spear/spear320/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/spear/spear600/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/spear/x600/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/st/stm32f429-discovery/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/st/stm32f746-disco/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/st/stv0991/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/sunxi/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/synopsys/axs10x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/sysam/amcore/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/syteco/zmx25/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/t3corp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tbs/tbs2910/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tcl/sl50/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tcm-bf518/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tcm-bf537/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/technexion/pico-imx6ul/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/technexion/tao3530/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/technexion/twister/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/technologic/ts4800/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/teejet/mt_ventoux/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/am335x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/am3517crane/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/am43xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/am57xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/beagle/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/dra7xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/evm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/ks2_evm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/omap5_uevm/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/panda/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/sdp4430/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/ti814x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ti/ti816x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/timll/devkit3250/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/timll/devkit8000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/toradex/apalis_t30/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/toradex/colibri_imx7/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/toradex/colibri_pxa270/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/toradex/colibri_t20/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/toradex/colibri_t30/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/toradex/colibri_vf/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tqc/tqm5200/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tqc/tqm834x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tqc/tqm8xx/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/tqc/tqma6/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/udoo/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/v38b/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/varisys/cyrus/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/ve8313/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/vscom/baltos/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/wandboard/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/warp/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/warp7/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/woodburn/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/work-microwave/work_92105/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xes/xpedite1000/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xes/xpedite517x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xes/xpedite520x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xes/xpedite537x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xes/xpedite550x/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xilinx/ppc405-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/xilinx/ppc440-generic/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/zipitz2/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_MODULE	board/zyxel/nsa310s/Kconfig	/^config SYS_BOARD$/;"	c
CONFIG_SYS_BOARD_NAME	include/configs/xpedite1000.h	/^#define CONFIG_SYS_BOARD_NAME	/;"	d
CONFIG_SYS_BOARD_NAME	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BOARD_NAME	/;"	d
CONFIG_SYS_BOARD_NAME	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BOARD_NAME	/;"	d
CONFIG_SYS_BOARD_NAME	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BOARD_NAME	/;"	d
CONFIG_SYS_BOARD_NAME	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BOARD_NAME	/;"	d
CONFIG_SYS_BOARD_VERSION	include/configs/aristainetos.h	/^#define CONFIG_SYS_BOARD_VERSION	/;"	d
CONFIG_SYS_BOARD_VERSION	include/configs/aristainetos2.h	/^#define CONFIG_SYS_BOARD_VERSION	/;"	d
CONFIG_SYS_BOARD_VERSION	include/configs/aristainetos2b.h	/^#define CONFIG_SYS_BOARD_VERSION	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/cyrus.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOK3E_HV	include/configs/t4qds.h	/^#define CONFIG_SYS_BOOK3E_HV	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	drivers/bootcount/bootcount.c	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d	file:
CONFIG_SYS_BOOTCOUNT_ADDR	drivers/bootcount/bootcount.c	/^#define CONFIG_SYS_BOOTCOUNT_ADDR /;"	d	file:
CONFIG_SYS_BOOTCOUNT_ADDR	drivers/bootcount/bootcount_blackfin.c	/^# define CONFIG_SYS_BOOTCOUNT_ADDR /;"	d	file:
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/MIP405.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR /;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/brppt1.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/calimain.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/highbank.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/ids8313.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/socfpga_is1.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR /;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/socfpga_sr1500.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/ti_am335x_common.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/tqma6_wru4.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_ADDR	include/configs/x600.h	/^#define CONFIG_SYS_BOOTCOUNT_ADDR	/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/bootcount.h	/^#  define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/configs/bav335x.h	/^#define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/configs/socfpga_is1.h	/^#define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/configs/socfpga_sr1500.h	/^#define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_BE	include/configs/tqma6_wru4.h	/^#define CONFIG_SYS_BOOTCOUNT_BE$/;"	d
CONFIG_SYS_BOOTCOUNT_LE	include/bootcount.h	/^#  define CONFIG_SYS_BOOTCOUNT_LE$/;"	d
CONFIG_SYS_BOOTCOUNT_LE	include/configs/calimain.h	/^#define CONFIG_SYS_BOOTCOUNT_LE	/;"	d
CONFIG_SYS_BOOTCOUNT_LE	include/configs/highbank.h	/^#define CONFIG_SYS_BOOTCOUNT_LE	/;"	d
CONFIG_SYS_BOOTCOUNT_SINGLEWORD	drivers/bootcount/bootcount.c	/^#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD$/;"	d	file:
CONFIG_SYS_BOOTCOUNT_SINGLEWORD	include/configs/highbank.h	/^#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD$/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/TQM5200.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/a3m071.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/a4m072.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/canmb.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/cm5200.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/inka4x0.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/ipek01.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/jupiter.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/motionpro.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/munices.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/o2d.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/o2d300.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/o2dnt2.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/o2i.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/o2mnt.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/o3dnt.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/pcm030.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_CFG	include/configs/v38b.h	/^#define CONFIG_SYS_BOOTCS_CFG	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/canmb.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/munices.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_SIZE	include/configs/v38b.h	/^#define CONFIG_SYS_BOOTCS_SIZE	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/a3m071.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/a4m072.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/canmb.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/cm5200.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/inka4x0.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/ipek01.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/jupiter.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/motionpro.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/munices.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/pcm030.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTCS_START	include/configs/v38b.h	/^#define CONFIG_SYS_BOOTCS_START	/;"	d
CONFIG_SYS_BOOTFILE	include/configs/PMC440.h	/^#define CONFIG_SYS_BOOTFILE	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/CPCI4052.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M52277EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5235EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5249EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5272C3.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5275EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5282EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M53017EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5329EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5373EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M54418TWR.h	/^#define CONFIG_SYS_BOOTMAPSZ /;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M54451EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M54455EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5475EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/M5485EVB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MIP405.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/MigoR.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/P1010RDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/P1022DS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/PATI.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/PIP405.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/PLU405.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/PMC405DE.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/PMC440.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM5200.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM823L.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM823M.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM834x.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM850L.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM850M.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM855L.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM855M.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM860L.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM860M.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM862L.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM862M.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM866M.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/TQM885D.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/UCP1020.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/VOM405.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/a3m071.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/a4m072.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ac14xx.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/amcc-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/amcore.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ap325rxa.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/aria.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/canmb.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/cm5200.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/cm_fx6.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/cm_t3517.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/cobra5272.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/controlcenterd.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/cyrus.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ecovec.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/espt.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/grsim.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/highbank.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/hrcon.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ids8313.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/inka4x0.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ipek01.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/jupiter.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/km82xx.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/kzm9g.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/lwmon5.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/mecp5123.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/motionpro.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ms7720se.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ms7722se.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ms7750se.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/munices.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/p1_twr.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/pcm030.h	/^#define CONFIG_SYS_BOOTMAPSZ /;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/pdm360ng.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/r0p7734.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/r2dplus.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/r7780mp.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/rsk7203.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sbc8349.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sbc8548.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sh7752evb.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sh7753evb.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/shmin.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/socfpga_common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/socrates.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/strider.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/t4qds.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/tbs2910.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/tegra-common.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/uniphier.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/v38b.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/ve8313.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/vme8349.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/xpedite1000.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTMAPSZ	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BOOTMAPSZ	/;"	d
CONFIG_SYS_BOOTM_LEN	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	common/bootm.c	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d	file:
CONFIG_SYS_BOOTM_LEN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M52277EVB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5235EVB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5275EVB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M53017EVB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5329EVB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/M5373EVB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/P1010RDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/P1022DS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T102xQDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T102xRDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T1040QDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T104xRDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/UCP1020.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/am335x_evm.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/am335x_shc.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/amcc-common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/axs10x.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/baltos.h	/^#define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/bav335x.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/controlcenterd.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/cyrus.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/lwmon5.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/malta.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/mx6_common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/mx7_common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/nsim.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/p1_twr.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/rk3399_common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/t4qds.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/tb100.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_BOOTM_LEN /;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/x86-common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTM_LEN	include/configs/zynq-common.h	/^#define CONFIG_SYS_BOOTM_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M52277EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5235EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5249EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5272C3.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5275EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5282EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M53017EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5329EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5373EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M54418TWR.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M54451EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M54455EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5475EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/M5485EVB.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/amcore.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/ap121.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN /;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/ap143.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN /;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/atngw100.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/atstk1002.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/cobra5272.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/dbau1x00.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/grasshopper.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/malta.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/pb1x00.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/qemu-mips.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/vct.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOTPARAMS_LEN	include/configs/xtfpga.h	/^#define CONFIG_SYS_BOOTPARAMS_LEN	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR /;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/icon.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/intip.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/t3corp.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR	/;"	d
CONFIG_SYS_BOOT_BASE_ADDR	include/configs/yosemite.h	/^#define CONFIG_SYS_BOOT_BASE_ADDR /;"	d
CONFIG_SYS_BOOT_BLOCK	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BOOT_BLOCK	/;"	d
CONFIG_SYS_BOOT_BLOCK	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_BOOT_BLOCK	/;"	d
CONFIG_SYS_BOOT_BLOCK	include/configs/sbc8548.h	/^#define CONFIG_SYS_BOOT_BLOCK	/;"	d
CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS	board/esd/pmc440/pmc440.c	/^#define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS /;"	d	file:
CONFIG_SYS_BOOT_GET_CMDLINE	arch/m68k/include/asm/config.h	/^#define CONFIG_SYS_BOOT_GET_CMDLINE$/;"	d
CONFIG_SYS_BOOT_GET_CMDLINE	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_BOOT_GET_CMDLINE$/;"	d
CONFIG_SYS_BOOT_GET_KBD	arch/m68k/include/asm/config.h	/^#define CONFIG_SYS_BOOT_GET_KBD$/;"	d
CONFIG_SYS_BOOT_GET_KBD	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_BOOT_GET_KBD$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/arc/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/arm/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/m68k/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/mips/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/sparc/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	arch/x86/include/asm/config.h	/^#define CONFIG_SYS_BOOT_RAMDISK_HIGH$/;"	d
CONFIG_SYS_BOOT_RAMDISK_HIGH	include/autoconf.mk	/^CONFIG_SYS_BOOT_RAMDISK_HIGH=y$/;"	m
CONFIG_SYS_BOOT_RAMDISK_HIGH	spl/include/autoconf.mk	/^CONFIG_SYS_BOOT_RAMDISK_HIGH=y$/;"	m
CONFIG_SYS_BR0_64M	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR0_64M	/;"	d
CONFIG_SYS_BR0_8M	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR0_8M	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/controlcenterd.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/cyrus.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_BR0_PRELIM /;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR0_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BR0_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/controlcenterd.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/cyrus.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_BR1_PRELIM /;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR1_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BR1_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_BR2_PRELIM /;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR2_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BR2_PRELIM	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM823L.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM823M.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM850L.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM850M.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM855L.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM855M.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM860L.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM860M.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM862L.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM862M.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM866M.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_CAN	include/configs/TQM885D.h	/^#define CONFIG_SYS_BR3_CAN	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_BR3_PRELIM /;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_BR3_PRELIM /;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_BR3_PRELIM /;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/km8360.h	/^#define CONFIG_SYS_BR3_PRELIM /;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_BR3_PRELIM /;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_BR3_PRELIM /;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR3_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_BR3_PRELIM	/;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR4_PRELIM	/;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BR4_PRELIM	/;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR4_PRELIM	/;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/km8360.h	/^#define CONFIG_SYS_BR4_PRELIM /;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR4_PRELIM	/;"	d
CONFIG_SYS_BR4_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR4_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR5_PRELIM /;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR5_PRELIM /;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR5_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR5_PRELIM	/;"	d
CONFIG_SYS_BR6_64M	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR6_64M	/;"	d
CONFIG_SYS_BR6_8M	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR6_8M	/;"	d
CONFIG_SYS_BR6_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR6_PRELIM	/;"	d
CONFIG_SYS_BR6_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_BR6_PRELIM /;"	d
CONFIG_SYS_BR6_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_BR6_PRELIM /;"	d
CONFIG_SYS_BR6_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR6_PRELIM	/;"	d
CONFIG_SYS_BR6_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_BR6_PRELIM	/;"	d
CONFIG_SYS_BR6_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR6_PRELIM	/;"	d
CONFIG_SYS_BR7_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_BR7_PRELIM	/;"	d
CONFIG_SYS_BR7_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_BR7_PRELIM	/;"	d
CONFIG_SYS_BR7_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_BR7_PRELIM	/;"	d
CONFIG_SYS_BRIGHTNESS	include/configs/inka4x0.h	/^#define CONFIG_SYS_BRIGHTNESS /;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM5200.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM823L.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM823M.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM850L.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM850M.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM855L.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM855M.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM860L.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM860M.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM862L.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM862M.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM866M.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/TQM885D.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/a4m072.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/ac14xx.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/aria.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/canmb.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/cm5200.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/inka4x0.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/ipek01.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/jupiter.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/km82xx.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/manroland/mpc5200-common.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/mecp5123.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/munices.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/pcm030.h	/^#define CONFIG_SYS_CACHELINE_SHIFT /;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SHIFT	include/configs/v38b.h	/^#  define CONFIG_SYS_CACHELINE_SHIFT	/;"	d
CONFIG_SYS_CACHELINE_SIZE	arch/arm/Kconfig	/^config SYS_CACHELINE_SIZE$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHELINE_SIZE	arch/blackfin/include/asm/config.h	/^#define CONFIG_SYS_CACHELINE_SIZE /;"	d
CONFIG_SYS_CACHELINE_SIZE	arch/mips/include/asm/cache.h	/^#define CONFIG_SYS_CACHELINE_SIZE /;"	d
CONFIG_SYS_CACHELINE_SIZE	arch/powerpc/include/asm/cache.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	arch/sandbox/include/asm/cache.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	arch/x86/include/asm/cache.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/config/auto.conf	/^CONFIG_SYS_CACHELINE_SIZE=64$/;"	k
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5272C3.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/amcore.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/canmb.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/cobra5272.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/km82xx.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/munices.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_CACHELINE_SIZE /;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/configs/v38b.h	/^#define CONFIG_SYS_CACHELINE_SIZE	/;"	d
CONFIG_SYS_CACHELINE_SIZE	include/generated/autoconf.h	/^#define CONFIG_SYS_CACHELINE_SIZE /;"	d
CONFIG_SYS_CACHELINE_SIZE_MODULE	arch/arm/Kconfig	/^config SYS_CACHELINE_SIZE$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_ACR0	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5235EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5249EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5272C3.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5282EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/amcore.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/cobra5272.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR0	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CACHE_ACR0	/;"	d
CONFIG_SYS_CACHE_ACR1	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR1	/;"	d
CONFIG_SYS_CACHE_ACR1	include/configs/M5249EVB.h	/^#define CONFIG_SYS_CACHE_ACR1	/;"	d
CONFIG_SYS_CACHE_ACR1	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CACHE_ACR1	/;"	d
CONFIG_SYS_CACHE_ACR1	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CACHE_ACR1	/;"	d
CONFIG_SYS_CACHE_ACR2	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR2	/;"	d
CONFIG_SYS_CACHE_ACR2	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CACHE_ACR2	/;"	d
CONFIG_SYS_CACHE_ACR2	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CACHE_ACR2	/;"	d
CONFIG_SYS_CACHE_ACR2	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CACHE_ACR2	/;"	d
CONFIG_SYS_CACHE_ACR2	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CACHE_ACR2	/;"	d
CONFIG_SYS_CACHE_ACR2	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CACHE_ACR2	/;"	d
CONFIG_SYS_CACHE_ACR3	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR3	/;"	d
CONFIG_SYS_CACHE_ACR4	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR4	/;"	d
CONFIG_SYS_CACHE_ACR5	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR5	/;"	d
CONFIG_SYS_CACHE_ACR6	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR6	/;"	d
CONFIG_SYS_CACHE_ACR7	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ACR7	/;"	d
CONFIG_SYS_CACHE_DCACR	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_DCACR	/;"	d
CONFIG_SYS_CACHE_DCACR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CACHE_DCACR	/;"	d
CONFIG_SYS_CACHE_DCACR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CACHE_DCACR	/;"	d
CONFIG_SYS_CACHE_DCACR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CACHE_DCACR	/;"	d
CONFIG_SYS_CACHE_DCACR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CACHE_DCACR	/;"	d
CONFIG_SYS_CACHE_DCACR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CACHE_DCACR	/;"	d
CONFIG_SYS_CACHE_ICACR	arch/m68k/include/asm/cache.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5235EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5249EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5272C3.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/amcore.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/cobra5272.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_ICACR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CACHE_ICACR	/;"	d
CONFIG_SYS_CACHE_SHIFT_5	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_5$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_SHIFT_5_MODULE	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_5$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_SHIFT_6	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_6$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_SHIFT_6	include/config/auto.conf	/^CONFIG_SYS_CACHE_SHIFT_6=y$/;"	k
CONFIG_SYS_CACHE_SHIFT_6	include/generated/autoconf.h	/^#define CONFIG_SYS_CACHE_SHIFT_6 /;"	d
CONFIG_SYS_CACHE_SHIFT_6_MODULE	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_6$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_SHIFT_7	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_7$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_SHIFT_7_MODULE	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_7$/;"	c	menu:ARM architecture
CONFIG_SYS_CACHE_SIZE_AUTO	arch/mips/Kconfig	/^config SYS_CACHE_SIZE_AUTO$/;"	c	menu:MIPS architecture
CONFIG_SYS_CACHE_SIZE_AUTO_MODULE	arch/mips/Kconfig	/^config SYS_CACHE_SIZE_AUTO$/;"	c	menu:MIPS architecture
CONFIG_SYS_CACHE_STASHING	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/P2041RDB.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/corenet_ds.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/cyrus.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CACHE_STASHING	include/configs/t4qds.h	/^#define CONFIG_SYS_CACHE_STASHING$/;"	d
CONFIG_SYS_CADMUS_BASE_REG	board/freescale/common/cadmus.c	/^#define CONFIG_SYS_CADMUS_BASE_REG	/;"	d	file:
CONFIG_SYS_CAN_BASE	include/configs/TQM823L.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM823M.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM850L.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM850M.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM855L.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM855M.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM860L.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM860M.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM862L.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM862M.h	/^#define	CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM866M.h	/^#define CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_BASE	include/configs/TQM885D.h	/^#define CONFIG_SYS_CAN_BASE	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM823L.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM823M.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM850L.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM850M.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM855L.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM855M.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM860L.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM860M.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM862L.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM862M.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM866M.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAN_OR_AM	include/configs/TQM885D.h	/^#define CONFIG_SYS_CAN_OR_AM	/;"	d
CONFIG_SYS_CAR_ADDR	arch/x86/cpu/qemu/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR	arch/x86/cpu/quark/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR	arch/x86/lib/efi/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR	board/coreboot/coreboot/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR	board/google/chromebook_link/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR	board/google/chromebook_samus/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR	board/google/chromebox_panther/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	arch/x86/cpu/qemu/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	arch/x86/cpu/quark/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	arch/x86/lib/efi/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_ADDR_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_CAR_ADDR$/;"	c
CONFIG_SYS_CAR_SIZE	arch/x86/cpu/qemu/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE	arch/x86/cpu/quark/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE	arch/x86/lib/efi/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE	board/coreboot/coreboot/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE	board/google/chromebook_link/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE	board/google/chromebook_samus/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE	board/google/chromebox_panther/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	arch/x86/cpu/qemu/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	arch/x86/cpu/quark/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	arch/x86/lib/efi/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CAR_SIZE_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_CAR_SIZE$/;"	c
CONFIG_SYS_CBSIZE	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_CBSIZE /;"	d
CONFIG_SYS_CBSIZE	include/autoconf.mk	/^CONFIG_SYS_CBSIZE=1024$/;"	m
CONFIG_SYS_CBSIZE	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5272C3.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5275EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8315ERDB.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8323ERDB.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC832XEMDS.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8349EMDS.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8349ITX.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC837XEMDS.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC837XERDB.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8540ADS.h	/^    #define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8560ADS.h	/^    #define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MPC8641HPCN.h	/^    #define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/MigoR.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/PATI.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM823L.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM823M.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM834x.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM850L.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM850M.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM855L.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM855M.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM860L.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM860M.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM862L.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM862M.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/VCMA9.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ac14xx.h	/^# define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/amcc-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/amcore.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ap121.h	/^#define CONFIG_SYS_CBSIZE /;"	d
CONFIG_SYS_CBSIZE	include/configs/ap143.h	/^#define CONFIG_SYS_CBSIZE /;"	d
CONFIG_SYS_CBSIZE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/apalis_t30.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/apf27.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/aria.h	/^# define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/atngw100.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/atstk1002.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/axs10x.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/boston.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/bur_cfg_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/calimain.h	/^#define CONFIG_SYS_CBSIZE /;"	d
CONFIG_SYS_CBSIZE	include/configs/canmb.h	/^#  define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/cobra5272.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/colibri_t20.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/colibri_t30.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/corvus.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ea20.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ecovec.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/edb93xx.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/edminiv2.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/espt.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ethernut5.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/exynos-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/flea3.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/grasshopper.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/grsim.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/h2200.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/highbank.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/hikey.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/integrator-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/kc1.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/kzm9g.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/legoev3.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/lwmon5.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/malta.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/manroland/common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mcx.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mecp5123.h	/^# define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/meesc.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/microblaze-generic.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mpc5121ads.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mpr2.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ms7720se.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ms7722se.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ms7750se.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/munices.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mv-common.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mvebu_db-88f3720.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mvebu_db-88f7040.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx31ads.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx51evk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx53ard.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx53evk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx53loco.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx53smd.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx6_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mx7_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/mxs.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/nsim.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pb1x00.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_CBSIZE /;"	d
CONFIG_SYS_CBSIZE	include/configs/pcm052.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pdm360ng.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/picosam9g45.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pm9261.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pm9263.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/pm9g45.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/r0p7734.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/r2dplus.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/r7780mp.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rk3036_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rk3288_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rk3399_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rpi.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rsk7203.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rsk7264.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/rsk7269.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sandbox.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sbc8349.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/shmin.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/smdk2410.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/smdkc100.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/snapper9260.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sniper.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/socrates.h	/^    #define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/spear-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/strider.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/stv0991.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/taurus.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/tb100.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/tegra-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ts4800.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/uniphier.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/usbarmory.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/v38b.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/vct.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/vf610twr.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/vme8349.h	/^	#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/work_92105.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/x600.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/x86-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/zmx25.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	include/configs/zynq-common.h	/^#define CONFIG_SYS_CBSIZE	/;"	d
CONFIG_SYS_CBSIZE	spl/include/autoconf.mk	/^CONFIG_SYS_CBSIZE=1024$/;"	m
CONFIG_SYS_CCCR	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_CCCR	/;"	d
CONFIG_SYS_CCCR	include/configs/h2200.h	/^#define CONFIG_SYS_CCCR	/;"	d
CONFIG_SYS_CCCR	include/configs/zipitz2.h	/^#define CONFIG_SYS_CCCR	/;"	d
CONFIG_SYS_CCI400_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_CCI400_ADDR	/;"	d
CONFIG_SYS_CCI400_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_CCI400_ADDR	/;"	d
CONFIG_SYS_CCSRBAR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/P1022DS.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/UCP1020.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/p1_twr.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/sbc8548.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/socrates.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_CCSRBAR	/;"	d
CONFIG_SYS_CCSRBAR	include/mpc85xx.h	/^#define CONFIG_SYS_CCSRBAR /;"	d
CONFIG_SYS_CCSRBAR_DEFAULT	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_CCSRBAR_DEFAULT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_CCSRBAR_DEFAULT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_CCSRBAR_DEFAULT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_CCSRBAR_DEFAULT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_CCSRBAR_DEFAULT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_CCSRBAR_PHYS	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_CCSRBAR_PHYS /;"	d
CONFIG_SYS_CCSRBAR_PHYS	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CONFIG_SYS_CCSRBAR_PHYS /;"	d
CONFIG_SYS_CCSRBAR_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSRBAR_PHYS	/;"	d
CONFIG_SYS_CCSRBAR_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSRBAR_PHYS /;"	d
CONFIG_SYS_CCSRBAR_PHYS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSRBAR_PHYS	/;"	d
CONFIG_SYS_CCSRBAR_PHYS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSRBAR_PHYS	/;"	d
CONFIG_SYS_CCSRBAR_PHYS	include/mpc85xx.h	/^#define CONFIG_SYS_CCSRBAR_PHYS /;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH /;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_HIGH	include/mpc85xx.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/P1022DS.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/UCP1020.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/controlcenterd.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/p1_twr.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW /;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/sbc8548.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/socrates.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/xpedite520x.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/xpedite537x.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/configs/xpedite550x.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW	/;"	d
CONFIG_SYS_CCSRBAR_PHYS_LOW	include/mpc85xx.h	/^#define CONFIG_SYS_CCSRBAR_PHYS_LOW /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATL	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATL /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATL /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATL	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATL /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATL	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATL	/;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATU	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATU /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATU	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATU /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATU	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATU /;"	d
CONFIG_SYS_CCSR_DEFAULT_DBATU	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSR_DEFAULT_DBATU	/;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATL	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATL /;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATL /;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATL	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATL /;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATL	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATL	/;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATU	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATU /;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATU	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATU /;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATU	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATU /;"	d
CONFIG_SYS_CCSR_DEFAULT_IBATU	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CCSR_DEFAULT_IBATU	/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/P1022DS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/UCP1020.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CCSR_DO_NOT_RELOCATE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE$/;"	d
CONFIG_SYS_CFI_FLASH_CONFIG_REGS	include/configs/t3corp.h	/^#define CONFIG_SYS_CFI_FLASH_CONFIG_REGS /;"	d
CONFIG_SYS_CFI_FLASH_STATUS_POLL	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /;"	d
CONFIG_SYS_CFI_FLASH_STATUS_POLL	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_CFI_FLASH_STATUS_POLL$/;"	d
CONFIG_SYS_CFI_FLASH_STATUS_POLL	include/configs/icon.h	/^#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /;"	d
CONFIG_SYS_CFI_FLASH_STATUS_POLL	include/configs/t3corp.h	/^#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /;"	d
CONFIG_SYS_CFI_FLASH_STATUS_POLL	include/configs/uniphier.h	/^#define CONFIG_SYS_CFI_FLASH_STATUS_POLL$/;"	d
CONFIG_SYS_CF_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_CF_BASE	/;"	d
CONFIG_SYS_CF_BASE	include/configs/ipek01.h	/^#define CONFIG_SYS_CF_BASE	/;"	d
CONFIG_SYS_CF_INTC_REG1	arch/m68k/include/asm/coldfire/intctrl.h	/^#	define	CONFIG_SYS_CF_INTC_REG1$/;"	d
CONFIG_SYS_CF_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_CF_SIZE	/;"	d
CONFIG_SYS_CH7301_I2C	include/configs/iocon.h	/^#define CONFIG_SYS_CH7301_I2C	/;"	d
CONFIG_SYS_CH7301_I2C	include/configs/strider.h	/^#define CONFIG_SYS_CH7301_I2C	/;"	d
CONFIG_SYS_CKEN	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_CKEN	/;"	d
CONFIG_SYS_CKEN	include/configs/h2200.h	/^#define CONFIG_SYS_CKEN	/;"	d
CONFIG_SYS_CKEN	include/configs/zipitz2.h	/^#define CONFIG_SYS_CKEN	/;"	d
CONFIG_SYS_CLE_MASK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_CLE_MASK	/;"	d
CONFIG_SYS_CLK	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5235EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5253EVBE.h	/^#	define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5272C3.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/amcore.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/cobra5272.h	/^#define CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLK	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_CLK	/;"	d
CONFIG_SYS_CLKDIV_CPU	include/configs/atngw100.h	/^#define CONFIG_SYS_CLKDIV_CPU	/;"	d
CONFIG_SYS_CLKDIV_CPU	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_CLKDIV_CPU	/;"	d
CONFIG_SYS_CLKDIV_CPU	include/configs/atstk1002.h	/^#define CONFIG_SYS_CLKDIV_CPU	/;"	d
CONFIG_SYS_CLKDIV_CPU	include/configs/grasshopper.h	/^#define CONFIG_SYS_CLKDIV_CPU	/;"	d
CONFIG_SYS_CLKDIV_HSB	include/configs/atngw100.h	/^#define CONFIG_SYS_CLKDIV_HSB	/;"	d
CONFIG_SYS_CLKDIV_HSB	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_CLKDIV_HSB	/;"	d
CONFIG_SYS_CLKDIV_HSB	include/configs/atstk1002.h	/^#define CONFIG_SYS_CLKDIV_HSB	/;"	d
CONFIG_SYS_CLKDIV_HSB	include/configs/grasshopper.h	/^#define CONFIG_SYS_CLKDIV_HSB	/;"	d
CONFIG_SYS_CLKDIV_PBA	include/configs/atngw100.h	/^#define CONFIG_SYS_CLKDIV_PBA	/;"	d
CONFIG_SYS_CLKDIV_PBA	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_CLKDIV_PBA	/;"	d
CONFIG_SYS_CLKDIV_PBA	include/configs/atstk1002.h	/^#define CONFIG_SYS_CLKDIV_PBA	/;"	d
CONFIG_SYS_CLKDIV_PBA	include/configs/grasshopper.h	/^#define CONFIG_SYS_CLKDIV_PBA	/;"	d
CONFIG_SYS_CLKDIV_PBB	include/configs/atngw100.h	/^#define CONFIG_SYS_CLKDIV_PBB	/;"	d
CONFIG_SYS_CLKDIV_PBB	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_CLKDIV_PBB	/;"	d
CONFIG_SYS_CLKDIV_PBB	include/configs/atstk1002.h	/^#define CONFIG_SYS_CLKDIV_PBB	/;"	d
CONFIG_SYS_CLKDIV_PBB	include/configs/grasshopper.h	/^#define CONFIG_SYS_CLKDIV_PBB	/;"	d
CONFIG_SYS_CLKTL_CBCDR	include/configs/mx51evk.h	/^#define CONFIG_SYS_CLKTL_CBCDR	/;"	d
CONFIG_SYS_CLKTL_CBCDR	include/configs/ts4800.h	/^#define CONFIG_SYS_CLKTL_CBCDR	/;"	d
CONFIG_SYS_CLK_DIV	include/configs/sbc8548.h	/^#define CONFIG_SYS_CLK_DIV	/;"	d
CONFIG_SYS_CLK_DIV	include/configs/sbc8548.h	/^#define CONFIG_SYS_CLK_DIV /;"	d
CONFIG_SYS_CLK_FREQ	Kconfig	/^config SYS_CLK_FREQ$/;"	c	menu:Boot images
CONFIG_SYS_CLK_FREQ	board/sunxi/Kconfig	/^config SYS_CLK_FREQ$/;"	c
CONFIG_SYS_CLK_FREQ	include/config/auto.conf	/^CONFIG_SYS_CLK_FREQ=480000000$/;"	k
CONFIG_SYS_CLK_FREQ	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/CPCI4052.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MIP405.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/MigoR.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/P1022DS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/P1023RDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/P2041RDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/PIP405.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/PLU405.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/PMC405DE.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/PMC440.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/UCP1020.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/VCMA9.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/VOM405.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/acadia.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/alt.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ap325rxa.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/bamboo.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/blanche.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/bubinga.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/calimain.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/canyonlands.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/controlcenterd.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/corenet_ds.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/cyrus.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/da850evm.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/dlvision.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ea20.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ecovec.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/edb93xx.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/espt.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/exynos-common.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/gose.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/grsim.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/hrcon.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/icon.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ids8313.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/intip.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/io.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/io64.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/iocon.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ipam390.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/katmai.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/kilauea.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/koelsch.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/kzm9g.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/lager.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/legoev3.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/luan.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/lwmon5.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/makalu.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/mpr2.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ms7720se.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ms7722se.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ms7750se.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/neo.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/p1_twr.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/porter.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/r0p7734.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/r2dplus.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/r7780mp.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/redwood.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/rsk7203.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/rsk7264.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/rsk7269.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/salvator-x.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sbc8349.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sbc8548.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sbc8641d.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sequoia.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sh7752evb.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sh7753evb.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/shmin.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/silk.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/smdk2410.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/smdkc100.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/socrates.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/stout.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/strider.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/t3corp.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ	include/configs/ve8313.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/vme8349.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/walnut.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xpedite1000.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xpedite517x.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xpedite520x.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xpedite537x.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xpedite550x.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/xtfpga.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/yosemite.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/configs/yucca.h	/^#define CONFIG_SYS_CLK_FREQ	/;"	d
CONFIG_SYS_CLK_FREQ	include/generated/autoconf.h	/^#define CONFIG_SYS_CLK_FREQ /;"	d
CONFIG_SYS_CLK_FREQ_C100	arch/arm/mach-s5pc1xx/clock.c	/^#define CONFIG_SYS_CLK_FREQ_C100	/;"	d	file:
CONFIG_SYS_CLK_FREQ_C110	arch/arm/mach-s5pc1xx/clock.c	/^#define CONFIG_SYS_CLK_FREQ_C110	/;"	d	file:
CONFIG_SYS_CLK_FREQ_C110	include/configs/s5p_goni.h	/^#define CONFIG_SYS_CLK_FREQ_C110	/;"	d
CONFIG_SYS_CLK_FREQ_MODULE	Kconfig	/^config SYS_CLK_FREQ$/;"	c	menu:Boot images
CONFIG_SYS_CLK_FREQ_MODULE	board/sunxi/Kconfig	/^config SYS_CLK_FREQ$/;"	c
CONFIG_SYS_CMD_CONFIGURE	drivers/net/eepro100.c	/^#define CONFIG_SYS_CMD_CONFIGURE	/;"	d	file:
CONFIG_SYS_CMD_EL	drivers/net/eepro100.c	/^#define CONFIG_SYS_CMD_EL	/;"	d	file:
CONFIG_SYS_CMD_IAS	drivers/net/eepro100.c	/^#define CONFIG_SYS_CMD_IAS	/;"	d	file:
CONFIG_SYS_CMD_INT	drivers/net/eepro100.c	/^#define CONFIG_SYS_CMD_INT	/;"	d	file:
CONFIG_SYS_CMD_SUSPEND	drivers/net/eepro100.c	/^#define CONFIG_SYS_CMD_SUSPEND	/;"	d	file:
CONFIG_SYS_CMXFCR_MASK2	include/configs/MPC8560ADS.h	/^  #define CONFIG_SYS_CMXFCR_MASK2 /;"	d
CONFIG_SYS_CMXFCR_VALUE2	include/configs/MPC8560ADS.h	/^  #define CONFIG_SYS_CMXFCR_VALUE2 /;"	d
CONFIG_SYS_CMXSCR_VALUE	include/configs/km82xx.h	/^#define CONFIG_SYS_CMXSCR_VALUE	/;"	d
CONFIG_SYS_CONFIG_NAME	arch/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-bcm283x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-highbank/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-integrator/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Integrator Options
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-mvebu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-socfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-uniphier/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/arm/mach-zynq/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	arch/nios2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Nios II architecture
CONFIG_SYS_CONFIG_NAME	arch/sandbox/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Sandbox architecture
CONFIG_SYS_CONFIG_NAME	board/8dtech/eco5pk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Arcturus/ucp1020/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Barix/ipam390/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/BuR/brppt1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/BuR/brxre1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/BuS/eb_cpu5282/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/CarMediaLab/flea3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/LaCie/edminiv2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/LaCie/net2big_v2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/LaCie/netspace_v2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Marvell/aspenite/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Marvell/dreamplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Marvell/gplugd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Marvell/guruplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Marvell/openrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Marvell/sheevaplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Seagate/dockstar/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Seagate/goflexhome/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Seagate/nas220/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/Synology/ds109/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/a3m071/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/a4m072/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/abilis/tb100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/advantech/dms-ba16/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amazon/kc1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/acadia/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/bamboo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/bubinga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/canyonlands/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/katmai/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/kilauea/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/luan/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/makalu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/redwood/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/sequoia/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/walnut/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/yosemite/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amcc/yucca/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/amlogic/odroid-c2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/aristainetos/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/armadeus/apf27/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/armltd/vexpress/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/armltd/vexpress64/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/astro/mcf5373l/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91rm9200ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9260ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9261ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9263ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9rlek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/atngw100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/atngw100mkii/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/atstk1000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/sama5d3xek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/atmel/sama5d4ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/avionic-design/medcom-wide/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/avionic-design/plutux/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/avionic-design/tec-ng/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/avionic-design/tec/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bachmann/ot1200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/barco/platinum/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/barco/titanium/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bct-brettl2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf506f-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf518f-ezbrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf525-ucr2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf526-ezbrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf527-ad7160-eval/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf527-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf527-sdp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf533-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf533-stamp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf537-minotaur/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf537-pnav/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf537-srv1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf537-stamp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf538f-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf548-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf561-acvilon/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf561-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bf609-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/birdland/bav335x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/blackstamp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/blackvme/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bluegiga/apx4devkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bluewater/gurnard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bluewater/snapper9260/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/bosch/shc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/boundary/nitrogen6x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/br4/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/broadcom/bcmcygnus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/broadcom/bcmnsp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/buffalo/lsxl/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cadence/xtfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/calao/usb_a9263/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/canmb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cavium/thunderx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ccv/xpress/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cei/cei-tk1-som/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cirrus/edb93xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cloudengines/pogo_e02/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm-bf527/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm-bf533/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm-bf537e/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm-bf537u/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm-bf548/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm-bf561/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cm5200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/cobra5272/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compal/paz00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/cm_fx6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/cm_t335/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/cm_t35/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/cm_t3517/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/cm_t43/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/cm_t54/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/compulab/trimslice/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/coreboot/coreboot/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/corscience/tricorder/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/creative/xfi3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/d-link/dns325/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/davedenx/aria/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/davinci/da8xxevm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/davinci/ea20/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/dbau1x00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/denx/m28evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/denx/m53evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/denx/ma5d4evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/dfi/dfi-bt700/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/dnp5370/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/efi/efi-x86/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/egnite/ethernut5/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/el/el6x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/embest/mx6boards/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/emulation/qemu-x86/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/engicam/icorem6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/cpci2dp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/cpci405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/mecp5123/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/meesc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/plu405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/pmc405de/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/pmc440/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/vme8349/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/esd/vom405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/espt/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/firefly/firefly-rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/b4860qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/bsc9131rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/bsc9132qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/c29xpcie/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/corenet_ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1012afrdm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1012aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1012ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1021aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1021atwr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1043aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1043ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1046aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls1046ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls2080a/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls2080aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/ls2080ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5208evbe/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m52277evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5235evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5249evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5253demo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5253evbe/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5272c3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5275evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5282evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m53017evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5329evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m5373evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m54418twr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m54451evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m54455evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m547xevb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/m548xevb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc5121ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8308rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8313erdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8315erdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8323erdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc832xemds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8349emds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8349itx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc837xemds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc837xerdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8536ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8540ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8541cds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8544ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8548cds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8555cds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8560ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8568mds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8569mds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8572ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx23evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx25pdk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx28evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx31ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx31pdk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx35pdk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx51evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx53ard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx53evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx53loco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx53smd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6qarm2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6sabresd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6slevk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx6ullevk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/mx7dsabresd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/p1010rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/p1022ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/p1023rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/p1_twr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/p2041rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/qemu-ppce500/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/s32v234evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t102xqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t102xrdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t1040qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t104xrdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t208xqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t208xrdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t4qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/t4rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/freescale/vf610twr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gaisler/gr_cpci_ax2000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gaisler/gr_ep2s60/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gaisler/gr_xc3s_1500/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gaisler/grsim/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gaisler/grsim_leon2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gateworks/gw_ventana/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/405ep/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/405ex/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/dlvision/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/gdppc440etx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/intip/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/mpc8308/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gdsys/p1022/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ge/bx50v3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/google/chromebook_jerry/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/google/chromebook_link/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/google/chromebook_samus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/google/chromebox_panther/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gumstix/duovero/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/gumstix/pepper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/h2200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/hisilicon/hikey/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/htkw/mcx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ibf-dsp561/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ids/ids8313/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ifm/ac14xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ifm/o2dnt2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/imgtec/boston/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/imgtec/malta/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/imgtec/xilfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/imx31_phycore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/in-circuit/grasshopper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/inka4x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/intel/bayleybay/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/intel/cougarcanyon2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/intel/crownbay/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/intel/galileo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/intel/minnowmax/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/inversepath/usbarmory/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/iomega/iconnect/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ip04/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ipek01/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/isee/igep0033/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/isee/igep00x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/jupiter/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/keymile/km82xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/keymile/km83xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/keymile/km_arm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/keymile/kmp204x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/kmc/kzm9g/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/kosagi/novena/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/l+g/vinco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/lego/ev3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/lg/sniper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/liebherr/lwmon5/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/logicpd/am3517evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/logicpd/omap3som/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/logicpd/zoom1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/microchip/pic32mzda/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/micronas/vct/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mini-box/picosam9g45/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mosaixtech/icon/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/motionpro/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mpc8308_p1m/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mpl/mip405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mpl/pati/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mpl/pip405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mpl/vcma9/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/mpr2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ms7720se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ms7722se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ms7750se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/munices/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nokia/rx51/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/beaver/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/cardhu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/dalmore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/e2220-1170/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/harmony/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/jetson-tk1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/nyan-big/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/p2371-0000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/p2371-2180/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/p2571/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/p2771-0000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/seaboard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/venice2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/ventana/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/nvidia/whistler/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/omicron/calimain/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/openrisc/openrisc-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/overo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/pandora/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/pb1x00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/pdm360ng/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/phytec/pcm030/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/phytec/pcm051/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/phytec/pcm052/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/phytec/pcm058/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ppcag/bg0900/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/pr1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/qca/ap121/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/qca/ap143/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/qemu-mips/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/quipos/cairo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/radxa/rock2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/raidsonic/ib62x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/MigoR/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/alt/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/ap325rxa/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/blanche/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/ecovec/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/gose/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/koelsch/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/lager/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/porter/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/r0p7734/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/r2dplus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/r7780mp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/rsk7203/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/rsk7264/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/rsk7269/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/salvator-x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/sh7752evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/sh7753evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/sh7757lcr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/sh7763rdp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/sh7785lcr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/silk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/renesas/stout/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/rockchip/evb_rk3036/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/rockchip/evb_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/rockchip/evb_rk3399/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ronetix/pm9261/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ronetix/pm9263/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ronetix/pm9g45/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/arndale/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/espresso7420/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/goni/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/odroid/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/origen/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/smdk2410/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/smdk5250/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/smdk5420/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/smdkc100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/smdkv310/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/trats/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/trats2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/samsung/universal_c210/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/sbc8349/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/sbc8548/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/sbc8641d/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/seco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/shmin/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/siemens/corvus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/siemens/draco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/siemens/pxm2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/siemens/rut/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/siemens/smartweb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/siemens/taurus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/silica/pengwyn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/socrates/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/spear/spear300/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/spear/spear310/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/spear/spear320/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/spear/spear600/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/spear/x600/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/st/stm32f429-discovery/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/st/stm32f746-disco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/st/stv0991/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/sunxi/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/synopsys/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/synopsys/axs10x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/sysam/amcore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/syteco/zmx25/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/t3corp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tbs/tbs2910/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tcl/sl50/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tcm-bf518/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tcm-bf537/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/technexion/pico-imx6ul/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/technexion/tao3530/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/technexion/twister/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/technologic/ts4800/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/teejet/mt_ventoux/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/am335x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/am3517crane/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/am43xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/am57xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/beagle/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/dra7xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/ks2_evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/omap5_uevm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/panda/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/sdp4430/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/ti814x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ti/ti816x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/timll/devkit3250/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/timll/devkit8000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/toradex/apalis_t30/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/toradex/colibri_imx7/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/toradex/colibri_pxa270/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/toradex/colibri_t20/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/toradex/colibri_t30/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/toradex/colibri_vf/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tplink/wdr4300/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tqc/tqm5200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tqc/tqm834x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tqc/tqm8xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/tqc/tqma6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/udoo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/v38b/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/varisys/cyrus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/ve8313/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/vscom/baltos/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/wandboard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/warp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/warp7/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/woodburn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/work-microwave/work_92105/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xes/xpedite1000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xes/xpedite517x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xes/xpedite520x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xes/xpedite537x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xes/xpedite550x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xilinx/microblaze-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xilinx/ppc405-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/xilinx/ppc440-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/zipitz2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	board/zyxel/nsa310s/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME	include/config/auto.conf	/^CONFIG_SYS_CONFIG_NAME="sun8i"$/;"	k
CONFIG_SYS_CONFIG_NAME	include/generated/autoconf.h	/^#define CONFIG_SYS_CONFIG_NAME /;"	d
CONFIG_SYS_CONFIG_NAME_MODULE	arch/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-highbank/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-integrator/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Integrator Options
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-mvebu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-uniphier/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/arm/mach-zynq/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	arch/nios2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Nios II architecture
CONFIG_SYS_CONFIG_NAME_MODULE	arch/sandbox/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Sandbox architecture
CONFIG_SYS_CONFIG_NAME_MODULE	board/8dtech/eco5pk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Arcturus/ucp1020/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Barix/ipam390/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/BuR/brppt1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/BuR/brxre1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/BuS/eb_cpu5282/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/CarMediaLab/flea3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/LaCie/edminiv2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/LaCie/net2big_v2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/LaCie/netspace_v2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Marvell/aspenite/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Marvell/dreamplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Marvell/gplugd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Marvell/guruplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Marvell/openrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Marvell/sheevaplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Seagate/dockstar/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Seagate/goflexhome/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Seagate/nas220/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/Synology/ds109/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/a3m071/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/a4m072/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/abilis/tb100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/advantech/dms-ba16/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amazon/kc1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/acadia/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/bamboo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/bubinga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/canyonlands/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/katmai/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/kilauea/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/luan/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/makalu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/redwood/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/sequoia/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/walnut/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/yosemite/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amcc/yucca/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/amlogic/odroid-c2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/aristainetos/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/armadeus/apf27/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/armltd/vexpress/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/armltd/vexpress64/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/astro/mcf5373l/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91rm9200ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9260ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9261ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9263ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9rlek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/atngw100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/atngw100mkii/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/atstk1000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/sama5d3xek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/atmel/sama5d4ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/avionic-design/medcom-wide/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/avionic-design/plutux/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/avionic-design/tec-ng/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/avionic-design/tec/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bachmann/ot1200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/barco/platinum/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/barco/titanium/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bct-brettl2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf506f-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf518f-ezbrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf525-ucr2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf526-ezbrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf527-ad7160-eval/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf527-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf527-sdp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf533-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf533-stamp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf537-minotaur/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf537-pnav/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf537-srv1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf537-stamp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf538f-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf548-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf561-acvilon/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf561-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bf609-ezkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/birdland/bav335x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/blackstamp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/blackvme/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bluegiga/apx4devkit/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bluewater/gurnard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bluewater/snapper9260/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/bosch/shc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/boundary/nitrogen6x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/br4/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/broadcom/bcmcygnus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/broadcom/bcmnsp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/buffalo/lsxl/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cadence/xtfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/calao/usb_a9263/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/canmb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cavium/thunderx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ccv/xpress/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cei/cei-tk1-som/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cirrus/edb93xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cloudengines/pogo_e02/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm-bf527/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm-bf533/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm-bf537e/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm-bf537u/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm-bf548/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm-bf561/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cm5200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/cobra5272/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compal/paz00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/cm_fx6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/cm_t335/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/cm_t35/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/cm_t3517/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/cm_t43/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/cm_t54/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/compulab/trimslice/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/corscience/tricorder/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/creative/xfi3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/d-link/dns325/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/davedenx/aria/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/davinci/da8xxevm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/davinci/ea20/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/dbau1x00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/denx/m28evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/denx/m53evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/denx/ma5d4evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/dfi/dfi-bt700/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/dnp5370/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/efi/efi-x86/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/egnite/ethernut5/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/el/el6x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/embest/mx6boards/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/emulation/qemu-x86/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/engicam/icorem6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/cpci2dp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/cpci405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/mecp5123/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/meesc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/plu405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/pmc405de/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/pmc440/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/vme8349/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/esd/vom405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/espt/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/firefly/firefly-rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/b4860qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/bsc9131rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/bsc9132qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/c29xpcie/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/corenet_ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1012afrdm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1012aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1012ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1021aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1021atwr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1043aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1043ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1046aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls1046ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls2080a/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls2080aqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/ls2080ardb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5208evbe/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m52277evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5235evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5249evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5253demo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5253evbe/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5272c3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5275evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5282evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m53017evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5329evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m5373evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m54418twr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m54451evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m54455evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m547xevb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/m548xevb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc5121ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8308rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8313erdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8315erdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8323erdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc832xemds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8349emds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8349itx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc837xemds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc837xerdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8536ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8540ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8541cds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8544ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8548cds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8555cds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8560ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8568mds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8569mds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8572ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx23evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx25pdk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx28evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx31ads/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx31pdk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx35pdk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx51evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx53ard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx53evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx53loco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx53smd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6qarm2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6sabresd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6slevk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx6ullevk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/mx7dsabresd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/p1010rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/p1022ds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/p1023rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/p1_twr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/p2041rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/qemu-ppce500/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/s32v234evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t102xqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t102xrdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t1040qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t104xrdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t208xqds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t208xrdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t4qds/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/t4rdb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/freescale/vf610twr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gaisler/gr_cpci_ax2000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gaisler/gr_ep2s60/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gaisler/gr_xc3s_1500/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gaisler/grsim/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gaisler/grsim_leon2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gateworks/gw_ventana/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/405ep/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/405ex/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/dlvision/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/gdppc440etx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/intip/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/mpc8308/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gdsys/p1022/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ge/bx50v3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/google/chromebook_jerry/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gumstix/duovero/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/gumstix/pepper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/h2200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/hisilicon/hikey/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/htkw/mcx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ibf-dsp561/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ids/ids8313/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ifm/ac14xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ifm/o2dnt2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/imgtec/boston/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/imgtec/malta/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/imgtec/xilfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/imx31_phycore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/in-circuit/grasshopper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/inka4x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/intel/bayleybay/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/intel/cougarcanyon2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/intel/crownbay/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/intel/galileo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/intel/minnowmax/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/inversepath/usbarmory/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/iomega/iconnect/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ip04/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ipek01/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/isee/igep0033/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/isee/igep00x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/jupiter/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/keymile/km82xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/keymile/km83xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/keymile/km_arm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/keymile/kmp204x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/kmc/kzm9g/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/kosagi/novena/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/l+g/vinco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/lego/ev3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/lg/sniper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/liebherr/lwmon5/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/logicpd/am3517evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/logicpd/omap3som/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/logicpd/zoom1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/microchip/pic32mzda/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/micronas/vct/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mini-box/picosam9g45/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mosaixtech/icon/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/motionpro/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mpc8308_p1m/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mpl/mip405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mpl/pati/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mpl/pip405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mpl/vcma9/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/mpr2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ms7720se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ms7722se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ms7750se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/munices/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nokia/rx51/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/beaver/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/cardhu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/dalmore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/e2220-1170/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/harmony/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/jetson-tk1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/nyan-big/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/p2371-0000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/p2371-2180/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/p2571/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/p2771-0000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/seaboard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/venice2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/ventana/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/nvidia/whistler/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/omicron/calimain/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/openrisc/openrisc-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/overo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/pandora/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/pb1x00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/pdm360ng/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/phytec/pcm030/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/phytec/pcm051/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/phytec/pcm052/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/phytec/pcm058/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ppcag/bg0900/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/pr1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/qca/ap121/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/qca/ap143/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/qemu-mips/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/quipos/cairo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/radxa/rock2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/raidsonic/ib62x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/MigoR/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/alt/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/ap325rxa/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/blanche/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/ecovec/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/gose/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/koelsch/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/lager/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/porter/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/r0p7734/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/r2dplus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/r7780mp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/rsk7203/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/rsk7264/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/rsk7269/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/salvator-x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/sh7752evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/sh7753evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/sh7757lcr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/sh7763rdp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/sh7785lcr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/silk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/renesas/stout/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/rockchip/evb_rk3036/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/rockchip/evb_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/rockchip/evb_rk3399/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ronetix/pm9261/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ronetix/pm9263/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ronetix/pm9g45/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/arndale/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/espresso7420/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/goni/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/odroid/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/origen/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/smdk2410/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/smdk5250/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/smdk5420/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/smdkc100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/smdkv310/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/trats/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/trats2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/samsung/universal_c210/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/sbc8349/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/sbc8548/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/sbc8641d/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/seco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/shmin/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/siemens/corvus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/siemens/draco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/siemens/pxm2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/siemens/rut/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/siemens/smartweb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/siemens/taurus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/silica/pengwyn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/socrates/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/spear/spear300/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/spear/spear310/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/spear/spear320/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/spear/spear600/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/spear/x600/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/st/stm32f429-discovery/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/st/stm32f746-disco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/st/stv0991/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/sunxi/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/synopsys/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/synopsys/axs10x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/sysam/amcore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/syteco/zmx25/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/t3corp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tbs/tbs2910/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tcl/sl50/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tcm-bf518/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tcm-bf537/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/technexion/pico-imx6ul/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/technexion/tao3530/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/technexion/twister/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/technologic/ts4800/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/teejet/mt_ventoux/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/am335x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/am3517crane/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/am43xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/am57xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/beagle/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/dra7xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/ks2_evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/omap5_uevm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/panda/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/sdp4430/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/ti814x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ti/ti816x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/timll/devkit3250/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/timll/devkit8000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/toradex/apalis_t30/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/toradex/colibri_imx7/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/toradex/colibri_pxa270/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/toradex/colibri_t20/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/toradex/colibri_t30/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/toradex/colibri_vf/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tqc/tqm5200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tqc/tqm834x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tqc/tqm8xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/tqc/tqma6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/udoo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/v38b/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/varisys/cyrus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/ve8313/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/vscom/baltos/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/wandboard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/warp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/warp7/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/woodburn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/work-microwave/work_92105/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xes/xpedite1000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xes/xpedite517x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xes/xpedite520x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xes/xpedite537x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xes/xpedite550x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xilinx/ppc405-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/xilinx/ppc440-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/zipitz2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONFIG_NAME_MODULE	board/zyxel/nsa310s/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
CONFIG_SYS_CONSOLE_BG_COL	drivers/video/Kconfig	/^config SYS_CONSOLE_BG_COL$/;"	c	menu:Graphics support
CONFIG_SYS_CONSOLE_BG_COL	include/config/auto.conf	/^CONFIG_SYS_CONSOLE_BG_COL=0x00$/;"	k
CONFIG_SYS_CONSOLE_BG_COL	include/generated/autoconf.h	/^#define CONFIG_SYS_CONSOLE_BG_COL /;"	d
CONFIG_SYS_CONSOLE_BG_COL_MODULE	drivers/video/Kconfig	/^config SYS_CONSOLE_BG_COL$/;"	c	menu:Graphics support
CONFIG_SYS_CONSOLE_ENV_OVERWRITE	common/Kconfig	/^config SYS_CONSOLE_ENV_OVERWRITE$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_ENV_OVERWRITE_MODULE	common/Kconfig	/^config SYS_CONSOLE_ENV_OVERWRITE$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_FG_COL	drivers/video/Kconfig	/^config SYS_CONSOLE_FG_COL$/;"	c	menu:Graphics support
CONFIG_SYS_CONSOLE_FG_COL	include/config/auto.conf	/^CONFIG_SYS_CONSOLE_FG_COL=0xa0$/;"	k
CONFIG_SYS_CONSOLE_FG_COL	include/generated/autoconf.h	/^#define CONFIG_SYS_CONSOLE_FG_COL /;"	d
CONFIG_SYS_CONSOLE_FG_COL_MODULE	drivers/video/Kconfig	/^config SYS_CONSOLE_FG_COL$/;"	c	menu:Graphics support
CONFIG_SYS_CONSOLE_INFO_QUIET	common/Kconfig	/^config SYS_CONSOLE_INFO_QUIET$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_INFO_QUIET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_CONSOLE_INFO_QUIET	/;"	d
CONFIG_SYS_CONSOLE_INFO_QUIET_MODULE	common/Kconfig	/^config SYS_CONSOLE_INFO_QUIET$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_IS_IN_ENV	common/Kconfig	/^config SYS_CONSOLE_IS_IN_ENV$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_IS_IN_ENV	include/config/auto.conf	/^CONFIG_SYS_CONSOLE_IS_IN_ENV=y$/;"	k
CONFIG_SYS_CONSOLE_IS_IN_ENV	include/generated/autoconf.h	/^#define CONFIG_SYS_CONSOLE_IS_IN_ENV /;"	d
CONFIG_SYS_CONSOLE_IS_IN_ENV_MODULE	common/Kconfig	/^config SYS_CONSOLE_IS_IN_ENV$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE	common/Kconfig	/^config SYS_CONSOLE_OVERWRITE_ROUTINE$/;"	c	menu:Console
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE_MODULE	common/Kconfig	/^config SYS_CONSOLE_OVERWRITE_ROUTINE$/;"	c	menu:Console
CONFIG_SYS_COREBOOT	arch/x86/cpu/coreboot/Kconfig	/^config SYS_COREBOOT$/;"	c
CONFIG_SYS_COREBOOT_MODULE	arch/x86/cpu/coreboot/Kconfig	/^config SYS_COREBOOT$/;"	c
CONFIG_SYS_CORE_SRAM	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CORE_SRAM	/;"	d
CONFIG_SYS_CORE_SRAM_SIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CORE_SRAM_SIZE	/;"	d
CONFIG_SYS_CORTEX_R4	include/configs/stv0991.h	/^#define CONFIG_SYS_CORTEX_R4$/;"	d
CONFIG_SYS_CORTINA_FW_IN_MMC	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CORTINA_FW_IN_MMC$/;"	d
CONFIG_SYS_CORTINA_FW_IN_NAND	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CORTINA_FW_IN_NAND$/;"	d
CONFIG_SYS_CORTINA_FW_IN_NOR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CORTINA_FW_IN_NOR$/;"	d
CONFIG_SYS_CORTINA_FW_IN_NOR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CORTINA_FW_IN_NOR$/;"	d
CONFIG_SYS_CORTINA_FW_IN_NOR	include/configs/ls2080ardb.h	/^#define	CONFIG_SYS_CORTINA_FW_IN_NOR$/;"	d
CONFIG_SYS_CORTINA_FW_IN_REMOTE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CORTINA_FW_IN_REMOTE$/;"	d
CONFIG_SYS_CORTINA_FW_IN_SPIFLASH	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CORTINA_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_CPC_REINIT_F	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SYS_CPC_REINIT_F$/;"	d
CONFIG_SYS_CPLD	include/configs/yosemite.h	/^#define CONFIG_SYS_CPLD	/;"	d
CONFIG_SYS_CPLD_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_CPLD_ADDR	/;"	d
CONFIG_SYS_CPLD_AMASK	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_AMASK	/;"	d
CONFIG_SYS_CPLD_AMASK	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_AMASK	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/acadia.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CPLD_BASE	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_BASE_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_CPLD_BASE_PHYS	/;"	d
CONFIG_SYS_CPLD_CSOR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_CSOR	/;"	d
CONFIG_SYS_CPLD_CSOR	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_CSOR	/;"	d
CONFIG_SYS_CPLD_CSPR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_CSPR	/;"	d
CONFIG_SYS_CPLD_CSPR	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_CSPR	/;"	d
CONFIG_SYS_CPLD_CSPR_EXT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_CSPR_EXT	/;"	d
CONFIG_SYS_CPLD_CSPR_EXT	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_CSPR_EXT	/;"	d
CONFIG_SYS_CPLD_DATA	include/configs/canyonlands.h	/^#define CONFIG_SYS_CPLD_DATA	/;"	d
CONFIG_SYS_CPLD_FTIM0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_FTIM0	/;"	d
CONFIG_SYS_CPLD_FTIM0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_FTIM0	/;"	d
CONFIG_SYS_CPLD_FTIM1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_FTIM1	/;"	d
CONFIG_SYS_CPLD_FTIM1	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_FTIM1	/;"	d
CONFIG_SYS_CPLD_FTIM2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_FTIM2	/;"	d
CONFIG_SYS_CPLD_FTIM2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_FTIM2	/;"	d
CONFIG_SYS_CPLD_FTIM3	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CPLD_FTIM3	/;"	d
CONFIG_SYS_CPLD_FTIM3	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CPLD_FTIM3	/;"	d
CONFIG_SYS_CPLD_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_CPLD_SIZE	/;"	d
CONFIG_SYS_CPLD_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CPLD_SIZE	/;"	d
CONFIG_SYS_CPMFCR_RAMTYPE	include/configs/MPC8560ADS.h	/^  #define CONFIG_SYS_CPMFCR_RAMTYPE /;"	d
CONFIG_SYS_CPRI	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_CPRI$/;"	d
CONFIG_SYS_CPRI_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_CPRI_CLK	/;"	d
CONFIG_SYS_CPU	arch/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	arch/arc/Kconfig	/^config SYS_CPU$/;"	c	menu:ARC architecture
CONFIG_SYS_CPU	arch/arm/Kconfig	/^config SYS_CPU$/;"	c	menu:ARM architecture
CONFIG_SYS_CPU	arch/mips/Kconfig	/^config SYS_CPU$/;"	c	menu:MIPS architecture
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc512x/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc512x CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc5xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc5xx CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc5xxx CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc8260/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc8260 CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc83xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc83xx CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc85xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc85xx CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc86xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc86xx CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/mpc8xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc8xx CPU
CONFIG_SYS_CPU	arch/powerpc/cpu/ppc4xx/Kconfig	/^config SYS_CPU$/;"	c	menu:ppc4xx CPU
CONFIG_SYS_CPU	arch/sandbox/Kconfig	/^config SYS_CPU$/;"	c	menu:Sandbox architecture
CONFIG_SYS_CPU	arch/sh/Kconfig	/^config SYS_CPU$/;"	c	menu:SuperH architecture
CONFIG_SYS_CPU	arch/sparc/Kconfig	/^config SYS_CPU$/;"	c	menu:SPARC architecture
CONFIG_SYS_CPU	arch/xtensa/Kconfig	/^config SYS_CPU$/;"	c	menu:Xtensa architecture
CONFIG_SYS_CPU	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/BuS/eb_cpu5282/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/abilis/tb100/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/astro/mcf5373l/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/barco/platinum/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/cavium/thunderx/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/cobra5272/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5208evbe/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m52277evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5235evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5249evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5253demo/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5253evbe/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5272c3/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5275evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5282evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m53017evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5329evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m5373evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m54418twr/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m54451evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m54455evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m547xevb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/m548xevb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/freescale/s32v234evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/sysam/amcore/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	board/toradex/colibri_vf/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU	include/config/auto.conf	/^CONFIG_SYS_CPU="armv7"$/;"	k
CONFIG_SYS_CPU	include/generated/autoconf.h	/^#define CONFIG_SYS_CPU /;"	d
CONFIG_SYS_CPUSPEED	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_CPUSPEED	/;"	d
CONFIG_SYS_CPUSPEED	include/configs/zipitz2.h	/^#define CONFIG_SYS_CPUSPEED	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/M5235EVB.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/amcore.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_CLK	include/configs/kzm9g.h	/^#define CONFIG_SYS_CPU_CLK	/;"	d
CONFIG_SYS_CPU_MODULE	arch/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	arch/arc/Kconfig	/^config SYS_CPU$/;"	c	menu:ARC architecture
CONFIG_SYS_CPU_MODULE	arch/arm/Kconfig	/^config SYS_CPU$/;"	c	menu:ARM architecture
CONFIG_SYS_CPU_MODULE	arch/mips/Kconfig	/^config SYS_CPU$/;"	c	menu:MIPS architecture
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc512x/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc512x CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc5xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc5xx CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc5xxx CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc8260/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc8260 CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc83xx CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc85xx CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc86xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc86xx CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc8xx CPU
CONFIG_SYS_CPU_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config SYS_CPU$/;"	c	menu:ppc4xx CPU
CONFIG_SYS_CPU_MODULE	arch/sandbox/Kconfig	/^config SYS_CPU$/;"	c	menu:Sandbox architecture
CONFIG_SYS_CPU_MODULE	arch/sh/Kconfig	/^config SYS_CPU$/;"	c	menu:SuperH architecture
CONFIG_SYS_CPU_MODULE	arch/sparc/Kconfig	/^config SYS_CPU$/;"	c	menu:SPARC architecture
CONFIG_SYS_CPU_MODULE	arch/xtensa/Kconfig	/^config SYS_CPU$/;"	c	menu:Xtensa architecture
CONFIG_SYS_CPU_MODULE	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/BuS/eb_cpu5282/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/abilis/tb100/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/astro/mcf5373l/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/barco/platinum/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/cavium/thunderx/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/cobra5272/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5208evbe/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m52277evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5235evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5249evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5253demo/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5253evbe/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5272c3/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5275evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5282evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m53017evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5329evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m5373evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m54418twr/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m54451evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m54455evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m547xevb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/m548xevb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/freescale/s32v234evb/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/sysam/amcore/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CPU_MODULE	board/toradex/colibri_vf/Kconfig	/^config SYS_CPU$/;"	c
CONFIG_SYS_CS0_BASE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/amcore.h	/^#define	CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_BASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS0_BASE	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/aria.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/motionpro.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CFG	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS0_CFG	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5282EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/amcore.h	/^#define	CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_CTRL	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS0_CTRL	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS0_FTIM0	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM1	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS0_FTIM1	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS0_FTIM2	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_FTIM3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS0_FTIM3	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M52277EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5282EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M54418TWR.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M54451EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/amcore.h	/^#define	CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_MASK	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS0_MASK	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/canmb.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_SIZE	include/configs/v38b.h	/^#define CONFIG_SYS_CS0_SIZE	/;"	d
CONFIG_SYS_CS0_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/a3m071.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/a4m072.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/canmb.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/cm5200.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/ipek01.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/jupiter.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/motionpro.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS0_START	include/configs/v38b.h	/^#define CONFIG_SYS_CS0_START	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/amcore.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS1_BASE	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/a3m071.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/a4m072.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/ipek01.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/motionpro.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CFG	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS1_CFG	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/amcore.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_CTRL	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS1_CTRL	/;"	d
CONFIG_SYS_CS1_FLASH_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_CS1_FLASH_BASE	/;"	d
CONFIG_SYS_CS1_FLASH_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_CS1_FLASH_BASE	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS1_FTIM0	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS1_FTIM1	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS1_FTIM2	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_FTIM3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS1_FTIM3	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5275EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M53017EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5475EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/M5485EVB.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/amcore.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_MASK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS1_MASK	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS1_SIZE	/;"	d
CONFIG_SYS_CS1_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/a3m071.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/a4m072.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/ipek01.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/motionpro.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS1_START	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS1_START	/;"	d
CONFIG_SYS_CS2_BASE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS2_BASE	/;"	d
CONFIG_SYS_CS2_BASE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS2_BASE	/;"	d
CONFIG_SYS_CS2_BASE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS2_BASE	/;"	d
CONFIG_SYS_CS2_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS2_BASE	/;"	d
CONFIG_SYS_CS2_BASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS2_BASE	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/a3m071.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/aria.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/ipek01.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/motionpro.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CFG	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS2_CFG	/;"	d
CONFIG_SYS_CS2_CTRL	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS2_CTRL	/;"	d
CONFIG_SYS_CS2_CTRL	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS2_CTRL	/;"	d
CONFIG_SYS_CS2_CTRL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS2_CTRL	/;"	d
CONFIG_SYS_CS2_CTRL	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS2_CTRL	/;"	d
CONFIG_SYS_CS2_CTRL	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS2_CTRL	/;"	d
CONFIG_SYS_CS2_FLASH_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_CS2_FLASH_BASE	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS2_FTIM0	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM1	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS2_FTIM1	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS2_FTIM2	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_FTIM3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS2_FTIM3	/;"	d
CONFIG_SYS_CS2_MASK	include/configs/M5329EVB.h	/^#define CONFIG_SYS_CS2_MASK	/;"	d
CONFIG_SYS_CS2_MASK	include/configs/M5373EVB.h	/^#define CONFIG_SYS_CS2_MASK	/;"	d
CONFIG_SYS_CS2_MASK	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS2_MASK	/;"	d
CONFIG_SYS_CS2_MASK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS2_MASK	/;"	d
CONFIG_SYS_CS2_MASK	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS2_MASK	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS2_SIZE	/;"	d
CONFIG_SYS_CS2_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/a3m071.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/aria.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/motionpro.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS2_START	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS2_START	/;"	d
CONFIG_SYS_CS3_BASE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS3_BASE	/;"	d
CONFIG_SYS_CS3_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS3_BASE	/;"	d
CONFIG_SYS_CS3_BASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS3_BASE	/;"	d
CONFIG_SYS_CS3_CFG	include/configs/a3m071.h	/^#define CONFIG_SYS_CS3_CFG	/;"	d
CONFIG_SYS_CS3_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS3_CFG	/;"	d
CONFIG_SYS_CS3_CFG	include/configs/charon.h	/^#define CONFIG_SYS_CS3_CFG	/;"	d
CONFIG_SYS_CS3_CFG	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS3_CFG	/;"	d
CONFIG_SYS_CS3_CFG	include/configs/ipek01.h	/^#define CONFIG_SYS_CS3_CFG	/;"	d
CONFIG_SYS_CS3_CFG	include/configs/motionpro.h	/^#define CONFIG_SYS_CS3_CFG	/;"	d
CONFIG_SYS_CS3_CTRL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS3_CTRL	/;"	d
CONFIG_SYS_CS3_CTRL	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS3_CTRL	/;"	d
CONFIG_SYS_CS3_CTRL	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS3_CTRL	/;"	d
CONFIG_SYS_CS3_FLASH_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_CS3_FLASH_BASE	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS3_FTIM0	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM1	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS3_FTIM1	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS3_FTIM2	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_FTIM3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CS3_FTIM3	/;"	d
CONFIG_SYS_CS3_MASK	include/configs/M54455EVB.h	/^#define CONFIG_SYS_CS3_MASK	/;"	d
CONFIG_SYS_CS3_MASK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_CS3_MASK	/;"	d
CONFIG_SYS_CS3_MASK	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_CS3_MASK	/;"	d
CONFIG_SYS_CS3_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS3_SIZE	/;"	d
CONFIG_SYS_CS3_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS3_SIZE	/;"	d
CONFIG_SYS_CS3_SIZE	include/configs/charon.h	/^#define CONFIG_SYS_CS3_SIZE	/;"	d
CONFIG_SYS_CS3_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS3_SIZE	/;"	d
CONFIG_SYS_CS3_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_CS3_SIZE	/;"	d
CONFIG_SYS_CS3_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_CS3_SIZE	/;"	d
CONFIG_SYS_CS3_START	include/configs/a3m071.h	/^#define CONFIG_SYS_CS3_START	/;"	d
CONFIG_SYS_CS3_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS3_START	/;"	d
CONFIG_SYS_CS3_START	include/configs/charon.h	/^#define CONFIG_SYS_CS3_START	/;"	d
CONFIG_SYS_CS3_START	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS3_START	/;"	d
CONFIG_SYS_CS3_START	include/configs/ipek01.h	/^#define CONFIG_SYS_CS3_START	/;"	d
CONFIG_SYS_CS3_START	include/configs/motionpro.h	/^#define CONFIG_SYS_CS3_START	/;"	d
CONFIG_SYS_CS4_CFG	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS4_CFG	/;"	d
CONFIG_SYS_CS4_CFG	include/configs/a3m071.h	/^#define CONFIG_SYS_CS4_CFG	/;"	d
CONFIG_SYS_CS4_CFG	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS4_CFG	/;"	d
CONFIG_SYS_CS4_FLASH_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_CS4_FLASH_BASE	/;"	d
CONFIG_SYS_CS4_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS4_SIZE	/;"	d
CONFIG_SYS_CS4_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS4_SIZE	/;"	d
CONFIG_SYS_CS4_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS4_SIZE	/;"	d
CONFIG_SYS_CS4_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS4_START	/;"	d
CONFIG_SYS_CS4_START	include/configs/a3m071.h	/^#define CONFIG_SYS_CS4_START	/;"	d
CONFIG_SYS_CS4_START	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS4_START	/;"	d
CONFIG_SYS_CS5_CFG	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS5_CFG	/;"	d
CONFIG_SYS_CS5_CFG	include/configs/a3m071.h	/^#define CONFIG_SYS_CS5_CFG	/;"	d
CONFIG_SYS_CS5_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS5_CFG	/;"	d
CONFIG_SYS_CS5_FLASH_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_CS5_FLASH_BASE	/;"	d
CONFIG_SYS_CS5_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS5_SIZE	/;"	d
CONFIG_SYS_CS5_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS5_SIZE	/;"	d
CONFIG_SYS_CS5_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS5_SIZE	/;"	d
CONFIG_SYS_CS5_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS5_SIZE	/;"	d
CONFIG_SYS_CS5_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS5_START	/;"	d
CONFIG_SYS_CS5_START	include/configs/a3m071.h	/^#define CONFIG_SYS_CS5_START	/;"	d
CONFIG_SYS_CS5_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS5_START	/;"	d
CONFIG_SYS_CS5_START	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS5_START	/;"	d
CONFIG_SYS_CS6_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS6_CFG	/;"	d
CONFIG_SYS_CS6_CFG	include/configs/aria.h	/^#define CONFIG_SYS_CS6_CFG	/;"	d
CONFIG_SYS_CS6_CFG	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS6_CFG	/;"	d
CONFIG_SYS_CS6_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS6_SIZE	/;"	d
CONFIG_SYS_CS6_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_CS6_SIZE	/;"	d
CONFIG_SYS_CS6_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS6_SIZE	/;"	d
CONFIG_SYS_CS6_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS6_START	/;"	d
CONFIG_SYS_CS6_START	include/configs/aria.h	/^#define CONFIG_SYS_CS6_START	/;"	d
CONFIG_SYS_CS6_START	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS6_START	/;"	d
CONFIG_SYS_CS7_CFG	include/configs/a4m072.h	/^#define CONFIG_SYS_CS7_CFG	/;"	d
CONFIG_SYS_CS7_CFG	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS7_CFG	/;"	d
CONFIG_SYS_CS7_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_CS7_SIZE	/;"	d
CONFIG_SYS_CS7_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS7_SIZE	/;"	d
CONFIG_SYS_CS7_START	include/configs/a4m072.h	/^#define CONFIG_SYS_CS7_START	/;"	d
CONFIG_SYS_CS7_START	include/configs/ipek01.h	/^#define	CONFIG_SYS_CS7_START	/;"	d
CONFIG_SYS_CSOR0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSOR0	/;"	d
CONFIG_SYS_CSOR0_EXT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSOR0_EXT	/;"	d
CONFIG_SYS_CSOR1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSOR1	/;"	d
CONFIG_SYS_CSOR1_EXT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSOR1_EXT	/;"	d
CONFIG_SYS_CSOR2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSOR2	/;"	d
CONFIG_SYS_CSOR3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSOR3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSOR3	/;"	d
CONFIG_SYS_CSPR0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR0	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_EXT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR0_EXT	/;"	d
CONFIG_SYS_CSPR0_FINAL	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_CSPR0_FINAL	/;"	d
CONFIG_SYS_CSPR0_FINAL	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSPR0_FINAL	/;"	d
CONFIG_SYS_CSPR0_FINAL	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR0_FINAL	/;"	d
CONFIG_SYS_CSPR0_FINAL	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR0_FINAL	/;"	d
CONFIG_SYS_CSPR1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR1	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_EXT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR1_EXT	/;"	d
CONFIG_SYS_CSPR1_FINAL	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR1_FINAL	/;"	d
CONFIG_SYS_CSPR2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR2	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_EXT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR2_EXT	/;"	d
CONFIG_SYS_CSPR2_FINAL	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR2_FINAL	/;"	d
CONFIG_SYS_CSPR2_FINAL	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR2_FINAL	/;"	d
CONFIG_SYS_CSPR3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR3	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_EXT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR3_EXT	/;"	d
CONFIG_SYS_CSPR3_FINAL	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_CSPR3_FINAL	/;"	d
CONFIG_SYS_CSPR3_FINAL	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_CSPR3_FINAL	/;"	d
CONFIG_SYS_CS_ALETIMING	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS_ALETIMING	/;"	d
CONFIG_SYS_CS_ALETIMING	include/configs/aria.h	/^#define CONFIG_SYS_CS_ALETIMING	/;"	d
CONFIG_SYS_CS_ALETIMING	include/configs/mecp5123.h	/^#define CONFIG_SYS_CS_ALETIMING	/;"	d
CONFIG_SYS_CS_ALETIMING	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_CS_ALETIMING	/;"	d
CONFIG_SYS_CS_ALETIMING	include/configs/pdm360ng.h	/^#define CONFIG_SYS_CS_ALETIMING	/;"	d
CONFIG_SYS_CS_BURST	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/a3m071.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/a4m072.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/canmb.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/cm5200.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/ipek01.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/jupiter.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/motionpro.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/munices.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/pcm030.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_BURST	include/configs/v38b.h	/^#define CONFIG_SYS_CS_BURST	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/TQM5200.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/a3m071.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/a4m072.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/canmb.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/cm5200.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/inka4x0.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/ipek01.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/jupiter.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/motionpro.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/munices.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/pcm030.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_DEADCYCLE	include/configs/v38b.h	/^#define CONFIG_SYS_CS_DEADCYCLE	/;"	d
CONFIG_SYS_CS_HOLDCYCLE	include/configs/ac14xx.h	/^#define CONFIG_SYS_CS_HOLDCYCLE	/;"	d
CONFIG_SYS_DA850_CS2CFG	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_CS2CFG	/;"	d
CONFIG_SYS_DA850_CS3CFG	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_CS3CFG /;"	d
CONFIG_SYS_DA850_CS3CFG	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_CS3CFG	/;"	d
CONFIG_SYS_DA850_DDR2_DDRPHYCR	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_DDRPHYCR /;"	d
CONFIG_SYS_DA850_DDR2_DDRPHYCR	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_DDRPHYCR /;"	d
CONFIG_SYS_DA850_DDR2_DDRPHYCR	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_DDRPHYCR /;"	d
CONFIG_SYS_DA850_DDR2_DDRPHYCR	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_DDRPHYCR /;"	d
CONFIG_SYS_DA850_DDR2_PBBPR	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_PBBPR	/;"	d
CONFIG_SYS_DA850_DDR2_PBBPR	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_PBBPR /;"	d
CONFIG_SYS_DA850_DDR2_PBBPR	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_PBBPR	/;"	d
CONFIG_SYS_DA850_DDR2_PBBPR	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_PBBPR /;"	d
CONFIG_SYS_DA850_DDR2_SDBCR	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR /;"	d
CONFIG_SYS_DA850_DDR2_SDBCR	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR /;"	d
CONFIG_SYS_DA850_DDR2_SDBCR	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR /;"	d
CONFIG_SYS_DA850_DDR2_SDBCR	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR /;"	d
CONFIG_SYS_DA850_DDR2_SDBCR2	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR2	/;"	d
CONFIG_SYS_DA850_DDR2_SDBCR2	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR2 /;"	d
CONFIG_SYS_DA850_DDR2_SDBCR2	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR2	/;"	d
CONFIG_SYS_DA850_DDR2_SDBCR2	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_SDBCR2 /;"	d
CONFIG_SYS_DA850_DDR2_SDRCR	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_SDRCR	/;"	d
CONFIG_SYS_DA850_DDR2_SDRCR	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_SDRCR /;"	d
CONFIG_SYS_DA850_DDR2_SDRCR	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_SDRCR	/;"	d
CONFIG_SYS_DA850_DDR2_SDRCR	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_SDRCR /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR2	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR2 /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR2	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR2 /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR2	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR2 /;"	d
CONFIG_SYS_DA850_DDR2_SDTIMR2	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR2_SDTIMR2 /;"	d
CONFIG_SYS_DA850_DDR_INIT	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_DDR_INIT$/;"	d
CONFIG_SYS_DA850_DDR_INIT	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_DDR_INIT$/;"	d
CONFIG_SYS_DA850_DDR_INIT	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_DDR_INIT$/;"	d
CONFIG_SYS_DA850_DDR_INIT	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_DDR_INIT$/;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV1	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV1	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV1	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV1	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV1	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV2	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV2	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV2	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV2	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV2	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV3	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV3	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV3	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV3	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV3	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV4	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV4 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV4	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV4 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV4	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV4 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV4	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV4 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV4	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV4 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV5	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV5 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV5	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV5 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV5	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV5 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV5	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV5 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV5	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV5 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV6	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV6 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV6	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV6 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV6	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV6 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV6	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV6 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV6	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV6 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV7	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV7 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV7	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV7 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV7	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV7 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV7	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV7 /;"	d
CONFIG_SYS_DA850_PLL0_PLLDIV7	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLDIV7 /;"	d
CONFIG_SYS_DA850_PLL0_PLLM	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_PLLM /;"	d
CONFIG_SYS_DA850_PLL0_PLLM	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_PLLM /;"	d
CONFIG_SYS_DA850_PLL0_PLLM	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_PLLM /;"	d
CONFIG_SYS_DA850_PLL0_PLLM	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_PLLM /;"	d
CONFIG_SYS_DA850_PLL0_PLLM	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_PLLM /;"	d
CONFIG_SYS_DA850_PLL0_POSTDIV	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL0_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL0_POSTDIV	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL0_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL0_POSTDIV	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL0_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL0_POSTDIV	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL0_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL0_POSTDIV	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL0_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV1	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV1	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV1	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV1	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV1	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV1 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV2	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV2	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV2	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV2	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV2	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV2 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV3	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV3	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV3	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV3	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL1_PLLDIV3	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL1_PLLDIV3 /;"	d
CONFIG_SYS_DA850_PLL1_PLLM	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL1_PLLM /;"	d
CONFIG_SYS_DA850_PLL1_PLLM	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL1_PLLM /;"	d
CONFIG_SYS_DA850_PLL1_PLLM	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL1_PLLM /;"	d
CONFIG_SYS_DA850_PLL1_PLLM	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL1_PLLM /;"	d
CONFIG_SYS_DA850_PLL1_PLLM	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL1_PLLM /;"	d
CONFIG_SYS_DA850_PLL1_POSTDIV	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL1_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL1_POSTDIV	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL1_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL1_POSTDIV	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL1_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL1_POSTDIV	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL1_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL1_POSTDIV	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_PLL1_POSTDIV /;"	d
CONFIG_SYS_DA850_PLL_INIT	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_PLL_INIT$/;"	d
CONFIG_SYS_DA850_PLL_INIT	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_PLL_INIT$/;"	d
CONFIG_SYS_DA850_PLL_INIT	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_PLL_INIT$/;"	d
CONFIG_SYS_DA850_PLL_INIT	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_PLL_INIT$/;"	d
CONFIG_SYS_DA850_SYSCFG_SUSPSRC	include/configs/calimain.h	/^#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC /;"	d
CONFIG_SYS_DA850_SYSCFG_SUSPSRC	include/configs/da850evm.h	/^#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC /;"	d
CONFIG_SYS_DA850_SYSCFG_SUSPSRC	include/configs/ipam390.h	/^#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC /;"	d
CONFIG_SYS_DA850_SYSCFG_SUSPSRC	include/configs/legoev3.h	/^#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC /;"	d
CONFIG_SYS_DA850_SYSCFG_SUSPSRC	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC /;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/ethernut5.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/meesc.h	/^# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/pm9261.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/pm9263.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	include/configs/usb_a9263.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	/;"	d
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	include/configs/pm9261.h	/^#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	/;"	d
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT	drivers/net/davinci_emac.c	/^#define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT	/;"	d	file:
CONFIG_SYS_DAVINCI_I2C_SLAVE	include/configs/da850evm.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE /;"	d
CONFIG_SYS_DAVINCI_I2C_SLAVE	include/configs/ea20.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE /;"	d
CONFIG_SYS_DAVINCI_I2C_SLAVE	include/configs/legoev3.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE /;"	d
CONFIG_SYS_DAVINCI_I2C_SLAVE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE	/;"	d
CONFIG_SYS_DAVINCI_I2C_SLAVE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE	/;"	d
CONFIG_SYS_DAVINCI_I2C_SLAVE1	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE1	/;"	d
CONFIG_SYS_DAVINCI_I2C_SLAVE2	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DAVINCI_I2C_SLAVE2	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED	include/configs/da850evm.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED	include/configs/ea20.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED	include/configs/legoev3.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED1	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED1	/;"	d
CONFIG_SYS_DAVINCI_I2C_SPEED2	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DAVINCI_I2C_SPEED2	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/strider.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT0L	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/strider.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT0U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT0U	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/strider.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT1L	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/strider.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT1U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT1U	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/strider.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT2L	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/strider.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT2U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT2U	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/strider.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT3L	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/hrcon.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/strider.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT3U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT3U	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT4L	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT4U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT4U	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT5L /;"	d
CONFIG_SYS_DBAT5L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/suvd3.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/suvd3.h	/^#define CONFIG_SYS_DBAT5L /;"	d
CONFIG_SYS_DBAT5L	include/configs/tuxx1.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT5L	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/suvd3.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/suvd3.h	/^#define CONFIG_SYS_DBAT5U /;"	d
CONFIG_SYS_DBAT5U	include/configs/tuxx1.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT5U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT5U	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT6L /;"	d
CONFIG_SYS_DBAT6L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/suvd3.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/tuxx1.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT6L	/;"	d
CONFIG_SYS_DBAT6L_EARLY	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT6L_EARLY	/;"	d
CONFIG_SYS_DBAT6L_EARLY	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT6L_EARLY	/;"	d
CONFIG_SYS_DBAT6L_EARLY	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT6L_EARLY	/;"	d
CONFIG_SYS_DBAT6L_EARLY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT6L_EARLY	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/suvd3.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/tuxx1.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT6U	/;"	d
CONFIG_SYS_DBAT6U_EARLY	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT6U_EARLY	/;"	d
CONFIG_SYS_DBAT6U_EARLY	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT6U_EARLY	/;"	d
CONFIG_SYS_DBAT6U_EARLY	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT6U_EARLY	/;"	d
CONFIG_SYS_DBAT6U_EARLY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT6U_EARLY	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT7L /;"	d
CONFIG_SYS_DBAT7L	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/tuxx1.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT7L	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DBAT7U /;"	d
CONFIG_SYS_DBAT7U	include/configs/TQM834x.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/ids8313.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/km8360.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/sbc8349.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/tuxx1.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/ve8313.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/vme8349.h	/^#define CONFIG_SYS_DBAT7U	/;"	d
CONFIG_SYS_DBAT7U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DBAT7U /;"	d
CONFIG_SYS_DCACHE_INV	include/configs/M54418TWR.h	/^#define CONFIG_SYS_DCACHE_INV	/;"	d
CONFIG_SYS_DCACHE_INV	include/configs/M54451EVB.h	/^#define CONFIG_SYS_DCACHE_INV	/;"	d
CONFIG_SYS_DCACHE_INV	include/configs/M54455EVB.h	/^#define CONFIG_SYS_DCACHE_INV	/;"	d
CONFIG_SYS_DCACHE_INV	include/configs/M5475EVB.h	/^#define CONFIG_SYS_DCACHE_INV	/;"	d
CONFIG_SYS_DCACHE_INV	include/configs/M5485EVB.h	/^#define CONFIG_SYS_DCACHE_INV	/;"	d
CONFIG_SYS_DCACHE_LINESZ	include/configs/atngw100.h	/^#define CONFIG_SYS_DCACHE_LINESZ	/;"	d
CONFIG_SYS_DCACHE_LINESZ	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_DCACHE_LINESZ	/;"	d
CONFIG_SYS_DCACHE_LINESZ	include/configs/atstk1002.h	/^#define CONFIG_SYS_DCACHE_LINESZ	/;"	d
CONFIG_SYS_DCACHE_LINESZ	include/configs/grasshopper.h	/^#define CONFIG_SYS_DCACHE_LINESZ	/;"	d
CONFIG_SYS_DCACHE_LINE_SIZE	arch/mips/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_DCACHE_LINE_SIZE	board/dbau1x00/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE	board/micronas/vct/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE	board/pb1x00/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE	board/qca/ap121/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE	board/qca/ap143/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE	board/qemu-mips/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	arch/mips/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/dbau1x00/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/micronas/vct/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/pb1x00/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/qca/ap121/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/qca/ap143/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/qemu-mips/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_LINE_SIZE_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
CONFIG_SYS_DCACHE_OFF	arch/arc/Kconfig	/^config SYS_DCACHE_OFF$/;"	c	menu:ARC architecture
CONFIG_SYS_DCACHE_OFF	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/devkit3250.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/etamin.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/flea3.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/gplugd.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/highbank.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/origen.h	/^#define CONFIG_SYS_DCACHE_OFF	/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/smartweb.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/stv0991.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/taurus.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/woodburn_common.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/work_92105.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF	include/configs/zynq-common.h	/^#define CONFIG_SYS_DCACHE_OFF$/;"	d
CONFIG_SYS_DCACHE_OFF_MODULE	arch/arc/Kconfig	/^config SYS_DCACHE_OFF$/;"	c	menu:ARC architecture
CONFIG_SYS_DCACHE_SACR_VALUE	arch/powerpc/cpu/ppc4xx/start.S	/^# define CONFIG_SYS_DCACHE_SACR_VALUE	/;"	d	file:
CONFIG_SYS_DCACHE_SIZE	arch/mips/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_DCACHE_SIZE	arch/powerpc/include/asm/ppc405.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	arch/powerpc/include/asm/ppc440.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	board/dbau1x00/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	board/micronas/vct/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	board/pb1x00/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	board/qca/ap121/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	board/qca/ap143/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	board/qemu-mips/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DCACHE_SIZE	/;"	d
CONFIG_SYS_DCACHE_SIZE_MODULE	arch/mips/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_DCACHE_SIZE_MODULE	board/dbau1x00/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE_MODULE	board/micronas/vct/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE_MODULE	board/pb1x00/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE_MODULE	board/qca/ap121/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE_MODULE	board/qca/ap143/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE_MODULE	board/qemu-mips/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCACHE_SIZE_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
CONFIG_SYS_DCSRBAR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^#define CONFIG_SYS_DCSRBAR	/;"	d	file:
CONFIG_SYS_DCSRBAR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/cyrus.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR	include/configs/t4qds.h	/^#define CONFIG_SYS_DCSRBAR	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d	file:
CONFIG_SYS_DCSRBAR_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSRBAR_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_DCSRBAR_PHYS	/;"	d
CONFIG_SYS_DCSR_COP_CCP_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_DCSR_COP_CCP_ADDR	/;"	d
CONFIG_SYS_DCSR_DCFG_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_DCSR_DCFG_ADDR	/;"	d
CONFIG_SYS_DCSR_DCFG_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_DCSR_DCFG_ADDR	/;"	d
CONFIG_SYS_DCSR_DCFG_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define	CONFIG_SYS_DCSR_DCFG_OFFSET	/;"	d
CONFIG_SYS_DCU_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_DCU_ADDR	/;"	d
CONFIG_SYS_DDR1_CS0_BNDS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR1_CS0_BNDS /;"	d
CONFIG_SYS_DDR2_CFG_1A	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CFG_1A	/;"	d
CONFIG_SYS_DDR2_CFG_1B	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CFG_1B	/;"	d
CONFIG_SYS_DDR2_CFG_2	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CFG_2	/;"	d
CONFIG_SYS_DDR2_CLK_CTRL	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CLK_CTRL	/;"	d
CONFIG_SYS_DDR2_CS0_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS0_BNDS	/;"	d	file:
CONFIG_SYS_DDR2_CS0_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS0_BNDS	/;"	d
CONFIG_SYS_DDR2_CS0_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS0_CONFIG	/;"	d	file:
CONFIG_SYS_DDR2_CS0_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR2_CS1_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS1_BNDS	/;"	d	file:
CONFIG_SYS_DDR2_CS1_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS1_BNDS	/;"	d
CONFIG_SYS_DDR2_CS1_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS1_CONFIG	/;"	d	file:
CONFIG_SYS_DDR2_CS1_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS1_CONFIG	/;"	d
CONFIG_SYS_DDR2_CS2_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS2_BNDS	/;"	d	file:
CONFIG_SYS_DDR2_CS2_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS2_BNDS	/;"	d
CONFIG_SYS_DDR2_CS2_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS2_CONFIG	/;"	d	file:
CONFIG_SYS_DDR2_CS2_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS2_CONFIG	/;"	d
CONFIG_SYS_DDR2_CS3_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS3_BNDS	/;"	d	file:
CONFIG_SYS_DDR2_CS3_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS3_BNDS	/;"	d
CONFIG_SYS_DDR2_CS3_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR2_CS3_CONFIG	/;"	d	file:
CONFIG_SYS_DDR2_CS3_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_CS3_CONFIG	/;"	d
CONFIG_SYS_DDR2_DATA_INIT	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_DATA_INIT	/;"	d
CONFIG_SYS_DDR2_EXT_REFRESH	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_EXT_REFRESH /;"	d
CONFIG_SYS_DDR2_INTERVAL	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_INTERVAL	/;"	d
CONFIG_SYS_DDR2_MODE_1	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_MODE_1	/;"	d
CONFIG_SYS_DDR2_MODE_2	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_MODE_2	/;"	d
CONFIG_SYS_DDR2_MODE_CTL	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_MODE_CTL	/;"	d
CONFIG_SYS_DDR2_TIMING_0	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_TIMING_0	/;"	d
CONFIG_SYS_DDR2_TIMING_1	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_TIMING_1	/;"	d
CONFIG_SYS_DDR2_TIMING_2	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR2_TIMING_2	/;"	d
CONFIG_SYS_DDRCDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDRCDR	/;"	d
CONFIG_SYS_DDRCDR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDRCDR	/;"	d
CONFIG_SYS_DDRCDR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDRCDR /;"	d
CONFIG_SYS_DDRCDR	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDRCDR /;"	d
CONFIG_SYS_DDRCDR	include/configs/km8360.h	/^#define CONFIG_SYS_DDRCDR /;"	d
CONFIG_SYS_DDRCDR	include/configs/vme8349.h	/^#define CONFIG_SYS_DDRCDR	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/hrcon.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/ids8313.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/strider.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCDR_VALUE	include/configs/ve8313.h	/^#define CONFIG_SYS_DDRCDR_VALUE	/;"	d
CONFIG_SYS_DDRCMD_EM2	include/configs/ac14xx.h	/^#define	CONFIG_SYS_DDRCMD_EM2	/;"	d
CONFIG_SYS_DDRCMD_EM2	include/configs/aria.h	/^#define	CONFIG_SYS_DDRCMD_EM2	/;"	d
CONFIG_SYS_DDRCMD_EM2	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_EM2	/;"	d
CONFIG_SYS_DDRCMD_EM2	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_EM2	/;"	d
CONFIG_SYS_DDRCMD_EM2	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_EM2	/;"	d
CONFIG_SYS_DDRCMD_EM3	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDRCMD_EM3	/;"	d
CONFIG_SYS_DDRCMD_EM3	include/configs/aria.h	/^#define CONFIG_SYS_DDRCMD_EM3	/;"	d
CONFIG_SYS_DDRCMD_EM3	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_EM3	/;"	d
CONFIG_SYS_DDRCMD_EM3	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_EM3	/;"	d
CONFIG_SYS_DDRCMD_EM3	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_EM3	/;"	d
CONFIG_SYS_DDRCMD_EN_DLL	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDRCMD_EN_DLL	/;"	d
CONFIG_SYS_DDRCMD_EN_DLL	include/configs/aria.h	/^#define CONFIG_SYS_DDRCMD_EN_DLL	/;"	d
CONFIG_SYS_DDRCMD_EN_DLL	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_EN_DLL	/;"	d
CONFIG_SYS_DDRCMD_EN_DLL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_EN_DLL	/;"	d
CONFIG_SYS_DDRCMD_EN_DLL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_EN_DLL	/;"	d
CONFIG_SYS_DDRCMD_NOP	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDRCMD_NOP	/;"	d
CONFIG_SYS_DDRCMD_NOP	include/configs/aria.h	/^#define CONFIG_SYS_DDRCMD_NOP	/;"	d
CONFIG_SYS_DDRCMD_NOP	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_NOP	/;"	d
CONFIG_SYS_DDRCMD_NOP	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_NOP	/;"	d
CONFIG_SYS_DDRCMD_NOP	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_NOP	/;"	d
CONFIG_SYS_DDRCMD_OCD_DEFAULT	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	/;"	d
CONFIG_SYS_DDRCMD_OCD_DEFAULT	include/configs/aria.h	/^#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	/;"	d
CONFIG_SYS_DDRCMD_OCD_DEFAULT	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	/;"	d
CONFIG_SYS_DDRCMD_OCD_DEFAULT	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	/;"	d
CONFIG_SYS_DDRCMD_OCD_DEFAULT	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	/;"	d
CONFIG_SYS_DDRCMD_OCD_EXIT	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_OCD_EXIT	/;"	d
CONFIG_SYS_DDRCMD_PCHG_ALL	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDRCMD_PCHG_ALL	/;"	d
CONFIG_SYS_DDRCMD_PCHG_ALL	include/configs/aria.h	/^#define CONFIG_SYS_DDRCMD_PCHG_ALL	/;"	d
CONFIG_SYS_DDRCMD_PCHG_ALL	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_PCHG_ALL	/;"	d
CONFIG_SYS_DDRCMD_PCHG_ALL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_PCHG_ALL	/;"	d
CONFIG_SYS_DDRCMD_PCHG_ALL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_PCHG_ALL	/;"	d
CONFIG_SYS_DDRCMD_RES_DLL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_RES_DLL	/;"	d
CONFIG_SYS_DDRCMD_RFSH	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDRCMD_RFSH	/;"	d
CONFIG_SYS_DDRCMD_RFSH	include/configs/aria.h	/^#define CONFIG_SYS_DDRCMD_RFSH	/;"	d
CONFIG_SYS_DDRCMD_RFSH	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDRCMD_RFSH	/;"	d
CONFIG_SYS_DDRCMD_RFSH	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDRCMD_RFSH	/;"	d
CONFIG_SYS_DDRCMD_RFSH	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDRCMD_RFSH	/;"	d
CONFIG_SYS_DDRUA	include/configs/M5282EVB.h	/^#define CONFIG_SYS_DDRUA	/;"	d
CONFIG_SYS_DDRUA	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_DDRUA	/;"	d
CONFIG_SYS_DDR_1G	board/advantech/dms-ba16/Kconfig	/^config SYS_DDR_1G$/;"	c	choice:choiceea9c8f640104
CONFIG_SYS_DDR_1G_MODULE	board/advantech/dms-ba16/Kconfig	/^config SYS_DDR_1G$/;"	c	choice:choiceea9c8f640104
CONFIG_SYS_DDR_2G	board/advantech/dms-ba16/Kconfig	/^config SYS_DDR_2G$/;"	c	choice:choiceea9c8f640104
CONFIG_SYS_DDR_2G_MODULE	board/advantech/dms-ba16/Kconfig	/^config SYS_DDR_2G$/;"	c	choice:choiceea9c8f640104
CONFIG_SYS_DDR_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/aria.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/strider.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_DDR_BASE	/;"	d
CONFIG_SYS_DDR_BLOCK1_SIZE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_DDR_BLOCK1_SIZE	/;"	d
CONFIG_SYS_DDR_BLOCK1_SIZE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_DDR_BLOCK1_SIZE /;"	d
CONFIG_SYS_DDR_BLOCK2_BASE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_DDR_BLOCK2_BASE /;"	d
CONFIG_SYS_DDR_BLOCK2_BASE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_DDR_BLOCK2_BASE /;"	d
CONFIG_SYS_DDR_BLOCK2_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_DDR_BLOCK2_BASE	/;"	d
CONFIG_SYS_DDR_CACHED_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_DDR_CACHED_ADDR	/;"	d
CONFIG_SYS_DDR_CDR_1	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_CDR_1	/;"	d
CONFIG_SYS_DDR_CDR_2	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_CDR_2	/;"	d
CONFIG_SYS_DDR_CFG_1A	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CFG_1A	/;"	d
CONFIG_SYS_DDR_CFG_1B	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CFG_1B	/;"	d
CONFIG_SYS_DDR_CFG_2	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CFG_2	/;"	d
CONFIG_SYS_DDR_CLKSEL	include/configs/mx51evk.h	/^#define CONFIG_SYS_DDR_CLKSEL	/;"	d
CONFIG_SYS_DDR_CLKSEL	include/configs/ts4800.h	/^#define CONFIG_SYS_DDR_CLKSEL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_CLK_CNTL /;"	d
CONFIG_SYS_DDR_CLK_CNTL	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_CLK_CONTROL	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_CLK_CONTROL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CLK_CTRL	/;"	d
CONFIG_SYS_DDR_CLK_CTRL_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CLK_CTRL_1000	/;"	d	file:
CONFIG_SYS_DDR_CLK_CTRL_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CLK_CTRL_1200	/;"	d	file:
CONFIG_SYS_DDR_CLK_CTRL_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CLK_CTRL_1333	/;"	d
CONFIG_SYS_DDR_CLK_CTRL_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CLK_CTRL_667	/;"	d
CONFIG_SYS_DDR_CLK_CTRL_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CLK_CTRL_800	/;"	d	file:
CONFIG_SYS_DDR_CLK_CTRL_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_CLK_CTRL_800	/;"	d
CONFIG_SYS_DDR_CLK_CTRL_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CLK_CTRL_800	/;"	d
CONFIG_SYS_DDR_CLK_CTRL_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CLK_CTRL_800	/;"	d
CONFIG_SYS_DDR_CLK_CTRL_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CLK_CTRL_900	/;"	d	file:
CONFIG_SYS_DDR_CONFIG	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_CONFIG	/;"	d
CONFIG_SYS_DDR_CONFIG	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_CONFIG	/;"	d
CONFIG_SYS_DDR_CONFIG_2	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CONFIG_256	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_CONFIG_256	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_CONTROL /;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL	include/configs/sbc8548.h	/^	#define CONFIG_SYS_DDR_CONTROL	/;"	d
CONFIG_SYS_DDR_CONTROL2	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_CONTROL2	/;"	d
CONFIG_SYS_DDR_CONTROL2	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_CONTROL2 /;"	d
CONFIG_SYS_DDR_CONTROL2	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_CONTROL2	/;"	d
CONFIG_SYS_DDR_CONTROL2	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_CONTROL2	/;"	d
CONFIG_SYS_DDR_CONTROL_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL_1333	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL_2 /;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CONTROL_2	/;"	d
CONFIG_SYS_DDR_CONTROL_2_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL_2_1333	/;"	d
CONFIG_SYS_DDR_CONTROL_2_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL_2_800	/;"	d
CONFIG_SYS_DDR_CONTROL_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CONTROL_800	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d	file:
CONFIG_SYS_DDR_CS0_BNDS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS /;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_BNDS	include/configs/strider.h	/^#define CONFIG_SYS_DDR_CS0_BNDS	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d	file:
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG /;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8349ITX.h	/^    #define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG /;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG /;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/strider.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_1333	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_2	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d	file:
CONFIG_SYS_DDR_CS0_CONFIG_2	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_2	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_2	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS0_CONFIG_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_CS0_CONFIG_800	/;"	d
CONFIG_SYS_DDR_CS1_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS1_BNDS	/;"	d	file:
CONFIG_SYS_DDR_CS1_BNDS	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CS1_BNDS	/;"	d
CONFIG_SYS_DDR_CS1_BNDS	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CS1_BNDS	/;"	d
CONFIG_SYS_DDR_CS1_BNDS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CS1_BNDS	/;"	d
CONFIG_SYS_DDR_CS1_BNDS	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CS1_BNDS	/;"	d
CONFIG_SYS_DDR_CS1_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS1_BNDS	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS1_CONFIG	/;"	d	file:
CONFIG_SYS_DDR_CS1_CONFIG	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS1_CONFIG	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG_2	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG_2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS1_CONFIG_2	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_CS1_CONFIG_2	/;"	d
CONFIG_SYS_DDR_CS2_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS2_BNDS	/;"	d	file:
CONFIG_SYS_DDR_CS2_BNDS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_CS2_BNDS	/;"	d
CONFIG_SYS_DDR_CS2_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS2_BNDS	/;"	d
CONFIG_SYS_DDR_CS2_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS2_CONFIG	/;"	d	file:
CONFIG_SYS_DDR_CS2_CONFIG	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_CS2_CONFIG	/;"	d
CONFIG_SYS_DDR_CS2_CONFIG	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_CS2_CONFIG	/;"	d
CONFIG_SYS_DDR_CS2_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS2_CONFIG	/;"	d
CONFIG_SYS_DDR_CS3_BNDS	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS3_BNDS	/;"	d	file:
CONFIG_SYS_DDR_CS3_BNDS	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS3_BNDS	/;"	d
CONFIG_SYS_DDR_CS3_CONFIG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_CS3_CONFIG	/;"	d	file:
CONFIG_SYS_DDR_CS3_CONFIG	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_CS3_CONFIG	/;"	d
CONFIG_SYS_DDR_DATA_INIT	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d	file:
CONFIG_SYS_DDR_DATA_INIT	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_DATA_INIT /;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_DATA_INIT	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_DATA_INIT	/;"	d
CONFIG_SYS_DDR_ERR_DIS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_ERR_DIS	/;"	d
CONFIG_SYS_DDR_ERR_DIS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_ERR_DIS /;"	d
CONFIG_SYS_DDR_ERR_DIS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_ERR_DIS	/;"	d
CONFIG_SYS_DDR_ERR_INT_EN	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_ERR_INT_EN	/;"	d
CONFIG_SYS_DDR_ERR_INT_EN	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_ERR_INT_EN /;"	d
CONFIG_SYS_DDR_ERR_INT_EN	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_ERR_INT_EN	/;"	d
CONFIG_SYS_DDR_INIT_ADDR	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d	file:
CONFIG_SYS_DDR_INIT_ADDR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_INIT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_EXT_ADDR	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d	file:
CONFIG_SYS_DDR_INIT_EXT_ADDR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_EXT_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_EXT_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_EXT_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_EXT_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d
CONFIG_SYS_DDR_INIT_EXT_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_INIT_EXT_ADDR	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_INTERVAL /;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/strider.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_INTERVAL	/;"	d
CONFIG_SYS_DDR_INTERVAL_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_INTERVAL_1000	/;"	d	file:
CONFIG_SYS_DDR_INTERVAL_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_INTERVAL_1200	/;"	d	file:
CONFIG_SYS_DDR_INTERVAL_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_INTERVAL_1333	/;"	d
CONFIG_SYS_DDR_INTERVAL_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_INTERVAL_667	/;"	d
CONFIG_SYS_DDR_INTERVAL_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_INTERVAL_800	/;"	d	file:
CONFIG_SYS_DDR_INTERVAL_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_INTERVAL_800	/;"	d
CONFIG_SYS_DDR_INTERVAL_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_INTERVAL_800	/;"	d
CONFIG_SYS_DDR_INTERVAL_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_INTERVAL_800	/;"	d
CONFIG_SYS_DDR_INTERVAL_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_INTERVAL_900	/;"	d	file:
CONFIG_SYS_DDR_MODE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/strider.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_MODE	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE2	include/configs/strider.h	/^#define CONFIG_SYS_DDR_MODE2	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_MODE_1	/;"	d
CONFIG_SYS_DDR_MODE_1_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_1_1000	/;"	d	file:
CONFIG_SYS_DDR_MODE_1_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_1_1200	/;"	d	file:
CONFIG_SYS_DDR_MODE_1_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_MODE_1_1333	/;"	d
CONFIG_SYS_DDR_MODE_1_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_MODE_1_667	/;"	d
CONFIG_SYS_DDR_MODE_1_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_1_800	/;"	d	file:
CONFIG_SYS_DDR_MODE_1_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_MODE_1_800	/;"	d
CONFIG_SYS_DDR_MODE_1_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_MODE_1_800	/;"	d
CONFIG_SYS_DDR_MODE_1_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_MODE_1_800	/;"	d
CONFIG_SYS_DDR_MODE_1_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_1_900	/;"	d	file:
CONFIG_SYS_DDR_MODE_2	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_MODE_2	/;"	d
CONFIG_SYS_DDR_MODE_2_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_2_1000	/;"	d	file:
CONFIG_SYS_DDR_MODE_2_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_2_1200	/;"	d	file:
CONFIG_SYS_DDR_MODE_2_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_MODE_2_1333	/;"	d
CONFIG_SYS_DDR_MODE_2_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_MODE_2_667	/;"	d
CONFIG_SYS_DDR_MODE_2_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_2_800	/;"	d	file:
CONFIG_SYS_DDR_MODE_2_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_MODE_2_800	/;"	d
CONFIG_SYS_DDR_MODE_2_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_MODE_2_800	/;"	d
CONFIG_SYS_DDR_MODE_2_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_MODE_2_800	/;"	d
CONFIG_SYS_DDR_MODE_2_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_2_900	/;"	d	file:
CONFIG_SYS_DDR_MODE_CONTROL	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d	file:
CONFIG_SYS_DDR_MODE_CONTROL	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d
CONFIG_SYS_DDR_MODE_CONTROL	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d
CONFIG_SYS_DDR_MODE_CONTROL	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d
CONFIG_SYS_DDR_MODE_CONTROL	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d
CONFIG_SYS_DDR_MODE_CONTROL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d
CONFIG_SYS_DDR_MODE_CONTROL	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_MODE_CONTROL	/;"	d
CONFIG_SYS_DDR_MODE_CTL	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_MODE_CTL	/;"	d
CONFIG_SYS_DDR_OCD_CTRL	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_OCD_CTRL	/;"	d
CONFIG_SYS_DDR_OCD_CTRL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_OCD_CTRL /;"	d
CONFIG_SYS_DDR_OCD_CTRL	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_OCD_CTRL	/;"	d
CONFIG_SYS_DDR_OCD_CTRL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_OCD_CTRL	/;"	d
CONFIG_SYS_DDR_OCD_STATUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_OCD_STATUS	/;"	d
CONFIG_SYS_DDR_OCD_STATUS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_OCD_STATUS /;"	d
CONFIG_SYS_DDR_OCD_STATUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_OCD_STATUS	/;"	d
CONFIG_SYS_DDR_OCD_STATUS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_OCD_STATUS	/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/P1023RDB.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RAW_TIMING	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_RAW_TIMING$/;"	d
CONFIG_SYS_DDR_RCW_1	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d	file:
CONFIG_SYS_DDR_RCW_1	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d
CONFIG_SYS_DDR_RCW_1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d
CONFIG_SYS_DDR_RCW_1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d
CONFIG_SYS_DDR_RCW_1	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d
CONFIG_SYS_DDR_RCW_1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d
CONFIG_SYS_DDR_RCW_1	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_RCW_1	/;"	d
CONFIG_SYS_DDR_RCW_2	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d	file:
CONFIG_SYS_DDR_RCW_2	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d
CONFIG_SYS_DDR_RCW_2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d
CONFIG_SYS_DDR_RCW_2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d
CONFIG_SYS_DDR_RCW_2	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d
CONFIG_SYS_DDR_RCW_2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d
CONFIG_SYS_DDR_RCW_2	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_RCW_2	/;"	d
CONFIG_SYS_DDR_SBE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_SBE	/;"	d
CONFIG_SYS_DDR_SBE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SBE /;"	d
CONFIG_SYS_DDR_SBE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_SBE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/axs10x.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE /;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/nsim.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/strider.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/t4qds.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/tb100.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE	/;"	d
CONFIG_SYS_DDR_SDRAM_BASE2	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DDR_SDRAM_BASE2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d	file:
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG /;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG	include/configs/strider.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d	file:
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG2	include/configs/strider.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG2	/;"	d
CONFIG_SYS_DDR_SDRAM_CFG_2	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CFG_2	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/strider.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_CLK_CNTL	include/configs/vme8349.h	/^#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	/;"	d
CONFIG_SYS_DDR_SDRAM_INTERVAL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_INTERVAL	/;"	d
CONFIG_SYS_DDR_SDRAM_MODE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_MODE	/;"	d
CONFIG_SYS_DDR_SDRAM_MODE_2	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_SDRAM_MODE_2	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC8349ITX.h	/^    #define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_SIZE	/;"	d
CONFIG_SYS_DDR_SR_CNTR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_SR_CNTR	/;"	d
CONFIG_SYS_DDR_SR_CNTR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_SR_CNTR	/;"	d
CONFIG_SYS_DDR_SR_CNTR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_SR_CNTR	/;"	d
CONFIG_SYS_DDR_SR_CNTR	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_SR_CNTR	/;"	d
CONFIG_SYS_DDR_SR_CNTR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_SR_CNTR	/;"	d
CONFIG_SYS_DDR_SR_CNTR	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_SR_CNTR	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_TIMING_0 /;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_TIMING_0 /;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/strider.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_TIMING_0	/;"	d
CONFIG_SYS_DDR_TIMING_0_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_0_1000	/;"	d	file:
CONFIG_SYS_DDR_TIMING_0_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_0_1200	/;"	d	file:
CONFIG_SYS_DDR_TIMING_0_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_0_1333	/;"	d
CONFIG_SYS_DDR_TIMING_0_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_0_667	/;"	d
CONFIG_SYS_DDR_TIMING_0_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_0_800	/;"	d	file:
CONFIG_SYS_DDR_TIMING_0_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_TIMING_0_800	/;"	d
CONFIG_SYS_DDR_TIMING_0_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_0_800	/;"	d
CONFIG_SYS_DDR_TIMING_0_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_0_800	/;"	d
CONFIG_SYS_DDR_TIMING_0_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_0_900	/;"	d	file:
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8349ITX.h	/^    #define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_TIMING_1 /;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/strider.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_TIMING_1	/;"	d
CONFIG_SYS_DDR_TIMING_1_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_1_1000	/;"	d	file:
CONFIG_SYS_DDR_TIMING_1_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_1_1200	/;"	d	file:
CONFIG_SYS_DDR_TIMING_1_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_1_1333	/;"	d
CONFIG_SYS_DDR_TIMING_1_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_1_667	/;"	d
CONFIG_SYS_DDR_TIMING_1_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_1_800	/;"	d	file:
CONFIG_SYS_DDR_TIMING_1_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_TIMING_1_800	/;"	d
CONFIG_SYS_DDR_TIMING_1_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_1_800	/;"	d
CONFIG_SYS_DDR_TIMING_1_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_1_800	/;"	d
CONFIG_SYS_DDR_TIMING_1_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_1_900	/;"	d	file:
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8349ITX.h	/^    #define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_TIMING_2 /;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_TIMING_2 /;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/sbc8349.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/socrates.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/strider.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_TIMING_2	/;"	d
CONFIG_SYS_DDR_TIMING_2_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_2_1000	/;"	d	file:
CONFIG_SYS_DDR_TIMING_2_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_2_1200	/;"	d	file:
CONFIG_SYS_DDR_TIMING_2_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_2_1333	/;"	d
CONFIG_SYS_DDR_TIMING_2_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_2_667	/;"	d
CONFIG_SYS_DDR_TIMING_2_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_2_800	/;"	d	file:
CONFIG_SYS_DDR_TIMING_2_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_TIMING_2_800	/;"	d
CONFIG_SYS_DDR_TIMING_2_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_2_800	/;"	d
CONFIG_SYS_DDR_TIMING_2_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_2_800	/;"	d
CONFIG_SYS_DDR_TIMING_2_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_2_900	/;"	d	file:
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_TIMING_3 /;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/hrcon.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/ids8313.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/km8360.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_DDR_TIMING_3 /;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/strider.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3	include/configs/ve8313.h	/^#define CONFIG_SYS_DDR_TIMING_3	/;"	d
CONFIG_SYS_DDR_TIMING_3_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_3_1000	/;"	d	file:
CONFIG_SYS_DDR_TIMING_3_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_3_1200	/;"	d	file:
CONFIG_SYS_DDR_TIMING_3_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_3_1333	/;"	d
CONFIG_SYS_DDR_TIMING_3_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_3_667	/;"	d
CONFIG_SYS_DDR_TIMING_3_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_3_800	/;"	d	file:
CONFIG_SYS_DDR_TIMING_3_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_TIMING_3_800	/;"	d
CONFIG_SYS_DDR_TIMING_3_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_3_800	/;"	d
CONFIG_SYS_DDR_TIMING_3_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_3_800	/;"	d
CONFIG_SYS_DDR_TIMING_3_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_3_900	/;"	d	file:
CONFIG_SYS_DDR_TIMING_4	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d	file:
CONFIG_SYS_DDR_TIMING_4	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_TIMING_4 /;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/P1022DS.h	/^#define	CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_TIMING_4	/;"	d
CONFIG_SYS_DDR_TIMING_4_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_4_1333	/;"	d
CONFIG_SYS_DDR_TIMING_4_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_4_800	/;"	d
CONFIG_SYS_DDR_TIMING_5	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d	file:
CONFIG_SYS_DDR_TIMING_5	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_TIMING_5 /;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/P1022DS.h	/^#define	CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_TIMING_5	/;"	d
CONFIG_SYS_DDR_TIMING_5_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_5_1333	/;"	d
CONFIG_SYS_DDR_TIMING_5_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_TIMING_5_800	/;"	d
CONFIG_SYS_DDR_WRLVL_CNTL	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_WRLVL_CNTL	/;"	d	file:
CONFIG_SYS_DDR_WRLVL_CNTL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_WRLVL_CNTL	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL	include/configs/P1022DS.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL_1333	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL_1333	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL_667	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL_667	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL_800	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL_800	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL_800	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL_800	/;"	d
CONFIG_SYS_DDR_WRLVL_CONTROL_800	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_WRLVL_CONTROL_800 /;"	d
CONFIG_SYS_DDR_ZQ_CNTL	board/freescale/corenet_ds/p4080ds_ddr.c	/^#define CONFIG_SYS_DDR_ZQ_CNTL	/;"	d	file:
CONFIG_SYS_DDR_ZQ_CNTL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_DDR_ZQ_CNTL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/P1010RDB.h	/^#define CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/P1022DS.h	/^#define	CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/UCP1020.h	/^#define CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DDR_ZQ_CONTROL	include/configs/p1_twr.h	/^#define CONFIG_SYS_DDR_ZQ_CONTROL	/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_ADDR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR	/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_ADDR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR	/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_ADDR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR	/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_ADDR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR	/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR$/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR$/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR$/;"	d
CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR$/;"	d
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS	include/configs/duovero.h	/^#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS$/;"	d
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS$/;"	d
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS$/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/TQM5200.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/a3m071.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/a4m072.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/canmb.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/cm5200.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/inka4x0.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/ipek01.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/jupiter.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/motionpro.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/munices.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/pcm030.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_MBAR	include/configs/v38b.h	/^#define CONFIG_SYS_DEFAULT_MBAR	/;"	d
CONFIG_SYS_DEFAULT_VIDEO_MODE	drivers/video/videomodes.h	/^#define CONFIG_SYS_DEFAULT_VIDEO_MODE	/;"	d
CONFIG_SYS_DEF_EEPROM_ADDR	include/autoconf.mk	/^CONFIG_SYS_DEF_EEPROM_ADDR=0$/;"	m
CONFIG_SYS_DEF_EEPROM_ADDR	include/common.h	/^# define CONFIG_SYS_DEF_EEPROM_ADDR /;"	d
CONFIG_SYS_DEF_EEPROM_ADDR	include/configs/km/km_arm.h	/^#define CONFIG_SYS_DEF_EEPROM_ADDR	/;"	d
CONFIG_SYS_DEF_EEPROM_ADDR	spl/include/autoconf.mk	/^CONFIG_SYS_DEF_EEPROM_ADDR=0$/;"	m
CONFIG_SYS_DER	include/configs/PATI.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM823L.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM823M.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM850L.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM850M.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM855L.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM855M.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM860L.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM860M.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM862L.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM862M.h	/^#define CONFIG_SYS_DER	/;"	d
CONFIG_SYS_DER	include/configs/TQM866M.h	/^#define CONFIG_SYS_DER /;"	d
CONFIG_SYS_DER	include/configs/TQM885D.h	/^#define CONFIG_SYS_DER /;"	d
CONFIG_SYS_DEVICE_NULLDEV	common/stdio.c	/^#define	CONFIG_SYS_DEVICE_NULLDEV	/;"	d	file:
CONFIG_SYS_DEVICE_NULLDEV	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/CPCI4052.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/M5249EVB.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/PLU405.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/PMC405DE.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/TQM5200.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/VOM405.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/a4m072.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DEVICE_NULLDEV$/;"	d
CONFIG_SYS_DEVICE_NULLDEV	include/configs/zipitz2.h	/^#define	CONFIG_SYS_DEVICE_NULLDEV	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE /;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/corvus.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/exynos4-common.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE /;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/odroid_xu3.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE /;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE /;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/tegra-common-usb-gadget.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE /;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/warp.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE /;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/warp7.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/configs/zynq-common.h	/^# define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_DATA_BUF_SIZE	include/dfu.h	/^#define CONFIG_SYS_DFU_DATA_BUF_SIZE	/;"	d
CONFIG_SYS_DFU_MAX_FILE_SIZE	include/configs/tegra-common-usb-gadget.h	/^#define CONFIG_SYS_DFU_MAX_FILE_SIZE /;"	d
CONFIG_SYS_DFU_MAX_FILE_SIZE	include/dfu.h	/^#define CONFIG_SYS_DFU_MAX_FILE_SIZE /;"	d
CONFIG_SYS_DIAG_ADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DIAG_ADDR	/;"	d
CONFIG_SYS_DIAG_ADDR	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_DIAG_ADDR	/;"	d
CONFIG_SYS_DIAG_ADDR	include/configs/sbc8641d.h	/^#define CONFIG_SYS_DIAG_ADDR /;"	d
CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	include/configs/mx53loco.h	/^#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	/;"	d
CONFIG_SYS_DIMM_SLOTS_PER_CTLR	include/fsl_ddr.h	/^#define CONFIG_SYS_DIMM_SLOTS_PER_CTLR /;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5272C3.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5275EVB.h	/^#define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M54418TWR.h	/^#define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/TQM885D.h	/^#define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/cobra5272.h	/^#	define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/cobra5272.h	/^#define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISCOVER_PHY	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_DISCOVER_PHY$/;"	d
CONFIG_SYS_DISPLAY_BASE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_DISPLAY_BASE	/;"	d
CONFIG_SYS_DISP_CHR_RAM	include/configs/a4m072.h	/^#define CONFIG_SYS_DISP_CHR_RAM	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/ac14xx.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/aria.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/mecp5123.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DIU_ADDR	include/configs/pdm360ng.h	/^#define CONFIG_SYS_DIU_ADDR	/;"	d
CONFIG_SYS_DMA_USE_INTSRAM	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_DMA_USE_INTSRAM	/;"	d
CONFIG_SYS_DMA_USE_INTSRAM	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_DMA_USE_INTSRAM	/;"	d
CONFIG_SYS_DOC_SHORT_TIMEOUT	include/configs/PIP405.h	/^#define CONFIG_SYS_DOC_SHORT_TIMEOUT$/;"	d
CONFIG_SYS_DOC_SUPPORT_2000	include/configs/PIP405.h	/^#define CONFIG_SYS_DOC_SUPPORT_2000$/;"	d
CONFIG_SYS_DOC_SUPPORT_MILLENNIUM	include/configs/PIP405.h	/^#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM$/;"	d
CONFIG_SYS_DP501_DIFFERENTIAL	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_DP501_DIFFERENTIAL$/;"	d
CONFIG_SYS_DP501_DIFFERENTIAL	include/configs/hrcon.h	/^#define CONFIG_SYS_DP501_DIFFERENTIAL$/;"	d
CONFIG_SYS_DP501_DIFFERENTIAL	include/configs/iocon.h	/^#define CONFIG_SYS_DP501_DIFFERENTIAL$/;"	d
CONFIG_SYS_DP501_DIFFERENTIAL	include/configs/strider.h	/^#define CONFIG_SYS_DP501_DIFFERENTIAL$/;"	d
CONFIG_SYS_DP501_I2C	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_DP501_I2C	/;"	d
CONFIG_SYS_DP501_I2C	include/configs/hrcon.h	/^#define CONFIG_SYS_DP501_I2C	/;"	d
CONFIG_SYS_DP501_I2C	include/configs/iocon.h	/^#define CONFIG_SYS_DP501_I2C	/;"	d
CONFIG_SYS_DP501_I2C	include/configs/strider.h	/^#define CONFIG_SYS_DP501_I2C	/;"	d
CONFIG_SYS_DP501_VCAPCTRL0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_DP501_VCAPCTRL0	/;"	d
CONFIG_SYS_DP501_VCAPCTRL0	include/configs/hrcon.h	/^#define CONFIG_SYS_DP501_VCAPCTRL0	/;"	d
CONFIG_SYS_DP501_VCAPCTRL0	include/configs/iocon.h	/^#define CONFIG_SYS_DP501_VCAPCTRL0	/;"	d
CONFIG_SYS_DP501_VCAPCTRL0	include/configs/strider.h	/^#define CONFIG_SYS_DP501_VCAPCTRL0	/;"	d
CONFIG_SYS_DPAA_DCE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DPAA_DCE$/;"	d
CONFIG_SYS_DPAA_DCE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DPAA_DCE$/;"	d
CONFIG_SYS_DPAA_DCE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_DPAA_DCE$/;"	d
CONFIG_SYS_DPAA_DCE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DPAA_DCE$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/P1023RDB.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T102xQDS.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T4240QDS.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/corenet_ds.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/cyrus.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_FMAN	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_DPAA_FMAN$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/T4240QDS.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/corenet_ds.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/cyrus.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_PME	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DPAA_PME$/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/P1023RDB.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T102xQDS.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T102xRDB.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T1040QDS.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T104xRDB.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T4240QDS.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/corenet_ds.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/cyrus.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_QBMAN	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_DPAA_QBMAN	/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_DPAA_RMAN$/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_DPAA_RMAN	/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/P3041DS.h	/^#define CONFIG_SYS_DPAA_RMAN$/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/P5020DS.h	/^#define CONFIG_SYS_DPAA_RMAN$/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_DPAA_RMAN	/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_DPAA_RMAN	/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/T4240QDS.h	/^#define CONFIG_SYS_DPAA_RMAN$/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_DPAA_RMAN$/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/cyrus.h	/^#define CONFIG_SYS_DPAA_RMAN$/;"	d
CONFIG_SYS_DPAA_RMAN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_DPAA_RMAN	/;"	d
CONFIG_SYS_DP_DDR_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_DP_DDR_BASE	/;"	d
CONFIG_SYS_DP_DDR_BASE_PHY	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_DP_DDR_BASE_PHY	/;"	d
CONFIG_SYS_DRAM_BASE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_DRAM_BASE	/;"	d
CONFIG_SYS_DRAM_BASE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_DRAM_BASE	/;"	d
CONFIG_SYS_DRAM_SIZE	board/freescale/bsc9131rdb/ddr.c	/^#define CONFIG_SYS_DRAM_SIZE	/;"	d	file:
CONFIG_SYS_DRAM_SIZE	board/freescale/p1010rdb/ddr.c	/^#define CONFIG_SYS_DRAM_SIZE	/;"	d	file:
CONFIG_SYS_DRAM_SIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_DRAM_SIZE	/;"	d
CONFIG_SYS_DRAM_SIZE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_DRAM_SIZE	/;"	d
CONFIG_SYS_DRAM_TEST	include/configs/M54418TWR.h	/^#define CONFIG_SYS_DRAM_TEST$/;"	d
CONFIG_SYS_DS1339_TCR_VAL	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_DS1339_TCR_VAL	/;"	d
CONFIG_SYS_DSPIC_TEST_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_DSPIC_TEST_ADDR	/;"	d
CONFIG_SYS_DSPIC_TEST_MASK	include/configs/lwmon5.h	/^#define CONFIG_SYS_DSPIC_TEST_MASK	/;"	d
CONFIG_SYS_DSPI_CS2	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_DSPI_CS2$/;"	d
CONFIG_SYS_DSPI_CTAR0	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_DSPI_CTAR0	/;"	d
CONFIG_SYS_DSPI_CTAR0	include/configs/M54418TWR.h	/^#	define CONFIG_SYS_DSPI_CTAR0	/;"	d
CONFIG_SYS_DSPI_CTAR0	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_DSPI_CTAR0	/;"	d
CONFIG_SYS_DSPI_CTAR0	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_DSPI_CTAR0	/;"	d
CONFIG_SYS_DSPI_CTAR0	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_DSPI_CTAR0 /;"	d
CONFIG_SYS_DSPI_CTAR1	include/configs/M54418TWR.h	/^#	define CONFIG_SYS_DSPI_CTAR1	/;"	d
CONFIG_SYS_DSPI_CTAR1	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_DSPI_CTAR1	/;"	d
CONFIG_SYS_DSPI_CTAR1	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_DSPI_CTAR1	/;"	d
CONFIG_SYS_DSPI_CTAR2	include/configs/M54418TWR.h	/^#	define CONFIG_SYS_DSPI_CTAR2	/;"	d
CONFIG_SYS_DSPI_CTAR2	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_DSPI_CTAR2	/;"	d
CONFIG_SYS_DSPI_CTAR2	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_DSPI_CTAR2	/;"	d
CONFIG_SYS_DSPI_CTAR3	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_DSPI_CTAR3	/;"	d
CONFIG_SYS_DTT_ADM1021	include/configs/PMC440.h	/^#define CONFIG_SYS_DTT_ADM1021	/;"	d
CONFIG_SYS_DTT_ADM1021	include/configs/UCP1020.h	/^#define CONFIG_SYS_DTT_ADM1021	/;"	d
CONFIG_SYS_DTT_ADM1021	include/configs/katmai.h	/^#define CONFIG_SYS_DTT_ADM1021	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/configs/UCP1020.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/configs/katmai.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/configs/km82xx.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/configs/tqma6_wru4.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_BUS_NUM	include/i2c.h	/^#define CONFIG_SYS_DTT_BUS_NUM	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/TQM834x.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/acadia.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/canyonlands.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/km82xx.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/sequoia.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/socrates.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/configs/yosemite.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_HYSTERESIS	include/dtt.h	/^#define CONFIG_SYS_DTT_HYSTERESIS	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/TQM834x.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/acadia.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/canyonlands.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/sequoia.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/socrates.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_LOW_TEMP	include/configs/yosemite.h	/^#define CONFIG_SYS_DTT_LOW_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/TQM834x.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/acadia.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/canyonlands.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/km82xx.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/sequoia.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/socrates.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/configs/yosemite.h	/^#define CONFIG_SYS_DTT_MAX_TEMP	/;"	d
CONFIG_SYS_DTT_MAX_TEMP	include/dtt.h	/^#define CONFIG_SYS_DTT_MAX_TEMP /;"	d
CONFIG_SYS_DUART_RST	include/configs/PLU405.h	/^#define CONFIG_SYS_DUART_RST	/;"	d
CONFIG_SYS_DV_CLKMODE	include/configs/calimain.h	/^#define CONFIG_SYS_DV_CLKMODE /;"	d
CONFIG_SYS_DV_CLKMODE	include/configs/da850evm.h	/^#define CONFIG_SYS_DV_CLKMODE /;"	d
CONFIG_SYS_DV_CLKMODE	include/configs/ipam390.h	/^#define CONFIG_SYS_DV_CLKMODE /;"	d
CONFIG_SYS_DV_CLKMODE	include/configs/legoev3.h	/^#define CONFIG_SYS_DV_CLKMODE /;"	d
CONFIG_SYS_DV_CLKMODE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_DV_CLKMODE /;"	d
CONFIG_SYS_DV_NOR_BOOT_CFG	include/configs/calimain.h	/^#define CONFIG_SYS_DV_NOR_BOOT_CFG	/;"	d
CONFIG_SYS_DV_NOR_BOOT_CFG	include/configs/da850evm.h	/^#define CONFIG_SYS_DV_NOR_BOOT_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/icon.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/katmai.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_CFG	include/configs/makalu.h	/^#define CONFIG_SYS_EBC_CFG	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/VOM405.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB0AP /;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/icon.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/katmai.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/makalu.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/sequoia.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0AP	include/configs/yosemite.h	/^#define CONFIG_SYS_EBC_PB0AP	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/VOM405.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB0CR /;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/icon.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/katmai.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_PB0CR /;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/makalu.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/sequoia.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB0CR	include/configs/yosemite.h	/^#define CONFIG_SYS_EBC_PB0CR	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB1AP /;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/icon.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/katmai.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1AP	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB1AP	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB1CR /;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/icon.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/katmai.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB1CR	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB1CR	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/VOM405.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB2AP /;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/makalu.h	/^#define CONFIG_SYS_EBC_PB2AP /;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/sequoia.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2AP	include/configs/yosemite.h	/^#define CONFIG_SYS_EBC_PB2AP	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/VOM405.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB2CR /;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/kilauea.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/makalu.h	/^#define CONFIG_SYS_EBC_PB2CR /;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/sequoia.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB2CR	include/configs/yosemite.h	/^#define CONFIG_SYS_EBC_PB2CR	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB3AP /;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/sequoia.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3AP	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB3AP	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/PLU405.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB3CR /;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/canyonlands.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/dlvision.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/intip.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/io.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/io64.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/iocon.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/lwmon5.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/neo.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/sequoia.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/t3corp.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB3CR	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB3CR	/;"	d
CONFIG_SYS_EBC_PB4AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB4AP	/;"	d
CONFIG_SYS_EBC_PB4AP	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB4AP	/;"	d
CONFIG_SYS_EBC_PB4AP	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB4AP	/;"	d
CONFIG_SYS_EBC_PB4AP	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB4AP /;"	d
CONFIG_SYS_EBC_PB4CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB4CR	/;"	d
CONFIG_SYS_EBC_PB4CR	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB4CR	/;"	d
CONFIG_SYS_EBC_PB4CR	include/configs/acadia.h	/^#define CONFIG_SYS_EBC_PB4CR	/;"	d
CONFIG_SYS_EBC_PB4CR	include/configs/bubinga.h	/^#define CONFIG_SYS_EBC_PB4CR /;"	d
CONFIG_SYS_EBC_PB5AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB5AP	/;"	d
CONFIG_SYS_EBC_PB5AP	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB5AP	/;"	d
CONFIG_SYS_EBC_PB5CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB5CR	/;"	d
CONFIG_SYS_EBC_PB5CR	include/configs/PMC440.h	/^#define CONFIG_SYS_EBC_PB5CR	/;"	d
CONFIG_SYS_EBC_PB6AP	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB6AP	/;"	d
CONFIG_SYS_EBC_PB6CR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EBC_PB6CR	/;"	d
CONFIG_SYS_EBC_PB7AP	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB7AP	/;"	d
CONFIG_SYS_EBC_PB7CR	include/configs/walnut.h	/^#define CONFIG_SYS_EBC_PB7CR	/;"	d
CONFIG_SYS_EBI_CFGR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_EBI_CFGR_VAL	/;"	d
CONFIG_SYS_EBI_CSA_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_EBI_CSA_VAL	/;"	d
CONFIG_SYS_EEPROM_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_EEPROM_BASE	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/B4860QDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM /;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/P1010RDB.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/P1022DS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/T102xQDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/T102xRDB.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/T1040QDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/T208xQDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/T208xRDB.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/T4240QDS.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/cyrus.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM /;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_BUS_NUM	include/configs/tricorder.h	/^#define CONFIG_SYS_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	cmd/eeprom.c	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d	file:
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/MIP405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/PIP405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/PLU405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/PMC440.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/TQM5200.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/TQM834x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/TQM866M.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/TQM885D.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/VCMA9.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/VOM405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/a4m072.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ac14xx.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/acadia.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/apf27.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/aria.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/axs10x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/bamboo.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/canyonlands.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/cm_fx6.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/cm_t335.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/cm_t35.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/cm_t3517.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/cm_t43.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/cm_t54.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/icon.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/intip.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/io64.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ipek01.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/katmai.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/kilauea.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/km/km_arm.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/lacie_kw.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/luan.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/lwmon5.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/mecp5123.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/motionpro.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ot1200.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/p1_twr.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/pcm030.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/pdm360ng.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/rut.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/sequoia.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/socrates.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/t3corp.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/v38b.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/vct.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/walnut.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/xpedite1000.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/yosemite.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	include/configs/zynq-common.h	/^# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	cmd/eeprom.c	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d	file:
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/MIP405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/PIP405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/PLU405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/PMC440.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/TQM5200.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/TQM834x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/TQM866M.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/TQM885D.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/VCMA9.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/VOM405.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/a4m072.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ac14xx.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/acadia.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/apf27.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/aria.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/axs10x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/bamboo.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/bubinga.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/canyonlands.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/cm_fx6.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/cm_t335.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/cm_t35.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/cm_t3517.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/cm_t43.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/cm_t54.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/icon.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/intip.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/io64.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ipek01.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/katmai.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/kilauea.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/km/km_arm.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/luan.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/lwmon5.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/makalu.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/mecp5123.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/motionpro.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ot1200.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/p1_twr.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/pcm030.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/pdm360ng.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/rut.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/sequoia.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/t3corp.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/uniphier.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/v38b.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/vct.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/walnut.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/xpedite1000.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/yosemite.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS /;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/zynq-common.h	/^# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE$/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE	include/configs/km/km_arm.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE$/;"	d
CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE	include/configs/lwmon5.h	/^#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE$/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/cm_t335.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/cm_t43.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/cm_t54.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_SIZE	include/configs/zynq-common.h	/^# define CONFIG_SYS_EEPROM_SIZE	/;"	d
CONFIG_SYS_EEPROM_WP	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EEPROM_WP	/;"	d
CONFIG_SYS_EEPROM_WP	include/configs/PLU405.h	/^#define CONFIG_SYS_EEPROM_WP	/;"	d
CONFIG_SYS_EEPROM_WP	include/configs/a4m072.h	/^#define CONFIG_SYS_EEPROM_WP	/;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EEPROM_WREN /;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/PLU405.h	/^#define CONFIG_SYS_EEPROM_WREN /;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EEPROM_WREN	/;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/PMC440.h	/^#define CONFIG_SYS_EEPROM_WREN	/;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/a4m072.h	/^#define CONFIG_SYS_EEPROM_WREN	/;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/km/km_arm.h	/^#define CONFIG_SYS_EEPROM_WREN$/;"	d
CONFIG_SYS_EEPROM_WREN	include/configs/mecp5123.h	/^#define CONFIG_SYS_EEPROM_WREN	/;"	d
CONFIG_SYS_EHCI_USB1_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_EHCI_USB1_ADDR	/;"	d
CONFIG_SYS_ELBC_BASE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_ELBC_BASE	/;"	d
CONFIG_SYS_ELBC_BASE_PHYS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_ELBC_BASE_PHYS	/;"	d
CONFIG_SYS_ELO3_DMA3	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define CONFIG_SYS_ELO3_DMA3 /;"	d	file:
CONFIG_SYS_ELPIDA_INIT_DEV_OP	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ELPIDA_INIT_DEV_OP	/;"	d
CONFIG_SYS_ELPIDA_OCD_EXIT	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ELPIDA_OCD_EXIT	/;"	d
CONFIG_SYS_ELPIDA_RES_DLL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_ELPIDA_RES_DLL	/;"	d
CONFIG_SYS_EMAC_TI_CLKDIV	drivers/net/davinci_emac.c	/^#define CONFIG_SYS_EMAC_TI_CLKDIV	/;"	d	file:
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS$/;"	d
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS$/;"	d
CONFIG_SYS_ENABLE_PADS_ALL	include/configs/duovero.h	/^#define CONFIG_SYS_ENABLE_PADS_ALL$/;"	d
CONFIG_SYS_ENET_BD_BASE	include/configs/cobra5272.h	/^#define CONFIG_SYS_ENET_BD_BASE	/;"	d
CONFIG_SYS_ENV_ADDR	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_ENV_ADDR	/;"	d
CONFIG_SYS_ENV_OFFSET	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_SYS_ENV_OFFSET	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/bav335x.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/brppt1.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/cm_t335.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/etamin.h	/^#define CONFIG_SYS_ENV_SECT_SIZE /;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/pengwyn.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_ENV_SECT_SIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_ENV_SECT_SIZE	/;"	d
CONFIG_SYS_EPLD_BASE	include/configs/luan.h	/^#define CONFIG_SYS_EPLD_BASE	/;"	d
CONFIG_SYS_EPLD_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_EPLD_BASE	/;"	d
CONFIG_SYS_ETHOC_BASE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_ETHOC_BASE	/;"	d
CONFIG_SYS_ETHOC_BASE	include/configs/xtfpga.h	/^#define CONFIG_SYS_ETHOC_BASE	/;"	d
CONFIG_SYS_ETHOC_BUFFER_ADDR	include/configs/xtfpga.h	/^#define CONFIG_SYS_ETHOC_BUFFER_ADDR	/;"	d
CONFIG_SYS_ETVPE_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_ETVPE_CLK	/;"	d
CONFIG_SYS_EXCEPTION_VECTORS_HIGH	include/configs/calimain.h	/^#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH$/;"	d
CONFIG_SYS_EXCEPTION_VECTORS_HIGH	include/configs/da850evm.h	/^#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH$/;"	d
CONFIG_SYS_EXCEPTION_VECTORS_HIGH	include/configs/ipam390.h	/^#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH$/;"	d
CONFIG_SYS_EXCEPTION_VECTORS_HIGH	include/configs/legoev3.h	/^#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH$/;"	d
CONFIG_SYS_EXCEPTION_VECTORS_HIGH	include/configs/stv0991.h	/^#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH$/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/CPCI4052.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/MIP405.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/PIP405.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/PLU405.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/PMC405DE.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/PMC440.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/VOM405.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/amcc-common.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/lwmon5.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTBDINFO	include/configs/xpedite1000.h	/^#define CONFIG_SYS_EXTBDINFO	/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/B4860QDS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/P1010RDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/P2041RDB.h	/^	#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/P2041RDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T102xQDS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T102xRDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T1040QDS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T104xRDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T208xQDS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T208xRDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T4240QDS.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/T4240RDB.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/UCP1020.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/controlcenterd.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/corenet_ds.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/cyrus.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_ENV_RELOC	include/configs/p1_twr.h	/^#define CONFIG_SYS_EXTRA_ENV_RELOC$/;"	d
CONFIG_SYS_EXTRA_OPTIONS	Kconfig	/^config SYS_EXTRA_OPTIONS$/;"	c	menu:Boot images
CONFIG_SYS_EXTRA_OPTIONS	include/config/auto.conf	/^CONFIG_SYS_EXTRA_OPTIONS=""$/;"	k
CONFIG_SYS_EXTRA_OPTIONS	include/generated/autoconf.h	/^#define CONFIG_SYS_EXTRA_OPTIONS /;"	d
CONFIG_SYS_EXTRA_OPTIONS_MODULE	Kconfig	/^config SYS_EXTRA_OPTIONS$/;"	c	menu:Boot images
CONFIG_SYS_EXT_SERIAL_CLOCK	include/configs/bamboo.h	/^#define CONFIG_SYS_EXT_SERIAL_CLOCK	/;"	d
CONFIG_SYS_EXT_SERIAL_CLOCK	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_EXT_SERIAL_CLOCK	/;"	d
CONFIG_SYS_EXT_SERIAL_CLOCK	include/configs/kilauea.h	/^#define CONFIG_SYS_EXT_SERIAL_CLOCK	/;"	d
CONFIG_SYS_EXT_SERIAL_CLOCK	include/configs/luan.h	/^#define CONFIG_SYS_EXT_SERIAL_CLOCK	/;"	d
CONFIG_SYS_EXT_SERIAL_CLOCK	include/configs/sequoia.h	/^#define CONFIG_SYS_EXT_SERIAL_CLOCK	/;"	d
CONFIG_SYS_EXT_SERIAL_CLOCK	include/configs/yosemite.h	/^#define CONFIG_SYS_EXT_SERIAL_CLOCK	/;"	d
CONFIG_SYS_FAST_CLK	include/configs/M5249EVB.h	/^#define CONFIG_SYS_FAST_CLK	/;"	d
CONFIG_SYS_FAST_CLK	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FAST_CLK$/;"	d
CONFIG_SYS_FAST_CLK	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FAST_CLK$/;"	d
CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5208EVBE.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5235EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5272C3.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5272C3.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5282EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M53017EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5329EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5373EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M54451EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M54455EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5475EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5485EVB.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/cobra5272.h	/^#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/cobra5272.h	/^#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/devkit3250.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/edminiv2.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/km/km_arm.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/work_92105.h	/^#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FAULT_ECHO_LINK_DOWN	include/configs/zynq-common.h	/^# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN$/;"	d
CONFIG_SYS_FCC_PSMR	include/configs/MPC8560ADS.h	/^  #define CONFIG_SYS_FCC_PSMR /;"	d
CONFIG_SYS_FCPU266MHZ	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FCPU266MHZ$/;"	d
CONFIG_SYS_FDC_DRIVE_NUMBER	cmd/fdc.c	/^#define CONFIG_SYS_FDC_DRIVE_NUMBER /;"	d	file:
CONFIG_SYS_FDT_ADDR	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_FDT_ADDR	/;"	d
CONFIG_SYS_FDT_BASE	include/configs/a3m071.h	/^#define CONFIG_SYS_FDT_BASE	/;"	d
CONFIG_SYS_FDT_BASE	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_FDT_BASE	/;"	d
CONFIG_SYS_FDT_LOAD_ADDR	include/configs/sandbox.h	/^#define CONFIG_SYS_FDT_LOAD_ADDR	/;"	d
CONFIG_SYS_FDT_PAD	common/image-fdt.c	/^#define CONFIG_SYS_FDT_PAD /;"	d	file:
CONFIG_SYS_FDT_PAD	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/cyrus.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_PAD	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_FDT_PAD	/;"	d
CONFIG_SYS_FDT_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_FDT_SIZE	/;"	d
CONFIG_SYS_FDT_SIZE	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_FDT_SIZE	/;"	d
CONFIG_SYS_FEC0_IOBASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_FEC0_IOBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5272C3.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/cobra5272.h	/^#	define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_MIIBASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FEC0_MIIBASE	/;"	d
CONFIG_SYS_FEC0_PHYADDR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC0_PHYADDR	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5272C3.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/cobra5272.h	/^#	define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC0_PINMUX	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FEC0_PINMUX	/;"	d
CONFIG_SYS_FEC1_IOBASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_FEC1_IOBASE	/;"	d
CONFIG_SYS_FEC1_MIIBASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FEC1_MIIBASE	/;"	d
CONFIG_SYS_FEC1_MIIBASE	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FEC1_MIIBASE	/;"	d
CONFIG_SYS_FEC1_MIIBASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC1_MIIBASE	/;"	d
CONFIG_SYS_FEC1_MIIBASE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FEC1_MIIBASE	/;"	d
CONFIG_SYS_FEC1_MIIBASE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FEC1_MIIBASE	/;"	d
CONFIG_SYS_FEC1_MIIBASE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FEC1_MIIBASE	/;"	d
CONFIG_SYS_FEC1_PHYADDR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC1_PHYADDR	/;"	d
CONFIG_SYS_FEC1_PINMUX	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FEC1_PINMUX	/;"	d
CONFIG_SYS_FEC1_PINMUX	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FEC1_PINMUX	/;"	d
CONFIG_SYS_FEC1_PINMUX	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC1_PINMUX	/;"	d
CONFIG_SYS_FEC1_PINMUX	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FEC1_PINMUX	/;"	d
CONFIG_SYS_FEC1_PINMUX	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FEC1_PINMUX	/;"	d
CONFIG_SYS_FEC1_PINMUX	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FEC1_PINMUX	/;"	d
CONFIG_SYS_FECI2C	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FECI2C	/;"	d
CONFIG_SYS_FECI2C	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FECI2C	/;"	d
CONFIG_SYS_FECI2C	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FECI2C	/;"	d
CONFIG_SYS_FEC_BUF_USE_SRAM	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FEC_BUF_USE_SRAM$/;"	d
CONFIG_SYS_FEC_BUF_USE_SRAM	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FEC_BUF_USE_SRAM$/;"	d
CONFIG_SYS_FIFO_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_FIFO_BASE	/;"	d
CONFIG_SYS_FIXED_PHY_ADDR	include/configs/suvd3.h	/^#define CONFIG_SYS_FIXED_PHY_ADDR	/;"	d
CONFIG_SYS_FIXED_PHY_PORT	include/configs/canyonlands.h	/^#define CONFIG_SYS_FIXED_PHY_PORT(/;"	d
CONFIG_SYS_FIXED_PHY_PORT	include/configs/suvd3.h	/^#define CONFIG_SYS_FIXED_PHY_PORT(/;"	d
CONFIG_SYS_FIXED_PHY_PORTS	drivers/net/4xx_enet.c	/^#define CONFIG_SYS_FIXED_PHY_PORTS	/;"	d	file:
CONFIG_SYS_FIXED_PHY_PORTS	drivers/qe/uec_phy.c	/^#define CONFIG_SYS_FIXED_PHY_PORTS	/;"	d	file:
CONFIG_SYS_FIXED_PHY_PORTS	include/configs/canyonlands.h	/^#define CONFIG_SYS_FIXED_PHY_PORTS /;"	d
CONFIG_SYS_FIXED_PHY_PORTS	include/configs/suvd3.h	/^#define CONFIG_SYS_FIXED_PHY_PORTS /;"	d
CONFIG_SYS_FLASH	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH	/;"	d
CONFIG_SYS_FLASH	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH	/;"	d
CONFIG_SYS_FLASH	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH	/;"	d
CONFIG_SYS_FLASH0	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH0	/;"	d
CONFIG_SYS_FLASH0	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH0	/;"	d
CONFIG_SYS_FLASH0_BASE	board/bf533-ezkit/flash-defines.h	/^#define CONFIG_SYS_FLASH0_BASE	/;"	d
CONFIG_SYS_FLASH0_BASE	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH0_BASE	/;"	d
CONFIG_SYS_FLASH0_BASE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH0_BASE	/;"	d
CONFIG_SYS_FLASH1	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH1	/;"	d
CONFIG_SYS_FLASH1	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH1	/;"	d
CONFIG_SYS_FLASH1_BASE	board/bf533-ezkit/flash-defines.h	/^#define CONFIG_SYS_FLASH1_BASE	/;"	d
CONFIG_SYS_FLASH1_BASE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH1_BASE	/;"	d
CONFIG_SYS_FLASH1_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_FLASH1_BASE	/;"	d
CONFIG_SYS_FLASH1_BASE_PHYS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FLASH1_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH1_BASE_PHYS_EARLY	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FLASH1_BASE_PHYS_EARLY	/;"	d
CONFIG_SYS_FLASHBOOT	arch/powerpc/cpu/mpc83xx/start.S	/^#define CONFIG_SYS_FLASHBOOT$/;"	d	file:
CONFIG_SYS_FLASH_2ND_16BIT_DEV	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_2ND_16BIT_DEV	/;"	d
CONFIG_SYS_FLASH_2ND_16BIT_DEV	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_2ND_16BIT_DEV /;"	d
CONFIG_SYS_FLASH_2ND_16BIT_DEV	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_2ND_16BIT_DEV	/;"	d
CONFIG_SYS_FLASH_2ND_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_2ND_ADDR /;"	d
CONFIG_SYS_FLASH_2ND_ADDR	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_2ND_ADDR	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_ADDR0 /;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/bubinga.h	/^#define CONFIG_SYS_FLASH_ADDR0 /;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_ADDR0 /;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR0	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_ADDR0	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_ADDR1 /;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/bubinga.h	/^#define CONFIG_SYS_FLASH_ADDR1 /;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_ADDR1 /;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR1	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_ADDR1	/;"	d
CONFIG_SYS_FLASH_ADDR_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_FLASH_ADDR_BASE	/;"	d
CONFIG_SYS_FLASH_ADDR_BASE	include/configs/x600.h	/^#define CONFIG_SYS_FLASH_ADDR_BASE	/;"	d
CONFIG_SYS_FLASH_AMD_CHECK_DQ7	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7$/;"	d
CONFIG_SYS_FLASH_AMD_CHECK_DQ7	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7$/;"	d
CONFIG_SYS_FLASH_AMD_CHECK_DQ7	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7$/;"	d
CONFIG_SYS_FLASH_AMD_CHECK_DQ7	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7$/;"	d
CONFIG_SYS_FLASH_AUTOPROTECT_LIST	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST	/;"	d
CONFIG_SYS_FLASH_AUTOPROTECT_LIST	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST	/;"	d
CONFIG_SYS_FLASH_AUTOPROTECT_LIST	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST	/;"	d
CONFIG_SYS_FLASH_AUTOPROTECT_LIST	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/P1022DS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM823L.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM823M.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM850L.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM850M.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM855L.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM855M.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM860L.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM860M.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM862L.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM862M.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM866M.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/TQM885D.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/VCMA9.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/a4m072.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ac14xx.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/aria.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/dbau1x00.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/inka4x0.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/io.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/mecp5123.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/motionpro.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/mpr2.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ms7720se.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/ms7750se.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/munices.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/pdm360ng.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/r2dplus.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/r7780mp.h	/^# define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/sbc8548.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/smdk2410.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/v38b.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST	/;"	d
CONFIG_SYS_FLASH_BANKS_LIST	include/mtd/cfi_flash.h	/^#define CONFIG_SYS_FLASH_BANKS_LIST /;"	d
CONFIG_SYS_FLASH_BANKS_SIZES	include/configs/a4m072.h	/^#define CONFIG_SYS_FLASH_BANKS_SIZES	/;"	d
CONFIG_SYS_FLASH_BANKS_SIZES	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_BANKS_SIZES /;"	d
CONFIG_SYS_FLASH_BANKS_SIZES	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_BANKS_SIZES	/;"	d
CONFIG_SYS_FLASH_BANK_SIZE	include/configs/spear-common.h	/^#define CONFIG_SYS_FLASH_BANK_SIZE	/;"	d
CONFIG_SYS_FLASH_BANK_SIZE	include/configs/x600.h	/^#define CONFIG_SYS_FLASH_BANK_SIZE	/;"	d
CONFIG_SYS_FLASH_BASE	arch/powerpc/cpu/ppc4xx/start.S	/^# define CONFIG_SYS_FLASH_BASE	/;"	d	file:
CONFIG_SYS_FLASH_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5272C3.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MIP405.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/P1022DS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/PATI.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/PIP405.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM823L.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM823M.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM850L.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM850M.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM855L.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM855M.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM860L.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM860M.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM862L.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM862M.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM866M.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/TQM885D.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/VCMA9.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/a4m072.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ac14xx.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/amcore.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/aria.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/atngw100.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/atstk1002.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bav335x.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_FLASH_BASE /;"	d
CONFIG_SYS_FLASH_BASE	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/bubinga.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/calimain.h	/^#define CONFIG_SYS_FLASH_BASE /;"	d
CONFIG_SYS_FLASH_BASE	include/configs/canmb.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm-bf527.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm-bf533.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm-bf548.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm-bf561.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cm5200.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/cobra5272.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/da850evm.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/dbau1x00.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/devkit3250.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/dnp5370.h	/^#define CONFIG_SYS_FLASH_BASE /;"	d
CONFIG_SYS_FLASH_BASE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/edb93xx.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/edminiv2.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ethernut5.h	/^# define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/flea3.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/grasshopper.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/inka4x0.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/integrator-common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/io.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ipek01.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/malta.h	/^# define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/motionpro.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mpr2.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ms7720se.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ms7750se.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/munices.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mx31ads.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_FLASH_BASE /;"	d
CONFIG_SYS_FLASH_BASE	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/o2d.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/o2d300.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/o2dnt2.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/o2i.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/o2mnt.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/o3dnt.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/pb1x00.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/pm9261.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/pm9263.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/r2dplus.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/r7780mp.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/redwood.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/rsk7264.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/rsk7269.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FLASH_BASE /;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/shmin.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/smdk2410.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/t4qds.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/tao3530.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/v38b.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/x600.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xilinx-ppc.h	/^#define	CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/xtfpga.h	/^# define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/zmx25.h	/^#define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE	include/configs/zynq-common.h	/^# define CONFIG_SYS_FLASH_BASE	/;"	d
CONFIG_SYS_FLASH_BASE0	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_BASE0	/;"	d
CONFIG_SYS_FLASH_BASE1	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_BASE1	/;"	d
CONFIG_SYS_FLASH_BASE2	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_BASE2	/;"	d
CONFIG_SYS_FLASH_BASE2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_BASE2	/;"	d
CONFIG_SYS_FLASH_BASE2	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_BASE2	/;"	d
CONFIG_SYS_FLASH_BASE2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_BASE2	/;"	d
CONFIG_SYS_FLASH_BASE2	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_BASE2	/;"	d
CONFIG_SYS_FLASH_BASE_1	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_BASE_1	/;"	d
CONFIG_SYS_FLASH_BASE_2	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_BASE_2	/;"	d
CONFIG_SYS_FLASH_BASE_CS1	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_BASE_CS1	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS /;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS /;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS /;"	d
CONFIG_SYS_FLASH_BASE_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_EARLY	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_EARLY	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_EARLY	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_H	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_H	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_H	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_H	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_H	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_H	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_H	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_H	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_L	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_L	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_L	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_L	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_L	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_L	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_L	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_L	/;"	d
CONFIG_SYS_FLASH_BASE_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_BASE_PHYS_LOW	/;"	d
CONFIG_SYS_FLASH_BR_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_BR_PRELIM /;"	d
CONFIG_SYS_FLASH_BR_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_BR_PRELIM /;"	d
CONFIG_SYS_FLASH_CFI	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M52277EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5235EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5249EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5272C3.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5282EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M53017EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5329EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5373EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M54451EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M54455EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5475EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/M5485EVB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MIP405.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/P1022DS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/PATI.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/PIP405.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM823L.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM823M.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM834x.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM850L.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM850M.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM855L.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM855M.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM860L.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM860M.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM862L.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM862M.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM866M.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/TQM885D.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/VCMA9.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/a4m072.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ac14xx.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/am335x_evm.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/amcore.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/aria.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/atngw100.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/atstk1002.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bav335x.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/boston.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/calimain.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/canmb.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm-bf527.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm-bf533.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm-bf548.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm-bf561.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/cm5200.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/da850evm.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/dbau1x00.h	/^#define CONFIG_SYS_FLASH_CFI /;"	d
CONFIG_SYS_FLASH_CFI	include/configs/devkit3250.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/digsy_mtc.h	/^#define	CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/dnp5370.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/edb93xx.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/edminiv2.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/flea3.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/grasshopper.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/inka4x0.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/integrator-common.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/io.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ipek01.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/malta.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mecp5123.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/motionpro.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mpr2.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ms7720se.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ms7750se.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/munices.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mx31ads.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_FLASH_CFI /;"	d
CONFIG_SYS_FLASH_CFI	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/pdm360ng.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/pm9261.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/pm9263.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/qemu-mips.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/r2dplus.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/r7780mp.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/redwood.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/rsk7264.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/rsk7269.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sbc8349.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sbc8548.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/shmin.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/smdk2410.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/uniphier.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/v38b.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/vme8349.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xilinx-ppc.h	/^#define	CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/xtfpga.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_CFI	/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/zmx25.h	/^#define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI	include/configs/zynq-common.h	/^# define CONFIG_SYS_FLASH_CFI$/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET$/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET$/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET	/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET	/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET$/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET	/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET	/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET$/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET$/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/redwood.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET /;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/v38b.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET	/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET	/;"	d
CONFIG_SYS_FLASH_CFI_AMD_RESET	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_CFI_AMD_RESET /;"	d
CONFIG_SYS_FLASH_CFI_BYPASS_READ	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_CFI_BYPASS_READ$/;"	d
CONFIG_SYS_FLASH_CFI_BYPASS_READ	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_CFI_BYPASS_READ$/;"	d
CONFIG_SYS_FLASH_CFI_BYPASS_READ	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_CFI_BYPASS_READ$/;"	d
CONFIG_SYS_FLASH_CFI_NONBLOCK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_CFI_NONBLOCK	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	drivers/mtd/cfi_flash.c	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d	file:
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5272C3.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/a4m072.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/am335x_evm.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/bav335x.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/r7780mp.h	/^# define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/rsk7264.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/rsk7269.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/xtfpga.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH	/;"	d
CONFIG_SYS_FLASH_CFI_WIDTH	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_CFI_WIDTH /;"	d
CONFIG_SYS_FLASH_CHECKSUM	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_CHECKSUM$/;"	d
CONFIG_SYS_FLASH_CHECKSUM	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_FLASH_CHECKSUM$/;"	d
CONFIG_SYS_FLASH_CHECKSUM	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FLASH_CHECKSUM$/;"	d
CONFIG_SYS_FLASH_CHECKSUM	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FLASH_CHECKSUM$/;"	d
CONFIG_SYS_FLASH_CHECKSUM	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FLASH_CHECKSUM$/;"	d
CONFIG_SYS_FLASH_CHECKSUM	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_CHECKSUM$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MIP405.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/P1022DS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/PATI.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/PIP405.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM823L.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM823M.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM834x.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM850L.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM850M.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM855L.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM855M.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM860L.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM860M.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM862L.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM862M.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM866M.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/TQM885D.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/canmb.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO /;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/integrator-common.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/io.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ipek01.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/mpr2.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ms7720se.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ms7750se.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/munices.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/r7780mp.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/sbc8548.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/shmin.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/spear-common.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/x600.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/xilinx-ppc.h	/^#define	CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/xtfpga.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO$/;"	d
CONFIG_SYS_FLASH_EMPTY_INFO	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_EMPTY_INFO	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/am3517_crane.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/amcore.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/bubinga.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/canmb.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/cobra5272.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/dbau1x00.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT /;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/integrator-common.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/io.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/mpr2.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ms7720se.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ms7750se.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/omap3_evm.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/pb1x00.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/r7780mp.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/redwood.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/sbc8349.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/sbc8548.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/shmin.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/spear-common.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/vme8349.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/x600.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_ERASE_TOUT	include/configs/zynq-common.h	/^# define CONFIG_SYS_FLASH_ERASE_TOUT	/;"	d
CONFIG_SYS_FLASH_LEGACY_512Kx16	include/configs/VCMA9.h	/^#define CONFIG_SYS_FLASH_LEGACY_512Kx16$/;"	d
CONFIG_SYS_FLASH_LEGACY_512Kx16	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_LEGACY_512Kx16$/;"	d
CONFIG_SYS_FLASH_LEGACY_512Kx16	include/configs/smdk2410.h	/^#define CONFIG_SYS_FLASH_LEGACY_512Kx16$/;"	d
CONFIG_SYS_FLASH_LEGACY_512Kx16	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_LEGACY_512Kx16$/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_LOCK_TOUT	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_LOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_OR_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_OR_PRELIM /;"	d
CONFIG_SYS_FLASH_OR_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_OR_PRELIM /;"	d
CONFIG_SYS_FLASH_PARMSECT_SZ	include/configs/xtfpga.h	/^# define CONFIG_SYS_FLASH_PARMSECT_SZ	/;"	d
CONFIG_SYS_FLASH_PROTECTION	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5272C3.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MIP405.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/PATI.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/PIP405.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/ac14xx.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/am335x_evm.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bav335x.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/boston.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/calimain.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/cm-bf527.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/cm-bf533.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/cm-bf548.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/cm-bf561.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/da850evm.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/dnp5370.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/edb93xx.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/ethernut5.h	/^# define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/flea3.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/integrator-common.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/ipek01.h	/^#define CONFIG_SYS_FLASH_PROTECTION /;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/km/keymile-common.h	/^#define	CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/mx31ads.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/xilinx-ppc.h	/^#define	CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/xtfpga.h	/^#define CONFIG_SYS_FLASH_PROTECTION	/;"	d
CONFIG_SYS_FLASH_PROTECTION	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_PROTECTION$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/P1022DS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/io.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST$/;"	d
CONFIG_SYS_FLASH_QUIET_TEST	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_QUIET_TEST	/;"	d
CONFIG_SYS_FLASH_READ0	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_READ0	/;"	d
CONFIG_SYS_FLASH_READ0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_READ0	/;"	d
CONFIG_SYS_FLASH_READ0	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_READ0	/;"	d
CONFIG_SYS_FLASH_READ0	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_READ0	/;"	d
CONFIG_SYS_FLASH_READ1	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_READ1	/;"	d
CONFIG_SYS_FLASH_READ1	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_READ1	/;"	d
CONFIG_SYS_FLASH_READ1	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_READ1	/;"	d
CONFIG_SYS_FLASH_READ1	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_READ1	/;"	d
CONFIG_SYS_FLASH_READ2	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_READ2	/;"	d
CONFIG_SYS_FLASH_READ2	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_READ2	/;"	d
CONFIG_SYS_FLASH_READ2	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_READ2	/;"	d
CONFIG_SYS_FLASH_READ2	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_READ2	/;"	d
CONFIG_SYS_FLASH_SECT_SIZE	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_FLASH_SECT_SIZE /;"	d
CONFIG_SYS_FLASH_SECT_SZ	include/configs/calimain.h	/^#define CONFIG_SYS_FLASH_SECT_SZ /;"	d
CONFIG_SYS_FLASH_SECT_SZ	include/configs/da850evm.h	/^#define CONFIG_SYS_FLASH_SECT_SZ	/;"	d
CONFIG_SYS_FLASH_SECT_SZ	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_FLASH_SECT_SZ	/;"	d
CONFIG_SYS_FLASH_SECT_SZ	include/configs/xtfpga.h	/^# define CONFIG_SYS_FLASH_SECT_SZ	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5272C3.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/atngw100.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/atstk1002.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/bav335x.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/canmb.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/grasshopper.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/integratorap.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/munices.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/o2d.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/o2d300.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/o2dnt2.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/o2i.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/o2mnt.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/o3dnt.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/v38b.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/xilinx-ppc440-generic.h	/^#define	CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/xtfpga.h	/^# define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE	include/configs/zynq-common.h	/^# define CONFIG_SYS_FLASH_SIZE	/;"	d
CONFIG_SYS_FLASH_SIZE_1	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_SIZE_1	/;"	d
CONFIG_SYS_FLASH_SIZE_2	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_SIZE_2	/;"	d
CONFIG_SYS_FLASH_SIZE_2	include/configs/km82xx.h	/^#define CONFIG_SYS_FLASH_SIZE_2 /;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_UNLOCK_TOUT	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_UNLOCK_TOUT	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM823L.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM823M.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM834x.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM850L.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM850M.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM855L.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM855M.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM860L.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM860M.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM862L.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM862M.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM866M.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/TQM885D.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ac14xx.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/amcore.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/aria.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/bav335x.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/boston.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/calimain.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/edb93xx.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/flea3.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/inka4x0.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/io.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ipek01.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/malta.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/mecp5123.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/microblaze-generic.h	/^# define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/munices.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/mx31ads.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/pcm030.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/v38b.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/zmx25.h	/^#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/;"	d
CONFIG_SYS_FLASH_USE_BUFFER_WRITE	include/configs/zynq-common.h	/^# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE$/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	board/amcc/common/flash.c	/^#define CONFIG_SYS_FLASH_WORD_SIZE /;"	d	file:
CONFIG_SYS_FLASH_WORD_SIZE	board/amcc/yucca/flash.c	/^#define CONFIG_SYS_FLASH_WORD_SIZE /;"	d	file:
CONFIG_SYS_FLASH_WORD_SIZE	board/tqc/tqm5200/cam5200_flash.c	/^#define CONFIG_SYS_FLASH_WORD_SIZE /;"	d	file:
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE /;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/bubinga.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE /;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE /;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WORD_SIZE	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_WORD_SIZE	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/MigoR.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/PLU405.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/PMC405DE.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/PMC440.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/TQM5200.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/UCP1020.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/VOM405.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/a3m071.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/acadia.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/am3517_crane.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ap325rxa.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/bamboo.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/blanche.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/bubinga.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/canmb.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/canyonlands.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/dbau1x00.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/dlvision.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ecovec.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/espt.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/grsim.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/hrcon.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/icon.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ids8313.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/integrator-common.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/intip.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/io.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/io64.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/iocon.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/jupiter.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/katmai.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/kilauea.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/kzm9g.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/luan.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/lwmon5.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/makalu.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/mpr2.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ms7720se.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ms7722se.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ms7750se.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/neo.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/omap3_evm.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/p1_twr.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/pb1x00.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/r0p7734.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/r7780mp.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/redwood.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/rsk7203.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/sbc8349.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/sbc8548.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/sequoia.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/shmin.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/socrates.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/spear-common.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/strider.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/t3corp.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/vct.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/ve8313.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/vexpress_common.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/vme8349.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/walnut.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/x600.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/yosemite.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/yucca.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLASH_WRITE_TOUT	include/configs/zynq-common.h	/^# define CONFIG_SYS_FLASH_WRITE_TOUT	/;"	d
CONFIG_SYS_FLYCNFG_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_FLYCNFG_VAL	/;"	d
CONFIG_SYS_FLYCNFG_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_FLYCNFG_VAL	/;"	d
CONFIG_SYS_FLYCNFG_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_FLYCNFG_VAL	/;"	d
CONFIG_SYS_FM1_10GEC1_PHY_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR /;"	d
CONFIG_SYS_FM1_10GEC1_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_10GEC1_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_10GEC2_PHY_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_10GEC2_PHY_ADDR /;"	d
CONFIG_SYS_FM1_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FM1_CLK	/;"	d
CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR	include/fm_eth.h	/^#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC1_PHY_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC1_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC1_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC2_PHY_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC2_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC2_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC3_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC3_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR /;"	d
CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_DTSEC_MDIO_ADDR	include/fm_eth.h	/^#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR	/;"	d
CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR /;"	d
CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR /;"	d
CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	/;"	d
CONFIG_SYS_FM1_TGEC_MDIO_ADDR	include/fm_eth.h	/^#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR	/;"	d
CONFIG_SYS_FM2_10GEC1_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM2_10GEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM2_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FM2_CLK	/;"	d
CONFIG_SYS_FM2_DTSEC1_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR	/;"	d
CONFIG_SYS_FM2_DTSEC2_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR	/;"	d
CONFIG_SYS_FM2_DTSEC3_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR	/;"	d
CONFIG_SYS_FM2_DTSEC4_PHY_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR	/;"	d
CONFIG_SYS_FM2_DTSEC_MDIO_ADDR	include/fm_eth.h	/^#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR	/;"	d
CONFIG_SYS_FM2_TGEC_MDIO_ADDR	include/fm_eth.h	/^#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FMAN_FW_ADDR /;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_FW_ADDR	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_FMAN_FW_ADDR	/;"	d
CONFIG_SYS_FMAN_V3	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FMAN_V3$/;"	d
CONFIG_SYS_FMAN_V3	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FMAN_V3$/;"	d
CONFIG_SYS_FM_MURAM_SIZE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FM_MURAM_SIZE	/;"	d
CONFIG_SYS_FM_MURAM_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FM_MURAM_SIZE	/;"	d
CONFIG_SYS_FM_MURAM_SIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_FM_MURAM_SIZE	/;"	d
CONFIG_SYS_FORM_3U_VPX	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FORM_3U_VPX	/;"	d
CONFIG_SYS_FORM_3U_VPX	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FORM_3U_VPX	/;"	d
CONFIG_SYS_FORM_PMC	include/configs/xpedite1000.h	/^#define CONFIG_SYS_FORM_PMC	/;"	d
CONFIG_SYS_FORM_PMC_XMC	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FORM_PMC_XMC	/;"	d
CONFIG_SYS_FORM_PMC_XMC	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FORM_PMC_XMC	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/io.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/io64.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/iocon.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/neo.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_BASE	include/configs/strider.h	/^#define CONFIG_SYS_FPGA0_BASE	/;"	d
CONFIG_SYS_FPGA0_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_FPGA0_SIZE	/;"	d
CONFIG_SYS_FPGA0_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_FPGA0_SIZE	/;"	d
CONFIG_SYS_FPGA1_BASE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA1_BASE	/;"	d
CONFIG_SYS_FPGA1_BASE	include/configs/io64.h	/^#define CONFIG_SYS_FPGA1_BASE	/;"	d
CONFIG_SYS_FPGA1_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_FPGA1_BASE	/;"	d
CONFIG_SYS_FPGA2_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_FPGA2_BASE	/;"	d
CONFIG_SYS_FPGA3_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_FPGA3_BASE	/;"	d
CONFIG_SYS_FPGAREG_DATE	include/configs/xtfpga.h	/^#define CONFIG_SYS_FPGAREG_DATE	/;"	d
CONFIG_SYS_FPGAREG_DIPSW	include/configs/xtfpga.h	/^#define CONFIG_SYS_FPGAREG_DIPSW	/;"	d
CONFIG_SYS_FPGAREG_FREQ	include/configs/xtfpga.h	/^#define CONFIG_SYS_FPGAREG_FREQ	/;"	d
CONFIG_SYS_FPGAREG_RESET	include/configs/xtfpga.h	/^#define CONFIG_SYS_FPGAREG_RESET	/;"	d
CONFIG_SYS_FPGAREG_RESET_CODE	include/configs/xtfpga.h	/^#define CONFIG_SYS_FPGAREG_RESET_CODE	/;"	d
CONFIG_SYS_FPGA_AMASK	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_AMASK	/;"	d
CONFIG_SYS_FPGA_AMASK	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_AMASK	/;"	d
CONFIG_SYS_FPGA_AMASK	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_AMASK	/;"	d
CONFIG_SYS_FPGA_AMASK	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_AMASK	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/io.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/io64.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/iocon.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/ipek01.h	/^#define	CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/km82xx.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/makalu.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/neo.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/redwood.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/strider.h	/^#define CONFIG_SYS_FPGA_BASE(/;"	d
CONFIG_SYS_FPGA_BASE	include/configs/yucca.h	/^#define CONFIG_SYS_FPGA_BASE	/;"	d
CONFIG_SYS_FPGA_BASE0	include/configs/PMC440.h	/^#define CONFIG_SYS_FPGA_BASE0	/;"	d
CONFIG_SYS_FPGA_BASE1	include/configs/PMC440.h	/^#define CONFIG_SYS_FPGA_BASE1	/;"	d
CONFIG_SYS_FPGA_BASE_0	include/configs/lwmon5.h	/^#define CONFIG_SYS_FPGA_BASE_0	/;"	d
CONFIG_SYS_FPGA_BASE_1	include/configs/lwmon5.h	/^#define CONFIG_SYS_FPGA_BASE_1	/;"	d
CONFIG_SYS_FPGA_BASE_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_BASE_ADDR	/;"	d
CONFIG_SYS_FPGA_BASE_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_BASE_ADDR /;"	d
CONFIG_SYS_FPGA_BASE_PHYS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FPGA_BASE_PHYS	/;"	d
CONFIG_SYS_FPGA_CHECK_CTRLC	include/configs/apf27.h	/^#define CONFIG_SYS_FPGA_CHECK_CTRLC$/;"	d
CONFIG_SYS_FPGA_CHECK_ERROR	drivers/fpga/virtex2.c	/^#define CONFIG_SYS_FPGA_CHECK_ERROR$/;"	d	file:
CONFIG_SYS_FPGA_CHECK_ERROR	include/configs/apf27.h	/^#define CONFIG_SYS_FPGA_CHECK_ERROR$/;"	d
CONFIG_SYS_FPGA_CHIPSIDE_LOOPBACK	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_CHIPSIDE_LOOPBACK	/;"	d
CONFIG_SYS_FPGA_CLK	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_CLK	/;"	d
CONFIG_SYS_FPGA_CLK	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_CLK	/;"	d
CONFIG_SYS_FPGA_CLK	include/configs/VOM405.h	/^#define CONFIG_SYS_FPGA_CLK	/;"	d
CONFIG_SYS_FPGA_COMMON	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA_COMMON$/;"	d
CONFIG_SYS_FPGA_COMMON	include/configs/io.h	/^#define CONFIG_SYS_FPGA_COMMON$/;"	d
CONFIG_SYS_FPGA_COMMON	include/configs/io64.h	/^#define CONFIG_SYS_FPGA_COMMON$/;"	d
CONFIG_SYS_FPGA_COMMON	include/configs/neo.h	/^#define CONFIG_SYS_FPGA_COMMON$/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/hrcon.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/io.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/io64.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/iocon.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/neo.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_COUNT	include/configs/strider.h	/^#define CONFIG_SYS_FPGA_COUNT	/;"	d
CONFIG_SYS_FPGA_CSOR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_CSOR	/;"	d
CONFIG_SYS_FPGA_CSOR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_CSOR	/;"	d
CONFIG_SYS_FPGA_CSOR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_CSOR	/;"	d
CONFIG_SYS_FPGA_CSOR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_CSOR	/;"	d
CONFIG_SYS_FPGA_CSPR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_CSPR	/;"	d
CONFIG_SYS_FPGA_CSPR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_CSPR	/;"	d
CONFIG_SYS_FPGA_CSPR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_CSPR	/;"	d
CONFIG_SYS_FPGA_CSPR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_CSPR	/;"	d
CONFIG_SYS_FPGA_CSPR_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_CSPR_EXT	/;"	d
CONFIG_SYS_FPGA_CSPR_EXT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_CSPR_EXT /;"	d
CONFIG_SYS_FPGA_CSPR_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_CSPR_EXT	/;"	d
CONFIG_SYS_FPGA_CSPR_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_CSPR_EXT	/;"	d
CONFIG_SYS_FPGA_CTRL	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_CTRL	/;"	d
CONFIG_SYS_FPGA_CTRL_CF_RESET	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_CTRL_CF_RESET	/;"	d
CONFIG_SYS_FPGA_CTRL_PS2_RESET	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_CTRL_PS2_RESET /;"	d
CONFIG_SYS_FPGA_CTRL_WDI	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_CTRL_WDI	/;"	d
CONFIG_SYS_FPGA_DATA	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_DATA	/;"	d
CONFIG_SYS_FPGA_DATA	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_DATA	/;"	d
CONFIG_SYS_FPGA_DATA	include/configs/VOM405.h	/^#define CONFIG_SYS_FPGA_DATA	/;"	d
CONFIG_SYS_FPGA_DONE	board/spear/x600/fpga.c	/^#define CONFIG_SYS_FPGA_DONE	/;"	d	file:
CONFIG_SYS_FPGA_DONE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_DONE	/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_DONE	/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/VOM405.h	/^#define CONFIG_SYS_FPGA_DONE	/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA_DONE(/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/hrcon.h	/^#define CONFIG_SYS_FPGA_DONE(/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/io.h	/^#define CONFIG_SYS_FPGA_DONE(/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/io64.h	/^#define CONFIG_SYS_FPGA_DONE(/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/iocon.h	/^#define CONFIG_SYS_FPGA_DONE(/;"	d
CONFIG_SYS_FPGA_DONE	include/configs/strider.h	/^#define CONFIG_SYS_FPGA_DONE(/;"	d
CONFIG_SYS_FPGA_DPRAM_RST	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_DPRAM_RST	/;"	d
CONFIG_SYS_FPGA_DPRAM_RW_TYPE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_DPRAM_RW_TYPE	/;"	d
CONFIG_SYS_FPGA_DPRAM_R_INT_LINE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_DPRAM_R_INT_LINE	/;"	d
CONFIG_SYS_FPGA_DPRAM_W_INT_LINE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_DPRAM_W_INT_LINE	/;"	d
CONFIG_SYS_FPGA_FIFO_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_FIFO_BASE	/;"	d
CONFIG_SYS_FPGA_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_FTIM0	/;"	d
CONFIG_SYS_FPGA_FTIM0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_FTIM0	/;"	d
CONFIG_SYS_FPGA_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_FTIM0	/;"	d
CONFIG_SYS_FPGA_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_FTIM0	/;"	d
CONFIG_SYS_FPGA_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_FTIM1	/;"	d
CONFIG_SYS_FPGA_FTIM1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_FTIM1	/;"	d
CONFIG_SYS_FPGA_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_FTIM1	/;"	d
CONFIG_SYS_FPGA_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_FTIM1	/;"	d
CONFIG_SYS_FPGA_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_FTIM2	/;"	d
CONFIG_SYS_FPGA_FTIM2	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_FTIM2	/;"	d
CONFIG_SYS_FPGA_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_FTIM2	/;"	d
CONFIG_SYS_FPGA_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_FTIM2	/;"	d
CONFIG_SYS_FPGA_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FPGA_FTIM3	/;"	d
CONFIG_SYS_FPGA_FTIM3	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FPGA_FTIM3 /;"	d
CONFIG_SYS_FPGA_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FPGA_FTIM3	/;"	d
CONFIG_SYS_FPGA_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FPGA_FTIM3	/;"	d
CONFIG_SYS_FPGA_INIT	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_INIT	/;"	d
CONFIG_SYS_FPGA_INIT	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_INIT	/;"	d
CONFIG_SYS_FPGA_INIT	include/configs/VOM405.h	/^#define CONFIG_SYS_FPGA_INIT	/;"	d
CONFIG_SYS_FPGA_LINESIDE_LOOPBACK	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_LINESIDE_LOOPBACK	/;"	d
CONFIG_SYS_FPGA_MAGIC	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_MAGIC	/;"	d
CONFIG_SYS_FPGA_MAGIC_MASK	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_MAGIC_MASK	/;"	d
CONFIG_SYS_FPGA_MAX_SIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MAX_SIZE	/;"	d
CONFIG_SYS_FPGA_MAX_SIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_MAX_SIZE	/;"	d
CONFIG_SYS_FPGA_MODE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE	/;"	d
CONFIG_SYS_FPGA_MODE_CF_RESET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE_CF_RESET	/;"	d
CONFIG_SYS_FPGA_MODE_DUART_RESET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE_DUART_RESET /;"	d
CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT /;"	d
CONFIG_SYS_FPGA_MODE_TS_CLEAR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE_TS_CLEAR	/;"	d
CONFIG_SYS_FPGA_MODE_TS_IRQ_CLEAR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE_TS_IRQ_CLEAR /;"	d
CONFIG_SYS_FPGA_MODE_TS_IRQ_ENABLE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_MODE_TS_IRQ_ENABLE /;"	d
CONFIG_SYS_FPGA_NO_RFL_HI	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA_NO_RFL_HI$/;"	d
CONFIG_SYS_FPGA_NO_RFL_HI	include/configs/strider.h	/^#define CONFIG_SYS_FPGA_NO_RFL_HI$/;"	d
CONFIG_SYS_FPGA_PHY0_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_PHY0_INT	/;"	d
CONFIG_SYS_FPGA_PHY1_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_PHY1_INT	/;"	d
CONFIG_SYS_FPGA_PRG	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_PRG	/;"	d
CONFIG_SYS_FPGA_PRG	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_PRG	/;"	d
CONFIG_SYS_FPGA_PRG	include/configs/VOM405.h	/^#define CONFIG_SYS_FPGA_PRG	/;"	d
CONFIG_SYS_FPGA_PROG	board/spear/x600/fpga.c	/^#define CONFIG_SYS_FPGA_PROG	/;"	d	file:
CONFIG_SYS_FPGA_PROG_FEEDBACK	drivers/fpga/virtex2.c	/^#define CONFIG_SYS_FPGA_PROG_FEEDBACK$/;"	d	file:
CONFIG_SYS_FPGA_PROG_FEEDBACK	include/configs/apf27.h	/^#define CONFIG_SYS_FPGA_PROG_FEEDBACK$/;"	d
CONFIG_SYS_FPGA_PROG_FEEDBACK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FPGA_PROG_FEEDBACK$/;"	d
CONFIG_SYS_FPGA_PROG_FEEDBACK	include/configs/mt_ventoux.h	/^#define CONFIG_SYS_FPGA_PROG_FEEDBACK$/;"	d
CONFIG_SYS_FPGA_PROG_TIME	drivers/fpga/zynqpl.c	/^#define CONFIG_SYS_FPGA_PROG_TIME	/;"	d	file:
CONFIG_SYS_FPGA_PTR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_PTR	include/configs/hrcon.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_PTR	include/configs/io.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_PTR	include/configs/io64.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_PTR	include/configs/iocon.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_PTR	include/configs/neo.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_PTR	include/configs/strider.h	/^#define CONFIG_SYS_FPGA_PTR /;"	d
CONFIG_SYS_FPGA_REG_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_REG_BASE	/;"	d
CONFIG_SYS_FPGA_REG_BASE_ADDR	include/configs/bubinga.h	/^#define	CONFIG_SYS_FPGA_REG_BASE_ADDR	/;"	d
CONFIG_SYS_FPGA_REG_BASE_ADDR	include/configs/walnut.h	/^#define CONFIG_SYS_FPGA_REG_BASE_ADDR	/;"	d
CONFIG_SYS_FPGA_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_FPGA_SIZE	/;"	d
CONFIG_SYS_FPGA_SIZE	include/configs/km82xx.h	/^#define CONFIG_SYS_FPGA_SIZE	/;"	d
CONFIG_SYS_FPGA_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_FPGA_SIZE	/;"	d
CONFIG_SYS_FPGA_SLIC0_CS	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC0_CS	/;"	d
CONFIG_SYS_FPGA_SLIC0_ENABLE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC0_ENABLE	/;"	d
CONFIG_SYS_FPGA_SLIC0_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC0_INT	/;"	d
CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT	/;"	d
CONFIG_SYS_FPGA_SLIC0_W_DPRAM_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC0_W_DPRAM_INT	/;"	d
CONFIG_SYS_FPGA_SLIC1_CS	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC1_CS	/;"	d
CONFIG_SYS_FPGA_SLIC1_ENABLE	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC1_ENABLE	/;"	d
CONFIG_SYS_FPGA_SLIC1_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC1_INT	/;"	d
CONFIG_SYS_FPGA_SLIC1_R_DPRAM_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC1_R_DPRAM_INT	/;"	d
CONFIG_SYS_FPGA_SLIC1_W_DPRAM_INT	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_SLIC1_W_DPRAM_INT	/;"	d
CONFIG_SYS_FPGA_SPARTAN2	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_SPARTAN2	/;"	d
CONFIG_SYS_FPGA_SPARTAN2	include/configs/PLU405.h	/^#define CONFIG_SYS_FPGA_SPARTAN2	/;"	d
CONFIG_SYS_FPGA_STATUS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_STATUS	/;"	d
CONFIG_SYS_FPGA_STATUS_DIP0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_STATUS_DIP0	/;"	d
CONFIG_SYS_FPGA_STATUS_DIP1	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_STATUS_DIP1	/;"	d
CONFIG_SYS_FPGA_STATUS_DIP2	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_STATUS_DIP2	/;"	d
CONFIG_SYS_FPGA_STATUS_FLASH	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_STATUS_FLASH	/;"	d
CONFIG_SYS_FPGA_STATUS_TS_IRQ	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_STATUS_TS_IRQ	/;"	d
CONFIG_SYS_FPGA_TS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS	/;"	d
CONFIG_SYS_FPGA_TS_CAP0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP0	/;"	d
CONFIG_SYS_FPGA_TS_CAP0_LOW	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP0_LOW	/;"	d
CONFIG_SYS_FPGA_TS_CAP1	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP1	/;"	d
CONFIG_SYS_FPGA_TS_CAP1_LOW	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP1_LOW	/;"	d
CONFIG_SYS_FPGA_TS_CAP2	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP2	/;"	d
CONFIG_SYS_FPGA_TS_CAP2_LOW	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP2_LOW	/;"	d
CONFIG_SYS_FPGA_TS_CAP3	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP3	/;"	d
CONFIG_SYS_FPGA_TS_CAP3_LOW	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_CAP3_LOW	/;"	d
CONFIG_SYS_FPGA_TS_LOW	include/configs/CPCI4052.h	/^#define CONFIG_SYS_FPGA_TS_LOW	/;"	d
CONFIG_SYS_FPGA_UART0_FO	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_UART0_FO	/;"	d
CONFIG_SYS_FPGA_UART1_FO	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_UART1_FO	/;"	d
CONFIG_SYS_FPGA_USER_LED0	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_USER_LED0	/;"	d
CONFIG_SYS_FPGA_USER_LED1	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_USER_LED1	/;"	d
CONFIG_SYS_FPGA_VER_MASK	include/configs/kilauea.h	/^#define CONFIG_SYS_FPGA_VER_MASK	/;"	d
CONFIG_SYS_FPGA_WAIT	drivers/fpga/ACEX1K.c	/^#define CONFIG_SYS_FPGA_WAIT /;"	d	file:
CONFIG_SYS_FPGA_WAIT	drivers/fpga/cyclon2.c	/^#define CONFIG_SYS_FPGA_WAIT /;"	d	file:
CONFIG_SYS_FPGA_WAIT	drivers/fpga/spartan2.c	/^#define CONFIG_SYS_FPGA_WAIT /;"	d	file:
CONFIG_SYS_FPGA_WAIT	drivers/fpga/spartan3.c	/^#define CONFIG_SYS_FPGA_WAIT /;"	d	file:
CONFIG_SYS_FPGA_WAIT	drivers/fpga/zynqpl.c	/^#define CONFIG_SYS_FPGA_WAIT /;"	d	file:
CONFIG_SYS_FPGA_WAIT	include/configs/apf27.h	/^#define CONFIG_SYS_FPGA_WAIT	/;"	d
CONFIG_SYS_FPGA_WAIT	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FPGA_WAIT	/;"	d
CONFIG_SYS_FPGA_WAIT	include/configs/mt_ventoux.h	/^#define CONFIG_SYS_FPGA_WAIT	/;"	d
CONFIG_SYS_FPGA_WAIT_BUSY	drivers/fpga/virtex2.c	/^#define CONFIG_SYS_FPGA_WAIT_BUSY	/;"	d	file:
CONFIG_SYS_FPGA_WAIT_CONFIG	drivers/fpga/virtex2.c	/^#define CONFIG_SYS_FPGA_WAIT_CONFIG	/;"	d	file:
CONFIG_SYS_FPGA_WAIT_INIT	drivers/fpga/virtex2.c	/^#define CONFIG_SYS_FPGA_WAIT_INIT	/;"	d	file:
CONFIG_SYS_FSL_A004447_SVR_REV	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_A004447_SVR_REV	/;"	d
CONFIG_SYS_FSL_AIOP1_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_AIOP1_BASE	/;"	d
CONFIG_SYS_FSL_AIOP1_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_AIOP1_SIZE	/;"	d
CONFIG_SYS_FSL_B4860QDS_XFI_ERR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_B4860QDS_XFI_ERR$/;"	d
CONFIG_SYS_FSL_BMAN_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_BMAN_ADDR /;"	d
CONFIG_SYS_FSL_BMAN_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_BMAN_OFFSET	/;"	d
CONFIG_SYS_FSL_BOOTROM_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_BOOTROM_BASE	/;"	d
CONFIG_SYS_FSL_BOOTROM_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_BOOTROM_SIZE	/;"	d
CONFIG_SYS_FSL_CCSR_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_CCSR_BASE	/;"	d
CONFIG_SYS_FSL_CCSR_GUR_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_CCSR_GUR_BE$/;"	d
CONFIG_SYS_FSL_CCSR_GUR_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_CCSR_GUR_LE$/;"	d
CONFIG_SYS_FSL_CCSR_SCFG_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_CCSR_SCFG_BE$/;"	d
CONFIG_SYS_FSL_CCSR_SCFG_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_CCSR_SCFG_LE$/;"	d
CONFIG_SYS_FSL_CCSR_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_CCSR_SIZE	/;"	d
CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR	/;"	d
CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR	/;"	d
CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR	/;"	d
CONFIG_SYS_FSL_CLK	include/configs/colibri_vf.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/m53evk.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx25pdk.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx51evk.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx53ard.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx53evk.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx53loco.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx53smd.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx6_common.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/mx7_common.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/usbarmory.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/vf610twr.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FSL_CLK$/;"	d
CONFIG_SYS_FSL_CLK_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_CLK_ADDR	/;"	d
CONFIG_SYS_FSL_CLUSTER_1_L2	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CLUSTER_1_L2 /;"	d
CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET	/;"	d
CONFIG_SYS_FSL_CLUSTER_CLOCKS	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_CLUSTER_CLOCKS	/;"	d
CONFIG_SYS_FSL_CLUSTER_CLOCKS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_CLUSTER_CLOCKS	/;"	d
CONFIG_SYS_FSL_CLUSTER_CLOCKS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_CLUSTER_CLOCKS /;"	d
CONFIG_SYS_FSL_CORENET_CCM_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_CCM_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_CCM_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_CCM_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_CLK_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_CLK_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_CLK_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_CLK_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_PME_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_PME_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_PME_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_PME_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_RCPM_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_RCPM_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_RCPM_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_RCPM_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_RMAN_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_RMAN_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_RMAN_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_SERDES2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_SERDES3_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES3_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_SERDES4_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES4_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_SERDES_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES_ADDR /;"	d
CONFIG_SYS_FSL_CORENET_SERDES_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SERDES_OFFSET	/;"	d
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY /;"	d
CONFIG_SYS_FSL_CORES_PER_CLUSTER	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_CORES_PER_CLUSTER /;"	d
CONFIG_SYS_FSL_CPC	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC	include/configs/t4qds.h	/^#define CONFIG_SYS_FSL_CPC	/;"	d
CONFIG_SYS_FSL_CPC_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CPC_ADDR	/;"	d
CONFIG_SYS_FSL_CPC_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_CPC_OFFSET	/;"	d
CONFIG_SYS_FSL_CSU_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_CSU_ADDR	/;"	d
CONFIG_SYS_FSL_CSU_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_CSU_ADDR /;"	d
CONFIG_SYS_FSL_DCFG_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_DCFG_ADDR	/;"	d
CONFIG_SYS_FSL_DCSR_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DCSR_BASE	/;"	d
CONFIG_SYS_FSL_DCSR_DDR2_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DCSR_DDR2_ADDR	/;"	d
CONFIG_SYS_FSL_DCSR_DDR3_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DCSR_DDR3_ADDR	/;"	d
CONFIG_SYS_FSL_DCSR_DDR4_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DCSR_DDR4_ADDR	/;"	d
CONFIG_SYS_FSL_DCSR_DDR_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DCSR_DDR_ADDR	/;"	d
CONFIG_SYS_FSL_DCSR_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DCSR_SIZE	/;"	d
CONFIG_SYS_FSL_DCU_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_DCU_BE$/;"	d
CONFIG_SYS_FSL_DDR	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_FSL_DDR$/;"	d
CONFIG_SYS_FSL_DDR1	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FSL_DDR1$/;"	d
CONFIG_SYS_FSL_DDR1	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FSL_DDR1$/;"	d
CONFIG_SYS_FSL_DDR1	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FSL_DDR1$/;"	d
CONFIG_SYS_FSL_DDR1	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FSL_DDR1$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/sbc8548.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_DDR2$/;"	d
CONFIG_SYS_FSL_DDR2_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DDR2_ADDR	/;"	d
CONFIG_SYS_FSL_DDR2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_DDR2_ADDR /;"	d
CONFIG_SYS_FSL_DDR2_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_FSL_DDR2_ADDR	/;"	d
CONFIG_SYS_FSL_DDR3	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR3$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR3	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR3$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/t4qds.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_DDR3$/;"	d
CONFIG_SYS_FSL_DDR3_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DDR3_ADDR	/;"	d
CONFIG_SYS_FSL_DDR3_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_DDR3_ADDR /;"	d
CONFIG_SYS_FSL_DDR3_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR3$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR3_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR3$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR4	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR4$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR4	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR4$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR4	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_DDR4$/;"	d
CONFIG_SYS_FSL_DDR4_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR4$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR4_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR4$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDRC_ARM_GEN3	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDRC_ARM_GEN3$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDRC_ARM_GEN3	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDRC_ARM_GEN3$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDRC_ARM_GEN3_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDRC_ARM_GEN3$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDRC_ARM_GEN3_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDRC_ARM_GEN3$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDRC_GEN1	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DDRC_GEN1$/;"	d
CONFIG_SYS_FSL_DDRC_GEN2	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DDRC_GEN2$/;"	d
CONFIG_SYS_FSL_DDRC_GEN2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_DDRC_GEN2$/;"	d
CONFIG_SYS_FSL_DDRC_GEN3	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DDRC_GEN3$/;"	d
CONFIG_SYS_FSL_DDRC_GEN4	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDRC_GEN4$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDRC_GEN4	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDRC_GEN4$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDRC_GEN4	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DDRC_GEN4$/;"	d
CONFIG_SYS_FSL_DDRC_GEN4_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDRC_GEN4$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDRC_GEN4_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDRC_GEN4$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_86XX	arch/powerpc/include/asm/config_mpc86xx.h	/^#define CONFIG_SYS_FSL_DDR_86XX$/;"	d
CONFIG_SYS_FSL_DDR_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_DDR_ADDR	/;"	d
CONFIG_SYS_FSL_DDR_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_DDR_ADDR	/;"	d
CONFIG_SYS_FSL_DDR_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_DDR_ADDR	/;"	d
CONFIG_SYS_FSL_DDR_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_FSL_DDR_ADDR /;"	d
CONFIG_SYS_FSL_DDR_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_DDR_ADDR /;"	d
CONFIG_SYS_FSL_DDR_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_FSL_DDR_ADDR	/;"	d
CONFIG_SYS_FSL_DDR_BE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_BE$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_BE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_BE$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_BE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DDR_BE$/;"	d
CONFIG_SYS_FSL_DDR_BE_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_BE$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_BE_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_BE$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_EMU	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_FSL_DDR_EMU	/;"	d
CONFIG_SYS_FSL_DDR_INTLV_256B	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FSL_DDR_INTLV_256B	/;"	d
CONFIG_SYS_FSL_DDR_LE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_LE$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_LE_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_LE$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	/;"	d
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	include/fsl_ddr.h	/^#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	/;"	d
CONFIG_SYS_FSL_DDR_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	drivers/ddr/fsl/main.c	/^#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY /;"	d	file:
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	/;"	d
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	/;"	d
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	/;"	d
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	/;"	d
CONFIG_SYS_FSL_DDR_VER	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_VER$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_VER	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_VER$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_VER	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DDR_VER	/;"	d
CONFIG_SYS_FSL_DDR_VER_50	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_VER_50$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_VER_50	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_VER_50$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_VER_50_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_VER_50$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_VER_50_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_VER_50$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DDR_VER_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_VER$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_DDR_VER_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_VER$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_DRAM_BASE1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DRAM_BASE1	/;"	d
CONFIG_SYS_FSL_DRAM_BASE2	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DRAM_BASE2	/;"	d
CONFIG_SYS_FSL_DRAM_BASE3	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DRAM_BASE3	/;"	d
CONFIG_SYS_FSL_DRAM_SIZE1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DRAM_SIZE1	/;"	d
CONFIG_SYS_FSL_DRAM_SIZE2	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DRAM_SIZE2	/;"	d
CONFIG_SYS_FSL_DRAM_SIZE3	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_DRAM_SIZE3	/;"	d
CONFIG_SYS_FSL_DSPI_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_DSPI_BE$/;"	d
CONFIG_SYS_FSL_DSPI_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_DSPI_BE$/;"	d
CONFIG_SYS_FSL_DSP_CCSRBAR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_FSL_DSP_CCSRBAR	/;"	d
CONFIG_SYS_FSL_DSP_CCSRBAR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_DSP_CCSRBAR	/;"	d
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT	/;"	d
CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS	/;"	d
CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS	/;"	d
CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR /;"	d
CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET	/;"	d
CONFIG_SYS_FSL_DSP_DDR_ADDR	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DSP_DDR_ADDR	/;"	d
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR	/;"	d
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR	/;"	d
CONFIG_SYS_FSL_ERRATUM_A004468	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004468$/;"	d
CONFIG_SYS_FSL_ERRATUM_A004477	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004477$/;"	d
CONFIG_SYS_FSL_ERRATUM_A004508	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004508$/;"	d
CONFIG_SYS_FSL_ERRATUM_A004510	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004510$/;"	d
CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	/;"	d
CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2	/;"	d
CONFIG_SYS_FSL_ERRATUM_A004580	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004580$/;"	d
CONFIG_SYS_FSL_ERRATUM_A004699	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004699$/;"	d
CONFIG_SYS_FSL_ERRATUM_A004849	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A004849$/;"	d
CONFIG_SYS_FSL_ERRATUM_A005125	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A005125$/;"	d
CONFIG_SYS_FSL_ERRATUM_A005434	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A005434$/;"	d
CONFIG_SYS_FSL_ERRATUM_A005812	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A005812$/;"	d
CONFIG_SYS_FSL_ERRATUM_A005871	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A005871$/;"	d
CONFIG_SYS_FSL_ERRATUM_A006261	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A006261$/;"	d
CONFIG_SYS_FSL_ERRATUM_A006379	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A006379$/;"	d
CONFIG_SYS_FSL_ERRATUM_A006384	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A006384$/;"	d
CONFIG_SYS_FSL_ERRATUM_A006475	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A006475$/;"	d
CONFIG_SYS_FSL_ERRATUM_A006593	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A006593$/;"	d
CONFIG_SYS_FSL_ERRATUM_A007075	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A007075$/;"	d
CONFIG_SYS_FSL_ERRATUM_A007186	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A007186$/;"	d
CONFIG_SYS_FSL_ERRATUM_A007212	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A007212$/;"	d
CONFIG_SYS_FSL_ERRATUM_A007798	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A007798$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008044	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008044$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008336	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008336$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008378	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008378$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008378	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008378$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008407	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008407$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008511	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008511$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008514	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008514$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008585	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008585$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008585	include/configs/s32v234evb.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008585$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008751	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008751$/;"	d
CONFIG_SYS_FSL_ERRATUM_A008850	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A008850$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009635	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009635$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009660	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009660$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009663	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009663$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009663	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009663$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009663	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009663$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009801	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009801$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009803	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009803$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009929	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009929$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009942	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009942$/;"	d
CONFIG_SYS_FSL_ERRATUM_A009942	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A009942$/;"	d
CONFIG_SYS_FSL_ERRATUM_A010165	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ERRATUM_A010165$/;"	d
CONFIG_SYS_FSL_ERRATUM_A010315	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_ERRATUM_A010315$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_ERRATUM_A010315	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_ERRATUM_A010315$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_ERRATUM_A010315_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_ERRATUM_A010315$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_ERRATUM_A010315_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_ERRATUM_A010315$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_ERRATUM_A010539	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_ERRATUM_A010539$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_ERRATUM_A010539_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_ERRATUM_A010539$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_ERRATUM_A_004934	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_A_004934$/;"	d
CONFIG_SYS_FSL_ERRATUM_CPC_A002	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_CPC_A002$/;"	d
CONFIG_SYS_FSL_ERRATUM_CPC_A003	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_CPC_A003$/;"	d
CONFIG_SYS_FSL_ERRATUM_CPU_A003999	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999$/;"	d
CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134$/;"	d
CONFIG_SYS_FSL_ERRATUM_DDR_115	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_DDR_115$/;"	d
CONFIG_SYS_FSL_ERRATUM_DDR_A003	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_DDR_A003$/;"	d
CONFIG_SYS_FSL_ERRATUM_DDR_A003474	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474$/;"	d
CONFIG_SYS_FSL_ERRATUM_ELBC_A001	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/colibri_vf.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/hrcon.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/pcm052.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/s32v234evb.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/strider.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC111	include/configs/vf610twr.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC111$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC13	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC13$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC135	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC135$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC135	include/configs/pcm052.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC135$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC_A001	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC_A001	include/configs/pcm052.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001$/;"	d
CONFIG_SYS_FSL_ERRATUM_ESDHC_A001	include/configs/ts4800.h	/^#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001$/;"	d
CONFIG_SYS_FSL_ERRATUM_I2C_A004447	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447$/;"	d
CONFIG_SYS_FSL_ERRATUM_IFC_A002769	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769$/;"	d
CONFIG_SYS_FSL_ERRATUM_IFC_A002769	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769	/;"	d
CONFIG_SYS_FSL_ERRATUM_IFC_A003399	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399$/;"	d
CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011$/;"	d
CONFIG_SYS_FSL_ERRATUM_NMG_DDR120	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120$/;"	d
CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129$/;"	d
CONFIG_SYS_FSL_ERRATUM_NMG_LBC103	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103$/;"	d
CONFIG_SYS_FSL_ERRATUM_P1010_A003549	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549$/;"	d
CONFIG_SYS_FSL_ERRATUM_SEC_A003571	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_SEC_A003571$/;"	d
CONFIG_SYS_FSL_ERRATUM_SRIO_A004034	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034$/;"	d
CONFIG_SYS_FSL_ERRATUM_USB14	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ERRATUM_USB14$/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/cm_fx6.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/colibri_vf.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/el6x_common.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/gw_ventana.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/hrcon.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/m53evk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx25pdk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx51evk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx53ard.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx53evk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx53loco.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx53smd.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6slevk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/novena.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/ot1200.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/pcm052.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/pcm058.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/platinum.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/s32v234evb.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/strider.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/tbs2910.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/titanium.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/tqma6.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/ts4800.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/udoo.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/usbarmory.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/vf610twr.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/wandboard.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/warp.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/warp7.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR /;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_ADDR	include/configs/xpress.h	/^#define CONFIG_SYS_FSL_ESDHC_ADDR	/;"	d
CONFIG_SYS_FSL_ESDHC_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ESDHC_BE$/;"	d
CONFIG_SYS_FSL_ESDHC_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_ESDHC_BE$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT$/;"	d
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT	include/configs/warp.h	/^#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT$/;"	d
CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE	include/configs/warp.h	/^#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE$/;"	d
CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE	include/configs/warp7.h	/^#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE$/;"	d
CONFIG_SYS_FSL_ESDHC_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_ESDHC_LE$/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/colibri_vf.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/m53evk.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx25pdk.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx51evk.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx53ard.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx53evk.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx53loco.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/mx53smd.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/pcm052.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/s32v234evb.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/usbarmory.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/vf610twr.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_NUM	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FSL_ESDHC_NUM	/;"	d
CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK$/;"	d
CONFIG_SYS_FSL_ESDHC_USE_PIO	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_ESDHC_USE_PIO$/;"	d
CONFIG_SYS_FSL_FM1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_ADDR	/;"	d
CONFIG_SYS_FSL_FM1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_ADDR /;"	d
CONFIG_SYS_FSL_FM1_DTSEC1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_DTSEC1_ADDR	/;"	d
CONFIG_SYS_FSL_FM1_DTSEC1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_DTSEC1_ADDR /;"	d
CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_ADDR /;"	d
CONFIG_SYS_FSL_FM2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET	/;"	d
CONFIG_SYS_FSL_FMAN_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_FMAN_ADDR	/;"	d
CONFIG_SYS_FSL_GUTS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_GUTS_ADDR	/;"	d
CONFIG_SYS_FSL_GUTS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_GUTS_ADDR	/;"	d
CONFIG_SYS_FSL_GUTS_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_GUTS_ADDR	/;"	d
CONFIG_SYS_FSL_HAS_DP_DDR	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_HAS_DP_DDR$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_HAS_DP_DDR_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_HAS_DP_DDR$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET /;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET /;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/sbc8349.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/t4qds.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/vme8349.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_OFFSET	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_I2C2_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE /;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE /;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/sbc8349.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/t4qds.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/vme8349.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SLAVE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_I2C2_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED /;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED /;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/sbc8349.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/vme8349.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C2_SPEED	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_I2C2_SPEED	/;"	d
CONFIG_SYS_FSL_I2C3_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C3_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C3_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C3_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C3_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C3_OFFSET /;"	d
CONFIG_SYS_FSL_I2C3_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C3_OFFSET /;"	d
CONFIG_SYS_FSL_I2C3_OFFSET	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C3_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C3_SLAVE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C3_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C3_SLAVE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C3_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C3_SLAVE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C3_SLAVE /;"	d
CONFIG_SYS_FSL_I2C3_SLAVE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C3_SLAVE /;"	d
CONFIG_SYS_FSL_I2C3_SLAVE	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C3_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C3_SPEED	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C3_SPEED	/;"	d
CONFIG_SYS_FSL_I2C3_SPEED	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C3_SPEED	/;"	d
CONFIG_SYS_FSL_I2C3_SPEED	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C3_SPEED /;"	d
CONFIG_SYS_FSL_I2C3_SPEED	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C3_SPEED /;"	d
CONFIG_SYS_FSL_I2C3_SPEED	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C3_SPEED	/;"	d
CONFIG_SYS_FSL_I2C4_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C4_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C4_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C4_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C4_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C4_OFFSET /;"	d
CONFIG_SYS_FSL_I2C4_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C4_OFFSET /;"	d
CONFIG_SYS_FSL_I2C4_OFFSET	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C4_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C4_SLAVE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C4_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C4_SLAVE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C4_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C4_SLAVE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C4_SLAVE /;"	d
CONFIG_SYS_FSL_I2C4_SLAVE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C4_SLAVE /;"	d
CONFIG_SYS_FSL_I2C4_SLAVE	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C4_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C4_SPEED	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C4_SPEED	/;"	d
CONFIG_SYS_FSL_I2C4_SPEED	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C4_SPEED	/;"	d
CONFIG_SYS_FSL_I2C4_SPEED	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C4_SPEED /;"	d
CONFIG_SYS_FSL_I2C4_SPEED	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C4_SPEED /;"	d
CONFIG_SYS_FSL_I2C4_SPEED	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C4_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M52277EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5235EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M53017EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5329EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5373EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M54451EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5475EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/M5485EVB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET /;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET /;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/TQM834x.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/hrcon.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/ids8313.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/sbc8349.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/sbc8548.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/strider.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/t4qds.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/vme8349.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_OFFSET	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_I2C_OFFSET	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE /;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE /;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/TQM834x.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/hrcon.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/ids8313.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/sbc8349.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/sbc8548.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/strider.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/t4qds.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/vme8349.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SLAVE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_I2C_SLAVE	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M52277EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5235EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5275EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M53017EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5329EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5373EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M54451EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M54455EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5475EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/M5485EVB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/P1010RDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/P1022DS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/P1023RDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED /;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED /;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/TQM834x.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/UCP1020.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/controlcenterd.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/hrcon.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/ids8313.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/p1_twr.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/sbc8349.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/sbc8548.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/sbc8641d.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/socrates.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/strider.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/vme8349.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/xpedite517x.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/xpedite520x.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/xpedite537x.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_I2C_SPEED	include/configs/xpedite550x.h	/^#define CONFIG_SYS_FSL_I2C_SPEED	/;"	d
CONFIG_SYS_FSL_IFC_BANK_COUNT	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_IFC_BANK_COUNT$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_IFC_BANK_COUNT	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_IFC_BANK_COUNT$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_IFC_BANK_COUNT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_IFC_BANK_COUNT	/;"	d
CONFIG_SYS_FSL_IFC_BANK_COUNT	drivers/mtd/nand/fsl_ifc_nand.c	/^#define CONFIG_SYS_FSL_IFC_BANK_COUNT	/;"	d	file:
CONFIG_SYS_FSL_IFC_BANK_COUNT_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_IFC_BANK_COUNT$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_IFC_BANK_COUNT_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_IFC_BANK_COUNT$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_IFC_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_BASE	/;"	d
CONFIG_SYS_FSL_IFC_BASE1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_BASE1	/;"	d
CONFIG_SYS_FSL_IFC_BASE2	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_BASE2	/;"	d
CONFIG_SYS_FSL_IFC_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_IFC_BE$/;"	d
CONFIG_SYS_FSL_IFC_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_IFC_BE$/;"	d
CONFIG_SYS_FSL_IFC_BE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_IFC_BE$/;"	d
CONFIG_SYS_FSL_IFC_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_IFC_LE$/;"	d
CONFIG_SYS_FSL_IFC_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_SIZE	/;"	d
CONFIG_SYS_FSL_IFC_SIZE1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_SIZE1	/;"	d
CONFIG_SYS_FSL_IFC_SIZE1_1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_SIZE1_1	/;"	d
CONFIG_SYS_FSL_IFC_SIZE2	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_IFC_SIZE2	/;"	d
CONFIG_SYS_FSL_ISBC_VER	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_ISBC_VER	/;"	d
CONFIG_SYS_FSL_JR0_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_JR0_ADDR /;"	d
CONFIG_SYS_FSL_JR0_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_JR0_ADDR /;"	d
CONFIG_SYS_FSL_JR0_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_JR0_ADDR	/;"	d
CONFIG_SYS_FSL_JR0_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CONFIG_SYS_FSL_JR0_ADDR /;"	d
CONFIG_SYS_FSL_JR0_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CONFIG_SYS_FSL_JR0_ADDR /;"	d
CONFIG_SYS_FSL_JR0_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_JR0_ADDR /;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET	/;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET	/;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET	/;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET /;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET /;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET	/;"	d
CONFIG_SYS_FSL_JR0_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_JR0_OFFSET /;"	d
CONFIG_SYS_FSL_LS1_CLK_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_LS1_CLK_ADDR	/;"	d
CONFIG_SYS_FSL_LSCH3_SERDES_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_LSCH3_SERDES_ADDR	/;"	d
CONFIG_SYS_FSL_MAX_NUM_OF_SEC	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	/;"	d
CONFIG_SYS_FSL_MAX_NUM_OF_SEC	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	/;"	d
CONFIG_SYS_FSL_MAX_NUM_OF_SEC	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	/;"	d
CONFIG_SYS_FSL_MAX_NUM_OF_SEC	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC /;"	d
CONFIG_SYS_FSL_MAX_NUM_OF_SEC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	/;"	d
CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	/;"	d
CONFIG_SYS_FSL_MC_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_MC_BASE	/;"	d
CONFIG_SYS_FSL_MC_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_MC_SIZE	/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33$/;"	d
CONFIG_SYS_FSL_MMDC	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_MMDC$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_MMDC_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_MMDC$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_NI_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_NI_BASE	/;"	d
CONFIG_SYS_FSL_NI_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_NI_SIZE	/;"	d
CONFIG_SYS_FSL_NUM_CC_PLL	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_NUM_CC_PLL	/;"	d
CONFIG_SYS_FSL_NUM_CC_PLLS	arch/arm/cpu/armv7/ls102xa/clock.c	/^#define CONFIG_SYS_FSL_NUM_CC_PLLS /;"	d	file:
CONFIG_SYS_FSL_NUM_CC_PLLS	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^#define CONFIG_SYS_FSL_NUM_CC_PLLS /;"	d	file:
CONFIG_SYS_FSL_NUM_CC_PLLS	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c	/^#define CONFIG_SYS_FSL_NUM_CC_PLLS	/;"	d	file:
CONFIG_SYS_FSL_NUM_CC_PLLS	arch/powerpc/cpu/mpc85xx/speed.c	/^#define CONFIG_SYS_FSL_NUM_CC_PLLS	/;"	d	file:
CONFIG_SYS_FSL_NUM_CC_PLLS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_NUM_CC_PLLS	/;"	d
CONFIG_SYS_FSL_NUM_LAWS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_NUM_LAWS	/;"	d
CONFIG_SYS_FSL_NUM_LAWS	arch/powerpc/include/asm/config_mpc86xx.h	/^#define CONFIG_SYS_FSL_NUM_LAWS	/;"	d
CONFIG_SYS_FSL_OCRAM_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_OCRAM_BASE	/;"	d
CONFIG_SYS_FSL_OCRAM_SIZE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_OCRAM_SIZE	/;"	d
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS$/;"	d
CONFIG_SYS_FSL_PAMU_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_PAMU_OFFSET	/;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_PBL_PBI	/;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FSL_PBL_PBI	/;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FSL_PBL_PBI	/;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_PBI	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_FSL_PBL_PBI /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/B4860QDS.h	/^#define CONFIG_SYS_FSL_PBL_RCW	/;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/P2041RDB.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T102xQDS.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T102xRDB.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T1040QDS.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T104xRDB.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T208xQDS.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T208xRDB.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T4240QDS.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/T4240RDB.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/corenet_ds.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_FSL_PBL_RCW	/;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_FSL_PBL_RCW	/;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PBL_RCW	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_FSL_PBL_RCW /;"	d
CONFIG_SYS_FSL_PCIE_COMPAT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_PCIE_COMPAT	/;"	d
CONFIG_SYS_FSL_PCI_VER_3_X	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_PCI_VER_3_X$/;"	d
CONFIG_SYS_FSL_PEBUF_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_PEBUF_BASE	/;"	d
CONFIG_SYS_FSL_PEBUF_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_PEBUF_SIZE	/;"	d
CONFIG_SYS_FSL_PEX_LUT_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_PEX_LUT_BE$/;"	d
CONFIG_SYS_FSL_PEX_LUT_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_PEX_LUT_LE$/;"	d
CONFIG_SYS_FSL_PMIC_I2C_ADDR	include/configs/mx25pdk.h	/^#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	/;"	d
CONFIG_SYS_FSL_PMIC_I2C_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	/;"	d
CONFIG_SYS_FSL_PMIC_I2C_ADDR	include/configs/mx53evk.h	/^#define CONFIG_SYS_FSL_PMIC_I2C_ADDR /;"	d
CONFIG_SYS_FSL_PMIC_I2C_ADDR	include/configs/mx53loco.h	/^#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	/;"	d
CONFIG_SYS_FSL_PMIC_I2C_ADDR	include/configs/woodburn_common.h	/^#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	/;"	d
CONFIG_SYS_FSL_PMU_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_PMU_ADDR	/;"	d
CONFIG_SYS_FSL_PMU_CLTBENR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_PMU_CLTBENR	/;"	d
CONFIG_SYS_FSL_QBMAN_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QBMAN_BASE	/;"	d
CONFIG_SYS_FSL_QBMAN_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QBMAN_SIZE	/;"	d
CONFIG_SYS_FSL_QBMAN_SIZE_1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QBMAN_SIZE_1	/;"	d
CONFIG_SYS_FSL_QMAN_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_QMAN_ADDR /;"	d
CONFIG_SYS_FSL_QMAN_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_QMAN_OFFSET	/;"	d
CONFIG_SYS_FSL_QMAN_V3	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_QMAN_V3	/;"	d
CONFIG_SYS_FSL_QMAN_V3	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_QMAN_V3$/;"	d
CONFIG_SYS_FSL_QORIQ_CHASSIS1	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_QORIQ_CHASSIS1$/;"	d
CONFIG_SYS_FSL_QORIQ_CHASSIS2	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/;"	d
CONFIG_SYS_FSL_QORIQ_CHASSIS2	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /;"	d
CONFIG_SYS_FSL_QSPI_AHB	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_FSL_QSPI_AHB$/;"	d
CONFIG_SYS_FSL_QSPI_AHB	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_FSL_QSPI_AHB$/;"	d
CONFIG_SYS_FSL_QSPI_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QSPI_BASE	/;"	d
CONFIG_SYS_FSL_QSPI_BASE1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QSPI_BASE1	/;"	d
CONFIG_SYS_FSL_QSPI_BASE2	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QSPI_BASE2	/;"	d
CONFIG_SYS_FSL_QSPI_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_QSPI_BE$/;"	d
CONFIG_SYS_FSL_QSPI_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_QSPI_BE$/;"	d
CONFIG_SYS_FSL_QSPI_LE	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_FSL_QSPI_LE$/;"	d
CONFIG_SYS_FSL_QSPI_LE	include/configs/pcm052.h	/^#define CONFIG_SYS_FSL_QSPI_LE$/;"	d
CONFIG_SYS_FSL_QSPI_LE	include/configs/vf610twr.h	/^#define CONFIG_SYS_FSL_QSPI_LE$/;"	d
CONFIG_SYS_FSL_QSPI_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QSPI_SIZE	/;"	d
CONFIG_SYS_FSL_QSPI_SIZE1	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QSPI_SIZE1	/;"	d
CONFIG_SYS_FSL_QSPI_SIZE2	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_QSPI_SIZE2	/;"	d
CONFIG_SYS_FSL_RAID_ENGINE	include/configs/P5020DS.h	/^#define CONFIG_SYS_FSL_RAID_ENGINE$/;"	d
CONFIG_SYS_FSL_RAID_ENGINE	include/configs/P5040DS.h	/^#define CONFIG_SYS_FSL_RAID_ENGINE$/;"	d
CONFIG_SYS_FSL_RAID_ENGINE	include/configs/cyrus.h	/^#define CONFIG_SYS_FSL_RAID_ENGINE$/;"	d
CONFIG_SYS_FSL_RAID_ENGINE_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_RAID_ENGINE_ADDR /;"	d
CONFIG_SYS_FSL_RAID_ENGINE_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_RAID_ENGINE_OFFSET	/;"	d
CONFIG_SYS_FSL_RCPM_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_RCPM_ADDR	/;"	d
CONFIG_SYS_FSL_RMU	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_RMU$/;"	d
CONFIG_SYS_FSL_RST_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_RST_ADDR	/;"	d
CONFIG_SYS_FSL_RST_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_RST_ADDR	/;"	d
CONFIG_SYS_FSL_SCFG_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_SCFG_ADDR	/;"	d
CONFIG_SYS_FSL_SCFG_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SCFG_ADDR	/;"	d
CONFIG_SYS_FSL_SCFG_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SCFG_ADDR	/;"	d
CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR /;"	d
CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET	/;"	d
CONFIG_SYS_FSL_SCFG_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SCFG_OFFSET	/;"	d
CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET	/;"	d
CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR	/;"	d
CONFIG_SYS_FSL_SEC_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_SEC_ADDR /;"	d
CONFIG_SYS_FSL_SEC_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_SEC_ADDR /;"	d
CONFIG_SYS_FSL_SEC_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SEC_ADDR	/;"	d
CONFIG_SYS_FSL_SEC_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CONFIG_SYS_FSL_SEC_ADDR /;"	d
CONFIG_SYS_FSL_SEC_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CONFIG_SYS_FSL_SEC_ADDR /;"	d
CONFIG_SYS_FSL_SEC_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SEC_ADDR /;"	d
CONFIG_SYS_FSL_SEC_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SEC_BE$/;"	d
CONFIG_SYS_FSL_SEC_BE	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_FSL_SEC_BE$/;"	d
CONFIG_SYS_FSL_SEC_BE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SEC_BE$/;"	d
CONFIG_SYS_FSL_SEC_COMPAT	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SEC_COMPAT	/;"	d
CONFIG_SYS_FSL_SEC_COMPAT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SEC_COMPAT	/;"	d
CONFIG_SYS_FSL_SEC_COMPAT	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_FSL_SEC_COMPAT	/;"	d
CONFIG_SYS_FSL_SEC_COMPAT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SEC_COMPAT	/;"	d
CONFIG_SYS_FSL_SEC_COMPAT	include/configs/mx6_common.h	/^#define CONFIG_SYS_FSL_SEC_COMPAT	/;"	d
CONFIG_SYS_FSL_SEC_COMPAT	include/configs/mx7_common.h	/^#define CONFIG_SYS_FSL_SEC_COMPAT	/;"	d
CONFIG_SYS_FSL_SEC_IDX_OFFSET	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SEC_IDX_OFFSET	/;"	d
CONFIG_SYS_FSL_SEC_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SEC_LE$/;"	d
CONFIG_SYS_FSL_SEC_LE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SEC_LE$/;"	d
CONFIG_SYS_FSL_SEC_LE	include/configs/mx6_common.h	/^#define CONFIG_SYS_FSL_SEC_LE$/;"	d
CONFIG_SYS_FSL_SEC_LE	include/configs/mx7_common.h	/^#define CONFIG_SYS_FSL_SEC_LE$/;"	d
CONFIG_SYS_FSL_SEC_MON_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SEC_MON_BE$/;"	d
CONFIG_SYS_FSL_SEC_MON_BE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SEC_MON_BE$/;"	d
CONFIG_SYS_FSL_SEC_MON_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SEC_MON_LE$/;"	d
CONFIG_SYS_FSL_SEC_MON_LE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SEC_MON_LE$/;"	d
CONFIG_SYS_FSL_SEC_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_SEC_OFFSET	/;"	d
CONFIG_SYS_FSL_SEC_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_SEC_OFFSET	/;"	d
CONFIG_SYS_FSL_SEC_OFFSET	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SEC_OFFSET	/;"	d
CONFIG_SYS_FSL_SEC_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CONFIG_SYS_FSL_SEC_OFFSET /;"	d
CONFIG_SYS_FSL_SEC_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CONFIG_SYS_FSL_SEC_OFFSET /;"	d
CONFIG_SYS_FSL_SEC_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SEC_OFFSET	/;"	d
CONFIG_SYS_FSL_SERDES_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_SERDES_ADDR	/;"	d
CONFIG_SYS_FSL_SERDES_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SERDES_ADDR	/;"	d
CONFIG_SYS_FSL_SFP_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SFP_BE$/;"	d
CONFIG_SYS_FSL_SFP_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SFP_BE$/;"	d
CONFIG_SYS_FSL_SFP_BE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SFP_BE$/;"	d
CONFIG_SYS_FSL_SFP_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SFP_LE$/;"	d
CONFIG_SYS_FSL_SFP_VER_3_0	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SFP_VER_3_0$/;"	d
CONFIG_SYS_FSL_SFP_VER_3_2	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SFP_VER_3_2$/;"	d
CONFIG_SYS_FSL_SFP_VER_3_2	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SFP_VER_3_2$/;"	d
CONFIG_SYS_FSL_SFP_VER_3_4	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SFP_VER_3_4$/;"	d
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK$/;"	d
CONFIG_SYS_FSL_SNVS_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SNVS_LE$/;"	d
CONFIG_SYS_FSL_SRDS_1	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_SRDS_1$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_SRDS_1	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_SRDS_1$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_SRDS_1	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRDS_1$/;"	d
CONFIG_SYS_FSL_SRDS_1_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_SRDS_1$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_SRDS_1_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_SRDS_1$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_SRDS_2	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_SRDS_2$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_SRDS_2	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_SRDS_2$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_SRDS_2	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRDS_2$/;"	d
CONFIG_SYS_FSL_SRDS_2_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_SRDS_2$/;"	c	menu:LS102xA architecture
CONFIG_SYS_FSL_SRDS_2_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_SRDS_2$/;"	c	menu:Layerscape architecture
CONFIG_SYS_FSL_SRDS_3	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRDS_3$/;"	d
CONFIG_SYS_FSL_SRDS_4	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRDS_4$/;"	d
CONFIG_SYS_FSL_SRDS_NUM_PLLS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRDS_NUM_PLLS	/;"	d
CONFIG_SYS_FSL_SRIO_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SRIO_ADDR /;"	d
CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	/;"	d
CONFIG_SYS_FSL_SRIO_LIODN	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRIO_LIODN$/;"	d
CONFIG_SYS_FSL_SRIO_MAX_PORTS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRIO_MAX_PORTS	/;"	d
CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	/;"	d
CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	/;"	d
CONFIG_SYS_FSL_SRIO_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_FSL_SRIO_OFFSET	/;"	d
CONFIG_SYS_FSL_SRK_LE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_SRK_LE$/;"	d
CONFIG_SYS_FSL_SRK_LE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_SRK_LE$/;"	d
CONFIG_SYS_FSL_TBCLK_DIV	arch/powerpc/cpu/mpc85xx/cpu.c	/^#define CONFIG_SYS_FSL_TBCLK_DIV /;"	d	file:
CONFIG_SYS_FSL_TBCLK_DIV	arch/powerpc/cpu/mpc85xx/spl_minimal.c	/^#define CONFIG_SYS_FSL_TBCLK_DIV /;"	d	file:
CONFIG_SYS_FSL_TBCLK_DIV	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_TBCLK_DIV	/;"	d
CONFIG_SYS_FSL_THREADS_PER_CORE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_THREADS_PER_CORE /;"	d
CONFIG_SYS_FSL_TIMER_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_FSL_TIMER_ADDR	/;"	d
CONFIG_SYS_FSL_TIMER_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_TIMER_ADDR	/;"	d
CONFIG_SYS_FSL_USB1_ADDR	include/usb/ehci-ci.h	/^#define CONFIG_SYS_FSL_USB1_ADDR /;"	d
CONFIG_SYS_FSL_USB1_PHY_ENABLE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_USB1_PHY_ENABLE$/;"	d
CONFIG_SYS_FSL_USB2_ADDR	include/usb/ehci-ci.h	/^#define CONFIG_SYS_FSL_USB2_ADDR	/;"	d
CONFIG_SYS_FSL_USB2_ADDR	include/usb/ehci-ci.h	/^#define CONFIG_SYS_FSL_USB2_ADDR /;"	d
CONFIG_SYS_FSL_USB2_PHY_ENABLE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_USB2_PHY_ENABLE$/;"	d
CONFIG_SYS_FSL_USB_CTRL_PHY_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN /;"	d
CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN /;"	d
CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE$/;"	d
CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE /;"	d
CONFIG_SYS_FSL_USB_HS_DISCNCT_INC	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_HS_DISCNCT_INC /;"	d
CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN /;"	d
CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY$/;"	d
CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_MFI	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV /;"	d
CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK /;"	d
CONFIG_SYS_FSL_USB_PWRFLT_CR_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN /;"	d
CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL /;"	d
CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK /;"	d
CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 /;"	d
CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 /;"	d
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 /;"	d
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 /;"	d
CONFIG_SYS_FSL_USB_SYS_CLK_VALID	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_SYS_CLK_VALID /;"	d
CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN /;"	d
CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK	include/fsl_usb.h	/^#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK /;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_FSL_USDHC_NUM /;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/cm_fx6.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/el6x_common.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/gw_ventana.h	/^#define CONFIG_SYS_FSL_USDHC_NUM /;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6slevk.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_FSL_USDHC_NUM /;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/novena.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/ot1200.h	/^#define CONFIG_SYS_FSL_USDHC_NUM /;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/pcm058.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/platinum.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_FSL_USDHC_NUM /;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/tbs2910.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/titanium.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/wandboard.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_USDHC_NUM	include/configs/warp7.h	/^#define CONFIG_SYS_FSL_USDHC_NUM	/;"	d
CONFIG_SYS_FSL_WDOG_BE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_FSL_WDOG_BE$/;"	d
CONFIG_SYS_FSL_WDOG_BE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_FSL_WDOG_BE$/;"	d
CONFIG_SYS_FSL_WRIOP1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_WRIOP1_ADDR	/;"	d
CONFIG_SYS_FSL_WRIOP1_BASE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_WRIOP1_BASE	/;"	d
CONFIG_SYS_FSL_WRIOP1_MDIO1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_WRIOP1_MDIO1	/;"	d
CONFIG_SYS_FSL_WRIOP1_MDIO2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_FSL_WRIOP1_MDIO2	/;"	d
CONFIG_SYS_FSL_WRIOP1_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_FSL_WRIOP1_SIZE	/;"	d
CONFIG_SYS_FSL_XHCI_USB1_ADDR	include/linux/usb/xhci-fsl.h	/^#define CONFIG_SYS_FSL_XHCI_USB1_ADDR /;"	d
CONFIG_SYS_FSL_XHCI_USB2_ADDR	include/linux/usb/xhci-fsl.h	/^#define CONFIG_SYS_FSL_XHCI_USB2_ADDR /;"	d
CONFIG_SYS_FSL_XHCI_USB3_ADDR	include/linux/usb/xhci-fsl.h	/^#define CONFIG_SYS_FSL_XHCI_USB3_ADDR /;"	d
CONFIG_SYS_FSMC_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_FSMC_BASE	/;"	d
CONFIG_SYS_FSMC_NAND_8BIT	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FSMC_NAND_8BIT$/;"	d
CONFIG_SYS_FSMC_NAND_8BIT	include/configs/spear6xx_evb.h	/^#define CONFIG_SYS_FSMC_NAND_8BIT$/;"	d
CONFIG_SYS_FSMC_NAND_8BIT	include/configs/x600.h	/^#define CONFIG_SYS_FSMC_NAND_8BIT$/;"	d
CONFIG_SYS_FSMC_NAND_SP	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_FSMC_NAND_SP$/;"	d
CONFIG_SYS_FSMC_NAND_SP	include/configs/spear6xx_evb.h	/^#define CONFIG_SYS_FSMC_NAND_SP$/;"	d
CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 /;"	d
CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE	/;"	d
CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS	/;"	d
CONFIG_SYS_FTPMU010_SDRAMHTC	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTPMU010_SDRAMHTC	/;"	d
CONFIG_SYS_FTSDMC021_BANK0_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_BANK0_BASE	/;"	d
CONFIG_SYS_FTSDMC021_BANK0_BSR	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_BANK0_BSR	/;"	d
CONFIG_SYS_FTSDMC021_BANK1_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_BANK1_BASE	/;"	d
CONFIG_SYS_FTSDMC021_BANK1_BSR	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_BANK1_BSR	/;"	d
CONFIG_SYS_FTSDMC021_CR1	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_CR1	/;"	d
CONFIG_SYS_FTSDMC021_CR2	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_CR2	/;"	d
CONFIG_SYS_FTSDMC021_TP1	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_TP1	/;"	d
CONFIG_SYS_FTSDMC021_TP2	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSDMC021_TP2	/;"	d
CONFIG_SYS_FTSMC020_CONFIGS	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_FTSMC020_CONFIGS	/;"	d
CONFIG_SYS_FULL_VA	include/configs/s32v234evb.h	/^#define CONFIG_SYS_FULL_VA$/;"	d
CONFIG_SYS_GAFR0_L_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR0_L_VAL	/;"	d
CONFIG_SYS_GAFR0_L_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GAFR0_L_VAL	/;"	d
CONFIG_SYS_GAFR0_L_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR0_L_VAL	/;"	d
CONFIG_SYS_GAFR0_U_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR0_U_VAL	/;"	d
CONFIG_SYS_GAFR0_U_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GAFR0_U_VAL	/;"	d
CONFIG_SYS_GAFR0_U_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR0_U_VAL	/;"	d
CONFIG_SYS_GAFR1_L_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR1_L_VAL	/;"	d
CONFIG_SYS_GAFR1_L_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GAFR1_L_VAL	/;"	d
CONFIG_SYS_GAFR1_L_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR1_L_VAL	/;"	d
CONFIG_SYS_GAFR1_U_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR1_U_VAL	/;"	d
CONFIG_SYS_GAFR1_U_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GAFR1_U_VAL	/;"	d
CONFIG_SYS_GAFR1_U_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR1_U_VAL	/;"	d
CONFIG_SYS_GAFR2_L_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR2_L_VAL	/;"	d
CONFIG_SYS_GAFR2_L_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GAFR2_L_VAL	/;"	d
CONFIG_SYS_GAFR2_L_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR2_L_VAL	/;"	d
CONFIG_SYS_GAFR2_U_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR2_U_VAL	/;"	d
CONFIG_SYS_GAFR2_U_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GAFR2_U_VAL	/;"	d
CONFIG_SYS_GAFR2_U_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR2_U_VAL	/;"	d
CONFIG_SYS_GAFR3_L_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR3_L_VAL	/;"	d
CONFIG_SYS_GAFR3_L_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR3_L_VAL	/;"	d
CONFIG_SYS_GAFR3_U_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GAFR3_U_VAL	/;"	d
CONFIG_SYS_GAFR3_U_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GAFR3_U_VAL	/;"	d
CONFIG_SYS_GBIT_MII1_BUSNAME	include/configs/io64.h	/^#define CONFIG_SYS_GBIT_MII1_BUSNAME	/;"	d
CONFIG_SYS_GBIT_MII_BUSNAME	include/configs/io.h	/^#define CONFIG_SYS_GBIT_MII_BUSNAME	/;"	d
CONFIG_SYS_GBIT_MII_BUSNAME	include/configs/io64.h	/^#define CONFIG_SYS_GBIT_MII_BUSNAME	/;"	d
CONFIG_SYS_GBL_DATA_ADDR	arch/blackfin/cpu/cpu.c	/^# define CONFIG_SYS_GBL_DATA_ADDR /;"	d	file:
CONFIG_SYS_GBL_DATA_ADDR	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_GBL_DATA_ADDR	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M52277EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5235EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5249EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5272C3.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5275EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5282EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M53017EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5329EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5373EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M54418TWR.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M54451EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5475EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/M5485EVB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/P1010RDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/P1022DS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/P1023RDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/P2041RDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/PATI.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/PLU405.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/PMC440.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T102xQDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T102xRDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/T4240RDB.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM5200.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM823L.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM823M.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM834x.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM850L.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM850M.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM855L.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM855M.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM860L.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM860M.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM862L.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM862M.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/UCP1020.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/VOM405.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/a3m071.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/a4m072.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/ac14xx.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/acadia.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/amcore.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/aria.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/bamboo.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/bubinga.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/canmb.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/canyonlands.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/cm5200.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/cobra5272.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/controlcenterd.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/cyrus.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/dlvision.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/flea3.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/grsim.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/hrcon.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/icon.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/ids8313.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/inka4x0.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/integrator-common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/intip.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/io.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/io64.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/iocon.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/ipek01.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/jupiter.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/katmai.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/kilauea.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/km82xx.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/luan.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/lwmon5.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/makalu.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mecp5123.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/motionpro.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/munices.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mx31ads.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mx31pdk.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/mx35pdk.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/neo.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/p1_twr.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/pcm030.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/redwood.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/sbc8349.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/sbc8548.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/sbc8641d.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/sequoia.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/socrates.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/strider.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/t3corp.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/t4qds.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/v38b.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/ve8313.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/vexpress_common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/vme8349.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/walnut.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET /;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/woodburn_common.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/xpedite1000.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/xpedite517x.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/xpedite520x.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/xpedite537x.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/xpedite550x.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/yosemite.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_OFFSET	include/configs/yucca.h	/^#define CONFIG_SYS_GBL_DATA_OFFSET	/;"	d
CONFIG_SYS_GBL_DATA_SIZE	include/configs/edb93xx.h	/^#define CONFIG_SYS_GBL_DATA_SIZE	/;"	d
CONFIG_SYS_GBL_DATA_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_GBL_DATA_SIZE	/;"	d
CONFIG_SYS_GENERIC_GLOBAL_DATA	arch/avr32/include/asm/config.h	/^#define CONFIG_SYS_GENERIC_GLOBAL_DATA$/;"	d
CONFIG_SYS_GENERIC_GLOBAL_DATA	arch/sparc/include/asm/config.h	/^#define CONFIG_SYS_GENERIC_GLOBAL_DATA$/;"	d
CONFIG_SYS_GENERIC_GLOBAL_DATA	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_GENERIC_GLOBAL_DATA$/;"	d
CONFIG_SYS_GIC400_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_GIC400_ADDR	/;"	d
CONFIG_SYS_GLOBAL_SDRAM_LIMIT	include/configs/km82xx.h	/^#define CONFIG_SYS_GLOBAL_SDRAM_LIMIT	/;"	d
CONFIG_SYS_GP1DIR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_GP1DIR /;"	d
CONFIG_SYS_GP1ODR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_GP1ODR /;"	d
CONFIG_SYS_GP2DIR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_GP2DIR /;"	d
CONFIG_SYS_GP2ODR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_GP2ODR /;"	d
CONFIG_SYS_GPCR0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPCR0_VAL	/;"	d
CONFIG_SYS_GPCR0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPCR0_VAL	/;"	d
CONFIG_SYS_GPCR0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPCR0_VAL	/;"	d
CONFIG_SYS_GPCR1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPCR1_VAL	/;"	d
CONFIG_SYS_GPCR1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPCR1_VAL	/;"	d
CONFIG_SYS_GPCR1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPCR1_VAL	/;"	d
CONFIG_SYS_GPCR2_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPCR2_VAL	/;"	d
CONFIG_SYS_GPCR2_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPCR2_VAL	/;"	d
CONFIG_SYS_GPCR2_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPCR2_VAL	/;"	d
CONFIG_SYS_GPCR3_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPCR3_VAL	/;"	d
CONFIG_SYS_GPCR3_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPCR3_VAL	/;"	d
CONFIG_SYS_GPDR0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPDR0_VAL	/;"	d
CONFIG_SYS_GPDR0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPDR0_VAL	/;"	d
CONFIG_SYS_GPDR0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPDR0_VAL	/;"	d
CONFIG_SYS_GPDR1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPDR1_VAL	/;"	d
CONFIG_SYS_GPDR1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPDR1_VAL	/;"	d
CONFIG_SYS_GPDR1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPDR1_VAL	/;"	d
CONFIG_SYS_GPDR2_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPDR2_VAL	/;"	d
CONFIG_SYS_GPDR2_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPDR2_VAL	/;"	d
CONFIG_SYS_GPDR2_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPDR2_VAL	/;"	d
CONFIG_SYS_GPDR3_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPDR3_VAL	/;"	d
CONFIG_SYS_GPDR3_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPDR3_VAL	/;"	d
CONFIG_SYS_GPIO0_ISR1H	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_ISR1H	/;"	d
CONFIG_SYS_GPIO0_ISR1H	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_ISR1H	/;"	d
CONFIG_SYS_GPIO0_ISR1H	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_ISR1H	/;"	d
CONFIG_SYS_GPIO0_ISR1H	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_ISR1H /;"	d
CONFIG_SYS_GPIO0_ISR1L	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_ISR1L	/;"	d
CONFIG_SYS_GPIO0_ISR1L	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_ISR1L	/;"	d
CONFIG_SYS_GPIO0_ISR1L	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_ISR1L	/;"	d
CONFIG_SYS_GPIO0_ISR1L	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_ISR1L /;"	d
CONFIG_SYS_GPIO0_OSRH	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_OSRH	/;"	d
CONFIG_SYS_GPIO0_OSRH	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_OSRH	/;"	d
CONFIG_SYS_GPIO0_OSRH	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_OSRH	/;"	d
CONFIG_SYS_GPIO0_OSRH	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_OSRH /;"	d
CONFIG_SYS_GPIO0_OSRL	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_OSRL	/;"	d
CONFIG_SYS_GPIO0_OSRL	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_OSRL	/;"	d
CONFIG_SYS_GPIO0_OSRL	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_OSRL	/;"	d
CONFIG_SYS_GPIO0_OSRL	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_OSRL /;"	d
CONFIG_SYS_GPIO0_TCR	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_TCR	/;"	d
CONFIG_SYS_GPIO0_TCR	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_TCR	/;"	d
CONFIG_SYS_GPIO0_TCR	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_TCR	/;"	d
CONFIG_SYS_GPIO0_TCR	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_TCR /;"	d
CONFIG_SYS_GPIO0_TSRH	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_TSRH	/;"	d
CONFIG_SYS_GPIO0_TSRH	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_TSRH	/;"	d
CONFIG_SYS_GPIO0_TSRH	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_TSRH	/;"	d
CONFIG_SYS_GPIO0_TSRH	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_TSRH /;"	d
CONFIG_SYS_GPIO0_TSRL	include/configs/PLU405.h	/^#define CONFIG_SYS_GPIO0_TSRL	/;"	d
CONFIG_SYS_GPIO0_TSRL	include/configs/VOM405.h	/^#define CONFIG_SYS_GPIO0_TSRL	/;"	d
CONFIG_SYS_GPIO0_TSRL	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO0_TSRL	/;"	d
CONFIG_SYS_GPIO0_TSRL	include/configs/bubinga.h	/^#define CONFIG_SYS_GPIO0_TSRL /;"	d
CONFIG_SYS_GPIO1_DAT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_GPIO1_DAT	/;"	d
CONFIG_SYS_GPIO1_DAT	include/configs/ids8313.h	/^#define CONFIG_SYS_GPIO1_DAT	/;"	d
CONFIG_SYS_GPIO1_DAT	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_GPIO1_DAT /;"	d
CONFIG_SYS_GPIO1_DAT	include/configs/vme8349.h	/^#define CONFIG_SYS_GPIO1_DAT	/;"	d
CONFIG_SYS_GPIO1_DIR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_GPIO1_DIR	/;"	d
CONFIG_SYS_GPIO1_DIR	include/configs/ids8313.h	/^#define CONFIG_SYS_GPIO1_DIR	/;"	d
CONFIG_SYS_GPIO1_DIR	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_GPIO1_DIR /;"	d
CONFIG_SYS_GPIO1_DIR	include/configs/vme8349.h	/^#define CONFIG_SYS_GPIO1_DIR	/;"	d
CONFIG_SYS_GPIO1_EN	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_GPIO1_EN	/;"	d
CONFIG_SYS_GPIO1_EN	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO1_EN	/;"	d
CONFIG_SYS_GPIO1_EN	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO1_EN	/;"	d
CONFIG_SYS_GPIO1_FUNC	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_GPIO1_FUNC	/;"	d
CONFIG_SYS_GPIO1_FUNC	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO1_FUNC	/;"	d
CONFIG_SYS_GPIO1_FUNC	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO1_FUNC	/;"	d
CONFIG_SYS_GPIO1_ISR1H	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_ISR1H	/;"	d
CONFIG_SYS_GPIO1_ISR1L	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_ISR1L	/;"	d
CONFIG_SYS_GPIO1_LED	include/configs/M5249EVB.h	/^#define CONFIG_SYS_GPIO1_LED	/;"	d
CONFIG_SYS_GPIO1_LED	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO1_LED	/;"	d
CONFIG_SYS_GPIO1_LED	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO1_LED	/;"	d
CONFIG_SYS_GPIO1_OSRH	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_OSRH	/;"	d
CONFIG_SYS_GPIO1_OSRL	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_OSRL	/;"	d
CONFIG_SYS_GPIO1_OUT	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_GPIO1_OUT	/;"	d
CONFIG_SYS_GPIO1_OUT	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO1_OUT	/;"	d
CONFIG_SYS_GPIO1_OUT	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO1_OUT	/;"	d
CONFIG_SYS_GPIO1_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_GPIO1_PRELIM$/;"	d
CONFIG_SYS_GPIO1_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_GPIO1_PRELIM$/;"	d
CONFIG_SYS_GPIO1_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_GPIO1_PRELIM$/;"	d
CONFIG_SYS_GPIO1_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_GPIO1_PRELIM$/;"	d
CONFIG_SYS_GPIO1_TCR	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_TCR	/;"	d
CONFIG_SYS_GPIO1_TSRH	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_TSRH	/;"	d
CONFIG_SYS_GPIO1_TSRL	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO1_TSRL	/;"	d
CONFIG_SYS_GPIO2_DAT	include/configs/vme8349.h	/^#define CONFIG_SYS_GPIO2_DAT	/;"	d
CONFIG_SYS_GPIO2_DIR	include/configs/vme8349.h	/^#define CONFIG_SYS_GPIO2_DIR	/;"	d
CONFIG_SYS_GPIO2_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_GPIO2_PRELIM$/;"	d
CONFIG_SYS_GPIO_0_ADDR	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_GPIO_0_ADDR	/;"	d
CONFIG_SYS_GPIO_BASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_GPIO_BASE	/;"	d
CONFIG_SYS_GPIO_BOARD_RESET	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_BOARD_RESET	/;"	d
CONFIG_SYS_GPIO_CAN_ENABLE	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_CAN_ENABLE	/;"	d
CONFIG_SYS_GPIO_CRAM_ADV	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO_CRAM_ADV	/;"	d
CONFIG_SYS_GPIO_CRAM_CLK	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO_CRAM_CLK	/;"	d
CONFIG_SYS_GPIO_CRAM_CRE	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO_CRAM_CRE	/;"	d
CONFIG_SYS_GPIO_CRAM_WAIT	include/configs/acadia.h	/^#define CONFIG_SYS_GPIO_CRAM_WAIT	/;"	d
CONFIG_SYS_GPIO_DATADIR	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_GPIO_DATADIR	/;"	d
CONFIG_SYS_GPIO_DATAVALUE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_GPIO_DATAVALUE	/;"	d
CONFIG_SYS_GPIO_DSPIC_READY	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_DSPIC_READY	/;"	d
CONFIG_SYS_GPIO_EEPROM_EXT_WP	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_EEPROM_EXT_WP	/;"	d
CONFIG_SYS_GPIO_EEPROM_INT_WP	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_EEPROM_INT_WP	/;"	d
CONFIG_SYS_GPIO_EEPROM_WP	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_EEPROM_WP	/;"	d
CONFIG_SYS_GPIO_EN	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_GPIO_EN	/;"	d
CONFIG_SYS_GPIO_EN	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO_EN	/;"	d
CONFIG_SYS_GPIO_EN	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO_EN	/;"	d
CONFIG_SYS_GPIO_ENABLE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_GPIO_ENABLE	/;"	d
CONFIG_SYS_GPIO_EREADY	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_EREADY	/;"	d
CONFIG_SYS_GPIO_FLASH_WP	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_FLASH_WP	/;"	d
CONFIG_SYS_GPIO_FUNC	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_GPIO_FUNC	/;"	d
CONFIG_SYS_GPIO_FUNC	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO_FUNC	/;"	d
CONFIG_SYS_GPIO_FUNC	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO_FUNC	/;"	d
CONFIG_SYS_GPIO_HIGHSIDE	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_HIGHSIDE	/;"	d
CONFIG_SYS_GPIO_HWREV_MASK	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_HWREV_MASK	/;"	d
CONFIG_SYS_GPIO_HWREV_SHIFT	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_HWREV_SHIFT	/;"	d
CONFIG_SYS_GPIO_I2C_SCL	include/configs/vct.h	/^#define CONFIG_SYS_GPIO_I2C_SCL	/;"	d
CONFIG_SYS_GPIO_I2C_SDA	include/configs/vct.h	/^#define CONFIG_SYS_GPIO_I2C_SDA	/;"	d
CONFIG_SYS_GPIO_LEDA_N	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_LEDA_N	/;"	d
CONFIG_SYS_GPIO_LEDB_N	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_LEDB_N	/;"	d
CONFIG_SYS_GPIO_LEDRUN_N	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_LEDRUN_N	/;"	d
CONFIG_SYS_GPIO_LIME_RST	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_LIME_RST	/;"	d
CONFIG_SYS_GPIO_LIME_S	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_LIME_S	/;"	d
CONFIG_SYS_GPIO_LSB_ENABLE	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_LSB_ENABLE	/;"	d
CONFIG_SYS_GPIO_M66EN	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_M66EN	/;"	d
CONFIG_SYS_GPIO_MONARCH_N	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_MONARCH_N	/;"	d
CONFIG_SYS_GPIO_ODR	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_ODR	/;"	d
CONFIG_SYS_GPIO_ODR	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_ODR	/;"	d
CONFIG_SYS_GPIO_OPENDRAIN	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_GPIO_OPENDRAIN	/;"	d
CONFIG_SYS_GPIO_OR	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_OR	/;"	d
CONFIG_SYS_GPIO_OR	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_OR	/;"	d
CONFIG_SYS_GPIO_OUT	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_GPIO_OUT	/;"	d
CONFIG_SYS_GPIO_OUT	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_GPIO_OUT	/;"	d
CONFIG_SYS_GPIO_OUT	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_GPIO_OUT	/;"	d
CONFIG_SYS_GPIO_PCIE_CLKREQ	include/configs/makalu.h	/^#define CONFIG_SYS_GPIO_PCIE_CLKREQ	/;"	d
CONFIG_SYS_GPIO_PCIE_PRESENT0	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_PCIE_PRESENT0	/;"	d
CONFIG_SYS_GPIO_PCIE_PRESENT0	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_PCIE_PRESENT0	/;"	d
CONFIG_SYS_GPIO_PCIE_PRESENT1	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_PCIE_PRESENT1	/;"	d
CONFIG_SYS_GPIO_PCIE_PRESENT1	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_PCIE_PRESENT1	/;"	d
CONFIG_SYS_GPIO_PCIE_PRESENT2	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_PCIE_PRESENT2	/;"	d
CONFIG_SYS_GPIO_PCIE_PRESENT2	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_PCIE_PRESENT2	/;"	d
CONFIG_SYS_GPIO_PCIE_RST	include/configs/makalu.h	/^#define CONFIG_SYS_GPIO_PCIE_RST	/;"	d
CONFIG_SYS_GPIO_PCIE_WAKE	include/configs/makalu.h	/^#define CONFIG_SYS_GPIO_PCIE_WAKE	/;"	d
CONFIG_SYS_GPIO_PERM_VOLT_FEED	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_PERM_VOLT_FEED	/;"	d
CONFIG_SYS_GPIO_PHY0_RST	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_PHY0_RST	/;"	d
CONFIG_SYS_GPIO_PHY1_RST	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_PHY1_RST	/;"	d
CONFIG_SYS_GPIO_PHY_RST	include/configs/gplugd.h	/^#define CONFIG_SYS_GPIO_PHY_RST	/;"	d
CONFIG_SYS_GPIO_RS232_FORCEOFF	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_RS232_FORCEOFF	/;"	d
CONFIG_SYS_GPIO_RS232_FORCEOFF	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_RS232_FORCEOFF	/;"	d
CONFIG_SYS_GPIO_SELFRST_N	include/configs/PMC405DE.h	/^#define CONFIG_SYS_GPIO_SELFRST_N	/;"	d
CONFIG_SYS_GPIO_STARTUP_FINISHED	include/configs/io64.h	/^#define CONFIG_SYS_GPIO_STARTUP_FINISHED	/;"	d
CONFIG_SYS_GPIO_STARTUP_FINISHED_N	include/configs/io64.h	/^#define CONFIG_SYS_GPIO_STARTUP_FINISHED_N	/;"	d
CONFIG_SYS_GPIO_SYSMON_STATUS	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_SYSMON_STATUS	/;"	d
CONFIG_SYS_GPIO_TCR	include/configs/icon.h	/^#define CONFIG_SYS_GPIO_TCR	/;"	d
CONFIG_SYS_GPIO_TCR	include/configs/katmai.h	/^#define CONFIG_SYS_GPIO_TCR	/;"	d
CONFIG_SYS_GPIO_WATCHDOG	include/configs/lwmon5.h	/^#define CONFIG_SYS_GPIO_WATCHDOG	/;"	d
CONFIG_SYS_GPR1	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_GPR1 /;"	d
CONFIG_SYS_GPSR0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPSR0_VAL	/;"	d
CONFIG_SYS_GPSR0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPSR0_VAL	/;"	d
CONFIG_SYS_GPSR0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPSR0_VAL	/;"	d
CONFIG_SYS_GPSR1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPSR1_VAL	/;"	d
CONFIG_SYS_GPSR1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPSR1_VAL	/;"	d
CONFIG_SYS_GPSR1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPSR1_VAL	/;"	d
CONFIG_SYS_GPSR2_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPSR2_VAL	/;"	d
CONFIG_SYS_GPSR2_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_GPSR2_VAL	/;"	d
CONFIG_SYS_GPSR2_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPSR2_VAL	/;"	d
CONFIG_SYS_GPSR3_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_GPSR3_VAL	/;"	d
CONFIG_SYS_GPSR3_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_GPSR3_VAL	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/TQM5200.h	/^#   define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/TQM5200.h	/^#  define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/TQM5200.h	/^# define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/a3m071.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/a4m072.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/canmb.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/charon.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/cm5200.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/inka4x0.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/ipek01.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/jupiter.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/motionpro.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/munices.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/o2d.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/o2d300.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG /;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/o2dnt2.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/o2i.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/o2mnt.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/o3dnt.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/pcm030.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG	include/configs/v38b.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG_1	include/configs/a3m071.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG_1	/;"	d
CONFIG_SYS_GPS_PORT_CONFIG_2	include/configs/a3m071.h	/^#define CONFIG_SYS_GPS_PORT_CONFIG_2	/;"	d
CONFIG_SYS_GRLIB_APBUART_INDEX	arch/sparc/cpu/leon3/serial.c	/^#define CONFIG_SYS_GRLIB_APBUART_INDEX /;"	d	file:
CONFIG_SYS_GRLIB_ESA_MCTRL1	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1$/;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1$/;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1$/;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1$/;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_GAISLER_DDRSPA1	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1$/;"	d
CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1$/;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1$/;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1$/;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1$/;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 /;"	d
CONFIG_SYS_GRLIB_GPTIMER_INDEX	arch/sparc/cpu/leon3/cpu_init.c	/^#define CONFIG_SYS_GRLIB_GPTIMER_INDEX /;"	d	file:
CONFIG_SYS_GRLIB_GRETH_INDEX	drivers/net/greth.c	/^#define CONFIG_SYS_GRLIB_GRETH_INDEX /;"	d	file:
CONFIG_SYS_GRLIB_MEMCFG1	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_MEMCFG1 /;"	d
CONFIG_SYS_GRLIB_MEMCFG1	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_GRLIB_MEMCFG1 /;"	d
CONFIG_SYS_GRLIB_MEMCFG2	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_GRLIB_MEMCFG2 /;"	d
CONFIG_SYS_GRLIB_MEMCFG3	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_GRLIB_MEMCFG3 /;"	d
CONFIG_SYS_GRLIB_SDRAM	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_GRLIB_SDRAM /;"	d
CONFIG_SYS_GRLIB_SDRAM	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_GRLIB_SDRAM /;"	d
CONFIG_SYS_GRLIB_SDRAM	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_GRLIB_SDRAM /;"	d
CONFIG_SYS_GRLIB_SDRAM	include/configs/grsim.h	/^#define CONFIG_SYS_GRLIB_SDRAM /;"	d
CONFIG_SYS_GRLIB_SDRAM	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_GRLIB_SDRAM /;"	d
CONFIG_SYS_HAS_SERDES	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_HAS_SERDES$/;"	c	menu:LS102xA architecture
CONFIG_SYS_HAS_SERDES	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_HAS_SERDES$/;"	c	menu:Layerscape architecture
CONFIG_SYS_HAS_SERDES	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_HAS_SERDES	/;"	d
CONFIG_SYS_HAS_SERDES	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_HAS_SERDES	/;"	d
CONFIG_SYS_HAS_SERDES	include/configs/P1010RDB.h	/^#define CONFIG_SYS_HAS_SERDES	/;"	d
CONFIG_SYS_HAS_SERDES_MODULE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_HAS_SERDES$/;"	c	menu:LS102xA architecture
CONFIG_SYS_HAS_SERDES_MODULE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_HAS_SERDES$/;"	c	menu:Layerscape architecture
CONFIG_SYS_HELP_CMD_WIDTH	include/autoconf.mk	/^CONFIG_SYS_HELP_CMD_WIDTH=8$/;"	m
CONFIG_SYS_HELP_CMD_WIDTH	include/command.h	/^#define CONFIG_SYS_HELP_CMD_WIDTH	/;"	d
CONFIG_SYS_HELP_CMD_WIDTH	spl/include/autoconf.mk	/^CONFIG_SYS_HELP_CMD_WIDTH=8$/;"	m
CONFIG_SYS_HID0_FINAL	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/TQM5200.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/TQM834x.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/a3m071.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/a4m072.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/ac14xx.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/aria.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/canmb.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/cm5200.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/hrcon.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/ids8313.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/inka4x0.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/ipek01.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/jupiter.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/km82xx.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/mecp5123.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/motionpro.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/munices.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/pcm030.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/sbc8349.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/strider.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/v38b.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/ve8313.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_FINAL	include/configs/vme8349.h	/^#define CONFIG_SYS_HID0_FINAL	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/TQM5200.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/TQM834x.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/a3m071.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/a4m072.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/ac14xx.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/aria.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/canmb.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/cm5200.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/hrcon.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/ids8313.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/inka4x0.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/ipek01.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/jupiter.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/km82xx.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/mecp5123.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/motionpro.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/munices.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/pcm030.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/pdm360ng.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/sbc8349.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/strider.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/v38b.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/ve8313.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID0_INIT	include/configs/vme8349.h	/^#define CONFIG_SYS_HID0_INIT	/;"	d
CONFIG_SYS_HID2	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_HID2 /;"	d
CONFIG_SYS_HID2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_HID2 /;"	d
CONFIG_SYS_HID2	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/TQM834x.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/ac14xx.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/aria.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/hrcon.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/ids8313.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/km82xx.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/mecp5123.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/pdm360ng.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/sbc8349.h	/^#define CONFIG_SYS_HID2 /;"	d
CONFIG_SYS_HID2	include/configs/strider.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HID2	include/configs/ve8313.h	/^#define CONFIG_SYS_HID2 /;"	d
CONFIG_SYS_HID2	include/configs/vme8349.h	/^#define CONFIG_SYS_HID2	/;"	d
CONFIG_SYS_HIGH	include/lcd.h	/^#define CONFIG_SYS_HIGH	/;"	d
CONFIG_SYS_HMI_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_HMI_BASE	/;"	d
CONFIG_SYS_HOSTNAME	include/configs/socfpga_common.h	/^#define CONFIG_SYS_HOSTNAME	/;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/TQM834x.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/hrcon.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/ids8313.h	/^#define CONFIG_SYS_HRCW_HIGH	/;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/km8360.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/sbc8349.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/strider.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/ve8313.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH	include/configs/vme8349.h	/^#define CONFIG_SYS_HRCW_HIGH /;"	d
CONFIG_SYS_HRCW_HIGH_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_HRCW_HIGH_BASE /;"	d
CONFIG_SYS_HRCW_HIGH_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_HRCW_HIGH_BASE /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/TQM834x.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/hrcon.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/ids8313.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/km8360.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/sbc8349.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/strider.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/ve8313.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_LOW	include/configs/vme8349.h	/^#define CONFIG_SYS_HRCW_LOW /;"	d
CONFIG_SYS_HRCW_MASTER	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_MASTER	/;"	d
CONFIG_SYS_HRCW_SLAVE1	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE1	/;"	d
CONFIG_SYS_HRCW_SLAVE2	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE2	/;"	d
CONFIG_SYS_HRCW_SLAVE3	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE3	/;"	d
CONFIG_SYS_HRCW_SLAVE4	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE4	/;"	d
CONFIG_SYS_HRCW_SLAVE5	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE5	/;"	d
CONFIG_SYS_HRCW_SLAVE6	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE6	/;"	d
CONFIG_SYS_HRCW_SLAVE7	include/configs/km82xx.h	/^#define CONFIG_SYS_HRCW_SLAVE7	/;"	d
CONFIG_SYS_HSDRAMC	include/configs/atngw100.h	/^#define CONFIG_SYS_HSDRAMC$/;"	d
CONFIG_SYS_HSDRAMC	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_HSDRAMC$/;"	d
CONFIG_SYS_HSDRAMC	include/configs/atstk1002.h	/^#define CONFIG_SYS_HSDRAMC$/;"	d
CONFIG_SYS_HSDRAMC	include/configs/grasshopper.h	/^#define CONFIG_SYS_HSDRAMC$/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM823L.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM823M.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM850L.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM850M.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM855L.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM855M.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM860L.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM860M.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM862L.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM862M.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM866M.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_MAGIC	include/configs/TQM885D.h	/^#define CONFIG_SYS_HWINFO_MAGIC	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM823L.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM823M.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM850L.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM850M.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM855L.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM855M.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM860L.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM860M.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM862L.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM862M.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_HWINFO_OFFSET	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HWINFO_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_HWINFO_SIZE	/;"	d
CONFIG_SYS_HZ	include/config/auto.conf	/^CONFIG_SYS_HZ=1000$/;"	k
CONFIG_SYS_HZ	include/configs/UCP1020.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/amcore.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/ap121.h	/^#define CONFIG_SYS_HZ /;"	d
CONFIG_SYS_HZ	include/configs/ap143.h	/^#define CONFIG_SYS_HZ /;"	d
CONFIG_SYS_HZ	include/configs/cm_t3517.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/colibri_vf.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/hrcon.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/s32v234evb.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/strider.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/tbs2910.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/warp7.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/configs/xpress.h	/^#define CONFIG_SYS_HZ	/;"	d
CONFIG_SYS_HZ	include/generated/autoconf.h	/^#define CONFIG_SYS_HZ /;"	d
CONFIG_SYS_HZ	lib/Kconfig	/^config SYS_HZ$/;"	c	menu:Library routines
CONFIG_SYS_HZ_CLOCK	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/calimain.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/da850evm.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/ea20.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/integratorap.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/integratorcp.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/ipam390.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/legoev3.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_CLOCK	include/configs/x600.h	/^#define CONFIG_SYS_HZ_CLOCK	/;"	d
CONFIG_SYS_HZ_MODULE	lib/Kconfig	/^config SYS_HZ$/;"	c	menu:Library routines
CONFIG_SYS_I2C	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/B4860QDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M52277EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5235EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5275EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M53017EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5329EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5373EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M54451EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M54455EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5475EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/M5485EVB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/P1022DS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/P1023RDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/P2041RDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T102xRDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T104xRDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T208xQDS.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T208xRDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/T4240RDB.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/TQM834x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/TQM855M.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/TQM866M.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/TQM885D.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/VCMA9.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/alt.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/am3517_crane.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/am3517_evm.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/amcc-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/apf27.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/br4.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/clearfog.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm-bf527.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm-bf548.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm_t35.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cm_t3517.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/controlcenterd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/corenet_ds.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/da850evm.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/db-88f6720.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/devkit3250.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ds414.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ea20.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/edminiv2.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/el6x_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ethernut5.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/flea3.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/gose.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/gw_ventana.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ids8313.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/iocon.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/kc1.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/km/km_arm.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/lager.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/legoev3.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/m53evk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/maxbcm.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mcx.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx25pdk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx35pdk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx53ard.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx53evk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx53loco.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx53smd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx6slevk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/mxs.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/novena.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/omap3_evm.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/p1_twr.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/pcm058.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/platinum.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/porter.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/pr1.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/s5p_goni.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/sbc8349.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/sbc8548.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/sbc8641d.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/silk.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/snapper9260.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/sniper.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/socrates.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/spear-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/stout.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/strider.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/t4qds.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tam3517-common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tao3530.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tbs2910.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/theadorable.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/titanium.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/trats.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/trats2.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/tricorder.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/usbarmory.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/vct.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/vf610twr.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/vme8349.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/wandboard.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/warp.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/warp7.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/woodburn_common.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/work_92105.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/x600.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/xpress.h	/^#define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C	include/configs/zynq-common.h	/^# define CONFIG_SYS_I2C$/;"	d
CONFIG_SYS_I2C_8574A_ADDR1	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_8574A_ADDR1	/;"	d
CONFIG_SYS_I2C_8574A_ADDR2	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_8574A_ADDR2	/;"	d
CONFIG_SYS_I2C_8574_ADDR1	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_8574_ADDR1	/;"	d
CONFIG_SYS_I2C_8574_ADDR2	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_8574_ADDR2	/;"	d
CONFIG_SYS_I2C_8574_ADDR2	include/configs/vme8349.h	/^#define CONFIG_SYS_I2C_8574_ADDR2 /;"	d
CONFIG_SYS_I2C_ADI	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/br4.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/cm-bf527.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/cm-bf548.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/pr1.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_ADI	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_I2C_ADI$/;"	d
CONFIG_SYS_I2C_AT91	drivers/i2c/Kconfig	/^config SYS_I2C_AT91$/;"	c	menu:I2C support
CONFIG_SYS_I2C_AT91_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_AT91$/;"	c	menu:I2C support
CONFIG_SYS_I2C_BASE	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_BASE	/;"	d
CONFIG_SYS_I2C_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_BASE	/;"	d
CONFIG_SYS_I2C_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_I2C_BASE	/;"	d
CONFIG_SYS_I2C_BASE	include/configs/x600.h	/^#define CONFIG_SYS_I2C_BASE	/;"	d
CONFIG_SYS_I2C_BASE0	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_I2C_BASE0	/;"	d
CONFIG_SYS_I2C_BASE0	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_I2C_BASE0	/;"	d
CONFIG_SYS_I2C_BASE1	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_BASE1	/;"	d
CONFIG_SYS_I2C_BASE1	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_I2C_BASE1	/;"	d
CONFIG_SYS_I2C_BASE1	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_I2C_BASE1	/;"	d
CONFIG_SYS_I2C_BASE1	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_BASE1	/;"	d
CONFIG_SYS_I2C_BASE2	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_BASE2	/;"	d
CONFIG_SYS_I2C_BASE2	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_I2C_BASE2	/;"	d
CONFIG_SYS_I2C_BASE2	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_I2C_BASE2	/;"	d
CONFIG_SYS_I2C_BASE2	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_BASE2	/;"	d
CONFIG_SYS_I2C_BASE3	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_I2C_BASE3	/;"	d
CONFIG_SYS_I2C_BASE3	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_I2C_BASE3	/;"	d
CONFIG_SYS_I2C_BASE3	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_BASE3	/;"	d
CONFIG_SYS_I2C_BOOT_EEPROM_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_BOOT_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_BUSES	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_I2C_BUSES	/;"	d
CONFIG_SYS_I2C_BUSES	include/configs/km/km_arm.h	/^#define CONFIG_SYS_I2C_BUSES	/;"	d
CONFIG_SYS_I2C_BUSES	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C_BUSES	/;"	d
CONFIG_SYS_I2C_BUSES	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_BUSES	/;"	d
CONFIG_SYS_I2C_BUSES	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_SYS_I2C_BUSES	/;"	d
CONFIG_SYS_I2C_BUS_MAX	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_BUS_MAX	/;"	d
CONFIG_SYS_I2C_BUS_MAX	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_BUS_MAX	/;"	d
CONFIG_SYS_I2C_CADENCE	drivers/i2c/Kconfig	/^config SYS_I2C_CADENCE$/;"	c	menu:I2C support
CONFIG_SYS_I2C_CADENCE_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_CADENCE$/;"	c	menu:I2C support
CONFIG_SYS_I2C_CLK_OFFSET	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_CLK_OFFSET	/;"	d
CONFIG_SYS_I2C_DAVINCI	include/configs/da850evm.h	/^#define CONFIG_SYS_I2C_DAVINCI$/;"	d
CONFIG_SYS_I2C_DAVINCI	include/configs/ea20.h	/^#define CONFIG_SYS_I2C_DAVINCI$/;"	d
CONFIG_SYS_I2C_DAVINCI	include/configs/legoev3.h	/^#define CONFIG_SYS_I2C_DAVINCI$/;"	d
CONFIG_SYS_I2C_DAVINCI	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_I2C_DAVINCI$/;"	d
CONFIG_SYS_I2C_DAVINCI	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_I2C_DAVINCI$/;"	d
CONFIG_SYS_I2C_DIRECT_BUS	include/i2c.h	/^#define CONFIG_SYS_I2C_DIRECT_BUS	/;"	d
CONFIG_SYS_I2C_DS1621_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_DS1621_ADDR	/;"	d
CONFIG_SYS_I2C_DS1621_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_DS1621_ADDR	/;"	d
CONFIG_SYS_I2C_DS4510_ADDR	drivers/misc/ds4510.c	/^#define CONFIG_SYS_I2C_DS4510_ADDR	/;"	d	file:
CONFIG_SYS_I2C_DS4510_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_DS4510_ADDR	/;"	d
CONFIG_SYS_I2C_DS4510_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_DS4510_ADDR	/;"	d
CONFIG_SYS_I2C_DSPIC_2_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_DSPIC_2_ADDR	/;"	d
CONFIG_SYS_I2C_DSPIC_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_DSPIC_ADDR	/;"	d
CONFIG_SYS_I2C_DSPIC_IO_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_DSPIC_IO_ADDR	/;"	d
CONFIG_SYS_I2C_DSPIC_KEYB_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_DSPIC_KEYB_ADDR	/;"	d
CONFIG_SYS_I2C_DTT_ADDR	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_I2C_DTT_ADDR /;"	d
CONFIG_SYS_I2C_DTT_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2C_DTT_ADDR	/;"	d
CONFIG_SYS_I2C_DTT_ADDR	include/configs/kilauea.h	/^#define CONFIG_SYS_I2C_DTT_ADDR	/;"	d
CONFIG_SYS_I2C_DTT_ADDR	include/configs/makalu.h	/^#define CONFIG_SYS_I2C_DTT_ADDR	/;"	d
CONFIG_SYS_I2C_DVI_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_DVI_ADDR	/;"	d
CONFIG_SYS_I2C_DVI_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_DVI_ADDR /;"	d
CONFIG_SYS_I2C_DVI_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_I2C_DVI_ADDR	/;"	d
CONFIG_SYS_I2C_DVI_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_DVI_ADDR	/;"	d
CONFIG_SYS_I2C_DVI_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_DVI_ADDR	/;"	d
CONFIG_SYS_I2C_DVI_BUS_NUM	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_DVI_BUS_NUM	/;"	d
CONFIG_SYS_I2C_DVI_BUS_NUM	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_DVI_BUS_NUM	/;"	d
CONFIG_SYS_I2C_DW	drivers/i2c/Kconfig	/^config SYS_I2C_DW$/;"	c	menu:I2C support
CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED	drivers/i2c/Kconfig	/^config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED$/;"	c	menu:I2C support
CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED$/;"	c	menu:I2C support
CONFIG_SYS_I2C_DW_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_DW$/;"	c	menu:I2C support
CONFIG_SYS_I2C_EARLY_INIT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_I2C_EARLY_INIT$/;"	d
CONFIG_SYS_I2C_EARLY_INIT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_I2C_EARLY_INIT$/;"	d
CONFIG_SYS_I2C_EARLY_INIT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_EARLY_INIT$/;"	d
CONFIG_SYS_I2C_EEPROM	include/configs/cm5200.h	/^#define CONFIG_SYS_I2C_EEPROM	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	board/compulab/common/eeprom.c	/^# define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d	file:
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/TQM5200.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/TQM834x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/VCMA9.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/a4m072.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ac14xx.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/acadia.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/am335x_evm.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/am335x_shc.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/apf27.h	/^# define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/aria.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/baltos.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/bav335x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/bubinga.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/cm_t335.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/cm_t35.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/cm_t3517.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/cm_t54.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/draco.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/etamin.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/icon.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/intip.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/io64.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ipek01.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/katmai.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/kilauea.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/km/km_arm.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/lacie_kw.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/luan.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/makalu.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/mecp5123.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/omap3_logic.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pcm051.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pengwyn.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pepper.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/pxm2.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/rastaban.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/rut.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/sbc8548.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/t3corp.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/thuban.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/v38b.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/vct.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/walnut.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/work_92105.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/yosemite.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR	include/configs/zynq-common.h	/^# define CONFIG_SYS_I2C_EEPROM_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	board/compulab/common/eeprom.c	/^# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d	file:
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/P1022DS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/P1023RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/T102xRDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/T4240QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/TQM5200.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/TQM834x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/TQM855M.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/TQM866M.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/TQM885D.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/VCMA9.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/a4m072.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ac14xx.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/acadia.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/am335x_evm.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/am335x_shc.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/apf27.h	/^# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/aria.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/baltos.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/bamboo.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/bav335x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/bubinga.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cm_t335.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cm_t35.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cm_t3517.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cm_t43.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cm_t54.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/controlcenterd.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/corenet_ds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/icon.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/intip.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/io64.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ipek01.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/katmai.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/kilauea.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/km/km_arm.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/km8360.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/lacie_kw.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/luan.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/m28evk.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/makalu.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/mecp5123.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/motionpro.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/novena.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/p1_twr.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/pcm051.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/pengwyn.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/redwood.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/rut.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/sequoia.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/suvd3.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/t3corp.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/tam3517-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/tricorder.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/v38b.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/vct.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/walnut.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/work_92105.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/yosemite.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN /;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/yucca.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/zynq-common.h	/^# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_LEN	include/configs/zynq_zybo.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	include/configs/tam3517-common.h	/^#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	board/compulab/common/eeprom.c	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d	file:
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/cm_t335.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/cm_t35.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/cm_t3517.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/cm_t54.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/novena.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS /;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS /;"	d
CONFIG_SYS_I2C_EEPROM_BUS	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS	/;"	d
CONFIG_SYS_I2C_EEPROM_BUS_NUM	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_EEPROM_BUS_NUM	/;"	d
CONFIG_SYS_I2C_EEPROM_CCID	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_CCID$/;"	d
CONFIG_SYS_I2C_EEPROM_CCID	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_CCID$/;"	d
CONFIG_SYS_I2C_EEPROM_CCID	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_I2C_EEPROM_CCID$/;"	d
CONFIG_SYS_I2C_EEPROM_CPU_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_EEPROM_CPU_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_MAC_OFFSET	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET	/;"	d
CONFIG_SYS_I2C_EEPROM_MB_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_EEPROM_MB_ADDR	/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/B4860QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/P1022DS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/P1023RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/P2041RDB.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/T102xRDB.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/T208xQDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/T208xRDB.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/T4240QDS.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/corenet_ds.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_NXID	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_I2C_EEPROM_NXID$/;"	d
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS	/;"	d
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
CONFIG_SYS_I2C_EXPANDER_ADDR	include/configs/da850evm.h	/^#define CONFIG_SYS_I2C_EXPANDER_ADDR /;"	d
CONFIG_SYS_I2C_EXPANDER_ADDR	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_I2C_EXPANDER_ADDR	/;"	d
CONFIG_SYS_I2C_FACT_ADDR	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_FACT_ADDR	/;"	d
CONFIG_SYS_I2C_FPGA_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C_FPGA_ADDR	/;"	d
CONFIG_SYS_I2C_FPGA_ADDR	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_I2C_FPGA_ADDR	/;"	d
CONFIG_SYS_I2C_FPGA_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_FPGA_ADDR	/;"	d
CONFIG_SYS_I2C_FPGA_ADDR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_I2C_FPGA_ADDR	/;"	d
CONFIG_SYS_I2C_FPGA_ADDR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_I2C_FPGA_ADDR	/;"	d
CONFIG_SYS_I2C_FPGA_ADDR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_FPGA_ADDR	/;"	d
CONFIG_SYS_I2C_FRAM	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_I2C_FRAM$/;"	d
CONFIG_SYS_I2C_FSL	drivers/i2c/Kconfig	/^config SYS_I2C_FSL$/;"	c	menu:I2C support
CONFIG_SYS_I2C_FSL	include/configs/B4860QDS.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M52277EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5275EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M53017EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5329EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5373EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M54451EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5475EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/M5485EVB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/P1022DS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/P1023RDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/P2041RDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T102xRDB.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T104xRDB.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T208xQDS.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T208xRDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/T4240RDB.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/TQM834x.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/controlcenterd.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/corenet_ds.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/ids8313.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/p1_twr.h	/^#define CONFIG_SYS_I2C_FSL	/;"	d
CONFIG_SYS_I2C_FSL	include/configs/sbc8349.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/sbc8548.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/sbc8641d.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/socrates.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/strider.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/t4qds.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/vme8349.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_FSL$/;"	d
CONFIG_SYS_I2C_FSL_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_FSL$/;"	c	menu:I2C support
CONFIG_SYS_I2C_G762_ADDR	include/configs/lacie_kw.h	/^#define CONFIG_SYS_I2C_G762_ADDR	/;"	d
CONFIG_SYS_I2C_GENERIC_MAC	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_GENERIC_MAC$/;"	d
CONFIG_SYS_I2C_HWMON_ADDR	include/configs/TQM5200.h	/^#define CONFIG_SYS_I2C_HWMON_ADDR	/;"	d
CONFIG_SYS_I2C_IDT6V49205B	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C_IDT6V49205B	/;"	d
CONFIG_SYS_I2C_IFDR_DIV	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_IFDR_DIV	/;"	d
CONFIG_SYS_I2C_IHS	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS$/;"	d
CONFIG_SYS_I2C_IHS	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS$/;"	d
CONFIG_SYS_I2C_IHS	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS$/;"	d
CONFIG_SYS_I2C_IHS	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS$/;"	d
CONFIG_SYS_I2C_IHS_CH0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_CH0$/;"	d
CONFIG_SYS_I2C_IHS_CH0	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH0$/;"	d
CONFIG_SYS_I2C_IHS_CH0	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_CH0$/;"	d
CONFIG_SYS_I2C_IHS_CH0	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH0$/;"	d
CONFIG_SYS_I2C_IHS_CH0_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH0_1$/;"	d
CONFIG_SYS_I2C_IHS_CH0_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH0_1$/;"	d
CONFIG_SYS_I2C_IHS_CH1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_CH1$/;"	d
CONFIG_SYS_I2C_IHS_CH1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH1$/;"	d
CONFIG_SYS_I2C_IHS_CH1	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_CH1$/;"	d
CONFIG_SYS_I2C_IHS_CH1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH1$/;"	d
CONFIG_SYS_I2C_IHS_CH1_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH1_1$/;"	d
CONFIG_SYS_I2C_IHS_CH1_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH1_1$/;"	d
CONFIG_SYS_I2C_IHS_CH2	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH2$/;"	d
CONFIG_SYS_I2C_IHS_CH2	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_CH2$/;"	d
CONFIG_SYS_I2C_IHS_CH2	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH2$/;"	d
CONFIG_SYS_I2C_IHS_CH2_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH2_1$/;"	d
CONFIG_SYS_I2C_IHS_CH2_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH2_1$/;"	d
CONFIG_SYS_I2C_IHS_CH3	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH3$/;"	d
CONFIG_SYS_I2C_IHS_CH3	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_CH3$/;"	d
CONFIG_SYS_I2C_IHS_CH3	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH3$/;"	d
CONFIG_SYS_I2C_IHS_CH3_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_CH3_1$/;"	d
CONFIG_SYS_I2C_IHS_CH3_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_CH3_1$/;"	d
CONFIG_SYS_I2C_IHS_DUAL	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_DUAL$/;"	d
CONFIG_SYS_I2C_IHS_DUAL	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_DUAL$/;"	d
CONFIG_SYS_I2C_IHS_DUAL	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_DUAL$/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0_1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_0_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_0_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1_1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_1_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_1_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_2	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_2	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_2	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_2	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_2	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_2	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_2_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_2_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_2_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_2_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_3	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_3	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_3	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_3	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_3	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_3	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_3_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_3_1	/;"	d
CONFIG_SYS_I2C_IHS_SLAVE_3_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SLAVE_3_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0_1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_0_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_0_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1_1	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_1_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_1_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_2	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_2	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_2	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_2	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_2	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_2	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_2_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_2_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_2_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_2_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_3	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_3	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_3	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_3	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_3	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_3	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_3_1	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_3_1	/;"	d
CONFIG_SYS_I2C_IHS_SPEED_3_1	include/configs/strider.h	/^#define CONFIG_SYS_I2C_IHS_SPEED_3_1	/;"	d
CONFIG_SYS_I2C_INIT_BOARD	include/configs/km/km_arm.h	/^#define CONFIG_SYS_I2C_INIT_BOARD$/;"	d
CONFIG_SYS_I2C_INIT_BOARD	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C_INIT_BOARD$/;"	d
CONFIG_SYS_I2C_INIT_BOARD	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_INIT_BOARD$/;"	d
CONFIG_SYS_I2C_INIT_BOARD	include/configs/s5p_goni.h	/^#define CONFIG_SYS_I2C_INIT_BOARD$/;"	d
CONFIG_SYS_I2C_INIT_BOARD	include/configs/trats.h	/^#define CONFIG_SYS_I2C_INIT_BOARD$/;"	d
CONFIG_SYS_I2C_INIT_BOARD	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_INIT_BOARD$/;"	d
CONFIG_SYS_I2C_INTEL	drivers/i2c/Kconfig	/^config SYS_I2C_INTEL$/;"	c	menu:I2C support
CONFIG_SYS_I2C_INTEL_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_INTEL$/;"	c	menu:I2C support
CONFIG_SYS_I2C_IO	include/configs/cm5200.h	/^#define CONFIG_SYS_I2C_IO	/;"	d
CONFIG_SYS_I2C_KEYBD_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_KEYBD_ADDR	/;"	d
CONFIG_SYS_I2C_KONA	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_I2C_KONA$/;"	d
CONFIG_SYS_I2C_KONA	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_I2C_KONA$/;"	d
CONFIG_SYS_I2C_LDI_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_LDI_ADDR	/;"	d
CONFIG_SYS_I2C_LDI_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_LDI_ADDR /;"	d
CONFIG_SYS_I2C_LDI_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_I2C_LDI_ADDR	/;"	d
CONFIG_SYS_I2C_LM75_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_LM75_ADDR	/;"	d
CONFIG_SYS_I2C_LM90_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_LM90_ADDR	/;"	d
CONFIG_SYS_I2C_LM90_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_LM90_ADDR	/;"	d
CONFIG_SYS_I2C_LM90_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_LM90_ADDR	/;"	d
CONFIG_SYS_I2C_LPC32XX	include/configs/devkit3250.h	/^#define CONFIG_SYS_I2C_LPC32XX$/;"	d
CONFIG_SYS_I2C_LPC32XX	include/configs/work_92105.h	/^#define CONFIG_SYS_I2C_LPC32XX$/;"	d
CONFIG_SYS_I2C_LPC32XX_SLAVE	drivers/i2c/lpc32xx_i2c.c	/^#define CONFIG_SYS_I2C_LPC32XX_SLAVE /;"	d	file:
CONFIG_SYS_I2C_LPC32XX_SPEED	drivers/i2c/lpc32xx_i2c.c	/^#define CONFIG_SYS_I2C_LPC32XX_SPEED /;"	d	file:
CONFIG_SYS_I2C_MAC1_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_MAC1_BUS /;"	d
CONFIG_SYS_I2C_MAC1_CHIP_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_MAC1_CHIP_ADDR /;"	d
CONFIG_SYS_I2C_MAC1_DATA_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_MAC1_DATA_ADDR /;"	d
CONFIG_SYS_I2C_MAC2_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_MAC2_BUS /;"	d
CONFIG_SYS_I2C_MAC2_CHIP_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_MAC2_CHIP_ADDR /;"	d
CONFIG_SYS_I2C_MAC2_DATA_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_MAC2_DATA_ADDR /;"	d
CONFIG_SYS_I2C_MAC_OFFSET	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_I2C_MAC_OFFSET	/;"	d
CONFIG_SYS_I2C_MAX1237_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_MAX1237_ADDR	/;"	d
CONFIG_SYS_I2C_MAX_HOPS	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_I2C_MAX_HOPS	/;"	d
CONFIG_SYS_I2C_MAX_HOPS	include/configs/km/km_arm.h	/^#define CONFIG_SYS_I2C_MAX_HOPS	/;"	d
CONFIG_SYS_I2C_MAX_HOPS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C_MAX_HOPS	/;"	d
CONFIG_SYS_I2C_MAX_HOPS	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_MAX_HOPS	/;"	d
CONFIG_SYS_I2C_MAX_HOPS	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_SYS_I2C_MAX_HOPS	/;"	d
CONFIG_SYS_I2C_MAX_HOPS	include/i2c.h	/^#define CONFIG_SYS_I2C_MAX_HOPS	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/TQM5200.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/a4m072.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/cm5200.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/ipek01.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/motionpro.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_MODULE /;"	d
CONFIG_SYS_I2C_MODULE	include/configs/r0p7734.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MODULE	include/configs/v38b.h	/^#define CONFIG_SYS_I2C_MODULE	/;"	d
CONFIG_SYS_I2C_MVTWSI	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	drivers/i2c/Kconfig	/^config SYS_I2C_MVTWSI$/;"	c	menu:I2C support
CONFIG_SYS_I2C_MVTWSI	include/configs/clearfog.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/db-88f6720.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/ds414.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/edminiv2.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/maxbcm.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI	include/configs/theadorable.h	/^#define CONFIG_SYS_I2C_MVTWSI$/;"	d
CONFIG_SYS_I2C_MVTWSI_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_MVTWSI$/;"	c	menu:I2C support
CONFIG_SYS_I2C_MXC	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/apf27.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/el6x_common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/flea3.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/gw_ventana.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/m53evk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx25pdk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx35pdk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx53ard.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx53evk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx53loco.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx53smd.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6slevk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/novena.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/pcm058.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/platinum.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/tbs2910.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/titanium.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/usbarmory.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/vf610twr.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/wandboard.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/warp.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/warp7.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/woodburn_common.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC	include/configs/xpress.h	/^#define CONFIG_SYS_I2C_MXC$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_I2C_MXC_I2C1$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/apf27.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/el6x_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/flea3.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_I2C_MXC_I2C1$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/gw_ventana.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/m53evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx25pdk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx35pdk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx53ard.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx53evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx53loco.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx53smd.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6slevk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/novena.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_I2C_MXC_I2C1$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/platinum.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/tbs2910.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/titanium.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/usbarmory.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/vf610twr.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/wandboard.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/warp.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/warp7.h	/^#define CONFIG_SYS_I2C_MXC_I2C1$/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/woodburn_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C1	include/configs/xpress.h	/^#define CONFIG_SYS_I2C_MXC_I2C1	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_I2C_MXC_I2C2$/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/apf27.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/el6x_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/flea3.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_I2C_MXC_I2C2$/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/gw_ventana.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2$/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2$/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/m53evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx25pdk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx35pdk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx53ard.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx53evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx53loco.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx53smd.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6slevk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/novena.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/platinum.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/tbs2910.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/titanium.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/usbarmory.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/vf610twr.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/wandboard.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/warp.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/woodburn_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C2	include/configs/xpress.h	/^#define CONFIG_SYS_I2C_MXC_I2C2	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_I2C_MXC_I2C3$/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/el6x_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/flea3.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_I2C_MXC_I2C3$/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/gw_ventana.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C3$/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C3$/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/m53evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx35pdk.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx53ard.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx53evk.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx53loco.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx53smd.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx6slevk.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/novena.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C_MXC_I2C3$/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/pcm058.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/platinum.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/tbs2910.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/titanium.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/wandboard.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C3	include/configs/woodburn_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C3	/;"	d
CONFIG_SYS_I2C_MXC_I2C4	include/configs/aristainetos2.h	/^#define CONFIG_SYS_I2C_MXC_I2C4	/;"	d
CONFIG_SYS_I2C_MXC_I2C4	include/configs/aristainetos2b.h	/^#define CONFIG_SYS_I2C_MXC_I2C4	/;"	d
CONFIG_SYS_I2C_MXC_I2C4	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C4$/;"	d
CONFIG_SYS_I2C_MXC_I2C4	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C4$/;"	d
CONFIG_SYS_I2C_MXC_I2C4	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_I2C_MXC_I2C4	/;"	d
CONFIG_SYS_I2C_MXC_I2C4	include/configs/xpress.h	/^#define CONFIG_SYS_I2C_MXC_I2C4	/;"	d
CONFIG_SYS_I2C_MXS	include/configs/mxs.h	/^#define CONFIG_SYS_I2C_MXS$/;"	d
CONFIG_SYS_I2C_NCT72_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C_NCT72_ADDR	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/P1022DS.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/apf27.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/bubinga.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/redwood.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/sbc8349.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/sbc8641d.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/vme8349.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_NOPROBES	include/configs/yucca.h	/^#define CONFIG_SYS_I2C_NOPROBES	/;"	d
CONFIG_SYS_I2C_OFFSET	include/configs/M54418TWR.h	/^#define CONFIG_SYS_I2C_OFFSET	/;"	d
CONFIG_SYS_I2C_OFFSET	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_I2C_OFFSET	/;"	d
CONFIG_SYS_I2C_OMAP24XX	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_I2C_OMAP24XX$/;"	d
CONFIG_SYS_I2C_OMAP24XX	include/configs/kc1.h	/^#define CONFIG_SYS_I2C_OMAP24XX$/;"	d
CONFIG_SYS_I2C_OMAP24XX	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_I2C_OMAP24XX$/;"	d
CONFIG_SYS_I2C_OMAP24XX	include/configs/ti_armv7_omap.h	/^#define CONFIG_SYS_I2C_OMAP24XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/am3517_crane.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/am3517_evm.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/cm_t35.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/cm_t3517.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/cm_t54.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/devkit8000.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/mcx.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/omap3_evm.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/omap3_logic.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/omap3_overo.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/sniper.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/tam3517-common.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/tao3530.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_OMAP34XX	include/configs/tricorder.h	/^#define CONFIG_SYS_I2C_OMAP34XX$/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	drivers/gpio/pca953x.c	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d	file:
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/cm_t335.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/snapper9260.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR0	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR0	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR0	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR0	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR0	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR0	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR0	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR0	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR1	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR1	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR1	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR1	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR1	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR1	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR1	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR1	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR2	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR2	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR2	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR2	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR3	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR3	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR3	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR3	/;"	d
CONFIG_SYS_I2C_PCA953X_ADDR3	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_PCA953X_ADDR3	/;"	d
CONFIG_SYS_I2C_PCA953X_WIDTH	include/configs/cm_t335.h	/^#define CONFIG_SYS_I2C_PCA953X_WIDTH	/;"	d
CONFIG_SYS_I2C_PCA953X_WIDTH	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C_PCA953X_WIDTH	/;"	d
CONFIG_SYS_I2C_PCA953X_WIDTH	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C_PCA953X_WIDTH	/;"	d
CONFIG_SYS_I2C_PCA953X_WIDTH	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_PCA953X_WIDTH	/;"	d
CONFIG_SYS_I2C_PCA953X_WIDTH	include/configs/snapper9260.h	/^#define CONFIG_SYS_I2C_PCA953X_WIDTH	/;"	d
CONFIG_SYS_I2C_PCA953X_WIDTH	include/configs/strider.h	/^#define CONFIG_SYS_I2C_PCA953X_WIDTH /;"	d
CONFIG_SYS_I2C_PCA9553_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PCA9553_ADDR	/;"	d
CONFIG_SYS_I2C_PCA9555_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_I2C_PCA9555_ADDR	/;"	d
CONFIG_SYS_I2C_PCA9557_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C_PCA9557_ADDR	/;"	d
CONFIG_SYS_I2C_PCA9557_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C_PCA9557_ADDR	/;"	d
CONFIG_SYS_I2C_PCF8574A_ADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_I2C_PCF8574A_ADDR	/;"	d
CONFIG_SYS_I2C_PCF8574A_ADDR	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_I2C_PCF8574A_ADDR	/;"	d
CONFIG_SYS_I2C_PEX8518_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_PEX8518_ADDR	/;"	d
CONFIG_SYS_I2C_PEX8518_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_PEX8518_ADDR	/;"	d
CONFIG_SYS_I2C_PINMUX_CLR	include/configs/M5235EVB.h	/^#define CONFIG_SYS_I2C_PINMUX_CLR	/;"	d
CONFIG_SYS_I2C_PINMUX_CLR	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_I2C_PINMUX_CLR	/;"	d
CONFIG_SYS_I2C_PINMUX_CLR	include/configs/M5275EVB.h	/^#define CONFIG_SYS_I2C_PINMUX_CLR	/;"	d
CONFIG_SYS_I2C_PINMUX_REG	include/configs/M5235EVB.h	/^#define CONFIG_SYS_I2C_PINMUX_REG	/;"	d
CONFIG_SYS_I2C_PINMUX_REG	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_I2C_PINMUX_REG	/;"	d
CONFIG_SYS_I2C_PINMUX_REG	include/configs/M5275EVB.h	/^#define CONFIG_SYS_I2C_PINMUX_REG	/;"	d
CONFIG_SYS_I2C_PINMUX_SET	include/configs/M5235EVB.h	/^#define CONFIG_SYS_I2C_PINMUX_SET	/;"	d
CONFIG_SYS_I2C_PINMUX_SET	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_I2C_PINMUX_SET	/;"	d
CONFIG_SYS_I2C_PINMUX_SET	include/configs/M5275EVB.h	/^#define CONFIG_SYS_I2C_PINMUX_SET	/;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/alt.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR /;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/gose.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR /;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR /;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/lager.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR /;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/porter.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR	/;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/silk.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR	/;"	d
CONFIG_SYS_I2C_POWERIC_ADDR	include/configs/stout.h	/^#define CONFIG_SYS_I2C_POWERIC_ADDR /;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/amcc-common.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_PPC4XX$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/amcc-common.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH0	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH0$/;"	d
CONFIG_SYS_I2C_PPC4XX_CH1	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX_CH1$/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/amcc-common.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_0	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SLAVE_1	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/CPCI4052.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/MIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/PIP405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/PLU405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/PMC405DE.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/VOM405.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/acadia.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/bamboo.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/bubinga.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/dlvision.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/icon.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/intip.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/io.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/io64.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/katmai.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/kilauea.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/luan.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/makalu.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/neo.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/redwood.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/sequoia.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/t3corp.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/walnut.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/yosemite.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_0	include/configs/yucca.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_0	/;"	d
CONFIG_SYS_I2C_PPC4XX_SPEED_1	include/configs/PMC440.h	/^#define CONFIG_SYS_I2C_PPC4XX_SPEED_1	/;"	d
CONFIG_SYS_I2C_PXA	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_I2C_PXA$/;"	d
CONFIG_SYS_I2C_QIXIS_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_I2C_QIXIS_ADDR	/;"	d
CONFIG_SYS_I2C_RCAR	include/configs/lager.h	/^#define CONFIG_SYS_I2C_RCAR$/;"	d
CONFIG_SYS_I2C_RCAR	include/configs/stout.h	/^#define CONFIG_SYS_I2C_RCAR$/;"	d
CONFIG_SYS_I2C_ROCKCHIP	drivers/i2c/Kconfig	/^config SYS_I2C_ROCKCHIP$/;"	c	menu:I2C support
CONFIG_SYS_I2C_ROCKCHIP_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_ROCKCHIP$/;"	c	menu:I2C support
CONFIG_SYS_I2C_RTC_ADDR	drivers/rtc/ds1307.c	/^# define CONFIG_SYS_I2C_RTC_ADDR	/;"	d	file:
CONFIG_SYS_I2C_RTC_ADDR	drivers/rtc/ds1374.c	/^# define CONFIG_SYS_I2C_RTC_ADDR	/;"	d	file:
CONFIG_SYS_I2C_RTC_ADDR	drivers/rtc/max6900.c	/^#define	CONFIG_SYS_I2C_RTC_ADDR	/;"	d	file:
CONFIG_SYS_I2C_RTC_ADDR	drivers/rtc/rs5c372.c	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d	file:
CONFIG_SYS_I2C_RTC_ADDR	drivers/rtc/rx8025.c	/^# define CONFIG_SYS_I2C_RTC_ADDR	/;"	d	file:
CONFIG_SYS_I2C_RTC_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/TQM5200.h	/^# define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/TQM834x.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/TQM885D.h	/^# define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/apx4devkit.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/ethernut5.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/icon.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/ids8313.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/intip.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/ipek01.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/katmai.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/kilauea.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/m28evk.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/m53evk.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/makalu.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/mcx.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/mecp5123.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/motionpro.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/neo.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/pcm052.h	/^#define CONFIG_SYS_I2C_RTC_ADDR /;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/socrates.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/tqma6_wru4.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/v38b.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/vme8349.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/x600.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_RTC_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_I2C_RTC_ADDR	/;"	d
CONFIG_SYS_I2C_S3C24X0	include/configs/VCMA9.h	/^#define CONFIG_SYS_I2C_S3C24X0$/;"	d
CONFIG_SYS_I2C_S3C24X0	include/configs/exynos5-common.h	/^#define CONFIG_SYS_I2C_S3C24X0$/;"	d
CONFIG_SYS_I2C_S3C24X0	include/configs/odroid.h	/^#define CONFIG_SYS_I2C_S3C24X0$/;"	d
CONFIG_SYS_I2C_S3C24X0	include/configs/trats.h	/^#define CONFIG_SYS_I2C_S3C24X0$/;"	d
CONFIG_SYS_I2C_S3C24X0	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_S3C24X0$/;"	d
CONFIG_SYS_I2C_S3C24X0_SLAVE	include/configs/VCMA9.h	/^#define CONFIG_SYS_I2C_S3C24X0_SLAVE /;"	d
CONFIG_SYS_I2C_S3C24X0_SLAVE	include/configs/exynos5-common.h	/^#define CONFIG_SYS_I2C_S3C24X0_SLAVE /;"	d
CONFIG_SYS_I2C_S3C24X0_SLAVE	include/configs/odroid.h	/^#define CONFIG_SYS_I2C_S3C24X0_SLAVE	/;"	d
CONFIG_SYS_I2C_S3C24X0_SLAVE	include/configs/trats.h	/^#define CONFIG_SYS_I2C_S3C24X0_SLAVE	/;"	d
CONFIG_SYS_I2C_S3C24X0_SLAVE	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_S3C24X0_SLAVE	/;"	d
CONFIG_SYS_I2C_S3C24X0_SPEED	include/configs/VCMA9.h	/^#define CONFIG_SYS_I2C_S3C24X0_SPEED /;"	d
CONFIG_SYS_I2C_S3C24X0_SPEED	include/configs/exynos5-common.h	/^#define CONFIG_SYS_I2C_S3C24X0_SPEED	/;"	d
CONFIG_SYS_I2C_S3C24X0_SPEED	include/configs/odroid.h	/^#define CONFIG_SYS_I2C_S3C24X0_SPEED	/;"	d
CONFIG_SYS_I2C_S3C24X0_SPEED	include/configs/trats.h	/^#define CONFIG_SYS_I2C_S3C24X0_SPEED	/;"	d
CONFIG_SYS_I2C_S3C24X0_SPEED	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_S3C24X0_SPEED	/;"	d
CONFIG_SYS_I2C_SANDBOX	drivers/i2c/Kconfig	/^config SYS_I2C_SANDBOX$/;"	c	menu:I2C support
CONFIG_SYS_I2C_SANDBOX_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_SANDBOX$/;"	c	menu:I2C support
CONFIG_SYS_I2C_SH	include/configs/alt.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH	include/configs/gose.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH	include/configs/porter.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH	include/configs/silk.h	/^#define CONFIG_SYS_I2C_SH$/;"	d
CONFIG_SYS_I2C_SH_BASE0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_I2C_SH_BASE0	/;"	d
CONFIG_SYS_I2C_SH_BASE0	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SH_BASE0	/;"	d
CONFIG_SYS_I2C_SH_BASE0	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_BASE0	/;"	d
CONFIG_SYS_I2C_SH_BASE1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_I2C_SH_BASE1	/;"	d
CONFIG_SYS_I2C_SH_BASE1	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SH_BASE1	/;"	d
CONFIG_SYS_I2C_SH_BASE1	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_BASE1	/;"	d
CONFIG_SYS_I2C_SH_BASE2	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define CONFIG_SYS_I2C_SH_BASE2	/;"	d
CONFIG_SYS_I2C_SH_BASE2	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define CONFIG_SYS_I2C_SH_BASE2	/;"	d
CONFIG_SYS_I2C_SH_BASE2	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define CONFIG_SYS_I2C_SH_BASE2	/;"	d
CONFIG_SYS_I2C_SH_BASE2	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define CONFIG_SYS_I2C_SH_BASE2	/;"	d
CONFIG_SYS_I2C_SH_BASE2	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define CONFIG_SYS_I2C_SH_BASE2	/;"	d
CONFIG_SYS_I2C_SH_BASE2	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_BASE2	/;"	d
CONFIG_SYS_I2C_SH_BASE3	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define CONFIG_SYS_I2C_SH_BASE3	/;"	d
CONFIG_SYS_I2C_SH_BASE3	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define CONFIG_SYS_I2C_SH_BASE3	/;"	d
CONFIG_SYS_I2C_SH_BASE3	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_BASE3	/;"	d
CONFIG_SYS_I2C_SH_BASE4	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_BASE4	/;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/alt.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS /;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS /;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/gose.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	/;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	/;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS /;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/porter.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	/;"	d
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	include/configs/silk.h	/^#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/alt.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/gose.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/porter.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED0	include/configs/silk.h	/^#define CONFIG_SYS_I2C_SH_SPEED0	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/alt.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/gose.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/porter.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED1	include/configs/silk.h	/^#define CONFIG_SYS_I2C_SH_SPEED1	/;"	d
CONFIG_SYS_I2C_SH_SPEED2	include/configs/alt.h	/^#define CONFIG_SYS_I2C_SH_SPEED2	/;"	d
CONFIG_SYS_I2C_SH_SPEED2	include/configs/gose.h	/^#define CONFIG_SYS_I2C_SH_SPEED2	/;"	d
CONFIG_SYS_I2C_SH_SPEED2	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_SH_SPEED2	/;"	d
CONFIG_SYS_I2C_SH_SPEED2	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_SPEED2	/;"	d
CONFIG_SYS_I2C_SH_SPEED2	include/configs/porter.h	/^#define CONFIG_SYS_I2C_SH_SPEED2	/;"	d
CONFIG_SYS_I2C_SH_SPEED2	include/configs/silk.h	/^#define CONFIG_SYS_I2C_SH_SPEED2	/;"	d
CONFIG_SYS_I2C_SH_SPEED3	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_SPEED3	/;"	d
CONFIG_SYS_I2C_SH_SPEED4	include/configs/kzm9g.h	/^#define CONFIG_SYS_I2C_SH_SPEED4	/;"	d
CONFIG_SYS_I2C_SLAVE	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	drivers/i2c/fti2c010.c	/^#define CONFIG_SYS_I2C_SLAVE /;"	d	file:
CONFIG_SYS_I2C_SLAVE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/TQM5200.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/a4m072.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/ac14xx.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/alt.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/am335x_shc.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/aria.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/bfin_adi_common.h	/^#  define CONFIG_SYS_I2C_SLAVE /;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/blackvme.h	/^# define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/clearfog.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/cm5200.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/db-88f6720.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/ds414.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/ecovec.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/edminiv2.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/gose.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/ipek01.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/koelsch.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/maxbcm.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/mecp5123.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/motionpro.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_SLAVE /;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/porter.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/r0p7734.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/silk.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/spear-common.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/theadorable.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/v38b.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/configs/x600.h	/^#define CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE	include/i2c.h	/^#define	CONFIG_SYS_I2C_SLAVE	/;"	d
CONFIG_SYS_I2C_SLAVE1	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_SLAVE1	/;"	d
CONFIG_SYS_I2C_SLAVE1	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SLAVE1	/;"	d
CONFIG_SYS_I2C_SLAVE2	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_SLAVE2	/;"	d
CONFIG_SYS_I2C_SLAVE2	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SLAVE2	/;"	d
CONFIG_SYS_I2C_SLAVE3	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SLAVE3	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/TQM855M.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/TQM866M.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/TQM885D.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/ethernut5.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/km/km_arm.h	/^#define	CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/s5p_goni.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/snapper9260.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/trats.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_SOFT$/;"	d
CONFIG_SYS_I2C_SOFT	include/configs/vct.h	/^#define CONFIG_SYS_I2C_SOFT	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	drivers/i2c/soft_i2c.c	/^#define CONFIG_SYS_I2C_SOFT_SLAVE /;"	d	file:
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/TQM855M.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/TQM866M.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/TQM885D.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/blackstamp.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/ethernut5.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/km/km_arm.h	/^#define	CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/snapper9260.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/trats.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE	include/configs/vct.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_10	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_10	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_10	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_10	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_11	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_11	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_11	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_11	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_12	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_12	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_12	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_12	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_2	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_2	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_2	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_2	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_2	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_2	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_2	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_2 /;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_3	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_3	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_3	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_3	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_3	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_3	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_4	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_4	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_4	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_4	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_4	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_4	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_5	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_5	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_5	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_5	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_6	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_6	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_6	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_6	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_7	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_7	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_7	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_7	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_8	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_8	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_8	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_8	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_9	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_9	/;"	d
CONFIG_SYS_I2C_SOFT_SLAVE_9	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SLAVE_9	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	drivers/i2c/soft_i2c.c	/^#define CONFIG_SYS_I2C_SOFT_SPEED /;"	d	file:
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/TQM855M.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/TQM866M.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/TQM885D.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/blackstamp.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/ethernut5.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/km/km_arm.h	/^#define	CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/s5p_goni.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/snapper9260.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/trats.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED	include/configs/vct.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_10	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_10	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_10	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_10	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_11	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_11	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_11	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_11	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_12	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_12	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_12	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_12	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_2	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_2	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_2	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_2	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_2	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_2	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_2	include/configs/trats2.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_2 /;"	d
CONFIG_SYS_I2C_SOFT_SPEED_3	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_3	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_3	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_3	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_3	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_3	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_4	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_4	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_4	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_4	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_4	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_4	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_5	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_5	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_5	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_5	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_6	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_6	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_6	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_6	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_7	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_7	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_7	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_7	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_8	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_8	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_8	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_8	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_9	include/configs/hrcon.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_9	/;"	d
CONFIG_SYS_I2C_SOFT_SPEED_9	include/configs/strider.h	/^#define CONFIG_SYS_I2C_SOFT_SPEED_9	/;"	d
CONFIG_SYS_I2C_SPEED	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	arch/powerpc/cpu/mpc8260/i2c.c	/^#define	CONFIG_SYS_I2C_SPEED	/;"	d	file:
CONFIG_SYS_I2C_SPEED	cmd/eeprom.c	/^#define	CONFIG_SYS_I2C_SPEED	/;"	d	file:
CONFIG_SYS_I2C_SPEED	drivers/i2c/fti2c010.c	/^#define CONFIG_SYS_I2C_SPEED /;"	d	file:
CONFIG_SYS_I2C_SPEED	include/configs/M54418TWR.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/TQM5200.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/a4m072.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/ac14xx.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_I2C_SPEED /;"	d
CONFIG_SYS_I2C_SPEED	include/configs/am335x_shc.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/aria.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/bfin_adi_common.h	/^#  define CONFIG_SYS_I2C_SPEED /;"	d
CONFIG_SYS_I2C_SPEED	include/configs/blackvme.h	/^# define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/clearfog.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/cm5200.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/cm_fx6.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/db-88f6720.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/devkit3250.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/draco.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/ds414.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/edminiv2.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/el6x_common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/etamin.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/gw_ventana.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/iocon.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/ipek01.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/km82xx.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/maxbcm.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mecp5123.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/motionpro.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6slevk.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/mxs.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/novena.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/ot1200.h	/^#define CONFIG_SYS_I2C_SPEED /;"	d
CONFIG_SYS_I2C_SPEED	include/configs/pcm030.h	/^#define CONFIG_SYS_I2C_SPEED /;"	d
CONFIG_SYS_I2C_SPEED	include/configs/pcm058.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/pdm360ng.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/pengwyn.h	/^#define	CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/platinum.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/pxm2.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/r0p7734.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/rastaban.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/rut.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/spear-common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/sunxi-common.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/tbs2910.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/theadorable.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/thuban.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/titanium.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/tqma6.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/v38b.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/wandboard.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/warp.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/warp7.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/work_92105.h	/^#define CONFIG_SYS_I2C_SPEED /;"	d
CONFIG_SYS_I2C_SPEED	include/configs/x600.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/configs/xpress.h	/^#define CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED	include/i2c.h	/^#define	CONFIG_SYS_I2C_SPEED	/;"	d
CONFIG_SYS_I2C_SPEED1	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_SPEED1	/;"	d
CONFIG_SYS_I2C_SPEED1	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SPEED1	/;"	d
CONFIG_SYS_I2C_SPEED2	include/configs/axs10x.h	/^#define CONFIG_SYS_I2C_SPEED2	/;"	d
CONFIG_SYS_I2C_SPEED2	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SPEED2	/;"	d
CONFIG_SYS_I2C_SPEED3	include/configs/socfpga_common.h	/^#define CONFIG_SYS_I2C_SPEED3	/;"	d
CONFIG_SYS_I2C_TCA642X_ADDR	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_I2C_TCA642X_ADDR /;"	d
CONFIG_SYS_I2C_TCA642X_ADDR	include/tca642x.h	/^#define CONFIG_SYS_I2C_TCA642X_ADDR	/;"	d
CONFIG_SYS_I2C_TCA642X_BUS_NUM	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_I2C_TCA642X_BUS_NUM /;"	d
CONFIG_SYS_I2C_TCA642X_BUS_NUM	include/tca642x.h	/^#define CONFIG_SYS_I2C_TCA642X_BUS_NUM	/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/apalis_t30.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/beaver.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/cardhu.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/cei-tk1-som.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/colibri_t20.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/colibri_t30.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/dalmore.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/e2220-1170.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/jetson-tk1.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/nyan-big.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/p2371-0000.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/p2371-2180.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/p2571.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/p2771-0000.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/seaboard.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/tec-ng.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/trimslice.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/venice2.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_TEGRA	include/configs/whistler.h	/^#define CONFIG_SYS_I2C_TEGRA$/;"	d
CONFIG_SYS_I2C_UNIPHIER	drivers/i2c/Kconfig	/^config SYS_I2C_UNIPHIER$/;"	c	menu:I2C support
CONFIG_SYS_I2C_UNIPHIER_F	drivers/i2c/Kconfig	/^config SYS_I2C_UNIPHIER_F$/;"	c	menu:I2C support
CONFIG_SYS_I2C_UNIPHIER_F_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_UNIPHIER_F$/;"	c	menu:I2C support
CONFIG_SYS_I2C_UNIPHIER_MODULE	drivers/i2c/Kconfig	/^config SYS_I2C_UNIPHIER$/;"	c	menu:I2C support
CONFIG_SYS_I2C_W83782G_ADDR	include/configs/socrates.h	/^#define CONFIG_SYS_I2C_W83782G_ADDR	/;"	d
CONFIG_SYS_I2C_ZYNQ	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_SYS_I2C_ZYNQ$/;"	d
CONFIG_SYS_I2C_ZYNQ	include/configs/zynq-common.h	/^#define CONFIG_SYS_I2C_ZYNQ$/;"	d
CONFIG_SYS_I2C_ZYNQ_SLAVE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_I2C_ZYNQ_SLAVE	/;"	d
CONFIG_SYS_I2C_ZYNQ_SLAVE	include/configs/zynq-common.h	/^# define CONFIG_SYS_I2C_ZYNQ_SLAVE	/;"	d
CONFIG_SYS_I2C_ZYNQ_SPEED	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_I2C_ZYNQ_SPEED	/;"	d
CONFIG_SYS_I2C_ZYNQ_SPEED	include/configs/zynq-common.h	/^# define CONFIG_SYS_I2C_ZYNQ_SPEED	/;"	d
CONFIG_SYS_I2ODMA_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2ODMA_BASE	/;"	d
CONFIG_SYS_I2ODMA_PHYS_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_I2ODMA_PHYS_ADDR	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/strider.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT0L	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/strider.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT0U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT0U	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/strider.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT1L	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/strider.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT1U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT1U	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/strider.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT2L	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/strider.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT2U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT2U	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/strider.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT3L	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/hrcon.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/strider.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT3U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT3U	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT4L	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT4U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT4U	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT5L /;"	d
CONFIG_SYS_IBAT5L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/suvd3.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/suvd3.h	/^#define CONFIG_SYS_IBAT5L /;"	d
CONFIG_SYS_IBAT5L	include/configs/tuxx1.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT5L	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT5U /;"	d
CONFIG_SYS_IBAT5U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/suvd3.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/suvd3.h	/^#define CONFIG_SYS_IBAT5U /;"	d
CONFIG_SYS_IBAT5U	include/configs/tuxx1.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT5U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT5U	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT6L /;"	d
CONFIG_SYS_IBAT6L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/suvd3.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/tuxx1.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT6L	/;"	d
CONFIG_SYS_IBAT6L_EARLY	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT6L_EARLY	/;"	d
CONFIG_SYS_IBAT6L_EARLY	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT6L_EARLY	/;"	d
CONFIG_SYS_IBAT6L_EARLY	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT6L_EARLY	/;"	d
CONFIG_SYS_IBAT6L_EARLY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT6L_EARLY	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT6U /;"	d
CONFIG_SYS_IBAT6U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/suvd3.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/tuxx1.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT6U	/;"	d
CONFIG_SYS_IBAT6U_EARLY	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT6U_EARLY	/;"	d
CONFIG_SYS_IBAT6U_EARLY	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT6U_EARLY	/;"	d
CONFIG_SYS_IBAT6U_EARLY	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT6U_EARLY	/;"	d
CONFIG_SYS_IBAT6U_EARLY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT6U_EARLY	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT7L /;"	d
CONFIG_SYS_IBAT7L	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT7L /;"	d
CONFIG_SYS_IBAT7L	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/tuxx1.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7L	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT7L	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IBAT7U /;"	d
CONFIG_SYS_IBAT7U	include/configs/TQM834x.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/ids8313.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/km8360.h	/^#define CONFIG_SYS_IBAT7U /;"	d
CONFIG_SYS_IBAT7U	include/configs/sbc8349.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/tuxx1.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/ve8313.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/vme8349.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_IBAT7U	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IBAT7U	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M52277EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5235EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5249EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5272C3.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5275EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5282EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M53017EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5329EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5373EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M54418TWR.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M54451EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M54455EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5475EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/M5485EVB.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/amcore.h	/^#define CONFIG_SYS_ICACHE_INV /;"	d
CONFIG_SYS_ICACHE_INV	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/cobra5272.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_INV	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_ICACHE_INV	/;"	d
CONFIG_SYS_ICACHE_LINESZ	include/configs/atngw100.h	/^#define CONFIG_SYS_ICACHE_LINESZ	/;"	d
CONFIG_SYS_ICACHE_LINESZ	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_ICACHE_LINESZ	/;"	d
CONFIG_SYS_ICACHE_LINESZ	include/configs/atstk1002.h	/^#define CONFIG_SYS_ICACHE_LINESZ	/;"	d
CONFIG_SYS_ICACHE_LINESZ	include/configs/grasshopper.h	/^#define CONFIG_SYS_ICACHE_LINESZ	/;"	d
CONFIG_SYS_ICACHE_LINE_SIZE	arch/mips/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_ICACHE_LINE_SIZE	board/dbau1x00/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE	board/micronas/vct/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE	board/pb1x00/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE	board/qca/ap121/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE	board/qca/ap143/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE	board/qemu-mips/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	arch/mips/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/dbau1x00/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/micronas/vct/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/pb1x00/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/qca/ap121/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/qca/ap143/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/qemu-mips/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_LINE_SIZE_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
CONFIG_SYS_ICACHE_OFF	arch/arc/Kconfig	/^config SYS_ICACHE_OFF$/;"	c	menu:ARC architecture
CONFIG_SYS_ICACHE_OFF	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF	include/configs/devkit3250.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF	include/configs/smartweb.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF	include/configs/taurus.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF	include/configs/work_92105.h	/^#define CONFIG_SYS_ICACHE_OFF$/;"	d
CONFIG_SYS_ICACHE_OFF_MODULE	arch/arc/Kconfig	/^config SYS_ICACHE_OFF$/;"	c	menu:ARC architecture
CONFIG_SYS_ICACHE_SACR_VALUE	arch/powerpc/cpu/ppc4xx/start.S	/^# define CONFIG_SYS_ICACHE_SACR_VALUE	/;"	d	file:
CONFIG_SYS_ICACHE_SIZE	arch/mips/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_ICACHE_SIZE	board/dbau1x00/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE	board/micronas/vct/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE	board/pb1x00/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE	board/qca/ap121/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE	board/qca/ap143/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE	board/qemu-mips/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	arch/mips/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c	menu:MIPS architecture
CONFIG_SYS_ICACHE_SIZE_MODULE	board/dbau1x00/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	board/micronas/vct/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	board/pb1x00/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	board/qca/ap121/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	board/qca/ap143/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	board/qemu-mips/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICACHE_SIZE_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
CONFIG_SYS_ICS8N3QV01_I2C	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_ICS8N3QV01_I2C	/;"	d
CONFIG_SYS_ICS8N3QV01_I2C	include/configs/hrcon.h	/^#define CONFIG_SYS_ICS8N3QV01_I2C	/;"	d
CONFIG_SYS_ICS8N3QV01_I2C	include/configs/iocon.h	/^#define CONFIG_SYS_ICS8N3QV01_I2C	/;"	d
CONFIG_SYS_ICS8N3QV01_I2C	include/configs/strider.h	/^#define CONFIG_SYS_ICS8N3QV01_I2C	/;"	d
CONFIG_SYS_ICTRL	include/configs/PATI.h	/^#define CONFIG_SYS_ICTRL	/;"	d
CONFIG_SYS_IDE_MAXBUS	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/MIP405.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/PIP405.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/PLU405.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM5200.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM823L.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM823M.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM850L.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM850M.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM855L.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM855M.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM860L.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM860M.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM862L.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM862M.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM866M.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/TQM885D.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/a4m072.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/ap325rxa.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/aria.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/dbau1x00.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/edminiv2.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/inka4x0.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/ipek01.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/lacie_kw.h	/^#define CONFIG_SYS_IDE_MAXBUS /;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/lsxl.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/malta.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/motionpro.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/ms7720se.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/pcm030.h	/^#define CONFIG_SYS_IDE_MAXBUS /;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/qemu-mips.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/qemu-x86.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/r2dplus.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/r7780mp.h	/^#define CONFIG_SYS_IDE_MAXBUS /;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/sandbox.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXBUS	include/configs/v38b.h	/^#define CONFIG_SYS_IDE_MAXBUS	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/MIP405.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/PIP405.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/PLU405.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM5200.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM823L.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM823M.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM850L.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM850M.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM855L.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM855M.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM860L.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM860M.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM862L.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM862M.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM866M.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/TQM885D.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/a4m072.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/aria.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/dbau1x00.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/edminiv2.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/inka4x0.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/ipek01.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/lacie_kw.h	/^#define CONFIG_SYS_IDE_MAXDEVICE /;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/lsxl.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/malta.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/motionpro.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/ms7720se.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/pcm030.h	/^#define CONFIG_SYS_IDE_MAXDEVICE /;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/qemu-x86.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/r2dplus.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/r7780mp.h	/^#define CONFIG_SYS_IDE_MAXDEVICE /;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/sandbox.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_IDE_MAXDEVICE	include/configs/v38b.h	/^#define CONFIG_SYS_IDE_MAXDEVICE	/;"	d
CONFIG_SYS_ID_EEPROM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_ID_EEPROM$/;"	d
CONFIG_SYS_ID_EEPROM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_ID_EEPROM$/;"	d
CONFIG_SYS_ID_EEPROM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_ID_EEPROM$/;"	d
CONFIG_SYS_IFC_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_IFC_ADDR	/;"	d
CONFIG_SYS_IFC_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_IFC_ADDR	/;"	d
CONFIG_SYS_IFC_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_IFC_ADDR	/;"	d
CONFIG_SYS_IFC_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_IFC_ADDR /;"	d
CONFIG_SYS_IFC_CCR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_IFC_CCR	/;"	d
CONFIG_SYS_IFC_CCR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_IFC_CCR	/;"	d
CONFIG_SYS_IFC_CCR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_IFC_CCR	/;"	d
CONFIG_SYS_IFC_CCR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_IFC_CCR	/;"	d
CONFIG_SYS_IFC_CCR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_IFC_CCR	/;"	d
CONFIG_SYS_IMMR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	arch/powerpc/cpu/mpc83xx/start.S	/^#define CONFIG_SYS_IMMR /;"	d	file:
CONFIG_SYS_IMMR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M52277EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5235EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5275EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M53017EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5329EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5373EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/PATI.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM823L.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM823M.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM834x.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM850L.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM850M.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM855L.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM855M.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM860L.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM860M.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM862L.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM862M.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM866M.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/TQM885D.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/ac14xx.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/aria.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/hrcon.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/ids8313.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/km82xx.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/mecp5123.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/pdm360ng.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/sbc8349.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/sbc8641d.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/strider.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/ve8313.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/vme8349.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_IMMR	/;"	d
CONFIG_SYS_IMMR	include/mpc85xx.h	/^#define CONFIG_SYS_IMMR /;"	d
CONFIG_SYS_INIT_DBCR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_INIT_DBCR /;"	d
CONFIG_SYS_INIT_DBCR	include/configs/socrates.h	/^#define CONFIG_SYS_INIT_DBCR /;"	d
CONFIG_SYS_INIT_DCACHE_CS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_INIT_DCACHE_CS	/;"	d
CONFIG_SYS_INIT_DCACHE_CS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_INIT_DCACHE_CS	/;"	d
CONFIG_SYS_INIT_DCACHE_CS	include/configs/io64.h	/^#define CONFIG_SYS_INIT_DCACHE_CS	/;"	d
CONFIG_SYS_INIT_DCACHE_CS	include/configs/kilauea.h	/^#define CONFIG_SYS_INIT_DCACHE_CS	/;"	d
CONFIG_SYS_INIT_DCACHE_CS	include/configs/makalu.h	/^#define CONFIG_SYS_INIT_DCACHE_CS	/;"	d
CONFIG_SYS_INIT_DCACHE_CS	include/configs/walnut.h	/^#define CONFIG_SYS_INIT_DCACHE_CS	/;"	d
CONFIG_SYS_INIT_DCACHE_PBxAR	arch/powerpc/cpu/ppc4xx/start.S	/^#  define CONFIG_SYS_INIT_DCACHE_PBxAR	/;"	d	file:
CONFIG_SYS_INIT_DCACHE_PBxCR	arch/powerpc/cpu/ppc4xx/start.S	/^#  define CONFIG_SYS_INIT_DCACHE_PBxCR	/;"	d	file:
CONFIG_SYS_INIT_EXTRA_SIZE	include/configs/io64.h	/^# define CONFIG_SYS_INIT_EXTRA_SIZE	/;"	d
CONFIG_SYS_INIT_EXTRA_SIZE	include/configs/kilauea.h	/^# define CONFIG_SYS_INIT_EXTRA_SIZE	/;"	d
CONFIG_SYS_INIT_EXTRA_SIZE	include/configs/makalu.h	/^# define CONFIG_SYS_INIT_EXTRA_SIZE	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2CSR0	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_L2CSR0	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR	include/configs/sbc8548.h	/^#define CONFIG_SYS_INIT_L2_ADDR	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_ADDR_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_L2_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L2_END	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_L2_END	/;"	d
CONFIG_SYS_INIT_L3_ADDR	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_L3_ADDR	/;"	d
CONFIG_SYS_INIT_L3_ADDR_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_L3_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L3_ADDR_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_L3_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L3_ADDR_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_L3_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L3_ADDR_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_L3_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_L3_END	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_L3_END /;"	d
CONFIG_SYS_INIT_L3_END	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_L3_END /;"	d
CONFIG_SYS_INIT_L3_END	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_L3_END /;"	d
CONFIG_SYS_INIT_L3_END	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_L3_END /;"	d
CONFIG_SYS_INIT_L3_VADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_L3_VADDR	/;"	d
CONFIG_SYS_INIT_RAM1_ADDR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_RAM1_ADDR	/;"	d
CONFIG_SYS_INIT_RAM1_ADDR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_RAM1_ADDR	/;"	d
CONFIG_SYS_INIT_RAM1_CTRL	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_RAM1_CTRL	/;"	d
CONFIG_SYS_INIT_RAM1_CTRL	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_RAM1_CTRL	/;"	d
CONFIG_SYS_INIT_RAM1_END	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_RAM1_END	/;"	d
CONFIG_SYS_INIT_RAM1_END	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_RAM1_END	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/autoconf.mk	/^CONFIG_SYS_INIT_RAM_ADDR=0x0$/;"	m
CONFIG_SYS_INIT_RAM_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M52277EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5235EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5249EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5272C3.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5275EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M53017EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5329EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5373EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MIP405.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/PATI.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/PIP405.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM5200.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM823L.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM823M.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM834x.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM850L.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM850M.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM855L.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM860L.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM860M.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM862L.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM862M.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/VOM405.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/a3m071.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/a4m072.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ac14xx.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/acadia.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/am3517_crane.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/am3517_evm.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/amcore.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ap121.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ap143.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/aria.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/bubinga.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/canmb.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cm5200.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cm_fx6.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cm_t35.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cm_t3517.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cobra5272.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/colibri_vf.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/dlvision.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/el6x_common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/flea3.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/gw_ventana.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/hrcon.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/icon.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ids8313.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/inka4x0.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/intip.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/io.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/io64.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/iocon.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ipek01.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/jupiter.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/katmai.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/kilauea.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/km82xx.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/kzm9g.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/luan.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/m53evk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/makalu.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mcx.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mecp5123.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/motionpro.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/munices.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx25pdk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx31ads.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx31pdk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx51evk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx53ard.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx53evk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx53loco.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx53smd.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6slevk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/mxs.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/neo.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/novena.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/omap3_evm.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/omap3_overo.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ot1200.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/pcm030.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/pcm052.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/pcm058.h	/^#define CONFIG_SYS_INIT_RAM_ADDR /;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/platinum.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/redwood.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/s32v234evb.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/sbc8349.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/sbc8548.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/sbc8641d.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/socfpga_common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/socrates.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/spear-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/strider.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/stv0991.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/t3corp.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tao3530.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tbs2910.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tegra-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/titanium.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tqma6.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/tricorder.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ts4800.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/udoo.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/usbarmory.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/v38b.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/ve8313.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/vf610twr.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/vme8349.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/walnut.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/wandboard.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/warp.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/warp7.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/x600.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/xpress.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/yosemite.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/yucca.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	include/configs/zynq-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR	/;"	d
CONFIG_SYS_INIT_RAM_ADDR	spl/include/autoconf.mk	/^CONFIG_SYS_INIT_RAM_ADDR=0x0$/;"	m
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW /;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M52277EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M5235EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M53017EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M5329EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M5373EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M54418TWR.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M54451EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_CTRL	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_INIT_RAM_CTRL	/;"	d
CONFIG_SYS_INIT_RAM_DCACHE	include/configs/bamboo.h	/^#define CONFIG_SYS_INIT_RAM_DCACHE	/;"	d
CONFIG_SYS_INIT_RAM_DCACHE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_INIT_RAM_DCACHE	/;"	d
CONFIG_SYS_INIT_RAM_DCACHE	include/configs/lwmon5.h	/^#define CONFIG_SYS_INIT_RAM_DCACHE	/;"	d
CONFIG_SYS_INIT_RAM_DCACHE	include/configs/yosemite.h	/^#define CONFIG_SYS_INIT_RAM_DCACHE	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK /;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/P1023RDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/TQM834x.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/hrcon.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/ids8313.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/sbc8349.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/sbc8548.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/sbc8641d.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/socrates.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/strider.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_RAM_LOCK$/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/ve8313.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/vme8349.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/xpedite517x.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/xpedite520x.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/xpedite537x.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_LOCK	include/configs/xpedite550x.h	/^#define CONFIG_SYS_INIT_RAM_LOCK	/;"	d
CONFIG_SYS_INIT_RAM_PATTERN	arch/powerpc/cpu/ppc4xx/start.S	/^#  define CONFIG_SYS_INIT_RAM_PATTERN	/;"	d	file:
CONFIG_SYS_INIT_RAM_SIZE	include/autoconf.mk	/^CONFIG_SYS_INIT_RAM_SIZE=0x8000$/;"	m
CONFIG_SYS_INIT_RAM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5272C3.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/PATI.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM823L.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM823M.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM850L.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM850M.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM855L.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM855M.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM860L.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM860M.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM862L.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM862M.h	/^#define	CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/acadia.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/amcore.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ap121.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ap143.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/bamboo.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/bubinga.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/canmb.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/canyonlands.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cobra5272.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/dlvision.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/el6x_common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/flea3.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/gw_ventana.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/hikey.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/icon.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/integrator-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/intip.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/io.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/io64.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/iocon.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/katmai.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/kilauea.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/km82xx.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/kzm9g.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/luan.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/lwmon5.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/makalu.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/munices.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx31ads.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx51evk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx53ard.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx53evk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx53loco.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx53smd.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6slevk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/mxs.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/neo.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/novena.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ot1200.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/pcm052.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/pcm058.h	/^#define CONFIG_SYS_INIT_RAM_SIZE /;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/platinum.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/redwood.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/sequoia.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/spear-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/stv0991.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/t3corp.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tbs2910.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tegra-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/titanium.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tqma6.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ts4800.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/udoo.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/usbarmory.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/v38b.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/vf610twr.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/walnut.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/wandboard.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/warp.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/warp7.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/x600.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/xpress.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/yosemite.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/yucca.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	include/configs/zynq-common.h	/^#define CONFIG_SYS_INIT_RAM_SIZE	/;"	d
CONFIG_SYS_INIT_RAM_SIZE	spl/include/autoconf.mk	/^CONFIG_SYS_INIT_RAM_SIZE=0x8000$/;"	m
CONFIG_SYS_INIT_SP_ADDR	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	arch/mips/cpu/start.S	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d	file:
CONFIG_SYS_INIT_SP_ADDR	include/autoconf.mk	/^CONFIG_SYS_INIT_SP_ADDR="(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)"$/;"	m
CONFIG_SYS_INIT_SP_ADDR	include/configs/PATI.h	/^#define	CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/VCMA9.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/alt.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/am3517_crane.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/am3517_evm.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ap121.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ap143.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/apf27.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/arndale.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/aspenite.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9260ek.h	/^# define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9n12ek.h	/^# define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/atngw100.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/atstk1002.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/axs10x.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/blanche.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/calimain.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/cm_fx6.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/cm_t35.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/cm_t3517.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/colibri_vf.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/corvus.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/da850evm.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/devkit3250.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ea20.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/edb93xx.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/edminiv2.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/el6x_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/espresso7420.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ethernut5.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/exynos5250-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/flea3.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/gose.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/gplugd.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/grasshopper.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/gw_ventana.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/h2200.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/highbank.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/hikey.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/integrator-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ipam390.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/kc1.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/koelsch.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/kzm9g.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/lager.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/legoev3.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/m53evk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mcx.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/meesc.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx25pdk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx31ads.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx31pdk.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx51evk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx53ard.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx53evk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx53loco.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx53smd.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6slevk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/mxs.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/novena.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/nsim.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/odroid.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/odroid_xu3.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/omap3_evm.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/origen.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ot1200.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pcm052.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pcm058.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/peach-pi.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/peach-pit.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/picosam9g45.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/platinum.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pm9261.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pm9263.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/pm9g45.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/porter.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/rk3036_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/rk3288_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/rk3399_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/rpi.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/s32v234evb.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/s5p_goni.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/silk.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/smartweb.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/smartweb.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/smdk2410.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/smdk5420.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/smdkc100.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/smdkv310.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/snapper9260.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/snapper9g45.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sniper.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/socfpga_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/spear-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/stout.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/stv0991.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tao3530.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/taurus.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tb100.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tbs2910.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tegra-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/titanium.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tqma6.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/trats.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/trats2.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/tricorder.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/ts4800.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/udoo.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/uniphier.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/usb_a9263.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/usbarmory.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/vexpress_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/vf610twr.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/vinco.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/wandboard.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/warp.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/warp7.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/woodburn_common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/work_92105.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/x600.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/xpress.h	/^#define CONFIG_SYS_INIT_SP_ADDR /;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/zipitz2.h	/^#define	CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/zmx25.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	include/configs/zynq-common.h	/^#define CONFIG_SYS_INIT_SP_ADDR	/;"	d
CONFIG_SYS_INIT_SP_ADDR	spl/include/autoconf.mk	/^CONFIG_SYS_INIT_SP_ADDR="(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)"$/;"	m
CONFIG_SYS_INIT_SP_OFFSET	include/autoconf.mk	/^CONFIG_SYS_INIT_SP_OFFSET="(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)"$/;"	m
CONFIG_SYS_INIT_SP_OFFSET	include/configs/B4860QDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/CPCI4052.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M52277EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5235EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5249EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5272C3.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5275EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5282EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M53017EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5329EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5373EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M54418TWR.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M54451EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MIP405.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/P1010RDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/P1022DS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/P1023RDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/P2041RDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/PIP405.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/PLU405.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/PMC405DE.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/PMC440.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T102xQDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T102xRDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T1040QDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T104xRDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM5200.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM823L.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM823M.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM834x.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM850L.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM850M.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM855L.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM855M.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM860L.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM860M.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM862L.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM862M.h	/^#define	CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM866M.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/TQM885D.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/UCP1020.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/VOM405.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/a3m071.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/a4m072.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ac14xx.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/acadia.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/amcore.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/aria.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/bamboo.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/boston.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/bubinga.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/canmb.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/canyonlands.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/cm5200.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/cm_fx6.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/cobra5272.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/colibri_vf.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/controlcenterd.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/corenet_ds.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/cyrus.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/dbau1x00.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/dlvision.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/el6x_common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/grsim.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/gw_ventana.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/icon.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ids8313.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/inka4x0.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/intip.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/io.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/io64.h	/^# define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/io64.h	/^# define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/iocon.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ipek01.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/jupiter.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/katmai.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/kilauea.h	/^# define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/km82xx.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/luan.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/lwmon5.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/m53evk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/makalu.h	/^# define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/malta.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mecp5123.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/motionpro.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/munices.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx25pdk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx51evk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx53ard.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx53evk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx53loco.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx53smd.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6slevk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/mxs.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/neo.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/novena.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ot1200.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/p1_twr.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/pb1x00.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/pcm030.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/pcm052.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/pcm058.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/platinum.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/qemu-mips.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/redwood.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/s32v234evb.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/sbc8349.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/sbc8548.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/sbc8641d.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/sequoia.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/socfpga_common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/socrates.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/spear-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/stv0991.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/sunxi-common.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/t3corp.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/t4qds.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/tbs2910.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/titanium.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/tqma6.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ts4800.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/udoo.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/usbarmory.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/v38b.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/vct.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/ve8313.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/vf610twr.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/vme8349.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/walnut.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/wandboard.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/warp.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/warp7.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/x600.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xpedite1000.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xpedite517x.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xpedite520x.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xpedite537x.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xpedite550x.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/xpress.h	/^#define CONFIG_SYS_INIT_SP_OFFSET /;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/yosemite.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	include/configs/yucca.h	/^#define CONFIG_SYS_INIT_SP_OFFSET	/;"	d
CONFIG_SYS_INIT_SP_OFFSET	spl/include/autoconf.mk	/^CONFIG_SYS_INIT_SP_OFFSET="(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)"$/;"	m
CONFIG_SYS_INPUT_CLKSRC	include/configs/M52277EVB.h	/^#define CONFIG_SYS_INPUT_CLKSRC	/;"	d
CONFIG_SYS_INTA_FAKE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_INTA_FAKE	/;"	d
CONFIG_SYS_INTERLAKEN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_INTERLAKEN$/;"	d
CONFIG_SYS_INTERLAKEN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_INTERLAKEN$/;"	d
CONFIG_SYS_INTERLAKEN	include/configs/T4240QDS.h	/^#define CONFIG_SYS_INTERLAKEN$/;"	d
CONFIG_SYS_INTERLAKEN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_INTERLAKEN$/;"	d
CONFIG_SYS_INTRAM_BASE	include/configs/atngw100.h	/^#define CONFIG_SYS_INTRAM_BASE	/;"	d
CONFIG_SYS_INTRAM_BASE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_INTRAM_BASE	/;"	d
CONFIG_SYS_INTRAM_BASE	include/configs/atstk1002.h	/^#define CONFIG_SYS_INTRAM_BASE	/;"	d
CONFIG_SYS_INTRAM_BASE	include/configs/grasshopper.h	/^#define CONFIG_SYS_INTRAM_BASE	/;"	d
CONFIG_SYS_INTRAM_SIZE	include/configs/atngw100.h	/^#define CONFIG_SYS_INTRAM_SIZE	/;"	d
CONFIG_SYS_INTRAM_SIZE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_INTRAM_SIZE	/;"	d
CONFIG_SYS_INTRAM_SIZE	include/configs/atstk1002.h	/^#define CONFIG_SYS_INTRAM_SIZE	/;"	d
CONFIG_SYS_INTRAM_SIZE	include/configs/grasshopper.h	/^#define CONFIG_SYS_INTRAM_SIZE	/;"	d
CONFIG_SYS_INTR_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_INTR_BASE	/;"	d
CONFIG_SYS_INTR_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_INTR_BASE /;"	d
CONFIG_SYS_INTSRAM	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INTSRAM	/;"	d
CONFIG_SYS_INTSRAM	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INTSRAM	/;"	d
CONFIG_SYS_INTSRAMSZ	include/configs/M5475EVB.h	/^#define CONFIG_SYS_INTSRAMSZ	/;"	d
CONFIG_SYS_INTSRAMSZ	include/configs/M5485EVB.h	/^#define CONFIG_SYS_INTSRAMSZ	/;"	d
CONFIG_SYS_INT_FLASH_BASE	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_INT_FLASH_BASE	/;"	d
CONFIG_SYS_INT_FLASH_BASE	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_INT_FLASH_BASE	/;"	d
CONFIG_SYS_INT_FLASH_ENABLE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_INT_FLASH_ENABLE	/;"	d
CONFIG_SYS_INT_FLASH_ENABLE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_INT_FLASH_ENABLE	/;"	d
CONFIG_SYS_IOCTRL_MUX_DDR	include/configs/ac14xx.h	/^#define CONFIG_SYS_IOCTRL_MUX_DDR	/;"	d
CONFIG_SYS_IOCTRL_MUX_DDR	include/configs/aria.h	/^#define CONFIG_SYS_IOCTRL_MUX_DDR	/;"	d
CONFIG_SYS_IOCTRL_MUX_DDR	include/configs/mecp5123.h	/^#define CONFIG_SYS_IOCTRL_MUX_DDR	/;"	d
CONFIG_SYS_IOCTRL_MUX_DDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_IOCTRL_MUX_DDR	/;"	d
CONFIG_SYS_IOCTRL_MUX_DDR	include/configs/pdm360ng.h	/^#define CONFIG_SYS_IOCTRL_MUX_DDR	/;"	d
CONFIG_SYS_IO_BASE	include/configs/intip.h	/^#define CONFIG_SYS_IO_BASE	/;"	d
CONFIG_SYS_IO_BASE	include/configs/xtfpga.h	/^#define CONFIG_SYS_IO_BASE	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/TQM5200.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/a3m071.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/cm5200.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/inka4x0.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/ipek01.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/motionpro.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK$/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	include/configs/pcm030.h	/^#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK	/;"	d
CONFIG_SYS_IPBSPEED_133	include/configs/munices.h	/^#define  CONFIG_SYS_IPBSPEED_133	/;"	d
CONFIG_SYS_IR_REG_BASE_ADDR	include/configs/bubinga.h	/^#define	CONFIG_SYS_IR_REG_BASE_ADDR	/;"	d
CONFIG_SYS_IR_REG_BASE_ADDR	include/configs/walnut.h	/^#define CONFIG_SYS_IR_REG_BASE_ADDR	/;"	d
CONFIG_SYS_ISA_IO	include/configs/x86-common.h	/^#define CONFIG_SYS_ISA_IO /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/MIP405.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/P1022DS.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/PIP405.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS /;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/malta.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS	/;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/sequoia.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS	/;"	d
CONFIG_SYS_ISA_IO_BASE_ADDRESS	include/configs/x86-common.h	/^#define CONFIG_SYS_ISA_IO_BASE_ADDRESS	/;"	d
CONFIG_SYS_ISA_IO_OFFSET	cmd/fdc.c	/^#define CONFIG_SYS_ISA_IO_OFFSET /;"	d	file:
CONFIG_SYS_ISA_IO_STRIDE	cmd/fdc.c	/^#define CONFIG_SYS_ISA_IO_STRIDE /;"	d	file:
CONFIG_SYS_ISB	include/mpc5xx.h	/^#define CONFIG_SYS_ISB	/;"	d
CONFIG_SYS_ISRAM_BASE	include/configs/icon.h	/^#define CONFIG_SYS_ISRAM_BASE	/;"	d
CONFIG_SYS_ISRAM_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_ISRAM_BASE	/;"	d
CONFIG_SYS_ISRAM_BASE	include/configs/luan.h	/^#define CONFIG_SYS_ISRAM_BASE	/;"	d
CONFIG_SYS_ISRAM_BASE	include/configs/redwood.h	/^#define CONFIG_SYS_ISRAM_BASE	/;"	d
CONFIG_SYS_ISRAM_BASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_ISRAM_BASE	/;"	d
CONFIG_SYS_ISRAM_BASE	include/configs/yucca.h	/^#define CONFIG_SYS_ISRAM_BASE	/;"	d
CONFIG_SYS_IVM_EEPROM_ADR	include/configs/km/keymile-common.h	/^#define	CONFIG_SYS_IVM_EEPROM_ADR	/;"	d
CONFIG_SYS_IVM_EEPROM_MAX_LEN	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_IVM_EEPROM_MAX_LEN	/;"	d
CONFIG_SYS_IVM_EEPROM_PAGE_LEN	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_IVM_EEPROM_PAGE_LEN	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/am3517_crane.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK /;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/mcx.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/omap3_evm.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/pm9261.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_BANK	include/configs/pm9263.h	/^#define CONFIG_SYS_JFFS2_FIRST_BANK	/;"	d
CONFIG_SYS_JFFS2_FIRST_SECTOR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_JFFS2_FIRST_SECTOR /;"	d
CONFIG_SYS_JFFS2_FIRST_SECTOR	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_JFFS2_FIRST_SECTOR	/;"	d
CONFIG_SYS_JFFS2_FIRST_SECTOR	include/configs/dnp5370.h	/^#define CONFIG_SYS_JFFS2_FIRST_SECTOR /;"	d
CONFIG_SYS_JFFS2_FIRST_SECTOR	include/configs/pm9261.h	/^#define CONFIG_SYS_JFFS2_FIRST_SECTOR	/;"	d
CONFIG_SYS_JFFS2_FIRST_SECTOR	include/configs/pm9263.h	/^#define CONFIG_SYS_JFFS2_FIRST_SECTOR	/;"	d
CONFIG_SYS_JFFS2_MEM_NAND	include/configs/am3517_crane.h	/^#define CONFIG_SYS_JFFS2_MEM_NAND$/;"	d
CONFIG_SYS_JFFS2_MEM_NAND	include/configs/mcx.h	/^#define CONFIG_SYS_JFFS2_MEM_NAND$/;"	d
CONFIG_SYS_JFFS2_MEM_NAND	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_JFFS2_MEM_NAND$/;"	d
CONFIG_SYS_JFFS2_MEM_NAND	include/configs/omap3_evm.h	/^#define CONFIG_SYS_JFFS2_MEM_NAND$/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS /;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/mcx.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/pm9261.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_JFFS2_NUM_BANKS	include/configs/pm9263.h	/^#define CONFIG_SYS_JFFS2_NUM_BANKS	/;"	d
CONFIG_SYS_KBYTES_SDRAM	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_KBYTES_SDRAM	/;"	d
CONFIG_SYS_KBYTES_SDRAM	include/configs/luan.h	/^#define CONFIG_SYS_KBYTES_SDRAM	/;"	d
CONFIG_SYS_KBYTES_SDRAM	include/configs/yosemite.h	/^#define CONFIG_SYS_KBYTES_SDRAM /;"	d
CONFIG_SYS_KEY_REG_BASE_ADDR	include/configs/bubinga.h	/^#define	CONFIG_SYS_KEY_REG_BASE_ADDR	/;"	d
CONFIG_SYS_KEY_REG_BASE_ADDR	include/configs/walnut.h	/^#define CONFIG_SYS_KEY_REG_BASE_ADDR	/;"	d
CONFIG_SYS_KMBEC_FPGA_BASE	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_KMBEC_FPGA_BASE	/;"	d
CONFIG_SYS_KMBEC_FPGA_BASE	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_KMBEC_FPGA_BASE	/;"	d
CONFIG_SYS_KMBEC_FPGA_BASE	include/configs/km82xx.h	/^#define CONFIG_SYS_KMBEC_FPGA_BASE	/;"	d
CONFIG_SYS_KMBEC_FPGA_BASE	include/configs/km8360.h	/^#define CONFIG_SYS_KMBEC_FPGA_BASE	/;"	d
CONFIG_SYS_KMBEC_FPGA_SIZE	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_KMBEC_FPGA_SIZE	/;"	d
CONFIG_SYS_KMBEC_FPGA_SIZE	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_KMBEC_FPGA_SIZE	/;"	d
CONFIG_SYS_KMBEC_FPGA_SIZE	include/configs/km82xx.h	/^#define CONFIG_SYS_KMBEC_FPGA_SIZE	/;"	d
CONFIG_SYS_KMBEC_FPGA_SIZE	include/configs/km8360.h	/^#define CONFIG_SYS_KMBEC_FPGA_SIZE	/;"	d
CONFIG_SYS_KWD_CONFIG	arch/arm/mach-kirkwood/include/mach/config.h	/^#define	CONFIG_SYS_KWD_CONFIG	/;"	d
CONFIG_SYS_KWD_CONFIG	arch/arm/mach-mvebu/include/mach/config.h	/^#define	CONFIG_SYS_KWD_CONFIG	/;"	d
CONFIG_SYS_KWD_CONFIG	include/configs/km_kirkwood.h	/^#define CONFIG_SYS_KWD_CONFIG /;"	d
CONFIG_SYS_KWD_CONFIG	include/configs/lacie_kw.h	/^#define CONFIG_SYS_KWD_CONFIG /;"	d
CONFIG_SYS_KWD_CONFIG	include/configs/lsxl.h	/^#define CONFIG_SYS_KWD_CONFIG /;"	d
CONFIG_SYS_KW_SPI_MPP	include/configs/km/km_arm.h	/^#define CONFIG_SYS_KW_SPI_MPP	/;"	d
CONFIG_SYS_L2	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_L2$/;"	d
CONFIG_SYS_L2	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_L2$/;"	d
CONFIG_SYS_L2	include/configs/sbc8641d.h	/^#define CONFIG_SYS_L2$/;"	d
CONFIG_SYS_L2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_L2$/;"	d
CONFIG_SYS_L2CACHE_OFF	arch/arm/Kconfig	/^config SYS_L2CACHE_OFF$/;"	c	menu:ARM architecture
CONFIG_SYS_L2CACHE_OFF	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_L2CACHE_OFF$/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_L2CACHE_OFF	/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/odroid.h	/^#define CONFIG_SYS_L2CACHE_OFF$/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_L2CACHE_OFF	/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/tegra-common.h	/^#define CONFIG_SYS_L2CACHE_OFF	/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/trats.h	/^#define CONFIG_SYS_L2CACHE_OFF$/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/trats2.h	/^#define CONFIG_SYS_L2CACHE_OFF$/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/vexpress_common.h	/^#define CONFIG_SYS_L2CACHE_OFF	/;"	d
CONFIG_SYS_L2CACHE_OFF	include/configs/zynq-common.h	/^#define CONFIG_SYS_L2CACHE_OFF$/;"	d
CONFIG_SYS_L2CACHE_OFF_MODULE	arch/arm/Kconfig	/^config SYS_L2CACHE_OFF$/;"	c	menu:ARM architecture
CONFIG_SYS_L2_PL310	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/cm_t43.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/kc1.h	/^#define CONFIG_SYS_L2_PL310	/;"	d
CONFIG_SYS_L2_PL310	include/configs/mx6_common.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/odroid.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/socfpga_common.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_L2_PL310	/;"	d
CONFIG_SYS_L2_PL310	include/configs/trats.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/trats2.h	/^#define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_PL310	include/configs/zynq-common.h	/^# define CONFIG_SYS_L2_PL310$/;"	d
CONFIG_SYS_L2_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L2_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_L2_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_L3_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_L3_SIZE	/;"	d
CONFIG_SYS_LARGE_FLASH	include/configs/luan.h	/^#define CONFIG_SYS_LARGE_FLASH	/;"	d
CONFIG_SYS_LATCH0_BOOT	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_LATCH0_BOOT	/;"	d
CONFIG_SYS_LATCH0_BOOT	include/configs/io.h	/^#define CONFIG_SYS_LATCH0_BOOT	/;"	d
CONFIG_SYS_LATCH0_BOOT	include/configs/io64.h	/^#define CONFIG_SYS_LATCH0_BOOT	/;"	d
CONFIG_SYS_LATCH0_BOOT	include/configs/iocon.h	/^#define CONFIG_SYS_LATCH0_BOOT	/;"	d
CONFIG_SYS_LATCH0_BOOT	include/configs/neo.h	/^#define CONFIG_SYS_LATCH0_BOOT	/;"	d
CONFIG_SYS_LATCH0_RESET	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_LATCH0_RESET	/;"	d
CONFIG_SYS_LATCH0_RESET	include/configs/io.h	/^#define CONFIG_SYS_LATCH0_RESET	/;"	d
CONFIG_SYS_LATCH0_RESET	include/configs/io64.h	/^#define CONFIG_SYS_LATCH0_RESET	/;"	d
CONFIG_SYS_LATCH0_RESET	include/configs/iocon.h	/^#define CONFIG_SYS_LATCH0_RESET	/;"	d
CONFIG_SYS_LATCH0_RESET	include/configs/neo.h	/^#define CONFIG_SYS_LATCH0_RESET	/;"	d
CONFIG_SYS_LATCH1_BOOT	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_LATCH1_BOOT	/;"	d
CONFIG_SYS_LATCH1_BOOT	include/configs/io.h	/^#define CONFIG_SYS_LATCH1_BOOT	/;"	d
CONFIG_SYS_LATCH1_BOOT	include/configs/io64.h	/^#define CONFIG_SYS_LATCH1_BOOT	/;"	d
CONFIG_SYS_LATCH1_BOOT	include/configs/iocon.h	/^#define CONFIG_SYS_LATCH1_BOOT	/;"	d
CONFIG_SYS_LATCH1_BOOT	include/configs/neo.h	/^#define CONFIG_SYS_LATCH1_BOOT	/;"	d
CONFIG_SYS_LATCH1_RESET	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_LATCH1_RESET	/;"	d
CONFIG_SYS_LATCH1_RESET	include/configs/io.h	/^#define CONFIG_SYS_LATCH1_RESET	/;"	d
CONFIG_SYS_LATCH1_RESET	include/configs/io64.h	/^#define CONFIG_SYS_LATCH1_RESET	/;"	d
CONFIG_SYS_LATCH1_RESET	include/configs/iocon.h	/^#define CONFIG_SYS_LATCH1_RESET	/;"	d
CONFIG_SYS_LATCH1_RESET	include/configs/neo.h	/^#define CONFIG_SYS_LATCH1_RESET	/;"	d
CONFIG_SYS_LATCH_ADDR	include/configs/M5329EVB.h	/^#define CONFIG_SYS_LATCH_ADDR	/;"	d
CONFIG_SYS_LATCH_ADDR	include/configs/M5373EVB.h	/^#define CONFIG_SYS_LATCH_ADDR	/;"	d
CONFIG_SYS_LATCH_BASE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_LATCH_BASE	/;"	d
CONFIG_SYS_LATCH_BASE	include/configs/dlvision.h	/^#define CONFIG_SYS_LATCH_BASE	/;"	d
CONFIG_SYS_LATCH_BASE	include/configs/io.h	/^#define CONFIG_SYS_LATCH_BASE	/;"	d
CONFIG_SYS_LATCH_BASE	include/configs/io64.h	/^#define CONFIG_SYS_LATCH_BASE	/;"	d
CONFIG_SYS_LATCH_BASE	include/configs/iocon.h	/^#define CONFIG_SYS_LATCH_BASE	/;"	d
CONFIG_SYS_LATCH_BASE	include/configs/neo.h	/^#define CONFIG_SYS_LATCH_BASE	/;"	d
CONFIG_SYS_LBAPP1_BASE	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP1_BASE	/;"	d
CONFIG_SYS_LBAPP1_BASE_PHYS	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP1_BASE_PHYS	/;"	d
CONFIG_SYS_LBAPP1_BR_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP1_BR_PRELIM /;"	d
CONFIG_SYS_LBAPP1_OR_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP1_OR_PRELIM /;"	d
CONFIG_SYS_LBAPP2_BASE	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP2_BASE	/;"	d
CONFIG_SYS_LBAPP2_BASE_PHYS	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP2_BASE_PHYS	/;"	d
CONFIG_SYS_LBAPP2_BR_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP2_BR_PRELIM /;"	d
CONFIG_SYS_LBAPP2_OR_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_LBAPP2_OR_PRELIM /;"	d
CONFIG_SYS_LBC0_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_LBC0_BASE	/;"	d
CONFIG_SYS_LBC0_BASE_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_LBC0_BASE_PHYS	/;"	d
CONFIG_SYS_LBC1_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_LBC1_BASE	/;"	d
CONFIG_SYS_LBC1_BASE_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_LBC1_BASE_PHYS	/;"	d
CONFIG_SYS_LBCR_ADDR	arch/powerpc/cpu/mpc85xx/start.S	/^#define CONFIG_SYS_LBCR_ADDR /;"	d	file:
CONFIG_SYS_LBC_ADDR	arch/powerpc/cpu/mpc85xx/start.S	/^#define CONFIG_SYS_LBC_ADDR /;"	d	file:
CONFIG_SYS_LBC_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_LBC_ADDR /;"	d
CONFIG_SYS_LBC_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_LBC_ADDR /;"	d
CONFIG_SYS_LBC_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_LBC_ADDR	/;"	d
CONFIG_SYS_LBC_BASE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_LBC_BASE	/;"	d
CONFIG_SYS_LBC_BASE_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_LBC_BASE_PHYS_LOW	/;"	d
CONFIG_SYS_LBC_CACHE_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_LBC_CACHE_BASE	/;"	d
CONFIG_SYS_LBC_FLASH_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_LBC_FLASH_BASE	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/hrcon.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/ids8313.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/p1_twr.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/socrates.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/strider.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/ve8313.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LBCR	include/configs/vme8349.h	/^#define CONFIG_SYS_LBC_LBCR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/cyrus.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/p1_twr.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/socrates.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LCRR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_LBC_LCRR	/;"	d
CONFIG_SYS_LBC_LSDMR_1	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSDMR_1	/;"	d
CONFIG_SYS_LBC_LSDMR_1	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_1	/;"	d
CONFIG_SYS_LBC_LSDMR_1	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_1	/;"	d
CONFIG_SYS_LBC_LSDMR_1	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSDMR_1	/;"	d
CONFIG_SYS_LBC_LSDMR_2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSDMR_2	/;"	d
CONFIG_SYS_LBC_LSDMR_2	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_2	/;"	d
CONFIG_SYS_LBC_LSDMR_2	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_2	/;"	d
CONFIG_SYS_LBC_LSDMR_2	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSDMR_2	/;"	d
CONFIG_SYS_LBC_LSDMR_3	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSDMR_3	/;"	d
CONFIG_SYS_LBC_LSDMR_3	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_3	/;"	d
CONFIG_SYS_LBC_LSDMR_3	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_3	/;"	d
CONFIG_SYS_LBC_LSDMR_3	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSDMR_3	/;"	d
CONFIG_SYS_LBC_LSDMR_4	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSDMR_4	/;"	d
CONFIG_SYS_LBC_LSDMR_4	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_4	/;"	d
CONFIG_SYS_LBC_LSDMR_4	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_4	/;"	d
CONFIG_SYS_LBC_LSDMR_4	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSDMR_4	/;"	d
CONFIG_SYS_LBC_LSDMR_5	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSDMR_5	/;"	d
CONFIG_SYS_LBC_LSDMR_5	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_5	/;"	d
CONFIG_SYS_LBC_LSDMR_5	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_5	/;"	d
CONFIG_SYS_LBC_LSDMR_5	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSDMR_5	/;"	d
CONFIG_SYS_LBC_LSDMR_ARFRSH	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LSDMR_ARFRSH	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON /;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_COMMON	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LSDMR_COMMON	/;"	d
CONFIG_SYS_LBC_LSDMR_MRW	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LSDMR_MRW	/;"	d
CONFIG_SYS_LBC_LSDMR_PCHALL	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LSDMR_PCHALL	/;"	d
CONFIG_SYS_LBC_LSDMR_RFEN	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LSDMR_RFEN	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_LSRT	include/configs/socrates.h	/^#define CONFIG_SYS_LBC_LSRT	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/ids8313.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/socrates.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_MRTPR	include/configs/ve8313.h	/^#define CONFIG_SYS_LBC_MRTPR	/;"	d
CONFIG_SYS_LBC_NONCACHE_BASE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_LBC_NONCACHE_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE	/;"	d
CONFIG_SYS_LBC_SDRAM_BASE_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_BASE_PHYS	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBC_SDRAM_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_LBC_SDRAM_SIZE	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR0_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_LBLAWAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR1_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_LBLAWAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_LBLAWAR2_PRELIM /;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/km8360.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWAR3_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_LBLAWAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR0_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_LBLAWBAR0_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR1_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_LBLAWBAR1_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_LBLAWBAR2_PRELIM /;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/km8360.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LBLAWBAR3_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_LBLAWBAR3_PRELIM	/;"	d
CONFIG_SYS_LCD_BASE	arch/m68k/include/asm/immap.h	/^#define	CONFIG_SYS_LCD_BASE	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/TQM834x.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/hrcon.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/ids8313.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/km8360.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/sbc8349.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/strider.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/ve8313.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_CLKDIV	include/configs/vme8349.h	/^#define CONFIG_SYS_LCRR_CLKDIV	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/TQM834x.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/hrcon.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/km8360.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/sbc8349.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_DBYP	include/configs/strider.h	/^#define CONFIG_SYS_LCRR_DBYP	/;"	d
CONFIG_SYS_LCRR_EADC	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LCRR_EADC	/;"	d
CONFIG_SYS_LCRR_EADC	include/configs/ids8313.h	/^#define CONFIG_SYS_LCRR_EADC	/;"	d
CONFIG_SYS_LCRR_EADC	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_LCRR_EADC	/;"	d
CONFIG_SYS_LCRR_EADC	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_LCRR_EADC	/;"	d
CONFIG_SYS_LCRR_EADC	include/configs/km8360.h	/^#define CONFIG_SYS_LCRR_EADC	/;"	d
CONFIG_SYS_LCRR_EADC	include/configs/ve8313.h	/^#define CONFIG_SYS_LCRR_EADC	/;"	d
CONFIG_SYS_LDB_CLOCK	drivers/video/ipu_common.c	/^#define CONFIG_SYS_LDB_CLOCK /;"	d	file:
CONFIG_SYS_LDB_CLOCK	include/configs/aristainetos2.h	/^#define CONFIG_SYS_LDB_CLOCK /;"	d
CONFIG_SYS_LDB_CLOCK	include/configs/aristainetos2b.h	/^#define CONFIG_SYS_LDB_CLOCK /;"	d
CONFIG_SYS_LDSCRIPT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/P1022DS.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_LDSCRIPT /;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/am335x_evm.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/baltos.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/bav335x.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_LDSCRIPT /;"	d
CONFIG_SYS_LDSCRIPT	include/configs/edb93xx.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/inka4x0.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/sh7752evb.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/sh7753evb.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_LDSCRIPT	/;"	d
CONFIG_SYS_LDSCRIPT	include/configs/zynq-common.h	/^#define CONFIG_SYS_LDSCRIPT /;"	d
CONFIG_SYS_LED_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_LED_ADDR	/;"	d
CONFIG_SYS_LED_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LED_BASE	/;"	d
CONFIG_SYS_LED_BASE	include/configs/v38b.h	/^#define CONFIG_SYS_LED_BASE	/;"	d
CONFIG_SYS_LED_DISP_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_LED_DISP_BASE	/;"	d
CONFIG_SYS_LIME_BASE	include/configs/ipek01.h	/^#define	CONFIG_SYS_LIME_BASE	/;"	d
CONFIG_SYS_LIME_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_LIME_BASE	/;"	d
CONFIG_SYS_LIME_BASE_0	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_BASE_0	/;"	d
CONFIG_SYS_LIME_BASE_1	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_BASE_1	/;"	d
CONFIG_SYS_LIME_BASE_2	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_BASE_2	/;"	d
CONFIG_SYS_LIME_BASE_3	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_BASE_3	/;"	d
CONFIG_SYS_LIME_CLOCK_100MHZ	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_CLOCK_100MHZ	/;"	d
CONFIG_SYS_LIME_CLOCK_133MHZ	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_CLOCK_133MHZ	/;"	d
CONFIG_SYS_LIME_MMR	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_MMR	/;"	d
CONFIG_SYS_LIME_SDRAM_CLOCK	include/configs/lwmon5.h	/^#define CONFIG_SYS_LIME_SDRAM_CLOCK	/;"	d
CONFIG_SYS_LIME_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_LIME_SIZE	/;"	d
CONFIG_SYS_LIME_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_LIME_SIZE	/;"	d
CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE	arch/powerpc/lib/bootm.c	/^#define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE	/;"	d	file:
CONFIG_SYS_LITTLE_ENDIAN	arch/arc/config.mk	/^CONFIG_SYS_LITTLE_ENDIAN = 1$/;"	m
CONFIG_SYS_LITTLE_ENDIAN	arch/mips/Kconfig	/^config SYS_LITTLE_ENDIAN$/;"	c	choice:MIPS architecture""choiced4351f5b0204
CONFIG_SYS_LITTLE_ENDIAN	include/configs/cm_fx6.h	/^#define CONFIG_SYS_LITTLE_ENDIAN$/;"	d
CONFIG_SYS_LITTLE_ENDIAN_MODULE	arch/mips/Kconfig	/^config SYS_LITTLE_ENDIAN$/;"	c	choice:MIPS architecture""choiced4351f5b0204
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE$/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MIP405.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/P1022DS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE$/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/PIP405.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/PLU405.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/PMC440.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/TQM834x.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/UCP1020.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/VOM405.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/ac14xx.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/amcc-common.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/aria.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE$/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/cyrus.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/hrcon.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE$/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/lwmon5.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/mecp5123.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/p1_twr.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/sbc8349.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/sbc8548.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/socrates.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/spear-common.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE$/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/strider.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/t4qds.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/ve8313.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/vme8349.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/x600.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE$/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOADS_BAUD_CHANGE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_LOADS_BAUD_CHANGE	/;"	d
CONFIG_SYS_LOAD_ADDR	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/autoconf.mk	/^CONFIG_SYS_LOAD_ADDR=0x42000000$/;"	m
CONFIG_SYS_LOAD_ADDR	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M52277EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5235EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5249EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5272C3.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5275EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M53017EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5329EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5373EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MIP405.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/MigoR.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/P1022DS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/PATI.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/PIP405.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM5200.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM823L.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM823M.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM834x.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM850L.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM850M.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM855L.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM855M.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM860L.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM860M.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM862L.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM862M.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/UCP1020.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/VCMA9.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/VOM405.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/a3m071.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/a4m072.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ac14xx.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/am3517_crane.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/am3517_evm.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/amcc-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/amcore.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ap121.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ap143.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ap325rxa.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/apf27.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/apx4devkit.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/aria.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/atngw100.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/atstk1002.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/axs10x.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/bg0900.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/boston.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/calimain.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/canmb.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/cm5200.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/cm_t35.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/cm_t3517.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/cobra5272.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/colibri_vf.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/corvus.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/cyrus.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/da850evm.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/devkit3250.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ea20.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ecovec.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/edb93xx.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/edminiv2.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/espt.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ethernut5.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/exynos5-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/flea3.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/grasshopper.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/grsim.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/h2200.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/highbank.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/hikey.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/hrcon.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ids8313.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/inka4x0.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/integrator-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ipam390.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ipek01.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/jupiter.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/kc1.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/km/km_arm.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/kzm9g.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/legoev3.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/m28evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/m53evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/malta.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mcx.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mecp5123.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/meesc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/microblaze-generic.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/motionpro.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mpr2.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ms7720se.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ms7722se.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ms7750se.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/munices.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mv-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx23_olinuxino.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx23evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx25pdk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx28evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx31ads.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx31pdk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx35pdk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx51evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx53ard.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx53evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx53loco.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx53smd.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx6_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/nsim.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/odroid.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/omap3_evm.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/origen.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pb1x00.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pcm030.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pcm052.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pdm360ng.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/picosam9g45.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pm9261.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pm9263.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/pm9g45.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/qemu-mips.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/r0p7734.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/r2dplus.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/r7780mp.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rk3036_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rk3288_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rk3399_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rpi.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rsk7203.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rsk7264.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/rsk7269.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/s32v234evb.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/s5p_goni.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sandbox.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sansa_fuze_plus.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sbc8349.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sbc8548.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sbc8641d.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sc_sps_1.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sh7752evb.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sh7753evb.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/shmin.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/smartweb.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/smdk2410.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/smdkc100.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/smdkv310.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/snapper9260.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/snapper9g45.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sniper.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_is1.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_mcvevk.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_sockit.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_socrates.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_sr1500.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/socrates.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/spear-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/strider.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/stv0991.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/sunxi-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/t4qds.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/tao3530.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/taurus.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/tb100.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/tegra-common-post.h	/^#define CONFIG_SYS_LOAD_ADDR /;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/trats.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/trats2.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/tricorder.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ts4800.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/uniphier.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/usb_a9263.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/usbarmory.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/v38b.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/vct.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/ve8313.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/vexpress_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/vf610twr.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/vinco.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/vme8349.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/warp7.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/woodburn_common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/work_92105.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/x600.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/x86-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xfi3.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xpress.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/xtfpga.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/zipitz2.h	/^#define	CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/zmx25.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	include/configs/zynq-common.h	/^#define CONFIG_SYS_LOAD_ADDR	/;"	d
CONFIG_SYS_LOAD_ADDR	spl/include/autoconf.mk	/^CONFIG_SYS_LOAD_ADDR=0x42000000$/;"	m
CONFIG_SYS_LOAD_ADDR2	include/configs/M52277EVB.h	/^#define	CONFIG_SYS_LOAD_ADDR2	/;"	d
CONFIG_SYS_LOAD_ADDR2	include/configs/M54418TWR.h	/^#define	CONFIG_SYS_LOAD_ADDR2	/;"	d
CONFIG_SYS_LOAD_ADDR2	include/configs/M54451EVB.h	/^#define	CONFIG_SYS_LOAD_ADDR2	/;"	d
CONFIG_SYS_LOAD_ADDR2	include/configs/M54455EVB.h	/^#define	CONFIG_SYS_LOAD_ADDR2	/;"	d
CONFIG_SYS_LOCAL_CONF_REGS	include/configs/canyonlands.h	/^#define CONFIG_SYS_LOCAL_CONF_REGS	/;"	d
CONFIG_SYS_LOCAL_CONF_REGS	include/configs/intip.h	/^#define CONFIG_SYS_LOCAL_CONF_REGS	/;"	d
CONFIG_SYS_LOCAL_CONF_REGS	include/configs/t3corp.h	/^#define CONFIG_SYS_LOCAL_CONF_REGS	/;"	d
CONFIG_SYS_LONGHELP	include/autoconf.mk	/^CONFIG_SYS_LONGHELP=y$/;"	m
CONFIG_SYS_LONGHELP	include/config_distro_defaults.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/B4860QDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M52277EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5235EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5249EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5272C3.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5275EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M53017EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5329EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5373EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M54418TWR.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M54451EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M54455EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5475EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/M5485EVB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MIP405.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/MigoR.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/P1010RDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/P1022DS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/P1023RDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/P2041RDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/PATI.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/PIP405.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/PLU405.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/PMC405DE.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/PMC440.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T102xQDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T102xRDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T1040QDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T104xRDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T208xQDS.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T208xRDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/T4240RDB.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM5200.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM823L.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM823M.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM834x.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM850L.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM850M.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM855L.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM855M.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM860L.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM860M.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM862L.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM862M.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM866M.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/TQM885D.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/UCP1020.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/VCMA9.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/VOM405.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/a3m071.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/a4m072.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ac14xx.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/am3517_crane.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/am3517_evm.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ap121.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ap143.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ap325rxa.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/apf27.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/aria.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/atngw100.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/atstk1002.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/axs10x.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/bfin_adi_common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/blackstamp.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/blackvme.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/boston.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/bur_cfg_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/calimain.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/canmb.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/cm5200.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/cm_t35.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/cm_t3517.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/cobra5272.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/colibri_vf.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/controlcenterd.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/corenet_ds.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/corvus.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/cyrus.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/da850evm.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/devkit3250.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/dnp5370.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ea20.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ecovec.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/edb93xx.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/edminiv2.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/espt.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ethernut5.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/flea3.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/grasshopper.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/grsim.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/hikey.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/hrcon.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ids8313.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/inka4x0.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/integrator-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ipam390.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ipek01.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/jupiter.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/kc1.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/kzm9g.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/legoev3.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/lwmon5.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/m53evk.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/malta.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/manroland/common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mcx.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mecp5123.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/meesc.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/microblaze-generic.h	/^#define	CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/motionpro.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mpr2.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ms7720se.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ms7722se.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ms7750se.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/munices.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mv-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx25pdk.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx31ads.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx31pdk.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx35pdk.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx51evk.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx53ard.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx53evk.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx53loco.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx53smd.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx6_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/mx7_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/mxs.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/nas220.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/nsim.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/omap3_evm.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/p1_twr.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pb1x00.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pcm030.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pcm052.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pdm360ng.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/picosam9g45.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/pm9261.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pm9263.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/pm9g45.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/qemu-mips.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/r0p7734.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/r2dplus.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/r7780mp.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/rsk7203.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/rsk7264.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/rsk7269.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/s32v234evb.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/s5p_goni.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/sandbox.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/sbc8349.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/sbc8548.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/sbc8641d.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/sh7752evb.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/sh7753evb.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/shmin.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/smartweb.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/smdk2410.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/smdkc100.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/snapper9260.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/snapper9g45.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/sniper.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/socfpga_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/socrates.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/spear-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/strider.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/stv0991.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/t4qds.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/tam3517-common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/tao3530.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/taurus.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/tb100.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/tricorder.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ts4800.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/uniphier.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/usb_a9263.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/v38b.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/vct.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/ve8313.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/vexpress_common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/vf610twr.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/vme8349.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/woodburn_common.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/work_92105.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/x600.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/x86-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/xpedite1000.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/xpedite517x.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/xpedite520x.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/xpedite537x.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/xpedite550x.h	/^#define CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/xtfpga.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/zipitz2.h	/^#define	CONFIG_SYS_LONGHELP	/;"	d
CONFIG_SYS_LONGHELP	include/configs/zmx25.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LONGHELP	include/configs/zynq-common.h	/^#define CONFIG_SYS_LONGHELP$/;"	d
CONFIG_SYS_LOW	include/lcd.h	/^#define CONFIG_SYS_LOW	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_LOWBOOT$/;"	d
CONFIG_SYS_LOWBOOT	include/configs/TQM5200.h	/^#   define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/a3m071.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/a4m072.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/canmb.h	/^#   define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/cm5200.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/inka4x0.h	/^#   define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/ipek01.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/manroland/mpc5200-common.h	/^#   define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/motionpro.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT	include/configs/pcm030.h	/^#define CONFIG_SYS_LOWBOOT /;"	d
CONFIG_SYS_LOWBOOT	include/configs/v38b.h	/^#define CONFIG_SYS_LOWBOOT	/;"	d
CONFIG_SYS_LOWBOOT16	include/configs/canmb.h	/^#   define CONFIG_SYS_LOWBOOT16	/;"	d
CONFIG_SYS_LOWBOOT16	include/configs/v38b.h	/^#define CONFIG_SYS_LOWBOOT16	/;"	d
CONFIG_SYS_LOWBOOT32	include/configs/a4m072.h	/^#define CONFIG_SYS_LOWBOOT32	/;"	d
CONFIG_SYS_LOWMEM_BASE	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_LOWMEM_BASE	/;"	d
CONFIG_SYS_LPAE_SDRAM_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_LPAE_SDRAM_BASE	/;"	d
CONFIG_SYS_LPC32XX_UART	include/configs/devkit3250.h	/^#define CONFIG_SYS_LPC32XX_UART	/;"	d
CONFIG_SYS_LPC32XX_UART	include/configs/work_92105.h	/^#define CONFIG_SYS_LPC32XX_UART	/;"	d
CONFIG_SYS_LS1_DDR_BLOCK1_SIZE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE	/;"	d
CONFIG_SYS_LS2_DDR_BLOCK1_SIZE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE	/;"	d
CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH	/;"	d
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS /;"	d
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS /;"	d
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS /;"	d
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS /;"	d
CONFIG_SYS_LS_MC_DPC_ADDR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_LS_MC_DPC_ADDR	/;"	d
CONFIG_SYS_LS_MC_DPC_IN_DDR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_LS_MC_DPC_IN_DDR$/;"	d
CONFIG_SYS_LS_MC_DPC_IN_NOR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_LS_MC_DPC_IN_NOR$/;"	d
CONFIG_SYS_LS_MC_DPC_MAX_LENGTH	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH	/;"	d
CONFIG_SYS_LS_MC_DPL_ADDR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_LS_MC_DPL_ADDR	/;"	d
CONFIG_SYS_LS_MC_DPL_IN_DDR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_LS_MC_DPL_IN_DDR$/;"	d
CONFIG_SYS_LS_MC_DPL_IN_NOR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_LS_MC_DPL_IN_NOR$/;"	d
CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	/;"	d
CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET	/;"	d
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE	/;"	d
CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET /;"	d
CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET /;"	d
CONFIG_SYS_LS_MC_FW_IN_DDR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_LS_MC_FW_IN_DDR$/;"	d
CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE	/;"	d
CONFIG_SYS_LS_PPA_ESBC_ADDR	arch/arm/include/asm/fsl_secure_boot.h	/^#define CONFIG_SYS_LS_PPA_ESBC_ADDR	/;"	d
CONFIG_SYS_LS_PPA_FW_ADDR	include/configs/ls1043ardb.h	/^#define	CONFIG_SYS_LS_PPA_FW_ADDR	/;"	d
CONFIG_SYS_LS_PPA_FW_ADDR	include/configs/ls1046ardb.h	/^#define	CONFIG_SYS_LS_PPA_FW_ADDR	/;"	d
CONFIG_SYS_LS_PPA_FW_IN_XIP	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_LS_PPA_FW_IN_XIP$/;"	d
CONFIG_SYS_LS_PPA_FW_IN_XIP	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_LS_PPA_FW_IN_XIP$/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	drivers/rtc/m41t11.c	/^#define CONFIG_SYS_M41T11_BASE_YEAR /;"	d	file:
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/TQM5200.h	/^# define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/icon.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR /;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/katmai.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/m28evk.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/m53evk.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/xpedite517x.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/xpedite520x.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/xpedite537x.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_M41T11_BASE_YEAR	include/configs/xpedite550x.h	/^#define CONFIG_SYS_M41T11_BASE_YEAR	/;"	d
CONFIG_SYS_MACB0_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_MACB0_BASE	/;"	d
CONFIG_SYS_MACB1_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_MACB1_BASE	/;"	d
CONFIG_SYS_MACB2_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_MACB2_BASE	/;"	d
CONFIG_SYS_MACB3_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_MACB3_BASE	/;"	d
CONFIG_SYS_MAIN_PWR_ON	include/configs/mx51evk.h	/^#define CONFIG_SYS_MAIN_PWR_ON$/;"	d
CONFIG_SYS_MAIN_PWR_ON	include/configs/ts4800.h	/^#define CONFIG_SYS_MAIN_PWR_ON$/;"	d
CONFIG_SYS_MALLOC_BASE	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_MALLOC_BASE /;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_BASE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MALLOC_BASE	/;"	d
CONFIG_SYS_MALLOC_CLEAR_ON_INIT	Kconfig	/^	config SYS_MALLOC_CLEAR_ON_INIT$/;"	c	menu:General setup
CONFIG_SYS_MALLOC_CLEAR_ON_INIT_MODULE	Kconfig	/^	config SYS_MALLOC_CLEAR_ON_INIT$/;"	c	menu:General setup
CONFIG_SYS_MALLOC_END	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MALLOC_END	/;"	d
CONFIG_SYS_MALLOC_END	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MALLOC_END	/;"	d
CONFIG_SYS_MALLOC_END	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MALLOC_END	/;"	d
CONFIG_SYS_MALLOC_END	include/configs/grsim.h	/^#define CONFIG_SYS_MALLOC_END	/;"	d
CONFIG_SYS_MALLOC_END	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MALLOC_END	/;"	d
CONFIG_SYS_MALLOC_F	Kconfig	/^config SYS_MALLOC_F$/;"	c	menu:General setup
CONFIG_SYS_MALLOC_F	include/config/auto.conf	/^CONFIG_SYS_MALLOC_F=y$/;"	k
CONFIG_SYS_MALLOC_F	include/generated/autoconf.h	/^#define CONFIG_SYS_MALLOC_F /;"	d
CONFIG_SYS_MALLOC_F_LEN	Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:General setup
CONFIG_SYS_MALLOC_F_LEN	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-integrator/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:Integrator Options
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-meson/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-rockchip/rk3399/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-tegra/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/arm/mach-zynq/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN	arch/x86/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:x86 architecture
CONFIG_SYS_MALLOC_F_LEN	include/config/auto.conf	/^CONFIG_SYS_MALLOC_F_LEN=0x400$/;"	k
CONFIG_SYS_MALLOC_F_LEN	include/generated/autoconf.h	/^#define CONFIG_SYS_MALLOC_F_LEN /;"	d
CONFIG_SYS_MALLOC_F_LEN_MODULE	Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:General setup
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-integrator/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:Integrator Options
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-meson/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-rockchip/rk3399/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-tegra/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/arm/mach-zynq/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
CONFIG_SYS_MALLOC_F_LEN_MODULE	arch/x86/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:x86 architecture
CONFIG_SYS_MALLOC_F_MODULE	Kconfig	/^config SYS_MALLOC_F$/;"	c	menu:General setup
CONFIG_SYS_MALLOC_LEN	include/autoconf.mk	/^CONFIG_SYS_MALLOC_LEN="(CONFIG_ENV_SIZE + (64 << 20))"$/;"	m
CONFIG_SYS_MALLOC_LEN	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M52277EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5272C3.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5282EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M54451EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M54455EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MIP405.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/MigoR.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/P1022DS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/PATI.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/PIP405.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/PLU405.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/PMC440.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM5200.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM823L.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM823M.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM834x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM850L.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM850M.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM855L.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM855M.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM860L.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM860M.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM862L.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM862M.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM866M.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/TQM885D.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/UCP1020.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/VCMA9.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/VOM405.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/a3m071.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/a4m072.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ac14xx.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/amcc-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/amcore.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ap121.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ap143.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/apf27.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/aria.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/atngw100.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/atstk1002.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/axs10x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf506f-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf525-ucr2.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/blackstamp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/blackvme.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/boston.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/br4.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/brppt1.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/brxre1.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/calimain.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/canmb.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm-bf527.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm-bf533.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm-bf548.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm-bf561.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm5200.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm_fx6.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm_t35.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cm_t3517.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cobra5272.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/colibri_vf.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/corvus.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/cyrus.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/da850evm.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/devkit3250.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/devkit8000.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/dnp5370.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ea20.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ecovec.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/edb93xx.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/edminiv2.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/el6x_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/espt.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ethernut5.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/exynos-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/flea3.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/grasshopper.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/grsim.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/h2200.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/highbank.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/hikey.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/hrcon.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ids8313.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/inka4x0.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/integrator-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ip04.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ipam390.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ipek01.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/jupiter.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/kc1.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/km/km_arm.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/kzm9g.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/legoev3.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/lwmon5.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/m53evk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/malta.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mcx.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mecp5123.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/meesc.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/motionpro.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mpr2.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ms7720se.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ms7722se.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ms7750se.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mt_ventoux.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/munices.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mv-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx25pdk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx31ads.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx31pdk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx51evk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx53ard.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx53evk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx53loco.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx53smd.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6slevk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/mxs.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/novena.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/nsim.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/omap3_overo.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ot1200.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/p1_twr.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pb1x00.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pcm030.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pcm052.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pcm058.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/platinum.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pm9261.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pm9263.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pm9g45.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/pr1.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/r0p7734.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/r2dplus.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/r7780mp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rk3036_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rk3288_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rk3399_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rpi.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rsk7203.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rsk7264.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/rsk7269.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sandbox.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sbc8349.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sbc8548.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sh7752evb.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sh7753evb.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/shmin.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/smartweb.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/smdk2410.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/smdkc100.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/snapper9260.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/snapper9g45.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sniper.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/socrates.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/spear-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/strider.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/stv0991.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/sunxi-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/t4qds.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tao3530.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/taurus.h	/^#define CONFIG_SYS_MALLOC_LEN /;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tb100.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tbs2910.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tegra-common-post.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/titanium.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tqma6.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/tricorder.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ts4800.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/udoo.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/uniphier.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/usbarmory.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/v38b.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/vct.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/ve8313.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/vf610twr.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/vme8349.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/wandboard.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/warp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/warp7.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/work_92105.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/x600.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/x86-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xpress.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/xtfpga.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/zipitz2.h	/^#define	CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/zmx25.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	include/configs/zynq-common.h	/^#define CONFIG_SYS_MALLOC_LEN	/;"	d
CONFIG_SYS_MALLOC_LEN	spl/include/autoconf.mk	/^CONFIG_SYS_MALLOC_LEN="(CONFIG_ENV_SIZE + (64 << 20))"$/;"	m
CONFIG_SYS_MALLOC_SIMPLE	include/configs/clearfog.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/db-88f6720.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/ds414.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/maxbcm.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MALLOC_SIMPLE	include/configs/theadorable.h	/^#define CONFIG_SYS_MALLOC_SIMPLE$/;"	d
CONFIG_SYS_MAMR	include/configs/suvd3.h	/^#define CONFIG_SYS_MAMR	/;"	d
CONFIG_SYS_MAMR	include/configs/tuxx1.h	/^#define CONFIG_SYS_MAMR	/;"	d
CONFIG_SYS_MAMR_10COL	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAMR_10COL	/;"	d
CONFIG_SYS_MAMR_10COL	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAMR_10COL	/;"	d
CONFIG_SYS_MAMR_10COL	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAMR_10COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM823L.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM823M.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM850L.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM850M.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM855L.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM855M.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM860L.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM862L.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM862M.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_8COL	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAMR_8COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM823L.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM823M.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM850L.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM850M.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM855L.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM855M.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM860L.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM862L.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM862M.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_9COL	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAMR_9COL	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM823L.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM823M.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM850L.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM850M.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM855L.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM855M.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM860L.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM862L.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM862M.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAMR_PTA	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAMR_PTA	/;"	d
CONFIG_SYS_MAPLE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_MAPLE$/;"	d
CONFIG_SYS_MAPLE_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MAPLE_MEM_PHYS /;"	d
CONFIG_SYS_MAPPED_RAM_BASE	include/configs/smdkc100.h	/^#define CONFIG_SYS_MAPPED_RAM_BASE	/;"	d
CONFIG_SYS_MARUBUN_IO	include/configs/ms7720se.h	/^#define CONFIG_SYS_MARUBUN_IO	/;"	d
CONFIG_SYS_MARUBUN_MRSHPC	include/configs/ms7720se.h	/^#define CONFIG_SYS_MARUBUN_MRSHPC	/;"	d
CONFIG_SYS_MARUBUN_MW1	include/configs/ms7720se.h	/^#define CONFIG_SYS_MARUBUN_MW1	/;"	d
CONFIG_SYS_MARUBUN_MW2	include/configs/ms7720se.h	/^#define CONFIG_SYS_MARUBUN_MW2	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/corvus.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/smartweb.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MASTER_CLOCK	include/configs/taurus.h	/^#define CONFIG_SYS_MASTER_CLOCK	/;"	d
CONFIG_SYS_MATRIX_EBI0CSA_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_MATRIX_EBI0CSA_VAL	/;"	d
CONFIG_SYS_MATRIX_EBICSA_VAL	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^#define CONFIG_SYS_MATRIX_EBICSA_VAL /;"	d	file:
CONFIG_SYS_MATRIX_EBICSA_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MATRIX_EBICSA_VAL	/;"	d
CONFIG_SYS_MATRIX_EBICSA_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_MATRIX_EBICSA_VAL	/;"	d
CONFIG_SYS_MAXARGS	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/autoconf.mk	/^CONFIG_SYS_MAXARGS=16$/;"	m
CONFIG_SYS_MAXARGS	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M52277EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5272C3.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M54451EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MIP405.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/MigoR.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/P1022DS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/PATI.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/PIP405.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/PLU405.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/PMC440.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM5200.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM823L.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM823M.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM834x.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM850L.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM850M.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM855L.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM855M.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM860L.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM860M.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM862L.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM862M.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/UCP1020.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/VCMA9.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/VOM405.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/a3m071.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/a4m072.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ac14xx.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/amcc-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/amcore.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ap121.h	/^#define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/configs/ap143.h	/^#define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/apalis_t30.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/apf27.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/aria.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/atngw100.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/atstk1002.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/axs10x.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/boston.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/bur_cfg_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/calimain.h	/^#define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/configs/canmb.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/cm5200.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/cm_t35.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/cm_t3517.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/cobra5272.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/colibri_t20.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/colibri_t30.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/colibri_vf.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/corvus.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/cyrus.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/da850evm.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/devkit3250.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ea20.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ecovec.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/edb93xx.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/edminiv2.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/espt.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ethernut5.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/exynos-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/flea3.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/grasshopper.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/grsim.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/h2200.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/highbank.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/hikey.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/hrcon.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ids8313.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/inka4x0.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/integrator-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ipam390.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ipek01.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/jupiter.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/kc1.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/kzm9g.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/legoev3.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/lwmon5.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/m53evk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/malta.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/manroland/common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mcx.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mecp5123.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/meesc.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/microblaze-generic.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/motionpro.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mpr2.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ms7720se.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ms7722se.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ms7750se.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/munices.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mv-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx25pdk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx31ads.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx31pdk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx51evk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx53ard.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx53evk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx53loco.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx53smd.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx6_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mx7_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/mxs.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/nsim.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/p1_twr.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pb1x00.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pcm030.h	/^#define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/configs/pcm052.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pm9261.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pm9263.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/pm9g45.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/r0p7734.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/r2dplus.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/r7780mp.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rk3036_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rk3288_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rk3399_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rpi.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rsk7203.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rsk7264.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/rsk7269.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sandbox.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sbc8349.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sbc8548.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sh7752evb.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sh7753evb.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/shmin.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/smartweb.h	/^#define CONFIG_SYS_MAXARGS /;"	d
CONFIG_SYS_MAXARGS	include/configs/smdk2410.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/smdkc100.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/snapper9260.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/snapper9g45.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sniper.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/socrates.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/spear-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/strider.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/stv0991.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/sunxi-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/t4qds.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/tao3530.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/taurus.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/tb100.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/tegra-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/tricorder.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ts4800.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/uniphier.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/usbarmory.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/v38b.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/vct.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/ve8313.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/vf610twr.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/vme8349.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/work_92105.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/x600.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/x86-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/xtfpga.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/zipitz2.h	/^#define	CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/zmx25.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	include/configs/zynq-common.h	/^#define CONFIG_SYS_MAXARGS	/;"	d
CONFIG_SYS_MAXARGS	spl/include/autoconf.mk	/^CONFIG_SYS_MAXARGS=16$/;"	m
CONFIG_SYS_MAXIDLE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define CONFIG_SYS_MAXIDLE	/;"	d	file:
CONFIG_SYS_MAXIDLE	arch/powerpc/cpu/mpc8xx/serial.c	/^#define CONFIG_SYS_MAXIDLE	/;"	d	file:
CONFIG_SYS_MAXIDLE	include/configs/TQM823L.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM823M.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM850L.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM850M.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM855L.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM855M.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM860L.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM862L.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM862M.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAXIDLE	include/configs/km82xx.h	/^#define CONFIG_SYS_MAXIDLE	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/ethernut5.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/meesc.h	/^# define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/pm9261.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/pm9263.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DATAFLASH_BANKS	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MAX_DATAFLASH_BANKS	/;"	d
CONFIG_SYS_MAX_DDR_BAT_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MAX_DDR_BAT_SIZE	/;"	d
CONFIG_SYS_MAX_DDR_BAT_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MAX_DDR_BAT_SIZE	/;"	d
CONFIG_SYS_MAX_DDR_BAT_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MAX_DDR_BAT_SIZE	/;"	d
CONFIG_SYS_MAX_DDR_BAT_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MAX_DDR_BAT_SIZE	/;"	d
CONFIG_SYS_MAX_DOC_DEVICE	include/configs/PIP405.h	/^#define CONFIG_SYS_MAX_DOC_DEVICE	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5272C3.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MIP405.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/MigoR.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/P1022DS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/PATI.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/PIP405.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/PLU405.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/PMC440.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM5200.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM823L.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM823M.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM850L.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM850M.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM855L.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM855M.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM860L.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM862L.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM862M.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/UCP1020.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/VCMA9.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/VOM405.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/a3m071.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/a4m072.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ac14xx.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/acadia.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/am335x_evm.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/amcore.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/aria.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/atngw100.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/atstk1002.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bamboo.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bav335x.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/blanche.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/bubinga.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/calimain.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/canmb.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/canyonlands.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm-bf527.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm-bf533.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm-bf548.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm-bf561.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cm5200.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/cobra5272.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/da850evm.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/devkit3250.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/dlvision.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/dnp5370.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ecovec.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/edb93xx.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/edminiv2.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/espt.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ethernut5.h	/^# define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/flea3.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/grasshopper.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/grsim.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/hrcon.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/icon.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ids8313.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/inka4x0.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/integrator-common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/intip.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/io.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/io64.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/iocon.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ipek01.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/jupiter.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/katmai.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/kilauea.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/km82xx.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/kzm9g.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/lsxl.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/luan.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/makalu.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/malta.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mecp5123.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/motionpro.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mpr2.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ms7720se.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ms7722se.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ms7750se.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/munices.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mx31ads.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/neo.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/p1_twr.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/pb1x00.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/pcm030.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/pm9261.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/pm9263.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/r0p7734.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/r2dplus.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/r7780mp.h	/^# define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/redwood.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/rsk7203.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/rsk7264.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/rsk7269.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sbc8349.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sbc8548.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sequoia.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/shmin.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/smdk2410.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/socrates.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/spear-common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/strider.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/t3corp.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/v38b.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/vct.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/ve8313.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/vme8349.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/walnut.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS /;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/x600.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xilinx-ppc.h	/^#define	CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/xtfpga.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/yosemite.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/yucca.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/zipitz2.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/zmx25.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/configs/zynq-common.h	/^# define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS	include/mtd/cfi_flash.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS_DETECT	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS_DETECT	include/configs/TQM834x.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS_DETECT	include/configs/boston.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	/;"	d
CONFIG_SYS_MAX_FLASH_BANKS_DETECT	include/configs/lwmon5.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT /;"	d
CONFIG_SYS_MAX_FLASH_BANKS_DETECT	include/configs/uniphier.h	/^#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/autoconf.mk	/^CONFIG_SYS_MAX_FLASH_SECT=512$/;"	m
CONFIG_SYS_MAX_FLASH_SECT	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5249EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5272C3.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MIP405.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/MigoR.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/P1022DS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/PATI.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/PIP405.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/PLU405.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/PMC440.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM5200.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM823L.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM823M.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM834x.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM850L.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM850M.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM855L.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM855M.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM860L.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM860M.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM862L.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM862M.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM866M.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/TQM885D.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/UCP1020.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/VCMA9.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/VOM405.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/a3m071.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/a4m072.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ac14xx.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/acadia.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/am335x_evm.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/amcore.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/aria.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/atngw100.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/atstk1002.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bamboo.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bav335x.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/blanche.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/boston.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/bubinga.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/calimain.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/canmb.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/canyonlands.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm-bf527.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm-bf533.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm-bf548.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm-bf561.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cm5200.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/cobra5272.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/da850evm.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/devkit3250.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/dlvision.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/dnp5370.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ecovec.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/edb93xx.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/edminiv2.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/espt.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ethernut5.h	/^# define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/flea3.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/grasshopper.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/grsim.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/hrcon.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/icon.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ids8313.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/inka4x0.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/integratorap.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/integratorcp.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/intip.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/io.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/io64.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/iocon.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ipek01.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/jupiter.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/katmai.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/kilauea.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/km82xx.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/kzm9g.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/lsxl.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/luan.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/lwmon5.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/makalu.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/malta.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mecp5123.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/motionpro.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mpr2.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ms7720se.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ms7722se.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ms7750se.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/munices.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mx31ads.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/neo.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/o2d.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/o2d300.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/o2dnt2.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/o2i.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/o2mnt.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/o3dnt.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/p1_twr.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/pb1x00.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/pcm030.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/pm9261.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/pm9263.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/r0p7734.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/r2dplus.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/r7780mp.h	/^# define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/redwood.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/rsk7203.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/rsk7264.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/rsk7269.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sbc8349.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sbc8548.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sequoia.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/shmin.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/smdk2410.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/socrates.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/spear-common.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/strider.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/t3corp.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/uniphier.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/v38b.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/vct.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/ve8313.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/vme8349.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/walnut.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MAX_FLASH_SECT /;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/x600.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xilinx-ppc440-generic.h	/^#define	CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/xtfpga.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/yosemite.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/yucca.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/zipitz2.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/zmx25.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/configs/zynq-common.h	/^# define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	include/flash.h	/^#define CONFIG_SYS_MAX_FLASH_SECT	/;"	d
CONFIG_SYS_MAX_FLASH_SECT	spl/include/autoconf.mk	/^CONFIG_SYS_MAX_FLASH_SECT=512$/;"	m
CONFIG_SYS_MAX_I2C_BUS	drivers/i2c/adi_i2c.c	/^#define CONFIG_SYS_MAX_I2C_BUS /;"	d	file:
CONFIG_SYS_MAX_I2C_BUS	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/configs/ethernut5.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/configs/r0p7734.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/i2c.h	/^#  define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_I2C_BUS	include/i2c.h	/^# define CONFIG_SYS_MAX_I2C_BUS	/;"	d
CONFIG_SYS_MAX_MTD_BANKS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MAX_MTD_BANKS	/;"	d
CONFIG_SYS_MAX_MTD_BANKS	include/configs/mcx.h	/^#define CONFIG_SYS_MAX_MTD_BANKS	/;"	d
CONFIG_SYS_MAX_MTD_BANKS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_MAX_MTD_BANKS	/;"	d
CONFIG_SYS_MAX_MTD_BANKS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MAX_MTD_BANKS	/;"	d
CONFIG_SYS_MAX_NAND_CHIPS	include/configs/work_92105.h	/^#define CONFIG_SYS_MAX_NAND_CHIPS /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/P1022DS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/PLU405.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/PMC440.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/VCMA9.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/acadia.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/apf27.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/aria.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/axs10x.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bamboo.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/br4.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/brppt1.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/canyonlands.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/cm-bf527.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/cm_t35.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/colibri_t20.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/corvus.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/da850evm.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/devkit3250.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ea20.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/etamin.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ethernut5.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/flea3.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/gw_ventana.h	/^  #define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/harmony.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ids8313.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ip04.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ipam390.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/kilauea.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/km/km_arm.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/km8360.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/m53evk.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mcx.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mecp5123.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/medcom-wide.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/meesc.h	/^# define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mv-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mx53ard.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/mxs.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pcm052.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pcm058.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/platinum.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/plutux.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pm9261.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pm9263.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pm9g45.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/pr1.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/seaboard.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sequoia.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/smartweb.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/smdk2410.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/snapper9260.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/socrates.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/spear-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/suvd3.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/tao3530.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/taurus.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/tec.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ti_armv7_omap.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/titanium.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/tricorder.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/uniphier.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/ve8313.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/vf610twr.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/work_92105.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE /;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/x600.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_NAND_DEVICE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MAX_NAND_DEVICE	/;"	d
CONFIG_SYS_MAX_PCI_EPS	arch/powerpc/cpu/mpc85xx/liodn.c	/^#define CONFIG_SYS_MAX_PCI_EPS	/;"	d	file:
CONFIG_SYS_MAX_RAM_SIZE	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_MAX_RAM_SIZE /;"	d
CONFIG_SYS_MAX_RAM_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_MAX_RAM_SIZE	/;"	d
CONFIG_SYS_MAX_RAM_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_MAX_RAM_SIZE	/;"	d
CONFIG_SYS_MAX_RAM_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_MAX_RAM_SIZE	/;"	d
CONFIG_SYS_MAX_RAM_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MAX_RAM_SIZE	/;"	d
CONFIG_SYS_MAX_RAM_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MAX_RAM_SIZE	/;"	d
CONFIG_SYS_MB862xx_CCF	drivers/video/mb862xx.c	/^#define CONFIG_SYS_MB862xx_CCF	/;"	d	file:
CONFIG_SYS_MB862xx_CCF	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MB862xx_CCF	/;"	d
CONFIG_SYS_MB862xx_CCF	include/configs/ipek01.h	/^#define CONFIG_SYS_MB862xx_CCF	/;"	d
CONFIG_SYS_MB862xx_CCF	include/configs/lwmon5.h	/^#define CONFIG_SYS_MB862xx_CCF	/;"	d
CONFIG_SYS_MB862xx_CCF	include/configs/socrates.h	/^#define CONFIG_SYS_MB862xx_CCF	/;"	d
CONFIG_SYS_MB862xx_MMR	drivers/video/mb862xx.c	/^#define CONFIG_SYS_MB862xx_MMR	/;"	d	file:
CONFIG_SYS_MB862xx_MMR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MB862xx_MMR	/;"	d
CONFIG_SYS_MB862xx_MMR	include/configs/ipek01.h	/^#define CONFIG_SYS_MB862xx_MMR	/;"	d
CONFIG_SYS_MB862xx_MMR	include/configs/lwmon5.h	/^#define CONFIG_SYS_MB862xx_MMR	/;"	d
CONFIG_SYS_MB862xx_MMR	include/configs/socrates.h	/^#define CONFIG_SYS_MB862xx_MMR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M52277EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5272C3.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/TQM5200.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/a3m071.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/a4m072.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/amcore.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/canmb.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/cm5200.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/cobra5272.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/inka4x0.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/ipek01.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/jupiter.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/motionpro.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/munices.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/pcm030.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR	include/configs/v38b.h	/^#define CONFIG_SYS_MBAR	/;"	d
CONFIG_SYS_MBAR2	include/configs/M5249EVB.h	/^#define	CONFIG_SYS_MBAR2	/;"	d
CONFIG_SYS_MBAR2	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MBAR2	/;"	d
CONFIG_SYS_MBAR2	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MBAR2	/;"	d
CONFIG_SYS_MBYTES_RAM	include/configs/acadia.h	/^#define CONFIG_SYS_MBYTES_RAM	/;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/bamboo.h	/^#define CONFIG_SYS_MBYTES_SDRAM	/;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/canyonlands.h	/^#define CONFIG_SYS_MBYTES_SDRAM	/;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/intip.h	/^#define CONFIG_SYS_MBYTES_SDRAM	/;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/io64.h	/^#define CONFIG_SYS_MBYTES_SDRAM /;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/kilauea.h	/^#define CONFIG_SYS_MBYTES_SDRAM /;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/lwmon5.h	/^#define CONFIG_SYS_MBYTES_SDRAM	/;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/makalu.h	/^#define CONFIG_SYS_MBYTES_SDRAM /;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/sequoia.h	/^#define CONFIG_SYS_MBYTES_SDRAM /;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/t3corp.h	/^#define CONFIG_SYS_MBYTES_SDRAM	/;"	d
CONFIG_SYS_MBYTES_SDRAM	include/configs/vct.h	/^#define CONFIG_SYS_MBYTES_SDRAM	/;"	d
CONFIG_SYS_MCATT0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MCATT0_VAL	/;"	d
CONFIG_SYS_MCATT0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MCATT0_VAL	/;"	d
CONFIG_SYS_MCATT0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MCATT0_VAL	/;"	d
CONFIG_SYS_MCATT1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MCATT1_VAL	/;"	d
CONFIG_SYS_MCATT1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MCATT1_VAL	/;"	d
CONFIG_SYS_MCATT1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MCATT1_VAL	/;"	d
CONFIG_SYS_MCFRRTC_BASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MCFRRTC_BASE	/;"	d
CONFIG_SYS_MCFRTC_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_MCFRTC_BASE	/;"	d
CONFIG_SYS_MCIO0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MCIO0_VAL	/;"	d
CONFIG_SYS_MCIO0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MCIO0_VAL	/;"	d
CONFIG_SYS_MCIO0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MCIO0_VAL	/;"	d
CONFIG_SYS_MCIO1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MCIO1_VAL	/;"	d
CONFIG_SYS_MCIO1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MCIO1_VAL	/;"	d
CONFIG_SYS_MCIO1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MCIO1_VAL	/;"	d
CONFIG_SYS_MCKR	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR	include/configs/corvus.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR	include/configs/smartweb.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR	include/configs/taurus.h	/^#define CONFIG_SYS_MCKR	/;"	d
CONFIG_SYS_MCKR1_VAL	include/configs/at91sam9263ek.h	/^#define	CONFIG_SYS_MCKR1_VAL	/;"	d
CONFIG_SYS_MCKR1_VAL	include/configs/pm9261.h	/^#define	CONFIG_SYS_MCKR1_VAL	/;"	d
CONFIG_SYS_MCKR1_VAL	include/configs/pm9263.h	/^#define	CONFIG_SYS_MCKR1_VAL	/;"	d
CONFIG_SYS_MCKR2_VAL	include/configs/at91sam9263ek.h	/^#define	CONFIG_SYS_MCKR2_VAL	/;"	d
CONFIG_SYS_MCKR2_VAL	include/configs/pm9261.h	/^#define	CONFIG_SYS_MCKR2_VAL	/;"	d
CONFIG_SYS_MCKR2_VAL	include/configs/pm9263.h	/^#define	CONFIG_SYS_MCKR2_VAL	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/corvus.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/smartweb.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_CSS	include/configs/taurus.h	/^#define CONFIG_SYS_MCKR_CSS	/;"	d
CONFIG_SYS_MCKR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MCKR_VAL	/;"	d
CONFIG_SYS_MCLINK_MAX	include/configs/hrcon.h	/^#define CONFIG_SYS_MCLINK_MAX	/;"	d
CONFIG_SYS_MCLINK_MAX	include/configs/iocon.h	/^#define CONFIG_SYS_MCLINK_MAX	/;"	d
CONFIG_SYS_MCLINK_MAX	include/configs/strider.h	/^#define CONFIG_SYS_MCLINK_MAX	/;"	d
CONFIG_SYS_MCMEM0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MCMEM0_VAL	/;"	d
CONFIG_SYS_MCMEM0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MCMEM0_VAL	/;"	d
CONFIG_SYS_MCMEM0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MCMEM0_VAL	/;"	d
CONFIG_SYS_MCMEM1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MCMEM1_VAL	/;"	d
CONFIG_SYS_MCMEM1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MCMEM1_VAL	/;"	d
CONFIG_SYS_MCMEM1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MCMEM1_VAL	/;"	d
CONFIG_SYS_MC_RSV_MEM_ALIGN	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_MC_RSV_MEM_ALIGN	/;"	d
CONFIG_SYS_MDC1_PIN	include/configs/io64.h	/^#define CONFIG_SYS_MDC1_PIN /;"	d
CONFIG_SYS_MDCNFG_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MDCNFG_VAL	/;"	d
CONFIG_SYS_MDCNFG_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MDCNFG_VAL	/;"	d
CONFIG_SYS_MDCNFG_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MDCNFG_VAL	/;"	d
CONFIG_SYS_MDC_PIN	include/configs/io.h	/^#define CONFIG_SYS_MDC_PIN /;"	d
CONFIG_SYS_MDC_PIN	include/configs/io64.h	/^#define CONFIG_SYS_MDC_PIN /;"	d
CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	/;"	d
CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	/;"	d
CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	/;"	d
CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	/;"	d
CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AL	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AL	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AL	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_AU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_ML	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_ML	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_ML	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_ML	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_ML	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_MU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_MU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_MU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_MU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT0_MU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT0_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AL	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AL	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AL	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_AU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_ML	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_ML	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_ML	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_ML	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_ML	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_MU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_MU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_MU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_MU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT1_MU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT1_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AL	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AL	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AL	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_AU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_ML	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_ML	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_ML	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_ML	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_ML	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_MU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_MU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_MU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_MU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT2_MU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT2_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AL	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AL	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AL	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_AU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_ML	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_ML	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_ML	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_ML	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_ML	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_MU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_MU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_MU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_MU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT3_MU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT3_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AL	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AL	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AL	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AL	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AL	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AL	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_AU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_AU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_ML	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_ML	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_ML	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_ML	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_ML	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_ML	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_MU	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_MU	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_MU	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_MU	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_MU	/;"	d
CONFIG_SYS_MDDRCGRP_LUT4_MU	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_LUT4_MU	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG1	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG1	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG1	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG1	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG1	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG1	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG1	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG1	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG1	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG2	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG2	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG2	include/configs/aria.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG2	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG2	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG2	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG2	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG2	/;"	d
CONFIG_SYS_MDDRCGRP_PM_CFG2	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRCGRP_PM_CFG2	/;"	d
CONFIG_SYS_MDDRC_SYS_CFG	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG /;"	d
CONFIG_SYS_MDDRC_SYS_CFG	include/configs/aria.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG /;"	d
CONFIG_SYS_MDDRC_SYS_CFG	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG	/;"	d
CONFIG_SYS_MDDRC_SYS_CFG	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG	/;"	d
CONFIG_SYS_MDDRC_SYS_CFG	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG	/;"	d
CONFIG_SYS_MDDRC_SYS_CFG_ALT1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG_ALT1	/;"	d
CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA	/;"	d
CONFIG_SYS_MDDRC_SYS_CFG_EN	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_SYS_CFG_EN	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG0	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG0	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG0	include/configs/aria.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG0	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG0	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG0	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG0	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG0	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG0	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG0	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG0_ALT1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG0_ALT1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1	include/configs/aria.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1_ALT1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1_ALT1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2	include/configs/ac14xx.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2	include/configs/aria.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2	include/configs/mecp5123.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2_ALT1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2_ALT1	/;"	d
CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA	/;"	d
CONFIG_SYS_MDIO1_OFFSET	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_MDIO1_OFFSET	/;"	d
CONFIG_SYS_MDIO1_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MDIO1_OFFSET	/;"	d
CONFIG_SYS_MDIO1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MDIO1_OFFSET	/;"	d
CONFIG_SYS_MDIO1_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MDIO1_OFFSET	/;"	d
CONFIG_SYS_MDIO1_PIN	include/configs/io64.h	/^#define CONFIG_SYS_MDIO1_PIN /;"	d
CONFIG_SYS_MDIO_BASE_ADDR	include/tsec.h	/^#define CONFIG_SYS_MDIO_BASE_ADDR /;"	d
CONFIG_SYS_MDIO_PIN	include/configs/io.h	/^#define CONFIG_SYS_MDIO_PIN /;"	d
CONFIG_SYS_MDIO_PIN	include/configs/io64.h	/^#define CONFIG_SYS_MDIO_PIN /;"	d
CONFIG_SYS_MDMRS_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MDMRS_VAL	/;"	d
CONFIG_SYS_MDMRS_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MDMRS_VAL	/;"	d
CONFIG_SYS_MDMRS_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MDMRS_VAL	/;"	d
CONFIG_SYS_MDREFR_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MDREFR_VAL	/;"	d
CONFIG_SYS_MDREFR_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MDREFR_VAL	/;"	d
CONFIG_SYS_MDREFR_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MDREFR_VAL	/;"	d
CONFIG_SYS_MECR_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MECR_VAL	/;"	d
CONFIG_SYS_MECR_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MECR_VAL	/;"	d
CONFIG_SYS_MECR_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MECR_VAL	/;"	d
CONFIG_SYS_MEMAC_LITTLE_ENDIAN	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN$/;"	d
CONFIG_SYS_MEMORY_BASE	include/configs/xtfpga.h	/^#define CONFIG_SYS_MEMORY_BASE	/;"	d
CONFIG_SYS_MEMORY_SIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_MEMORY_SIZE	/;"	d
CONFIG_SYS_MEMORY_TOP	include/configs/xtfpga.h	/^#define CONFIG_SYS_MEMORY_TOP	/;"	d
CONFIG_SYS_MEMTEST_END	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M52277EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5272C3.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5282EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M54451EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M54455EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MIP405.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/MigoR.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/P1022DS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/PATI.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/PIP405.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/PLU405.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/PMC440.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM5200.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM823L.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM823M.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM834x.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM850L.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM850M.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM855L.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM855M.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM860L.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM860M.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM862L.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM862M.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM866M.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/TQM885D.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/UCP1020.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/VCMA9.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/VOM405.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/a3m071.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/a4m072.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ac14xx.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/amcc-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/amcore.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ap121.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ap143.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/apf27.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/aria.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/atngw100.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/atstk1002.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/blanche.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/boston.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/calimain.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/canmb.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/cm5200.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/cm_fx6.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/cm_t35.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/cobra5272.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/colibri_vf.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/cyrus.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/da850evm.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/devkit3250.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/devkit8000.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ea20.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ecovec.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/edminiv2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/el6x_common.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/espt.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ethernut5.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/exynos5-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/flea3.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/grasshopper.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/grsim.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/highbank.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/hrcon.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ids8313.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/inka4x0.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/integrator-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ipam390.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ipek01.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/jupiter.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/km/km_arm.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/kzm9g.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/legoev3.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1012afrdm.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/lwmon5.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/m53evk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/malta.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mcx.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mecp5123.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/meesc.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/motionpro.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mpr2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ms7720se.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ms7722se.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ms7750se.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/munices.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mv-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx25pdk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx31ads.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx31pdk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx51evk.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx53ard.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx53evk.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx53loco.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx53smd.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6slevk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/mxs.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/novena.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/o2d.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/o2d300.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/o2dnt2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/o2i.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/o2mnt.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/o3dnt.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/odroid.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/omap3_logic.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/omap3_overo.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/origen.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/p1_twr.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pb1x00.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pcm030.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pcm051.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pcm052.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/platinum.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pm9261.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pm9263.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/pm9g45.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/r0p7734.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/r2dplus.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/r7780mp.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/rpi.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/rsk7203.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/rsk7264.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/rsk7269.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sandbox.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sbc8349.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sbc8548.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sh7752evb.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sh7753evb.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/shmin.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/smartweb.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/smdk2410.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/smdkc100.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/smdkv310.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/snapper9260.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/snapper9g45.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/socrates.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/spear-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/strider.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/stv0991.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/t4qds.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/tao3530.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/tbs2910.h	/^#define CONFIG_SYS_MEMTEST_END /;"	d
CONFIG_SYS_MEMTEST_END	include/configs/tegra-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/titanium.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/trats.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/trats2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/tricorder.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/udoo.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/uniphier.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/usbarmory.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/v38b.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/vct.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/ve8313.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/vf610twr.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/vme8349.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/wandboard.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/warp.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/warp7.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/work_92105.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/x600.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/x86-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xpress.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/xtfpga.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/zipitz2.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/zmx25.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_END	include/configs/zynq-common.h	/^#define CONFIG_SYS_MEMTEST_END	/;"	d
CONFIG_SYS_MEMTEST_SCRATCH	cmd/mem.c	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d	file:
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH	/;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH	/;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/el6x_common.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH /;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/tao3530.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH	/;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/tricorder.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH	/;"	d
CONFIG_SYS_MEMTEST_SCRATCH	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_MEMTEST_SCRATCH	/;"	d
CONFIG_SYS_MEMTEST_START	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M52277EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5272C3.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5282EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M54451EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M54455EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MIP405.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/MigoR.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/P1022DS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/PATI.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/PIP405.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/PLU405.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/PMC440.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM5200.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM823L.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM823M.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM834x.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM850L.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM850M.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM855L.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM855M.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM860L.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM860M.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM862L.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM862M.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM866M.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/TQM885D.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/UCP1020.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/VCMA9.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/VOM405.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/a3m071.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/a4m072.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ac14xx.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/amcc-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/amcore.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ap121.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ap143.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/apf27.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/aria.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/atngw100.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/atstk1002.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/blanche.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/boston.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/calimain.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/canmb.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/cm5200.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/cm_fx6.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/cm_t35.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/cobra5272.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/colibri_vf.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/cyrus.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/da850evm.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/devkit3250.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/devkit8000.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ea20.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ecovec.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/edminiv2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/el6x_common.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/espt.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ethernut5.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/exynos5-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/flea3.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/grasshopper.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/grsim.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/highbank.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/hrcon.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ids8313.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/inka4x0.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/integrator-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ipam390.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ipek01.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/jupiter.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/km/km-powerpc.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/km/km_arm.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/kzm9g.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/legoev3.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1012afrdm.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/lwmon5.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/m53evk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/malta.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mcx.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mecp5123.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/meesc.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/motionpro.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mpc5121-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mpr2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ms7720se.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ms7722se.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ms7750se.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/munices.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mv-common.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx25pdk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx31ads.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx31pdk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx51evk.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx53ard.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx53evk.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx53loco.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx53smd.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6slevk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/mxs.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/novena.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/o2d.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/o2d300.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/o2dnt2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/o2i.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/o2mnt.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/o3dnt.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/odroid.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/omap3_logic.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/omap3_overo.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/origen.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/p1_twr.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pb1x00.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pb1x00.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pcm030.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pcm051.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pcm052.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/platinum.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pm9261.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pm9263.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/pm9g45.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/r0p7734.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/r2dplus.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/r7780mp.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/rpi.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/rsk7203.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/rsk7264.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/rsk7269.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sandbox.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sbc8349.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sbc8548.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sh7752evb.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sh7753evb.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/shmin.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/smartweb.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/smdk2410.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/smdkc100.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/smdkv310.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/snapper9260.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/snapper9g45.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/socrates.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/spear-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/strider.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/stv0991.h	/^#define CONFIG_SYS_MEMTEST_START /;"	d
CONFIG_SYS_MEMTEST_START	include/configs/t4qds.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/tao3530.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/tbs2910.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/tegra-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/titanium.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/trats.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/trats2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/tricorder.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/udoo.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/uniphier.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/usbarmory.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/v38b.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/vct.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/ve8313.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/vf610twr.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/vme8349.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/wandboard.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/warp.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/warp7.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/work_92105.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/x600.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/x86-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xpress.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/xtfpga.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/zipitz2.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/zmx25.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEMTEST_START	include/configs/zynq-common.h	/^#define CONFIG_SYS_MEMTEST_START	/;"	d
CONFIG_SYS_MEM_RESERVE_SECURE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_MEM_RESERVE_SECURE	/;"	d
CONFIG_SYS_MEM_SIZE	include/configs/malta.h	/^#define CONFIG_SYS_MEM_SIZE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/PMC440.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/lwmon5.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/odroid.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/odroid_xu3.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/origen.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/sequoia.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/theadorable.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/trats.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/trats2.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MEM_TOP_HIDE	include/configs/uniphier.h	/^#define CONFIG_SYS_MEM_TOP_HIDE	/;"	d
CONFIG_SYS_MFD	include/configs/M5282EVB.h	/^#define CONFIG_SYS_MFD	/;"	d
CONFIG_SYS_MFD	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_MFD	/;"	d
CONFIG_SYS_MHZ	include/configs/ap121.h	/^#define CONFIG_SYS_MHZ /;"	d
CONFIG_SYS_MHZ	include/configs/ap143.h	/^#define CONFIG_SYS_MHZ /;"	d
CONFIG_SYS_MHZ	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MHZ	/;"	d
CONFIG_SYS_MHZ	include/configs/malta.h	/^#define CONFIG_SYS_MHZ	/;"	d
CONFIG_SYS_MHZ	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MHZ	/;"	d
CONFIG_SYS_MHZ	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MHZ	/;"	d
CONFIG_SYS_MHZ	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MHZ	/;"	d
CONFIG_SYS_MICRON_BMODE	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_BMODE	/;"	d
CONFIG_SYS_MICRON_BMODE_PARAM	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_BMODE_PARAM	/;"	d
CONFIG_SYS_MICRON_BMODE_RSTDLL	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_BMODE_RSTDLL	/;"	d
CONFIG_SYS_MICRON_EMODE	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMODE	/;"	d
CONFIG_SYS_MICRON_EMODE2	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMODE2	/;"	d
CONFIG_SYS_MICRON_EMODE3	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMODE3	/;"	d
CONFIG_SYS_MICRON_EMODE_PARAM	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMODE_PARAM	/;"	d
CONFIG_SYS_MICRON_EMR	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMR	/;"	d
CONFIG_SYS_MICRON_EMR	include/configs/aria.h	/^#define CONFIG_SYS_MICRON_EMR	/;"	d
CONFIG_SYS_MICRON_EMR2	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMR2	/;"	d
CONFIG_SYS_MICRON_EMR2	include/configs/aria.h	/^#define CONFIG_SYS_MICRON_EMR2	/;"	d
CONFIG_SYS_MICRON_EMR3	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMR3	/;"	d
CONFIG_SYS_MICRON_EMR3	include/configs/aria.h	/^#define CONFIG_SYS_MICRON_EMR3	/;"	d
CONFIG_SYS_MICRON_EMR_OCD	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_EMR_OCD /;"	d
CONFIG_SYS_MICRON_EMR_OCD	include/configs/aria.h	/^#define CONFIG_SYS_MICRON_EMR_OCD /;"	d
CONFIG_SYS_MICRON_INIT_DEV_OP	include/configs/ac14xx.h	/^#define CONFIG_SYS_MICRON_INIT_DEV_OP	/;"	d
CONFIG_SYS_MICRON_INIT_DEV_OP	include/configs/aria.h	/^#define CONFIG_SYS_MICRON_INIT_DEV_OP	/;"	d
CONFIG_SYS_MICRON_INIT_DEV_OP	include/configs/mecp5123.h	/^#define CONFIG_SYS_MICRON_INIT_DEV_OP	/;"	d
CONFIG_SYS_MICRON_INIT_DEV_OP	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MICRON_INIT_DEV_OP	/;"	d
CONFIG_SYS_MICRON_INIT_DEV_OP	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MICRON_INIT_DEV_OP	/;"	d
CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD	arch/mips/Kconfig	/^config SYS_MIPS_CACHE_INIT_RAM_LOAD$/;"	c	menu:MIPS architecture
CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD_MODULE	arch/mips/Kconfig	/^config SYS_MIPS_CACHE_INIT_RAM_LOAD$/;"	c	menu:MIPS architecture
CONFIG_SYS_MIPS_CACHE_MODE	arch/mips/lib/cache_init.S	/^#define CONFIG_SYS_MIPS_CACHE_MODE /;"	d	file:
CONFIG_SYS_MIPS_CACHE_MODE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_MIPS_CACHE_MODE	/;"	d
CONFIG_SYS_MIPS_CACHE_MODE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MIPS_CACHE_MODE	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/ap121.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ /;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/ap143.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ /;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/boston.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/dbau1x00.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/malta.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/pb1x00.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MIPS_TIMER_FREQ	include/configs/vct.h	/^#define CONFIG_SYS_MIPS_TIMER_FREQ	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/cm_t35.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/imx6_spl.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/mcx.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/rk3288_common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/rk3399_common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/sniper.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/tao3530.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION /;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION /;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/tricorder.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION /;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	include/configs/zynq-common.h	/^#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/brppt1.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/devkit8000.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	include/configs/zynq-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/brppt1.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/devkit8000.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	include/configs/zynq-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/brppt1.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/devkit8000.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/gw_ventana.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	include/configs/zynq-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	common/spl/spl_mmc.c	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION /;"	d	file:
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	include/configs/kc1.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	include/configs/sniper.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/autoconf.mk	/^CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=80$/;"	m
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/brppt1.h	/^ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/brxre1.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/clearfog.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/cm_fx6.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/cm_t35.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/cm_t43.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/cm_t54.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/da850evm.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/imx6_spl.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/mcx.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/rk3288_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/rk3399_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/sunxi-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/tam3517-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/tao3530.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/tricorder.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/uniphier.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/woodburn_sd.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	/;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	include/configs/zynq-common.h	/^#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR /;"	d
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	spl/include/autoconf.mk	/^CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=80$/;"	m
CONFIG_SYS_MMC_BASE	include/configs/clearfog.h	/^#define CONFIG_SYS_MMC_BASE	/;"	d
CONFIG_SYS_MMC_BASE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_MMC_BASE	/;"	d
CONFIG_SYS_MMC_BASE	include/configs/openrd.h	/^#define CONFIG_SYS_MMC_BASE /;"	d
CONFIG_SYS_MMC_BASE	include/configs/sheevaplug.h	/^#define CONFIG_SYS_MMC_BASE /;"	d
CONFIG_SYS_MMC_BASE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_MMC_BASE	/;"	d
CONFIG_SYS_MMC_CD_PIN	include/configs/ethernut5.h	/^#define CONFIG_SYS_MMC_CD_PIN	/;"	d
CONFIG_SYS_MMC_CLK_OD	drivers/mmc/gen_atmel_mci.c	/^# define CONFIG_SYS_MMC_CLK_OD	/;"	d	file:
CONFIG_SYS_MMC_CLK_OD	include/configs/vinco.h	/^#define CONFIG_SYS_MMC_CLK_OD	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/autoconf.mk	/^CONFIG_SYS_MMC_ENV_DEV=0$/;"	m
CONFIG_SYS_MMC_ENV_DEV	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/P1022DS.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/P2041RDB.h	/^	#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/UCP1020.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/am335x_evm.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/am335x_shc.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/apalis_t30.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/apx4devkit.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/bav335x.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/beaver.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/brppt1.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/brxre1.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/cardhu.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/cei-tk1-som.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/clearfog.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/cm_t54.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/colibri_t30.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/colibri_vf.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/cyrus.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/dalmore.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/e2220-1170.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/el6x_common.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/evb_rk3288.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/evb_rk3399.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/exynos5-common.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/fennec_rk3288.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/firefly-rk3288.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/gw_ventana.h	/^  #define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/jetson-tk1.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/kylin_rk3036.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/miniarm_rk3288.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx23_olinuxino.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx23evk.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx25pdk.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx25pdk.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx28evk.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx51evk.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx53ard.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx53evk.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx53loco.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx53smd.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6slevk.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/novena.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/nyan-big.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/odroid.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/omap4_sdp4430.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/origen.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/p1_twr.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/p2371-0000.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/p2371-2180.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/p2571.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/p2771-0000.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/paz00.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/pcm052.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/platinum.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/popmetal_rk3288.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/rock2.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/s32v234evb.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/sc_sps_1.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/seaboard.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/secomx6quq7.h	/^	#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/smdkv310.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/sunxi-common.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/tbs2910.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/tec-ng.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/titanium.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/tqma6.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/trats.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/trats2.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ts4800.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/udoo.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/uniphier.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/usbarmory.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/venice2.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/ventana.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/vf610twr.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/wandboard.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/warp.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/warp7.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/whistler.h	/^#define CONFIG_SYS_MMC_ENV_DEV /;"	d
CONFIG_SYS_MMC_ENV_DEV	include/configs/xpress.h	/^#define CONFIG_SYS_MMC_ENV_DEV	/;"	d
CONFIG_SYS_MMC_ENV_DEV	spl/include/autoconf.mk	/^CONFIG_SYS_MMC_ENV_DEV=0$/;"	m
CONFIG_SYS_MMC_ENV_PART	include/configs/am335x_evm.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/apalis_t30.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/bav335x.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/beaver.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/brppt1.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/brxre1.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/cardhu.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/cei-tk1-som.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/cm_t54.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/colibri_t30.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/dalmore.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/e2220-1170.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/el6x_common.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/jetson-tk1.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/kylin_rk3036.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/nyan-big.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/p2371-0000.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/p2371-2180.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/p2571.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/p2771-0000.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/paz00.h	/^#define CONFIG_SYS_MMC_ENV_PART /;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/seaboard.h	/^#define CONFIG_SYS_MMC_ENV_PART /;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/tbs2910.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/tec-ng.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/uniphier.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/venice2.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/ventana.h	/^#define CONFIG_SYS_MMC_ENV_PART /;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/warp7.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/whistler.h	/^#define CONFIG_SYS_MMC_ENV_PART /;"	d
CONFIG_SYS_MMC_ENV_PART	include/configs/xpress.h	/^#define CONFIG_SYS_MMC_ENV_PART	/;"	d
CONFIG_SYS_MMC_IMG_LOAD_PART	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_MMC_IMG_LOAD_PART	/;"	d
CONFIG_SYS_MMC_IMG_LOAD_PART	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_MMC_IMG_LOAD_PART	/;"	d
CONFIG_SYS_MMC_IMG_LOAD_PART	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_MMC_IMG_LOAD_PART	/;"	d
CONFIG_SYS_MMC_IMG_LOAD_PART	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_MMC_IMG_LOAD_PART	/;"	d
CONFIG_SYS_MMC_IMG_LOAD_PART	include/configs/warp7.h	/^#define CONFIG_SYS_MMC_IMG_LOAD_PART	/;"	d
CONFIG_SYS_MMC_IMG_LOAD_PART	include/configs/xpress.h	/^#define CONFIG_SYS_MMC_IMG_LOAD_PART	/;"	d
CONFIG_SYS_MMC_MAX_BLK_COUNT	include/autoconf.mk	/^CONFIG_SYS_MMC_MAX_BLK_COUNT=65535$/;"	m
CONFIG_SYS_MMC_MAX_BLK_COUNT	include/configs/bfin_adi_common.h	/^#  define CONFIG_SYS_MMC_MAX_BLK_COUNT /;"	d
CONFIG_SYS_MMC_MAX_BLK_COUNT	include/configs/socfpga_common.h	/^#define CONFIG_SYS_MMC_MAX_BLK_COUNT	/;"	d
CONFIG_SYS_MMC_MAX_BLK_COUNT	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MMC_MAX_BLK_COUNT	/;"	d
CONFIG_SYS_MMC_MAX_BLK_COUNT	include/mmc.h	/^#define CONFIG_SYS_MMC_MAX_BLK_COUNT /;"	d
CONFIG_SYS_MMC_MAX_BLK_COUNT	spl/include/autoconf.mk	/^CONFIG_SYS_MMC_MAX_BLK_COUNT=65535$/;"	m
CONFIG_SYS_MMC_MAX_DEVICE	include/configs/cyrus.h	/^#define CONFIG_SYS_MMC_MAX_DEVICE /;"	d
CONFIG_SYS_MMC_MAX_DEVICE	include/configs/tegra-common.h	/^#define CONFIG_SYS_MMC_MAX_DEVICE /;"	d
CONFIG_SYS_MMC_MAX_DEVICE	include/configs/zynq-common.h	/^#define CONFIG_SYS_MMC_MAX_DEVICE	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/P1022DS.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST /;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_DST	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MMC_U_BOOT_DST	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/P1022DS.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS /;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/clearfog.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_OFFS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MMC_U_BOOT_OFFS	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE /;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MMC_U_BOOT_SIZE	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/P1022DS.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_START /;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T4240QDS.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MMC_U_BOOT_START	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MMC_U_BOOT_START	/;"	d
CONFIG_SYS_MONITOR_BASE	arch/blackfin/include/asm/config.h	/^#  define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M52277EVB.h	/^#	define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5272C3.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MIP405.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/MigoR.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/P1022DS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/PATI.h	/^#define	CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/PIP405.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/PLU405.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM5200.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM823L.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM823M.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM850L.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM850M.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM855L.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM855M.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM860L.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM860M.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM862L.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM862M.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM866M.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/TQM885D.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/UCP1020.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/VCMA9.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/VOM405.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/a3m071.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/a4m072.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ac14xx.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/amcc-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/amcore.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ap121.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ap143.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/aria.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/atngw100.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/atstk1002.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/axs10x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/bav335x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/bf506f-ezkit.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/boston.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/canmb.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/cm5200.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/cm_t35.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/cobra5272.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ecovec.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/edb93xx.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/espt.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ethernut5.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/exynos5-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/flea3.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/grasshopper.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/inka4x0.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/integratorcp.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ipek01.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/jupiter.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/km82xx.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/kzm9g.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/malta.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/meesc.h	/^# define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/motionpro.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/mpr2.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ms7720se.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ms7722se.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ms7750se.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/munices.h	/^#define CONFIG_SYS_MONITOR_BASE /;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/mx31ads.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/nsim.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/odroid.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/origen.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/p1_twr.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/pb1x00.h	/^#define	CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/pcm030.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/pm9261.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/r0p7734.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/r2dplus.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/r7780mp.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/rsk7203.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sandbox.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/shmin.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/smdk2410.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/smdkc100.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/strider.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/t4qds.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/tao3530.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/tb100.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/trats.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/trats2.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/v38b.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/vct.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/x600.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/x86-common.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/xtfpga.h	/^# define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE	include/configs/zipitz2.h	/^#define CONFIG_SYS_MONITOR_BASE	/;"	d
CONFIG_SYS_MONITOR_BASE_EARLY	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MONITOR_BASE_EARLY /;"	d
CONFIG_SYS_MONITOR_BASE_EARLY	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MONITOR_BASE_EARLY /;"	d
CONFIG_SYS_MONITOR_BASE_EARLY	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MONITOR_BASE_EARLY /;"	d
CONFIG_SYS_MONITOR_BASE_EARLY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MONITOR_BASE_EARLY	/;"	d
CONFIG_SYS_MONITOR_LEN	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d	file:
CONFIG_SYS_MONITOR_LEN	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d	file:
CONFIG_SYS_MONITOR_LEN	common/spl/spl.c	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d	file:
CONFIG_SYS_MONITOR_LEN	include/autoconf.mk	/^CONFIG_SYS_MONITOR_LEN="(768 << 10)"$/;"	m
CONFIG_SYS_MONITOR_LEN	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/B4860QDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/CPCI4052.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M52277EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5235EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5249EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5272C3.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5275EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5282EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M53017EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5329EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5373EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M54418TWR.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M54451EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M54455EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5475EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/M5485EVB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MIP405.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/MigoR.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/P1022DS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/P1023RDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/P2041RDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/PATI.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/PIP405.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/PLU405.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/PMC405DE.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/PMC440.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T1040QDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T104xRDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM5200.h	/^# define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM823L.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM823M.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM834x.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM850L.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM850M.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM855L.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM855M.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM860L.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM860M.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM862L.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM862M.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM866M.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/TQM885D.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/UCP1020.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/VCMA9.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/VOM405.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/a3m071.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/a4m072.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ac14xx.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/am3517_crane.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/am3517_evm.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/amcc-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/amcore.h	/^#define CONFIG_SYS_MONITOR_LEN /;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ap325rxa.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/apf27.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/aria.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bayleybay.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bct-brettl2.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf506f-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf518f-ezbrd.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf525-ucr2.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf527-sdp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf533-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf533-stamp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf538f-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf561-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/bf609-ezkit.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/blackstamp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/blackvme.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/br4.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/canmb.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm-bf527.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm-bf533.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm-bf537e.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm-bf537u.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm-bf548.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm-bf561.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm5200.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm_t35.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm_t3517.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cm_t43.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cobra5272.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/corenet_ds.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cougarcanyon2.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/crownbay.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/cyrus.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/devkit3250.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/dfi-bt700.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/dnp5370.h	/^#define CONFIG_SYS_MONITOR_LEN /;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ecovec.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/edb93xx.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/espt.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/exynos4-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/flea3.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/galileo.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/grsim.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/hrcon.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ibf-dsp561.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ids8313.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/imx6_spl.h	/^#define CONFIG_SYS_MONITOR_LEN /;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/inka4x0.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/integratorcp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ip04.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ipek01.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/jupiter.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/km82xx.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/lwmon5.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/mecp5123.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/minnowmax.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/motionpro.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/mpr2.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ms7720se.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ms7722se.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ms7750se.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/munices.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/mx31ads.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/mx35pdk.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/omap3_evm.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/p1_twr.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/pb1x00.h	/^#define	CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/pcm030.h	/^#define CONFIG_SYS_MONITOR_LEN /;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/picosam9g45.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/pr1.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/qemu-mips.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/qemu-x86.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/r0p7734.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/r2dplus.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/r7780mp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/rsk7203.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/rsk7264.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/rsk7269.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/s5p_goni.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sbc8349.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sbc8548.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sbc8641d.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sh7752evb.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sh7753evb.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/shmin.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/smdk2410.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/smdkc100.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/socrates.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/som-6896.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/som-db5800-som-6867.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/spear-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/strider.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/sunxi-common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/t4qds.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/tao3530.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/tcm-bf518.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/tcm-bf537.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/tricorder.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/uniphier.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/v38b.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/vct.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/ve8313.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/vme8349.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/woodburn_common.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/work_92105.h	/^#define CONFIG_SYS_MONITOR_LEN /;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/x600.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/x86-chromebook.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xpedite1000.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xpedite520x.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xpedite550x.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/xtfpga.h	/^# define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	include/configs/zipitz2.h	/^#define CONFIG_SYS_MONITOR_LEN	/;"	d
CONFIG_SYS_MONITOR_LEN	spl/include/autoconf.mk	/^CONFIG_SYS_MONITOR_LEN="(768 << 10)"$/;"	m
CONFIG_SYS_MONITOR_SEC	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MONITOR_SEC	/;"	d
CONFIG_SYS_MOR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_MOR_VAL	/;"	d
CONFIG_SYS_MOR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_MOR_VAL	/;"	d
CONFIG_SYS_MOR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_MOR_VAL	/;"	d
CONFIG_SYS_MPC512X_CLKIN	include/configs/ac14xx.h	/^#define CONFIG_SYS_MPC512X_CLKIN	/;"	d
CONFIG_SYS_MPC512X_CLKIN	include/configs/aria.h	/^#define CONFIG_SYS_MPC512X_CLKIN	/;"	d
CONFIG_SYS_MPC512X_CLKIN	include/configs/mecp5123.h	/^#define CONFIG_SYS_MPC512X_CLKIN	/;"	d
CONFIG_SYS_MPC512X_CLKIN	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_MPC512X_CLKIN	/;"	d
CONFIG_SYS_MPC512X_CLKIN	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MPC512X_CLKIN	/;"	d
CONFIG_SYS_MPC512x_USB1_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define CONFIG_SYS_MPC512x_USB1_ADDR /;"	d
CONFIG_SYS_MPC512x_USB1_OFFSET	arch/powerpc/include/asm/immap_512x.h	/^#define CONFIG_SYS_MPC512x_USB1_OFFSET /;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/TQM5200.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/a3m071.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/a4m072.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/canmb.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/cm5200.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/inka4x0.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/ipek01.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/jupiter.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/motionpro.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/munices.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/pcm030.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN /;"	d
CONFIG_SYS_MPC5XXX_CLKIN	include/configs/v38b.h	/^#define CONFIG_SYS_MPC5XXX_CLKIN	/;"	d
CONFIG_SYS_MPC83xx_DMA_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_DMA_ADDR /;"	d
CONFIG_SYS_MPC83xx_DMA_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_DMA_OFFSET	/;"	d
CONFIG_SYS_MPC83xx_ESDHC_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_ESDHC_ADDR /;"	d
CONFIG_SYS_MPC83xx_ESDHC_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_ESDHC_OFFSET	/;"	d
CONFIG_SYS_MPC83xx_USB1_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_USB1_ADDR /;"	d
CONFIG_SYS_MPC83xx_USB1_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_USB1_OFFSET	/;"	d
CONFIG_SYS_MPC83xx_USB1_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_USB1_OFFSET /;"	d
CONFIG_SYS_MPC83xx_USB2_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_USB2_ADDR /;"	d
CONFIG_SYS_MPC83xx_USB2_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_USB2_OFFSET	/;"	d
CONFIG_SYS_MPC83xx_USB2_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC83xx_USB2_OFFSET /;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/P1010RDB.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/P1022DS.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T102xQDS.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T102xRDB.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T104xRDB.h	/^#define	CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T208xQDS.h	/^#define	CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T208xRDB.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T4240QDS.h	/^#define	CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/T4240RDB.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85XX_NO_RESETVEC	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_MPC85XX_NO_RESETVEC$/;"	d
CONFIG_SYS_MPC85xx_CPM_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_CPM_ADDR /;"	d
CONFIG_SYS_MPC85xx_CPM_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_CPM_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_DMA1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_DMA1_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_DMA2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_DMA2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_DMA3_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_DMA3_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_DMA_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_DMA_ADDR /;"	d
CONFIG_SYS_MPC85xx_DMA_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_DMA_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_ECM_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_ECM_ADDR /;"	d
CONFIG_SYS_MPC85xx_ECM_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_ECM_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_ESDHC_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_ESDHC_ADDR /;"	d
CONFIG_SYS_MPC85xx_ESDHC_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_ESDHC_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_ESPI_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_ESPI_ADDR /;"	d
CONFIG_SYS_MPC85xx_ESPI_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_ESPI_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_GPIO3_ADDR	include/configs/controlcenterd.h	/^#define CONFIG_SYS_MPC85xx_GPIO3_ADDR	/;"	d
CONFIG_SYS_MPC85xx_GPIO_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_GPIO_ADDR /;"	d
CONFIG_SYS_MPC85xx_GPIO_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_GPIO_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_GUTS_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_GUTS_ADDR /;"	d
CONFIG_SYS_MPC85xx_GUTS_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_GUTS_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_IFC_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_IFC_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_L2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_L2_ADDR /;"	d
CONFIG_SYS_MPC85xx_L2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_L2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_LBC_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_LBC_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCI1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCI1_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCI2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCI2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCIE1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCIE1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET /;"	d
CONFIG_SYS_MPC85xx_PCIE2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCIE2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE2_OFFSET /;"	d
CONFIG_SYS_MPC85xx_PCIE3_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCIE3_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET /;"	d
CONFIG_SYS_MPC85xx_PCIE4_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIE4_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCIX2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIX2_ADDR /;"	d
CONFIG_SYS_MPC85xx_PCIX2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIX2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PCIX_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIX_ADDR /;"	d
CONFIG_SYS_MPC85xx_PCIX_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PCIX_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_PIC_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_PIC_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_QE_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_QE_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_SATA1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SATA1_ADDR /;"	d
CONFIG_SYS_MPC85xx_SATA1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SATA1_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_SATA2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SATA2_ADDR /;"	d
CONFIG_SYS_MPC85xx_SATA2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SATA2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_SCFG	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SCFG /;"	d
CONFIG_SYS_MPC85xx_SCFG_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SCFG_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_SERDES1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SERDES1_ADDR /;"	d
CONFIG_SYS_MPC85xx_SERDES1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SERDES1_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_SERDES2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SERDES2_ADDR /;"	d
CONFIG_SYS_MPC85xx_SERDES2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_SERDES2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_TDM_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_TDM_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_USB1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB1_ADDR /;"	d
CONFIG_SYS_MPC85xx_USB1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB1_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_USB1_PHY_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR /;"	d
CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET /;"	d
CONFIG_SYS_MPC85xx_USB2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB2_ADDR /;"	d
CONFIG_SYS_MPC85xx_USB2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB2_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_USB2_PHY_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR /;"	d
CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET	/;"	d
CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET /;"	d
CONFIG_SYS_MPC86xx_DMA_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC86xx_DMA_ADDR	/;"	d
CONFIG_SYS_MPC86xx_DMA_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC86xx_DMA_OFFSET	/;"	d
CONFIG_SYS_MPC86xx_PCI1_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC86xx_PCI1_OFFSET	/;"	d
CONFIG_SYS_MPC86xx_PCIE1_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET /;"	d
CONFIG_SYS_MPC86xx_PCIE2_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC86xx_PCIE2_OFFSET /;"	d
CONFIG_SYS_MPC86xx_PIC_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC86xx_PIC_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_DDR2_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC8xxx_DDR2_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_DDR2_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC8xxx_DDR2_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_DDR3_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC8xxx_DDR3_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_DDR_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_MPC8xxx_DDR_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_DDR_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC8xxx_DDR_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_DDR_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC8xxx_DDR_OFFSET	/;"	d
CONFIG_SYS_MPC8xxx_GUTS_ADDR	arch/powerpc/cpu/mpc8xxx/srio.c	/^	#define CONFIG_SYS_MPC8xxx_GUTS_ADDR /;"	d	file:
CONFIG_SYS_MPC8xxx_GUTS_ADDR	drivers/pci/fsl_pci_init.c	/^	#define CONFIG_SYS_MPC8xxx_GUTS_ADDR /;"	d	file:
CONFIG_SYS_MPC8xxx_PIC_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_MPC8xxx_PIC_ADDR /;"	d
CONFIG_SYS_MPC8xxx_PIC_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_MPC8xxx_PIC_ADDR	/;"	d
CONFIG_SYS_MPC92469AC	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_MPC92469AC$/;"	d
CONFIG_SYS_MPC92469AC	include/configs/iocon.h	/^#define CONFIG_SYS_MPC92469AC$/;"	d
CONFIG_SYS_MPEG_BASE	include/configs/ipek01.h	/^#define	CONFIG_SYS_MPEG_BASE	/;"	d
CONFIG_SYS_MPEG_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_MPEG_SIZE	/;"	d
CONFIG_SYS_MPTPR	include/configs/km82xx.h	/^#define CONFIG_SYS_MPTPR /;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM823L.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM823M.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM850L.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM850M.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM855L.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM855M.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM860L.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM860M.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM862L.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_4K	include/configs/TQM862M.h	/^#define CONFIG_SYS_MPTPR_1BK_4K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM823L.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM823M.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM850L.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM850M.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM855L.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM855M.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM860L.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM860M.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM862L.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_1BK_8K	include/configs/TQM862M.h	/^#define CONFIG_SYS_MPTPR_1BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM823L.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM823M.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM850L.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM850M.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM855L.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM855M.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM860L.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM860M.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM862L.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM862M.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM866M.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_4K	include/configs/TQM885D.h	/^#define CONFIG_SYS_MPTPR_2BK_4K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM823L.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM823M.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM850L.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM850M.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM855L.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM855M.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM860L.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM860M.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM862L.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM862M.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM866M.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPTPR_2BK_8K	include/configs/TQM885D.h	/^#define CONFIG_SYS_MPTPR_2BK_8K	/;"	d
CONFIG_SYS_MPUCLK	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MPUCLK	include/configs/draco.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MPUCLK	include/configs/etamin.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MPUCLK	include/configs/pxm2.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MPUCLK	include/configs/rastaban.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MPUCLK	include/configs/rut.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MPUCLK	include/configs/thuban.h	/^#define CONFIG_SYS_MPUCLK	/;"	d
CONFIG_SYS_MRAM_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_MRAM_BASE	/;"	d
CONFIG_SYS_MRAM_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MRAM_BASE	/;"	d
CONFIG_SYS_MRAM_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_MRAM_SIZE	/;"	d
CONFIG_SYS_MRAM_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_MRAM_SIZE	/;"	d
CONFIG_SYS_MRS_OFFS	include/configs/km82xx.h	/^#define CONFIG_SYS_MRS_OFFS	/;"	d
CONFIG_SYS_MSC0_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MSC0_VAL	/;"	d
CONFIG_SYS_MSC0_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MSC0_VAL	/;"	d
CONFIG_SYS_MSC0_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MSC0_VAL	/;"	d
CONFIG_SYS_MSC1_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MSC1_VAL	/;"	d
CONFIG_SYS_MSC1_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MSC1_VAL	/;"	d
CONFIG_SYS_MSC1_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MSC1_VAL	/;"	d
CONFIG_SYS_MSC2_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_MSC2_VAL	/;"	d
CONFIG_SYS_MSC2_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_MSC2_VAL	/;"	d
CONFIG_SYS_MSC2_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_MSC2_VAL	/;"	d
CONFIG_SYS_MTDPARTS_RUNTIME	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_MTDPARTS_RUNTIME$/;"	d
CONFIG_SYS_MVEBU_PLL_CLOCK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define CONFIG_SYS_MVEBU_PLL_CLOCK	/;"	d
CONFIG_SYS_MVFS	include/configs/dns325.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/ds414.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/goflexhome.h	/^#define CONFIG_SYS_MVFS /;"	d
CONFIG_SYS_MVFS	include/configs/guruplug.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/ib62x0.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/iconnect.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/nsa310s.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/openrd.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/pogo_e02.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MVFS	include/configs/sheevaplug.h	/^#define CONFIG_SYS_MVFS$/;"	d
CONFIG_SYS_MXC_I2C1_SLAVE	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C1_SLAVE /;"	d	file:
CONFIG_SYS_MXC_I2C1_SLAVE	include/configs/apf27.h	/^#define CONFIG_SYS_MXC_I2C1_SLAVE	/;"	d
CONFIG_SYS_MXC_I2C1_SPEED	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C1_SPEED /;"	d	file:
CONFIG_SYS_MXC_I2C1_SPEED	include/configs/apf27.h	/^#define CONFIG_SYS_MXC_I2C1_SPEED	/;"	d
CONFIG_SYS_MXC_I2C1_SPEED	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_MXC_I2C1_SPEED	/;"	d
CONFIG_SYS_MXC_I2C1_SPEED	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_MXC_I2C1_SPEED	/;"	d
CONFIG_SYS_MXC_I2C2_SLAVE	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C2_SLAVE /;"	d	file:
CONFIG_SYS_MXC_I2C2_SLAVE	include/configs/apf27.h	/^#define CONFIG_SYS_MXC_I2C2_SLAVE	/;"	d
CONFIG_SYS_MXC_I2C2_SPEED	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C2_SPEED /;"	d	file:
CONFIG_SYS_MXC_I2C2_SPEED	include/configs/apf27.h	/^#define CONFIG_SYS_MXC_I2C2_SPEED	/;"	d
CONFIG_SYS_MXC_I2C2_SPEED	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_MXC_I2C2_SPEED	/;"	d
CONFIG_SYS_MXC_I2C2_SPEED	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_MXC_I2C2_SPEED	/;"	d
CONFIG_SYS_MXC_I2C3_SLAVE	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C3_SLAVE /;"	d	file:
CONFIG_SYS_MXC_I2C3_SLAVE	include/configs/flea3.h	/^#define CONFIG_SYS_MXC_I2C3_SLAVE	/;"	d
CONFIG_SYS_MXC_I2C3_SPEED	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C3_SPEED /;"	d	file:
CONFIG_SYS_MXC_I2C3_SPEED	include/configs/cm_fx6.h	/^#define CONFIG_SYS_MXC_I2C3_SPEED	/;"	d
CONFIG_SYS_MXC_I2C4_SLAVE	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C4_SLAVE /;"	d	file:
CONFIG_SYS_MXC_I2C4_SPEED	drivers/i2c/mxc_i2c.c	/^#define CONFIG_SYS_MXC_I2C4_SPEED /;"	d	file:
CONFIG_SYS_NAND2_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_NAND2_ADDR /;"	d
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST	include/configs/ea20.h	/^#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/gw_ventana.h	/^  #define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/mxs.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/pcm058.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/platinum.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/titanium.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_5_ADDR_CYCLE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_5_ADDR_CYCLE$/;"	d
CONFIG_SYS_NAND_ACTL_ALE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_ACTL_ALE /;"	d
CONFIG_SYS_NAND_ACTL_ALE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NAND_ACTL_ALE	/;"	d
CONFIG_SYS_NAND_ACTL_CLE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_ACTL_CLE /;"	d
CONFIG_SYS_NAND_ACTL_CLE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NAND_ACTL_CLE	/;"	d
CONFIG_SYS_NAND_ACTL_DELAY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_ACTL_DELAY	/;"	d
CONFIG_SYS_NAND_ACTL_DELAY	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NAND_ACTL_DELAY	/;"	d
CONFIG_SYS_NAND_ACTL_NCE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_ACTL_NCE	/;"	d
CONFIG_SYS_NAND_ACTL_NCE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NAND_ACTL_NCE	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/acadia.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_NAND_ADDR /;"	d
CONFIG_SYS_NAND_ADDR	include/configs/canyonlands.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/kilauea.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ADDR	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_ADDR	/;"	d
CONFIG_SYS_NAND_ALE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_NAND_ALE	/;"	d
CONFIG_SYS_NAND_ALE	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_ALE /;"	d
CONFIG_SYS_NAND_AMASK	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_AMASK	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_AMASK	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BAD_BLOCK_POS	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_BAD_BLOCK_POS	/;"	d
CONFIG_SYS_NAND_BASE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/VCMA9.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/acadia.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/aria.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/axs10x.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bamboo.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf526-ezbrd.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf527-ezkit.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf537-pnav.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/br4.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/cm-bf527.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ea20.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ethernut5.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/flea3.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/gw_ventana.h	/^  #define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ip04.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/km8360.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/meesc.h	/^# define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/mx53ard.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/mxs.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pcm052.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pcm058.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/platinum.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pm9261.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pm9263.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pm9g45.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/pr1.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/smdk2410.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/snapper9260.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/spear6xx_evb.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/suvd3.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ti_armv7_omap.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/titanium.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/vf610twr.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/work_92105.h	/^#define CONFIG_SYS_NAND_BASE /;"	d
CONFIG_SYS_NAND_BASE	include/configs/x600.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NAND_BASE	/;"	d
CONFIG_SYS_NAND_BASE2	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_BASE2 /;"	d
CONFIG_SYS_NAND_BASE2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_BASE2	/;"	d
CONFIG_SYS_NAND_BASE2	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NAND_BASE2	/;"	d
CONFIG_SYS_NAND_BASE2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NAND_BASE2	/;"	d
CONFIG_SYS_NAND_BASE2	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NAND_BASE2	/;"	d
CONFIG_SYS_NAND_BASE_LIST	drivers/mtd/nand/atmel_nand.c	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d	file:
CONFIG_SYS_NAND_BASE_LIST	drivers/mtd/nand/fsl_elbc_nand.c	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d	file:
CONFIG_SYS_NAND_BASE_LIST	drivers/mtd/nand/fsl_ifc_nand.c	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d	file:
CONFIG_SYS_NAND_BASE_LIST	drivers/mtd/nand/nand.c	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d	file:
CONFIG_SYS_NAND_BASE_LIST	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/bamboo.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NAND_BASE_LIST /;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_LIST	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NAND_BASE_LIST	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS /;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BASE_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_BASE_PHYS	/;"	d
CONFIG_SYS_NAND_BCR	drivers/mtd/nand/ndfc.c	/^#define CONFIG_SYS_NAND_BCR /;"	d	file:
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_NAND_BLOCK_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_NAND_BLOCK_SIZE /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_BR_PRELIM	/;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_BR_PRELIM	/;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_BR_PRELIM	/;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_BR_PRELIM /;"	d
CONFIG_SYS_NAND_BR_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_NAND_BR_PRELIM	/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	drivers/mtd/nand/Kconfig	/^config SYS_NAND_BUSWIDTH_16BIT$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_BUSWIDTH_16BIT$/;"	d
CONFIG_SYS_NAND_BUSWIDTH_16BIT_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_BUSWIDTH_16BIT$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_BUSWIDTH_16_BIT	include/configs/omapl138_lcdk.h	/^#define	CONFIG_SYS_NAND_BUSWIDTH_16_BIT$/;"	d
CONFIG_SYS_NAND_CE	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_CE /;"	d
CONFIG_SYS_NAND_CLE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_NAND_CLE	/;"	d
CONFIG_SYS_NAND_CLE	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_CLE /;"	d
CONFIG_SYS_NAND_CS	include/configs/PMC440.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/acadia.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/bamboo.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/canyonlands.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/ea20.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/kilauea.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/sequoia.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_CS	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_CSOR	/;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSOR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_CSOR /;"	d
CONFIG_SYS_NAND_CSPR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_CSPR	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_CSPR_EXT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_CSPR_EXT	/;"	d
CONFIG_SYS_NAND_DATA_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_DATA_BASE	/;"	d
CONFIG_SYS_NAND_DATA_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_DATA_BASE	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NAND_DBW_8	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NAND_DBW_8	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_DBW_8	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/ethernut5.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/meesc.h	/^# define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/pm9261.h	/^#define CONFIG_SYS_NAND_DBW_8	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/pm9263.h	/^#define CONFIG_SYS_NAND_DBW_8	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/pm9g45.h	/^#define CONFIG_SYS_NAND_DBW_8	/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/snapper9260.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DBW_8	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_DBW_8$/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DDR_LAW	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_DDR_LAW	/;"	d
CONFIG_SYS_NAND_DENALI_64BIT	drivers/mtd/nand/Kconfig	/^config SYS_NAND_DENALI_64BIT$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_DENALI_64BIT_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_DENALI_64BIT$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_ECCBYTES	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_ECCBYTES /;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCBYTES	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_ECCBYTES	/;"	d
CONFIG_SYS_NAND_ECCPOS	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_ECCPOS /;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCPOS	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_ECCPOS	/;"	d
CONFIG_SYS_NAND_ECCSIZE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_ECCSIZE /;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_ECCSIZE	/;"	d
CONFIG_SYS_NAND_ECCSTEPS	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_ECCSTEPS	/;"	d
CONFIG_SYS_NAND_ECCSTEPS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_ECCSTEPS	/;"	d
CONFIG_SYS_NAND_ECCTOTAL	include/configs/pengwyn.h	/^#define	CONFIG_SYS_NAND_ECCTOTAL	/;"	d
CONFIG_SYS_NAND_ECCTOTAL	include/configs/siemens-am33x-common.h	/^#define	CONFIG_SYS_NAND_ECCTOTAL	/;"	d
CONFIG_SYS_NAND_ECC_BASE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_ECC_BASE	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/ethernut5.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/meesc.h	/^# define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/pm9261.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/pm9263.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/pm9g45.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/snapper9260.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN	include/configs/usb_a9263.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN_SPL	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN_SPL	/;"	d
CONFIG_SYS_NAND_ENABLE_PIN_SPL	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_ENABLE_PIN_SPL	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM0 /;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_FTIM0	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM1 /;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM1	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_FTIM1	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM2 /;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_FTIM2	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_FTIM3 /;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_FTIM3 /;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_FTIM3 /;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_FTIM3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_FTIM3	/;"	d
CONFIG_SYS_NAND_HW_ECC_OOBFIRST	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_HW_ECC_OOBFIRST	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/flea3.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/mx53ard.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LARGEPAGE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_NAND_LARGEPAGE$/;"	d
CONFIG_SYS_NAND_LBLAWAR_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_LBLAWAR_PRELIM /;"	d
CONFIG_SYS_NAND_LBLAWAR_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_LBLAWAR_PRELIM /;"	d
CONFIG_SYS_NAND_LBLAWAR_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_NAND_LBLAWAR_PRELIM	/;"	d
CONFIG_SYS_NAND_LBLAWAR_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_NAND_LBLAWAR_PRELIM /;"	d
CONFIG_SYS_NAND_LBLAWBAR_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM /;"	d
CONFIG_SYS_NAND_LBLAWBAR_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM /;"	d
CONFIG_SYS_NAND_LBLAWBAR_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM /;"	d
CONFIG_SYS_NAND_LBLAWBAR_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM /;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/ethernut5.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/meesc.h	/^# define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/pm9261.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/pm9263.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/pm9g45.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/snapper9260.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_ALE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_NAND_MASK_ALE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/ethernut5.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/meesc.h	/^# define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/pm9261.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/pm9263.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/pm9g45.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/snapper9260.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MASK_CLE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_NAND_MASK_CLE	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/cm_fx6.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS /;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/ids8313.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/platinum.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/platinum_titanium.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_CHIPS	include/linux/mtd/bbm.h	/^#define CONFIG_SYS_NAND_MAX_CHIPS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS /;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/sunxi-common.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS /;"	d
CONFIG_SYS_NAND_MAX_ECCPOS	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_MAX_ECCPOS	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MAX_OOBFREE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_MAX_OOBFREE	/;"	d
CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES$/;"	d
CONFIG_SYS_NAND_NO_SUBPAGE	include/configs/ea20.h	/^#define CONFIG_SYS_NAND_NO_SUBPAGE$/;"	d
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE	include/configs/km_kirkwood.h	/^#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE$/;"	d
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION	/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/cm_fx6.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/colibri_vf.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/gw_ventana.h	/^  #define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/mx6qsabreauto.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/pcm052.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/pcm058.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/platinum.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/spear-common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/sunxi-common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/tegra20-common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/titanium.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/vf610twr.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/woodburn_common.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/x600.h	/^#define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_ONFI_DETECTION	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_NAND_ONFI_DETECTION$/;"	d
CONFIG_SYS_NAND_OOBSIZE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_OOBSIZE /;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OOBSIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_OOBSIZE	/;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_OR_PRELIM	/;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_OR_PRELIM	/;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_OR_PRELIM	/;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_OR_PRELIM	/;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_OR_PRELIM /;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_OR_PRELIM /;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NAND_OR_PRELIM /;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NAND_OR_PRELIM /;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NAND_OR_PRELIM /;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NAND_OR_PRELIM /;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_OR_PRELIM	/;"	d
CONFIG_SYS_NAND_OR_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_NAND_OR_PRELIM	/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/da850evm.h	/^#define	CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/ea20.h	/^#define	CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/ipam390.h	/^#define	CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/k2e_evm.h	/^#define CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/k2g_evm.h	/^#define CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/k2hk_evm.h	/^#define CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_2K	include/configs/omapl138_lcdk.h	/^#define	CONFIG_SYS_NAND_PAGE_2K$/;"	d
CONFIG_SYS_NAND_PAGE_4K	include/configs/k2l_evm.h	/^#define CONFIG_SYS_NAND_PAGE_4K$/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_COUNT	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_PAGE_COUNT	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/cm_t43.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE /;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_PAGE_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_PAGE_SIZE	/;"	d
CONFIG_SYS_NAND_QUIET	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_QUIET /;"	d
CONFIG_SYS_NAND_QUIET	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_QUIET	/;"	d
CONFIG_SYS_NAND_RDY	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_RDY /;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/meesc.h	/^# define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/pm9261.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/pm9263.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/pm9g45.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/snapper9260.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_READY_PIN	include/configs/usb_a9263.h	/^#define CONFIG_SYS_NAND_READY_PIN	/;"	d
CONFIG_SYS_NAND_REGS_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_REGS_BASE	/;"	d
CONFIG_SYS_NAND_REGS_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_REGS_BASE	/;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE$/;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/PMC440.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE	/;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/acadia.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE /;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/bamboo.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE /;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/canyonlands.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE /;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/kilauea.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE /;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE	/;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE	/;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE$/;"	d
CONFIG_SYS_NAND_SELECT_DEVICE	include/configs/sequoia.h	/^#define CONFIG_SYS_NAND_SELECT_DEVICE /;"	d
CONFIG_SYS_NAND_SELF_INIT	drivers/mtd/nand/Kconfig	/^config SYS_NAND_SELF_INIT$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_SELF_INIT	include/configs/spear-common.h	/^#define CONFIG_SYS_NAND_SELF_INIT$/;"	d
CONFIG_SYS_NAND_SELF_INIT	include/configs/tegra20-common.h	/^#define CONFIG_SYS_NAND_SELF_INIT$/;"	d
CONFIG_SYS_NAND_SELF_INIT	include/configs/work_92105.h	/^#define CONFIG_SYS_NAND_SELF_INIT$/;"	d
CONFIG_SYS_NAND_SELF_INIT	include/configs/x600.h	/^#define CONFIG_SYS_NAND_SELF_INIT$/;"	d
CONFIG_SYS_NAND_SELF_INIT	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_NAND_SELF_INIT$/;"	d
CONFIG_SYS_NAND_SELF_INIT	include/nand.h	/^#define CONFIG_SYS_NAND_SELF_INIT$/;"	d
CONFIG_SYS_NAND_SELF_INIT_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_SELF_INIT$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_SIZE	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SIZE	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SIZE	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_SIZE	/;"	d
CONFIG_SYS_NAND_SKIP_BAD_DOT_I	include/configs/PLU405.h	/^#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I /;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS /;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS /;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/gw_ventana.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_KERNEL_OFFS	include/configs/twister.h	/^#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	/;"	d
CONFIG_SYS_NAND_SPL_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_SPL_SIZE	/;"	d
CONFIG_SYS_NAND_SPL_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_SPL_SIZE	/;"	d
CONFIG_SYS_NAND_SPL_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_SPL_SIZE	/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/da850evm.h	/^#define	CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/ea20.h	/^#define	CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/ipam390.h	/^#define	CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/mx53ard.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/omapl138_lcdk.h	/^#define	CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_USE_FLASH_BBT	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_USE_FLASH_BBT$/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST /;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST /;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST	/;"	d
CONFIG_SYS_NAND_U_BOOT_DST	include/configs/work_92105.h	/^#define CONFIG_SYS_NAND_U_BOOT_DST /;"	d
CONFIG_SYS_NAND_U_BOOT_LOCATIONS	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_LOCATIONS$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_U_BOOT_LOCATIONS_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_LOCATIONS$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_U_BOOT_OFFS	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_OFFS$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS /;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS /;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/bav335x.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/etamin.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS /;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/gw_ventana.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS /;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/m53evk.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/platinum.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS /;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/uniphier.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS	/;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS	include/configs/work_92105.h	/^#define CONFIG_SYS_NAND_U_BOOT_OFFS /;"	d
CONFIG_SYS_NAND_U_BOOT_OFFS_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_OFFS$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_OFFS_REDUND$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_OFFS_REDUND$/;"	c	menu:NAND Device Support
CONFIG_SYS_NAND_U_BOOT_RELOC	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC /;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC /;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC	/;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC	/;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC	/;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC_SP	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP /;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC_SP	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP /;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC_SP	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	/;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC_SP	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	/;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC_SP	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	/;"	d
CONFIG_SYS_NAND_U_BOOT_RELOC_SP	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE /;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE /;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/corvus.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_U_BOOT_SIZE	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/P1022DS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/am335x_igep0033.h	/^#define	CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/apf27.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/baltos.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/brppt1.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/cm_t335.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/cm_t35.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/corvus.h	/^#define	CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/da850evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/devkit3250.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/imx6qdl_icore.h	/^# define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/ipam390.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/mcx.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/omap3_overo.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/pengwyn.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/siemens-am33x-common.h	/^#define	CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/smartweb.h	/^#define	CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/tao3530.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/taurus.h	/^#define	CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/tricorder.h	/^#define CONFIG_SYS_NAND_U_BOOT_START	/;"	d
CONFIG_SYS_NAND_U_BOOT_START	include/configs/work_92105.h	/^#define CONFIG_SYS_NAND_U_BOOT_START /;"	d
CONFIG_SYS_NAND_VF610_NFC_45_ECC_BYTES	drivers/mtd/nand/Kconfig	/^config SYS_NAND_VF610_NFC_45_ECC_BYTES$/;"	c	choice:NAND Device Support""choice827746d80104
CONFIG_SYS_NAND_VF610_NFC_45_ECC_BYTES_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_VF610_NFC_45_ECC_BYTES$/;"	c	choice:NAND Device Support""choice827746d80104
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES	drivers/mtd/nand/Kconfig	/^config SYS_NAND_VF610_NFC_60_ECC_BYTES$/;"	c	choice:NAND Device Support""choice827746d80104
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES_MODULE	drivers/mtd/nand/Kconfig	/^config SYS_NAND_VF610_NFC_60_ECC_BYTES$/;"	c	choice:NAND Device Support""choice827746d80104
CONFIG_SYS_NAND_WINDOW_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NAND_WINDOW_SIZE	/;"	d
CONFIG_SYS_NAND_WINDOW_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NAND_WINDOW_SIZE /;"	d
CONFIG_SYS_NAND_WINDOW_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NAND_WINDOW_SIZE /;"	d
CONFIG_SYS_NDFC_EBC0_CFG	drivers/mtd/nand/ndfc.c	/^#define CONFIG_SYS_NDFC_EBC0_CFG /;"	d	file:
CONFIG_SYS_NETA_INTERFACE_TYPE	include/configs/ds414.h	/^#define CONFIG_SYS_NETA_INTERFACE_TYPE	/;"	d
CONFIG_SYS_NONCACHED_MEMORY	include/configs/tegra-common-post.h	/^#define CONFIG_SYS_NONCACHED_MEMORY	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR0_CSPR	/;"	d
CONFIG_SYS_NOR0_CSPR_EARLY	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR0_CSPR_EARLY	/;"	d
CONFIG_SYS_NOR0_CSPR_EARLY	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR0_CSPR_EARLY	/;"	d
CONFIG_SYS_NOR0_CSPR_EARLY	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR0_CSPR_EARLY	/;"	d
CONFIG_SYS_NOR0_CSPR_EARLY	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR0_CSPR_EARLY	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR0_CSPR_EXT	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR0_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR1_CSPR	/;"	d
CONFIG_SYS_NOR1_CSPR_EARLY	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR1_CSPR_EARLY	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR1_CSPR_EXT	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR1_CSPR_EXT	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_AMASK	/;"	d
CONFIG_SYS_NOR_AMASK_EARLY	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_AMASK_EARLY	/;"	d
CONFIG_SYS_NOR_AMASK_EARLY	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_AMASK_EARLY	/;"	d
CONFIG_SYS_NOR_BR_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NOR_BR_PRELIM	/;"	d
CONFIG_SYS_NOR_BR_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NOR_BR_PRELIM	/;"	d
CONFIG_SYS_NOR_BR_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_NOR_BR_PRELIM	/;"	d
CONFIG_SYS_NOR_CS	include/configs/canyonlands.h	/^#define CONFIG_SYS_NOR_CS	/;"	d
CONFIG_SYS_NOR_CS	include/configs/intip.h	/^#define CONFIG_SYS_NOR_CS	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_CSOR /;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSOR	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_CSOR	/;"	d
CONFIG_SYS_NOR_CSPR	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_CSPR	/;"	d
CONFIG_SYS_NOR_CSPR	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_CSPR	/;"	d
CONFIG_SYS_NOR_CSPR	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_CSPR	/;"	d
CONFIG_SYS_NOR_CSPR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_CSPR	/;"	d
CONFIG_SYS_NOR_CSPR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_CSPR	/;"	d
CONFIG_SYS_NOR_CSPR_EXT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_CSPR_EXT	/;"	d
CONFIG_SYS_NOR_CSPR_EXT	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_CSPR_EXT	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM0	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_FTIM0	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM1	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_FTIM1	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_FTIM2	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls2080a_simu.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_FTIM3	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_NOR_FTIM3	/;"	d
CONFIG_SYS_NOR_OR_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NOR_OR_PRELIM	/;"	d
CONFIG_SYS_NOR_OR_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NOR_OR_PRELIM	/;"	d
CONFIG_SYS_NOR_OR_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_NOR_OR_PRELIM	/;"	d
CONFIG_SYS_NO_FLASH	common/Kconfig	/^config SYS_NO_FLASH$/;"	c
CONFIG_SYS_NO_FLASH	include/autoconf.mk	/^CONFIG_SYS_NO_FLASH=y$/;"	m
CONFIG_SYS_NO_FLASH	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/M54418TWR.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC8315ERDB.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC8323ERDB.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC832XEMDS.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC8349EMDS.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC8349ITX.h	/^  #define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC837XEMDS.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC837XERDB.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC8540ADS.h	/^  #define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/MPC8560ADS.h	/^  #define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T4240QDS.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/alt.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ap121.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ap143.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/apf27.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/apx4devkit.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/aspenite.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/axs10x.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bf506f-ezkit.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bf525-ucr2.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bf537-minotaur.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bf537-srv1.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bf561-acvilon.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bg0900.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/blackstamp.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/blackvme.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/br4.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/clearfog.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/cm_t35.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/colibri_vf.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/corvus.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/cyrus.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/da850evm.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/db-88f6720.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/dns325.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/dockstar.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ds414.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ea20.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/el6x_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/exynos-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/goflexhome.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/gose.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/gplugd.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/grsim.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/h2200.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/highbank.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/hikey.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/hrcon.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ib62x0.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/iconnect.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ip04.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ipam390.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/kc1.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/koelsch.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/lacie_kw.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/lager.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/legoev3.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/lsxl.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/m28evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/m53evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/maxbcm.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mcx.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/meesc.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mv-plug-common.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx23_olinuxino.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx23evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx25pdk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx28evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx31pdk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx51evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx53ard.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx53evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx53loco.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx53smd.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx6_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/nas220.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/nsa310s.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/nsim.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/openrd.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/pcm052.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/picosam9g45.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/pm9g45.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/pogo_e02.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/porter.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/pr1.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/rk3036_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/rk3288_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/rk3399_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/rpi.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/s32v234evb.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/s5p_goni.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/salvator-x.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sandbox.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sansa_fuze_plus.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sbc8349.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sc_sps_1.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sh7752evb.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sh7753evb.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/silk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/smartweb.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/smdkc100.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/snapper9260.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/snapper9g45.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sniper.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_arria5_socdk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_cyclone5_socdk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_de0_nano_soc.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_is1.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_mcvevk.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_sockit.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_socrates.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_sr1500.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/stout.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/stv0991.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/sunxi-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/tao3530.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/taurus.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/tb100.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/tegra-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/theadorable.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/tricorder.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/ts4800.h	/^#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/uniphier.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/usb_a9263.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/usbarmory.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/vct.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/vf610twr.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/vinco.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/vme8349.h	/^	#define CONFIG_SYS_NO_FLASH	/;"	d
CONFIG_SYS_NO_FLASH	include/configs/warp7.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/work_92105.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/x86-common.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/xfi3.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	include/configs/xpress.h	/^#define CONFIG_SYS_NO_FLASH$/;"	d
CONFIG_SYS_NO_FLASH	spl/include/autoconf.mk	/^CONFIG_SYS_NO_FLASH=y$/;"	m
CONFIG_SYS_NO_FLASH_MODULE	common/Kconfig	/^config SYS_NO_FLASH$/;"	c
CONFIG_SYS_NR_PIOS	include/configs/atngw100.h	/^#define CONFIG_SYS_NR_PIOS	/;"	d
CONFIG_SYS_NR_PIOS	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_NR_PIOS	/;"	d
CONFIG_SYS_NR_PIOS	include/configs/atstk1002.h	/^#define CONFIG_SYS_NR_PIOS	/;"	d
CONFIG_SYS_NR_PIOS	include/configs/grasshopper.h	/^#define CONFIG_SYS_NR_PIOS	/;"	d
CONFIG_SYS_NR_VM_REGIONS	include/configs/atngw100.h	/^#define CONFIG_SYS_NR_VM_REGIONS	/;"	d
CONFIG_SYS_NR_VM_REGIONS	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_NR_VM_REGIONS	/;"	d
CONFIG_SYS_NR_VM_REGIONS	include/configs/atstk1002.h	/^#define CONFIG_SYS_NR_VM_REGIONS	/;"	d
CONFIG_SYS_NR_VM_REGIONS	include/configs/grasshopper.h	/^#define CONFIG_SYS_NR_VM_REGIONS	/;"	d
CONFIG_SYS_NS16550	drivers/serial/Kconfig	/^config SYS_NS16550$/;"	c	menu:Serial drivers
CONFIG_SYS_NS16550	include/config/auto.conf	/^CONFIG_SYS_NS16550=y$/;"	k
CONFIG_SYS_NS16550	include/configs/rk3036_common.h	/^#define CONFIG_SYS_NS16550$/;"	d
CONFIG_SYS_NS16550	include/generated/autoconf.h	/^#define CONFIG_SYS_NS16550 /;"	d
CONFIG_SYS_NS16550_CLK	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	arch/arm/include/asm/arch-bcmnsp/configs.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	arch/powerpc/include/asm/config.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	drivers/serial/ns16550.c	/^#define CONFIG_SYS_NS16550_CLK /;"	d	file:
CONFIG_SYS_NS16550_CLK	include/autoconf.mk	/^CONFIG_SYS_NS16550_CLK=24000000$/;"	m
CONFIG_SYS_NS16550_CLK	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/CPCI4052.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MIP405.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NS16550_CLK /;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/P1022DS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/PIP405.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/PLU405.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/PMC405DE.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/PMC440.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/TQM834x.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/UCP1020.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/VOM405.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/amcc-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ap143.h	/^#define CONFIG_SYS_NS16550_CLK /;"	d
CONFIG_SYS_NS16550_CLK	include/configs/axs10x.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/calimain.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/cm_t35.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/cm_t43.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/da850evm.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ea20.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/edminiv2.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/hrcon.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ids8313.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ipam390.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/kc1.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/legoev3.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_NS16550_CLK /;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NS16550_CLK /;"	d
CONFIG_SYS_NS16550_CLK	include/configs/lwmon5.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/mcx.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/mv-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/neo.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/openrisc-generic.h	/^# define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/p1_twr.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/qemu-mips.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/sbc8349.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/sbc8548.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/sbc8641d.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/sniper.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/socrates.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/strider.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/sunxi-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/tao3530.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/tb100.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/tegra-common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_NS16550_CLK /;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti_am335x_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/tricorder.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/vct.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/ve8313.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/vme8349.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/xpedite1000.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	include/configs/xtfpga.h	/^#define CONFIG_SYS_NS16550_CLK	/;"	d
CONFIG_SYS_NS16550_CLK	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_CLK=24000000$/;"	m
CONFIG_SYS_NS16550_CLK_DIV	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_SYS_NS16550_CLK_DIV	/;"	d
CONFIG_SYS_NS16550_COM1	arch/arm/include/asm/arch-bcmnsp/configs.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc405ep.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc405ex.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc405ez.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc405gp.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc440gp.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc440gx.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc440sp.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc440spe.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	arch/powerpc/include/asm/ppc460sx.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/P1022DS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/TQM834x.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/UCP1020.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/am335x_shc.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/apalis_t30.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/baltos.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/bav335x.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/beaver.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/calimain.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/cardhu.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/cei-tk1-som.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/cm_t335.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/cm_t43.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/colibri_t20.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/colibri_t30.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/da850evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/dalmore.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ea20.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/edminiv2.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/gplugd.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/harmony.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/hrcon.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ids8313.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ipam390.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/jetson-tk1.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/legoev3.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/medcom-wide.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/mv-common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/nyan-big.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/omap3_logic.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/openrisc-generic.h	/^# define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/p1_twr.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/paz00.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/pcm051.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/pengwyn.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/pepper.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/plutux.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/qemu-mips.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/sbc8349.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/sbc8548.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/sbc8641d.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/seaboard.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/socrates.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/strider.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/sunxi-common.h	/^# define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/tec-ng.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/tec.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_NS16550_COM1 /;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/trimslice.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/vct.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ve8313.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/venice2.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/ventana.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/vme8349.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/whistler.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	include/configs/xtfpga.h	/^#define CONFIG_SYS_NS16550_COM1	/;"	d
CONFIG_SYS_NS16550_COM1	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_COM1="SUNXI_UART0_BASE"$/;"	m
CONFIG_SYS_NS16550_COM2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc405ep.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc405ex.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc405ez.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc405gp.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc440gp.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc440gx.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc440sp.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc440spe.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	arch/powerpc/include/asm/ppc460sx.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	board/Synology/ds109/ds109.c	/^#define CONFIG_SYS_NS16550_COM2	/;"	d	file:
CONFIG_SYS_NS16550_COM2	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/P1022DS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/TQM834x.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/UCP1020.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/am335x_shc.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/baltos.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/bav335x.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/cm_t335.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/harmony.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/hrcon.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/ids8313.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/p1_twr.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/pcm051.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/sbc8349.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/sbc8548.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/sbc8641d.h	/^#define CONFIG_SYS_NS16550_COM2 /;"	d
CONFIG_SYS_NS16550_COM2	include/configs/socrates.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/strider.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/sunxi-common.h	/^# define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/ve8313.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/vme8349.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NS16550_COM2	/;"	d
CONFIG_SYS_NS16550_COM2	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_COM2="SUNXI_UART1_BASE"$/;"	m
CONFIG_SYS_NS16550_COM3	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_COM3 /;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_COM3 /;"	d
CONFIG_SYS_NS16550_COM3	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/am335x_shc.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/baltos.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/bav335x.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/cm_t35.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/eco5pk.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/kc1.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/mcx.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/pcm051.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/sniper.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/sunxi-common.h	/^# define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/tao3530.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	include/configs/tricorder.h	/^#define CONFIG_SYS_NS16550_COM3	/;"	d
CONFIG_SYS_NS16550_COM3	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_COM3="SUNXI_UART2_BASE"$/;"	m
CONFIG_SYS_NS16550_COM4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_COM4 /;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_COM4 /;"	d
CONFIG_SYS_NS16550_COM4	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/am335x_shc.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/baltos.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/bav335x.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/cm_t54.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/pcm051.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/sunxi-common.h	/^# define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_COM4	/;"	d
CONFIG_SYS_NS16550_COM4	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_COM4="SUNXI_UART3_BASE"$/;"	m
CONFIG_SYS_NS16550_COM5	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	include/configs/am335x_shc.h	/^#define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	include/configs/baltos.h	/^#define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	include/configs/bav335x.h	/^#define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	include/configs/pcm051.h	/^#define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	include/configs/sunxi-common.h	/^# define CONFIG_SYS_NS16550_COM5	/;"	d
CONFIG_SYS_NS16550_COM5	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_COM5="SUNXI_R_UART_BASE"$/;"	m
CONFIG_SYS_NS16550_COM6	include/configs/am335x_evm.h	/^#define CONFIG_SYS_NS16550_COM6	/;"	d
CONFIG_SYS_NS16550_COM6	include/configs/am335x_shc.h	/^#define CONFIG_SYS_NS16550_COM6	/;"	d
CONFIG_SYS_NS16550_COM6	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_NS16550_COM6	/;"	d
CONFIG_SYS_NS16550_COM6	include/configs/baltos.h	/^#define CONFIG_SYS_NS16550_COM6	/;"	d
CONFIG_SYS_NS16550_COM6	include/configs/bav335x.h	/^#define CONFIG_SYS_NS16550_COM6	/;"	d
CONFIG_SYS_NS16550_COM6	include/configs/pcm051.h	/^#define CONFIG_SYS_NS16550_COM6	/;"	d
CONFIG_SYS_NS16550_IER	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_SYS_NS16550_IER	/;"	d
CONFIG_SYS_NS16550_IER	drivers/serial/ns16550.c	/^#define CONFIG_SYS_NS16550_IER /;"	d	file:
CONFIG_SYS_NS16550_MEM32	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MEM32	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MEM32	include/configs/axs10x.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MEM32	include/configs/rk3036_common.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MEM32	include/configs/rk3288_common.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MEM32	include/configs/rk3399_common.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MEM32	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NS16550_MEM32$/;"	d
CONFIG_SYS_NS16550_MODULE	drivers/serial/Kconfig	/^config SYS_NS16550$/;"	c	menu:Serial drivers
CONFIG_SYS_NS16550_PORT_MAPPED	include/configs/malta.h	/^#define CONFIG_SYS_NS16550_PORT_MAPPED$/;"	d
CONFIG_SYS_NS16550_PORT_MAPPED	include/configs/x86-common.h	/^#define CONFIG_SYS_NS16550_PORT_MAPPED$/;"	d
CONFIG_SYS_NS16550_REG_SIZE	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	arch/arm/include/asm/arch-bcmnsp/configs.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	board/inka4x0/inkadiag.c	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d	file:
CONFIG_SYS_NS16550_REG_SIZE	drivers/input/ps2ser.c	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d	file:
CONFIG_SYS_NS16550_REG_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/amcc-common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/calimain.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/cm_t43.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ea20.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/edminiv2.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/kc1.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/legoev3.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/lwmon5.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/mv-common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/neo.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/openrisc-generic.h	/^# define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/sniper.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/sunxi-common.h	/^# define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti_am335x_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti_omap3_common.h	/^# define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/vct.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_NS16550_REG_SIZE	/;"	d
CONFIG_SYS_NS16550_REG_SIZE	include/ns16550.h	/^#define CONFIG_SYS_NS16550_REG_SIZE /;"	d
CONFIG_SYS_NS16550_REG_SIZE	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_REG_SIZE=-4$/;"	m
CONFIG_SYS_NS16550_SERIAL	include/autoconf.mk	/^CONFIG_SYS_NS16550_SERIAL=y$/;"	m
CONFIG_SYS_NS16550_SERIAL	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/CPCI4052.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MIP405.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/P1022DS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/P1023RDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/PIP405.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/PLU405.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/PMC405DE.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/PMC440.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/TQM834x.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/UCP1020.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/VOM405.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/am3517_crane.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/am3517_evm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/amcc-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/axs10x.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/calimain.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/cm_t35.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/cm_t3517.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/cm_t43.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/cyrus.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/da850evm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ea20.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/edminiv2.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/hrcon.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ids8313.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ipam390.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/kc1.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/legoev3.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/lwmon5.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/mcx.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/mv-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/neo.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/omap3_evm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/openrisc-generic.h	/^# define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/p1_twr.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/qemu-mips.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/sbc8349.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/sbc8548.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/sbc8641d.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/sniper.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/socfpga_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/socrates.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/strider.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/sunxi-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/t4qds.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/tam3517-common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/tao3530.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/tb100.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti_am335x_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti_omap3_common.h	/^# define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/tricorder.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/vct.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/ve8313.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/vme8349.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/xpedite1000.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/xpedite517x.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/xpedite520x.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/xpedite537x.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/xpedite550x.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	include/configs/xtfpga.h	/^#define CONFIG_SYS_NS16550_SERIAL$/;"	d
CONFIG_SYS_NS16550_SERIAL	spl/include/autoconf.mk	/^CONFIG_SYS_NS16550_SERIAL=y$/;"	m
CONFIG_SYS_NS87308_FDC	include/ns87308.h	/^#define CONFIG_SYS_NS87308_FDC	/;"	d
CONFIG_SYS_NS87308_FDC_BASE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_FDC_BASE	/;"	d
CONFIG_SYS_NS87308_GPIO	include/ns87308.h	/^#define CONFIG_SYS_NS87308_GPIO	/;"	d
CONFIG_SYS_NS87308_KBC1	include/ns87308.h	/^#define CONFIG_SYS_NS87308_KBC1	/;"	d
CONFIG_SYS_NS87308_KBC1_BASE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_KBC1_BASE	/;"	d
CONFIG_SYS_NS87308_KBC2	include/ns87308.h	/^#define CONFIG_SYS_NS87308_KBC2	/;"	d
CONFIG_SYS_NS87308_LPT_BASE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_LPT_BASE	/;"	d
CONFIG_SYS_NS87308_MOUSE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_MOUSE	/;"	d
CONFIG_SYS_NS87308_PARP	include/ns87308.h	/^#define CONFIG_SYS_NS87308_PARP	/;"	d
CONFIG_SYS_NS87308_POWRMAN	include/ns87308.h	/^#define CONFIG_SYS_NS87308_POWRMAN	/;"	d
CONFIG_SYS_NS87308_RTC_APC	include/ns87308.h	/^#define CONFIG_SYS_NS87308_RTC_APC	/;"	d
CONFIG_SYS_NS87308_RTC_BASE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_RTC_BASE	/;"	d
CONFIG_SYS_NS87308_UART1	include/ns87308.h	/^#define CONFIG_SYS_NS87308_UART1	/;"	d
CONFIG_SYS_NS87308_UART1_BASE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_UART1_BASE	/;"	d
CONFIG_SYS_NS87308_UART2	include/ns87308.h	/^#define CONFIG_SYS_NS87308_UART2	/;"	d
CONFIG_SYS_NS87308_UART2_BASE	include/ns87308.h	/^#define CONFIG_SYS_NS87308_UART2_BASE	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_NUM_ADDR_MAP /;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/P1010RDB.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/P1022DS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NUM_ADDR_MAP /;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NUM_ADDR_MAP /;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/controlcenterd.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/cyrus.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_ADDR_MAP	include/configs/t4qds.h	/^#define CONFIG_SYS_NUM_ADDR_MAP	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/B4860QDS.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/P2041RDB.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T102xQDS.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T102xRDB.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T1040QDS.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T104xRDB.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T208xQDS.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T208xRDB.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/T4240RDB.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/corenet_ds.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/cyrus.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_CPC	include/configs/t4qds.h	/^#define CONFIG_SYS_NUM_CPC	/;"	d
CONFIG_SYS_NUM_DDR_CTLRS	include/fsl_ddr.h	/^#define CONFIG_SYS_NUM_DDR_CTLRS /;"	d
CONFIG_SYS_NUM_FM1_10GEC	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_NUM_FM1_10GEC	/;"	d
CONFIG_SYS_NUM_FM1_10GEC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_NUM_FM1_10GEC	/;"	d
CONFIG_SYS_NUM_FM1_DTSEC	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_NUM_FM1_DTSEC	/;"	d
CONFIG_SYS_NUM_FM1_DTSEC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_NUM_FM1_DTSEC	/;"	d
CONFIG_SYS_NUM_FM1_DTSEC	board/freescale/t4rdb/t4rdb.h	/^#define CONFIG_SYS_NUM_FM1_DTSEC	/;"	d
CONFIG_SYS_NUM_FM2_10GEC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_NUM_FM2_10GEC	/;"	d
CONFIG_SYS_NUM_FM2_DTSEC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_NUM_FM2_DTSEC	/;"	d
CONFIG_SYS_NUM_FM2_DTSEC	board/freescale/t4rdb/t4rdb.h	/^#define CONFIG_SYS_NUM_FM2_DTSEC	/;"	d
CONFIG_SYS_NUM_FMAN	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_NUM_FMAN	/;"	d
CONFIG_SYS_NUM_FMAN	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_NUM_FMAN	/;"	d
CONFIG_SYS_NUM_I2C_BUSES	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_NUM_I2C_BUSES	/;"	d
CONFIG_SYS_NUM_I2C_BUSES	include/configs/km/km_arm.h	/^#define CONFIG_SYS_NUM_I2C_BUSES	/;"	d
CONFIG_SYS_NUM_I2C_BUSES	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_NUM_I2C_BUSES	/;"	d
CONFIG_SYS_NUM_I2C_BUSES	include/configs/km82xx.h	/^#define CONFIG_SYS_NUM_I2C_BUSES	/;"	d
CONFIG_SYS_NUM_I2C_BUSES	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_SYS_NUM_I2C_BUSES	/;"	d
CONFIG_SYS_NUM_I2C_BUSES	include/i2c.h	/^#define CONFIG_SYS_NUM_I2C_BUSES	/;"	d
CONFIG_SYS_NUM_IRQS	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_NUM_IRQS	/;"	d
CONFIG_SYS_NUM_IRQS	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_NUM_IRQS /;"	d
CONFIG_SYS_NUM_TLBCAMS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_NUM_TLBCAMS	/;"	d
CONFIG_SYS_NVRAM_BASE	include/configs/intip.h	/^#define CONFIG_SYS_NVRAM_BASE	/;"	d
CONFIG_SYS_NVRAM_BASE	include/configs/io64.h	/^#define CONFIG_SYS_NVRAM_BASE	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/VOM405.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/bamboo.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR /;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/bubinga.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/highbank.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/walnut.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR	/;"	d
CONFIG_SYS_NVRAM_BASE_ADDR	include/configs/yosemite.h	/^#define CONFIG_SYS_NVRAM_BASE_ADDR /;"	d
CONFIG_SYS_NVRAM_SIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_NVRAM_SIZE	/;"	d
CONFIG_SYS_NVRAM_SIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_NVRAM_SIZE	/;"	d
CONFIG_SYS_NVRAM_SIZE	include/configs/bamboo.h	/^#define CONFIG_SYS_NVRAM_SIZE	/;"	d
CONFIG_SYS_NVRAM_SIZE	include/configs/bubinga.h	/^#define CONFIG_SYS_NVRAM_SIZE	/;"	d
CONFIG_SYS_NVRAM_SIZE	include/configs/highbank.h	/^#define CONFIG_SYS_NVRAM_SIZE	/;"	d
CONFIG_SYS_NVRAM_SIZE	include/configs/walnut.h	/^#define CONFIG_SYS_NVRAM_SIZE	/;"	d
CONFIG_SYS_OBIR	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_OBIR	/;"	d
CONFIG_SYS_OBIR	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_OBIR	/;"	d
CONFIG_SYS_OCM_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_OCM_BASE	/;"	d
CONFIG_SYS_OCM_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_OCM_BASE	/;"	d
CONFIG_SYS_OCM_BASE	include/configs/intip.h	/^#define CONFIG_SYS_OCM_BASE	/;"	d
CONFIG_SYS_OCM_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_OCM_BASE	/;"	d
CONFIG_SYS_OCM_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_OCM_BASE	/;"	d
CONFIG_SYS_OCM_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_OCM_BASE	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/MIP405.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/PIP405.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/PMC405DE.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/VOM405.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/acadia.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/bubinga.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/dlvision.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/icon.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/io.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/io64.h	/^# define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/iocon.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/katmai.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/kilauea.h	/^# define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/makalu.h	/^# define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/neo.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/redwood.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_ADDR	include/configs/yucca.h	/^#define CONFIG_SYS_OCM_DATA_ADDR	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/acadia.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/bubinga.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/dlvision.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/io.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/iocon.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_DATA_SIZE	include/configs/neo.h	/^#define CONFIG_SYS_OCM_DATA_SIZE	/;"	d
CONFIG_SYS_OCM_SIZE	include/configs/lwmon5.h	/^#define CONFIG_SYS_OCM_SIZE	/;"	d
CONFIG_SYS_OCM_STATUS_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_OCM_STATUS_ADDR	/;"	d
CONFIG_SYS_OCM_STATUS_FAIL	include/configs/lwmon5.h	/^#define CONFIG_SYS_OCM_STATUS_FAIL	/;"	d
CONFIG_SYS_OCM_STATUS_MASK	include/configs/lwmon5.h	/^#define CONFIG_SYS_OCM_STATUS_MASK	/;"	d
CONFIG_SYS_OCM_STATUS_OK	include/configs/lwmon5.h	/^#define CONFIG_SYS_OCM_STATUS_OK	/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/PMC440.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/TQM5200.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/a4m072.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/ipek01.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/sequoia.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_BE_CONTROLLER	include/configs/yosemite.h	/^#define CONFIG_SYS_OHCI_BE_CONTROLLER$/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_OHCI_SWAP_REG_ACCESS$/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_OHCI_SWAP_REG_ACCESS$/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/PLU405.h	/^#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS /;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/canyonlands.h	/^#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/intip.h	/^#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	/;"	d
CONFIG_SYS_OHCI_SWAP_REG_ACCESS	include/configs/socrates.h	/^#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	/;"	d
CONFIG_SYS_OHCI_USE_NPS	include/configs/canyonlands.h	/^#define CONFIG_SYS_OHCI_USE_NPS	/;"	d
CONFIG_SYS_OHCI_USE_NPS	include/configs/intip.h	/^#define CONFIG_SYS_OHCI_USE_NPS	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/cm_t35.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/kc1.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/mcx.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/sniper.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/tao3530.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/ti_armv7_omap.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE	include/configs/tricorder.h	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE	/;"	d
CONFIG_SYS_OMAP24_I2C_SLAVE1	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE1 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SLAVE2	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE2 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SLAVE3	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE3 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SLAVE4	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SLAVE4 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/am3517_crane.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/am3517_evm.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/baltos.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED /;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/cm_t35.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/cm_t3517.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/kc1.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/mcx.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/omap3_evm.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/sniper.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/tam3517-common.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/tao3530.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/ti_armv7_omap.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED	include/configs/tricorder.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED	/;"	d
CONFIG_SYS_OMAP24_I2C_SPEED1	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SPEED1 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SPEED2	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SPEED2 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SPEED3	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SPEED3 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SPEED4	drivers/i2c/omap24xx_i2c.c	/^#define CONFIG_SYS_OMAP24_I2C_SPEED4 /;"	d	file:
CONFIG_SYS_OMAP24_I2C_SPEED_PSOC	include/configs/brxre1.h	/^#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC	/;"	d
CONFIG_SYS_OMAP_ABE_SYSCK	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_OMAP_ABE_SYSCK$/;"	d
CONFIG_SYS_OMAP_ABE_SYSCK	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_OMAP_ABE_SYSCK$/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/omap3_overo.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/omap3_zoom1.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/smdkc100.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/tao3530.h	/^#define CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BASE	include/configs/vct.h	/^#define	CONFIG_SYS_ONENAND_BASE	/;"	d
CONFIG_SYS_ONENAND_BLOCK_SIZE	include/configs/omap3_igep00x0.h	/^#define CONFIG_SYS_ONENAND_BLOCK_SIZE	/;"	d
CONFIG_SYS_OPENRISC_TMR_HZ	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_OPENRISC_TMR_HZ	/;"	d
CONFIG_SYS_OPER_FLASH	include/configs/redwood.h	/^#define CONFIG_SYS_OPER_FLASH	/;"	d
CONFIG_SYS_OPER_FLASH	include/configs/yucca.h	/^#define CONFIG_SYS_OPER_FLASH	/;"	d
CONFIG_SYS_OR0_64M	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR0_64M	/;"	d
CONFIG_SYS_OR0_8M	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR0_8M	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8541CDS.h	/^#define	CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8548CDS.h	/^#define	CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8555CDS.h	/^#define	CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8568MDS.h	/^#define	CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/controlcenterd.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/cyrus.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_OR0_PRELIM /;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_OR0_PRELIM	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR0_REMAP	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR0_REMAP	/;"	d
CONFIG_SYS_OR1	include/configs/km82xx.h	/^#define CONFIG_SYS_OR1	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_OR1_PRELIM /;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_OR1_PRELIM /;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8541CDS.h	/^#define	CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8548CDS.h	/^#define	CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8555CDS.h	/^#define	CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8568MDS.h	/^#define	CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8569MDS.h	/^#define	CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_OR1_PRELIM /;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/UCP1020.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/controlcenterd.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/cyrus.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/hrcon.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_OR1_PRELIM /;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/strider.h	/^#define CONFIG_SYS_OR1_PRELIM /;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_OR1_PRELIM /;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/vme8349.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_OR1_PRELIM	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR1_REMAP	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR1_REMAP	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR2_PRELIM /;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR2_PRELIM /;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/P1022DS.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_OR2_PRELIM /;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_OR2_PRELIM /;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/p1_twr.h	/^#define CONFIG_SYS_OR2_PRELIM /;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/sbc8349.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_OR2_PRELIM /;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR2_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_OR2_PRELIM	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_CAN	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR3_CAN	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_OR3_PRELIM /;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_OR3_PRELIM /;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/PATI.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM823L.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM823M.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM834x.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM850L.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM850M.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM855L.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM855M.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM860L.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM860M.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM862L.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM862M.h	/^#define	CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/ids8313.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/km8360.h	/^#define CONFIG_SYS_OR3_PRELIM /;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/kmp204x.h	/^#define CONFIG_SYS_OR3_PRELIM /;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/socrates.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/suvd3.h	/^#define CONFIG_SYS_OR3_PRELIM /;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/tuxx1.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/ve8313.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/xpedite517x.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/xpedite520x.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/xpedite537x.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR3_PRELIM	include/configs/xpedite550x.h	/^#define CONFIG_SYS_OR3_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_OR4_PRELIM /;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR4_PRELIM /;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_OR4_PRELIM /;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/km8360.h	/^#define CONFIG_SYS_OR4_PRELIM /;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR4_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR4_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR5_PRELIM /;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/km82xx.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR5_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR5_PRELIM	/;"	d
CONFIG_SYS_OR6_64M	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR6_64M	/;"	d
CONFIG_SYS_OR6_8M	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR6_8M	/;"	d
CONFIG_SYS_OR6_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR6_PRELIM	/;"	d
CONFIG_SYS_OR6_PRELIM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_OR6_PRELIM	/;"	d
CONFIG_SYS_OR6_PRELIM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_OR6_PRELIM /;"	d
CONFIG_SYS_OR6_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR6_PRELIM	/;"	d
CONFIG_SYS_OR6_PRELIM	include/configs/sbc8548.h	/^#define CONFIG_SYS_OR6_PRELIM	/;"	d
CONFIG_SYS_OR6_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR6_PRELIM	/;"	d
CONFIG_SYS_OR7_PRELIM	include/configs/M5272C3.h	/^#define CONFIG_SYS_OR7_PRELIM	/;"	d
CONFIG_SYS_OR7_PRELIM	include/configs/cobra5272.h	/^#define CONFIG_SYS_OR7_PRELIM	/;"	d
CONFIG_SYS_OR7_PRELIM	include/configs/sbc8641d.h	/^#define CONFIG_SYS_OR7_PRELIM	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM834x.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_FLASH	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR_TIMING_FLASH	/;"	d
CONFIG_SYS_OR_TIMING_MRAM	include/configs/ids8313.h	/^#define CONFIG_SYS_OR_TIMING_MRAM$/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM823L.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM823M.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM850L.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM850M.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM855L.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM855M.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM860L.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM860M.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM862L.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM862M.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM866M.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OR_TIMING_SDRAM	include/configs/TQM885D.h	/^#define CONFIG_SYS_OR_TIMING_SDRAM	/;"	d
CONFIG_SYS_OSC0_HZ	include/configs/atngw100.h	/^#define CONFIG_SYS_OSC0_HZ	/;"	d
CONFIG_SYS_OSC0_HZ	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_OSC0_HZ	/;"	d
CONFIG_SYS_OSC0_HZ	include/configs/atstk1002.h	/^#define CONFIG_SYS_OSC0_HZ	/;"	d
CONFIG_SYS_OSC0_HZ	include/configs/grasshopper.h	/^#define CONFIG_SYS_OSC0_HZ	/;"	d
CONFIG_SYS_OSCIN_FREQ	include/configs/calimain.h	/^#define CONFIG_SYS_OSCIN_FREQ	/;"	d
CONFIG_SYS_OSCIN_FREQ	include/configs/da850evm.h	/^#define CONFIG_SYS_OSCIN_FREQ	/;"	d
CONFIG_SYS_OSCIN_FREQ	include/configs/ea20.h	/^#define CONFIG_SYS_OSCIN_FREQ	/;"	d
CONFIG_SYS_OSCIN_FREQ	include/configs/ipam390.h	/^#define CONFIG_SYS_OSCIN_FREQ	/;"	d
CONFIG_SYS_OSCIN_FREQ	include/configs/legoev3.h	/^#define CONFIG_SYS_OSCIN_FREQ	/;"	d
CONFIG_SYS_OSCIN_FREQ	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_OSCIN_FREQ	/;"	d
CONFIG_SYS_OSC_CLK	include/configs/PATI.h	/^#define CONFIG_SYS_OSC_CLK	/;"	d
CONFIG_SYS_OSD_DH	include/configs/hrcon.h	/^#define CONFIG_SYS_OSD_DH$/;"	d
CONFIG_SYS_OSD_DH	include/configs/strider.h	/^#define CONFIG_SYS_OSD_DH$/;"	d
CONFIG_SYS_OSD_SCREENS	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_OSD_SCREENS	/;"	d
CONFIG_SYS_OSD_SCREENS	include/configs/hrcon.h	/^#define CONFIG_SYS_OSD_SCREENS	/;"	d
CONFIG_SYS_OSD_SCREENS	include/configs/iocon.h	/^#define CONFIG_SYS_OSD_SCREENS	/;"	d
CONFIG_SYS_OSD_SCREENS	include/configs/strider.h	/^#define CONFIG_SYS_OSD_SCREENS	/;"	d
CONFIG_SYS_OSPR_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_OSPR_OFFSET /;"	d
CONFIG_SYS_OS_BASE	common/spl/Kconfig	/^config SYS_OS_BASE$/;"	c	menu:SPL / TPL
CONFIG_SYS_OS_BASE_MODULE	common/spl/Kconfig	/^config SYS_OS_BASE$/;"	c	menu:SPL / TPL
CONFIG_SYS_P4080_ERRATUM_CPU22	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_P4080_ERRATUM_CPU22$/;"	d
CONFIG_SYS_P4080_ERRATUM_PCIE_A003	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_P4080_ERRATUM_PCIE_A003$/;"	d
CONFIG_SYS_P4080_ERRATUM_SERDES8	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_P4080_ERRATUM_SERDES8$/;"	d
CONFIG_SYS_P4080_ERRATUM_SERDES9	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_P4080_ERRATUM_SERDES9$/;"	d
CONFIG_SYS_P4080_ERRATUM_SERDES_A001	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_P4080_ERRATUM_SERDES_A001$/;"	d
CONFIG_SYS_P4080_ERRATUM_SERDES_A005	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_P4080_ERRATUM_SERDES_A005$/;"	d
CONFIG_SYS_PACNT	include/configs/M5272C3.h	/^#define CONFIG_SYS_PACNT	/;"	d
CONFIG_SYS_PACNT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PACNT	/;"	d
CONFIG_SYS_PACNT	include/configs/cobra5272.h	/^#define CONFIG_SYS_PACNT	/;"	d
CONFIG_SYS_PACNT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PACNT	/;"	d
CONFIG_SYS_PADAT	include/configs/M5272C3.h	/^#define CONFIG_SYS_PADAT	/;"	d
CONFIG_SYS_PADAT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PADAT	/;"	d
CONFIG_SYS_PADAT	include/configs/cobra5272.h	/^#define CONFIG_SYS_PADAT	/;"	d
CONFIG_SYS_PADAT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PADAT	/;"	d
CONFIG_SYS_PADDR	include/configs/M5272C3.h	/^#define CONFIG_SYS_PADDR	/;"	d
CONFIG_SYS_PADDR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PADDR	/;"	d
CONFIG_SYS_PADDR	include/configs/cobra5272.h	/^#define CONFIG_SYS_PADDR	/;"	d
CONFIG_SYS_PADDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PADDR	/;"	d
CONFIG_SYS_PAGE_SIZE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define CONFIG_SYS_PAGE_SIZE	/;"	d
CONFIG_SYS_PAMU_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PAMU_ADDR /;"	d
CONFIG_SYS_PASPAR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PASPAR	/;"	d
CONFIG_SYS_PAXE_BASE	include/configs/km8360.h	/^#define CONFIG_SYS_PAXE_BASE	/;"	d
CONFIG_SYS_PAXE_SIZE	include/configs/km8360.h	/^#define CONFIG_SYS_PAXE_SIZE	/;"	d
CONFIG_SYS_PBCNT	include/configs/M5272C3.h	/^#define CONFIG_SYS_PBCNT	/;"	d
CONFIG_SYS_PBCNT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PBCNT	/;"	d
CONFIG_SYS_PBCNT	include/configs/cobra5272.h	/^#define CONFIG_SYS_PBCNT	/;"	d
CONFIG_SYS_PBCNT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PBCNT	/;"	d
CONFIG_SYS_PBDAT	include/configs/M5272C3.h	/^#define CONFIG_SYS_PBDAT	/;"	d
CONFIG_SYS_PBDAT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PBDAT	/;"	d
CONFIG_SYS_PBDAT	include/configs/cobra5272.h	/^#define CONFIG_SYS_PBDAT	/;"	d
CONFIG_SYS_PBDAT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PBDAT	/;"	d
CONFIG_SYS_PBDDR	include/configs/M5272C3.h	/^#define CONFIG_SYS_PBDDR	/;"	d
CONFIG_SYS_PBDDR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PBDDR	/;"	d
CONFIG_SYS_PBDDR	include/configs/cobra5272.h	/^#define CONFIG_SYS_PBDDR	/;"	d
CONFIG_SYS_PBDDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PBDDR	/;"	d
CONFIG_SYS_PBI_FLASH_BASE	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SYS_PBI_FLASH_BASE	/;"	d
CONFIG_SYS_PBI_FLASH_WINDOW	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define CONFIG_SYS_PBI_FLASH_WINDOW	/;"	d
CONFIG_SYS_PBSIZE	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/autoconf.mk	/^CONFIG_SYS_PBSIZE=1024$/;"	m
CONFIG_SYS_PBSIZE	include/config_fallbacks.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/M5272C3.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/MigoR.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/PATI.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/PLU405.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM5200.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM823L.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM823M.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM850L.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM850M.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM855L.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM855M.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM860L.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM860M.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM862L.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM862M.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/VCMA9.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/VOM405.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/a3m071.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/amcc-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/amcore.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ap121.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/ap143.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/apalis_t30.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/apf27.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/aria.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/atngw100.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/atstk1002.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/axs10x.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/bcm_ep_board.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/boston.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/bur_cfg_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/calimain.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/canmb.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/cm5200.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/cobra5272.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/colibri_t20.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/colibri_t30.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/corvus.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/dbau1x00.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ea20.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/ecovec.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/edb93xx.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/edminiv2.h	/^#define	CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/espt.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ethernut5.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/exynos-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/exynos7420-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/flea3.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/grasshopper.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/grsim.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/gw_ventana.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/h2200.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/highbank.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/hikey.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/ids8313.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/inka4x0.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/integrator-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/kc1.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/km/keymile-common.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/kzm9g.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/legoev3.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/lwmon5.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/malta.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/manroland/common.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mcx.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/meesc.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/microblaze-generic.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/motionpro.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mpr2.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ms7720se.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ms7722se.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ms7750se.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/munices.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mv-common.h	/^#define	CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/mvebu_db-88f3720.h	/^#define	CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/mvebu_db-88f7040.h	/^#define	CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/mx31ads.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/mx53ard.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mx53evk.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/mx53smd.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/nsim.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ot1200.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/pb1x00.h	/^#define	CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/pcm030.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/pcm052.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/picosam9g45.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/platinum.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/pm9261.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/pm9263.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/pm9g45.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/r0p7734.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/r2dplus.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/r7780mp.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/rpi.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/rsk7203.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/rsk7264.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/rsk7269.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sandbox.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/shmin.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/smdk2410.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/smdkc100.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/snapper9260.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sniper.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/socrates.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/spear-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/strider.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/stv0991.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/taurus.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/tb100.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/tegra-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/titanium.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ts4800.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/udoo.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/uniphier.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/usbarmory.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/v38b.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/vct.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/vf610twr.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/work_92105.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/x600.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/x86-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PBSIZE /;"	d
CONFIG_SYS_PBSIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/zmx25.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	include/configs/zynq-common.h	/^#define CONFIG_SYS_PBSIZE	/;"	d
CONFIG_SYS_PBSIZE	spl/include/autoconf.mk	/^CONFIG_SYS_PBSIZE=1024$/;"	m
CONFIG_SYS_PB_LED	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PB_LED	/;"	d
CONFIG_SYS_PCA953X_BRD_CFG0	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_BRD_CFG0	/;"	d
CONFIG_SYS_PCA953X_BRD_CFG1	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_BRD_CFG1	/;"	d
CONFIG_SYS_PCA953X_BRD_CFG2	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_BRD_CFG2	/;"	d
CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS	/;"	d
CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS	/;"	d
CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS	/;"	d
CONFIG_SYS_PCA953X_C0_SER0_EN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_C0_SER0_EN	/;"	d
CONFIG_SYS_PCA953X_C0_SER0_EN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_SER0_EN	/;"	d
CONFIG_SYS_PCA953X_C0_SER0_EN	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_C0_SER0_EN	/;"	d
CONFIG_SYS_PCA953X_C0_SER0_MODE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_C0_SER0_MODE	/;"	d
CONFIG_SYS_PCA953X_C0_SER0_MODE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_SER0_MODE	/;"	d
CONFIG_SYS_PCA953X_C0_SER0_MODE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_C0_SER0_MODE	/;"	d
CONFIG_SYS_PCA953X_C0_SER1_EN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_C0_SER1_EN	/;"	d
CONFIG_SYS_PCA953X_C0_SER1_EN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_SER1_EN	/;"	d
CONFIG_SYS_PCA953X_C0_SER1_EN	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_C0_SER1_EN	/;"	d
CONFIG_SYS_PCA953X_C0_SER1_MODE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_C0_SER1_MODE	/;"	d
CONFIG_SYS_PCA953X_C0_SER1_MODE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_SER1_MODE	/;"	d
CONFIG_SYS_PCA953X_C0_SER1_MODE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_C0_SER1_MODE	/;"	d
CONFIG_SYS_PCA953X_C0_VCORE_VID2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_VCORE_VID2	/;"	d
CONFIG_SYS_PCA953X_C0_VCORE_VID3	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_C0_VCORE_VID3	/;"	d
CONFIG_SYS_PCA953X_EREADY	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_EREADY	/;"	d
CONFIG_SYS_PCA953X_FLASH_PASS_CS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_FLASH_PASS_CS	/;"	d
CONFIG_SYS_PCA953X_GPIO_VPX0	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_GPIO_VPX0	/;"	d
CONFIG_SYS_PCA953X_GPIO_VPX1	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_GPIO_VPX1	/;"	d
CONFIG_SYS_PCA953X_GPIO_VPX2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_GPIO_VPX2	/;"	d
CONFIG_SYS_PCA953X_GPIO_VPX3	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_GPIO_VPX3	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO0	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO0	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO1	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO1	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO2	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO2	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO3	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO3	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO4	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO4	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO5	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO5	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO6	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO6	/;"	d
CONFIG_SYS_PCA953X_MC_GPIO7	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_MC_GPIO7	/;"	d
CONFIG_SYS_PCA953X_MONARCH	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_MONARCH	/;"	d
CONFIG_SYS_PCA953X_NVM_WP	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_NVM_WP	/;"	d
CONFIG_SYS_PCA953X_NVM_WP	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_NVM_WP	/;"	d
CONFIG_SYS_PCA953X_NVM_WP	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_NVM_WP	/;"	d
CONFIG_SYS_PCA953X_NVM_WP	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_NVM_WP	/;"	d
CONFIG_SYS_PCA953X_P0_GA0	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P0_GA0	/;"	d
CONFIG_SYS_PCA953X_P0_GA0	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P0_GA0	/;"	d
CONFIG_SYS_PCA953X_P0_GA1	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P0_GA1	/;"	d
CONFIG_SYS_PCA953X_P0_GA1	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P0_GA1	/;"	d
CONFIG_SYS_PCA953X_P0_GA2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P0_GA2	/;"	d
CONFIG_SYS_PCA953X_P0_GA2	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P0_GA2	/;"	d
CONFIG_SYS_PCA953X_P0_GA3	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P0_GA3	/;"	d
CONFIG_SYS_PCA953X_P0_GA3	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P0_GA3	/;"	d
CONFIG_SYS_PCA953X_P0_GA4	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P0_GA4	/;"	d
CONFIG_SYS_PCA953X_P0_GA4	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P0_GA4	/;"	d
CONFIG_SYS_PCA953X_P0_GAP	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P0_GAP	/;"	d
CONFIG_SYS_PCA953X_P0_GAP	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P0_GAP	/;"	d
CONFIG_SYS_PCA953X_P14_IO0	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO0	/;"	d
CONFIG_SYS_PCA953X_P14_IO1	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO1	/;"	d
CONFIG_SYS_PCA953X_P14_IO2	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO2	/;"	d
CONFIG_SYS_PCA953X_P14_IO3	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO3	/;"	d
CONFIG_SYS_PCA953X_P14_IO4	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO4	/;"	d
CONFIG_SYS_PCA953X_P14_IO5	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO5	/;"	d
CONFIG_SYS_PCA953X_P14_IO6	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO6	/;"	d
CONFIG_SYS_PCA953X_P14_IO7	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_P14_IO7	/;"	d
CONFIG_SYS_PCA953X_P1_SYSEN	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_P1_SYSEN	/;"	d
CONFIG_SYS_PCA953X_P1_SYSEN	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_P1_SYSEN	/;"	d
CONFIG_SYS_PCA953X_PLUG_GPIO0	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_PLUG_GPIO0	/;"	d
CONFIG_SYS_PCA953X_PMC0_EREADY	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_PMC0_EREADY	/;"	d
CONFIG_SYS_PCA953X_PMC0_EREADY	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_PMC0_EREADY	/;"	d
CONFIG_SYS_PCA953X_PMC0_MONARCH	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_PMC0_MONARCH	/;"	d
CONFIG_SYS_PCA953X_PMC0_MONARCH	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_PMC0_MONARCH	/;"	d
CONFIG_SYS_PCA953X_PMC_EREADY	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_PMC_EREADY	/;"	d
CONFIG_SYS_PCA953X_PMC_MONARCH	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_PMC_MONARCH	/;"	d
CONFIG_SYS_PCA953X_PMC_PRESENT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_PMC_PRESENT	/;"	d
CONFIG_SYS_PCA953X_PMC_PRESENT	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_PMC_PRESENT	/;"	d
CONFIG_SYS_PCA953X_VPX_FRU_WRCTL	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL	/;"	d
CONFIG_SYS_PCA953X_VPX_GPIO0	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_VPX_GPIO0	/;"	d
CONFIG_SYS_PCA953X_VPX_GPIO1	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_VPX_GPIO1	/;"	d
CONFIG_SYS_PCA953X_VPX_GPIO2	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_VPX_GPIO2	/;"	d
CONFIG_SYS_PCA953X_VPX_GPIO3	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_VPX_GPIO3	/;"	d
CONFIG_SYS_PCA953X_XMC0_BIST	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_XMC0_BIST	/;"	d
CONFIG_SYS_PCA953X_XMC0_BIST	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_XMC0_BIST	/;"	d
CONFIG_SYS_PCA953X_XMC0_MVMR0	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_XMC0_MVMR0	/;"	d
CONFIG_SYS_PCA953X_XMC0_ROOT0	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_XMC0_ROOT0	/;"	d
CONFIG_SYS_PCA953X_XMC0_ROOT0	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_XMC0_ROOT0	/;"	d
CONFIG_SYS_PCA953X_XMC0_WAKE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_XMC0_WAKE	/;"	d
CONFIG_SYS_PCA953X_XMC0_WAKE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_XMC0_WAKE	/;"	d
CONFIG_SYS_PCA953X_XMC_BIST	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_XMC_BIST	/;"	d
CONFIG_SYS_PCA953X_XMC_GA0	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_XMC_GA0	/;"	d
CONFIG_SYS_PCA953X_XMC_GA1	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_XMC_GA1	/;"	d
CONFIG_SYS_PCA953X_XMC_GA2	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_XMC_GA2	/;"	d
CONFIG_SYS_PCA953X_XMC_PRESENT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCA953X_XMC_PRESENT	/;"	d
CONFIG_SYS_PCA953X_XMC_PRESENT	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCA953X_XMC_PRESENT	/;"	d
CONFIG_SYS_PCA953X_XMC_ROOT0	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCA953X_XMC_ROOT0	/;"	d
CONFIG_SYS_PCA953X_XMC_WAKE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCA953X_XMC_WAKE	/;"	d
CONFIG_SYS_PCCNT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PCCNT	/;"	d
CONFIG_SYS_PCCNT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PCCNT	/;"	d
CONFIG_SYS_PCDAT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PCDAT	/;"	d
CONFIG_SYS_PCDAT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PCDAT	/;"	d
CONFIG_SYS_PCDDR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PCDDR	/;"	d
CONFIG_SYS_PCDDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PCDDR	/;"	d
CONFIG_SYS_PCI1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PCI1_ADDR /;"	d
CONFIG_SYS_PCI1_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_PCI1_ADDR /;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_IO_BASE	/;"	d
CONFIG_SYS_PCI1_IO_BUS	arch/powerpc/cpu/mpc85xx/pci.c	/^#define CONFIG_SYS_PCI1_IO_BUS /;"	d	file:
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_BUS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI1_IO_BUS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS /;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/socrates.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_PHYS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI1_IO_PHYS	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_SIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI1_IO_SIZE	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_IO_VIRT	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_IO_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_MEM_BASE	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	arch/powerpc/cpu/mpc85xx/pci.c	/^#define CONFIG_SYS_PCI1_MEM_BUS /;"	d	file:
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_BUS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI1_MEM_BUS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/socrates.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_PHYS	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI1_MEM_PHYS	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_SIZE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI1_MEM_SIZE	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MEM_VIRT	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI1_MEM_VIRT	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_MMIO_BASE	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_PHYS	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI1_MMIO_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI1_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PCI2_ADDR /;"	d
CONFIG_SYS_PCI2_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_PCI2_ADDR /;"	d
CONFIG_SYS_PCI2_IO_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_IO_BASE	/;"	d
CONFIG_SYS_PCI2_IO_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_IO_BASE	/;"	d
CONFIG_SYS_PCI2_IO_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_IO_BASE	/;"	d
CONFIG_SYS_PCI2_IO_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_IO_BASE	/;"	d
CONFIG_SYS_PCI2_IO_BUS	arch/powerpc/cpu/mpc85xx/pci.c	/^#define CONFIG_SYS_PCI2_IO_BUS /;"	d	file:
CONFIG_SYS_PCI2_IO_BUS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_IO_BUS	/;"	d
CONFIG_SYS_PCI2_IO_BUS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_IO_BUS	/;"	d
CONFIG_SYS_PCI2_IO_PHYS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_IO_PHYS	/;"	d
CONFIG_SYS_PCI2_IO_PHYS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_IO_PHYS	/;"	d
CONFIG_SYS_PCI2_IO_PHYS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_IO_PHYS	/;"	d
CONFIG_SYS_PCI2_IO_PHYS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_IO_PHYS	/;"	d
CONFIG_SYS_PCI2_IO_PHYS	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_IO_PHYS	/;"	d
CONFIG_SYS_PCI2_IO_PHYS	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_IO_PHYS	/;"	d
CONFIG_SYS_PCI2_IO_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_IO_SIZE	/;"	d
CONFIG_SYS_PCI2_IO_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_IO_SIZE	/;"	d
CONFIG_SYS_PCI2_IO_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_IO_SIZE	/;"	d
CONFIG_SYS_PCI2_IO_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_IO_SIZE	/;"	d
CONFIG_SYS_PCI2_IO_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_IO_SIZE	/;"	d
CONFIG_SYS_PCI2_IO_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_IO_SIZE	/;"	d
CONFIG_SYS_PCI2_IO_VIRT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_IO_VIRT	/;"	d
CONFIG_SYS_PCI2_IO_VIRT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_IO_VIRT	/;"	d
CONFIG_SYS_PCI2_MEM_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_MEM_BASE	/;"	d
CONFIG_SYS_PCI2_MEM_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_MEM_BASE	/;"	d
CONFIG_SYS_PCI2_MEM_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_MEM_BASE	/;"	d
CONFIG_SYS_PCI2_MEM_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_MEM_BASE	/;"	d
CONFIG_SYS_PCI2_MEM_BUS	arch/powerpc/cpu/mpc85xx/pci.c	/^#define CONFIG_SYS_PCI2_MEM_BUS /;"	d	file:
CONFIG_SYS_PCI2_MEM_BUS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_MEM_BUS	/;"	d
CONFIG_SYS_PCI2_MEM_BUS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_MEM_BUS	/;"	d
CONFIG_SYS_PCI2_MEM_PHYS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_MEM_PHYS	/;"	d
CONFIG_SYS_PCI2_MEM_PHYS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_MEM_PHYS	/;"	d
CONFIG_SYS_PCI2_MEM_PHYS	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_MEM_PHYS	/;"	d
CONFIG_SYS_PCI2_MEM_PHYS	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_MEM_PHYS	/;"	d
CONFIG_SYS_PCI2_MEM_PHYS	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_MEM_PHYS	/;"	d
CONFIG_SYS_PCI2_MEM_PHYS	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_MEM_PHYS	/;"	d
CONFIG_SYS_PCI2_MEM_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_MEM_SIZE	/;"	d
CONFIG_SYS_PCI2_MEM_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_MEM_SIZE	/;"	d
CONFIG_SYS_PCI2_MEM_SIZE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_MEM_SIZE	/;"	d
CONFIG_SYS_PCI2_MEM_SIZE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_MEM_SIZE	/;"	d
CONFIG_SYS_PCI2_MEM_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_MEM_SIZE	/;"	d
CONFIG_SYS_PCI2_MEM_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_MEM_SIZE	/;"	d
CONFIG_SYS_PCI2_MEM_VIRT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI2_MEM_VIRT	/;"	d
CONFIG_SYS_PCI2_MEM_VIRT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI2_MEM_VIRT	/;"	d
CONFIG_SYS_PCI2_MMIO_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_MMIO_BASE	/;"	d
CONFIG_SYS_PCI2_MMIO_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_MMIO_BASE	/;"	d
CONFIG_SYS_PCI2_MMIO_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_MMIO_BASE	/;"	d
CONFIG_SYS_PCI2_MMIO_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_MMIO_BASE	/;"	d
CONFIG_SYS_PCI2_MMIO_PHYS	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI2_MMIO_PHYS	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI2_MMIO_PHYS	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI2_MMIO_PHYS	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI2_MMIO_SIZE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI2_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI2_MMIO_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_PCI2_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI2_MMIO_SIZE	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI2_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI2_MMIO_SIZE	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI2_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI64_MEMORY_BUS	drivers/pci/fsl_pci_init.c	/^#define CONFIG_SYS_PCI64_MEMORY_BUS /;"	d	file:
CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	include/configs/TQM5200.h	/^#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	/;"	d
CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	include/configs/a3m071.h	/^#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2$/;"	d
CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE0_CFGBASE	/;"	d
CONFIG_SYS_PCIE0_CFGMASK	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE0_CFGMASK	/;"	d
CONFIG_SYS_PCIE0_CFGMASK	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE0_CFGMASK	/;"	d
CONFIG_SYS_PCIE0_MEMBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE0_MEMBASE	/;"	d
CONFIG_SYS_PCIE0_REGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE0_REGBASE /;"	d
CONFIG_SYS_PCIE0_UTLBASE	include/configs/canyonlands.h	/^#define	CONFIG_SYS_PCIE0_UTLBASE	/;"	d
CONFIG_SYS_PCIE0_UTLBASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE0_UTLBASE	/;"	d
CONFIG_SYS_PCIE0_UTLBASE	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE0_UTLBASE	/;"	d
CONFIG_SYS_PCIE0_UTLBASE	include/configs/t3corp.h	/^#define	CONFIG_SYS_PCIE0_UTLBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE0_XCFGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE0_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_PCIE1_ADDR	/;"	d
CONFIG_SYS_PCIE1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE1_ADDR	/;"	d
CONFIG_SYS_PCIE1_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE1_ADDR	/;"	d
CONFIG_SYS_PCIE1_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PCIE1_ADDR /;"	d
CONFIG_SYS_PCIE1_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_PCIE1_ADDR /;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_BASE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_BASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE1_CFGBASE	/;"	d
CONFIG_SYS_PCIE1_CFGMASK	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE1_CFGMASK	/;"	d
CONFIG_SYS_PCIE1_CFGMASK	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE1_CFGMASK	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_BASE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_CFG_BASE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_CFG_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BASE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_IO_BASE	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_BUS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCIE1_IO_BUS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS /;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS /;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS	/;"	d
CONFIG_SYS_PCIE1_IO_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_IO_PHYS_LOW	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_SIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCIE1_IO_SIZE	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_IO_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_IO_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEMBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE1_MEMBASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BASE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_MEM_BASE	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T102xQDS.h	/^#define	CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T102xRDB.h	/^#define	CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T1040QDS.h	/^#define	CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T104xRDB.h	/^#define	CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_BUS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCIE1_MEM_BUS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS /;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T102xQDS.h	/^#define	CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T102xRDB.h	/^#define	CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T1040QDS.h	/^#define	CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T104xRDB.h	/^#define	CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS_HIGH	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS_HIGH	/;"	d
CONFIG_SYS_PCIE1_MEM_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_MEM_PHYS_LOW	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/hrcon.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/strider.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_SIZE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCIE1_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T102xQDS.h	/^#define	CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T102xRDB.h	/^#define	CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T1040QDS.h	/^#define	CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T104xRDB.h	/^#define	CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_MEM_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE1_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_NAME	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE1_NAME	/;"	d
CONFIG_SYS_PCIE1_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_PCIE1_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE1_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE1_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE1_PHYS_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE1_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE1_PHYS_BASE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE1_PHYS_BASE	/;"	d
CONFIG_SYS_PCIE1_PHYS_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_PCIE1_PHYS_SIZE	/;"	d
CONFIG_SYS_PCIE1_REGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE1_REGBASE /;"	d
CONFIG_SYS_PCIE1_UTLBASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE1_UTLBASE	/;"	d
CONFIG_SYS_PCIE1_UTLBASE	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE1_UTLBASE	/;"	d
CONFIG_SYS_PCIE1_VIRT_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE1_VIRT_ADDR	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/makalu.h	/^#define	CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE1_XCFGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE1_XCFGBASE	/;"	d
CONFIG_SYS_PCIE2_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_PCIE2_ADDR	/;"	d
CONFIG_SYS_PCIE2_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE2_ADDR	/;"	d
CONFIG_SYS_PCIE2_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE2_ADDR	/;"	d
CONFIG_SYS_PCIE2_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PCIE2_ADDR /;"	d
CONFIG_SYS_PCIE2_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_PCIE2_ADDR /;"	d
CONFIG_SYS_PCIE2_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_BASE	/;"	d
CONFIG_SYS_PCIE2_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_BASE	/;"	d
CONFIG_SYS_PCIE2_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_BASE	/;"	d
CONFIG_SYS_PCIE2_CFGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE2_CFGBASE	/;"	d
CONFIG_SYS_PCIE2_CFGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE2_CFGBASE	/;"	d
CONFIG_SYS_PCIE2_CFGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE2_CFGBASE	/;"	d
CONFIG_SYS_PCIE2_CFGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE2_CFGBASE	/;"	d
CONFIG_SYS_PCIE2_CFG_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_CFG_BASE	/;"	d
CONFIG_SYS_PCIE2_CFG_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_CFG_BASE	/;"	d
CONFIG_SYS_PCIE2_CFG_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_CFG_BASE	/;"	d
CONFIG_SYS_PCIE2_CFG_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE2_CFG_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE2_CFG_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_CFG_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_IO_BASE	/;"	d
CONFIG_SYS_PCIE2_IO_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_IO_BASE	/;"	d
CONFIG_SYS_PCIE2_IO_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_IO_BASE	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_BUS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE2_IO_BUS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS	/;"	d
CONFIG_SYS_PCIE2_IO_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_IO_PHYS_LOW	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE2_IO_SIZE	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT /;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_IO_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_IO_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BASE	/;"	d
CONFIG_SYS_PCIE2_MEM_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_MEM_BASE	/;"	d
CONFIG_SYS_PCIE2_MEM_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BASE	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_BUS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE2_MEM_BUS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS_HIGH	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS_HIGH	/;"	d
CONFIG_SYS_PCIE2_MEM_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_MEM_PHYS_LOW	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_SIZE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCIE2_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT /;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/sbc8641d.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_MEM_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE2_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_NAME	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCIE2_NAME	/;"	d
CONFIG_SYS_PCIE2_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_PCIE2_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE2_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE2_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE2_PHYS_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE2_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE2_PHYS_BASE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE2_PHYS_BASE	/;"	d
CONFIG_SYS_PCIE2_PHYS_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_PCIE2_PHYS_SIZE	/;"	d
CONFIG_SYS_PCIE2_REGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE2_REGBASE /;"	d
CONFIG_SYS_PCIE2_VIRT_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE2_VIRT_ADDR	/;"	d
CONFIG_SYS_PCIE2_XCFGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE2_XCFGBASE	/;"	d
CONFIG_SYS_PCIE2_XCFGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE2_XCFGBASE	/;"	d
CONFIG_SYS_PCIE2_XCFGBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE2_XCFGBASE	/;"	d
CONFIG_SYS_PCIE2_XCFGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE2_XCFGBASE	/;"	d
CONFIG_SYS_PCIE3_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_PCIE3_ADDR	/;"	d
CONFIG_SYS_PCIE3_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE3_ADDR	/;"	d
CONFIG_SYS_PCIE3_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PCIE3_ADDR /;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_IO_BUS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_IO_PHYS	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_IO_SIZE	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_IO_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_IO_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS	/;"	d
CONFIG_SYS_PCIE3_MEM_BUS2	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_BUS2	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE3_MEM_PHYS2	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_PHYS2	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE3_MEM_SIZE2	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_SIZE2	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE3_MEM_VIRT2	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_MEM_VIRT2	/;"	d
CONFIG_SYS_PCIE3_NAME	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCIE3_NAME	/;"	d
CONFIG_SYS_PCIE3_NAME	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE3_NAME	/;"	d
CONFIG_SYS_PCIE3_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCIE3_NAME	/;"	d
CONFIG_SYS_PCIE3_NAME	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCIE3_NAME	/;"	d
CONFIG_SYS_PCIE3_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_PCIE3_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE3_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE3_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE3_PHYS_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_PCIE3_PHYS_SIZE	/;"	d
CONFIG_SYS_PCIE4_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE4_ADDR	/;"	d
CONFIG_SYS_PCIE4_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_PCIE4_ADDR /;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE4_IO_BUS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE4_IO_PHYS	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE4_IO_SIZE	/;"	d
CONFIG_SYS_PCIE4_IO_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_VIRT	/;"	d
CONFIG_SYS_PCIE4_IO_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_IO_VIRT	/;"	d
CONFIG_SYS_PCIE4_IO_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_IO_VIRT	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_BUS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE4_MEM_BUS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS /;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE4_MEM_PHYS	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE /;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_PCIE4_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE4_MEM_VIRT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_VIRT /;"	d
CONFIG_SYS_PCIE4_MEM_VIRT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCIE4_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE4_MEM_VIRT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_VIRT	/;"	d
CONFIG_SYS_PCIE4_MEM_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCIE4_MEM_VIRT /;"	d
CONFIG_SYS_PCIE4_MEM_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCIE4_MEM_VIRT /;"	d
CONFIG_SYS_PCIE4_PHYS_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_PCIE4_PHYS_ADDR	/;"	d
CONFIG_SYS_PCIE4_PHYS_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define CONFIG_SYS_PCIE4_PHYS_SIZE	/;"	d
CONFIG_SYS_PCIE_ADDR_HIGH	arch/powerpc/include/asm/4xx_pcie.h	/^#define CONFIG_SYS_PCIE_ADDR_HIGH	/;"	d
CONFIG_SYS_PCIE_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE_BASE	/;"	d
CONFIG_SYS_PCIE_BASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE_BASE	/;"	d
CONFIG_SYS_PCIE_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE_BASE	/;"	d
CONFIG_SYS_PCIE_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE_BASE	/;"	d
CONFIG_SYS_PCIE_BASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE_BASE	/;"	d
CONFIG_SYS_PCIE_CFG0_PHYS_OFF	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG0_PHYS_OFF	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG0_PHYS_OFF	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG0_PHYS_OFF	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG0_PHYS_OFF	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG0_PHYS_OFF	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG0_SIZE	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_CFG0_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG0_SIZE	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_CFG0_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG0_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_CFG0_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG0_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_CFG0_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG0_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_CFG0_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG0_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_CFG0_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG1_PHYS_OFF	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG1_PHYS_OFF	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG1_PHYS_OFF	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG1_PHYS_OFF	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG1_PHYS_OFF	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG1_PHYS_OFF	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_CFG1_SIZE	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_CFG1_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG1_SIZE	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_CFG1_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG1_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_CFG1_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG1_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_CFG1_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG1_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_CFG1_SIZE	/;"	d
CONFIG_SYS_PCIE_CFG1_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_CFG1_SIZE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/makalu.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_INBOUND_BASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE_INBOUND_BASE	/;"	d
CONFIG_SYS_PCIE_IO_BUS	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_IO_BUS	/;"	d
CONFIG_SYS_PCIE_IO_BUS	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_IO_BUS	/;"	d
CONFIG_SYS_PCIE_IO_BUS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_IO_BUS	/;"	d
CONFIG_SYS_PCIE_IO_BUS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_IO_BUS	/;"	d
CONFIG_SYS_PCIE_IO_BUS	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_IO_BUS	/;"	d
CONFIG_SYS_PCIE_IO_BUS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_IO_BUS	/;"	d
CONFIG_SYS_PCIE_IO_PHYS_OFF	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_IO_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_IO_PHYS_OFF	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_IO_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_IO_PHYS_OFF	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_IO_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_IO_PHYS_OFF	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_IO_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_IO_PHYS_OFF	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_IO_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_IO_PHYS_OFF	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_IO_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_IO_SIZE	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_IO_SIZE	/;"	d
CONFIG_SYS_PCIE_IO_SIZE	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_IO_SIZE	/;"	d
CONFIG_SYS_PCIE_IO_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_IO_SIZE	/;"	d
CONFIG_SYS_PCIE_IO_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_IO_SIZE	/;"	d
CONFIG_SYS_PCIE_IO_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_IO_SIZE	/;"	d
CONFIG_SYS_PCIE_IO_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_IO_SIZE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/kilauea.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/makalu.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE_MEMBASE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/icon.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/katmai.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/kilauea.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/makalu.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/redwood.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEMSIZE	include/configs/yucca.h	/^#define CONFIG_SYS_PCIE_MEMSIZE	/;"	d
CONFIG_SYS_PCIE_MEM_BUS	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_MEM_BUS /;"	d
CONFIG_SYS_PCIE_MEM_BUS	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_MEM_BUS /;"	d
CONFIG_SYS_PCIE_MEM_BUS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_MEM_BUS	/;"	d
CONFIG_SYS_PCIE_MEM_BUS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_MEM_BUS	/;"	d
CONFIG_SYS_PCIE_MEM_BUS	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_MEM_BUS	/;"	d
CONFIG_SYS_PCIE_MEM_BUS	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_MEM_BUS	/;"	d
CONFIG_SYS_PCIE_MEM_PHYS_OFF	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_MEM_PHYS_OFF /;"	d
CONFIG_SYS_PCIE_MEM_PHYS_OFF	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_MEM_PHYS_OFF /;"	d
CONFIG_SYS_PCIE_MEM_PHYS_OFF	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_MEM_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_MEM_PHYS_OFF	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_MEM_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_MEM_PHYS_OFF	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_MEM_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_MEM_PHYS_OFF	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_MEM_PHYS_OFF	/;"	d
CONFIG_SYS_PCIE_MEM_SIZE	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCIE_MEM_SIZE /;"	d
CONFIG_SYS_PCIE_MEM_SIZE	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCIE_MEM_SIZE /;"	d
CONFIG_SYS_PCIE_MEM_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCIE_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE_MEM_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCIE_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE_MEM_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCIE_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE_MEM_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCIE_MEM_SIZE	/;"	d
CONFIG_SYS_PCIE_MMAP_SIZE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_PCIE_MMAP_SIZE	/;"	d
CONFIG_SYS_PCIE_NR_PORTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define CONFIG_SYS_PCIE_NR_PORTS	/;"	d
CONFIG_SYS_PCIE_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE_PHYS	/;"	d
CONFIG_SYS_PCIE_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCIE_VIRT	/;"	d
CONFIG_SYS_PCISPEED_66	include/configs/munices.h	/^#define CONFIG_SYS_PCISPEED_66	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/P1022DS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/P1023RDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/UCP1020.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/controlcenterd.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/cyrus.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_PCI_64BIT$/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_PCI_64BIT$/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_PCI_64BIT$/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_PCI_64BIT$/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_PCI_64BIT$/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_PCI_64BIT$/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/p1_twr.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI_64BIT /;"	d
CONFIG_SYS_PCI_64BIT	include/configs/t4qds.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/xpedite517x.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/xpedite520x.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/xpedite537x.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_64BIT	include/configs/xpedite550x.h	/^#define CONFIG_SYS_PCI_64BIT	/;"	d
CONFIG_SYS_PCI_BAR0	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PCI_BAR0	/;"	d
CONFIG_SYS_PCI_BAR1	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PCI_BAR1	/;"	d
CONFIG_SYS_PCI_BAR5	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PCI_BAR5	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/icon.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/intip.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/luan.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/redwood.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCI_BASE	/;"	d
CONFIG_SYS_PCI_BOARD_FIXUP_IRQ	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_BOARD_FIXUP_IRQ$/;"	d
CONFIG_SYS_PCI_BOARD_FIXUP_IRQ	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_BOARD_FIXUP_IRQ$/;"	d
CONFIG_SYS_PCI_CACHE_LINE_SIZE	drivers/pci/pci_auto.c	/^#define CONFIG_SYS_PCI_CACHE_LINE_SIZE	/;"	d	file:
CONFIG_SYS_PCI_CACHE_LINE_SIZE	drivers/pci/pci_auto_old.c	/^#define CONFIG_SYS_PCI_CACHE_LINE_SIZE	/;"	d	file:
CONFIG_SYS_PCI_CACHE_LINE_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_CACHE_LINE_SIZE	/;"	d
CONFIG_SYS_PCI_CACHE_LINE_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_CACHE_LINE_SIZE	/;"	d
CONFIG_SYS_PCI_CACHE_LINE_SIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_CACHE_LINE_SIZE	/;"	d
CONFIG_SYS_PCI_CACHE_LINE_SIZE	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_CACHE_LINE_SIZE	/;"	d
CONFIG_SYS_PCI_CFG_BUS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_CFG_BUS	/;"	d
CONFIG_SYS_PCI_CFG_BUS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_CFG_BUS	/;"	d
CONFIG_SYS_PCI_CFG_BUS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_CFG_BUS	/;"	d
CONFIG_SYS_PCI_CFG_PHYS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_CFG_PHYS	/;"	d
CONFIG_SYS_PCI_CFG_PHYS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_CFG_PHYS	/;"	d
CONFIG_SYS_PCI_CFG_PHYS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_CFG_PHYS	/;"	d
CONFIG_SYS_PCI_CFG_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_CFG_SIZE	/;"	d
CONFIG_SYS_PCI_CFG_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_CFG_SIZE	/;"	d
CONFIG_SYS_PCI_CFG_SIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_CFG_SIZE	/;"	d
CONFIG_SYS_PCI_CLASSCODE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_CLASSCODE /;"	d
CONFIG_SYS_PCI_CLASSCODE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_CLASSCODE /;"	d
CONFIG_SYS_PCI_CLASSCODE	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_CLASSCODE /;"	d
CONFIG_SYS_PCI_CLASSCODE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_CLASSCODE /;"	d
CONFIG_SYS_PCI_CLASSCODE	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_CLASSCODE /;"	d
CONFIG_SYS_PCI_CLASSCODE_MONARCH	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_CLASSCODE_MONARCH	/;"	d
CONFIG_SYS_PCI_CLASSCODE_MONARCH	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_CLASSCODE_MONARCH	/;"	d
CONFIG_SYS_PCI_CLASSCODE_NONMONARCH	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_CLASSCODE_NONMONARCH	/;"	d
CONFIG_SYS_PCI_CLASSCODE_NONMONARCH	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_CLASSCODE_NONMONARCH	/;"	d
CONFIG_SYS_PCI_EP_MEMORY_BASE	drivers/pci/pcie_layerscape.c	/^#define CONFIG_SYS_PCI_EP_MEMORY_BASE /;"	d	file:
CONFIG_SYS_PCI_FORCE_PCI_CONV	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_FORCE_PCI_CONV	/;"	d
CONFIG_SYS_PCI_IO_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_IO_BASE	/;"	d
CONFIG_SYS_PCI_IO_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_IO_BASE	/;"	d
CONFIG_SYS_PCI_IO_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_IO_BASE	/;"	d
CONFIG_SYS_PCI_IO_BASE	include/configs/aria.h	/^#define CONFIG_SYS_PCI_IO_BASE	/;"	d
CONFIG_SYS_PCI_IO_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_IO_BASE	/;"	d
CONFIG_SYS_PCI_IO_BUS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_IO_BUS	/;"	d
CONFIG_SYS_PCI_IO_BUS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_IO_BUS	/;"	d
CONFIG_SYS_PCI_IO_BUS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_IO_BUS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/aria.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_PHYS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_IO_PHYS	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_IO_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_IO_SIZE	/;"	d
CONFIG_SYS_PCI_MAP_END	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_PCI_MAP_END	/;"	d
CONFIG_SYS_PCI_MAP_START	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_PCI_MAP_START	/;"	d
CONFIG_SYS_PCI_MASTER_INIT	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_MASTER_INIT$/;"	d
CONFIG_SYS_PCI_MASTER_INIT	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_MASTER_INIT$/;"	d
CONFIG_SYS_PCI_MASTER_INIT	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_MASTER_INIT$/;"	d
CONFIG_SYS_PCI_MASTER_INIT	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_MASTER_INIT$/;"	d
CONFIG_SYS_PCI_MASTER_INIT	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_MASTER_INIT$/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/intip.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/luan.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCI_MEMBASE	/;"	d
CONFIG_SYS_PCI_MEMBASE1	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_MEMBASE1	/;"	d
CONFIG_SYS_PCI_MEMBASE1	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_MEMBASE1 /;"	d
CONFIG_SYS_PCI_MEMBASE1	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_MEMBASE1	/;"	d
CONFIG_SYS_PCI_MEMBASE1	include/configs/lwmon5.h	/^#define CONFIG_SYS_PCI_MEMBASE1	/;"	d
CONFIG_SYS_PCI_MEMBASE1	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_MEMBASE1	/;"	d
CONFIG_SYS_PCI_MEMBASE1	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_MEMBASE1 /;"	d
CONFIG_SYS_PCI_MEMBASE2	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_MEMBASE2	/;"	d
CONFIG_SYS_PCI_MEMBASE2	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_MEMBASE2 /;"	d
CONFIG_SYS_PCI_MEMBASE2	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_MEMBASE2	/;"	d
CONFIG_SYS_PCI_MEMBASE2	include/configs/lwmon5.h	/^#define CONFIG_SYS_PCI_MEMBASE2	/;"	d
CONFIG_SYS_PCI_MEMBASE2	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_MEMBASE2	/;"	d
CONFIG_SYS_PCI_MEMBASE2	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_MEMBASE2 /;"	d
CONFIG_SYS_PCI_MEMBASE3	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_MEMBASE3	/;"	d
CONFIG_SYS_PCI_MEMBASE3	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_MEMBASE3 /;"	d
CONFIG_SYS_PCI_MEMBASE3	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_MEMBASE3	/;"	d
CONFIG_SYS_PCI_MEMBASE3	include/configs/lwmon5.h	/^#define CONFIG_SYS_PCI_MEMBASE3	/;"	d
CONFIG_SYS_PCI_MEMBASE3	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_MEMBASE3	/;"	d
CONFIG_SYS_PCI_MEMBASE3	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_MEMBASE3 /;"	d
CONFIG_SYS_PCI_MEMORY_BUS	drivers/pci/fsl_pci_init.c	/^#define CONFIG_SYS_PCI_MEMORY_BUS /;"	d	file:
CONFIG_SYS_PCI_MEMORY_BUS	drivers/pci/pcie_layerscape.c	/^#define CONFIG_SYS_PCI_MEMORY_BUS /;"	d	file:
CONFIG_SYS_PCI_MEMORY_PHYS	drivers/pci/fsl_pci_init.c	/^#define CONFIG_SYS_PCI_MEMORY_PHYS /;"	d	file:
CONFIG_SYS_PCI_MEMORY_PHYS	drivers/pci/pcie_layerscape.c	/^#define CONFIG_SYS_PCI_MEMORY_PHYS /;"	d	file:
CONFIG_SYS_PCI_MEMORY_SIZE	drivers/pci/pcie_layerscape.c	/^#define CONFIG_SYS_PCI_MEMORY_SIZE /;"	d	file:
CONFIG_SYS_PCI_MEMSIZE	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_MEMSIZE	/;"	d
CONFIG_SYS_PCI_MEM_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_MEM_BASE	/;"	d
CONFIG_SYS_PCI_MEM_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_MEM_BASE	/;"	d
CONFIG_SYS_PCI_MEM_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_MEM_BASE	/;"	d
CONFIG_SYS_PCI_MEM_BASE	include/configs/aria.h	/^#define CONFIG_SYS_PCI_MEM_BASE	/;"	d
CONFIG_SYS_PCI_MEM_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_MEM_BASE	/;"	d
CONFIG_SYS_PCI_MEM_BUS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_MEM_BUS	/;"	d
CONFIG_SYS_PCI_MEM_BUS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_MEM_BUS	/;"	d
CONFIG_SYS_PCI_MEM_BUS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_MEM_BUS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/aria.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_PHYS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_MEM_PHYS	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MEM_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_MMIO_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_MMIO_BASE	/;"	d
CONFIG_SYS_PCI_MMIO_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_MMIO_BASE	/;"	d
CONFIG_SYS_PCI_MMIO_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_MMIO_BASE	/;"	d
CONFIG_SYS_PCI_MMIO_BASE	include/configs/aria.h	/^#define CONFIG_SYS_PCI_MMIO_BASE	/;"	d
CONFIG_SYS_PCI_MMIO_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_MMIO_BASE	/;"	d
CONFIG_SYS_PCI_MMIO_PHYS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI_MMIO_PHYS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI_MMIO_PHYS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI_MMIO_PHYS	include/configs/aria.h	/^#define CONFIG_SYS_PCI_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI_MMIO_PHYS	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_MMIO_PHYS	/;"	d
CONFIG_SYS_PCI_MMIO_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI_MMIO_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI_MMIO_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI_MMIO_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_PCI_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI_MMIO_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PCI_MMIO_SIZE	/;"	d
CONFIG_SYS_PCI_NR_INBOUND_WIN	common/fdt_support.c	/^#define CONFIG_SYS_PCI_NR_INBOUND_WIN /;"	d	file:
CONFIG_SYS_PCI_PHYS	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI_PHYS	/;"	d
CONFIG_SYS_PCI_PHYS	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI_PHYS	/;"	d
CONFIG_SYS_PCI_PHYS	include/configs/socrates.h	/^#define CONFIG_SYS_PCI_PHYS	/;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_PTM1LA /;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_PTM1LA /;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_PTM1LA	/;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_PTM1LA	/;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_PTM1LA /;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_PTM1LA /;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_PTM1LA /;"	d
CONFIG_SYS_PCI_PTM1LA	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_PTM1LA	/;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_PTM1MS /;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_PTM1MS /;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_PTM1MS	/;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_PTM1MS	/;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_PTM1MS /;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_PTM1MS /;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_PTM1MS /;"	d
CONFIG_SYS_PCI_PTM1MS	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_PTM1MS	/;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM1PCI	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_PTM1PCI /;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_PTM2LA	/;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_PTM2LA /;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_PTM2LA	/;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_PTM2LA	/;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_PTM2LA /;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_PTM2LA /;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_PTM2LA /;"	d
CONFIG_SYS_PCI_PTM2LA	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_PTM2LA	/;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_PTM2MS /;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_PTM2MS /;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_PTM2MS	/;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_PTM2MS	/;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_PTM2MS /;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_PTM2MS /;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_PTM2MS /;"	d
CONFIG_SYS_PCI_PTM2MS	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_PTM2MS	/;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_PTM2PCI	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_PTM2PCI /;"	d
CONFIG_SYS_PCI_SLV_MEM_BUS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_SLV_MEM_BUS	/;"	d
CONFIG_SYS_PCI_SLV_MEM_BUS	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI_SLV_MEM_BUS	/;"	d
CONFIG_SYS_PCI_SLV_MEM_BUS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_SLV_MEM_BUS	/;"	d
CONFIG_SYS_PCI_SLV_MEM_BUS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_SLV_MEM_BUS	/;"	d
CONFIG_SYS_PCI_SLV_MEM_LOCAL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_SLV_MEM_LOCAL	/;"	d
CONFIG_SYS_PCI_SLV_MEM_LOCAL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI_SLV_MEM_LOCAL	/;"	d
CONFIG_SYS_PCI_SLV_MEM_LOCAL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_SLV_MEM_LOCAL	/;"	d
CONFIG_SYS_PCI_SLV_MEM_LOCAL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_SLV_MEM_LOCAL	/;"	d
CONFIG_SYS_PCI_SLV_MEM_SIZE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_SLV_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_SLV_MEM_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI_SLV_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_SLV_MEM_SIZE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_SLV_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_SLV_MEM_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_SLV_MEM_SIZE	/;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/icon.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/intip.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/katmai.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/luan.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/t3corp.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID	include/configs/yucca.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID /;"	d
CONFIG_SYS_PCI_SUBSYS_DEVICEID2	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_SUBSYS_DEVICEID2 /;"	d
CONFIG_SYS_PCI_SUBSYS_ID	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID	/;"	d
CONFIG_SYS_PCI_SUBSYS_ID	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID /;"	d
CONFIG_SYS_PCI_SUBSYS_ID	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID	/;"	d
CONFIG_SYS_PCI_SUBSYS_ID	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID /;"	d
CONFIG_SYS_PCI_SUBSYS_ID	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID /;"	d
CONFIG_SYS_PCI_SUBSYS_ID_MONARCH	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID_MONARCH /;"	d
CONFIG_SYS_PCI_SUBSYS_ID_MONARCH	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID_MONARCH /;"	d
CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH /;"	d
CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/CPCI4052.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MIP405.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID	/;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID	/;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/PIP405.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/PLU405.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/PMC405DE.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID	/;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/TQM834x.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID	/;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/bubinga.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID	/;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/hrcon.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/icon.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/intip.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/katmai.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/luan.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/sbc8349.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/strider.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/t3corp.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/ve8313.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/vme8349.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID	/;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/walnut.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SUBSYS_VENDORID	include/configs/yucca.h	/^#define CONFIG_SYS_PCI_SUBSYS_VENDORID /;"	d
CONFIG_SYS_PCI_SYS_MEM_BUS	arch/m68k/cpu/mcf5445x/pci.c	/^#define CONFIG_SYS_PCI_SYS_MEM_BUS	/;"	d	file:
CONFIG_SYS_PCI_SYS_MEM_BUS	arch/m68k/cpu/mcf547x_8x/pci.c	/^#define CONFIG_SYS_PCI_SYS_MEM_BUS	/;"	d	file:
CONFIG_SYS_PCI_SYS_MEM_PHYS	arch/m68k/cpu/mcf5445x/pci.c	/^#define CONFIG_SYS_PCI_SYS_MEM_PHYS	/;"	d	file:
CONFIG_SYS_PCI_SYS_MEM_PHYS	arch/m68k/cpu/mcf547x_8x/pci.c	/^#define CONFIG_SYS_PCI_SYS_MEM_PHYS	/;"	d	file:
CONFIG_SYS_PCI_SYS_MEM_SIZE	arch/m68k/cpu/mcf5445x/pci.c	/^#define CONFIG_SYS_PCI_SYS_MEM_SIZE	/;"	d	file:
CONFIG_SYS_PCI_SYS_MEM_SIZE	arch/m68k/cpu/mcf547x_8x/pci.c	/^#define CONFIG_SYS_PCI_SYS_MEM_SIZE	/;"	d	file:
CONFIG_SYS_PCI_TARGBASE	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_TARGBASE /;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/icon.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/intip.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/katmai.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/luan.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/t3corp.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_TARGBASE /;"	d
CONFIG_SYS_PCI_TARGBASE	include/configs/yucca.h	/^#define CONFIG_SYS_PCI_TARGBASE	/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/PMC440.h	/^#define CONFIG_SYS_PCI_TARGET_INIT$/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/bamboo.h	/^#define CONFIG_SYS_PCI_TARGET_INIT$/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/canyonlands.h	/^#define CONFIG_SYS_PCI_TARGET_INIT	/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_PCI_TARGET_INIT$/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/icon.h	/^#define CONFIG_SYS_PCI_TARGET_INIT	/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/intip.h	/^#define CONFIG_SYS_PCI_TARGET_INIT	/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/katmai.h	/^#define CONFIG_SYS_PCI_TARGET_INIT	/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/luan.h	/^#define CONFIG_SYS_PCI_TARGET_INIT$/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/sequoia.h	/^#define CONFIG_SYS_PCI_TARGET_INIT$/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/xpedite1000.h	/^#define CONFIG_SYS_PCI_TARGET_INIT	/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/yosemite.h	/^#define CONFIG_SYS_PCI_TARGET_INIT$/;"	d
CONFIG_SYS_PCI_TARGET_INIT	include/configs/yucca.h	/^#define CONFIG_SYS_PCI_TARGET_INIT	/;"	d
CONFIG_SYS_PCI_TBATR0	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PCI_TBATR0	/;"	d
CONFIG_SYS_PCI_TBATR1	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PCI_TBATR1	/;"	d
CONFIG_SYS_PCI_TBATR5	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PCI_TBATR5	/;"	d
CONFIG_SYS_PCI_VIRT	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PCI_VIRT	/;"	d
CONFIG_SYS_PCI_VIRT	include/configs/sbc8548.h	/^#define CONFIG_SYS_PCI_VIRT	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_ATTRB_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_DMA_ADDR	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_DMA_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_DMA_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_IO_ADDR	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_IO_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_IO_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR	/;"	d
CONFIG_SYS_PCMCIA_MEM_ADDR	include/configs/dbau1x00.h	/^#define CONFIG_SYS_PCMCIA_MEM_ADDR /;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM823L.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM823M.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM850L.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM850M.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM855L.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM855M.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM860L.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM860M.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM862L.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM862M.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM866M.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/TQM885D.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE	/;"	d
CONFIG_SYS_PCMCIA_MEM_SIZE	include/configs/dbau1x00.h	/^#define CONFIG_SYS_PCMCIA_MEM_SIZE /;"	d
CONFIG_SYS_PCMCIA_PBR0	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR0	/;"	d
CONFIG_SYS_PCMCIA_PBR1	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR1	/;"	d
CONFIG_SYS_PCMCIA_PBR2	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR2	/;"	d
CONFIG_SYS_PCMCIA_PBR3	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR3	/;"	d
CONFIG_SYS_PCMCIA_PBR4	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR4	/;"	d
CONFIG_SYS_PCMCIA_PBR5	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR5	/;"	d
CONFIG_SYS_PCMCIA_PBR6	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR6	/;"	d
CONFIG_SYS_PCMCIA_PBR7	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_PBR7	/;"	d
CONFIG_SYS_PCMCIA_POR0	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR0	/;"	d
CONFIG_SYS_PCMCIA_POR1	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR1	/;"	d
CONFIG_SYS_PCMCIA_POR2	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR2	/;"	d
CONFIG_SYS_PCMCIA_POR3	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR3	/;"	d
CONFIG_SYS_PCMCIA_POR4	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR4	/;"	d
CONFIG_SYS_PCMCIA_POR5	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR5	/;"	d
CONFIG_SYS_PCMCIA_POR6	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR6	/;"	d
CONFIG_SYS_PCMCIA_POR7	include/pcmcia.h	/^#define CONFIG_SYS_PCMCIA_POR7	/;"	d
CONFIG_SYS_PCMCIA_TIMING	drivers/pcmcia/mpc8xx_pcmcia.c	/^#define	CONFIG_SYS_PCMCIA_TIMING	/;"	d	file:
CONFIG_SYS_PDCNT	include/configs/M5272C3.h	/^#define CONFIG_SYS_PDCNT	/;"	d
CONFIG_SYS_PDCNT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PDCNT	/;"	d
CONFIG_SYS_PDCNT	include/configs/cobra5272.h	/^#define CONFIG_SYS_PDCNT	/;"	d
CONFIG_SYS_PDCNT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PDCNT	/;"	d
CONFIG_SYS_PDM360NG_COPROC_BAUDRATE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE	/;"	d
CONFIG_SYS_PDM360NG_COPROC_READ_DELAY	include/configs/pdm360ng.h	/^#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY	/;"	d
CONFIG_SYS_PEHLPAR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PEHLPAR	/;"	d
CONFIG_SYS_PEHLPAR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PEHLPAR	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc405ep.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc405ex.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc405ez.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc405gp.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc440gp.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc440gx.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc440sp.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc440spe.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PERIPHERAL_BASE	arch/powerpc/include/asm/ppc460sx.h	/^#define CONFIG_SYS_PERIPHERAL_BASE	/;"	d
CONFIG_SYS_PFC0	include/configs/icon.h	/^#define CONFIG_SYS_PFC0	/;"	d
CONFIG_SYS_PFC0	include/configs/katmai.h	/^#define CONFIG_SYS_PFC0	/;"	d
CONFIG_SYS_PHYS_ADDR_HIGH	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PHYS_ADDR_HIGH /;"	d
CONFIG_SYS_PHY_UBOOT_BASE	arch/arm/cpu/arm1176/start.S	/^#define CONFIG_SYS_PHY_UBOOT_BASE	/;"	d	file:
CONFIG_SYS_PIB_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PIB_BASE	/;"	d
CONFIG_SYS_PIB_WINDOW_SIZE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_PIB_WINDOW_SIZE	/;"	d
CONFIG_SYS_PIOC_ASR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_PIOC_ASR_VAL	/;"	d
CONFIG_SYS_PIOC_BSR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_PIOC_BSR_VAL	/;"	d
CONFIG_SYS_PIOC_PDR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_PIOC_PDR_VAL	/;"	d
CONFIG_SYS_PIOC_PDR_VAL1	include/configs/pm9261.h	/^#define CONFIG_SYS_PIOC_PDR_VAL1	/;"	d
CONFIG_SYS_PIOC_PPUDR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_PIOC_PPUDR_VAL	/;"	d
CONFIG_SYS_PIOD_PDR_VAL1	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_PIOD_PDR_VAL1	/;"	d
CONFIG_SYS_PIOD_PDR_VAL1	include/configs/pm9263.h	/^#define CONFIG_SYS_PIOD_PDR_VAL1	/;"	d
CONFIG_SYS_PIOD_PPUDR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_PIOD_PPUDR_VAL	/;"	d
CONFIG_SYS_PIOD_PPUDR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_PIOD_PPUDR_VAL	/;"	d
CONFIG_SYS_PIO_MODE	arch/powerpc/lib/ide.c	/^#define CONFIG_SYS_PIO_MODE	/;"	d	file:
CONFIG_SYS_PIO_MODE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_PIO_MODE	/;"	d
CONFIG_SYS_PIO_MODE	include/configs/ms7720se.h	/^#define CONFIG_SYS_PIO_MODE	/;"	d
CONFIG_SYS_PIO_MODE	include/configs/r2dplus.h	/^#define CONFIG_SYS_PIO_MODE	/;"	d
CONFIG_SYS_PIO_MODE	include/configs/r7780mp.h	/^#define CONFIG_SYS_PIO_MODE /;"	d
CONFIG_SYS_PISCR	include/configs/PATI.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM823L.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM823M.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM850L.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM850M.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM855L.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM855M.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM860L.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM860M.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM862L.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM862M.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM866M.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/TQM885D.h	/^#define CONFIG_SYS_PISCR	/;"	d
CONFIG_SYS_PISCR	include/configs/km82xx.h	/^#define CONFIG_SYS_PISCR /;"	d
CONFIG_SYS_PIT_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PIT_BASE	/;"	d
CONFIG_SYS_PIT_PRESCALE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_PIT_PRESCALE	/;"	d
CONFIG_SYS_PIXIS_VBOOT_ENABLE	board/freescale/common/pixis.c	/^#define CONFIG_SYS_PIXIS_VBOOT_ENABLE	/;"	d	file:
CONFIG_SYS_PIXIS_VBOOT_MASK	board/freescale/common/pixis.c	/^#define CONFIG_SYS_PIXIS_VBOOT_MASK	/;"	d	file:
CONFIG_SYS_PIXIS_VBOOT_MASK	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_PIXIS_VBOOT_MASK	/;"	d
CONFIG_SYS_PIXIS_VBOOT_MASK	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_PIXIS_VBOOT_MASK	/;"	d
CONFIG_SYS_PIXIS_VBOOT_MASK	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_PIXIS_VBOOT_MASK	/;"	d
CONFIG_SYS_PIXIS_VBOOT_MASK	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_PIXIS_VBOOT_MASK	/;"	d
CONFIG_SYS_PIXIS_VBOOT_MASK	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_PIXIS_VBOOT_MASK	/;"	d
CONFIG_SYS_PIXIS_VCFGEN0_ENABLE	board/freescale/common/pixis.c	/^#define CONFIG_SYS_PIXIS_VCFGEN0_ENABLE	/;"	d	file:
CONFIG_SYS_PJPAR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PJPAR	/;"	d
CONFIG_SYS_PJPAR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PJPAR	/;"	d
CONFIG_SYS_PL310_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/cm_t43.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/kc1.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/mx6_common.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/odroid.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/trats.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/trats2.h	/^#define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PL310_BASE	include/configs/zynq-common.h	/^# define CONFIG_SYS_PL310_BASE	/;"	d
CONFIG_SYS_PLATFORM_SRAM_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PLATFORM_SRAM_BASE	/;"	d
CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS /;"	d
CONFIG_SYS_PLATFORM_SRAM_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_PLATFORM_SRAM_SIZE	/;"	d
CONFIG_SYS_PLL0_DIV	include/configs/atngw100.h	/^#define CONFIG_SYS_PLL0_DIV	/;"	d
CONFIG_SYS_PLL0_DIV	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_PLL0_DIV	/;"	d
CONFIG_SYS_PLL0_DIV	include/configs/atstk1002.h	/^#define CONFIG_SYS_PLL0_DIV	/;"	d
CONFIG_SYS_PLL0_DIV	include/configs/grasshopper.h	/^#define CONFIG_SYS_PLL0_DIV	/;"	d
CONFIG_SYS_PLL0_MUL	include/configs/atngw100.h	/^#define CONFIG_SYS_PLL0_MUL	/;"	d
CONFIG_SYS_PLL0_MUL	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_PLL0_MUL	/;"	d
CONFIG_SYS_PLL0_MUL	include/configs/atstk1002.h	/^#define CONFIG_SYS_PLL0_MUL	/;"	d
CONFIG_SYS_PLL0_MUL	include/configs/grasshopper.h	/^#define CONFIG_SYS_PLL0_MUL	/;"	d
CONFIG_SYS_PLL0_OPT	include/configs/atngw100.h	/^#define CONFIG_SYS_PLL0_OPT	/;"	d
CONFIG_SYS_PLL0_OPT	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_PLL0_OPT	/;"	d
CONFIG_SYS_PLL0_OPT	include/configs/atstk1002.h	/^#define CONFIG_SYS_PLL0_OPT	/;"	d
CONFIG_SYS_PLL0_OPT	include/configs/grasshopper.h	/^#define CONFIG_SYS_PLL0_OPT	/;"	d
CONFIG_SYS_PLL0_SUPPRESS_CYCLES	include/configs/atngw100.h	/^#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	/;"	d
CONFIG_SYS_PLL0_SUPPRESS_CYCLES	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	/;"	d
CONFIG_SYS_PLL0_SUPPRESS_CYCLES	include/configs/atstk1002.h	/^#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	/;"	d
CONFIG_SYS_PLL0_SUPPRESS_CYCLES	include/configs/grasshopper.h	/^#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	/;"	d
CONFIG_SYS_PLLAR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_PLLAR_VAL	/;"	d
CONFIG_SYS_PLLAR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_PLLAR_VAL	/;"	d
CONFIG_SYS_PLLAR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_PLLAR_VAL	/;"	d
CONFIG_SYS_PLLAR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_PLLAR_VAL	/;"	d
CONFIG_SYS_PLLBR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_PLLBR_VAL	/;"	d
CONFIG_SYS_PLLCR	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_PLLCR	/;"	d
CONFIG_SYS_PLLCR	include/configs/M5253EVBE.h	/^#	define CONFIG_SYS_PLLCR	/;"	d
CONFIG_SYS_PLL_FDR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_PLL_FDR	/;"	d
CONFIG_SYS_PLL_ODR	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_PLL_ODR	/;"	d
CONFIG_SYS_PLL_RECONFIG	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^#define CONFIG_SYS_PLL_RECONFIG	/;"	d	file:
CONFIG_SYS_PLL_SETTLING_TIME	include/configs/r2dplus.h	/^#define	CONFIG_SYS_PLL_SETTLING_TIME	/;"	d
CONFIG_SYS_PLPRCR	include/configs/PATI.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM823L.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM823M.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM850L.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM850M.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM855L.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM855M.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM860L.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM860M.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM862L.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLPRCR	include/configs/TQM862M.h	/^#define CONFIG_SYS_PLPRCR	/;"	d
CONFIG_SYS_PLUG_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_PLUG_BASE	/;"	d
CONFIG_SYS_PMAN	include/configs/T208xQDS.h	/^#define CONFIG_SYS_PMAN$/;"	d
CONFIG_SYS_PMAN	include/configs/T208xRDB.h	/^#define CONFIG_SYS_PMAN$/;"	d
CONFIG_SYS_PMAN	include/configs/T4240QDS.h	/^#define CONFIG_SYS_PMAN$/;"	d
CONFIG_SYS_PMAN	include/configs/T4240RDB.h	/^#define CONFIG_SYS_PMAN$/;"	d
CONFIG_SYS_PMC_BASE	include/configs/UCP1020.h	/^#define CONFIG_SYS_PMC_BASE	/;"	d
CONFIG_SYS_PMC_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PMC_BASE	/;"	d
CONFIG_SYS_PMC_BASE_PHYS	include/configs/UCP1020.h	/^#define CONFIG_SYS_PMC_BASE_PHYS	/;"	d
CONFIG_SYS_PMC_BASE_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_PMC_BASE_PHYS	/;"	d
CONFIG_SYS_PME_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_PME_CLK	/;"	d
CONFIG_SYS_POST_BSPEC1	include/post.h	/^#define CONFIG_SYS_POST_BSPEC1	/;"	d
CONFIG_SYS_POST_BSPEC2	include/post.h	/^#define CONFIG_SYS_POST_BSPEC2	/;"	d
CONFIG_SYS_POST_BSPEC3	include/post.h	/^#define CONFIG_SYS_POST_BSPEC3	/;"	d
CONFIG_SYS_POST_BSPEC4	include/post.h	/^#define CONFIG_SYS_POST_BSPEC4	/;"	d
CONFIG_SYS_POST_BSPEC5	include/post.h	/^#define CONFIG_SYS_POST_BSPEC5	/;"	d
CONFIG_SYS_POST_CACHE	include/post.h	/^#define CONFIG_SYS_POST_CACHE	/;"	d
CONFIG_SYS_POST_CACHE_ADDR	include/configs/PMC440.h	/^#define CONFIG_SYS_POST_CACHE_ADDR	/;"	d
CONFIG_SYS_POST_CACHE_ADDR	include/configs/io64.h	/^#define CONFIG_SYS_POST_CACHE_ADDR	/;"	d
CONFIG_SYS_POST_CACHE_ADDR	include/configs/kilauea.h	/^#define CONFIG_SYS_POST_CACHE_ADDR	/;"	d
CONFIG_SYS_POST_CACHE_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_POST_CACHE_ADDR	/;"	d
CONFIG_SYS_POST_CACHE_ADDR	include/configs/makalu.h	/^#define CONFIG_SYS_POST_CACHE_ADDR	/;"	d
CONFIG_SYS_POST_CACHE_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_POST_CACHE_ADDR	/;"	d
CONFIG_SYS_POST_CODEC	include/post.h	/^#define CONFIG_SYS_POST_CODEC	/;"	d
CONFIG_SYS_POST_COPROC	include/post.h	/^#define CONFIG_SYS_POST_COPROC	/;"	d
CONFIG_SYS_POST_CPU	include/post.h	/^#define CONFIG_SYS_POST_CPU	/;"	d
CONFIG_SYS_POST_DSP	include/post.h	/^#define CONFIG_SYS_POST_DSP	/;"	d
CONFIG_SYS_POST_ECC	include/post.h	/^#define CONFIG_SYS_POST_ECC	/;"	d
CONFIG_SYS_POST_ETHER	include/post.h	/^#define CONFIG_SYS_POST_ETHER	/;"	d
CONFIG_SYS_POST_ETH_LOOPS	post/cpu/ppc4xx/ether.c	/^#define CONFIG_SYS_POST_ETH_LOOPS	/;"	d	file:
CONFIG_SYS_POST_FLASH	include/post.h	/^#define CONFIG_SYS_POST_FLASH	/;"	d
CONFIG_SYS_POST_FLASH_END	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_POST_FLASH_END	/;"	d
CONFIG_SYS_POST_FLASH_END	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_POST_FLASH_END	/;"	d
CONFIG_SYS_POST_FLASH_NUM	post/drivers/flash.c	/^# define CONFIG_SYS_POST_FLASH_NUM /;"	d	file:
CONFIG_SYS_POST_FLASH_START	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_POST_FLASH_START	/;"	d
CONFIG_SYS_POST_FLASH_START	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_POST_FLASH_START	/;"	d
CONFIG_SYS_POST_FPU	include/post.h	/^#define CONFIG_SYS_POST_FPU	/;"	d
CONFIG_SYS_POST_FPU_ON	include/configs/sequoia.h	/^#define CONFIG_SYS_POST_FPU_ON	/;"	d
CONFIG_SYS_POST_HOTKEYS_GPIO	include/configs/bf537-stamp.h	/^#define CONFIG_SYS_POST_HOTKEYS_GPIO	/;"	d
CONFIG_SYS_POST_I2C	include/post.h	/^#define CONFIG_SYS_POST_I2C	/;"	d
CONFIG_SYS_POST_I2C_ADDRS	include/configs/TQM5200.h	/^#define CONFIG_SYS_POST_I2C_ADDRS	/;"	d
CONFIG_SYS_POST_I2C_ADDRS	include/configs/cm5200.h	/^#define CONFIG_SYS_POST_I2C_ADDRS	/;"	d
CONFIG_SYS_POST_I2C_ADDRS	include/configs/lwmon5.h	/^#define CONFIG_SYS_POST_I2C_ADDRS	/;"	d
CONFIG_SYS_POST_MEMORY	include/post.h	/^#define CONFIG_SYS_POST_MEMORY	/;"	d
CONFIG_SYS_POST_MEMORY_ON	include/configs/io64.h	/^#define CONFIG_SYS_POST_MEMORY_ON	/;"	d
CONFIG_SYS_POST_MEMORY_ON	include/configs/kilauea.h	/^#define CONFIG_SYS_POST_MEMORY_ON	/;"	d
CONFIG_SYS_POST_MEMORY_ON	include/configs/sequoia.h	/^#define CONFIG_SYS_POST_MEMORY_ON	/;"	d
CONFIG_SYS_POST_MEM_REGIONS	include/post.h	/^#define CONFIG_SYS_POST_MEM_REGIONS	/;"	d
CONFIG_SYS_POST_OCM	include/post.h	/^#define CONFIG_SYS_POST_OCM	/;"	d
CONFIG_SYS_POST_RTC	include/post.h	/^#define CONFIG_SYS_POST_RTC	/;"	d
CONFIG_SYS_POST_SPI	include/post.h	/^#define CONFIG_SYS_POST_SPI	/;"	d
CONFIG_SYS_POST_SPR	include/post.h	/^#define CONFIG_SYS_POST_SPR	/;"	d
CONFIG_SYS_POST_SYSMON	include/post.h	/^#define CONFIG_SYS_POST_SYSMON	/;"	d
CONFIG_SYS_POST_UART	include/post.h	/^#define CONFIG_SYS_POST_UART	/;"	d
CONFIG_SYS_POST_UART_TABLE	include/configs/io64.h	/^#define CONFIG_SYS_POST_UART_TABLE	/;"	d
CONFIG_SYS_POST_UART_TABLE	include/configs/kilauea.h	/^#define CONFIG_SYS_POST_UART_TABLE	/;"	d
CONFIG_SYS_POST_UART_TABLE	include/configs/lwmon5.h	/^#define CONFIG_SYS_POST_UART_TABLE	/;"	d
CONFIG_SYS_POST_UART_TABLE	include/configs/makalu.h	/^#define CONFIG_SYS_POST_UART_TABLE	/;"	d
CONFIG_SYS_POST_UART_TABLE	post/cpu/ppc4xx/uart.c	/^#define CONFIG_SYS_POST_UART_TABLE	/;"	d	file:
CONFIG_SYS_POST_USB	include/post.h	/^#define CONFIG_SYS_POST_USB	/;"	d
CONFIG_SYS_POST_WATCHDOG	include/post.h	/^#define CONFIG_SYS_POST_WATCHDOG	/;"	d
CONFIG_SYS_POST_WORD_ADDR	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_POST_WORD_ADDR /;"	d
CONFIG_SYS_POST_WORD_ADDR	include/configs/io64.h	/^# define CONFIG_SYS_POST_WORD_ADDR /;"	d
CONFIG_SYS_POST_WORD_ADDR	include/configs/kilauea.h	/^# define CONFIG_SYS_POST_WORD_ADDR	/;"	d
CONFIG_SYS_POST_WORD_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_POST_WORD_ADDR	/;"	d
CONFIG_SYS_POST_WORD_ADDR	include/configs/makalu.h	/^# define CONFIG_SYS_POST_WORD_ADDR	/;"	d
CONFIG_SYS_POWER_MANAGER	include/configs/atngw100.h	/^#define CONFIG_SYS_POWER_MANAGER$/;"	d
CONFIG_SYS_POWER_MANAGER	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_POWER_MANAGER$/;"	d
CONFIG_SYS_POWER_MANAGER	include/configs/atstk1002.h	/^#define CONFIG_SYS_POWER_MANAGER$/;"	d
CONFIG_SYS_POWER_MANAGER	include/configs/grasshopper.h	/^#define CONFIG_SYS_POWER_MANAGER$/;"	d
CONFIG_SYS_PPC4XX_USB_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_PPC4XX_USB_ADDR	/;"	d
CONFIG_SYS_PPC4XX_USB_ADDR	include/configs/sequoia.h	/^#define CONFIG_SYS_PPC4XX_USB_ADDR	/;"	d
CONFIG_SYS_PPC64	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_PPC64	/;"	d
CONFIG_SYS_PPC64	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_PPC64$/;"	d
CONFIG_SYS_PPC_E500_DEBUG_TLB	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_PPC_E500_DEBUG_TLB	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM823L.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM823M.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM834x.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM850L.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM850M.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM855L.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM855M.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM860L.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM860M.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM862L.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM862M.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM866M.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PRELIM_OR_AM	include/configs/TQM885D.h	/^#define CONFIG_SYS_PRELIM_OR_AM	/;"	d
CONFIG_SYS_PROMPT	cmd/Kconfig	/^config SYS_PROMPT$/;"	c	menu:Command line interface
CONFIG_SYS_PROMPT	include/config/auto.conf	/^CONFIG_SYS_PROMPT="=> "$/;"	k
CONFIG_SYS_PROMPT	include/configs/s32v234evb.h	/^#define CONFIG_SYS_PROMPT	/;"	d
CONFIG_SYS_PROMPT	include/generated/autoconf.h	/^#define CONFIG_SYS_PROMPT /;"	d
CONFIG_SYS_PROMPT_HUSH_PS2	common/cli_hush.c	/^#define CONFIG_SYS_PROMPT_HUSH_PS2	/;"	d	file:
CONFIG_SYS_PROMPT_HUSH_PS2	include/configs/s32v234evb.h	/^#define CONFIG_SYS_PROMPT_HUSH_PS2	/;"	d
CONFIG_SYS_PROMPT_HUSH_PS2	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_PROMPT_HUSH_PS2	/;"	d
CONFIG_SYS_PROMPT_MODULE	cmd/Kconfig	/^config SYS_PROMPT$/;"	c	menu:Command line interface
CONFIG_SYS_PROM_OFFSET	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_PROM_OFFSET	/;"	d
CONFIG_SYS_PROM_OFFSET	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_PROM_OFFSET	/;"	d
CONFIG_SYS_PROM_OFFSET	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_PROM_OFFSET	/;"	d
CONFIG_SYS_PROM_OFFSET	include/configs/grsim.h	/^#define CONFIG_SYS_PROM_OFFSET	/;"	d
CONFIG_SYS_PROM_OFFSET	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_PROM_OFFSET	/;"	d
CONFIG_SYS_PROM_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_PROM_SIZE	/;"	d
CONFIG_SYS_PROM_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_PROM_SIZE	/;"	d
CONFIG_SYS_PROM_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_PROM_SIZE	/;"	d
CONFIG_SYS_PROM_SIZE	include/configs/grsim.h	/^#define CONFIG_SYS_PROM_SIZE	/;"	d
CONFIG_SYS_PROM_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_PROM_SIZE	/;"	d
CONFIG_SYS_PSC1	include/configs/pdm360ng.h	/^#define CONFIG_SYS_PSC1$/;"	d
CONFIG_SYS_PSC3	include/configs/ac14xx.h	/^#define CONFIG_SYS_PSC3$/;"	d
CONFIG_SYS_PSC3	include/configs/aria.h	/^#define CONFIG_SYS_PSC3$/;"	d
CONFIG_SYS_PSC3	include/configs/mecp5123.h	/^#define CONFIG_SYS_PSC3$/;"	d
CONFIG_SYS_PSC3	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_PSC3$/;"	d
CONFIG_SYS_PSC4	include/configs/pdm360ng.h	/^#define CONFIG_SYS_PSC4$/;"	d
CONFIG_SYS_PSC6	include/configs/pdm360ng.h	/^#define CONFIG_SYS_PSC6$/;"	d
CONFIG_SYS_PSDMR	include/configs/km82xx.h	/^#define CONFIG_SYS_PSDMR /;"	d
CONFIG_SYS_PSRT	include/configs/km82xx.h	/^#define CONFIG_SYS_PSRT /;"	d
CONFIG_SYS_PSSR_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_PSSR_VAL	/;"	d
CONFIG_SYS_PSSR_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_PSSR_VAL	/;"	d
CONFIG_SYS_PSSR_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_PSSR_VAL	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM823L.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM823M.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM850L.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM850M.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM855L.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM855M.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM860L.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM860M.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM862L.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM862M.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM866M.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTA_PER_CLK	include/configs/TQM885D.h	/^#define CONFIG_SYS_PTA_PER_CLK	/;"	d
CONFIG_SYS_PTV	include/configs/am3517_crane.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/am3517_evm.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/cm_t35.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/cm_t3517.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/kc1.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/mcx.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/omap3_evm.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/sniper.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/tam3517-common.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/tao3530.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_PTV /;"	d
CONFIG_SYS_PTV	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PTV	include/configs/tricorder.h	/^#define CONFIG_SYS_PTV	/;"	d
CONFIG_SYS_PUAPAR	include/configs/M5282EVB.h	/^#define CONFIG_SYS_PUAPAR	/;"	d
CONFIG_SYS_PUAPAR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_PUAPAR	/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/cyrus.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_MMC	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_MMC$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NAND	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NAND$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_NOR	include/configs/p1_twr.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_NOR$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE$/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/cyrus.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FMAN_FW_LENGTH	include/configs/p1_twr.h	/^#define CONFIG_SYS_QE_FMAN_FW_LENGTH	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_QE_FW_ADDR /;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_QE_FW_ADDR /;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_QE_FW_ADDR /;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_QE_FW_ADDR /;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_QE_FW_ADDR	/;"	d
CONFIG_SYS_QE_FW_ADDR	include/configs/suvd3.h	/^#define CONFIG_SYS_QE_FW_ADDR /;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QE_FW_IN_SPIFLASH	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_QE_FW_IN_SPIFLASH$/;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_CENA_BASE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CENA_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_CINH_BASE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_CINH_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_MEM_BASE	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_MEM_PHYS	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_MEM_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_MEM_SIZE	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_NUM_PORTALS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_NUM_PORTALS	/;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CENA_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_SP_CENA_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SP_CINH_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_SP_CINH_SIZE /;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/B4860QDS.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/P1023RDB.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/P2041RDB.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T102xQDS.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T102xRDB.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T1040QDS.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T104xRDB.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T208xQDS.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T208xRDB.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T4240QDS.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/T4240RDB.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/corenet_ds.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/cyrus.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG /;"	d
CONFIG_SYS_QMAN_SWP_ISDR_REG	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QMAN_SWP_ISDR_REG	/;"	d
CONFIG_SYS_QRIO_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QRIO_BASE	/;"	d
CONFIG_SYS_QRIO_BASE_PHYS	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QRIO_BASE_PHYS	/;"	d
CONFIG_SYS_QRIO_BR_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QRIO_BR_PRELIM /;"	d
CONFIG_SYS_QRIO_OR_PRELIM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_QRIO_OR_PRELIM /;"	d
CONFIG_SYS_R7780MP_OLD_FLASH	include/configs/r7780mp.h	/^#define CONFIG_SYS_R7780MP_OLD_FLASH	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/P1010RDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T102xQDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T102xRDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T1040QDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T104xRDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T4240QDS.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/T4240RDB.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/TQM5200.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/TQM834x.h	/^# define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/UCP1020.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/VOM405.h	/^# define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/a4m072.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/canmb.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/cm5200.h	/^#define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/controlcenterd.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/cyrus.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/gr_cpci_ax2000.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/gr_ep2s60.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/gr_xc3s_1500.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/grsim.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/grsim_leon2.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/inka4x0.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/ipek01.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/jupiter.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/manroland/mpc5200-common.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/motionpro.h	/^#define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/munices.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/p1_twr.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/pcm030.h	/^#	define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/sbc8349.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/v38b.h	/^#   define CONFIG_SYS_RAMBOOT	/;"	d
CONFIG_SYS_RAMBOOT	include/configs/ve8313.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAMBOOT	include/configs/vme8349.h	/^#define CONFIG_SYS_RAMBOOT$/;"	d
CONFIG_SYS_RAM_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_RAM_BASE /;"	d
CONFIG_SYS_RAM_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_RAM_BASE /;"	d
CONFIG_SYS_RAM_BASE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_RAM_BASE /;"	d
CONFIG_SYS_RAM_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_RAM_BASE	/;"	d
CONFIG_SYS_RAM_BASE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_RAM_BASE /;"	d
CONFIG_SYS_RAM_BASE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_RAM_BASE	/;"	d
CONFIG_SYS_RAM_BASE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_RAM_BASE	/;"	d
CONFIG_SYS_RAM_CS	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_RAM_CS	/;"	d
CONFIG_SYS_RAM_CS	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_RAM_CS	/;"	d
CONFIG_SYS_RAM_END	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_RAM_END /;"	d
CONFIG_SYS_RAM_END	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_RAM_END /;"	d
CONFIG_SYS_RAM_END	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_RAM_END /;"	d
CONFIG_SYS_RAM_END	include/configs/grsim.h	/^#define CONFIG_SYS_RAM_END	/;"	d
CONFIG_SYS_RAM_END	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_RAM_END /;"	d
CONFIG_SYS_RAM_FREQ_DIV	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_RAM_FREQ_DIV	/;"	d
CONFIG_SYS_RAM_FREQ_DIV	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_RAM_FREQ_DIV	/;"	d
CONFIG_SYS_RAM_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_RAM_SIZE /;"	d
CONFIG_SYS_RAM_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_RAM_SIZE /;"	d
CONFIG_SYS_RAM_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_RAM_SIZE /;"	d
CONFIG_SYS_RAM_SIZE	include/configs/grsim.h	/^#define CONFIG_SYS_RAM_SIZE	/;"	d
CONFIG_SYS_RAM_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_RAM_SIZE /;"	d
CONFIG_SYS_RAM_SIZE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_RAM_SIZE	/;"	d
CONFIG_SYS_RAM_SIZE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_RAM_SIZE	/;"	d
CONFIG_SYS_RCAR_I2C0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_RCAR_I2C0_BASE	/;"	d
CONFIG_SYS_RCAR_I2C0_SPEED	include/configs/lager.h	/^#define CONFIG_SYS_RCAR_I2C0_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C0_SPEED	include/configs/stout.h	/^#define CONFIG_SYS_RCAR_I2C0_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_RCAR_I2C1_BASE	/;"	d
CONFIG_SYS_RCAR_I2C1_SPEED	include/configs/lager.h	/^#define CONFIG_SYS_RCAR_I2C1_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C1_SPEED	include/configs/stout.h	/^#define CONFIG_SYS_RCAR_I2C1_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_RCAR_I2C2_BASE	/;"	d
CONFIG_SYS_RCAR_I2C2_SPEED	include/configs/lager.h	/^#define CONFIG_SYS_RCAR_I2C2_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C2_SPEED	include/configs/stout.h	/^#define CONFIG_SYS_RCAR_I2C2_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C3_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_RCAR_I2C3_BASE	/;"	d
CONFIG_SYS_RCAR_I2C3_SPEED	include/configs/lager.h	/^#define CONFIG_SYS_RCAR_I2C3_SPEED	/;"	d
CONFIG_SYS_RCAR_I2C3_SPEED	include/configs/stout.h	/^#define CONFIG_SYS_RCAR_I2C3_SPEED	/;"	d
CONFIG_SYS_RCCR	include/configs/km82xx.h	/^#define CONFIG_SYS_RCCR /;"	d
CONFIG_SYS_RCWH_PCIHOST	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_RCWH_PCIHOST /;"	d
CONFIG_SYS_RCWH_PCIHOST	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_RCWH_PCIHOST /;"	d
CONFIG_SYS_RCWH_PCIHOST	include/configs/sbc8349.h	/^#define CONFIG_SYS_RCWH_PCIHOST /;"	d
CONFIG_SYS_RCWH_PCIHOST	include/configs/vme8349.h	/^#define CONFIG_SYS_RCWH_PCIHOST /;"	d
CONFIG_SYS_READ_SPD	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^#define CONFIG_SYS_READ_SPD	/;"	d	file:
CONFIG_SYS_READ_SPD	include/configs/vme8349.h	/^#define CONFIG_SYS_READ_SPD	/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/UCP1020.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/am335x_evm.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/am335x_igep0033.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/am335x_sl50.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/bav335x.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/brppt1.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/brxre1.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/cm_t54.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/km/km_arm.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/kylin_rk3036.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/mx28evk.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/pcm058.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/socfpga_sr1500.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/socfpga_vining_fpga.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/configs/tqma6.h	/^#define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/environment.h	/^#   define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	include/environment.h	/^#  define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d
CONFIG_SYS_REDUNDAND_ENVIRONMENT	tools/envcrc.c	/^#  define CONFIG_SYS_REDUNDAND_ENVIRONMENT$/;"	d	file:
CONFIG_SYS_RELOC_MONITOR_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_RELOC_MONITOR_BASE /;"	d
CONFIG_SYS_RELOC_MONITOR_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_RELOC_MONITOR_BASE /;"	d
CONFIG_SYS_RELOC_MONITOR_BASE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_RELOC_MONITOR_BASE /;"	d
CONFIG_SYS_RELOC_MONITOR_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_RELOC_MONITOR_BASE /;"	d
CONFIG_SYS_RELOC_MONITOR_BASE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_RELOC_MONITOR_BASE /;"	d
CONFIG_SYS_RELOC_MONITOR_MAX_END	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_RELOC_MONITOR_MAX_END /;"	d
CONFIG_SYS_RELOC_MONITOR_MAX_END	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_RELOC_MONITOR_MAX_END /;"	d
CONFIG_SYS_RELOC_MONITOR_MAX_END	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_RELOC_MONITOR_MAX_END /;"	d
CONFIG_SYS_RELOC_MONITOR_MAX_END	include/configs/grsim.h	/^#define CONFIG_SYS_RELOC_MONITOR_MAX_END /;"	d
CONFIG_SYS_RELOC_MONITOR_MAX_END	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_RELOC_MONITOR_MAX_END /;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM823L.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM823M.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM850L.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM850M.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM855L.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM855M.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM860L.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM860M.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM862L.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM862M.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM866M.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_REMAP_OR_AM	include/configs/TQM885D.h	/^#define CONFIG_SYS_REMAP_OR_AM	/;"	d
CONFIG_SYS_RESET_ADDR	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_RESET_ADDR	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/PATI.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/TQM5200.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/a3m071.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/a4m072.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/canmb.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/edminiv2.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/ipek01.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/jupiter.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/km/km_arm.h	/^#define CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/km82xx.h	/^#define	CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/motionpro.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/munices.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/mv-common.h	/^#define CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/o2d.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/o2d300.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/o2dnt2.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/o2i.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/o2mnt.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/o3dnt.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/pcm030.h	/^#define CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_RESET_ADDRESS /;"	d
CONFIG_SYS_RESET_ADDRESS	include/configs/v38b.h	/^#define CONFIG_SYS_RESET_ADDRESS	/;"	d
CONFIG_SYS_RESET_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_RESET_BASE	/;"	d
CONFIG_SYS_RFD	include/configs/M5282EVB.h	/^#define CONFIG_SYS_RFD	/;"	d
CONFIG_SYS_RFD	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_RFD	/;"	d
CONFIG_SYS_RGMII1_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_RGMII1_PHY_ADDR /;"	d
CONFIG_SYS_RGMII2_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_RGMII2_PHY_ADDR /;"	d
CONFIG_SYS_RIO_MEM_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_RIO_MEM_BASE	/;"	d
CONFIG_SYS_RIO_MEM_BUS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_RIO_MEM_BUS	/;"	d
CONFIG_SYS_RIO_MEM_BUS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_RIO_MEM_BUS	/;"	d
CONFIG_SYS_RIO_MEM_PHYS	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_RIO_MEM_PHYS	/;"	d
CONFIG_SYS_RIO_MEM_PHYS	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_RIO_MEM_PHYS	/;"	d
CONFIG_SYS_RIO_MEM_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_RIO_MEM_SIZE	/;"	d
CONFIG_SYS_RIO_MEM_SIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_RIO_MEM_SIZE	/;"	d
CONFIG_SYS_RIO_MEM_SIZE	include/configs/sbc8548.h	/^#define CONFIG_SYS_RIO_MEM_SIZE	/;"	d
CONFIG_SYS_RIO_MEM_VIRT	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_RIO_MEM_VIRT	/;"	d
CONFIG_SYS_RIO_MEM_VIRT	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_RIO_MEM_VIRT	/;"	d
CONFIG_SYS_RMR	include/configs/km82xx.h	/^#define CONFIG_SYS_RMR /;"	d
CONFIG_SYS_ROOTPATH	include/configs/PMC440.h	/^#define CONFIG_SYS_ROOTPATH	/;"	d
CONFIG_SYS_RSTC_RMR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_RSTC_RMR_VAL	/;"	d
CONFIG_SYS_RSTC_RMR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_RSTC_RMR_VAL	/;"	d
CONFIG_SYS_RSTC_RMR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_RSTC_RMR_VAL	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM823L.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM823M.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM850L.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM850M.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM855L.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM855M.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM860L.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM860M.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM862L.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTCSC	include/configs/TQM862M.h	/^#define CONFIG_SYS_RTCSC	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/apf27.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/cyrus.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/icon.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/katmai.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/m53evk.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/mecp5123.h	/^#define CONFIG_SYS_RTC_BUS_NUM /;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/pcm052.h	/^#define CONFIG_SYS_RTC_BUS_NUM /;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/tbs2910.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/tqma6_wru4.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_BUS_NUM	include/configs/vme8349.h	/^#define CONFIG_SYS_RTC_BUS_NUM /;"	d
CONFIG_SYS_RTC_BUS_NUM	include/i2c.h	/^#define CONFIG_SYS_RTC_BUS_NUM	/;"	d
CONFIG_SYS_RTC_CNT	include/configs/M53017EVB.h	/^#define CONFIG_SYS_RTC_CNT	/;"	d
CONFIG_SYS_RTC_DS1337_NOOSC	include/configs/UCP1020.h	/^#define CONFIG_SYS_RTC_DS1337_NOOSC$/;"	d
CONFIG_SYS_RTC_DS1337_NOOSC	include/configs/tqma6_wru4.h	/^#define CONFIG_SYS_RTC_DS1337_NOOSC$/;"	d
CONFIG_SYS_RTC_OSCILLATOR	include/configs/M52277EVB.h	/^#define CONFIG_SYS_RTC_OSCILLATOR	/;"	d
CONFIG_SYS_RTC_OSCILLATOR	include/configs/M54451EVB.h	/^#define CONFIG_SYS_RTC_OSCILLATOR	/;"	d
CONFIG_SYS_RTC_OSCILLATOR	include/configs/M54455EVB.h	/^#define CONFIG_SYS_RTC_OSCILLATOR	/;"	d
CONFIG_SYS_RTC_REG_BASE_ADDR	include/configs/PLU405.h	/^#define CONFIG_SYS_RTC_REG_BASE_ADDR	/;"	d
CONFIG_SYS_RTC_SETUP	include/configs/M53017EVB.h	/^#define CONFIG_SYS_RTC_SETUP	/;"	d
CONFIG_SYS_RV3029_TCR	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_RV3029_TCR	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/CPCI4052.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5208EVBE.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5235EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5272C3.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5275EVB.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5282EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5329EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5373EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M54418TWR.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M54451EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/PLU405.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/PMC405DE.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/PMC440.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/TQM5200.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/VOM405.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/amcc-common.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/cm_t43.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/cobra5272.h	/^#	define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/integratorap.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/ipek01.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/jupiter.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/lwmon5.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/ms7750se.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/r7780mp.h	/^#define CONFIG_SYS_RX_ETH_BUFFER	/;"	d
CONFIG_SYS_RX_ETH_BUFFER	include/configs/xpedite1000.h	/^#define CONFIG_SYS_RX_ETH_BUFFER /;"	d
CONFIG_SYS_S3C2410_NAND_HWECC	include/configs/VCMA9.h	/^#define CONFIG_SYS_S3C2410_NAND_HWECC$/;"	d
CONFIG_SYS_S3C2410_NAND_HWECC	include/configs/smdk2410.h	/^#define CONFIG_SYS_S3C2410_NAND_HWECC$/;"	d
CONFIG_SYS_SATA	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_SATA	/;"	d
CONFIG_SYS_SATA	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_SATA	/;"	d
CONFIG_SYS_SATA	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_SATA	/;"	d
CONFIG_SYS_SATA	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_SATA	/;"	d
CONFIG_SYS_SATA	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_SATA	/;"	d
CONFIG_SYS_SATA1	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/P1022DS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/cyrus.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1	include/configs/t4qds.h	/^#define CONFIG_SYS_SATA1	/;"	d
CONFIG_SYS_SATA1_FLAGS	drivers/block/fsl_sata.c	/^	#define CONFIG_SYS_SATA1_FLAGS	/;"	d	file:
CONFIG_SYS_SATA1_FLAGS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/P1022DS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/cyrus.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_FLAGS	include/configs/t4qds.h	/^#define CONFIG_SYS_SATA1_FLAGS	/;"	d
CONFIG_SYS_SATA1_OFFSET	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA1_OFFSET	/;"	d
CONFIG_SYS_SATA1_OFFSET	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA1_OFFSET	/;"	d
CONFIG_SYS_SATA1_OFFSET	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA1_OFFSET	/;"	d
CONFIG_SYS_SATA2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/P1022DS.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/cyrus.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2	include/configs/t4qds.h	/^#define CONFIG_SYS_SATA2	/;"	d
CONFIG_SYS_SATA2_FLAGS	drivers/block/fsl_sata.c	/^	#define CONFIG_SYS_SATA2_FLAGS	/;"	d	file:
CONFIG_SYS_SATA2_FLAGS	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/P1022DS.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/cyrus.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_FLAGS	include/configs/t4qds.h	/^#define CONFIG_SYS_SATA2_FLAGS	/;"	d
CONFIG_SYS_SATA2_OFFSET	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA2_OFFSET	/;"	d
CONFIG_SYS_SATA2_OFFSET	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA2_OFFSET	/;"	d
CONFIG_SYS_SATA2_OFFSET	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA2_OFFSET	/;"	d
CONFIG_SYS_SATA_FAT_BOOT_PARTITION	include/configs/cm_t54.h	/^#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION	/;"	d
CONFIG_SYS_SATA_FAT_BOOT_PARTITION	include/configs/imx6_spl.h	/^#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE /;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/P1022DS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/P4080DS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE /;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/UCP1020.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/bf548-ezkit.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE /;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/canyonlands.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/cyrus.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/gw_ventana.h	/^  #define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/m53evk.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/mx53loco.h	/^	#define CONFIG_SYS_SATA_MAX_DEVICE /;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/novena.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/ot1200.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/p1_twr.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/sandbox.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/t4qds.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/tbs2910.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/theadorable.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/udoo.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SATA_MAX_DEVICE	include/configs/wandboard.h	/^#define CONFIG_SYS_SATA_MAX_DEVICE	/;"	d
CONFIG_SYS_SBFHDR_DATA_OFFSET	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SBFHDR_DATA_OFFSET	/;"	d
CONFIG_SYS_SBFHDR_DATA_OFFSET	include/configs/M54418TWR.h	/^#define CONFIG_SYS_SBFHDR_DATA_OFFSET	/;"	d
CONFIG_SYS_SBFHDR_DATA_OFFSET	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SBFHDR_DATA_OFFSET	/;"	d
CONFIG_SYS_SBFHDR_DATA_OFFSET	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SBFHDR_DATA_OFFSET	/;"	d
CONFIG_SYS_SBFHDR_SIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SBFHDR_SIZE	/;"	d
CONFIG_SYS_SBFHDR_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_SBFHDR_SIZE	/;"	d
CONFIG_SYS_SBFHDR_SIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SBFHDR_SIZE	/;"	d
CONFIG_SYS_SBFHDR_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SBFHDR_SIZE	/;"	d
CONFIG_SYS_SCCR	include/configs/PATI.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM823L.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM823M.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM850L.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM850M.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM855L.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM855M.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM860L.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM860M.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM862L.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM862M.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM866M.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/TQM885D.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR	include/configs/km82xx.h	/^#define CONFIG_SYS_SCCR	/;"	d
CONFIG_SYS_SCCR_PCIEXP1CM	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_SCCR_PCIEXP1CM	/;"	d
CONFIG_SYS_SCCR_PCIEXP1CM	include/configs/hrcon.h	/^#define CONFIG_SYS_SCCR_PCIEXP1CM	/;"	d
CONFIG_SYS_SCCR_PCIEXP1CM	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_SCCR_PCIEXP1CM	/;"	d
CONFIG_SYS_SCCR_PCIEXP1CM	include/configs/strider.h	/^#define CONFIG_SYS_SCCR_PCIEXP1CM	/;"	d
CONFIG_SYS_SCCR_SATACM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SCCR_SATACM	/;"	d
CONFIG_SYS_SCCR_SATACM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SCCR_SATACM	/;"	d
CONFIG_SYS_SCCR_TSEC1CM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SCCR_TSEC1CM	/;"	d
CONFIG_SYS_SCCR_TSEC1CM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SCCR_TSEC1CM	/;"	d
CONFIG_SYS_SCCR_TSEC1CM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SCCR_TSEC1CM	/;"	d
CONFIG_SYS_SCCR_TSEC1CM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SCCR_TSEC1CM	/;"	d
CONFIG_SYS_SCCR_TSEC2CM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SCCR_TSEC2CM	/;"	d
CONFIG_SYS_SCCR_TSEC2CM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SCCR_TSEC2CM	/;"	d
CONFIG_SYS_SCCR_TSEC2CM	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SCCR_TSEC2CM	/;"	d
CONFIG_SYS_SCCR_TSEC2CM	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SCCR_TSEC2CM	/;"	d
CONFIG_SYS_SCCR_USBDRCM	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SCCR_USBDRCM	/;"	d
CONFIG_SYS_SCCR_USBDRCM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SCCR_USBDRCM	/;"	d
CONFIG_SYS_SCCR_USBDRCM	include/configs/ids8313.h	/^#define CONFIG_SYS_SCCR_USBDRCM	/;"	d
CONFIG_SYS_SCCR_USBMPHCM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SCCR_USBMPHCM /;"	d
CONFIG_SYS_SCC_TOUT_LOOP	arch/powerpc/cpu/mpc8260/ether_scc.c	/^  #define CONFIG_SYS_SCC_TOUT_LOOP /;"	d	file:
CONFIG_SYS_SCC_TOUT_LOOP	include/configs/km82xx.h	/^#define CONFIG_SYS_SCC_TOUT_LOOP	/;"	d
CONFIG_SYS_SCR	include/configs/M5272C3.h	/^#define CONFIG_SYS_SCR	/;"	d
CONFIG_SYS_SCR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_SCR	/;"	d
CONFIG_SYS_SCR	include/configs/cobra5272.h	/^#define CONFIG_SYS_SCR	/;"	d
CONFIG_SYS_SCRATCH_VA	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SCRATCH_VA	/;"	d
CONFIG_SYS_SCRATCH_VA	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SCRATCH_VA	/;"	d
CONFIG_SYS_SCRATCH_VA	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SCRATCH_VA	/;"	d
CONFIG_SYS_SCRATCH_VA	include/configs/xpedite517x.h	/^#define CONFIG_SYS_SCRATCH_VA	/;"	d
CONFIG_SYS_SCSI_MAXDEVICE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_SCSI_MAXDEVICE	/;"	d
CONFIG_SYS_SCSI_MAXDEVICE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SCSI_MAXDEVICE	/;"	d
CONFIG_SYS_SCSI_MAXDEVICE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SCSI_MAXDEVICE	/;"	d
CONFIG_SYS_SCSI_MAXDEVICE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SCSI_MAXDEVICE	/;"	d
CONFIG_SYS_SCSI_MAXDEVICE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SCSI_MAXDEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/PIP405.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/cm_t54.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/highbank.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/sandbox.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/x86-common.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_DEVICE	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_SCSI_MAX_DEVICE	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/PIP405.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/cm_t54.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/highbank.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/sandbox.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/sunxi-common.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/x86-common.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_LUN	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_SCSI_MAX_LUN	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/PIP405.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/cm_t54.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/highbank.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/sandbox.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/sunxi-common.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/x86-common.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_MAX_SCSI_ID	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_SCSI_MAX_SCSI_ID	/;"	d
CONFIG_SYS_SCSI_SPIN_UP_TIME	include/configs/PIP405.h	/^#define CONFIG_SYS_SCSI_SPIN_UP_TIME	/;"	d
CONFIG_SYS_SDHC_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_SDHC_CLK	/;"	d
CONFIG_SYS_SDHC_CLK_2_PLL	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_SDHC_CLK_2_PLL	/;"	d
CONFIG_SYS_SDIO0	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO0 /;"	d
CONFIG_SYS_SDIO0	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO0 /;"	d
CONFIG_SYS_SDIO0_MAX_CLK	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO0_MAX_CLK /;"	d
CONFIG_SYS_SDIO0_MAX_CLK	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO0_MAX_CLK /;"	d
CONFIG_SYS_SDIO1	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO1 /;"	d
CONFIG_SYS_SDIO1	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO1 /;"	d
CONFIG_SYS_SDIO1_MAX_CLK	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO1_MAX_CLK /;"	d
CONFIG_SYS_SDIO1_MAX_CLK	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO1_MAX_CLK /;"	d
CONFIG_SYS_SDIO2	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO2 /;"	d
CONFIG_SYS_SDIO2	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO2 /;"	d
CONFIG_SYS_SDIO2_MAX_CLK	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO2_MAX_CLK /;"	d
CONFIG_SYS_SDIO2_MAX_CLK	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO2_MAX_CLK /;"	d
CONFIG_SYS_SDIO3	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO3 /;"	d
CONFIG_SYS_SDIO3	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO3 /;"	d
CONFIG_SYS_SDIO3_MAX_CLK	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO3_MAX_CLK /;"	d
CONFIG_SYS_SDIO3_MAX_CLK	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO3_MAX_CLK /;"	d
CONFIG_SYS_SDIO_BASE0	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO_BASE0 /;"	d
CONFIG_SYS_SDIO_BASE0	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO_BASE0 /;"	d
CONFIG_SYS_SDIO_BASE1	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO_BASE1 /;"	d
CONFIG_SYS_SDIO_BASE1	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO_BASE1 /;"	d
CONFIG_SYS_SDIO_BASE2	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO_BASE2 /;"	d
CONFIG_SYS_SDIO_BASE2	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO_BASE2 /;"	d
CONFIG_SYS_SDIO_BASE3	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDIO_BASE3 /;"	d
CONFIG_SYS_SDIO_BASE3	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDIO_BASE3 /;"	d
CONFIG_SYS_SDRAM	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRAM	/;"	d
CONFIG_SYS_SDRAM0_CFG0	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define CONFIG_SYS_SDRAM0_CFG0	/;"	d	file:
CONFIG_SYS_SDRAM0_CFG0	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_SDRAM0_CFG0	/;"	d
CONFIG_SYS_SDRAM0_CLKTR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_CLKTR	/;"	d
CONFIG_SYS_SDRAM0_CLKTR	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_CLKTR	/;"	d
CONFIG_SYS_SDRAM0_CLKTR	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_CLKTR	/;"	d
CONFIG_SYS_SDRAM0_CLKTR	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_CLKTR	/;"	d
CONFIG_SYS_SDRAM0_CLKTR	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_CLKTR	/;"	d
CONFIG_SYS_SDRAM0_CLKTR	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_CLKTR	/;"	d
CONFIG_SYS_SDRAM0_CODT	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_CODT	/;"	d
CONFIG_SYS_SDRAM0_CODT	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_CODT	/;"	d
CONFIG_SYS_SDRAM0_CODT	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_CODT	/;"	d
CONFIG_SYS_SDRAM0_CODT	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_CODT	/;"	d
CONFIG_SYS_SDRAM0_CODT	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_CODT	/;"	d
CONFIG_SYS_SDRAM0_CODT	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_CODT	/;"	d
CONFIG_SYS_SDRAM0_DLCR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_DLCR	/;"	d
CONFIG_SYS_SDRAM0_DLCR	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_DLCR	/;"	d
CONFIG_SYS_SDRAM0_DLCR	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_DLCR	/;"	d
CONFIG_SYS_SDRAM0_DLCR	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_DLCR	/;"	d
CONFIG_SYS_SDRAM0_DLCR	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_DLCR	/;"	d
CONFIG_SYS_SDRAM0_DLCR	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_DLCR	/;"	d
CONFIG_SYS_SDRAM0_INITPLR0	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR0	/;"	d
CONFIG_SYS_SDRAM0_INITPLR0	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR0	/;"	d
CONFIG_SYS_SDRAM0_INITPLR0	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR0	/;"	d
CONFIG_SYS_SDRAM0_INITPLR0	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR0	/;"	d
CONFIG_SYS_SDRAM0_INITPLR0	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR0	/;"	d
CONFIG_SYS_SDRAM0_INITPLR0	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR0	/;"	d
CONFIG_SYS_SDRAM0_INITPLR1	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR1	/;"	d
CONFIG_SYS_SDRAM0_INITPLR1	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR1	/;"	d
CONFIG_SYS_SDRAM0_INITPLR1	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR1	/;"	d
CONFIG_SYS_SDRAM0_INITPLR1	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR1	/;"	d
CONFIG_SYS_SDRAM0_INITPLR1	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR1	/;"	d
CONFIG_SYS_SDRAM0_INITPLR1	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR1	/;"	d
CONFIG_SYS_SDRAM0_INITPLR10	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR10	/;"	d
CONFIG_SYS_SDRAM0_INITPLR10	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR10	/;"	d
CONFIG_SYS_SDRAM0_INITPLR10	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR10	/;"	d
CONFIG_SYS_SDRAM0_INITPLR10	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR10	/;"	d
CONFIG_SYS_SDRAM0_INITPLR10	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR10	/;"	d
CONFIG_SYS_SDRAM0_INITPLR10	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR10	/;"	d
CONFIG_SYS_SDRAM0_INITPLR11	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR11	/;"	d
CONFIG_SYS_SDRAM0_INITPLR11	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR11	/;"	d
CONFIG_SYS_SDRAM0_INITPLR11	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR11	/;"	d
CONFIG_SYS_SDRAM0_INITPLR11	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR11	/;"	d
CONFIG_SYS_SDRAM0_INITPLR11	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR11	/;"	d
CONFIG_SYS_SDRAM0_INITPLR11	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR11	/;"	d
CONFIG_SYS_SDRAM0_INITPLR12	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR12	/;"	d
CONFIG_SYS_SDRAM0_INITPLR12	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR12	/;"	d
CONFIG_SYS_SDRAM0_INITPLR12	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR12	/;"	d
CONFIG_SYS_SDRAM0_INITPLR12	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR12	/;"	d
CONFIG_SYS_SDRAM0_INITPLR12	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR12	/;"	d
CONFIG_SYS_SDRAM0_INITPLR12	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR12	/;"	d
CONFIG_SYS_SDRAM0_INITPLR13	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR13	/;"	d
CONFIG_SYS_SDRAM0_INITPLR13	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR13	/;"	d
CONFIG_SYS_SDRAM0_INITPLR13	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR13	/;"	d
CONFIG_SYS_SDRAM0_INITPLR13	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR13	/;"	d
CONFIG_SYS_SDRAM0_INITPLR13	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR13	/;"	d
CONFIG_SYS_SDRAM0_INITPLR13	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR13	/;"	d
CONFIG_SYS_SDRAM0_INITPLR14	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR14	/;"	d
CONFIG_SYS_SDRAM0_INITPLR14	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR14	/;"	d
CONFIG_SYS_SDRAM0_INITPLR14	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR14	/;"	d
CONFIG_SYS_SDRAM0_INITPLR14	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR14	/;"	d
CONFIG_SYS_SDRAM0_INITPLR14	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR14	/;"	d
CONFIG_SYS_SDRAM0_INITPLR14	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR14	/;"	d
CONFIG_SYS_SDRAM0_INITPLR15	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR15	/;"	d
CONFIG_SYS_SDRAM0_INITPLR15	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR15	/;"	d
CONFIG_SYS_SDRAM0_INITPLR15	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR15	/;"	d
CONFIG_SYS_SDRAM0_INITPLR15	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR15	/;"	d
CONFIG_SYS_SDRAM0_INITPLR15	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR15	/;"	d
CONFIG_SYS_SDRAM0_INITPLR15	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR15	/;"	d
CONFIG_SYS_SDRAM0_INITPLR2	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR2	/;"	d
CONFIG_SYS_SDRAM0_INITPLR2	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR2	/;"	d
CONFIG_SYS_SDRAM0_INITPLR2	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR2	/;"	d
CONFIG_SYS_SDRAM0_INITPLR2	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR2	/;"	d
CONFIG_SYS_SDRAM0_INITPLR2	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR2	/;"	d
CONFIG_SYS_SDRAM0_INITPLR2	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR2	/;"	d
CONFIG_SYS_SDRAM0_INITPLR3	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR3	/;"	d
CONFIG_SYS_SDRAM0_INITPLR3	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR3	/;"	d
CONFIG_SYS_SDRAM0_INITPLR3	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR3	/;"	d
CONFIG_SYS_SDRAM0_INITPLR3	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR3	/;"	d
CONFIG_SYS_SDRAM0_INITPLR3	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR3	/;"	d
CONFIG_SYS_SDRAM0_INITPLR3	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR3	/;"	d
CONFIG_SYS_SDRAM0_INITPLR4	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR4	/;"	d
CONFIG_SYS_SDRAM0_INITPLR4	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR4	/;"	d
CONFIG_SYS_SDRAM0_INITPLR4	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR4	/;"	d
CONFIG_SYS_SDRAM0_INITPLR4	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR4	/;"	d
CONFIG_SYS_SDRAM0_INITPLR4	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR4	/;"	d
CONFIG_SYS_SDRAM0_INITPLR4	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR4	/;"	d
CONFIG_SYS_SDRAM0_INITPLR5	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR5	/;"	d
CONFIG_SYS_SDRAM0_INITPLR5	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR5	/;"	d
CONFIG_SYS_SDRAM0_INITPLR5	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR5	/;"	d
CONFIG_SYS_SDRAM0_INITPLR5	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR5	/;"	d
CONFIG_SYS_SDRAM0_INITPLR5	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR5	/;"	d
CONFIG_SYS_SDRAM0_INITPLR5	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR5	/;"	d
CONFIG_SYS_SDRAM0_INITPLR6	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR6	/;"	d
CONFIG_SYS_SDRAM0_INITPLR6	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR6	/;"	d
CONFIG_SYS_SDRAM0_INITPLR6	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR6	/;"	d
CONFIG_SYS_SDRAM0_INITPLR6	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR6	/;"	d
CONFIG_SYS_SDRAM0_INITPLR6	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR6	/;"	d
CONFIG_SYS_SDRAM0_INITPLR6	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR6	/;"	d
CONFIG_SYS_SDRAM0_INITPLR7	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR7	/;"	d
CONFIG_SYS_SDRAM0_INITPLR7	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR7	/;"	d
CONFIG_SYS_SDRAM0_INITPLR7	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR7	/;"	d
CONFIG_SYS_SDRAM0_INITPLR7	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR7	/;"	d
CONFIG_SYS_SDRAM0_INITPLR7	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR7	/;"	d
CONFIG_SYS_SDRAM0_INITPLR7	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR7	/;"	d
CONFIG_SYS_SDRAM0_INITPLR8	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR8	/;"	d
CONFIG_SYS_SDRAM0_INITPLR8	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR8	/;"	d
CONFIG_SYS_SDRAM0_INITPLR8	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR8	/;"	d
CONFIG_SYS_SDRAM0_INITPLR8	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR8	/;"	d
CONFIG_SYS_SDRAM0_INITPLR8	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR8	/;"	d
CONFIG_SYS_SDRAM0_INITPLR8	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR8	/;"	d
CONFIG_SYS_SDRAM0_INITPLR9	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_INITPLR9	/;"	d
CONFIG_SYS_SDRAM0_INITPLR9	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_INITPLR9	/;"	d
CONFIG_SYS_SDRAM0_INITPLR9	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_INITPLR9	/;"	d
CONFIG_SYS_SDRAM0_INITPLR9	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_INITPLR9	/;"	d
CONFIG_SYS_SDRAM0_INITPLR9	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_INITPLR9	/;"	d
CONFIG_SYS_SDRAM0_INITPLR9	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_INITPLR9	/;"	d
CONFIG_SYS_SDRAM0_MB0CF	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MB0CF	/;"	d
CONFIG_SYS_SDRAM0_MB0CF	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MB0CF	/;"	d
CONFIG_SYS_SDRAM0_MB0CF	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MB0CF	/;"	d
CONFIG_SYS_SDRAM0_MB0CF	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MB0CF	/;"	d
CONFIG_SYS_SDRAM0_MB0CF	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MB0CF	/;"	d
CONFIG_SYS_SDRAM0_MB0CF	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MB0CF	/;"	d
CONFIG_SYS_SDRAM0_MB0CF_BASE	include/configs/io64.h	/^#define	CONFIG_SYS_SDRAM0_MB0CF_BASE	/;"	d
CONFIG_SYS_SDRAM0_MB0CF_BASE	include/configs/kilauea.h	/^#define	CONFIG_SYS_SDRAM0_MB0CF_BASE	/;"	d
CONFIG_SYS_SDRAM0_MB0CF_BASE	include/configs/makalu.h	/^#define	CONFIG_SYS_SDRAM0_MB0CF_BASE	/;"	d
CONFIG_SYS_SDRAM0_MB1CF	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MB1CF	/;"	d
CONFIG_SYS_SDRAM0_MB1CF	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MB1CF	/;"	d
CONFIG_SYS_SDRAM0_MB1CF	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MB1CF	/;"	d
CONFIG_SYS_SDRAM0_MB1CF	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MB1CF	/;"	d
CONFIG_SYS_SDRAM0_MB1CF	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MB1CF	/;"	d
CONFIG_SYS_SDRAM0_MB1CF	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MB1CF	/;"	d
CONFIG_SYS_SDRAM0_MB1CF_BASE	include/configs/makalu.h	/^#define	CONFIG_SYS_SDRAM0_MB1CF_BASE	/;"	d
CONFIG_SYS_SDRAM0_MB2CF	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MB2CF	/;"	d
CONFIG_SYS_SDRAM0_MB2CF	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MB2CF	/;"	d
CONFIG_SYS_SDRAM0_MB2CF	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MB2CF	/;"	d
CONFIG_SYS_SDRAM0_MB2CF	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MB2CF	/;"	d
CONFIG_SYS_SDRAM0_MB2CF	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MB2CF	/;"	d
CONFIG_SYS_SDRAM0_MB2CF	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MB2CF	/;"	d
CONFIG_SYS_SDRAM0_MB3CF	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MB3CF	/;"	d
CONFIG_SYS_SDRAM0_MB3CF	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MB3CF	/;"	d
CONFIG_SYS_SDRAM0_MB3CF	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MB3CF	/;"	d
CONFIG_SYS_SDRAM0_MB3CF	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MB3CF	/;"	d
CONFIG_SYS_SDRAM0_MB3CF	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MB3CF	/;"	d
CONFIG_SYS_SDRAM0_MB3CF	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MB3CF	/;"	d
CONFIG_SYS_SDRAM0_MCOPT1	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MCOPT1	/;"	d
CONFIG_SYS_SDRAM0_MCOPT1	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MCOPT1	/;"	d
CONFIG_SYS_SDRAM0_MCOPT1	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MCOPT1	/;"	d
CONFIG_SYS_SDRAM0_MCOPT1	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MCOPT1	/;"	d
CONFIG_SYS_SDRAM0_MCOPT1	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MCOPT1	/;"	d
CONFIG_SYS_SDRAM0_MCOPT1	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MCOPT1	/;"	d
CONFIG_SYS_SDRAM0_MCOPT2	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MCOPT2	/;"	d
CONFIG_SYS_SDRAM0_MCOPT2	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MCOPT2	/;"	d
CONFIG_SYS_SDRAM0_MCOPT2	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MCOPT2	/;"	d
CONFIG_SYS_SDRAM0_MCOPT2	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MCOPT2	/;"	d
CONFIG_SYS_SDRAM0_MCOPT2	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MCOPT2	/;"	d
CONFIG_SYS_SDRAM0_MCOPT2	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MCOPT2	/;"	d
CONFIG_SYS_SDRAM0_MEMODE	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MEMODE	/;"	d
CONFIG_SYS_SDRAM0_MEMODE	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MEMODE	/;"	d
CONFIG_SYS_SDRAM0_MEMODE	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MEMODE	/;"	d
CONFIG_SYS_SDRAM0_MEMODE	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MEMODE	/;"	d
CONFIG_SYS_SDRAM0_MEMODE	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MEMODE	/;"	d
CONFIG_SYS_SDRAM0_MEMODE	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MEMODE	/;"	d
CONFIG_SYS_SDRAM0_MMODE	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MMODE	/;"	d
CONFIG_SYS_SDRAM0_MMODE	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MMODE	/;"	d
CONFIG_SYS_SDRAM0_MMODE	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MMODE	/;"	d
CONFIG_SYS_SDRAM0_MMODE	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MMODE	/;"	d
CONFIG_SYS_SDRAM0_MMODE	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MMODE	/;"	d
CONFIG_SYS_SDRAM0_MMODE	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MMODE	/;"	d
CONFIG_SYS_SDRAM0_MODT0	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MODT0	/;"	d
CONFIG_SYS_SDRAM0_MODT0	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MODT0	/;"	d
CONFIG_SYS_SDRAM0_MODT0	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MODT0	/;"	d
CONFIG_SYS_SDRAM0_MODT0	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MODT0	/;"	d
CONFIG_SYS_SDRAM0_MODT0	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MODT0	/;"	d
CONFIG_SYS_SDRAM0_MODT0	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MODT0	/;"	d
CONFIG_SYS_SDRAM0_MODT1	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MODT1	/;"	d
CONFIG_SYS_SDRAM0_MODT1	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MODT1	/;"	d
CONFIG_SYS_SDRAM0_MODT1	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_MODT1	/;"	d
CONFIG_SYS_SDRAM0_MODT1	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_MODT1	/;"	d
CONFIG_SYS_SDRAM0_MODT1	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_MODT1	/;"	d
CONFIG_SYS_SDRAM0_MODT1	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MODT1	/;"	d
CONFIG_SYS_SDRAM0_MODT2	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MODT2	/;"	d
CONFIG_SYS_SDRAM0_MODT2	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MODT2	/;"	d
CONFIG_SYS_SDRAM0_MODT2	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MODT2	/;"	d
CONFIG_SYS_SDRAM0_MODT3	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_MODT3	/;"	d
CONFIG_SYS_SDRAM0_MODT3	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_MODT3	/;"	d
CONFIG_SYS_SDRAM0_MODT3	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_MODT3	/;"	d
CONFIG_SYS_SDRAM0_RDCC	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_RDCC	/;"	d
CONFIG_SYS_SDRAM0_RDCC	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_RDCC	/;"	d
CONFIG_SYS_SDRAM0_RDCC	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_RDCC	/;"	d
CONFIG_SYS_SDRAM0_RDCC	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_RDCC	/;"	d
CONFIG_SYS_SDRAM0_RDCC	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_RDCC	/;"	d
CONFIG_SYS_SDRAM0_RDCC	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_RDCC	/;"	d
CONFIG_SYS_SDRAM0_RFDC	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_RFDC	/;"	d
CONFIG_SYS_SDRAM0_RFDC	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_RFDC	/;"	d
CONFIG_SYS_SDRAM0_RFDC	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_RFDC	/;"	d
CONFIG_SYS_SDRAM0_RFDC	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_RFDC	/;"	d
CONFIG_SYS_SDRAM0_RFDC	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_RFDC	/;"	d
CONFIG_SYS_SDRAM0_RFDC	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_RFDC	/;"	d
CONFIG_SYS_SDRAM0_RQDC	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_RQDC	/;"	d
CONFIG_SYS_SDRAM0_RQDC	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_RQDC	/;"	d
CONFIG_SYS_SDRAM0_RQDC	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_RQDC	/;"	d
CONFIG_SYS_SDRAM0_RQDC	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_RQDC	/;"	d
CONFIG_SYS_SDRAM0_RQDC	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_RQDC	/;"	d
CONFIG_SYS_SDRAM0_RQDC	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_RQDC	/;"	d
CONFIG_SYS_SDRAM0_RTR	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define CONFIG_SYS_SDRAM0_RTR /;"	d	file:
CONFIG_SYS_SDRAM0_RTR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_RTR	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_RTR	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_RTR	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_RTR	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_RTR	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_RTR	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_RTR	/;"	d
CONFIG_SYS_SDRAM0_SDTR1	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_SDTR1	/;"	d
CONFIG_SYS_SDRAM0_SDTR1	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_SDTR1	/;"	d
CONFIG_SYS_SDRAM0_SDTR1	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_SDTR1	/;"	d
CONFIG_SYS_SDRAM0_SDTR1	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_SDTR1	/;"	d
CONFIG_SYS_SDRAM0_SDTR1	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_SDTR1	/;"	d
CONFIG_SYS_SDRAM0_SDTR1	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_SDTR1	/;"	d
CONFIG_SYS_SDRAM0_SDTR2	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_SDTR2	/;"	d
CONFIG_SYS_SDRAM0_SDTR2	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_SDTR2	/;"	d
CONFIG_SYS_SDRAM0_SDTR2	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_SDTR2	/;"	d
CONFIG_SYS_SDRAM0_SDTR2	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_SDTR2	/;"	d
CONFIG_SYS_SDRAM0_SDTR2	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_SDTR2	/;"	d
CONFIG_SYS_SDRAM0_SDTR2	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_SDTR2	/;"	d
CONFIG_SYS_SDRAM0_SDTR3	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_SDTR3	/;"	d
CONFIG_SYS_SDRAM0_SDTR3	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_SDTR3	/;"	d
CONFIG_SYS_SDRAM0_SDTR3	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_SDTR3	/;"	d
CONFIG_SYS_SDRAM0_SDTR3	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_SDTR3	/;"	d
CONFIG_SYS_SDRAM0_SDTR3	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_SDTR3	/;"	d
CONFIG_SYS_SDRAM0_SDTR3	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_SDTR3	/;"	d
CONFIG_SYS_SDRAM0_TR0	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define	CONFIG_SYS_SDRAM0_TR0	/;"	d	file:
CONFIG_SYS_SDRAM0_TR0	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_SDRAM0_TR0	/;"	d
CONFIG_SYS_SDRAM0_WDDCTR	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define CONFIG_SYS_SDRAM0_WDDCTR	/;"	d	file:
CONFIG_SYS_SDRAM0_WDDCTR	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_SDRAM0_WDDCTR	/;"	d
CONFIG_SYS_SDRAM0_WRDTR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM0_WRDTR	/;"	d
CONFIG_SYS_SDRAM0_WRDTR	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM0_WRDTR	/;"	d
CONFIG_SYS_SDRAM0_WRDTR	include/configs/io64.h	/^#define CONFIG_SYS_SDRAM0_WRDTR	/;"	d
CONFIG_SYS_SDRAM0_WRDTR	include/configs/kilauea.h	/^#define CONFIG_SYS_SDRAM0_WRDTR	/;"	d
CONFIG_SYS_SDRAM0_WRDTR	include/configs/makalu.h	/^#define CONFIG_SYS_SDRAM0_WRDTR	/;"	d
CONFIG_SYS_SDRAM0_WRDTR	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM0_WRDTR	/;"	d
CONFIG_SYS_SDRAM1	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRAM1	/;"	d
CONFIG_SYS_SDRAM_BANKS	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_SDRAM_BANKS	/;"	d
CONFIG_SYS_SDRAM_BANKS	include/configs/yosemite.h	/^#define CONFIG_SYS_SDRAM_BANKS	/;"	d
CONFIG_SYS_SDRAM_BASE	arch/arm/include/asm/iproc-common/configs.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	arch/blackfin/include/asm/config.h	/^# define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/autoconf.mk	/^CONFIG_SYS_SDRAM_BASE=0x40000000$/;"	m
CONFIG_SYS_SDRAM_BASE	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/CPCI4052.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5272C3.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5282EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MIP405.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8541CDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8555CDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/MigoR.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/P1022DS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/PATI.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/PIP405.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/PLU405.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/PMC405DE.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM5200.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM823L.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM823M.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM834x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM850L.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM850M.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM855L.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM855M.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM860L.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM860M.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM862L.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM862M.h	/^#define	CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM866M.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/TQM885D.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/UCP1020.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/VCMA9.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/VOM405.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/a3m071.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/a4m072.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ac14xx.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/amcc-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/amcore.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ap121.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ap143.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/apf27.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/apx4devkit.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/aria.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/atngw100.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/atstk1002.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/axs10x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/bg0900.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/boston.h	/^# define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/calimain.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/canmb.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cm5200.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cm_fx6.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cm_t35.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cobra5272.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/corvus.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/da850evm.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/dbau1x00.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/devkit3250.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ea20.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ecovec.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/edb93xx.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/edminiv2.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/el6x_common.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/embestmx6boards.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/espresso7420.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/espt.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ethernut5.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/exynos5250-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/flea3.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/grasshopper.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/gw_ventana.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/h2200.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/highbank.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/hikey.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/hrcon.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ids8313.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/imx6qdl_icore.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/inka4x0.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/integrator-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ipam390.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ipek01.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/jupiter.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/kc1.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/km/km_arm.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/km82xx.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/kzm9g.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/legoev3.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/m28evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/m53evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/malta.h	/^# define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mcx.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/meesc.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/motionpro.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mpr2.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ms7720se.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ms7722se.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ms7750se.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/munices.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mv-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx23_olinuxino.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx23evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx28evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx31ads.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx51evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx53ard.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx53evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx53loco.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx53smd.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6qarm2.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6sabre_common.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6slevk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6sxsabreauto.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6sxsabresd.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx6ullevk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/mx7dsabresd.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/novena.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/nsim.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/odroid.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/odroid_xu3.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/origen.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ot1200.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/p1_twr.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pb1x00.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pcm030.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pcm052.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pcm058.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/peach-pi.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/peach-pit.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pico-imx6ul.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/picosam9g45.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/platinum.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/pm9g45.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/qemu-mips.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/qemu-mips64.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/r0p7734.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/r2dplus.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/r7780mp.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rk3036_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rk3288_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rk3399_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rpi.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rsk7203.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rsk7264.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/rsk7269.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sandbox.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sansa_fuze_plus.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sbc8349.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sc_sps_1.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/secomx6quq7.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/shmin.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/smartweb.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/smdk2410.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/smdk5420.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/smdkc100.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/smdkv310.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/snapper9260.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sniper.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/socrates.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/strider.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/stv0991.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/t4qds.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tao3530.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/taurus.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tb100.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tbs2910.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tegra-common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/titanium.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tplink_wdr4300.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tqma6.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/trats.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/trats2.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/tricorder.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ts4800.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/udoo.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/usbarmory.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/v38b.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/vct.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/vf610twr.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/vinco.h	/^#define CONFIG_SYS_SDRAM_BASE /;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/wandboard.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/warp.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/warp7.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/woodburn_common.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/work_92105.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/x600.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xfi3.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xilinx-ppc.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xpedite1000.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xpedite517x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xpress.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/xtfpga.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/zipitz2.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	include/configs/zmx25.h	/^#define CONFIG_SYS_SDRAM_BASE	/;"	d
CONFIG_SYS_SDRAM_BASE	spl/include/autoconf.mk	/^CONFIG_SYS_SDRAM_BASE=0x40000000$/;"	m
CONFIG_SYS_SDRAM_BASE0	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_SDRAM_BASE0	/;"	d
CONFIG_SYS_SDRAM_BASE1	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_BASE1	/;"	d
CONFIG_SYS_SDRAM_BASE2	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_SDRAM_BASE2	/;"	d
CONFIG_SYS_SDRAM_BASE2	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SDRAM_BASE2	/;"	d
CONFIG_SYS_SDRAM_CASL	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define CONFIG_SYS_SDRAM_CASL	/;"	d
CONFIG_SYS_SDRAM_CFG	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_SDRAM_CFG	/;"	d
CONFIG_SYS_SDRAM_CFG	include/configs/ids8313.h	/^#define CONFIG_SYS_SDRAM_CFG	/;"	d
CONFIG_SYS_SDRAM_CFG	include/configs/ve8313.h	/^#define CONFIG_SYS_SDRAM_CFG	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG1	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_CFG1	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/ids8313.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CFG2	include/configs/ve8313.h	/^#define CONFIG_SYS_SDRAM_CFG2	/;"	d
CONFIG_SYS_SDRAM_CL	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SDRAM_CL /;"	d
CONFIG_SYS_SDRAM_CL	include/configs/dlvision.h	/^#define CONFIG_SYS_SDRAM_CL /;"	d
CONFIG_SYS_SDRAM_CL	include/configs/io.h	/^#define CONFIG_SYS_SDRAM_CL /;"	d
CONFIG_SYS_SDRAM_CL	include/configs/iocon.h	/^#define CONFIG_SYS_SDRAM_CL /;"	d
CONFIG_SYS_SDRAM_CL	include/configs/neo.h	/^#define CONFIG_SYS_SDRAM_CL /;"	d
CONFIG_SYS_SDRAM_CONF1HB	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_CONF1HB	/;"	d
CONFIG_SYS_SDRAM_CONF1HB	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_CONF1HB	/;"	d
CONFIG_SYS_SDRAM_CONF1HB	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_CONF1HB	/;"	d
CONFIG_SYS_SDRAM_CONF1LL	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_CONF1LL	/;"	d
CONFIG_SYS_SDRAM_CONF1LL	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_CONF1LL	/;"	d
CONFIG_SYS_SDRAM_CONF1LL	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_CONF1LL	/;"	d
CONFIG_SYS_SDRAM_CONFPATHB	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_CONFPATHB	/;"	d
CONFIG_SYS_SDRAM_CONFPATHB	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_CONFPATHB	/;"	d
CONFIG_SYS_SDRAM_CONFPATHB	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_CONFPATHB	/;"	d
CONFIG_SYS_SDRAM_CS1	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_SDRAM_CS1	/;"	d
CONFIG_SYS_SDRAM_CTP	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define CONFIG_SYS_SDRAM_CTP	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_CTRL	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_CTRL	/;"	d
CONFIG_SYS_SDRAM_DRVSTRENGTH	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_DRVSTRENGTH	/;"	d
CONFIG_SYS_SDRAM_DRVSTRENGTH	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_DRVSTRENGTH	/;"	d
CONFIG_SYS_SDRAM_DRV_STRENGTH	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_DRV_STRENGTH	/;"	d
CONFIG_SYS_SDRAM_DRV_STRENGTH	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_DRV_STRENGTH	/;"	d
CONFIG_SYS_SDRAM_DRV_STRENGTH	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_DRV_STRENGTH	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_EMOD	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_EMOD	/;"	d
CONFIG_SYS_SDRAM_END	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_SDRAM_END	/;"	d
CONFIG_SYS_SDRAM_END	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_SDRAM_END	/;"	d
CONFIG_SYS_SDRAM_END	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_SDRAM_END	/;"	d
CONFIG_SYS_SDRAM_END	include/configs/grsim.h	/^#define CONFIG_SYS_SDRAM_END	/;"	d
CONFIG_SYS_SDRAM_END	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_SDRAM_END	/;"	d
CONFIG_SYS_SDRAM_LDF	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define CONFIG_SYS_SDRAM_LDF	/;"	d
CONFIG_SYS_SDRAM_LIST	include/configs/km82xx.h	/^#define CONFIG_SYS_SDRAM_LIST	/;"	d
CONFIG_SYS_SDRAM_LOWER	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SDRAM_LOWER	/;"	d
CONFIG_SYS_SDRAM_LOWER	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SDRAM_LOWER	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M5475EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_MODE	include/configs/M5485EVB.h	/^#define CONFIG_SYS_SDRAM_MODE	/;"	d
CONFIG_SYS_SDRAM_PLBADDUHB	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_PLBADDUHB	/;"	d
CONFIG_SYS_SDRAM_PLBADDUHB	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_PLBADDUHB	/;"	d
CONFIG_SYS_SDRAM_PLBADDUHB	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_PLBADDUHB	/;"	d
CONFIG_SYS_SDRAM_PLBADDULL	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_PLBADDULL	/;"	d
CONFIG_SYS_SDRAM_PLBADDULL	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_PLBADDULL	/;"	d
CONFIG_SYS_SDRAM_PLBADDULL	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_PLBADDULL	/;"	d
CONFIG_SYS_SDRAM_PTA	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define CONFIG_SYS_SDRAM_PTA	/;"	d
CONFIG_SYS_SDRAM_R0BAS	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_R0BAS	/;"	d
CONFIG_SYS_SDRAM_R0BAS	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_R0BAS	/;"	d
CONFIG_SYS_SDRAM_R0BAS	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_R0BAS	/;"	d
CONFIG_SYS_SDRAM_R1BAS	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_R1BAS	/;"	d
CONFIG_SYS_SDRAM_R1BAS	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_R1BAS	/;"	d
CONFIG_SYS_SDRAM_R1BAS	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_R1BAS	/;"	d
CONFIG_SYS_SDRAM_R2BAS	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_R2BAS	/;"	d
CONFIG_SYS_SDRAM_R2BAS	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_R2BAS	/;"	d
CONFIG_SYS_SDRAM_R2BAS	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_R2BAS	/;"	d
CONFIG_SYS_SDRAM_R3BAS	include/configs/canyonlands.h	/^#define CONFIG_SYS_SDRAM_R3BAS	/;"	d
CONFIG_SYS_SDRAM_R3BAS	include/configs/intip.h	/^#define CONFIG_SYS_SDRAM_R3BAS	/;"	d
CONFIG_SYS_SDRAM_R3BAS	include/configs/t3corp.h	/^#define CONFIG_SYS_SDRAM_R3BAS	/;"	d
CONFIG_SYS_SDRAM_RCD	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define CONFIG_SYS_SDRAM_RCD	/;"	d
CONFIG_SYS_SDRAM_RFTA	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define CONFIG_SYS_SDRAM_RFTA	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/10m50_devboard.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/3c120_devboard.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5235EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5249EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5272C3.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5275EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5282EVB.h	/^#define	CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M54418TWR.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M54455EVB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8540ADS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8560ADS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SDRAM_SIZE /;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/MigoR.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SDRAM_SIZE /;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/UCP1020.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/amcore.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/axs10x.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/cobra5272.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_SDRAM_SIZE /;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/corvus.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/cyrus.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/devkit3250.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ecovec.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/espt.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ethernut5.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/grsim.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/h2200.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/imgtec_xilfpga.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/kzm9g.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ls1012afrdm.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/meesc.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/mpr2.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ms7720se.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ms7722se.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/ms7750se.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/nsim.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/p1_twr.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/r0p7734.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/r2dplus.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/r7780mp.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/rpi.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/rsk7203.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/rsk7264.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/rsk7269.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sandbox.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sbc8548.h	/^	#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sbc8641d.h	/^    #define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/shmin.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/snapper9260.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/tb100.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/vinco.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/work_92105.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_SDRAM_SIZE	/;"	d
CONFIG_SYS_SDRAM_SIZE0	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_SDRAM_SIZE0	/;"	d
CONFIG_SYS_SDRAM_SIZE_LAW	include/configs/P1022DS.h	/^#define CONFIG_SYS_SDRAM_SIZE_LAW	/;"	d
CONFIG_SYS_SDRAM_SIZE_LAW	include/configs/UCP1020.h	/^#define CONFIG_SYS_SDRAM_SIZE_LAW	/;"	d
CONFIG_SYS_SDRAM_SIZE_LAW	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SDRAM_SIZE_LAW	/;"	d
CONFIG_SYS_SDRAM_SIZE_LAW	include/configs/p1_twr.h	/^#define CONFIG_SYS_SDRAM_SIZE_LAW	/;"	d
CONFIG_SYS_SDRAM_SIZE_MB	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_SYS_SDRAM_SIZE_MB	/;"	d
CONFIG_SYS_SDRAM_SIZE_MB	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_SYS_SDRAM_SIZE_MB	/;"	d
CONFIG_SYS_SDRAM_UPPER	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SDRAM_UPPER	/;"	d
CONFIG_SYS_SDRAM_UPPER	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SDRAM_UPPER	/;"	d
CONFIG_SYS_SDRAM_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRAM_VAL	/;"	d
CONFIG_SYS_SDRAM_VAL1	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL1	/;"	d
CONFIG_SYS_SDRAM_VAL1	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL1	/;"	d
CONFIG_SYS_SDRAM_VAL1	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL1	/;"	d
CONFIG_SYS_SDRAM_VAL10	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL10	/;"	d
CONFIG_SYS_SDRAM_VAL10	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL10	/;"	d
CONFIG_SYS_SDRAM_VAL10	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL10	/;"	d
CONFIG_SYS_SDRAM_VAL11	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL11	/;"	d
CONFIG_SYS_SDRAM_VAL11	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL11	/;"	d
CONFIG_SYS_SDRAM_VAL11	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL11	/;"	d
CONFIG_SYS_SDRAM_VAL12	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL12	/;"	d
CONFIG_SYS_SDRAM_VAL12	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL12	/;"	d
CONFIG_SYS_SDRAM_VAL12	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL12	/;"	d
CONFIG_SYS_SDRAM_VAL2	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL2	/;"	d
CONFIG_SYS_SDRAM_VAL2	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL2	/;"	d
CONFIG_SYS_SDRAM_VAL2	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL2	/;"	d
CONFIG_SYS_SDRAM_VAL3	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL3	/;"	d
CONFIG_SYS_SDRAM_VAL3	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL3	/;"	d
CONFIG_SYS_SDRAM_VAL3	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL3	/;"	d
CONFIG_SYS_SDRAM_VAL4	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL4	/;"	d
CONFIG_SYS_SDRAM_VAL4	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL4	/;"	d
CONFIG_SYS_SDRAM_VAL4	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL4	/;"	d
CONFIG_SYS_SDRAM_VAL5	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL5	/;"	d
CONFIG_SYS_SDRAM_VAL5	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL5	/;"	d
CONFIG_SYS_SDRAM_VAL5	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL5	/;"	d
CONFIG_SYS_SDRAM_VAL6	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL6	/;"	d
CONFIG_SYS_SDRAM_VAL6	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL6	/;"	d
CONFIG_SYS_SDRAM_VAL6	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL6	/;"	d
CONFIG_SYS_SDRAM_VAL7	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL7	/;"	d
CONFIG_SYS_SDRAM_VAL7	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL7	/;"	d
CONFIG_SYS_SDRAM_VAL7	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL7	/;"	d
CONFIG_SYS_SDRAM_VAL8	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL8	/;"	d
CONFIG_SYS_SDRAM_VAL8	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL8	/;"	d
CONFIG_SYS_SDRAM_VAL8	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL8	/;"	d
CONFIG_SYS_SDRAM_VAL9	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRAM_VAL9	/;"	d
CONFIG_SYS_SDRAM_VAL9	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRAM_VAL9	/;"	d
CONFIG_SYS_SDRAM_VAL9	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRAM_VAL9	/;"	d
CONFIG_SYS_SDRAM_tRC	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SDRAM_tRC /;"	d
CONFIG_SYS_SDRAM_tRC	include/configs/dlvision.h	/^#define CONFIG_SYS_SDRAM_tRC /;"	d
CONFIG_SYS_SDRAM_tRC	include/configs/io.h	/^#define CONFIG_SYS_SDRAM_tRC /;"	d
CONFIG_SYS_SDRAM_tRC	include/configs/iocon.h	/^#define CONFIG_SYS_SDRAM_tRC /;"	d
CONFIG_SYS_SDRAM_tRC	include/configs/neo.h	/^#define CONFIG_SYS_SDRAM_tRC /;"	d
CONFIG_SYS_SDRAM_tRCD	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SDRAM_tRCD /;"	d
CONFIG_SYS_SDRAM_tRCD	include/configs/dlvision.h	/^#define CONFIG_SYS_SDRAM_tRCD /;"	d
CONFIG_SYS_SDRAM_tRCD	include/configs/io.h	/^#define CONFIG_SYS_SDRAM_tRCD /;"	d
CONFIG_SYS_SDRAM_tRCD	include/configs/iocon.h	/^#define CONFIG_SYS_SDRAM_tRCD /;"	d
CONFIG_SYS_SDRAM_tRCD	include/configs/neo.h	/^#define CONFIG_SYS_SDRAM_tRCD /;"	d
CONFIG_SYS_SDRAM_tRFC	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SDRAM_tRFC /;"	d
CONFIG_SYS_SDRAM_tRFC	include/configs/dlvision.h	/^#define CONFIG_SYS_SDRAM_tRFC /;"	d
CONFIG_SYS_SDRAM_tRFC	include/configs/io.h	/^#define CONFIG_SYS_SDRAM_tRFC /;"	d
CONFIG_SYS_SDRAM_tRFC	include/configs/iocon.h	/^#define CONFIG_SYS_SDRAM_tRFC /;"	d
CONFIG_SYS_SDRAM_tRFC	include/configs/neo.h	/^#define CONFIG_SYS_SDRAM_tRFC	/;"	d
CONFIG_SYS_SDRAM_tRP	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SDRAM_tRP /;"	d
CONFIG_SYS_SDRAM_tRP	include/configs/dlvision.h	/^#define CONFIG_SYS_SDRAM_tRP /;"	d
CONFIG_SYS_SDRAM_tRP	include/configs/io.h	/^#define CONFIG_SYS_SDRAM_tRP /;"	d
CONFIG_SYS_SDRAM_tRP	include/configs/iocon.h	/^#define CONFIG_SYS_SDRAM_tRP /;"	d
CONFIG_SYS_SDRAM_tRP	include/configs/neo.h	/^#define CONFIG_SYS_SDRAM_tRP /;"	d
CONFIG_SYS_SDRC_CR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRC_CR_VAL	/;"	d
CONFIG_SYS_SDRC_CR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_CR_VAL	/;"	d
CONFIG_SYS_SDRC_CR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_CR_VAL	/;"	d
CONFIG_SYS_SDRC_CR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_CR_VAL	/;"	d
CONFIG_SYS_SDRC_MDR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_MDR_VAL	/;"	d
CONFIG_SYS_SDRC_MDR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_MDR_VAL	/;"	d
CONFIG_SYS_SDRC_MDR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_MDR_VAL	/;"	d
CONFIG_SYS_SDRC_MR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL	/;"	d
CONFIG_SYS_SDRC_MR_VAL1	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL1	/;"	d
CONFIG_SYS_SDRC_MR_VAL1	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL1	/;"	d
CONFIG_SYS_SDRC_MR_VAL1	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_MR_VAL1	/;"	d
CONFIG_SYS_SDRC_MR_VAL1	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_MR_VAL1	/;"	d
CONFIG_SYS_SDRC_MR_VAL2	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL2	/;"	d
CONFIG_SYS_SDRC_MR_VAL2	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL2	/;"	d
CONFIG_SYS_SDRC_MR_VAL2	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_MR_VAL2	/;"	d
CONFIG_SYS_SDRC_MR_VAL2	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_MR_VAL2	/;"	d
CONFIG_SYS_SDRC_MR_VAL3	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL3	/;"	d
CONFIG_SYS_SDRC_MR_VAL3	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL3	/;"	d
CONFIG_SYS_SDRC_MR_VAL3	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_MR_VAL3	/;"	d
CONFIG_SYS_SDRC_MR_VAL3	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_MR_VAL3	/;"	d
CONFIG_SYS_SDRC_MR_VAL4	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL4	/;"	d
CONFIG_SYS_SDRC_MR_VAL4	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_MR_VAL4	/;"	d
CONFIG_SYS_SDRC_MR_VAL4	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_MR_VAL4	/;"	d
CONFIG_SYS_SDRC_MR_VAL5	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_MR_VAL5	/;"	d
CONFIG_SYS_SDRC_MR_VAL5	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_MR_VAL5	/;"	d
CONFIG_SYS_SDRC_MR_VAL5	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_MR_VAL5	/;"	d
CONFIG_SYS_SDRC_TR_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SDRC_TR_VAL	/;"	d
CONFIG_SYS_SDRC_TR_VAL1	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_TR_VAL1	/;"	d
CONFIG_SYS_SDRC_TR_VAL1	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_TR_VAL1	/;"	d
CONFIG_SYS_SDRC_TR_VAL1	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_TR_VAL1	/;"	d
CONFIG_SYS_SDRC_TR_VAL2	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SDRC_TR_VAL2	/;"	d
CONFIG_SYS_SDRC_TR_VAL2	include/configs/pm9261.h	/^#define CONFIG_SYS_SDRC_TR_VAL2	/;"	d
CONFIG_SYS_SDRC_TR_VAL2	include/configs/pm9263.h	/^#define CONFIG_SYS_SDRC_TR_VAL2	/;"	d
CONFIG_SYS_SD_VOLTAGE	include/configs/warp.h	/^#define CONFIG_SYS_SD_VOLTAGE	/;"	d
CONFIG_SYS_SEC_MON_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_SEC_MON_ADDR	/;"	d
CONFIG_SYS_SEC_MON_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_SEC_MON_ADDR	/;"	d
CONFIG_SYS_SEC_MON_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_SEC_MON_ADDR	/;"	d
CONFIG_SYS_SEC_MON_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_SEC_MON_ADDR /;"	d
CONFIG_SYS_SEC_MON_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_SEC_MON_OFFSET	/;"	d
CONFIG_SYS_SELF_RST	include/configs/CPCI2DP.h	/^#define CONFIG_SYS_SELF_RST	/;"	d
CONFIG_SYS_SERIAL0	include/configs/edb93xx.h	/^#define CONFIG_SYS_SERIAL0	/;"	d
CONFIG_SYS_SERIAL0	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_SERIAL0	/;"	d
CONFIG_SYS_SERIAL0	include/configs/spear6xx_evb.h	/^#define CONFIG_SYS_SERIAL0	/;"	d
CONFIG_SYS_SERIAL0	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_SERIAL0	/;"	d
CONFIG_SYS_SERIAL0	include/configs/vexpress_common.h	/^#define CONFIG_SYS_SERIAL0	/;"	d
CONFIG_SYS_SERIAL0	include/configs/x600.h	/^#define CONFIG_SYS_SERIAL0	/;"	d
CONFIG_SYS_SERIAL1	include/configs/edb93xx.h	/^#define CONFIG_SYS_SERIAL1	/;"	d
CONFIG_SYS_SERIAL1	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_SERIAL1	/;"	d
CONFIG_SYS_SERIAL1	include/configs/spear6xx_evb.h	/^#define CONFIG_SYS_SERIAL1	/;"	d
CONFIG_SYS_SERIAL1	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_SERIAL1	/;"	d
CONFIG_SYS_SERIAL1	include/configs/vexpress_common.h	/^#define CONFIG_SYS_SERIAL1	/;"	d
CONFIG_SYS_SERIAL1	include/configs/x600.h	/^#define CONFIG_SYS_SERIAL1	/;"	d
CONFIG_SYS_SERIAL2	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_SERIAL2	/;"	d
CONFIG_SYS_SERIAL3	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_SERIAL3	/;"	d
CONFIG_SYS_SERIAL4	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_SERIAL4	/;"	d
CONFIG_SYS_SERIAL5	include/configs/spear3xx_evb.h	/^#define CONFIG_SYS_SERIAL5	/;"	d
CONFIG_SYS_SFP_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_SFP_ADDR	/;"	d
CONFIG_SYS_SFP_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_SFP_ADDR	/;"	d
CONFIG_SYS_SFP_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_SFP_ADDR	/;"	d
CONFIG_SYS_SFP_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_SFP_ADDR /;"	d
CONFIG_SYS_SFP_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_SFP_OFFSET	/;"	d
CONFIG_SYS_SFP_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_SFP_OFFSET /;"	d
CONFIG_SYS_SGMII1_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SGMII1_PHY_ADDR /;"	d
CONFIG_SYS_SGMII2_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SGMII2_PHY_ADDR /;"	d
CONFIG_SYS_SGMII3_PHY_ADDR	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SGMII3_PHY_ADDR /;"	d
CONFIG_SYS_SGMII_LINERATE_MHZ	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SGMII_LINERATE_MHZ	/;"	d
CONFIG_SYS_SGMII_RATESCALE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SGMII_RATESCALE	/;"	d
CONFIG_SYS_SGMII_REFCLK_MHZ	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SGMII_REFCLK_MHZ	/;"	d
CONFIG_SYS_SH_SDHI0_BASE	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define CONFIG_SYS_SH_SDHI0_BASE /;"	d
CONFIG_SYS_SH_SDHI0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define CONFIG_SYS_SH_SDHI0_BASE	/;"	d
CONFIG_SYS_SH_SDHI0_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define CONFIG_SYS_SH_SDHI0_BASE	/;"	d
CONFIG_SYS_SH_SDHI1_BASE	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define CONFIG_SYS_SH_SDHI1_BASE /;"	d
CONFIG_SYS_SH_SDHI1_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define CONFIG_SYS_SH_SDHI1_BASE /;"	d
CONFIG_SYS_SH_SDHI1_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define CONFIG_SYS_SH_SDHI1_BASE /;"	d
CONFIG_SYS_SH_SDHI1_BASE	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define CONFIG_SYS_SH_SDHI1_BASE /;"	d
CONFIG_SYS_SH_SDHI1_BASE	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define CONFIG_SYS_SH_SDHI1_BASE /;"	d
CONFIG_SYS_SH_SDHI1_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define CONFIG_SYS_SH_SDHI1_BASE	/;"	d
CONFIG_SYS_SH_SDHI2_BASE	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define CONFIG_SYS_SH_SDHI2_BASE /;"	d
CONFIG_SYS_SH_SDHI2_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define CONFIG_SYS_SH_SDHI2_BASE /;"	d
CONFIG_SYS_SH_SDHI2_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define CONFIG_SYS_SH_SDHI2_BASE /;"	d
CONFIG_SYS_SH_SDHI2_BASE	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define CONFIG_SYS_SH_SDHI2_BASE /;"	d
CONFIG_SYS_SH_SDHI2_BASE	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define CONFIG_SYS_SH_SDHI2_BASE /;"	d
CONFIG_SYS_SH_SDHI2_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define CONFIG_SYS_SH_SDHI2_BASE	/;"	d
CONFIG_SYS_SH_SDHI3_BASE	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define CONFIG_SYS_SH_SDHI3_BASE /;"	d
CONFIG_SYS_SH_SDHI3_BASE	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define CONFIG_SYS_SH_SDHI3_BASE /;"	d
CONFIG_SYS_SH_SDHI3_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define CONFIG_SYS_SH_SDHI3_BASE	/;"	d
CONFIG_SYS_SH_SDHI_NR_CHANNEL	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define CONFIG_SYS_SH_SDHI_NR_CHANNEL /;"	d
CONFIG_SYS_SH_SDHI_NR_CHANNEL	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define CONFIG_SYS_SH_SDHI_NR_CHANNEL /;"	d
CONFIG_SYS_SH_SDHI_NR_CHANNEL	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define CONFIG_SYS_SH_SDHI_NR_CHANNEL /;"	d
CONFIG_SYS_SH_SDHI_NR_CHANNEL	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define CONFIG_SYS_SH_SDHI_NR_CHANNEL /;"	d
CONFIG_SYS_SH_SDHI_NR_CHANNEL	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define CONFIG_SYS_SH_SDHI_NR_CHANNEL /;"	d
CONFIG_SYS_SH_SDHI_NR_CHANNEL	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define CONFIG_SYS_SH_SDHI_NR_CHANNEL /;"	d
CONFIG_SYS_SICRH	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/TQM834x.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/hrcon.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/ids8313.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/km8360.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/sbc8349.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/strider.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRH	include/configs/ve8313.h	/^#define CONFIG_SYS_SICRH	/;"	d
CONFIG_SYS_SICRH	include/configs/vme8349.h	/^#define CONFIG_SYS_SICRH /;"	d
CONFIG_SYS_SICRL	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/TQM834x.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/hrcon.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/ids8313.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/km/km8309-common.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/km/km8321-common.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/sbc8349.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/strider.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SICRL	include/configs/ve8313.h	/^#define CONFIG_SYS_SICRL	/;"	d
CONFIG_SYS_SICRL	include/configs/vme8349.h	/^#define CONFIG_SYS_SICRL /;"	d
CONFIG_SYS_SIL1178_I2C	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SIL1178_I2C	/;"	d
CONFIG_SYS_SIMULATE_SPD_EEPROM	include/configs/bamboo.h	/^#define CONFIG_SYS_SIMULATE_SPD_EEPROM	/;"	d
CONFIG_SYS_SIUMCR	include/configs/PATI.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM823L.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM823M.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM850L.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM850M.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM855L.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM855M.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM860L.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM860M.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM862L.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM862M.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM866M.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/TQM885D.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SIUMCR	include/configs/km82xx.h	/^#define CONFIG_SYS_SIUMCR	/;"	d
CONFIG_SYS_SJA1000_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_SJA1000_BASE	/;"	d
CONFIG_SYS_SMALL_FLASH	include/configs/luan.h	/^#define CONFIG_SYS_SMALL_FLASH	/;"	d
CONFIG_SYS_SMC0_CYCLE0_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SMC0_CYCLE0_VAL	/;"	d
CONFIG_SYS_SMC0_CYCLE0_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_SMC0_CYCLE0_VAL	/;"	d
CONFIG_SYS_SMC0_CYCLE0_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_SMC0_CYCLE0_VAL	/;"	d
CONFIG_SYS_SMC0_MODE0_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SMC0_MODE0_VAL	/;"	d
CONFIG_SYS_SMC0_MODE0_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_SMC0_MODE0_VAL	/;"	d
CONFIG_SYS_SMC0_MODE0_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_SMC0_MODE0_VAL	/;"	d
CONFIG_SYS_SMC0_PULSE0_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SMC0_PULSE0_VAL	/;"	d
CONFIG_SYS_SMC0_PULSE0_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_SMC0_PULSE0_VAL	/;"	d
CONFIG_SYS_SMC0_PULSE0_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_SMC0_PULSE0_VAL	/;"	d
CONFIG_SYS_SMC0_SETUP0_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_SMC0_SETUP0_VAL	/;"	d
CONFIG_SYS_SMC0_SETUP0_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_SMC0_SETUP0_VAL	/;"	d
CONFIG_SYS_SMC0_SETUP0_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_SMC0_SETUP0_VAL	/;"	d
CONFIG_SYS_SMC_CSR0_VAL	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_SMC_CSR0_VAL	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d	file:
CONFIG_SYS_SMC_RXBUFLEN	arch/powerpc/cpu/mpc8xx/serial.c	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d	file:
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM823L.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM823M.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM850L.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM850M.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM855L.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM855M.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM860L.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM860M.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM862L.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM862M.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM866M.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/TQM885D.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMC_RXBUFLEN	include/configs/km82xx.h	/^#define CONFIG_SYS_SMC_RXBUFLEN	/;"	d
CONFIG_SYS_SMI_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_SMI_BASE	/;"	d
CONFIG_SYS_SOC	arch/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv7/mx5/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv7/mx6/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv7/mx7/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv7/omap3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv7/omap4/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv7/omap5/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-at91/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-bcm283x/Kconfig	/^config SYS_SOC$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_SOC	arch/arm/mach-davinci/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-exynos/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-highbank/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-keystone/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-kirkwood/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-meson/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-mvebu/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-orion5x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-rmobile/Kconfig.32	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-rmobile/Kconfig.64	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-rockchip/rk3399/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-s5pc1xx/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-snapdragon/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-socfpga/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-tegra/tegra114/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-tegra/tegra124/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-tegra/tegra186/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-tegra/tegra20/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-tegra/tegra210/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-tegra/tegra30/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/arm/mach-zynq/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	arch/mips/mach-ath79/Kconfig	/^config SYS_SOC$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SYS_SOC	arch/mips/mach-pic32/Kconfig	/^config SYS_SOC$/;"	c	menu:Microchip PIC32 platforms
CONFIG_SYS_SOC	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/BuR/brppt1/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/BuR/brxre1/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/CarMediaLab/flea3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/Marvell/aspenite/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/Marvell/gplugd/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/advantech/dms-ba16/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/armadeus/apf27/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/atmel/atngw100/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/atmel/atngw100mkii/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/atmel/atstk1000/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/birdland/bav335x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/bluegiga/apx4devkit/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/bosch/shc/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/broadcom/bcmcygnus/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/broadcom/bcmnsp/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/cirrus/edb93xx/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/compulab/cm_t335/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/compulab/cm_t43/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/coreboot/coreboot/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/creative/xfi3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/dbau1x00/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/denx/m28evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/denx/m53evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/dfi/dfi-bt700/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/efi/efi-x86/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/emulation/qemu-x86/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1012afrdm/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1012aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1012ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1021aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1021atwr/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1043aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1043ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1046aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls1046ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls2080a/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls2080aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/ls2080ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx23evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx25pdk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx28evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx31ads/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx31pdk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx35pdk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx51evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx53ard/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx53evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx53loco/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/mx53smd/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/s32v234evb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/freescale/vf610twr/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/ge/bx50v3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/google/chromebook_link/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/google/chromebook_samus/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/google/chromebox_panther/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/gumstix/pepper/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/hisilicon/hikey/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/imx31_phycore/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/in-circuit/grasshopper/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/intel/bayleybay/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/intel/cougarcanyon2/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/intel/crownbay/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/intel/galileo/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/intel/minnowmax/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/isee/igep0033/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/mpl/vcma9/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/pb1x00/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/phytec/pcm051/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/phytec/pcm052/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/ppcag/bg0900/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/renesas/salvator-x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/samsung/goni/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/samsung/smdk2410/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/samsung/smdkc100/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/siemens/draco/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/siemens/pxm2/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/siemens/rut/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/silica/pengwyn/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/spear/spear300/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/spear/spear310/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/spear/spear320/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/spear/spear600/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/spear/x600/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/st/stm32f429-discovery/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/st/stm32f746-disco/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/st/stv0991/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/sunxi/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/syteco/zmx25/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/tcl/sl50/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/technexion/pico-imx6ul/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/technologic/ts4800/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/ti/am335x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/ti/am43xx/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/ti/ti814x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/ti/ti816x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/timll/devkit3250/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/toradex/colibri_vf/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/tplink/wdr4300/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/vscom/baltos/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/woodburn/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	board/work-microwave/work_92105/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC	include/config/auto.conf	/^CONFIG_SYS_SOC="sunxi"$/;"	k
CONFIG_SYS_SOC	include/generated/autoconf.h	/^#define CONFIG_SYS_SOC /;"	d
CONFIG_SYS_SOC_MODULE	arch/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv7/mx5/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv7/mx7/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-at91/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config SYS_SOC$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_SOC_MODULE	arch/arm/mach-davinci/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-exynos/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-highbank/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-keystone/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-meson/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-mvebu/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-orion5x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-rmobile/Kconfig.64	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-rockchip/rk3399/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-s5pc1xx/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-snapdragon/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-tegra/tegra114/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-tegra/tegra124/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-tegra/tegra186/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-tegra/tegra210/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-tegra/tegra30/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/arm/mach-zynq/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	arch/mips/mach-ath79/Kconfig	/^config SYS_SOC$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
CONFIG_SYS_SOC_MODULE	arch/mips/mach-pic32/Kconfig	/^config SYS_SOC$/;"	c	menu:Microchip PIC32 platforms
CONFIG_SYS_SOC_MODULE	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/BuR/brppt1/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/BuR/brxre1/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/CarMediaLab/flea3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/Marvell/aspenite/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/Marvell/gplugd/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/advantech/dms-ba16/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/armadeus/apf27/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/atmel/atngw100/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/atmel/atngw100mkii/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/atmel/atstk1000/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/birdland/bav335x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/bluegiga/apx4devkit/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/bosch/shc/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/broadcom/bcmcygnus/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/broadcom/bcmnsp/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/cirrus/edb93xx/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/compulab/cm_t335/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/compulab/cm_t43/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/creative/xfi3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/dbau1x00/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/denx/m28evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/denx/m53evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/dfi/dfi-bt700/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/efi/efi-x86/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/emulation/qemu-x86/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1012afrdm/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1012aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1012ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1021aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1021atwr/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1043aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1043ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1046aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls1046ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls2080a/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls2080aqds/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/ls2080ardb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx23evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx25pdk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx28evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx31ads/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx31pdk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx35pdk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx51evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx53ard/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx53evk/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx53loco/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/mx53smd/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/s32v234evb/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/freescale/vf610twr/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/ge/bx50v3/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/gumstix/pepper/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/hisilicon/hikey/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/imx31_phycore/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/in-circuit/grasshopper/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/intel/bayleybay/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/intel/cougarcanyon2/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/intel/crownbay/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/intel/galileo/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/intel/minnowmax/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/isee/igep0033/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/mpl/vcma9/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/pb1x00/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/phytec/pcm051/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/phytec/pcm052/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/ppcag/bg0900/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/renesas/salvator-x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/samsung/goni/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/samsung/smdk2410/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/samsung/smdkc100/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/siemens/draco/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/siemens/pxm2/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/siemens/rut/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/silica/pengwyn/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/spear/spear300/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/spear/spear310/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/spear/spear320/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/spear/spear600/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/spear/x600/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/st/stm32f429-discovery/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/st/stm32f746-disco/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/st/stv0991/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/sunxi/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/syteco/zmx25/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/tcl/sl50/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/technexion/pico-imx6ul/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/technologic/ts4800/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/ti/am335x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/ti/am43xx/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/ti/ti814x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/ti/ti816x/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/timll/devkit3250/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/toradex/colibri_vf/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/vscom/baltos/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/woodburn/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SOC_MODULE	board/work-microwave/work_92105/Kconfig	/^config SYS_SOC$/;"	c
CONFIG_SYS_SPANSION_BASE	include/configs/M54451EVB.h	/^#define CONFIG_SYS_SPANSION_BASE	/;"	d
CONFIG_SYS_SPARC_NWINDOWS	arch/sparc/Kconfig	/^config SYS_SPARC_NWINDOWS$/;"	c	menu:SPARC architecture
CONFIG_SYS_SPARC_NWINDOWS	arch/sparc/cpu/leon3/start.S	/^#define CONFIG_SYS_SPARC_NWINDOWS /;"	d	file:
CONFIG_SYS_SPARC_NWINDOWS_MODULE	arch/sparc/Kconfig	/^config SYS_SPARC_NWINDOWS$/;"	c	menu:SPARC architecture
CONFIG_SYS_SPCR_OPT	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_SPCR_OPT	/;"	d
CONFIG_SYS_SPCR_TSEC1EP	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SPCR_TSEC1EP	/;"	d
CONFIG_SYS_SPCR_TSEC1EP	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SPCR_TSEC1EP	/;"	d
CONFIG_SYS_SPCR_TSEC2EP	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SPCR_TSEC2EP	/;"	d
CONFIG_SYS_SPCR_TSEC2EP	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SPCR_TSEC2EP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/hrcon.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPCR_TSECEP	include/configs/strider.h	/^#define CONFIG_SYS_SPCR_TSECEP	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/autoconf.mk	/^CONFIG_SYS_SPD_BUS_NUM=0$/;"	m
CONFIG_SYS_SPD_BUS_NUM	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/P1022DS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/P1023RDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM /;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T1040QDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/T4240RDB.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/UCP1020.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/UCP1020.h	/^#define CONFIG_SYS_SPD_BUS_NUM /;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/cyrus.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/flea3.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/icon.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/iocon.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/katmai.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls2080a_emu.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/novena.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SPD_BUS_NUM /;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/sunxi-common.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/vf610twr.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/configs/woodburn_common.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	include/i2c.h	/^#define CONFIG_SYS_SPD_BUS_NUM	/;"	d
CONFIG_SYS_SPD_BUS_NUM	spl/include/autoconf.mk	/^CONFIG_SYS_SPD_BUS_NUM=0$/;"	m
CONFIG_SYS_SPD_MAX_DIMMS	include/configs/redwood.h	/^#define CONFIG_SYS_SPD_MAX_DIMMS	/;"	d
CONFIG_SYS_SPI0	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI0$/;"	d
CONFIG_SYS_SPI0_NUM_CS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI0_NUM_CS	/;"	d
CONFIG_SYS_SPI1	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI1$/;"	d
CONFIG_SYS_SPI1_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI1_BASE	/;"	d
CONFIG_SYS_SPI1_NUM_CS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI1_NUM_CS	/;"	d
CONFIG_SYS_SPI2	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI2$/;"	d
CONFIG_SYS_SPI2_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI2_BASE	/;"	d
CONFIG_SYS_SPI2_NUM_CS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI2_NUM_CS	/;"	d
CONFIG_SYS_SPI_ARGS_OFFS	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SPI_ARGS_OFFS /;"	d
CONFIG_SYS_SPI_ARGS_OFFS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SPI_ARGS_OFFS	/;"	d
CONFIG_SYS_SPI_ARGS_OFFS	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPI_ARGS_OFFS	/;"	d
CONFIG_SYS_SPI_ARGS_SIZE	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SPI_ARGS_SIZE /;"	d
CONFIG_SYS_SPI_ARGS_SIZE	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SPI_ARGS_SIZE	/;"	d
CONFIG_SYS_SPI_ARGS_SIZE	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPI_ARGS_SIZE	/;"	d
CONFIG_SYS_SPI_BASE	include/configs/da850evm.h	/^#define CONFIG_SYS_SPI_BASE	/;"	d
CONFIG_SYS_SPI_BASE	include/configs/ea20.h	/^#define CONFIG_SYS_SPI_BASE	/;"	d
CONFIG_SYS_SPI_BASE	include/configs/legoev3.h	/^#define CONFIG_SYS_SPI_BASE	/;"	d
CONFIG_SYS_SPI_BASE	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_SPI_BASE	/;"	d
CONFIG_SYS_SPI_BASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SPI_BASE	/;"	d
CONFIG_SYS_SPI_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI_BASE	/;"	d
CONFIG_SYS_SPI_CLK	include/configs/da850evm.h	/^#define CONFIG_SYS_SPI_CLK	/;"	d
CONFIG_SYS_SPI_CLK	include/configs/ea20.h	/^#define CONFIG_SYS_SPI_CLK	/;"	d
CONFIG_SYS_SPI_CLK	include/configs/legoev3.h	/^#define CONFIG_SYS_SPI_CLK	/;"	d
CONFIG_SYS_SPI_CLK	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SPI_CLK	/;"	d
CONFIG_SYS_SPI_CLK	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI_CLK	/;"	d
CONFIG_SYS_SPI_CS_ACT	include/configs/PATI.h	/^#define CONFIG_SYS_SPI_CS_ACT	/;"	d
CONFIG_SYS_SPI_CS_BASE	include/configs/PATI.h	/^#define CONFIG_SYS_SPI_CS_BASE	/;"	d
CONFIG_SYS_SPI_CS_USED	include/configs/PATI.h	/^#define CONFIG_SYS_SPI_CS_USED	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/P1022DS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST /;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_DST	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/P1022DS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS /;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/P1022DS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE /;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/P1010RDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/P1022DS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/T104xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START /;"	d
CONFIG_SYS_SPI_FLASH_U_BOOT_START	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	/;"	d
CONFIG_SYS_SPI_INIT_OFFSET	arch/powerpc/cpu/mpc8260/spi.c	/^#define	CONFIG_SYS_SPI_INIT_OFFSET	/;"	d	file:
CONFIG_SYS_SPI_INIT_OFFSET	arch/powerpc/cpu/mpc8xx/spi.c	/^#define	CONFIG_SYS_SPI_INIT_OFFSET	/;"	d	file:
CONFIG_SYS_SPI_KERNEL_OFFS	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SPI_KERNEL_OFFS /;"	d
CONFIG_SYS_SPI_KERNEL_OFFS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SPI_KERNEL_OFFS	/;"	d
CONFIG_SYS_SPI_KERNEL_OFFS	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPI_KERNEL_OFFS	/;"	d
CONFIG_SYS_SPI_MXC_WAIT	drivers/spi/mxc_spi.c	/^#define CONFIG_SYS_SPI_MXC_WAIT	/;"	d	file:
CONFIG_SYS_SPI_ST_ENABLE_WP_PIN	include/configs/aristainetos-common.h	/^#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN$/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/am335x_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS /;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/bav335x.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/brppt1.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/clearfog.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/cm_fx6.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/cm_t43.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/da850evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/db-88f6720.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS /;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/ds414.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/el6x_common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/maxbcm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/ot1200.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS /;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/pcm051.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/pcm058.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/rk3288_common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/rk3399_common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/socfpga_common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/sunxi-common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/taurus.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/theadorable.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS /;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_OFFS	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPI_U_BOOT_OFFS	/;"	d
CONFIG_SYS_SPI_U_BOOT_SIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_U_BOOT_SIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SPI_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_U_BOOT_SIZE	include/configs/pcm051.h	/^#define CONFIG_SYS_SPI_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_U_BOOT_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_SIZE	/;"	d
CONFIG_SYS_SPI_U_BOOT_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_SPI_U_BOOT_SIZE /;"	d
CONFIG_SYS_SPI_WRITE_TOUT	drivers/spi/atmel_spi.h	/^#define CONFIG_SYS_SPI_WRITE_TOUT	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/a3m071.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/brppt1.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/cm_t43.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/devkit8000.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR /;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/gw_ventana.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/ipam390.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/mx6sabresd.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR /;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/ti_am335x_common.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/trats.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR /;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/twister.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_ARGS_ADDR	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPL_ARGS_ADDR	/;"	d
CONFIG_SYS_SPL_LEN	include/configs/x600.h	/^#define CONFIG_SYS_SPL_LEN	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/cm_t35.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/da850evm.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/edminiv2.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/imx6_spl.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/imx6_spl.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE /;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ipam390.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/kc1.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/mcx.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/picosam9g45.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/smartweb.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE /;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/sniper.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/tao3530.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/taurus.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE /;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/tegra-common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE /;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/woodburn_sd.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_SIZE	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPL_MALLOC_SIZE	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/am3517_crane.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/am3517_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/cm_t35.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/da850evm.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/devkit8000.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/edminiv2.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/imx6_spl.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/imx6_spl.h	/^#define CONFIG_SYS_SPL_MALLOC_START /;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ipam390.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/kc1.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/mcx.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/omap3_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/omap3_logic.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/picosam9g45.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/smartweb.h	/^#define CONFIG_SYS_SPL_MALLOC_START /;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/sniper.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tam3517-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tao3530.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/taurus.h	/^#define CONFIG_SYS_SPL_MALLOC_START /;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tegra114-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tegra124-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tegra186-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tegra20-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tegra210-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tegra30-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_SPL_MALLOC_START /;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/tricorder.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/woodburn_sd.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/xilinx_zynqmp.h	/^# define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MALLOC_START	include/configs/zynq-common.h	/^#define CONFIG_SYS_SPL_MALLOC_START	/;"	d
CONFIG_SYS_SPL_MAX_LEN	include/configs/a3m071.h	/^#define CONFIG_SYS_SPL_MAX_LEN	/;"	d
CONFIG_SYS_SPR	include/configs/M5272C3.h	/^#define CONFIG_SYS_SPR	/;"	d
CONFIG_SYS_SPR	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_SPR	/;"	d
CONFIG_SYS_SPR	include/configs/cobra5272.h	/^#define CONFIG_SYS_SPR	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/a4m072.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/ac14xx.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/aria.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/bubinga.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_SRAM_BASE /;"	d
CONFIG_SYS_SRAM_BASE	include/configs/grsim.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/intip.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/ipek01.h	/^#define	CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/luan.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/manroland/mpc5200-common.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_SRAM_BASE	/;"	d
CONFIG_SYS_SRAM_END	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_SRAM_END /;"	d
CONFIG_SYS_SRAM_END	include/configs/grsim.h	/^#define CONFIG_SYS_SRAM_END	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/a4m072.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/ac14xx.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/aria.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/bubinga.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/canyonlands.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/devkit8000.h	/^#define CONFIG_SYS_SRAM_SIZE /;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_SRAM_SIZE /;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/grsim.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/intip.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/ipek01.h	/^#define	CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/luan.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/pdm360ng.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/pic32mzdask.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/t3corp.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_SIZE	include/configs/tricorder.h	/^#define CONFIG_SYS_SRAM_SIZE	/;"	d
CONFIG_SYS_SRAM_START	include/configs/devkit8000.h	/^#define CONFIG_SYS_SRAM_START /;"	d
CONFIG_SYS_SRAM_START	include/configs/tricorder.h	/^#define CONFIG_SYS_SRAM_START	/;"	d
CONFIG_SYS_SRGPL0_CFG_BAR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SRGPL0_CFG_BAR	/;"	d
CONFIG_SYS_SRGPL0_MNT_BAR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SRGPL0_MNT_BAR	/;"	d
CONFIG_SYS_SRGPL0_MSG_BAR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SRGPL0_MSG_BAR	/;"	d
CONFIG_SYS_SRGPL0_REG_BAR	include/configs/canyonlands.h	/^#define CONFIG_SYS_SRGPL0_REG_BAR	/;"	d
CONFIG_SYS_SRIO	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/P3041DS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/P4080DS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/P5020DS.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO	/;"	d
CONFIG_SYS_SRIO	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO$/;"	d
CONFIG_SYS_SRIO1_MEM_BASE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SRIO1_MEM_BASE	/;"	d
CONFIG_SYS_SRIO1_MEM_BASE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SRIO1_MEM_BASE	/;"	d
CONFIG_SYS_SRIO1_MEM_BUS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_BUS	/;"	d
CONFIG_SYS_SRIO1_MEM_BUS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_BUS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS /;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO1_MEM_PHYS_HIGH	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS_HIGH /;"	d
CONFIG_SYS_SRIO1_MEM_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SRIO1_MEM_PHYS_LOW	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO1_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO1_MEM_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO1_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO2_MEM_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO2_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO2_MEM_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO2_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO2_MEM_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO2_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO2_MEM_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO2_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO2_MEM_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO2_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO2_MEM_PHYS	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO2_MEM_PHYS	/;"	d
CONFIG_SYS_SRIO2_MEM_SIZE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO2_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO2_MEM_SIZE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO2_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO2_MEM_SIZE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO2_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO2_MEM_SIZE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO2_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO2_MEM_SIZE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO2_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO2_MEM_SIZE	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO2_MEM_SIZE	/;"	d
CONFIG_SYS_SRIO2_MEM_VIRT	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO2_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO2_MEM_VIRT	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO2_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO2_MEM_VIRT	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO2_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO2_MEM_VIRT	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO2_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO2_MEM_VIRT	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO2_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO2_MEM_VIRT	include/configs/t4qds.h	/^#define CONFIG_SYS_SRIO2_MEM_VIRT	/;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	/;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/B4860QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/P2041RDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/T102xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/T102xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/T208xQDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/T208xRDB.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/T4240QDS.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS	include/configs/corenet_ds.h	/^#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS /;"	d
CONFIG_SYS_SSD_BASE	include/configs/p1_twr.h	/^#define CONFIG_SYS_SSD_BASE	/;"	d
CONFIG_SYS_SSD_BASE_PHYS	include/configs/p1_twr.h	/^#define CONFIG_SYS_SSD_BASE_PHYS	/;"	d
CONFIG_SYS_SSP_PORT	include/configs/gplugd.h	/^#define CONFIG_SYS_SSP_PORT	/;"	d
CONFIG_SYS_SST_SECT	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_SST_SECT	/;"	d
CONFIG_SYS_SST_SECTSZ	include/configs/M5253DEMO.h	/^#	define CONFIG_SYS_SST_SECTSZ	/;"	d
CONFIG_SYS_STACKSIZE	include/configs/xtfpga.h	/^#define CONFIG_SYS_STACKSIZE	/;"	d
CONFIG_SYS_STACK_LENGTH	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_STACK_LENGTH	/;"	d
CONFIG_SYS_STACK_SIZE	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_SYS_STACK_SIZE	/;"	d
CONFIG_SYS_STACK_SIZE	include/configs/gr_ep2s60.h	/^#define CONFIG_SYS_STACK_SIZE	/;"	d
CONFIG_SYS_STACK_SIZE	include/configs/gr_xc3s_1500.h	/^#define CONFIG_SYS_STACK_SIZE	/;"	d
CONFIG_SYS_STACK_SIZE	include/configs/grsim.h	/^#define CONFIG_SYS_STACK_SIZE	/;"	d
CONFIG_SYS_STACK_SIZE	include/configs/grsim_leon2.h	/^#define CONFIG_SYS_STACK_SIZE	/;"	d
CONFIG_SYS_STACK_SIZE	include/configs/x86-common.h	/^#define CONFIG_SYS_STACK_SIZE	/;"	d
CONFIG_SYS_STATUS_C	drivers/net/eepro100.c	/^#define CONFIG_SYS_STATUS_C	/;"	d	file:
CONFIG_SYS_STATUS_OK	drivers/net/eepro100.c	/^#define CONFIG_SYS_STATUS_OK	/;"	d	file:
CONFIG_SYS_STDIO_DEREGISTER	common/Kconfig	/^config SYS_STDIO_DEREGISTER$/;"	c	menu:Console
CONFIG_SYS_STDIO_DEREGISTER_MODULE	common/Kconfig	/^config SYS_STDIO_DEREGISTER$/;"	c	menu:Console
CONFIG_SYS_SUPPORT_64BIT_DATA	include/common.h	/^#define CONFIG_SYS_SUPPORT_64BIT_DATA$/;"	d
CONFIG_SYS_SXCNFG_VAL	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_SXCNFG_VAL	/;"	d
CONFIG_SYS_SXCNFG_VAL	include/configs/h2200.h	/^#define CONFIG_SYS_SXCNFG_VAL	/;"	d
CONFIG_SYS_SXCNFG_VAL	include/configs/zipitz2.h	/^#define CONFIG_SYS_SXCNFG_VAL	/;"	d
CONFIG_SYS_SYPCR	include/configs/PATI.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM823L.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM823M.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM850L.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM850M.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM855L.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM855M.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM860L.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM860M.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM862L.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM862M.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM866M.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/TQM885D.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYPCR	include/configs/km82xx.h	/^#define CONFIG_SYS_SYPCR	/;"	d
CONFIG_SYS_SYSTEMACE_BASE	include/configs/icon.h	/^#define CONFIG_SYS_SYSTEMACE_BASE	/;"	d
CONFIG_SYS_SYSTEMACE_BASE	include/configs/katmai.h	/^#define CONFIG_SYS_SYSTEMACE_BASE	/;"	d
CONFIG_SYS_SYSTEMACE_BASE	include/configs/sandbox.h	/^#define CONFIG_SYS_SYSTEMACE_BASE	/;"	d
CONFIG_SYS_SYSTEMACE_WIDTH	include/configs/icon.h	/^#define CONFIG_SYS_SYSTEMACE_WIDTH	/;"	d
CONFIG_SYS_SYSTEMACE_WIDTH	include/configs/katmai.h	/^#define CONFIG_SYS_SYSTEMACE_WIDTH	/;"	d
CONFIG_SYS_SYSTEMACE_WIDTH	include/configs/sandbox.h	/^#define CONFIG_SYS_SYSTEMACE_WIDTH	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/cyrus.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/configs/sbc8641d.h	/^#define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBIPA_VALUE	include/tsec.h	/^# define CONFIG_SYS_TBIPA_VALUE	/;"	d
CONFIG_SYS_TBSCR	include/configs/PATI.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM823L.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM823M.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM850L.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM850M.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM855L.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM855M.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM860L.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM860M.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM862L.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM862M.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM866M.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TBSCR	include/configs/TQM885D.h	/^#define CONFIG_SYS_TBSCR	/;"	d
CONFIG_SYS_TCLK	arch/arm/include/asm/arch-armada100/config.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	arch/arm/include/asm/arch/i2c.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	arch/arm/mach-kirkwood/include/mach/kw88f6192.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	arch/arm/mach-kirkwood/include/mach/kw88f6281.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	arch/arm/mach-orion5x/include/mach/mv88f5182.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/clearfog.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/db-88f6720.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/ds414.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/lacie_kw.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/lsxl.h	/^#define CONFIG_SYS_TCLK /;"	d
CONFIG_SYS_TCLK	include/configs/maxbcm.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TCLK	include/configs/theadorable.h	/^#define CONFIG_SYS_TCLK	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/MIP405.h	/^#define CONFIG_SYS_TEMP_STACK_OCM /;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/PIP405.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/PLU405.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/PMC405DE.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/VOM405.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/acadia.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/bubinga.h	/^#define CONFIG_SYS_TEMP_STACK_OCM /;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/dlvision-10g.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/dlvision.h	/^#define CONFIG_SYS_TEMP_STACK_OCM /;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/icon.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/io.h	/^#define CONFIG_SYS_TEMP_STACK_OCM /;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/iocon.h	/^#define CONFIG_SYS_TEMP_STACK_OCM /;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/katmai.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/neo.h	/^#define CONFIG_SYS_TEMP_STACK_OCM /;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/redwood.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/xpedite1000.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEMP_STACK_OCM	include/configs/yucca.h	/^#define CONFIG_SYS_TEMP_STACK_OCM	/;"	d
CONFIG_SYS_TEXT_ADDR	include/configs/xtfpga.h	/^#define CONFIG_SYS_TEXT_ADDR	/;"	d
CONFIG_SYS_TEXT_BASE	Kconfig	/^config SYS_TEXT_BASE$/;"	c	menu:Boot images
CONFIG_SYS_TEXT_BASE	arch/arm/include/asm/iproc-common/configs.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/coreboot/coreboot/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/dbau1x00/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/dfi/dfi-bt700/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/emulation/qemu-x86/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/google/chromebook_link/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/google/chromebook_samus/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/google/chromebox_panther/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/imgtec/boston/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/imgtec/malta/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/imgtec/xilfpga/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/intel/bayleybay/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/intel/cougarcanyon2/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/intel/crownbay/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/intel/galileo/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/intel/minnowmax/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/microchip/pic32mzda/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/micronas/vct/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/pb1x00/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/qca/ap121/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/qca/ap143/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/qemu-mips/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	board/tplink/wdr4300/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE	include/autoconf.mk	/^CONFIG_SYS_TEXT_BASE=0x4a000000$/;"	m
CONFIG_SYS_TEXT_BASE	include/configs/B4860QDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/BSC9131RDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/BSC9132QDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/C29XPCIE.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/CPCI2DP.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/CPCI4052.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MIP405.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8308RDB.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8323ERDB.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC832XEMDS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8349EMDS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC837XEMDS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC837XERDB.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8536DS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8540ADS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8541CDS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8544DS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8548CDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8555CDS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8560ADS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8568MDS.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8610HPCD.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MPC8641HPCN.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/MigoR.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/P1010RDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/P1022DS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/P1023RDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/P2041RDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/PATI.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/PIP405.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/PLU405.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/PMC405DE.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T102xQDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T102xRDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T1040QDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T104xRDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T208xQDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T208xRDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T4240QDS.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/T4240RDB.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM5200.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM823L.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM823M.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM834x.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM850L.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM850M.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM855L.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM855M.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM860L.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM860M.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM862L.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM862M.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM866M.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/TQM885D.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/UCP1020.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/VCMA9.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/VOM405.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/a3m071.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/a4m072.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ac14xx.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/acadia.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/adp-ag101p.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/alt.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/am335x_evm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ap325rxa.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/apf27.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/aria.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91-sama5_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/atngw100.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/atngw100mkii.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/atstk1002.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/bamboo.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/bav335x.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/blanche.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/bubinga.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/calimain.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/canmb.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/clearfog.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/cm5200.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/cm_t35.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/colibri_pxa270.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/colibri_vf.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/controlcenterd.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/corenet_ds.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/corvus.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/cyrus.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/da850evm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/db-88f6720.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/db-88f6820-amc.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/db-88f6820-gp.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/db-mv784mp-gp.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/devkit3250.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/devkit8000.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/dlvision-10g.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/dlvision.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/dragonboard410c.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ds414.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ea20.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ecovec.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/edb93xx.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/edminiv2.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/espresso7420.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/espt.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ethernut5.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/exynos5250-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/flea3.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/gdppc440etx.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/gose.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/gplugd.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/grasshopper.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/h2200.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/highbank.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/hikey.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/hrcon.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/icon.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/imx27lite-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/imx31_phycore.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/imx6_spl.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/imx6_spl.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/inka4x0.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/integrator-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/intip.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/io.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/io64.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/iocon.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ipam390.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ipek01.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/jupiter.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/katmai.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/kc1.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/kilauea.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/km/km_arm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/km/kmp204x-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/km82xx.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/km8360.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/koelsch.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/kzm9g.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/lager.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/legoev3.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1012a_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls1046ardb.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls2080a_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/luan.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/m53evk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/makalu.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/maxbcm.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mcx.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mecp5123.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/meesc.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/meson-gxbb-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/motionpro.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mpc5121ads.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mpr2.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ms7720se.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ms7722se.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ms7750se.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/munices.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mv-common.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mvebu_db-88f3720.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mvebu_db-88f7040.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx31ads.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx31pdk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx35pdk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx51evk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx53ard.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx53evk.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx53loco.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx53smd.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx6_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mx7_common.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/mxs.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/neo.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/o2d.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/o2d300.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/o2dnt2.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/o2i.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/o2mnt.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/o3dnt.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/odroid.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/odroid_xu3.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/omap3_logic.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/omap3_pandora.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/origen.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/p1_twr.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/pcm030.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/pcm052.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/pdm360ng.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/peach-pi.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/peach-pit.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/picosam9g45.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/pm9261.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/pm9263.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/pm9g45.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/porter.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/r0p7734.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/r2dplus.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/r7780mp.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rcar-gen3-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/redwood.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rk3036_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rk3288_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rk3399_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rpi.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rsk7203.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rsk7264.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/rsk7269.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/s32v234evb.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/s5p_goni.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sandbox.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sbc8349.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sbc8641d.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sh7752evb.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sh7753evb.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/shmin.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/silk.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/smartweb.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/smdk2410.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/smdk5420.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/smdkc100.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/smdkv310.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/snapper9260.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/snapper9g45.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sniper.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/socrates.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/spear-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/stout.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/strider.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/stv0991.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/suvd3.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/t3corp.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/t4qds.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tao3530.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/taurus.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tegra114-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tegra124-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tegra186-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tegra20-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tegra210-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tegra30-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/theadorable.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/thunderx_88xx.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_TEXT_BASE /;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tqma6.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/trats.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/trats2.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tricorder.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ts4800.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/tuxx1.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/usbarmory.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/v38b.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/ve8313.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/vexpress_aemv8a.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/vf610twr.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/vinco.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/vme8349.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/walnut.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/woodburn.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/woodburn_sd.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/work_92105.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/x600.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/xpedite1000.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/xpedite517x.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/xpedite520x.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/xpedite537x.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/xpedite550x.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/yosemite.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/yucca.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/zipitz2.h	/^#define	CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/zmx25.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	include/configs/zynq-common.h	/^#define CONFIG_SYS_TEXT_BASE	/;"	d
CONFIG_SYS_TEXT_BASE	spl/include/autoconf.mk	/^CONFIG_SYS_TEXT_BASE=0x4a000000$/;"	m
CONFIG_SYS_TEXT_BASE_MODULE	Kconfig	/^config SYS_TEXT_BASE$/;"	c	menu:Boot images
CONFIG_SYS_TEXT_BASE_MODULE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/dbau1x00/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/dfi/dfi-bt700/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/emulation/qemu-x86/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/imgtec/boston/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/imgtec/malta/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/imgtec/xilfpga/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/intel/bayleybay/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/intel/cougarcanyon2/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/intel/crownbay/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/intel/galileo/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/intel/minnowmax/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/microchip/pic32mzda/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/micronas/vct/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/pb1x00/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/qca/ap121/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/qca/ap143/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/qemu-mips/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_TEXT_BASE$/;"	c
CONFIG_SYS_TEXT_BASE_NOR	include/configs/UCP1020.h	/^#define CONFIG_SYS_TEXT_BASE_NOR	/;"	d
CONFIG_SYS_TEXT_BASE_SPL	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_TEXT_BASE_SPL /;"	d
CONFIG_SYS_TFP410_ADDR	include/configs/charon.h	/^#define CONFIG_SYS_TFP410_ADDR	/;"	d
CONFIG_SYS_TFP410_BUS	include/configs/charon.h	/^#define CONFIG_SYS_TFP410_BUS	/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/VCMA9.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/colibri_imx7.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/colibri_vf.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/highbank.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/imx6_spl.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/kc1.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/openrd.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/pcm052.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/rcar-gen2-common.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/rk3036_common.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/rk3288_common.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/smartweb.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/socfpga_common.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/stm32f429-discovery.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/stm32f746-disco.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/sunxi-common.h	/^#define CONFIG_SYS_THUMB_BUILD	/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/taurus.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/tbs2910.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/tricorder.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	include/configs/x600.h	/^#define CONFIG_SYS_THUMB_BUILD$/;"	d
CONFIG_SYS_THUMB_BUILD	spl/include/autoconf.mk	/^CONFIG_SYS_THUMB_BUILD=y$/;"	m
CONFIG_SYS_TIMERBASE	include/configs/am3517_crane.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/am3517_evm.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/bur_am335x_common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/calimain.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/cm_t35.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/cm_t3517.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/cm_t43.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/da850evm.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ea20.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/integrator-common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ipam390.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/kc1.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/legoev3.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/mcx.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/nokia_rx51.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/omap3_evm.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/omapl138_lcdk.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/siemens-am33x-common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/sniper.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/tam3517-common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/tao3530.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_TIMERBASE /;"	d
CONFIG_SYS_TIMERBASE	include/configs/ti_am335x_common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ti_omap3_common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ti_omap4_common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/ti_omap5_common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/tricorder.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMERBASE	include/configs/zynq-common.h	/^#define CONFIG_SYS_TIMERBASE	/;"	d
CONFIG_SYS_TIMER_BASE	include/configs/rk3036_common.h	/^#define CONFIG_SYS_TIMER_BASE	/;"	d
CONFIG_SYS_TIMER_BASE	include/configs/rk3288_common.h	/^#define	CONFIG_SYS_TIMER_BASE	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/include/asm/arch-pxa/config.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/at91sam9260.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/at91sam9261.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/at91sam9263.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/at91sam9g45.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/at91sam9rl.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	arch/sparc/include/asm/config.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/highbank.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/mx25pdk.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/rk3036_common.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/rk3288_common.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/rpi.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/socfpga_common.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/tegra-common.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/vexpress_common.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/zmx25.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTER	include/configs/zynq-common.h	/^#define CONFIG_SYS_TIMER_COUNTER	/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	arch/sparc/include/asm/config.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	include/configs/highbank.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	include/configs/socfpga_common.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	include/configs/vexpress_common.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_COUNTS_DOWN	include/configs/zynq-common.h	/^#define CONFIG_SYS_TIMER_COUNTS_DOWN$/;"	d
CONFIG_SYS_TIMER_PRESCALER	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TIMER_PRESCALER	/;"	d
CONFIG_SYS_TIMER_PRESCALER	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TIMER_PRESCALER /;"	d
CONFIG_SYS_TIMER_RATE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define	CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define	CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	arch/arm/include/asm/arch-pxa/config.h	/^#define	CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	arch/arm/mach-mvebu/include/mach/config.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	arch/sparc/include/asm/config.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/axs10x.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/bcm23550_w1d.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/bcm28155_ap.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/highbank.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/mx25pdk.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/nsim.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/rk3036_common.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/rk3288_common.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/rpi.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/sandbox.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/socfpga_common.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/tb100.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/tegra-common.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/uniphier.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/vexpress_common.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TIMER_RATE	include/configs/zmx25.h	/^#define CONFIG_SYS_TIMER_RATE	/;"	d
CONFIG_SYS_TLB_FOR_BOOT_FLASH	arch/powerpc/cpu/ppc4xx/start.S	/^#define CONFIG_SYS_TLB_FOR_BOOT_FLASH	/;"	d	file:
CONFIG_SYS_TLB_FOR_BOOT_FLASH	include/configs/sequoia.h	/^#define CONFIG_SYS_TLB_FOR_BOOT_FLASH	/;"	d
CONFIG_SYS_TMCNTSC	include/configs/km82xx.h	/^#define CONFIG_SYS_TMCNTSC /;"	d
CONFIG_SYS_TMPVIRT	include/configs/qemu-ppce500.h	/^#define CONFIG_SYS_TMPVIRT	/;"	d
CONFIG_SYS_TMRINTR_MASK	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRINTR_MASK	/;"	d
CONFIG_SYS_TMRINTR_NO	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRINTR_NO	/;"	d
CONFIG_SYS_TMRINTR_NO	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRINTR_NO /;"	d
CONFIG_SYS_TMRINTR_PEND	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRINTR_PEND	/;"	d
CONFIG_SYS_TMRINTR_PRI	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRINTR_PRI	/;"	d
CONFIG_SYS_TMRINTR_PRI	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRINTR_PRI /;"	d
CONFIG_SYS_TMRPND_REG	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMRPND_REG	/;"	d
CONFIG_SYS_TMR_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMR_BASE	/;"	d
CONFIG_SYS_TMR_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_TMR_BASE /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/MigoR.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/alt.h	/^#define CONFIG_SYS_TMU_CLK_DIV /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/ap325rxa.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/ap_sh4a_4a.h	/^#define CONFIG_SYS_TMU_CLK_DIV /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/armadillo-800eva.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/blanche.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/ecovec.h	/^#define CONFIG_SYS_TMU_CLK_DIV /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/espt.h	/^#define CONFIG_SYS_TMU_CLK_DIV /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/gose.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/koelsch.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/lager.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/mpr2.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/ms7720se.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/ms7722se.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/ms7750se.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/porter.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/r0p7734.h	/^#define CONFIG_SYS_TMU_CLK_DIV /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/r2dplus.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/r7780mp.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/sh7752evb.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/sh7753evb.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/sh7757lcr.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/sh7763rdp.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/sh7785lcr.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/shmin.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/silk.h	/^#define CONFIG_SYS_TMU_CLK_DIV /;"	d
CONFIG_SYS_TMU_CLK_DIV	include/configs/stout.h	/^#define CONFIG_SYS_TMU_CLK_DIV	/;"	d
CONFIG_SYS_TSEC1	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/TQM834x.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/hrcon.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/sbc8349.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/strider.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1	include/configs/vme8349.h	/^#define CONFIG_SYS_TSEC1	/;"	d
CONFIG_SYS_TSEC1_OFFSET	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	arch/powerpc/include/asm/immap_83xx.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	arch/powerpc/include/asm/immap_85xx.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	arch/powerpc/include/asm/immap_86xx.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_TSEC1_OFFSET /;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/TQM834x.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/hrcon.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/ids8313.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/sbc8349.h	/^#define CONFIG_SYS_TSEC1_OFFSET /;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/strider.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/ve8313.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC1_OFFSET	include/configs/vme8349.h	/^#define CONFIG_SYS_TSEC1_OFFSET	/;"	d
CONFIG_SYS_TSEC2	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/TQM834x.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/sbc8349.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2	include/configs/vme8349.h	/^#define CONFIG_SYS_TSEC2	/;"	d
CONFIG_SYS_TSEC2_OFFSET	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC8315ERDB.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_TSEC2_OFFSET /;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC837XEMDS.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/TQM834x.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/ids8313.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/mpc8308_p1m.h	/^#define CONFIG_SYS_TSEC2_OFFSET	/;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/sbc8349.h	/^#define CONFIG_SYS_TSEC2_OFFSET /;"	d
CONFIG_SYS_TSEC2_OFFSET	include/configs/vme8349.h	/^#define CONFIG_SYS_TSEC2_OFFSET /;"	d
CONFIG_SYS_TSEC3_OFFSET	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_TSEC3_OFFSET	/;"	d
CONFIG_SYS_TX_ETH_BUFFER	include/configs/M53017EVB.h	/^#	define CONFIG_SYS_TX_ETH_BUFFER	/;"	d
CONFIG_SYS_TX_ETH_BUFFER	include/configs/M54418TWR.h	/^#define CONFIG_SYS_TX_ETH_BUFFER	/;"	d
CONFIG_SYS_TX_ETH_BUFFER	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_TX_ETH_BUFFER	/;"	d
CONFIG_SYS_TX_ETH_BUFFER	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_TX_ETH_BUFFER	/;"	d
CONFIG_SYS_UART2_ALT3_GPIO	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_UART2_ALT3_GPIO$/;"	d
CONFIG_SYS_UART_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_UART_BASE	/;"	d
CONFIG_SYS_UART_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_UART_BASE /;"	d
CONFIG_SYS_UART_BASE	include/configs/intip.h	/^#define CONFIG_SYS_UART_BASE	/;"	d
CONFIG_SYS_UART_BASE	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_UART_BASE	/;"	d
CONFIG_SYS_UART_BAUD	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_UART_BAUD	/;"	d
CONFIG_SYS_UART_FREQ	include/configs/openrisc-generic.h	/^#define CONFIG_SYS_UART_FREQ	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5208EVBE.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M52277EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5235EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5249EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5253DEMO.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5253EVBE.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5272C3.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5275EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5282EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M53017EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5329EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5373EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M54418TWR.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M54451EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M54455EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5475EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/M5485EVB.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/amcore.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/cobra5272.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UART_PORT	include/configs/s32v234evb.h	/^#define CONFIG_SYS_UART_PORT	/;"	d
CONFIG_SYS_UBOOT_BASE	include/configs/a3m071.h	/^#define CONFIG_SYS_UBOOT_BASE	/;"	d
CONFIG_SYS_UBOOT_BASE	include/configs/edminiv2.h	/^#define CONFIG_SYS_UBOOT_BASE	/;"	d
CONFIG_SYS_UBOOT_BASE	include/configs/microblaze-generic.h	/^# define CONFIG_SYS_UBOOT_BASE	/;"	d
CONFIG_SYS_UBOOT_BASE	include/configs/rpi.h	/^#define CONFIG_SYS_UBOOT_BASE	/;"	d
CONFIG_SYS_UBOOT_BASE	include/configs/uniphier.h	/^#define CONFIG_SYS_UBOOT_BASE	/;"	d
CONFIG_SYS_UBOOT_BASE	include/configs/x600.h	/^#define CONFIG_SYS_UBOOT_BASE	/;"	d
CONFIG_SYS_UBOOT_END	include/configs/M52277EVB.h	/^#define CONFIG_SYS_UBOOT_END	/;"	d
CONFIG_SYS_UBOOT_END	include/configs/M54418TWR.h	/^#define CONFIG_SYS_UBOOT_END	/;"	d
CONFIG_SYS_UBOOT_END	include/configs/M54451EVB.h	/^#define CONFIG_SYS_UBOOT_END	/;"	d
CONFIG_SYS_UBOOT_END	include/configs/M54455EVB.h	/^#	define CONFIG_SYS_UBOOT_END	/;"	d
CONFIG_SYS_UBOOT_START	Makefile	/^CONFIG_SYS_UBOOT_START := 0$/;"	m
CONFIG_SYS_UBOOT_START	common/spl/spl.c	/^#define CONFIG_SYS_UBOOT_START	/;"	d	file:
CONFIG_SYS_UBOOT_START	include/configs/a3m071.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UBOOT_START	include/configs/edminiv2.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UBOOT_START	include/configs/microblaze-generic.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UBOOT_START	include/configs/omap3_cairo.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UBOOT_START	include/configs/tegra-common.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UBOOT_START	include/configs/x600.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UBOOT_START	include/configs/zynq-common.h	/^#define CONFIG_SYS_UBOOT_START	/;"	d
CONFIG_SYS_UCC_RGMII_MODE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UCC_RGMII_MODE	/;"	d
CONFIG_SYS_UDELAY_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_UDELAY_BASE	/;"	d
CONFIG_SYS_UDELAY_BASE	arch/m68k/include/asm/immap.h	/^#define CONFIG_SYS_UDELAY_BASE /;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE	/;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE	/;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE /;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE /;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE	/;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE	/;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE	/;"	d
CONFIG_SYS_UEC1_ETH_TYPE	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_ETH_TYPE	/;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC1_INTERFACE_SPEED	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC1_INTERFACE_TYPE	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR	/;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR	/;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR /;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR /;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR	/;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR	/;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR	/;"	d
CONFIG_SYS_UEC1_PHY_ADDR	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_PHY_ADDR	/;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_RX_CLK	/;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_RX_CLK	/;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_RX_CLK /;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_RX_CLK /;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_RX_CLK	/;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_RX_CLK	/;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_RX_CLK	/;"	d
CONFIG_SYS_UEC1_RX_CLK	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_RX_CLK	/;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_TX_CLK	/;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_TX_CLK	/;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_TX_CLK /;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_TX_CLK /;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_TX_CLK	/;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_TX_CLK	/;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_TX_CLK	/;"	d
CONFIG_SYS_UEC1_TX_CLK	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_TX_CLK	/;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC1_UCC_NUM	/;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC1_UCC_NUM	/;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC1_UCC_NUM /;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC1_UCC_NUM /;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/km/km83xx-common.h	/^#define CONFIG_SYS_UEC1_UCC_NUM	/;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC1_UCC_NUM	/;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC1_UCC_NUM	/;"	d
CONFIG_SYS_UEC1_UCC_NUM	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC1_UCC_NUM	/;"	d
CONFIG_SYS_UEC2_ETH_TYPE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_ETH_TYPE	/;"	d
CONFIG_SYS_UEC2_ETH_TYPE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_ETH_TYPE	/;"	d
CONFIG_SYS_UEC2_ETH_TYPE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_ETH_TYPE /;"	d
CONFIG_SYS_UEC2_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_ETH_TYPE /;"	d
CONFIG_SYS_UEC2_ETH_TYPE	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_ETH_TYPE	/;"	d
CONFIG_SYS_UEC2_INTERFACE_SPEED	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC2_INTERFACE_SPEED	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC2_INTERFACE_SPEED	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC2_INTERFACE_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC2_INTERFACE_SPEED	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC2_INTERFACE_TYPE	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC2_INTERFACE_TYPE	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC2_INTERFACE_TYPE	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC2_INTERFACE_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC2_INTERFACE_TYPE	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_INTERFACE_TYPE	/;"	d
CONFIG_SYS_UEC2_PHY_ADDR	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_PHY_ADDR	/;"	d
CONFIG_SYS_UEC2_PHY_ADDR	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_PHY_ADDR	/;"	d
CONFIG_SYS_UEC2_PHY_ADDR	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_PHY_ADDR /;"	d
CONFIG_SYS_UEC2_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_PHY_ADDR /;"	d
CONFIG_SYS_UEC2_PHY_ADDR	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_PHY_ADDR	/;"	d
CONFIG_SYS_UEC2_RX_CLK	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_RX_CLK	/;"	d
CONFIG_SYS_UEC2_RX_CLK	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_RX_CLK	/;"	d
CONFIG_SYS_UEC2_RX_CLK	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_RX_CLK /;"	d
CONFIG_SYS_UEC2_RX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_RX_CLK /;"	d
CONFIG_SYS_UEC2_RX_CLK	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_RX_CLK	/;"	d
CONFIG_SYS_UEC2_TX_CLK	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_TX_CLK	/;"	d
CONFIG_SYS_UEC2_TX_CLK	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_TX_CLK	/;"	d
CONFIG_SYS_UEC2_TX_CLK	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_TX_CLK /;"	d
CONFIG_SYS_UEC2_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_TX_CLK /;"	d
CONFIG_SYS_UEC2_TX_CLK	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_TX_CLK	/;"	d
CONFIG_SYS_UEC2_UCC_NUM	include/configs/MPC8323ERDB.h	/^#define CONFIG_SYS_UEC2_UCC_NUM	/;"	d
CONFIG_SYS_UEC2_UCC_NUM	include/configs/MPC832XEMDS.h	/^#define CONFIG_SYS_UEC2_UCC_NUM	/;"	d
CONFIG_SYS_UEC2_UCC_NUM	include/configs/MPC8568MDS.h	/^#define CONFIG_SYS_UEC2_UCC_NUM /;"	d
CONFIG_SYS_UEC2_UCC_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC2_UCC_NUM /;"	d
CONFIG_SYS_UEC2_UCC_NUM	include/configs/suvd3.h	/^#define CONFIG_SYS_UEC2_UCC_NUM	/;"	d
CONFIG_SYS_UEC3_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_ETH_TYPE	/;"	d
CONFIG_SYS_UEC3_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_ETH_TYPE /;"	d
CONFIG_SYS_UEC3_INTERFACE_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC3_INTERFACE_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC3_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_PHY_ADDR	/;"	d
CONFIG_SYS_UEC3_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_PHY_ADDR /;"	d
CONFIG_SYS_UEC3_RX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_RX_CLK /;"	d
CONFIG_SYS_UEC3_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_TX_CLK	/;"	d
CONFIG_SYS_UEC3_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_TX_CLK /;"	d
CONFIG_SYS_UEC3_UCC_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC3_UCC_NUM /;"	d
CONFIG_SYS_UEC4_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_ETH_TYPE	/;"	d
CONFIG_SYS_UEC4_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_ETH_TYPE /;"	d
CONFIG_SYS_UEC4_INTERFACE_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC4_INTERFACE_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC4_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_PHY_ADDR	/;"	d
CONFIG_SYS_UEC4_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_PHY_ADDR /;"	d
CONFIG_SYS_UEC4_RX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_RX_CLK /;"	d
CONFIG_SYS_UEC4_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_TX_CLK	/;"	d
CONFIG_SYS_UEC4_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_TX_CLK /;"	d
CONFIG_SYS_UEC4_UCC_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC4_UCC_NUM /;"	d
CONFIG_SYS_UEC5_ETH_TYPE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_ETH_TYPE	/;"	d
CONFIG_SYS_UEC5_ETH_TYPE	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_ETH_TYPE	/;"	d
CONFIG_SYS_UEC5_INTERFACE_SPEED	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC5_INTERFACE_SPEED	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_INTERFACE_SPEED	/;"	d
CONFIG_SYS_UEC5_INTERFACE_TYPE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC5_INTERFACE_TYPE	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC5_PHY_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_PHY_ADDR	/;"	d
CONFIG_SYS_UEC5_PHY_ADDR	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_PHY_ADDR	/;"	d
CONFIG_SYS_UEC5_RX_CLK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_RX_CLK	/;"	d
CONFIG_SYS_UEC5_RX_CLK	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_RX_CLK	/;"	d
CONFIG_SYS_UEC5_TX_CLK	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_TX_CLK	/;"	d
CONFIG_SYS_UEC5_TX_CLK	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_TX_CLK	/;"	d
CONFIG_SYS_UEC5_UCC_NUM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_UEC5_UCC_NUM	/;"	d
CONFIG_SYS_UEC5_UCC_NUM	include/configs/p1_twr.h	/^#define CONFIG_SYS_UEC5_UCC_NUM	/;"	d
CONFIG_SYS_UEC6_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_ETH_TYPE /;"	d
CONFIG_SYS_UEC6_INTERFACE_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC6_INTERFACE_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC6_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_PHY_ADDR /;"	d
CONFIG_SYS_UEC6_RX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_RX_CLK /;"	d
CONFIG_SYS_UEC6_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_TX_CLK /;"	d
CONFIG_SYS_UEC6_UCC_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC6_UCC_NUM /;"	d
CONFIG_SYS_UEC8_ETH_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_ETH_TYPE /;"	d
CONFIG_SYS_UEC8_INTERFACE_SPEED	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_INTERFACE_SPEED /;"	d
CONFIG_SYS_UEC8_INTERFACE_TYPE	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_INTERFACE_TYPE /;"	d
CONFIG_SYS_UEC8_PHY_ADDR	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_PHY_ADDR /;"	d
CONFIG_SYS_UEC8_RX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_RX_CLK /;"	d
CONFIG_SYS_UEC8_TX_CLK	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_TX_CLK /;"	d
CONFIG_SYS_UEC8_UCC_NUM	include/configs/MPC8569MDS.h	/^#define CONFIG_SYS_UEC8_UCC_NUM /;"	d
CONFIG_SYS_UHC0_EHCI_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_UHC0_EHCI_BASE	/;"	d
CONFIG_SYS_UHC1_EHCI_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_UHC1_EHCI_BASE	/;"	d
CONFIG_SYS_ULB_CLK	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_SYS_ULB_CLK	/;"	d
CONFIG_SYS_UMCR	include/configs/PATI.h	/^#define CONFIG_SYS_UMCR	/;"	d
CONFIG_SYS_UNIFY_CACHE	include/configs/M53017EVB.h	/^#define CONFIG_SYS_UNIFY_CACHE$/;"	d
CONFIG_SYS_UNIFY_CACHE	include/configs/M5329EVB.h	/^#define CONFIG_SYS_UNIFY_CACHE$/;"	d
CONFIG_SYS_UNIFY_CACHE	include/configs/M5373EVB.h	/^#define CONFIG_SYS_UNIFY_CACHE$/;"	d
CONFIG_SYS_UNIFY_CACHE	include/configs/astro_mcf5373l.h	/^#define CONFIG_SYS_UNIFY_CACHE$/;"	d
CONFIG_SYS_UNSPEC_PHYID	drivers/net/mcfmii.c	/^#	define CONFIG_SYS_UNSPEC_PHYID	/;"	d	file:
CONFIG_SYS_UNSPEC_STRID	drivers/net/mcfmii.c	/^#	define CONFIG_SYS_UNSPEC_STRID	/;"	d	file:
CONFIG_SYS_UPDATE_FLASH_SIZE	include/configs/MIP405.h	/^#define CONFIG_SYS_UPDATE_FLASH_SIZE$/;"	d
CONFIG_SYS_UPDATE_FLASH_SIZE	include/configs/PIP405.h	/^#define CONFIG_SYS_UPDATE_FLASH_SIZE$/;"	d
CONFIG_SYS_UPDATE_FLASH_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_UPDATE_FLASH_SIZE$/;"	d
CONFIG_SYS_UPDATE_FLASH_SIZE	include/configs/jupiter.h	/^#define CONFIG_SYS_UPDATE_FLASH_SIZE	/;"	d
CONFIG_SYS_USB2D0_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_USB2D0_BASE	/;"	d
CONFIG_SYS_USB2D0_BASE	include/configs/lwmon5.h	/^#define CONFIG_SYS_USB2D0_BASE	/;"	d
CONFIG_SYS_USB2D0_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_USB2D0_BASE	/;"	d
CONFIG_SYS_USBD_BASE	arch/arm/include/asm/arch-spear/hardware.h	/^#define CONFIG_SYS_USBD_BASE	/;"	d
CONFIG_SYS_USB_DEVICE	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_DEVICE	/;"	d
CONFIG_SYS_USB_DEVICE	include/configs/bamboo.h	/^#define CONFIG_SYS_USB_DEVICE /;"	d
CONFIG_SYS_USB_DEVICE	include/configs/gdppc440etx.h	/^#define CONFIG_SYS_USB_DEVICE	/;"	d
CONFIG_SYS_USB_DEVICE	include/configs/lwmon5.h	/^#define CONFIG_SYS_USB_DEVICE	/;"	d
CONFIG_SYS_USB_DEVICE	include/configs/sequoia.h	/^#define CONFIG_SYS_USB_DEVICE	/;"	d
CONFIG_SYS_USB_DEVICE	include/configs/yosemite.h	/^#define CONFIG_SYS_USB_DEVICE /;"	d
CONFIG_SYS_USB_EHCI_CPU_INIT	include/configs/M52277EVB.h	/^#define CONFIG_SYS_USB_EHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	drivers/usb/host/ehci.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/autoconf.mk	/^CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS=y$/;"	m
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/MPC8572DS.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/cm_t54.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/corvus.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/duovero.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/exynos5-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/mcx.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/mx35pdk.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/odroid.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/omap3_beagle.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/omap3_overo.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/omap4_panda.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/omap5_uevm.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/picosam9g45.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/sama5d2_ptc.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/snapper9g45.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/sunxi-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tam3517-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tao3530.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tegra114-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tegra124-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tegra20-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tegra210-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/tegra30-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/vinco.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	include/configs/x86-common.h	/^#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	spl/include/autoconf.mk	/^CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS=y$/;"	m
CONFIG_SYS_USB_EHCI_REGS_BASE	include/configs/M52277EVB.h	/^#define CONFIG_SYS_USB_EHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_EVENT_POLL	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL$/;"	c	choice:choiced4ee1e2d0104
CONFIG_SYS_USB_EVENT_POLL	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_USB_EVENT_POLL	/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_USB_EVENT_POLL	/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/am3517_crane.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/am3517_evm.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/cyrus.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/mx6cuboxi.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/omap3_evm.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/rpi.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/tegra-common-post.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL	include/configs/x86-common.h	/^#define CONFIG_SYS_USB_EVENT_POLL$/;"	d
CONFIG_SYS_USB_EVENT_POLL_MODULE	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL$/;"	c	choice:choiced4ee1e2d0104
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	c	choice:choiced4ee1e2d0104
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	include/configs/advantech_dms-ba16.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	include/configs/cgtqmx6eval.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	include/configs/ge_bx50v3.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	include/configs/gw_ventana.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP	include/configs/novena.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP_MODULE	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	c	choice:choiced4ee1e2d0104
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL_VIA_INT_QUEUE$/;"	c	choice:choiced4ee1e2d0104
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE	include/configs/sunxi-common.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE	include/configs/tbs2910.h	/^#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE$/;"	d
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE_MODULE	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL_VIA_INT_QUEUE$/;"	c	choice:choiced4ee1e2d0104
CONFIG_SYS_USB_FAT_BOOT_PARTITION	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_USB_FAT_BOOT_PARTITION	/;"	d
CONFIG_SYS_USB_HOST	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_USB_HOST	/;"	d
CONFIG_SYS_USB_HOST	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_HOST	/;"	d
CONFIG_SYS_USB_HOST	include/configs/acadia.h	/^#define CONFIG_SYS_USB_HOST	/;"	d
CONFIG_SYS_USB_HOST	include/configs/lwmon5.h	/^#define CONFIG_SYS_USB_HOST	/;"	d
CONFIG_SYS_USB_HOST	include/configs/sequoia.h	/^#define CONFIG_SYS_USB_HOST	/;"	d
CONFIG_SYS_USB_OHCI_BOARD_INIT	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_OHCI_BOARD_INIT /;"	d
CONFIG_SYS_USB_OHCI_BOARD_INIT	include/configs/canyonlands.h	/^#define CONFIG_SYS_USB_OHCI_BOARD_INIT$/;"	d
CONFIG_SYS_USB_OHCI_BOARD_INIT	include/configs/pxa-common.h	/^#define	CONFIG_SYS_USB_OHCI_BOARD_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/TQM5200.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/a4m072.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/edb93xx.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/ethernut5.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/ipek01.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/pm9261.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/pm9263.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/pm9g45.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/pxa-common.h	/^#define	CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/sequoia.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/smartweb.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/snapper9260.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/taurus.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/usb_a9263.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT$/;"	d
CONFIG_SYS_USB_OHCI_CPU_INIT	include/configs/yosemite.h	/^#define CONFIG_SYS_USB_OHCI_CPU_INIT	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/autoconf.mk	/^CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=y$/;"	m
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/PLU405.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/TQM5200.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/a4m072.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/axs10x.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/canyonlands.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/edb93xx.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/ethernut5.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/intip.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/ipek01.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/pm9261.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/pm9263.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/pm9g45.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/pxa-common.h	/^#define	CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/sequoia.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/smartweb.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/snapper9260.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/socrates.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/sunxi-common.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/taurus.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/usb_a9263.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	include/configs/yosemite.h	/^#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	spl/include/autoconf.mk	/^CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=y$/;"	m
CONFIG_SYS_USB_OHCI_REGS_BASE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/TQM5200.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/a4m072.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/canyonlands.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/edb93xx.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/ethernut5.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/intip.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/ipek01.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/pm9261.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/pm9263.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/pm9g45.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/pxa-common.h	/^#define	CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/sequoia.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/smartweb.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/snapper9260.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/taurus.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/usb_a9263.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_REGS_BASE	include/configs/yosemite.h	/^#define CONFIG_SYS_USB_OHCI_REGS_BASE	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/M5475EVB.h	/^#	define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/M5485EVB.h	/^#	define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/PLU405.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/PMC440.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/TQM5200.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/a4m072.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/at91sam9260ek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/canyonlands.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/edb93xx.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/ethernut5.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/intip.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/ipek01.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/pm9261.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/pm9263.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/pm9g45.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/pxa-common.h	/^#define	CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/sequoia.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/smartweb.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/snapper9260.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/socrates.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/taurus.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/usb_a9263.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_OHCI_SLOT_NAME	include/configs/yosemite.h	/^#define CONFIG_SYS_USB_OHCI_SLOT_NAME	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/am43xx_evm.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/am57xx_evm.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/cm_t43.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/dra7xx_evm.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/exynos5-common.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1012afrdm.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1012aqds.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1012ardb.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls2080aqds.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ls2080ardb.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/rk3399_common.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/uniphier.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	/;"	d
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	include/configs/xilinx_zynqmp.h	/^#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS /;"	d
CONFIG_SYS_USER_SWITCHES_BASE	include/configs/sbc8548.h	/^#define CONFIG_SYS_USER_SWITCHES_BASE	/;"	d
CONFIG_SYS_USE_FLASH	include/configs/pm9261.h	/^#define CONFIG_SYS_USE_FLASH	/;"	d
CONFIG_SYS_USE_FLASH	include/configs/pm9263.h	/^#define CONFIG_SYS_USE_FLASH	/;"	d
CONFIG_SYS_USE_MAIN_OSCILLATOR	include/configs/at91rm9200ek.h	/^#define CONFIG_SYS_USE_MAIN_OSCILLATOR$/;"	d
CONFIG_SYS_USE_MPC834XSYS_USB_PHY	include/configs/MPC8349EMDS.h	/^#define CONFIG_SYS_USE_MPC834XSYS_USB_PHY	/;"	d
CONFIG_SYS_USE_NAND	include/configs/ea20.h	/^#define	CONFIG_SYS_USE_NAND$/;"	d
CONFIG_SYS_USE_NANDFLASH	include/configs/pm9g45.h	/^#define CONFIG_SYS_USE_NANDFLASH	/;"	d
CONFIG_SYS_USE_NANDFLASH	include/configs/smartweb.h	/^#define CONFIG_SYS_USE_NANDFLASH	/;"	d
CONFIG_SYS_USE_NANDFLASH	include/configs/taurus.h	/^#define CONFIG_SYS_USE_NANDFLASH	/;"	d
CONFIG_SYS_USE_NORFLASH	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_USE_NORFLASH$/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM823L.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM823M.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM850L.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM850M.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM855L.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM855M.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM860L.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM860M.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM862L.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM862M.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/TQM866M.h	/^#define	CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_PPCENV	include/configs/inka4x0.h	/^#define CONFIG_SYS_USE_PPCENV	/;"	d
CONFIG_SYS_USE_SERIALFLASH	include/configs/ma5d4evk.h	/^#define CONFIG_SYS_USE_SERIALFLASH	/;"	d
CONFIG_SYS_USE_UBI	include/configs/km/km_arm.h	/^#define CONFIG_SYS_USE_UBI$/;"	d
CONFIG_SYS_USE_UBI	include/configs/vct.h	/^#define CONFIG_SYS_USE_UBI$/;"	d
CONFIG_SYS_USR_EXCEP	include/configs/microblaze-generic.h	/^#define	CONFIG_SYS_USR_EXCEP	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/am3517_crane.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/am3517_evm.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/brppt1.h	/^ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/brxre1.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/clearfog.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/cm_fx6.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/cm_t35.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/cm_t54.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/draco.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/etamin.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/imx6_spl.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ls1043a_common.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ls1046a_common.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/omap3_evm.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/picosam9g45.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/pxm2.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/rastaban.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/rut.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/sama5d3_xplained.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/tao3530.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/thuban.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ti814x_evm.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS /;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ti816x_evm.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS /;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/ti_armv7_common.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/woodburn_sd.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	/;"	d
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	include/configs/zynq-common.h	/^#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS /;"	d
CONFIG_SYS_U_BOOT_OFFS	include/configs/clearfog.h	/^#define CONFIG_SYS_U_BOOT_OFFS	/;"	d
CONFIG_SYS_U_BOOT_OFFS	include/configs/db-88f6720.h	/^#define CONFIG_SYS_U_BOOT_OFFS	/;"	d
CONFIG_SYS_U_BOOT_OFFS	include/configs/db-88f6820-amc.h	/^#define CONFIG_SYS_U_BOOT_OFFS	/;"	d
CONFIG_SYS_U_BOOT_OFFS	include/configs/db-88f6820-gp.h	/^#define CONFIG_SYS_U_BOOT_OFFS	/;"	d
CONFIG_SYS_U_BOOT_OFFS	include/configs/db-mv784mp-gp.h	/^#define CONFIG_SYS_U_BOOT_OFFS	/;"	d
CONFIG_SYS_U_BOOT_OFFS	include/configs/theadorable.h	/^#define CONFIG_SYS_U_BOOT_OFFS	/;"	d
CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR	/;"	d
CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN	/;"	d
CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT	/;"	d
CONFIG_SYS_VCXK_BASE	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_BASE	/;"	d
CONFIG_SYS_VCXK_DEFAULT_LINEALIGN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN	/;"	d
CONFIG_SYS_VCXK_DOUBLEBUFFERED	include/configs/eb_cpu5282.h	/^#define	CONFIG_SYS_VCXK_DOUBLEBUFFERED	/;"	d
CONFIG_SYS_VCXK_ENABLE_DDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_ENABLE_DDR	/;"	d
CONFIG_SYS_VCXK_ENABLE_PIN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_ENABLE_PIN	/;"	d
CONFIG_SYS_VCXK_ENABLE_PORT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_ENABLE_PORT	/;"	d
CONFIG_SYS_VCXK_INVERT_DDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_INVERT_DDR	/;"	d
CONFIG_SYS_VCXK_INVERT_PIN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_INVERT_PIN	/;"	d
CONFIG_SYS_VCXK_INVERT_PORT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_INVERT_PORT	/;"	d
CONFIG_SYS_VCXK_REQUEST_DDR	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_REQUEST_DDR	/;"	d
CONFIG_SYS_VCXK_REQUEST_PIN	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_REQUEST_PIN	/;"	d
CONFIG_SYS_VCXK_REQUEST_PORT	include/configs/eb_cpu5282.h	/^#define CONFIG_SYS_VCXK_REQUEST_PORT	/;"	d
CONFIG_SYS_VENDOR	arch/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	arch/arm/mach-bcm283x/Kconfig	/^config SYS_VENDOR$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_VENDOR	arch/arm/mach-integrator/Kconfig	/^config SYS_VENDOR$/;"	c	menu:Integrator Options
CONFIG_SYS_VENDOR	arch/arm/mach-mvebu/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	arch/arm/mach-socfpga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	arch/arm/mach-zynq/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	arch/sparc/Kconfig	/^config SYS_VENDOR$/;"	c	menu:SPARC architecture
CONFIG_SYS_VENDOR	board/8dtech/eco5pk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Arcturus/ucp1020/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Barix/ipam390/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/BuR/brppt1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/BuR/brxre1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/BuS/eb_cpu5282/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/CarMediaLab/flea3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/LaCie/edminiv2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/LaCie/net2big_v2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/LaCie/netspace_v2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Marvell/aspenite/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Marvell/dreamplug/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Marvell/gplugd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Marvell/guruplug/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Marvell/openrd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Marvell/sheevaplug/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Seagate/dockstar/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Seagate/goflexhome/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Seagate/nas220/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/Synology/ds109/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/abilis/tb100/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/advantech/dms-ba16/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amazon/kc1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/acadia/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/bamboo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/bubinga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/canyonlands/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/katmai/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/kilauea/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/luan/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/makalu/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/redwood/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/sequoia/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/walnut/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/yosemite/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amcc/yucca/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/amlogic/odroid-c2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/armadeus/apf27/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/armltd/vexpress/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/armltd/vexpress64/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/astro/mcf5373l/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91rm9200ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9260ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9261ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9263ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9rlek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/atngw100/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/atngw100mkii/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/atstk1000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/sama5d3xek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/atmel/sama5d4ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/avionic-design/medcom-wide/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/avionic-design/plutux/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/avionic-design/tec-ng/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/avionic-design/tec/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/bachmann/ot1200/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/barco/platinum/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/barco/titanium/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/birdland/bav335x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/bluegiga/apx4devkit/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/bluewater/gurnard/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/bluewater/snapper9260/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/bosch/shc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/boundary/nitrogen6x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/broadcom/bcmcygnus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/broadcom/bcmnsp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/buffalo/lsxl/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/cadence/xtfpga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/calao/usb_a9263/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/cavium/thunderx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ccv/xpress/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/cei/cei-tk1-som/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/cirrus/edb93xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/cloudengines/pogo_e02/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compal/paz00/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/cm_fx6/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/cm_t335/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/cm_t35/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/cm_t3517/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/cm_t43/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/cm_t54/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/compulab/trimslice/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/coreboot/coreboot/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/corscience/tricorder/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/creative/xfi3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/d-link/dns325/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/davedenx/aria/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/davinci/da8xxevm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/davinci/ea20/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/denx/m28evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/denx/m53evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/denx/ma5d4evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/dfi/dfi-bt700/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/efi/efi-x86/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/egnite/ethernut5/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/el/el6x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/embest/mx6boards/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/emulation/qemu-x86/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/engicam/icorem6/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/cpci2dp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/cpci405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/mecp5123/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/meesc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/plu405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/pmc405de/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/pmc440/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/vme8349/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/esd/vom405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/firefly/firefly-rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/b4860qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/bsc9131rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/bsc9132qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/c29xpcie/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/corenet_ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1012afrdm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1012aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1012ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1021aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1021atwr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1043aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1043ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1046aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls1046ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls2080a/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls2080aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/ls2080ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5208evbe/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m52277evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5235evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5249evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5253demo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5253evbe/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5272c3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5275evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5282evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m53017evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5329evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m5373evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m54418twr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m54451evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m54455evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m547xevb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/m548xevb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc5121ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8308rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8313erdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8315erdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8323erdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc832xemds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8349emds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8349itx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc837xemds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc837xerdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8536ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8540ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8541cds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8544ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8548cds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8555cds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8560ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8568mds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8569mds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8572ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx23evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx25pdk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx28evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx31ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx31pdk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx35pdk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx51evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx53ard/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx53evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx53loco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx53smd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6qarm2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6sabresd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6slevk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx6ullevk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/mx7dsabresd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/p1010rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/p1022ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/p1023rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/p1_twr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/p2041rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/qemu-ppce500/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/s32v234evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t102xqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t102xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t1040qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t104xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t208xqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t208xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t4qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/t4rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/freescale/vf610twr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gateworks/gw_ventana/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/405ep/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/405ex/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/dlvision/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/gdppc440etx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/intip/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/mpc8308/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gdsys/p1022/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ge/bx50v3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/google/chromebook_jerry/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/google/chromebook_link/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/google/chromebook_samus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/google/chromebox_panther/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gumstix/duovero/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/gumstix/pepper/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/hisilicon/hikey/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/htkw/mcx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ids/ids8313/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ifm/ac14xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ifm/o2dnt2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/imgtec/boston/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/imgtec/malta/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/imgtec/xilfpga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/in-circuit/grasshopper/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/intel/bayleybay/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/intel/cougarcanyon2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/intel/crownbay/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/intel/galileo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/intel/minnowmax/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/inversepath/usbarmory/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/iomega/iconnect/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/isee/igep0033/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/isee/igep00x0/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/keymile/km82xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/keymile/km83xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/keymile/km_arm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/keymile/kmp204x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/kmc/kzm9g/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/kosagi/novena/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/l+g/vinco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/lego/ev3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/lg/sniper/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/liebherr/lwmon5/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/logicpd/am3517evm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/logicpd/omap3som/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/logicpd/zoom1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/microchip/pic32mzda/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/micronas/vct/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/mini-box/picosam9g45/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/mosaixtech/icon/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/mpl/mip405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/mpl/pati/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/mpl/pip405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/mpl/vcma9/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nokia/rx51/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/beaver/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/cardhu/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/dalmore/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/e2220-1170/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/harmony/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/jetson-tk1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/nyan-big/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/p2371-0000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/p2371-2180/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/p2571/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/p2771-0000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/seaboard/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/venice2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/ventana/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/nvidia/whistler/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/omicron/calimain/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/openrisc/openrisc-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/phytec/pcm030/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/phytec/pcm051/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/phytec/pcm052/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/phytec/pcm058/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ppcag/bg0900/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/qca/ap121/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/qca/ap143/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/quipos/cairo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/radxa/rock2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/raidsonic/ib62x0/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/MigoR/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/alt/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/ap325rxa/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/blanche/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/ecovec/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/gose/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/koelsch/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/lager/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/porter/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/r0p7734/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/r2dplus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/r7780mp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/rsk7203/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/rsk7264/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/rsk7269/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/salvator-x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/sh7752evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/sh7753evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/sh7757lcr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/sh7763rdp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/sh7785lcr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/silk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/renesas/stout/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/rockchip/evb_rk3036/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/rockchip/evb_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/rockchip/evb_rk3399/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ronetix/pm9261/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ronetix/pm9263/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ronetix/pm9g45/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/arndale/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/espresso7420/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/goni/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/odroid/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/origen/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/smdk2410/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/smdk5250/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/smdk5420/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/smdkc100/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/smdkv310/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/trats/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/trats2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/samsung/universal_c210/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/seco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/siemens/corvus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/siemens/draco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/siemens/pxm2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/siemens/rut/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/siemens/smartweb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/siemens/taurus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/silica/pengwyn/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/spear/spear300/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/spear/spear310/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/spear/spear320/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/spear/spear600/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/spear/x600/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/st/stm32f429-discovery/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/st/stm32f746-disco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/st/stv0991/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/synopsys/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/synopsys/axs10x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/sysam/amcore/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/syteco/zmx25/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tbs/tbs2910/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tcl/sl50/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/technexion/pico-imx6ul/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/technexion/tao3530/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/technexion/twister/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/technologic/ts4800/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/teejet/mt_ventoux/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/am335x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/am3517crane/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/am43xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/am57xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/beagle/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/dra7xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/evm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/ks2_evm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/omap5_uevm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/panda/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/sdp4430/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/ti814x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/ti/ti816x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/timll/devkit3250/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/timll/devkit8000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/toradex/apalis_t30/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/toradex/colibri_imx7/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/toradex/colibri_pxa270/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/toradex/colibri_t20/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/toradex/colibri_t30/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/toradex/colibri_vf/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tplink/wdr4300/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tqc/tqm5200/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tqc/tqm834x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tqc/tqm8xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/tqc/tqma6/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/varisys/cyrus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/vscom/baltos/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/work-microwave/work_92105/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xes/xpedite1000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xes/xpedite517x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xes/xpedite520x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xes/xpedite537x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xes/xpedite550x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xilinx/microblaze-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xilinx/ppc405-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/xilinx/ppc440-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR	board/zyxel/nsa310s/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	arch/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config SYS_VENDOR$/;"	c	menu:Broadcom BCM283X family
CONFIG_SYS_VENDOR_MODULE	arch/arm/mach-integrator/Kconfig	/^config SYS_VENDOR$/;"	c	menu:Integrator Options
CONFIG_SYS_VENDOR_MODULE	arch/arm/mach-mvebu/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	arch/arm/mach-socfpga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	arch/arm/mach-zynq/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	arch/sparc/Kconfig	/^config SYS_VENDOR$/;"	c	menu:SPARC architecture
CONFIG_SYS_VENDOR_MODULE	board/8dtech/eco5pk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Arcturus/ucp1020/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Barix/ipam390/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/BuR/brppt1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/BuR/brxre1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/BuS/eb_cpu5282/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/CarMediaLab/flea3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/LaCie/edminiv2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/LaCie/net2big_v2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/LaCie/netspace_v2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Marvell/aspenite/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Marvell/dreamplug/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Marvell/gplugd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Marvell/guruplug/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Marvell/openrd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Marvell/sheevaplug/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Seagate/dockstar/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Seagate/goflexhome/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Seagate/nas220/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/Synology/ds109/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/abilis/tb100/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/advantech/dms-ba16/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amazon/kc1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/acadia/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/bamboo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/bubinga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/canyonlands/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/katmai/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/kilauea/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/luan/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/makalu/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/redwood/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/sequoia/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/walnut/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/yosemite/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amcc/yucca/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/amlogic/odroid-c2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/armadeus/apf27/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/armltd/vexpress/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/armltd/vexpress64/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/astro/mcf5373l/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91rm9200ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9260ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9261ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9263ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9rlek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/atngw100/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/atngw100mkii/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/atstk1000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/sama5d3xek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/atmel/sama5d4ek/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/avionic-design/medcom-wide/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/avionic-design/plutux/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/avionic-design/tec-ng/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/avionic-design/tec/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/bachmann/ot1200/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/barco/platinum/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/barco/titanium/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/birdland/bav335x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/bluegiga/apx4devkit/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/bluewater/gurnard/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/bluewater/snapper9260/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/bosch/shc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/boundary/nitrogen6x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/broadcom/bcmcygnus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/broadcom/bcmnsp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/buffalo/lsxl/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/cadence/xtfpga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/calao/usb_a9263/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/cavium/thunderx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ccv/xpress/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/cei/cei-tk1-som/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/cirrus/edb93xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/cloudengines/pogo_e02/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compal/paz00/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/cm_fx6/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/cm_t335/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/cm_t35/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/cm_t3517/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/cm_t43/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/cm_t54/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/compulab/trimslice/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/coreboot/coreboot/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/corscience/tricorder/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/creative/xfi3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/d-link/dns325/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/davedenx/aria/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/davinci/da8xxevm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/davinci/ea20/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/denx/m28evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/denx/m53evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/denx/ma5d4evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/dfi/dfi-bt700/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/efi/efi-x86/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/egnite/ethernut5/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/el/el6x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/embest/mx6boards/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/emulation/qemu-x86/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/engicam/icorem6/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/cpci2dp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/cpci405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/mecp5123/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/meesc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/plu405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/pmc405de/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/pmc440/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/vme8349/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/esd/vom405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/firefly/firefly-rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/b4860qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/bsc9131rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/bsc9132qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/c29xpcie/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/corenet_ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1012afrdm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1012aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1012ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1021aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1021atwr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1043aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1043ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1046aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls1046ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls2080a/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls2080aqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/ls2080ardb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5208evbe/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m52277evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5235evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5249evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5253demo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5253evbe/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5272c3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5275evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5282evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m53017evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5329evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m5373evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m54418twr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m54451evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m54455evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m547xevb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/m548xevb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc5121ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8308rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8313erdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8315erdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8323erdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc832xemds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8349emds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8349itx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc837xemds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc837xerdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8536ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8540ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8541cds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8544ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8548cds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8555cds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8560ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8568mds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8569mds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8572ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx23evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx25pdk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx28evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx31ads/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx31pdk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx35pdk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx51evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx53ard/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx53evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx53loco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx53smd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6qarm2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6sabresd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6slevk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx6ullevk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/mx7dsabresd/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/p1010rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/p1022ds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/p1023rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/p1_twr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/p2041rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/qemu-ppce500/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/s32v234evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t102xqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t102xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t1040qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t104xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t208xqds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t208xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t4qds/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/t4rdb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/freescale/vf610twr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gateworks/gw_ventana/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/405ep/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/405ex/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/dlvision/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/gdppc440etx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/intip/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/mpc8308/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gdsys/p1022/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ge/bx50v3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/google/chromebook_jerry/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/google/chromebook_link/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/google/chromebook_samus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/google/chromebox_panther/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gumstix/duovero/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/gumstix/pepper/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/hisilicon/hikey/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/htkw/mcx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ids/ids8313/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ifm/ac14xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ifm/o2dnt2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/imgtec/boston/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/imgtec/malta/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/imgtec/xilfpga/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/in-circuit/grasshopper/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/intel/bayleybay/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/intel/cougarcanyon2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/intel/crownbay/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/intel/galileo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/intel/minnowmax/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/inversepath/usbarmory/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/iomega/iconnect/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/isee/igep0033/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/isee/igep00x0/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/keymile/km82xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/keymile/km83xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/keymile/km_arm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/keymile/kmp204x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/kmc/kzm9g/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/kosagi/novena/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/l+g/vinco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/lego/ev3/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/lg/sniper/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/liebherr/lwmon5/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/logicpd/am3517evm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/logicpd/omap3som/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/logicpd/zoom1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/microchip/pic32mzda/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/micronas/vct/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/mini-box/picosam9g45/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/mosaixtech/icon/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/mpl/mip405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/mpl/pati/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/mpl/pip405/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/mpl/vcma9/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nokia/rx51/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/beaver/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/cardhu/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/dalmore/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/e2220-1170/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/harmony/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/jetson-tk1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/nyan-big/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/p2371-0000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/p2371-2180/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/p2571/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/p2771-0000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/seaboard/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/venice2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/ventana/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/nvidia/whistler/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/omicron/calimain/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/openrisc/openrisc-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/phytec/pcm030/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/phytec/pcm051/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/phytec/pcm052/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/phytec/pcm058/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ppcag/bg0900/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/qca/ap121/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/qca/ap143/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/quipos/cairo/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/radxa/rock2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/raidsonic/ib62x0/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/MigoR/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/alt/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/ap325rxa/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/blanche/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/ecovec/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/gose/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/koelsch/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/lager/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/porter/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/r0p7734/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/r2dplus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/r7780mp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/rsk7203/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/rsk7264/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/rsk7269/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/salvator-x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/sh7752evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/sh7753evb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/sh7757lcr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/sh7763rdp/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/sh7785lcr/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/silk/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/renesas/stout/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/rockchip/evb_rk3036/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/rockchip/evb_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/rockchip/evb_rk3399/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ronetix/pm9261/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ronetix/pm9263/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ronetix/pm9g45/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/arndale/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/espresso7420/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/goni/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/odroid/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/origen/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/smdk2410/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/smdk5250/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/smdk5420/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/smdkc100/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/smdkv310/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/trats/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/trats2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/samsung/universal_c210/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/seco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/siemens/corvus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/siemens/draco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/siemens/pxm2/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/siemens/rut/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/siemens/smartweb/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/siemens/taurus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/silica/pengwyn/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/spear/spear300/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/spear/spear310/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/spear/spear320/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/spear/spear600/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/spear/x600/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/st/stm32f429-discovery/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/st/stm32f746-disco/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/st/stv0991/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/synopsys/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/synopsys/axs10x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/sysam/amcore/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/syteco/zmx25/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tbs/tbs2910/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tcl/sl50/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/technexion/pico-imx6ul/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/technexion/tao3530/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/technexion/twister/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/technologic/ts4800/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/teejet/mt_ventoux/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/am335x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/am3517crane/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/am43xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/am57xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/beagle/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/dra7xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/evm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/ks2_evm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/omap5_uevm/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/panda/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/sdp4430/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/ti814x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/ti/ti816x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/timll/devkit3250/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/timll/devkit8000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/toradex/apalis_t30/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/toradex/colibri_imx7/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/toradex/colibri_pxa270/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/toradex/colibri_t20/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/toradex/colibri_t30/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/toradex/colibri_vf/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tplink/wdr4300/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tqc/tqm5200/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tqc/tqm834x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tqc/tqm8xx/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/tqc/tqma6/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/varisys/cyrus/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/vscom/baltos/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/work-microwave/work_92105/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xes/xpedite1000/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xes/xpedite517x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xes/xpedite520x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xes/xpedite537x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xes/xpedite550x/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xilinx/ppc405-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/xilinx/ppc440-generic/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VENDOR_MODULE	board/zyxel/nsa310s/Kconfig	/^config SYS_VENDOR$/;"	c
CONFIG_SYS_VGA_RAM_EN	include/radeon.h	/^#define CONFIG_SYS_VGA_RAM_EN	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/brxre1.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/ipek01.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/m28evk.h	/^#define	CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/m53evk.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/mx23evk.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/mx28evk.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/nitrogen6x.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE /;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE /;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/socrates.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	/;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/trats.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE /;"	d
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	include/configs/trats2.h	/^#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE /;"	d
CONFIG_SYS_VPC3_BASE	include/configs/mecp5123.h	/^#define CONFIG_SYS_VPC3_BASE	/;"	d
CONFIG_SYS_VPC3_SIZE	include/configs/mecp5123.h	/^#define CONFIG_SYS_VPC3_SIZE	/;"	d
CONFIG_SYS_VSC7385_BASE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_VSC7385_BASE	/;"	d
CONFIG_SYS_VSC7385_BASE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_VSC7385_BASE	/;"	d
CONFIG_SYS_VSC7385_BASE	include/configs/MPC8349ITX.h	/^#define CONFIG_SYS_VSC7385_BASE	/;"	d
CONFIG_SYS_VSC7385_BASE	include/configs/MPC837XERDB.h	/^#define CONFIG_SYS_VSC7385_BASE	/;"	d
CONFIG_SYS_VSC7385_BASE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_VSC7385_BASE	/;"	d
CONFIG_SYS_VSC7385_BASE_PHYS	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_VSC7385_BASE_PHYS	/;"	d
CONFIG_SYS_VSC7385_BR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_VSC7385_BR_PRELIM	/;"	d
CONFIG_SYS_VSC7385_OR_PRELIM	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_SYS_VSC7385_OR_PRELIM	/;"	d
CONFIG_SYS_VSC7385_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_SYS_VSC7385_SIZE	/;"	d
CONFIG_SYS_VSC7385_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_SYS_VSC7385_SIZE	/;"	d
CONFIG_SYS_VXWORKS_MAC_PTR	include/configs/CPCI4052.h	/^#define CONFIG_SYS_VXWORKS_MAC_PTR /;"	d
CONFIG_SYS_VXWORKS_MAC_PTR	include/configs/vme8349.h	/^#define CONFIG_SYS_VXWORKS_MAC_PTR	/;"	d
CONFIG_SYS_WATCHDOG_FLAGS_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_WATCHDOG_FLAGS_ADDR	/;"	d
CONFIG_SYS_WATCHDOG_FREQ	arch/m68k/lib/time.c	/^#define CONFIG_SYS_WATCHDOG_FREQ /;"	d	file:
CONFIG_SYS_WATCHDOG_FREQ	arch/powerpc/lib/interrupts.c	/^#define CONFIG_SYS_WATCHDOG_FREQ /;"	d	file:
CONFIG_SYS_WATCHDOG_FREQ	include/configs/MPC8610HPCD.h	/^#define CONFIG_SYS_WATCHDOG_FREQ	/;"	d
CONFIG_SYS_WATCHDOG_MAGIC	include/configs/lwmon5.h	/^#define CONFIG_SYS_WATCHDOG_MAGIC	/;"	d
CONFIG_SYS_WATCHDOG_MAGIC_MASK	include/configs/lwmon5.h	/^#define CONFIG_SYS_WATCHDOG_MAGIC_MASK	/;"	d
CONFIG_SYS_WATCHDOG_TIME_ADDR	include/configs/lwmon5.h	/^#define CONFIG_SYS_WATCHDOG_TIME_ADDR	/;"	d
CONFIG_SYS_WATCHDOG_VALUE	include/configs/aria.h	/^#define CONFIG_SYS_WATCHDOG_VALUE /;"	d
CONFIG_SYS_WATCHDOG_VALUE	include/configs/ids8313.h	/^#define CONFIG_SYS_WATCHDOG_VALUE	/;"	d
CONFIG_SYS_WATCHDOG_VALUE	include/configs/mecp5123.h	/^#define CONFIG_SYS_WATCHDOG_VALUE /;"	d
CONFIG_SYS_WATCHDOG_VALUE	include/configs/mpc5121ads.h	/^#define CONFIG_SYS_WATCHDOG_VALUE /;"	d
CONFIG_SYS_WDTC_WDMR_VAL	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_WDTC_WDMR_VAL	/;"	d
CONFIG_SYS_WDTC_WDMR_VAL	include/configs/pm9261.h	/^#define CONFIG_SYS_WDTC_WDMR_VAL	/;"	d
CONFIG_SYS_WDTC_WDMR_VAL	include/configs/pm9263.h	/^#define CONFIG_SYS_WDTC_WDMR_VAL	/;"	d
CONFIG_SYS_WDTTIMERBASE	include/configs/calimain.h	/^#define CONFIG_SYS_WDTTIMERBASE	/;"	d
CONFIG_SYS_WDT_PERIOD_HIGH	include/configs/calimain.h	/^#define CONFIG_SYS_WDT_PERIOD_HIGH	/;"	d
CONFIG_SYS_WDT_PERIOD_LOW	include/configs/calimain.h	/^#define CONFIG_SYS_WDT_PERIOD_LOW /;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/at91sam9261ek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/at91sam9263ek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK	/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/at91sam9n12ek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/at91sam9rlek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK	/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/at91sam9x5ek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/brppt1.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/brxre1.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/chromebook_jerry.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/colibri_pxa270.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/colibri_t20.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/evb_rk3288.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/evb_rk3399.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/exynos5-dt-common.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/fennec_rk3288.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/firefly-rk3288.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/harmony.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/medcom-wide.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/miniarm_rk3288.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/nyan-big.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/paz00.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/picosam9g45.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/pm9261.h	/^#define CONFIG_SYS_WHITE_ON_BLACK	/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/pm9263.h	/^#define CONFIG_SYS_WHITE_ON_BLACK	/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/popmetal_rk3288.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/rock2.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/rpi.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/s5pc210_universal.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/sama5d2_xplained.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/sama5d3xek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/sama5d4_xplained.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/sama5d4ek.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/seaboard.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/tec.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/trats.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/trats2.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/ventana.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WHITE_ON_BLACK	include/configs/x86-chromebook.h	/^#define CONFIG_SYS_WHITE_ON_BLACK$/;"	d
CONFIG_SYS_WINDOW1_BASE	include/configs/vme8349.h	/^#define CONFIG_SYS_WINDOW1_BASE	/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/amcore.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/ls1021aqds.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/ls1021atwr.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/ls1043aqds.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/ls1043ardb.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/ls1046aqds.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_WRITE_SWAPPED_DATA	include/configs/sbc8641d.h	/^#define CONFIG_SYS_WRITE_SWAPPED_DATA$/;"	d
CONFIG_SYS_X86_START16	arch/x86/Kconfig	/^config SYS_X86_START16$/;"	c	menu:x86 architecture
CONFIG_SYS_X86_START16_MODULE	arch/x86/Kconfig	/^config SYS_X86_START16$/;"	c	menu:x86 architecture
CONFIG_SYS_XHCI_USB1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_XHCI_USB1_ADDR	/;"	d
CONFIG_SYS_XHCI_USB1_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_XHCI_USB1_ADDR	/;"	d
CONFIG_SYS_XHCI_USB1_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_SYS_XHCI_USB1_ADDR	/;"	d
CONFIG_SYS_XHCI_USB2_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_XHCI_USB2_ADDR	/;"	d
CONFIG_SYS_XHCI_USB2_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define CONFIG_SYS_XHCI_USB2_ADDR	/;"	d
CONFIG_SYS_XHCI_USB3_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define CONFIG_SYS_XHCI_USB3_ADDR	/;"	d
CONFIG_SYS_XILINX_SPI_LIST	drivers/spi/xilinx_spi.c	/^#define CONFIG_SYS_XILINX_SPI_LIST	/;"	d	file:
CONFIG_SYS_XIMG_LEN	cmd/ximg.c	/^#define CONFIG_SYS_XIMG_LEN	/;"	d	file:
CONFIG_SYS_XLB_PIPELINING	include/configs/a4m072.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/cm5200.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/digsy_mtc.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/inka4x0.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/jupiter.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/o2dnt-common.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/pcm030.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XLB_PIPELINING	include/configs/v38b.h	/^#define CONFIG_SYS_XLB_PIPELINING	/;"	d
CONFIG_SYS_XSVF_DEFAULT_ADDR	include/configs/VOM405.h	/^#define CONFIG_SYS_XSVF_DEFAULT_ADDR	/;"	d
CONFIG_SYS_ZYNQ_QSPI_WAIT	drivers/spi/zynq_qspi.c	/^#define CONFIG_SYS_ZYNQ_QSPI_WAIT	/;"	d	file:
CONFIG_SYS_ZYNQ_SPI_WAIT	drivers/spi/zynq_spi.c	/^#define CONFIG_SYS_ZYNQ_SPI_WAIT	/;"	d	file:
CONFIG_SYS_i2C_FSL	include/configs/M5235EVB.h	/^#define CONFIG_SYS_i2C_FSL$/;"	d
CONFIG_T1040QDS	include/configs/T1040QDS.h	/^#define CONFIG_T1040QDS$/;"	d
CONFIG_T104xRDB	include/configs/T104xRDB.h	/^#define CONFIG_T104xRDB$/;"	d
CONFIG_T2080QDS	include/configs/T208xQDS.h	/^#define CONFIG_T2080QDS$/;"	d
CONFIG_T2080RDB	include/configs/T208xRDB.h	/^#define CONFIG_T2080RDB$/;"	d
CONFIG_T2081QDS	include/configs/T208xQDS.h	/^#define CONFIG_T2081QDS$/;"	d
CONFIG_T4240QDS	include/configs/T4240QDS.h	/^#define CONFIG_T4240QDS$/;"	d
CONFIG_T4240RDB	include/configs/T4240RDB.h	/^#define CONFIG_T4240RDB$/;"	d
CONFIG_TAM3517_SETTINGS	include/configs/tam3517-common.h	/^#define	CONFIG_TAM3517_SETTINGS	/;"	d
CONFIG_TAM3517_SW3_SETTINGS	include/configs/twister.h	/^#define CONFIG_TAM3517_SW3_SETTINGS$/;"	d
CONFIG_TARGET_A3M071	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_A3M071$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_A3M071_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_A3M071$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_A4M072	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_A4M072$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_A4M072_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_A4M072$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_AC14XX	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_AC14XX$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_AC14XX_MODULE	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_AC14XX$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_ACADIA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_ACADIA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_ACADIA_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_ACADIA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_ADP_AG101P	arch/nds32/Kconfig	/^config TARGET_ADP_AG101P$/;"	c	choice:NDS32 architecture""choice75cdf90c0104
CONFIG_TARGET_ADP_AG101P_MODULE	arch/nds32/Kconfig	/^config TARGET_ADP_AG101P$/;"	c	choice:NDS32 architecture""choice75cdf90c0104
CONFIG_TARGET_ADVANTECH_DMS_BA16	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ADVANTECH_DMS_BA16$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ADVANTECH_DMS_BA16_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ADVANTECH_DMS_BA16$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ALT	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_ALT$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_ALT_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_ALT$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_AM335X_BALTOS	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_BALTOS$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_BALTOS_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_BALTOS$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_EVM	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_EVM$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_EVM_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_EVM$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_IGEP0033	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_IGEP0033$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_IGEP0033_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_IGEP0033$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_SHC	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_SHC$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_SHC_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_SHC$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_SL50	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_SL50$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM335X_SL50_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_SL50$/;"	c	choice:choice097e41480104
CONFIG_TARGET_AM3517_CRANE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_AM3517_CRANE$/;"	c	choice:choice629b97240104
CONFIG_TARGET_AM3517_CRANE_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_AM3517_CRANE$/;"	c	choice:choice629b97240104
CONFIG_TARGET_AM3517_EVM	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_AM3517_EVM$/;"	c	choice:choice629b97240104
CONFIG_TARGET_AM3517_EVM_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_AM3517_EVM$/;"	c	choice:choice629b97240104
CONFIG_TARGET_AM43XX_EVM	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM43XX_EVM$/;"	c
CONFIG_TARGET_AM43XX_EVM_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM43XX_EVM$/;"	c
CONFIG_TARGET_AM57XX_EVM	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_AM57XX_EVM$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_AM57XX_EVM_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_AM57XX_EVM$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_AMCORE	arch/m68k/Kconfig	/^config TARGET_AMCORE$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_AMCORE_MODULE	arch/m68k/Kconfig	/^config TARGET_AMCORE$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_AP121	arch/mips/mach-ath79/Kconfig	/^config TARGET_AP121$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
CONFIG_TARGET_AP121_MODULE	arch/mips/mach-ath79/Kconfig	/^config TARGET_AP121$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
CONFIG_TARGET_AP143	arch/mips/mach-ath79/Kconfig	/^config TARGET_AP143$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
CONFIG_TARGET_AP143_MODULE	arch/mips/mach-ath79/Kconfig	/^config TARGET_AP143$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
CONFIG_TARGET_AP325RXA	arch/sh/Kconfig	/^config TARGET_AP325RXA$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_AP325RXA_MODULE	arch/sh/Kconfig	/^config TARGET_AP325RXA$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_APALIS_T30	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_APALIS_T30$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_APALIS_T30_MODULE	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_APALIS_T30$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_APF27	arch/arm/Kconfig	/^config TARGET_APF27$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_APF27_MODULE	arch/arm/Kconfig	/^config TARGET_APF27$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_APX4DEVKIT	arch/arm/Kconfig	/^config TARGET_APX4DEVKIT$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_APX4DEVKIT_MODULE	arch/arm/Kconfig	/^config TARGET_APX4DEVKIT$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_AP_SH4A_4A	arch/sh/Kconfig	/^config TARGET_AP_SH4A_4A$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_AP_SH4A_4A_MODULE	arch/sh/Kconfig	/^config TARGET_AP_SH4A_4A$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_ARIA	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_ARIA$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_ARIA_MODULE	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_ARIA$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_ARISTAINETOS	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ARISTAINETOS2	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS2$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ARISTAINETOS2B	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS2B$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ARISTAINETOS2B_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS2B$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ARISTAINETOS2_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS2$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ARISTAINETOS_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ARMADILLO_800EVA	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_ARMADILLO_800EVA$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_ARMADILLO_800EVA_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_ARMADILLO_800EVA$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_ARNDALE	arch/arm/mach-exynos/Kconfig	/^config TARGET_ARNDALE$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_ARNDALE_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_ARNDALE$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_ASPENITE	arch/arm/Kconfig	/^config TARGET_ASPENITE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ASPENITE_MODULE	arch/arm/Kconfig	/^config TARGET_ASPENITE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ASTRO_MCF5373L	arch/m68k/Kconfig	/^config TARGET_ASTRO_MCF5373L$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_ASTRO_MCF5373L_MODULE	arch/m68k/Kconfig	/^config TARGET_ASTRO_MCF5373L$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_AT91RM9200EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91RM9200EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91RM9200EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91RM9200EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9260EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9260EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9260EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9260EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9261EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9261EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9261EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9261EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9263EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9263EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9263EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9263EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9M10G45EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9M10G45EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9M10G45EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9M10G45EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9N12EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9N12EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9N12EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9N12EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9RLEK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9RLEK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9RLEK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9RLEK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9X5EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9X5EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_AT91SAM9X5EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9X5EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_ATNGW100	arch/avr32/Kconfig	/^config TARGET_ATNGW100$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_ATNGW100MKII	arch/avr32/Kconfig	/^config TARGET_ATNGW100MKII$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_ATNGW100MKII_MODULE	arch/avr32/Kconfig	/^config TARGET_ATNGW100MKII$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_ATNGW100_MODULE	arch/avr32/Kconfig	/^config TARGET_ATNGW100$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_ATSTK1002	arch/avr32/Kconfig	/^config TARGET_ATSTK1002$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_ATSTK1002_MODULE	arch/avr32/Kconfig	/^config TARGET_ATSTK1002$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_AXS10X	arch/arc/Kconfig	/^config TARGET_AXS10X$/;"	c	choice:ARC architecture""choice763e4ef80404
CONFIG_TARGET_AXS10X_MODULE	arch/arc/Kconfig	/^config TARGET_AXS10X$/;"	c	choice:ARC architecture""choice763e4ef80404
CONFIG_TARGET_B4860QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_B4860QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_B4860QDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_B4860QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_BAMBOO	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_BAMBOO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_BAMBOO_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_BAMBOO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_BAV335X	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_BAV335X$/;"	c	choice:choice097e41480104
CONFIG_TARGET_BAV335X_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_BAV335X$/;"	c	choice:choice097e41480104
CONFIG_TARGET_BAYLEYBAY	board/intel/Kconfig	/^config TARGET_BAYLEYBAY$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_BAYLEYBAY_MODULE	board/intel/Kconfig	/^config TARGET_BAYLEYBAY$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_BCM23550_W1D	arch/arm/Kconfig	/^config TARGET_BCM23550_W1D$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCM23550_W1D_MODULE	arch/arm/Kconfig	/^config TARGET_BCM23550_W1D$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCM28155_AP	arch/arm/Kconfig	/^config TARGET_BCM28155_AP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCM28155_AP_MODULE	arch/arm/Kconfig	/^config TARGET_BCM28155_AP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCMCYGNUS	arch/arm/Kconfig	/^config TARGET_BCMCYGNUS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCMCYGNUS_MODULE	arch/arm/Kconfig	/^config TARGET_BCMCYGNUS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCMNSP	arch/arm/Kconfig	/^config TARGET_BCMNSP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCMNSP_MODULE	arch/arm/Kconfig	/^config TARGET_BCMNSP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BCT_BRETTL2	arch/blackfin/Kconfig	/^config TARGET_BCT_BRETTL2$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BCT_BRETTL2_MODULE	arch/blackfin/Kconfig	/^config TARGET_BCT_BRETTL2$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BEAVER	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_BEAVER$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_BEAVER_MODULE	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_BEAVER$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_BF506F_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF506F_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF506F_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF506F_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF518F_EZBRD	arch/blackfin/Kconfig	/^config TARGET_BF518F_EZBRD$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF518F_EZBRD_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF518F_EZBRD$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF525_UCR2	arch/blackfin/Kconfig	/^config TARGET_BF525_UCR2$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF525_UCR2_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF525_UCR2$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF526_EZBRD	arch/blackfin/Kconfig	/^config TARGET_BF526_EZBRD$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF526_EZBRD_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF526_EZBRD$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF527_AD7160_EVAL	arch/blackfin/Kconfig	/^config TARGET_BF527_AD7160_EVAL$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF527_AD7160_EVAL_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF527_AD7160_EVAL$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF527_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF527_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF527_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF527_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF527_SDP	arch/blackfin/Kconfig	/^config TARGET_BF527_SDP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF527_SDP_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF527_SDP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF533_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF533_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF533_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF533_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF533_STAMP	arch/blackfin/Kconfig	/^config TARGET_BF533_STAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF533_STAMP_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF533_STAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_MINOTAUR	arch/blackfin/Kconfig	/^config TARGET_BF537_MINOTAUR$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_MINOTAUR_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF537_MINOTAUR$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_PNAV	arch/blackfin/Kconfig	/^config TARGET_BF537_PNAV$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_PNAV_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF537_PNAV$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_SRV1	arch/blackfin/Kconfig	/^config TARGET_BF537_SRV1$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_SRV1_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF537_SRV1$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_STAMP	arch/blackfin/Kconfig	/^config TARGET_BF537_STAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF537_STAMP_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF537_STAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF538F_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF538F_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF538F_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF538F_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF548_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF548_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF548_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF548_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF561_ACVILON	arch/blackfin/Kconfig	/^config TARGET_BF561_ACVILON$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF561_ACVILON_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF561_ACVILON$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF561_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF561_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF561_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF561_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF609_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF609_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BF609_EZKIT_MODULE	arch/blackfin/Kconfig	/^config TARGET_BF609_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BG0900	arch/arm/Kconfig	/^config TARGET_BG0900$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BG0900_MODULE	arch/arm/Kconfig	/^config TARGET_BG0900$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BK4R1	arch/arm/Kconfig	/^config TARGET_BK4R1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BK4R1_MODULE	arch/arm/Kconfig	/^config TARGET_BK4R1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BLACKSTAMP	arch/blackfin/Kconfig	/^config TARGET_BLACKSTAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BLACKSTAMP_MODULE	arch/blackfin/Kconfig	/^config TARGET_BLACKSTAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BLACKVME	arch/blackfin/Kconfig	/^config TARGET_BLACKVME$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BLACKVME_MODULE	arch/blackfin/Kconfig	/^config TARGET_BLACKVME$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BLANCHE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_BLANCHE$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_BLANCHE_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_BLANCHE$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_BOSTON	arch/mips/Kconfig	/^config TARGET_BOSTON$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_BOSTON_MODULE	arch/mips/Kconfig	/^config TARGET_BOSTON$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_BR4	arch/blackfin/Kconfig	/^config TARGET_BR4$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BR4_MODULE	arch/blackfin/Kconfig	/^config TARGET_BR4$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_BRPPT1	arch/arm/Kconfig	/^config TARGET_BRPPT1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BRPPT1_MODULE	arch/arm/Kconfig	/^config TARGET_BRPPT1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BRXRE1	arch/arm/Kconfig	/^config TARGET_BRXRE1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BRXRE1_MODULE	arch/arm/Kconfig	/^config TARGET_BRXRE1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_BSC9131RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_BSC9131RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_BSC9131RDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_BSC9131RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_BSC9132QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_BSC9132QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_BSC9132QDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_BSC9132QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_BUBINGA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_BUBINGA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_BUBINGA_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_BUBINGA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_C29XPCIE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_C29XPCIE$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_C29XPCIE_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_C29XPCIE$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_CALIMAIN	arch/arm/mach-davinci/Kconfig	/^config TARGET_CALIMAIN$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_CALIMAIN_MODULE	arch/arm/mach-davinci/Kconfig	/^config TARGET_CALIMAIN$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_CANMB	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CANMB$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_CANMB_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CANMB$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_CANYONLANDS	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CANYONLANDS$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_CANYONLANDS_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CANYONLANDS$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_CARDHU	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_CARDHU$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_CARDHU_MODULE	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_CARDHU$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_CEI_TK1_SOM	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_CEI_TK1_SOM$/;"	c	choice:choice925842630104
CONFIG_TARGET_CEI_TK1_SOM_MODULE	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_CEI_TK1_SOM$/;"	c	choice:choice925842630104
CONFIG_TARGET_CGTQMX6EVAL	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_CGTQMX6EVAL$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_CGTQMX6EVAL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_CGTQMX6EVAL$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_CHARON	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CHARON$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_CHARON_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CHARON$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_CHROMEBOOK_JERRY	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_CHROMEBOOK_JERRY$/;"	c
CONFIG_TARGET_CHROMEBOOK_JERRY_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_CHROMEBOOK_JERRY$/;"	c
CONFIG_TARGET_CHROMEBOOK_LINK	board/google/Kconfig	/^config TARGET_CHROMEBOOK_LINK$/;"	c	choice:choice7ea0e7e90104
CONFIG_TARGET_CHROMEBOOK_LINK_MODULE	board/google/Kconfig	/^config TARGET_CHROMEBOOK_LINK$/;"	c	choice:choice7ea0e7e90104
CONFIG_TARGET_CHROMEBOOK_SAMUS	board/google/Kconfig	/^config TARGET_CHROMEBOOK_SAMUS$/;"	c	choice:choice7ea0e7e90104
CONFIG_TARGET_CHROMEBOOK_SAMUS_MODULE	board/google/Kconfig	/^config TARGET_CHROMEBOOK_SAMUS$/;"	c	choice:choice7ea0e7e90104
CONFIG_TARGET_CHROMEBOX_PANTHER	board/google/Kconfig	/^config TARGET_CHROMEBOX_PANTHER$/;"	c	choice:choice7ea0e7e90104
CONFIG_TARGET_CHROMEBOX_PANTHER_MODULE	board/google/Kconfig	/^config TARGET_CHROMEBOX_PANTHER$/;"	c	choice:choice7ea0e7e90104
CONFIG_TARGET_CLEARFOG	arch/arm/mach-mvebu/Kconfig	/^config TARGET_CLEARFOG$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_CLEARFOG_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_CLEARFOG$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_CM5200	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CM5200$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_CM5200_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CM5200$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_CM_BF527	arch/blackfin/Kconfig	/^config TARGET_CM_BF527$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF527_MODULE	arch/blackfin/Kconfig	/^config TARGET_CM_BF527$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF533	arch/blackfin/Kconfig	/^config TARGET_CM_BF533$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF533_MODULE	arch/blackfin/Kconfig	/^config TARGET_CM_BF533$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF537E	arch/blackfin/Kconfig	/^config TARGET_CM_BF537E$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF537E_MODULE	arch/blackfin/Kconfig	/^config TARGET_CM_BF537E$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF537U	arch/blackfin/Kconfig	/^config TARGET_CM_BF537U$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF537U_MODULE	arch/blackfin/Kconfig	/^config TARGET_CM_BF537U$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF548	arch/blackfin/Kconfig	/^config TARGET_CM_BF548$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF548_MODULE	arch/blackfin/Kconfig	/^config TARGET_CM_BF548$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF561	arch/blackfin/Kconfig	/^config TARGET_CM_BF561$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_BF561_MODULE	arch/blackfin/Kconfig	/^config TARGET_CM_BF561$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_CM_FX6	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_CM_FX6$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_CM_FX6_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_CM_FX6$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_CM_T335	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_CM_T335$/;"	c	choice:choice097e41480104
CONFIG_TARGET_CM_T335_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_CM_T335$/;"	c	choice:choice097e41480104
CONFIG_TARGET_CM_T35	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_CM_T35$/;"	c	choice:choice629b97240104
CONFIG_TARGET_CM_T3517	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_CM_T3517$/;"	c	choice:choice629b97240104
CONFIG_TARGET_CM_T3517_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_CM_T3517$/;"	c	choice:choice629b97240104
CONFIG_TARGET_CM_T35_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_CM_T35$/;"	c	choice:choice629b97240104
CONFIG_TARGET_CM_T43	arch/arm/Kconfig	/^config TARGET_CM_T43$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_CM_T43_MODULE	arch/arm/Kconfig	/^config TARGET_CM_T43$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_CM_T54	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_CM_T54$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_CM_T54_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_CM_T54$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_COBRA5272	arch/m68k/Kconfig	/^config TARGET_COBRA5272$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_COBRA5272_MODULE	arch/m68k/Kconfig	/^config TARGET_COBRA5272$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_COLIBRI_IMX7	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_COLIBRI_IMX7$/;"	c	choice:choice1fec2d000104
CONFIG_TARGET_COLIBRI_IMX7_MODULE	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_COLIBRI_IMX7$/;"	c	choice:choice1fec2d000104
CONFIG_TARGET_COLIBRI_PXA270	arch/arm/Kconfig	/^config TARGET_COLIBRI_PXA270$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_COLIBRI_PXA270_MODULE	arch/arm/Kconfig	/^config TARGET_COLIBRI_PXA270$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_COLIBRI_T20	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_COLIBRI_T20$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_COLIBRI_T20_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_COLIBRI_T20$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_COLIBRI_T30	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_COLIBRI_T30$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_COLIBRI_T30_MODULE	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_COLIBRI_T30$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_COLIBRI_VF	arch/arm/Kconfig	/^config TARGET_COLIBRI_VF$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_COLIBRI_VF_MODULE	arch/arm/Kconfig	/^config TARGET_COLIBRI_VF$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845	board/congatec/Kconfig	/^config TARGET_CONGA_QEVAL20_QA3_E3845$/;"	c	choice:choiced0b1a2100104
CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845_MODULE	board/congatec/Kconfig	/^config TARGET_CONGA_QEVAL20_QA3_E3845$/;"	c	choice:choiced0b1a2100104
CONFIG_TARGET_CONTROLCENTERD	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_CONTROLCENTERD$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_CONTROLCENTERD_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_CONTROLCENTERD$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_COREBOOT	board/coreboot/Kconfig	/^config TARGET_COREBOOT$/;"	c	choice:choice99c575090104
CONFIG_TARGET_COREBOOT_MODULE	board/coreboot/Kconfig	/^config TARGET_COREBOOT$/;"	c	choice:choice99c575090104
CONFIG_TARGET_CORVUS	arch/arm/mach-at91/Kconfig	/^config TARGET_CORVUS$/;"	c	choice:choice338303b60104
CONFIG_TARGET_CORVUS_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_CORVUS$/;"	c	choice:choice338303b60104
CONFIG_TARGET_COUGARCANYON2	board/intel/Kconfig	/^config TARGET_COUGARCANYON2$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_COUGARCANYON2_MODULE	board/intel/Kconfig	/^config TARGET_COUGARCANYON2$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_CPCI2DP	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CPCI2DP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_CPCI2DP_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CPCI2DP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_CPCI4052	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CPCI4052$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_CPCI4052_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CPCI4052$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_CROWNBAY	board/intel/Kconfig	/^config TARGET_CROWNBAY$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_CROWNBAY_MODULE	board/intel/Kconfig	/^config TARGET_CROWNBAY$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_CYRUS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_CYRUS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_CYRUS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_CYRUS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_DA850EVM	arch/arm/mach-davinci/Kconfig	/^config TARGET_DA850EVM$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_DA850EVM_MODULE	arch/arm/mach-davinci/Kconfig	/^config TARGET_DA850EVM$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_DALMORE	arch/arm/mach-tegra/tegra114/Kconfig	/^config TARGET_DALMORE$/;"	c	choice:choice8e4db1420104
CONFIG_TARGET_DALMORE_MODULE	arch/arm/mach-tegra/tegra114/Kconfig	/^config TARGET_DALMORE$/;"	c	choice:choice8e4db1420104
CONFIG_TARGET_DBAU1X00	arch/mips/Kconfig	/^config TARGET_DBAU1X00$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_DBAU1X00_MODULE	arch/mips/Kconfig	/^config TARGET_DBAU1X00$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_DB_88F6720	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6720$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_88F6720_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6720$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_88F6820_AMC	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6820_AMC$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_88F6820_AMC_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6820_AMC$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_88F6820_GP	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6820_GP$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_88F6820_GP_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6820_GP$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_MV784MP_GP	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_MV784MP_GP$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DB_MV784MP_GP_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_MV784MP_GP$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DEVKIT3250	arch/arm/Kconfig	/^config TARGET_DEVKIT3250$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_DEVKIT3250_MODULE	arch/arm/Kconfig	/^config TARGET_DEVKIT3250$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_DEVKIT8000	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_DEVKIT8000$/;"	c	choice:choice629b97240104
CONFIG_TARGET_DEVKIT8000_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_DEVKIT8000$/;"	c	choice:choice629b97240104
CONFIG_TARGET_DFI_BT700	board/dfi/Kconfig	/^config TARGET_DFI_BT700$/;"	c	choice:choice9009af1f0104
CONFIG_TARGET_DFI_BT700_MODULE	board/dfi/Kconfig	/^config TARGET_DFI_BT700$/;"	c	choice:choice9009af1f0104
CONFIG_TARGET_DIGSY_MTC	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_DIGSY_MTC$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_DIGSY_MTC_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_DIGSY_MTC$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_DLVISION	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_DLVISION$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_DLVISION_10G	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_DLVISION_10G$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_DLVISION_10G_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_DLVISION_10G$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_DLVISION_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_DLVISION$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_DNP5370	arch/blackfin/Kconfig	/^config TARGET_DNP5370$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_DNP5370_MODULE	arch/blackfin/Kconfig	/^config TARGET_DNP5370$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_DNS325	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DNS325$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DNS325_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DNS325$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DOCKSTAR	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DOCKSTAR$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DOCKSTAR_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DOCKSTAR$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DRA7XX_EVM	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_DRA7XX_EVM$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_DRA7XX_EVM_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_DRA7XX_EVM$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_DRACO	arch/arm/Kconfig	/^config TARGET_DRACO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_DRACO_MODULE	arch/arm/Kconfig	/^config TARGET_DRACO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_DRAGONBOARD410C	arch/arm/mach-snapdragon/Kconfig	/^config TARGET_DRAGONBOARD410C$/;"	c	choice:choice095a19240104
CONFIG_TARGET_DRAGONBOARD410C_MODULE	arch/arm/mach-snapdragon/Kconfig	/^config TARGET_DRAGONBOARD410C$/;"	c	choice:choice095a19240104
CONFIG_TARGET_DREAMPLUG	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DREAMPLUG$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DREAMPLUG_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DREAMPLUG$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DS109	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DS109$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DS109_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DS109$/;"	c	choice:choice87da77410104
CONFIG_TARGET_DS414	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DS414$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DS414_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DS414$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_DUOVERO	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_DUOVERO$/;"	c	choice:choiced71808250104
CONFIG_TARGET_DUOVERO_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_DUOVERO$/;"	c	choice:choiced71808250104
CONFIG_TARGET_E2220_1170	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_E2220_1170$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_E2220_1170_MODULE	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_E2220_1170$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_EA20	arch/arm/mach-davinci/Kconfig	/^config TARGET_EA20$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_EA20_MODULE	arch/arm/mach-davinci/Kconfig	/^config TARGET_EA20$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_EB_CPU5282	arch/m68k/Kconfig	/^config TARGET_EB_CPU5282$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_EB_CPU5282_MODULE	arch/m68k/Kconfig	/^config TARGET_EB_CPU5282$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_ECO5PK	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_ECO5PK$/;"	c	choice:choice629b97240104
CONFIG_TARGET_ECO5PK_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_ECO5PK$/;"	c	choice:choice629b97240104
CONFIG_TARGET_ECOVEC	arch/sh/Kconfig	/^config TARGET_ECOVEC$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_ECOVEC_MODULE	arch/sh/Kconfig	/^config TARGET_ECOVEC$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_EDB93XX	arch/arm/Kconfig	/^config TARGET_EDB93XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_EDB93XX_MODULE	arch/arm/Kconfig	/^config TARGET_EDB93XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_EDMINIV2	arch/arm/mach-orion5x/Kconfig	/^config TARGET_EDMINIV2$/;"	c	choice:choicec8ba732b0104
CONFIG_TARGET_EDMINIV2_MODULE	arch/arm/mach-orion5x/Kconfig	/^config TARGET_EDMINIV2$/;"	c	choice:choicec8ba732b0104
CONFIG_TARGET_EFI	board/efi/Kconfig	/^config TARGET_EFI$/;"	c	choice:choice156664600104
CONFIG_TARGET_EFI_MODULE	board/efi/Kconfig	/^config TARGET_EFI$/;"	c	choice:choice156664600104
CONFIG_TARGET_EMBESTMX6BOARDS	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_EMBESTMX6BOARDS$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_EMBESTMX6BOARDS_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_EMBESTMX6BOARDS$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ESPRESSO7420	arch/arm/mach-exynos/Kconfig	/^config  TARGET_ESPRESSO7420$/;"	c	choice:choice9b416b3d0404
CONFIG_TARGET_ESPRESSO7420_MODULE	arch/arm/mach-exynos/Kconfig	/^config  TARGET_ESPRESSO7420$/;"	c	choice:choice9b416b3d0404
CONFIG_TARGET_ESPT	arch/sh/Kconfig	/^config TARGET_ESPT$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_ESPT_MODULE	arch/sh/Kconfig	/^config TARGET_ESPT$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_ETAMIN	arch/arm/Kconfig	/^config TARGET_ETAMIN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ETAMIN_MODULE	arch/arm/Kconfig	/^config TARGET_ETAMIN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ETHERNUT5	arch/arm/mach-at91/Kconfig	/^config TARGET_ETHERNUT5$/;"	c	choice:choice338303b60104
CONFIG_TARGET_ETHERNUT5_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_ETHERNUT5$/;"	c	choice:choice338303b60104
CONFIG_TARGET_EVB_RK3036	arch/arm/mach-rockchip/rk3036/Kconfig	/^config TARGET_EVB_RK3036$/;"	c
CONFIG_TARGET_EVB_RK3036_MODULE	arch/arm/mach-rockchip/rk3036/Kconfig	/^config TARGET_EVB_RK3036$/;"	c
CONFIG_TARGET_EVB_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_EVB_RK3288$/;"	c
CONFIG_TARGET_EVB_RK3288_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_EVB_RK3288$/;"	c
CONFIG_TARGET_EVB_RK3399	arch/arm/mach-rockchip/rk3399/Kconfig	/^config TARGET_EVB_RK3399$/;"	c	choice:choice49d2f70e0104
CONFIG_TARGET_EVB_RK3399_MODULE	arch/arm/mach-rockchip/rk3399/Kconfig	/^config TARGET_EVB_RK3399$/;"	c	choice:choice49d2f70e0104
CONFIG_TARGET_FENNEC_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_FENNEC_RK3288$/;"	c
CONFIG_TARGET_FENNEC_RK3288_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_FENNEC_RK3288$/;"	c
CONFIG_TARGET_FIREFLY_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_FIREFLY_RK3288$/;"	c
CONFIG_TARGET_FIREFLY_RK3288_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_FIREFLY_RK3288$/;"	c
CONFIG_TARGET_FLEA3	arch/arm/Kconfig	/^config TARGET_FLEA3$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_FLEA3_MODULE	arch/arm/Kconfig	/^config TARGET_FLEA3$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_GALILEO	board/intel/Kconfig	/^config TARGET_GALILEO$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_GALILEO_MODULE	board/intel/Kconfig	/^config TARGET_GALILEO$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_GDPPC440ETX	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_GDPPC440ETX$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_GDPPC440ETX_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_GDPPC440ETX$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_GE_B450V3	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B450V3$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GE_B450V3_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B450V3$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GE_B650V3	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B650V3$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GE_B650V3_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B650V3$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GE_B850V3	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B850V3$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GE_B850V3_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B850V3$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GOFLEXHOME	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_GOFLEXHOME$/;"	c	choice:choice87da77410104
CONFIG_TARGET_GOFLEXHOME_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_GOFLEXHOME$/;"	c	choice:choice87da77410104
CONFIG_TARGET_GOSE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_GOSE$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_GOSE_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_GOSE$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_GPLUGD	arch/arm/Kconfig	/^config TARGET_GPLUGD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_GPLUGD_MODULE	arch/arm/Kconfig	/^config TARGET_GPLUGD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_GRASSHOPPER	arch/avr32/Kconfig	/^config TARGET_GRASSHOPPER$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_GRASSHOPPER_MODULE	arch/avr32/Kconfig	/^config TARGET_GRASSHOPPER$/;"	c	choice:AVR32 architecture""choice59ba59100104
CONFIG_TARGET_GRSIM	arch/sparc/Kconfig	/^config TARGET_GRSIM$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GRSIM_LEON2	arch/sparc/Kconfig	/^config TARGET_GRSIM_LEON2$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GRSIM_LEON2_MODULE	arch/sparc/Kconfig	/^config TARGET_GRSIM_LEON2$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GRSIM_MODULE	arch/sparc/Kconfig	/^config TARGET_GRSIM$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GR_CPCI_AX2000	arch/sparc/Kconfig	/^config TARGET_GR_CPCI_AX2000$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GR_CPCI_AX2000_MODULE	arch/sparc/Kconfig	/^config TARGET_GR_CPCI_AX2000$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GR_EP2S60	arch/sparc/Kconfig	/^config TARGET_GR_EP2S60$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GR_EP2S60_MODULE	arch/sparc/Kconfig	/^config TARGET_GR_EP2S60$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GR_XC3S_1500	arch/sparc/Kconfig	/^config TARGET_GR_XC3S_1500$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GR_XC3S_1500_MODULE	arch/sparc/Kconfig	/^config TARGET_GR_XC3S_1500$/;"	c	choice:SPARC architecture""choice37f822db0104
CONFIG_TARGET_GURNARD	arch/arm/mach-at91/Kconfig	/^config TARGET_GURNARD$/;"	c	choice:choice338303b60104
CONFIG_TARGET_GURNARD_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_GURNARD$/;"	c	choice:choice338303b60104
CONFIG_TARGET_GURUPLUG	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_GURUPLUG$/;"	c	choice:choice87da77410104
CONFIG_TARGET_GURUPLUG_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_GURUPLUG$/;"	c	choice:choice87da77410104
CONFIG_TARGET_GW_VENTANA	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GW_VENTANA$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_GW_VENTANA_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GW_VENTANA$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_H2200	arch/arm/Kconfig	/^config TARGET_H2200$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_H2200_MODULE	arch/arm/Kconfig	/^config TARGET_H2200$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_HARMONY	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_HARMONY$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_HARMONY_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_HARMONY$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_HIKEY	arch/arm/Kconfig	/^config TARGET_HIKEY$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_HIKEY_MODULE	arch/arm/Kconfig	/^config TARGET_HIKEY$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_HRCON	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_HRCON$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_HRCON_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_HRCON$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_IB62X0	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_IB62X0$/;"	c	choice:choice87da77410104
CONFIG_TARGET_IB62X0_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_IB62X0$/;"	c	choice:choice87da77410104
CONFIG_TARGET_IBF_DSP561	arch/blackfin/Kconfig	/^config TARGET_IBF_DSP561$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_IBF_DSP561_MODULE	arch/blackfin/Kconfig	/^config TARGET_IBF_DSP561$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_ICON	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_ICON$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_ICONNECT	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_ICONNECT$/;"	c	choice:choice87da77410104
CONFIG_TARGET_ICONNECT_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_ICONNECT$/;"	c	choice:choice87da77410104
CONFIG_TARGET_ICON_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_ICON$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IDS8313	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_IDS8313$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_IDS8313_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_IDS8313$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_IMX31_PHYCORE	arch/arm/Kconfig	/^config TARGET_IMX31_PHYCORE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_IMX31_PHYCORE_MODULE	arch/arm/Kconfig	/^config TARGET_IMX31_PHYCORE$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_INKA4X0	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_INKA4X0$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_INKA4X0_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_INKA4X0$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_INTIP	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_INTIP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_INTIP_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_INTIP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IO	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IO64	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IO64$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IO64_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IO64$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IOCON	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IOCON$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IOCON_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IOCON$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IO_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_IP04	arch/blackfin/Kconfig	/^config TARGET_IP04$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_IP04_MODULE	arch/blackfin/Kconfig	/^config TARGET_IP04$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_IPAM390	arch/arm/mach-davinci/Kconfig	/^config TARGET_IPAM390$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_IPAM390_MODULE	arch/arm/mach-davinci/Kconfig	/^config TARGET_IPAM390$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_IPEK01	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_IPEK01$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_IPEK01_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_IPEK01$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_JETSON_TK1	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_JETSON_TK1$/;"	c	choice:choice925842630104
CONFIG_TARGET_JETSON_TK1_MODULE	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_JETSON_TK1$/;"	c	choice:choice925842630104
CONFIG_TARGET_JUPITER	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_JUPITER$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_JUPITER_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_JUPITER$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_K2E_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2E_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2E_EVM_MODULE	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2E_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2G_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2G_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2G_EVM_MODULE	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2G_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2HK_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2HK_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2HK_EVM_MODULE	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2HK_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2L_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2L_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_K2L_EVM_MODULE	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2L_EVM$/;"	c	choice:choicef20e67690104
CONFIG_TARGET_KATMAI	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_KATMAI$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_KATMAI_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_KATMAI$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_KC1	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_KC1$/;"	c	choice:choiced71808250104
CONFIG_TARGET_KC1_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_KC1$/;"	c	choice:choiced71808250104
CONFIG_TARGET_KILAUEA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_KILAUEA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_KILAUEA_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_KILAUEA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_KM82XX	arch/powerpc/cpu/mpc8260/Kconfig	/^config TARGET_KM82XX$/;"	c	choice:mpc8260 CPU""choicef6fc79380104
CONFIG_TARGET_KM82XX_MODULE	arch/powerpc/cpu/mpc8260/Kconfig	/^config TARGET_KM82XX$/;"	c	choice:mpc8260 CPU""choicef6fc79380104
CONFIG_TARGET_KM8360	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_KM8360$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_KM8360_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_KM8360$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_KMP204X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_KMP204X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_KMP204X_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_KMP204X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_KM_KIRKWOOD	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_KM_KIRKWOOD$/;"	c	choice:choice87da77410104
CONFIG_TARGET_KM_KIRKWOOD_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_KM_KIRKWOOD$/;"	c	choice:choice87da77410104
CONFIG_TARGET_KOELSCH	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_KOELSCH$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_KOELSCH_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_KOELSCH$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_KOSAGI_NOVENA	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_KOSAGI_NOVENA$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_KOSAGI_NOVENA_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_KOSAGI_NOVENA$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_KYLIN_RK3036	arch/arm/mach-rockchip/rk3036/Kconfig	/^config TARGET_KYLIN_RK3036$/;"	c
CONFIG_TARGET_KYLIN_RK3036_MODULE	arch/arm/mach-rockchip/rk3036/Kconfig	/^config TARGET_KYLIN_RK3036$/;"	c
CONFIG_TARGET_KZM9G	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_KZM9G$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_KZM9G_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_KZM9G$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_LAGER	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_LAGER$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_LAGER_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_LAGER$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_LEGOEV3	arch/arm/mach-davinci/Kconfig	/^config TARGET_LEGOEV3$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_LEGOEV3_MODULE	arch/arm/mach-davinci/Kconfig	/^config TARGET_LEGOEV3$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_LS1012AFRDM	arch/arm/Kconfig	/^config TARGET_LS1012AFRDM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1012AFRDM_MODULE	arch/arm/Kconfig	/^config TARGET_LS1012AFRDM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1012AQDS	arch/arm/Kconfig	/^config TARGET_LS1012AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1012AQDS_MODULE	arch/arm/Kconfig	/^config TARGET_LS1012AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1012ARDB	arch/arm/Kconfig	/^config TARGET_LS1012ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1012ARDB_MODULE	arch/arm/Kconfig	/^config TARGET_LS1012ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1021AQDS	arch/arm/Kconfig	/^config TARGET_LS1021AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1021AQDS_MODULE	arch/arm/Kconfig	/^config TARGET_LS1021AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1021ATWR	arch/arm/Kconfig	/^config TARGET_LS1021ATWR$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1021ATWR_MODULE	arch/arm/Kconfig	/^config TARGET_LS1021ATWR$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1043AQDS	arch/arm/Kconfig	/^config TARGET_LS1043AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1043AQDS_MODULE	arch/arm/Kconfig	/^config TARGET_LS1043AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1043ARDB	arch/arm/Kconfig	/^config TARGET_LS1043ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1043ARDB_MODULE	arch/arm/Kconfig	/^config TARGET_LS1043ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1046AQDS	arch/arm/Kconfig	/^config TARGET_LS1046AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1046AQDS_MODULE	arch/arm/Kconfig	/^config TARGET_LS1046AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1046ARDB	arch/arm/Kconfig	/^config TARGET_LS1046ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS1046ARDB_MODULE	arch/arm/Kconfig	/^config TARGET_LS1046ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080AQDS	arch/arm/Kconfig	/^config TARGET_LS2080AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080AQDS_MODULE	arch/arm/Kconfig	/^config TARGET_LS2080AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080ARDB	arch/arm/Kconfig	/^config TARGET_LS2080ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080ARDB_MODULE	arch/arm/Kconfig	/^config TARGET_LS2080ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080A_EMU	arch/arm/Kconfig	/^config TARGET_LS2080A_EMU$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080A_EMU_MODULE	arch/arm/Kconfig	/^config TARGET_LS2080A_EMU$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080A_SIMU	arch/arm/Kconfig	/^config TARGET_LS2080A_SIMU$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LS2080A_SIMU_MODULE	arch/arm/Kconfig	/^config TARGET_LS2080A_SIMU$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_LSXL	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_LSXL$/;"	c	choice:choice87da77410104
CONFIG_TARGET_LSXL_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_LSXL$/;"	c	choice:choice87da77410104
CONFIG_TARGET_LUAN	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_LUAN$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_LUAN_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_LUAN$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_LWMON5	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_LWMON5$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_LWMON5_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_LWMON5$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_M28EVK	arch/arm/Kconfig	/^config TARGET_M28EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_M28EVK_MODULE	arch/arm/Kconfig	/^config TARGET_M28EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_M5208EVBE	arch/m68k/Kconfig	/^config TARGET_M5208EVBE$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5208EVBE_MODULE	arch/m68k/Kconfig	/^config TARGET_M5208EVBE$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M52277EVB	arch/m68k/Kconfig	/^config TARGET_M52277EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M52277EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M52277EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5235EVB	arch/m68k/Kconfig	/^config TARGET_M5235EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5235EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5235EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5249EVB	arch/m68k/Kconfig	/^config TARGET_M5249EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5249EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5249EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5253DEMO	arch/m68k/Kconfig	/^config TARGET_M5253DEMO$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5253DEMO_MODULE	arch/m68k/Kconfig	/^config TARGET_M5253DEMO$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5253EVBE	arch/m68k/Kconfig	/^config TARGET_M5253EVBE$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5253EVBE_MODULE	arch/m68k/Kconfig	/^config TARGET_M5253EVBE$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5272C3	arch/m68k/Kconfig	/^config TARGET_M5272C3$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5272C3_MODULE	arch/m68k/Kconfig	/^config TARGET_M5272C3$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5275EVB	arch/m68k/Kconfig	/^config TARGET_M5275EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5275EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5275EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5282EVB	arch/m68k/Kconfig	/^config TARGET_M5282EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5282EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5282EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M53017EVB	arch/m68k/Kconfig	/^config TARGET_M53017EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M53017EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M53017EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5329EVB	arch/m68k/Kconfig	/^config TARGET_M5329EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5329EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5329EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5373EVB	arch/m68k/Kconfig	/^config TARGET_M5373EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5373EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5373EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M53EVK	arch/arm/Kconfig	/^config TARGET_M53EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_M53EVK_MODULE	arch/arm/Kconfig	/^config TARGET_M53EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_M54418TWR	arch/m68k/Kconfig	/^config TARGET_M54418TWR$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M54418TWR_MODULE	arch/m68k/Kconfig	/^config TARGET_M54418TWR$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M54451EVB	arch/m68k/Kconfig	/^config TARGET_M54451EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M54451EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M54451EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M54455EVB	arch/m68k/Kconfig	/^config TARGET_M54455EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M54455EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M54455EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5475EVB	arch/m68k/Kconfig	/^config TARGET_M5475EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5475EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5475EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5485EVB	arch/m68k/Kconfig	/^config TARGET_M5485EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_M5485EVB_MODULE	arch/m68k/Kconfig	/^config TARGET_M5485EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
CONFIG_TARGET_MA5D4EVK	arch/arm/mach-at91/Kconfig	/^config TARGET_MA5D4EVK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_MA5D4EVK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_MA5D4EVK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_MAKALU	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MAKALU$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_MAKALU_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MAKALU$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_MALTA	arch/mips/Kconfig	/^config TARGET_MALTA$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_MALTA_MODULE	arch/mips/Kconfig	/^config TARGET_MALTA$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_MAXBCM	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MAXBCM$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_MAXBCM_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MAXBCM$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_MCX	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_MCX$/;"	c	choice:choice629b97240104
CONFIG_TARGET_MCX_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_MCX$/;"	c	choice:choice629b97240104
CONFIG_TARGET_MECP5123	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_MECP5123$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_MECP5123_MODULE	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_MECP5123$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_MEDCOM_WIDE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_MEDCOM_WIDE$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_MEDCOM_WIDE_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_MEDCOM_WIDE$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_MEESC	arch/arm/mach-at91/Kconfig	/^config TARGET_MEESC$/;"	c	choice:choice338303b60104
CONFIG_TARGET_MEESC_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_MEESC$/;"	c	choice:choice338303b60104
CONFIG_TARGET_MICROBLAZE_GENERIC	arch/microblaze/Kconfig	/^config TARGET_MICROBLAZE_GENERIC$/;"	c	choice:MicroBlaze architecture""choicee81d234a0104
CONFIG_TARGET_MICROBLAZE_GENERIC_MODULE	arch/microblaze/Kconfig	/^config TARGET_MICROBLAZE_GENERIC$/;"	c	choice:MicroBlaze architecture""choicee81d234a0104
CONFIG_TARGET_MIGOR	arch/sh/Kconfig	/^config TARGET_MIGOR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MIGOR_MODULE	arch/sh/Kconfig	/^config TARGET_MIGOR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MINIARM_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_MINIARM_RK3288$/;"	c
CONFIG_TARGET_MINIARM_RK3288_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_MINIARM_RK3288$/;"	c
CONFIG_TARGET_MINNOWMAX	board/intel/Kconfig	/^config TARGET_MINNOWMAX$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_MINNOWMAX_MODULE	board/intel/Kconfig	/^config TARGET_MINNOWMAX$/;"	c	choice:choice7d5621a80104
CONFIG_TARGET_MIP405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MIP405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_MIP405T	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MIP405T$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_MIP405T_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MIP405T$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_MIP405_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MIP405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_MOTIONPRO	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_MOTIONPRO$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_MOTIONPRO_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_MOTIONPRO$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_MPC5121ADS	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_MPC5121ADS$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_MPC5121ADS_MODULE	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_MPC5121ADS$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_MPC8308RDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8308RDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8308RDB_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8308RDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8308_P1M	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8308_P1M$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8308_P1M_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8308_P1M$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8313ERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8313ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8313ERDB_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8313ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8315ERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8315ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8315ERDB_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8315ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8323ERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8323ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8323ERDB_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8323ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC832XEMDS	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC832XEMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC832XEMDS_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC832XEMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8349EMDS	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8349EMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8349EMDS_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8349EMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8349ITX	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8349ITX$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8349ITX_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8349ITX$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC837XEMDS	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC837XEMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC837XEMDS_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC837XEMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC837XERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC837XERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC837XERDB_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC837XERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_MPC8536DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8536DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8536DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8536DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8540ADS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8540ADS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8540ADS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8540ADS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8541CDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8541CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8541CDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8541CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8544DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8544DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8544DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8544DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8548CDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8548CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8548CDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8548CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8555CDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8555CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8555CDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8555CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8560ADS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8560ADS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8560ADS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8560ADS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8568MDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8568MDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8568MDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8568MDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8569MDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8569MDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8569MDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8569MDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8572DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8572DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8572DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8572DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_MPC8610HPCD	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_MPC8610HPCD$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_MPC8610HPCD_MODULE	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_MPC8610HPCD$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_MPC8641HPCN	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_MPC8641HPCN$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_MPC8641HPCN_MODULE	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_MPC8641HPCN$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_MPR2	arch/sh/Kconfig	/^config TARGET_MPR2$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MPR2_MODULE	arch/sh/Kconfig	/^config TARGET_MPR2$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MS7720SE	arch/sh/Kconfig	/^config TARGET_MS7720SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MS7720SE_MODULE	arch/sh/Kconfig	/^config TARGET_MS7720SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MS7722SE	arch/sh/Kconfig	/^config TARGET_MS7722SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MS7722SE_MODULE	arch/sh/Kconfig	/^config TARGET_MS7722SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MS7750SE	arch/sh/Kconfig	/^config TARGET_MS7750SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MS7750SE_MODULE	arch/sh/Kconfig	/^config TARGET_MS7750SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_MT_VENTOUX	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_MT_VENTOUX$/;"	c	choice:choice629b97240104
CONFIG_TARGET_MT_VENTOUX_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_MT_VENTOUX$/;"	c	choice:choice629b97240104
CONFIG_TARGET_MUNICES	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_MUNICES$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_MUNICES_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_MUNICES$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_MVEBU_DB_88F3720	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MVEBU_DB_88F3720$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_MVEBU_DB_88F3720_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MVEBU_DB_88F3720$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_MVEBU_DB_88F7040	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MVEBU_DB_88F7040$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_MVEBU_DB_88F7040_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MVEBU_DB_88F7040$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_MX23EVK	arch/arm/Kconfig	/^config TARGET_MX23EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX23EVK_MODULE	arch/arm/Kconfig	/^config TARGET_MX23EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX23_OLINUXINO	arch/arm/Kconfig	/^config TARGET_MX23_OLINUXINO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX23_OLINUXINO_MODULE	arch/arm/Kconfig	/^config TARGET_MX23_OLINUXINO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX25PDK	arch/arm/Kconfig	/^config TARGET_MX25PDK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX25PDK_MODULE	arch/arm/Kconfig	/^config TARGET_MX25PDK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX28EVK	arch/arm/Kconfig	/^config TARGET_MX28EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX28EVK_MODULE	arch/arm/Kconfig	/^config TARGET_MX28EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX31ADS	arch/arm/Kconfig	/^config TARGET_MX31ADS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX31ADS_MODULE	arch/arm/Kconfig	/^config TARGET_MX31ADS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX31PDK	arch/arm/Kconfig	/^config TARGET_MX31PDK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX31PDK_MODULE	arch/arm/Kconfig	/^config TARGET_MX31PDK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX35PDK	arch/arm/Kconfig	/^config TARGET_MX35PDK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX35PDK_MODULE	arch/arm/Kconfig	/^config TARGET_MX35PDK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX51EVK	arch/arm/Kconfig	/^config TARGET_MX51EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX51EVK_MODULE	arch/arm/Kconfig	/^config TARGET_MX51EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53ARD	arch/arm/Kconfig	/^config TARGET_MX53ARD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53ARD_MODULE	arch/arm/Kconfig	/^config TARGET_MX53ARD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53EVK	arch/arm/Kconfig	/^config TARGET_MX53EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53EVK_MODULE	arch/arm/Kconfig	/^config TARGET_MX53EVK$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53LOCO	arch/arm/Kconfig	/^config TARGET_MX53LOCO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53LOCO_MODULE	arch/arm/Kconfig	/^config TARGET_MX53LOCO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53SMD	arch/arm/Kconfig	/^config TARGET_MX53SMD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX53SMD_MODULE	arch/arm/Kconfig	/^config TARGET_MX53SMD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_MX6CUBOXI	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6CUBOXI$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6CUBOXI_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6CUBOXI$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6QARM2	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6QARM2$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6QARM2_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6QARM2$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6QSABREAUTO	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6QSABREAUTO$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6QSABREAUTO_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6QSABREAUTO$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6Q_ICORE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6Q_ICORE$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6Q_ICORE_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6Q_ICORE$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SABRESD	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SABRESD$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SABRESD_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SABRESD$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SLEVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SLEVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SLEVK_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SLEVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SXSABREAUTO	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SXSABREAUTO$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SXSABREAUTO_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SXSABREAUTO$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SXSABRESD	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SXSABRESD$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6SXSABRESD_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SXSABRESD$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6ULL_14X14_EVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6ULL_14X14_EVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6ULL_14X14_EVK_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6ULL_14X14_EVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6UL_14X14_EVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6UL_14X14_EVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6UL_14X14_EVK_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6UL_14X14_EVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6UL_9X9_EVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6UL_9X9_EVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX6UL_9X9_EVK_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6UL_9X9_EVK$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_MX7DSABRESD	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_MX7DSABRESD$/;"	c	choice:choice1fec2d000104
CONFIG_TARGET_MX7DSABRESD_MODULE	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_MX7DSABRESD$/;"	c	choice:choice1fec2d000104
CONFIG_TARGET_NAS220	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NAS220$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NAS220_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NAS220$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NEO	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_NEO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_NEO_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_NEO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_NET2BIG_V2	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NET2BIG_V2$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NET2BIG_V2_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NET2BIG_V2$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NETSPACE_V2	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NETSPACE_V2$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NETSPACE_V2_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NETSPACE_V2$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NITROGEN6X	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_NITROGEN6X$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_NITROGEN6X_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_NITROGEN6X$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_NOKIA_RX51	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_NOKIA_RX51$/;"	c	choice:choice629b97240104
CONFIG_TARGET_NOKIA_RX51_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_NOKIA_RX51$/;"	c	choice:choice629b97240104
CONFIG_TARGET_NSA310S	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NSA310S$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NSA310S_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NSA310S$/;"	c	choice:choice87da77410104
CONFIG_TARGET_NSIM	arch/arc/Kconfig	/^config TARGET_NSIM$/;"	c	choice:ARC architecture""choice763e4ef80404
CONFIG_TARGET_NSIM_MODULE	arch/arc/Kconfig	/^config TARGET_NSIM$/;"	c	choice:ARC architecture""choice763e4ef80404
CONFIG_TARGET_NYAN_BIG	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_NYAN_BIG$/;"	c	choice:choice925842630104
CONFIG_TARGET_NYAN_BIG_MODULE	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_NYAN_BIG$/;"	c	choice:choice925842630104
CONFIG_TARGET_O2D	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2D$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2D300	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2D300$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2D300_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2D300$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2DNT2	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2DNT2$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2DNT2_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2DNT2$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2D_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2D$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2I	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2I$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2I_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2I$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2MNT	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2MNT$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O2MNT_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2MNT$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O3DNT	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O3DNT$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_O3DNT_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O3DNT$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_ODROID	arch/arm/mach-exynos/Kconfig	/^config TARGET_ODROID$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_ODROID_C2	arch/arm/mach-meson/Kconfig	/^config TARGET_ODROID_C2$/;"	c
CONFIG_TARGET_ODROID_C2_MODULE	arch/arm/mach-meson/Kconfig	/^config TARGET_ODROID_C2$/;"	c
CONFIG_TARGET_ODROID_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_ODROID$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_ODROID_XU3	arch/arm/mach-exynos/Kconfig	/^config TARGET_ODROID_XU3$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_ODROID_XU3_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_ODROID_XU3$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_OMAP3_BEAGLE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_BEAGLE$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_BEAGLE_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_BEAGLE$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_CAIRO	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_CAIRO$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_CAIRO_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_CAIRO$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_EVM	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_EVM$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_EVM_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_EVM$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_IGEP00X0	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_IGEP00X0$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_IGEP00X0_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_IGEP00X0$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_LOGIC	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_LOGIC$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_LOGIC_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_LOGIC$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_OVERO	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_OVERO$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_OVERO_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_OVERO$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_PANDORA	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_PANDORA$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_PANDORA_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_PANDORA$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_ZOOM1	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_ZOOM1$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP3_ZOOM1_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_ZOOM1$/;"	c	choice:choice629b97240104
CONFIG_TARGET_OMAP4_PANDA	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_OMAP4_PANDA$/;"	c	choice:choiced71808250104
CONFIG_TARGET_OMAP4_PANDA_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_OMAP4_PANDA$/;"	c	choice:choiced71808250104
CONFIG_TARGET_OMAP4_SDP4430	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_OMAP4_SDP4430$/;"	c	choice:choiced71808250104
CONFIG_TARGET_OMAP4_SDP4430_MODULE	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_OMAP4_SDP4430$/;"	c	choice:choiced71808250104
CONFIG_TARGET_OMAP5_UEVM	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_OMAP5_UEVM$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_OMAP5_UEVM_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_OMAP5_UEVM$/;"	c	choice:choice4b9479260104
CONFIG_TARGET_OMAPL138_LCDK	arch/arm/mach-davinci/Kconfig	/^config TARGET_OMAPL138_LCDK$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_OMAPL138_LCDK_MODULE	arch/arm/mach-davinci/Kconfig	/^config TARGET_OMAPL138_LCDK$/;"	c	choice:choice9e1fa8550104
CONFIG_TARGET_OPENRD	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_OPENRD$/;"	c	choice:choice87da77410104
CONFIG_TARGET_OPENRD_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_OPENRD$/;"	c	choice:choice87da77410104
CONFIG_TARGET_OPENRISC_GENERIC	arch/openrisc/Kconfig	/^config TARGET_OPENRISC_GENERIC$/;"	c	choice:OpenRISC architecture""choice807681850104
CONFIG_TARGET_OPENRISC_GENERIC_MODULE	arch/openrisc/Kconfig	/^config TARGET_OPENRISC_GENERIC$/;"	c	choice:OpenRISC architecture""choice807681850104
CONFIG_TARGET_ORIGEN	arch/arm/mach-exynos/Kconfig	/^config TARGET_ORIGEN$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_ORIGEN_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_ORIGEN$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_OT1200	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_OT1200$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_OT1200_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_OT1200$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_P1010RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1010RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1010RDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1010RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1022DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1022DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1022DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1022DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1023RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1023RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1023RDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1023RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1_P2_RDB_PC	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1_P2_RDB_PC$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1_P2_RDB_PC_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1_P2_RDB_PC$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1_TWR	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1_TWR$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P1_TWR_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1_TWR$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P2041RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P2041RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P2041RDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P2041RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P2371_0000	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2371_0000$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_P2371_0000_MODULE	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2371_0000$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_P2371_2180	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2371_2180$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_P2371_2180_MODULE	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2371_2180$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_P2571	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2571$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_P2571_MODULE	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2571$/;"	c	choice:choice41b8a27f0104
CONFIG_TARGET_P2771_0000	arch/arm/mach-tegra/tegra186/Kconfig	/^config TARGET_P2771_0000$/;"	c	choice:choice93908b2b0104
CONFIG_TARGET_P2771_0000_MODULE	arch/arm/mach-tegra/tegra186/Kconfig	/^config TARGET_P2771_0000$/;"	c	choice:choice93908b2b0104
CONFIG_TARGET_P3041DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P3041DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P3041DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P3041DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P4080DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P4080DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P4080DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P4080DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P5020DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P5020DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P5020DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P5020DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P5040DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P5040DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_P5040DS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P5040DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_PATI	arch/powerpc/cpu/mpc5xx/Kconfig	/^config TARGET_PATI$/;"	c	choice:mpc5xx CPU""choice42cbeb8d0104
CONFIG_TARGET_PATI_MODULE	arch/powerpc/cpu/mpc5xx/Kconfig	/^config TARGET_PATI$/;"	c	choice:mpc5xx CPU""choice42cbeb8d0104
CONFIG_TARGET_PAZ00	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_PAZ00$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_PAZ00_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_PAZ00$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_PB1X00	arch/mips/Kconfig	/^config TARGET_PB1X00$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_PB1X00_MODULE	arch/mips/Kconfig	/^config TARGET_PB1X00$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_PCM030	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_PCM030$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_PCM030_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_PCM030$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_PCM051	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PCM051$/;"	c	choice:choice097e41480104
CONFIG_TARGET_PCM051_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PCM051$/;"	c	choice:choice097e41480104
CONFIG_TARGET_PCM052	arch/arm/Kconfig	/^config TARGET_PCM052$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_PCM052_MODULE	arch/arm/Kconfig	/^config TARGET_PCM052$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_PCM058	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PCM058$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PCM058_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PCM058$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PDM360NG	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_PDM360NG$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_PDM360NG_MODULE	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_PDM360NG$/;"	c	choice:mpc512x CPU""choice919b2f980104
CONFIG_TARGET_PEACH_PI	arch/arm/mach-exynos/Kconfig	/^config TARGET_PEACH_PI$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_PEACH_PIT	arch/arm/mach-exynos/Kconfig	/^config TARGET_PEACH_PIT$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_PEACH_PIT_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_PEACH_PIT$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_PEACH_PI_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_PEACH_PI$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_PENGWYN	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PENGWYN$/;"	c	choice:choice097e41480104
CONFIG_TARGET_PENGWYN_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PENGWYN$/;"	c	choice:choice097e41480104
CONFIG_TARGET_PEPPER	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PEPPER$/;"	c	choice:choice097e41480104
CONFIG_TARGET_PEPPER_MODULE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PEPPER$/;"	c	choice:choice097e41480104
CONFIG_TARGET_PIC32MZDASK	arch/mips/mach-pic32/Kconfig	/^config TARGET_PIC32MZDASK$/;"	c	choice:Microchip PIC32 platforms""choicef4d9e1b10204
CONFIG_TARGET_PIC32MZDASK_MODULE	arch/mips/mach-pic32/Kconfig	/^config TARGET_PIC32MZDASK$/;"	c	choice:Microchip PIC32 platforms""choicef4d9e1b10204
CONFIG_TARGET_PICOSAM9G45	arch/arm/mach-at91/Kconfig	/^config TARGET_PICOSAM9G45$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PICOSAM9G45_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_PICOSAM9G45$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PICO_IMX6UL	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PICO_IMX6UL$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PICO_IMX6UL_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PICO_IMX6UL$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PIP405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PIP405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PIP405_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PIP405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PLATINUM_PICON	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PLATINUM_PICON$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PLATINUM_PICON_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PLATINUM_PICON$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PLATINUM_TITANIUM	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PLATINUM_TITANIUM$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PLATINUM_TITANIUM_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PLATINUM_TITANIUM$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_PLU405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PLU405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PLU405_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PLU405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PLUTUX	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_PLUTUX$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_PLUTUX_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_PLUTUX$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_PM9261	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9261$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PM9261_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9261$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PM9263	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9263$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PM9263_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9263$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PM9G45	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9G45$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PM9G45_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9G45$/;"	c	choice:choice338303b60104
CONFIG_TARGET_PMC405DE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PMC405DE$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PMC405DE_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PMC405DE$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PMC440	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PMC440$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_PMC440_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PMC440$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_POGO_E02	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_POGO_E02$/;"	c	choice:choice87da77410104
CONFIG_TARGET_POGO_E02_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_POGO_E02$/;"	c	choice:choice87da77410104
CONFIG_TARGET_POPMETAL_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_POPMETAL_RK3288$/;"	c
CONFIG_TARGET_POPMETAL_RK3288_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_POPMETAL_RK3288$/;"	c
CONFIG_TARGET_PORTER	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_PORTER$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_PORTER_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_PORTER$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_PR1	arch/blackfin/Kconfig	/^config TARGET_PR1$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_PR1_MODULE	arch/blackfin/Kconfig	/^config TARGET_PR1$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_PXM2	arch/arm/Kconfig	/^config TARGET_PXM2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_PXM2_MODULE	arch/arm/Kconfig	/^config TARGET_PXM2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_QEMU_MIPS	arch/mips/Kconfig	/^config TARGET_QEMU_MIPS$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_QEMU_MIPS_MODULE	arch/mips/Kconfig	/^config TARGET_QEMU_MIPS$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_QEMU_PPCE500	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_QEMU_PPCE500$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_QEMU_PPCE500_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_QEMU_PPCE500$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_QEMU_X86	board/emulation/Kconfig	/^config TARGET_QEMU_X86$/;"	c	choice:choice59657bba0104
CONFIG_TARGET_QEMU_X86_MODULE	board/emulation/Kconfig	/^config TARGET_QEMU_X86$/;"	c	choice:choice59657bba0104
CONFIG_TARGET_R0P7734	arch/sh/Kconfig	/^config TARGET_R0P7734$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_R0P7734_MODULE	arch/sh/Kconfig	/^config TARGET_R0P7734$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_R2DPLUS	arch/sh/Kconfig	/^config TARGET_R2DPLUS$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_R2DPLUS_MODULE	arch/sh/Kconfig	/^config TARGET_R2DPLUS$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_R7780MP	arch/sh/Kconfig	/^config TARGET_R7780MP$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_R7780MP_MODULE	arch/sh/Kconfig	/^config TARGET_R7780MP$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RASTABAN	arch/arm/Kconfig	/^config TARGET_RASTABAN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_RASTABAN_MODULE	arch/arm/Kconfig	/^config TARGET_RASTABAN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_REDWOOD	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_REDWOOD$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_REDWOOD_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_REDWOOD$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_ROCK2	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_ROCK2$/;"	c
CONFIG_TARGET_ROCK2_MODULE	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_ROCK2$/;"	c
CONFIG_TARGET_RPI	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_2	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_2$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_2_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_2$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_3	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_3$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_3_32B	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_3_32B$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_3_32B_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_3_32B$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_3_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_3$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RPI_MODULE	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
CONFIG_TARGET_RSK7203	arch/sh/Kconfig	/^config TARGET_RSK7203$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RSK7203_MODULE	arch/sh/Kconfig	/^config TARGET_RSK7203$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RSK7264	arch/sh/Kconfig	/^config TARGET_RSK7264$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RSK7264_MODULE	arch/sh/Kconfig	/^config TARGET_RSK7264$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RSK7269	arch/sh/Kconfig	/^config TARGET_RSK7269$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RSK7269_MODULE	arch/sh/Kconfig	/^config TARGET_RSK7269$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_RUT	arch/arm/Kconfig	/^config TARGET_RUT$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_RUT_MODULE	arch/arm/Kconfig	/^config TARGET_RUT$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_S32V234EVB	arch/arm/Kconfig	/^config TARGET_S32V234EVB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_S32V234EVB_MODULE	arch/arm/Kconfig	/^config TARGET_S32V234EVB$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_S5PC210_UNIVERSAL	arch/arm/mach-exynos/Kconfig	/^config TARGET_S5PC210_UNIVERSAL$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_S5PC210_UNIVERSAL_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_S5PC210_UNIVERSAL$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_S5P_GONI	arch/arm/mach-s5pc1xx/Kconfig	/^config TARGET_S5P_GONI$/;"	c	choice:choice5f681bf30104
CONFIG_TARGET_S5P_GONI_MODULE	arch/arm/mach-s5pc1xx/Kconfig	/^config TARGET_S5P_GONI$/;"	c	choice:choice5f681bf30104
CONFIG_TARGET_SALVATOR_X	arch/arm/mach-rmobile/Kconfig.64	/^config TARGET_SALVATOR_X$/;"	c	choice:choice335b3b590104
CONFIG_TARGET_SALVATOR_X_MODULE	arch/arm/mach-rmobile/Kconfig.64	/^config TARGET_SALVATOR_X$/;"	c	choice:choice335b3b590104
CONFIG_TARGET_SAMA5D2_PTC	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D2_PTC$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D2_PTC_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D2_PTC$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D2_XPLAINED	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D2_XPLAINED$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D2_XPLAINED_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D2_XPLAINED$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D3XEK	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D3XEK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D3XEK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D3XEK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D3_XPLAINED	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D3_XPLAINED$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D3_XPLAINED_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D3_XPLAINED$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D4EK	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D4EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D4EK_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D4EK$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D4_XPLAINED	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D4_XPLAINED$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SAMA5D4_XPLAINED_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D4_XPLAINED$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SANSA_FUZE_PLUS	arch/arm/Kconfig	/^config TARGET_SANSA_FUZE_PLUS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SANSA_FUZE_PLUS_MODULE	arch/arm/Kconfig	/^config TARGET_SANSA_FUZE_PLUS$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SBC8349	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_SBC8349$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_SBC8349_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_SBC8349$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_SBC8548	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_SBC8548$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_SBC8548_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_SBC8548$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_SBC8641D	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_SBC8641D$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_SBC8641D_MODULE	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_SBC8641D$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_SC_SPS_1	arch/arm/Kconfig	/^config TARGET_SC_SPS_1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SC_SPS_1_MODULE	arch/arm/Kconfig	/^config TARGET_SC_SPS_1$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SEABOARD	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_SEABOARD$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_SEABOARD_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_SEABOARD$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_SECOMX6	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_SECOMX6$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_SECOMX6_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_SECOMX6$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_SEQUOIA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_SEQUOIA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_SEQUOIA_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_SEQUOIA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_SH7752EVB	arch/sh/Kconfig	/^config TARGET_SH7752EVB$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7752EVB_MODULE	arch/sh/Kconfig	/^config TARGET_SH7752EVB$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7753EVB	arch/sh/Kconfig	/^config TARGET_SH7753EVB$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7753EVB_MODULE	arch/sh/Kconfig	/^config TARGET_SH7753EVB$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7757LCR	arch/sh/Kconfig	/^config TARGET_SH7757LCR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7757LCR_MODULE	arch/sh/Kconfig	/^config TARGET_SH7757LCR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7763RDP	arch/sh/Kconfig	/^config TARGET_SH7763RDP$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7763RDP_MODULE	arch/sh/Kconfig	/^config TARGET_SH7763RDP$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7785LCR	arch/sh/Kconfig	/^config TARGET_SH7785LCR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SH7785LCR_MODULE	arch/sh/Kconfig	/^config TARGET_SH7785LCR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SHEEVAPLUG	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_SHEEVAPLUG$/;"	c	choice:choice87da77410104
CONFIG_TARGET_SHEEVAPLUG_MODULE	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_SHEEVAPLUG$/;"	c	choice:choice87da77410104
CONFIG_TARGET_SHMIN	arch/sh/Kconfig	/^config TARGET_SHMIN$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SHMIN_MODULE	arch/sh/Kconfig	/^config TARGET_SHMIN$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
CONFIG_TARGET_SILK	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_SILK$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_SILK_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_SILK$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_SMARTWEB	arch/arm/mach-at91/Kconfig	/^config TARGET_SMARTWEB$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SMARTWEB_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SMARTWEB$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SMDK2410	arch/arm/Kconfig	/^config TARGET_SMDK2410$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SMDK2410_MODULE	arch/arm/Kconfig	/^config TARGET_SMDK2410$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SMDK5250	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDK5250$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SMDK5250_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDK5250$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SMDK5420	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDK5420$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SMDK5420_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDK5420$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SMDKC100	arch/arm/mach-s5pc1xx/Kconfig	/^config TARGET_SMDKC100$/;"	c	choice:choice5f681bf30104
CONFIG_TARGET_SMDKC100_MODULE	arch/arm/mach-s5pc1xx/Kconfig	/^config TARGET_SMDKC100$/;"	c	choice:choice5f681bf30104
CONFIG_TARGET_SMDKV310	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDKV310$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_SMDKV310_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDKV310$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_SNAPPER9260	arch/arm/mach-at91/Kconfig	/^config TARGET_SNAPPER9260$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SNAPPER9260_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_SNAPPER9260$/;"	c	choice:choice338303b60104
CONFIG_TARGET_SNIPER	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_SNIPER$/;"	c	choice:choice629b97240104
CONFIG_TARGET_SNIPER_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_SNIPER$/;"	c	choice:choice629b97240104
CONFIG_TARGET_SNOW	arch/arm/mach-exynos/Kconfig	/^config TARGET_SNOW$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SNOW_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_SNOW$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SOCFPGA_ARRIA5	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_ARRIA5$/;"	c
CONFIG_TARGET_SOCFPGA_ARRIA5_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_ARRIA5$/;"	c
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_ARRIA5_SOCDK$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_ARRIA5_SOCDK$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_CYCLONE5	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_CYCLONE5$/;"	c
CONFIG_TARGET_SOCFPGA_CYCLONE5_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_CYCLONE5$/;"	c
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_CYCLONE5_SOCDK$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_CYCLONE5_SOCDK$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_DENX_MCVEVK	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_DENX_MCVEVK$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_DENX_MCVEVK_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_DENX_MCVEVK$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_EBV_SOCRATES$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_EBV_SOCRATES$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_GEN5	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_GEN5$/;"	c
CONFIG_TARGET_SOCFPGA_GEN5_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_GEN5$/;"	c
CONFIG_TARGET_SOCFPGA_IS1	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_IS1$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_IS1_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_IS1$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_SAMTEC_VINING_FPGA$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_SAMTEC_VINING_FPGA$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_SR1500	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_SR1500$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_SR1500_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_SR1500$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_TERASIC_DE0_NANO$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_TERASIC_DE0_NANO$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_TERASIC_SOCKIT$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT_MODULE	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_TERASIC_SOCKIT$/;"	c	choice:choice6cea97ba0104
CONFIG_TARGET_SOCRATES	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_SOCRATES$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_SOCRATES_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_SOCRATES$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_SOM_DB5800_SOM_6867	board/advantech/Kconfig	/^config TARGET_SOM_DB5800_SOM_6867$/;"	c	choice:choicebe9bc59a0104
CONFIG_TARGET_SOM_DB5800_SOM_6867_MODULE	board/advantech/Kconfig	/^config TARGET_SOM_DB5800_SOM_6867$/;"	c	choice:choicebe9bc59a0104
CONFIG_TARGET_SPEAR300	arch/arm/Kconfig	/^config TARGET_SPEAR300$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR300_MODULE	arch/arm/Kconfig	/^config TARGET_SPEAR300$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR310	arch/arm/Kconfig	/^config TARGET_SPEAR310$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR310_MODULE	arch/arm/Kconfig	/^config TARGET_SPEAR310$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR320	arch/arm/Kconfig	/^config TARGET_SPEAR320$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR320_MODULE	arch/arm/Kconfig	/^config TARGET_SPEAR320$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR600	arch/arm/Kconfig	/^config TARGET_SPEAR600$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPEAR600_MODULE	arch/arm/Kconfig	/^config TARGET_SPEAR600$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SPRING	arch/arm/mach-exynos/Kconfig	/^config TARGET_SPRING$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_SPRING_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_SPRING$/;"	c	choice:choice9b416b3d0304
CONFIG_TARGET_STM32F429_DISCOVERY	arch/arm/mach-stm32/stm32f4/Kconfig	/^config TARGET_STM32F429_DISCOVERY$/;"	c
CONFIG_TARGET_STM32F429_DISCOVERY_MODULE	arch/arm/mach-stm32/stm32f4/Kconfig	/^config TARGET_STM32F429_DISCOVERY$/;"	c
CONFIG_TARGET_STM32F746_DISCO	arch/arm/mach-stm32/stm32f7/Kconfig	/^config TARGET_STM32F746_DISCO$/;"	c
CONFIG_TARGET_STM32F746_DISCO_MODULE	arch/arm/mach-stm32/stm32f7/Kconfig	/^config TARGET_STM32F746_DISCO$/;"	c
CONFIG_TARGET_STOUT	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_STOUT$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_STOUT_MODULE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_STOUT$/;"	c	choice:choice335b3af40104
CONFIG_TARGET_STRIDER	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_STRIDER$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_STRIDER_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_STRIDER$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_STV0991	arch/arm/Kconfig	/^config TARGET_STV0991$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_STV0991_MODULE	arch/arm/Kconfig	/^config TARGET_STV0991$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_SUVD3	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_SUVD3$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_SUVD3_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_SUVD3$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_T102XQDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T102XQDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T102XQDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T102XQDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T102XRDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T102XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T102XRDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T102XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T1040QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T1040QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T1040QDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T1040QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T104XRDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T104XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T104XRDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T104XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T208XQDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T208XQDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T208XQDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T208XQDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T208XRDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T208XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T208XRDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T208XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T3CORP	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_T3CORP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_T3CORP_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_T3CORP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_T4240QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T4240QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T4240QDS_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T4240QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T4240RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T4240RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_T4240RDB_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T4240RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_TAO3530	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TAO3530$/;"	c	choice:choice629b97240104
CONFIG_TARGET_TAO3530_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TAO3530$/;"	c	choice:choice629b97240104
CONFIG_TARGET_TAURUS	arch/arm/mach-at91/Kconfig	/^config TARGET_TAURUS$/;"	c	choice:choice338303b60104
CONFIG_TARGET_TAURUS_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_TAURUS$/;"	c	choice:choice338303b60104
CONFIG_TARGET_TB100	arch/arc/Kconfig	/^config TARGET_TB100$/;"	c	choice:ARC architecture""choice763e4ef80404
CONFIG_TARGET_TB100_MODULE	arch/arc/Kconfig	/^config TARGET_TB100$/;"	c	choice:ARC architecture""choice763e4ef80404
CONFIG_TARGET_TBS2910	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TBS2910$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_TBS2910_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TBS2910$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_TCM_BF518	arch/blackfin/Kconfig	/^config TARGET_TCM_BF518$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_TCM_BF518_MODULE	arch/blackfin/Kconfig	/^config TARGET_TCM_BF518$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_TCM_BF537	arch/blackfin/Kconfig	/^config TARGET_TCM_BF537$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_TCM_BF537_MODULE	arch/blackfin/Kconfig	/^config TARGET_TCM_BF537$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
CONFIG_TARGET_TEC	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_TEC$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_TEC_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_TEC$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_TEC_NG	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_TEC_NG$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_TEC_NG_MODULE	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_TEC_NG$/;"	c	choice:choiced51ff68f0104
CONFIG_TARGET_THEADORABLE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_THEADORABLE$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_THEADORABLE_MODULE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_THEADORABLE$/;"	c	choice:choice1faa09360104
CONFIG_TARGET_THUBAN	arch/arm/Kconfig	/^config TARGET_THUBAN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_THUBAN_MODULE	arch/arm/Kconfig	/^config TARGET_THUBAN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_THUNDERX_88XX	arch/arm/Kconfig	/^config TARGET_THUNDERX_88XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_THUNDERX_88XX_MODULE	arch/arm/Kconfig	/^config TARGET_THUNDERX_88XX$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TI814X_EVM	arch/arm/Kconfig	/^config TARGET_TI814X_EVM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TI814X_EVM_MODULE	arch/arm/Kconfig	/^config TARGET_TI814X_EVM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TI816X_EVM	arch/arm/Kconfig	/^config TARGET_TI816X_EVM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TI816X_EVM_MODULE	arch/arm/Kconfig	/^config TARGET_TI816X_EVM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TITANIUM	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TITANIUM$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_TITANIUM_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TITANIUM$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_TQM5200	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_TQM5200$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_TQM5200_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_TQM5200$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_TQM823L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM823L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM823L_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM823L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM823M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM823M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM823M_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM823M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM834X	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_TQM834X$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_TQM834X_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_TQM834X$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_TQM850L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM850L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM850L_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM850L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM850M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM850M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM850M_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM850M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM855L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM855L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM855L_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM855L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM855M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM855M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM855M_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM855M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM860L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM860L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM860L_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM860L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM860M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM860M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM860M_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM860M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM862L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM862L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM862L_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM862L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM862M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM862M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM862M_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM862M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM866M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM866M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM866M_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM866M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM885D	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM885D$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQM885D_MODULE	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM885D$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
CONFIG_TARGET_TQMA6	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TQMA6$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_TQMA6_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TQMA6$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_TRATS	arch/arm/mach-exynos/Kconfig	/^config TARGET_TRATS$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_TRATS2	arch/arm/mach-exynos/Kconfig	/^config TARGET_TRATS2$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_TRATS2_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_TRATS2$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_TRATS_MODULE	arch/arm/mach-exynos/Kconfig	/^config TARGET_TRATS$/;"	c	choice:choice9b416b3d0204
CONFIG_TARGET_TRICORDER	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TRICORDER$/;"	c	choice:choice629b97240104
CONFIG_TARGET_TRICORDER_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TRICORDER$/;"	c	choice:choice629b97240104
CONFIG_TARGET_TRIMSLICE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_TRIMSLICE$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_TRIMSLICE_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_TRIMSLICE$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_TS4800	arch/arm/Kconfig	/^config TARGET_TS4800$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TS4800_MODULE	arch/arm/Kconfig	/^config TARGET_TS4800$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_TUXX1	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_TUXX1$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_TUXX1_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_TUXX1$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_TWISTER	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TWISTER$/;"	c	choice:choice629b97240104
CONFIG_TARGET_TWISTER_MODULE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TWISTER$/;"	c	choice:choice629b97240104
CONFIG_TARGET_UCP1020	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_UCP1020$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_UCP1020_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_UCP1020$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_UCP1020_NOR	board/Arcturus/ucp1020/Kconfig	/^config TARGET_UCP1020_NOR$/;"	c	choice:choiceec2bc0df0104
CONFIG_TARGET_UCP1020_NOR_MODULE	board/Arcturus/ucp1020/Kconfig	/^config TARGET_UCP1020_NOR$/;"	c	choice:choiceec2bc0df0104
CONFIG_TARGET_UCP1020_SPIFLASH	board/Arcturus/ucp1020/Kconfig	/^config TARGET_UCP1020_SPIFLASH$/;"	c	choice:choiceec2bc0df0104
CONFIG_TARGET_UCP1020_SPIFLASH_MODULE	board/Arcturus/ucp1020/Kconfig	/^config TARGET_UCP1020_SPIFLASH$/;"	c	choice:choiceec2bc0df0104
CONFIG_TARGET_UDOO	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_UDOO$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_UDOO_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_UDOO$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_USBARMORY	arch/arm/cpu/armv7/mx5/Kconfig	/^config TARGET_USBARMORY$/;"	c	choice:choice36f34afe0104
CONFIG_TARGET_USBARMORY_MODULE	arch/arm/cpu/armv7/mx5/Kconfig	/^config TARGET_USBARMORY$/;"	c	choice:choice36f34afe0104
CONFIG_TARGET_USB_A9263	arch/arm/mach-at91/Kconfig	/^config TARGET_USB_A9263$/;"	c	choice:choice338303b60104
CONFIG_TARGET_USB_A9263_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_USB_A9263$/;"	c	choice:choice338303b60104
CONFIG_TARGET_V38B	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_V38B$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_V38B_MODULE	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_V38B$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
CONFIG_TARGET_VCMA9	arch/arm/Kconfig	/^config TARGET_VCMA9$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VCMA9_MODULE	arch/arm/Kconfig	/^config TARGET_VCMA9$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VCT	arch/mips/Kconfig	/^config TARGET_VCT$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_VCT_MODULE	arch/mips/Kconfig	/^config TARGET_VCT$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_VE8313	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_VE8313$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_VE8313_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_VE8313$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_VENICE2	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_VENICE2$/;"	c	choice:choice925842630104
CONFIG_TARGET_VENICE2_MODULE	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_VENICE2$/;"	c	choice:choice925842630104
CONFIG_TARGET_VENTANA	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_VENTANA$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_VENTANA_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_VENTANA$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_VEXPRESS64_AEMV8A	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_AEMV8A$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_AEMV8A_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_AEMV8A$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_BASE_FVP	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_BASE_FVP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_BASE_FVP_DRAM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_BASE_FVP_DRAM$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_BASE_FVP_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_BASE_FVP$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_JUNO	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_JUNO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS64_JUNO_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_JUNO$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS_CA15_TC2	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA15_TC2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS_CA15_TC2_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA15_TC2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS_CA5X2	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA5X2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS_CA5X2_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA5X2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS_CA9X4	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA9X4$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VEXPRESS_CA9X4_MODULE	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA9X4$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VF610TWR	arch/arm/Kconfig	/^config TARGET_VF610TWR$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VF610TWR_MODULE	arch/arm/Kconfig	/^config TARGET_VF610TWR$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_VINCO	arch/arm/mach-at91/Kconfig	/^config TARGET_VINCO$/;"	c	choice:choice338303b60104
CONFIG_TARGET_VINCO_MODULE	arch/arm/mach-at91/Kconfig	/^config TARGET_VINCO$/;"	c	choice:choice338303b60104
CONFIG_TARGET_VME8349	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_VME8349$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_VME8349_MODULE	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_VME8349$/;"	c	choice:mpc83xx CPU""choice4a1261430104
CONFIG_TARGET_VOM405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_VOM405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_VOM405_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_VOM405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_WALNUT	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_WALNUT$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_WALNUT_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_WALNUT$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_WANDBOARD	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_WANDBOARD$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_WANDBOARD_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_WANDBOARD$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_WARP	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_WARP$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_WARP7	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_WARP7$/;"	c	choice:choice1fec2d000104
CONFIG_TARGET_WARP7_MODULE	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_WARP7$/;"	c	choice:choice1fec2d000104
CONFIG_TARGET_WARP_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_WARP$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_WHISTLER	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_WHISTLER$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_WHISTLER_MODULE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_WHISTLER$/;"	c	choice:choiced115656e0104
CONFIG_TARGET_WOODBURN	arch/arm/Kconfig	/^config TARGET_WOODBURN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_WOODBURN_MODULE	arch/arm/Kconfig	/^config TARGET_WOODBURN$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_WOODBURN_SD	arch/arm/Kconfig	/^config TARGET_WOODBURN_SD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_WOODBURN_SD_MODULE	arch/arm/Kconfig	/^config TARGET_WOODBURN_SD$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_WORK_92105	arch/arm/Kconfig	/^config TARGET_WORK_92105$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_WORK_92105_MODULE	arch/arm/Kconfig	/^config TARGET_WORK_92105$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_X600	arch/arm/Kconfig	/^config TARGET_X600$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_X600_MODULE	arch/arm/Kconfig	/^config TARGET_X600$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_XFI3	arch/arm/Kconfig	/^config TARGET_XFI3$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_XFI3_MODULE	arch/arm/Kconfig	/^config TARGET_XFI3$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_XILFPGA	arch/mips/Kconfig	/^config TARGET_XILFPGA$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_XILFPGA_MODULE	arch/mips/Kconfig	/^config TARGET_XILFPGA$/;"	c	choice:MIPS architecture""choiced4351f5b0104
CONFIG_TARGET_XILINX_PPC405_GENERIC	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XILINX_PPC405_GENERIC$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_XILINX_PPC405_GENERIC_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XILINX_PPC405_GENERIC$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_XILINX_PPC440_GENERIC	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XILINX_PPC440_GENERIC$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_XILINX_PPC440_GENERIC_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XILINX_PPC440_GENERIC$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_XPEDITE1000	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XPEDITE1000$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_XPEDITE1000_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XPEDITE1000$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_XPEDITE517X	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_XPEDITE517X$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_XPEDITE517X_MODULE	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_XPEDITE517X$/;"	c	choice:mpc86xx CPU""choiceda2881060104
CONFIG_TARGET_XPEDITE520X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE520X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_XPEDITE520X_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE520X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_XPEDITE537X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE537X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_XPEDITE537X_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE537X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_XPEDITE550X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE550X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_XPEDITE550X_MODULE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE550X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
CONFIG_TARGET_XPRESS	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_XPRESS$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_XPRESS_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_XPRESS$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_XTFPGA	arch/xtensa/Kconfig	/^config TARGET_XTFPGA$/;"	c	choice:Xtensa architecture""choice217b16550104
CONFIG_TARGET_XTFPGA_MODULE	arch/xtensa/Kconfig	/^config TARGET_XTFPGA$/;"	c	choice:Xtensa architecture""choice217b16550104
CONFIG_TARGET_YOSEMITE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_YOSEMITE$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_YOSEMITE_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_YOSEMITE$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_YUCCA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_YUCCA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_YUCCA_MODULE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_YUCCA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
CONFIG_TARGET_ZC5202	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ZC5202$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ZC5202_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ZC5202$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ZC5601	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ZC5601$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ZC5601_MODULE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ZC5601$/;"	c	choice:choiceab6fbbff0104
CONFIG_TARGET_ZIPITZ2	arch/arm/Kconfig	/^config TARGET_ZIPITZ2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ZIPITZ2_MODULE	arch/arm/Kconfig	/^config TARGET_ZIPITZ2$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ZMX25	arch/arm/Kconfig	/^config TARGET_ZMX25$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TARGET_ZMX25_MODULE	arch/arm/Kconfig	/^config TARGET_ZMX25$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TCA642X	include/configs/omap5_uevm.h	/^#define CONFIG_TCA642X$/;"	d
CONFIG_TEGRA	arch/arm/Kconfig	/^config TEGRA$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TEGRA114	arch/arm/mach-tegra/Kconfig	/^config TEGRA114$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA114_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA114$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA114_SPI	drivers/spi/Kconfig	/^config TEGRA114_SPI$/;"	c	menu:SPI Support
CONFIG_TEGRA114_SPI_MODULE	drivers/spi/Kconfig	/^config TEGRA114_SPI$/;"	c	menu:SPI Support
CONFIG_TEGRA124	arch/arm/mach-tegra/Kconfig	/^config TEGRA124$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA124_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA124$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA186	arch/arm/mach-tegra/Kconfig	/^config TEGRA186$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA186_BPMP	drivers/misc/Kconfig	/^config TEGRA186_BPMP$/;"	c	menu:Multifunction device drivers
CONFIG_TEGRA186_BPMP_I2C	drivers/i2c/Kconfig	/^config TEGRA186_BPMP_I2C$/;"	c	menu:I2C support
CONFIG_TEGRA186_BPMP_I2C_MODULE	drivers/i2c/Kconfig	/^config TEGRA186_BPMP_I2C$/;"	c	menu:I2C support
CONFIG_TEGRA186_BPMP_MODULE	drivers/misc/Kconfig	/^config TEGRA186_BPMP$/;"	c	menu:Multifunction device drivers
CONFIG_TEGRA186_CLOCK	drivers/clk/tegra/Kconfig	/^config TEGRA186_CLOCK$/;"	c
CONFIG_TEGRA186_CLOCK_MODULE	drivers/clk/tegra/Kconfig	/^config TEGRA186_CLOCK$/;"	c
CONFIG_TEGRA186_GPIO	drivers/gpio/Kconfig	/^config TEGRA186_GPIO$/;"	c	menu:GPIO Support
CONFIG_TEGRA186_GPIO_MODULE	drivers/gpio/Kconfig	/^config TEGRA186_GPIO$/;"	c	menu:GPIO Support
CONFIG_TEGRA186_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA186$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA186_POWER_DOMAIN	drivers/power/domain/Kconfig	/^config TEGRA186_POWER_DOMAIN$/;"	c	menu:Power Domain Support
CONFIG_TEGRA186_POWER_DOMAIN_MODULE	drivers/power/domain/Kconfig	/^config TEGRA186_POWER_DOMAIN$/;"	c	menu:Power Domain Support
CONFIG_TEGRA186_RESET	drivers/reset/Kconfig	/^config TEGRA186_RESET$/;"	c	menu:Reset Controller Support
CONFIG_TEGRA186_RESET_MODULE	drivers/reset/Kconfig	/^config TEGRA186_RESET$/;"	c	menu:Reset Controller Support
CONFIG_TEGRA20	arch/arm/mach-tegra/Kconfig	/^config TEGRA20$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA20_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA20$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA20_SFLASH	drivers/spi/Kconfig	/^config TEGRA20_SFLASH$/;"	c	menu:SPI Support
CONFIG_TEGRA20_SFLASH_MODULE	drivers/spi/Kconfig	/^config TEGRA20_SFLASH$/;"	c	menu:SPI Support
CONFIG_TEGRA20_SLINK	drivers/spi/Kconfig	/^config TEGRA20_SLINK$/;"	c	menu:SPI Support
CONFIG_TEGRA20_SLINK_MODULE	drivers/spi/Kconfig	/^config TEGRA20_SLINK$/;"	c	menu:SPI Support
CONFIG_TEGRA210	arch/arm/mach-tegra/Kconfig	/^config TEGRA210$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA210_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA210$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA210_QSPI	drivers/spi/Kconfig	/^config TEGRA210_QSPI$/;"	c	menu:SPI Support
CONFIG_TEGRA210_QSPI_MODULE	drivers/spi/Kconfig	/^config TEGRA210_QSPI$/;"	c	menu:SPI Support
CONFIG_TEGRA30	arch/arm/mach-tegra/Kconfig	/^config TEGRA30$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA30_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA30$/;"	c	choice:choice3cc3c0ca0104
CONFIG_TEGRA_ARMV7_COMMON	arch/arm/mach-tegra/Kconfig	/^config TEGRA_ARMV7_COMMON$/;"	c
CONFIG_TEGRA_ARMV7_COMMON_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA_ARMV7_COMMON$/;"	c
CONFIG_TEGRA_ARMV8_COMMON	arch/arm/mach-tegra/Kconfig	/^config TEGRA_ARMV8_COMMON$/;"	c
CONFIG_TEGRA_ARMV8_COMMON_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA_ARMV8_COMMON$/;"	c
CONFIG_TEGRA_BOARD_STRING	include/configs/apalis_t30.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/beaver.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/cardhu.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/cei-tk1-som.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/colibri_t20.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/colibri_t30.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/dalmore.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/e2220-1170.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/harmony.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/jetson-tk1.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/medcom-wide.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/nyan-big.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/p2371-0000.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/p2371-2180.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/p2571.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/p2771-0000.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/paz00.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/plutux.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/seaboard.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/tec-ng.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/tec.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/trimslice.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/venice2.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/ventana.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_BOARD_STRING	include/configs/whistler.h	/^#define CONFIG_TEGRA_BOARD_STRING	/;"	d
CONFIG_TEGRA_CAR	drivers/misc/Kconfig	/^config TEGRA_CAR$/;"	c	menu:Multifunction device drivers
CONFIG_TEGRA_CAR_CLOCK	drivers/clk/tegra/Kconfig	/^config TEGRA_CAR_CLOCK$/;"	c
CONFIG_TEGRA_CAR_CLOCK_MODULE	drivers/clk/tegra/Kconfig	/^config TEGRA_CAR_CLOCK$/;"	c
CONFIG_TEGRA_CAR_MODULE	drivers/misc/Kconfig	/^config TEGRA_CAR$/;"	c	menu:Multifunction device drivers
CONFIG_TEGRA_CAR_RESET	drivers/reset/Kconfig	/^config TEGRA_CAR_RESET$/;"	c	menu:Reset Controller Support
CONFIG_TEGRA_CAR_RESET_MODULE	drivers/reset/Kconfig	/^config TEGRA_CAR_RESET$/;"	c	menu:Reset Controller Support
CONFIG_TEGRA_CLOCK_SCALING	include/configs/seaboard.h	/^#define CONFIG_TEGRA_CLOCK_SCALING$/;"	d
CONFIG_TEGRA_COMMON	arch/arm/mach-tegra/Kconfig	/^config TEGRA_COMMON$/;"	c
CONFIG_TEGRA_COMMON_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA_COMMON$/;"	c
CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT	arch/arm/mach-tegra/Kconfig	/^config TEGRA_DISCONNECT_UDC_ON_BOOT$/;"	c
CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA_DISCONNECT_UDC_ON_BOOT$/;"	c
CONFIG_TEGRA_ENABLE_UARTA	include/configs/apalis_t30.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/beaver.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/cardhu.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/colibri_t20.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/colibri_t30.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/e2220-1170.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/nyan-big.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/p2371-0000.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/p2371-2180.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/p2571.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/paz00.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/trimslice.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/venice2.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTA	include/configs/whistler.h	/^#define CONFIG_TEGRA_ENABLE_UARTA$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/cei-tk1-som.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/dalmore.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/harmony.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/jetson-tk1.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/medcom-wide.h	/^#define CONFIG_TEGRA_ENABLE_UARTD	/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/plutux.h	/^#define CONFIG_TEGRA_ENABLE_UARTD	/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/seaboard.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/tec-ng.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/tec.h	/^#define CONFIG_TEGRA_ENABLE_UARTD	/;"	d
CONFIG_TEGRA_ENABLE_UARTD	include/configs/ventana.h	/^#define CONFIG_TEGRA_ENABLE_UARTD$/;"	d
CONFIG_TEGRA_GPIO	drivers/gpio/Kconfig	/^config TEGRA_GPIO$/;"	c	menu:GPIO Support
CONFIG_TEGRA_GPIO_MODULE	drivers/gpio/Kconfig	/^config TEGRA_GPIO$/;"	c	menu:GPIO Support
CONFIG_TEGRA_GPU	include/configs/tegra124-common.h	/^#define CONFIG_TEGRA_GPU$/;"	d
CONFIG_TEGRA_GPU	include/configs/tegra210-common.h	/^#define CONFIG_TEGRA_GPU$/;"	d
CONFIG_TEGRA_HSP	drivers/mailbox/Kconfig	/^config TEGRA_HSP$/;"	c	menu:Mailbox Controller Support
CONFIG_TEGRA_HSP_MODULE	drivers/mailbox/Kconfig	/^config TEGRA_HSP$/;"	c	menu:Mailbox Controller Support
CONFIG_TEGRA_IVC	arch/arm/mach-tegra/Kconfig	/^config TEGRA_IVC$/;"	c
CONFIG_TEGRA_IVC_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA_IVC$/;"	c
CONFIG_TEGRA_KEYBOARD	include/configs/seaboard.h	/^#define CONFIG_TEGRA_KEYBOARD$/;"	d
CONFIG_TEGRA_LP0	include/configs/seaboard.h	/^#define CONFIG_TEGRA_LP0$/;"	d
CONFIG_TEGRA_MMC	include/configs/apalis_t30.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/beaver.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/cardhu.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/cei-tk1-som.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/colibri_t20.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/colibri_t30.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/dalmore.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/e2220-1170.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/harmony.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/jetson-tk1.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/medcom-wide.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/nyan-big.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/p2371-0000.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/p2371-2180.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/p2571.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/p2771-0000.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/paz00.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/plutux.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/seaboard.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/tec-ng.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/tec.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/trimslice.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/venice2.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/ventana.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MMC	include/configs/whistler.h	/^#define CONFIG_TEGRA_MMC$/;"	d
CONFIG_TEGRA_MODULE	arch/arm/Kconfig	/^config TEGRA$/;"	c	choice:ARM architecture""choice031ab9020104
CONFIG_TEGRA_NAND	include/configs/colibri_t20.h	/^#define CONFIG_TEGRA_NAND$/;"	d
CONFIG_TEGRA_NAND	include/configs/harmony.h	/^#define CONFIG_TEGRA_NAND$/;"	d
CONFIG_TEGRA_NAND	include/configs/medcom-wide.h	/^#define CONFIG_TEGRA_NAND$/;"	d
CONFIG_TEGRA_NAND	include/configs/plutux.h	/^#define CONFIG_TEGRA_NAND$/;"	d
CONFIG_TEGRA_NAND	include/configs/seaboard.h	/^#define CONFIG_TEGRA_NAND$/;"	d
CONFIG_TEGRA_NAND	include/configs/tec.h	/^#define CONFIG_TEGRA_NAND$/;"	d
CONFIG_TEGRA_NO_BPMP	arch/arm/mach-tegra/Kconfig	/^config TEGRA_NO_BPMP$/;"	c
CONFIG_TEGRA_NO_BPMP_MODULE	arch/arm/mach-tegra/Kconfig	/^config TEGRA_NO_BPMP$/;"	c
CONFIG_TEGRA_PMU	include/configs/seaboard.h	/^#define CONFIG_TEGRA_PMU$/;"	d
CONFIG_TEGRA_SLINK_CTRLS	include/configs/beaver.h	/^#define CONFIG_TEGRA_SLINK_CTRLS /;"	d
CONFIG_TEGRA_SLINK_CTRLS	include/configs/cardhu.h	/^#define CONFIG_TEGRA_SLINK_CTRLS /;"	d
CONFIG_TEGRA_SLINK_CTRLS	include/configs/tec-ng.h	/^#define CONFIG_TEGRA_SLINK_CTRLS /;"	d
CONFIG_TEGRA_SPI	include/configs/tegra-common-post.h	/^#define CONFIG_TEGRA_SPI$/;"	d
CONFIG_TEGRA_UARTA_GPU	include/configs/trimslice.h	/^#define CONFIG_TEGRA_UARTA_GPU$/;"	d
CONFIG_TEGRA_UARTA_SDIO1	include/configs/colibri_t20.h	/^#define CONFIG_TEGRA_UARTA_SDIO1$/;"	d
CONFIG_TEGRA_UARTA_UAA_UAB	include/configs/whistler.h	/^#define CONFIG_TEGRA_UARTA_UAA_UAB$/;"	d
CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3	include/configs/cardhu.h	/^#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3$/;"	d
CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1	include/configs/beaver.h	/^#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1$/;"	d
CONFIG_TESTPIN_MASK	include/configs/km8360.h	/^#define CONFIG_TESTPIN_MASK /;"	d
CONFIG_TESTPIN_REG	include/configs/km8360.h	/^#define CONFIG_TESTPIN_REG /;"	d
CONFIG_TFP410_I2C_ADDR	board/freescale/p1022ds/p1022ds.c	/^#define CONFIG_TFP410_I2C_ADDR	/;"	d	file:
CONFIG_TFTP_BLOCKSIZE	include/configs/apalis_t30.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_BLOCKSIZE	include/configs/br4.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_BLOCKSIZE	include/configs/colibri_imx7.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_BLOCKSIZE	include/configs/colibri_t20.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_BLOCKSIZE	include/configs/colibri_t30.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_BLOCKSIZE	include/configs/pr1.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_BLOCKSIZE	include/configs/tqma6.h	/^#define CONFIG_TFTP_BLOCKSIZE	/;"	d
CONFIG_TFTP_PORT	include/configs/snapper9260.h	/^#define CONFIG_TFTP_PORT$/;"	d
CONFIG_TFTP_PORT	include/configs/snapper9g45.h	/^#define CONFIG_TFTP_PORT$/;"	d
CONFIG_TFTP_TSIZE	include/configs/apalis_t30.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/colibri_imx7.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/colibri_t20.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/colibri_t30.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/rpi.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/snapper9260.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/snapper9g45.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_TFTP_TSIZE	include/configs/x86-common.h	/^#define CONFIG_TFTP_TSIZE$/;"	d
CONFIG_THOR_RESET_OFF	include/configs/xilinx_zynqmp.h	/^#define CONFIG_THOR_RESET_OFF$/;"	d
CONFIG_THOR_RESET_OFF	include/configs/zynq-common.h	/^# define CONFIG_THOR_RESET_OFF$/;"	d
CONFIG_THUNDERX	include/configs/thunderx_88xx.h	/^#define CONFIG_THUNDERX$/;"	d
CONFIG_TI814X	include/configs/ti814x_evm.h	/^#define CONFIG_TI814X$/;"	d
CONFIG_TI816X	include/configs/ti816x_evm.h	/^#define CONFIG_TI816X$/;"	d
CONFIG_TI816X_DDR_PLL_796	include/configs/ti816x_evm.h	/^#define CONFIG_TI816X_DDR_PLL_796$/;"	d
CONFIG_TI816X_EVM_DDR3	include/configs/ti816x_evm.h	/^#define CONFIG_TI816X_EVM_DDR3$/;"	d
CONFIG_TI816X_USE_EMIF0	include/configs/ti816x_evm.h	/^#define CONFIG_TI816X_USE_EMIF0	/;"	d
CONFIG_TI816X_USE_EMIF1	include/configs/ti816x_evm.h	/^#define CONFIG_TI816X_USE_EMIF1	/;"	d
CONFIG_TI81XX	include/configs/ti814x_evm.h	/^#define CONFIG_TI81XX$/;"	d
CONFIG_TI81XX	include/configs/ti816x_evm.h	/^#define CONFIG_TI81XX$/;"	d
CONFIG_TIMER	drivers/timer/Kconfig	/^config TIMER$/;"	c	menu:Timer Support
CONFIG_TIMER_CLK_FREQ	include/autoconf.mk	/^CONFIG_TIMER_CLK_FREQ=24000000$/;"	m
CONFIG_TIMER_CLK_FREQ	include/configs/exynos-common.h	/^#define CONFIG_TIMER_CLK_FREQ	/;"	d
CONFIG_TIMER_CLK_FREQ	include/configs/ls1021aqds.h	/^#define CONFIG_TIMER_CLK_FREQ	/;"	d
CONFIG_TIMER_CLK_FREQ	include/configs/ls1021atwr.h	/^#define CONFIG_TIMER_CLK_FREQ	/;"	d
CONFIG_TIMER_CLK_FREQ	include/configs/mx7_common.h	/^#define CONFIG_TIMER_CLK_FREQ /;"	d
CONFIG_TIMER_CLK_FREQ	include/configs/sunxi-common.h	/^#define CONFIG_TIMER_CLK_FREQ	/;"	d
CONFIG_TIMER_CLK_FREQ	spl/include/autoconf.mk	/^CONFIG_TIMER_CLK_FREQ=24000000$/;"	m
CONFIG_TIMER_EARLY	drivers/timer/Kconfig	/^config TIMER_EARLY$/;"	c	menu:Timer Support
CONFIG_TIMER_EARLY_MODULE	drivers/timer/Kconfig	/^config TIMER_EARLY$/;"	c	menu:Timer Support
CONFIG_TIMER_MODULE	drivers/timer/Kconfig	/^config TIMER$/;"	c	menu:Timer Support
CONFIG_TIMESTAMP	include/configs/M52277EVB.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/M54418TWR.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/M54451EVB.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/M54455EVB.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/TQM5200.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/TQM866M.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/TQM885D.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/a4m072.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/ac14xx.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/am335x_evm.h	/^# define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/am335x_shc.h	/^# define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/am335x_sl50.h	/^# define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/aria.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/bav335x.h	/^# define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/cm5200.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/cm_t335.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/cm_t35.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/cm_t3517.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/colibri_pxa270.h	/^#define	CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/dbau1x00.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/ids8313.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/imgtec_xilfpga.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/inka4x0.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/jupiter.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/m28evk.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/m53evk.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/ma5d4evk.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/manroland/common.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/mecp5123.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/mpc5121ads.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/munices.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/o2dnt-common.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/pb1x00.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/pcm030.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/pdm360ng.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/pic32mzdask.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/qemu-mips.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/qemu-mips64.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/sandbox.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/socfpga_common.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/socrates.h	/^#define	CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/uniphier.h	/^#define CONFIG_TIMESTAMP$/;"	d
CONFIG_TIMESTAMP	include/configs/v38b.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/vct.h	/^#define CONFIG_TIMESTAMP	/;"	d
CONFIG_TIMESTAMP	include/configs/zipitz2.h	/^#define	CONFIG_TIMESTAMP$/;"	d
CONFIG_TIZEN	include/configs/s5pc210_universal.h	/^#define CONFIG_TIZEN	/;"	d
CONFIG_TIZEN	include/configs/trats.h	/^#define CONFIG_TIZEN	/;"	d
CONFIG_TIZEN	include/configs/trats2.h	/^#define CONFIG_TIZEN	/;"	d
CONFIG_TI_AEMIF	drivers/memory/Kconfig	/^config TI_AEMIF$/;"	c	menu:Memory Controller drivers
CONFIG_TI_AEMIF_MODULE	drivers/memory/Kconfig	/^config TI_AEMIF$/;"	c	menu:Memory Controller drivers
CONFIG_TI_EDMA3	drivers/dma/Kconfig	/^config TI_EDMA3$/;"	c	menu:DMA Support
CONFIG_TI_EDMA3	include/configs/am43xx_evm.h	/^#define CONFIG_TI_EDMA3$/;"	d
CONFIG_TI_EDMA3	include/configs/am57xx_evm.h	/^#define CONFIG_TI_EDMA3$/;"	d
CONFIG_TI_EDMA3	include/configs/dra7xx_evm.h	/^#define CONFIG_TI_EDMA3$/;"	d
CONFIG_TI_EDMA3	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_TI_EDMA3$/;"	d
CONFIG_TI_EDMA3_MODULE	drivers/dma/Kconfig	/^config TI_EDMA3$/;"	c	menu:DMA Support
CONFIG_TI_I2C_BOARD_DETECT	board/ti/common/Kconfig	/^config TI_I2C_BOARD_DETECT$/;"	c
CONFIG_TI_I2C_BOARD_DETECT_MODULE	board/ti/common/Kconfig	/^config TI_I2C_BOARD_DETECT$/;"	c
CONFIG_TI_KEYSTONE_SERDES	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_TI_KEYSTONE_SERDES$/;"	d
CONFIG_TI_KSNAV	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_TI_KSNAV$/;"	d
CONFIG_TI_QSPI	drivers/spi/Kconfig	/^config TI_QSPI$/;"	c	menu:SPI Support
CONFIG_TI_QSPI_MODULE	drivers/spi/Kconfig	/^config TI_QSPI$/;"	c	menu:SPI Support
CONFIG_TI_SECURE_DEVICE	arch/arm/cpu/armv7/omap-common/Kconfig	/^config TI_SECURE_DEVICE$/;"	c
CONFIG_TI_SECURE_DEVICE_MODULE	arch/arm/cpu/armv7/omap-common/Kconfig	/^config TI_SECURE_DEVICE$/;"	c
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_PROTECTED_REGION_SIZE$/;"	c
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_PROTECTED_REGION_SIZE$/;"	c
CONFIG_TI_SECURE_EMIF_REGION_START	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_REGION_START$/;"	c
CONFIG_TI_SECURE_EMIF_REGION_START_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_REGION_START$/;"	c
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_TOTAL_REGION_SIZE$/;"	c
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE_MODULE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_TOTAL_REGION_SIZE$/;"	c
CONFIG_TI_SPI_MMAP	include/configs/am43xx_evm.h	/^#define CONFIG_TI_SPI_MMAP$/;"	d
CONFIG_TI_SPI_MMAP	include/configs/am57xx_evm.h	/^#define CONFIG_TI_SPI_MMAP$/;"	d
CONFIG_TI_SPI_MMAP	include/configs/cm_t43.h	/^#define CONFIG_TI_SPI_MMAP$/;"	d
CONFIG_TI_SPI_MMAP	include/configs/dra7xx_evm.h	/^#define CONFIG_TI_SPI_MMAP$/;"	d
CONFIG_TMU_CMD_DTT	include/configs/exynos5-common.h	/^#define CONFIG_TMU_CMD_DTT$/;"	d
CONFIG_TMU_TIMER	include/configs/armadillo-800eva.h	/^#define CONFIG_TMU_TIMER$/;"	d
CONFIG_TMU_TIMER	include/configs/rcar-gen2-common.h	/^#define CONFIG_TMU_TIMER$/;"	d
CONFIG_TOOLS_DEBUG	Kconfig	/^config TOOLS_DEBUG$/;"	c	menu:General setup
CONFIG_TOOLS_DEBUG_MODULE	Kconfig	/^config TOOLS_DEBUG$/;"	c	menu:General setup
CONFIG_TPL	common/spl/Kconfig	/^config TPL$/;"	c	menu:SPL / TPL
CONFIG_TPL_DRIVERS_MISC_SUPPORT	include/configs/C29XPCIE.h	/^#define CONFIG_TPL_DRIVERS_MISC_SUPPORT$/;"	d
CONFIG_TPL_ENV_SUPPORT	common/spl/Kconfig	/^config TPL_ENV_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_ENV_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_ENV_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_I2C_SUPPORT	common/spl/Kconfig	/^config TPL_I2C_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_I2C_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_I2C_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_LIBCOMMON_SUPPORT	common/spl/Kconfig	/^config TPL_LIBCOMMON_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_LIBCOMMON_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_LIBCOMMON_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_LIBGENERIC_SUPPORT	common/spl/Kconfig	/^config TPL_LIBGENERIC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_LIBGENERIC_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_LIBGENERIC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_MMC_SUPPORT	common/spl/Kconfig	/^config TPL_MMC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_MMC_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_MMC_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_MODULE	common/spl/Kconfig	/^config TPL$/;"	c	menu:SPL / TPL
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT	common/spl/Kconfig	/^config TPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_NAND_SUPPORT	common/spl/Kconfig	/^config TPL_NAND_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_NAND_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_NAND_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_PAD_TO	include/configs/C29XPCIE.h	/^#define CONFIG_TPL_PAD_TO	/;"	d
CONFIG_TPL_PAD_TO	include/configs/P1010RDB.h	/^#define CONFIG_TPL_PAD_TO	/;"	d
CONFIG_TPL_PAD_TO	include/configs/P1022DS.h	/^#define CONFIG_TPL_PAD_TO	/;"	d
CONFIG_TPL_PAD_TO	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TPL_PAD_TO	/;"	d
CONFIG_TPL_SERIAL_SUPPORT	common/spl/Kconfig	/^config TPL_SERIAL_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_SERIAL_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_SERIAL_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_SPI_FLASH_SUPPORT	common/spl/Kconfig	/^config TPL_SPI_FLASH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_SPI_FLASH_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_SPI_FLASH_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_SPI_SUPPORT	common/spl/Kconfig	/^config TPL_SPI_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPL_SPI_SUPPORT_MODULE	common/spl/Kconfig	/^config TPL_SPI_SUPPORT$/;"	c	menu:SPL / TPL
CONFIG_TPM	lib/Kconfig	/^config TPM$/;"	c	menu:Library routines
CONFIG_TPM_ATMEL_TWI	drivers/tpm/Kconfig	/^config TPM_ATMEL_TWI$/;"	c	menu:TPM support
CONFIG_TPM_ATMEL_TWI_MODULE	drivers/tpm/Kconfig	/^config TPM_ATMEL_TWI$/;"	c	menu:TPM support
CONFIG_TPM_AUTH_SESSIONS	drivers/tpm/Kconfig	/^config TPM_AUTH_SESSIONS$/;"	c	menu:TPM support
CONFIG_TPM_AUTH_SESSIONS_MODULE	drivers/tpm/Kconfig	/^config TPM_AUTH_SESSIONS$/;"	c	menu:TPM support
CONFIG_TPM_MODULE	lib/Kconfig	/^config TPM$/;"	c	menu:Library routines
CONFIG_TPM_ST33ZP24_I2C	drivers/tpm/Kconfig	/^config TPM_ST33ZP24_I2C$/;"	c	menu:TPM support
CONFIG_TPM_ST33ZP24_I2C_MODULE	drivers/tpm/Kconfig	/^config TPM_ST33ZP24_I2C$/;"	c	menu:TPM support
CONFIG_TPM_ST33ZP24_SPI	drivers/tpm/Kconfig	/^config TPM_ST33ZP24_SPI$/;"	c	menu:TPM support
CONFIG_TPM_ST33ZP24_SPI_MODULE	drivers/tpm/Kconfig	/^config TPM_ST33ZP24_SPI$/;"	c	menu:TPM support
CONFIG_TPM_TIS_BASE_ADDRESS	include/configs/x86-common.h	/^#define CONFIG_TPM_TIS_BASE_ADDRESS /;"	d
CONFIG_TPM_TIS_I2C_BURST_LIMITATION	drivers/tpm/Kconfig	/^config TPM_TIS_I2C_BURST_LIMITATION$/;"	c	menu:TPM support
CONFIG_TPM_TIS_I2C_BURST_LIMITATION_LEN	drivers/tpm/Kconfig	/^config TPM_TIS_I2C_BURST_LIMITATION_LEN$/;"	c	menu:TPM support
CONFIG_TPM_TIS_I2C_BURST_LIMITATION_LEN_MODULE	drivers/tpm/Kconfig	/^config TPM_TIS_I2C_BURST_LIMITATION_LEN$/;"	c	menu:TPM support
CONFIG_TPM_TIS_I2C_BURST_LIMITATION_MODULE	drivers/tpm/Kconfig	/^config TPM_TIS_I2C_BURST_LIMITATION$/;"	c	menu:TPM support
CONFIG_TPM_TIS_INFINEON	drivers/tpm/Kconfig	/^config TPM_TIS_INFINEON$/;"	c	menu:TPM support
CONFIG_TPM_TIS_INFINEON_MODULE	drivers/tpm/Kconfig	/^config TPM_TIS_INFINEON$/;"	c	menu:TPM support
CONFIG_TPM_TIS_LPC	drivers/tpm/Kconfig	/^config TPM_TIS_LPC$/;"	c	menu:TPM support
CONFIG_TPM_TIS_LPC_MODULE	drivers/tpm/Kconfig	/^config TPM_TIS_LPC$/;"	c	menu:TPM support
CONFIG_TPM_TIS_SANDBOX	drivers/tpm/Kconfig	/^config TPM_TIS_SANDBOX$/;"	c	menu:TPM support
CONFIG_TPM_TIS_SANDBOX_MODULE	drivers/tpm/Kconfig	/^config TPM_TIS_SANDBOX$/;"	c	menu:TPM support
CONFIG_TPS6586X_POWER	include/configs/seaboard.h	/^#define CONFIG_TPS6586X_POWER$/;"	d
CONFIG_TQM5200	include/configs/TQM5200.h	/^#define CONFIG_TQM5200	/;"	d
CONFIG_TQM823L	include/configs/TQM823L.h	/^#define CONFIG_TQM823L	/;"	d
CONFIG_TQM823M	include/configs/TQM823M.h	/^#define CONFIG_TQM823M	/;"	d
CONFIG_TQM834X	include/configs/TQM834x.h	/^#define CONFIG_TQM834X	/;"	d
CONFIG_TQM850L	include/configs/TQM850L.h	/^#define CONFIG_TQM850L	/;"	d
CONFIG_TQM850M	include/configs/TQM850M.h	/^#define CONFIG_TQM850M	/;"	d
CONFIG_TQM855L	include/configs/TQM855L.h	/^#define CONFIG_TQM855L	/;"	d
CONFIG_TQM855M	include/configs/TQM855M.h	/^#define CONFIG_TQM855M	/;"	d
CONFIG_TQM860L	include/configs/TQM860L.h	/^#define CONFIG_TQM860L	/;"	d
CONFIG_TQM860M	include/configs/TQM860M.h	/^#define CONFIG_TQM860M	/;"	d
CONFIG_TQM862L	include/configs/TQM862L.h	/^#define CONFIG_TQM862L	/;"	d
CONFIG_TQM862M	include/configs/TQM862M.h	/^#define CONFIG_TQM862M	/;"	d
CONFIG_TQM866M	include/configs/TQM866M.h	/^#define CONFIG_TQM866M	/;"	d
CONFIG_TQM885D	include/configs/TQM885D.h	/^#define CONFIG_TQM885D	/;"	d
CONFIG_TQM8xxL	include/common.h	/^#  define CONFIG_TQM8xxL$/;"	d
CONFIG_TQM8xxM	include/common.h	/^#  define CONFIG_TQM8xxM$/;"	d
CONFIG_TQMA6Q	board/tqc/tqma6/Kconfig	/^config TQMA6Q$/;"	c	choice:choice3e84a7cc0104
CONFIG_TQMA6Q_MODULE	board/tqc/tqma6/Kconfig	/^config TQMA6Q$/;"	c	choice:choice3e84a7cc0104
CONFIG_TQMA6S	board/tqc/tqma6/Kconfig	/^config TQMA6S$/;"	c	choice:choice3e84a7cc0104
CONFIG_TQMA6S_MODULE	board/tqc/tqma6/Kconfig	/^config TQMA6S$/;"	c	choice:choice3e84a7cc0104
CONFIG_TQMA6X_MMC_BOOT	board/tqc/tqma6/Kconfig	/^config TQMA6X_MMC_BOOT$/;"	c	choice:choice3e84a7cc0204
CONFIG_TQMA6X_MMC_BOOT_MODULE	board/tqc/tqma6/Kconfig	/^config TQMA6X_MMC_BOOT$/;"	c	choice:choice3e84a7cc0204
CONFIG_TQMA6X_SPI_BOOT	board/tqc/tqma6/Kconfig	/^config TQMA6X_SPI_BOOT$/;"	c	choice:choice3e84a7cc0204
CONFIG_TQMA6X_SPI_BOOT_MODULE	board/tqc/tqma6/Kconfig	/^config TQMA6X_SPI_BOOT$/;"	c	choice:choice3e84a7cc0204
CONFIG_TRACE	include/configs/exynos5-common.h	/^#define CONFIG_TRACE$/;"	d
CONFIG_TRACE	include/configs/sandbox.h	/^#define CONFIG_TRACE$/;"	d
CONFIG_TRACE_BUFFER_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_TRACE_BUFFER_SIZE	/;"	d
CONFIG_TRACE_BUFFER_SIZE	include/configs/sandbox.h	/^#define CONFIG_TRACE_BUFFER_SIZE	/;"	d
CONFIG_TRACE_EARLY	include/configs/exynos5-common.h	/^#define CONFIG_TRACE_EARLY$/;"	d
CONFIG_TRACE_EARLY	include/configs/sandbox.h	/^#define CONFIG_TRACE_EARLY$/;"	d
CONFIG_TRACE_EARLY_ADDR	include/configs/exynos5-common.h	/^#define CONFIG_TRACE_EARLY_ADDR	/;"	d
CONFIG_TRACE_EARLY_ADDR	include/configs/sandbox.h	/^#define CONFIG_TRACE_EARLY_ADDR	/;"	d
CONFIG_TRACE_EARLY_SIZE	include/configs/exynos5-common.h	/^#define CONFIG_TRACE_EARLY_SIZE	/;"	d
CONFIG_TRACE_EARLY_SIZE	include/configs/sandbox.h	/^#define CONFIG_TRACE_EARLY_SIZE	/;"	d
CONFIG_TRATS	include/configs/trats.h	/^#define CONFIG_TRATS$/;"	d
CONFIG_TRDX_PID_COLIBRI_VF50	include/configs/colibri_vf.h	/^#define CONFIG_TRDX_PID_COLIBRI_VF50 /;"	d
CONFIG_TRDX_PID_COLIBRI_VF50IT	include/configs/colibri_vf.h	/^#define CONFIG_TRDX_PID_COLIBRI_VF50IT /;"	d
CONFIG_TRDX_PID_COLIBRI_VF61	include/configs/colibri_vf.h	/^#define CONFIG_TRDX_PID_COLIBRI_VF61 /;"	d
CONFIG_TRDX_PID_COLIBRI_VF61IT	include/configs/colibri_vf.h	/^#define CONFIG_TRDX_PID_COLIBRI_VF61IT /;"	d
CONFIG_TRDX_VID	include/configs/colibri_vf.h	/^#define CONFIG_TRDX_VID /;"	d
CONFIG_TSEC1	include/configs/BSC9131RDB.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/BSC9132QDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/C29XPCIE.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8308RDB.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/MPC8313ERDB.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/MPC8315ERDB.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8349EMDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8349ITX.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/MPC837XEMDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC837XERDB.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/MPC8536DS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8540ADS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8541CDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8544DS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8555CDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8560ADS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8568MDS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/P1010RDB.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/P1022DS.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/TQM834x.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/UCP1020.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/controlcenterd.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/hrcon.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/ids8313.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/mpc8308_p1m.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/p1_twr.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/sbc8349.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/sbc8548.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/sbc8641d.h	/^#define CONFIG_TSEC1 /;"	d
CONFIG_TSEC1	include/configs/socrates.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/strider.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/ve8313.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/vme8349.h	/^#define CONFIG_TSEC1$/;"	d
CONFIG_TSEC1	include/configs/xpedite517x.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/xpedite520x.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/xpedite537x.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1	include/configs/xpedite550x.h	/^#define CONFIG_TSEC1	/;"	d
CONFIG_TSEC1_NAME	include/configs/BSC9131RDB.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/BSC9132QDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/C29XPCIE.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8308RDB.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8313ERDB.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8315ERDB.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8349EMDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8349ITX.h	/^#define CONFIG_TSEC1_NAME /;"	d
CONFIG_TSEC1_NAME	include/configs/MPC837XEMDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC837XERDB.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8536DS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8540ADS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8541CDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8544DS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8555CDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8560ADS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8568MDS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/P1010RDB.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/P1022DS.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/TQM834x.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/UCP1020.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/controlcenterd.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/hrcon.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/ids8313.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/mpc8308_p1m.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/p1_twr.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/sbc8349.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/sbc8548.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/sbc8641d.h	/^#define CONFIG_TSEC1_NAME /;"	d
CONFIG_TSEC1_NAME	include/configs/socrates.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/strider.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/ve8313.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/vme8349.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/xpedite517x.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/xpedite520x.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/xpedite537x.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC1_NAME	include/configs/xpedite550x.h	/^#define CONFIG_TSEC1_NAME	/;"	d
CONFIG_TSEC2	include/configs/BSC9131RDB.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/BSC9132QDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/C29XPCIE.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8308RDB.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/MPC8313ERDB.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/MPC8315ERDB.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8349EMDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8349ITX.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/MPC837XEMDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC837XERDB.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/MPC8540ADS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8541CDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8555CDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8560ADS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8568MDS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/P1010RDB.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/P1022DS.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/TQM834x.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/UCP1020.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/controlcenterd.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/ids8313.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/mpc8308_p1m.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/sbc8349.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/sbc8548.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/sbc8641d.h	/^#define CONFIG_TSEC2 /;"	d
CONFIG_TSEC2	include/configs/vme8349.h	/^#define CONFIG_TSEC2$/;"	d
CONFIG_TSEC2	include/configs/xpedite517x.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/xpedite520x.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/xpedite537x.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2	include/configs/xpedite550x.h	/^#define CONFIG_TSEC2	/;"	d
CONFIG_TSEC2_NAME	include/configs/BSC9131RDB.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/BSC9132QDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/C29XPCIE.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8308RDB.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8313ERDB.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8315ERDB.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8349EMDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8349ITX.h	/^#define CONFIG_TSEC2_NAME /;"	d
CONFIG_TSEC2_NAME	include/configs/MPC837XEMDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC837XERDB.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8540ADS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8541CDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8555CDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8560ADS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8568MDS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/P1010RDB.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/P1022DS.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/TQM834x.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/UCP1020.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/controlcenterd.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/ids8313.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/mpc8308_p1m.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/sbc8349.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/sbc8548.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/sbc8641d.h	/^#define CONFIG_TSEC2_NAME /;"	d
CONFIG_TSEC2_NAME	include/configs/vme8349.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/xpedite517x.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/xpedite520x.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/xpedite537x.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC2_NAME	include/configs/xpedite550x.h	/^#define CONFIG_TSEC2_NAME	/;"	d
CONFIG_TSEC3	include/configs/MPC8536DS.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/MPC8544DS.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/P1010RDB.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/UCP1020.h	/^#define CONFIG_TSEC3$/;"	d
CONFIG_TSEC3	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC3$/;"	d
CONFIG_TSEC3	include/configs/p1_twr.h	/^#define CONFIG_TSEC3$/;"	d
CONFIG_TSEC3	include/configs/sbc8641d.h	/^#define CONFIG_TSEC3 /;"	d
CONFIG_TSEC3	include/configs/socrates.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/xpedite520x.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3	include/configs/xpedite550x.h	/^#define CONFIG_TSEC3	/;"	d
CONFIG_TSEC3_NAME	include/configs/MPC8536DS.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/MPC8544DS.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/P1010RDB.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/UCP1020.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/p1_twr.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/sbc8641d.h	/^#define CONFIG_TSEC3_NAME /;"	d
CONFIG_TSEC3_NAME	include/configs/socrates.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/xpedite520x.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC3_NAME	include/configs/xpedite550x.h	/^#define CONFIG_TSEC3_NAME	/;"	d
CONFIG_TSEC4	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC4$/;"	d
CONFIG_TSEC4	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC4	/;"	d
CONFIG_TSEC4	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC4	/;"	d
CONFIG_TSEC4	include/configs/sbc8641d.h	/^#define CONFIG_TSEC4 /;"	d
CONFIG_TSEC4	include/configs/xpedite520x.h	/^#define CONFIG_TSEC4	/;"	d
CONFIG_TSEC4_NAME	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC4_NAME	/;"	d
CONFIG_TSEC4_NAME	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC4_NAME	/;"	d
CONFIG_TSEC4_NAME	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC4_NAME	/;"	d
CONFIG_TSEC4_NAME	include/configs/sbc8641d.h	/^#define CONFIG_TSEC4_NAME /;"	d
CONFIG_TSEC4_NAME	include/configs/xpedite520x.h	/^#define CONFIG_TSEC4_NAME	/;"	d
CONFIG_TSECV2	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_TSECV2$/;"	d
CONFIG_TSECV2	include/configs/P1022DS.h	/^#define CONFIG_TSECV2$/;"	d
CONFIG_TSECV2	include/configs/controlcenterd.h	/^#define CONFIG_TSECV2$/;"	d
CONFIG_TSECV2_1	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_TSECV2_1$/;"	d
CONFIG_TSEC_ENET	include/configs/BSC9131RDB.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/BSC9132QDS.h	/^#define CONFIG_TSEC_ENET /;"	d
CONFIG_TSEC_ENET	include/configs/C29XPCIE.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8308RDB.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8313ERDB.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8315ERDB.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8349EMDS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8349ITX.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC837XEMDS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC837XERDB.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8536DS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8540ADS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8541CDS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8544DS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8548CDS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8555CDS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8560ADS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8568MDS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8572DS.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/MPC8641HPCN.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/P1010RDB.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/P1022DS.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/TQM834x.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/UCP1020.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/controlcenterd.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/hrcon.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/ids8313.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/ls1021aqds.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/ls1021atwr.h	/^#define CONFIG_TSEC_ENET$/;"	d
CONFIG_TSEC_ENET	include/configs/mpc8308_p1m.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/p1_twr.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/sbc8349.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/sbc8548.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/sbc8641d.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/socrates.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/strider.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/ve8313.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/vme8349.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/xpedite517x.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/xpedite520x.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/xpedite537x.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_ENET	include/configs/xpedite550x.h	/^#define CONFIG_TSEC_ENET	/;"	d
CONFIG_TSEC_TBI	include/configs/xpedite537x.h	/^#define CONFIG_TSEC_TBI$/;"	d
CONFIG_TSEC_TBI	include/configs/xpedite550x.h	/^#define CONFIG_TSEC_TBI$/;"	d
CONFIG_TSEC_TBICR_SETTINGS	drivers/net/tsec.c	/^#define CONFIG_TSEC_TBICR_SETTINGS /;"	d	file:
CONFIG_TSEC_TBICR_SETTINGS	include/configs/BSC9132QDS.h	/^#define CONFIG_TSEC_TBICR_SETTINGS /;"	d
CONFIG_TSEC_TBICR_SETTINGS	include/configs/P1010RDB.h	/^#define CONFIG_TSEC_TBICR_SETTINGS /;"	d
CONFIG_TSEC_TBICR_SETTINGS	include/configs/xpedite537x.h	/^#define CONFIG_TSEC_TBICR_SETTINGS /;"	d
CONFIG_TSEC_TBICR_SETTINGS	include/configs/xpedite550x.h	/^#define CONFIG_TSEC_TBICR_SETTINGS /;"	d
CONFIG_TSIM	include/configs/grsim.h	/^#define CONFIG_TSIM	/;"	d
CONFIG_TSIM	include/configs/grsim_leon2.h	/^#define CONFIG_TSIM	/;"	d
CONFIG_TULIP	include/configs/integratorap.h	/^#define CONFIG_TULIP$/;"	d
CONFIG_TWL4030_INPUT	include/configs/sniper.h	/^#define CONFIG_TWL4030_INPUT$/;"	d
CONFIG_TWL4030_KEYPAD	include/configs/nokia_rx51.h	/^#define CONFIG_TWL4030_KEYPAD$/;"	d
CONFIG_TWL4030_LED	include/configs/cm_t35.h	/^#define CONFIG_TWL4030_LED$/;"	d
CONFIG_TWL4030_LED	include/configs/devkit8000.h	/^#define CONFIG_TWL4030_LED	/;"	d
CONFIG_TWL4030_LED	include/configs/nokia_rx51.h	/^#define CONFIG_TWL4030_LED$/;"	d
CONFIG_TWL4030_LED	include/configs/omap3_beagle.h	/^#define CONFIG_TWL4030_LED	/;"	d
CONFIG_TWL4030_LED	include/configs/omap3_cairo.h	/^#define CONFIG_TWL4030_LED	/;"	d
CONFIG_TWL4030_LED	include/configs/omap3_overo.h	/^#define CONFIG_TWL4030_LED$/;"	d
CONFIG_TWL4030_LED	include/configs/omap3_pandora.h	/^#define CONFIG_TWL4030_LED$/;"	d
CONFIG_TWL4030_LED	include/configs/omap3_zoom1.h	/^#define CONFIG_TWL4030_LED	/;"	d
CONFIG_TWL4030_LED	include/configs/tao3530.h	/^#define CONFIG_TWL4030_LED$/;"	d
CONFIG_TWL4030_LED	include/configs/tricorder.h	/^#define CONFIG_TWL4030_LED$/;"	d
CONFIG_TWL4030_POWER	include/configs/cm_t35.h	/^#define CONFIG_TWL4030_POWER$/;"	d
CONFIG_TWL4030_POWER	include/configs/nokia_rx51.h	/^#define CONFIG_TWL4030_POWER$/;"	d
CONFIG_TWL4030_POWER	include/configs/omap3_evm.h	/^#define CONFIG_TWL4030_POWER	/;"	d
CONFIG_TWL4030_POWER	include/configs/sniper.h	/^#define CONFIG_TWL4030_POWER$/;"	d
CONFIG_TWL4030_POWER	include/configs/tao3530.h	/^#define CONFIG_TWL4030_POWER$/;"	d
CONFIG_TWL4030_POWER	include/configs/ti_omap3_common.h	/^#define CONFIG_TWL4030_POWER$/;"	d
CONFIG_TWL4030_POWER	include/configs/tricorder.h	/^#define CONFIG_TWL4030_POWER$/;"	d
CONFIG_TWL4030_PWM	include/configs/omap3_logic.h	/^#define CONFIG_TWL4030_PWM$/;"	d
CONFIG_TWL4030_USB	include/configs/cm_t35.h	/^#define CONFIG_TWL4030_USB$/;"	d
CONFIG_TWL4030_USB	include/configs/nokia_rx51.h	/^#define CONFIG_TWL4030_USB$/;"	d
CONFIG_TWL4030_USB	include/configs/omap3_beagle.h	/^#define CONFIG_TWL4030_USB	/;"	d
CONFIG_TWL4030_USB	include/configs/omap3_igep00x0.h	/^#define CONFIG_TWL4030_USB	/;"	d
CONFIG_TWL4030_USB	include/configs/omap3_logic.h	/^#define CONFIG_TWL4030_USB$/;"	d
CONFIG_TWL4030_USB	include/configs/omap3_zoom1.h	/^#define CONFIG_TWL4030_USB	/;"	d
CONFIG_TWL4030_USB	include/configs/sniper.h	/^#define CONFIG_TWL4030_USB$/;"	d
CONFIG_TWL6030_INPUT	include/configs/kc1.h	/^#define CONFIG_TWL6030_INPUT$/;"	d
CONFIG_TWL6030_POWER	include/configs/kc1.h	/^#define CONFIG_TWL6030_POWER$/;"	d
CONFIG_TWL6030_POWER	include/configs/ti_omap4_common.h	/^#define CONFIG_TWL6030_POWER	/;"	d
CONFIG_TX_DESCR_NUM	drivers/net/ag7xxx.c	/^#define CONFIG_TX_DESCR_NUM	/;"	d	file:
CONFIG_TX_DESCR_NUM	drivers/net/designware.h	/^#define CONFIG_TX_DESCR_NUM	/;"	d
CONFIG_TX_DESCR_NUM	drivers/net/sun8i_emac.c	/^#define CONFIG_TX_DESCR_NUM	/;"	d	file:
CONFIG_TZSW_RESERVED_DRAM_SIZE	include/configs/odroid.h	/^#define CONFIG_TZSW_RESERVED_DRAM_SIZE	/;"	d
CONFIG_TZSW_RESERVED_DRAM_SIZE	include/configs/odroid_xu3.h	/^#define CONFIG_TZSW_RESERVED_DRAM_SIZE	/;"	d
CONFIG_UART0_PORT_F	board/sunxi/Kconfig	/^config UART0_PORT_F$/;"	c
CONFIG_UART0_PORT_F_MODULE	board/sunxi/Kconfig	/^config UART0_PORT_F$/;"	c
CONFIG_UART_BASE	include/configs/dlvision.h	/^#define CONFIG_UART_BASE	/;"	d
CONFIG_UART_BASE_CLOCK	drivers/serial/serial_mvebu_a3700.c	/^#define CONFIG_UART_BASE_CLOCK	/;"	d	file:
CONFIG_UART_BR_PRELIM	include/configs/controlcenterd.h	/^#define CONFIG_UART_BR_PRELIM /;"	d
CONFIG_UART_CONSOLE	arch/blackfin/include/asm/serial.h	/^# define CONFIG_UART_CONSOLE /;"	d
CONFIG_UART_CONSOLE	include/configs/bct-brettl2.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf506f-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf518f-ezbrd.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf525-ucr2.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf526-ezbrd.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf527-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf527-sdp.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf533-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf533-stamp.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf537-minotaur.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf537-pnav.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf537-srv1.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf537-stamp.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf538f-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf548-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf561-acvilon.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf561-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/bf609-ezkit.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/blackstamp.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/blackvme.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/br4.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/cm-bf527.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/cm-bf533.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/cm-bf537e.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/cm-bf537u.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/cm-bf548.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/cm-bf561.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/dnp5370.h	/^#define CONFIG_UART_CONSOLE /;"	d
CONFIG_UART_CONSOLE	include/configs/ibf-dsp561.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/ip04.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/pr1.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/tcm-bf518.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_CONSOLE	include/configs/tcm-bf537.h	/^#define CONFIG_UART_CONSOLE	/;"	d
CONFIG_UART_OR_PRELIM	include/configs/controlcenterd.h	/^#define CONFIG_UART_OR_PRELIM	/;"	d
CONFIG_UBIBLOCK	include/configs/s5pc210_universal.h	/^#define CONFIG_UBIBLOCK	/;"	d
CONFIG_UBIFS_SILENCE_MSG	include/configs/am335x_igep0033.h	/^#define CONFIG_UBIFS_SILENCE_MSG$/;"	d
CONFIG_UBIFS_SILENCE_MSG	include/configs/omap3_igep00x0.h	/^#define CONFIG_UBIFS_SILENCE_MSG	/;"	d
CONFIG_UBIFS_VOLUME	include/configs/titanium.h	/^#define CONFIG_UBIFS_VOLUME	/;"	d
CONFIG_UBIFS_VOLUME	include/configs/x600.h	/^#define CONFIG_UBIFS_VOLUME	/;"	d
CONFIG_UBI_PART	include/configs/titanium.h	/^#define CONFIG_UBI_PART	/;"	d
CONFIG_UBI_PART	include/configs/x600.h	/^#define CONFIG_UBI_PART	/;"	d
CONFIG_UBI_SILENCE_MSG	include/configs/am335x_igep0033.h	/^#define CONFIG_UBI_SILENCE_MSG$/;"	d
CONFIG_UBI_SILENCE_MSG	include/configs/omap3_igep00x0.h	/^#define CONFIG_UBI_SILENCE_MSG	/;"	d
CONFIG_UBI_SIZE	include/configs/nokia_rx51.h	/^#define CONFIG_UBI_SIZE	/;"	d
CONFIG_UBOOT1_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_UBOOT1_ENV_ADDR	/;"	d
CONFIG_UBOOT1_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_UBOOT1_ENV_ADDR	/;"	d
CONFIG_UBOOT1_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_UBOOT1_ENV_ADDR	/;"	d
CONFIG_UBOOT1_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_UBOOT1_ENV_ADDR	/;"	d
CONFIG_UBOOT2_ENV_ADDR	include/configs/xpedite517x.h	/^#define CONFIG_UBOOT2_ENV_ADDR	/;"	d
CONFIG_UBOOT2_ENV_ADDR	include/configs/xpedite520x.h	/^#define CONFIG_UBOOT2_ENV_ADDR	/;"	d
CONFIG_UBOOT2_ENV_ADDR	include/configs/xpedite537x.h	/^#define CONFIG_UBOOT2_ENV_ADDR	/;"	d
CONFIG_UBOOT2_ENV_ADDR	include/configs/xpedite550x.h	/^#define CONFIG_UBOOT2_ENV_ADDR	/;"	d
CONFIG_UBOOTPATH	include/configs/B4860QDS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/BSC9131RDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/BSC9132QDS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/C29XPCIE.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8313ERDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8323ERDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8349ITX.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC837XERDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8536DS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8544DS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8548CDS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8572DS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8610HPCD.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/MPC8641HPCN.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/P1010RDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/P1022DS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/P1023RDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/P2041RDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/T102xQDS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/T102xRDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/T1040QDS.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/T104xRDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/T208xQDS.h	/^#define CONFIG_UBOOTPATH /;"	d
CONFIG_UBOOTPATH	include/configs/T208xRDB.h	/^#define CONFIG_UBOOTPATH /;"	d
CONFIG_UBOOTPATH	include/configs/T4240RDB.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/UCP1020.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/controlcenterd.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/corenet_ds.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/cyrus.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/ids8313.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/p1_twr.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/qemu-ppce500.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/sbc8548.h	/^#define CONFIG_UBOOTPATH /;"	d
CONFIG_UBOOTPATH	include/configs/t4qds.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTPATH	include/configs/ve8313.h	/^#define CONFIG_UBOOTPATH	/;"	d
CONFIG_UBOOTVERSION	Kconfig	/^config UBOOTVERSION$/;"	c
CONFIG_UBOOTVERSION_MODULE	Kconfig	/^config UBOOTVERSION$/;"	c
CONFIG_UBOOT_ENABLE_PADS_ALL	include/configs/omap4_panda.h	/^#define CONFIG_UBOOT_ENABLE_PADS_ALL$/;"	d
CONFIG_UBOOT_ENV_ADDR	include/configs/xpedite1000.h	/^#define CONFIG_UBOOT_ENV_ADDR	/;"	d
CONFIG_UBOOT_ROMSIZE_KB	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB$/;"	c	menu:x86 architecture
CONFIG_UBOOT_ROMSIZE_KB_1024	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_1024$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_1024_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_1024$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_16384	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_16384$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_16384_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_16384$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_2048	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_2048$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_2048_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_2048$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_4096	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_4096$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_4096_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_4096$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_512	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_512$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_512_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_512$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_8192	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_8192$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_8192_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_8192$/;"	c	choice:x86 architecture""choice0d4dd9280204
CONFIG_UBOOT_ROMSIZE_KB_MODULE	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB$/;"	c	menu:x86 architecture
CONFIG_UBOOT_SECTOR_COUNT	include/configs/xpress.h	/^#define CONFIG_UBOOT_SECTOR_COUNT	/;"	d
CONFIG_UBOOT_SECTOR_START	include/configs/xpress.h	/^#define CONFIG_UBOOT_SECTOR_START	/;"	d
CONFIG_UCBOOT	board/Arcturus/ucp1020/Kconfig	/^config UCBOOT$/;"	c
CONFIG_UCBOOT_MODULE	board/Arcturus/ucp1020/Kconfig	/^config UCBOOT$/;"	c
CONFIG_UCP1020	include/configs/UCP1020.h	/^#define CONFIG_UCP1020$/;"	d
CONFIG_UCP1020_REV_1_3	include/configs/UCP1020.h	/^#define CONFIG_UCP1020_REV_1_3$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/M5208EVBE.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/M53017EVB.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/M5329EVB.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/M5373EVB.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/M5475EVB.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/M5485EVB.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UDP_CHECKSUM	include/configs/sandbox.h	/^#define CONFIG_UDP_CHECKSUM$/;"	d
CONFIG_UEC_ETH	include/configs/MPC8323ERDB.h	/^#define CONFIG_UEC_ETH$/;"	d
CONFIG_UEC_ETH	include/configs/MPC832XEMDS.h	/^#define CONFIG_UEC_ETH$/;"	d
CONFIG_UEC_ETH	include/configs/MPC8568MDS.h	/^#define CONFIG_UEC_ETH$/;"	d
CONFIG_UEC_ETH	include/configs/MPC8569MDS.h	/^#define CONFIG_UEC_ETH$/;"	d
CONFIG_UEC_ETH	include/configs/km/km83xx-common.h	/^#define CONFIG_UEC_ETH$/;"	d
CONFIG_UEC_ETH1	include/configs/MPC8323ERDB.h	/^#define CONFIG_UEC_ETH1	/;"	d
CONFIG_UEC_ETH1	include/configs/MPC832XEMDS.h	/^#define CONFIG_UEC_ETH1	/;"	d
CONFIG_UEC_ETH1	include/configs/MPC8568MDS.h	/^#define CONFIG_UEC_ETH1 /;"	d
CONFIG_UEC_ETH1	include/configs/MPC8569MDS.h	/^#define CONFIG_UEC_ETH1 /;"	d
CONFIG_UEC_ETH1	include/configs/km/km83xx-common.h	/^#define CONFIG_UEC_ETH1	/;"	d
CONFIG_UEC_ETH1	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_UEC_ETH1	/;"	d
CONFIG_UEC_ETH1	include/configs/p1_twr.h	/^#define CONFIG_UEC_ETH1	/;"	d
CONFIG_UEC_ETH1	include/configs/suvd3.h	/^#define CONFIG_UEC_ETH1$/;"	d
CONFIG_UEC_ETH2	include/configs/MPC8323ERDB.h	/^#define CONFIG_UEC_ETH2	/;"	d
CONFIG_UEC_ETH2	include/configs/MPC832XEMDS.h	/^#define CONFIG_UEC_ETH2	/;"	d
CONFIG_UEC_ETH2	include/configs/MPC8568MDS.h	/^#define CONFIG_UEC_ETH2 /;"	d
CONFIG_UEC_ETH2	include/configs/MPC8569MDS.h	/^#define CONFIG_UEC_ETH2 /;"	d
CONFIG_UEC_ETH2	include/configs/suvd3.h	/^#define CONFIG_UEC_ETH2$/;"	d
CONFIG_UEC_ETH3	include/configs/MPC8569MDS.h	/^#define CONFIG_UEC_ETH3 /;"	d
CONFIG_UEC_ETH4	include/configs/MPC8569MDS.h	/^#define CONFIG_UEC_ETH4 /;"	d
CONFIG_UEC_ETH5	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_UEC_ETH5	/;"	d
CONFIG_UEC_ETH5	include/configs/p1_twr.h	/^#define CONFIG_UEC_ETH5	/;"	d
CONFIG_ULI526X	include/configs/MPC8610HPCD.h	/^#define CONFIG_ULI526X$/;"	d
CONFIG_ULPI_REF_CLK	drivers/usb/host/ehci-tegra.c	/^#define CONFIG_ULPI_REF_CLK /;"	d	file:
CONFIG_UMSDEVS	include/configs/nitrogen6x.h	/^#define CONFIG_UMSDEVS /;"	d
CONFIG_UNIPHIER_SERIAL	drivers/serial/Kconfig	/^config UNIPHIER_SERIAL$/;"	c	menu:Serial drivers
CONFIG_UNIPHIER_SERIAL_MODULE	drivers/serial/Kconfig	/^config UNIPHIER_SERIAL$/;"	c	menu:Serial drivers
CONFIG_UNIT_TEST	test/Kconfig	/^menuconfig UNIT_TEST$/;"	c
CONFIG_UNIT_TEST_MODULE	test/Kconfig	/^menuconfig UNIT_TEST$/;"	c
CONFIG_UPDATEB	include/configs/s5p_goni.h	/^#define CONFIG_UPDATEB	/;"	d
CONFIG_UPDATEB	include/configs/smdkc100.h	/^#define CONFIG_UPDATEB	/;"	d
CONFIG_UPDATE_LOAD_ADDR	common/update.c	/^#define CONFIG_UPDATE_LOAD_ADDR	/;"	d	file:
CONFIG_UPDATE_TFTP_CNT_MAX	common/update.c	/^#define CONFIG_UPDATE_TFTP_CNT_MAX	/;"	d	file:
CONFIG_UPDATE_TFTP_MSEC_MAX	common/update.c	/^#define CONFIG_UPDATE_TFTP_MSEC_MAX	/;"	d	file:
CONFIG_USART3	include/configs/ethernut5.h	/^#define CONFIG_USART3	/;"	d
CONFIG_USART_BASE	include/configs/at91rm9200ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9260ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9261ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9263ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9n12ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9rlek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/at91sam9x5ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/atngw100.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/atngw100mkii.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/atstk1002.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/corvus.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/ethernut5.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/grasshopper.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/ma5d4evk.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/meesc.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/picosam9g45.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/pm9261.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/pm9263.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/pm9g45.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/sama5d2_ptc.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/sama5d3_xplained.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/sama5d3xek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/sama5d4_xplained.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/sama5d4ek.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/smartweb.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/snapper9260.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/taurus.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/usb_a9263.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_BASE	include/configs/vinco.h	/^#define CONFIG_USART_BASE	/;"	d
CONFIG_USART_ID	include/configs/at91rm9200ek.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9260ek.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9261ek.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9263ek.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9m10g45ek.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9n12ek.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9rlek.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/at91sam9x5ek.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/atngw100.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/atngw100mkii.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/atstk1002.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/corvus.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/ethernut5.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/grasshopper.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/ma5d4evk.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/meesc.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/picosam9g45.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/pm9261.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/pm9263.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/pm9g45.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/sama5d2_ptc.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/sama5d3_xplained.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/sama5d3xek.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/sama5d4_xplained.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/sama5d4ek.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/smartweb.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/snapper9260.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/taurus.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/usb_a9263.h	/^#define CONFIG_USART_ID	/;"	d
CONFIG_USART_ID	include/configs/vinco.h	/^#define	CONFIG_USART_ID	/;"	d
CONFIG_USB	drivers/usb/Kconfig	/^menuconfig USB$/;"	c
CONFIG_USB	include/config/auto.conf	/^CONFIG_USB=y$/;"	k
CONFIG_USB	include/generated/autoconf.h	/^#define CONFIG_USB /;"	d
CONFIG_USB0_ID_DET	board/sunxi/Kconfig	/^config USB0_ID_DET$/;"	c
CONFIG_USB0_ID_DET	include/config/auto.conf	/^CONFIG_USB0_ID_DET=""$/;"	k
CONFIG_USB0_ID_DET	include/generated/autoconf.h	/^#define CONFIG_USB0_ID_DET /;"	d
CONFIG_USB0_ID_DET_MODULE	board/sunxi/Kconfig	/^config USB0_ID_DET$/;"	c
CONFIG_USB0_VBUS_DET	board/sunxi/Kconfig	/^config USB0_VBUS_DET$/;"	c
CONFIG_USB0_VBUS_DET	include/config/auto.conf	/^CONFIG_USB0_VBUS_DET=""$/;"	k
CONFIG_USB0_VBUS_DET	include/generated/autoconf.h	/^#define CONFIG_USB0_VBUS_DET /;"	d
CONFIG_USB0_VBUS_DET_MODULE	board/sunxi/Kconfig	/^config USB0_VBUS_DET$/;"	c
CONFIG_USB0_VBUS_PIN	board/sunxi/Kconfig	/^config USB0_VBUS_PIN$/;"	c
CONFIG_USB0_VBUS_PIN	include/config/auto.conf	/^CONFIG_USB0_VBUS_PIN=""$/;"	k
CONFIG_USB0_VBUS_PIN	include/generated/autoconf.h	/^#define CONFIG_USB0_VBUS_PIN /;"	d
CONFIG_USB0_VBUS_PIN_MODULE	board/sunxi/Kconfig	/^config USB0_VBUS_PIN$/;"	c
CONFIG_USB1_VBUS_PIN	board/sunxi/Kconfig	/^config USB1_VBUS_PIN$/;"	c
CONFIG_USB1_VBUS_PIN	include/config/auto.conf	/^CONFIG_USB1_VBUS_PIN=""$/;"	k
CONFIG_USB1_VBUS_PIN	include/generated/autoconf.h	/^#define CONFIG_USB1_VBUS_PIN /;"	d
CONFIG_USB1_VBUS_PIN_MODULE	board/sunxi/Kconfig	/^config USB1_VBUS_PIN$/;"	c
CONFIG_USB2_VBUS_PIN	board/sunxi/Kconfig	/^config USB2_VBUS_PIN$/;"	c
CONFIG_USB2_VBUS_PIN	include/config/auto.conf	/^CONFIG_USB2_VBUS_PIN=""$/;"	k
CONFIG_USB2_VBUS_PIN	include/generated/autoconf.h	/^#define CONFIG_USB2_VBUS_PIN /;"	d
CONFIG_USB2_VBUS_PIN_MODULE	board/sunxi/Kconfig	/^config USB2_VBUS_PIN$/;"	c
CONFIG_USB3_VBUS_PIN	board/sunxi/Kconfig	/^config USB3_VBUS_PIN$/;"	c
CONFIG_USB3_VBUS_PIN	include/config/auto.conf	/^CONFIG_USB3_VBUS_PIN=""$/;"	k
CONFIG_USB3_VBUS_PIN	include/generated/autoconf.h	/^#define CONFIG_USB3_VBUS_PIN /;"	d
CONFIG_USB3_VBUS_PIN_MODULE	board/sunxi/Kconfig	/^config USB3_VBUS_PIN$/;"	c
CONFIG_USBBOOTCOMMAND	include/configs/ge_bx50v3.h	/^#define CONFIG_USBBOOTCOMMAND /;"	d
CONFIG_USBD_CONFIGURATION_STR	drivers/serial/usbtty.h	/^#define CONFIG_USBD_CONFIGURATION_STR	/;"	d
CONFIG_USBD_CTRL_INTERFACE_STR	drivers/serial/usbtty.c	/^#define CONFIG_USBD_CTRL_INTERFACE_STR /;"	d	file:
CONFIG_USBD_DATA_INTERFACE_STR	drivers/serial/usbtty.c	/^#define CONFIG_USBD_DATA_INTERFACE_STR /;"	d	file:
CONFIG_USBD_HS	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/cgtqmx6eval.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/colibri_imx7.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/ge_bx50v3.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/gw_ventana.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/mx6sabre_common.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/mx7dsabresd.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/nitrogen6x.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/novena.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/pico-imx6ul.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/siemens-am33x-common.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/spear-common.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/tbs2910.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/warp.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_HS	include/configs/warp7.h	/^#define CONFIG_USBD_HS$/;"	d
CONFIG_USBD_MANUFACTURER	drivers/serial/usbtty.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_MANUFACTURER	include/configs/am3517_crane.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_MANUFACTURER	include/configs/nokia_rx51.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_MANUFACTURER	include/configs/omap3_evm.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_MANUFACTURER	include/configs/omap3_igep00x0.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_MANUFACTURER	include/configs/omap3_zoom1.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_MANUFACTURER	include/configs/spear-common.h	/^#define CONFIG_USBD_MANUFACTURER	/;"	d
CONFIG_USBD_PRODUCTID	include/configs/am3517_crane.h	/^#define CONFIG_USBD_PRODUCTID	/;"	d
CONFIG_USBD_PRODUCTID	include/configs/nokia_rx51.h	/^#define CONFIG_USBD_PRODUCTID	/;"	d
CONFIG_USBD_PRODUCTID	include/configs/omap3_evm.h	/^#define CONFIG_USBD_PRODUCTID	/;"	d
CONFIG_USBD_PRODUCTID	include/configs/omap3_igep00x0.h	/^#define CONFIG_USBD_PRODUCTID	/;"	d
CONFIG_USBD_PRODUCTID	include/configs/omap3_zoom1.h	/^#define CONFIG_USBD_PRODUCTID	/;"	d
CONFIG_USBD_PRODUCTID_CDCACM	drivers/serial/usbtty.h	/^#define CONFIG_USBD_PRODUCTID_CDCACM	/;"	d
CONFIG_USBD_PRODUCTID_GSERIAL	drivers/serial/usbtty.h	/^#define CONFIG_USBD_PRODUCTID_GSERIAL	/;"	d
CONFIG_USBD_PRODUCT_NAME	drivers/serial/usbtty.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_PRODUCT_NAME	include/configs/am3517_crane.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_PRODUCT_NAME	include/configs/nokia_rx51.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_PRODUCT_NAME	include/configs/omap3_evm.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_PRODUCT_NAME	include/configs/omap3_igep00x0.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_PRODUCT_NAME	include/configs/omap3_zoom1.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_PRODUCT_NAME	include/configs/spear-common.h	/^#define CONFIG_USBD_PRODUCT_NAME	/;"	d
CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE	/;"	d
CONFIG_USBD_SERIAL_BULK_PKTSIZE	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_BULK_PKTSIZE	/;"	d
CONFIG_USBD_SERIAL_INT_ENDPOINT	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_INT_ENDPOINT /;"	d
CONFIG_USBD_SERIAL_INT_PKTSIZE	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_INT_PKTSIZE	/;"	d
CONFIG_USBD_SERIAL_IN_ENDPOINT	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_IN_ENDPOINT	/;"	d
CONFIG_USBD_SERIAL_IN_PKTSIZE	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_IN_PKTSIZE	/;"	d
CONFIG_USBD_SERIAL_OUT_ENDPOINT	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_OUT_ENDPOINT /;"	d
CONFIG_USBD_SERIAL_OUT_PKTSIZE	drivers/serial/usbtty.h	/^#define CONFIG_USBD_SERIAL_OUT_PKTSIZE	/;"	d
CONFIG_USBD_VENDORID	drivers/serial/usbtty.h	/^#define CONFIG_USBD_VENDORID	/;"	d
CONFIG_USBD_VENDORID	include/configs/am3517_crane.h	/^#define CONFIG_USBD_VENDORID	/;"	d
CONFIG_USBD_VENDORID	include/configs/nokia_rx51.h	/^#define CONFIG_USBD_VENDORID	/;"	d
CONFIG_USBD_VENDORID	include/configs/omap3_evm.h	/^#define CONFIG_USBD_VENDORID	/;"	d
CONFIG_USBD_VENDORID	include/configs/omap3_igep00x0.h	/^#define CONFIG_USBD_VENDORID	/;"	d
CONFIG_USBD_VENDORID	include/configs/omap3_zoom1.h	/^#define CONFIG_USBD_VENDORID	/;"	d
CONFIG_USBID_ADDR	include/configs/bcm23550_w1d.h	/^#define CONFIG_USBID_ADDR	/;"	d
CONFIG_USBID_ADDR	include/configs/bcm28155_ap.h	/^#define CONFIG_USBID_ADDR	/;"	d
CONFIG_USBNET_DEV_ADDR	include/configs/h2200.h	/^#define CONFIG_USBNET_DEV_ADDR	/;"	d
CONFIG_USBNET_HOST_ADDR	include/configs/am335x_evm.h	/^#define CONFIG_USBNET_HOST_ADDR	/;"	d
CONFIG_USBNET_HOST_ADDR	include/configs/baltos.h	/^#define CONFIG_USBNET_HOST_ADDR	/;"	d
CONFIG_USBNET_HOST_ADDR	include/configs/h2200.h	/^#define CONFIG_USBNET_HOST_ADDR	/;"	d
CONFIG_USBNET_HOST_ADDR	include/configs/siemens-am33x-common.h	/^#define CONFIG_USBNET_HOST_ADDR	/;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/ma5d4evk.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/sama5d2_ptc.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/sama5d2_xplained.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/sama5d3xek.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/sama5d4_xplained.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/sama5d4ek.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USBNET_MANUFACTURER	include/configs/vinco.h	/^#define CONFIG_USBNET_MANUFACTURER /;"	d
CONFIG_USB_AM35X	include/configs/am3517_crane.h	/^#define CONFIG_USB_AM35X	/;"	d
CONFIG_USB_ATMEL	include/configs/at91rm9200ek.h	/^#define CONFIG_USB_ATMEL	/;"	d
CONFIG_USB_ATMEL	include/configs/at91sam9260ek.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/at91sam9261ek.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/at91sam9263ek.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/at91sam9n12ek.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/at91sam9x5ek.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/ethernut5.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/pm9261.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/pm9263.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/pm9g45.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/sama5d3_xplained.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/sama5d3xek.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/smartweb.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/snapper9260.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/taurus.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL	include/configs/usb_a9263.h	/^#define CONFIG_USB_ATMEL$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/at91rm9200ek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/at91sam9260ek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/at91sam9261ek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/at91sam9263ek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/at91sam9n12ek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/ethernut5.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/pm9261.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/pm9263.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/smartweb.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/snapper9260.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_PLLB	include/configs/taurus.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_PLLB$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_UPLL	include/configs/at91sam9x5ek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_UPLL$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_UPLL	include/configs/pm9g45.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_UPLL$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_UPLL	include/configs/sama5d3_xplained.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_UPLL$/;"	d
CONFIG_USB_ATMEL_CLK_SEL_UPLL	include/configs/sama5d3xek.h	/^#define CONFIG_USB_ATMEL_CLK_SEL_UPLL$/;"	d
CONFIG_USB_BIN_FIXUP	include/configs/TQM5200.h	/^#define CONFIG_USB_BIN_FIXUP	/;"	d
CONFIG_USB_BLACKFIN	include/configs/bf526-ezbrd.h	/^#define CONFIG_USB_BLACKFIN$/;"	d
CONFIG_USB_BLACKFIN	include/configs/bf527-ezkit.h	/^#define CONFIG_USB_BLACKFIN$/;"	d
CONFIG_USB_BLACKFIN	include/configs/bf548-ezkit.h	/^#define CONFIG_USB_BLACKFIN$/;"	d
CONFIG_USB_BLACKFIN_CLKIN	drivers/usb/musb/blackfin_usb.c	/^#define CONFIG_USB_BLACKFIN_CLKIN /;"	d	file:
CONFIG_USB_BOOTING	include/configs/exynos5-common.h	/^#define CONFIG_USB_BOOTING$/;"	d
CONFIG_USB_CABLE_CHECK	include/configs/xilinx_zynqmp.h	/^#define CONFIG_USB_CABLE_CHECK$/;"	d
CONFIG_USB_CABLE_CHECK	include/configs/zynq-common.h	/^# define CONFIG_USB_CABLE_CHECK$/;"	d
CONFIG_USB_CLOCK	include/configs/TQM5200.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/a4m072.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/cm5200.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/digsy_mtc.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/gr_ep2s60.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/gr_xc3s_1500.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/inka4x0.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/ipek01.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/pcm030.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CLOCK	include/configs/v38b.h	/^#define CONFIG_USB_CLOCK	/;"	d
CONFIG_USB_CONFIG	include/configs/TQM5200.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/a4m072.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/cm5200.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/digsy_mtc.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/gr_cpci_ax2000.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/gr_ep2s60.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/gr_xc3s_1500.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/inka4x0.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/ipek01.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/pcm030.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_CONFIG	include/configs/v38b.h	/^#define CONFIG_USB_CONFIG	/;"	d
CONFIG_USB_DEVICE	include/configs/am3517_crane.h	/^#define CONFIG_USB_DEVICE	/;"	d
CONFIG_USB_DEVICE	include/configs/cm_t35.h	/^#define CONFIG_USB_DEVICE$/;"	d
CONFIG_USB_DEVICE	include/configs/nokia_rx51.h	/^#define CONFIG_USB_DEVICE$/;"	d
CONFIG_USB_DEVICE	include/configs/omap3_evm.h	/^#define CONFIG_USB_DEVICE$/;"	d
CONFIG_USB_DEVICE	include/configs/omap3_igep00x0.h	/^#define CONFIG_USB_DEVICE	/;"	d
CONFIG_USB_DEVICE	include/configs/omap3_zoom1.h	/^#define CONFIG_USB_DEVICE	/;"	d
CONFIG_USB_DEVICE	include/configs/spear-common.h	/^#define CONFIG_USB_DEVICE$/;"	d
CONFIG_USB_DEVICE	include/configs/ti_omap4_common.h	/^#define CONFIG_USB_DEVICE	/;"	d
CONFIG_USB_DEV_BASE	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define CONFIG_USB_DEV_BASE	/;"	d
CONFIG_USB_DEV_PULLUP_GPIO	include/configs/h2200.h	/^#define CONFIG_USB_DEV_PULLUP_GPIO	/;"	d
CONFIG_USB_DWC2	include/configs/hikey.h	/^#define CONFIG_USB_DWC2$/;"	d
CONFIG_USB_DWC2	include/configs/rpi.h	/^#define CONFIG_USB_DWC2$/;"	d
CONFIG_USB_DWC2	include/configs/socfpga_common.h	/^#define CONFIG_USB_DWC2$/;"	d
CONFIG_USB_DWC2_REG_ADDR	include/configs/hikey.h	/^#define CONFIG_USB_DWC2_REG_ADDR /;"	d
CONFIG_USB_DWC2_REG_ADDR	include/configs/rpi.h	/^#define CONFIG_USB_DWC2_REG_ADDR /;"	d
CONFIG_USB_DWC3	drivers/usb/dwc3/Kconfig	/^config USB_DWC3$/;"	c
CONFIG_USB_DWC3_GADGET	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_GADGET$/;"	c	choice:choicede88a50d0104
CONFIG_USB_DWC3_GADGET_MODULE	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_GADGET$/;"	c	choice:choicede88a50d0104
CONFIG_USB_DWC3_HOST	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_HOST$/;"	c	choice:choicede88a50d0104
CONFIG_USB_DWC3_HOST_MODULE	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_HOST$/;"	c	choice:choicede88a50d0104
CONFIG_USB_DWC3_MODULE	drivers/usb/dwc3/Kconfig	/^config USB_DWC3$/;"	c
CONFIG_USB_DWC3_OMAP	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_OMAP$/;"	c
CONFIG_USB_DWC3_OMAP_MODULE	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_OMAP$/;"	c
CONFIG_USB_DWC3_PHY_OMAP	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_PHY_OMAP$/;"	c	menu:PHY Subsystem
CONFIG_USB_DWC3_PHY_OMAP_MODULE	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_PHY_OMAP$/;"	c	menu:PHY Subsystem
CONFIG_USB_DWC3_PHY_SAMSUNG	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_PHY_SAMSUNG$/;"	c	menu:PHY Subsystem
CONFIG_USB_DWC3_PHY_SAMSUNG_MODULE	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_PHY_SAMSUNG$/;"	c	menu:PHY Subsystem
CONFIG_USB_EHCI	drivers/usb/host/Kconfig	/^config USB_EHCI$/;"	c
CONFIG_USB_EHCI	include/config/auto.conf	/^CONFIG_USB_EHCI=y$/;"	k
CONFIG_USB_EHCI	include/configs/B4860QDS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/BSC9131RDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/BSC9132QDS.h	/^#define CONFIG_USB_EHCI /;"	d
CONFIG_USB_EHCI	include/configs/M52277EVB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC8315ERDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC8349ITX.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC837XEMDS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC837XERDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC8536DS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC8544DS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/MPC8572DS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/P1010RDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/P1022DS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/P1023RDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/P2041RDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T102xQDS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T102xRDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T1040QDS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T104xRDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T208xQDS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T208xRDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T4240QDS.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/T4240RDB.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/UCP1020.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/alt.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/apalis_t30.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/aristainetos-common.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/beaver.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cardhu.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cei-tk1-som.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cm_t35.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cm_t3517.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cm_t54.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/colibri_t20.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/colibri_t30.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/colibri_vf.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/controlcenterd.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/corenet_ds.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/corvus.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/cyrus.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/dalmore.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ds414.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/duovero.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/e2220-1170.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/edminiv2.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/configs/embestmx6boards.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/exynos5250-common.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/gose.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/gplugd.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/gw_ventana.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/harmony.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/jetson-tk1.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/koelsch.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/lager.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ls1012aqds.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ls1021aqds.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ls1021atwr.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/lwmon5.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/configs/m53evk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ma5d4evk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mcx.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/medcom-wide.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mpc5121ads.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/configs/mv-common.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/configs/mx35pdk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx51evk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx53loco.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6cuboxi.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6qarm2.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6qsabreauto.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6sabresd.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6slevk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6sxsabreauto.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6sxsabresd.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/mxs.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/nas220.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/configs/nitrogen6x.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/novena.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/nyan-big.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/odroid.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/odroid_xu3.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/omap3_beagle.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/omap3_overo.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/omap4_panda.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/omap5_uevm.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ot1200.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/p1_twr.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/p2371-0000.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/p2371-2180.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/p2571.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/paz00.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/pico-imx6ul.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/picosam9g45.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/platinum.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/plutux.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/porter.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/sama5d4_xplained.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/sama5d4ek.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/seaboard.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/silk.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/snapper9g45.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/stout.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/tam3517-common.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/tao3530.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/tbs2910.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/tec-ng.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/tec.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/titanium.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/tqma6.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/trimslice.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/usbarmory.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/vct.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/configs/venice2.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/ventana.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/vinco.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/wandboard.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/warp.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/whistler.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/x600.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/x86-common.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/xpedite550x.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/xpress.h	/^#define CONFIG_USB_EHCI$/;"	d
CONFIG_USB_EHCI	include/configs/zmx25.h	/^#define CONFIG_USB_EHCI	/;"	d
CONFIG_USB_EHCI	include/generated/autoconf.h	/^#define CONFIG_USB_EHCI /;"	d
CONFIG_USB_EHCI_ARMADA100	include/configs/gplugd.h	/^#define CONFIG_USB_EHCI_ARMADA100$/;"	d
CONFIG_USB_EHCI_ATMEL	drivers/usb/host/Kconfig	/^config USB_EHCI_ATMEL$/;"	c
CONFIG_USB_EHCI_ATMEL	include/configs/at91sam9m10g45ek.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/at91sam9x5ek.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/corvus.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/ma5d4evk.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/picosam9g45.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/sama5d4_xplained.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/sama5d4ek.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/snapper9g45.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL	include/configs/vinco.h	/^#define CONFIG_USB_EHCI_ATMEL$/;"	d
CONFIG_USB_EHCI_ATMEL_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_ATMEL$/;"	c
CONFIG_USB_EHCI_BASE_LIST	drivers/usb/host/ehci-faraday.c	/^#define CONFIG_USB_EHCI_BASE_LIST	/;"	d	file:
CONFIG_USB_EHCI_EXYNOS	include/configs/exynos5250-common.h	/^#define CONFIG_USB_EHCI_EXYNOS$/;"	d
CONFIG_USB_EHCI_EXYNOS	include/configs/odroid.h	/^#define CONFIG_USB_EHCI_EXYNOS$/;"	d
CONFIG_USB_EHCI_EXYNOS	include/configs/odroid_xu3.h	/^#define CONFIG_USB_EHCI_EXYNOS$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/B4860QDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/BSC9131RDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/BSC9132QDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/MPC8315ERDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/MPC8349ITX.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/MPC837XEMDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/MPC837XERDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/MPC8536DS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/P1010RDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/P1022DS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/P1023RDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/P2041RDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T102xQDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T102xRDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T1040QDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T104xRDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T208xQDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T208xRDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T4240QDS.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/T4240RDB.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/UCP1020.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/controlcenterd.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/corenet_ds.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/cyrus.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/km/kmp204x-common.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/ls1012aqds.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/ls1021aqds.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/ls1021atwr.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/mpc5121ads.h	/^#define CONFIG_USB_EHCI_FSL	/;"	d
CONFIG_USB_EHCI_FSL	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/p1_twr.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_FSL	include/configs/xpedite550x.h	/^#define CONFIG_USB_EHCI_FSL$/;"	d
CONFIG_USB_EHCI_GENERIC	drivers/usb/host/Kconfig	/^config USB_EHCI_GENERIC$/;"	c
CONFIG_USB_EHCI_GENERIC_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_GENERIC$/;"	c
CONFIG_USB_EHCI_HCD	drivers/usb/host/Kconfig	/^config USB_EHCI_HCD$/;"	c
CONFIG_USB_EHCI_HCD	include/config/auto.conf	/^CONFIG_USB_EHCI_HCD=y$/;"	k
CONFIG_USB_EHCI_HCD	include/generated/autoconf.h	/^#define CONFIG_USB_EHCI_HCD /;"	d
CONFIG_USB_EHCI_HCD_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_HCD$/;"	c
CONFIG_USB_EHCI_KIRKWOOD	include/configs/nas220.h	/^#define CONFIG_USB_EHCI_KIRKWOOD	/;"	d
CONFIG_USB_EHCI_MARVELL	arch/arm/mach-kirkwood/include/mach/config.h	/^#define CONFIG_USB_EHCI_MARVELL$/;"	d
CONFIG_USB_EHCI_MARVELL	drivers/usb/host/Kconfig	/^config USB_EHCI_MARVELL$/;"	c
CONFIG_USB_EHCI_MARVELL	include/configs/ds414.h	/^#define CONFIG_USB_EHCI_MARVELL$/;"	d
CONFIG_USB_EHCI_MARVELL	include/configs/edminiv2.h	/^#define CONFIG_USB_EHCI_MARVELL$/;"	d
CONFIG_USB_EHCI_MARVELL_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_MARVELL$/;"	c
CONFIG_USB_EHCI_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI$/;"	c
CONFIG_USB_EHCI_MSM	drivers/usb/host/Kconfig	/^config USB_EHCI_MSM$/;"	c
CONFIG_USB_EHCI_MSM_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_MSM$/;"	c
CONFIG_USB_EHCI_MX5	include/configs/m53evk.h	/^#define CONFIG_USB_EHCI_MX5$/;"	d
CONFIG_USB_EHCI_MX5	include/configs/mx51evk.h	/^#define CONFIG_USB_EHCI_MX5$/;"	d
CONFIG_USB_EHCI_MX5	include/configs/mx53loco.h	/^#define CONFIG_USB_EHCI_MX5$/;"	d
CONFIG_USB_EHCI_MX5	include/configs/usbarmory.h	/^#define CONFIG_USB_EHCI_MX5$/;"	d
CONFIG_USB_EHCI_MX6	drivers/usb/host/Kconfig	/^config USB_EHCI_MX6$/;"	c
CONFIG_USB_EHCI_MX6	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/aristainetos-common.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/embestmx6boards.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/gw_ventana.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6cuboxi.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6qarm2.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6qsabreauto.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6sabresd.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6slevk.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6sxsabreauto.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6sxsabresd.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/nitrogen6x.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/novena.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/ot1200.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/pico-imx6ul.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/platinum.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/tbs2910.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/titanium.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/tqma6.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/wandboard.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/warp.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6	include/configs/xpress.h	/^#define CONFIG_USB_EHCI_MX6$/;"	d
CONFIG_USB_EHCI_MX6_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_MX6$/;"	c
CONFIG_USB_EHCI_MX7	drivers/usb/host/Kconfig	/^config USB_EHCI_MX7$/;"	c
CONFIG_USB_EHCI_MX7_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_MX7$/;"	c
CONFIG_USB_EHCI_MXC	include/configs/mx35pdk.h	/^#define CONFIG_USB_EHCI_MXC$/;"	d
CONFIG_USB_EHCI_MXC	include/configs/zmx25.h	/^#define CONFIG_USB_EHCI_MXC$/;"	d
CONFIG_USB_EHCI_MXS	include/configs/mxs.h	/^#define CONFIG_USB_EHCI_MXS$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/cm_t35.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/cm_t3517.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/cm_t54.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/duovero.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/mcx.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/omap3_beagle.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/omap3_overo.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/omap4_panda.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/omap5_uevm.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/tam3517-common.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_OMAP	include/configs/tao3530.h	/^#define CONFIG_USB_EHCI_OMAP$/;"	d
CONFIG_USB_EHCI_PCI	include/configs/MPC8544DS.h	/^#define CONFIG_USB_EHCI_PCI$/;"	d
CONFIG_USB_EHCI_PCI	include/configs/MPC8572DS.h	/^#define CONFIG_USB_EHCI_PCI$/;"	d
CONFIG_USB_EHCI_PCI	include/configs/x86-common.h	/^#define CONFIG_USB_EHCI_PCI$/;"	d
CONFIG_USB_EHCI_PPC4XX	include/configs/lwmon5.h	/^#define CONFIG_USB_EHCI_PPC4XX	/;"	d
CONFIG_USB_EHCI_PPC4XX	include/configs/sequoia.h	/^#define CONFIG_USB_EHCI_PPC4XX$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/alt.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/gose.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/koelsch.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/lager.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/porter.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/silk.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_RMOBILE	include/configs/stout.h	/^#define CONFIG_USB_EHCI_RMOBILE$/;"	d
CONFIG_USB_EHCI_SPEAR	include/configs/x600.h	/^#define CONFIG_USB_EHCI_SPEAR$/;"	d
CONFIG_USB_EHCI_SUNXI	include/autoconf.mk	/^CONFIG_USB_EHCI_SUNXI=y$/;"	m
CONFIG_USB_EHCI_SUNXI	include/configs/sun4i.h	/^#define CONFIG_USB_EHCI_SUNXI$/;"	d
CONFIG_USB_EHCI_SUNXI	include/configs/sun50i.h	/^#define CONFIG_USB_EHCI_SUNXI$/;"	d
CONFIG_USB_EHCI_SUNXI	include/configs/sun5i.h	/^#define CONFIG_USB_EHCI_SUNXI$/;"	d
CONFIG_USB_EHCI_SUNXI	include/configs/sun6i.h	/^#define CONFIG_USB_EHCI_SUNXI$/;"	d
CONFIG_USB_EHCI_SUNXI	include/configs/sun7i.h	/^#define CONFIG_USB_EHCI_SUNXI$/;"	d
CONFIG_USB_EHCI_SUNXI	include/configs/sun8i.h	/^#define CONFIG_USB_EHCI_SUNXI$/;"	d
CONFIG_USB_EHCI_SUNXI	spl/include/autoconf.mk	/^CONFIG_USB_EHCI_SUNXI=y$/;"	m
CONFIG_USB_EHCI_TEGRA	include/configs/apalis_t30.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/beaver.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/cardhu.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/cei-tk1-som.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/colibri_t20.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/colibri_t30.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/dalmore.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/e2220-1170.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/harmony.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/jetson-tk1.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/medcom-wide.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/nyan-big.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/p2371-0000.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/p2371-2180.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/p2571.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/paz00.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/plutux.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/seaboard.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/tec-ng.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/tec.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/trimslice.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/venice2.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/ventana.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TEGRA	include/configs/whistler.h	/^#define CONFIG_USB_EHCI_TEGRA$/;"	d
CONFIG_USB_EHCI_TXFIFO_THRESH	include/configs/tegra114-common.h	/^#define CONFIG_USB_EHCI_TXFIFO_THRESH	/;"	d
CONFIG_USB_EHCI_TXFIFO_THRESH	include/configs/tegra124-common.h	/^#define CONFIG_USB_EHCI_TXFIFO_THRESH	/;"	d
CONFIG_USB_EHCI_TXFIFO_THRESH	include/configs/tegra20-common.h	/^#define CONFIG_USB_EHCI_TXFIFO_THRESH	/;"	d
CONFIG_USB_EHCI_TXFIFO_THRESH	include/configs/tegra210-common.h	/^#define CONFIG_USB_EHCI_TXFIFO_THRESH	/;"	d
CONFIG_USB_EHCI_TXFIFO_THRESH	include/configs/tegra30-common.h	/^#define CONFIG_USB_EHCI_TXFIFO_THRESH	/;"	d
CONFIG_USB_EHCI_VCT	include/configs/vct.h	/^#define CONFIG_USB_EHCI_VCT	/;"	d
CONFIG_USB_EHCI_VF	include/configs/colibri_vf.h	/^#define CONFIG_USB_EHCI_VF$/;"	d
CONFIG_USB_EHCI_ZYNQ	drivers/usb/host/Kconfig	/^config USB_EHCI_ZYNQ$/;"	c
CONFIG_USB_EHCI_ZYNQ_MODULE	drivers/usb/host/Kconfig	/^config USB_EHCI_ZYNQ$/;"	c
CONFIG_USB_EMUL	drivers/usb/emul/Kconfig	/^config USB_EMUL$/;"	c
CONFIG_USB_EMUL_MODULE	drivers/usb/emul/Kconfig	/^config USB_EMUL$/;"	c
CONFIG_USB_ETHER	include/configs/am335x_evm.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/am3517_evm.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/baltos.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/gw_ventana.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/h2200.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/ma5d4evk.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/nitrogen6x.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/novena.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/omap3_beagle.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/omap3_logic.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/pcm051.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/sama5d2_xplained.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/sama5d3xek.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/sama5d4_xplained.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/sama5d4ek.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/sansa_fuze_plus.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/siemens-am33x-common.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/tao3530.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/vinco.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER	include/configs/xfi3.h	/^#define CONFIG_USB_ETHER$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/beaver.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/cardhu.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/cei-tk1-som.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/cm_t54.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/colibri_t20.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/colibri_t30.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/dalmore.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/dfi-bt700.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/dragonboard410c.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/e2220-1170.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/embestmx6boards.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/exynos5-common.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/exynos5250-common.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/gw_ventana.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/harmony.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/hikey.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/jetson-tk1.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/m53evk.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mcx.h	/^#define	CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx28evk.h	/^#define	CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx51evk.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx53loco.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx6qarm2.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx6qsabreauto.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx6sabresd.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx6slevk.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx6sxsabreauto.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx6sxsabresd.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/mx7dsabresd.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/nitrogen6x.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/novena.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/nyan-big.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/omap3_beagle.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/p2371-0000.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/p2371-2180.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/p2571.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/paz00.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/rk3399_common.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/seaboard.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/smartweb.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/trimslice.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/venice2.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/ventana.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/whistler.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX	include/configs/x86-common.h	/^#define CONFIG_USB_ETHER_ASIX$/;"	d
CONFIG_USB_ETHER_ASIX88179	include/configs/dragonboard410c.h	/^#define CONFIG_USB_ETHER_ASIX88179$/;"	d
CONFIG_USB_ETHER_ASIX88179	include/configs/exynos5250-common.h	/^#define CONFIG_USB_ETHER_ASIX88179$/;"	d
CONFIG_USB_ETHER_ASIX88179	include/configs/rk3399_common.h	/^#define CONFIG_USB_ETHER_ASIX88179$/;"	d
CONFIG_USB_ETHER_DM9601	include/configs/dragonboard410c.h	/^#define CONFIG_USB_ETHER_DM9601$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/cm_t54.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/dfi-bt700.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/dragonboard410c.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/harmony.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/m53evk.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/mcx.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/mx53loco.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/nitrogen6x.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/omap3_beagle.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/rk3399_common.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_MCS7830	include/configs/smartweb.h	/^#define CONFIG_USB_ETHER_MCS7830$/;"	d
CONFIG_USB_ETHER_RNDIS	include/configs/cm_t54.h	/^#define CONFIG_USB_ETHER_RNDIS$/;"	d
CONFIG_USB_ETHER_RNDIS	include/configs/omap3_beagle.h	/^#define CONFIG_USB_ETHER_RNDIS$/;"	d
CONFIG_USB_ETHER_RNDIS	include/configs/omap3_logic.h	/^#define CONFIG_USB_ETHER_RNDIS$/;"	d
CONFIG_USB_ETHER_RNDIS	include/configs/tao3530.h	/^#define CONFIG_USB_ETHER_RNDIS$/;"	d
CONFIG_USB_ETHER_RNDIS	include/configs/vinco.h	/^#define CONFIG_USB_ETHER_RNDIS$/;"	d
CONFIG_USB_ETHER_RTL8152	include/configs/dfi-bt700.h	/^#define CONFIG_USB_ETHER_RTL8152$/;"	d
CONFIG_USB_ETHER_RTL8152	include/configs/exynos5-common.h	/^#define CONFIG_USB_ETHER_RTL8152$/;"	d
CONFIG_USB_ETHER_RTL8152	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_USB_ETHER_RTL8152$/;"	d
CONFIG_USB_ETHER_RTL8152	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_USB_ETHER_RTL8152$/;"	d
CONFIG_USB_ETHER_RTL8152	include/configs/rk3399_common.h	/^#define CONFIG_USB_ETHER_RTL8152$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/cm_t54.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/dfi-bt700.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/dragonboard410c.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/exynos5-common.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/gw_ventana.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/harmony.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/hikey.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/m53evk.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/medcom-wide.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/mx23_olinuxino.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/mx28evk.h	/^#define	CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/mx51evk.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/mx53loco.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/nitrogen6x.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/novena.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/odroid.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/omap3_beagle.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/omap4_panda.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/omap5_uevm.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/plutux.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/rk3399_common.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/rpi.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/tao3530.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/tec-ng.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/tec.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/tqma6.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/vinco.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETHER_SMSC95XX	include/configs/x86-common.h	/^#define CONFIG_USB_ETHER_SMSC95XX$/;"	d
CONFIG_USB_ETH_CDC	include/configs/gw_ventana.h	/^#define CONFIG_USB_ETH_CDC$/;"	d
CONFIG_USB_ETH_CDC	include/configs/nitrogen6x.h	/^#define CONFIG_USB_ETH_CDC$/;"	d
CONFIG_USB_ETH_CDC	include/configs/novena.h	/^#define CONFIG_USB_ETH_CDC$/;"	d
CONFIG_USB_ETH_CDC	include/configs/sansa_fuze_plus.h	/^#define CONFIG_USB_ETH_CDC$/;"	d
CONFIG_USB_ETH_CDC	include/configs/xfi3.h	/^#define CONFIG_USB_ETH_CDC$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/am335x_evm.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/am3517_evm.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/baltos.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/ma5d4evk.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/pcm051.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/sama5d2_xplained.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/sama5d3xek.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/sama5d4_xplained.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/sama5d4ek.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/siemens-am33x-common.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_RNDIS	include/configs/vinco.h	/^#define CONFIG_USB_ETH_RNDIS$/;"	d
CONFIG_USB_ETH_SUBSET	include/configs/h2200.h	/^#define CONFIG_USB_ETH_SUBSET$/;"	d
CONFIG_USB_EXT2_BOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_USB_EXT2_BOOT	/;"	d
CONFIG_USB_EXT2_BOOT	include/configs/p1_twr.h	/^#define CONFIG_USB_EXT2_BOOT	/;"	d
CONFIG_USB_FAT_BOOT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_USB_FAT_BOOT	/;"	d
CONFIG_USB_FAT_BOOT	include/configs/p1_twr.h	/^#define CONFIG_USB_FAT_BOOT	/;"	d
CONFIG_USB_FREQ	board/armadeus/apf27/apf27.h	/^#define CONFIG_USB_FREQ	/;"	d
CONFIG_USB_FUNCTION_DFU	drivers/dfu/Kconfig	/^config USB_FUNCTION_DFU$/;"	c	menu:DFU support
CONFIG_USB_FUNCTION_DFU_MODULE	drivers/dfu/Kconfig	/^config USB_FUNCTION_DFU$/;"	c	menu:DFU support
CONFIG_USB_FUNCTION_FASTBOOT	cmd/fastboot/Kconfig	/^config USB_FUNCTION_FASTBOOT$/;"	c	menu:Fastboot support
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/am335x_evm.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/bav335x.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/kc1.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/mx6sabre_common.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/nitrogen6x.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/omap3_beagle.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/omap3_logic.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/rk3036_common.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/rk3288_common.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/sniper.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT	include/configs/sunxi-common.h	/^#define CONFIG_USB_FUNCTION_FASTBOOT$/;"	d
CONFIG_USB_FUNCTION_FASTBOOT_MODULE	cmd/fastboot/Kconfig	/^config USB_FUNCTION_FASTBOOT$/;"	c	menu:Fastboot support
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/bav335x.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/colibri_imx7.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/colibri_vf.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/exynos4-common.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/gw_ventana.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/mx6sabre_common.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/mx7dsabresd.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/nitrogen6x.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/odroid_xu3.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/pico-imx6ul.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/rk3036_common.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/rk3288_common.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/s5p_goni.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/socfpga_common.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/sunxi-common.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/tbs2910.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/tegra-common-usb-gadget.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/warp.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_MASS_STORAGE	include/configs/warp7.h	/^#define CONFIG_USB_FUNCTION_MASS_STORAGE$/;"	d
CONFIG_USB_FUNCTION_THOR	include/configs/exynos4-common.h	/^#define CONFIG_USB_FUNCTION_THOR$/;"	d
CONFIG_USB_FUNCTION_THOR	include/configs/odroid_xu3.h	/^#define CONFIG_USB_FUNCTION_THOR$/;"	d
CONFIG_USB_FUNCTION_THOR	include/configs/s5p_goni.h	/^#define CONFIG_USB_FUNCTION_THOR$/;"	d
CONFIG_USB_FUNCTION_THOR	include/configs/xilinx_zynqmp.h	/^#define CONFIG_USB_FUNCTION_THOR$/;"	d
CONFIG_USB_FUNCTION_THOR	include/configs/zynq-common.h	/^# define CONFIG_USB_FUNCTION_THOR$/;"	d
CONFIG_USB_GADGET	drivers/usb/gadget/Kconfig	/^menuconfig USB_GADGET$/;"	c
CONFIG_USB_GADGET	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_GADGET$/;"	d
CONFIG_USB_GADGET	include/configs/rk3036_common.h	/^#define CONFIG_USB_GADGET$/;"	d
CONFIG_USB_GADGET	include/configs/rk3288_common.h	/^#define CONFIG_USB_GADGET$/;"	d
CONFIG_USB_GADGET	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_GADGET$/;"	d
CONFIG_USB_GADGET_AT91	include/configs/smartweb.h	/^#define CONFIG_USB_GADGET_AT91$/;"	d
CONFIG_USB_GADGET_AT91	include/configs/taurus.h	/^#define CONFIG_USB_GADGET_AT91$/;"	d
CONFIG_USB_GADGET_ATMEL_USBA	drivers/usb/gadget/Kconfig	/^config USB_GADGET_ATMEL_USBA$/;"	c
CONFIG_USB_GADGET_ATMEL_USBA	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_GADGET_ATMEL_USBA$/;"	d
CONFIG_USB_GADGET_ATMEL_USBA_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_ATMEL_USBA$/;"	c
CONFIG_USB_GADGET_BCM_UDC_OTG_PHY	drivers/usb/gadget/Kconfig	/^config USB_GADGET_BCM_UDC_OTG_PHY$/;"	c
CONFIG_USB_GADGET_BCM_UDC_OTG_PHY_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_BCM_UDC_OTG_PHY$/;"	c
CONFIG_USB_GADGET_DOWNLOAD	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DOWNLOAD$/;"	c
CONFIG_USB_GADGET_DOWNLOAD	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_GADGET_DOWNLOAD$/;"	d
CONFIG_USB_GADGET_DOWNLOAD	include/configs/rk3036_common.h	/^#define CONFIG_USB_GADGET_DOWNLOAD$/;"	d
CONFIG_USB_GADGET_DOWNLOAD	include/configs/rk3288_common.h	/^#define CONFIG_USB_GADGET_DOWNLOAD$/;"	d
CONFIG_USB_GADGET_DOWNLOAD_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DOWNLOAD$/;"	c
CONFIG_USB_GADGET_DUALSPEED	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DUALSPEED$/;"	c
CONFIG_USB_GADGET_DUALSPEED	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_GADGET_DUALSPEED$/;"	d
CONFIG_USB_GADGET_DUALSPEED	include/configs/rk3036_common.h	/^#define CONFIG_USB_GADGET_DUALSPEED$/;"	d
CONFIG_USB_GADGET_DUALSPEED	include/configs/rk3288_common.h	/^#define CONFIG_USB_GADGET_DUALSPEED$/;"	d
CONFIG_USB_GADGET_DUALSPEED	include/configs/sama5d2_ptc.h	/^#define CONFIG_USB_GADGET_DUALSPEED$/;"	d
CONFIG_USB_GADGET_DUALSPEED_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DUALSPEED$/;"	c
CONFIG_USB_GADGET_DWC2_OTG	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DWC2_OTG$/;"	c
CONFIG_USB_GADGET_DWC2_OTG	include/configs/rk3036_common.h	/^#define CONFIG_USB_GADGET_DWC2_OTG$/;"	d
CONFIG_USB_GADGET_DWC2_OTG	include/configs/rk3288_common.h	/^#define CONFIG_USB_GADGET_DWC2_OTG$/;"	d
CONFIG_USB_GADGET_DWC2_OTG_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DWC2_OTG$/;"	c
CONFIG_USB_GADGET_DWC2_OTG_PHY	include/configs/exynos4-common.h	/^#define CONFIG_USB_GADGET_DWC2_OTG_PHY$/;"	d
CONFIG_USB_GADGET_DWC2_OTG_PHY	include/configs/s5p_goni.h	/^#define CONFIG_USB_GADGET_DWC2_OTG_PHY$/;"	d
CONFIG_USB_GADGET_DWC2_OTG_PHY	include/configs/s5pc210_universal.h	/^#define CONFIG_USB_GADGET_DWC2_OTG_PHY$/;"	d
CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8$/;"	c
CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8$/;"	c
CONFIG_USB_GADGET_MASS_STORAGE	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_GADGET_MASS_STORAGE$/;"	d
CONFIG_USB_GADGET_MODULE	drivers/usb/gadget/Kconfig	/^menuconfig USB_GADGET$/;"	c
CONFIG_USB_GADGET_PXA2XX	include/configs/h2200.h	/^#define CONFIG_USB_GADGET_PXA2XX$/;"	d
CONFIG_USB_GADGET_VBUS_DRAW	drivers/usb/gadget/Kconfig	/^config USB_GADGET_VBUS_DRAW$/;"	c
CONFIG_USB_GADGET_VBUS_DRAW	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USB_GADGET_VBUS_DRAW /;"	d
CONFIG_USB_GADGET_VBUS_DRAW	include/configs/bcm23550_w1d.h	/^#define CONFIG_USB_GADGET_VBUS_DRAW	/;"	d
CONFIG_USB_GADGET_VBUS_DRAW	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_GADGET_VBUS_DRAW /;"	d
CONFIG_USB_GADGET_VBUS_DRAW	include/configs/pico-imx6ul.h	/^#define CONFIG_USB_GADGET_VBUS_DRAW	/;"	d
CONFIG_USB_GADGET_VBUS_DRAW	include/configs/rk3036_common.h	/^#define CONFIG_USB_GADGET_VBUS_DRAW	/;"	d
CONFIG_USB_GADGET_VBUS_DRAW	include/configs/rk3288_common.h	/^#define CONFIG_USB_GADGET_VBUS_DRAW	/;"	d
CONFIG_USB_GADGET_VBUS_DRAW_MODULE	drivers/usb/gadget/Kconfig	/^config USB_GADGET_VBUS_DRAW$/;"	c
CONFIG_USB_HOST	drivers/usb/host/Kconfig	/^config USB_HOST$/;"	c
CONFIG_USB_HOST	include/config/auto.conf	/^CONFIG_USB_HOST=y$/;"	k
CONFIG_USB_HOST	include/generated/autoconf.h	/^#define CONFIG_USB_HOST /;"	d
CONFIG_USB_HOST_ETHER	include/configs/beaver.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/cardhu.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/cei-tk1-som.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/cm_t54.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/colibri_t20.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/colibri_t30.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/dalmore.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/dfi-bt700.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/dragonboard410c.h	/^#define CONFIG_USB_HOST_ETHER /;"	d
CONFIG_USB_HOST_ETHER	include/configs/e2220-1170.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/embestmx6boards.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/exynos5-common.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/exynos5250-common.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/gw_ventana.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/harmony.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/hikey.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/jetson-tk1.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/m53evk.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mcx.h	/^#define	CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/medcom-wide.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx23_olinuxino.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx28evk.h	/^#define	CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx51evk.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx53loco.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx6qarm2.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx6qsabreauto.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx6sabresd.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx6slevk.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx6sxsabreauto.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx6sxsabresd.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/mx7dsabresd.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/nitrogen6x.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/novena.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/nyan-big.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/odroid.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/omap3_beagle.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/omap4_panda.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/omap5_uevm.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/p2371-0000.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/p2371-2180.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/p2571.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/paz00.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/plutux.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/rk3399_common.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/rpi.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/seaboard.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/smartweb.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/tao3530.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/tec-ng.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/tec.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/tqma6.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/trimslice.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/venice2.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/ventana.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/vinco.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/whistler.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_ETHER	include/configs/x86-common.h	/^#define CONFIG_USB_HOST_ETHER$/;"	d
CONFIG_USB_HOST_MODULE	drivers/usb/host/Kconfig	/^config USB_HOST$/;"	c
CONFIG_USB_HOST_XHCI_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_USB_HOST_XHCI_BASE	/;"	d
CONFIG_USB_ISP1301_I2C_ADDR	include/configs/devkit3250.h	/^#define CONFIG_USB_ISP1301_I2C_ADDR	/;"	d
CONFIG_USB_KEYBOARD	drivers/usb/Kconfig	/^config USB_KEYBOARD$/;"	c
CONFIG_USB_KEYBOARD_MODULE	drivers/usb/Kconfig	/^config USB_KEYBOARD$/;"	c
CONFIG_USB_MAX_CONTROLLER_COUNT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	arch/powerpc/cpu/mpc8xxx/fdt.c	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d	file:
CONFIG_USB_MAX_CONTROLLER_COUNT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	arch/powerpc/include/asm/config_mpc85xx.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	common/usb.c	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d	file:
CONFIG_USB_MAX_CONTROLLER_COUNT	drivers/usb/common/fsl-dt-fixup.c	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d	file:
CONFIG_USB_MAX_CONTROLLER_COUNT	drivers/usb/host/ehci-fsl.c	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d	file:
CONFIG_USB_MAX_CONTROLLER_COUNT	drivers/usb/host/ehci-hcd.c	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d	file:
CONFIG_USB_MAX_CONTROLLER_COUNT	drivers/usb/host/xhci.c	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d	file:
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/UCP1020.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/alt.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/apx4devkit.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/aristainetos-common.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/cgtqmx6eval.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/cm_fx6.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/colibri_imx7.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/colibri_t20.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/colibri_vf.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/db-88f6720.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/db-mv784mp-gp.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/dfi-bt700.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ds414.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/embestmx6boards.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ge_bx50v3.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/gose.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/gw_ventana.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/koelsch.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/lager.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1012afrdm.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1012aqds.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1012ardb.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1021aqds.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1021atwr.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1043aqds.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls1043ardb.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls2080aqds.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ls2080ardb.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/m28evk.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/minnowmax.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mvebu_db-88f3720.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mvebu_db-88f7040.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx23_olinuxino.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx23evk.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx28evk.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6cuboxi.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6qarm2.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6qsabreauto.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6sabresd.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6slevk.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6sxsabreauto.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6sxsabresd.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/mx7dsabresd.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/nitrogen6x.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/novena.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/ot1200.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/pico-imx6ul.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/porter.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/sansa_fuze_plus.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/sc_sps_1.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/silk.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/stout.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/sun50i.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/tbs2910.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/theadorable.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/tqma6.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/wandboard.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/warp.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/warp7.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/x600.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/x86-common.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/xfi3.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/xilinx_zynqmp.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT /;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/xpress.h	/^#define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MAX_CONTROLLER_COUNT	include/configs/zynq-common.h	/^# define CONFIG_USB_MAX_CONTROLLER_COUNT	/;"	d
CONFIG_USB_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config USB_MODE$/;"	c	choice:choice5ba020940104
CONFIG_USB_MODE_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config USB_MODE$/;"	c	choice:choice5ba020940104
CONFIG_USB_MODULE	drivers/usb/Kconfig	/^menuconfig USB$/;"	c
CONFIG_USB_MUSB_AM35X	include/configs/am3517_evm.h	/^#define CONFIG_USB_MUSB_AM35X$/;"	d
CONFIG_USB_MUSB_AM35X	include/configs/cm_t3517.h	/^#define CONFIG_USB_MUSB_AM35X$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/am335x_evm.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/baltos.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/bav335x.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/brppt1.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/brxre1.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/pengwyn.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT	include/configs/siemens-am33x-common.h	/^#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/am335x_evm.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/baltos.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/bav335x.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/brppt1.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/brxre1.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/pcm051.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/pengwyn.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_DSPS	include/configs/siemens-am33x-common.h	/^#define CONFIG_USB_MUSB_DSPS$/;"	d
CONFIG_USB_MUSB_GADGET	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_GADGET$/;"	c
CONFIG_USB_MUSB_GADGET_MODULE	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_GADGET$/;"	c
CONFIG_USB_MUSB_HCD	include/configs/am3517_crane.h	/^#define CONFIG_USB_MUSB_HCD	/;"	d
CONFIG_USB_MUSB_HCD	include/configs/bf526-ezbrd.h	/^#define CONFIG_USB_MUSB_HCD$/;"	d
CONFIG_USB_MUSB_HCD	include/configs/bf527-ezkit.h	/^#define CONFIG_USB_MUSB_HCD$/;"	d
CONFIG_USB_MUSB_HCD	include/configs/bf548-ezkit.h	/^#define CONFIG_USB_MUSB_HCD$/;"	d
CONFIG_USB_MUSB_HCD	include/configs/nokia_rx51.h	/^#define CONFIG_USB_MUSB_HCD$/;"	d
CONFIG_USB_MUSB_HCD	include/configs/omap3_evm.h	/^#define CONFIG_USB_MUSB_HCD$/;"	d
CONFIG_USB_MUSB_HOST	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_HOST$/;"	c
CONFIG_USB_MUSB_HOST_MODULE	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_HOST$/;"	c
CONFIG_USB_MUSB_OMAP2PLUS	include/configs/kc1.h	/^#define CONFIG_USB_MUSB_OMAP2PLUS$/;"	d
CONFIG_USB_MUSB_OMAP2PLUS	include/configs/omap3_beagle.h	/^#define CONFIG_USB_MUSB_OMAP2PLUS$/;"	d
CONFIG_USB_MUSB_OMAP2PLUS	include/configs/omap3_logic.h	/^#define CONFIG_USB_MUSB_OMAP2PLUS$/;"	d
CONFIG_USB_MUSB_OMAP2PLUS	include/configs/sniper.h	/^#define CONFIG_USB_MUSB_OMAP2PLUS$/;"	d
CONFIG_USB_MUSB_PIC32	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_PIC32$/;"	c
CONFIG_USB_MUSB_PIC32_MODULE	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_PIC32$/;"	c
CONFIG_USB_MUSB_PIO_ONLY	include/configs/am335x_evm.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/am3517_evm.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/baltos.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/bav335x.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/brppt1.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/brxre1.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/cm_t3517.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/kc1.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/omap3_beagle.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/omap3_logic.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/pcm051.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/pengwyn.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/pic32mzdask.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/siemens-am33x-common.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/sniper.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_PIO_ONLY	include/configs/sunxi-common.h	/^#define CONFIG_USB_MUSB_PIO_ONLY$/;"	d
CONFIG_USB_MUSB_SUNXI	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_SUNXI$/;"	c
CONFIG_USB_MUSB_SUNXI_MODULE	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_SUNXI$/;"	c
CONFIG_USB_MUSB_TIMEOUT	drivers/usb/musb/musb_hcd.h	/^# define CONFIG_USB_MUSB_TIMEOUT /;"	d
CONFIG_USB_MUSB_TIMEOUT	include/configs/bf526-ezbrd.h	/^#define CONFIG_USB_MUSB_TIMEOUT /;"	d
CONFIG_USB_MUSB_TIMEOUT	include/configs/bf527-ezkit.h	/^#define CONFIG_USB_MUSB_TIMEOUT /;"	d
CONFIG_USB_MUSB_TIMEOUT	include/configs/bf548-ezkit.h	/^#define CONFIG_USB_MUSB_TIMEOUT /;"	d
CONFIG_USB_MUSB_UDC	include/configs/cm_t35.h	/^#define CONFIG_USB_MUSB_UDC$/;"	d
CONFIG_USB_MUSB_UDC	include/configs/nokia_rx51.h	/^#define CONFIG_USB_MUSB_UDC$/;"	d
CONFIG_USB_MUSB_UDC	include/configs/omap3_igep00x0.h	/^#define CONFIG_USB_MUSB_UDC	/;"	d
CONFIG_USB_MUSB_UDC	include/configs/omap3_zoom1.h	/^#define CONFIG_USB_MUSB_UDC	/;"	d
CONFIG_USB_MUSB_UDC	include/configs/ti_omap4_common.h	/^#define CONFIG_USB_MUSB_UDC	/;"	d
CONFIG_USB_OHCI	include/configs/VCMA9.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI	include/configs/acadia.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI	include/configs/bamboo.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI	include/configs/cm5200.h	/^#define CONFIG_USB_OHCI	/;"	d
CONFIG_USB_OHCI	include/configs/inka4x0.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI	include/configs/pcm030.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI	include/configs/smdk2410.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI	include/configs/v38b.h	/^#define CONFIG_USB_OHCI$/;"	d
CONFIG_USB_OHCI_EP93XX	include/configs/edb93xx.h	/^#define CONFIG_USB_OHCI_EP93XX$/;"	d
CONFIG_USB_OHCI_GENERIC	drivers/usb/host/Kconfig	/^config USB_OHCI_GENERIC$/;"	c
CONFIG_USB_OHCI_GENERIC_MODULE	drivers/usb/host/Kconfig	/^config USB_OHCI_GENERIC$/;"	c
CONFIG_USB_OHCI_HCD	drivers/usb/host/Kconfig	/^config USB_OHCI_HCD$/;"	c
CONFIG_USB_OHCI_HCD_MODULE	drivers/usb/host/Kconfig	/^config USB_OHCI_HCD$/;"	c
CONFIG_USB_OHCI_LPC32XX	include/configs/devkit3250.h	/^#define CONFIG_USB_OHCI_LPC32XX$/;"	d
CONFIG_USB_OHCI_NEW	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/autoconf.mk	/^CONFIG_USB_OHCI_NEW=y$/;"	m
CONFIG_USB_OHCI_NEW	include/configs/M5475EVB.h	/^#	define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/M5485EVB.h	/^#	define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/MPC8610HPCD.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/MPC8641HPCN.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/PLU405.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/PMC440.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/TQM5200.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/a4m072.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/at91rm9200ek.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/at91sam9260ek.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/at91sam9261ek.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/at91sam9263ek.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/at91sam9n12ek.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/at91sam9x5ek.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/axs10x.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/canyonlands.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/digsy_mtc.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/edb93xx.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/ethernut5.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/intip.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/ipek01.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/pm9261.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/pm9263.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/pm9g45.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/pxa-common.h	/^#define	CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/sama5d3_xplained.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/sama5d3xek.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/sequoia.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/smartweb.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/snapper9260.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/socrates.h	/^#define CONFIG_USB_OHCI_NEW	/;"	d
CONFIG_USB_OHCI_NEW	include/configs/sunxi-common.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/taurus.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/usb_a9263.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	include/configs/yosemite.h	/^#define CONFIG_USB_OHCI_NEW$/;"	d
CONFIG_USB_OHCI_NEW	spl/include/autoconf.mk	/^CONFIG_USB_OHCI_NEW=y$/;"	m
CONFIG_USB_OHCI_S3C24XX	include/configs/VCMA9.h	/^#define CONFIG_USB_OHCI_S3C24XX$/;"	d
CONFIG_USB_OHCI_S3C24XX	include/configs/smdk2410.h	/^#define CONFIG_USB_OHCI_S3C24XX$/;"	d
CONFIG_USB_OHCI_SUNXI	include/autoconf.mk	/^CONFIG_USB_OHCI_SUNXI=y$/;"	m
CONFIG_USB_OHCI_SUNXI	include/configs/sunxi-common.h	/^#define CONFIG_USB_OHCI_SUNXI$/;"	d
CONFIG_USB_OHCI_SUNXI	spl/include/autoconf.mk	/^CONFIG_USB_OHCI_SUNXI=y$/;"	m
CONFIG_USB_OMAP3	include/configs/cm_t35.h	/^#define CONFIG_USB_OMAP3$/;"	d
CONFIG_USB_OMAP3	include/configs/cm_t3517.h	/^#define CONFIG_USB_OMAP3$/;"	d
CONFIG_USB_OMAP3	include/configs/nokia_rx51.h	/^#define CONFIG_USB_OMAP3$/;"	d
CONFIG_USB_OMAP3	include/configs/omap3_evm.h	/^#define CONFIG_USB_OMAP3$/;"	d
CONFIG_USB_OMAP3	include/configs/omap3_igep00x0.h	/^#define CONFIG_USB_OMAP3	/;"	d
CONFIG_USB_OMAP3	include/configs/omap3_logic.h	/^#define CONFIG_USB_OMAP3$/;"	d
CONFIG_USB_OMAP3	include/configs/omap3_zoom1.h	/^#define CONFIG_USB_OMAP3	/;"	d
CONFIG_USB_OMAP3	include/configs/ti_omap4_common.h	/^#define CONFIG_USB_OMAP3	/;"	d
CONFIG_USB_PHY_CFG_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_USB_PHY_CFG_BASE	/;"	d
CONFIG_USB_PHY_TYPE	include/configs/MPC8315ERDB.h	/^#define CONFIG_USB_PHY_TYPE	/;"	d
CONFIG_USB_PXA25X_SMALL	drivers/usb/gadget/pxa25x_udc.c	/^#define CONFIG_USB_PXA25X_SMALL$/;"	d	file:
CONFIG_USB_R8A66597_HCD	include/configs/ecovec.h	/^#define CONFIG_USB_R8A66597_HCD$/;"	d
CONFIG_USB_R8A66597_HCD	include/configs/sh7785lcr.h	/^#define CONFIG_USB_R8A66597_HCD$/;"	d
CONFIG_USB_SERIALNO	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^#define CONFIG_USB_SERIALNO /;"	d	file:
CONFIG_USB_SERIALNO	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^#define CONFIG_USB_SERIALNO /;"	d	file:
CONFIG_USB_SS_BASE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_USB_SS_BASE	/;"	d
CONFIG_USB_STORAGE	drivers/usb/Kconfig	/^config USB_STORAGE$/;"	c
CONFIG_USB_STORAGE	include/config/auto.conf	/^CONFIG_USB_STORAGE=y$/;"	k
CONFIG_USB_STORAGE	include/configs/advantech_dms-ba16.h	/^#define CONFIG_USB_STORAGE$/;"	d
CONFIG_USB_STORAGE	include/generated/autoconf.h	/^#define CONFIG_USB_STORAGE /;"	d
CONFIG_USB_STORAGE_MODULE	drivers/usb/Kconfig	/^config USB_STORAGE$/;"	c
CONFIG_USB_TTY	include/configs/am3517_crane.h	/^#define CONFIG_USB_TTY	/;"	d
CONFIG_USB_TTY	include/configs/cm_t35.h	/^#define CONFIG_USB_TTY$/;"	d
CONFIG_USB_TTY	include/configs/omap3_evm.h	/^#define CONFIG_USB_TTY$/;"	d
CONFIG_USB_TTY	include/configs/omap3_igep00x0.h	/^#define CONFIG_USB_TTY	/;"	d
CONFIG_USB_TTY	include/configs/omap3_zoom1.h	/^#define CONFIG_USB_TTY	/;"	d
CONFIG_USB_TTY	include/configs/spear-common.h	/^#define CONFIG_USB_TTY$/;"	d
CONFIG_USB_TTY	include/configs/ti_omap4_common.h	/^#define CONFIG_USB_TTY	/;"	d
CONFIG_USB_UHCI	include/configs/MIP405.h	/^#define CONFIG_USB_UHCI$/;"	d
CONFIG_USB_UHCI	include/configs/PIP405.h	/^#define CONFIG_USB_UHCI$/;"	d
CONFIG_USB_UHCI	include/configs/gr_ep2s60.h	/^#define CONFIG_USB_UHCI$/;"	d
CONFIG_USB_UHCI_HCD	drivers/usb/host/Kconfig	/^config USB_UHCI_HCD$/;"	c
CONFIG_USB_UHCI_HCD_MODULE	drivers/usb/host/Kconfig	/^config USB_UHCI_HCD$/;"	c
CONFIG_USB_ULPI	drivers/usb/ulpi/Kconfig	/^config USB_ULPI$/;"	c
CONFIG_USB_ULPI_MODULE	drivers/usb/ulpi/Kconfig	/^config USB_ULPI$/;"	c
CONFIG_USB_ULPI_TIMEOUT	include/usb/ulpi.h	/^#define CONFIG_USB_ULPI_TIMEOUT /;"	d
CONFIG_USB_ULPI_VIEWPORT	drivers/usb/ulpi/Kconfig	/^config USB_ULPI_VIEWPORT$/;"	c	choice:choice2a7f43960104
CONFIG_USB_ULPI_VIEWPORT_MODULE	drivers/usb/ulpi/Kconfig	/^config USB_ULPI_VIEWPORT$/;"	c	choice:choice2a7f43960104
CONFIG_USB_ULPI_VIEWPORT_OMAP	drivers/usb/ulpi/Kconfig	/^config USB_ULPI_VIEWPORT_OMAP$/;"	c	choice:choice2a7f43960104
CONFIG_USB_ULPI_VIEWPORT_OMAP_MODULE	drivers/usb/ulpi/Kconfig	/^config USB_ULPI_VIEWPORT_OMAP$/;"	c	choice:choice2a7f43960104
CONFIG_USB_XHCI_DWC3	drivers/usb/host/Kconfig	/^config USB_XHCI_DWC3$/;"	c
CONFIG_USB_XHCI_DWC3_MODULE	drivers/usb/host/Kconfig	/^config USB_XHCI_DWC3$/;"	c
CONFIG_USB_XHCI_EXYNOS	include/configs/exynos5420-common.h	/^#define CONFIG_USB_XHCI_EXYNOS$/;"	d
CONFIG_USB_XHCI_EXYNOS	include/configs/smdk5420.h	/^#define CONFIG_USB_XHCI_EXYNOS$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1012afrdm.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1012aqds.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1012ardb.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1021aqds.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1021atwr.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1043aqds.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls1043ardb.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls2080aqds.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_FSL	include/configs/ls2080ardb.h	/^#define CONFIG_USB_XHCI_FSL$/;"	d
CONFIG_USB_XHCI_HCD	drivers/usb/host/Kconfig	/^config USB_XHCI_HCD$/;"	c
CONFIG_USB_XHCI_HCD_MODULE	drivers/usb/host/Kconfig	/^config USB_XHCI_HCD$/;"	c
CONFIG_USB_XHCI_KEYSTONE	include/configs/ti_armv7_keystone2.h	/^#define CONFIG_USB_XHCI_KEYSTONE$/;"	d
CONFIG_USB_XHCI_MVEBU	drivers/usb/host/Kconfig	/^config USB_XHCI_MVEBU$/;"	c
CONFIG_USB_XHCI_MVEBU_MODULE	drivers/usb/host/Kconfig	/^config USB_XHCI_MVEBU$/;"	c
CONFIG_USB_XHCI_OMAP	include/configs/am43xx_evm.h	/^#define CONFIG_USB_XHCI_OMAP$/;"	d
CONFIG_USB_XHCI_OMAP	include/configs/am57xx_evm.h	/^#define CONFIG_USB_XHCI_OMAP$/;"	d
CONFIG_USB_XHCI_OMAP	include/configs/cm_t43.h	/^#define CONFIG_USB_XHCI_OMAP$/;"	d
CONFIG_USB_XHCI_OMAP	include/configs/dra7xx_evm.h	/^#define CONFIG_USB_XHCI_OMAP$/;"	d
CONFIG_USB_XHCI_ROCKCHIP	drivers/usb/host/Kconfig	/^config USB_XHCI_ROCKCHIP$/;"	c
CONFIG_USB_XHCI_ROCKCHIP_MODULE	drivers/usb/host/Kconfig	/^config USB_XHCI_ROCKCHIP$/;"	c
CONFIG_USB_XHCI_ZYNQMP	include/configs/xilinx_zynqmp.h	/^#define CONFIG_USB_XHCI_ZYNQMP$/;"	d
CONFIG_USER_LOWLEVEL_INIT	include/configs/pm9263.h	/^#define CONFIG_USER_LOWLEVEL_INIT	/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/armadillo-800eva.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/blanche.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/colibri_imx7.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/colibri_vf.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/exynos-common.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/pcm052.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/tegra-common.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/uniphier.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMCPY	include/configs/vf610twr.h	/^#define CONFIG_USE_ARCH_MEMCPY$/;"	d
CONFIG_USE_ARCH_MEMSET	include/configs/armadillo-800eva.h	/^#define CONFIG_USE_ARCH_MEMSET$/;"	d
CONFIG_USE_ARCH_MEMSET	include/configs/blanche.h	/^#define CONFIG_USE_ARCH_MEMSET$/;"	d
CONFIG_USE_ARCH_MEMSET	include/configs/colibri_imx7.h	/^#define CONFIG_USE_ARCH_MEMSET$/;"	d
CONFIG_USE_ARCH_MEMSET	include/configs/colibri_vf.h	/^#define CONFIG_USE_ARCH_MEMSET$/;"	d
CONFIG_USE_ARCH_MEMSET	include/configs/exynos-common.h	/^#define CONFIG_USE_ARCH_MEMSET$/;"	d
CONFIG_USE_ARCH_MEMSET	include/configs/uniphier.h	/^#define CONFIG_USE_ARCH_MEMSET$/;"	d
CONFIG_USE_FDT	include/configs/brppt1.h	/^#define CONFIG_USE_FDT	/;"	d
CONFIG_USE_IMXIMG_PLUGIN	arch/arm/imx-common/Kconfig	/^config USE_IMXIMG_PLUGIN$/;"	c
CONFIG_USE_IMXIMG_PLUGIN_MODULE	arch/arm/imx-common/Kconfig	/^config USE_IMXIMG_PLUGIN$/;"	c
CONFIG_USE_INTERRUPT	include/configs/adp-ag101p.h	/^#define CONFIG_USE_INTERRUPT$/;"	d
CONFIG_USE_NAND	include/configs/omapl138_lcdk.h	/^#define	CONFIG_USE_NAND$/;"	d
CONFIG_USE_NETDEV	include/configs/amcc-common.h	/^#define CONFIG_USE_NETDEV	/;"	d
CONFIG_USE_NETDEV	include/configs/canyonlands.h	/^#define CONFIG_USE_NETDEV	/;"	d
CONFIG_USE_ONENAND_BOARD_INIT	include/configs/omap3_igep00x0.h	/^#define CONFIG_USE_ONENAND_BOARD_INIT$/;"	d
CONFIG_USE_ONENAND_BOARD_INIT	include/configs/s5p_goni.h	/^#define CONFIG_USE_ONENAND_BOARD_INIT$/;"	d
CONFIG_USE_ONENAND_BOARD_INIT	include/configs/s5pc210_universal.h	/^#define CONFIG_USE_ONENAND_BOARD_INIT$/;"	d
CONFIG_USE_ONENAND_BOARD_INIT	include/configs/smdkc100.h	/^#define CONFIG_USE_ONENAND_BOARD_INIT$/;"	d
CONFIG_USE_ONENAND_BOARD_INIT	include/configs/vct.h	/^#define CONFIG_USE_ONENAND_BOARD_INIT$/;"	d
CONFIG_USE_PRIVATE_LIBGCC	include/config/auto.conf	/^CONFIG_USE_PRIVATE_LIBGCC=y$/;"	k
CONFIG_USE_PRIVATE_LIBGCC	include/generated/autoconf.h	/^#define CONFIG_USE_PRIVATE_LIBGCC /;"	d
CONFIG_USE_PRIVATE_LIBGCC	lib/Kconfig	/^config USE_PRIVATE_LIBGCC$/;"	c	menu:Library routines
CONFIG_USE_PRIVATE_LIBGCC_MODULE	lib/Kconfig	/^config USE_PRIVATE_LIBGCC$/;"	c	menu:Library routines
CONFIG_USE_SPIFLASH	include/configs/MPC8308RDB.h	/^#define CONFIG_USE_SPIFLASH$/;"	d
CONFIG_USE_SPIFLASH	include/configs/da850evm.h	/^#define CONFIG_USE_SPIFLASH$/;"	d
CONFIG_USE_SPIFLASH	include/configs/ea20.h	/^#define CONFIG_USE_SPIFLASH$/;"	d
CONFIG_USE_TINY_PRINTF	include/config/auto.conf	/^CONFIG_USE_TINY_PRINTF=y$/;"	k
CONFIG_USE_TINY_PRINTF	include/generated/autoconf.h	/^#define CONFIG_USE_TINY_PRINTF /;"	d
CONFIG_USE_TINY_PRINTF	lib/Kconfig	/^config USE_TINY_PRINTF$/;"	c	menu:Library routines
CONFIG_USE_TINY_PRINTF_MODULE	lib/Kconfig	/^config USE_TINY_PRINTF$/;"	c	menu:Library routines
CONFIG_USE_TTY	include/configs/amcc-common.h	/^#define CONFIG_USE_TTY	/;"	d
CONFIG_UTBIPAR_INIT_TBIPA	drivers/qe/uec.c	/^#define CONFIG_UTBIPAR_INIT_TBIPA /;"	d	file:
CONFIG_UT_DM	test/dm/Kconfig	/^config UT_DM$/;"	c
CONFIG_UT_DM_MODULE	test/dm/Kconfig	/^config UT_DM$/;"	c
CONFIG_UT_ENV	test/env/Kconfig	/^config UT_ENV$/;"	c
CONFIG_UT_ENV_MODULE	test/env/Kconfig	/^config UT_ENV$/;"	c
CONFIG_UT_OVERLAY	test/overlay/Kconfig	/^config UT_OVERLAY$/;"	c
CONFIG_UT_OVERLAY_MODULE	test/overlay/Kconfig	/^config UT_OVERLAY$/;"	c
CONFIG_UT_TIME	test/Kconfig	/^config UT_TIME$/;"	c
CONFIG_UT_TIME_MODULE	test/Kconfig	/^config UT_TIME$/;"	c
CONFIG_U_BOOT_HDR_ADDR	drivers/mtd/nand/fsl_ifc_spl.c	/^#define CONFIG_U_BOOT_HDR_ADDR /;"	d	file:
CONFIG_U_BOOT_HDR_SIZE	include/configs/T104xRDB.h	/^#define CONFIG_U_BOOT_HDR_SIZE	/;"	d
CONFIG_U_BOOT_HDR_SIZE	include/configs/ls1021atwr.h	/^#define CONFIG_U_BOOT_HDR_SIZE	/;"	d
CONFIG_U_QE	include/configs/T102xQDS.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_U_QE	include/configs/T102xRDB.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_U_QE	include/configs/T1040QDS.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_U_QE	include/configs/T104xRDB.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_U_QE	include/configs/ls1021aqds.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_U_QE	include/configs/ls1021atwr.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_U_QE	include/configs/ls1043ardb.h	/^#define CONFIG_U_QE$/;"	d
CONFIG_V38B	include/configs/v38b.h	/^#define CONFIG_V38B	/;"	d
CONFIG_VAL	include/linux/kconfig.h	/^#define CONFIG_VAL(/;"	d
CONFIG_VAL(option)	include/autoconf.mk	/^CONFIG_VAL(option)="config_val(option)"$/;"	m
CONFIG_VAL(option)	spl/include/autoconf.mk	/^CONFIG_VAL(option)="config_val(option)"$/;"	m
CONFIG_VAR_SIZE_SPL	include/configs/exynos5420-common.h	/^#define CONFIG_VAR_SIZE_SPL$/;"	d
CONFIG_VCMA9	include/configs/VCMA9.h	/^#define CONFIG_VCMA9	/;"	d
CONFIG_VCO_HZ	arch/blackfin/include/asm/config.h	/^#  define CONFIG_VCO_HZ /;"	d
CONFIG_VCO_MULT	include/configs/bct-brettl2.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf506f-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf518f-ezbrd.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf525-ucr2.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf526-ezbrd.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf527-ad7160-eval.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf527-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf527-sdp.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf533-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf533-stamp.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf537-minotaur.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf537-pnav.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf537-srv1.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf537-stamp.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf538f-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf548-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf561-acvilon.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf561-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/bf609-ezkit.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/blackstamp.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/blackvme.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/br4.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/cm-bf527.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/cm-bf533.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/cm-bf537e.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/cm-bf537u.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/cm-bf548.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/cm-bf561.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/dnp5370.h	/^#define CONFIG_VCO_MULT /;"	d
CONFIG_VCO_MULT	include/configs/ibf-dsp561.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/ip04.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/pr1.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/tcm-bf518.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCO_MULT	include/configs/tcm-bf537.h	/^#define CONFIG_VCO_MULT	/;"	d
CONFIG_VCT_NOR	include/configs/vct.h	/^#define CONFIG_VCT_NOR$/;"	d
CONFIG_VCT_ONENAND	board/micronas/vct/Kconfig	/^config VCT_ONENAND$/;"	c	menu:vct board options
CONFIG_VCT_ONENAND_MODULE	board/micronas/vct/Kconfig	/^config VCT_ONENAND$/;"	c	menu:vct board options
CONFIG_VCT_PLATINUM	board/micronas/vct/Kconfig	/^config VCT_PLATINUM$/;"	c	choice:vct board options""choice5c0ac1440104
CONFIG_VCT_PLATINUMAVC	board/micronas/vct/Kconfig	/^config VCT_PLATINUMAVC$/;"	c	choice:vct board options""choice5c0ac1440104
CONFIG_VCT_PLATINUMAVC_MODULE	board/micronas/vct/Kconfig	/^config VCT_PLATINUMAVC$/;"	c	choice:vct board options""choice5c0ac1440104
CONFIG_VCT_PLATINUM_MODULE	board/micronas/vct/Kconfig	/^config VCT_PLATINUM$/;"	c	choice:vct board options""choice5c0ac1440104
CONFIG_VCT_PREMIUM	board/micronas/vct/Kconfig	/^config VCT_PREMIUM$/;"	c	choice:vct board options""choice5c0ac1440104
CONFIG_VCT_PREMIUM_MODULE	board/micronas/vct/Kconfig	/^config VCT_PREMIUM$/;"	c	choice:vct board options""choice5c0ac1440104
CONFIG_VCT_SMALL_IMAGE	board/micronas/vct/Kconfig	/^config VCT_SMALL_IMAGE$/;"	c	menu:vct board options
CONFIG_VCT_SMALL_IMAGE_MODULE	board/micronas/vct/Kconfig	/^config VCT_SMALL_IMAGE$/;"	c	menu:vct board options
CONFIG_VE8313	include/configs/ve8313.h	/^#define CONFIG_VE8313	/;"	d
CONFIG_VENDOR_ADVANTECH	arch/x86/Kconfig	/^config VENDOR_ADVANTECH$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_ADVANTECH_MODULE	arch/x86/Kconfig	/^config VENDOR_ADVANTECH$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_CONGATEC	arch/x86/Kconfig	/^config VENDOR_CONGATEC$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_CONGATEC_MODULE	arch/x86/Kconfig	/^config VENDOR_CONGATEC$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_COREBOOT	arch/x86/Kconfig	/^config VENDOR_COREBOOT$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_COREBOOT_MODULE	arch/x86/Kconfig	/^config VENDOR_COREBOOT$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_DFI	arch/x86/Kconfig	/^config VENDOR_DFI$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_DFI_MODULE	arch/x86/Kconfig	/^config VENDOR_DFI$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_EFI	arch/x86/Kconfig	/^config VENDOR_EFI$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_EFI_MODULE	arch/x86/Kconfig	/^config VENDOR_EFI$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_EMULATION	arch/x86/Kconfig	/^config VENDOR_EMULATION$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_EMULATION_MODULE	arch/x86/Kconfig	/^config VENDOR_EMULATION$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_GOOGLE	arch/x86/Kconfig	/^config VENDOR_GOOGLE$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_GOOGLE_MODULE	arch/x86/Kconfig	/^config VENDOR_GOOGLE$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_INTEL	arch/x86/Kconfig	/^config VENDOR_INTEL$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VENDOR_INTEL_MODULE	arch/x86/Kconfig	/^config VENDOR_INTEL$/;"	c	choice:x86 architecture""choice0d4dd9280104
CONFIG_VERSION_VARIABLE	common/Kconfig	/^config VERSION_VARIABLE$/;"	c
CONFIG_VERSION_VARIABLE_MODULE	common/Kconfig	/^config VERSION_VARIABLE$/;"	c
CONFIG_VERY_BIG_RAM	arch/arm/include/asm/arch-ls102xa/config.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	arch/xtensa/include/asm/config.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/B4860QDS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/MPC8349ITX.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/MPC8536DS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/MPC8544DS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/MPC8572DS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/MPC8610HPCD.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/MPC8641HPCN.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/P1022DS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/P1023RDB.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/P2041RDB.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T102xQDS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T102xRDB.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T1040QDS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T104xRDB.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T208xQDS.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T208xRDB.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/T4240RDB.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/controlcenterd.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/corenet_ds.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/cyrus.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/dra7xx_evm.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/katmai.h	/^#define	CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/km/kmp204x-common.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/ls1043a_common.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/ls1046a_common.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/ls2080a_common.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/qemu-ppce500.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/sbc8548.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/sbc8641d.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/socrates.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/t4qds.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/xpedite1000.h	/^#define CONFIG_VERY_BIG_RAM	/;"	d
CONFIG_VERY_BIG_RAM	include/configs/xpedite517x.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/xpedite520x.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/xpedite537x.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VERY_BIG_RAM	include/configs/xpedite550x.h	/^#define CONFIG_VERY_BIG_RAM$/;"	d
CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP	include/configs/vexpress_ca15_tc2.h	/^#define CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP$/;"	d
CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP	include/configs/vexpress_ca5x2.h	/^#define CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP$/;"	d
CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP	include/configs/vexpress_ca9x4.h	/^#define CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP$/;"	d
CONFIG_VF610	include/configs/colibri_vf.h	/^#define CONFIG_VF610$/;"	d
CONFIG_VF610	include/configs/pcm052.h	/^#define CONFIG_VF610$/;"	d
CONFIG_VF610	include/configs/vf610twr.h	/^#define CONFIG_VF610$/;"	d
CONFIG_VGA_AS_SINGLE_DEVICE	drivers/video/Kconfig	/^config VGA_AS_SINGLE_DEVICE$/;"	c	menu:Graphics support
CONFIG_VGA_AS_SINGLE_DEVICE	include/config/auto.conf	/^CONFIG_VGA_AS_SINGLE_DEVICE=y$/;"	k
CONFIG_VGA_AS_SINGLE_DEVICE	include/generated/autoconf.h	/^#define CONFIG_VGA_AS_SINGLE_DEVICE /;"	d
CONFIG_VGA_AS_SINGLE_DEVICE_MODULE	drivers/video/Kconfig	/^config VGA_AS_SINGLE_DEVICE$/;"	c	menu:Graphics support
CONFIG_VGA_BIOS_ADDR	arch/x86/Kconfig	/^config VGA_BIOS_ADDR$/;"	c	menu:x86 architecture
CONFIG_VGA_BIOS_ADDR_MODULE	arch/x86/Kconfig	/^config VGA_BIOS_ADDR$/;"	c	menu:x86 architecture
CONFIG_VGA_BIOS_FILE	arch/x86/Kconfig	/^config VGA_BIOS_FILE$/;"	c	menu:x86 architecture
CONFIG_VGA_BIOS_FILE_MODULE	arch/x86/Kconfig	/^config VGA_BIOS_FILE$/;"	c	menu:x86 architecture
CONFIG_VID	include/configs/T208xQDS.h	/^#define CONFIG_VID$/;"	d
CONFIG_VID	include/configs/T208xRDB.h	/^#define CONFIG_VID$/;"	d
CONFIG_VID	include/configs/T4240RDB.h	/^#define CONFIG_VID$/;"	d
CONFIG_VID	include/configs/ls1043aqds.h	/^#define CONFIG_VID$/;"	d
CONFIG_VID	include/configs/ls1046aqds.h	/^#define CONFIG_VID$/;"	d
CONFIG_VID	include/configs/ls2080ardb.h	/^#define CONFIG_VID$/;"	d
CONFIG_VIDCONSOLE_AS_LCD	drivers/video/Kconfig	/^config VIDCONSOLE_AS_LCD$/;"	c	menu:Graphics support
CONFIG_VIDCONSOLE_AS_LCD_MODULE	drivers/video/Kconfig	/^config VIDCONSOLE_AS_LCD$/;"	c	menu:Graphics support
CONFIG_VIDEO	board/sunxi/Kconfig	/^config VIDEO$/;"	c
CONFIG_VIDEO	drivers/video/Kconfig	/^config VIDEO$/;"	c	menu:Graphics support
CONFIG_VIDEO	include/config/auto.conf	/^CONFIG_VIDEO=y$/;"	k
CONFIG_VIDEO	include/generated/autoconf.h	/^#define CONFIG_VIDEO /;"	d
CONFIG_VIDEO_BCM2835	include/configs/rpi.h	/^#define CONFIG_VIDEO_BCM2835$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/brxre1.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/digsy_mtc.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/ipek01.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/m28evk.h	/^#define	CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/m53evk.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/mx23evk.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/mx28evk.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/nitrogen6x.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/s5pc210_universal.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/socrates.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/trats.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_GZIP	include/configs/trats2.h	/^#define CONFIG_VIDEO_BMP_GZIP$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/MPC8610HPCD.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/P1022DS.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/T102xQDS.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/T102xRDB.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/T1040QDS.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/T104xRDB.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/TQM5200.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/advantech_dms-ba16.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/aristainetos-common.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/cgtqmx6eval.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/cm_fx6.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/colibri_imx7.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/digsy_mtc.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/ea20.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/embestmx6boards.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/ge_bx50v3.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/gw_ventana.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/ipek01.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/ls1021aqds.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/ls1021atwr.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/mpc5121ads.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/mx6cuboxi.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/mx6sabre_common.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/mx6sxsabresd.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/mx7dsabresd.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/pxm2.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/rut.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/socrates.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_LOGO	include/configs/wandboard.h	/^#define CONFIG_VIDEO_BMP_LOGO$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/autoconf.mk	/^CONFIG_VIDEO_BMP_RLE8=y$/;"	m
CONFIG_VIDEO_BMP_RLE8	include/configs/advantech_dms-ba16.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/aristainetos-common.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/cgtqmx6eval.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/cm_fx6.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/colibri_imx7.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/ea20.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/embestmx6boards.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/ge_bx50v3.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/icon.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/m28evk.h	/^#define	CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/m53evk.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mcx.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mt_ventoux.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx23evk.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx28evk.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx51evk.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx53loco.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx6cuboxi.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx6sabre_common.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx6sxsabresd.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/mx7dsabresd.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/nitrogen6x.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/novena.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/pdm360ng.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/pxm2.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/rut.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/sandbox.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/tbs2910.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	include/configs/wandboard.h	/^#define CONFIG_VIDEO_BMP_RLE8$/;"	d
CONFIG_VIDEO_BMP_RLE8	spl/include/autoconf.mk	/^CONFIG_VIDEO_BMP_RLE8=y$/;"	m
CONFIG_VIDEO_BPP16	drivers/video/Kconfig	/^config VIDEO_BPP16$/;"	c	menu:Graphics support
CONFIG_VIDEO_BPP16_MODULE	drivers/video/Kconfig	/^config VIDEO_BPP16$/;"	c	menu:Graphics support
CONFIG_VIDEO_BPP32	drivers/video/Kconfig	/^config VIDEO_BPP32$/;"	c	menu:Graphics support
CONFIG_VIDEO_BPP32_MODULE	drivers/video/Kconfig	/^config VIDEO_BPP32$/;"	c	menu:Graphics support
CONFIG_VIDEO_BPP8	drivers/video/Kconfig	/^config VIDEO_BPP8$/;"	c	menu:Graphics support
CONFIG_VIDEO_BPP8_MODULE	drivers/video/Kconfig	/^config VIDEO_BPP8$/;"	c	menu:Graphics support
CONFIG_VIDEO_BRIDGE	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE$/;"	c
CONFIG_VIDEO_BRIDGE_MODULE	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE$/;"	c
CONFIG_VIDEO_BRIDGE_NXP_PTN3460	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE_NXP_PTN3460$/;"	c
CONFIG_VIDEO_BRIDGE_NXP_PTN3460_MODULE	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE_NXP_PTN3460$/;"	c
CONFIG_VIDEO_BRIDGE_PARADE_PS862X	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE_PARADE_PS862X$/;"	c
CONFIG_VIDEO_BRIDGE_PARADE_PS862X_MODULE	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE_PARADE_PS862X$/;"	c
CONFIG_VIDEO_BROADWELL_IGD	drivers/video/Kconfig	/^config VIDEO_BROADWELL_IGD$/;"	c	menu:Graphics support
CONFIG_VIDEO_BROADWELL_IGD_MODULE	drivers/video/Kconfig	/^config VIDEO_BROADWELL_IGD$/;"	c	menu:Graphics support
CONFIG_VIDEO_COMPOSITE	board/sunxi/Kconfig	/^config VIDEO_COMPOSITE$/;"	c
CONFIG_VIDEO_COMPOSITE_MODULE	board/sunxi/Kconfig	/^config VIDEO_COMPOSITE$/;"	c
CONFIG_VIDEO_CORALP	include/configs/digsy_mtc.h	/^#define CONFIG_VIDEO_CORALP$/;"	d
CONFIG_VIDEO_COREBOOT	drivers/video/Kconfig	/^config VIDEO_COREBOOT$/;"	c	menu:Graphics support
CONFIG_VIDEO_COREBOOT_MODULE	drivers/video/Kconfig	/^config VIDEO_COREBOOT$/;"	c	menu:Graphics support
CONFIG_VIDEO_CT69000	drivers/video/Kconfig	/^config VIDEO_CT69000$/;"	c	menu:Graphics support
CONFIG_VIDEO_CT69000_MODULE	drivers/video/Kconfig	/^config VIDEO_CT69000$/;"	c	menu:Graphics support
CONFIG_VIDEO_DA8XX	include/configs/ea20.h	/^#define CONFIG_VIDEO_DA8XX$/;"	d
CONFIG_VIDEO_DA8XX	include/configs/pxm2.h	/^#define CONFIG_VIDEO_DA8XX$/;"	d
CONFIG_VIDEO_DA8XX	include/configs/rut.h	/^#define CONFIG_VIDEO_DA8XX$/;"	d
CONFIG_VIDEO_DT_SIMPLEFB	include/autoconf.mk	/^CONFIG_VIDEO_DT_SIMPLEFB=y$/;"	m
CONFIG_VIDEO_DT_SIMPLEFB	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_DT_SIMPLEFB$/;"	d
CONFIG_VIDEO_DT_SIMPLEFB	spl/include/autoconf.mk	/^CONFIG_VIDEO_DT_SIMPLEFB=y$/;"	m
CONFIG_VIDEO_FONT_4X6	include/configs/sansa_fuze_plus.h	/^#define CONFIG_VIDEO_FONT_4X6$/;"	d
CONFIG_VIDEO_FONT_4X6	include/configs/xfi3.h	/^#define CONFIG_VIDEO_FONT_4X6$/;"	d
CONFIG_VIDEO_HDMI	board/sunxi/Kconfig	/^config VIDEO_HDMI$/;"	c
CONFIG_VIDEO_HDMI	include/config/auto.conf	/^CONFIG_VIDEO_HDMI=y$/;"	k
CONFIG_VIDEO_HDMI	include/generated/autoconf.h	/^#define CONFIG_VIDEO_HDMI /;"	d
CONFIG_VIDEO_HDMI_MODULE	board/sunxi/Kconfig	/^config VIDEO_HDMI$/;"	c
CONFIG_VIDEO_IPUV3	include/configs/advantech_dms-ba16.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/aristainetos-common.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/cgtqmx6eval.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/cm_fx6.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/embestmx6boards.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/ge_bx50v3.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/gw_ventana.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/m53evk.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/mx51evk.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/mx53loco.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/mx6cuboxi.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/mx6sabre_common.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/nitrogen6x.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/novena.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/tbs2910.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IPUV3	include/configs/wandboard.h	/^#define CONFIG_VIDEO_IPUV3$/;"	d
CONFIG_VIDEO_IVYBRIDGE_IGD	drivers/video/Kconfig	/^config VIDEO_IVYBRIDGE_IGD$/;"	c	menu:Graphics support
CONFIG_VIDEO_IVYBRIDGE_IGD_MODULE	drivers/video/Kconfig	/^config VIDEO_IVYBRIDGE_IGD$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_ANX9804	drivers/video/Kconfig	/^config VIDEO_LCD_ANX9804$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_ANX9804_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_ANX9804$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_BL_EN	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_EN$/;"	c
CONFIG_VIDEO_LCD_BL_EN	include/config/auto.conf	/^CONFIG_VIDEO_LCD_BL_EN=""$/;"	k
CONFIG_VIDEO_LCD_BL_EN	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_BL_EN /;"	d
CONFIG_VIDEO_LCD_BL_EN_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_EN$/;"	c
CONFIG_VIDEO_LCD_BL_PWM	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_PWM$/;"	c
CONFIG_VIDEO_LCD_BL_PWM	include/config/auto.conf	/^CONFIG_VIDEO_LCD_BL_PWM=""$/;"	k
CONFIG_VIDEO_LCD_BL_PWM	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_BL_PWM /;"	d
CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_PWM_ACTIVE_LOW$/;"	c
CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW	include/config/auto.conf	/^CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW=y$/;"	k
CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW /;"	d
CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_PWM_ACTIVE_LOW$/;"	c
CONFIG_VIDEO_LCD_BL_PWM_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_PWM$/;"	c
CONFIG_VIDEO_LCD_DCLK_PHASE	board/sunxi/Kconfig	/^config VIDEO_LCD_DCLK_PHASE$/;"	c
CONFIG_VIDEO_LCD_DCLK_PHASE	include/config/auto.conf	/^CONFIG_VIDEO_LCD_DCLK_PHASE=1$/;"	k
CONFIG_VIDEO_LCD_DCLK_PHASE	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_DCLK_PHASE /;"	d
CONFIG_VIDEO_LCD_DCLK_PHASE_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_DCLK_PHASE$/;"	c
CONFIG_VIDEO_LCD_HITACHI_TX18D42VM	drivers/video/Kconfig	/^config VIDEO_LCD_HITACHI_TX18D42VM$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_HITACHI_TX18D42VM_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_HITACHI_TX18D42VM$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_I2C_BUS	include/autoconf.mk	/^CONFIG_VIDEO_LCD_I2C_BUS=-1$/;"	m
CONFIG_VIDEO_LCD_I2C_BUS	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_LCD_I2C_BUS	/;"	d
CONFIG_VIDEO_LCD_I2C_BUS	spl/include/autoconf.mk	/^CONFIG_VIDEO_LCD_I2C_BUS=-1$/;"	m
CONFIG_VIDEO_LCD_IF_LVDS	board/sunxi/Kconfig	/^config VIDEO_LCD_IF_LVDS$/;"	c
CONFIG_VIDEO_LCD_IF_LVDS_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_IF_LVDS$/;"	c
CONFIG_VIDEO_LCD_IF_PARALLEL	board/sunxi/Kconfig	/^config VIDEO_LCD_IF_PARALLEL$/;"	c
CONFIG_VIDEO_LCD_IF_PARALLEL	include/config/auto.conf	/^CONFIG_VIDEO_LCD_IF_PARALLEL=y$/;"	k
CONFIG_VIDEO_LCD_IF_PARALLEL	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_IF_PARALLEL /;"	d
CONFIG_VIDEO_LCD_IF_PARALLEL_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_IF_PARALLEL$/;"	c
CONFIG_VIDEO_LCD_MODE	board/sunxi/Kconfig	/^config VIDEO_LCD_MODE$/;"	c
CONFIG_VIDEO_LCD_MODE	include/config/auto.conf	/^CONFIG_VIDEO_LCD_MODE=""$/;"	k
CONFIG_VIDEO_LCD_MODE	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_MODE /;"	d
CONFIG_VIDEO_LCD_MODE_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_MODE$/;"	c
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_HITACHI_TX18D42VM$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_HITACHI_TX18D42VM$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_I2C	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C$/;"	c
CONFIG_VIDEO_LCD_PANEL_I2C_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C$/;"	c
CONFIG_VIDEO_LCD_PANEL_I2C_SCL	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C_SCL$/;"	c
CONFIG_VIDEO_LCD_PANEL_I2C_SCL_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C_SCL$/;"	c
CONFIG_VIDEO_LCD_PANEL_I2C_SDA	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C_SDA$/;"	c
CONFIG_VIDEO_LCD_PANEL_I2C_SDA_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C_SDA$/;"	c
CONFIG_VIDEO_LCD_PANEL_LVDS	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_LVDS$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_LVDS_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_LVDS$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_PARALLEL	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_PARALLEL$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_PANEL_PARALLEL	include/config/auto.conf	/^CONFIG_VIDEO_LCD_PANEL_PARALLEL=y$/;"	k
CONFIG_VIDEO_LCD_PANEL_PARALLEL	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_PANEL_PARALLEL /;"	d
CONFIG_VIDEO_LCD_PANEL_PARALLEL_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_PARALLEL$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_POWER	board/sunxi/Kconfig	/^config VIDEO_LCD_POWER$/;"	c
CONFIG_VIDEO_LCD_POWER	include/config/auto.conf	/^CONFIG_VIDEO_LCD_POWER=""$/;"	k
CONFIG_VIDEO_LCD_POWER	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_POWER /;"	d
CONFIG_VIDEO_LCD_POWER_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_POWER$/;"	c
CONFIG_VIDEO_LCD_RESET	board/sunxi/Kconfig	/^config VIDEO_LCD_RESET$/;"	c
CONFIG_VIDEO_LCD_RESET	include/config/auto.conf	/^CONFIG_VIDEO_LCD_RESET=""$/;"	k
CONFIG_VIDEO_LCD_RESET	include/generated/autoconf.h	/^#define CONFIG_VIDEO_LCD_RESET /;"	d
CONFIG_VIDEO_LCD_RESET_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_RESET$/;"	c
CONFIG_VIDEO_LCD_SPI_CS	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_CS$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_CS_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_CS$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_MISO	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_MISO$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_MISO_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_MISO$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_MOSI	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_MOSI$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_MOSI_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_MOSI$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_SCLK	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_SCLK$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SPI_SCLK_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_SCLK$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SSD2828	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SSD2828_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SSD2828_RESET	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828_RESET$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SSD2828_RESET_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828_RESET$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SSD2828_TX_CLK	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828_TX_CLK$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_SSD2828_TX_CLK_MODULE	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828_TX_CLK$/;"	c	menu:Graphics support
CONFIG_VIDEO_LCD_TL059WV5C0	board/sunxi/Kconfig	/^config VIDEO_LCD_TL059WV5C0$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LCD_TL059WV5C0_MODULE	board/sunxi/Kconfig	/^config VIDEO_LCD_TL059WV5C0$/;"	c	choice:choicebcdb41430304
CONFIG_VIDEO_LOGO	include/autoconf.mk	/^CONFIG_VIDEO_LOGO=y$/;"	m
CONFIG_VIDEO_LOGO	include/configs/MIP405.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/MPC8536DS.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/MPC8544DS.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/MPC8572DS.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/MPC8610HPCD.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/MPC8641HPCN.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/P1022DS.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/PIP405.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/T102xQDS.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/T102xRDB.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/T1040QDS.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/T104xRDB.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/TQM5200.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/advantech_dms-ba16.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/aristainetos-common.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/cgtqmx6eval.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/cm_fx6.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/colibri_imx7.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/digsy_mtc.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/ea20.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/embestmx6boards.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/ge_bx50v3.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/gw_ventana.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/icon.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/imx31_phycore.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/ipek01.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/ls1021aqds.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/ls1021atwr.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/lwmon5.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/m28evk.h	/^#define	CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/m53evk.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mpc5121ads.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx23evk.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx28evk.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx51evk.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx53loco.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx6cuboxi.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx6sabre_common.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx6sxsabresd.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/mx7dsabresd.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/nokia_rx51.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/novena.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/pdm360ng.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/pxm2.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/rut.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/sequoia.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/socrates.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	include/configs/wandboard.h	/^#define CONFIG_VIDEO_LOGO$/;"	d
CONFIG_VIDEO_LOGO	spl/include/autoconf.mk	/^CONFIG_VIDEO_LOGO=y$/;"	m
CONFIG_VIDEO_MB862xx	include/configs/digsy_mtc.h	/^#define CONFIG_VIDEO_MB862xx$/;"	d
CONFIG_VIDEO_MB862xx	include/configs/ipek01.h	/^#define CONFIG_VIDEO_MB862xx$/;"	d
CONFIG_VIDEO_MB862xx	include/configs/lwmon5.h	/^#define CONFIG_VIDEO_MB862xx$/;"	d
CONFIG_VIDEO_MB862xx	include/configs/socrates.h	/^#define CONFIG_VIDEO_MB862xx$/;"	d
CONFIG_VIDEO_MB862xx_ACCEL	include/configs/digsy_mtc.h	/^#define CONFIG_VIDEO_MB862xx_ACCEL$/;"	d
CONFIG_VIDEO_MB862xx_ACCEL	include/configs/ipek01.h	/^#define CONFIG_VIDEO_MB862xx_ACCEL$/;"	d
CONFIG_VIDEO_MB862xx_ACCEL	include/configs/lwmon5.h	/^#define CONFIG_VIDEO_MB862xx_ACCEL$/;"	d
CONFIG_VIDEO_MB862xx_ACCEL	include/configs/socrates.h	/^#define CONFIG_VIDEO_MB862xx_ACCEL$/;"	d
CONFIG_VIDEO_MODULE	board/sunxi/Kconfig	/^config VIDEO$/;"	c
CONFIG_VIDEO_MODULE	drivers/video/Kconfig	/^config VIDEO$/;"	c	menu:Graphics support
CONFIG_VIDEO_MVEBU	drivers/video/Kconfig	/^config VIDEO_MVEBU$/;"	c	menu:Graphics support
CONFIG_VIDEO_MVEBU_MODULE	drivers/video/Kconfig	/^config VIDEO_MVEBU$/;"	c	menu:Graphics support
CONFIG_VIDEO_MX3	include/configs/imx31_phycore.h	/^#define CONFIG_VIDEO_MX3$/;"	d
CONFIG_VIDEO_MXS	include/configs/colibri_imx7.h	/^#define CONFIG_VIDEO_MXS$/;"	d
CONFIG_VIDEO_MXS	include/configs/mx6sxsabresd.h	/^#define CONFIG_VIDEO_MXS$/;"	d
CONFIG_VIDEO_MXS	include/configs/mx6ul_14x14_evk.h	/^#define CONFIG_VIDEO_MXS$/;"	d
CONFIG_VIDEO_MXS	include/configs/mx7dsabresd.h	/^#define CONFIG_VIDEO_MXS$/;"	d
CONFIG_VIDEO_MXS	include/configs/mxs.h	/^#define CONFIG_VIDEO_MXS$/;"	d
CONFIG_VIDEO_MXS_MODE_SYSTEM	include/configs/sansa_fuze_plus.h	/^#define CONFIG_VIDEO_MXS_MODE_SYSTEM$/;"	d
CONFIG_VIDEO_MXS_MODE_SYSTEM	include/configs/xfi3.h	/^#define CONFIG_VIDEO_MXS_MODE_SYSTEM$/;"	d
CONFIG_VIDEO_OMAP3	include/configs/cm_t35.h	/^#define CONFIG_VIDEO_OMAP3$/;"	d
CONFIG_VIDEO_OMAP3	include/configs/cm_t3517.h	/^#define CONFIG_VIDEO_OMAP3$/;"	d
CONFIG_VIDEO_OMAP3	include/configs/mcx.h	/^#define CONFIG_VIDEO_OMAP3$/;"	d
CONFIG_VIDEO_OMAP3	include/configs/mt_ventoux.h	/^#define CONFIG_VIDEO_OMAP3	/;"	d
CONFIG_VIDEO_OMAP3	include/configs/omap3_beagle.h	/^#define CONFIG_VIDEO_OMAP3	/;"	d
CONFIG_VIDEO_ONBOARD	include/configs/PIP405.h	/^#define CONFIG_VIDEO_ONBOARD	/;"	d
CONFIG_VIDEO_ROCKCHIP	drivers/video/Kconfig	/^config VIDEO_ROCKCHIP$/;"	c	menu:Graphics support
CONFIG_VIDEO_ROCKCHIP_MODULE	drivers/video/Kconfig	/^config VIDEO_ROCKCHIP$/;"	c	menu:Graphics support
CONFIG_VIDEO_SANDBOX_SDL	drivers/video/Kconfig	/^config VIDEO_SANDBOX_SDL$/;"	c	menu:Graphics support
CONFIG_VIDEO_SANDBOX_SDL_MODULE	drivers/video/Kconfig	/^config VIDEO_SANDBOX_SDL$/;"	c	menu:Graphics support
CONFIG_VIDEO_SM501	include/configs/TQM5200.h	/^#define CONFIG_VIDEO_SM501$/;"	d
CONFIG_VIDEO_SM501	include/configs/icon.h	/^#define CONFIG_VIDEO_SM501$/;"	d
CONFIG_VIDEO_SM501_32BPP	include/configs/TQM5200.h	/^#define CONFIG_VIDEO_SM501_32BPP$/;"	d
CONFIG_VIDEO_SM501_32BPP	include/configs/icon.h	/^#define CONFIG_VIDEO_SM501_32BPP$/;"	d
CONFIG_VIDEO_SM501_PCI	include/configs/icon.h	/^#define CONFIG_VIDEO_SM501_PCI$/;"	d
CONFIG_VIDEO_STD_TIMINGS	include/autoconf.mk	/^CONFIG_VIDEO_STD_TIMINGS=y$/;"	m
CONFIG_VIDEO_STD_TIMINGS	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_STD_TIMINGS$/;"	d
CONFIG_VIDEO_STD_TIMINGS	spl/include/autoconf.mk	/^CONFIG_VIDEO_STD_TIMINGS=y$/;"	m
CONFIG_VIDEO_SUNXI	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_SUNXI$/;"	d
CONFIG_VIDEO_SUNXI2	include/autoconf.mk	/^CONFIG_VIDEO_SUNXI2=y$/;"	m
CONFIG_VIDEO_SUNXI2	include/configs/sunxi-common.h	/^#define CONFIG_VIDEO_SUNXI2$/;"	d
CONFIG_VIDEO_SUNXI2	spl/include/autoconf.mk	/^CONFIG_VIDEO_SUNXI2=y$/;"	m
CONFIG_VIDEO_SW_CURSOR	drivers/video/Kconfig	/^config VIDEO_SW_CURSOR$/;"	c	menu:Graphics support
CONFIG_VIDEO_SW_CURSOR	include/config/auto.conf	/^CONFIG_VIDEO_SW_CURSOR=y$/;"	k
CONFIG_VIDEO_SW_CURSOR	include/generated/autoconf.h	/^#define CONFIG_VIDEO_SW_CURSOR /;"	d
CONFIG_VIDEO_SW_CURSOR_MODULE	drivers/video/Kconfig	/^config VIDEO_SW_CURSOR$/;"	c	menu:Graphics support
CONFIG_VIDEO_TEGRA124	drivers/video/Kconfig	/^config VIDEO_TEGRA124$/;"	c	menu:Graphics support
CONFIG_VIDEO_TEGRA124_MODULE	drivers/video/Kconfig	/^config VIDEO_TEGRA124$/;"	c	menu:Graphics support
CONFIG_VIDEO_TEGRA20	drivers/video/Kconfig	/^config VIDEO_TEGRA20$/;"	c	menu:Graphics support
CONFIG_VIDEO_TEGRA20_MODULE	drivers/video/Kconfig	/^config VIDEO_TEGRA20$/;"	c	menu:Graphics support
CONFIG_VIDEO_VCXK	include/configs/eb_cpu5282.h	/^#define CONFIG_VIDEO_VCXK	/;"	d
CONFIG_VIDEO_VESA	drivers/video/Kconfig	/^config VIDEO_VESA$/;"	c	menu:Graphics support
CONFIG_VIDEO_VESA_MODULE	drivers/video/Kconfig	/^config VIDEO_VESA$/;"	c	menu:Graphics support
CONFIG_VIDEO_VGA	board/sunxi/Kconfig	/^config VIDEO_VGA$/;"	c
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN	board/sunxi/Kconfig	/^config VIDEO_VGA_EXTERNAL_DAC_EN$/;"	c
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN_MODULE	board/sunxi/Kconfig	/^config VIDEO_VGA_EXTERNAL_DAC_EN$/;"	c
CONFIG_VIDEO_VGA_MODULE	board/sunxi/Kconfig	/^config VIDEO_VGA$/;"	c
CONFIG_VIDEO_VGA_VIA_LCD	board/sunxi/Kconfig	/^config VIDEO_VGA_VIA_LCD$/;"	c
CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH	board/sunxi/Kconfig	/^config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH$/;"	c
CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH_MODULE	board/sunxi/Kconfig	/^config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH$/;"	c
CONFIG_VIDEO_VGA_VIA_LCD_MODULE	board/sunxi/Kconfig	/^config VIDEO_VGA_VIA_LCD$/;"	c
CONFIG_VID_FLS_ENV	include/configs/T208xQDS.h	/^#define CONFIG_VID_FLS_ENV	/;"	d
CONFIG_VID_FLS_ENV	include/configs/T208xRDB.h	/^#define CONFIG_VID_FLS_ENV	/;"	d
CONFIG_VID_FLS_ENV	include/configs/T4240RDB.h	/^#define CONFIG_VID_FLS_ENV	/;"	d
CONFIG_VID_FLS_ENV	include/configs/ls1043aqds.h	/^#define CONFIG_VID_FLS_ENV	/;"	d
CONFIG_VID_FLS_ENV	include/configs/ls1046aqds.h	/^#define CONFIG_VID_FLS_ENV	/;"	d
CONFIG_VID_FLS_ENV	include/configs/ls2080ardb.h	/^#define CONFIG_VID_FLS_ENV	/;"	d
CONFIG_VME8349	include/configs/vme8349.h	/^#define CONFIG_VME8349	/;"	d
CONFIG_VOL_MONITOR_INA220	include/configs/ls1043aqds.h	/^#define CONFIG_VOL_MONITOR_INA220$/;"	d
CONFIG_VOL_MONITOR_INA220	include/configs/ls1046aqds.h	/^#define CONFIG_VOL_MONITOR_INA220$/;"	d
CONFIG_VOL_MONITOR_IR36021_READ	include/configs/T208xQDS.h	/^#define CONFIG_VOL_MONITOR_IR36021_READ$/;"	d
CONFIG_VOL_MONITOR_IR36021_READ	include/configs/T208xRDB.h	/^#define CONFIG_VOL_MONITOR_IR36021_READ$/;"	d
CONFIG_VOL_MONITOR_IR36021_READ	include/configs/T4240RDB.h	/^#define CONFIG_VOL_MONITOR_IR36021_READ$/;"	d
CONFIG_VOL_MONITOR_IR36021_READ	include/configs/ls2080ardb.h	/^#define CONFIG_VOL_MONITOR_IR36021_READ$/;"	d
CONFIG_VOL_MONITOR_IR36021_SET	include/configs/T208xQDS.h	/^#define CONFIG_VOL_MONITOR_IR36021_SET$/;"	d
CONFIG_VOL_MONITOR_IR36021_SET	include/configs/T208xRDB.h	/^#define CONFIG_VOL_MONITOR_IR36021_SET$/;"	d
CONFIG_VOL_MONITOR_IR36021_SET	include/configs/T4240RDB.h	/^#define CONFIG_VOL_MONITOR_IR36021_SET$/;"	d
CONFIG_VOL_MONITOR_IR36021_SET	include/configs/ls1043aqds.h	/^#define CONFIG_VOL_MONITOR_IR36021_SET$/;"	d
CONFIG_VOL_MONITOR_IR36021_SET	include/configs/ls1046aqds.h	/^#define CONFIG_VOL_MONITOR_IR36021_SET$/;"	d
CONFIG_VOL_MONITOR_IR36021_SET	include/configs/ls2080ardb.h	/^#define CONFIG_VOL_MONITOR_IR36021_SET$/;"	d
CONFIG_VOM405	include/configs/VOM405.h	/^#define CONFIG_VOM405	/;"	d
CONFIG_VR_CTL_CLKBUF	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_VR_CTL_CLKBUF /;"	d	file:
CONFIG_VR_CTL_FREQ	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_VR_CTL_FREQ /;"	d	file:
CONFIG_VR_CTL_VAL	arch/blackfin/cpu/initcode.c	/^# define CONFIG_VR_CTL_VAL /;"	d	file:
CONFIG_VR_CTL_VAL	include/configs/bct-brettl2.h	/^#define CONFIG_VR_CTL_VAL	/;"	d
CONFIG_VR_CTL_VAL	include/configs/bf527-sdp.h	/^#define CONFIG_VR_CTL_VAL	/;"	d
CONFIG_VR_CTL_VAL	include/configs/cm-bf527.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VAL	include/configs/cm-bf533.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VAL	include/configs/cm-bf537e.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VAL	include/configs/cm-bf537u.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VAL	include/configs/cm-bf548.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VAL	include/configs/cm-bf561.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VAL	include/configs/tcm-bf537.h	/^#define CONFIG_VR_CTL_VAL /;"	d
CONFIG_VR_CTL_VLEV	arch/blackfin/cpu/initcode.c	/^#  define CONFIG_VR_CTL_VLEV /;"	d	file:
CONFIG_VSC7385_ENET	include/configs/MPC8308RDB.h	/^#define CONFIG_VSC7385_ENET$/;"	d
CONFIG_VSC7385_ENET	include/configs/MPC8313ERDB.h	/^#define CONFIG_VSC7385_ENET$/;"	d
CONFIG_VSC7385_ENET	include/configs/MPC8349ITX.h	/^#define CONFIG_VSC7385_ENET	/;"	d
CONFIG_VSC7385_ENET	include/configs/MPC837XERDB.h	/^#define CONFIG_VSC7385_ENET$/;"	d
CONFIG_VSC7385_ENET	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_VSC7385_ENET$/;"	d
CONFIG_VSC7385_IMAGE	include/configs/MPC8308RDB.h	/^#define CONFIG_VSC7385_IMAGE	/;"	d
CONFIG_VSC7385_IMAGE	include/configs/MPC8313ERDB.h	/^#define CONFIG_VSC7385_IMAGE	/;"	d
CONFIG_VSC7385_IMAGE	include/configs/MPC8349ITX.h	/^#define CONFIG_VSC7385_IMAGE	/;"	d
CONFIG_VSC7385_IMAGE	include/configs/MPC837XERDB.h	/^#define CONFIG_VSC7385_IMAGE	/;"	d
CONFIG_VSC7385_IMAGE_SIZE	include/configs/MPC8308RDB.h	/^#define CONFIG_VSC7385_IMAGE_SIZE	/;"	d
CONFIG_VSC7385_IMAGE_SIZE	include/configs/MPC8313ERDB.h	/^#define CONFIG_VSC7385_IMAGE_SIZE	/;"	d
CONFIG_VSC7385_IMAGE_SIZE	include/configs/MPC8349ITX.h	/^#define CONFIG_VSC7385_IMAGE_SIZE	/;"	d
CONFIG_VSC7385_IMAGE_SIZE	include/configs/MPC837XERDB.h	/^#define CONFIG_VSC7385_IMAGE_SIZE	/;"	d
CONFIG_VSC7385_IMAGE_SIZE	include/configs/p1_p2_rdb_pc.h	/^#define CONFIG_VSC7385_IMAGE_SIZE	/;"	d
CONFIG_VSC9953	include/configs/T1040QDS.h	/^#define CONFIG_VSC9953$/;"	d
CONFIG_VSC9953	include/configs/T104xRDB.h	/^#define CONFIG_VSC9953$/;"	d
CONFIG_VSC_CROSSBAR	include/configs/B4860QDS.h	/^#define CONFIG_VSC_CROSSBAR$/;"	d
CONFIG_VSC_CROSSBAR	include/configs/T4240QDS.h	/^#define CONFIG_VSC_CROSSBAR$/;"	d
CONFIG_VYBRID_GPIO	drivers/gpio/Kconfig	/^config VYBRID_GPIO$/;"	c	menu:GPIO Support
CONFIG_VYBRID_GPIO_MODULE	drivers/gpio/Kconfig	/^config VYBRID_GPIO$/;"	c	menu:GPIO Support
CONFIG_WALNUT	include/configs/walnut.h	/^#define CONFIG_WALNUT	/;"	d
CONFIG_WATCHDOG	include/configs/MPC8610HPCD.h	/^#define CONFIG_WATCHDOG	/;"	d
CONFIG_WATCHDOG	include/configs/PATI.h	/^#define CONFIG_WATCHDOG	/;"	d
CONFIG_WATCHDOG	include/configs/astro_mcf5373l.h	/^#define CONFIG_WATCHDOG$/;"	d
CONFIG_WATCHDOG	include/configs/ids8313.h	/^#define CONFIG_WATCHDOG	/;"	d
CONFIG_WATCHDOG	include/configs/km/kmp204x-common.h	/^#define CONFIG_WATCHDOG	/;"	d
CONFIG_WATCHDOG_BASEADDR	include/configs/microblaze-generic.h	/^# define CONFIG_WATCHDOG_BASEADDR	/;"	d
CONFIG_WATCHDOG_IRQ	include/configs/microblaze-generic.h	/^# define CONFIG_WATCHDOG_IRQ	/;"	d
CONFIG_WATCHDOG_PRESC	include/configs/km/kmp204x-common.h	/^#define CONFIG_WATCHDOG_PRESC /;"	d
CONFIG_WATCHDOG_RC	include/configs/km/kmp204x-common.h	/^#define CONFIG_WATCHDOG_RC /;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5208EVBE.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5235EVB.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5272C3.h	/^#define CONFIG_WATCHDOG_TIMEOUT /;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M53017EVB.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5329EVB.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5373EVB.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5475EVB.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/M5485EVB.h	/^#define CONFIG_WATCHDOG_TIMEOUT	/;"	d
CONFIG_WATCHDOG_TIMEOUT	include/configs/astro_mcf5373l.h	/^#define CONFIG_WATCHDOG_TIMEOUT /;"	d
CONFIG_WATCHDOG_TIMEOUT_MSECS	drivers/watchdog/imx_watchdog.c	/^#define CONFIG_WATCHDOG_TIMEOUT_MSECS /;"	d	file:
CONFIG_WATCHDOG_TIMEOUT_MSECS	include/configs/bfin_adi_common.h	/^#  define CONFIG_WATCHDOG_TIMEOUT_MSECS /;"	d
CONFIG_WATCHDOG_TIMEOUT_MSECS	include/configs/tqma6_wru4.h	/^#define CONFIG_WATCHDOG_TIMEOUT_MSECS	/;"	d
CONFIG_WATCHDOG_TIMEOUT_MSECS	include/configs/warp.h	/^#define CONFIG_WATCHDOG_TIMEOUT_MSECS /;"	d
CONFIG_WDOG_GPIO_PIN	include/configs/a3m071.h	/^#define CONFIG_WDOG_GPIO_PIN	/;"	d
CONFIG_WDT_BASE	arch/x86/cpu/quark/Kconfig	/^config WDT_BASE$/;"	c
CONFIG_WDT_BASE_MODULE	arch/x86/cpu/quark/Kconfig	/^config WDT_BASE$/;"	c
CONFIG_WD_MAX_RATE	include/configs/lwmon5.h	/^#define CONFIG_WD_MAX_RATE	/;"	d
CONFIG_WD_PERIOD	include/configs/lwmon5.h	/^#define CONFIG_WD_PERIOD	/;"	d
CONFIG_WD_PERIOD	lib/time.c	/^# define CONFIG_WD_PERIOD	/;"	d	file:
CONFIG_WINBOND_W83627	drivers/misc/Kconfig	/^config WINBOND_W83627$/;"	c	menu:Multifunction device drivers
CONFIG_WINBOND_W83627_MODULE	drivers/misc/Kconfig	/^config WINBOND_W83627$/;"	c	menu:Multifunction device drivers
CONFIG_WRU4	board/tqc/tqma6/Kconfig	/^config WRU4$/;"	c	choice:choice3e84a7cc0304
CONFIG_WRU4_MODULE	board/tqc/tqma6/Kconfig	/^config WRU4$/;"	c	choice:choice3e84a7cc0304
CONFIG_X600	include/configs/x600.h	/^#define CONFIG_X600	/;"	d
CONFIG_X86	arch/Kconfig	/^config X86$/;"	c	choice:choice07312ef30104
CONFIG_X86EMU_RAW_IO	include/configs/conga-qeval20-qa3-e3845.h	/^#define CONFIG_X86EMU_RAW_IO$/;"	d
CONFIG_X86EMU_RAW_IO	include/configs/dfi-bt700.h	/^#define CONFIG_X86EMU_RAW_IO$/;"	d
CONFIG_X86EMU_RAW_IO	include/configs/minnowmax.h	/^#define CONFIG_X86EMU_RAW_IO$/;"	d
CONFIG_X86EMU_RAW_IO	include/configs/som-6896.h	/^#define CONFIG_X86EMU_RAW_IO$/;"	d
CONFIG_X86EMU_RAW_IO	include/configs/som-db5800-som-6867.h	/^#define CONFIG_X86EMU_RAW_IO$/;"	d
CONFIG_X86EMU_RAW_IO	include/configs/x86-chromebook.h	/^#define CONFIG_X86EMU_RAW_IO$/;"	d
CONFIG_X86_MODULE	arch/Kconfig	/^config X86$/;"	c	choice:choice07312ef30104
CONFIG_X86_MRC_ADDR	include/configs/x86-chromebook.h	/^#define CONFIG_X86_MRC_ADDR	/;"	d
CONFIG_X86_RAMTEST	arch/x86/Kconfig	/^config X86_RAMTEST$/;"	c	menu:x86 architecture
CONFIG_X86_RAMTEST_MODULE	arch/x86/Kconfig	/^config X86_RAMTEST$/;"	c	menu:x86 architecture
CONFIG_X86_REFCODE_ADDR	include/configs/x86-chromebook.h	/^#define CONFIG_X86_REFCODE_ADDR	/;"	d
CONFIG_X86_REFCODE_RUN_ADDR	include/configs/x86-chromebook.h	/^#define CONFIG_X86_REFCODE_RUN_ADDR	/;"	d
CONFIG_X86_RESET_VECTOR	arch/x86/Kconfig	/^config X86_RESET_VECTOR$/;"	c	menu:x86 architecture
CONFIG_X86_RESET_VECTOR_MODULE	arch/x86/Kconfig	/^config X86_RESET_VECTOR$/;"	c	menu:x86 architecture
CONFIG_X86_TSC_TIMER	drivers/timer/Kconfig	/^config X86_TSC_TIMER$/;"	c	menu:Timer Support
CONFIG_X86_TSC_TIMER_MODULE	drivers/timer/Kconfig	/^config X86_TSC_TIMER$/;"	c	menu:Timer Support
CONFIG_XGI_XG22_BASE	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define CONFIG_XGI_XG22_BASE	/;"	d
CONFIG_XILINX_405	include/configs/xilinx-ppc405-generic.h	/^#define CONFIG_XILINX_405	/;"	d
CONFIG_XILINX_440	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_XILINX_440	/;"	d
CONFIG_XILINX_AXIEMAC	drivers/net/Kconfig	/^config XILINX_AXIEMAC$/;"	c
CONFIG_XILINX_AXIEMAC_MODULE	drivers/net/Kconfig	/^config XILINX_AXIEMAC$/;"	c
CONFIG_XILINX_EMACLITE	drivers/net/Kconfig	/^config XILINX_EMACLITE$/;"	c
CONFIG_XILINX_EMACLITE_MODULE	drivers/net/Kconfig	/^config XILINX_EMACLITE$/;"	c
CONFIG_XILINX_GPIO	include/configs/microblaze-generic.h	/^# define CONFIG_XILINX_GPIO$/;"	d
CONFIG_XILINX_LL_TEMAC	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_XILINX_LL_TEMAC$/;"	d
CONFIG_XILINX_MICROBLAZE0_HW_VER	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_HW_VER$/;"	c
CONFIG_XILINX_MICROBLAZE0_HW_VER_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_HW_VER$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_BARREL	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_BARREL$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_BARREL_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_BARREL$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_DIV	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_DIV$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_DIV_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_DIV$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_HW_MUL$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_HW_MUL$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_MSR_INSTR$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_MSR_INSTR$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_PCMP_INSTR$/;"	c
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR_MODULE	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_PCMP_INSTR$/;"	c
CONFIG_XILINX_PPC440_GENERIC	include/configs/xilinx-ppc440-generic.h	/^#define CONFIG_XILINX_PPC440_GENERIC	/;"	d
CONFIG_XILINX_SPI	drivers/spi/Kconfig	/^config XILINX_SPI$/;"	c	menu:SPI Support
CONFIG_XILINX_SPI_IDLE_VAL	drivers/spi/xilinx_spi.c	/^#define CONFIG_XILINX_SPI_IDLE_VAL	/;"	d	file:
CONFIG_XILINX_SPI_MODULE	drivers/spi/Kconfig	/^config XILINX_SPI$/;"	c	menu:SPI Support
CONFIG_XILINX_TB_WATCHDOG	include/configs/microblaze-generic.h	/^#  define CONFIG_XILINX_TB_WATCHDOG$/;"	d
CONFIG_XILINX_UARTLITE	drivers/serial/Kconfig	/^config XILINX_UARTLITE$/;"	c	menu:Serial drivers
CONFIG_XILINX_UARTLITE_MODULE	drivers/serial/Kconfig	/^config XILINX_UARTLITE$/;"	c	menu:Serial drivers
CONFIG_XIP_ROM_SIZE	arch/x86/Kconfig	/^config XIP_ROM_SIZE$/;"	c	menu:x86 architecture
CONFIG_XIP_ROM_SIZE_MODULE	arch/x86/Kconfig	/^config XIP_ROM_SIZE$/;"	c	menu:x86 architecture
CONFIG_XPEDITE1000	include/configs/xpedite1000.h	/^#define CONFIG_XPEDITE1000	/;"	d
CONFIG_XPEDITE5140	include/configs/xpedite517x.h	/^#define CONFIG_XPEDITE5140	/;"	d
CONFIG_XPEDITE5200	include/configs/xpedite520x.h	/^#define CONFIG_XPEDITE5200	/;"	d
CONFIG_XPEDITE5370	include/configs/xpedite537x.h	/^#define CONFIG_XPEDITE5370	/;"	d
CONFIG_XPEDITE550X	include/configs/xpedite550x.h	/^#define CONFIG_XPEDITE550X	/;"	d
CONFIG_XR16L2751	include/configs/twister.h	/^#define CONFIG_XR16L2751$/;"	d
CONFIG_XTENSA	arch/Kconfig	/^config XTENSA$/;"	c	choice:choice07312ef30104
CONFIG_XTENSA_MODULE	arch/Kconfig	/^config XTENSA$/;"	c	choice:choice07312ef30104
CONFIG_XTFPGA	include/configs/xtfpga.h	/^#define CONFIG_XTFPGA$/;"	d
CONFIG_XTFPGA_KC705	board/cadence/xtfpga/Kconfig	/^config XTFPGA_KC705$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_KC705_MODULE	board/cadence/xtfpga/Kconfig	/^config XTFPGA_KC705$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_LX110	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX110$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_LX110_MODULE	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX110$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_LX200	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX200$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_LX200_MODULE	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX200$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_LX60	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX60$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_LX60_MODULE	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX60$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_ML605	board/cadence/xtfpga/Kconfig	/^config XTFPGA_ML605$/;"	c	choice:choiceab7e29c80104
CONFIG_XTFPGA_ML605_MODULE	board/cadence/xtfpga/Kconfig	/^config XTFPGA_ML605$/;"	c	choice:choiceab7e29c80104
CONFIG_XWAY_SWAP_BYTES	tools/Makefile	/^CONFIG_XWAY_SWAP_BYTES = y$/;"	m
CONFIG_YAFFS2	include/configs/VCMA9.h	/^#define CONFIG_YAFFS2$/;"	d
CONFIG_YAFFS2	include/configs/smdk2410.h	/^#define CONFIG_YAFFS2$/;"	d
CONFIG_YELLOW_LED	include/configs/at91sam9261ek.h	/^#define	CONFIG_YELLOW_LED	/;"	d
CONFIG_YELLOW_LED	include/configs/at91sam9263ek.h	/^#define	CONFIG_YELLOW_LED	/;"	d
CONFIG_YELLOW_LED	include/configs/at91sam9rlek.h	/^#define	CONFIG_YELLOW_LED	/;"	d
CONFIG_YELLOW_LED	include/configs/pm9261.h	/^#define CONFIG_YELLOW_LED	/;"	d
CONFIG_ZBOOT_32	include/configs/x86-common.h	/^#define CONFIG_ZBOOT_32$/;"	d
CONFIG_ZLIB	include/autoconf.mk	/^CONFIG_ZLIB=y$/;"	m
CONFIG_ZLIB	include/config_defaults.h	/^#define CONFIG_ZLIB /;"	d
CONFIG_ZLIB	spl/include/autoconf.mk	/^CONFIG_ZLIB=y$/;"	m
CONFIG_ZLT	drivers/usb/gadget/ci_udc.h	/^#define CONFIG_ZLT	/;"	d
CONFIG_ZM7300	include/configs/B4860QDS.h	/^#define CONFIG_ZM7300$/;"	d
CONFIG_ZYNQMP_USB	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config ZYNQMP_USB$/;"	c
CONFIG_ZYNQMP_USB_MODULE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config ZYNQMP_USB$/;"	c
CONFIG_ZYNQMP_XHCI_LIST	include/configs/xilinx_zynqmp_ep.h	/^#define CONFIG_ZYNQMP_XHCI_LIST /;"	d
CONFIG_ZYNQMP_XHCI_LIST	include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h	/^#define CONFIG_ZYNQMP_XHCI_LIST /;"	d
CONFIG_ZYNQMP_XHCI_LIST	include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h	/^#define CONFIG_ZYNQMP_XHCI_LIST /;"	d
CONFIG_ZYNQMP_XHCI_LIST	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQMP_XHCI_LIST /;"	d
CONFIG_ZYNQ_EEPROM	include/configs/xilinx_zynqmp_ep.h	/^#define CONFIG_ZYNQ_EEPROM$/;"	d
CONFIG_ZYNQ_EEPROM	include/configs/zynq_zc70x.h	/^#define CONFIG_ZYNQ_EEPROM$/;"	d
CONFIG_ZYNQ_EEPROM_BUS	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQ_EEPROM_BUS	/;"	d
CONFIG_ZYNQ_GEM	drivers/net/Kconfig	/^config ZYNQ_GEM$/;"	c
CONFIG_ZYNQ_GEM_EEPROM_ADDR	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQ_GEM_EEPROM_ADDR	/;"	d
CONFIG_ZYNQ_GEM_EEPROM_ADDR	include/configs/zynq_zybo.h	/^#define CONFIG_ZYNQ_GEM_EEPROM_ADDR	/;"	d
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET	/;"	d
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET	include/configs/zynq_zybo.h	/^#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET	/;"	d
CONFIG_ZYNQ_GEM_MODULE	drivers/net/Kconfig	/^config ZYNQ_GEM$/;"	c
CONFIG_ZYNQ_GPIO	drivers/gpio/Kconfig	/^config ZYNQ_GPIO$/;"	c	menu:GPIO Support
CONFIG_ZYNQ_GPIO_MODULE	drivers/gpio/Kconfig	/^config ZYNQ_GPIO$/;"	c	menu:GPIO Support
CONFIG_ZYNQ_I2C0	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQ_I2C0$/;"	d
CONFIG_ZYNQ_I2C0	include/configs/zynq_zc70x.h	/^#define CONFIG_ZYNQ_I2C0$/;"	d
CONFIG_ZYNQ_I2C0	include/configs/zynq_zybo.h	/^#define CONFIG_ZYNQ_I2C0$/;"	d
CONFIG_ZYNQ_I2C1	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQ_I2C1$/;"	d
CONFIG_ZYNQ_I2C1	include/configs/zynq_zybo.h	/^#define CONFIG_ZYNQ_I2C1$/;"	d
CONFIG_ZYNQ_PS_CLK_FREQ	arch/arm/mach-zynq/clk.c	/^# define CONFIG_ZYNQ_PS_CLK_FREQ	/;"	d	file:
CONFIG_ZYNQ_PS_CLK_FREQ	include/configs/zynq_zybo.h	/^#define CONFIG_ZYNQ_PS_CLK_FREQ	/;"	d
CONFIG_ZYNQ_QSPI	drivers/spi/Kconfig	/^config ZYNQ_QSPI$/;"	c	menu:SPI Support
CONFIG_ZYNQ_QSPI_MODULE	drivers/spi/Kconfig	/^config ZYNQ_QSPI$/;"	c	menu:SPI Support
CONFIG_ZYNQ_SDHCI	drivers/mmc/Kconfig	/^config ZYNQ_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_ZYNQ_SDHCI0	include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h	/^#define CONFIG_ZYNQ_SDHCI0$/;"	d
CONFIG_ZYNQ_SDHCI0	include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h	/^#define CONFIG_ZYNQ_SDHCI0$/;"	d
CONFIG_ZYNQ_SDHCI1	include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h	/^#define CONFIG_ZYNQ_SDHCI1$/;"	d
CONFIG_ZYNQ_SDHCI1	include/configs/xilinx_zynqmp_zcu102.h	/^#define CONFIG_ZYNQ_SDHCI1$/;"	d
CONFIG_ZYNQ_SDHCI_MAX_FREQ	include/configs/xilinx_zynqmp.h	/^#  define CONFIG_ZYNQ_SDHCI_MAX_FREQ	/;"	d
CONFIG_ZYNQ_SDHCI_MAX_FREQ	include/configs/xilinx_zynqmp_ep.h	/^#define CONFIG_ZYNQ_SDHCI_MAX_FREQ	/;"	d
CONFIG_ZYNQ_SDHCI_MAX_FREQ	include/configs/zynq-common.h	/^# define CONFIG_ZYNQ_SDHCI_MAX_FREQ	/;"	d
CONFIG_ZYNQ_SDHCI_MIN_FREQ	drivers/mmc/zynq_sdhci.c	/^# define CONFIG_ZYNQ_SDHCI_MIN_FREQ	/;"	d	file:
CONFIG_ZYNQ_SDHCI_MIN_FREQ	include/configs/xilinx_zynqmp_ep.h	/^#define CONFIG_ZYNQ_SDHCI_MIN_FREQ	/;"	d
CONFIG_ZYNQ_SDHCI_MODULE	drivers/mmc/Kconfig	/^config ZYNQ_SDHCI$/;"	c	menu:MMC Host controller Support
CONFIG_ZYNQ_SERIAL	include/configs/xilinx_zynqmp.h	/^#define CONFIG_ZYNQ_SERIAL$/;"	d
CONFIG_ZYNQ_SERIAL	include/configs/zynq-common.h	/^#define CONFIG_ZYNQ_SERIAL$/;"	d
CONFIG_ZYNQ_SPI	drivers/spi/Kconfig	/^config ZYNQ_SPI$/;"	c	menu:SPI Support
CONFIG_ZYNQ_SPI_MODULE	drivers/spi/Kconfig	/^config ZYNQ_SPI$/;"	c	menu:SPI Support
CONFIG_eTSEC_MDIO_BUS	include/configs/MPC8568MDS.h	/^#define CONFIG_eTSEC_MDIO_BUS$/;"	d
CONFIG_prefix	scripts/kconfig/lkc.h	/^static inline const char *CONFIG_prefix(void)$/;"	f	typeref:typename:const char *
CONF_ALLMULTICAST	drivers/usb/eth/mcs7830.c	/^#define CONF_ALLMULTICAST	/;"	d	file:
CONF_BE	arch/mips/include/asm/mipsregs.h	/^#define CONF_BE	/;"	d
CONF_CFG	drivers/usb/eth/mcs7830.c	/^#define CONF_CFG	/;"	d	file:
CONF_CM	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM	/;"	d
CONF_CM_CACHABLE_ACCELERATED	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_ACCELERATED	/;"	d
CONF_CM_CACHABLE_CE	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_CE	/;"	d
CONF_CM_CACHABLE_COW	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_COW	/;"	d
CONF_CM_CACHABLE_CUW	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_CUW	/;"	d
CONF_CM_CACHABLE_NONCOHERENT	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_NONCOHERENT	/;"	d
CONF_CM_CACHABLE_NO_WA	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_NO_WA	/;"	d
CONF_CM_CACHABLE_WA	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CACHABLE_WA	/;"	d
CONF_CM_CMASK	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_CMASK	/;"	d
CONF_CM_UNCACHED	arch/mips/include/asm/mipsregs.h	/^#define CONF_CM_UNCACHED	/;"	d
CONF_CU	arch/mips/include/asm/mipsregs.h	/^#define CONF_CU	/;"	d
CONF_DB	arch/mips/include/asm/mipsregs.h	/^#define CONF_DB	/;"	d
CONF_DC	arch/mips/include/asm/mipsregs.h	/^#define CONF_DC	/;"	d
CONF_EB	arch/mips/include/asm/mipsregs.h	/^#define CONF_EB	/;"	d
CONF_EC	arch/mips/include/asm/mipsregs.h	/^#define CONF_EC	/;"	d
CONF_EM	arch/mips/include/asm/mipsregs.h	/^#define CONF_EM	/;"	d
CONF_EP	arch/mips/include/asm/mipsregs.h	/^#define CONF_EP	/;"	d
CONF_EW	arch/mips/include/asm/mipsregs.h	/^#define CONF_EW	/;"	d
CONF_FDX_ENABLE	drivers/usb/eth/mcs7830.c	/^#define CONF_FDX_ENABLE	/;"	d	file:
CONF_IB	arch/mips/include/asm/mipsregs.h	/^#define CONF_IB	/;"	d
CONF_IC	arch/mips/include/asm/mipsregs.h	/^#define CONF_IC	/;"	d
CONF_MASK	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^#define CONF_MASK	/;"	d	file:
CONF_PROMISCUOUS	drivers/usb/eth/mcs7830.c	/^#define CONF_PROMISCUOUS	/;"	d	file:
CONF_RXENABLE	drivers/usb/eth/mcs7830.c	/^#define CONF_RXENABLE	/;"	d	file:
CONF_SC	arch/mips/include/asm/mipsregs.h	/^#define CONF_SC	/;"	d
CONF_SEL_L	board/keymile/kmp204x/pci.c	/^#define CONF_SEL_L	/;"	d	file:
CONF_SLEEPMODE	drivers/usb/eth/mcs7830.c	/^#define CONF_SLEEPMODE	/;"	d	file:
CONF_SM	arch/mips/include/asm/mipsregs.h	/^#define CONF_SM	/;"	d
CONF_SPEED100	drivers/usb/eth/mcs7830.c	/^#define CONF_SPEED100	/;"	d	file:
CONF_TXENABLE	drivers/usb/eth/mcs7830.c	/^#define CONF_TXENABLE	/;"	d	file:
CONGIG_CMD_STORAGE	include/configs/am3517_crane.h	/^#define CONGIG_CMD_STORAGE$/;"	d
CONGIG_CMD_STORAGE	include/configs/am3517_evm.h	/^#define CONGIG_CMD_STORAGE$/;"	d
CONGIG_CMD_STORAGE	include/configs/omap3_evm.h	/^#define CONGIG_CMD_STORAGE$/;"	d
CONGIG_CMD_STORAGE	include/configs/tao3530.h	/^#define CONGIG_CMD_STORAGE$/;"	d
CONNECTION_CONFIG_PAGE	board/freescale/common/vsc3316_3308.c	/^#define CONNECTION_CONFIG_PAGE	/;"	d	file:
CONN_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CONN_B	/;"	d
CONN_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define CONN_BE	/;"	d
CONSOLE	include/configs/MPC8349ITX.h	/^#define CONSOLE	/;"	d
CONSOLEDEV	include/configs/am57xx_evm.h	/^#define CONSOLEDEV	/;"	d
CONSOLEDEV	include/configs/dra7xx_evm.h	/^#define CONSOLEDEV	/;"	d
CONSOLEDEV	include/configs/omap5_uevm.h	/^#define CONSOLEDEV	/;"	d
CONSOLE_ARG	common/bootm.c	/^#define CONSOLE_ARG /;"	d	file:
CONSOLE_ARG	include/configs/openrisc-generic.h	/^#define CONSOLE_ARG	/;"	d
CONSOLE_ARG_LEN	common/bootm.c	/^#define CONSOLE_ARG_LEN /;"	d	file:
CONSOLE_COLOR_BLACK	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_BLACK	/;"	d	file:
CONSOLE_COLOR_BLACK	include/lcd.h	/^# define CONSOLE_COLOR_BLACK	/;"	d
CONSOLE_COLOR_BLACK	include/lcd.h	/^#define CONSOLE_COLOR_BLACK	/;"	d
CONSOLE_COLOR_BLUE	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_BLUE	/;"	d	file:
CONSOLE_COLOR_BLUE	include/lcd.h	/^# define CONSOLE_COLOR_BLUE	/;"	d
CONSOLE_COLOR_BLUE	include/lcd.h	/^#define CONSOLE_COLOR_BLUE	/;"	d
CONSOLE_COLOR_CYAN	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_CYAN	/;"	d	file:
CONSOLE_COLOR_CYAN	include/lcd.h	/^# define CONSOLE_COLOR_CYAN	/;"	d
CONSOLE_COLOR_CYAN	include/lcd.h	/^#define CONSOLE_COLOR_CYAN	/;"	d
CONSOLE_COLOR_GREEN	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_GREEN	/;"	d	file:
CONSOLE_COLOR_GREEN	include/lcd.h	/^# define CONSOLE_COLOR_GREEN	/;"	d
CONSOLE_COLOR_GREEN	include/lcd.h	/^#define CONSOLE_COLOR_GREEN	/;"	d
CONSOLE_COLOR_GREY	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_GREY	/;"	d	file:
CONSOLE_COLOR_GREY	include/lcd.h	/^# define CONSOLE_COLOR_GREY	/;"	d
CONSOLE_COLOR_GREY	include/lcd.h	/^#define CONSOLE_COLOR_GREY	/;"	d
CONSOLE_COLOR_GREY2	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_GREY2	/;"	d	file:
CONSOLE_COLOR_MAGENTA	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_MAGENTA	/;"	d	file:
CONSOLE_COLOR_MAGENTA	include/lcd.h	/^# define CONSOLE_COLOR_MAGENTA	/;"	d
CONSOLE_COLOR_MAGENTA	include/lcd.h	/^#define CONSOLE_COLOR_MAGENTA	/;"	d
CONSOLE_COLOR_RED	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_RED	/;"	d	file:
CONSOLE_COLOR_RED	include/lcd.h	/^# define CONSOLE_COLOR_RED	/;"	d
CONSOLE_COLOR_RED	include/lcd.h	/^#define CONSOLE_COLOR_RED	/;"	d
CONSOLE_COLOR_WHITE	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_WHITE	/;"	d	file:
CONSOLE_COLOR_WHITE	include/lcd.h	/^# define CONSOLE_COLOR_WHITE	/;"	d
CONSOLE_COLOR_WHITE	include/lcd.h	/^#define CONSOLE_COLOR_WHITE	/;"	d
CONSOLE_COLOR_YELLOW	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLOR_YELLOW	/;"	d	file:
CONSOLE_COLOR_YELLOW	include/lcd.h	/^# define CONSOLE_COLOR_YELLOW	/;"	d
CONSOLE_COLOR_YELLOW	include/lcd.h	/^#define CONSOLE_COLOR_YELLOW	/;"	d
CONSOLE_COLS	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_COLS	/;"	d	file:
CONSOLE_COLS	drivers/video/cfb_console.c	/^#define CONSOLE_COLS	/;"	d	file:
CONSOLE_CONTROL_GUID	include/efi_api.h	/^#define CONSOLE_CONTROL_GUID /;"	d
CONSOLE_DEV	include/configs/advantech_dms-ba16.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/aristainetos.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/aristainetos2.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/aristainetos2b.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/cgtqmx6eval.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/embestmx6boards.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/ge_bx50v3.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/mx6cuboxi.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/mx6qsabreauto.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/mx6sabresd.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/o2dnt-common.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/pcm058.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/tqma6_mba6.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/tqma6_wru4.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/zc5202.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_DEV	include/configs/zc5601.h	/^#define CONSOLE_DEV	/;"	d
CONSOLE_ENV_SETTINGS	include/configs/embestmx6boards.h	/^#define CONSOLE_ENV_SETTINGS /;"	d
CONSOLE_ENV_SETTINGS	include/configs/sunxi-common.h	/^#define CONSOLE_ENV_SETTINGS /;"	d
CONSOLE_EXTRA_INFO	drivers/video/Kconfig	/^config CONSOLE_EXTRA_INFO$/;"	c	menu:Graphics support
CONSOLE_FIFO_RX_ADDR	include/configs/ac14xx.h	/^#define CONSOLE_FIFO_RX_ADDR	/;"	d
CONSOLE_FIFO_RX_ADDR	include/configs/aria.h	/^#define CONSOLE_FIFO_RX_ADDR	/;"	d
CONSOLE_FIFO_RX_ADDR	include/configs/mecp5123.h	/^#define CONSOLE_FIFO_RX_ADDR	/;"	d
CONSOLE_FIFO_RX_ADDR	include/configs/mpc5121ads.h	/^#define CONSOLE_FIFO_RX_ADDR	/;"	d
CONSOLE_FIFO_RX_ADDR	include/configs/pdm360ng.h	/^#define CONSOLE_FIFO_RX_ADDR	/;"	d
CONSOLE_FIFO_RX_SIZE	include/configs/ac14xx.h	/^#define CONSOLE_FIFO_RX_SIZE	/;"	d
CONSOLE_FIFO_RX_SIZE	include/configs/aria.h	/^#define CONSOLE_FIFO_RX_SIZE	/;"	d
CONSOLE_FIFO_RX_SIZE	include/configs/mecp5123.h	/^#define CONSOLE_FIFO_RX_SIZE	/;"	d
CONSOLE_FIFO_RX_SIZE	include/configs/mpc5121ads.h	/^#define CONSOLE_FIFO_RX_SIZE	/;"	d
CONSOLE_FIFO_RX_SIZE	include/configs/pdm360ng.h	/^#define CONSOLE_FIFO_RX_SIZE	/;"	d
CONSOLE_FIFO_TX_ADDR	include/configs/ac14xx.h	/^#define CONSOLE_FIFO_TX_ADDR	/;"	d
CONSOLE_FIFO_TX_ADDR	include/configs/aria.h	/^#define CONSOLE_FIFO_TX_ADDR	/;"	d
CONSOLE_FIFO_TX_ADDR	include/configs/mecp5123.h	/^#define CONSOLE_FIFO_TX_ADDR	/;"	d
CONSOLE_FIFO_TX_ADDR	include/configs/mpc5121ads.h	/^#define CONSOLE_FIFO_TX_ADDR	/;"	d
CONSOLE_FIFO_TX_ADDR	include/configs/pdm360ng.h	/^#define CONSOLE_FIFO_TX_ADDR	/;"	d
CONSOLE_FIFO_TX_SIZE	include/configs/ac14xx.h	/^#define CONSOLE_FIFO_TX_SIZE	/;"	d
CONSOLE_FIFO_TX_SIZE	include/configs/aria.h	/^#define CONSOLE_FIFO_TX_SIZE	/;"	d
CONSOLE_FIFO_TX_SIZE	include/configs/mecp5123.h	/^#define CONSOLE_FIFO_TX_SIZE	/;"	d
CONSOLE_FIFO_TX_SIZE	include/configs/mpc5121ads.h	/^#define CONSOLE_FIFO_TX_SIZE	/;"	d
CONSOLE_FIFO_TX_SIZE	include/configs/pdm360ng.h	/^#define CONSOLE_FIFO_TX_SIZE	/;"	d
CONSOLE_MUX	common/Kconfig	/^config CONSOLE_MUX$/;"	c	menu:Console
CONSOLE_NORMAL	drivers/video/Kconfig	/^config CONSOLE_NORMAL$/;"	c	menu:Graphics support
CONSOLE_RECORD	common/Kconfig	/^config CONSOLE_RECORD$/;"	c	menu:Console
CONSOLE_RECORD_IN_SIZE	common/Kconfig	/^config CONSOLE_RECORD_IN_SIZE$/;"	c	menu:Console
CONSOLE_RECORD_OUT_SIZE	common/Kconfig	/^config CONSOLE_RECORD_OUT_SIZE$/;"	c	menu:Console
CONSOLE_ROTATION	drivers/video/Kconfig	/^config CONSOLE_ROTATION$/;"	c	menu:Graphics support
CONSOLE_ROWS	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_ROWS	/;"	d	file:
CONSOLE_ROWS	drivers/video/cfb_console.c	/^#define CONSOLE_ROWS	/;"	d	file:
CONSOLE_ROW_FIRST	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_ROW_FIRST	/;"	d	file:
CONSOLE_ROW_FIRST	drivers/video/cfb_console.c	/^#define CONSOLE_ROW_FIRST	/;"	d	file:
CONSOLE_ROW_LAST	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_ROW_LAST	/;"	d	file:
CONSOLE_ROW_LAST	drivers/video/cfb_console.c	/^#define CONSOLE_ROW_LAST	/;"	d	file:
CONSOLE_ROW_SECOND	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_ROW_SECOND	/;"	d	file:
CONSOLE_ROW_SECOND	drivers/video/cfb_console.c	/^#define CONSOLE_ROW_SECOND	/;"	d	file:
CONSOLE_ROW_SIZE	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_ROW_SIZE	/;"	d	file:
CONSOLE_ROW_SIZE	drivers/video/cfb_console.c	/^#define CONSOLE_ROW_SIZE	/;"	d	file:
CONSOLE_SCROLL_LINES	drivers/video/Kconfig	/^config CONSOLE_SCROLL_LINES$/;"	c	menu:Graphics support
CONSOLE_SCROLL_SIZE	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_SCROLL_SIZE	/;"	d	file:
CONSOLE_SIZE	arch/powerpc/cpu/mpc8xx/video.c	/^#define CONSOLE_SIZE	/;"	d	file:
CONSOLE_SIZE	drivers/video/cfb_console.c	/^#define CONSOLE_SIZE	/;"	d	file:
CONSOLE_STDIN_SETTINGS	include/configs/embestmx6boards.h	/^#define CONSOLE_STDIN_SETTINGS /;"	d
CONSOLE_STDIN_SETTINGS	include/configs/sunxi-common.h	/^#define CONSOLE_STDIN_SETTINGS /;"	d
CONSOLE_STDOUT_SETTINGS	include/configs/embestmx6boards.h	/^#define CONSOLE_STDOUT_SETTINGS /;"	d
CONSOLE_STDOUT_SETTINGS	include/configs/sunxi-common.h	/^#define CONSOLE_STDOUT_SETTINGS /;"	d
CONSOLE_TRUETYPE	drivers/video/Kconfig	/^config CONSOLE_TRUETYPE$/;"	c	menu:Graphics support
CONSOLE_TRUETYPE_ANKACODER	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_ANKACODER$/;"	c	menu:TrueType Fonts
CONSOLE_TRUETYPE_CANTORAONE	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_CANTORAONE$/;"	c	menu:TrueType Fonts
CONSOLE_TRUETYPE_NIMBUS	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_NIMBUS$/;"	c	menu:TrueType Fonts
CONSOLE_TRUETYPE_RUFSCRIPT	drivers/video/fonts/Kconfig	/^config CONSOLE_TRUETYPE_RUFSCRIPT$/;"	c	menu:TrueType Fonts
CONSOLE_TRUETYPE_SIZE	drivers/video/Kconfig	/^config CONSOLE_TRUETYPE_SIZE$/;"	c	menu:Graphics support
CONS_INDEX	board/birdland/bav335x/Kconfig	/^config CONS_INDEX$/;"	c
CONS_INDEX	board/hisilicon/hikey/Kconfig	/^config CONS_INDEX$/;"	c
CONS_INDEX	board/tcl/sl50/Kconfig	/^config CONS_INDEX$/;"	c
CONS_INDEX	board/ti/am335x/Kconfig	/^config CONS_INDEX$/;"	c
CONS_INDEX	board/ti/am57xx/Kconfig	/^config CONS_INDEX$/;"	c
CONS_INDEX	board/ti/dra7xx/Kconfig	/^config CONS_INDEX$/;"	c
CONS_INDEX	board/vscom/baltos/Kconfig	/^config CONS_INDEX$/;"	c
CONTAINER_ID_TYPE	include/linux/usb/ch9.h	/^#define	CONTAINER_ID_TYPE	/;"	d
CONTEXT_SAVE_SIZE	include/MCD_dma.h	/^#define CONTEXT_SAVE_SIZE	/;"	d
CONTINUE	include/lattice.h	/^#define CONTINUE	/;"	d
CONTRAST_DEFAULT	board/work-microwave/work_92105/work_92105_display.c	/^#define CONTRAST_DEFAULT /;"	d	file:
CONTRIB_CORE1	include/ambapp_ids.h	/^#define CONTRIB_CORE1 /;"	d
CONTRIB_CORE2	include/ambapp_ids.h	/^#define CONTRIB_CORE2 /;"	d
CONTRIB_devices	cmd/ambapp.c	/^static ambapp_device_name CONTRIB_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
CONTRIL_RESVD	drivers/block/ftide020.h	/^#define CONTRIL_RESVD	/;"	d
CONTROL	drivers/net/davinci_emac.h	/^	dv_reg		CONTROL;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
CONTROL	include/usbdescriptors.h	/^#define CONTROL	/;"	d
CONTROL0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CONTROL0_VAL	/;"	d
CONTROL1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CONTROL1_VAL	/;"	d
CONTROL2_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define CONTROL2_VAL	/;"	d
CONTROLLER_CTRL1	include/twl6030.h	/^#define CONTROLLER_CTRL1	/;"	d
CONTROLLER_CTRL1_EN_CHARGER	include/twl6030.h	/^#define CONTROLLER_CTRL1_EN_CHARGER	/;"	d
CONTROLLER_CTRL1_SEL_CHARGER	include/twl6030.h	/^#define CONTROLLER_CTRL1_SEL_CHARGER	/;"	d
CONTROLLER_INT_MASK	include/twl6030.h	/^#define CONTROLLER_INT_MASK	/;"	d
CONTROLLER_STAT1	include/twl6030.h	/^#define CONTROLLER_STAT1	/;"	d
CONTROLLER_WDG	include/twl6030.h	/^#define CONTROLLER_WDG	/;"	d
CONTROL_AERIE	drivers/block/ftide020.h	/^#define CONTROL_AERIE	/;"	d
CONTROL_CONTROL_I2C_2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_CONTROL_I2C_2	/;"	d
CONTROL_CONTROL_JTAG	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_CONTROL_JTAG	/;"	d
CONTROL_CONTROL_SYS	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_CONTROL_SYS	/;"	d
CONTROL_CORE_ID_CODE	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_CORE_ID_CODE	/;"	d
CONTROL_DRE	drivers/block/ftide020.h	/^#define CONTROL_DRE	/;"	d
CONTROL_DTE	drivers/block/ftide020.h	/^#define CONTROL_DTE	/;"	d
CONTROL_E0	drivers/block/ftide020.h	/^#define CONTROL_E0	/;"	d
CONTROL_E1	drivers/block/ftide020.h	/^#define CONTROL_E1	/;"	d
CONTROL_EFUSE_1_OVERRIDE	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_EFUSE_1_OVERRIDE	/;"	d
CONTROL_EFUSE_1_OVERRIDE	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_EFUSE_1_OVERRIDE	/;"	d
CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1	/;"	d
CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1	/;"	d
CONTROL_EFUSE_2_OVERRIDE	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_EFUSE_2_OVERRIDE	/;"	d
CONTROL_EFUSE_2_OVERRIDE	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_EFUSE_2_OVERRIDE	/;"	d
CONTROL_EFUSE_EMAC_LSB	board/compulab/cm_t3517/cm_t3517.c	/^#define CONTROL_EFUSE_EMAC_LSB /;"	d	file:
CONTROL_EFUSE_EMAC_MSB	board/compulab/cm_t3517/cm_t3517.c	/^#define CONTROL_EFUSE_EMAC_MSB /;"	d	file:
CONTROL_ENABLE	drivers/net/cpsw.c	/^#define CONTROL_ENABLE	/;"	d	file:
CONTROL_IDLE	drivers/net/cpsw.c	/^#define CONTROL_IDLE	/;"	d	file:
CONTROL_ID_CODE	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_ID_CODE	/;"	d
CONTROL_ID_CODE	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_ID_CODE	/;"	d
CONTROL_IIE	drivers/block/ftide020.h	/^#define CONTROL_IIE	/;"	d
CONTROL_IRE0	drivers/block/ftide020.h	/^#define CONTROL_IRE0	/;"	d
CONTROL_IRE1	drivers/block/ftide020.h	/^#define CONTROL_IRE1	/;"	d
CONTROL_LPDDR2IO_3_VAL	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_LPDDR2IO_3_VAL	/;"	d
CONTROL_LPDDR2IO_3_VAL	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_LPDDR2IO_3_VAL	/;"	d
CONTROL_LPDDR2IO_SLEW_125PS_DRV8_PULL_DOWN	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_LPDDR2IO_SLEW_125PS_DRV8_PULL_DOWN	/;"	d
CONTROL_LPDDR2IO_SLEW_125PS_DRV8_PULL_DOWN	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_LPDDR2IO_SLEW_125PS_DRV8_PULL_DOWN	/;"	d
CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN	/;"	d
CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN	/;"	d
CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER	arch/arm/include/asm/arch-omap4/omap.h	/^#define CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER	/;"	d
CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER	/;"	d
CONTROL_PADCONF_CAM_D0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D0	/;"	d
CONTROL_PADCONF_CAM_D1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D1	/;"	d
CONTROL_PADCONF_CAM_D10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D10	/;"	d
CONTROL_PADCONF_CAM_D11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D11	/;"	d
CONTROL_PADCONF_CAM_D2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D2	/;"	d
CONTROL_PADCONF_CAM_D3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D3	/;"	d
CONTROL_PADCONF_CAM_D4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D4	/;"	d
CONTROL_PADCONF_CAM_D5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D5	/;"	d
CONTROL_PADCONF_CAM_D6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D6	/;"	d
CONTROL_PADCONF_CAM_D7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D7	/;"	d
CONTROL_PADCONF_CAM_D8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D8	/;"	d
CONTROL_PADCONF_CAM_D9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_D9	/;"	d
CONTROL_PADCONF_CAM_FLD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_FLD	/;"	d
CONTROL_PADCONF_CAM_HS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_HS	/;"	d
CONTROL_PADCONF_CAM_PCLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_PCLK	/;"	d
CONTROL_PADCONF_CAM_STROBE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_STROBE	/;"	d
CONTROL_PADCONF_CAM_VS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_VS	/;"	d
CONTROL_PADCONF_CAM_WEN	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_WEN	/;"	d
CONTROL_PADCONF_CAM_XCLKA	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_XCLKA	/;"	d
CONTROL_PADCONF_CAM_XCLKB	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CAM_XCLKB	/;"	d
CONTROL_PADCONF_CCDC_DATA0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA0	/;"	d
CONTROL_PADCONF_CCDC_DATA1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA1	/;"	d
CONTROL_PADCONF_CCDC_DATA2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA2	/;"	d
CONTROL_PADCONF_CCDC_DATA3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA3	/;"	d
CONTROL_PADCONF_CCDC_DATA4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA4	/;"	d
CONTROL_PADCONF_CCDC_DATA5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA5	/;"	d
CONTROL_PADCONF_CCDC_DATA6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA6	/;"	d
CONTROL_PADCONF_CCDC_DATA7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_DATA7	/;"	d
CONTROL_PADCONF_CCDC_FIELD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_FIELD	/;"	d
CONTROL_PADCONF_CCDC_HD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_HD	/;"	d
CONTROL_PADCONF_CCDC_PCLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_PCLK	/;"	d
CONTROL_PADCONF_CCDC_VD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_VD	/;"	d
CONTROL_PADCONF_CCDC_WEN	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CCDC_WEN	/;"	d
CONTROL_PADCONF_CSI2_DX0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CSI2_DX0	/;"	d
CONTROL_PADCONF_CSI2_DX1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CSI2_DX1	/;"	d
CONTROL_PADCONF_CSI2_DY0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CSI2_DY0	/;"	d
CONTROL_PADCONF_CSI2_DY1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_CSI2_DY1	/;"	d
CONTROL_PADCONF_D2D_ARM9NIRQ	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_ARM9NIRQ	/;"	d
CONTROL_PADCONF_D2D_CLK26MI	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_CLK26MI	/;"	d
CONTROL_PADCONF_D2D_DMAREQ0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_DMAREQ0	/;"	d
CONTROL_PADCONF_D2D_DMAREQ1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_DMAREQ1	/;"	d
CONTROL_PADCONF_D2D_DMAREQ2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_DMAREQ2	/;"	d
CONTROL_PADCONF_D2D_DMAREQ3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_DMAREQ3	/;"	d
CONTROL_PADCONF_D2D_FRINT	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_FRINT	/;"	d
CONTROL_PADCONF_D2D_IDLEACK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_IDLEACK	/;"	d
CONTROL_PADCONF_D2D_IDLEREQ	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_IDLEREQ	/;"	d
CONTROL_PADCONF_D2D_MBUSFLAG	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MBUSFLAG	/;"	d
CONTROL_PADCONF_D2D_MCAD0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD0	/;"	d
CONTROL_PADCONF_D2D_MCAD1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD1	/;"	d
CONTROL_PADCONF_D2D_MCAD10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD10	/;"	d
CONTROL_PADCONF_D2D_MCAD11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD11	/;"	d
CONTROL_PADCONF_D2D_MCAD12	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD12	/;"	d
CONTROL_PADCONF_D2D_MCAD13	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD13	/;"	d
CONTROL_PADCONF_D2D_MCAD14	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD14	/;"	d
CONTROL_PADCONF_D2D_MCAD15	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD15	/;"	d
CONTROL_PADCONF_D2D_MCAD16	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD16	/;"	d
CONTROL_PADCONF_D2D_MCAD17	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD17	/;"	d
CONTROL_PADCONF_D2D_MCAD18	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD18	/;"	d
CONTROL_PADCONF_D2D_MCAD19	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD19	/;"	d
CONTROL_PADCONF_D2D_MCAD2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD2	/;"	d
CONTROL_PADCONF_D2D_MCAD20	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD20	/;"	d
CONTROL_PADCONF_D2D_MCAD21	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD21	/;"	d
CONTROL_PADCONF_D2D_MCAD22	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD22	/;"	d
CONTROL_PADCONF_D2D_MCAD23	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD23	/;"	d
CONTROL_PADCONF_D2D_MCAD24	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD24	/;"	d
CONTROL_PADCONF_D2D_MCAD25	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD25	/;"	d
CONTROL_PADCONF_D2D_MCAD26	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD26	/;"	d
CONTROL_PADCONF_D2D_MCAD27	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD27	/;"	d
CONTROL_PADCONF_D2D_MCAD28	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD28	/;"	d
CONTROL_PADCONF_D2D_MCAD29	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD29	/;"	d
CONTROL_PADCONF_D2D_MCAD3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD3	/;"	d
CONTROL_PADCONF_D2D_MCAD30	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD30	/;"	d
CONTROL_PADCONF_D2D_MCAD31	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD31	/;"	d
CONTROL_PADCONF_D2D_MCAD32	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD32	/;"	d
CONTROL_PADCONF_D2D_MCAD33	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD33	/;"	d
CONTROL_PADCONF_D2D_MCAD34	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD34	/;"	d
CONTROL_PADCONF_D2D_MCAD35	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD35	/;"	d
CONTROL_PADCONF_D2D_MCAD36	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD36	/;"	d
CONTROL_PADCONF_D2D_MCAD4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD4	/;"	d
CONTROL_PADCONF_D2D_MCAD5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD5	/;"	d
CONTROL_PADCONF_D2D_MCAD6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD6	/;"	d
CONTROL_PADCONF_D2D_MCAD7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD7	/;"	d
CONTROL_PADCONF_D2D_MCAD8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD8	/;"	d
CONTROL_PADCONF_D2D_MCAD9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MCAD9	/;"	d
CONTROL_PADCONF_D2D_MREAD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MREAD	/;"	d
CONTROL_PADCONF_D2D_MSTDBY	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MSTDBY	/;"	d
CONTROL_PADCONF_D2D_MWRITE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_MWRITE	/;"	d
CONTROL_PADCONF_D2D_N3GRTCK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_N3GRTCK	/;"	d
CONTROL_PADCONF_D2D_N3GTCK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_N3GTCK	/;"	d
CONTROL_PADCONF_D2D_N3GTDI	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_N3GTDI	/;"	d
CONTROL_PADCONF_D2D_N3GTDO	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_N3GTDO	/;"	d
CONTROL_PADCONF_D2D_N3GTMS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_N3GTMS	/;"	d
CONTROL_PADCONF_D2D_N3GTRST	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_N3GTRST	/;"	d
CONTROL_PADCONF_D2D_NRESPWRON	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_NRESPWRON	/;"	d
CONTROL_PADCONF_D2D_NRESWARM	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_NRESWARM	/;"	d
CONTROL_PADCONF_D2D_SBUSFLAG	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_SBUSFLAG	/;"	d
CONTROL_PADCONF_D2D_SPINT	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_SPINT	/;"	d
CONTROL_PADCONF_D2D_SREAD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_SREAD	/;"	d
CONTROL_PADCONF_D2D_SWAKEUP	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_SWAKEUP	/;"	d
CONTROL_PADCONF_D2D_SWRITE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_SWRITE	/;"	d
CONTROL_PADCONF_D2D_UMA2P6FIQ	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_D2D_UMA2P6FIQ	/;"	d
CONTROL_PADCONF_DSS_ACBIAS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_ACBIAS	/;"	d
CONTROL_PADCONF_DSS_DATA0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA0	/;"	d
CONTROL_PADCONF_DSS_DATA1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA1	/;"	d
CONTROL_PADCONF_DSS_DATA10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA10	/;"	d
CONTROL_PADCONF_DSS_DATA11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA11	/;"	d
CONTROL_PADCONF_DSS_DATA12	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA12	/;"	d
CONTROL_PADCONF_DSS_DATA13	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA13	/;"	d
CONTROL_PADCONF_DSS_DATA14	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA14	/;"	d
CONTROL_PADCONF_DSS_DATA15	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA15	/;"	d
CONTROL_PADCONF_DSS_DATA16	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA16	/;"	d
CONTROL_PADCONF_DSS_DATA17	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA17	/;"	d
CONTROL_PADCONF_DSS_DATA18	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA18	/;"	d
CONTROL_PADCONF_DSS_DATA19	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA19	/;"	d
CONTROL_PADCONF_DSS_DATA2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA2	/;"	d
CONTROL_PADCONF_DSS_DATA20	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA20	/;"	d
CONTROL_PADCONF_DSS_DATA21	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA21	/;"	d
CONTROL_PADCONF_DSS_DATA22	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA22	/;"	d
CONTROL_PADCONF_DSS_DATA23	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA23	/;"	d
CONTROL_PADCONF_DSS_DATA3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA3	/;"	d
CONTROL_PADCONF_DSS_DATA4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA4	/;"	d
CONTROL_PADCONF_DSS_DATA5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA5	/;"	d
CONTROL_PADCONF_DSS_DATA6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA6	/;"	d
CONTROL_PADCONF_DSS_DATA7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA7	/;"	d
CONTROL_PADCONF_DSS_DATA8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA8	/;"	d
CONTROL_PADCONF_DSS_DATA9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_DATA9	/;"	d
CONTROL_PADCONF_DSS_HSYNC	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_HSYNC	/;"	d
CONTROL_PADCONF_DSS_PCLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_PCLK	/;"	d
CONTROL_PADCONF_DSS_VSYNC	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_DSS_VSYNC	/;"	d
CONTROL_PADCONF_ETK_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_CLK	/;"	d
CONTROL_PADCONF_ETK_CLK_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_CLK_ES2	/;"	d
CONTROL_PADCONF_ETK_CTL	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_CTL	/;"	d
CONTROL_PADCONF_ETK_CTL_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_CTL_ES2	/;"	d
CONTROL_PADCONF_ETK_D0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D0	/;"	d
CONTROL_PADCONF_ETK_D0_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D0_ES2	/;"	d
CONTROL_PADCONF_ETK_D1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D1	/;"	d
CONTROL_PADCONF_ETK_D10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D10	/;"	d
CONTROL_PADCONF_ETK_D10_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D10_ES2	/;"	d
CONTROL_PADCONF_ETK_D11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D11	/;"	d
CONTROL_PADCONF_ETK_D11_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D11_ES2	/;"	d
CONTROL_PADCONF_ETK_D12	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D12	/;"	d
CONTROL_PADCONF_ETK_D12_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D12_ES2	/;"	d
CONTROL_PADCONF_ETK_D13	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D13	/;"	d
CONTROL_PADCONF_ETK_D13_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D13_ES2	/;"	d
CONTROL_PADCONF_ETK_D14	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D14	/;"	d
CONTROL_PADCONF_ETK_D14_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D14_ES2	/;"	d
CONTROL_PADCONF_ETK_D15	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D15	/;"	d
CONTROL_PADCONF_ETK_D15_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D15_ES2	/;"	d
CONTROL_PADCONF_ETK_D1_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D1_ES2	/;"	d
CONTROL_PADCONF_ETK_D2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D2	/;"	d
CONTROL_PADCONF_ETK_D2_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D2_ES2	/;"	d
CONTROL_PADCONF_ETK_D3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D3	/;"	d
CONTROL_PADCONF_ETK_D3_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D3_ES2	/;"	d
CONTROL_PADCONF_ETK_D4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D4	/;"	d
CONTROL_PADCONF_ETK_D4_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D4_ES2	/;"	d
CONTROL_PADCONF_ETK_D5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D5	/;"	d
CONTROL_PADCONF_ETK_D5_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D5_ES2	/;"	d
CONTROL_PADCONF_ETK_D6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D6	/;"	d
CONTROL_PADCONF_ETK_D6_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D6_ES2	/;"	d
CONTROL_PADCONF_ETK_D7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D7	/;"	d
CONTROL_PADCONF_ETK_D7_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D7_ES2	/;"	d
CONTROL_PADCONF_ETK_D8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D8	/;"	d
CONTROL_PADCONF_ETK_D8_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D8_ES2	/;"	d
CONTROL_PADCONF_ETK_D9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D9	/;"	d
CONTROL_PADCONF_ETK_D9_ES2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_ETK_D9_ES2	/;"	d
CONTROL_PADCONF_GPIO112	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO112	/;"	d
CONTROL_PADCONF_GPIO113	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO113	/;"	d
CONTROL_PADCONF_GPIO114	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO114	/;"	d
CONTROL_PADCONF_GPIO115	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO115	/;"	d
CONTROL_PADCONF_GPIO126	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO126	/;"	d
CONTROL_PADCONF_GPIO127	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO127	/;"	d
CONTROL_PADCONF_GPIO128	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO128	/;"	d
CONTROL_PADCONF_GPIO129	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPIO129	/;"	d
CONTROL_PADCONF_GPMC_A1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A1	/;"	d
CONTROL_PADCONF_GPMC_A10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A10	/;"	d
CONTROL_PADCONF_GPMC_A11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A11	/;"	d
CONTROL_PADCONF_GPMC_A2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A2	/;"	d
CONTROL_PADCONF_GPMC_A3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A3	/;"	d
CONTROL_PADCONF_GPMC_A4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A4	/;"	d
CONTROL_PADCONF_GPMC_A5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A5	/;"	d
CONTROL_PADCONF_GPMC_A6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A6	/;"	d
CONTROL_PADCONF_GPMC_A7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A7	/;"	d
CONTROL_PADCONF_GPMC_A8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A8	/;"	d
CONTROL_PADCONF_GPMC_A9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_A9	/;"	d
CONTROL_PADCONF_GPMC_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_CLK	/;"	d
CONTROL_PADCONF_GPMC_D0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D0	/;"	d
CONTROL_PADCONF_GPMC_D1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D1	/;"	d
CONTROL_PADCONF_GPMC_D10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D10	/;"	d
CONTROL_PADCONF_GPMC_D11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D11	/;"	d
CONTROL_PADCONF_GPMC_D12	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D12	/;"	d
CONTROL_PADCONF_GPMC_D13	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D13	/;"	d
CONTROL_PADCONF_GPMC_D14	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D14	/;"	d
CONTROL_PADCONF_GPMC_D15	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D15	/;"	d
CONTROL_PADCONF_GPMC_D2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D2	/;"	d
CONTROL_PADCONF_GPMC_D3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D3	/;"	d
CONTROL_PADCONF_GPMC_D4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D4	/;"	d
CONTROL_PADCONF_GPMC_D5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D5	/;"	d
CONTROL_PADCONF_GPMC_D6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D6	/;"	d
CONTROL_PADCONF_GPMC_D7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D7	/;"	d
CONTROL_PADCONF_GPMC_D8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D8	/;"	d
CONTROL_PADCONF_GPMC_D9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_D9	/;"	d
CONTROL_PADCONF_GPMC_NADV_ALE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NADV_ALE	/;"	d
CONTROL_PADCONF_GPMC_NBE0_CLE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NBE0_CLE	/;"	d
CONTROL_PADCONF_GPMC_NBE1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NBE1	/;"	d
CONTROL_PADCONF_GPMC_NCS0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS0	/;"	d
CONTROL_PADCONF_GPMC_NCS1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS1	/;"	d
CONTROL_PADCONF_GPMC_NCS2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS2	/;"	d
CONTROL_PADCONF_GPMC_NCS3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS3	/;"	d
CONTROL_PADCONF_GPMC_NCS4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS4	/;"	d
CONTROL_PADCONF_GPMC_NCS5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS5	/;"	d
CONTROL_PADCONF_GPMC_NCS6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS6	/;"	d
CONTROL_PADCONF_GPMC_NCS7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NCS7	/;"	d
CONTROL_PADCONF_GPMC_NOE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NOE	/;"	d
CONTROL_PADCONF_GPMC_NWE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NWE	/;"	d
CONTROL_PADCONF_GPMC_NWP	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_NWP	/;"	d
CONTROL_PADCONF_GPMC_WAIT0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_WAIT0	/;"	d
CONTROL_PADCONF_GPMC_WAIT1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_WAIT1	/;"	d
CONTROL_PADCONF_GPMC_WAIT2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_WAIT2	/;"	d
CONTROL_PADCONF_GPMC_WAIT3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_GPMC_WAIT3	/;"	d
CONTROL_PADCONF_HDQ_SIO	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HDQ_SIO	/;"	d
CONTROL_PADCONF_HECC1_RXD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HECC1_RXD	/;"	d
CONTROL_PADCONF_HECC1_TXD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HECC1_TXD	/;"	d
CONTROL_PADCONF_HSUSB0_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_CLK	/;"	d
CONTROL_PADCONF_HSUSB0_DATA0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA0	/;"	d
CONTROL_PADCONF_HSUSB0_DATA1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA1	/;"	d
CONTROL_PADCONF_HSUSB0_DATA2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA2	/;"	d
CONTROL_PADCONF_HSUSB0_DATA3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA3	/;"	d
CONTROL_PADCONF_HSUSB0_DATA4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA4	/;"	d
CONTROL_PADCONF_HSUSB0_DATA5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA5	/;"	d
CONTROL_PADCONF_HSUSB0_DATA6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA6	/;"	d
CONTROL_PADCONF_HSUSB0_DATA7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DATA7	/;"	d
CONTROL_PADCONF_HSUSB0_DIR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_DIR	/;"	d
CONTROL_PADCONF_HSUSB0_NXT	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_NXT	/;"	d
CONTROL_PADCONF_HSUSB0_STP	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_HSUSB0_STP	/;"	d
CONTROL_PADCONF_I2C1_SCL	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C1_SCL	/;"	d
CONTROL_PADCONF_I2C1_SDA	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C1_SDA	/;"	d
CONTROL_PADCONF_I2C2_SCL	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C2_SCL	/;"	d
CONTROL_PADCONF_I2C2_SDA	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C2_SDA	/;"	d
CONTROL_PADCONF_I2C3_SCL	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C3_SCL	/;"	d
CONTROL_PADCONF_I2C3_SDA	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C3_SDA	/;"	d
CONTROL_PADCONF_I2C4_SCL	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C4_SCL	/;"	d
CONTROL_PADCONF_I2C4_SDA	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_I2C4_SDA	/;"	d
CONTROL_PADCONF_JTAG_EMU0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_EMU0	/;"	d
CONTROL_PADCONF_JTAG_EMU1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_EMU1	/;"	d
CONTROL_PADCONF_JTAG_NTRST	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_NTRST	/;"	d
CONTROL_PADCONF_JTAG_RTCK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_RTCK	/;"	d
CONTROL_PADCONF_JTAG_TCK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_TCK	/;"	d
CONTROL_PADCONF_JTAG_TDI	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_TDI	/;"	d
CONTROL_PADCONF_JTAG_TDO	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_TDO	/;"	d
CONTROL_PADCONF_JTAG_TMS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_JTAG_TMS	/;"	d
CONTROL_PADCONF_MCBSP1_CLKR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP1_CLKR	/;"	d
CONTROL_PADCONF_MCBSP1_CLKX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP1_CLKX	/;"	d
CONTROL_PADCONF_MCBSP1_DR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP1_DR	/;"	d
CONTROL_PADCONF_MCBSP1_DX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP1_DX	/;"	d
CONTROL_PADCONF_MCBSP1_FSR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP1_FSR	/;"	d
CONTROL_PADCONF_MCBSP1_FSX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP1_FSX	/;"	d
CONTROL_PADCONF_MCBSP2_CLKX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP2_CLKX	/;"	d
CONTROL_PADCONF_MCBSP2_DR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP2_DR	/;"	d
CONTROL_PADCONF_MCBSP2_DX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP2_DX	/;"	d
CONTROL_PADCONF_MCBSP2_FSX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP2_FSX	/;"	d
CONTROL_PADCONF_MCBSP3_CLKX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP3_CLKX	/;"	d
CONTROL_PADCONF_MCBSP3_DR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP3_DR	/;"	d
CONTROL_PADCONF_MCBSP3_DX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP3_DX	/;"	d
CONTROL_PADCONF_MCBSP3_FSX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP3_FSX	/;"	d
CONTROL_PADCONF_MCBSP4_CLKX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP4_CLKX	/;"	d
CONTROL_PADCONF_MCBSP4_DR	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP4_DR	/;"	d
CONTROL_PADCONF_MCBSP4_DX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP4_DX	/;"	d
CONTROL_PADCONF_MCBSP4_FSX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP4_FSX	/;"	d
CONTROL_PADCONF_MCBSP_CLKS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCBSP_CLKS	/;"	d
CONTROL_PADCONF_MCSPI1_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_CLK	/;"	d
CONTROL_PADCONF_MCSPI1_CS0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_CS0	/;"	d
CONTROL_PADCONF_MCSPI1_CS1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_CS1	/;"	d
CONTROL_PADCONF_MCSPI1_CS2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_CS2	/;"	d
CONTROL_PADCONF_MCSPI1_CS3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_CS3	/;"	d
CONTROL_PADCONF_MCSPI1_SIMO	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_SIMO	/;"	d
CONTROL_PADCONF_MCSPI1_SOMI	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI1_SOMI	/;"	d
CONTROL_PADCONF_MCSPI2_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI2_CLK	/;"	d
CONTROL_PADCONF_MCSPI2_CS0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI2_CS0	/;"	d
CONTROL_PADCONF_MCSPI2_CS1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI2_CS1	/;"	d
CONTROL_PADCONF_MCSPI2_SIMO	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI2_SIMO	/;"	d
CONTROL_PADCONF_MCSPI2_SOMI	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MCSPI2_SOMI	/;"	d
CONTROL_PADCONF_MMC1_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_CLK	/;"	d
CONTROL_PADCONF_MMC1_CMD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_CMD	/;"	d
CONTROL_PADCONF_MMC1_DAT0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT0	/;"	d
CONTROL_PADCONF_MMC1_DAT1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT1	/;"	d
CONTROL_PADCONF_MMC1_DAT2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT2	/;"	d
CONTROL_PADCONF_MMC1_DAT3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT3	/;"	d
CONTROL_PADCONF_MMC1_DAT4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT4	/;"	d
CONTROL_PADCONF_MMC1_DAT5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT5	/;"	d
CONTROL_PADCONF_MMC1_DAT6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT6	/;"	d
CONTROL_PADCONF_MMC1_DAT7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC1_DAT7	/;"	d
CONTROL_PADCONF_MMC2_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_CLK	/;"	d
CONTROL_PADCONF_MMC2_CMD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_CMD	/;"	d
CONTROL_PADCONF_MMC2_DAT0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT0	/;"	d
CONTROL_PADCONF_MMC2_DAT1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT1	/;"	d
CONTROL_PADCONF_MMC2_DAT2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT2	/;"	d
CONTROL_PADCONF_MMC2_DAT3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT3	/;"	d
CONTROL_PADCONF_MMC2_DAT4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT4	/;"	d
CONTROL_PADCONF_MMC2_DAT5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT5	/;"	d
CONTROL_PADCONF_MMC2_DAT6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT6	/;"	d
CONTROL_PADCONF_MMC2_DAT7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_MMC2_DAT7	/;"	d
CONTROL_PADCONF_RMII_50MHZ_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_50MHZ_CLK	/;"	d
CONTROL_PADCONF_RMII_CRS_DV	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_CRS_DV	/;"	d
CONTROL_PADCONF_RMII_MDIO_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_MDIO_CLK	/;"	d
CONTROL_PADCONF_RMII_MDIO_DATA	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_MDIO_DATA	/;"	d
CONTROL_PADCONF_RMII_RXD0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_RXD0	/;"	d
CONTROL_PADCONF_RMII_RXD1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_RXD1	/;"	d
CONTROL_PADCONF_RMII_RXER	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_RXER	/;"	d
CONTROL_PADCONF_RMII_TXD0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_TXD0	/;"	d
CONTROL_PADCONF_RMII_TXD1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_TXD1	/;"	d
CONTROL_PADCONF_RMII_TXEN	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_RMII_TXEN	/;"	d
CONTROL_PADCONF_SDRC_A0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A0	/;"	d
CONTROL_PADCONF_SDRC_A1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A1	/;"	d
CONTROL_PADCONF_SDRC_A10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A10	/;"	d
CONTROL_PADCONF_SDRC_A11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A11	/;"	d
CONTROL_PADCONF_SDRC_A12	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A12	/;"	d
CONTROL_PADCONF_SDRC_A13	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A13	/;"	d
CONTROL_PADCONF_SDRC_A14	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A14	/;"	d
CONTROL_PADCONF_SDRC_A2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A2	/;"	d
CONTROL_PADCONF_SDRC_A3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A3	/;"	d
CONTROL_PADCONF_SDRC_A4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A4	/;"	d
CONTROL_PADCONF_SDRC_A5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A5	/;"	d
CONTROL_PADCONF_SDRC_A6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A6	/;"	d
CONTROL_PADCONF_SDRC_A7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A7	/;"	d
CONTROL_PADCONF_SDRC_A8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A8	/;"	d
CONTROL_PADCONF_SDRC_A9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_A9	/;"	d
CONTROL_PADCONF_SDRC_BA0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_BA0	/;"	d
CONTROL_PADCONF_SDRC_BA1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_BA1	/;"	d
CONTROL_PADCONF_SDRC_CKE0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_CKE0	/;"	d
CONTROL_PADCONF_SDRC_CKE1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_CKE1	/;"	d
CONTROL_PADCONF_SDRC_CLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_CLK	/;"	d
CONTROL_PADCONF_SDRC_D0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D0	/;"	d
CONTROL_PADCONF_SDRC_D1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D1	/;"	d
CONTROL_PADCONF_SDRC_D10	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D10	/;"	d
CONTROL_PADCONF_SDRC_D11	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D11	/;"	d
CONTROL_PADCONF_SDRC_D12	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D12	/;"	d
CONTROL_PADCONF_SDRC_D13	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D13	/;"	d
CONTROL_PADCONF_SDRC_D14	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D14	/;"	d
CONTROL_PADCONF_SDRC_D15	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D15	/;"	d
CONTROL_PADCONF_SDRC_D16	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D16	/;"	d
CONTROL_PADCONF_SDRC_D17	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D17	/;"	d
CONTROL_PADCONF_SDRC_D18	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D18	/;"	d
CONTROL_PADCONF_SDRC_D19	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D19	/;"	d
CONTROL_PADCONF_SDRC_D2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D2	/;"	d
CONTROL_PADCONF_SDRC_D20	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D20	/;"	d
CONTROL_PADCONF_SDRC_D21	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D21	/;"	d
CONTROL_PADCONF_SDRC_D22	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D22	/;"	d
CONTROL_PADCONF_SDRC_D23	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D23	/;"	d
CONTROL_PADCONF_SDRC_D24	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D24	/;"	d
CONTROL_PADCONF_SDRC_D25	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D25	/;"	d
CONTROL_PADCONF_SDRC_D26	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D26	/;"	d
CONTROL_PADCONF_SDRC_D27	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D27	/;"	d
CONTROL_PADCONF_SDRC_D28	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D28	/;"	d
CONTROL_PADCONF_SDRC_D29	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D29	/;"	d
CONTROL_PADCONF_SDRC_D3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D3	/;"	d
CONTROL_PADCONF_SDRC_D30	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D30	/;"	d
CONTROL_PADCONF_SDRC_D31	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D31	/;"	d
CONTROL_PADCONF_SDRC_D4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D4	/;"	d
CONTROL_PADCONF_SDRC_D5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D5	/;"	d
CONTROL_PADCONF_SDRC_D6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D6	/;"	d
CONTROL_PADCONF_SDRC_D7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D7	/;"	d
CONTROL_PADCONF_SDRC_D8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D8	/;"	d
CONTROL_PADCONF_SDRC_D9	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_D9	/;"	d
CONTROL_PADCONF_SDRC_DM0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DM0	/;"	d
CONTROL_PADCONF_SDRC_DM1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DM1	/;"	d
CONTROL_PADCONF_SDRC_DM2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DM2	/;"	d
CONTROL_PADCONF_SDRC_DM3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DM3	/;"	d
CONTROL_PADCONF_SDRC_DQS0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS0	/;"	d
CONTROL_PADCONF_SDRC_DQS0N	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS0N	/;"	d
CONTROL_PADCONF_SDRC_DQS1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS1	/;"	d
CONTROL_PADCONF_SDRC_DQS1N	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS1N	/;"	d
CONTROL_PADCONF_SDRC_DQS2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS2	/;"	d
CONTROL_PADCONF_SDRC_DQS2N	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS2N	/;"	d
CONTROL_PADCONF_SDRC_DQS3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS3	/;"	d
CONTROL_PADCONF_SDRC_DQS3N	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_DQS3N	/;"	d
CONTROL_PADCONF_SDRC_NCAS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_NCAS	/;"	d
CONTROL_PADCONF_SDRC_NCLK	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_NCLK	/;"	d
CONTROL_PADCONF_SDRC_NCS0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_NCS0	/;"	d
CONTROL_PADCONF_SDRC_NCS1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_NCS1	/;"	d
CONTROL_PADCONF_SDRC_NRAS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_NRAS	/;"	d
CONTROL_PADCONF_SDRC_NWE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SDRC_NWE	/;"	d
CONTROL_PADCONF_STRBEN_DLY0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_STRBEN_DLY0	/;"	d
CONTROL_PADCONF_STRBEN_DLY1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_STRBEN_DLY1	/;"	d
CONTROL_PADCONF_SYS_32K	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_32K	/;"	d
CONTROL_PADCONF_SYS_BOOT0	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT0	/;"	d
CONTROL_PADCONF_SYS_BOOT1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT1	/;"	d
CONTROL_PADCONF_SYS_BOOT2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT2	/;"	d
CONTROL_PADCONF_SYS_BOOT3	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT3	/;"	d
CONTROL_PADCONF_SYS_BOOT4	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT4	/;"	d
CONTROL_PADCONF_SYS_BOOT5	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT5	/;"	d
CONTROL_PADCONF_SYS_BOOT6	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT6	/;"	d
CONTROL_PADCONF_SYS_BOOT7	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT7	/;"	d
CONTROL_PADCONF_SYS_BOOT8	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_BOOT8	/;"	d
CONTROL_PADCONF_SYS_CLKOUT1	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_CLKOUT1	/;"	d
CONTROL_PADCONF_SYS_CLKOUT2	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_CLKOUT2	/;"	d
CONTROL_PADCONF_SYS_CLKREQ	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_CLKREQ	/;"	d
CONTROL_PADCONF_SYS_NIRQ	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_NIRQ	/;"	d
CONTROL_PADCONF_SYS_NRESWARM	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_NRESWARM	/;"	d
CONTROL_PADCONF_SYS_OFF_MODE	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_SYS_OFF_MODE	/;"	d
CONTROL_PADCONF_UART1_CTS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART1_CTS	/;"	d
CONTROL_PADCONF_UART1_RTS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART1_RTS	/;"	d
CONTROL_PADCONF_UART1_RX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART1_RX	/;"	d
CONTROL_PADCONF_UART1_TX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART1_TX	/;"	d
CONTROL_PADCONF_UART2_CTS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART2_CTS	/;"	d
CONTROL_PADCONF_UART2_RTS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART2_RTS	/;"	d
CONTROL_PADCONF_UART2_RX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART2_RX	/;"	d
CONTROL_PADCONF_UART2_TX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART2_TX	/;"	d
CONTROL_PADCONF_UART3_CTS_RCTX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART3_CTS_RCTX	/;"	d
CONTROL_PADCONF_UART3_RTS_SD	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART3_RTS_SD	/;"	d
CONTROL_PADCONF_UART3_RX_IRRX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART3_RX_IRRX	/;"	d
CONTROL_PADCONF_UART3_TX_IRTX	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_UART3_TX_IRTX	/;"	d
CONTROL_PADCONF_USB0_DRVBUS	arch/arm/include/asm/arch-omap3/mux.h	/^#define CONTROL_PADCONF_USB0_DRVBUS	/;"	d
CONTROL_RAEIE	drivers/block/ftide020.h	/^#define CONTROL_RAEIE	/;"	d
CONTROL_REGISTER_W1C_MASK	include/usb/ehci-ci.h	/^#define CONTROL_REGISTER_W1C_MASK /;"	d
CONTROL_RESVD_DW0	drivers/block/ftide020.h	/^#define CONTROL_RESVD_DW0	/;"	d
CONTROL_RESVD_DW1	drivers/block/ftide020.h	/^#define CONTROL_RESVD_DW1	/;"	d
CONTROL_RESVD_ECC0	drivers/block/ftide020.h	/^#define CONTROL_RESVD_ECC0	/;"	d
CONTROL_RESVD_ECC1	drivers/block/ftide020.h	/^#define CONTROL_RESVD_ECC1	/;"	d
CONTROL_RESVD_FIRQ	drivers/block/ftide020.h	/^#define CONTROL_RESVD_FIRQ	/;"	d
CONTROL_RESVD_SE0	drivers/block/ftide020.h	/^#define CONTROL_RESVD_SE0	/;"	d
CONTROL_RESVD_SE1	drivers/block/ftide020.h	/^#define CONTROL_RESVD_SE1	/;"	d
CONTROL_RESVD_WP0	drivers/block/ftide020.h	/^#define CONTROL_RESVD_WP0	/;"	d
CONTROL_RESVD_WP1	drivers/block/ftide020.h	/^#define CONTROL_RESVD_WP1	/;"	d
CONTROL_RNEIE	drivers/block/ftide020.h	/^#define CONTROL_RNEIE	/;"	d
CONTROL_RST	drivers/block/ftide020.h	/^#define CONTROL_RST	/;"	d
CONTROL_SMART1NOPMIO_PADCONF_0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_SMART1NOPMIO_PADCONF_0	/;"	d
CONTROL_SMART1NOPMIO_PADCONF_1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_SMART1NOPMIO_PADCONF_1	/;"	d
CONTROL_SPARE_R	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_SPARE_R	/;"	d
CONTROL_SPARE_RW	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_SPARE_RW	/;"	d
CONTROL_SPARE_R_C0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_SPARE_R_C0	/;"	d
CONTROL_SRST	drivers/block/ftide020.h	/^#define CONTROL_SRST	/;"	d
CONTROL_STATUS	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define CONTROL_STATUS	/;"	d	file:
CONTROL_STATUS	arch/arm/include/asm/arch-omap3/cpu.h	/^#define CONTROL_STATUS	/;"	d
CONTROL_T	drivers/block/ftide020.h	/^#define CONTROL_T	/;"	d
CONTROL_TERIE	drivers/block/ftide020.h	/^#define CONTROL_TERIE	/;"	d
CONTROL_TYP0	drivers/block/ftide020.h	/^#define CONTROL_TYP0(/;"	d
CONTROL_TYP1	drivers/block/ftide020.h	/^#define CONTROL_TYP1(/;"	d
CONTROL_TYPE_PIO	drivers/block/ftide020.h	/^#define CONTROL_TYPE_PIO	/;"	d
CONTROL_TYPE_UDMA	drivers/block/ftide020.h	/^#define CONTROL_TYPE_UDMA	/;"	d
CONTROL_WAFIE	drivers/block/ftide020.h	/^#define CONTROL_WAFIE	/;"	d
CONTROL_WKUP_CTRL	board/logicpd/omap3som/omap3logic.c	/^#define CONTROL_WKUP_CTRL	/;"	d	file:
CONTROL_WKUP_CTRL	board/pandora/pandora.c	/^#define CONTROL_WKUP_CTRL	/;"	d	file:
CONTROL_WKUP_ID_CODE	arch/arm/include/asm/arch-omap5/omap.h	/^#define CONTROL_WKUP_ID_CODE	/;"	d
CONTROL_WKUP_PAD1_FREF_CLK4_REQ	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_WKUP_PAD1_FREF_CLK4_REQ	/;"	d
CONTROL_WNFIE	drivers/block/ftide020.h	/^#define CONTROL_WNFIE	/;"	d
CONTROL_XTAL_OSCILLATOR	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CONTROL_XTAL_OSCILLATOR	/;"	d
CON_ACTIVE	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define CON_ACTIVE	/;"	d
CON_MASK	drivers/gpio/s5p_gpio.c	/^#define CON_MASK(/;"	d	file:
CON_RESET	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define CON_RESET	/;"	d
CON_SFR	drivers/gpio/s5p_gpio.c	/^#define CON_SFR(/;"	d	file:
CON_SFR_UNSHIFT	drivers/gpio/s5p_gpio.c	/^#define CON_SFR_UNSHIFT(/;"	d	file:
CON_TXCH_PAUSE	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define CON_TXCH_PAUSE	/;"	d
CON_TXFIFO_FULL	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define CON_TXFIFO_FULL	/;"	d
CON_XCVR_REF_CLK	board/freescale/bsc9132qds/bsc9132qds.c	/^#define CON_XCVR_REF_CLK	/;"	d	file:
COOKIE2CONFIG	include/altera.h	/^#define COOKIE2CONFIG(/;"	d
COOKIE2DONE	include/altera.h	/^#define COOKIE2DONE(/;"	d
COOKIE2SPI_BUS	include/altera.h	/^#define COOKIE2SPI_BUS(/;"	d
COOKIE2SPI_DEV	include/altera.h	/^#define COOKIE2SPI_DEV(/;"	d
COPY	lib/zlib/inflate.h	/^        COPY,       \/* i\/o: waiting for input or output to copy stored block *\/$/;"	e	enum:__anon43d5a4c40103
COPY2_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define COPY2_RATIO	/;"	d
COPY2_RATIO	board/samsung/trats/setup.h	/^#define COPY2_RATIO	/;"	d
COPY4	fs/jffs2/compr_lzo.c	/^#define COPY4(/;"	d	file:
COPY4	lib/lzo/lzo1x_decompress.c	/^#define COPY4(/;"	d	file:
COPYBACK_DISABLE	drivers/mtd/nand/denali.h	/^#define COPYBACK_DISABLE	/;"	d
COPYBACK_DISABLE__FLAG	drivers/mtd/nand/denali.h	/^#define     COPYBACK_DISABLE__FLAG	/;"	d
COPYBACK_MODE	drivers/mtd/nand/denali.h	/^#define COPYBACK_MODE	/;"	d
COPYBACK_MODE__VALUE	drivers/mtd/nand/denali.h	/^#define     COPYBACK_MODE__VALUE	/;"	d
COPYBACK_SUPPORT	drivers/mtd/nand/denali.h	/^#define COPYBACK_SUPPORT /;"	d
COPYLENGTH	lib/lz4.c	/^#define COPYLENGTH /;"	d	file:
COPY_BL2_FNPTR_ADDR	include/configs/exynos5-common.h	/^#define COPY_BL2_FNPTR_ADDR	/;"	d
COPY_BL2_FNPTR_ADDR	include/configs/origen.h	/^#define COPY_BL2_FNPTR_ADDR	/;"	d
COPY_BL2_FNPTR_ADDR	include/configs/smdkv310.h	/^#define COPY_BL2_FNPTR_ADDR	/;"	d
COPY_BL2_SIZE	include/configs/origen.h	/^#define COPY_BL2_SIZE	/;"	d
COPY_BL2_SIZE	include/configs/smdkv310.h	/^#define	COPY_BL2_SIZE	/;"	d
COPY_GREEN_LED	board/zyxel/nsa310s/nsa310s.h	/^#define COPY_GREEN_LED	/;"	d
COPY_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define COPY_RATIO	/;"	d
COPY_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define COPY_RATIO /;"	d
COPY_RATIO	board/samsung/odroid/setup.h	/^#define COPY_RATIO(/;"	d
COPY_RATIO	board/samsung/trats/setup.h	/^#define COPY_RATIO	/;"	d
COPY_RED_LED	board/zyxel/nsa310s/nsa310s.h	/^#define COPY_RED_LED	/;"	d
CORE	board/siemens/pxm2/board.c	/^#define CORE	/;"	d	file:
CORE	include/power/tps65910.h	/^#define CORE /;"	d
CORE2_RATIO	board/samsung/odroid/setup.h	/^#define CORE2_RATIO(/;"	d
COREB_L1_CODE_START	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define COREB_L1_CODE_START /;"	d
COREB_L1_CODE_START	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define COREB_L1_CODE_START /;"	d
COREM0_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define COREM0_RATIO	/;"	d
COREM0_RATIO	board/samsung/odroid/setup.h	/^#define COREM0_RATIO(/;"	d
COREM0_RATIO	board/samsung/trats/setup.h	/^#define COREM0_RATIO	/;"	d
COREM1_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define COREM1_RATIO	/;"	d
COREM1_RATIO	board/samsung/odroid/setup.h	/^#define COREM1_RATIO(/;"	d
COREM1_RATIO	board/samsung/trats/setup.h	/^#define COREM1_RATIO	/;"	d
COREMMR_BASE	arch/blackfin/include/asm/mem_map.h	/^# define COREMMR_BASE /;"	d
CORESIGHT_UNLOCK	arch/arm/mach-tegra/cpu.h	/^#define CORESIGHT_UNLOCK	/;"	d
CORES_RATIO	board/samsung/odroid/setup.h	/^#define CORES_RATIO(/;"	d
CORE_ACLK_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_ACLK_DIV_MASK	= 7,$/;"	e	enum:__anon375ccd790103
CORE_ACLK_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_ACLK_DIV_SHIFT	= 4,$/;"	e	enum:__anon375ccd790103
CORE_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define CORE_ACLK_HZ	/;"	d
CORE_ADDR	tools/gdb/remote.c	/^#define CORE_ADDR /;"	d	file:
CORE_AVS_CONTROL_0REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define CORE_AVS_CONTROL_0REG	/;"	d
CORE_AVS_CONTROL_2REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define CORE_AVS_CONTROL_2REG	/;"	d
CORE_CLK_PLL_SEL_APLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_CLK_PLL_SEL_APLL	= 0,$/;"	e	enum:__anon375ccd790103
CORE_CLK_PLL_SEL_GPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_CLK_PLL_SEL_GPLL,$/;"	e	enum:__anon375ccd790103
CORE_CLK_PLL_SEL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_CLK_PLL_SEL_MASK	= 1,$/;"	e	enum:__anon375ccd790103
CORE_CLK_PLL_SEL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_CLK_PLL_SEL_SHIFT	= 7,$/;"	e	enum:__anon375ccd790103
CORE_CONFIG_REG	board/freescale/common/vsc3316_3308.c	/^#define CORE_CONFIG_REG	/;"	d	file:
CORE_CONTROL_PAGE	board/freescale/common/vsc3316_3308.c	/^#define CORE_CONTROL_PAGE	/;"	d	file:
CORE_CTRL_IO	drivers/spi/ti_qspi.c	/^#define CORE_CTRL_IO /;"	d	file:
CORE_DIV_CON_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_DIV_CON_MASK	= 0x1f,$/;"	e	enum:__anon375ccd790103
CORE_DIV_CON_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_DIV_CON_SHIFT	= 0,$/;"	e	enum:__anon375ccd790103
CORE_EN	drivers/power/exynos-tmu.c	/^#define CORE_EN	/;"	d	file:
CORE_ERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CORE_ERROR	/;"	d
CORE_FPGA6	board/imgtec/malta/malta.c	/^	CORE_FPGA6,$/;"	e	enum:core_card	file:
CORE_FSEL_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSEL_12	/;"	d
CORE_FSEL_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSEL_13	/;"	d
CORE_FSEL_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSEL_19P2	/;"	d
CORE_FSEL_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSEL_26	/;"	d
CORE_FSEL_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSEL_38P4	/;"	d
CORE_FSL_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSL_12_ES1	/;"	d
CORE_FSL_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSL_13_ES1	/;"	d
CORE_FSL_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSL_19P2_ES1	/;"	d
CORE_FSL_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSL_26_ES1	/;"	d
CORE_FSL_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FSL_38P4_ES1	/;"	d
CORE_FUSB_DIV	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_FUSB_DIV	/;"	d
CORE_HWINFO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CORE_HWINFO	/;"	d
CORE_HWINFO	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CORE_HWINFO	/;"	d
CORE_IDLE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CORE_IDLE	/;"	d
CORE_INTR_MASK_CLEAR_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_MASK_CLEAR_REG /;"	d	file:
CORE_INTR_MASK_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_MASK_REG	/;"	d	file:
CORE_INTR_MASK_SET_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_MASK_SET_REG	/;"	d	file:
CORE_INTR_SRC_CLEAR_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_SRC_CLEAR_REG	/;"	d	file:
CORE_INTR_SRC_MASKED_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_SRC_MASKED_REG /;"	d	file:
CORE_INTR_SRC_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_SRC_REG	/;"	d	file:
CORE_INTR_SRC_SET_REG	drivers/usb/musb-new/am35x.c	/^#define CORE_INTR_SRC_SET_REG	/;"	d	file:
CORE_L3_DIV	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_L3_DIV	/;"	d
CORE_L4_DIV	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_L4_DIV	/;"	d
CORE_LV	board/imgtec/malta/malta.c	/^	CORE_LV,$/;"	e	enum:core_card	file:
CORE_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_12	/;"	d
CORE_M2_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_12_ES1	/;"	d
CORE_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_13	/;"	d
CORE_M2_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_13_ES1	/;"	d
CORE_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_19P2	/;"	d
CORE_M2_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_19P2_ES1	/;"	d
CORE_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_26	/;"	d
CORE_M2_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_26_ES1	/;"	d
CORE_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_38P4	/;"	d
CORE_M2_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M2_38P4_ES1	/;"	d
CORE_M3X2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M3X2	/;"	d
CORE_MERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define CORE_MERROR	/;"	d
CORE_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_12	/;"	d
CORE_M_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_12_ES1	/;"	d
CORE_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_13	/;"	d
CORE_M_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_13_ES1	/;"	d
CORE_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_19P2	/;"	d
CORE_M_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_19P2_ES1	/;"	d
CORE_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_26	/;"	d
CORE_M_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_26_ES1	/;"	d
CORE_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_38P4	/;"	d
CORE_M_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_M_38P4_ES1	/;"	d
CORE_NB	board/amcc/bamboo/bamboo.h	/^			    CORE_NB$/;"	e	enum:config_list
CORE_NOT_SELECTED	board/amcc/bamboo/bamboo.h	/^typedef enum core_selection { CORE_NOT_SELECTED, CORE_SELECTED} core_selection_t;$/;"	e	enum:core_selection
CORE_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_12	/;"	d
CORE_N_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_12_ES1	/;"	d
CORE_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_13	/;"	d
CORE_N_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_13_ES1	/;"	d
CORE_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_19P2	/;"	d
CORE_N_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_19P2_ES1	/;"	d
CORE_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_26	/;"	d
CORE_N_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_26_ES1	/;"	d
CORE_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_38P4	/;"	d
CORE_N_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_N_38P4_ES1	/;"	d
CORE_PERI_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_PERI_DIV_MASK	= 0xf,$/;"	e	enum:__anon375ccd790103
CORE_PERI_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CORE_PERI_DIV_SHIFT	= 0,$/;"	e	enum:__anon375ccd790103
CORE_PERI_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define CORE_PERI_HZ	/;"	d
CORE_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^#define CORE_PLL /;"	d
CORE_PLL_1000	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_1000	/;"	d
CORE_PLL_1000	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define CORE_PLL_1000	/;"	d
CORE_PLL_1167	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define CORE_PLL_1167 /;"	d
CORE_PLL_1167	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define CORE_PLL_1167	/;"	d
CORE_PLL_1198	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define CORE_PLL_1198	/;"	d
CORE_PLL_1200	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_1200	/;"	d
CORE_PLL_1200	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define CORE_PLL_1200	/;"	d
CORE_PLL_1228	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define CORE_PLL_1228 /;"	d
CORE_PLL_1228	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define CORE_PLL_1228	/;"	d
CORE_PLL_1250	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_1250	/;"	d
CORE_PLL_1350	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_1350	/;"	d
CORE_PLL_1400	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_1400	/;"	d
CORE_PLL_1500	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_1500	/;"	d
CORE_PLL_799	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define CORE_PLL_799 /;"	d
CORE_PLL_799	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define CORE_PLL_799	/;"	d
CORE_PLL_800	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_800	/;"	d
CORE_PLL_850	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define CORE_PLL_850	/;"	d
CORE_PLL_983	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define CORE_PLL_983 /;"	d
CORE_PLL_983	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define CORE_PLL_983	/;"	d
CORE_PLL_999	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define CORE_PLL_999	/;"	d
CORE_PLL_CONFIG_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CORE_PLL_CONFIG_REG	/;"	d
CORE_PLL_PARAMETERS_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CORE_PLL_PARAMETERS_REG	/;"	d
CORE_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define CORE_RATIO	/;"	d
CORE_RATIO	board/samsung/odroid/setup.h	/^#define CORE_RATIO(/;"	d
CORE_RATIO	board/samsung/trats/setup.h	/^#define CORE_RATIO	/;"	d
CORE_REVISION	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CORE_REVISION	/;"	d
CORE_REVISION	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CORE_REVISION	/;"	d
CORE_SEL	board/samsung/odroid/setup.h	/^#define CORE_SEL(/;"	d
CORE_SELECTED	board/amcc/bamboo/bamboo.h	/^typedef enum core_selection { CORE_NOT_SELECTED, CORE_SELECTED} core_selection_t;$/;"	e	enum:core_selection
CORE_SEL_PLL_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	CORE_SEL_PLL_MASK	= 1,$/;"	e	enum:__anon06a678fa0203	file:
CORE_SEL_PLL_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	CORE_SEL_PLL_SHIFT	= 15,$/;"	e	enum:__anon06a678fa0203	file:
CORE_SOFT_RESET	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define CORE_SOFT_RESET	/;"	d
CORE_SSI_DIV	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define CORE_SSI_DIV	/;"	d
CORE_SYSCONFIG	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CORE_SYSCONFIG	/;"	d
CORE_SYSCONFIG	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CORE_SYSCONFIG	/;"	d
CORE_THREAD_COUNT_MSR	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CORE_THREAD_COUNT_MSR	/;"	d
CORE_TIMERS_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define CORE_TIMERS_RATIO	/;"	d
CORE_TIMERS_RATIO	board/samsung/trats/setup.h	/^#define CORE_TIMERS_RATIO	/;"	d
CORE_UNKNOWN	board/imgtec/malta/malta.c	/^	CORE_UNKNOWN,$/;"	e	enum:core_card	file:
CORTINA_PHY_ADDR1	include/configs/T208xRDB.h	/^#define CORTINA_PHY_ADDR1	/;"	d
CORTINA_PHY_ADDR1	include/configs/T4240RDB.h	/^#define CORTINA_PHY_ADDR1	/;"	d
CORTINA_PHY_ADDR1	include/configs/ls2080ardb.h	/^#define CORTINA_PHY_ADDR1	/;"	d
CORTINA_PHY_ADDR2	include/configs/T208xRDB.h	/^#define CORTINA_PHY_ADDR2	/;"	d
CORTINA_PHY_ADDR2	include/configs/T4240RDB.h	/^#define CORTINA_PHY_ADDR2	/;"	d
CORTINA_PHY_ADDR2	include/configs/ls2080ardb.h	/^#define CORTINA_PHY_ADDR2	/;"	d
CORTINA_PHY_ADDR3	include/configs/T4240RDB.h	/^#define CORTINA_PHY_ADDR3	/;"	d
CORTINA_PHY_ADDR3	include/configs/ls2080ardb.h	/^#define CORTINA_PHY_ADDR3	/;"	d
CORTINA_PHY_ADDR4	include/configs/T4240RDB.h	/^#define CORTINA_PHY_ADDR4	/;"	d
CORTINA_PHY_ADDR4	include/configs/ls2080ardb.h	/^#define CORTINA_PHY_ADDR4	/;"	d
COUNTER	include/ppc_defs.h	/^#define	COUNTER	/;"	d
COUNTER_FREQUENCY	include/configs/dragonboard410c.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/exynos7420-common.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/hikey.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/ls1012a_common.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/ls1043a_common.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/ls1046a_common.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/ls2080a_common.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/p2371-2180.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/p2771-0000.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/s32v234evb.h	/^#define COUNTER_FREQUENCY /;"	d
COUNTER_FREQUENCY	include/configs/salvator-x.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/sun50i.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/thunderx_88xx.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/uniphier.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/vexpress_aemv8a.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/xilinx_zynqmp.h	/^# define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY	include/configs/xilinx_zynqmp_ep.h	/^#define COUNTER_FREQUENCY	/;"	d
COUNTER_FREQUENCY_REAL	include/configs/ls2080aqds.h	/^#define COUNTER_FREQUENCY_REAL	/;"	d
COUNTER_FREQUENCY_REAL	include/configs/ls2080ardb.h	/^#define COUNTER_FREQUENCY_REAL	/;"	d
COUNTER_REG	drivers/net/smc91111.h	/^#define	COUNTER_REG	/;"	d
COUNT_FIX_HREGS	board/gdsys/p1022/controlcenterd-id.c	/^	COUNT_FIX_HREGS$/;"	e	enum:__anonaa5ecaea0503	file:
COUNT_HW_RL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_HW_RL /;"	d
COUNT_HW_WL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_HW_WL /;"	d
COUNT_LEADING_ZEROS_0	arch/nios2/lib/longlong.h	/^#define COUNT_LEADING_ZEROS_0 /;"	d
COUNT_MASK	drivers/bootcount/bootcount_blackfin.c	/^#define COUNT_MASK /;"	d	file:
COUNT_PBS_COMP_RETRY_NUM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_PBS_COMP_RETRY_NUM /;"	d
COUNT_PBS_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_PBS_PATTERN /;"	d
COUNT_PBS_REPEAT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_PBS_REPEAT /;"	d
COUNT_PBS_STARTOVER	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_PBS_STARTOVER /;"	d
COUNT_RD_REQ	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define	COUNT_RD_REQ	/;"	d	file:
COUNT_TO_USEC	arch/arm/cpu/armv7/sunxi/timer.c	/^#define COUNT_TO_USEC(/;"	d	file:
COUNT_WL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_WL /;"	d
COUNT_WL_HI_FREQ	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_WL_HI_FREQ /;"	d
COUNT_WL_RFRS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define COUNT_WL_RFRS /;"	d
COW_CNODE	fs/ubifs/ubifs.h	/^	COW_CNODE      = 2,$/;"	e	enum:__anonf648d0840903
COW_ZNODE	fs/ubifs/ubifs.h	/^	COW_ZNODE      = 1,$/;"	e	enum:__anonf648d0840603
CP	arch/arm/include/asm/arch-omap3/mux.h	/^#define	CP(/;"	d
CP	include/i8042.h	/^#define CP	/;"	d
CP0_BADINSTR	arch/mips/include/asm/mipsregs.h	/^#define CP0_BADINSTR /;"	d
CP0_BADVADDR	arch/mips/include/asm/mipsregs.h	/^#define CP0_BADVADDR /;"	d
CP0_CACHEERR	arch/mips/include/asm/mipsregs.h	/^#define CP0_CACHEERR /;"	d
CP0_CALG	arch/mips/include/asm/mipsregs.h	/^#define CP0_CALG /;"	d
CP0_CAUSE	arch/mips/include/asm/mipsregs.h	/^#define CP0_CAUSE /;"	d
CP0_CMGCRBASE	arch/mips/include/asm/mipsregs.h	/^#define CP0_CMGCRBASE /;"	d
CP0_COMPARE	arch/mips/include/asm/mipsregs.h	/^#define CP0_COMPARE /;"	d
CP0_CONF	arch/mips/include/asm/mipsregs.h	/^#define CP0_CONF /;"	d
CP0_CONFIG	arch/mips/include/asm/mipsregs.h	/^#define CP0_CONFIG /;"	d
CP0_CONFIG3	arch/mips/include/asm/mipsregs.h	/^#define CP0_CONFIG3 /;"	d
CP0_CONFIG5	arch/mips/include/asm/mipsregs.h	/^#define CP0_CONFIG5 /;"	d
CP0_CONTEXT	arch/mips/include/asm/mipsregs.h	/^#define CP0_CONTEXT /;"	d
CP0_COUNT	arch/mips/include/asm/mipsregs.h	/^#define CP0_COUNT /;"	d
CP0_Config0	board/dbau1x00/lowlevel_init.S	/^#define CP0_Config0	/;"	d	file:
CP0_Config0	board/pb1x00/lowlevel_init.S	/^#define CP0_Config0	/;"	d	file:
CP0_DBASE	arch/mips/include/asm/mipsregs.h	/^#define CP0_DBASE /;"	d
CP0_DBOUND	arch/mips/include/asm/mipsregs.h	/^#define CP0_DBOUND /;"	d
CP0_DEBUG	arch/mips/include/asm/mipsregs.h	/^#define CP0_DEBUG /;"	d
CP0_DEBUG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define CP0_DEBUG	/;"	d
CP0_DEPC	arch/mips/include/asm/mipsregs.h	/^#define CP0_DEPC /;"	d
CP0_DESAVE	arch/mips/include/asm/mipsregs.h	/^#define CP0_DESAVE /;"	d
CP0_DIAGNOSTIC	arch/mips/include/asm/mipsregs.h	/^#define CP0_DIAGNOSTIC /;"	d
CP0_DWATCH	arch/mips/include/asm/mipsregs.h	/^#define CP0_DWATCH /;"	d
CP0_EBASE	arch/mips/include/asm/mipsregs.h	/^#define CP0_EBASE /;"	d
CP0_ECC	arch/mips/include/asm/mipsregs.h	/^#define CP0_ECC /;"	d
CP0_ENTRYHI	arch/mips/include/asm/mipsregs.h	/^#define CP0_ENTRYHI /;"	d
CP0_ENTRYLO0	arch/mips/include/asm/mipsregs.h	/^#define CP0_ENTRYLO0 /;"	d
CP0_ENTRYLO1	arch/mips/include/asm/mipsregs.h	/^#define CP0_ENTRYLO1 /;"	d
CP0_EPC	arch/mips/include/asm/mipsregs.h	/^#define CP0_EPC /;"	d
CP0_ERROREPC	arch/mips/include/asm/mipsregs.h	/^#define CP0_ERROREPC /;"	d
CP0_FRAMEMASK	arch/mips/include/asm/mipsregs.h	/^#define CP0_FRAMEMASK /;"	d
CP0_GLOBALNUMBER	arch/mips/include/asm/mipsregs.h	/^#define CP0_GLOBALNUMBER /;"	d
CP0_HWRENA	arch/mips/include/asm/mipsregs.h	/^#define CP0_HWRENA /;"	d
CP0_IBASE	arch/mips/include/asm/mipsregs.h	/^#define CP0_IBASE /;"	d
CP0_IBOUND	arch/mips/include/asm/mipsregs.h	/^#define CP0_IBOUND /;"	d
CP0_INDEX	arch/mips/include/asm/mipsregs.h	/^#define CP0_INDEX /;"	d
CP0_INFO	arch/mips/include/asm/mipsregs.h	/^#define CP0_INFO /;"	d
CP0_IWATCH	arch/mips/include/asm/mipsregs.h	/^#define CP0_IWATCH /;"	d
CP0_IWATCHLO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define CP0_IWATCHLO	/;"	d
CP0_LLADDR	arch/mips/include/asm/mipsregs.h	/^#define CP0_LLADDR /;"	d
CP0_PAGEMASK	arch/mips/include/asm/mipsregs.h	/^#define CP0_PAGEMASK /;"	d
CP0_PERFORMANCE	arch/mips/include/asm/mipsregs.h	/^#define CP0_PERFORMANCE /;"	d
CP0_PRID	arch/mips/include/asm/mipsregs.h	/^#define CP0_PRID /;"	d
CP0_RANDOM	arch/mips/include/asm/mipsregs.h	/^#define CP0_RANDOM /;"	d
CP0_S1_DERRADDR0	arch/mips/include/asm/mipsregs.h	/^#define CP0_S1_DERRADDR0 /;"	d
CP0_S1_DERRADDR1	arch/mips/include/asm/mipsregs.h	/^#define CP0_S1_DERRADDR1 /;"	d
CP0_S1_INTCONTROL	arch/mips/include/asm/mipsregs.h	/^#define CP0_S1_INTCONTROL /;"	d
CP0_S2_SRSCTL	arch/mips/include/asm/mipsregs.h	/^#define CP0_S2_SRSCTL	/;"	d
CP0_S3_SRSMAP	arch/mips/include/asm/mipsregs.h	/^#define CP0_S3_SRSMAP	/;"	d
CP0_STATUS	arch/mips/include/asm/mipsregs.h	/^#define CP0_STATUS /;"	d
CP0_TAGHI	arch/mips/include/asm/mipsregs.h	/^#define CP0_TAGHI /;"	d
CP0_TAGLO	arch/mips/include/asm/mipsregs.h	/^#define CP0_TAGLO /;"	d
CP0_TX39_CACHE	arch/mips/include/asm/mipsregs.h	/^#define CP0_TX39_CACHE	/;"	d
CP0_WATCHHI	arch/mips/include/asm/mipsregs.h	/^#define CP0_WATCHHI /;"	d
CP0_WATCHLO	arch/mips/include/asm/mipsregs.h	/^#define CP0_WATCHLO /;"	d
CP0_WIRED	arch/mips/include/asm/mipsregs.h	/^#define CP0_WIRED /;"	d
CP0_XCONTEXT	arch/mips/include/asm/mipsregs.h	/^#define CP0_XCONTEXT /;"	d
CP15DMB	arch/arm/include/asm/barriers.h	/^#define CP15DMB	/;"	d
CP15DSB	arch/arm/include/asm/barriers.h	/^#define CP15DSB	/;"	d
CP15ISB	arch/arm/include/asm/barriers.h	/^#define CP15ISB	/;"	d
CP1_FCCR	arch/mips/include/asm/mipsregs.h	/^#define CP1_FCCR	/;"	d
CP1_FENR	arch/mips/include/asm/mipsregs.h	/^#define CP1_FENR	/;"	d
CP1_FEXR	arch/mips/include/asm/mipsregs.h	/^#define CP1_FEXR	/;"	d
CP1_REVISION	arch/mips/include/asm/mipsregs.h	/^#define CP1_REVISION	/;"	d
CP1_STATUS	arch/mips/include/asm/mipsregs.h	/^#define CP1_STATUS	/;"	d
CP1_UFR	arch/mips/include/asm/mipsregs.h	/^#define CP1_UFR	/;"	d
CP1_UNFR	arch/mips/include/asm/mipsregs.h	/^#define CP1_UNFR	/;"	d
CPADD	arch/mips/include/asm/asm.h	/^#define CPADD(/;"	d
CPC0_BOOT	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_BOOT	/;"	d
CPC0_BOOT_SEP	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_BOOT_SEP	/;"	d
CPC0_CR0	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_CR0	/;"	d
CPC0_CR0	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_CR0	/;"	d
CPC0_CR1	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_CR1	/;"	d
CPC0_CR1	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_CR1	/;"	d
CPC0_CR1	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_CR1	/;"	d
CPC0_ECR	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_ECR	/;"	d
CPC0_EIRR	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_EIRR	/;"	d
CPC0_EPCTL	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_EPCTL	/;"	d
CPC0_EPCTL_E0NFE	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_EPCTL_E0NFE	/;"	d
CPC0_EPCTL_E1NFE	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_EPCTL_E1NFE	/;"	d
CPC0_ER	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_ER	/;"	d
CPC0_FR	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_FR	/;"	d
CPC0_GPIO	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_GPIO	/;"	d
CPC0_PCI	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PCI	/;"	d
CPC0_PCI_ARBIT_EN	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PCI_ARBIT_EN	/;"	d
CPC0_PCI_HOST_CFG_EN	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PCI_HOST_CFG_EN	/;"	d
CPC0_PCI_SPE	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PCI_SPE	/;"	d
CPC0_PLLMR	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_PLLMR	/;"	d
CPC0_PLLMR0	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0	/;"	d
CPC0_PLLMR0_CBDV	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0_CBDV	/;"	d
CPC0_PLLMR0_CCDV	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0_CCDV	/;"	d
CPC0_PLLMR0_EPDV	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0_EPDV	/;"	d
CPC0_PLLMR0_MPDV	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0_MPDV	/;"	d
CPC0_PLLMR0_OPDV	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0_OPDV	/;"	d
CPC0_PLLMR0_PPFD	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR0_PPFD	/;"	d
CPC0_PLLMR1	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR1	/;"	d
CPC0_PLLMR1_FBDV	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR1_FBDV	/;"	d
CPC0_PLLMR1_FWDVA	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR1_FWDVA	/;"	d
CPC0_PLLMR1_FWDVB	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR1_FWDVB	/;"	d
CPC0_PLLMR1_PLLR	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR1_PLLR	/;"	d
CPC0_PLLMR1_SSCS	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_PLLMR1_SSCS	/;"	d
CPC0_PSR	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_PSR	/;"	d
CPC0_SR	arch/powerpc/include/asm/ppc405gp.h	/^#define CPC0_SR	/;"	d
CPC0_SRR	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_SRR	/;"	d
CPC0_STRP0	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_STRP0	/;"	d
CPC0_STRP1	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_STRP1	/;"	d
CPC0_STRP1_PAE_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_STRP1_PAE_MASK	/;"	d
CPC0_STRP1_PISE_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_STRP1_PISE_MASK	/;"	d
CPC0_SYS0	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_SYS0	/;"	d
CPC0_SYS1	arch/powerpc/include/asm/ppc440gp.h	/^#define CPC0_SYS1	/;"	d
CPC0_UCR	arch/powerpc/include/asm/ppc405ep.h	/^#define CPC0_UCR	/;"	d
CPCR_RX_VLAN	drivers/usb/eth/r8152.h	/^#define CPCR_RX_VLAN	/;"	d
CPC_CFG0_LINE_SZ	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CFG0_LINE_SZ(/;"	d
CPC_CFG0_NUM_WAYS	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CFG0_NUM_WAYS(/;"	d
CPC_CFG0_SZ_K	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CFG0_SZ_K(/;"	d
CPC_CFG0_SZ_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CFG0_SZ_MASK	/;"	d
CPC_CSR0_CE	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CSR0_CE	/;"	d
CPC_CSR0_FI	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CSR0_FI	/;"	d
CPC_CSR0_FL	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CSR0_FL	/;"	d
CPC_CSR0_LFC	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CSR0_LFC	/;"	d
CPC_CSR0_PE	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CSR0_PE	/;"	d
CPC_CSR0_WT	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_CSR0_WT	/;"	d
CPC_ERRDIS_TMHITDIS	arch/powerpc/include/asm/immap_85xx.h	/^#define	CPC_ERRDIS_TMHITDIS /;"	d
CPC_HDBCR0_CDQ_SPEC_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_HDBCR0_CDQ_SPEC_DIS	/;"	d
CPC_HDBCR0_DATA_ECC_SCRUB_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_HDBCR0_DATA_ECC_SCRUB_DIS	/;"	d
CPC_HDBCR0_SPLRU_LEVEL_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_HDBCR0_SPLRU_LEVEL_EN	/;"	d
CPC_HDBCR0_TAG_ECC_SCRUB_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS	/;"	d
CPC_SRCR0_INTLVEN	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_INTLVEN	/;"	d
CPC_SRCR0_SRAMEN	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMEN	/;"	d
CPC_SRCR0_SRAMSZ_16_WAY	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMSZ_16_WAY	/;"	d
CPC_SRCR0_SRAMSZ_1_WAY	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMSZ_1_WAY	/;"	d
CPC_SRCR0_SRAMSZ_2_WAY	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMSZ_2_WAY	/;"	d
CPC_SRCR0_SRAMSZ_32_WAY	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMSZ_32_WAY	/;"	d
CPC_SRCR0_SRAMSZ_4_WAY	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMSZ_4_WAY	/;"	d
CPC_SRCR0_SRAMSZ_8_WAY	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRAMSZ_8_WAY	/;"	d
CPC_SRCR0_SRBARL	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR0_SRBARL(/;"	d
CPC_SRCR0_SRBARL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define	CPC_SRCR0_SRBARL_MASK	/;"	d
CPC_SRCR1_SRBARU	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR1_SRBARU(/;"	d
CPC_SRCR1_SRBARU_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define CPC_SRCR1_SRBARU_MASK	/;"	d
CPDMA_CHAN_A_ENABLE	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define CPDMA_CHAN_A_ENABLE /;"	d
CPDMA_CHAN_A_TDOWN	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define CPDMA_CHAN_A_TDOWN /;"	d
CPDMA_DESC_EOP	drivers/net/cpsw.c	/^#define CPDMA_DESC_EOP	/;"	d	file:
CPDMA_DESC_EOQ	drivers/net/cpsw.c	/^#define CPDMA_DESC_EOQ	/;"	d	file:
CPDMA_DESC_OWNER	drivers/net/cpsw.c	/^#define CPDMA_DESC_OWNER	/;"	d	file:
CPDMA_DESC_SOP	drivers/net/cpsw.c	/^#define CPDMA_DESC_SOP	/;"	d	file:
CPDMA_REG_VAL_MAKE_RX_FLOW_A	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define CPDMA_REG_VAL_MAKE_RX_FLOW_A(/;"	d
CPDMA_REG_VAL_MAKE_RX_FLOW_D	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define CPDMA_REG_VAL_MAKE_RX_FLOW_D(/;"	d
CPDMA_RXCONTROL	drivers/net/cpsw.c	/^#define CPDMA_RXCONTROL	/;"	d	file:
CPDMA_RXCP_VER1	drivers/net/cpsw.c	/^#define CPDMA_RXCP_VER1	/;"	d	file:
CPDMA_RXCP_VER2	drivers/net/cpsw.c	/^#define CPDMA_RXCP_VER2	/;"	d	file:
CPDMA_RXFREE	drivers/net/cpsw.c	/^#define CPDMA_RXFREE	/;"	d	file:
CPDMA_RXHDP_VER1	drivers/net/cpsw.c	/^#define CPDMA_RXHDP_VER1	/;"	d	file:
CPDMA_RXHDP_VER2	drivers/net/cpsw.c	/^#define CPDMA_RXHDP_VER2	/;"	d	file:
CPDMA_SOFTRESET	drivers/net/cpsw.c	/^#define CPDMA_SOFTRESET	/;"	d	file:
CPDMA_TIMEOUT	drivers/net/cpsw.c	/^#define CPDMA_TIMEOUT	/;"	d	file:
CPDMA_TXCONTROL	drivers/net/cpsw.c	/^#define CPDMA_TXCONTROL	/;"	d	file:
CPDMA_TXCP_VER1	drivers/net/cpsw.c	/^#define CPDMA_TXCP_VER1	/;"	d	file:
CPDMA_TXCP_VER2	drivers/net/cpsw.c	/^#define CPDMA_TXCP_VER2	/;"	d	file:
CPDMA_TXHDP_VER1	drivers/net/cpsw.c	/^#define CPDMA_TXHDP_VER1	/;"	d	file:
CPDMA_TXHDP_VER2	drivers/net/cpsw.c	/^#define CPDMA_TXHDP_VER2	/;"	d	file:
CPGMACSL_REG_CTL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMACSL_REG_CTL	/;"	d
CPGMACSL_REG_MAXLEN	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMACSL_REG_MAXLEN	/;"	d
CPGMACSL_REG_RESET	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMACSL_REG_RESET	/;"	d
CPGMACSL_REG_RX_PRI_MAP	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMACSL_REG_RX_PRI_MAP	/;"	d
CPGMACSL_REG_SA_HI	drivers/net/keystone_net.c	/^#define CPGMACSL_REG_SA_HI	/;"	d	file:
CPGMACSL_REG_SA_LO	drivers/net/keystone_net.c	/^#define CPGMACSL_REG_SA_LO	/;"	d	file:
CPGMACSL_REG_STATUS	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMACSL_REG_STATUS	/;"	d
CPGMACSS_SW_RST	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define CPGMACSS_SW_RST	/;"	d
CPGMACSS_SW_RST	board/logicpd/am3517evm/am3517evm.c	/^#define CPGMACSS_SW_RST	/;"	d	file:
CPGMAC_REG_MAXLEN_LEN	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMAC_REG_MAXLEN_LEN	/;"	d
CPGMAC_REG_RESET_VAL_RESET	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMAC_REG_RESET_VAL_RESET	/;"	d
CPGMAC_REG_RESET_VAL_RESET_MASK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPGMAC_REG_RESET_VAL_RESET_MASK	/;"	d
CPGWPCR	board/renesas/salvator-x/salvator-x.c	/^#define CPGWPCR	/;"	d	file:
CPGWPR	board/renesas/salvator-x/salvator-x.c	/^#define CPGWPR /;"	d	file:
CPG_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define CPG_BASE	/;"	d
CPG_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define CPG_BASE /;"	d
CPG_PLL1CR	board/renesas/blanche/blanche.c	/^#define	CPG_PLL1CR	/;"	d	file:
CPG_PLL3CR	board/renesas/blanche/blanche.c	/^#define	CPG_PLL3CR	/;"	d	file:
CPG_SRCR_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	CPG_SRCR_BASE	/;"	d
CPHA	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define CPHA	/;"	d
CPHYSADDR	arch/mips/include/asm/addrspace.h	/^#define CPHYSADDR(/;"	d
CPHY_ADDR	board/highbank/ahci.c	/^#define CPHY_ADDR(/;"	d	file:
CPHY_BASE	board/highbank/ahci.c	/^#define CPHY_BASE	/;"	d	file:
CPHY_DTE_XS	board/highbank/ahci.c	/^#define CPHY_DTE_XS	/;"	d	file:
CPHY_MAP	board/highbank/ahci.c	/^#define CPHY_MAP(/;"	d	file:
CPHY_MII	board/highbank/ahci.c	/^#define CPHY_MII	/;"	d	file:
CPHY_RX_INPUT_OVERRIDE	board/highbank/ahci.c	/^#define CPHY_RX_INPUT_OVERRIDE	/;"	d	file:
CPHY_RX_INPUT_STS	board/highbank/ahci.c	/^#define CPHY_RX_INPUT_STS	/;"	d	file:
CPHY_SATA_DPLL_MODE	board/highbank/ahci.c	/^#define CPHY_SATA_DPLL_MODE	/;"	d	file:
CPHY_SATA_DPLL_SHIFT	board/highbank/ahci.c	/^#define CPHY_SATA_DPLL_SHIFT	/;"	d	file:
CPHY_SATA_RX_OVERRIDE_BIT	board/highbank/ahci.c	/^#define CPHY_SATA_RX_OVERRIDE_BIT	/;"	d	file:
CPHY_SATA_TX_ATTEN	board/highbank/ahci.c	/^#define CPHY_SATA_TX_ATTEN	/;"	d	file:
CPHY_SATA_TX_ATTEN_SHIFT	board/highbank/ahci.c	/^#define CPHY_SATA_TX_ATTEN_SHIFT	/;"	d	file:
CPHY_SATA_TX_OVERRIDE_BIT	board/highbank/ahci.c	/^#define CPHY_SATA_TX_OVERRIDE_BIT	/;"	d	file:
CPHY_TX_INPUT_OVERRIDE	board/highbank/ahci.c	/^#define CPHY_TX_INPUT_OVERRIDE	/;"	d	file:
CPHY_TX_INPUT_STS	board/highbank/ahci.c	/^#define CPHY_TX_INPUT_STS	/;"	d	file:
CPHY_WIDTH	board/highbank/ahci.c	/^#define CPHY_WIDTH	/;"	d	file:
CPLB_ALL_ACCESS	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ALL_ACCESS	/;"	d
CPLB_CACHE_ENABLED	arch/blackfin/include/asm/cplb.h	/^#define CPLB_CACHE_ENABLED	/;"	d
CPLB_DDOCACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_DDOCACHE	/;"	d
CPLB_DEF_CACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_DEF_CACHE	/;"	d
CPLB_DIRTY	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_DIRTY	/;"	d
CPLB_DNOCACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_DNOCACHE	/;"	d
CPLB_D_PAGE_MGMT	arch/blackfin/include/asm/cplb.h	/^#define CPLB_D_PAGE_MGMT	/;"	d
CPLB_ENABLE_ANY_CPLBS	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_ANY_CPLBS	/;"	d
CPLB_ENABLE_CPLBS	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_CPLBS	/;"	d
CPLB_ENABLE_CPLBS_P	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_CPLBS_P	/;"	d
CPLB_ENABLE_DCACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_DCACHE	/;"	d
CPLB_ENABLE_DCACHE2	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_DCACHE2	/;"	d
CPLB_ENABLE_DCACHE2_P	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_DCACHE2_P	/;"	d
CPLB_ENABLE_DCACHE_P	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_DCACHE_P	/;"	d
CPLB_ENABLE_DCPLBS	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_DCPLBS	/;"	d
CPLB_ENABLE_DCPLBS_P	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_DCPLBS_P	/;"	d
CPLB_ENABLE_ICACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_ICACHE	/;"	d
CPLB_ENABLE_ICACHE_P	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_ICACHE_P	/;"	d
CPLB_ENABLE_ICPLBS	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_ICPLBS	/;"	d
CPLB_ENABLE_ICPLBS_P	arch/blackfin/include/asm/cplb.h	/^#define CPLB_ENABLE_ICPLBS_P	/;"	d
CPLB_EX_PAGE_MASK	arch/blackfin/cpu/cpu.c	/^#define CPLB_EX_PAGE_MASK /;"	d	file:
CPLB_EX_PAGE_SIZE	arch/blackfin/cpu/cpu.c	/^#define CPLB_EX_PAGE_SIZE /;"	d	file:
CPLB_IDOCACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_IDOCACHE	/;"	d
CPLB_INOCACHE	arch/blackfin/include/asm/cplb.h	/^#define CPLB_INOCACHE	/;"	d
CPLB_I_PAGE_MGMT	arch/blackfin/include/asm/cplb.h	/^#define CPLB_I_PAGE_MGMT	/;"	d
CPLB_L1SRAM	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_L1SRAM	/;"	d
CPLB_L1_AOW	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_L1_AOW	/;"	d
CPLB_L1_CHBL	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_L1_CHBL	/;"	d
CPLB_LOCK	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_LOCK	/;"	d
CPLB_LOCK_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_LOCK_P	/;"	d
CPLB_LRUPRIO	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_LRUPRIO	/;"	d
CPLB_NO_ADDR_MATCH	arch/blackfin/include/asm/cplb.h	/^#define CPLB_NO_ADDR_MATCH	/;"	d
CPLB_NO_UNLOCKED	arch/blackfin/include/asm/cplb.h	/^#define CPLB_NO_UNLOCKED	/;"	d
CPLB_PAGE_MASK	arch/blackfin/cpu/cpu.c	/^#define CPLB_PAGE_MASK /;"	d	file:
CPLB_PAGE_SIZE	arch/blackfin/cpu/cpu.c	/^#define CPLB_PAGE_SIZE /;"	d	file:
CPLB_PORTPRIO	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_PORTPRIO	/;"	d
CPLB_PROT_VIOL	arch/blackfin/include/asm/cplb.h	/^#define CPLB_PROT_VIOL	/;"	d
CPLB_RELOADED	arch/blackfin/include/asm/cplb.h	/^#define CPLB_RELOADED	/;"	d
CPLB_SUPV_WR	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_SUPV_WR	/;"	d
CPLB_USER_RD	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_USER_RD	/;"	d
CPLB_USER_RD_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_USER_RD_P	/;"	d
CPLB_USER_WR	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_USER_WR	/;"	d
CPLB_VALID	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_VALID	/;"	d
CPLB_VALID_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_VALID_P	/;"	d
CPLB_WT	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define CPLB_WT	/;"	d
CPLD	board/esd/vom405/Makefile	/^CPLD    = ..\/common\/xilinx_jtag\/lenval.o \\$/;"	m
CPLD_ADDR_DIPSW	board/renesas/stout/cpld.c	/^#define CPLD_ADDR_DIPSW	/;"	d	file:
CPLD_ADDR_HDMI	board/renesas/stout/cpld.c	/^#define CPLD_ADDR_HDMI	/;"	d	file:
CPLD_ADDR_MODE	board/renesas/stout/cpld.c	/^#define CPLD_ADDR_MODE	/;"	d	file:
CPLD_ADDR_MUX	board/renesas/stout/cpld.c	/^#define CPLD_ADDR_MUX	/;"	d	file:
CPLD_ADDR_RESET	board/renesas/stout/cpld.c	/^#define CPLD_ADDR_RESET	/;"	d	file:
CPLD_ADDR_VERSION	board/renesas/stout/cpld.c	/^#define CPLD_ADDR_VERSION	/;"	d	file:
CPLD_BANKSEL_EN	board/freescale/c29xpcie/cpld.h	/^#define CPLD_BANKSEL_EN	/;"	d
CPLD_BANKSEL_MASK	board/freescale/c29xpcie/cpld.h	/^#define CPLD_BANKSEL_MASK	/;"	d
CPLD_BANK_OVERRIDE	board/freescale/t102xrdb/cpld.h	/^#define CPLD_BANK_OVERRIDE /;"	d
CPLD_BANK_OVERRIDE	board/freescale/t208xrdb/cpld.h	/^#define CPLD_BANK_OVERRIDE	/;"	d
CPLD_BANK_OVERRIDE	include/configs/T104xRDB.h	/^#define CPLD_BANK_OVERRIDE	/;"	d
CPLD_BANK_SEL_ALTBANK	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_BANK_SEL_ALTBANK	/;"	d
CPLD_BANK_SEL_ALTBANK	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_BANK_SEL_ALTBANK	/;"	d
CPLD_BANK_SEL_EN	board/freescale/t4rdb/cpld.h	/^#define CPLD_BANK_SEL_EN	/;"	d
CPLD_BANK_SEL_MASK	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_BANK_SEL_MASK	/;"	d
CPLD_BANK_SEL_MASK	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_BANK_SEL_MASK	/;"	d
CPLD_BANK_SEL_MASK	board/freescale/t102xrdb/cpld.h	/^#define CPLD_BANK_SEL_MASK /;"	d
CPLD_BANK_SEL_MASK	board/freescale/t208xrdb/cpld.h	/^#define CPLD_BANK_SEL_MASK	/;"	d
CPLD_BANK_SEL_MASK	board/freescale/t4rdb/cpld.h	/^#define CPLD_BANK_SEL_MASK	/;"	d
CPLD_BANK_SEL_MASK	include/configs/T104xRDB.h	/^#define CPLD_BANK_SEL_MASK	/;"	d
CPLD_BASE	include/configs/P2041RDB.h	/^#define CPLD_BASE	/;"	d
CPLD_BASE_PHYS	include/configs/P2041RDB.h	/^#define CPLD_BASE_PHYS	/;"	d
CPLD_BASE_PHYS	include/configs/ls1021atwr.h	/^#define CPLD_BASE_PHYS	/;"	d
CPLD_BASE_PHYS	include/configs/ls1043ardb.h	/^#define CPLD_BASE_PHYS	/;"	d
CPLD_BASE_PHYS	include/configs/ls1046ardb.h	/^#define CPLD_BASE_PHYS	/;"	d
CPLD_BOOT_SEL	board/freescale/t102xrdb/cpld.h	/^#define CPLD_BOOT_SEL	/;"	d
CPLD_BOOT_SEL	board/freescale/t208xrdb/cpld.h	/^#define CPLD_BOOT_SEL	/;"	d
CPLD_BYPASS_EN	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_BYPASS_EN	/;"	d	file:
CPLD_CFG_RCW_SRC_NAND	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_CFG_RCW_SRC_NAND	/;"	d
CPLD_CFG_RCW_SRC_NOR	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_CFG_RCW_SRC_NOR	/;"	d
CPLD_CFG_RCW_SRC_QSPI	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_CFG_RCW_SRC_QSPI	/;"	d
CPLD_CFG_RCW_SRC_SD	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_CFG_RCW_SRC_SD	/;"	d
CPLD_CFG_RCW_SRC_SD	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_CFG_RCW_SRC_SD	/;"	d
CPLD_CONTROL_POSTLED_GATE	board/esd/pmc405de/pmc405de.c	/^#define CPLD_CONTROL_POSTLED_GATE	/;"	d	file:
CPLD_CONTROL_POSTLED_N	board/esd/pmc405de/pmc405de.c	/^#define CPLD_CONTROL_POSTLED_N	/;"	d	file:
CPLD_CONTROL_RESETOUT_N	board/esd/pmc405de/pmc405de.c	/^#define CPLD_CONTROL_RESETOUT_N	/;"	d	file:
CPLD_CONTROL_RESETOUT_N_GATE	board/esd/pmc405de/pmc405de.c	/^#define CPLD_CONTROL_RESETOUT_N_GATE	/;"	d	file:
CPLD_DATA_SIZE	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_DATA_SIZE	/;"	d	file:
CPLD_DEFAULT_BANK	board/freescale/t4rdb/cpld.h	/^#define CPLD_DEFAULT_BANK	/;"	d
CPLD_DELAY	board/bf527-ezkit/video.c	/^#define CPLD_DELAY	/;"	d	file:
CPLD_DIU_SEL_DFP	include/configs/T104xRDB.h	/^#define CPLD_DIU_SEL_DFP	/;"	d
CPLD_DONE_ADR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_DONE_ADR	/;"	d	file:
CPLD_DONE_DAT	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_DONE_DAT	/;"	d	file:
CPLD_FXO_LED	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_FXO_LED	/;"	d	file:
CPLD_FXS_LED	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_FXS_LED	/;"	d	file:
CPLD_INIT_ADR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_INIT_ADR	/;"	d	file:
CPLD_INIT_DAT	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_INIT_DAT	/;"	d	file:
CPLD_INT_MASK_ALL	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_ALL	/;"	d
CPLD_INT_MASK_DVI_DFP	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_DVI_DFP	/;"	d
CPLD_INT_MASK_QSGMII1	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_QSGMII1	/;"	d
CPLD_INT_MASK_QSGMII2	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_QSGMII2	/;"	d
CPLD_INT_MASK_SGMI1	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_SGMI1	/;"	d
CPLD_INT_MASK_SGMI2	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_SGMI2	/;"	d
CPLD_INT_MASK_TDMR1	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_TDMR1	/;"	d
CPLD_INT_MASK_TDMR2	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_TDMR2	/;"	d
CPLD_INT_MASK_THERM	include/configs/T104xRDB.h	/^#define CPLD_INT_MASK_THERM	/;"	d
CPLD_LANE_A_SEL	board/freescale/p2041rdb/p2041rdb.c	/^#define CPLD_LANE_A_SEL	/;"	d	file:
CPLD_LANE_C_SEL	board/freescale/p2041rdb/p2041rdb.c	/^#define CPLD_LANE_C_SEL	/;"	d	file:
CPLD_LANE_D_SEL	board/freescale/p2041rdb/p2041rdb.c	/^#define CPLD_LANE_D_SEL	/;"	d	file:
CPLD_LANE_G_SEL	board/freescale/p2041rdb/p2041rdb.c	/^#define CPLD_LANE_G_SEL	/;"	d	file:
CPLD_LBMAP_ALTBANK	board/freescale/t102xrdb/cpld.h	/^#define CPLD_LBMAP_ALTBANK /;"	d
CPLD_LBMAP_ALTBANK	board/freescale/t208xrdb/cpld.h	/^#define CPLD_LBMAP_ALTBANK	/;"	d
CPLD_LBMAP_ALTBANK	include/configs/T104xRDB.h	/^#define CPLD_LBMAP_ALTBANK	/;"	d
CPLD_LBMAP_DFLTBANK	board/freescale/t102xrdb/cpld.h	/^#define CPLD_LBMAP_DFLTBANK /;"	d
CPLD_LBMAP_DFLTBANK	board/freescale/t208xrdb/cpld.h	/^#define CPLD_LBMAP_DFLTBANK	/;"	d
CPLD_LBMAP_DFLTBANK	include/configs/T104xRDB.h	/^#define CPLD_LBMAP_DFLTBANK	/;"	d
CPLD_LBMAP_MASK	board/freescale/t102xrdb/cpld.h	/^#define CPLD_LBMAP_MASK	/;"	d
CPLD_LBMAP_MASK	board/freescale/t208xrdb/cpld.h	/^#define CPLD_LBMAP_MASK	/;"	d
CPLD_LBMAP_MASK	include/configs/T104xRDB.h	/^#define CPLD_LBMAP_MASK	/;"	d
CPLD_LBMAP_RESET	board/freescale/t102xrdb/cpld.h	/^#define CPLD_LBMAP_RESET	/;"	d
CPLD_LBMAP_RESET	board/freescale/t208xrdb/cpld.h	/^#define CPLD_LBMAP_RESET	/;"	d
CPLD_LBMAP_RESET	include/configs/T104xRDB.h	/^#define CPLD_LBMAP_RESET	/;"	d
CPLD_LBMAP_SHIFT	board/freescale/t102xrdb/cpld.h	/^#define CPLD_LBMAP_SHIFT	/;"	d
CPLD_LBMAP_SHIFT	board/freescale/t208xrdb/cpld.h	/^#define CPLD_LBMAP_SHIFT	/;"	d
CPLD_LBMAP_SHIFT	include/configs/T104xRDB.h	/^#define CPLD_LBMAP_SHIFT	/;"	d
CPLD_NOMAL_START	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_NOMAL_START	/;"	d	file:
CPLD_OVERRIDE_BOOT_EN	board/freescale/t102xrdb/cpld.h	/^#define CPLD_OVERRIDE_BOOT_EN	/;"	d
CPLD_OVERRIDE_MUX_EN	board/freescale/t102xrdb/cpld.h	/^#define CPLD_OVERRIDE_MUX_EN	/;"	d
CPLD_PCIE_SGMII_MUX	board/freescale/t102xrdb/cpld.h	/^#define CPLD_PCIE_SGMII_MUX	/;"	d
CPLD_PFC_ADR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_PFC_ADR	/;"	d	file:
CPLD_PROG_ADR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_PROG_ADR	/;"	d	file:
CPLD_PROG_DAT	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_PROG_DAT	/;"	d	file:
CPLD_READ	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_READ	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_READ	board/freescale/p2041rdb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_READ	board/freescale/t102xrdb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_READ	board/freescale/t104xrdb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_READ	board/freescale/t208xrdb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_READ	board/freescale/t4rdb/cpld.h	/^#define CPLD_READ(/;"	d
CPLD_REV_REGISTER	include/configs/motionpro.h	/^#define CPLD_REV_REGISTER	/;"	d
CPLD_RSTCON_EDC_RST	board/freescale/t208xrdb/cpld.h	/^#define CPLD_RSTCON_EDC_RST	/;"	d
CPLD_RST_BSW	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_RST_BSW	/;"	d	file:
CPLD_RST_BWD	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_RST_BWD	/;"	d	file:
CPLD_SAFE_START	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define CPLD_SAFE_START	/;"	d	file:
CPLD_SELECT_BANK0	board/freescale/t4rdb/cpld.h	/^#define CPLD_SELECT_BANK0	/;"	d
CPLD_SELECT_BANK1	board/freescale/c29xpcie/cpld.h	/^#define CPLD_SELECT_BANK1	/;"	d
CPLD_SELECT_BANK2	board/freescale/c29xpcie/cpld.h	/^#define CPLD_SELECT_BANK2	/;"	d
CPLD_SELECT_BANK3	board/freescale/c29xpcie/cpld.h	/^#define CPLD_SELECT_BANK3	/;"	d
CPLD_SELECT_BANK4	board/freescale/c29xpcie/cpld.h	/^#define CPLD_SELECT_BANK4	/;"	d
CPLD_SELECT_BANK4	board/freescale/t4rdb/cpld.h	/^#define CPLD_SELECT_BANK4	/;"	d
CPLD_SET_BOOT_BANK	board/freescale/ls1021atwr/ls1021atwr.c	/^#define CPLD_SET_BOOT_BANK	/;"	d	file:
CPLD_SET_MUX_SERDES	board/freescale/ls1021atwr/ls1021atwr.c	/^#define CPLD_SET_MUX_SERDES	/;"	d	file:
CPLD_STATUS_LED	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_STATUS_LED	/;"	d	file:
CPLD_SW	board/freescale/p2041rdb/cpld.h	/^#define CPLD_SW(/;"	d
CPLD_SWITCH_BANK_ENABLE	board/freescale/p2041rdb/cpld.h	/^#define CPLD_SWITCH_BANK_ENABLE	/;"	d
CPLD_SW_MUX_BANK_SEL	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_SW_MUX_BANK_SEL	/;"	d
CPLD_SW_MUX_BANK_SEL	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_SW_MUX_BANK_SEL	/;"	d
CPLD_SYSCLK_100	board/freescale/p2041rdb/cpld.h	/^#define CPLD_SYSCLK_100	/;"	d
CPLD_SYSCLK_83	board/freescale/p2041rdb/cpld.h	/^#define CPLD_SYSCLK_83	/;"	d
CPLD_SYSTEM_RESET	board/freescale/t4rdb/cpld.h	/^#define CPLD_SYSTEM_RESET	/;"	d
CPLD_SYS_RST	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_SYS_RST	/;"	d	file:
CPLD_VERSION_MASK	board/esd/pmc405de/pmc405de.c	/^#define CPLD_VERSION_MASK	/;"	d	file:
CPLD_WD_CFG	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define CPLD_WD_CFG	/;"	d	file:
CPLD_WRITE	board/freescale/ls1043ardb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLD_WRITE	board/freescale/ls1046ardb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLD_WRITE	board/freescale/p2041rdb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLD_WRITE	board/freescale/t102xrdb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLD_WRITE	board/freescale/t104xrdb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLD_WRITE	board/freescale/t208xrdb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLD_WRITE	board/freescale/t4rdb/cpld.h	/^#define CPLD_WRITE(/;"	d
CPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define CPLL	/;"	d
CPLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define CPLL_CON0_LOCKED	/;"	d
CPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CPLL_CON1_VAL	/;"	d
CPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define CPLL_HZ	/;"	d
CPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define CPLL_HZ	/;"	d
CPLL_MODE_DEEP	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CPLL_MODE_DEEP,$/;"	e	enum:__anon3783c4e20703
CPLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CPLL_MODE_MASK		= 3,$/;"	e	enum:__anon3783c4e20703
CPLL_MODE_NORMAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CPLL_MODE_NORMAL,$/;"	e	enum:__anon3783c4e20703
CPLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CPLL_MODE_SHIFT		= 8,$/;"	e	enum:__anon3783c4e20703
CPLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	CPLL_MODE_SLOW		= 0,$/;"	e	enum:__anon3783c4e20703
CPLOAD	arch/mips/include/asm/asm.h	/^#define CPLOAD(/;"	d
CPM0	arch/powerpc/dts/canyonlands.dts	/^	CPM0: cpm {$/;"	l
CPM0_ER	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPM0_ER	/;"	d
CPM1_ER	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPM1_ER	/;"	d
CPMFCR_BDB	arch/powerpc/include/asm/cpm_8260.h	/^#define CPMFCR_BDB	/;"	d
CPMFCR_BDB	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPMFCR_BDB	/;"	d
CPMFCR_DTB	arch/powerpc/include/asm/cpm_8260.h	/^#define CPMFCR_DTB	/;"	d
CPMFCR_DTB	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPMFCR_DTB	/;"	d
CPMFCR_EB	arch/powerpc/include/asm/cpm_8260.h	/^#define CPMFCR_EB	/;"	d
CPMFCR_EB	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPMFCR_EB	/;"	d
CPMFCR_GBL	arch/powerpc/include/asm/cpm_8260.h	/^#define CPMFCR_GBL	/;"	d
CPMFCR_GBL	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPMFCR_GBL	/;"	d
CPMFCR_TC2	arch/powerpc/include/asm/cpm_8260.h	/^#define CPMFCR_TC2	/;"	d
CPMFCR_TC2	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPMFCR_TC2	/;"	d
CPMFSMSR_FSM_STATE_MASK	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define CPMFSMSR_FSM_STATE_MASK	/;"	d	file:
CPMT_CLOCK_DIV	examples/standalone/timer.c	/^#define	CPMT_CLOCK_DIV	/;"	d	file:
CPMT_EVENT_CAP	examples/standalone/timer.c	/^#define	CPMT_EVENT_CAP	/;"	d	file:
CPMT_EVENT_REF	examples/standalone/timer.c	/^#define	CPMT_EVENT_REF	/;"	d	file:
CPMT_GCR_FRZ	examples/standalone/timer.c	/^#define	CPMT_GCR_FRZ	/;"	d	file:
CPMT_GCR_GM_CAS	examples/standalone/timer.c	/^#define	CPMT_GCR_GM_CAS	/;"	d	file:
CPMT_GCR_MASK	examples/standalone/timer.c	/^#define	CPMT_GCR_MASK	/;"	d	file:
CPMT_GCR_RST	examples/standalone/timer.c	/^#define	CPMT_GCR_RST	/;"	d	file:
CPMT_GCR_STP	examples/standalone/timer.c	/^#define	CPMT_GCR_STP	/;"	d	file:
CPMT_MAX_INTERVAL	examples/standalone/timer.c	/^#define	CPMT_MAX_INTERVAL	/;"	d	file:
CPMT_MAX_PRESCALER	examples/standalone/timer.c	/^#define	CPMT_MAX_PRESCALER	/;"	d	file:
CPMT_MAX_REFERENCE	examples/standalone/timer.c	/^#define CPMT_MAX_REFERENCE	/;"	d	file:
CPMT_MAX_TICKS	examples/standalone/timer.c	/^#define	CPMT_MAX_TICKS	/;"	d	file:
CPMT_MAX_TICKS_WITH_DIV	examples/standalone/timer.c	/^#define	CPMT_MAX_TICKS_WITH_DIV	/;"	d	file:
CPMT_MR_CE_ANY	examples/standalone/timer.c	/^#define	CPMT_MR_CE_ANY	/;"	d	file:
CPMT_MR_CE_DIS	examples/standalone/timer.c	/^#define	CPMT_MR_CE_DIS	/;"	d	file:
CPMT_MR_CE_FALL	examples/standalone/timer.c	/^#define CPMT_MR_CE_FALL	/;"	d	file:
CPMT_MR_CE_RISE	examples/standalone/timer.c	/^#define	CPMT_MR_CE_RISE	/;"	d	file:
CPMT_MR_FRR	examples/standalone/timer.c	/^#define	CPMT_MR_FRR	/;"	d	file:
CPMT_MR_GE	examples/standalone/timer.c	/^#define	CPMT_MR_GE	/;"	d	file:
CPMT_MR_ICLK_CASC	examples/standalone/timer.c	/^#define	CPMT_MR_ICLK_CASC	/;"	d	file:
CPMT_MR_ICLK_CLK	examples/standalone/timer.c	/^#define	CPMT_MR_ICLK_CLK	/;"	d	file:
CPMT_MR_ICLK_CLKDIV	examples/standalone/timer.c	/^#define	CPMT_MR_ICLK_CLKDIV	/;"	d	file:
CPMT_MR_ICLK_TIN	examples/standalone/timer.c	/^#define	CPMT_MR_ICLK_TIN	/;"	d	file:
CPMT_MR_OM	examples/standalone/timer.c	/^#define	CPMT_MR_OM	/;"	d	file:
CPMT_MR_ORI	examples/standalone/timer.c	/^#define	CPMT_MR_ORI	/;"	d	file:
CPMT_PRESCALER	examples/standalone/timer.c	/^#define	CPMT_PRESCALER	/;"	d	file:
CPMVEC_ERROR	include/commproc.h	/^#define CPMVEC_ERROR	/;"	d
CPMVEC_I2C	include/commproc.h	/^#define CPMVEC_I2C	/;"	d
CPMVEC_IDMA1	include/commproc.h	/^#define CPMVEC_IDMA1	/;"	d
CPMVEC_IDMA2	include/commproc.h	/^#define CPMVEC_IDMA2	/;"	d
CPMVEC_NR	include/commproc.h	/^#define CPMVEC_NR	/;"	d
CPMVEC_OFFSET	include/commproc.h	/^#define CPMVEC_OFFSET /;"	d
CPMVEC_PIO_PC10	include/commproc.h	/^#define CPMVEC_PIO_PC10	/;"	d
CPMVEC_PIO_PC11	include/commproc.h	/^#define CPMVEC_PIO_PC11	/;"	d
CPMVEC_PIO_PC12	include/commproc.h	/^#define CPMVEC_PIO_PC12	/;"	d
CPMVEC_PIO_PC13	include/commproc.h	/^#define CPMVEC_PIO_PC13	/;"	d
CPMVEC_PIO_PC14	include/commproc.h	/^#define CPMVEC_PIO_PC14	/;"	d
CPMVEC_PIO_PC15	include/commproc.h	/^#define CPMVEC_PIO_PC15	/;"	d
CPMVEC_PIO_PC4	include/commproc.h	/^#define CPMVEC_PIO_PC4	/;"	d
CPMVEC_PIO_PC5	include/commproc.h	/^#define CPMVEC_PIO_PC5	/;"	d
CPMVEC_PIO_PC6	include/commproc.h	/^#define CPMVEC_PIO_PC6	/;"	d
CPMVEC_PIO_PC7	include/commproc.h	/^#define CPMVEC_PIO_PC7	/;"	d
CPMVEC_PIO_PC8	include/commproc.h	/^#define CPMVEC_PIO_PC8	/;"	d
CPMVEC_PIO_PC9	include/commproc.h	/^#define CPMVEC_PIO_PC9	/;"	d
CPMVEC_RISCTIMER	include/commproc.h	/^#define CPMVEC_RISCTIMER	/;"	d
CPMVEC_SCC1	include/commproc.h	/^#define CPMVEC_SCC1	/;"	d
CPMVEC_SCC2	include/commproc.h	/^#define CPMVEC_SCC2	/;"	d
CPMVEC_SCC3	include/commproc.h	/^#define CPMVEC_SCC3	/;"	d
CPMVEC_SCC4	include/commproc.h	/^#define CPMVEC_SCC4	/;"	d
CPMVEC_SDMA_CB_ERR	include/commproc.h	/^#define CPMVEC_SDMA_CB_ERR	/;"	d
CPMVEC_SMC1	include/commproc.h	/^#define CPMVEC_SMC1	/;"	d
CPMVEC_SMC2	include/commproc.h	/^#define CPMVEC_SMC2	/;"	d
CPMVEC_SPI	include/commproc.h	/^#define CPMVEC_SPI	/;"	d
CPMVEC_TIMER1	include/commproc.h	/^#define CPMVEC_TIMER1	/;"	d
CPMVEC_TIMER2	include/commproc.h	/^#define CPMVEC_TIMER2	/;"	d
CPMVEC_TIMER3	include/commproc.h	/^#define CPMVEC_TIMER3	/;"	d
CPMVEC_TIMER4	include/commproc.h	/^#define CPMVEC_TIMER4	/;"	d
CPM_BOOTCOUNT_ADDR	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BOOTCOUNT_ADDR	/;"	d
CPM_BOOTCOUNT_ADDR	include/commproc.h	/^#define CPM_BOOTCOUNT_ADDR	/;"	d
CPM_BRG_ATB	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_ATB	/;"	d
CPM_BRG_ATB	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_ATB	/;"	d
CPM_BRG_ATB	include/commproc.h	/^#define CPM_BRG_ATB	/;"	d
CPM_BRG_CD_MASK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_CD_MASK	/;"	d
CPM_BRG_CD_MASK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_CD_MASK	/;"	d
CPM_BRG_CD_MASK	include/commproc.h	/^#define CPM_BRG_CD_MASK	/;"	d
CPM_BRG_DIV16	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_DIV16	/;"	d
CPM_BRG_DIV16	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_DIV16	/;"	d
CPM_BRG_DIV16	include/commproc.h	/^#define CPM_BRG_DIV16	/;"	d
CPM_BRG_EN	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_EN	/;"	d
CPM_BRG_EN	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_EN	/;"	d
CPM_BRG_EN	include/commproc.h	/^#define CPM_BRG_EN	/;"	d
CPM_BRG_EXTC_CLK2	include/commproc.h	/^#define CPM_BRG_EXTC_CLK2	/;"	d
CPM_BRG_EXTC_CLK3_9	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_EXTC_CLK3_9	/;"	d
CPM_BRG_EXTC_CLK3_9	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_EXTC_CLK3_9	/;"	d
CPM_BRG_EXTC_CLK5_15	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_EXTC_CLK5_15	/;"	d
CPM_BRG_EXTC_CLK5_15	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_EXTC_CLK5_15	/;"	d
CPM_BRG_EXTC_CLK6	include/commproc.h	/^#define CPM_BRG_EXTC_CLK6	/;"	d
CPM_BRG_EXTC_INT	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_EXTC_INT	/;"	d
CPM_BRG_EXTC_INT	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_EXTC_INT	/;"	d
CPM_BRG_EXTC_INT	include/commproc.h	/^#define CPM_BRG_EXTC_INT	/;"	d
CPM_BRG_RST	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_BRG_RST	/;"	d
CPM_BRG_RST	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_BRG_RST	/;"	d
CPM_BRG_RST	include/commproc.h	/^#define CPM_BRG_RST	/;"	d
CPM_CR_CHAN	include/commproc.h	/^#define CPM_CR_CHAN	/;"	d
CPM_CR_CH_I2C	include/commproc.h	/^#define CPM_CR_CH_I2C	/;"	d
CPM_CR_CH_SCC	arch/powerpc/cpu/mpc8xx/serial.c	/^#define CPM_CR_CH_SCC	/;"	d	file:
CPM_CR_CH_SCC1	include/commproc.h	/^#define CPM_CR_CH_SCC1	/;"	d
CPM_CR_CH_SCC2	include/commproc.h	/^#define CPM_CR_CH_SCC2	/;"	d
CPM_CR_CH_SCC3	include/commproc.h	/^#define CPM_CR_CH_SCC3	/;"	d
CPM_CR_CH_SCC4	include/commproc.h	/^#define CPM_CR_CH_SCC4	/;"	d
CPM_CR_CH_SMC	arch/powerpc/cpu/mpc8xx/serial.c	/^#define CPM_CR_CH_SMC	/;"	d	file:
CPM_CR_CH_SMC1	include/commproc.h	/^#define CPM_CR_CH_SMC1	/;"	d
CPM_CR_CH_SMC2	include/commproc.h	/^#define CPM_CR_CH_SMC2	/;"	d
CPM_CR_CH_SPI	include/commproc.h	/^#define CPM_CR_CH_SPI	/;"	d
CPM_CR_ENET	include/commproc.h	/^#define	CPM_CR_ENET	/;"	d
CPM_CR_ENET	include/commproc.h	/^#define CPM_CR_ENET	/;"	d
CPM_CR_ENET_PAGE	arch/powerpc/cpu/mpc8260/ether_scc.c	/^#  define CPM_CR_ENET_PAGE /;"	d	file:
CPM_CR_ENET_SBLOCK	arch/powerpc/cpu/mpc8260/ether_scc.c	/^#  define CPM_CR_ENET_SBLOCK /;"	d	file:
CPM_CR_FCC1_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FCC1_PAGE	/;"	d
CPM_CR_FCC1_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FCC1_PAGE	/;"	d
CPM_CR_FCC1_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FCC1_SBLOCK	/;"	d
CPM_CR_FCC1_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FCC1_SBLOCK	/;"	d
CPM_CR_FCC2_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FCC2_PAGE	/;"	d
CPM_CR_FCC2_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FCC2_PAGE	/;"	d
CPM_CR_FCC2_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FCC2_SBLOCK	/;"	d
CPM_CR_FCC2_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FCC2_SBLOCK	/;"	d
CPM_CR_FCC3_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FCC3_PAGE	/;"	d
CPM_CR_FCC3_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FCC3_PAGE	/;"	d
CPM_CR_FCC3_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FCC3_SBLOCK	/;"	d
CPM_CR_FCC3_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FCC3_SBLOCK	/;"	d
CPM_CR_FLG	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_FLG	/;"	d
CPM_CR_FLG	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_FLG	/;"	d
CPM_CR_FLG	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_FLG /;"	d	file:
CPM_CR_FLG	include/commproc.h	/^#define CPM_CR_FLG	/;"	d
CPM_CR_GRACEFUL_STOP_TX	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define CPM_CR_GRACEFUL_STOP_TX	/;"	d	file:
CPM_CR_HUNT_MODE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_HUNT_MODE	/;"	d
CPM_CR_HUNT_MODE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_HUNT_MODE	/;"	d
CPM_CR_HUNT_MODE	include/commproc.h	/^#define CPM_CR_HUNT_MODE	/;"	d
CPM_CR_I2C_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_I2C_PAGE	/;"	d
CPM_CR_I2C_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_I2C_PAGE	/;"	d
CPM_CR_I2C_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_I2C_SBLOCK	/;"	d
CPM_CR_I2C_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_I2C_SBLOCK	/;"	d
CPM_CR_IDMA1_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA1_PAGE	/;"	d
CPM_CR_IDMA1_PAGE	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA1_PAGE /;"	d	file:
CPM_CR_IDMA1_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA1_SBLOCK	/;"	d
CPM_CR_IDMA1_SBLOCK	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA1_SBLOCK /;"	d	file:
CPM_CR_IDMA2_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA2_PAGE	/;"	d
CPM_CR_IDMA2_PAGE	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA2_PAGE /;"	d	file:
CPM_CR_IDMA2_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA2_SBLOCK	/;"	d
CPM_CR_IDMA2_SBLOCK	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA2_SBLOCK /;"	d	file:
CPM_CR_IDMA3_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA3_PAGE	/;"	d
CPM_CR_IDMA3_PAGE	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA3_PAGE /;"	d	file:
CPM_CR_IDMA3_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA3_SBLOCK	/;"	d
CPM_CR_IDMA3_SBLOCK	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA3_SBLOCK /;"	d	file:
CPM_CR_IDMA4_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA4_PAGE	/;"	d
CPM_CR_IDMA4_PAGE	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA4_PAGE /;"	d	file:
CPM_CR_IDMA4_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_IDMA4_SBLOCK	/;"	d
CPM_CR_IDMA4_SBLOCK	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_IDMA4_SBLOCK /;"	d	file:
CPM_CR_INIT_RX	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_INIT_RX	/;"	d
CPM_CR_INIT_RX	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_INIT_RX	/;"	d
CPM_CR_INIT_RX	include/commproc.h	/^#define CPM_CR_INIT_RX	/;"	d
CPM_CR_INIT_TRX	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_INIT_TRX	/;"	d
CPM_CR_INIT_TRX	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_INIT_TRX	/;"	d
CPM_CR_INIT_TRX	examples/standalone/mem_to_mem_idma2intr.c	/^#define CPM_CR_INIT_TRX /;"	d	file:
CPM_CR_INIT_TRX	include/commproc.h	/^#define CPM_CR_INIT_TRX	/;"	d
CPM_CR_INIT_TX	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_INIT_TX	/;"	d
CPM_CR_INIT_TX	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_INIT_TX	/;"	d
CPM_CR_INIT_TX	include/commproc.h	/^#define CPM_CR_INIT_TX	/;"	d
CPM_CR_MCC1_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_MCC1_PAGE	/;"	d
CPM_CR_MCC1_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_MCC1_PAGE	/;"	d
CPM_CR_MCC1_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_MCC1_SBLOCK	/;"	d
CPM_CR_MCC1_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_MCC1_SBLOCK	/;"	d
CPM_CR_MCC2_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_MCC2_PAGE	/;"	d
CPM_CR_MCC2_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_MCC2_PAGE	/;"	d
CPM_CR_MCN	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_MCN	/;"	d
CPM_CR_MCN	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_MCN	/;"	d
CPM_CR_OPCODE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_OPCODE	/;"	d
CPM_CR_OPCODE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_OPCODE	/;"	d
CPM_CR_OPCODE	include/commproc.h	/^#define CPM_CR_OPCODE	/;"	d
CPM_CR_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_PAGE	/;"	d
CPM_CR_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_PAGE	/;"	d
CPM_CR_RAND_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_RAND_PAGE	/;"	d
CPM_CR_RAND_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_RAND_PAGE	/;"	d
CPM_CR_RAND_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_RAND_SBLOCK	/;"	d
CPM_CR_RAND_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_RAND_SBLOCK	/;"	d
CPM_CR_RESTART_TX	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_RESTART_TX	/;"	d
CPM_CR_RESTART_TX	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_RESTART_TX	/;"	d
CPM_CR_RESTART_TX	include/commproc.h	/^#define CPM_CR_RESTART_TX	/;"	d
CPM_CR_RST	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_RST	/;"	d
CPM_CR_RST	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_RST	/;"	d
CPM_CR_RST	include/commproc.h	/^#define CPM_CR_RST	/;"	d
CPM_CR_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SBLOCK	/;"	d
CPM_CR_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SBLOCK	/;"	d
CPM_CR_SCC1_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC1_PAGE	/;"	d
CPM_CR_SCC1_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC1_PAGE	/;"	d
CPM_CR_SCC1_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC1_SBLOCK	/;"	d
CPM_CR_SCC1_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC1_SBLOCK	/;"	d
CPM_CR_SCC2_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC2_PAGE	/;"	d
CPM_CR_SCC2_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC2_PAGE	/;"	d
CPM_CR_SCC2_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC2_SBLOCK	/;"	d
CPM_CR_SCC2_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC2_SBLOCK	/;"	d
CPM_CR_SCC3_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC3_PAGE	/;"	d
CPM_CR_SCC3_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC3_PAGE	/;"	d
CPM_CR_SCC3_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC3_SBLOCK	/;"	d
CPM_CR_SCC3_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC3_SBLOCK	/;"	d
CPM_CR_SCC4_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC4_PAGE	/;"	d
CPM_CR_SCC4_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC4_PAGE	/;"	d
CPM_CR_SCC4_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SCC4_SBLOCK	/;"	d
CPM_CR_SCC4_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SCC4_SBLOCK	/;"	d
CPM_CR_SCC_PAGE	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define CPM_CR_SCC_PAGE	/;"	d	file:
CPM_CR_SCC_PAGE	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^#define CPM_CR_SCC_PAGE	/;"	d	file:
CPM_CR_SCC_SBLOCK	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define CPM_CR_SCC_SBLOCK	/;"	d	file:
CPM_CR_SCC_SBLOCK	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^#define CPM_CR_SCC_SBLOCK	/;"	d	file:
CPM_CR_SET_GADDR	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SET_GADDR	/;"	d
CPM_CR_SET_GADDR	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SET_GADDR	/;"	d
CPM_CR_SET_GADDR	include/commproc.h	/^#define CPM_CR_SET_GADDR	/;"	d
CPM_CR_SMC1_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SMC1_PAGE	/;"	d
CPM_CR_SMC1_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SMC1_SBLOCK	/;"	d
CPM_CR_SMC1_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SMC1_SBLOCK	/;"	d
CPM_CR_SMC2_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SMC2_PAGE	/;"	d
CPM_CR_SMC2_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SMC2_SBLOCK	/;"	d
CPM_CR_SMC2_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SMC2_SBLOCK	/;"	d
CPM_CR_SMC_PAGE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define CPM_CR_SMC_PAGE	/;"	d	file:
CPM_CR_SMC_SBLOCK	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define CPM_CR_SMC_SBLOCK	/;"	d	file:
CPM_CR_SPI_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SPI_PAGE	/;"	d
CPM_CR_SPI_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SPI_PAGE	/;"	d
CPM_CR_SPI_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_SPI_SBLOCK	/;"	d
CPM_CR_SPI_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_SPI_SBLOCK	/;"	d
CPM_CR_STOP_TX	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_STOP_TX	/;"	d
CPM_CR_STOP_TX	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_STOP_TX	/;"	d
CPM_CR_STOP_TX	include/commproc.h	/^#define CPM_CR_STOP_TX	/;"	d
CPM_CR_TIMER_PAGE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_TIMER_PAGE	/;"	d
CPM_CR_TIMER_PAGE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_TIMER_PAGE	/;"	d
CPM_CR_TIMER_SBLOCK	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_CR_TIMER_SBLOCK	/;"	d
CPM_CR_TIMER_SBLOCK	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_CR_TIMER_SBLOCK	/;"	d
CPM_DATAONLY_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_DATAONLY_BASE	/;"	d
CPM_DATAONLY_BASE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_DATAONLY_BASE	/;"	d
CPM_DATAONLY_BASE	include/commproc.h	/^#define CPM_DATAONLY_BASE	/;"	d
CPM_DATAONLY_SIZE	arch/powerpc/cpu/mpc85xx/commproc.c	/^#define CPM_DATAONLY_SIZE	/;"	d	file:
CPM_DATAONLY_SIZE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_DATAONLY_SIZE	/;"	d
CPM_DATAONLY_SIZE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_DATAONLY_SIZE	/;"	d
CPM_DATAONLY_SIZE	include/commproc.h	/^#define CPM_DATAONLY_SIZE	/;"	d
CPM_DP_NOSPACE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_DP_NOSPACE	/;"	d
CPM_DP_NOSPACE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_DP_NOSPACE	/;"	d
CPM_DP_NOSPACE	include/commproc.h	/^#define CPM_DP_NOSPACE	/;"	d
CPM_FCC_SPECIAL_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_FCC_SPECIAL_BASE	/;"	d
CPM_FCC_SPECIAL_BASE	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_FCC_SPECIAL_BASE	/;"	d
CPM_FEC_BASE	include/commproc.h	/^#define CPM_FEC_BASE	/;"	d
CPM_I2C_BASE	include/commproc.h	/^#define CPM_I2C_BASE	/;"	d
CPM_INTERRUPT	include/mpc8xx_irq.h	/^# define CPM_INTERRUPT	/;"	d
CPM_POST_BASE	include/commproc.h	/^#define CPM_POST_BASE	/;"	d
CPM_POST_WORD_ADDR	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_POST_WORD_ADDR	/;"	d
CPM_POST_WORD_ADDR	arch/powerpc/include/asm/cpm_8260.h	/^#define CPM_POST_WORD_ADDR /;"	d
CPM_POST_WORD_ADDR	arch/powerpc/include/asm/cpm_85xx.h	/^#define CPM_POST_WORD_ADDR /;"	d
CPM_POST_WORD_ADDR	include/commproc.h	/^#define CPM_POST_WORD_ADDR	/;"	d
CPM_POST_WORD_ADDR	include/configs/km8360.h	/^#define CPM_POST_WORD_ADDR /;"	d
CPM_SCC_BASE	include/commproc.h	/^#define CPM_SCC_BASE	/;"	d
CPM_SERIAL2_BASE	include/commproc.h	/^#define CPM_SERIAL2_BASE	/;"	d
CPM_SERIAL_BASE	include/commproc.h	/^#define CPM_SERIAL_BASE	/;"	d
CPM_SPI_BASE	arch/powerpc/cpu/mpc8260/spi.c	/^#define CPM_SPI_BASE /;"	d	file:
CPM_SPI_BASE	include/commproc.h	/^#define CPM_SPI_BASE	/;"	d
CPM_USB_BASE	include/usb/mpc8xx_udc.h	/^#define CPM_USB_BASE	/;"	d
CPM_USB_DR0_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_DR0_BASE	/;"	d	file:
CPM_USB_DR1_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_DR1_BASE	/;"	d	file:
CPM_USB_DT0_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_DT0_BASE	/;"	d	file:
CPM_USB_DT1_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_DT1_BASE	/;"	d	file:
CPM_USB_EP0_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_EP0_BASE	/;"	d	file:
CPM_USB_EP1_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_EP1_BASE	/;"	d	file:
CPM_USB_RX0_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_RX0_BASE	/;"	d	file:
CPM_USB_RX1_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_RX1_BASE	/;"	d	file:
CPM_USB_TX0_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_TX0_BASE	/;"	d	file:
CPM_USB_TX1_BASE	post/cpu/mpc8xx/usb.c	/^#define CPM_USB_TX1_BASE	/;"	d	file:
CPM_WLKBD_BASE	include/commproc.h	/^#define CPM_WLKBD_BASE	/;"	d
CPOL	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define CPOL	/;"	d
CPOS_CC0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CPOS_CC0 /;"	d
CPOS_CC1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CPOS_CC1 /;"	d
CPOS_CXP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CPOS_CXP(/;"	d
CPOS_CYP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CPOS_CYP(/;"	d
CPOS_OP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CPOS_OP /;"	d
CPP	Makefile	/^CPP		= $(CC) -E$/;"	m
CPPFLAGS_init.lds	arch/blackfin/cpu/Makefile	/^CPPFLAGS_init.lds := -ansi$/;"	m
CPP_ASMLINKAGE	include/linux/linkage.h	/^#define CPP_ASMLINKAGE	/;"	d
CPP_ASMLINKAGE	include/linux/linkage.h	/^#define CPP_ASMLINKAGE$/;"	d
CPR0	arch/powerpc/dts/arches.dts	/^	CPR0: cpr {$/;"	l
CPR0	arch/powerpc/dts/canyonlands.dts	/^	CPR0: cpr {$/;"	l
CPR0	arch/powerpc/dts/glacier.dts	/^	CPR0: cpr {$/;"	l
CPR0_CFGADDR	arch/powerpc/include/asm/ppc4xx.h	/^#define CPR0_CFGADDR	/;"	d
CPR0_CFGDATA	arch/powerpc/include/asm/ppc4xx.h	/^#define CPR0_CFGDATA	/;"	d
CPR0_CLKUPD	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_CLKUPD	/;"	d
CPR0_CPUD	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_CPUD	/;"	d
CPR0_DCR_BASE	arch/powerpc/include/asm/ppc4xx.h	/^#define CPR0_DCR_BASE	/;"	d
CPR0_ICFG	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_ICFG	/;"	d
CPR0_ICFG_ICS_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_ICFG_ICS_MASK	/;"	d
CPR0_ICFG_ICS_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_ICFG_ICS_MASK	/;"	d
CPR0_ICFG_RLI_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_ICFG_RLI_MASK	/;"	d
CPR0_ICFG_RLI_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_ICFG_RLI_MASK	/;"	d
CPR0_ICFG_RLI_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CPR0_ICFG_RLI_MASK	/;"	d
CPR0_MALD	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_MALD	/;"	d
CPR0_OPBD0	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_OPBD0	/;"	d
CPR0_OPBD0	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_OPBD0	/;"	d
CPR0_PERC0	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR0_PERC0	/;"	d
CPR0_PERD	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_PERD	/;"	d
CPR0_PERD	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_PERD	/;"	d
CPR0_PERD0	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR0_PERD0	/;"	d
CPR0_PERD1	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR0_PERD1	/;"	d
CPR0_PERD_PERDV0_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_PERD_PERDV0_MASK	/;"	d
CPR0_PERD_PERDV0_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_PERD_PERDV0_MASK	/;"	d
CPR0_PLBD	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_PLBD	/;"	d
CPR0_PLLC	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_PLLC	/;"	d
CPR0_PLLC	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_PLLC	/;"	d
CPR0_PLLC_ENG	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CPR0_PLLC_ENG	/;"	d
CPR0_PLLC_RST	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define CPR0_PLLC_RST	/;"	d
CPR0_PLLD	arch/powerpc/include/asm/ppc405.h	/^#define CPR0_PLLD	/;"	d
CPR0_PLLD	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_PLLD	/;"	d
CPR0_PRIMAD	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR0_PRIMAD	/;"	d
CPR0_PRIMAD0	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_PRIMAD0	/;"	d
CPR0_PRIMBD0	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_PRIMBD0	/;"	d
CPR0_SPCID	arch/powerpc/include/asm/ppc440.h	/^#define CPR0_SPCID	/;"	d
CPR0_SPCID_SPCIDV0_DIV1	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_SPCID_SPCIDV0_DIV1	/;"	d
CPR0_SPCID_SPCIDV0_DIV1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_SPCID_SPCIDV0_DIV1	/;"	d
CPR0_SPCID_SPCIDV0_DIV2	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_SPCID_SPCIDV0_DIV2	/;"	d
CPR0_SPCID_SPCIDV0_DIV2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_SPCID_SPCIDV0_DIV2	/;"	d
CPR0_SPCID_SPCIDV0_DIV3	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_SPCID_SPCIDV0_DIV3	/;"	d
CPR0_SPCID_SPCIDV0_DIV3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_SPCID_SPCIDV0_DIV3	/;"	d
CPR0_SPCID_SPCIDV0_DIV4	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_SPCID_SPCIDV0_DIV4	/;"	d
CPR0_SPCID_SPCIDV0_DIV4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_SPCID_SPCIDV0_DIV4	/;"	d
CPR0_SPCID_SPCIDV0_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define CPR0_SPCID_SPCIDV0_MASK	/;"	d
CPR0_SPCID_SPCIDV0_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define CPR0_SPCID_SPCIDV0_MASK	/;"	d
CPREG_BLEED	arch/arm/mach-exynos/include/mach/dp.h	/^#define CPREG_BLEED	/;"	d
CPRESTORE	arch/mips/include/asm/asm.h	/^#define CPRESTORE(/;"	d
CPRI1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI1,$/;"	e	enum:srds_prtcl
CPRI1	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI1,$/;"	e	enum:srds_prtcl
CPRI2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI2,$/;"	e	enum:srds_prtcl
CPRI2	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI2,$/;"	e	enum:srds_prtcl
CPRI3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI3,$/;"	e	enum:srds_prtcl
CPRI3	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI3,$/;"	e	enum:srds_prtcl
CPRI4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI4,$/;"	e	enum:srds_prtcl
CPRI4	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI4,$/;"	e	enum:srds_prtcl
CPRI5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI5,$/;"	e	enum:srds_prtcl
CPRI5	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI5,$/;"	e	enum:srds_prtcl
CPRI6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI6,$/;"	e	enum:srds_prtcl
CPRI6	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI6,$/;"	e	enum:srds_prtcl
CPRI7	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI7,$/;"	e	enum:srds_prtcl
CPRI7	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI7,$/;"	e	enum:srds_prtcl
CPRI8	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	CPRI8,$/;"	e	enum:srds_prtcl
CPRI8	arch/powerpc/include/asm/fsl_serdes.h	/^	CPRI8,$/;"	e	enum:srds_prtcl
CPRI_ALT_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define CPRI_ALT_CLK_SEL	/;"	d	file:
CPRI_ALT_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define CPRI_ALT_CLK_SHIFT	/;"	d	file:
CPRI_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define CPRI_CLK_SEL	/;"	d	file:
CPRI_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define CPRI_CLK_SHIFT	/;"	d	file:
CPR_CLKUPD_ENDVCH_EN	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR_CLKUPD_ENDVCH_EN	/;"	d
CPR_CLKUPD_ENPLLCH_EN	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR_CLKUPD_ENPLLCH_EN	/;"	d
CPR_PERD0_SPIDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define CPR_PERD0_SPIDV_MASK	/;"	d
CPS00	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS00 /;"	d
CPS01	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS01 /;"	d
CPS02	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS02 /;"	d
CPS03	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS03 /;"	d
CPS04	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS04 /;"	d
CPS05	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS05 /;"	d
CPS06	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS06 /;"	d
CPS07	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define CPS07 /;"	d
CPSW_ALE_OFFSET	drivers/net/cpsw.c	/^#define CPSW_ALE_OFFSET	/;"	d	file:
CPSW_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define CPSW_BASE	/;"	d
CPSW_BASE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define CPSW_BASE	/;"	d
CPSW_BD_OFFSET	drivers/net/cpsw.c	/^#define CPSW_BD_OFFSET	/;"	d	file:
CPSW_CPDMA_OFFSET	drivers/net/cpsw.c	/^#define CPSW_CPDMA_OFFSET	/;"	d	file:
CPSW_CPTS_OFFSET	drivers/net/cpsw.c	/^#define CPSW_CPTS_OFFSET	/;"	d	file:
CPSW_CTL_FIFO_LOOPBACK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_CTL_FIFO_LOOPBACK	/;"	d
CPSW_CTL_P0_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_CTL_P0_ENABLE	/;"	d
CPSW_CTL_P0_PASS_PRI_TAGGED	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_CTL_P0_PASS_PRI_TAGGED	/;"	d
CPSW_CTL_P1_PASS_PRI_TAGGED	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_CTL_P1_PASS_PRI_TAGGED	/;"	d
CPSW_CTL_P2_PASS_PRI_TAGGED	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_CTL_P2_PASS_PRI_TAGGED	/;"	d
CPSW_CTL_VLAN_AWARE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_CTL_VLAN_AWARE	/;"	d
CPSW_CTRL_VERSION_1	include/cpsw.h	/^	CPSW_CTRL_VERSION_1 = 0,$/;"	e	enum:__anon464261ab0103
CPSW_CTRL_VERSION_2	include/cpsw.h	/^	CPSW_CTRL_VERSION_2	\/* am33xx like devices *\/$/;"	e	enum:__anon464261ab0103
CPSW_HOST_PORT_OFFSET	drivers/net/cpsw.c	/^#define CPSW_HOST_PORT_OFFSET	/;"	d	file:
CPSW_HW_STATS	drivers/net/cpsw.c	/^#define CPSW_HW_STATS	/;"	d	file:
CPSW_MDIO_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CPSW_MDIO_BASE	/;"	d
CPSW_MDIO_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CPSW_MDIO_BASE	/;"	d
CPSW_MDIO_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define CPSW_MDIO_BASE	/;"	d
CPSW_MDIO_BASE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define CPSW_MDIO_BASE	/;"	d
CPSW_MDIO_DIV	drivers/net/cpsw.c	/^#define CPSW_MDIO_DIV	/;"	d	file:
CPSW_REG_ALE_CONTROL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_ALE_CONTROL	/;"	d
CPSW_REG_ALE_PORTCTL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_ALE_PORTCTL(/;"	d
CPSW_REG_CTL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_CTL	/;"	d
CPSW_REG_MAXLEN	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_MAXLEN	/;"	d
CPSW_REG_STAT_PORT_EN	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_STAT_PORT_EN	/;"	d
CPSW_REG_VAL_ALE_CTL_BYPASS	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_VAL_ALE_CTL_BYPASS	/;"	d
CPSW_REG_VAL_ALE_CTL_RESET_AND_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_VAL_ALE_CTL_RESET_AND_ENABLE	/;"	d
CPSW_REG_VAL_PORTCTL_FORWARD_MODE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_VAL_PORTCTL_FORWARD_MODE	/;"	d
CPSW_REG_VAL_STAT_ENABLE_ALL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define CPSW_REG_VAL_STAT_ENABLE_ALL	/;"	d
CPSW_SLAVE0_OFFSET	drivers/net/cpsw.c	/^#define CPSW_SLAVE0_OFFSET	/;"	d	file:
CPSW_SLAVE1_OFFSET	drivers/net/cpsw.c	/^#define CPSW_SLAVE1_OFFSET	/;"	d	file:
CPSW_SLAVE_SIZE	drivers/net/cpsw.c	/^#define CPSW_SLAVE_SIZE	/;"	d	file:
CPSW_SLIVER0_OFFSET	drivers/net/cpsw.c	/^#define CPSW_SLIVER0_OFFSET	/;"	d	file:
CPSW_SLIVER1_OFFSET	drivers/net/cpsw.c	/^#define CPSW_SLIVER1_OFFSET	/;"	d	file:
CPSW_STATERAM_OFFSET	drivers/net/cpsw.c	/^#define CPSW_STATERAM_OFFSET	/;"	d	file:
CPU	board/spear/common/spr_misc.c	/^#define CPU	/;"	d	file:
CPU	config.mk	/^CPU := $(CONFIG_SYS_CPU:"%"=%)$/;"	m
CPU	config.mk	/^CPU := arm720t$/;"	m
CPU	drivers/cpu/Kconfig	/^config CPU$/;"	c
CPU0_CLK_STP_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CPU0_CLK_STP_MASK	/;"	d
CPU0_CLK_STP_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CPU0_CLK_STP_SHIFT	/;"	d
CPU0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU0_RESET	/;"	d
CPU1_CLK_STP_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CPU1_CLK_STP_SHIFT	/;"	d
CPU1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define CPU1_RESET	/;"	d
CPU2_CLK_STP_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CPU2_CLK_STP_SHIFT	/;"	d
CPU3_CLK_STP_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define CPU3_CLK_STP_SHIFT	/;"	d
CPUCR_INIT	arch/avr32/cpu/start.S	/^#define CPUCR_INIT /;"	d	file:
CPUDIR	config.mk	/^CPUDIR=arch\/$(ARCH)\/cpu$(if $(CPU),\/$(CPU),)$/;"	m
CPUENTRY	arch/sparc/cpu/leon2/prom.c	/^#define	CPUENTRY(/;"	d	file:
CPUENTRY	arch/sparc/cpu/leon2/prom.c	/^#define CPUENTRY(/;"	d	file:
CPUENTRY	arch/sparc/cpu/leon3/prom.c	/^#define	CPUENTRY(/;"	d	file:
CPUENTRY	arch/sparc/cpu/leon3/prom.c	/^#define CPUENTRY(/;"	d	file:
CPUID_ARM_GENTIMER_MASK	arch/arm/include/asm/armv7.h	/^#define CPUID_ARM_GENTIMER_MASK	/;"	d
CPUID_ARM_GENTIMER_SHIFT	arch/arm/include/asm/armv7.h	/^#define CPUID_ARM_GENTIMER_SHIFT	/;"	d
CPUID_ARM_SEC_MASK	arch/arm/include/asm/armv7.h	/^#define CPUID_ARM_SEC_MASK	/;"	d
CPUID_ARM_SEC_SHIFT	arch/arm/include/asm/armv7.h	/^#define CPUID_ARM_SEC_SHIFT	/;"	d
CPUID_ARM_VIRT_MASK	arch/arm/include/asm/armv7.h	/^#define CPUID_ARM_VIRT_MASK	/;"	d
CPUID_ARM_VIRT_SHIFT	arch/arm/include/asm/armv7.h	/^#define CPUID_ARM_VIRT_SHIFT	/;"	d
CPUID_BROADWELL_C0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_BROADWELL_C0	/;"	d
CPUID_BROADWELL_D0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_BROADWELL_D0	/;"	d
CPUID_BROADWELL_E0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_BROADWELL_E0	/;"	d
CPUID_HASWELL_A0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_HASWELL_A0	/;"	d
CPUID_HASWELL_B0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_HASWELL_B0	/;"	d
CPUID_HASWELL_C0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_HASWELL_C0	/;"	d
CPUID_HASWELL_HALO	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_HASWELL_HALO	/;"	d
CPUID_HASWELL_ULT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_HASWELL_ULT	/;"	d
CPUID_HASWELL_ULT_B0	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define CPUID_HASWELL_ULT_B0	/;"	d
CPUID_LEAF_PM	arch/x86/include/asm/turbo.h	/^#define CPUID_LEAF_PM	/;"	d
CPUID_SMX	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  CPUID_SMX	/;"	d
CPUID_VMX	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  CPUID_VMX	/;"	d
CPUPWRREQ_OE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define CPUPWRREQ_OE	/;"	d
CPUPWRREQ_POL	arch/arm/include/asm/arch-tegra/pmc.h	/^#define CPUPWRREQ_POL	/;"	d
CPUT	arch/microblaze/include/asm/asm.h	/^#define CPUT(/;"	d
CPU_1066MHZ_DDR_400MHZ	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_1066MHZ_DDR_400MHZ,$/;"	e	enum:__anonb2845d370103
CPU_26_PORT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define CPU_26_PORT(/;"	d	file:
CPU_28_PORT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define CPU_28_PORT(/;"	d	file:
CPU_32_PORT	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT(/;"	d
CPU_32_PORT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define CPU_32_PORT(/;"	d	file:
CPU_32_PORT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define CPU_32_PORT(/;"	d	file:
CPU_32_PORT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT(/;"	d	file:
CPU_32_PORT0_16	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT0_16(/;"	d
CPU_32_PORT0_22	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT0_22(/;"	d
CPU_32_PORT0_27	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT0_27(/;"	d
CPU_32_PORT0_28	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT0_28(/;"	d
CPU_32_PORT1	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT1(/;"	d
CPU_32_PORT1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define CPU_32_PORT1(/;"	d	file:
CPU_32_PORT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT1(/;"	d	file:
CPU_32_PORT2	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT2(/;"	d
CPU_32_PORT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT2(/;"	d	file:
CPU_32_PORT_15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_15(/;"	d	file:
CPU_32_PORT_16	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_16(/;"	d	file:
CPU_32_PORT_18	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_18(/;"	d	file:
CPU_32_PORT_26	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_26(/;"	d	file:
CPU_32_PORT_28	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_28(/;"	d	file:
CPU_32_PORT_4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_4(/;"	d	file:
CPU_32_PORT_REV	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_32_PORT_REV(/;"	d
CPU_32_PORT_REV	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define CPU_32_PORT_REV(/;"	d	file:
CPU_32_PORT_REV	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define CPU_32_PORT_REV(/;"	d	file:
CPU_32_PORT_REV	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_32_PORT_REV(/;"	d	file:
CPU_3430	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3430	/;"	d
CPU_37XX_ES10	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_37XX_ES10	/;"	d
CPU_37XX_ES11	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_37XX_ES11	/;"	d
CPU_37XX_ES12	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_37XX_ES12	/;"	d
CPU_37XX_MAX_REV	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_37XX_MAX_REV	/;"	d
CPU_3XX_ES10	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ES10	/;"	d
CPU_3XX_ES20	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ES20	/;"	d
CPU_3XX_ES21	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ES21	/;"	d
CPU_3XX_ES30	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ES30	/;"	d
CPU_3XX_ES31	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ES31	/;"	d
CPU_3XX_ES312	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ES312	/;"	d
CPU_3XX_ID_SHIFT	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_ID_SHIFT	/;"	d
CPU_3XX_MAX_REV	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_3XX_MAX_REV	/;"	d
CPU_667MHZ_DDR_667MHZ	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_667MHZ_DDR_667MHZ,$/;"	e	enum:__anonb2845d370103
CPU_66AK2Ex	arch/arm/mach-keystone/include/mach/hardware.h	/^#define CPU_66AK2Ex	/;"	d
CPU_66AK2Gx	arch/arm/mach-keystone/include/mach/hardware.h	/^#define CPU_66AK2Gx	/;"	d
CPU_66AK2Hx	arch/arm/mach-keystone/include/mach/hardware.h	/^#define CPU_66AK2Hx	/;"	d
CPU_66AK2Lx	arch/arm/mach-keystone/include/mach/hardware.h	/^#define CPU_66AK2Lx	/;"	d
CPU_800MHZ_DDR_800MHZ	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_800MHZ_DDR_800MHZ,$/;"	e	enum:__anonb2845d370103
CPU_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define CPU_ACLK_HZ	/;"	d
CPU_ADDR_BITS	arch/x86/Kconfig	/^config CPU_ADDR_BITS$/;"	c	menu:x86 architecture
CPU_ADDR_BITS	arch/x86/cpu/queensbay/Kconfig	/^config CPU_ADDR_BITS$/;"	c
CPU_ADR_RD_WR	drivers/usb/host/r8a66597.h	/^#define	  CPU_ADR_RD_WR	/;"	d
CPU_ALL_PORT	arch/arm/mach-rmobile/pfc-r8a7740.c	/^#define CPU_ALL_PORT(/;"	d	file:
CPU_ALL_PORT	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define CPU_ALL_PORT(/;"	d
CPU_ALL_PORT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define CPU_ALL_PORT(/;"	d	file:
CPU_ALL_PORT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define CPU_ALL_PORT(/;"	d	file:
CPU_ALL_PORT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define CPU_ALL_PORT(/;"	d	file:
CPU_ALL_PORT	arch/arm/mach-rmobile/pfc-sh73a0.c	/^#define CPU_ALL_PORT(/;"	d	file:
CPU_AM35XX	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_AM35XX	/;"	d
CPU_ARC750D	arch/arc/Kconfig	/^config CPU_ARC750D$/;"	c	choice:ARC architecture""choice763e4ef80204
CPU_ARC770D	arch/arc/Kconfig	/^config CPU_ARC770D$/;"	c	choice:ARC architecture""choice763e4ef80204
CPU_ARCEM6	arch/arc/Kconfig	/^config CPU_ARCEM6$/;"	c	choice:ARC architecture""choice763e4ef80204
CPU_ARCHS36	arch/arc/Kconfig	/^config CPU_ARCHS36$/;"	c	choice:ARC architecture""choice763e4ef80204
CPU_ARCHS38	arch/arc/Kconfig	/^config CPU_ARCHS38$/;"	c	choice:ARC architecture""choice763e4ef80204
CPU_ARCH_ARMv3	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv3	/;"	d
CPU_ARCH_ARMv4	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv4	/;"	d
CPU_ARCH_ARMv4T	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv4T	/;"	d
CPU_ARCH_ARMv5	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv5	/;"	d
CPU_ARCH_ARMv5T	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv5T	/;"	d
CPU_ARCH_ARMv5TE	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv5TE	/;"	d
CPU_ARCH_ARMv5TEJ	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv5TEJ	/;"	d
CPU_ARCH_ARMv6	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv6	/;"	d
CPU_ARCH_ARMv7	arch/arm/include/asm/system.h	/^#define CPU_ARCH_ARMv7	/;"	d
CPU_ARCH_UNKNOWN	arch/arm/include/asm/system.h	/^#define CPU_ARCH_UNKNOWN	/;"	d
CPU_ARM1136	arch/arm/Kconfig	/^config CPU_ARM1136$/;"	c	menu:ARM architecture
CPU_ARM1176	arch/arm/Kconfig	/^config CPU_ARM1176$/;"	c	menu:ARM architecture
CPU_ARM720T	arch/arm/Kconfig	/^config CPU_ARM720T$/;"	c	menu:ARM architecture
CPU_ARM920T	arch/arm/Kconfig	/^config CPU_ARM920T$/;"	c	menu:ARM architecture
CPU_ARM926EJS	arch/arm/Kconfig	/^config CPU_ARM926EJS$/;"	c	menu:ARM architecture
CPU_ARM946ES	arch/arm/Kconfig	/^config CPU_ARM946ES$/;"	c	menu:ARM architecture
CPU_ATTR_BOOTROM	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_BOOTROM = 0x1d,$/;"	e	enum:cpu_attrib
CPU_ATTR_DEV_CS0	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DEV_CS0 = 0x3e,$/;"	e	enum:cpu_attrib
CPU_ATTR_DEV_CS1	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DEV_CS1 = 0x3d,$/;"	e	enum:cpu_attrib
CPU_ATTR_DEV_CS2	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DEV_CS2 = 0x3b,$/;"	e	enum:cpu_attrib
CPU_ATTR_DEV_CS3	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DEV_CS3 = 0x37,$/;"	e	enum:cpu_attrib
CPU_ATTR_DRAM_CS0	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DRAM_CS0 = 0x0e,$/;"	e	enum:cpu_attrib
CPU_ATTR_DRAM_CS1	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DRAM_CS1 = 0x0d,$/;"	e	enum:cpu_attrib
CPU_ATTR_DRAM_CS2	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DRAM_CS2 = 0x0b,$/;"	e	enum:cpu_attrib
CPU_ATTR_DRAM_CS3	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_DRAM_CS3 = 0x07,$/;"	e	enum:cpu_attrib
CPU_ATTR_NANDFLASH	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_NANDFLASH = 0x2f,$/;"	e	enum:cpu_attrib
CPU_ATTR_PCIE_IO	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_PCIE_IO = 0xe0,$/;"	e	enum:cpu_attrib
CPU_ATTR_PCIE_MEM	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_PCIE_MEM = 0xe8,$/;"	e	enum:cpu_attrib
CPU_ATTR_SASRAM	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_SASRAM = 0x01,$/;"	e	enum:cpu_attrib
CPU_ATTR_SPI0_CS0	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_SPI0_CS0 = 0x1e,$/;"	e	enum:cpu_attrib
CPU_ATTR_SPI0_CS1	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_SPI0_CS1 = 0x5e,$/;"	e	enum:cpu_attrib
CPU_ATTR_SPI1_CS2	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_SPI1_CS2 = 0x9a,$/;"	e	enum:cpu_attrib
CPU_ATTR_SPIFLASH	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_ATTR_SPIFLASH = 0x1e,$/;"	e	enum:cpu_attrib
CPU_AVS_CONTROL0_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define CPU_AVS_CONTROL0_REG	/;"	d
CPU_AVS_CONTROL2_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define CPU_AVS_CONTROL2_REG	/;"	d
CPU_AXI_BUS_BASE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define CPU_AXI_BUS_BASE	/;"	d	file:
CPU_BCLK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define CPU_BCLK	/;"	d
CPU_BIG_ENDIAN	arch/arc/Kconfig	/^config CPU_BIG_ENDIAN$/;"	c	menu:ARC architecture
CPU_CFG_CHIP_REV_A	arch/arm/mach-sunxi/dram_sun4i.c	/^#define CPU_CFG_CHIP_REV_A /;"	d	file:
CPU_CFG_CHIP_REV_B	arch/arm/mach-sunxi/dram_sun4i.c	/^#define CPU_CFG_CHIP_REV_B /;"	d	file:
CPU_CFG_CHIP_REV_C1	arch/arm/mach-sunxi/dram_sun4i.c	/^#define CPU_CFG_CHIP_REV_C1 /;"	d	file:
CPU_CFG_CHIP_REV_C2	arch/arm/mach-sunxi/dram_sun4i.c	/^#define CPU_CFG_CHIP_REV_C2 /;"	d	file:
CPU_CFG_CHIP_VER	arch/arm/mach-sunxi/dram_sun4i.c	/^#define CPU_CFG_CHIP_VER(/;"	d	file:
CPU_CFG_CHIP_VER_MASK	arch/arm/mach-sunxi/dram_sun4i.c	/^#define CPU_CFG_CHIP_VER_MASK /;"	d	file:
CPU_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	CPU_CLK,$/;"	e	enum:mxc_main_clock
CPU_CLK_PLL_SEL_APLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_CLK_PLL_SEL_APLL	= 0,$/;"	e	enum:__anon375ccd790103
CPU_CLK_PLL_SEL_DPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_CLK_PLL_SEL_DPLL,$/;"	e	enum:__anon375ccd790103
CPU_CLK_PLL_SEL_GPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_CLK_PLL_SEL_GPLL,$/;"	e	enum:__anon375ccd790103
CPU_CLK_PLL_SEL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_CLK_PLL_SEL_MASK	= 3,$/;"	e	enum:__anon375ccd790103
CPU_CLK_PLL_SEL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_CLK_PLL_SEL_SHIFT	= 14,$/;"	e	enum:__anon375ccd790103
CPU_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CPU_CLK_SRC_OSC24M	/;"	d
CPU_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CPU_CLK_SRC_OSC24M	/;"	d
CPU_CLK_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CPU_CLK_SRC_OSC24M	/;"	d
CPU_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CPU_CLK_SRC_OSC24M	/;"	d
CPU_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CPU_CLK_SRC_OSC24M	/;"	d
CPU_CLK_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CPU_CLK_SRC_OSC24M	/;"	d
CPU_CLK_SRC_PLL1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CPU_CLK_SRC_PLL1	/;"	d
CPU_CLK_SRC_PLL1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CPU_CLK_SRC_PLL1	/;"	d
CPU_CLK_SRC_PLL1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define CPU_CLK_SRC_PLL1	/;"	d
CPU_CLK_SRC_PLL1	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CPU_CLK_SRC_PLL1	/;"	d
CPU_CLK_SRC_PLL1	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CPU_CLK_SRC_PLL1	/;"	d
CPU_CLK_SRC_PLL1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define CPU_CLK_SRC_PLL1	/;"	d
CPU_CLK_SRC_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define CPU_CLK_SRC_SHIFT	/;"	d
CPU_CLK_SRC_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define CPU_CLK_SRC_SHIFT	/;"	d
CPU_CLK_SRC_SHIFT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define CPU_CLK_SRC_SHIFT	/;"	d
CPU_CLK_SRC_SHIFT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define CPU_CLK_SRC_SHIFT	/;"	d
CPU_CLMP	arch/arm/include/asm/arch-tegra/pmc.h	/^#define CPU_CLMP	/;"	d
CPU_CLOCK	board/inversepath/usbarmory/usbarmory.c	/^#define CPU_CLOCK /;"	d	file:
CPU_CLOCK_RATE	include/configs/vct.h	/^#define CPU_CLOCK_RATE	/;"	d
CPU_CMDREG	board/renesas/sh7763rdp/sh7763rdp.c	/^#define CPU_CMDREG	/;"	d	file:
CPU_CMPLX_CPU0_CLK_STP_RUN	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPU0_CLK_STP_RUN	/;"	d
CPU_CMPLX_CPU0_CLK_STP_STOP	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPU0_CLK_STP_STOP	/;"	d
CPU_CMPLX_CPU1_CLK_STP_RUN	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPU1_CLK_STP_RUN	/;"	d
CPU_CMPLX_CPU1_CLK_STP_STOP	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPU1_CLK_STP_STOP	/;"	d
CPU_CMPLX_CPURESET0	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPURESET0	/;"	d
CPU_CMPLX_CPURESET1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPURESET1	/;"	d
CPU_CMPLX_CPU_BRIDGE_CLKDIV_4	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_CPU_BRIDGE_CLKDIV_4	/;"	d
CPU_CMPLX_DBGRESET0	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_DBGRESET0	/;"	d
CPU_CMPLX_DBGRESET1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_DBGRESET1	/;"	d
CPU_CMPLX_DERESET0	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_DERESET0	/;"	d
CPU_CMPLX_DERESET1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_CMPLX_DERESET1	/;"	d
CPU_CONFIGURATION_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CPU_CONFIGURATION_REG(/;"	d
CPU_CONFIGURATION_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CPU_CONFIGURATION_REG(/;"	d
CPU_CONFIG_STATUS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CPU_CONFIG_STATUS_OFFSET	/;"	d
CPU_DACK_ONLY	drivers/usb/host/r8a66597.h	/^#define	  CPU_DACK_ONLY	/;"	d
CPU_DACK_RD_WR	drivers/usb/host/r8a66597.h	/^#define	  CPU_DACK_RD_WR	/;"	d
CPU_DEBUG_CTX	include/bedbug/type.h	/^} CPU_DEBUG_CTX;$/;"	t	typeref:struct:__anon3619a6480108
CPU_FEAT_COUNT	include/cpu.h	/^	CPU_FEAT_COUNT,$/;"	e	enum:__anona509c4360103
CPU_FEAT_DEVICE_ID	include/cpu.h	/^	CPU_FEAT_DEVICE_ID	= 3,	\/* Provides a device ID *\/$/;"	e	enum:__anona509c4360103
CPU_FEAT_L1_CACHE	include/cpu.h	/^	CPU_FEAT_L1_CACHE	= 0,	\/* Supports level 1 cache *\/$/;"	e	enum:__anona509c4360103
CPU_FEAT_MMU	include/cpu.h	/^	CPU_FEAT_MMU		= 1,	\/* Supports virtual memory *\/$/;"	e	enum:__anona509c4360103
CPU_FEAT_UCODE	include/cpu.h	/^	CPU_FEAT_UCODE		= 2,	\/* Requires\/uses microcode *\/$/;"	e	enum:__anona509c4360103
CPU_HAS_H32MXDIV	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define CPU_HAS_H32MXDIV$/;"	d
CPU_HAS_H32MXDIV	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define CPU_HAS_H32MXDIV$/;"	d
CPU_HAS_PCR	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define CPU_HAS_PCR$/;"	d
CPU_HAS_PCR	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define CPU_HAS_PCR$/;"	d
CPU_HAS_PCR	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define CPU_HAS_PCR$/;"	d
CPU_HAS_PIO3	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define CPU_HAS_PIO3$/;"	d
CPU_HAS_PIO3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define CPU_HAS_PIO3$/;"	d
CPU_HAS_PIO3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define CPU_HAS_PIO3$/;"	d
CPU_HCLK_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_HCLK_DIV_MASK	= 3,$/;"	e	enum:__anon375ccd790103
CPU_HCLK_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_HCLK_DIV_SHIFT	= 8,$/;"	e	enum:__anon375ccd790103
CPU_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define CPU_HCLK_HZ	/;"	d
CPU_ID_STR	include/mpc5xxx.h	/^#define CPU_ID_STR	/;"	d
CPU_ID_STR	include/mpc8260.h	/^#define CPU_ID_STR	/;"	d
CPU_MASK_PRODREV	arch/arm/cpu/pxa/cpuinfo.c	/^#define	CPU_MASK_PRODREV	/;"	d	file:
CPU_MASK_PXA_PRODID	arch/arm/cpu/pxa/cpuinfo.c	/^#define	CPU_MASK_PXA_PRODID	/;"	d	file:
CPU_MASK_PXA_REVID	arch/arm/cpu/pxa/cpuinfo.c	/^#define	CPU_MASK_PXA_REVID	/;"	d	file:
CPU_MAX_NAME_LEN	arch/x86/include/asm/cpu.h	/^#define CPU_MAX_NAME_LEN	/;"	d
CPU_MIPS32	arch/mips/Kconfig	/^config CPU_MIPS32$/;"	c	menu:MIPS architecture
CPU_MIPS32_R1	arch/mips/Kconfig	/^config CPU_MIPS32_R1$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CPU_MIPS32_R2	arch/mips/Kconfig	/^config CPU_MIPS32_R2$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CPU_MIPS32_R6	arch/mips/Kconfig	/^config CPU_MIPS32_R6$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CPU_MIPS64	arch/mips/Kconfig	/^config CPU_MIPS64$/;"	c	menu:MIPS architecture
CPU_MIPS64_R1	arch/mips/Kconfig	/^config CPU_MIPS64_R1$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CPU_MIPS64_R2	arch/mips/Kconfig	/^config CPU_MIPS64_R2$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CPU_MIPS64_R6	arch/mips/Kconfig	/^config CPU_MIPS64_R6$/;"	c	choice:MIPS architecture""choiced4351f5b0304
CPU_MRVL_ID_OFFSET	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CPU_MRVL_ID_OFFSET	/;"	d
CPU_MRVL_ID_OFFSET	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define CPU_MRVL_ID_OFFSET	/;"	d
CPU_OMAP34XX	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_OMAP34XX	/;"	d
CPU_OMAP36XX	arch/arm/include/asm/arch-omap3/omap.h	/^#define CPU_OMAP36XX	/;"	d
CPU_PCI_IO_START	arch/powerpc/cpu/mpc8260/pci.c	/^#define CPU_PCI_IO_START /;"	d	file:
CPU_PCI_MEMIO_START	arch/powerpc/cpu/mpc8260/pci.c	/^#define CPU_PCI_MEMIO_START /;"	d	file:
CPU_PCI_MEM_START	arch/powerpc/cpu/mpc8260/pci.c	/^#define CPU_PCI_MEM_START /;"	d	file:
CPU_PCLK_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_PCLK_DIV_MASK	= 7,$/;"	e	enum:__anon375ccd790103
CPU_PCLK_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	CPU_PCLK_DIV_SHIFT	= 12,$/;"	e	enum:__anon375ccd790103
CPU_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define CPU_PCLK_HZ	/;"	d
CPU_PER_RST_B	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define CPU_PER_RST_B	/;"	d	file:
CPU_PHYSMASK_HI	arch/x86/cpu/intel_common/car.S	/^#define CPU_PHYSMASK_HI	/;"	d	file:
CPU_PWRED	arch/arm/include/asm/arch-tegra/pmc.h	/^#define CPU_PWRED	/;"	d
CPU_PXA	arch/arm/Kconfig	/^config CPU_PXA$/;"	c	menu:ARM architecture
CPU_RELEASE_ADDR	include/configs/ls1043a_common.h	/^#define CPU_RELEASE_ADDR /;"	d
CPU_RELEASE_ADDR	include/configs/ls1046a_common.h	/^#define CPU_RELEASE_ADDR /;"	d
CPU_RELEASE_ADDR	include/configs/ls2080a_common.h	/^#define CPU_RELEASE_ADDR	/;"	d
CPU_RELEASE_ADDR	include/configs/s32v234evb.h	/^#define CPU_RELEASE_ADDR /;"	d
CPU_RELEASE_ADDR	include/configs/thunderx_88xx.h	/^#define CPU_RELEASE_ADDR	/;"	d
CPU_RELEASE_ADDR	include/configs/uniphier.h	/^#define CPU_RELEASE_ADDR	/;"	d
CPU_RELEASE_ADDR	include/configs/xilinx_zynqmp.h	/^#define CPU_RELEASE_ADDR	/;"	d
CPU_RESERVED_DDR_RESERVED0	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_RESERVED_DDR_RESERVED0,$/;"	e	enum:__anonb2845d370103
CPU_RESERVED_DDR_RESERVED1	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_RESERVED_DDR_RESERVED1,$/;"	e	enum:__anonb2845d370103
CPU_RESERVED_DDR_RESERVED2	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_RESERVED_DDR_RESERVED2,$/;"	e	enum:__anonb2845d370103
CPU_RESERVED_DDR_RESERVED3	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	CPU_RESERVED_DDR_RESERVED3,$/;"	e	enum:__anonb2845d370103
CPU_RST	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define CPU_RST	/;"	d
CPU_RST_FLAG_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CPU_RST_FLAG_VAL	/;"	d
CPU_SA1100	arch/arm/Kconfig	/^config CPU_SA1100$/;"	c	menu:ARM architecture
CPU_SCALE	board/dbau1x00/lowlevel_init.S	/^#define CPU_SCALE	/;"	d	file:
CPU_SCIF_FNS	drivers/serial/serial_sh.h	/^#define CPU_SCIF_FNS(/;"	d
CPU_SCI_FNS	drivers/serial/serial_sh.h	/^#define CPU_SCI_FNS(/;"	d
CPU_SCIx_FNS	drivers/serial/serial_sh.h	/^#define CPU_SCIx_FNS(/;"	d
CPU_SH2	arch/sh/Kconfig	/^config CPU_SH2$/;"	c	menu:SuperH architecture
CPU_SH2A	arch/sh/Kconfig	/^config CPU_SH2A$/;"	c	menu:SuperH architecture
CPU_SH3	arch/sh/Kconfig	/^config CPU_SH3$/;"	c	menu:SuperH architecture
CPU_SH4	arch/sh/Kconfig	/^config CPU_SH4$/;"	c	menu:SuperH architecture
CPU_SH4A	arch/sh/Kconfig	/^config CPU_SH4A$/;"	c	menu:SuperH architecture
CPU_SPECIFIC_OPTIONS	arch/x86/cpu/broadwell/Kconfig	/^config CPU_SPECIFIC_OPTIONS$/;"	c
CPU_SPECIFIC_OPTIONS	arch/x86/cpu/ivybridge/Kconfig	/^config CPU_SPECIFIC_OPTIONS$/;"	c
CPU_TARGET_DEVICEBUS_BOOTROM_SPI	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_DEVICEBUS_BOOTROM_SPI = 0x1,$/;"	e	enum:cpu_target
CPU_TARGET_DRAM	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_DRAM = 0x0,$/;"	e	enum:cpu_target
CPU_TARGET_ETH01	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_ETH01 = 0x7,$/;"	e	enum:cpu_target
CPU_TARGET_ETH23	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_ETH23 = 0x3,$/;"	e	enum:cpu_target
CPU_TARGET_NAND	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_NAND = 0xd,$/;"	e	enum:cpu_target
CPU_TARGET_PCIE02	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_PCIE02 = 0x4,$/;"	e	enum:cpu_target
CPU_TARGET_PCIE13	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_PCIE13 = 0x8,$/;"	e	enum:cpu_target
CPU_TARGET_SASRAM	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_TARGET_SASRAM = 0x9,$/;"	e	enum:cpu_target
CPU_TO_GT32	board/imgtec/malta/lowlevel_init.S	/^#define CPU_TO_GT32(/;"	d	file:
CPU_TRACE_MODE	board/amcc/yucca/yucca.h	/^	CPU_TRACE_MODE,$/;"	e	enum:config_list
CPU_TRANSFER_SIZE_16	board/micronas/vct/ebi.h	/^#define CPU_TRANSFER_SIZE_16	/;"	d
CPU_TRANSFER_SIZE_32	board/micronas/vct/ebi.h	/^#define CPU_TRANSFER_SIZE_32	/;"	d
CPU_TRANSFER_SIZE_8	board/micronas/vct/ebi.h	/^#define CPU_TRANSFER_SIZE_8	/;"	d
CPU_TYPE_ENTRY	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define CPU_TYPE_ENTRY(/;"	d
CPU_TYPE_ENTRY	arch/powerpc/include/asm/processor.h	/^#define CPU_TYPE_ENTRY(/;"	d
CPU_TYPE_ENTRY_MASK	arch/powerpc/include/asm/processor.h	/^#define CPU_TYPE_ENTRY_MASK(/;"	d
CPU_V7	arch/arm/Kconfig	/^config CPU_V7$/;"	c	menu:ARM architecture
CPU_V7M	arch/arm/Kconfig	/^config CPU_V7M$/;"	c	menu:ARM architecture
CPU_V7_HAS_NONSEC	arch/arm/cpu/armv7/Kconfig	/^config CPU_V7_HAS_NONSEC$/;"	c
CPU_V7_HAS_VIRT	arch/arm/cpu/armv7/Kconfig	/^config CPU_V7_HAS_VIRT$/;"	c
CPU_VALUE_PXA25X	arch/arm/cpu/pxa/cpuinfo.c	/^#define	CPU_VALUE_PXA25X	/;"	d	file:
CPU_VALUE_PXA27X	arch/arm/cpu/pxa/cpuinfo.c	/^#define	CPU_VALUE_PXA27X	/;"	d	file:
CPU_VER	board/xilinx/microblaze-generic/config.mk	/^CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER))$/;"	m
CPU_WIN_DISABLE	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_WIN_DISABLE,$/;"	e	enum:cpu_winen
CPU_WIN_ENABLE	arch/arm/mach-mvebu/include/mach/cpu.h	/^	CPU_WIN_ENABLE$/;"	e	enum:cpu_winen
CPWAIT	arch/arm/cpu/pxa/start.S	/^.macro CPWAIT reg$/;"	m
CP_BASE	board/armltd/integrator/integrator-sc.h	/^#define CP_BASE	/;"	d
CP_DECODE	board/armltd/integrator/integrator-sc.h	/^#define CP_DECODE /;"	d
CP_DECODE_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define CP_DECODE_OFFSET	/;"	d
CP_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define CP_ENABLE	/;"	d
CP_FLASHPROG	board/armltd/integrator/integrator-sc.h	/^#define CP_FLASHPROG /;"	d
CP_FLASHPROG_EXTRABANK	board/armltd/integrator/integrator-sc.h	/^#define CP_FLASHPROG_EXTRABANK	/;"	d
CP_FLASHPROG_FLASHSIZE	board/armltd/integrator/integrator-sc.h	/^#define CP_FLASHPROG_FLASHSIZE	/;"	d
CP_FLASHPROG_FLVPPEN	board/armltd/integrator/integrator-sc.h	/^#define CP_FLASHPROG_FLVPPEN	/;"	d
CP_FLASHPROG_FLWREN	board/armltd/integrator/integrator-sc.h	/^#define CP_FLASHPROG_FLWREN	/;"	d
CP_FLASHPROG_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define CP_FLASHPROG_OFFSET	/;"	d
CP_I2C_ADDR	board/gdsys/common/adv7611.c	/^	CP_I2C_ADDR = 0x22,$/;"	e	enum:__anon3d55bc280103	file:
CP_IB_BASE	include/radeon.h	/^#define CP_IB_BASE	/;"	d
CP_IB_BUFSZ	include/radeon.h	/^#define CP_IB_BUFSZ	/;"	d
CP_IDFIELD	board/armltd/integrator/integrator-sc.h	/^#define CP_IDFIELD /;"	d
CP_IDFIELD_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define CP_IDFIELD_OFFSET	/;"	d
CP_INTREG	board/armltd/integrator/integrator-sc.h	/^#define CP_INTREG /;"	d
CP_INTREG_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define CP_INTREG_OFFSET	/;"	d
CP_MAX_DYN_STOP_LAT	include/radeon.h	/^#define CP_MAX_DYN_STOP_LAT	/;"	d
CP_RB_BASE	include/radeon.h	/^#define CP_RB_BASE	/;"	d
CP_RB_CNTL	include/radeon.h	/^#define CP_RB_CNTL	/;"	d
CP_RB_RPTR	include/radeon.h	/^#define CP_RB_RPTR	/;"	d
CP_RB_RPTR_ADDR	include/radeon.h	/^#define CP_RB_RPTR_ADDR	/;"	d
CP_RB_WPTR	include/radeon.h	/^#define CP_RB_WPTR	/;"	d
CP_RB_WPTR_DELAY	include/radeon.h	/^#define CP_RB_WPTR_DELAY	/;"	d
CPlusCmd	drivers/net/rtl8169.c	/^	CPlusCmd = 0xE0,$/;"	e	enum:RTL8169_registers	file:
CQSPI_CAL_DELAY	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_CAL_DELAY(/;"	d	file:
CQSPI_DECODER_MAX_CS	drivers/spi/cadence_qspi.h	/^#define CQSPI_DECODER_MAX_CS	/;"	d
CQSPI_DUMMY_BYTES_MAX	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_DUMMY_BYTES_MAX	/;"	d	file:
CQSPI_DUMMY_CLKS_PER_BYTE	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_DUMMY_CLKS_PER_BYTE	/;"	d	file:
CQSPI_FIFO_WIDTH	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_FIFO_WIDTH	/;"	d	file:
CQSPI_GET_RD_SRAM_LEVEL	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_GET_RD_SRAM_LEVEL(/;"	d	file:
CQSPI_GET_WR_SRAM_LEVEL	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_GET_WR_SRAM_LEVEL(/;"	d	file:
CQSPI_INDIRECT_READ	drivers/spi/cadence_qspi.c	/^#define CQSPI_INDIRECT_READ	/;"	d	file:
CQSPI_INDIRECT_WRITE	drivers/spi/cadence_qspi.c	/^#define CQSPI_INDIRECT_WRITE	/;"	d	file:
CQSPI_INST_TYPE_DUAL	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_INST_TYPE_DUAL	/;"	d	file:
CQSPI_INST_TYPE_QUAD	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_INST_TYPE_QUAD	/;"	d	file:
CQSPI_INST_TYPE_SINGLE	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_INST_TYPE_SINGLE	/;"	d	file:
CQSPI_IS_ADDR	drivers/spi/cadence_qspi.h	/^#define CQSPI_IS_ADDR(/;"	d
CQSPI_NO_DECODER_MAX_CS	drivers/spi/cadence_qspi.h	/^#define CQSPI_NO_DECODER_MAX_CS	/;"	d
CQSPI_POLL_IDLE_RETRY	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_POLL_IDLE_RETRY	/;"	d	file:
CQSPI_READLCAPTURE	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_READLCAPTURE	/;"	d	file:
CQSPI_READLCAPTURE_BYPASS_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_READLCAPTURE_BYPASS_LSB	/;"	d	file:
CQSPI_READLCAPTURE_DELAY_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_READLCAPTURE_DELAY_LSB	/;"	d	file:
CQSPI_READLCAPTURE_DELAY_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_READLCAPTURE_DELAY_MASK	/;"	d	file:
CQSPI_READ_CAPTURE_MAX_DELAY	drivers/spi/cadence_qspi.h	/^#define CQSPI_READ_CAPTURE_MAX_DELAY	/;"	d
CQSPI_REG_CMDADDRESS	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDADDRESS	/;"	d	file:
CQSPI_REG_CMDCTRL	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL	/;"	d	file:
CQSPI_REG_CMDCTRL_ADDR_EN_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_ADDR_EN_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_ADD_BYTES_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_ADD_BYTES_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_ADD_BYTES_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_ADD_BYTES_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_DUMMY_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_DUMMY_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_DUMMY_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_DUMMY_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_EXECUTE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_EXECUTE_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_INPROGRESS_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_INPROGRESS_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_OPCODE_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_OPCODE_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_OPCODE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_OPCODE_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_RD_BYTES_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_RD_BYTES_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_RD_BYTES_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_RD_BYTES_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_RD_EN_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_RD_EN_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_WR_BYTES_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_WR_BYTES_LSB	/;"	d	file:
CQSPI_REG_CMDCTRL_WR_BYTES_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_WR_BYTES_MASK	/;"	d	file:
CQSPI_REG_CMDCTRL_WR_EN_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDCTRL_WR_EN_LSB	/;"	d	file:
CQSPI_REG_CMDREADDATALOWER	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDREADDATALOWER	/;"	d	file:
CQSPI_REG_CMDREADDATAUPPER	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDREADDATAUPPER	/;"	d	file:
CQSPI_REG_CMDWRITEDATALOWER	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDWRITEDATALOWER	/;"	d	file:
CQSPI_REG_CMDWRITEDATAUPPER	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CMDWRITEDATAUPPER	/;"	d	file:
CQSPI_REG_CONFIG	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG	/;"	d	file:
CQSPI_REG_CONFIG_BAUD_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_BAUD_LSB	/;"	d	file:
CQSPI_REG_CONFIG_BAUD_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_BAUD_MASK	/;"	d	file:
CQSPI_REG_CONFIG_CHIPSELECT_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_CHIPSELECT_LSB	/;"	d	file:
CQSPI_REG_CONFIG_CHIPSELECT_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_CHIPSELECT_MASK	/;"	d	file:
CQSPI_REG_CONFIG_CLK_PHA_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_CLK_PHA_LSB	/;"	d	file:
CQSPI_REG_CONFIG_CLK_POL_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_CLK_POL_LSB	/;"	d	file:
CQSPI_REG_CONFIG_DECODE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_DECODE_MASK	/;"	d	file:
CQSPI_REG_CONFIG_DIRECT_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_DIRECT_MASK	/;"	d	file:
CQSPI_REG_CONFIG_ENABLE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_ENABLE_MASK	/;"	d	file:
CQSPI_REG_CONFIG_IDLE_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_IDLE_LSB	/;"	d	file:
CQSPI_REG_CONFIG_XIP_IMM_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_CONFIG_XIP_IMM_MASK	/;"	d	file:
CQSPI_REG_DELAY	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY	/;"	d	file:
CQSPI_REG_DELAY_TCHSH_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TCHSH_LSB	/;"	d	file:
CQSPI_REG_DELAY_TCHSH_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TCHSH_MASK	/;"	d	file:
CQSPI_REG_DELAY_TSD2D_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TSD2D_LSB	/;"	d	file:
CQSPI_REG_DELAY_TSD2D_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TSD2D_MASK	/;"	d	file:
CQSPI_REG_DELAY_TSHSL_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TSHSL_LSB	/;"	d	file:
CQSPI_REG_DELAY_TSHSL_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TSHSL_MASK	/;"	d	file:
CQSPI_REG_DELAY_TSLCH_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TSLCH_LSB	/;"	d	file:
CQSPI_REG_DELAY_TSLCH_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_DELAY_TSLCH_MASK	/;"	d	file:
CQSPI_REG_INDIRECTRD	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRD	/;"	d	file:
CQSPI_REG_INDIRECTRDBYTES	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRDBYTES	/;"	d	file:
CQSPI_REG_INDIRECTRDSTARTADDR	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRDSTARTADDR	/;"	d	file:
CQSPI_REG_INDIRECTRDWATERMARK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRDWATERMARK	/;"	d	file:
CQSPI_REG_INDIRECTRD_CANCEL_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRD_CANCEL_MASK	/;"	d	file:
CQSPI_REG_INDIRECTRD_DONE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRD_DONE_MASK	/;"	d	file:
CQSPI_REG_INDIRECTRD_INPROGRESS_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRD_INPROGRESS_MASK	/;"	d	file:
CQSPI_REG_INDIRECTRD_START_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTRD_START_MASK	/;"	d	file:
CQSPI_REG_INDIRECTTRIGGER	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTTRIGGER	/;"	d	file:
CQSPI_REG_INDIRECTWR	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWR	/;"	d	file:
CQSPI_REG_INDIRECTWRBYTES	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWRBYTES	/;"	d	file:
CQSPI_REG_INDIRECTWRSTARTADDR	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWRSTARTADDR	/;"	d	file:
CQSPI_REG_INDIRECTWRWATERMARK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWRWATERMARK	/;"	d	file:
CQSPI_REG_INDIRECTWR_CANCEL_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWR_CANCEL_MASK	/;"	d	file:
CQSPI_REG_INDIRECTWR_DONE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWR_DONE_MASK	/;"	d	file:
CQSPI_REG_INDIRECTWR_INPROGRESS_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWR_INPROGRESS_MASK	/;"	d	file:
CQSPI_REG_INDIRECTWR_START_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_INDIRECTWR_START_MASK	/;"	d	file:
CQSPI_REG_IRQMASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_IRQMASK	/;"	d	file:
CQSPI_REG_IRQSTATUS	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_IRQSTATUS	/;"	d	file:
CQSPI_REG_IS_IDLE	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_REG_IS_IDLE(/;"	d	file:
CQSPI_REG_MODE_BIT	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_MODE_BIT	/;"	d	file:
CQSPI_REG_POLL_US	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_REG_POLL_US	/;"	d	file:
CQSPI_REG_RD_INSTR	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR	/;"	d	file:
CQSPI_REG_RD_INSTR_DUMMY_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_DUMMY_LSB	/;"	d	file:
CQSPI_REG_RD_INSTR_DUMMY_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_DUMMY_MASK	/;"	d	file:
CQSPI_REG_RD_INSTR_MODE_EN_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_MODE_EN_LSB	/;"	d	file:
CQSPI_REG_RD_INSTR_OPCODE_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_OPCODE_LSB	/;"	d	file:
CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB	/;"	d	file:
CQSPI_REG_RD_INSTR_TYPE_ADDR_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_TYPE_ADDR_MASK	/;"	d	file:
CQSPI_REG_RD_INSTR_TYPE_DATA_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_TYPE_DATA_LSB	/;"	d	file:
CQSPI_REG_RD_INSTR_TYPE_DATA_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_TYPE_DATA_MASK	/;"	d	file:
CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB	/;"	d	file:
CQSPI_REG_RD_INSTR_TYPE_INSTR_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_RD_INSTR_TYPE_INSTR_MASK	/;"	d	file:
CQSPI_REG_REMAP	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_REMAP	/;"	d	file:
CQSPI_REG_RETRY	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_REG_RETRY	/;"	d	file:
CQSPI_REG_SDRAMLEVEL	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SDRAMLEVEL	/;"	d	file:
CQSPI_REG_SDRAMLEVEL_RD_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SDRAMLEVEL_RD_LSB	/;"	d	file:
CQSPI_REG_SDRAMLEVEL_RD_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SDRAMLEVEL_RD_MASK	/;"	d	file:
CQSPI_REG_SDRAMLEVEL_WR_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SDRAMLEVEL_WR_LSB	/;"	d	file:
CQSPI_REG_SDRAMLEVEL_WR_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SDRAMLEVEL_WR_MASK	/;"	d	file:
CQSPI_REG_SIZE	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE	/;"	d	file:
CQSPI_REG_SIZE_ADDRESS_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE_ADDRESS_LSB	/;"	d	file:
CQSPI_REG_SIZE_ADDRESS_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE_ADDRESS_MASK	/;"	d	file:
CQSPI_REG_SIZE_BLOCK_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE_BLOCK_LSB	/;"	d	file:
CQSPI_REG_SIZE_BLOCK_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE_BLOCK_MASK	/;"	d	file:
CQSPI_REG_SIZE_PAGE_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE_PAGE_LSB	/;"	d	file:
CQSPI_REG_SIZE_PAGE_MASK	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SIZE_PAGE_MASK	/;"	d	file:
CQSPI_REG_SRAMPARTITION	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_SRAMPARTITION	/;"	d	file:
CQSPI_REG_SRAM_FILL_THRESHOLD	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_REG_SRAM_FILL_THRESHOLD	/;"	d	file:
CQSPI_REG_SRAM_THRESHOLD_WORDS	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_REG_SRAM_THRESHOLD_WORDS	/;"	d	file:
CQSPI_REG_WR_INSTR	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_WR_INSTR	/;"	d	file:
CQSPI_REG_WR_INSTR_OPCODE_LSB	drivers/spi/cadence_qspi_apb.c	/^#define	CQSPI_REG_WR_INSTR_OPCODE_LSB	/;"	d	file:
CQSPI_STIG_DATA_LEN_MAX	drivers/spi/cadence_qspi_apb.c	/^#define CQSPI_STIG_DATA_LEN_MAX	/;"	d	file:
CQSPI_STIG_READ	drivers/spi/cadence_qspi.c	/^#define CQSPI_STIG_READ	/;"	d	file:
CQSPI_STIG_WRITE	drivers/spi/cadence_qspi.c	/^#define CQSPI_STIG_WRITE	/;"	d	file:
CR0_DCBIAS_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define CR0_DCBIAS_SHIFT	/;"	d	file:
CR0_DEFAULT	drivers/net/uli526x.c	/^#define CR0_DEFAULT	/;"	d	file:
CR0_EXTCLK_ENA	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define CR0_EXTCLK_ENA	/;"	d	file:
CR0_EXTCLK_ENA	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define CR0_EXTCLK_ENA /;"	d	file:
CR0_MASK	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define CR0_MASK	/;"	d	file:
CR0_MASK	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define CR0_MASK /;"	d	file:
CR0_UDIV_POS	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define CR0_UDIV_POS	/;"	d	file:
CR0_UDIV_POS	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define CR0_UDIV_POS /;"	d	file:
CR1	board/renesas/sh7752evb/spi-boot.c	/^#define CR1	/;"	d	file:
CR1	board/renesas/sh7753evb/spi-boot.c	/^#define CR1	/;"	d	file:
CR1	board/renesas/sh7757lcr/spi-boot.c	/^#define CR1	/;"	d	file:
CR15_DEFAULT	drivers/net/uli526x.c	/^#define CR15_DEFAULT	/;"	d	file:
CR1_BCAP_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define CR1_BCAP_SHIFT	/;"	d	file:
CR1_FCAP_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define CR1_FCAP_SHIFT	/;"	d	file:
CR2	board/renesas/sh7752evb/spi-boot.c	/^#define CR2	/;"	d	file:
CR2	board/renesas/sh7753evb/spi-boot.c	/^#define CR2	/;"	d	file:
CR2	board/renesas/sh7757lcr/spi-boot.c	/^#define CR2	/;"	d	file:
CR3	board/renesas/sh7752evb/spi-boot.c	/^#define CR3	/;"	d	file:
CR3	board/renesas/sh7753evb/spi-boot.c	/^#define CR3	/;"	d	file:
CR3	board/renesas/sh7757lcr/spi-boot.c	/^#define CR3	/;"	d	file:
CR4	board/renesas/sh7752evb/spi-boot.c	/^#define CR4	/;"	d	file:
CR4	board/renesas/sh7753evb/spi-boot.c	/^#define CR4	/;"	d	file:
CR4	board/renesas/sh7757lcr/spi-boot.c	/^#define CR4	/;"	d	file:
CR6_DEFAULT	drivers/net/uli526x.c	/^#define CR6_DEFAULT	/;"	d	file:
CR6_FDM	drivers/net/uli526x.c	/^	CR6_FDM = 0x200, CR6_TXSC = 0x2000, CR6_STI = 0x100000,$/;"	e	enum:uli526x_CR6_bits	file:
CR6_NO_PURGE	drivers/net/uli526x.c	/^	CR6_SFT = 0x200000, CR6_RXA = 0x40000000, CR6_NO_PURGE = 0x20000000$/;"	e	enum:uli526x_CR6_bits	file:
CR6_PAM	drivers/net/uli526x.c	/^	CR6_RXSC = 0x2, CR6_PBF = 0x8, CR6_PM = 0x40, CR6_PAM = 0x80,$/;"	e	enum:uli526x_CR6_bits	file:
CR6_PBF	drivers/net/uli526x.c	/^	CR6_RXSC = 0x2, CR6_PBF = 0x8, CR6_PM = 0x40, CR6_PAM = 0x80,$/;"	e	enum:uli526x_CR6_bits	file:
CR6_PM	drivers/net/uli526x.c	/^	CR6_RXSC = 0x2, CR6_PBF = 0x8, CR6_PM = 0x40, CR6_PAM = 0x80,$/;"	e	enum:uli526x_CR6_bits	file:
CR6_RXA	drivers/net/uli526x.c	/^	CR6_SFT = 0x200000, CR6_RXA = 0x40000000, CR6_NO_PURGE = 0x20000000$/;"	e	enum:uli526x_CR6_bits	file:
CR6_RXSC	drivers/net/uli526x.c	/^	CR6_RXSC = 0x2, CR6_PBF = 0x8, CR6_PM = 0x40, CR6_PAM = 0x80,$/;"	e	enum:uli526x_CR6_bits	file:
CR6_SFT	drivers/net/uli526x.c	/^	CR6_SFT = 0x200000, CR6_RXA = 0x40000000, CR6_NO_PURGE = 0x20000000$/;"	e	enum:uli526x_CR6_bits	file:
CR6_STI	drivers/net/uli526x.c	/^	CR6_FDM = 0x200, CR6_TXSC = 0x2000, CR6_STI = 0x100000,$/;"	e	enum:uli526x_CR6_bits	file:
CR6_TXSC	drivers/net/uli526x.c	/^	CR6_FDM = 0x200, CR6_TXSC = 0x2000, CR6_STI = 0x100000,$/;"	e	enum:uli526x_CR6_bits	file:
CR7	board/renesas/sh7753evb/spi-boot.c	/^#define CR7	/;"	d	file:
CR7_DEFAULT	drivers/net/uli526x.c	/^#define CR7_DEFAULT	/;"	d	file:
CR7_IDX_OR12	board/renesas/sh7753evb/spi-boot.c	/^#define CR7_IDX_OR12	/;"	d	file:
CR8	board/renesas/sh7753evb/spi-boot.c	/^#define CR8	/;"	d	file:
CR9_CRDOUT	drivers/net/uli526x.c	/^#define CR9_CRDOUT	/;"	d	file:
CR9_SRCLK	drivers/net/uli526x.c	/^#define CR9_SRCLK	/;"	d	file:
CR9_SRCS	drivers/net/uli526x.c	/^#define CR9_SRCS	/;"	d	file:
CR9_SROM_READ	drivers/net/uli526x.c	/^#define CR9_SROM_READ	/;"	d	file:
CRAIL	arch/arm/include/asm/arch-tegra/pmc.h	/^#define CRAIL	/;"	d
CRAMFS_16	include/cramfs/cramfs_fs.h	/^#define CRAMFS_16(/;"	d
CRAMFS_24	include/cramfs/cramfs_fs.h	/^#define CRAMFS_24(/;"	d
CRAMFS_32	include/cramfs/cramfs_fs.h	/^#define CRAMFS_32(/;"	d
CRAMFS_FLAG_FSID_VERSION_2	include/cramfs/cramfs_fs.h	/^#define CRAMFS_FLAG_FSID_VERSION_2	/;"	d
CRAMFS_FLAG_HOLES	include/cramfs/cramfs_fs.h	/^#define CRAMFS_FLAG_HOLES	/;"	d
CRAMFS_FLAG_SHIFTED_ROOT_OFFSET	include/cramfs/cramfs_fs.h	/^#define CRAMFS_FLAG_SHIFTED_ROOT_OFFSET /;"	d
CRAMFS_FLAG_SORTED_DIRS	include/cramfs/cramfs_fs.h	/^#define CRAMFS_FLAG_SORTED_DIRS	/;"	d
CRAMFS_FLAG_WRONG_SIGNATURE	include/cramfs/cramfs_fs.h	/^#define CRAMFS_FLAG_WRONG_SIGNATURE	/;"	d
CRAMFS_GET_NAMELEN	include/cramfs/cramfs_fs.h	/^#define CRAMFS_GET_NAMELEN(/;"	d
CRAMFS_GET_OFFSET	include/cramfs/cramfs_fs.h	/^#define CRAMFS_GET_OFFSET(/;"	d
CRAMFS_GID_WIDTH	include/cramfs/cramfs_fs.h	/^#define CRAMFS_GID_WIDTH	/;"	d
CRAMFS_MAGIC	include/cramfs/cramfs_fs.h	/^#define CRAMFS_MAGIC	/;"	d
CRAMFS_MAXPATHLEN	include/cramfs/cramfs_fs.h	/^#define CRAMFS_MAXPATHLEN /;"	d
CRAMFS_MODE_WIDTH	include/cramfs/cramfs_fs.h	/^#define CRAMFS_MODE_WIDTH	/;"	d
CRAMFS_NAMELEN_WIDTH	include/cramfs/cramfs_fs.h	/^#define CRAMFS_NAMELEN_WIDTH	/;"	d
CRAMFS_OFFSET_WIDTH	include/cramfs/cramfs_fs.h	/^#define CRAMFS_OFFSET_WIDTH	/;"	d
CRAMFS_SET_NAMELEN	include/cramfs/cramfs_fs.h	/^#define CRAMFS_SET_NAMELEN(/;"	d
CRAMFS_SET_OFFSET	include/cramfs/cramfs_fs.h	/^#define CRAMFS_SET_OFFSET(/;"	d
CRAMFS_SIGNATURE	include/cramfs/cramfs_fs.h	/^#define CRAMFS_SIGNATURE	/;"	d
CRAMFS_SIZE_WIDTH	include/cramfs/cramfs_fs.h	/^#define CRAMFS_SIZE_WIDTH	/;"	d
CRAMFS_SUPPORTED_FLAGS	include/cramfs/cramfs_fs.h	/^#define CRAMFS_SUPPORTED_FLAGS	/;"	d
CRAMFS_UID_WIDTH	include/cramfs/cramfs_fs.h	/^#define CRAMFS_UID_WIDTH	/;"	d
CRAMINO	fs/cramfs/cramfs.c	/^#define CRAMINO(/;"	d	file:
CRC	drivers/dma/MCD_dmaApi.c	/^#define CRC	/;"	d	file:
CRC	include/lattice.h	/^#define CRC	/;"	d
CRC0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define CRC0_BASE_ADDR	/;"	d
CRC1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define CRC1_BASE_ADDR	/;"	d
CRC2	lib/zlib/inflate.c	/^#  define CRC2(/;"	d	file:
CRC4	lib/zlib/inflate.c	/^#  define CRC4(/;"	d	file:
CRCA	drivers/video/tegra124/sor.h	/^#define CRCA	/;"	d
CRCA_VALID_FALSE	drivers/video/tegra124/sor.h	/^#define CRCA_VALID_FALSE	/;"	d
CRCA_VALID_RST	drivers/video/tegra124/sor.h	/^#define CRCA_VALID_RST	/;"	d
CRCA_VALID_TRUE	drivers/video/tegra124/sor.h	/^#define CRCA_VALID_TRUE	/;"	d
CRCB	drivers/video/tegra124/sor.h	/^#define CRCB	/;"	d
CRCB_CRC_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define CRCB_CRC_DEFAULT_MASK	/;"	d
CRCE	drivers/usb/host/r8a66597.h	/^#define	CRCE	/;"	d
CRCMPR	arch/sh/include/asm/cpu_sh7722.h	/^#define CRCMPR /;"	d
CRCNTR	arch/sh/include/asm/cpu_sh7722.h	/^#define CRCNTR /;"	d
CRCPOLY_BE	drivers/mtd/ubi/crc32defs.h	/^#define CRCPOLY_BE /;"	d
CRCPOLY_LE	drivers/mtd/ubi/crc32defs.h	/^#define CRCPOLY_LE /;"	d
CRCPOLY_LE	net/eth_legacy.c	/^#define CRCPOLY_LE /;"	d	file:
CRC_BAD	fs/jffs2/jffs2_private.h	/^	enum { CRC_UNKNOWN = 0, CRC_OK, CRC_BAD } datacrc;$/;"	e	enum:b_node::__anon416d56020103
CRC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CRC_BASE_ADDR	/;"	d
CRC_BE_BITS	drivers/mtd/ubi/crc32defs.h	/^# define CRC_BE_BITS /;"	d
CRC_CNTRL	drivers/video/tegra124/sor.h	/^#define CRC_CNTRL	/;"	d
CRC_CNTRL_ARM_CRC_ENABLE_DIS	drivers/video/tegra124/sor.h	/^#define CRC_CNTRL_ARM_CRC_ENABLE_DIS	/;"	d
CRC_CNTRL_ARM_CRC_ENABLE_EN	drivers/video/tegra124/sor.h	/^#define CRC_CNTRL_ARM_CRC_ENABLE_EN	/;"	d
CRC_CNTRL_ARM_CRC_ENABLE_NO	drivers/video/tegra124/sor.h	/^#define CRC_CNTRL_ARM_CRC_ENABLE_NO	/;"	d
CRC_CNTRL_ARM_CRC_ENABLE_SHIFT	drivers/video/tegra124/sor.h	/^#define CRC_CNTRL_ARM_CRC_ENABLE_SHIFT	/;"	d
CRC_CNTRL_ARM_CRC_ENABLE_YES	drivers/video/tegra124/sor.h	/^#define CRC_CNTRL_ARM_CRC_ENABLE_YES	/;"	d
CRC_DATA	include/lattice.h	/^#define CRC_DATA	/;"	d
CRC_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define CRC_FUNC_EN_N	/;"	d
CRC_LENGTH	drivers/net/e1000.h	/^#define CRC_LENGTH	/;"	d
CRC_LE_BITS	drivers/mtd/ubi/crc32.c	/^#define CRC_LE_BITS /;"	d	file:
CRC_LE_BITS	drivers/mtd/ubi/crc32defs.h	/^# define CRC_LE_BITS /;"	d
CRC_OK	fs/jffs2/jffs2_private.h	/^	enum { CRC_UNKNOWN = 0, CRC_OK, CRC_BAD } datacrc;$/;"	e	enum:b_node::__anon416d56020103
CRC_SIZE	drivers/net/natsemi.c	/^#define CRC_SIZE	/;"	d	file:
CRC_SIZE	drivers/net/ns8382x.c	/^#define CRC_SIZE /;"	d	file:
CRC_SIZE	drivers/usb/eth/r8152.h	/^#define CRC_SIZE	/;"	d
CRC_SIZE	tools/mkenvimage.c	/^#define CRC_SIZE /;"	d	file:
CRC_UNKNOWN	fs/jffs2/jffs2_private.h	/^	enum { CRC_UNKNOWN = 0, CRC_OK, CRC_BAD } datacrc;$/;"	e	enum:b_node::__anon416d56020103
CRE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CRE	/;"	d
CREAD_HIST_CHAR	common/cli_readline.c	/^#define CREAD_HIST_CHAR	/;"	d	file:
CREATE_ARCH_SYMLINK	arch/Kconfig	/^config CREATE_ARCH_SYMLINK$/;"	c
CREATE_DIRTY_EXCL_D	arch/mips/include/asm/cacheops.h	/^#define CREATE_DIRTY_EXCL_D	/;"	d
CREATE_DIRTY_EXCL_SD	arch/mips/include/asm/cacheops.h	/^#define CREATE_DIRTY_EXCL_SD	/;"	d
CREATE_LDR_ENV	arch/blackfin/config.mk	/^CREATE_LDR_ENV = tools\/envcrc --binary > env-ldr.o$/;"	m
CREATE_LDR_ENV	arch/blackfin/config.mk	/^CREATE_LDR_ENV =$/;"	m
CREG_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define CREG_BASE_ADDR /;"	d
CREP	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CREP	/;"	d
CREQ	include/sym53c8xx.h	/^	#define   CREQ	/;"	d
CRMU_CHIP_IO_PAD_CONTROL_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define CRMU_CHIP_IO_PAD_CONTROL_ADDR	/;"	d
CRMU_MAIL_BOX1	arch/arm/cpu/armv7/bcmcygnus/reset.c	/^#define CRMU_MAIL_BOX1	/;"	d	file:
CRMU_SOFT_RESET_CMD	arch/arm/cpu/armv7/bcmcygnus/reset.c	/^#define CRMU_SOFT_RESET_CMD	/;"	d	file:
CRM_SWRESET	board/abilis/tb100/tb100.c	/^#define CRM_SWRESET	/;"	d	file:
CROLL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	CROLL	/;"	d
CROSS_BUILD_TOOLS	Makefile	/^cross_tools: export CROSS_BUILD_TOOLS=y$/;"	m
CROSS_COMPILE	Makefile	/^CROSS_COMPILE ?=$/;"	m
CROSS_COMPILE	Makefile	/^CROSS_COMPILE=arm-linux-gnu-$/;"	m
CROSS_COMPILE	arch/arc/config.mk	/^CROSS_COMPILE := $(ARC_CROSS_COMPILE)$/;"	m
CROSS_COMPILE	arch/avr32/config.mk	/^CROSS_COMPILE := avr32-linux-$/;"	m
CROSS_COMPILE	arch/blackfin/config.mk	/^CROSS_COMPILE := bfin-uclinux-$/;"	m
CROSS_COMPILE	arch/m68k/config.mk	/^CROSS_COMPILE := m68k-elf-$/;"	m
CROSS_COMPILE	arch/microblaze/config.mk	/^CROSS_COMPILE := mb-$/;"	m
CROSS_COMPILE	arch/nds32/config.mk	/^CROSS_COMPILE := nds32le-linux-$/;"	m
CROSS_COMPILE	arch/nios2/config.mk	/^CROSS_COMPILE := nios2-elf-$/;"	m
CROSS_COMPILE	arch/openrisc/config.mk	/^CROSS_COMPILE := or1k-elf-$/;"	m
CROSS_COMPILE	arch/powerpc/config.mk	/^CROSS_COMPILE := ppc_8xx-$/;"	m
CROSS_COMPILE	arch/sh/config.mk	/^CROSS_COMPILE := sh4-linux-$/;"	m
CROSS_COMPILE	arch/sparc/config.mk	/^CROSS_COMPILE := sparc-linux-$/;"	m
CROSS_COMPILE	arch/x86/cpu/config.mk	/^CROSS_COMPILE ?= i386-linux-$/;"	m
CROSS_COMPILE	arch/xtensa/config.mk	/^CROSS_COMPILE ?= xtensa-linux-$/;"	m
CROSS_COMPILE	board/hisilicon/hikey/build-tf.mak	/^CROSS_COMPILE	:= aarch64-linux-gnu-$/;"	m
CROSS_COMPILE	tools/moveconfig.py	/^CROSS_COMPILE = {$/;"	v
CROS_EC	drivers/misc/Kconfig	/^config CROS_EC$/;"	c	menu:Multifunction device drivers
CROS_EC_CMD_HASH_TIMEOUT_MS	drivers/misc/cros_ec.c	/^	CROS_EC_CMD_HASH_TIMEOUT_MS = 2000,$/;"	e	enum:__anon08366d3d0103	file:
CROS_EC_CMD_TIMEOUT_MS	drivers/misc/cros_ec.c	/^	CROS_EC_CMD_TIMEOUT_MS	= 5000,$/;"	e	enum:__anon08366d3d0103	file:
CROS_EC_ERR	include/cros_ec.h	/^	CROS_EC_ERR = 1,$/;"	e	enum:__anon8b4d510c0103
CROS_EC_ERR_CHECK_VERSION	include/cros_ec.h	/^	CROS_EC_ERR_CHECK_VERSION,$/;"	e	enum:__anon8b4d510c0103
CROS_EC_ERR_DEV_INIT	include/cros_ec.h	/^	CROS_EC_ERR_DEV_INIT,$/;"	e	enum:__anon8b4d510c0103
CROS_EC_ERR_FDT_DECODE	include/cros_ec.h	/^	CROS_EC_ERR_FDT_DECODE,$/;"	e	enum:__anon8b4d510c0103
CROS_EC_ERR_READ_ID	include/cros_ec.h	/^	CROS_EC_ERR_READ_ID,$/;"	e	enum:__anon8b4d510c0103
CROS_EC_I2C	drivers/misc/Kconfig	/^config CROS_EC_I2C$/;"	c	menu:Multifunction device drivers
CROS_EC_KEYB	drivers/input/Kconfig	/^config CROS_EC_KEYB$/;"	c
CROS_EC_KEYSCAN_COLS	include/cros_ec.h	/^#define CROS_EC_KEYSCAN_COLS /;"	d
CROS_EC_LPC	drivers/misc/Kconfig	/^config CROS_EC_LPC$/;"	c	menu:Multifunction device drivers
CROS_EC_OK	include/cros_ec.h	/^	CROS_EC_OK,$/;"	e	enum:__anon8b4d510c0103
CROS_EC_SANDBOX	drivers/misc/Kconfig	/^config CROS_EC_SANDBOX$/;"	c	menu:Multifunction device drivers
CROS_EC_SPI	drivers/misc/Kconfig	/^config CROS_EC_SPI$/;"	c	menu:Multifunction device drivers
CRPB_ALIGN	drivers/block/sata_mv.c	/^#define CRPB_ALIGN	/;"	d	file:
CRQB_ADDR_DEVICE_MASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_DEVICE_MASK	/;"	d	file:
CRQB_ADDR_DEVICE_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_DEVICE_SHIFT	/;"	d	file:
CRQB_ADDR_FEATURE_EXP_MASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_FEATURE_EXP_MASK	/;"	d	file:
CRQB_ADDR_FEATURE_EXP_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_FEATURE_EXP_SHIFT	/;"	d	file:
CRQB_ADDR_LBA_HIGHMASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_HIGHMASK	/;"	d	file:
CRQB_ADDR_LBA_HIGHSHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_HIGHSHIFT	/;"	d	file:
CRQB_ADDR_LBA_HIGH_EXP_MASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_HIGH_EXP_MASK	/;"	d	file:
CRQB_ADDR_LBA_HIGH_EXP_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_HIGH_EXP_SHIFT	/;"	d	file:
CRQB_ADDR_LBA_LOWMASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_LOWMASK	/;"	d	file:
CRQB_ADDR_LBA_LOWSHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_LOWSHIFT	/;"	d	file:
CRQB_ADDR_LBA_LOW_EXP_MASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_LOW_EXP_MASK	/;"	d	file:
CRQB_ADDR_LBA_LOW_EXP_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_LOW_EXP_SHIFT	/;"	d	file:
CRQB_ADDR_LBA_MIDMASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_MIDMASK	/;"	d	file:
CRQB_ADDR_LBA_MIDSHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_MIDSHIFT	/;"	d	file:
CRQB_ADDR_LBA_MID_EXP_MASK	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_MID_EXP_MASK	/;"	d	file:
CRQB_ADDR_LBA_MID_EXP_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_ADDR_LBA_MID_EXP_SHIFT	/;"	d	file:
CRQB_ALIGN	drivers/block/sata_mv.c	/^#define CRQB_ALIGN	/;"	d	file:
CRQB_CMDFEAT_CMDMASK	drivers/block/sata_mv.c	/^#define CRQB_CMDFEAT_CMDMASK	/;"	d	file:
CRQB_CMDFEAT_CMDSHIFT	drivers/block/sata_mv.c	/^#define CRQB_CMDFEAT_CMDSHIFT	/;"	d	file:
CRQB_CMDFEAT_FEATMASK	drivers/block/sata_mv.c	/^#define CRQB_CMDFEAT_FEATMASK	/;"	d	file:
CRQB_CMDFEAT_FEATSHIFT	drivers/block/sata_mv.c	/^#define CRQB_CMDFEAT_FEATSHIFT	/;"	d	file:
CRQB_CNTRLFLAGS_DIR	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_DIR	/;"	d	file:
CRQB_CNTRLFLAGS_DQTAGMASK	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_DQTAGMASK	/;"	d	file:
CRQB_CNTRLFLAGS_DQTAGSHIFT	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_DQTAGSHIFT	/;"	d	file:
CRQB_CNTRLFLAGS_HQTAGMASK	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_HQTAGMASK	/;"	d	file:
CRQB_CNTRLFLAGS_HQTAGSHIFT	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_HQTAGSHIFT	/;"	d	file:
CRQB_CNTRLFLAGS_PMPORTMASK	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_PMPORTMASK	/;"	d	file:
CRQB_CNTRLFLAGS_PMPORTSHIFT	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_PMPORTSHIFT	/;"	d	file:
CRQB_CNTRLFLAGS_PRDMODE	drivers/block/sata_mv.c	/^#define CRQB_CNTRLFLAGS_PRDMODE	/;"	d	file:
CRQB_SECTCOUNT_COUNT_EXP_MASK	drivers/block/sata_mv.c	/^#define CRQB_SECTCOUNT_COUNT_EXP_MASK	/;"	d	file:
CRQB_SECTCOUNT_COUNT_EXP_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_SECTCOUNT_COUNT_EXP_SHIFT	/;"	d	file:
CRQB_SECTCOUNT_COUNT_MASK	drivers/block/sata_mv.c	/^#define CRQB_SECTCOUNT_COUNT_MASK	/;"	d	file:
CRQB_SECTCOUNT_COUNT_SHIFT	drivers/block/sata_mv.c	/^#define CRQB_SECTCOUNT_COUNT_SHIFT	/;"	d	file:
CRR0	arch/sh/include/asm/cpu_sh7722.h	/^#define CRR0 /;"	d
CRR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	CRR0	/;"	d
CRR1	arch/sh/include/asm/cpu_sh7722.h	/^#define CRR1 /;"	d
CRR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	CRR1	/;"	d
CRST	include/sym53c8xx.h	/^  #define   CRST /;"	d
CRT2_ON	include/radeon.h	/^#define CRT2_ON	/;"	d
CRTC2_DISPLAY_BASE_ADDR	include/radeon.h	/^#define CRTC2_DISPLAY_BASE_ADDR	/;"	d
CRTC2_DISPLAY_DIS	include/radeon.h	/^#define CRTC2_DISPLAY_DIS	/;"	d
CRTC2_DISP_REQ_EN_B	include/radeon.h	/^#define CRTC2_DISP_REQ_EN_B	/;"	d
CRTC2_EN	include/radeon.h	/^#define CRTC2_EN	/;"	d
CRTC2_GEN_CNTL	include/radeon.h	/^#define CRTC2_GEN_CNTL	/;"	d
CRTC2_GEN_CNTL__CRT2_ON	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRT2_ON	/;"	d
CRTC2_GEN_CNTL__CRT2_ON_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRT2_ON_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_CUR_EN	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_CUR_EN	/;"	d
CRTC2_GEN_CNTL__CRTC2_CUR_EN_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_CUR_EN_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_CUR_MODE_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_CUR_MODE_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN	/;"	d
CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN	/;"	d
CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS	/;"	d
CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B	/;"	d
CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_EN	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_EN	/;"	d
CRTC2_GEN_CNTL__CRTC2_EN_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_EN_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS	/;"	d
CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE	/;"	d
CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_ICON_EN	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_ICON_EN	/;"	d
CRTC2_GEN_CNTL__CRTC2_ICON_EN_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_ICON_EN_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN	/;"	d
CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_PIX_WIDTH_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_PIX_WIDTH_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE	/;"	d
CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS	/;"	d
CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS_MASK	/;"	d
CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE	/;"	d
CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE_MASK	include/radeon.h	/^#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE_MASK	/;"	d
CRTC_BYPASS_LUT_EN	include/radeon.h	/^#define CRTC_BYPASS_LUT_EN	/;"	d
CRTC_CRNT_FRAME	include/radeon.h	/^#define CRTC_CRNT_FRAME	/;"	d
CRTC_CRT_ON	include/radeon.h	/^#define CRTC_CRT_ON	/;"	d
CRTC_CUR_EN	include/radeon.h	/^#define CRTC_CUR_EN	/;"	d
CRTC_DBL_SCAN_EN	include/radeon.h	/^#define CRTC_DBL_SCAN_EN	/;"	d
CRTC_DEBUG	include/radeon.h	/^#define CRTC_DEBUG	/;"	d
CRTC_DISPLAY_DIS	include/radeon.h	/^#define CRTC_DISPLAY_DIS	/;"	d
CRTC_DISP_REQ_EN_B	include/radeon.h	/^#define CRTC_DISP_REQ_EN_B	/;"	d
CRTC_EN	include/radeon.h	/^#define CRTC_EN	/;"	d
CRTC_EXT_CNTL	include/radeon.h	/^#define CRTC_EXT_CNTL	/;"	d
CRTC_EXT_DISP_EN	include/radeon.h	/^#define CRTC_EXT_DISP_EN	/;"	d
CRTC_GEN_CNTL	include/radeon.h	/^#define CRTC_GEN_CNTL	/;"	d
CRTC_GEN_CNTL__CRTC_CUR_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_CUR_EN	/;"	d
CRTC_GEN_CNTL__CRTC_CUR_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_CUR_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_CUR_MODE_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_CUR_MODE_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_C_SYNC_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN	/;"	d
CRTC_GEN_CNTL__CRTC_C_SYNC_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN	/;"	d
CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B	/;"	d
CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_EN	/;"	d
CRTC_GEN_CNTL__CRTC_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_EXT_DISP_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN	/;"	d
CRTC_GEN_CNTL__CRTC_EXT_DISP_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_ICON_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_ICON_EN	/;"	d
CRTC_GEN_CNTL__CRTC_ICON_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_ICON_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_INTERLACE_EN	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN	/;"	d
CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK	/;"	d
CRTC_GEN_CNTL__CRTC_VSTAT_MODE_MASK	include/radeon.h	/^#define CRTC_GEN_CNTL__CRTC_VSTAT_MODE_MASK	/;"	d
CRTC_GUI_TRIG_VLINE	include/radeon.h	/^#define CRTC_GUI_TRIG_VLINE	/;"	d
CRTC_HSYNC_DIS	include/radeon.h	/^#define CRTC_HSYNC_DIS	/;"	d
CRTC_HSYNC_STRT_WID_VAL	drivers/video/ati_radeon_fb.c	/^#define CRTC_HSYNC_STRT_WID_VAL(/;"	d	file:
CRTC_H_CUTOFF_ACTIVE_EN	include/radeon.h	/^#define CRTC_H_CUTOFF_ACTIVE_EN	/;"	d
CRTC_H_SYNC_POL	include/radeon.h	/^#define CRTC_H_SYNC_POL	/;"	d
CRTC_H_SYNC_STRT_WID	include/radeon.h	/^#define CRTC_H_SYNC_STRT_WID	/;"	d
CRTC_H_TOTAL_DISP	include/radeon.h	/^#define CRTC_H_TOTAL_DISP	/;"	d
CRTC_H_TOTAL_DISP_VAL	drivers/video/ati_radeon_fb.c	/^#define CRTC_H_TOTAL_DISP_VAL(/;"	d	file:
CRTC_INTERLACE_EN	include/radeon.h	/^#define CRTC_INTERLACE_EN	/;"	d
CRTC_MORE_CNTL	include/radeon.h	/^#define CRTC_MORE_CNTL	/;"	d
CRTC_OFFSET	include/radeon.h	/^#define CRTC_OFFSET	/;"	d
CRTC_OFFSET_CNTL	include/radeon.h	/^#define CRTC_OFFSET_CNTL	/;"	d
CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET	/;"	d
CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN	/;"	d
CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN_MASK /;"	d
CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN	/;"	d
CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN_MASK /;"	d
CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL	/;"	d
CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK	/;"	d
CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_EN_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_EN_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN	/;"	d
CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_TILE_EN	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_TILE_EN	/;"	d
CRTC_OFFSET_CNTL__CRTC_TILE_EN_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT	/;"	d
CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_TILE_LINE_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_MASK	/;"	d
CRTC_OFFSET_CNTL__CRTC_TILE_LINE_RIGHT_MASK	include/radeon.h	/^#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_RIGHT_MASK	/;"	d
CRTC_OFFSET_RIGHT	include/radeon.h	/^#define CRTC_OFFSET_RIGHT	/;"	d
CRTC_PITCH	include/radeon.h	/^#define CRTC_PITCH	/;"	d
CRTC_STATUS	include/radeon.h	/^#define CRTC_STATUS	/;"	d
CRTC_VBLANK	include/radeon.h	/^#define CRTC_VBLANK	/;"	d
CRTC_VLINE_CRNT_VLINE	include/radeon.h	/^#define CRTC_VLINE_CRNT_VLINE	/;"	d
CRTC_VSYNC_DIS	include/radeon.h	/^#define CRTC_VSYNC_DIS	/;"	d
CRTC_VSYNC_STRT_WID_VAL	drivers/video/ati_radeon_fb.c	/^#define CRTC_VSYNC_STRT_WID_VAL(/;"	d	file:
CRTC_V_CUTOFF_ACTIVE_EN	include/radeon.h	/^#define CRTC_V_CUTOFF_ACTIVE_EN	/;"	d
CRTC_V_SYNC_POL	include/radeon.h	/^#define CRTC_V_SYNC_POL	/;"	d
CRTC_V_SYNC_STRT_WID	include/radeon.h	/^#define CRTC_V_SYNC_STRT_WID	/;"	d
CRTC_V_TOTAL_DISP	include/radeon.h	/^#define CRTC_V_TOTAL_DISP	/;"	d
CRTC_V_TOTAL_DISP_VAL	drivers/video/ati_radeon_fb.c	/^#define CRTC_V_TOTAL_DISP_VAL(/;"	d	file:
CRT_C	drivers/bios_emulator/include/biosemu.h	/^#define CRT_C /;"	d
CRT_CRTC_H_SYNC_STRT_WID	include/radeon.h	/^#define CRT_CRTC_H_SYNC_STRT_WID	/;"	d
CRT_CRTC_V_SYNC_STRT_WID	include/radeon.h	/^#define CRT_CRTC_V_SYNC_STRT_WID	/;"	d
CRT_HOTPLUG_ACTIVATION_PERIOD_32	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_ACTIVATION_PERIOD_32	/;"	d
CRT_HOTPLUG_ACTIVATION_PERIOD_64	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_ACTIVATION_PERIOD_64	/;"	d
CRT_HOTPLUG_DAC_ON_TIME_2M	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_DAC_ON_TIME_2M	/;"	d
CRT_HOTPLUG_DAC_ON_TIME_4M	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_DAC_ON_TIME_4M	/;"	d
CRT_HOTPLUG_DETECT_DELAY_1G	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_DETECT_DELAY_1G	/;"	d
CRT_HOTPLUG_DETECT_DELAY_2G	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_DETECT_DELAY_2G	/;"	d
CRT_HOTPLUG_DETECT_VOLTAGE_325MV	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_DETECT_VOLTAGE_325MV	/;"	d
CRT_HOTPLUG_DETECT_VOLTAGE_475MV	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV	/;"	d
CRT_HOTPLUG_FORCE_DETECT	drivers/video/i915_reg.h	/^#define   CRT_HOTPLUG_FORCE_DETECT	/;"	d
CRT_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   CRT_HOTPLUG_INT_EN	/;"	d
CRT_HOTPLUG_VOLTAGE_COMPARE_40	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_VOLTAGE_COMPARE_40	/;"	d
CRT_HOTPLUG_VOLTAGE_COMPARE_50	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_VOLTAGE_COMPARE_50	/;"	d
CRT_HOTPLUG_VOLTAGE_COMPARE_60	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_VOLTAGE_COMPARE_60	/;"	d
CRT_HOTPLUG_VOLTAGE_COMPARE_70	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_VOLTAGE_COMPARE_70	/;"	d
CRT_HOTPLUG_VOLTAGE_COMPARE_MASK	drivers/video/i915_reg.h	/^#define CRT_HOTPLUG_VOLTAGE_COMPARE_MASK	/;"	d
CRUVISACONTROLCR	arch/x86/cpu/quark/smc.h	/^#define CRUVISACONTROLCR	/;"	d
CRUVISALANECR0	arch/x86/cpu/quark/smc.h	/^#define CRUVISALANECR0	/;"	d
CRUVISALANECR1	arch/x86/cpu/quark/smc.h	/^#define CRUVISALANECR1	/;"	d
CRU_BASE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define CRU_BASE	/;"	d	file:
CRU_RESET_OFFSET	arch/arm/cpu/armv7/bcmnsp/reset.c	/^#define CRU_RESET_OFFSET	/;"	d	file:
CRWECR_CONFIG	drivers/usb/eth/r8152.h	/^#define CRWECR_CONFIG	/;"	d
CRWECR_NORAML	drivers/usb/eth/r8152.h	/^#define CRWECR_NORAML	/;"	d
CRYPTO	arch/powerpc/dts/arches.dts	/^		CRYPTO: crypto@180000 {$/;"	l
CRYPTO	arch/powerpc/dts/canyonlands.dts	/^		CRYPTO: crypto@180000 {$/;"	l
CRYPTO	arch/powerpc/dts/glacier.dts	/^		CRYPTO: crypto@180000 {$/;"	l
CRYPTO_MAX_ALG_NAME	drivers/crypto/fsl/fsl_hash.c	/^#define CRYPTO_MAX_ALG_NAME	/;"	d	file:
CRYP_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define CRYP_BASE_ADDR /;"	d
CRYSTAL	board/freescale/common/ics307_clk.c	/^#define CRYSTAL	/;"	d	file:
CR_1000T_ASYM_PAUSE	drivers/net/e1000.h	/^#define CR_1000T_ASYM_PAUSE	/;"	d
CR_1000T_FD_CAPS	drivers/net/e1000.h	/^#define CR_1000T_FD_CAPS	/;"	d
CR_1000T_HD_CAPS	drivers/net/e1000.h	/^#define CR_1000T_HD_CAPS	/;"	d
CR_1000T_MS_ENABLE	drivers/net/e1000.h	/^#define CR_1000T_MS_ENABLE	/;"	d
CR_1000T_MS_VALUE	drivers/net/e1000.h	/^#define CR_1000T_MS_VALUE	/;"	d
CR_1000T_REPEATER_DTE	drivers/net/e1000.h	/^#define CR_1000T_REPEATER_DTE	/;"	d
CR_1000T_TEST_MODE_1	drivers/net/e1000.h	/^#define CR_1000T_TEST_MODE_1	/;"	d
CR_1000T_TEST_MODE_2	drivers/net/e1000.h	/^#define CR_1000T_TEST_MODE_2	/;"	d
CR_1000T_TEST_MODE_3	drivers/net/e1000.h	/^#define CR_1000T_TEST_MODE_3	/;"	d
CR_1000T_TEST_MODE_4	drivers/net/e1000.h	/^#define CR_1000T_TEST_MODE_4	/;"	d
CR_1000T_TEST_MODE_NORMAL	drivers/net/e1000.h	/^#define CR_1000T_TEST_MODE_NORMAL	/;"	d
CR_A	arch/arm/include/asm/system.h	/^#define CR_A	/;"	d
CR_AFE	arch/arm/include/asm/system.h	/^#define CR_AFE	/;"	d
CR_ALIRQ	drivers/i2c/fti2c010.h	/^#define CR_ALIRQ /;"	d
CR_B	arch/arm/include/asm/system.h	/^#define CR_B	/;"	d
CR_BUSY	board/highbank/ahci.c	/^#define CR_BUSY	/;"	d	file:
CR_C	arch/arm/include/asm/system.h	/^#define CR_C	/;"	d
CR_D	arch/arm/include/asm/system.h	/^#define CR_D	/;"	d
CR_DCAC_MEM	arch/nds32/cpu/n1213/start.S	/^#define CR_DCAC_MEM	/;"	d	file:
CR_DRIRQ	drivers/i2c/fti2c010.h	/^#define CR_DRIRQ /;"	d
CR_DT	arch/arm/include/asm/system.h	/^#define CR_DT	/;"	d
CR_DTIRQ	drivers/i2c/fti2c010.h	/^#define CR_DTIRQ /;"	d
CR_EE	arch/arm/include/asm/system.h	/^#define CR_EE	/;"	d
CR_ENABLE	drivers/i2c/fti2c010.h	/^#define CR_ENABLE /;"	d
CR_F	arch/arm/include/asm/system.h	/^#define CR_F	/;"	d
CR_FI	arch/arm/include/asm/system.h	/^#define CR_FI	/;"	d
CR_GCEN	drivers/i2c/fti2c010.h	/^#define CR_GCEN /;"	d
CR_I	arch/arm/include/asm/system.h	/^#define CR_I	/;"	d
CR_I2CEN	drivers/i2c/fti2c010.h	/^#define CR_I2CEN /;"	d
CR_I2CRST	drivers/i2c/fti2c010.h	/^#define CR_I2CRST /;"	d
CR_ICAC_MEM	arch/nds32/cpu/n1213/start.S	/^#define CR_ICAC_MEM	/;"	d	file:
CR_IT	arch/arm/include/asm/system.h	/^#define CR_IT	/;"	d
CR_L	arch/arm/include/asm/system.h	/^#define CR_L	/;"	d
CR_L4	arch/arm/include/asm/system.h	/^#define CR_L4	/;"	d
CR_M	arch/arm/include/asm/system.h	/^#define CR_M	/;"	d
CR_NAK	drivers/i2c/fti2c010.h	/^#define CR_NAK /;"	d
CR_NAKRIRQ	drivers/i2c/fti2c010.h	/^#define CR_NAKRIRQ /;"	d
CR_P	arch/arm/include/asm/system.h	/^#define CR_P	/;"	d
CR_R	arch/arm/include/asm/system.h	/^#define CR_R	/;"	d
CR_RR	arch/arm/include/asm/system.h	/^#define CR_RR	/;"	d
CR_RR	include/sja1000.h	/^#define CR_RR	/;"	d
CR_S	arch/arm/include/asm/system.h	/^#define CR_S	/;"	d
CR_SA	arch/arm/include/asm/system.h	/^#define CR_SA	/;"	d
CR_SAMIRQ	drivers/i2c/fti2c010.h	/^#define CR_SAMIRQ /;"	d
CR_SCLEN	drivers/i2c/fti2c010.h	/^#define CR_SCLEN /;"	d
CR_ST	arch/arm/include/asm/system.h	/^#define CR_ST	/;"	d
CR_START	board/highbank/ahci.c	/^#define CR_START	/;"	d	file:
CR_START	drivers/i2c/fti2c010.h	/^#define CR_START /;"	d
CR_STOP	drivers/i2c/fti2c010.h	/^#define CR_STOP /;"	d
CR_STOPIRQ	drivers/i2c/fti2c010.h	/^#define CR_STOPIRQ /;"	d
CR_TBEN	drivers/i2c/fti2c010.h	/^#define CR_TBEN /;"	d
CR_TE	arch/arm/include/asm/system.h	/^#define CR_TE	/;"	d
CR_TRE	arch/arm/include/asm/system.h	/^#define CR_TRE	/;"	d
CR_U	arch/arm/include/asm/system.h	/^#define CR_U	/;"	d
CR_V	arch/arm/include/asm/system.h	/^#define CR_V	/;"	d
CR_VE	arch/arm/include/asm/system.h	/^#define CR_VE	/;"	d
CR_W	arch/arm/include/asm/system.h	/^#define CR_W	/;"	d
CR_WR_RDN	board/highbank/ahci.c	/^#define CR_WR_RDN	/;"	d	file:
CR_WXN	arch/arm/include/asm/system.h	/^#define CR_WXN	/;"	d
CR_XP	arch/arm/include/asm/system.h	/^#define CR_XP	/;"	d
CR_Z	arch/arm/include/asm/system.h	/^#define CR_Z	/;"	d
CS	arch/x86/include/asm/ptrace.h	/^#define CS /;"	d
CS	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 CS, DS, SS, ES, FS, GS;$/;"	m	struct:i386_segment_regs	typeref:typename:u16
CS0	arch/arm/include/asm/arch-omap3/mem.h	/^#define CS0	/;"	d
CS0	arch/arm/include/asm/emif.h	/^#define CS0	/;"	d
CS0	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define CS0 /;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS0BCR	/;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS0BCR	/;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7722.h	/^#define	CS0BCR	/;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7723.h	/^#define	CS0BCR	/;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7724.h	/^#define	CS0BCR	/;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS0BCR	/;"	d
CS0BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS0BCR	/;"	d
CS0BCR_A	board/espt/lowlevel_init.S	/^CS0BCR_A:	.long	0xFF802000$/;"	l
CS0BCR_A	board/mpr2/lowlevel_init.S	/^CS0BCR_A:	.long	BSC_BASE + 0x04$/;"	l
CS0BCR_A	board/ms7720se/lowlevel_init.S	/^CS0BCR_A:	.long	BSC_BASE + 0x04$/;"	l
CS0BCR_A	board/ms7722se/lowlevel_init.S	/^CS0BCR_A:	.long	CS0BCR		! Flash bank 1$/;"	l
CS0BCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS0BCR_A:	.long	CS0BCR$/;"	l
CS0BCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS0BCR_A:	.long	CS0BCR$/;"	l
CS0BCR_A	board/renesas/ecovec/lowlevel_init.S	/^CS0BCR_A:	.long	CS0BCR$/;"	l
CS0BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS0BCR_A:		.long	CS0BCR$/;"	l
CS0BCR_A	board/renesas/rsk7203/lowlevel_init.S	/^CS0BCR_A:	.long 0xFFFC0004$/;"	l
CS0BCR_A	board/renesas/rsk7264/lowlevel_init.S	/^CS0BCR_A:	.long 0xFFFC0004$/;"	l
CS0BCR_A	board/renesas/rsk7269/lowlevel_init.S	/^CS0BCR_A:	.long 0xFFFC0004$/;"	l
CS0BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS0BCR_A:	.long	0xFF802000$/;"	l
CS0BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS0BCR_A:	.long	CS0BCR$/;"	l
CS0BCR_D	board/espt/lowlevel_init.S	/^CS0BCR_D:	.long	0x232306F0$/;"	l
CS0BCR_D	board/kmc/kzm9g/kzm9g.c	/^#define CS0BCR_D /;"	d	file:
CS0BCR_D	board/mpr2/lowlevel_init.S	/^CS0BCR_D:	.long	0x12490400$/;"	l
CS0BCR_D	board/ms7720se/lowlevel_init.S	/^CS0BCR_D:	.long	0x36DB0400$/;"	l
CS0BCR_D	board/ms7722se/lowlevel_init.S	/^CS0BCR_D:	.long	0x24920400$/;"	l
CS0BCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS0BCR_D:	.long	0x24920400$/;"	l
CS0BCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS0BCR_D:	.long	0x24920400$/;"	l
CS0BCR_D	board/renesas/ecovec/lowlevel_init.S	/^CS0BCR_D:	.long	0x11110400$/;"	l
CS0BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS0BCR_D:		.long	0x77777770$/;"	l
CS0BCR_D	board/renesas/rsk7203/lowlevel_init.S	/^CS0BCR_D:	.long 0x10000400$/;"	l
CS0BCR_D	board/renesas/rsk7264/lowlevel_init.S	/^CS0BCR_D:	.long 0x10000400$/;"	l
CS0BCR_D	board/renesas/rsk7269/lowlevel_init.S	/^CS0BCR_D:	.long 0x00000400$/;"	l
CS0BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS0BCR_D:	.long	0x77777770$/;"	l
CS0BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS0BCR_D:	.long	0x22222340$/;"	l
CS0CTRL2_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS0CTRL2_A:	.long	0xFF800220$/;"	l
CS0CTRL2_A	board/renesas/r0p7734/lowlevel_init.S	/^CS0CTRL2_A:	.long	0xFF800220$/;"	l
CS0CTRL2_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS0CTRL2_D:	.long	0x00004000$/;"	l
CS0CTRL2_D	board/renesas/r0p7734/lowlevel_init.S	/^CS0CTRL2_D:	.long	0x00004000$/;"	l
CS0CTRL_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS0CTRL_A:	.long	0xFF800200$/;"	l
CS0CTRL_A	board/renesas/r0p7734/lowlevel_init.S	/^CS0CTRL_A:	.long	0xFF800200$/;"	l
CS0CTRL_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS0CTRL_D:	.long	0x00000020$/;"	l
CS0CTRL_D	board/renesas/r0p7734/lowlevel_init.S	/^CS0CTRL_D:	.long	0x00000020$/;"	l
CS0L	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS0L /;"	d
CS0U	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS0U /;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS0WCR	/;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS0WCR	/;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS0WCR /;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS0WCR	/;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS0WCR	/;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS0WCR	/;"	d
CS0WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS0WCR	/;"	d
CS0WCR2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define CS0WCR2 /;"	d
CS0WCR_A	board/espt/lowlevel_init.S	/^CS0WCR_A:	.long	0xFF802008$/;"	l
CS0WCR_A	board/mpr2/lowlevel_init.S	/^CS0WCR_A:	.long	BSC_BASE + 0x24$/;"	l
CS0WCR_A	board/ms7720se/lowlevel_init.S	/^CS0WCR_A:	.long	BSC_BASE + 0x24$/;"	l
CS0WCR_A	board/ms7722se/lowlevel_init.S	/^CS0WCR_A:	.long	CS0WCR$/;"	l
CS0WCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS0WCR_A:	.long	CS0WCR$/;"	l
CS0WCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS0WCR_A:	.long	CS0WCR$/;"	l
CS0WCR_A	board/renesas/ecovec/lowlevel_init.S	/^CS0WCR_A:	.long	CS0WCR$/;"	l
CS0WCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS0WCR_A:		.long	CS0WCR$/;"	l
CS0WCR_A	board/renesas/rsk7203/lowlevel_init.S	/^CS0WCR_A:	.long 0xFFFC0028$/;"	l
CS0WCR_A	board/renesas/rsk7264/lowlevel_init.S	/^CS0WCR_A:	.long 0xFFFC0028$/;"	l
CS0WCR_A	board/renesas/rsk7269/lowlevel_init.S	/^CS0WCR_A:	.long 0xFFFC0028$/;"	l
CS0WCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS0WCR_A:	.long	0xFF802008$/;"	l
CS0WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS0WCR_A:	.long	CS0WCR$/;"	l
CS0WCR_D	board/espt/lowlevel_init.S	/^CS0WCR_D:	.long	0x00011104$/;"	l
CS0WCR_D	board/kmc/kzm9g/kzm9g.c	/^#define CS0WCR_D /;"	d	file:
CS0WCR_D	board/mpr2/lowlevel_init.S	/^CS0WCR_D:	.long	0x00000340$/;"	l
CS0WCR_D	board/ms7720se/lowlevel_init.S	/^CS0WCR_D:	.long	0x00000B01$/;"	l
CS0WCR_D	board/ms7722se/lowlevel_init.S	/^CS0WCR_D:	.long	0x00000300$/;"	l
CS0WCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS0WCR_D:	.long	0x00000380$/;"	l
CS0WCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS0WCR_D:	.long	0x00000480$/;"	l
CS0WCR_D	board/renesas/ecovec/lowlevel_init.S	/^CS0WCR_D:	.long	0x00000440$/;"	l
CS0WCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS0WCR_D:		.long	0x00020006$/;"	l
CS0WCR_D	board/renesas/rsk7203/lowlevel_init.S	/^CS0WCR_D:	.long 0x00000B41$/;"	l
CS0WCR_D	board/renesas/rsk7264/lowlevel_init.S	/^CS0WCR_D:	.long 0x00000B41$/;"	l
CS0WCR_D	board/renesas/rsk7269/lowlevel_init.S	/^CS0WCR_D:	.long 0x00000341$/;"	l
CS0WCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS0WCR_D:	.long	0x7777770F$/;"	l
CS0WCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS0WCR_D:	.long	0x00111118$/;"	l
CS0_128	arch/arm/include/asm/arch-imx/cpu.h	/^#define CS0_128	/;"	d
CS0_32M_CS1_32M_CS2_32M_CS3_32M	arch/arm/include/asm/arch-imx/cpu.h	/^#define CS0_32M_CS1_32M_CS2_32M_CS3_32M	/;"	d
CS0_64M_CS1_32M_CS2_32M	arch/arm/include/asm/arch-imx/cpu.h	/^#define CS0_64M_CS1_32M_CS2_32M	/;"	d
CS0_64M_CS1_64M	arch/arm/include/asm/arch-imx/cpu.h	/^#define CS0_64M_CS1_64M	/;"	d
CS0_A	board/espt/lowlevel_init.S	/^CS0_A:		.long	0xA8000000$/;"	l
CS0_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS0_BASE	/;"	d
CS0_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CS0_BASE_ADDR	/;"	d
CS0_CONFIG	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define CS0_CONFIG	/;"	d
CS0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS0_MARK,	CS2_MARK,	CS4_MARK,$/;"	e	enum:__anona304c1340103	file:
CS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,$/;"	e	enum:__anona307879b0103	file:
CS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
CS0_RD_LVL_PH_SEL_LEN	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS0_RD_LVL_PH_SEL_LEN	/;"	d
CS0_RD_LVL_PH_SEL_OFFS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS0_RD_LVL_PH_SEL_OFFS	/;"	d
CS0_RD_LVL_REF_DLY_LEN	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS0_RD_LVL_REF_DLY_LEN	/;"	d
CS0_RD_LVL_REF_DLY_OFFS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS0_RD_LVL_REF_DLY_OFFS	/;"	d
CS0x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CS0x_GMARK,$/;"	e	enum:__anona307945e0103	file:
CS0x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CS0x_IMARK,$/;"	e	enum:__anona307945e0103	file:
CS1	arch/arm/include/asm/arch-omap3/mem.h	/^#define CS1	/;"	d
CS1	arch/arm/include/asm/emif.h	/^#define CS1	/;"	d
CS1BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS1BCR	/;"	d
CS1BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS1BCR	/;"	d
CS1BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS1BCR_A:		.long	CS1BCR$/;"	l
CS1BCR_A	board/renesas/rsk7269/lowlevel_init.S	/^CS1BCR_A:	.long 0xFFFC0008$/;"	l
CS1BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS1BCR_A:	.long	0xFF802010$/;"	l
CS1BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS1BCR_A:	.long	CS1BCR$/;"	l
CS1BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS1BCR_D:		.long	0x77777670$/;"	l
CS1BCR_D	board/renesas/rsk7269/lowlevel_init.S	/^CS1BCR_D:	.long 0x00000400$/;"	l
CS1BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS1BCR_D:	.long	0x77777670$/;"	l
CS1BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS1BCR_D:	.long	0x11111100$/;"	l
CS1CTRL_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS1CTRL_A:	.long	0xFF800204$/;"	l
CS1CTRL_A	board/renesas/r0p7734/lowlevel_init.S	/^CS1CTRL_A:	.long	0xFF800204$/;"	l
CS1CTRL_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS1CTRL_D:	.long	0x00000020$/;"	l
CS1CTRL_D	board/renesas/r0p7734/lowlevel_init.S	/^CS1CTRL_D:	.long	0x00000020$/;"	l
CS1GDST_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS1GDST_A:	.long	0xFF8002C0$/;"	l
CS1GDST_A	board/renesas/r0p7734/lowlevel_init.S	/^CS1GDST_A:	.long	0xFF8002C0$/;"	l
CS1GDST_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CS1GDST_D:	.long	0x00000011$/;"	l
CS1GDST_D	board/renesas/r0p7734/lowlevel_init.S	/^CS1GDST_D:	.long	0x00000011$/;"	l
CS1L	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS1L /;"	d
CS1U	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS1U /;"	d
CS1WCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS1WCR	/;"	d
CS1WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS1WCR	/;"	d
CS1WCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS1WCR_A:		.long	CS1WCR$/;"	l
CS1WCR_A	board/renesas/rsk7203/lowlevel_init.S	/^CS1WCR_A:	.long 0xFFFC002C$/;"	l
CS1WCR_A	board/renesas/rsk7269/lowlevel_init.S	/^CS1WCR_A:	.long 0xFFFC002C$/;"	l
CS1WCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS1WCR_A:	.long	0xFF802018$/;"	l
CS1WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS1WCR_A:	.long	CS1WCR$/;"	l
CS1WCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS1WCR_D:		.long	0x00232304$/;"	l
CS1WCR_D	board/renesas/rsk7203/lowlevel_init.S	/^CS1WCR_D:	.long 0x00000B01$/;"	l
CS1WCR_D	board/renesas/rsk7269/lowlevel_init.S	/^CS1WCR_D:	.long 0x00000080$/;"	l
CS1WCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS1WCR_D:	.long	0x22000002$/;"	l
CS1WCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS1WCR_D:	.long	0x33333303$/;"	l
CS1_A26_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,$/;"	e	enum:__anona307879b0103	file:
CS1_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS1_BASE	/;"	d
CS1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CS1_BASE_ADDR	/;"	d
CS1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CS1_BASE_ADDR /;"	d
CS1_N_A26_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
CS1x_A26_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CS1x_A26_GMARK,$/;"	e	enum:__anona307945e0103	file:
CS1x_A26_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CS1x_A26_IMARK,$/;"	e	enum:__anona307945e0103	file:
CS2BCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS2BCR	/;"	d
CS2BCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS2BCR	/;"	d
CS2BCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS2BCR /;"	d
CS2BCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS2BCR	/;"	d
CS2BCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS2BCR	/;"	d
CS2BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS2BCR	/;"	d
CS2BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS2BCR	/;"	d
CS2BCR_A	board/ms7720se/lowlevel_init.S	/^CS2BCR_A:	.long	BSC_BASE + 0x08$/;"	l
CS2BCR_A	board/ms7722se/lowlevel_init.S	/^CS2BCR_A:	.long	CS2BCR		! SRAM$/;"	l
CS2BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS2BCR_A:		.long	CS2BCR$/;"	l
CS2BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS2BCR_A:	.long	0xFF802020$/;"	l
CS2BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS2BCR_A:	.long	CS2BCR$/;"	l
CS2BCR_D	board/ms7720se/lowlevel_init.S	/^CS2BCR_D:	.long	0x36DB0400$/;"	l
CS2BCR_D	board/ms7722se/lowlevel_init.S	/^CS2BCR_D:	.long	0x24920400$/;"	l
CS2BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS2BCR_D:		.long	0x77777770$/;"	l
CS2BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS2BCR_D:	.long	0x77777670$/;"	l
CS2L	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS2L /;"	d
CS2U	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS2U /;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS2WCR	/;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS2WCR	/;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS2WCR /;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS2WCR	/;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS2WCR	/;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS2WCR	/;"	d
CS2WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS2WCR	/;"	d
CS2WCR2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define CS2WCR2 /;"	d
CS2WCR_A	board/ms7720se/lowlevel_init.S	/^CS2WCR_A:	.long	BSC_BASE + 0x28$/;"	l
CS2WCR_A	board/ms7722se/lowlevel_init.S	/^CS2WCR_A:	.long	CS2WCR$/;"	l
CS2WCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS2WCR_A:		.long	CS2WCR$/;"	l
CS2WCR_A	board/renesas/rsk7264/lowlevel_init.S	/^CS2WCR_A:	.long 0xFFFC0030$/;"	l
CS2WCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS2WCR_A:	.long	0xFF802028$/;"	l
CS2WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS2WCR_A:	.long	CS2WCR$/;"	l
CS2WCR_D	board/ms7720se/lowlevel_init.S	/^CS2WCR_D:	.long	0x00000500$/;"	l
CS2WCR_D	board/ms7722se/lowlevel_init.S	/^CS2WCR_D:	.long	0x00000300$/;"	l
CS2WCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS2WCR_D:		.long	0x7777770F$/;"	l
CS2WCR_D	board/renesas/rsk7264/lowlevel_init.S	/^CS2WCR_D:	.long 0x00000B01$/;"	l
CS2WCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS2WCR_D:	.long	0x7777770F$/;"	l
CS2_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS2_BASE	/;"	d
CS2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CS2_BASE_ADDR	/;"	d
CS2_EXIST_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define CS2_EXIST_BIT	/;"	d
CS2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS0_MARK,	CS2_MARK,	CS4_MARK,$/;"	e	enum:__anona304c1340103	file:
CS3BCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS3BCR	/;"	d
CS3BCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS3BCR	/;"	d
CS3BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS3BCR	/;"	d
CS3BCR_A	board/mpr2/lowlevel_init.S	/^CS3BCR_A:	.long	BSC_BASE + 0x0C$/;"	l
CS3BCR_A	board/ms7720se/lowlevel_init.S	/^CS3BCR_A:	.long	BSC_BASE + 0x0C$/;"	l
CS3BCR_A	board/renesas/rsk7203/lowlevel_init.S	/^CS3BCR_A:	.long 0xFFFC0010$/;"	l
CS3BCR_A	board/renesas/rsk7264/lowlevel_init.S	/^CS3BCR_A:	.long 0xFFFC0010$/;"	l
CS3BCR_A	board/renesas/rsk7269/lowlevel_init.S	/^CS3BCR_A:	.long 0xFFFC0010$/;"	l
CS3BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS3BCR_A:	.long	CS3BCR$/;"	l
CS3BCR_D	board/mpr2/lowlevel_init.S	/^CS3BCR_D:	.long	0x10004400$/;"	l
CS3BCR_D	board/ms7720se/lowlevel_init.S	/^CS3BCR_D:	.long	0x36DB4600$/;"	l
CS3BCR_D	board/renesas/rsk7203/lowlevel_init.S	/^CS3BCR_D:	.long 0x00004400$/;"	l
CS3BCR_D	board/renesas/rsk7264/lowlevel_init.S	/^CS3BCR_D:	.long 0x00004400$/;"	l
CS3BCR_D	board/renesas/rsk7269/lowlevel_init.S	/^CS3BCR_D:	.long 0x00004400$/;"	l
CS3L	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS3L /;"	d
CS3U	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS3U /;"	d
CS3WCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS3WCR	/;"	d
CS3WCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS3WCR	/;"	d
CS3WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS3WCR	/;"	d
CS3WCR_A	board/mpr2/lowlevel_init.S	/^CS3WCR_A:	.long	BSC_BASE + 0x2C$/;"	l
CS3WCR_A	board/ms7720se/lowlevel_init.S	/^CS3WCR_A:	.long	BSC_BASE + 0x2C$/;"	l
CS3WCR_A	board/renesas/rsk7203/lowlevel_init.S	/^CS3WCR_A:	.long 0xFFFC0034$/;"	l
CS3WCR_A	board/renesas/rsk7264/lowlevel_init.S	/^CS3WCR_A:	.long 0xFFFC0034$/;"	l
CS3WCR_A	board/renesas/rsk7269/lowlevel_init.S	/^CS3WCR_A:	.long 0xFFFC0034$/;"	l
CS3WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS3WCR_A:	.long	CS3WCR$/;"	l
CS3WCR_D	board/mpr2/lowlevel_init.S	/^CS3WCR_D:	.long	0x00000091$/;"	l
CS3WCR_D	board/ms7720se/lowlevel_init.S	/^CS3WCR_D:	.long	0x00006D1B$/;"	l
CS3WCR_D	board/renesas/rsk7203/lowlevel_init.S	/^CS3WCR_D:	.long 0x00002892$/;"	l
CS3WCR_D	board/renesas/rsk7264/lowlevel_init.S	/^CS3WCR_D:	.long 0x0000288A$/;"	l
CS3WCR_D	board/renesas/rsk7269/lowlevel_init.S	/^CS3WCR_D:	.long 0x00004912$/;"	l
CS3_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS3_BASE	/;"	d
CS3_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CS3_BASE_ADDR	/;"	d
CS3_R	arch/sh/include/asm/cpu_sh7706.h	/^#define CS3_R	/;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS4BCR	/;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS4BCR	/;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS4BCR /;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS4BCR	/;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS4BCR	/;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS4BCR	/;"	d
CS4BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS4BCR	/;"	d
CS4BCR_A	board/ms7720se/lowlevel_init.S	/^CS4BCR_A:	.long	BSC_BASE + 0x10$/;"	l
CS4BCR_A	board/ms7722se/lowlevel_init.S	/^CS4BCR_A:	.long	CS4BCR		! FPGA, PCMCIA, USB, ext slot$/;"	l
CS4BCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS4BCR_A:	.long	CS4BCR$/;"	l
CS4BCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS4BCR_A:	.long	CS4BCR$/;"	l
CS4BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS4BCR_A:		.long	CS4BCR$/;"	l
CS4BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS4BCR_A:	.long	0xFF802040$/;"	l
CS4BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS4BCR_A:	.long	CS4BCR$/;"	l
CS4BCR_D	board/kmc/kzm9g/kzm9g.c	/^#define CS4BCR_D /;"	d	file:
CS4BCR_D	board/ms7720se/lowlevel_init.S	/^CS4BCR_D:	.long	0x36DB0400$/;"	l
CS4BCR_D	board/ms7722se/lowlevel_init.S	/^CS4BCR_D:	.long	0x24920400$/;"	l
CS4BCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS4BCR_D:	.long	0x00003400$/;"	l
CS4BCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS4BCR_D:	.long	0x24920400$/;"	l
CS4BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS4BCR_D:		.long	0x77777770$/;"	l
CS4BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS4BCR_D:	.long	0x77777670$/;"	l
CS4BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS4BCR_D:	.long	0x11111300$/;"	l
CS4L	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS4L /;"	d
CS4U	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS4U /;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS4WCR	/;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS4WCR	/;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS4WCR /;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS4WCR	/;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS4WCR	/;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS4WCR	/;"	d
CS4WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS4WCR	/;"	d
CS4WCR2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define CS4WCR2 /;"	d
CS4WCR_A	board/ms7720se/lowlevel_init.S	/^CS4WCR_A:	.long	BSC_BASE + 0x30$/;"	l
CS4WCR_A	board/ms7722se/lowlevel_init.S	/^CS4WCR_A:	.long	CS4WCR$/;"	l
CS4WCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS4WCR_A:	.long	CS4WCR$/;"	l
CS4WCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS4WCR_A:	.long	CS4WCR$/;"	l
CS4WCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS4WCR_A:		.long	CS4WCR$/;"	l
CS4WCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS4WCR_A:	.long	0xFF802048$/;"	l
CS4WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS4WCR_A:	.long	CS4WCR$/;"	l
CS4WCR_D	board/kmc/kzm9g/kzm9g.c	/^#define CS4WCR_D /;"	d	file:
CS4WCR_D	board/ms7720se/lowlevel_init.S	/^CS4WCR_D:	.long	0x00000500$/;"	l
CS4WCR_D	board/ms7722se/lowlevel_init.S	/^CS4WCR_D:	.long	0x00000300$/;"	l
CS4WCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS4WCR_D:	.long	0x00110080$/;"	l
CS4WCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS4WCR_D:	.long	0x00000480$/;"	l
CS4WCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS4WCR_D:		.long	0x7777770F$/;"	l
CS4WCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS4WCR_D:	.long	0x7777770F$/;"	l
CS4WCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS4WCR_D:	.long	0x00101012$/;"	l
CS4_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS4_BASE	/;"	d
CS4_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CS4_BASE_ADDR	/;"	d
CS4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS0_MARK,	CS2_MARK,	CS4_MARK,$/;"	e	enum:__anona304c1340103	file:
CS4_PSRAM_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS4_PSRAM_BASE	/;"	d
CS4__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS4__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
CS5ABCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS5ABCR	/;"	d
CS5ABCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS5ABCR	/;"	d
CS5ABCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS5ABCR /;"	d
CS5ABCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS5ABCR	/;"	d
CS5ABCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS5ABCR	/;"	d
CS5ABCR_A	board/ms7720se/lowlevel_init.S	/^CS5ABCR_A:	.long	BSC_BASE + 0x14$/;"	l
CS5ABCR_A	board/ms7722se/lowlevel_init.S	/^CS5ABCR_A:	.long	CS5ABCR		! Ext slot$/;"	l
CS5ABCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS5ABCR_A:	.long	CS5ABCR$/;"	l
CS5ABCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS5ABCR_A:	.long	CS5ABCR$/;"	l
CS5ABCR_D	board/ms7720se/lowlevel_init.S	/^CS5ABCR_D:	.long	0x36DB0400$/;"	l
CS5ABCR_D	board/ms7722se/lowlevel_init.S	/^CS5ABCR_D:	.long	0x24920400$/;"	l
CS5ABCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS5ABCR_D:	.long	0x24920400$/;"	l
CS5ABCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS5ABCR_D:	.long	0x24920400$/;"	l
CS5AWCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS5AWCR	/;"	d
CS5AWCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS5AWCR	/;"	d
CS5AWCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS5AWCR /;"	d
CS5AWCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS5AWCR	/;"	d
CS5AWCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS5AWCR	/;"	d
CS5AWCR_A	board/ms7720se/lowlevel_init.S	/^CS5AWCR_A:	.long	BSC_BASE + 0x34$/;"	l
CS5AWCR_A	board/ms7722se/lowlevel_init.S	/^CS5AWCR_A:	.long	CS5AWCR$/;"	l
CS5AWCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS5AWCR_A:	.long	CS5AWCR$/;"	l
CS5AWCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS5AWCR_A:	.long	CS5AWCR$/;"	l
CS5AWCR_D	board/ms7720se/lowlevel_init.S	/^CS5AWCR_D:	.long	0x00000500$/;"	l
CS5AWCR_D	board/ms7722se/lowlevel_init.S	/^CS5AWCR_D:	.long	0x00000300$/;"	l
CS5AWCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS5AWCR_D:	.long	0x00000300$/;"	l
CS5AWCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS5AWCR_D:	.long	0x00000380$/;"	l
CS5A_PORT105_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS5A_PORT105_MARK, \/* CS5A PORT 19\/105 *\/$/;"	e	enum:__anona304c1340103	file:
CS5A_PORT19_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS5A_PORT19_MARK,$/;"	e	enum:__anona304c1340103	file:
CS5A__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS5A__MARK, PORT91_RDWR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
CS5BBCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS5BBCR	/;"	d
CS5BBCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS5BBCR	/;"	d
CS5BBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS5BBCR /;"	d
CS5BBCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS5BBCR	/;"	d
CS5BBCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS5BBCR	/;"	d
CS5BBCR_A	board/ms7720se/lowlevel_init.S	/^CS5BBCR_A:	.long	BSC_BASE + 0x18$/;"	l
CS5BBCR_A	board/ms7722se/lowlevel_init.S	/^CS5BBCR_A:	.long	CS5BBCR		! USB controller$/;"	l
CS5BBCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS5BBCR_A:	.long	CS5BBCR$/;"	l
CS5BBCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS5BBCR_A:	.long	CS5BBCR$/;"	l
CS5BBCR_D	board/ms7720se/lowlevel_init.S	/^CS5BBCR_D:	.long	0x36DB0200$/;"	l
CS5BBCR_D	board/ms7722se/lowlevel_init.S	/^CS5BBCR_D:	.long	0x24920400$/;"	l
CS5BBCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS5BBCR_D:	.long	0x24920400$/;"	l
CS5BBCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS5BBCR_D:	.long	0x7fff0600$/;"	l
CS5BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS5BCR	/;"	d
CS5BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS5BCR	/;"	d
CS5BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS5BCR_A:		.long	CS5BCR$/;"	l
CS5BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS5BCR_A:	.long	0xFF802050$/;"	l
CS5BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS5BCR_A:	.long	CS5BCR$/;"	l
CS5BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS5BCR_D:		.long	0x77777670$/;"	l
CS5BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS5BCR_D:	.long	0x77777670$/;"	l
CS5BWCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS5BWCR	/;"	d
CS5BWCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS5BWCR	/;"	d
CS5BWCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS5BWCR /;"	d
CS5BWCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS5BWCR	/;"	d
CS5BWCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS5BWCR	/;"	d
CS5BWCR_A	board/ms7720se/lowlevel_init.S	/^CS5BWCR_A:	.long	BSC_BASE + 0x38$/;"	l
CS5BWCR_A	board/ms7722se/lowlevel_init.S	/^CS5BWCR_A:	.long	CS5BWCR$/;"	l
CS5BWCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS5BWCR_A:	.long	CS5BWCR$/;"	l
CS5BWCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS5BWCR_A:	.long	CS5BWCR$/;"	l
CS5BWCR_D	board/ms7720se/lowlevel_init.S	/^CS5BWCR_D:	.long	0x00000500$/;"	l
CS5BWCR_D	board/ms7722se/lowlevel_init.S	/^CS5BWCR_D:	.long	0x00000300$/;"	l
CS5BWCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS5BWCR_D:	.long	0x00000300$/;"	l
CS5BWCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS5BWCR_D:	.long	0x00000080$/;"	l
CS5B_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS5B_MARK,	CS6A_MARK,$/;"	e	enum:__anona304c1340103	file:
CS5B__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS5B__MARK, FCE1__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
CS5L	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS5L /;"	d
CS5PCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS5PCR	/;"	d
CS5PCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS5PCR	/;"	d
CS5PCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS5PCR_A:		.long	CS5PCR$/;"	l
CS5PCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS5PCR_A:	.long	0xFF802070$/;"	l
CS5PCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS5PCR_D:		.long	0x77000000$/;"	l
CS5PCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS5PCR_D:	.long	0x77000000$/;"	l
CS5U	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CS5U /;"	d
CS5WCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS5WCR	/;"	d
CS5WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS5WCR	/;"	d
CS5WCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS5WCR_A:		.long	CS5WCR$/;"	l
CS5WCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS5WCR_A:	.long	0xFF802058$/;"	l
CS5WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS5WCR_A:	.long	CS5WCR$/;"	l
CS5WCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS5WCR_D:		.long	0x00101006$/;"	l
CS5WCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS5WCR_D:	.long	0x7777770F$/;"	l
CS5_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CS5_BASE	/;"	d
CS5_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CS5_BASE_ADDR	/;"	d
CS6ABCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS6ABCR	/;"	d
CS6ABCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS6ABCR	/;"	d
CS6ABCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS6ABCR /;"	d
CS6ABCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS6ABCR	/;"	d
CS6ABCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS6ABCR	/;"	d
CS6ABCR_A	board/ms7720se/lowlevel_init.S	/^CS6ABCR_A:	.long	BSC_BASE + 0x1C$/;"	l
CS6ABCR_A	board/ms7722se/lowlevel_init.S	/^CS6ABCR_A:	.long	CS6ABCR		! Ethernet$/;"	l
CS6ABCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS6ABCR_A:	.long	CS6ABCR$/;"	l
CS6ABCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS6ABCR_A:	.long	CS6ABCR$/;"	l
CS6ABCR_D	board/ms7720se/lowlevel_init.S	/^CS6ABCR_D:	.long	0x36DB0400$/;"	l
CS6ABCR_D	board/ms7722se/lowlevel_init.S	/^CS6ABCR_D:	.long	0x24920400$/;"	l
CS6ABCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS6ABCR_D:	.long	0x24920400$/;"	l
CS6ABCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS6ABCR_D:	.long	0x24920400$/;"	l
CS6AWCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS6AWCR	/;"	d
CS6AWCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS6AWCR	/;"	d
CS6AWCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS6AWCR /;"	d
CS6AWCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS6AWCR	/;"	d
CS6AWCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS6AWCR	/;"	d
CS6AWCR_A	board/ms7720se/lowlevel_init.S	/^CS6AWCR_A:	.long	BSC_BASE + 0x3C$/;"	l
CS6AWCR_A	board/ms7722se/lowlevel_init.S	/^CS6AWCR_A:	.long	CS6AWCR$/;"	l
CS6AWCR_A	board/renesas/MigoR/lowlevel_init.S	/^CS6AWCR_A:	.long	CS6AWCR$/;"	l
CS6AWCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS6AWCR_A:	.long	CS6AWCR$/;"	l
CS6AWCR_D	board/ms7720se/lowlevel_init.S	/^CS6AWCR_D:	.long	0x00000500$/;"	l
CS6AWCR_D	board/ms7722se/lowlevel_init.S	/^CS6AWCR_D:	.long	0x00000300$/;"	l
CS6AWCR_D	board/renesas/MigoR/lowlevel_init.S	/^CS6AWCR_D:	.long	0x00000300$/;"	l
CS6AWCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS6AWCR_D:	.long	0x00000300$/;"	l
CS6A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CS5B_MARK,	CS6A_MARK,$/;"	e	enum:__anona304c1340103	file:
CS6A__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FCE0__MARK, CS6A__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
CS6BBCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS6BBCR	/;"	d
CS6BBCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS6BBCR	/;"	d
CS6BBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS6BBCR /;"	d
CS6BBCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS6BBCR	/;"	d
CS6BBCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS6BBCR	/;"	d
CS6BBCR_A	board/ms7720se/lowlevel_init.S	/^CS6BBCR_A:	.long	BSC_BASE + 0x20$/;"	l
CS6BBCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS6BBCR_A:	.long	CS6BBCR$/;"	l
CS6BBCR_D	board/ms7720se/lowlevel_init.S	/^CS6BBCR_D:	.long	0x36DB0400$/;"	l
CS6BBCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS6BBCR_D:	.long	0x24920600$/;"	l
CS6BCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS6BCR	/;"	d
CS6BCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS6BCR	/;"	d
CS6BCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS6BCR_A:		.long	CS6BCR$/;"	l
CS6BCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS6BCR_A:	.long	0xFF802060$/;"	l
CS6BCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS6BCR_A:	.long	CS6BCR$/;"	l
CS6BCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS6BCR_D:		.long	0x77777770$/;"	l
CS6BCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS6BCR_D:	.long	0x77777670$/;"	l
CS6BWCR	arch/sh/include/asm/cpu_sh7710.h	/^#define CS6BWCR	/;"	d
CS6BWCR	arch/sh/include/asm/cpu_sh7720.h	/^#define CS6BWCR	/;"	d
CS6BWCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CS6BWCR /;"	d
CS6BWCR	arch/sh/include/asm/cpu_sh7723.h	/^#define CS6BWCR	/;"	d
CS6BWCR	arch/sh/include/asm/cpu_sh7724.h	/^#define CS6BWCR	/;"	d
CS6BWCR_A	board/ms7720se/lowlevel_init.S	/^CS6BWCR_A:	.long	BSC_BASE + 0x40$/;"	l
CS6BWCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^CS6BWCR_A:	.long	CS6BWCR$/;"	l
CS6BWCR_D	board/ms7720se/lowlevel_init.S	/^CS6BWCR_D:	.long	0x00000500$/;"	l
CS6BWCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^CS6BWCR_D:	.long	0x00000540$/;"	l
CS6B__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS6B__MARK, DACK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
CS6PCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS6PCR	/;"	d
CS6PCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS6PCR	/;"	d
CS6PCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS6PCR_A:		.long	CS6PCR$/;"	l
CS6PCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS6PCR_A:	.long	0xFF802080$/;"	l
CS6PCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS6PCR_D:		.long	0x77000000$/;"	l
CS6PCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS6PCR_D:	.long	0x77000000$/;"	l
CS6WCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CS6WCR	/;"	d
CS6WCR	arch/sh/include/asm/cpu_sh7785.h	/^#define CS6WCR	/;"	d
CS6WCR_A	board/renesas/r7780mp/lowlevel_init.S	/^CS6WCR_A:		.long	CS6WCR$/;"	l
CS6WCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^CS6WCR_A:	.long	0xFF802068$/;"	l
CS6WCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^CS6WCR_A:	.long	CS6WCR$/;"	l
CS6WCR_D	board/renesas/r7780mp/lowlevel_init.S	/^CS6WCR_D:		.long	0x77777703$/;"	l
CS6WCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^CS6WCR_D:	.long	0x7777770F$/;"	l
CS8900_DRIVERNAME	drivers/net/cs8900.h	/^#define CS8900_DRIVERNAME /;"	d
CS8900_H	drivers/net/cs8900.h	/^#define CS8900_H$/;"	d
CS8900_REG	drivers/net/cs8900.h	/^  #define CS8900_REG /;"	d
CSADRCFG0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CSADRCFG0	/;"	d
CSADRCFG1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CSADRCFG1	/;"	d
CSADRCFG2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CSADRCFG2	/;"	d
CSADRCFG3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CSADRCFG3	/;"	d
CSADRCFG_P	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CSADRCFG_P	/;"	d
CSAVE_OFFSET	drivers/dma/MCD_dmaApi.c	/^#define CSAVE_OFFSET	/;"	d	file:
CSAW_START	arch/powerpc/include/asm/mpc512x.h	/^#define CSAW_START(/;"	d
CSAW_STOP	arch/powerpc/include/asm/mpc512x.h	/^#define CSAW_STOP(/;"	d
CSBNDS_EA	include/mpc83xx.h	/^#define CSBNDS_EA	/;"	d
CSBNDS_EA_SHIFT	include/mpc83xx.h	/^#define CSBNDS_EA_SHIFT	/;"	d
CSBNDS_SA	include/mpc83xx.h	/^#define CSBNDS_SA	/;"	d
CSBNDS_SA_SHIFT	include/mpc83xx.h	/^#define CSBNDS_SA_SHIFT	/;"	d
CSCLR	drivers/usb/host/r8a66597.h	/^#define	CSCLR	/;"	d
CSCONFIG_AP	include/mpc83xx.h	/^#define CSCONFIG_AP	/;"	d
CSCONFIG_BANK_BIT_3	include/mpc83xx.h	/^#define CSCONFIG_BANK_BIT_3	/;"	d
CSCONFIG_COL_BIT	include/mpc83xx.h	/^#define CSCONFIG_COL_BIT	/;"	d
CSCONFIG_COL_BIT_10	include/mpc83xx.h	/^#define CSCONFIG_COL_BIT_10	/;"	d
CSCONFIG_COL_BIT_11	include/mpc83xx.h	/^#define CSCONFIG_COL_BIT_11	/;"	d
CSCONFIG_COL_BIT_8	include/mpc83xx.h	/^#define CSCONFIG_COL_BIT_8	/;"	d
CSCONFIG_COL_BIT_9	include/mpc83xx.h	/^#define CSCONFIG_COL_BIT_9	/;"	d
CSCONFIG_EN	include/mpc83xx.h	/^#define CSCONFIG_EN	/;"	d
CSCONFIG_ODT_RD_ALL	include/mpc83xx.h	/^#define CSCONFIG_ODT_RD_ALL	/;"	d
CSCONFIG_ODT_RD_CFG	include/mpc83xx.h	/^#define CSCONFIG_ODT_RD_CFG	/;"	d
CSCONFIG_ODT_RD_NEVER	include/mpc83xx.h	/^#define CSCONFIG_ODT_RD_NEVER	/;"	d
CSCONFIG_ODT_RD_ONLY_CURRENT	include/mpc83xx.h	/^#define CSCONFIG_ODT_RD_ONLY_CURRENT	/;"	d
CSCONFIG_ODT_RD_ONLY_OTHER_CS	include/mpc83xx.h	/^#define CSCONFIG_ODT_RD_ONLY_OTHER_CS	/;"	d
CSCONFIG_ODT_RD_ONLY_OTHER_DIMM	include/mpc83xx.h	/^#define CSCONFIG_ODT_RD_ONLY_OTHER_DIMM	/;"	d
CSCONFIG_ODT_WR_ALL	include/mpc83xx.h	/^#define CSCONFIG_ODT_WR_ALL	/;"	d
CSCONFIG_ODT_WR_CFG	include/mpc83xx.h	/^#define CSCONFIG_ODT_WR_CFG	/;"	d
CSCONFIG_ODT_WR_NEVER	include/mpc83xx.h	/^#define CSCONFIG_ODT_WR_NEVER	/;"	d
CSCONFIG_ODT_WR_ONLY_CURRENT	include/mpc83xx.h	/^#define CSCONFIG_ODT_WR_ONLY_CURRENT	/;"	d
CSCONFIG_ODT_WR_ONLY_OTHER_CS	include/mpc83xx.h	/^#define CSCONFIG_ODT_WR_ONLY_OTHER_CS	/;"	d
CSCONFIG_ODT_WR_ONLY_OTHER_DIMM	include/mpc83xx.h	/^#define CSCONFIG_ODT_WR_ONLY_OTHER_DIMM	/;"	d
CSCONFIG_ROW_BIT	include/mpc83xx.h	/^#define CSCONFIG_ROW_BIT	/;"	d
CSCONFIG_ROW_BIT_12	include/mpc83xx.h	/^#define CSCONFIG_ROW_BIT_12	/;"	d
CSCONFIG_ROW_BIT_13	include/mpc83xx.h	/^#define CSCONFIG_ROW_BIT_13	/;"	d
CSCONFIG_ROW_BIT_14	include/mpc83xx.h	/^#define CSCONFIG_ROW_BIT_14	/;"	d
CSCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR /;"	d
CSCR	drivers/net/rtl8139.c	/^	CSCR=0x74,		\/* chip status and configuration register *\/$/;"	e	enum:RTL8139_registers	file:
CSCRBits	drivers/net/rtl8139.c	/^enum CSCRBits {$/;"	g	file:
CSCR_A	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CSCR_A(/;"	d
CSCR_A	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSCR_A(/;"	d
CSCR_AA	arch/m68k/include/asm/m5307.h	/^#define CSCR_AA	/;"	d
CSCR_AHB_DIV	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_AHB_DIV$/;"	d
CSCR_ARM_DIV	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_ARM_DIV$/;"	d
CSCR_ARM_SRC_MPLL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_ARM_SRC_MPLL	/;"	d
CSCR_BCLK_DIV	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_BCLK_DIV	/;"	d
CSCR_BEM	arch/m68k/include/asm/m5307.h	/^#define CSCR_BEM	/;"	d
CSCR_BIOSWP	include/w83c553f.h	/^#define CSCR_BIOSWP	/;"	d
CSCR_BSTR	arch/m68k/include/asm/m5307.h	/^#define CSCR_BSTR	/;"	d
CSCR_BSTW	arch/m68k/include/asm/m5307.h	/^#define CSCR_BSTW	/;"	d
CSCR_FPM_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_FPM_EN	/;"	d
CSCR_H264_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_H264_SEL	/;"	d
CSCR_L	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CSCR_L(/;"	d
CSCR_L	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSCR_L(/;"	d
CSCR_LinkChangeBit	drivers/net/rtl8139.c	/^	CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,$/;"	e	enum:CSCRBits	file:
CSCR_LinkDownCmd	drivers/net/rtl8139.c	/^	CSCR_LinkDownCmd=0x0f3c0,$/;"	e	enum:CSCRBits	file:
CSCR_LinkDownOffCmd	drivers/net/rtl8139.c	/^	CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,$/;"	e	enum:CSCRBits	file:
CSCR_LinkOKBit	drivers/net/rtl8139.c	/^	CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,$/;"	e	enum:CSCRBits	file:
CSCR_LinkStatusBits	drivers/net/rtl8139.c	/^	CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,$/;"	e	enum:CSCRBits	file:
CSCR_MASK	board/armadeus/apf27/apf27.h	/^#define CSCR_MASK /;"	d
CSCR_MCU_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_MCU_SEL	/;"	d
CSCR_MPEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_MPEN	/;"	d
CSCR_MPEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_MPEN	/;"	d
CSCR_MPLL_RESTART	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_MPLL_RESTART	/;"	d
CSCR_MPLL_RESTART	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_MPLL_RESTART	/;"	d
CSCR_MPU_PRESC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_MPU_PRESC	/;"	d
CSCR_MSHC_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_MSHC_SEL	/;"	d
CSCR_OSC26M_DIS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_OSC26M_DIS	/;"	d
CSCR_OSC26M_DIV1P5	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_OSC26M_DIV1P5	/;"	d
CSCR_PS	arch/m68k/include/asm/m5307.h	/^#define CSCR_PS(/;"	d
CSCR_SD_CNT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_SD_CNT$/;"	d
CSCR_SPEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_SPEN	/;"	d
CSCR_SPEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_SPEN	/;"	d
CSCR_SPLL_RESTART	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_SPLL_RESTART	/;"	d
CSCR_SPLL_RESTART	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_SPLL_RESTART	/;"	d
CSCR_SP_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_SP_SEL	/;"	d
CSCR_SSI1_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_SSI1_SEL	/;"	d
CSCR_SSI2_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_SSI2_SEL	/;"	d
CSCR_SYSTEM_SEL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define CSCR_SYSTEM_SEL	/;"	d
CSCR_U	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CSCR_U(/;"	d
CSCR_U	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSCR_U(/;"	d
CSCR_UBIOSCSE	include/w83c553f.h	/^#define CSCR_UBIOSCSE	/;"	d
CSCR_UPDATE_DIS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_UPDATE_DIS	/;"	d
CSCR_USB_DIV	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define CSCR_USB_DIV$/;"	d
CSCR_VAL	include/configs/imx27lite-common.h	/^#define CSCR_VAL	/;"	d
CSCR_WS	arch/m68k/include/asm/m5307.h	/^#define CSCR_WS	/;"	d
CSC_NONE	drivers/video/ipu_disp.c	/^	CSC_NONE,$/;"	e	enum:csc_type_t	file:
CSC_NUM	drivers/video/ipu_disp.c	/^	CSC_NUM$/;"	e	enum:csc_type_t	file:
CSD0_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CSD0_BASE	/;"	d
CSD0_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSD0_BASE_ADDR	/;"	d
CSD0_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSD0_BASE_ADDR /;"	d
CSD1_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define CSD1_BASE	/;"	d
CSD1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSD1_BASE_ADDR	/;"	d
CSD1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSD1_BASE_ADDR /;"	d
CSDATAENTRY_SIZE	board/mpl/vcma9/lowlevel_init.S	/^	.equiv CSDATAENTRY_SIZE, (. - 0b)$/;"	d
CSDATA_OFFSET	board/mpl/vcma9/lowlevel_init.S	/^	.equiv CSDATA_OFFSET, (. - SETUPDATA)$/;"	d
CSDP_DATA_TYPE_16BIT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DATA_TYPE_16BIT /;"	d
CSDP_DATA_TYPE_32BIT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DATA_TYPE_32BIT /;"	d
CSDP_DATA_TYPE_8BIT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DATA_TYPE_8BIT /;"	d
CSDP_DST_BURST_EN_16BYTES	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_BURST_EN_16BYTES /;"	d
CSDP_DST_BURST_EN_32BYTES	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_BURST_EN_32BYTES /;"	d
CSDP_DST_BURST_EN_64BYTES	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_BURST_EN_64BYTES /;"	d
CSDP_DST_BURST_SINGLE	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_BURST_SINGLE /;"	d
CSDP_DST_ENDIAN_BIG	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_ENDIAN_BIG /;"	d
CSDP_DST_ENDIAN_LITTLE	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_ENDIAN_LITTLE /;"	d
CSDP_DST_ENDIAN_LOCK_ADAPT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_ENDIAN_LOCK_ADAPT /;"	d
CSDP_DST_ENDIAN_LOCK_LOCK	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_DST_ENDIAN_LOCK_LOCK /;"	d
CSDP_SRC_BURST_EN_16BYTES	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_BURST_EN_16BYTES /;"	d
CSDP_SRC_BURST_EN_32BYTES	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_BURST_EN_32BYTES /;"	d
CSDP_SRC_BURST_EN_64BYTES	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_BURST_EN_64BYTES /;"	d
CSDP_SRC_BURST_SINGLE	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_BURST_SINGLE /;"	d
CSDP_SRC_ENDIAN_BIG	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_ENDIAN_BIG /;"	d
CSDP_SRC_ENDIAN_LITTLE	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_ENDIAN_LITTLE /;"	d
CSDP_SRC_ENDIAN_LOCK_ADAPT	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_ENDIAN_LOCK_ADAPT /;"	d
CSDP_SRC_ENDIAN_LOCK_LOCK	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSDP_SRC_ENDIAN_LOCK_LOCK /;"	d
CSE3_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define CSE3_BASE_ADDR	/;"	d
CSECR	arch/sh/include/asm/cpu_sh7722.h	/^#define CSECR /;"	d
CSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CSEL	/;"	d
CSEL	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CSEL	/;"	d
CSEL	include/sym53c8xx.h	/^	#define   CSEL	/;"	d
CSEL_DIV1	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CSEL_DIV1	/;"	d
CSEL_DIV2	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CSEL_DIV2	/;"	d
CSEL_DIV4	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CSEL_DIV4	/;"	d
CSEL_DIV8	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CSEL_DIV8	/;"	d
CSEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define CSEL_P	/;"	d
CSEL_P	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define CSEL_P	/;"	d
CSEN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSEN	/;"	d
CSEXTRADELAY	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CSEXTRADELAY /;"	d
CSF	include/sym53c8xx.h	/^	#define   CSF /;"	d
CSF_PAD_SIZE	arch/arm/imx-common/hab.c	/^#define CSF_PAD_SIZE	/;"	d	file:
CSI1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CSI1_BASE_ADDR /;"	d
CSI1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CSI1_IPS_BASE_ADDR /;"	d
CSI21_DX0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DX0	/;"	d
CSI21_DX1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DX1	/;"	d
CSI21_DX2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DX2	/;"	d
CSI21_DX3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DX3	/;"	d
CSI21_DX4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DX4	/;"	d
CSI21_DY0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DY0	/;"	d
CSI21_DY1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DY1	/;"	d
CSI21_DY2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DY2	/;"	d
CSI21_DY3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DY3	/;"	d
CSI21_DY4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI21_DY4	/;"	d
CSI22_DX0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI22_DX0	/;"	d
CSI22_DX1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI22_DX1	/;"	d
CSI22_DY0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI22_DY0	/;"	d
CSI22_DY1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define CSI22_DY1	/;"	d
CSI2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CSI2_BASE_ADDR /;"	d
CSIGP	include/sym53c8xx.h	/^	#define   CSIGP /;"	d
CSIPORTA_LANE0X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE0X	/;"	d
CSIPORTA_LANE0Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE0Y	/;"	d
CSIPORTA_LANE1X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE1X	/;"	d
CSIPORTA_LANE1Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE1Y	/;"	d
CSIPORTA_LANE2X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE2X	/;"	d
CSIPORTA_LANE2Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE2Y	/;"	d
CSIPORTA_LANE3X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE3X	/;"	d
CSIPORTA_LANE3Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE3Y	/;"	d
CSIPORTA_LANE4X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE4X	/;"	d
CSIPORTA_LANE4Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTA_LANE4Y	/;"	d
CSIPORTB_LANE0X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTB_LANE0X	/;"	d
CSIPORTB_LANE0Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTB_LANE0Y	/;"	d
CSIPORTB_LANE1X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTB_LANE1X	/;"	d
CSIPORTB_LANE1Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTB_LANE1Y	/;"	d
CSIPORTB_LANE2X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTB_LANE2X	/;"	d
CSIPORTB_LANE2Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTB_LANE2Y	/;"	d
CSIPORTC_LANE0X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTC_LANE0X	/;"	d
CSIPORTC_LANE0Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTC_LANE0Y	/;"	d
CSIPORTC_LANE1X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTC_LANE1X	/;"	d
CSIPORTC_LANE1Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define CSIPORTC_LANE1Y	/;"	d
CSIS0_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define CSIS0_SEL_XUSBXTI	/;"	d
CSIS1_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define CSIS1_SEL_XUSBXTI	/;"	d
CSITE_CPU_DBG0_LAR	arch/arm/include/asm/arch-tegra/ap.h	/^#define CSITE_CPU_DBG0_LAR	/;"	d
CSITE_CPU_DBG0_LAR	arch/arm/mach-tegra/cpu.h	/^#define CSITE_CPU_DBG0_LAR	/;"	d
CSITE_CPU_DBG1_LAR	arch/arm/include/asm/arch-tegra/ap.h	/^#define CSITE_CPU_DBG1_LAR	/;"	d
CSITE_CPU_DBG1_LAR	arch/arm/mach-tegra/cpu.h	/^#define CSITE_CPU_DBG1_LAR	/;"	d
CSITE_CPU_DBG2_LAR	arch/arm/mach-tegra/cpu.h	/^#define CSITE_CPU_DBG2_LAR	/;"	d
CSITE_CPU_DBG3_LAR	arch/arm/mach-tegra/cpu.h	/^#define CSITE_CPU_DBG3_LAR	/;"	d
CSITE_KHZ	arch/arm/mach-tegra/cpu.h	/^#define CSITE_KHZ	/;"	d
CSI_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CSI_BASE_ADDR /;"	d
CSI_BAUD	arch/arm/include/asm/arch-mx35/clock.h	/^	CSI_BAUD,$/;"	e	enum:mxc_peri_clock
CSI_MCLK_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	CSI_MCLK_CLK_ROOT = 120,$/;"	e	enum:clk_root_index
CSI_MCLK_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
CSI_MCLK_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define CSI_MCLK_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
CSI_PWDN	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	CSI_PWDN,$/;"	e	enum:qn	file:
CSI_RST	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	CSI_RST,$/;"	e	enum:qn	file:
CSMR	drivers/net/sh_eth.h	/^	CSMR,$/;"	e	enum:__anon5ef54f5a0103
CSMR_AM	arch/m68k/include/asm/m5307.h	/^#define CSMR_AM	/;"	d
CSMR_CI	arch/m68k/include/asm/m5307.h	/^#define CSMR_CI	/;"	d
CSMR_SC	arch/m68k/include/asm/m5307.h	/^#define CSMR_SC	/;"	d
CSMR_SD	arch/m68k/include/asm/m5307.h	/^#define CSMR_SD	/;"	d
CSMR_UC	arch/m68k/include/asm/m5307.h	/^#define CSMR_UC	/;"	d
CSMR_UD	arch/m68k/include/asm/m5307.h	/^#define CSMR_UD	/;"	d
CSMR_V	arch/m68k/include/asm/m5307.h	/^#define CSMR_V	/;"	d
CSMR_WP	arch/m68k/include/asm/m5307.h	/^#define CSMR_WP	/;"	d
CSMSADRCFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	CSMSADRCFG	/;"	d
CSM_HALF	drivers/spi/rk_spi.h	/^	CSM_HALF,		\/* ss_n high for half sclk_out cycles *\/$/;"	e	enum:__anondde5bacc0103
CSM_KEEP	drivers/spi/rk_spi.h	/^	CSM_KEEP	= 0,	\/* ss_n stays low after each frame  *\/$/;"	e	enum:__anondde5bacc0103
CSM_MASK	drivers/spi/rk_spi.h	/^	CSM_MASK	= 0x3,$/;"	e	enum:__anondde5bacc0103
CSM_ONE	drivers/spi/rk_spi.h	/^	CSM_ONE,		\/* ss_n high for one sclk_out cycle *\/$/;"	e	enum:__anondde5bacc0103
CSM_RESV	drivers/spi/rk_spi.h	/^	CSM_RESV,$/;"	e	enum:__anondde5bacc0103
CSM_SHIFT	drivers/spi/rk_spi.h	/^	CSM_SHIFT	= 8,	\/* Chip Select Mode *\/$/;"	e	enum:__anondde5bacc0103
CSN_IOB_VREF_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CSN_IOB_VREF_REG(/;"	d
CSN_IO_BASE_VREF_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CSN_IO_BASE_VREF_REG(/;"	d
CSONTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CSONTIME(/;"	d
CSOR_GPCM_ADM_MASK	include/fsl_ifc.h	/^#define CSOR_GPCM_ADM_MASK	/;"	d
CSOR_GPCM_ADM_SHIFT	include/fsl_ifc.h	/^#define CSOR_GPCM_ADM_SHIFT(/;"	d
CSOR_GPCM_ADM_SHIFT_SHIFT	include/fsl_ifc.h	/^#define CSOR_GPCM_ADM_SHIFT_SHIFT	/;"	d
CSOR_GPCM_BCTLD	include/fsl_ifc.h	/^#define CSOR_GPCM_BCTLD	/;"	d
CSOR_GPCM_GAPERRD	include/fsl_ifc.h	/^#define CSOR_GPCM_GAPERRD(/;"	d
CSOR_GPCM_GAPERRD_MASK	include/fsl_ifc.h	/^#define CSOR_GPCM_GAPERRD_MASK	/;"	d
CSOR_GPCM_GAPERRD_SHIFT	include/fsl_ifc.h	/^#define CSOR_GPCM_GAPERRD_SHIFT	/;"	d
CSOR_GPCM_GPMODE_ASIC	include/fsl_ifc.h	/^#define CSOR_GPCM_GPMODE_ASIC	/;"	d
CSOR_GPCM_GPMODE_NORMAL	include/fsl_ifc.h	/^#define CSOR_GPCM_GPMODE_NORMAL	/;"	d
CSOR_GPCM_GPTO	include/fsl_ifc.h	/^#define CSOR_GPCM_GPTO(/;"	d
CSOR_GPCM_GPTO_MASK	include/fsl_ifc.h	/^#define CSOR_GPCM_GPTO_MASK	/;"	d
CSOR_GPCM_GPTO_SHIFT	include/fsl_ifc.h	/^#define CSOR_GPCM_GPTO_SHIFT	/;"	d
CSOR_GPCM_PARITY_EVEN	include/fsl_ifc.h	/^#define CSOR_GPCM_PARITY_EVEN	/;"	d
CSOR_GPCM_PAR_EN	include/fsl_ifc.h	/^#define CSOR_GPCM_PAR_EN	/;"	d
CSOR_GPCM_RGETA_EXT	include/fsl_ifc.h	/^#define CSOR_GPCM_RGETA_EXT	/;"	d
CSOR_GPCM_TRHZ_100	include/fsl_ifc.h	/^#define CSOR_GPCM_TRHZ_100	/;"	d
CSOR_GPCM_TRHZ_20	include/fsl_ifc.h	/^#define CSOR_GPCM_TRHZ_20	/;"	d
CSOR_GPCM_TRHZ_40	include/fsl_ifc.h	/^#define CSOR_GPCM_TRHZ_40	/;"	d
CSOR_GPCM_TRHZ_60	include/fsl_ifc.h	/^#define CSOR_GPCM_TRHZ_60	/;"	d
CSOR_GPCM_TRHZ_80	include/fsl_ifc.h	/^#define CSOR_GPCM_TRHZ_80	/;"	d
CSOR_GPCM_TRHZ_MASK	include/fsl_ifc.h	/^#define CSOR_GPCM_TRHZ_MASK	/;"	d
CSOR_GPCM_WGETA_EXT	include/fsl_ifc.h	/^#define CSOR_GPCM_WGETA_EXT	/;"	d
CSOR_NAND_BCTLD	include/fsl_ifc.h	/^#define CSOR_NAND_BCTLD	/;"	d
CSOR_NAND_ECC_DEC_EN	include/fsl_ifc.h	/^#define CSOR_NAND_ECC_DEC_EN	/;"	d
CSOR_NAND_ECC_ENC_EN	include/fsl_ifc.h	/^#define CSOR_NAND_ECC_ENC_EN	/;"	d
CSOR_NAND_ECC_MODE_4	include/fsl_ifc.h	/^#define CSOR_NAND_ECC_MODE_4	/;"	d
CSOR_NAND_ECC_MODE_8	include/fsl_ifc.h	/^#define CSOR_NAND_ECC_MODE_8	/;"	d
CSOR_NAND_ECC_MODE_MASK	include/fsl_ifc.h	/^#define CSOR_NAND_ECC_MODE_MASK	/;"	d
CSOR_NAND_PB	include/fsl_ifc.h	/^#define CSOR_NAND_PB(/;"	d
CSOR_NAND_PB_MASK	include/fsl_ifc.h	/^#define CSOR_NAND_PB_MASK	/;"	d
CSOR_NAND_PB_SHIFT	include/fsl_ifc.h	/^#define CSOR_NAND_PB_SHIFT	/;"	d
CSOR_NAND_PGS_2K	include/fsl_ifc.h	/^#define CSOR_NAND_PGS_2K	/;"	d
CSOR_NAND_PGS_4K	include/fsl_ifc.h	/^#define CSOR_NAND_PGS_4K	/;"	d
CSOR_NAND_PGS_512	include/fsl_ifc.h	/^#define CSOR_NAND_PGS_512	/;"	d
CSOR_NAND_PGS_8K	include/fsl_ifc.h	/^#define CSOR_NAND_PGS_8K	/;"	d
CSOR_NAND_PGS_MASK	include/fsl_ifc.h	/^#define CSOR_NAND_PGS_MASK	/;"	d
CSOR_NAND_PGS_SHIFT	include/fsl_ifc.h	/^#define CSOR_NAND_PGS_SHIFT	/;"	d
CSOR_NAND_RAL_1	include/fsl_ifc.h	/^#define CSOR_NAND_RAL_1	/;"	d
CSOR_NAND_RAL_2	include/fsl_ifc.h	/^#define CSOR_NAND_RAL_2	/;"	d
CSOR_NAND_RAL_3	include/fsl_ifc.h	/^#define CSOR_NAND_RAL_3	/;"	d
CSOR_NAND_RAL_4	include/fsl_ifc.h	/^#define CSOR_NAND_RAL_4	/;"	d
CSOR_NAND_RAL_MASK	include/fsl_ifc.h	/^#define CSOR_NAND_RAL_MASK	/;"	d
CSOR_NAND_RAL_SHIFT	include/fsl_ifc.h	/^#define CSOR_NAND_RAL_SHIFT	/;"	d
CSOR_NAND_SPRZ_128	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_128	/;"	d
CSOR_NAND_SPRZ_16	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_16	/;"	d
CSOR_NAND_SPRZ_210	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_210	/;"	d
CSOR_NAND_SPRZ_218	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_218	/;"	d
CSOR_NAND_SPRZ_224	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_224	/;"	d
CSOR_NAND_SPRZ_64	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_64	/;"	d
CSOR_NAND_SPRZ_CSOR_EXT	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_CSOR_EXT	/;"	d
CSOR_NAND_SPRZ_MASK	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_MASK	/;"	d
CSOR_NAND_SPRZ_SHIFT	include/fsl_ifc.h	/^#define CSOR_NAND_SPRZ_SHIFT	/;"	d
CSOR_NAND_TRHZ_100	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_100	/;"	d
CSOR_NAND_TRHZ_20	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_20	/;"	d
CSOR_NAND_TRHZ_40	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_40	/;"	d
CSOR_NAND_TRHZ_60	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_60	/;"	d
CSOR_NAND_TRHZ_80	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_80	/;"	d
CSOR_NAND_TRHZ_MASK	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_MASK	/;"	d
CSOR_NAND_TRHZ_SHIFT	include/fsl_ifc.h	/^#define CSOR_NAND_TRHZ_SHIFT	/;"	d
CSOR_NOR_ADM_MASK	include/fsl_ifc.h	/^#define CSOR_NOR_ADM_MASK	/;"	d
CSOR_NOR_ADM_SHFT_MODE_EN	include/fsl_ifc.h	/^#define CSOR_NOR_ADM_SHFT_MODE_EN	/;"	d
CSOR_NOR_ADM_SHIFT	include/fsl_ifc.h	/^#define CSOR_NOR_ADM_SHIFT(/;"	d
CSOR_NOR_ADM_SHIFT_SHIFT	include/fsl_ifc.h	/^#define CSOR_NOR_ADM_SHIFT_SHIFT	/;"	d
CSOR_NOR_AVD_TGL_PGM_EN	include/fsl_ifc.h	/^#define CSOR_NOR_AVD_TGL_PGM_EN	/;"	d
CSOR_NOR_BCTLD	include/fsl_ifc.h	/^#define CSOR_NOR_BCTLD	/;"	d
CSOR_NOR_NOR_MODE_AVD_NOR	include/fsl_ifc.h	/^#define CSOR_NOR_NOR_MODE_AVD_NOR	/;"	d
CSOR_NOR_NOR_MODE_AYSNC_NOR	include/fsl_ifc.h	/^#define CSOR_NOR_NOR_MODE_AYSNC_NOR	/;"	d
CSOR_NOR_PGRD_EN	include/fsl_ifc.h	/^#define CSOR_NOR_PGRD_EN	/;"	d
CSOR_NOR_TRHZ_100	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_100	/;"	d
CSOR_NOR_TRHZ_20	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_20	/;"	d
CSOR_NOR_TRHZ_40	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_40	/;"	d
CSOR_NOR_TRHZ_60	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_60	/;"	d
CSOR_NOR_TRHZ_80	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_80	/;"	d
CSOR_NOR_TRHZ_MASK	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_MASK	/;"	d
CSOR_NOR_TRHZ_SHIFT	include/fsl_ifc.h	/^#define CSOR_NOR_TRHZ_SHIFT	/;"	d
CSPI1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSPI1_BASE_ADDR /;"	d
CSPI1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSPI1_BASE_ADDR /;"	d
CSPI2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define CSPI2_BASE_ADDR /;"	d
CSPI2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSPI2_BASE_ADDR	/;"	d
CSPI3_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSPI3_BASE_ADDR	/;"	d
CSPR_BA	include/fsl_ifc.h	/^#define CSPR_BA	/;"	d
CSPR_BA_SHIFT	include/fsl_ifc.h	/^#define CSPR_BA_SHIFT	/;"	d
CSPR_MSEL	include/fsl_ifc.h	/^#define CSPR_MSEL	/;"	d
CSPR_MSEL_GPCM	include/fsl_ifc.h	/^#define CSPR_MSEL_GPCM	/;"	d
CSPR_MSEL_NAND	include/fsl_ifc.h	/^#define CSPR_MSEL_NAND	/;"	d
CSPR_MSEL_NOR	include/fsl_ifc.h	/^#define CSPR_MSEL_NOR	/;"	d
CSPR_MSEL_SHIFT	include/fsl_ifc.h	/^#define CSPR_MSEL_SHIFT	/;"	d
CSPR_PHYS_ADDR	include/fsl_ifc.h	/^#define CSPR_PHYS_ADDR(/;"	d
CSPR_PORT_SIZE	include/fsl_ifc.h	/^#define CSPR_PORT_SIZE	/;"	d
CSPR_PORT_SIZE_16	include/fsl_ifc.h	/^#define CSPR_PORT_SIZE_16	/;"	d
CSPR_PORT_SIZE_32	include/fsl_ifc.h	/^#define CSPR_PORT_SIZE_32	/;"	d
CSPR_PORT_SIZE_8	include/fsl_ifc.h	/^#define CSPR_PORT_SIZE_8	/;"	d
CSPR_PORT_SIZE_SHIFT	include/fsl_ifc.h	/^#define CSPR_PORT_SIZE_SHIFT	/;"	d
CSPR_V	include/fsl_ifc.h	/^#define CSPR_V	/;"	d
CSPR_V_SHIFT	include/fsl_ifc.h	/^#define CSPR_V_SHIFT	/;"	d
CSPR_WP	include/fsl_ifc.h	/^#define CSPR_WP	/;"	d
CSPR_WP_SHIFT	include/fsl_ifc.h	/^#define CSPR_WP_SHIFT	/;"	d
CSPWCR0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSPWCR0_A:	.long	0xFF800280$/;"	l
CSPWCR0_A	board/renesas/r0p7734/lowlevel_init.S	/^CSPWCR0_A:	.long	0xFF800280$/;"	l
CSPWCR0_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSPWCR0_D:	.long	0x00000000$/;"	l
CSPWCR0_D	board/renesas/r0p7734/lowlevel_init.S	/^CSPWCR0_D:	.long	0x00000000$/;"	l
CSPWCR1_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSPWCR1_A:	.long	0xFF800284$/;"	l
CSPWCR1_A	board/renesas/r0p7734/lowlevel_init.S	/^CSPWCR1_A:	.long	0xFF800284$/;"	l
CSPWCR1_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSPWCR1_D:	.long	0x00000000$/;"	l
CSPWCR1_D	board/renesas/r0p7734/lowlevel_init.S	/^CSPWCR1_D:	.long	0x00000000$/;"	l
CSRDOFFTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CSRDOFFTIME(/;"	d
CSREC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSREC(/;"	d
CSRR0	arch/powerpc/include/asm/processor.h	/^#define CSRR0	/;"	d
CSRR1	arch/powerpc/include/asm/processor.h	/^#define CSRR1	/;"	d
CSRTR	arch/sh/include/asm/cpu_sh7722.h	/^#define CSRTR /;"	d
CSR_ENABLE	arch/arm/include/asm/arch-tegra124/flow.h	/^#define CSR_ENABLE	/;"	d
CSR_ENABLE	arch/arm/include/asm/arch-tegra210/flow.h	/^#define CSR_ENABLE	/;"	d
CSR_ENABLE	arch/arm/mach-tegra/psci.S	/^#define CSR_ENABLE	/;"	d	file:
CSR_IMMEDIATE_WAKE	arch/arm/include/asm/arch-tegra124/flow.h	/^#define CSR_IMMEDIATE_WAKE	/;"	d
CSR_IMMEDIATE_WAKE	arch/arm/include/asm/arch-tegra210/flow.h	/^#define CSR_IMMEDIATE_WAKE	/;"	d
CSR_IMMEDIATE_WAKE	arch/arm/mach-tegra/psci.S	/^#define CSR_IMMEDIATE_WAKE	/;"	d	file:
CSR_MISALIGNED_ADRS_ERR	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSR_MISALIGNED_ADRS_ERR	/;"	d
CSR_PWR_OFF_STS	arch/arm/include/asm/arch-tegra124/flow.h	/^#define CSR_PWR_OFF_STS	/;"	d
CSR_SUPERVISOR_ERR	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSR_SUPERVISOR_ERR	/;"	d
CSR_TRANS_ERR	arch/arm/include/asm/arch-omap3/dma.h	/^#define CSR_TRANS_ERR	/;"	d
CSR_WAIT_WFI_SHIFT	arch/arm/include/asm/arch-tegra124/flow.h	/^#define CSR_WAIT_WFI_SHIFT	/;"	d
CSR_WAIT_WFI_SHIFT	arch/arm/include/asm/arch-tegra210/flow.h	/^#define CSR_WAIT_WFI_SHIFT	/;"	d
CSR_WAIT_WFI_SHIFT	arch/arm/mach-tegra/psci.S	/^#define CSR_WAIT_WFI_SHIFT	/;"	d	file:
CSSTS	drivers/usb/host/r8a66597.h	/^#define	CSSTS	/;"	d
CSTCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CSTCR /;"	d
CSTM	drivers/video/tegra124/sor.h	/^#define CSTM	/;"	d
CSTM_LINKACTA_DISABLE	drivers/video/tegra124/sor.h	/^#define CSTM_LINKACTA_DISABLE	/;"	d
CSTM_LINKACTA_ENABLE	drivers/video/tegra124/sor.h	/^#define CSTM_LINKACTA_ENABLE	/;"	d
CSTM_LINKACTA_SHIFT	drivers/video/tegra124/sor.h	/^#define CSTM_LINKACTA_SHIFT	/;"	d
CSTM_LINKACTB_DISABLE	drivers/video/tegra124/sor.h	/^#define CSTM_LINKACTB_DISABLE	/;"	d
CSTM_LINKACTB_ENABLE	drivers/video/tegra124/sor.h	/^#define CSTM_LINKACTB_ENABLE	/;"	d
CSTM_LINKACTB_SHIFT	drivers/video/tegra124/sor.h	/^#define CSTM_LINKACTB_SHIFT	/;"	d
CSTM_LVDS_EN_DISABLE	drivers/video/tegra124/sor.h	/^#define CSTM_LVDS_EN_DISABLE	/;"	d
CSTM_LVDS_EN_ENABLE	drivers/video/tegra124/sor.h	/^#define CSTM_LVDS_EN_ENABLE	/;"	d
CSTM_LVDS_EN_SHIFT	drivers/video/tegra124/sor.h	/^#define CSTM_LVDS_EN_SHIFT	/;"	d
CSTM_ROTCLK_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define CSTM_ROTCLK_DEFAULT_MASK	/;"	d
CSTM_ROTCLK_SHIFT	drivers/video/tegra124/sor.h	/^#define CSTM_ROTCLK_SHIFT	/;"	d
CSTM_ROTDAT_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define CSTM_ROTDAT_DEFAULT_MASK	/;"	d
CSTM_ROTDAT_SHIFT	drivers/video/tegra124/sor.h	/^#define CSTM_ROTDAT_SHIFT	/;"	d
CSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define CSTR /;"	d
CSTR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CSTR	/;"	d
CSTSR	arch/sh/include/asm/cpu_sh7722.h	/^#define CSTSR /;"	d
CSU_ALL_RW	include/fsl_csu.h	/^	CSU_ALL_RW = 0xff,$/;"	e	enum:csu_cslx_access
CSU_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define CSU_BASE_ADDR	/;"	d
CSU_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define CSU_BASE_ADDR /;"	d
CSU_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define CSU_BASE_ADDR	/;"	d
CSU_CSLX_2D_ACE	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_2D_ACE,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ASRC	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_ASRC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_BM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_BM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_COP_DCSR	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_COP_DCSR,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_CSU	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_CSU,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_CSU	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_CSU,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DCFG_CCU_RCPM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DCFG_CCU_RCPM = 60,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DCFG_CCU_RCPM	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DCFG_CCU_RCPM = 60,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DDI	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DDI,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DDR	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DDR,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DDR	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DDR,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DMA_MUX1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DMA_MUX1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DMA_MUX1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DMA_MUX1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DMA_MUX2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DMA_MUX2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DMA_MUX2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DMA_MUX2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DSCR	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DSCR = 121,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DSPI1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DSPI1 = 41,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DSPI1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DSPI1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DSPI2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DSPI2 = 40,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DUART1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DUART1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DUART1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DUART1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DUART2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_DUART2 = 50,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_DUART2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_DUART2 = 50,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_EDMA	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_EDMA,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_EDMA	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_EDMA,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_EPU	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_EPU,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ESDHC	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_ESDHC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ESDHC	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_ESDHC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ESDHC2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_ESDHC2 = 80,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ETSEC1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_ETSEC1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ETSEC2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_ETSEC2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_ETSEC3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_ETSEC3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FLEXCAN1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FLEXCAN1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FLEXCAN2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FLEXCAN2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FLEXCAN3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FLEXCAN3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FLEXCAN4	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FLEXCAN4 = 80,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FM = 66,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM2 = 86,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM4	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM4	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM5	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM5,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM5	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM5,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM6	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM6 = 90,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM6	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM6 = 90,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM7	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM7,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM7	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM7,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM8	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_FTM8,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_FTM8	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_FTM8,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GDI	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_GDI,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GIC	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_GIC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GIC	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_GIC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_GPIO1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_GPIO1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_GPIO2 = 70,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_GPIO2 = 70,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_GPIO3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_GPIO3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO4	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_GPIO4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_GPIO4	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_GPIO4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_I2C1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_I2C1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_I2C1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_I2C1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_I2C2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_I2C2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_I2C2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_I2C2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_I2C3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_I2C3 = 48,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_I2C3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_I2C3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_IFC	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_IFC = 45,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_IFC	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_IFC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_IFC_MEM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_IFC_MEM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_IFC_MEM	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_IFC_MEM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_IIC4	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_IIC4 = 77,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_LPUART1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_LPUART1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_LPUART2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_LPUART2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_LPUART3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_LPUART3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART4	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_LPUART4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART4	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_LPUART4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART5	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_LPUART5,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART5	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_LPUART5,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART6	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_LPUART6,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_LPUART6	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_LPUART6,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_MAX	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_MAX,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_MG2TPR_IP	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_MG2TPR_IP,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_MG2TPR_IP	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_MG2TPR_IP,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_OCRAM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_OCRAM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_OCRAM	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_OCRAM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_OCRAM2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_OCRAM2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_OCRAM2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_OCRAM2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PCIE1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_PCIE1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE1_IO	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PCIE1_IO,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE1_IO	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_PCIE1_IO,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PCIE2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_PCIE2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE2_IO	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PCIE2_IO = 0,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE2_IO	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_PCIE2_IO = 0,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PCIE3 = 16,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PCIE3_IO	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PCIE3_IO,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PLATFORM_CONT	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_PLATFORM_CONT,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_PLATFORM_CONT	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_PLATFORM_CONT,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QDMA	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_QDMA,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QDMA	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_QDMA,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_QM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QM_BM_SWPORTAL	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_QM_BM_SWPORTAL,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QSPI	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_QSPI,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QSPI	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_QSPI,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QSPI_MEM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_QSPI_MEM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QSPI_MEM	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_QSPI_MEM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QUICC	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_QUICC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_QUICC	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_QUICC,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_RESERVED0	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_RESERVED0,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_RESERVED1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_RESERVED1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_RESERVED2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_RESERVED2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SAI1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SAI1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SAI2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SAI2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SAI3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SAI3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI4	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SAI4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SAI4	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SAI4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SATA	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SATA,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SATA	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SATA,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SCFG	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SCFG,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SEC5_5	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SEC5_5,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SEC5_5	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SEC5_5,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SECURE_BOOTROM	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SECURE_BOOTROM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SECURE_BOOTROM	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SECURE_BOOTROM,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SECURE_MONITOR	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SECURE_MONITOR,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SECURE_MONITOR	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SECURE_MONITOR,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SERDES	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SERDES = 32,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SERDES	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SERDES = 32,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SFP	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SFP,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SFP	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SFP,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SPDIF	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SPDIF,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SYS_CNT	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_SYS_CNT,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_SYS_CNT	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_SYS_CNT,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_TMU	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_TMU,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_TMU	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_TMU,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_USB1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_USB1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_USB2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_USB2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_USB2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_USB2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_USB3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_USB3 = 20,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_USB3	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_USB3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_USB3_PHY	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_USB3_PHY = 116,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT1	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_WDT1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT1	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_WDT1,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT2	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_WDT2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT2	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^	CSU_CSLX_WDT2,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT3	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_WDT3,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT4	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_WDT4,$/;"	e	enum:csu_cslx_ind
CSU_CSLX_WDT5	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^	CSU_CSLX_WDT5 = 81,$/;"	e	enum:csu_cslx_ind
CSU_INIT_SEC_LEVEL0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CSU_INIT_SEC_LEVEL0	/;"	d
CSU_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CSU_IPS_BASE_ADDR /;"	d
CSU_NS_SUP_R	include/fsl_csu.h	/^	CSU_NS_SUP_R = 0x08,$/;"	e	enum:csu_cslx_access
CSU_NS_SUP_RW	include/fsl_csu.h	/^	CSU_NS_SUP_RW = 0x88,$/;"	e	enum:csu_cslx_access
CSU_NS_SUP_W	include/fsl_csu.h	/^	CSU_NS_SUP_W = 0x80,$/;"	e	enum:csu_cslx_access
CSU_NS_USER_R	include/fsl_csu.h	/^	CSU_NS_USER_R = 0x04,$/;"	e	enum:csu_cslx_access
CSU_NS_USER_RW	include/fsl_csu.h	/^	CSU_NS_USER_RW = 0x44,$/;"	e	enum:csu_cslx_access
CSU_NS_USER_W	include/fsl_csu.h	/^	CSU_NS_USER_W = 0x40,$/;"	e	enum:csu_cslx_access
CSU_NUM_REGS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define CSU_NUM_REGS	/;"	d
CSU_S_SUP_R	include/fsl_csu.h	/^	CSU_S_SUP_R = 0x02,$/;"	e	enum:csu_cslx_access
CSU_S_SUP_RW	include/fsl_csu.h	/^	CSU_S_SUP_RW = 0x22,$/;"	e	enum:csu_cslx_access
CSU_S_SUP_W	include/fsl_csu.h	/^	CSU_S_SUP_W = 0x20,$/;"	e	enum:csu_cslx_access
CSU_S_USER_R	include/fsl_csu.h	/^	CSU_S_USER_R = 0x01,$/;"	e	enum:csu_cslx_access
CSU_S_USER_RW	include/fsl_csu.h	/^	CSU_S_USER_RW = 0x11,$/;"	e	enum:csu_cslx_access
CSU_S_USER_W	include/fsl_csu.h	/^	CSU_S_USER_W = 0x10,$/;"	e	enum:csu_cslx_access
CSVALID	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CSVALID /;"	d
CSWCR0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSWCR0_A:	.long	0xFF800230$/;"	l
CSWCR0_A	board/renesas/r0p7734/lowlevel_init.S	/^CSWCR0_A:	.long	0xFF800230$/;"	l
CSWCR0_D_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSWCR0_D_400:	.long	0x02120114$/;"	l
CSWCR0_D_400	board/renesas/r0p7734/lowlevel_init.S	/^CSWCR0_D_400:	.long	0x02120114$/;"	l
CSWCR0_D_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSWCR0_D_533:	.long	0x01120104$/;"	l
CSWCR0_D_533	board/renesas/r0p7734/lowlevel_init.S	/^CSWCR0_D_533:	.long	0x01120104$/;"	l
CSWCR1_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSWCR1_A:	.long	0xFF800234$/;"	l
CSWCR1_A	board/renesas/r0p7734/lowlevel_init.S	/^CSWCR1_A:	.long	0xFF800234$/;"	l
CSWCR1_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^CSWCR1_D:	.long	0x077F077F$/;"	l
CSWCR1_D	board/renesas/r0p7734/lowlevel_init.S	/^CSWCR1_D:	.long	0x077F077F$/;"	l
CSWROFFTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CSWROFFTIME(/;"	d
CSWSIGNATURE	include/usb_defs.h	/^#	define CSWSIGNATURE	/;"	d
CSWSTATUS_FAILED	include/usb_defs.h	/^#	define CSWSTATUS_FAILED /;"	d
CSWSTATUS_GOOD	include/usb_defs.h	/^#	define CSWSTATUS_GOOD	/;"	d
CSWSTATUS_PHASE	include/usb_defs.h	/^#	define CSWSTATUS_PHASE	/;"	d
CSYNC	arch/blackfin/include/asm/blackfin_local.h	/^#define CSYNC(/;"	d
CSYNC	arch/blackfin/include/asm/blackfin_local.h	/^static inline void CSYNC(void)$/;"	f	typeref:typename:void
CS_ACK_CMD_GEN_RESTART	drivers/i2c/kona_i2c.c	/^#define CS_ACK_CMD_GEN_RESTART	/;"	d	file:
CS_ACK_CMD_GEN_START	drivers/i2c/kona_i2c.c	/^#define CS_ACK_CMD_GEN_START	/;"	d	file:
CS_ACK_MASK	drivers/i2c/kona_i2c.c	/^#define CS_ACK_MASK	/;"	d	file:
CS_ACK_SHIFT	drivers/i2c/kona_i2c.c	/^#define CS_ACK_SHIFT	/;"	d	file:
CS_ADDR_MASK	drivers/ddr/microchip/ddr2_timing.h	/^#define CS_ADDR_MASK	/;"	d
CS_ADDR_RSHIFT	drivers/ddr/microchip/ddr2_timing.h	/^#define CS_ADDR_RSHIFT	/;"	d
CS_BITS	drivers/ddr/microchip/ddr2_timing.h	/^#define CS_BITS	/;"	d
CS_BIT_MASK	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define CS_BIT_MASK	/;"	d
CS_CBE_VALUE	drivers/ddr/marvell/a38x/ddr3_training.c	/^#define CS_CBE_VALUE(/;"	d	file:
CS_CMD_CMD_NO_ACTION	drivers/i2c/kona_i2c.c	/^#define CS_CMD_CMD_NO_ACTION	/;"	d	file:
CS_CMD_CMD_START_RESTART	drivers/i2c/kona_i2c.c	/^#define CS_CMD_CMD_START_RESTART	/;"	d	file:
CS_CMD_CMD_STOP	drivers/i2c/kona_i2c.c	/^#define CS_CMD_CMD_STOP	/;"	d	file:
CS_CMD_SHIFT	drivers/i2c/kona_i2c.c	/^#define CS_CMD_SHIFT	/;"	d	file:
CS_CTRL	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define CS_CTRL	/;"	d
CS_CTRL_ME	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define CS_CTRL_ME	/;"	d
CS_ENABLE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS_ENABLE_REG	/;"	d
CS_ENDPOINT	include/usbdescriptors.h	/^#define CS_ENDPOINT	/;"	d
CS_EN_CMD_ENABLE_BSC	drivers/i2c/kona_i2c.c	/^#define CS_EN_CMD_ENABLE_BSC	/;"	d	file:
CS_EN_SHIFT	drivers/i2c/kona_i2c.c	/^#define CS_EN_SHIFT	/;"	d	file:
CS_I2C_BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS_I2C_BCR_D:	.long	0x11111100$/;"	l
CS_I2C_WCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS_I2C_WCR_D:	.long	0x00000003$/;"	l
CS_IDST	drivers/usb/host/r8a66597.h	/^#define	  CS_IDST	/;"	d
CS_INTERFACE	include/usbdescriptors.h	/^#define CS_INTERFACE	/;"	d
CS_MAP	board/freescale/mx23evk/spl_boot.c	/^#define CS_MAP	/;"	d	file:
CS_MAP	board/freescale/mx28evk/iomux.c	/^#define CS_MAP	/;"	d	file:
CS_NON_SINGLE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	CS_NON_SINGLE$/;"	e	enum:hws_ddr_cs
CS_OFFSET	drivers/i2c/kona_i2c.c	/^#define CS_OFFSET	/;"	d	file:
CS_RDDS	drivers/usb/host/r8a66597.h	/^#define	  CS_RDDS	/;"	d
CS_RDSS	drivers/usb/host/r8a66597.h	/^#define	  CS_RDSS	/;"	d
CS_REGISTER_ADDR_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS_REGISTER_ADDR_OFFSET	/;"	d
CS_REG_VALUE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define CS_REG_VALUE(/;"	d
CS_RGB	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CS_RGB,$/;"	e	enum:color_space
CS_SD_BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS_SD_BCR_D:	.long	0x00000300$/;"	l
CS_SD_WCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS_SD_WCR_D:	.long	0x00030108$/;"	l
CS_SETUP_CNT	drivers/mtd/nand/denali.h	/^#define CS_SETUP_CNT	/;"	d
CS_SETUP_CNT__VALUE	drivers/mtd/nand/denali.h	/^#define     CS_SETUP_CNT__VALUE	/;"	d
CS_SINGLE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	CS_SINGLE,$/;"	e	enum:hws_ddr_cs
CS_SQER	drivers/usb/host/r8a66597.h	/^#define	  CS_SQER	/;"	d
CS_USB_BCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS_USB_BCR_D:	.long	0x11111200$/;"	l
CS_USB_WCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^CS_USB_WCR_D:	.long	0x00020005$/;"	l
CS_WRDS	drivers/usb/host/r8a66597.h	/^#define	  CS_WRDS	/;"	d
CS_WRND	drivers/usb/host/r8a66597.h	/^#define	  CS_WRND	/;"	d
CS_WRSS	drivers/usb/host/r8a66597.h	/^#define	  CS_WRSS	/;"	d
CS_YCBCR422	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CS_YCBCR422,$/;"	e	enum:color_space
CS_YCBCR444	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	CS_YCBCR444$/;"	e	enum:color_space
CSecToLook	lib/lzma/Types.h	/^} CSecToLook;$/;"	t	typeref:struct:__anonf2a2f1b90908
CSecToRead	lib/lzma/Types.h	/^} CSecToRead;$/;"	t	typeref:struct:__anonf2a2f1b90a08
CTAP_SHORT_EN	drivers/usb/eth/r8152.h	/^#define CTAP_SHORT_EN	/;"	d
CTBENR	arch/powerpc/cpu/mpc85xx/start.S	/^#define CTBENR	/;"	d	file:
CTCR_ARM_TIMER_AUTO_DIS	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_AUTO_DIS(/;"	d	file:
CTCR_ARM_TIMER_AUTO_EN	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_AUTO_EN(/;"	d	file:
CTCR_ARM_TIMER_AUTO_EN	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CTCR_ARM_TIMER_AUTO_EN(/;"	d
CTCR_ARM_TIMER_AUTO_MASK	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_AUTO_MASK(/;"	d	file:
CTCR_ARM_TIMER_AUTO_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CTCR_ARM_TIMER_AUTO_MASK(/;"	d
CTCR_ARM_TIMER_AUTO_OFFS	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_AUTO_OFFS(/;"	d	file:
CTCR_ARM_TIMER_AUTO_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CTCR_ARM_TIMER_AUTO_OFFS(/;"	d
CTCR_ARM_TIMER_DIS	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_DIS(/;"	d	file:
CTCR_ARM_TIMER_EN	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_EN(/;"	d	file:
CTCR_ARM_TIMER_EN	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CTCR_ARM_TIMER_EN(/;"	d
CTCR_ARM_TIMER_EN_MASK	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_EN_MASK(/;"	d	file:
CTCR_ARM_TIMER_EN_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CTCR_ARM_TIMER_EN_MASK(/;"	d
CTCR_ARM_TIMER_EN_OFFS	arch/arm/mach-orion5x/timer.c	/^#define CTCR_ARM_TIMER_EN_OFFS(/;"	d	file:
CTCR_ARM_TIMER_EN_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define CTCR_ARM_TIMER_EN_OFFS(/;"	d
CTEST0	include/sym53c8xx.h	/^#define CTEST0	/;"	d
CTEST1	include/sym53c8xx.h	/^#define CTEST1	/;"	d
CTEST2	include/sym53c8xx.h	/^#define CTEST2	/;"	d
CTEST3	include/sym53c8xx.h	/^#define CTEST3	/;"	d
CTEST4	include/sym53c8xx.h	/^#define CTEST4	/;"	d
CTEST5	include/sym53c8xx.h	/^#define CTEST5	/;"	d
CTEST6	include/sym53c8xx.h	/^#define CTEST6	/;"	d
CTLANADLYPDCTL	arch/x86/cpu/quark/smc.h	/^#define CTLANADLYPDCTL	/;"	d
CTLANADLYPUCTL	arch/x86/cpu/quark/smc.h	/^#define CTLANADLYPUCTL	/;"	d
CTLANADRVPDCTL	arch/x86/cpu/quark/smc.h	/^#define CTLANADRVPDCTL	/;"	d
CTLANADRVPUCTL	arch/x86/cpu/quark/smc.h	/^#define CTLANADRVPUCTL	/;"	d
CTLDLYPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CTLDLYPDCTLCH0	/;"	d
CTLDLYPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CTLDLYPUCTLCH0	/;"	d
CTLDRVPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CTLDRVPDCTLCH0	/;"	d
CTLDRVPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define CTLDRVPUCTLCH0	/;"	d
CTLPROGIO1SPEEDCTRL	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define CTLPROGIO1SPEEDCTRL	/;"	d
CTLR	arch/sh/include/asm/cpu_sh7722.h	/^#define CTLR /;"	d
CTLR_INTLV_MASK	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define CTLR_INTLV_MASK	/;"	d	file:
CTLR_SCC	post/cpu/mpc8xx/ether.c	/^#define CTLR_SCC /;"	d	file:
CTLR_SCC	post/cpu/mpc8xx/uart.c	/^#define CTLR_SCC /;"	d	file:
CTLR_SMC	post/cpu/mpc8xx/uart.c	/^#define CTLR_SMC /;"	d	file:
CTLVREFCH0	arch/x86/cpu/quark/smc.h	/^#define CTLVREFCH0	/;"	d
CTL_ADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define CTL_ADDR_MASK	/;"	d
CTL_ADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define CTL_ADDR_POS	/;"	d
CTL_AUTO_RELEASE	drivers/net/smc91111.h	/^#define CTL_AUTO_RELEASE /;"	d
CTL_BACKSPACE	common/cli_readline.c	/^#define CTL_BACKSPACE	/;"	d	file:
CTL_BSTATUS	arch/nios2/include/asm/nios2.h	/^#define CTL_BSTATUS	/;"	d
CTL_CH	common/cli_readline.c	/^#define CTL_CH(/;"	d	file:
CTL_CR_ENABLE	drivers/net/smc91111.h	/^#define	CTL_CR_ENABLE	/;"	d
CTL_DEFAULT	drivers/net/smc91111.h	/^#define CTL_DEFAULT /;"	d
CTL_EEPROM_SELECT	drivers/net/smc91111.h	/^#define	CTL_EEPROM_SELECT /;"	d
CTL_ESTATUS	arch/nios2/include/asm/nios2.h	/^#define CTL_ESTATUS	/;"	d
CTL_IENABLE	arch/nios2/include/asm/nios2.h	/^#define CTL_IENABLE	/;"	d
CTL_IPENDING	arch/nios2/include/asm/nios2.h	/^#define CTL_IPENDING	/;"	d
CTL_LE_ENABLE	drivers/net/smc91111.h	/^#define	CTL_LE_ENABLE	/;"	d
CTL_RCV_BAD	drivers/net/smc91111.h	/^#define CTL_RCV_BAD	/;"	d
CTL_REG	drivers/net/smc91111.h	/^#define	CTL_REG	/;"	d
CTL_REG_EBSTCON	drivers/net/enc28j60.h	/^#define CTL_REG_EBSTCON	/;"	d
CTL_REG_EBSTCSH	drivers/net/enc28j60.h	/^#define CTL_REG_EBSTCSH	/;"	d
CTL_REG_EBSTCSL	drivers/net/enc28j60.h	/^#define CTL_REG_EBSTCSL	/;"	d
CTL_REG_EBSTSD	drivers/net/enc28j60.h	/^#define CTL_REG_EBSTSD	/;"	d
CTL_REG_ECOCON	drivers/net/enc28j60.h	/^#define CTL_REG_ECOCON	/;"	d
CTL_REG_ECON1	drivers/net/enc28j60.h	/^#define CTL_REG_ECON1	/;"	d
CTL_REG_ECON2	drivers/net/enc28j60.h	/^#define CTL_REG_ECON2	/;"	d
CTL_REG_EDMACSH	drivers/net/enc28j60.h	/^#define CTL_REG_EDMACSH	/;"	d
CTL_REG_EDMACSL	drivers/net/enc28j60.h	/^#define CTL_REG_EDMACSL	/;"	d
CTL_REG_EDMADSTH	drivers/net/enc28j60.h	/^#define CTL_REG_EDMADSTH	/;"	d
CTL_REG_EDMADSTL	drivers/net/enc28j60.h	/^#define CTL_REG_EDMADSTL	/;"	d
CTL_REG_EDMANDH	drivers/net/enc28j60.h	/^#define CTL_REG_EDMANDH	/;"	d
CTL_REG_EDMANDL	drivers/net/enc28j60.h	/^#define CTL_REG_EDMANDL	/;"	d
CTL_REG_EDMASTH	drivers/net/enc28j60.h	/^#define CTL_REG_EDMASTH	/;"	d
CTL_REG_EDMASTL	drivers/net/enc28j60.h	/^#define CTL_REG_EDMASTL	/;"	d
CTL_REG_EFLOCON	drivers/net/enc28j60.h	/^#define CTL_REG_EFLOCON	/;"	d
CTL_REG_EHT0	drivers/net/enc28j60.h	/^#define CTL_REG_EHT0	/;"	d
CTL_REG_EHT1	drivers/net/enc28j60.h	/^#define CTL_REG_EHT1	/;"	d
CTL_REG_EHT2	drivers/net/enc28j60.h	/^#define CTL_REG_EHT2	/;"	d
CTL_REG_EHT3	drivers/net/enc28j60.h	/^#define CTL_REG_EHT3	/;"	d
CTL_REG_EHT4	drivers/net/enc28j60.h	/^#define CTL_REG_EHT4	/;"	d
CTL_REG_EHT5	drivers/net/enc28j60.h	/^#define CTL_REG_EHT5	/;"	d
CTL_REG_EHT6	drivers/net/enc28j60.h	/^#define CTL_REG_EHT6	/;"	d
CTL_REG_EHT7	drivers/net/enc28j60.h	/^#define CTL_REG_EHT7	/;"	d
CTL_REG_EIE	drivers/net/enc28j60.h	/^#define CTL_REG_EIE	/;"	d
CTL_REG_EIR	drivers/net/enc28j60.h	/^#define CTL_REG_EIR	/;"	d
CTL_REG_EPAUSH	drivers/net/enc28j60.h	/^#define CTL_REG_EPAUSH	/;"	d
CTL_REG_EPAUSL	drivers/net/enc28j60.h	/^#define CTL_REG_EPAUSL	/;"	d
CTL_REG_EPKTCNT	drivers/net/enc28j60.h	/^#define CTL_REG_EPKTCNT	/;"	d
CTL_REG_EPMCSH	drivers/net/enc28j60.h	/^#define CTL_REG_EPMCSH	/;"	d
CTL_REG_EPMCSL	drivers/net/enc28j60.h	/^#define CTL_REG_EPMCSL	/;"	d
CTL_REG_EPMM0	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM0	/;"	d
CTL_REG_EPMM1	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM1	/;"	d
CTL_REG_EPMM2	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM2	/;"	d
CTL_REG_EPMM3	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM3	/;"	d
CTL_REG_EPMM4	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM4	/;"	d
CTL_REG_EPMM5	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM5	/;"	d
CTL_REG_EPMM6	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM6	/;"	d
CTL_REG_EPMM7	drivers/net/enc28j60.h	/^#define CTL_REG_EPMM7	/;"	d
CTL_REG_EPMOH	drivers/net/enc28j60.h	/^#define CTL_REG_EPMOH	/;"	d
CTL_REG_EPMOL	drivers/net/enc28j60.h	/^#define CTL_REG_EPMOL	/;"	d
CTL_REG_ERDPTH	drivers/net/enc28j60.h	/^#define CTL_REG_ERDPTH	/;"	d
CTL_REG_ERDPTL	drivers/net/enc28j60.h	/^#define CTL_REG_ERDPTL	/;"	d
CTL_REG_EREVID	drivers/net/enc28j60.h	/^#define CTL_REG_EREVID	/;"	d
CTL_REG_ERXFCON	drivers/net/enc28j60.h	/^#define CTL_REG_ERXFCON	/;"	d
CTL_REG_ERXNDH	drivers/net/enc28j60.h	/^#define CTL_REG_ERXNDH	/;"	d
CTL_REG_ERXNDL	drivers/net/enc28j60.h	/^#define CTL_REG_ERXNDL	/;"	d
CTL_REG_ERXRDPTH	drivers/net/enc28j60.h	/^#define CTL_REG_ERXRDPTH	/;"	d
CTL_REG_ERXRDPTL	drivers/net/enc28j60.h	/^#define CTL_REG_ERXRDPTL	/;"	d
CTL_REG_ERXSTH	drivers/net/enc28j60.h	/^#define CTL_REG_ERXSTH	/;"	d
CTL_REG_ERXSTL	drivers/net/enc28j60.h	/^#define CTL_REG_ERXSTL	/;"	d
CTL_REG_ERXWRPTH	drivers/net/enc28j60.h	/^#define CTL_REG_ERXWRPTH	/;"	d
CTL_REG_ERXWRPTL	drivers/net/enc28j60.h	/^#define CTL_REG_ERXWRPTL	/;"	d
CTL_REG_ESTAT	drivers/net/enc28j60.h	/^#define CTL_REG_ESTAT	/;"	d
CTL_REG_ETXNDH	drivers/net/enc28j60.h	/^#define CTL_REG_ETXNDH	/;"	d
CTL_REG_ETXNDL	drivers/net/enc28j60.h	/^#define CTL_REG_ETXNDL	/;"	d
CTL_REG_ETXSTH	drivers/net/enc28j60.h	/^#define CTL_REG_ETXSTH	/;"	d
CTL_REG_ETXSTL	drivers/net/enc28j60.h	/^#define CTL_REG_ETXSTL	/;"	d
CTL_REG_EWOLIE	drivers/net/enc28j60.h	/^#define CTL_REG_EWOLIE	/;"	d
CTL_REG_EWOLIR	drivers/net/enc28j60.h	/^#define CTL_REG_EWOLIR	/;"	d
CTL_REG_EWRPTH	drivers/net/enc28j60.h	/^#define CTL_REG_EWRPTH	/;"	d
CTL_REG_EWRPTL	drivers/net/enc28j60.h	/^#define CTL_REG_EWRPTL	/;"	d
CTL_REG_MAADR0	drivers/net/enc28j60.h	/^#define CTL_REG_MAADR0	/;"	d
CTL_REG_MAADR1	drivers/net/enc28j60.h	/^#define CTL_REG_MAADR1	/;"	d
CTL_REG_MAADR2	drivers/net/enc28j60.h	/^#define CTL_REG_MAADR2	/;"	d
CTL_REG_MAADR3	drivers/net/enc28j60.h	/^#define CTL_REG_MAADR3	/;"	d
CTL_REG_MAADR4	drivers/net/enc28j60.h	/^#define CTL_REG_MAADR4	/;"	d
CTL_REG_MAADR5	drivers/net/enc28j60.h	/^#define CTL_REG_MAADR5	/;"	d
CTL_REG_MABBIPG	drivers/net/enc28j60.h	/^#define CTL_REG_MABBIPG	/;"	d
CTL_REG_MACLCON1	drivers/net/enc28j60.h	/^#define CTL_REG_MACLCON1	/;"	d
CTL_REG_MACLCON2	drivers/net/enc28j60.h	/^#define CTL_REG_MACLCON2	/;"	d
CTL_REG_MACON1	drivers/net/enc28j60.h	/^#define CTL_REG_MACON1	/;"	d
CTL_REG_MACON2	drivers/net/enc28j60.h	/^#define CTL_REG_MACON2	/;"	d
CTL_REG_MACON3	drivers/net/enc28j60.h	/^#define CTL_REG_MACON3	/;"	d
CTL_REG_MACON4	drivers/net/enc28j60.h	/^#define CTL_REG_MACON4	/;"	d
CTL_REG_MAIPGH	drivers/net/enc28j60.h	/^#define CTL_REG_MAIPGH	/;"	d
CTL_REG_MAIPGL	drivers/net/enc28j60.h	/^#define CTL_REG_MAIPGL	/;"	d
CTL_REG_MAMXFLH	drivers/net/enc28j60.h	/^#define CTL_REG_MAMXFLH	/;"	d
CTL_REG_MAMXFLL	drivers/net/enc28j60.h	/^#define CTL_REG_MAMXFLL	/;"	d
CTL_REG_MAPHSUP	drivers/net/enc28j60.h	/^#define CTL_REG_MAPHSUP	/;"	d
CTL_REG_MICMD	drivers/net/enc28j60.h	/^#define CTL_REG_MICMD	/;"	d
CTL_REG_MICON	drivers/net/enc28j60.h	/^#define CTL_REG_MICON	/;"	d
CTL_REG_MIRDH	drivers/net/enc28j60.h	/^#define CTL_REG_MIRDH	/;"	d
CTL_REG_MIRDL	drivers/net/enc28j60.h	/^#define CTL_REG_MIRDL	/;"	d
CTL_REG_MIREGADR	drivers/net/enc28j60.h	/^#define CTL_REG_MIREGADR	/;"	d
CTL_REG_MISTAT	drivers/net/enc28j60.h	/^#define CTL_REG_MISTAT	/;"	d
CTL_REG_MIWRH	drivers/net/enc28j60.h	/^#define CTL_REG_MIWRH	/;"	d
CTL_REG_MIWRL	drivers/net/enc28j60.h	/^#define CTL_REG_MIWRL	/;"	d
CTL_RELOAD	drivers/net/smc91111.h	/^#define	CTL_RELOAD	/;"	d
CTL_STATUS	arch/nios2/include/asm/nios2.h	/^#define CTL_STATUS	/;"	d
CTL_STORE	drivers/net/smc91111.h	/^#define	CTL_STORE	/;"	d
CTL_TE_ENABLE	drivers/net/smc91111.h	/^#define	CTL_TE_ENABLE	/;"	d
CTL_WEN	drivers/net/xilinx_ll_temac.h	/^#define CTL_WEN	/;"	d
CTOCR	arch/sh/include/asm/cpu_sh7722.h	/^#define CTOCR /;"	d
CTOCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	CTOCR	/;"	d
CTOUT	drivers/mmc/mmc_spi.c	/^#define CTOUT /;"	d	file:
CTPL_MMC_SD	arch/arm/include/asm/omap_mmc.h	/^#define CTPL_MMC_SD	/;"	d
CTR	arch/powerpc/include/asm/processor.h	/^#define CTR	/;"	d
CTRE	drivers/usb/host/r8a66597.h	/^#define	CTRE	/;"	d
CTRL	include/i8042.h	/^#define CTRL	/;"	d
CTRL1000_CONFIG_MASTER	drivers/net/phy/micrel.c	/^#define CTRL1000_CONFIG_MASTER	/;"	d	file:
CTRL1000_MANUAL_CONFIG	drivers/net/phy/micrel.c	/^#define CTRL1000_MANUAL_CONFIG	/;"	d	file:
CTRL1000_PREFER_MASTER	drivers/net/phy/micrel.c	/^#define CTRL1000_PREFER_MASTER	/;"	d	file:
CTRLH_OFF	board/keymile/kmp204x/qrio.c	/^#define CTRLH_OFF	/;"	d	file:
CTRLH_WRL_BOOT	board/keymile/kmp204x/qrio.c	/^#define CTRLH_WRL_BOOT	/;"	d	file:
CTRLH_WRL_UNITRUN	board/keymile/kmp204x/qrio.c	/^#define CTRLH_WRL_UNITRUN	/;"	d	file:
CTRLL_OFF	board/keymile/kmp204x/qrio.c	/^#define CTRLL_OFF	/;"	d	file:
CTRLL_WRB_BUFENA	board/keymile/kmp204x/qrio.c	/^#define CTRLL_WRB_BUFENA	/;"	d	file:
CTRLMODER	drivers/net/ethoc.c	/^#define	CTRLMODER	/;"	d	file:
CTRLMODER_PASSALL	drivers/net/ethoc.c	/^#define	CTRLMODER_PASSALL	/;"	d	file:
CTRLMODER_RXFLOW	drivers/net/ethoc.c	/^#define	CTRLMODER_RXFLOW	/;"	d	file:
CTRLMODER_TXFLOW	drivers/net/ethoc.c	/^#define	CTRLMODER_TXFLOW	/;"	d	file:
CTRL_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CTRL_BASE	/;"	d
CTRL_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_BASE	/;"	d
CTRL_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define CTRL_BASE	/;"	d
CTRL_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define CTRL_BASE	/;"	d
CTRL_BSTLEN_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_BSTLEN_OFFSET	/;"	d
CTRL_CRYSTAL_FREQ_SELECTION_MASK	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_CRYSTAL_FREQ_SELECTION_MASK	/;"	d
CTRL_CRYSTAL_FREQ_SELECTION_SHIFT	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT	/;"	d
CTRL_CRYSTAL_FREQ_SRC_EFUSE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_CRYSTAL_FREQ_SRC_EFUSE	/;"	d
CTRL_CRYSTAL_FREQ_SRC_MASK	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_CRYSTAL_FREQ_SRC_MASK	/;"	d
CTRL_CRYSTAL_FREQ_SRC_SHIFT	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_CRYSTAL_FREQ_SRC_SHIFT	/;"	d
CTRL_CRYSTAL_FREQ_SRC_SYSBOOT	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT	/;"	d
CTRL_DATA_PULSING	include/usb/ehci-ci.h	/^#define CTRL_DATA_PULSING	/;"	d
CTRL_DCC	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_DCC	/;"	d
CTRL_DEVICE_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define CTRL_DEVICE_BASE	/;"	d
CTRL_DEVICE_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_DEVICE_BASE	/;"	d
CTRL_DEVICE_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define CTRL_DEVICE_BASE	/;"	d
CTRL_DFDQS	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_DFDQS	/;"	d
CTRL_DLL_OFF	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_DLL_OFF	/;"	d
CTRL_DLL_ON	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_DLL_ON	/;"	d
CTRL_DLL_ON	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_DLL_ON	/;"	d
CTRL_DMA_START	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CTRL_DMA_START	/;"	d	file:
CTRL_ECC_CLEAR	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CTRL_ECC_CLEAR	/;"	d	file:
CTRL_EP	drivers/usb/host/xhci.h	/^#define CTRL_EP	/;"	d
CTRL_FINE_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_FINE_LOCKED	/;"	d
CTRL_FLUSH_TRANSMIT_BUFFER	board/gdsys/common/cmd_ioloop.c	/^	CTRL_FLUSH_TRANSMIT_BUFFER = 1<<15,$/;"	e	enum:__anon6137e5c30203	file:
CTRL_FORCE	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_FORCE	/;"	d
CTRL_FORCE_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_FORCE_MASK	/;"	d
CTRL_GATEDURADJ_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_GATEDURADJ_MASK	/;"	d
CTRL_HALF	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_HALF	/;"	d
CTRL_HOST_IE	board/esd/pmc440/pmc440.h	/^#define CTRL_HOST_IE /;"	d
CTRL_ID_PULL_EN	include/usb/ehci-ci.h	/^#define CTRL_ID_PULL_EN	/;"	d
CTRL_INC	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_INC	/;"	d
CTRL_INTLV_PREFERED	include/configs/T208xQDS.h	/^#define CTRL_INTLV_PREFERED	/;"	d
CTRL_INTLV_PREFERED	include/configs/T208xRDB.h	/^#define CTRL_INTLV_PREFERED	/;"	d
CTRL_INTLV_PREFERED	include/configs/T4240QDS.h	/^#define CTRL_INTLV_PREFERED /;"	d
CTRL_INTLV_PREFERED	include/configs/T4240RDB.h	/^#define CTRL_INTLV_PREFERED /;"	d
CTRL_ISOLATE_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CTRL_ISOLATE_MASK	/;"	d
CTRL_ISOLATE_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define CTRL_ISOLATE_SHIFT	/;"	d
CTRL_LOCK_COARSE	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_LOCK_COARSE(/;"	d
CTRL_LOCK_COARSE_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_LOCK_COARSE_MASK	/;"	d
CTRL_LOCK_COARSE_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_LOCK_COARSE_OFFSET	/;"	d
CTRL_MAC_REG	drivers/net/cpsw-common.c	/^#define CTRL_MAC_REG(/;"	d	file:
CTRL_MODE_C_DISPLAY	arch/arm/include/asm/arch-tegra/dc.h	/^	CTRL_MODE_C_DISPLAY,$/;"	e	enum:__anonf53c9cce0203
CTRL_MODE_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define CTRL_MODE_MASK	/;"	d
CTRL_MODE_NC_DISPLAY	arch/arm/include/asm/arch-tegra/dc.h	/^	CTRL_MODE_NC_DISPLAY,$/;"	e	enum:__anonf53c9cce0203
CTRL_MODE_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define CTRL_MODE_SHIFT	/;"	d
CTRL_MODE_STOP	arch/arm/include/asm/arch-tegra/dc.h	/^	CTRL_MODE_STOP,$/;"	e	enum:__anonf53c9cce0203
CTRL_OFF	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_OFF	/;"	d
CTRL_OFFSETD_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETD_RESET_VAL	/;"	d
CTRL_OFFSETD_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETD_VAL	/;"	d
CTRL_OFFSETR0	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETR0	/;"	d
CTRL_OFFSETR1	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETR1	/;"	d
CTRL_OFFSETR2	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETR2	/;"	d
CTRL_OFFSETR3	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETR3	/;"	d
CTRL_OFFSETW0	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETW0	/;"	d
CTRL_OFFSETW1	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETW1	/;"	d
CTRL_OFFSETW2	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETW2	/;"	d
CTRL_OFFSETW3	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_OFFSETW3	/;"	d
CTRL_OPTIONS	drivers/ddr/fsl/interactive.c	/^#define CTRL_OPTIONS(/;"	d	file:
CTRL_OPTIONS_CS	drivers/ddr/fsl/interactive.c	/^#define CTRL_OPTIONS_CS(/;"	d	file:
CTRL_OPTIONS_HEX	drivers/ddr/fsl/interactive.c	/^#define CTRL_OPTIONS_HEX(/;"	d	file:
CTRL_OTG_TERMINATION	include/usb/ehci-ci.h	/^#define CTRL_OTG_TERMINATION	/;"	d
CTRL_OUT_EP_SETUP_PHASE_DONE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define CTRL_OUT_EP_SETUP_PHASE_DONE	/;"	d
CTRL_P1_SP1	include/twl6030.h	/^#define CTRL_P1_SP1	/;"	d
CTRL_P2	include/twl6030.h	/^#define CTRL_P2	/;"	d
CTRL_P2_BUSY	include/twl6030.h	/^#define CTRL_P2_BUSY	/;"	d
CTRL_P2_EOCP2	include/twl6030.h	/^#define CTRL_P2_EOCP2	/;"	d
CTRL_P2_SP2	include/twl6030.h	/^#define CTRL_P2_SP2	/;"	d
CTRL_PROC_RECEIVE_ENABLE	board/gdsys/common/cmd_ioloop.c	/^	CTRL_PROC_RECEIVE_ENABLE = 1<<12,$/;"	e	enum:__anon6137e5c30203	file:
CTRL_PULLD_DQS	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_PULLD_DQS	/;"	d
CTRL_PULLD_DQS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_PULLD_DQS_OFFSET	/;"	d
CTRL_RDLAT_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_RDLAT_OFFSET	/;"	d
CTRL_RDLVL_DATA_ENABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_RDLVL_DATA_ENABLE	/;"	d
CTRL_RDLVL_GATE_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_RDLVL_GATE_DISABLE	/;"	d
CTRL_RDLVL_GATE_ENABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_RDLVL_GATE_ENABLE	/;"	d
CTRL_RE	drivers/serial/serial_lpuart.c	/^#define CTRL_RE	/;"	d	file:
CTRL_REF	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_REF	/;"	d
CTRL_RXE	drivers/usb/gadget/ci_udc.h	/^#define CTRL_RXE	/;"	d
CTRL_RXR	drivers/usb/gadget/ci_udc.h	/^#define CTRL_RXR	/;"	d
CTRL_RXT_BULK	drivers/usb/gadget/ci_udc.h	/^#define CTRL_RXT_BULK	/;"	d
CTRL_SHGATE	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_SHGATE	/;"	d
CTRL_SHGATE	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_SHGATE	/;"	d
CTRL_SHIFTC	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_SHIFTC	/;"	d
CTRL_SM0_RAMP	drivers/power/tps6586x.c	/^	CTRL_SM0_RAMP		= 0x04,$/;"	e	enum:__anone1ef2c880103	file:
CTRL_SM0_SUPPLY2	drivers/power/tps6586x.c	/^	CTRL_SM0_SUPPLY2	= 0x08,$/;"	e	enum:__anone1ef2c880103	file:
CTRL_SM1_RAMP	drivers/power/tps6586x.c	/^	CTRL_SM1_RAMP		= 0x01,$/;"	e	enum:__anone1ef2c880103	file:
CTRL_SM1_SUPPLY2	drivers/power/tps6586x.c	/^	CTRL_SM1_SUPPLY2	= 0x02,$/;"	e	enum:__anone1ef2c880103	file:
CTRL_START	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_START	/;"	d
CTRL_START	arch/arm/mach-exynos/exynos5_setup.h	/^#define CTRL_START	/;"	d
CTRL_START_POINT	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_START_POINT	/;"	d
CTRL_SW_RESET	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define CTRL_SW_RESET	/;"	d	file:
CTRL_SYSBOOT_15_14_MASK	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_SYSBOOT_15_14_MASK	/;"	d
CTRL_SYSBOOT_15_14_SHIFT	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define CTRL_SYSBOOT_15_14_SHIFT	/;"	d
CTRL_TE	drivers/serial/serial_lpuart.c	/^#define CTRL_TE	/;"	d	file:
CTRL_TXE	drivers/usb/gadget/ci_udc.h	/^#define CTRL_TXE	/;"	d
CTRL_TXR	drivers/usb/gadget/ci_udc.h	/^#define CTRL_TXR	/;"	d
CTRL_TXT_BULK	drivers/usb/gadget/ci_udc.h	/^#define CTRL_TXT_BULK	/;"	d
CTRL_VBUS_CHARGE	include/usb/ehci-ci.h	/^#define CTRL_VBUS_CHARGE	/;"	d
CTRL_VBUS_DISCHARGE	include/usb/ehci-ci.h	/^#define CTRL_VBUS_DISCHARGE	/;"	d
CTRL_ZQ_DIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_DIV	/;"	d
CTRL_ZQ_FORCE_IMPN	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_FORCE_IMPN	/;"	d
CTRL_ZQ_FORCE_IMPP	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_FORCE_IMPP	/;"	d
CTRL_ZQ_MODE_DDS	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_MODE_DDS	/;"	d
CTRL_ZQ_MODE_NOTERM	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_MODE_NOTERM	/;"	d
CTRL_ZQ_MODE_TERM	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_MODE_TERM	/;"	d
CTRL_ZQ_START	arch/arm/mach-exynos/exynos4_setup.h	/^#define CTRL_ZQ_START	/;"	d
CTRT	drivers/usb/host/r8a66597.h	/^#define	CTRT	/;"	d
CTS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define CTS	/;"	d
CTS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,$/;"	e	enum:__anona307879b0103	file:
CTS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,$/;"	e	enum:__anona3077f190103	file:
CTS0x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS0x_GMARK,$/;"	e	enum:__anona307945e0103	file:
CTS0x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS0x_IMARK,$/;"	e	enum:__anona307945e0103	file:
CTS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,$/;"	e	enum:__anona307879b0103	file:
CTS1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
CTS1x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS1x_GMARK,$/;"	e	enum:__anona307945e0103	file:
CTS1x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS1x_IMARK,$/;"	e	enum:__anona307945e0103	file:
CTS3x_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS3x_MARK,$/;"	e	enum:__anona307945e0103	file:
CTS4x_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS4x_A_MARK,$/;"	e	enum:__anona307945e0103	file:
CTS4x_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS4x_B_MARK,$/;"	e	enum:__anona307945e0103	file:
CTS4x_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	CTS4x_C_MARK,$/;"	e	enum:__anona307945e0103	file:
CTSQ	drivers/usb/host/r8a66597.h	/^#define	CTSQ	/;"	d
CTX_SIZE	drivers/usb/host/xhci.h	/^#define CTX_SIZE(/;"	d
CTX_SIZE	examples/standalone/sched.c	/^#define CTX_SIZE /;"	d	file:
CTX_TO_EP_INTERVAL	drivers/usb/host/xhci.h	/^#define CTX_TO_EP_INTERVAL(/;"	d
CTX_TO_EP_MULT	drivers/usb/host/xhci.h	/^#define CTX_TO_EP_MULT(/;"	d
CTX_TO_EP_TYPE	drivers/usb/host/xhci.h	/^#define CTX_TO_EP_TYPE(/;"	d
CTX_TO_MAX_BURST	drivers/usb/host/xhci.h	/^#define CTX_TO_MAX_BURST(/;"	d
CTX_TO_MAX_ESIT_PAYLOAD	drivers/usb/host/xhci.h	/^#define CTX_TO_MAX_ESIT_PAYLOAD(/;"	d
CTYPE	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define CTYPE	/;"	d
CTYPE_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define CTYPE_P	/;"	d
CT_AR_O	drivers/video/ct69000.c	/^#define CT_AR_O	/;"	d	file:
CT_CFG_TABLE	drivers/video/ct69000.c	/^} CT_CFG_TABLE;$/;"	t	typeref:struct:__anon22c2f1e00108	file:
CT_CR_O	drivers/video/ct69000.c	/^#define CT_CR_O	/;"	d	file:
CT_FP_O	drivers/video/ct69000.c	/^#define CT_FP_O	/;"	d	file:
CT_GR_O	drivers/video/ct69000.c	/^#define CT_GR_O	/;"	d	file:
CT_LUT_MASK_O	drivers/video/ct69000.c	/^#define CT_LUT_MASK_O	/;"	d	file:
CT_LUT_RGB_O	drivers/video/ct69000.c	/^#define CT_LUT_RGB_O	/;"	d	file:
CT_LUT_START_O	drivers/video/ct69000.c	/^#define CT_LUT_START_O	/;"	d	file:
CT_MR_O	drivers/video/ct69000.c	/^#define CT_MR_O	/;"	d	file:
CT_MSR_W_O	drivers/video/ct69000.c	/^#define CT_MSR_W_O	/;"	d	file:
CT_REG_T1	drivers/block/ftide020.h	/^#define CT_REG_T1(/;"	d
CT_REG_T2	drivers/block/ftide020.h	/^#define CT_REG_T2(/;"	d
CT_REG_T4	drivers/block/ftide020.h	/^#define CT_REG_T4(/;"	d
CT_REG_TEOC	drivers/block/ftide020.h	/^#define CT_REG_TEOC(/;"	d
CT_SR_O	drivers/video/ct69000.c	/^#define CT_SR_O	/;"	d	file:
CT_STATUS_REG0_O	drivers/video/ct69000.c	/^#define CT_STATUS_REG0_O	/;"	d	file:
CT_STATUS_REG1_O	drivers/video/ct69000.c	/^#define CT_STATUS_REG1_O	/;"	d	file:
CT_XR_O	drivers/video/ct69000.c	/^#define CT_XR_O	/;"	d	file:
CUROSC_MASK	drivers/clk/clk_pic32.c	/^#define CUROSC_MASK	/;"	d	file:
CURPIPE	drivers/usb/host/r8a66597.h	/^#define	CURPIPE	/;"	d
CURRBD	include/MCD_progCheck.h	/^#define CURRBD	/;"	d
CURRENT_PAGE_REGISTER	board/freescale/common/vsc3316_3308.c	/^#define CURRENT_PAGE_REGISTER	/;"	d	file:
CURRENT_TIME_SEC	fs/ubifs/ubifs.h	/^#define CURRENT_TIME_SEC	/;"	d
CURSOR_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define CURSOR_ACT_REQ	/;"	d
CURSOR_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define	CURSOR_ENABLE	/;"	d
CURSOR_OFF	drivers/video/cfb_console.c	/^#define CURSOR_OFF /;"	d	file:
CURSOR_OFF	drivers/video/cfb_console.c	/^#define CURSOR_OFF$/;"	d	file:
CURSOR_ON	drivers/video/cfb_console.c	/^#define CURSOR_ON /;"	d	file:
CURSOR_ON	drivers/video/cfb_console.c	/^#define CURSOR_ON$/;"	d	file:
CURSOR_SET	drivers/video/cfb_console.c	/^#define CURSOR_SET /;"	d	file:
CURSOR_SET	drivers/video/cfb_console.c	/^#define CURSOR_SET$/;"	d	file:
CURSOR_SIZE	drivers/video/ati_radeon_fb.c	/^#define CURSOR_SIZE	/;"	d	file:
CURSOR_SIZE	drivers/video/ct69000.c	/^#define CURSOR_SIZE	/;"	d	file:
CURSOR_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define CURSOR_UPDATE	/;"	d
CURS_MACROS	scripts/kconfig/lxdialog/dialog.h	/^#define CURS_MACROS$/;"	d
CUR_CLR0	include/radeon.h	/^#define CUR_CLR0	/;"	d
CUR_CLR1	include/radeon.h	/^#define CUR_CLR1	/;"	d
CUR_ENVSIZE	tools/env/fw_env.c	/^#define CUR_ENVSIZE /;"	d	file:
CUR_HORZ_VERT_OFF	include/radeon.h	/^#define CUR_HORZ_VERT_OFF	/;"	d
CUR_HORZ_VERT_POSN	include/radeon.h	/^#define CUR_HORZ_VERT_POSN	/;"	d
CUR_LOCK	include/radeon.h	/^#define CUR_LOCK	/;"	d
CUR_OFFSET	include/radeon.h	/^#define CUR_OFFSET	/;"	d
CUSTOMER_BOARD_ID0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CUSTOMER_BOARD_ID0	/;"	d
CUSTOMER_BOARD_ID1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CUSTOMER_BOARD_ID1	/;"	d
CUSTOM_CONF_PARAMS	drivers/mtd/nand/denali.h	/^#define CUSTOM_CONF_PARAMS /;"	d
CUSTOM_ENV_SETTINGS	include/configs/TQM5200.h	/^#define CUSTOM_ENV_SETTINGS	/;"	d
CUSTOM_ENV_SETTINGS	include/configs/charon.h	/^#define CUSTOM_ENV_SETTINGS	/;"	d
CUTOMER_BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define CUTOMER_BOARD_ID_BASE	/;"	d
CU_ADDR_LOAD	drivers/net/eepro100.c	/^#define CU_ADDR_LOAD	/;"	d	file:
CU_CMD_MASK	drivers/net/eepro100.c	/^#define CU_CMD_MASK	/;"	d	file:
CU_DUMPSTATS	drivers/net/eepro100.c	/^#define CU_DUMPSTATS	/;"	d	file:
CU_NOP	drivers/net/eepro100.c	/^#define CU_NOP	/;"	d	file:
CU_RESUME	drivers/net/eepro100.c	/^#define CU_RESUME	/;"	d	file:
CU_SHOWSTATS	drivers/net/eepro100.c	/^#define CU_SHOWSTATS	/;"	d	file:
CU_START	drivers/net/eepro100.c	/^#define CU_START	/;"	d	file:
CU_STATSADDR	drivers/net/eepro100.c	/^#define CU_STATSADDR	/;"	d	file:
CU_STATUS_MASK	drivers/net/eepro100.c	/^#define CU_STATUS_MASK	/;"	d	file:
CVR	arch/sh/include/asm/cpu_sh7722.h	/^#define CVR /;"	d
CWCR_CWE	arch/m68k/include/asm/m5329.h	/^#define CWCR_CWE	/;"	d
CWCR_CWR_WH	arch/m68k/include/asm/m5329.h	/^#define CWCR_CWR_WH	/;"	d
CWCR_CWT	arch/m68k/include/asm/m5329.h	/^#define CWCR_CWT(/;"	d
CWCR_RO	arch/m68k/include/asm/m5329.h	/^#define CWCR_RO	/;"	d
CWD_LEN	fs/fat/file.c	/^#define CWD_LEN	/;"	d	file:
CWL	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 CWL;$/;"	m	struct:dram_sun9i_cl_cwl_timing	typeref:typename:u32	file:
CWORD_CLEAR	drivers/misc/pdsp188x.c	/^#define CWORD_CLEAR	/;"	d	file:
CWRI_INT	arch/m68k/include/asm/m5329.h	/^#define CWRI_INT	/;"	d
CWRI_INT_RESET	arch/m68k/include/asm/m5329.h	/^#define CWRI_INT_RESET	/;"	d
CWRI_RESET	arch/m68k/include/asm/m5329.h	/^#define CWRI_RESET	/;"	d
CWRI_WINDOW	arch/m68k/include/asm/m5329.h	/^#define CWRI_WINDOW	/;"	d
CX86_ARR_BASE	arch/x86/include/asm/processor-flags.h	/^#define CX86_ARR_BASE	/;"	d
CX86_CCR0	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR0	/;"	d
CX86_CCR1	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR1	/;"	d
CX86_CCR2	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR2	/;"	d
CX86_CCR3	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR3	/;"	d
CX86_CCR4	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR4	/;"	d
CX86_CCR5	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR5	/;"	d
CX86_CCR6	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR6	/;"	d
CX86_CCR7	arch/x86/include/asm/processor-flags.h	/^#define CX86_CCR7	/;"	d
CX86_DIR0	arch/x86/include/asm/processor-flags.h	/^#define CX86_DIR0	/;"	d
CX86_DIR1	arch/x86/include/asm/processor-flags.h	/^#define CX86_DIR1	/;"	d
CX86_GCR	arch/x86/include/asm/processor-flags.h	/^#define CX86_GCR	/;"	d
CX86_PCR0	arch/x86/include/asm/processor-flags.h	/^#define CX86_PCR0	/;"	d
CX86_PCR1	arch/x86/include/asm/processor-flags.h	/^#define CX86_PCR1	/;"	d
CX86_RCR_BASE	arch/x86/include/asm/processor-flags.h	/^#define CX86_RCR_BASE	/;"	d
CXFIFO_BYTES	include/usb/fotg210.h	/^#define CXFIFO_BYTES(/;"	d
CXFIFO_CXFIFOCLR	include/usb/fotg210.h	/^#define CXFIFO_CXFIFOCLR /;"	d
CXFIFO_CXFIFOE	include/usb/fotg210.h	/^#define CXFIFO_CXFIFOE /;"	d
CXFIFO_CXFIFOF	include/usb/fotg210.h	/^#define CXFIFO_CXFIFOF /;"	d
CXFIFO_CXFIN	include/usb/fotg210.h	/^#define CXFIFO_CXFIN /;"	d
CXFIFO_CXSTALL	include/usb/fotg210.h	/^#define CXFIFO_CXSTALL /;"	d
CXFIFO_FIFOE	include/usb/fotg210.h	/^#define CXFIFO_FIFOE(/;"	d
CXFIFO_FIFOE_FIFO0	include/usb/fotg210.h	/^#define CXFIFO_FIFOE_FIFO0 /;"	d
CXFIFO_FIFOE_FIFO1	include/usb/fotg210.h	/^#define CXFIFO_FIFOE_FIFO1 /;"	d
CXFIFO_FIFOE_FIFO2	include/usb/fotg210.h	/^#define CXFIFO_FIFOE_FIFO2 /;"	d
CXFIFO_FIFOE_FIFO3	include/usb/fotg210.h	/^#define CXFIFO_FIFOE_FIFO3 /;"	d
CXFIFO_FIFOE_MASK	include/usb/fotg210.h	/^#define CXFIFO_FIFOE_MASK /;"	d
CXFIFO_TSTPKTFIN	include/usb/fotg210.h	/^#define CXFIFO_TSTPKTFIN /;"	d
CXR24	board/renesas/alt/alt.c	/^#define CXR24 /;"	d	file:
CXR24	board/renesas/gose/gose.c	/^#define CXR24 /;"	d	file:
CXR24	board/renesas/koelsch/koelsch.c	/^#define CXR24 /;"	d	file:
CXR24	board/renesas/lager/lager.c	/^#define CXR24 /;"	d	file:
CXR24	board/renesas/porter/porter.c	/^#define CXR24 /;"	d	file:
CXR24	board/renesas/silk/silk.c	/^#define CXR24 /;"	d	file:
CXR24	board/renesas/stout/stout.c	/^#define CXR24 /;"	d	file:
CXR25	board/renesas/alt/alt.c	/^#define CXR25 /;"	d	file:
CXR25	board/renesas/gose/gose.c	/^#define CXR25 /;"	d	file:
CXR25	board/renesas/koelsch/koelsch.c	/^#define CXR25 /;"	d	file:
CXR25	board/renesas/lager/lager.c	/^#define CXR25 /;"	d	file:
CXR25	board/renesas/porter/porter.c	/^#define CXR25 /;"	d	file:
CXR25	board/renesas/silk/silk.c	/^#define CXR25 /;"	d	file:
CXR25	board/renesas/stout/stout.c	/^#define CXR25 /;"	d	file:
CX_FINISH	drivers/usb/gadget/fotg210.c	/^#define CX_FINISH	/;"	d	file:
CX_IDLE	drivers/usb/gadget/fotg210.c	/^#define CX_IDLE	/;"	d	file:
CX_STALL	drivers/usb/gadget/fotg210.c	/^#define CX_STALL	/;"	d	file:
CYAN	board/bf533-stamp/video.h	/^#define CYAN /;"	d
CYAN	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
CYC2_dump	drivers/fpga/cyclon2.c	/^int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
CYC2_info	drivers/fpga/cyclon2.c	/^int CYC2_info( Altera_desc *desc )$/;"	f	typeref:typename:int
CYC2_load	drivers/fpga/cyclon2.c	/^int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
CYC2_ps_dump	drivers/fpga/cyclon2.c	/^static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
CYC2_ps_load	drivers/fpga/cyclon2.c	/^static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
CYCLB	include/mc13892.h	/^#define CYCLB	/;"	d
CYCLE2CYCLEDELAY	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CYCLE2CYCLEDELAY(/;"	d
CYCLE2CYCLEDIFFCSEN	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CYCLE2CYCLEDIFFCSEN /;"	d
CYCLE2CYCLESAMECSEN	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define CYCLE2CYCLESAMECSEN /;"	d
CYCLES_MASK_V	board/spear/common/spr_lowlevel_init.S	/^CYCLES_MASK_V:$/;"	l
CYGACC_CALL_IF_DELAY_US	drivers/net/ne2000_base.h	/^#define CYGACC_CALL_IF_DELAY_US(/;"	d
CYGACC_CALL_IF_DELAY_US	include/xyzModem.h	/^#define CYGACC_CALL_IF_DELAY_US(/;"	d
CYGACC_CALL_IF_SET_CONSOLE_COMM	include/xyzModem.h	/^#define CYGACC_CALL_IF_SET_CONSOLE_COMM(/;"	d
CYGACC_COMM_IF_GETC_TIMEOUT	common/xyzModem.c	/^CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c)$/;"	f	typeref:typename:int	file:
CYGACC_COMM_IF_PUTC	common/xyzModem.c	/^CYGACC_COMM_IF_PUTC (char x, char y)$/;"	f	typeref:typename:void	file:
CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA	drivers/net/ne2000_base.h	/^#define CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA /;"	d
CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT	include/xyzModem.h	/^#define CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT$/;"	d
C_0	arch/arm/lib/uldivmod.S	/^C_0	.req	r4$/;"	l
C_1	arch/arm/lib/uldivmod.S	/^C_1	.req	r5$/;"	l
C_BASE_SEG	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  C_BASE_SEG	/;"	d
C_HUB_LOCAL_POWER	include/usb_defs.h	/^#define C_HUB_LOCAL_POWER /;"	d
C_HUB_OVER_CURRENT	include/usb_defs.h	/^#define C_HUB_OVER_CURRENT /;"	d
C_IRQ0	arch/mips/include/asm/mipsregs.h	/^#define C_IRQ0	/;"	d
C_IRQ1	arch/mips/include/asm/mipsregs.h	/^#define C_IRQ1	/;"	d
C_IRQ2	arch/mips/include/asm/mipsregs.h	/^#define C_IRQ2	/;"	d
C_IRQ3	arch/mips/include/asm/mipsregs.h	/^#define C_IRQ3	/;"	d
C_IRQ4	arch/mips/include/asm/mipsregs.h	/^#define C_IRQ4	/;"	d
C_IRQ5	arch/mips/include/asm/mipsregs.h	/^#define C_IRQ5	/;"	d
C_SAMPLE	board/bosch/shc/Kconfig	/^config C_SAMPLE$/;"	c	choice:choice6f6e98480204
C_STATE_LATENCY_CONTROL_0_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define C_STATE_LATENCY_CONTROL_0_LIMIT /;"	d
C_STATE_LATENCY_CONTROL_1_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define C_STATE_LATENCY_CONTROL_1_LIMIT /;"	d
C_STATE_LATENCY_CONTROL_2_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define C_STATE_LATENCY_CONTROL_2_LIMIT /;"	d
C_STATE_LATENCY_CONTROL_3_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define C_STATE_LATENCY_CONTROL_3_LIMIT /;"	d
C_STATE_LATENCY_CONTROL_4_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define C_STATE_LATENCY_CONTROL_4_LIMIT /;"	d
C_STATE_LATENCY_CONTROL_5_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define C_STATE_LATENCY_CONTROL_5_LIMIT /;"	d
C_SW0	arch/mips/include/asm/mipsregs.h	/^#define C_SW0	/;"	d
C_SW1	arch/mips/include/asm/mipsregs.h	/^#define C_SW1	/;"	d
CableLenChange	drivers/net/rtl8139.c	/^	PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,$/;"	e	enum:IntrStatusBits	file:
Cache_Control	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Cache_Control;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Capital_Letter	lib/dhry/dhry.h	/^typedef char    Capital_Letter;$/;"	t	typeref:typename:char
Cb	tools/easylogo/easylogo.c	/^	unsigned char Cb, y1, Cr, y2;$/;"	m	struct:__anonbf0fd82b0408	typeref:typename:unsigned char	file:
Cc	scripts/checkpatch.pl	/^	Cc:$/;"	l
Cfg9346	drivers/net/rtl8139.c	/^	Cfg9346=0x50, Config0=0x51, Config1=0x52,$/;"	e	enum:RTL8139_registers	file:
Cfg9346	drivers/net/rtl8169.c	/^	Cfg9346 = 0x50,$/;"	e	enum:RTL8169_registers	file:
Cfg9346_Lock	drivers/net/rtl8169.c	/^	Cfg9346_Lock = 0x00,$/;"	e	enum:RTL8169_register_content	file:
Cfg9346_Unlock	drivers/net/rtl8169.c	/^	Cfg9346_Unlock = 0xC0,$/;"	e	enum:RTL8169_register_content	file:
Ch	fs/zfs/zfs_sha256.c	/^#define	Ch(/;"	d	file:
Ch_1_Comp	lib/dhry/dhry.h	/^                  char        Ch_1_Comp;$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0508	typeref:typename:char
Ch_1_Glob	lib/dhry/dhry_1.c	/^char            Ch_1_Glob,$/;"	v	typeref:typename:char
Ch_2_Comp	lib/dhry/dhry.h	/^                  char        Ch_2_Comp;$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0508	typeref:typename:char
Ch_2_Glob	lib/dhry/dhry_1.c	/^                Ch_2_Glob;$/;"	v	typeref:typename:char
Change	doc/README.x86	/^Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'$/;"	l
Char	lib/bzip2/bzlib_private.h	/^typedef char            Char;$/;"	t	typeref:typename:char
Characteristics	include/pe.h	/^	uint16_t Characteristics;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint16_t
Characteristics	include/pe.h	/^	uint32_t Characteristics;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint32_t
CheckCache	tools/dtoc/fdt_normal.py	/^    def CheckCache(self):$/;"	m	class:FdtNormal
CheckDirs	tools/buildman/test.py	/^    def CheckDirs(self, build, dirname):$/;"	m	class:TestBuild
CheckDuplicateSignoff	tools/patman/commit.py	/^    def CheckDuplicateSignoff(self, signoff):$/;"	m	class:Commit
CheckErr	tools/dtoc/fdt.py	/^def CheckErr(errnum, msg):$/;"	f
CheckErr	tools/dtoc/fdt_normal.py	/^def CheckErr(errnum, msg):$/;"	f
CheckPatch	tools/patman/checkpatch.py	/^def CheckPatch(fname, verbose=False):$/;"	f
CheckPatches	tools/patman/checkpatch.py	/^def CheckPatches(verbose, args):$/;"	f
CheckSum	include/pe.h	/^	uint32_t CheckSum;                       \/* 0x40 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
CheckSum	include/pe.h	/^	uint32_t CheckSum;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
CheckTags	tools/patman/commit.py	/^    def CheckTags(self):$/;"	m	class:Commit
Checkout	tools/patman/gitutil.py	/^def Checkout(commit_hash, git_dir=None, work_tree=None, force=False):$/;"	f
Checksums	doc/README.x86	/^Checksums are as follows (but note that newer versions will invalidate this):$/;"	l
ChipCmd	drivers/net/natsemi.c	/^	ChipCmd	= 0x00,$/;"	e	enum:register_offsets	file:
ChipCmd	drivers/net/ns8382x.c	/^	ChipCmd = 0x00,$/;"	e	enum:register_offsets	file:
ChipCmd	drivers/net/rtl8139.c	/^	ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,$/;"	e	enum:RTL8139_registers	file:
ChipCmd	drivers/net/rtl8169.c	/^	ChipCmd = 0x37,$/;"	e	enum:RTL8169_registers	file:
ChipCmdBits	drivers/net/natsemi.c	/^enum ChipCmdBits {$/;"	g	file:
ChipCmdBits	drivers/net/ns8382x.c	/^enum ChipCmdBits {$/;"	g	file:
ChipCmdBits	drivers/net/rtl8139.c	/^enum ChipCmdBits {$/;"	g	file:
ChipConfig	drivers/net/natsemi.c	/^	ChipConfig	= 0x04,$/;"	e	enum:register_offsets	file:
ChipConfig	drivers/net/ns8382x.c	/^	ChipConfig = 0x04,$/;"	e	enum:register_offsets	file:
ChipConfigBits	drivers/net/natsemi.c	/^enum ChipConfigBits {$/;"	g	file:
ChipConfigBits	drivers/net/ns8382x.c	/^enum ChipConfigBits {$/;"	g	file:
ChipID	include/linux/mtd/doc2000.h	/^	unsigned char ChipID; \/* Type of DiskOnChip *\/$/;"	m	struct:DiskOnChip	typeref:typename:unsigned char
ChipReset	drivers/net/natsemi.c	/^	ChipReset	= 0x100,$/;"	e	enum:ChipCmdBits	file:
ChipReset	drivers/net/ns8382x.c	/^	ChipReset = 0x100,$/;"	e	enum:ChipCmdBits	file:
Choice	tools/buildman/kconfiglib.py	/^class Choice(Item):$/;"	c
Chromebook	doc/README.x86	/^Chromebook Link specific instructions for bare mode:$/;"	l
Chromebook	doc/README.x86	/^Chromebook Samus (2015 Pixel) instructions for bare mode:$/;"	l
ClearLine	tools/buildman/builder.py	/^    def ClearLine(self, length):$/;"	m	class:Builder
ClearProgress	tools/patman/tout.py	/^def ClearProgress():$/;"	f
ClkRun	drivers/net/natsemi.c	/^	ClkRun		= 0x3C,$/;"	e	enum:register_offsets	file:
ClkRun	drivers/net/ns8382x.c	/^	ClkRun = 0xCC,$/;"	e	enum:register_offsets	file:
Clock	drivers/clk/Kconfig	/^menu "Clock"$/;"	m
Clock drivers for Exynos SoCs	drivers/clk/exynos/Kconfig	/^menu "Clock drivers for Exynos SoCs"$/;"	m
Clone	tools/patman/gitutil.py	/^def Clone(git_dir, output_dir):$/;"	f
CloseCommit	tools/patman/patchstream.py	/^    def CloseCommit(self):$/;"	m	class:PatchStream
Closed	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		enum { Idle, Running, Closing, Closed } state;$/;"	e	enum:__anon7d79ed4b0408::__anon7d79ed4b0503	file:
Closing	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		enum { Idle, Running, Closing, Closed } state;$/;"	e	enum:__anon7d79ed4b0408::__anon7d79ed4b0503	file:
ClrDCSR0	include/SA-1100.h	/^#define ClrDCSR0	/;"	d
ClrDCSR1	include/SA-1100.h	/^#define ClrDCSR1	/;"	d
ClrDCSR2	include/SA-1100.h	/^#define ClrDCSR2	/;"	d
ClrDCSR3	include/SA-1100.h	/^#define ClrDCSR3	/;"	d
ClrDCSR4	include/SA-1100.h	/^#define ClrDCSR4	/;"	d
ClrDCSR5	include/SA-1100.h	/^#define ClrDCSR5	/;"	d
CmdReset	drivers/net/rtl8139.c	/^	CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };$/;"	e	enum:ChipCmdBits	file:
CmdReset	drivers/net/rtl8169.c	/^	CmdReset = 0x10,$/;"	e	enum:RTL8169_register_content	file:
CmdRxEnb	drivers/net/rtl8139.c	/^	CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };$/;"	e	enum:ChipCmdBits	file:
CmdRxEnb	drivers/net/rtl8169.c	/^	CmdRxEnb = 0x08,$/;"	e	enum:RTL8169_register_content	file:
CmdSet	drivers/mtd/jedec_flash.c	/^	const int CmdSet;$/;"	m	struct:amd_flash_info	typeref:typename:const int	file:
CmdTxEnb	drivers/net/rtl8139.c	/^	CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };$/;"	e	enum:ChipCmdBits	file:
CmdTxEnb	drivers/net/rtl8169.c	/^	CmdTxEnb = 0x04,$/;"	e	enum:RTL8169_register_content	file:
Code	lib/zlib/deflate.h	/^#define Code /;"	d
Color	tools/patman/terminal.py	/^    def Color(self, color, text, bright=True):$/;"	m	class:Color
Color	tools/patman/terminal.py	/^class Color(object):$/;"	c
ColorMapEntrySize	tools/easylogo/easylogo.c	/^	unsigned char ColorMapEntrySize;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned char	file:
ColorMapLenght	tools/easylogo/easylogo.c	/^	unsigned short ColorMapLenght;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned short	file:
ColorMapOrigin	tools/easylogo/easylogo.c	/^	unsigned short ColorMapOrigin;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned short	file:
ColorMapType	tools/easylogo/easylogo.c	/^	unsigned char ColorMapType;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned char	file:
ColourNum	tools/buildman/builder.py	/^    def ColourNum(self, num):$/;"	m	class:Builder
Command line interface	cmd/Kconfig	/^menu "Command line interface"$/;"	m
Command-line options	test/py/README.md	/^## Command-line options$/;"	s	chapter:U-Boot pytest suite
CommandResult	tools/patman/command.py	/^class CommandResult:$/;"	c
Comment	tools/buildman/kconfiglib.py	/^class Comment(Item):$/;"	c
Commit	tools/patman/commit.py	/^class Commit:$/;"	c
CommonBufferDescriptor	arch/powerpc/cpu/mpc8260/ether_scc.c	/^typedef volatile struct CommonBufferDescriptor {$/;"	s	file:
CommonBufferDescriptor	arch/powerpc/cpu/mpc8xx/fec.c	/^typedef volatile struct CommonBufferDescriptor {$/;"	s	file:
CommonBufferDescriptor	arch/powerpc/cpu/mpc8xx/scc.c	/^typedef volatile struct CommonBufferDescriptor {$/;"	s	file:
CommonBufferDescriptor	post/cpu/mpc8xx/ether.c	/^typedef volatile struct CommonBufferDescriptor {$/;"	s	file:
CommunicateFilter	tools/patman/cros_subprocess.py	/^    def CommunicateFilter(self, output):$/;"	m	class:Popen
Complete invocation example	test/py/README.md	/^### Complete invocation example$/;"	S	section:U-Boot pytest suite""Testing real hardware
Compression Support	lib/Kconfig	/^menu "Compression Support"$/;"	m	menu:Library routines
Config	tools/buildman/builder.py	/^class Config:$/;"	c
Config	tools/buildman/kconfiglib.py	/^class Config(object):$/;"	c
Config0	drivers/net/rtl8139.c	/^	Cfg9346=0x50, Config0=0x51, Config1=0x52,$/;"	e	enum:RTL8139_registers	file:
Config0	drivers/net/rtl8169.c	/^	Config0 = 0x51,$/;"	e	enum:RTL8169_registers	file:
Config1	drivers/net/rtl8139.c	/^	Cfg9346=0x50, Config0=0x51, Config1=0x52,$/;"	e	enum:RTL8139_registers	file:
Config1	drivers/net/rtl8169.c	/^	Config1 = 0x52,$/;"	e	enum:RTL8169_registers	file:
Config2	drivers/net/rtl8169.c	/^	Config2 = 0x53,$/;"	e	enum:RTL8169_registers	file:
Config3	drivers/net/rtl8139.c	/^	Config3=0x59,$/;"	e	enum:RTL8139_registers	file:
Config3	drivers/net/rtl8169.c	/^	Config3 = 0x54,$/;"	e	enum:RTL8169_registers	file:
Config4	drivers/net/rtl8169.c	/^	Config4 = 0x55,$/;"	e	enum:RTL8169_registers	file:
Config5	drivers/net/rtl8169.c	/^	Config5 = 0x56,$/;"	e	enum:RTL8169_registers	file:
ConfigInfoView	scripts/kconfig/qconf.cc	/^ConfigInfoView::ConfigInfoView(QWidget* parent, const char *name)$/;"	f	class:ConfigInfoView
ConfigInfoView	scripts/kconfig/qconf.h	/^class ConfigInfoView : public Q3TextBrowser {$/;"	c
ConfigItem	scripts/kconfig/qconf.h	/^	ConfigItem(ConfigItem *parent, ConfigItem *after, struct menu *m, bool v)$/;"	f	class:ConfigItem
ConfigItem	scripts/kconfig/qconf.h	/^	ConfigItem(Q3ListView *parent, ConfigItem *after, bool v)$/;"	f	class:ConfigItem
ConfigItem	scripts/kconfig/qconf.h	/^	ConfigItem(Q3ListView *parent, ConfigItem *after, struct menu *m, bool v)$/;"	f	class:ConfigItem
ConfigItem	scripts/kconfig/qconf.h	/^class ConfigItem : public Q3ListViewItem {$/;"	c
ConfigLineEdit	scripts/kconfig/qconf.cc	/^ConfigLineEdit::ConfigLineEdit(ConfigView* parent)$/;"	f	class:ConfigLineEdit
ConfigLineEdit	scripts/kconfig/qconf.h	/^class ConfigLineEdit : public QLineEdit {$/;"	c
ConfigList	scripts/kconfig/qconf.cc	/^ConfigList::ConfigList(ConfigView* p, const char *name)$/;"	f	class:ConfigList
ConfigList	scripts/kconfig/qconf.h	/^class ConfigList : public Q3ListView {$/;"	c
ConfigMainWindow	scripts/kconfig/qconf.cc	/^ConfigMainWindow::ConfigMainWindow(void)$/;"	f	class:ConfigMainWindow
ConfigMainWindow	scripts/kconfig/qconf.h	/^class ConfigMainWindow : public Q3MainWindow {$/;"	c
ConfigParser	tools/patman/settings.py	/^    import configparser as ConfigParser$/;"	I	nameref:module:configparser
ConfigSearchWindow	scripts/kconfig/qconf.cc	/^ConfigSearchWindow::ConfigSearchWindow(ConfigMainWindow* parent, const char *name)$/;"	f	class:ConfigSearchWindow
ConfigSearchWindow	scripts/kconfig/qconf.h	/^class ConfigSearchWindow : public QDialog {$/;"	c
ConfigSettings	scripts/kconfig/qconf.cc	/^ConfigSettings::ConfigSettings()$/;"	f	class:ConfigSettings
ConfigSettings	scripts/kconfig/qconf.h	/^class ConfigSettings : public QSettings {$/;"	c
ConfigView	scripts/kconfig/qconf.cc	/^ConfigView::ConfigView(QWidget* parent, const char *name)$/;"	f	class:ConfigView
ConfigView	scripts/kconfig/qconf.h	/^class ConfigView : public Q3VBox {$/;"	c
Console	common/Kconfig	/^menu "Console"$/;"	m
ConsoleBase	test/py/u_boot_console_base.py	/^class ConsoleBase(object):$/;"	c
ConsoleDisableCheck	test/py/u_boot_console_base.py	/^class ConsoleDisableCheck(object):$/;"	c
ConsoleExecAttach	test/py/u_boot_console_exec_attach.py	/^class ConsoleExecAttach(ConsoleBase):$/;"	c
ConsoleSandbox	test/py/u_boot_console_sandbox.py	/^class ConsoleSandbox(ConsoleBase):$/;"	c
ConsoleSetupTimeout	test/py/u_boot_console_base.py	/^class ConsoleSetupTimeout(object):$/;"	c
ContainerID	include/linux/usb/ch9.h	/^	__u8  ContainerID[16]; \/* 128-bit number *\/$/;"	m	struct:usb_ss_container_id_descriptor	typeref:typename:__u8[16]
Control	include/mpc5xxx.h	/^	volatile u32 Control;		\/* SDMA + 0x78 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
Conv_name_to_c	tools/dtoc/dtoc	/^def Conv_name_to_c(name):$/;"	f
Conv_name_to_c	tools/dtoc/dtoc.py	/^def Conv_name_to_c(name):$/;"	f
ConvertELF	tools/img2srec.c	/^static void ConvertELF(char* fileName, uint32_t loadOffset)$/;"	f	typeref:typename:void	file:
CopyFiles	tools/buildman/builderthread.py	/^    def CopyFiles(self, out_dir, build_dir, dirname, patterns):$/;"	m	class:BuilderThread
CountCommits	tools/patman/gitutil.py	/^def CountCommits(commit_range):$/;"	f
CountCommitsInBranch	tools/patman/gitutil.py	/^def CountCommitsInBranch(git_dir, branch, include_upstream=False):$/;"	f
CountCommitsInRange	tools/patman/gitutil.py	/^def CountCommitsInRange(git_dir, range_expr):$/;"	f
CountCommitsToBranch	tools/patman/gitutil.py	/^def CountCommitsToBranch():$/;"	f
Cr	tools/easylogo/easylogo.c	/^	unsigned char Cb, y1, Cr, y2;$/;"	m	struct:__anonbf0fd82b0408	typeref:typename:unsigned char	file:
CreateBuildmanConfigFile	tools/buildman/bsettings.py	/^def CreateBuildmanConfigFile(config_fname):$/;"	f
CreateFile	tools/microcode-tool	/^def CreateFile(date, license_text, mcodes, outfile):$/;"	f
CreateFile	tools/microcode-tool.py	/^def CreateFile(date, license_text, mcodes, outfile):$/;"	f
CreatePatches	tools/patman/gitutil.py	/^def CreatePatches(start, count, series):$/;"	f
CreatePatmanConfigFile	tools/patman/settings.py	/^def CreatePatmanConfigFile(config_fname):$/;"	f
CritcalInputException	arch/powerpc/cpu/mpc85xx/traps.c	/^void CritcalInputException(struct pt_regs *regs)$/;"	f	typeref:typename:void
CurAPMvalues	include/ata.h	/^	unsigned short	CurAPMvalues;	\/* current APM values *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
CurState	drivers/fpga/ivm_core.c	/^	 unsigned char  CurState;  \/* From this state *\/$/;"	m	struct:__anon34a9f1e50108	typeref:typename:unsigned char	file:
D	arch/arm/mach-snapdragon/clock-apq8016.c	/^	uintptr_t D;$/;"	m	struct:bcr_regs	typeref:typename:uintptr_t	file:
D	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register A, B, C, D;$/;"	m	struct:i386_general_regs	typeref:typename:i386_general_register
D	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define D /;"	d
D0FIFO	drivers/usb/host/r8a66597.h	/^#define D0FIFO	/;"	d
D0FIFOCTR	drivers/usb/host/r8a66597.h	/^#define D0FIFOCTR	/;"	d
D0FIFOSEL	drivers/usb/host/r8a66597.h	/^#define D0FIFOSEL	/;"	d
D0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D0_GMARK,$/;"	e	enum:__anona307945e0103	file:
D0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D0_IMARK,$/;"	e	enum:__anona307945e0103	file:
D0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
D0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,$/;"	e	enum:__anona307879b0103	file:
D0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK,$/;"	e	enum:__anona307901d0103	file:
D0_NAF0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D0_NAF0_MARK,	D1_NAF1_MARK,	D2_NAF2_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D0_NAF0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D0_NAF0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D10_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	D10_2,$/;"	e	enum:pattern_set
D10_2	arch/arm/mach-exynos/include/mach/dp_info.h	/^	D10_2,$/;"	e	enum:__anon79d8640c0b03
D10_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D10_GMARK,$/;"	e	enum:__anona307945e0103	file:
D10_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D10_IMARK,$/;"	e	enum:__anona307945e0103	file:
D10_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,$/;"	e	enum:__anona3077f190103	file:
D10_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,$/;"	e	enum:__anona307879b0103	file:
D10_NAF10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D9_NAF9_MARK,	D10_NAF10_MARK,	D11_NAF11_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D10_NAF10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D10_NAF10_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D11_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D11_GMARK,$/;"	e	enum:__anona307945e0103	file:
D11_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D11_IMARK,$/;"	e	enum:__anona307945e0103	file:
D11_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,$/;"	e	enum:__anona3077f190103	file:
D11_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,$/;"	e	enum:__anona307879b0103	file:
D11_NAF11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D9_NAF9_MARK,	D10_NAF10_MARK,	D11_NAF11_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D11_NAF11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D11_NAF11_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D12_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D12_GMARK,$/;"	e	enum:__anona307945e0103	file:
D12_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D12_IMARK,$/;"	e	enum:__anona307945e0103	file:
D12_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona3077f190103	file:
D12_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,$/;"	e	enum:__anona307879b0103	file:
D12_NAF12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D12_NAF12_MARK,	D13_NAF13_MARK,	D14_NAF14_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D12_NAF12_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D12_NAF12_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D13_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D13_GMARK,$/;"	e	enum:__anona307945e0103	file:
D13_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D13_IMARK,$/;"	e	enum:__anona307945e0103	file:
D13_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
D13_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,$/;"	e	enum:__anona307879b0103	file:
D13_NAF13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D12_NAF12_MARK,	D13_NAF13_MARK,	D14_NAF14_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D13_NAF13_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D13_NAF13_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D14_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D14_GMARK,$/;"	e	enum:__anona307945e0103	file:
D14_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D14_IMARK,$/;"	e	enum:__anona307945e0103	file:
D14_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK,$/;"	e	enum:__anona3077f190103	file:
D14_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,$/;"	e	enum:__anona307879b0103	file:
D14_NAF14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D12_NAF12_MARK,	D13_NAF13_MARK,	D14_NAF14_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D14_NAF14_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D14_NAF14_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D15_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D15_GMARK,$/;"	e	enum:__anona307945e0103	file:
D15_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D15_IMARK,$/;"	e	enum:__anona307945e0103	file:
D15_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
D15_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,$/;"	e	enum:__anona307879b0103	file:
D15_NAF15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D15_NAF15_MARK,					\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D15_NAF15_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D15_NAF15_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D16_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D16_MARK,	D17_MARK,	D18_MARK,	D19_MARK,$/;"	e	enum:__anona304c1340103	file:
D16_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD8_MARK, D16_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D17_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D16_MARK,	D17_MARK,	D18_MARK,	D19_MARK,$/;"	e	enum:__anona304c1340103	file:
D17_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD9_MARK, D17_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D18_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D16_MARK,	D17_MARK,	D18_MARK,	D19_MARK,$/;"	e	enum:__anona304c1340103	file:
D18_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD10_MARK, D18_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D19_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D16_MARK,	D17_MARK,	D18_MARK,	D19_MARK,$/;"	e	enum:__anona304c1340103	file:
D19_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD11_MARK, D19_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D1FIFO	drivers/usb/host/r8a66597.h	/^#define D1FIFO	/;"	d
D1FIFOCTR	drivers/usb/host/r8a66597.h	/^#define D1FIFOCTR	/;"	d
D1FIFOSEL	drivers/usb/host/r8a66597.h	/^#define D1FIFOSEL	/;"	d
D1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D1_GMARK,$/;"	e	enum:__anona307945e0103	file:
D1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D1_IMARK,$/;"	e	enum:__anona307945e0103	file:
D1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
D1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,$/;"	e	enum:__anona307879b0103	file:
D1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK,$/;"	e	enum:__anona307901d0103	file:
D1_NAF1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D0_NAF0_MARK,	D1_NAF1_MARK,	D2_NAF2_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D1_NAF1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D1_NAF1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D20IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D20IP	/;"	d
D20IP_XHCIIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D20IP_XHCIIP	/;"	d
D20IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D20IR	/;"	d
D20_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D20_MARK,	D21_MARK,	D22_MARK,	D23_MARK,$/;"	e	enum:__anona304c1340103	file:
D20_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD12_MARK, D20_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D21_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D20_MARK,	D21_MARK,	D22_MARK,	D23_MARK,$/;"	e	enum:__anona304c1340103	file:
D21_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD13_MARK, D21_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D22IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D22IP	/;"	d
D22IP_IDERIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D22IP_IDERIP	/;"	d
D22IP_KTIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D22IP_KTIP	/;"	d
D22IP_MEI1IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D22IP_MEI1IP	/;"	d
D22IP_MEI2IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D22IP_MEI2IP	/;"	d
D22IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D22IR	/;"	d
D22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D20_MARK,	D21_MARK,	D22_MARK,	D23_MARK,$/;"	e	enum:__anona304c1340103	file:
D22_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD14_MARK, D22_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D23_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D20_MARK,	D21_MARK,	D22_MARK,	D23_MARK,$/;"	e	enum:__anona304c1340103	file:
D23_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, D23_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D24_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D24_MARK,	D25_MARK,	D26_MARK,	D27_MARK,$/;"	e	enum:__anona304c1340103	file:
D24_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, D24_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D25IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D25IP	/;"	d
D25IP_LIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D25IP_LIP	/;"	d
D25IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D25IR	/;"	d
D25_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D24_MARK,	D25_MARK,	D26_MARK,	D27_MARK,$/;"	e	enum:__anona304c1340103	file:
D25_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD17_MARK, D25_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D26IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D26IP	/;"	d
D26IP_E2P	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D26IP_E2P	/;"	d
D26IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D26IR	/;"	d
D26_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D24_MARK,	D25_MARK,	D26_MARK,	D27_MARK,$/;"	e	enum:__anona304c1340103	file:
D26_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D27IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D27IP	/;"	d
D27IP_ZIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D27IP_ZIP	/;"	d
D27IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D27IR	/;"	d
D27_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D24_MARK,	D25_MARK,	D26_MARK,	D27_MARK,$/;"	e	enum:__anona304c1340103	file:
D27_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D28IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP	/;"	d
D28IP_P1IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P1IP	/;"	d
D28IP_P2IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P2IP	/;"	d
D28IP_P3IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P3IP	/;"	d
D28IP_P4IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P4IP	/;"	d
D28IP_P5IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P5IP	/;"	d
D28IP_P6IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P6IP	/;"	d
D28IP_P7IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P7IP	/;"	d
D28IP_P8IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IP_P8IP	/;"	d
D28IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D28IR	/;"	d
D28_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D28_MARK,	D29_MARK,	D30_MARK,	D31_MARK,$/;"	e	enum:__anona304c1340103	file:
D28_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D29IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D29IP	/;"	d
D29IP_E1P	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D29IP_E1P	/;"	d
D29IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D29IR	/;"	d
D29_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D28_MARK,	D29_MARK,	D30_MARK,	D31_MARK,$/;"	e	enum:__anona304c1340103	file:
D29_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D2_GMARK,$/;"	e	enum:__anona307945e0103	file:
D2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D2_IMARK,$/;"	e	enum:__anona307945e0103	file:
D2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,$/;"	e	enum:__anona3077f190103	file:
D2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,$/;"	e	enum:__anona307879b0103	file:
D2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
D2_NAF2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D0_NAF0_MARK,	D1_NAF1_MARK,	D2_NAF2_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D2_NAF2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D2_NAF2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D30IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D30IP	/;"	d
D30IP_PIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D30IP_PIP	/;"	d
D30IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D30IR	/;"	d
D30_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D28_MARK,	D29_MARK,	D30_MARK,	D31_MARK,$/;"	e	enum:__anona304c1340103	file:
D30_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D31IP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D31IP	/;"	d
D31IP_SIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D31IP_SIP	/;"	d
D31IP_SIP2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D31IP_SIP2	/;"	d
D31IP_SMIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D31IP_SMIP	/;"	d
D31IP_TTIP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D31IP_TTIP	/;"	d
D31IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define D31IR	/;"	d
D31_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D28_MARK,	D29_MARK,	D30_MARK,	D31_MARK,$/;"	e	enum:__anona304c1340103	file:
D31_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D3_CLK_GATED_EN	drivers/usb/eth/r8152.h	/^#define D3_CLK_GATED_EN	/;"	d
D3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D3_GMARK,$/;"	e	enum:__anona307945e0103	file:
D3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D3_IMARK,$/;"	e	enum:__anona307945e0103	file:
D3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
D3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,$/;"	e	enum:__anona307879b0103	file:
D3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
D3_NAF3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D3_NAF3_MARK,	D4_NAF4_MARK,	D5_NAF5_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D3_NAF3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D3_NAF3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D4_GMARK,$/;"	e	enum:__anona307945e0103	file:
D4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D4_IMARK,$/;"	e	enum:__anona307945e0103	file:
D4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,$/;"	e	enum:__anona3077f190103	file:
D4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,$/;"	e	enum:__anona307879b0103	file:
D4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK,$/;"	e	enum:__anona307901d0103	file:
D4_NAF4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D3_NAF3_MARK,	D4_NAF4_MARK,	D5_NAF5_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D4_NAF4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D4_NAF4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D5_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D5_GMARK,$/;"	e	enum:__anona307945e0103	file:
D5_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D5_IMARK,$/;"	e	enum:__anona307945e0103	file:
D5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,$/;"	e	enum:__anona3077f190103	file:
D5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,$/;"	e	enum:__anona307879b0103	file:
D5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK,$/;"	e	enum:__anona307901d0103	file:
D5_NAF5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D3_NAF3_MARK,	D4_NAF4_MARK,	D5_NAF5_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D5_NAF5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D5_NAF5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D64En	drivers/net/ns8382x.c	/^	D64En = 0x00001000,$/;"	e	enum:ChipConfigBits	file:
D64_CTRL1_EOF	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL1_EOF	/;"	d
D64_CTRL1_EOT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL1_EOT	/;"	d
D64_CTRL1_IOC	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL1_IOC	/;"	d
D64_CTRL1_SOF	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL1_SOF	/;"	d
D64_CTRL2_AE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL2_AE	/;"	d
D64_CTRL2_AE_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL2_AE_SHIFT	/;"	d
D64_CTRL2_BC_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL2_BC_MASK	/;"	d
D64_CTRL2_PARITY	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL2_PARITY	/;"	d
D64_CTRL_COREFLAGS	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL_COREFLAGS	/;"	d
D64_CTRL_CORE_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_CTRL_CORE_MASK	/;"	d
D64_RC_AE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_AE	/;"	d
D64_RC_BL_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_BL_MASK	/;"	d
D64_RC_BL_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_BL_SHIFT	/;"	d
D64_RC_OC	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_OC	/;"	d
D64_RC_PD	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_PD	/;"	d
D64_RC_RE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_RE	/;"	d
D64_RC_RO_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_RO_MASK	/;"	d
D64_RC_RO_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RC_RO_SHIFT	/;"	d
D64_RP_LD_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RP_LD_MASK	/;"	d
D64_RS0_CD_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_CD_MASK	/;"	d
D64_RS0_RS_ACTIVE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_ACTIVE	/;"	d
D64_RS0_RS_DISABLED	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_DISABLED	/;"	d
D64_RS0_RS_IDLE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_IDLE	/;"	d
D64_RS0_RS_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_MASK	/;"	d
D64_RS0_RS_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_SHIFT	/;"	d
D64_RS0_RS_STOPPED	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_STOPPED	/;"	d
D64_RS0_RS_SUSP	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_RS0_RS_SUSP	/;"	d
D64_XC_BL_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XC_BL_MASK	/;"	d
D64_XC_BL_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XC_BL_SHIFT	/;"	d
D64_XC_PD	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XC_PD	/;"	d
D64_XC_SE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XC_SE	/;"	d
D64_XC_XE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XC_XE	/;"	d
D64_XP_LD_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XP_LD_MASK	/;"	d
D64_XS0_XS_ACTIVE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_ACTIVE	/;"	d
D64_XS0_XS_DISABLED	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_DISABLED	/;"	d
D64_XS0_XS_IDLE	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_IDLE	/;"	d
D64_XS0_XS_MASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_MASK	/;"	d
D64_XS0_XS_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_SHIFT	/;"	d
D64_XS0_XS_STOPPED	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_STOPPED	/;"	d
D64_XS0_XS_SUSP	drivers/net/bcm-sf2-eth-gmac.h	/^#define D64_XS0_XS_SUSP	/;"	d
D6_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D6_GMARK,$/;"	e	enum:__anona307945e0103	file:
D6_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D6_IMARK,$/;"	e	enum:__anona307945e0103	file:
D6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,$/;"	e	enum:__anona3077f190103	file:
D6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,$/;"	e	enum:__anona307879b0103	file:
D6_NAF6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D6_NAF6_MARK,	D7_NAF7_MARK,	D8_NAF8_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D6_NAF6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D6_NAF6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D7_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D7_GMARK,$/;"	e	enum:__anona307945e0103	file:
D7_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D7_IMARK,$/;"	e	enum:__anona307945e0103	file:
D7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3077f190103	file:
D7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,$/;"	e	enum:__anona307879b0103	file:
D7_NAF7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D6_NAF6_MARK,	D7_NAF7_MARK,	D8_NAF8_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D7_NAF7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D7_NAF7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D8_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D8_GMARK,$/;"	e	enum:__anona307945e0103	file:
D8_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D8_IMARK,$/;"	e	enum:__anona307945e0103	file:
D8_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
D8_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,$/;"	e	enum:__anona307879b0103	file:
D8_NAF8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D6_NAF6_MARK,	D7_NAF7_MARK,	D8_NAF8_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D8_NAF8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D8_NAF8_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
D9_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D9_GMARK,$/;"	e	enum:__anona307945e0103	file:
D9_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	D9_IMARK,$/;"	e	enum:__anona307945e0103	file:
D9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
D9_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,$/;"	e	enum:__anona307879b0103	file:
D9_NAF9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	D9_NAF9_MARK,	D10_NAF10_MARK,	D11_NAF11_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
D9_NAF9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	D9_NAF9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DA850_NORBOOT_16BIT	arch/arm/mach-davinci/include/mach/da850_lowlevel.h	/^#define DA850_NORBOOT_16BIT	/;"	d
DA850_NORBOOT_COPY_XK	arch/arm/mach-davinci/include/mach/da850_lowlevel.h	/^#define DA850_NORBOOT_COPY_XK(/;"	d
DA850_NORBOOT_METHOD_DIRECT	arch/arm/mach-davinci/include/mach/da850_lowlevel.h	/^#define DA850_NORBOOT_METHOD_DIRECT	/;"	d
DA8XX_FB_H	drivers/video/da8xx-fb.h	/^#define DA8XX_FB_H$/;"	d
DA8XX_LCD_CNTL_BASE	drivers/video/da8xx-fb.c	/^#define DA8XX_LCD_CNTL_BASE	/;"	d	file:
DA8XX_LCD_CNTL_BASE	include/configs/pxm2.h	/^#define DA8XX_LCD_CNTL_BASE	/;"	d
DA8XX_LCD_CNTL_BASE	include/configs/rut.h	/^#define DA8XX_LCD_CNTL_BASE	/;"	d
DA8XX_USB_OTG_BASE	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_OTG_BASE /;"	d
DA8XX_USB_OTG_CORE_BASE	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_OTG_CORE_BASE /;"	d
DA8XX_USB_OTG_TIMEOUT	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_OTG_TIMEOUT /;"	d
DA8XX_USB_RXINT_MASK	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_RXINT_MASK /;"	d
DA8XX_USB_RXINT_SHIFT	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_RXINT_SHIFT	/;"	d
DA8XX_USB_RX_ENDPTS_MASK	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_RX_ENDPTS_MASK /;"	d
DA8XX_USB_TXINT_MASK	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_TXINT_MASK /;"	d
DA8XX_USB_TXINT_SHIFT	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_TXINT_SHIFT	/;"	d
DA8XX_USB_TX_ENDPTS_MASK	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_TX_ENDPTS_MASK /;"	d
DA8XX_USB_USBINT_MASK	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_USBINT_MASK	/;"	d
DA8XX_USB_VBUS_GPIO	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define DA8XX_USB_VBUS_GPIO	/;"	d
DA9052_BUCKCORE_BCORECONF	include/dialog_pmic.h	/^#define DA9052_BUCKCORE_BCORECONF /;"	d
DA9052_BUCKCORE_BCOREEN	include/dialog_pmic.h	/^#define DA9052_BUCKCORE_BCOREEN /;"	d
DA9052_BUCKCORE_VBCORE	include/dialog_pmic.h	/^#define DA9052_BUCKCORE_VBCORE /;"	d
DA9052_SUPPLY_VBCOREGO	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VBCOREGO /;"	d
DA9052_SUPPLY_VBMEMGO	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VBMEMGO /;"	d
DA9052_SUPPLY_VBPROGO	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VBPROGO /;"	d
DA9052_SUPPLY_VLDO2GO	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VLDO2GO /;"	d
DA9052_SUPPLY_VLDO3GO	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VLDO3GO /;"	d
DA9052_SUPPLY_VLOCK	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VLOCK /;"	d
DA9052_SUPPLY_VMEMSWEN	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VMEMSWEN /;"	d
DA9052_SUPPLY_VPERISWEN	include/dialog_pmic.h	/^#define DA9052_SUPPLY_VPERISWEN /;"	d
DA9053_ADCCONT_REG	include/dialog_pmic.h	/^	DA9053_ADCCONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ADCIN4RES_REG	include/dialog_pmic.h	/^	DA9053_ADCIN4RES_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ADCIN5RES_REG	include/dialog_pmic.h	/^	DA9053_ADCIN5RES_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ADCIN6RES_REG	include/dialog_pmic.h	/^	DA9053_ADCIN6RES_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ADCMAN_REG	include/dialog_pmic.h	/^	DA9053_ADCMAN_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ADCRESH_REG	include/dialog_pmic.h	/^	DA9053_ADCRESH_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ADCRESL_REG	include/dialog_pmic.h	/^	DA9053_ADCRESL_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ALARMD_REG	include/dialog_pmic.h	/^	DA9053_ALARMD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ALARMH_REG	include/dialog_pmic.h	/^	DA9053_ALARMH_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ALARMMI_REG	include/dialog_pmic.h	/^	DA9053_ALARMMI_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ALARMMO_REG	include/dialog_pmic.h	/^	DA9053_ALARMMO_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ALARMY_REG	include/dialog_pmic.h	/^	DA9053_ALARMY_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_AUTO4HIGH_REG	include/dialog_pmic.h	/^	DA9053_AUTO4HIGH_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_AUTO4LOW_REG	include/dialog_pmic.h	/^	DA9053_AUTO4LOW_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_AUTO5HIGH_REG	include/dialog_pmic.h	/^	DA9053_AUTO5HIGH_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_AUTO5LOW_REG	include/dialog_pmic.h	/^	DA9053_AUTO5LOW_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_AUTO6HIGH_REG	include/dialog_pmic.h	/^	DA9053_AUTO6HIGH_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_AUTO6LOW_REG	include/dialog_pmic.h	/^	DA9053_AUTO6LOW_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BATCHG_REG	include/dialog_pmic.h	/^	DA9053_BATCHG_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BBATCONT_REG	include/dialog_pmic.h	/^	DA9053_BBATCONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BOOST_REG	include/dialog_pmic.h	/^	DA9053_BOOST_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BUCKA_REG	include/dialog_pmic.h	/^	DA9053_BUCKA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BUCKB_REG	include/dialog_pmic.h	/^	DA9053_BUCKB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BUCKCORE_REG	include/dialog_pmic.h	/^	DA9053_BUCKCORE_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BUCKMEM_REG	include/dialog_pmic.h	/^	DA9053_BUCKMEM_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BUCKPERI_REG	include/dialog_pmic.h	/^	DA9053_BUCKPERI_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_BUCKPRO_REG	include/dialog_pmic.h	/^	DA9053_BUCKPRO_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CHGBUCK_REG	include/dialog_pmic.h	/^	DA9053_CHGBUCK_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CHGCONT_REG	include/dialog_pmic.h	/^	DA9053_CHGCONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CHGTIME_REG	include/dialog_pmic.h	/^	DA9053_CHGTIME_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CHIPID_REG	include/dialog_pmic.h	/^	DA9053_CHIPID_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CONFIGID_REG	include/dialog_pmic.h	/^	DA9053_CONFIGID_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CONTROLA_REG	include/dialog_pmic.h	/^	DA9053_CONTROLA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CONTROLB_REG	include/dialog_pmic.h	/^	DA9053_CONTROLB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CONTROLC_REG	include/dialog_pmic.h	/^	DA9053_CONTROLC_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_CONTROLD_REG	include/dialog_pmic.h	/^	DA9053_CONTROLD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_COUNTD_REG	include/dialog_pmic.h	/^	DA9053_COUNTD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_COUNTH_REG	include/dialog_pmic.h	/^	DA9053_COUNTH_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_COUNTMI_REG	include/dialog_pmic.h	/^	DA9053_COUNTMI_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_COUNTMO_REG	include/dialog_pmic.h	/^	DA9053_COUNTMO_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_COUNTS_REG	include/dialog_pmic.h	/^	DA9053_COUNTS_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_COUNTY_REG	include/dialog_pmic.h	/^	DA9053_COUNTY_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_EVENTA_REG	include/dialog_pmic.h	/^	DA9053_EVENTA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_EVENTB_REG	include/dialog_pmic.h	/^	DA9053_EVENTB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_EVENTC_REG	include/dialog_pmic.h	/^	DA9053_EVENTC_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_EVENTD_REG	include/dialog_pmic.h	/^	DA9053_EVENTD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_FAULTLOG_REG	include/dialog_pmic.h	/^	DA9053_FAULTLOG_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID0_REG	include/dialog_pmic.h	/^	DA9053_GPID0_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID1_REG	include/dialog_pmic.h	/^	DA9053_GPID1_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID2_REG	include/dialog_pmic.h	/^	DA9053_GPID2_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID3_REG	include/dialog_pmic.h	/^	DA9053_GPID3_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID4_REG	include/dialog_pmic.h	/^	DA9053_GPID4_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID5_REG	include/dialog_pmic.h	/^	DA9053_GPID5_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID6_REG	include/dialog_pmic.h	/^	DA9053_GPID6_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID7_REG	include/dialog_pmic.h	/^	DA9053_GPID7_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID8_REG	include/dialog_pmic.h	/^	DA9053_GPID8_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPID9_REG	include/dialog_pmic.h	/^	DA9053_GPID9_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO0001_REG	include/dialog_pmic.h	/^	DA9053_GPIO0001_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO0203_REG	include/dialog_pmic.h	/^	DA9053_GPIO0203_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO0405_REG	include/dialog_pmic.h	/^	DA9053_GPIO0405_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO0607_REG	include/dialog_pmic.h	/^	DA9053_GPIO0607_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO0809_REG	include/dialog_pmic.h	/^	DA9053_GPIO0809_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO1011_REG	include/dialog_pmic.h	/^	DA9053_GPIO1011_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO1213_REG	include/dialog_pmic.h	/^	DA9053_GPIO1213_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_GPIO1415_REG	include/dialog_pmic.h	/^	DA9053_GPIO1415_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ICHGAV_REG	include/dialog_pmic.h	/^	DA9053_ICHGAV_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ICHGEND_REG	include/dialog_pmic.h	/^	DA9053_ICHGEND_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ICHGTHD_REG	include/dialog_pmic.h	/^	DA9053_ICHGTHD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID01_REG	include/dialog_pmic.h	/^	DA9053_ID01_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID1011_REG	include/dialog_pmic.h	/^	DA9053_ID1011_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID1213_REG	include/dialog_pmic.h	/^	DA9053_ID1213_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID1415_REG	include/dialog_pmic.h	/^	DA9053_ID1415_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID1617_REG	include/dialog_pmic.h	/^	DA9053_ID1617_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID1819_REG	include/dialog_pmic.h	/^	DA9053_ID1819_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID2021_REG	include/dialog_pmic.h	/^	DA9053_ID2021_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID23_REG	include/dialog_pmic.h	/^	DA9053_ID23_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID45_REG	include/dialog_pmic.h	/^	DA9053_ID45_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID67_REG	include/dialog_pmic.h	/^	DA9053_ID67_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ID89_REG	include/dialog_pmic.h	/^	DA9053_ID89_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_INPUTCONT_REG	include/dialog_pmic.h	/^	DA9053_INPUTCONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_INTERFACE_REG	include/dialog_pmic.h	/^	DA9053_INTERFACE_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_IRQMASKA_REG	include/dialog_pmic.h	/^	DA9053_IRQMASKA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_IRQMASKB_REG	include/dialog_pmic.h	/^	DA9053_IRQMASKB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_IRQMASKC_REG	include/dialog_pmic.h	/^	DA9053_IRQMASKC_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_IRQMASKD_REG	include/dialog_pmic.h	/^	DA9053_IRQMASKD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_ISET_REG	include/dialog_pmic.h	/^	DA9053_ISET_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO10_REG	include/dialog_pmic.h	/^	DA9053_LDO10_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO1_REG	include/dialog_pmic.h	/^	DA9053_LDO1_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO2_REG	include/dialog_pmic.h	/^	DA9053_LDO2_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO3_REG	include/dialog_pmic.h	/^	DA9053_LDO3_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO4_REG	include/dialog_pmic.h	/^	DA9053_LDO4_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO5_REG	include/dialog_pmic.h	/^	DA9053_LDO5_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO6_REG	include/dialog_pmic.h	/^	DA9053_LDO6_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO7_REG	include/dialog_pmic.h	/^	DA9053_LDO7_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO8_REG	include/dialog_pmic.h	/^	DA9053_LDO8_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LDO9_REG	include/dialog_pmic.h	/^	DA9053_LDO9_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED1CONF_REG	include/dialog_pmic.h	/^	DA9053_LED1CONF_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED1CONT_REG	include/dialog_pmic.h	/^	DA9053_LED1CONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED2CONF_REG	include/dialog_pmic.h	/^	DA9053_LED2CONF_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED2CONT_REG	include/dialog_pmic.h	/^	DA9053_LED2CONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED3CONF_REG	include/dialog_pmic.h	/^	DA9053_LED3CONF_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED3CONT_REG	include/dialog_pmic.h	/^	DA9053_LED3CONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED4CONT_REG	include/dialog_pmic.h	/^	DA9053_LED4CONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LED5CONT_REG	include/dialog_pmic.h	/^	DA9053_LED5CONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LEDCONT_REG	include/dialog_pmic.h	/^	DA9053_LEDCONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_LEDMIN123_REG	include/dialog_pmic.h	/^	DA9053_LEDMIN123_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_OSCTRIM_REG	include/dialog_pmic.h	/^	DA9053_OSCTRIM_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_OTPCONT_REG	include/dialog_pmic.h	/^	DA9053_OTPCONT_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_PAGECON0_REG	include/dialog_pmic.h	/^	DA9053_PAGECON0_REG = 0,$/;"	e	enum:__anondac7d0c60103
DA9053_PAGECON128_REG	include/dialog_pmic.h	/^	DA9053_PAGECON128_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_PDDIS_REG	include/dialog_pmic.h	/^	DA9053_PDDIS_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_PULLDOWN_REG	include/dialog_pmic.h	/^	DA9053_PULLDOWN_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_RESET_REG	include/dialog_pmic.h	/^	DA9053_RESET_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SECONDA_REG	include/dialog_pmic.h	/^	DA9053_SECONDA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SECONDB_REG	include/dialog_pmic.h	/^	DA9053_SECONDB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SECONDC_REG	include/dialog_pmic.h	/^	DA9053_SECONDC_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SECONDD_REG	include/dialog_pmic.h	/^	DA9053_SECONDD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SEQA_REG	include/dialog_pmic.h	/^	DA9053_SEQA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SEQB_REG	include/dialog_pmic.h	/^	DA9053_SEQB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SEQSTATUS_REG	include/dialog_pmic.h	/^	DA9053_SEQSTATUS_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SEQTIMER_REG	include/dialog_pmic.h	/^	DA9053_SEQTIMER_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_STATUSA_REG	include/dialog_pmic.h	/^	DA9053_STATUSA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_STATUSB_REG	include/dialog_pmic.h	/^	DA9053_STATUSB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_STATUSC_REG	include/dialog_pmic.h	/^	DA9053_STATUSC_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_STATUSD_REG	include/dialog_pmic.h	/^	DA9053_STATUSD_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_SUPPLY_REG	include/dialog_pmic.h	/^	DA9053_SUPPLY_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TBATHIGHIN_REG	include/dialog_pmic.h	/^	DA9053_TBATHIGHIN_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TBATHIGHP_REG	include/dialog_pmic.h	/^	DA9053_TBATHIGHP_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TBATLOW_REG	include/dialog_pmic.h	/^	DA9053_TBATLOW_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TBATRES_REG	include/dialog_pmic.h	/^	DA9053_TBATRES_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TJUNCRES_REG	include/dialog_pmic.h	/^	DA9053_TJUNCRES_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TOFFSET_REG	include/dialog_pmic.h	/^	DA9053_TOFFSET_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TSICONTA_REG	include/dialog_pmic.h	/^	DA9053_TSICONTA_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TSICONTB_REG	include/dialog_pmic.h	/^	DA9053_TSICONTB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TSILSB_REG	include/dialog_pmic.h	/^	DA9053_TSILSB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TSIXMSB_REG	include/dialog_pmic.h	/^	DA9053_TSIXMSB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TSIYMSB_REG	include/dialog_pmic.h	/^	DA9053_TSIYMSB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_TSIZMSB_REG	include/dialog_pmic.h	/^	DA9053_TSIZMSB_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_VDDMON_REG	include/dialog_pmic.h	/^	DA9053_VDDMON_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_VDDRES_REG	include/dialog_pmic.h	/^	DA9053_VDDRES_REG,$/;"	e	enum:__anondac7d0c60103
DA9053_WAITCONT_REG	include/dialog_pmic.h	/^	DA9053_WAITCONT_REG,$/;"	e	enum:__anondac7d0c60103
DABR	arch/powerpc/include/asm/processor.h	/^#define DABR	/;"	d
DAC1	arch/powerpc/include/asm/processor.h	/^#define DAC1	/;"	d
DAC2	arch/powerpc/include/asm/processor.h	/^#define DAC2	/;"	d
DAC2_CMP_EN	include/radeon.h	/^#define DAC2_CMP_EN	/;"	d
DAC2_EXPAND_MODE	include/radeon.h	/^#define DAC2_EXPAND_MODE	/;"	d
DAC2_PALETTE_ACCESS_CNTL	include/radeon.h	/^#define DAC2_PALETTE_ACCESS_CNTL	/;"	d
DACK0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DREQ0_MARK,	DACK0_MARK,$/;"	e	enum:__anona304c1340103	file:
DACK0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,$/;"	e	enum:__anona3077f190103	file:
DACK0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,$/;"	e	enum:__anona307879b0103	file:
DACK0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	A2_MARK, WE0_N_MARK, WE1_N_MARK, DACK0_MARK,$/;"	e	enum:__anona307901d0103	file:
DACK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS6B__MARK, DACK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DACK1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DREQ1_MARK,	DACK1_MARK,$/;"	e	enum:__anona304c1340103	file:
DACK1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,$/;"	e	enum:__anona3077f190103	file:
DACK1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,$/;"	e	enum:__anona307879b0103	file:
DACK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
DACK2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3077f190103	file:
DACK2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDRD__MARK, DACK2_MARK, PORT217_LCD2RS_MARK, MSIOF0L_TSYNC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
DACK3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDHSYN_MARK, LCDCS__MARK, LCDCS2__MARK, DACK3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
DACKA	drivers/usb/host/r8a66597.h	/^#define	DACKA	/;"	d
DACR_CASL	arch/m68k/include/asm/m5307.h	/^#define DACR_CASL(/;"	d
DACR_CMD_PIN	arch/m68k/include/asm/m5307.h	/^#define DACR_CMD_PIN(/;"	d
DACR_IMRS_INIT_CMD	arch/m68k/include/asm/m5307.h	/^#define DACR_IMRS_INIT_CMD	/;"	d
DACR_IP_PRECHG_ALL	arch/m68k/include/asm/m5307.h	/^#define DACR_IP_PRECHG_ALL	/;"	d
DACR_PM_CONTINUOUS	arch/m68k/include/asm/m5307.h	/^#define DACR_PM_CONTINUOUS	/;"	d
DACR_PORT_SZ_16	arch/m68k/include/asm/m5307.h	/^#define DACR_PORT_SZ_16	/;"	d
DACR_PORT_SZ_32	arch/m68k/include/asm/m5307.h	/^#define DACR_PORT_SZ_32	/;"	d
DACR_PORT_SZ_8	arch/m68k/include/asm/m5307.h	/^#define DACR_PORT_SZ_8	/;"	d
DACR_RE	arch/m68k/include/asm/m5307.h	/^#define DACR_RE	/;"	d
DAC_4BPP_PIX_ORDER	include/radeon.h	/^#define DAC_4BPP_PIX_ORDER	/;"	d
DAC_8BIT_EN	include/radeon.h	/^#define DAC_8BIT_EN	/;"	d
DAC_BLANKING	include/radeon.h	/^#define DAC_BLANKING	/;"	d
DAC_BLANK_LEVEL	include/radeon.h	/^#define DAC_BLANK_LEVEL	/;"	d
DAC_BROAD_PULSE	include/radeon.h	/^#define DAC_BROAD_PULSE	/;"	d
DAC_BYTE	arch/powerpc/include/asm/processor.h	/^#define     DAC_BYTE	/;"	d
DAC_CMP_EN	include/radeon.h	/^#define DAC_CMP_EN	/;"	d
DAC_CMP_OUTPUT	include/radeon.h	/^#define DAC_CMP_OUTPUT	/;"	d
DAC_CNTL	include/radeon.h	/^#define DAC_CNTL	/;"	d
DAC_CNTL2	include/radeon.h	/^#define DAC_CNTL2	/;"	d
DAC_CRC_EN	include/radeon.h	/^#define DAC_CRC_EN	/;"	d
DAC_CRC_SIG1	include/radeon.h	/^#define DAC_CRC_SIG1	/;"	d
DAC_CRC_SIG2	include/radeon.h	/^#define DAC_CRC_SIG2	/;"	d
DAC_DEMEN	arch/arm/include/asm/arch-omap3/dss.h	/^#define DAC_DEMEN	/;"	d
DAC_EMBEDDED_SYNC_CNTL	include/radeon.h	/^#define DAC_EMBEDDED_SYNC_CNTL	/;"	d
DAC_EXPAND_MODE	include/radeon.h	/^#define DAC_EXPAND_MODE	/;"	d
DAC_EXT_CNTL	include/radeon.h	/^#define DAC_EXT_CNTL	/;"	d
DAC_FORCE_BLANK_OFF_EN	include/radeon.h	/^#define DAC_FORCE_BLANK_OFF_EN	/;"	d
DAC_FORCE_DATA_EN	include/radeon.h	/^#define DAC_FORCE_DATA_EN	/;"	d
DAC_FORCE_DATA_MASK	include/radeon.h	/^#define DAC_FORCE_DATA_MASK	/;"	d
DAC_FORCE_DATA_SEL_MASK	include/radeon.h	/^#define DAC_FORCE_DATA_SEL_MASK	/;"	d
DAC_FORCE_DATA_SHIFT	include/radeon.h	/^#define DAC_FORCE_DATA_SHIFT	/;"	d
DAC_HALF	arch/powerpc/include/asm/processor.h	/^#define     DAC_HALF	/;"	d
DAC_INCR	include/radeon.h	/^#define DAC_INCR	/;"	d
DAC_MACRO_CNTL	include/radeon.h	/^#define DAC_MACRO_CNTL	/;"	d
DAC_MASK_ALL	include/radeon.h	/^#define DAC_MASK_ALL	/;"	d
DAC_NEG_SYNC_LEVEL	include/radeon.h	/^#define DAC_NEG_SYNC_LEVEL	/;"	d
DAC_PDWN	include/radeon.h	/^#define DAC_PDWN	/;"	d
DAC_POS_SYNC_LEVEL	include/radeon.h	/^#define DAC_POS_SYNC_LEVEL	/;"	d
DAC_POWERDN	arch/arm/include/asm/arch-omap3/dss.h	/^#define DAC_POWERDN	/;"	d
DAC_QUAD	arch/powerpc/include/asm/processor.h	/^#define     DAC_QUAD	/;"	d
DAC_RANGE_CNTL	include/radeon.h	/^#define DAC_RANGE_CNTL	/;"	d
DAC_RANGE_CNTL_MASK	include/radeon.h	/^#define DAC_RANGE_CNTL_MASK	/;"	d
DAC_SKEW_CLKS	include/radeon.h	/^#define DAC_SKEW_CLKS	/;"	d
DAC_VGA_ADR_EN	include/radeon.h	/^#define DAC_VGA_ADR_EN	/;"	d
DAC_WORD	arch/powerpc/include/asm/processor.h	/^#define     DAC_WORD	/;"	d
DAE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DAE	/;"	d
DAINT_IN_EP_INT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DAINT_IN_EP_INT(/;"	d
DAINT_MASK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DAINT_MASK	/;"	d
DAINT_OUT_BIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DAINT_OUT_BIT	/;"	d
DAINT_OUT_EP_INT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DAINT_OUT_EP_INT(/;"	d
DAP	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DAP	/;"	d
DAPS	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DAPS(/;"	d
DAP_ROM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define DAP_ROM_BASE_ADDR /;"	d
DAR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DAR(/;"	d
DAR	arch/powerpc/include/asm/processor.h	/^#define DAR	/;"	d
DAR0	arch/sh/include/asm/cpu_sh7750.h	/^#define DAR0	/;"	d
DAR1	arch/sh/include/asm/cpu_sh7750.h	/^#define DAR1	/;"	d
DAR2	arch/sh/include/asm/cpu_sh7750.h	/^#define DAR2	/;"	d
DAR3	arch/sh/include/asm/cpu_sh7750.h	/^#define DAR3	/;"	d
DAR4	arch/sh/include/asm/cpu_sh7750.h	/^#define DAR4	/;"	d
DARB_0	arch/sh/include/asm/cpu_sh7722.h	/^#define DARB_0 /;"	d
DARB_1	arch/sh/include/asm/cpu_sh7722.h	/^#define DARB_1 /;"	d
DARB_2	arch/sh/include/asm/cpu_sh7722.h	/^#define DARB_2 /;"	d
DARB_3	arch/sh/include/asm/cpu_sh7722.h	/^#define DARB_3 /;"	d
DARWIN_MAJOR_VERSION	Makefile	/^DARWIN_MAJOR_VERSION	= $(shell sw_vers -productVersion | cut -f 1 -d '.')$/;"	m
DARWIN_MINOR_VERSION	Makefile	/^DARWIN_MINOR_VERSION	= $(shell sw_vers -productVersion | cut -f 2 -d '.')$/;"	m
DAR_0	arch/sh/include/asm/cpu_sh7722.h	/^#define DAR_0 /;"	d
DAR_1	arch/sh/include/asm/cpu_sh7722.h	/^#define DAR_1 /;"	d
DAR_2	arch/sh/include/asm/cpu_sh7722.h	/^#define DAR_2 /;"	d
DAR_3	arch/sh/include/asm/cpu_sh7722.h	/^#define DAR_3 /;"	d
DAR_4	arch/sh/include/asm/cpu_sh7722.h	/^#define DAR_4 /;"	d
DAR_5	arch/sh/include/asm/cpu_sh7722.h	/^#define DAR_5 /;"	d
DAR_DEAR	arch/powerpc/include/asm/processor.h	/^#define DAR_DEAR /;"	d
DASTS	arch/sh/include/asm/cpu_sh7722.h	/^#define DASTS /;"	d
DAT	cmd/immap.c	/^		DAT,$/;"	e	enum:do_iopset::__anonb0469eed0103	file:
DATA	drivers/rtc/ds1302.c	/^#define DATA	/;"	d	file:
DATA	include/sym53c8xx.h	/^#define DATA(/;"	d
DATACYC_OFFSET	arch/blackfin/cpu/initcode.c	/^#define DATACYC_OFFSET /;"	d	file:
DATAEND	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DATAEND	/;"	d
DATAERROR_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DATAERROR_R	/;"	d
DATAFLASH_BAD_ADDRESS	include/dataflash.h	/^#define DATAFLASH_BAD_ADDRESS	/;"	d
DATAFLASH_BAD_COMMAND	include/dataflash.h	/^#define DATAFLASH_BAD_COMMAND	/;"	d
DATAFLASH_BUSY	include/dataflash.h	/^#define DATAFLASH_BUSY	/;"	d
DATAFLASH_ERROR	include/dataflash.h	/^#define DATAFLASH_ERROR	/;"	d
DATAFLASH_MEMORY_OVERFLOW	include/dataflash.h	/^#define DATAFLASH_MEMORY_OVERFLOW	/;"	d
DATAFLASH_OK	include/dataflash.h	/^#define DATAFLASH_OK	/;"	d
DATAFLASH_TCHS	include/configs/at91sam9260ek.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/at91sam9261ek.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/at91sam9263ek.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/at91sam9rlek.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/ethernut5.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/meesc.h	/^# define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/pm9261.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/pm9263.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCHS	include/configs/usb_a9263.h	/^#define DATAFLASH_TCHS	/;"	d
DATAFLASH_TCSS	include/configs/at91sam9260ek.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/at91sam9261ek.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/at91sam9263ek.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/at91sam9rlek.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/ethernut5.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/meesc.h	/^# define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/pm9261.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/pm9263.h	/^#define DATAFLASH_TCSS	/;"	d
DATAFLASH_TCSS	include/configs/usb_a9263.h	/^#define DATAFLASH_TCSS	/;"	d
DATAHD	fs/ubifs/ubifs.h	/^#define DATAHD /;"	d
DATALINES_SHIFT	arch/arm/include/asm/arch-omap3/dss.h	/^#define DATALINES_SHIFT	/;"	d
DATA_ALIGNMENT_LSB	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_ALIGNMENT_LSB,$/;"	e	enum:__anonf53c9cce0503
DATA_ALIGNMENT_MSB	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_ALIGNMENT_MSB,$/;"	e	enum:__anonf53c9cce0503
DATA_ALIGNMENT_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define DATA_ALIGNMENT_SHIFT	/;"	d
DATA_BLOCK_PTR_0	drivers/mtd/nand/tegra_nand.h	/^#define DATA_BLOCK_PTR_0	/;"	d
DATA_COMPLETE	include/fsl_esdhc.h	/^#define DATA_COMPLETE	/;"	d
DATA_DIR_FROM_HOST	drivers/usb/gadget/storage_common.c	/^	DATA_DIR_FROM_HOST,$/;"	e	enum:data_direction	file:
DATA_DIR_NONE	drivers/usb/gadget/storage_common.c	/^	DATA_DIR_NONE$/;"	e	enum:data_direction	file:
DATA_DIR_TO_HOST	drivers/usb/gadget/storage_common.c	/^	DATA_DIR_TO_HOST,$/;"	e	enum:data_direction	file:
DATA_DIR_UNKNOWN	drivers/usb/gadget/storage_common.c	/^	DATA_DIR_UNKNOWN = 0,$/;"	e	enum:data_direction	file:
DATA_END	arch/sparc/cpu/leon2/start.S	/^#define DATA_END /;"	d	file:
DATA_ERR	include/fsl_esdhc.h	/^#define DATA_ERR	/;"	d
DATA_FORMAT_DF1P1C	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF1P1C,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF1P2C16B	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF1P2C16B,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF1P2C18B	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF1P2C18B,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF1P2C24B	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF1P2C24B,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF1P3C18B	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF1P3C18B,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF1P3C24B	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF1P3C24B,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF2S	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF2S,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DF3S	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DF3S,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_DFSPI	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_FORMAT_DFSPI,$/;"	e	enum:__anonf53c9cce0403
DATA_FORMAT_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define DATA_FORMAT_MASK	/;"	d
DATA_FORMAT_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define DATA_FORMAT_SHIFT	/;"	d
DATA_HIGH	drivers/rtc/ds1302.c	/^#define DATA_HIGH	/;"	d	file:
DATA_IMAGE	board/compulab/common/omap3_display.c	/^	DATA_IMAGE, \/* #define CONFIG_SCF0403_LCD to use *\/$/;"	e	enum:display_type	file:
DATA_INTERFACE_CLASS	include/usbdescriptors.h	/^#define DATA_INTERFACE_CLASS	/;"	d
DATA_INTERFACE_PROTOCOL_NONE	include/usbdescriptors.h	/^#define DATA_INTERFACE_PROTOCOL_NONE	/;"	d
DATA_INTERFACE_SUBCLASS_NONE	include/usbdescriptors.h	/^#define DATA_INTERFACE_SUBCLASS_NONE	/;"	d
DATA_INTR	drivers/mtd/nand/denali.h	/^#define DATA_INTR	/;"	d
DATA_INTR_EN	drivers/mtd/nand/denali.h	/^#define DATA_INTR_EN	/;"	d
DATA_INTR_EN__READ_DATA_AV	drivers/mtd/nand/denali.h	/^#define     DATA_INTR_EN__READ_DATA_AV	/;"	d
DATA_INTR_EN__WRITE_SPACE_AV	drivers/mtd/nand/denali.h	/^#define     DATA_INTR_EN__WRITE_SPACE_AV	/;"	d
DATA_INTR__READ_DATA_AV	drivers/mtd/nand/denali.h	/^#define     DATA_INTR__READ_DATA_AV	/;"	d
DATA_INTR__WRITE_SPACE_AV	drivers/mtd/nand/denali.h	/^#define     DATA_INTR__WRITE_SPACE_AV	/;"	d
DATA_LOW	drivers/rtc/ds1302.c	/^#define DATA_LOW	/;"	d	file:
DATA_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define DATA_MASK	/;"	d
DATA_ONLY	drivers/video/da8xx-fb.c	/^#define DATA_ONLY	/;"	d	file:
DATA_OPTIONS	drivers/ddr/fsl/interactive.c	/^#define DATA_OPTIONS(/;"	d	file:
DATA_ORDER_BLUE_RED	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_ORDER_BLUE_RED,$/;"	e	enum:__anonf53c9cce0603
DATA_ORDER_RED_BLUE	arch/arm/include/asm/arch-tegra/dc.h	/^	DATA_ORDER_RED_BLUE,$/;"	e	enum:__anonf53c9cce0603
DATA_ORDER_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define DATA_ORDER_SHIFT	/;"	d
DATA_READ	drivers/rtc/ds1302.c	/^#define DATA_READ	/;"	d	file:
DATA_REG	drivers/net/phy/mv88e6352.c	/^#define DATA_REG	/;"	d	file:
DATA_REG_ADDR	arch/arm/include/asm/arch-spear/gpio.h	/^#define DATA_REG_ADDR(/;"	d
DATA_REG_DELAY	drivers/mmc/arm_pl180_mmci.h	/^#define DATA_REG_DELAY	/;"	d
DATA_SEG	arch/x86/cpu/sipi_vector.S	/^#define DATA_SEG	/;"	d	file:
DATA_STAGE_IN	drivers/usb/gadget/atmel_usba_udc.h	/^	DATA_STAGE_IN,$/;"	e	enum:usba_ctrl_state
DATA_STAGE_OUT	drivers/usb/gadget/atmel_usba_udc.h	/^	DATA_STAGE_OUT,$/;"	e	enum:usba_ctrl_state
DATA_STATE_NEED_ZLP	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define DATA_STATE_NEED_ZLP /;"	d
DATA_STATE_RECV	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define DATA_STATE_RECV /;"	d
DATA_STATE_XMIT	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define DATA_STATE_XMIT /;"	d
DATA_TRANSFER_MODE	drivers/mtd/nand/denali.h	/^#define DATA_TRANSFER_MODE /;"	d
DATA_TYPE	cmd/load.c	/^#define DATA_TYPE /;"	d	file:
DATA_TYPE_NVLIST	fs/zfs/zfs.c	/^#define	DATA_TYPE_NVLIST	/;"	d	file:
DATA_TYPE_NVLIST_ARRAY	fs/zfs/zfs.c	/^#define	DATA_TYPE_NVLIST_ARRAY	/;"	d	file:
DATA_TYPE_STRING	fs/zfs/zfs.c	/^#define	DATA_TYPE_STRING	/;"	d	file:
DATA_TYPE_UINT64	fs/zfs/zfs.c	/^#define	DATA_TYPE_UINT64	/;"	d	file:
DATI_MASK	arch/arm/include/asm/omap_mmc.h	/^#define DATI_MASK	/;"	d
DATPORT	include/fsl_esdhc.h	/^#define DATPORT	/;"	d
DATX0IOCR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DATX0IOCR(/;"	d
DATX0IOCR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DATX0IOCR(/;"	d
DATX1IOCR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DATX1IOCR(/;"	d
DATX1IOCR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DATX1IOCR(/;"	d
DATX2IOCR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DATX2IOCR(/;"	d
DATX2IOCR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DATX2IOCR(/;"	d
DATX3IOCR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DATX3IOCR(/;"	d
DATX3IOCR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DATX3IOCR(/;"	d
DATX_IOCR_DM	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DATX_IOCR_DM	/;"	d
DATX_IOCR_DM	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DATX_IOCR_DM	/;"	d
DATX_IOCR_DQ	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DATX_IOCR_DQ(/;"	d
DATX_IOCR_DQ	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DATX_IOCR_DQ(/;"	d
DATX_IOCR_DQS	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DATX_IOCR_DQS	/;"	d
DATX_IOCR_DQS	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DATX_IOCR_DQS	/;"	d
DATX_IOCR_DQSN	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DATX_IOCR_DQSN	/;"	d
DATX_IOCR_DQSN	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DATX_IOCR_DQSN	/;"	d
DATX_IOCR_READ_DELAY	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DATX_IOCR_READ_DELAY(/;"	d
DATX_IOCR_READ_DELAY	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DATX_IOCR_READ_DELAY(/;"	d
DATX_IOCR_WRITE_DELAY	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DATX_IOCR_WRITE_DELAY(/;"	d
DATX_IOCR_WRITE_DELAY	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DATX_IOCR_WRITE_DELAY(/;"	d
DAT_BLK_END	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               DAT_BLK_END /;"	d
DAT_BLK_END_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          DAT_BLK_END_MASK /;"	d
DAT_BLK_END_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          DAT_BLK_END_STAT /;"	d
DAT_CRC_FAIL	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              DAT_CRC_FAIL /;"	d
DAT_CRC_FAIL_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         DAT_CRC_FAIL_MASK /;"	d
DAT_CRC_FAIL_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         DAT_CRC_FAIL_STAT /;"	d
DAT_END	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   DAT_END /;"	d
DAT_END_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              DAT_END_MASK /;"	d
DAT_END_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              DAT_END_STAT /;"	d
DAT_MASK	drivers/gpio/s5p_gpio.c	/^#define DAT_MASK(/;"	d	file:
DAT_OFFSET	drivers/i2c/kona_i2c.c	/^#define DAT_OFFSET	/;"	d	file:
DAT_SET	drivers/gpio/s5p_gpio.c	/^#define DAT_SET(/;"	d	file:
DAT_TIMEOUT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          DAT_TIMEOUT_MASK /;"	d
DAT_TIMEOUT_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          DAT_TIMEOUT_STAT /;"	d
DAT_TIME_OUT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              DAT_TIME_OUT /;"	d
DAULength	drivers/usb/gadget/f_thor.h	/^	__u16 DAULength;$/;"	m	struct:usb_cdc_attribute_vendor_descriptor	typeref:typename:__u16
DAUType	drivers/usb/gadget/f_thor.h	/^	__u16 DAUType;$/;"	m	struct:usb_cdc_attribute_vendor_descriptor	typeref:typename:__u16
DAUValue	drivers/usb/gadget/f_thor.h	/^	__u8 DAUValue;$/;"	m	struct:usb_cdc_attribute_vendor_descriptor	typeref:typename:__u8
DAVINCI_ABCR_ASIZE_16BIT	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_ASIZE_16BIT	/;"	d
DAVINCI_ABCR_ASIZE_8BIT	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_ASIZE_8BIT	/;"	d
DAVINCI_ABCR_EXT_WAIT	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_EXT_WAIT	/;"	d
DAVINCI_ABCR_RHOLD	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_RHOLD(/;"	d
DAVINCI_ABCR_RSETUP	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_RSETUP(/;"	d
DAVINCI_ABCR_RSTROBE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_RSTROBE(/;"	d
DAVINCI_ABCR_STROBE_SELECT	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_STROBE_SELECT	/;"	d
DAVINCI_ABCR_TA	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_TA(/;"	d
DAVINCI_ABCR_WHOLD	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_WHOLD(/;"	d
DAVINCI_ABCR_WSETUP	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_WSETUP(/;"	d
DAVINCI_ABCR_WSTROBE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_ABCR_WSTROBE(/;"	d
DAVINCI_ARM_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_ARM_CLKID			= DAVINCI_PLL0_SYSCLK6,$/;"	e	enum:davinci_clk_ids
DAVINCI_ARM_INTC_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ARM_INTC_BASE	/;"	d
DAVINCI_ASP0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASP0_BASE	/;"	d
DAVINCI_ASP1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASP1_BASE	/;"	d
DAVINCI_ASP_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASP_BASE	/;"	d
DAVINCI_ASYNC_EMIF_CNTRL_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_CNTRL_BASE	/;"	d
DAVINCI_ASYNC_EMIF_CNTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_CNTRL_BASE /;"	d
DAVINCI_ASYNC_EMIF_DATA_CE0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE	/;"	d
DAVINCI_ASYNC_EMIF_DATA_CE1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE	/;"	d
DAVINCI_ASYNC_EMIF_DATA_CE2_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE	/;"	d
DAVINCI_ASYNC_EMIF_DATA_CE3_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE	/;"	d
DAVINCI_ASYNC_EMIF_DATA_CE4_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_DATA_CE4_BASE	/;"	d
DAVINCI_ASYNC_EMIF_DATA_CE5_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_ASYNC_EMIF_DATA_CE5_BASE	/;"	d
DAVINCI_AUXCLK_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_AUXCLK_CLKID			= 0x101,$/;"	e	enum:davinci_clk_ids
DAVINCI_BOOTCFG_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_BOOTCFG_BASE	/;"	d
DAVINCI_CFC_ATA_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_CFC_ATA_BASE	/;"	d
DAVINCI_DDR_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DDR_BASE	/;"	d
DAVINCI_DDR_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_DDR_CLKID			= DAVINCI_PLL1_SYSCLK1,$/;"	e	enum:davinci_clk_ids
DAVINCI_DDR_EMIF_CTRL_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DDR_EMIF_CTRL_BASE	/;"	d
DAVINCI_DDR_EMIF_DATA_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DDR_EMIF_DATA_BASE	/;"	d
DAVINCI_DM646X_LPSC_EMAC	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DM646X_LPSC_EMAC	/;"	d
DAVINCI_DM646X_LPSC_I2C	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DM646X_LPSC_I2C	/;"	d
DAVINCI_DM646X_LPSC_TIMER0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DM646X_LPSC_TIMER0	/;"	d
DAVINCI_DM646X_LPSC_UART0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DM646X_LPSC_UART0	/;"	d
DAVINCI_DMA_3PCC_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DMA_3PCC_BASE	/;"	d
DAVINCI_DMA_3PTC0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DMA_3PTC0_BASE	/;"	d
DAVINCI_DMA_3PTC1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_DMA_3PTC1_BASE	/;"	d
DAVINCI_EMAC_CNTRL_REGS_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_EMAC_CNTRL_REGS_BASE	/;"	d
DAVINCI_EMAC_GIG_ENABLE	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define DAVINCI_EMAC_GIG_ENABLE$/;"	d
DAVINCI_EMAC_VERSION2	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define DAVINCI_EMAC_VERSION2$/;"	d
DAVINCI_EMAC_VERSION2	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define DAVINCI_EMAC_VERSION2$/;"	d
DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE	/;"	d
DAVINCI_EMAC_WRAPPER_RAM_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_EMAC_WRAPPER_RAM_BASE	/;"	d
DAVINCI_GPIO_BANK01	arch/arm/mach-davinci/include/mach/gpio.h	/^#define DAVINCI_GPIO_BANK01	/;"	d
DAVINCI_GPIO_BANK23	arch/arm/mach-davinci/include/mach/gpio.h	/^#define DAVINCI_GPIO_BANK23	/;"	d
DAVINCI_GPIO_BANK45	arch/arm/mach-davinci/include/mach/gpio.h	/^#define DAVINCI_GPIO_BANK45	/;"	d
DAVINCI_GPIO_BANK67	arch/arm/mach-davinci/include/mach/gpio.h	/^#define DAVINCI_GPIO_BANK67	/;"	d
DAVINCI_GPIO_BANK8	arch/arm/mach-davinci/include/mach/gpio.h	/^#define DAVINCI_GPIO_BANK8	/;"	d
DAVINCI_GPIO_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_GPIO_BASE	/;"	d
DAVINCI_GPIO_BINTEN	arch/arm/mach-davinci/include/mach/gpio.h	/^#define DAVINCI_GPIO_BINTEN	/;"	d
DAVINCI_GPSC_ARMDOMAIN	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_GPSC_ARMDOMAIN	/;"	d
DAVINCI_GPSC_DSPDOMAIN	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_GPSC_DSPDOMAIN	/;"	d
DAVINCI_I2C0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_I2C0_BASE	/;"	d
DAVINCI_I2C1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_I2C1_BASE	/;"	d
DAVINCI_I2C_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_I2C_BASE	/;"	d
DAVINCI_IMCOP_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_IMCOP_BASE	/;"	d
DAVINCI_INTC_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_INTC_BASE	/;"	d
DAVINCI_INTR_DRVVBUS	drivers/usb/musb/davinci.h	/^#define DAVINCI_INTR_DRVVBUS	/;"	d
DAVINCI_L3CBARAM_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_L3CBARAM_BASE	/;"	d
DAVINCI_LCD_CNTL_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LCD_CNTL_BASE	/;"	d
DAVINCI_LPSC_AEMIF	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_AEMIF	/;"	d
DAVINCI_LPSC_AINTC	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_AINTC	/;"	d
DAVINCI_LPSC_ARM	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_ARM	/;"	d
DAVINCI_LPSC_ARM_RAM_ROM	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_ARM_RAM_ROM	/;"	d
DAVINCI_LPSC_ATA	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_ATA	/;"	d
DAVINCI_LPSC_BR_F7	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_BR_F7	/;"	d
DAVINCI_LPSC_CFG27	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_CFG27	/;"	d
DAVINCI_LPSC_CFG3	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_CFG3	/;"	d
DAVINCI_LPSC_CFG5	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_CFG5	/;"	d
DAVINCI_LPSC_CROSSBAR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_CROSSBAR	/;"	d
DAVINCI_LPSC_DDR_EMIF	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_DDR_EMIF	/;"	d
DAVINCI_LPSC_DMAX	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_DMAX	/;"	d
DAVINCI_LPSC_EMAC	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_EMAC	/;"	d
DAVINCI_LPSC_EMAC_WRAPPER	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_EMAC_WRAPPER	/;"	d
DAVINCI_LPSC_GEM	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_GEM	/;"	d
DAVINCI_LPSC_GPIO	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_GPIO	/;"	d
DAVINCI_LPSC_HDVICP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_HDVICP	/;"	d
DAVINCI_LPSC_I2C	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_I2C	/;"	d
DAVINCI_LPSC_I2C1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_I2C1	/;"	d
DAVINCI_LPSC_IEEE1394	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_IEEE1394	/;"	d
DAVINCI_LPSC_IMCOP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_IMCOP	/;"	d
DAVINCI_LPSC_L3_CBA_RAM	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_L3_CBA_RAM	/;"	d
DAVINCI_LPSC_LCDC	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_LCDC	/;"	d
DAVINCI_LPSC_MDIO	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_MDIO	/;"	d
DAVINCI_LPSC_MEMSTICK	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_MEMSTICK	/;"	d
DAVINCI_LPSC_MJCP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_MJCP	/;"	d
DAVINCI_LPSC_MMCSD1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_MMCSD1	/;"	d
DAVINCI_LPSC_MMC_SD	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_MMC_SD	/;"	d
DAVINCI_LPSC_MMC_SD1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_MMC_SD1	/;"	d
DAVINCI_LPSC_McASP0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_McASP0	/;"	d
DAVINCI_LPSC_McASP1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_McASP1	/;"	d
DAVINCI_LPSC_McASP2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_McASP2	/;"	d
DAVINCI_LPSC_McBSP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_McBSP	/;"	d
DAVINCI_LPSC_McBSP0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_McBSP0	/;"	d
DAVINCI_LPSC_McBSP1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_McBSP1	/;"	d
DAVINCI_LPSC_PSC1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_PSC1_BASE	/;"	d
DAVINCI_LPSC_PWM0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_PWM0	/;"	d
DAVINCI_LPSC_PWM1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_PWM1	/;"	d
DAVINCI_LPSC_PWM2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_PWM2	/;"	d
DAVINCI_LPSC_SATA	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SATA	/;"	d
DAVINCI_LPSC_SCR0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR0	/;"	d
DAVINCI_LPSC_SCR1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR1	/;"	d
DAVINCI_LPSC_SCR12	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR12	/;"	d
DAVINCI_LPSC_SCR2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR2	/;"	d
DAVINCI_LPSC_SCR3	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR3	/;"	d
DAVINCI_LPSC_SCR4	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR4	/;"	d
DAVINCI_LPSC_SCR7	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR7	/;"	d
DAVINCI_LPSC_SCR8	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR8	/;"	d
DAVINCI_LPSC_SCR_F0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR_F0	/;"	d
DAVINCI_LPSC_SCR_F1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR_F1	/;"	d
DAVINCI_LPSC_SCR_F2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR_F2	/;"	d
DAVINCI_LPSC_SCR_F6	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR_F6	/;"	d
DAVINCI_LPSC_SCR_F7	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR_F7	/;"	d
DAVINCI_LPSC_SCR_F8	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SCR_F8	/;"	d
DAVINCI_LPSC_SECCTL_KEYMGR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SECCTL_KEYMGR	/;"	d
DAVINCI_LPSC_SPI	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SPI	/;"	d
DAVINCI_LPSC_SPI0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SPI0	/;"	d
DAVINCI_LPSC_SPI1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SPI1	/;"	d
DAVINCI_LPSC_SYSTEM_SUBSYS	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_SYSTEM_SUBSYS	/;"	d
DAVINCI_LPSC_TIMER0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TIMER0	/;"	d
DAVINCI_LPSC_TIMER1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TIMER1	/;"	d
DAVINCI_LPSC_TIMER2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TIMER2	/;"	d
DAVINCI_LPSC_TPCC	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TPCC	/;"	d
DAVINCI_LPSC_TPCC1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TPCC1	/;"	d
DAVINCI_LPSC_TPTC0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TPTC0	/;"	d
DAVINCI_LPSC_TPTC1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TPTC1	/;"	d
DAVINCI_LPSC_TPTC2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_TPTC2	/;"	d
DAVINCI_LPSC_UART0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_UART0	/;"	d
DAVINCI_LPSC_UART1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_UART1	/;"	d
DAVINCI_LPSC_UART2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_UART2	/;"	d
DAVINCI_LPSC_UHPI	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_UHPI	/;"	d
DAVINCI_LPSC_USB	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_USB	/;"	d
DAVINCI_LPSC_USB11	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_USB11	/;"	d
DAVINCI_LPSC_USB20	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_USB20	/;"	d
DAVINCI_LPSC_VLYNQ	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_VLYNQ	/;"	d
DAVINCI_LPSC_VPIF	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_VPIF	/;"	d
DAVINCI_LPSC_VPSSMASTER	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_VPSSMASTER	/;"	d
DAVINCI_LPSC_VPSSMSTR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_VPSSMSTR	/;"	d
DAVINCI_LPSC_VPSSSLV	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_VPSSSLV	/;"	d
DAVINCI_LPSC_eCAP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_eCAP	/;"	d
DAVINCI_LPSC_ePWM	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_ePWM	/;"	d
DAVINCI_LPSC_eQEP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_eQEP	/;"	d
DAVINCI_LPSC_uPP	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_LPSC_uPP	/;"	d
DAVINCI_MAX_BLOCKS	drivers/mmc/davinci_mmc.c	/^#define DAVINCI_MAX_BLOCKS	/;"	d	file:
DAVINCI_MDIO_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_MDIO_CLKID			= DAVINCI_PLL0_SYSCLK4,$/;"	e	enum:davinci_clk_ids
DAVINCI_MDIO_CNTRL_REGS_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_MDIO_CNTRL_REGS_BASE	/;"	d
DAVINCI_MMCSD_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_MMCSD_CLKID			= DAVINCI_PLL0_SYSCLK2,$/;"	e	enum:davinci_clk_ids
DAVINCI_MMC_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_MMC_CLKID			= DAVINCI_PLL0_SYSCLK2,$/;"	e	enum:davinci_clk_ids
DAVINCI_MMC_SD0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_MMC_SD0_BASE	/;"	d
DAVINCI_MMC_SD1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_MMC_SD1_BASE	/;"	d
DAVINCI_MMC_SD_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_MMC_SD_BASE	/;"	d
DAVINCI_MS_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_MS_BASE	/;"	d
DAVINCI_NANDFCR_1BIT_ECC_START	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_1BIT_ECC_START(/;"	d
DAVINCI_NANDFCR_4BIT_CALC_START	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_4BIT_CALC_START	/;"	d
DAVINCI_NANDFCR_4BIT_ECC_SEL	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_4BIT_ECC_SEL(/;"	d
DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK	/;"	d
DAVINCI_NANDFCR_4BIT_ECC_START	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_4BIT_ECC_START	/;"	d
DAVINCI_NANDFCR_CS2NAND	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_CS2NAND	/;"	d
DAVINCI_NANDFCR_NAND_ENABLE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define DAVINCI_NANDFCR_NAND_ENABLE(/;"	d
DAVINCI_PLL0_SYSCLK2	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLL0_SYSCLK2			= DAVINCI_PLLC0_FLAG | 2,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLL0_SYSCLK4	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLL0_SYSCLK4			= DAVINCI_PLLC0_FLAG | 4,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLL0_SYSCLK6	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLL0_SYSCLK6			= DAVINCI_PLLC0_FLAG | 6,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLL1_SYSCLK1	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLL1_SYSCLK1			= DAVINCI_PLLC1_FLAG | 1,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLL1_SYSCLK2	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLL1_SYSCLK2			= DAVINCI_PLLC1_FLAG | 2,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLLC0_FLAG	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PLLC0_FLAG	/;"	d
DAVINCI_PLLC1_FLAG	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PLLC1_FLAG	/;"	d
DAVINCI_PLLC_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLLC_CLKID			= 0x100,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLLC_DIV_MASK	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PLLC_DIV_MASK	/;"	d
DAVINCI_PLLM_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_PLLM_CLKID			= 0x0FF,$/;"	e	enum:davinci_clk_ids
DAVINCI_PLL_CNTRL0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PLL_CNTRL0_BASE	/;"	d
DAVINCI_PLL_CNTRL1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PLL_CNTRL1_BASE	/;"	d
DAVINCI_PSC0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PSC0_BASE	/;"	d
DAVINCI_PSC1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PSC1_BASE	/;"	d
DAVINCI_PWM0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PWM0_BASE	/;"	d
DAVINCI_PWM1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PWM1_BASE	/;"	d
DAVINCI_PWM2_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PWM2_BASE	/;"	d
DAVINCI_PWR_SLEEP_CNTRL_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_PWR_SLEEP_CNTRL_BASE	/;"	d
DAVINCI_RTC_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_RTC_BASE	/;"	d
DAVINCI_SPI0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SPI0_BASE	/;"	d
DAVINCI_SPI0_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^	DAVINCI_SPI0_CLKID			= DAVINCI_PLL0_SYSCLK2,$/;"	e	enum:davinci_clk_ids
DAVINCI_SPI1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SPI1_BASE	/;"	d
DAVINCI_SPI1_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SPI1_CLKID	/;"	d
DAVINCI_SPI_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SPI_BASE	/;"	d
DAVINCI_SYSCFG1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG1_BASE	/;"	d
DAVINCI_SYSCFG_SUSPSRC_EMAC	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_EMAC	/;"	d
DAVINCI_SYSCFG_SUSPSRC_I2C	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_I2C	/;"	d
DAVINCI_SYSCFG_SUSPSRC_SPI0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_SPI0	/;"	d
DAVINCI_SYSCFG_SUSPSRC_SPI1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_SPI1	/;"	d
DAVINCI_SYSCFG_SUSPSRC_TIMER0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_TIMER0	/;"	d
DAVINCI_SYSCFG_SUSPSRC_UART0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_UART0	/;"	d
DAVINCI_SYSCFG_SUSPSRC_UART1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_UART1	/;"	d
DAVINCI_SYSCFG_SUSPSRC_UART2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSCFG_SUSPSRC_UART2	/;"	d
DAVINCI_SYSTEM_MODULE_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_SYSTEM_MODULE_BASE	/;"	d
DAVINCI_TIMER0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_TIMER0_BASE	/;"	d
DAVINCI_TIMER1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_TIMER1_BASE	/;"	d
DAVINCI_TIMER2_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_TIMER2_BASE	/;"	d
DAVINCI_TIMER3_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_TIMER3_BASE	/;"	d
DAVINCI_TIMER4_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_TIMER4_BASE	/;"	d
DAVINCI_UART0_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART0_BASE	/;"	d
DAVINCI_UART0_CTRL_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART0_CTRL_ADDR /;"	d
DAVINCI_UART1_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART1_BASE	/;"	d
DAVINCI_UART1_CTRL_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART1_CTRL_ADDR /;"	d
DAVINCI_UART2_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART2_BASE	/;"	d
DAVINCI_UART2_CLKID	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART2_CLKID	/;"	d
DAVINCI_UART2_CTRL_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART2_CTRL_ADDR /;"	d
DAVINCI_UART_CTRL_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART_CTRL_BASE /;"	d
DAVINCI_UART_PWREMU_MGMT_FREE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART_PWREMU_MGMT_FREE	/;"	d
DAVINCI_UART_PWREMU_MGMT_URRST	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART_PWREMU_MGMT_URRST	/;"	d
DAVINCI_UART_PWREMU_MGMT_UTRST	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UART_PWREMU_MGMT_UTRST	/;"	d
DAVINCI_UHPI_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_UHPI_BASE	/;"	d
DAVINCI_USB0_BASE	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB0_BASE /;"	d
DAVINCI_USB_OTG_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_USB_OTG_BASE	/;"	d
DAVINCI_USB_RXINT_MASK	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_RXINT_MASK /;"	d
DAVINCI_USB_RXINT_SHIFT	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_RXINT_SHIFT /;"	d
DAVINCI_USB_RX_ENDPTS_MASK	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_RX_ENDPTS_MASK	/;"	d
DAVINCI_USB_TIMEOUT	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_TIMEOUT /;"	d
DAVINCI_USB_TXINT_MASK	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_TXINT_MASK /;"	d
DAVINCI_USB_TXINT_SHIFT	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_TXINT_SHIFT /;"	d
DAVINCI_USB_TX_ENDPTS_MASK	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_TX_ENDPTS_MASK	/;"	d
DAVINCI_USB_USBINT_MASK	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_USBINT_MASK /;"	d
DAVINCI_USB_USBINT_SHIFT	drivers/usb/musb/davinci.h	/^#define DAVINCI_USB_USBINT_SHIFT	/;"	d
DAVINCI_VLYNQ_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_VLYNQ_BASE	/;"	d
DAVINCI_VLYNQ_REMOTE_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_VLYNQ_REMOTE_BASE	/;"	d
DAVINCI_VPSS_REGS_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_VPSS_REGS_BASE	/;"	d
DAVINCI_WDOG_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DAVINCI_WDOG_BASE	/;"	d
DAY	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	DAY	/;"	d
DAYSPERWEEK	include/linux/time.h	/^#define DAYSPERWEEK	/;"	d
DAYS_TO_SECS	drivers/rtc/bfin_rtc.c	/^#define DAYS_TO_SECS(/;"	d	file:
DAY_ALARM	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	DAY_ALARM	/;"	d
DA_0_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define DA_0_DS_OFFSET	/;"	d
DA_1_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define DA_1_DS_OFFSET	/;"	d
DA_2_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define DA_2_DS_OFFSET	/;"	d
DA_3_DS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define DA_3_DS_OFFSET	/;"	d
DA_BUCKCORE_VBCORE_1_250V	include/dialog_pmic.h	/^#define DA_BUCKCORE_VBCORE_1_250V	/;"	d
DB	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^#define DB(/;"	d	file:
DB	drivers/bios_emulator/biosemui.h	/^#define DB(/;"	d
DB	drivers/bios_emulator/include/x86emu/debug.h	/^#define DB(/;"	d
DB	drivers/ddr/marvell/a38x/xor.c	/^#define DB(/;"	d	file:
DB1000_BCSR_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define DB1000_BCSR_ADDR /;"	d
DB1550_BCSR_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define DB1550_BCSR_ADDR /;"	d
DB1XX0_BCSR_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define DB1XX0_BCSR_ADDR /;"	d
DB381_GET_MODE_SLM1426_1427_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB381_GET_MODE_SLM1426_1427_ADDR /;"	d
DB8500_GPIO_AFSLA	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_AFSLA	/;"	d	file:
DB8500_GPIO_AFSLB	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_AFSLB	/;"	d	file:
DB8500_GPIO_DAT	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_DAT	/;"	d	file:
DB8500_GPIO_DATC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_DATC	/;"	d	file:
DB8500_GPIO_DATS	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_DATS	/;"	d	file:
DB8500_GPIO_DIR	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_DIR	/;"	d	file:
DB8500_GPIO_DIRC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_DIRC	/;"	d	file:
DB8500_GPIO_DIRS	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_DIRS	/;"	d	file:
DB8500_GPIO_FIMSC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_FIMSC	/;"	d	file:
DB8500_GPIO_FWIMSC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_FWIMSC	/;"	d	file:
DB8500_GPIO_IC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_IC	/;"	d	file:
DB8500_GPIO_IS	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_IS	/;"	d	file:
DB8500_GPIO_PDIS	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_PDIS	/;"	d	file:
DB8500_GPIO_RIMSC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_RIMSC	/;"	d	file:
DB8500_GPIO_RWIMSC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_RWIMSC	/;"	d	file:
DB8500_GPIO_SLPC	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_SLPC	/;"	d	file:
DB8500_GPIO_WKS	drivers/gpio/db8500_gpio.c	/^#define DB8500_GPIO_WKS	/;"	d	file:
DBACEN_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBACEN_A:		.long	0xFE800010$/;"	l
DBACEN_A	board/renesas/r0p7734/lowlevel_init.S	/^DBACEN_A:		.long	0xFE800010$/;"	l
DBACEN_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBACEN_A:	.long	0xfe800010$/;"	l
DBACEN_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBACEN_A:	.long	0xfe800010$/;"	l
DBACEN_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBACEN_A:	.long	0xfe800010$/;"	l
DBACEN_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBACEN_D:		.long	0x00000001$/;"	l
DBACEN_D	board/renesas/r0p7734/lowlevel_init.S	/^DBACEN_D:		.long	0x00000001$/;"	l
DBACEN_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBACEN_D:	.long	0x00000001$/;"	l
DBACEN_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBACEN_D:	.long	0x00000001$/;"	l
DBACEN_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBACEN_D:	.long	0x00000001$/;"	l
DBADJ0_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBADJ0_A:	.long	0xfe8000c0$/;"	l
DBADJ0_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBADJ0_A:	.long	0xfe8000c0$/;"	l
DBADJ0_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBADJ0_A:	.long	0xfe8000c0$/;"	l
DBADJ0_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBADJ0_D:	.long	0x00000000$/;"	l
DBADJ0_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBADJ0_D:	.long	0x00010000$/;"	l
DBADJ0_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBADJ0_D:	.long	0x00000000$/;"	l
DBADJ1_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBADJ1_A:	.long	0xfe8000c4$/;"	l
DBADJ1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBADJ1_A:	.long	0xfe8000c4$/;"	l
DBADJ1_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBADJ1_D:	.long	0x00000000$/;"	l
DBADJ1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBADJ1_D:	.long	0x00000000$/;"	l
DBADJ2_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBADJ2_A:	.long	0xfe8000c8$/;"	l
DBADJ2_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBADJ2_A:	.long	0xfe8000c8$/;"	l
DBADJ2_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBADJ2_A:	.long	0xfe8000c8$/;"	l
DBADJ2_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBADJ2_D:	.long	0x18061806$/;"	l
DBADJ2_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBADJ2_D:	.long	0x18061806$/;"	l
DBADJ2_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBADJ2_D:	.long	0x18061806$/;"	l
DBAR1	include/SA-1100.h	/^#define DBAR1	/;"	d
DBAR2	include/SA-1100.h	/^#define DBAR2	/;"	d
DBASE_HIGH	include/ns87308.h	/^#define DBASE_HIGH	/;"	d
DBASE_LOW	include/ns87308.h	/^#define DBASE_LOW	/;"	d
DBAT0	arch/powerpc/include/asm/mmu.h	/^	DBAT0, DBAT1, DBAT2, DBAT3,$/;"	e	enum:__anon7751fa290103
DBAT0L	arch/powerpc/include/asm/processor.h	/^#define DBAT0L	/;"	d
DBAT0U	arch/powerpc/include/asm/processor.h	/^#define DBAT0U	/;"	d
DBAT1	arch/powerpc/include/asm/mmu.h	/^	DBAT0, DBAT1, DBAT2, DBAT3,$/;"	e	enum:__anon7751fa290103
DBAT1L	arch/powerpc/include/asm/processor.h	/^#define DBAT1L	/;"	d
DBAT1U	arch/powerpc/include/asm/processor.h	/^#define DBAT1U	/;"	d
DBAT2	arch/powerpc/include/asm/mmu.h	/^	DBAT0, DBAT1, DBAT2, DBAT3,$/;"	e	enum:__anon7751fa290103
DBAT2L	arch/powerpc/include/asm/processor.h	/^#define DBAT2L	/;"	d
DBAT2U	arch/powerpc/include/asm/processor.h	/^#define DBAT2U	/;"	d
DBAT3	arch/powerpc/include/asm/mmu.h	/^	DBAT0, DBAT1, DBAT2, DBAT3,$/;"	e	enum:__anon7751fa290103
DBAT3L	arch/powerpc/include/asm/processor.h	/^#define DBAT3L	/;"	d
DBAT3U	arch/powerpc/include/asm/processor.h	/^#define DBAT3U	/;"	d
DBAT4	arch/powerpc/include/asm/mmu.h	/^	DBAT4, DBAT5, DBAT6, DBAT7$/;"	e	enum:__anon7751fa290103
DBAT4L	arch/powerpc/include/asm/processor.h	/^#define DBAT4L	/;"	d
DBAT4U	arch/powerpc/include/asm/processor.h	/^#define DBAT4U	/;"	d
DBAT5	arch/powerpc/include/asm/mmu.h	/^	DBAT4, DBAT5, DBAT6, DBAT7$/;"	e	enum:__anon7751fa290103
DBAT5L	arch/powerpc/include/asm/processor.h	/^#define DBAT5L	/;"	d
DBAT5U	arch/powerpc/include/asm/processor.h	/^#define DBAT5U	/;"	d
DBAT6	arch/powerpc/include/asm/mmu.h	/^	DBAT4, DBAT5, DBAT6, DBAT7$/;"	e	enum:__anon7751fa290103
DBAT6L	arch/powerpc/include/asm/processor.h	/^#define DBAT6L	/;"	d
DBAT6U	arch/powerpc/include/asm/processor.h	/^#define DBAT6U	/;"	d
DBAT7	arch/powerpc/include/asm/mmu.h	/^	DBAT4, DBAT5, DBAT6, DBAT7$/;"	e	enum:__anon7751fa290103
DBAT7L	arch/powerpc/include/asm/processor.h	/^#define DBAT7L	/;"	d
DBAT7U	arch/powerpc/include/asm/processor.h	/^#define DBAT7U	/;"	d
DBAU1100	board/dbau1x00/Kconfig	/^config DBAU1100$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
DBAU1500	board/dbau1x00/Kconfig	/^config DBAU1500$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
DBAU1550	board/dbau1x00/Kconfig	/^config DBAU1550$/;"	c	choice:dbau1x00 board options""choicec40c90d10104
DBBL_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBBL_A:	.long	0xFE8000B0$/;"	l
DBBL_A	board/renesas/r0p7734/lowlevel_init.S	/^DBBL_A:	.long	0xFE8000B0$/;"	l
DBBL_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBBL_D:	.long	0x00000000$/;"	l
DBBL_D	board/renesas/r0p7734/lowlevel_init.S	/^DBBL_D:	.long	0x00000000$/;"	l
DBBS0CNT1_A	board/renesas/r0p7734/lowlevel_init.S	/^DBBS0CNT1_A:	.long	0xFE800304$/;"	l
DBBS0CNT1_D	board/renesas/r0p7734/lowlevel_init.S	/^DBBS0CNT1_D:	.long	0x00000000$/;"	l
DBC	include/sym53c8xx.h	/^#define DBC	/;"	d
DBCALCNF_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBCALCNF_A:	.long	0xfe8000f4$/;"	l
DBCALCNF_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBCALCNF_A:	.long	0xfe8000f4$/;"	l
DBCALCNF_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCALCNF_A:	.long	0xfe8000f4$/;"	l
DBCALCNF_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBCALCNF_D:	.long	0x0000ffff$/;"	l
DBCALCNF_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBCALCNF_D:	.long	0x0000ffff$/;"	l
DBCALCNF_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCALCNF_D:	.long	0x0000ffff$/;"	l
DBCALTR_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBCALTR_A:	.long	0xfe8000f8$/;"	l
DBCALTR_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBCALTR_D:	.long	0x08200820$/;"	l
DBCKECNT	arch/sh/include/asm/cpu_sh7724.h	/^#define DBCKECNT	/;"	d
DBCKECNT_A	board/renesas/ecovec/lowlevel_init.S	/^DBCKECNT_A:	.long	DBCKECNT$/;"	l
DBCKECNT_D	board/renesas/ecovec/lowlevel_init.S	/^DBCKECNT_D:	.long	0x00000001$/;"	l
DBCMDCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define DBCMDCNT	/;"	d
DBCMDCNT_A	board/renesas/ecovec/lowlevel_init.S	/^DBCMDCNT_A:	.long	DBCMDCNT$/;"	l
DBCMD_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_A:		.long	0xFE800018$/;"	l
DBCMD_A	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_A:		.long	0xFE800018$/;"	l
DBCMD_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_A:	.long	0xfe800018$/;"	l
DBCMD_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_A:	.long	0xfe800018$/;"	l
DBCMD_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_A:	.long	0xfe800018$/;"	l
DBCMD_D0_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D0_400:	.long	0x11000050$/;"	l
DBCMD_D0_400	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D0_400:	.long	0x11000050$/;"	l
DBCMD_D0_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D0_533:	.long	0x1100006B$/;"	l
DBCMD_D0_533	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D0_533:	.long	0x1100006B$/;"	l
DBCMD_D1	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D1:		.long	0x0B000000$/;"	l
DBCMD_D1	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D1:		.long	0x0B000000 \/* common value *\/$/;"	l
DBCMD_D10	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D10:		.long	0x000000C8$/;"	l
DBCMD_D10	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D10:		.long	0x000000C8 \/* common value *\/$/;"	l
DBCMD_D11	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D11:		.long	0x290023C4$/;"	l
DBCMD_D11	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D11:		.long	0x29002384 \/* common value *\/$/;"	l
DBCMD_D12	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D12:		.long	0x29002004$/;"	l
DBCMD_D12	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D12:		.long	0x29002004 \/* common value *\/$/;"	l
DBCMD_D2	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D2:		.long	0x2A004000$/;"	l
DBCMD_D2	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D2:		.long	0x2A004000 \/* common value *\/$/;"	l
DBCMD_D3	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D3:		.long	0x2B006000$/;"	l
DBCMD_D3	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D3:		.long	0x2B006000 \/* common value *\/$/;"	l
DBCMD_D4	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D4:		.long	0x29002044$/;"	l
DBCMD_D4	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D4:		.long	0x29002004 \/* common value *\/$/;"	l
DBCMD_D5_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D5_400:	.long	0x28000533$/;"	l
DBCMD_D5_400	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D5_400:	.long	0x28000533$/;"	l
DBCMD_D5_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D5_533:	.long	0x28000743$/;"	l
DBCMD_D5_533	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D5_533:	.long	0x28000743$/;"	l
DBCMD_D6	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D6:		.long	0x0B000000$/;"	l
DBCMD_D6	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D6:		.long	0x0B000000 \/* common value *\/$/;"	l
DBCMD_D7	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D7:		.long	0x0C000000$/;"	l
DBCMD_D7	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D7:		.long	0x0C000000 \/* common value *\/$/;"	l
DBCMD_D8	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D8:		.long	0x0C000000$/;"	l
DBCMD_D8	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D8:		.long	0x0C000000 \/* common value *\/$/;"	l
DBCMD_D9_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D9_400:	.long	0x28000433$/;"	l
DBCMD_D9_400	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D9_400:	.long	0x28000433$/;"	l
DBCMD_D9_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCMD_D9_533:	.long	0x28000643$/;"	l
DBCMD_D9_533	board/renesas/r0p7734/lowlevel_init.S	/^DBCMD_D9_533:	.long	0x28000643$/;"	l
DBCMD_MRS0_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_MRS0_VAL:	.long	0x28000930$/;"	l
DBCMD_MRS0_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_MRS0_VAL:	.long	0x28000930$/;"	l
DBCMD_MRS0_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_MRS0_VAL:	.long	0x28000930$/;"	l
DBCMD_MRS1_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_MRS1_VAL:	.long	0x29000004$/;"	l
DBCMD_MRS1_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_MRS1_VAL:	.long	0x29000004$/;"	l
DBCMD_MRS1_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_MRS1_VAL:	.long	0x29000004$/;"	l
DBCMD_MRS2_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_MRS2_VAL:	.long	0x2a000008$/;"	l
DBCMD_MRS2_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_MRS2_VAL:	.long	0x2a000008$/;"	l
DBCMD_MRS2_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_MRS2_VAL:	.long	0x2a000008$/;"	l
DBCMD_MRS3_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_MRS3_VAL:	.long	0x2b000000$/;"	l
DBCMD_MRS3_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_MRS3_VAL:	.long	0x2b000000$/;"	l
DBCMD_MRS3_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_MRS3_VAL:	.long	0x2b000000$/;"	l
DBCMD_PDEN_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_PDEN_VAL:	.long	0x1000d73c$/;"	l
DBCMD_PDEN_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_PDEN_VAL:	.long	0x1000d73c$/;"	l
DBCMD_PDEN_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_PDEN_VAL:	.long	0x1000d73c$/;"	l
DBCMD_PDXT_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_PDXT_VAL:	.long	0x110000c8$/;"	l
DBCMD_PDXT_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_PDXT_VAL:	.long	0x110000c8$/;"	l
DBCMD_PDXT_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_PDXT_VAL:	.long	0x110000c8$/;"	l
DBCMD_REF_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_REF_VAL:	.long	0x0c000000$/;"	l
DBCMD_REF_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_REF_VAL:	.long	0x0c000000$/;"	l
DBCMD_REF_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_REF_VAL:	.long	0x0c000000$/;"	l
DBCMD_RSTH_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_RSTH_VAL:	.long	0x2100d73c$/;"	l
DBCMD_RSTH_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_RSTH_VAL:	.long	0x2100d73c$/;"	l
DBCMD_RSTH_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_RSTH_VAL:	.long	0x2100d73c$/;"	l
DBCMD_RSTL_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_RSTL_VAL:	.long	0x20000000$/;"	l
DBCMD_RSTL_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_RSTL_VAL:	.long	0x20000000$/;"	l
DBCMD_RSTL_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_RSTL_VAL:	.long	0x20000000$/;"	l
DBCMD_SRXT_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_SRXT_VAL:	.long	0x19000000$/;"	l
DBCMD_SRXT_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_SRXT_VAL:	.long	0x19000000$/;"	l
DBCMD_SRXT_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_SRXT_VAL:	.long	0x19000000$/;"	l
DBCMD_WAIT_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_WAIT_VAL:	.long	0x0000d73c$/;"	l
DBCMD_WAIT_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_WAIT_VAL:	.long	0x0000d73c$/;"	l
DBCMD_WAIT_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_WAIT_VAL:	.long	0x0000d73c$/;"	l
DBCMD_ZQCL_VAL	board/renesas/sh7752evb/lowlevel_init.S	/^DBCMD_ZQCL_VAL:	.long	0x03000200$/;"	l
DBCMD_ZQCL_VAL	board/renesas/sh7753evb/lowlevel_init.S	/^DBCMD_ZQCL_VAL:	.long	0x03000200$/;"	l
DBCMD_ZQCL_VAL	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCMD_ZQCL_VAL:	.long	0x03000200$/;"	l
DBCONF	arch/sh/include/asm/cpu_sh7724.h	/^#define DBCONF	/;"	d
DBCONF_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCONF_A:	.long	0xFE800024$/;"	l
DBCONF_A	board/renesas/ecovec/lowlevel_init.S	/^DBCONF_A:	.long	DBCONF$/;"	l
DBCONF_A	board/renesas/r0p7734/lowlevel_init.S	/^DBCONF_A:	.long	0xFE800024$/;"	l
DBCONF_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBCONF_A:	.long	0xfe800024$/;"	l
DBCONF_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBCONF_A:	.long	0xfe800024$/;"	l
DBCONF_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCONF_A:	.long	0xfe800024$/;"	l
DBCONF_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBCONF_D:	.long	0x0D020A01$/;"	l
DBCONF_D	board/renesas/ecovec/lowlevel_init.S	/^DBCONF_D:	.long	0x015B0002$/;"	l
DBCONF_D	board/renesas/r0p7734/lowlevel_init.S	/^DBCONF_D:	.long	0x0D030A01$/;"	l
DBCONF_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBCONF_D:	.long	0x0f030a01$/;"	l
DBCONF_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBCONF_D:	.long	0x0f030a01$/;"	l
DBCONF_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBCONF_D:	.long	0x0f030a01$/;"	l
DBCR0	arch/powerpc/include/asm/processor.h	/^#define DBCR0	/;"	d
DBCR0_BT	include/bedbug/regs.h	/^#define DBCR0_BT	/;"	d
DBCR0_EDE	include/bedbug/regs.h	/^#define DBCR0_EDE	/;"	d
DBCR0_EDM	include/bedbug/regs.h	/^#define DBCR0_EDM	/;"	d
DBCR0_FT	include/bedbug/regs.h	/^#define DBCR0_FT	/;"	d
DBCR0_IA1	include/bedbug/regs.h	/^#define DBCR0_IA1	/;"	d
DBCR0_IA12	include/bedbug/regs.h	/^#define DBCR0_IA12	/;"	d
DBCR0_IA12T	include/bedbug/regs.h	/^#define DBCR0_IA12T	/;"	d
DBCR0_IA12X	include/bedbug/regs.h	/^#define DBCR0_IA12X	/;"	d
DBCR0_IA2	include/bedbug/regs.h	/^#define DBCR0_IA2	/;"	d
DBCR0_IA3	include/bedbug/regs.h	/^#define DBCR0_IA3	/;"	d
DBCR0_IA34	include/bedbug/regs.h	/^#define DBCR0_IA34	/;"	d
DBCR0_IA34T	include/bedbug/regs.h	/^#define DBCR0_IA34T	/;"	d
DBCR0_IA34X	include/bedbug/regs.h	/^#define DBCR0_IA34X	/;"	d
DBCR0_IA4	include/bedbug/regs.h	/^#define DBCR0_IA4	/;"	d
DBCR0_IC	include/bedbug/regs.h	/^#define DBCR0_IC	/;"	d
DBCR0_IDM	include/bedbug/regs.h	/^#define DBCR0_IDM	/;"	d
DBCR0_RST	include/bedbug/regs.h	/^#define DBCR0_RST	/;"	d
DBCR0_TDE	include/bedbug/regs.h	/^#define DBCR0_TDE	/;"	d
DBCR1	arch/powerpc/include/asm/processor.h	/^#define DBCR1	/;"	d
DBCR1_D1R	include/bedbug/regs.h	/^#define DBCR1_D1R	/;"	d
DBCR1_D1S	include/bedbug/regs.h	/^#define DBCR1_D1S	/;"	d
DBCR1_D1W	include/bedbug/regs.h	/^#define DBCR1_D1W	/;"	d
DBCR1_D2R	include/bedbug/regs.h	/^#define DBCR1_D2R	/;"	d
DBCR1_D2S	include/bedbug/regs.h	/^#define DBCR1_D2S	/;"	d
DBCR1_D2W	include/bedbug/regs.h	/^#define DBCR1_D2W	/;"	d
DBCR1_DA12	include/bedbug/regs.h	/^#define DBCR1_DA12	/;"	d
DBCR1_DA12X	include/bedbug/regs.h	/^#define DBCR1_DA12X	/;"	d
DBCR1_DV1BE	include/bedbug/regs.h	/^#define DBCR1_DV1BE	/;"	d
DBCR1_DV1M	include/bedbug/regs.h	/^#define DBCR1_DV1M	/;"	d
DBCR1_DV2BE	include/bedbug/regs.h	/^#define DBCR1_DV2BE	/;"	d
DBCR1_DV2M	include/bedbug/regs.h	/^#define DBCR1_DV2M	/;"	d
DBCR2	arch/powerpc/include/asm/processor.h	/^#define DBCR2	/;"	d
DBCR_BT	arch/powerpc/include/asm/processor.h	/^#define   DBCR_BT	/;"	d
DBCR_D1R	arch/powerpc/include/asm/processor.h	/^#define   DBCR_D1R	/;"	d
DBCR_D1S	arch/powerpc/include/asm/processor.h	/^#define   DBCR_D1S(/;"	d
DBCR_D1W	arch/powerpc/include/asm/processor.h	/^#define   DBCR_D1W	/;"	d
DBCR_D2R	arch/powerpc/include/asm/processor.h	/^#define   DBCR_D2R	/;"	d
DBCR_D2S	arch/powerpc/include/asm/processor.h	/^#define   DBCR_D2S(/;"	d
DBCR_D2W	arch/powerpc/include/asm/processor.h	/^#define   DBCR_D2W	/;"	d
DBCR_EDE	arch/powerpc/include/asm/processor.h	/^#define   DBCR_EDE	/;"	d
DBCR_EDM	arch/powerpc/include/asm/processor.h	/^#define   DBCR_EDM	/;"	d
DBCR_FER	arch/powerpc/include/asm/processor.h	/^#define   DBCR_FER	/;"	d
DBCR_FT	arch/powerpc/include/asm/processor.h	/^#define   DBCR_FT	/;"	d
DBCR_IA1	arch/powerpc/include/asm/processor.h	/^#define   DBCR_IA1	/;"	d
DBCR_IA2	arch/powerpc/include/asm/processor.h	/^#define   DBCR_IA2	/;"	d
DBCR_IC	arch/powerpc/include/asm/processor.h	/^#define   DBCR_IC	/;"	d
DBCR_IDM	arch/powerpc/include/asm/processor.h	/^#define   DBCR_IDM	/;"	d
DBCR_JII	arch/powerpc/include/asm/processor.h	/^#define   DBCR_JII	/;"	d
DBCR_JOI	arch/powerpc/include/asm/processor.h	/^#define   DBCR_JOI	/;"	d
DBCR_RST	arch/powerpc/include/asm/processor.h	/^#define   DBCR_RST(/;"	d
DBCR_RST_CHIP	arch/powerpc/include/asm/processor.h	/^#define     DBCR_RST_CHIP	/;"	d
DBCR_RST_CORE	arch/powerpc/include/asm/processor.h	/^#define     DBCR_RST_CORE	/;"	d
DBCR_RST_NONE	arch/powerpc/include/asm/processor.h	/^#define     DBCR_RST_NONE	/;"	d
DBCR_RST_SYSTEM	arch/powerpc/include/asm/processor.h	/^#define     DBCR_RST_SYSTEM	/;"	d
DBCR_SBT	arch/powerpc/include/asm/processor.h	/^#define   DBCR_SBT	/;"	d
DBCR_SDA	arch/powerpc/include/asm/processor.h	/^#define   DBCR_SDA	/;"	d
DBCR_SED	arch/powerpc/include/asm/processor.h	/^#define   DBCR_SED	/;"	d
DBCR_SIA	arch/powerpc/include/asm/processor.h	/^#define   DBCR_SIA	/;"	d
DBCR_STD	arch/powerpc/include/asm/processor.h	/^#define   DBCR_STD	/;"	d
DBCR_TDE	arch/powerpc/include/asm/processor.h	/^#define   DBCR_TDE	/;"	d
DBEN	arch/sh/include/asm/cpu_sh7724.h	/^#define DBEN	/;"	d
DBEN_A	board/renesas/ecovec/lowlevel_init.S	/^DBEN_A:		.long	DBEN$/;"	l
DBEN_D	board/renesas/ecovec/lowlevel_init.S	/^DBEN_D:		.long	0x01$/;"	l
DBF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	DBF	/;"	d
DBG	board/esd/common/fpga.c	/^#define DBG(/;"	d	file:
DBG	drivers/usb/gadget/at91_udc.h	/^#define DBG(/;"	d
DBG	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG(/;"	d
DBG	drivers/usb/gadget/ci_udc.c	/^#define DBG(/;"	d	file:
DBG	drivers/usb/gadget/mpc8xx_udc.c	/^#define DBG(/;"	d	file:
DBG	drivers/usb/gadget/storage_common.c	/^#define DBG(/;"	d	file:
DBG	drivers/usb/host/isp116x.h	/^#define DBG(/;"	d
DBGMD10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMD10_MARK,	DBGMD11_MARK,	DBGMD20_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGMD11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMD10_MARK,	DBGMD11_MARK,	DBGMD20_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGMD20_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMD10_MARK,	DBGMD11_MARK,	DBGMD20_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGMD21_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMD21_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGMDT0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMDT2_MARK,	DBGMDT1_MARK,	DBGMDT0_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGMDT1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMDT2_MARK,	DBGMDT1_MARK,	DBGMDT0_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGMDT2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DBGMDT2_MARK,	DBGMDT1_MARK,	DBGMDT0_MARK,$/;"	e	enum:__anona304c1340103	file:
DBGSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DBGSTAT /;"	d
DBG_ALL	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_ALL	/;"	d
DBG_BASE_ADDR	board/freescale/mx35pdk/mx35pdk.h	/^#define DBG_BASE_ADDR	/;"	d
DBG_BUS	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_BUS	/;"	d
DBG_CSCR_A_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define DBG_CSCR_A_CONFIG	/;"	d
DBG_CSCR_L_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define DBG_CSCR_L_CONFIG	/;"	d
DBG_CSCR_U_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define DBG_CSCR_U_CONFIG	/;"	d
DBG_CTL_AUTO_ARM	include/MCD_dma.h	/^#define DBG_CTL_AUTO_ARM	/;"	d
DBG_CTL_BLOCK_TASKS_MASK	include/MCD_dma.h	/^#define DBG_CTL_BLOCK_TASKS_MASK	/;"	d
DBG_CTL_BREAK	include/MCD_dma.h	/^#define DBG_CTL_BREAK	/;"	d
DBG_CTL_COMP1_TASK	drivers/dma/MCD_dmaApi.c	/^#define DBG_CTL_COMP1_TASK	/;"	d	file:
DBG_CTL_COMP1_TYP_MASK	include/MCD_dma.h	/^#define DBG_CTL_COMP1_TYP_MASK	/;"	d
DBG_CTL_COMP2_TYP_MASK	include/MCD_dma.h	/^#define DBG_CTL_COMP2_TYP_MASK	/;"	d
DBG_CTL_DISABLE	drivers/dma/MCD_dmaApi.c	/^#define DBG_CTL_DISABLE	/;"	d	file:
DBG_CTL_ENABLE	drivers/dma/MCD_dmaApi.c	/^#define DBG_CTL_ENABLE	/;"	d	file:
DBG_CTL_EXT_BREAK	include/MCD_dma.h	/^#define DBG_CTL_EXT_BREAK	/;"	d
DBG_CTL_INT_BREAK	include/MCD_dma.h	/^#define DBG_CTL_INT_BREAK	/;"	d
DBG_DMA	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_DMA	/;"	d
DBG_ERR	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_ERR	/;"	d
DBG_FIFO	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_FIFO	/;"	d
DBG_GADGET	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_GADGET	/;"	d
DBG_HW	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_HW	/;"	d
DBG_INT	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_INT	/;"	d
DBG_KEY_BUF_LEN	fs/ubifs/debug.h	/^#define DBG_KEY_BUF_LEN /;"	d
DBG_KILL_ALL_STAT	drivers/dma/MCD_dmaApi.c	/^#define DBG_KILL_ALL_STAT	/;"	d	file:
DBG_LEAVE_DSPS_ON	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DBG_LEAVE_DSPS_ON	/;"	d
DBG_MPDB	arch/arm/include/asm/arch-am33xx/mem.h	/^#define DBG_MPDB	/;"	d
DBG_MPDB	arch/arm/include/asm/arch-omap3/mem.h	/^#define DBG_MPDB	/;"	d
DBG_MPDB_BASE	arch/arm/include/asm/arch-omap3/mem.h	/^#define DBG_MPDB_BASE	/;"	d
DBG_NONE	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_NONE	/;"	d
DBG_POLL_CHECK	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define DBG_POLL_CHECK(/;"	d
DBG_POLL_START	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define DBG_POLL_START(/;"	d
DBG_QUEUE	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_QUEUE	/;"	d
DBG_REQ	drivers/usb/gadget/atmel_usba_udc.h	/^#define DBG_REQ	/;"	d
DBG_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBG_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DBG_RESET	/;"	d
DBKIND	arch/sh/include/asm/cpu_sh7724.h	/^#define DBKIND	/;"	d
DBKIND_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBKIND_A:	.long	0xFE800020$/;"	l
DBKIND_A	board/renesas/ecovec/lowlevel_init.S	/^DBKIND_A:	.long	DBKIND$/;"	l
DBKIND_A	board/renesas/r0p7734/lowlevel_init.S	/^DBKIND_A:	.long	0xFE800020$/;"	l
DBKIND_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBKIND_A:	.long	0xfe800020$/;"	l
DBKIND_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBKIND_A:	.long	0xfe800020$/;"	l
DBKIND_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBKIND_A:	.long	0xfe800020$/;"	l
DBKIND_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBKIND_D:	.long	0x00000005$/;"	l
DBKIND_D	board/renesas/ecovec/lowlevel_init.S	/^DBKIND_D:	.long	0x00000005$/;"	l
DBKIND_D	board/renesas/r0p7734/lowlevel_init.S	/^DBKIND_D:	.long	0x00000005$/;"	l
DBKIND_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBKIND_D:	.long	0x00000007$/;"	l
DBKIND_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBKIND_D:	.long	0x00000007$/;"	l
DBKIND_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBKIND_D:	.long	0x00000007$/;"	l
DBK_1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DBK_1	/;"	d
DBK_2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DBK_2	/;"	d
DBLAC_BURST_CAP16	drivers/net/ftmac110.h	/^#define DBLAC_BURST_CAP16 /;"	d
DBLAC_BURST_CAP4	drivers/net/ftmac110.h	/^#define DBLAC_BURST_CAP4 /;"	d
DBLAC_BURST_CAP8	drivers/net/ftmac110.h	/^#define DBLAC_BURST_CAP8 /;"	d
DBLAC_BURST_MAX_32X4	drivers/net/ftmac110.h	/^#define DBLAC_BURST_MAX_32X4 /;"	d
DBLAC_BURST_MAX_64X4	drivers/net/ftmac110.h	/^#define DBLAC_BURST_MAX_64X4 /;"	d
DBLAC_BURST_MAX_ANY	drivers/net/ftmac110.h	/^#define DBLAC_BURST_MAX_ANY /;"	d
DBLAC_DEFAULT	drivers/net/ftmac110.h	/^#define DBLAC_DEFAULT /;"	d
DBLAC_RXTHR_EN	drivers/net/ftmac110.h	/^#define DBLAC_RXTHR_EN /;"	d
DBLAC_RXTHR_HIGH	drivers/net/ftmac110.h	/^#define DBLAC_RXTHR_HIGH(/;"	d
DBLAC_RXTHR_LOW	drivers/net/ftmac110.h	/^#define DBLAC_RXTHR_LOW(/;"	d
DBLEN	include/sym53c8xx.h	/^	#define   DBLEN /;"	d
DBLSEL	include/sym53c8xx.h	/^	#define   DBLSEL /;"	d
DBMRCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define DBMRCNT	/;"	d
DBMRCNT_A	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_A:	.long	DBMRCNT$/;"	l
DBMRCNT_D0	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D0:	.long	0x00020000$/;"	l
DBMRCNT_D1	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D1:	.long	0x00030000$/;"	l
DBMRCNT_D2	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D2:	.long	0x00010040$/;"	l
DBMRCNT_D3	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D3:	.long	0x00000532$/;"	l
DBMRCNT_D4	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D4:	.long	0x00000432$/;"	l
DBMRCNT_D5	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D5:	.long	0x000103C0$/;"	l
DBMRCNT_D6	board/renesas/ecovec/lowlevel_init.S	/^DBMRCNT_D6:	.long	0x00010040$/;"	l
DBOFF_MASK	drivers/usb/host/xhci.h	/^#define	DBOFF_MASK	/;"	d
DBOSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DBOSR /;"	d
DBPDCNT0	arch/sh/include/asm/cpu_sh7724.h	/^#define DBPDCNT0	/;"	d
DBPDCNT0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT0_A:		.long	0xFE800200$/;"	l
DBPDCNT0_A	board/renesas/ecovec/lowlevel_init.S	/^DBPDCNT0_A:	.long	DBPDCNT0$/;"	l
DBPDCNT0_A	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT0_A:		.long	0xFE800200$/;"	l
DBPDCNT0_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT0_A:	.long	0xfe800200$/;"	l
DBPDCNT0_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT0_A:	.long	0xfe800200$/;"	l
DBPDCNT0_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT0_A:	.long	0xfe800200$/;"	l
DBPDCNT0_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT0_D:	.long	0x00000001$/;"	l
DBPDCNT0_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT0_D:	.long	0x00000001$/;"	l
DBPDCNT0_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT0_D:	.long	0x00000001$/;"	l
DBPDCNT0_D0	board/renesas/ecovec/lowlevel_init.S	/^DBPDCNT0_D0: .long	0x00000181$/;"	l
DBPDCNT0_D1	board/renesas/ecovec/lowlevel_init.S	/^DBPDCNT0_D1: .long	0x00000080$/;"	l
DBPDCNT0_D_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT0_D_400:	.long	0x00010235$/;"	l
DBPDCNT0_D_400	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT0_D_400:	.long	0x00010235$/;"	l
DBPDCNT0_D_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT0_D_533:	.long	0x00010245$/;"	l
DBPDCNT0_D_533	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT0_D_533:	.long	0x00010245$/;"	l
DBPDCNT1_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT1_A:		.long	0xFE800204$/;"	l
DBPDCNT1_A	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT1_A:		.long	0xFE800204$/;"	l
DBPDCNT1_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT1_A:	.long	0xfe800204$/;"	l
DBPDCNT1_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT1_A:	.long	0xfe800204$/;"	l
DBPDCNT1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT1_A:	.long	0xfe800204$/;"	l
DBPDCNT1_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT1_D:		.long	0x00000014$/;"	l
DBPDCNT1_D	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT1_D:		.long	0x00000014$/;"	l
DBPDCNT1_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT1_D:	.long	0x00000001$/;"	l
DBPDCNT1_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT1_D:	.long	0x00000001$/;"	l
DBPDCNT1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT1_D:	.long	0x00000001$/;"	l
DBPDCNT2_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT2_A:	.long	0xfe800208$/;"	l
DBPDCNT2_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT2_A:	.long	0xfe800208$/;"	l
DBPDCNT2_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT2_A:	.long	0xfe800208$/;"	l
DBPDCNT2_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT2_D:	.long	0x00000000$/;"	l
DBPDCNT2_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT2_D:	.long	0x00000000$/;"	l
DBPDCNT2_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT2_D:	.long	0x00000000$/;"	l
DBPDCNT3_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_A:		.long	0xFE80020C$/;"	l
DBPDCNT3_A	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_A:		.long	0xFE80020C$/;"	l
DBPDCNT3_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT3_A:	.long	0xfe80020c$/;"	l
DBPDCNT3_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT3_A:	.long	0xfe80020c$/;"	l
DBPDCNT3_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT3_A:	.long	0xfe80020c$/;"	l
DBPDCNT3_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D:		.long	0x80000000$/;"	l
DBPDCNT3_D	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D:		.long	0x80000000$/;"	l
DBPDCNT3_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDCNT3_D:	.long	0x00004010$/;"	l
DBPDCNT3_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDCNT3_D:	.long	0x00004010$/;"	l
DBPDCNT3_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDCNT3_D:	.long	0x00004010$/;"	l
DBPDCNT3_D0	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D0:	.long	0x800F0000$/;"	l
DBPDCNT3_D0	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D0:	.long	0x800F0000$/;"	l
DBPDCNT3_D1	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D1:	.long	0x800F1000$/;"	l
DBPDCNT3_D1	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D1:	.long	0x800F1000$/;"	l
DBPDCNT3_D2	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D2:	.long	0x820F1000$/;"	l
DBPDCNT3_D2	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D2:	.long	0x820F1000$/;"	l
DBPDCNT3_D3	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D3:	.long	0x860F1000$/;"	l
DBPDCNT3_D3	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D3:	.long	0x860F1000$/;"	l
DBPDCNT3_D4	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D4:	.long	0x870F1000$/;"	l
DBPDCNT3_D4	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D4:	.long	0x870F1000$/;"	l
DBPDCNT3_D5	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D5:	.long	0x870F3000$/;"	l
DBPDCNT3_D5	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D5:	.long	0x870F3000$/;"	l
DBPDCNT3_D6	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBPDCNT3_D6:	.long	0x870F7000$/;"	l
DBPDCNT3_D6	board/renesas/r0p7734/lowlevel_init.S	/^DBPDCNT3_D6:	.long	0x870F7000$/;"	l
DBPDLCK_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDLCK_A:	.long	0xfe800280$/;"	l
DBPDLCK_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDLCK_A:	.long	0xfe800280$/;"	l
DBPDLCK_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDLCK_A:	.long	0xfe800280$/;"	l
DBPDLCK_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDLCK_D:	.long	0x0000a55a$/;"	l
DBPDLCK_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDLCK_D:	.long	0x0000a55a$/;"	l
DBPDLCK_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDLCK_D:	.long	0x0000a55a$/;"	l
DBPDNCNF_A	board/renesas/r0p7734/lowlevel_init.S	/^DBPDNCNF_A:		.long	0xFE800180$/;"	l
DBPDNCNF_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDNCNF_A:	.long	0xfe800180$/;"	l
DBPDNCNF_D	board/renesas/r0p7734/lowlevel_init.S	/^DBPDNCNF_D:		.long	0x00000200$/;"	l
DBPDNCNF_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDNCNF_D:	.long	0x00000001$/;"	l
DBPDRGA_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDRGA_A:	.long	0xfe800290$/;"	l
DBPDRGA_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDRGA_A:	.long	0xfe800290$/;"	l
DBPDRGA_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDRGA_A:	.long	0xfe800290$/;"	l
DBPDRGA_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDRGA_D:	.long	0x00000028$/;"	l
DBPDRGA_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDRGA_D:	.long	0x00000028$/;"	l
DBPDRGA_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDRGA_D:	.long	0x00000028$/;"	l
DBPDRGD_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDRGD_A:	.long	0xfe8002a0$/;"	l
DBPDRGD_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDRGD_A:	.long	0xfe8002a0$/;"	l
DBPDRGD_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDRGD_A:	.long	0xfe8002a0$/;"	l
DBPDRGD_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBPDRGD_D:	.long	0x00017100$/;"	l
DBPDRGD_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBPDRGD_D:	.long	0x00017100$/;"	l
DBPDRGD_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBPDRGD_D:	.long	0x00017100$/;"	l
DBREAKA	arch/xtensa/include/asm/regs.h	/^#define DBREAKA	/;"	d
DBREAKC	arch/xtensa/include/asm/regs.h	/^#define DBREAKC	/;"	d
DBREAKC_LOAD_BIT	arch/xtensa/include/asm/regs.h	/^#define DBREAKC_LOAD_BIT	/;"	d
DBREAKC_LOAD_MASK	arch/xtensa/include/asm/regs.h	/^#define DBREAKC_LOAD_MASK	/;"	d
DBREAKC_MASK_BIT	arch/xtensa/include/asm/regs.h	/^#define DBREAKC_MASK_BIT	/;"	d
DBREAKC_MASK_MASK	arch/xtensa/include/asm/regs.h	/^#define DBREAKC_MASK_MASK	/;"	d
DBREAKC_STOR_BIT	arch/xtensa/include/asm/regs.h	/^#define DBREAKC_STOR_BIT	/;"	d
DBREAKC_STOR_MASK	arch/xtensa/include/asm/regs.h	/^#define DBREAKC_STOR_MASK	/;"	d
DBRFCNF0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF0_A:		.long	0xFE8000E0$/;"	l
DBRFCNF0_A	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF0_A:		.long	0xFE8000E0$/;"	l
DBRFCNF0_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFCNF0_A:	.long	0xfe8000e0$/;"	l
DBRFCNF0_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFCNF0_A:	.long	0xfe8000e0$/;"	l
DBRFCNF0_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFCNF0_A:	.long	0xfe8000e0$/;"	l
DBRFCNF0_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF0_D:		.long	0x000001FF$/;"	l
DBRFCNF0_D	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF0_D:		.long	0x000001FF$/;"	l
DBRFCNF0_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFCNF0_D:	.long	0x000001ff$/;"	l
DBRFCNF0_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFCNF0_D:	.long	0x000001ff$/;"	l
DBRFCNF0_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFCNF0_D:	.long	0x000001ff$/;"	l
DBRFCNF1_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF1_A:		.long	0xFE8000E4$/;"	l
DBRFCNF1_A	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF1_A:		.long	0xFE8000E4$/;"	l
DBRFCNF1_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFCNF1_A:	.long	0xfe8000e4$/;"	l
DBRFCNF1_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFCNF1_A:	.long	0xfe8000e4$/;"	l
DBRFCNF1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFCNF1_A:	.long	0xfe8000e4$/;"	l
DBRFCNF1_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFCNF1_D:	.long	0x08001000$/;"	l
DBRFCNF1_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFCNF1_D:	.long	0x00081040$/;"	l
DBRFCNF1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFCNF1_D:	.long	0x08001000$/;"	l
DBRFCNF1_D_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF1_D_400:	.long	0x00000618$/;"	l
DBRFCNF1_D_400	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF1_D_400:	.long	0x00000618$/;"	l
DBRFCNF1_D_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF1_D_533:	.long	0x00000805$/;"	l
DBRFCNF1_D_533	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF1_D_533:	.long	0x00000805$/;"	l
DBRFCNF2_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF2_A:		.long	0xFE8000E8$/;"	l
DBRFCNF2_A	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF2_A:		.long	0xFE8000E8$/;"	l
DBRFCNF2_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFCNF2_A:	.long	0xfe8000e8$/;"	l
DBRFCNF2_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFCNF2_A:	.long	0xfe8000e8$/;"	l
DBRFCNF2_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFCNF2_A:	.long	0xfe8000e8$/;"	l
DBRFCNF2_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFCNF2_D:		.long	0x00000000$/;"	l
DBRFCNF2_D	board/renesas/r0p7734/lowlevel_init.S	/^DBRFCNF2_D:		.long	0x00000000$/;"	l
DBRFCNF2_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFCNF2_D:	.long	0x00000000$/;"	l
DBRFCNF2_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFCNF2_D:	.long	0x00000000$/;"	l
DBRFCNF2_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFCNF2_D:	.long	0x00000000$/;"	l
DBRFEN_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFEN_A:		.long	0xFE800014$/;"	l
DBRFEN_A	board/renesas/r0p7734/lowlevel_init.S	/^DBRFEN_A:		.long	0xFE800014$/;"	l
DBRFEN_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFEN_A:	.long	0xfe800014$/;"	l
DBRFEN_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFEN_A:	.long	0xfe800014$/;"	l
DBRFEN_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFEN_A:	.long	0xfe800014$/;"	l
DBRFEN_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRFEN_D:		.long	0x00000001$/;"	l
DBRFEN_D	board/renesas/r0p7734/lowlevel_init.S	/^DBRFEN_D:		.long	0x00000001$/;"	l
DBRFEN_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBRFEN_D:	.long	0x00000001$/;"	l
DBRFEN_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBRFEN_D:	.long	0x00000001$/;"	l
DBRFEN_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRFEN_D:	.long	0x00000001$/;"	l
DBRFPDN0	arch/sh/include/asm/cpu_sh7724.h	/^#define DBRFPDN0	/;"	d
DBRFPDN0_A	board/renesas/ecovec/lowlevel_init.S	/^DBRFPDN0_A:	.long	DBRFPDN0$/;"	l
DBRFPDN0_D	board/renesas/ecovec/lowlevel_init.S	/^DBRFPDN0_D:	.long	0x00010000$/;"	l
DBRFPDN1	arch/sh/include/asm/cpu_sh7724.h	/^#define DBRFPDN1	/;"	d
DBRFPDN1_A	board/renesas/ecovec/lowlevel_init.S	/^DBRFPDN1_A:	.long	DBRFPDN1$/;"	l
DBRFPDN1_D	board/renesas/ecovec/lowlevel_init.S	/^DBRFPDN1_D:	.long	0x00000613$/;"	l
DBRFPDN2	arch/sh/include/asm/cpu_sh7724.h	/^#define DBRFPDN2	/;"	d
DBRFPDN2_A	board/renesas/ecovec/lowlevel_init.S	/^DBRFPDN2_A:	.long	DBRFPDN2$/;"	l
DBRFPDN2_D	board/renesas/ecovec/lowlevel_init.S	/^DBRFPDN2_D:	.long	0x238C003A$/;"	l
DBRFSTS	arch/sh/include/asm/cpu_sh7724.h	/^#define DBRFSTS	/;"	d
DBRNK0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRNK0_A:		.long	0xFE800100$/;"	l
DBRNK0_A	board/renesas/r0p7734/lowlevel_init.S	/^DBRNK0_A:		.long	0xFE800100$/;"	l
DBRNK0_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBRNK0_A:	.long	0xfe800100$/;"	l
DBRNK0_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBRNK0_A:	.long	0xfe800100$/;"	l
DBRNK0_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRNK0_A:	.long	0xfe800100$/;"	l
DBRNK0_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBRNK0_D:		.long	0x00000001$/;"	l
DBRNK0_D	board/renesas/r0p7734/lowlevel_init.S	/^DBRNK0_D:		.long	0x00000001$/;"	l
DBRNK0_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBRNK0_D:	.long	0x00000001$/;"	l
DBRNK0_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBRNK0_D:	.long	0x00000001$/;"	l
DBRNK0_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBRNK0_D:	.long	0x00000001$/;"	l
DBSA0	include/SA-1100.h	/^#define DBSA0	/;"	d
DBSA1	include/SA-1100.h	/^#define DBSA1	/;"	d
DBSA2	include/SA-1100.h	/^#define DBSA2	/;"	d
DBSA3	include/SA-1100.h	/^#define DBSA3	/;"	d
DBSA4	include/SA-1100.h	/^#define DBSA4	/;"	d
DBSA5	include/SA-1100.h	/^#define DBSA5	/;"	d
DBSB0	include/SA-1100.h	/^#define DBSB0	/;"	d
DBSB1	include/SA-1100.h	/^#define DBSB1	/;"	d
DBSB2	include/SA-1100.h	/^#define DBSB2	/;"	d
DBSB3	include/SA-1100.h	/^#define DBSB3	/;"	d
DBSB4	include/SA-1100.h	/^#define DBSB4	/;"	d
DBSB5	include/SA-1100.h	/^#define DBSB5	/;"	d
DBSC2_BASE	board/renesas/sh7785lcr/lowlevel_init.S	/^#define DBSC2_BASE	/;"	d	file:
DBSC2_DBCMDCNT_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBCMDCNT_A:	.long	DBSC2_BASE + 0x14$/;"	l
DBSC2_DBCMDCNT_D_CKE_H	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBCMDCNT_D_CKE_H:	.long	0x00000003$/;"	l
DBSC2_DBCMDCNT_D_PALL	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBCMDCNT_D_PALL:	.long	0x00000002$/;"	l
DBSC2_DBCMDCNT_D_REF	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBCMDCNT_D_REF:	.long	0x00000004$/;"	l
DBSC2_DBCONF_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBCONF_A:		.long	DBSC2_BASE + 0x20$/;"	l
DBSC2_DBCONF_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBCONF_D:		.long	0x00630002$/;"	l
DBSC2_DBEN_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBEN_A:		.long	DBSC2_BASE + 0x10$/;"	l
DBSC2_DBEN_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBEN_D:		.long	0x00000001$/;"	l
DBSC2_DBFREQ_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBFREQ_A:		.long	DBSC2_BASE + 0x50$/;"	l
DBSC2_DBFREQ_D1	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBFREQ_D1:	.long	0x00000000$/;"	l
DBSC2_DBFREQ_D2	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBFREQ_D2:	.long	0x00000100$/;"	l
DBSC2_DBMRCNT_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_A:	.long	DBSC2_BASE + 0x60$/;"	l
DBSC2_DBMRCNT_D_EMRS1_1	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_D_EMRS1_1:	.long	0x00010006$/;"	l
DBSC2_DBMRCNT_D_EMRS1_2	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_D_EMRS1_2:	.long	0x00010386$/;"	l
DBSC2_DBMRCNT_D_EMRS2	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_D_EMRS2:	.long	0x00020000$/;"	l
DBSC2_DBMRCNT_D_EMRS3	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_D_EMRS3:	.long	0x00030000$/;"	l
DBSC2_DBMRCNT_D_MRS_1	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_D_MRS_1:	.long	0x00000952$/;"	l
DBSC2_DBMRCNT_D_MRS_2	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBMRCNT_D_MRS_2:	.long	0x00000852$/;"	l
DBSC2_DBPDCNT0_D3	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBPDCNT0_D3:	.long	0x00000080$/;"	l
DBSC2_DBRFCNT0_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFCNT0_A:	.long	DBSC2_BASE + 0x40$/;"	l
DBSC2_DBRFCNT0_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFCNT0_D:	.long	0x00010000$/;"	l
DBSC2_DBRFCNT1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFCNT1_A:	.long	DBSC2_BASE + 0x44$/;"	l
DBSC2_DBRFCNT1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFCNT1_D:	.long	0x00000926$/;"	l
DBSC2_DBRFCNT2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFCNT2_A:	.long	DBSC2_BASE + 0x48$/;"	l
DBSC2_DBRFCNT2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFCNT2_D:	.long	0x00fe00fe$/;"	l
DBSC2_DBRFSTS_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBRFSTS_A:	.long	DBSC2_BASE + 0x4c$/;"	l
DBSC2_DBSTATE_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBSTATE_A:	.long	DBSC2_BASE + 0x0c$/;"	l
DBSC2_DBTR0_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBTR0_A:		.long	DBSC2_BASE + 0x30$/;"	l
DBSC2_DBTR0_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBTR0_D:		.long	0x050b1f04$/;"	l
DBSC2_DBTR1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBTR1_A:		.long	DBSC2_BASE + 0x34$/;"	l
DBSC2_DBTR1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBTR1_D:		.long	0x00040204$/;"	l
DBSC2_DBTR2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBTR2_A:		.long	DBSC2_BASE + 0x38$/;"	l
DBSC2_DBTR2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^DBSC2_DBTR2_D:		.long	0x02100308$/;"	l
DBSC3_00	board/renesas/alt/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_00	board/renesas/blanche/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_00	board/renesas/gose/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_00	board/renesas/koelsch/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_00	board/renesas/lager/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_00	board/renesas/porter/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_00	board/renesas/silk/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_00	board/renesas/stout/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_01	board/renesas/alt/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_01	board/renesas/blanche/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_01	board/renesas/gose/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_01	board/renesas/koelsch/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_01	board/renesas/lager/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_01	board/renesas/porter/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_01	board/renesas/silk/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_01	board/renesas/stout/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_02	board/renesas/alt/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_02	board/renesas/blanche/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_02	board/renesas/gose/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_02	board/renesas/koelsch/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_02	board/renesas/lager/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_02	board/renesas/porter/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_02	board/renesas/silk/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_02	board/renesas/stout/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_03	board/renesas/alt/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_03	board/renesas/blanche/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_03	board/renesas/gose/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_03	board/renesas/koelsch/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_03	board/renesas/lager/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_03	board/renesas/porter/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_03	board/renesas/silk/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_03	board/renesas/stout/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_04	board/renesas/alt/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_04	board/renesas/blanche/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_04	board/renesas/gose/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_04	board/renesas/koelsch/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_04	board/renesas/lager/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_04	board/renesas/porter/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_04	board/renesas/silk/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_04	board/renesas/stout/qos.c	/^	DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_05	board/renesas/alt/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_05	board/renesas/blanche/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_05	board/renesas/gose/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_05	board/renesas/koelsch/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_05	board/renesas/lager/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_05	board/renesas/porter/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_05	board/renesas/silk/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_05	board/renesas/stout/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_06	board/renesas/alt/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_06	board/renesas/blanche/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_06	board/renesas/gose/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_06	board/renesas/koelsch/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_06	board/renesas/lager/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_06	board/renesas/porter/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_06	board/renesas/silk/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_06	board/renesas/stout/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_07	board/renesas/alt/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_07	board/renesas/blanche/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_07	board/renesas/gose/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_07	board/renesas/koelsch/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_07	board/renesas/lager/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_07	board/renesas/porter/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_07	board/renesas/silk/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_07	board/renesas/stout/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_08	board/renesas/alt/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_08	board/renesas/blanche/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_08	board/renesas/gose/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_08	board/renesas/koelsch/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_08	board/renesas/lager/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_08	board/renesas/porter/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_08	board/renesas/silk/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_08	board/renesas/stout/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_09	board/renesas/alt/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_09	board/renesas/blanche/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_09	board/renesas/gose/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_09	board/renesas/koelsch/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_09	board/renesas/lager/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_09	board/renesas/porter/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_09	board/renesas/silk/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_09	board/renesas/stout/qos.c	/^	DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_BASE	/;"	d
DBSC3_0_DBADJ2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_DBADJ2	/;"	d
DBSC3_0_QOS_R0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R0_BASE	/;"	d
DBSC3_0_QOS_R10_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R10_BASE	/;"	d
DBSC3_0_QOS_R11_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R11_BASE	/;"	d
DBSC3_0_QOS_R12_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R12_BASE	/;"	d
DBSC3_0_QOS_R13_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R13_BASE	/;"	d
DBSC3_0_QOS_R14_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R14_BASE	/;"	d
DBSC3_0_QOS_R15_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R15_BASE	/;"	d
DBSC3_0_QOS_R1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R1_BASE	/;"	d
DBSC3_0_QOS_R2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R2_BASE	/;"	d
DBSC3_0_QOS_R3_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R3_BASE	/;"	d
DBSC3_0_QOS_R4_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R4_BASE	/;"	d
DBSC3_0_QOS_R5_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R5_BASE	/;"	d
DBSC3_0_QOS_R6_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R6_BASE	/;"	d
DBSC3_0_QOS_R7_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R7_BASE	/;"	d
DBSC3_0_QOS_R8_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R8_BASE	/;"	d
DBSC3_0_QOS_R9_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_R9_BASE	/;"	d
DBSC3_0_QOS_W0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W0_BASE	/;"	d
DBSC3_0_QOS_W10_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W10_BASE	/;"	d
DBSC3_0_QOS_W11_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W11_BASE	/;"	d
DBSC3_0_QOS_W12_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W12_BASE	/;"	d
DBSC3_0_QOS_W13_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W13_BASE	/;"	d
DBSC3_0_QOS_W14_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W14_BASE	/;"	d
DBSC3_0_QOS_W15_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W15_BASE	/;"	d
DBSC3_0_QOS_W1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W1_BASE	/;"	d
DBSC3_0_QOS_W2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W2_BASE	/;"	d
DBSC3_0_QOS_W3_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W3_BASE	/;"	d
DBSC3_0_QOS_W4_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W4_BASE	/;"	d
DBSC3_0_QOS_W5_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W5_BASE	/;"	d
DBSC3_0_QOS_W6_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W6_BASE	/;"	d
DBSC3_0_QOS_W7_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W7_BASE	/;"	d
DBSC3_0_QOS_W8_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W8_BASE	/;"	d
DBSC3_0_QOS_W9_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_0_QOS_W9_BASE	/;"	d
DBSC3_10	board/renesas/alt/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_10	board/renesas/blanche/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_10	board/renesas/gose/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_10	board/renesas/koelsch/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_10	board/renesas/lager/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_10	board/renesas/porter/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_10	board/renesas/silk/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_10	board/renesas/stout/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_11	board/renesas/alt/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_11	board/renesas/blanche/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_11	board/renesas/gose/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_11	board/renesas/koelsch/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_11	board/renesas/lager/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_11	board/renesas/porter/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_11	board/renesas/silk/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_11	board/renesas/stout/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_12	board/renesas/alt/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_12	board/renesas/blanche/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_12	board/renesas/gose/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_12	board/renesas/koelsch/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_12	board/renesas/lager/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_12	board/renesas/porter/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_12	board/renesas/silk/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_12	board/renesas/stout/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_13	board/renesas/alt/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_13	board/renesas/blanche/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_13	board/renesas/gose/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_13	board/renesas/koelsch/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_13	board/renesas/lager/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_13	board/renesas/porter/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_13	board/renesas/silk/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_13	board/renesas/stout/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_14	board/renesas/alt/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_14	board/renesas/blanche/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_14	board/renesas/gose/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_14	board/renesas/koelsch/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_14	board/renesas/lager/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_14	board/renesas/porter/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_14	board/renesas/silk/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_14	board/renesas/stout/qos.c	/^	DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_15	board/renesas/alt/qos.c	/^	DBSC3_15,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_15	board/renesas/blanche/qos.c	/^	DBSC3_15,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_15	board/renesas/gose/qos.c	/^	DBSC3_15,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_15	board/renesas/koelsch/qos.c	/^	DBSC3_15,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_15	board/renesas/lager/qos.c	/^	DBSC3_15,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_15	board/renesas/porter/qos.c	/^	DBSC3_15,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_15	board/renesas/silk/qos.c	/^	DBSC3_15,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_15	board/renesas/stout/qos.c	/^	DBSC3_15,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC3_1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DBSC3_1_BASE	/;"	d
DBSC3_1_DBADJ2	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_DBADJ2	/;"	d
DBSC3_1_DBADJ2	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_DBADJ2	/;"	d
DBSC3_1_QOS_R0_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R0_BASE	/;"	d
DBSC3_1_QOS_R0_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R0_BASE	/;"	d
DBSC3_1_QOS_R10_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R10_BASE	/;"	d
DBSC3_1_QOS_R10_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R10_BASE	/;"	d
DBSC3_1_QOS_R11_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R11_BASE	/;"	d
DBSC3_1_QOS_R11_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R11_BASE	/;"	d
DBSC3_1_QOS_R12_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R12_BASE	/;"	d
DBSC3_1_QOS_R12_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R12_BASE	/;"	d
DBSC3_1_QOS_R13_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R13_BASE	/;"	d
DBSC3_1_QOS_R13_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R13_BASE	/;"	d
DBSC3_1_QOS_R14_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R14_BASE	/;"	d
DBSC3_1_QOS_R14_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R14_BASE	/;"	d
DBSC3_1_QOS_R15_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R15_BASE	/;"	d
DBSC3_1_QOS_R15_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R15_BASE	/;"	d
DBSC3_1_QOS_R1_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R1_BASE	/;"	d
DBSC3_1_QOS_R1_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R1_BASE	/;"	d
DBSC3_1_QOS_R2_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R2_BASE	/;"	d
DBSC3_1_QOS_R2_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R2_BASE	/;"	d
DBSC3_1_QOS_R3_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R3_BASE	/;"	d
DBSC3_1_QOS_R3_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R3_BASE	/;"	d
DBSC3_1_QOS_R4_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R4_BASE	/;"	d
DBSC3_1_QOS_R4_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R4_BASE	/;"	d
DBSC3_1_QOS_R5_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R5_BASE	/;"	d
DBSC3_1_QOS_R5_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R5_BASE	/;"	d
DBSC3_1_QOS_R6_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R6_BASE	/;"	d
DBSC3_1_QOS_R6_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R6_BASE	/;"	d
DBSC3_1_QOS_R7_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R7_BASE	/;"	d
DBSC3_1_QOS_R7_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R7_BASE	/;"	d
DBSC3_1_QOS_R8_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R8_BASE	/;"	d
DBSC3_1_QOS_R8_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R8_BASE	/;"	d
DBSC3_1_QOS_R9_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_R9_BASE	/;"	d
DBSC3_1_QOS_R9_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_R9_BASE	/;"	d
DBSC3_1_QOS_W0_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W0_BASE	/;"	d
DBSC3_1_QOS_W0_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W0_BASE	/;"	d
DBSC3_1_QOS_W10_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W10_BASE	/;"	d
DBSC3_1_QOS_W10_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W10_BASE	/;"	d
DBSC3_1_QOS_W11_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W11_BASE	/;"	d
DBSC3_1_QOS_W11_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W11_BASE	/;"	d
DBSC3_1_QOS_W12_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W12_BASE	/;"	d
DBSC3_1_QOS_W12_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W12_BASE	/;"	d
DBSC3_1_QOS_W13_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W13_BASE	/;"	d
DBSC3_1_QOS_W13_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W13_BASE	/;"	d
DBSC3_1_QOS_W14_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W14_BASE	/;"	d
DBSC3_1_QOS_W14_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W14_BASE	/;"	d
DBSC3_1_QOS_W15_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W15_BASE	/;"	d
DBSC3_1_QOS_W15_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W15_BASE	/;"	d
DBSC3_1_QOS_W1_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W1_BASE	/;"	d
DBSC3_1_QOS_W1_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W1_BASE	/;"	d
DBSC3_1_QOS_W2_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W2_BASE	/;"	d
DBSC3_1_QOS_W2_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W2_BASE	/;"	d
DBSC3_1_QOS_W3_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W3_BASE	/;"	d
DBSC3_1_QOS_W3_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W3_BASE	/;"	d
DBSC3_1_QOS_W4_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W4_BASE	/;"	d
DBSC3_1_QOS_W4_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W4_BASE	/;"	d
DBSC3_1_QOS_W5_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W5_BASE	/;"	d
DBSC3_1_QOS_W5_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W5_BASE	/;"	d
DBSC3_1_QOS_W6_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W6_BASE	/;"	d
DBSC3_1_QOS_W6_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W6_BASE	/;"	d
DBSC3_1_QOS_W7_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W7_BASE	/;"	d
DBSC3_1_QOS_W7_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W7_BASE	/;"	d
DBSC3_1_QOS_W8_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W8_BASE	/;"	d
DBSC3_1_QOS_W8_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W8_BASE	/;"	d
DBSC3_1_QOS_W9_BASE	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define DBSC3_1_QOS_W9_BASE	/;"	d
DBSC3_1_QOS_W9_BASE	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define DBSC3_1_QOS_W9_BASE	/;"	d
DBSC3_NR	board/renesas/alt/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anonb8fb20100103	file:
DBSC3_NR	board/renesas/blanche/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anon640aef5c0103	file:
DBSC3_NR	board/renesas/gose/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anon04c97cbd0103	file:
DBSC3_NR	board/renesas/koelsch/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anon6006adb80103	file:
DBSC3_NR	board/renesas/lager/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anon160bee5a0103	file:
DBSC3_NR	board/renesas/porter/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anon727cb04b0103	file:
DBSC3_NR	board/renesas/silk/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anond26e3ea20103	file:
DBSC3_NR	board/renesas/stout/qos.c	/^	DBSC3_NR,$/;"	e	enum:__anon0a52f82e0103	file:
DBSC_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define DBSC_BASE	/;"	d
DBSR	arch/powerpc/include/asm/processor.h	/^#define DBSR	/;"	d
DBSR_IA1	include/bedbug/regs.h	/^#define DBSR_IA1	/;"	d
DBSR_IA2	include/bedbug/regs.h	/^#define DBSR_IA2	/;"	d
DBSR_IA3	include/bedbug/regs.h	/^#define DBSR_IA3	/;"	d
DBSR_IA4	include/bedbug/regs.h	/^#define DBSR_IA4	/;"	d
DBSR_IC	arch/powerpc/include/asm/processor.h	/^#define   DBSR_IC	/;"	d
DBSR_TIE	arch/powerpc/include/asm/processor.h	/^#define   DBSR_TIE	/;"	d
DBSTATE	arch/sh/include/asm/cpu_sh7724.h	/^#define DBSTATE	/;"	d
DBTA0	include/SA-1100.h	/^#define DBTA0	/;"	d
DBTA1	include/SA-1100.h	/^#define DBTA1	/;"	d
DBTA2	include/SA-1100.h	/^#define DBTA2	/;"	d
DBTA3	include/SA-1100.h	/^#define DBTA3	/;"	d
DBTA4	include/SA-1100.h	/^#define DBTA4	/;"	d
DBTA5	include/SA-1100.h	/^#define DBTA5	/;"	d
DBTA_TCA	include/SA-1100.h	/^#define DBTA_TCA	/;"	d
DBTB0	include/SA-1100.h	/^#define DBTB0	/;"	d
DBTB1	include/SA-1100.h	/^#define DBTB1	/;"	d
DBTB2	include/SA-1100.h	/^#define DBTB2	/;"	d
DBTB3	include/SA-1100.h	/^#define DBTB3	/;"	d
DBTB4	include/SA-1100.h	/^#define DBTB4	/;"	d
DBTB5	include/SA-1100.h	/^#define DBTB5	/;"	d
DBTB_TCB	include/SA-1100.h	/^#define DBTB_TCB	/;"	d
DBTOCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DBTOCR /;"	d
DBTOCR_CNT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DBTOCR_CNT(/;"	d
DBTOCR_EN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DBTOCR_EN /;"	d
DBTOSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DBTOSR /;"	d
DBTR0	arch/sh/include/asm/cpu_sh7724.h	/^#define DBTR0	/;"	d
DBTR0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR0_A:	.long	0xFE800040$/;"	l
DBTR0_A	board/renesas/ecovec/lowlevel_init.S	/^DBTR0_A:	.long 	DBTR0$/;"	l
DBTR0_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR0_A:	.long	0xFE800040$/;"	l
DBTR0_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR0_A:	.long	0xfe800040$/;"	l
DBTR0_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR0_A:	.long	0xfe800040$/;"	l
DBTR0_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR0_A:	.long	0xfe800040$/;"	l
DBTR0_D	board/renesas/ecovec/lowlevel_init.S	/^DBTR0_D:	.long 	0x03061502$/;"	l
DBTR0_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR0_D:	.long	0x00000007$/;"	l
DBTR0_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR0_D:	.long	0x00000007$/;"	l
DBTR0_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR0_D:	.long	0x00000007$/;"	l
DBTR1	arch/sh/include/asm/cpu_sh7724.h	/^#define DBTR1	/;"	d
DBTR10_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR10_A:	.long	0xFE80006C$/;"	l
DBTR10_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR10_A:	.long	0xFE80006C$/;"	l
DBTR10_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR10_A:	.long	0xfe80006c$/;"	l
DBTR10_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR10_A:	.long	0xfe80006c$/;"	l
DBTR10_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR10_A:	.long	0xfe80006c$/;"	l
DBTR10_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR10_D:	.long	0x00000008$/;"	l
DBTR10_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR10_D:	.long	0x00000008$/;"	l
DBTR10_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR10_D:	.long	0x00000008$/;"	l
DBTR11_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR11_A:	.long	0xFE800070$/;"	l
DBTR11_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR11_A:	.long	0xFE800070$/;"	l
DBTR11_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR11_A:	.long	0xfe800070$/;"	l
DBTR11_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR11_A:	.long	0xfe800070$/;"	l
DBTR11_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR11_A:	.long	0xfe800070$/;"	l
DBTR11_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR11_D:	.long	0x00000008$/;"	l
DBTR11_D	board/renesas/r0p7734/lowlevel_init.S	/^DBTR11_D:	.long	0x00000008 \/* common value *\/$/;"	l
DBTR11_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR11_D:	.long	0x00000007$/;"	l
DBTR11_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR11_D:	.long	0x00000007$/;"	l
DBTR11_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR11_D:	.long	0x00000007$/;"	l
DBTR12_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR12_A:	.long	0xFE800074$/;"	l
DBTR12_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR12_A:	.long	0xFE800074$/;"	l
DBTR12_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR12_A:	.long	0xfe800074$/;"	l
DBTR12_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR12_A:	.long	0xfe800074$/;"	l
DBTR12_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR12_A:	.long	0xfe800074$/;"	l
DBTR12_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR12_D:	.long	0x0000000e$/;"	l
DBTR12_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR12_D:	.long	0x0000000e$/;"	l
DBTR12_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR12_D:	.long	0x0000000e$/;"	l
DBTR13_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR13_A:	.long	0xFE800078$/;"	l
DBTR13_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR13_A:	.long	0xFE800078$/;"	l
DBTR13_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR13_A:	.long	0xfe800078$/;"	l
DBTR13_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR13_A:	.long	0xfe800078$/;"	l
DBTR13_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR13_A:	.long	0xfe800078$/;"	l
DBTR13_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR13_D:	.long	0x00000056$/;"	l
DBTR13_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR13_D:	.long	0x000000a0$/;"	l
DBTR13_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR13_D:	.long	0x00000056$/;"	l
DBTR14_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR14_A:	.long	0xFE80007C$/;"	l
DBTR14_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR14_A:	.long	0xFE80007C$/;"	l
DBTR14_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR14_A:	.long	0xfe80007c$/;"	l
DBTR14_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR14_A:	.long	0xfe80007c$/;"	l
DBTR14_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR14_A:	.long	0xfe80007c$/;"	l
DBTR14_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR14_D:	.long	0x00070002$/;"	l
DBTR14_D	board/renesas/r0p7734/lowlevel_init.S	/^DBTR14_D:	.long	0x00070002 \/* common value *\/$/;"	l
DBTR14_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR14_D:	.long	0x00000006$/;"	l
DBTR14_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR14_D:	.long	0x00060006$/;"	l
DBTR14_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR14_D:	.long	0x00000006$/;"	l
DBTR15_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR15_A:	.long	0xFE800080$/;"	l
DBTR15_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR15_A:	.long	0xFE800080$/;"	l
DBTR15_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR15_A:	.long	0xfe800080$/;"	l
DBTR15_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR15_A:	.long	0xfe800080$/;"	l
DBTR15_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR15_A:	.long	0xfe800080$/;"	l
DBTR15_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR15_D:	.long	0x00000003$/;"	l
DBTR15_D	board/renesas/r0p7734/lowlevel_init.S	/^DBTR15_D:	.long	0x00000003 \/* common value *\/$/;"	l
DBTR15_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR15_D:	.long	0x00000004$/;"	l
DBTR15_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR15_D:	.long	0x00000003$/;"	l
DBTR15_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR15_D:	.long	0x00000004$/;"	l
DBTR16_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR16_A:	.long	0xFE800084$/;"	l
DBTR16_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR16_A:	.long	0xFE800084$/;"	l
DBTR16_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR16_A:	.long	0xfe800084$/;"	l
DBTR16_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR16_A:	.long	0xfe800084$/;"	l
DBTR16_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR16_A:	.long	0xfe800084$/;"	l
DBTR16_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR16_D:	.long	0x00150002$/;"	l
DBTR16_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR16_D:	.long	0x00160002$/;"	l
DBTR16_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR16_D:	.long	0x00150002$/;"	l
DBTR17_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR17_A:	.long	0xFE800088$/;"	l
DBTR17_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR17_A:	.long	0xFE800088$/;"	l
DBTR17_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR17_A:	.long	0xfe800088$/;"	l
DBTR17_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR17_A:	.long	0xfe800088$/;"	l
DBTR17_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR17_A:	.long	0xfe800088$/;"	l
DBTR17_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR17_D:	.long	0x000c0017$/;"	l
DBTR17_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR17_D:	.long	0x000c0000$/;"	l
DBTR17_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR17_D:	.long	0x000c0017$/;"	l
DBTR18_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR18_A:	.long	0xFE80008C$/;"	l
DBTR18_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR18_A:	.long	0xFE80008C$/;"	l
DBTR18_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR18_A:	.long	0xfe80008c$/;"	l
DBTR18_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR18_A:	.long	0xfe80008c$/;"	l
DBTR18_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR18_A:	.long	0xfe80008c$/;"	l
DBTR18_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR18_D:	.long	0x00000200$/;"	l
DBTR18_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR18_D:	.long	0x00000200$/;"	l
DBTR18_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR18_D:	.long	0x00000200$/;"	l
DBTR19_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR19_A:	.long	0xfe800090$/;"	l
DBTR19_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR19_A:	.long	0xfe800090$/;"	l
DBTR19_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR19_A:	.long	0xfe800090$/;"	l
DBTR19_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR19_D:	.long	0x00000040$/;"	l
DBTR19_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR19_D:	.long	0x00000040$/;"	l
DBTR19_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR19_D:	.long	0x00000040$/;"	l
DBTR1_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR1_A:	.long	0xFE800044$/;"	l
DBTR1_A	board/renesas/ecovec/lowlevel_init.S	/^DBTR1_A:	.long	DBTR1$/;"	l
DBTR1_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR1_A:	.long	0xFE800044$/;"	l
DBTR1_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR1_A:	.long	0xfe800044$/;"	l
DBTR1_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR1_A:	.long	0xfe800044$/;"	l
DBTR1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR1_A:	.long	0xfe800044$/;"	l
DBTR1_D	board/renesas/ecovec/lowlevel_init.S	/^DBTR1_D:	.long	0x02020102$/;"	l
DBTR1_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR1_D:	.long	0x00000006$/;"	l
DBTR1_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR1_D:	.long	0x00000006$/;"	l
DBTR1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR1_D:	.long	0x00000006$/;"	l
DBTR2	arch/sh/include/asm/cpu_sh7724.h	/^#define DBTR2	/;"	d
DBTR2_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR2_A:	.long	0xFE800048$/;"	l
DBTR2_A	board/renesas/ecovec/lowlevel_init.S	/^DBTR2_A:	.long	DBTR2$/;"	l
DBTR2_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR2_A:	.long	0xFE800048$/;"	l
DBTR2_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR2_A:	.long	0xfe800048$/;"	l
DBTR2_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR2_A:	.long	0xfe800048$/;"	l
DBTR2_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR2_A:	.long	0xfe800048$/;"	l
DBTR2_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR2_D:	.long	0x00000000$/;"	l
DBTR2_D	board/renesas/ecovec/lowlevel_init.S	/^DBTR2_D:	.long	0x01090305$/;"	l
DBTR2_D	board/renesas/r0p7734/lowlevel_init.S	/^DBTR2_D:	.long	0x00000000$/;"	l
DBTR2_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR2_D:	.long	0x00000000$/;"	l
DBTR2_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR2_D:	.long	0x00000000$/;"	l
DBTR2_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR2_D:	.long	0x00000000$/;"	l
DBTR3	arch/sh/include/asm/cpu_sh7724.h	/^#define DBTR3	/;"	d
DBTR3_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR3_A:	.long	0xFE800050$/;"	l
DBTR3_A	board/renesas/ecovec/lowlevel_init.S	/^DBTR3_A:	.long	DBTR3$/;"	l
DBTR3_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR3_A:	.long	0xFE800050$/;"	l
DBTR3_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR3_A:	.long	0xfe800050$/;"	l
DBTR3_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR3_A:	.long	0xfe800050$/;"	l
DBTR3_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR3_A:	.long	0xfe800050$/;"	l
DBTR3_D	board/renesas/ecovec/lowlevel_init.S	/^DBTR3_D:	.long	0x00000002$/;"	l
DBTR3_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR3_D:	.long	0x00000007$/;"	l
DBTR3_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR3_D:	.long	0x00000007$/;"	l
DBTR3_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR3_D:	.long	0x00000007$/;"	l
DBTR4_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR4_A:	.long	0xFE800054$/;"	l
DBTR4_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR4_A:	.long	0xFE800054$/;"	l
DBTR4_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR4_A:	.long	0xfe800054$/;"	l
DBTR4_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR4_A:	.long	0xfe800054$/;"	l
DBTR4_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR4_A:	.long	0xfe800054$/;"	l
DBTR4_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR4_D:	.long	0x00070007$/;"	l
DBTR4_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR4_D:	.long	0x00070007$/;"	l
DBTR4_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR4_D:	.long	0x00070007$/;"	l
DBTR5_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR5_A:	.long	0xFE800058$/;"	l
DBTR5_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR5_A:	.long	0xFE800058$/;"	l
DBTR5_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR5_A:	.long	0xfe800058$/;"	l
DBTR5_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR5_A:	.long	0xfe800058$/;"	l
DBTR5_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR5_A:	.long	0xfe800058$/;"	l
DBTR5_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR5_D:	.long	0x0000001b$/;"	l
DBTR5_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR5_D:	.long	0x0000001b$/;"	l
DBTR5_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR5_D:	.long	0x0000001b$/;"	l
DBTR6_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR6_A:	.long	0xFE80005C$/;"	l
DBTR6_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR6_A:	.long	0xFE80005C$/;"	l
DBTR6_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR6_A:	.long	0xfe80005c$/;"	l
DBTR6_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR6_A:	.long	0xfe80005c$/;"	l
DBTR6_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR6_A:	.long	0xfe80005c$/;"	l
DBTR6_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR6_D:	.long	0x00000014$/;"	l
DBTR6_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR6_D:	.long	0x00000014$/;"	l
DBTR6_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR6_D:	.long	0x00000014$/;"	l
DBTR7_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR7_A:	.long	0xFE800060$/;"	l
DBTR7_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR7_A:	.long	0xFE800060$/;"	l
DBTR7_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR7_A:	.long	0xfe800060$/;"	l
DBTR7_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR7_A:	.long	0xfe800060$/;"	l
DBTR7_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR7_A:	.long	0xfe800060$/;"	l
DBTR7_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR7_D:	.long	0x00000002$/;"	l
DBTR7_D	board/renesas/r0p7734/lowlevel_init.S	/^DBTR7_D:	.long	0x00000002 \/* common value *\/$/;"	l
DBTR7_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR7_D:	.long	0x00000005$/;"	l
DBTR7_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR7_D:	.long	0x00000004$/;"	l
DBTR7_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR7_D:	.long	0x00000005$/;"	l
DBTR8_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR8_A:	.long	0xFE800064$/;"	l
DBTR8_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR8_A:	.long	0xFE800064$/;"	l
DBTR8_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR8_A:	.long	0xfe800064$/;"	l
DBTR8_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR8_A:	.long	0xfe800064$/;"	l
DBTR8_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR8_A:	.long	0xfe800064$/;"	l
DBTR8_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR8_D:	.long	0x00000015$/;"	l
DBTR8_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR8_D:	.long	0x00000014$/;"	l
DBTR8_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR8_D:	.long	0x00000015$/;"	l
DBTR9_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR9_A:	.long	0xFE800068$/;"	l
DBTR9_A	board/renesas/r0p7734/lowlevel_init.S	/^DBTR9_A:	.long	0xFE800068$/;"	l
DBTR9_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR9_A:	.long	0xfe800068$/;"	l
DBTR9_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR9_A:	.long	0xfe800068$/;"	l
DBTR9_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR9_A:	.long	0xfe800068$/;"	l
DBTR9_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBTR9_D:	.long	0x00000002$/;"	l
DBTR9_D	board/renesas/r0p7734/lowlevel_init.S	/^DBTR9_D:	.long	0x00000002 \/* common value *\/$/;"	l
DBTR9_D	board/renesas/sh7752evb/lowlevel_init.S	/^DBTR9_D:	.long	0x00000006$/;"	l
DBTR9_D	board/renesas/sh7753evb/lowlevel_init.S	/^DBTR9_D:	.long	0x00000004$/;"	l
DBTR9_D	board/renesas/sh7757lcr/lowlevel_init.S	/^DBTR9_D:	.long	0x00000006$/;"	l
DBT_TC	include/SA-1100.h	/^#define DBT_TC	/;"	d
DBUF_LENGTH	arch/mips/mach-au1x00/au1x00_eth.c	/^#define DBUF_LENGTH /;"	d	file:
DBUF_LENGTH	arch/powerpc/cpu/mpc8260/ether_scc.c	/^#define DBUF_LENGTH /;"	d	file:
DBUF_LENGTH	arch/powerpc/cpu/mpc8xx/fec.c	/^#define DBUF_LENGTH /;"	d	file:
DBUF_LENGTH	arch/powerpc/cpu/mpc8xx/scc.c	/^#define DBUF_LENGTH /;"	d	file:
DBUF_LENGTH	drivers/net/fsl_mcdmafec.c	/^#define DBUF_LENGTH	/;"	d	file:
DBUF_LENGTH	drivers/net/mcffec.c	/^#define DBUF_LENGTH	/;"	d	file:
DBUF_LENGTH	post/cpu/mpc8xx/ether.c	/^#define DBUF_LENGTH /;"	d	file:
DBWAIT_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^DBWAIT_A:		.long	0xFE80001C$/;"	l
DBWAIT_A	board/renesas/r0p7734/lowlevel_init.S	/^DBWAIT_A:		.long	0xFE80001C$/;"	l
DBWAIT_A	board/renesas/sh7752evb/lowlevel_init.S	/^DBWAIT_A:	.long	0xfe80001c$/;"	l
DBWAIT_A	board/renesas/sh7753evb/lowlevel_init.S	/^DBWAIT_A:	.long	0xfe80001c$/;"	l
DBWAIT_A	board/renesas/sh7757lcr/lowlevel_init.S	/^DBWAIT_A:	.long	0xfe80001c$/;"	l
DB_68XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_68XX_ID	/;"	d
DB_784MP_GP_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define DB_784MP_GP_ID	/;"	d
DB_78X60_AMC_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define DB_78X60_AMC_ID	/;"	d
DB_78X60_PCAC_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define DB_78X60_PCAC_ID	/;"	d
DB_78X60_PCAC_REV2_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define DB_78X60_PCAC_REV2_ID	/;"	d
DB_88F6720_GPP_OUT_ENA_HIGH	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_OUT_ENA_HIGH	/;"	d	file:
DB_88F6720_GPP_OUT_ENA_LOW	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_OUT_ENA_LOW	/;"	d	file:
DB_88F6720_GPP_OUT_ENA_MID	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_OUT_ENA_MID	/;"	d	file:
DB_88F6720_GPP_OUT_VAL_HIGH	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_OUT_VAL_HIGH	/;"	d	file:
DB_88F6720_GPP_OUT_VAL_LOW	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_OUT_VAL_LOW	/;"	d	file:
DB_88F6720_GPP_OUT_VAL_MID	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_OUT_VAL_MID	/;"	d	file:
DB_88F6720_GPP_POL_HIGH	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_POL_HIGH	/;"	d	file:
DB_88F6720_GPP_POL_LOW	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_POL_LOW	/;"	d	file:
DB_88F6720_GPP_POL_MID	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_GPP_POL_MID	/;"	d	file:
DB_88F6720_MPP0_7	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP0_7	/;"	d	file:
DB_88F6720_MPP16_23	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP16_23	/;"	d	file:
DB_88F6720_MPP24_31	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP24_31	/;"	d	file:
DB_88F6720_MPP32_39	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP32_39	/;"	d	file:
DB_88F6720_MPP40_47	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP40_47	/;"	d	file:
DB_88F6720_MPP48_55	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP48_55	/;"	d	file:
DB_88F6720_MPP56_63	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP56_63	/;"	d	file:
DB_88F6720_MPP64_67	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP64_67	/;"	d	file:
DB_88F6720_MPP8_15	board/Marvell/db-88f6720/db-88f6720.c	/^#define DB_88F6720_MPP8_15	/;"	d	file:
DB_88F78XX0_BP_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define DB_88F78XX0_BP_ID	/;"	d
DB_88F78XX0_BP_REV2_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define DB_88F78XX0_BP_REV2_ID	/;"	d
DB_AMC_6820_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_AMC_6820_ID	/;"	d
DB_AMC_88F68XX_GPP_OUT_ENA_LOW	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_OUT_ENA_LOW	/;"	d	file:
DB_AMC_88F68XX_GPP_OUT_ENA_MID	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_OUT_ENA_MID	/;"	d	file:
DB_AMC_88F68XX_GPP_OUT_VAL_HIGH	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_OUT_VAL_HIGH	/;"	d	file:
DB_AMC_88F68XX_GPP_OUT_VAL_LOW	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_OUT_VAL_LOW	/;"	d	file:
DB_AMC_88F68XX_GPP_OUT_VAL_MID	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_OUT_VAL_MID	/;"	d	file:
DB_AMC_88F68XX_GPP_POL_LOW	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_POL_LOW	/;"	d	file:
DB_AMC_88F68XX_GPP_POL_MID	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define DB_AMC_88F68XX_GPP_POL_MID	/;"	d	file:
DB_AP_68XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_AP_68XX_ID	/;"	d
DB_AUTO_PAGE_PGM_BUF1	include/dataflash.h	/^#define DB_AUTO_PAGE_PGM_BUF1	/;"	d
DB_AUTO_PAGE_PGM_BUF2	include/dataflash.h	/^#define DB_AUTO_PAGE_PGM_BUF2	/;"	d
DB_BLOCK_ERASE	include/dataflash.h	/^#define DB_BLOCK_ERASE	/;"	d
DB_BP_6821_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_BP_6821_ID	/;"	d
DB_BUF1_PAGE_ERASE_FASTPGM	include/dataflash.h	/^#define DB_BUF1_PAGE_ERASE_FASTPGM	/;"	d
DB_BUF1_PAGE_ERASE_PGM	include/dataflash.h	/^#define DB_BUF1_PAGE_ERASE_PGM	/;"	d
DB_BUF1_PAGE_FASTPGM	include/dataflash.h	/^#define DB_BUF1_PAGE_FASTPGM	/;"	d
DB_BUF1_PAGE_PGM	include/dataflash.h	/^#define DB_BUF1_PAGE_PGM	/;"	d
DB_BUF1_READ	include/dataflash.h	/^#define DB_BUF1_READ	/;"	d
DB_BUF1_WRITE	include/dataflash.h	/^#define DB_BUF1_WRITE	/;"	d
DB_BUF2_PAGE_ERASE_FASTPGM	include/dataflash.h	/^#define DB_BUF2_PAGE_ERASE_FASTPGM	/;"	d
DB_BUF2_PAGE_ERASE_PGM	include/dataflash.h	/^#define DB_BUF2_PAGE_ERASE_PGM	/;"	d
DB_BUF2_PAGE_FASTPGM	include/dataflash.h	/^#define DB_BUF2_PAGE_FASTPGM	/;"	d
DB_BUF2_PAGE_PGM	include/dataflash.h	/^#define DB_BUF2_PAGE_PGM	/;"	d
DB_BUF2_READ	include/dataflash.h	/^#define DB_BUF2_READ	/;"	d
DB_BUF2_WRITE	include/dataflash.h	/^#define DB_BUF2_WRITE	/;"	d
DB_BURST_ARRAY_READ	include/dataflash.h	/^#define DB_BURST_ARRAY_READ	/;"	d
DB_CONTINUOUS_ARRAY_READ	include/dataflash.h	/^#define DB_CONTINUOUS_ARRAY_READ	/;"	d
DB_GET_MODE_SLM1363_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_GET_MODE_SLM1363_ADDR	/;"	d
DB_GET_MODE_SLM1364_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_GET_MODE_SLM1364_ADDR	/;"	d
DB_GP_68XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DB_GP_68XX_ID	/;"	d
DB_GP_88F68XX_GPP_OUT_ENA_LOW	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define DB_GP_88F68XX_GPP_OUT_ENA_LOW	/;"	d	file:
DB_GP_88F68XX_GPP_OUT_ENA_MID	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define DB_GP_88F68XX_GPP_OUT_ENA_MID	/;"	d	file:
DB_GP_88F68XX_GPP_OUT_VAL_LOW	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define DB_GP_88F68XX_GPP_OUT_VAL_LOW	/;"	d	file:
DB_GP_88F68XX_GPP_OUT_VAL_MID	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define DB_GP_88F68XX_GPP_OUT_VAL_MID	/;"	d	file:
DB_GP_88F68XX_GPP_POL_LOW	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define DB_GP_88F68XX_GPP_POL_LOW	/;"	d	file:
DB_GP_88F68XX_GPP_POL_MID	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define DB_GP_88F68XX_GPP_POL_MID	/;"	d	file:
DB_PAGE_2_BUF1_CMP	include/dataflash.h	/^#define DB_PAGE_2_BUF1_CMP	/;"	d
DB_PAGE_2_BUF1_TRF	include/dataflash.h	/^#define DB_PAGE_2_BUF1_TRF	/;"	d
DB_PAGE_2_BUF2_CMP	include/dataflash.h	/^#define DB_PAGE_2_BUF2_CMP	/;"	d
DB_PAGE_2_BUF2_TRF	include/dataflash.h	/^#define DB_PAGE_2_BUF2_TRF	/;"	d
DB_PAGE_ERASE	include/dataflash.h	/^#define DB_PAGE_ERASE	/;"	d
DB_PAGE_FASTPGM_BUF1	include/dataflash.h	/^#define DB_PAGE_FASTPGM_BUF1	/;"	d
DB_PAGE_FastPGM_BUF2	include/dataflash.h	/^#define DB_PAGE_FastPGM_BUF2	/;"	d
DB_PAGE_PGM_BUF1	include/dataflash.h	/^#define DB_PAGE_PGM_BUF1	/;"	d
DB_PAGE_PGM_BUF2	include/dataflash.h	/^#define DB_PAGE_PGM_BUF2	/;"	d
DB_PAGE_READ	include/dataflash.h	/^#define DB_PAGE_READ	/;"	d
DB_STATUS	include/dataflash.h	/^#define DB_STATUS	/;"	d
DB_VALUE	drivers/usb/host/xhci.h	/^#define DB_VALUE(/;"	d
DB_VALUE_HOST	drivers/usb/host/xhci.h	/^#define DB_VALUE_HOST	/;"	d
DC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	DC	/;"	d
DC	drivers/video/tegra124/sor.h	/^#define DC(/;"	d
DC	fs/reiserfs/reiserfs_private.h	/^#define DC(/;"	d
DC1_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define DC1_SHIFT	/;"	d	file:
DC2114x_BRK	drivers/net/dc2114x.c	/^#define DC2114x_BRK	/;"	d	file:
DC2_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define DC2_SHIFT	/;"	d	file:
DC3_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define DC3_SHIFT	/;"	d	file:
DCACHE	arch/mips/include/asm/cachectl.h	/^#define	DCACHE	/;"	d
DCACHE	arch/nds32/include/asm/cache.h	/^enum cache_t {ICACHE, DCACHE};$/;"	e	enum:cache_t
DCACHE_LINE_SIZE_MIN	arch/nios2/cpu/start.S	/^#define DCACHE_LINE_SIZE_MIN	/;"	d	file:
DCACHE_OFF	arch/arm/include/asm/system.h	/^	DCACHE_OFF = 0 << 2,$/;"	e	enum:dcache_option
DCACHE_OFF	arch/arm/include/asm/system.h	/^	DCACHE_OFF = 0x12,$/;"	e	enum:dcache_option
DCACHE_OFF	arch/arm/include/asm/system.h	/^	DCACHE_OFF = TTB_SECT | TTB_SECT_MAIR(0) | TTB_SECT_XN_MASK,$/;"	e	enum:dcache_option
DCACHE_OFF	arch/arm/include/asm/system.h	/^	DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,$/;"	e	enum:dcache_option
DCACHE_RAM_BASE	arch/x86/Kconfig	/^config DCACHE_RAM_BASE$/;"	c	menu:x86 architecture
DCACHE_RAM_BASE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_BASE$/;"	c
DCACHE_RAM_BASE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_BASE$/;"	c
DCACHE_RAM_MRC_VAR_SIZE	arch/x86/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c	menu:x86 architecture
DCACHE_RAM_MRC_VAR_SIZE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c
DCACHE_RAM_MRC_VAR_SIZE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_MRC_VAR_SIZE$/;"	c
DCACHE_RAM_SIZE	arch/x86/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c	menu:x86 architecture
DCACHE_RAM_SIZE	arch/x86/cpu/broadwell/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c
DCACHE_RAM_SIZE	arch/x86/cpu/ivybridge/Kconfig	/^config DCACHE_RAM_SIZE$/;"	c
DCACHE_SIZE_MAX	arch/nios2/cpu/start.S	/^#define DCACHE_SIZE_MAX	/;"	d	file:
DCACHE_STATUS	include/configs/M5208EVBE.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M52277EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5235EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5249EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5253DEMO.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5253EVBE.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5272C3.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5275EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5282EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M53017EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5329EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5373EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M54418TWR.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M54451EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M54455EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5475EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/M5485EVB.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/amcore.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/astro_mcf5373l.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/cobra5272.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_STATUS	include/configs/eb_cpu5282.h	/^#define DCACHE_STATUS	/;"	d
DCACHE_WAY_SHIFT	arch/xtensa/include/asm/cacheasm.h	/^#define DCACHE_WAY_SHIFT /;"	d
DCACHE_WAY_SIZE	arch/xtensa/include/asm/cacheasm.h	/^#define DCACHE_WAY_SIZE /;"	d
DCACHE_WRITEALLOC	arch/arm/include/asm/system.h	/^	DCACHE_WRITEALLOC = 0x16,$/;"	e	enum:dcache_option
DCACHE_WRITEALLOC	arch/arm/include/asm/system.h	/^	DCACHE_WRITEALLOC = 4 << 2,$/;"	e	enum:dcache_option
DCACHE_WRITEALLOC	arch/arm/include/asm/system.h	/^	DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),$/;"	e	enum:dcache_option
DCACHE_WRITEALLOC	arch/arm/include/asm/system.h	/^	DCACHE_WRITEALLOC = TTB_SECT | TTB_SECT_MAIR(3),$/;"	e	enum:dcache_option
DCACHE_WRITEBACK	arch/arm/include/asm/system.h	/^	DCACHE_WRITEBACK = 0x1e,$/;"	e	enum:dcache_option
DCACHE_WRITEBACK	arch/arm/include/asm/system.h	/^	DCACHE_WRITEBACK = 4 << 2,$/;"	e	enum:dcache_option
DCACHE_WRITEBACK	arch/arm/include/asm/system.h	/^	DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,$/;"	e	enum:dcache_option
DCACHE_WRITEBACK	arch/arm/include/asm/system.h	/^	DCACHE_WRITEBACK = TTB_SECT | TTB_SECT_MAIR(2),$/;"	e	enum:dcache_option
DCACHE_WRITETHROUGH	arch/arm/include/asm/system.h	/^	DCACHE_WRITETHROUGH = 0x1a,$/;"	e	enum:dcache_option
DCACHE_WRITETHROUGH	arch/arm/include/asm/system.h	/^	DCACHE_WRITETHROUGH = 3 << 2,$/;"	e	enum:dcache_option
DCACHE_WRITETHROUGH	arch/arm/include/asm/system.h	/^	DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,$/;"	e	enum:dcache_option
DCACHE_WRITETHROUGH	arch/arm/include/asm/system.h	/^	DCACHE_WRITETHROUGH = TTB_SECT | TTB_SECT_MAIR(1),$/;"	e	enum:dcache_option
DCAC_LOOP	arch/nds32/cpu/n1213/start.S	/^DCAC_LOOP:$/;"	l
DCAC_MEM_KBF_DSET	arch/nds32/cpu/n1213/start.S	/^#define DCAC_MEM_KBF_DSET	/;"	d	file:
DCAC_MEM_KBF_DSZ	arch/nds32/cpu/n1213/start.S	/^#define DCAC_MEM_KBF_DSZ	/;"	d	file:
DCAC_MEM_KBF_DWAY	arch/nds32/cpu/n1213/start.S	/^#define DCAC_MEM_KBF_DWAY	/;"	d	file:
DCAL	arch/x86/cpu/quark/smc.h	/^#define DCAL	/;"	d
DCAL_SRXZQCL_MASK	arch/x86/cpu/quark/smc.h	/^#define DCAL_SRXZQCL_MASK	/;"	d
DCAL_ZQCINT_MASK	arch/x86/cpu/quark/smc.h	/^#define DCAL_ZQCINT_MASK	/;"	d
DCAMR_UNSET	drivers/rtc/imxdi.c	/^#define DCAMR_UNSET	/;"	d	file:
DCAN1_RX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define DCAN1_RX	/;"	d
DCAN1_TX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define DCAN1_TX	/;"	d
DCAN2_RX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define DCAN2_RX	/;"	d
DCAN2_TX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define DCAN2_TX	/;"	d
DCAR1	include/SA-1100.h	/^#define DCAR1	/;"	d
DCAR2	include/SA-1100.h	/^#define DCAR2	/;"	d
DCBFEN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DCBFEN	/;"	d
DCBS	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DCBS	/;"	d
DCBS_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DCBS_P	/;"	d
DCCCI	arch/powerpc/include/asm/mmu.h	/^#define DCCCI(/;"	d
DCCR_CACHE	arch/powerpc/include/asm/processor.h	/^#define   DCCR_CACHE	/;"	d
DCCR_NOCACHE	arch/powerpc/include/asm/processor.h	/^#define   DCCR_NOCACHE	/;"	d
DCC_RBIT	drivers/serial/arm_dcc.c	/^#define DCC_RBIT	/;"	d	file:
DCC_WBIT	drivers/serial/arm_dcc.c	/^#define DCC_WBIT	/;"	d	file:
DCDC4P2_DROPOUT_CONFIG	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^#define DCDC4P2_DROPOUT_CONFIG	/;"	d	file:
DCDCSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCDCSR	/;"	d
DCDC_ILMAX	include/power/rk808_pmic.h	/^	DCDC_ILMAX			= 0x90,$/;"	e	enum:__anon9b8afd0f0103
DCD_BARKER	tools/imximage.h	/^#define DCD_BARKER	/;"	d
DCD_CHECK_BITS_CLR_PARAM	tools/imximage.h	/^#define DCD_CHECK_BITS_CLR_PARAM	/;"	d
DCD_CHECK_BITS_SET_PARAM	tools/imximage.h	/^#define DCD_CHECK_BITS_SET_PARAM	/;"	d
DCD_CHECK_DATA_COMMAND_TAG	tools/imximage.h	/^#define DCD_CHECK_DATA_COMMAND_TAG	/;"	d
DCD_HEADER_TAG	tools/imximage.h	/^#define DCD_HEADER_TAG	/;"	d
DCD_VERSION	tools/imximage.h	/^#define DCD_VERSION	/;"	d
DCD_WRITE_CLR_BIT_PARAM	tools/imximage.h	/^#define DCD_WRITE_CLR_BIT_PARAM	/;"	d
DCD_WRITE_DATA_COMMAND_TAG	tools/imximage.h	/^#define DCD_WRITE_DATA_COMMAND_TAG	/;"	d
DCD_WRITE_DATA_PARAM	tools/imximage.h	/^#define DCD_WRITE_DATA_PARAM	/;"	d
DCFG_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_BASE	/;"	d
DCFG_CCSR_BRR	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define DCFG_CCSR_BRR	/;"	d	file:
DCFG_CCSR_CRSTSR_WDRFR	board/freescale/common/sleep.h	/^#define DCFG_CCSR_CRSTSR_WDRFR	/;"	d
DCFG_CCSR_CRSTSR_WDRFR	board/freescale/ls1043aqds/ls1043aqds.c	/^#define DCFG_CCSR_CRSTSR_WDRFR	/;"	d	file:
DCFG_CCSR_CRSTSR_WDRFR	board/freescale/ls1046aqds/ls1046aqds.c	/^#define DCFG_CCSR_CRSTSR_WDRFR	/;"	d	file:
DCFG_CCSR_PORSR1_RCW_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define DCFG_CCSR_PORSR1_RCW_MASK	/;"	d
DCFG_CCSR_PORSR1_RCW_SRC_I2C	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define DCFG_CCSR_PORSR1_RCW_SRC_I2C	/;"	d
DCFG_CCSR_RSTCR	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define DCFG_CCSR_RSTCR	/;"	d	file:
DCFG_CCSR_RSTCR_RESET_REQ	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define DCFG_CCSR_RSTCR_RESET_REQ	/;"	d	file:
DCFG_CCSR_SCRATCHRW1	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define DCFG_CCSR_SCRATCHRW1	/;"	d	file:
DCFG_CRSTSR_WDRFR	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define DCFG_CRSTSR_WDRFR	/;"	d	file:
DCFG_DCSR_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_DCSR_BASE	/;"	d
DCFG_DCSR_PORCR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define DCFG_DCSR_PORCR1	/;"	d
DCFG_DCSR_PORCR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_DCSR_PORCR1	/;"	d
DCFG_DCSR_PORCR1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define DCFG_DCSR_PORCR1	/;"	d
DCFG_PORSR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_PORSR1	/;"	d
DCFG_PORSR1_RCW_SRC	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_PORSR1_RCW_SRC	/;"	d
DCFG_PORSR1_RCW_SRC_NOR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_PORSR1_RCW_SRC_NOR	/;"	d
DCFG_RCWSR13	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_RCWSR13	/;"	d
DCFG_RCWSR13_DSPI	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_RCWSR13_DSPI	/;"	d
DCFG_RCWSR15	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_RCWSR15	/;"	d
DCFG_RCWSR15_IFCGRPABASE_QSPI	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define DCFG_RCWSR15_IFCGRPABASE_QSPI	/;"	d
DCFM	drivers/usb/host/r8a66597.h	/^#define	DCFM	/;"	d
DCGU_BASE	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_BASE	/;"	d
DCGU_BASE	board/micronas/vct/vctv/reg_dcgu.h	/^#define DCGU_BASE	/;"	d
DCGU_CLK_EN1	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_CLK_EN1(/;"	d
DCGU_CLK_EN1_OFFS	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_CLK_EN1_OFFS	/;"	d
DCGU_CLK_EN2	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_CLK_EN2(/;"	d
DCGU_CLK_EN2_OFFS	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_CLK_EN2_OFFS	/;"	d
DCGU_EN_WDT_RESET	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_EN_WDT_RESET(/;"	d
DCGU_EN_WDT_RESET	board/micronas/vct/vctv/reg_dcgu.h	/^#define DCGU_EN_WDT_RESET(/;"	d
DCGU_EN_WDT_RESET_OFFS	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_EN_WDT_RESET_OFFS	/;"	d
DCGU_EN_WDT_RESET_OFFS	board/micronas/vct/vctv/reg_dcgu.h	/^#define DCGU_EN_WDT_RESET_OFFS	/;"	d
DCGU_HW_MODULE_ABP_DTV	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_ABP_DTV,	\/* Selects audio baseband processing	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_ABP_SCC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_ABP_SCC,	\/* Selects audio base band processor SCC*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_AD	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_AD,	\/* Selects audio decoder module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_BCU	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_BCU,	\/* Selects Buffer Configuration Unit	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_COM	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_COM,	\/* Selects COM unit module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_CPU	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_CPU,	\/* Selects CPU subsystem module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_CVE	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_CVE,	\/* Selects color video encoder module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_DCGU	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_DCGU,	\/* Selects digital clock gen. unit	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_DGPU	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_DGPU,	\/* Selects digital graphics processing	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_DVP	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_DVP,	\/* Selects dig video processing module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_EBI	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_EBI,	\/* Selects external bus interface module*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_EIC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_EIC,	\/* Selects External Interrupt controller*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_FH	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_FH,	\/* Selects FIFO Handler module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_FWSRAM	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_FWSRAM,	\/* Selects firmware SRAM module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_GA	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_GA,	\/* Selects graphics accelerator module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_GPIO1	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_GPIO1,	\/* Selects gpio module 1		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_GPIO2	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_GPIO2,	\/* Selects gpio module 2		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_GPT	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_GPT,	\/* Selects gpt mod connected to clkperi20*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_I2C1	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_I2C1,	\/* Selects first I2C mod con to clkperi20*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_I2C2	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_I2C2,	\/* Selects 2nd I2C mod con to clkperi20	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_I2S	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_I2S,	\/* Selects integrated interchip sound	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_IMU	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_IMU,	\/* Selects Interrupt Management Unit	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_IRQC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_IRQC,	\/* Selects interrupt C module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MDU	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MDU,	\/* Selects MCI Debug Unit module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MIC32_SCI	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MIC32_SCI, \/* Selects MIC32 SoC interface	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MM	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MM,	\/* Selects Memory Manager module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MPC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MPC,	\/* Selects multi purpose cipher module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MPC_KEY	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MPC_KEY,	\/* Selects multi purpose cipher key	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MR1	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MR1,	\/* Selects first MPEG reader module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MR2	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MR2,	\/* Selects second MPEG reader module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MSMC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MSMC,	\/* Selects memory stick and mmc module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_MVD	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_MVD,	\/* Selects MPEG video decoder module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_PERI	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_PERI,	\/* Selects all mod connected to clkperi20*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_PWM	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_PWM,	\/* Selects pwm mod connected to clkperi20*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SCC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SCC,	\/* Selects SCC module			*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SCI	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SCI,	\/* Selects SCI target agent port modules*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SI2OCP	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SI2OCP	\/* Selects Standard Interface to OCP bridge*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SMC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SMC,	\/* Selects smartcard interface module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SPDIF	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SPDIF,	\/* Selects sony philips digital interf.	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SRAM	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SRAM,	\/* Selects SRAM module			*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SSI_M	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SSI_M,	\/* Selects master sync serial interface	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_SSI_S	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_SSI_S,	\/* Selects slave sync serial interface	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_TOP	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_TOP,	\/* Selects top level pinmux module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_TSD	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_TSD,	\/* Selects trasnport stream decoder	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_TSD_KEY	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_TSD_KEY,	\/* Selects trasnport stream decoder key	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_TSIO	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_TSIO,	\/* Selects trasnport stream input\/output*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_UART_1	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_UART_1,	\/* Selects first UART module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_UART_2	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_UART_2,	\/* Selects second UART module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_USBH	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_USBH,	\/* Selects USB hub module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_USB_24	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_USB_24,	\/* Selects USB 24 module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_USB_60	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_USB_60,	\/* Selects USB 60 module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_USB_PLL	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_USB_PLL,	\/* Selects USB phase locked loop module	*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_VCTY_CORE	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_VCTY_CORE, \/* Selects VCT-Y core module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_VID_ENC	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_VID_ENC,	\/* Selects video encoder module		*\/$/;"	e	enum:dcgu_hw_module
DCGU_HW_MODULE_WDT	board/micronas/vct/dcgu.h	/^	DCGU_HW_MODULE_WDT,	\/* Selects wtg timer mod con to clkperi20*\/$/;"	e	enum:dcgu_hw_module
DCGU_MAGIC_WDT	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_MAGIC_WDT	/;"	d
DCGU_MAGIC_WDT	board/micronas/vct/vctv/reg_dcgu.h	/^#define DCGU_MAGIC_WDT	/;"	d
DCGU_RESET_UNIT1	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_RESET_UNIT1(/;"	d
DCGU_RESET_UNIT1_OFFS	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_RESET_UNIT1_OFFS	/;"	d
DCGU_SWITCH_OFF	board/micronas/vct/dcgu.h	/^	DCGU_SWITCH_OFF,	\/* Switch off				*\/$/;"	e	enum:dcgu_switch
DCGU_SWITCH_ON	board/micronas/vct/dcgu.h	/^	DCGU_SWITCH_ON		\/* Switch on				*\/$/;"	e	enum:dcgu_switch
DCGU_USBPHY_STAT	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_USBPHY_STAT(/;"	d
DCGU_USBPHY_STAT_OFFS	board/micronas/vct/vcth/reg_dcgu.h	/^#define DCGU_USBPHY_STAT_OFFS	/;"	d
DCIC1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DCIC1_BASE_ADDR /;"	d
DCIC2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DCIC2_BASE_ADDR /;"	d
DCI_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define DCI_FREQ /;"	d
DCI_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define DCI_FREQ /;"	d
DCI_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define DCI_FREQ /;"	d
DCI_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define DCI_FREQ /;"	d
DCI_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define DCI_FREQ /;"	d
DCLK_CM0S_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_CM0S_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_CM0S_PMU	/;"	d
DCLK_LCDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_LCDC	include/dt-bindings/clock/rk3036-cru.h	/^#define DCLK_LCDC	/;"	d
DCLK_M0_PERILP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_M0_PERILP	include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_M0_PERILP	/;"	d
DCLK_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0	include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0	/;"	d
DCLK_VOP0_DIV	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP0_DIV	include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP0_DIV	/;"	d
DCLK_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	include/dt-bindings/clock/rk3288-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1	include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1	/;"	d
DCLK_VOP1_DIV	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP1_DIV	include/dt-bindings/clock/rk3399-cru.h	/^#define DCLK_VOP1_DIV	/;"	d
DCLK_VOP_DCLK_SEL_DIVOUT	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_DCLK_SEL_DIVOUT        = 0,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_DCLK_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_DCLK_SEL_MASK          = 1 << DCLK_VOP_DCLK_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_DCLK_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_DCLK_SEL_SHIFT         = 11,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_DIV_CON_MASK           = 0xff,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_DIV_CON_SHIFT          = 0,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_PLL_SEL_MASK           = 3 << DCLK_VOP_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_PLL_SEL_SHIFT          = 8,$/;"	e	enum:__anon06b9221d0103	file:
DCLK_VOP_PLL_SEL_VPLL	drivers/clk/rockchip/clk_rk3399.c	/^	DCLK_VOP_PLL_SEL_VPLL           = 0,$/;"	e	enum:__anon06b9221d0103	file:
DCLRM	drivers/usb/host/r8a66597.h	/^#define	DCLRM	/;"	d
DCMD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD(/;"	d
DCMD0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD0	/;"	d
DCMD1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD1	/;"	d
DCMD10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD10	/;"	d
DCMD11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD11	/;"	d
DCMD12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD12	/;"	d
DCMD13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD13	/;"	d
DCMD14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD14	/;"	d
DCMD15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD15	/;"	d
DCMD2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD2	/;"	d
DCMD3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD3	/;"	d
DCMD4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD4	/;"	d
DCMD5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD5	/;"	d
DCMD6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD6	/;"	d
DCMD7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD7	/;"	d
DCMD8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD8	/;"	d
DCMD9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD9	/;"	d
DCMD_ACT	arch/x86/cpu/quark/smc.h	/^#define DCMD_ACT(/;"	d
DCMD_BURST16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_BURST16	/;"	d
DCMD_BURST32	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_BURST32	/;"	d
DCMD_BURST8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_BURST8	/;"	d
DCMD_ENDIAN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_ENDIAN	/;"	d
DCMD_ENDIRQEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_ENDIRQEN	/;"	d
DCMD_FLOWSRC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_FLOWSRC	/;"	d
DCMD_FLOWTRG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_FLOWTRG	/;"	d
DCMD_INCSRCADDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_INCSRCADDR /;"	d
DCMD_INCTRGADDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_INCTRGADDR /;"	d
DCMD_LENGTH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_LENGTH	/;"	d
DCMD_MRS1	arch/x86/cpu/quark/smc.h	/^#define DCMD_MRS1(/;"	d
DCMD_NOP	arch/x86/cpu/quark/smc.h	/^#define DCMD_NOP(/;"	d
DCMD_PRE	arch/x86/cpu/quark/smc.h	/^#define DCMD_PRE(/;"	d
DCMD_PREA	arch/x86/cpu/quark/smc.h	/^#define DCMD_PREA(/;"	d
DCMD_RD	arch/x86/cpu/quark/smc.h	/^#define DCMD_RD(/;"	d
DCMD_REF	arch/x86/cpu/quark/smc.h	/^#define DCMD_REF(/;"	d
DCMD_RXMCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_RXMCDR	/;"	d
DCMD_RXPCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_RXPCDR	/;"	d
DCMD_STARTIRQEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_STARTIRQEN /;"	d
DCMD_TXPCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_TXPCDR	/;"	d
DCMD_WIDTH1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_WIDTH1	/;"	d
DCMD_WIDTH2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_WIDTH2	/;"	d
DCMD_WIDTH4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCMD_WIDTH4	/;"	d
DCMD_WR	arch/x86/cpu/quark/smc.h	/^#define DCMD_WR(/;"	d
DCMD_ZQCL	arch/x86/cpu/quark/smc.h	/^#define DCMD_ZQCL(/;"	d
DCMD_ZQCS	arch/x86/cpu/quark/smc.h	/^#define DCMD_ZQCS(/;"	d
DCMP	arch/powerpc/include/asm/processor.h	/^#define DCMP	/;"	d
DCM_CFG_MSK_DSZ	arch/nds32/include/asm/cache.h	/^#define DCM_CFG_MSK_DSZ	/;"	d
DCM_CFG_OFF_DSZ	arch/nds32/include/asm/cache.h	/^#define DCM_CFG_OFF_DSZ	/;"	d
DCM_WRAP	examples/standalone/mem_to_mem_idma2intr.c	/^#define DCM_WRAP	/;"	d	file:
DCNT	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	DCNT	/;"	d
DCNTL	include/sym53c8xx.h	/^#define DCNTL	/;"	d
DCO	arch/x86/cpu/quark/smc.h	/^#define DCO	/;"	d
DCOUNT	include/MCD_progCheck.h	/^#define DCOUNT	/;"	d
DCO_CPGCLOCK	arch/x86/cpu/quark/smc.h	/^#define DCO_CPGCLOCK	/;"	d
DCO_DRPLOCK	arch/x86/cpu/quark/smc.h	/^#define DCO_DRPLOCK	/;"	d
DCO_HS1_MAX	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DCO_HS1_MAX	/;"	d	file:
DCO_HS1_MIN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DCO_HS1_MIN	/;"	d	file:
DCO_HS2_MAX	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DCO_HS2_MAX	/;"	d	file:
DCO_HS2_MIN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DCO_HS2_MIN	/;"	d	file:
DCO_IC	arch/x86/cpu/quark/smc.h	/^#define DCO_IC	/;"	d
DCO_PMICTL	arch/x86/cpu/quark/smc.h	/^#define DCO_PMICTL	/;"	d
DCO_PMIDIS	arch/x86/cpu/quark/smc.h	/^#define DCO_PMIDIS	/;"	d
DCP0_CFGADDR	arch/powerpc/include/asm/ppc405gp.h	/^#define DCP0_CFGADDR	/;"	d
DCP0_CFGDATA	arch/powerpc/include/asm/ppc405gp.h	/^#define DCP0_CFGDATA	/;"	d
DCPCFG	drivers/usb/host/r8a66597.h	/^#define DCPCFG	/;"	d
DCPCTR	drivers/usb/host/r8a66597.h	/^#define DCPCTR	/;"	d
DCPLB_ADDR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR0 /;"	d
DCPLB_ADDR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR1 /;"	d
DCPLB_ADDR10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR10 /;"	d
DCPLB_ADDR11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR11 /;"	d
DCPLB_ADDR12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR12 /;"	d
DCPLB_ADDR13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR13 /;"	d
DCPLB_ADDR14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR14 /;"	d
DCPLB_ADDR15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR15 /;"	d
DCPLB_ADDR2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR2 /;"	d
DCPLB_ADDR3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR3 /;"	d
DCPLB_ADDR4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR4 /;"	d
DCPLB_ADDR5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR5 /;"	d
DCPLB_ADDR6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR6 /;"	d
DCPLB_ADDR7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR7 /;"	d
DCPLB_ADDR8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR8 /;"	d
DCPLB_ADDR9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_ADDR9 /;"	d
DCPLB_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA0 /;"	d
DCPLB_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA1 /;"	d
DCPLB_DATA10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA10 /;"	d
DCPLB_DATA11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA11 /;"	d
DCPLB_DATA12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA12 /;"	d
DCPLB_DATA13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA13 /;"	d
DCPLB_DATA14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA14 /;"	d
DCPLB_DATA15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA15 /;"	d
DCPLB_DATA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA2 /;"	d
DCPLB_DATA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA3 /;"	d
DCPLB_DATA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA4 /;"	d
DCPLB_DATA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA5 /;"	d
DCPLB_DATA6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA6 /;"	d
DCPLB_DATA7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA7 /;"	d
DCPLB_DATA8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA8 /;"	d
DCPLB_DATA9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_DATA9 /;"	d
DCPLB_FAULT_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_FAULT_ADDR /;"	d
DCPLB_FAULT_STATUS	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DCPLB_FAULT_STATUS /;"	d
DCPMAXP	drivers/usb/host/r8a66597.h	/^#define DCPMAXP	/;"	d
DCP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DCP_BASE_ADDR /;"	d
DCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DCR /;"	d
DCR	arch/sh/include/asm/cpu_sh7706.h	/^#define	DCR	/;"	d
DCR0	drivers/net/uli526x.c	/^	DCR0 = 0x00, DCR1 = 0x08, DCR2 = 0x10, DCR3 = 0x18, DCR4 = 0x20,$/;"	e	enum:uli526x_offsets	file:
DCR1	drivers/net/uli526x.c	/^	DCR0 = 0x00, DCR1 = 0x08, DCR2 = 0x10, DCR3 = 0x18, DCR4 = 0x20,$/;"	e	enum:uli526x_offsets	file:
DCR10	drivers/net/uli526x.c	/^	DCR10 = 0x50, DCR11 = 0x58, DCR12 = 0x60, DCR13 = 0x68, DCR14 = 0x70,$/;"	e	enum:uli526x_offsets	file:
DCR11	drivers/net/uli526x.c	/^	DCR10 = 0x50, DCR11 = 0x58, DCR12 = 0x60, DCR13 = 0x68, DCR14 = 0x70,$/;"	e	enum:uli526x_offsets	file:
DCR12	drivers/net/uli526x.c	/^	DCR10 = 0x50, DCR11 = 0x58, DCR12 = 0x60, DCR13 = 0x68, DCR14 = 0x70,$/;"	e	enum:uli526x_offsets	file:
DCR13	drivers/net/uli526x.c	/^	DCR10 = 0x50, DCR11 = 0x58, DCR12 = 0x60, DCR13 = 0x68, DCR14 = 0x70,$/;"	e	enum:uli526x_offsets	file:
DCR14	drivers/net/uli526x.c	/^	DCR10 = 0x50, DCR11 = 0x58, DCR12 = 0x60, DCR13 = 0x68, DCR14 = 0x70,$/;"	e	enum:uli526x_offsets	file:
DCR15	drivers/net/uli526x.c	/^	DCR15 = 0x78$/;"	e	enum:uli526x_offsets	file:
DCR2	drivers/net/uli526x.c	/^	DCR0 = 0x00, DCR1 = 0x08, DCR2 = 0x10, DCR3 = 0x18, DCR4 = 0x20,$/;"	e	enum:uli526x_offsets	file:
DCR3	drivers/net/uli526x.c	/^	DCR0 = 0x00, DCR1 = 0x08, DCR2 = 0x10, DCR3 = 0x18, DCR4 = 0x20,$/;"	e	enum:uli526x_offsets	file:
DCR4	drivers/net/uli526x.c	/^	DCR0 = 0x00, DCR1 = 0x08, DCR2 = 0x10, DCR3 = 0x18, DCR4 = 0x20,$/;"	e	enum:uli526x_offsets	file:
DCR5	drivers/net/uli526x.c	/^	DCR5 = 0x28, DCR6 = 0x30, DCR7 = 0x38, DCR8 = 0x40, DCR9 = 0x48,$/;"	e	enum:uli526x_offsets	file:
DCR6	drivers/net/uli526x.c	/^	DCR5 = 0x28, DCR6 = 0x30, DCR7 = 0x38, DCR8 = 0x40, DCR9 = 0x48,$/;"	e	enum:uli526x_offsets	file:
DCR7	drivers/net/uli526x.c	/^	DCR5 = 0x28, DCR6 = 0x30, DCR7 = 0x38, DCR8 = 0x40, DCR9 = 0x48,$/;"	e	enum:uli526x_offsets	file:
DCR8	drivers/net/uli526x.c	/^	DCR5 = 0x28, DCR6 = 0x30, DCR7 = 0x38, DCR8 = 0x40, DCR9 = 0x48,$/;"	e	enum:uli526x_offsets	file:
DCR9	drivers/net/uli526x.c	/^	DCR5 = 0x28, DCR6 = 0x30, DCR7 = 0x38, DCR8 = 0x40, DCR9 = 0x48,$/;"	e	enum:uli526x_offsets	file:
DCREAD	arch/powerpc/include/asm/mmu.h	/^#define DCREAD(/;"	d
DCRN_BEAR	arch/powerpc/include/asm/processor.h	/^#define DCRN_BEAR	/;"	d
DCRN_BESR	arch/powerpc/include/asm/processor.h	/^#define DCRN_BESR	/;"	d
DCRN_DMACC0	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACC0	/;"	d
DCRN_DMACC1	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACC1	/;"	d
DCRN_DMACC2	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACC2	/;"	d
DCRN_DMACC3	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACC3	/;"	d
DCRN_DMACR0	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACR0	/;"	d
DCRN_DMACR1	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACR1	/;"	d
DCRN_DMACR2	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACR2	/;"	d
DCRN_DMACR3	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACR3	/;"	d
DCRN_DMACT0	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACT0	/;"	d
DCRN_DMACT1	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACT1	/;"	d
DCRN_DMACT2	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACT2	/;"	d
DCRN_DMACT3	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMACT3	/;"	d
DCRN_DMADA0	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMADA0	/;"	d
DCRN_DMADA1	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMADA1	/;"	d
DCRN_DMADA2	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMADA2	/;"	d
DCRN_DMADA3	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMADA3	/;"	d
DCRN_DMASA0	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMASA0	/;"	d
DCRN_DMASA1	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMASA1	/;"	d
DCRN_DMASA2	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMASA2	/;"	d
DCRN_DMASA3	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMASA3	/;"	d
DCRN_DMASR	arch/powerpc/include/asm/processor.h	/^#define DCRN_DMASR	/;"	d
DCRN_EXIER	arch/powerpc/include/asm/processor.h	/^#define DCRN_EXIER	/;"	d
DCRN_EXISR	arch/powerpc/include/asm/processor.h	/^#define DCRN_EXISR	/;"	d
DCRN_IOCR	arch/powerpc/include/asm/processor.h	/^#define DCRN_IOCR	/;"	d
DCRN_PCIE0_BASE	arch/powerpc/include/asm/4xx_pcie.h	/^#define	DCRN_PCIE0_BASE	/;"	d
DCRN_PCIE0_BASE	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PCIE0_BASE	/;"	d
DCRN_PCIE1_BASE	arch/powerpc/include/asm/4xx_pcie.h	/^#define	DCRN_PCIE1_BASE	/;"	d
DCRN_PCIE1_BASE	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PCIE1_BASE	/;"	d
DCRN_PCIE2_BASE	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PCIE2_BASE	/;"	d
DCRN_PEGPL_CFG	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_CFG(/;"	d
DCRN_PEGPL_CFGBAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_CFGBAH(/;"	d
DCRN_PEGPL_CFGBAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_CFGBAL(/;"	d
DCRN_PEGPL_CFGMSK	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_CFGMSK(/;"	d
DCRN_PEGPL_MSGBAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_MSGBAH(/;"	d
DCRN_PEGPL_MSGBAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_MSGBAL(/;"	d
DCRN_PEGPL_MSGMSK	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_MSGMSK(/;"	d
DCRN_PEGPL_OMR1BAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_OMR1BAH(/;"	d
DCRN_PEGPL_OMR1BAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_OMR1BAL(/;"	d
DCRN_PEGPL_OMR1MSKH	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_OMR1MSKH(/;"	d
DCRN_PEGPL_OMR1MSKL	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_OMR1MSKL(/;"	d
DCRN_PEGPL_REGBAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_REGBAH(/;"	d
DCRN_PEGPL_REGBAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_REGBAL(/;"	d
DCRN_PEGPL_REGMSK	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_REGMSK(/;"	d
DCRN_PEGPL_SPECIAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_PEGPL_SPECIAL(/;"	d
DCRN_SDR0_CFGADDR	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_SDR0_CFGADDR	/;"	d
DCRN_SDR0_CFGDATA	arch/powerpc/include/asm/4xx_pcie.h	/^#define DCRN_SDR0_CFGDATA	/;"	d
DCR_DEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DCR_DEN /;"	d
DCR_DRST	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DCR_DRST /;"	d
DCR_TCE	drivers/rtc/imxdi.c	/^#define DCR_TCE	/;"	d	file:
DCSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR(/;"	d
DCSR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR0	/;"	d
DCSR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR1	/;"	d
DCSR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR10	/;"	d
DCSR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR11	/;"	d
DCSR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR12	/;"	d
DCSR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR13	/;"	d
DCSR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR14	/;"	d
DCSR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR15	/;"	d
DCSR16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR16	/;"	d
DCSR17	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR17	/;"	d
DCSR18	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR18	/;"	d
DCSR19	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR19	/;"	d
DCSR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR2	/;"	d
DCSR20	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR20	/;"	d
DCSR21	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR21	/;"	d
DCSR22	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR22	/;"	d
DCSR23	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR23	/;"	d
DCSR24	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR24	/;"	d
DCSR25	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR25	/;"	d
DCSR26	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR26	/;"	d
DCSR27	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR27	/;"	d
DCSR28	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR28	/;"	d
DCSR29	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR29	/;"	d
DCSR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR3	/;"	d
DCSR30	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR30	/;"	d
DCSR31	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR31	/;"	d
DCSR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR4	/;"	d
DCSR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR5	/;"	d
DCSR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR6	/;"	d
DCSR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR7	/;"	d
DCSR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR8	/;"	d
DCSR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR9	/;"	d
DCSRBAR_LAWAR	arch/powerpc/cpu/mpc85xx/start.S	/^#define DCSRBAR_LAWAR	/;"	d	file:
DCSRCR0	include/faraday/ftpmu010.h	/^	unsigned int	DCSRCR0;	\/* 0x40 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
DCSRCR1	include/faraday/ftpmu010.h	/^	unsigned int	DCSRCR1;	\/* 0x44 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
DCSRCR2	include/faraday/ftpmu010.h	/^	unsigned int	DCSRCR2;	\/* 0x48 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
DCSR_BIU	include/SA-1100.h	/^#define DCSR_BIU	/;"	d
DCSR_BUSERR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_BUSERR	/;"	d
DCSR_BufA	include/SA-1100.h	/^#define DCSR_BufA	/;"	d
DCSR_BufB	include/SA-1100.h	/^#define DCSR_BufB	/;"	d
DCSR_CGACRE5	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define DCSR_CGACRE5	/;"	d
DCSR_CLRCMPST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_CLRCMPST	/;"	d
DCSR_CMPST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_CMPST	/;"	d
DCSR_DCFG_ECC_DISABLE_USB1	arch/powerpc/include/asm/immap_85xx.h	/^#define	DCSR_DCFG_ECC_DISABLE_USB1	/;"	d
DCSR_DCFG_ECC_DISABLE_USB2	arch/powerpc/include/asm/immap_85xx.h	/^#define	DCSR_DCFG_ECC_DISABLE_USB2	/;"	d
DCSR_DONEA	include/SA-1100.h	/^#define DCSR_DONEA	/;"	d
DCSR_DONEB	include/SA-1100.h	/^#define DCSR_DONEB	/;"	d
DCSR_ENDINTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_ENDINTR	/;"	d
DCSR_ENRINTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_ENRINTR	/;"	d
DCSR_EORIRQEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_EORIRQEN	/;"	d
DCSR_EORJMPEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_EORJMPEN	/;"	d
DCSR_EORSTOPEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_EORSTOPEN	/;"	d
DCSR_ERROR	include/SA-1100.h	/^#define DCSR_ERROR	/;"	d
DCSR_IE	include/SA-1100.h	/^#define DCSR_IE	/;"	d
DCSR_LAWBARH0	arch/powerpc/cpu/mpc85xx/start.S	/^#define DCSR_LAWBARH0	/;"	d	file:
DCSR_NODESC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_NODESC	/;"	d
DCSR_RCPM2_BLOCK_OFFSET	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define DCSR_RCPM2_BLOCK_OFFSET	/;"	d	file:
DCSR_RCPM2_CPMFSMCR0	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define DCSR_RCPM2_CPMFSMCR0	/;"	d	file:
DCSR_RCPM2_CPMFSMCR1	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define DCSR_RCPM2_CPMFSMCR1	/;"	d	file:
DCSR_RCPM2_CPMFSMSR0	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define DCSR_RCPM2_CPMFSMSR0	/;"	d	file:
DCSR_RCPM2_CPMFSMSR1	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define DCSR_RCPM2_CPMFSMSR1	/;"	d	file:
DCSR_RCPM_CG1CR0	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define DCSR_RCPM_CG1CR0	/;"	d	file:
DCSR_RCPM_CSTTACR0	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define DCSR_RCPM_CSTTACR0	/;"	d	file:
DCSR_REQPEND	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_REQPEND	/;"	d
DCSR_RUN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_RUN	/;"	d
DCSR_RUN	include/SA-1100.h	/^#define DCSR_RUN	/;"	d
DCSR_SETCMPST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_SETCMPST	/;"	d
DCSR_STARTINTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_STARTINTR	/;"	d
DCSR_STOPIRQEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_STOPIRQEN	/;"	d
DCSR_STOPSTATE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DCSR_STOPSTATE	/;"	d
DCSR_STRTA	include/SA-1100.h	/^#define DCSR_STRTA	/;"	d
DCSR_STRTB	include/SA-1100.h	/^#define DCSR_STRTB	/;"	d
DCU_BGND_B	drivers/video/fsl_dcu_fb.c	/^#define DCU_BGND_B(/;"	d	file:
DCU_BGND_G	drivers/video/fsl_dcu_fb.c	/^#define DCU_BGND_G(/;"	d	file:
DCU_BGND_R	drivers/video/fsl_dcu_fb.c	/^#define DCU_BGND_R(/;"	d	file:
DCU_CTRLDESCLN_1_HEIGHT	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_1_HEIGHT(/;"	d	file:
DCU_CTRLDESCLN_1_WIDTH	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_1_WIDTH(/;"	d	file:
DCU_CTRLDESCLN_2_POSX	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_2_POSX(/;"	d	file:
DCU_CTRLDESCLN_2_POSY	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_2_POSY(/;"	d	file:
DCU_CTRLDESCLN_4_AB	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_AB(/;"	d	file:
DCU_CTRLDESCLN_4_BB_ON	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_BB_ON	/;"	d	file:
DCU_CTRLDESCLN_4_BPP	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_BPP(/;"	d	file:
DCU_CTRLDESCLN_4_DATA_SEL_CLUT	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_DATA_SEL_CLUT	/;"	d	file:
DCU_CTRLDESCLN_4_EN	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_EN	/;"	d	file:
DCU_CTRLDESCLN_4_LUOFFS	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_LUOFFS(/;"	d	file:
DCU_CTRLDESCLN_4_RLE_EN	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_RLE_EN	/;"	d	file:
DCU_CTRLDESCLN_4_SAFETY_EN	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_SAFETY_EN	/;"	d	file:
DCU_CTRLDESCLN_4_TILE_EN	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_TILE_EN	/;"	d	file:
DCU_CTRLDESCLN_4_TRANS	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_4_TRANS(/;"	d	file:
DCU_CTRLDESCLN_5_CKMAX_B	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_5_CKMAX_B(/;"	d	file:
DCU_CTRLDESCLN_5_CKMAX_G	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_5_CKMAX_G(/;"	d	file:
DCU_CTRLDESCLN_5_CKMAX_R	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_5_CKMAX_R(/;"	d	file:
DCU_CTRLDESCLN_6_CKMIN_B	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_6_CKMIN_B(/;"	d	file:
DCU_CTRLDESCLN_6_CKMIN_G	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_6_CKMIN_G(/;"	d	file:
DCU_CTRLDESCLN_6_CKMIN_R	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_6_CKMIN_R(/;"	d	file:
DCU_CTRLDESCLN_7_TILE_HOR	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_7_TILE_HOR(/;"	d	file:
DCU_CTRLDESCLN_7_TILE_VER	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_7_TILE_VER(/;"	d	file:
DCU_CTRLDESCLN_8_FG_FCOLOR	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_8_FG_FCOLOR(/;"	d	file:
DCU_CTRLDESCLN_9_BG_BCOLOR	drivers/video/fsl_dcu_fb.c	/^#define DCU_CTRLDESCLN_9_BG_BCOLOR(/;"	d	file:
DCU_DISP_SIZE_DELTA_X	drivers/video/fsl_dcu_fb.c	/^#define DCU_DISP_SIZE_DELTA_X(/;"	d	file:
DCU_DISP_SIZE_DELTA_Y	drivers/video/fsl_dcu_fb.c	/^#define DCU_DISP_SIZE_DELTA_Y(/;"	d	file:
DCU_HSYN_PARA_BP	drivers/video/fsl_dcu_fb.c	/^#define DCU_HSYN_PARA_BP(/;"	d	file:
DCU_HSYN_PARA_FP	drivers/video/fsl_dcu_fb.c	/^#define DCU_HSYN_PARA_FP(/;"	d	file:
DCU_HSYN_PARA_PW	drivers/video/fsl_dcu_fb.c	/^#define DCU_HSYN_PARA_PW(/;"	d	file:
DCU_LAYER_MAX_NUM	arch/arm/include/asm/arch-ls102xa/config.h	/^#define DCU_LAYER_MAX_NUM	/;"	d
DCU_MODE_BLEND_ITER	drivers/video/fsl_dcu_fb.c	/^#define DCU_MODE_BLEND_ITER(/;"	d	file:
DCU_MODE_COLORBAR	drivers/video/fsl_dcu_fb.c	/^#define DCU_MODE_COLORBAR /;"	d	file:
DCU_MODE_NORMAL	drivers/video/fsl_dcu_fb.c	/^#define DCU_MODE_NORMAL	/;"	d	file:
DCU_MODE_RASTER_EN	drivers/video/fsl_dcu_fb.c	/^#define DCU_MODE_RASTER_EN	/;"	d	file:
DCU_SYN_POL_INV_HS_LOW	drivers/video/fsl_dcu_fb.c	/^#define DCU_SYN_POL_INV_HS_LOW	/;"	d	file:
DCU_SYN_POL_INV_PXCK_FALL	drivers/video/fsl_dcu_fb.c	/^#define DCU_SYN_POL_INV_PXCK_FALL	/;"	d	file:
DCU_SYN_POL_INV_VS_LOW	drivers/video/fsl_dcu_fb.c	/^#define DCU_SYN_POL_INV_VS_LOW	/;"	d	file:
DCU_SYN_POL_NEG_REMAIN	drivers/video/fsl_dcu_fb.c	/^#define DCU_SYN_POL_NEG_REMAIN	/;"	d	file:
DCU_THRESHOLD_LS_BF_VS	drivers/video/fsl_dcu_fb.c	/^#define DCU_THRESHOLD_LS_BF_VS(/;"	d	file:
DCU_THRESHOLD_OUT_BUF_HIGH	drivers/video/fsl_dcu_fb.c	/^#define DCU_THRESHOLD_OUT_BUF_HIGH(/;"	d	file:
DCU_THRESHOLD_OUT_BUF_LOW	drivers/video/fsl_dcu_fb.c	/^#define DCU_THRESHOLD_OUT_BUF_LOW(/;"	d	file:
DCU_UPDATE_MODE_MODE	drivers/video/fsl_dcu_fb.c	/^#define DCU_UPDATE_MODE_MODE /;"	d	file:
DCU_UPDATE_MODE_READREG	drivers/video/fsl_dcu_fb.c	/^#define DCU_UPDATE_MODE_READREG /;"	d	file:
DCU_VSYN_PARA_BP	drivers/video/fsl_dcu_fb.c	/^#define DCU_VSYN_PARA_BP(/;"	d	file:
DCU_VSYN_PARA_FP	drivers/video/fsl_dcu_fb.c	/^#define DCU_VSYN_PARA_FP(/;"	d	file:
DCU_VSYN_PARA_PW	drivers/video/fsl_dcu_fb.c	/^#define DCU_VSYN_PARA_PW(/;"	d	file:
DCWR_COPY	arch/powerpc/include/asm/processor.h	/^#define   DCWR_COPY	/;"	d
DCWR_WRITE	arch/powerpc/include/asm/processor.h	/^#define   DCWR_WRITE	/;"	d
DC_ADR	arch/powerpc/include/asm/cache.h	/^#define DC_ADR	/;"	d
DC_CFWT	arch/powerpc/include/asm/cache.h	/^#define DC_CFWT	/;"	d
DC_CLES	arch/powerpc/include/asm/cache.h	/^#define DC_CLES	/;"	d
DC_CST	arch/powerpc/include/asm/cache.h	/^#define DC_CST	/;"	d
DC_CTRL_CACHE_DISABLE	arch/arc/lib/cache.c	/^#define DC_CTRL_CACHE_DISABLE	/;"	d	file:
DC_CTRL_FLUSH_STATUS	arch/arc/lib/cache.c	/^#define DC_CTRL_FLUSH_STATUS	/;"	d	file:
DC_CTRL_INV_MODE_FLUSH	arch/arc/lib/cache.c	/^#define DC_CTRL_INV_MODE_FLUSH	/;"	d	file:
DC_DAT	arch/powerpc/include/asm/cache.h	/^#define DC_DAT	/;"	d
DC_DFWT	arch/powerpc/include/asm/cache.h	/^#define DC_DFWT	/;"	d
DC_DISP_CONF2	drivers/video/ipu_regs.h	/^#define DC_DISP_CONF2(/;"	d
DC_DISP_ID_ASYNC	drivers/video/ipu_disp.c	/^#define DC_DISP_ID_ASYNC	/;"	d	file:
DC_DISP_ID_SERIAL	drivers/video/ipu_disp.c	/^#define DC_DISP_ID_SERIAL	/;"	d	file:
DC_DISP_ID_SYNC	drivers/video/ipu_disp.c	/^#define DC_DISP_ID_SYNC(/;"	d	file:
DC_EVT_EOF	drivers/video/ipu_regs.h	/^#define DC_EVT_EOF	/;"	d
DC_EVT_EOFIELD	drivers/video/ipu_regs.h	/^#define DC_EVT_EOFIELD	/;"	d
DC_EVT_EOL	drivers/video/ipu_regs.h	/^#define DC_EVT_EOL	/;"	d
DC_EVT_NEW_ADDR	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_ADDR	/;"	d
DC_EVT_NEW_ADDR_R_0	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_ADDR_R_0	/;"	d
DC_EVT_NEW_ADDR_R_1	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_ADDR_R_1	/;"	d
DC_EVT_NEW_ADDR_W_0	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_ADDR_W_0	/;"	d
DC_EVT_NEW_ADDR_W_1	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_ADDR_W_1	/;"	d
DC_EVT_NEW_CHAN	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_CHAN	/;"	d
DC_EVT_NEW_CHAN_R_0	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_CHAN_R_0	/;"	d
DC_EVT_NEW_CHAN_R_1	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_CHAN_R_1	/;"	d
DC_EVT_NEW_CHAN_W_0	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_CHAN_W_0	/;"	d
DC_EVT_NEW_CHAN_W_1	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_CHAN_W_1	/;"	d
DC_EVT_NEW_DATA	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_DATA	/;"	d
DC_EVT_NEW_DATA_R_0	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_DATA_R_0	/;"	d
DC_EVT_NEW_DATA_R_1	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_DATA_R_1	/;"	d
DC_EVT_NEW_DATA_W_0	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_DATA_W_0	/;"	d
DC_EVT_NEW_DATA_W_1	drivers/video/ipu_regs.h	/^#define DC_EVT_NEW_DATA_W_1	/;"	d
DC_EVT_NF	drivers/video/ipu_regs.h	/^#define DC_EVT_NF	/;"	d
DC_EVT_NFIELD	drivers/video/ipu_regs.h	/^#define DC_EVT_NFIELD	/;"	d
DC_EVT_NL	drivers/video/ipu_regs.h	/^#define DC_EVT_NL	/;"	d
DC_FLINE	arch/powerpc/include/asm/cache.h	/^#define DC_FLINE	/;"	d
DC_GEN	drivers/video/ipu_regs.h	/^#define DC_GEN	/;"	d
DC_LANE0_DP_LANE2_MASK	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_MASK	/;"	d
DC_LANE0_DP_LANE2_P0_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P0_LEVEL0	/;"	d
DC_LANE0_DP_LANE2_P0_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P0_LEVEL1	/;"	d
DC_LANE0_DP_LANE2_P0_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P0_LEVEL2	/;"	d
DC_LANE0_DP_LANE2_P0_LEVEL3	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P0_LEVEL3	/;"	d
DC_LANE0_DP_LANE2_P1_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P1_LEVEL0	/;"	d
DC_LANE0_DP_LANE2_P1_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P1_LEVEL1	/;"	d
DC_LANE0_DP_LANE2_P1_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P1_LEVEL2	/;"	d
DC_LANE0_DP_LANE2_P2_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P2_LEVEL0	/;"	d
DC_LANE0_DP_LANE2_P2_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P2_LEVEL1	/;"	d
DC_LANE0_DP_LANE2_P3_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_P3_LEVEL0	/;"	d
DC_LANE0_DP_LANE2_SHIFT	drivers/video/tegra124/sor.h	/^#define DC_LANE0_DP_LANE2_SHIFT	/;"	d
DC_LANE1_DP_LANE1_MASK	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_MASK	/;"	d
DC_LANE1_DP_LANE1_P0_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P0_LEVEL0	/;"	d
DC_LANE1_DP_LANE1_P0_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P0_LEVEL1	/;"	d
DC_LANE1_DP_LANE1_P0_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P0_LEVEL2	/;"	d
DC_LANE1_DP_LANE1_P0_LEVEL3	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P0_LEVEL3	/;"	d
DC_LANE1_DP_LANE1_P1_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P1_LEVEL0	/;"	d
DC_LANE1_DP_LANE1_P1_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P1_LEVEL1	/;"	d
DC_LANE1_DP_LANE1_P1_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P1_LEVEL2	/;"	d
DC_LANE1_DP_LANE1_P2_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P2_LEVEL0	/;"	d
DC_LANE1_DP_LANE1_P2_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P2_LEVEL1	/;"	d
DC_LANE1_DP_LANE1_P3_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_P3_LEVEL0	/;"	d
DC_LANE1_DP_LANE1_SHIFT	drivers/video/tegra124/sor.h	/^#define DC_LANE1_DP_LANE1_SHIFT	/;"	d
DC_LANE2_DP_LANE0_MASK	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_MASK	/;"	d
DC_LANE2_DP_LANE0_P0_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P0_LEVEL0	/;"	d
DC_LANE2_DP_LANE0_P0_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P0_LEVEL1	/;"	d
DC_LANE2_DP_LANE0_P0_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P0_LEVEL2	/;"	d
DC_LANE2_DP_LANE0_P0_LEVEL3	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P0_LEVEL3	/;"	d
DC_LANE2_DP_LANE0_P1_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P1_LEVEL0	/;"	d
DC_LANE2_DP_LANE0_P1_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P1_LEVEL1	/;"	d
DC_LANE2_DP_LANE0_P1_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P1_LEVEL2	/;"	d
DC_LANE2_DP_LANE0_P2_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P2_LEVEL0	/;"	d
DC_LANE2_DP_LANE0_P2_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P2_LEVEL1	/;"	d
DC_LANE2_DP_LANE0_P3_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_P3_LEVEL0	/;"	d
DC_LANE2_DP_LANE0_SHIFT	drivers/video/tegra124/sor.h	/^#define DC_LANE2_DP_LANE0_SHIFT	/;"	d
DC_LANE3_DP_LANE3_MASK	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_MASK	/;"	d
DC_LANE3_DP_LANE3_P0_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P0_LEVEL0	/;"	d
DC_LANE3_DP_LANE3_P0_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P0_LEVEL1	/;"	d
DC_LANE3_DP_LANE3_P0_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P0_LEVEL2	/;"	d
DC_LANE3_DP_LANE3_P0_LEVEL3	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P0_LEVEL3	/;"	d
DC_LANE3_DP_LANE3_P1_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P1_LEVEL0	/;"	d
DC_LANE3_DP_LANE3_P1_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P1_LEVEL1	/;"	d
DC_LANE3_DP_LANE3_P1_LEVEL2	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P1_LEVEL2	/;"	d
DC_LANE3_DP_LANE3_P2_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P2_LEVEL0	/;"	d
DC_LANE3_DP_LANE3_P2_LEVEL1	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P2_LEVEL1	/;"	d
DC_LANE3_DP_LANE3_P3_LEVEL0	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_P3_LEVEL0	/;"	d
DC_LANE3_DP_LANE3_SHIFT	drivers/video/tegra124/sor.h	/^#define DC_LANE3_DP_LANE3_SHIFT	/;"	d
DC_LES	arch/powerpc/include/asm/cache.h	/^#define DC_LES	/;"	d
DC_MAP_CONF_PTR	drivers/video/ipu_regs.h	/^#define DC_MAP_CONF_PTR(/;"	d
DC_MAP_CONF_VAL	drivers/video/ipu_regs.h	/^#define DC_MAP_CONF_VAL(/;"	d
DC_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define DC_MASK	/;"	d	file:
DC_MROR	drivers/net/bcm-sf2-eth-gmac.h	/^#define DC_MROR	/;"	d
DC_N_WINDOWS	arch/arm/include/asm/arch-tegra/dc.h	/^#define DC_N_WINDOWS	/;"	d
DC_POLL_TIMEOUT_MS	arch/arm/include/asm/arch-tegra/dc.h	/^#define DC_POLL_TIMEOUT_MS	/;"	d
DC_REG	drivers/video/ipu_regs.h	/^#define DC_REG	/;"	d
DC_REG_SAVE_SPACE	arch/arm/include/asm/arch-tegra/dc.h	/^#define DC_REG_SAVE_SPACE	/;"	d
DC_RL_CH	drivers/video/ipu_regs.h	/^#define DC_RL_CH(/;"	d
DC_SFWT	arch/powerpc/include/asm/cache.h	/^#define DC_SFWT	/;"	d
DC_SIZE	fs/reiserfs/reiserfs_private.h	/^#define DC_SIZE /;"	d
DC_SLES	arch/powerpc/include/asm/cache.h	/^#define DC_SLES	/;"	d
DC_STAT	drivers/video/ipu_regs.h	/^#define DC_STAT	/;"	d
DC_WR_CH_ADDR	drivers/video/ipu_regs.h	/^#define DC_WR_CH_ADDR(/;"	d
DC_WR_CH_CONF	drivers/video/ipu_regs.h	/^#define DC_WR_CH_CONF(/;"	d
DC_WR_CH_CONF_1	drivers/video/ipu_regs.h	/^#define DC_WR_CH_CONF_1	/;"	d
DC_WR_CH_CONF_5	drivers/video/ipu_regs.h	/^#define DC_WR_CH_CONF_5	/;"	d
DC_WR_CH_CONF_FIELD_MODE	drivers/video/ipu_regs.h	/^	DC_WR_CH_CONF_FIELD_MODE = 0x00000200,$/;"	e	enum:__anonf09a0ccd0103
DC_WR_CH_CONF_PROG_DISP_ID_MASK	drivers/video/ipu_regs.h	/^	DC_WR_CH_CONF_PROG_DISP_ID_MASK = 0x00000018,$/;"	e	enum:__anonf09a0ccd0103
DC_WR_CH_CONF_PROG_DISP_ID_OFFSET	drivers/video/ipu_regs.h	/^	DC_WR_CH_CONF_PROG_DISP_ID_OFFSET = 3,$/;"	e	enum:__anonf09a0ccd0103
DC_WR_CH_CONF_PROG_DI_ID	drivers/video/ipu_regs.h	/^	DC_WR_CH_CONF_PROG_DI_ID = 0x00000004,$/;"	e	enum:__anonf09a0ccd0103
DC_WR_CH_CONF_PROG_TYPE_MASK	drivers/video/ipu_regs.h	/^	DC_WR_CH_CONF_PROG_TYPE_MASK = 0x000000E0,$/;"	e	enum:__anonf09a0ccd0103
DC_WR_CH_CONF_PROG_TYPE_OFFSET	drivers/video/ipu_regs.h	/^	DC_WR_CH_CONF_PROG_TYPE_OFFSET = 5,$/;"	e	enum:__anonf09a0ccd0103
DDADR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR(/;"	d
DDADR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR0	/;"	d
DDADR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR1	/;"	d
DDADR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR10	/;"	d
DDADR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR11	/;"	d
DDADR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR12	/;"	d
DDADR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR13	/;"	d
DDADR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR14	/;"	d
DDADR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR15	/;"	d
DDADR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR2	/;"	d
DDADR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR3	/;"	d
DDADR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR4	/;"	d
DDADR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR5	/;"	d
DDADR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR6	/;"	d
DDADR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR7	/;"	d
DDADR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR8	/;"	d
DDADR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR9	/;"	d
DDADR_DESCADDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR_DESCADDR	/;"	d
DDADR_STOP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DDADR_STOP	/;"	d
DDAR0	include/SA-1100.h	/^#define DDAR0	/;"	d
DDAR1	include/SA-1100.h	/^#define DDAR1	/;"	d
DDAR2	include/SA-1100.h	/^#define DDAR2	/;"	d
DDAR3	include/SA-1100.h	/^#define DDAR3	/;"	d
DDAR4	include/SA-1100.h	/^#define DDAR4	/;"	d
DDAR5	include/SA-1100.h	/^#define DDAR5	/;"	d
DDAR_16BitDev	include/SA-1100.h	/^#define DDAR_16BitDev	/;"	d
DDAR_8BitDev	include/SA-1100.h	/^#define DDAR_8BitDev	/;"	d
DDAR_BS	include/SA-1100.h	/^#define DDAR_BS	/;"	d
DDAR_BigEnd	include/SA-1100.h	/^#define DDAR_BigEnd	/;"	d
DDAR_Brst4	include/SA-1100.h	/^#define DDAR_Brst4	/;"	d
DDAR_Brst8	include/SA-1100.h	/^#define DDAR_Brst8	/;"	d
DDAR_DA	include/SA-1100.h	/^#define DDAR_DA	/;"	d
DDAR_DS	include/SA-1100.h	/^#define DDAR_DS	/;"	d
DDAR_DW	include/SA-1100.h	/^#define DDAR_DW	/;"	d
DDAR_DevAdd	include/SA-1100.h	/^#define DDAR_DevAdd(/;"	d
DDAR_DevRd	include/SA-1100.h	/^#define DDAR_DevRd	/;"	d
DDAR_DevWr	include/SA-1100.h	/^#define DDAR_DevWr	/;"	d
DDAR_E	include/SA-1100.h	/^#define DDAR_E	/;"	d
DDAR_LtlEnd	include/SA-1100.h	/^#define DDAR_LtlEnd	/;"	d
DDAR_RW	include/SA-1100.h	/^#define DDAR_RW	/;"	d
DDAR_Ser0UDCRc	include/SA-1100.h	/^#define DDAR_Ser0UDCRc	/;"	d
DDAR_Ser0UDCRd	include/SA-1100.h	/^#define DDAR_Ser0UDCRd	/;"	d
DDAR_Ser0UDCTr	include/SA-1100.h	/^#define DDAR_Ser0UDCTr	/;"	d
DDAR_Ser0UDCWr	include/SA-1100.h	/^#define DDAR_Ser0UDCWr	/;"	d
DDAR_Ser1SDLCRc	include/SA-1100.h	/^#define DDAR_Ser1SDLCRc	/;"	d
DDAR_Ser1SDLCRd	include/SA-1100.h	/^#define DDAR_Ser1SDLCRd	/;"	d
DDAR_Ser1SDLCTr	include/SA-1100.h	/^#define DDAR_Ser1SDLCTr	/;"	d
DDAR_Ser1SDLCWr	include/SA-1100.h	/^#define DDAR_Ser1SDLCWr	/;"	d
DDAR_Ser1UARTRc	include/SA-1100.h	/^#define DDAR_Ser1UARTRc	/;"	d
DDAR_Ser1UARTRd	include/SA-1100.h	/^#define DDAR_Ser1UARTRd	/;"	d
DDAR_Ser1UARTTr	include/SA-1100.h	/^#define DDAR_Ser1UARTTr	/;"	d
DDAR_Ser1UARTWr	include/SA-1100.h	/^#define DDAR_Ser1UARTWr	/;"	d
DDAR_Ser2HSSPRd	include/SA-1100.h	/^#define DDAR_Ser2HSSPRd	/;"	d
DDAR_Ser2HSSPWr	include/SA-1100.h	/^#define DDAR_Ser2HSSPWr	/;"	d
DDAR_Ser2ICPRc	include/SA-1100.h	/^#define DDAR_Ser2ICPRc	/;"	d
DDAR_Ser2ICPTr	include/SA-1100.h	/^#define DDAR_Ser2ICPTr	/;"	d
DDAR_Ser2UARTRd	include/SA-1100.h	/^#define DDAR_Ser2UARTRd	/;"	d
DDAR_Ser2UARTWr	include/SA-1100.h	/^#define DDAR_Ser2UARTWr	/;"	d
DDAR_Ser3UARTRc	include/SA-1100.h	/^#define DDAR_Ser3UARTRc	/;"	d
DDAR_Ser3UARTRd	include/SA-1100.h	/^#define DDAR_Ser3UARTRd	/;"	d
DDAR_Ser3UARTTr	include/SA-1100.h	/^#define DDAR_Ser3UARTTr	/;"	d
DDAR_Ser3UARTWr	include/SA-1100.h	/^#define DDAR_Ser3UARTWr	/;"	d
DDAR_Ser4MCP0Rc	include/SA-1100.h	/^#define DDAR_Ser4MCP0Rc	/;"	d
DDAR_Ser4MCP0Rd	include/SA-1100.h	/^#define DDAR_Ser4MCP0Rd	/;"	d
DDAR_Ser4MCP0Tr	include/SA-1100.h	/^#define DDAR_Ser4MCP0Tr	/;"	d
DDAR_Ser4MCP0Wr	include/SA-1100.h	/^#define DDAR_Ser4MCP0Wr	/;"	d
DDAR_Ser4MCP1Rc	include/SA-1100.h	/^#define DDAR_Ser4MCP1Rc	/;"	d
DDAR_Ser4MCP1Rd	include/SA-1100.h	/^#define DDAR_Ser4MCP1Rd	/;"	d
DDAR_Ser4MCP1Tr	include/SA-1100.h	/^#define DDAR_Ser4MCP1Tr	/;"	d
DDAR_Ser4MCP1Wr	include/SA-1100.h	/^#define DDAR_Ser4MCP1Wr	/;"	d
DDAR_Ser4SSPRc	include/SA-1100.h	/^#define DDAR_Ser4SSPRc	/;"	d
DDAR_Ser4SSPRd	include/SA-1100.h	/^#define DDAR_Ser4SSPRd	/;"	d
DDAR_Ser4SSPTr	include/SA-1100.h	/^#define DDAR_Ser4SSPTr	/;"	d
DDAR_Ser4SSPWr	include/SA-1100.h	/^#define DDAR_Ser4SSPWr	/;"	d
DDC_PINMUX	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define DDC_PINMUX(/;"	d
DDIR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DDIR(/;"	d
DDIR_MASK	arch/arm/include/asm/omap_mmc.h	/^#define DDIR_MASK	/;"	d
DDIR_OFFSET	arch/arm/include/asm/omap_mmc.h	/^#define DDIR_OFFSET	/;"	d
DDIR_READ	arch/arm/include/asm/omap_mmc.h	/^#define DDIR_READ	/;"	d
DDIR_WRITE	arch/arm/include/asm/omap_mmc.h	/^#define DDIR_WRITE	/;"	d
DDMA_DST_DRQ_ETHERNET_MAC_TX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_ETHERNET_MAC_TX = 6,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_ETHERNET_MAC_TX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_ETHERNET_MAC_TX = 6,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_MSC	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_MSC = 23,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_MSC	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_MSC = 23,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_NAND	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_NAND = 3,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_NAND	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_NAND = 3,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_PATA	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_PATA = 2,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_PATA	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_PATA = 2,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SDRAM	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SDRAM = 1,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SDRAM	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SDRAM = 1,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SECURITY_SYS_TX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SECURITY_SYS_TX = 10,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SECURITY_SYS_TX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SECURITY_SYS_TX = 10,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI0_TX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI0_TX = 26,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI0_TX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI0_TX = 26,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI1_TX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI1_TX = 8,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI1_TX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI1_TX = 8,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI2_TX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI2_TX = 28,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI2_TX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI2_TX = 28,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI3_TX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI3_TX = 30,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SPI3_TX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SPI3_TX = 30,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SRAM	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_SRAM = 0,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_SRAM	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_SRAM = 0,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_TCON0	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_TCON0 = 14,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_TCON0	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_TCON0 = 14,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_TCON1	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_TCON1 = 15,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_TCON1	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_TCON1 = 15,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_USB0	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_DST_DRQ_USB0 = 4,$/;"	e	enum:ddma_drq_type
DDMA_DST_DRQ_USB0	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_DST_DRQ_USB0 = 4,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_ETHERNET_MAC_RX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_ETHERNET_MAC_RX = 7,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_ETHERNET_MAC_RX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_ETHERNET_MAC_RX = 7,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_MSC	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_MSC = 23,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_MSC	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_MSC = 23,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_NAND	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_NAND = 3,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_NAND	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_NAND = 3,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_PATA	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_PATA = 2,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_PATA	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_PATA = 2,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SDRAM	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SDRAM = 1,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SDRAM	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SDRAM = 1,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SECURITY_SYS_RX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SECURITY_SYS_RX = 11,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SECURITY_SYS_RX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SECURITY_SYS_RX = 11,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI0_RX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI0_RX = 27,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI0_RX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI0_RX = 27,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI1_RX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI1_RX = 9,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI1_RX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI1_RX = 9,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI2_RX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI2_RX = 29,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI2_RX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI2_RX = 29,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI3_RX	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI3_RX = 31,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SPI3_RX	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SPI3_RX = 31,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SRAM	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_SRAM = 0,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_SRAM	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_SRAM = 0,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_USB0	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	DDMA_SRC_DRQ_USB0 = 4,$/;"	e	enum:ddma_drq_type
DDMA_SRC_DRQ_USB0	arch/arm/include/asm/arch/dma_sun4i.h	/^	DDMA_SRC_DRQ_USB0 = 4,$/;"	e	enum:ddma_drq_type
DDR	board/spear/common/spr_misc.c	/^#define DDR	/;"	d	file:
DDR	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
DDR0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define DDR0	/;"	d
DDR0_00	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00	/;"	d
DDR0_00_DLL_INCREMENT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_DLL_INCREMENT_DECODE(/;"	d
DDR0_00_DLL_INCREMENT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_DLL_INCREMENT_ENCODE(/;"	d
DDR0_00_DLL_INCREMENT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_DLL_INCREMENT_MASK	/;"	d
DDR0_00_DLL_START_POINT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_DLL_START_POINT_DECODE(/;"	d
DDR0_00_DLL_START_POINT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_DLL_START_POINT_ENCODE(/;"	d
DDR0_00_DLL_START_POINT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_DLL_START_POINT_MASK	/;"	d
DDR0_00_INT_ACK_ALL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_ACK_ALL	/;"	d
DDR0_00_INT_ACK_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_ACK_DECODE(/;"	d
DDR0_00_INT_ACK_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_ACK_ENCODE(/;"	d
DDR0_00_INT_ACK_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_ACK_MASK	/;"	d
DDR0_00_INT_STATUS_BIT0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT0	/;"	d
DDR0_00_INT_STATUS_BIT1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT1	/;"	d
DDR0_00_INT_STATUS_BIT2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT2	/;"	d
DDR0_00_INT_STATUS_BIT3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT3	/;"	d
DDR0_00_INT_STATUS_BIT4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT4	/;"	d
DDR0_00_INT_STATUS_BIT5	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT5	/;"	d
DDR0_00_INT_STATUS_BIT6	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT6	/;"	d
DDR0_00_INT_STATUS_BIT7	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_BIT7	/;"	d
DDR0_00_INT_STATUS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_DECODE(/;"	d
DDR0_00_INT_STATUS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_ENCODE(/;"	d
DDR0_00_INT_STATUS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_00_INT_STATUS_MASK	/;"	d
DDR0_01	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01	/;"	d
DDR0_01_INT_MASK_ALL_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_INT_MASK_ALL_OFF	/;"	d
DDR0_01_INT_MASK_ALL_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_INT_MASK_ALL_ON	/;"	d
DDR0_01_INT_MASK_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_INT_MASK_DECODE(/;"	d
DDR0_01_INT_MASK_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_INT_MASK_ENCODE(/;"	d
DDR0_01_INT_MASK_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_INT_MASK_MASK	/;"	d
DDR0_01_OUT_OF_RANGE_TYPE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_OUT_OF_RANGE_TYPE_DECODE(/;"	d
DDR0_01_OUT_OF_RANGE_TYPE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_OUT_OF_RANGE_TYPE_ENCODE(/;"	d
DDR0_01_OUT_OF_RANGE_TYPE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_OUT_OF_RANGE_TYPE_MASK	/;"	d
DDR0_01_PLB0_DB_CS_LOWER_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_PLB0_DB_CS_LOWER_DECODE(/;"	d
DDR0_01_PLB0_DB_CS_LOWER_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_PLB0_DB_CS_LOWER_ENCODE(/;"	d
DDR0_01_PLB0_DB_CS_LOWER_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_PLB0_DB_CS_LOWER_MASK	/;"	d
DDR0_01_PLB0_DB_CS_UPPER_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_PLB0_DB_CS_UPPER_DECODE(/;"	d
DDR0_01_PLB0_DB_CS_UPPER_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_PLB0_DB_CS_UPPER_ENCODE(/;"	d
DDR0_01_PLB0_DB_CS_UPPER_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_01_PLB0_DB_CS_UPPER_MASK	/;"	d
DDR0_02	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02	/;"	d
DDR0_02_MAX_COL_REG_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_COL_REG_DECODE(/;"	d
DDR0_02_MAX_COL_REG_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_COL_REG_ENCODE(/;"	d
DDR0_02_MAX_COL_REG_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_COL_REG_MASK	/;"	d
DDR0_02_MAX_CS_REG_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_CS_REG_DECODE(/;"	d
DDR0_02_MAX_CS_REG_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_CS_REG_ENCODE(/;"	d
DDR0_02_MAX_CS_REG_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_CS_REG_MASK	/;"	d
DDR0_02_MAX_ROW_REG_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_ROW_REG_DECODE(/;"	d
DDR0_02_MAX_ROW_REG_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_ROW_REG_ENCODE(/;"	d
DDR0_02_MAX_ROW_REG_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_MAX_ROW_REG_MASK	/;"	d
DDR0_02_START_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_START_DECODE(/;"	d
DDR0_02_START_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_START_ENCODE(/;"	d
DDR0_02_START_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_START_MASK	/;"	d
DDR0_02_START_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_START_OFF	/;"	d
DDR0_02_START_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_02_START_ON	/;"	d
DDR0_03	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03	/;"	d
DDR0_03_BSTLEN_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_BSTLEN_DECODE(/;"	d
DDR0_03_BSTLEN_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_BSTLEN_ENCODE(/;"	d
DDR0_03_BSTLEN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_BSTLEN_MASK	/;"	d
DDR0_03_CASLAT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_CASLAT_DECODE(/;"	d
DDR0_03_CASLAT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_CASLAT_ENCODE(/;"	d
DDR0_03_CASLAT_LIN_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_CASLAT_LIN_DECODE(/;"	d
DDR0_03_CASLAT_LIN_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_CASLAT_LIN_ENCODE(/;"	d
DDR0_03_CASLAT_LIN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_CASLAT_LIN_MASK	/;"	d
DDR0_03_CASLAT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_CASLAT_MASK	/;"	d
DDR0_03_INITAREF_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_INITAREF_DECODE(/;"	d
DDR0_03_INITAREF_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_INITAREF_ENCODE(/;"	d
DDR0_03_INITAREF_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_03_INITAREF_MASK	/;"	d
DDR0_04	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04	/;"	d
DDR0_04_TRC_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRC_DECODE(/;"	d
DDR0_04_TRC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRC_ENCODE(/;"	d
DDR0_04_TRC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRC_MASK	/;"	d
DDR0_04_TRRD_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRRD_DECODE(/;"	d
DDR0_04_TRRD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRRD_ENCODE(/;"	d
DDR0_04_TRRD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRRD_MASK	/;"	d
DDR0_04_TRTP_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRTP_DECODE(/;"	d
DDR0_04_TRTP_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRTP_ENCODE(/;"	d
DDR0_04_TRTP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_04_TRTP_MASK	/;"	d
DDR0_05	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05	/;"	d
DDR0_05_TEMRS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TEMRS_DECODE(/;"	d
DDR0_05_TEMRS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TEMRS_ENCODE(/;"	d
DDR0_05_TEMRS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TEMRS_MASK	/;"	d
DDR0_05_TMRD_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TMRD_DECODE(/;"	d
DDR0_05_TMRD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TMRD_ENCODE(/;"	d
DDR0_05_TMRD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TMRD_MASK	/;"	d
DDR0_05_TRAS_MIN_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TRAS_MIN_DECODE(/;"	d
DDR0_05_TRAS_MIN_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TRAS_MIN_ENCODE(/;"	d
DDR0_05_TRAS_MIN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TRAS_MIN_MASK	/;"	d
DDR0_05_TRP_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TRP_DECODE(/;"	d
DDR0_05_TRP_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TRP_ENCODE(/;"	d
DDR0_05_TRP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_05_TRP_MASK	/;"	d
DDR0_06	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06	/;"	d
DDR0_06_TDLL_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TDLL_DECODE(/;"	d
DDR0_06_TDLL_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TDLL_ENCODE(/;"	d
DDR0_06_TDLL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TDLL_MASK	/;"	d
DDR0_06_TRFC_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TRFC_DECODE(/;"	d
DDR0_06_TRFC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TRFC_ENCODE(/;"	d
DDR0_06_TRFC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TRFC_MASK	/;"	d
DDR0_06_TWTR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TWTR_DECODE(/;"	d
DDR0_06_TWTR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TWTR_ENCODE(/;"	d
DDR0_06_TWTR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_TWTR_MASK	/;"	d
DDR0_06_WRITEINTERP_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_WRITEINTERP_DECODE(/;"	d
DDR0_06_WRITEINTERP_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_WRITEINTERP_ENCODE(/;"	d
DDR0_06_WRITEINTERP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_06_WRITEINTERP_MASK	/;"	d
DDR0_07	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07	/;"	d
DDR0_07_AREFRESH_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_AREFRESH_DECODE(/;"	d
DDR0_07_AREFRESH_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_AREFRESH_ENCODE(/;"	d
DDR0_07_AREFRESH_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_AREFRESH_MASK	/;"	d
DDR0_07_AUTO_REFRESH_MODE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_AUTO_REFRESH_MODE_DECODE(/;"	d
DDR0_07_AUTO_REFRESH_MODE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_AUTO_REFRESH_MODE_ENCODE(/;"	d
DDR0_07_AUTO_REFRESH_MODE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_AUTO_REFRESH_MODE_MASK	/;"	d
DDR0_07_NO_CMD_INIT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_NO_CMD_INIT_DECODE(/;"	d
DDR0_07_NO_CMD_INIT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_NO_CMD_INIT_ENCODE(/;"	d
DDR0_07_NO_CMD_INIT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_NO_CMD_INIT_MASK	/;"	d
DDR0_07_TFAW_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_TFAW_DECODE(/;"	d
DDR0_07_TFAW_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_TFAW_ENCODE(/;"	d
DDR0_07_TFAW_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_07_TFAW_MASK	/;"	d
DDR0_08	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08	/;"	d
DDR0_08_DDRII_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_DDRII_DECODE(/;"	d
DDR0_08_DDRII_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_DDRII_ENCODE(/;"	d
DDR0_08_DDRII_SDRAM_MODE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_DDRII_SDRAM_MODE_MASK	/;"	d
DDR0_08_DQS_N_EN_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_DQS_N_EN_DECODE(/;"	d
DDR0_08_DQS_N_EN_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_DQS_N_EN_ENCODE(/;"	d
DDR0_08_DQS_N_EN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_DQS_N_EN_MASK	/;"	d
DDR0_08_TCPD_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_TCPD_DECODE(/;"	d
DDR0_08_TCPD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_TCPD_ENCODE(/;"	d
DDR0_08_TCPD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_TCPD_MASK	/;"	d
DDR0_08_WRLAT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_WRLAT_DECODE(/;"	d
DDR0_08_WRLAT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_WRLAT_ENCODE(/;"	d
DDR0_08_WRLAT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_08_WRLAT_MASK	/;"	d
DDR0_09	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09	/;"	d
DDR0_09_OCD_ADJUST_PDN_CS_0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_OCD_ADJUST_PDN_CS_0_DECODE(/;"	d
DDR0_09_OCD_ADJUST_PDN_CS_0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_OCD_ADJUST_PDN_CS_0_ENCODE(/;"	d
DDR0_09_OCD_ADJUST_PDN_CS_0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_OCD_ADJUST_PDN_CS_0_MASK /;"	d
DDR0_09_RTT_0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_RTT_0_DECODE(/;"	d
DDR0_09_RTT_0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_RTT_0_ENCODE(/;"	d
DDR0_09_RTT_0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_RTT_0_MASK	/;"	d
DDR0_09_WR_DQS_SHIFT_BYPASS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_WR_DQS_SHIFT_BYPASS_DECODE(/;"	d
DDR0_09_WR_DQS_SHIFT_BYPASS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_WR_DQS_SHIFT_BYPASS_ENCODE(/;"	d
DDR0_09_WR_DQS_SHIFT_BYPASS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_WR_DQS_SHIFT_BYPASS_MASK /;"	d
DDR0_09_WR_DQS_SHIFT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_WR_DQS_SHIFT_DECODE(/;"	d
DDR0_09_WR_DQS_SHIFT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_WR_DQS_SHIFT_ENCODE(/;"	d
DDR0_09_WR_DQS_SHIFT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_09_WR_DQS_SHIFT_MASK	/;"	d
DDR0_10	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10	/;"	d
DDR0_10_CS_MAP_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_CS_MAP_DECODE(/;"	d
DDR0_10_CS_MAP_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_CS_MAP_ENCODE(/;"	d
DDR0_10_CS_MAP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_CS_MAP_MASK	/;"	d
DDR0_10_CS_MAP_NO_MEM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_CS_MAP_NO_MEM	/;"	d
DDR0_10_CS_MAP_RANK0_INSTALLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_CS_MAP_RANK0_INSTALLED	/;"	d
DDR0_10_CS_MAP_RANK1_INSTALLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_CS_MAP_RANK1_INSTALLED	/;"	d
DDR0_10_OCD_ADJUST_PUP_CS_0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_OCD_ADJUST_PUP_CS_0_DECODE(/;"	d
DDR0_10_OCD_ADJUST_PUP_CS_0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_OCD_ADJUST_PUP_CS_0_ENCODE(/;"	d
DDR0_10_OCD_ADJUST_PUP_CS_0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_OCD_ADJUST_PUP_CS_0_MASK /;"	d
DDR0_10_WRITE_MODEREG_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_WRITE_MODEREG_DECODE(/;"	d
DDR0_10_WRITE_MODEREG_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_WRITE_MODEREG_ENCODE(/;"	d
DDR0_10_WRITE_MODEREG_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_10_WRITE_MODEREG_MASK	/;"	d
DDR0_11	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11	/;"	d
DDR0_11_SREFRESH_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_SREFRESH_DECODE(/;"	d
DDR0_11_SREFRESH_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_SREFRESH_ENCODE(/;"	d
DDR0_11_SREFRESH_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_SREFRESH_MASK	/;"	d
DDR0_11_TXSNR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_TXSNR_DECODE(/;"	d
DDR0_11_TXSNR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_TXSNR_ENCODE(/;"	d
DDR0_11_TXSNR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_TXSNR_MASK	/;"	d
DDR0_11_TXSR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_TXSR_DECODE(/;"	d
DDR0_11_TXSR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_TXSR_ENCODE(/;"	d
DDR0_11_TXSR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_11_TXSR_MASK	/;"	d
DDR0_12	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_12	/;"	d
DDR0_12_TCKE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_12_TCKE_DECODE(/;"	d
DDR0_12_TCKE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_12_TCKE_ENCODE(/;"	d
DDR0_12_TCKE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_12_TCKE_MASK	/;"	d
DDR0_14	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14	/;"	d
DDR0_14_DLL_BYPASS_MODE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_DLL_BYPASS_MODE_DECODE(/;"	d
DDR0_14_DLL_BYPASS_MODE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_DLL_BYPASS_MODE_ENCODE(/;"	d
DDR0_14_DLL_BYPASS_MODE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_DLL_BYPASS_MODE_MASK	/;"	d
DDR0_14_REDUC_32BITS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REDUC_32BITS	/;"	d
DDR0_14_REDUC_64BITS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REDUC_64BITS	/;"	d
DDR0_14_REDUC_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REDUC_DECODE(/;"	d
DDR0_14_REDUC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REDUC_ENCODE(/;"	d
DDR0_14_REDUC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REDUC_MASK	/;"	d
DDR0_14_REG_DIMM_ENABLE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REG_DIMM_ENABLE_DECODE(/;"	d
DDR0_14_REG_DIMM_ENABLE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REG_DIMM_ENABLE_ENCODE(/;"	d
DDR0_14_REG_DIMM_ENABLE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_14_REG_DIMM_ENABLE_MASK	/;"	d
DDR0_16BIT_EN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	DDR0_16BIT_EN_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
DDR0_16BIT_EN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	DDR0_16BIT_EN_SHIFT	= 8,$/;"	e	enum:__anonbeb2b9771103
DDR0_17	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17	/;"	d
DDR0_17_DLLLOCKREG_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLLLOCKREG_DECODE(/;"	d
DDR0_17_DLLLOCKREG_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLLLOCKREG_ENCODE(/;"	d
DDR0_17_DLLLOCKREG_LOCKED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLLLOCKREG_LOCKED	/;"	d
DDR0_17_DLLLOCKREG_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLLLOCKREG_MASK	/;"	d
DDR0_17_DLLLOCKREG_UNLOCKED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLLLOCKREG_UNLOCKED	/;"	d
DDR0_17_DLL_DQS_DELAY_0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLL_DQS_DELAY_0_DECODE(/;"	d
DDR0_17_DLL_DQS_DELAY_0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLL_DQS_DELAY_0_ENCODE(/;"	d
DDR0_17_DLL_DQS_DELAY_0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLL_DQS_DELAY_0_MASK	/;"	d
DDR0_17_DLL_LOCK_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLL_LOCK_DECODE(/;"	d
DDR0_17_DLL_LOCK_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLL_LOCK_ENCODE(/;"	d
DDR0_17_DLL_LOCK_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_17_DLL_LOCK_MASK	/;"	d
DDR0_18	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18	/;"	d
DDR0_18_DLL_DQS_DELAY_1_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_1_DECODE(/;"	d
DDR0_18_DLL_DQS_DELAY_1_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_1_ENCODE(/;"	d
DDR0_18_DLL_DQS_DELAY_1_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_1_MASK	/;"	d
DDR0_18_DLL_DQS_DELAY_2_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_2_DECODE(/;"	d
DDR0_18_DLL_DQS_DELAY_2_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_2_ENCODE(/;"	d
DDR0_18_DLL_DQS_DELAY_2_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_2_MASK	/;"	d
DDR0_18_DLL_DQS_DELAY_3_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_3_DECODE(/;"	d
DDR0_18_DLL_DQS_DELAY_3_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_3_ENCODE(/;"	d
DDR0_18_DLL_DQS_DELAY_3_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_3_MASK	/;"	d
DDR0_18_DLL_DQS_DELAY_4_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_4_DECODE(/;"	d
DDR0_18_DLL_DQS_DELAY_4_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_4_ENCODE(/;"	d
DDR0_18_DLL_DQS_DELAY_4_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_4_MASK	/;"	d
DDR0_18_DLL_DQS_DELAY_X_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_18_DLL_DQS_DELAY_X_MASK	/;"	d
DDR0_19	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19	/;"	d
DDR0_19_DLL_DQS_DELAY_5_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_5_DECODE(/;"	d
DDR0_19_DLL_DQS_DELAY_5_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_5_ENCODE(/;"	d
DDR0_19_DLL_DQS_DELAY_5_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_5_MASK	/;"	d
DDR0_19_DLL_DQS_DELAY_6_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_6_DECODE(/;"	d
DDR0_19_DLL_DQS_DELAY_6_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_6_ENCODE(/;"	d
DDR0_19_DLL_DQS_DELAY_6_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_6_MASK	/;"	d
DDR0_19_DLL_DQS_DELAY_7_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_7_DECODE(/;"	d
DDR0_19_DLL_DQS_DELAY_7_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_7_ENCODE(/;"	d
DDR0_19_DLL_DQS_DELAY_7_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_7_MASK	/;"	d
DDR0_19_DLL_DQS_DELAY_8_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_8_DECODE(/;"	d
DDR0_19_DLL_DQS_DELAY_8_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_8_ENCODE(/;"	d
DDR0_19_DLL_DQS_DELAY_8_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_8_MASK	/;"	d
DDR0_19_DLL_DQS_DELAY_X_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_19_DLL_DQS_DELAY_X_MASK	/;"	d
DDR0_20	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20	/;"	d
DDR0_20_DLL_DQS_BYPASS_0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_0_DECODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_0_ENCODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_0_MASK	/;"	d
DDR0_20_DLL_DQS_BYPASS_1_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_1_DECODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_1_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_1_ENCODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_1_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_1_MASK	/;"	d
DDR0_20_DLL_DQS_BYPASS_2_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_2_DECODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_2_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_2_ENCODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_2_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_2_MASK	/;"	d
DDR0_20_DLL_DQS_BYPASS_3_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_3_DECODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_3_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_3_ENCODE(/;"	d
DDR0_20_DLL_DQS_BYPASS_3_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_20_DLL_DQS_BYPASS_3_MASK	/;"	d
DDR0_21	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21	/;"	d
DDR0_21_DLL_DQS_BYPASS_4_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_4_DECODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_4_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_4_ENCODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_4_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_4_MASK	/;"	d
DDR0_21_DLL_DQS_BYPASS_5_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_5_DECODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_5_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_5_ENCODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_5_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_5_MASK	/;"	d
DDR0_21_DLL_DQS_BYPASS_6_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_6_DECODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_6_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_6_ENCODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_6_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_6_MASK	/;"	d
DDR0_21_DLL_DQS_BYPASS_7_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_7_DECODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_7_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_7_ENCODE(/;"	d
DDR0_21_DLL_DQS_BYPASS_7_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_21_DLL_DQS_BYPASS_7_MASK	/;"	d
DDR0_22	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22	/;"	d
DDR0_22_CTRL_RAW_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_DECODE(/;"	d
DDR0_22_CTRL_RAW_ECC_CHECK_ONLY	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_ECC_CHECK_ONLY	/;"	d
DDR0_22_CTRL_RAW_ECC_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_ECC_DISABLE	/;"	d
DDR0_22_CTRL_RAW_ECC_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_ECC_ENABLE	/;"	d
DDR0_22_CTRL_RAW_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_ENCODE(/;"	d
DDR0_22_CTRL_RAW_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_MASK	/;"	d
DDR0_22_CTRL_RAW_NO_ECC_RAM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_CTRL_RAW_NO_ECC_RAM	/;"	d
DDR0_22_DLL_DQS_BYPASS_8_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DLL_DQS_BYPASS_8_DECODE(/;"	d
DDR0_22_DLL_DQS_BYPASS_8_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DLL_DQS_BYPASS_8_ENCODE(/;"	d
DDR0_22_DLL_DQS_BYPASS_8_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DLL_DQS_BYPASS_8_MASK	/;"	d
DDR0_22_DQS_OUT_SHIFT_BYPASS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DQS_OUT_SHIFT_BYPASS_DECODE(/;"	d
DDR0_22_DQS_OUT_SHIFT_BYPASS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DQS_OUT_SHIFT_BYPASS_ENCODE(/;"	d
DDR0_22_DQS_OUT_SHIFT_BYPASS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DQS_OUT_SHIFT_BYPASS_MASK /;"	d
DDR0_22_DQS_OUT_SHIFT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DQS_OUT_SHIFT_DECODE(/;"	d
DDR0_22_DQS_OUT_SHIFT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DQS_OUT_SHIFT_ENCODE(/;"	d
DDR0_22_DQS_OUT_SHIFT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_22_DQS_OUT_SHIFT_MASK	/;"	d
DDR0_23	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23	/;"	d
DDR0_23_ECC_C_SYND_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ECC_C_SYND_DECODE(/;"	d
DDR0_23_ECC_C_SYND_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ECC_C_SYND_ENCODE(/;"	d
DDR0_23_ECC_C_SYND_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ECC_C_SYND_MASK	/;"	d
DDR0_23_ECC_U_SYND_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ECC_U_SYND_DECODE(/;"	d
DDR0_23_ECC_U_SYND_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ECC_U_SYND_ENCODE(/;"	d
DDR0_23_ECC_U_SYND_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ECC_U_SYND_MASK	/;"	d
DDR0_23_FWC_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_FWC_DECODE(/;"	d
DDR0_23_FWC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_FWC_ENCODE(/;"	d
DDR0_23_FWC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_FWC_MASK	/;"	d
DDR0_23_ODT_RD_MAP_CS0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ODT_RD_MAP_CS0_DECODE(/;"	d
DDR0_23_ODT_RD_MAP_CS0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ODT_RD_MAP_CS0_ENCODE(/;"	d
DDR0_23_ODT_RD_MAP_CS0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_23_ODT_RD_MAP_CS0_MASK	/;"	d
DDR0_24	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24	/;"	d
DDR0_24_ODT_RD_MAP_CS1_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_RD_MAP_CS1_DECODE(/;"	d
DDR0_24_ODT_RD_MAP_CS1_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_RD_MAP_CS1_ENCODE(/;"	d
DDR0_24_ODT_RD_MAP_CS1_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_RD_MAP_CS1_MASK	/;"	d
DDR0_24_ODT_WR_MAP_CS0_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_WR_MAP_CS0_DECODE(/;"	d
DDR0_24_ODT_WR_MAP_CS0_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_WR_MAP_CS0_ENCODE(/;"	d
DDR0_24_ODT_WR_MAP_CS0_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_WR_MAP_CS0_MASK	/;"	d
DDR0_24_ODT_WR_MAP_CS1_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_WR_MAP_CS1_DECODE(/;"	d
DDR0_24_ODT_WR_MAP_CS1_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_WR_MAP_CS1_ENCODE(/;"	d
DDR0_24_ODT_WR_MAP_CS1_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_ODT_WR_MAP_CS1_MASK	/;"	d
DDR0_24_RTT_PAD_TERMINATION_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_RTT_PAD_TERMINATION_DECODE(/;"	d
DDR0_24_RTT_PAD_TERMINATION_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_RTT_PAD_TERMINATION_ENCODE(/;"	d
DDR0_24_RTT_PAD_TERMINATION_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_24_RTT_PAD_TERMINATION_MASK /;"	d
DDR0_25	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25	/;"	d
DDR0_25_OUT_OF_RANGE_LENGTH_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25_OUT_OF_RANGE_LENGTH_DECODE(/;"	d
DDR0_25_OUT_OF_RANGE_LENGTH_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25_OUT_OF_RANGE_LENGTH_ENCODE(/;"	d
DDR0_25_OUT_OF_RANGE_LENGTH_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25_OUT_OF_RANGE_LENGTH_MASK /;"	d
DDR0_25_VERSION_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25_VERSION_DECODE(/;"	d
DDR0_25_VERSION_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25_VERSION_ENCODE(/;"	d
DDR0_25_VERSION_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_25_VERSION_MASK	/;"	d
DDR0_26	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26	/;"	d
DDR0_26_TRAS_MAX_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26_TRAS_MAX_DECODE(/;"	d
DDR0_26_TRAS_MAX_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26_TRAS_MAX_ENCODE(/;"	d
DDR0_26_TRAS_MAX_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26_TRAS_MAX_MASK	/;"	d
DDR0_26_TREF_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26_TREF_DECODE(/;"	d
DDR0_26_TREF_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26_TREF_ENCODE(/;"	d
DDR0_26_TREF_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_26_TREF_MASK	/;"	d
DDR0_27	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27	/;"	d
DDR0_27_EMRS_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27_EMRS_DATA_DECODE(/;"	d
DDR0_27_EMRS_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27_EMRS_DATA_ENCODE(/;"	d
DDR0_27_EMRS_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27_EMRS_DATA_MASK	/;"	d
DDR0_27_TINIT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27_TINIT_DECODE(/;"	d
DDR0_27_TINIT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27_TINIT_ENCODE(/;"	d
DDR0_27_TINIT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_27_TINIT_MASK	/;"	d
DDR0_28	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28	/;"	d
DDR0_28_EMRS2_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28_EMRS2_DATA_DECODE(/;"	d
DDR0_28_EMRS2_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28_EMRS2_DATA_ENCODE(/;"	d
DDR0_28_EMRS2_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28_EMRS2_DATA_MASK	/;"	d
DDR0_28_EMRS3_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28_EMRS3_DATA_DECODE(/;"	d
DDR0_28_EMRS3_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28_EMRS3_DATA_ENCODE(/;"	d
DDR0_28_EMRS3_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_28_EMRS3_DATA_MASK	/;"	d
DDR0_31	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_31	/;"	d
DDR0_31_XOR_CHECK_BITS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_31_XOR_CHECK_BITS_DECODE(/;"	d
DDR0_31_XOR_CHECK_BITS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_31_XOR_CHECK_BITS_ENCODE(/;"	d
DDR0_31_XOR_CHECK_BITS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_31_XOR_CHECK_BITS_MASK	/;"	d
DDR0_32	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_32	/;"	d
DDR0_32_OUT_OF_RANGE_ADDR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_32_OUT_OF_RANGE_ADDR_DECODE(/;"	d
DDR0_32_OUT_OF_RANGE_ADDR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_32_OUT_OF_RANGE_ADDR_ENCODE(/;"	d
DDR0_32_OUT_OF_RANGE_ADDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_32_OUT_OF_RANGE_ADDR_MASK	/;"	d
DDR0_33	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_33	/;"	d
DDR0_33_OUT_OF_RANGE_ADDR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_33_OUT_OF_RANGE_ADDR_DECODE(/;"	d
DDR0_33_OUT_OF_RANGE_ADDR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_33_OUT_OF_RANGE_ADDR_ENCODE(/;"	d
DDR0_33_OUT_OF_RANGE_ADDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_33_OUT_OF_RANGE_ADDR_MASK	/;"	d
DDR0_34	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_34	/;"	d
DDR0_34_ECC_U_ADDR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_34_ECC_U_ADDR_DECODE(/;"	d
DDR0_34_ECC_U_ADDR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_34_ECC_U_ADDR_ENCODE(/;"	d
DDR0_34_ECC_U_ADDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_34_ECC_U_ADDR_MASK	/;"	d
DDR0_35	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_35	/;"	d
DDR0_35_ECC_U_ADDR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_35_ECC_U_ADDR_DECODE(/;"	d
DDR0_35_ECC_U_ADDR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_35_ECC_U_ADDR_ENCODE(/;"	d
DDR0_35_ECC_U_ADDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_35_ECC_U_ADDR_MASK	/;"	d
DDR0_36	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_36	/;"	d
DDR0_36_ECC_U_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_36_ECC_U_DATA_DECODE(/;"	d
DDR0_36_ECC_U_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_36_ECC_U_DATA_ENCODE(/;"	d
DDR0_36_ECC_U_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_36_ECC_U_DATA_MASK	/;"	d
DDR0_37	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_37	/;"	d
DDR0_37_ECC_U_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_37_ECC_U_DATA_DECODE(/;"	d
DDR0_37_ECC_U_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_37_ECC_U_DATA_ENCODE(/;"	d
DDR0_37_ECC_U_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_37_ECC_U_DATA_MASK	/;"	d
DDR0_38	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_38	/;"	d
DDR0_38_ECC_C_ADDR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_38_ECC_C_ADDR_DECODE(/;"	d
DDR0_38_ECC_C_ADDR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_38_ECC_C_ADDR_ENCODE(/;"	d
DDR0_38_ECC_C_ADDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_38_ECC_C_ADDR_MASK	/;"	d
DDR0_39	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_39	/;"	d
DDR0_39_ECC_C_ADDR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_39_ECC_C_ADDR_DECODE(/;"	d
DDR0_39_ECC_C_ADDR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_39_ECC_C_ADDR_ENCODE(/;"	d
DDR0_39_ECC_C_ADDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_39_ECC_C_ADDR_MASK	/;"	d
DDR0_40	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_40	/;"	d
DDR0_40_ECC_C_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_40_ECC_C_DATA_DECODE(/;"	d
DDR0_40_ECC_C_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_40_ECC_C_DATA_ENCODE(/;"	d
DDR0_40_ECC_C_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_40_ECC_C_DATA_MASK	/;"	d
DDR0_41	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_41	/;"	d
DDR0_41_ECC_C_DATA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_41_ECC_C_DATA_DECODE(/;"	d
DDR0_41_ECC_C_DATA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_41_ECC_C_DATA_ENCODE(/;"	d
DDR0_41_ECC_C_DATA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_41_ECC_C_DATA_MASK	/;"	d
DDR0_42	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42	/;"	d
DDR0_42_ADDR_PINS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42_ADDR_PINS_DECODE(/;"	d
DDR0_42_ADDR_PINS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42_ADDR_PINS_ENCODE(/;"	d
DDR0_42_ADDR_PINS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42_ADDR_PINS_MASK	/;"	d
DDR0_42_CASLAT_LIN_GATE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42_CASLAT_LIN_GATE_DECODE(/;"	d
DDR0_42_CASLAT_LIN_GATE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42_CASLAT_LIN_GATE_ENCODE(/;"	d
DDR0_42_CASLAT_LIN_GATE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_42_CASLAT_LIN_GATE_MASK	/;"	d
DDR0_43	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43	/;"	d
DDR0_43_APREBIT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_APREBIT_DECODE(/;"	d
DDR0_43_APREBIT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_APREBIT_ENCODE(/;"	d
DDR0_43_APREBIT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_APREBIT_MASK	/;"	d
DDR0_43_COLUMN_SIZE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_COLUMN_SIZE_DECODE(/;"	d
DDR0_43_COLUMN_SIZE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_COLUMN_SIZE_ENCODE(/;"	d
DDR0_43_COLUMN_SIZE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_COLUMN_SIZE_MASK	/;"	d
DDR0_43_EIGHT_BANK_MODE_4_BANKS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_EIGHT_BANK_MODE_4_BANKS	/;"	d
DDR0_43_EIGHT_BANK_MODE_8_BANKS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_EIGHT_BANK_MODE_8_BANKS	/;"	d
DDR0_43_EIGHT_BANK_MODE_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_EIGHT_BANK_MODE_DECODE(/;"	d
DDR0_43_EIGHT_BANK_MODE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_EIGHT_BANK_MODE_ENCODE(/;"	d
DDR0_43_EIGHT_BANK_MODE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_EIGHT_BANK_MODE_MASK	/;"	d
DDR0_43_TWR_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_TWR_DECODE(/;"	d
DDR0_43_TWR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_TWR_ENCODE(/;"	d
DDR0_43_TWR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_43_TWR_MASK	/;"	d
DDR0_44	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_44	/;"	d
DDR0_44_TRCD_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_44_TRCD_DECODE(/;"	d
DDR0_44_TRCD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_44_TRCD_ENCODE(/;"	d
DDR0_44_TRCD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define DDR0_44_TRCD_MASK	/;"	d
DDR0_ADDR_1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR0_ADDR_1	/;"	d
DDR0_ADDR_2	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR0_ADDR_2	/;"	d
DDR1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define DDR1	/;"	d
DDR1_16BIT_EN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	DDR1_16BIT_EN_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
DDR1_16BIT_EN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	DDR1_16BIT_EN_SHIFT	= 9,$/;"	e	enum:__anonbeb2b9771103
DDR1_ADDR_1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR1_ADDR_1	/;"	d
DDR1_ADDR_2	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR1_ADDR_2	/;"	d
DDR1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define DDR1_BASE_ADDR	/;"	d
DDR1_CONF2_REG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_CONF2_REG_VAL /;"	d	file:
DDR1_CONF3_REG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_CONF3_REG_VAL /;"	d	file:
DDR1_CONF_REG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_CONF_REG_VAL /;"	d	file:
DDR1_EXT_MODE_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR1_EXT_MODE_VAL /;"	d	file:
DDR1_EXT_MODE_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_EXT_MODE_VAL /;"	d	file:
DDR1_MODE_DLL_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR1_MODE_DLL_VAL /;"	d	file:
DDR1_MODE_DLL_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_MODE_DLL_VAL /;"	d	file:
DDR1_MODE_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR1_MODE_VAL /;"	d	file:
DDR1_MODE_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_MODE_VAL /;"	d	file:
DDR1_PAD_STRENGTH_DEFAULT	arch/arm/mach-orion5x/lowlevel_init.S	/^#define DDR1_PAD_STRENGTH_DEFAULT	/;"	d	file:
DDR1_TAP_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR1_TAP_VAL /;"	d	file:
DDR2	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
DDR2_ADDR_1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR2_ADDR_1	/;"	d
DDR2_ADDR_2	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR2_ADDR_2	/;"	d
DDR2_CONF2_REG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF2_REG_VAL /;"	d	file:
DDR2_CONF3_REG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF3_REG_VAL /;"	d	file:
DDR2_CONF_EN	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_EN /;"	d	file:
DDR2_CONF_EN	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_EN /;"	d	file:
DDR2_CONF_ODT	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_ODT /;"	d	file:
DDR2_CONF_ODT	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_ODT /;"	d	file:
DDR2_CONF_REG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_REG_VAL /;"	d	file:
DDR2_CONF_TFAW	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_TFAW(/;"	d	file:
DDR2_CONF_TFAW	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_TFAW(/;"	d	file:
DDR2_CONF_TFAW_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_TFAW_M /;"	d	file:
DDR2_CONF_TFAW_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_TFAW_M /;"	d	file:
DDR2_CONF_TFAW_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_TFAW_S /;"	d	file:
DDR2_CONF_TFAW_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_TFAW_S /;"	d	file:
DDR2_CONF_TWL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_TWL(/;"	d	file:
DDR2_CONF_TWL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_TWL(/;"	d	file:
DDR2_CONF_TWL_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_TWL_M /;"	d	file:
DDR2_CONF_TWL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_TWL_M /;"	d	file:
DDR2_CONF_TWL_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_TWL_S /;"	d	file:
DDR2_CONF_TWL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_TWL_S /;"	d	file:
DDR2_CONF_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_CONF_VAL /;"	d	file:
DDR2_CONF_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_CONF_VAL /;"	d	file:
DDR2_DDR3_BL_4	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDR2_DDR3_BL_4	/;"	d
DDR2_DDR3_BL_8	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDR2_DDR3_BL_8	/;"	d
DDR2_DIMM_PARAMS_H	include/fsl_ddr_dimm_params.h	/^#define DDR2_DIMM_PARAMS_H$/;"	d
DDR2_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDR2_EN	/;"	d
DDR2_EXT_MODE_OCD_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_EXT_MODE_OCD_VAL /;"	d	file:
DDR2_EXT_MODE_OCD_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_EXT_MODE_OCD_VAL /;"	d	file:
DDR2_EXT_MODE_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_EXT_MODE_VAL /;"	d	file:
DDR2_EXT_MODE_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_EXT_MODE_VAL /;"	d	file:
DDR2_MODE_DLL_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_MODE_DLL_VAL /;"	d	file:
DDR2_MODE_DLL_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_MODE_DLL_VAL /;"	d	file:
DDR2_MODE_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR2_MODE_VAL /;"	d	file:
DDR2_MODE_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_MODE_VAL /;"	d	file:
DDR2_RTT_150_OHM	include/fsl_ddr_sdram.h	/^#define DDR2_RTT_150_OHM	/;"	d
DDR2_RTT_50_OHM	include/fsl_ddr_sdram.h	/^#define DDR2_RTT_50_OHM	/;"	d
DDR2_RTT_75_OHM	include/fsl_ddr_sdram.h	/^#define DDR2_RTT_75_OHM	/;"	d
DDR2_RTT_OFF	include/fsl_ddr_sdram.h	/^#define DDR2_RTT_OFF	/;"	d
DDR2_SPD_DIMMTYPE_72B_SO_CDIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_72B_SO_CDIMM	/;"	d
DDR2_SPD_DIMMTYPE_72B_SO_RDIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_72B_SO_RDIMM	/;"	d
DDR2_SPD_DIMMTYPE_MICRO_DIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_MICRO_DIMM	/;"	d
DDR2_SPD_DIMMTYPE_MINI_RDIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_MINI_RDIMM	/;"	d
DDR2_SPD_DIMMTYPE_MINI_UDIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_MINI_UDIMM	/;"	d
DDR2_SPD_DIMMTYPE_RDIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_RDIMM	/;"	d
DDR2_SPD_DIMMTYPE_SO_DIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_SO_DIMM	/;"	d
DDR2_SPD_DIMMTYPE_UDIMM	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_UDIMM	/;"	d
DDR2_SPD_DIMMTYPE_UNDEFINED	include/ddr_spd.h	/^#define DDR2_SPD_DIMMTYPE_UNDEFINED	/;"	d
DDR2_START_ADDR	arch/arm/mach-davinci/lowlevel_init.S	/^DDR2_START_ADDR:$/;"	l
DDR2_TAP_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR2_TAP_VAL /;"	d	file:
DDR3	arch/arm/include/asm/arch-rockchip/sdram.h	/^	DDR3 = 3,$/;"	e	enum:__anoncf023d3e0103
DDR3	arch/x86/include/asm/arch-quark/mrc.h	/^	DDR3,$/;"	e	enum:__anon4be506e00303
DDR3	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
DDR3A_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^	DDR3A_PLL,$/;"	e	enum:__anonc27926650203
DDR3B_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^	DDR3B_PLL,$/;"	e	enum:__anonc27926650203
DDR3L	arch/x86/include/asm/arch-quark/mrc.h	/^	DDR3L$/;"	e	enum:__anon4be506e00303
DDR3PHY_CTRL_PHY_RESET	arch/arm/mach-exynos/exynos5_setup.h	/^#define DDR3PHY_CTRL_PHY_RESET	/;"	d
DDR3PHY_CTRL_PHY_RESET_OFF	arch/arm/mach-exynos/exynos5_setup.h	/^#define DDR3PHY_CTRL_PHY_RESET_OFF	/;"	d
DDR3_ADDRCTRL_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_ADDRCTRL_IOCTRL_VALUE /;"	d
DDR3_ADDRCTRL_WD0_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_ADDRCTRL_WD0_IOCTRL_VALUE /;"	d
DDR3_ADDRCTRL_WD1_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_ADDRCTRL_WD1_IOCTRL_VALUE /;"	d
DDR3_ADDR_1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR3_ADDR_1	/;"	d
DDR3_ADDR_2	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR3_ADDR_2	/;"	d
DDR3_DATA0_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_DATA0_IOCTRL_VALUE /;"	d
DDR3_DATA1_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_DATA1_IOCTRL_VALUE /;"	d
DDR3_DATA2_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_DATA2_IOCTRL_VALUE /;"	d
DDR3_DATA3_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  DDR3_DATA3_IOCTRL_VALUE /;"	d
DDR3_DLL_DISABLE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDR3_DLL_DISABLE	/;"	d
DDR3_DLL_RESET	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define DDR3_DLL_RESET	/;"	d	file:
DDR3_EDMA_BCNT	arch/arm/mach-keystone/ddr3.c	/^#define DDR3_EDMA_BCNT	/;"	d	file:
DDR3_EDMA_BLK_SIZE	arch/arm/mach-keystone/ddr3.c	/^#define DDR3_EDMA_BLK_SIZE	/;"	d	file:
DDR3_EDMA_BLK_SIZE_SHIFT	arch/arm/mach-keystone/ddr3.c	/^#define DDR3_EDMA_BLK_SIZE_SHIFT	/;"	d	file:
DDR3_EDMA_CCNT	arch/arm/mach-keystone/ddr3.c	/^#define DDR3_EDMA_CCNT	/;"	d	file:
DDR3_EDMA_SLOT_NUM	arch/arm/mach-keystone/ddr3.c	/^#define DDR3_EDMA_SLOT_NUM	/;"	d	file:
DDR3_EDMA_XF_SIZE	arch/arm/mach-keystone/ddr3.c	/^#define DDR3_EDMA_XF_SIZE	/;"	d	file:
DDR3_EMRS1_DIC_34	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_DIC_34	/;"	d
DDR3_EMRS1_DIC_40	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_DIC_40	/;"	d
DDR3_EMRS1_RTTNOM_0	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_RTTNOM_0	/;"	d
DDR3_EMRS1_RTTNOM_120	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_RTTNOM_120	/;"	d
DDR3_EMRS1_RTTNOM_20	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_RTTNOM_20	/;"	d
DDR3_EMRS1_RTTNOM_30	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_RTTNOM_30	/;"	d
DDR3_EMRS1_RTTNOM_40	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_RTTNOM_40	/;"	d
DDR3_EMRS1_RTTNOM_60	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS1_RTTNOM_60	/;"	d
DDR3_EMRS2_RTTWR_120	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS2_RTTWR_120	/;"	d
DDR3_EMRS2_RTTWR_60	arch/x86/cpu/quark/smc.h	/^#define DDR3_EMRS2_RTTWR_60	/;"	d
DDR3_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDR3_EN	/;"	d
DDR3_FULL_LVL	arch/arm/include/asm/emif.h	/^#define DDR3_FULL_LVL	/;"	d
DDR3_INC_LVL	arch/arm/include/asm/emif.h	/^#define DDR3_INC_LVL	/;"	d
DDR3_IS_16BIT_DRAM_MODE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR3_IS_16BIT_DRAM_MODE(/;"	d
DDR3_IS_ECC_PUP3_MODE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR3_IS_ECC_PUP3_MODE(/;"	d
DDR3_IS_ECC_PUP4_MODE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR3_IS_ECC_PUP4_MODE(/;"	d
DDR3_LOG_LEVEL	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define	DDR3_LOG_LEVEL	/;"	d
DDR3_MR0_BL8	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DDR3_MR0_BL8 /;"	d
DDR3_MR0_BL8	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DDR3_MR0_BL8 /;"	d
DDR3_MR0_CL	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DDR3_MR0_CL(/;"	d
DDR3_MR0_CL	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DDR3_MR0_CL(/;"	d
DDR3_MR0_PPD_FAST_EXIT	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DDR3_MR0_PPD_FAST_EXIT /;"	d
DDR3_MR0_PPD_FAST_EXIT	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DDR3_MR0_PPD_FAST_EXIT /;"	d
DDR3_MR0_WR	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DDR3_MR0_WR(/;"	d
DDR3_MR0_WR	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DDR3_MR0_WR(/;"	d
DDR3_MR1_RTT120OHM	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DDR3_MR1_RTT120OHM /;"	d
DDR3_MR1_RTT120OHM	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DDR3_MR1_RTT120OHM /;"	d
DDR3_MR2_TWL	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DDR3_MR2_TWL(/;"	d
DDR3_MR2_TWL	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DDR3_MR2_TWL(/;"	d
DDR3_PBS	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DDR3_PBS /;"	d
DDR3_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^#define DDR3_PLL /;"	d
DDR3_PLL_200	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define DDR3_PLL_200	/;"	d
DDR3_PLL_200	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define DDR3_PLL_200(/;"	d
DDR3_PLL_200	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define DDR3_PLL_200	/;"	d
DDR3_PLL_333	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define DDR3_PLL_333	/;"	d
DDR3_PLL_333	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define DDR3_PLL_333(/;"	d
DDR3_PLL_333	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define DDR3_PLL_333	/;"	d
DDR3_PLL_400	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define DDR3_PLL_400	/;"	d
DDR3_PLL_400	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define DDR3_PLL_400(/;"	d
DDR3_PLL_400	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define DDR3_PLL_400	/;"	d
DDR3_PLL_800	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define DDR3_PLL_800	/;"	d
DDR3_PLL_800	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define DDR3_PLL_800(/;"	d
DDR3_PLL_800	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define DDR3_PLL_800	/;"	d
DDR3_RD_LVL_GATE_INT	arch/arm/include/asm/emif.h	/^#define DDR3_RD_LVL_GATE_INT	/;"	d
DDR3_RD_LVL_INT	arch/arm/include/asm/emif.h	/^#define DDR3_RD_LVL_INT	/;"	d
DDR3_RTT_120_OHM	include/fsl_ddr_sdram.h	/^#define DDR3_RTT_120_OHM	/;"	d
DDR3_RTT_20_OHM	include/fsl_ddr_sdram.h	/^#define DDR3_RTT_20_OHM	/;"	d
DDR3_RTT_30_OHM	include/fsl_ddr_sdram.h	/^#define DDR3_RTT_30_OHM	/;"	d
DDR3_RTT_40_OHM	include/fsl_ddr_sdram.h	/^#define DDR3_RTT_40_OHM	/;"	d
DDR3_RTT_60_OHM	include/fsl_ddr_sdram.h	/^#define DDR3_RTT_60_OHM	/;"	d
DDR3_RTT_OFF	include/fsl_ddr_sdram.h	/^#define DDR3_RTT_OFF	/;"	d
DDR3_RUN_SW_WHEN_HW_FAIL	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DDR3_RUN_SW_WHEN_HW_FAIL /;"	d
DDR3_SPD_MODULETYPE_16B_SO_DIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_16B_SO_DIMM	/;"	d
DDR3_SPD_MODULETYPE_32B_SO_DIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_32B_SO_DIMM	/;"	d
DDR3_SPD_MODULETYPE_72B_SO_CDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_72B_SO_CDIMM	/;"	d
DDR3_SPD_MODULETYPE_72B_SO_RDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_72B_SO_RDIMM	/;"	d
DDR3_SPD_MODULETYPE_72B_SO_UDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_72B_SO_UDIMM	/;"	d
DDR3_SPD_MODULETYPE_LRDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_LRDIMM	/;"	d
DDR3_SPD_MODULETYPE_MASK	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_MASK	/;"	d
DDR3_SPD_MODULETYPE_MICRO_DIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_MICRO_DIMM	/;"	d
DDR3_SPD_MODULETYPE_MINI_CDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_MINI_CDIMM	/;"	d
DDR3_SPD_MODULETYPE_MINI_RDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_MINI_RDIMM	/;"	d
DDR3_SPD_MODULETYPE_MINI_UDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_MINI_UDIMM	/;"	d
DDR3_SPD_MODULETYPE_RDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_RDIMM	/;"	d
DDR3_SPD_MODULETYPE_SO_DIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_SO_DIMM	/;"	d
DDR3_SPD_MODULETYPE_UDIMM	include/ddr_spd.h	/^#define DDR3_SPD_MODULETYPE_UDIMM	/;"	d
DDR3_TIP_VERSION_STRING	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define DDR3_TIP_VERSION_STRING /;"	d
DDR3_TRAINING_DEBUG	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DDR3_TRAINING_DEBUG	/;"	d
DDR3_WR_LVL_INT	arch/arm/include/asm/emif.h	/^#define DDR3_WR_LVL_INT	/;"	d
DDR4	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
DDR4_ADDR_1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR4_ADDR_1	/;"	d
DDR4_ADDR_2	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR4_ADDR_2	/;"	d
DDR4_RTT_120_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_120_OHM	/;"	d
DDR4_RTT_240_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_240_OHM	/;"	d
DDR4_RTT_34_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_34_OHM	/;"	d
DDR4_RTT_40_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_40_OHM	/;"	d
DDR4_RTT_48_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_48_OHM	/;"	d
DDR4_RTT_60_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_60_OHM	/;"	d
DDR4_RTT_80_OHM	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_80_OHM	/;"	d
DDR4_RTT_OFF	include/fsl_ddr_sdram.h	/^#define DDR4_RTT_OFF	/;"	d
DDR4_SPD_MODULETYPE_16B_SO_DIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_16B_SO_DIMM	/;"	d
DDR4_SPD_MODULETYPE_32B_SO_DIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_32B_SO_DIMM	/;"	d
DDR4_SPD_MODULETYPE_72B_SO_RDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_72B_SO_RDIMM	/;"	d
DDR4_SPD_MODULETYPE_72B_SO_UDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_72B_SO_UDIMM	/;"	d
DDR4_SPD_MODULETYPE_EXT	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_EXT	/;"	d
DDR4_SPD_MODULETYPE_LRDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_LRDIMM	/;"	d
DDR4_SPD_MODULETYPE_MASK	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_MASK	/;"	d
DDR4_SPD_MODULETYPE_MINI_RDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_MINI_RDIMM	/;"	d
DDR4_SPD_MODULETYPE_MINI_UDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_MINI_UDIMM	/;"	d
DDR4_SPD_MODULETYPE_RDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_RDIMM	/;"	d
DDR4_SPD_MODULETYPE_SO_DIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_SO_DIMM	/;"	d
DDR4_SPD_MODULETYPE_UDIMM	include/ddr_spd.h	/^#define DDR4_SPD_MODULETYPE_UDIMM	/;"	d
DDRCDR_DDR_CFG	include/mpc83xx.h	/^#define DDRCDR_DDR_CFG	/;"	d
DDRCDR_DHC_EN	include/mpc83xx.h	/^#define DDRCDR_DHC_EN	/;"	d
DDRCDR_EN	include/mpc83xx.h	/^#define DDRCDR_EN	/;"	d
DDRCDR_M_ODR	include/mpc83xx.h	/^#define DDRCDR_M_ODR	/;"	d
DDRCDR_NZ	include/mpc83xx.h	/^#define DDRCDR_NZ	/;"	d
DDRCDR_NZ_HIZ	include/mpc83xx.h	/^#define DDRCDR_NZ_HIZ	/;"	d
DDRCDR_NZ_LOZ	include/mpc83xx.h	/^#define DDRCDR_NZ_LOZ	/;"	d
DDRCDR_NZ_MAXZ	include/mpc83xx.h	/^#define DDRCDR_NZ_MAXZ	/;"	d
DDRCDR_NZ_MINZ	include/mpc83xx.h	/^#define DDRCDR_NZ_MINZ	/;"	d
DDRCDR_NZ_NOMZ	include/mpc83xx.h	/^#define DDRCDR_NZ_NOMZ	/;"	d
DDRCDR_ODT	include/mpc83xx.h	/^#define DDRCDR_ODT	/;"	d
DDRCDR_PZ	include/mpc83xx.h	/^#define DDRCDR_PZ	/;"	d
DDRCDR_PZ_HIZ	include/mpc83xx.h	/^#define DDRCDR_PZ_HIZ	/;"	d
DDRCDR_PZ_LOZ	include/mpc83xx.h	/^#define DDRCDR_PZ_LOZ	/;"	d
DDRCDR_PZ_MAXZ	include/mpc83xx.h	/^#define DDRCDR_PZ_MAXZ	/;"	d
DDRCDR_PZ_MINZ	include/mpc83xx.h	/^#define DDRCDR_PZ_MINZ	/;"	d
DDRCDR_PZ_NOMZ	include/mpc83xx.h	/^#define DDRCDR_PZ_NOMZ	/;"	d
DDRCDR_Q_DRN	include/mpc83xx.h	/^#define DDRCDR_Q_DRN	/;"	d
DDRCMD_EMR_OCD	include/configs/mpc5121ads.h	/^#define DDRCMD_EMR_OCD(/;"	d
DDRCMD_MODE_REG	include/configs/mpc5121ads.h	/^#define DDRCMD_MODE_REG(/;"	d
DDRCOMP_CH_OFFSET	arch/x86/cpu/quark/smc.h	/^#define DDRCOMP_CH_OFFSET	/;"	d
DDRCTL	arch/arm/mach-davinci/lowlevel_init.S	/^DDRCTL:$/;"	l
DDRCTL_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^DDRCTL_VAL:$/;"	l
DDRCTRL_PSRST_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DDRCTRL_PSRST_SHIFT	= 11,$/;"	e	enum:__anon375ccd790103
DDRCTRL_SRST_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DDRCTRL_SRST_SHIFT	= 10,$/;"	e	enum:__anon375ccd790103
DDRC_DEBUG20_INIT_DONE	drivers/ddr/fsl/util.c	/^#define DDRC_DEBUG20_INIT_DONE	/;"	d	file:
DDRC_DEBUG2_RF	drivers/ddr/fsl/util.c	/^#define DDRC_DEBUG2_RF	/;"	d	file:
DDRC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define DDRC_IPS_BASE_ADDR /;"	d
DDRFREQ_1066	arch/x86/include/asm/arch-quark/mrc.h	/^	DDRFREQ_1066$/;"	e	enum:__anon4be506e00203
DDRFREQ_800	arch/x86/include/asm/arch-quark/mrc.h	/^	DDRFREQ_800,$/;"	e	enum:__anon4be506e00203
DDRIOCCC_CH_OFFSET	arch/x86/cpu/quark/smc.h	/^#define DDRIOCCC_CH_OFFSET	/;"	d
DDRIODQ_BL_OFFSET	arch/x86/cpu/quark/smc.h	/^#define DDRIODQ_BL_OFFSET	/;"	d
DDRIODQ_CH_OFFSET	arch/x86/cpu/quark/smc.h	/^#define DDRIODQ_CH_OFFSET	/;"	d
DDRMC_CR00_DRAM_CLASS_DDR3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR00_DRAM_CLASS_DDR3	/;"	d
DDRMC_CR00_DRAM_CLASS_LPDDR2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR00_DRAM_CLASS_LPDDR2	/;"	d
DDRMC_CR00_START	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR00_START	/;"	d
DDRMC_CR02_DRAM_TINIT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR02_DRAM_TINIT(/;"	d
DDRMC_CR102_RDLVL_GT_REGEN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR102_RDLVL_GT_REGEN	/;"	d
DDRMC_CR102_RDLVL_REG_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR102_RDLVL_REG_EN	/;"	d
DDRMC_CR105_RDLVL_DL_0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR105_RDLVL_DL_0(/;"	d
DDRMC_CR106_RDLVL_GTDL_0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR106_RDLVL_GTDL_0(/;"	d
DDRMC_CR10_TRST_PWRON	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR10_TRST_PWRON(/;"	d
DDRMC_CR110_RDLVL_DL_1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR110_RDLVL_DL_1(/;"	d
DDRMC_CR110_RDLVL_GTDL_1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR110_RDLVL_GTDL_1(/;"	d
DDRMC_CR114_RDLVL_GTDL_2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR114_RDLVL_GTDL_2(/;"	d
DDRMC_CR115_RDLVL_GTDL_2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR115_RDLVL_GTDL_2(/;"	d
DDRMC_CR117_AXI0_R_PRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR117_AXI0_R_PRI(/;"	d
DDRMC_CR117_AXI0_W_PRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR117_AXI0_W_PRI(/;"	d
DDRMC_CR118_AXI1_R_PRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR118_AXI1_R_PRI(/;"	d
DDRMC_CR118_AXI1_W_PRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR118_AXI1_W_PRI(/;"	d
DDRMC_CR11_CKE_INACTIVE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR11_CKE_INACTIVE(/;"	d
DDRMC_CR120_AXI0_PRI0_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR120_AXI0_PRI0_RPRI(/;"	d
DDRMC_CR120_AXI0_PRI1_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR120_AXI0_PRI1_RPRI(/;"	d
DDRMC_CR121_AXI0_PRI2_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR121_AXI0_PRI2_RPRI(/;"	d
DDRMC_CR121_AXI0_PRI3_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR121_AXI0_PRI3_RPRI(/;"	d
DDRMC_CR122_AXI0_PRIRLX	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR122_AXI0_PRIRLX(/;"	d
DDRMC_CR122_AXI1_PRI0_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR122_AXI1_PRI0_RPRI(/;"	d
DDRMC_CR122_AXI1_PRI1_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR122_AXI1_PRI1_RPRI(/;"	d
DDRMC_CR123_AXI1_PRI2_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR123_AXI1_PRI2_RPRI(/;"	d
DDRMC_CR123_AXI1_PRI3_RPRI	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR123_AXI1_PRI3_RPRI(/;"	d
DDRMC_CR123_AXI1_P_ODR_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR123_AXI1_P_ODR_EN	/;"	d
DDRMC_CR124_AXI1_PRIRLX	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR124_AXI1_PRIRLX(/;"	d
DDRMC_CR126_PHY_RDLAT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR126_PHY_RDLAT(/;"	d
DDRMC_CR12_CASLAT_LIN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR12_CASLAT_LIN(/;"	d
DDRMC_CR12_WRLAT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR12_WRLAT(/;"	d
DDRMC_CR132_RDLAT_ADJ	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR132_RDLAT_ADJ(/;"	d
DDRMC_CR132_WRLAT_ADJ	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR132_WRLAT_ADJ(/;"	d
DDRMC_CR137_PHYCTL_DL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR137_PHYCTL_DL(/;"	d
DDRMC_CR138_PHYDRAM_CK_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR138_PHYDRAM_CK_EN(/;"	d
DDRMC_CR138_PHY_WRLV_MXDL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR138_PHY_WRLV_MXDL(/;"	d
DDRMC_CR139_PHY_WRLV_DLL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR139_PHY_WRLV_DLL(/;"	d
DDRMC_CR139_PHY_WRLV_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR139_PHY_WRLV_EN(/;"	d
DDRMC_CR139_PHY_WRLV_LOAD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR139_PHY_WRLV_LOAD(/;"	d
DDRMC_CR139_PHY_WRLV_RESPLAT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR139_PHY_WRLV_RESPLAT(/;"	d
DDRMC_CR13_TBST_INT_INTERVAL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR13_TBST_INT_INTERVAL(/;"	d
DDRMC_CR13_TCCD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR13_TCCD(/;"	d
DDRMC_CR13_TRC	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR13_TRC(/;"	d
DDRMC_CR13_TRRD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR13_TRRD(/;"	d
DDRMC_CR140_PHY_WRLV_WW	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR140_PHY_WRLV_WW(/;"	d
DDRMC_CR143_RDLV_GAT_MXDL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR143_RDLV_GAT_MXDL(/;"	d
DDRMC_CR143_RDLV_MXDL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR143_RDLV_MXDL(/;"	d
DDRMC_CR144_PHY_RDLVL_RES	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR144_PHY_RDLVL_RES(/;"	d
DDRMC_CR144_PHY_RDLV_DLL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR144_PHY_RDLV_DLL(/;"	d
DDRMC_CR144_PHY_RDLV_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR144_PHY_RDLV_EN(/;"	d
DDRMC_CR144_PHY_RDLV_LOAD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR144_PHY_RDLV_LOAD(/;"	d
DDRMC_CR145_PHY_RDLV_RR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR145_PHY_RDLV_RR(/;"	d
DDRMC_CR146_PHY_RDLVL_RESP	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR146_PHY_RDLVL_RESP(/;"	d
DDRMC_CR147_RDLV_RESP_MASK	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR147_RDLV_RESP_MASK(/;"	d
DDRMC_CR148_RDLV_GATE_RESP_MASK	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR148_RDLV_GATE_RESP_MASK(/;"	d
DDRMC_CR14_TFAW	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR14_TFAW(/;"	d
DDRMC_CR14_TRAS_MIN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR14_TRAS_MIN(/;"	d
DDRMC_CR14_TRP	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR14_TRP(/;"	d
DDRMC_CR14_TWTR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR14_TWTR(/;"	d
DDRMC_CR151_RDLVL_DQ_ZERO_CNT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR151_RDLVL_DQ_ZERO_CNT(/;"	d
DDRMC_CR151_RDLV_GAT_DQ_ZERO_CNT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR151_RDLV_GAT_DQ_ZERO_CNT(/;"	d
DDRMC_CR154_DDR_SEL_PAD_CONTR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR154_DDR_SEL_PAD_CONTR(/;"	d
DDRMC_CR154_PAD_ZQ_EARLY_CMP_EN_TIMER	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR154_PAD_ZQ_EARLY_CMP_EN_TIMER(/;"	d
DDRMC_CR154_PAD_ZQ_HW_FOR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR154_PAD_ZQ_HW_FOR(/;"	d
DDRMC_CR154_PAD_ZQ_MODE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR154_PAD_ZQ_MODE(/;"	d
DDRMC_CR155_AXI0_AWCACHE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR155_AXI0_AWCACHE	/;"	d
DDRMC_CR155_PAD_ODT_BYTE0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR155_PAD_ODT_BYTE0(/;"	d
DDRMC_CR155_PAD_ODT_BYTE1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR155_PAD_ODT_BYTE1(/;"	d
DDRMC_CR158_TWR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR158_TWR(/;"	d
DDRMC_CR161_ODT_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR161_ODT_EN(/;"	d
DDRMC_CR161_TODTH_RD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR161_TODTH_RD(/;"	d
DDRMC_CR161_TODTH_WR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR161_TODTH_WR(/;"	d
DDRMC_CR16_TMRD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR16_TMRD(/;"	d
DDRMC_CR16_TRTP	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR16_TRTP(/;"	d
DDRMC_CR17_TMOD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR17_TMOD(/;"	d
DDRMC_CR17_TRAS_MAX	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR17_TRAS_MAX(/;"	d
DDRMC_CR18_TCKE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR18_TCKE(/;"	d
DDRMC_CR18_TCKESR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR18_TCKESR(/;"	d
DDRMC_CR20_AP_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR20_AP_EN	/;"	d
DDRMC_CR21_CCMAP_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR21_CCMAP_EN	/;"	d
DDRMC_CR21_TRAS_LOCKOUT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR21_TRAS_LOCKOUT(/;"	d
DDRMC_CR21_TRCD_INT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR21_TRCD_INT(/;"	d
DDRMC_CR22_TDAL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR22_TDAL(/;"	d
DDRMC_CR23_BSTLEN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR23_BSTLEN(/;"	d
DDRMC_CR23_TDLL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR23_TDLL(/;"	d
DDRMC_CR24_TRP_AB	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR24_TRP_AB(/;"	d
DDRMC_CR25_TREF_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR25_TREF_EN	/;"	d
DDRMC_CR26_TREF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR26_TREF(/;"	d
DDRMC_CR26_TRFC	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR26_TRFC(/;"	d
DDRMC_CR28_TREF_INT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR28_TREF_INT(/;"	d
DDRMC_CR29_TPDEX	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR29_TPDEX(/;"	d
DDRMC_CR30_TXPDLL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR30_TXPDLL(/;"	d
DDRMC_CR31_TXSNR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR31_TXSNR(/;"	d
DDRMC_CR31_TXSR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR31_TXSR(/;"	d
DDRMC_CR33_EN_QK_SREF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR33_EN_QK_SREF	/;"	d
DDRMC_CR34_CKSRE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR34_CKSRE(/;"	d
DDRMC_CR34_CKSRX	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR34_CKSRX(/;"	d
DDRMC_CR38_FREQ_CHG_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR38_FREQ_CHG_EN(/;"	d
DDRMC_CR39_FRQ_CH_DLLOFF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR39_FRQ_CH_DLLOFF(/;"	d
DDRMC_CR39_PHY_INI_COM	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR39_PHY_INI_COM(/;"	d
DDRMC_CR39_PHY_INI_STA	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR39_PHY_INI_STA(/;"	d
DDRMC_CR41_PHY_INI_STRT_INI_DIS	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR41_PHY_INI_STRT_INI_DIS	/;"	d
DDRMC_CR48_MR0_DA_0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR48_MR0_DA_0(/;"	d
DDRMC_CR48_MR1_DA_0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR48_MR1_DA_0(/;"	d
DDRMC_CR66_ZQCL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR66_ZQCL(/;"	d
DDRMC_CR66_ZQINIT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR66_ZQINIT(/;"	d
DDRMC_CR67_ZQCS	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR67_ZQCS(/;"	d
DDRMC_CR69_ZQ_ON_SREF_EX	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR69_ZQ_ON_SREF_EX(/;"	d
DDRMC_CR70_REF_PER_ZQ	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR70_REF_PER_ZQ(/;"	d
DDRMC_CR72_ZQCS_ROTATE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR72_ZQCS_ROTATE(/;"	d
DDRMC_CR73_APREBIT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR73_APREBIT(/;"	d
DDRMC_CR73_COL_DIFF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR73_COL_DIFF(/;"	d
DDRMC_CR73_ROW_DIFF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR73_ROW_DIFF(/;"	d
DDRMC_CR74_ADDR_CMP_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR74_ADDR_CMP_EN	/;"	d
DDRMC_CR74_AGE_CNT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR74_AGE_CNT(/;"	d
DDRMC_CR74_BANKSPLT_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR74_BANKSPLT_EN	/;"	d
DDRMC_CR74_CMD_AGE_CNT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR74_CMD_AGE_CNT(/;"	d
DDRMC_CR75_PLEN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR75_PLEN	/;"	d
DDRMC_CR75_PRI_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR75_PRI_EN	/;"	d
DDRMC_CR75_RW_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR75_RW_EN	/;"	d
DDRMC_CR75_RW_PG_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR75_RW_PG_EN	/;"	d
DDRMC_CR76_CS_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR76_CS_EN	/;"	d
DDRMC_CR76_D_RW_G_BKCN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR76_D_RW_G_BKCN(/;"	d
DDRMC_CR76_NQENT_ACTDIS	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR76_NQENT_ACTDIS(/;"	d
DDRMC_CR76_W2R_SPLT_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR76_W2R_SPLT_EN	/;"	d
DDRMC_CR77_CS_MAP	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR77_CS_MAP	/;"	d
DDRMC_CR77_DI_RD_INTLEAVE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR77_DI_RD_INTLEAVE	/;"	d
DDRMC_CR77_SWAP_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR77_SWAP_EN	/;"	d
DDRMC_CR78_BUR_ON_FLY_BIT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR78_BUR_ON_FLY_BIT(/;"	d
DDRMC_CR78_Q_FULLNESS	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR78_Q_FULLNESS(/;"	d
DDRMC_CR79_CTLUPD_AREF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR79_CTLUPD_AREF(/;"	d
DDRMC_CR82_INT_MASK	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR82_INT_MASK	/;"	d
DDRMC_CR87_ODT_RD_MAPCS0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR87_ODT_RD_MAPCS0(/;"	d
DDRMC_CR87_ODT_WR_MAPCS0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR87_ODT_WR_MAPCS0(/;"	d
DDRMC_CR88_TODTL_CMD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR88_TODTL_CMD(/;"	d
DDRMC_CR89_AODT_RWSMCS	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR89_AODT_RWSMCS(/;"	d
DDRMC_CR91_R2W_SMCSDL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR91_R2W_SMCSDL(/;"	d
DDRMC_CR96_WLDQSEN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR96_WLDQSEN(/;"	d
DDRMC_CR96_WLMRD	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR96_WLMRD(/;"	d
DDRMC_CR97_WRLVL_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR97_WRLVL_EN	/;"	d
DDRMC_CR98_WRLVL_DL_0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR98_WRLVL_DL_0(/;"	d
DDRMC_CR99_WRLVL_DL_1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_CR99_WRLVL_DL_1(/;"	d
DDRMC_PHY50_DDR3_MODE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY50_DDR3_MODE	/;"	d
DDRMC_PHY50_EN_SW_HALF_CYCLE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY50_EN_SW_HALF_CYCLE	/;"	d
DDRMC_PHY_CTRL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_CTRL	/;"	d
DDRMC_PHY_DQS_TIMING	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_DQS_TIMING	/;"	d
DDRMC_PHY_DQ_TIMING	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_DQ_TIMING	/;"	d
DDRMC_PHY_MASTER_CTRL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_MASTER_CTRL	/;"	d
DDRMC_PHY_OFF	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_OFF	/;"	d
DDRMC_PHY_PROC_PAD_ODT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_PROC_PAD_ODT	/;"	d
DDRMC_PHY_SLAVE_CTRL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDRMC_PHY_SLAVE_CTRL	/;"	d
DDRMD_DDR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_DDR	/;"	d
DDRMD_DDR2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_DDR2	/;"	d
DDRMD_DDR3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_DDR3	/;"	d
DDRMD_LPDDR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_LPDDR	/;"	d
DDRMD_LPDDR2_LPDDR3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_LPDDR2_LPDDR3	/;"	d
DDRMD_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_MASK	/;"	d
DDRMD_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DDRMD_SHIFT	/;"	d
DDRPHY	arch/x86/cpu/quark/mrc_util.h	/^#define DDRPHY	/;"	d
DDRPHY_0_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDRPHY_0_CONFIG_BASE	/;"	d
DDRPHY_0_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDRPHY_0_CONFIG_BASE	/;"	d
DDRPHY_0_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDRPHY_0_CONFIG_BASE	/;"	d
DDRPHY_1_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDRPHY_1_CONFIG_BASE	/;"	d
DDRPHY_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDRPHY_CONFIG_BASE	/;"	d
DDRPHY_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDRPHY_CONFIG_BASE	/;"	d
DDRPHY_CONFIG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDRPHY_CONFIG_BASE	/;"	d
DDRPHY_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define DDRPHY_IPS_BASE_ADDR /;"	d
DDRPHY_PSRST_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DDRPHY_PSRST_SHIFT	= 9,$/;"	e	enum:__anon375ccd790103
DDRPHY_SRST_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DDRPHY_SRST_SHIFT	= 8,$/;"	e	enum:__anon375ccd790103
DDRPNCNT	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define DDRPNCNT /;"	d
DDRP_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define DDRP_BASE	/;"	d
DDRSD_START_A	board/renesas/sh7763rdp/lowlevel_init.S	/^DDRSD_START_A:	.long	0xAC000000$/;"	l
DDRVREFCNT	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define DDRVREFCNT /;"	d
DDRVTPR	arch/arm/mach-davinci/lowlevel_init.S	/^DDRVTPR:$/;"	l
DDR_07_V	board/spear/common/spr_lowlevel_init.S	/^DDR_07_V:$/;"	l
DDR_100	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_100	/;"	d
DDR_100	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_100	/;"	d
DDR_111	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_111	/;"	d
DDR_133	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_133	/;"	d
DDR_165	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_165	/;"	d
DDR_16BIT_256MB	board/compulab/cm_fx6/spl.c	/^	DDR_16BIT_256MB,$/;"	e	enum:ddr_config	file:
DDR_300	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_300	/;"	d
DDR_32BIT_1GB	board/compulab/cm_fx6/spl.c	/^	DDR_32BIT_1GB,$/;"	e	enum:ddr_config	file:
DDR_32BIT_512MB	board/compulab/cm_fx6/spl.c	/^	DDR_32BIT_512MB,$/;"	e	enum:ddr_config	file:
DDR_333	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_333	/;"	d
DDR_360	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_360	/;"	d
DDR_400	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_400	/;"	d
DDR_444	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_444	/;"	d
DDR_500	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_500	/;"	d
DDR_533	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_533	/;"	d
DDR_57_V	board/spear/common/spr_lowlevel_init.S	/^DDR_57_V:$/;"	l
DDR_600	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_600	/;"	d
DDR_640	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_640	/;"	d
DDR_64BIT_1GB	board/compulab/cm_fx6/spl.c	/^	DDR_64BIT_1GB,$/;"	e	enum:ddr_config	file:
DDR_64BIT_2GB	board/compulab/cm_fx6/spl.c	/^	DDR_64BIT_2GB,$/;"	e	enum:ddr_config	file:
DDR_64BIT_4GB	board/compulab/cm_fx6/spl.c	/^	DDR_64BIT_4GB,$/;"	e	enum:ddr_config	file:
DDR_666	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_666	/;"	d
DDR_720	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_720	/;"	d
DDR_750	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_750	/;"	d
DDR_800	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_800	/;"	d
DDR_833	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_833	/;"	d
DDR_ACTIVE_V	board/spear/common/spr_lowlevel_init.S	/^DDR_ACTIVE_V:$/;"	l
DDR_BANK_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_BANK_MASK		= 1,$/;"	e	enum:__anon957231910603	file:
DDR_BANK_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_BANK_SHIFT		= 8,$/;"	e	enum:__anon957231910603	file:
DDR_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DDR_BASE_ADDR	/;"	d
DDR_BASE_ADDR	include/configs/s32v234evb.h	/^#define DDR_BASE_ADDR	/;"	d
DDR_BASE_CS_HIGH_MASK	arch/arm/mach-mvebu/mbus.c	/^#define  DDR_BASE_CS_HIGH_MASK /;"	d	file:
DDR_BASE_CS_LOW_MASK	arch/arm/mach-mvebu/mbus.c	/^#define  DDR_BASE_CS_LOW_MASK /;"	d	file:
DDR_BASE_CS_OFF	arch/arm/mach-mvebu/cpu.c	/^#define DDR_BASE_CS_OFF(/;"	d	file:
DDR_BASE_CS_OFF	arch/arm/mach-mvebu/mbus.c	/^#define DDR_BASE_CS_OFF(/;"	d	file:
DDR_BC4	include/fsl_ddr_sdram.h	/^#define DDR_BC4	/;"	d
DDR_BIST_COMP_CNT	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_COMP_CNT(/;"	d	file:
DDR_BIST_COMP_CNT_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_COMP_CNT_M /;"	d	file:
DDR_BIST_COMP_CNT_MASK	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_COMP_CNT_MASK /;"	d	file:
DDR_BIST_COMP_CNT_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_COMP_CNT_S /;"	d	file:
DDR_BIST_MASK_ADDR_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_MASK_ADDR_VAL /;"	d	file:
DDR_BIST_STATUS_DONE	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_STATUS_DONE /;"	d	file:
DDR_BIST_TEST_START	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BIST_TEST_START /;"	d	file:
DDR_BL4	include/fsl_ddr_sdram.h	/^#define DDR_BL4	/;"	d
DDR_BL8	include/fsl_ddr_sdram.h	/^#define DDR_BL8	/;"	d
DDR_BSTOPRE	include/mpc83xx.h	/^#define DDR_BSTOPRE	/;"	d
DDR_BUFF_LEN	board/freescale/common/sleep.h	/^#define DDR_BUFF_LEN	/;"	d
DDR_BURST2_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST2_VAL /;"	d	file:
DDR_BURST_CPU_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_CPU_MAX_BL(/;"	d	file:
DDR_BURST_CPU_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_CPU_MAX_BL_M /;"	d	file:
DDR_BURST_CPU_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_CPU_MAX_BL_S /;"	d	file:
DDR_BURST_CPU_PRI	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_CPU_PRI /;"	d	file:
DDR_BURST_CPU_PRI_BE	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_CPU_PRI_BE /;"	d	file:
DDR_BURST_GE0_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_GE0_MAX_BL(/;"	d	file:
DDR_BURST_GE0_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_GE0_MAX_BL_M /;"	d	file:
DDR_BURST_GE0_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_GE0_MAX_BL_S /;"	d	file:
DDR_BURST_GE1_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_GE1_MAX_BL(/;"	d	file:
DDR_BURST_GE1_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_GE1_MAX_BL_M /;"	d	file:
DDR_BURST_GE1_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_GE1_MAX_BL_S /;"	d	file:
DDR_BURST_LEN	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_BURST_LEN(/;"	d	file:
DDR_BURST_LEN	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_LEN(/;"	d	file:
DDR_BURST_LEN_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_BURST_LEN_M /;"	d	file:
DDR_BURST_LEN_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_LEN_M /;"	d	file:
DDR_BURST_LEN_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_BURST_LEN_S /;"	d	file:
DDR_BURST_LEN_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_LEN_S /;"	d	file:
DDR_BURST_PCIE_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_PCIE_MAX_BL(/;"	d	file:
DDR_BURST_PCIE_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_PCIE_MAX_BL_M /;"	d	file:
DDR_BURST_PCIE_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_PCIE_MAX_BL_S /;"	d	file:
DDR_BURST_RD_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_RD_MAX_BL(/;"	d	file:
DDR_BURST_RD_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_RD_MAX_BL_M /;"	d	file:
DDR_BURST_RD_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_RD_MAX_BL_S /;"	d	file:
DDR_BURST_RWP_MASK_EN	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_RWP_MASK_EN(/;"	d	file:
DDR_BURST_RWP_MASK_EN_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_RWP_MASK_EN_M /;"	d	file:
DDR_BURST_RWP_MASK_EN_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_RWP_MASK_EN_S /;"	d	file:
DDR_BURST_TYPE	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_BURST_TYPE /;"	d	file:
DDR_BURST_TYPE	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_TYPE /;"	d	file:
DDR_BURST_USB_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_USB_MAX_BL(/;"	d	file:
DDR_BURST_USB_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_USB_MAX_BL_M /;"	d	file:
DDR_BURST_USB_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_USB_MAX_BL_S /;"	d	file:
DDR_BURST_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_VAL /;"	d	file:
DDR_BURST_WMAC_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_WMAC_MAX_BL(/;"	d	file:
DDR_BURST_WMAC_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_WMAC_MAX_BL_M /;"	d	file:
DDR_BURST_WMAC_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_WMAC_MAX_BL_S /;"	d	file:
DDR_BURST_WR_MAX_BL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_WR_MAX_BL(/;"	d	file:
DDR_BURST_WR_MAX_BL_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_WR_MAX_BL_M /;"	d	file:
DDR_BURST_WR_MAX_BL_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_BURST_WR_MAX_BL_S /;"	d	file:
DDR_BW_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_BW_MASK		= 3,$/;"	e	enum:__anon957231910603	file:
DDR_BW_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_BW_SHIFT		= 2,$/;"	e	enum:__anon957231910603	file:
DDR_CASLAT_25	include/configs/TQM834x.h	/^#define DDR_CASLAT_25	/;"	d
DDR_CAS_2	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^	DDR_CAS_2      = 20,$/;"	e	enum:ddr_cas_id	file:
DDR_CAS_2_5	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^	DDR_CAS_2_5    = 25,$/;"	e	enum:ddr_cas_id	file:
DDR_CAS_3	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^	DDR_CAS_3      = 30,$/;"	e	enum:ddr_cas_id	file:
DDR_CAS_4	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^	DDR_CAS_4      = 40,$/;"	e	enum:ddr_cas_id	file:
DDR_CAS_5	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^	DDR_CAS_5      = 50$/;"	e	enum:ddr_cas_id	file:
DDR_CAS_L	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CAS_L(/;"	d	file:
DDR_CAS_L	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CAS_L(/;"	d	file:
DDR_CAS_L_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CAS_L_M /;"	d	file:
DDR_CAS_L_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CAS_L_M /;"	d	file:
DDR_CAS_L_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CAS_L_S /;"	d	file:
DDR_CAS_L_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CAS_L_S /;"	d	file:
DDR_CAS_TO_PRE_SUB_MASK	include/fsl_ddr_sdram.h	/^#define DDR_CAS_TO_PRE_SUB_MASK /;"	d
DDR_CAS_TO_PRE_SUB_SHIFT	include/fsl_ddr_sdram.h	/^#define DDR_CAS_TO_PRE_SUB_SHIFT /;"	d
DDR_CDR1_DHC_EN	include/fsl_ddr_sdram.h	/^#define DDR_CDR1_DHC_EN	/;"	d
DDR_CDR1_ODT	include/fsl_ddr_sdram.h	/^#define DDR_CDR1_ODT(/;"	d
DDR_CDR1_ODT_MASK	include/fsl_ddr_sdram.h	/^#define DDR_CDR1_ODT_MASK	/;"	d
DDR_CDR1_ODT_SHIFT	include/fsl_ddr_sdram.h	/^#define DDR_CDR1_ODT_SHIFT	/;"	d
DDR_CDR2_ODT	include/fsl_ddr_sdram.h	/^#define DDR_CDR2_ODT(/;"	d
DDR_CDR2_ODT_MASK	include/fsl_ddr_sdram.h	/^#define DDR_CDR2_ODT_MASK	/;"	d
DDR_CDR2_VREF_OVRD	include/fsl_ddr_sdram.h	/^#define DDR_CDR2_VREF_OVRD(/;"	d
DDR_CDR2_VREF_RANGE_2	include/fsl_ddr_sdram.h	/^#define DDR_CDR2_VREF_RANGE_2	/;"	d
DDR_CDR2_VREF_TRAIN_EN	include/configs/ls1021atwr.h	/^#define DDR_CDR2_VREF_TRAIN_EN	/;"	d
DDR_CDR2_VREF_TRAIN_EN	include/fsl_ddr_sdram.h	/^#define DDR_CDR2_VREF_TRAIN_EN	/;"	d
DDR_CDR_ODT_100ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_100ohm	/;"	d
DDR_CDR_ODT_110ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_110ohm	/;"	d
DDR_CDR_ODT_120OHM	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_120OHM	/;"	d
DDR_CDR_ODT_120ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_120ohm	/;"	d
DDR_CDR_ODT_150ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_150ohm	/;"	d
DDR_CDR_ODT_180ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_180ohm	/;"	d
DDR_CDR_ODT_200ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_200ohm	/;"	d
DDR_CDR_ODT_30ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_30ohm	/;"	d
DDR_CDR_ODT_40ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_40ohm	/;"	d
DDR_CDR_ODT_43ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_43ohm	/;"	d
DDR_CDR_ODT_46ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_46ohm	/;"	d
DDR_CDR_ODT_47ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_47ohm	/;"	d
DDR_CDR_ODT_50ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_50ohm	/;"	d
DDR_CDR_ODT_55ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_55ohm	/;"	d
DDR_CDR_ODT_60hm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_60hm	/;"	d
DDR_CDR_ODT_60ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_60ohm	/;"	d
DDR_CDR_ODT_70ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_70ohm	/;"	d
DDR_CDR_ODT_75ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_75ohm	/;"	d
DDR_CDR_ODT_80ohm	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_80ohm	/;"	d
DDR_CDR_ODT_OFF	include/fsl_ddr_sdram.h	/^#define DDR_CDR_ODT_OFF	/;"	d
DDR_CHN_CNT_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_CHN_CNT_SHIFT	= 12,$/;"	e	enum:__anon957231910603	file:
DDR_CKE	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CKE /;"	d	file:
DDR_CKE	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CKE /;"	d	file:
DDR_CKE_CTRL_NORMAL	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define DDR_CKE_CTRL_NORMAL	/;"	d
DDR_CLKCTRL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DDR_CLKCTRL	/;"	d	file:
DDR_CLK_MHZ	board/phytec/pcm051/board.c	/^#define DDR_CLK_MHZ	/;"	d	file:
DDR_CNTL_OE_EN	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CNTL_OE_EN /;"	d	file:
DDR_CNTL_OE_EN	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CNTL_OE_EN /;"	d	file:
DDR_COL_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_COL_MASK		= 3,$/;"	e	enum:__anon957231910603	file:
DDR_COL_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_COL_SHIFT		= 9,$/;"	e	enum:__anon957231910603	file:
DDR_COMBO	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_COMBO	/;"	d
DDR_COMP_ACCURATE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define DDR_COMP_ACCURATE	/;"	d
DDR_CONF2_REG_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CONF2_REG_VAL /;"	d	file:
DDR_CONF_REG_VAL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CONF_REG_VAL /;"	d	file:
DDR_CONTROLLER_BUS_WIDTH_MULTIPLIER	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define DDR_CONTROLLER_BUS_WIDTH_MULTIPLIER	/;"	d
DDR_CONTROL_BASE_ADDR	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DDR_CONTROL_BASE_ADDR	/;"	d
DDR_CONTROL_LOW_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR_CONTROL_LOW_REG	/;"	d
DDR_CS0_BNDS	include/configs/ls1021atwr.h	/^#define DDR_CS0_BNDS	/;"	d
DDR_CS0_CONFIG	include/configs/ls1021atwr.h	/^#define DDR_CS0_CONFIG	/;"	d
DDR_CS0_CONFIG_2	include/configs/ls1021atwr.h	/^#define DDR_CS0_CONFIG_2	/;"	d
DDR_CS0_ROW_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_CS0_ROW_MASK	= 3,$/;"	e	enum:__anon957231910603	file:
DDR_CS0_ROW_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_CS0_ROW_SHIFT	= 6,$/;"	e	enum:__anon957231910603	file:
DDR_CS1_ROW_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_CS1_ROW_MASK	= 3,$/;"	e	enum:__anon957231910603	file:
DDR_CS1_ROW_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_CS1_ROW_SHIFT	= 4,$/;"	e	enum:__anon957231910603	file:
DDR_CSWL_CS0	include/fsl_ddr_sdram.h	/^#define DDR_CSWL_CS0	/;"	d
DDR_CTL_CONFIG_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_CONFIG_VAL /;"	d	file:
DDR_CTL_HALF_WIDTH	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_HALF_WIDTH /;"	d	file:
DDR_CTL_PAD_DDR2_SEL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_PAD_DDR2_SEL /;"	d	file:
DDR_CTL_SRAM_GE0_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_GE0_SYNC /;"	d	file:
DDR_CTL_SRAM_GE1_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_GE1_SYNC /;"	d	file:
DDR_CTL_SRAM_MISC1_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_MISC1_SYNC /;"	d	file:
DDR_CTL_SRAM_MISC2_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_MISC2_SYNC /;"	d	file:
DDR_CTL_SRAM_PCIE_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_PCIE_SYNC /;"	d	file:
DDR_CTL_SRAM_TSEL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_TSEL /;"	d	file:
DDR_CTL_SRAM_USB_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_USB_SYNC /;"	d	file:
DDR_CTL_SRAM_WMAC_SYNC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTL_SRAM_WMAC_SYNC /;"	d	file:
DDR_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DDR_CTRL_ADDR	/;"	d
DDR_CTRL_AUTO_REFRESH	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CTRL_AUTO_REFRESH /;"	d	file:
DDR_CTRL_AUTO_REFRESH	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTRL_AUTO_REFRESH /;"	d	file:
DDR_CTRL_PRECHARGE	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CTRL_PRECHARGE /;"	d	file:
DDR_CTRL_PRECHARGE	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTRL_PRECHARGE /;"	d	file:
DDR_CTRL_UPD_EMR2S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CTRL_UPD_EMR2S /;"	d	file:
DDR_CTRL_UPD_EMR2S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTRL_UPD_EMR2S /;"	d	file:
DDR_CTRL_UPD_EMR3S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CTRL_UPD_EMR3S /;"	d	file:
DDR_CTRL_UPD_EMR3S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTRL_UPD_EMR3S /;"	d	file:
DDR_CTRL_UPD_EMRS	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CTRL_UPD_EMRS /;"	d	file:
DDR_CTRL_UPD_EMRS	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTRL_UPD_EMRS /;"	d	file:
DDR_CTRL_UPD_MRS	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_CTRL_UPD_MRS /;"	d	file:
DDR_CTRL_UPD_MRS	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_CTRL_UPD_MRS /;"	d	file:
DDR_DATA_BUS_WIDTH_16	include/fsl_ddr_sdram.h	/^#define DDR_DATA_BUS_WIDTH_16 /;"	d
DDR_DATA_BUS_WIDTH_32	include/fsl_ddr_sdram.h	/^#define DDR_DATA_BUS_WIDTH_32 /;"	d
DDR_DATA_BUS_WIDTH_64	include/fsl_ddr_sdram.h	/^#define DDR_DATA_BUS_WIDTH_64 /;"	d
DDR_DATA_REGS_NR	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDR_DATA_REGS_NR	/;"	d
DDR_DATA_REGS_NR	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define DDR_DATA_REGS_NR	/;"	d
DDR_DATA_REGS_NR	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDR_DATA_REGS_NR	/;"	d
DDR_DATA_REGS_NR	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDR_DATA_REGS_NR	/;"	d
DDR_DCR_BASE	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^#define DDR_DCR_BASE /;"	d	file:
DDR_DDR_CDR1	include/configs/ls1021atwr.h	/^#define DDR_DDR_CDR1	/;"	d
DDR_DDR_CDR2	include/configs/ls1021atwr.h	/^#define DDR_DDR_CDR2	/;"	d
DDR_DDR_WRLVL_CNTL	include/configs/ls1021atwr.h	/^#define DDR_DDR_WRLVL_CNTL	/;"	d
DDR_DDR_WRLVL_CNTL_2	include/configs/ls1021atwr.h	/^#define DDR_DDR_WRLVL_CNTL_2	/;"	d
DDR_DDR_WRLVL_CNTL_3	include/configs/ls1021atwr.h	/^#define DDR_DDR_WRLVL_CNTL_3	/;"	d
DDR_DDR_ZQ_CNTL	include/configs/ls1021atwr.h	/^#define DDR_DDR_ZQ_CNTL	/;"	d
DDR_DIE_BW_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_DIE_BW_MASK		= 3,$/;"	e	enum:__anon957231910603	file:
DDR_DIE_BW_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_DIE_BW_SHIFT	= 0,$/;"	e	enum:__anon957231910603	file:
DDR_DISCRETE	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_DISCRETE	/;"	d
DDR_DLS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DDR_DLS	/;"	d
DDR_DUMMY_ACCESS_A	board/renesas/sh7785lcr/lowlevel_init.S	/^DDR_DUMMY_ACCESS_A:	.long	0x40000000$/;"	l
DDR_EOR_ADDR_HASH_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define DDR_EOR_ADDR_HASH_EN	/;"	d
DDR_EOR_RD_BDW_OPT_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define DDR_EOR_RD_BDW_OPT_DIS	/;"	d
DDR_EOR_RD_REOD_DIS	include/fsl_ddr_sdram.h	/^#define DDR_EOR_RD_REOD_DIS	/;"	d
DDR_EOR_WD_REOD_DIS	include/fsl_ddr_sdram.h	/^#define DDR_EOR_WD_REOD_DIS	/;"	d
DDR_ERR_DISABLE_APED	include/fsl_ddr_sdram.h	/^#define DDR_ERR_DISABLE_APED	/;"	d
DDR_FRACFREQ2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_FRACFREQ2	/;"	d	file:
DDR_FRACFREQ3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_FRACFREQ3	/;"	d	file:
DDR_FRACFREQ4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_FRACFREQ4	/;"	d	file:
DDR_FRACFREQ5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_FRACFREQ5	/;"	d	file:
DDR_FREQ	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define DDR_FREQ	/;"	d	file:
DDR_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define DDR_FREQ /;"	d
DDR_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define DDR_FREQ /;"	d
DDR_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define DDR_FREQ /;"	d
DDR_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define DDR_FREQ /;"	d
DDR_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define DDR_FREQ /;"	d
DDR_FREQ_1000	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_1000,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_1066	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_1066,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_300	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_300,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_311	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_311,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_333	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_333,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_360	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_360,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_400	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_400,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_467	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_467,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_533	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_533,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_600	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_600,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_667	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_667,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_800	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_800,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_850	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_850,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_900	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_900,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_933	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_933,$/;"	e	enum:hws_ddr_freq
DDR_FREQ_LIMIT	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_LIMIT$/;"	e	enum:hws_ddr_freq
DDR_FREQ_LOW_FREQ	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	DDR_FREQ_LOW_FREQ,$/;"	e	enum:hws_ddr_freq
DDR_G_OPEN_L	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_G_OPEN_L(/;"	d	file:
DDR_G_OPEN_L	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_G_OPEN_L(/;"	d	file:
DDR_G_OPEN_L_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_G_OPEN_L_M /;"	d	file:
DDR_G_OPEN_L_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_G_OPEN_L_M /;"	d	file:
DDR_G_OPEN_L_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_G_OPEN_L_S /;"	d	file:
DDR_G_OPEN_L_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_G_OPEN_L_S /;"	d	file:
DDR_HALF_WIDTH_LOW	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_HALF_WIDTH_LOW /;"	d	file:
DDR_HALF_WIDTH_LOW	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_HALF_WIDTH_LOW /;"	d	file:
DDR_HCAL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DDR_HCAL	/;"	d
DDR_HCLK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_HCLK	/;"	d
DDR_INIT_ADDR_EXT_UIA	include/fsl_ddr_sdram.h	/^#define DDR_INIT_ADDR_EXT_UIA	/;"	d
DDR_INTFREQ2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_INTFREQ2	/;"	d	file:
DDR_INTFREQ3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_INTFREQ3	/;"	d	file:
DDR_INTFREQ4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_INTFREQ4	/;"	d	file:
DDR_INTFREQ5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_INTFREQ5	/;"	d	file:
DDR_IOCTRL_VAL	include/configs/pxm2.h	/^#define DDR_IOCTRL_VAL	/;"	d
DDR_IO_0_DDR2_DQ_INT_EN_ALL_DDR3_CA_DIS_ALL	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_0_DDR2_DQ_INT_EN_ALL_DDR3_CA_DIS_ALL /;"	d
DDR_IO_0_VREF_CELLS_DDR3_VALUE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_0_VREF_CELLS_DDR3_VALUE	/;"	d
DDR_IO_0_VREF_CELLS_DDR3_VALUE_ES2	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_0_VREF_CELLS_DDR3_VALUE_ES2 /;"	d
DDR_IO_1_DQ_OUT_EN_ALL_DQ_INT_EN_ALL	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_1_DQ_OUT_EN_ALL_DQ_INT_EN_ALL /;"	d
DDR_IO_1_VREF_CELLS_DDR3_VALUE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_1_VREF_CELLS_DDR3_VALUE	/;"	d
DDR_IO_1_VREF_CELLS_DDR3_VALUE_ES2	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_1_VREF_CELLS_DDR3_VALUE_ES2 /;"	d
DDR_IO_2_CA_OUT_EN_ALL_CA_INT_EN_ALL	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_2_CA_OUT_EN_ALL_CA_INT_EN_ALL /;"	d
DDR_IO_2_VREF_CELLS_DDR3_VALUE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_2_VREF_CELLS_DDR3_VALUE	/;"	d
DDR_IO_2_VREF_CELLS_DDR3_VALUE_ES2	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_2_VREF_CELLS_DDR3_VALUE_ES2 /;"	d
DDR_IO_I_34OHM_SR_FASTEST_WD_CK_CKE_NCS_CA_PULL_DOWN	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_I_34OHM_SR_FASTEST_WD_CK_CKE_NCS_CA_PULL_DOWN /;"	d
DDR_IO_I_34OHM_SR_FASTEST_WD_DQ_NO_PULL_DQS_PULL_DOWN	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_I_34OHM_SR_FASTEST_WD_DQ_NO_PULL_DQS_PULL_DOWN /;"	d
DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL	/;"	d
DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2 /;"	d
DDR_IO_I_40OHM_SR_SLOWEST_WD_DQ_NO_PULL_DQS_NO_PULL	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_I_40OHM_SR_SLOWEST_WD_DQ_NO_PULL_DQS_NO_PULL	/;"	d
DDR_IO_I_40OHM_SR_SLOWEST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2	arch/arm/include/asm/arch-omap5/omap.h	/^#define DDR_IO_I_40OHM_SR_SLOWEST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2 /;"	d
DDR_M	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DDR_M	/;"	d	file:
DDR_M2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DDR_M2	/;"	d	file:
DDR_MAX_SIZE_PER_CS	board/tqc/tqm834x/tqm834x.c	/^#define DDR_MAX_SIZE_PER_CS	/;"	d	file:
DDR_MDIV1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_MDIV1	/;"	d	file:
DDR_MDIV2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_MDIV2	/;"	d	file:
DDR_MDIV3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_MDIV3	/;"	d	file:
DDR_MDIV4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_MDIV4	/;"	d	file:
DDR_MDIV5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_MDIV5	/;"	d	file:
DDR_MIN_ADDR	arch/arm/mach-keystone/cmd_ddr3.c	/^#define DDR_MIN_ADDR	/;"	d	file:
DDR_MODE_BLEN_2	include/mpc83xx.h	/^#define DDR_MODE_BLEN_2	/;"	d
DDR_MODE_BLEN_4	include/mpc83xx.h	/^#define DDR_MODE_BLEN_4	/;"	d
DDR_MODE_BTYPE_ILVD	include/mpc83xx.h	/^#define DDR_MODE_BTYPE_ILVD	/;"	d
DDR_MODE_BTYPE_SEQ	include/mpc83xx.h	/^#define DDR_MODE_BTYPE_SEQ	/;"	d
DDR_MODE_CASLAT	include/mpc83xx.h	/^#define DDR_MODE_CASLAT	/;"	d
DDR_MODE_CASLAT_15	include/mpc83xx.h	/^#define DDR_MODE_CASLAT_15	/;"	d
DDR_MODE_CASLAT_20	include/mpc83xx.h	/^#define DDR_MODE_CASLAT_20	/;"	d
DDR_MODE_CASLAT_25	include/mpc83xx.h	/^#define DDR_MODE_CASLAT_25	/;"	d
DDR_MODE_CASLAT_30	include/mpc83xx.h	/^#define DDR_MODE_CASLAT_30	/;"	d
DDR_MODE_COUNT	arch/arm/mach-exynos/include/mach/dmc.h	/^	DDR_MODE_COUNT,$/;"	e	enum:ddr_mode
DDR_MODE_DDR2	arch/arm/mach-exynos/include/mach/dmc.h	/^	DDR_MODE_DDR2,$/;"	e	enum:ddr_mode
DDR_MODE_DDR3	arch/arm/mach-exynos/include/mach/dmc.h	/^	DDR_MODE_DDR3,$/;"	e	enum:ddr_mode
DDR_MODE_DLL_DIS	include/mpc83xx.h	/^#define DDR_MODE_DLL_DIS	/;"	d
DDR_MODE_EXT_MODEREG	include/mpc83xx.h	/^#define DDR_MODE_EXT_MODEREG	/;"	d
DDR_MODE_EXT_OPMODE	include/mpc83xx.h	/^#define DDR_MODE_EXT_OPMODE	/;"	d
DDR_MODE_EXT_OP_NORMAL	include/mpc83xx.h	/^#define DDR_MODE_EXT_OP_NORMAL	/;"	d
DDR_MODE_LPDDR2	arch/arm/mach-exynos/include/mach/dmc.h	/^	DDR_MODE_LPDDR2,$/;"	e	enum:ddr_mode
DDR_MODE_LPDDR3	arch/arm/mach-exynos/include/mach/dmc.h	/^	DDR_MODE_LPDDR3,$/;"	e	enum:ddr_mode
DDR_MODE_MODEREG	include/mpc83xx.h	/^#define DDR_MODE_MODEREG	/;"	d
DDR_MODE_QFC	include/mpc83xx.h	/^#define DDR_MODE_QFC	/;"	d
DDR_MODE_QFC_COMP	include/mpc83xx.h	/^#define DDR_MODE_QFC_COMP	/;"	d
DDR_MODE_WEAK	include/mpc83xx.h	/^#define DDR_MODE_WEAK	/;"	d
DDR_MR5_CA_PARITY_LAT_4_CLK	include/fsl_ddr_sdram.h	/^#define DDR_MR5_CA_PARITY_LAT_4_CLK	/;"	d
DDR_MR5_CA_PARITY_LAT_5_CLK	include/fsl_ddr_sdram.h	/^#define DDR_MR5_CA_PARITY_LAT_5_CLK	/;"	d
DDR_N	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DDR_N	/;"	d	file:
DDR_N	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_N	/;"	d	file:
DDR_OPEN	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_OPEN /;"	d	file:
DDR_OPEN	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_OPEN /;"	d	file:
DDR_OTF	include/fsl_ddr_sdram.h	/^#define DDR_OTF	/;"	d
DDR_P	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_P	/;"	d	file:
DDR_PAD_CNF_MSK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define DDR_PAD_CNF_MSK	/;"	d
DDR_PAD_DRAM_TYPE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define DDR_PAD_DRAM_TYPE	/;"	d
DDR_PAD_SSTL_SEL	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define DDR_PAD_SSTL_SEL	/;"	d
DDR_PAD_SW_CONF	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define DDR_PAD_SW_CONF	/;"	d
DDR_PCTL_BASE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define DDR_PCTL_BASE	/;"	d	file:
DDR_PHASE_SEL	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_PHASE_SEL /;"	d	file:
DDR_PHASE_SEL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_PHASE_SEL /;"	d	file:
DDR_PHY_BASE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define DDR_PHY_BASE	/;"	d	file:
DDR_PHY_CMD_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDR_PHY_CMD_ADDR	/;"	d
DDR_PHY_CMD_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define DDR_PHY_CMD_ADDR	/;"	d
DDR_PHY_CMD_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDR_PHY_CMD_ADDR	/;"	d
DDR_PHY_CMD_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDR_PHY_CMD_ADDR	/;"	d
DDR_PHY_CMD_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDR_PHY_CMD_ADDR2	/;"	d
DDR_PHY_CMD_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define DDR_PHY_CMD_ADDR2	/;"	d
DDR_PHY_CMD_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDR_PHY_CMD_ADDR2	/;"	d
DDR_PHY_CMD_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDR_PHY_CMD_ADDR2	/;"	d
DDR_PHY_CONTROL	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	DDR_PHY_CONTROL = 1$/;"	e	enum:hws_ddr_phy
DDR_PHY_DATA	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	DDR_PHY_DATA = 0,$/;"	e	enum:hws_ddr_phy
DDR_PHY_DATA_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDR_PHY_DATA_ADDR	/;"	d
DDR_PHY_DATA_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define DDR_PHY_DATA_ADDR	/;"	d
DDR_PHY_DATA_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDR_PHY_DATA_ADDR	/;"	d
DDR_PHY_DATA_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDR_PHY_DATA_ADDR	/;"	d
DDR_PHY_DATA_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define DDR_PHY_DATA_ADDR2	/;"	d
DDR_PHY_DATA_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define DDR_PHY_DATA_ADDR2	/;"	d
DDR_PHY_DATA_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define DDR_PHY_DATA_ADDR2	/;"	d
DDR_PHY_DATA_ADDR2	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define DDR_PHY_DATA_ADDR2	/;"	d
DDR_PLL	arch/arm/include/asm/arch-s32v234/clock.h	/^	DDR_PLL,$/;"	e	enum:pll_type
DDR_PLLDIV	arch/arm/mach-davinci/cpu.c	/^#define DDR_PLLDIV	/;"	d	file:
DDR_PLLDIV	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define DDR_PLLDIV	/;"	d
DDR_PLL_BASE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DDR_PLL_BASE	/;"	d	file:
DDR_PLL_FREQ	include/configs/draco.h	/^#define DDR_PLL_FREQ	/;"	d
DDR_PLL_FREQ	include/configs/etamin.h	/^#define DDR_PLL_FREQ	/;"	d
DDR_PLL_FREQ	include/configs/pxm2.h	/^#define DDR_PLL_FREQ	/;"	d
DDR_PLL_FREQ	include/configs/rastaban.h	/^#define DDR_PLL_FREQ	/;"	d
DDR_PLL_FREQ	include/configs/rut.h	/^#define DDR_PLL_FREQ	/;"	d
DDR_PLL_FREQ	include/configs/thuban.h	/^#define DDR_PLL_FREQ	/;"	d
DDR_PLL_PHI0_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI0_FREQ	/;"	d
DDR_PLL_PHI1_DFS1_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS1_EN	/;"	d
DDR_PLL_PHI1_DFS1_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS1_MFI	/;"	d
DDR_PLL_PHI1_DFS1_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS1_MFN	/;"	d
DDR_PLL_PHI1_DFS2_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS2_EN	/;"	d
DDR_PLL_PHI1_DFS2_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS2_MFI	/;"	d
DDR_PLL_PHI1_DFS2_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS2_MFN	/;"	d
DDR_PLL_PHI1_DFS3_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS3_EN	/;"	d
DDR_PLL_PHI1_DFS3_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS3_MFI	/;"	d
DDR_PLL_PHI1_DFS3_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS3_MFN	/;"	d
DDR_PLL_PHI1_DFS_Nr	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_DFS_Nr	/;"	d
DDR_PLL_PHI1_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PHI1_FREQ	/;"	d
DDR_PLL_PLLDV_MFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PLLDV_MFD	/;"	d
DDR_PLL_PLLDV_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PLLDV_MFN	/;"	d
DDR_PLL_PLLDV_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DDR_PLL_PLLDV_PREDIV	/;"	d
DDR_RANK_CNT_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_RANK_CNT_MASK	= 1,$/;"	e	enum:__anon957231910603	file:
DDR_RANK_CNT_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_RANK_CNT_SHIFT	= 11,$/;"	e	enum:__anon957231910603	file:
DDR_RCD	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DDR_RCD	/;"	d	file:
DDR_REFINT_166MHZ_7US	include/mpc83xx.h	/^#define DDR_REFINT_166MHZ_7US	/;"	d
DDR_REFRESH	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_REFRESH(/;"	d	file:
DDR_REFRESH	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REFRESH(/;"	d	file:
DDR_REFRESH_EN	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_REFRESH_EN /;"	d	file:
DDR_REFRESH_EN	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REFRESH_EN /;"	d	file:
DDR_REFRESH_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_REFRESH_M /;"	d	file:
DDR_REFRESH_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REFRESH_M /;"	d	file:
DDR_REFRESH_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REFRESH_VAL /;"	d	file:
DDR_REFRESH_VAL_25M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_REFRESH_VAL_25M /;"	d	file:
DDR_REFRESH_VAL_40M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_REFRESH_VAL_40M /;"	d	file:
DDR_REG_BIST	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST /;"	d	file:
DDR_REG_BIST_COMP_ADDR_0	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_COMP_ADDR_0 /;"	d	file:
DDR_REG_BIST_COMP_ADDR_1	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_COMP_ADDR_1 /;"	d	file:
DDR_REG_BIST_COMP_AHB_GE0_0	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_COMP_AHB_GE0_0 /;"	d	file:
DDR_REG_BIST_COMP_AHB_GE0_1	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_COMP_AHB_GE0_1 /;"	d	file:
DDR_REG_BIST_COMP_AHB_GE1_0	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_COMP_AHB_GE1_0 /;"	d	file:
DDR_REG_BIST_COMP_AHB_GE1_1	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_COMP_AHB_GE1_1 /;"	d	file:
DDR_REG_BIST_MASK_ADDR_0	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_MASK_ADDR_0 /;"	d	file:
DDR_REG_BIST_MASK_ADDR_1	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_MASK_ADDR_1 /;"	d	file:
DDR_REG_BIST_MASK_AHB_GE0_0	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_MASK_AHB_GE0_0 /;"	d	file:
DDR_REG_BIST_MASK_AHB_GE0_1	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_MASK_AHB_GE0_1 /;"	d	file:
DDR_REG_BIST_MASK_AHB_GE1_0	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_MASK_AHB_GE1_0 /;"	d	file:
DDR_REG_BIST_MASK_AHB_GE1_1	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_MASK_AHB_GE1_1 /;"	d	file:
DDR_REG_BIST_STATUS	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_REG_BIST_STATUS /;"	d	file:
DDR_REMAP_ADDR	arch/arm/mach-keystone/cmd_ddr3.c	/^#define DDR_REMAP_ADDR	/;"	d	file:
DDR_RESV_LEN	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define DDR_RESV_LEN	/;"	d	file:
DDR_S	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_S	/;"	d
DDR_SATR_CONFIG_MASK_ECC	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define DDR_SATR_CONFIG_MASK_ECC	/;"	d
DDR_SATR_CONFIG_MASK_ECC_PUP	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define DDR_SATR_CONFIG_MASK_ECC_PUP	/;"	d
DDR_SATR_CONFIG_MASK_WIDTH	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define DDR_SATR_CONFIG_MASK_WIDTH	/;"	d
DDR_SCAL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DDR_SCAL	/;"	d
DDR_SDRAM	arch/arm/include/asm/arch-omap3/cpu.h	/^#define DDR_SDRAM	/;"	d
DDR_SDRAM_CFG	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_CFG	/;"	d
DDR_SDRAM_CFG_2	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_CFG_2	/;"	d
DDR_SDRAM_CFG_MEM_EN	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_CFG_MEM_EN	/;"	d
DDR_SDRAM_CLK_CNTL	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_CLK_CNTL	/;"	d
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_025	include/mpc83xx.h	/^#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_025	/;"	d
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05	include/mpc83xx.h	/^#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05	/;"	d
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075	include/mpc83xx.h	/^#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075	/;"	d
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_1	include/mpc83xx.h	/^#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_1	/;"	d
DDR_SDRAM_CLK_CNTL_SS_EN	include/mpc83xx.h	/^#define DDR_SDRAM_CLK_CNTL_SS_EN	/;"	d
DDR_SDRAM_INTERVAL	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_INTERVAL	/;"	d
DDR_SDRAM_MODE	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_MODE	/;"	d
DDR_SDRAM_MODE_2	include/configs/ls1021atwr.h	/^#define DDR_SDRAM_MODE_2	/;"	d
DDR_SIZE_CS_MASK	arch/arm/mach-mvebu/mbus.c	/^#define  DDR_SIZE_CS_MASK /;"	d	file:
DDR_SIZE_CS_OFF	arch/arm/mach-mvebu/cpu.c	/^#define DDR_SIZE_CS_OFF(/;"	d	file:
DDR_SIZE_CS_OFF	arch/arm/mach-mvebu/mbus.c	/^#define DDR_SIZE_CS_OFF(/;"	d	file:
DDR_SIZE_CS_SHIFT	arch/arm/mach-mvebu/mbus.c	/^#define  DDR_SIZE_CS_SHIFT /;"	d	file:
DDR_SIZE_ENABLED	arch/arm/mach-mvebu/mbus.c	/^#define  DDR_SIZE_ENABLED /;"	d	file:
DDR_SIZE_MASK	arch/arm/mach-mvebu/mbus.c	/^#define  DDR_SIZE_MASK /;"	d	file:
DDR_SLEW_CMOSEN_BIT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DDR_SLEW_CMOSEN_BIT	/;"	d
DDR_SLEW_DDR_PDENA_BIT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DDR_SLEW_DDR_PDENA_BIT	/;"	d
DDR_SRESET	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DDR_SRESET	/;"	d
DDR_STACKED	arch/arm/include/asm/arch-omap3/omap.h	/^#define DDR_STACKED	/;"	d
DDR_S_1TO1	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DDR_S_1TO1	/;"	d
DDR_TAP_MAGIC_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TAP_MAGIC_VAL /;"	d	file:
DDR_TAP_MAX_VAL	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TAP_MAX_VAL /;"	d	file:
DDR_TAP_VAL0	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TAP_VAL0 /;"	d	file:
DDR_TAP_VAL1	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TAP_VAL1 /;"	d	file:
DDR_TARGET_FABRIC	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DDR_TARGET_FABRIC	/;"	d
DDR_TERM	arch/arm/mach-keystone/ddr3_spd.c	/^#define DDR_TERM /;"	d	file:
DDR_TEST_BURST_SIZE	arch/arm/mach-keystone/cmd_ddr3.c	/^#define DDR_TEST_BURST_SIZE	/;"	d	file:
DDR_TIMING_CFG_0	include/configs/ls1021atwr.h	/^#define DDR_TIMING_CFG_0	/;"	d
DDR_TIMING_CFG_1	include/configs/ls1021atwr.h	/^#define DDR_TIMING_CFG_1	/;"	d
DDR_TIMING_CFG_2	include/configs/ls1021atwr.h	/^#define DDR_TIMING_CFG_2	/;"	d
DDR_TIMING_CFG_3	include/configs/ls1021atwr.h	/^#define DDR_TIMING_CFG_3	/;"	d
DDR_TIMING_CFG_4	include/configs/ls1021atwr.h	/^#define DDR_TIMING_CFG_4	/;"	d
DDR_TIMING_CFG_5	include/configs/ls1021atwr.h	/^#define DDR_TIMING_CFG_5	/;"	d
DDR_TIMING_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DDR_TIMING_REG	/;"	d
DDR_TMRD	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TMRD(/;"	d	file:
DDR_TMRD	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TMRD(/;"	d	file:
DDR_TMRD_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TMRD_M /;"	d	file:
DDR_TMRD_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TMRD_M /;"	d	file:
DDR_TMRD_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TMRD_S /;"	d	file:
DDR_TMRD_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TMRD_S /;"	d	file:
DDR_TRAS	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRAS(/;"	d	file:
DDR_TRAS	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRAS(/;"	d	file:
DDR_TRAS_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRAS_M /;"	d	file:
DDR_TRAS_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRAS_M /;"	d	file:
DDR_TRAS_MSB	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRAS_MSB /;"	d	file:
DDR_TRAS_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRAS_S /;"	d	file:
DDR_TRAS_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRAS_S /;"	d	file:
DDR_TRCD	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRCD(/;"	d	file:
DDR_TRCD	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRCD(/;"	d	file:
DDR_TRCD_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRCD_M /;"	d	file:
DDR_TRCD_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRCD_M /;"	d	file:
DDR_TRCD_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRCD_S /;"	d	file:
DDR_TRCD_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRCD_S /;"	d	file:
DDR_TRFC	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRFC(/;"	d	file:
DDR_TRFC	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRFC(/;"	d	file:
DDR_TRFC_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRFC_M /;"	d	file:
DDR_TRFC_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRFC_M /;"	d	file:
DDR_TRFC_MSB	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRFC_MSB(/;"	d	file:
DDR_TRFC_MSB_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRFC_MSB_M /;"	d	file:
DDR_TRFC_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRFC_S /;"	d	file:
DDR_TRFC_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRFC_S /;"	d	file:
DDR_TRP	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRP(/;"	d	file:
DDR_TRP	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRP(/;"	d	file:
DDR_TRP_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRP_M /;"	d	file:
DDR_TRP_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRP_M /;"	d	file:
DDR_TRP_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRP_S /;"	d	file:
DDR_TRP_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRP_S /;"	d	file:
DDR_TRRD	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRRD(/;"	d	file:
DDR_TRRD	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRRD(/;"	d	file:
DDR_TRRD_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRRD_M /;"	d	file:
DDR_TRRD_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRRD_M /;"	d	file:
DDR_TRRD_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRRD_S /;"	d	file:
DDR_TRRD_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRRD_S /;"	d	file:
DDR_TRTP	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRTP(/;"	d	file:
DDR_TRTP	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRTP(/;"	d	file:
DDR_TRTP_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRTP_M /;"	d	file:
DDR_TRTP_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRTP_M /;"	d	file:
DDR_TRTP_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRTP_S /;"	d	file:
DDR_TRTP_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRTP_S /;"	d	file:
DDR_TRTW	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRTW(/;"	d	file:
DDR_TRTW	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRTW(/;"	d	file:
DDR_TRTW_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRTW_M /;"	d	file:
DDR_TRTW_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRTW_M /;"	d	file:
DDR_TRTW_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TRTW_S /;"	d	file:
DDR_TRTW_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TRTW_S /;"	d	file:
DDR_TWR	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TWR(/;"	d	file:
DDR_TWR	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWR(/;"	d	file:
DDR_TWR_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TWR_M /;"	d	file:
DDR_TWR_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWR_M /;"	d	file:
DDR_TWR_MSB	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWR_MSB /;"	d	file:
DDR_TWR_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TWR_S /;"	d	file:
DDR_TWR_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWR_S /;"	d	file:
DDR_TWTR	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TWTR(/;"	d	file:
DDR_TWTR	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWTR(/;"	d	file:
DDR_TWTR_M	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TWTR_M /;"	d	file:
DDR_TWTR_M	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWTR_M /;"	d	file:
DDR_TWTR_S	arch/mips/mach-ath79/ar933x/ddr.c	/^#define DDR_TWTR_S /;"	d	file:
DDR_TWTR_S	arch/mips/mach-ath79/qca953x/ddr.c	/^#define DDR_TWTR_S /;"	d	file:
DDR_TX_BD_DIS	include/fsl_ddr_sdram.h	/^#define DDR_TX_BD_DIS	/;"	d
DDR_TYPE_DDR3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	DDR_TYPE_DDR3,$/;"	e	enum:__anon782a79310103
DDR_TYPE_LPDDR2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	DDR_TYPE_LPDDR2,$/;"	e	enum:__anon782a79310103
DDR_TYPE_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_TYPE_MASK		= 7,$/;"	e	enum:__anon957231910603	file:
DDR_TYPE_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DDR_TYPE_SHIFT		= 13,$/;"	e	enum:__anon957231910603	file:
DDR_UNKNOWN	board/compulab/cm_fx6/spl.c	/^	DDR_UNKNOWN,$/;"	e	enum:ddr_config	file:
DDR_WCAL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DDR_WCAL	/;"	d
DE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define DE /;"	d
DE4X5_APROM	drivers/net/dc2114x.c	/^#define DE4X5_APROM	/;"	d	file:
DE4X5_BMR	drivers/net/dc2114x.c	/^#define DE4X5_BMR	/;"	d	file:
DE4X5_OMR	drivers/net/dc2114x.c	/^#define DE4X5_OMR	/;"	d	file:
DE4X5_RRBA	drivers/net/dc2114x.c	/^#define DE4X5_RRBA	/;"	d	file:
DE4X5_SICR	drivers/net/dc2114x.c	/^#define DE4X5_SICR	/;"	d	file:
DE4X5_STS	drivers/net/dc2114x.c	/^#define DE4X5_STS	/;"	d	file:
DE4X5_TPD	drivers/net/dc2114x.c	/^#define DE4X5_TPD	/;"	d	file:
DE4X5_TRBA	drivers/net/dc2114x.c	/^#define DE4X5_TRBA	/;"	d	file:
DEAD_LOOP	arch/x86/cpu/quark/smc.h	/^#define DEAD_LOOP(/;"	d
DEAR	arch/powerpc/include/asm/processor.h	/^#define DEAR	/;"	d
DEB0_ERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DEB0_ERROR	/;"	d
DEB0_MERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DEB0_MERROR	/;"	d
DEB1_ERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DEB1_ERROR	/;"	d
DEB1_MERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DEB1_MERROR	/;"	d
DEB2_ERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DEB2_ERROR	/;"	d
DEB2_MERROR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define DEB2_MERROR	/;"	d
DEB2_URGENT	board/bf548-ezkit/video.c	/^#define               DEB2_URGENT /;"	d	file:
DEB2_URGENT	board/cm-bf548/video.c	/^#define               DEB2_URGENT /;"	d	file:
DEBLOCK_PORT1	board/keymile/kmp204x/kmp204x.c	/^#define DEBLOCK_PORT1	/;"	d	file:
DEBLOCK_SCL1	board/keymile/kmp204x/kmp204x.c	/^#define DEBLOCK_SCL1	/;"	d	file:
DEBLOCK_SDA1	board/keymile/kmp204x/kmp204x.c	/^#define DEBLOCK_SDA1	/;"	d	file:
DEBUG	api/api.c	/^#define DEBUG$/;"	d	file:
DEBUG	api/api_net.c	/^#define DEBUG$/;"	d	file:
DEBUG	api/api_storage.c	/^#define DEBUG$/;"	d	file:
DEBUG	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define DEBUG$/;"	d	file:
DEBUG	arch/sandbox/cpu/cpu.c	/^#define DEBUG$/;"	d	file:
DEBUG	board/gdsys/p1022/controlcenterd-id.c	/^#define DEBUG$/;"	d	file:
DEBUG	common/dlmalloc.c	/^#define DEBUG$/;"	d	file:
DEBUG	drivers/net/bcm-sf2-eth-gmac.c	/^#define DEBUG$/;"	d	file:
DEBUG	drivers/net/mpc512x_fec.c	/^#define DEBUG /;"	d	file:
DEBUG	drivers/net/ne2000_base.h	/^#define DEBUG /;"	d
DEBUG	drivers/rtc/rs5c372.c	/^#define DEBUG /;"	d	file:
DEBUG	examples/standalone/mem_to_mem_idma2intr.c	/^#define DEBUG(/;"	d	file:
DEBUG	test/command_ut.c	/^#define DEBUG$/;"	d	file:
DEBUG	test/compression.c	/^#define DEBUG$/;"	d	file:
DEBUG	test/image/test-fit.py	/^DEBUG = True$/;"	v
DEBUG	tools/patman/tout.py	/^DEBUG = 4$/;"	v
DEBUGCAUSE_BREAKN_BIT	arch/xtensa/include/asm/regs.h	/^#define DEBUGCAUSE_BREAKN_BIT	/;"	d
DEBUGCAUSE_BREAK_BIT	arch/xtensa/include/asm/regs.h	/^#define DEBUGCAUSE_BREAK_BIT	/;"	d
DEBUGCAUSE_DBREAK_BIT	arch/xtensa/include/asm/regs.h	/^#define DEBUGCAUSE_DBREAK_BIT	/;"	d
DEBUGCAUSE_DEBUGINT_BIT	arch/xtensa/include/asm/regs.h	/^#define DEBUGCAUSE_DEBUGINT_BIT	/;"	d
DEBUGCAUSE_IBREAK_BIT	arch/xtensa/include/asm/regs.h	/^#define DEBUGCAUSE_IBREAK_BIT	/;"	d
DEBUGCAUSE_ICOUNT_BIT	arch/xtensa/include/asm/regs.h	/^#define DEBUGCAUSE_ICOUNT_BIT	/;"	d
DEBUGCTLMSR_BTF	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_BTF	/;"	d
DEBUGCTLMSR_BTINT	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_BTINT	/;"	d
DEBUGCTLMSR_BTS	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_BTS	/;"	d
DEBUGCTLMSR_BTS_OFF_OS	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_BTS_OFF_OS	/;"	d
DEBUGCTLMSR_BTS_OFF_USR	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_BTS_OFF_USR	/;"	d
DEBUGCTLMSR_FREEZE_LBRS_ON_PMI	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI	/;"	d
DEBUGCTLMSR_LBR	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_LBR	/;"	d
DEBUGCTLMSR_TR	arch/x86/include/asm/msr-index.h	/^#define DEBUGCTLMSR_TR	/;"	d
DEBUGF	arch/powerpc/cpu/ppc4xx/speed.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/amcc/bamboo/flash.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/amcc/bubinga/flash.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/amcc/luan/flash.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/amcc/walnut/flash.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/amcc/yucca/flash.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/amcc/yucca/yucca.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	board/tqc/tqm5200/cam5200_flash.c	/^#define DEBUGF(/;"	d	file:
DEBUGF	cmd/cramfs.c	/^# define DEBUGF(/;"	d	file:
DEBUGF	cmd/jffs2.c	/^# define DEBUGF(/;"	d	file:
DEBUGF	fs/jffs2/jffs2_1pass.c	/^# define DEBUGF(/;"	d	file:
DEBUGF	fs/jffs2/jffs2_nand_1pass.c	/^# define DEBUGF(/;"	d	file:
DEBUGFS_S_IRUSR	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define DEBUGFS_S_IRUSR	/;"	d
DEBUGFS_S_ISDIR	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define DEBUGFS_S_ISDIR	/;"	d
DEBUGFS_S_IWUSR	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define DEBUGFS_S_IWUSR	/;"	d
DEBUGFUNC	drivers/net/e1000.h	/^#define DEBUGFUNC(/;"	d
DEBUGOUT	drivers/net/e1000.h	/^#define DEBUGOUT(/;"	d
DEBUGR	drivers/rtc/ds1307.c	/^#define DEBUGR(/;"	d	file:
DEBUGR	drivers/rtc/ds1374.c	/^#define DEBUGR(/;"	d	file:
DEBUGR	drivers/rtc/isl1208.c	/^#define DEBUGR(/;"	d	file:
DEBUGR	drivers/rtc/rx8025.c	/^#define DEBUGR(/;"	d	file:
DEBUG_AT91EMAC	drivers/net/at91_emac.c	/^#define DEBUG_AT91EMAC	/;"	d	file:
DEBUG_AT91PHY	drivers/net/at91_emac.c	/^#define DEBUG_AT91PHY	/;"	d	file:
DEBUG_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define DEBUG_BASE	/;"	d
DEBUG_BLOCK_ACCESS	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_ACCESS,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_ALG	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_ALG,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_ALL	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_ALL$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_BIST	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_BIST,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_CENTRALIZATION	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_CENTRALIZATION,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_DEVICE	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_DEVICE,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_IP	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_IP,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_LEVELING	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_LEVELING,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_PBS	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_PBS,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_STATIC	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_STATIC,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BLOCK_TRAINING_MAIN	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_BLOCK_TRAINING_MAIN,$/;"	e	enum:ddr_lib_debug_block
DEBUG_BOOTKEYS	common/autoboot.c	/^#define DEBUG_BOOTKEYS /;"	d	file:
DEBUG_BREAK	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_BREAK(/;"	d
DEBUG_BREAK_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_BREAK_F /;"	d
DEBUG_CENTRALIZATION_ENGINE	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_CENTRALIZATION_ENGINE(/;"	d
DEBUG_CRAMFS	cmd/cramfs.c	/^#define	DEBUG_CRAMFS$/;"	d	file:
DEBUG_DECODE	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_DECODE(/;"	d
DEBUG_DECODE_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_DECODE_F /;"	d
DEBUG_DECODE_NOPRINT	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_DECODE_NOPRINT(/;"	d
DEBUG_DECODE_NOPRINT_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_DECODE_NOPRINT_F /;"	d
DEBUG_DEVRES	drivers/core/Kconfig	/^config DEBUG_DEVRES$/;"	c	menu:Generic Driver Options
DEBUG_DEV_PKT	include/net.h	/^#define DEBUG_DEV_PKT /;"	d
DEBUG_DFS_C	drivers/ddr/marvell/axp/ddr3_dfs.c	/^#define DEBUG_DFS_C(/;"	d	file:
DEBUG_DFS_D	drivers/ddr/marvell/axp/ddr3_dfs.c	/^#define DEBUG_DFS_D(/;"	d	file:
DEBUG_DFS_FULL_C	drivers/ddr/marvell/axp/ddr3_dfs.c	/^#define DEBUG_DFS_FULL_C(/;"	d	file:
DEBUG_DFS_FULL_D	drivers/ddr/marvell/axp/ddr3_dfs.c	/^#define DEBUG_DFS_FULL_D(/;"	d	file:
DEBUG_DFS_FULL_S	drivers/ddr/marvell/axp/ddr3_dfs.c	/^#define DEBUG_DFS_FULL_S(/;"	d	file:
DEBUG_DFS_S	drivers/ddr/marvell/axp/ddr3_dfs.c	/^#define DEBUG_DFS_S(/;"	d	file:
DEBUG_DISASSEMBLE	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_DISASSEMBLE(/;"	d
DEBUG_DISASSEMBLE_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_DISASSEMBLE_F /;"	d
DEBUG_DQS_C	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_C(/;"	d	file:
DEBUG_DQS_D	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_D(/;"	d	file:
DEBUG_DQS_FULL_C	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_FULL_C(/;"	d	file:
DEBUG_DQS_FULL_D	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_FULL_D(/;"	d	file:
DEBUG_DQS_FULL_S	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_FULL_S(/;"	d	file:
DEBUG_DQS_RESULTS_C	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_RESULTS_C(/;"	d	file:
DEBUG_DQS_RESULTS_D	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_RESULTS_D(/;"	d	file:
DEBUG_DQS_RESULTS_S	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_RESULTS_S(/;"	d	file:
DEBUG_DQS_S	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_DQS_S(/;"	d	file:
DEBUG_EFI_CONSOLE	drivers/serial/Kconfig	/^config DEBUG_EFI_CONSOLE$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_ELBC	drivers/mtd/nand/fsl_elbc_nand.c	/^#define DEBUG_ELBC$/;"	d	file:
DEBUG_ENV	board/amcc/yucca/yucca.c	/^#define DEBUG_ENV$/;"	d	file:
DEBUG_EP0	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DEBUG_EP0 /;"	d	file:
DEBUG_EXIT	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_EXIT /;"	d
DEBUG_EXPR	scripts/kconfig/expr.c	/^#define DEBUG_EXPR	/;"	d	file:
DEBUG_FS	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_FS(/;"	d
DEBUG_FS_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_FS_F /;"	d
DEBUG_FUNCTION	drivers/net/ne2000_base.h	/^#define DEBUG_FUNCTION(/;"	d
DEBUG_INIT_C	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_C(/;"	d
DEBUG_INIT_C	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_C(/;"	d
DEBUG_INIT_D	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_D(/;"	d
DEBUG_INIT_D	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_D(/;"	d
DEBUG_INIT_D_10	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_D_10(/;"	d
DEBUG_INIT_D_10	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_D_10(/;"	d
DEBUG_INIT_FULL_C	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_FULL_C(/;"	d
DEBUG_INIT_FULL_C	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_FULL_C(/;"	d
DEBUG_INIT_FULL_D	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_FULL_D(/;"	d
DEBUG_INIT_FULL_D	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_FULL_D(/;"	d
DEBUG_INIT_FULL_D_10	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_FULL_D_10(/;"	d
DEBUG_INIT_FULL_D_10	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_FULL_D_10(/;"	d
DEBUG_INIT_FULL_S	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_FULL_S(/;"	d
DEBUG_INIT_FULL_S	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_FULL_S(/;"	d
DEBUG_INIT_S	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_INIT_S(/;"	d
DEBUG_INIT_S	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_INIT_S(/;"	d
DEBUG_INSTRUMENT	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_INSTRUMENT(/;"	d
DEBUG_INSTRUMENT_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_INSTRUMENT_F /;"	d
DEBUG_INT_STATE	include/net.h	/^#define DEBUG_INT_STATE /;"	d
DEBUG_IN_EP	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DEBUG_IN_EP /;"	d	file:
DEBUG_IO	drivers/bios_emulator/biosemui.h	/^#define DEBUG_IO(/;"	d
DEBUG_IO_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_IO_TRACE(/;"	d
DEBUG_IO_TRACE_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_IO_TRACE_F /;"	d
DEBUG_ISR	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DEBUG_ISR /;"	d	file:
DEBUG_JFFS	cmd/jffs2.c	/^#define	DEBUG_JFFS$/;"	d	file:
DEBUG_LED1	arch/arm/include/asm/arch-omap3/omap.h	/^#define DEBUG_LED1	/;"	d
DEBUG_LED2	arch/arm/include/asm/arch-omap3/omap.h	/^#define DEBUG_LED2	/;"	d
DEBUG_LEVEL	drivers/usb/gadget/atmel_usba_udc.h	/^#define DEBUG_LEVEL	/;"	d
DEBUG_LEVELING	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_LEVELING(/;"	d
DEBUG_LEVEL_ERROR	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_LEVEL_ERROR	/;"	d
DEBUG_LEVEL_INFO	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_LEVEL_INFO	/;"	d
DEBUG_LEVEL_TRACE	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_LEVEL_TRACE	/;"	d
DEBUG_LINE	drivers/net/ne2000_base.h	/^#define DEBUG_LINE(/;"	d
DEBUG_LL	arch/arm/Kconfig.debug	/^config DEBUG_LL$/;"	c	menu:ARM debug
DEBUG_LL_INCLUDE	arch/arm/Kconfig.debug	/^config DEBUG_LL_INCLUDE$/;"	c	menu:ARM debug
DEBUG_LL_STATE	include/net.h	/^#define DEBUG_LL_STATE /;"	d
DEBUG_LL_UART_8250	arch/arm/Kconfig.debug	/^	config DEBUG_LL_UART_8250$/;"	c	choice:ARM debug""choice510de4770104
DEBUG_MAIN_C	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_MAIN_C(/;"	d	file:
DEBUG_MAIN_D	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_MAIN_D(/;"	d	file:
DEBUG_MAIN_FULL_C	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_MAIN_FULL_C(/;"	d	file:
DEBUG_MAIN_FULL_D	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_MAIN_FULL_D(/;"	d	file:
DEBUG_MAIN_FULL_S	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_MAIN_FULL_S(/;"	d	file:
DEBUG_MAIN_S	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_MAIN_S(/;"	d	file:
DEBUG_MEM_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_MEM_TRACE(/;"	d
DEBUG_MEM_TRACE_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_MEM_TRACE_F /;"	d
DEBUG_MODE	board/esd/common/xilinx_jtag/micro.c	/^#define DEBUG_MODE$/;"	d	file:
DEBUG_MONITOR_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DEBUG_MONITOR_BASE_ADDR /;"	d
DEBUG_MONITOR_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define DEBUG_MONITOR_BASE_ADDR /;"	d
DEBUG_MON_LCDD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	DEBUG_MON_LCDD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DEBUG_MON_VIO_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	DEBUG_MON_VIO_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DEBUG_MVEBU_A3700_UART	drivers/serial/Kconfig	/^config DEBUG_MVEBU_A3700_UART$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_NET_PKT	include/net.h	/^#define DEBUG_NET_PKT /;"	d
DEBUG_OUT_EP	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DEBUG_OUT_EP /;"	d	file:
DEBUG_PARSE	scripts/kconfig/zconf.tab.c	/^#define DEBUG_PARSE	/;"	d	file:
DEBUG_PARSER	common/cli_simple.c	/^#define DEBUG_PARSER	/;"	d	file:
DEBUG_PBS_C	drivers/ddr/marvell/axp/ddr3_pbs.c	/^#define DEBUG_PBS_C(/;"	d	file:
DEBUG_PBS_D	drivers/ddr/marvell/axp/ddr3_pbs.c	/^#define DEBUG_PBS_D(/;"	d	file:
DEBUG_PBS_ENGINE	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_PBS_ENGINE(/;"	d
DEBUG_PBS_FULL_C	drivers/ddr/marvell/axp/ddr3_pbs.c	/^#define DEBUG_PBS_FULL_C(/;"	d	file:
DEBUG_PBS_FULL_D	drivers/ddr/marvell/axp/ddr3_pbs.c	/^#define DEBUG_PBS_FULL_D(/;"	d	file:
DEBUG_PBS_FULL_S	drivers/ddr/marvell/axp/ddr3_pbs.c	/^#define DEBUG_PBS_FULL_S(/;"	d	file:
DEBUG_PBS_S	drivers/ddr/marvell/axp/ddr3_pbs.c	/^#define DEBUG_PBS_S(/;"	d	file:
DEBUG_PER_DQ_C	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_PER_DQ_C(/;"	d	file:
DEBUG_PER_DQ_D	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_PER_DQ_D(/;"	d	file:
DEBUG_PER_DQ_DD	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_PER_DQ_DD(/;"	d	file:
DEBUG_PER_DQ_S	drivers/ddr/marvell/axp/ddr3_dqs.c	/^#define DEBUG_PER_DQ_S(/;"	d	file:
DEBUG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/canyonlands.h	/^#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
DEBUG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/intip.h	/^#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
DEBUG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/io64.h	/^#define	DEBUG_PPC4xx_DDR_AUTOCALIBRATION$/;"	d
DEBUG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/kilauea.h	/^#define	DEBUG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
DEBUG_PPC4xx_DDR_AUTOCALIBRATION	include/configs/t3corp.h	/^#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION	/;"	d
DEBUG_PROC	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_PROC(/;"	d
DEBUG_PROC_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_PROC_F /;"	d
DEBUG_RD_REG	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_RD_REG(/;"	d
DEBUG_RD_REG	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_RD_REG(/;"	d
DEBUG_RESET_CORESIGHT	arch/arm/mach-tegra/tegra20/warmboot_avp.c	/^#define DEBUG_RESET_CORESIGHT$/;"	d	file:
DEBUG_RK_SPI	drivers/spi/rk_spi.c	/^#define DEBUG_RK_SPI	/;"	d	file:
DEBUG_RL_C	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^#define DEBUG_RL_C(/;"	d	file:
DEBUG_RL_D	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^#define DEBUG_RL_D(/;"	d	file:
DEBUG_RL_D	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_RL_D(/;"	d	file:
DEBUG_RL_FULL_C	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^#define DEBUG_RL_FULL_C(/;"	d	file:
DEBUG_RL_FULL_D	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^#define DEBUG_RL_FULL_D(/;"	d	file:
DEBUG_RL_FULL_S	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^#define DEBUG_RL_FULL_S(/;"	d	file:
DEBUG_RL_S	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^#define DEBUG_RL_S(/;"	d	file:
DEBUG_RL_S	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_RL_S(/;"	d	file:
DEBUG_RTC	drivers/rtc/ds1374.c	/^#define DEBUG_RTC$/;"	d	file:
DEBUG_RX	drivers/net/rtl8139.c	/^#define DEBUG_RX	/;"	d	file:
DEBUG_SAVE_CS_IP	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_SAVE_CS_IP /;"	d
DEBUG_SAVE_IP_CS	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_SAVE_IP_CS(/;"	d
DEBUG_SETUP	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DEBUG_SETUP /;"	d	file:
DEBUG_SOR	drivers/video/tegra124/sor.c	/^#define DEBUG_SOR /;"	d	file:
DEBUG_STAGES_REG_DUMP	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^	DEBUG_STAGES_REG_DUMP,$/;"	e	enum:ddr_lib_debug_block
DEBUG_STEP	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_STEP(/;"	d
DEBUG_STEP_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_STEP_F /;"	d
DEBUG_SUSPEND_RESUME_D	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_SUSPEND_RESUME_D(/;"	d	file:
DEBUG_SUSPEND_RESUME_S	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^#define DEBUG_SUSPEND_RESUME_S(/;"	d	file:
DEBUG_SVC	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_SVC(/;"	d
DEBUG_SVC_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_SVC_F /;"	d
DEBUG_SYS	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_SYS(/;"	d
DEBUG_SYSINT	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_SYSINT(/;"	d
DEBUG_SYSINT_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_SYSINT_F /;"	d
DEBUG_SYS_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_SYS_F /;"	d
DEBUG_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_TRACE(/;"	d
DEBUG_TRACECALL	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_TRACECALL(/;"	d
DEBUG_TRACECALLREGS	drivers/bios_emulator/include/x86emu/debug.h	/^# define DEBUG_TRACECALLREGS(/;"	d
DEBUG_TRACECALL_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_TRACECALL_F /;"	d
DEBUG_TRACECALL_REGS_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_TRACECALL_REGS_F /;"	d
DEBUG_TRACE_F	drivers/bios_emulator/include/x86emu.h	/^#define DEBUG_TRACE_F /;"	d
DEBUG_TRAINING_ACCESS	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_TRAINING_ACCESS(/;"	d
DEBUG_TRAINING_BIST_ENGINE	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_TRAINING_BIST_ENGINE(/;"	d
DEBUG_TRAINING_HW_ALG	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_TRAINING_HW_ALG(/;"	d
DEBUG_TRAINING_IP	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_TRAINING_IP(/;"	d
DEBUG_TRAINING_IP_ENGINE	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_TRAINING_IP_ENGINE(/;"	d
DEBUG_TRAINING_STATIC_IP	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define DEBUG_TRAINING_STATIC_IP(/;"	d
DEBUG_TX	drivers/net/rtl8139.c	/^#define DEBUG_TX	/;"	d	file:
DEBUG_UART	drivers/serial/Kconfig	/^config DEBUG_UART$/;"	c	menu:Serial drivers
DEBUG_UART_8250	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250$/;"	c	menu:ARM debug
DEBUG_UART_8250_FLOW_CONTROL	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_FLOW_CONTROL$/;"	c	menu:ARM debug
DEBUG_UART_8250_SHIFT	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_SHIFT$/;"	c	menu:ARM debug
DEBUG_UART_8250_WORD	arch/arm/Kconfig.debug	/^config DEBUG_UART_8250_WORD$/;"	c	menu:ARM debug
DEBUG_UART_ALTERA_JTAGUART	drivers/serial/Kconfig	/^config DEBUG_UART_ALTERA_JTAGUART$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_ALTERA_UART	drivers/serial/Kconfig	/^config DEBUG_UART_ALTERA_UART$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_ANNOUNCE	drivers/serial/Kconfig	/^config DEBUG_UART_ANNOUNCE$/;"	c	menu:Serial drivers
DEBUG_UART_APBUART	drivers/serial/Kconfig	/^config DEBUG_UART_APBUART$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_AR933X	drivers/serial/Kconfig	/^config DEBUG_UART_AR933X$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_ARM_DCC	drivers/serial/Kconfig	/^config DEBUG_UART_ARM_DCC$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_ATMEL	drivers/serial/Kconfig	/^config DEBUG_UART_ATMEL$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_BASE	arch/arm/mach-rockchip/rk3036-board-spl.c	/^#define DEBUG_UART_BASE	/;"	d	file:
DEBUG_UART_BASE	arch/arm/mach-uniphier/debug.h	/^#define DEBUG_UART_BASE	/;"	d
DEBUG_UART_BASE	drivers/serial/Kconfig	/^config DEBUG_UART_BASE$/;"	c	menu:Serial drivers
DEBUG_UART_BOARD_INIT	drivers/serial/Kconfig	/^config DEBUG_UART_BOARD_INIT$/;"	c	menu:Serial drivers
DEBUG_UART_CLOCK	drivers/serial/Kconfig	/^config DEBUG_UART_CLOCK$/;"	c	menu:Serial drivers
DEBUG_UART_FUNCS	include/debug_uart.h	/^#define DEBUG_UART_FUNCS /;"	d
DEBUG_UART_MESON	drivers/serial/Kconfig	/^config DEBUG_UART_MESON$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_NS16550	drivers/serial/Kconfig	/^config DEBUG_UART_NS16550$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_PHYS	arch/arm/Kconfig.debug	/^config DEBUG_UART_PHYS$/;"	c	menu:ARM debug
DEBUG_UART_PIC32	drivers/serial/Kconfig	/^config DEBUG_UART_PIC32$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_PL010	drivers/serial/Kconfig	/^config DEBUG_UART_PL010$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_PL011	drivers/serial/Kconfig	/^config DEBUG_UART_PL011$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_S5P	drivers/serial/Kconfig	/^config DEBUG_UART_S5P$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_SHIFT	drivers/serial/Kconfig	/^config DEBUG_UART_SHIFT$/;"	c	menu:Serial drivers
DEBUG_UART_SKIP_INIT	drivers/serial/Kconfig	/^config DEBUG_UART_SKIP_INIT$/;"	c	menu:Serial drivers
DEBUG_UART_UARTLITE	drivers/serial/Kconfig	/^config DEBUG_UART_UARTLITE$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_UNIPHIER	drivers/serial/Kconfig	/^config DEBUG_UART_UNIPHIER$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_UART_VIRT	arch/arm/Kconfig.debug	/^config DEBUG_UART_VIRT$/;"	c	menu:ARM debug
DEBUG_UART_ZYNQ	drivers/serial/Kconfig	/^config DEBUG_UART_ZYNQ$/;"	c	choice:Serial drivers""choice334d94630104
DEBUG_WL_C	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_WL_C(/;"	d	file:
DEBUG_WL_D	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_WL_D(/;"	d	file:
DEBUG_WL_FULL_C	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_WL_FULL_C(/;"	d	file:
DEBUG_WL_FULL_D	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_WL_FULL_D(/;"	d	file:
DEBUG_WL_FULL_S	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_WL_FULL_S(/;"	d	file:
DEBUG_WL_S	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define DEBUG_WL_S(/;"	d	file:
DEBUG_WR_REG	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define DEBUG_WR_REG(/;"	d
DEBUG_WR_REG	drivers/ddr/marvell/axp/ddr3_init.h	/^#define DEBUG_WR_REG(/;"	d
DEC	arch/powerpc/include/asm/processor.h	/^#define DEC	/;"	d
DEC200_DECODER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define DEC200_DECODER_BASE_ADDR	/;"	d
DEC200_ENCODER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define DEC200_ENCODER_BASE_ADDR	/;"	d
DECAR	arch/powerpc/include/asm/processor.h	/^#define DECAR	/;"	d
DECCCTRL	arch/x86/cpu/quark/smc.h	/^#define DECCCTRL	/;"	d
DECCCTRL_DBEEN	arch/x86/cpu/quark/smc.h	/^#define DECCCTRL_DBEEN	/;"	d
DECCCTRL_ENCBGEN	arch/x86/cpu/quark/smc.h	/^#define DECCCTRL_ENCBGEN	/;"	d
DECCCTRL_SBEEN	arch/x86/cpu/quark/smc.h	/^#define DECCCTRL_SBEEN	/;"	d
DECCDBECA	arch/x86/cpu/quark/smc.h	/^#define DECCDBECA	/;"	d
DECCDBECS	arch/x86/cpu/quark/smc.h	/^#define DECCDBECS	/;"	d
DECCSBECA	arch/x86/cpu/quark/smc.h	/^#define DECCSBECA	/;"	d
DECCSBECNT	arch/x86/cpu/quark/smc.h	/^#define DECCSBECNT	/;"	d
DECCSBECS	arch/x86/cpu/quark/smc.h	/^#define DECCSBECS	/;"	d
DECCSTAT	arch/x86/cpu/quark/smc.h	/^#define DECCSTAT	/;"	d
DECLARE_ARGS	arch/x86/include/asm/msr.h	/^#define DECLARE_ARGS(/;"	d
DECLARE_BITMAP	include/usb/lin_gadget_compat.h	/^#define DECLARE_BITMAP(/;"	d
DECLARE_CODEC32	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define DECLARE_CODEC32(/;"	d
DECLARE_CODEC32	drivers/net/fsl-mc/dpio/qbman_private.h	/^DECLARE_CODEC32(uint16_t)$/;"	f	typeref:typename:uint32_t
DECLARE_ESERIAL_FUNCTIONS	drivers/serial/serial_ns16550.c	/^#define DECLARE_ESERIAL_FUNCTIONS(/;"	d	file:
DECLARE_GADGET_BIND_CALLBACK	include/g_dnl.h	/^#define DECLARE_GADGET_BIND_CALLBACK(/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/arc/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR	/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/arm/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR	/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/arm/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR$/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/avr32/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/blackfin/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/m68k/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/microblaze/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/mips/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/nds32/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR	/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/nios2/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/openrisc/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR	/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/powerpc/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/sandbox/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/sh/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR	/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/sparc/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/x86/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_GLOBAL_DATA_PTR	arch/x86/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR$/;"	d
DECLARE_GLOBAL_DATA_PTR	arch/xtensa/include/asm/global_data.h	/^#define DECLARE_GLOBAL_DATA_PTR /;"	d
DECLARE_INTERRUPT	arch/x86/cpu/interrupts.c	/^#define DECLARE_INTERRUPT(/;"	d	file:
DECLARE_PSC_SERIAL_FUNCTIONS	arch/powerpc/cpu/mpc512x/serial.c	/^#define DECLARE_PSC_SERIAL_FUNCTIONS(/;"	d	file:
DECLARE_REF_CLK	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^#define DECLARE_REF_CLK(/;"	d	file:
DECLARE_REF_CLK	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^#define DECLARE_REF_CLK(/;"	d	file:
DECLARE_RESERVED_MAP	arch/blackfin/cpu/gpio.c	/^#define DECLARE_RESERVED_MAP(/;"	d	file:
DECLARE_RESERVED_MAP	drivers/gpio/adi_gpio2.c	/^#define DECLARE_RESERVED_MAP(/;"	d	file:
DECLARE_S3C_SERIAL_FUNCTIONS	drivers/serial/serial_s3c24x0.c	/^#define DECLARE_S3C_SERIAL_FUNCTIONS(/;"	d	file:
DECLARE_WAITQUEUE	include/linux/compat.h	/^#define DECLARE_WAITQUEUE(/;"	d
DECL_BFIN_UART	drivers/serial/serial_bfin.c	/^#define DECL_BFIN_UART(/;"	d	file:
DECODE	drivers/net/ax88180.h	/^#define DECODE	/;"	d
DECODE_CLEAR_SEGOVR	drivers/bios_emulator/include/x86emu/decode.h	/^#define DECODE_CLEAR_SEGOVR(/;"	d
DECODE_EN	drivers/net/ax88180.h	/^  #define DECODE_EN	/;"	d
DECODE_PRINTF	drivers/bios_emulator/include/x86emu/debug.h	/^# define DECODE_PRINTF(/;"	d
DECODE_PRINTF2	drivers/bios_emulator/include/x86emu/debug.h	/^# define DECODE_PRINTF2(/;"	d
DECODE_RM_BYTE_REGISTER	drivers/bios_emulator/include/x86emu/decode.h	/^#define DECODE_RM_BYTE_REGISTER(/;"	d
DECODE_RM_LONG_REGISTER	drivers/bios_emulator/include/x86emu/decode.h	/^#define DECODE_RM_LONG_REGISTER(/;"	d
DECODE_RM_WORD_REGISTER	drivers/bios_emulator/include/x86emu/decode.h	/^#define DECODE_RM_WORD_REGISTER(/;"	d
DECPROTXSET	arch/arm/mach-exynos/include/mach/tzpc.h	/^#define DECPROTXSET	/;"	d
DEC_DCNT_THRESHOLD_25MV	include/fsl_usb.h	/^#define DEC_DCNT_THRESHOLD_25MV /;"	d
DEC_DCNT_THRESHOLD_50MV	include/fsl_usb.h	/^#define DEC_DCNT_THRESHOLD_50MV /;"	d
DEC_STATUS_0	drivers/mtd/nand/tegra_nand.h	/^#define DEC_STATUS_0	/;"	d
DEC_STATUS_A_ECC_FAIL	drivers/mtd/nand/tegra_nand.h	/^#define DEC_STATUS_A_ECC_FAIL	/;"	d
DEC_STATUS_B_ECC_FAIL	drivers/mtd/nand/tegra_nand.h	/^#define DEC_STATUS_B_ECC_FAIL	/;"	d
DEEPPD	arch/arm/include/asm/arch-omap3/cpu.h	/^#define DEEPPD	/;"	d
DEEP_S3_EN_AC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_S3_EN_AC	/;"	d
DEEP_S3_EN_DC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_S3_EN_DC	/;"	d
DEEP_S3_POL	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define DEEP_S3_POL	/;"	d
DEEP_S5_EN_AC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_S5_EN_AC	/;"	d
DEEP_S5_EN_DC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_S5_EN_DC	/;"	d
DEEP_S5_POL	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define DEEP_S5_POL	/;"	d
DEEP_SLEEP	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define DEEP_SLEEP	/;"	d
DEEP_SX_ACPRESENT_PD	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_SX_ACPRESENT_PD	/;"	d
DEEP_SX_CONFIG	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define DEEP_SX_CONFIG	/;"	d
DEEP_SX_GP27_PIN_EN	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_SX_GP27_PIN_EN	/;"	d
DEEP_SX_WAKE_PIN_EN	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define  DEEP_SX_WAKE_PIN_EN	/;"	d
DEFAULT_80003ES2LAN_TCTL_EXT_GCEX	drivers/net/e1000.h	/^#define DEFAULT_80003ES2LAN_TCTL_EXT_GCEX /;"	d
DEFAULT_80003ES2LAN_TIPG_IPGR2	drivers/net/e1000.h	/^#define DEFAULT_80003ES2LAN_TIPG_IPGR2 /;"	d
DEFAULT_80003ES2LAN_TIPG_IPGT_1000	drivers/net/e1000.h	/^#define DEFAULT_80003ES2LAN_TIPG_IPGT_1000 /;"	d
DEFAULT_80003ES2LAN_TIPG_IPGT_10_100	drivers/net/e1000.h	/^#define DEFAULT_80003ES2LAN_TIPG_IPGT_10_100 /;"	d
DEFAULT_82542_TIPG_IPGR1	drivers/net/e1000.h	/^#define DEFAULT_82542_TIPG_IPGR1 /;"	d
DEFAULT_82542_TIPG_IPGR2	drivers/net/e1000.h	/^#define DEFAULT_82542_TIPG_IPGR2 /;"	d
DEFAULT_82542_TIPG_IPGT	drivers/net/e1000.h	/^#define DEFAULT_82542_TIPG_IPGT /;"	d
DEFAULT_82543_TIPG_IPGR1	drivers/net/e1000.h	/^#define DEFAULT_82543_TIPG_IPGR1 /;"	d
DEFAULT_82543_TIPG_IPGR2	drivers/net/e1000.h	/^#define DEFAULT_82543_TIPG_IPGR2 /;"	d
DEFAULT_82543_TIPG_IPGT_COPPER	drivers/net/e1000.h	/^#define DEFAULT_82543_TIPG_IPGT_COPPER /;"	d
DEFAULT_82543_TIPG_IPGT_FIBER	drivers/net/e1000.h	/^#define DEFAULT_82543_TIPG_IPGT_FIBER /;"	d
DEFAULT_ADDR_LEN	cmd/i2c.c	/^#define DEFAULT_ADDR_LEN	/;"	d	file:
DEFAULT_BRIGHTNESS	board/liebherr/lwmon5/lwmon5.c	/^#define DEFAULT_BRIGHTNESS	/;"	d	file:
DEFAULT_BRIGHTNESS	board/socrates/socrates.c	/^#define DEFAULT_BRIGHTNESS	/;"	d	file:
DEFAULT_BULK_IN_DELAY	drivers/usb/eth/smsc95xx.c	/^#define DEFAULT_BULK_IN_DELAY	/;"	d	file:
DEFAULT_CMAP_SIZE	tools/bmp_logo.c	/^#define DEFAULT_CMAP_SIZE	/;"	d	file:
DEFAULT_CMD	drivers/net/ax88180.h	/^  #define DEFAULT_CMD	/;"	d
DEFAULT_DATA_LEB	fs/ubifs/sb.c	/^#define DEFAULT_DATA_LEB /;"	d	file:
DEFAULT_DEVICE_TREE	board/coreboot/coreboot/Kconfig	/^config DEFAULT_DEVICE_TREE$/;"	c
DEFAULT_DEVICE_TREE	dts/Kconfig	/^config DEFAULT_DEVICE_TREE$/;"	c	menu:Device Tree Control
DEFAULT_DMIBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DEFAULT_DMIBAR	/;"	d
DEFAULT_DOGTHD0	drivers/net/ax88180.h	/^  #define DEFAULT_DOGTHD0	/;"	d
DEFAULT_DOGTHD1	drivers/net/ax88180.h	/^  #define DEFAULT_DOGTHD1	/;"	d
DEFAULT_DQS	arch/arm/mach-exynos/dmc_init_ddr3.c	/^#define DEFAULT_DQS	/;"	d	file:
DEFAULT_DQS_X4	arch/arm/mach-exynos/dmc_init_ddr3.c	/^#define DEFAULT_DQS_X4	/;"	d	file:
DEFAULT_DURATION	board/tqc/tqm5200/cmd_stk52xx.c	/^#define DEFAULT_DURATION	/;"	d	file:
DEFAULT_EMPTY_SCAN_SIZE	fs/jffs2/jffs2_1pass.c	/^#define DEFAULT_EMPTY_SCAN_SIZE	/;"	d	file:
DEFAULT_ENV_INSTANCE_EMBEDDED	common/env_embedded.c	/^#define DEFAULT_ENV_INSTANCE_EMBEDDED$/;"	d	file:
DEFAULT_ENV_INSTANCE_STATIC	tools/env/fw_env.c	/^#define DEFAULT_ENV_INSTANCE_STATIC$/;"	d	file:
DEFAULT_EPBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DEFAULT_EPBAR	/;"	d
DEFAULT_ETH_MTU	drivers/net/ax88180.h	/^#define DEFAULT_ETH_MTU	/;"	d
DEFAULT_EXT_SCR	drivers/net/ax88180.h	/^  #define DEFAULT_EXT_SCR	/;"	d
DEFAULT_FANOUT	fs/ubifs/sb.c	/^#define DEFAULT_FANOUT /;"	d	file:
DEFAULT_FDT_FILE	common/Kconfig	/^config DEFAULT_FDT_FILE$/;"	c
DEFAULT_FIFO_DEPTH	drivers/net/phy/ti.c	/^#define DEFAULT_FIFO_DEPTH	/;"	d	file:
DEFAULT_FILTER	drivers/usb/gadget/ether.c	/^#define	DEFAULT_FILTER	/;"	d	file:
DEFAULT_FM_MDIO_NAME	include/fm_eth.h	/^#define DEFAULT_FM_MDIO_NAME /;"	d
DEFAULT_FM_TGEC_MDIO_NAME	include/fm_eth.h	/^#define DEFAULT_FM_TGEC_MDIO_NAME /;"	d
DEFAULT_FREQ	board/tqc/tqm5200/cmd_stk52xx.c	/^#define DEFAULT_FREQ	/;"	d	file:
DEFAULT_FS_BURST_CAP_SIZE	drivers/usb/eth/smsc95xx.c	/^#define DEFAULT_FS_BURST_CAP_SIZE	/;"	d	file:
DEFAULT_FW_INITRAMFS_BOOT_ENV	include/configs/ti_armv7_keystone2.h	/^#define DEFAULT_FW_INITRAMFS_BOOT_ENV	/;"	d
DEFAULT_GC_LEB	fs/ubifs/sb.c	/^#define DEFAULT_GC_LEB /;"	d	file:
DEFAULT_GPIOBASE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DEFAULT_GPIOBASE	/;"	d
DEFAULT_HS_BURST_CAP_SIZE	drivers/usb/eth/smsc95xx.c	/^#define DEFAULT_HS_BURST_CAP_SIZE	/;"	d	file:
DEFAULT_IDX_LEB	fs/ubifs/sb.c	/^#define DEFAULT_IDX_LEB /;"	d	file:
DEFAULT_IMR	drivers/net/ax88180.h	/^  #define DEFAULT_IMR	/;"	d
DEFAULT_IRQ	drivers/crypto/fsl/jr.h	/^#define DEFAULT_IRQ	/;"	d
DEFAULT_ITR	drivers/net/e1000.c	/^#define DEFAULT_ITR	/;"	d	file:
DEFAULT_JAM_LIMIT	drivers/net/ax88180.h	/^  #define DEFAULT_JAM_LIMIT	/;"	d
DEFAULT_JHEADS_CNT	fs/ubifs/sb.c	/^#define DEFAULT_JHEADS_CNT /;"	d	file:
DEFAULT_JNL_PERCENT	fs/ubifs/sb.c	/^#define DEFAULT_JNL_PERCENT /;"	d	file:
DEFAULT_JR_ID	drivers/crypto/fsl/jr.h	/^#define DEFAULT_JR_ID	/;"	d
DEFAULT_JR_LIODN	drivers/crypto/fsl/jr.h	/^#define DEFAULT_JR_LIODN	/;"	d
DEFAULT_LINE_LENGTH_BYTES	lib/display_options.c	/^#define DEFAULT_LINE_LENGTH_BYTES /;"	d	file:
DEFAULT_LINUX_BOOT_ENV	include/configs/ti_armv7_common.h	/^#define DEFAULT_LINUX_BOOT_ENV /;"	d
DEFAULT_LPD	arch/m68k/cpu/mcf532x/speed.c	/^#define DEFAULT_LPD	/;"	d	file:
DEFAULT_LSAVE_CNT	fs/ubifs/sb.c	/^#define DEFAULT_LSAVE_CNT /;"	d	file:
DEFAULT_MACCFG0	drivers/net/ax88180.h	/^  #define DEFAULT_MACCFG0	/;"	d
DEFAULT_MACCFG1	drivers/net/ax88180.h	/^  #define DEFAULT_MACCFG1	/;"	d
DEFAULT_MACCFG2	drivers/net/ax88180.h	/^  #define DEFAULT_MACCFG2	/;"	d
DEFAULT_MACCFG3	drivers/net/ax88180.h	/^  #define DEFAULT_MACCFG3	/;"	d
DEFAULT_MAX_JNL	fs/ubifs/sb.c	/^#define DEFAULT_MAX_JNL /;"	d	file:
DEFAULT_MAX_RP_SIZE	fs/ubifs/sb.c	/^#define DEFAULT_MAX_RP_SIZE /;"	d	file:
DEFAULT_MII_NAME	include/tsec.h	/^#define DEFAULT_MII_NAME /;"	d
DEFAULT_MISC	drivers/net/ax88180.h	/^  #define DEFAULT_MISC	/;"	d
DEFAULT_MMAP_MAX	include/malloc.h	/^#define DEFAULT_MMAP_MAX /;"	d
DEFAULT_MMAP_THRESHOLD	include/malloc.h	/^#define DEFAULT_MMAP_THRESHOLD /;"	d
DEFAULT_MMC_TI_ARGS	include/configs/ti_armv7_common.h	/^#define DEFAULT_MMC_TI_ARGS /;"	d
DEFAULT_NAME_LEN	net/tftp.c	/^#define DEFAULT_NAME_LEN	/;"	d	file:
DEFAULT_NUM_SUBWINDOWS	arch/powerpc/include/asm/fsl_pamu.h	/^#define DEFAULT_NUM_SUBWINDOWS	/;"	d
DEFAULT_PADCFG	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^#define DEFAULT_PADCFG(/;"	d
DEFAULT_PADCFG	board/nvidia/cardhu/pinmux-config-cardhu.h	/^#define DEFAULT_PADCFG(/;"	d
DEFAULT_PADCFG	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define DEFAULT_PADCFG(/;"	d
DEFAULT_PADCFG	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^#define DEFAULT_PADCFG(/;"	d
DEFAULT_PADCFG	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^#define DEFAULT_PADCFG(/;"	d
DEFAULT_PARAM	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define DEFAULT_PARAM	/;"	d
DEFAULT_PCIEXBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DEFAULT_PCIEXBAR	/;"	d
DEFAULT_PINMUX	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^#define DEFAULT_PINMUX(/;"	d
DEFAULT_PINMUX	board/nvidia/cardhu/pinmux-config-cardhu.h	/^#define DEFAULT_PINMUX(/;"	d
DEFAULT_PINMUX	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define DEFAULT_PINMUX(/;"	d
DEFAULT_PINMUX	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^#define DEFAULT_PINMUX(/;"	d
DEFAULT_PINMUX	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^#define DEFAULT_PINMUX(/;"	d
DEFAULT_PITCH_OFFSET	include/radeon.h	/^#define DEFAULT_PITCH_OFFSET	/;"	d
DEFAULT_PMBASE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DEFAULT_PMBASE	/;"	d
DEFAULT_PMMC_BOOT_ENV	include/configs/ti_armv7_keystone2.h	/^#define DEFAULT_PMMC_BOOT_ENV	/;"	d
DEFAULT_QLEN	drivers/usb/gadget/ether.c	/^#define DEFAULT_QLEN	/;"	d	file:
DEFAULT_RCBABASE	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DEFAULT_RCBABASE	/;"	d
DEFAULT_REFCLK_MHZ	drivers/phy/marvell/comphy_a3700.h	/^#define DEFAULT_REFCLK_MHZ	/;"	d
DEFAULT_RP_PERCENT	fs/ubifs/sb.c	/^#define DEFAULT_RP_PERCENT /;"	d	file:
DEFAULT_RXBOUND	drivers/net/ax88180.h	/^  #define DEFAULT_RXBOUND	/;"	d
DEFAULT_RXBTHD0	drivers/net/ax88180.h	/^  #define DEFAULT_RXBTHD0	/;"	d
DEFAULT_RXBTHD1	drivers/net/ax88180.h	/^  #define DEFAULT_RXBTHD1	/;"	d
DEFAULT_RXCFG	drivers/net/ax88180.h	/^  #define DEFAULT_RXCFG	/;"	d
DEFAULT_RXCURT	drivers/net/ax88180.h	/^  #define DEFAULT_RXCURT	/;"	d
DEFAULT_RXFILTER	drivers/net/ax88180.h	/^  #define DEFAULT_RXFILTER	/;"	d
DEFAULT_RXFULTHD	drivers/net/ax88180.h	/^  #define DEFAULT_RXFULTHD	/;"	d
DEFAULT_RXINDICATOR	drivers/net/ax88180.h	/^  #define DEFAULT_RXINDICATOR	/;"	d
DEFAULT_RX_ID_DELAY	drivers/net/phy/ti.c	/^#define DEFAULT_RX_ID_DELAY	/;"	d	file:
DEFAULT_SC_BOTTOM_MAX	include/radeon.h	/^#define DEFAULT_SC_BOTTOM_MAX	/;"	d
DEFAULT_SC_BOTTOM_RIGHT	include/radeon.h	/^#define DEFAULT_SC_BOTTOM_RIGHT	/;"	d
DEFAULT_SC_RIGHT_MAX	include/radeon.h	/^#define DEFAULT_SC_RIGHT_MAX	/;"	d
DEFAULT_SC_TOP_LEFT	include/radeon.h	/^#define DEFAULT_SC_TOP_LEFT	/;"	d
DEFAULT_SECTOR_SIZE	disk/part_amiga.h	/^#define DEFAULT_SECTOR_SIZE	/;"	d
DEFAULT_SECTOR_SIZE	disk/part_amiga.h	/^#define DEFAULT_SECTOR_SIZE /;"	d
DEFAULT_SERDES	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	DEFAULT_SERDES,$/;"	e	enum:serdes_type
DEFAULT_SETUP_BASE	arch/x86/lib/zimage.c	/^#define DEFAULT_SETUP_BASE	/;"	d	file:
DEFAULT_SPD_ADDR1	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define DEFAULT_SPD_ADDR1	/;"	d	file:
DEFAULT_SPD_ADDR2	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define DEFAULT_SPD_ADDR2	/;"	d	file:
DEFAULT_TILE_MASK	include/radeon.h	/^#define DEFAULT_TILE_MASK	/;"	d
DEFAULT_TIMEOUT_US	drivers/mtd/nand/sunxi_nand_spl.c	/^#define DEFAULT_TIMEOUT_US	/;"	d	file:
DEFAULT_TIME_GRAN	fs/ubifs/sb.c	/^#define DEFAULT_TIME_GRAN /;"	d	file:
DEFAULT_TOP_PAD	include/malloc.h	/^#define DEFAULT_TOP_PAD /;"	d
DEFAULT_TRIM_THRESHOLD	include/malloc.h	/^#define DEFAULT_TRIM_THRESHOLD /;"	d
DEFAULT_TXBS	drivers/net/ax88180.h	/^  #define DEFAULT_TXBS	/;"	d
DEFAULT_TXCFG	drivers/net/ax88180.h	/^  #define DEFAULT_TXCFG	/;"	d
DEFAULT_TXCMD	drivers/net/ax88180.h	/^  #define DEFAULT_TXCMD	/;"	d
DEFAULT_TXDES0	drivers/net/ax88180.h	/^  #define DEFAULT_TXDES0	/;"	d
DEFAULT_TXDES1	drivers/net/ax88180.h	/^  #define DEFAULT_TXDES1	/;"	d
DEFAULT_TXDES2	drivers/net/ax88180.h	/^  #define DEFAULT_TXDES2	/;"	d
DEFAULT_TXDES3	drivers/net/ax88180.h	/^  #define DEFAULT_TXDES3	/;"	d
DEFAULT_TXLEN	drivers/net/ax88180.h	/^  #define DEFAULT_TXLEN	/;"	d
DEFAULT_TXPAUT	drivers/net/ax88180.h	/^  #define DEFAULT_TXPAUT	/;"	d
DEFAULT_TX_ID_DELAY	drivers/net/phy/ti.c	/^#define DEFAULT_TX_ID_DELAY	/;"	d	file:
DEFAULT_UART_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DEFAULT_UART_BASE	/;"	d
DEFAULT_UDELAY	drivers/i2c/i2c-gpio.c	/^#define DEFAULT_UDELAY	/;"	d	file:
DEFAULT_VALUE	tools/buildman/kconfiglib.py	/^DEFAULT_VALUE = {BOOL: "n", TRISTATE: "n", STRING: "", INT: "", HEX: ""}$/;"	v
DEFAULT_VOL	board/tqc/tqm5200/cmd_stk52xx.c	/^#define DEFAULT_VOL	/;"	d	file:
DEFAULT_VSC9953_MDIO_NAME	include/vsc9953.h	/^#define DEFAULT_VSC9953_MDIO_NAME	/;"	d
DEFAULT_WORD_LEN	arch/arm/include/asm/arch-armada100/spi.h	/^#define DEFAULT_WORD_LEN	/;"	d
DEFAULT_WRIOP_MDIO1_NAME	include/fsl-mc/ldpaa_wriop.h	/^#define DEFAULT_WRIOP_MDIO1_NAME /;"	d
DEFAULT_WRIOP_MDIO2_NAME	include/fsl-mc/ldpaa_wriop.h	/^#define DEFAULT_WRIOP_MDIO2_NAME /;"	d
DEFECTIVE_BLOCK	drivers/mtd/nand/denali.h	/^#define DEFECTIVE_BLOCK /;"	d
DEFEND	net/link_local.c	/^	DEFEND,$/;"	e	enum:ll_state_t	file:
DEFEND_INTERVAL	net/link_local.c	/^	DEFEND_INTERVAL = 10$/;"	e	enum:__anonc9befdc40103	file:
DEFER_COUNT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DEFER_COUNT(/;"	d
DEFER_COUNT	arch/arm/mach-exynos/include/mach/dp.h	/^#define DEFER_COUNT(/;"	d
DEFER_CTRL_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DEFER_CTRL_EN	/;"	d
DEFER_CTRL_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define DEFER_CTRL_EN	/;"	d
DEFINE	include/linux/kbuild.h	/^#define DEFINE(/;"	d
DEFINE_ALE_FIELD	drivers/net/cpsw.c	/^#define DEFINE_ALE_FIELD(/;"	d	file:
DEFINE_ALIGN_BUFFER	include/memalign.h	/^#define DEFINE_ALIGN_BUFFER(/;"	d
DEFINE_CACHE_ALIGN_BUFFER	include/memalign.h	/^#define DEFINE_CACHE_ALIGN_BUFFER(/;"	d
DEFINE_GET_SYS_REG	arch/nds32/include/asm/cache.h	/^#define DEFINE_GET_SYS_REG(/;"	d
DEFINE_IDR	drivers/mtd/mtdcore.c	/^#define DEFINE_IDR(/;"	d	file:
DEFINE_LED_TRIGGER	include/linux/compat.h	/^#define DEFINE_LED_TRIGGER(/;"	d
DEFINE_MUTEX	include/linux/compat.h	/^#define DEFINE_MUTEX(/;"	d
DEFINE_PRINT_UPDATE	board/compulab/common/eeprom.c	/^#define DEFINE_PRINT_UPDATE(/;"	d	file:
DEFLATED	lib/gunzip.c	/^#define DEFLATED	/;"	d	file:
DEFLATE_H	lib/zlib/deflate.h	/^#define DEFLATE_H$/;"	d
DEF_ADAPTER	drivers/i2c/kona_i2c.c	/^#define DEF_ADAPTER(/;"	d	file:
DEF_BFIN_LOGO_BPP	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_BPP	/;"	d
DEF_BFIN_LOGO_BPP	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_BPP	/;"	d
DEF_BFIN_LOGO_BPP	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_BPP	/;"	d
DEF_BFIN_LOGO_BPP	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_BPP	/;"	d
DEF_BFIN_LOGO_DATA	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^unsigned char DEF_BFIN_LOGO_DATA[] = {$/;"	v	typeref:typename:unsigned char[]
DEF_BFIN_LOGO_DATA	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^unsigned char DEF_BFIN_LOGO_DATA[] = {$/;"	v	typeref:typename:unsigned char[]
DEF_BFIN_LOGO_DATA	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^unsigned char DEF_BFIN_LOGO_DATA[] = {$/;"	v	typeref:typename:unsigned char[]
DEF_BFIN_LOGO_DATA	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^unsigned char DEF_BFIN_LOGO_DATA[] = {$/;"	v	typeref:typename:unsigned char[]
DEF_BFIN_LOGO_HEIGHT	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_HEIGHT	/;"	d
DEF_BFIN_LOGO_HEIGHT	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_HEIGHT	/;"	d
DEF_BFIN_LOGO_HEIGHT	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_HEIGHT	/;"	d
DEF_BFIN_LOGO_HEIGHT	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_HEIGHT	/;"	d
DEF_BFIN_LOGO_PIXELS	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_PIXELS	/;"	d
DEF_BFIN_LOGO_PIXELS	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_PIXELS	/;"	d
DEF_BFIN_LOGO_PIXELS	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_PIXELS	/;"	d
DEF_BFIN_LOGO_PIXELS	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_PIXELS	/;"	d
DEF_BFIN_LOGO_PIXEL_SIZE	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_PIXEL_SIZE	/;"	d
DEF_BFIN_LOGO_PIXEL_SIZE	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_PIXEL_SIZE	/;"	d
DEF_BFIN_LOGO_PIXEL_SIZE	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_PIXEL_SIZE	/;"	d
DEF_BFIN_LOGO_PIXEL_SIZE	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_PIXEL_SIZE	/;"	d
DEF_BFIN_LOGO_SIZE	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_SIZE	/;"	d
DEF_BFIN_LOGO_SIZE	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_SIZE	/;"	d
DEF_BFIN_LOGO_SIZE	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_SIZE	/;"	d
DEF_BFIN_LOGO_SIZE	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_SIZE	/;"	d
DEF_BFIN_LOGO_WIDTH	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_WIDTH	/;"	d
DEF_BFIN_LOGO_WIDTH	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_WIDTH	/;"	d
DEF_BFIN_LOGO_WIDTH	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define	DEF_BFIN_LOGO_WIDTH	/;"	d
DEF_BFIN_LOGO_WIDTH	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define	DEF_BFIN_LOGO_WIDTH	/;"	d
DEF_DEVICE	drivers/i2c/kona_i2c.c	/^#define DEF_DEVICE(/;"	d	file:
DEF_FILELEN	tools/easylogo/easylogo.c	/^#define DEF_FILELEN	/;"	d	file:
DEF_INTMASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define DEF_INTMASK	/;"	d
DEF_MEM_LEVEL	lib/zlib/zutil.h	/^#  define DEF_MEM_LEVEL /;"	d
DEF_PORT_IRQ	drivers/block/sata_sil.h	/^	DEF_PORT_IRQ		= PORT_IRQ_COMPLETE | PORT_IRQ_ERROR |$/;"	e	enum:__anone6fe50d30103
DEF_PORT_IRQ	include/ahci.h	/^#define DEF_PORT_IRQ	/;"	d
DEF_SPD	drivers/i2c/kona_i2c.c	/^#define DEF_SPD /;"	d	file:
DEF_SPD_ENUM	drivers/i2c/kona_i2c.c	/^#define DEF_SPD_ENUM /;"	d	file:
DEF_U_BOOT_LOGO_BPP	include/video_logo.h	/^#define	DEF_U_BOOT_LOGO_BPP	/;"	d
DEF_U_BOOT_LOGO_DATA	include/video_logo.h	/^unsigned char DEF_U_BOOT_LOGO_DATA[DEF_U_BOOT_LOGO_SIZE] = {$/;"	v	typeref:typename:unsigned char[]
DEF_U_BOOT_LOGO_HEIGHT	include/video_logo.h	/^#define	DEF_U_BOOT_LOGO_HEIGHT	/;"	d
DEF_U_BOOT_LOGO_PIXELS	include/video_logo.h	/^#define	DEF_U_BOOT_LOGO_PIXELS	/;"	d
DEF_U_BOOT_LOGO_PIXEL_SIZE	include/video_logo.h	/^#define	DEF_U_BOOT_LOGO_PIXEL_SIZE	/;"	d
DEF_U_BOOT_LOGO_SIZE	include/video_logo.h	/^#define	DEF_U_BOOT_LOGO_SIZE	/;"	d
DEF_U_BOOT_LOGO_WIDTH	include/video_logo.h	/^#define	DEF_U_BOOT_LOGO_WIDTH	/;"	d
DEF_WBITS	lib/zlib/zutil.h	/^#  define DEF_WBITS /;"	d
DEH_SIZE	fs/reiserfs/reiserfs_private.h	/^#define DEH_SIZE /;"	d
DEH_Statdata	fs/reiserfs/reiserfs_private.h	/^#define DEH_Statdata /;"	d
DEH_Visible	fs/reiserfs/reiserfs_private.h	/^#define DEH_Visible /;"	d
DEISOLATE_IO	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define DEISOLATE_IO	/;"	d
DEK_BLOB_DESCSIZE	drivers/crypto/fsl/desc.h	/^#define DEK_BLOB_DESCSIZE	/;"	d
DEL	common/cli_readline.c	/^#define DEL	/;"	d	file:
DEL7	common/cli_readline.c	/^#define DEL7	/;"	d	file:
DELAY	board/freescale/mx31ads/lowlevel_init.S	/^.macro DELAY loops$/;"	m
DELAY	board/imx31_phycore/lowlevel_init.S	/^.macro DELAY loops$/;"	m
DELAY	common/xyzModem.c	/^#define DELAY /;"	d	file:
DELAY200_D	board/renesas/sh7763rdp/lowlevel_init.S	/^DELAY200_D:	.long	17800$/;"	l
DELAY60_D	board/renesas/sh7763rdp/lowlevel_init.S	/^DELAY60_D:	.long	60$/;"	l
DELAYED_STATUS	drivers/usb/gadget/storage_common.c	/^#define DELAYED_STATUS	/;"	d	file:
DELAYMODE_SHIFT	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define DELAYMODE_SHIFT	/;"	d
DELAY_ABORT_SEQ	board/keymile/common/common.h	/^#define DELAY_ABORT_SEQ	/;"	d
DELAY_HALF_PERIOD	board/keymile/common/common.h	/^#define DELAY_HALF_PERIOD	/;"	d
DELAY_OP	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	DELAY_OP,$/;"	e	enum:mv_op
DELAY_OUTPUT	drivers/net/ne2000.c	/^#define DELAY_OUTPUT	/;"	d	file:
DELAY_START_VAL	drivers/ddr/microchip/ddr2_regs.h	/^#define DELAY_START_VAL(/;"	d
DELAY_US	arch/powerpc/cpu/mpc8260/i2c.c	/^#define DELAY_US	/;"	d	file:
DELETED_FLAG	include/fat.h	/^#define DELETED_FLAG	/;"	d
DELTA_D	drivers/ddr/altera/sequencer.c	/^#define DELTA_D	/;"	d	file:
DENALI_BUFFER_LOAD	drivers/mtd/nand/denali.c	/^#define DENALI_BUFFER_LOAD	/;"	d	file:
DENALI_BUFFER_WRITE	drivers/mtd/nand/denali.c	/^#define DENALI_BUFFER_WRITE	/;"	d	file:
DENALI_BUF_SIZE	drivers/mtd/nand/denali.h	/^#define DENALI_BUF_SIZE	/;"	d
DENALI_IRQ_ALL	drivers/mtd/nand/denali.c	/^#define DENALI_IRQ_ALL	/;"	d	file:
DENALI_LOCK	drivers/mtd/nand/denali.c	/^#define DENALI_LOCK	/;"	d	file:
DENALI_LOCK_TIGHT	drivers/mtd/nand/denali.c	/^#define DENALI_LOCK_TIGHT	/;"	d	file:
DENALI_READ	drivers/mtd/nand/denali.c	/^#define DENALI_READ	/;"	d	file:
DENALI_UNLOCK_END	drivers/mtd/nand/denali.c	/^#define DENALI_UNLOCK_END	/;"	d	file:
DENALI_UNLOCK_START	drivers/mtd/nand/denali.c	/^#define DENALI_UNLOCK_START	/;"	d	file:
DENALI_WRITE	drivers/mtd/nand/denali.c	/^#define DENALI_WRITE	/;"	d	file:
DENDA	drivers/usb/host/r8a66597.h	/^#define	DENDA	/;"	d
DENDE	drivers/usb/host/r8a66597.h	/^#define	DENDE	/;"	d
DEPCTL0_MPS_16	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL0_MPS_16	/;"	d
DEPCTL0_MPS_32	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL0_MPS_32	/;"	d
DEPCTL0_MPS_64	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL0_MPS_64	/;"	d
DEPCTL0_MPS_8	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL0_MPS_8	/;"	d
DEPCTL_BULK_TYPE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_BULK_TYPE	/;"	d
DEPCTL_CNAK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_CNAK	/;"	d
DEPCTL_CTRL_TYPE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_CTRL_TYPE	/;"	d
DEPCTL_EPDIS	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_EPDIS	/;"	d
DEPCTL_EPENA	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_EPENA	/;"	d
DEPCTL_INTR_TYPE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_INTR_TYPE	/;"	d
DEPCTL_ISO_TYPE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_ISO_TYPE	/;"	d
DEPCTL_MPS_BIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_MPS_BIT	/;"	d
DEPCTL_MPS_BULK_512	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_MPS_BULK_512	/;"	d
DEPCTL_MPS_INT_MPS_16	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_MPS_INT_MPS_16	/;"	d
DEPCTL_MPS_MASK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_MPS_MASK	/;"	d
DEPCTL_NEXT_EP_BIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_NEXT_EP_BIT	/;"	d
DEPCTL_SETD0PID	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_SETD0PID	/;"	d
DEPCTL_SETD1PID	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_SETD1PID	/;"	d
DEPCTL_SNAK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_SNAK	/;"	d
DEPCTL_STALL	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_STALL	/;"	d
DEPCTL_TXFNUM_0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TXFNUM_0	/;"	d
DEPCTL_TXFNUM_1	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TXFNUM_1	/;"	d
DEPCTL_TXFNUM_2	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TXFNUM_2	/;"	d
DEPCTL_TXFNUM_3	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TXFNUM_3	/;"	d
DEPCTL_TXFNUM_4	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TXFNUM_4	/;"	d
DEPCTL_TYPE_BIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TYPE_BIT	/;"	d
DEPCTL_TYPE_MASK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_TYPE_MASK	/;"	d
DEPCTL_USBACTEP	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEPCTL_USBACTEP	/;"	d
DEPEVT_STATUS_BUSERR	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_BUSERR	/;"	d
DEPEVT_STATUS_CONTROL_DATA	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_CONTROL_DATA	/;"	d
DEPEVT_STATUS_CONTROL_STATUS	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_CONTROL_STATUS	/;"	d
DEPEVT_STATUS_IOC	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_IOC	/;"	d
DEPEVT_STATUS_LST	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_LST	/;"	d
DEPEVT_STATUS_SHORT	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_SHORT	/;"	d
DEPEVT_STATUS_TRANSFER_ACTIVE	drivers/usb/dwc3/core.h	/^#define DEPEVT_STATUS_TRANSFER_ACTIVE	/;"	d
DEPEVT_STREAMEVT_FOUND	drivers/usb/dwc3/core.h	/^#define DEPEVT_STREAMEVT_FOUND	/;"	d
DEPEVT_STREAMEVT_NOTFOUND	drivers/usb/dwc3/core.h	/^#define DEPEVT_STREAMEVT_NOTFOUND	/;"	d
DEPTHOF	lib/bzip2/bzlib_huffman.c	/^#define DEPTHOF(/;"	d	file:
DESCIDCPY	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DESCIDCPY	/;"	d
DESCIDCPY_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DESCIDCPY_P	/;"	d
DESCRIPTION	doc/kwboot.1	/^.SH "DESCRIPTION"$/;"	s	title:KWBOOT
DESCRIPTION	doc/mkimage.1	/^.SH "DESCRIPTION"$/;"	s	title:MKIMAGE
DESC_ALL_CNT	drivers/net/uli526x.c	/^#define DESC_ALL_CNT	/;"	d	file:
DESC_BUFFER1_SZ_MASK	drivers/net/calxedaxgmac.c	/^#define DESC_BUFFER1_SZ_MASK	/;"	d	file:
DESC_BUFFER2_SZ_MASK	drivers/net/calxedaxgmac.c	/^#define DESC_BUFFER2_SZ_MASK	/;"	d	file:
DESC_BUFFER2_SZ_OFFSET	drivers/net/calxedaxgmac.c	/^#define DESC_BUFFER2_SZ_OFFSET	/;"	d	file:
DESC_H	drivers/crypto/fsl/desc.h	/^#define DESC_H$/;"	d
DESC_I_BIT	drivers/net/sh_eth.h	/^enum DESC_I_BIT {$/;"	g
DESC_I_RINT1	drivers/net/sh_eth.h	/^	DESC_I_RINT1 = 0x0001,$/;"	e	enum:DESC_I_BIT
DESC_I_RINT2	drivers/net/sh_eth.h	/^	DESC_I_RINT4 = 0x0008, DESC_I_RINT3 = 0x0004, DESC_I_RINT2 = 0x0002,$/;"	e	enum:DESC_I_BIT
DESC_I_RINT3	drivers/net/sh_eth.h	/^	DESC_I_RINT4 = 0x0008, DESC_I_RINT3 = 0x0004, DESC_I_RINT2 = 0x0002,$/;"	e	enum:DESC_I_BIT
DESC_I_RINT4	drivers/net/sh_eth.h	/^	DESC_I_RINT4 = 0x0008, DESC_I_RINT3 = 0x0004, DESC_I_RINT2 = 0x0002,$/;"	e	enum:DESC_I_BIT
DESC_I_RINT5	drivers/net/sh_eth.h	/^	DESC_I_TINT1 = 0x0100, DESC_I_RINT8 = 0x0080, DESC_I_RINT5 = 0x0010,$/;"	e	enum:DESC_I_BIT
DESC_I_RINT8	drivers/net/sh_eth.h	/^	DESC_I_TINT1 = 0x0100, DESC_I_RINT8 = 0x0080, DESC_I_RINT5 = 0x0010,$/;"	e	enum:DESC_I_BIT
DESC_I_TINT1	drivers/net/sh_eth.h	/^	DESC_I_TINT1 = 0x0100, DESC_I_RINT8 = 0x0080, DESC_I_RINT5 = 0x0010,$/;"	e	enum:DESC_I_BIT
DESC_I_TINT2	drivers/net/sh_eth.h	/^	DESC_I_TINT4 = 0x0800, DESC_I_TINT3 = 0x0400, DESC_I_TINT2 = 0x0200,$/;"	e	enum:DESC_I_BIT
DESC_I_TINT3	drivers/net/sh_eth.h	/^	DESC_I_TINT4 = 0x0800, DESC_I_TINT3 = 0x0400, DESC_I_TINT2 = 0x0200,$/;"	e	enum:DESC_I_BIT
DESC_I_TINT4	drivers/net/sh_eth.h	/^	DESC_I_TINT4 = 0x0800, DESC_I_TINT3 = 0x0400, DESC_I_TINT2 = 0x0200,$/;"	e	enum:DESC_I_BIT
DESC_JOB_IO_LEN	drivers/crypto/fsl/desc_constr.h	/^#define DESC_JOB_IO_LEN /;"	d
DESC_OWN	drivers/net/calxedaxgmac.c	/^#define DESC_OWN	/;"	d	file:
DESC_RXCTRL_RXCHAIN	drivers/net/designware.h	/^#define DESC_RXCTRL_RXCHAIN	/;"	d
DESC_RXCTRL_RXINTDIS	drivers/net/designware.h	/^#define DESC_RXCTRL_RXINTDIS	/;"	d
DESC_RXCTRL_RXRINGEND	drivers/net/designware.h	/^#define DESC_RXCTRL_RXRINGEND	/;"	d
DESC_RXCTRL_SIZE1MASK	drivers/net/designware.h	/^#define DESC_RXCTRL_SIZE1MASK	/;"	d
DESC_RXCTRL_SIZE1SHFT	drivers/net/designware.h	/^#define DESC_RXCTRL_SIZE1SHFT	/;"	d
DESC_RXCTRL_SIZE2MASK	drivers/net/designware.h	/^#define DESC_RXCTRL_SIZE2MASK	/;"	d
DESC_RXCTRL_SIZE2SHFT	drivers/net/designware.h	/^#define DESC_RXCTRL_SIZE2SHFT	/;"	d
DESC_RXSTS_DAFILTERFAIL	drivers/net/designware.h	/^#define DESC_RXSTS_DAFILTERFAIL	/;"	d
DESC_RXSTS_ERROR	drivers/net/designware.h	/^#define DESC_RXSTS_ERROR	/;"	d
DESC_RXSTS_FRMLENMSK	drivers/net/designware.h	/^#define DESC_RXSTS_FRMLENMSK	/;"	d
DESC_RXSTS_FRMLENSHFT	drivers/net/designware.h	/^#define DESC_RXSTS_FRMLENSHFT	/;"	d
DESC_RXSTS_OWNBYDMA	drivers/net/designware.h	/^#define DESC_RXSTS_OWNBYDMA	/;"	d
DESC_RXSTS_RXCOLLISION	drivers/net/designware.h	/^#define DESC_RXSTS_RXCOLLISION	/;"	d
DESC_RXSTS_RXCRC	drivers/net/designware.h	/^#define DESC_RXSTS_RXCRC	/;"	d
DESC_RXSTS_RXDAMAGED	drivers/net/designware.h	/^#define DESC_RXSTS_RXDAMAGED	/;"	d
DESC_RXSTS_RXDRIBBLING	drivers/net/designware.h	/^#define DESC_RXSTS_RXDRIBBLING	/;"	d
DESC_RXSTS_RXFIRST	drivers/net/designware.h	/^#define DESC_RXSTS_RXFIRST	/;"	d
DESC_RXSTS_RXFRAMEETHER	drivers/net/designware.h	/^#define DESC_RXSTS_RXFRAMEETHER	/;"	d
DESC_RXSTS_RXIPC_GIANT	drivers/net/designware.h	/^#define DESC_RXSTS_RXIPC_GIANT	/;"	d
DESC_RXSTS_RXIPC_GIANTFRAME	drivers/net/designware.h	/^#define DESC_RXSTS_RXIPC_GIANTFRAME	/;"	d
DESC_RXSTS_RXLAST	drivers/net/designware.h	/^#define DESC_RXSTS_RXLAST	/;"	d
DESC_RXSTS_RXMIIERROR	drivers/net/designware.h	/^#define DESC_RXSTS_RXMIIERROR	/;"	d
DESC_RXSTS_RXTRUNCATED	drivers/net/designware.h	/^#define DESC_RXSTS_RXTRUNCATED	/;"	d
DESC_RXSTS_RXVLANTAG	drivers/net/designware.h	/^#define DESC_RXSTS_RXVLANTAG	/;"	d
DESC_RXSTS_RXWATCHDOG	drivers/net/designware.h	/^#define DESC_RXSTS_RXWATCHDOG	/;"	d
DESC_RXSTS_SAFILTERFAIL	drivers/net/designware.h	/^#define DESC_RXSTS_SAFILTERFAIL	/;"	d
DESC_TXCTRL_SIZE1MASK	drivers/net/designware.h	/^#define DESC_TXCTRL_SIZE1MASK	/;"	d
DESC_TXCTRL_SIZE1SHFT	drivers/net/designware.h	/^#define DESC_TXCTRL_SIZE1SHFT	/;"	d
DESC_TXCTRL_SIZE2MASK	drivers/net/designware.h	/^#define DESC_TXCTRL_SIZE2MASK	/;"	d
DESC_TXCTRL_SIZE2SHFT	drivers/net/designware.h	/^#define DESC_TXCTRL_SIZE2SHFT	/;"	d
DESC_TXCTRL_TXCHAIN	drivers/net/designware.h	/^#define DESC_TXCTRL_TXCHAIN	/;"	d
DESC_TXCTRL_TXCHECKINSCTRL	drivers/net/designware.h	/^#define DESC_TXCTRL_TXCHECKINSCTRL	/;"	d
DESC_TXCTRL_TXCRCDIS	drivers/net/designware.h	/^#define DESC_TXCTRL_TXCRCDIS	/;"	d
DESC_TXCTRL_TXFIRST	drivers/net/designware.h	/^#define DESC_TXCTRL_TXFIRST	/;"	d
DESC_TXCTRL_TXINT	drivers/net/designware.h	/^#define DESC_TXCTRL_TXINT	/;"	d
DESC_TXCTRL_TXLAST	drivers/net/designware.h	/^#define DESC_TXCTRL_TXLAST	/;"	d
DESC_TXCTRL_TXRINGEND	drivers/net/designware.h	/^#define DESC_TXCTRL_TXRINGEND	/;"	d
DESC_TXSTS_MSK	drivers/net/designware.h	/^#define DESC_TXSTS_MSK	/;"	d
DESC_TXSTS_OWNBYDMA	drivers/net/designware.h	/^#define DESC_TXSTS_OWNBYDMA	/;"	d
DESC_TXSTS_TXCHAIN	drivers/net/designware.h	/^#define DESC_TXSTS_TXCHAIN	/;"	d
DESC_TXSTS_TXCHECKINSCTRL	drivers/net/designware.h	/^#define DESC_TXSTS_TXCHECKINSCTRL	/;"	d
DESC_TXSTS_TXCRCDIS	drivers/net/designware.h	/^#define DESC_TXSTS_TXCRCDIS	/;"	d
DESC_TXSTS_TXFIRST	drivers/net/designware.h	/^#define DESC_TXSTS_TXFIRST	/;"	d
DESC_TXSTS_TXINT	drivers/net/designware.h	/^#define DESC_TXSTS_TXINT	/;"	d
DESC_TXSTS_TXLAST	drivers/net/designware.h	/^#define DESC_TXSTS_TXLAST	/;"	d
DESC_TXSTS_TXPADDIS	drivers/net/designware.h	/^#define DESC_TXSTS_TXPADDIS	/;"	d
DESC_TXSTS_TXRINGEND	drivers/net/designware.h	/^#define DESC_TXSTS_TXRINGEND	/;"	d
DESELECT_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	DESELECT_CMD			= 0,$/;"	e	enum:__anon114585520103
DESELECT_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DESELECT_CMD			= 0,$/;"	e	enum:__anon957231910203	file:
DESIGNWARE_SPI	drivers/spi/Kconfig	/^config DESIGNWARE_SPI$/;"	c	menu:SPI Support
DESTPTR	include/MCD_progCheck.h	/^#define DESTPTR	/;"	d
DETBAT	include/power/max8997_pmic.h	/^#define DETBAT /;"	d
DET_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DET_CTRL	/;"	d
DET_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define DET_CTRL	/;"	d
DET_STA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DET_STA	/;"	d
DET_STA	arch/arm/mach-exynos/include/mach/dp.h	/^#define DET_STA	/;"	d
DEVACT_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define DEVACT_STS	/;"	d
DEVACT_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DEVACT_STS	/;"	d
DEVADD0	drivers/usb/host/r8a66597.h	/^#define DEVADD0	/;"	d
DEVADD1	drivers/usb/host/r8a66597.h	/^#define DEVADD1	/;"	d
DEVADD2	drivers/usb/host/r8a66597.h	/^#define DEVADD2	/;"	d
DEVADD3	drivers/usb/host/r8a66597.h	/^#define DEVADD3	/;"	d
DEVADD4	drivers/usb/host/r8a66597.h	/^#define DEVADD4	/;"	d
DEVADD5	drivers/usb/host/r8a66597.h	/^#define DEVADD5	/;"	d
DEVADD6	drivers/usb/host/r8a66597.h	/^#define DEVADD6	/;"	d
DEVADD7	drivers/usb/host/r8a66597.h	/^#define DEVADD7	/;"	d
DEVADD8	drivers/usb/host/r8a66597.h	/^#define DEVADD8	/;"	d
DEVADD9	drivers/usb/host/r8a66597.h	/^#define DEVADD9	/;"	d
DEVADDA	drivers/usb/host/r8a66597.h	/^#define DEVADDA	/;"	d
DEVADDR_ADDR	include/usb/fotg210.h	/^#define DEVADDR_ADDR(/;"	d
DEVADDR_ADDR_MASK	include/usb/fotg210.h	/^#define DEVADDR_ADDR_MASK /;"	d
DEVADDR_CONF	include/usb/fotg210.h	/^#define DEVADDR_CONF /;"	d
DEVADDR_GLOBAL_1	drivers/net/phy/mv88e61xx.c	/^#define DEVADDR_GLOBAL_1	/;"	d	file:
DEVADDR_GLOBAL_2	drivers/net/phy/mv88e61xx.c	/^#define DEVADDR_GLOBAL_2	/;"	d	file:
DEVADDR_PHY	drivers/net/phy/mv88e61xx.c	/^#define DEVADDR_PHY(/;"	d	file:
DEVADDR_PORT	drivers/net/phy/mv88e61xx.c	/^#define DEVADDR_PORT(/;"	d	file:
DEVADDR_SERDES	drivers/net/phy/mv88e61xx.c	/^#define DEVADDR_SERDES	/;"	d	file:
DEVCFG_CTRL_PCFG_PROG_B	drivers/fpga/zynqpl.c	/^#define DEVCFG_CTRL_PCFG_PROG_B	/;"	d	file:
DEVCFG_ISR_DMA_DONE	drivers/fpga/zynqpl.c	/^#define DEVCFG_ISR_DMA_DONE	/;"	d	file:
DEVCFG_ISR_ERROR_FLAGS_MASK	drivers/fpga/zynqpl.c	/^#define DEVCFG_ISR_ERROR_FLAGS_MASK	/;"	d	file:
DEVCFG_ISR_FATAL_ERROR_MASK	drivers/fpga/zynqpl.c	/^#define DEVCFG_ISR_FATAL_ERROR_MASK	/;"	d	file:
DEVCFG_ISR_PCFG_DONE	drivers/fpga/zynqpl.c	/^#define DEVCFG_ISR_PCFG_DONE	/;"	d	file:
DEVCFG_ISR_RX_FIFO_OV	drivers/fpga/zynqpl.c	/^#define DEVCFG_ISR_RX_FIFO_OV	/;"	d	file:
DEVCFG_MCTRL_PCAP_LPBK	drivers/fpga/zynqpl.c	/^#define DEVCFG_MCTRL_PCAP_LPBK	/;"	d	file:
DEVCFG_MCTRL_RFIFO_FLUSH	drivers/fpga/zynqpl.c	/^#define DEVCFG_MCTRL_RFIFO_FLUSH	/;"	d	file:
DEVCFG_MCTRL_WFIFO_FLUSH	drivers/fpga/zynqpl.c	/^#define DEVCFG_MCTRL_WFIFO_FLUSH	/;"	d	file:
DEVCFG_MODE_MASK	arch/arm/mach-keystone/init.c	/^#define DEVCFG_MODE_MASK	/;"	d	file:
DEVCFG_MODE_SHIFT	arch/arm/mach-keystone/init.c	/^#define DEVCFG_MODE_SHIFT	/;"	d	file:
DEVCFG_STATUS_DMA_CMD_Q_E	drivers/fpga/zynqpl.c	/^#define DEVCFG_STATUS_DMA_CMD_Q_E	/;"	d	file:
DEVCFG_STATUS_DMA_CMD_Q_F	drivers/fpga/zynqpl.c	/^#define DEVCFG_STATUS_DMA_CMD_Q_F	/;"	d	file:
DEVCFG_STATUS_DMA_DONE_CNT_MASK	drivers/fpga/zynqpl.c	/^#define DEVCFG_STATUS_DMA_DONE_CNT_MASK	/;"	d	file:
DEVCFG_STATUS_PCFG_INIT	drivers/fpga/zynqpl.c	/^#define DEVCFG_STATUS_PCFG_INIT	/;"	d	file:
DEVCONF2_DATPOL	drivers/usb/musb/am35x.h	/^#define DEVCONF2_DATPOL	/;"	d
DEVCONF2_OTGMODE	drivers/usb/musb/am35x.h	/^#define DEVCONF2_OTGMODE	/;"	d
DEVCONF2_OTGPWRDN	drivers/usb/musb/am35x.h	/^#define DEVCONF2_OTGPWRDN	/;"	d
DEVCONF2_PHYCKGD	drivers/usb/musb/am35x.h	/^#define DEVCONF2_PHYCKGD	/;"	d
DEVCONF2_PHYPWRDN	drivers/usb/musb/am35x.h	/^#define DEVCONF2_PHYPWRDN	/;"	d
DEVCONF2_PHY_GPIOMODE	drivers/usb/musb/am35x.h	/^#define DEVCONF2_PHY_GPIOMODE	/;"	d
DEVCONF2_PHY_PLLON	drivers/usb/musb/am35x.h	/^#define DEVCONF2_PHY_PLLON	/;"	d
DEVCONF2_REFFREQ	drivers/usb/musb/am35x.h	/^#define DEVCONF2_REFFREQ	/;"	d
DEVCONF2_REFFREQ_13MHZ	drivers/usb/musb/am35x.h	/^#define DEVCONF2_REFFREQ_13MHZ	/;"	d
DEVCONF2_REFFREQ_24MHZ	drivers/usb/musb/am35x.h	/^#define DEVCONF2_REFFREQ_24MHZ	/;"	d
DEVCONF2_REFFREQ_26MHZ	drivers/usb/musb/am35x.h	/^#define DEVCONF2_REFFREQ_26MHZ	/;"	d
DEVCONF2_RESET	drivers/usb/musb/am35x.h	/^#define DEVCONF2_RESET	/;"	d
DEVCONF2_SESENDEN	drivers/usb/musb/am35x.h	/^#define DEVCONF2_SESENDEN	/;"	d
DEVCONF2_VBDTCTEN	drivers/usb/musb/am35x.h	/^#define DEVCONF2_VBDTCTEN	/;"	d
DEVCONF2_VBUSSENSE	drivers/usb/musb/am35x.h	/^#define DEVCONF2_VBUSSENSE	/;"	d
DEVCTRL	include/power/rk808_pmic.h	/^	DEVCTRL,$/;"	e	enum:__anon9b8afd0f0103
DEVCTRL_EN	include/usb/fotg210.h	/^#define DEVCTRL_EN /;"	d
DEVCTRL_FS	include/usb/fotg210.h	/^#define DEVCTRL_FS /;"	d
DEVCTRL_FS_FORCED	include/usb/fotg210.h	/^#define DEVCTRL_FS_FORCED /;"	d
DEVCTRL_GIRQ_EN	include/usb/fotg210.h	/^#define DEVCTRL_GIRQ_EN /;"	d
DEVCTRL_HALFSPD	include/usb/fotg210.h	/^#define DEVCTRL_HALFSPD /;"	d
DEVCTRL_HS	include/usb/fotg210.h	/^#define DEVCTRL_HS /;"	d
DEVCTRL_RESET	include/usb/fotg210.h	/^#define DEVCTRL_RESET /;"	d
DEVCTRL_RWAKEUP	include/usb/fotg210.h	/^#define DEVCTRL_RWAKEUP /;"	d
DEVCTRL_SUSPEND	include/usb/fotg210.h	/^#define DEVCTRL_SUSPEND /;"	d
DEVEN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define DEVEN	/;"	d
DEVEN	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DEVEN	/;"	d
DEVEN_D0EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D0EN	/;"	d
DEVEN_D1F0EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D1F0EN	/;"	d
DEVEN_D1F1EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D1F1EN	/;"	d
DEVEN_D1F2EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D1F2EN	/;"	d
DEVEN_D2EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D2EN	/;"	d
DEVEN_D3EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D3EN	/;"	d
DEVEN_D4EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D4EN	/;"	d
DEVEN_D7EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DEVEN_D7EN	/;"	d
DEVEN_HOST	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  DEVEN_HOST	/;"	d
DEVEN_IGD	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  DEVEN_IGD	/;"	d
DEVEN_PEG10	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  DEVEN_PEG10	/;"	d
DEVEN_PEG11	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  DEVEN_PEG11	/;"	d
DEVEN_PEG12	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  DEVEN_PEG12	/;"	d
DEVEN_PEG60	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  DEVEN_PEG60	/;"	d
DEVESIZE	tools/env/fw_env.c	/^#define DEVESIZE(/;"	d	file:
DEVICE	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define DEVICE	/;"	d	file:
DEVICE1_ENVSECTORS	tools/env/fw_env.h	/^#define DEVICE1_ENVSECTORS /;"	d
DEVICE1_ESIZE	tools/env/fw_env.h	/^#define DEVICE1_ESIZE /;"	d
DEVICE1_NAME	tools/env/fw_env.h	/^#define DEVICE1_NAME /;"	d
DEVICE1_OFFSET	tools/env/fw_env.h	/^#define DEVICE1_OFFSET /;"	d
DEVICE2_ENVSECTORS	tools/env/fw_env.h	/^#define DEVICE2_ENVSECTORS /;"	d
DEVICE2_ESIZE	tools/env/fw_env.h	/^#define DEVICE2_ESIZE /;"	d
DEVICE2_NAME	tools/env/fw_env.h	/^#define DEVICE2_NAME /;"	d
DEVICE2_OFFSET	tools/env/fw_env.h	/^#define DEVICE2_OFFSET /;"	d
DEVICESIZE	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define DEVICESIZE(/;"	d
DEVICESIZE_16BIT	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define DEVICESIZE_16BIT /;"	d
DEVICESIZE_8BIT	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define DEVICESIZE_8BIT /;"	d
DEVICES_CONNECTED	drivers/mtd/nand/denali.h	/^#define DEVICES_CONNECTED	/;"	d
DEVICES_CONNECTED__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICES_CONNECTED__VALUE	/;"	d
DEVICETYPE	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define DEVICETYPE(/;"	d
DEVICETYPE_NAND	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define DEVICETYPE_NAND /;"	d
DEVICETYPE_NOR	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define DEVICETYPE_NOR /;"	d
DEVICE_ADDRESS	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEVICE_ADDRESS(/;"	d
DEVICE_ADDRESS_ASSIGNED	include/usbdevice.h	/^	DEVICE_ADDRESS_ASSIGNED,	\/* ep0 - set address setup received *\/$/;"	e	enum:usb_device_event
DEVICE_BUS_ACTIVITY	include/usbdevice.h	/^	DEVICE_BUS_ACTIVITY,	\/* bi  - bus is active again *\/$/;"	e	enum:usb_device_event
DEVICE_BUS_INACTIVE	include/usbdevice.h	/^	DEVICE_BUS_INACTIVE,	\/* bi  - bus in inactive (no SOF packets) *\/$/;"	e	enum:usb_device_event
DEVICE_CLEAR_FEATURE	include/usbdevice.h	/^	DEVICE_CLEAR_FEATURE,	\/* ep0 - clear feature setup received *\/$/;"	e	enum:usb_device_event
DEVICE_CONFIGURATION_REG0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEVICE_CONFIGURATION_REG0	/;"	d
DEVICE_CONFIGURATION_REG1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEVICE_CONFIGURATION_REG1	/;"	d
DEVICE_CONFIGURED	include/usbdevice.h	/^	DEVICE_CONFIGURED,	\/* ep0 - set configure setup received *\/$/;"	e	enum:usb_device_event
DEVICE_CPSW_BASE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_CPSW_BASE	/;"	d
DEVICE_CPSW_NUM_PORTS	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_CPSW_NUM_PORTS	/;"	d
DEVICE_CREATE	include/usbdevice.h	/^	DEVICE_CREATE,		\/* bi  - *\/$/;"	e	enum:usb_device_event
DEVICE_DATA_OFFSET	arch/arm/include/asm/omap_common.h	/^#define DEVICE_DATA_OFFSET	/;"	d
DEVICE_DESTROY	include/usbdevice.h	/^	DEVICE_DESTROY,		\/* bi  - device instance should be destroyed *\/$/;"	e	enum:usb_device_event
DEVICE_DE_CONFIGURED	include/usbdevice.h	/^	DEVICE_DE_CONFIGURED,	\/* ep0 - set configure setup received for ?? *\/$/;"	e	enum:usb_device_event
DEVICE_EMACSL_BASE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_EMACSL_BASE(/;"	d
DEVICE_EMACSL_RESET_POLL_COUNT	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_EMACSL_RESET_POLL_COUNT	/;"	d
DEVICE_EMACSW_BASE	drivers/net/keystone_net.c	/^#define DEVICE_EMACSW_BASE(/;"	d	file:
DEVICE_FUNCTION_PRIVATE	include/usbdevice.h	/^	DEVICE_FUNCTION_PRIVATE,	\/* function - private *\/$/;"	e	enum:usb_device_event
DEVICE_GP	arch/arm/include/asm/arch-omap4/omap.h	/^#define DEVICE_GP /;"	d
DEVICE_GP	arch/arm/include/asm/arch-omap5/omap.h	/^#define DEVICE_GP /;"	d
DEVICE_HOTPLUG	include/usbdevice.h	/^	DEVICE_HOTPLUG,		\/* bi  - a hotplug event has occurred *\/$/;"	e	enum:usb_device_event
DEVICE_HUB_CONFIGURED	include/usbdevice.h	/^	DEVICE_HUB_CONFIGURED,	\/* bi  - bus has been plugged int *\/$/;"	e	enum:usb_device_event
DEVICE_HUB_RESET	include/usbdevice.h	/^	DEVICE_HUB_RESET,	\/* bi  - bus has been unplugged *\/$/;"	e	enum:usb_device_event
DEVICE_ID	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define DEVICE_ID	/;"	d
DEVICE_ID	drivers/mtd/nand/denali.h	/^#define DEVICE_ID	/;"	d
DEVICE_ID	include/radeon.h	/^#define DEVICE_ID	/;"	d
DEVICE_ID_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define DEVICE_ID_MASK	/;"	d
DEVICE_ID_REG	board/freescale/common/idt8t49n222a_serdes_clk.c	/^#define DEVICE_ID_REG	/;"	d	file:
DEVICE_ID__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_ID__VALUE	/;"	d
DEVICE_INIT	include/usbdevice.h	/^	DEVICE_INIT,		\/* bi  - initialize *\/$/;"	e	enum:usb_device_event
DEVICE_IS_FLEXONENAND	include/linux/mtd/onenand_regs.h	/^#define DEVICE_IS_FLEXONENAND	/;"	d
DEVICE_LED	common/ide.c	/^# define DEVICE_LED(/;"	d	file:
DEVICE_LED	include/ide.h	/^#define	DEVICE_LED(/;"	d
DEVICE_MAIN_AREA_SIZE	drivers/mtd/nand/denali.h	/^#define DEVICE_MAIN_AREA_SIZE	/;"	d
DEVICE_MAIN_AREA_SIZE__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_MAIN_AREA_SIZE__VALUE	/;"	d
DEVICE_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define DEVICE_MASK	/;"	d
DEVICE_MASK	arch/arm/include/asm/omap_common.h	/^#define DEVICE_MASK /;"	d
DEVICE_NAME	board/cm5200/cm5200.h	/^	DEVICE_NAME,		\/* 0 *\/$/;"	e	enum:__anonb595836f0103
DEVICE_NAME_LEN	board/cm5200/cm5200.h	/^#define DEVICE_NAME_LEN	/;"	d
DEVICE_NAME_OFFSET	board/cm5200/cm5200.h	/^#define DEVICE_NAME_OFFSET	/;"	d
DEVICE_NOT_AVAILABLE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define DEVICE_NOT_AVAILABLE	/;"	d
DEVICE_NOT_FOUND	drivers/bios_emulator/bios.c	/^#define DEVICE_NOT_FOUND /;"	d	file:
DEVICE_N_GMACSL_PORTS	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_N_GMACSL_PORTS	/;"	d
DEVICE_PARAM_0	drivers/mtd/nand/denali.h	/^#define DEVICE_PARAM_0	/;"	d
DEVICE_PARAM_0__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_PARAM_0__VALUE	/;"	d
DEVICE_PARAM_1	drivers/mtd/nand/denali.h	/^#define DEVICE_PARAM_1	/;"	d
DEVICE_PARAM_1__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_PARAM_1__VALUE	/;"	d
DEVICE_PARAM_2	drivers/mtd/nand/denali.h	/^#define DEVICE_PARAM_2	/;"	d
DEVICE_PARAM_2__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_PARAM_2__VALUE	/;"	d
DEVICE_PATH_GUID	include/efi_api.h	/^#define DEVICE_PATH_GUID /;"	d
DEVICE_PATH_SUB_TYPE_END	include/efi_api.h	/^#  define DEVICE_PATH_SUB_TYPE_END	/;"	d
DEVICE_PATH_SUB_TYPE_FILE_PATH	include/efi_api.h	/^#  define DEVICE_PATH_SUB_TYPE_FILE_PATH	/;"	d
DEVICE_PATH_TYPE_END	include/efi_api.h	/^#define DEVICE_PATH_TYPE_END	/;"	d
DEVICE_PATH_TYPE_MEDIA_DEVICE	include/efi_api.h	/^#define DEVICE_PATH_TYPE_MEDIA_DEVICE	/;"	d
DEVICE_POWER_INTERRUPTION	include/usbdevice.h	/^	DEVICE_POWER_INTERRUPTION,	\/* bi  - hub has depowered our port *\/$/;"	e	enum:usb_device_event
DEVICE_PSTREAM_CFG_REG_ADDR	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_PSTREAM_CFG_REG_ADDR	/;"	d
DEVICE_PSTREAM_CFG_VAL_ROUTE_CPPI	arch/arm/include/asm/ti-common/keystone_net.h	/^#define DEVICE_PSTREAM_CFG_VAL_ROUTE_CPPI	/;"	d
DEVICE_RESET	drivers/mtd/nand/denali.h	/^#define DEVICE_RESET	/;"	d
DEVICE_RESET	include/usbdevice.h	/^	DEVICE_RESET,		\/* bi  - hub has powered our port *\/$/;"	e	enum:usb_device_event
DEVICE_RESET__BANK0	drivers/mtd/nand/denali.h	/^#define     DEVICE_RESET__BANK0	/;"	d
DEVICE_RESET__BANK1	drivers/mtd/nand/denali.h	/^#define     DEVICE_RESET__BANK1	/;"	d
DEVICE_RESET__BANK2	drivers/mtd/nand/denali.h	/^#define     DEVICE_RESET__BANK2	/;"	d
DEVICE_RESET__BANK3	drivers/mtd/nand/denali.h	/^#define     DEVICE_RESET__BANK3	/;"	d
DEVICE_SAMPLE_AT_RESET1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEVICE_SAMPLE_AT_RESET1_REG	/;"	d
DEVICE_SAMPLE_AT_RESET2_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEVICE_SAMPLE_AT_RESET2_REG	/;"	d
DEVICE_SET_FEATURE	include/usbdevice.h	/^	DEVICE_SET_FEATURE,	\/* ep0 - set feature setup received *\/$/;"	e	enum:usb_device_event
DEVICE_SET_INTERFACE	include/usbdevice.h	/^	DEVICE_SET_INTERFACE,	\/* ep0 - set interface setup received *\/$/;"	e	enum:usb_device_event
DEVICE_SPARE_AREA_SIZE	drivers/mtd/nand/denali.h	/^#define DEVICE_SPARE_AREA_SIZE	/;"	d
DEVICE_SPARE_AREA_SIZE__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_SPARE_AREA_SIZE__VALUE	/;"	d
DEVICE_SPEED_MASK	drivers/net/e1000.h	/^#define DEVICE_SPEED_MASK	/;"	d
DEVICE_TREE	dts/Makefile	/^DEVICE_TREE := unset$/;"	m
DEVICE_TREE	dts/Makefile	/^DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%)$/;"	m
DEVICE_TYPE_MASK	arch/arm/include/asm/arch-omap4/omap.h	/^#define DEVICE_TYPE_MASK /;"	d
DEVICE_TYPE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define DEVICE_TYPE_MASK /;"	d
DEVICE_TYPE_SHIFT	arch/arm/include/asm/arch-omap4/omap.h	/^#define DEVICE_TYPE_SHIFT /;"	d
DEVICE_TYPE_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define DEVICE_TYPE_SHIFT /;"	d
DEVICE_UNKNOWN	include/usbdevice.h	/^	DEVICE_UNKNOWN,		\/* bi - unknown event *\/$/;"	e	enum:usb_device_event
DEVICE_WIDTH	drivers/mtd/nand/denali.h	/^#define DEVICE_WIDTH	/;"	d
DEVICE_WIDTH__VALUE	drivers/mtd/nand/denali.h	/^#define     DEVICE_WIDTH__VALUE	/;"	d
DEVID	arch/mips/mach-pic32/include/mach/pic32.h	/^#define DEVID	/;"	d
DEVINFO_TO_ROOT_HUB_PORT	drivers/usb/host/xhci.h	/^#define DEVINFO_TO_ROOT_HUB_PORT(/;"	d
DEVNAME	board/mpl/common/kbd.c	/^#define DEVNAME /;"	d	file:
DEVNAME	common/usb_kbd.c	/^#define DEVNAME	/;"	d	file:
DEVNAME	test/dm/regulator.c	/^	DEVNAME = 0,$/;"	e	enum:__anone475d93a0203	file:
DEVNAME	tools/env/fw_env.c	/^#define DEVNAME(/;"	d	file:
DEVOFFSET	tools/env/fw_env.c	/^#define DEVOFFSET(/;"	d	file:
DEVRES	drivers/core/Kconfig	/^config DEVRES$/;"	c	menu:Generic Driver Options
DEVSEL	drivers/usb/host/r8a66597.h	/^#define	DEVSEL	/;"	d
DEVSPEED	drivers/usb/gadget/ether.c	/^#define	DEVSPEED	/;"	d	file:
DEVSPEED_ARMSPEED_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DEVSPEED_ARMSPEED_MASK	/;"	d
DEVSPEED_ARMSPEED_SHIFT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DEVSPEED_ARMSPEED_SHIFT	/;"	d
DEVSPEED_DEVSPEED_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DEVSPEED_DEVSPEED_MASK	/;"	d
DEVSPEED_DEVSPEED_SHIFT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DEVSPEED_DEVSPEED_SHIFT	/;"	d
DEVSPEED_NUMSPDS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define DEVSPEED_NUMSPDS	/;"	d
DEVTEST_NOSOF	include/usb/fotg210.h	/^#define DEVTEST_NOSOF /;"	d
DEVTEST_TST_CLREA	include/usb/fotg210.h	/^#define DEVTEST_TST_CLREA /;"	d
DEVTEST_TST_CLRFF	include/usb/fotg210.h	/^#define DEVTEST_TST_CLRFF /;"	d
DEVTEST_TST_CXLP	include/usb/fotg210.h	/^#define DEVTEST_TST_CXLP /;"	d
DEVTEST_TST_MODE	include/usb/fotg210.h	/^#define DEVTEST_TST_MODE /;"	d
DEVTEST_TST_NOCRC	include/usb/fotg210.h	/^#define DEVTEST_TST_NOCRC /;"	d
DEVTEST_TST_NOTS	include/usb/fotg210.h	/^#define DEVTEST_TST_NOTS /;"	d
DEVTYPE	tools/env/fw_env.c	/^#define DEVTYPE(/;"	d	file:
DEV_ACTIVATE	include/smsc_sio1007.h	/^#define DEV_ACTIVATE	/;"	d
DEV_ADDR	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                  DEV_ADDR /;"	d
DEV_ADDR_MASK	drivers/usb/host/xhci.h	/^#define DEV_ADDR_MASK	/;"	d
DEV_AHB_MST	include/ambapp.h	/^#define DEV_AHB_MST	/;"	d
DEV_AHB_SLV	include/ambapp.h	/^#define DEV_AHB_SLV	/;"	d
DEV_APB_SLV	include/ambapp.h	/^#define DEV_APB_SLV	/;"	d
DEV_ATTR_MAX_OFFSET	board/ti/am43xx/board.h	/^#define DEV_ATTR_MAX_OFFSET /;"	d
DEV_ATTR_MIN_OFFSET	board/ti/am43xx/board.h	/^#define DEV_ATTR_MIN_OFFSET /;"	d
DEV_CNTL_BIGEND	include/usb/designware_udc.h	/^#define  DEV_CNTL_BIGEND	/;"	d
DEV_CNTL_BUFFILL	include/usb/designware_udc.h	/^#define  DEV_CNTL_BUFFILL	/;"	d
DEV_CNTL_BURSTEN	include/usb/designware_udc.h	/^#define  DEV_CNTL_BURSTEN	/;"	d
DEV_CNTL_BURSTLENMSK	include/usb/designware_udc.h	/^#define  DEV_CNTL_BURSTLENMSK	/;"	d
DEV_CNTL_BURSTLENU	include/usb/designware_udc.h	/^#define  DEV_CNTL_BURSTLENU	/;"	d
DEV_CNTL_DESCRUPD	include/usb/designware_udc.h	/^#define  DEV_CNTL_DESCRUPD	/;"	d
DEV_CNTL_DMAMODE	include/usb/designware_udc.h	/^#define  DEV_CNTL_DMAMODE	/;"	d
DEV_CNTL_RESUME	include/usb/designware_udc.h	/^#define  DEV_CNTL_RESUME	/;"	d
DEV_CNTL_RXDMAEN	include/usb/designware_udc.h	/^#define  DEV_CNTL_RXDMAEN	/;"	d
DEV_CNTL_SCALEDOWN	include/usb/designware_udc.h	/^#define  DEV_CNTL_SCALEDOWN	/;"	d
DEV_CNTL_SOFTDISCONNECT	include/usb/designware_udc.h	/^#define  DEV_CNTL_SOFTDISCONNECT	/;"	d
DEV_CNTL_TFFLUSH	include/usb/designware_udc.h	/^#define  DEV_CNTL_TFFLUSH	/;"	d
DEV_CNTL_TSHLDEN	include/usb/designware_udc.h	/^#define  DEV_CNTL_TSHLDEN	/;"	d
DEV_CNTL_TSHLDLENMSK	include/usb/designware_udc.h	/^#define  DEV_CNTL_TSHLDLENMSK	/;"	d
DEV_CNTL_TSHLDLENU	include/usb/designware_udc.h	/^#define  DEV_CNTL_TSHLDLENU	/;"	d
DEV_CNTL_TXDMAEN	include/usb/designware_udc.h	/^#define  DEV_CNTL_TXDMAEN	/;"	d
DEV_CONFIG_VALUE	drivers/usb/gadget/ether.c	/^#define DEV_CONFIG_VALUE	/;"	d	file:
DEV_CONF_FS_SPEED	include/usb/designware_udc.h	/^#define  DEV_CONF_FS_SPEED	/;"	d
DEV_CONF_HS_SPEED	include/usb/designware_udc.h	/^#define  DEV_CONF_HS_SPEED	/;"	d
DEV_CONF_LS_SPEED	include/usb/designware_udc.h	/^#define  DEV_CONF_LS_SPEED	/;"	d
DEV_CONF_PHYINT_16	include/usb/designware_udc.h	/^#define  DEV_CONF_PHYINT_16	/;"	d
DEV_CONF_PHYINT_8	include/usb/designware_udc.h	/^#define  DEV_CONF_PHYINT_8	/;"	d
DEV_CONF_REMWAKEUP	include/usb/designware_udc.h	/^#define  DEV_CONF_REMWAKEUP	/;"	d
DEV_CONF_SELFPOW	include/usb/designware_udc.h	/^#define  DEV_CONF_SELFPOW	/;"	d
DEV_CONF_STATUS_STALL	include/usb/designware_udc.h	/^#define  DEV_CONF_STATUS_STALL	/;"	d
DEV_CONF_SYNCFRAME	include/usb/designware_udc.h	/^#define  DEV_CONF_SYNCFRAME	/;"	d
DEV_CONF_UTMI_BIDIR	include/usb/designware_udc.h	/^#define  DEV_CONF_UTMI_BIDIR	/;"	d
DEV_CS0_BASE	board/maxbcm/maxbcm.c	/^#define DEV_CS0_BASE	/;"	d	file:
DEV_CS1_BASE	board/maxbcm/maxbcm.c	/^#define DEV_CS1_BASE	/;"	d	file:
DEV_CS2_BASE	board/maxbcm/maxbcm.c	/^#define DEV_CS2_BASE	/;"	d	file:
DEV_CS3_BASE	board/maxbcm/maxbcm.c	/^#define DEV_CS3_BASE	/;"	d	file:
DEV_FLAGS_INPUT	include/stdio_dev.h	/^#define DEV_FLAGS_INPUT	/;"	d
DEV_FLAGS_OUTPUT	include/stdio_dev.h	/^#define DEV_FLAGS_OUTPUT /;"	d
DEV_FULLSPEED	drivers/usb/host/xhci.h	/^#define DEV_FULLSPEED(/;"	d
DEV_GRP_NULL	include/twl4030.h	/^#define DEV_GRP_NULL	/;"	d
DEV_GRP_P1	include/twl4030.h	/^#define DEV_GRP_P1	/;"	d
DEV_GRP_P2	include/twl4030.h	/^#define DEV_GRP_P2	/;"	d
DEV_GRP_P3	include/twl4030.h	/^#define DEV_GRP_P3	/;"	d
DEV_HIGHSPEED	drivers/usb/host/xhci.h	/^#define DEV_HIGHSPEED(/;"	d
DEV_HUB	drivers/usb/host/xhci.h	/^#define DEV_HUB	/;"	d
DEV_ID_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEV_ID_REG	/;"	d
DEV_ID_REG_DEVICE_ID_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEV_ID_REG_DEVICE_ID_MASK	/;"	d
DEV_ID_REG_DEVICE_ID_OFFS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEV_ID_REG_DEVICE_ID_OFFS	/;"	d
DEV_INT_ENUM	include/usb/designware_udc.h	/^#define  DEV_INT_ENUM	/;"	d
DEV_INT_INACTIVE	include/usb/designware_udc.h	/^#define  DEV_INT_INACTIVE	/;"	d
DEV_INT_MSK	include/usb/designware_udc.h	/^#define  DEV_INT_MSK	/;"	d
DEV_INT_SETCFG	include/usb/designware_udc.h	/^#define  DEV_INT_SETCFG	/;"	d
DEV_INT_SETINTF	include/usb/designware_udc.h	/^#define  DEV_INT_SETINTF	/;"	d
DEV_INT_SOF	include/usb/designware_udc.h	/^#define  DEV_INT_SOF	/;"	d
DEV_INT_SUSPUSB	include/usb/designware_udc.h	/^#define  DEV_INT_SUSPUSB	/;"	d
DEV_INT_USBRESET	include/usb/designware_udc.h	/^#define  DEV_INT_USBRESET	/;"	d
DEV_LOWSPEED	drivers/usb/host/xhci.h	/^#define DEV_LOWSPEED(/;"	d
DEV_MTT	drivers/usb/host/xhci.h	/^#define DEV_MTT	/;"	d
DEV_NONE	include/ambapp.h	/^#define DEV_NONE	/;"	d
DEV_NOTE_FWAKE	drivers/usb/host/xhci.h	/^#define	DEV_NOTE_FWAKE	/;"	d
DEV_NOTE_MASK	drivers/usb/host/xhci.h	/^#define	DEV_NOTE_MASK	/;"	d
DEV_PM_OPS	drivers/usb/musb-new/am35x.c	/^#define DEV_PM_OPS	/;"	d	file:
DEV_PM_OPS	drivers/usb/musb-new/omap2430.c	/^#define DEV_PM_OPS	/;"	d	file:
DEV_POWER_CTRL	include/smsc_sio1007.h	/^#define DEV_POWER_CTRL	/;"	d
DEV_RNDIS_CONFIG_VALUE	drivers/usb/gadget/ether.c	/^#define DEV_RNDIS_CONFIG_VALUE	/;"	d	file:
DEV_RST	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                   DEV_RST /;"	d
DEV_SPEED	drivers/usb/host/xhci.h	/^#define DEV_SPEED	/;"	d
DEV_SPEED_FULL_SPEED_11	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEV_SPEED_FULL_SPEED_11 /;"	d
DEV_SPEED_FULL_SPEED_20	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEV_SPEED_FULL_SPEED_20 /;"	d
DEV_SPEED_HIGH_SPEED_20	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEV_SPEED_HIGH_SPEED_20 /;"	d
DEV_SPEED_LOW_SPEED_11	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DEV_SPEED_LOW_SPEED_11 /;"	d
DEV_SPEED_MASK	drivers/usb/host/xhci.h	/^#define DEV_SPEED_MASK	/;"	d
DEV_STAT_ALT	include/usb/designware_udc.h	/^#define  DEV_STAT_ALT	/;"	d
DEV_STAT_CFG	include/usb/designware_udc.h	/^#define  DEV_STAT_CFG	/;"	d
DEV_STAT_ENUM	include/usb/designware_udc.h	/^#define  DEV_STAT_ENUM	/;"	d
DEV_STAT_ENUM_SPEED_FS	include/usb/designware_udc.h	/^#define  DEV_STAT_ENUM_SPEED_FS	/;"	d
DEV_STAT_ENUM_SPEED_HS	include/usb/designware_udc.h	/^#define  DEV_STAT_ENUM_SPEED_HS	/;"	d
DEV_STAT_ENUM_SPEED_LS	include/usb/designware_udc.h	/^#define  DEV_STAT_ENUM_SPEED_LS	/;"	d
DEV_STAT_INTF	include/usb/designware_udc.h	/^#define  DEV_STAT_INTF	/;"	d
DEV_STAT_PHY_ERR	include/usb/designware_udc.h	/^#define  DEV_STAT_PHY_ERR	/;"	d
DEV_STAT_RXFIFO_EMPTY	include/usb/designware_udc.h	/^#define  DEV_STAT_RXFIFO_EMPTY	/;"	d
DEV_STAT_SUSP	include/usb/designware_udc.h	/^#define  DEV_STAT_SUSP	/;"	d
DEV_STAT_TS	include/usb/designware_udc.h	/^#define  DEV_STAT_TS	/;"	d
DEV_STA_CLOSED	include/api_public.h	/^#define DEV_STA_CLOSED	/;"	d
DEV_STA_OPEN	include/api_public.h	/^#define DEV_STA_OPEN	/;"	d
DEV_SUPERSPEED	drivers/usb/host/xhci.h	/^#define DEV_SUPERSPEED(/;"	d
DEV_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define DEV_SUPPORTED_SPEEDS	/;"	d
DEV_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2g.h	/^#define DEV_SUPPORTED_SPEEDS	/;"	d
DEV_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define DEV_SUPPORTED_SPEEDS	/;"	d
DEV_SUPPORTED_SPEEDS	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define DEV_SUPPORTED_SPEEDS	/;"	d
DEV_TYPE_CDROM	include/part.h	/^#define DEV_TYPE_CDROM	/;"	d
DEV_TYPE_HARDDISK	include/part.h	/^#define DEV_TYPE_HARDDISK	/;"	d
DEV_TYPE_NAND	cmd/ubi.c	/^#define DEV_TYPE_NAND	/;"	d	file:
DEV_TYPE_NONE	cmd/ubi.c	/^#define DEV_TYPE_NONE	/;"	d	file:
DEV_TYPE_NOR	cmd/ubi.c	/^#define DEV_TYPE_NOR	/;"	d	file:
DEV_TYPE_ONENAND	cmd/ubi.c	/^#define DEV_TYPE_ONENAND	/;"	d	file:
DEV_TYPE_OPDISK	include/part.h	/^#define DEV_TYPE_OPDISK	/;"	d
DEV_TYPE_TAPE	include/part.h	/^#define DEV_TYPE_TAPE	/;"	d
DEV_TYPE_UNKNOWN	include/part.h	/^#define DEV_TYPE_UNKNOWN	/;"	d
DEV_TYP_NET	include/api_public.h	/^#define DEV_TYP_NET	/;"	d
DEV_TYP_NONE	include/api_public.h	/^#define DEV_TYP_NONE	/;"	d
DEV_TYP_STOR	include/api_public.h	/^#define DEV_TYP_STOR	/;"	d
DEV_UNDEFSPEED	drivers/usb/host/xhci.h	/^#define DEV_UNDEFSPEED(/;"	d
DEV_VERSION_ID_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DEV_VERSION_ID_REG	/;"	d
DEV_VERSION_ID_REG	drivers/ddr/marvell/a38x/ddr3_init.c	/^#define DEV_VERSION_ID_REG	/;"	d	file:
DE_CONTROL_ACTIVE_BLANK	arch/arm/include/asm/arch-tegra/dc.h	/^	DE_CONTROL_ACTIVE_BLANK,$/;"	e	enum:__anonf53c9cce0703
DE_CONTROL_EARLY	arch/arm/include/asm/arch-tegra/dc.h	/^	DE_CONTROL_EARLY,$/;"	e	enum:__anonf53c9cce0703
DE_CONTROL_EARLY_EXT	arch/arm/include/asm/arch-tegra/dc.h	/^	DE_CONTROL_EARLY_EXT,$/;"	e	enum:__anonf53c9cce0703
DE_CONTROL_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_CONTROL_MASK	/;"	d
DE_CONTROL_NORMAL	arch/arm/include/asm/arch-tegra/dc.h	/^	DE_CONTROL_NORMAL,$/;"	e	enum:__anonf53c9cce0703
DE_CONTROL_ONECLK	arch/arm/include/asm/arch-tegra/dc.h	/^	DE_CONTROL_ONECLK,$/;"	e	enum:__anonf53c9cce0703
DE_CONTROL_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_CONTROL_SHIFT	/;"	d
DE_DISABLE	arch/arm/include/asm/omap_mmc.h	/^#define DE_DISABLE	/;"	d
DE_INVERT	drivers/video/am335x-fb.h	/^#define DE_INVERT	/;"	d
DE_MUX_GLB_CTL_rt_en	arch/arm/include/asm/arch-sunxi/display2.h	/^#define		DE_MUX_GLB_CTL_rt_en /;"	d
DE_MUX_GLB_CTL_rt_en	arch/arm/include/asm/arch/display2.h	/^#define		DE_MUX_GLB_CTL_rt_en /;"	d
DE_RD_REG	drivers/video/mb862xx.c	/^#define DE_RD_REG(/;"	d	file:
DE_SELECT_ACTIVE	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_SELECT_ACTIVE	/;"	d
DE_SELECT_ACTIVE_BLANK	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_SELECT_ACTIVE_BLANK	/;"	d
DE_SELECT_ACTIVE_IS	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_SELECT_ACTIVE_IS	/;"	d
DE_SELECT_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_SELECT_MASK	/;"	d
DE_SELECT_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define DE_SELECT_SHIFT	/;"	d
DE_WR_FIFO	drivers/video/mb862xx.c	/^#define DE_WR_FIFO(/;"	d	file:
DE_WR_REG	drivers/video/mb862xx.c	/^#define DE_WR_REG(/;"	d	file:
DF	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DF	/;"	d
DF	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define DF	/;"	d
DFBR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFBR0	/;"	d
DFBR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFBR1	/;"	d
DFC_CLK_PER_US	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_CLK_PER_US	/;"	d
DFC_CLOCK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_CLOCK	/;"	d
DFC_MAX_tAR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tAR	/;"	d
DFC_MAX_tCH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tCH	/;"	d
DFC_MAX_tCS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tCS	/;"	d
DFC_MAX_tR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tR	/;"	d
DFC_MAX_tRH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tRH	/;"	d
DFC_MAX_tRP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tRP	/;"	d
DFC_MAX_tWH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tWH	/;"	d
DFC_MAX_tWHR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tWHR	/;"	d
DFC_MAX_tWP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DFC_MAX_tWP	/;"	d
DFE	include/sym53c8xx.h	/^  #define   DFE /;"	d
DFETCH	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DFETCH	/;"	d
DFETCH_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DFETCH_P	/;"	d
DFE_REG0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DFE_REG0	/;"	d
DFE_REG3	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define DFE_REG3	/;"	d
DFIFO	include/sym53c8xx.h	/^#define DFIFO	/;"	d
DFIN_PLL_MAX_HZ	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define DFIN_PLL_MAX_HZ	/;"	d	file:
DFIN_PLL_MIN_HZ	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define DFIN_PLL_MIN_HZ	/;"	d	file:
DFI_DATA_BYTE_DISABLE_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DFI_DATA_BYTE_DISABLE_EN	= 1 << 2,$/;"	e	enum:__anon957231910203	file:
DFI_DRAM_CLK_DPD_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DFI_DRAM_CLK_DPD_EN	/;"	d
DFI_DRAM_CLK_DPD_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DFI_DRAM_CLK_DPD_EN		= 1 << 1,$/;"	e	enum:__anon957231910203	file:
DFI_DRAM_CLK_SR_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DFI_DRAM_CLK_SR_EN	/;"	d
DFI_DRAM_CLK_SR_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DFI_DRAM_CLK_SR_EN		= 1 << 0,$/;"	e	enum:__anon957231910203	file:
DFI_INIT_COMPLETE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DFI_INIT_COMPLETE	/;"	d
DFI_INIT_COMPLETE_CH1	arch/arm/mach-exynos/exynos5_setup.h	/^#define DFI_INIT_COMPLETE_CH1	/;"	d
DFI_INIT_COMPLETE_CHO	arch/arm/mach-exynos/exynos5_setup.h	/^#define DFI_INIT_COMPLETE_CHO	/;"	d
DFI_INIT_START	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DFI_INIT_START	/;"	d
DFI_INIT_START	arch/arm/mach-exynos/exynos5_setup.h	/^#define DFI_INIT_START	/;"	d
DFI_INIT_START	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DFI_INIT_START			= 1 << 0,$/;"	e	enum:__anon957231910203	file:
DFI_PARITY_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DFI_PARITY_EN	/;"	d
DFI_PARITY_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DFI_PARITY_EN			= 1 << 1,$/;"	e	enum:__anon957231910203	file:
DFI_PARITY_INTR_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DFI_PARITY_INTR_EN	/;"	d
DFI_PARITY_INTR_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DFI_PARITY_INTR_EN		= 1 << 0,$/;"	e	enum:__anon957231910203	file:
DFL	scripts/docproc.c	/^typedef void DFL(char *);$/;"	t	typeref:typename:void ()(char *)	file:
DFL_IRQ	examples/standalone/interrupt.c	/^#define DFL_IRQ /;"	d	file:
DFORM	drivers/usb/host/r8a66597.h	/^#define	DFORM	/;"	d
DFS	include/sym53c8xx.h	/^	#define   DFS /;"	d
DFS0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS0_BASE_ADDR	/;"	d
DFS_16BIT	drivers/spi/rk_spi.h	/^	DFS_16BIT,$/;"	e	enum:__anondde5bacc0103
DFS_4BIT	drivers/spi/rk_spi.h	/^	DFS_4BIT	= 0,$/;"	e	enum:__anondde5bacc0103
DFS_8BIT	drivers/spi/rk_spi.h	/^	DFS_8BIT,$/;"	e	enum:__anondde5bacc0103
DFS_CTRL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_CTRL(/;"	d
DFS_CTRL_DLL_LOLIE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_CTRL_DLL_LOLIE	/;"	d
DFS_CTRL_DLL_RESET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_CTRL_DLL_RESET	/;"	d
DFS_DLLPRG1	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1(/;"	d
DFS_DLLPRG1_CALBYPEN_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_CALBYPEN_MASK	/;"	d
DFS_DLLPRG1_CALBYPEN_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_CALBYPEN_OFFSET	/;"	d
DFS_DLLPRG1_CALBYPEN_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_CALBYPEN_SET(/;"	d
DFS_DLLPRG1_CPICTRL_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_CPICTRL_MASK	/;"	d
DFS_DLLPRG1_CPICTRL_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_CPICTRL_OFFSET	/;"	d
DFS_DLLPRG1_CPICTRL_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_CPICTRL_SET(/;"	d
DFS_DLLPRG1_DACIN_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_DACIN_MASK	/;"	d
DFS_DLLPRG1_DACIN_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_DACIN_OFFSET	/;"	d
DFS_DLLPRG1_DACIN_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_DACIN_SET(/;"	d
DFS_DLLPRG1_LCKWT_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_LCKWT_MASK	/;"	d
DFS_DLLPRG1_LCKWT_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_LCKWT_OFFSET	/;"	d
DFS_DLLPRG1_LCKWT_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_LCKWT_SET(/;"	d
DFS_DLLPRG1_V2IGC_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_V2IGC_MASK	/;"	d
DFS_DLLPRG1_V2IGC_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_V2IGC_OFFSET	/;"	d
DFS_DLLPRG1_V2IGC_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_V2IGC_SET(/;"	d
DFS_DLLPRG1_VSETTLCTRL_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_VSETTLCTRL_MASK	/;"	d
DFS_DLLPRG1_VSETTLCTRL_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_VSETTLCTRL_OFFSET	/;"	d
DFS_DLLPRG1_VSETTLCTRL_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DLLPRG1_VSETTLCTRL_SET(/;"	d
DFS_DVPORTn	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn(/;"	d
DFS_DVPORTn_MFI_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFI_MASK	/;"	d
DFS_DVPORTn_MFI_MAXVAL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFI_MAXVAL	/;"	d
DFS_DVPORTn_MFI_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFI_OFFSET	/;"	d
DFS_DVPORTn_MFI_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFI_SET(/;"	d
DFS_DVPORTn_MFN_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFN_MASK	/;"	d
DFS_DVPORTn_MFN_MAXVAL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFN_MAXVAL	/;"	d
DFS_DVPORTn_MFN_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFN_OFFSET	/;"	d
DFS_DVPORTn_MFN_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_DVPORTn_MFN_SET(/;"	d
DFS_MARGIN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DFS_MARGIN	/;"	d
DFS_MASK	drivers/spi/rk_spi.h	/^	DFS_MASK	= 3,$/;"	e	enum:__anondde5bacc0103
DFS_MAXNUMBER	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_MAXNUMBER	/;"	d
DFS_PARAMS_Nr	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PARAMS_Nr	/;"	d
DFS_PORTRESET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PORTRESET(/;"	d
DFS_PORTRESET_PORTRESET_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PORTRESET_PORTRESET_MASK	/;"	d
DFS_PORTRESET_PORTRESET_MAXVAL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PORTRESET_PORTRESET_MAXVAL	/;"	d
DFS_PORTRESET_PORTRESET_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PORTRESET_PORTRESET_OFFSET	/;"	d
DFS_PORTRESET_PORTRESET_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PORTRESET_PORTRESET_SET(/;"	d
DFS_PORTSR	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define DFS_PORTSR(/;"	d
DFS_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DFS_REG	/;"	d
DFS_RESV	drivers/spi/rk_spi.h	/^	DFS_RESV,$/;"	e	enum:__anondde5bacc0103
DFS_SHIFT	drivers/spi/rk_spi.h	/^	DFS_SHIFT	= 0,	\/* Data Frame Size *\/$/;"	e	enum:__anondde5bacc0103
DFT_ENABLE	arch/arm/mach-davinci/lowlevel_init.S	/^DFT_ENABLE:$/;"	l
DFU support	drivers/dfu/Kconfig	/^menu "DFU support"$/;"	m
DFUARGS	include/configs/am335x_evm.h	/^#define DFUARGS /;"	d
DFUARGS	include/configs/am43xx_evm.h	/^#define DFUARGS /;"	d
DFUARGS	include/configs/am43xx_evm.h	/^#define DFUARGS$/;"	d
DFUARGS	include/configs/bav335x.h	/^#define DFUARGS /;"	d
DFUARGS	include/configs/dra7xx_evm.h	/^#define DFUARGS /;"	d
DFUARGS	include/configs/omap5_uevm.h	/^#define DFUARGS /;"	d
DFUARGS	include/configs/ti_omap5_common.h	/^#define DFUARGS$/;"	d
DFUSESTAT	arch/x86/cpu/quark/smc.h	/^#define DFUSESTAT	/;"	d
DFU_ALT_INFO	include/configs/xilinx_zynqmp.h	/^# define DFU_ALT_INFO$/;"	d
DFU_ALT_INFO	include/configs/xilinx_zynqmp.h	/^#define DFU_ALT_INFO /;"	d
DFU_ALT_INFO	include/configs/zynq-common.h	/^#  define DFU_ALT_INFO	/;"	d
DFU_ALT_INFO	include/configs/zynq-common.h	/^# define DFU_ALT_INFO$/;"	d
DFU_ALT_INFO_EMMC	include/configs/am43xx_evm.h	/^#define DFU_ALT_INFO_EMMC /;"	d
DFU_ALT_INFO_EMMC	include/configs/dra7xx_evm.h	/^#define DFU_ALT_INFO_EMMC /;"	d
DFU_ALT_INFO_EMMC	include/configs/omap5_uevm.h	/^#define DFU_ALT_INFO_EMMC /;"	d
DFU_ALT_INFO_MMC	include/configs/am335x_evm.h	/^#define DFU_ALT_INFO_MMC /;"	d
DFU_ALT_INFO_MMC	include/configs/am43xx_evm.h	/^#define DFU_ALT_INFO_MMC /;"	d
DFU_ALT_INFO_MMC	include/configs/bav335x.h	/^#define DFU_ALT_INFO_MMC /;"	d
DFU_ALT_INFO_MMC	include/configs/dra7xx_evm.h	/^#define DFU_ALT_INFO_MMC /;"	d
DFU_ALT_INFO_MMC	include/configs/omap5_uevm.h	/^#define DFU_ALT_INFO_MMC /;"	d
DFU_ALT_INFO_MMC	include/configs/zynq-common.h	/^#  define DFU_ALT_INFO_MMC /;"	d
DFU_ALT_INFO_NAND	include/configs/am335x_evm.h	/^#define DFU_ALT_INFO_NAND /;"	d
DFU_ALT_INFO_NAND	include/configs/bav335x.h	/^#define DFU_ALT_INFO_NAND /;"	d
DFU_ALT_INFO_NAND_V1	include/configs/siemens-am33x-common.h	/^#define DFU_ALT_INFO_NAND_V1 /;"	d
DFU_ALT_INFO_NAND_V2	include/configs/etamin.h	/^#define DFU_ALT_INFO_NAND_V2 /;"	d
DFU_ALT_INFO_NAND_V2	include/configs/siemens-am33x-common.h	/^#define DFU_ALT_INFO_NAND_V2 /;"	d
DFU_ALT_INFO_QSPI	include/configs/am43xx_evm.h	/^#define DFU_ALT_INFO_QSPI /;"	d
DFU_ALT_INFO_QSPI	include/configs/dra7xx_evm.h	/^#define DFU_ALT_INFO_QSPI /;"	d
DFU_ALT_INFO_RAM	include/configs/am335x_evm.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/am43xx_evm.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/bav335x.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/dra7xx_evm.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/omap5_uevm.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/sunxi-common.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/xilinx_zynqmp.h	/^#define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_INFO_RAM	include/configs/zynq-common.h	/^# define DFU_ALT_INFO_RAM /;"	d
DFU_ALT_NAND_INFO	include/configs/colibri_vf.h	/^#define DFU_ALT_NAND_INFO /;"	d
DFU_BIT_CAN_DNLOAD	drivers/usb/gadget/f_dfu.h	/^#define DFU_BIT_CAN_DNLOAD	/;"	d
DFU_BIT_CAN_UPLOAD	drivers/usb/gadget/f_dfu.h	/^#define DFU_BIT_CAN_UPLOAD	/;"	d
DFU_BIT_MANIFESTATION_TOLERANT	drivers/usb/gadget/f_dfu.h	/^#define DFU_BIT_MANIFESTATION_TOLERANT	/;"	d
DFU_BIT_WILL_DETACH	drivers/usb/gadget/f_dfu.h	/^#define DFU_BIT_WILL_DETACH	/;"	d
DFU_CMD_BUF_SIZE	include/dfu.h	/^#define DFU_CMD_BUF_SIZE	/;"	d
DFU_CONFIG_VAL	drivers/usb/gadget/f_dfu.h	/^#define DFU_CONFIG_VAL	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/colibri_imx7.h	/^#define DFU_DEFAULT_POLL_TIMEOUT	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/exynos4-common.h	/^#define DFU_DEFAULT_POLL_TIMEOUT /;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/odroid_xu3.h	/^#define DFU_DEFAULT_POLL_TIMEOUT	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/pico-imx6ul.h	/^#define DFU_DEFAULT_POLL_TIMEOUT /;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/s5p_goni.h	/^#define DFU_DEFAULT_POLL_TIMEOUT /;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/socfpga_common.h	/^#define DFU_DEFAULT_POLL_TIMEOUT	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/warp.h	/^#define DFU_DEFAULT_POLL_TIMEOUT /;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/warp7.h	/^#define DFU_DEFAULT_POLL_TIMEOUT	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/xilinx_zynqmp.h	/^#define DFU_DEFAULT_POLL_TIMEOUT	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/configs/zynq-common.h	/^# define DFU_DEFAULT_POLL_TIMEOUT	/;"	d
DFU_DEFAULT_POLL_TIMEOUT	include/dfu.h	/^#define DFU_DEFAULT_POLL_TIMEOUT /;"	d
DFU_DEV_MMC	include/dfu.h	/^	DFU_DEV_MMC = 1,$/;"	e	enum:dfu_device_type
DFU_DEV_NAND	include/dfu.h	/^	DFU_DEV_NAND,$/;"	e	enum:dfu_device_type
DFU_DEV_ONENAND	include/dfu.h	/^	DFU_DEV_ONENAND,$/;"	e	enum:dfu_device_type
DFU_DEV_RAM	include/dfu.h	/^	DFU_DEV_RAM,$/;"	e	enum:dfu_device_type
DFU_DEV_SF	include/dfu.h	/^	DFU_DEV_SF,$/;"	e	enum:dfu_device_type
DFU_DT_FUNC	drivers/usb/gadget/f_dfu.h	/^#define DFU_DT_FUNC	/;"	d
DFU_FS_EXT2	include/dfu.h	/^	DFU_FS_EXT2,$/;"	e	enum:dfu_layout
DFU_FS_EXT3	include/dfu.h	/^	DFU_FS_EXT3,$/;"	e	enum:dfu_layout
DFU_FS_EXT4	include/dfu.h	/^	DFU_FS_EXT4,$/;"	e	enum:dfu_layout
DFU_FS_FAT	include/dfu.h	/^	DFU_FS_FAT,$/;"	e	enum:dfu_layout
DFU_MANIFEST_POLL_TIMEOUT	include/configs/corvus.h	/^#define DFU_MANIFEST_POLL_TIMEOUT	/;"	d
DFU_MANIFEST_POLL_TIMEOUT	include/configs/odroid_xu3.h	/^#define DFU_MANIFEST_POLL_TIMEOUT /;"	d
DFU_MANIFEST_POLL_TIMEOUT	include/configs/siemens-am33x-common.h	/^#define DFU_MANIFEST_POLL_TIMEOUT	/;"	d
DFU_MANIFEST_POLL_TIMEOUT	include/configs/smartweb.h	/^#define DFU_MANIFEST_POLL_TIMEOUT	/;"	d
DFU_MANIFEST_POLL_TIMEOUT	include/configs/taurus.h	/^#define DFU_MANIFEST_POLL_TIMEOUT	/;"	d
DFU_MANIFEST_POLL_TIMEOUT	include/dfu.h	/^#define DFU_MANIFEST_POLL_TIMEOUT	/;"	d
DFU_MMC	drivers/dfu/Kconfig	/^config DFU_MMC$/;"	c	menu:DFU support
DFU_NAME_SIZE	include/dfu.h	/^#define DFU_NAME_SIZE	/;"	d
DFU_NAND	drivers/dfu/Kconfig	/^config DFU_NAND$/;"	c	menu:DFU support
DFU_OP_READ	include/dfu.h	/^	DFU_OP_READ = 1,$/;"	e	enum:dfu_op
DFU_OP_SIZE	include/dfu.h	/^	DFU_OP_SIZE,$/;"	e	enum:dfu_op
DFU_OP_WRITE	include/dfu.h	/^	DFU_OP_WRITE,$/;"	e	enum:dfu_op
DFU_POLL_TIMEOUT_MASK	drivers/usb/gadget/f_dfu.h	/^#define DFU_POLL_TIMEOUT_MASK /;"	d
DFU_RAM	drivers/dfu/Kconfig	/^config DFU_RAM$/;"	c	menu:DFU support
DFU_RAM_ADDR	include/dfu.h	/^	DFU_RAM_ADDR,$/;"	e	enum:dfu_layout
DFU_RAW_ADDR	include/dfu.h	/^	DFU_RAW_ADDR = 1,$/;"	e	enum:dfu_layout
DFU_SF	drivers/dfu/Kconfig	/^config DFU_SF$/;"	c	menu:DFU support
DFU_STATE_appDETACH	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_appDETACH		= 1,$/;"	e	enum:dfu_state
DFU_STATE_appIDLE	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_appIDLE		= 0,$/;"	e	enum:dfu_state
DFU_STATE_dfuDNBUSY	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuDNBUSY		= 4,$/;"	e	enum:dfu_state
DFU_STATE_dfuDNLOAD_IDLE	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuDNLOAD_IDLE	= 5,$/;"	e	enum:dfu_state
DFU_STATE_dfuDNLOAD_SYNC	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuDNLOAD_SYNC	= 3,$/;"	e	enum:dfu_state
DFU_STATE_dfuERROR	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuERROR		= 10,$/;"	e	enum:dfu_state
DFU_STATE_dfuIDLE	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuIDLE		= 2,$/;"	e	enum:dfu_state
DFU_STATE_dfuMANIFEST	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuMANIFEST		= 7,$/;"	e	enum:dfu_state
DFU_STATE_dfuMANIFEST_SYNC	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuMANIFEST_SYNC	= 6,$/;"	e	enum:dfu_state
DFU_STATE_dfuMANIFEST_WAIT_RST	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuMANIFEST_WAIT_RST	= 8,$/;"	e	enum:dfu_state
DFU_STATE_dfuUPLOAD_IDLE	drivers/usb/gadget/f_dfu.h	/^	DFU_STATE_dfuUPLOAD_IDLE	= 9,$/;"	e	enum:dfu_state
DFU_STATUS_OK	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_OK	/;"	d
DFU_STATUS_errADDRESS	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errADDRESS	/;"	d
DFU_STATUS_errCHECK_ERASED	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errCHECK_ERASED	/;"	d
DFU_STATUS_errERASE	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errERASE	/;"	d
DFU_STATUS_errFILE	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errFILE	/;"	d
DFU_STATUS_errFIRMWARE	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errFIRMWARE	/;"	d
DFU_STATUS_errNOTDONE	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errNOTDONE	/;"	d
DFU_STATUS_errPOR	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errPOR	/;"	d
DFU_STATUS_errPROG	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errPROG	/;"	d
DFU_STATUS_errSTALLEDPKT	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errSTALLEDPKT	/;"	d
DFU_STATUS_errTARGET	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errTARGET	/;"	d
DFU_STATUS_errUNKNOWN	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errUNKNOWN	/;"	d
DFU_STATUS_errUSBR	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errUSBR	/;"	d
DFU_STATUS_errVENDOR	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errVENDOR	/;"	d
DFU_STATUS_errVERIFY	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errVERIFY	/;"	d
DFU_STATUS_errWRITE	drivers/usb/gadget/f_dfu.h	/^#define DFU_STATUS_errWRITE	/;"	d
DFU_TFTP	drivers/dfu/Kconfig	/^config DFU_TFTP$/;"	c	menu:DFU support
DFU_USB_BUFSIZ	drivers/usb/gadget/f_dfu.h	/^#define DFU_USB_BUFSIZ	/;"	d
DFVCO_MAX_HZ	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define DFVCO_MAX_HZ	/;"	d	file:
DFVCO_MIN_HZ	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define DFVCO_MIN_HZ	/;"	d	file:
DFX_DEV_GEN_CTRL12	drivers/phy/marvell/comphy.h	/^#define DFX_DEV_GEN_CTRL12	/;"	d
DFX_DEV_GEN_PCIE_CLK_SRC_MASK	drivers/phy/marvell/comphy.h	/^#define DFX_DEV_GEN_PCIE_CLK_SRC_MASK	/;"	d
DFX_DEV_GEN_PCIE_CLK_SRC_OFFSET	drivers/phy/marvell/comphy.h	/^#define DFX_DEV_GEN_PCIE_CLK_SRC_OFFSET	/;"	d
DF_ADDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ADDR0	/;"	d
DF_ADDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ADDR1	/;"	d
DF_ADDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ADDR2	/;"	d
DF_ADDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ADDR3	/;"	d
DF_ALE_nWE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ALE_nWE	/;"	d
DF_ALE_nWE1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ALE_nWE1	/;"	d
DF_ALE_nWE2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_ALE_nWE2	/;"	d
DF_BIND_NOW	include/elf.h	/^#define DF_BIND_NOW	/;"	d
DF_CLE_NOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_CLE_NOE	/;"	d
DF_CLE_nOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_CLE_nOE	/;"	d
DF_INT_RnB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_INT_RnB	/;"	d
DF_IO0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO0	/;"	d
DF_IO1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO1	/;"	d
DF_IO10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO10	/;"	d
DF_IO11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO11	/;"	d
DF_IO12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO12	/;"	d
DF_IO13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO13	/;"	d
DF_IO14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO14	/;"	d
DF_IO15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO15	/;"	d
DF_IO2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO2	/;"	d
DF_IO3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO3	/;"	d
DF_IO4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO4	/;"	d
DF_IO5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO5	/;"	d
DF_IO6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO6	/;"	d
DF_IO7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO7	/;"	d
DF_IO8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO8	/;"	d
DF_IO9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_IO9	/;"	d
DF_MASK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DF_MASK /;"	d
DF_ORIGIN	include/elf.h	/^#define DF_ORIGIN	/;"	d
DF_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DF_P	/;"	d
DF_SCLK_E	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_SCLK_E	/;"	d
DF_STATIC_TLS	include/elf.h	/^#define DF_STATIC_TLS	/;"	d
DF_SYMBOLIC	include/elf.h	/^#define DF_SYMBOLIC	/;"	d
DF_TEXTREL	include/elf.h	/^#define DF_TEXTREL	/;"	d
DF_nCS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_nCS0	/;"	d
DF_nCS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_nCS1	/;"	d
DF_nRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_nRE	/;"	d
DF_nWE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DF_nWE	/;"	d
DHCP	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
DHCP_ACK	net/bootp.h	/^#define DHCP_ACK /;"	d
DHCP_DECLINE	net/bootp.h	/^#define DHCP_DECLINE /;"	d
DHCP_DISCOVER	net/bootp.h	/^#define DHCP_DISCOVER /;"	d
DHCP_NAK	net/bootp.h	/^#define DHCP_NAK /;"	d
DHCP_OFFER	net/bootp.h	/^#define DHCP_OFFER /;"	d
DHCP_RELEASE	net/bootp.h	/^#define DHCP_RELEASE /;"	d
DHCP_REQUEST	net/bootp.h	/^#define DHCP_REQUEST /;"	d
DI	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register SP, BP, SI, DI, IP;$/;"	m	struct:i386_special_regs	typeref:typename:i386_general_register
DI0_COUNTER_RELEASE	drivers/video/ipu_regs.h	/^	DI0_COUNTER_RELEASE = 0x01000000,$/;"	e	enum:__anonf09a0ccd0103
DI1_COUNTER_RELEASE	drivers/video/ipu_regs.h	/^	DI1_COUNTER_RELEASE = 0x02000000,$/;"	e	enum:__anonf09a0ccd0103
DIALOG_BOX	scripts/kconfig/nconf.h	/^	DIALOG_BOX,$/;"	e	enum:__anon6c8863760103
DIALOG_MENU_BACK	scripts/kconfig/nconf.h	/^	DIALOG_MENU_BACK,$/;"	e	enum:__anon6c8863760103
DIALOG_MENU_FORE	scripts/kconfig/nconf.h	/^	DIALOG_MENU_FORE,$/;"	e	enum:__anon6c8863760103
DIALOG_NUM_OF_REGS	include/dialog_pmic.h	/^	DIALOG_NUM_OF_REGS,$/;"	e	enum:__anondac7d0c60103
DIALOG_TEXT	scripts/kconfig/nconf.h	/^	DIALOG_TEXT,$/;"	e	enum:__anon6c8863760103
DICT	lib/zlib/inflate.h	/^    DICT,       \/* waiting for inflateSetDictionary() call *\/$/;"	e	enum:__anon43d5a4c40103
DICTID	lib/zlib/inflate.h	/^    DICTID,     \/* i: waiting for dictionary check value *\/$/;"	e	enum:__anon43d5a4c40103
DIEN	include/sym53c8xx.h	/^#define DIEN	/;"	d
DIEPCTL0_NEXT_EP_BIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DIEPCTL0_NEXT_EP_BIT	/;"	d
DIEPCTL_TX_FIFO_NUM	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DIEPCTL_TX_FIFO_NUM(/;"	d
DIEPCTL_TX_FIFO_NUM_MASK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DIEPCTL_TX_FIFO_NUM_MASK /;"	d
DIEPMSK_INIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DIEPMSK_INIT	/;"	d
DIEPT_SIZ_PKT_CNT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DIEPT_SIZ_PKT_CNT(/;"	d
DIEPT_SIZ_XFER_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DIEPT_SIZ_XFER_SIZE(/;"	d
DIER_CAIE	drivers/rtc/imxdi.c	/^#define DIER_CAIE	/;"	d	file:
DIER_WCIE	drivers/rtc/imxdi.c	/^#define DIER_WCIE	/;"	d	file:
DIER_WEIE	drivers/rtc/imxdi.c	/^#define DIER_WEIE	/;"	d	file:
DIER_WNIE	drivers/rtc/imxdi.c	/^#define DIER_WNIE	/;"	d	file:
DIE_ID_REG_BASE	board/compulab/cm_t54/cm_t54.c	/^#define DIE_ID_REG_BASE	/;"	d	file:
DIE_ID_REG_BASE	board/ti/omap5_uevm/evm.c	/^#define DIE_ID_REG_BASE /;"	d	file:
DIE_ID_REG_OFFSET	board/compulab/cm_t54/cm_t54.c	/^#define DIE_ID_REG_OFFSET	/;"	d	file:
DIE_ID_REG_OFFSET	board/ti/omap5_uevm/evm.c	/^#define DIE_ID_REG_OFFSET	/;"	d	file:
DIE_MASK	drivers/mtd/nand/denali.h	/^#define DIE_MASK	/;"	d
DIE_MASK__VALUE	drivers/mtd/nand/denali.h	/^#define     DIE_MASK__VALUE	/;"	d
DIGCLRZ	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DIGCLRZ	/;"	d	file:
DIGEST_LENGTH	cmd/tpm.c	/^	DIGEST_LENGTH		= 20,$/;"	e	enum:__anon1e186daa0103	file:
DIGEST_LENGTH	lib/tpm.c	/^	DIGEST_LENGTH			= 20,$/;"	e	enum:__anoneb7c99ad0103	file:
DIGIN_DRAWER_SW1	board/inka4x0/inkadiag.c	/^#define DIGIN_DRAWER_SW1	/;"	d	file:
DIGIN_DRAWER_SW2	board/inka4x0/inkadiag.c	/^#define DIGIN_DRAWER_SW2	/;"	d	file:
DIGIN_KEYB_MASK	board/inka4x0/inkadiag.c	/^#define DIGIN_KEYB_MASK	/;"	d	file:
DIGIN_TOUCHSCR_MASK	board/inka4x0/inkadiag.c	/^#define DIGIN_TOUCHSCR_MASK	/;"	d	file:
DIGIO_DRAWER1	board/inka4x0/inkadiag.c	/^#define DIGIO_DRAWER1	/;"	d	file:
DIGIO_DRAWER2	board/inka4x0/inkadiag.c	/^#define DIGIO_DRAWER2	/;"	d	file:
DIGIO_LED0	board/inka4x0/inkadiag.c	/^#define DIGIO_LED0	/;"	d	file:
DIGIO_LED1	board/inka4x0/inkadiag.c	/^#define DIGIO_LED1	/;"	d	file:
DIGIO_LED2	board/inka4x0/inkadiag.c	/^#define DIGIO_LED2	/;"	d	file:
DIGIO_LED3	board/inka4x0/inkadiag.c	/^#define DIGIO_LED3	/;"	d	file:
DIGIO_LED4	board/inka4x0/inkadiag.c	/^#define DIGIO_LED4	/;"	d	file:
DIGIO_LED5	board/inka4x0/inkadiag.c	/^#define DIGIO_LED5	/;"	d	file:
DIGIT	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
DIGLDO_EN_CAPLESSMODE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define DIGLDO_EN_CAPLESSMODE	/;"	d	file:
DIG_ENABLE	arch/arm/include/asm/arch-omap3/dss.h	/^#define DIG_ENABLE	/;"	d
DIG_LB_EN_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define DIG_LB_EN_ADDR(/;"	d
DIG_LPP_SHIFT	arch/arm/include/asm/arch-omap3/dss.h	/^#define DIG_LPP_SHIFT	/;"	d
DIMM_CS_BITMAP	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DIMM_CS_BITMAP	/;"	d
DIMM_MODULE_ID_OFFS	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define DIMM_MODULE_ID_OFFS	/;"	d	file:
DIMM_MODULE_ID_SIZE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define DIMM_MODULE_ID_SIZE	/;"	d	file:
DIMM_MODULE_MANU_OFFS	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define DIMM_MODULE_MANU_OFFS	/;"	d	file:
DIMM_MODULE_MANU_SIZE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define DIMM_MODULE_MANU_SIZE	/;"	d	file:
DIMM_MODULE_VEN_OFFS	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define DIMM_MODULE_VEN_OFFS	/;"	d	file:
DIMM_MODULE_VEN_SIZE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define DIMM_MODULE_VEN_SIZE	/;"	d	file:
DIMM_PARM	drivers/ddr/fsl/interactive.c	/^#define DIMM_PARM(/;"	d	file:
DIMM_PARM_HEX	drivers/ddr/fsl/interactive.c	/^#define DIMM_PARM_HEX(/;"	d	file:
DIMM_READ_ADDR	include/configs/bubinga.h	/^#define        DIMM_READ_ADDR /;"	d
DIMM_WRITE_ADDR	include/configs/bubinga.h	/^#define        DIMM_WRITE_ADDR /;"	d
DIMR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DIMR /;"	d
DINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DINT	/;"	d
DINT__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	DINT__MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DIO_PAD_CFG	board/gateworks/gw_ventana/common.h	/^#define DIO_PAD_CFG /;"	d
DIP	include/sym53c8xx.h	/^  #define   DIP /;"	d
DIP_S1	board/vscom/baltos/board.c	/^#define DIP_S1	/;"	d	file:
DIR	cmd/immap.c	/^		DIR,$/;"	e	enum:do_iopset::__anonb0469eed0103	file:
DIRCTNL_FREE	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define DIRCTNL_FREE(/;"	d
DIRECTION	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DIRECTION	/;"	d
DIRECTION_INPUT	drivers/gpio/tegra_gpio.c	/^static const int DIRECTION_INPUT = 0;$/;"	v	typeref:typename:const int	file:
DIRECTION_OUTPUT	drivers/gpio/tegra_gpio.c	/^static const int DIRECTION_OUTPUT = 1;$/;"	v	typeref:typename:const int	file:
DIRECT_ASYNC0	drivers/video/ipu.h	/^	DIRECT_ASYNC0 = _MAKE_CHAN(13, NO_DMA, NO_DMA, NO_DMA, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
DIRECT_ASYNC1	drivers/video/ipu.h	/^	DIRECT_ASYNC1 = _MAKE_CHAN(14, NO_DMA, NO_DMA, NO_DMA, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
DIRECT_CMD1	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD1	/;"	d
DIRECT_CMD2	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD2	/;"	d
DIRECT_CMD3	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD3	/;"	d
DIRECT_CMD4	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD4	/;"	d
DIRECT_CMD_BANK_SHIFT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_BANK_SHIFT	/;"	d
DIRECT_CMD_CHANNEL_SHIFT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_CHANNEL_SHIFT	/;"	d
DIRECT_CMD_CHIP1_SHIFT	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD_CHIP1_SHIFT	/;"	d
DIRECT_CMD_CHIP_SHIFT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_CHIP_SHIFT	/;"	d
DIRECT_CMD_MRS1	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_MRS1	/;"	d
DIRECT_CMD_MRS2	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_MRS2	/;"	d
DIRECT_CMD_MRS3	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_MRS3	/;"	d
DIRECT_CMD_MRS4	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_MRS4	/;"	d
DIRECT_CMD_MRS5	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_MRS5	/;"	d
DIRECT_CMD_NOP	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD_NOP	/;"	d
DIRECT_CMD_NOP	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_NOP	/;"	d
DIRECT_CMD_PALL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_PALL	/;"	d
DIRECT_CMD_REFA	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_REFA	/;"	d
DIRECT_CMD_ZQ	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIRECT_CMD_ZQ	/;"	d
DIRECT_CMD_ZQINIT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIRECT_CMD_ZQINIT	/;"	d
DIRECT_OFF	board/keymile/kmp204x/qrio.c	/^#define DIRECT_OFF	/;"	d	file:
DIRENTRY_UNIQUENESS	fs/reiserfs/reiserfs_private.h	/^#define DIRENTRY_UNIQUENESS /;"	d
DIRENTSPERBLOCK	include/fat.h	/^#define DIRENTSPERBLOCK	/;"	d
DIRENTSPERCLUST	include/fat.h	/^#define DIRENTSPERCLUST	/;"	d
DIRPD	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define DIRPD	/;"	d
DIRTY_CNODE	fs/ubifs/ubifs.h	/^	DIRTY_CNODE    = 0,$/;"	e	enum:__anonf648d0840903
DIRTY_ZNODE	fs/ubifs/ubifs.h	/^	DIRTY_ZNODE    = 0,$/;"	e	enum:__anonf648d0840603
DIR_ACCESS_MASK	board/micronas/vct/ebi.h	/^#define DIR_ACCESS_MASK	/;"	d
DIR_ACCESS_WRITE	board/micronas/vct/ebi.h	/^#define DIR_ACCESS_WRITE	/;"	d
DIR_IAR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DIR_IAR	/;"	d
DIR_IBR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DIR_IBR	/;"	d
DIR_ICR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DIR_ICR	/;"	d
DIR_IDR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DIR_IDR	/;"	d
DIR_ROUTE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DIR_ROUTE(/;"	d
DIS	arch/arm/include/asm/arch-omap3/mux.h	/^#define DIS	/;"	d
DIS	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DIS /;"	d
DIS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DIS /;"	d
DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DISABLE	/;"	d
DISABLE	board/samsung/trats/setup.h	/^#define DISABLE	/;"	d
DISABLED	net/link_local.c	/^	DISABLED$/;"	e	enum:ll_state_t	file:
DISABLERXOWN	drivers/net/designware.h	/^#define DISABLERXOWN	/;"	d
DISABLE_AUTO_INFO_FIFO	drivers/crypto/fsl/desc_constr.h	/^#define DISABLE_AUTO_INFO_FIFO /;"	d
DISABLE_BIT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DISABLE_BIT	/;"	d
DISABLE_BURST	drivers/net/ax88180.h	/^#define DISABLE_BURST	/;"	d
DISABLE_DDR_TUNING_DATA	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  DISABLE_DDR_TUNING_DATA	/;"	d
DISABLE_IGD	arch/x86/cpu/queensbay/Kconfig	/^config DISABLE_IGD$/;"	c
DISABLE_JUMBO	drivers/net/ax88180.h	/^#define DISABLE_JUMBO	/;"	d
DISABLE_L2_FILTERING_DURING_DDR_TRAINING	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define DISABLE_L2_FILTERING_DURING_DDR_TRAINING$/;"	d
DISABLE_MEM_CNTR	board/mpl/pati/pati.h	/^#define DISABLE_MEM_CNTR	/;"	d
DISABLE_RECALIB	drivers/ddr/microchip/ddr2_regs.h	/^#define DISABLE_RECALIB(/;"	d
DISABLE_RXFILTER	drivers/net/ax88180.h	/^  #define DISABLE_RXFILTER	/;"	d
DISCHRG_VBUS_END	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISCHRG_VBUS_END	/;"	d
DISCHRG_VBUS_END_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISCHRG_VBUS_END_ENA	/;"	d
DISCHRG_VBUS_START	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISCHRG_VBUS_START	/;"	d
DISCHRG_VBUS_START_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISCHRG_VBUS_START_ENA	/;"	d
DISCON_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISCON_B	/;"	d
DISCON_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISCON_BE	/;"	d
DISK_LEAF_NODE_LEVEL	fs/reiserfs/reiserfs_private.h	/^#define DISK_LEAF_NODE_LEVEL /;"	d
DISNYET_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DISNYET_R	/;"	d
DISP0_PWR_EN	board/freescale/mx6sabresd/mx6sabresd.c	/^#define DISP0_PWR_EN	/;"	d	file:
DISPBDF	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define DISPBDF	/;"	d
DISPBDF	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define DISPBDF	/;"	d
DISPLAY	drivers/video/Kconfig	/^config DISPLAY$/;"	c	menu:Graphics support
DISPLAY_BASE_ADDR	include/radeon.h	/^#define DISPLAY_BASE_ADDR	/;"	d
DISPLAY_BOARDINFO	common/Kconfig	/^config DISPLAY_BOARDINFO$/;"	c
DISPLAY_BUF_SIZE	board/a4m072/a4m072.c	/^#define DISPLAY_BUF_SIZE	/;"	d	file:
DISPLAY_CLEAR	include/led-display.h	/^#define DISPLAY_CLEAR	/;"	d
DISPLAY_CPUINFO	common/Kconfig	/^config DISPLAY_CPUINFO$/;"	c
DISPLAY_FLAGS_DE_HIGH	include/fdtdec.h	/^	DISPLAY_FLAGS_DE_HIGH		= 1 << 5,$/;"	e	enum:display_flags
DISPLAY_FLAGS_DE_LOW	include/fdtdec.h	/^	DISPLAY_FLAGS_DE_LOW		= 1 << 4,$/;"	e	enum:display_flags
DISPLAY_FLAGS_DOUBLECLK	include/fdtdec.h	/^	DISPLAY_FLAGS_DOUBLECLK		= 1 << 10,$/;"	e	enum:display_flags
DISPLAY_FLAGS_DOUBLESCAN	include/fdtdec.h	/^	DISPLAY_FLAGS_DOUBLESCAN	= 1 << 9,$/;"	e	enum:display_flags
DISPLAY_FLAGS_HSYNC_HIGH	include/fdtdec.h	/^	DISPLAY_FLAGS_HSYNC_HIGH	= 1 << 1,$/;"	e	enum:display_flags
DISPLAY_FLAGS_HSYNC_LOW	include/fdtdec.h	/^	DISPLAY_FLAGS_HSYNC_LOW		= 1 << 0,$/;"	e	enum:display_flags
DISPLAY_FLAGS_INTERLACED	include/fdtdec.h	/^	DISPLAY_FLAGS_INTERLACED	= 1 << 8,$/;"	e	enum:display_flags
DISPLAY_FLAGS_PIXDATA_NEGEDGE	include/fdtdec.h	/^	DISPLAY_FLAGS_PIXDATA_NEGEDGE	= 1 << 7,$/;"	e	enum:display_flags
DISPLAY_FLAGS_PIXDATA_POSEDGE	include/fdtdec.h	/^	DISPLAY_FLAGS_PIXDATA_POSEDGE	= 1 << 6,$/;"	e	enum:display_flags
DISPLAY_FLAGS_VSYNC_HIGH	include/fdtdec.h	/^	DISPLAY_FLAGS_VSYNC_HIGH	= 1 << 3,$/;"	e	enum:display_flags
DISPLAY_FLAGS_VSYNC_LOW	include/fdtdec.h	/^	DISPLAY_FLAGS_VSYNC_LOW		= 1 << 2,$/;"	e	enum:display_flags
DISPLAY_HEIGHT	board/mosaixtech/icon/icon.c	/^#define DISPLAY_HEIGHT /;"	d	file:
DISPLAY_HEIGHT	board/tqc/tqm5200/tqm5200.c	/^#define DISPLAY_HEIGHT /;"	d	file:
DISPLAY_HOME	include/led-display.h	/^#define DISPLAY_HOME	/;"	d
DISPLAY_RESET_GPIO	board/siemens/rut/board.c	/^#define DISPLAY_RESET_GPIO	/;"	d	file:
DISPLAY_SIZE	drivers/misc/pdsp188x.c	/^#define DISPLAY_SIZE	/;"	d	file:
DISPLAY_TYPE_LCD	include/api_public.h	/^#define DISPLAY_TYPE_LCD	/;"	d
DISPLAY_TYPE_VIDEO	include/api_public.h	/^#define DISPLAY_TYPE_VIDEO	/;"	d
DISPLAY_WIDTH	board/mosaixtech/icon/icon.c	/^#define DISPLAY_WIDTH /;"	d	file:
DISPLAY_WIDTH	board/tqc/tqm5200/tqm5200.c	/^#define DISPLAY_WIDTH /;"	d	file:
DISPL_PLL_SPREAD_SPECTRUM	include/configs/rut.h	/^#define DISPL_PLL_SPREAD_SPECTRUM$/;"	d
DISP_AXI_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	DISP_AXI_CLK_ROOT = 17,$/;"	e	enum:clk_root_index
DISP_AXI_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
DISP_AXI_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DISP_AXI_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
DISP_HW_DEBUG	include/radeon.h	/^#define DISP_HW_DEBUG	/;"	d
DISP_LINE_LEN	board/gdsys/common/cmd_ioloop.c	/^#define DISP_LINE_LEN	/;"	d	file:
DISP_LINE_LEN	cmd/fpgad.c	/^#define DISP_LINE_LEN	/;"	d	file:
DISP_LINE_LEN	cmd/i2c.c	/^#define DISP_LINE_LEN	/;"	d	file:
DISP_LINE_LEN	cmd/mem.c	/^#define DISP_LINE_LEN	/;"	d	file:
DISP_LINE_LEN	cmd/pci.c	/^#define DISP_LINE_LEN	/;"	d	file:
DISP_LIN_TRANS_GRPH_A	include/radeon.h	/^#define DISP_LIN_TRANS_GRPH_A	/;"	d
DISP_LIN_TRANS_GRPH_B	include/radeon.h	/^#define DISP_LIN_TRANS_GRPH_B	/;"	d
DISP_LIN_TRANS_GRPH_C	include/radeon.h	/^#define DISP_LIN_TRANS_GRPH_C	/;"	d
DISP_LIN_TRANS_GRPH_D	include/radeon.h	/^#define DISP_LIN_TRANS_GRPH_D	/;"	d
DISP_LIN_TRANS_GRPH_E	include/radeon.h	/^#define DISP_LIN_TRANS_GRPH_E	/;"	d
DISP_LIN_TRANS_GRPH_F	include/radeon.h	/^#define DISP_LIN_TRANS_GRPH_F	/;"	d
DISP_LIN_TRANS_VID_A	include/radeon.h	/^#define DISP_LIN_TRANS_VID_A	/;"	d
DISP_LIN_TRANS_VID_B	include/radeon.h	/^#define DISP_LIN_TRANS_VID_B	/;"	d
DISP_LIN_TRANS_VID_C	include/radeon.h	/^#define DISP_LIN_TRANS_VID_C	/;"	d
DISP_LIN_TRANS_VID_D	include/radeon.h	/^#define DISP_LIN_TRANS_VID_D	/;"	d
DISP_LIN_TRANS_VID_E	include/radeon.h	/^#define DISP_LIN_TRANS_VID_E	/;"	d
DISP_LIN_TRANS_VID_F	include/radeon.h	/^#define DISP_LIN_TRANS_VID_F	/;"	d
DISP_MERGE_CNTL	include/radeon.h	/^#define DISP_MERGE_CNTL	/;"	d
DISP_MISC_CNTL	include/radeon.h	/^#define DISP_MISC_CNTL	/;"	d
DISP_MISC_CNTL_SOFT_RESET_DIG_TMDS	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_DIG_TMDS	/;"	d
DISP_MISC_CNTL_SOFT_RESET_GRPH2_PP	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_PP	/;"	d
DISP_MISC_CNTL_SOFT_RESET_GRPH2_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_SCLK	/;"	d
DISP_MISC_CNTL_SOFT_RESET_GRPH_PP	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_GRPH_PP	/;"	d
DISP_MISC_CNTL_SOFT_RESET_GRPH_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_GRPH_SCLK	/;"	d
DISP_MISC_CNTL_SOFT_RESET_LVDS	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_LVDS	/;"	d
DISP_MISC_CNTL_SOFT_RESET_OV0_PP	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_OV0_PP	/;"	d
DISP_MISC_CNTL_SOFT_RESET_OV0_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_OV0_SCLK	/;"	d
DISP_MISC_CNTL_SOFT_RESET_SUBPIC_PP	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_PP	/;"	d
DISP_MISC_CNTL_SOFT_RESET_SUBPIC_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_SCLK	/;"	d
DISP_MISC_CNTL_SOFT_RESET_TMDS	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_TMDS	/;"	d
DISP_MISC_CNTL_SOFT_RESET_TV	include/radeon.h	/^#define DISP_MISC_CNTL_SOFT_RESET_TV	/;"	d
DISP_MISC_CNTL__PALETTE2_MEM_RD_MARGIN_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__PALETTE2_MEM_RD_MARGIN_MASK	/;"	d
DISP_MISC_CNTL__PALETTE_MEM_RD_MARGIN_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__PALETTE_MEM_RD_MARGIN_MASK	/;"	d
DISP_MISC_CNTL__RMX_BUF_MEM_RD_MARGIN_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__RMX_BUF_MEM_RD_MARGIN_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS	/;"	d
DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH_PP	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH_PP_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_LVDS	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_LVDS	/;"	d
DISP_MISC_CNTL__SOFT_RESET_LVDS_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_LVDS_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_OV0_PP	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP	/;"	d
DISP_MISC_CNTL__SOFT_RESET_OV0_PP_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP	/;"	d
DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_TMDS	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_TMDS	/;"	d
DISP_MISC_CNTL__SOFT_RESET_TMDS_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_TMDS_MASK	/;"	d
DISP_MISC_CNTL__SOFT_RESET_TV	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_TV	/;"	d
DISP_MISC_CNTL__SOFT_RESET_TV_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SOFT_RESET_TV_MASK	/;"	d
DISP_MISC_CNTL__SYNC_PAD_FLOP_EN	include/radeon.h	/^#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN	/;"	d
DISP_MISC_CNTL__SYNC_PAD_FLOP_EN_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN_MASK	/;"	d
DISP_MISC_CNTL__SYNC_STRENGTH_MASK	include/radeon.h	/^#define DISP_MISC_CNTL__SYNC_STRENGTH_MASK	/;"	d
DISP_OUTPUT_CNTL	include/radeon.h	/^#define DISP_OUTPUT_CNTL	/;"	d
DISP_PAD_CTRL	board/aristainetos/aristainetos.c	/^#define DISP_PAD_CTRL	/;"	d	file:
DISP_PWR_MAN	include/radeon.h	/^#define DISP_PWR_MAN	/;"	d
DISP_PWR_MAN_AUTO_PWRUP_EN	include/radeon.h	/^#define DISP_PWR_MAN_AUTO_PWRUP_EN	/;"	d
DISP_PWR_MAN_DIG_TMDS_ENABLE_RST	include/radeon.h	/^#define DISP_PWR_MAN_DIG_TMDS_ENABLE_RST	/;"	d
DISP_PWR_MAN_DISP2_PWR_MAN_D3_CRTC2_EN	include/radeon.h	/^#define DISP_PWR_MAN_DISP2_PWR_MAN_D3_CRTC2_EN	/;"	d
DISP_PWR_MAN_DISP_D1D2_GRPH_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D1D2_GRPH_RST	/;"	d
DISP_PWR_MAN_DISP_D1D2_OV0_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D1D2_OV0_RST	/;"	d
DISP_PWR_MAN_DISP_D1D2_SUBPIC_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D1D2_SUBPIC_RST	/;"	d
DISP_PWR_MAN_DISP_D3_GRPH_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D3_GRPH_RST	/;"	d
DISP_PWR_MAN_DISP_D3_OV0_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D3_OV0_RST	/;"	d
DISP_PWR_MAN_DISP_D3_REG_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D3_REG_RST	/;"	d
DISP_PWR_MAN_DISP_D3_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D3_RST	/;"	d
DISP_PWR_MAN_DISP_D3_SUBPIC_RST	include/radeon.h	/^#define DISP_PWR_MAN_DISP_D3_SUBPIC_RST	/;"	d
DISP_PWR_MAN_DISP_PWR_MAN_D3_CRTC_EN	include/radeon.h	/^#define DISP_PWR_MAN_DISP_PWR_MAN_D3_CRTC_EN	/;"	d
DISP_PWR_MAN_TV_ENABLE_RST	include/radeon.h	/^#define DISP_PWR_MAN_TV_ENABLE_RST	/;"	d
DISP_PWR_MAN__AUTO_PWRUP_EN	include/radeon.h	/^#define DISP_PWR_MAN__AUTO_PWRUP_EN	/;"	d
DISP_PWR_MAN__AUTO_PWRUP_EN_MASK	include/radeon.h	/^#define DISP_PWR_MAN__AUTO_PWRUP_EN_MASK	/;"	d
DISP_PWR_MAN__DIG_TMDS_ENABLE_RST	include/radeon.h	/^#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST	/;"	d
DISP_PWR_MAN__DIG_TMDS_ENABLE_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST_MASK	/;"	d
DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN	include/radeon.h	/^#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN	/;"	d
DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN_MASK	/;"	d
DISP_PWR_MAN__DISP_D1D2_GRPH_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST	/;"	d
DISP_PWR_MAN__DISP_D1D2_GRPH_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D1D2_OV0_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D1D2_OV0_RST	/;"	d
DISP_PWR_MAN__DISP_D1D2_OV0_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D1D2_OV0_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST	/;"	d
DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D3_GRPH_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_GRPH_RST	/;"	d
DISP_PWR_MAN__DISP_D3_GRPH_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_GRPH_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D3_OV0_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_OV0_RST	/;"	d
DISP_PWR_MAN__DISP_D3_OV0_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_OV0_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D3_REG_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_REG_RST	/;"	d
DISP_PWR_MAN__DISP_D3_REG_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_REG_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D3_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_RST	/;"	d
DISP_PWR_MAN__DISP_D3_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_D3_SUBPIC_RST	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST	/;"	d
DISP_PWR_MAN__DISP_D3_SUBPIC_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST_MASK	/;"	d
DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN	include/radeon.h	/^#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN	/;"	d
DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN_MASK	/;"	d
DISP_PWR_MAN__DISP_PWR_MAN_DPMS_MASK	include/radeon.h	/^#define DISP_PWR_MAN__DISP_PWR_MAN_DPMS_MASK	/;"	d
DISP_PWR_MAN__TV_ENABLE_RST	include/radeon.h	/^#define DISP_PWR_MAN__TV_ENABLE_RST	/;"	d
DISP_PWR_MAN__TV_ENABLE_RST_MASK	include/radeon.h	/^#define DISP_PWR_MAN__TV_ENABLE_RST_MASK	/;"	d
DISP_RD_REG	drivers/video/mb862xx.c	/^#define DISP_RD_REG(/;"	d	file:
DISP_TEST_DEBUG_CNTL	include/radeon.h	/^#define DISP_TEST_DEBUG_CNTL	/;"	d
DISP_WR_REG	drivers/video/mb862xx.c	/^#define DISP_WR_REG(/;"	d	file:
DISR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DISR /;"	d
DIST	lib/zlib/inflate.h	/^            DIST,       \/* i: waiting for distance code *\/$/;"	e	enum:__anon43d5a4c40103
DISTEXT	lib/zlib/inflate.h	/^            DISTEXT,    \/* i: waiting for distance extra bits *\/$/;"	e	enum:__anon43d5a4c40103
DISTRO_DEFAULTS	Kconfig	/^config DISTRO_DEFAULTS$/;"	c	menu:General setup
DISTS	lib/zlib/inftrees.h	/^    DISTS$/;"	e	enum:__anon4cf584e10203
DIST_CODE_LEN	lib/zlib/trees.c	/^#define DIST_CODE_LEN /;"	d	file:
DIS_DCAC	arch/nds32/cpu/n1213/start.S	/^#define DIS_DCAC	/;"	d	file:
DIS_LDO	include/power/max77686_pmic.h	/^	DIS_LDO = (0x00 << 6),$/;"	e	enum:__anon582827aa0303
DIS_LDO	include/power/max8997_pmic.h	/^	DIS_LDO = (0x00 << 6),$/;"	e	enum:__anonca676f190203
DIS_MCU_CLROOB	drivers/usb/eth/r8152.h	/^#define DIS_MCU_CLROOB	/;"	d
DIS_SDSAVE	drivers/usb/eth/r8152.h	/^#define DIS_SDSAVE	/;"	d
DIU_ENVIRONMENT	include/configs/T104xRDB.h	/^#define DIU_ENVIRONMENT /;"	d
DIU_ENVIRONMENT	include/configs/T104xRDB.h	/^#define DIU_ENVIRONMENT$/;"	d
DIVERR	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DIVERR	/;"	d
DIVIDER	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define DIVIDER(/;"	d
DIVIDER	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define DIVIDER(/;"	d
DIVIDER	drivers/clk/exynos/clk-exynos7420.c	/^#define DIVIDER(/;"	d	file:
DIVIDE_FACTOR_XS_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define DIVIDE_FACTOR_XS_MASK	/;"	d
DIVIDE_FACTOR_XS_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define DIVIDE_FACTOR_XS_SHIFT	/;"	d
DIV_ACP	board/samsung/odroid/setup.h	/^#define DIV_ACP(/;"	d
DIV_ACP_PCLK	board/samsung/odroid/setup.h	/^#define DIV_ACP_PCLK(/;"	d
DIV_APLL	board/samsung/odroid/setup.h	/^#define DIV_APLL(/;"	d
DIV_ATB	board/samsung/odroid/setup.h	/^#define DIV_ATB(/;"	d
DIV_C2C	board/samsung/odroid/setup.h	/^#define DIV_C2C(/;"	d
DIV_C2C_ACLK	board/samsung/odroid/setup.h	/^#define DIV_C2C_ACLK(/;"	d
DIV_CLOCK_INIT	board/armltd/integrator/timer.c	/^#define DIV_CLOCK_INIT	/;"	d	file:
DIV_COPY	board/samsung/odroid/setup.h	/^#define DIV_COPY(/;"	d
DIV_CORE	board/samsung/odroid/setup.h	/^#define DIV_CORE(/;"	d
DIV_CORE2	board/samsung/odroid/setup.h	/^#define DIV_CORE2(/;"	d
DIV_COREM0	board/samsung/odroid/setup.h	/^#define DIV_COREM0(/;"	d
DIV_COREM1	board/samsung/odroid/setup.h	/^#define DIV_COREM1(/;"	d
DIV_CORES	board/samsung/odroid/setup.h	/^#define DIV_CORES(/;"	d
DIV_CRYP_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_CRYP_SHIFT	/;"	d
DIV_DMC	board/samsung/odroid/setup.h	/^#define DIV_DMC(/;"	d
DIV_DMCD	board/samsung/odroid/setup.h	/^#define DIV_DMCD(/;"	d
DIV_DMCP	board/samsung/odroid/setup.h	/^#define DIV_DMCP(/;"	d
DIV_DPHY	board/samsung/odroid/setup.h	/^#define DIV_DPHY(/;"	d
DIV_DPM	board/samsung/odroid/setup.h	/^#define DIV_DPM(/;"	d
DIV_DVSEM	board/samsung/odroid/setup.h	/^#define DIV_DVSEM(/;"	d
DIV_ETH_125	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_ETH_125	/;"	d
DIV_ETH_50	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_ETH_50	/;"	d
DIV_ETH_P2P	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_ETH_P2P	/;"	d
DIV_G2D_ACP	board/samsung/odroid/setup.h	/^#define DIV_G2D_ACP(/;"	d
DIV_HCLK1_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_HCLK1_SHIFT	/;"	d
DIV_HPM	board/samsung/odroid/setup.h	/^#define DIV_HPM(/;"	d
DIV_MAU_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DIV_MAU_VAL	/;"	d
DIV_MMC0	board/samsung/odroid/setup.h	/^#define DIV_MMC0(/;"	d
DIV_MMC0_PRE	board/samsung/odroid/setup.h	/^#define DIV_MMC0_PRE(/;"	d
DIV_MMC1	board/samsung/odroid/setup.h	/^#define DIV_MMC1(/;"	d
DIV_MMC1_PRE	board/samsung/odroid/setup.h	/^#define DIV_MMC1_PRE(/;"	d
DIV_MMC2	board/samsung/odroid/setup.h	/^#define DIV_MMC2(/;"	d
DIV_MMC2_PRE	board/samsung/odroid/setup.h	/^#define DIV_MMC2_PRE(/;"	d
DIV_MMC3	board/samsung/odroid/setup.h	/^#define DIV_MMC3(/;"	d
DIV_MMC3_PRE	board/samsung/odroid/setup.h	/^#define DIV_MMC3_PRE(/;"	d
DIV_MMC4	board/samsung/odroid/setup.h	/^#define DIV_MMC4(/;"	d
DIV_MMC4_PRE	board/samsung/odroid/setup.h	/^#define DIV_MMC4_PRE(/;"	d
DIV_PCLK_DBG	board/samsung/odroid/setup.h	/^#define DIV_PCLK_DBG(/;"	d
DIV_PERIPH	board/samsung/odroid/setup.h	/^#define DIV_PERIPH(/;"	d
DIV_PIPE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DIV_PIPE	/;"	d
DIV_PWI	board/samsung/odroid/setup.h	/^#define DIV_PWI(/;"	d
DIV_ROUND	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define DIV_ROUND(/;"	d	file:
DIV_ROUND_CLOSEST	include/linux/kernel.h	/^#define DIV_ROUND_CLOSEST(/;"	d
DIV_ROUND_UP	include/linux/kernel.h	/^#define DIV_ROUND_UP(/;"	d
DIV_ROUND_UP	tools/env/fw_env.c	/^#define DIV_ROUND_UP(/;"	d	file:
DIV_ROUND_UP_SECTOR_T	include/linux/kernel.h	/^# define DIV_ROUND_UP_SECTOR_T(/;"	d
DIV_SHIFT_ETH	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_SHIFT_ETH	/;"	d
DIV_SHIFT_TMR	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_SHIFT_TMR	/;"	d
DIV_SHIFT_UART	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define DIV_SHIFT_UART	/;"	d
DIV_STAT_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_CHANGING /;"	d
DIV_STAT_CPU0_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_CPU0_CHANGING /;"	d
DIV_STAT_CPU1_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_CPU1_CHANGING	/;"	d
DIV_STAT_DMC0_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_DMC0_CHANGING	/;"	d
DIV_STAT_DMC1_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_DMC1_CHANGING	/;"	d
DIV_STAT_FSYS1_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_FSYS1_CHANGING	/;"	d
DIV_STAT_FSYS2_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_FSYS2_CHANGING	/;"	d
DIV_STAT_FSYS3_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_FSYS3_CHANGING	/;"	d
DIV_STAT_PERIL0_CHANGING	board/samsung/odroid/setup.h	/^#define DIV_STAT_PERIL0_CHANGING	/;"	d
DIV_TO_RATE	drivers/clk/rockchip/clk_rk3036.c	/^#define DIV_TO_RATE(/;"	d	file:
DIV_TO_RATE	drivers/clk/rockchip/clk_rk3288.c	/^#define DIV_TO_RATE(/;"	d	file:
DIV_TO_RATE	drivers/clk/rockchip/clk_rk3399.c	/^#define DIV_TO_RATE(/;"	d	file:
DIV_UART0	board/samsung/odroid/setup.h	/^#define DIV_UART0(/;"	d
DIV_UART1	board/samsung/odroid/setup.h	/^#define DIV_UART1(/;"	d
DIV_UART2	board/samsung/odroid/setup.h	/^#define DIV_UART2(/;"	d
DIV_UART3	board/samsung/odroid/setup.h	/^#define DIV_UART3(/;"	d
DIV_UART4	board/samsung/odroid/setup.h	/^#define DIV_UART4(/;"	d
DI_BS_CLKGEN0	drivers/video/ipu_regs.h	/^#define DI_BS_CLKGEN0(/;"	d
DI_BS_CLKGEN1	drivers/video/ipu_regs.h	/^#define DI_BS_CLKGEN1(/;"	d
DI_D3_CLK_IDLE	drivers/video/mx3fb.c	/^#define DI_D3_CLK_IDLE	/;"	d	file:
DI_D3_CLK_POL	drivers/video/mx3fb.c	/^#define DI_D3_CLK_POL	/;"	d	file:
DI_D3_CLK_SEL	drivers/video/mx3fb.c	/^#define DI_D3_CLK_SEL	/;"	d	file:
DI_D3_DATAMSK	drivers/video/mx3fb.c	/^#define DI_D3_DATAMSK	/;"	d	file:
DI_D3_DATA_POL	drivers/video/mx3fb.c	/^#define DI_D3_DATA_POL	/;"	d	file:
DI_D3_DRDY_SHARP_POL	drivers/video/mx3fb.c	/^#define DI_D3_DRDY_SHARP_POL	/;"	d	file:
DI_D3_HSYNC_POL	drivers/video/mx3fb.c	/^#define DI_D3_HSYNC_POL	/;"	d	file:
DI_D3_VSYNC_POL	drivers/video/mx3fb.c	/^#define DI_D3_VSYNC_POL	/;"	d	file:
DI_DISP0_CB0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP0_CB0_MAP	/;"	d	file:
DI_DISP0_CB1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP0_CB1_MAP	/;"	d	file:
DI_DISP0_CB2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP0_CB2_MAP	/;"	d	file:
DI_DISP0_DB0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP0_DB0_MAP	/;"	d	file:
DI_DISP0_DB1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP0_DB1_MAP	/;"	d	file:
DI_DISP0_DB2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP0_DB2_MAP	/;"	d	file:
DI_DISP0_TIME_CONF_1	drivers/video/mx3fb.c	/^#define DI_DISP0_TIME_CONF_1	/;"	d	file:
DI_DISP0_TIME_CONF_2	drivers/video/mx3fb.c	/^#define DI_DISP0_TIME_CONF_2	/;"	d	file:
DI_DISP0_TIME_CONF_3	drivers/video/mx3fb.c	/^#define DI_DISP0_TIME_CONF_3	/;"	d	file:
DI_DISP1_CB0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP1_CB0_MAP	/;"	d	file:
DI_DISP1_CB1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP1_CB1_MAP	/;"	d	file:
DI_DISP1_CB2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP1_CB2_MAP	/;"	d	file:
DI_DISP1_DB0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP1_DB0_MAP	/;"	d	file:
DI_DISP1_DB1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP1_DB1_MAP	/;"	d	file:
DI_DISP1_DB2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP1_DB2_MAP	/;"	d	file:
DI_DISP1_TIME_CONF_1	drivers/video/mx3fb.c	/^#define DI_DISP1_TIME_CONF_1	/;"	d	file:
DI_DISP1_TIME_CONF_2	drivers/video/mx3fb.c	/^#define DI_DISP1_TIME_CONF_2	/;"	d	file:
DI_DISP1_TIME_CONF_3	drivers/video/mx3fb.c	/^#define DI_DISP1_TIME_CONF_3	/;"	d	file:
DI_DISP2_CB0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP2_CB0_MAP	/;"	d	file:
DI_DISP2_CB1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP2_CB1_MAP	/;"	d	file:
DI_DISP2_CB2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP2_CB2_MAP	/;"	d	file:
DI_DISP2_DB0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP2_DB0_MAP	/;"	d	file:
DI_DISP2_DB1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP2_DB1_MAP	/;"	d	file:
DI_DISP2_DB2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP2_DB2_MAP	/;"	d	file:
DI_DISP2_TIME_CONF_1	drivers/video/mx3fb.c	/^#define DI_DISP2_TIME_CONF_1	/;"	d	file:
DI_DISP2_TIME_CONF_2	drivers/video/mx3fb.c	/^#define DI_DISP2_TIME_CONF_2	/;"	d	file:
DI_DISP2_TIME_CONF_3	drivers/video/mx3fb.c	/^#define DI_DISP2_TIME_CONF_3	/;"	d	file:
DI_DISP3_B0_MAP	drivers/video/mx3fb.c	/^#define DI_DISP3_B0_MAP	/;"	d	file:
DI_DISP3_B1_MAP	drivers/video/mx3fb.c	/^#define DI_DISP3_B1_MAP	/;"	d	file:
DI_DISP3_B2_MAP	drivers/video/mx3fb.c	/^#define DI_DISP3_B2_MAP	/;"	d	file:
DI_DISP3_TIME_CONF	drivers/video/mx3fb.c	/^#define DI_DISP3_TIME_CONF	/;"	d	file:
DI_DISP_ACC_CC	drivers/video/mx3fb.c	/^#define DI_DISP_ACC_CC	/;"	d	file:
DI_DISP_IF_CONF	drivers/video/mx3fb.c	/^#define DI_DISP_IF_CONF	/;"	d	file:
DI_DISP_LLA_CONF	drivers/video/mx3fb.c	/^#define DI_DISP_LLA_CONF	/;"	d	file:
DI_DISP_LLA_DATA	drivers/video/mx3fb.c	/^#define DI_DISP_LLA_DATA	/;"	d	file:
DI_DISP_SIG_POL	drivers/video/mx3fb.c	/^#define DI_DISP_SIG_POL	/;"	d	file:
DI_DW_GEN	drivers/video/ipu_regs.h	/^#define DI_DW_GEN(/;"	d
DI_DW_GEN_ACCESS_SIZE_OFFSET	drivers/video/ipu_regs.h	/^	DI_DW_GEN_ACCESS_SIZE_OFFSET = 24,$/;"	e	enum:__anonf09a0ccd0103
DI_DW_GEN_COMPONENT_SIZE_OFFSET	drivers/video/ipu_regs.h	/^	DI_DW_GEN_COMPONENT_SIZE_OFFSET = 16,$/;"	e	enum:__anonf09a0ccd0103
DI_DW_SET	drivers/video/ipu_regs.h	/^#define DI_DW_SET(/;"	d
DI_EN	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DI_EN	/;"	d
DI_EN	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DI_EN	/;"	d
DI_EN_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DI_EN_P	/;"	d
DI_EN_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DI_EN_P	/;"	d
DI_EN_X	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DI_EN_X /;"	d
DI_EN_X	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DI_EN_X	/;"	d
DI_EN_Y	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DI_EN_Y /;"	d
DI_EN_Y	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DI_EN_Y	/;"	d
DI_GENERAL	drivers/video/ipu_regs.h	/^#define DI_GENERAL(/;"	d
DI_GEN_DI_CLK_EXT	drivers/video/ipu_regs.h	/^	DI_GEN_DI_CLK_EXT = 0x100000,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_1	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_1 = 0x00000001,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_2	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_2 = 0x00000002,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_3	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_3 = 0x00000004,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_4	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_4 = 0x00000008,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_5	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_5 = 0x00000010,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_6	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_6 = 0x00000020,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_7	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_7 = 0x00000040,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POLARITY_8	drivers/video/ipu_regs.h	/^	DI_GEN_POLARITY_8 = 0x00000080,$/;"	e	enum:__anonf09a0ccd0103
DI_GEN_POL_CLK	drivers/video/ipu_regs.h	/^	DI_GEN_POL_CLK = 0x20000,$/;"	e	enum:__anonf09a0ccd0103
DI_HSP_CLK_PER	drivers/video/mx3fb.c	/^#define DI_HSP_CLK_PER	/;"	d	file:
DI_PIN11	drivers/video/ipu_regs.h	/^	DI_PIN11 = 0,$/;"	e	enum:di_pins
DI_PIN12	drivers/video/ipu_regs.h	/^	DI_PIN12 = 1,$/;"	e	enum:di_pins
DI_PIN13	drivers/video/ipu_regs.h	/^	DI_PIN13 = 2,$/;"	e	enum:di_pins
DI_PIN14	drivers/video/ipu_regs.h	/^	DI_PIN14 = 3,$/;"	e	enum:di_pins
DI_PIN15	drivers/video/ipu_regs.h	/^	DI_PIN15 = 4,$/;"	e	enum:di_pins
DI_PIN16	drivers/video/ipu_regs.h	/^	DI_PIN16 = 5,$/;"	e	enum:di_pins
DI_PIN17	drivers/video/ipu_regs.h	/^	DI_PIN17 = 6,$/;"	e	enum:di_pins
DI_PIN_CS	drivers/video/ipu_regs.h	/^	DI_PIN_CS = 7,$/;"	e	enum:di_pins
DI_PIN_SER_CLK	drivers/video/ipu_regs.h	/^	DI_PIN_SER_CLK = 0,$/;"	e	enum:di_pins
DI_PIN_SER_RS	drivers/video/ipu_regs.h	/^	DI_PIN_SER_RS = 1,$/;"	e	enum:di_pins
DI_POL	drivers/video/ipu_regs.h	/^#define DI_POL(/;"	d
DI_POL_DRDY_DATA_POLARITY	drivers/video/ipu_regs.h	/^	DI_POL_DRDY_DATA_POLARITY = 0x00000080,$/;"	e	enum:__anonf09a0ccd0103
DI_POL_DRDY_POLARITY_15	drivers/video/ipu_regs.h	/^	DI_POL_DRDY_POLARITY_15 = 0x00000010,$/;"	e	enum:__anonf09a0ccd0103
DI_REG	drivers/video/ipu_regs.h	/^#define DI_REG(/;"	d
DI_SCR_CONF	drivers/video/ipu_regs.h	/^#define DI_SCR_CONF(/;"	d
DI_SEL	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DI_SEL	/;"	d
DI_SEL_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DI_SEL_P	/;"	d
DI_SER_DISP1_CONF	drivers/video/mx3fb.c	/^#define DI_SER_DISP1_CONF	/;"	d	file:
DI_SER_DISP2_CONF	drivers/video/mx3fb.c	/^#define DI_SER_DISP2_CONF	/;"	d	file:
DI_STP_REP	drivers/video/ipu_regs.h	/^#define DI_STP_REP(/;"	d
DI_STP_REP9	drivers/video/ipu_regs.h	/^#define DI_STP_REP9(/;"	d
DI_SW_GEN0	drivers/video/ipu_regs.h	/^#define DI_SW_GEN0(/;"	d
DI_SW_GEN1	drivers/video/ipu_regs.h	/^#define DI_SW_GEN1(/;"	d
DI_SYNC_AS_GEN	drivers/video/ipu_regs.h	/^#define DI_SYNC_AS_GEN(/;"	d
DI_SYNC_CLK	drivers/video/ipu_regs.h	/^	DI_SYNC_CLK = 0,$/;"	e	enum:di_sync_wave
DI_SYNC_DE	drivers/video/ipu_regs.h	/^	DI_SYNC_DE = 5,$/;"	e	enum:di_sync_wave
DI_SYNC_HSYNC	drivers/video/ipu_regs.h	/^	DI_SYNC_HSYNC = 2,$/;"	e	enum:di_sync_wave
DI_SYNC_INT_HSYNC	drivers/video/ipu_regs.h	/^	DI_SYNC_INT_HSYNC = 1,$/;"	e	enum:di_sync_wave
DI_SYNC_NONE	drivers/video/ipu_regs.h	/^	DI_SYNC_NONE = -1,$/;"	e	enum:di_sync_wave
DI_SYNC_VSYNC	drivers/video/ipu_regs.h	/^	DI_SYNC_VSYNC = 3,$/;"	e	enum:di_sync_wave
DI_VSYNC_SEL_OFFSET	drivers/video/ipu_regs.h	/^	DI_VSYNC_SEL_OFFSET = 13,$/;"	e	enum:__anonf09a0ccd0103
DI_WRITE_WAIT	drivers/rtc/imxdi.c	/^#define DI_WRITE_WAIT(/;"	d	file:
DI_XCOUNT_EN	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DI_XCOUNT_EN /;"	d
DIstruct	arch/blackfin/lib/muldi3.c	/^struct DIstruct {$/;"	s	file:
DIstruct	arch/m68k/lib/ashldi3.c	/^struct DIstruct {SItype high, low;};$/;"	s	file:
DIstruct	arch/m68k/lib/lshrdi3.c	/^struct DIstruct {SItype high, low;};$/;"	s	file:
DIstruct	arch/m68k/lib/muldi3.c	/^struct DIstruct {SItype high, low;};$/;"	s	file:
DIstruct	arch/microblaze/lib/muldi3.c	/^struct DIstruct {$/;"	s	file:
DItype	arch/arc/lib/libgcc2.h	/^typedef		 int DItype	__attribute__ ((mode (DI)));$/;"	t	typeref:typename:int
DItype	arch/blackfin/lib/muldi3.c	/^typedef int DItype __attribute__ ((mode(DI)));$/;"	t	typeref:typename:int	file:
DItype	arch/m68k/lib/ashldi3.c	/^typedef		 int DItype	__attribute__ ((mode (DI)));$/;"	t	typeref:typename:int	file:
DItype	arch/m68k/lib/lshrdi3.c	/^typedef		 int DItype	__attribute__ ((mode (DI)));$/;"	t	typeref:typename:int	file:
DItype	arch/m68k/lib/muldi3.c	/^typedef		 int DItype	__attribute__ ((mode (DI)));$/;"	t	typeref:typename:int	file:
DItype	arch/microblaze/lib/muldi3.c	/^typedef int DItype __attribute__ ((mode(DI)));$/;"	t	typeref:typename:int	file:
DItype	arch/nios2/lib/libgcc.c	/^typedef long long DItype;$/;"	t	typeref:typename:long long	file:
DIunion	arch/blackfin/lib/muldi3.c	/^} DIunion;$/;"	t	typeref:union:__anonc48de1c0010a	file:
DIunion	arch/m68k/lib/ashldi3.c	/^} DIunion;$/;"	t	typeref:union:__anonebfd3a86010a	file:
DIunion	arch/m68k/lib/lshrdi3.c	/^} DIunion;$/;"	t	typeref:union:__anonfb550957010a	file:
DIunion	arch/m68k/lib/muldi3.c	/^} DIunion;$/;"	t	typeref:union:__anon962d2c0c010a	file:
DIunion	arch/microblaze/lib/muldi3.c	/^} DIunion;$/;"	t	typeref:union:__anon8848586e010a	file:
DLAB	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define DLAB	/;"	d
DLAB_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define DLAB_P	/;"	d
DLBD0	arch/sh/include/asm/cpu_sh7722.h	/^#define DLBD0 /;"	d
DLBD1	arch/sh/include/asm/cpu_sh7722.h	/^#define DLBD1 /;"	d
DLBI	arch/sh/include/asm/cpu_sh7722.h	/^#define DLBI /;"	d
DLB_AGING_REGISTER	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_AGING_REGISTER	/;"	d
DLB_AGING_REGISTER	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_AGING_REGISTER	/;"	d
DLB_AXI_PREFETCH_EN	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_AXI_PREFETCH_EN	/;"	d
DLB_AXI_PREFETCH_EN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_AXI_PREFETCH_EN	/;"	d
DLB_BUS_OPTIMIZATION_WEIGHTS_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_BUS_OPTIMIZATION_WEIGHTS_REG	/;"	d
DLB_BUS_OPTIMIZATION_WEIGHTS_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_BUS_OPTIMIZATION_WEIGHTS_REG	/;"	d
DLB_BUS_WEIGHTS_ATTR_SYS_PRIO	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_BUS_WEIGHTS_ATTR_SYS_PRIO	/;"	d
DLB_BUS_WEIGHTS_DIFF_BG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_BUS_WEIGHTS_DIFF_BG	/;"	d
DLB_BUS_WEIGHTS_DIFF_CS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_BUS_WEIGHTS_DIFF_CS	/;"	d
DLB_BUS_WEIGHTS_RD_WR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_BUS_WEIGHTS_RD_WR	/;"	d
DLB_BUS_WEIGHTS_SAME_BG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_BUS_WEIGHTS_SAME_BG	/;"	d
DLB_ENABLE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_ENABLE	/;"	d
DLB_ENABLE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_ENABLE	/;"	d
DLB_EVICTION_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_EVICTION_CONTROL_REG	/;"	d
DLB_EVICTION_CONTROL_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_EVICTION_CONTROL_REG	/;"	d
DLB_EVICTION_TIMERS_REGISTER_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_EVICTION_TIMERS_REGISTER_REG	/;"	d
DLB_EVICTION_TIMERS_REGISTER_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_EVICTION_TIMERS_REGISTER_REG	/;"	d
DLB_INTERJECTION_ENABLE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_INTERJECTION_ENABLE	/;"	d
DLB_LINE_SPLIT	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_LINE_SPLIT	/;"	d
DLB_MAIN_QUEUE_MAP	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_MAIN_QUEUE_MAP	/;"	d
DLB_MBUS_PREFETCH_EN	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_MBUS_PREFETCH_EN	/;"	d
DLB_MBUS_PREFETCH_EN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_MBUS_PREFETCH_EN	/;"	d
DLB_USER_COMMAND_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_USER_COMMAND_REG	/;"	d
DLB_WRITE_COALESING	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define DLB_WRITE_COALESING	/;"	d
DLB_WRITE_COALESING	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define DLB_WRITE_COALESING	/;"	d
DLENGTH	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLENGTH /;"	d
DLENGTH	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLENGTH	/;"	d
DLEN_10	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_10 /;"	d
DLEN_10	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_10	/;"	d
DLEN_11	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_11	/;"	d
DLEN_12	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_12 /;"	d
DLEN_12	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_12	/;"	d
DLEN_13	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_13	/;"	d
DLEN_14	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_14 /;"	d
DLEN_14	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_14	/;"	d
DLEN_15	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_15	/;"	d
DLEN_16	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_16 /;"	d
DLEN_16	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_16	/;"	d
DLEN_18	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_18 /;"	d
DLEN_24	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_24 /;"	d
DLEN_8	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DLEN_8 /;"	d
DLEN_8	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DLEN_8	/;"	d
DLEVEL	drivers/ddr/altera/sequencer.c	/^#define DLEVEL /;"	d	file:
DLG_COLOR	scripts/kconfig/lxdialog/util.c	/^#define DLG_COLOR(/;"	d	file:
DLLCALDONE	arch/blackfin/cpu/initcode.c	/^#define DLLCALDONE /;"	d	file:
DLLCALRDCNT	arch/blackfin/cpu/initcode.c	/^#define DLLCALRDCNT /;"	d	file:
DLLCSR_A	board/renesas/r7780mp/lowlevel_init.S	/^DLLCSR_A:		.long	0xffc40010$/;"	l
DLLCSR_D	board/renesas/r7780mp/lowlevel_init.S	/^DLLCSR_D:		.long	0x00000000$/;"	l
DLLFRQ	arch/sh/include/asm/cpu_sh7722.h	/^#define DLLFRQ /;"	d
DLLFRQ	arch/sh/include/asm/cpu_sh7723.h	/^#define DLLFRQ /;"	d
DLLFRQ	arch/sh/include/asm/cpu_sh7724.h	/^#define DLLFRQ /;"	d
DLLFRQ_A	board/renesas/MigoR/lowlevel_init.S	/^DLLFRQ_A:	.long	DLLFRQ$/;"	l
DLLFRQ_D	board/renesas/MigoR/lowlevel_init.S	/^DLLFRQ_D:	.long	0x000004F6$/;"	l
DLLGCR_SBIAS	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DLLGCR_SBIAS	/;"	d
DLLPHASE_90	arch/arm/include/asm/arch-omap3/cpu.h	/^#define DLLPHASE_90	/;"	d
DLL_CONTROL_ON	arch/arm/mach-exynos/exynos4_setup.h	/^#define DLL_CONTROL_ON	/;"	d
DLL_DELAY_MASK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define DLL_DELAY_MASK	/;"	d
DLL_DESKEW_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define DLL_DESKEW_EN	/;"	d
DLL_DLLPHASE_72	arch/arm/include/asm/arch-omap3/mem.h	/^#define DLL_DLLPHASE_72	/;"	d
DLL_DLLPHASE_90	arch/arm/include/asm/arch-omap3/mem.h	/^#define DLL_DLLPHASE_90	/;"	d
DLL_DQS_BYPASS	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define DLL_DQS_BYPASS	/;"	d	file:
DLL_DQS_DELAY	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define DLL_DQS_DELAY	/;"	d	file:
DLL_ENADLL	arch/arm/include/asm/arch-omap3/mem.h	/^#define DLL_ENADLL	/;"	d
DLL_LOCKDLL	arch/arm/include/asm/arch-omap3/mem.h	/^#define DLL_LOCKDLL	/;"	d
DLL_NO_FILTER_MASK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define DLL_NO_FILTER_MASK	/;"	d
DLL_OFFSET	arch/arm/include/asm/arch-omap3/mem.h	/^#define DLL_OFFSET	/;"	d
DLL_RESET	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define DLL_RESET	/;"	d	file:
DLL_WRITEDDRCLKX2DIS	arch/arm/include/asm/arch-omap3/mem.h	/^#define DLL_WRITEDDRCLKX2DIS	/;"	d
DLR_DFT_WRCMD	drivers/ddr/microchip/ddr2_regs.h	/^#define DLR_DFT_WRCMD	/;"	d
DLYSELCH0	arch/x86/cpu/quark/smc.h	/^#define DLYSELCH0	/;"	d
DL_VALUE	drivers/serial/serial_sh.h	/^#define DL_VALUE(/;"	d
DM	drivers/core/Kconfig	/^config DM$/;"	c	menu:Generic Driver Options
DM	include/sym53c8xx.h	/^  #define   DM /;"	d
DM814X_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM814X_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define DM814X_IOPAD(/;"	d
DM816X_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM816X_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define DM816X_IOPAD(/;"	d
DM9000_BPTR	drivers/net/dm9000x.h	/^#define DM9000_BPTR /;"	d
DM9000_CHIPR	drivers/net/dm9000x.h	/^#define DM9000_CHIPR /;"	d
DM9000_DATA	include/configs/M5253DEMO.h	/^#	define DM9000_DATA	/;"	d
DM9000_DATA	include/configs/at91sam9261ek.h	/^#define DM9000_DATA	/;"	d
DM9000_DATA	include/configs/colibri_pxa270.h	/^#define DM9000_DATA	/;"	d
DM9000_DATA	include/configs/devkit8000.h	/^#define	DM9000_DATA	/;"	d
DM9000_DATA	include/configs/ip04.h	/^#define DM9000_DATA	/;"	d
DM9000_DATA	include/configs/pm9261.h	/^#define DM9000_DATA	/;"	d
DM9000_DBG	drivers/net/dm9000x.c	/^#define DM9000_DBG(/;"	d	file:
DM9000_DMP_PACKET	drivers/net/dm9000x.c	/^#define DM9000_DMP_PACKET(/;"	d	file:
DM9000_EPAR	drivers/net/dm9000x.h	/^#define DM9000_EPAR /;"	d
DM9000_EPCR	drivers/net/dm9000x.h	/^#define DM9000_EPCR /;"	d
DM9000_EPDRH	drivers/net/dm9000x.h	/^#define DM9000_EPDRH /;"	d
DM9000_EPDRL	drivers/net/dm9000x.h	/^#define DM9000_EPDRL /;"	d
DM9000_FCR	drivers/net/dm9000x.h	/^#define DM9000_FCR /;"	d
DM9000_FCTR	drivers/net/dm9000x.h	/^#define DM9000_FCTR /;"	d
DM9000_GPCR	drivers/net/dm9000x.h	/^#define DM9000_GPCR	/;"	d
DM9000_GPR	drivers/net/dm9000x.h	/^#define DM9000_GPR /;"	d
DM9000_ID	drivers/net/dm9000x.h	/^#define DM9000_ID	/;"	d
DM9000_IMR	drivers/net/dm9000x.h	/^#define DM9000_IMR /;"	d
DM9000_IO	include/configs/M5253DEMO.h	/^#	define DM9000_IO	/;"	d
DM9000_IO	include/configs/at91sam9261ek.h	/^#define DM9000_IO	/;"	d
DM9000_IO	include/configs/colibri_pxa270.h	/^#define DM9000_IO	/;"	d
DM9000_IO	include/configs/devkit8000.h	/^#define	DM9000_IO	/;"	d
DM9000_IO	include/configs/ip04.h	/^#define DM9000_IO	/;"	d
DM9000_IO	include/configs/pm9261.h	/^#define DM9000_IO	/;"	d
DM9000_ISR	drivers/net/dm9000x.h	/^#define DM9000_ISR /;"	d
DM9000_MAR	drivers/net/dm9000x.h	/^#define DM9000_MAR /;"	d
DM9000_MRCMD	drivers/net/dm9000x.h	/^#define DM9000_MRCMD /;"	d
DM9000_MRCMDX	drivers/net/dm9000x.h	/^#define DM9000_MRCMDX /;"	d
DM9000_MRRH	drivers/net/dm9000x.h	/^#define DM9000_MRRH /;"	d
DM9000_MRRL	drivers/net/dm9000x.h	/^#define DM9000_MRRL /;"	d
DM9000_MWCMD	drivers/net/dm9000x.h	/^#define DM9000_MWCMD /;"	d
DM9000_MWCMDX	drivers/net/dm9000x.h	/^#define DM9000_MWCMDX	/;"	d
DM9000_MWRH	drivers/net/dm9000x.h	/^#define DM9000_MWRH /;"	d
DM9000_MWRL	drivers/net/dm9000x.h	/^#define DM9000_MWRL /;"	d
DM9000_NCR	drivers/net/dm9000x.h	/^#define DM9000_NCR /;"	d
DM9000_NSR	drivers/net/dm9000x.h	/^#define DM9000_NSR /;"	d
DM9000_PAR	drivers/net/dm9000x.h	/^#define DM9000_PAR /;"	d
DM9000_PHY	drivers/net/dm9000x.h	/^#define DM9000_PHY	/;"	d
DM9000_PIDH	drivers/net/dm9000x.h	/^#define DM9000_PIDH /;"	d
DM9000_PIDL	drivers/net/dm9000x.h	/^#define DM9000_PIDL /;"	d
DM9000_PKT_MAX	drivers/net/dm9000x.h	/^#define DM9000_PKT_MAX	/;"	d
DM9000_PKT_RDY	drivers/net/dm9000x.h	/^#define DM9000_PKT_RDY	/;"	d
DM9000_RCR	drivers/net/dm9000x.h	/^#define DM9000_RCR /;"	d
DM9000_ROCR	drivers/net/dm9000x.h	/^#define DM9000_ROCR /;"	d
DM9000_RSR	drivers/net/dm9000x.h	/^#define DM9000_RSR /;"	d
DM9000_RWPAH	drivers/net/dm9000x.h	/^#define DM9000_RWPAH /;"	d
DM9000_RWPAL	drivers/net/dm9000x.h	/^#define DM9000_RWPAL /;"	d
DM9000_SMCR	drivers/net/dm9000x.h	/^#define DM9000_SMCR /;"	d
DM9000_TCR	drivers/net/dm9000x.h	/^#define DM9000_TCR /;"	d
DM9000_TRPAH	drivers/net/dm9000x.h	/^#define DM9000_TRPAH /;"	d
DM9000_TRPAL	drivers/net/dm9000x.h	/^#define DM9000_TRPAL /;"	d
DM9000_TSR1	drivers/net/dm9000x.h	/^#define DM9000_TSR1 /;"	d
DM9000_TSR2	drivers/net/dm9000x.h	/^#define DM9000_TSR2 /;"	d
DM9000_TXPLH	drivers/net/dm9000x.h	/^#define DM9000_TXPLH /;"	d
DM9000_TXPLL	drivers/net/dm9000x.h	/^#define DM9000_TXPLL /;"	d
DM9000_VIDH	drivers/net/dm9000x.h	/^#define DM9000_VIDH /;"	d
DM9000_VIDL	drivers/net/dm9000x.h	/^#define DM9000_VIDL /;"	d
DM9000_WCR	drivers/net/dm9000x.h	/^#define DM9000_WCR /;"	d
DM9000_inb	drivers/net/dm9000x.c	/^#define DM9000_inb(/;"	d	file:
DM9000_inl	drivers/net/dm9000x.c	/^#define DM9000_inl(/;"	d	file:
DM9000_inw	drivers/net/dm9000x.c	/^#define DM9000_inw(/;"	d	file:
DM9000_ior	drivers/net/dm9000x.c	/^DM9000_ior(int reg)$/;"	f	typeref:typename:u8	file:
DM9000_iow	drivers/net/dm9000x.c	/^DM9000_iow(int reg, u8 value)$/;"	f	typeref:typename:void	file:
DM9000_outb	drivers/net/dm9000x.c	/^#define DM9000_outb(/;"	d	file:
DM9000_outl	drivers/net/dm9000x.c	/^#define DM9000_outl(/;"	d	file:
DM9000_outw	drivers/net/dm9000x.c	/^#define DM9000_outw(/;"	d	file:
DM9161_driver	drivers/net/phy/davicom.c	/^static struct phy_driver DM9161_driver = {$/;"	v	typeref:struct:phy_driver	file:
DMA	arch/sh/include/asm/cpu_sh7722.h	/^#define DMA /;"	d
DMA	drivers/dma/Kconfig	/^config DMA$/;"	c	menu:DMA Support
DMA Support	drivers/dma/Kconfig	/^menu "DMA Support"$/;"	m
DMA0CFG	drivers/usb/host/r8a66597.h	/^#define DMA0CFG	/;"	d
DMA0URQ	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DMA0URQ /;"	d
DMA0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DMA0_BASE_ADDR	/;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_CONFIG /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_CURR_ADDR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_CURR_DESC_PTR /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_CURR_X_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_CURR_Y_COUNT /;"	d
DMA0_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA0_INT	/;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_IRQ_STATUS /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_NEXT_DESC_PTR /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_PERIPHERAL_MAP /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_START_ADDR /;"	d
DMA0_TCD_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DMA0_TCD_BASE_ADDR	/;"	d
DMA0_TC_CNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_TC_CNT /;"	d
DMA0_TC_PER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_TC_PER /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_X_COUNT /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_X_MODIFY /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_Y_COUNT /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA0_Y_MODIFY /;"	d
DMA10_ADDRSTART	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_ADDRSTART /;"	d
DMA10_ADDR_CUR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_ADDR_CUR /;"	d
DMA10_BWLCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_BWLCNT /;"	d
DMA10_BWLCNT_CUR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_BWLCNT_CUR /;"	d
DMA10_BWMCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_BWMCNT /;"	d
DMA10_BWMCNT_CUR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_BWMCNT_CUR /;"	d
DMA10_CFG	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_CFG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_CONFIG /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_CURR_ADDR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_CURR_DESC_PTR /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_CURR_X_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_CURR_Y_COUNT /;"	d
DMA10_DSCPTR_CUR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_DSCPTR_CUR /;"	d
DMA10_DSCPTR_NXT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_DSCPTR_NXT /;"	d
DMA10_DSCPTR_PRV	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_DSCPTR_PRV /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_IRQ_STATUS /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_NEXT_DESC_PTR /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_PERIPHERAL_MAP /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_START_ADDR /;"	d
DMA10_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_STAT /;"	d
DMA10_XCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_XCNT /;"	d
DMA10_XCNT_CUR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_XCNT_CUR /;"	d
DMA10_XMOD	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_XMOD /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_X_COUNT /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_X_MODIFY /;"	d
DMA10_YCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_YCNT /;"	d
DMA10_YCNT_CUR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_YCNT_CUR /;"	d
DMA10_YMOD	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA10_YMOD /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_Y_COUNT /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA10_Y_MODIFY /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_CONFIG /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_CURR_ADDR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_CURR_DESC_PTR /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_CURR_X_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_CURR_Y_COUNT /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_IRQ_STATUS /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_NEXT_DESC_PTR /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_PERIPHERAL_MAP /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_START_ADDR /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_X_COUNT /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_X_MODIFY /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_Y_COUNT /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA11_Y_MODIFY /;"	d
DMA12_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_CONFIG /;"	d
DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_CONFIG /;"	d
DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_CONFIG /;"	d
DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_CONFIG /;"	d
DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_CONFIG /;"	d
DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_CONFIG /;"	d
DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_CURR_ADDR /;"	d
DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_CURR_ADDR /;"	d
DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_CURR_ADDR /;"	d
DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_CURR_ADDR /;"	d
DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_CURR_ADDR /;"	d
DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_CURR_ADDR /;"	d
DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_CURR_DESC_PTR /;"	d
DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_CURR_DESC_PTR /;"	d
DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_CURR_DESC_PTR /;"	d
DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_CURR_DESC_PTR /;"	d
DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_CURR_DESC_PTR /;"	d
DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_CURR_DESC_PTR /;"	d
DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_CURR_X_COUNT /;"	d
DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_CURR_X_COUNT /;"	d
DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_CURR_X_COUNT /;"	d
DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_CURR_X_COUNT /;"	d
DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_CURR_X_COUNT /;"	d
DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_CURR_X_COUNT /;"	d
DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_CURR_Y_COUNT /;"	d
DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_CURR_Y_COUNT /;"	d
DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_CURR_Y_COUNT /;"	d
DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_CURR_Y_COUNT /;"	d
DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_CURR_Y_COUNT /;"	d
DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_CURR_Y_COUNT /;"	d
DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_IRQ_STATUS /;"	d
DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_IRQ_STATUS /;"	d
DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_IRQ_STATUS /;"	d
DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_IRQ_STATUS /;"	d
DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_IRQ_STATUS /;"	d
DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_IRQ_STATUS /;"	d
DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_NEXT_DESC_PTR /;"	d
DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_NEXT_DESC_PTR /;"	d
DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_NEXT_DESC_PTR /;"	d
DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_NEXT_DESC_PTR /;"	d
DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_NEXT_DESC_PTR /;"	d
DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_NEXT_DESC_PTR /;"	d
DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_PERIPHERAL_MAP /;"	d
DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_PERIPHERAL_MAP /;"	d
DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_PERIPHERAL_MAP /;"	d
DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_PERIPHERAL_MAP /;"	d
DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_PERIPHERAL_MAP /;"	d
DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_PERIPHERAL_MAP /;"	d
DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_START_ADDR /;"	d
DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_START_ADDR /;"	d
DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_START_ADDR /;"	d
DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_START_ADDR /;"	d
DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_START_ADDR /;"	d
DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_START_ADDR /;"	d
DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_X_COUNT /;"	d
DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_X_COUNT /;"	d
DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_X_COUNT /;"	d
DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_X_COUNT /;"	d
DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_X_COUNT /;"	d
DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_X_COUNT /;"	d
DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_X_MODIFY /;"	d
DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_X_MODIFY /;"	d
DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_X_MODIFY /;"	d
DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_X_MODIFY /;"	d
DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_X_MODIFY /;"	d
DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_X_MODIFY /;"	d
DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_Y_COUNT /;"	d
DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_Y_COUNT /;"	d
DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_Y_COUNT /;"	d
DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_Y_COUNT /;"	d
DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_Y_COUNT /;"	d
DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_Y_COUNT /;"	d
DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA12_Y_MODIFY /;"	d
DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA12_Y_MODIFY /;"	d
DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA12_Y_MODIFY /;"	d
DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA12_Y_MODIFY /;"	d
DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA12_Y_MODIFY /;"	d
DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA12_Y_MODIFY /;"	d
DMA13_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_CONFIG /;"	d
DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_CONFIG /;"	d
DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_CONFIG /;"	d
DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_CONFIG /;"	d
DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_CONFIG /;"	d
DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_CONFIG /;"	d
DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_CURR_ADDR /;"	d
DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_CURR_ADDR /;"	d
DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_CURR_ADDR /;"	d
DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_CURR_ADDR /;"	d
DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_CURR_ADDR /;"	d
DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_CURR_ADDR /;"	d
DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_CURR_DESC_PTR /;"	d
DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_CURR_DESC_PTR /;"	d
DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_CURR_DESC_PTR /;"	d
DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_CURR_DESC_PTR /;"	d
DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_CURR_DESC_PTR /;"	d
DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_CURR_DESC_PTR /;"	d
DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_CURR_X_COUNT /;"	d
DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_CURR_X_COUNT /;"	d
DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_CURR_X_COUNT /;"	d
DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_CURR_X_COUNT /;"	d
DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_CURR_X_COUNT /;"	d
DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_CURR_X_COUNT /;"	d
DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_CURR_Y_COUNT /;"	d
DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_CURR_Y_COUNT /;"	d
DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_CURR_Y_COUNT /;"	d
DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_CURR_Y_COUNT /;"	d
DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_CURR_Y_COUNT /;"	d
DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_CURR_Y_COUNT /;"	d
DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_IRQ_STATUS /;"	d
DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_IRQ_STATUS /;"	d
DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_IRQ_STATUS /;"	d
DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_IRQ_STATUS /;"	d
DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_IRQ_STATUS /;"	d
DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_IRQ_STATUS /;"	d
DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_NEXT_DESC_PTR /;"	d
DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_NEXT_DESC_PTR /;"	d
DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_NEXT_DESC_PTR /;"	d
DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_NEXT_DESC_PTR /;"	d
DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_NEXT_DESC_PTR /;"	d
DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_NEXT_DESC_PTR /;"	d
DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_PERIPHERAL_MAP /;"	d
DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_PERIPHERAL_MAP /;"	d
DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_PERIPHERAL_MAP /;"	d
DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_PERIPHERAL_MAP /;"	d
DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_PERIPHERAL_MAP /;"	d
DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_PERIPHERAL_MAP /;"	d
DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_START_ADDR /;"	d
DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_START_ADDR /;"	d
DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_START_ADDR /;"	d
DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_START_ADDR /;"	d
DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_START_ADDR /;"	d
DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_START_ADDR /;"	d
DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_X_COUNT /;"	d
DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_X_COUNT /;"	d
DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_X_COUNT /;"	d
DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_X_COUNT /;"	d
DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_X_COUNT /;"	d
DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_X_COUNT /;"	d
DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_X_MODIFY /;"	d
DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_X_MODIFY /;"	d
DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_X_MODIFY /;"	d
DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_X_MODIFY /;"	d
DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_X_MODIFY /;"	d
DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_X_MODIFY /;"	d
DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_Y_COUNT /;"	d
DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_Y_COUNT /;"	d
DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_Y_COUNT /;"	d
DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_Y_COUNT /;"	d
DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_Y_COUNT /;"	d
DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_Y_COUNT /;"	d
DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA13_Y_MODIFY /;"	d
DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA13_Y_MODIFY /;"	d
DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA13_Y_MODIFY /;"	d
DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA13_Y_MODIFY /;"	d
DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA13_Y_MODIFY /;"	d
DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA13_Y_MODIFY /;"	d
DMA14_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_CONFIG /;"	d
DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_CONFIG /;"	d
DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_CONFIG /;"	d
DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_CONFIG /;"	d
DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_CONFIG /;"	d
DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_CONFIG /;"	d
DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_CURR_ADDR /;"	d
DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_CURR_ADDR /;"	d
DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_CURR_ADDR /;"	d
DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_CURR_ADDR /;"	d
DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_CURR_ADDR /;"	d
DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_CURR_ADDR /;"	d
DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_CURR_DESC_PTR /;"	d
DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_CURR_DESC_PTR /;"	d
DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_CURR_DESC_PTR /;"	d
DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_CURR_DESC_PTR /;"	d
DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_CURR_DESC_PTR /;"	d
DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_CURR_DESC_PTR /;"	d
DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_CURR_X_COUNT /;"	d
DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_CURR_X_COUNT /;"	d
DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_CURR_X_COUNT /;"	d
DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_CURR_X_COUNT /;"	d
DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_CURR_X_COUNT /;"	d
DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_CURR_X_COUNT /;"	d
DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_CURR_Y_COUNT /;"	d
DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_CURR_Y_COUNT /;"	d
DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_CURR_Y_COUNT /;"	d
DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_CURR_Y_COUNT /;"	d
DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_CURR_Y_COUNT /;"	d
DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_CURR_Y_COUNT /;"	d
DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_IRQ_STATUS /;"	d
DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_IRQ_STATUS /;"	d
DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_IRQ_STATUS /;"	d
DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_IRQ_STATUS /;"	d
DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_IRQ_STATUS /;"	d
DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_IRQ_STATUS /;"	d
DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_NEXT_DESC_PTR /;"	d
DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_NEXT_DESC_PTR /;"	d
DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_NEXT_DESC_PTR /;"	d
DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_NEXT_DESC_PTR /;"	d
DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_NEXT_DESC_PTR /;"	d
DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_NEXT_DESC_PTR /;"	d
DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_PERIPHERAL_MAP /;"	d
DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_PERIPHERAL_MAP /;"	d
DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_PERIPHERAL_MAP /;"	d
DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_PERIPHERAL_MAP /;"	d
DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_PERIPHERAL_MAP /;"	d
DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_PERIPHERAL_MAP /;"	d
DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_START_ADDR /;"	d
DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_START_ADDR /;"	d
DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_START_ADDR /;"	d
DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_START_ADDR /;"	d
DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_START_ADDR /;"	d
DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_START_ADDR /;"	d
DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_X_COUNT /;"	d
DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_X_COUNT /;"	d
DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_X_COUNT /;"	d
DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_X_COUNT /;"	d
DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_X_COUNT /;"	d
DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_X_COUNT /;"	d
DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_X_MODIFY /;"	d
DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_X_MODIFY /;"	d
DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_X_MODIFY /;"	d
DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_X_MODIFY /;"	d
DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_X_MODIFY /;"	d
DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_X_MODIFY /;"	d
DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_Y_COUNT /;"	d
DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_Y_COUNT /;"	d
DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_Y_COUNT /;"	d
DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_Y_COUNT /;"	d
DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_Y_COUNT /;"	d
DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_Y_COUNT /;"	d
DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA14_Y_MODIFY /;"	d
DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA14_Y_MODIFY /;"	d
DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA14_Y_MODIFY /;"	d
DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA14_Y_MODIFY /;"	d
DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA14_Y_MODIFY /;"	d
DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA14_Y_MODIFY /;"	d
DMA15_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_CONFIG /;"	d
DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_CONFIG /;"	d
DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_CONFIG /;"	d
DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_CONFIG /;"	d
DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_CONFIG /;"	d
DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_CONFIG /;"	d
DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_CURR_ADDR /;"	d
DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_CURR_ADDR /;"	d
DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_CURR_ADDR /;"	d
DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_CURR_ADDR /;"	d
DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_CURR_ADDR /;"	d
DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_CURR_ADDR /;"	d
DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_CURR_DESC_PTR /;"	d
DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_CURR_DESC_PTR /;"	d
DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_CURR_DESC_PTR /;"	d
DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_CURR_DESC_PTR /;"	d
DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_CURR_DESC_PTR /;"	d
DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_CURR_DESC_PTR /;"	d
DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_CURR_X_COUNT /;"	d
DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_CURR_X_COUNT /;"	d
DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_CURR_X_COUNT /;"	d
DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_CURR_X_COUNT /;"	d
DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_CURR_X_COUNT /;"	d
DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_CURR_X_COUNT /;"	d
DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_CURR_Y_COUNT /;"	d
DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_CURR_Y_COUNT /;"	d
DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_CURR_Y_COUNT /;"	d
DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_CURR_Y_COUNT /;"	d
DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_CURR_Y_COUNT /;"	d
DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_CURR_Y_COUNT /;"	d
DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_IRQ_STATUS /;"	d
DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_IRQ_STATUS /;"	d
DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_IRQ_STATUS /;"	d
DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_IRQ_STATUS /;"	d
DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_IRQ_STATUS /;"	d
DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_IRQ_STATUS /;"	d
DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_NEXT_DESC_PTR /;"	d
DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_NEXT_DESC_PTR /;"	d
DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_NEXT_DESC_PTR /;"	d
DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_NEXT_DESC_PTR /;"	d
DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_NEXT_DESC_PTR /;"	d
DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_NEXT_DESC_PTR /;"	d
DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_PERIPHERAL_MAP /;"	d
DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_PERIPHERAL_MAP /;"	d
DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_PERIPHERAL_MAP /;"	d
DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_PERIPHERAL_MAP /;"	d
DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_PERIPHERAL_MAP /;"	d
DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_PERIPHERAL_MAP /;"	d
DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_START_ADDR /;"	d
DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_START_ADDR /;"	d
DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_START_ADDR /;"	d
DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_START_ADDR /;"	d
DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_START_ADDR /;"	d
DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_START_ADDR /;"	d
DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_X_COUNT /;"	d
DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_X_COUNT /;"	d
DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_X_COUNT /;"	d
DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_X_COUNT /;"	d
DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_X_COUNT /;"	d
DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_X_COUNT /;"	d
DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_X_MODIFY /;"	d
DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_X_MODIFY /;"	d
DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_X_MODIFY /;"	d
DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_X_MODIFY /;"	d
DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_X_MODIFY /;"	d
DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_X_MODIFY /;"	d
DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_Y_COUNT /;"	d
DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_Y_COUNT /;"	d
DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_Y_COUNT /;"	d
DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_Y_COUNT /;"	d
DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_Y_COUNT /;"	d
DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_Y_COUNT /;"	d
DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA15_Y_MODIFY /;"	d
DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA15_Y_MODIFY /;"	d
DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA15_Y_MODIFY /;"	d
DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA15_Y_MODIFY /;"	d
DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA15_Y_MODIFY /;"	d
DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA15_Y_MODIFY /;"	d
DMA16_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_CONFIG /;"	d
DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_CONFIG /;"	d
DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_CONFIG /;"	d
DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_CONFIG /;"	d
DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_CONFIG /;"	d
DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_CONFIG /;"	d
DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_CURR_ADDR /;"	d
DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_CURR_ADDR /;"	d
DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_CURR_ADDR /;"	d
DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_CURR_ADDR /;"	d
DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_CURR_ADDR /;"	d
DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_CURR_ADDR /;"	d
DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_CURR_DESC_PTR /;"	d
DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_CURR_DESC_PTR /;"	d
DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_CURR_DESC_PTR /;"	d
DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_CURR_DESC_PTR /;"	d
DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_CURR_DESC_PTR /;"	d
DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_CURR_DESC_PTR /;"	d
DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_CURR_X_COUNT /;"	d
DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_CURR_X_COUNT /;"	d
DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_CURR_X_COUNT /;"	d
DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_CURR_X_COUNT /;"	d
DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_CURR_X_COUNT /;"	d
DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_CURR_X_COUNT /;"	d
DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_CURR_Y_COUNT /;"	d
DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_CURR_Y_COUNT /;"	d
DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_CURR_Y_COUNT /;"	d
DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_CURR_Y_COUNT /;"	d
DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_CURR_Y_COUNT /;"	d
DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_CURR_Y_COUNT /;"	d
DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_IRQ_STATUS /;"	d
DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_IRQ_STATUS /;"	d
DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_IRQ_STATUS /;"	d
DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_IRQ_STATUS /;"	d
DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_IRQ_STATUS /;"	d
DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_IRQ_STATUS /;"	d
DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_NEXT_DESC_PTR /;"	d
DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_NEXT_DESC_PTR /;"	d
DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_NEXT_DESC_PTR /;"	d
DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_NEXT_DESC_PTR /;"	d
DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_NEXT_DESC_PTR /;"	d
DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_NEXT_DESC_PTR /;"	d
DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_PERIPHERAL_MAP /;"	d
DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_PERIPHERAL_MAP /;"	d
DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_PERIPHERAL_MAP /;"	d
DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_PERIPHERAL_MAP /;"	d
DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_PERIPHERAL_MAP /;"	d
DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_PERIPHERAL_MAP /;"	d
DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_START_ADDR /;"	d
DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_START_ADDR /;"	d
DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_START_ADDR /;"	d
DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_START_ADDR /;"	d
DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_START_ADDR /;"	d
DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_START_ADDR /;"	d
DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_X_COUNT /;"	d
DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_X_COUNT /;"	d
DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_X_COUNT /;"	d
DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_X_COUNT /;"	d
DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_X_COUNT /;"	d
DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_X_COUNT /;"	d
DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_X_MODIFY /;"	d
DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_X_MODIFY /;"	d
DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_X_MODIFY /;"	d
DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_X_MODIFY /;"	d
DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_X_MODIFY /;"	d
DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_X_MODIFY /;"	d
DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_Y_COUNT /;"	d
DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_Y_COUNT /;"	d
DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_Y_COUNT /;"	d
DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_Y_COUNT /;"	d
DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_Y_COUNT /;"	d
DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_Y_COUNT /;"	d
DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA16_Y_MODIFY /;"	d
DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA16_Y_MODIFY /;"	d
DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA16_Y_MODIFY /;"	d
DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA16_Y_MODIFY /;"	d
DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA16_Y_MODIFY /;"	d
DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA16_Y_MODIFY /;"	d
DMA17_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_CONFIG /;"	d
DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_CONFIG /;"	d
DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_CONFIG /;"	d
DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_CONFIG /;"	d
DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_CONFIG /;"	d
DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_CONFIG /;"	d
DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_CURR_ADDR /;"	d
DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_CURR_ADDR /;"	d
DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_CURR_ADDR /;"	d
DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_CURR_ADDR /;"	d
DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_CURR_ADDR /;"	d
DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_CURR_ADDR /;"	d
DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_CURR_DESC_PTR /;"	d
DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_CURR_DESC_PTR /;"	d
DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_CURR_DESC_PTR /;"	d
DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_CURR_DESC_PTR /;"	d
DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_CURR_DESC_PTR /;"	d
DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_CURR_DESC_PTR /;"	d
DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_CURR_X_COUNT /;"	d
DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_CURR_X_COUNT /;"	d
DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_CURR_X_COUNT /;"	d
DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_CURR_X_COUNT /;"	d
DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_CURR_X_COUNT /;"	d
DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_CURR_X_COUNT /;"	d
DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_CURR_Y_COUNT /;"	d
DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_CURR_Y_COUNT /;"	d
DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_CURR_Y_COUNT /;"	d
DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_CURR_Y_COUNT /;"	d
DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_CURR_Y_COUNT /;"	d
DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_CURR_Y_COUNT /;"	d
DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_IRQ_STATUS /;"	d
DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_IRQ_STATUS /;"	d
DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_IRQ_STATUS /;"	d
DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_IRQ_STATUS /;"	d
DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_IRQ_STATUS /;"	d
DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_IRQ_STATUS /;"	d
DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_NEXT_DESC_PTR /;"	d
DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_NEXT_DESC_PTR /;"	d
DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_NEXT_DESC_PTR /;"	d
DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_NEXT_DESC_PTR /;"	d
DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_NEXT_DESC_PTR /;"	d
DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_NEXT_DESC_PTR /;"	d
DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_PERIPHERAL_MAP /;"	d
DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_PERIPHERAL_MAP /;"	d
DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_PERIPHERAL_MAP /;"	d
DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_PERIPHERAL_MAP /;"	d
DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_PERIPHERAL_MAP /;"	d
DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_PERIPHERAL_MAP /;"	d
DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_START_ADDR /;"	d
DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_START_ADDR /;"	d
DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_START_ADDR /;"	d
DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_START_ADDR /;"	d
DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_START_ADDR /;"	d
DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_START_ADDR /;"	d
DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_X_COUNT /;"	d
DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_X_COUNT /;"	d
DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_X_COUNT /;"	d
DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_X_COUNT /;"	d
DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_X_COUNT /;"	d
DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_X_COUNT /;"	d
DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_X_MODIFY /;"	d
DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_X_MODIFY /;"	d
DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_X_MODIFY /;"	d
DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_X_MODIFY /;"	d
DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_X_MODIFY /;"	d
DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_X_MODIFY /;"	d
DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_Y_COUNT /;"	d
DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_Y_COUNT /;"	d
DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_Y_COUNT /;"	d
DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_Y_COUNT /;"	d
DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_Y_COUNT /;"	d
DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_Y_COUNT /;"	d
DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA17_Y_MODIFY /;"	d
DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA17_Y_MODIFY /;"	d
DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA17_Y_MODIFY /;"	d
DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA17_Y_MODIFY /;"	d
DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA17_Y_MODIFY /;"	d
DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA17_Y_MODIFY /;"	d
DMA18_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_CONFIG /;"	d
DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_CONFIG /;"	d
DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_CONFIG /;"	d
DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_CONFIG /;"	d
DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_CONFIG /;"	d
DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_CONFIG /;"	d
DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_CURR_ADDR /;"	d
DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_CURR_ADDR /;"	d
DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_CURR_ADDR /;"	d
DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_CURR_ADDR /;"	d
DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_CURR_ADDR /;"	d
DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_CURR_ADDR /;"	d
DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_CURR_DESC_PTR /;"	d
DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_CURR_DESC_PTR /;"	d
DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_CURR_DESC_PTR /;"	d
DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_CURR_DESC_PTR /;"	d
DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_CURR_DESC_PTR /;"	d
DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_CURR_DESC_PTR /;"	d
DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_CURR_X_COUNT /;"	d
DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_CURR_X_COUNT /;"	d
DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_CURR_X_COUNT /;"	d
DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_CURR_X_COUNT /;"	d
DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_CURR_X_COUNT /;"	d
DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_CURR_X_COUNT /;"	d
DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_CURR_Y_COUNT /;"	d
DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_CURR_Y_COUNT /;"	d
DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_CURR_Y_COUNT /;"	d
DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_CURR_Y_COUNT /;"	d
DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_CURR_Y_COUNT /;"	d
DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_CURR_Y_COUNT /;"	d
DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_IRQ_STATUS /;"	d
DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_IRQ_STATUS /;"	d
DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_IRQ_STATUS /;"	d
DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_IRQ_STATUS /;"	d
DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_IRQ_STATUS /;"	d
DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_IRQ_STATUS /;"	d
DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_NEXT_DESC_PTR /;"	d
DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_NEXT_DESC_PTR /;"	d
DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_NEXT_DESC_PTR /;"	d
DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_NEXT_DESC_PTR /;"	d
DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_NEXT_DESC_PTR /;"	d
DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_NEXT_DESC_PTR /;"	d
DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_PERIPHERAL_MAP /;"	d
DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_PERIPHERAL_MAP /;"	d
DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_PERIPHERAL_MAP /;"	d
DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_PERIPHERAL_MAP /;"	d
DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_PERIPHERAL_MAP /;"	d
DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_PERIPHERAL_MAP /;"	d
DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_START_ADDR /;"	d
DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_START_ADDR /;"	d
DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_START_ADDR /;"	d
DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_START_ADDR /;"	d
DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_START_ADDR /;"	d
DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_START_ADDR /;"	d
DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_X_COUNT /;"	d
DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_X_COUNT /;"	d
DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_X_COUNT /;"	d
DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_X_COUNT /;"	d
DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_X_COUNT /;"	d
DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_X_COUNT /;"	d
DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_X_MODIFY /;"	d
DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_X_MODIFY /;"	d
DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_X_MODIFY /;"	d
DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_X_MODIFY /;"	d
DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_X_MODIFY /;"	d
DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_X_MODIFY /;"	d
DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_Y_COUNT /;"	d
DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_Y_COUNT /;"	d
DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_Y_COUNT /;"	d
DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_Y_COUNT /;"	d
DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_Y_COUNT /;"	d
DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_Y_COUNT /;"	d
DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA18_Y_MODIFY /;"	d
DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA18_Y_MODIFY /;"	d
DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA18_Y_MODIFY /;"	d
DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA18_Y_MODIFY /;"	d
DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA18_Y_MODIFY /;"	d
DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA18_Y_MODIFY /;"	d
DMA19_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_CONFIG /;"	d
DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_CONFIG /;"	d
DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_CONFIG /;"	d
DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_CONFIG /;"	d
DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_CONFIG /;"	d
DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_CONFIG /;"	d
DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_CURR_ADDR /;"	d
DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_CURR_ADDR /;"	d
DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_CURR_ADDR /;"	d
DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_CURR_ADDR /;"	d
DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_CURR_ADDR /;"	d
DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_CURR_ADDR /;"	d
DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_CURR_DESC_PTR /;"	d
DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_CURR_DESC_PTR /;"	d
DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_CURR_DESC_PTR /;"	d
DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_CURR_DESC_PTR /;"	d
DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_CURR_DESC_PTR /;"	d
DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_CURR_DESC_PTR /;"	d
DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_CURR_X_COUNT /;"	d
DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_CURR_X_COUNT /;"	d
DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_CURR_X_COUNT /;"	d
DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_CURR_X_COUNT /;"	d
DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_CURR_X_COUNT /;"	d
DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_CURR_X_COUNT /;"	d
DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_CURR_Y_COUNT /;"	d
DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_CURR_Y_COUNT /;"	d
DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_CURR_Y_COUNT /;"	d
DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_CURR_Y_COUNT /;"	d
DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_CURR_Y_COUNT /;"	d
DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_CURR_Y_COUNT /;"	d
DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_IRQ_STATUS /;"	d
DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_IRQ_STATUS /;"	d
DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_IRQ_STATUS /;"	d
DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_IRQ_STATUS /;"	d
DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_IRQ_STATUS /;"	d
DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_IRQ_STATUS /;"	d
DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_NEXT_DESC_PTR /;"	d
DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_NEXT_DESC_PTR /;"	d
DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_NEXT_DESC_PTR /;"	d
DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_NEXT_DESC_PTR /;"	d
DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_NEXT_DESC_PTR /;"	d
DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_NEXT_DESC_PTR /;"	d
DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_PERIPHERAL_MAP /;"	d
DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_PERIPHERAL_MAP /;"	d
DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_PERIPHERAL_MAP /;"	d
DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_PERIPHERAL_MAP /;"	d
DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_PERIPHERAL_MAP /;"	d
DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_PERIPHERAL_MAP /;"	d
DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_START_ADDR /;"	d
DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_START_ADDR /;"	d
DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_START_ADDR /;"	d
DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_START_ADDR /;"	d
DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_START_ADDR /;"	d
DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_START_ADDR /;"	d
DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_X_COUNT /;"	d
DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_X_COUNT /;"	d
DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_X_COUNT /;"	d
DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_X_COUNT /;"	d
DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_X_COUNT /;"	d
DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_X_COUNT /;"	d
DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_X_MODIFY /;"	d
DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_X_MODIFY /;"	d
DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_X_MODIFY /;"	d
DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_X_MODIFY /;"	d
DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_X_MODIFY /;"	d
DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_X_MODIFY /;"	d
DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_Y_COUNT /;"	d
DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_Y_COUNT /;"	d
DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_Y_COUNT /;"	d
DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_Y_COUNT /;"	d
DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_Y_COUNT /;"	d
DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_Y_COUNT /;"	d
DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA19_Y_MODIFY /;"	d
DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA19_Y_MODIFY /;"	d
DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA19_Y_MODIFY /;"	d
DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA19_Y_MODIFY /;"	d
DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA19_Y_MODIFY /;"	d
DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA19_Y_MODIFY /;"	d
DMA1CFG	drivers/usb/host/r8a66597.h	/^#define DMA1CFG	/;"	d
DMA1URQ	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DMA1URQ /;"	d
DMA1_0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_CONFIG /;"	d
DMA1_0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_CURR_ADDR /;"	d
DMA1_0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_CURR_DESC_PTR /;"	d
DMA1_0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_CURR_X_COUNT /;"	d
DMA1_0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_CURR_Y_COUNT /;"	d
DMA1_0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_IRQ_STATUS /;"	d
DMA1_0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_NEXT_DESC_PTR /;"	d
DMA1_0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_PERIPHERAL_MAP /;"	d
DMA1_0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_START_ADDR /;"	d
DMA1_0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_X_COUNT /;"	d
DMA1_0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_X_MODIFY /;"	d
DMA1_0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_Y_COUNT /;"	d
DMA1_0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_0_Y_MODIFY /;"	d
DMA1_10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_CONFIG /;"	d
DMA1_10_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_CURR_ADDR /;"	d
DMA1_10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_CURR_DESC_PTR /;"	d
DMA1_10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_CURR_X_COUNT /;"	d
DMA1_10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_CURR_Y_COUNT /;"	d
DMA1_10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_IRQ_STATUS /;"	d
DMA1_10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_NEXT_DESC_PTR /;"	d
DMA1_10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_PERIPHERAL_MAP /;"	d
DMA1_10_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_START_ADDR /;"	d
DMA1_10_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_X_COUNT /;"	d
DMA1_10_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_X_MODIFY /;"	d
DMA1_10_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_Y_COUNT /;"	d
DMA1_10_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_10_Y_MODIFY /;"	d
DMA1_11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_CONFIG /;"	d
DMA1_11_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_CURR_ADDR /;"	d
DMA1_11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_CURR_DESC_PTR /;"	d
DMA1_11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_CURR_X_COUNT /;"	d
DMA1_11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_CURR_Y_COUNT /;"	d
DMA1_11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_IRQ_STATUS /;"	d
DMA1_11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_NEXT_DESC_PTR /;"	d
DMA1_11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_PERIPHERAL_MAP /;"	d
DMA1_11_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_START_ADDR /;"	d
DMA1_11_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_X_COUNT /;"	d
DMA1_11_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_X_MODIFY /;"	d
DMA1_11_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_Y_COUNT /;"	d
DMA1_11_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_11_Y_MODIFY /;"	d
DMA1_1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_CONFIG /;"	d
DMA1_1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_CURR_ADDR /;"	d
DMA1_1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_CURR_DESC_PTR /;"	d
DMA1_1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_CURR_X_COUNT /;"	d
DMA1_1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_CURR_Y_COUNT /;"	d
DMA1_1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_IRQ_STATUS /;"	d
DMA1_1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_NEXT_DESC_PTR /;"	d
DMA1_1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_PERIPHERAL_MAP /;"	d
DMA1_1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_START_ADDR /;"	d
DMA1_1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_X_COUNT /;"	d
DMA1_1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_X_MODIFY /;"	d
DMA1_1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_Y_COUNT /;"	d
DMA1_1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_1_Y_MODIFY /;"	d
DMA1_2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_CONFIG /;"	d
DMA1_2_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_CURR_ADDR /;"	d
DMA1_2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_CURR_DESC_PTR /;"	d
DMA1_2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_CURR_X_COUNT /;"	d
DMA1_2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_CURR_Y_COUNT /;"	d
DMA1_2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_IRQ_STATUS /;"	d
DMA1_2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_NEXT_DESC_PTR /;"	d
DMA1_2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_PERIPHERAL_MAP /;"	d
DMA1_2_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_START_ADDR /;"	d
DMA1_2_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_X_COUNT /;"	d
DMA1_2_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_X_MODIFY /;"	d
DMA1_2_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_Y_COUNT /;"	d
DMA1_2_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_2_Y_MODIFY /;"	d
DMA1_3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_CONFIG /;"	d
DMA1_3_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_CURR_ADDR /;"	d
DMA1_3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_CURR_DESC_PTR /;"	d
DMA1_3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_CURR_X_COUNT /;"	d
DMA1_3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_CURR_Y_COUNT /;"	d
DMA1_3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_IRQ_STATUS /;"	d
DMA1_3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_NEXT_DESC_PTR /;"	d
DMA1_3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_PERIPHERAL_MAP /;"	d
DMA1_3_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_START_ADDR /;"	d
DMA1_3_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_X_COUNT /;"	d
DMA1_3_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_X_MODIFY /;"	d
DMA1_3_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_Y_COUNT /;"	d
DMA1_3_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_3_Y_MODIFY /;"	d
DMA1_4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_CONFIG /;"	d
DMA1_4_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_CURR_ADDR /;"	d
DMA1_4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_CURR_DESC_PTR /;"	d
DMA1_4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_CURR_X_COUNT /;"	d
DMA1_4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_CURR_Y_COUNT /;"	d
DMA1_4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_IRQ_STATUS /;"	d
DMA1_4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_NEXT_DESC_PTR /;"	d
DMA1_4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_PERIPHERAL_MAP /;"	d
DMA1_4_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_START_ADDR /;"	d
DMA1_4_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_X_COUNT /;"	d
DMA1_4_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_X_MODIFY /;"	d
DMA1_4_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_Y_COUNT /;"	d
DMA1_4_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_4_Y_MODIFY /;"	d
DMA1_5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_CONFIG /;"	d
DMA1_5_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_CURR_ADDR /;"	d
DMA1_5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_CURR_DESC_PTR /;"	d
DMA1_5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_CURR_X_COUNT /;"	d
DMA1_5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_CURR_Y_COUNT /;"	d
DMA1_5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_IRQ_STATUS /;"	d
DMA1_5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_NEXT_DESC_PTR /;"	d
DMA1_5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_PERIPHERAL_MAP /;"	d
DMA1_5_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_START_ADDR /;"	d
DMA1_5_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_X_COUNT /;"	d
DMA1_5_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_X_MODIFY /;"	d
DMA1_5_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_Y_COUNT /;"	d
DMA1_5_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_5_Y_MODIFY /;"	d
DMA1_6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_CONFIG /;"	d
DMA1_6_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_CURR_ADDR /;"	d
DMA1_6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_CURR_DESC_PTR /;"	d
DMA1_6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_CURR_X_COUNT /;"	d
DMA1_6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_CURR_Y_COUNT /;"	d
DMA1_6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_IRQ_STATUS /;"	d
DMA1_6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_NEXT_DESC_PTR /;"	d
DMA1_6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_PERIPHERAL_MAP /;"	d
DMA1_6_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_START_ADDR /;"	d
DMA1_6_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_X_COUNT /;"	d
DMA1_6_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_X_MODIFY /;"	d
DMA1_6_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_Y_COUNT /;"	d
DMA1_6_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_6_Y_MODIFY /;"	d
DMA1_7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_CONFIG /;"	d
DMA1_7_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_CURR_ADDR /;"	d
DMA1_7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_CURR_DESC_PTR /;"	d
DMA1_7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_CURR_X_COUNT /;"	d
DMA1_7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_CURR_Y_COUNT /;"	d
DMA1_7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_IRQ_STATUS /;"	d
DMA1_7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_NEXT_DESC_PTR /;"	d
DMA1_7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_PERIPHERAL_MAP /;"	d
DMA1_7_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_START_ADDR /;"	d
DMA1_7_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_X_COUNT /;"	d
DMA1_7_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_X_MODIFY /;"	d
DMA1_7_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_Y_COUNT /;"	d
DMA1_7_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_7_Y_MODIFY /;"	d
DMA1_8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_CONFIG /;"	d
DMA1_8_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_CURR_ADDR /;"	d
DMA1_8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_CURR_DESC_PTR /;"	d
DMA1_8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_CURR_X_COUNT /;"	d
DMA1_8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_CURR_Y_COUNT /;"	d
DMA1_8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_IRQ_STATUS /;"	d
DMA1_8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_NEXT_DESC_PTR /;"	d
DMA1_8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_PERIPHERAL_MAP /;"	d
DMA1_8_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_START_ADDR /;"	d
DMA1_8_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_X_COUNT /;"	d
DMA1_8_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_X_MODIFY /;"	d
DMA1_8_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_Y_COUNT /;"	d
DMA1_8_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_8_Y_MODIFY /;"	d
DMA1_9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_CONFIG /;"	d
DMA1_9_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_CURR_ADDR /;"	d
DMA1_9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_CURR_DESC_PTR /;"	d
DMA1_9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_CURR_X_COUNT /;"	d
DMA1_9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_CURR_Y_COUNT /;"	d
DMA1_9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_IRQ_STATUS /;"	d
DMA1_9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_NEXT_DESC_PTR /;"	d
DMA1_9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_PERIPHERAL_MAP /;"	d
DMA1_9_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_START_ADDR /;"	d
DMA1_9_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_X_COUNT /;"	d
DMA1_9_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_X_MODIFY /;"	d
DMA1_9_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_Y_COUNT /;"	d
DMA1_9_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_9_Y_MODIFY /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_CONFIG /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_CURR_ADDR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_CURR_DESC_PTR /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_CURR_X_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_CURR_Y_COUNT /;"	d
DMA1_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA1_INT	/;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_IRQ_STATUS /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_NEXT_DESC_PTR /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_PERIPHERAL_MAP /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_START_ADDR /;"	d
DMA1_TC_CNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_TC_CNT /;"	d
DMA1_TC_CNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_TC_CNT /;"	d
DMA1_TC_PER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_TC_PER /;"	d
DMA1_TC_PER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA1_TC_PER /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_X_COUNT /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_X_MODIFY /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_Y_COUNT /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA1_Y_MODIFY /;"	d
DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_CONFIG /;"	d
DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_CONFIG /;"	d
DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_CONFIG /;"	d
DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_CONFIG /;"	d
DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_CONFIG /;"	d
DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_CURR_ADDR /;"	d
DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_CURR_ADDR /;"	d
DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_CURR_ADDR /;"	d
DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_CURR_ADDR /;"	d
DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_CURR_ADDR /;"	d
DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_CURR_DESC_PTR /;"	d
DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_CURR_DESC_PTR /;"	d
DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_CURR_DESC_PTR /;"	d
DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_CURR_DESC_PTR /;"	d
DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_CURR_DESC_PTR /;"	d
DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_CURR_X_COUNT /;"	d
DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_CURR_X_COUNT /;"	d
DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_CURR_X_COUNT /;"	d
DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_CURR_X_COUNT /;"	d
DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_CURR_X_COUNT /;"	d
DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_CURR_Y_COUNT /;"	d
DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_CURR_Y_COUNT /;"	d
DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_CURR_Y_COUNT /;"	d
DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_CURR_Y_COUNT /;"	d
DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_CURR_Y_COUNT /;"	d
DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_IRQ_STATUS /;"	d
DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_IRQ_STATUS /;"	d
DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_IRQ_STATUS /;"	d
DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_IRQ_STATUS /;"	d
DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_IRQ_STATUS /;"	d
DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_NEXT_DESC_PTR /;"	d
DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_NEXT_DESC_PTR /;"	d
DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_NEXT_DESC_PTR /;"	d
DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_NEXT_DESC_PTR /;"	d
DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_NEXT_DESC_PTR /;"	d
DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_PERIPHERAL_MAP /;"	d
DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_PERIPHERAL_MAP /;"	d
DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_PERIPHERAL_MAP /;"	d
DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_PERIPHERAL_MAP /;"	d
DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_PERIPHERAL_MAP /;"	d
DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_START_ADDR /;"	d
DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_START_ADDR /;"	d
DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_START_ADDR /;"	d
DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_START_ADDR /;"	d
DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_START_ADDR /;"	d
DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_X_COUNT /;"	d
DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_X_COUNT /;"	d
DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_X_COUNT /;"	d
DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_X_COUNT /;"	d
DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_X_COUNT /;"	d
DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_X_MODIFY /;"	d
DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_X_MODIFY /;"	d
DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_X_MODIFY /;"	d
DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_X_MODIFY /;"	d
DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_X_MODIFY /;"	d
DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_Y_COUNT /;"	d
DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_Y_COUNT /;"	d
DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_Y_COUNT /;"	d
DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_Y_COUNT /;"	d
DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_Y_COUNT /;"	d
DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA20_Y_MODIFY /;"	d
DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA20_Y_MODIFY /;"	d
DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA20_Y_MODIFY /;"	d
DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA20_Y_MODIFY /;"	d
DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA20_Y_MODIFY /;"	d
DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_CONFIG /;"	d
DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_CONFIG /;"	d
DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_CONFIG /;"	d
DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_CONFIG /;"	d
DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_CONFIG /;"	d
DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_CURR_ADDR /;"	d
DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_CURR_ADDR /;"	d
DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_CURR_ADDR /;"	d
DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_CURR_ADDR /;"	d
DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_CURR_ADDR /;"	d
DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_CURR_DESC_PTR /;"	d
DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_CURR_DESC_PTR /;"	d
DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_CURR_DESC_PTR /;"	d
DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_CURR_DESC_PTR /;"	d
DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_CURR_DESC_PTR /;"	d
DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_CURR_X_COUNT /;"	d
DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_CURR_X_COUNT /;"	d
DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_CURR_X_COUNT /;"	d
DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_CURR_X_COUNT /;"	d
DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_CURR_X_COUNT /;"	d
DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_CURR_Y_COUNT /;"	d
DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_CURR_Y_COUNT /;"	d
DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_CURR_Y_COUNT /;"	d
DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_CURR_Y_COUNT /;"	d
DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_CURR_Y_COUNT /;"	d
DMA21_DSCPTR_NXT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA21_DSCPTR_NXT /;"	d
DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_IRQ_STATUS /;"	d
DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_IRQ_STATUS /;"	d
DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_IRQ_STATUS /;"	d
DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_IRQ_STATUS /;"	d
DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_IRQ_STATUS /;"	d
DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_NEXT_DESC_PTR /;"	d
DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_NEXT_DESC_PTR /;"	d
DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_NEXT_DESC_PTR /;"	d
DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_NEXT_DESC_PTR /;"	d
DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_NEXT_DESC_PTR /;"	d
DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_PERIPHERAL_MAP /;"	d
DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_PERIPHERAL_MAP /;"	d
DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_PERIPHERAL_MAP /;"	d
DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_PERIPHERAL_MAP /;"	d
DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_PERIPHERAL_MAP /;"	d
DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_START_ADDR /;"	d
DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_START_ADDR /;"	d
DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_START_ADDR /;"	d
DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_START_ADDR /;"	d
DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_START_ADDR /;"	d
DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_X_COUNT /;"	d
DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_X_COUNT /;"	d
DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_X_COUNT /;"	d
DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_X_COUNT /;"	d
DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_X_COUNT /;"	d
DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_X_MODIFY /;"	d
DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_X_MODIFY /;"	d
DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_X_MODIFY /;"	d
DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_X_MODIFY /;"	d
DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_X_MODIFY /;"	d
DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_Y_COUNT /;"	d
DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_Y_COUNT /;"	d
DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_Y_COUNT /;"	d
DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_Y_COUNT /;"	d
DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_Y_COUNT /;"	d
DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA21_Y_MODIFY /;"	d
DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA21_Y_MODIFY /;"	d
DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA21_Y_MODIFY /;"	d
DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA21_Y_MODIFY /;"	d
DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA21_Y_MODIFY /;"	d
DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_CONFIG /;"	d
DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_CONFIG /;"	d
DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_CONFIG /;"	d
DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_CONFIG /;"	d
DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_CONFIG /;"	d
DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_CURR_ADDR /;"	d
DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_CURR_ADDR /;"	d
DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_CURR_ADDR /;"	d
DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_CURR_ADDR /;"	d
DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_CURR_ADDR /;"	d
DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_CURR_DESC_PTR /;"	d
DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_CURR_DESC_PTR /;"	d
DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_CURR_DESC_PTR /;"	d
DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_CURR_DESC_PTR /;"	d
DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_CURR_DESC_PTR /;"	d
DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_CURR_X_COUNT /;"	d
DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_CURR_X_COUNT /;"	d
DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_CURR_X_COUNT /;"	d
DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_CURR_X_COUNT /;"	d
DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_CURR_X_COUNT /;"	d
DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_CURR_Y_COUNT /;"	d
DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_CURR_Y_COUNT /;"	d
DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_CURR_Y_COUNT /;"	d
DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_CURR_Y_COUNT /;"	d
DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_CURR_Y_COUNT /;"	d
DMA22_DSCPTR_NXT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMA22_DSCPTR_NXT /;"	d
DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_IRQ_STATUS /;"	d
DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_IRQ_STATUS /;"	d
DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_IRQ_STATUS /;"	d
DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_IRQ_STATUS /;"	d
DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_IRQ_STATUS /;"	d
DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_NEXT_DESC_PTR /;"	d
DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_NEXT_DESC_PTR /;"	d
DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_NEXT_DESC_PTR /;"	d
DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_NEXT_DESC_PTR /;"	d
DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_NEXT_DESC_PTR /;"	d
DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_PERIPHERAL_MAP /;"	d
DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_PERIPHERAL_MAP /;"	d
DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_PERIPHERAL_MAP /;"	d
DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_PERIPHERAL_MAP /;"	d
DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_PERIPHERAL_MAP /;"	d
DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_START_ADDR /;"	d
DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_START_ADDR /;"	d
DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_START_ADDR /;"	d
DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_START_ADDR /;"	d
DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_START_ADDR /;"	d
DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_X_COUNT /;"	d
DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_X_COUNT /;"	d
DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_X_COUNT /;"	d
DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_X_COUNT /;"	d
DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_X_COUNT /;"	d
DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_X_MODIFY /;"	d
DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_X_MODIFY /;"	d
DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_X_MODIFY /;"	d
DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_X_MODIFY /;"	d
DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_X_MODIFY /;"	d
DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_Y_COUNT /;"	d
DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_Y_COUNT /;"	d
DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_Y_COUNT /;"	d
DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_Y_COUNT /;"	d
DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_Y_COUNT /;"	d
DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA22_Y_MODIFY /;"	d
DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA22_Y_MODIFY /;"	d
DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA22_Y_MODIFY /;"	d
DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA22_Y_MODIFY /;"	d
DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA22_Y_MODIFY /;"	d
DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_CONFIG /;"	d
DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_CONFIG /;"	d
DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_CONFIG /;"	d
DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_CONFIG /;"	d
DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_CONFIG /;"	d
DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_CURR_ADDR /;"	d
DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_CURR_ADDR /;"	d
DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_CURR_ADDR /;"	d
DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_CURR_ADDR /;"	d
DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_CURR_ADDR /;"	d
DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_CURR_DESC_PTR /;"	d
DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_CURR_DESC_PTR /;"	d
DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_CURR_DESC_PTR /;"	d
DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_CURR_DESC_PTR /;"	d
DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_CURR_DESC_PTR /;"	d
DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_CURR_X_COUNT /;"	d
DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_CURR_X_COUNT /;"	d
DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_CURR_X_COUNT /;"	d
DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_CURR_X_COUNT /;"	d
DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_CURR_X_COUNT /;"	d
DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_CURR_Y_COUNT /;"	d
DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_CURR_Y_COUNT /;"	d
DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_CURR_Y_COUNT /;"	d
DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_CURR_Y_COUNT /;"	d
DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_CURR_Y_COUNT /;"	d
DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_IRQ_STATUS /;"	d
DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_IRQ_STATUS /;"	d
DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_IRQ_STATUS /;"	d
DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_IRQ_STATUS /;"	d
DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_IRQ_STATUS /;"	d
DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_NEXT_DESC_PTR /;"	d
DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_NEXT_DESC_PTR /;"	d
DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_NEXT_DESC_PTR /;"	d
DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_NEXT_DESC_PTR /;"	d
DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_NEXT_DESC_PTR /;"	d
DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_PERIPHERAL_MAP /;"	d
DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_PERIPHERAL_MAP /;"	d
DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_PERIPHERAL_MAP /;"	d
DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_PERIPHERAL_MAP /;"	d
DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_PERIPHERAL_MAP /;"	d
DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_START_ADDR /;"	d
DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_START_ADDR /;"	d
DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_START_ADDR /;"	d
DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_START_ADDR /;"	d
DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_START_ADDR /;"	d
DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_X_COUNT /;"	d
DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_X_COUNT /;"	d
DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_X_COUNT /;"	d
DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_X_COUNT /;"	d
DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_X_COUNT /;"	d
DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_X_MODIFY /;"	d
DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_X_MODIFY /;"	d
DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_X_MODIFY /;"	d
DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_X_MODIFY /;"	d
DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_X_MODIFY /;"	d
DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_Y_COUNT /;"	d
DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_Y_COUNT /;"	d
DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_Y_COUNT /;"	d
DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_Y_COUNT /;"	d
DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_Y_COUNT /;"	d
DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA23_Y_MODIFY /;"	d
DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA23_Y_MODIFY /;"	d
DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA23_Y_MODIFY /;"	d
DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA23_Y_MODIFY /;"	d
DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA23_Y_MODIFY /;"	d
DMA2D	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA2D	/;"	d
DMA2D_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA2D_P	/;"	d
DMA2_0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_CONFIG /;"	d
DMA2_0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_CURR_ADDR /;"	d
DMA2_0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_CURR_DESC_PTR /;"	d
DMA2_0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_CURR_X_COUNT /;"	d
DMA2_0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_CURR_Y_COUNT /;"	d
DMA2_0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_IRQ_STATUS /;"	d
DMA2_0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_NEXT_DESC_PTR /;"	d
DMA2_0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_PERIPHERAL_MAP /;"	d
DMA2_0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_START_ADDR /;"	d
DMA2_0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_X_COUNT /;"	d
DMA2_0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_X_MODIFY /;"	d
DMA2_0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_Y_COUNT /;"	d
DMA2_0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_0_Y_MODIFY /;"	d
DMA2_10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_CONFIG /;"	d
DMA2_10_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_CURR_ADDR /;"	d
DMA2_10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_CURR_DESC_PTR /;"	d
DMA2_10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_CURR_X_COUNT /;"	d
DMA2_10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_CURR_Y_COUNT /;"	d
DMA2_10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_IRQ_STATUS /;"	d
DMA2_10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_NEXT_DESC_PTR /;"	d
DMA2_10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_PERIPHERAL_MAP /;"	d
DMA2_10_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_START_ADDR /;"	d
DMA2_10_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_X_COUNT /;"	d
DMA2_10_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_X_MODIFY /;"	d
DMA2_10_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_Y_COUNT /;"	d
DMA2_10_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_10_Y_MODIFY /;"	d
DMA2_11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_CONFIG /;"	d
DMA2_11_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_CURR_ADDR /;"	d
DMA2_11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_CURR_DESC_PTR /;"	d
DMA2_11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_CURR_X_COUNT /;"	d
DMA2_11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_CURR_Y_COUNT /;"	d
DMA2_11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_IRQ_STATUS /;"	d
DMA2_11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_NEXT_DESC_PTR /;"	d
DMA2_11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_PERIPHERAL_MAP /;"	d
DMA2_11_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_START_ADDR /;"	d
DMA2_11_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_X_COUNT /;"	d
DMA2_11_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_X_MODIFY /;"	d
DMA2_11_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_Y_COUNT /;"	d
DMA2_11_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_11_Y_MODIFY /;"	d
DMA2_1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_CONFIG /;"	d
DMA2_1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_CURR_ADDR /;"	d
DMA2_1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_CURR_DESC_PTR /;"	d
DMA2_1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_CURR_X_COUNT /;"	d
DMA2_1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_CURR_Y_COUNT /;"	d
DMA2_1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_IRQ_STATUS /;"	d
DMA2_1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_NEXT_DESC_PTR /;"	d
DMA2_1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_PERIPHERAL_MAP /;"	d
DMA2_1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_START_ADDR /;"	d
DMA2_1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_X_COUNT /;"	d
DMA2_1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_X_MODIFY /;"	d
DMA2_1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_Y_COUNT /;"	d
DMA2_1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_1_Y_MODIFY /;"	d
DMA2_2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_CONFIG /;"	d
DMA2_2_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_CURR_ADDR /;"	d
DMA2_2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_CURR_DESC_PTR /;"	d
DMA2_2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_CURR_X_COUNT /;"	d
DMA2_2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_CURR_Y_COUNT /;"	d
DMA2_2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_IRQ_STATUS /;"	d
DMA2_2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_NEXT_DESC_PTR /;"	d
DMA2_2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_PERIPHERAL_MAP /;"	d
DMA2_2_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_START_ADDR /;"	d
DMA2_2_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_X_COUNT /;"	d
DMA2_2_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_X_MODIFY /;"	d
DMA2_2_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_Y_COUNT /;"	d
DMA2_2_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_2_Y_MODIFY /;"	d
DMA2_3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_CONFIG /;"	d
DMA2_3_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_CURR_ADDR /;"	d
DMA2_3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_CURR_DESC_PTR /;"	d
DMA2_3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_CURR_X_COUNT /;"	d
DMA2_3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_CURR_Y_COUNT /;"	d
DMA2_3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_IRQ_STATUS /;"	d
DMA2_3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_NEXT_DESC_PTR /;"	d
DMA2_3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_PERIPHERAL_MAP /;"	d
DMA2_3_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_START_ADDR /;"	d
DMA2_3_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_X_COUNT /;"	d
DMA2_3_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_X_MODIFY /;"	d
DMA2_3_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_Y_COUNT /;"	d
DMA2_3_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_3_Y_MODIFY /;"	d
DMA2_4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_CONFIG /;"	d
DMA2_4_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_CURR_ADDR /;"	d
DMA2_4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_CURR_DESC_PTR /;"	d
DMA2_4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_CURR_X_COUNT /;"	d
DMA2_4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_CURR_Y_COUNT /;"	d
DMA2_4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_IRQ_STATUS /;"	d
DMA2_4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_NEXT_DESC_PTR /;"	d
DMA2_4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_PERIPHERAL_MAP /;"	d
DMA2_4_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_START_ADDR /;"	d
DMA2_4_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_X_COUNT /;"	d
DMA2_4_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_X_MODIFY /;"	d
DMA2_4_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_Y_COUNT /;"	d
DMA2_4_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_4_Y_MODIFY /;"	d
DMA2_5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_CONFIG /;"	d
DMA2_5_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_CURR_ADDR /;"	d
DMA2_5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_CURR_DESC_PTR /;"	d
DMA2_5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_CURR_X_COUNT /;"	d
DMA2_5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_CURR_Y_COUNT /;"	d
DMA2_5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_IRQ_STATUS /;"	d
DMA2_5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_NEXT_DESC_PTR /;"	d
DMA2_5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_PERIPHERAL_MAP /;"	d
DMA2_5_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_START_ADDR /;"	d
DMA2_5_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_X_COUNT /;"	d
DMA2_5_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_X_MODIFY /;"	d
DMA2_5_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_Y_COUNT /;"	d
DMA2_5_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_5_Y_MODIFY /;"	d
DMA2_6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_CONFIG /;"	d
DMA2_6_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_CURR_ADDR /;"	d
DMA2_6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_CURR_DESC_PTR /;"	d
DMA2_6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_CURR_X_COUNT /;"	d
DMA2_6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_CURR_Y_COUNT /;"	d
DMA2_6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_IRQ_STATUS /;"	d
DMA2_6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_NEXT_DESC_PTR /;"	d
DMA2_6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_PERIPHERAL_MAP /;"	d
DMA2_6_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_START_ADDR /;"	d
DMA2_6_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_X_COUNT /;"	d
DMA2_6_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_X_MODIFY /;"	d
DMA2_6_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_Y_COUNT /;"	d
DMA2_6_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_6_Y_MODIFY /;"	d
DMA2_7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_CONFIG /;"	d
DMA2_7_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_CURR_ADDR /;"	d
DMA2_7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_CURR_DESC_PTR /;"	d
DMA2_7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_CURR_X_COUNT /;"	d
DMA2_7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_CURR_Y_COUNT /;"	d
DMA2_7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_IRQ_STATUS /;"	d
DMA2_7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_NEXT_DESC_PTR /;"	d
DMA2_7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_PERIPHERAL_MAP /;"	d
DMA2_7_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_START_ADDR /;"	d
DMA2_7_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_X_COUNT /;"	d
DMA2_7_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_X_MODIFY /;"	d
DMA2_7_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_Y_COUNT /;"	d
DMA2_7_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_7_Y_MODIFY /;"	d
DMA2_8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_CONFIG /;"	d
DMA2_8_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_CURR_ADDR /;"	d
DMA2_8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_CURR_DESC_PTR /;"	d
DMA2_8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_CURR_X_COUNT /;"	d
DMA2_8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_CURR_Y_COUNT /;"	d
DMA2_8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_IRQ_STATUS /;"	d
DMA2_8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_NEXT_DESC_PTR /;"	d
DMA2_8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_PERIPHERAL_MAP /;"	d
DMA2_8_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_START_ADDR /;"	d
DMA2_8_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_X_COUNT /;"	d
DMA2_8_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_X_MODIFY /;"	d
DMA2_8_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_Y_COUNT /;"	d
DMA2_8_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_8_Y_MODIFY /;"	d
DMA2_9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_CONFIG /;"	d
DMA2_9_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_CURR_ADDR /;"	d
DMA2_9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_CURR_DESC_PTR /;"	d
DMA2_9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_CURR_X_COUNT /;"	d
DMA2_9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_CURR_Y_COUNT /;"	d
DMA2_9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_IRQ_STATUS /;"	d
DMA2_9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_NEXT_DESC_PTR /;"	d
DMA2_9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_PERIPHERAL_MAP /;"	d
DMA2_9_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_START_ADDR /;"	d
DMA2_9_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_X_COUNT /;"	d
DMA2_9_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_X_MODIFY /;"	d
DMA2_9_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_Y_COUNT /;"	d
DMA2_9_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_9_Y_MODIFY /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_CONFIG /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_CURR_ADDR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_CURR_DESC_PTR /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_CURR_X_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_CURR_Y_COUNT /;"	d
DMA2_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA2_INT	/;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_IRQ_STATUS /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_NEXT_DESC_PTR /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_PERIPHERAL_MAP /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_START_ADDR /;"	d
DMA2_TC_CNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_TC_CNT /;"	d
DMA2_TC_PER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define DMA2_TC_PER /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_X_COUNT /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_X_MODIFY /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_Y_COUNT /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA2_Y_MODIFY /;"	d
DMA32	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define DMA32	/;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_CONFIG /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_CURR_ADDR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_CURR_DESC_PTR /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_CURR_X_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_CURR_Y_COUNT /;"	d
DMA3_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA3_INT	/;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_IRQ_STATUS /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_NEXT_DESC_PTR /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_PERIPHERAL_MAP /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_START_ADDR /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_X_COUNT /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_X_MODIFY /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_Y_COUNT /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA3_Y_MODIFY /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_CONFIG /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_CURR_ADDR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_CURR_DESC_PTR /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_CURR_X_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_CURR_Y_COUNT /;"	d
DMA4_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA4_INT	/;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_IRQ_STATUS /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_NEXT_DESC_PTR /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_PERIPHERAL_MAP /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_START_ADDR /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_X_COUNT /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_X_MODIFY /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_Y_COUNT /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA4_Y_MODIFY /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_CONFIG /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_CURR_ADDR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_CURR_DESC_PTR /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_CURR_X_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_CURR_Y_COUNT /;"	d
DMA5_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA5_INT	/;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_IRQ_STATUS /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_NEXT_DESC_PTR /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_PERIPHERAL_MAP /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_START_ADDR /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_X_COUNT /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_X_MODIFY /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_Y_COUNT /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA5_Y_MODIFY /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_CONFIG /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_CURR_ADDR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_CURR_DESC_PTR /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_CURR_X_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_CURR_Y_COUNT /;"	d
DMA6_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA6_INT	/;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_IRQ_STATUS /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_NEXT_DESC_PTR /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_PERIPHERAL_MAP /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_START_ADDR /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_X_COUNT /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_X_MODIFY /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_Y_COUNT /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA6_Y_MODIFY /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_CONFIG /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_CURR_ADDR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_CURR_DESC_PTR /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_CURR_X_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_CURR_Y_COUNT /;"	d
DMA7_INT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA7_INT	/;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_IRQ_STATUS /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_NEXT_DESC_PTR /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_PERIPHERAL_MAP /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_START_ADDR /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_X_COUNT /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_X_MODIFY /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_Y_COUNT /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA7_Y_MODIFY /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_CONFIG /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_CURR_ADDR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_CURR_DESC_PTR /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_CURR_X_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_CURR_Y_COUNT /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_IRQ_STATUS /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_NEXT_DESC_PTR /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_PERIPHERAL_MAP /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_START_ADDR /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_X_COUNT /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_X_MODIFY /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_Y_COUNT /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA8_Y_MODIFY /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_CONFIG /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_CURR_ADDR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_CURR_DESC_PTR /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_CURR_X_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_CURR_Y_COUNT /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_IRQ_STATUS /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_NEXT_DESC_PTR /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_PERIPHERAL_MAP /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_START_ADDR /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_X_COUNT /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_X_MODIFY /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_Y_COUNT /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMA9_Y_MODIFY /;"	d
DMAADR	arch/powerpc/include/asm/ppc405.h	/^#define DMAADR	/;"	d
DMAALIGN	drivers/net/xilinx_axi_emac.c	/^#define DMAALIGN	/;"	d	file:
DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMAC0_TCCNT /;"	d
DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMAC0_TCCNT /;"	d
DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMAC0_TCCNT /;"	d
DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMAC0_TCCNT /;"	d
DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMAC0_TCCNT /;"	d
DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMAC0_TCPER /;"	d
DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMAC0_TCPER /;"	d
DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMAC0_TCPER /;"	d
DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMAC0_TCPER /;"	d
DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMAC0_TCPER /;"	d
DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMAC1_PERIMUX /;"	d
DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMAC1_PERIMUX /;"	d
DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMAC1_PERIMUX /;"	d
DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMAC1_PERIMUX /;"	d
DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMAC1_PERIMUX /;"	d
DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMAC1_TCCNT /;"	d
DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMAC1_TCCNT /;"	d
DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMAC1_TCCNT /;"	d
DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMAC1_TCCNT /;"	d
DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMAC1_TCCNT /;"	d
DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define DMAC1_TCPER /;"	d
DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define DMAC1_TCPER /;"	d
DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define DMAC1_TCPER /;"	d
DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define DMAC1_TCPER /;"	d
DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define DMAC1_TCPER /;"	d
DMACFG	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define DMACFG /;"	d
DMACR	arch/sh/include/asm/cpu_sh7722.h	/^#define DMACR /;"	d
DMACR	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMACR	/;"	d
DMACR0	arch/powerpc/include/asm/ppc405.h	/^#define DMACR0	/;"	d
DMACR1	arch/powerpc/include/asm/ppc405.h	/^#define DMACR1	/;"	d
DMACR2	arch/powerpc/include/asm/ppc405.h	/^#define DMACR2	/;"	d
DMACR3	arch/powerpc/include/asm/ppc405.h	/^#define DMACR3	/;"	d
DMACR_BURST	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DMACR_BURST /;"	d
DMACR_HM	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DMACR_HM(/;"	d
DMACR_TM	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DMACR_TM(/;"	d
DMACT0	arch/powerpc/include/asm/ppc405.h	/^#define DMACT0	/;"	d
DMACT1	arch/powerpc/include/asm/ppc405.h	/^#define DMACT1	/;"	d
DMACT2	arch/powerpc/include/asm/ppc405.h	/^#define DMACT2	/;"	d
DMACT3	arch/powerpc/include/asm/ppc405.h	/^#define DMACT3	/;"	d
DMACTRL_ABORT	include/usb/fotg210.h	/^#define DMACTRL_ABORT /;"	d
DMACTRL_CLRFF	include/usb/fotg210.h	/^#define DMACTRL_CLRFF /;"	d
DMACTRL_FIFO2MEM	include/usb/fotg210.h	/^#define DMACTRL_FIFO2MEM /;"	d
DMACTRL_GRS	include/tsec.h	/^#define DMACTRL_GRS	/;"	d
DMACTRL_GTS	include/tsec.h	/^#define DMACTRL_GTS	/;"	d
DMACTRL_INIT_SETTINGS	include/tsec.h	/^#define DMACTRL_INIT_SETTINGS	/;"	d
DMACTRL_IO2IO	include/usb/fotg210.h	/^#define DMACTRL_IO2IO /;"	d
DMACTRL_LE	include/tsec.h	/^#define DMACTRL_LE	/;"	d
DMACTRL_LEN	include/usb/fotg210.h	/^#define DMACTRL_LEN(/;"	d
DMACTRL_LEN_SHIFT	include/usb/fotg210.h	/^#define DMACTRL_LEN_SHIFT /;"	d
DMACTRL_MEM2FIFO	include/usb/fotg210.h	/^#define DMACTRL_MEM2FIFO /;"	d
DMACTRL_START	include/usb/fotg210.h	/^#define DMACTRL_START /;"	d
DMAC_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define DMAC_BASE	/;"	d
DMAC_CHAN_DEST_AHB1	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_DEST_AHB1	/;"	d
DMAC_CHAN_DEST_AUTOINC	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_DEST_AUTOINC	/;"	d
DMAC_CHAN_DEST_BURST_1	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_DEST_BURST_1	/;"	d
DMAC_CHAN_DEST_BURST_4	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_DEST_BURST_4	/;"	d
DMAC_CHAN_DEST_WIDTH_32	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_DEST_WIDTH_32	/;"	d
DMAC_CHAN_ENABLE	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_ENABLE	/;"	d
DMAC_CHAN_FLOW_D_M2P	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_FLOW_D_M2P	/;"	d
DMAC_CHAN_FLOW_D_P2M	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_FLOW_D_P2M	/;"	d
DMAC_CHAN_INT_TC_EN	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_INT_TC_EN	/;"	d
DMAC_CHAN_SRC_AUTOINC	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_SRC_AUTOINC	/;"	d
DMAC_CHAN_SRC_BURST_1	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_SRC_BURST_1	/;"	d
DMAC_CHAN_SRC_BURST_4	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_SRC_BURST_4	/;"	d
DMAC_CHAN_SRC_WIDTH_32	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_CHAN_SRC_WIDTH_32	/;"	d
DMAC_CHCR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR0	/;"	d
DMAC_CHCR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR1	/;"	d
DMAC_CHCR10	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR10	/;"	d
DMAC_CHCR11	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR11	/;"	d
DMAC_CHCR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR2	/;"	d
DMAC_CHCR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR3	/;"	d
DMAC_CHCR4	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR4	/;"	d
DMAC_CHCR5	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR5	/;"	d
DMAC_CHCR6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR6	/;"	d
DMAC_CHCR7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR7	/;"	d
DMAC_CHCR8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR8	/;"	d
DMAC_CHCR9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_CHCR9	/;"	d
DMAC_CTRL_ENABLE	drivers/dma/lpc32xx_dma.c	/^#define DMAC_CTRL_ENABLE	/;"	d	file:
DMAC_DAR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR0	/;"	d
DMAC_DAR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR1	/;"	d
DMAC_DAR10	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR10	/;"	d
DMAC_DAR11	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR11	/;"	d
DMAC_DAR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR2	/;"	d
DMAC_DAR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR3	/;"	d
DMAC_DAR4	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR4	/;"	d
DMAC_DAR5	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR5	/;"	d
DMAC_DAR6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR6	/;"	d
DMAC_DAR7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR7	/;"	d
DMAC_DAR8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR8	/;"	d
DMAC_DAR9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DAR9	/;"	d
DMAC_DARB0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB0	/;"	d
DMAC_DARB1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB1	/;"	d
DMAC_DARB2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB2	/;"	d
DMAC_DARB3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB3	/;"	d
DMAC_DARB6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB6	/;"	d
DMAC_DARB7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB7	/;"	d
DMAC_DARB8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB8	/;"	d
DMAC_DARB9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DARB9	/;"	d
DMAC_DEST_PERIP	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_DEST_PERIP(/;"	d
DMAC_DMAOR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DMAOR0	/;"	d
DMAC_DMAOR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DMAOR1	/;"	d
DMAC_DMARS0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DMARS0	/;"	d
DMAC_DMARS1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DMARS1	/;"	d
DMAC_DMARS2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_DMARS2	/;"	d
DMAC_IM_BIT	drivers/net/sh_eth.h	/^enum DMAC_IM_BIT {$/;"	g
DMAC_M_ADF	drivers/net/sh_eth.h	/^	DMAC_M_RFRMER = 0x01000000, DMAC_M_ADF = 0x00800000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_BIT	drivers/net/sh_eth.h	/^enum DMAC_M_BIT {$/;"	g
DMAC_M_ECI	drivers/net/sh_eth.h	/^	DMAC_M_ECI = 0x00400000, DMAC_M_FTC = 0x00200000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_FRC	drivers/net/sh_eth.h	/^	DMAC_M_FRC = 0x00040000, DMAC_M_RDE = 0x00020000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_FTC	drivers/net/sh_eth.h	/^	DMAC_M_ECI = 0x00400000, DMAC_M_FTC = 0x00200000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RABT	drivers/net/sh_eth.h	/^	DMAC_M_RABT = 0x02000000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RDE	drivers/net/sh_eth.h	/^	DMAC_M_FRC = 0x00040000, DMAC_M_RDE = 0x00020000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RFE	drivers/net/sh_eth.h	/^	DMAC_M_RFE = 0x00010000, DMAC_M_TINT4 = 0x00000800,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RFRMER	drivers/net/sh_eth.h	/^	DMAC_M_RFRMER = 0x01000000, DMAC_M_ADF = 0x00800000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RINT1	drivers/net/sh_eth.h	/^	DMAC_M_RINT1 = 0x00000001,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RINT2	drivers/net/sh_eth.h	/^	DMAC_M_RINT3 = 0x00000004, DMAC_M_RINT2 = 0x00000002,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RINT3	drivers/net/sh_eth.h	/^	DMAC_M_RINT3 = 0x00000004, DMAC_M_RINT2 = 0x00000002,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RINT4	drivers/net/sh_eth.h	/^	DMAC_M_RINT5 = 0x00000010, DMAC_M_RINT4 = 0x00000008,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RINT5	drivers/net/sh_eth.h	/^	DMAC_M_RINT5 = 0x00000010, DMAC_M_RINT4 = 0x00000008,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_RINT8	drivers/net/sh_eth.h	/^	DMAC_M_TINT1 = 0x00000100, DMAC_M_RINT8 = 0x00000080,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TABT	drivers/net/sh_eth.h	/^	DMAC_M_TWB = 0x40000000, DMAC_M_TABT = 0x04000000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TDE	drivers/net/sh_eth.h	/^	DMAC_M_TDE = 0x00100000, DMAC_M_TFE = 0x00080000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TFE	drivers/net/sh_eth.h	/^	DMAC_M_TDE = 0x00100000, DMAC_M_TFE = 0x00080000,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TINT1	drivers/net/sh_eth.h	/^	DMAC_M_TINT1 = 0x00000100, DMAC_M_RINT8 = 0x00000080,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TINT2	drivers/net/sh_eth.h	/^	DMAC_M_TINT3 = 0x00000400, DMAC_M_TINT2 = 0x00000200,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TINT3	drivers/net/sh_eth.h	/^	DMAC_M_TINT3 = 0x00000400, DMAC_M_TINT2 = 0x00000200,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TINT4	drivers/net/sh_eth.h	/^	DMAC_M_RFE = 0x00010000, DMAC_M_TINT4 = 0x00000800,$/;"	e	enum:DMAC_IM_BIT
DMAC_M_TWB	drivers/net/sh_eth.h	/^	DMAC_M_TWB = 0x40000000, DMAC_M_TABT = 0x04000000,$/;"	e	enum:DMAC_IM_BIT
DMAC_SAR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR0	/;"	d
DMAC_SAR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR1	/;"	d
DMAC_SAR10	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR10	/;"	d
DMAC_SAR11	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR11	/;"	d
DMAC_SAR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR2	/;"	d
DMAC_SAR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR3	/;"	d
DMAC_SAR4	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR4	/;"	d
DMAC_SAR5	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR5	/;"	d
DMAC_SAR6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR6	/;"	d
DMAC_SAR7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR7	/;"	d
DMAC_SAR8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR8	/;"	d
DMAC_SAR9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SAR9	/;"	d
DMAC_SARB0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB0	/;"	d
DMAC_SARB1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB1	/;"	d
DMAC_SARB2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB2	/;"	d
DMAC_SARB3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB3	/;"	d
DMAC_SARB6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB6	/;"	d
DMAC_SARB7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB7	/;"	d
DMAC_SARB8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB8	/;"	d
DMAC_SARB9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_SARB9	/;"	d
DMAC_SRC_PERIP	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMAC_SRC_PERIP(/;"	d
DMAC_TCR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR0	/;"	d
DMAC_TCR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR1	/;"	d
DMAC_TCR10	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR10	/;"	d
DMAC_TCR11	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR11	/;"	d
DMAC_TCR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR2	/;"	d
DMAC_TCR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR3	/;"	d
DMAC_TCR4	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR4	/;"	d
DMAC_TCR5	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR5	/;"	d
DMAC_TCR6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR6	/;"	d
DMAC_TCR7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR7	/;"	d
DMAC_TCR8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR8	/;"	d
DMAC_TCR9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCR9	/;"	d
DMAC_TCRB0	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB0	/;"	d
DMAC_TCRB1	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB1	/;"	d
DMAC_TCRB2	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB2	/;"	d
DMAC_TCRB3	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB3	/;"	d
DMAC_TCRB6	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB6	/;"	d
DMAC_TCRB7	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB7	/;"	d
DMAC_TCRB8	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB8	/;"	d
DMAC_TCRB9	arch/sh/include/asm/cpu_sh7780.h	/^#define	DMAC_TCRB9	/;"	d
DMAC_T_BIT	drivers/net/sh_eth.h	/^enum DMAC_T_BIT {$/;"	g
DMADA0	arch/powerpc/include/asm/ppc405.h	/^#define DMADA0	/;"	d
DMADA1	arch/powerpc/include/asm/ppc405.h	/^#define DMADA1	/;"	d
DMADA2	arch/powerpc/include/asm/ppc405.h	/^#define DMADA2	/;"	d
DMADA3	arch/powerpc/include/asm/ppc405.h	/^#define DMADA3	/;"	d
DMAEN	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMAEN	/;"	d
DMAEN	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAEN	/;"	d
DMAEN_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMAEN_P	/;"	d
DMAEN_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAEN_P	/;"	d
DMAFIFO_CX	include/usb/fotg210.h	/^#define DMAFIFO_CX /;"	d
DMAFIFO_FIFO	include/usb/fotg210.h	/^#define DMAFIFO_FIFO(/;"	d
DMAFLOW	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAFLOW	/;"	d
DMAFLOW_ARRAY	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAFLOW_ARRAY	/;"	d
DMAFLOW_ARRAY_DEMAND	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAFLOW_ARRAY_DEMAND	/;"	d
DMAFLOW_LIST	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAFLOW_LIST	/;"	d
DMAFLOW_LIST_DEMAND	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMAFLOW_LIST_DEMAND	/;"	d
DMAFLX0_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_CURXCOUNT /;"	d
DMAFLX0_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_CURYCOUNT /;"	d
DMAFLX0_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_DMACNFG /;"	d
DMAFLX0_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_IRQSTAT /;"	d
DMAFLX0_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_PMAP /;"	d
DMAFLX0_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_XCOUNT /;"	d
DMAFLX0_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_XMODIFY /;"	d
DMAFLX0_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_YCOUNT /;"	d
DMAFLX0_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX0_YMODIFY /;"	d
DMAFLX1_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_CURXCOUNT /;"	d
DMAFLX1_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_CURYCOUNT /;"	d
DMAFLX1_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_DMACNFG /;"	d
DMAFLX1_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_IRQSTAT /;"	d
DMAFLX1_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_PMAP /;"	d
DMAFLX1_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_XCOUNT /;"	d
DMAFLX1_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_XMODIFY /;"	d
DMAFLX1_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_YCOUNT /;"	d
DMAFLX1_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX1_YMODIFY /;"	d
DMAFLX2_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_CURXCOUNT /;"	d
DMAFLX2_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_CURYCOUNT /;"	d
DMAFLX2_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_DMACNFG /;"	d
DMAFLX2_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_IRQSTAT /;"	d
DMAFLX2_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_PMAP /;"	d
DMAFLX2_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_XCOUNT /;"	d
DMAFLX2_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_XMODIFY /;"	d
DMAFLX2_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_YCOUNT /;"	d
DMAFLX2_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX2_YMODIFY /;"	d
DMAFLX3_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_CURXCOUNT /;"	d
DMAFLX3_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_CURYCOUNT /;"	d
DMAFLX3_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_DMACNFG /;"	d
DMAFLX3_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_IRQSTAT /;"	d
DMAFLX3_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_PMAP /;"	d
DMAFLX3_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_XCOUNT /;"	d
DMAFLX3_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_XMODIFY /;"	d
DMAFLX3_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_YCOUNT /;"	d
DMAFLX3_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX3_YMODIFY /;"	d
DMAFLX4_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_CURXCOUNT /;"	d
DMAFLX4_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_CURYCOUNT /;"	d
DMAFLX4_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_DMACNFG /;"	d
DMAFLX4_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_IRQSTAT /;"	d
DMAFLX4_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_PMAP /;"	d
DMAFLX4_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_XCOUNT /;"	d
DMAFLX4_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_XMODIFY /;"	d
DMAFLX4_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_YCOUNT /;"	d
DMAFLX4_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX4_YMODIFY /;"	d
DMAFLX5_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_CURXCOUNT /;"	d
DMAFLX5_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_CURYCOUNT /;"	d
DMAFLX5_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_DMACNFG /;"	d
DMAFLX5_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_IRQSTAT /;"	d
DMAFLX5_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_PMAP /;"	d
DMAFLX5_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_XCOUNT /;"	d
DMAFLX5_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_XMODIFY /;"	d
DMAFLX5_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_YCOUNT /;"	d
DMAFLX5_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX5_YMODIFY /;"	d
DMAFLX6_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_CURXCOUNT /;"	d
DMAFLX6_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_CURYCOUNT /;"	d
DMAFLX6_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_DMACNFG /;"	d
DMAFLX6_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_IRQSTAT /;"	d
DMAFLX6_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_PMAP /;"	d
DMAFLX6_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_XCOUNT /;"	d
DMAFLX6_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_XMODIFY /;"	d
DMAFLX6_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_YCOUNT /;"	d
DMAFLX6_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX6_YMODIFY /;"	d
DMAFLX7_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_CURXCOUNT /;"	d
DMAFLX7_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_CURYCOUNT /;"	d
DMAFLX7_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_DMACNFG /;"	d
DMAFLX7_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_IRQSTAT /;"	d
DMAFLX7_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_PMAP /;"	d
DMAFLX7_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_XCOUNT /;"	d
DMAFLX7_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_XMODIFY /;"	d
DMAFLX7_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_YCOUNT /;"	d
DMAFLX7_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMAFLX7_YMODIFY /;"	d
DMAIA	arch/sh/include/asm/cpu_sh7722.h	/^#define DMAIA /;"	d
DMAIB	arch/sh/include/asm/cpu_sh7722.h	/^#define DMAIB /;"	d
DMAIF0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF0_RESET	/;"	d
DMAIF1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF1_RESET	/;"	d
DMAIF2_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF2_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF2_RESET	/;"	d
DMAIF3_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF3_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF3_RESET	/;"	d
DMAIF4_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF4_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF4_RESET	/;"	d
DMAIF5_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF5_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF5_RESET	/;"	d
DMAIF6_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF6_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF6_RESET	/;"	d
DMAIF7_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAIF7_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMAIF7_RESET	/;"	d
DMAMAC_SRST	drivers/net/designware.h	/^#define DMAMAC_SRST	/;"	d
DMAMUX0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define DMAMUX0_BASE_ADDR	/;"	d
DMAMUX1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define DMAMUX1_BASE_ADDR	/;"	d
DMAOA	arch/sh/include/asm/cpu_sh7722.h	/^#define DMAOA /;"	d
DMAOB	arch/sh/include/asm/cpu_sh7722.h	/^#define DMAOB /;"	d
DMAOR	arch/sh/include/asm/cpu_sh7722.h	/^#define DMAOR /;"	d
DMAOR	arch/sh/include/asm/cpu_sh7750.h	/^#define DMAOR	/;"	d
DMAREQMODE_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMAREQMODE_R	/;"	d
DMAREQMODE_RH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMAREQMODE_RH	/;"	d
DMAREQMODE_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMAREQMODE_T	/;"	d
DMAREQ_ENA_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMAREQ_ENA_R	/;"	d
DMAREQ_ENA_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMAREQ_ENA_T	/;"	d
DMARS_0	arch/sh/include/asm/cpu_sh7722.h	/^#define DMARS_0 /;"	d
DMARS_1	arch/sh/include/asm/cpu_sh7722.h	/^#define DMARS_1 /;"	d
DMARS_2	arch/sh/include/asm/cpu_sh7722.h	/^#define DMARS_2 /;"	d
DMASA0	arch/powerpc/include/asm/ppc405.h	/^#define DMASA0	/;"	d
DMASA1	arch/powerpc/include/asm/ppc405.h	/^#define DMASA1	/;"	d
DMASA2	arch/powerpc/include/asm/ppc405.h	/^#define DMASA2	/;"	d
DMASA3	arch/powerpc/include/asm/ppc405.h	/^#define DMASA3	/;"	d
DMASB0	arch/powerpc/include/asm/ppc405.h	/^#define DMASB0	/;"	d
DMASB1	arch/powerpc/include/asm/ppc405.h	/^#define DMASB1	/;"	d
DMASB2	arch/powerpc/include/asm/ppc405.h	/^#define DMASB2	/;"	d
DMASB3	arch/powerpc/include/asm/ppc405.h	/^#define DMASB3	/;"	d
DMASGC	arch/powerpc/include/asm/ppc405.h	/^#define DMASGC	/;"	d
DMASK	include/lattice.h	/^#define DMASK	/;"	d
DMASK_DATA	include/lattice.h	/^#define DMASK_DATA	/;"	d
DMASR	arch/powerpc/include/asm/ppc405.h	/^#define DMASR	/;"	d
DMASp	include/SA-1100.h	/^#define DMASp	/;"	d
DMATCR0	arch/sh/include/asm/cpu_sh7750.h	/^#define DMATCR0 /;"	d
DMATCR1	arch/sh/include/asm/cpu_sh7750.h	/^#define DMATCR1 /;"	d
DMATCR2	arch/sh/include/asm/cpu_sh7750.h	/^#define DMATCR2 /;"	d
DMATCR3	arch/sh/include/asm/cpu_sh7750.h	/^#define DMATCR3 /;"	d
DMATCR4	arch/sh/include/asm/cpu_sh7750.h	/^#define DMATCR4 /;"	d
DMA_ADDR_INVALID	drivers/usb/musb-new/musb_dma.h	/^#define	DMA_ADDR_INVALID	/;"	d
DMA_ADDR_T_64BIT	arch/arm/Kconfig	/^config DMA_ADDR_T_64BIT$/;"	c	menu:ARM architecture
DMA_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define DMA_BASE	/;"	d
DMA_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define DMA_BASE	/;"	d
DMA_BIDIRECTIONAL	arch/arm/include/asm/dma-mapping.h	/^	DMA_BIDIRECTIONAL	= 0,$/;"	e	enum:dma_data_direction
DMA_BIDIRECTIONAL	arch/avr32/include/asm/dma-mapping.h	/^	DMA_BIDIRECTIONAL	= 0,$/;"	e	enum:dma_data_direction
DMA_BIDIRECTIONAL	arch/nds32/include/asm/dma-mapping.h	/^	DMA_BIDIRECTIONAL	= 0,$/;"	e	enum:dma_data_direction
DMA_BIDIRECTIONAL	drivers/block/sata_dwc.h	/^	DMA_BIDIRECTIONAL = 0,$/;"	e	enum:dma_data_direction
DMA_BUFFER_SIZE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define DMA_BUFFER_SIZE	/;"	d
DMA_BUS_SIZE	board/bf527-ezkit/video.c	/^#define DMA_BUS_SIZE	/;"	d	file:
DMA_BUS_SIZE	board/bf548-ezkit/video.c	/^#define	DMA_BUS_SIZE	/;"	d	file:
DMA_BUS_SIZE	board/cm-bf548/video.c	/^#define	DMA_BUS_SIZE	/;"	d	file:
DMA_CFG_A_0	drivers/mtd/nand/tegra_nand.h	/^#define DMA_CFG_A_0	/;"	d
DMA_CFG_B_0	drivers/mtd/nand/tegra_nand.h	/^#define DMA_CFG_B_0	/;"	d
DMA_CHANNEL	drivers/block/sata_dwc.c	/^#define DMA_CHANNEL(/;"	d	file:
DMA_CHANNEL_AB	board/amcc/bamboo/bamboo.h	/^			    DMA_CHANNEL_AB,$/;"	e	enum:config_list
DMA_CHANNEL_CD	board/amcc/bamboo/bamboo.h	/^			    DMA_CHANNEL_CD,$/;"	e	enum:config_list
DMA_CMD_RESET	board/micronas/vct/scc.h	/^#define DMA_CMD_RESET	/;"	d
DMA_CMD_SETUP	board/micronas/vct/scc.h	/^#define DMA_CMD_SETUP	/;"	d
DMA_CMD_START	board/micronas/vct/scc.h	/^#define DMA_CMD_START	/;"	d
DMA_CMD_STOP	board/micronas/vct/scc.h	/^#define DMA_CMD_STOP	/;"	d
DMA_CONTROL_PLBED	drivers/net/xilinx_ll_temac_sdma.h	/^#define DMA_CONTROL_PLBED	/;"	d
DMA_CONTROL_REG	drivers/net/xilinx_ll_temac_sdma.h	/^	DMA_CONTROL_REG		\/* DMA Control Register *\/$/;"	e	enum:dmac_ctrl
DMA_CONTROL_RESET	drivers/net/xilinx_ll_temac_sdma.h	/^#define DMA_CONTROL_RESET	/;"	d
DMA_CONTROL_RXOCEID	drivers/net/xilinx_ll_temac_sdma.h	/^#define DMA_CONTROL_RXOCEID	/;"	d
DMA_CONTROL_TPE	drivers/net/xilinx_ll_temac_sdma.h	/^#define DMA_CONTROL_TPE	/;"	d
DMA_CONTROL_TXOCEID	drivers/net/xilinx_ll_temac_sdma.h	/^#define DMA_CONTROL_TXOCEID	/;"	d
DMA_CSTATE	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                DMA_CSTATE /;"	d
DMA_CTRL_PEN	drivers/net/bcm-sf2-eth-gmac.h	/^#define DMA_CTRL_PEN	/;"	d
DMA_CTRL_ROC	drivers/net/bcm-sf2-eth-gmac.h	/^#define DMA_CTRL_ROC	/;"	d
DMA_CYCLIC	board/micronas/vct/scc.h	/^#define DMA_CYCLIC	/;"	d
DMA_DCR_BASE	arch/powerpc/include/asm/ppc405.h	/^#define DMA_DCR_BASE	/;"	d
DMA_DESCRIPTOR	drivers/net/bfin_mac.h	/^} DMA_DESCRIPTOR;$/;"	t	typeref:struct:dma_descriptor
DMA_DESCR_LAST	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_LAST	/;"	d	file:
DMA_DESCR_RX_BAD_FRAME	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_BAD_FRAME	/;"	d	file:
DMA_DESCR_RX_CRC_ERROR	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_CRC_ERROR	/;"	d	file:
DMA_DESCR_RX_DESCR_INT	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_DESCR_INT	/;"	d	file:
DMA_DESCR_RX_EOF	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_EOF	/;"	d	file:
DMA_DESCR_RX_FRAME_IS_TYPE	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_FRAME_IS_TYPE	/;"	d	file:
DMA_DESCR_RX_HASH_MATCH	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_HASH_MATCH	/;"	d	file:
DMA_DESCR_RX_MAX_FRAME_LEN	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_MAX_FRAME_LEN	/;"	d	file:
DMA_DESCR_RX_OVERRUN	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_OVERRUN	/;"	d	file:
DMA_DESCR_RX_OWNER	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_OWNER	/;"	d	file:
DMA_DESCR_RX_SHORT_FRAME	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_SHORT_FRAME	/;"	d	file:
DMA_DESCR_RX_SOF	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_SOF	/;"	d	file:
DMA_DESCR_RX_VTF	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_RX_VTF	/;"	d	file:
DMA_DESCR_TX_CRC	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_CRC	/;"	d	file:
DMA_DESCR_TX_DESCR_INT	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_DESCR_INT	/;"	d	file:
DMA_DESCR_TX_EOF	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_EOF	/;"	d	file:
DMA_DESCR_TX_HUGE	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_HUGE	/;"	d	file:
DMA_DESCR_TX_LATE_COLLISION	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_LATE_COLLISION	/;"	d	file:
DMA_DESCR_TX_OK	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_OK	/;"	d	file:
DMA_DESCR_TX_ONE_COLLISION	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_ONE_COLLISION	/;"	d	file:
DMA_DESCR_TX_OWNER	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_OWNER	/;"	d	file:
DMA_DESCR_TX_PAD	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_PAD	/;"	d	file:
DMA_DESCR_TX_PFVLAN	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_PFVLAN	/;"	d	file:
DMA_DESCR_TX_RETRY_COUNT	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_RETRY_COUNT	/;"	d	file:
DMA_DESCR_TX_RETRY_LIMIT	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_RETRY_LIMIT	/;"	d	file:
DMA_DESCR_TX_SOF	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_SOF	/;"	d	file:
DMA_DESCR_TX_UNDERRUN	drivers/net/tsi108_eth.c	/^#define DMA_DESCR_TX_UNDERRUN	/;"	d	file:
DMA_DESC_BYTES	drivers/net/macb.c	/^#define DMA_DESC_BYTES(/;"	d	file:
DMA_DEV_TO_DEV	include/dma.h	/^	DMA_DEV_TO_DEV,$/;"	e	enum:dma_direction
DMA_DEV_TO_MEM	include/dma.h	/^	DMA_DEV_TO_MEM,$/;"	e	enum:dma_direction
DMA_DI	drivers/block/sata_dwc.c	/^#define DMA_DI	/;"	d	file:
DMA_DISABLE_CHAN	drivers/block/sata_dwc.c	/^#define DMA_DISABLE_CHAN(/;"	d	file:
DMA_DONE	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_DONE	/;"	d
DMA_DONE	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_DONE	/;"	d
DMA_DONE_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_DONE_P	/;"	d
DMA_DONE_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_DONE_P	/;"	d
DMA_EN	drivers/block/sata_dwc.c	/^#define DMA_EN	/;"	d	file:
DMA_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DMA_ENA	/;"	d
DMA_ENABLE	drivers/mtd/nand/denali.h	/^#define DMA_ENABLE	/;"	d
DMA_ENABLE_CHAN	drivers/block/sata_dwc.c	/^#define DMA_ENABLE_CHAN(/;"	d	file:
DMA_ENABLE__FLAG	drivers/mtd/nand/denali.h	/^#define     DMA_ENABLE__FLAG	/;"	d
DMA_ENV	include/configs/MPC8610HPCD.h	/^#define DMA_ENV /;"	d
DMA_ERR	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_ERR	/;"	d
DMA_ERR	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_ERR	/;"	d
DMA_ERRC	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_ERRC	/;"	d
DMA_ERRC_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_ERRC_P	/;"	d
DMA_ERR_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_ERR_P	/;"	d
DMA_ERR_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_ERR_P	/;"	d
DMA_FIFOFILL	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_FIFOFILL	/;"	d
DMA_FIFOFILL_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_FIFOFILL_P	/;"	d
DMA_FROM_DEVICE	arch/arm/include/asm/dma-mapping.h	/^	DMA_FROM_DEVICE		= 2,$/;"	e	enum:dma_data_direction
DMA_FROM_DEVICE	arch/avr32/include/asm/dma-mapping.h	/^	DMA_FROM_DEVICE		= 2,$/;"	e	enum:dma_data_direction
DMA_FROM_DEVICE	arch/nds32/include/asm/dma-mapping.h	/^	DMA_FROM_DEVICE		= 2,$/;"	e	enum:dma_data_direction
DMA_FROM_DEVICE	drivers/block/sata_dwc.h	/^	DMA_FROM_DEVICE = 2,$/;"	e	enum:dma_data_direction
DMA_INTR	drivers/mtd/nand/denali.h	/^#define DMA_INTR	/;"	d
DMA_INTR_EN	drivers/mtd/nand/denali.h	/^#define DMA_INTR_EN	/;"	d
DMA_INTR_EN__DESC_COMP_CHANNEL0	drivers/mtd/nand/denali.h	/^#define     DMA_INTR_EN__DESC_COMP_CHANNEL0	/;"	d
DMA_INTR_EN__DESC_COMP_CHANNEL1	drivers/mtd/nand/denali.h	/^#define     DMA_INTR_EN__DESC_COMP_CHANNEL1	/;"	d
DMA_INTR_EN__DESC_COMP_CHANNEL2	drivers/mtd/nand/denali.h	/^#define     DMA_INTR_EN__DESC_COMP_CHANNEL2	/;"	d
DMA_INTR_EN__DESC_COMP_CHANNEL3	drivers/mtd/nand/denali.h	/^#define     DMA_INTR_EN__DESC_COMP_CHANNEL3	/;"	d
DMA_INTR_EN__MEMCOPY_DESC_COMP	drivers/mtd/nand/denali.h	/^#define     DMA_INTR_EN__MEMCOPY_DESC_COMP	/;"	d
DMA_INTR_EN__TARGET_ERROR	drivers/mtd/nand/denali.h	/^#define     DMA_INTR_EN__TARGET_ERROR	/;"	d
DMA_INTR__DESC_COMP_CHANNEL0	drivers/mtd/nand/denali.h	/^#define     DMA_INTR__DESC_COMP_CHANNEL0	/;"	d
DMA_INTR__DESC_COMP_CHANNEL1	drivers/mtd/nand/denali.h	/^#define     DMA_INTR__DESC_COMP_CHANNEL1	/;"	d
DMA_INTR__DESC_COMP_CHANNEL2	drivers/mtd/nand/denali.h	/^#define     DMA_INTR__DESC_COMP_CHANNEL2	/;"	d
DMA_INTR__DESC_COMP_CHANNEL3	drivers/mtd/nand/denali.h	/^#define     DMA_INTR__DESC_COMP_CHANNEL3	/;"	d
DMA_INTR__MEMCOPY_DESC_COMP	drivers/mtd/nand/denali.h	/^#define     DMA_INTR__MEMCOPY_DESC_COMP	/;"	d
DMA_INTR__TARGET_ERROR	drivers/mtd/nand/denali.h	/^#define     DMA_INTR__TARGET_ERROR	/;"	d
DMA_LINEAR	board/micronas/vct/scc.h	/^#define DMA_LINEAR	/;"	d
DMA_MBWIDTH	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_MBWIDTH	/;"	d
DMA_MBWIDTH_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_MBWIDTH_P	/;"	d
DMA_MEM_TO_DEV	include/dma.h	/^	DMA_MEM_TO_DEV,$/;"	e	enum:dma_direction
DMA_MEM_TO_MEM	include/dma.h	/^	DMA_MEM_TO_MEM,$/;"	e	enum:dma_direction
DMA_MST_CTRL_0	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_0	/;"	d
DMA_MST_CTRL_BURST_16WORDS	drivers/mtd/nand/tegra_nand.h	/^	DMA_MST_CTRL_BURST_16WORDS	= 5 << DMA_MST_CTRL_BURST_SIZE_SHIFT$/;"	e	enum:__anonf17bc6a00603
DMA_MST_CTRL_BURST_1WORDS	drivers/mtd/nand/tegra_nand.h	/^	DMA_MST_CTRL_BURST_1WORDS	= 2 << DMA_MST_CTRL_BURST_SIZE_SHIFT,$/;"	e	enum:__anonf17bc6a00603
DMA_MST_CTRL_BURST_4WORDS	drivers/mtd/nand/tegra_nand.h	/^	DMA_MST_CTRL_BURST_4WORDS	= 3 << DMA_MST_CTRL_BURST_SIZE_SHIFT,$/;"	e	enum:__anonf17bc6a00603
DMA_MST_CTRL_BURST_8WORDS	drivers/mtd/nand/tegra_nand.h	/^	DMA_MST_CTRL_BURST_8WORDS	= 4 << DMA_MST_CTRL_BURST_SIZE_SHIFT,$/;"	e	enum:__anonf17bc6a00603
DMA_MST_CTRL_BURST_SIZE_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_BURST_SIZE_MASK	/;"	d
DMA_MST_CTRL_BURST_SIZE_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_BURST_SIZE_SHIFT	/;"	d
DMA_MST_CTRL_DIR_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_DIR_MASK	/;"	d
DMA_MST_CTRL_DIR_READ	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_DIR_READ	/;"	d
DMA_MST_CTRL_DIR_WRITE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_DIR_WRITE	/;"	d
DMA_MST_CTRL_EN_A_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_EN_A_DISABLE	/;"	d
DMA_MST_CTRL_EN_A_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_EN_A_ENABLE	/;"	d
DMA_MST_CTRL_EN_A_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_EN_A_MASK	/;"	d
DMA_MST_CTRL_EN_B_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_EN_B_DISABLE	/;"	d
DMA_MST_CTRL_EN_B_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_EN_B_ENABLE	/;"	d
DMA_MST_CTRL_EN_B_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_EN_B_MASK	/;"	d
DMA_MST_CTRL_GO_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_GO_DISABLE	/;"	d
DMA_MST_CTRL_GO_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_GO_ENABLE	/;"	d
DMA_MST_CTRL_GO_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_GO_MASK	/;"	d
DMA_MST_CTRL_IS_DMA_DONE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_IS_DMA_DONE	/;"	d
DMA_MST_CTRL_PERF_EN_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_PERF_EN_DISABLE	/;"	d
DMA_MST_CTRL_PERF_EN_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_PERF_EN_ENABLE	/;"	d
DMA_MST_CTRL_PERF_EN_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_PERF_EN_MASK	/;"	d
DMA_MST_CTRL_REUSE_BUFFER_DISABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_REUSE_BUFFER_DISABLE	/;"	d
DMA_MST_CTRL_REUSE_BUFFER_ENABLE	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_REUSE_BUFFER_ENABLE	/;"	d
DMA_MST_CTRL_REUSE_BUFFER_MASK	drivers/mtd/nand/tegra_nand.h	/^#define DMA_MST_CTRL_REUSE_BUFFER_MASK	/;"	d
DMA_MUX0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define DMA_MUX0_BASE_ADDR	/;"	d
DMA_NONE	drivers/block/sata_dwc.h	/^	DMA_NONE = 3,$/;"	e	enum:dma_data_direction
DMA_NO_OF_CHANNELS	drivers/dma/lpc32xx_dma.c	/^#define DMA_NO_OF_CHANNELS	/;"	d	file:
DMA_NUM_CHANS	drivers/block/sata_dwc.c	/^#define DMA_NUM_CHANS	/;"	d	file:
DMA_NUM_CHAN_REGS	drivers/block/sata_dwc.c	/^#define DMA_NUM_CHAN_REGS	/;"	d	file:
DMA_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define DMA_OFFSET	/;"	d
DMA_PBL	drivers/net/designware.h	/^#define DMA_PBL	/;"	d
DMA_PBWIDTH	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_PBWIDTH	/;"	d
DMA_PBWIDTH_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_PBWIDTH_P	/;"	d
DMA_PERID_NAND1	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define DMA_PERID_NAND1	/;"	d
DMA_PIO_WORDS	arch/arm/include/asm/imx-common/dma.h	/^#define	DMA_PIO_WORDS	/;"	d
DMA_PIRQ	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_PIRQ	/;"	d
DMA_PIRQ_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_PIRQ_P	/;"	d
DMA_READ	board/micronas/vct/scc.h	/^#define DMA_READ	/;"	d
DMA_REQ_PORT_HOST_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DMA_REQ_PORT_HOST_BASE_ADDR /;"	d
DMA_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define DMA_RESET	/;"	d
DMA_RUN	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_RUN	/;"	d
DMA_RUN	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_RUN	/;"	d
DMA_RUN_DFETCH	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_RUN_DFETCH	/;"	d
DMA_RUN_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_RUN_P	/;"	d
DMA_RUN_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_RUN_P	/;"	d
DMA_RUN_WAIT_ACK	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_RUN_WAIT_ACK	/;"	d
DMA_RUN_WAIT_TRIG	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define DMA_RUN_WAIT_TRIG	/;"	d
DMA_SIZE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define DMA_SIZE /;"	d
DMA_SIZE16	board/bf527-ezkit/video.c	/^#define DMA_SIZE16	/;"	d	file:
DMA_SIZE16	board/bf533-stamp/video.c	/^#define DMA_SIZE16	/;"	d	file:
DMA_SIZE16	board/bf548-ezkit/video.c	/^#define DMA_SIZE16	/;"	d	file:
DMA_SIZE16	board/cm-bf548/video.c	/^#define DMA_SIZE16	/;"	d	file:
DMA_START	board/micronas/vct/scc.h	/^#define DMA_START	/;"	d
DMA_START_FH_RESET	board/micronas/vct/scc.h	/^#define DMA_START_FH_RESET	/;"	d
DMA_STATE_ERROR	board/micronas/vct/scc.h	/^#define DMA_STATE_ERROR	/;"	d
DMA_STATE_RESET	board/micronas/vct/scc.h	/^#define DMA_STATE_RESET	/;"	d
DMA_STATE_SETUP	board/micronas/vct/scc.h	/^#define DMA_STATE_SETUP	/;"	d
DMA_STATE_START	board/micronas/vct/scc.h	/^#define DMA_STATE_START	/;"	d
DMA_STOP	board/micronas/vct/scc.h	/^#define DMA_STOP	/;"	d
DMA_SUPPORTS_DEV_TO_DEV	include/dma.h	/^#define DMA_SUPPORTS_DEV_TO_DEV	/;"	d
DMA_SUPPORTS_DEV_TO_MEM	include/dma.h	/^#define DMA_SUPPORTS_DEV_TO_MEM	/;"	d
DMA_SUPPORTS_MEM_TO_DEV	include/dma.h	/^#define DMA_SUPPORTS_MEM_TO_DEV	/;"	d
DMA_SUPPORTS_MEM_TO_MEM	include/dma.h	/^#define DMA_SUPPORTS_MEM_TO_MEM	/;"	d
DMA_TAKEOVER	board/micronas/vct/scc.h	/^#define DMA_TAKEOVER	/;"	d
DMA_TC_CNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA_TC_CNT /;"	d
DMA_TC_CNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA_TC_CNT /;"	d
DMA_TC_CNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA_TC_CNT /;"	d
DMA_TC_CNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA_TC_CNT /;"	d
DMA_TC_CNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA_TC_CNT /;"	d
DMA_TC_PER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define DMA_TC_PER /;"	d
DMA_TC_PER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define DMA_TC_PER /;"	d
DMA_TC_PER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define DMA_TC_PER /;"	d
DMA_TC_PER	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define DMA_TC_PER /;"	d
DMA_TC_PER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define DMA_TC_PER /;"	d
DMA_TIMING	drivers/block/ftide020.h	/^#define DMA_TIMING	/;"	d
DMA_TO_DEVICE	arch/arm/include/asm/dma-mapping.h	/^	DMA_TO_DEVICE		= 1,$/;"	e	enum:dma_data_direction
DMA_TO_DEVICE	arch/avr32/include/asm/dma-mapping.h	/^	DMA_TO_DEVICE		= 1,$/;"	e	enum:dma_data_direction
DMA_TO_DEVICE	arch/nds32/include/asm/dma-mapping.h	/^	DMA_TO_DEVICE		= 1,$/;"	e	enum:dma_data_direction
DMA_TO_DEVICE	drivers/block/sata_dwc.h	/^	DMA_TO_DEVICE = 1,$/;"	e	enum:dma_data_direction
DMA_TWAIT	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_TWAIT	/;"	d
DMA_TWAIT_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define DMA_TWAIT_P	/;"	d
DMA_WRITE	board/micronas/vct/scc.h	/^#define DMA_WRITE	/;"	d
DMB	arch/arm/include/asm/barriers.h	/^#define DMB	/;"	d
DMC0_CFG	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_CFG /;"	d
DMC0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_CTL /;"	d
DMC0_DLLCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_DLLCTL /;"	d
DMC0_EFFCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_EFFCTL /;"	d
DMC0_EMR1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_EMR1 /;"	d
DMC0_EMR2	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_EMR2 /;"	d
DMC0_EMR3	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_EMR3 /;"	d
DMC0_ID	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_ID /;"	d
DMC0_MR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_MR /;"	d
DMC0_MSK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_MSK /;"	d
DMC0_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DMC0_P	/;"	d
DMC0_PADCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_PADCTL /;"	d
DMC0_PRIO	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_PRIO /;"	d
DMC0_PRIOMSK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_PRIOMSK /;"	d
DMC0_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_STAT /;"	d
DMC0_TR0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_TR0 /;"	d
DMC0_TR1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_TR1 /;"	d
DMC0_TR2	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DMC0_TR2 /;"	d
DMC1_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DMC1_P	/;"	d
DMCD_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define DMCD_RATIO	/;"	d
DMCD_RATIO	board/samsung/odroid/setup.h	/^#define DMCD_RATIO(/;"	d
DMCD_RATIO	board/samsung/trats/setup.h	/^#define DMCD_RATIO	/;"	d
DMCIER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DMCIER	/;"	d
DMCISR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	DMCISR	/;"	d
DMCP_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define DMCP_RATIO	/;"	d
DMCP_RATIO	board/samsung/odroid/setup.h	/^#define DMCP_RATIO(/;"	d
DMCP_RATIO	board/samsung/trats/setup.h	/^#define DMCP_RATIO	/;"	d
DMCTL_DMC0_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DMCTL_DMC0_P	/;"	d
DMCTL_DMC1_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DMCTL_DMC1_P	/;"	d
DMCTL_ENDCPLB_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DMCTL_ENDCPLB_P	/;"	d
DMCTL_ENDM_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define DMCTL_ENDM_P	/;"	d
DMC_AREF_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_AREF_EN	/;"	d
DMC_BUS_SEL	board/samsung/odroid/setup.h	/^#define DMC_BUS_SEL(/;"	d
DMC_CHIP_BASE_0	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CHIP_BASE_0 /;"	d
DMC_CHIP_BASE_1	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CHIP_BASE_1 /;"	d
DMC_CHIP_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CHIP_MASK	/;"	d
DMC_CONCONTROL_AREF_EN_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_AREF_EN_DISABLE	/;"	d
DMC_CONCONTROL_AREF_EN_ENABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_AREF_EN_ENABLE	/;"	d
DMC_CONCONTROL_DFI_INIT_START_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_DFI_INIT_START_DISABLE	/;"	d
DMC_CONCONTROL_EMPTY	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_EMPTY	/;"	d
DMC_CONCONTROL_EMPTY_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_EMPTY_DISABLE	/;"	d
DMC_CONCONTROL_EMPTY_ENABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_EMPTY_ENABLE	/;"	d
DMC_CONCONTROL_IO_PD_CON	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_IO_PD_CON(/;"	d
DMC_CONCONTROL_IO_PD_CON_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_IO_PD_CON_DISABLE	/;"	d
DMC_CONCONTROL_IO_PD_CON_ENABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_IO_PD_CON_ENABLE	/;"	d
DMC_CONCONTROL_RD_FETCH_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_RD_FETCH_DISABLE	/;"	d
DMC_CONCONTROL_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_RESET_VAL	/;"	d
DMC_CONCONTROL_TIMEOUT_LEVEL0	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_TIMEOUT_LEVEL0	/;"	d
DMC_CONCONTROL_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CONCONTROL_VAL	/;"	d
DMC_CTRL_SHGATE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_CTRL_SHGATE	/;"	d
DMC_INTERNAL_CG	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_INTERNAL_CG	/;"	d
DMC_MEMBASECONFIG0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMBASECONFIG0_VAL /;"	d
DMC_MEMBASECONFIG1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMBASECONFIG1_VAL /;"	d
DMC_MEMBASECONFIGX_CHIP_BASE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMBASECONFIGX_CHIP_BASE(/;"	d
DMC_MEMBASECONFIGX_CHIP_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMBASECONFIGX_CHIP_MASK(/;"	d
DMC_MEMBASECONFIG_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMBASECONFIG_VAL(/;"	d
DMC_MEMCONFIGX_CHIP_BANK_8	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONFIGX_CHIP_BANK_8 /;"	d
DMC_MEMCONFIGX_CHIP_COL_10	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONFIGX_CHIP_COL_10 /;"	d
DMC_MEMCONFIGX_CHIP_MAP_INTERLEAVED	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONFIGX_CHIP_MAP_INTERLEAVED /;"	d
DMC_MEMCONFIGX_CHIP_ROW_14	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONFIGX_CHIP_ROW_14 /;"	d
DMC_MEMCONFIGX_CHIP_ROW_15	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONFIGX_CHIP_ROW_15 /;"	d
DMC_MEMCONFIG_CHIP_MAP_SPLIT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONFIG_CHIP_MAP_SPLIT	/;"	d
DMC_MEMCONTROL_ADD_LAT_PALL_CYCLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_ADD_LAT_PALL_CYCLE(/;"	d
DMC_MEMCONTROL_BL_4	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_BL_4 /;"	d
DMC_MEMCONTROL_BL_8	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_BL_8 /;"	d
DMC_MEMCONTROL_CLK_STOP_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_CLK_STOP_DISABLE	/;"	d
DMC_MEMCONTROL_DPWRDN_ACTIVE_PRECHARGE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_DPWRDN_ACTIVE_PRECHARGE	/;"	d
DMC_MEMCONTROL_DPWRDN_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_DPWRDN_DISABLE	/;"	d
DMC_MEMCONTROL_DSREF_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_DSREF_DISABLE	/;"	d
DMC_MEMCONTROL_DSREF_ENABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_DSREF_ENABLE	/;"	d
DMC_MEMCONTROL_MEM_TYPE_DDR3	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MEM_TYPE_DDR3 /;"	d
DMC_MEMCONTROL_MEM_TYPE_LPDDR2	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MEM_TYPE_LPDDR2 /;"	d
DMC_MEMCONTROL_MEM_TYPE_LPDDR3	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MEM_TYPE_LPDDR3 /;"	d
DMC_MEMCONTROL_MEM_WIDTH_32BIT	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MEM_WIDTH_32BIT /;"	d
DMC_MEMCONTROL_MRR_BYTE_15_8	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MRR_BYTE_15_8 /;"	d
DMC_MEMCONTROL_MRR_BYTE_23_16	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MRR_BYTE_23_16 /;"	d
DMC_MEMCONTROL_MRR_BYTE_31_24	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MRR_BYTE_31_24 /;"	d
DMC_MEMCONTROL_MRR_BYTE_7_0	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_MRR_BYTE_7_0 /;"	d
DMC_MEMCONTROL_NUM_CHIP_1	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_NUM_CHIP_1 /;"	d
DMC_MEMCONTROL_NUM_CHIP_2	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_NUM_CHIP_2 /;"	d
DMC_MEMCONTROL_PZQ_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_PZQ_DISABLE /;"	d
DMC_MEMCONTROL_TP_DISABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_TP_DISABLE	/;"	d
DMC_MEMCONTROL_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_MEMCONTROL_VAL	/;"	d
DMC_OFFSET	arch/arm/mach-exynos/common_setup.h	/^#define DMC_OFFSET	/;"	d
DMC_PRECHCONFIG_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_PRECHCONFIG_VAL /;"	d
DMC_PWRDNCONFIG_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DMC_PWRDNCONFIG_VAL /;"	d
DMC_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define DMC_RATIO	/;"	d
DMC_RATIO	board/samsung/odroid/setup.h	/^#define DMC_RATIO(/;"	d
DMC_RATIO	board/samsung/trats/setup.h	/^#define DMC_RATIO	/;"	d
DMEM_CONTROL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DMEM_CONTROL /;"	d
DMFC_DP_CHAN	drivers/video/ipu_regs.h	/^#define DMFC_DP_CHAN	/;"	d
DMFC_DP_CHAN_DEF	drivers/video/ipu_regs.h	/^#define DMFC_DP_CHAN_DEF	/;"	d
DMFC_GENERAL1	drivers/video/ipu_regs.h	/^#define DMFC_GENERAL1	/;"	d
DMFC_HIGH_RESOLUTION_DC	drivers/video/ipu.h	/^	DMFC_HIGH_RESOLUTION_DC,$/;"	e	enum:ipu_dmfc_type
DMFC_HIGH_RESOLUTION_DP	drivers/video/ipu.h	/^	DMFC_HIGH_RESOLUTION_DP,$/;"	e	enum:ipu_dmfc_type
DMFC_HIGH_RESOLUTION_ONLY_DP	drivers/video/ipu.h	/^	DMFC_HIGH_RESOLUTION_ONLY_DP,$/;"	e	enum:ipu_dmfc_type
DMFC_IC_CTRL	drivers/video/ipu_regs.h	/^#define DMFC_IC_CTRL	/;"	d
DMFC_NORMAL	drivers/video/ipu.h	/^	DMFC_NORMAL = 0,$/;"	e	enum:ipu_dmfc_type
DMFC_REG	drivers/video/ipu_regs.h	/^#define DMFC_REG	/;"	d
DMFC_WR_CHAN	drivers/video/ipu_regs.h	/^#define DMFC_WR_CHAN	/;"	d
DMFC_WR_CHAN_DEF	drivers/video/ipu_regs.h	/^#define DMFC_WR_CHAN_DEF	/;"	d
DMIBAR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define DMIBAR	/;"	d
DMIBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DMIBAR	/;"	d
DMIBAR_REG	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define DMIBAR_REG(/;"	d
DMISCI_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  DMISCI_STS	/;"	d
DMISCI_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   DMISCI_STS	/;"	d
DMISS	arch/powerpc/include/asm/processor.h	/^#define DMISS	/;"	d
DMI_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define DMI_BASE_ADDRESS	/;"	d
DMI_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define DMI_BASE_SIZE	/;"	d
DMM_BASE	arch/arm/include/asm/emif.h	/^#define DMM_BASE	/;"	d
DMM_LISA_MAP_0_INVAL_ADDR_TRAP	arch/arm/include/asm/emif.h	/^#define DMM_LISA_MAP_0_INVAL_ADDR_TRAP	/;"	d
DMM_LISA_MAP_EMIF1_ONLY_BASE_VAL	arch/arm/include/asm/emif.h	/^#define DMM_LISA_MAP_EMIF1_ONLY_BASE_VAL	/;"	d
DMM_LISA_MAP_EMIF2_ONLY_BASE_VAL	arch/arm/include/asm/emif.h	/^#define DMM_LISA_MAP_EMIF2_ONLY_BASE_VAL	/;"	d
DMM_LISA_MAP_INTERLEAVED_BASE_VAL	arch/arm/include/asm/emif.h	/^#define DMM_LISA_MAP_INTERLEAVED_BASE_VAL	/;"	d
DMM_PAT_BASE_ADDR	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define DMM_PAT_BASE_ADDR	/;"	d	file:
DMM_SDRC_ADDR_SPC_INVALID	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_ADDR_SPC_INVALID	/;"	d
DMM_SDRC_ADDR_SPC_NVM	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_ADDR_SPC_NVM	/;"	d
DMM_SDRC_ADDR_SPC_SDRAM	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_ADDR_SPC_SDRAM	/;"	d
DMM_SDRC_INTL_128B	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_INTL_128B	/;"	d
DMM_SDRC_INTL_256B	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_INTL_256B	/;"	d
DMM_SDRC_INTL_512	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_INTL_512	/;"	d
DMM_SDRC_INTL_NONE	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_INTL_NONE	/;"	d
DMM_SDRC_MAP_EMIF1_AND_EMIF2	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_MAP_EMIF1_AND_EMIF2	/;"	d
DMM_SDRC_MAP_EMIF1_ONLY	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_MAP_EMIF1_ONLY	/;"	d
DMM_SDRC_MAP_EMIF2_ONLY	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_MAP_EMIF2_ONLY	/;"	d
DMM_SDRC_MAP_UNMAPPED	arch/arm/include/asm/emif.h	/^#define DMM_SDRC_MAP_UNMAPPED	/;"	d
DMODE	include/sym53c8xx.h	/^#define DMODE	/;"	d
DMPHY_ACBDLR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR0	/;"	d
DMPHY_ACBDLR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR1	/;"	d
DMPHY_ACBDLR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR2	/;"	d
DMPHY_ACBDLR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR3	/;"	d
DMPHY_ACBDLR4	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR4	/;"	d
DMPHY_ACBDLR5	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR5	/;"	d
DMPHY_ACBDLR6	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR6	/;"	d
DMPHY_ACBDLR7	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR7	/;"	d
DMPHY_ACBDLR8	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR8	/;"	d
DMPHY_ACBDLR9	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACBDLR9	/;"	d
DMPHY_ACIOCR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACIOCR0	/;"	d
DMPHY_ACIOCR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACIOCR1	/;"	d
DMPHY_ACIOCR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACIOCR2	/;"	d
DMPHY_ACIOCR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACIOCR3	/;"	d
DMPHY_ACIOCR4	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACIOCR4	/;"	d
DMPHY_ACIOCR5	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACIOCR5	/;"	d
DMPHY_ACLCDLR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACLCDLR	/;"	d
DMPHY_ACMDLR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ACMDLR	/;"	d
DMPHY_DCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DCR	/;"	d
DMPHY_DSGCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DSGCR	/;"	d
DMPHY_DTAR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTAR0	/;"	d
DMPHY_DTAR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTAR1	/;"	d
DMPHY_DTAR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTAR2	/;"	d
DMPHY_DTAR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTAR3	/;"	d
DMPHY_DTCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTCR	/;"	d
DMPHY_DTCR_RANKEN_MASK	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_DTCR_RANKEN_MASK	/;"	d
DMPHY_DTCR_RANKEN_SHIFT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_DTCR_RANKEN_SHIFT	/;"	d
DMPHY_DTDR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTDR0	/;"	d
DMPHY_DTDR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTDR1	/;"	d
DMPHY_DTEDR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTEDR0	/;"	d
DMPHY_DTEDR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTEDR1	/;"	d
DMPHY_DTPR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTPR0	/;"	d
DMPHY_DTPR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTPR1	/;"	d
DMPHY_DTPR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTPR2	/;"	d
DMPHY_DTPR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DTPR3	/;"	d
DMPHY_DXCCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DXCCR	/;"	d
DMPHY_DX_BASE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BASE	/;"	d
DMPHY_DX_BDLR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR0	/;"	d
DMPHY_DX_BDLR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR1	/;"	d
DMPHY_DX_BDLR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR2	/;"	d
DMPHY_DX_BDLR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR3	/;"	d
DMPHY_DX_BDLR4	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR4	/;"	d
DMPHY_DX_BDLR5	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR5	/;"	d
DMPHY_DX_BDLR6	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_BDLR6	/;"	d
DMPHY_DX_GCR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GCR0	/;"	d
DMPHY_DX_GCR0_WLRKEN_MASK	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_DX_GCR0_WLRKEN_MASK	/;"	d
DMPHY_DX_GCR0_WLRKEN_SHIFT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_DX_GCR0_WLRKEN_SHIFT	/;"	d
DMPHY_DX_GCR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GCR1	/;"	d
DMPHY_DX_GCR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GCR2	/;"	d
DMPHY_DX_GCR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GCR3	/;"	d
DMPHY_DX_GSR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GSR0	/;"	d
DMPHY_DX_GSR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GSR1	/;"	d
DMPHY_DX_GSR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GSR2	/;"	d
DMPHY_DX_GTR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_GTR	/;"	d
DMPHY_DX_LCDLR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_LCDLR0	/;"	d
DMPHY_DX_LCDLR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_LCDLR1	/;"	d
DMPHY_DX_LCDLR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_LCDLR2	/;"	d
DMPHY_DX_MDLR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_MDLR	/;"	d
DMPHY_DX_STRIDE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_DX_STRIDE	/;"	d
DMPHY_MR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_MR0	/;"	d
DMPHY_MR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_MR1	/;"	d
DMPHY_MR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_MR2	/;"	d
DMPHY_MR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_MR3	/;"	d
DMPHY_ODTCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ODTCR	/;"	d
DMPHY_PGCR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PGCR0	/;"	d
DMPHY_PGCR0_PHYFRST	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGCR0_PHYFRST	/;"	d
DMPHY_PGCR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PGCR1	/;"	d
DMPHY_PGCR1_INHVT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGCR1_INHVT	/;"	d
DMPHY_PGCR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PGCR2	/;"	d
DMPHY_PGCR2_ACPDDC	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGCR2_ACPDDC	/;"	d
DMPHY_PGCR2_DUALCHN	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGCR2_DUALCHN	/;"	d
DMPHY_PGCR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PGCR3	/;"	d
DMPHY_PGSR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PGSR0	/;"	d
DMPHY_PGSR0_DCDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_DCDONE	/;"	d
DMPHY_PGSR0_DIDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_DIDONE	/;"	d
DMPHY_PGSR0_IDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_IDONE	/;"	d
DMPHY_PGSR0_PLDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_PLDONE	/;"	d
DMPHY_PGSR0_QSGDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_QSGDONE	/;"	d
DMPHY_PGSR0_QSGERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_QSGERR	/;"	d
DMPHY_PGSR0_RDDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_RDDONE	/;"	d
DMPHY_PGSR0_RDERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_RDERR	/;"	d
DMPHY_PGSR0_REDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_REDONE	/;"	d
DMPHY_PGSR0_REERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_REERR	/;"	d
DMPHY_PGSR0_WDDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WDDONE	/;"	d
DMPHY_PGSR0_WDERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WDERR	/;"	d
DMPHY_PGSR0_WEDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WEDONE	/;"	d
DMPHY_PGSR0_WEERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WEERR	/;"	d
DMPHY_PGSR0_WLADONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WLADONE	/;"	d
DMPHY_PGSR0_WLAERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WLAERR	/;"	d
DMPHY_PGSR0_WLDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WLDONE	/;"	d
DMPHY_PGSR0_WLERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_WLERR	/;"	d
DMPHY_PGSR0_ZCDONE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_ZCDONE	/;"	d
DMPHY_PGSR0_ZCERR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR0_ZCERR	/;"	d
DMPHY_PGSR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PGSR1	/;"	d
DMPHY_PGSR1_VTSTOP	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PGSR1_VTSTOP	/;"	d
DMPHY_PIR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PIR	/;"	d
DMPHY_PIR_DCAL	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_DCAL	/;"	d
DMPHY_PIR_DRAMINIT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_DRAMINIT	/;"	d
DMPHY_PIR_DRAMRST	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_DRAMRST	/;"	d
DMPHY_PIR_INIT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_INIT	/;"	d
DMPHY_PIR_INITBYP	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_INITBYP	/;"	d
DMPHY_PIR_PHYRST	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_PHYRST	/;"	d
DMPHY_PIR_PLLINIT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_PLLINIT	/;"	d
DMPHY_PIR_QSGATE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_QSGATE	/;"	d
DMPHY_PIR_RDDSKW	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_RDDSKW	/;"	d
DMPHY_PIR_RDEYE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_RDEYE	/;"	d
DMPHY_PIR_WL	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_WL	/;"	d
DMPHY_PIR_WLADJ	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_WLADJ	/;"	d
DMPHY_PIR_WRDSKW	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_WRDSKW	/;"	d
DMPHY_PIR_WREYE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_WREYE	/;"	d
DMPHY_PIR_ZCAL	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_ZCAL	/;"	d
DMPHY_PIR_ZCALBYP	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_PIR_ZCALBYP	/;"	d
DMPHY_PLLCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PLLCR	/;"	d
DMPHY_PTR0	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PTR0	/;"	d
DMPHY_PTR1	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PTR1	/;"	d
DMPHY_PTR2	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PTR2	/;"	d
DMPHY_PTR3	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PTR3	/;"	d
DMPHY_PTR4	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_PTR4	/;"	d
DMPHY_RIDR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_RIDR	/;"	d
DMPHY_SHIFT	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_SHIFT	/;"	d
DMPHY_ZQCR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ZQCR	/;"	d
DMPHY_ZQCR_AVGEN	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_ZQCR_AVGEN	/;"	d
DMPHY_ZQCR_FORCE_ZCAL_VT_UPDATE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define   DMPHY_ZQCR_FORCE_ZCAL_VT_UPDATE	/;"	d
DMPHY_ZQ_BASE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ZQ_BASE	/;"	d
DMPHY_ZQ_DR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ZQ_DR	/;"	d
DMPHY_ZQ_PR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ZQ_PR	/;"	d
DMPHY_ZQ_SR	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ZQ_SR	/;"	d
DMPHY_ZQ_STRIDE	arch/arm/mach-uniphier/dram/ddrmphy-regs.h	/^#define DMPHY_ZQ_STRIDE	/;"	d
DMU_OST_ANY	include/zfs/dmu.h	/^	DMU_OST_ANY,			\/* Be careful! *\/$/;"	e	enum:dmu_objset_type
DMU_OST_META	include/zfs/dmu.h	/^	DMU_OST_META,$/;"	e	enum:dmu_objset_type
DMU_OST_NONE	include/zfs/dmu.h	/^	DMU_OST_NONE,$/;"	e	enum:dmu_objset_type
DMU_OST_NUMTYPES	include/zfs/dmu.h	/^	DMU_OST_NUMTYPES$/;"	e	enum:dmu_objset_type
DMU_OST_OTHER	include/zfs/dmu.h	/^	DMU_OST_OTHER,			\/* For testing only! *\/$/;"	e	enum:dmu_objset_type
DMU_OST_ZFS	include/zfs/dmu.h	/^	DMU_OST_ZFS,$/;"	e	enum:dmu_objset_type
DMU_OST_ZVOL	include/zfs/dmu.h	/^	DMU_OST_ZVOL,$/;"	e	enum:dmu_objset_type
DMU_OT_ACL	include/zfs/dmu.h	/^	DMU_OT_ACL,			\/* ACL *\/$/;"	e	enum:dmu_object_type
DMU_OT_BPLIST	include/zfs/dmu.h	/^	DMU_OT_BPLIST,			\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_BPLIST_HDR	include/zfs/dmu.h	/^	DMU_OT_BPLIST_HDR,		\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_DDT_STATS	include/zfs/dmu.h	/^	DMU_OT_DDT_STATS,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_DDT_ZAP	include/zfs/dmu.h	/^	DMU_OT_DDT_ZAP,			\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_DIRECTORY_CONTENTS	include/zfs/dmu.h	/^	DMU_OT_DIRECTORY_CONTENTS,	\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_DNODE	include/zfs/dmu.h	/^	DMU_OT_DNODE,			\/* DNODE *\/$/;"	e	enum:dmu_object_type
DMU_OT_DSL_DATASET	include/zfs/dmu.h	/^	DMU_OT_DSL_DATASET,		\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_DSL_DIR	include/zfs/dmu.h	/^	DMU_OT_DSL_DIR,			\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_DSL_DIR_CHILD_MAP	include/zfs/dmu.h	/^	DMU_OT_DSL_DIR_CHILD_MAP,	\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_DSL_DS_SNAP_MAP	include/zfs/dmu.h	/^	DMU_OT_DSL_DS_SNAP_MAP,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_DSL_PERMS	include/zfs/dmu.h	/^	DMU_OT_DSL_PERMS,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_DSL_PROPS	include/zfs/dmu.h	/^	DMU_OT_DSL_PROPS,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_ERROR_LOG	include/zfs/dmu.h	/^	DMU_OT_ERROR_LOG,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_FUID	include/zfs/dmu.h	/^	DMU_OT_FUID,			\/* FUID table (Packed NVLIST UINT8) *\/$/;"	e	enum:dmu_object_type
DMU_OT_FUID_SIZE	include/zfs/dmu.h	/^	DMU_OT_FUID_SIZE,		\/* FUID table size UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_INTENT_LOG	include/zfs/dmu.h	/^	DMU_OT_INTENT_LOG,		\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_MASTER_NODE	include/zfs/dmu.h	/^	DMU_OT_MASTER_NODE,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_NEXT_CLONES	include/zfs/dmu.h	/^	DMU_OT_NEXT_CLONES,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_NONE	include/zfs/dmu.h	/^	DMU_OT_NONE,$/;"	e	enum:dmu_object_type
DMU_OT_NUMTYPES	include/zfs/dmu.h	/^	DMU_OT_NUMTYPES$/;"	e	enum:dmu_object_type
DMU_OT_OBJECT_ARRAY	include/zfs/dmu.h	/^	DMU_OT_OBJECT_ARRAY,		\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_OBJECT_DIRECTORY	include/zfs/dmu.h	/^	DMU_OT_OBJECT_DIRECTORY,	\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_OBJSET	include/zfs/dmu.h	/^	DMU_OT_OBJSET,			\/* OBJSET *\/$/;"	e	enum:dmu_object_type
DMU_OT_OLDACL	include/zfs/dmu.h	/^	DMU_OT_OLDACL,			\/* OLD ACL *\/$/;"	e	enum:dmu_object_type
DMU_OT_PACKED_NVLIST	include/zfs/dmu.h	/^	DMU_OT_PACKED_NVLIST,		\/* UINT8 (XDR by nvlist_pack\/unpack) *\/$/;"	e	enum:dmu_object_type
DMU_OT_PACKED_NVLIST_SIZE	include/zfs/dmu.h	/^	DMU_OT_PACKED_NVLIST_SIZE,	\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_PLAIN_FILE_CONTENTS	include/zfs/dmu.h	/^	DMU_OT_PLAIN_FILE_CONTENTS,	\/* UINT8 *\/$/;"	e	enum:dmu_object_type
DMU_OT_PLAIN_OTHER	include/zfs/dmu.h	/^	DMU_OT_PLAIN_OTHER,		\/* UINT8 *\/$/;"	e	enum:dmu_object_type
DMU_OT_POOL_PROPS	include/zfs/dmu.h	/^	DMU_OT_POOL_PROPS,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_SA	include/zfs/dmu.h	/^	DMU_OT_SA,			\/* System attr *\/$/;"	e	enum:dmu_object_type
DMU_OT_SA_ATTR_LAYOUTS	include/zfs/dmu.h	/^	DMU_OT_SA_ATTR_LAYOUTS,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_SA_ATTR_REGISTRATION	include/zfs/dmu.h	/^	DMU_OT_SA_ATTR_REGISTRATION,	\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_SA_MASTER_NODE	include/zfs/dmu.h	/^	DMU_OT_SA_MASTER_NODE,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_SCRUB_QUEUE	include/zfs/dmu.h	/^	DMU_OT_SCRUB_QUEUE,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_SPACE_MAP	include/zfs/dmu.h	/^	DMU_OT_SPACE_MAP,		\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_SPACE_MAP_HEADER	include/zfs/dmu.h	/^	DMU_OT_SPACE_MAP_HEADER,	\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_SPA_HISTORY	include/zfs/dmu.h	/^	DMU_OT_SPA_HISTORY,		\/* UINT8 *\/$/;"	e	enum:dmu_object_type
DMU_OT_SPA_HISTORY_OFFSETS	include/zfs/dmu.h	/^	DMU_OT_SPA_HISTORY_OFFSETS,	\/* spa_his_phys_t *\/$/;"	e	enum:dmu_object_type
DMU_OT_SYSACL	include/zfs/dmu.h	/^	DMU_OT_SYSACL,			\/* SYSACL *\/$/;"	e	enum:dmu_object_type
DMU_OT_UINT64_OTHER	include/zfs/dmu.h	/^	DMU_OT_UINT64_OTHER,		\/* UINT64 *\/$/;"	e	enum:dmu_object_type
DMU_OT_UNLINKED_SET	include/zfs/dmu.h	/^	DMU_OT_UNLINKED_SET,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_USERGROUP_QUOTA	include/zfs/dmu.h	/^	DMU_OT_USERGROUP_QUOTA,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_USERGROUP_USED	include/zfs/dmu.h	/^	DMU_OT_USERGROUP_USED,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_USERREFS	include/zfs/dmu.h	/^	DMU_OT_USERREFS,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_ZAP_OTHER	include/zfs/dmu.h	/^	DMU_OT_ZAP_OTHER,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_OT_ZNODE	include/zfs/dmu.h	/^	DMU_OT_ZNODE,			\/* ZNODE *\/$/;"	e	enum:dmu_object_type
DMU_OT_ZVOL	include/zfs/dmu.h	/^	DMU_OT_ZVOL,			\/* UINT8 *\/$/;"	e	enum:dmu_object_type
DMU_OT_ZVOL_PROP	include/zfs/dmu.h	/^	DMU_OT_ZVOL_PROP,		\/* ZAP *\/$/;"	e	enum:dmu_object_type
DMU_POOL_CONFIG	include/zfs/dmu.h	/^#define	DMU_POOL_CONFIG	/;"	d
DMU_POOL_DEFLATE	include/zfs/dmu.h	/^#define	DMU_POOL_DEFLATE	/;"	d
DMU_POOL_DIRECTORY_OBJECT	include/zfs/dmu.h	/^#define	DMU_POOL_DIRECTORY_OBJECT	/;"	d
DMU_POOL_ERRLOG_LAST	include/zfs/dmu.h	/^#define	DMU_POOL_ERRLOG_LAST	/;"	d
DMU_POOL_ERRLOG_SCRUB	include/zfs/dmu.h	/^#define	DMU_POOL_ERRLOG_SCRUB	/;"	d
DMU_POOL_HISTORY	include/zfs/dmu.h	/^#define	DMU_POOL_HISTORY	/;"	d
DMU_POOL_L2CACHE	include/zfs/dmu.h	/^#define	DMU_POOL_L2CACHE	/;"	d
DMU_POOL_PROPS	include/zfs/dmu.h	/^#define	DMU_POOL_PROPS	/;"	d
DMU_POOL_ROOT_DATASET	include/zfs/dmu.h	/^#define	DMU_POOL_ROOT_DATASET	/;"	d
DMU_POOL_SPARES	include/zfs/dmu.h	/^#define	DMU_POOL_SPARES	/;"	d
DMU_POOL_SYNC_BPLIST	include/zfs/dmu.h	/^#define	DMU_POOL_SYNC_BPLIST	/;"	d
DM_74X164	drivers/gpio/Kconfig	/^config DM_74X164$/;"	c	menu:GPIO Support
DM_AXI_DMADMCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMCONF	/;"	d
DM_AXI_DMADMRQOSCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMRQOSCONF	/;"	d
DM_AXI_DMADMRQOSCTSET0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMRQOSCTSET0	/;"	d
DM_AXI_DMADMRQOSIN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMRQOSIN	/;"	d
DM_AXI_DMADMRQOSQON	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMRQOSQON	/;"	d
DM_AXI_DMADMRQOSREQCTR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMRQOSREQCTR	/;"	d
DM_AXI_DMADMRQOSSTAT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMRQOSSTAT	/;"	d
DM_AXI_DMADMWQOSCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMWQOSCONF	/;"	d
DM_AXI_DMADMWQOSCTSET0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMWQOSCTSET0	/;"	d
DM_AXI_DMADMWQOSIN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMWQOSIN	/;"	d
DM_AXI_DMADMWQOSQON	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMWQOSQON	/;"	d
DM_AXI_DMADMWQOSREQCTR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMWQOSREQCTR	/;"	d
DM_AXI_DMADMWQOSSTAT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMADMWQOSSTAT	/;"	d
DM_AXI_DMAPBCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMAPBCONF	/;"	d
DM_AXI_DMAXICONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMAXICONF	/;"	d
DM_AXI_DMQSPAPSLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMQSPAPSLVCONF	/;"	d
DM_AXI_DMQSPAPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMQSPAPSLVDMSCR	/;"	d
DM_AXI_DMRQOSCTSET1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMRQOSCTSET1	/;"	d
DM_AXI_DMRQOSCTSET2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMRQOSCTSET2	/;"	d
DM_AXI_DMRQOSCTSET3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMRQOSCTSET3	/;"	d
DM_AXI_DMRQOSTHRES0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMRQOSTHRES0	/;"	d
DM_AXI_DMRQOSTHRES1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMRQOSTHRES1	/;"	d
DM_AXI_DMRQOSTHRES2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMRQOSTHRES2	/;"	d
DM_AXI_DMSDM0CONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0CONF	/;"	d
DM_AXI_DMSDM0RQOSCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0RQOSCONF	/;"	d
DM_AXI_DMSDM0RQOSCTSET0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0RQOSCTSET0	/;"	d
DM_AXI_DMSDM0RQOSIN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0RQOSIN	/;"	d
DM_AXI_DMSDM0RQOSQON	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0RQOSQON	/;"	d
DM_AXI_DMSDM0RQOSREQCTR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0RQOSREQCTR	/;"	d
DM_AXI_DMSDM0RQOSSTAT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0RQOSSTAT	/;"	d
DM_AXI_DMSDM0WQOSCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0WQOSCONF	/;"	d
DM_AXI_DMSDM0WQOSCTSET0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0WQOSCTSET0	/;"	d
DM_AXI_DMSDM0WQOSIN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0WQOSIN	/;"	d
DM_AXI_DMSDM0WQOSQON	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0WQOSQON	/;"	d
DM_AXI_DMSDM0WQOSREQCTR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0WQOSREQCTR	/;"	d
DM_AXI_DMSDM0WQOSSTAT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM0WQOSSTAT	/;"	d
DM_AXI_DMSDM1CONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1CONF	/;"	d
DM_AXI_DMSDM1RQOSCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1RQOSCONF	/;"	d
DM_AXI_DMSDM1RQOSCTSET0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1RQOSCTSET0	/;"	d
DM_AXI_DMSDM1RQOSIN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1RQOSIN	/;"	d
DM_AXI_DMSDM1RQOSQON	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1RQOSQON	/;"	d
DM_AXI_DMSDM1RQOSREQCTR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1RQOSREQCTR	/;"	d
DM_AXI_DMSDM1RQOSSTAT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1RQOSSTAT	/;"	d
DM_AXI_DMSDM1WQOSCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1WQOSCONF	/;"	d
DM_AXI_DMSDM1WQOSCTSET0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1WQOSCTSET0	/;"	d
DM_AXI_DMSDM1WQOSIN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1WQOSIN	/;"	d
DM_AXI_DMSDM1WQOSQON	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1WQOSQON	/;"	d
DM_AXI_DMSDM1WQOSREQCTR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1WQOSREQCTR	/;"	d
DM_AXI_DMSDM1WQOSSTAT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMSDM1WQOSSTAT	/;"	d
DM_AXI_DMWQOSCTSET1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMWQOSCTSET1	/;"	d
DM_AXI_DMWQOSCTSET2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMWQOSCTSET2	/;"	d
DM_AXI_DMWQOSCTSET3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMWQOSCTSET3	/;"	d
DM_AXI_DMWQOSTHRES0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMWQOSTHRES0	/;"	d
DM_AXI_DMWQOSTHRES1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMWQOSTHRES1	/;"	d
DM_AXI_DMWQOSTHRES2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMWQOSTHRES2	/;"	d
DM_AXI_DMXREGDMSENN	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMXREGDMSENN	/;"	d
DM_AXI_DMXXDEFAULTSLAVESLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMXXDEFAULTSLAVESLVCONF	/;"	d
DM_AXI_DMXXDEFAULTSLAVESLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_DMXXDEFAULTSLAVESLVDMSCR	/;"	d
DM_AXI_MAPD2SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_MAPD2SLVCONF	/;"	d
DM_AXI_MAPD2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_MAPD2SLVDMSCR	/;"	d
DM_AXI_MAPD3SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_MAPD3SLVCONF	/;"	d
DM_AXI_MAPD3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_MAPD3SLVDMSCR	/;"	d
DM_AXI_MMAP0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_MMAP0SLVDMSCR	/;"	d
DM_AXI_MMAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_MMAP1SLVDMSCR	/;"	d
DM_AXI_QSPAPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_QSPAPSLVDMSCR	/;"	d
DM_AXI_RAP4SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_RAP4SLVDMSCR	/;"	d
DM_AXI_RAP5SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_RAP5SLVDMSCR	/;"	d
DM_AXI_RAPD4SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_RAPD4SLVCONF	/;"	d
DM_AXI_RAPD4SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_RAPD4SLVDMSCR	/;"	d
DM_AXI_RDMDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_RDMDMSCR	/;"	d
DM_AXI_SAP4SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SAP4SLVDMSCR	/;"	d
DM_AXI_SAP5SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SAP5SLVDMSCR	/;"	d
DM_AXI_SAP65SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SAP65SLVDMSCR	/;"	d
DM_AXI_SAP6SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SAP6SLVDMSCR	/;"	d
DM_AXI_SAPD4SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD4SLVCONF	/;"	d
DM_AXI_SAPD4SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD4SLVDMSCR	/;"	d
DM_AXI_SAPD5SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD5SLVCONF	/;"	d
DM_AXI_SAPD5SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD5SLVDMSCR	/;"	d
DM_AXI_SAPD65DSLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD65DSLVCONF	/;"	d
DM_AXI_SAPD65DSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD65DSLVDMSCR	/;"	d
DM_AXI_SAPD6SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD6SLVCONF	/;"	d
DM_AXI_SAPD6SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SAPD6SLVDMSCR	/;"	d
DM_AXI_SDAP0SLVCONF	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SDAP0SLVCONF	/;"	d
DM_AXI_SDAP0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	DM_AXI_SDAP0SLVDMSCR	/;"	d
DM_AXI_SDAP0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SDAP0SLVDMSCR	/;"	d
DM_AXI_SDAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SDAP1SLVDMSCR	/;"	d
DM_AXI_SDAP2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SDAP2SLVDMSCR	/;"	d
DM_AXI_SDAP3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SDAP3SLVDMSCR	/;"	d
DM_AXI_SDM0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SDM0DMSCR	/;"	d
DM_AXI_SDM1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define DM_AXI_SDM1DMSCR	/;"	d
DM_DEMO	drivers/demo/Kconfig	/^config DM_DEMO$/;"	c	menu:Demo for driver model
DM_DEMO_SHAPE	drivers/demo/Kconfig	/^config DM_DEMO_SHAPE$/;"	c	menu:Demo for driver model
DM_DEMO_SIMPLE	drivers/demo/Kconfig	/^config DM_DEMO_SIMPLE$/;"	c	menu:Demo for driver model
DM_DEVICE_REMOVE	drivers/core/Kconfig	/^config DM_DEVICE_REMOVE$/;"	c	menu:Generic Driver Options
DM_ETH	drivers/net/Kconfig	/^config DM_ETH$/;"	c
DM_FLAG_ACTIVATED	include/dm/device.h	/^#define DM_FLAG_ACTIVATED	/;"	d
DM_FLAG_ALLOC_PARENT_PDATA	include/dm/device.h	/^#define DM_FLAG_ALLOC_PARENT_PDATA	/;"	d
DM_FLAG_ALLOC_PDATA	include/dm/device.h	/^#define DM_FLAG_ALLOC_PDATA	/;"	d
DM_FLAG_ALLOC_PRIV_DMA	include/dm/device.h	/^#define DM_FLAG_ALLOC_PRIV_DMA	/;"	d
DM_FLAG_ALLOC_UCLASS_PDATA	include/dm/device.h	/^#define DM_FLAG_ALLOC_UCLASS_PDATA	/;"	d
DM_FLAG_BOUND	include/dm/device.h	/^#define DM_FLAG_BOUND	/;"	d
DM_FLAG_NAME_ALLOCED	include/dm/device.h	/^#define DM_FLAG_NAME_ALLOCED	/;"	d
DM_FLAG_OF_PLATDATA	include/dm/device.h	/^#define DM_FLAG_OF_PLATDATA	/;"	d
DM_FLAG_PRE_RELOC	include/dm/device.h	/^#define DM_FLAG_PRE_RELOC	/;"	d
DM_GET_DRIVER	include/dm/device.h	/^#define DM_GET_DRIVER(/;"	d
DM_GPIO	drivers/gpio/Kconfig	/^config DM_GPIO$/;"	c	menu:GPIO Support
DM_I2C	drivers/i2c/Kconfig	/^config DM_I2C$/;"	c	menu:I2C support
DM_I2C_CHIP_10BIT	include/i2c.h	/^	DM_I2C_CHIP_10BIT	= 1 << 0, \/* Use 10-bit addressing *\/$/;"	e	enum:dm_i2c_chip_flags
DM_I2C_CHIP_RD_ADDRESS	include/i2c.h	/^	DM_I2C_CHIP_RD_ADDRESS	= 1 << 1, \/* Send address for each read byte *\/$/;"	e	enum:dm_i2c_chip_flags
DM_I2C_CHIP_WR_ADDRESS	include/i2c.h	/^	DM_I2C_CHIP_WR_ADDRESS	= 1 << 2, \/* Send address for each write byte *\/$/;"	e	enum:dm_i2c_chip_flags
DM_I2C_COMPAT	drivers/i2c/Kconfig	/^config DM_I2C_COMPAT$/;"	c	menu:I2C support
DM_I2C_GPIO	drivers/i2c/Kconfig	/^config DM_I2C_GPIO$/;"	c	menu:I2C support
DM_KEYBOARD	drivers/input/Kconfig	/^config DM_KEYBOARD$/;"	c
DM_MAILBOX	drivers/mailbox/Kconfig	/^config DM_MAILBOX$/;"	c	menu:Mailbox Controller Support
DM_MAX_SEQ	include/dm/device.h	/^#define DM_MAX_SEQ	/;"	d
DM_MMC	drivers/mmc/Kconfig	/^config DM_MMC$/;"	c	menu:MMC Host controller Support
DM_MMC_OPS	drivers/mmc/Kconfig	/^config DM_MMC_OPS$/;"	c	menu:MMC Host controller Support
DM_MOD_EXP	drivers/crypto/rsa_mod_exp/Kconfig	/^config DM_MOD_EXP$/;"	c
DM_PBS_TX	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	DM_PBS_TX,$/;"	e	enum:auto_tune_stage
DM_PBS_TX_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define DM_PBS_TX_MASK_BIT	/;"	d
DM_PCA953X	drivers/gpio/Kconfig	/^config DM_PCA953X$/;"	c	menu:GPIO Support
DM_PCI	drivers/pci/Kconfig	/^config DM_PCI$/;"	c
DM_PCI_COMPAT	drivers/pci/Kconfig	/^config DM_PCI_COMPAT$/;"	c
DM_PMIC	drivers/power/pmic/Kconfig	/^config DM_PMIC$/;"	c
DM_PMIC_MAX77686	drivers/power/pmic/Kconfig	/^config DM_PMIC_MAX77686$/;"	c
DM_PMIC_PFUZE100	drivers/power/pmic/Kconfig	/^config DM_PMIC_PFUZE100$/;"	c
DM_PMIC_SANDBOX	drivers/power/pmic/Kconfig	/^config DM_PMIC_SANDBOX$/;"	c
DM_PWM	drivers/pwm/Kconfig	/^config DM_PWM$/;"	c
DM_REGULATOR	drivers/power/regulator/Kconfig	/^config DM_REGULATOR$/;"	c
DM_REGULATOR_FIXED	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_FIXED$/;"	c
DM_REGULATOR_GPIO	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_GPIO$/;"	c
DM_REGULATOR_LP873X	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_LP873X$/;"	c
DM_REGULATOR_MAX77686	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_MAX77686$/;"	c
DM_REGULATOR_PALMAS	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_PALMAS$/;"	c
DM_REGULATOR_PFUZE100	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_PFUZE100$/;"	c
DM_REGULATOR_SANDBOX	drivers/power/regulator/Kconfig	/^config DM_REGULATOR_SANDBOX$/;"	c
DM_RESET	drivers/reset/Kconfig	/^config DM_RESET$/;"	c	menu:Reset Controller Support
DM_ROOT_NON_CONST	include/dm/device-internal.h	/^#define DM_ROOT_NON_CONST	/;"	d
DM_RTC	drivers/rtc/Kconfig	/^config DM_RTC$/;"	c	menu:Real Time Clock
DM_SEQ_ALIAS	drivers/core/Kconfig	/^config DM_SEQ_ALIAS$/;"	c	menu:Generic Driver Options
DM_SERIAL	drivers/serial/Kconfig	/^config DM_SERIAL$/;"	c	menu:Serial drivers
DM_SPI	drivers/spi/Kconfig	/^config DM_SPI$/;"	c	menu:SPI Support
DM_SPI_FLASH	drivers/mtd/spi/Kconfig	/^config DM_SPI_FLASH$/;"	c	menu:SPI Flash Support
DM_STDIO	drivers/core/Kconfig	/^config DM_STDIO$/;"	c	menu:Generic Driver Options
DM_TEST	include/dm/test.h	/^#define DM_TEST(/;"	d
DM_TESTF_PROBE_TEST	include/dm/test.h	/^	DM_TESTF_PROBE_TEST	= 1 << 1,	\/* probe test uclass *\/$/;"	e	enum:__anon26bb1aae0403
DM_TESTF_SCAN_FDT	include/dm/test.h	/^	DM_TESTF_SCAN_FDT	= 1 << 2,	\/* scan device tree *\/$/;"	e	enum:__anon26bb1aae0403
DM_TESTF_SCAN_PDATA	include/dm/test.h	/^	DM_TESTF_SCAN_PDATA	= 1 << 0,	\/* test needs platform data *\/$/;"	e	enum:__anon26bb1aae0403
DM_TEST_ETH_NUM	test/dm/eth.c	/^#define DM_TEST_ETH_NUM	/;"	d	file:
DM_TEST_OP_BIND	include/dm/test.h	/^	DM_TEST_OP_BIND = 0,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_COUNT	include/dm/test.h	/^	DM_TEST_OP_COUNT,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_DESTROY	include/dm/test.h	/^	DM_TEST_OP_DESTROY,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_INIT	include/dm/test.h	/^	DM_TEST_OP_INIT,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_POST_BIND	include/dm/test.h	/^	DM_TEST_OP_POST_BIND,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_POST_PROBE	include/dm/test.h	/^	DM_TEST_OP_POST_PROBE,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_PRE_PROBE	include/dm/test.h	/^	DM_TEST_OP_PRE_PROBE,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_PRE_REMOVE	include/dm/test.h	/^	DM_TEST_OP_PRE_REMOVE,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_PRE_UNBIND	include/dm/test.h	/^	DM_TEST_OP_PRE_UNBIND,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_PROBE	include/dm/test.h	/^	DM_TEST_OP_PROBE,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_REMOVE	include/dm/test.h	/^	DM_TEST_OP_REMOVE,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_OP_UNBIND	include/dm/test.h	/^	DM_TEST_OP_UNBIND,$/;"	e	enum:__anon26bb1aae0103
DM_TEST_START_TOTAL	include/dm/test.h	/^#define DM_TEST_START_TOTAL	/;"	d
DM_TEST_TYPE_FIRST	include/dm/test.h	/^	DM_TEST_TYPE_FIRST = 0,$/;"	e	enum:__anon26bb1aae0203
DM_TEST_TYPE_SECOND	include/dm/test.h	/^	DM_TEST_TYPE_SECOND,$/;"	e	enum:__anon26bb1aae0203
DM_THERMAL	drivers/thermal/Kconfig	/^config DM_THERMAL$/;"	c
DM_TIMER0_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER0_BASE	/;"	d
DM_TIMER1_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER1_BASE	/;"	d
DM_TIMER2_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER2_BASE	/;"	d
DM_TIMER3_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER3_BASE	/;"	d
DM_TIMER4_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER4_BASE	/;"	d
DM_TIMER5_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER5_BASE	/;"	d
DM_TIMER6_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER6_BASE	/;"	d
DM_TIMER7_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define DM_TIMER7_BASE	/;"	d
DM_UCLASS_ROOT_NON_CONST	include/dm/device-internal.h	/^#define DM_UCLASS_ROOT_NON_CONST	/;"	d
DM_UC_FLAG_SEQ_ALIAS	include/dm/uclass.h	/^#define DM_UC_FLAG_SEQ_ALIAS	/;"	d
DM_USB	drivers/usb/Kconfig	/^config DM_USB$/;"	c
DM_VIDEO	drivers/video/Kconfig	/^config DM_VIDEO$/;"	c	menu:Graphics support
DM_WARN	drivers/core/Kconfig	/^config DM_WARN$/;"	c	menu:Generic Driver Options
DNAD	include/sym53c8xx.h	/^#define DNAD	/;"	d
DNAK	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	DNAK	/;"	d
DNAME_INLINE_LEN_MIN	fs/ubifs/ubifs.h	/^#define DNAME_INLINE_LEN_MIN /;"	d
DNET_CAPS_MASK	drivers/net/dnet.h	/^#define DNET_CAPS_MASK	/;"	d
DNET_FIFO_RX_CMD_AF_TH	drivers/net/dnet.h	/^#define DNET_FIFO_RX_CMD_AF_TH	/;"	d
DNET_FIFO_SIZE	drivers/net/dnet.h	/^#define DNET_FIFO_SIZE	/;"	d
DNET_FIFO_TX_DATA_AE_TH	drivers/net/dnet.h	/^#define DNET_FIFO_TX_DATA_AE_TH	/;"	d
DNET_FIFO_TX_DATA_AF_TH	drivers/net/dnet.h	/^#define DNET_FIFO_TX_DATA_AF_TH	/;"	d
DNET_HAS_DMA	drivers/net/dnet.h	/^#define DNET_HAS_DMA	/;"	d
DNET_HAS_GIGABIT	drivers/net/dnet.h	/^#define DNET_HAS_GIGABIT	/;"	d
DNET_HAS_IRQ	drivers/net/dnet.h	/^#define DNET_HAS_IRQ	/;"	d
DNET_HAS_MDIO	drivers/net/dnet.h	/^#define DNET_HAS_MDIO	/;"	d
DNET_HAS_MII	drivers/net/dnet.h	/^#define DNET_HAS_MII	/;"	d
DNET_HAS_RMII	drivers/net/dnet.h	/^#define DNET_HAS_RMII	/;"	d
DNET_INTERNAL_GMII_MNG_CMD_FIN	drivers/net/dnet.h	/^#define DNET_INTERNAL_GMII_MNG_CMD_FIN	/;"	d
DNET_INTERNAL_GMII_MNG_CTL_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_GMII_MNG_CTL_REG	/;"	d
DNET_INTERNAL_GMII_MNG_DAT_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_GMII_MNG_DAT_REG	/;"	d
DNET_INTERNAL_IGP_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_IGP_REG	/;"	d
DNET_INTERNAL_MAC_ADDR_0_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_MAC_ADDR_0_REG	/;"	d
DNET_INTERNAL_MAC_ADDR_1_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_MAC_ADDR_1_REG	/;"	d
DNET_INTERNAL_MAC_ADDR_2_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_MAC_ADDR_2_REG	/;"	d
DNET_INTERNAL_MAX_PKT_SIZE_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_MAX_PKT_SIZE_REG	/;"	d
DNET_INTERNAL_MODE_FCEN	drivers/net/dnet.h	/^#define DNET_INTERNAL_MODE_FCEN	/;"	d
DNET_INTERNAL_MODE_GBITEN	drivers/net/dnet.h	/^#define DNET_INTERNAL_MODE_GBITEN	/;"	d
DNET_INTERNAL_MODE_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_MODE_REG	/;"	d
DNET_INTERNAL_MODE_RXEN	drivers/net/dnet.h	/^#define DNET_INTERNAL_MODE_RXEN	/;"	d
DNET_INTERNAL_MODE_TXEN	drivers/net/dnet.h	/^#define DNET_INTERNAL_MODE_TXEN	/;"	d
DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS	/;"	d
DNET_INTERNAL_RXTX_CONTROL_DISTXFCS	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_DISTXFCS	/;"	d
DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL	/;"	d
DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP	/;"	d
DNET_INTERNAL_RXTX_CONTROL_ENPROMISC	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_ENPROMISC	/;"	d
DNET_INTERNAL_RXTX_CONTROL_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_REG	/;"	d
DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST	/;"	d
DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST	/;"	d
DNET_INTERNAL_RXTX_CONTROL_RXPAUSE	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_RXPAUSE	/;"	d
DNET_INTERNAL_RXTX_CONTROL_RXSHORTFRAME	drivers/net/dnet.h	/^#define DNET_INTERNAL_RXTX_CONTROL_RXSHORTFRAME	/;"	d
DNET_INTERNAL_TX_RX_STS_REG	drivers/net/dnet.h	/^#define DNET_INTERNAL_TX_RX_STS_REG	/;"	d
DNET_INTERNAL_WRITE	drivers/net/dnet.h	/^#define DNET_INTERNAL_WRITE	/;"	d
DNET_INTR_ENB_GLOBAL_ENABLE	drivers/net/dnet.h	/^#define DNET_INTR_ENB_GLOBAL_ENABLE	/;"	d
DNET_INTR_ENB_RX_ERROR	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_ERROR	/;"	d
DNET_INTR_ENB_RX_FIFOAE	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_FIFOAE	/;"	d
DNET_INTR_ENB_RX_FIFOAF	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_FIFOAF	/;"	d
DNET_INTR_ENB_RX_FIFOERR	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_FIFOERR	/;"	d
DNET_INTR_ENB_RX_FIFOFULL	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_FIFOFULL	/;"	d
DNET_INTR_ENB_RX_PKTRDY	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_PKTRDY	/;"	d
DNET_INTR_ENB_RX_SUMMARY	drivers/net/dnet.h	/^#define DNET_INTR_ENB_RX_SUMMARY	/;"	d
DNET_INTR_ENB_TX_DISCFRM	drivers/net/dnet.h	/^#define DNET_INTR_ENB_TX_DISCFRM	/;"	d
DNET_INTR_ENB_TX_FIFOAE	drivers/net/dnet.h	/^#define DNET_INTR_ENB_TX_FIFOAE	/;"	d
DNET_INTR_ENB_TX_FIFOAF	drivers/net/dnet.h	/^#define DNET_INTR_ENB_TX_FIFOAF	/;"	d
DNET_INTR_ENB_TX_FIFOFULL	drivers/net/dnet.h	/^#define DNET_INTR_ENB_TX_FIFOFULL	/;"	d
DNET_INTR_ENB_TX_PKTSENT	drivers/net/dnet.h	/^#define DNET_INTR_ENB_TX_PKTSENT	/;"	d
DNET_INTR_ENB_TX_SUMMARY	drivers/net/dnet.h	/^#define DNET_INTR_ENB_TX_SUMMARY	/;"	d
DNET_INTR_SRC_PHY	drivers/net/dnet.h	/^#define DNET_INTR_SRC_PHY	/;"	d
DNET_INTR_SRC_RX_CMDFIFOAF	drivers/net/dnet.h	/^#define DNET_INTR_SRC_RX_CMDFIFOAF	/;"	d
DNET_INTR_SRC_RX_CMDFIFOFF	drivers/net/dnet.h	/^#define DNET_INTR_SRC_RX_CMDFIFOFF	/;"	d
DNET_INTR_SRC_RX_DATAFIFOFF	drivers/net/dnet.h	/^#define DNET_INTR_SRC_RX_DATAFIFOFF	/;"	d
DNET_INTR_SRC_RX_SUMMARY	drivers/net/dnet.h	/^#define DNET_INTR_SRC_RX_SUMMARY	/;"	d
DNET_INTR_SRC_TX_DISCFRM	drivers/net/dnet.h	/^#define DNET_INTR_SRC_TX_DISCFRM	/;"	d
DNET_INTR_SRC_TX_FIFOAE	drivers/net/dnet.h	/^#define DNET_INTR_SRC_TX_FIFOAE	/;"	d
DNET_INTR_SRC_TX_FIFOAF	drivers/net/dnet.h	/^#define DNET_INTR_SRC_TX_FIFOAF	/;"	d
DNET_INTR_SRC_TX_FIFOFULL	drivers/net/dnet.h	/^#define DNET_INTR_SRC_TX_FIFOFULL	/;"	d
DNET_INTR_SRC_TX_PKTSENT	drivers/net/dnet.h	/^#define DNET_INTR_SRC_TX_PKTSENT	/;"	d
DNET_INTR_SRC_TX_SUMMARY	drivers/net/dnet.h	/^#define DNET_INTR_SRC_TX_SUMMARY	/;"	d
DNET_SYS_CTL_IGNORENEXTPKT	drivers/net/dnet.h	/^#define DNET_SYS_CTL_IGNORENEXTPKT	/;"	d
DNET_SYS_CTL_RXFIFOFLUSH	drivers/net/dnet.h	/^#define DNET_SYS_CTL_RXFIFOFLUSH	/;"	d
DNET_SYS_CTL_SENDPAUSE	drivers/net/dnet.h	/^#define DNET_SYS_CTL_SENDPAUSE	/;"	d
DNET_SYS_CTL_TXFIFOFLUSH	drivers/net/dnet.h	/^#define DNET_SYS_CTL_TXFIFOFLUSH	/;"	d
DNET_TX_STATUS_FIFO_ALMOST_EMPTY	drivers/net/dnet.h	/^#define DNET_TX_STATUS_FIFO_ALMOST_EMPTY	/;"	d
DNET_TX_STATUS_FIFO_ALMOST_FULL	drivers/net/dnet.h	/^#define DNET_TX_STATUS_FIFO_ALMOST_FULL	/;"	d
DNODES_PER_BLOCK	include/zfs/dnode.h	/^#define	DNODES_PER_BLOCK	/;"	d
DNODES_PER_BLOCK_SHIFT	include/zfs/dnode.h	/^#define	DNODES_PER_BLOCK_SHIFT	/;"	d
DNODES_PER_LEVEL_SHIFT	include/zfs/dnode.h	/^#define	DNODES_PER_LEVEL_SHIFT	/;"	d
DNODE_BLOCK_SHIFT	include/zfs/dnode.h	/^#define	DNODE_BLOCK_SHIFT	/;"	d
DNODE_CORE_SIZE	include/zfs/dnode.h	/^#define	DNODE_CORE_SIZE	/;"	d
DNODE_FLAG_SPILL_BLKPTR	include/zfs/dnode.h	/^#define	DNODE_FLAG_SPILL_BLKPTR /;"	d
DNODE_SHIFT	include/zfs/dnode.h	/^#define	DNODE_SHIFT	/;"	d
DNODE_SIZE	include/zfs/dnode.h	/^#define	DNODE_SIZE	/;"	d
DNS	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
DNS325_GPIO_LED_POWER	board/d-link/dns325/dns325.h	/^#define DNS325_GPIO_LED_POWER	/;"	d
DNS325_GPIO_SATA0_EN	board/d-link/dns325/dns325.h	/^#define DNS325_GPIO_SATA0_EN	/;"	d
DNS325_GPIO_SATA1_EN	board/d-link/dns325/dns325.h	/^#define DNS325_GPIO_SATA1_EN	/;"	d
DNS325_OE_HIGH	board/d-link/dns325/dns325.h	/^#define DNS325_OE_HIGH	/;"	d
DNS325_OE_LOW	board/d-link/dns325/dns325.h	/^#define DNS325_OE_LOW	/;"	d
DNS325_OE_VAL_HIGH	board/d-link/dns325/dns325.h	/^#define DNS325_OE_VAL_HIGH	/;"	d
DNS325_OE_VAL_LOW	board/d-link/dns325/dns325.h	/^#define DNS325_OE_VAL_LOW	/;"	d
DNS_A_RECORD	net/dns.h	/^	DNS_A_RECORD = 0x01,$/;"	e	enum:dns_query_type
DNS_CALLBACK	include/env_callback.h	/^#define DNS_CALLBACK /;"	d
DNS_CALLBACK	include/env_callback.h	/^#define DNS_CALLBACK$/;"	d
DNS_CNAME_RECORD	net/dns.h	/^	DNS_CNAME_RECORD = 0x05,$/;"	e	enum:dns_query_type
DNS_MX_RECORD	net/dns.h	/^	DNS_MX_RECORD = 0x0f,$/;"	e	enum:dns_query_type
DNS_SERVICE_PORT	net/dns.h	/^#define DNS_SERVICE_PORT /;"	d
DNS_TIMEOUT	net/dns.h	/^#define DNS_TIMEOUT /;"	d
DN_BONUS	include/zfs/dnode.h	/^#define	DN_BONUS(/;"	d
DN_MAX_BONUSLEN	include/zfs/dnode.h	/^#define	DN_MAX_BONUSLEN	/;"	d
DN_MAX_INDBLKSHIFT	include/zfs/dnode.h	/^#define	DN_MAX_INDBLKSHIFT	/;"	d
DN_MAX_NBLKPTR	include/zfs/dnode.h	/^#define	DN_MAX_NBLKPTR	/;"	d
DN_MAX_OBJECT	include/zfs/dnode.h	/^#define	DN_MAX_OBJECT	/;"	d
DN_MAX_OBJECT_SHIFT	include/zfs/dnode.h	/^#define	DN_MAX_OBJECT_SHIFT	/;"	d
DN_MAX_OFFSET_SHIFT	include/zfs/dnode.h	/^#define	DN_MAX_OFFSET_SHIFT	/;"	d
DN_MIN_INDBLKSHIFT	include/zfs/dnode.h	/^#define	DN_MIN_INDBLKSHIFT	/;"	d
DO1	lib/zlib/adler32.c	/^#define DO1(/;"	d	file:
DO16	lib/zlib/adler32.c	/^#define DO16(/;"	d	file:
DO2	lib/zlib/adler32.c	/^#define DO2(/;"	d	file:
DO4	lib/zlib/adler32.c	/^#define DO4(/;"	d	file:
DO8	lib/zlib/adler32.c	/^#define DO8(/;"	d	file:
DOC	scripts/fill_scrapyard.py	/^DOC='doc\/README.scrapyard'$/;"	v
DOCBOOK	scripts/docproc.c	/^#define DOCBOOK /;"	d	file:
DOCBOOKS	doc/DocBook/Makefile	/^DOCBOOKS := linker_lists.xml stdio.xml$/;"	m
DOCKSTAR_OE_HIGH	board/Seagate/dockstar/dockstar.h	/^#define DOCKSTAR_OE_HIGH	/;"	d
DOCKSTAR_OE_LOW	board/Seagate/dockstar/dockstar.h	/^#define DOCKSTAR_OE_LOW	/;"	d
DOCKSTAR_OE_VAL_HIGH	board/Seagate/dockstar/dockstar.h	/^#define DOCKSTAR_OE_VAL_HIGH	/;"	d
DOCKSTAR_OE_VAL_LOW	board/Seagate/dockstar/dockstar.h	/^#define DOCKSTAR_OE_VAL_LOW	/;"	d
DOCPROC	doc/DocBook/Makefile	/^DOCPROC   = $(objtree)\/scripts\/docproc$/;"	m
DOC_ChipID_Doc2k	include/linux/mtd/doc2000.h	/^#define DOC_ChipID_Doc2k	/;"	d
DOC_ChipID_Doc2kTSOP	include/linux/mtd/doc2000.h	/^#define DOC_ChipID_Doc2kTSOP	/;"	d
DOC_ChipID_DocMil	include/linux/mtd/doc2000.h	/^#define DOC_ChipID_DocMil	/;"	d
DOC_ChipID_DocMilPlus16	include/linux/mtd/doc2000.h	/^#define DOC_ChipID_DocMilPlus16	/;"	d
DOC_ChipID_DocMilPlus32	include/linux/mtd/doc2000.h	/^#define DOC_ChipID_DocMilPlus32	/;"	d
DOC_ECC_DIS	include/linux/mtd/doc2000.h	/^#define DOC_ECC_DIS /;"	d
DOC_ECC_EN	include/linux/mtd/doc2000.h	/^#define DOC_ECC_EN /;"	d
DOC_ECC_ERROR	include/linux/mtd/doc2000.h	/^#define DOC_ECC_ERROR	/;"	d
DOC_ECC_IGNORE	include/linux/mtd/doc2000.h	/^#define DOC_ECC_IGNORE	/;"	d
DOC_ECC_RESET	include/linux/mtd/doc2000.h	/^#define DOC_ECC_RESET	/;"	d
DOC_ECC_RESV	include/linux/mtd/doc2000.h	/^#define DOC_ECC_RESV	/;"	d
DOC_ECC_RW	include/linux/mtd/doc2000.h	/^#define DOC_ECC_RW	/;"	d
DOC_ECC__EN	include/linux/mtd/doc2000.h	/^#define DOC_ECC__EN	/;"	d
DOC_FLASH_BANK	include/linux/mtd/doc2000.h	/^#define DOC_FLASH_BANK	/;"	d
DOC_FLASH_CE	include/linux/mtd/doc2000.h	/^#define DOC_FLASH_CE	/;"	d
DOC_FLASH_WP	include/linux/mtd/doc2000.h	/^#define DOC_FLASH_WP	/;"	d
DOC_IOREMAP_LEN	include/linux/mtd/doc2000.h	/^#define DOC_IOREMAP_LEN /;"	d
DOC_MODE_BDECT	include/linux/mtd/doc2000.h	/^#define	DOC_MODE_BDECT	/;"	d
DOC_MODE_CLR_ERR	include/linux/mtd/doc2000.h	/^#define DOC_MODE_CLR_ERR	/;"	d
DOC_MODE_MDWREN	include/linux/mtd/doc2000.h	/^#define DOC_MODE_MDWREN	/;"	d
DOC_MODE_NORMAL	include/linux/mtd/doc2000.h	/^#define DOC_MODE_NORMAL	/;"	d
DOC_MODE_RESERVED1	include/linux/mtd/doc2000.h	/^#define DOC_MODE_RESERVED1	/;"	d
DOC_MODE_RESERVED2	include/linux/mtd/doc2000.h	/^#define DOC_MODE_RESERVED2	/;"	d
DOC_MODE_RESET	include/linux/mtd/doc2000.h	/^#define DOC_MODE_RESET	/;"	d
DOC_MODE_RST_LAT	include/linux/mtd/doc2000.h	/^#define	DOC_MODE_RST_LAT	/;"	d
DOC_TOGGLE_BIT	include/linux/mtd/doc2000.h	/^#define DOC_TOGGLE_BIT	/;"	d
DOEPMSK_INIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DOEPMSK_INIT	/;"	d
DOEPT_SIZ_PKT_CNT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DOEPT_SIZ_PKT_CNT(/;"	d
DOEPT_SIZ_XFER_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DOEPT_SIZ_XFER_SIZE(/;"	d
DOEPT_SIZ_XFER_SIZE_MAX_EP	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DOEPT_SIZ_XFER_SIZE_MAX_EP /;"	d
DOEPT_SIZ_XFER_SIZE_MAX_EP0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define DOEPT_SIZ_XFER_SIZE_MAX_EP0 /;"	d
DOGTHD0	drivers/net/ax88180.h	/^#define DOGTHD0	/;"	d
DOGTHD1	drivers/net/ax88180.h	/^#define DOGTHD1	/;"	d
DOMAIN_CLIENT	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_CLIENT	/;"	d
DOMAIN_IO	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_IO	/;"	d
DOMAIN_KERNEL	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_KERNEL	/;"	d
DOMAIN_MANAGER	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_MANAGER	/;"	d
DOMAIN_NOACCESS	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_NOACCESS	/;"	d
DOMAIN_TABLE	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_TABLE	/;"	d
DOMAIN_USER	arch/arm/include/asm/proc-armv/domain.h	/^#define DOMAIN_USER	/;"	d
DONE	lib/zlib/inflate.h	/^    DONE,       \/* finished check, done -- remain here until reset *\/$/;"	e	enum:__anon43d5a4c40103
DOS_BOOT_MAGIC_OFFSET	fs/fat/fat.c	/^#define DOS_BOOT_MAGIC_OFFSET	/;"	d	file:
DOS_ENTRY_NUMBERS	include/part.h	/^#define DOS_ENTRY_NUMBERS	/;"	d
DOS_FS32_TYPE_OFFSET	cmd/zfs.c	/^#define DOS_FS32_TYPE_OFFSET	/;"	d	file:
DOS_FS32_TYPE_OFFSET	fs/fat/fat.c	/^#define DOS_FS32_TYPE_OFFSET	/;"	d	file:
DOS_FS_TYPE_OFFSET	cmd/zfs.c	/^#define DOS_FS_TYPE_OFFSET	/;"	d	file:
DOS_FS_TYPE_OFFSET	fs/fat/fat.c	/^#define DOS_FS_TYPE_OFFSET	/;"	d	file:
DOS_MBR	disk/part_dos.h	/^#define DOS_MBR	/;"	d
DOS_PART_DEFAULT_SECTOR	disk/part_dos.c	/^#define DOS_PART_DEFAULT_SECTOR /;"	d	file:
DOS_PART_DISKSIG_OFFSET	disk/part_dos.h	/^#define DOS_PART_DISKSIG_OFFSET	/;"	d
DOS_PART_MAGIC_OFFSET	cmd/zfs.c	/^#define DOS_PART_MAGIC_OFFSET	/;"	d	file:
DOS_PART_MAGIC_OFFSET	disk/part_dos.h	/^#define DOS_PART_MAGIC_OFFSET	/;"	d
DOS_PART_TBL_OFFSET	disk/part_dos.h	/^#define DOS_PART_TBL_OFFSET	/;"	d
DOS_PBR	disk/part_dos.h	/^#define DOS_PBR	/;"	d
DOS_PBR32_FSTYPE_OFFSET	disk/part_dos.h	/^#define DOS_PBR32_FSTYPE_OFFSET	/;"	d
DOS_PBR_FSTYPE_OFFSET	disk/part_dos.h	/^#define DOS_PBR_FSTYPE_OFFSET	/;"	d
DOS_PBR_MEDIA_TYPE_OFFSET	disk/part_dos.h	/^#define DOS_PBR_MEDIA_TYPE_OFFSET	/;"	d
DOT_DOT_OFFSET	fs/reiserfs/reiserfs_private.h	/^#define DOT_DOT_OFFSET /;"	d
DOT_OFFSET	fs/reiserfs/reiserfs_private.h	/^#define DOT_OFFSET /;"	d
DOUBLE_FAULT	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define DOUBLE_FAULT	/;"	d
DOUBLE_FAULT_A	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define DOUBLE_FAULT_A	/;"	d
DOUBLE_FAULT_B	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define DOUBLE_FAULT_B	/;"	d
DOUT_ACLK_CCORE_133	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_CCORE_133	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_CCORE_133	/;"	d
DOUT_ACLK_FSYS0_200	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS0_200	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS0_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_FSYS1_200	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_FSYS1_200	/;"	d
DOUT_ACLK_MSCL_532	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_MSCL_532	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_MSCL_532	/;"	d
DOUT_ACLK_PERIC0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC0	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC0	/;"	d
DOUT_ACLK_PERIC1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIC1	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIC1	/;"	d
DOUT_ACLK_PERIS	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_ACLK_PERIS	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_ACLK_PERIS	/;"	d
DOUT_PCLK_FSYS1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_FSYS1	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_FSYS1	/;"	d
DOUT_PCLK_MSCL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_PCLK_MSCL	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_PCLK_MSCL	/;"	d
DOUT_SCLK_AUD_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_AUD_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_AUD_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS0_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS0_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_BUS1_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_BUS1_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_CC_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_CC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MFC_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MFC_PLL	/;"	d
DOUT_SCLK_MMC0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC0	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC0	/;"	d
DOUT_SCLK_MMC1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC1	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC1	/;"	d
DOUT_SCLK_MMC2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_MMC2	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_MMC2	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_PHY_FSYS1_26M	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_PHY_FSYS1_26M	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOUT_SCLK_UFSUNIPRO20	include/dt-bindings/clock/exynos7420-clk.h	/^#define DOUT_SCLK_UFSUNIPRO20	/;"	d
DOVE_DDR_BASE_CS_OFF	arch/arm/mach-mvebu/mbus.c	/^#define DOVE_DDR_BASE_CS_OFF(/;"	d	file:
DOWNHEAP	lib/bzip2/bzlib_huffman.c	/^#define DOWNHEAP(/;"	d	file:
DOWNTO16	arch/x86/lib/bios.h	/^#define DOWNTO16(/;"	d
DOWNTO8	arch/x86/lib/bios.h	/^#define DOWNTO8(/;"	d
DOZE	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define DOZE /;"	d
DO_CLI	arch/blackfin/lib/ins.S	/^# define DO_CLI /;"	d	file:
DO_CLOCKS	arch/arm/mach-exynos/lowlevel_init.c	/^	DO_CLOCKS	= 1 << 1,$/;"	e	enum:__anonfd329dea0103	file:
DO_CRC	drivers/mtd/ubi/crc32.c	/^#  define DO_CRC(/;"	d	file:
DO_CRC	lib/crc32.c	/^#  define DO_CRC(/;"	d	file:
DO_FAST_LINK_TRAINING	drivers/video/tegra124/dp.c	/^#define DO_FAST_LINK_TRAINING	/;"	d	file:
DO_MEM_RESET	arch/arm/mach-exynos/lowlevel_init.c	/^	DO_MEM_RESET	= 1 << 2,$/;"	e	enum:__anonfd329dea0103	file:
DO_POWER	arch/arm/mach-exynos/lowlevel_init.c	/^	DO_POWER	= 1 << 4,$/;"	e	enum:__anonfd329dea0103	file:
DO_STATIC_RELA	Makefile	/^DO_STATIC_RELA = \\$/;"	m
DO_STATIC_RELA	Makefile	/^DO_STATIC_RELA =$/;"	m
DO_STI	arch/blackfin/lib/ins.S	/^# define DO_STI /;"	d	file:
DO_UART	arch/arm/mach-exynos/lowlevel_init.c	/^	DO_UART		= 1 << 3,$/;"	e	enum:__anonfd329dea0103	file:
DO_WAKEUP	arch/arm/mach-exynos/lowlevel_init.c	/^	DO_WAKEUP	= 1 << 0,$/;"	e	enum:__anonfd329dea0103	file:
DP501_I2C_ADDR	board/gdsys/common/dp501.c	/^#define DP501_I2C_ADDR /;"	d	file:
DP83630_PHY_PAGESEL_REG	drivers/net/phy/natsemi.c	/^#define DP83630_PHY_PAGESEL_REG	/;"	d	file:
DP83630_PHY_PTP_CLKOUT_EN	drivers/net/phy/natsemi.c	/^#define DP83630_PHY_PTP_CLKOUT_EN	/;"	d	file:
DP83630_PHY_PTP_COC_REG	drivers/net/phy/natsemi.c	/^#define DP83630_PHY_PTP_COC_REG	/;"	d	file:
DP83630_PHY_RBR_REG	drivers/net/phy/natsemi.c	/^#define DP83630_PHY_RBR_REG	/;"	d	file:
DP83630_driver	drivers/net/phy/natsemi.c	/^static struct phy_driver DP83630_driver = {$/;"	v	typeref:struct:phy_driver	file:
DP83848_100BASE_T4	include/dp83848.h	/^#define DP83848_100BASE_T4	/;"	d
DP83848_100BASE_TX_FD	include/dp83848.h	/^#define DP83848_100BASE_TX_FD	/;"	d
DP83848_100BASE_TX_HD	include/dp83848.h	/^#define DP83848_100BASE_TX_HD	/;"	d
DP83848_10BASE_T_FD	include/dp83848.h	/^#define DP83848_10BASE_T_FD	/;"	d
DP83848_10BASE_T_HD	include/dp83848.h	/^#define DP83848_10BASE_T_HD	/;"	d
DP83848_10_FDX	include/dp83848.h	/^#define DP83848_10_FDX	/;"	d
DP83848_10_HDX	include/dp83848.h	/^#define DP83848_10_HDX	/;"	d
DP83848_ACK	include/dp83848.h	/^#define DP83848_ACK	/;"	d
DP83848_ANA_REG	include/dp83848.h	/^#define DP83848_ANA_REG	/;"	d
DP83848_ANE_REG	include/dp83848.h	/^#define DP83848_ANE_REG	/;"	d
DP83848_ANLPA_REG	include/dp83848.h	/^#define DP83848_ANLPA_REG	/;"	d
DP83848_AN_IEEE_802_3	include/dp83848.h	/^#define DP83848_AN_IEEE_802_3	/;"	d
DP83848_AUTONEG	include/dp83848.h	/^#define DP83848_AUTONEG	/;"	d
DP83848_AUTONEG_ABILITY	include/dp83848.h	/^#define DP83848_AUTONEG_ABILITY	/;"	d
DP83848_AUTONEG_COMP	include/dp83848.h	/^#define DP83848_AUTONEG_COMP	/;"	d
DP83848_AUTONEG_COMPLETE	include/dp83848.h	/^#define DP83848_AUTONEG_COMPLETE	/;"	d
DP83848_COLLISION_TEST	include/dp83848.h	/^#define DP83848_COLLISION_TEST	/;"	d
DP83848_CTL_REG	include/dp83848.h	/^#define DP83848_CTL_REG	/;"	d
DP83848_DESCRAM_LOCK	include/dp83848.h	/^#define DP83848_DESCRAM_LOCK	/;"	d
DP83848_DUPLEX	include/dp83848.h	/^#define DP83848_DUPLEX	/;"	d
DP83848_DUPLEX_MODE	include/dp83848.h	/^#define DP83848_DUPLEX_MODE	/;"	d
DP83848_EXTEND_CAPAB	include/dp83848.h	/^#define DP83848_EXTEND_CAPAB	/;"	d
DP83848_FALSE_CAR_SENSE	include/dp83848.h	/^#define DP83848_FALSE_CAR_SENSE	/;"	d
DP83848_ISOLATE	include/dp83848.h	/^#define DP83848_ISOLATE	/;"	d
DP83848_JABBER	include/dp83848.h	/^#define DP83848_JABBER	/;"	d
DP83848_JABBER_DETECT	include/dp83848.h	/^#define DP83848_JABBER_DETECT	/;"	d
DP83848_LINK	include/dp83848.h	/^#define DP83848_LINK	/;"	d
DP83848_LINK_STATUS	include/dp83848.h	/^#define DP83848_LINK_STATUS	/;"	d
DP83848_LOOPBACK	include/dp83848.h	/^#define DP83848_LOOPBACK	/;"	d
DP83848_LOOPBACK_STAT	include/dp83848.h	/^#define DP83848_LOOPBACK_STAT	/;"	d
DP83848_LP_AN_ABLE	include/dp83848.h	/^#define DP83848_LP_AN_ABLE	/;"	d
DP83848_LP_NP_ABLE	include/dp83848.h	/^#define DP83848_LP_NP_ABLE	/;"	d
DP83848_MF_PREAMB_SUPPR	include/dp83848.h	/^#define DP83848_MF_PREAMB_SUPPR	/;"	d
DP83848_NP	include/dp83848.h	/^#define DP83848_NP	/;"	d
DP83848_NP_ABLE	include/dp83848.h	/^#define DP83848_NP_ABLE	/;"	d
DP83848_PAGE_RCV	include/dp83848.h	/^#define DP83848_PAGE_RCV	/;"	d
DP83848_PAGE_RX	include/dp83848.h	/^#define DP83848_PAGE_RX	/;"	d
DP83848_PAUSE	include/dp83848.h	/^#define DP83848_PAUSE	/;"	d
DP83848_PDF	include/dp83848.h	/^#define DP83848_PDF	/;"	d
DP83848_PHYID1_OUI	include/dp83848.h	/^#define DP83848_PHYID1_OUI	/;"	d
DP83848_PHYID1_REG	include/dp83848.h	/^#define DP83848_PHYID1_REG	/;"	d
DP83848_PHYID2_OUI	include/dp83848.h	/^#define DP83848_PHYID2_OUI	/;"	d
DP83848_PHYID2_REG	include/dp83848.h	/^#define DP83848_PHYID2_REG	/;"	d
DP83848_PHY_CTRL_REG	include/dp83848.h	/^#define DP83848_PHY_CTRL_REG	/;"	d
DP83848_PHY_INTR_CTRL_REG	include/dp83848.h	/^#define DP83848_PHY_INTR_CTRL_REG	/;"	d
DP83848_PHY_RMT_FAULT	include/dp83848.h	/^#define DP83848_PHY_RMT_FAULT	/;"	d
DP83848_PHY_STAT_REG	include/dp83848.h	/^#define DP83848_PHY_STAT_REG	/;"	d
DP83848_POLARITY_STAT	include/dp83848.h	/^#define DP83848_POLARITY_STAT	/;"	d
DP83848_POWER_DOWN	include/dp83848.h	/^#define DP83848_POWER_DOWN	/;"	d
DP83848_RESET	include/dp83848.h	/^#define DP83848_RESET	/;"	d
DP83848_RESTART_AUTONEG	include/dp83848.h	/^#define DP83848_RESTART_AUTONEG	/;"	d
DP83848_RF	include/dp83848.h	/^#define DP83848_RF	/;"	d
DP83848_RMT_FAULT	include/dp83848.h	/^#define DP83848_RMT_FAULT	/;"	d
DP83848_RX_ERR_LATCH	include/dp83848.h	/^#define DP83848_RX_ERR_LATCH	/;"	d
DP83848_SIG_DETECT	include/dp83848.h	/^#define DP83848_SIG_DETECT	/;"	d
DP83848_SPEED	include/dp83848.h	/^#define DP83848_SPEED	/;"	d
DP83848_SPEED_SELECT	include/dp83848.h	/^#define DP83848_SPEED_SELECT	/;"	d
DP83848_STAT_REG	include/dp83848.h	/^#define DP83848_STAT_REG	/;"	d
DP83848_T4	include/dp83848.h	/^#define DP83848_T4	/;"	d
DP83848_TX_FDX	include/dp83848.h	/^#define DP83848_TX_FDX	/;"	d
DP83848_TX_HDX	include/dp83848.h	/^#define DP83848_TX_HDX	/;"	d
DP83848_driver	drivers/net/phy/natsemi.c	/^static struct phy_driver DP83848_driver = {$/;"	v	typeref:struct:phy_driver	file:
DP83865_driver	drivers/net/phy/natsemi.c	/^static struct phy_driver DP83865_driver = {$/;"	v	typeref:struct:phy_driver	file:
DP83867_CTRL	drivers/net/phy/ti.c	/^#define DP83867_CTRL	/;"	d	file:
DP83867_DEVADDR	drivers/net/phy/ti.c	/^#define DP83867_DEVADDR	/;"	d	file:
DP83867_MDI_CROSSOVER	drivers/net/phy/ti.c	/^#define DP83867_MDI_CROSSOVER	/;"	d	file:
DP83867_MDI_CROSSOVER_AUTO	drivers/net/phy/ti.c	/^#define DP83867_MDI_CROSSOVER_AUTO	/;"	d	file:
DP83867_MDI_CROSSOVER_MDIX	drivers/net/phy/ti.c	/^#define DP83867_MDI_CROSSOVER_MDIX	/;"	d	file:
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	/;"	d
DP83867_PHYCR_FIFO_DEPTH_SHIFT	drivers/net/phy/ti.c	/^#define DP83867_PHYCR_FIFO_DEPTH_SHIFT	/;"	d	file:
DP83867_PHYCTRL_RXFIFO_SHIFT	drivers/net/phy/ti.c	/^#define DP83867_PHYCTRL_RXFIFO_SHIFT	/;"	d	file:
DP83867_PHYCTRL_SGMIIEN	drivers/net/phy/ti.c	/^#define DP83867_PHYCTRL_SGMIIEN	/;"	d	file:
DP83867_PHYCTRL_TXFIFO_SHIFT	drivers/net/phy/ti.c	/^#define DP83867_PHYCTRL_TXFIFO_SHIFT	/;"	d	file:
DP83867_RGMIICTL	drivers/net/phy/ti.c	/^#define DP83867_RGMIICTL	/;"	d	file:
DP83867_RGMIIDCTL	drivers/net/phy/ti.c	/^#define DP83867_RGMIIDCTL	/;"	d	file:
DP83867_RGMIIDCTL_1_25_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_25_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_25_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_50_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_50_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_75_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_75_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_1_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_1_NS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_250_PS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_250_PS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_00_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_00_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_25_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_25_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_50_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_50_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_2_75_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_2_75_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_00_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_00_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_25_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_25_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_50_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_50_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_3_75_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_3_75_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_4_00_NS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_4_00_NS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_500_PS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_500_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMIIDCTL_750_PS	include/dt-bindings/net/ti-dp83867.h	/^#define DP83867_RGMIIDCTL_750_PS	/;"	d
DP83867_RGMII_RX_CLK_DELAY_EN	drivers/net/phy/ti.c	/^#define DP83867_RGMII_RX_CLK_DELAY_EN	/;"	d	file:
DP83867_RGMII_TX_CLK_DELAY_EN	drivers/net/phy/ti.c	/^#define DP83867_RGMII_TX_CLK_DELAY_EN	/;"	d	file:
DP83867_RGMII_TX_CLK_DELAY_SHIFT	drivers/net/phy/ti.c	/^#define DP83867_RGMII_TX_CLK_DELAY_SHIFT	/;"	d	file:
DP83867_SW_RESET	drivers/net/phy/ti.c	/^#define DP83867_SW_RESET	/;"	d	file:
DP83867_SW_RESTART	drivers/net/phy/ti.c	/^#define DP83867_SW_RESTART	/;"	d	file:
DP83867_driver	drivers/net/phy/ti.c	/^static struct phy_driver DP83867_driver = {$/;"	v	typeref:struct:phy_driver	file:
DPAK	arch/sh/include/asm/cpu_sh7722.h	/^#define DPAK /;"	d
DPAUX_DP_AUXADDR	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXADDR	/;"	d
DPAUX_DP_AUXCTL	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL	/;"	d
DPAUX_DP_AUXCTL_CMDLEN_FIELD	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMDLEN_FIELD	/;"	d
DPAUX_DP_AUXCTL_CMDLEN_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMDLEN_SHIFT	/;"	d
DPAUX_DP_AUXCTL_CMD_AUXRD	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_AUXRD	/;"	d
DPAUX_DP_AUXCTL_CMD_AUXWR	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_AUXWR	/;"	d
DPAUX_DP_AUXCTL_CMD_I2CRD	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_I2CRD	/;"	d
DPAUX_DP_AUXCTL_CMD_I2CREQWSTAT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_I2CREQWSTAT	/;"	d
DPAUX_DP_AUXCTL_CMD_I2CWR	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_I2CWR	/;"	d
DPAUX_DP_AUXCTL_CMD_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_MASK	/;"	d
DPAUX_DP_AUXCTL_CMD_MOTRD	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_MOTRD	/;"	d
DPAUX_DP_AUXCTL_CMD_MOTREQWSTAT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_MOTREQWSTAT	/;"	d
DPAUX_DP_AUXCTL_CMD_MOTWR	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_MOTWR	/;"	d
DPAUX_DP_AUXCTL_CMD_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_CMD_SHIFT	/;"	d
DPAUX_DP_AUXCTL_RST_ASSERT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_RST_ASSERT	/;"	d
DPAUX_DP_AUXCTL_RST_DEASSERT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_RST_DEASSERT	/;"	d
DPAUX_DP_AUXCTL_RST_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_RST_SHIFT	/;"	d
DPAUX_DP_AUXCTL_TRANSACTREQ_DONE	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_TRANSACTREQ_DONE	/;"	d
DPAUX_DP_AUXCTL_TRANSACTREQ_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_TRANSACTREQ_MASK	/;"	d
DPAUX_DP_AUXCTL_TRANSACTREQ_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_TRANSACTREQ_PENDING	/;"	d
DPAUX_DP_AUXCTL_TRANSACTREQ_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXCTL_TRANSACTREQ_SHIFT	/;"	d
DPAUX_DP_AUXDATA_READ_W	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXDATA_READ_W(/;"	d
DPAUX_DP_AUXDATA_WRITE_W	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXDATA_WRITE_W(/;"	d
DPAUX_DP_AUXSTAT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_ADDRESS	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_ADDRESS	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_CLEANUP	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_CLEANUP	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_COMMAND	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_COMMAND	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_GET_M	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_GET_M	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_IDLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_IDLE	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_LENGTH	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_LENGTH	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_MASK	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_READ1	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_READ1	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_REPLY	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_REPLY	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_START1	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_START1	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_STOP1	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_STOP1	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_STOP2	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_STOP2	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_SYNC	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_SYNC	/;"	d
DPAUX_DP_AUXSTAT_AUXCTL_STATE_WRITE1	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_AUXCTL_STATE_WRITE1	/;"	d
DPAUX_DP_AUXSTAT_HPD_STATUS_PLUGGED	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_HPD_STATUS_PLUGGED	/;"	d
DPAUX_DP_AUXSTAT_HPD_STATUS_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_HPD_STATUS_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_HPD_STATUS_UNPLUG	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_HPD_STATUS_UNPLUG	/;"	d
DPAUX_DP_AUXSTAT_NO_STOP_ERROR_NOT_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_NO_STOP_ERROR_NOT_PENDING	/;"	d
DPAUX_DP_AUXSTAT_NO_STOP_ERROR_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_NO_STOP_ERROR_PENDING	/;"	d
DPAUX_DP_AUXSTAT_NO_STOP_ERROR_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_NO_STOP_ERROR_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_ACK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_ACK	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_DEFER	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_DEFER	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_I2CDEFER	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_I2CDEFER	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_I2CNACK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_I2CNACK	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_MASK	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_NACK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_NACK	/;"	d
DPAUX_DP_AUXSTAT_REPLYTYPE_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLYTYPE_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_REPLY_M_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLY_M_MASK	/;"	d
DPAUX_DP_AUXSTAT_REPLY_M_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_REPLY_M_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_RX_ERROR_NOT_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_RX_ERROR_NOT_PENDING	/;"	d
DPAUX_DP_AUXSTAT_RX_ERROR_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_RX_ERROR_PENDING	/;"	d
DPAUX_DP_AUXSTAT_RX_ERROR_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_RX_ERROR_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_NOT_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_NOT_PENDING	/;"	d
DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_PENDING	/;"	d
DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_SHIFT	/;"	d
DPAUX_DP_AUXSTAT_TIMEOUT_ERROR_NOT_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_TIMEOUT_ERROR_NOT_PENDING	/;"	d
DPAUX_DP_AUXSTAT_TIMEOUT_ERROR_PENDING	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_TIMEOUT_ERROR_PENDING	/;"	d
DPAUX_DP_AUXSTAT_TIMEOUT_ERROR_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUXSTAT_TIMEOUT_ERROR_SHIFT	/;"	d
DPAUX_DP_AUX_CONFIG	drivers/video/tegra124/displayport.h	/^#define DPAUX_DP_AUX_CONFIG	/;"	d
DPAUX_HPD_CONFIG	drivers/video/tegra124/displayport.h	/^#define DPAUX_HPD_CONFIG	/;"	d
DPAUX_HPD_IRQ_CONFIG	drivers/video/tegra124/displayport.h	/^#define DPAUX_HPD_IRQ_CONFIG	/;"	d
DPAUX_HYBRID_PADCTL	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL	/;"	d
DPAUX_HYBRID_PADCTL_AUX_CMH_DEFAULT_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_CMH_DEFAULT_MASK	/;"	d
DPAUX_HYBRID_PADCTL_AUX_CMH_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_CMH_SHIFT	/;"	d
DPAUX_HYBRID_PADCTL_AUX_CMH_V0_56	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_CMH_V0_56	/;"	d
DPAUX_HYBRID_PADCTL_AUX_CMH_V0_60	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_CMH_V0_60	/;"	d
DPAUX_HYBRID_PADCTL_AUX_CMH_V0_64	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_CMH_V0_64	/;"	d
DPAUX_HYBRID_PADCTL_AUX_CMH_V0_70	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_CMH_V0_70	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVI_DEFAULT_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVI_DEFAULT_MASK	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVI_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVI_SHIFT	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_DEFAULT_MASK	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_DEFAULT_MASK	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_34	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_34	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_39	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_39	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_42	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_42	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_45	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_45	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_50	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_50	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_54	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_54	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_60	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_60	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_78	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_78	/;"	d
DPAUX_HYBRID_PADCTL_AUX_DRVZ_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_DRVZ_SHIFT	/;"	d
DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV_DISABLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV_DISABLE	/;"	d
DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV_ENABLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV_ENABLE	/;"	d
DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV_SHIFT	/;"	d
DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV_DISABLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV_DISABLE	/;"	d
DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV_ENABLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV_ENABLE	/;"	d
DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV_SHIFT	/;"	d
DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV_DISABLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV_DISABLE	/;"	d
DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV_ENABLE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV_ENABLE	/;"	d
DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV_SHIFT	/;"	d
DPAUX_HYBRID_PADCTL_MODE_AUX	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_MODE_AUX	/;"	d
DPAUX_HYBRID_PADCTL_MODE_I2C	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_MODE_I2C	/;"	d
DPAUX_HYBRID_PADCTL_MODE_SHIFT	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_PADCTL_MODE_SHIFT	/;"	d
DPAUX_HYBRID_SPARE	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_SPARE	/;"	d
DPAUX_HYBRID_SPARE_PAD_PWR_POWERDOWN	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_SPARE_PAD_PWR_POWERDOWN	/;"	d
DPAUX_HYBRID_SPARE_PAD_PWR_POWERUP	drivers/video/tegra124/displayport.h	/^#define DPAUX_HYBRID_SPARE_PAD_PWR_POWERUP	/;"	d
DPAUX_INTR_AUX	drivers/video/tegra124/displayport.h	/^#define DPAUX_INTR_AUX	/;"	d
DPAUX_INTR_EN_AUX	drivers/video/tegra124/displayport.h	/^#define DPAUX_INTR_EN_AUX	/;"	d
DPBP_CMDID_CLOSE	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_CLOSE	/;"	d
DPBP_CMDID_CREATE	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_CREATE	/;"	d
DPBP_CMDID_DESTROY	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_DESTROY	/;"	d
DPBP_CMDID_DISABLE	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_DISABLE	/;"	d
DPBP_CMDID_ENABLE	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_ENABLE	/;"	d
DPBP_CMDID_GET_ATTR	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_GET_ATTR	/;"	d
DPBP_CMDID_OPEN	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_OPEN	/;"	d
DPBP_CMDID_RESET	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMDID_RESET	/;"	d
DPBP_CMD_OPEN	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_CMD_OPEN(/;"	d
DPBP_RSP_GET_ATTRIBUTES	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_RSP_GET_ATTRIBUTES(/;"	d
DPBP_VER_MAJOR	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_VER_MAJOR	/;"	d
DPBP_VER_MINOR	include/fsl-mc/fsl_dpbp.h	/^#define DPBP_VER_MINOR	/;"	d
DPB_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   DPB_HOTPLUG_INT_EN	/;"	d
DPCD_ADJUST_REQUEST_LANE0_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_ADJUST_REQUEST_LANE0_1	/;"	d
DPCD_ADJUST_REQUEST_LANE0_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_ADJUST_REQUEST_LANE0_1	/;"	d
DPCD_ADJUST_REQUEST_LANE2_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_ADJUST_REQUEST_LANE2_3	/;"	d
DPCD_ADJUST_REQUEST_LANE2_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_ADJUST_REQUEST_LANE2_3	/;"	d
DPCD_DOWNSTREAM_PORT_STATUS_CHANGED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_DOWNSTREAM_PORT_STATUS_CHANGED	/;"	d
DPCD_DPCD_REV	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_DPCD_REV	/;"	d
DPCD_DPCD_REV	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_DPCD_REV	/;"	d
DPCD_ENHANCED_FRAME_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_ENHANCED_FRAME_EN	/;"	d
DPCD_INTERLANE_ALIGN_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_INTERLANE_ALIGN_DONE	/;"	d
DPCD_LANE0_1_STATUS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_LANE0_1_STATUS	/;"	d
DPCD_LANE0_1_STATUS	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE0_1_STATUS	/;"	d
DPCD_LANE0_CHANNEL_EQ_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE0_CHANNEL_EQ_DONE	/;"	d
DPCD_LANE0_CR_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE0_CR_DONE	/;"	d
DPCD_LANE0_SYMBOL_LOCKED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE0_SYMBOL_LOCKED	/;"	d
DPCD_LANE1_CHANNEL_EQ_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE1_CHANNEL_EQ_DONE	/;"	d
DPCD_LANE1_CR_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE1_CR_DONE	/;"	d
DPCD_LANE1_SYMBOL_LOCKED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE1_SYMBOL_LOCKED	/;"	d
DPCD_LANE2_3_STATUS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_LANE2_3_STATUS	/;"	d
DPCD_LANE_ALIGN_STATUS_UPDATED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_LANE_ALIGN_STATUS_UPDATED	/;"	d
DPCD_LANE_COUNT_SET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_LANE_COUNT_SET	/;"	d
DPCD_LANE_COUNT_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LANE_COUNT_SET	/;"	d
DPCD_LINK_BW_SET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_LINK_BW_SET	/;"	d
DPCD_LINK_BW_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LINK_BW_SET	/;"	d
DPCD_LINK_POWER_STATE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_LINK_POWER_STATE	/;"	d
DPCD_LINK_STATUS_UPDATED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LINK_STATUS_UPDATED	/;"	d
DPCD_LN_ALIGN_UPDATED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LN_ALIGN_UPDATED	/;"	d
DPCD_LN_COUNT_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_LN_COUNT_SET(/;"	d
DPCD_MAX_LANE_COUNT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_MAX_LANE_COUNT	/;"	d
DPCD_MAX_LANE_COUNT	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_MAX_LANE_COUNT	/;"	d
DPCD_MAX_LINK_RATE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_MAX_LINK_RATE	/;"	d
DPCD_MAX_LINK_RATE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_MAX_LINK_RATE	/;"	d
DPCD_PRE_EMPHASIS_LANE0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE0(/;"	d
DPCD_PRE_EMPHASIS_LANE0_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE0_LEVEL_0	/;"	d
DPCD_PRE_EMPHASIS_LANE0_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE0_LEVEL_1	/;"	d
DPCD_PRE_EMPHASIS_LANE0_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE0_LEVEL_2	/;"	d
DPCD_PRE_EMPHASIS_LANE0_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE0_LEVEL_3	/;"	d
DPCD_PRE_EMPHASIS_LANE0_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE0_MASK	/;"	d
DPCD_PRE_EMPHASIS_LANE1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE1(/;"	d
DPCD_PRE_EMPHASIS_LANE1_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE1_LEVEL_0	/;"	d
DPCD_PRE_EMPHASIS_LANE1_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE1_LEVEL_1	/;"	d
DPCD_PRE_EMPHASIS_LANE1_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE1_LEVEL_2	/;"	d
DPCD_PRE_EMPHASIS_LANE1_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE1_LEVEL_3	/;"	d
DPCD_PRE_EMPHASIS_LANE1_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE1_MASK	/;"	d
DPCD_PRE_EMPHASIS_LANE2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE2(/;"	d
DPCD_PRE_EMPHASIS_LANE2_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE2_LEVEL_0	/;"	d
DPCD_PRE_EMPHASIS_LANE2_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE2_LEVEL_1	/;"	d
DPCD_PRE_EMPHASIS_LANE2_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE2_LEVEL_2	/;"	d
DPCD_PRE_EMPHASIS_LANE2_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE2_LEVEL_3	/;"	d
DPCD_PRE_EMPHASIS_LANE2_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE2_MASK	/;"	d
DPCD_PRE_EMPHASIS_LANE3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE3(/;"	d
DPCD_PRE_EMPHASIS_LANE3_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE3_LEVEL_0	/;"	d
DPCD_PRE_EMPHASIS_LANE3_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE3_LEVEL_1	/;"	d
DPCD_PRE_EMPHASIS_LANE3_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE3_LEVEL_2	/;"	d
DPCD_PRE_EMPHASIS_LANE3_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE3_LEVEL_3	/;"	d
DPCD_PRE_EMPHASIS_LANE3_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_LANE3_MASK	/;"	d
DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0	/;"	d
DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_1	/;"	d
DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_2	/;"	d
DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_3	/;"	d
DPCD_READ	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DPCD_READ,$/;"	e	enum:dpcd_request
DPCD_REQ_ADJ_EMPHASIS	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_REQ_ADJ_EMPHASIS	/;"	d
DPCD_REQ_ADJ_SWING	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_REQ_ADJ_SWING	/;"	d
DPCD_SCRAMBLING_DISABLED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_SCRAMBLING_DISABLED	/;"	d
DPCD_SCRAMBLING_ENABLED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_SCRAMBLING_ENABLED	/;"	d
DPCD_SET_POWER_STATE_D0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_SET_POWER_STATE_D0	/;"	d
DPCD_SET_POWER_STATE_D4	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_SET_POWER_STATE_D4	/;"	d
DPCD_SINK_POWER_STATE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_SINK_POWER_STATE	/;"	d
DPCD_TEST_EDID_CHECKSUM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_TEST_EDID_CHECKSUM	/;"	d
DPCD_TEST_EDID_CHECKSUM	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TEST_EDID_CHECKSUM	/;"	d
DPCD_TEST_EDID_CHECKSUM_WRITE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TEST_EDID_CHECKSUM_WRITE	/;"	d
DPCD_TEST_EDID_READ	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TEST_EDID_READ	/;"	d
DPCD_TEST_REQUEST	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_TEST_REQUEST	/;"	d
DPCD_TEST_REQUEST	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TEST_REQUEST	/;"	d
DPCD_TEST_RESPONSE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_TEST_RESPONSE	/;"	d
DPCD_TEST_RESPONSE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TEST_RESPONSE	/;"	d
DPCD_TRAINING_LANE0_SET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_TRAINING_LANE0_SET	/;"	d
DPCD_TRAINING_LANE0_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TRAINING_LANE0_SET	/;"	d
DPCD_TRAINING_PATTERN_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TRAINING_PATTERN_1	/;"	d
DPCD_TRAINING_PATTERN_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TRAINING_PATTERN_2	/;"	d
DPCD_TRAINING_PATTERN_DISABLED	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TRAINING_PATTERN_DISABLED	/;"	d
DPCD_TRAINING_PATTERN_SET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DPCD_TRAINING_PATTERN_SET	/;"	d
DPCD_TRAINING_PATTERN_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_TRAINING_PATTERN_SET	/;"	d
DPCD_VOLTAGE_SWING_LANE0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE0(/;"	d
DPCD_VOLTAGE_SWING_LANE0_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE0_LEVEL_0	/;"	d
DPCD_VOLTAGE_SWING_LANE0_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE0_LEVEL_1	/;"	d
DPCD_VOLTAGE_SWING_LANE0_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE0_LEVEL_2	/;"	d
DPCD_VOLTAGE_SWING_LANE0_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE0_LEVEL_3	/;"	d
DPCD_VOLTAGE_SWING_LANE0_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE0_MASK	/;"	d
DPCD_VOLTAGE_SWING_LANE1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE1(/;"	d
DPCD_VOLTAGE_SWING_LANE1_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE1_LEVEL_0	/;"	d
DPCD_VOLTAGE_SWING_LANE1_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE1_LEVEL_1	/;"	d
DPCD_VOLTAGE_SWING_LANE1_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE1_LEVEL_2	/;"	d
DPCD_VOLTAGE_SWING_LANE1_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE1_LEVEL_3	/;"	d
DPCD_VOLTAGE_SWING_LANE1_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE1_MASK	/;"	d
DPCD_VOLTAGE_SWING_LANE2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE2(/;"	d
DPCD_VOLTAGE_SWING_LANE2_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE2_LEVEL_0	/;"	d
DPCD_VOLTAGE_SWING_LANE2_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE2_LEVEL_1	/;"	d
DPCD_VOLTAGE_SWING_LANE2_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE2_LEVEL_2	/;"	d
DPCD_VOLTAGE_SWING_LANE2_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE2_LEVEL_3	/;"	d
DPCD_VOLTAGE_SWING_LANE2_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE2_MASK	/;"	d
DPCD_VOLTAGE_SWING_LANE3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE3(/;"	d
DPCD_VOLTAGE_SWING_LANE3_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE3_LEVEL_0	/;"	d
DPCD_VOLTAGE_SWING_LANE3_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE3_LEVEL_1	/;"	d
DPCD_VOLTAGE_SWING_LANE3_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE3_LEVEL_2	/;"	d
DPCD_VOLTAGE_SWING_LANE3_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE3_LEVEL_3	/;"	d
DPCD_VOLTAGE_SWING_LANE3_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_LANE3_MASK	/;"	d
DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0	/;"	d
DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_1	/;"	d
DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_2	/;"	d
DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_3	/;"	d
DPCD_WRITE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DPCD_WRITE,$/;"	e	enum:dpcd_request
DPC_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   DPC_HOTPLUG_INT_EN	/;"	d
DPDACK	arch/blackfin/cpu/initcode.c	/^#define DPDACK /;"	d	file:
DPDE_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	DPDE_CMD,$/;"	e	enum:__anon114585520103
DPD_DISABLE	arch/arm/include/asm/emif.h	/^#define DPD_DISABLE	/;"	d
DPD_ENABLE	arch/arm/include/asm/emif.h	/^#define DPD_ENABLE	/;"	d
DPD_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   DPD_HOTPLUG_INT_EN	/;"	d
DPEAK	arch/sh/include/asm/cpu_sh7722.h	/^#define DPEAK /;"	d
DPF	arch/x86/cpu/quark/mrc_util.h	/^#define DPF	/;"	d
DPHY_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define DPHY_RATIO	/;"	d
DPHY_RATIO	board/samsung/odroid/setup.h	/^#define DPHY_RATIO(/;"	d
DPHY_RATIO	board/samsung/trats/setup.h	/^#define DPHY_RATIO	/;"	d
DPHY_SEL	board/samsung/odroid/setup.h	/^#define DPHY_SEL(/;"	d
DPIO_CMDID_CLOSE	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_CLOSE	/;"	d
DPIO_CMDID_CREATE	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_CREATE	/;"	d
DPIO_CMDID_DESTROY	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_DESTROY	/;"	d
DPIO_CMDID_DISABLE	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_DISABLE	/;"	d
DPIO_CMDID_ENABLE	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_ENABLE	/;"	d
DPIO_CMDID_GET_ATTR	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_GET_ATTR	/;"	d
DPIO_CMDID_OPEN	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_OPEN	/;"	d
DPIO_CMDID_RESET	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMDID_RESET	/;"	d
DPIO_CMD_CREATE	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMD_CREATE(/;"	d
DPIO_CMD_OPEN	include/fsl-mc/fsl_dpio.h	/^#define DPIO_CMD_OPEN(/;"	d
DPIO_LOCAL_CHANNEL	include/fsl-mc/fsl_dpio.h	/^	DPIO_LOCAL_CHANNEL = 1,$/;"	e	enum:dpio_channel_mode
DPIO_NO_CHANNEL	include/fsl-mc/fsl_dpio.h	/^	DPIO_NO_CHANNEL = 0,$/;"	e	enum:dpio_channel_mode
DPIO_RSP_GET_ATTR	include/fsl-mc/fsl_dpio.h	/^#define DPIO_RSP_GET_ATTR(/;"	d
DPIO_VER_MAJOR	include/fsl-mc/fsl_dpio.h	/^#define DPIO_VER_MAJOR	/;"	d
DPIO_VER_MINOR	include/fsl-mc/fsl_dpio.h	/^#define DPIO_VER_MINOR	/;"	d
DPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define DPLL	/;"	d
DPLL2_KD	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define DPLL2_KD(/;"	d	file:
DPLL2_KI	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define DPLL2_KI(/;"	d	file:
DPLL2_PWD	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define DPLL2_PWD /;"	d	file:
DPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DPLL_CON1_VAL	/;"	d
DPLL_EN_FAST_RELOCK_BYPASS	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_EN_FAST_RELOCK_BYPASS	/;"	d
DPLL_EN_FAST_RELOCK_BYPASS	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_EN_FAST_RELOCK_BYPASS	/;"	d
DPLL_EN_LOCK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define DPLL_EN_LOCK	/;"	d
DPLL_EN_LOCK	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_EN_LOCK	/;"	d
DPLL_EN_LOCK	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_EN_LOCK	/;"	d
DPLL_EN_LOW_POWER_BYPASS	arch/arm/include/asm/arch-am33xx/clock.h	/^#define DPLL_EN_LOW_POWER_BYPASS	/;"	d
DPLL_EN_LOW_POWER_BYPASS	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_EN_LOW_POWER_BYPASS	/;"	d
DPLL_EN_LOW_POWER_BYPASS	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_EN_LOW_POWER_BYPASS	/;"	d
DPLL_EN_MN_BYPASS	arch/arm/include/asm/arch-am33xx/clock.h	/^#define DPLL_EN_MN_BYPASS	/;"	d
DPLL_EN_MN_BYPASS	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_EN_MN_BYPASS	/;"	d
DPLL_EN_MN_BYPASS	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_EN_MN_BYPASS	/;"	d
DPLL_EN_STOP	arch/arm/include/asm/arch-am33xx/clock.h	/^#define DPLL_EN_STOP	/;"	d
DPLL_EN_STOP	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_EN_STOP	/;"	d
DPLL_EN_STOP	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_EN_STOP	/;"	d
DPLL_I2C_ADDR	board/gdsys/common/adv7611.c	/^	DPLL_I2C_ADDR = 0x26,$/;"	e	enum:__anon3d55bc280103	file:
DPLL_IVA_CLKSEL_CORE_X2_DIV_2	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_IVA_CLKSEL_CORE_X2_DIV_2	/;"	d
DPLL_IVA_CLKSEL_CORE_X2_DIV_2	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_IVA_CLKSEL_CORE_X2_DIV_2	/;"	d
DPLL_LOCK	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_LOCK	/;"	d
DPLL_LOCK	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_LOCK	/;"	d
DPLL_LOCKED_FREQ_TOLERANCE_0	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_LOCKED_FREQ_TOLERANCE_0	/;"	d
DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ	/;"	d
DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ	/;"	d
DPLL_MODE_DEEP	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	DPLL_MODE_DEEP,$/;"	e	enum:__anon3783c4e20703
DPLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DPLL_MODE_MASK		= 1,$/;"	e	enum:__anon375ccd790103
DPLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	DPLL_MODE_MASK		= 3,$/;"	e	enum:__anon3783c4e20703
DPLL_MODE_NORM	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DPLL_MODE_NORM,$/;"	e	enum:__anon375ccd790103
DPLL_MODE_NORMAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	DPLL_MODE_NORMAL,$/;"	e	enum:__anon3783c4e20703
DPLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DPLL_MODE_SHIFT		= 4,$/;"	e	enum:__anon375ccd790103
DPLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	DPLL_MODE_SHIFT		= 4,$/;"	e	enum:__anon3783c4e20703
DPLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	DPLL_MODE_SLOW		= 0,$/;"	e	enum:__anon375ccd790103
DPLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	DPLL_MODE_SLOW		= 0,$/;"	e	enum:__anon3783c4e20703
DPLL_NO_LOCK	arch/arm/include/asm/arch-omap4/clock.h	/^#define DPLL_NO_LOCK	/;"	d
DPLL_NO_LOCK	arch/arm/include/asm/arch-omap5/clock.h	/^#define DPLL_NO_LOCK	/;"	d
DPM0_CCBF_DIS	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_CCBF_DIS /;"	d
DPM0_CCBF_EN	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_CCBF_EN /;"	d
DPM0_CCBF_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_CCBF_STAT /;"	d
DPM0_CCBF_STAT_STKY	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_CCBF_STAT_STKY /;"	d
DPM0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_CTL /;"	d
DPM0_HIB_DIS	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_HIB_DIS /;"	d
DPM0_PGCNTR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_PGCNTR /;"	d
DPM0_RESTORE0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE0 /;"	d
DPM0_RESTORE1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE1 /;"	d
DPM0_RESTORE10	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE10 /;"	d
DPM0_RESTORE11	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE11 /;"	d
DPM0_RESTORE12	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE12 /;"	d
DPM0_RESTORE13	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE13 /;"	d
DPM0_RESTORE14	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE14 /;"	d
DPM0_RESTORE15	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE15 /;"	d
DPM0_RESTORE2	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE2 /;"	d
DPM0_RESTORE3	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE3 /;"	d
DPM0_RESTORE4	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE4 /;"	d
DPM0_RESTORE5	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE5 /;"	d
DPM0_RESTORE6	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE6 /;"	d
DPM0_RESTORE7	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE7 /;"	d
DPM0_RESTORE8	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE8 /;"	d
DPM0_RESTORE9	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_RESTORE9 /;"	d
DPM0_SCBF_DIS	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_SCBF_DIS /;"	d
DPM0_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_STAT /;"	d
DPM0_WAKE_EN	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_WAKE_EN /;"	d
DPM0_WAKE_POL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_WAKE_POL /;"	d
DPM0_WAKE_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define DPM0_WAKE_STAT /;"	d
DPMAC_CMDID_CLOSE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_CLOSE	/;"	d
DPMAC_CMDID_CREATE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_CREATE	/;"	d
DPMAC_CMDID_DESTROY	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_DESTROY	/;"	d
DPMAC_CMDID_GET_ATTR	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_GET_ATTR	/;"	d
DPMAC_CMDID_GET_COUNTER	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_GET_COUNTER	/;"	d
DPMAC_CMDID_GET_LINK_CFG	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_GET_LINK_CFG	/;"	d
DPMAC_CMDID_MDIO_READ	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_MDIO_READ	/;"	d
DPMAC_CMDID_MDIO_WRITE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_MDIO_WRITE	/;"	d
DPMAC_CMDID_OPEN	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_OPEN	/;"	d
DPMAC_CMDID_RESET	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_RESET	/;"	d
DPMAC_CMDID_SET_LINK_STATE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMDID_SET_LINK_STATE	/;"	d
DPMAC_CMD_CREATE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMD_CREATE(/;"	d
DPMAC_CMD_GET_COUNTER	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMD_GET_COUNTER(/;"	d
DPMAC_CMD_MDIO_READ	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMD_MDIO_READ(/;"	d
DPMAC_CMD_MDIO_WRITE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMD_MDIO_WRITE(/;"	d
DPMAC_CMD_OPEN	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMD_OPEN(/;"	d
DPMAC_CMD_SET_LINK_STATE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_CMD_SET_LINK_STATE(/;"	d
DPMAC_CNT_EGR_BCAST_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_BCAST_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_EGR_BYTE	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_BYTE,$/;"	e	enum:dpmac_counter
DPMAC_CNT_EGR_ERR_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_ERR_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_EGR_MCAST_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_MCAST_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_EGR_UCAST_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_UCAST_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_EGR_UNDERSIZED	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_UNDERSIZED,$/;"	e	enum:dpmac_counter
DPMAC_CNT_EGR_VALID_PAUSE_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_EGR_VALID_PAUSE_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_ALIGN_ERR	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_ALIGN_ERR,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_ALL_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_ALL_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_BCAST_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_BCAST_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_BYTE	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_BYTE,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_ERR_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_ERR_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAG	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAG,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_1023	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_1023,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_127	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_127,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_1518	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_1518,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_1519_MAX	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_1519_MAX,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_255	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_255,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_511	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_511,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_64	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_64,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_FRAME_DISCARD	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_FRAME_DISCARD,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_GOOD_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_GOOD_FRAME$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_JABBER	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_JABBER,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_MCAST_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_MCAST_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_OVERSIZED	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_OVERSIZED,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_UCAST_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_UCAST_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_CNT_ING_VALID_PAUSE_FRAME	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_CNT_ING_VALID_PAUSE_FRAME,$/;"	e	enum:dpmac_counter
DPMAC_ETH_IF_GMII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_GMII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_MII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_MII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_QSGMII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_QSGMII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_RGMII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_RGMII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_RMII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_RMII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_SGMII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_SGMII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_SMII	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_SMII,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_XAUI	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_XAUI,$/;"	e	enum:dpmac_eth_if
DPMAC_ETH_IF_XFI	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_ETH_IF_XFI$/;"	e	enum:dpmac_eth_if
DPMAC_IRQ_EVENT_LINK_CFG_REQ	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_IRQ_EVENT_LINK_CFG_REQ	/;"	d
DPMAC_IRQ_EVENT_LINK_CHANGED	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_IRQ_EVENT_LINK_CHANGED	/;"	d
DPMAC_IRQ_INDEX	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_IRQ_INDEX	/;"	d
DPMAC_LINK_OPT_ASYM_PAUSE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_LINK_OPT_ASYM_PAUSE	/;"	d
DPMAC_LINK_OPT_AUTONEG	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_LINK_OPT_AUTONEG	/;"	d
DPMAC_LINK_OPT_HALF_DUPLEX	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_LINK_OPT_HALF_DUPLEX	/;"	d
DPMAC_LINK_OPT_PAUSE	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_LINK_OPT_PAUSE	/;"	d
DPMAC_LINK_TYPE_BACKPLANE	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_LINK_TYPE_BACKPLANE$/;"	e	enum:dpmac_link_type
DPMAC_LINK_TYPE_FIXED	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_LINK_TYPE_FIXED,$/;"	e	enum:dpmac_link_type
DPMAC_LINK_TYPE_NONE	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_LINK_TYPE_NONE,$/;"	e	enum:dpmac_link_type
DPMAC_LINK_TYPE_PHY	include/fsl-mc/fsl_dpmac.h	/^	DPMAC_LINK_TYPE_PHY,$/;"	e	enum:dpmac_link_type
DPMAC_RSP_GET_ATTRIBUTES	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_RSP_GET_ATTRIBUTES(/;"	d
DPMAC_RSP_GET_COUNTER	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_RSP_GET_COUNTER(/;"	d
DPMAC_RSP_GET_LINK_CFG	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_RSP_GET_LINK_CFG(/;"	d
DPMAC_RSP_MDIO_READ	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_RSP_MDIO_READ(/;"	d
DPMAC_VER_MAJOR	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_VER_MAJOR	/;"	d
DPMAC_VER_MINOR	include/fsl-mc/fsl_dpmac.h	/^#define DPMAC_VER_MINOR	/;"	d
DPMC0	arch/x86/cpu/quark/smc.h	/^#define DPMC0	/;"	d
DPMC0_CLKGTDIS	arch/x86/cpu/quark/smc.h	/^#define DPMC0_CLKGTDIS	/;"	d
DPMC0_DISPWRDN	arch/x86/cpu/quark/smc.h	/^#define DPMC0_DISPWRDN	/;"	d
DPMC0_DYNSREN	arch/x86/cpu/quark/smc.h	/^#define DPMC0_DYNSREN	/;"	d
DPMC0_ENPHYCLKGATE	arch/x86/cpu/quark/smc.h	/^#define DPMC0_ENPHYCLKGATE	/;"	d
DPMC0_PCLSTO_MASK	arch/x86/cpu/quark/smc.h	/^#define DPMC0_PCLSTO_MASK	/;"	d
DPMC0_PREAPWDEN	arch/x86/cpu/quark/smc.h	/^#define DPMC0_PREAPWDEN	/;"	d
DPMC1	arch/x86/cpu/quark/smc.h	/^#define DPMC1	/;"	d
DPMNG_CMDID_GET_VERSION	drivers/net/fsl-mc/fsl_dpmng_cmd.h	/^#define DPMNG_CMDID_GET_VERSION	/;"	d
DPMNG_RSP_GET_VERSION	drivers/net/fsl-mc/fsl_dpmng_cmd.h	/^#define DPMNG_RSP_GET_VERSION(/;"	d
DPM_EMU0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU0	/;"	d
DPM_EMU1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU1	/;"	d
DPM_EMU10	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU10	/;"	d
DPM_EMU11	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU11	/;"	d
DPM_EMU12	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU12	/;"	d
DPM_EMU13	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU13	/;"	d
DPM_EMU14	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU14	/;"	d
DPM_EMU15	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU15	/;"	d
DPM_EMU16	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU16	/;"	d
DPM_EMU17	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU17	/;"	d
DPM_EMU18	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU18	/;"	d
DPM_EMU19	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU19	/;"	d
DPM_EMU2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU2	/;"	d
DPM_EMU3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU3	/;"	d
DPM_EMU4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU4	/;"	d
DPM_EMU5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU5	/;"	d
DPM_EMU6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU6	/;"	d
DPM_EMU7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU7	/;"	d
DPM_EMU8	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU8	/;"	d
DPM_EMU9	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define DPM_EMU9	/;"	d
DPM_EXEC_FAIL	board/freescale/common/zm7300.c	/^#define DPM_EXEC_FAIL /;"	d	file:
DPM_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define DPM_RATIO	/;"	d
DPM_RATIO	board/samsung/odroid/setup.h	/^#define DPM_RATIO(/;"	d
DPM_RATIO	board/samsung/trats/setup.h	/^#define DPM_RATIO	/;"	d
DPM_SUCCESS	board/freescale/common/zm7300.c	/^#define DPM_SUCCESS /;"	d	file:
DPM_WP	board/freescale/common/zm7300.c	/^#define DPM_WP /;"	d	file:
DPNI_ALL_TCS	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ALL_TCS	/;"	d
DPNI_ALL_TC_FLOWS	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ALL_TC_FLOWS	/;"	d
DPNI_BUF_LAYOUT_OPT_DATA_ALIGN	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_DATA_ALIGN	/;"	d
DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM	/;"	d
DPNI_BUF_LAYOUT_OPT_DATA_TAIL_ROOM	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_DATA_TAIL_ROOM	/;"	d
DPNI_BUF_LAYOUT_OPT_FRAME_STATUS	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_FRAME_STATUS	/;"	d
DPNI_BUF_LAYOUT_OPT_PARSER_RESULT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_PARSER_RESULT	/;"	d
DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE	/;"	d
DPNI_BUF_LAYOUT_OPT_TIMESTAMP	include/fsl-mc/fsl_dpni.h	/^#define DPNI_BUF_LAYOUT_OPT_TIMESTAMP	/;"	d
DPNI_CMDID_ADD_MAC_ADDR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_ADD_MAC_ADDR	/;"	d
DPNI_CMDID_CLOSE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_CLOSE	/;"	d
DPNI_CMDID_CREATE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_CREATE	/;"	d
DPNI_CMDID_DESTROY	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_DESTROY	/;"	d
DPNI_CMDID_DISABLE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_DISABLE	/;"	d
DPNI_CMDID_ENABLE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_ENABLE	/;"	d
DPNI_CMDID_GET_ATTR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_ATTR	/;"	d
DPNI_CMDID_GET_COUNTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_COUNTER	/;"	d
DPNI_CMDID_GET_LINK_STATE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_LINK_STATE	/;"	d
DPNI_CMDID_GET_PRIM_MAC	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_PRIM_MAC	/;"	d
DPNI_CMDID_GET_QDID	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_QDID	/;"	d
DPNI_CMDID_GET_RX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_RX_BUFFER_LAYOUT	/;"	d
DPNI_CMDID_GET_RX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_RX_FLOW	/;"	d
DPNI_CMDID_GET_TX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_TX_BUFFER_LAYOUT	/;"	d
DPNI_CMDID_GET_TX_CONF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_TX_CONF	/;"	d
DPNI_CMDID_GET_TX_CONF_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_TX_CONF_BUFFER_LAYOUT	/;"	d
DPNI_CMDID_GET_TX_DATA_OFFSET	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_TX_DATA_OFFSET	/;"	d
DPNI_CMDID_GET_TX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_GET_TX_FLOW	/;"	d
DPNI_CMDID_OPEN	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_OPEN	/;"	d
DPNI_CMDID_REMOVE_MAC_ADDR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_REMOVE_MAC_ADDR	/;"	d
DPNI_CMDID_RESET	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_RESET	/;"	d
DPNI_CMDID_SET_COUNTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_COUNTER	/;"	d
DPNI_CMDID_SET_ERRORS_BEHAVIOR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_ERRORS_BEHAVIOR	/;"	d
DPNI_CMDID_SET_LINK_CFG	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_LINK_CFG	/;"	d
DPNI_CMDID_SET_POOLS	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_POOLS	/;"	d
DPNI_CMDID_SET_PRIM_MAC	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_PRIM_MAC	/;"	d
DPNI_CMDID_SET_RX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_RX_BUFFER_LAYOUT	/;"	d
DPNI_CMDID_SET_RX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_RX_FLOW	/;"	d
DPNI_CMDID_SET_TX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_TX_BUFFER_LAYOUT	/;"	d
DPNI_CMDID_SET_TX_CONF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_TX_CONF	/;"	d
DPNI_CMDID_SET_TX_CONF_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_TX_CONF_BUFFER_LAYOUT	/;"	d
DPNI_CMDID_SET_TX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMDID_SET_TX_FLOW	/;"	d
DPNI_CMD_ADD_MAC_ADDR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_ADD_MAC_ADDR(/;"	d
DPNI_CMD_CREATE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_CREATE(/;"	d
DPNI_CMD_GET_ATTR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_GET_ATTR(/;"	d
DPNI_CMD_GET_COUNTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_GET_COUNTER(/;"	d
DPNI_CMD_GET_RX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_GET_RX_FLOW(/;"	d
DPNI_CMD_GET_TX_CONF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_GET_TX_CONF(/;"	d
DPNI_CMD_GET_TX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_GET_TX_FLOW(/;"	d
DPNI_CMD_OPEN	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_OPEN(/;"	d
DPNI_CMD_REMOVE_MAC_ADDR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_REMOVE_MAC_ADDR(/;"	d
DPNI_CMD_SET_COUNTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_COUNTER(/;"	d
DPNI_CMD_SET_ERRORS_BEHAVIOR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_ERRORS_BEHAVIOR(/;"	d
DPNI_CMD_SET_LINK_CFG	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_LINK_CFG(/;"	d
DPNI_CMD_SET_POOLS	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_POOLS(/;"	d
DPNI_CMD_SET_PRIMARY_MAC_ADDR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_PRIMARY_MAC_ADDR(/;"	d
DPNI_CMD_SET_RX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_RX_BUFFER_LAYOUT(/;"	d
DPNI_CMD_SET_RX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_RX_FLOW(/;"	d
DPNI_CMD_SET_TX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_TX_BUFFER_LAYOUT(/;"	d
DPNI_CMD_SET_TX_CONF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_TX_CONF(/;"	d
DPNI_CMD_SET_TX_CONF_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_TX_CONF_BUFFER_LAYOUT(/;"	d
DPNI_CMD_SET_TX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_CMD_SET_TX_FLOW(/;"	d
DPNI_CNT_EGR_BYTE	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_EGR_BYTE = 0x9,$/;"	e	enum:dpni_counter
DPNI_CNT_EGR_FRAME	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_EGR_FRAME = 0x8,$/;"	e	enum:dpni_counter
DPNI_CNT_EGR_FRAME_DISCARD	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_EGR_FRAME_DISCARD = 0xa$/;"	e	enum:dpni_counter
DPNI_CNT_ING_BCAST_BYTES	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_BCAST_BYTES = 0x7,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_BCAST_FRAME	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_BCAST_FRAME = 0x6,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_BYTE	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_BYTE = 0x1,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_FRAME	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_FRAME = 0x0,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_FRAME_DISCARD	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_FRAME_DISCARD = 0x3,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_FRAME_DROP	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_FRAME_DROP = 0x2,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_MCAST_BYTE	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_MCAST_BYTE = 0x5,$/;"	e	enum:dpni_counter
DPNI_CNT_ING_MCAST_FRAME	include/fsl-mc/fsl_dpni.h	/^	DPNI_CNT_ING_MCAST_FRAME = 0x4,$/;"	e	enum:dpni_counter
DPNI_COMMON_TX_CONF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_COMMON_TX_CONF	/;"	d
DPNI_DEST_DPCON	include/fsl-mc/fsl_dpni.h	/^	DPNI_DEST_DPCON = 2$/;"	e	enum:dpni_dest
DPNI_DEST_DPIO	include/fsl-mc/fsl_dpni.h	/^	DPNI_DEST_DPIO = 1,$/;"	e	enum:dpni_dest
DPNI_DEST_NONE	include/fsl-mc/fsl_dpni.h	/^	DPNI_DEST_NONE = 0,$/;"	e	enum:dpni_dest
DPNI_ERROR_ACTION_CONTINUE	include/fsl-mc/fsl_dpni.h	/^	DPNI_ERROR_ACTION_CONTINUE = 1,$/;"	e	enum:dpni_error_action
DPNI_ERROR_ACTION_DISCARD	include/fsl-mc/fsl_dpni.h	/^	DPNI_ERROR_ACTION_DISCARD = 0,$/;"	e	enum:dpni_error_action
DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE	include/fsl-mc/fsl_dpni.h	/^	DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE = 2$/;"	e	enum:dpni_error_action
DPNI_ERROR_EOFHE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ERROR_EOFHE	/;"	d
DPNI_ERROR_FLE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ERROR_FLE	/;"	d
DPNI_ERROR_FPE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ERROR_FPE	/;"	d
DPNI_ERROR_L3CE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ERROR_L3CE	/;"	d
DPNI_ERROR_L4CE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ERROR_L4CE	/;"	d
DPNI_ERROR_PHE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_ERROR_PHE	/;"	d
DPNI_EXT_EXTENDED_CFG	include/fsl-mc/fsl_dpni.h	/^#define DPNI_EXT_EXTENDED_CFG(/;"	d
DPNI_FLC_STASH	include/fsl-mc/fsl_dpni.h	/^	DPNI_FLC_STASH = 1,$/;"	e	enum:dpni_flc_type
DPNI_FLC_STASH_FRAME_ANNOTATION	include/fsl-mc/fsl_dpni.h	/^#define DPNI_FLC_STASH_FRAME_ANNOTATION	/;"	d
DPNI_FLC_USER_DEFINED	include/fsl-mc/fsl_dpni.h	/^	DPNI_FLC_USER_DEFINED = 0,$/;"	e	enum:dpni_flc_type
DPNI_LINK_OPT_ASYM_PAUSE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_LINK_OPT_ASYM_PAUSE	/;"	d
DPNI_LINK_OPT_AUTONEG	include/fsl-mc/fsl_dpni.h	/^#define DPNI_LINK_OPT_AUTONEG	/;"	d
DPNI_LINK_OPT_HALF_DUPLEX	include/fsl-mc/fsl_dpni.h	/^#define DPNI_LINK_OPT_HALF_DUPLEX	/;"	d
DPNI_LINK_OPT_PAUSE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_LINK_OPT_PAUSE	/;"	d
DPNI_MAX_DPBP	include/fsl-mc/fsl_dpni.h	/^#define DPNI_MAX_DPBP	/;"	d
DPNI_MAX_TC	include/fsl-mc/fsl_dpni.h	/^#define DPNI_MAX_TC	/;"	d
DPNI_NEW_FLOW_ID	include/fsl-mc/fsl_dpni.h	/^#define DPNI_NEW_FLOW_ID	/;"	d
DPNI_OPT_ALLOW_DIST_KEY_PER_TC	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_ALLOW_DIST_KEY_PER_TC	/;"	d
DPNI_OPT_DIST_FS	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_DIST_FS	/;"	d
DPNI_OPT_DIST_HASH	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_DIST_HASH	/;"	d
DPNI_OPT_FS_MASK_SUPPORT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_FS_MASK_SUPPORT	/;"	d
DPNI_OPT_IPF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_IPF	/;"	d
DPNI_OPT_IPR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_IPR	/;"	d
DPNI_OPT_MULTICAST_FILTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_MULTICAST_FILTER	/;"	d
DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_PRIVATE_TX_CONF_ERROR_DISABLED	/;"	d
DPNI_OPT_QOS_MASK_SUPPORT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_QOS_MASK_SUPPORT	/;"	d
DPNI_OPT_TX_CONF_DISABLED	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_TX_CONF_DISABLED	/;"	d
DPNI_OPT_UNICAST_FILTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_UNICAST_FILTER	/;"	d
DPNI_OPT_VLAN_FILTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_VLAN_FILTER	/;"	d
DPNI_OPT_VLAN_MANIPULATION	include/fsl-mc/fsl_dpni.h	/^#define DPNI_OPT_VLAN_MANIPULATION	/;"	d
DPNI_PREP_EXTENDED_CFG	include/fsl-mc/fsl_dpni.h	/^#define DPNI_PREP_EXTENDED_CFG(/;"	d
DPNI_QUEUE_OPT_DEST	include/fsl-mc/fsl_dpni.h	/^#define DPNI_QUEUE_OPT_DEST	/;"	d
DPNI_QUEUE_OPT_FLC	include/fsl-mc/fsl_dpni.h	/^#define DPNI_QUEUE_OPT_FLC	/;"	d
DPNI_QUEUE_OPT_ORDER_PRESERVATION	include/fsl-mc/fsl_dpni.h	/^#define DPNI_QUEUE_OPT_ORDER_PRESERVATION /;"	d
DPNI_QUEUE_OPT_TAILDROP_THRESHOLD	include/fsl-mc/fsl_dpni.h	/^#define DPNI_QUEUE_OPT_TAILDROP_THRESHOLD /;"	d
DPNI_QUEUE_OPT_USER_CTX	include/fsl-mc/fsl_dpni.h	/^#define DPNI_QUEUE_OPT_USER_CTX	/;"	d
DPNI_RSP_GET_ATTR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_ATTR(/;"	d
DPNI_RSP_GET_COUNTER	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_COUNTER(/;"	d
DPNI_RSP_GET_LINK_STATE	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_LINK_STATE(/;"	d
DPNI_RSP_GET_PRIMARY_MAC_ADDR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_PRIMARY_MAC_ADDR(/;"	d
DPNI_RSP_GET_QDID	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_QDID(/;"	d
DPNI_RSP_GET_RX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_RX_BUFFER_LAYOUT(/;"	d
DPNI_RSP_GET_RX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_RX_FLOW(/;"	d
DPNI_RSP_GET_TX_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_TX_BUFFER_LAYOUT(/;"	d
DPNI_RSP_GET_TX_CONF	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_TX_CONF(/;"	d
DPNI_RSP_GET_TX_CONF_BUFFER_LAYOUT	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_TX_CONF_BUFFER_LAYOUT(/;"	d
DPNI_RSP_GET_TX_DATA_OFFSET	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_TX_DATA_OFFSET(/;"	d
DPNI_RSP_GET_TX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_GET_TX_FLOW(/;"	d
DPNI_RSP_SET_TX_FLOW	include/fsl-mc/fsl_dpni.h	/^#define DPNI_RSP_SET_TX_FLOW(/;"	d
DPNI_STASH_SIZE_0B	include/fsl-mc/fsl_dpni.h	/^	DPNI_STASH_SIZE_0B = 0,$/;"	e	enum:dpni_stash_size
DPNI_STASH_SIZE_128B	include/fsl-mc/fsl_dpni.h	/^	DPNI_STASH_SIZE_128B = 2,$/;"	e	enum:dpni_stash_size
DPNI_STASH_SIZE_192B	include/fsl-mc/fsl_dpni.h	/^	DPNI_STASH_SIZE_192B = 3,$/;"	e	enum:dpni_stash_size
DPNI_STASH_SIZE_64B	include/fsl-mc/fsl_dpni.h	/^	DPNI_STASH_SIZE_64B = 1,$/;"	e	enum:dpni_stash_size
DPNI_TX_FLOW_OPT_L3_CHKSUM_GEN	include/fsl-mc/fsl_dpni.h	/^#define DPNI_TX_FLOW_OPT_L3_CHKSUM_GEN	/;"	d
DPNI_TX_FLOW_OPT_L4_CHKSUM_GEN	include/fsl-mc/fsl_dpni.h	/^#define DPNI_TX_FLOW_OPT_L4_CHKSUM_GEN	/;"	d
DPNI_TX_FLOW_OPT_TX_CONF_ERROR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_TX_FLOW_OPT_TX_CONF_ERROR	/;"	d
DPNI_VER_MAJOR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_VER_MAJOR	/;"	d
DPNI_VER_MINOR	include/fsl-mc/fsl_dpni.h	/^#define DPNI_VER_MINOR	/;"	d
DPR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define DPR	/;"	d
DPRC_CFG_OPT_AIOP	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CFG_OPT_AIOP	/;"	d
DPRC_CFG_OPT_ALLOC_ALLOWED	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CFG_OPT_ALLOC_ALLOWED	/;"	d
DPRC_CFG_OPT_IRQ_CFG_ALLOWED	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CFG_OPT_IRQ_CFG_ALLOWED	/;"	d
DPRC_CFG_OPT_OBJ_CREATE_ALLOWED	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED	/;"	d
DPRC_CFG_OPT_SPAWN_ALLOWED	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CFG_OPT_SPAWN_ALLOWED	/;"	d
DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED	/;"	d
DPRC_CMDID_CLOSE	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_CLOSE	/;"	d
DPRC_CMDID_CONNECT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_CONNECT	/;"	d
DPRC_CMDID_CREATE	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_CREATE	/;"	d
DPRC_CMDID_CREATE_CONT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_CREATE_CONT	/;"	d
DPRC_CMDID_DESTROY_CONT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_DESTROY_CONT	/;"	d
DPRC_CMDID_DISCONNECT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_DISCONNECT	/;"	d
DPRC_CMDID_GET_ATTR	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_ATTR	/;"	d
DPRC_CMDID_GET_CONNECTION	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_CONNECTION	/;"	d
DPRC_CMDID_GET_CONT_ID	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_CONT_ID	/;"	d
DPRC_CMDID_GET_OBJ	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_OBJ	/;"	d
DPRC_CMDID_GET_OBJ_COUNT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_OBJ_COUNT	/;"	d
DPRC_CMDID_GET_OBJ_REG	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_OBJ_REG	/;"	d
DPRC_CMDID_GET_RES_COUNT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_RES_COUNT	/;"	d
DPRC_CMDID_GET_RES_IDS	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_GET_RES_IDS	/;"	d
DPRC_CMDID_OPEN	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_OPEN	/;"	d
DPRC_CMDID_RESET_CONT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMDID_RESET_CONT	/;"	d
DPRC_CMD_CONNECT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_CONNECT(/;"	d
DPRC_CMD_CREATE_CONTAINER	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_CREATE_CONTAINER(/;"	d
DPRC_CMD_DESTROY_CONTAINER	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_DESTROY_CONTAINER(/;"	d
DPRC_CMD_DISCONNECT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_DISCONNECT(/;"	d
DPRC_CMD_GET_CONNECTION	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_GET_CONNECTION(/;"	d
DPRC_CMD_GET_OBJ	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_GET_OBJ(/;"	d
DPRC_CMD_GET_OBJ_DESC	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_GET_OBJ_DESC(/;"	d
DPRC_CMD_GET_OBJ_REGION	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_GET_OBJ_REGION(/;"	d
DPRC_CMD_GET_RES_COUNT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_GET_RES_COUNT(/;"	d
DPRC_CMD_GET_RES_IDS	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_GET_RES_IDS(/;"	d
DPRC_CMD_OPEN	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_OPEN(/;"	d
DPRC_CMD_RESET_CONTAINER	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_RESET_CONTAINER(/;"	d
DPRC_CMD_SET_OBJ_LABEL	include/fsl-mc/fsl_dprc.h	/^#define DPRC_CMD_SET_OBJ_LABEL(/;"	d
DPRC_GET_ICID_FROM_POOL	include/fsl-mc/fsl_dprc.h	/^#define DPRC_GET_ICID_FROM_POOL	/;"	d
DPRC_GET_PORTAL_ID_FROM_POOL	include/fsl-mc/fsl_dprc.h	/^#define DPRC_GET_PORTAL_ID_FROM_POOL	/;"	d
DPRC_ITER_STATUS_FIRST	include/fsl-mc/fsl_dprc.h	/^	DPRC_ITER_STATUS_FIRST = 0,$/;"	e	enum:dprc_iter_status
DPRC_ITER_STATUS_LAST	include/fsl-mc/fsl_dprc.h	/^	DPRC_ITER_STATUS_LAST = 2$/;"	e	enum:dprc_iter_status
DPRC_ITER_STATUS_MORE	include/fsl-mc/fsl_dprc.h	/^	DPRC_ITER_STATUS_MORE = 1,$/;"	e	enum:dprc_iter_status
DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY	include/fsl-mc/fsl_dprc.h	/^#define DPRC_OBJ_FLAG_NO_MEM_SHAREABILITY	/;"	d
DPRC_OBJ_STATE_OPEN	include/fsl-mc/fsl_dprc.h	/^#define DPRC_OBJ_STATE_OPEN	/;"	d
DPRC_OBJ_STATE_PLUGGED	include/fsl-mc/fsl_dprc.h	/^#define DPRC_OBJ_STATE_PLUGGED	/;"	d
DPRC_REGION_CACHEABLE	include/fsl-mc/fsl_dprc.h	/^#define DPRC_REGION_CACHEABLE	/;"	d
DPRC_REGION_TYPE_MC_PORTAL	include/fsl-mc/fsl_dprc.h	/^	DPRC_REGION_TYPE_MC_PORTAL,$/;"	e	enum:dprc_region_type
DPRC_REGION_TYPE_QBMAN_PORTAL	include/fsl-mc/fsl_dprc.h	/^	DPRC_REGION_TYPE_QBMAN_PORTAL$/;"	e	enum:dprc_region_type
DPRC_RSP_CREATE_CONTAINER	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_CREATE_CONTAINER(/;"	d
DPRC_RSP_GET_ATTRIBUTES	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_ATTRIBUTES(/;"	d
DPRC_RSP_GET_CONNECTION	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_CONNECTION(/;"	d
DPRC_RSP_GET_CONTAINER_ID	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_CONTAINER_ID(/;"	d
DPRC_RSP_GET_OBJ	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_OBJ(/;"	d
DPRC_RSP_GET_OBJ_COUNT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_OBJ_COUNT(/;"	d
DPRC_RSP_GET_OBJ_DESC	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_OBJ_DESC(/;"	d
DPRC_RSP_GET_OBJ_REGION	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_OBJ_REGION(/;"	d
DPRC_RSP_GET_RES_COUNT	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_RES_COUNT(/;"	d
DPRC_RSP_GET_RES_IDS	include/fsl-mc/fsl_dprc.h	/^#define DPRC_RSP_GET_RES_IDS(/;"	d
DPRC_VER_MAJOR	include/fsl-mc/fsl_dprc.h	/^#define DPRC_VER_MAJOR	/;"	d
DPRC_VER_MINOR	include/fsl-mc/fsl_dprc.h	/^#define DPRC_VER_MINOR	/;"	d
DPRINT	arch/powerpc/cpu/mpc5xx/spi.c	/^#define	DPRINT(/;"	d	file:
DPRINT	arch/powerpc/cpu/mpc8260/spi.c	/^#define	DPRINT(/;"	d	file:
DPRINT	arch/powerpc/cpu/mpc8xx/spi.c	/^#define	DPRINT(/;"	d	file:
DPRINT	drivers/i2c/tsi108_i2c.c	/^#define DPRINT(/;"	d	file:
DPRINT	drivers/video/ati_radeon_fb.c	/^#define DPRINT(/;"	d	file:
DPRINTF	drivers/rtc/ds1302.c	/^#  define DPRINTF(/;"	d	file:
DPRPU	drivers/usb/host/r8a66597.h	/^#define	DPRPU	/;"	d
DPR_EPM	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DPR_EPM	/;"	d
DPR_PRS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DPR_PRS	/;"	d
DPR_SIZE_MASK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  DPR_SIZE_MASK	/;"	d
DPWRDN_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DPWRDN_DISABLE	/;"	d
DPWRDN_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define DPWRDN_EN	/;"	d
DPWRDN_TYPE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DPWRDN_TYPE	/;"	d
DP_ADAPTER_CTRL	include/linux/drm_dp_helper.h	/^#define DP_ADAPTER_CTRL	/;"	d
DP_ADAPTER_CTRL_FORCE_LOAD_SENSE	include/linux/drm_dp_helper.h	/^# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE /;"	d
DP_ADJUST_PRE_EMPHASIS_LANE0_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK	/;"	d
DP_ADJUST_PRE_EMPHASIS_LANE0_MASK	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK /;"	d
DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT	/;"	d
DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT /;"	d
DP_ADJUST_PRE_EMPHASIS_LANE1_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK	/;"	d
DP_ADJUST_PRE_EMPHASIS_LANE1_MASK	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK /;"	d
DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT	/;"	d
DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT /;"	d
DP_ADJUST_REQUEST_LANE0_1	include/linux/drm_dp_helper.h	/^#define DP_ADJUST_REQUEST_LANE0_1	/;"	d
DP_ADJUST_REQUEST_LANE2_3	include/linux/drm_dp_helper.h	/^#define DP_ADJUST_REQUEST_LANE2_3	/;"	d
DP_ADJUST_VOLTAGE_SWING_LANE0_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK	/;"	d
DP_ADJUST_VOLTAGE_SWING_LANE0_MASK	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK /;"	d
DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT	/;"	d
DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT /;"	d
DP_ADJUST_VOLTAGE_SWING_LANE1_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK	/;"	d
DP_ADJUST_VOLTAGE_SWING_LANE1_MASK	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK /;"	d
DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT	/;"	d
DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT /;"	d
DP_ALLOCATE_PAYLOAD	include/linux/drm_dp_helper.h	/^#define DP_ALLOCATE_PAYLOAD	/;"	d
DP_ASYNC0	drivers/video/ipu_regs.h	/^#define DP_ASYNC0 /;"	d
DP_ASYNC1	drivers/video/ipu_regs.h	/^#define DP_ASYNC1 /;"	d
DP_AUDIO_CTRL	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_CTRL	/;"	d
DP_AUDIO_HBLANK_SYMBOLS	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_HBLANK_SYMBOLS	/;"	d
DP_AUDIO_HBLANK_SYMBOLS_MASK	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_HBLANK_SYMBOLS_MASK	/;"	d
DP_AUDIO_HBLANK_SYMBOLS_VALUE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_HBLANK_SYMBOLS_VALUE_SHIFT	/;"	d
DP_AUDIO_VBLANK_SYMBOLS	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_VBLANK_SYMBOLS	/;"	d
DP_AUDIO_VBLANK_SYMBOLS_MASK	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_VBLANK_SYMBOLS_MASK	/;"	d
DP_AUDIO_VBLANK_SYMBOLS_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_AUDIO_VBLANK_SYMBOLS_SHIFT	/;"	d
DP_AUTOMATED_TEST_REQUEST	include/linux/drm_dp_helper.h	/^# define DP_AUTOMATED_TEST_REQUEST	/;"	d
DP_AUX_COMMON_MODE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_AUX_COMMON_MODE	/;"	d
DP_AUX_DEFER_MAX_TRIES	drivers/video/tegra124/displayport.h	/^#define DP_AUX_DEFER_MAX_TRIES	/;"	d
DP_AUX_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_AUX_EN	/;"	d
DP_AUX_I2C_MOT	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_MOT	/;"	d
DP_AUX_I2C_READ	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_READ	/;"	d
DP_AUX_I2C_REPLY_ACK	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_REPLY_ACK	/;"	d
DP_AUX_I2C_REPLY_DEFER	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_REPLY_DEFER	/;"	d
DP_AUX_I2C_REPLY_MASK	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_REPLY_MASK	/;"	d
DP_AUX_I2C_REPLY_NACK	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_REPLY_NACK	/;"	d
DP_AUX_I2C_STATUS	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_STATUS	/;"	d
DP_AUX_I2C_WRITE	include/linux/drm_dp_helper.h	/^#define DP_AUX_I2C_WRITE	/;"	d
DP_AUX_MAX_BYTES	drivers/video/tegra124/displayport.h	/^#define DP_AUX_MAX_BYTES	/;"	d
DP_AUX_NATIVE_READ	include/linux/drm_dp_helper.h	/^#define DP_AUX_NATIVE_READ	/;"	d
DP_AUX_NATIVE_REPLY_ACK	include/linux/drm_dp_helper.h	/^#define DP_AUX_NATIVE_REPLY_ACK	/;"	d
DP_AUX_NATIVE_REPLY_DEFER	include/linux/drm_dp_helper.h	/^#define DP_AUX_NATIVE_REPLY_DEFER	/;"	d
DP_AUX_NATIVE_REPLY_MASK	include/linux/drm_dp_helper.h	/^#define DP_AUX_NATIVE_REPLY_MASK	/;"	d
DP_AUX_NATIVE_REPLY_NACK	include/linux/drm_dp_helper.h	/^#define DP_AUX_NATIVE_REPLY_NACK	/;"	d
DP_AUX_NATIVE_WRITE	include/linux/drm_dp_helper.h	/^#define DP_AUX_NATIVE_WRITE	/;"	d
DP_AUX_TIMEOUT_MAX_TRIES	drivers/video/tegra124/displayport.h	/^#define DP_AUX_TIMEOUT_MAX_TRIES	/;"	d
DP_AUX_TIMEOUT_MS	drivers/video/tegra124/displayport.h	/^#define DP_AUX_TIMEOUT_MS	/;"	d
DP_BG_OUT_SEL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_BG_OUT_SEL	/;"	d
DP_BG_SEL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_BG_SEL	/;"	d
DP_BNDRY	drivers/net/ne2000_base.h	/^#define DP_BNDRY	/;"	d
DP_BRANCH_DEVICE_CTRL	include/linux/drm_dp_helper.h	/^#define DP_BRANCH_DEVICE_CTRL	/;"	d
DP_BRANCH_DEVICE_IRQ_HPD	include/linux/drm_dp_helper.h	/^# define DP_BRANCH_DEVICE_IRQ_HPD	/;"	d
DP_BRANCH_OUI	include/linux/drm_dp_helper.h	/^#define DP_BRANCH_OUI	/;"	d
DP_BRUSH_BKGD_CLR	include/radeon.h	/^#define DP_BRUSH_BKGD_CLR	/;"	d
DP_BRUSH_FRGD_CLR	include/radeon.h	/^#define DP_BRUSH_FRGD_CLR	/;"	d
DP_CER	drivers/net/ne2000_base.h	/^#define DP_CER	/;"	d
DP_CHANNEL_EQ_BITS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_CHANNEL_EQ_BITS	/;"	d
DP_CHANNEL_EQ_BITS	include/linux/drm_dp_helper.h	/^#define DP_CHANNEL_EQ_BITS /;"	d
DP_CLDA0	drivers/net/ne2000_base.h	/^#define DP_CLDA0	/;"	d
DP_CLDA1	drivers/net/ne2000_base.h	/^#define DP_CLDA1	/;"	d
DP_CLEAR_PAYLOAD_ID_TABLE	include/linux/drm_dp_helper.h	/^#define DP_CLEAR_PAYLOAD_ID_TABLE	/;"	d
DP_CNTL	include/radeon.h	/^#define DP_CNTL	/;"	d
DP_CNTL_XDIR_YDIR_YMAJOR	include/radeon.h	/^#define DP_CNTL_XDIR_YDIR_YMAJOR	/;"	d
DP_COM_CONF	drivers/video/ipu_regs.h	/^#define DP_COM_CONF(/;"	d
DP_COM_CONF_CSC_DEF_BG	drivers/video/ipu_regs.h	/^	DP_COM_CONF_CSC_DEF_BG = 0x00000200,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_CSC_DEF_BOTH	drivers/video/ipu_regs.h	/^	DP_COM_CONF_CSC_DEF_BOTH = 0x00000100,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_CSC_DEF_FG	drivers/video/ipu_regs.h	/^	DP_COM_CONF_CSC_DEF_FG = 0x00000300,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_CSC_DEF_MASK	drivers/video/ipu_regs.h	/^	DP_COM_CONF_CSC_DEF_MASK = 0x00000300,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_CSC_DEF_OFFSET	drivers/video/ipu_regs.h	/^	DP_COM_CONF_CSC_DEF_OFFSET = 8,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_FG_EN	drivers/video/ipu_regs.h	/^	DP_COM_CONF_FG_EN = 0x00000001,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_GAMMA_EN	drivers/video/ipu_regs.h	/^	DP_COM_CONF_GAMMA_EN = 0x00001000,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_GAMMA_YUV_EN	drivers/video/ipu_regs.h	/^	DP_COM_CONF_GAMMA_YUV_EN = 0x00002000,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_GWAM	drivers/video/ipu_regs.h	/^	DP_COM_CONF_GWAM = 0x00000004,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_GWCKE	drivers/video/ipu_regs.h	/^	DP_COM_CONF_GWCKE = 0x00000008,$/;"	e	enum:__anonf09a0ccd0103
DP_COM_CONF_GWSEL	drivers/video/ipu_regs.h	/^	DP_COM_CONF_GWSEL = 0x00000002,$/;"	e	enum:__anonf09a0ccd0103
DP_CONFIG	drivers/video/tegra124/sor.h	/^#define DP_CONFIG(/;"	d
DP_CONFIG_ACTIVESYM_CNTL_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_CNTL_DISABLE	/;"	d
DP_CONFIG_ACTIVESYM_CNTL_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_CNTL_ENABLE	/;"	d
DP_CONFIG_ACTIVESYM_CNTL_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_CNTL_SHIFT	/;"	d
DP_CONFIG_ACTIVESYM_COUNT_MASK	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_COUNT_MASK	/;"	d
DP_CONFIG_ACTIVESYM_COUNT_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_COUNT_SHIFT	/;"	d
DP_CONFIG_ACTIVESYM_FRAC_MASK	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_FRAC_MASK	/;"	d
DP_CONFIG_ACTIVESYM_FRAC_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_FRAC_SHIFT	/;"	d
DP_CONFIG_ACTIVESYM_POLARITY_NEGATIVE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_POLARITY_NEGATIVE	/;"	d
DP_CONFIG_ACTIVESYM_POLARITY_POSITIVE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_POLARITY_POSITIVE	/;"	d
DP_CONFIG_ACTIVESYM_POLARITY_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_ACTIVESYM_POLARITY_SHIFT	/;"	d
DP_CONFIG_IDLE_BEFORE_ATTACH_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_IDLE_BEFORE_ATTACH_DISABLE	/;"	d
DP_CONFIG_IDLE_BEFORE_ATTACH_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_IDLE_BEFORE_ATTACH_ENABLE	/;"	d
DP_CONFIG_IDLE_BEFORE_ATTACH_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_IDLE_BEFORE_ATTACH_SHIFT	/;"	d
DP_CONFIG_RD_RESET_VAL_NEGATIVE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_RD_RESET_VAL_NEGATIVE	/;"	d
DP_CONFIG_RD_RESET_VAL_POSITIVE	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_RD_RESET_VAL_POSITIVE	/;"	d
DP_CONFIG_RD_RESET_VAL_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_RD_RESET_VAL_SHIFT	/;"	d
DP_CONFIG_WATERMARK_MASK	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_WATERMARK_MASK	/;"	d
DP_CONFIG_WATERMARK_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_CONFIG_WATERMARK_SHIFT	/;"	d
DP_CONNECTION_STATUS_NOTIFY	include/linux/drm_dp_helper.h	/^#define DP_CONNECTION_STATUS_NOTIFY	/;"	d
DP_CONVERSION_TEMP	include/radeon.h	/^#define DP_CONVERSION_TEMP	/;"	d
DP_CP_IRQ	include/linux/drm_dp_helper.h	/^# define DP_CP_IRQ	/;"	d
DP_CR	drivers/net/ne2000_base.h	/^#define DP_CR	/;"	d
DP_CRDA0	drivers/net/ne2000_base.h	/^#define DP_CRDA0	/;"	d
DP_CRDA1	drivers/net/ne2000_base.h	/^#define DP_CRDA1	/;"	d
DP_CR_NODMA	drivers/net/ne2000_base.h	/^#define DP_CR_NODMA	/;"	d
DP_CR_PAGE0	drivers/net/ne2000_base.h	/^#define DP_CR_PAGE0	/;"	d
DP_CR_PAGE1	drivers/net/ne2000_base.h	/^#define DP_CR_PAGE1	/;"	d
DP_CR_PAGE2	drivers/net/ne2000_base.h	/^#define DP_CR_PAGE2	/;"	d
DP_CR_PAGEMSK	drivers/net/ne2000_base.h	/^#define DP_CR_PAGEMSK	/;"	d
DP_CR_RDMA	drivers/net/ne2000_base.h	/^#define DP_CR_RDMA	/;"	d
DP_CR_SEND	drivers/net/ne2000_base.h	/^#define DP_CR_SEND	/;"	d
DP_CR_START	drivers/net/ne2000_base.h	/^#define DP_CR_START	/;"	d
DP_CR_STOP	drivers/net/ne2000_base.h	/^#define DP_CR_STOP	/;"	d
DP_CR_TXPKT	drivers/net/ne2000_base.h	/^#define DP_CR_TXPKT	/;"	d
DP_CR_WDMA	drivers/net/ne2000_base.h	/^#define DP_CR_WDMA	/;"	d
DP_CSC_0	drivers/video/ipu_regs.h	/^#define DP_CSC_0(/;"	d
DP_CSC_1	drivers/video/ipu_regs.h	/^#define DP_CSC_1(/;"	d
DP_CSC_A_0	drivers/video/ipu_regs.h	/^#define DP_CSC_A_0(/;"	d
DP_CSC_A_1	drivers/video/ipu_regs.h	/^#define DP_CSC_A_1(/;"	d
DP_CSC_A_2	drivers/video/ipu_regs.h	/^#define DP_CSC_A_2(/;"	d
DP_CSC_A_3	drivers/video/ipu_regs.h	/^#define DP_CSC_A_3(/;"	d
DP_DATA	arch/arm/include/asm/omap_mmc.h	/^#define DP_DATA	/;"	d
DP_DATA	drivers/net/ax88796.h	/^#define DP_DATA	/;"	d
DP_DATA	drivers/net/ne2000.h	/^#define DP_DATA	/;"	d
DP_DATAPORT	drivers/net/ne2000_base.h	/^#define DP_DATAPORT	/;"	d
DP_DATATYPE	include/radeon.h	/^#define DP_DATATYPE	/;"	d
DP_DB_CUR_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_DB_CUR_CTRL	/;"	d
DP_DCR	drivers/net/ne2000_base.h	/^#define DP_DCR	/;"	d
DP_DCR_ARM	drivers/net/ne2000_base.h	/^#define DP_DCR_ARM	/;"	d
DP_DCR_BOS	drivers/net/ne2000_base.h	/^#define DP_DCR_BOS	/;"	d
DP_DCR_FIFO_1	drivers/net/ne2000_base.h	/^#define DP_DCR_FIFO_1	/;"	d
DP_DCR_FIFO_2	drivers/net/ne2000_base.h	/^#define DP_DCR_FIFO_2	/;"	d
DP_DCR_FIFO_4	drivers/net/ne2000_base.h	/^#define DP_DCR_FIFO_4	/;"	d
DP_DCR_FIFO_6	drivers/net/ne2000_base.h	/^#define DP_DCR_FIFO_6	/;"	d
DP_DCR_INIT	drivers/net/ne2000_base.h	/^#define DP_DCR_INIT	/;"	d
DP_DCR_LAS	drivers/net/ne2000_base.h	/^#define DP_DCR_LAS	/;"	d
DP_DCR_LS	drivers/net/ne2000_base.h	/^#define DP_DCR_LS	/;"	d
DP_DCR_WTS	drivers/net/ne2000_base.h	/^#define DP_DCR_WTS	/;"	d
DP_DEBUG	drivers/video/tegra124/sor.h	/^#define DP_DEBUG(/;"	d
DP_DETAILED_CAP_INFO_AVAILABLE	include/linux/drm_dp_helper.h	/^# define DP_DETAILED_CAP_INFO_AVAILABLE	/;"	d
DP_DEVICE_SERVICE_IRQ_VECTOR	include/linux/drm_dp_helper.h	/^#define DP_DEVICE_SERVICE_IRQ_VECTOR	/;"	d
DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0	include/linux/drm_dp_helper.h	/^#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0 /;"	d
DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1	include/linux/drm_dp_helper.h	/^#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 /;"	d
DP_DISABLE	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_DISABLE,$/;"	e	enum:__anon79d8640c0103
DP_DOWNSPREAD_CTRL	include/linux/drm_dp_helper.h	/^#define DP_DOWNSPREAD_CTRL	/;"	d
DP_DOWNSTREAMPORT_PRESENT	include/linux/drm_dp_helper.h	/^#define DP_DOWNSTREAMPORT_PRESENT /;"	d
DP_DOWNSTREAM_PORT_0	include/linux/drm_dp_helper.h	/^#define DP_DOWNSTREAM_PORT_0	/;"	d
DP_DOWNSTREAM_PORT_STATUS_CHANGED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_DOWNSTREAM_PORT_STATUS_CHANGED	/;"	d
DP_DOWNSTREAM_PORT_STATUS_CHANGED	include/linux/drm_dp_helper.h	/^#define DP_DOWNSTREAM_PORT_STATUS_CHANGED /;"	d
DP_DOWN_REP_MSG_RDY	include/linux/drm_dp_helper.h	/^# define DP_DOWN_REP_MSG_RDY	/;"	d
DP_DOWN_STREAM_PORT_COUNT	include/linux/drm_dp_helper.h	/^#define DP_DOWN_STREAM_PORT_COUNT	/;"	d
DP_DPCD_REV	include/linux/drm_dp_helper.h	/^#define DP_DPCD_REV /;"	d
DP_DPCD_REV_10	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_DPCD_REV_10 = 0x10,$/;"	e	enum:__anon79d8640c0803
DP_DPCD_REV_11	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_DPCD_REV_11 = 0x11,$/;"	e	enum:__anon79d8640c0803
DP_DPCD_REV_MAJOR_MASK	drivers/video/tegra124/displayport.h	/^#define DP_DPCD_REV_MAJOR_MASK	/;"	d
DP_DPCD_REV_MAJOR_SHIFT	drivers/video/tegra124/displayport.h	/^#define DP_DPCD_REV_MAJOR_SHIFT	/;"	d
DP_DPCD_REV_MINOR_MASK	drivers/video/tegra124/displayport.h	/^#define DP_DPCD_REV_MINOR_MASK	/;"	d
DP_DPCD_REV_MINOR_SHIFT	drivers/video/tegra124/displayport.h	/^#define DP_DPCD_REV_MINOR_SHIFT	/;"	d
DP_DPCP_RETRY_SLEEP_NS	drivers/video/tegra124/displayport.h	/^#define DP_DPCP_RETRY_SLEEP_NS	/;"	d
DP_DS_PORT_HPD	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_HPD	/;"	d
DP_DS_PORT_TYPE_DP	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_TYPE_DP	/;"	d
DP_DS_PORT_TYPE_DVI	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_TYPE_DVI	/;"	d
DP_DS_PORT_TYPE_HDMI	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_TYPE_HDMI	/;"	d
DP_DS_PORT_TYPE_MASK	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_TYPE_MASK	/;"	d
DP_DS_PORT_TYPE_NON_EDID	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_TYPE_NON_EDID	/;"	d
DP_DS_PORT_TYPE_VGA	include/linux/drm_dp_helper.h	/^# define DP_DS_PORT_TYPE_VGA	/;"	d
DP_DS_VGA_10BPC	include/linux/drm_dp_helper.h	/^# define DP_DS_VGA_10BPC	/;"	d
DP_DS_VGA_12BPC	include/linux/drm_dp_helper.h	/^# define DP_DS_VGA_12BPC	/;"	d
DP_DS_VGA_16BPC	include/linux/drm_dp_helper.h	/^# define DP_DS_VGA_16BPC	/;"	d
DP_DS_VGA_8BPC	include/linux/drm_dp_helper.h	/^# define DP_DS_VGA_8BPC	/;"	d
DP_DS_VGA_MAX_BPC_MASK	include/linux/drm_dp_helper.h	/^# define DP_DS_VGA_MAX_BPC_MASK	/;"	d
DP_DWN_STRM_PORT_PRESENT	include/linux/drm_dp_helper.h	/^# define DP_DWN_STRM_PORT_PRESENT /;"	d
DP_DWN_STRM_PORT_TYPE_ANALOG	include/linux/drm_dp_helper.h	/^# define DP_DWN_STRM_PORT_TYPE_ANALOG /;"	d
DP_DWN_STRM_PORT_TYPE_DP	include/linux/drm_dp_helper.h	/^# define DP_DWN_STRM_PORT_TYPE_DP /;"	d
DP_DWN_STRM_PORT_TYPE_MASK	include/linux/drm_dp_helper.h	/^# define DP_DWN_STRM_PORT_TYPE_MASK /;"	d
DP_DWN_STRM_PORT_TYPE_OTHER	include/linux/drm_dp_helper.h	/^# define DP_DWN_STRM_PORT_TYPE_OTHER /;"	d
DP_DWN_STRM_PORT_TYPE_TMDS	include/linux/drm_dp_helper.h	/^# define DP_DWN_STRM_PORT_TYPE_TMDS /;"	d
DP_EDP_CONFIGURATION_CAP	include/linux/drm_dp_helper.h	/^#define DP_EDP_CONFIGURATION_CAP /;"	d
DP_EDP_CONFIGURATION_CAP_ASC_RESET_YES	drivers/video/tegra124/displayport.h	/^#define DP_EDP_CONFIGURATION_CAP_ASC_RESET_YES	/;"	d
DP_EDP_CONFIGURATION_CAP_FRAMING_CHANGE_YES	drivers/video/tegra124/displayport.h	/^#define DP_EDP_CONFIGURATION_CAP_FRAMING_CHANGE_YES	/;"	d
DP_EDP_CONFIGURATION_SET	include/linux/drm_dp_helper.h	/^#define DP_EDP_CONFIGURATION_SET /;"	d
DP_ENABLE	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_ENABLE,$/;"	e	enum:__anon79d8640c0103
DP_ENHANCED_FRAME_CAP	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_ENHANCED_FRAME_CAP	/;"	d
DP_ENHANCED_FRAME_CAP	include/linux/drm_dp_helper.h	/^# define DP_ENHANCED_FRAME_CAP	/;"	d
DP_ENUM_PATH_RESOURCES	include/linux/drm_dp_helper.h	/^#define DP_ENUM_PATH_RESOURCES	/;"	d
DP_FAUX_CAP	include/linux/drm_dp_helper.h	/^#define DP_FAUX_CAP	/;"	d
DP_FAUX_CAP_1	include/linux/drm_dp_helper.h	/^# define DP_FAUX_CAP_1	/;"	d
DP_FER	drivers/net/ne2000_base.h	/^#define DP_FER	/;"	d
DP_FIFO	drivers/net/ne2000_base.h	/^#define DP_FIFO	/;"	d
DP_FORMAT_CONVERSION	include/linux/drm_dp_helper.h	/^# define DP_FORMAT_CONVERSION /;"	d
DP_GENERIC_INFOFRAME_HEADER	drivers/video/tegra124/sor.h	/^#define DP_GENERIC_INFOFRAME_HEADER	/;"	d
DP_GENERIC_INFOFRAME_SUBPACK	drivers/video/tegra124/sor.h	/^#define DP_GENERIC_INFOFRAME_SUBPACK(/;"	d
DP_GET_SINK_COUNT	include/linux/drm_dp_helper.h	/^# define DP_GET_SINK_COUNT(/;"	d
DP_GRAPH_WIND_CTRL	drivers/video/ipu_regs.h	/^#define DP_GRAPH_WIND_CTRL(/;"	d
DP_GUID	include/linux/drm_dp_helper.h	/^#define DP_GUID	/;"	d
DP_GUI_MASTER_CNTL	include/radeon.h	/^#define DP_GUI_MASTER_CNTL	/;"	d
DP_I2C_SPEED_100K	include/linux/drm_dp_helper.h	/^# define DP_I2C_SPEED_100K	/;"	d
DP_I2C_SPEED_10K	include/linux/drm_dp_helper.h	/^# define DP_I2C_SPEED_10K	/;"	d
DP_I2C_SPEED_1K	include/linux/drm_dp_helper.h	/^# define DP_I2C_SPEED_1K	/;"	d
DP_I2C_SPEED_1M	include/linux/drm_dp_helper.h	/^# define DP_I2C_SPEED_1M	/;"	d
DP_I2C_SPEED_400K	include/linux/drm_dp_helper.h	/^# define DP_I2C_SPEED_400K	/;"	d
DP_I2C_SPEED_5K	include/linux/drm_dp_helper.h	/^# define DP_I2C_SPEED_5K	/;"	d
DP_I2C_SPEED_CAP	include/linux/drm_dp_helper.h	/^#define DP_I2C_SPEED_CAP	/;"	d
DP_I2C_SPEED_CONTROL_STATUS	include/linux/drm_dp_helper.h	/^#define DP_I2C_SPEED_CONTROL_STATUS	/;"	d
DP_IMR	drivers/net/ne2000_base.h	/^#define DP_IMR	/;"	d
DP_IMR_All	drivers/net/ne2000_base.h	/^#define DP_IMR_All	/;"	d
DP_IMR_CNT	drivers/net/ne2000_base.h	/^#define DP_IMR_CNT	/;"	d
DP_IMR_OFLW	drivers/net/ne2000_base.h	/^#define DP_IMR_OFLW	/;"	d
DP_IMR_RDC	drivers/net/ne2000_base.h	/^#define DP_IMR_RDC	/;"	d
DP_IMR_RxE	drivers/net/ne2000_base.h	/^#define DP_IMR_RxE	/;"	d
DP_IMR_RxP	drivers/net/ne2000_base.h	/^#define DP_IMR_RxP	/;"	d
DP_IMR_TxE	drivers/net/ne2000_base.h	/^#define DP_IMR_TxE	/;"	d
DP_IMR_TxP	drivers/net/ne2000_base.h	/^#define DP_IMR_TxP	/;"	d
DP_IN	drivers/net/ax88796.h	/^#define DP_IN(/;"	d
DP_IN	drivers/net/ne2000.h	/^#define DP_IN(/;"	d
DP_INIT_TRIES	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_INIT_TRIES /;"	d
DP_INTERLANE_ALIGN_DONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_INTERLANE_ALIGN_DONE	/;"	d
DP_INTERLANE_ALIGN_DONE	include/linux/drm_dp_helper.h	/^#define DP_INTERLANE_ALIGN_DONE	/;"	d
DP_IN_DATA	drivers/net/ax88796.h	/^#define DP_IN_DATA(/;"	d
DP_IN_DATA	drivers/net/ne2000.h	/^#define DP_IN_DATA(/;"	d
DP_IRQ_TYPE_HP_CABLE_IN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DP_IRQ_TYPE_HP_CABLE_IN,$/;"	e	enum:dp_irq_type
DP_IRQ_TYPE_HP_CABLE_OUT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DP_IRQ_TYPE_HP_CABLE_OUT,$/;"	e	enum:dp_irq_type
DP_IRQ_TYPE_HP_CHANGE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DP_IRQ_TYPE_HP_CHANGE,$/;"	e	enum:dp_irq_type
DP_IRQ_TYPE_UNKNOWN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DP_IRQ_TYPE_UNKNOWN,$/;"	e	enum:dp_irq_type
DP_ISR	drivers/net/ne2000_base.h	/^#define DP_ISR	/;"	d
DP_ISR_CNT	drivers/net/ne2000_base.h	/^#define DP_ISR_CNT	/;"	d
DP_ISR_OFLW	drivers/net/ne2000_base.h	/^#define DP_ISR_OFLW	/;"	d
DP_ISR_RDC	drivers/net/ne2000_base.h	/^#define DP_ISR_RDC	/;"	d
DP_ISR_RESET	drivers/net/ne2000_base.h	/^#define DP_ISR_RESET	/;"	d
DP_ISR_RxE	drivers/net/ne2000_base.h	/^#define DP_ISR_RxE	/;"	d
DP_ISR_RxP	drivers/net/ne2000_base.h	/^#define DP_ISR_RxP	/;"	d
DP_ISR_TxE	drivers/net/ne2000_base.h	/^#define DP_ISR_TxE	/;"	d
DP_ISR_TxP	drivers/net/ne2000_base.h	/^#define DP_ISR_TxP	/;"	d
DP_LANE0_1_STATUS	include/linux/drm_dp_helper.h	/^#define DP_LANE0_1_STATUS	/;"	d
DP_LANE2_3_STATUS	include/linux/drm_dp_helper.h	/^#define DP_LANE2_3_STATUS	/;"	d
DP_LANE_ALIGN_STATUS_UPDATED	include/linux/drm_dp_helper.h	/^#define DP_LANE_ALIGN_STATUS_UPDATED	/;"	d
DP_LANE_BW_1_62	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LANE_BW_1_62 = 0x06,$/;"	e	enum:__anon79d8640c0603
DP_LANE_BW_2_70	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LANE_BW_2_70 = 0x0a,$/;"	e	enum:__anon79d8640c0603
DP_LANE_CHANNEL_EQ_DONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_LANE_CHANNEL_EQ_DONE	/;"	d
DP_LANE_CHANNEL_EQ_DONE	include/linux/drm_dp_helper.h	/^# define DP_LANE_CHANNEL_EQ_DONE	/;"	d
DP_LANE_CNT_1	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LANE_CNT_1 = 1,$/;"	e	enum:__anon79d8640c0703
DP_LANE_CNT_2	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LANE_CNT_2 = 2,$/;"	e	enum:__anon79d8640c0703
DP_LANE_CNT_4	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LANE_CNT_4 = 4,$/;"	e	enum:__anon79d8640c0703
DP_LANE_COUNT_ENHANCED_FRAME_EN	include/linux/drm_dp_helper.h	/^# define DP_LANE_COUNT_ENHANCED_FRAME_EN /;"	d
DP_LANE_COUNT_MASK	include/linux/drm_dp_helper.h	/^# define DP_LANE_COUNT_MASK	/;"	d
DP_LANE_COUNT_SET	include/linux/drm_dp_helper.h	/^#define DP_LANE_COUNT_SET	/;"	d
DP_LANE_COUNT_SET_ENHANCEDFRAMING_T	drivers/video/tegra124/displayport.h	/^#define DP_LANE_COUNT_SET_ENHANCEDFRAMING_T	/;"	d
DP_LANE_CR_DONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_LANE_CR_DONE	/;"	d
DP_LANE_CR_DONE	include/linux/drm_dp_helper.h	/^# define DP_LANE_CR_DONE	/;"	d
DP_LANE_STAT_CE_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_LANE_STAT_CE_DONE	/;"	d
DP_LANE_STAT_CR_DONE	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_LANE_STAT_CR_DONE	/;"	d
DP_LANE_STAT_SYM_LOCK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_LANE_STAT_SYM_LOCK	/;"	d
DP_LANE_SYMBOL_LOCKED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_LANE_SYMBOL_LOCKED	/;"	d
DP_LANE_SYMBOL_LOCKED	include/linux/drm_dp_helper.h	/^# define DP_LANE_SYMBOL_LOCKED	/;"	d
DP_LINKCTL	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL(/;"	d
DP_LINKCTL_COMPLIANCEPTTRN_COLORSQARE	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_COMPLIANCEPTTRN_COLORSQARE	/;"	d
DP_LINKCTL_COMPLIANCEPTTRN_NOPATTERN	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_COMPLIANCEPTTRN_NOPATTERN	/;"	d
DP_LINKCTL_COMPLIANCEPTTRN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_COMPLIANCEPTTRN_SHIFT	/;"	d
DP_LINKCTL_ENABLE_NO	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_ENABLE_NO	/;"	d
DP_LINKCTL_ENABLE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_ENABLE_SHIFT	/;"	d
DP_LINKCTL_ENABLE_YES	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_ENABLE_YES	/;"	d
DP_LINKCTL_ENHANCEDFRAME_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_ENHANCEDFRAME_DISABLE	/;"	d
DP_LINKCTL_ENHANCEDFRAME_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_ENHANCEDFRAME_ENABLE	/;"	d
DP_LINKCTL_ENHANCEDFRAME_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_ENHANCEDFRAME_SHIFT	/;"	d
DP_LINKCTL_FORCE_IDLEPTTRN_NO	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_FORCE_IDLEPTTRN_NO	/;"	d
DP_LINKCTL_FORCE_IDLEPTTRN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_FORCE_IDLEPTTRN_SHIFT	/;"	d
DP_LINKCTL_FORCE_IDLEPTTRN_YES	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_FORCE_IDLEPTTRN_YES	/;"	d
DP_LINKCTL_LANECOUNT_FOUR	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_LANECOUNT_FOUR	/;"	d
DP_LINKCTL_LANECOUNT_MASK	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_LANECOUNT_MASK	/;"	d
DP_LINKCTL_LANECOUNT_ONE	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_LANECOUNT_ONE	/;"	d
DP_LINKCTL_LANECOUNT_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_LANECOUNT_SHIFT	/;"	d
DP_LINKCTL_LANECOUNT_TWO	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_LANECOUNT_TWO	/;"	d
DP_LINKCTL_LANECOUNT_ZERO	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_LANECOUNT_ZERO	/;"	d
DP_LINKCTL_SYNCMODE_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_SYNCMODE_DISABLE	/;"	d
DP_LINKCTL_SYNCMODE_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_SYNCMODE_ENABLE	/;"	d
DP_LINKCTL_SYNCMODE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_SYNCMODE_SHIFT	/;"	d
DP_LINKCTL_TUSIZE_MASK	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_TUSIZE_MASK	/;"	d
DP_LINKCTL_TUSIZE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_LINKCTL_TUSIZE_SHIFT	/;"	d
DP_LINK_ADDRESS	include/linux/drm_dp_helper.h	/^#define DP_LINK_ADDRESS	/;"	d
DP_LINK_BW_1_62	include/linux/drm_dp_helper.h	/^# define DP_LINK_BW_1_62	/;"	d
DP_LINK_BW_2_7	include/linux/drm_dp_helper.h	/^# define DP_LINK_BW_2_7	/;"	d
DP_LINK_BW_5_4	include/linux/drm_dp_helper.h	/^# define DP_LINK_BW_5_4	/;"	d
DP_LINK_BW_SET	include/linux/drm_dp_helper.h	/^#define	DP_LINK_BW_SET	/;"	d
DP_LINK_QUAL_PATTERN_D10_2	include/linux/drm_dp_helper.h	/^# define DP_LINK_QUAL_PATTERN_D10_2	/;"	d
DP_LINK_QUAL_PATTERN_DISABLE	include/linux/drm_dp_helper.h	/^# define DP_LINK_QUAL_PATTERN_DISABLE	/;"	d
DP_LINK_QUAL_PATTERN_ERROR_RATE	include/linux/drm_dp_helper.h	/^# define DP_LINK_QUAL_PATTERN_ERROR_RATE /;"	d
DP_LINK_QUAL_PATTERN_MASK	include/linux/drm_dp_helper.h	/^# define DP_LINK_QUAL_PATTERN_MASK	/;"	d
DP_LINK_QUAL_PATTERN_PRBS7	include/linux/drm_dp_helper.h	/^# define DP_LINK_QUAL_PATTERN_PRBS7	/;"	d
DP_LINK_RATE_162	include/linux/drm_dp_helper.h	/^# define DP_LINK_RATE_162	/;"	d
DP_LINK_RATE_27	include/linux/drm_dp_helper.h	/^# define DP_LINK_RATE_27	/;"	d
DP_LINK_SCRAMBLING_DISABLE	include/linux/drm_dp_helper.h	/^# define DP_LINK_SCRAMBLING_DISABLE	/;"	d
DP_LINK_SERVICE_IRQ_VECTOR_ESI0	include/linux/drm_dp_helper.h	/^#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0 /;"	d
DP_LINK_STATUS_SIZE	drivers/video/rockchip/rk_edp.c	/^#define DP_LINK_STATUS_SIZE /;"	d	file:
DP_LINK_STATUS_UPDATED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_LINK_STATUS_UPDATED	/;"	d
DP_LINK_STATUS_UPDATED	include/linux/drm_dp_helper.h	/^#define DP_LINK_STATUS_UPDATED	/;"	d
DP_LT_CR	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LT_CR,$/;"	e	enum:__anon79d8640c0903
DP_LT_ET	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LT_ET,$/;"	e	enum:__anon79d8640c0903
DP_LT_FAIL	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LT_FAIL,$/;"	e	enum:__anon79d8640c0903
DP_LT_FINISHED	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LT_FINISHED,$/;"	e	enum:__anon79d8640c0903
DP_LT_NONE	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LT_NONE,$/;"	e	enum:__anon79d8640c0903
DP_LT_START	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_LT_START,$/;"	e	enum:__anon79d8640c0903
DP_MAIN_LINK_CHANNEL_CODING	include/linux/drm_dp_helper.h	/^#define DP_MAIN_LINK_CHANNEL_CODING /;"	d
DP_MAIN_LINK_CHANNEL_CODING_SET	include/linux/drm_dp_helper.h	/^#define DP_MAIN_LINK_CHANNEL_CODING_SET	/;"	d
DP_MAIN_LINK_CHANNEL_CODING_SET_ASC_RESET_DISABLE	drivers/video/tegra124/displayport.h	/^#define DP_MAIN_LINK_CHANNEL_CODING_SET_ASC_RESET_DISABLE	/;"	d
DP_MAIN_LINK_CHANNEL_CODING_SET_ASC_RESET_ENABLE	drivers/video/tegra124/displayport.h	/^#define DP_MAIN_LINK_CHANNEL_CODING_SET_ASC_RESET_ENABLE	/;"	d
DP_MASK	arch/arm/include/asm/omap_mmc.h	/^#define DP_MASK	/;"	d
DP_MAX_DOWNSPREAD	include/linux/drm_dp_helper.h	/^#define DP_MAX_DOWNSPREAD /;"	d
DP_MAX_DOWNSPREAD_NO_AUX_HANDSHAKE_LT_T	drivers/video/tegra124/displayport.h	/^#define DP_MAX_DOWNSPREAD_NO_AUX_HANDSHAKE_LT_T	/;"	d
DP_MAX_DOWNSPREAD_VAL_0_5_PCT	drivers/video/tegra124/displayport.h	/^#define DP_MAX_DOWNSPREAD_VAL_0_5_PCT	/;"	d
DP_MAX_DOWNSPREAD_VAL_NONE	drivers/video/tegra124/displayport.h	/^#define DP_MAX_DOWNSPREAD_VAL_NONE	/;"	d
DP_MAX_LANE_COUNT	include/linux/drm_dp_helper.h	/^#define DP_MAX_LANE_COUNT /;"	d
DP_MAX_LANE_COUNT_ENHANCED_FRAMING_YES	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LANE_COUNT_ENHANCED_FRAMING_YES	/;"	d
DP_MAX_LANE_COUNT_LANE_1	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LANE_COUNT_LANE_1	/;"	d
DP_MAX_LANE_COUNT_LANE_2	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LANE_COUNT_LANE_2	/;"	d
DP_MAX_LANE_COUNT_LANE_4	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LANE_COUNT_LANE_4	/;"	d
DP_MAX_LANE_COUNT_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_MAX_LANE_COUNT_MASK	/;"	d
DP_MAX_LANE_COUNT_MASK	include/linux/drm_dp_helper.h	/^# define DP_MAX_LANE_COUNT_MASK	/;"	d
DP_MAX_LANE_COUNT_TPS3_SUPPORTED_YES	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LANE_COUNT_TPS3_SUPPORTED_YES	/;"	d
DP_MAX_LINK_RATE	include/linux/drm_dp_helper.h	/^#define DP_MAX_LINK_RATE /;"	d
DP_MAX_LINK_RATE_VAL_1_62_GPBS	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LINK_RATE_VAL_1_62_GPBS	/;"	d
DP_MAX_LINK_RATE_VAL_2_70_GPBS	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LINK_RATE_VAL_2_70_GPBS	/;"	d
DP_MAX_LINK_RATE_VAL_5_40_GPBS	drivers/video/tegra124/displayport.h	/^#define DP_MAX_LINK_RATE_VAL_5_40_GPBS	/;"	d
DP_MCCS_IRQ	include/linux/drm_dp_helper.h	/^# define DP_MCCS_IRQ	/;"	d
DP_MFD_216	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_216	/;"	d
DP_MFD_400	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_400	/;"	d
DP_MFD_455	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_455	/;"	d
DP_MFD_532	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_532	/;"	d
DP_MFD_665	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_665	/;"	d
DP_MFD_700	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_700	/;"	d
DP_MFD_800	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_800	/;"	d
DP_MFD_850	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_850	/;"	d
DP_MFD_864	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFD_864	/;"	d
DP_MFN_216	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_216	/;"	d
DP_MFN_400	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_400	/;"	d
DP_MFN_455	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_455	/;"	d
DP_MFN_532	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_532	/;"	d
DP_MFN_665	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_665	/;"	d
DP_MFN_700	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_700	/;"	d
DP_MFN_800	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_800	/;"	d
DP_MFN_800_DIT	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_800_DIT	/;"	d
DP_MFN_850	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_850	/;"	d
DP_MFN_864	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_MFN_864	/;"	d
DP_MISSED	drivers/net/ne2000_base.h	/^#define DP_MISSED	/;"	d
DP_MIX	include/radeon.h	/^#define DP_MIX	/;"	d
DP_MN	drivers/video/tegra124/sor.h	/^#define DP_MN(/;"	d
DP_MN_M_DELTA_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_MN_M_DELTA_DEFAULT_MASK	/;"	d
DP_MN_M_DELTA_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_MN_M_DELTA_SHIFT	/;"	d
DP_MN_M_MOD_DEC	drivers/video/tegra124/sor.h	/^#define DP_MN_M_MOD_DEC	/;"	d
DP_MN_M_MOD_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_MN_M_MOD_DEFAULT_MASK	/;"	d
DP_MN_M_MOD_INC	drivers/video/tegra124/sor.h	/^#define DP_MN_M_MOD_INC	/;"	d
DP_MN_M_MOD_NONE	drivers/video/tegra124/sor.h	/^#define DP_MN_M_MOD_NONE	/;"	d
DP_MN_M_MOD_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_MN_M_MOD_SHIFT	/;"	d
DP_MN_N_VAL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_MN_N_VAL_DEFAULT_MASK	/;"	d
DP_MN_N_VAL_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_MN_N_VAL_SHIFT	/;"	d
DP_MSA_TIMING_PAR_IGNORED	include/linux/drm_dp_helper.h	/^# define DP_MSA_TIMING_PAR_IGNORED	/;"	d
DP_MSA_TIMING_PAR_IGNORE_EN	include/linux/drm_dp_helper.h	/^# define DP_MSA_TIMING_PAR_IGNORE_EN	/;"	d
DP_MSTM_CAP	include/linux/drm_dp_helper.h	/^#define DP_MSTM_CAP	/;"	d
DP_MSTM_CTRL	include/linux/drm_dp_helper.h	/^#define DP_MSTM_CTRL	/;"	d
DP_MST_CAP	include/linux/drm_dp_helper.h	/^# define DP_MST_CAP	/;"	d
DP_MST_EN	include/linux/drm_dp_helper.h	/^# define DP_MST_EN	/;"	d
DP_NAK_ALLOCATE_FAIL	include/linux/drm_dp_helper.h	/^#define DP_NAK_ALLOCATE_FAIL	/;"	d
DP_NAK_BAD_PARAM	include/linux/drm_dp_helper.h	/^#define DP_NAK_BAD_PARAM	/;"	d
DP_NAK_CRC_FAILURE	include/linux/drm_dp_helper.h	/^#define DP_NAK_CRC_FAILURE	/;"	d
DP_NAK_DEFER	include/linux/drm_dp_helper.h	/^#define DP_NAK_DEFER	/;"	d
DP_NAK_DPCD_FAIL	include/linux/drm_dp_helper.h	/^#define DP_NAK_DPCD_FAIL	/;"	d
DP_NAK_I2C_NAK	include/linux/drm_dp_helper.h	/^#define DP_NAK_I2C_NAK	/;"	d
DP_NAK_INVALID_READ	include/linux/drm_dp_helper.h	/^#define DP_NAK_INVALID_READ	/;"	d
DP_NAK_LINK_FAILURE	include/linux/drm_dp_helper.h	/^#define DP_NAK_LINK_FAILURE	/;"	d
DP_NAK_NO_RESOURCES	include/linux/drm_dp_helper.h	/^#define DP_NAK_NO_RESOURCES	/;"	d
DP_NAK_WRITE_FAILURE	include/linux/drm_dp_helper.h	/^#define DP_NAK_WRITE_FAILURE	/;"	d
DP_NCR	drivers/net/ne2000_base.h	/^#define DP_NCR	/;"	d
DP_NONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	DP_NONE$/;"	e	enum:pattern_set
DP_NONE	arch/arm/mach-exynos/include/mach/dp_info.h	/^	DP_NONE$/;"	e	enum:__anon79d8640c0b03
DP_NORP	include/linux/drm_dp_helper.h	/^#define DP_NORP /;"	d
DP_NO_AUX_HANDSHAKE_LINK_TRAINING	include/linux/drm_dp_helper.h	/^# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING /;"	d
DP_NO_DATA	arch/arm/include/asm/omap_mmc.h	/^#define DP_NO_DATA	/;"	d
DP_OFFSET	arch/arm/include/asm/omap_mmc.h	/^#define DP_OFFSET	/;"	d
DP_OP_216	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_216	/;"	d
DP_OP_400	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_400	/;"	d
DP_OP_455	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_455	/;"	d
DP_OP_532	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_532	/;"	d
DP_OP_665	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_665	/;"	d
DP_OP_700	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_700	/;"	d
DP_OP_800	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_800	/;"	d
DP_OP_850	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_850	/;"	d
DP_OP_864	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DP_OP_864	/;"	d
DP_OUI_SUPPORT	include/linux/drm_dp_helper.h	/^# define DP_OUI_SUPPORT	/;"	d
DP_OUT	drivers/net/ax88796.h	/^#define DP_OUT(/;"	d
DP_OUT	drivers/net/ne2000.h	/^#define DP_OUT(/;"	d
DP_OUT_DATA	drivers/net/ax88796.h	/^#define DP_OUT_DATA(/;"	d
DP_OUT_DATA	drivers/net/ne2000.h	/^#define DP_OUT_DATA(/;"	d
DP_P1_CR	drivers/net/ne2000_base.h	/^#define DP_P1_CR	/;"	d
DP_P1_CURP	drivers/net/ne2000_base.h	/^#define DP_P1_CURP	/;"	d
DP_P1_MAR0	drivers/net/ne2000_base.h	/^#define DP_P1_MAR0	/;"	d
DP_P1_MAR1	drivers/net/ne2000_base.h	/^#define DP_P1_MAR1	/;"	d
DP_P1_MAR2	drivers/net/ne2000_base.h	/^#define DP_P1_MAR2	/;"	d
DP_P1_MAR3	drivers/net/ne2000_base.h	/^#define DP_P1_MAR3	/;"	d
DP_P1_MAR4	drivers/net/ne2000_base.h	/^#define DP_P1_MAR4	/;"	d
DP_P1_MAR5	drivers/net/ne2000_base.h	/^#define DP_P1_MAR5	/;"	d
DP_P1_MAR6	drivers/net/ne2000_base.h	/^#define DP_P1_MAR6	/;"	d
DP_P1_MAR7	drivers/net/ne2000_base.h	/^#define DP_P1_MAR7	/;"	d
DP_P1_PAR0	drivers/net/ne2000_base.h	/^#define DP_P1_PAR0	/;"	d
DP_P1_PAR1	drivers/net/ne2000_base.h	/^#define DP_P1_PAR1	/;"	d
DP_P1_PAR2	drivers/net/ne2000_base.h	/^#define DP_P1_PAR2	/;"	d
DP_P1_PAR3	drivers/net/ne2000_base.h	/^#define DP_P1_PAR3	/;"	d
DP_P1_PAR4	drivers/net/ne2000_base.h	/^#define DP_P1_PAR4	/;"	d
DP_P1_PAR5	drivers/net/ne2000_base.h	/^#define DP_P1_PAR5	/;"	d
DP_P2_ACH	drivers/net/ne2000_base.h	/^#define DP_P2_ACH	/;"	d
DP_P2_ACL	drivers/net/ne2000_base.h	/^#define DP_P2_ACL	/;"	d
DP_P2_CLDA0	drivers/net/ne2000_base.h	/^#define DP_P2_CLDA0	/;"	d
DP_P2_CLDA1	drivers/net/ne2000_base.h	/^#define DP_P2_CLDA1	/;"	d
DP_P2_CR	drivers/net/ne2000_base.h	/^#define DP_P2_CR	/;"	d
DP_P2_DCR	drivers/net/ne2000_base.h	/^#define DP_P2_DCR	/;"	d
DP_P2_IMR	drivers/net/ne2000_base.h	/^#define DP_P2_IMR	/;"	d
DP_P2_LNPP	drivers/net/ne2000_base.h	/^#define DP_P2_LNPP	/;"	d
DP_P2_PSTART	drivers/net/ne2000_base.h	/^#define DP_P2_PSTART	/;"	d
DP_P2_PSTOP	drivers/net/ne2000_base.h	/^#define DP_P2_PSTOP	/;"	d
DP_P2_RCR	drivers/net/ne2000_base.h	/^#define DP_P2_RCR	/;"	d
DP_P2_RNPP	drivers/net/ne2000_base.h	/^#define DP_P2_RNPP	/;"	d
DP_P2_TCR	drivers/net/ne2000_base.h	/^#define DP_P2_TCR	/;"	d
DP_P2_TPSR	drivers/net/ne2000_base.h	/^#define DP_P2_TPSR	/;"	d
DP_PADCTL	drivers/video/tegra124/sor.h	/^#define DP_PADCTL(/;"	d
DP_PADCTL_COMODE_TXD_0_DP_TXD_2_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_0_DP_TXD_2_DISABLE	/;"	d
DP_PADCTL_COMODE_TXD_0_DP_TXD_2_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_0_DP_TXD_2_ENABLE	/;"	d
DP_PADCTL_COMODE_TXD_0_DP_TXD_2_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_0_DP_TXD_2_SHIFT	/;"	d
DP_PADCTL_COMODE_TXD_1_DP_TXD_1_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_1_DP_TXD_1_DISABLE	/;"	d
DP_PADCTL_COMODE_TXD_1_DP_TXD_1_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_1_DP_TXD_1_ENABLE	/;"	d
DP_PADCTL_COMODE_TXD_1_DP_TXD_1_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_1_DP_TXD_1_SHIFT	/;"	d
DP_PADCTL_COMODE_TXD_2_DP_TXD_0_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_2_DP_TXD_0_DISABLE	/;"	d
DP_PADCTL_COMODE_TXD_2_DP_TXD_0_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_2_DP_TXD_0_ENABLE	/;"	d
DP_PADCTL_COMODE_TXD_2_DP_TXD_0_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_2_DP_TXD_0_SHIFT	/;"	d
DP_PADCTL_COMODE_TXD_3_DP_TXD_3_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_3_DP_TXD_3_DISABLE	/;"	d
DP_PADCTL_COMODE_TXD_3_DP_TXD_3_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_3_DP_TXD_3_ENABLE	/;"	d
DP_PADCTL_COMODE_TXD_3_DP_TXD_3_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_COMODE_TXD_3_DP_TXD_3_SHIFT	/;"	d
DP_PADCTL_PAD_CAL_PD_POWERDOWN	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PAD_CAL_PD_POWERDOWN	/;"	d
DP_PADCTL_PAD_CAL_PD_POWERUP	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PAD_CAL_PD_POWERUP	/;"	d
DP_PADCTL_PAD_CAL_PD_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PAD_CAL_PD_SHIFT	/;"	d
DP_PADCTL_PD_TXD_0_NO	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_0_NO	/;"	d
DP_PADCTL_PD_TXD_0_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_0_SHIFT	/;"	d
DP_PADCTL_PD_TXD_0_YES	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_0_YES	/;"	d
DP_PADCTL_PD_TXD_1_NO	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_1_NO	/;"	d
DP_PADCTL_PD_TXD_1_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_1_SHIFT	/;"	d
DP_PADCTL_PD_TXD_1_YES	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_1_YES	/;"	d
DP_PADCTL_PD_TXD_2_NO	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_2_NO	/;"	d
DP_PADCTL_PD_TXD_2_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_2_SHIFT	/;"	d
DP_PADCTL_PD_TXD_2_YES	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_2_YES	/;"	d
DP_PADCTL_PD_TXD_3_NO	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_3_NO	/;"	d
DP_PADCTL_PD_TXD_3_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_3_SHIFT	/;"	d
DP_PADCTL_PD_TXD_3_YES	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_PD_TXD_3_YES	/;"	d
DP_PADCTL_REG_CTRL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_REG_CTRL_DEFAULT_MASK	/;"	d
DP_PADCTL_REG_CTRL_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_REG_CTRL_SHIFT	/;"	d
DP_PADCTL_SPARE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_SPARE_DEFAULT_MASK	/;"	d
DP_PADCTL_SPARE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_SPARE_SHIFT	/;"	d
DP_PADCTL_TX_PU_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_TX_PU_DISABLE	/;"	d
DP_PADCTL_TX_PU_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_TX_PU_ENABLE	/;"	d
DP_PADCTL_TX_PU_MASK	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_TX_PU_MASK	/;"	d
DP_PADCTL_TX_PU_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_TX_PU_SHIFT	/;"	d
DP_PADCTL_TX_PU_VALUE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_TX_PU_VALUE_DEFAULT_MASK	/;"	d
DP_PADCTL_TX_PU_VALUE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_TX_PU_VALUE_SHIFT	/;"	d
DP_PADCTL_VCMMODE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCMMODE_DEFAULT_MASK	/;"	d
DP_PADCTL_VCMMODE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCMMODE_SHIFT	/;"	d
DP_PADCTL_VCMMODE_STRONG_PULLDOWN	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCMMODE_STRONG_PULLDOWN	/;"	d
DP_PADCTL_VCMMODE_TEST_MUX	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCMMODE_TEST_MUX	/;"	d
DP_PADCTL_VCMMODE_TRISTATE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCMMODE_TRISTATE	/;"	d
DP_PADCTL_VCMMODE_WEAK_PULLDOWN	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCMMODE_WEAK_PULLDOWN	/;"	d
DP_PADCTL_VCO_2X_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCO_2X_DISABLE	/;"	d
DP_PADCTL_VCO_2X_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCO_2X_ENABLE	/;"	d
DP_PADCTL_VCO_2X_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_PADCTL_VCO_2X_SHIFT	/;"	d
DP_PAYLOAD_ACT_HANDLED	include/linux/drm_dp_helper.h	/^# define DP_PAYLOAD_ACT_HANDLED /;"	d
DP_PAYLOAD_ALLOCATE_SET	include/linux/drm_dp_helper.h	/^#define DP_PAYLOAD_ALLOCATE_SET	/;"	d
DP_PAYLOAD_ALLOCATE_START_TIME_SLOT	include/linux/drm_dp_helper.h	/^#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT /;"	d
DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT	include/linux/drm_dp_helper.h	/^#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT /;"	d
DP_PAYLOAD_TABLE_UPDATED	include/linux/drm_dp_helper.h	/^# define DP_PAYLOAD_TABLE_UPDATED /;"	d
DP_PAYLOAD_TABLE_UPDATE_STATUS	include/linux/drm_dp_helper.h	/^#define DP_PAYLOAD_TABLE_UPDATE_STATUS /;"	d
DP_PEER_DEVICE_DP_LEGACY_CONV	include/linux/drm_dp_helper.h	/^#define DP_PEER_DEVICE_DP_LEGACY_CONV	/;"	d
DP_PEER_DEVICE_MST_BRANCHING	include/linux/drm_dp_helper.h	/^#define DP_PEER_DEVICE_MST_BRANCHING	/;"	d
DP_PEER_DEVICE_NONE	include/linux/drm_dp_helper.h	/^#define DP_PEER_DEVICE_NONE	/;"	d
DP_PEER_DEVICE_SOURCE_OR_SST	include/linux/drm_dp_helper.h	/^#define DP_PEER_DEVICE_SOURCE_OR_SST	/;"	d
DP_PEER_DEVICE_SST_SINK	include/linux/drm_dp_helper.h	/^#define DP_PEER_DEVICE_SST_SINK	/;"	d
DP_PLL_LOOP_BIT_DEFAULT	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_PLL_LOOP_BIT_DEFAULT	/;"	d
DP_PLL_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_PLL_PD	/;"	d
DP_PLL_REF_BIT_1_1250V	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_PLL_REF_BIT_1_1250V	/;"	d
DP_PLL_REF_BIT_1_2500V	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_PLL_REF_BIT_1_2500V	/;"	d
DP_PLL_RESET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DP_PLL_RESET	/;"	d
DP_PORT_COUNT_MASK	include/linux/drm_dp_helper.h	/^# define DP_PORT_COUNT_MASK	/;"	d
DP_POWER_DOWN_PHY	include/linux/drm_dp_helper.h	/^#define DP_POWER_DOWN_PHY	/;"	d
DP_POWER_ON_MAX_TRIES	drivers/video/tegra124/displayport.h	/^#define DP_POWER_ON_MAX_TRIES	/;"	d
DP_POWER_UP_PHY	include/linux/drm_dp_helper.h	/^#define DP_POWER_UP_PHY	/;"	d
DP_PRE_EMPHASIS_MAX	drivers/video/rockchip/rk_edp.c	/^#define DP_PRE_EMPHASIS_MAX /;"	d	file:
DP_PSR_CAPS	include/linux/drm_dp_helper.h	/^#define DP_PSR_CAPS /;"	d
DP_PSR_CAPS_CHANGE	include/linux/drm_dp_helper.h	/^# define DP_PSR_CAPS_CHANGE /;"	d
DP_PSR_CRC_VERIFICATION	include/linux/drm_dp_helper.h	/^# define DP_PSR_CRC_VERIFICATION	/;"	d
DP_PSR_ENABLE	include/linux/drm_dp_helper.h	/^# define DP_PSR_ENABLE	/;"	d
DP_PSR_EN_CFG	include/linux/drm_dp_helper.h	/^#define DP_PSR_EN_CFG	/;"	d
DP_PSR_ERROR_STATUS	include/linux/drm_dp_helper.h	/^#define DP_PSR_ERROR_STATUS /;"	d
DP_PSR_ESI	include/linux/drm_dp_helper.h	/^#define DP_PSR_ESI /;"	d
DP_PSR_FRAME_CAPTURE	include/linux/drm_dp_helper.h	/^# define DP_PSR_FRAME_CAPTURE	/;"	d
DP_PSR_IS_SUPPORTED	include/linux/drm_dp_helper.h	/^# define DP_PSR_IS_SUPPORTED /;"	d
DP_PSR_LINK_CRC_ERROR	include/linux/drm_dp_helper.h	/^# define DP_PSR_LINK_CRC_ERROR /;"	d
DP_PSR_MAIN_LINK_ACTIVE	include/linux/drm_dp_helper.h	/^# define DP_PSR_MAIN_LINK_ACTIVE	/;"	d
DP_PSR_NO_TRAIN_ON_EXIT	include/linux/drm_dp_helper.h	/^# define DP_PSR_NO_TRAIN_ON_EXIT /;"	d
DP_PSR_RFB_STORAGE_ERROR	include/linux/drm_dp_helper.h	/^# define DP_PSR_RFB_STORAGE_ERROR /;"	d
DP_PSR_SETUP_TIME_0	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_0 /;"	d
DP_PSR_SETUP_TIME_110	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_110 /;"	d
DP_PSR_SETUP_TIME_165	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_165 /;"	d
DP_PSR_SETUP_TIME_220	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_220 /;"	d
DP_PSR_SETUP_TIME_275	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_275 /;"	d
DP_PSR_SETUP_TIME_330	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_330 /;"	d
DP_PSR_SETUP_TIME_55	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_55 /;"	d
DP_PSR_SETUP_TIME_MASK	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_MASK /;"	d
DP_PSR_SETUP_TIME_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_PSR_SETUP_TIME_SHIFT /;"	d
DP_PSR_SINK_ACTIVE_RESYNC	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_ACTIVE_RESYNC /;"	d
DP_PSR_SINK_ACTIVE_RFB	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_ACTIVE_RFB /;"	d
DP_PSR_SINK_ACTIVE_SINK_SYNCED	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_ACTIVE_SINK_SYNCED /;"	d
DP_PSR_SINK_ACTIVE_SRC_SYNCED	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_ACTIVE_SRC_SYNCED /;"	d
DP_PSR_SINK_INACTIVE	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_INACTIVE /;"	d
DP_PSR_SINK_INTERNAL_ERROR	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_INTERNAL_ERROR /;"	d
DP_PSR_SINK_STATE_MASK	include/linux/drm_dp_helper.h	/^# define DP_PSR_SINK_STATE_MASK /;"	d
DP_PSR_STATUS	include/linux/drm_dp_helper.h	/^#define DP_PSR_STATUS /;"	d
DP_PSR_SUPPORT	include/linux/drm_dp_helper.h	/^#define DP_PSR_SUPPORT /;"	d
DP_PSTART	drivers/net/ne2000_base.h	/^#define DP_PSTART	/;"	d
DP_PSTOP	drivers/net/ne2000_base.h	/^#define DP_PSTOP	/;"	d
DP_QUERY_PAYLOAD	include/linux/drm_dp_helper.h	/^#define DP_QUERY_PAYLOAD	/;"	d
DP_QUERY_STREAM_ENC_STATUS	include/linux/drm_dp_helper.h	/^#define DP_QUERY_STREAM_ENC_STATUS	/;"	d
DP_RBCH	drivers/net/ne2000_base.h	/^#define DP_RBCH	/;"	d
DP_RBCL	drivers/net/ne2000_base.h	/^#define DP_RBCL	/;"	d
DP_RCR	drivers/net/ne2000_base.h	/^#define DP_RCR	/;"	d
DP_RCR_AB	drivers/net/ne2000_base.h	/^#define DP_RCR_AB	/;"	d
DP_RCR_AM	drivers/net/ne2000_base.h	/^#define DP_RCR_AM	/;"	d
DP_RCR_AR	drivers/net/ne2000_base.h	/^#define DP_RCR_AR	/;"	d
DP_RCR_MON	drivers/net/ne2000_base.h	/^#define DP_RCR_MON	/;"	d
DP_RCR_PROM	drivers/net/ne2000_base.h	/^#define DP_RCR_PROM	/;"	d
DP_RCR_SEP	drivers/net/ne2000_base.h	/^#define DP_RCR_SEP	/;"	d
DP_RECEIVE_PORT_0_STATUS	include/linux/drm_dp_helper.h	/^#define DP_RECEIVE_PORT_0_STATUS	/;"	d
DP_RECEIVE_PORT_1_STATUS	include/linux/drm_dp_helper.h	/^#define DP_RECEIVE_PORT_1_STATUS	/;"	d
DP_RECOVERED_CLOCK_OUT_EN	include/linux/drm_dp_helper.h	/^# define DP_RECOVERED_CLOCK_OUT_EN	/;"	d
DP_REG	drivers/video/ipu_regs.h	/^#define DP_REG	/;"	d
DP_REMOTE_CONTROL_COMMAND_PENDING	include/linux/drm_dp_helper.h	/^# define DP_REMOTE_CONTROL_COMMAND_PENDING /;"	d
DP_REMOTE_DPCD_READ	include/linux/drm_dp_helper.h	/^#define DP_REMOTE_DPCD_READ	/;"	d
DP_REMOTE_DPCD_WRITE	include/linux/drm_dp_helper.h	/^#define DP_REMOTE_DPCD_WRITE	/;"	d
DP_REMOTE_I2C_READ	include/linux/drm_dp_helper.h	/^#define DP_REMOTE_I2C_READ	/;"	d
DP_REMOTE_I2C_WRITE	include/linux/drm_dp_helper.h	/^#define DP_REMOTE_I2C_WRITE	/;"	d
DP_RESISTOR_TUNE_BG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_RESISTOR_TUNE_BG	/;"	d
DP_RESOURCE_STATUS_NOTIFY	include/linux/drm_dp_helper.h	/^#define DP_RESOURCE_STATUS_NOTIFY	/;"	d
DP_RSAH	drivers/net/ne2000_base.h	/^#define DP_RSAH	/;"	d
DP_RSAL	drivers/net/ne2000_base.h	/^#define DP_RSAL	/;"	d
DP_RSR	drivers/net/ne2000_base.h	/^#define DP_RSR	/;"	d
DP_RSR_CRC	drivers/net/ne2000_base.h	/^#define DP_RSR_CRC	/;"	d
DP_RSR_DFR	drivers/net/ne2000_base.h	/^#define DP_RSR_DFR	/;"	d
DP_RSR_DIS	drivers/net/ne2000_base.h	/^#define DP_RSR_DIS	/;"	d
DP_RSR_FO	drivers/net/ne2000_base.h	/^#define DP_RSR_FO	/;"	d
DP_RSR_FRAME	drivers/net/ne2000_base.h	/^#define DP_RSR_FRAME	/;"	d
DP_RSR_MISS	drivers/net/ne2000_base.h	/^#define DP_RSR_MISS	/;"	d
DP_RSR_PHY	drivers/net/ne2000_base.h	/^#define DP_RSR_PHY	/;"	d
DP_RSR_RxP	drivers/net/ne2000_base.h	/^#define DP_RSR_RxP	/;"	d
DP_SET_ANSI_8B10B	include/linux/drm_dp_helper.h	/^# define DP_SET_ANSI_8B10B	/;"	d
DP_SET_POWER	include/linux/drm_dp_helper.h	/^#define DP_SET_POWER /;"	d
DP_SET_POWER_D0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_SET_POWER_D0	/;"	d
DP_SET_POWER_D0	include/linux/drm_dp_helper.h	/^# define DP_SET_POWER_D0 /;"	d
DP_SET_POWER_D3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_SET_POWER_D3	/;"	d
DP_SET_POWER_D3	include/linux/drm_dp_helper.h	/^# define DP_SET_POWER_D3 /;"	d
DP_SET_POWER_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_SET_POWER_MASK	/;"	d
DP_SET_POWER_MASK	include/linux/drm_dp_helper.h	/^# define DP_SET_POWER_MASK /;"	d
DP_SIDEBAND_MSG_DOWN_REP_BASE	include/linux/drm_dp_helper.h	/^#define DP_SIDEBAND_MSG_DOWN_REP_BASE	/;"	d
DP_SIDEBAND_MSG_DOWN_REQ_BASE	include/linux/drm_dp_helper.h	/^#define DP_SIDEBAND_MSG_DOWN_REQ_BASE	/;"	d
DP_SIDEBAND_MSG_UP_REP_BASE	include/linux/drm_dp_helper.h	/^#define DP_SIDEBAND_MSG_UP_REP_BASE	/;"	d
DP_SIDEBAND_MSG_UP_REQ_BASE	include/linux/drm_dp_helper.h	/^#define DP_SIDEBAND_MSG_UP_REQ_BASE	/;"	d
DP_SINK_COUNT	include/linux/drm_dp_helper.h	/^#define DP_SINK_COUNT	/;"	d
DP_SINK_COUNT_CP_READY	include/linux/drm_dp_helper.h	/^# define DP_SINK_COUNT_CP_READY /;"	d
DP_SINK_COUNT_ESI	include/linux/drm_dp_helper.h	/^#define DP_SINK_COUNT_ESI	/;"	d
DP_SINK_CP_READY	include/linux/drm_dp_helper.h	/^# define DP_SINK_CP_READY	/;"	d
DP_SINK_EVENT_NOTIFY	include/linux/drm_dp_helper.h	/^#define DP_SINK_EVENT_NOTIFY	/;"	d
DP_SINK_OUI	include/linux/drm_dp_helper.h	/^#define DP_SINK_OUI	/;"	d
DP_SINK_SPECIFIC_IRQ	include/linux/drm_dp_helper.h	/^# define DP_SINK_SPECIFIC_IRQ	/;"	d
DP_SINK_STATUS	include/linux/drm_dp_helper.h	/^#define DP_SINK_STATUS	/;"	d
DP_SINK_STATUS_PORT0_IN_SYNC	include/linux/drm_dp_helper.h	/^#define DP_SINK_STATUS_PORT0_IN_SYNC	/;"	d
DP_SOURCE_OUI	include/linux/drm_dp_helper.h	/^#define DP_SOURCE_OUI	/;"	d
DP_SPARE	drivers/video/tegra124/sor.h	/^#define DP_SPARE(/;"	d
DP_SPARE_PANEL_EXTERNAL	drivers/video/tegra124/sor.h	/^#define DP_SPARE_PANEL_EXTERNAL	/;"	d
DP_SPARE_PANEL_INTERNAL	drivers/video/tegra124/sor.h	/^#define DP_SPARE_PANEL_INTERNAL	/;"	d
DP_SPARE_PANEL_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_SPARE_PANEL_SHIFT	/;"	d
DP_SPARE_REG_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_SPARE_REG_DEFAULT_MASK	/;"	d
DP_SPARE_REG_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_SPARE_REG_SHIFT	/;"	d
DP_SPARE_SEQ_ENABLE_NO	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SEQ_ENABLE_NO	/;"	d
DP_SPARE_SEQ_ENABLE_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SEQ_ENABLE_SHIFT	/;"	d
DP_SPARE_SEQ_ENABLE_YES	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SEQ_ENABLE_YES	/;"	d
DP_SPARE_SOR_CLK_SEL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SOR_CLK_SEL_DEFAULT_MASK	/;"	d
DP_SPARE_SOR_CLK_SEL_MACRO_SORCLK	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SOR_CLK_SEL_MACRO_SORCLK	/;"	d
DP_SPARE_SOR_CLK_SEL_SAFE_SORCLK	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SOR_CLK_SEL_SAFE_SORCLK	/;"	d
DP_SPARE_SOR_CLK_SEL_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_SPARE_SOR_CLK_SEL_SHIFT	/;"	d
DP_SPREAD_AMP_0_5	include/linux/drm_dp_helper.h	/^# define DP_SPREAD_AMP_0_5	/;"	d
DP_SRC_BKGD_CLR	include/radeon.h	/^#define DP_SRC_BKGD_CLR	/;"	d
DP_SRC_ENDIAN	include/radeon.h	/^#define DP_SRC_ENDIAN	/;"	d
DP_SRC_FRGD_CLR	include/radeon.h	/^#define DP_SRC_FRGD_CLR	/;"	d
DP_SRC_HOST	include/radeon.h	/^#define DP_SRC_HOST	/;"	d
DP_SRC_HOST_BYTEALIGN	include/radeon.h	/^#define DP_SRC_HOST_BYTEALIGN	/;"	d
DP_SRC_RECT	include/radeon.h	/^#define DP_SRC_RECT	/;"	d
DP_SRC_SOURCE_MASK	include/radeon.h	/^#define DP_SRC_SOURCE_MASK	/;"	d
DP_SRC_SOURCE_MEMORY	include/radeon.h	/^#define DP_SRC_SOURCE_MEMORY	/;"	d
DP_SYMBOL_ERROR_COUNT_BOTH	include/linux/drm_dp_helper.h	/^# define DP_SYMBOL_ERROR_COUNT_BOTH	/;"	d
DP_SYMBOL_ERROR_COUNT_DISPARITY	include/linux/drm_dp_helper.h	/^# define DP_SYMBOL_ERROR_COUNT_DISPARITY /;"	d
DP_SYMBOL_ERROR_COUNT_MASK	include/linux/drm_dp_helper.h	/^# define DP_SYMBOL_ERROR_COUNT_MASK	/;"	d
DP_SYMBOL_ERROR_COUNT_SYMBOL	include/linux/drm_dp_helper.h	/^# define DP_SYMBOL_ERROR_COUNT_SYMBOL	/;"	d
DP_SYNC	drivers/video/ipu_regs.h	/^#define DP_SYNC /;"	d
DP_TBCH	drivers/net/ne2000_base.h	/^#define DP_TBCH	/;"	d
DP_TBCL	drivers/net/ne2000_base.h	/^#define DP_TBCL	/;"	d
DP_TCR	drivers/net/ne2000_base.h	/^#define DP_TCR	/;"	d
DP_TCR_ATD	drivers/net/ne2000_base.h	/^#define DP_TCR_ATD	/;"	d
DP_TCR_INLOOP	drivers/net/ne2000_base.h	/^#define DP_TCR_INLOOP	/;"	d
DP_TCR_LOCAL	drivers/net/ne2000_base.h	/^#define DP_TCR_LOCAL	/;"	d
DP_TCR_NOCRC	drivers/net/ne2000_base.h	/^#define DP_TCR_NOCRC	/;"	d
DP_TCR_NORMAL	drivers/net/ne2000_base.h	/^#define DP_TCR_NORMAL	/;"	d
DP_TCR_OFFSET	drivers/net/ne2000_base.h	/^#define DP_TCR_OFFSET	/;"	d
DP_TCR_OUTLOOP	drivers/net/ne2000_base.h	/^#define DP_TCR_OUTLOOP	/;"	d
DP_TEST_ACK	include/linux/drm_dp_helper.h	/^# define DP_TEST_ACK	/;"	d
DP_TEST_CRC_B_CB	include/linux/drm_dp_helper.h	/^#define DP_TEST_CRC_B_CB	/;"	d
DP_TEST_CRC_G_Y	include/linux/drm_dp_helper.h	/^#define DP_TEST_CRC_G_Y	/;"	d
DP_TEST_CRC_R_CR	include/linux/drm_dp_helper.h	/^#define DP_TEST_CRC_R_CR	/;"	d
DP_TEST_CRC_SUPPORTED	include/linux/drm_dp_helper.h	/^#define DP_TEST_CRC_SUPPORTED	/;"	d
DP_TEST_EDID_CHECKSUM	include/linux/drm_dp_helper.h	/^#define DP_TEST_EDID_CHECKSUM	/;"	d
DP_TEST_EDID_CHECKSUM_WRITE	include/linux/drm_dp_helper.h	/^# define DP_TEST_EDID_CHECKSUM_WRITE	/;"	d
DP_TEST_LANE_COUNT	include/linux/drm_dp_helper.h	/^#define DP_TEST_LANE_COUNT	/;"	d
DP_TEST_LINK_EDID_READ	include/linux/drm_dp_helper.h	/^# define DP_TEST_LINK_EDID_READ	/;"	d
DP_TEST_LINK_FAUX_PATTERN	include/linux/drm_dp_helper.h	/^# define DP_TEST_LINK_FAUX_PATTERN	/;"	d
DP_TEST_LINK_PHY_TEST_PATTERN	include/linux/drm_dp_helper.h	/^# define DP_TEST_LINK_PHY_TEST_PATTERN	/;"	d
DP_TEST_LINK_RATE	include/linux/drm_dp_helper.h	/^#define DP_TEST_LINK_RATE	/;"	d
DP_TEST_LINK_TRAINING	include/linux/drm_dp_helper.h	/^# define DP_TEST_LINK_TRAINING	/;"	d
DP_TEST_LINK_VIDEO_PATTERN	include/linux/drm_dp_helper.h	/^# define DP_TEST_LINK_VIDEO_PATTERN	/;"	d
DP_TEST_NAK	include/linux/drm_dp_helper.h	/^# define DP_TEST_NAK	/;"	d
DP_TEST_PATTERN	include/linux/drm_dp_helper.h	/^#define DP_TEST_PATTERN	/;"	d
DP_TEST_REQUEST	include/linux/drm_dp_helper.h	/^#define DP_TEST_REQUEST	/;"	d
DP_TEST_RESPONSE	include/linux/drm_dp_helper.h	/^#define DP_TEST_RESPONSE	/;"	d
DP_TEST_SINK	include/linux/drm_dp_helper.h	/^#define DP_TEST_SINK	/;"	d
DP_TEST_SINK_MISC	include/linux/drm_dp_helper.h	/^#define DP_TEST_SINK_MISC	/;"	d
DP_TEST_SINK_START	include/linux/drm_dp_helper.h	/^#define DP_TEST_SINK_START	/;"	d
DP_TIMEOUT_LOOP_COUNT	arch/arm/mach-exynos/include/mach/dp_info.h	/^#define DP_TIMEOUT_LOOP_COUNT	/;"	d
DP_TPG	drivers/video/tegra124/sor.h	/^#define DP_TPG	/;"	d
DP_TPG_LANE0_CHANNELCODING_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_CHANNELCODING_DISABLE	/;"	d
DP_TPG_LANE0_CHANNELCODING_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_CHANNELCODING_ENABLE	/;"	d
DP_TPG_LANE0_CHANNELCODING_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_CHANNELCODING_SHIFT	/;"	d
DP_TPG_LANE0_PATTERN_CSTM	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_CSTM	/;"	d
DP_TPG_LANE0_PATTERN_D102	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_D102	/;"	d
DP_TPG_LANE0_PATTERN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_DEFAULT_MASK	/;"	d
DP_TPG_LANE0_PATTERN_HBR2_COMPLIANCE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_HBR2_COMPLIANCE	/;"	d
DP_TPG_LANE0_PATTERN_NOPATTERN	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_NOPATTERN	/;"	d
DP_TPG_LANE0_PATTERN_PRBS7	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_PRBS7	/;"	d
DP_TPG_LANE0_PATTERN_SBLERRRATE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_SBLERRRATE	/;"	d
DP_TPG_LANE0_PATTERN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_SHIFT	/;"	d
DP_TPG_LANE0_PATTERN_TRAINING1	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_TRAINING1	/;"	d
DP_TPG_LANE0_PATTERN_TRAINING2	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_TRAINING2	/;"	d
DP_TPG_LANE0_PATTERN_TRAINING3	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_PATTERN_TRAINING3	/;"	d
DP_TPG_LANE0_SCRAMBLEREN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_SCRAMBLEREN_DEFAULT_MASK	/;"	d
DP_TPG_LANE0_SCRAMBLEREN_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_SCRAMBLEREN_DISABLE	/;"	d
DP_TPG_LANE0_SCRAMBLEREN_ENABLE_FIBONACCI	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_SCRAMBLEREN_ENABLE_FIBONACCI	/;"	d
DP_TPG_LANE0_SCRAMBLEREN_ENABLE_GALIOS	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_SCRAMBLEREN_ENABLE_GALIOS	/;"	d
DP_TPG_LANE0_SCRAMBLEREN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE0_SCRAMBLEREN_SHIFT	/;"	d
DP_TPG_LANE1_CHANNELCODING_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_CHANNELCODING_DISABLE	/;"	d
DP_TPG_LANE1_CHANNELCODING_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_CHANNELCODING_ENABLE	/;"	d
DP_TPG_LANE1_CHANNELCODING_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_CHANNELCODING_SHIFT	/;"	d
DP_TPG_LANE1_PATTERN_CSTM	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_CSTM	/;"	d
DP_TPG_LANE1_PATTERN_D102	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_D102	/;"	d
DP_TPG_LANE1_PATTERN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_DEFAULT_MASK	/;"	d
DP_TPG_LANE1_PATTERN_HBR2_COMPLIANCE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_HBR2_COMPLIANCE	/;"	d
DP_TPG_LANE1_PATTERN_NOPATTERN	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_NOPATTERN	/;"	d
DP_TPG_LANE1_PATTERN_PRBS7	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_PRBS7	/;"	d
DP_TPG_LANE1_PATTERN_SBLERRRATE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_SBLERRRATE	/;"	d
DP_TPG_LANE1_PATTERN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_SHIFT	/;"	d
DP_TPG_LANE1_PATTERN_TRAINING1	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_TRAINING1	/;"	d
DP_TPG_LANE1_PATTERN_TRAINING2	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_TRAINING2	/;"	d
DP_TPG_LANE1_PATTERN_TRAINING3	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_PATTERN_TRAINING3	/;"	d
DP_TPG_LANE1_SCRAMBLEREN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_SCRAMBLEREN_DEFAULT_MASK	/;"	d
DP_TPG_LANE1_SCRAMBLEREN_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_SCRAMBLEREN_DISABLE	/;"	d
DP_TPG_LANE1_SCRAMBLEREN_ENABLE_FIBONACCI	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_SCRAMBLEREN_ENABLE_FIBONACCI	/;"	d
DP_TPG_LANE1_SCRAMBLEREN_ENABLE_GALIOS	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_SCRAMBLEREN_ENABLE_GALIOS	/;"	d
DP_TPG_LANE1_SCRAMBLEREN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE1_SCRAMBLEREN_SHIFT	/;"	d
DP_TPG_LANE2_CHANNELCODING_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_CHANNELCODING_DISABLE	/;"	d
DP_TPG_LANE2_CHANNELCODING_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_CHANNELCODING_ENABLE	/;"	d
DP_TPG_LANE2_CHANNELCODING_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_CHANNELCODING_SHIFT	/;"	d
DP_TPG_LANE2_PATTERN_CSTM	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_CSTM	/;"	d
DP_TPG_LANE2_PATTERN_D102	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_D102	/;"	d
DP_TPG_LANE2_PATTERN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_DEFAULT_MASK	/;"	d
DP_TPG_LANE2_PATTERN_HBR2_COMPLIANCE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_HBR2_COMPLIANCE	/;"	d
DP_TPG_LANE2_PATTERN_NOPATTERN	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_NOPATTERN	/;"	d
DP_TPG_LANE2_PATTERN_PRBS7	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_PRBS7	/;"	d
DP_TPG_LANE2_PATTERN_SBLERRRATE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_SBLERRRATE	/;"	d
DP_TPG_LANE2_PATTERN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_SHIFT	/;"	d
DP_TPG_LANE2_PATTERN_TRAINING1	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_TRAINING1	/;"	d
DP_TPG_LANE2_PATTERN_TRAINING2	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_TRAINING2	/;"	d
DP_TPG_LANE2_PATTERN_TRAINING3	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_PATTERN_TRAINING3	/;"	d
DP_TPG_LANE2_SCRAMBLEREN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_SCRAMBLEREN_DEFAULT_MASK	/;"	d
DP_TPG_LANE2_SCRAMBLEREN_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_SCRAMBLEREN_DISABLE	/;"	d
DP_TPG_LANE2_SCRAMBLEREN_ENABLE_FIBONACCI	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_SCRAMBLEREN_ENABLE_FIBONACCI	/;"	d
DP_TPG_LANE2_SCRAMBLEREN_ENABLE_GALIOS	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_SCRAMBLEREN_ENABLE_GALIOS	/;"	d
DP_TPG_LANE2_SCRAMBLEREN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE2_SCRAMBLEREN_SHIFT	/;"	d
DP_TPG_LANE3_CHANNELCODING_DISABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_CHANNELCODING_DISABLE	/;"	d
DP_TPG_LANE3_CHANNELCODING_ENABLE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_CHANNELCODING_ENABLE	/;"	d
DP_TPG_LANE3_CHANNELCODING_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_CHANNELCODING_SHIFT	/;"	d
DP_TPG_LANE3_PATTERN_CSTM	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_CSTM	/;"	d
DP_TPG_LANE3_PATTERN_D102	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_D102	/;"	d
DP_TPG_LANE3_PATTERN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_DEFAULT_MASK	/;"	d
DP_TPG_LANE3_PATTERN_HBR2_COMPLIANCE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_HBR2_COMPLIANCE	/;"	d
DP_TPG_LANE3_PATTERN_NOPATTERN	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_NOPATTERN	/;"	d
DP_TPG_LANE3_PATTERN_PRBS7	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_PRBS7	/;"	d
DP_TPG_LANE3_PATTERN_SBLERRRATE	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_SBLERRRATE	/;"	d
DP_TPG_LANE3_PATTERN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_SHIFT	/;"	d
DP_TPG_LANE3_PATTERN_TRAINING1	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_TRAINING1	/;"	d
DP_TPG_LANE3_PATTERN_TRAINING2	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_TRAINING2	/;"	d
DP_TPG_LANE3_PATTERN_TRAINING3	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_PATTERN_TRAINING3	/;"	d
DP_TPG_LANE3_SCRAMBLEREN_ENABLE_FIBONACCI	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_SCRAMBLEREN_ENABLE_FIBONACCI	/;"	d
DP_TPG_LANE3_SCRAMBLEREN_ENABLE_GALIOS	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_SCRAMBLEREN_ENABLE_GALIOS	/;"	d
DP_TPG_LANE3_SCRAMBLEREN_SHIFT	drivers/video/tegra124/sor.h	/^#define DP_TPG_LANE3_SCRAMBLEREN_SHIFT	/;"	d
DP_TPS3_SUPPORTED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TPS3_SUPPORTED	/;"	d
DP_TPS3_SUPPORTED	include/linux/drm_dp_helper.h	/^# define DP_TPS3_SUPPORTED	/;"	d
DP_TPSR	drivers/net/ne2000_base.h	/^#define DP_TPSR	/;"	d
DP_TRAINING_AUX_RD_INTERVAL	include/linux/drm_dp_helper.h	/^#define DP_TRAINING_AUX_RD_INTERVAL /;"	d
DP_TRAINING_LANE0_SET	include/linux/drm_dp_helper.h	/^#define DP_TRAINING_LANE0_SET	/;"	d
DP_TRAINING_LANE1_SET	include/linux/drm_dp_helper.h	/^#define DP_TRAINING_LANE1_SET	/;"	d
DP_TRAINING_LANE2_SET	include/linux/drm_dp_helper.h	/^#define DP_TRAINING_LANE2_SET	/;"	d
DP_TRAINING_LANE3_SET	include/linux/drm_dp_helper.h	/^#define DP_TRAINING_LANE3_SET	/;"	d
DP_TRAINING_PATTERN_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAINING_PATTERN_1	/;"	d
DP_TRAINING_PATTERN_1	include/linux/drm_dp_helper.h	/^# define DP_TRAINING_PATTERN_1	/;"	d
DP_TRAINING_PATTERN_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAINING_PATTERN_2	/;"	d
DP_TRAINING_PATTERN_2	include/linux/drm_dp_helper.h	/^# define DP_TRAINING_PATTERN_2	/;"	d
DP_TRAINING_PATTERN_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAINING_PATTERN_3	/;"	d
DP_TRAINING_PATTERN_3	include/linux/drm_dp_helper.h	/^# define DP_TRAINING_PATTERN_3	/;"	d
DP_TRAINING_PATTERN_DISABLE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAINING_PATTERN_DISABLE	/;"	d
DP_TRAINING_PATTERN_DISABLE	include/linux/drm_dp_helper.h	/^# define DP_TRAINING_PATTERN_DISABLE	/;"	d
DP_TRAINING_PATTERN_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAINING_PATTERN_MASK	/;"	d
DP_TRAINING_PATTERN_MASK	include/linux/drm_dp_helper.h	/^# define DP_TRAINING_PATTERN_MASK	/;"	d
DP_TRAINING_PATTERN_SET	include/linux/drm_dp_helper.h	/^#define DP_TRAINING_PATTERN_SET	/;"	d
DP_TRAINING_PATTERN_SET_SC_DISABLED_T	drivers/video/tegra124/displayport.h	/^#define DP_TRAINING_PATTERN_SET_SC_DISABLED_T	/;"	d
DP_TRAIN_MAX_PRE_EMPHASIS_REACHED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED	/;"	d
DP_TRAIN_MAX_PRE_EMPHASIS_REACHED	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED /;"	d
DP_TRAIN_MAX_SWING_REACHED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_MAX_SWING_REACHED	/;"	d
DP_TRAIN_MAX_SWING_REACHED	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_MAX_SWING_REACHED	/;"	d
DP_TRAIN_PRE_EMPHASIS_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_PRE_EMPHASIS_0	/;"	d
DP_TRAIN_PRE_EMPHASIS_3_5	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_PRE_EMPHASIS_3_5	/;"	d
DP_TRAIN_PRE_EMPHASIS_6	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_PRE_EMPHASIS_6	/;"	d
DP_TRAIN_PRE_EMPHASIS_9_5	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_PRE_EMPHASIS_9_5	/;"	d
DP_TRAIN_PRE_EMPHASIS_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_PRE_EMPHASIS_MASK	/;"	d
DP_TRAIN_PRE_EMPHASIS_MASK	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_PRE_EMPHASIS_MASK	/;"	d
DP_TRAIN_PRE_EMPHASIS_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_PRE_EMPHASIS_SHIFT	/;"	d
DP_TRAIN_PRE_EMPHASIS_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_PRE_EMPHASIS_SHIFT	/;"	d
DP_TRAIN_PRE_EMPH_LEVEL_0	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_PRE_EMPH_LEVEL_0	/;"	d
DP_TRAIN_PRE_EMPH_LEVEL_1	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_PRE_EMPH_LEVEL_1	/;"	d
DP_TRAIN_PRE_EMPH_LEVEL_2	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_PRE_EMPH_LEVEL_2	/;"	d
DP_TRAIN_PRE_EMPH_LEVEL_3	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_PRE_EMPH_LEVEL_3	/;"	d
DP_TRAIN_VOLTAGE_SWING_1200	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_VOLTAGE_SWING_1200	/;"	d
DP_TRAIN_VOLTAGE_SWING_400	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_VOLTAGE_SWING_400	/;"	d
DP_TRAIN_VOLTAGE_SWING_600	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_VOLTAGE_SWING_600	/;"	d
DP_TRAIN_VOLTAGE_SWING_800	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_VOLTAGE_SWING_800	/;"	d
DP_TRAIN_VOLTAGE_SWING_LEVEL_0	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 /;"	d
DP_TRAIN_VOLTAGE_SWING_LEVEL_1	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 /;"	d
DP_TRAIN_VOLTAGE_SWING_LEVEL_2	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 /;"	d
DP_TRAIN_VOLTAGE_SWING_LEVEL_3	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 /;"	d
DP_TRAIN_VOLTAGE_SWING_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_VOLTAGE_SWING_MASK	/;"	d
DP_TRAIN_VOLTAGE_SWING_MASK	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_VOLTAGE_SWING_MASK	/;"	d
DP_TRAIN_VOLTAGE_SWING_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DP_TRAIN_VOLTAGE_SWING_SHIFT	/;"	d
DP_TRAIN_VOLTAGE_SWING_SHIFT	include/linux/drm_dp_helper.h	/^# define DP_TRAIN_VOLTAGE_SWING_SHIFT	/;"	d
DP_TSR	drivers/net/ne2000_base.h	/^#define DP_TSR	/;"	d
DP_TSR_ABT	drivers/net/ne2000_base.h	/^#define DP_TSR_ABT	/;"	d
DP_TSR_CDH	drivers/net/ne2000_base.h	/^#define DP_TSR_CDH	/;"	d
DP_TSR_COL	drivers/net/ne2000_base.h	/^#define DP_TSR_COL	/;"	d
DP_TSR_CRS	drivers/net/ne2000_base.h	/^#define DP_TSR_CRS	/;"	d
DP_TSR_FU	drivers/net/ne2000_base.h	/^#define DP_TSR_FU	/;"	d
DP_TSR_OWC	drivers/net/ne2000_base.h	/^#define DP_TSR_OWC	/;"	d
DP_TSR_TxP	drivers/net/ne2000_base.h	/^#define DP_TSR_TxP	/;"	d
DP_UPSTREAM_IS_SRC	include/linux/drm_dp_helper.h	/^# define DP_UPSTREAM_IS_SRC	/;"	d
DP_UP_REQ_EN	include/linux/drm_dp_helper.h	/^# define DP_UP_REQ_EN	/;"	d
DP_UP_REQ_MSG_RDY	include/linux/drm_dp_helper.h	/^# define DP_UP_REQ_MSG_RDY	/;"	d
DP_VC_PAYLOAD_ID_SLOT_1	include/linux/drm_dp_helper.h	/^#define DP_VC_PAYLOAD_ID_SLOT_1 /;"	d
DP_VOLTAGE_MAX	drivers/video/rockchip/rk_edp.c	/^#define DP_VOLTAGE_MAX /;"	d	file:
DP_WRITE_MSK	include/radeon.h	/^#define DP_WRITE_MSK	/;"	d
DP_XOP	include/radeon.h	/^#define DP_XOP	/;"	d
DQANADLYPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQANADLYPDCTL	/;"	d
DQANADLYPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQANADLYPUCTL	/;"	d
DQANADRVPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQANADRVPDCTL	/;"	d
DQANADRVPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQANADRVPUCTL	/;"	d
DQANAODTPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQANAODTPDCTL	/;"	d
DQANAODTPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQANAODTPUCTL	/;"	d
DQANATCOPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQANATCOPDCTL	/;"	d
DQANATCOPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQANATCOPUCTL	/;"	d
DQCLKALIGNREG0	arch/x86/cpu/quark/smc.h	/^#define DQCLKALIGNREG0	/;"	d
DQCLKALIGNREG1	arch/x86/cpu/quark/smc.h	/^#define DQCLKALIGNREG1	/;"	d
DQCLKALIGNREG2	arch/x86/cpu/quark/smc.h	/^#define DQCLKALIGNREG2	/;"	d
DQCLKALIGNSTS0	arch/x86/cpu/quark/smc.h	/^#define DQCLKALIGNSTS0	/;"	d
DQCLKALIGNSTS1	arch/x86/cpu/quark/smc.h	/^#define DQCLKALIGNSTS1	/;"	d
DQCLKGATE	arch/x86/cpu/quark/smc.h	/^#define DQCLKGATE	/;"	d
DQCTL	arch/x86/cpu/quark/smc.h	/^#define DQCTL	/;"	d
DQDFTCTL	arch/x86/cpu/quark/smc.h	/^#define DQDFTCTL	/;"	d
DQDLLRXCTL	arch/x86/cpu/quark/smc.h	/^#define DQDLLRXCTL	/;"	d
DQDLLTXCTL	arch/x86/cpu/quark/smc.h	/^#define DQDLLTXCTL	/;"	d
DQDLYPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQDLYPDCTLCH0	/;"	d
DQDLYPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQDLYPUCTLCH0	/;"	d
DQDRVPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQDRVPDCTLCH0	/;"	d
DQDRVPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQDRVPUCTLCH0	/;"	d
DQMDLLCTL	arch/x86/cpu/quark/smc.h	/^#define DQMDLLCTL	/;"	d
DQOBSCKEBBCTL	arch/x86/cpu/quark/smc.h	/^#define DQOBSCKEBBCTL	/;"	d
DQODTPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQODTPDCTLCH0	/;"	d
DQODTPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQODTPUCTLCH0	/;"	d
DQRK2RKCTL	arch/x86/cpu/quark/smc.h	/^#define DQRK2RKCTL	/;"	d
DQRK2RKPTRCTL	arch/x86/cpu/quark/smc.h	/^#define DQRK2RKPTRCTL	/;"	d
DQRR_TOK_OFFSET	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define DQRR_TOK_OFFSET /;"	d
DQRTT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQRTT	/;"	d
DQS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define DQS /;"	d
DQSANADLYPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANADLYPDCTL	/;"	d
DQSANADLYPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANADLYPUCTL	/;"	d
DQSANADRVPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANADRVPDCTL	/;"	d
DQSANADRVPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANADRVPUCTL	/;"	d
DQSANAODTPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANAODTPDCTL	/;"	d
DQSANAODTPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANAODTPUCTL	/;"	d
DQSANATCOPDCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANATCOPDCTL	/;"	d
DQSANATCOPUCTL	arch/x86/cpu/quark/smc.h	/^#define DQSANATCOPUCTL	/;"	d
DQSDLYPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSDLYPDCTLCH0	/;"	d
DQSDLYPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSDLYPUCTLCH0	/;"	d
DQSDRVPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSDRVPDCTLCH0	/;"	d
DQSDRVPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSDRVPUCTLCH0	/;"	d
DQSGE_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSGE_MASK	/;"	d
DQSGE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSGE_SHIFT	/;"	d
DQSGX_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSGX_MASK	/;"	d
DQSGX_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSGX_SHIFT	/;"	d
DQSNRES_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSNRES_MASK	/;"	d
DQSNRES_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSNRES_SHIFT	/;"	d
DQSODTPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSODTPDCTLCH0	/;"	d
DQSODTPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSODTPUCTLCH0	/;"	d
DQSRES_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSRES_MASK	/;"	d
DQSRES_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSRES_SHIFT	/;"	d
DQSRTT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DQSRTT	/;"	d
DQSTCOPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSTCOPDCTLCH0	/;"	d
DQSTCOPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQSTCOPUCTLCH0	/;"	d
DQSVREFCH0	arch/x86/cpu/quark/smc.h	/^#define DQSVREFCH0	/;"	d
DQS_DELAY	arch/arm/mach-exynos/exynos4_setup.h	/^#define DQS_DELAY	/;"	d
DQS_DLL_112P5_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_112P5_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_135_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_135_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_157P5_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_157P5_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_22P5_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_22P5_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_45_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_45_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_67P5_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_67P5_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_90_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_90_DELAY,$/;"	e	enum:__anon957231910503	file:
DQS_DLL_NO_DELAY	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_DLL_NO_DELAY	= 0,$/;"	e	enum:__anon957231910503	file:
DQS_DQ_NUM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define DQS_DQ_NUM /;"	d
DQS_GATE_TRAINING_ERROR_RANK0	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^#define DQS_GATE_TRAINING_ERROR_RANK0	/;"	d	file:
DQS_GATE_TRAINING_ERROR_RANK1	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^#define DQS_GATE_TRAINING_ERROR_RANK1	/;"	d	file:
DQS_OUT_SHIFT	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define DQS_OUT_SHIFT	/;"	d	file:
DQS_RD_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	DQS_RD_MODE,$/;"	e	enum:training_modes
DQS_SQU_CAL_NORMAL_MODE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_SQU_CAL_NORMAL_MODE			= 0 << 1,$/;"	e	enum:__anon957231910103	file:
DQS_SQU_CAL_START	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_SQU_CAL_START			= 1 << 0,$/;"	e	enum:__anon957231910103	file:
DQS_SQU_NO_CAL	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	DQS_SQU_NO_CAL				= 0 << 0,$/;"	e	enum:__anon957231910103	file:
DQS_WR_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	DQS_WR_MODE,$/;"	e	enum:training_modes
DQS_autocalibration	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^u32 DQS_autocalibration(void)$/;"	f	typeref:typename:u32
DQS_calibration_methodA	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static u32 DQS_calibration_methodA(struct ddrautocal *cal)$/;"	f	typeref:typename:u32	file:
DQS_calibration_methodB	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static u32 DQS_calibration_methodB(struct ddrautocal *cal)$/;"	f	typeref:typename:u32	file:
DQS_calibration_process	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void DQS_calibration_process(void)$/;"	f	typeref:typename:void	file:
DQS_delay_status	arch/powerpc/include/asm/immap_512x.h	/^	u32 DQS_delay_status;	\/* DQS Delay Status *\/$/;"	m	struct:ddr512x	typeref:typename:u32
DQTCOPDCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQTCOPDCTLCH0	/;"	d
DQTCOPUCTLCH0	arch/x86/cpu/quark/smc.h	/^#define DQTCOPUCTLCH0	/;"	d
DQTIMINGCTRL	arch/x86/cpu/quark/smc.h	/^#define DQTIMINGCTRL	/;"	d
DQTRAINSTS	arch/x86/cpu/quark/smc.h	/^#define DQTRAINSTS	/;"	d
DQVISACONTROLCRBL	arch/x86/cpu/quark/smc.h	/^#define DQVISACONTROLCRBL	/;"	d
DQVISACONTROLCRTOP	arch/x86/cpu/quark/smc.h	/^#define DQVISACONTROLCRTOP	/;"	d
DQVISALANECR0BL	arch/x86/cpu/quark/smc.h	/^#define DQVISALANECR0BL	/;"	d
DQVISALANECR0TOP	arch/x86/cpu/quark/smc.h	/^#define DQVISALANECR0TOP	/;"	d
DQVISALANECR1BL	arch/x86/cpu/quark/smc.h	/^#define DQVISALANECR1BL	/;"	d
DQVISALANECR1TOP	arch/x86/cpu/quark/smc.h	/^#define DQVISALANECR1TOP	/;"	d
DQVREFCH0	arch/x86/cpu/quark/smc.h	/^#define DQVREFCH0	/;"	d
DQ_NUM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define DQ_NUM /;"	d
DQ_SWAP_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DQ_SWAP_DISABLE	/;"	d
DR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DR(/;"	d
DR	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define DR	/;"	d
DR	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define DR	/;"	d
DR	arch/sh/include/asm/cpu_sh7722.h	/^#define DR /;"	d
DR	arch/sh/include/asm/cpu_sh7780.h	/^#define	DR	/;"	d
DRA722_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA722_CONTROL_ID_CODE_ES1_0	/;"	d
DRA722_CONTROL_ID_CODE_ES2_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA722_CONTROL_ID_CODE_ES2_0	/;"	d
DRA722_ES1_0	arch/arm/include/asm/omap_common.h	/^#define DRA722_ES1_0	/;"	d
DRA722_ES2_0	arch/arm/include/asm/omap_common.h	/^#define DRA722_ES2_0	/;"	d
DRA72X	arch/arm/include/asm/omap_common.h	/^#define DRA72X	/;"	d
DRA752_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA752_CONTROL_ID_CODE_ES1_0	/;"	d
DRA752_CONTROL_ID_CODE_ES1_1	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA752_CONTROL_ID_CODE_ES1_1	/;"	d
DRA752_CONTROL_ID_CODE_ES2_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA752_CONTROL_ID_CODE_ES2_0	/;"	d
DRA752_EFUSE_BASE	arch/arm/include/asm/arch-omap5/clock.h	/^#define DRA752_EFUSE_BASE	/;"	d
DRA752_EFUSE_REGBITS	arch/arm/include/asm/arch-omap5/clock.h	/^#define DRA752_EFUSE_REGBITS	/;"	d
DRA752_ES1_0	arch/arm/include/asm/omap_common.h	/^#define DRA752_ES1_0	/;"	d
DRA752_ES1_1	arch/arm/include/asm/omap_common.h	/^#define DRA752_ES1_1	/;"	d
DRA752_ES2_0	arch/arm/include/asm/omap_common.h	/^#define DRA752_ES2_0	/;"	d
DRA7XX	arch/arm/include/asm/omap_common.h	/^#define DRA7XX	/;"	d
DRA7_ABB_FUSE_ENABLE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_ABB_FUSE_ENABLE_MASK	/;"	d
DRA7_ABB_FUSE_VSET_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_ABB_FUSE_VSET_MASK	/;"	d
DRA7_EEPROM_HDR_CONFIG_LEN	board/ti/common/board_detect.h	/^#define DRA7_EEPROM_HDR_CONFIG_LEN	/;"	d
DRA7_EEPROM_HDR_NAME_LEN	board/ti/common/board_detect.h	/^#define DRA7_EEPROM_HDR_NAME_LEN	/;"	d
DRA7_EEPROM_HEADER_MAGIC	board/ti/common/board_detect.h	/^#define DRA7_EEPROM_HEADER_MAGIC	/;"	d
DRA7_USB2_PHY1_POWER	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB2_PHY1_POWER	/;"	d
DRA7_USB2_PHY2_POWER	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB2_PHY2_POWER	/;"	d
DRA7_USB3_PHY1_PLL_CTRL	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB3_PHY1_PLL_CTRL	/;"	d
DRA7_USB3_PHY1_POWER	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB3_PHY1_POWER	/;"	d
DRA7_USB_OTG_SS1_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB_OTG_SS1_BASE	/;"	d
DRA7_USB_OTG_SS1_GLUE_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB_OTG_SS1_GLUE_BASE	/;"	d
DRA7_USB_OTG_SS2_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB_OTG_SS2_BASE	/;"	d
DRA7_USB_OTG_SS2_GLUE_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DRA7_USB_OTG_SS2_GLUE_BASE	/;"	d
DRACK0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,$/;"	e	enum:__anona3077f190103	file:
DRACK0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,$/;"	e	enum:__anona307879b0103	file:
DRAMBnk	include/SA-1100.h	/^#define DRAMBnk	/;"	d
DRAMBnk0	include/SA-1100.h	/^#define DRAMBnk0	/;"	d
DRAMBnk0Sp	include/SA-1100.h	/^#define DRAMBnk0Sp	/;"	d
DRAMBnk1	include/SA-1100.h	/^#define DRAMBnk1	/;"	d
DRAMBnk1Sp	include/SA-1100.h	/^#define DRAMBnk1Sp	/;"	d
DRAMBnk2	include/SA-1100.h	/^#define DRAMBnk2	/;"	d
DRAMBnk2Sp	include/SA-1100.h	/^#define DRAMBnk2Sp	/;"	d
DRAMBnk3	include/SA-1100.h	/^#define DRAMBnk3	/;"	d
DRAMBnk3Sp	include/SA-1100.h	/^#define DRAMBnk3Sp	/;"	d
DRAMBnkSp	include/SA-1100.h	/^#define DRAMBnkSp	/;"	d
DRAMBnkType	include/SA-1100.h	/^typedef Quad		DRAMBnkType [DRAMBnkSp\/sizeof (Quad)] ;$/;"	t	typeref:typename:Quad[DRAMBnkSp/sizeof (Quad)]
DRAMC_get_dram_size	arch/arm/mach-sunxi/dram_sun9i.c	/^signed int DRAMC_get_dram_size(void)$/;"	f	typeref:typename:signed int
DRAMTMG0_TFAW	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG0_TFAW(/;"	d
DRAMTMG0_TFAW	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG0_TFAW(/;"	d
DRAMTMG0_TRAS	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG0_TRAS(/;"	d
DRAMTMG0_TRAS	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG0_TRAS(/;"	d
DRAMTMG0_TRAS_MAX	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG0_TRAS_MAX(/;"	d
DRAMTMG0_TRAS_MAX	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG0_TRAS_MAX(/;"	d
DRAMTMG0_TWTP	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG0_TWTP(/;"	d
DRAMTMG0_TWTP	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG0_TWTP(/;"	d
DRAMTMG1_TRC	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG1_TRC(/;"	d
DRAMTMG1_TRC	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG1_TRC(/;"	d
DRAMTMG1_TRTP	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG1_TRTP(/;"	d
DRAMTMG1_TRTP	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG1_TRTP(/;"	d
DRAMTMG1_TXP	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG1_TXP(/;"	d
DRAMTMG1_TXP	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG1_TXP(/;"	d
DRAMTMG2_TCL	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG2_TCL(/;"	d
DRAMTMG2_TCL	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG2_TCL(/;"	d
DRAMTMG2_TCWL	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG2_TCWL(/;"	d
DRAMTMG2_TCWL	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG2_TCWL(/;"	d
DRAMTMG2_TRD2WR	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG2_TRD2WR(/;"	d
DRAMTMG2_TRD2WR	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG2_TRD2WR(/;"	d
DRAMTMG2_TWR2RD	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG2_TWR2RD(/;"	d
DRAMTMG2_TWR2RD	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG2_TWR2RD(/;"	d
DRAMTMG3_TMOD	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG3_TMOD(/;"	d
DRAMTMG3_TMOD	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG3_TMOD(/;"	d
DRAMTMG3_TMRD	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG3_TMRD(/;"	d
DRAMTMG3_TMRD	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG3_TMRD(/;"	d
DRAMTMG3_TMRW	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG3_TMRW(/;"	d
DRAMTMG3_TMRW	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG3_TMRW(/;"	d
DRAMTMG4_TCCD	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG4_TCCD(/;"	d
DRAMTMG4_TCCD	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG4_TCCD(/;"	d
DRAMTMG4_TRCD	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG4_TRCD(/;"	d
DRAMTMG4_TRCD	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG4_TRCD(/;"	d
DRAMTMG4_TRP	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG4_TRP(/;"	d
DRAMTMG4_TRP	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG4_TRP(/;"	d
DRAMTMG4_TRRD	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG4_TRRD(/;"	d
DRAMTMG4_TRRD	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG4_TRRD(/;"	d
DRAMTMG5_TCKE	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKE(/;"	d
DRAMTMG5_TCKE	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKE(/;"	d
DRAMTMG5_TCKESR	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKESR(/;"	d
DRAMTMG5_TCKESR	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKESR(/;"	d
DRAMTMG5_TCKSRE	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKSRE(/;"	d
DRAMTMG5_TCKSRE	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKSRE(/;"	d
DRAMTMG5_TCKSRX	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKSRX(/;"	d
DRAMTMG5_TCKSRX	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define DRAMTMG5_TCKSRX(/;"	d
DRAM_2T	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DRAM_2T	/;"	d
DRAM_ADDR_MODE0	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE0	include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE0	/;"	d
DRAM_ADDR_MODE1	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE1	include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE1	/;"	d
DRAM_ADDR_MODE2	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_MODE2	include/dt-bindings/mrc/quark.h	/^#define DRAM_ADDR_MODE2	/;"	d
DRAM_ADDR_SPACE_END	arch/arm/include/asm/arch-omap4/omap.h	/^#define DRAM_ADDR_SPACE_END	/;"	d
DRAM_ADDR_SPACE_START	arch/arm/include/asm/arch-omap4/omap.h	/^#define DRAM_ADDR_SPACE_START	/;"	d
DRAM_ALT_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	DRAM_ALT_CLK_ROOT = 65,$/;"	e	enum:clk_root_index
DRAM_ALT_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
DRAM_ALT_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_ALT_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
DRAM_BASE	arch/x86/include/asm/arch-quark/quark.h	/^#define DRAM_BASE	/;"	d
DRAM_BOARD_LD20_C1	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_BOARD_LD20_C1,	\/* LD20 TV C1 *\/$/;"	e	enum:dram_board	file:
DRAM_BOARD_LD20_GLOBAL	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_BOARD_LD20_GLOBAL,	\/* LD20 TV *\/$/;"	e	enum:dram_board	file:
DRAM_BOARD_LD20_REF	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_BOARD_LD20_REF,	\/* LD20 reference *\/$/;"	e	enum:dram_board	file:
DRAM_BOARD_LD21_GLOBAL	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_BOARD_LD21_GLOBAL,	\/* LD21 TV *\/$/;"	e	enum:dram_board	file:
DRAM_BOARD_LD21_REF	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_BOARD_LD21_REF,	\/* LD21 reference *\/$/;"	e	enum:dram_board	file:
DRAM_BOARD_NR	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_BOARD_NR,$/;"	e	enum:dram_board	file:
DRAM_CCR_COMMAND_RATE_1T	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CCR_COMMAND_RATE_1T /;"	d
DRAM_CCR_COMMAND_RATE_1T	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CCR_COMMAND_RATE_1T /;"	d
DRAM_CCR_DATA_TRAINING	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CCR_DATA_TRAINING /;"	d
DRAM_CCR_DATA_TRAINING	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CCR_DATA_TRAINING /;"	d
DRAM_CCR_DQS_DRIFT_COMP	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CCR_DQS_DRIFT_COMP /;"	d
DRAM_CCR_DQS_DRIFT_COMP	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CCR_DQS_DRIFT_COMP /;"	d
DRAM_CCR_DQS_GATE	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CCR_DQS_GATE /;"	d
DRAM_CCR_DQS_GATE	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CCR_DQS_GATE /;"	d
DRAM_CCR_INIT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CCR_INIT /;"	d
DRAM_CCR_INIT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CCR_INIT /;"	d
DRAM_CCR_ITM_OFF	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CCR_ITM_OFF /;"	d
DRAM_CCR_ITM_OFF	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CCR_ITM_OFF /;"	d
DRAM_CHANNEL	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL	include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL(/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X16	include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X16	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X32	include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X32	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CHANNEL_WIDTH_X8	include/dt-bindings/mrc/quark.h	/^#define DRAM_CHANNEL_WIDTH_X8	/;"	d
DRAM_CH_NR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define DRAM_CH_NR	/;"	d	file:
DRAM_CH_NR	arch/arm/mach-uniphier/dram/umc-ld20.c	/^#define DRAM_CH_NR	/;"	d	file:
DRAM_CH_NR	arch/arm/mach-uniphier/dram/umc-ld4.c	/^#define DRAM_CH_NR	/;"	d	file:
DRAM_CH_NR	arch/arm/mach-uniphier/dram/umc-pro4.c	/^#define DRAM_CH_NR	/;"	d	file:
DRAM_CH_NR	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^#define DRAM_CH_NR	/;"	d	file:
DRAM_CH_NR	arch/arm/mach-uniphier/dram/umc-sld8.c	/^#define DRAM_CH_NR	/;"	d	file:
DRAM_CLK	arch/arm/mach-sunxi/dram_sun6i.c	/^#define DRAM_CLK /;"	d	file:
DRAM_CLK	arch/arm/mach-sunxi/dram_sun9i.c	/^#define DRAM_CLK /;"	d	file:
DRAM_CLK	board/sunxi/Kconfig	/^config DRAM_CLK$/;"	c
DRAM_CLK_200	arch/arm/mach-exynos/exynos4_setup.h	/^#define DRAM_CLK_200$/;"	d
DRAM_CLK_330	arch/arm/mach-exynos/exynos4_setup.h	/^#define DRAM_CLK_330$/;"	d
DRAM_CLK_400	arch/arm/mach-exynos/exynos4_setup.h	/^#define DRAM_CLK_400$/;"	d
DRAM_CLK_DIV	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^#define DRAM_CLK_DIV /;"	d	file:
DRAM_CLK_DIV	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^#define DRAM_CLK_DIV /;"	d	file:
DRAM_CLK_MUL	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^#define DRAM_CLK_MUL /;"	d	file:
DRAM_CLK_MUL	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^#define DRAM_CLK_MUL /;"	d	file:
DRAM_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	DRAM_CLK_ROOT = 49,$/;"	e	enum:clk_root_index
DRAM_CLK_ROOT_FROM_PLL_DRAM_ALT_CLK_ROOT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_CLK_ROOT_FROM_PLL_DRAM_ALT_CLK_ROOT	/;"	d
DRAM_CLK_ROOT_FROM_PLL_DRAM_MAIN_1066M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_CLK_ROOT_FROM_PLL_DRAM_MAIN_1066M_CLK	/;"	d
DRAM_CLK_ROOT_POST_DIV_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_CLK_ROOT_POST_DIV_MASK	/;"	d
DRAM_CSEL_MAGIC	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CSEL_MAGIC /;"	d
DRAM_CSEL_MAGIC	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CSEL_MAGIC /;"	d
DRAM_CSR_DTERR	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CSR_DTERR /;"	d
DRAM_CSR_DTERR	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CSR_DTERR /;"	d
DRAM_CSR_DTIERR	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CSR_DTIERR /;"	d
DRAM_CSR_DTIERR	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CSR_DTIERR /;"	d
DRAM_CSR_FAILED	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_CSR_FAILED /;"	d
DRAM_CSR_FAILED	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_CSR_FAILED /;"	d
DRAM_DCR_BUS_WIDTH	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH(/;"	d
DRAM_DCR_BUS_WIDTH	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH(/;"	d
DRAM_DCR_BUS_WIDTH_16BIT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_16BIT /;"	d
DRAM_DCR_BUS_WIDTH_16BIT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_16BIT /;"	d
DRAM_DCR_BUS_WIDTH_32BIT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_32BIT /;"	d
DRAM_DCR_BUS_WIDTH_32BIT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_32BIT /;"	d
DRAM_DCR_BUS_WIDTH_8BIT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_8BIT /;"	d
DRAM_DCR_BUS_WIDTH_8BIT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_8BIT /;"	d
DRAM_DCR_BUS_WIDTH_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_MASK /;"	d
DRAM_DCR_BUS_WIDTH_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_BUS_WIDTH_MASK /;"	d
DRAM_DCR_CHIP_DENSITY	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY(/;"	d
DRAM_DCR_CHIP_DENSITY	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY(/;"	d
DRAM_DCR_CHIP_DENSITY_1024M	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_1024M /;"	d
DRAM_DCR_CHIP_DENSITY_1024M	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_1024M /;"	d
DRAM_DCR_CHIP_DENSITY_2048M	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_2048M /;"	d
DRAM_DCR_CHIP_DENSITY_2048M	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_2048M /;"	d
DRAM_DCR_CHIP_DENSITY_256M	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_256M /;"	d
DRAM_DCR_CHIP_DENSITY_256M	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_256M /;"	d
DRAM_DCR_CHIP_DENSITY_4096M	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_4096M /;"	d
DRAM_DCR_CHIP_DENSITY_4096M	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_4096M /;"	d
DRAM_DCR_CHIP_DENSITY_512M	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_512M /;"	d
DRAM_DCR_CHIP_DENSITY_512M	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_512M /;"	d
DRAM_DCR_CHIP_DENSITY_8192M	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_8192M /;"	d
DRAM_DCR_CHIP_DENSITY_8192M	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_8192M /;"	d
DRAM_DCR_CHIP_DENSITY_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_MASK /;"	d
DRAM_DCR_CHIP_DENSITY_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CHIP_DENSITY_MASK /;"	d
DRAM_DCR_CMD_RANK_ALL	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_CMD_RANK_ALL /;"	d
DRAM_DCR_CMD_RANK_ALL	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_CMD_RANK_ALL /;"	d
DRAM_DCR_IO_WIDTH	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH(/;"	d
DRAM_DCR_IO_WIDTH	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH(/;"	d
DRAM_DCR_IO_WIDTH_16BIT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH_16BIT /;"	d
DRAM_DCR_IO_WIDTH_16BIT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH_16BIT /;"	d
DRAM_DCR_IO_WIDTH_8BIT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH_8BIT /;"	d
DRAM_DCR_IO_WIDTH_8BIT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH_8BIT /;"	d
DRAM_DCR_IO_WIDTH_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH_MASK /;"	d
DRAM_DCR_IO_WIDTH_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_IO_WIDTH_MASK /;"	d
DRAM_DCR_MODE	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_MODE(/;"	d
DRAM_DCR_MODE	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_MODE(/;"	d
DRAM_DCR_MODE_INTERLEAVE	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_MODE_INTERLEAVE /;"	d
DRAM_DCR_MODE_INTERLEAVE	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_MODE_INTERLEAVE /;"	d
DRAM_DCR_MODE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_MODE_MASK /;"	d
DRAM_DCR_MODE_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_MODE_MASK /;"	d
DRAM_DCR_MODE_SEQ	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_MODE_SEQ /;"	d
DRAM_DCR_MODE_SEQ	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_MODE_SEQ /;"	d
DRAM_DCR_RANK_SEL	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_RANK_SEL(/;"	d
DRAM_DCR_RANK_SEL	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_RANK_SEL(/;"	d
DRAM_DCR_RANK_SEL_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_RANK_SEL_MASK /;"	d
DRAM_DCR_RANK_SEL_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_RANK_SEL_MASK /;"	d
DRAM_DCR_TYPE	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_TYPE /;"	d
DRAM_DCR_TYPE	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_TYPE /;"	d
DRAM_DCR_TYPE_DDR2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_TYPE_DDR2 /;"	d
DRAM_DCR_TYPE_DDR2	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_TYPE_DDR2 /;"	d
DRAM_DCR_TYPE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DCR_TYPE_DDR3 /;"	d
DRAM_DCR_TYPE_DDR3	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DCR_TYPE_DDR3 /;"	d
DRAM_DENSITY_1G	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_1G	include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_1G	/;"	d
DRAM_DENSITY_2G	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_2G	include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_2G	/;"	d
DRAM_DENSITY_4G	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_4G	include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_4G	/;"	d
DRAM_DENSITY_512M	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DENSITY_512M	include/dt-bindings/mrc/quark.h	/^#define DRAM_DENSITY_512M	/;"	d
DRAM_DLLCR_DISABLE	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DLLCR_DISABLE /;"	d
DRAM_DLLCR_DISABLE	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DLLCR_DISABLE /;"	d
DRAM_DLLCR_NRESET	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DLLCR_NRESET /;"	d
DRAM_DLLCR_NRESET	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DLLCR_NRESET /;"	d
DRAM_DLL_TIMING_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DRAM_DLL_TIMING_REG	/;"	d
DRAM_DQS_GATING_DELAY	board/sunxi/Kconfig	/^config DRAM_DQS_GATING_DELAY$/;"	c
DRAM_DRR_BURST	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DRR_BURST(/;"	d
DRAM_DRR_BURST	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DRR_BURST(/;"	d
DRAM_DRR_TREFI	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DRR_TREFI(/;"	d
DRAM_DRR_TREFI	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DRR_TREFI(/;"	d
DRAM_DRR_TRFC	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_DRR_TRFC(/;"	d
DRAM_DRR_TRFC	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_DRR_TRFC(/;"	d
DRAM_ECC	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DRAM_ECC	/;"	d
DRAM_EMR1	board/sunxi/Kconfig	/^config DRAM_EMR1$/;"	c
DRAM_FREQ_1066	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1066	include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_1066	/;"	d
DRAM_FREQ_1333M	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^	DRAM_FREQ_1333M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1333M	arch/arm/mach-uniphier/dram/umc-ld4.c	/^	DRAM_FREQ_1333M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1333M	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_FREQ_1333M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1600M	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^	DRAM_FREQ_1600M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1600M	arch/arm/mach-uniphier/dram/umc-ld11.c	/^	DRAM_FREQ_1600M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1600M	arch/arm/mach-uniphier/dram/umc-ld4.c	/^	DRAM_FREQ_1600M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1600M	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_FREQ_1600M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1866M	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_FREQ_1866M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_1866M	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	DRAM_FREQ_1866M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_2133M	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	DRAM_FREQ_2133M,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_800	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_800	include/dt-bindings/mrc/quark.h	/^#define DRAM_FREQ_800	/;"	d
DRAM_FREQ_NR	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^	DRAM_FREQ_NR,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_NR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^	DRAM_FREQ_NR,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_NR	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_FREQ_NR,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_NR	arch/arm/mach-uniphier/dram/umc-ld4.c	/^	DRAM_FREQ_NR,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_NR	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	DRAM_FREQ_NR,$/;"	e	enum:dram_freq	file:
DRAM_FREQ_NR	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_FREQ_NR,$/;"	e	enum:dram_freq	file:
DRAM_IOCR_ODT_EN	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_IOCR_ODT_EN /;"	d
DRAM_IOCR_ODT_EN	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_IOCR_ODT_EN /;"	d
DRAM_MAX_SIZE	arch/x86/include/asm/arch-quark/quark.h	/^#define DRAM_MAX_SIZE	/;"	d
DRAM_MBUS_CLK	board/sunxi/Kconfig	/^config DRAM_MBUS_CLK$/;"	c
DRAM_MCR_DCLK_OUT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_DCLK_OUT /;"	d
DRAM_MCR_DCLK_OUT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_DCLK_OUT /;"	d
DRAM_MCR_MODE_ADDR_IN	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_ADDR_IN /;"	d
DRAM_MCR_MODE_ADDR_IN	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_ADDR_IN /;"	d
DRAM_MCR_MODE_ADDR_OUT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_ADDR_OUT(/;"	d
DRAM_MCR_MODE_ADDR_OUT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_ADDR_OUT(/;"	d
DRAM_MCR_MODE_ADDR_OUT_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_ADDR_OUT_MASK /;"	d
DRAM_MCR_MODE_ADDR_OUT_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_ADDR_OUT_MASK /;"	d
DRAM_MCR_MODE_DQ_IN_OUT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_IN_OUT(/;"	d
DRAM_MCR_MODE_DQ_IN_OUT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_IN_OUT(/;"	d
DRAM_MCR_MODE_DQ_IN_OUT_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_IN_OUT_MASK /;"	d
DRAM_MCR_MODE_DQ_IN_OUT_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_IN_OUT_MASK /;"	d
DRAM_MCR_MODE_DQ_OUT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_OUT(/;"	d
DRAM_MCR_MODE_DQ_OUT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_OUT(/;"	d
DRAM_MCR_MODE_DQ_OUT_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_OUT_MASK /;"	d
DRAM_MCR_MODE_DQ_OUT_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_OUT_MASK /;"	d
DRAM_MCR_MODE_DQ_TURNON_DELAY	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_TURNON_DELAY(/;"	d
DRAM_MCR_MODE_DQ_TURNON_DELAY	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_TURNON_DELAY(/;"	d
DRAM_MCR_MODE_DQ_TURNON_DELAY_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_TURNON_DELAY_MASK /;"	d
DRAM_MCR_MODE_DQ_TURNON_DELAY_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_DQ_TURNON_DELAY_MASK /;"	d
DRAM_MCR_MODE_EN	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_EN(/;"	d
DRAM_MCR_MODE_EN	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_EN(/;"	d
DRAM_MCR_MODE_EN_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_EN_MASK /;"	d
DRAM_MCR_MODE_EN_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_EN_MASK /;"	d
DRAM_MCR_MODE_NORM	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_NORM(/;"	d
DRAM_MCR_MODE_NORM	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_NORM(/;"	d
DRAM_MCR_MODE_NORM_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_MODE_NORM_MASK /;"	d
DRAM_MCR_MODE_NORM_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_MODE_NORM_MASK /;"	d
DRAM_MCR_RESET	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MCR_RESET /;"	d
DRAM_MCR_RESET	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MCR_RESET /;"	d
DRAM_MEMORY_TYPE_DDR1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_DDR1 /;"	d
DRAM_MEMORY_TYPE_DDR1	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_DDR1 /;"	d
DRAM_MEMORY_TYPE_DDR2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_DDR2 /;"	d
DRAM_MEMORY_TYPE_DDR2	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_DDR2 /;"	d
DRAM_MEMORY_TYPE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_DDR3 /;"	d
DRAM_MEMORY_TYPE_DDR3	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_DDR3 /;"	d
DRAM_MEMORY_TYPE_LPDDR	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_LPDDR /;"	d
DRAM_MEMORY_TYPE_LPDDR	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_LPDDR /;"	d
DRAM_MEMORY_TYPE_LPDDR2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_LPDDR2 /;"	d
DRAM_MEMORY_TYPE_LPDDR2	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MEMORY_TYPE_LPDDR2 /;"	d
DRAM_MR_BURST_LENGTH	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_BURST_LENGTH(/;"	d
DRAM_MR_BURST_LENGTH	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_BURST_LENGTH(/;"	d
DRAM_MR_BURST_LENGTH_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_BURST_LENGTH_MASK /;"	d
DRAM_MR_BURST_LENGTH_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_BURST_LENGTH_MASK /;"	d
DRAM_MR_CAS_LAT	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_CAS_LAT(/;"	d
DRAM_MR_CAS_LAT	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_CAS_LAT(/;"	d
DRAM_MR_CAS_LAT_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_CAS_LAT_MASK /;"	d
DRAM_MR_CAS_LAT_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_CAS_LAT_MASK /;"	d
DRAM_MR_POWER_DOWN	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_POWER_DOWN /;"	d
DRAM_MR_POWER_DOWN	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_POWER_DOWN /;"	d
DRAM_MR_WRITE_RECOVERY	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_WRITE_RECOVERY(/;"	d
DRAM_MR_WRITE_RECOVERY	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_WRITE_RECOVERY(/;"	d
DRAM_MR_WRITE_RECOVERY_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_MR_WRITE_RECOVERY_MASK /;"	d
DRAM_MR_WRITE_RECOVERY_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_MR_WRITE_RECOVERY_MASK /;"	d
DRAM_ODT_CORRECTION	board/sunxi/Kconfig	/^config DRAM_ODT_CORRECTION$/;"	c
DRAM_ODT_EN	board/sunxi/Kconfig	/^config DRAM_ODT_EN$/;"	c
DRAM_PHYM_ALT_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	DRAM_PHYM_ALT_CLK_ROOT = 64,$/;"	e	enum:clk_root_index
DRAM_PHYM_ALT_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_ALT_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
DRAM_PHYM_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	DRAM_PHYM_CLK_ROOT = 48,$/;"	e	enum:clk_root_index
DRAM_PHYM_CLK_ROOT_FROM_PLL_DRAM_MAIN_1066M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_CLK_ROOT_FROM_PLL_DRAM_MAIN_1066M_CLK	/;"	d
DRAM_PHYM_CLK_ROOT_FROM_PLL_DRAM_PHYM_ALT_CLK_ROOT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define DRAM_PHYM_CLK_ROOT_FROM_PLL_DRAM_PHYM_ALT_CLK_ROOT	/;"	d
DRAM_PHY_CONFIGURATION	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DRAM_PHY_CONFIGURATION	/;"	d
DRAM_RANK	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RANK	include/dt-bindings/mrc/quark.h	/^#define DRAM_RANK(/;"	d
DRAM_RD_ODT_120OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_120OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_120OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_180OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_180OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_60OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_60OHM	/;"	d
DRAM_RD_ODT_OFF	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_RD_ODT_OFF	include/dt-bindings/mrc/quark.h	/^#define DRAM_RD_ODT_OFF	/;"	d
DRAM_REFRESH_RATE_195US	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_195US	include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_195US	/;"	d
DRAM_REFRESH_RATE_39US	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_39US	include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_39US	/;"	d
DRAM_REFRESH_RATE_785US	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_REFRESH_RATE_785US	include/dt-bindings/mrc/quark.h	/^#define DRAM_REFRESH_RATE_785US	/;"	d
DRAM_RON_34OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_34OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_34OHM	/;"	d
DRAM_RON_40OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RON_40OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RON_40OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_120OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_120OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_40OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_40OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_RTT_NOM_60OHM	include/dt-bindings/mrc/quark.h	/^#define DRAM_RTT_NOM_60OHM	/;"	d
DRAM_SEC_SIZE	include/configs/vexpress_aemv8a.h	/^#define DRAM_SEC_SIZE	/;"	d
DRAM_SIGMA_DELTA_ENABLE	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^#define DRAM_SIGMA_DELTA_ENABLE /;"	d	file:
DRAM_SRT_RANGE_EXTENDED	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_EXTENDED	include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_EXTENDED	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SRT_RANGE_NORMAL	include/dt-bindings/mrc/quark.h	/^#define DRAM_SRT_RANGE_NORMAL	/;"	d
DRAM_SZ_128M	arch/arm/mach-uniphier/dram/umc-ld4.c	/^	DRAM_SZ_128M,$/;"	e	enum:dram_size	file:
DRAM_SZ_128M	arch/arm/mach-uniphier/dram/umc-pro4.c	/^	DRAM_SZ_128M,$/;"	e	enum:dram_size	file:
DRAM_SZ_128M	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_SZ_128M,$/;"	e	enum:dram_size	file:
DRAM_SZ_256M	arch/arm/mach-uniphier/dram/umc-ld11.c	/^	DRAM_SZ_256M,$/;"	e	enum:dram_size	file:
DRAM_SZ_256M	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_SZ_256M,$/;"	e	enum:dram_size	file:
DRAM_SZ_256M	arch/arm/mach-uniphier/dram/umc-ld4.c	/^	DRAM_SZ_256M,$/;"	e	enum:dram_size	file:
DRAM_SZ_256M	arch/arm/mach-uniphier/dram/umc-pro4.c	/^	DRAM_SZ_256M,$/;"	e	enum:dram_size	file:
DRAM_SZ_256M	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	DRAM_SZ_256M,$/;"	e	enum:dram_size	file:
DRAM_SZ_256M	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_SZ_256M,$/;"	e	enum:dram_size	file:
DRAM_SZ_512M	arch/arm/mach-uniphier/dram/umc-ld11.c	/^	DRAM_SZ_512M,$/;"	e	enum:dram_size	file:
DRAM_SZ_512M	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_SZ_512M,$/;"	e	enum:dram_size	file:
DRAM_SZ_512M	arch/arm/mach-uniphier/dram/umc-pro4.c	/^	DRAM_SZ_512M,$/;"	e	enum:dram_size	file:
DRAM_SZ_512M	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	DRAM_SZ_512M,$/;"	e	enum:dram_size	file:
DRAM_SZ_512M	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_SZ_512M,$/;"	e	enum:dram_size	file:
DRAM_SZ_NR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^	DRAM_SZ_NR,$/;"	e	enum:dram_size	file:
DRAM_SZ_NR	arch/arm/mach-uniphier/dram/umc-ld20.c	/^	DRAM_SZ_NR,$/;"	e	enum:dram_size	file:
DRAM_SZ_NR	arch/arm/mach-uniphier/dram/umc-ld4.c	/^	DRAM_SZ_NR,$/;"	e	enum:dram_size	file:
DRAM_SZ_NR	arch/arm/mach-uniphier/dram/umc-pro4.c	/^	DRAM_SZ_NR,$/;"	e	enum:dram_size	file:
DRAM_SZ_NR	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	DRAM_SZ_NR,$/;"	e	enum:dram_size	file:
DRAM_SZ_NR	arch/arm/mach-uniphier/dram/umc-sld8.c	/^	DRAM_SZ_NR,$/;"	e	enum:dram_size	file:
DRAM_TIMINGS_DDR3_1066F_1333H	board/sunxi/Kconfig	/^config DRAM_TIMINGS_DDR3_1066F_1333H$/;"	c	choice:choicebcdb41430204
DRAM_TIMINGS_DDR3_800E_1066G_1333J	board/sunxi/Kconfig	/^config DRAM_TIMINGS_DDR3_800E_1066G_1333J$/;"	c	choice:choicebcdb41430204
DRAM_TIMINGS_VENDOR_MAGIC	board/sunxi/Kconfig	/^config DRAM_TIMINGS_VENDOR_MAGIC$/;"	c	choice:choicebcdb41430204
DRAM_TPR3	board/sunxi/Kconfig	/^config DRAM_TPR3$/;"	c
DRAM_TYPE	board/sunxi/Kconfig	/^config DRAM_TYPE$/;"	c
DRAM_TYPE_DDR3	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3	include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3	/;"	d
DRAM_TYPE_DDR3L	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_DDR3L	include/dt-bindings/mrc/quark.h	/^#define DRAM_TYPE_DDR3L	/;"	d
DRAM_TYPE_LPDDR2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DRAM_TYPE_LPDDR2	/;"	d
DRAM_TYPE_LPDDR2	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DRAM_TYPE_LPDDR2	/;"	d
DRAM_TYPE_LPDDR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DRAM_TYPE_LPDDR3	/;"	d
DRAM_TYPE_LPDDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define DRAM_TYPE_LPDDR3	/;"	d
DRAM_TYPE_LPDDR3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DRAM_TYPE_LPDDR3	/;"	d
DRAM_TYPE_LPDDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define DRAM_TYPE_LPDDR3	/;"	d
DRAM_WIDTH_X16	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X16	include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X16	/;"	d
DRAM_WIDTH_X32	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X32	include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X32	/;"	d
DRAM_WIDTH_X8	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_WIDTH_X8	include/dt-bindings/mrc/quark.h	/^#define DRAM_WIDTH_X8	/;"	d
DRAM_ZQ	board/sunxi/Kconfig	/^config DRAM_ZQ$/;"	c
DRAM_ZQCR0_IMP_DIV	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_ZQCR0_IMP_DIV(/;"	d
DRAM_ZQCR0_IMP_DIV	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_ZQCR0_IMP_DIV(/;"	d
DRAM_ZQCR0_IMP_DIV_MASK	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_ZQCR0_IMP_DIV_MASK /;"	d
DRAM_ZQCR0_IMP_DIV_MASK	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_ZQCR0_IMP_DIV_MASK /;"	d
DRAM_ZQCR0_ZCAL	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_ZQCR0_ZCAL /;"	d
DRAM_ZQCR0_ZCAL	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_ZQCR0_ZCAL /;"	d
DRAM_ZQCR0_ZDEN	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_ZQCR0_ZDEN /;"	d
DRAM_ZQCR0_ZDEN	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_ZQCR0_ZDEN /;"	d
DRAM_ZQSR_ZDONE	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define DRAM_ZQSR_ZDONE /;"	d
DRAM_ZQSR_ZDONE	arch/arm/include/asm/arch/dram_sun4i.h	/^#define DRAM_ZQSR_ZDONE /;"	d
DRAM_ZQ_INIT_TIMIMG_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DRAM_ZQ_INIT_TIMIMG_REG	/;"	d
DRAM_ZQ_TIMING_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DRAM_ZQ_TIMING_REG	/;"	d
DRCAPTURE	include/lattice.h	/^#define DRCAPTURE	/;"	d
DRCMR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR0	/;"	d
DRCMR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR1	/;"	d
DRCMR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR10	/;"	d
DRCMR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR11	/;"	d
DRCMR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR12	/;"	d
DRCMR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR13	/;"	d
DRCMR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR14	/;"	d
DRCMR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR15	/;"	d
DRCMR16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR16	/;"	d
DRCMR17	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR17	/;"	d
DRCMR18	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR18	/;"	d
DRCMR19	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR19	/;"	d
DRCMR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR2	/;"	d
DRCMR20	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR20	/;"	d
DRCMR21	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR21	/;"	d
DRCMR22	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR22	/;"	d
DRCMR23	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR23	/;"	d
DRCMR24	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR24	/;"	d
DRCMR25	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR25	/;"	d
DRCMR26	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR26	/;"	d
DRCMR27	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR27	/;"	d
DRCMR28	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR28	/;"	d
DRCMR29	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR29	/;"	d
DRCMR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR3	/;"	d
DRCMR30	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR30	/;"	d
DRCMR31	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR31	/;"	d
DRCMR32	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR32	/;"	d
DRCMR33	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR33	/;"	d
DRCMR34	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR34	/;"	d
DRCMR35	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR35	/;"	d
DRCMR36	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR36	/;"	d
DRCMR37	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR37	/;"	d
DRCMR38	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR38	/;"	d
DRCMR39	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR39	/;"	d
DRCMR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR4	/;"	d
DRCMR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR5	/;"	d
DRCMR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR6	/;"	d
DRCMR68	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR68	/;"	d
DRCMR69	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR69	/;"	d
DRCMR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR7	/;"	d
DRCMR70	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR70	/;"	d
DRCMR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR8	/;"	d
DRCMR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR9	/;"	d
DRCMRRXBTRBR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXBTRBR	/;"	d
DRCMRRXFFRBR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXFFRBR	/;"	d
DRCMRRXICDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXICDR	/;"	d
DRCMRRXMCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXMCDR	/;"	d
DRCMRRXMMC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXMMC	/;"	d
DRCMRRXMODR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXMODR	/;"	d
DRCMRRXPCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXPCDR	/;"	d
DRCMRRXSADR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXSADR	/;"	d
DRCMRRXSSDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXSSDR	/;"	d
DRCMRRXSTRBR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRRXSTRBR	/;"	d
DRCMRTXBTTHR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXBTTHR	/;"	d
DRCMRTXFFTHR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXFFTHR	/;"	d
DRCMRTXICDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXICDR	/;"	d
DRCMRTXMMC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXMMC	/;"	d
DRCMRTXMODR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXMODR	/;"	d
DRCMRTXPCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXPCDR	/;"	d
DRCMRTXSADR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXSADR	/;"	d
DRCMRTXSSDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXSSDR	/;"	d
DRCMRTXSTTHR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMRTXSTTHR	/;"	d
DRCMR_CHLNUM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR_CHLNUM	/;"	d
DRCMR_MAPVLD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRCMR_MAPVLD	/;"	d
DREAMPLUG_OE_HIGH	board/Marvell/dreamplug/dreamplug.h	/^#define DREAMPLUG_OE_HIGH	/;"	d
DREAMPLUG_OE_LOW	board/Marvell/dreamplug/dreamplug.h	/^#define DREAMPLUG_OE_LOW	/;"	d
DREAMPLUG_OE_VAL_HIGH	board/Marvell/dreamplug/dreamplug.h	/^#define DREAMPLUG_OE_VAL_HIGH	/;"	d
DREAMPLUG_OE_VAL_LOW	board/Marvell/dreamplug/dreamplug.h	/^#define DREAMPLUG_OE_VAL_LOW	/;"	d
DREF_CONTROL_MASK	drivers/video/i915_reg.h	/^#define  DREF_CONTROL_MASK /;"	d
DREF_CPU_SOURCE_OUTPUT_DISABLE	drivers/video/i915_reg.h	/^#define  DREF_CPU_SOURCE_OUTPUT_DISABLE /;"	d
DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD	drivers/video/i915_reg.h	/^#define  DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD /;"	d
DREF_CPU_SOURCE_OUTPUT_MASK	drivers/video/i915_reg.h	/^#define  DREF_CPU_SOURCE_OUTPUT_MASK	/;"	d
DREF_CPU_SOURCE_OUTPUT_NONSPREAD	drivers/video/i915_reg.h	/^#define  DREF_CPU_SOURCE_OUTPUT_NONSPREAD /;"	d
DREF_NONSPREAD_CK505_ENABLE	drivers/video/i915_reg.h	/^#define  DREF_NONSPREAD_CK505_ENABLE	/;"	d
DREF_NONSPREAD_SOURCE_DISABLE	drivers/video/i915_reg.h	/^#define  DREF_NONSPREAD_SOURCE_DISABLE /;"	d
DREF_NONSPREAD_SOURCE_ENABLE	drivers/video/i915_reg.h	/^#define  DREF_NONSPREAD_SOURCE_ENABLE /;"	d
DREF_NONSPREAD_SOURCE_MASK	drivers/video/i915_reg.h	/^#define  DREF_NONSPREAD_SOURCE_MASK	/;"	d
DREF_SSC1_DISABLE	drivers/video/i915_reg.h	/^#define  DREF_SSC1_DISABLE /;"	d
DREF_SSC1_ENABLE	drivers/video/i915_reg.h	/^#define  DREF_SSC1_ENABLE /;"	d
DREF_SSC4_CENTERSPREAD	drivers/video/i915_reg.h	/^#define  DREF_SSC4_CENTERSPREAD /;"	d
DREF_SSC4_DISABLE	drivers/video/i915_reg.h	/^#define  DREF_SSC4_DISABLE /;"	d
DREF_SSC4_DOWNSPREAD	drivers/video/i915_reg.h	/^#define  DREF_SSC4_DOWNSPREAD /;"	d
DREF_SSC4_ENABLE	drivers/video/i915_reg.h	/^#define  DREF_SSC4_ENABLE /;"	d
DREF_SSC_SOURCE_DISABLE	drivers/video/i915_reg.h	/^#define  DREF_SSC_SOURCE_DISABLE /;"	d
DREF_SSC_SOURCE_ENABLE	drivers/video/i915_reg.h	/^#define  DREF_SSC_SOURCE_ENABLE /;"	d
DREF_SSC_SOURCE_MASK	drivers/video/i915_reg.h	/^#define  DREF_SSC_SOURCE_MASK	/;"	d
DREF_SUPERSPREAD_SOURCE_DISABLE	drivers/video/i915_reg.h	/^#define  DREF_SUPERSPREAD_SOURCE_DISABLE /;"	d
DREF_SUPERSPREAD_SOURCE_ENABLE	drivers/video/i915_reg.h	/^#define  DREF_SUPERSPREAD_SOURCE_ENABLE /;"	d
DREF_SUPERSPREAD_SOURCE_MASK	drivers/video/i915_reg.h	/^#define  DREF_SUPERSPREAD_SOURCE_MASK	/;"	d
DREQ0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DREQ0_MARK,	DACK0_MARK,$/;"	e	enum:__anona304c1340103	file:
DREQ0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,$/;"	e	enum:__anona307879b0103	file:
DREQ0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	WAIT__MARK, DREQ0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DREQ0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
DREQ0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DREQ0_N_MARK, SCIFB1_RXD_MARK,$/;"	e	enum:__anona307901d0103	file:
DREQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DREQ1_MARK,	DACK1_MARK,$/;"	e	enum:__anona304c1340103	file:
DREQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	TX3_MARK, DREQ1_MARK, RX3_MARK,$/;"	e	enum:__anona307879b0103	file:
DREQ1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDLCLK_MARK, DREQ1_MARK, PORT221_LCD2CS__MARK, PWEN_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
DREQ1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,$/;"	e	enum:__anona3077f190103	file:
DREQ2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
DREQ2_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
DREQ3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDISP_MARK, LCDRS_MARK, PORT219_LCD2WR__MARK, DREQ3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
DREQA	drivers/usb/host/r8a66597.h	/^#define	DREQA	/;"	d
DREQE	drivers/usb/host/r8a66597.h	/^#define	DREQE	/;"	d
DREX_CONCONTROL_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define DREX_CONCONTROL_VAL	/;"	d
DREX_PAUSE_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define DREX_PAUSE_EN	/;"	d
DRFC	arch/x86/cpu/quark/smc.h	/^#define DRFC	/;"	d
DRFC_REFDBTCLR	arch/x86/cpu/quark/smc.h	/^#define DRFC_REFDBTCLR	/;"	d
DRFC_TREFI_MASK	arch/x86/cpu/quark/smc.h	/^#define DRFC_TREFI_MASK	/;"	d
DRIVE	cmd/fdc.c	/^#define DRIVE	/;"	d	file:
DRIVE1_02MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE1_02MA /;"	d
DRIVE1_04MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE1_04MA /;"	d
DRIVE1_08MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE1_08MA /;"	d
DRIVE1_10MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE1_10MA /;"	d
DRIVE2_02MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE2_02MA /;"	d
DRIVE2_04MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE2_04MA /;"	d
DRIVE2_08MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE2_08MA /;"	d
DRIVE2_10MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE2_10MA /;"	d
DRIVE3_04MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_04MA /;"	d
DRIVE3_08MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_08MA /;"	d
DRIVE3_12MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_12MA /;"	d
DRIVE3_16MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_16MA /;"	d
DRIVE3_20MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_20MA /;"	d
DRIVE3_24MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_24MA /;"	d
DRIVE3_32MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_32MA /;"	d
DRIVE3_40MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE3_40MA /;"	d
DRIVE4_02MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE4_02MA /;"	d
DRIVE4_04MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE4_04MA /;"	d
DRIVE4_08MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE4_08MA /;"	d
DRIVE4_10MA	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE4_10MA /;"	d
DRIVECURRENT_LEVEL0	drivers/video/tegra124/displayport.h	/^	DRIVECURRENT_LEVEL0 = 0,$/;"	e	enum:__anon91ae56030103
DRIVECURRENT_LEVEL1	drivers/video/tegra124/displayport.h	/^	DRIVECURRENT_LEVEL1 = 1,$/;"	e	enum:__anon91ae56030103
DRIVECURRENT_LEVEL2	drivers/video/tegra124/displayport.h	/^	DRIVECURRENT_LEVEL2 = 2,$/;"	e	enum:__anon91ae56030103
DRIVECURRENT_LEVEL3	drivers/video/tegra124/displayport.h	/^	DRIVECURRENT_LEVEL3 = 3,$/;"	e	enum:__anon91ae56030103
DRIVERNAME	drivers/net/dnet.h	/^#define DRIVERNAME /;"	d
DRIVERNAME	drivers/net/ks8851_mll.c	/^#define DRIVERNAME	/;"	d	file:
DRIVERNAME	drivers/net/smc911x.h	/^#define DRIVERNAME /;"	d
DRIVER_AUTHOR	drivers/usb/musb-new/musb_core.c	/^#define DRIVER_AUTHOR /;"	d	file:
DRIVER_DESC	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DRIVER_DESC /;"	d	file:
DRIVER_DESC	drivers/usb/gadget/ether.c	/^#define DRIVER_DESC	/;"	d	file:
DRIVER_DESC	drivers/usb/gadget/pxa25x_udc.c	/^#define DRIVER_DESC	/;"	d	file:
DRIVER_DESC	drivers/usb/musb-new/musb_core.c	/^#define DRIVER_DESC /;"	d	file:
DRIVER_INFO	drivers/usb/musb-new/musb_core.c	/^#define DRIVER_INFO /;"	d	file:
DRIVER_NAME	drivers/mmc/mvebu_mmc.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_NAME	drivers/mmc/mxcmmc.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_NAME	drivers/mmc/sh_mmcif.c	/^#define DRIVER_NAME	/;"	d	file:
DRIVER_NAME	drivers/mmc/sh_sdhi.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_NAME	drivers/mtd/nand/mxc_nand.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_NAME	drivers/mtd/nand/omap_elm.c	/^#define DRIVER_NAME	/;"	d	file:
DRIVER_NAME	drivers/net/lan91c96.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_NAME	drivers/usb/gadget/pxa25x_udc.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_NAME	drivers/video/da8xx-fb.c	/^#define DRIVER_NAME /;"	d	file:
DRIVER_VERSION	drivers/usb/gadget/at91_udc.c	/^#define	DRIVER_VERSION	/;"	d	file:
DRIVER_VERSION	drivers/usb/gadget/dwc2_udc_otg.c	/^#define DRIVER_VERSION /;"	d	file:
DRIVER_VERSION	drivers/usb/gadget/ether.c	/^#define DRIVER_VERSION	/;"	d	file:
DRIVER_VERSION	drivers/usb/gadget/g_dnl.c	/^#define DRIVER_VERSION	/;"	d	file:
DRIVER_VERSION	drivers/usb/gadget/pxa25x_udc.c	/^#define DRIVER_VERSION	/;"	d	file:
DRIVER_VERSION	drivers/usb/host/isp116x-hcd.c	/^#define DRIVER_VERSION	/;"	d	file:
DRIVE_CURRENT_SET_0_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_GET(/;"	d
DRIVE_CURRENT_SET_0_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_LEVEL_0	/;"	d
DRIVE_CURRENT_SET_0_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_LEVEL_1	/;"	d
DRIVE_CURRENT_SET_0_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_LEVEL_2	/;"	d
DRIVE_CURRENT_SET_0_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_LEVEL_3	/;"	d
DRIVE_CURRENT_SET_0_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_MASK	/;"	d
DRIVE_CURRENT_SET_0_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_0_SET(/;"	d
DRIVE_CURRENT_SET_1_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_GET(/;"	d
DRIVE_CURRENT_SET_1_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_LEVEL_0	/;"	d
DRIVE_CURRENT_SET_1_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_LEVEL_1	/;"	d
DRIVE_CURRENT_SET_1_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_LEVEL_2	/;"	d
DRIVE_CURRENT_SET_1_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_LEVEL_3	/;"	d
DRIVE_CURRENT_SET_1_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_MASK	/;"	d
DRIVE_CURRENT_SET_1_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_1_SET(/;"	d
DRIVE_CURRENT_SET_2_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_GET(/;"	d
DRIVE_CURRENT_SET_2_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_LEVEL_0	/;"	d
DRIVE_CURRENT_SET_2_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_LEVEL_1	/;"	d
DRIVE_CURRENT_SET_2_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_LEVEL_2	/;"	d
DRIVE_CURRENT_SET_2_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_LEVEL_3	/;"	d
DRIVE_CURRENT_SET_2_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_MASK	/;"	d
DRIVE_CURRENT_SET_2_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_2_SET(/;"	d
DRIVE_CURRENT_SET_3_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_GET(/;"	d
DRIVE_CURRENT_SET_3_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_LEVEL_0	/;"	d
DRIVE_CURRENT_SET_3_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_LEVEL_1	/;"	d
DRIVE_CURRENT_SET_3_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_LEVEL_2	/;"	d
DRIVE_CURRENT_SET_3_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_LEVEL_3	/;"	d
DRIVE_CURRENT_SET_3_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_MASK	/;"	d
DRIVE_CURRENT_SET_3_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_CURRENT_SET_3_SET(/;"	d
DRIVE_DVDD_BIT_1_0000V	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_DVDD_BIT_1_0000V	/;"	d
DRIVE_DVDD_BIT_1_0625V	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define DRIVE_DVDD_BIT_1_0625V	/;"	d
DRIVE_DVDD_BIT_1_0625V	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_DVDD_BIT_1_0625V	/;"	d
DRIVE_DVDD_BIT_1_1250V	arch/arm/mach-exynos/include/mach/dp.h	/^#define DRIVE_DVDD_BIT_1_1250V	/;"	d
DRIVE_FAST_10mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_FAST_10mA	/;"	d
DRIVE_FAST_1mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_FAST_1mA	/;"	d
DRIVE_FAST_2mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_FAST_2mA	/;"	d
DRIVE_FAST_3mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_FAST_3mA	/;"	d
DRIVE_FAST_4mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_FAST_4mA	/;"	d
DRIVE_FAST_6mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_FAST_6mA	/;"	d
DRIVE_MASK	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define DRIVE_MASK /;"	d
DRIVE_OFFSET	arch/arm/cpu/arm926ejs/mxs/iomux.c	/^#define	DRIVE_OFFSET	/;"	d	file:
DRIVE_SEL	drivers/ddr/microchip/ddr2_regs.h	/^#define DRIVE_SEL(/;"	d
DRIVE_SLOW_10mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_SLOW_10mA	/;"	d
DRIVE_SLOW_6mA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DRIVE_SLOW_6mA	/;"	d
DRIVE_VBUS_OFF	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DRIVE_VBUS_OFF	/;"	d
DRIVE_VBUS_OFF_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DRIVE_VBUS_OFF_ENA	/;"	d
DRIVE_VBUS_ON	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DRIVE_VBUS_ON	/;"	d
DRIVE_VBUS_ON_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define DRIVE_VBUS_ON_ENA	/;"	d
DRMC	arch/x86/cpu/quark/smc.h	/^#define DRMC	/;"	d
DRMC_CKEMODE	arch/x86/cpu/quark/smc.h	/^#define DRMC_CKEMODE	/;"	d
DRMC_COLDWAKE	arch/x86/cpu/quark/smc.h	/^#define DRMC_COLDWAKE	/;"	d
DRMC_ODTMODE	arch/x86/cpu/quark/smc.h	/^#define DRMC_ODTMODE	/;"	d
DRM_EMU0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DRM_EMU0	/;"	d
DRM_EMU1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DRM_EMU1	/;"	d
DRO	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	DRO	/;"	d
DROPBITS	lib/zlib/inflate.c	/^#define DROPBITS(/;"	d	file:
DRP	arch/x86/cpu/quark/smc.h	/^#define DRP	/;"	d
DRPAUSE	include/lattice.h	/^#define DRPAUSE	/;"	d
DRPD	drivers/usb/host/r8a66597.h	/^#define	DRPD	/;"	d
DRP_ADDRMAP_MAP0	arch/x86/cpu/quark/smc.h	/^#define DRP_ADDRMAP_MAP0	/;"	d
DRP_ADDRMAP_MAP1	arch/x86/cpu/quark/smc.h	/^#define DRP_ADDRMAP_MAP1	/;"	d
DRP_ADDRMAP_MASK	arch/x86/cpu/quark/smc.h	/^#define DRP_ADDRMAP_MASK	/;"	d
DRP_PRI64BSPLITEN	arch/x86/cpu/quark/smc.h	/^#define DRP_PRI64BSPLITEN	/;"	d
DRP_RKEN0	arch/x86/cpu/quark/smc.h	/^#define DRP_RKEN0	/;"	d
DRP_RKEN1	arch/x86/cpu/quark/smc.h	/^#define DRP_RKEN1	/;"	d
DRTOSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DRTOSR /;"	d
DRTY	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	DRTY	/;"	d
DRVCFG	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/p2571/pinmux-config-p2571.h	/^#define DRVCFG(/;"	d
DRVCFG	board/nvidia/venice2/pinmux-config-venice2.h	/^#define DRVCFG(/;"	d
DRVCR	arch/sh/include/asm/cpu_sh7722.h	/^#define DRVCR	/;"	d
DRVCRA	arch/sh/include/asm/cpu_sh7723.h	/^#define DRVCRA /;"	d
DRVCRA	arch/sh/include/asm/cpu_sh7724.h	/^#define DRVCRA /;"	d
DRVCRA_A	board/renesas/ap325rxa/lowlevel_init.S	/^DRVCRA_A:	.long	DRVCRA$/;"	l
DRVCRA_D	board/renesas/ap325rxa/lowlevel_init.S	/^DRVCRA_D:	.word	0x4555$/;"	l
DRVCRB	arch/sh/include/asm/cpu_sh7723.h	/^#define DRVCRB /;"	d
DRVCRB	arch/sh/include/asm/cpu_sh7724.h	/^#define DRVCRB /;"	d
DRVCRB_A	board/renesas/ap325rxa/lowlevel_init.S	/^DRVCRB_A:	.long	DRVCRB$/;"	l
DRVCRB_D	board/renesas/ap325rxa/lowlevel_init.S	/^DRVCRB_D:	.word	0x0005$/;"	l
DRVCR_A	board/ms7722se/lowlevel_init.S	/^DRVCR_A:	.long	0xa405018A$/;"	l
DRVCR_D	board/ms7722se/lowlevel_init.S	/^DRVCR_D:	.word	0x0554$/;"	l
DRVDN_MASK	arch/arm/mach-tegra/pinmux-common.c	/^#define DRVDN_MASK	/;"	d	file:
DRVDN_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define DRVDN_SHIFT	/;"	d	file:
DRVGRP	arch/arm/mach-tegra/tegra20/pinmux.c	/^#define DRVGRP(/;"	d	file:
DRVSTR_NFET	drivers/ddr/microchip/ddr2_regs.h	/^#define DRVSTR_NFET(/;"	d
DRVSTR_PFET	drivers/ddr/microchip/ddr2_regs.h	/^#define DRVSTR_PFET(/;"	d
DRVUP_MASK	arch/arm/mach-tegra/pinmux-common.c	/^#define DRVUP_MASK	/;"	d	file:
DRVUP_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define DRVUP_SHIFT	/;"	d	file:
DRV_MASK	drivers/gpio/s5p_gpio.c	/^#define DRV_MASK(/;"	d	file:
DRV_NAME	drivers/block/pata_bfin.h	/^#define DRV_NAME	/;"	d
DRV_NAME	drivers/block/sata_ceva.c	/^#define DRV_NAME	/;"	d	file:
DRV_NAME	drivers/mtd/nand/mpc5121_nfc.c	/^#define DRV_NAME	/;"	d	file:
DRV_REG	arch/arm/mach-tegra/pinmux-common.c	/^#define DRV_REG(/;"	d	file:
DRV_SET	drivers/gpio/s5p_gpio.c	/^#define DRV_SET(/;"	d	file:
DRV_TYPE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DRV_TYPE	/;"	d
DRV_TYPE_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DRV_TYPE_DISABLE	/;"	d
DRV_VERSION	drivers/block/pata_bfin.h	/^#define DRV_VERSION	/;"	d
DR_MODE_DEVICE	drivers/usb/host/ehci-tegra.c	/^	DR_MODE_DEVICE,		\/* supports device operation *\/$/;"	e	enum:dr_mode	file:
DR_MODE_DEVICE	drivers/usb/host/ehci-vf.c	/^	DR_MODE_DEVICE,		\/* supports device operation *\/$/;"	e	enum:dr_mode	file:
DR_MODE_HOST	drivers/usb/host/ehci-tegra.c	/^	DR_MODE_HOST,		\/* supports host operation *\/$/;"	e	enum:dr_mode	file:
DR_MODE_HOST	drivers/usb/host/ehci-vf.c	/^	DR_MODE_HOST,		\/* supports host operation *\/$/;"	e	enum:dr_mode	file:
DR_MODE_NONE	drivers/usb/host/ehci-tegra.c	/^	DR_MODE_NONE = 0,$/;"	e	enum:dr_mode	file:
DR_MODE_NONE	drivers/usb/host/ehci-vf.c	/^	DR_MODE_NONE = 0,$/;"	e	enum:dr_mode	file:
DR_MODE_OTG	drivers/usb/host/ehci-tegra.c	/^	DR_MODE_OTG,		\/* supports both *\/$/;"	e	enum:dr_mode	file:
DR_MODE_OTG	drivers/usb/host/ehci-vf.c	/^	DR_MODE_OTG,		\/* supports both *\/$/;"	e	enum:dr_mode	file:
DR_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define DR_P	/;"	d
DS	arch/x86/include/asm/ptrace.h	/^#define DS /;"	d
DS	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 CS, DS, SS, ES, FS, GS;$/;"	m	struct:i386_segment_regs	typeref:typename:u16
DS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define DS /;"	d
DS0_PULL_UP_DOWN_EN	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS0_PULL_UP_DOWN_EN	include/dt-bindings/pinctrl/am43xx.h	/^#define DS0_PULL_UP_DOWN_EN	/;"	d
DS109_OE_HIGH	board/Synology/ds109/ds109.h	/^#define DS109_OE_HIGH	/;"	d
DS109_OE_LOW	board/Synology/ds109/ds109.h	/^#define DS109_OE_LOW	/;"	d
DS109_OE_VAL_HIGH	board/Synology/ds109/ds109.h	/^#define DS109_OE_VAL_HIGH	/;"	d
DS109_OE_VAL_LOW	board/Synology/ds109/ds109.h	/^#define DS109_OE_VAL_LOW	/;"	d
DS1722_RESOLUTION_10BIT	include/ds1722.h	/^#define DS1722_RESOLUTION_10BIT	/;"	d
DS1722_RESOLUTION_11BIT	include/ds1722.h	/^#define DS1722_RESOLUTION_11BIT	/;"	d
DS1722_RESOLUTION_12BIT	include/ds1722.h	/^#define DS1722_RESOLUTION_12BIT	/;"	d
DS1722_RESOLUTION_8BIT	include/ds1722.h	/^#define DS1722_RESOLUTION_8BIT	/;"	d
DS1722_RESOLUTION_9BIT	include/ds1722.h	/^#define DS1722_RESOLUTION_9BIT	/;"	d
DS414_GPP_OUT_ENA_HIGH	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_ENA_HIGH	/;"	d	file:
DS414_GPP_OUT_ENA_LOW	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_ENA_LOW	/;"	d	file:
DS414_GPP_OUT_ENA_MID	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_ENA_MID	/;"	d	file:
DS414_GPP_OUT_POL_HIGH	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_POL_HIGH	/;"	d	file:
DS414_GPP_OUT_POL_LOW	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_POL_LOW	/;"	d	file:
DS414_GPP_OUT_POL_MID	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_POL_MID	/;"	d	file:
DS414_GPP_OUT_VAL_HIGH	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_VAL_HIGH	/;"	d	file:
DS414_GPP_OUT_VAL_LOW	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_VAL_LOW	/;"	d	file:
DS414_GPP_OUT_VAL_MID	board/Synology/ds414/ds414.c	/^#define DS414_GPP_OUT_VAL_MID	/;"	d	file:
DS4510_CFG	include/ds4510.h	/^#define DS4510_CFG	/;"	d
DS4510_CFG_READY	include/ds4510.h	/^#define DS4510_CFG_READY	/;"	d
DS4510_CFG_RESET	include/ds4510.h	/^#define DS4510_CFG_RESET	/;"	d
DS4510_CFG_SEE	include/ds4510.h	/^#define DS4510_CFG_SEE	/;"	d
DS4510_CFG_SWRST	include/ds4510.h	/^#define DS4510_CFG_SWRST	/;"	d
DS4510_CFG_TRIP_POINT	include/ds4510.h	/^#define DS4510_CFG_TRIP_POINT	/;"	d
DS4510_CMD_DEVICE	drivers/misc/ds4510.c	/^	DS4510_CMD_DEVICE,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_EEPROM	drivers/misc/ds4510.c	/^	DS4510_CMD_EEPROM,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_INFO	drivers/misc/ds4510.c	/^	DS4510_CMD_INFO,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_INPUT	drivers/misc/ds4510.c	/^	DS4510_CMD_INPUT,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_NV	drivers/misc/ds4510.c	/^	DS4510_CMD_NV,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_OUTPUT	drivers/misc/ds4510.c	/^	DS4510_CMD_OUTPUT,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_PULLUP	drivers/misc/ds4510.c	/^	DS4510_CMD_PULLUP,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_RSTDELAY	drivers/misc/ds4510.c	/^	DS4510_CMD_RSTDELAY,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_SEEPROM	drivers/misc/ds4510.c	/^	DS4510_CMD_SEEPROM,$/;"	e	enum:__anone96edd600103	file:
DS4510_CMD_SRAM	drivers/misc/ds4510.c	/^	DS4510_CMD_SRAM,$/;"	e	enum:__anone96edd600103	file:
DS4510_EEPROM	include/ds4510.h	/^#define DS4510_EEPROM	/;"	d
DS4510_EEPROM_PAGE_OFFSET	include/ds4510.h	/^#define DS4510_EEPROM_PAGE_OFFSET(/;"	d
DS4510_EEPROM_PAGE_SIZE	include/ds4510.h	/^#define DS4510_EEPROM_PAGE_SIZE	/;"	d
DS4510_EEPROM_PAGE_WRITE_DELAY_MS	include/ds4510.h	/^#define DS4510_EEPROM_PAGE_WRITE_DELAY_MS	/;"	d
DS4510_EEPROM_SIZE	include/ds4510.h	/^#define DS4510_EEPROM_SIZE	/;"	d
DS4510_IO0	include/ds4510.h	/^#define DS4510_IO0	/;"	d
DS4510_IO1	include/ds4510.h	/^#define DS4510_IO1	/;"	d
DS4510_IO2	include/ds4510.h	/^#define DS4510_IO2	/;"	d
DS4510_IO3	include/ds4510.h	/^#define DS4510_IO3	/;"	d
DS4510_IO_MASK	include/ds4510.h	/^#define DS4510_IO_MASK	/;"	d
DS4510_IO_STATUS	include/ds4510.h	/^#define DS4510_IO_STATUS	/;"	d
DS4510_NUM_IO	include/ds4510.h	/^#define DS4510_NUM_IO	/;"	d
DS4510_PULLUP	include/ds4510.h	/^#define DS4510_PULLUP	/;"	d
DS4510_PULLUP_DIS	include/ds4510.h	/^#define DS4510_PULLUP_DIS	/;"	d
DS4510_PULLUP_EN	include/ds4510.h	/^#define DS4510_PULLUP_EN	/;"	d
DS4510_RSTDELAY	include/ds4510.h	/^#define DS4510_RSTDELAY	/;"	d
DS4510_RSTDELAY_1000	include/ds4510.h	/^#define DS4510_RSTDELAY_1000	/;"	d
DS4510_RSTDELAY_125	include/ds4510.h	/^#define DS4510_RSTDELAY_125	/;"	d
DS4510_RSTDELAY_250	include/ds4510.h	/^#define DS4510_RSTDELAY_250	/;"	d
DS4510_RSTDELAY_500	include/ds4510.h	/^#define DS4510_RSTDELAY_500	/;"	d
DS4510_RSTDELAY_MASK	include/ds4510.h	/^#define DS4510_RSTDELAY_MASK	/;"	d
DS4510_SEEPROM	include/ds4510.h	/^#define DS4510_SEEPROM	/;"	d
DS4510_SEEPROM_SIZE	include/ds4510.h	/^#define DS4510_SEEPROM_SIZE	/;"	d
DS4510_SRAM	include/ds4510.h	/^#define DS4510_SRAM	/;"	d
DS4510_SRAM_SIZE	include/ds4510.h	/^#define DS4510_SRAM_SIZE	/;"	d
DSA	include/sym53c8xx.h	/^#define DSA	/;"	d
DSA1	include/sym53c8xx.h	/^#define DSA1	/;"	d
DSA2	include/sym53c8xx.h	/^#define DSA2	/;"	d
DSA3	include/sym53c8xx.h	/^#define DSA3	/;"	d
DSADDR	include/fsl_esdhc.h	/^#define DSADDR	/;"	d
DSADR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR(/;"	d
DSADR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR0	/;"	d
DSADR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR1	/;"	d
DSADR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR10	/;"	d
DSADR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR11	/;"	d
DSADR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR12	/;"	d
DSADR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR13	/;"	d
DSADR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR14	/;"	d
DSADR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR15	/;"	d
DSADR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR2	/;"	d
DSADR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR3	/;"	d
DSADR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR4	/;"	d
DSADR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR5	/;"	d
DSADR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR6	/;"	d
DSADR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR7	/;"	d
DSADR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR8	/;"	d
DSADR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DSADR9	/;"	d
DSB	arch/arm/include/asm/barriers.h	/^#define DSB	/;"	d
DSCH	arch/x86/cpu/quark/smc.h	/^#define DSCH	/;"	d
DSCH_NEWBYPDIS	arch/x86/cpu/quark/smc.h	/^#define DSCH_NEWBYPDIS	/;"	d
DSCH_OOODIS	arch/x86/cpu/quark/smc.h	/^#define DSCH_OOODIS	/;"	d
DSCH_OOOST3DIS	arch/x86/cpu/quark/smc.h	/^#define DSCH_OOOST3DIS	/;"	d
DSCR_10PF	arch/m68k/include/asm/m520x.h	/^#define DSCR_10PF	/;"	d
DSCR_10PF	arch/m68k/include/asm/m5301x.h	/^#define DSCR_10PF	/;"	d
DSCR_20PF	arch/m68k/include/asm/m520x.h	/^#define DSCR_20PF	/;"	d
DSCR_20PF	arch/m68k/include/asm/m5301x.h	/^#define DSCR_20PF	/;"	d
DSCR_30PF	arch/m68k/include/asm/m520x.h	/^#define DSCR_30PF	/;"	d
DSCR_30PF	arch/m68k/include/asm/m5301x.h	/^#define DSCR_30PF	/;"	d
DSCR_50PF	arch/m68k/include/asm/m520x.h	/^#define DSCR_50PF	/;"	d
DSCR_50PF	arch/m68k/include/asm/m5301x.h	/^#define DSCR_50PF	/;"	d
DSCR_LOAD_10PF	arch/m68k/include/asm/m5227x.h	/^#define DSCR_LOAD_10PF	/;"	d
DSCR_LOAD_20PF	arch/m68k/include/asm/m5227x.h	/^#define DSCR_LOAD_20PF	/;"	d
DSCR_LOAD_30PF	arch/m68k/include/asm/m5227x.h	/^#define DSCR_LOAD_30PF	/;"	d
DSCR_LOAD_50PF	arch/m68k/include/asm/m5227x.h	/^#define DSCR_LOAD_50PF	/;"	d
DSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DSEL	/;"	d
DSEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define DSEL_P	/;"	d
DSEL_TIME	include/linux/mtd/st_smi.h	/^#define DSEL_TIME	/;"	d
DSESR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define DSESR /;"	d
DSIM_18BPP_666LOOSELYPACKED	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_18BPP_666LOOSELYPACKED,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_24BPP_888	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_24BPP_888$/;"	e	enum:mipi_dsim_pixel_format
DSIM_AFC_CTL	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_AFC_CTL(/;"	d
DSIM_AFC_CTL_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_AFC_CTL_SHIFT	/;"	d
DSIM_AFC_EN	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_AFC_EN	/;"	d
DSIM_AUTO_FLUSH_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_AUTO_FLUSH_SHIFT	/;"	d
DSIM_AUTO_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_AUTO_MODE_SHIFT	/;"	d
DSIM_BTA_TOUT_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_BTA_TOUT_SHIFT	/;"	d
DSIM_BURST	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_BURST,$/;"	e	enum:mipi_dsim_burst_mode_type
DSIM_BURST_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_BURST_MODE_SHIFT	/;"	d
DSIM_BURST_SYNC_EVENT	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_BURST_SYNC_EVENT,$/;"	e	enum:mipi_dsim_burst_mode_type
DSIM_BYTE_CLKEN_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_BYTE_CLKEN_SHIFT	/;"	d
DSIM_BYTE_CLK_DISABLE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_BYTE_CLK_DISABLE	/;"	d
DSIM_BYTE_CLK_ENABLE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_BYTE_CLK_ENABLE	/;"	d
DSIM_BYTE_CLK_SRC_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_BYTE_CLK_SRC_SHIFT	/;"	d
DSIM_CMD_12BPP	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_CMD_12BPP,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_CMD_16BPP	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_CMD_16BPP,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_CMD_3BPP	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_CMD_3BPP,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_CMD_8BPP	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_CMD_8BPP,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_CMD_ALLOW_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_CMD_ALLOW_MASK	/;"	d
DSIM_CMD_ALLOW_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_CMD_ALLOW_SHIFT	/;"	d
DSIM_CMD_LPDT_LP	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_CMD_LPDT_LP	/;"	d
DSIM_CMD_LPDT_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_CMD_LPDT_SHIFT	/;"	d
DSIM_COMMAND	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_COMMAND,$/;"	e	enum:mipi_dsim_interface_type
DSIM_DATA_LANE_1	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_DATA_LANE_1,$/;"	e	enum:mipi_dsim_no_of_data_lane
DSIM_DATA_LANE_2	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_DATA_LANE_2,$/;"	e	enum:mipi_dsim_no_of_data_lane
DSIM_DATA_LANE_3	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_DATA_LANE_3,$/;"	e	enum:mipi_dsim_no_of_data_lane
DSIM_DATA_LANE_4	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_DATA_LANE_4$/;"	e	enum:mipi_dsim_no_of_data_lane
DSIM_DPDN_SWAP_DATA_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_DPDN_SWAP_DATA_SHIFT	/;"	d
DSIM_EOT_PACKET_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_EOT_PACKET_SHIFT	/;"	d
DSIM_ESC_CLKEN_DISABLE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_ESC_CLKEN_DISABLE	/;"	d
DSIM_ESC_CLKEN_ENABLE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_ESC_CLKEN_ENABLE	/;"	d
DSIM_ESC_CLKEN_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_ESC_CLKEN_SHIFT	/;"	d
DSIM_EXT_CLK_BYPASS	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_EXT_CLK_BYPASS$/;"	e	enum:mipi_dsim_byte_clk_src
DSIM_EXT_CLK_DIV8	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_EXT_CLK_DIV8,$/;"	e	enum:mipi_dsim_byte_clk_src
DSIM_FORCE_STOP_STATE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_FORCE_STOP_STATE_SHIFT	/;"	d
DSIM_FREQ_BAND_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_FREQ_BAND_SHIFT	/;"	d
DSIM_FUNCRST	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_FUNCRST	/;"	d
DSIM_HBP_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_HBP_MODE_SHIFT	/;"	d
DSIM_HFP_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_HFP_MODE_SHIFT	/;"	d
DSIM_HSA_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_HSA_MODE_SHIFT	/;"	d
DSIM_HSE_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_HSE_MODE_SHIFT	/;"	d
DSIM_LANE_CLOCK	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_LANE_CLOCK = (1 << 0),$/;"	e	enum:__anonc2a70d1a0203	file:
DSIM_LANE_DATA0	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_LANE_DATA0 = (1 << 1),$/;"	e	enum:__anonc2a70d1a0203	file:
DSIM_LANE_DATA1	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_LANE_DATA1 = (1 << 2),$/;"	e	enum:__anonc2a70d1a0203	file:
DSIM_LANE_DATA2	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_LANE_DATA2 = (1 << 3),$/;"	e	enum:__anonc2a70d1a0203	file:
DSIM_LANE_DATA3	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_LANE_DATA3 = (1 << 4)$/;"	e	enum:__anonc2a70d1a0203	file:
DSIM_LANE_ENx	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_LANE_ENx(/;"	d
DSIM_LANE_ESC_CLKEN	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_LANE_ESC_CLKEN(/;"	d
DSIM_LANE_ESC_CLKEN_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_LANE_ESC_CLKEN_SHIFT	/;"	d
DSIM_LPDR_TOUT_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_LPDR_TOUT_SHIFT	/;"	d
DSIM_MAINPIX_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAINPIX_SHIFT	/;"	d
DSIM_MAINVC_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAINVC_SHIFT	/;"	d
DSIM_MAIN_HBP_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HBP_MASK	/;"	d
DSIM_MAIN_HBP_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HBP_SHIFT	/;"	d
DSIM_MAIN_HFP_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HFP_MASK	/;"	d
DSIM_MAIN_HFP_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HFP_SHIFT	/;"	d
DSIM_MAIN_HRESOL	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HRESOL(/;"	d
DSIM_MAIN_HSA_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HSA_MASK	/;"	d
DSIM_MAIN_HSA_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_HSA_SHIFT	/;"	d
DSIM_MAIN_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_SHIFT	/;"	d
DSIM_MAIN_STAND_BY	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_STAND_BY	/;"	d
DSIM_MAIN_VBP_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_VBP_MASK	/;"	d
DSIM_MAIN_VBP_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_VBP_SHIFT	/;"	d
DSIM_MAIN_VRESOL	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_VRESOL(/;"	d
DSIM_MAIN_VSA_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_VSA_MASK	/;"	d
DSIM_MAIN_VSA_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_MAIN_VSA_SHIFT	/;"	d
DSIM_NON_BURST_SYNC_EVENT	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_NON_BURST_SYNC_EVENT,$/;"	e	enum:mipi_dsim_burst_mode_type
DSIM_NON_BURST_SYNC_PULSE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_NON_BURST_SYNC_PULSE,$/;"	e	enum:mipi_dsim_burst_mode_type
DSIM_NON_VIDEO_MODE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_NON_VIDEO_MODE$/;"	e	enum:mipi_dsim_burst_mode_type
DSIM_NUM_OF_DATALANE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_NUM_OF_DATALANE_SHIFT	/;"	d
DSIM_NUM_OF_DATA_LANE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_NUM_OF_DATA_LANE(/;"	d
DSIM_PKTHDR_DAT0	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PKTHDR_DAT0(/;"	d
DSIM_PKTHDR_DAT1	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PKTHDR_DAT1(/;"	d
DSIM_PKTHDR_DI	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PKTHDR_DI(/;"	d
DSIM_PLL_BYPASS_EXTERNAL	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PLL_BYPASS_EXTERNAL	/;"	d
DSIM_PLL_BYPASS_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PLL_BYPASS_SHIFT	/;"	d
DSIM_PLL_EN_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PLL_EN_SHIFT	/;"	d
DSIM_PLL_OUT_DIV8	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_PLL_OUT_DIV8,$/;"	e	enum:mipi_dsim_byte_clk_src
DSIM_PLL_STABLE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PLL_STABLE	/;"	d
DSIM_PRECTRL_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PRECTRL_SHIFT	/;"	d
DSIM_PREDIV_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_PREDIV_SHIFT	/;"	d
DSIM_SCALER_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SCALER_SHIFT	/;"	d
DSIM_STABLE_VFP_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_STABLE_VFP_MASK	/;"	d
DSIM_STABLE_VFP_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_STABLE_VFP_SHIFT	/;"	d
DSIM_STATE_HSCLKEN	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_STATE_HSCLKEN,	\/* HS clock was enabled. *\/$/;"	e	enum:__anonc2a70d1a0103	file:
DSIM_STATE_INIT	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_STATE_INIT,	\/* should be initialized. *\/$/;"	e	enum:__anonc2a70d1a0103	file:
DSIM_STATE_STOP	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_STATE_STOP,	\/* CPU and LCDC are LP mode. *\/$/;"	e	enum:__anonc2a70d1a0103	file:
DSIM_STATE_ULPS	drivers/video/exynos/exynos_mipi_dsi_common.c	/^	DSIM_STATE_ULPS$/;"	e	enum:__anonc2a70d1a0103	file:
DSIM_STOP_STATE_CLK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_STOP_STATE_CLK	/;"	d
DSIM_STOP_STATE_CNT_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_STOP_STATE_CNT_SHIFT	/;"	d
DSIM_STOP_STATE_DAT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_STOP_STATE_DAT(/;"	d
DSIM_SUBPIX_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUBPIX_SHIFT	/;"	d
DSIM_SUBVC_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUBVC_SHIFT	/;"	d
DSIM_SUB_HRESOL_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUB_HRESOL_MASK	/;"	d
DSIM_SUB_HRESOL_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUB_HRESOL_SHIFT	/;"	d
DSIM_SUB_STANDY_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUB_STANDY_MASK	/;"	d
DSIM_SUB_STANDY_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUB_STANDY_SHIFT	/;"	d
DSIM_SUB_VRESOL_MASK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUB_VRESOL_MASK	/;"	d
DSIM_SUB_VRESOL_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SUB_VRESOL_SHIFT	/;"	d
DSIM_SWRST	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_SWRST	/;"	d
DSIM_TX_LPDT_LP	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_TX_LPDT_LP	/;"	d
DSIM_TX_LPDT_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_TX_LPDT_SHIFT	/;"	d
DSIM_TX_READY_HS_CLK	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_TX_READY_HS_CLK	/;"	d
DSIM_TX_REQUEST_HSCLK_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_TX_REQUEST_HSCLK_SHIFT	/;"	d
DSIM_VIDEO	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VIDEO$/;"	e	enum:mipi_dsim_interface_type
DSIM_VIDEO_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_VIDEO_MODE_SHIFT	/;"	d
DSIM_VID_16BPP_565	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VID_16BPP_565,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_VID_18BPP_666PACKED	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VID_18BPP_666PACKED,$/;"	e	enum:mipi_dsim_pixel_format
DSIM_VIRTUAL_CH_0	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VIRTUAL_CH_0,$/;"	e	enum:mipi_dsim_virtual_ch_no
DSIM_VIRTUAL_CH_1	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VIRTUAL_CH_1,$/;"	e	enum:mipi_dsim_virtual_ch_no
DSIM_VIRTUAL_CH_2	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VIRTUAL_CH_2,$/;"	e	enum:mipi_dsim_virtual_ch_no
DSIM_VIRTUAL_CH_3	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	DSIM_VIRTUAL_CH_3$/;"	e	enum:mipi_dsim_virtual_ch_no
DSIM_ZEROCTRL_SHIFT	arch/arm/mach-exynos/include/mach/dsim.h	/^#define DSIM_ZEROCTRL_SHIFT	/;"	d
DSIPORTA_LANE0X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE0X	/;"	d
DSIPORTA_LANE0Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE0Y	/;"	d
DSIPORTA_LANE1X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE1X	/;"	d
DSIPORTA_LANE1Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE1Y	/;"	d
DSIPORTA_LANE2X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE2X	/;"	d
DSIPORTA_LANE2Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE2Y	/;"	d
DSIPORTA_LANE3X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE3X	/;"	d
DSIPORTA_LANE3Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE3Y	/;"	d
DSIPORTA_LANE4X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE4X	/;"	d
DSIPORTA_LANE4Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_LANE4Y	/;"	d
DSIPORTA_TE0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTA_TE0	/;"	d
DSIPORTC_LANE0X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE0X	/;"	d
DSIPORTC_LANE0Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE0Y	/;"	d
DSIPORTC_LANE1X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE1X	/;"	d
DSIPORTC_LANE1Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE1Y	/;"	d
DSIPORTC_LANE2X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE2X	/;"	d
DSIPORTC_LANE2Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE2Y	/;"	d
DSIPORTC_LANE3X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE3X	/;"	d
DSIPORTC_LANE3Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE3Y	/;"	d
DSIPORTC_LANE4X	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE4X	/;"	d
DSIPORTC_LANE4Y	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_LANE4Y	/;"	d
DSIPORTC_TE0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define DSIPORTC_TE0	/;"	d
DSISR	arch/powerpc/include/asm/processor.h	/^#define DSISR	/;"	d
DSIZE	drivers/net/natsemi.c	/^#define DSIZE	/;"	d	file:
DSIZE	drivers/net/ns8382x.c	/^#define DSIZE /;"	d	file:
DSI_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define	DSI_ENABLE	/;"	d
DSItype	arch/nios2/lib/libgcc.c	/^typedef unsigned long long DSItype;$/;"	t	typeref:typename:unsigned long long	file:
DSLLV	arch/sh/include/asm/cpu_sh7722.h	/^#define DSLLV /;"	d
DSLPD	arch/sh/include/asm/cpu_sh7722.h	/^#define DSLPD /;"	d
DSP	include/sym53c8xx.h	/^#define DSP	/;"	d
DSPCFG	drivers/net/natsemi.c	/^	DSPCFG		= 0xF4,$/;"	e	enum:register_offsets	file:
DSPI1_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define DSPI1_BASE_ADDR	/;"	d
DSPI1_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define DSPI1_BASE_ADDR	/;"	d
DSPIC_FW_VERSION_REG	post/board/lwmon5/dspic.c	/^#define DSPIC_FW_VERSION_REG	/;"	d	file:
DSPIC_PON_INV_STATUS_REG	board/liebherr/lwmon5/kbd.c	/^#define DSPIC_PON_INV_STATUS_REG /;"	d	file:
DSPIC_PON_KEY_REG	board/liebherr/lwmon5/kbd.c	/^#define DSPIC_PON_KEY_REG	/;"	d	file:
DSPIC_PON_STATUS_REG	board/liebherr/lwmon5/kbd.c	/^#define DSPIC_PON_STATUS_REG	/;"	d	file:
DSPIC_POST_ERROR_REG	post/board/lwmon5/dspic.c	/^#define DSPIC_POST_ERROR_REG	/;"	d	file:
DSPIC_SYS_ERROR_REG	post/board/lwmon5/dspic.c	/^#define DSPIC_SYS_ERROR_REG	/;"	d	file:
DSPIC_SYS_VERSION_REG	post/board/lwmon5/dspic.c	/^#define DSPIC_SYS_VERSION_REG	/;"	d	file:
DSPID	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DSPID /;"	d
DSPI_CTAR	include/fsl_dspi.h	/^#define DSPI_CTAR(/;"	d
DSPI_CTAR_ASC	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_ASC(/;"	d
DSPI_CTAR_ASC	include/fsl_dspi.h	/^#define DSPI_CTAR_ASC(/;"	d
DSPI_CTAR_BR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_BR(/;"	d
DSPI_CTAR_BR	include/fsl_dspi.h	/^#define DSPI_CTAR_BR(/;"	d
DSPI_CTAR_CPHA	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_CPHA	/;"	d
DSPI_CTAR_CPHA	include/fsl_dspi.h	/^#define DSPI_CTAR_CPHA	/;"	d
DSPI_CTAR_CPOL	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_CPOL	/;"	d
DSPI_CTAR_CPOL	include/fsl_dspi.h	/^#define DSPI_CTAR_CPOL	/;"	d
DSPI_CTAR_CSSCK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_CSSCK(/;"	d
DSPI_CTAR_CSSCK	include/fsl_dspi.h	/^#define DSPI_CTAR_CSSCK(/;"	d
DSPI_CTAR_DBR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_DBR	/;"	d
DSPI_CTAR_DBR	include/fsl_dspi.h	/^#define DSPI_CTAR_DBR	/;"	d
DSPI_CTAR_DEFAULT_VALUE	drivers/spi/fsl_dspi.c	/^#define DSPI_CTAR_DEFAULT_VALUE	/;"	d	file:
DSPI_CTAR_DT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_DT(/;"	d
DSPI_CTAR_DT	include/fsl_dspi.h	/^#define DSPI_CTAR_DT(/;"	d
DSPI_CTAR_LSBFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_LSBFE	/;"	d
DSPI_CTAR_LSBFE	include/fsl_dspi.h	/^#define DSPI_CTAR_LSBFE	/;"	d
DSPI_CTAR_PASC	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PASC(/;"	d
DSPI_CTAR_PASC	include/fsl_dspi.h	/^#define DSPI_CTAR_PASC(/;"	d
DSPI_CTAR_PASC_1CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PASC_1CLK	/;"	d
DSPI_CTAR_PASC_1CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PASC_1CLK	/;"	d
DSPI_CTAR_PASC_3CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PASC_3CLK	/;"	d
DSPI_CTAR_PASC_3CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PASC_3CLK	/;"	d
DSPI_CTAR_PASC_5CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PASC_5CLK	/;"	d
DSPI_CTAR_PASC_5CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PASC_5CLK	/;"	d
DSPI_CTAR_PASC_7CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PASC_7CLK	/;"	d
DSPI_CTAR_PASC_7CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PASC_7CLK	/;"	d
DSPI_CTAR_PBR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PBR(/;"	d
DSPI_CTAR_PBR	include/fsl_dspi.h	/^#define DSPI_CTAR_PBR(/;"	d
DSPI_CTAR_PBR_1CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PBR_1CLK	/;"	d
DSPI_CTAR_PBR_1CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PBR_1CLK	/;"	d
DSPI_CTAR_PBR_3CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PBR_3CLK	/;"	d
DSPI_CTAR_PBR_3CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PBR_3CLK	/;"	d
DSPI_CTAR_PBR_5CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PBR_5CLK	/;"	d
DSPI_CTAR_PBR_5CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PBR_5CLK	/;"	d
DSPI_CTAR_PBR_7CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PBR_7CLK	/;"	d
DSPI_CTAR_PBR_7CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PBR_7CLK	/;"	d
DSPI_CTAR_PCSSCK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PCSSCK(/;"	d
DSPI_CTAR_PCSSCK	include/fsl_dspi.h	/^#define DSPI_CTAR_PCSSCK(/;"	d
DSPI_CTAR_PCSSCK_1CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PCSSCK_1CLK	/;"	d
DSPI_CTAR_PCSSCK_1CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PCSSCK_1CLK	/;"	d
DSPI_CTAR_PCSSCK_3CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PCSSCK_3CLK	/;"	d
DSPI_CTAR_PCSSCK_3CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PCSSCK_3CLK	/;"	d
DSPI_CTAR_PCSSCK_5CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PCSSCK_5CLK	/;"	d
DSPI_CTAR_PCSSCK_5CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PCSSCK_5CLK	/;"	d
DSPI_CTAR_PCSSCK_7CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PCSSCK_7CLK	/;"	d
DSPI_CTAR_PCSSCK_7CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PCSSCK_7CLK	/;"	d
DSPI_CTAR_PDT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PDT(/;"	d
DSPI_CTAR_PDT	include/fsl_dspi.h	/^#define DSPI_CTAR_PDT(/;"	d
DSPI_CTAR_PDT_1CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PDT_1CLK	/;"	d
DSPI_CTAR_PDT_1CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PDT_1CLK	/;"	d
DSPI_CTAR_PDT_3CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PDT_3CLK	/;"	d
DSPI_CTAR_PDT_3CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PDT_3CLK	/;"	d
DSPI_CTAR_PDT_5CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PDT_5CLK	/;"	d
DSPI_CTAR_PDT_5CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PDT_5CLK	/;"	d
DSPI_CTAR_PDT_7CLK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_PDT_7CLK	/;"	d
DSPI_CTAR_PDT_7CLK	include/fsl_dspi.h	/^#define DSPI_CTAR_PDT_7CLK	/;"	d
DSPI_CTAR_SET_MODE_MASK	drivers/spi/fsl_dspi.c	/^#define DSPI_CTAR_SET_MODE_MASK	/;"	d	file:
DSPI_CTAR_TRSZ	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_CTAR_TRSZ(/;"	d
DSPI_CTAR_TRSZ	include/fsl_dspi.h	/^#define DSPI_CTAR_TRSZ(/;"	d
DSPI_FLAG_REGMAP_ENDIAN_BIG	drivers/spi/fsl_dspi.c	/^#define DSPI_FLAG_REGMAP_ENDIAN_BIG	/;"	d	file:
DSPI_IDLE_VAL	drivers/spi/fsl_dspi.c	/^#define DSPI_IDLE_VAL	/;"	d	file:
DSPI_IRSR_EOQFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_EOQFE	/;"	d
DSPI_IRSR_EOQFE	include/fsl_dspi.h	/^#define DSPI_IRSR_EOQFE	/;"	d
DSPI_IRSR_RFDFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_RFDFE	/;"	d
DSPI_IRSR_RFDFE	include/fsl_dspi.h	/^#define DSPI_IRSR_RFDFE	/;"	d
DSPI_IRSR_RFDFS	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_RFDFS	/;"	d
DSPI_IRSR_RFDFS	include/fsl_dspi.h	/^#define DSPI_IRSR_RFDFS	/;"	d
DSPI_IRSR_RFOFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_RFOFE	/;"	d
DSPI_IRSR_RFOFE	include/fsl_dspi.h	/^#define DSPI_IRSR_RFOFE	/;"	d
DSPI_IRSR_TCFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_TCFE	/;"	d
DSPI_IRSR_TCFE	include/fsl_dspi.h	/^#define DSPI_IRSR_TCFE	/;"	d
DSPI_IRSR_TFFFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_TFFFE	/;"	d
DSPI_IRSR_TFFFE	include/fsl_dspi.h	/^#define DSPI_IRSR_TFFFE	/;"	d
DSPI_IRSR_TFFFS	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_TFFFS	/;"	d
DSPI_IRSR_TFFFS	include/fsl_dspi.h	/^#define DSPI_IRSR_TFFFS	/;"	d
DSPI_IRSR_TFUFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_IRSR_TFUFE	/;"	d
DSPI_IRSR_TFUFE	include/fsl_dspi.h	/^#define DSPI_IRSR_TFUFE	/;"	d
DSPI_MCR_CRXF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CRXF	/;"	d
DSPI_MCR_CRXF	include/fsl_dspi.h	/^#define DSPI_MCR_CRXF	/;"	d
DSPI_MCR_CSCK	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSCK	/;"	d
DSPI_MCR_CSCK	include/fsl_dspi.h	/^#define DSPI_MCR_CSCK	/;"	d
DSPI_MCR_CSIS0	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS0	/;"	d
DSPI_MCR_CSIS0	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS0	/;"	d
DSPI_MCR_CSIS1	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS1	/;"	d
DSPI_MCR_CSIS1	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS1	/;"	d
DSPI_MCR_CSIS2	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS2	/;"	d
DSPI_MCR_CSIS2	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS2	/;"	d
DSPI_MCR_CSIS3	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS3	/;"	d
DSPI_MCR_CSIS3	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS3	/;"	d
DSPI_MCR_CSIS4	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS4	/;"	d
DSPI_MCR_CSIS4	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS4	/;"	d
DSPI_MCR_CSIS5	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS5	/;"	d
DSPI_MCR_CSIS5	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS5	/;"	d
DSPI_MCR_CSIS6	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS6	/;"	d
DSPI_MCR_CSIS6	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS6	/;"	d
DSPI_MCR_CSIS7	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CSIS7	/;"	d
DSPI_MCR_CSIS7	include/fsl_dspi.h	/^#define DSPI_MCR_CSIS7	/;"	d
DSPI_MCR_CTXF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_CTXF	/;"	d
DSPI_MCR_CTXF	include/fsl_dspi.h	/^#define DSPI_MCR_CTXF	/;"	d
DSPI_MCR_DCONF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_DCONF(/;"	d
DSPI_MCR_DCONF	include/fsl_dspi.h	/^#define DSPI_MCR_DCONF(/;"	d
DSPI_MCR_DOZE	include/fsl_dspi.h	/^#define DSPI_MCR_DOZE	/;"	d
DSPI_MCR_DRXF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_DRXF	/;"	d
DSPI_MCR_DRXF	include/fsl_dspi.h	/^#define DSPI_MCR_DRXF	/;"	d
DSPI_MCR_DTXF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_DTXF	/;"	d
DSPI_MCR_DTXF	include/fsl_dspi.h	/^#define DSPI_MCR_DTXF	/;"	d
DSPI_MCR_FCPCS	include/fsl_dspi.h	/^#define DSPI_MCR_FCPCS	/;"	d
DSPI_MCR_FRZ	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_FRZ	/;"	d
DSPI_MCR_FRZ	include/fsl_dspi.h	/^#define DSPI_MCR_FRZ	/;"	d
DSPI_MCR_HALT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_HALT	/;"	d
DSPI_MCR_HALT	include/fsl_dspi.h	/^#define DSPI_MCR_HALT	/;"	d
DSPI_MCR_MDIS	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_MDIS	/;"	d
DSPI_MCR_MDIS	include/fsl_dspi.h	/^#define DSPI_MCR_MDIS	/;"	d
DSPI_MCR_MSTR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_MSTR	/;"	d
DSPI_MCR_MSTR	include/fsl_dspi.h	/^#define DSPI_MCR_MSTR	/;"	d
DSPI_MCR_MTFE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_MTFE	/;"	d
DSPI_MCR_MTFE	include/fsl_dspi.h	/^#define DSPI_MCR_MTFE	/;"	d
DSPI_MCR_PCSIS	include/fsl_dspi.h	/^#define DSPI_MCR_PCSIS(/;"	d
DSPI_MCR_PCSIS_MASK	include/fsl_dspi.h	/^#define DSPI_MCR_PCSIS_MASK	/;"	d
DSPI_MCR_PCSSE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_PCSSE	/;"	d
DSPI_MCR_PCSSE	include/fsl_dspi.h	/^#define DSPI_MCR_PCSSE	/;"	d
DSPI_MCR_PES	include/fsl_dspi.h	/^#define DSPI_MCR_PES	/;"	d
DSPI_MCR_ROOE	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_ROOE	/;"	d
DSPI_MCR_ROOE	include/fsl_dspi.h	/^#define DSPI_MCR_ROOE	/;"	d
DSPI_MCR_SMPL_PT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_MCR_SMPL_PT(/;"	d
DSPI_MCR_SMPL_PT	include/fsl_dspi.h	/^#define DSPI_MCR_SMPL_PT(/;"	d
DSPI_RFDR_RXDATA	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_RFDR_RXDATA(/;"	d
DSPI_RFDR_RXDATA	include/fsl_dspi.h	/^#define DSPI_RFDR_RXDATA(/;"	d
DSPI_RFR_RXDATA	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_RFR_RXDATA(/;"	d
DSPI_RFR_RXDATA	include/fsl_dspi.h	/^#define DSPI_RFR_RXDATA(/;"	d
DSPI_SR_EOQF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_EOQF	/;"	d
DSPI_SR_EOQF	include/fsl_dspi.h	/^#define DSPI_SR_EOQF	/;"	d
DSPI_SR_RFDF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_RFDF	/;"	d
DSPI_SR_RFDF	include/fsl_dspi.h	/^#define DSPI_SR_RFDF	/;"	d
DSPI_SR_RFOF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_RFOF	/;"	d
DSPI_SR_RFOF	include/fsl_dspi.h	/^#define DSPI_SR_RFOF	/;"	d
DSPI_SR_RXCTR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_RXCTR(/;"	d
DSPI_SR_RXCTR	include/fsl_dspi.h	/^#define DSPI_SR_RXCTR(/;"	d
DSPI_SR_RXPTR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_RXPTR(/;"	d
DSPI_SR_RXPTR	include/fsl_dspi.h	/^#define DSPI_SR_RXPTR(/;"	d
DSPI_SR_TCF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_TCF	/;"	d
DSPI_SR_TCF	include/fsl_dspi.h	/^#define DSPI_SR_TCF	/;"	d
DSPI_SR_TFFF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_TFFF	/;"	d
DSPI_SR_TFFF	include/fsl_dspi.h	/^#define DSPI_SR_TFFF	/;"	d
DSPI_SR_TFUF	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_TFUF	/;"	d
DSPI_SR_TFUF	include/fsl_dspi.h	/^#define DSPI_SR_TFUF	/;"	d
DSPI_SR_TXCTR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_TXCTR(/;"	d
DSPI_SR_TXCTR	include/fsl_dspi.h	/^#define DSPI_SR_TXCTR(/;"	d
DSPI_SR_TXPTR	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_TXPTR(/;"	d
DSPI_SR_TXPTR	include/fsl_dspi.h	/^#define DSPI_SR_TXPTR(/;"	d
DSPI_SR_TXRXS	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_SR_TXRXS	/;"	d
DSPI_SR_TXRXS	include/fsl_dspi.h	/^#define DSPI_SR_TXRXS	/;"	d
DSPI_TCR_SPI_TCNT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TCR_SPI_TCNT(/;"	d
DSPI_TCR_SPI_TCNT	include/fsl_dspi.h	/^#define DSPI_TCR_SPI_TCNT(/;"	d
DSPI_TFDR_TXCMD	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFDR_TXCMD(/;"	d
DSPI_TFDR_TXCMD	include/fsl_dspi.h	/^#define DSPI_TFDR_TXCMD(/;"	d
DSPI_TFDR_TXDATA	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFDR_TXDATA(/;"	d
DSPI_TFDR_TXDATA	include/fsl_dspi.h	/^#define DSPI_TFDR_TXDATA(/;"	d
DSPI_TFR_CONT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CONT	/;"	d
DSPI_TFR_CONT	include/fsl_dspi.h	/^#define DSPI_TFR_CONT	/;"	d
DSPI_TFR_CS0	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS0	/;"	d
DSPI_TFR_CS0	include/fsl_dspi.h	/^#define DSPI_TFR_CS0	/;"	d
DSPI_TFR_CS1	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS1	/;"	d
DSPI_TFR_CS1	include/fsl_dspi.h	/^#define DSPI_TFR_CS1	/;"	d
DSPI_TFR_CS2	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS2	/;"	d
DSPI_TFR_CS2	include/fsl_dspi.h	/^#define DSPI_TFR_CS2	/;"	d
DSPI_TFR_CS3	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS3	/;"	d
DSPI_TFR_CS3	include/fsl_dspi.h	/^#define DSPI_TFR_CS3	/;"	d
DSPI_TFR_CS4	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS4	/;"	d
DSPI_TFR_CS4	include/fsl_dspi.h	/^#define DSPI_TFR_CS4	/;"	d
DSPI_TFR_CS5	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS5	/;"	d
DSPI_TFR_CS5	include/fsl_dspi.h	/^#define DSPI_TFR_CS5	/;"	d
DSPI_TFR_CS6	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS6	/;"	d
DSPI_TFR_CS6	include/fsl_dspi.h	/^#define DSPI_TFR_CS6	/;"	d
DSPI_TFR_CS7	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CS7	/;"	d
DSPI_TFR_CS7	include/fsl_dspi.h	/^#define DSPI_TFR_CS7	/;"	d
DSPI_TFR_CTAS	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CTAS(/;"	d
DSPI_TFR_CTAS	include/fsl_dspi.h	/^#define DSPI_TFR_CTAS(/;"	d
DSPI_TFR_CTCNT	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_CTCNT	/;"	d
DSPI_TFR_CTCNT	include/fsl_dspi.h	/^#define DSPI_TFR_CTCNT	/;"	d
DSPI_TFR_EOQ	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_EOQ	/;"	d
DSPI_TFR_EOQ	include/fsl_dspi.h	/^#define DSPI_TFR_EOQ	/;"	d
DSPI_TFR_PCS	include/fsl_dspi.h	/^#define DSPI_TFR_PCS(/;"	d
DSPI_TFR_TXDATA	arch/m68k/include/asm/coldfire/dspi.h	/^#define DSPI_TFR_TXDATA(/;"	d
DSPI_TFR_TXDATA	include/fsl_dspi.h	/^#define DSPI_TFR_TXDATA(/;"	d
DSPI_TXRX_WAIT_TIMEOUT	drivers/spi/fsl_dspi.c	/^#define DSPI_TXRX_WAIT_TIMEOUT	/;"	d	file:
DSPS	include/sym53c8xx.h	/^#define DSPS	/;"	d
DSP_PLLDIV	arch/arm/mach-davinci/cpu.c	/^#define DSP_PLLDIV	/;"	d	file:
DSP_STATUS_REG	post/board/lwmon5/dsp.c	/^#define DSP_STATUS_REG	/;"	d	file:
DSREF_DIABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define DSREF_DIABLE	/;"	d
DSREF_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define DSREF_EN	/;"	d
DSR_CAF	drivers/rtc/imxdi.c	/^#define DSR_CAF	/;"	d	file:
DSR_NVF	drivers/rtc/imxdi.c	/^#define DSR_NVF	/;"	d	file:
DSR_SVF	drivers/rtc/imxdi.c	/^#define DSR_SVF	/;"	d	file:
DSR_WBF	drivers/rtc/imxdi.c	/^#define DSR_WBF	/;"	d	file:
DSR_WCF	drivers/rtc/imxdi.c	/^#define DSR_WCF	/;"	d	file:
DSR_WEF	drivers/rtc/imxdi.c	/^#define DSR_WEF	/;"	d	file:
DSR_WNF	drivers/rtc/imxdi.c	/^#define DSR_WNF	/;"	d	file:
DSS_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define DSS_CLKCTRL_OPTFCLKEN_MASK	/;"	d
DSS_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define DSS_CLKCTRL_OPTFCLKEN_MASK	/;"	d
DSS_H	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_H$/;"	d
DSS_HBP	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_HBP(/;"	d
DSS_HFP	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_HFP(/;"	d
DSS_HSW	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_HSW(/;"	d
DSS_IEO	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_IEO	/;"	d
DSS_IHS	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_IHS	/;"	d
DSS_IPC	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_IPC	/;"	d
DSS_IVS	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_IVS	/;"	d
DSS_ONOFF	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_ONOFF	/;"	d
DSS_RESETDONE	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_RESETDONE	/;"	d
DSS_SOFTRESET	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_SOFTRESET	/;"	d
DSS_VBP	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_VBP(/;"	d
DSS_VFP	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_VFP(/;"	d
DSS_VSW	arch/arm/include/asm/arch-omap3/dss.h	/^#define DSS_VSW(/;"	d
DSTAT	arch/x86/cpu/quark/smc.h	/^#define DSTAT	/;"	d
DSTAT	include/sym53c8xx.h	/^#define DSTAT	/;"	d
DSTCACHE_CTLSTAT	include/radeon.h	/^#define DSTCACHE_CTLSTAT	/;"	d
DSTCACHE_MODE	include/radeon.h	/^#define DSTCACHE_MODE	/;"	d
DST_15BPP	include/radeon.h	/^#define DST_15BPP	/;"	d
DST_16BPP	include/radeon.h	/^#define DST_16BPP	/;"	d
DST_16BPP_ARGB4444	include/radeon.h	/^#define DST_16BPP_ARGB4444	/;"	d
DST_16BPP_VYUY422	include/radeon.h	/^#define DST_16BPP_VYUY422	/;"	d
DST_16BPP_YVYU422	include/radeon.h	/^#define DST_16BPP_YVYU422	/;"	d
DST_24BPP	include/radeon.h	/^#define DST_24BPP	/;"	d
DST_32BPP	include/radeon.h	/^#define DST_32BPP	/;"	d
DST_32BPP_AYUV444	include/radeon.h	/^#define DST_32BPP_AYUV444	/;"	d
DST_8BPP	include/radeon.h	/^#define DST_8BPP	/;"	d
DST_8BPP_RGB332	include/radeon.h	/^#define DST_8BPP_RGB332	/;"	d
DST_8BPP_RGB8	include/radeon.h	/^#define DST_8BPP_RGB8	/;"	d
DST_8BPP_Y8	include/radeon.h	/^#define DST_8BPP_Y8	/;"	d
DST_BRES_SIGN	include/radeon.h	/^#define DST_BRES_SIGN	/;"	d
DST_HEIGHT_WIDTH	include/radeon.h	/^#define DST_HEIGHT_WIDTH	/;"	d
DST_HOST_BIG_ENDIAN_EN	include/radeon.h	/^#define DST_HOST_BIG_ENDIAN_EN	/;"	d
DST_LAST_PEL	include/radeon.h	/^#define DST_LAST_PEL	/;"	d
DST_LINE_END	include/radeon.h	/^#define DST_LINE_END	/;"	d
DST_LINE_START	include/radeon.h	/^#define DST_LINE_START	/;"	d
DST_OFFSET	include/radeon.h	/^#define DST_OFFSET	/;"	d
DST_OFFSET_MASK	include/radeon.h	/^#define DST_OFFSET_MASK	/;"	d
DST_PITCH_MASK	include/radeon.h	/^#define DST_PITCH_MASK	/;"	d
DST_PITCH_OFFSET	include/radeon.h	/^#define DST_PITCH_OFFSET	/;"	d
DST_POLYLINE_NONLAST	include/radeon.h	/^#define DST_POLYLINE_NONLAST	/;"	d
DST_POLY_EDGE	include/radeon.h	/^#define DST_POLY_EDGE	/;"	d
DST_RASTER_STALL	include/radeon.h	/^#define DST_RASTER_STALL	/;"	d
DST_TRAIL_X_LEFT_TO_RIGHT	include/radeon.h	/^#define DST_TRAIL_X_LEFT_TO_RIGHT	/;"	d
DST_TRAIL_X_RIGHT_TO_LEFT	include/radeon.h	/^#define DST_TRAIL_X_RIGHT_TO_LEFT	/;"	d
DST_TRAP_FILL_LEFT_TO_RIGHT	include/radeon.h	/^#define DST_TRAP_FILL_LEFT_TO_RIGHT	/;"	d
DST_TRAP_FILL_RIGHT_TO_LEFT	include/radeon.h	/^#define DST_TRAP_FILL_RIGHT_TO_LEFT	/;"	d
DST_WIDTH_HEIGHT	include/radeon.h	/^#define DST_WIDTH_HEIGHT	/;"	d
DST_X_LEFT_TO_RIGHT	include/radeon.h	/^#define DST_X_LEFT_TO_RIGHT	/;"	d
DST_X_LEFT_TO_RIGHT_S	include/radeon.h	/^#define DST_X_LEFT_TO_RIGHT_S	/;"	d
DST_X_MAJOR	include/radeon.h	/^#define DST_X_MAJOR	/;"	d
DST_X_MAJOR_S	include/radeon.h	/^#define DST_X_MAJOR_S	/;"	d
DST_X_RIGHT_TO_LEFT	include/radeon.h	/^#define DST_X_RIGHT_TO_LEFT	/;"	d
DST_X_RIGHT_TO_LEFT_S	include/radeon.h	/^#define DST_X_RIGHT_TO_LEFT_S	/;"	d
DST_X_TILE	include/radeon.h	/^#define DST_X_TILE	/;"	d
DST_Y_BOTTOM_TO_TOP	include/radeon.h	/^#define DST_Y_BOTTOM_TO_TOP	/;"	d
DST_Y_BOTTOM_TO_TOP_S	include/radeon.h	/^#define DST_Y_BOTTOM_TO_TOP_S	/;"	d
DST_Y_MAJOR	include/radeon.h	/^#define DST_Y_MAJOR	/;"	d
DST_Y_MAJOR_S	include/radeon.h	/^#define DST_Y_MAJOR_S	/;"	d
DST_Y_TILE	include/radeon.h	/^#define DST_Y_TILE	/;"	d
DST_Y_TOP_TO_BOTTOM	include/radeon.h	/^#define DST_Y_TOP_TO_BOTTOM	/;"	d
DST_Y_TOP_TO_BOTTOM_S	include/radeon.h	/^#define DST_Y_TOP_TO_BOTTOM_S	/;"	d
DST_Y_X	include/radeon.h	/^#define DST_Y_X	/;"	d
DSZ	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define DSZ(/;"	d
DS_ADDS	drivers/usb/host/r8a66597.h	/^#define	  DS_ADDS	/;"	d
DS_CNFG	drivers/usb/host/r8a66597.h	/^#define	  DS_CNFG	/;"	d
DS_DFLT	drivers/usb/host/r8a66597.h	/^#define	  DS_DFLT	/;"	d
DS_MASK	include/bedbug/ppc.h	/^#define DS_MASK /;"	d
DS_OPCODE	include/bedbug/ppc.h	/^#define DS_OPCODE(/;"	d
DS_POWR	drivers/usb/host/r8a66597.h	/^#define	  DS_POWR	/;"	d
DS_SPD_ADDR	drivers/usb/host/r8a66597.h	/^#define	  DS_SPD_ADDR	/;"	d
DS_SPD_CNFG	drivers/usb/host/r8a66597.h	/^#define	  DS_SPD_CNFG	/;"	d
DS_SPD_DFLT	drivers/usb/host/r8a66597.h	/^#define	  DS_SPD_DFLT	/;"	d
DS_SPD_POWR	drivers/usb/host/r8a66597.h	/^#define	  DS_SPD_POWR	/;"	d
DS_SUSP	drivers/usb/host/r8a66597.h	/^#define	  DS_SUSP	/;"	d
DState	lib/bzip2/bzlib_private.h	/^   DState;$/;"	t	typeref:struct:__anon93cbeec40208
DT	drivers/mtd/nand/denali.h	/^#define DT	/;"	d
DTADR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR(/;"	d
DTADR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR0	/;"	d
DTADR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR1	/;"	d
DTADR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR10	/;"	d
DTADR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR11	/;"	d
DTADR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR12	/;"	d
DTADR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR13	/;"	d
DTADR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR14	/;"	d
DTADR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR15	/;"	d
DTADR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR2	/;"	d
DTADR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR3	/;"	d
DTADR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR4	/;"	d
DTADR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR5	/;"	d
DTADR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR6	/;"	d
DTADR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR7	/;"	d
DTADR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR8	/;"	d
DTADR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define DTADR9	/;"	d
DTB	dts/Makefile	/^DTB := $(EXT_DTB)$/;"	m
DTB	dts/Makefile	/^DTB := arch\/$(ARCH)\/dts\/$(DEVICE_TREE).dtb$/;"	m
DTC	Makefile	/^DTC		= dtc$/;"	m
DTCH	drivers/usb/host/r8a66597.h	/^#define	DTCH	/;"	d
DTCHE	drivers/usb/host/r8a66597.h	/^#define	DTCHE	/;"	d
DTCM_SRAM_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define DTCM_SRAM_BASE	/;"	d
DTCP_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DTCP_ARB_BASE_ADDR /;"	d
DTCP_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define DTCP_ARB_END_ADDR /;"	d
DTEST_COMMAND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DTEST_COMMAND /;"	d
DTEST_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DTEST_DATA0 /;"	d
DTEST_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define DTEST_DATA1 /;"	d
DTIM_DTER_CAP	arch/m68k/include/asm/timer.h	/^#define DTIM_DTER_CAP	/;"	d
DTIM_DTER_REF	arch/m68k/include/asm/timer.h	/^#define DTIM_DTER_REF	/;"	d
DTIM_DTMR_CE	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CE(/;"	d
DTIM_DTMR_CE_ANY	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CE_ANY	/;"	d
DTIM_DTMR_CE_FALL	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CE_FALL	/;"	d
DTIM_DTMR_CE_NONE	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CE_NONE	/;"	d
DTIM_DTMR_CE_RISE	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CE_RISE	/;"	d
DTIM_DTMR_CLK	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CLK(/;"	d
DTIM_DTMR_CLK_DIV1	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CLK_DIV1	/;"	d
DTIM_DTMR_CLK_DIV16	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CLK_DIV16	/;"	d
DTIM_DTMR_CLK_DTIN	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CLK_DTIN	/;"	d
DTIM_DTMR_CLK_STOP	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_CLK_STOP	/;"	d
DTIM_DTMR_FRR	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_FRR	/;"	d
DTIM_DTMR_OM	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_OM	/;"	d
DTIM_DTMR_ORRI	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_ORRI	/;"	d
DTIM_DTMR_PS	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_PS(/;"	d
DTIM_DTMR_RST	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_RST	/;"	d
DTIM_DTMR_RST_EN	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_RST_EN	/;"	d
DTIM_DTMR_RST_RST	arch/m68k/include/asm/timer.h	/^#define DTIM_DTMR_RST_RST	/;"	d
DTIM_DTXMR_DMAEN	arch/m68k/include/asm/timer.h	/^#define DTIM_DTXMR_DMAEN	/;"	d
DTIM_DTXMR_MODE16	arch/m68k/include/asm/timer.h	/^#define DTIM_DTXMR_MODE16	/;"	d
DTL	cmd/fdc.c	/^#define DTL	/;"	d	file:
DTLN	drivers/usb/host/r8a66597.h	/^#define	DTLN	/;"	d
DTOUTR	arch/sh/include/asm/cpu_sh7722.h	/^#define DTOUTR /;"	d
DTOUTR	arch/sh/include/asm/cpu_sh7780.h	/^#define	DTOUTR	/;"	d
DTO_15THDTO	arch/arm/include/asm/omap_mmc.h	/^#define DTO_15THDTO	/;"	d
DTO_MASK	arch/arm/include/asm/omap_mmc.h	/^#define DTO_MASK	/;"	d
DTR0	arch/x86/cpu/quark/smc.h	/^#define DTR0	/;"	d
DTR0_DFREQ_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR0_DFREQ_MASK	/;"	d
DTR0_TCL_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR0_TCL_MASK	/;"	d
DTR0_TRCD_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR0_TRCD_MASK	/;"	d
DTR0_TRP_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR0_TRP_MASK	/;"	d
DTR1	arch/x86/cpu/quark/smc.h	/^#define DTR1	/;"	d
DTR1_TCCD_12CLK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TCCD_12CLK	/;"	d
DTR1_TCCD_18CLK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TCCD_18CLK	/;"	d
DTR1_TCCD_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TCCD_MASK	/;"	d
DTR1_TCMD_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TCMD_MASK	/;"	d
DTR1_TFAW_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TFAW_MASK	/;"	d
DTR1_TRAS_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TRAS_MASK	/;"	d
DTR1_TRRD_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TRRD_MASK	/;"	d
DTR1_TRTP_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TRTP_MASK	/;"	d
DTR1_TWCL_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TWCL_MASK	/;"	d
DTR1_TWTP_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR1_TWTP_MASK	/;"	d
DTR2	arch/x86/cpu/quark/smc.h	/^#define DTR2	/;"	d
DTR2_TRRDR_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR2_TRRDR_MASK	/;"	d
DTR2_TRWDR_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR2_TRWDR_MASK	/;"	d
DTR2_TWWDR_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR2_TWWDR_MASK	/;"	d
DTR3	arch/x86/cpu/quark/smc.h	/^#define DTR3	/;"	d
DTR3_TRWSR_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR3_TRWSR_MASK	/;"	d
DTR3_TWRDR_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR3_TWRDR_MASK	/;"	d
DTR3_TWRSR_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR3_TWRSR_MASK	/;"	d
DTR3_TXP_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR3_TXP_MASK	/;"	d
DTR3_TXXXX_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR3_TXXXX_MASK	/;"	d
DTR4	arch/x86/cpu/quark/smc.h	/^#define DTR4	/;"	d
DTR4_ODTDIS	arch/x86/cpu/quark/smc.h	/^#define DTR4_ODTDIS	/;"	d
DTR4_TRGSTRDIS	arch/x86/cpu/quark/smc.h	/^#define DTR4_TRGSTRDIS	/;"	d
DTR4_WRODTSTOP_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR4_WRODTSTOP_MASK	/;"	d
DTR4_WRODTSTRT_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR4_WRODTSTRT_MASK	/;"	d
DTR4_XXXX1_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR4_XXXX1_MASK	/;"	d
DTR4_XXXX2_MASK	arch/x86/cpu/quark/smc.h	/^#define DTR4_XXXX2_MASK	/;"	d
DTT_ADM1021_DEVID	drivers/hwmon/adm1021.c	/^#define DTT_ADM1021_DEVID	/;"	d	file:
DTT_ADR	drivers/hwmon/lm81.c	/^#define DTT_ADR	/;"	d	file:
DTT_AUTOMOTIVE_MAX_TEMP	include/dtt.h	/^#define DTT_AUTOMOTIVE_MAX_TEMP	/;"	d
DTT_COMMERCIAL_MAX_TEMP	include/dtt.h	/^#define DTT_COMMERCIAL_MAX_TEMP	/;"	d
DTT_CONFIG	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG	drivers/hwmon/ds1775.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG	drivers/hwmon/ds620.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG	drivers/hwmon/lm63.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG	drivers/hwmon/lm73.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG	drivers/hwmon/lm75.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG	drivers/hwmon/lm81.c	/^#define DTT_CONFIG	/;"	d	file:
DTT_CONFIG_1SHOT	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_1SHOT	/;"	d	file:
DTT_CONFIG_1SHOT	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_1SHOT	/;"	d	file:
DTT_CONFIG_ALERT_MASKED	drivers/hwmon/adm1021.c	/^#define DTT_CONFIG_ALERT_MASKED	/;"	d	file:
DTT_CONFIG_AUTOC	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_AUTOC	/;"	d	file:
DTT_CONFIG_DONE	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_DONE	/;"	d	file:
DTT_CONFIG_DONE	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_DONE	/;"	d	file:
DTT_CONFIG_NVB	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_NVB	/;"	d	file:
DTT_CONFIG_NVB	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_NVB	/;"	d	file:
DTT_CONFIG_POLARITY	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_POLARITY	/;"	d	file:
DTT_CONFIG_R0	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_R0	/;"	d	file:
DTT_CONFIG_R0	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_R0	/;"	d	file:
DTT_CONFIG_R1	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_R1	/;"	d	file:
DTT_CONFIG_R1	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_R1	/;"	d	file:
DTT_CONFIG_STANDBY	drivers/hwmon/adm1021.c	/^#define DTT_CONFIG_STANDBY	/;"	d	file:
DTT_CONFIG_TEMP	drivers/hwmon/lm81.c	/^#define DTT_CONFIG_TEMP	/;"	d	file:
DTT_CONFIG_THF	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_THF	/;"	d	file:
DTT_CONFIG_THF	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_THF	/;"	d	file:
DTT_CONFIG_TLF	drivers/hwmon/ds1621.c	/^#define DTT_CONFIG_TLF	/;"	d	file:
DTT_CONFIG_TLF	drivers/hwmon/ds620.c	/^#define DTT_CONFIG_TLF	/;"	d	file:
DTT_CONTROL	drivers/hwmon/lm73.c	/^#define DTT_CONTROL	/;"	d	file:
DTT_FAN_CONFIG	drivers/hwmon/lm63.c	/^#define DTT_FAN_CONFIG	/;"	d	file:
DTT_I2C_DEV_CODE	drivers/hwmon/ds1621.c	/^#define DTT_I2C_DEV_CODE /;"	d	file:
DTT_I2C_DEV_CODE	drivers/hwmon/ds1775.c	/^#define DTT_I2C_DEV_CODE	/;"	d	file:
DTT_I2C_DEV_CODE	drivers/hwmon/ds620.c	/^#define DTT_I2C_DEV_CODE	/;"	d	file:
DTT_I2C_DEV_CODE	drivers/hwmon/lm73.c	/^#define DTT_I2C_DEV_CODE /;"	d	file:
DTT_I2C_DEV_CODE	drivers/hwmon/lm75.c	/^#define DTT_I2C_DEV_CODE /;"	d	file:
DTT_I2C_DEV_CODE	drivers/hwmon/lm81.c	/^#define DTT_I2C_DEV_CODE /;"	d	file:
DTT_I2C_LM63_ADDR	drivers/hwmon/lm63.c	/^#define DTT_I2C_LM63_ADDR	/;"	d	file:
DTT_ID	drivers/hwmon/lm73.c	/^#define DTT_ID	/;"	d	file:
DTT_INDUSTRIAL_MAX_TEMP	include/dtt.h	/^#define DTT_INDUSTRIAL_MAX_TEMP	/;"	d
DTT_MANU	drivers/hwmon/lm81.c	/^#define DTT_MANU	/;"	d	file:
DTT_PWM_FREQ	drivers/hwmon/lm63.c	/^#define DTT_PWM_FREQ	/;"	d	file:
DTT_PWM_LOOKUP_BASE	drivers/hwmon/lm63.c	/^#define DTT_PWM_LOOKUP_BASE	/;"	d	file:
DTT_READ_CONFIG	drivers/hwmon/adm1021.c	/^#define DTT_READ_CONFIG	/;"	d	file:
DTT_READ_CONVRATE	drivers/hwmon/adm1021.c	/^#define DTT_READ_CONVRATE	/;"	d	file:
DTT_READ_COUNTER	drivers/hwmon/ds1621.c	/^#define DTT_READ_COUNTER	/;"	d	file:
DTT_READ_DEVID	drivers/hwmon/adm1021.c	/^#define DTT_READ_DEVID	/;"	d	file:
DTT_READ_LOC_HIGHLIM	drivers/hwmon/adm1021.c	/^#define DTT_READ_LOC_HIGHLIM	/;"	d	file:
DTT_READ_LOC_LOWLIM	drivers/hwmon/adm1021.c	/^#define DTT_READ_LOC_LOWLIM	/;"	d	file:
DTT_READ_LOC_VALUE	drivers/hwmon/adm1021.c	/^#define DTT_READ_LOC_VALUE	/;"	d	file:
DTT_READ_REM_HIGHLIM	drivers/hwmon/adm1021.c	/^#define DTT_READ_REM_HIGHLIM	/;"	d	file:
DTT_READ_REM_LOWLIM	drivers/hwmon/adm1021.c	/^#define DTT_READ_REM_LOWLIM	/;"	d	file:
DTT_READ_REM_VALUE	drivers/hwmon/adm1021.c	/^#define DTT_READ_REM_VALUE	/;"	d	file:
DTT_READ_SLOPE	drivers/hwmon/ds1621.c	/^#define DTT_READ_SLOPE	/;"	d	file:
DTT_READ_STATUS	drivers/hwmon/adm1021.c	/^#define DTT_READ_STATUS	/;"	d	file:
DTT_READ_TEMP	drivers/hwmon/ds1621.c	/^#define DTT_READ_TEMP	/;"	d	file:
DTT_READ_TEMP	drivers/hwmon/ds1775.c	/^#define DTT_READ_TEMP	/;"	d	file:
DTT_READ_TEMP	drivers/hwmon/lm73.c	/^#define DTT_READ_TEMP	/;"	d	file:
DTT_READ_TEMP	drivers/hwmon/lm75.c	/^#define DTT_READ_TEMP	/;"	d	file:
DTT_READ_TEMP	drivers/hwmon/lm81.c	/^#define DTT_READ_TEMP	/;"	d	file:
DTT_READ_TEMP_RMT_LSB	drivers/hwmon/lm63.c	/^#define DTT_READ_TEMP_RMT_LSB	/;"	d	file:
DTT_READ_TEMP_RMT_MSB	drivers/hwmon/lm63.c	/^#define DTT_READ_TEMP_RMT_MSB	/;"	d	file:
DTT_REV	drivers/hwmon/lm81.c	/^#define DTT_REV	/;"	d	file:
DTT_START_CONVERT	drivers/hwmon/ds620.c	/^#define DTT_START_CONVERT	/;"	d	file:
DTT_STATUS_BUSY	drivers/hwmon/adm1021.c	/^#define DTT_STATUS_BUSY	/;"	d	file:
DTT_STATUS_LHIGH	drivers/hwmon/adm1021.c	/^#define DTT_STATUS_LHIGH	/;"	d	file:
DTT_STATUS_LLOW	drivers/hwmon/adm1021.c	/^#define DTT_STATUS_LLOW	/;"	d	file:
DTT_STATUS_OPEN	drivers/hwmon/adm1021.c	/^#define DTT_STATUS_OPEN	/;"	d	file:
DTT_STATUS_RHIGH	drivers/hwmon/adm1021.c	/^#define DTT_STATUS_RHIGH	/;"	d	file:
DTT_STATUS_RLOW	drivers/hwmon/adm1021.c	/^#define DTT_STATUS_RLOW	/;"	d	file:
DTT_TACHLIM_LSB	drivers/hwmon/lm63.c	/^#define DTT_TACHLIM_LSB	/;"	d	file:
DTT_TACHLIM_MSB	drivers/hwmon/lm63.c	/^#define DTT_TACHLIM_MSB	/;"	d	file:
DTT_TEMP	drivers/hwmon/ds620.c	/^#define DTT_TEMP	/;"	d	file:
DTT_TEMP_HIGH	drivers/hwmon/ds1621.c	/^#define DTT_TEMP_HIGH	/;"	d	file:
DTT_TEMP_HIGH	drivers/hwmon/lm73.c	/^#define DTT_TEMP_HIGH	/;"	d	file:
DTT_TEMP_HYST	drivers/hwmon/ds1775.c	/^#define DTT_TEMP_HYST	/;"	d	file:
DTT_TEMP_HYST	drivers/hwmon/lm75.c	/^#define DTT_TEMP_HYST	/;"	d	file:
DTT_TEMP_HYST	drivers/hwmon/lm81.c	/^#define DTT_TEMP_HYST	/;"	d	file:
DTT_TEMP_LOW	drivers/hwmon/ds1621.c	/^#define DTT_TEMP_LOW	/;"	d	file:
DTT_TEMP_LOW	drivers/hwmon/lm73.c	/^#define DTT_TEMP_LOW	/;"	d	file:
DTT_TEMP_MAX	drivers/hwmon/lm81.c	/^#define DTT_TEMP_MAX	/;"	d	file:
DTT_TEMP_OS	drivers/hwmon/ds1775.c	/^#define DTT_TEMP_OS	/;"	d	file:
DTT_TEMP_SET	drivers/hwmon/lm75.c	/^#define DTT_TEMP_SET	/;"	d	file:
DTT_WRITE_CONFIG	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_CONFIG	/;"	d	file:
DTT_WRITE_CONVRATE	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_CONVRATE	/;"	d	file:
DTT_WRITE_LOC_HIGHLIM	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_LOC_HIGHLIM	/;"	d	file:
DTT_WRITE_LOC_LOWLIM	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_LOC_LOWLIM	/;"	d	file:
DTT_WRITE_ONESHOT	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_ONESHOT	/;"	d	file:
DTT_WRITE_REM_HIGHLIM	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_REM_HIGHLIM	/;"	d	file:
DTT_WRITE_REM_LOWLIM	drivers/hwmon/adm1021.c	/^#define DTT_WRITE_REM_LOWLIM	/;"	d	file:
DTT_WRITE_START_CONV	drivers/hwmon/ds1621.c	/^#define DTT_WRITE_START_CONV	/;"	d	file:
DTT_WRITE_STOP_CONV	drivers/hwmon/ds1621.c	/^#define DTT_WRITE_STOP_CONV	/;"	d	file:
DTW_1_BITMODE	arch/arm/include/asm/omap_mmc.h	/^#define DTW_1_BITMODE	/;"	d
DTW_4_BITMODE	arch/arm/include/asm/omap_mmc.h	/^#define DTW_4_BITMODE	/;"	d
DTW_8_BITMODE	arch/arm/include/asm/omap_mmc.h	/^#define DTW_8_BITMODE /;"	d
DTXCRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	DTXCRC	/;"	d
DTXPAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	DTXPAD	/;"	d
DTX_BLK_LGTH	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              DTX_BLK_LGTH /;"	d
DTX_DIR	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   DTX_DIR /;"	d
DTX_DMA_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 DTX_DMA_E /;"	d
DTX_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                     DTX_E /;"	d
DTX_MODE	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                  DTX_MODE /;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA114_MC_H	include/dt-bindings/memory/tegra114-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA114_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA124_MC_H	include/dt-bindings/memory/tegra124-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA124_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA210_MC_H	include/dt-bindings/memory/tegra210-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA210_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BINDINGS_MEMORY_TEGRA30_MC_H	include/dt-bindings/memory/tegra30-mc.h	/^#define DT_BINDINGS_MEMORY_TEGRA30_MC_H$/;"	d
DT_BIND_NOW	include/elf.h	/^#define DT_BIND_NOW	/;"	d
DT_BLK	fs/ubifs/ubifs.h	/^#define DT_BLK	/;"	d
DT_BLK	fs/yaffs2/yportenv.h	/^#define DT_BLK	/;"	d
DT_BLK	include/jffs2/jffs2.h	/^    DT_BLK = 6,$/;"	e	enum:__anona226fb330103
DT_BLK	include/jffs2/jffs2.h	/^# define DT_BLK /;"	d
DT_CHR	fs/ubifs/ubifs.h	/^#define DT_CHR	/;"	d
DT_CHR	fs/yaffs2/yportenv.h	/^#define DT_CHR	/;"	d
DT_CHR	include/jffs2/jffs2.h	/^    DT_CHR = 2,$/;"	e	enum:__anona226fb330103
DT_CHR	include/jffs2/jffs2.h	/^# define DT_CHR /;"	d
DT_CLK	drivers/net/dc2114x.c	/^#define DT_CLK	/;"	d	file:
DT_CS	drivers/net/dc2114x.c	/^#define DT_CS	/;"	d	file:
DT_DEBUG	include/elf.h	/^#define DT_DEBUG	/;"	d
DT_DIR	fs/ubifs/ubifs.h	/^#define DT_DIR	/;"	d
DT_DIR	fs/yaffs2/yportenv.h	/^#define DT_DIR	/;"	d
DT_DIR	include/jffs2/jffs2.h	/^    DT_DIR = 4,$/;"	e	enum:__anona226fb330103
DT_DIR	include/jffs2/jffs2.h	/^# define DT_DIR /;"	d
DT_ENCODING	include/elf.h	/^#define DT_ENCODING	/;"	d
DT_FIFO	fs/ubifs/ubifs.h	/^#define DT_FIFO	/;"	d
DT_FIFO	fs/yaffs2/yportenv.h	/^#define DT_FIFO	/;"	d
DT_FIFO	include/jffs2/jffs2.h	/^    DT_FIFO = 1,$/;"	e	enum:__anona226fb330103
DT_FIFO	include/jffs2/jffs2.h	/^# define DT_FIFO /;"	d
DT_FINI	include/elf.h	/^#define DT_FINI	/;"	d
DT_FINI_ARRAY	include/elf.h	/^#define DT_FINI_ARRAY	/;"	d
DT_FINI_ARRAYSZ	include/elf.h	/^#define DT_FINI_ARRAYSZ	/;"	d
DT_FLAGS	include/elf.h	/^#define DT_FLAGS	/;"	d
DT_HASH	include/elf.h	/^#define DT_HASH	/;"	d
DT_HIOS	include/elf.h	/^#define DT_HIOS	/;"	d
DT_HIPROC	include/elf.h	/^#define DT_HIPROC	/;"	d
DT_IN	drivers/net/dc2114x.c	/^#define DT_IN	/;"	d	file:
DT_INIT	include/elf.h	/^#define DT_INIT	/;"	d
DT_INIT_ARRAY	include/elf.h	/^#define DT_INIT_ARRAY	/;"	d
DT_INIT_ARRAYSZ	include/elf.h	/^#define DT_INIT_ARRAYSZ	/;"	d
DT_JMPREL	include/elf.h	/^#define DT_JMPREL	/;"	d
DT_LNK	fs/ubifs/ubifs.h	/^#define DT_LNK	/;"	d
DT_LNK	fs/yaffs2/yportenv.h	/^#define DT_LNK	/;"	d
DT_LNK	include/jffs2/jffs2.h	/^    DT_LNK = 10,$/;"	e	enum:__anona226fb330103
DT_LNK	include/jffs2/jffs2.h	/^# define DT_LNK /;"	d
DT_LOOS	include/elf.h	/^#define DT_LOOS	/;"	d
DT_LOPROC	include/elf.h	/^#define DT_LOPROC	/;"	d
DT_NEEDED	include/elf.h	/^#define DT_NEEDED	/;"	d
DT_NULL	include/elf.h	/^#define DT_NULL	/;"	d
DT_NUM	include/elf.h	/^#define DT_NUM	/;"	d
DT_PLTGOT	include/elf.h	/^#define DT_PLTGOT	/;"	d
DT_PLTREL	include/elf.h	/^#define DT_PLTREL	/;"	d
DT_PLTRELSZ	include/elf.h	/^#define DT_PLTRELSZ	/;"	d
DT_PREINIT_ARRAY	include/elf.h	/^#define DT_PREINIT_ARRAY /;"	d
DT_PREINIT_ARRAYSZ	include/elf.h	/^#define DT_PREINIT_ARRAYSZ /;"	d
DT_REG	fs/ubifs/ubifs.h	/^#define DT_REG	/;"	d
DT_REG	fs/yaffs2/yportenv.h	/^#define DT_REG	/;"	d
DT_REG	include/jffs2/jffs2.h	/^    DT_REG = 8,$/;"	e	enum:__anona226fb330103
DT_REG	include/jffs2/jffs2.h	/^# define DT_REG /;"	d
DT_REG_PIO_T1	drivers/block/ftide020.h	/^#define DT_REG_PIO_T1(/;"	d
DT_REG_PIO_T2	drivers/block/ftide020.h	/^#define DT_REG_PIO_T2(/;"	d
DT_REG_PIO_T4	drivers/block/ftide020.h	/^#define DT_REG_PIO_T4(/;"	d
DT_REG_PIO_TEOC	drivers/block/ftide020.h	/^#define DT_REG_PIO_TEOC(/;"	d
DT_REG_UDMA_TACK	drivers/block/ftide020.h	/^#define DT_REG_UDMA_TACK(/;"	d
DT_REG_UDMA_TCVS	drivers/block/ftide020.h	/^#define DT_REG_UDMA_TCVS(/;"	d
DT_REG_UDMA_TCYC	drivers/block/ftide020.h	/^#define DT_REG_UDMA_TCYC(/;"	d
DT_REG_UDMA_TENV	drivers/block/ftide020.h	/^#define DT_REG_UDMA_TENV(/;"	d
DT_REG_UDMA_TMLI	drivers/block/ftide020.h	/^#define DT_REG_UDMA_TMLI(/;"	d
DT_REG_UDMA_TRP	drivers/block/ftide020.h	/^#define DT_REG_UDMA_TRP(/;"	d
DT_REL	include/elf.h	/^#define DT_REL	/;"	d
DT_RELA	include/elf.h	/^#define DT_RELA	/;"	d
DT_RELAENT	include/elf.h	/^#define DT_RELAENT	/;"	d
DT_RELASZ	include/elf.h	/^#define DT_RELASZ	/;"	d
DT_RELENT	include/elf.h	/^#define DT_RELENT	/;"	d
DT_RELSZ	include/elf.h	/^#define DT_RELSZ	/;"	d
DT_RPATH	include/elf.h	/^#define DT_RPATH	/;"	d
DT_RUNPATH	include/elf.h	/^#define DT_RUNPATH	/;"	d
DT_SOCK	fs/ubifs/ubifs.h	/^#define DT_SOCK	/;"	d
DT_SOCK	fs/yaffs2/yportenv.h	/^#define DT_SOCK	/;"	d
DT_SOCK	include/jffs2/jffs2.h	/^    DT_SOCK = 12,$/;"	e	enum:__anona226fb330103
DT_SOCK	include/jffs2/jffs2.h	/^# define DT_SOCK /;"	d
DT_SONAME	include/elf.h	/^#define DT_SONAME	/;"	d
DT_STOR_IDE	include/api_public.h	/^#define DT_STOR_IDE	/;"	d
DT_STOR_MMC	include/api_public.h	/^#define DT_STOR_MMC	/;"	d
DT_STOR_SATA	include/api_public.h	/^#define DT_STOR_SATA	/;"	d
DT_STOR_SCSI	include/api_public.h	/^#define DT_STOR_SCSI	/;"	d
DT_STOR_USB	include/api_public.h	/^#define DT_STOR_USB	/;"	d
DT_STRSZ	include/elf.h	/^#define DT_STRSZ	/;"	d
DT_STRTAB	include/elf.h	/^#define DT_STRTAB	/;"	d
DT_SYMBOLIC	include/elf.h	/^#define DT_SYMBOLIC	/;"	d
DT_SYMENT	include/elf.h	/^#define DT_SYMENT	/;"	d
DT_SYMTAB	include/elf.h	/^#define DT_SYMTAB	/;"	d
DT_TEXTREL	include/elf.h	/^#define DT_TEXTREL	/;"	d
DT_UNKNOWN	fs/ubifs/ubifs.h	/^#define DT_UNKNOWN	/;"	d
DT_UNKNOWN	fs/yaffs2/yportenv.h	/^#define DT_UNKNOWN	/;"	d
DT_UNKNOWN	include/jffs2/jffs2.h	/^    DT_UNKNOWN = 0,$/;"	e	enum:__anona226fb330103
DT_UNKNOWN	include/jffs2/jffs2.h	/^# define DT_UNKNOWN /;"	d
DT_WHT	fs/ubifs/ubifs.h	/^#define DT_WHT	/;"	d
DT_WHT	fs/yaffs2/yportenv.h	/^#define DT_WHT	/;"	d
DT_WHT	include/jffs2/jffs2.h	/^    DT_WHT = 14$/;"	e	enum:__anona226fb330103
DT_WHT	include/jffs2/jffs2.h	/^# define DT_WHT /;"	d
DU0_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK,$/;"	e	enum:__anona307901d0103	file:
DU0_DB0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB2_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB3_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB4_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB5_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB6_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DB7_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG0_DATA8_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG1_DATA9_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG2_C6_DATA10_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG3_C7_DATA11_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG4_Y0_DATA12_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG5_Y1_DATA13_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG6_Y2_DATA14_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DG7_Y3_DATA15_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK,$/;"	e	enum:__anona307901d0103	file:
DU0_DOTCLKOUT_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
DU0_DR0_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR1_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR2_Y4_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR3_Y5_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR4_Y6_DATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR5_Y7_DATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR6_Y8_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_DR7_Y9_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_EXHSYNC_DU0_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CC50_STATE29_MARK,$/;"	e	enum:__anona307901d0103	file:
DU0_EXVSYNC_DU0_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
DU0_EXVSYNC_DU0_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK, CC50_STATE28_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_CDE_MARK, SSI_SDATA7_MARK, SCIFA2_TXD_B_MARK, IRQ8_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DB2_C0_DATA12_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DB3_C1_DATA13_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DB4_C2_DATA14_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DB5_C3_DATA15_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DB6_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DB7_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DG2_C6_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DG3_C7_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DG4_Y0_DATA8_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DG5_Y1_DATA9_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DG6_Y2_DATA10_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DG7_Y3_DATA11_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DISP_MARK, SSI_WS78_MARK, SCIFA2_RXD_B_MARK, IIC0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DOTCLKIN_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
DU1_DOTCLKIN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,$/;"	e	enum:__anona3077f190103	file:
DU1_DOTCLKOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS5_MARK, SCIFA3_RXD_MARK, I2C3_SCL_C_MARK, DU1_DOTCLKOUT0_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DOTCLKOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DOTCLKOUT1_MARK, CAN_DEBUGOUT12_MARK, SSI_SCK6_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DOTCLKOUT_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,$/;"	e	enum:__anona3077f190103	file:
DU1_DR0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DR0_MARK, RIF1_SYNC_B_MARK, TS_SDATA_D_MARK, TPUTO1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DR1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DR2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C2_SCL_C_MARK, DU1_DR2_MARK, RIF1_D0_B_MARK, TS_SDEN_D_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_DR2_Y4_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DR3_Y5_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DR4_Y6_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DR5_Y7_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DR6_DATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_DR7_DATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_EXHSYNC_DU1_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_EXHSYNC_DU1_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA1_SCK_B_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, CAN_DEBUGOUT13_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA1_TXD_B_MARK, I2C4_SDA_C_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,$/;"	e	enum:__anona307901d0103	file:
DU1_EXVSYNC_DU1_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
DU1_EXVSYNC_DU1_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_EXVSYNC_DU1_VSYNC_MARK, CAN_DEBUGOUT14_MARK, SSI_SDATA6_MARK,$/;"	e	enum:__anona307901d0103	file:
DU2_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DB7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG6_MARK, LCDOUT14_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DG7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_DR7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_EXHSYNC_DU2_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,$/;"	e	enum:__anona3077f190103	file:
DU2_EXVSYNC_DU2_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK,$/;"	e	enum:__anona3077f190103	file:
DUART0_BA	include/configs/PLU405.h	/^#define DUART0_BA	/;"	d
DUART1_BA	include/configs/PLU405.h	/^#define DUART1_BA	/;"	d
DUMMYUNIONNAME	include/pe.h	/^	} DUMMYUNIONNAME;$/;"	m	struct:_IMAGE_RELOCATION	typeref:union:_IMAGE_RELOCATION::__anon69e06b43020a
DUMMY_A	board/renesas/ecovec/lowlevel_init.S	/^DUMMY_A:	.long	0x0c400000$/;"	l
DUMMY_ADDR	board/renesas/sh7752evb/lowlevel_init.S	/^DUMMY_ADDR:		.long	0xa0000000$/;"	l
DUMMY_ADDR	board/renesas/sh7753evb/lowlevel_init.S	/^DUMMY_ADDR:		.long	0xa0000000$/;"	l
DUMMY_ADDR	board/renesas/sh7757lcr/lowlevel_init.S	/^DUMMY_ADDR:		.long	0xa0000000$/;"	l
DUMMY_ADDR	board/renesas/sh7785lcr/lowlevel_init.S	/^DUMMY_ADDR:	.long	0xa0000000$/;"	l
DUMMY_ERROR	lib/lzma/LzmaDec.c	/^  DUMMY_ERROR, \/* unexpected end of input stream *\/$/;"	e	enum:__anon7c0cd23f0103	file:
DUMMY_LIT	lib/lzma/LzmaDec.c	/^  DUMMY_LIT,$/;"	e	enum:__anon7c0cd23f0103	file:
DUMMY_MATCH	lib/lzma/LzmaDec.c	/^  DUMMY_MATCH,$/;"	e	enum:__anon7c0cd23f0103	file:
DUMMY_REP	lib/lzma/LzmaDec.c	/^  DUMMY_REP$/;"	e	enum:__anon7c0cd23f0103	file:
DUMMY_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^DUMMY_VAL:$/;"	l
DUMMY_WORD	drivers/fpga/zynqmppl.c	/^#define DUMMY_WORD	/;"	d	file:
DUMMY_WORD	drivers/fpga/zynqpl.c	/^#define DUMMY_WORD	/;"	d	file:
DUMP	drivers/rtc/ds1302.c	/^#  define DUMP(/;"	d	file:
DUMP	drivers/rtc/ds1302.c	/^static inline void DUMP(const char *ptr, int num)$/;"	f	typeref:typename:void	file:
DUMP_DDR_CONFIG	arch/arm/mach-keystone/ddr3_spd.c	/^#define DUMP_DDR_CONFIG	/;"	d	file:
DUMP_REG	drivers/video/tegra124/sor.c	/^#define DUMP_REG(/;"	d	file:
DUNIT_CONTROL_HIGH_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DUNIT_CONTROL_HIGH_REG	/;"	d
DUNIT_MMASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DUNIT_MMASK_REG	/;"	d
DUNIT_ODT_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define DUNIT_ODT_CONTROL_REG	/;"	d
DUNIT_SPD	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DUNIT_SPD$/;"	d
DUNIT_STATIC	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define DUNIT_STATIC$/;"	d
DUPLEX_FULL	drivers/qe/uec_phy.h	/^#define DUPLEX_FULL	/;"	d
DUPLEX_FULL	drivers/usb/eth/r8152.h	/^#define DUPLEX_FULL /;"	d
DUPLEX_FULL	include/linux/ethtool.h	/^#define DUPLEX_FULL	/;"	d
DUPLEX_HALF	drivers/qe/uec_phy.h	/^#define DUPLEX_HALF	/;"	d
DUPLEX_HALF	drivers/usb/eth/r8152.h	/^#define DUPLEX_HALF /;"	d
DUPLEX_HALF	include/linux/ethtool.h	/^#define DUPLEX_HALF	/;"	d
DUPLEX_UNKNOWN	drivers/usb/eth/r8152.h	/^#define DUPLEX_UNKNOWN /;"	d
DUPLICATE_ENTRY	drivers/usb/host/xhci.h	/^#define DUPLICATE_ENTRY /;"	d
DURATION_ADDRESS	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	DURATION_ADDRESS = 2,$/;"	e	enum:hws_pattern_duration
DURATION_CONT	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	DURATION_CONT = 4$/;"	e	enum:hws_pattern_duration
DURATION_SINGLE	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	DURATION_SINGLE = 0,$/;"	e	enum:hws_pattern_duration
DURATION_STOP_AT_FAIL	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	DURATION_STOP_AT_FAIL = 1,$/;"	e	enum:hws_pattern_duration
DU_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_CDE_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB0_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB1_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB2_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB3_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB4_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB5_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB6_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DB7_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DB7_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG0_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG1_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG2_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG3_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG4_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG5_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG6_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DG7_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DG7_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DISP_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DOTCLKIN0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK,$/;"	e	enum:__anona3077f190103	file:
DU_DOTCLKIN2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK,$/;"	e	enum:__anona3077f190103	file:
DU_DOTCLKOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DOTCLKOUT0_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DOTCLKOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DOTCLKOUT1_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR0_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR1_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR2_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR3_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR4_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR5_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR6_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_DR7_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_DR7_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_EXHSYNC_DU_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_EXHSYNC_DU_HSYNC_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_EXODDF_DU_ODDF_DISP_CDE_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_EXODDF_DU_ODDF_DISP_CDE_MARK,$/;"	e	enum:__anona307945e0103	file:
DU_EXVSYNC_DU_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DU_EXVSYNC_DU_VSYNC_MARK,$/;"	e	enum:__anona307945e0103	file:
DVA_EQUAL	include/zfs/spa.h	/^#define	DVA_EQUAL(/;"	d
DVA_GET_ASIZE	include/zfs/spa.h	/^#define	DVA_GET_ASIZE(/;"	d
DVA_GET_GANG	include/zfs/spa.h	/^#define	DVA_GET_GANG(/;"	d
DVA_GET_GRID	include/zfs/spa.h	/^#define	DVA_GET_GRID(/;"	d
DVA_GET_VDEV	include/zfs/spa.h	/^#define	DVA_GET_VDEV(/;"	d
DVA_IS_VALID	include/zfs/spa.h	/^#define	DVA_IS_VALID(/;"	d
DVA_OFFSET_TO_PHYS_SECTOR	fs/zfs/zfs.c	/^#define	DVA_OFFSET_TO_PHYS_SECTOR(/;"	d	file:
DVA_SET_ASIZE	include/zfs/spa.h	/^#define	DVA_SET_ASIZE(/;"	d
DVA_SET_GANG	include/zfs/spa.h	/^#define	DVA_SET_GANG(/;"	d
DVA_SET_GRID	include/zfs/spa.h	/^#define	DVA_SET_GRID(/;"	d
DVA_SET_VDEV	include/zfs/spa.h	/^#define	DVA_SET_VDEV(/;"	d
DVC1	arch/powerpc/include/asm/processor.h	/^#define DVC1	/;"	d
DVC2	arch/powerpc/include/asm/processor.h	/^#define DVC2	/;"	d
DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK	/;"	d
DVC_CTRL_REG3_I2C_HW_SW_PROG_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define DVC_CTRL_REG3_I2C_HW_SW_PROG_SHIFT	/;"	d
DVC_MUTE_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,$/;"	e	enum:__anona3077f190103	file:
DVC_MUTE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_TXD_C_MARK, TPUTO0_MARK, CAN_CLK_MARK, DVC_MUTE_MARK,$/;"	e	enum:__anona307901d0103	file:
DVC_MUTE_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	DVC_MUTE_MARK,$/;"	e	enum:__anona307945e0103	file:
DVI	board/compulab/common/omap3_display.c	/^	DVI,$/;"	e	enum:display_type	file:
DVI_BEAGLE_ORANGE_COL	board/ti/beagle/beagle.h	/^#define DVI_BEAGLE_ORANGE_COL	/;"	d
DVI_CUSTOM	board/compulab/common/omap3_display.c	/^	DVI_CUSTOM,$/;"	e	enum:display_type	file:
DVI_I2C_CNTL_1	include/radeon.h	/^#define DVI_I2C_CNTL_1	/;"	d
DVSE	drivers/usb/host/r8a66597.h	/^#define	DVSE	/;"	d
DVSEM_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define DVSEM_RATIO	/;"	d
DVSEM_RATIO	board/samsung/odroid/setup.h	/^#define DVSEM_RATIO(/;"	d
DVSEM_RATIO	board/samsung/trats/setup.h	/^#define DVSEM_RATIO	/;"	d
DVSQ	drivers/usb/host/r8a66597.h	/^#define	DVSQ	/;"	d
DVSQS	drivers/usb/host/r8a66597.h	/^#define	DVSQS	/;"	d
DVST	drivers/usb/host/r8a66597.h	/^#define	DVST	/;"	d
DVSTCTR0	drivers/usb/host/r8a66597.h	/^#define DVSTCTR0	/;"	d
DVSTCTR1	drivers/usb/host/r8a66597.h	/^#define DVSTCTR1	/;"	d
DV_AINTC_INTCTL_IDMODE	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^#define DV_AINTC_INTCTL_IDMODE	/;"	d
DV_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_CLK_MARK,	DV_VSYNC_MARK,	DV_HSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D0_MARK,	DV_D1_MARK,	DV_D2_MARK,	DV_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D8_MARK,	DV_D9_MARK,	DV_D10_MARK,	DV_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D8_MARK,	DV_D9_MARK,	DV_D10_MARK,	DV_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D12_MARK,	DV_D13_MARK,	DV_D14_MARK,	DV_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D12_MARK,	DV_D13_MARK,	DV_D14_MARK,	DV_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D12_MARK,	DV_D13_MARK,	DV_D14_MARK,	DV_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D12_MARK,	DV_D13_MARK,	DV_D14_MARK,	DV_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D0_MARK,	DV_D1_MARK,	DV_D2_MARK,	DV_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D0_MARK,	DV_D1_MARK,	DV_D2_MARK,	DV_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D0_MARK,	DV_D1_MARK,	DV_D2_MARK,	DV_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D4_MARK,	DV_D5_MARK,	DV_D6_MARK,	DV_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D4_MARK,	DV_D5_MARK,	DV_D6_MARK,	DV_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D4_MARK,	DV_D5_MARK,	DV_D6_MARK,	DV_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D4_MARK,	DV_D5_MARK,	DV_D6_MARK,	DV_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D8_MARK,	DV_D9_MARK,	DV_D10_MARK,	DV_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_D9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_D8_MARK,	DV_D9_MARK,	DV_D10_MARK,	DV_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_DDR_BOOTUNLOCK	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_BOOTUNLOCK	/;"	d
DV_DDR_PHY_EXT_STRBEN	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_PHY_EXT_STRBEN	/;"	d
DV_DDR_PHY_PWRDNEN	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_PHY_PWRDNEN	/;"	d
DV_DDR_PHY_RD_LATENCY_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_PHY_RD_LATENCY_SHIFT	/;"	d
DV_DDR_SDCR_BOOTUNLOCK_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_BOOTUNLOCK_SHIFT	/;"	d
DV_DDR_SDCR_BUS_WIDTH_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_BUS_WIDTH_SHIFT	/;"	d
DV_DDR_SDCR_CL_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_CL_SHIFT	/;"	d
DV_DDR_SDCR_DDR2EN_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_DDR2EN_SHIFT	/;"	d
DV_DDR_SDCR_DDR2TERM1_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_DDR2TERM1_SHIFT	/;"	d
DV_DDR_SDCR_DDRDRIVE0_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_DDRDRIVE0_SHIFT	/;"	d
DV_DDR_SDCR_DDRDRIVE1_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_DDRDRIVE1_SHIFT	/;"	d
DV_DDR_SDCR_DDREN_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_DDREN_SHIFT	/;"	d
DV_DDR_SDCR_DDR_DDQS_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_DDR_DDQS_SHIFT	/;"	d
DV_DDR_SDCR_IBANK_POS_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_IBANK_POS_SHIFT	/;"	d
DV_DDR_SDCR_IBANK_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_IBANK_SHIFT	/;"	d
DV_DDR_SDCR_MSDRAMEN_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_MSDRAMEN_SHIFT	/;"	d
DV_DDR_SDCR_PAGESIZE_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_PAGESIZE_SHIFT	/;"	d
DV_DDR_SDCR_SDRAMEN_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_SDRAMEN_SHIFT	/;"	d
DV_DDR_SDCR_TIMUNLOCK_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDCR_TIMUNLOCK_SHIFT	/;"	d
DV_DDR_SDRCR_LPMODEN	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDRCR_LPMODEN	/;"	d
DV_DDR_SDRCR_MCLKSTOPEN	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDRCR_MCLKSTOPEN	/;"	d
DV_DDR_SDTMR1_RAS_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_RAS_SHIFT	/;"	d
DV_DDR_SDTMR1_RCD_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_RCD_SHIFT	/;"	d
DV_DDR_SDTMR1_RC_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_RC_SHIFT	/;"	d
DV_DDR_SDTMR1_RFC_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_RFC_SHIFT	/;"	d
DV_DDR_SDTMR1_RP_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_RP_SHIFT	/;"	d
DV_DDR_SDTMR1_RRD_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_RRD_SHIFT	/;"	d
DV_DDR_SDTMR1_WR_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_WR_SHIFT	/;"	d
DV_DDR_SDTMR1_WTR_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR1_WTR_SHIFT	/;"	d
DV_DDR_SDTMR2_CKE_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_CKE_SHIFT	/;"	d
DV_DDR_SDTMR2_ODT_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_ODT_SHIFT	/;"	d
DV_DDR_SDTMR2_RASMAX_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_RASMAX_SHIFT	/;"	d
DV_DDR_SDTMR2_RTP_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_RTP_SHIFT	/;"	d
DV_DDR_SDTMR2_XP_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_XP_SHIFT	/;"	d
DV_DDR_SDTMR2_XSNR_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_XSNR_SHIFT	/;"	d
DV_DDR_SDTMR2_XSRD_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SDTMR2_XSRD_SHIFT	/;"	d
DV_DDR_SRCR_LPMODEN_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SRCR_LPMODEN_SHIFT	/;"	d
DV_DDR_SRCR_MCLKSTOPEN_SHIFT	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_SRCR_MCLKSTOPEN_SHIFT	/;"	d
DV_DDR_TIMUNLOCK	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define DV_DDR_TIMUNLOCK	/;"	d
DV_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define DV_ENABLE	/;"	d
DV_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_CLK_MARK,	DV_VSYNC_MARK,	DV_HSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_SYSCFG_KICK0_UNLOCK	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DV_SYSCFG_KICK0_UNLOCK	/;"	d
DV_SYSCFG_KICK1_UNLOCK	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DV_SYSCFG_KICK1_UNLOCK	/;"	d
DV_TIMER_TCR_CAPEVTMODE12_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_CAPEVTMODE12_SHIFT	/;"	d
DV_TIMER_TCR_CAPMODE12_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_CAPMODE12_SHIFT	/;"	d
DV_TIMER_TCR_CAPMODE34_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_CAPMODE34_SHIFT	/;"	d
DV_TIMER_TCR_CAPVTMODE12_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_CAPVTMODE12_SHIFT	/;"	d
DV_TIMER_TCR_CLKSRC12_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_CLKSRC12_SHIFT	/;"	d
DV_TIMER_TCR_CLKSRC34_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_CLKSRC34_SHIFT	/;"	d
DV_TIMER_TCR_ENAMODE12_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_ENAMODE12_SHIFT	/;"	d
DV_TIMER_TCR_ENAMODE34_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_ENAMODE34_SHIFT	/;"	d
DV_TIMER_TCR_ENAMODE_MASK	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_ENAMODE_MASK	/;"	d
DV_TIMER_TCR_READRSTMODE12_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_READRSTMODE12_SHIFT	/;"	d
DV_TIMER_TCR_READRSTMODE34_SHIFT	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_TIMER_TCR_READRSTMODE34_SHIFT	/;"	d
DV_TMPBUF_VAL	arch/arm/mach-davinci/include/mach/hardware.h	/^#define DV_TMPBUF_VAL	/;"	d
DV_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	DV_CLK_MARK,	DV_VSYNC_MARK,	DV_HSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
DV_WDT_ENABLE_SYS_RESET	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_WDT_ENABLE_SYS_RESET	/;"	d
DV_WDT_TRIGGER_SYS_RESET	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define DV_WDT_TRIGGER_SYS_RESET	/;"	d
DW16	board/mpl/vcma9/lowlevel_init.S	/^#define DW16	/;"	d	file:
DW16	board/samsung/smdk2410/lowlevel_init.S	/^#define DW16	/;"	d	file:
DW32	board/mpl/vcma9/lowlevel_init.S	/^#define DW32	/;"	d	file:
DW32	board/samsung/smdk2410/lowlevel_init.S	/^#define DW32	/;"	d	file:
DW8	board/mpl/vcma9/lowlevel_init.S	/^#define DW8	/;"	d	file:
DW8	board/samsung/smdk2410/lowlevel_init.S	/^#define DW8	/;"	d	file:
DW8_1_4BITMODE	arch/arm/include/asm/omap_mmc.h	/^#define DW8_1_4BITMODE	/;"	d
DWAPB_GPIO	drivers/gpio/Kconfig	/^config DWAPB_GPIO$/;"	c	menu:GPIO Support
DWC2_DATA_BUF_SIZE	drivers/usb/host/dwc2.c	/^#define DWC2_DATA_BUF_SIZE	/;"	d	file:
DWC2_DTXFSTS_TXFSPCAVAIL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_DTXFSTS_TXFSPCAVAIL_MASK	/;"	d
DWC2_DTXFSTS_TXFSPCAVAIL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_DTXFSTS_TXFSPCAVAIL_OFFSET	/;"	d
DWC2_FIFOSIZE_DEPTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_FIFOSIZE_DEPTH_MASK	/;"	d
DWC2_FIFOSIZE_DEPTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_FIFOSIZE_DEPTH_OFFSET	/;"	d
DWC2_FIFOSIZE_STARTADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_FIFOSIZE_STARTADDR_MASK	/;"	d
DWC2_FIFOSIZE_STARTADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_FIFOSIZE_STARTADDR_OFFSET	/;"	d
DWC2_GAHBCFG_DMAENABLE	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_DMAENABLE	/;"	d
DWC2_GAHBCFG_DMAENABLE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_DMAENABLE_OFFSET	/;"	d
DWC2_GAHBCFG_GLBLINTRMSK	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_GLBLINTRMSK	/;"	d
DWC2_GAHBCFG_GLBLINTRMSK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_GLBLINTRMSK_OFFSET	/;"	d
DWC2_GAHBCFG_HBURSTLEN_INCR	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_INCR	/;"	d
DWC2_GAHBCFG_HBURSTLEN_INCR16	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_INCR16	/;"	d
DWC2_GAHBCFG_HBURSTLEN_INCR4	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_INCR4	/;"	d
DWC2_GAHBCFG_HBURSTLEN_INCR8	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_INCR8	/;"	d
DWC2_GAHBCFG_HBURSTLEN_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_MASK	/;"	d
DWC2_GAHBCFG_HBURSTLEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_OFFSET	/;"	d
DWC2_GAHBCFG_HBURSTLEN_SINGLE	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_HBURSTLEN_SINGLE	/;"	d
DWC2_GAHBCFG_NPTXFEMPLVL_TXFEMPLVL	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_NPTXFEMPLVL_TXFEMPLVL	/;"	d
DWC2_GAHBCFG_NPTXFEMPLVL_TXFEMPLVL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_NPTXFEMPLVL_TXFEMPLVL_OFFSET	/;"	d
DWC2_GAHBCFG_PTXFEMPLVL	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_PTXFEMPLVL	/;"	d
DWC2_GAHBCFG_PTXFEMPLVL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GAHBCFG_PTXFEMPLVL_OFFSET	/;"	d
DWC2_GI2CCTL_ACK	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_ACK	/;"	d
DWC2_GI2CCTL_ACK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_ACK_OFFSET	/;"	d
DWC2_GI2CCTL_ADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_ADDR_MASK	/;"	d
DWC2_GI2CCTL_ADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_ADDR_OFFSET	/;"	d
DWC2_GI2CCTL_BSYDNE	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_BSYDNE	/;"	d
DWC2_GI2CCTL_BSYDNE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_BSYDNE_OFFSET	/;"	d
DWC2_GI2CCTL_I2CDEVADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_I2CDEVADDR_MASK	/;"	d
DWC2_GI2CCTL_I2CDEVADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_I2CDEVADDR_OFFSET	/;"	d
DWC2_GI2CCTL_I2CEN	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_I2CEN	/;"	d
DWC2_GI2CCTL_I2CEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_I2CEN_OFFSET	/;"	d
DWC2_GI2CCTL_I2CSUSPCTL	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_I2CSUSPCTL	/;"	d
DWC2_GI2CCTL_I2CSUSPCTL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_I2CSUSPCTL_OFFSET	/;"	d
DWC2_GI2CCTL_REGADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_REGADDR_MASK	/;"	d
DWC2_GI2CCTL_REGADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_REGADDR_OFFSET	/;"	d
DWC2_GI2CCTL_RW	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_RW	/;"	d
DWC2_GI2CCTL_RWDATA_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_RWDATA_MASK	/;"	d
DWC2_GI2CCTL_RWDATA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_RWDATA_OFFSET	/;"	d
DWC2_GI2CCTL_RW_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GI2CCTL_RW_OFFSET	/;"	d
DWC2_GINTMSK_CONIDSTSCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_CONIDSTSCHNG	/;"	d
DWC2_GINTMSK_CONIDSTSCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_CONIDSTSCHNG_OFFSET	/;"	d
DWC2_GINTMSK_DISCONNECT	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_DISCONNECT	/;"	d
DWC2_GINTMSK_DISCONNECT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_DISCONNECT_OFFSET	/;"	d
DWC2_GINTMSK_ENUMDONE	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_ENUMDONE	/;"	d
DWC2_GINTMSK_ENUMDONE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_ENUMDONE_OFFSET	/;"	d
DWC2_GINTMSK_EOPFRAME	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_EOPFRAME	/;"	d
DWC2_GINTMSK_EOPFRAME_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_EOPFRAME_OFFSET	/;"	d
DWC2_GINTMSK_EPMISMATCH	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_EPMISMATCH	/;"	d
DWC2_GINTMSK_EPMISMATCH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_EPMISMATCH_OFFSET	/;"	d
DWC2_GINTMSK_ERLYSUSPEND	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_ERLYSUSPEND	/;"	d
DWC2_GINTMSK_ERLYSUSPEND_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_ERLYSUSPEND_OFFSET	/;"	d
DWC2_GINTMSK_GINNAKEFF	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_GINNAKEFF	/;"	d
DWC2_GINTMSK_GINNAKEFF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_GINNAKEFF_OFFSET	/;"	d
DWC2_GINTMSK_GOUTNAKEFF	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_GOUTNAKEFF	/;"	d
DWC2_GINTMSK_GOUTNAKEFF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_GOUTNAKEFF_OFFSET	/;"	d
DWC2_GINTMSK_HCINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_HCINTR	/;"	d
DWC2_GINTMSK_HCINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_HCINTR_OFFSET	/;"	d
DWC2_GINTMSK_I2CINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_I2CINTR	/;"	d
DWC2_GINTMSK_I2CINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_I2CINTR_OFFSET	/;"	d
DWC2_GINTMSK_INCOMPLISOIN	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_INCOMPLISOIN	/;"	d
DWC2_GINTMSK_INCOMPLISOIN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_INCOMPLISOIN_OFFSET	/;"	d
DWC2_GINTMSK_INCOMPLISOOUT	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_INCOMPLISOOUT	/;"	d
DWC2_GINTMSK_INCOMPLISOOUT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_INCOMPLISOOUT_OFFSET	/;"	d
DWC2_GINTMSK_INEPINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_INEPINTR	/;"	d
DWC2_GINTMSK_INEPINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_INEPINTR_OFFSET	/;"	d
DWC2_GINTMSK_ISOOUTDROP	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_ISOOUTDROP	/;"	d
DWC2_GINTMSK_ISOOUTDROP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_ISOOUTDROP_OFFSET	/;"	d
DWC2_GINTMSK_LPMTRANRCVD	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_LPMTRANRCVD	/;"	d
DWC2_GINTMSK_LPMTRANRCVD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_LPMTRANRCVD_OFFSET	/;"	d
DWC2_GINTMSK_MODEMISMATCH	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_MODEMISMATCH	/;"	d
DWC2_GINTMSK_MODEMISMATCH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_MODEMISMATCH_OFFSET	/;"	d
DWC2_GINTMSK_NPTXFEMPTY	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_NPTXFEMPTY	/;"	d
DWC2_GINTMSK_NPTXFEMPTY_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_NPTXFEMPTY_OFFSET	/;"	d
DWC2_GINTMSK_OTGINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_OTGINTR	/;"	d
DWC2_GINTMSK_OTGINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_OTGINTR_OFFSET	/;"	d
DWC2_GINTMSK_OUTEPINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_OUTEPINTR	/;"	d
DWC2_GINTMSK_OUTEPINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_OUTEPINTR_OFFSET	/;"	d
DWC2_GINTMSK_PORTINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_PORTINTR	/;"	d
DWC2_GINTMSK_PORTINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_PORTINTR_OFFSET	/;"	d
DWC2_GINTMSK_PTXFEMPTY	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_PTXFEMPTY	/;"	d
DWC2_GINTMSK_PTXFEMPTY_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_PTXFEMPTY_OFFSET	/;"	d
DWC2_GINTMSK_RXSTSQLVL	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_RXSTSQLVL	/;"	d
DWC2_GINTMSK_RXSTSQLVL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_RXSTSQLVL_OFFSET	/;"	d
DWC2_GINTMSK_SESSREQINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_SESSREQINTR	/;"	d
DWC2_GINTMSK_SESSREQINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_SESSREQINTR_OFFSET	/;"	d
DWC2_GINTMSK_SOFINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_SOFINTR	/;"	d
DWC2_GINTMSK_SOFINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_SOFINTR_OFFSET	/;"	d
DWC2_GINTMSK_USBRESET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_USBRESET	/;"	d
DWC2_GINTMSK_USBRESET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_USBRESET_OFFSET	/;"	d
DWC2_GINTMSK_USBSUSPEND	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_USBSUSPEND	/;"	d
DWC2_GINTMSK_USBSUSPEND_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_USBSUSPEND_OFFSET	/;"	d
DWC2_GINTMSK_WKUPINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_WKUPINTR	/;"	d
DWC2_GINTMSK_WKUPINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTMSK_WKUPINTR_OFFSET	/;"	d
DWC2_GINTSTS_CONIDSTSCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_CONIDSTSCHNG	/;"	d
DWC2_GINTSTS_CONIDSTSCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_CONIDSTSCHNG_OFFSET	/;"	d
DWC2_GINTSTS_CURMODE	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_CURMODE	/;"	d
DWC2_GINTSTS_CURMODE_DEVICE	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_CURMODE_DEVICE	/;"	d
DWC2_GINTSTS_CURMODE_HOST	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_CURMODE_HOST	/;"	d
DWC2_GINTSTS_CURMODE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_CURMODE_OFFSET	/;"	d
DWC2_GINTSTS_DISCONNECT	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_DISCONNECT	/;"	d
DWC2_GINTSTS_DISCONNECT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_DISCONNECT_OFFSET	/;"	d
DWC2_GINTSTS_ENUMDONE	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_ENUMDONE	/;"	d
DWC2_GINTSTS_ENUMDONE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_ENUMDONE_OFFSET	/;"	d
DWC2_GINTSTS_EOPFRAME	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_EOPFRAME	/;"	d
DWC2_GINTSTS_EOPFRAME_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_EOPFRAME_OFFSET	/;"	d
DWC2_GINTSTS_EPMISMATCH	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_EPMISMATCH	/;"	d
DWC2_GINTSTS_EPMISMATCH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_EPMISMATCH_OFFSET	/;"	d
DWC2_GINTSTS_ERLYSUSPEND	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_ERLYSUSPEND	/;"	d
DWC2_GINTSTS_ERLYSUSPEND_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_ERLYSUSPEND_OFFSET	/;"	d
DWC2_GINTSTS_GINNAKEFF	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_GINNAKEFF	/;"	d
DWC2_GINTSTS_GINNAKEFF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_GINNAKEFF_OFFSET	/;"	d
DWC2_GINTSTS_GOUTNAKEFF	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_GOUTNAKEFF	/;"	d
DWC2_GINTSTS_GOUTNAKEFF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_GOUTNAKEFF_OFFSET	/;"	d
DWC2_GINTSTS_HCINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_HCINTR	/;"	d
DWC2_GINTSTS_HCINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_HCINTR_OFFSET	/;"	d
DWC2_GINTSTS_I2CINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_I2CINTR	/;"	d
DWC2_GINTSTS_I2CINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_I2CINTR_OFFSET	/;"	d
DWC2_GINTSTS_INCOMPLISOIN	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INCOMPLISOIN	/;"	d
DWC2_GINTSTS_INCOMPLISOIN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INCOMPLISOIN_OFFSET	/;"	d
DWC2_GINTSTS_INCOMPLISOOUT	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INCOMPLISOOUT	/;"	d
DWC2_GINTSTS_INCOMPLISOOUT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INCOMPLISOOUT_OFFSET	/;"	d
DWC2_GINTSTS_INEPINT	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INEPINT	/;"	d
DWC2_GINTSTS_INEPINT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INEPINT_OFFSET	/;"	d
DWC2_GINTSTS_INTOKENRX	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INTOKENRX	/;"	d
DWC2_GINTSTS_INTOKENRX_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_INTOKENRX_OFFSET	/;"	d
DWC2_GINTSTS_ISOOUTDROP	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_ISOOUTDROP	/;"	d
DWC2_GINTSTS_ISOOUTDROP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_ISOOUTDROP_OFFSET	/;"	d
DWC2_GINTSTS_LPMTRANRCVD	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_LPMTRANRCVD	/;"	d
DWC2_GINTSTS_LPMTRANRCVD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_LPMTRANRCVD_OFFSET	/;"	d
DWC2_GINTSTS_MODEMISMATCH	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_MODEMISMATCH	/;"	d
DWC2_GINTSTS_MODEMISMATCH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_MODEMISMATCH_OFFSET	/;"	d
DWC2_GINTSTS_NPTXFEMPTY	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_NPTXFEMPTY	/;"	d
DWC2_GINTSTS_NPTXFEMPTY_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_NPTXFEMPTY_OFFSET	/;"	d
DWC2_GINTSTS_OTGINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_OTGINTR	/;"	d
DWC2_GINTSTS_OTGINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_OTGINTR_OFFSET	/;"	d
DWC2_GINTSTS_OUTEPINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_OUTEPINTR	/;"	d
DWC2_GINTSTS_OUTEPINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_OUTEPINTR_OFFSET	/;"	d
DWC2_GINTSTS_PORTINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_PORTINTR	/;"	d
DWC2_GINTSTS_PORTINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_PORTINTR_OFFSET	/;"	d
DWC2_GINTSTS_PTXFEMPTY	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_PTXFEMPTY	/;"	d
DWC2_GINTSTS_PTXFEMPTY_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_PTXFEMPTY_OFFSET	/;"	d
DWC2_GINTSTS_RXSTSQLVL	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_RXSTSQLVL	/;"	d
DWC2_GINTSTS_RXSTSQLVL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_RXSTSQLVL_OFFSET	/;"	d
DWC2_GINTSTS_SESSREQINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_SESSREQINTR	/;"	d
DWC2_GINTSTS_SESSREQINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_SESSREQINTR_OFFSET	/;"	d
DWC2_GINTSTS_SOFINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_SOFINTR	/;"	d
DWC2_GINTSTS_SOFINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_SOFINTR_OFFSET	/;"	d
DWC2_GINTSTS_USBRESET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_USBRESET	/;"	d
DWC2_GINTSTS_USBRESET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_USBRESET_OFFSET	/;"	d
DWC2_GINTSTS_USBSUSPEND	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_USBSUSPEND	/;"	d
DWC2_GINTSTS_USBSUSPEND_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_USBSUSPEND_OFFSET	/;"	d
DWC2_GINTSTS_WKUPINTR	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_WKUPINTR	/;"	d
DWC2_GINTSTS_WKUPINTR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GINTSTS_WKUPINTR_OFFSET	/;"	d
DWC2_GLPMCTL_APPL_RESP	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_APPL_RESP	/;"	d
DWC2_GLPMCTL_APPL_RESP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_APPL_RESP_OFFSET	/;"	d
DWC2_GLPMCTL_EN_UTMI_SLEEP	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_EN_UTMI_SLEEP	/;"	d
DWC2_GLPMCTL_EN_UTMI_SLEEP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_EN_UTMI_SLEEP_OFFSET	/;"	d
DWC2_GLPMCTL_HIRD_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_HIRD_MASK	/;"	d
DWC2_GLPMCTL_HIRD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_HIRD_OFFSET	/;"	d
DWC2_GLPMCTL_HIRD_THRES_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_HIRD_THRES_MASK	/;"	d
DWC2_GLPMCTL_HIRD_THRES_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_HIRD_THRES_OFFSET	/;"	d
DWC2_GLPMCTL_HSIC_CONNECT	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_HSIC_CONNECT	/;"	d
DWC2_GLPMCTL_HSIC_CONNECT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_HSIC_CONNECT_OFFSET	/;"	d
DWC2_GLPMCTL_INV_SEL_HSIC	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_INV_SEL_HSIC	/;"	d
DWC2_GLPMCTL_INV_SEL_HSIC_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_INV_SEL_HSIC_OFFSET	/;"	d
DWC2_GLPMCTL_LPM_CAP_EN	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_LPM_CAP_EN	/;"	d
DWC2_GLPMCTL_LPM_CAP_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_LPM_CAP_EN_OFFSET	/;"	d
DWC2_GLPMCTL_LPM_CHAN_INDEX_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_LPM_CHAN_INDEX_MASK	/;"	d
DWC2_GLPMCTL_LPM_CHAN_INDEX_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_LPM_CHAN_INDEX_OFFSET	/;"	d
DWC2_GLPMCTL_LPM_RESP_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_LPM_RESP_MASK	/;"	d
DWC2_GLPMCTL_LPM_RESP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_LPM_RESP_OFFSET	/;"	d
DWC2_GLPMCTL_PRT_SLEEP_STS	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_PRT_SLEEP_STS	/;"	d
DWC2_GLPMCTL_PRT_SLEEP_STS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_PRT_SLEEP_STS_OFFSET	/;"	d
DWC2_GLPMCTL_REM_WKUP_EN	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_REM_WKUP_EN	/;"	d
DWC2_GLPMCTL_REM_WKUP_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_REM_WKUP_EN_OFFSET	/;"	d
DWC2_GLPMCTL_RETRY_COUNT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_RETRY_COUNT_MASK	/;"	d
DWC2_GLPMCTL_RETRY_COUNT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_RETRY_COUNT_OFFSET	/;"	d
DWC2_GLPMCTL_RETRY_COUNT_STS_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_RETRY_COUNT_STS_MASK	/;"	d
DWC2_GLPMCTL_RETRY_COUNT_STS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_RETRY_COUNT_STS_OFFSET	/;"	d
DWC2_GLPMCTL_SEND_LPM	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_SEND_LPM	/;"	d
DWC2_GLPMCTL_SEND_LPM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_SEND_LPM_OFFSET	/;"	d
DWC2_GLPMCTL_SLEEP_STATE_RESUMEOK	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_SLEEP_STATE_RESUMEOK	/;"	d
DWC2_GLPMCTL_SLEEP_STATE_RESUMEOK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GLPMCTL_SLEEP_STATE_RESUMEOK_OFFSET	/;"	d
DWC2_GNPTXSTS_NPTXFSPCAVAIL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXFSPCAVAIL_MASK	/;"	d
DWC2_GNPTXSTS_NPTXFSPCAVAIL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXFSPCAVAIL_OFFSET	/;"	d
DWC2_GNPTXSTS_NPTXQSPCAVAIL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQSPCAVAIL_MASK	/;"	d
DWC2_GNPTXSTS_NPTXQSPCAVAIL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQSPCAVAIL_OFFSET	/;"	d
DWC2_GNPTXSTS_NPTXQTOP_CHNEP_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQTOP_CHNEP_MASK	/;"	d
DWC2_GNPTXSTS_NPTXQTOP_CHNEP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQTOP_CHNEP_OFFSET	/;"	d
DWC2_GNPTXSTS_NPTXQTOP_TERMINATE	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQTOP_TERMINATE	/;"	d
DWC2_GNPTXSTS_NPTXQTOP_TERMINATE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQTOP_TERMINATE_OFFSET	/;"	d
DWC2_GNPTXSTS_NPTXQTOP_TOKEN_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQTOP_TOKEN_MASK	/;"	d
DWC2_GNPTXSTS_NPTXQTOP_TOKEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GNPTXSTS_NPTXQTOP_TOKEN_OFFSET	/;"	d
DWC2_GOTGCTL_ASESVLD	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_ASESVLD	/;"	d
DWC2_GOTGCTL_ASESVLD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_ASESVLD_OFFSET	/;"	d
DWC2_GOTGCTL_BSESVLD	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_BSESVLD	/;"	d
DWC2_GOTGCTL_BSESVLD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_BSESVLD_OFFSET	/;"	d
DWC2_GOTGCTL_CONIDSTS	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_CONIDSTS	/;"	d
DWC2_GOTGCTL_CONIDSTS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_CONIDSTS_OFFSET	/;"	d
DWC2_GOTGCTL_DBNCTIME	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_DBNCTIME	/;"	d
DWC2_GOTGCTL_DBNCTIME_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_DBNCTIME_OFFSET	/;"	d
DWC2_GOTGCTL_DEVHNPEN	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_DEVHNPEN	/;"	d
DWC2_GOTGCTL_DEVHNPEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_DEVHNPEN_OFFSET	/;"	d
DWC2_GOTGCTL_HNPREQ	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_HNPREQ	/;"	d
DWC2_GOTGCTL_HNPREQ_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_HNPREQ_OFFSET	/;"	d
DWC2_GOTGCTL_HSTNEGSCS	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_HSTNEGSCS	/;"	d
DWC2_GOTGCTL_HSTNEGSCS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_HSTNEGSCS_OFFSET	/;"	d
DWC2_GOTGCTL_HSTSETHNPEN	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_HSTSETHNPEN	/;"	d
DWC2_GOTGCTL_HSTSETHNPEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_HSTSETHNPEN_OFFSET	/;"	d
DWC2_GOTGCTL_OTGVER	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_OTGVER	/;"	d
DWC2_GOTGCTL_OTGVER_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_OTGVER_OFFSET	/;"	d
DWC2_GOTGCTL_SESREQ	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_SESREQ	/;"	d
DWC2_GOTGCTL_SESREQSCS	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_SESREQSCS	/;"	d
DWC2_GOTGCTL_SESREQSCS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_SESREQSCS_OFFSET	/;"	d
DWC2_GOTGCTL_SESREQ_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGCTL_SESREQ_OFFSET	/;"	d
DWC2_GOTGINT_ADEVTOUTCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_ADEVTOUTCHNG	/;"	d
DWC2_GOTGINT_ADEVTOUTCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_ADEVTOUTCHNG_OFFSET	/;"	d
DWC2_GOTGINT_DEBDONE	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_DEBDONE	/;"	d
DWC2_GOTGINT_DEBDONE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_DEBDONE_OFFSET	/;"	d
DWC2_GOTGINT_HSTNEGDET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_HSTNEGDET	/;"	d
DWC2_GOTGINT_HSTNEGDET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_HSTNEGDET_OFFSET	/;"	d
DWC2_GOTGINT_HSTNEGSUCSTSCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_HSTNEGSUCSTSCHNG	/;"	d
DWC2_GOTGINT_HSTNEGSUCSTSCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_HSTNEGSUCSTSCHNG_OFFSET	/;"	d
DWC2_GOTGINT_RESERVER10_16_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_RESERVER10_16_MASK	/;"	d
DWC2_GOTGINT_RESERVER10_16_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_RESERVER10_16_OFFSET	/;"	d
DWC2_GOTGINT_SESENDDET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_SESENDDET	/;"	d
DWC2_GOTGINT_SESENDDET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_SESENDDET_OFFSET	/;"	d
DWC2_GOTGINT_SESREQSUCSTSCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_SESREQSUCSTSCHNG	/;"	d
DWC2_GOTGINT_SESREQSUCSTSCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GOTGINT_SESREQSUCSTSCHNG_OFFSET	/;"	d
DWC2_GRSTCTL_AHBIDLE	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_AHBIDLE	/;"	d
DWC2_GRSTCTL_AHBIDLE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_AHBIDLE_OFFSET	/;"	d
DWC2_GRSTCTL_CSFTRST	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_CSFTRST	/;"	d
DWC2_GRSTCTL_CSFTRST_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_CSFTRST_OFFSET	/;"	d
DWC2_GRSTCTL_DMAREQ	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_DMAREQ	/;"	d
DWC2_GRSTCTL_DMAREQ_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_DMAREQ_OFFSET	/;"	d
DWC2_GRSTCTL_HSFTRST	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_HSFTRST	/;"	d
DWC2_GRSTCTL_HSFTRST_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_HSFTRST_OFFSET	/;"	d
DWC2_GRSTCTL_HSTFRM	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_HSTFRM	/;"	d
DWC2_GRSTCTL_HSTFRM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_HSTFRM_OFFSET	/;"	d
DWC2_GRSTCTL_INTKNQFLSH	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_INTKNQFLSH	/;"	d
DWC2_GRSTCTL_INTKNQFLSH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_INTKNQFLSH_OFFSET	/;"	d
DWC2_GRSTCTL_RXFFLSH	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_RXFFLSH	/;"	d
DWC2_GRSTCTL_RXFFLSH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_RXFFLSH_OFFSET	/;"	d
DWC2_GRSTCTL_TXFFLSH	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_TXFFLSH	/;"	d
DWC2_GRSTCTL_TXFFLSH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_TXFFLSH_OFFSET	/;"	d
DWC2_GRSTCTL_TXFNUM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_TXFNUM_MASK	/;"	d
DWC2_GRSTCTL_TXFNUM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRSTCTL_TXFNUM_OFFSET	/;"	d
DWC2_GRXSTS_BCNT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_BCNT_MASK	/;"	d
DWC2_GRXSTS_BCNT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_BCNT_OFFSET	/;"	d
DWC2_GRXSTS_DPID_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_DPID_MASK	/;"	d
DWC2_GRXSTS_DPID_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_DPID_OFFSET	/;"	d
DWC2_GRXSTS_EPNUM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_EPNUM_MASK	/;"	d
DWC2_GRXSTS_EPNUM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_EPNUM_OFFSET	/;"	d
DWC2_GRXSTS_FN_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_FN_MASK	/;"	d
DWC2_GRXSTS_FN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_FN_OFFSET	/;"	d
DWC2_GRXSTS_PKTSTS_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_PKTSTS_MASK	/;"	d
DWC2_GRXSTS_PKTSTS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GRXSTS_PKTSTS_OFFSET	/;"	d
DWC2_GUSBCFG_DDRSEL	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_DDRSEL	/;"	d
DWC2_GUSBCFG_DDRSEL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_DDRSEL_OFFSET	/;"	d
DWC2_GUSBCFG_FORCEDEVMODE	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_FORCEDEVMODE	/;"	d
DWC2_GUSBCFG_FORCEDEVMODE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_FORCEDEVMODE_OFFSET	/;"	d
DWC2_GUSBCFG_FORCEHOSTMODE	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_FORCEHOSTMODE	/;"	d
DWC2_GUSBCFG_FORCEHOSTMODE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_FORCEHOSTMODE_OFFSET	/;"	d
DWC2_GUSBCFG_FSINTF	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_FSINTF	/;"	d
DWC2_GUSBCFG_FSINTF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_FSINTF_OFFSET	/;"	d
DWC2_GUSBCFG_HNPCAP	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_HNPCAP	/;"	d
DWC2_GUSBCFG_HNPCAP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_HNPCAP_OFFSET	/;"	d
DWC2_GUSBCFG_IC_TRAFFIC_PULL_REMOVE	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_IC_TRAFFIC_PULL_REMOVE	/;"	d
DWC2_GUSBCFG_IC_TRAFFIC_PULL_REMOVE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_IC_TRAFFIC_PULL_REMOVE_OFFSET	/;"	d
DWC2_GUSBCFG_IC_USB_CAP	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_IC_USB_CAP	/;"	d
DWC2_GUSBCFG_IC_USB_CAP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_IC_USB_CAP_OFFSET	/;"	d
DWC2_GUSBCFG_INDICATOR_PASSTHROUGH	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_INDICATOR_PASSTHROUGH	/;"	d
DWC2_GUSBCFG_INDICATOR_PASSTHROUGH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_INDICATOR_PASSTHROUGH_OFFSET	/;"	d
DWC2_GUSBCFG_NPTXFRWNDEN	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_NPTXFRWNDEN	/;"	d
DWC2_GUSBCFG_NPTXFRWNDEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_NPTXFRWNDEN_OFFSET	/;"	d
DWC2_GUSBCFG_OTGUTMIFSSEL	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_OTGUTMIFSSEL	/;"	d
DWC2_GUSBCFG_OTGUTMIFSSEL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_OTGUTMIFSSEL_OFFSET	/;"	d
DWC2_GUSBCFG_PHYIF	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_PHYIF	/;"	d
DWC2_GUSBCFG_PHYIF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_PHYIF_OFFSET	/;"	d
DWC2_GUSBCFG_PHYLPWRCLKSEL	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_PHYLPWRCLKSEL	/;"	d
DWC2_GUSBCFG_PHYLPWRCLKSEL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_PHYLPWRCLKSEL_OFFSET	/;"	d
DWC2_GUSBCFG_PHYSEL	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_PHYSEL	/;"	d
DWC2_GUSBCFG_PHYSEL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_PHYSEL_OFFSET	/;"	d
DWC2_GUSBCFG_SRPCAP	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_SRPCAP	/;"	d
DWC2_GUSBCFG_SRPCAP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_SRPCAP_OFFSET	/;"	d
DWC2_GUSBCFG_TERM_SEL_DL_PULSE	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_TERM_SEL_DL_PULSE	/;"	d
DWC2_GUSBCFG_TERM_SEL_DL_PULSE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_TERM_SEL_DL_PULSE_OFFSET	/;"	d
DWC2_GUSBCFG_TOUTCAL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_TOUTCAL_MASK	/;"	d
DWC2_GUSBCFG_TOUTCAL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_TOUTCAL_OFFSET	/;"	d
DWC2_GUSBCFG_TX_END_DELAY	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_TX_END_DELAY	/;"	d
DWC2_GUSBCFG_TX_END_DELAY_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_TX_END_DELAY_OFFSET	/;"	d
DWC2_GUSBCFG_ULPI_AUTO_RES	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_AUTO_RES	/;"	d
DWC2_GUSBCFG_ULPI_AUTO_RES_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_AUTO_RES_OFFSET	/;"	d
DWC2_GUSBCFG_ULPI_CLK_SUS_M	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_CLK_SUS_M	/;"	d
DWC2_GUSBCFG_ULPI_CLK_SUS_M_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_CLK_SUS_M_OFFSET	/;"	d
DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV	/;"	d
DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV_OFFSET	/;"	d
DWC2_GUSBCFG_ULPI_FSLS	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_FSLS	/;"	d
DWC2_GUSBCFG_ULPI_FSLS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_FSLS_OFFSET	/;"	d
DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR	/;"	d
DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR_OFFSET	/;"	d
DWC2_GUSBCFG_ULPI_UTMI_SEL	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_UTMI_SEL	/;"	d
DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET	/;"	d
DWC2_GUSBCFG_USBTRDTIM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_USBTRDTIM_MASK	/;"	d
DWC2_GUSBCFG_USBTRDTIM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_GUSBCFG_USBTRDTIM_OFFSET	/;"	d
DWC2_HAINTMSK_CH0	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH0	/;"	d
DWC2_HAINTMSK_CH0_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH0_OFFSET	/;"	d
DWC2_HAINTMSK_CH1	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH1	/;"	d
DWC2_HAINTMSK_CH10	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH10	/;"	d
DWC2_HAINTMSK_CH10_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH10_OFFSET	/;"	d
DWC2_HAINTMSK_CH11	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH11	/;"	d
DWC2_HAINTMSK_CH11_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH11_OFFSET	/;"	d
DWC2_HAINTMSK_CH12	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH12	/;"	d
DWC2_HAINTMSK_CH12_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH12_OFFSET	/;"	d
DWC2_HAINTMSK_CH13	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH13	/;"	d
DWC2_HAINTMSK_CH13_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH13_OFFSET	/;"	d
DWC2_HAINTMSK_CH14	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH14	/;"	d
DWC2_HAINTMSK_CH14_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH14_OFFSET	/;"	d
DWC2_HAINTMSK_CH15	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH15	/;"	d
DWC2_HAINTMSK_CH15_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH15_OFFSET	/;"	d
DWC2_HAINTMSK_CH1_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH1_OFFSET	/;"	d
DWC2_HAINTMSK_CH2	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH2	/;"	d
DWC2_HAINTMSK_CH2_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH2_OFFSET	/;"	d
DWC2_HAINTMSK_CH3	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH3	/;"	d
DWC2_HAINTMSK_CH3_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH3_OFFSET	/;"	d
DWC2_HAINTMSK_CH4	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH4	/;"	d
DWC2_HAINTMSK_CH4_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH4_OFFSET	/;"	d
DWC2_HAINTMSK_CH5	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH5	/;"	d
DWC2_HAINTMSK_CH5_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH5_OFFSET	/;"	d
DWC2_HAINTMSK_CH6	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH6	/;"	d
DWC2_HAINTMSK_CH6_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH6_OFFSET	/;"	d
DWC2_HAINTMSK_CH7	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH7	/;"	d
DWC2_HAINTMSK_CH7_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH7_OFFSET	/;"	d
DWC2_HAINTMSK_CH8	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH8	/;"	d
DWC2_HAINTMSK_CH8_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH8_OFFSET	/;"	d
DWC2_HAINTMSK_CH9	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH9	/;"	d
DWC2_HAINTMSK_CH9_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CH9_OFFSET	/;"	d
DWC2_HAINTMSK_CHINT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CHINT_MASK	/;"	d
DWC2_HAINTMSK_CHINT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINTMSK_CHINT_OFFSET	/;"	d
DWC2_HAINT_CH0	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH0	/;"	d
DWC2_HAINT_CH0_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH0_OFFSET	/;"	d
DWC2_HAINT_CH1	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH1	/;"	d
DWC2_HAINT_CH10	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH10	/;"	d
DWC2_HAINT_CH10_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH10_OFFSET	/;"	d
DWC2_HAINT_CH11	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH11	/;"	d
DWC2_HAINT_CH11_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH11_OFFSET	/;"	d
DWC2_HAINT_CH12	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH12	/;"	d
DWC2_HAINT_CH12_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH12_OFFSET	/;"	d
DWC2_HAINT_CH13	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH13	/;"	d
DWC2_HAINT_CH13_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH13_OFFSET	/;"	d
DWC2_HAINT_CH14	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH14	/;"	d
DWC2_HAINT_CH14_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH14_OFFSET	/;"	d
DWC2_HAINT_CH15	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH15	/;"	d
DWC2_HAINT_CH15_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH15_OFFSET	/;"	d
DWC2_HAINT_CH1_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH1_OFFSET	/;"	d
DWC2_HAINT_CH2	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH2	/;"	d
DWC2_HAINT_CH2_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH2_OFFSET	/;"	d
DWC2_HAINT_CH3	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH3	/;"	d
DWC2_HAINT_CH3_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH3_OFFSET	/;"	d
DWC2_HAINT_CH4	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH4	/;"	d
DWC2_HAINT_CH4_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH4_OFFSET	/;"	d
DWC2_HAINT_CH5	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH5	/;"	d
DWC2_HAINT_CH5_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH5_OFFSET	/;"	d
DWC2_HAINT_CH6	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH6	/;"	d
DWC2_HAINT_CH6_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH6_OFFSET	/;"	d
DWC2_HAINT_CH7	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH7	/;"	d
DWC2_HAINT_CH7_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH7_OFFSET	/;"	d
DWC2_HAINT_CH8	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH8	/;"	d
DWC2_HAINT_CH8_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH8_OFFSET	/;"	d
DWC2_HAINT_CH9	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH9	/;"	d
DWC2_HAINT_CH9_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CH9_OFFSET	/;"	d
DWC2_HAINT_CHINT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CHINT_MASK	/;"	d
DWC2_HAINT_CHINT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HAINT_CHINT_OFFSET	/;"	d
DWC2_HCCHAR_CHDIS	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_CHDIS	/;"	d
DWC2_HCCHAR_CHDIS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_CHDIS_OFFSET	/;"	d
DWC2_HCCHAR_CHEN	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_CHEN	/;"	d
DWC2_HCCHAR_CHEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_CHEN_OFFSET	/;"	d
DWC2_HCCHAR_DEVADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_DEVADDR_MASK	/;"	d
DWC2_HCCHAR_DEVADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_DEVADDR_OFFSET	/;"	d
DWC2_HCCHAR_EPDIR	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPDIR	/;"	d
DWC2_HCCHAR_EPDIR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPDIR_OFFSET	/;"	d
DWC2_HCCHAR_EPNUM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPNUM_MASK	/;"	d
DWC2_HCCHAR_EPNUM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPNUM_OFFSET	/;"	d
DWC2_HCCHAR_EPTYPE_BULK	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPTYPE_BULK	/;"	d
DWC2_HCCHAR_EPTYPE_CONTROL	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPTYPE_CONTROL	/;"	d
DWC2_HCCHAR_EPTYPE_INTR	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPTYPE_INTR	/;"	d
DWC2_HCCHAR_EPTYPE_ISOC	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPTYPE_ISOC	/;"	d
DWC2_HCCHAR_EPTYPE_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPTYPE_MASK	/;"	d
DWC2_HCCHAR_EPTYPE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_EPTYPE_OFFSET	/;"	d
DWC2_HCCHAR_LSPDDEV	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_LSPDDEV	/;"	d
DWC2_HCCHAR_LSPDDEV_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_LSPDDEV_OFFSET	/;"	d
DWC2_HCCHAR_MPS_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_MPS_MASK	/;"	d
DWC2_HCCHAR_MPS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_MPS_OFFSET	/;"	d
DWC2_HCCHAR_MULTICNT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_MULTICNT_MASK	/;"	d
DWC2_HCCHAR_MULTICNT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_MULTICNT_OFFSET	/;"	d
DWC2_HCCHAR_ODDFRM	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_ODDFRM	/;"	d
DWC2_HCCHAR_ODDFRM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCCHAR_ODDFRM_OFFSET	/;"	d
DWC2_HCDMA_CTD_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCDMA_CTD_MASK	/;"	d
DWC2_HCDMA_CTD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCDMA_CTD_OFFSET	/;"	d
DWC2_HCDMA_DMA_ADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCDMA_DMA_ADDR_MASK	/;"	d
DWC2_HCDMA_DMA_ADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCDMA_DMA_ADDR_OFFSET	/;"	d
DWC2_HCFG_DESCDMA	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_DESCDMA	/;"	d
DWC2_HCFG_DESCDMA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_DESCDMA_OFFSET	/;"	d
DWC2_HCFG_FRLISTEN_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FRLISTEN_MASK	/;"	d
DWC2_HCFG_FRLISTEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FRLISTEN_OFFSET	/;"	d
DWC2_HCFG_FSLSPCLKSEL_30_60_MHZ	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSPCLKSEL_30_60_MHZ	/;"	d
DWC2_HCFG_FSLSPCLKSEL_48_MHZ	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSPCLKSEL_48_MHZ	/;"	d
DWC2_HCFG_FSLSPCLKSEL_6_MHZ	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSPCLKSEL_6_MHZ	/;"	d
DWC2_HCFG_FSLSPCLKSEL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSPCLKSEL_MASK	/;"	d
DWC2_HCFG_FSLSPCLKSEL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSPCLKSEL_OFFSET	/;"	d
DWC2_HCFG_FSLSSUPP	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSSUPP	/;"	d
DWC2_HCFG_FSLSSUPP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_FSLSSUPP_OFFSET	/;"	d
DWC2_HCFG_PERSCHEDENA	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_PERSCHEDENA	/;"	d
DWC2_HCFG_PERSCHEDENA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_PERSCHEDENA_OFFSET	/;"	d
DWC2_HCFG_PERSCHEDSTAT	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_PERSCHEDSTAT	/;"	d
DWC2_HCFG_PERSCHEDSTAT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCFG_PERSCHEDSTAT_OFFSET	/;"	d
DWC2_HCINTMSK_ACK	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_ACK	/;"	d
DWC2_HCINTMSK_ACK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_ACK_OFFSET	/;"	d
DWC2_HCINTMSK_AHBERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_AHBERR	/;"	d
DWC2_HCINTMSK_AHBERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_AHBERR_OFFSET	/;"	d
DWC2_HCINTMSK_BBLERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_BBLERR	/;"	d
DWC2_HCINTMSK_BBLERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_BBLERR_OFFSET	/;"	d
DWC2_HCINTMSK_BNA	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_BNA	/;"	d
DWC2_HCINTMSK_BNA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_BNA_OFFSET	/;"	d
DWC2_HCINTMSK_CHHLTD	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_CHHLTD	/;"	d
DWC2_HCINTMSK_CHHLTD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_CHHLTD_OFFSET	/;"	d
DWC2_HCINTMSK_DATATGLERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_DATATGLERR	/;"	d
DWC2_HCINTMSK_DATATGLERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_DATATGLERR_OFFSET	/;"	d
DWC2_HCINTMSK_FRMOVRUN	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_FRMOVRUN	/;"	d
DWC2_HCINTMSK_FRMOVRUN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_FRMOVRUN_OFFSET	/;"	d
DWC2_HCINTMSK_FRM_LIST_ROLL	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_FRM_LIST_ROLL	/;"	d
DWC2_HCINTMSK_FRM_LIST_ROLL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_FRM_LIST_ROLL_OFFSET	/;"	d
DWC2_HCINTMSK_NAK	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_NAK	/;"	d
DWC2_HCINTMSK_NAK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_NAK_OFFSET	/;"	d
DWC2_HCINTMSK_NYET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_NYET	/;"	d
DWC2_HCINTMSK_NYET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_NYET_OFFSET	/;"	d
DWC2_HCINTMSK_STALL	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_STALL	/;"	d
DWC2_HCINTMSK_STALL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_STALL_OFFSET	/;"	d
DWC2_HCINTMSK_XACTERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_XACTERR	/;"	d
DWC2_HCINTMSK_XACTERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_XACTERR_OFFSET	/;"	d
DWC2_HCINTMSK_XCS_XACT	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_XCS_XACT	/;"	d
DWC2_HCINTMSK_XCS_XACT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_XCS_XACT_OFFSET	/;"	d
DWC2_HCINTMSK_XFERCOMPL	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_XFERCOMPL	/;"	d
DWC2_HCINTMSK_XFERCOMPL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINTMSK_XFERCOMPL_OFFSET	/;"	d
DWC2_HCINT_ACK	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_ACK	/;"	d
DWC2_HCINT_ACK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_ACK_OFFSET	/;"	d
DWC2_HCINT_AHBERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_AHBERR	/;"	d
DWC2_HCINT_AHBERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_AHBERR_OFFSET	/;"	d
DWC2_HCINT_BBLERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_BBLERR	/;"	d
DWC2_HCINT_BBLERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_BBLERR_OFFSET	/;"	d
DWC2_HCINT_BNA	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_BNA	/;"	d
DWC2_HCINT_BNA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_BNA_OFFSET	/;"	d
DWC2_HCINT_CHHLTD	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_CHHLTD	/;"	d
DWC2_HCINT_CHHLTD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_CHHLTD_OFFSET	/;"	d
DWC2_HCINT_DATATGLERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_DATATGLERR	/;"	d
DWC2_HCINT_DATATGLERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_DATATGLERR_OFFSET	/;"	d
DWC2_HCINT_FRMOVRUN	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_FRMOVRUN	/;"	d
DWC2_HCINT_FRMOVRUN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_FRMOVRUN_OFFSET	/;"	d
DWC2_HCINT_FRM_LIST_ROLL	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_FRM_LIST_ROLL	/;"	d
DWC2_HCINT_FRM_LIST_ROLL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_FRM_LIST_ROLL_OFFSET	/;"	d
DWC2_HCINT_NAK	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_NAK	/;"	d
DWC2_HCINT_NAK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_NAK_OFFSET	/;"	d
DWC2_HCINT_NYET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_NYET	/;"	d
DWC2_HCINT_NYET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_NYET_OFFSET	/;"	d
DWC2_HCINT_STALL	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_STALL	/;"	d
DWC2_HCINT_STALL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_STALL_OFFSET	/;"	d
DWC2_HCINT_XACTERR	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_XACTERR	/;"	d
DWC2_HCINT_XACTERR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_XACTERR_OFFSET	/;"	d
DWC2_HCINT_XCS_XACT	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_XCS_XACT	/;"	d
DWC2_HCINT_XCS_XACT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_XCS_XACT_OFFSET	/;"	d
DWC2_HCINT_XFERCOMP	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_XFERCOMP	/;"	d
DWC2_HCINT_XFERCOMP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCINT_XFERCOMP_OFFSET	/;"	d
DWC2_HCSPLT_COMPSPLT	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_COMPSPLT	/;"	d
DWC2_HCSPLT_COMPSPLT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_COMPSPLT_OFFSET	/;"	d
DWC2_HCSPLT_HUBADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_HUBADDR_MASK	/;"	d
DWC2_HCSPLT_HUBADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_HUBADDR_OFFSET	/;"	d
DWC2_HCSPLT_PRTADDR_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_PRTADDR_MASK	/;"	d
DWC2_HCSPLT_PRTADDR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_PRTADDR_OFFSET	/;"	d
DWC2_HCSPLT_SPLTENA	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_SPLTENA	/;"	d
DWC2_HCSPLT_SPLTENA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_SPLTENA_OFFSET	/;"	d
DWC2_HCSPLT_XACTPOS_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_XACTPOS_MASK	/;"	d
DWC2_HCSPLT_XACTPOS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCSPLT_XACTPOS_OFFSET	/;"	d
DWC2_HCTSIZ_DOPNG	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_DOPNG	/;"	d
DWC2_HCTSIZ_DOPNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_DOPNG_OFFSET	/;"	d
DWC2_HCTSIZ_NTD_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_NTD_MASK	/;"	d
DWC2_HCTSIZ_NTD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_NTD_OFFSET	/;"	d
DWC2_HCTSIZ_PID_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_PID_MASK	/;"	d
DWC2_HCTSIZ_PID_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_PID_OFFSET	/;"	d
DWC2_HCTSIZ_PKTCNT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_PKTCNT_MASK	/;"	d
DWC2_HCTSIZ_PKTCNT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_PKTCNT_OFFSET	/;"	d
DWC2_HCTSIZ_SCHINFO_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_SCHINFO_MASK	/;"	d
DWC2_HCTSIZ_SCHINFO_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_SCHINFO_OFFSET	/;"	d
DWC2_HCTSIZ_XFERSIZE_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_XFERSIZE_MASK	/;"	d
DWC2_HCTSIZ_XFERSIZE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HCTSIZ_XFERSIZE_OFFSET	/;"	d
DWC2_HC_CHANNEL	drivers/usb/host/dwc2.c	/^#define DWC2_HC_CHANNEL	/;"	d	file:
DWC2_HC_PID_DATA0	drivers/usb/host/dwc2.h	/^#define DWC2_HC_PID_DATA0	/;"	d
DWC2_HC_PID_DATA1	drivers/usb/host/dwc2.h	/^#define DWC2_HC_PID_DATA1	/;"	d
DWC2_HC_PID_DATA2	drivers/usb/host/dwc2.h	/^#define DWC2_HC_PID_DATA2	/;"	d
DWC2_HC_PID_MDATA	drivers/usb/host/dwc2.h	/^#define DWC2_HC_PID_MDATA	/;"	d
DWC2_HC_PID_SETUP	drivers/usb/host/dwc2.h	/^#define DWC2_HC_PID_SETUP	/;"	d
DWC2_HFIR_FRINT_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HFIR_FRINT_MASK	/;"	d
DWC2_HFIR_FRINT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HFIR_FRINT_OFFSET	/;"	d
DWC2_HFNUM_FRNUM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HFNUM_FRNUM_MASK	/;"	d
DWC2_HFNUM_FRNUM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HFNUM_FRNUM_OFFSET	/;"	d
DWC2_HFNUM_FRREM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HFNUM_FRREM_MASK	/;"	d
DWC2_HFNUM_FRREM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HFNUM_FRREM_OFFSET	/;"	d
DWC2_HFNUM_MAX_FRNUM	drivers/usb/host/dwc2.h	/^#define DWC2_HFNUM_MAX_FRNUM	/;"	d
DWC2_HPRT0_PRTCONNDET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTCONNDET	/;"	d
DWC2_HPRT0_PRTCONNDET_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTCONNDET_OFFSET	/;"	d
DWC2_HPRT0_PRTCONNSTS	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTCONNSTS	/;"	d
DWC2_HPRT0_PRTCONNSTS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTCONNSTS_OFFSET	/;"	d
DWC2_HPRT0_PRTENA	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTENA	/;"	d
DWC2_HPRT0_PRTENA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTENA_OFFSET	/;"	d
DWC2_HPRT0_PRTENCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTENCHNG	/;"	d
DWC2_HPRT0_PRTENCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTENCHNG_OFFSET	/;"	d
DWC2_HPRT0_PRTLNSTS_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTLNSTS_MASK	/;"	d
DWC2_HPRT0_PRTLNSTS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTLNSTS_OFFSET	/;"	d
DWC2_HPRT0_PRTOVRCURRACT	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTOVRCURRACT	/;"	d
DWC2_HPRT0_PRTOVRCURRACT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTOVRCURRACT_OFFSET	/;"	d
DWC2_HPRT0_PRTOVRCURRCHNG	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTOVRCURRCHNG	/;"	d
DWC2_HPRT0_PRTOVRCURRCHNG_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTOVRCURRCHNG_OFFSET	/;"	d
DWC2_HPRT0_PRTPWR	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTPWR	/;"	d
DWC2_HPRT0_PRTPWR_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTPWR_OFFSET	/;"	d
DWC2_HPRT0_PRTRES	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTRES	/;"	d
DWC2_HPRT0_PRTRES_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTRES_OFFSET	/;"	d
DWC2_HPRT0_PRTRST	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTRST	/;"	d
DWC2_HPRT0_PRTRST_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTRST_OFFSET	/;"	d
DWC2_HPRT0_PRTSPD_FULL	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSPD_FULL	/;"	d
DWC2_HPRT0_PRTSPD_HIGH	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSPD_HIGH	/;"	d
DWC2_HPRT0_PRTSPD_LOW	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSPD_LOW	/;"	d
DWC2_HPRT0_PRTSPD_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSPD_MASK	/;"	d
DWC2_HPRT0_PRTSPD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSPD_OFFSET	/;"	d
DWC2_HPRT0_PRTSUSP	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSUSP	/;"	d
DWC2_HPRT0_PRTSUSP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTSUSP_OFFSET	/;"	d
DWC2_HPRT0_PRTTSTCTL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTTSTCTL_MASK	/;"	d
DWC2_HPRT0_PRTTSTCTL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPRT0_PRTTSTCTL_OFFSET	/;"	d
DWC2_HPTXSTS_PTXFSPCAVAIL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXFSPCAVAIL_MASK	/;"	d
DWC2_HPTXSTS_PTXFSPCAVAIL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXFSPCAVAIL_OFFSET	/;"	d
DWC2_HPTXSTS_PTXQSPCAVAIL_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQSPCAVAIL_MASK	/;"	d
DWC2_HPTXSTS_PTXQSPCAVAIL_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQSPCAVAIL_OFFSET	/;"	d
DWC2_HPTXSTS_PTXQTOP_CHNUM_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_CHNUM_MASK	/;"	d
DWC2_HPTXSTS_PTXQTOP_CHNUM_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_CHNUM_OFFSET	/;"	d
DWC2_HPTXSTS_PTXQTOP_ODD	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_ODD	/;"	d
DWC2_HPTXSTS_PTXQTOP_ODD_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_ODD_OFFSET	/;"	d
DWC2_HPTXSTS_PTXQTOP_TERMINATE	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_TERMINATE	/;"	d
DWC2_HPTXSTS_PTXQTOP_TERMINATE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_TERMINATE_OFFSET	/;"	d
DWC2_HPTXSTS_PTXQTOP_TOKEN_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_TOKEN_MASK	/;"	d
DWC2_HPTXSTS_PTXQTOP_TOKEN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HPTXSTS_PTXQTOP_TOKEN_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR0_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR0_MASK	/;"	d
DWC2_HWCFG1_EP_DIR0_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR0_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR10_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR10_MASK	/;"	d
DWC2_HWCFG1_EP_DIR10_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR10_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR11_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR11_MASK	/;"	d
DWC2_HWCFG1_EP_DIR11_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR11_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR12_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR12_MASK	/;"	d
DWC2_HWCFG1_EP_DIR12_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR12_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR13_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR13_MASK	/;"	d
DWC2_HWCFG1_EP_DIR13_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR13_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR14_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR14_MASK	/;"	d
DWC2_HWCFG1_EP_DIR14_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR14_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR15_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR15_MASK	/;"	d
DWC2_HWCFG1_EP_DIR15_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR15_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR1_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR1_MASK	/;"	d
DWC2_HWCFG1_EP_DIR1_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR1_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR2_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR2_MASK	/;"	d
DWC2_HWCFG1_EP_DIR2_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR2_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR3_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR3_MASK	/;"	d
DWC2_HWCFG1_EP_DIR3_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR3_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR4_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR4_MASK	/;"	d
DWC2_HWCFG1_EP_DIR4_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR4_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR5_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR5_MASK	/;"	d
DWC2_HWCFG1_EP_DIR5_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR5_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR6_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR6_MASK	/;"	d
DWC2_HWCFG1_EP_DIR6_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR6_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR7_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR7_MASK	/;"	d
DWC2_HWCFG1_EP_DIR7_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR7_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR8_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR8_MASK	/;"	d
DWC2_HWCFG1_EP_DIR8_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR8_OFFSET	/;"	d
DWC2_HWCFG1_EP_DIR9_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR9_MASK	/;"	d
DWC2_HWCFG1_EP_DIR9_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG1_EP_DIR9_OFFSET	/;"	d
DWC2_HWCFG2_ARCHITECTURE_EXT_DMA	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_ARCHITECTURE_EXT_DMA	/;"	d
DWC2_HWCFG2_ARCHITECTURE_INT_DMA	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_ARCHITECTURE_INT_DMA	/;"	d
DWC2_HWCFG2_ARCHITECTURE_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_ARCHITECTURE_MASK	/;"	d
DWC2_HWCFG2_ARCHITECTURE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_ARCHITECTURE_OFFSET	/;"	d
DWC2_HWCFG2_ARCHITECTURE_SLAVE_ONLY	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_ARCHITECTURE_SLAVE_ONLY	/;"	d
DWC2_HWCFG2_DEV_TOKEN_Q_DEPTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_DEV_TOKEN_Q_DEPTH_MASK	/;"	d
DWC2_HWCFG2_DEV_TOKEN_Q_DEPTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_DEV_TOKEN_Q_DEPTH_OFFSET	/;"	d
DWC2_HWCFG2_DYNAMIC_FIFO	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_DYNAMIC_FIFO	/;"	d
DWC2_HWCFG2_DYNAMIC_FIFO_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_DYNAMIC_FIFO_OFFSET	/;"	d
DWC2_HWCFG2_FS_PHY_TYPE_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_FS_PHY_TYPE_MASK	/;"	d
DWC2_HWCFG2_FS_PHY_TYPE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_FS_PHY_TYPE_OFFSET	/;"	d
DWC2_HWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK	/;"	d
DWC2_HWCFG2_HOST_PERIO_TX_Q_DEPTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_HOST_PERIO_TX_Q_DEPTH_OFFSET	/;"	d
DWC2_HWCFG2_HS_PHY_TYPE_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_HS_PHY_TYPE_MASK	/;"	d
DWC2_HWCFG2_HS_PHY_TYPE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_HS_PHY_TYPE_OFFSET	/;"	d
DWC2_HWCFG2_MULTI_PROC_INT	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_MULTI_PROC_INT	/;"	d
DWC2_HWCFG2_MULTI_PROC_INT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_MULTI_PROC_INT_OFFSET	/;"	d
DWC2_HWCFG2_NONPERIO_TX_Q_DEPTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_NONPERIO_TX_Q_DEPTH_MASK	/;"	d
DWC2_HWCFG2_NONPERIO_TX_Q_DEPTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_NONPERIO_TX_Q_DEPTH_OFFSET	/;"	d
DWC2_HWCFG2_NUM_DEV_EP_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_NUM_DEV_EP_MASK	/;"	d
DWC2_HWCFG2_NUM_DEV_EP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_NUM_DEV_EP_OFFSET	/;"	d
DWC2_HWCFG2_NUM_HOST_CHAN_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_NUM_HOST_CHAN_MASK	/;"	d
DWC2_HWCFG2_NUM_HOST_CHAN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_NUM_HOST_CHAN_OFFSET	/;"	d
DWC2_HWCFG2_OP_MODE_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_OP_MODE_MASK	/;"	d
DWC2_HWCFG2_OP_MODE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_OP_MODE_OFFSET	/;"	d
DWC2_HWCFG2_PERIO_EP_SUPPORTED	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_PERIO_EP_SUPPORTED	/;"	d
DWC2_HWCFG2_PERIO_EP_SUPPORTED_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_PERIO_EP_SUPPORTED_OFFSET	/;"	d
DWC2_HWCFG2_POINT2POINT	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_POINT2POINT	/;"	d
DWC2_HWCFG2_POINT2POINT_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG2_POINT2POINT_OFFSET	/;"	d
DWC2_HWCFG3_DFIFO_DEPTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_DFIFO_DEPTH_MASK	/;"	d
DWC2_HWCFG3_DFIFO_DEPTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_DFIFO_DEPTH_OFFSET	/;"	d
DWC2_HWCFG3_I2C	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_I2C	/;"	d
DWC2_HWCFG3_I2C_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_I2C_OFFSET	/;"	d
DWC2_HWCFG3_OPTIONAL_FEATURES	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OPTIONAL_FEATURES	/;"	d
DWC2_HWCFG3_OPTIONAL_FEATURES_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OPTIONAL_FEATURES_OFFSET	/;"	d
DWC2_HWCFG3_OTG_ENABLE_HSIC	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_ENABLE_HSIC	/;"	d
DWC2_HWCFG3_OTG_ENABLE_HSIC_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_ENABLE_HSIC_OFFSET	/;"	d
DWC2_HWCFG3_OTG_ENABLE_IC_USB	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_ENABLE_IC_USB	/;"	d
DWC2_HWCFG3_OTG_ENABLE_IC_USB_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_ENABLE_IC_USB_OFFSET	/;"	d
DWC2_HWCFG3_OTG_FUNC	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_FUNC	/;"	d
DWC2_HWCFG3_OTG_FUNC_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_FUNC_OFFSET	/;"	d
DWC2_HWCFG3_OTG_LPM_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_LPM_EN	/;"	d
DWC2_HWCFG3_OTG_LPM_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_OTG_LPM_EN_OFFSET	/;"	d
DWC2_HWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK	/;"	d
DWC2_HWCFG3_PACKET_SIZE_CNTR_WIDTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_PACKET_SIZE_CNTR_WIDTH_OFFSET	/;"	d
DWC2_HWCFG3_SYNCH_RESET_TYPE	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_SYNCH_RESET_TYPE	/;"	d
DWC2_HWCFG3_SYNCH_RESET_TYPE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_SYNCH_RESET_TYPE_OFFSET	/;"	d
DWC2_HWCFG3_VENDOR_CTRL_IF	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_VENDOR_CTRL_IF	/;"	d
DWC2_HWCFG3_VENDOR_CTRL_IF_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_VENDOR_CTRL_IF_OFFSET	/;"	d
DWC2_HWCFG3_XFER_SIZE_CNTR_WIDTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_XFER_SIZE_CNTR_WIDTH_MASK	/;"	d
DWC2_HWCFG3_XFER_SIZE_CNTR_WIDTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG3_XFER_SIZE_CNTR_WIDTH_OFFSET	/;"	d
DWC2_HWCFG4_A_VALID_FILT_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_A_VALID_FILT_EN	/;"	d
DWC2_HWCFG4_A_VALID_FILT_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_A_VALID_FILT_EN_OFFSET	/;"	d
DWC2_HWCFG4_B_VALID_FILT_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_B_VALID_FILT_EN	/;"	d
DWC2_HWCFG4_B_VALID_FILT_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_B_VALID_FILT_EN_OFFSET	/;"	d
DWC2_HWCFG4_DED_FIFO_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_DED_FIFO_EN	/;"	d
DWC2_HWCFG4_DED_FIFO_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_DED_FIFO_EN_OFFSET	/;"	d
DWC2_HWCFG4_DESC_DMA	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_DESC_DMA	/;"	d
DWC2_HWCFG4_DESC_DMA_DYN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_DESC_DMA_DYN	/;"	d
DWC2_HWCFG4_DESC_DMA_DYN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_DESC_DMA_DYN_OFFSET	/;"	d
DWC2_HWCFG4_DESC_DMA_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_DESC_DMA_OFFSET	/;"	d
DWC2_HWCFG4_IDDIG_FILT_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_IDDIG_FILT_EN	/;"	d
DWC2_HWCFG4_IDDIG_FILT_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_IDDIG_FILT_EN_OFFSET	/;"	d
DWC2_HWCFG4_MIN_AHB_FREQ_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_MIN_AHB_FREQ_MASK	/;"	d
DWC2_HWCFG4_MIN_AHB_FREQ_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_MIN_AHB_FREQ_OFFSET	/;"	d
DWC2_HWCFG4_NUM_DEV_MODE_CTRL_EP_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_NUM_DEV_MODE_CTRL_EP_MASK	/;"	d
DWC2_HWCFG4_NUM_DEV_MODE_CTRL_EP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_NUM_DEV_MODE_CTRL_EP_OFFSET	/;"	d
DWC2_HWCFG4_NUM_DEV_PERIO_IN_EP_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_NUM_DEV_PERIO_IN_EP_MASK	/;"	d
DWC2_HWCFG4_NUM_DEV_PERIO_IN_EP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_NUM_DEV_PERIO_IN_EP_OFFSET	/;"	d
DWC2_HWCFG4_NUM_IN_EPS_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_NUM_IN_EPS_MASK	/;"	d
DWC2_HWCFG4_NUM_IN_EPS_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_NUM_IN_EPS_OFFSET	/;"	d
DWC2_HWCFG4_POWER_OPTIMIZ	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_POWER_OPTIMIZ	/;"	d
DWC2_HWCFG4_POWER_OPTIMIZ_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_POWER_OPTIMIZ_OFFSET	/;"	d
DWC2_HWCFG4_SESSION_END_FILT_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_SESSION_END_FILT_EN	/;"	d
DWC2_HWCFG4_SESSION_END_FILT_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_SESSION_END_FILT_EN_OFFSET	/;"	d
DWC2_HWCFG4_UTMI_PHY_DATA_WIDTH_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_UTMI_PHY_DATA_WIDTH_MASK	/;"	d
DWC2_HWCFG4_UTMI_PHY_DATA_WIDTH_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_UTMI_PHY_DATA_WIDTH_OFFSET	/;"	d
DWC2_HWCFG4_VBUS_VALID_FILT_EN	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_VBUS_VALID_FILT_EN	/;"	d
DWC2_HWCFG4_VBUS_VALID_FILT_EN_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_HWCFG4_VBUS_VALID_FILT_EN_OFFSET	/;"	d
DWC2_MAX_ENDPOINTS	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define DWC2_MAX_ENDPOINTS	/;"	d
DWC2_MAX_HW_ENDPOINTS	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define DWC2_MAX_HW_ENDPOINTS	/;"	d
DWC2_PCGCCTL_DEEP_SLEEP	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_DEEP_SLEEP	/;"	d
DWC2_PCGCCTL_DEEP_SLEEP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_DEEP_SLEEP_OFFSET	/;"	d
DWC2_PCGCCTL_ENBL_SLEEP_GATING	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_ENBL_SLEEP_GATING	/;"	d
DWC2_PCGCCTL_ENBL_SLEEP_GATING_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_ENBL_SLEEP_GATING_OFFSET	/;"	d
DWC2_PCGCCTL_GATEHCLK	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_GATEHCLK	/;"	d
DWC2_PCGCCTL_GATEHCLK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_GATEHCLK_OFFSET	/;"	d
DWC2_PCGCCTL_PHYSUSPENDED	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_PHYSUSPENDED	/;"	d
DWC2_PCGCCTL_PHYSUSPENDED_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_PHYSUSPENDED_OFFSET	/;"	d
DWC2_PCGCCTL_PHY_IN_SLEEP	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_PHY_IN_SLEEP	/;"	d
DWC2_PCGCCTL_PHY_IN_SLEEP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_PHY_IN_SLEEP_OFFSET	/;"	d
DWC2_PCGCCTL_PWRCLMP	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_PWRCLMP	/;"	d
DWC2_PCGCCTL_PWRCLMP_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_PWRCLMP_OFFSET	/;"	d
DWC2_PCGCCTL_RSTPDWNMODULE	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_RSTPDWNMODULE	/;"	d
DWC2_PCGCCTL_RSTPDWNMODULE_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_RSTPDWNMODULE_OFFSET	/;"	d
DWC2_PCGCCTL_STOPPCLK	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_STOPPCLK	/;"	d
DWC2_PCGCCTL_STOPPCLK_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_PCGCCTL_STOPPCLK_OFFSET	/;"	d
DWC2_PHY_TYPE_FS	drivers/usb/host/dwc2.h	/^#define DWC2_PHY_TYPE_FS	/;"	d
DWC2_PHY_TYPE_ULPI	drivers/usb/host/dwc2.h	/^#define DWC2_PHY_TYPE_ULPI	/;"	d
DWC2_PHY_TYPE_UTMI	drivers/usb/host/dwc2.h	/^#define DWC2_PHY_TYPE_UTMI	/;"	d
DWC2_SNPSID_DEVID_MASK	drivers/usb/host/dwc2.h	/^#define DWC2_SNPSID_DEVID_MASK	/;"	d
DWC2_SNPSID_DEVID_OFFSET	drivers/usb/host/dwc2.h	/^#define DWC2_SNPSID_DEVID_OFFSET	/;"	d
DWC2_SNPSID_DEVID_VER_2xx	drivers/usb/host/dwc2.h	/^#define DWC2_SNPSID_DEVID_VER_2xx	/;"	d
DWC2_SNPSID_DEVID_VER_3xx	drivers/usb/host/dwc2.h	/^#define DWC2_SNPSID_DEVID_VER_3xx	/;"	d
DWC2_STATUS_BUF_SIZE	drivers/usb/host/dwc2.c	/^#define DWC2_STATUS_BUF_SIZE	/;"	d	file:
DWC3_ALIGN_MASK	drivers/usb/dwc3/core.c	/^#define DWC3_ALIGN_MASK	/;"	d	file:
DWC3_DALEPENA	drivers/usb/dwc3/core.h	/^#define DWC3_DALEPENA	/;"	d
DWC3_DALEPENA_EP	drivers/usb/dwc3/core.h	/^#define DWC3_DALEPENA_EP(/;"	d
DWC3_DCFG	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG	/;"	d
DWC3_DCFG_DEVADDR	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_DEVADDR(/;"	d
DWC3_DCFG_DEVADDR_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_DEVADDR_MASK	/;"	d
DWC3_DCFG_FULLSPEED1	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_FULLSPEED1	/;"	d
DWC3_DCFG_FULLSPEED2	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_FULLSPEED2	/;"	d
DWC3_DCFG_HIGHSPEED	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_HIGHSPEED	/;"	d
DWC3_DCFG_LOWSPEED	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_LOWSPEED	/;"	d
DWC3_DCFG_LPM_CAP	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_LPM_CAP	/;"	d
DWC3_DCFG_SPEED_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_SPEED_MASK	/;"	d
DWC3_DCFG_SUPERSPEED	drivers/usb/dwc3/core.h	/^#define DWC3_DCFG_SUPERSPEED	/;"	d
DWC3_DCTL	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL	/;"	d
DWC3_DCTL_ACCEPTU1ENA	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ACCEPTU1ENA	/;"	d
DWC3_DCTL_ACCEPTU2ENA	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ACCEPTU2ENA	/;"	d
DWC3_DCTL_APPL1RES	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_APPL1RES	/;"	d
DWC3_DCTL_CRS	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_CRS	/;"	d
DWC3_DCTL_CSFTRST	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_CSFTRST	/;"	d
DWC3_DCTL_CSFTRST	include/linux/usb/dwc3.h	/^#define DWC3_DCTL_CSFTRST	/;"	d
DWC3_DCTL_CSS	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_CSS	/;"	d
DWC3_DCTL_HIRD_THRES	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_HIRD_THRES(/;"	d
DWC3_DCTL_HIRD_THRES_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_HIRD_THRES_MASK	/;"	d
DWC3_DCTL_INITU1ENA	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_INITU1ENA	/;"	d
DWC3_DCTL_INITU2ENA	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_INITU2ENA	/;"	d
DWC3_DCTL_KEEP_CONNECT	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_KEEP_CONNECT	/;"	d
DWC3_DCTL_L1_HIBER_EN	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_L1_HIBER_EN	/;"	d
DWC3_DCTL_LPM_ERRATA	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_LPM_ERRATA(/;"	d
DWC3_DCTL_LPM_ERRATA_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_LPM_ERRATA_MASK	/;"	d
DWC3_DCTL_LSFTRST	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_LSFTRST	/;"	d
DWC3_DCTL_LSFTRST	include/linux/usb/dwc3.h	/^#define DWC3_DCTL_LSFTRST	/;"	d
DWC3_DCTL_RUN_STOP	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_RUN_STOP	/;"	d
DWC3_DCTL_RUN_STOP	include/linux/usb/dwc3.h	/^#define DWC3_DCTL_RUN_STOP	/;"	d
DWC3_DCTL_TRGTULST	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST(/;"	d
DWC3_DCTL_TRGTULST_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST_MASK	/;"	d
DWC3_DCTL_TRGTULST_RX_DET	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST_RX_DET	/;"	d
DWC3_DCTL_TRGTULST_SS_DIS	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST_SS_DIS	/;"	d
DWC3_DCTL_TRGTULST_SS_INACT	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST_SS_INACT	/;"	d
DWC3_DCTL_TRGTULST_U2	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST_U2	/;"	d
DWC3_DCTL_TRGTULST_U3	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TRGTULST_U3	/;"	d
DWC3_DCTL_TSTCTRL_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_TSTCTRL_MASK	/;"	d
DWC3_DCTL_ULSTCHNGREQ	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNGREQ(/;"	d
DWC3_DCTL_ULSTCHNGREQ_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNGREQ_MASK	/;"	d
DWC3_DCTL_ULSTCHNG_COMPLIANCE	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_COMPLIANCE	/;"	d
DWC3_DCTL_ULSTCHNG_LOOPBACK	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_LOOPBACK	/;"	d
DWC3_DCTL_ULSTCHNG_NO_ACTION	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_NO_ACTION	/;"	d
DWC3_DCTL_ULSTCHNG_RECOVERY	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_RECOVERY	/;"	d
DWC3_DCTL_ULSTCHNG_RX_DETECT	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_RX_DETECT	/;"	d
DWC3_DCTL_ULSTCHNG_SS_DISABLED	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_SS_DISABLED	/;"	d
DWC3_DCTL_ULSTCHNG_SS_INACTIVE	drivers/usb/dwc3/core.h	/^#define DWC3_DCTL_ULSTCHNG_SS_INACTIVE	/;"	d
DWC3_DEPCFG_ACTION_INIT	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_ACTION_INIT	/;"	d
DWC3_DEPCFG_ACTION_MODIFY	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_ACTION_MODIFY	/;"	d
DWC3_DEPCFG_ACTION_RESTORE	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_ACTION_RESTORE	/;"	d
DWC3_DEPCFG_BINTERVAL_M1	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_BINTERVAL_M1(/;"	d
DWC3_DEPCFG_BULK_BASED	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_BULK_BASED	/;"	d
DWC3_DEPCFG_BURST_SIZE	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_BURST_SIZE(/;"	d
DWC3_DEPCFG_DATA_SEQ_NUM	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_DATA_SEQ_NUM(/;"	d
DWC3_DEPCFG_EP_NUMBER	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_EP_NUMBER(/;"	d
DWC3_DEPCFG_EP_TYPE	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_EP_TYPE(/;"	d
DWC3_DEPCFG_FIFO_BASED	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_FIFO_BASED	/;"	d
DWC3_DEPCFG_FIFO_ERROR_EN	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_FIFO_ERROR_EN	/;"	d
DWC3_DEPCFG_FIFO_NUMBER	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_FIFO_NUMBER(/;"	d
DWC3_DEPCFG_IGN_SEQ_NUM	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_IGN_SEQ_NUM	/;"	d
DWC3_DEPCFG_INT_NUM	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_INT_NUM(/;"	d
DWC3_DEPCFG_MAX_PACKET_SIZE	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_MAX_PACKET_SIZE(/;"	d
DWC3_DEPCFG_STREAM_CAPABLE	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_STREAM_CAPABLE	/;"	d
DWC3_DEPCFG_STREAM_EVENT_EN	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_STREAM_EVENT_EN	/;"	d
DWC3_DEPCFG_XFER_COMPLETE_EN	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_XFER_COMPLETE_EN	/;"	d
DWC3_DEPCFG_XFER_IN_PROGRESS_EN	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_XFER_IN_PROGRESS_EN	/;"	d
DWC3_DEPCFG_XFER_NOT_READY_EN	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPCFG_XFER_NOT_READY_EN	/;"	d
DWC3_DEPCMD	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD(/;"	d
DWC3_DEPCMDPAR0	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMDPAR0(/;"	d
DWC3_DEPCMDPAR1	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMDPAR1(/;"	d
DWC3_DEPCMDPAR2	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMDPAR2(/;"	d
DWC3_DEPCMD_CLEARSTALL	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_CLEARSTALL	/;"	d
DWC3_DEPCMD_CMDACT	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_CMDACT	/;"	d
DWC3_DEPCMD_CMDIOC	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_CMDIOC	/;"	d
DWC3_DEPCMD_DEPSTARTCFG	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_DEPSTARTCFG	/;"	d
DWC3_DEPCMD_ENDTRANSFER	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_ENDTRANSFER	/;"	d
DWC3_DEPCMD_GETEPSTATE	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_GETEPSTATE	/;"	d
DWC3_DEPCMD_GETSEQNUMBER	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_GETSEQNUMBER	/;"	d
DWC3_DEPCMD_GET_RSC_IDX	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_GET_RSC_IDX(/;"	d
DWC3_DEPCMD_HIPRI_FORCERM	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_HIPRI_FORCERM	/;"	d
DWC3_DEPCMD_PARAM	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_PARAM(/;"	d
DWC3_DEPCMD_PARAM_SHIFT	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_PARAM_SHIFT	/;"	d
DWC3_DEPCMD_SETEPCONFIG	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_SETEPCONFIG	/;"	d
DWC3_DEPCMD_SETSTALL	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_SETSTALL	/;"	d
DWC3_DEPCMD_SETTRANSFRESOURCE	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_SETTRANSFRESOURCE	/;"	d
DWC3_DEPCMD_STARTTRANSFER	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_STARTTRANSFER	/;"	d
DWC3_DEPCMD_STATUS	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_STATUS(/;"	d
DWC3_DEPCMD_TYPE_BULK	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_TYPE_BULK	/;"	d
DWC3_DEPCMD_TYPE_CONTROL	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_TYPE_CONTROL	/;"	d
DWC3_DEPCMD_TYPE_INTR	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_TYPE_INTR	/;"	d
DWC3_DEPCMD_TYPE_ISOC	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_TYPE_ISOC	/;"	d
DWC3_DEPCMD_UPDATETRANSFER	drivers/usb/dwc3/core.h	/^#define DWC3_DEPCMD_UPDATETRANSFER	/;"	d
DWC3_DEPEVT_EPCMDCMPLT	drivers/usb/dwc3/core.h	/^#define DWC3_DEPEVT_EPCMDCMPLT	/;"	d
DWC3_DEPEVT_RXTXFIFOEVT	drivers/usb/dwc3/core.h	/^#define DWC3_DEPEVT_RXTXFIFOEVT	/;"	d
DWC3_DEPEVT_STREAMEVT	drivers/usb/dwc3/core.h	/^#define DWC3_DEPEVT_STREAMEVT	/;"	d
DWC3_DEPEVT_XFERCOMPLETE	drivers/usb/dwc3/core.h	/^#define DWC3_DEPEVT_XFERCOMPLETE	/;"	d
DWC3_DEPEVT_XFERINPROGRESS	drivers/usb/dwc3/core.h	/^#define DWC3_DEPEVT_XFERINPROGRESS	/;"	d
DWC3_DEPEVT_XFERNOTREADY	drivers/usb/dwc3/core.h	/^#define DWC3_DEPEVT_XFERNOTREADY	/;"	d
DWC3_DEPXFERCFG_NUM_XFER_RES	drivers/usb/dwc3/gadget.h	/^#define DWC3_DEPXFERCFG_NUM_XFER_RES(/;"	d
DWC3_DEVICE_EVENT_CMD_CMPL	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_CMD_CMPL	/;"	d
DWC3_DEVICE_EVENT_CMD_CMPL	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_CMD_CMPL	/;"	d
DWC3_DEVICE_EVENT_CONNECT_DONE	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_CONNECT_DONE	/;"	d
DWC3_DEVICE_EVENT_CONNECT_DONE	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_CONNECT_DONE	/;"	d
DWC3_DEVICE_EVENT_DISCONNECT	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_DISCONNECT	/;"	d
DWC3_DEVICE_EVENT_DISCONNECT	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_DISCONNECT	/;"	d
DWC3_DEVICE_EVENT_EOPF	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_EOPF	/;"	d
DWC3_DEVICE_EVENT_EOPF	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_EOPF	/;"	d
DWC3_DEVICE_EVENT_ERRATIC_ERROR	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_ERRATIC_ERROR	/;"	d
DWC3_DEVICE_EVENT_ERRATIC_ERROR	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_ERRATIC_ERROR	/;"	d
DWC3_DEVICE_EVENT_HIBER_REQ	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_HIBER_REQ	/;"	d
DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE	/;"	d
DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE	/;"	d
DWC3_DEVICE_EVENT_OVERFLOW	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_OVERFLOW	/;"	d
DWC3_DEVICE_EVENT_OVERFLOW	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_OVERFLOW	/;"	d
DWC3_DEVICE_EVENT_RESET	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_RESET	/;"	d
DWC3_DEVICE_EVENT_RESET	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_RESET	/;"	d
DWC3_DEVICE_EVENT_SOF	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_SOF	/;"	d
DWC3_DEVICE_EVENT_SOF	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_SOF	/;"	d
DWC3_DEVICE_EVENT_WAKEUP	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_EVENT_WAKEUP	/;"	d
DWC3_DEVICE_EVENT_WAKEUP	include/linux/usb/dwc3.h	/^#define DWC3_DEVICE_EVENT_WAKEUP	/;"	d
DWC3_DEVICE_REGS_END	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_REGS_END	/;"	d
DWC3_DEVICE_REGS_START	drivers/usb/dwc3/core.h	/^#define DWC3_DEVICE_REGS_START	/;"	d
DWC3_DEVTEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN	/;"	d
DWC3_DEVTEN_CMDCMPLTEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_CMDCMPLTEN	/;"	d
DWC3_DEVTEN_CONNECTDONEEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_CONNECTDONEEN	/;"	d
DWC3_DEVTEN_DISCONNEVTEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_DISCONNEVTEN	/;"	d
DWC3_DEVTEN_EOPFEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_EOPFEN	/;"	d
DWC3_DEVTEN_ERRTICERREN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_ERRTICERREN	/;"	d
DWC3_DEVTEN_EVNTOVERFLOWEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_EVNTOVERFLOWEN	/;"	d
DWC3_DEVTEN_HIBERNATIONREQEVTEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_HIBERNATIONREQEVTEN	/;"	d
DWC3_DEVTEN_SOFEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_SOFEN	/;"	d
DWC3_DEVTEN_ULSTCNGEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_ULSTCNGEN	/;"	d
DWC3_DEVTEN_USBRSTEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_USBRSTEN	/;"	d
DWC3_DEVTEN_VNDRDEVTSTRCVEDEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_VNDRDEVTSTRCVEDEN	/;"	d
DWC3_DEVTEN_WKUPEVTEN	drivers/usb/dwc3/core.h	/^#define DWC3_DEVTEN_WKUPEVTEN	/;"	d
DWC3_DGCMD	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD	/;"	d
DWC3_DGCMDPAR	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR	/;"	d
DWC3_DGCMDPAR_FIFO_NUM	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR_FIFO_NUM(/;"	d
DWC3_DGCMDPAR_FORCE_LINKPM_ACCEPT	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR_FORCE_LINKPM_ACCEPT	/;"	d
DWC3_DGCMDPAR_LOOPBACK_DIS	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR_LOOPBACK_DIS	/;"	d
DWC3_DGCMDPAR_LOOPBACK_ENA	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR_LOOPBACK_ENA	/;"	d
DWC3_DGCMDPAR_RX_FIFO	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR_RX_FIFO	/;"	d
DWC3_DGCMDPAR_TX_FIFO	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMDPAR_TX_FIFO	/;"	d
DWC3_DGCMD_ALL_FIFO_FLUSH	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_ALL_FIFO_FLUSH	/;"	d
DWC3_DGCMD_CMDACT	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_CMDACT	/;"	d
DWC3_DGCMD_CMDIOC	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_CMDIOC	/;"	d
DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK	/;"	d
DWC3_DGCMD_SELECTED_FIFO_FLUSH	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_SELECTED_FIFO_FLUSH	/;"	d
DWC3_DGCMD_SET_ENDPOINT_NRDY	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_SET_ENDPOINT_NRDY	/;"	d
DWC3_DGCMD_SET_LMP	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_SET_LMP	/;"	d
DWC3_DGCMD_SET_PERIODIC_PAR	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_SET_PERIODIC_PAR	/;"	d
DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI	/;"	d
DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO	/;"	d
DWC3_DGCMD_STATUS	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_STATUS(/;"	d
DWC3_DGCMD_XMIT_FUNCTION	drivers/usb/dwc3/core.h	/^#define DWC3_DGCMD_XMIT_FUNCTION	/;"	d
DWC3_DSTS	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS	/;"	d
DWC3_DSTS_CONNECTSPD	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_CONNECTSPD	/;"	d
DWC3_DSTS_COREIDLE	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_COREIDLE	/;"	d
DWC3_DSTS_DCNRD	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_DCNRD	/;"	d
DWC3_DSTS_DEVCTRLHLT	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_DEVCTRLHLT	/;"	d
DWC3_DSTS_FULLSPEED1	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_FULLSPEED1	/;"	d
DWC3_DSTS_FULLSPEED2	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_FULLSPEED2	/;"	d
DWC3_DSTS_HIGHSPEED	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_HIGHSPEED	/;"	d
DWC3_DSTS_LOWSPEED	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_LOWSPEED	/;"	d
DWC3_DSTS_PWRUPREQ	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_PWRUPREQ	/;"	d
DWC3_DSTS_RSS	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_RSS	/;"	d
DWC3_DSTS_RXFIFOEMPTY	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_RXFIFOEMPTY	/;"	d
DWC3_DSTS_SOFFN	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_SOFFN(/;"	d
DWC3_DSTS_SOFFN_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_SOFFN_MASK	/;"	d
DWC3_DSTS_SSS	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_SSS	/;"	d
DWC3_DSTS_SUPERSPEED	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_SUPERSPEED	/;"	d
DWC3_DSTS_USBLNKST	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_USBLNKST(/;"	d
DWC3_DSTS_USBLNKST_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_DSTS_USBLNKST_MASK	/;"	d
DWC3_ENDPOINTS_NUM	drivers/usb/dwc3/core.h	/^#define DWC3_ENDPOINTS_NUM	/;"	d
DWC3_ENDPOINTS_NUM	include/linux/usb/dwc3.h	/^#define DWC3_ENDPOINTS_NUM	/;"	d
DWC3_EP0_BOUNCE_SIZE	drivers/usb/dwc3/core.h	/^#define DWC3_EP0_BOUNCE_SIZE	/;"	d
DWC3_EP0_COMPLETE	drivers/usb/dwc3/core.h	/^	DWC3_EP0_COMPLETE,$/;"	e	enum:dwc3_ep0_next
DWC3_EP0_DIR_IN	drivers/usb/dwc3/core.h	/^#define DWC3_EP0_DIR_IN	/;"	d
DWC3_EP0_NRDY_DATA	drivers/usb/dwc3/core.h	/^	DWC3_EP0_NRDY_DATA,$/;"	e	enum:dwc3_ep0_next
DWC3_EP0_NRDY_STATUS	drivers/usb/dwc3/core.h	/^	DWC3_EP0_NRDY_STATUS,$/;"	e	enum:dwc3_ep0_next
DWC3_EP0_UNKNOWN	drivers/usb/dwc3/core.h	/^	DWC3_EP0_UNKNOWN = 0,$/;"	e	enum:dwc3_ep0_next
DWC3_EP_BUSY	drivers/usb/dwc3/core.h	/^#define DWC3_EP_BUSY	/;"	d
DWC3_EP_DIRECTION_RX	drivers/usb/dwc3/core.h	/^#define DWC3_EP_DIRECTION_RX	/;"	d
DWC3_EP_DIRECTION_TX	drivers/usb/dwc3/core.h	/^#define DWC3_EP_DIRECTION_TX	/;"	d
DWC3_EP_ENABLED	drivers/usb/dwc3/core.h	/^#define DWC3_EP_ENABLED	/;"	d
DWC3_EP_FLAG_STALLED	drivers/usb/dwc3/core.h	/^#define DWC3_EP_FLAG_STALLED	/;"	d
DWC3_EP_FLAG_WEDGED	drivers/usb/dwc3/core.h	/^#define DWC3_EP_FLAG_WEDGED	/;"	d
DWC3_EP_MISSED_ISOC	drivers/usb/dwc3/core.h	/^#define DWC3_EP_MISSED_ISOC	/;"	d
DWC3_EP_PENDING_REQUEST	drivers/usb/dwc3/core.h	/^#define DWC3_EP_PENDING_REQUEST	/;"	d
DWC3_EP_STALL	drivers/usb/dwc3/core.h	/^#define DWC3_EP_STALL	/;"	d
DWC3_EP_WEDGE	drivers/usb/dwc3/core.h	/^#define DWC3_EP_WEDGE	/;"	d
DWC3_EVENT_BUFFERS_SIZE	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_BUFFERS_SIZE	/;"	d
DWC3_EVENT_BUFFERS_SIZE	include/linux/usb/dwc3.h	/^#define DWC3_EVENT_BUFFERS_SIZE	/;"	d
DWC3_EVENT_MAX_NUM	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_MAX_NUM	/;"	d
DWC3_EVENT_PENDING	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_PENDING	/;"	d
DWC3_EVENT_SIZE	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_SIZE	/;"	d
DWC3_EVENT_TYPE_CARKIT	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_TYPE_CARKIT	/;"	d
DWC3_EVENT_TYPE_CARKIT	include/linux/usb/dwc3.h	/^#define DWC3_EVENT_TYPE_CARKIT	/;"	d
DWC3_EVENT_TYPE_DEV	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_TYPE_DEV	/;"	d
DWC3_EVENT_TYPE_DEV	include/linux/usb/dwc3.h	/^#define DWC3_EVENT_TYPE_DEV	/;"	d
DWC3_EVENT_TYPE_I2C	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_TYPE_I2C	/;"	d
DWC3_EVENT_TYPE_I2C	include/linux/usb/dwc3.h	/^#define DWC3_EVENT_TYPE_I2C	/;"	d
DWC3_EVENT_TYPE_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_EVENT_TYPE_MASK	/;"	d
DWC3_EVENT_TYPE_MASK	include/linux/usb/dwc3.h	/^#define DWC3_EVENT_TYPE_MASK	/;"	d
DWC3_GBUSERRADDR0	drivers/usb/dwc3/core.h	/^#define DWC3_GBUSERRADDR0	/;"	d
DWC3_GBUSERRADDR1	drivers/usb/dwc3/core.h	/^#define DWC3_GBUSERRADDR1	/;"	d
DWC3_GCTL	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL	/;"	d
DWC3_GCTL_CLK_BUS	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_CLK_BUS	/;"	d
DWC3_GCTL_CLK_BUS	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_CLK_BUS	/;"	d
DWC3_GCTL_CLK_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_CLK_MASK	/;"	d
DWC3_GCTL_CLK_MASK	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_CLK_MASK	/;"	d
DWC3_GCTL_CLK_PIPE	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_CLK_PIPE	/;"	d
DWC3_GCTL_CLK_PIPE	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_CLK_PIPE	/;"	d
DWC3_GCTL_CLK_PIPEHALF	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_CLK_PIPEHALF	/;"	d
DWC3_GCTL_CLK_PIPEHALF	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_CLK_PIPEHALF	/;"	d
DWC3_GCTL_CORESOFTRESET	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_CORESOFTRESET	/;"	d
DWC3_GCTL_CORESOFTRESET	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_CORESOFTRESET	/;"	d
DWC3_GCTL_DISSCRAMBLE	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_DISSCRAMBLE	/;"	d
DWC3_GCTL_DISSCRAMBLE	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_DISSCRAMBLE	/;"	d
DWC3_GCTL_DSBLCLKGTNG	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_DSBLCLKGTNG	/;"	d
DWC3_GCTL_DSBLCLKGTNG	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_DSBLCLKGTNG	/;"	d
DWC3_GCTL_GBLHIBERNATIONEN	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_GBLHIBERNATIONEN	/;"	d
DWC3_GCTL_PRTCAP	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_PRTCAP(/;"	d
DWC3_GCTL_PRTCAP	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_PRTCAP(/;"	d
DWC3_GCTL_PRTCAPDIR	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_PRTCAPDIR(/;"	d
DWC3_GCTL_PRTCAPDIR	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_PRTCAPDIR(/;"	d
DWC3_GCTL_PRTCAP_DEVICE	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_PRTCAP_DEVICE	/;"	d
DWC3_GCTL_PRTCAP_DEVICE	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_PRTCAP_DEVICE	/;"	d
DWC3_GCTL_PRTCAP_HOST	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_PRTCAP_HOST	/;"	d
DWC3_GCTL_PRTCAP_HOST	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_PRTCAP_HOST	/;"	d
DWC3_GCTL_PRTCAP_OTG	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_PRTCAP_OTG	/;"	d
DWC3_GCTL_PRTCAP_OTG	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_PRTCAP_OTG	/;"	d
DWC3_GCTL_PWRDNSCALE	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_PWRDNSCALE(/;"	d
DWC3_GCTL_PWRDNSCALE	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_PWRDNSCALE(/;"	d
DWC3_GCTL_RAMCLKSEL	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_RAMCLKSEL(/;"	d
DWC3_GCTL_RAMCLKSEL	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_RAMCLKSEL(/;"	d
DWC3_GCTL_SCALEDOWN	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_SCALEDOWN(/;"	d
DWC3_GCTL_SCALEDOWN	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_SCALEDOWN(/;"	d
DWC3_GCTL_SCALEDOWN_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_SCALEDOWN_MASK	/;"	d
DWC3_GCTL_SCALEDOWN_MASK	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_SCALEDOWN_MASK	/;"	d
DWC3_GCTL_SOFITPSYNC	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_SOFITPSYNC	/;"	d
DWC3_GCTL_U2EXIT_LFPS	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_U2EXIT_LFPS	/;"	d
DWC3_GCTL_U2RSTECN	drivers/usb/dwc3/core.h	/^#define DWC3_GCTL_U2RSTECN	/;"	d
DWC3_GCTL_U2RSTECN	include/linux/usb/dwc3.h	/^#define DWC3_GCTL_U2RSTECN	/;"	d
DWC3_GDBGFIFOSPACE	drivers/usb/dwc3/core.h	/^#define DWC3_GDBGFIFOSPACE	/;"	d
DWC3_GDBGLTSSM	drivers/usb/dwc3/core.h	/^#define DWC3_GDBGLTSSM	/;"	d
DWC3_GEVNTADRHI	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTADRHI(/;"	d
DWC3_GEVNTADRLO	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTADRLO(/;"	d
DWC3_GEVNTCOUNT	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTCOUNT(/;"	d
DWC3_GEVNTCOUNT_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTCOUNT_MASK	/;"	d
DWC3_GEVNTCOUNT_MASK	include/linux/usb/dwc3.h	/^#define DWC3_GEVNTCOUNT_MASK	/;"	d
DWC3_GEVNTSIZ	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTSIZ(/;"	d
DWC3_GEVNTSIZ_INTMASK	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTSIZ_INTMASK	/;"	d
DWC3_GEVNTSIZ_SIZE	drivers/usb/dwc3/core.h	/^#define DWC3_GEVNTSIZ_SIZE(/;"	d
DWC3_GEVTEN	drivers/usb/dwc3/core.h	/^#define DWC3_GEVTEN	/;"	d
DWC3_GGPIO	drivers/usb/dwc3/core.h	/^#define DWC3_GGPIO	/;"	d
DWC3_GHWPARAMS0	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS0	/;"	d
DWC3_GHWPARAMS1	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1	/;"	d
DWC3_GHWPARAMS1_EN_PWROPT	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT(/;"	d
DWC3_GHWPARAMS1_EN_PWROPT	include/linux/usb/dwc3.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT(/;"	d
DWC3_GHWPARAMS1_EN_PWROPT_CLK	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT_CLK	/;"	d
DWC3_GHWPARAMS1_EN_PWROPT_CLK	include/linux/usb/dwc3.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT_CLK	/;"	d
DWC3_GHWPARAMS1_EN_PWROPT_HIB	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT_HIB	/;"	d
DWC3_GHWPARAMS1_EN_PWROPT_NO	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT_NO	/;"	d
DWC3_GHWPARAMS1_EN_PWROPT_NO	include/linux/usb/dwc3.h	/^#define DWC3_GHWPARAMS1_EN_PWROPT_NO	/;"	d
DWC3_GHWPARAMS1_PWROPT	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1_PWROPT(/;"	d
DWC3_GHWPARAMS1_PWROPT_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS1_PWROPT_MASK	/;"	d
DWC3_GHWPARAMS2	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS2	/;"	d
DWC3_GHWPARAMS3	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3	/;"	d
DWC3_GHWPARAMS3_FSPHY_IFC	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_FSPHY_IFC(/;"	d
DWC3_GHWPARAMS3_FSPHY_IFC_DIS	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_FSPHY_IFC_DIS	/;"	d
DWC3_GHWPARAMS3_FSPHY_IFC_ENA	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_FSPHY_IFC_ENA	/;"	d
DWC3_GHWPARAMS3_HSPHY_IFC	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_HSPHY_IFC(/;"	d
DWC3_GHWPARAMS3_HSPHY_IFC_DIS	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_HSPHY_IFC_DIS	/;"	d
DWC3_GHWPARAMS3_HSPHY_IFC_ULPI	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_HSPHY_IFC_ULPI	/;"	d
DWC3_GHWPARAMS3_HSPHY_IFC_UTMI	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI	/;"	d
DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI	/;"	d
DWC3_GHWPARAMS3_SSPHY_IFC	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_SSPHY_IFC(/;"	d
DWC3_GHWPARAMS3_SSPHY_IFC_DIS	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_SSPHY_IFC_DIS	/;"	d
DWC3_GHWPARAMS3_SSPHY_IFC_ENA	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS3_SSPHY_IFC_ENA	/;"	d
DWC3_GHWPARAMS4	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS4	/;"	d
DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(/;"	d
DWC3_GHWPARAMS5	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS5	/;"	d
DWC3_GHWPARAMS6	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS6	/;"	d
DWC3_GHWPARAMS6_EN_FPGA	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS6_EN_FPGA	/;"	d
DWC3_GHWPARAMS7	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS7	/;"	d
DWC3_GHWPARAMS8	drivers/usb/dwc3/core.h	/^#define DWC3_GHWPARAMS8	/;"	d
DWC3_GLOBALS_REGS_END	drivers/usb/dwc3/core.h	/^#define DWC3_GLOBALS_REGS_END	/;"	d
DWC3_GLOBALS_REGS_START	drivers/usb/dwc3/core.h	/^#define DWC3_GLOBALS_REGS_START	/;"	d
DWC3_GPRTBIMAP0	drivers/usb/dwc3/core.h	/^#define DWC3_GPRTBIMAP0	/;"	d
DWC3_GPRTBIMAP1	drivers/usb/dwc3/core.h	/^#define DWC3_GPRTBIMAP1	/;"	d
DWC3_GPRTBIMAP_FS0	drivers/usb/dwc3/core.h	/^#define DWC3_GPRTBIMAP_FS0	/;"	d
DWC3_GPRTBIMAP_FS1	drivers/usb/dwc3/core.h	/^#define DWC3_GPRTBIMAP_FS1	/;"	d
DWC3_GPRTBIMAP_HS0	drivers/usb/dwc3/core.h	/^#define DWC3_GPRTBIMAP_HS0	/;"	d
DWC3_GPRTBIMAP_HS1	drivers/usb/dwc3/core.h	/^#define DWC3_GPRTBIMAP_HS1	/;"	d
DWC3_GRXFIFOSIZ	drivers/usb/dwc3/core.h	/^#define DWC3_GRXFIFOSIZ(/;"	d
DWC3_GRXTHRCFG	drivers/usb/dwc3/core.h	/^#define DWC3_GRXTHRCFG	/;"	d
DWC3_GSBUSCFG0	drivers/usb/dwc3/core.h	/^#define DWC3_GSBUSCFG0	/;"	d
DWC3_GSBUSCFG1	drivers/usb/dwc3/core.h	/^#define DWC3_GSBUSCFG1	/;"	d
DWC3_GSNPSID	drivers/usb/dwc3/core.h	/^#define DWC3_GSNPSID	/;"	d
DWC3_GSNPSID_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GSNPSID_MASK	/;"	d
DWC3_GSNPSID_MASK	include/linux/usb/dwc3.h	/^#define DWC3_GSNPSID_MASK	/;"	d
DWC3_GSNPSID_SHIFT	include/linux/usb/dwc3.h	/^#define DWC3_GSNPSID_SHIFT	/;"	d
DWC3_GSNPSREV_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GSNPSREV_MASK	/;"	d
DWC3_GSNPSREV_MASK	include/linux/usb/dwc3.h	/^#define DWC3_GSNPSREV_MASK	/;"	d
DWC3_GSTS	drivers/usb/dwc3/core.h	/^#define DWC3_GSTS	/;"	d
DWC3_GTXFIFOSIZ	drivers/usb/dwc3/core.h	/^#define DWC3_GTXFIFOSIZ(/;"	d
DWC3_GTXFIFOSIZ_TXFDEF	drivers/usb/dwc3/core.h	/^#define DWC3_GTXFIFOSIZ_TXFDEF(/;"	d
DWC3_GTXFIFOSIZ_TXFDEF	include/linux/usb/dwc3.h	/^#define DWC3_GTXFIFOSIZ_TXFDEF(/;"	d
DWC3_GTXFIFOSIZ_TXFSTADDR	drivers/usb/dwc3/core.h	/^#define DWC3_GTXFIFOSIZ_TXFSTADDR(/;"	d
DWC3_GTXFIFOSIZ_TXFSTADDR	include/linux/usb/dwc3.h	/^#define DWC3_GTXFIFOSIZ_TXFSTADDR(/;"	d
DWC3_GTXTHRCFG	drivers/usb/dwc3/core.h	/^#define DWC3_GTXTHRCFG	/;"	d
DWC3_GUCTL	drivers/usb/dwc3/core.h	/^#define DWC3_GUCTL	/;"	d
DWC3_GUID	drivers/usb/dwc3/core.h	/^#define DWC3_GUID	/;"	d
DWC3_GUSB2I2CCTL	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB2I2CCTL(/;"	d
DWC3_GUSB2PHYACC	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB2PHYACC(/;"	d
DWC3_GUSB2PHYCFG	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB2PHYCFG(/;"	d
DWC3_GUSB2PHYCFG_ENBLSLPM	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_ENBLSLPM	/;"	d
DWC3_GUSB2PHYCFG_PHYIF	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_PHYIF	/;"	d
DWC3_GUSB2PHYCFG_PHYSOFTRST	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB2PHYCFG_PHYSOFTRST	/;"	d
DWC3_GUSB2PHYCFG_PHYSOFTRST	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_PHYSOFTRST	/;"	d
DWC3_GUSB2PHYCFG_SUSPHY	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB2PHYCFG_SUSPHY	/;"	d
DWC3_GUSB2PHYCFG_SUSPHY	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_SUSPHY	/;"	d
DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS	/;"	d
DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT /;"	d
DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT /;"	d
DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	/;"	d
DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET	include/linux/usb/dwc3.h	/^#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET	/;"	d
DWC3_GUSB3PIPECTL	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL(/;"	d
DWC3_GUSB3PIPECTL_DEP1P2P3	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_DEP1P2P3(/;"	d
DWC3_GUSB3PIPECTL_DEP1P2P3_EN	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	/;"	d
DWC3_GUSB3PIPECTL_DEP1P2P3_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK	/;"	d
DWC3_GUSB3PIPECTL_DEPOCHANGE	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_DEPOCHANGE	/;"	d
DWC3_GUSB3PIPECTL_DISRXDETP3	include/linux/usb/dwc3.h	/^#define DWC3_GUSB3PIPECTL_DISRXDETP3	/;"	d
DWC3_GUSB3PIPECTL_LFPSFILT	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_LFPSFILT	/;"	d
DWC3_GUSB3PIPECTL_PHYSOFTRST	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_PHYSOFTRST	/;"	d
DWC3_GUSB3PIPECTL_PHYSOFTRST	include/linux/usb/dwc3.h	/^#define DWC3_GUSB3PIPECTL_PHYSOFTRST	/;"	d
DWC3_GUSB3PIPECTL_REQP1P2P3	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_REQP1P2P3	/;"	d
DWC3_GUSB3PIPECTL_RX_DETOPOLL	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_RX_DETOPOLL	/;"	d
DWC3_GUSB3PIPECTL_SUSPHY	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_SUSPHY	/;"	d
DWC3_GUSB3PIPECTL_SUSPHY	include/linux/usb/dwc3.h	/^#define DWC3_GUSB3PIPECTL_SUSPHY	/;"	d
DWC3_GUSB3PIPECTL_TX_DEEPH	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_TX_DEEPH(/;"	d
DWC3_GUSB3PIPECTL_TX_DEEPH_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_TX_DEEPH_MASK	/;"	d
DWC3_GUSB3PIPECTL_U2SSINP3OK	drivers/usb/dwc3/core.h	/^#define DWC3_GUSB3PIPECTL_U2SSINP3OK	/;"	d
DWC3_HAS_OTG	drivers/usb/dwc3/core.h	/^#define DWC3_HAS_OTG	/;"	d
DWC3_HAS_PERIPHERAL	drivers/usb/dwc3/core.h	/^#define DWC3_HAS_PERIPHERAL	/;"	d
DWC3_HAS_XHCI	drivers/usb/dwc3/core.h	/^#define DWC3_HAS_XHCI	/;"	d
DWC3_LINK_STATE_CMPLY	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_CMPLY		= 0x0a,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_HRESET	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_HRESET		= 0x09,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_LPBK	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_LPBK		= 0x0b,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_MASK	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_MASK		= 0x0f,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_POLL	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_POLL		= 0x07,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_RECOV	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_RECOV		= 0x08,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_RESET	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_RESET		= 0x0e,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_RESUME	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_RESUME		= 0x0f,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_RX_DET	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_RX_DET		= 0x05, \/* in HS, means Early Suspend *\/$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_SS_DIS	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_SS_DIS		= 0x04,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_SS_INACT	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_SS_INACT	= 0x06,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_U0	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_U0		= 0x00, \/* in HS, means ON *\/$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_U1	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_U1		= 0x01,$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_U2	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_U2		= 0x02, \/* in HS, means SLEEP *\/$/;"	e	enum:dwc3_link_state
DWC3_LINK_STATE_U3	drivers/usb/dwc3/core.h	/^	DWC3_LINK_STATE_U3		= 0x03, \/* in HS, means SUSPEND *\/$/;"	e	enum:dwc3_link_state
DWC3_MAX_HIBER_SCRATCHBUFS	drivers/usb/dwc3/core.h	/^#define DWC3_MAX_HIBER_SCRATCHBUFS	/;"	d
DWC3_MDWIDTH	drivers/usb/dwc3/core.h	/^#define DWC3_MDWIDTH(/;"	d
DWC3_MODE	drivers/usb/dwc3/core.h	/^#define DWC3_MODE(/;"	d
DWC3_MSG_MAX	drivers/usb/dwc3/core.h	/^#define DWC3_MSG_MAX	/;"	d
DWC3_NUM_EPS	drivers/usb/dwc3/core.h	/^#define DWC3_NUM_EPS(/;"	d
DWC3_NUM_EPS_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_NUM_EPS_MASK	/;"	d
DWC3_NUM_INT	drivers/usb/dwc3/core.h	/^#define DWC3_NUM_INT(/;"	d
DWC3_NUM_IN_EPS	drivers/usb/dwc3/core.h	/^#define DWC3_NUM_IN_EPS(/;"	d
DWC3_NUM_IN_EPS_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_NUM_IN_EPS_MASK	/;"	d
DWC3_OCFG	drivers/usb/dwc3/core.h	/^#define DWC3_OCFG	/;"	d
DWC3_OCTL	drivers/usb/dwc3/core.h	/^#define DWC3_OCTL	/;"	d
DWC3_OEVT	drivers/usb/dwc3/core.h	/^#define DWC3_OEVT	/;"	d
DWC3_OEVTEN	drivers/usb/dwc3/core.h	/^#define DWC3_OEVTEN	/;"	d
DWC3_OMAP_UTMI_MODE_HW	include/linux/usb/dwc3-omap.h	/^	DWC3_OMAP_UTMI_MODE_HW,$/;"	e	enum:dwc3_omap_utmi_mode
DWC3_OMAP_UTMI_MODE_SW	include/linux/usb/dwc3-omap.h	/^	DWC3_OMAP_UTMI_MODE_SW,$/;"	e	enum:dwc3_omap_utmi_mode
DWC3_OMAP_UTMI_MODE_UNKNOWN	include/linux/usb/dwc3-omap.h	/^	DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,$/;"	e	enum:dwc3_omap_utmi_mode
DWC3_OSTS	drivers/usb/dwc3/core.h	/^#define DWC3_OSTS	/;"	d
DWC3_OTG_REGS_END	drivers/usb/dwc3/core.h	/^#define DWC3_OTG_REGS_END	/;"	d
DWC3_OTG_REGS_START	drivers/usb/dwc3/core.h	/^#define DWC3_OTG_REGS_START	/;"	d
DWC3_PHY_UNKNOWN	drivers/usb/dwc3/core.h	/^	DWC3_PHY_UNKNOWN = 0,$/;"	e	enum:dwc3_phy
DWC3_PHY_USB2	drivers/usb/dwc3/core.h	/^	DWC3_PHY_USB2,$/;"	e	enum:dwc3_phy
DWC3_PHY_USB3	drivers/usb/dwc3/core.h	/^	DWC3_PHY_USB3,$/;"	e	enum:dwc3_phy
DWC3_RAM1_DEPTH	drivers/usb/dwc3/core.h	/^#define DWC3_RAM1_DEPTH(/;"	d
DWC3_REG_OFFSET	include/linux/usb/dwc3.h	/^#define DWC3_REG_OFFSET	/;"	d
DWC3_REVISION_173A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_173A	/;"	d
DWC3_REVISION_175A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_175A	/;"	d
DWC3_REVISION_180A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_180A	/;"	d
DWC3_REVISION_183A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_183A	/;"	d
DWC3_REVISION_185A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_185A	/;"	d
DWC3_REVISION_187A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_187A	/;"	d
DWC3_REVISION_188A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_188A	/;"	d
DWC3_REVISION_190A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_190A	/;"	d
DWC3_REVISION_194A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_194A	/;"	d
DWC3_REVISION_200A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_200A	/;"	d
DWC3_REVISION_202A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_202A	/;"	d
DWC3_REVISION_210A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_210A	/;"	d
DWC3_REVISION_220A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_220A	/;"	d
DWC3_REVISION_230A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_230A	/;"	d
DWC3_REVISION_240A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_240A	/;"	d
DWC3_REVISION_250A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_250A	/;"	d
DWC3_REVISION_260A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_260A	/;"	d
DWC3_REVISION_270A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_270A	/;"	d
DWC3_REVISION_280A	drivers/usb/dwc3/core.h	/^#define DWC3_REVISION_280A	/;"	d
DWC3_REVISION_MASK	include/linux/usb/dwc3.h	/^#define DWC3_REVISION_MASK	/;"	d
DWC3_SCRATCHBUF_SIZE	drivers/usb/dwc3/core.h	/^#define DWC3_SCRATCHBUF_SIZE	/;"	d
DWC3_TRBCTL_CONTROL_DATA	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_CONTROL_DATA	/;"	d
DWC3_TRBCTL_CONTROL_SETUP	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_CONTROL_SETUP	/;"	d
DWC3_TRBCTL_CONTROL_STATUS2	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_CONTROL_STATUS2	/;"	d
DWC3_TRBCTL_CONTROL_STATUS3	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_CONTROL_STATUS3	/;"	d
DWC3_TRBCTL_ISOCHRONOUS	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_ISOCHRONOUS	/;"	d
DWC3_TRBCTL_ISOCHRONOUS_FIRST	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_ISOCHRONOUS_FIRST	/;"	d
DWC3_TRBCTL_LINK_TRB	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_LINK_TRB	/;"	d
DWC3_TRBCTL_NORMAL	drivers/usb/dwc3/core.h	/^#define DWC3_TRBCTL_NORMAL	/;"	d
DWC3_TRBSTS_MISSED_ISOC	drivers/usb/dwc3/core.h	/^#define DWC3_TRBSTS_MISSED_ISOC	/;"	d
DWC3_TRBSTS_OK	drivers/usb/dwc3/core.h	/^#define DWC3_TRBSTS_OK	/;"	d
DWC3_TRBSTS_SETUP_PENDING	drivers/usb/dwc3/core.h	/^#define DWC3_TRBSTS_SETUP_PENDING	/;"	d
DWC3_TRB_CTRL_CHN	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_CHN	/;"	d
DWC3_TRB_CTRL_CSP	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_CSP	/;"	d
DWC3_TRB_CTRL_HWO	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_HWO	/;"	d
DWC3_TRB_CTRL_IOC	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_IOC	/;"	d
DWC3_TRB_CTRL_ISP_IMI	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_ISP_IMI	/;"	d
DWC3_TRB_CTRL_LST	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_LST	/;"	d
DWC3_TRB_CTRL_SID_SOFN	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_SID_SOFN(/;"	d
DWC3_TRB_CTRL_TRBCTL	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_CTRL_TRBCTL(/;"	d
DWC3_TRB_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_MASK	/;"	d
DWC3_TRB_NUM	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_NUM	/;"	d
DWC3_TRB_SIZE_LENGTH	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_SIZE_LENGTH(/;"	d
DWC3_TRB_SIZE_MASK	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_SIZE_MASK	/;"	d
DWC3_TRB_SIZE_PCM1	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_SIZE_PCM1(/;"	d
DWC3_TRB_SIZE_TRBSTS	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_SIZE_TRBSTS(/;"	d
DWC3_TRB_STS_XFER_IN_PROG	drivers/usb/dwc3/core.h	/^#define DWC3_TRB_STS_XFER_IN_PROG	/;"	d
DWC3_XHCI_REGS_END	drivers/usb/dwc3/core.h	/^#define DWC3_XHCI_REGS_END	/;"	d
DWC3_XHCI_REGS_START	drivers/usb/dwc3/core.h	/^#define DWC3_XHCI_REGS_START	/;"	d
DWC3_XHCI_RESOURCES_NUM	drivers/usb/dwc3/core.h	/^#define DWC3_XHCI_RESOURCES_NUM	/;"	d
DWCDDR21MCTL_CCR_DFTCMP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_DFTCMP(/;"	d
DWCDDR21MCTL_CCR_DFTLM	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_DFTLM(/;"	d
DWCDDR21MCTL_CCR_DQSCFG	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_DQSCFG(/;"	d
DWCDDR21MCTL_CCR_DTT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_DTT(/;"	d
DWCDDR21MCTL_CCR_ECCEN	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_ECCEN(/;"	d
DWCDDR21MCTL_CCR_FLUSH	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_FLUSH(/;"	d
DWCDDR21MCTL_CCR_HOSTEN	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_HOSTEN(/;"	d
DWCDDR21MCTL_CCR_IB	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_IB(/;"	d
DWCDDR21MCTL_CCR_IT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_IT(/;"	d
DWCDDR21MCTL_CCR_ITMRST	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_ITMRST(/;"	d
DWCDDR21MCTL_CCR_NOAPD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_NOAPD(/;"	d
DWCDDR21MCTL_CCR_NOMRWR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_NOMRWR(/;"	d
DWCDDR21MCTL_CCR_RRB	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_RRB(/;"	d
DWCDDR21MCTL_CCR_XBISC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CCR_XBISC(/;"	d
DWCDDR21MCTL_CSR_DFTERR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CSR_DFTERR(/;"	d
DWCDDR21MCTL_CSR_DRIFT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CSR_DRIFT(/;"	d
DWCDDR21MCTL_CSR_DTERR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CSR_DTERR(/;"	d
DWCDDR21MCTL_CSR_DTIERR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CSR_DTIERR(/;"	d
DWCDDR21MCTL_CSR_ECCERR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CSR_ECCERR(/;"	d
DWCDDR21MCTL_CSR_ECCSEC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_CSR_ECCSEC(/;"	d
DWCDDR21MCTL_DCR_AMAP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_AMAP(/;"	d
DWCDDR21MCTL_DCR_CMD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_CMD(/;"	d
DWCDDR21MCTL_DCR_DDRMD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_DDRMD(/;"	d
DWCDDR21MCTL_DCR_DIO	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_DIO(/;"	d
DWCDDR21MCTL_DCR_DSIZE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_DSIZE(/;"	d
DWCDDR21MCTL_DCR_EXE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_EXE(/;"	d
DWCDDR21MCTL_DCR_PIO	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_PIO(/;"	d
DWCDDR21MCTL_DCR_RANK	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_RANK(/;"	d
DWCDDR21MCTL_DCR_RANKS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_RANKS(/;"	d
DWCDDR21MCTL_DCR_RNKALL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_RNKALL(/;"	d
DWCDDR21MCTL_DCR_SIO	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DCR_SIO(/;"	d
DWCDDR21MCTL_DLLCR_ATESTEN	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_ATESTEN(/;"	d
DWCDDR21MCTL_DLLCR_DD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_DD(/;"	d
DWCDDR21MCTL_DLLCR_DRSVD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_DRSVD(/;"	d
DWCDDR21MCTL_DLLCR_MFBDLY	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_MFBDLY(/;"	d
DWCDDR21MCTL_DLLCR_MFWDLY	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_MFWDLY(/;"	d
DWCDDR21MCTL_DLLCR_PHASE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_PHASE(/;"	d
DWCDDR21MCTL_DLLCR_SFBDLY	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_SFBDLY(/;"	d
DWCDDR21MCTL_DLLCR_SFWDLY	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_SFWDLY(/;"	d
DWCDDR21MCTL_DLLCR_SSTART	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DLLCR_SSTART(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY0(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY1(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY2(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY3(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY4	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY4(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY5	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY5(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY6(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY7	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY7(/;"	d
DWCDDR21MCTL_DQSBTR_DQSDLY8	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSBTR_DQSDLY8(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY0(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY1(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY2(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY3(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY4	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY4(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY5	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY5(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY6(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY7	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY7(/;"	d
DWCDDR21MCTL_DQSTR_DQSDLY8	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQSTR_DQSDLY8(/;"	d
DWCDDR21MCTL_DQTR_DQDLY0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY0(/;"	d
DWCDDR21MCTL_DQTR_DQDLY1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY1(/;"	d
DWCDDR21MCTL_DQTR_DQDLY2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY2(/;"	d
DWCDDR21MCTL_DQTR_DQDLY3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY3(/;"	d
DWCDDR21MCTL_DQTR_DQDLY4	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY4(/;"	d
DWCDDR21MCTL_DQTR_DQDLY5	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY5(/;"	d
DWCDDR21MCTL_DQTR_DQDLY6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY6(/;"	d
DWCDDR21MCTL_DQTR_DQDLY7	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DQTR_DQDLY7(/;"	d
DWCDDR21MCTL_DRR_RD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DRR_RD(/;"	d
DWCDDR21MCTL_DRR_RFBURST	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DRR_RFBURST(/;"	d
DWCDDR21MCTL_DRR_TRFC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DRR_TRFC(/;"	d
DWCDDR21MCTL_DRR_TRFPRD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DRR_TRFPRD(/;"	d
DWCDDR21MCTL_DTAR_DTBANK	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTAR_DTBANK(/;"	d
DWCDDR21MCTL_DTAR_DTCOL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTAR_DTCOL(/;"	d
DWCDDR21MCTL_DTAR_DTROW	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTAR_DTROW(/;"	d
DWCDDR21MCTL_DTR0_DTBYTE0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR0_DTBYTE0(/;"	d
DWCDDR21MCTL_DTR0_DTBYTE1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR0_DTBYTE1(/;"	d
DWCDDR21MCTL_DTR0_DTBYTE2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR0_DTBYTE2(/;"	d
DWCDDR21MCTL_DTR0_DTBYTE3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR0_DTBYTE3(/;"	d
DWCDDR21MCTL_DTR1_DTBYTE4	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR1_DTBYTE4(/;"	d
DWCDDR21MCTL_DTR1_DTBYTE5	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR1_DTBYTE5(/;"	d
DWCDDR21MCTL_DTR1_DTBYTE6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR1_DTBYTE6(/;"	d
DWCDDR21MCTL_DTR1_DTBYTE7	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_DTR1_DTBYTE7(/;"	d
DWCDDR21MCTL_EMR2_DCC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR2_DCC(/;"	d
DWCDDR21MCTL_EMR2_PASR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR2_PASR(/;"	d
DWCDDR21MCTL_EMR2_SRF	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR2_SRF(/;"	d
DWCDDR21MCTL_EMR_AL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_AL(/;"	d
DWCDDR21MCTL_EMR_DE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_DE(/;"	d
DWCDDR21MCTL_EMR_DQS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_DQS(/;"	d
DWCDDR21MCTL_EMR_OCD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_OCD(/;"	d
DWCDDR21MCTL_EMR_ODS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_ODS(/;"	d
DWCDDR21MCTL_EMR_OE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_OE(/;"	d
DWCDDR21MCTL_EMR_RDQS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RDQS(/;"	d
DWCDDR21MCTL_EMR_RTT2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RTT2(/;"	d
DWCDDR21MCTL_EMR_RTT6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RTT6(/;"	d
DWCDDR21MCTL_EMR_RTT_150	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RTT_150	/;"	d
DWCDDR21MCTL_EMR_RTT_50	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RTT_50	/;"	d
DWCDDR21MCTL_EMR_RTT_75	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RTT_75	/;"	d
DWCDDR21MCTL_EMR_RTT_DISABLED	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_EMR_RTT_DISABLED	/;"	d
DWCDDR21MCTL_GDLLCR_ATC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_ATC(/;"	d
DWCDDR21MCTL_GDLLCR_DRES	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_DRES(/;"	d
DWCDDR21MCTL_GDLLCR_DTC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_DTC(/;"	d
DWCDDR21MCTL_GDLLCR_IPUMP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_IPUMP(/;"	d
DWCDDR21MCTL_GDLLCR_LOCKDET	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_LOCKDET(/;"	d
DWCDDR21MCTL_GDLLCR_MBIAS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_MBIAS(/;"	d
DWCDDR21MCTL_GDLLCR_SBIAS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_SBIAS(/;"	d
DWCDDR21MCTL_GDLLCR_TESTEN	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_TESTEN(/;"	d
DWCDDR21MCTL_GDLLCR_TESTSW	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_GDLLCR_TESTSW(/;"	d
DWCDDR21MCTL_HPCR_APQS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_APQS(/;"	d
DWCDDR21MCTL_HPCR_HPBL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_HPBL(/;"	d
DWCDDR21MCTL_HPCR_INTRPT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_INTRPT(/;"	d
DWCDDR21MCTL_HPCR_LPQS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_LPQS(/;"	d
DWCDDR21MCTL_HPCR_PQBL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_PQBL(/;"	d
DWCDDR21MCTL_HPCR_SWAIT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_SWAIT(/;"	d
DWCDDR21MCTL_HPCR_TOUT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_TOUT(/;"	d
DWCDDR21MCTL_HPCR_TOUTX	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_HPCR_TOUTX(/;"	d
DWCDDR21MCTL_IOCR_DQRTT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_DQRTT(/;"	d
DWCDDR21MCTL_IOCR_DQSRTT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_DQSRTT(/;"	d
DWCDDR21MCTL_IOCR_DS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_DS(/;"	d
DWCDDR21MCTL_IOCR_RTT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_RTT(/;"	d
DWCDDR21MCTL_IOCR_RTTOE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_RTTOE(/;"	d
DWCDDR21MCTL_IOCR_RTTOH	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_RTTOH(/;"	d
DWCDDR21MCTL_IOCR_TESTEN	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_IOCR_TESTEN(/;"	d
DWCDDR21MCTL_MMGCR_UHPP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MMGCR_UHPP(/;"	d
DWCDDR21MCTL_MR_BL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_BL(/;"	d
DWCDDR21MCTL_MR_BT	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_BT(/;"	d
DWCDDR21MCTL_MR_CL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_CL(/;"	d
DWCDDR21MCTL_MR_DR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_DR(/;"	d
DWCDDR21MCTL_MR_PD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_PD(/;"	d
DWCDDR21MCTL_MR_TM	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_TM(/;"	d
DWCDDR21MCTL_MR_WR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_MR_WR(/;"	d
DWCDDR21MCTL_ODTCR_RDODT0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_RDODT0(/;"	d
DWCDDR21MCTL_ODTCR_RDODT1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_RDODT1(/;"	d
DWCDDR21MCTL_ODTCR_RDODT2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_RDODT2(/;"	d
DWCDDR21MCTL_ODTCR_RDODT3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_RDODT3(/;"	d
DWCDDR21MCTL_ODTCR_WDODT0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_WDODT0(/;"	d
DWCDDR21MCTL_ODTCR_WDODT1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_WDODT1(/;"	d
DWCDDR21MCTL_ODTCR_WDODT2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_WDODT2(/;"	d
DWCDDR21MCTL_ODTCR_WDODT3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_ODTCR_WDODT3(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL0(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL1(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL2(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL3(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL4	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL4(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL5	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL5(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL6(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL7	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL7(/;"	d
DWCDDR21MCTL_RDGR_DQSSEL8	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RDGR_DQSSEL8(/;"	d
DWCDDR21MCTL_RSLR_SL0	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL0(/;"	d
DWCDDR21MCTL_RSLR_SL1	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL1(/;"	d
DWCDDR21MCTL_RSLR_SL2	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL2(/;"	d
DWCDDR21MCTL_RSLR_SL3	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL3(/;"	d
DWCDDR21MCTL_RSLR_SL4	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL4(/;"	d
DWCDDR21MCTL_RSLR_SL5	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL5(/;"	d
DWCDDR21MCTL_RSLR_SL6	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL6(/;"	d
DWCDDR21MCTL_RSLR_SL7	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL7(/;"	d
DWCDDR21MCTL_RSLR_SL8	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_RSLR_SL8(/;"	d
DWCDDR21MCTL_TPR0_TCCD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TCCD(/;"	d
DWCDDR21MCTL_TPR0_TMRD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TMRD(/;"	d
DWCDDR21MCTL_TPR0_TRAS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TRAS(/;"	d
DWCDDR21MCTL_TPR0_TRC	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TRC(/;"	d
DWCDDR21MCTL_TPR0_TRCD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TRCD(/;"	d
DWCDDR21MCTL_TPR0_TRP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TRP(/;"	d
DWCDDR21MCTL_TPR0_TRRD	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TRRD(/;"	d
DWCDDR21MCTL_TPR0_TRTP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TRTP(/;"	d
DWCDDR21MCTL_TPR0_TWTR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR0_TWTR(/;"	d
DWCDDR21MCTL_TPR1_TAOND	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_TAOND(/;"	d
DWCDDR21MCTL_TPR1_TFAW	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_TFAW(/;"	d
DWCDDR21MCTL_TPR1_TRNKRTR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_TRNKRTR(/;"	d
DWCDDR21MCTL_TPR1_TRNKWTW	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_TRNKWTW(/;"	d
DWCDDR21MCTL_TPR1_TRTW	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_TRTW(/;"	d
DWCDDR21MCTL_TPR1_XCL	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_XCL(/;"	d
DWCDDR21MCTL_TPR1_XTP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_XTP(/;"	d
DWCDDR21MCTL_TPR1_XWR	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR1_XWR(/;"	d
DWCDDR21MCTL_TPR2_TCKE	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR2_TCKE(/;"	d
DWCDDR21MCTL_TPR2_TXP	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR2_TXP(/;"	d
DWCDDR21MCTL_TPR2_TXS	include/synopsys/dwcddr21mctl.h	/^#define DWCDDR21MCTL_TPR2_TXS(/;"	d
DWC_AHSATA_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define DWC_AHSATA_BASE	/;"	d
DWC_AHSATA_HC_MAX_CMD	drivers/block/dwc_ahsata.h	/^#define DWC_AHSATA_HC_MAX_CMD	/;"	d
DWC_AHSATA_MAX_CMD_SLOTS	drivers/block/dwc_ahsata.h	/^#define DWC_AHSATA_MAX_CMD_SLOTS	/;"	d
DWC_ETH_QOS	drivers/net/Kconfig	/^config DWC_ETH_QOS$/;"	c
DWDMA_AHB_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define DWDMA_AHB_BASE_ADDR	/;"	d
DWMCI_BLKSIZ	include/dwmmc.h	/^#define DWMCI_BLKSIZ	/;"	d
DWMCI_BMOD	include/dwmmc.h	/^#define DWMCI_BMOD	/;"	d
DWMCI_BMOD_IDMAC_EN	include/dwmmc.h	/^#define DWMCI_BMOD_IDMAC_EN	/;"	d
DWMCI_BMOD_IDMAC_FB	include/dwmmc.h	/^#define DWMCI_BMOD_IDMAC_FB	/;"	d
DWMCI_BMOD_IDMAC_RESET	include/dwmmc.h	/^#define DWMCI_BMOD_IDMAC_RESET	/;"	d
DWMCI_BUFADDR	include/dwmmc.h	/^#define DWMCI_BUFADDR	/;"	d
DWMCI_BUSY	include/dwmmc.h	/^#define DWMCI_BUSY	/;"	d
DWMCI_BYTCNT	include/dwmmc.h	/^#define DWMCI_BYTCNT	/;"	d
DWMCI_CDETECT	include/dwmmc.h	/^#define DWMCI_CDETECT	/;"	d
DWMCI_CLKDIV	include/dwmmc.h	/^#define DWMCI_CLKDIV	/;"	d
DWMCI_CLKENA	include/dwmmc.h	/^#define DWMCI_CLKENA	/;"	d
DWMCI_CLKEN_ENABLE	include/dwmmc.h	/^#define DWMCI_CLKEN_ENABLE	/;"	d
DWMCI_CLKEN_LOW_PWR	include/dwmmc.h	/^#define DWMCI_CLKEN_LOW_PWR	/;"	d
DWMCI_CLKSEL	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define DWMCI_CLKSEL	/;"	d
DWMCI_CLKSRC	include/dwmmc.h	/^#define DWMCI_CLKSRC	/;"	d
DWMCI_CMD	include/dwmmc.h	/^#define DWMCI_CMD	/;"	d
DWMCI_CMDARG	include/dwmmc.h	/^#define DWMCI_CMDARG	/;"	d
DWMCI_CMD_ABORT_STOP	include/dwmmc.h	/^#define DWMCI_CMD_ABORT_STOP	/;"	d
DWMCI_CMD_CHECK_CRC	include/dwmmc.h	/^#define DWMCI_CMD_CHECK_CRC	/;"	d
DWMCI_CMD_DATA_EXP	include/dwmmc.h	/^#define DWMCI_CMD_DATA_EXP	/;"	d
DWMCI_CMD_PRV_DAT_WAIT	include/dwmmc.h	/^#define DWMCI_CMD_PRV_DAT_WAIT	/;"	d
DWMCI_CMD_RESP_EXP	include/dwmmc.h	/^#define DWMCI_CMD_RESP_EXP	/;"	d
DWMCI_CMD_RESP_LENGTH	include/dwmmc.h	/^#define DWMCI_CMD_RESP_LENGTH	/;"	d
DWMCI_CMD_RW	include/dwmmc.h	/^#define DWMCI_CMD_RW	/;"	d
DWMCI_CMD_SEND_STOP	include/dwmmc.h	/^#define DWMCI_CMD_SEND_STOP	/;"	d
DWMCI_CMD_START	include/dwmmc.h	/^#define DWMCI_CMD_START	/;"	d
DWMCI_CMD_UPD_CLK	include/dwmmc.h	/^#define DWMCI_CMD_UPD_CLK	/;"	d
DWMCI_CMD_USE_HOLD_REG	include/dwmmc.h	/^#define DWMCI_CMD_USE_HOLD_REG	/;"	d
DWMCI_CTRL	include/dwmmc.h	/^#define DWMCI_CTRL	/;"	d
DWMCI_CTRL_DMA_RESET	include/dwmmc.h	/^#define DWMCI_CTRL_DMA_RESET	/;"	d
DWMCI_CTRL_FIFO_RESET	include/dwmmc.h	/^#define DWMCI_CTRL_FIFO_RESET	/;"	d
DWMCI_CTRL_RESET	include/dwmmc.h	/^#define DWMCI_CTRL_RESET	/;"	d
DWMCI_CTRL_SEND_AS_CCSD	include/dwmmc.h	/^#define DWMCI_CTRL_SEND_AS_CCSD	/;"	d
DWMCI_CTYPE	include/dwmmc.h	/^#define DWMCI_CTYPE	/;"	d
DWMCI_CTYPE_1BIT	include/dwmmc.h	/^#define DWMCI_CTYPE_1BIT	/;"	d
DWMCI_CTYPE_4BIT	include/dwmmc.h	/^#define DWMCI_CTYPE_4BIT	/;"	d
DWMCI_CTYPE_8BIT	include/dwmmc.h	/^#define DWMCI_CTYPE_8BIT	/;"	d
DWMCI_DATA	include/dwmmc.h	/^#define DWMCI_DATA	/;"	d
DWMCI_DATA_ERR	include/dwmmc.h	/^#define DWMCI_DATA_ERR	/;"	d
DWMCI_DATA_TOUT	include/dwmmc.h	/^#define DWMCI_DATA_TOUT	/;"	d
DWMCI_DBADDR	include/dwmmc.h	/^#define DWMCI_DBADDR	/;"	d
DWMCI_DDR_MODE	include/dwmmc.h	/^#define DWMCI_DDR_MODE	/;"	d
DWMCI_DEBNCE	include/dwmmc.h	/^#define DWMCI_DEBNCE	/;"	d
DWMCI_DIVRATIO_BIT	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define DWMCI_DIVRATIO_BIT	/;"	d
DWMCI_DIVRATIO_MASK	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define DWMCI_DIVRATIO_MASK	/;"	d
DWMCI_DMA_EN	include/dwmmc.h	/^#define DWMCI_DMA_EN	/;"	d
DWMCI_DSCADDR	include/dwmmc.h	/^#define DWMCI_DSCADDR	/;"	d
DWMCI_FIFOTH	include/dwmmc.h	/^#define DWMCI_FIFOTH	/;"	d
DWMCI_FIFO_MASK	include/dwmmc.h	/^#define DWMCI_FIFO_MASK	/;"	d
DWMCI_FIFO_SHIFT	include/dwmmc.h	/^#define DWMCI_FIFO_SHIFT	/;"	d
DWMCI_GPIO	include/dwmmc.h	/^#define DWMCI_GPIO	/;"	d
DWMCI_HCON	include/dwmmc.h	/^#define DWMCI_HCON	/;"	d
DWMCI_IDINTEN	include/dwmmc.h	/^#define DWMCI_IDINTEN	/;"	d
DWMCI_IDMAC_CH	include/dwmmc.h	/^#define DWMCI_IDMAC_CH	/;"	d
DWMCI_IDMAC_EN	include/dwmmc.h	/^#define DWMCI_IDMAC_EN	/;"	d
DWMCI_IDMAC_FS	include/dwmmc.h	/^#define DWMCI_IDMAC_FS	/;"	d
DWMCI_IDMAC_LD	include/dwmmc.h	/^#define DWMCI_IDMAC_LD	/;"	d
DWMCI_IDMAC_OWN	include/dwmmc.h	/^#define DWMCI_IDMAC_OWN	/;"	d
DWMCI_IDSTS	include/dwmmc.h	/^#define DWMCI_IDSTS	/;"	d
DWMCI_INTMASK	include/dwmmc.h	/^#define DWMCI_INTMASK	/;"	d
DWMCI_INTMSK_ACD	include/dwmmc.h	/^#define DWMCI_INTMSK_ACD	/;"	d
DWMCI_INTMSK_ALL	include/dwmmc.h	/^#define DWMCI_INTMSK_ALL	/;"	d
DWMCI_INTMSK_CDONE	include/dwmmc.h	/^#define DWMCI_INTMSK_CDONE	/;"	d
DWMCI_INTMSK_DCRC	include/dwmmc.h	/^#define DWMCI_INTMSK_DCRC	/;"	d
DWMCI_INTMSK_DRTO	include/dwmmc.h	/^#define DWMCI_INTMSK_DRTO	/;"	d
DWMCI_INTMSK_DTO	include/dwmmc.h	/^#define DWMCI_INTMSK_DTO	/;"	d
DWMCI_INTMSK_EBE	include/dwmmc.h	/^#define DWMCI_INTMSK_EBE	/;"	d
DWMCI_INTMSK_FRUN	include/dwmmc.h	/^#define DWMCI_INTMSK_FRUN	/;"	d
DWMCI_INTMSK_HLE	include/dwmmc.h	/^#define DWMCI_INTMSK_HLE	/;"	d
DWMCI_INTMSK_HTO	include/dwmmc.h	/^#define DWMCI_INTMSK_HTO	/;"	d
DWMCI_INTMSK_RE	include/dwmmc.h	/^#define DWMCI_INTMSK_RE	/;"	d
DWMCI_INTMSK_RTO	include/dwmmc.h	/^#define DWMCI_INTMSK_RTO	/;"	d
DWMCI_INTMSK_RXDR	include/dwmmc.h	/^#define DWMCI_INTMSK_RXDR	/;"	d
DWMCI_INTMSK_SBE	include/dwmmc.h	/^#define DWMCI_INTMSK_SBE	/;"	d
DWMCI_INTMSK_TXDR	include/dwmmc.h	/^#define DWMCI_INTMSK_TXDR	/;"	d
DWMCI_MINTSTS	include/dwmmc.h	/^#define DWMCI_MINTSTS	/;"	d
DWMCI_PLDMND	include/dwmmc.h	/^#define DWMCI_PLDMND	/;"	d
DWMCI_PWREN	include/dwmmc.h	/^#define	DWMCI_PWREN	/;"	d
DWMCI_QUIRK_DISABLE_SMU	include/dwmmc.h	/^#define DWMCI_QUIRK_DISABLE_SMU	/;"	d
DWMCI_RESET_ALL	include/dwmmc.h	/^#define DWMCI_RESET_ALL	/;"	d
DWMCI_RESP0	include/dwmmc.h	/^#define DWMCI_RESP0	/;"	d
DWMCI_RESP1	include/dwmmc.h	/^#define DWMCI_RESP1	/;"	d
DWMCI_RESP2	include/dwmmc.h	/^#define DWMCI_RESP2	/;"	d
DWMCI_RESP3	include/dwmmc.h	/^#define DWMCI_RESP3	/;"	d
DWMCI_RINTSTS	include/dwmmc.h	/^#define DWMCI_RINTSTS	/;"	d
DWMCI_SET_DIV_RATIO	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define DWMCI_SET_DIV_RATIO(/;"	d
DWMCI_SET_DRV_CLK	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define DWMCI_SET_DRV_CLK(/;"	d
DWMCI_SET_SAMPLE_CLK	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define DWMCI_SET_SAMPLE_CLK(/;"	d
DWMCI_STATUS	include/dwmmc.h	/^#define DWMCI_STATUS	/;"	d
DWMCI_TBBCNT	include/dwmmc.h	/^#define DWMCI_TBBCNT	/;"	d
DWMCI_TCMCNT	include/dwmmc.h	/^#define DWMCI_TCMCNT	/;"	d
DWMCI_TMOUT	include/dwmmc.h	/^#define DWMCI_TMOUT	/;"	d
DWMCI_UHS_REG	include/dwmmc.h	/^#define DWMCI_UHS_REG	/;"	d
DWMCI_USRID	include/dwmmc.h	/^#define DWMCI_USRID	/;"	d
DWMCI_VERID	include/dwmmc.h	/^#define DWMCI_VERID	/;"	d
DWMCI_WRTPRT	include/dwmmc.h	/^#define DWMCI_WRTPRT	/;"	d
DWMMC_MAX_CH_NUM	drivers/mmc/exynos_dw_mmc.c	/^#define	DWMMC_MAX_CH_NUM	/;"	d	file:
DWMMC_MAX_CH_NUM	drivers/mmc/hi6220_dw_mmc.c	/^#define	DWMMC_MAX_CH_NUM	/;"	d	file:
DWMMC_MAX_FREQ	drivers/mmc/exynos_dw_mmc.c	/^#define	DWMMC_MAX_FREQ	/;"	d	file:
DWMMC_MAX_FREQ	drivers/mmc/hi6220_dw_mmc.c	/^#define	DWMMC_MAX_FREQ	/;"	d	file:
DWMMC_MIN_FREQ	drivers/mmc/exynos_dw_mmc.c	/^#define	DWMMC_MIN_FREQ	/;"	d	file:
DWMMC_MIN_FREQ	drivers/mmc/hi6220_dw_mmc.c	/^#define	DWMMC_MIN_FREQ	/;"	d	file:
DWMMC_MMC0_SDR_TIMING_VAL	drivers/mmc/exynos_dw_mmc.c	/^#define	DWMMC_MMC0_SDR_TIMING_VAL	/;"	d	file:
DWMMC_MMC2_SDR_TIMING_VAL	drivers/mmc/exynos_dw_mmc.c	/^#define	DWMMC_MMC2_SDR_TIMING_VAL	/;"	d	file:
DW_DMA_BASE_OFFSET	drivers/net/designware.h	/^#define DW_DMA_BASE_OFFSET	/;"	d
DW_SPI_BAUDR	drivers/spi/designware_spi.c	/^#define DW_SPI_BAUDR	/;"	d	file:
DW_SPI_CTRL0	drivers/spi/designware_spi.c	/^#define DW_SPI_CTRL0	/;"	d	file:
DW_SPI_CTRL1	drivers/spi/designware_spi.c	/^#define DW_SPI_CTRL1	/;"	d	file:
DW_SPI_DMACR	drivers/spi/designware_spi.c	/^#define DW_SPI_DMACR	/;"	d	file:
DW_SPI_DMARDLR	drivers/spi/designware_spi.c	/^#define DW_SPI_DMARDLR	/;"	d	file:
DW_SPI_DMATDLR	drivers/spi/designware_spi.c	/^#define DW_SPI_DMATDLR	/;"	d	file:
DW_SPI_DR	drivers/spi/designware_spi.c	/^#define DW_SPI_DR	/;"	d	file:
DW_SPI_ICR	drivers/spi/designware_spi.c	/^#define DW_SPI_ICR	/;"	d	file:
DW_SPI_IDR	drivers/spi/designware_spi.c	/^#define DW_SPI_IDR	/;"	d	file:
DW_SPI_IMR	drivers/spi/designware_spi.c	/^#define DW_SPI_IMR	/;"	d	file:
DW_SPI_ISR	drivers/spi/designware_spi.c	/^#define DW_SPI_ISR	/;"	d	file:
DW_SPI_MSTICR	drivers/spi/designware_spi.c	/^#define DW_SPI_MSTICR	/;"	d	file:
DW_SPI_MWCR	drivers/spi/designware_spi.c	/^#define DW_SPI_MWCR	/;"	d	file:
DW_SPI_RISR	drivers/spi/designware_spi.c	/^#define DW_SPI_RISR	/;"	d	file:
DW_SPI_RXFLR	drivers/spi/designware_spi.c	/^#define DW_SPI_RXFLR	/;"	d	file:
DW_SPI_RXFLTR	drivers/spi/designware_spi.c	/^#define DW_SPI_RXFLTR	/;"	d	file:
DW_SPI_RXOICR	drivers/spi/designware_spi.c	/^#define DW_SPI_RXOICR	/;"	d	file:
DW_SPI_RXUICR	drivers/spi/designware_spi.c	/^#define DW_SPI_RXUICR	/;"	d	file:
DW_SPI_SER	drivers/spi/designware_spi.c	/^#define DW_SPI_SER	/;"	d	file:
DW_SPI_SR	drivers/spi/designware_spi.c	/^#define DW_SPI_SR	/;"	d	file:
DW_SPI_SSIENR	drivers/spi/designware_spi.c	/^#define DW_SPI_SSIENR	/;"	d	file:
DW_SPI_TXFLR	drivers/spi/designware_spi.c	/^#define DW_SPI_TXFLR	/;"	d	file:
DW_SPI_TXFLTR	drivers/spi/designware_spi.c	/^#define DW_SPI_TXFLTR	/;"	d	file:
DW_SPI_TXOICR	drivers/spi/designware_spi.c	/^#define DW_SPI_TXOICR	/;"	d	file:
DW_SPI_VERSION	drivers/spi/designware_spi.c	/^#define DW_SPI_VERSION	/;"	d	file:
DW_WDT_CR	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_CR	/;"	d	file:
DW_WDT_CRR	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_CRR	/;"	d	file:
DW_WDT_CRR_RESTART_VAL	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_CRR_RESTART_VAL	/;"	d	file:
DW_WDT_CR_EN_OFFSET	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_CR_EN_OFFSET	/;"	d	file:
DW_WDT_CR_RMOD_OFFSET	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_CR_RMOD_OFFSET	/;"	d	file:
DW_WDT_CR_RMOD_VAL	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_CR_RMOD_VAL	/;"	d	file:
DW_WDT_TORR	drivers/watchdog/designware_wdt.c	/^#define DW_WDT_TORR	/;"	d	file:
DWstruct	arch/arc/lib/libgcc2.h	/^	struct DWstruct {Wtype high, low;};$/;"	s
DWstruct	arch/arc/lib/libgcc2.h	/^	struct DWstruct {Wtype low, high;};$/;"	s
DWstruct	arch/mips/lib/libgcc.h	/^struct DWstruct {$/;"	s
DWstruct	arch/nios2/lib/libgcc.c	/^struct DWstruct { Wtype low, high;};$/;"	s	file:
DWstruct	arch/sh/lib/libgcc.h	/^struct DWstruct {$/;"	s
DWtype	arch/arc/lib/libgcc2.h	/^#define DWtype	/;"	d
DWtype	arch/nios2/lib/libgcc.c	/^typedef long long DWtype;$/;"	t	typeref:typename:long long	file:
DWunion	arch/arc/lib/libgcc2.h	/^} DWunion;$/;"	t	typeref:union:__anon4bd294e9010a
DWunion	arch/mips/lib/libgcc.h	/^} DWunion;$/;"	t	typeref:union:__anonf7490e5a010a
DWunion	arch/nios2/lib/libgcc.c	/^} DWunion;$/;"	t	typeref:union:__anona37ae167010a	file:
DWunion	arch/sh/lib/libgcc.h	/^} DWunion;$/;"	t	typeref:union:__anon2b75257c010a
DX2	lib/lzo/lzodefs.h	/^#define DX2(/;"	d
DX3	lib/lzo/lzodefs.h	/^#define DX3(/;"	d
DXDLLCR_DLLDIS	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DXDLLCR_DLLDIS	/;"	d
DXDLLCR_DLLSRST	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define DXDLLCR_DLLSRST	/;"	d
DXMDLR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXMDLR0	/;"	d
DXMDLR0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXMDLR0	/;"	d
DX_REG_DUMP	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^#define DX_REG_DUMP(/;"	d	file:
DX_REG_DUMP	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^#define DX_REG_DUMP(/;"	d	file:
DXnGCR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define DXnGCR0(/;"	d
DXnGCR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnGCR0(/;"	d
DXnGCR0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define DXnGCR0(/;"	d
DXnGCR0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnGCR0(/;"	d
DXnGSR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define DXnGSR0(/;"	d
DXnGSR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnGSR0(/;"	d
DXnGSR0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define DXnGSR0(/;"	d
DXnGSR0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnGSR0(/;"	d
DXnGSR1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define DXnGSR1(/;"	d
DXnGSR1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnGSR1(/;"	d
DXnGSR1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define DXnGSR1(/;"	d
DXnGSR1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnGSR1(/;"	d
DXnGSR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define DXnGSR2(/;"	d
DXnGSR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnGSR2(/;"	d
DXnGSR2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define DXnGSR2(/;"	d
DXnGSR2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnGSR2(/;"	d
DXnGTR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define DXnGTR(/;"	d
DXnGTR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnGTR(/;"	d
DXnGTR	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define DXnGTR(/;"	d
DXnGTR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnGTR(/;"	d
DXnLCDLR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnLCDLR0(/;"	d
DXnLCDLR0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnLCDLR0(/;"	d
DXnLCDLR1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnLCDLR1(/;"	d
DXnLCDLR1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnLCDLR1(/;"	d
DXnLCDLR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnLCDLR2(/;"	d
DXnLCDLR2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnLCDLR2(/;"	d
DXnMDLR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define DXnMDLR(/;"	d
DXnMDLR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define DXnMDLR(/;"	d
DYNAMIC_BURST	drivers/usb/eth/r8152.h	/^#define DYNAMIC_BURST	/;"	d
DYNAMIC_COMP	include/jffs2/mini_inflate.h	/^#define DYNAMIC_COMP /;"	d
DYNAMIC_CS_SIZE_CONFIG	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define DYNAMIC_CS_SIZE_CONFIG$/;"	d
DYNAMIC_IO_PORT_BASE	arch/mips/Kconfig	/^config DYNAMIC_IO_PORT_BASE$/;"	c	menu:MIPS architecture
DYN_ODT	arch/arm/mach-keystone/ddr3_spd.c	/^#define DYN_ODT /;"	d	file:
DYN_STOP_LAT_MASK	include/radeon.h	/^#define DYN_STOP_LAT_MASK	/;"	d
DYN_TREES	lib/zlib/zutil.h	/^#define DYN_TREES /;"	d
D_0	arch/arm/lib/uldivmod.S	/^D_0	.req	r6$/;"	l
D_1	arch/arm/lib/uldivmod.S	/^D_1	.req	r7$/;"	l
D_BITS	lib/lzo/lzodefs.h	/^#define D_BITS	/;"	d
D_CLS	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  D_CLS	/;"	d
D_CODES	lib/zlib/deflate.h	/^#define D_CODES /;"	d
D_ERROR	arch/x86/cpu/quark/mrc_util.h	/^#define D_ERROR	/;"	d
D_FCALL	arch/x86/cpu/quark/mrc_util.h	/^#define D_FCALL	/;"	d
D_HIGH	lib/lzo/lzodefs.h	/^#define D_HIGH	/;"	d
D_INFO	arch/x86/cpu/quark/mrc_util.h	/^#define D_INFO	/;"	d
D_LCK	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  D_LCK	/;"	d
D_MASK	include/bedbug/ppc.h	/^#define D_MASK /;"	d
D_MASK	lib/lzo/lzodefs.h	/^#define D_MASK	/;"	d
D_OPCODE	include/bedbug/ppc.h	/^#define D_OPCODE(/;"	d
D_OPEN	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  D_OPEN	/;"	d
D_REGRD	arch/x86/cpu/quark/mrc_util.h	/^#define D_REGRD	/;"	d
D_REGWR	arch/x86/cpu/quark/mrc_util.h	/^#define D_REGWR	/;"	d
D_TIME	arch/x86/cpu/quark/mrc_util.h	/^#define D_TIME	/;"	d
D_TRN	arch/x86/cpu/quark/mrc_util.h	/^#define D_TRN	/;"	d
Dad	lib/zlib/deflate.h	/^#define Dad /;"	d
Data	drivers/net/bfin_mac.h	/^	u8 Data[0];		\/* payload bytes		*\/$/;"	m	struct:adi_ether_frame_buffer	typeref:typename:u8[0]
DataDirectory	include/pe.h	/^	IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; \/* 0x60 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:IMAGE_DATA_DIRECTORY[]
DataDirectory	include/pe.h	/^	IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES];$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:IMAGE_DATA_DIRECTORY[]
DataFlashInst	drivers/mtd/dataflash.c	/^static AT91S_DataFlash DataFlashInst;$/;"	v	typeref:typename:AT91S_DataFlash	file:
DataFlash_state	include/dataflash.h	/^	volatile unsigned char DataFlash_state;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:volatile unsigned char
DataLength	drivers/usb/gadget/rndis.h	/^	__le32	DataLength;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
DataOffset	drivers/usb/gadget/rndis.h	/^	__le32	DataOffset;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
DataTransferLength	drivers/usb/gadget/storage_common.c	/^	__le32	DataTransferLength;	\/* Size of the data *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:__le32	file:
Debug	tools/patman/tout.py	/^def Debug(msg):$/;"	f
DebugException	arch/powerpc/cpu/mpc512x/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/mpc5xx/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/mpc5xxx/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/mpc8260/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/mpc83xx/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/mpc85xx/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/mpc8xx/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DebugException	arch/powerpc/cpu/ppc4xx/traps.c	/^void DebugException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DecrementerPITException	arch/powerpc/cpu/ppc4xx/traps.c	/^void DecrementerPITException(struct pt_regs *regs)$/;"	f	typeref:typename:void
DeleteProp	tools/dtoc/fdt.py	/^    def DeleteProp(self, prop_name):$/;"	m	class:NodeBase
DeleteProp	tools/dtoc/fdt_fallback.py	/^    def DeleteProp(self, prop_name):$/;"	m	class:Node
DeleteProp	tools/dtoc/fdt_normal.py	/^    def DeleteProp(self, prop_name):$/;"	m	class:Node
Demo for driver model	drivers/demo/Kconfig	/^menu "Demo for driver model"$/;"	m
DesRxColl	drivers/net/natsemi.c	/^	DescRxLoop = 0x00020000, DesRxColl = 0x00010000,$/;"	e	enum:desc_status_bits	file:
DesRxColl	drivers/net/ns8382x.c	/^	DescRxLoop = 0x00020000, DesRxColl = 0x00010000,$/;"	e	enum:desc_status_bits	file:
Desc	include/dataflash.h	/^	AT91S_DataflashDesc Desc;$/;"	m	struct:_AT91S_DATAFLASH_INFO	typeref:typename:AT91S_DataflashDesc
DescIntr	drivers/net/natsemi.c	/^	DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000,$/;"	e	enum:desc_status_bits	file:
DescIntr	drivers/net/ns8382x.c	/^	DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000,$/;"	e	enum:desc_status_bits	file:
DescMore	drivers/net/natsemi.c	/^	DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000,$/;"	e	enum:desc_status_bits	file:
DescMore	drivers/net/ns8382x.c	/^	DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000,$/;"	e	enum:desc_status_bits	file:
DescNoCRC	drivers/net/natsemi.c	/^	DescNoCRC = 0x10000000, DescPktOK = 0x08000000,$/;"	e	enum:desc_status_bits	file:
DescNoCRC	drivers/net/ns8382x.c	/^	DescNoCRC = 0x10000000, DescPktOK = 0x08000000,$/;"	e	enum:desc_status_bits	file:
DescOwn	drivers/net/natsemi.c	/^	DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000,$/;"	e	enum:desc_status_bits	file:
DescOwn	drivers/net/ns8382x.c	/^	DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000,$/;"	e	enum:desc_status_bits	file:
DescPktOK	drivers/net/natsemi.c	/^	DescNoCRC = 0x10000000, DescPktOK = 0x08000000,$/;"	e	enum:desc_status_bits	file:
DescPktOK	drivers/net/ns8382x.c	/^	DescNoCRC = 0x10000000, DescPktOK = 0x08000000,$/;"	e	enum:desc_status_bits	file:
DescRxAbort	drivers/net/natsemi.c	/^	DescRxAbort = 0x04000000, DescRxOver = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescRxAbort	drivers/net/ns8382x.c	/^	DescRxAbort = 0x04000000, DescRxOver = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescRxAlign	drivers/net/natsemi.c	/^	DescRxCRC = 0x00080000, DescRxAlign = 0x00040000,$/;"	e	enum:desc_status_bits	file:
DescRxAlign	drivers/net/ns8382x.c	/^	DescRxCRC = 0x00080000, DescRxAlign = 0x00040000,$/;"	e	enum:desc_status_bits	file:
DescRxCRC	drivers/net/natsemi.c	/^	DescRxCRC = 0x00080000, DescRxAlign = 0x00040000,$/;"	e	enum:desc_status_bits	file:
DescRxCRC	drivers/net/ns8382x.c	/^	DescRxCRC = 0x00080000, DescRxAlign = 0x00040000,$/;"	e	enum:desc_status_bits	file:
DescRxDest	drivers/net/natsemi.c	/^	DescRxDest = 0x01800000, DescRxLong = 0x00400000,$/;"	e	enum:desc_status_bits	file:
DescRxDest	drivers/net/ns8382x.c	/^	DescRxDest = 0x01800000, DescRxLong = 0x00400000,$/;"	e	enum:desc_status_bits	file:
DescRxInvalid	drivers/net/natsemi.c	/^	DescRxRunt = 0x00200000, DescRxInvalid = 0x00100000,$/;"	e	enum:desc_status_bits	file:
DescRxInvalid	drivers/net/ns8382x.c	/^	DescRxRunt = 0x00200000, DescRxInvalid = 0x00100000,$/;"	e	enum:desc_status_bits	file:
DescRxLong	drivers/net/natsemi.c	/^	DescRxDest = 0x01800000, DescRxLong = 0x00400000,$/;"	e	enum:desc_status_bits	file:
DescRxLong	drivers/net/ns8382x.c	/^	DescRxDest = 0x01800000, DescRxLong = 0x00400000,$/;"	e	enum:desc_status_bits	file:
DescRxLoop	drivers/net/natsemi.c	/^	DescRxLoop = 0x00020000, DesRxColl = 0x00010000,$/;"	e	enum:desc_status_bits	file:
DescRxLoop	drivers/net/ns8382x.c	/^	DescRxLoop = 0x00020000, DesRxColl = 0x00010000,$/;"	e	enum:desc_status_bits	file:
DescRxOver	drivers/net/natsemi.c	/^	DescRxAbort = 0x04000000, DescRxOver = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescRxOver	drivers/net/ns8382x.c	/^	DescRxAbort = 0x04000000, DescRxOver = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescRxRunt	drivers/net/natsemi.c	/^	DescRxRunt = 0x00200000, DescRxInvalid = 0x00100000,$/;"	e	enum:desc_status_bits	file:
DescRxRunt	drivers/net/ns8382x.c	/^	DescRxRunt = 0x00200000, DescRxInvalid = 0x00100000,$/;"	e	enum:desc_status_bits	file:
DescSizeMask	drivers/net/natsemi.c	/^	DescSizeMask = 0xfff,$/;"	e	enum:desc_status_bits	file:
DescSizeMask	drivers/net/ns8382x.c	/^	DescSizeMask = 0xfff,$/;"	e	enum:desc_status_bits	file:
DescTxAbort	drivers/net/natsemi.c	/^	DescTxAbort = 0x04000000, DescTxFIFO = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescTxAbort	drivers/net/ns8382x.c	/^	DescTxAbort = 0x04000000, DescTxFIFO = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescTxCarrier	drivers/net/natsemi.c	/^	DescTxCarrier = 0x01000000, DescTxDefer = 0x00800000,$/;"	e	enum:desc_status_bits	file:
DescTxCarrier	drivers/net/ns8382x.c	/^	DescTxCarrier = 0x01000000, DescTxDefer = 0x00800000,$/;"	e	enum:desc_status_bits	file:
DescTxCollCount	drivers/net/natsemi.c	/^	DescTxExcColl = 0x00100000, DescTxCollCount = 0x000f0000,$/;"	e	enum:desc_status_bits	file:
DescTxCollCount	drivers/net/ns8382x.c	/^	DescTxExcColl = 0x00100000, DescTxCollCount = 0x000f0000,$/;"	e	enum:desc_status_bits	file:
DescTxDefer	drivers/net/natsemi.c	/^	DescTxCarrier = 0x01000000, DescTxDefer = 0x00800000,$/;"	e	enum:desc_status_bits	file:
DescTxDefer	drivers/net/ns8382x.c	/^	DescTxCarrier = 0x01000000, DescTxDefer = 0x00800000,$/;"	e	enum:desc_status_bits	file:
DescTxExcColl	drivers/net/natsemi.c	/^	DescTxExcColl = 0x00100000, DescTxCollCount = 0x000f0000,$/;"	e	enum:desc_status_bits	file:
DescTxExcColl	drivers/net/ns8382x.c	/^	DescTxExcColl = 0x00100000, DescTxCollCount = 0x000f0000,$/;"	e	enum:desc_status_bits	file:
DescTxExcDefer	drivers/net/natsemi.c	/^	DescTxExcDefer = 0x00400000, DescTxOOWCol = 0x00200000,$/;"	e	enum:desc_status_bits	file:
DescTxExcDefer	drivers/net/ns8382x.c	/^	DescTxExcDefer = 0x00400000, DescTxOOWCol = 0x00200000,$/;"	e	enum:desc_status_bits	file:
DescTxFIFO	drivers/net/natsemi.c	/^	DescTxAbort = 0x04000000, DescTxFIFO = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescTxFIFO	drivers/net/ns8382x.c	/^	DescTxAbort = 0x04000000, DescTxFIFO = 0x02000000,$/;"	e	enum:desc_status_bits	file:
DescTxOOWCol	drivers/net/natsemi.c	/^	DescTxExcDefer = 0x00400000, DescTxOOWCol = 0x00200000,$/;"	e	enum:desc_status_bits	file:
DescTxOOWCol	drivers/net/ns8382x.c	/^	DescTxExcDefer = 0x00400000, DescTxOOWCol = 0x00200000,$/;"	e	enum:desc_status_bits	file:
Dest	drivers/net/bfin_mac.h	/^	u8 Dest[6];		\/* destination MAC address	*\/$/;"	m	struct:adi_ether_frame_buffer	typeref:typename:u8[6]
DetectProject	tools/patman/project.py	/^def DetectProject():$/;"	f
DevSize	drivers/mtd/jedec_flash.c	/^	const int DevSize;$/;"	m	struct:amd_flash_info	typeref:typename:const int	file:
Device	include/dataflash.h	/^	AT91S_DataflashFeatures Device; \/* Pointer on a dataflash features array *\/$/;"	m	struct:_AT91S_DATAFLASH_INFO	typeref:typename:AT91S_DataflashFeatures
Device Drivers	drivers/Kconfig	/^menu "Device Drivers"$/;"	m
Device Tree Control	dts/Kconfig	/^menu "Device Tree Control"$/;"	m
Device access commands	cmd/Kconfig	/^menu "Device access commands"$/;"	m	menu:Command line interface
DeviceFlags	drivers/usb/gadget/rndis.h	/^	__le32	DeviceFlags;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
DeviceID	include/bios_emul.h	/^	u32 DeviceID;$/;"	m	struct:__anoneb05efed0108	typeref:typename:u32
DeviceOutRequest	include/usb_defs.h	/^#define DeviceOutRequest /;"	d
DeviceRemovable	include/usb.h	/^	unsigned char  DeviceRemovable[(USB_MAXCHILDREN+1+7)\/8];$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char[]
DeviceRequest	include/usb_defs.h	/^#define DeviceRequest /;"	d
DeviceVcHandle	drivers/usb/gadget/rndis.h	/^	__le32	DeviceVcHandle;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
DeviceVcHandle	drivers/usb/gadget/rndis.h	/^	__le32	DeviceVcHandle;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
DisableDMA	board/bf527-ezkit/video.c	/^void DisableDMA(void)$/;"	f	typeref:typename:void
DisableDMA	board/bf548-ezkit/video.c	/^void DisableDMA(void)$/;"	f	typeref:typename:void
DisableDMA	board/cm-bf548/video.c	/^void DisableDMA(void)$/;"	f	typeref:typename:void
DisablePPI	board/bf527-ezkit/video.c	/^void DisablePPI(void)$/;"	f	typeref:typename:void
DisablePPI	board/bf548-ezkit/video.c	/^void DisablePPI(void)$/;"	f	typeref:typename:void
DisablePPI	board/cm-bf548/video.c	/^void DisablePPI(void)$/;"	f	typeref:typename:void
DisableTIMER0	board/bf527-ezkit/video.c	/^void DisableTIMER0(void)$/;"	f	typeref:typename:void
DisableTIMER1	board/bf527-ezkit/video.c	/^void DisableTIMER1(void)$/;"	f	typeref:typename:void
DisconnectCnt	drivers/net/rtl8139.c	/^	DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,$/;"	e	enum:RTL8139_registers	file:
Discr	lib/dhry/dhry.h	/^    Enumeration    Discr;$/;"	m	struct:record	typeref:typename:Enumeration
DiskOnChip	include/linux/mtd/doc2000.h	/^struct DiskOnChip {$/;"	s
DllCharacteristics	include/pe.h	/^	uint16_t DllCharacteristics;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
DllCharacteristics	include/pe.h	/^	uint16_t DllCharacteristics;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
Dma	drivers/net/bfin_mac.h	/^	DMA_DESCRIPTOR Dma[2];		\/* first for the frame, second for the status *\/$/;"	m	struct:adi_ether_buffer	typeref:typename:DMA_DESCRIPTOR[2]
DoBuildman	tools/buildman/control.py	/^def DoBuildman(options, args, toolchains=None, make_func=None, boards=None,$/;"	f
DoC_2k_CDSN_IO	include/linux/mtd/doc2000.h	/^#define DoC_2k_CDSN_IO	/;"	d
DoC_2k_ECCStatus	include/linux/mtd/doc2000.h	/^#define DoC_2k_ECCStatus	/;"	d
DoC_AliasResolution	include/linux/mtd/doc2000.h	/^#define DoC_AliasResolution	/;"	d
DoC_CDSNControl	include/linux/mtd/doc2000.h	/^#define DoC_CDSNControl	/;"	d
DoC_CDSNDeviceSelect	include/linux/mtd/doc2000.h	/^#define DoC_CDSNDeviceSelect	/;"	d
DoC_CDSNSlowIO	include/linux/mtd/doc2000.h	/^#define DoC_CDSNSlowIO	/;"	d
DoC_ChipID	include/linux/mtd/doc2000.h	/^#define DoC_ChipID	/;"	d
DoC_ConfigInput	include/linux/mtd/doc2000.h	/^#define DoC_ConfigInput	/;"	d
DoC_DOCControl	include/linux/mtd/doc2000.h	/^#define DoC_DOCControl	/;"	d
DoC_DOCStatus	include/linux/mtd/doc2000.h	/^#define DoC_DOCStatus	/;"	d
DoC_ECCConf	include/linux/mtd/doc2000.h	/^#define DoC_ECCConf	/;"	d
DoC_ECCSyndrome0	include/linux/mtd/doc2000.h	/^#define DoC_ECCSyndrome0	/;"	d
DoC_ECCSyndrome1	include/linux/mtd/doc2000.h	/^#define DoC_ECCSyndrome1	/;"	d
DoC_ECCSyndrome2	include/linux/mtd/doc2000.h	/^#define DoC_ECCSyndrome2	/;"	d
DoC_ECCSyndrome3	include/linux/mtd/doc2000.h	/^#define DoC_ECCSyndrome3	/;"	d
DoC_ECCSyndrome4	include/linux/mtd/doc2000.h	/^#define DoC_ECCSyndrome4	/;"	d
DoC_ECCSyndrome5	include/linux/mtd/doc2000.h	/^#define DoC_ECCSyndrome5	/;"	d
DoC_FloorSelect	include/linux/mtd/doc2000.h	/^#define DoC_FloorSelect	/;"	d
DoC_LastDataRead	include/linux/mtd/doc2000.h	/^#define DoC_LastDataRead	/;"	d
DoC_Mil_CDSN_IO	include/linux/mtd/doc2000.h	/^#define DoC_Mil_CDSN_IO	/;"	d
DoC_Mplus_AccessStatus	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_AccessStatus	/;"	d
DoC_Mplus_AliasResolution	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_AliasResolution	/;"	d
DoC_Mplus_Configuration	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_Configuration	/;"	d
DoC_Mplus_CtrlConfirm	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_CtrlConfirm	/;"	d
DoC_Mplus_DOCControl	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_DOCControl	/;"	d
DoC_Mplus_DeviceSelect	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_DeviceSelect	/;"	d
DoC_Mplus_DownloadStatus	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_DownloadStatus	/;"	d
DoC_Mplus_ECCConf	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCConf /;"	d
DoC_Mplus_ECCSyndrome0	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCSyndrome0	/;"	d
DoC_Mplus_ECCSyndrome1	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCSyndrome1	/;"	d
DoC_Mplus_ECCSyndrome2	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCSyndrome2	/;"	d
DoC_Mplus_ECCSyndrome3	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCSyndrome3	/;"	d
DoC_Mplus_ECCSyndrome4	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCSyndrome4	/;"	d
DoC_Mplus_ECCSyndrome5	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ECCSyndrome5	/;"	d
DoC_Mplus_FlashAddress	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_FlashAddress	/;"	d
DoC_Mplus_FlashCmd	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_FlashCmd	/;"	d
DoC_Mplus_FlashControl	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_FlashControl	/;"	d
DoC_Mplus_FlashData0	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_FlashData0	/;"	d
DoC_Mplus_FlashData1	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_FlashData1	/;"	d
DoC_Mplus_FlashSelect	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_FlashSelect /;"	d
DoC_Mplus_LastDataRead	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_LastDataRead	/;"	d
DoC_Mplus_LastDataRead1	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_LastDataRead1	/;"	d
DoC_Mplus_NOP	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_NOP	/;"	d
DoC_Mplus_OutputControl	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_OutputControl	/;"	d
DoC_Mplus_Power	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_Power	/;"	d
DoC_Mplus_ReadPipeInit	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_ReadPipeInit	/;"	d
DoC_Mplus_Toggle	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_Toggle	/;"	d
DoC_Mplus_WritePipeTerm	include/linux/mtd/doc2000.h	/^#define DoC_Mplus_WritePipeTerm /;"	d
DoC_NOP	include/linux/mtd/doc2000.h	/^#define DoC_NOP	/;"	d
DoC_ReadPipeInit	include/linux/mtd/doc2000.h	/^#define DoC_ReadPipeInit	/;"	d
DoC_Sig1	include/linux/mtd/doc2000.h	/^#define DoC_Sig1 /;"	d
DoC_Sig2	include/linux/mtd/doc2000.h	/^#define DoC_Sig2 /;"	d
DoC_WritePipeTerm	include/linux/mtd/doc2000.h	/^#define DoC_WritePipeTerm	/;"	d
DoChecks	tools/patman/series.py	/^    def DoChecks(self):$/;"	m	class:Series
DoOutput	tools/patman/tout.py	/^def DoOutput(level, msg):$/;"	f
Download	doc/README.x86	/^Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,$/;"	l
Download	doc/README.x86	/^Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at$/;"	l
Download	tools/buildman/toolchain.py	/^    def Download(self, url):$/;"	m	class:Toolchains
DtbPlatdata	tools/dtoc/dtoc	/^class DtbPlatdata:$/;"	c
DtbPlatdata	tools/dtoc/dtoc.py	/^class DtbPlatdata:$/;"	c
DuplexMask	drivers/net/natsemi.c	/^	DuplexMask	= 0x00008000,$/;"	e	enum:ChipConfigBits	file:
E1	include/i8042.h	/^#define E1	/;"	d
E1000	drivers/net/Kconfig	/^config E1000$/;"	c
E1000_82542_2_0_REV_ID	drivers/net/e1000.h	/^#define E1000_82542_2_0_REV_ID /;"	d
E1000_82542_2_1_REV_ID	drivers/net/e1000.h	/^#define E1000_82542_2_1_REV_ID /;"	d
E1000_82542_AIT	drivers/net/e1000.h	/^#define E1000_82542_AIT /;"	d
E1000_82542_ALGNERRC	drivers/net/e1000.h	/^#define E1000_82542_ALGNERRC /;"	d
E1000_82542_BPRC	drivers/net/e1000.h	/^#define E1000_82542_BPRC /;"	d
E1000_82542_BPTC	drivers/net/e1000.h	/^#define E1000_82542_BPTC /;"	d
E1000_82542_CEXTERR	drivers/net/e1000.h	/^#define E1000_82542_CEXTERR /;"	d
E1000_82542_COLC	drivers/net/e1000.h	/^#define E1000_82542_COLC /;"	d
E1000_82542_CRCERRS	drivers/net/e1000.h	/^#define E1000_82542_CRCERRS /;"	d
E1000_82542_CTRL	drivers/net/e1000.h	/^#define E1000_82542_CTRL /;"	d
E1000_82542_CTRL_EXT	drivers/net/e1000.h	/^#define E1000_82542_CTRL_EXT /;"	d
E1000_82542_DC	drivers/net/e1000.h	/^#define E1000_82542_DC	/;"	d
E1000_82542_ECOL	drivers/net/e1000.h	/^#define E1000_82542_ECOL /;"	d
E1000_82542_EECD	drivers/net/e1000.h	/^#define E1000_82542_EECD /;"	d
E1000_82542_EERD	drivers/net/e1000.h	/^#define E1000_82542_EERD /;"	d
E1000_82542_FCAH	drivers/net/e1000.h	/^#define E1000_82542_FCAH /;"	d
E1000_82542_FCAL	drivers/net/e1000.h	/^#define E1000_82542_FCAL /;"	d
E1000_82542_FCRTH	drivers/net/e1000.h	/^#define E1000_82542_FCRTH /;"	d
E1000_82542_FCRTL	drivers/net/e1000.h	/^#define E1000_82542_FCRTL /;"	d
E1000_82542_FCRUC	drivers/net/e1000.h	/^#define E1000_82542_FCRUC /;"	d
E1000_82542_FCT	drivers/net/e1000.h	/^#define E1000_82542_FCT /;"	d
E1000_82542_FCTTV	drivers/net/e1000.h	/^#define E1000_82542_FCTTV /;"	d
E1000_82542_FFLT	drivers/net/e1000.h	/^#define E1000_82542_FFLT /;"	d
E1000_82542_FFMT	drivers/net/e1000.h	/^#define E1000_82542_FFMT /;"	d
E1000_82542_FFVT	drivers/net/e1000.h	/^#define E1000_82542_FFVT /;"	d
E1000_82542_GORCH	drivers/net/e1000.h	/^#define E1000_82542_GORCH /;"	d
E1000_82542_GORCL	drivers/net/e1000.h	/^#define E1000_82542_GORCL /;"	d
E1000_82542_GOTCH	drivers/net/e1000.h	/^#define E1000_82542_GOTCH /;"	d
E1000_82542_GOTCL	drivers/net/e1000.h	/^#define E1000_82542_GOTCL /;"	d
E1000_82542_GPRC	drivers/net/e1000.h	/^#define E1000_82542_GPRC /;"	d
E1000_82542_GPTC	drivers/net/e1000.h	/^#define E1000_82542_GPTC /;"	d
E1000_82542_ICR	drivers/net/e1000.h	/^#define E1000_82542_ICR /;"	d
E1000_82542_ICS	drivers/net/e1000.h	/^#define E1000_82542_ICS /;"	d
E1000_82542_IMC	drivers/net/e1000.h	/^#define E1000_82542_IMC /;"	d
E1000_82542_IMS	drivers/net/e1000.h	/^#define E1000_82542_IMS /;"	d
E1000_82542_IP4AT	drivers/net/e1000.h	/^#define E1000_82542_IP4AT /;"	d
E1000_82542_IP6AT	drivers/net/e1000.h	/^#define E1000_82542_IP6AT /;"	d
E1000_82542_IPAV	drivers/net/e1000.h	/^#define E1000_82542_IPAV /;"	d
E1000_82542_ITR	drivers/net/e1000.h	/^#define E1000_82542_ITR /;"	d
E1000_82542_LATECOL	drivers/net/e1000.h	/^#define E1000_82542_LATECOL /;"	d
E1000_82542_LEDCTL	drivers/net/e1000.h	/^#define E1000_82542_LEDCTL /;"	d
E1000_82542_MANC	drivers/net/e1000.h	/^#define E1000_82542_MANC /;"	d
E1000_82542_MCC	drivers/net/e1000.h	/^#define E1000_82542_MCC /;"	d
E1000_82542_MDIC	drivers/net/e1000.h	/^#define E1000_82542_MDIC /;"	d
E1000_82542_MGTPDC	drivers/net/e1000.h	/^#define E1000_82542_MGTPDC /;"	d
E1000_82542_MGTPRC	drivers/net/e1000.h	/^#define E1000_82542_MGTPRC /;"	d
E1000_82542_MGTPTC	drivers/net/e1000.h	/^#define E1000_82542_MGTPTC /;"	d
E1000_82542_MPC	drivers/net/e1000.h	/^#define E1000_82542_MPC /;"	d
E1000_82542_MPRC	drivers/net/e1000.h	/^#define E1000_82542_MPRC /;"	d
E1000_82542_MPTC	drivers/net/e1000.h	/^#define E1000_82542_MPTC /;"	d
E1000_82542_MTA	drivers/net/e1000.h	/^#define E1000_82542_MTA /;"	d
E1000_82542_PBA	drivers/net/e1000.h	/^#define E1000_82542_PBA /;"	d
E1000_82542_PRC1023	drivers/net/e1000.h	/^#define E1000_82542_PRC1023 /;"	d
E1000_82542_PRC127	drivers/net/e1000.h	/^#define E1000_82542_PRC127 /;"	d
E1000_82542_PRC1522	drivers/net/e1000.h	/^#define E1000_82542_PRC1522 /;"	d
E1000_82542_PRC255	drivers/net/e1000.h	/^#define E1000_82542_PRC255 /;"	d
E1000_82542_PRC511	drivers/net/e1000.h	/^#define E1000_82542_PRC511 /;"	d
E1000_82542_PRC64	drivers/net/e1000.h	/^#define E1000_82542_PRC64 /;"	d
E1000_82542_PTC1023	drivers/net/e1000.h	/^#define E1000_82542_PTC1023 /;"	d
E1000_82542_PTC127	drivers/net/e1000.h	/^#define E1000_82542_PTC127 /;"	d
E1000_82542_PTC1522	drivers/net/e1000.h	/^#define E1000_82542_PTC1522 /;"	d
E1000_82542_PTC255	drivers/net/e1000.h	/^#define E1000_82542_PTC255 /;"	d
E1000_82542_PTC511	drivers/net/e1000.h	/^#define E1000_82542_PTC511 /;"	d
E1000_82542_PTC64	drivers/net/e1000.h	/^#define E1000_82542_PTC64 /;"	d
E1000_82542_RA	drivers/net/e1000.h	/^#define E1000_82542_RA	/;"	d
E1000_82542_RADV	drivers/net/e1000.h	/^#define E1000_82542_RADV /;"	d
E1000_82542_RCTL	drivers/net/e1000.h	/^#define E1000_82542_RCTL /;"	d
E1000_82542_RDBAH	drivers/net/e1000.h	/^#define E1000_82542_RDBAH /;"	d
E1000_82542_RDBAL	drivers/net/e1000.h	/^#define E1000_82542_RDBAL /;"	d
E1000_82542_RDH	drivers/net/e1000.h	/^#define E1000_82542_RDH /;"	d
E1000_82542_RDLEN	drivers/net/e1000.h	/^#define E1000_82542_RDLEN /;"	d
E1000_82542_RDT	drivers/net/e1000.h	/^#define E1000_82542_RDT /;"	d
E1000_82542_RDTR	drivers/net/e1000.h	/^#define E1000_82542_RDTR /;"	d
E1000_82542_RFC	drivers/net/e1000.h	/^#define E1000_82542_RFC /;"	d
E1000_82542_RJC	drivers/net/e1000.h	/^#define E1000_82542_RJC /;"	d
E1000_82542_RLEC	drivers/net/e1000.h	/^#define E1000_82542_RLEC /;"	d
E1000_82542_RNBC	drivers/net/e1000.h	/^#define E1000_82542_RNBC /;"	d
E1000_82542_ROC	drivers/net/e1000.h	/^#define E1000_82542_ROC /;"	d
E1000_82542_RSRPD	drivers/net/e1000.h	/^#define E1000_82542_RSRPD /;"	d
E1000_82542_RUC	drivers/net/e1000.h	/^#define E1000_82542_RUC /;"	d
E1000_82542_RXCSUM	drivers/net/e1000.h	/^#define E1000_82542_RXCSUM /;"	d
E1000_82542_RXCW	drivers/net/e1000.h	/^#define E1000_82542_RXCW /;"	d
E1000_82542_RXDCTL	drivers/net/e1000.h	/^#define E1000_82542_RXDCTL /;"	d
E1000_82542_RXERRC	drivers/net/e1000.h	/^#define E1000_82542_RXERRC /;"	d
E1000_82542_SCC	drivers/net/e1000.h	/^#define E1000_82542_SCC /;"	d
E1000_82542_SEC	drivers/net/e1000.h	/^#define E1000_82542_SEC /;"	d
E1000_82542_STATUS	drivers/net/e1000.h	/^#define E1000_82542_STATUS /;"	d
E1000_82542_SYMERRS	drivers/net/e1000.h	/^#define E1000_82542_SYMERRS /;"	d
E1000_82542_TADV	drivers/net/e1000.h	/^#define E1000_82542_TADV /;"	d
E1000_82542_TBT	drivers/net/e1000.h	/^#define E1000_82542_TBT /;"	d
E1000_82542_TCTL	drivers/net/e1000.h	/^#define E1000_82542_TCTL /;"	d
E1000_82542_TDBAH	drivers/net/e1000.h	/^#define E1000_82542_TDBAH /;"	d
E1000_82542_TDBAL	drivers/net/e1000.h	/^#define E1000_82542_TDBAL /;"	d
E1000_82542_TDH	drivers/net/e1000.h	/^#define E1000_82542_TDH /;"	d
E1000_82542_TDLEN	drivers/net/e1000.h	/^#define E1000_82542_TDLEN /;"	d
E1000_82542_TDT	drivers/net/e1000.h	/^#define E1000_82542_TDT /;"	d
E1000_82542_TIDV	drivers/net/e1000.h	/^#define E1000_82542_TIDV /;"	d
E1000_82542_TIPG	drivers/net/e1000.h	/^#define E1000_82542_TIPG /;"	d
E1000_82542_TNCRS	drivers/net/e1000.h	/^#define E1000_82542_TNCRS /;"	d
E1000_82542_TORH	drivers/net/e1000.h	/^#define E1000_82542_TORH /;"	d
E1000_82542_TORL	drivers/net/e1000.h	/^#define E1000_82542_TORL /;"	d
E1000_82542_TOTH	drivers/net/e1000.h	/^#define E1000_82542_TOTH /;"	d
E1000_82542_TOTL	drivers/net/e1000.h	/^#define E1000_82542_TOTL /;"	d
E1000_82542_TPR	drivers/net/e1000.h	/^#define E1000_82542_TPR /;"	d
E1000_82542_TPT	drivers/net/e1000.h	/^#define E1000_82542_TPT /;"	d
E1000_82542_TSCTC	drivers/net/e1000.h	/^#define E1000_82542_TSCTC /;"	d
E1000_82542_TSCTFC	drivers/net/e1000.h	/^#define E1000_82542_TSCTFC /;"	d
E1000_82542_TSPMT	drivers/net/e1000.h	/^#define E1000_82542_TSPMT /;"	d
E1000_82542_TXCW	drivers/net/e1000.h	/^#define E1000_82542_TXCW /;"	d
E1000_82542_TXDCTL	drivers/net/e1000.h	/^#define E1000_82542_TXDCTL /;"	d
E1000_82542_TXDMAC	drivers/net/e1000.h	/^#define E1000_82542_TXDMAC /;"	d
E1000_82542_VET	drivers/net/e1000.h	/^#define E1000_82542_VET /;"	d
E1000_82542_VFTA	drivers/net/e1000.h	/^#define E1000_82542_VFTA /;"	d
E1000_82542_WUC	drivers/net/e1000.h	/^#define E1000_82542_WUC /;"	d
E1000_82542_WUFC	drivers/net/e1000.h	/^#define E1000_82542_WUFC /;"	d
E1000_82542_WUPL	drivers/net/e1000.h	/^#define E1000_82542_WUPL /;"	d
E1000_82542_WUPM	drivers/net/e1000.h	/^#define E1000_82542_WUPM /;"	d
E1000_82542_WUS	drivers/net/e1000.h	/^#define E1000_82542_WUS /;"	d
E1000_82542_XOFFRXC	drivers/net/e1000.h	/^#define E1000_82542_XOFFRXC /;"	d
E1000_82542_XOFFTXC	drivers/net/e1000.h	/^#define E1000_82542_XOFFTXC /;"	d
E1000_82542_XONRXC	drivers/net/e1000.h	/^#define E1000_82542_XONRXC /;"	d
E1000_82542_XONTXC	drivers/net/e1000.h	/^#define E1000_82542_XONTXC /;"	d
E1000_AIT	drivers/net/e1000.h	/^#define E1000_AIT /;"	d
E1000_ALGNERRC	drivers/net/e1000.h	/^#define E1000_ALGNERRC /;"	d
E1000_BLK_PHY_RESET	drivers/net/e1000.h	/^#define E1000_BLK_PHY_RESET	/;"	d
E1000_BPRC	drivers/net/e1000.h	/^#define E1000_BPRC /;"	d
E1000_BPTC	drivers/net/e1000.h	/^#define E1000_BPTC /;"	d
E1000_BUFFER_ALIGN	drivers/net/e1000.c	/^#define E1000_BUFFER_ALIGN	/;"	d	file:
E1000_CEXTERR	drivers/net/e1000.h	/^#define E1000_CEXTERR /;"	d
E1000_COLC	drivers/net/e1000.h	/^#define E1000_COLC /;"	d
E1000_COLD_SHIFT	drivers/net/e1000.h	/^#define E1000_COLD_SHIFT	/;"	d
E1000_COLLISION_DISTANCE	drivers/net/e1000.h	/^#define E1000_COLLISION_DISTANCE /;"	d
E1000_COLLISION_DISTANCE_82542	drivers/net/e1000.h	/^#define E1000_COLLISION_DISTANCE_82542 /;"	d
E1000_COLLISION_THRESHOLD	drivers/net/e1000.h	/^#define E1000_COLLISION_THRESHOLD	/;"	d
E1000_CRCERRS	drivers/net/e1000.h	/^#define E1000_CRCERRS /;"	d
E1000_CTRL	drivers/net/e1000.h	/^#define E1000_CTRL /;"	d
E1000_CTRL_ASDE	drivers/net/e1000.h	/^#define E1000_CTRL_ASDE /;"	d
E1000_CTRL_BEM	drivers/net/e1000.h	/^#define E1000_CTRL_BEM	/;"	d
E1000_CTRL_BEM32	drivers/net/e1000.h	/^#define E1000_CTRL_BEM32 /;"	d
E1000_CTRL_EXT	drivers/net/e1000.h	/^#define E1000_CTRL_EXT /;"	d
E1000_CTRL_EXT_ASDCHK	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_ASDCHK	/;"	d
E1000_CTRL_EXT_EE_RST	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_EE_RST	/;"	d
E1000_CTRL_EXT_GPI0_EN	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_GPI0_EN	/;"	d
E1000_CTRL_EXT_GPI1_EN	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_GPI1_EN	/;"	d
E1000_CTRL_EXT_GPI2_EN	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_GPI2_EN	/;"	d
E1000_CTRL_EXT_GPI3_EN	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_GPI3_EN	/;"	d
E1000_CTRL_EXT_INT_TIMER_CLR	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_INT_TIMER_CLR /;"	d
E1000_CTRL_EXT_IPS	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_IPS	/;"	d
E1000_CTRL_EXT_LINK_MODE_GMII	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_LINK_MODE_GMII /;"	d
E1000_CTRL_EXT_LINK_MODE_MASK	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_LINK_MODE_MASK /;"	d
E1000_CTRL_EXT_LINK_MODE_TBI	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_LINK_MODE_TBI /;"	d
E1000_CTRL_EXT_PHYINT_EN	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_PHYINT_EN /;"	d
E1000_CTRL_EXT_PHY_INT	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_PHY_INT	/;"	d
E1000_CTRL_EXT_RO_DIS	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_RO_DIS /;"	d
E1000_CTRL_EXT_SDP4_DATA	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP4_DATA /;"	d
E1000_CTRL_EXT_SDP4_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP4_DIR /;"	d
E1000_CTRL_EXT_SDP5_DATA	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP5_DATA /;"	d
E1000_CTRL_EXT_SDP5_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP5_DIR /;"	d
E1000_CTRL_EXT_SDP6_DATA	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP6_DATA /;"	d
E1000_CTRL_EXT_SDP6_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP6_DIR /;"	d
E1000_CTRL_EXT_SDP7_DATA	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP7_DATA /;"	d
E1000_CTRL_EXT_SDP7_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SDP7_DIR /;"	d
E1000_CTRL_EXT_SPD_BYPS	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SPD_BYPS /;"	d
E1000_CTRL_EXT_SWDPIN6	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SWDPIN6	/;"	d
E1000_CTRL_EXT_SWDPIN7	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SWDPIN7	/;"	d
E1000_CTRL_EXT_SWDPIO6	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SWDPIO6	/;"	d
E1000_CTRL_EXT_SWDPIO7	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_SWDPIO7	/;"	d
E1000_CTRL_EXT_WR_WMARK_256	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_WR_WMARK_256 /;"	d
E1000_CTRL_EXT_WR_WMARK_320	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_WR_WMARK_320 /;"	d
E1000_CTRL_EXT_WR_WMARK_384	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_WR_WMARK_384 /;"	d
E1000_CTRL_EXT_WR_WMARK_448	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_WR_WMARK_448 /;"	d
E1000_CTRL_EXT_WR_WMARK_MASK	drivers/net/e1000.h	/^#define E1000_CTRL_EXT_WR_WMARK_MASK /;"	d
E1000_CTRL_FD	drivers/net/e1000.h	/^#define E1000_CTRL_FD	/;"	d
E1000_CTRL_FRCDPX	drivers/net/e1000.h	/^#define E1000_CTRL_FRCDPX /;"	d
E1000_CTRL_FRCSPD	drivers/net/e1000.h	/^#define E1000_CTRL_FRCSPD /;"	d
E1000_CTRL_ILOS	drivers/net/e1000.h	/^#define E1000_CTRL_ILOS /;"	d
E1000_CTRL_LRST	drivers/net/e1000.h	/^#define E1000_CTRL_LRST /;"	d
E1000_CTRL_MDC	drivers/net/e1000.h	/^#define E1000_CTRL_MDC	/;"	d
E1000_CTRL_MDC_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_MDC_DIR	/;"	d
E1000_CTRL_MDIO	drivers/net/e1000.h	/^#define E1000_CTRL_MDIO	/;"	d
E1000_CTRL_MDIO_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_MDIO_DIR	/;"	d
E1000_CTRL_PHY_RESET	drivers/net/e1000.h	/^#define E1000_CTRL_PHY_RESET	/;"	d
E1000_CTRL_PHY_RESET4	drivers/net/e1000.h	/^#define E1000_CTRL_PHY_RESET4	/;"	d
E1000_CTRL_PHY_RESET_DIR	drivers/net/e1000.h	/^#define E1000_CTRL_PHY_RESET_DIR	/;"	d
E1000_CTRL_PHY_RESET_DIR4	drivers/net/e1000.h	/^#define E1000_CTRL_PHY_RESET_DIR4	/;"	d
E1000_CTRL_PHY_RST	drivers/net/e1000.h	/^#define E1000_CTRL_PHY_RST /;"	d
E1000_CTRL_PRIOR	drivers/net/e1000.h	/^#define E1000_CTRL_PRIOR /;"	d
E1000_CTRL_RFCE	drivers/net/e1000.h	/^#define E1000_CTRL_RFCE /;"	d
E1000_CTRL_RST	drivers/net/e1000.h	/^#define E1000_CTRL_RST	/;"	d
E1000_CTRL_RTE	drivers/net/e1000.h	/^#define E1000_CTRL_RTE	/;"	d
E1000_CTRL_SLE	drivers/net/e1000.h	/^#define E1000_CTRL_SLE	/;"	d
E1000_CTRL_SLU	drivers/net/e1000.h	/^#define E1000_CTRL_SLU	/;"	d
E1000_CTRL_SPD_10	drivers/net/e1000.h	/^#define E1000_CTRL_SPD_10 /;"	d
E1000_CTRL_SPD_100	drivers/net/e1000.h	/^#define E1000_CTRL_SPD_100 /;"	d
E1000_CTRL_SPD_1000	drivers/net/e1000.h	/^#define E1000_CTRL_SPD_1000 /;"	d
E1000_CTRL_SPD_SEL	drivers/net/e1000.h	/^#define E1000_CTRL_SPD_SEL /;"	d
E1000_CTRL_SWDPIN0	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIN0 /;"	d
E1000_CTRL_SWDPIN1	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIN1 /;"	d
E1000_CTRL_SWDPIN2	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIN2 /;"	d
E1000_CTRL_SWDPIN3	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIN3 /;"	d
E1000_CTRL_SWDPIO0	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIO0 /;"	d
E1000_CTRL_SWDPIO1	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIO1 /;"	d
E1000_CTRL_SWDPIO2	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIO2 /;"	d
E1000_CTRL_SWDPIO3	drivers/net/e1000.h	/^#define E1000_CTRL_SWDPIO3 /;"	d
E1000_CTRL_TFCE	drivers/net/e1000.h	/^#define E1000_CTRL_TFCE /;"	d
E1000_CTRL_TME	drivers/net/e1000.h	/^#define E1000_CTRL_TME	/;"	d
E1000_CTRL_VME	drivers/net/e1000.h	/^#define E1000_CTRL_VME	/;"	d
E1000_CT_SHIFT	drivers/net/e1000.h	/^#define E1000_CT_SHIFT	/;"	d
E1000_DBG	drivers/net/e1000.h	/^#define E1000_DBG(/;"	d
E1000_DC	drivers/net/e1000.h	/^#define E1000_DC /;"	d
E1000_DEFAULT_PCIE_PBA	drivers/net/e1000.c	/^#define E1000_DEFAULT_PCIE_PBA	/;"	d	file:
E1000_DEFAULT_PCI_PBA	drivers/net/e1000.c	/^#define E1000_DEFAULT_PCI_PBA	/;"	d	file:
E1000_DEV_ID_80003ES2LAN_COPPER_DPT	drivers/net/e1000.h	/^#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT /;"	d
E1000_DEV_ID_80003ES2LAN_COPPER_SPT	drivers/net/e1000.h	/^#define E1000_DEV_ID_80003ES2LAN_COPPER_SPT /;"	d
E1000_DEV_ID_80003ES2LAN_SERDES_DPT	drivers/net/e1000.h	/^#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT /;"	d
E1000_DEV_ID_80003ES2LAN_SERDES_SPT	drivers/net/e1000.h	/^#define E1000_DEV_ID_80003ES2LAN_SERDES_SPT /;"	d
E1000_DEV_ID_82540EM	drivers/net/e1000.h	/^#define E1000_DEV_ID_82540EM	/;"	d
E1000_DEV_ID_82540EM_LOM	drivers/net/e1000.h	/^#define E1000_DEV_ID_82540EM_LOM /;"	d
E1000_DEV_ID_82540EP	drivers/net/e1000.h	/^#define E1000_DEV_ID_82540EP /;"	d
E1000_DEV_ID_82540EP_LOM	drivers/net/e1000.h	/^#define E1000_DEV_ID_82540EP_LOM /;"	d
E1000_DEV_ID_82540EP_LP	drivers/net/e1000.h	/^#define E1000_DEV_ID_82540EP_LP /;"	d
E1000_DEV_ID_82541EI	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541EI /;"	d
E1000_DEV_ID_82541EI_MOBILE	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541EI_MOBILE /;"	d
E1000_DEV_ID_82541ER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541ER /;"	d
E1000_DEV_ID_82541ER_LOM	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541ER_LOM /;"	d
E1000_DEV_ID_82541GI	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541GI /;"	d
E1000_DEV_ID_82541GI_LF	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541GI_LF /;"	d
E1000_DEV_ID_82541GI_MOBILE	drivers/net/e1000.h	/^#define E1000_DEV_ID_82541GI_MOBILE /;"	d
E1000_DEV_ID_82542	drivers/net/e1000.h	/^#define E1000_DEV_ID_82542	/;"	d
E1000_DEV_ID_82543GC_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82543GC_COPPER /;"	d
E1000_DEV_ID_82543GC_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82543GC_FIBER /;"	d
E1000_DEV_ID_82544EI_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82544EI_COPPER /;"	d
E1000_DEV_ID_82544EI_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82544EI_FIBER /;"	d
E1000_DEV_ID_82544GC_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82544GC_COPPER /;"	d
E1000_DEV_ID_82544GC_LOM	drivers/net/e1000.h	/^#define E1000_DEV_ID_82544GC_LOM /;"	d
E1000_DEV_ID_82545EM_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82545EM_COPPER /;"	d
E1000_DEV_ID_82545EM_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82545EM_FIBER /;"	d
E1000_DEV_ID_82545GM_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82545GM_COPPER /;"	d
E1000_DEV_ID_82545GM_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82545GM_FIBER /;"	d
E1000_DEV_ID_82545GM_SERDES	drivers/net/e1000.h	/^#define E1000_DEV_ID_82545GM_SERDES /;"	d
E1000_DEV_ID_82546EB_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546EB_COPPER /;"	d
E1000_DEV_ID_82546EB_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546EB_FIBER /;"	d
E1000_DEV_ID_82546EB_QUAD_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546EB_QUAD_COPPER /;"	d
E1000_DEV_ID_82546GB_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546GB_COPPER /;"	d
E1000_DEV_ID_82546GB_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546GB_FIBER /;"	d
E1000_DEV_ID_82546GB_PCIE	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546GB_PCIE /;"	d
E1000_DEV_ID_82546GB_QUAD_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546GB_QUAD_COPPER /;"	d
E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 /;"	d
E1000_DEV_ID_82546GB_SERDES	drivers/net/e1000.h	/^#define E1000_DEV_ID_82546GB_SERDES /;"	d
E1000_DEV_ID_82547EI	drivers/net/e1000.h	/^#define E1000_DEV_ID_82547EI /;"	d
E1000_DEV_ID_82547EI_MOBILE	drivers/net/e1000.h	/^#define E1000_DEV_ID_82547EI_MOBILE /;"	d
E1000_DEV_ID_82547GI	drivers/net/e1000.h	/^#define E1000_DEV_ID_82547GI /;"	d
E1000_DEV_ID_82571EB_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_COPPER /;"	d
E1000_DEV_ID_82571EB_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_FIBER /;"	d
E1000_DEV_ID_82571EB_QUAD_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_QUAD_COPPER /;"	d
E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE /;"	d
E1000_DEV_ID_82571EB_QUAD_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_QUAD_FIBER /;"	d
E1000_DEV_ID_82571EB_SERDES	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_SERDES /;"	d
E1000_DEV_ID_82571EB_SERDES_DUAL	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_SERDES_DUAL /;"	d
E1000_DEV_ID_82571EB_SERDES_QUAD	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571EB_SERDES_QUAD /;"	d
E1000_DEV_ID_82571PT_QUAD_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82571PT_QUAD_COPPER /;"	d
E1000_DEV_ID_82572EI	drivers/net/e1000.h	/^#define E1000_DEV_ID_82572EI /;"	d
E1000_DEV_ID_82572EI_COPPER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82572EI_COPPER /;"	d
E1000_DEV_ID_82572EI_FIBER	drivers/net/e1000.h	/^#define E1000_DEV_ID_82572EI_FIBER /;"	d
E1000_DEV_ID_82572EI_SERDES	drivers/net/e1000.h	/^#define E1000_DEV_ID_82572EI_SERDES /;"	d
E1000_DEV_ID_82573E	drivers/net/e1000.h	/^#define E1000_DEV_ID_82573E /;"	d
E1000_DEV_ID_82573E_IAMT	drivers/net/e1000.h	/^#define E1000_DEV_ID_82573E_IAMT /;"	d
E1000_DEV_ID_82573L	drivers/net/e1000.h	/^#define E1000_DEV_ID_82573L /;"	d
E1000_DEV_ID_82574L	drivers/net/e1000.h	/^#define E1000_DEV_ID_82574L /;"	d
E1000_DEV_ID_ICH8_IFE	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IFE /;"	d
E1000_DEV_ID_ICH8_IFE_G	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IFE_G /;"	d
E1000_DEV_ID_ICH8_IFE_GT	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IFE_GT /;"	d
E1000_DEV_ID_ICH8_IGP_AMT	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IGP_AMT /;"	d
E1000_DEV_ID_ICH8_IGP_C	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IGP_C /;"	d
E1000_DEV_ID_ICH8_IGP_M	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IGP_M /;"	d
E1000_DEV_ID_ICH8_IGP_M_AMT	drivers/net/e1000.h	/^#define E1000_DEV_ID_ICH8_IGP_M_AMT /;"	d
E1000_ECOL	drivers/net/e1000.h	/^#define E1000_ECOL /;"	d
E1000_EEARBC	drivers/net/e1000.h	/^#define E1000_EEARBC /;"	d
E1000_EECD	drivers/net/e1000.h	/^#define E1000_EECD /;"	d
E1000_EECD_ADDR_BITS	drivers/net/e1000.h	/^#define E1000_EECD_ADDR_BITS /;"	d
E1000_EECD_AUPDEN	drivers/net/e1000.h	/^#define E1000_EECD_AUPDEN /;"	d
E1000_EECD_AUTO_RD	drivers/net/e1000.h	/^#define E1000_EECD_AUTO_RD /;"	d
E1000_EECD_CS	drivers/net/e1000.h	/^#define E1000_EECD_CS	/;"	d
E1000_EECD_DI	drivers/net/e1000.h	/^#define E1000_EECD_DI	/;"	d
E1000_EECD_DO	drivers/net/e1000.h	/^#define E1000_EECD_DO	/;"	d
E1000_EECD_FLUPD	drivers/net/e1000.h	/^#define E1000_EECD_FLUPD /;"	d
E1000_EECD_FWE_DIS	drivers/net/e1000.h	/^#define E1000_EECD_FWE_DIS /;"	d
E1000_EECD_FWE_EN	drivers/net/e1000.h	/^#define E1000_EECD_FWE_EN /;"	d
E1000_EECD_FWE_MASK	drivers/net/e1000.h	/^#define E1000_EECD_FWE_MASK /;"	d
E1000_EECD_FWE_SHIFT	drivers/net/e1000.h	/^#define E1000_EECD_FWE_SHIFT /;"	d
E1000_EECD_GNT	drivers/net/e1000.h	/^#define E1000_EECD_GNT	/;"	d
E1000_EECD_INITSRAM	drivers/net/e1000.h	/^#define E1000_EECD_INITSRAM /;"	d
E1000_EECD_NVADDS	drivers/net/e1000.h	/^#define E1000_EECD_NVADDS /;"	d
E1000_EECD_PRES	drivers/net/e1000.h	/^#define E1000_EECD_PRES /;"	d
E1000_EECD_REQ	drivers/net/e1000.h	/^#define E1000_EECD_REQ	/;"	d
E1000_EECD_SEC1VAL	drivers/net/e1000.h	/^#define E1000_EECD_SEC1VAL /;"	d
E1000_EECD_SECVAL_SHIFT	drivers/net/e1000.h	/^#define E1000_EECD_SECVAL_SHIFT /;"	d
E1000_EECD_SELSHAD	drivers/net/e1000.h	/^#define E1000_EECD_SELSHAD /;"	d
E1000_EECD_SHADV	drivers/net/e1000.h	/^#define E1000_EECD_SHADV /;"	d
E1000_EECD_SIZE	drivers/net/e1000.h	/^#define E1000_EECD_SIZE /;"	d
E1000_EECD_SIZE_EX_MASK	drivers/net/e1000.h	/^#define E1000_EECD_SIZE_EX_MASK /;"	d
E1000_EECD_SIZE_EX_SHIFT	drivers/net/e1000.h	/^#define E1000_EECD_SIZE_EX_SHIFT /;"	d
E1000_EECD_SK	drivers/net/e1000.h	/^#define E1000_EECD_SK	/;"	d
E1000_EECD_TYPE	drivers/net/e1000.h	/^#define E1000_EECD_TYPE /;"	d
E1000_EEMNGCTL	drivers/net/e1000.h	/^#define E1000_EEMNGCTL /;"	d
E1000_EEPROM_CFG_DONE	drivers/net/e1000.h	/^#define E1000_EEPROM_CFG_DONE /;"	d
E1000_EEPROM_CFG_DONE_PORT_1	drivers/net/e1000.h	/^#define E1000_EEPROM_CFG_DONE_PORT_1 /;"	d
E1000_EEPROM_GRANT_ATTEMPTS	drivers/net/e1000.h	/^#define E1000_EEPROM_GRANT_ATTEMPTS /;"	d
E1000_EEPROM_LED_LOGIC	drivers/net/e1000.h	/^#define E1000_EEPROM_LED_LOGIC /;"	d
E1000_EEPROM_POLL_READ	drivers/net/e1000.h	/^#define E1000_EEPROM_POLL_READ /;"	d
E1000_EEPROM_POLL_WRITE	drivers/net/e1000.h	/^#define E1000_EEPROM_POLL_WRITE /;"	d
E1000_EEPROM_RW_ADDR_SHIFT	drivers/net/e1000.h	/^#define E1000_EEPROM_RW_ADDR_SHIFT /;"	d
E1000_EEPROM_RW_REG_DATA	drivers/net/e1000.h	/^#define E1000_EEPROM_RW_REG_DATA /;"	d
E1000_EEPROM_RW_REG_DONE	drivers/net/e1000.h	/^#define E1000_EEPROM_RW_REG_DONE /;"	d
E1000_EEPROM_RW_REG_START	drivers/net/e1000.h	/^#define E1000_EEPROM_RW_REG_START /;"	d
E1000_EEPROM_SWDPIN0	drivers/net/e1000.h	/^#define E1000_EEPROM_SWDPIN0 /;"	d
E1000_EERD	drivers/net/e1000.h	/^#define E1000_EERD /;"	d
E1000_EERD_ADDR_MASK	drivers/net/e1000.h	/^#define E1000_EERD_ADDR_MASK /;"	d
E1000_EERD_ADDR_SHIFT	drivers/net/e1000.h	/^#define E1000_EERD_ADDR_SHIFT /;"	d
E1000_EERD_DATA_MASK	drivers/net/e1000.h	/^#define E1000_EERD_DATA_MASK /;"	d
E1000_EERD_DATA_SHIFT	drivers/net/e1000.h	/^#define E1000_EERD_DATA_SHIFT /;"	d
E1000_EERD_DONE	drivers/net/e1000.h	/^#define E1000_EERD_DONE /;"	d
E1000_EERD_START	drivers/net/e1000.h	/^#define E1000_EERD_START /;"	d
E1000_EEWR	drivers/net/e1000.h	/^#define E1000_EEWR /;"	d
E1000_ERR	drivers/net/e1000.h	/^#define E1000_ERR(/;"	d
E1000_ERR_CONFIG	drivers/net/e1000.h	/^#define E1000_ERR_CONFIG	/;"	d
E1000_ERR_EEPROM	drivers/net/e1000.h	/^#define E1000_ERR_EEPROM	/;"	d
E1000_ERR_HOST_INTERFACE_COMMAND	drivers/net/e1000.h	/^#define E1000_ERR_HOST_INTERFACE_COMMAND	/;"	d
E1000_ERR_MAC_TYPE	drivers/net/e1000.h	/^#define E1000_ERR_MAC_TYPE	/;"	d
E1000_ERR_MASTER_REQUESTS_PENDING	drivers/net/e1000.h	/^#define E1000_ERR_MASTER_REQUESTS_PENDING	/;"	d
E1000_ERR_NOLINK	drivers/net/e1000.h	/^#define E1000_ERR_NOLINK	/;"	d
E1000_ERR_PARAM	drivers/net/e1000.h	/^#define E1000_ERR_PARAM	/;"	d
E1000_ERR_PHY	drivers/net/e1000.h	/^#define E1000_ERR_PHY	/;"	d
E1000_ERR_PHY_TYPE	drivers/net/e1000.h	/^#define E1000_ERR_PHY_TYPE	/;"	d
E1000_ERR_RESET	drivers/net/e1000.h	/^#define E1000_ERR_RESET	/;"	d
E1000_ERR_SWFW_SYNC	drivers/net/e1000.h	/^#define E1000_ERR_SWFW_SYNC /;"	d
E1000_ERR_TIMEOUT	drivers/net/e1000.h	/^#define E1000_ERR_TIMEOUT	/;"	d
E1000_ERT	drivers/net/e1000.h	/^#define E1000_ERT /;"	d
E1000_EXTCNF_CTRL	drivers/net/e1000.h	/^#define E1000_EXTCNF_CTRL /;"	d
E1000_EXTCNF_SIZE	drivers/net/e1000.h	/^#define E1000_EXTCNF_SIZE /;"	d
E1000_FACTPS	drivers/net/e1000.h	/^#define E1000_FACTPS /;"	d
E1000_FCAH	drivers/net/e1000.h	/^#define E1000_FCAH /;"	d
E1000_FCAL	drivers/net/e1000.h	/^#define E1000_FCAL /;"	d
E1000_FCRTH	drivers/net/e1000.h	/^#define E1000_FCRTH /;"	d
E1000_FCRTH_RTH	drivers/net/e1000.h	/^#define E1000_FCRTH_RTH /;"	d
E1000_FCRTH_XFCE	drivers/net/e1000.h	/^#define E1000_FCRTH_XFCE /;"	d
E1000_FCRTL	drivers/net/e1000.h	/^#define E1000_FCRTL /;"	d
E1000_FCRTL_RTL	drivers/net/e1000.h	/^#define E1000_FCRTL_RTL /;"	d
E1000_FCRTL_XONE	drivers/net/e1000.h	/^#define E1000_FCRTL_XONE /;"	d
E1000_FCRUC	drivers/net/e1000.h	/^#define E1000_FCRUC /;"	d
E1000_FCT	drivers/net/e1000.h	/^#define E1000_FCT /;"	d
E1000_FCTTV	drivers/net/e1000.h	/^#define E1000_FCTTV /;"	d
E1000_FC_HIGH_THRESH	drivers/net/e1000.h	/^#define E1000_FC_HIGH_THRESH /;"	d
E1000_FC_LOW_THRESH	drivers/net/e1000.h	/^#define E1000_FC_LOW_THRESH /;"	d
E1000_FC_PAUSE_TIME	drivers/net/e1000.h	/^#define E1000_FC_PAUSE_TIME /;"	d
E1000_FDX_COLLISION_DISTANCE	drivers/net/e1000.h	/^#define E1000_FDX_COLLISION_DISTANCE	/;"	d
E1000_FFLT	drivers/net/e1000.h	/^#define E1000_FFLT /;"	d
E1000_FFLT_DBG	drivers/net/e1000.h	/^#define E1000_FFLT_DBG /;"	d
E1000_FFLT_SIZE	drivers/net/e1000.h	/^#define E1000_FFLT_SIZE /;"	d
E1000_FFMT	drivers/net/e1000.h	/^#define E1000_FFMT /;"	d
E1000_FFMT_SIZE	drivers/net/e1000.h	/^#define E1000_FFMT_SIZE /;"	d
E1000_FFVT	drivers/net/e1000.h	/^#define E1000_FFVT /;"	d
E1000_FFVT_SIZE	drivers/net/e1000.h	/^#define E1000_FFVT_SIZE /;"	d
E1000_FLASHT	drivers/net/e1000.h	/^#define E1000_FLASHT /;"	d
E1000_FLASH_UPDATES	drivers/net/e1000.h	/^#define E1000_FLASH_UPDATES /;"	d
E1000_FLEXIBLE_FILTER_COUNT_MAX	drivers/net/e1000.h	/^#define E1000_FLEXIBLE_FILTER_COUNT_MAX /;"	d
E1000_FLEXIBLE_FILTER_SIZE_MAX	drivers/net/e1000.h	/^#define E1000_FLEXIBLE_FILTER_SIZE_MAX	/;"	d
E1000_FLOP	drivers/net/e1000.h	/^#define E1000_FLOP /;"	d
E1000_FLSWCNT	drivers/net/e1000.h	/^#define E1000_FLSWCNT /;"	d
E1000_FLSWCTL	drivers/net/e1000.h	/^#define E1000_FLSWCTL /;"	d
E1000_FLSWDATA	drivers/net/e1000.h	/^#define E1000_FLSWDATA /;"	d
E1000_FWSM	drivers/net/e1000.h	/^#define E1000_FWSM /;"	d
E1000_FWSM_DISSW	drivers/net/e1000.h	/^#define E1000_FWSM_DISSW /;"	d
E1000_FWSM_FW_VALID	drivers/net/e1000.h	/^#define E1000_FWSM_FW_VALID /;"	d
E1000_FWSM_MODE_MASK	drivers/net/e1000.h	/^#define E1000_FWSM_MODE_MASK /;"	d
E1000_FWSM_MODE_SHIFT	drivers/net/e1000.h	/^#define E1000_FWSM_MODE_SHIFT /;"	d
E1000_FWSM_RSPCIPHY	drivers/net/e1000.h	/^#define E1000_FWSM_RSPCIPHY /;"	d
E1000_FWSM_SKUEL_SHIFT	drivers/net/e1000.h	/^#define E1000_FWSM_SKUEL_SHIFT /;"	d
E1000_FWSM_SKUSEL_CONS	drivers/net/e1000.h	/^#define E1000_FWSM_SKUSEL_CONS /;"	d
E1000_FWSM_SKUSEL_EMB	drivers/net/e1000.h	/^#define E1000_FWSM_SKUSEL_EMB /;"	d
E1000_FWSM_SKUSEL_MASK	drivers/net/e1000.h	/^#define E1000_FWSM_SKUSEL_MASK /;"	d
E1000_FWSM_SKUSEL_PERF_100	drivers/net/e1000.h	/^#define E1000_FWSM_SKUSEL_PERF_100 /;"	d
E1000_FWSM_SKUSEL_PERF_GBE	drivers/net/e1000.h	/^#define E1000_FWSM_SKUSEL_PERF_GBE /;"	d
E1000_GB_HDX_COLLISION_DISTANCE	drivers/net/e1000.h	/^#define E1000_GB_HDX_COLLISION_DISTANCE /;"	d
E1000_GCR	drivers/net/e1000.h	/^#define E1000_GCR /;"	d
E1000_GCR_L1_ACT_WITHOUT_L0S_RX	drivers/net/e1000.h	/^#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX /;"	d
E1000_GORCH	drivers/net/e1000.h	/^#define E1000_GORCH /;"	d
E1000_GORCL	drivers/net/e1000.h	/^#define E1000_GORCL /;"	d
E1000_GOTCH	drivers/net/e1000.h	/^#define E1000_GOTCH /;"	d
E1000_GOTCL	drivers/net/e1000.h	/^#define E1000_GOTCL /;"	d
E1000_GPRC	drivers/net/e1000.h	/^#define E1000_GPRC /;"	d
E1000_GPTC	drivers/net/e1000.h	/^#define E1000_GPTC /;"	d
E1000_GSCL_1	drivers/net/e1000.h	/^#define E1000_GSCL_1 /;"	d
E1000_GSCL_2	drivers/net/e1000.h	/^#define E1000_GSCL_2 /;"	d
E1000_GSCL_3	drivers/net/e1000.h	/^#define E1000_GSCL_3 /;"	d
E1000_GSCL_4	drivers/net/e1000.h	/^#define E1000_GSCL_4 /;"	d
E1000_HDX_COLLISION_DISTANCE	drivers/net/e1000.h	/^#define E1000_HDX_COLLISION_DISTANCE	/;"	d
E1000_HICR	drivers/net/e1000.h	/^#define E1000_HICR /;"	d
E1000_HICR_FW_RESET	drivers/net/e1000.h	/^#define E1000_HICR_FW_RESET /;"	d
E1000_I210_EECD	drivers/net/e1000.h	/^#define E1000_I210_EECD /;"	d
E1000_I210_EEMNGCTL	drivers/net/e1000.h	/^#define E1000_I210_EEMNGCTL /;"	d
E1000_I210_EERD	drivers/net/e1000.h	/^#define E1000_I210_EERD /;"	d
E1000_I210_EEWR	drivers/net/e1000.h	/^#define E1000_I210_EEWR /;"	d
E1000_I210_IAM	drivers/net/e1000.h	/^#define E1000_I210_IAM /;"	d
E1000_I210_PHY_CTRL	drivers/net/e1000.h	/^#define E1000_I210_PHY_CTRL /;"	d
E1000_ICH_NVM_SIG_MASK	drivers/net/e1000.h	/^#define E1000_ICH_NVM_SIG_MASK /;"	d
E1000_ICH_NVM_SIG_WORD	drivers/net/e1000.h	/^#define E1000_ICH_NVM_SIG_WORD /;"	d
E1000_ICR	drivers/net/e1000.h	/^#define E1000_ICR /;"	d
E1000_ICR_GPI_EN0	drivers/net/e1000.h	/^#define E1000_ICR_GPI_EN0 /;"	d
E1000_ICR_GPI_EN1	drivers/net/e1000.h	/^#define E1000_ICR_GPI_EN1 /;"	d
E1000_ICR_GPI_EN2	drivers/net/e1000.h	/^#define E1000_ICR_GPI_EN2 /;"	d
E1000_ICR_GPI_EN3	drivers/net/e1000.h	/^#define E1000_ICR_GPI_EN3 /;"	d
E1000_ICR_LSC	drivers/net/e1000.h	/^#define E1000_ICR_LSC	/;"	d
E1000_ICR_MDAC	drivers/net/e1000.h	/^#define E1000_ICR_MDAC	/;"	d
E1000_ICR_RXCFG	drivers/net/e1000.h	/^#define E1000_ICR_RXCFG /;"	d
E1000_ICR_RXDMT0	drivers/net/e1000.h	/^#define E1000_ICR_RXDMT0 /;"	d
E1000_ICR_RXO	drivers/net/e1000.h	/^#define E1000_ICR_RXO	/;"	d
E1000_ICR_RXSEQ	drivers/net/e1000.h	/^#define E1000_ICR_RXSEQ /;"	d
E1000_ICR_RXT0	drivers/net/e1000.h	/^#define E1000_ICR_RXT0	/;"	d
E1000_ICR_SRPD	drivers/net/e1000.h	/^#define E1000_ICR_SRPD	/;"	d
E1000_ICR_TXDW	drivers/net/e1000.h	/^#define E1000_ICR_TXDW	/;"	d
E1000_ICR_TXD_LOW	drivers/net/e1000.h	/^#define E1000_ICR_TXD_LOW /;"	d
E1000_ICR_TXQE	drivers/net/e1000.h	/^#define E1000_ICR_TXQE	/;"	d
E1000_ICS	drivers/net/e1000.h	/^#define E1000_ICS /;"	d
E1000_ICS_GPI_EN0	drivers/net/e1000.h	/^#define E1000_ICS_GPI_EN0 /;"	d
E1000_ICS_GPI_EN1	drivers/net/e1000.h	/^#define E1000_ICS_GPI_EN1 /;"	d
E1000_ICS_GPI_EN2	drivers/net/e1000.h	/^#define E1000_ICS_GPI_EN2 /;"	d
E1000_ICS_GPI_EN3	drivers/net/e1000.h	/^#define E1000_ICS_GPI_EN3 /;"	d
E1000_ICS_LSC	drivers/net/e1000.h	/^#define E1000_ICS_LSC	/;"	d
E1000_ICS_MDAC	drivers/net/e1000.h	/^#define E1000_ICS_MDAC	/;"	d
E1000_ICS_RXCFG	drivers/net/e1000.h	/^#define E1000_ICS_RXCFG /;"	d
E1000_ICS_RXDMT0	drivers/net/e1000.h	/^#define E1000_ICS_RXDMT0 /;"	d
E1000_ICS_RXO	drivers/net/e1000.h	/^#define E1000_ICS_RXO	/;"	d
E1000_ICS_RXSEQ	drivers/net/e1000.h	/^#define E1000_ICS_RXSEQ /;"	d
E1000_ICS_RXT0	drivers/net/e1000.h	/^#define E1000_ICS_RXT0	/;"	d
E1000_ICS_SRPD	drivers/net/e1000.h	/^#define E1000_ICS_SRPD	/;"	d
E1000_ICS_TXDW	drivers/net/e1000.h	/^#define E1000_ICS_TXDW	/;"	d
E1000_ICS_TXD_LOW	drivers/net/e1000.h	/^#define E1000_ICS_TXD_LOW /;"	d
E1000_ICS_TXQE	drivers/net/e1000.h	/^#define E1000_ICS_TXQE	/;"	d
E1000_IMC	drivers/net/e1000.h	/^#define E1000_IMC /;"	d
E1000_IMC_GPI_EN0	drivers/net/e1000.h	/^#define E1000_IMC_GPI_EN0 /;"	d
E1000_IMC_GPI_EN1	drivers/net/e1000.h	/^#define E1000_IMC_GPI_EN1 /;"	d
E1000_IMC_GPI_EN2	drivers/net/e1000.h	/^#define E1000_IMC_GPI_EN2 /;"	d
E1000_IMC_GPI_EN3	drivers/net/e1000.h	/^#define E1000_IMC_GPI_EN3 /;"	d
E1000_IMC_LSC	drivers/net/e1000.h	/^#define E1000_IMC_LSC	/;"	d
E1000_IMC_MDAC	drivers/net/e1000.h	/^#define E1000_IMC_MDAC	/;"	d
E1000_IMC_RXCFG	drivers/net/e1000.h	/^#define E1000_IMC_RXCFG /;"	d
E1000_IMC_RXDMT0	drivers/net/e1000.h	/^#define E1000_IMC_RXDMT0 /;"	d
E1000_IMC_RXO	drivers/net/e1000.h	/^#define E1000_IMC_RXO	/;"	d
E1000_IMC_RXSEQ	drivers/net/e1000.h	/^#define E1000_IMC_RXSEQ /;"	d
E1000_IMC_RXT0	drivers/net/e1000.h	/^#define E1000_IMC_RXT0	/;"	d
E1000_IMC_SRPD	drivers/net/e1000.h	/^#define E1000_IMC_SRPD	/;"	d
E1000_IMC_TXDW	drivers/net/e1000.h	/^#define E1000_IMC_TXDW	/;"	d
E1000_IMC_TXD_LOW	drivers/net/e1000.h	/^#define E1000_IMC_TXD_LOW /;"	d
E1000_IMC_TXQE	drivers/net/e1000.h	/^#define E1000_IMC_TXQE	/;"	d
E1000_IMS	drivers/net/e1000.h	/^#define E1000_IMS /;"	d
E1000_IMS_GPI_EN0	drivers/net/e1000.h	/^#define E1000_IMS_GPI_EN0 /;"	d
E1000_IMS_GPI_EN1	drivers/net/e1000.h	/^#define E1000_IMS_GPI_EN1 /;"	d
E1000_IMS_GPI_EN2	drivers/net/e1000.h	/^#define E1000_IMS_GPI_EN2 /;"	d
E1000_IMS_GPI_EN3	drivers/net/e1000.h	/^#define E1000_IMS_GPI_EN3 /;"	d
E1000_IMS_LSC	drivers/net/e1000.h	/^#define E1000_IMS_LSC	/;"	d
E1000_IMS_MDAC	drivers/net/e1000.h	/^#define E1000_IMS_MDAC	/;"	d
E1000_IMS_RXCFG	drivers/net/e1000.h	/^#define E1000_IMS_RXCFG /;"	d
E1000_IMS_RXDMT0	drivers/net/e1000.h	/^#define E1000_IMS_RXDMT0 /;"	d
E1000_IMS_RXO	drivers/net/e1000.h	/^#define E1000_IMS_RXO	/;"	d
E1000_IMS_RXSEQ	drivers/net/e1000.h	/^#define E1000_IMS_RXSEQ /;"	d
E1000_IMS_RXT0	drivers/net/e1000.h	/^#define E1000_IMS_RXT0	/;"	d
E1000_IMS_SRPD	drivers/net/e1000.h	/^#define E1000_IMS_SRPD	/;"	d
E1000_IMS_TXDW	drivers/net/e1000.h	/^#define E1000_IMS_TXDW	/;"	d
E1000_IMS_TXD_LOW	drivers/net/e1000.h	/^#define E1000_IMS_TXD_LOW /;"	d
E1000_IMS_TXQE	drivers/net/e1000.h	/^#define E1000_IMS_TXQE	/;"	d
E1000_IP4AT	drivers/net/e1000.h	/^#define E1000_IP4AT /;"	d
E1000_IP4AT_SIZE	drivers/net/e1000.h	/^#define E1000_IP4AT_SIZE	/;"	d
E1000_IP6AT	drivers/net/e1000.h	/^#define E1000_IP6AT /;"	d
E1000_IP6AT_SIZE	drivers/net/e1000.h	/^#define E1000_IP6AT_SIZE	/;"	d
E1000_IPAV	drivers/net/e1000.h	/^#define E1000_IPAV /;"	d
E1000_ITR	drivers/net/e1000.h	/^#define E1000_ITR /;"	d
E1000_KUMCTRLSTA	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA /;"	d
E1000_KUMCTRLSTA_DIAG_FELPBK	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_DIAG_FELPBK /;"	d
E1000_KUMCTRLSTA_DIAG_NELPBK	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_DIAG_NELPBK /;"	d
E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS /;"	d
E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS /;"	d
E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT /;"	d
E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT /;"	d
E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING /;"	d
E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT /;"	d
E1000_KUMCTRLSTA_K0S_100_EN	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_K0S_100_EN /;"	d
E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK /;"	d
E1000_KUMCTRLSTA_K0S_GBE_EN	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_K0S_GBE_EN /;"	d
E1000_KUMCTRLSTA_MASK	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_MASK /;"	d
E1000_KUMCTRLSTA_OFFSET	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET /;"	d
E1000_KUMCTRLSTA_OFFSET_CTRL	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_CTRL /;"	d
E1000_KUMCTRLSTA_OFFSET_DIAG	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_DIAG /;"	d
E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL /;"	d
E1000_KUMCTRLSTA_OFFSET_HD_CTRL	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_HD_CTRL /;"	d
E1000_KUMCTRLSTA_OFFSET_INB_CTRL	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_INB_CTRL /;"	d
E1000_KUMCTRLSTA_OFFSET_INB_PARAM	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_INB_PARAM /;"	d
E1000_KUMCTRLSTA_OFFSET_K0S_CTRL	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_K0S_CTRL /;"	d
E1000_KUMCTRLSTA_OFFSET_M2P_MODES	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_M2P_MODES /;"	d
E1000_KUMCTRLSTA_OFFSET_M2P_SERDES	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_M2P_SERDES /;"	d
E1000_KUMCTRLSTA_OFFSET_SHIFT	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_SHIFT /;"	d
E1000_KUMCTRLSTA_OFFSET_TIMEOUTS	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_OFFSET_TIMEOUTS /;"	d
E1000_KUMCTRLSTA_REN	drivers/net/e1000.h	/^#define E1000_KUMCTRLSTA_REN /;"	d
E1000_LATECOL	drivers/net/e1000.h	/^#define E1000_LATECOL /;"	d
E1000_LEDCTL	drivers/net/e1000.h	/^#define E1000_LEDCTL /;"	d
E1000_LEDCTL_LED0_BLINK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED0_BLINK /;"	d
E1000_LEDCTL_LED0_IVRT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED0_IVRT	/;"	d
E1000_LEDCTL_LED0_MODE_MASK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED0_MODE_MASK /;"	d
E1000_LEDCTL_LED0_MODE_SHIFT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED0_MODE_SHIFT /;"	d
E1000_LEDCTL_LED1_BLINK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED1_BLINK /;"	d
E1000_LEDCTL_LED1_IVRT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED1_IVRT	/;"	d
E1000_LEDCTL_LED1_MODE_MASK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED1_MODE_MASK /;"	d
E1000_LEDCTL_LED1_MODE_SHIFT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED1_MODE_SHIFT /;"	d
E1000_LEDCTL_LED2_BLINK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED2_BLINK /;"	d
E1000_LEDCTL_LED2_IVRT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED2_IVRT	/;"	d
E1000_LEDCTL_LED2_MODE_MASK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED2_MODE_MASK /;"	d
E1000_LEDCTL_LED2_MODE_SHIFT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED2_MODE_SHIFT /;"	d
E1000_LEDCTL_LED3_BLINK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED3_BLINK /;"	d
E1000_LEDCTL_LED3_IVRT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED3_IVRT	/;"	d
E1000_LEDCTL_LED3_MODE_MASK	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED3_MODE_MASK /;"	d
E1000_LEDCTL_LED3_MODE_SHIFT	drivers/net/e1000.h	/^#define E1000_LEDCTL_LED3_MODE_SHIFT /;"	d
E1000_LEDCTL_MODE_ACTIVITY	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_ACTIVITY	/;"	d
E1000_LEDCTL_MODE_BUS_SIZE	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_BUS_SIZE	/;"	d
E1000_LEDCTL_MODE_BUS_SPEED	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_BUS_SPEED	/;"	d
E1000_LEDCTL_MODE_COLLISION	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_COLLISION	/;"	d
E1000_LEDCTL_MODE_FULL_DUPLEX	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_FULL_DUPLEX	/;"	d
E1000_LEDCTL_MODE_LED_OFF	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LED_OFF	/;"	d
E1000_LEDCTL_MODE_LED_ON	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LED_ON	/;"	d
E1000_LEDCTL_MODE_LINK_10	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_10	/;"	d
E1000_LEDCTL_MODE_LINK_100	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_100	/;"	d
E1000_LEDCTL_MODE_LINK_1000	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_1000	/;"	d
E1000_LEDCTL_MODE_LINK_100_1000	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_100_1000 /;"	d
E1000_LEDCTL_MODE_LINK_10_1000	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_10_1000	/;"	d
E1000_LEDCTL_MODE_LINK_ACTIVITY	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_ACTIVITY /;"	d
E1000_LEDCTL_MODE_LINK_UP	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_LINK_UP	/;"	d
E1000_LEDCTL_MODE_PAUSED	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_PAUSED	/;"	d
E1000_LEDCTL_MODE_PCIX_MODE	drivers/net/e1000.h	/^#define E1000_LEDCTL_MODE_PCIX_MODE	/;"	d
E1000_MANC	drivers/net/e1000.h	/^#define E1000_MANC /;"	d
E1000_MANC_0298_EN	drivers/net/e1000.h	/^#define E1000_MANC_0298_EN	/;"	d
E1000_MANC_ARP_EN	drivers/net/e1000.h	/^#define E1000_MANC_ARP_EN	/;"	d
E1000_MANC_ASF_EN	drivers/net/e1000.h	/^#define E1000_MANC_ASF_EN	/;"	d
E1000_MANC_BLK_PHY_RST_ON_IDE	drivers/net/e1000.h	/^#define E1000_MANC_BLK_PHY_RST_ON_IDE /;"	d
E1000_MANC_IPV4_EN	drivers/net/e1000.h	/^#define E1000_MANC_IPV4_EN	/;"	d
E1000_MANC_IPV6_EN	drivers/net/e1000.h	/^#define E1000_MANC_IPV6_EN	/;"	d
E1000_MANC_NEIGHBOR_EN	drivers/net/e1000.h	/^#define E1000_MANC_NEIGHBOR_EN	/;"	d
E1000_MANC_RCV_TCO_EN	drivers/net/e1000.h	/^#define E1000_MANC_RCV_TCO_EN	/;"	d
E1000_MANC_REPORT_STATUS	drivers/net/e1000.h	/^#define E1000_MANC_REPORT_STATUS /;"	d
E1000_MANC_RMCP_EN	drivers/net/e1000.h	/^#define E1000_MANC_RMCP_EN	/;"	d
E1000_MANC_R_ON_FORCE	drivers/net/e1000.h	/^#define E1000_MANC_R_ON_FORCE	/;"	d
E1000_MANC_SMBUS_EN	drivers/net/e1000.h	/^#define E1000_MANC_SMBUS_EN	/;"	d
E1000_MANC_SMB_CLK_IN	drivers/net/e1000.h	/^#define E1000_MANC_SMB_CLK_IN	/;"	d
E1000_MANC_SMB_CLK_OUT	drivers/net/e1000.h	/^#define E1000_MANC_SMB_CLK_OUT	/;"	d
E1000_MANC_SMB_CLK_OUT_SHIFT	drivers/net/e1000.h	/^#define E1000_MANC_SMB_CLK_OUT_SHIFT /;"	d
E1000_MANC_SMB_DATA_IN	drivers/net/e1000.h	/^#define E1000_MANC_SMB_DATA_IN	/;"	d
E1000_MANC_SMB_DATA_OUT	drivers/net/e1000.h	/^#define E1000_MANC_SMB_DATA_OUT /;"	d
E1000_MANC_SMB_DATA_OUT_SHIFT	drivers/net/e1000.h	/^#define E1000_MANC_SMB_DATA_OUT_SHIFT /;"	d
E1000_MANC_SMB_GNT	drivers/net/e1000.h	/^#define E1000_MANC_SMB_GNT	/;"	d
E1000_MANC_SMB_REQ	drivers/net/e1000.h	/^#define E1000_MANC_SMB_REQ	/;"	d
E1000_MANC_SNAP_EN	drivers/net/e1000.h	/^#define E1000_MANC_SNAP_EN	/;"	d
E1000_MANC_TCO_RESET	drivers/net/e1000.h	/^#define E1000_MANC_TCO_RESET	/;"	d
E1000_MASTER_SLAVE	drivers/net/e1000.h	/^#define E1000_MASTER_SLAVE	/;"	d
E1000_MCC	drivers/net/e1000.h	/^#define E1000_MCC /;"	d
E1000_MC_TBL_SIZE	drivers/net/e1000.h	/^#define E1000_MC_TBL_SIZE	/;"	d
E1000_MC_TBL_SIZE_ICH8LAN	drivers/net/e1000.h	/^#define E1000_MC_TBL_SIZE_ICH8LAN /;"	d
E1000_MDALIGN	drivers/net/e1000.h	/^#define E1000_MDALIGN	/;"	d
E1000_MDIC	drivers/net/e1000.h	/^#define E1000_MDIC /;"	d
E1000_MDIC_DATA_MASK	drivers/net/e1000.h	/^#define E1000_MDIC_DATA_MASK /;"	d
E1000_MDIC_ERROR	drivers/net/e1000.h	/^#define E1000_MDIC_ERROR /;"	d
E1000_MDIC_INT_EN	drivers/net/e1000.h	/^#define E1000_MDIC_INT_EN /;"	d
E1000_MDIC_OP_READ	drivers/net/e1000.h	/^#define E1000_MDIC_OP_READ /;"	d
E1000_MDIC_OP_WRITE	drivers/net/e1000.h	/^#define E1000_MDIC_OP_WRITE /;"	d
E1000_MDIC_PHY_MASK	drivers/net/e1000.h	/^#define E1000_MDIC_PHY_MASK /;"	d
E1000_MDIC_PHY_SHIFT	drivers/net/e1000.h	/^#define E1000_MDIC_PHY_SHIFT /;"	d
E1000_MDIC_READY	drivers/net/e1000.h	/^#define E1000_MDIC_READY /;"	d
E1000_MDIC_REG_MASK	drivers/net/e1000.h	/^#define E1000_MDIC_REG_MASK /;"	d
E1000_MDIC_REG_SHIFT	drivers/net/e1000.h	/^#define E1000_MDIC_REG_SHIFT /;"	d
E1000_MGTPDC	drivers/net/e1000.h	/^#define E1000_MGTPDC /;"	d
E1000_MGTPRC	drivers/net/e1000.h	/^#define E1000_MGTPRC /;"	d
E1000_MGTPTC	drivers/net/e1000.h	/^#define E1000_MGTPTC /;"	d
E1000_MNG_IAMT_MODE	drivers/net/e1000.h	/^#define E1000_MNG_IAMT_MODE /;"	d
E1000_MNG_ICH_IAMT_MODE	drivers/net/e1000.h	/^#define E1000_MNG_ICH_IAMT_MODE /;"	d
E1000_MPC	drivers/net/e1000.h	/^#define E1000_MPC /;"	d
E1000_MPRC	drivers/net/e1000.h	/^#define E1000_MPRC /;"	d
E1000_MPTC	drivers/net/e1000.h	/^#define E1000_MPTC /;"	d
E1000_MTA	drivers/net/e1000.h	/^#define E1000_MTA /;"	d
E1000_NUM_MTA_REGISTERS	drivers/net/e1000.h	/^#define E1000_NUM_MTA_REGISTERS /;"	d
E1000_NUM_UNICAST	drivers/net/e1000.h	/^#define E1000_NUM_UNICAST	/;"	d
E1000_PBA	drivers/net/e1000.h	/^#define E1000_PBA /;"	d
E1000_PBA_16K	drivers/net/e1000.h	/^#define E1000_PBA_16K /;"	d
E1000_PBA_24K	drivers/net/e1000.h	/^#define E1000_PBA_24K /;"	d
E1000_PBA_38K	drivers/net/e1000.h	/^#define E1000_PBA_38K /;"	d
E1000_PBA_40K	drivers/net/e1000.h	/^#define E1000_PBA_40K /;"	d
E1000_PBA_48K	drivers/net/e1000.h	/^#define E1000_PBA_48K /;"	d
E1000_PBS	drivers/net/e1000.h	/^#define E1000_PBS /;"	d
E1000_PHY_ADDRESS	drivers/net/e1000.h	/^#define E1000_PHY_ADDRESS	/;"	d
E1000_PHY_CTRL	drivers/net/e1000.h	/^#define E1000_PHY_CTRL /;"	d
E1000_PHY_CTRL_B2B_EN	drivers/net/e1000.h	/^#define E1000_PHY_CTRL_B2B_EN /;"	d
E1000_PHY_CTRL_D0A_LPLU	drivers/net/e1000.h	/^#define E1000_PHY_CTRL_D0A_LPLU /;"	d
E1000_PHY_CTRL_GBE_DISABLE	drivers/net/e1000.h	/^#define E1000_PHY_CTRL_GBE_DISABLE /;"	d
E1000_PHY_CTRL_NOND0A_GBE_DISABLE	drivers/net/e1000.h	/^#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE /;"	d
E1000_PHY_CTRL_NOND0A_LPLU	drivers/net/e1000.h	/^#define E1000_PHY_CTRL_NOND0A_LPLU /;"	d
E1000_PHY_CTRL_SPD_EN	drivers/net/e1000.h	/^#define E1000_PHY_CTRL_SPD_EN /;"	d
E1000_PRC1023	drivers/net/e1000.h	/^#define E1000_PRC1023 /;"	d
E1000_PRC127	drivers/net/e1000.h	/^#define E1000_PRC127 /;"	d
E1000_PRC1522	drivers/net/e1000.h	/^#define E1000_PRC1522 /;"	d
E1000_PRC255	drivers/net/e1000.h	/^#define E1000_PRC255 /;"	d
E1000_PRC511	drivers/net/e1000.h	/^#define E1000_PRC511 /;"	d
E1000_PRC64	drivers/net/e1000.h	/^#define E1000_PRC64 /;"	d
E1000_PTC1023	drivers/net/e1000.h	/^#define E1000_PTC1023 /;"	d
E1000_PTC127	drivers/net/e1000.h	/^#define E1000_PTC127 /;"	d
E1000_PTC1522	drivers/net/e1000.h	/^#define E1000_PTC1522 /;"	d
E1000_PTC255	drivers/net/e1000.h	/^#define E1000_PTC255 /;"	d
E1000_PTC511	drivers/net/e1000.h	/^#define E1000_PTC511 /;"	d
E1000_PTC64	drivers/net/e1000.h	/^#define E1000_PTC64 /;"	d
E1000_RA	drivers/net/e1000.h	/^#define E1000_RA /;"	d
E1000_RADV	drivers/net/e1000.h	/^#define E1000_RADV /;"	d
E1000_RAH_AV	drivers/net/e1000.h	/^#define E1000_RAH_AV /;"	d
E1000_RAR_ENTRIES	drivers/net/e1000.h	/^#define E1000_RAR_ENTRIES /;"	d
E1000_RCTL	drivers/net/e1000.h	/^#define E1000_RCTL /;"	d
E1000_RCTL_BAM	drivers/net/e1000.h	/^#define E1000_RCTL_BAM	/;"	d
E1000_RCTL_BSEX	drivers/net/e1000.h	/^#define E1000_RCTL_BSEX	/;"	d
E1000_RCTL_CFI	drivers/net/e1000.h	/^#define E1000_RCTL_CFI	/;"	d
E1000_RCTL_CFIEN	drivers/net/e1000.h	/^#define E1000_RCTL_CFIEN	/;"	d
E1000_RCTL_DPF	drivers/net/e1000.h	/^#define E1000_RCTL_DPF	/;"	d
E1000_RCTL_EN	drivers/net/e1000.h	/^#define E1000_RCTL_EN	/;"	d
E1000_RCTL_LBM_MAC	drivers/net/e1000.h	/^#define E1000_RCTL_LBM_MAC	/;"	d
E1000_RCTL_LBM_NO	drivers/net/e1000.h	/^#define E1000_RCTL_LBM_NO	/;"	d
E1000_RCTL_LBM_SLP	drivers/net/e1000.h	/^#define E1000_RCTL_LBM_SLP	/;"	d
E1000_RCTL_LBM_TCVR	drivers/net/e1000.h	/^#define E1000_RCTL_LBM_TCVR	/;"	d
E1000_RCTL_LPE	drivers/net/e1000.h	/^#define E1000_RCTL_LPE	/;"	d
E1000_RCTL_MDR	drivers/net/e1000.h	/^#define E1000_RCTL_MDR	/;"	d
E1000_RCTL_MO_0	drivers/net/e1000.h	/^#define E1000_RCTL_MO_0	/;"	d
E1000_RCTL_MO_1	drivers/net/e1000.h	/^#define E1000_RCTL_MO_1	/;"	d
E1000_RCTL_MO_2	drivers/net/e1000.h	/^#define E1000_RCTL_MO_2	/;"	d
E1000_RCTL_MO_3	drivers/net/e1000.h	/^#define E1000_RCTL_MO_3	/;"	d
E1000_RCTL_MO_SHIFT	drivers/net/e1000.h	/^#define E1000_RCTL_MO_SHIFT	/;"	d
E1000_RCTL_MPE	drivers/net/e1000.h	/^#define E1000_RCTL_MPE	/;"	d
E1000_RCTL_PMCF	drivers/net/e1000.h	/^#define E1000_RCTL_PMCF	/;"	d
E1000_RCTL_RDMTS_EIGTH	drivers/net/e1000.h	/^#define E1000_RCTL_RDMTS_EIGTH	/;"	d
E1000_RCTL_RDMTS_HALF	drivers/net/e1000.h	/^#define E1000_RCTL_RDMTS_HALF	/;"	d
E1000_RCTL_RDMTS_QUAT	drivers/net/e1000.h	/^#define E1000_RCTL_RDMTS_QUAT	/;"	d
E1000_RCTL_RST	drivers/net/e1000.h	/^#define E1000_RCTL_RST	/;"	d
E1000_RCTL_SBP	drivers/net/e1000.h	/^#define E1000_RCTL_SBP	/;"	d
E1000_RCTL_SZ_1024	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_1024	/;"	d
E1000_RCTL_SZ_16384	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_16384	/;"	d
E1000_RCTL_SZ_2048	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_2048	/;"	d
E1000_RCTL_SZ_256	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_256	/;"	d
E1000_RCTL_SZ_4096	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_4096	/;"	d
E1000_RCTL_SZ_512	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_512	/;"	d
E1000_RCTL_SZ_8192	drivers/net/e1000.h	/^#define E1000_RCTL_SZ_8192	/;"	d
E1000_RCTL_UPE	drivers/net/e1000.h	/^#define E1000_RCTL_UPE	/;"	d
E1000_RCTL_VFE	drivers/net/e1000.h	/^#define E1000_RCTL_VFE	/;"	d
E1000_RDBAH	drivers/net/e1000.h	/^#define E1000_RDBAH /;"	d
E1000_RDBAL	drivers/net/e1000.h	/^#define E1000_RDBAL /;"	d
E1000_RDH	drivers/net/e1000.h	/^#define E1000_RDH /;"	d
E1000_RDH_RDH	drivers/net/e1000.h	/^#define E1000_RDH_RDH	/;"	d
E1000_RDLEN	drivers/net/e1000.h	/^#define E1000_RDLEN /;"	d
E1000_RDLEN_LEN	drivers/net/e1000.h	/^#define E1000_RDLEN_LEN /;"	d
E1000_RDT	drivers/net/e1000.h	/^#define E1000_RDT /;"	d
E1000_RDTR	drivers/net/e1000.h	/^#define E1000_RDTR /;"	d
E1000_RDT_DELAY	drivers/net/e1000.h	/^#define E1000_RDT_DELAY /;"	d
E1000_RDT_FPDB	drivers/net/e1000.h	/^#define E1000_RDT_FPDB	/;"	d
E1000_RDT_RDT	drivers/net/e1000.h	/^#define E1000_RDT_RDT	/;"	d
E1000_READ_REG	drivers/net/e1000.h	/^#define E1000_READ_REG(/;"	d
E1000_READ_REG_ARRAY	drivers/net/e1000.h	/^#define E1000_READ_REG_ARRAY(/;"	d
E1000_REVISION_0	drivers/net/e1000.h	/^#define E1000_REVISION_0 /;"	d
E1000_REVISION_1	drivers/net/e1000.h	/^#define E1000_REVISION_1 /;"	d
E1000_REVISION_2	drivers/net/e1000.h	/^#define E1000_REVISION_2 /;"	d
E1000_REVISION_3	drivers/net/e1000.h	/^#define E1000_REVISION_3 /;"	d
E1000_RFC	drivers/net/e1000.h	/^#define E1000_RFC /;"	d
E1000_RJC	drivers/net/e1000.h	/^#define E1000_RJC /;"	d
E1000_RLEC	drivers/net/e1000.h	/^#define E1000_RLEC /;"	d
E1000_RNBC	drivers/net/e1000.h	/^#define E1000_RNBC /;"	d
E1000_ROC	drivers/net/e1000.h	/^#define E1000_ROC /;"	d
E1000_RSRPD	drivers/net/e1000.h	/^#define E1000_RSRPD /;"	d
E1000_RUC	drivers/net/e1000.h	/^#define E1000_RUC /;"	d
E1000_RXCSUM	drivers/net/e1000.h	/^#define E1000_RXCSUM /;"	d
E1000_RXCSUM_IPOFL	drivers/net/e1000.h	/^#define E1000_RXCSUM_IPOFL /;"	d
E1000_RXCSUM_IPV6OFL	drivers/net/e1000.h	/^#define E1000_RXCSUM_IPV6OFL /;"	d
E1000_RXCSUM_PCSS_MASK	drivers/net/e1000.h	/^#define E1000_RXCSUM_PCSS_MASK /;"	d
E1000_RXCSUM_TUOFL	drivers/net/e1000.h	/^#define E1000_RXCSUM_TUOFL /;"	d
E1000_RXCW	drivers/net/e1000.h	/^#define E1000_RXCW /;"	d
E1000_RXCW_ANC	drivers/net/e1000.h	/^#define E1000_RXCW_ANC	/;"	d
E1000_RXCW_C	drivers/net/e1000.h	/^#define E1000_RXCW_C	/;"	d
E1000_RXCW_CC	drivers/net/e1000.h	/^#define E1000_RXCW_CC	/;"	d
E1000_RXCW_CW	drivers/net/e1000.h	/^#define E1000_RXCW_CW	/;"	d
E1000_RXCW_IV	drivers/net/e1000.h	/^#define E1000_RXCW_IV	/;"	d
E1000_RXCW_NC	drivers/net/e1000.h	/^#define E1000_RXCW_NC	/;"	d
E1000_RXCW_SYNCH	drivers/net/e1000.h	/^#define E1000_RXCW_SYNCH /;"	d
E1000_RXDCTL	drivers/net/e1000.h	/^#define E1000_RXDCTL /;"	d
E1000_RXDCTL_FULL_RX_DESC_WB	drivers/net/e1000.h	/^#define E1000_RXDCTL_FULL_RX_DESC_WB /;"	d
E1000_RXDCTL_GRAN	drivers/net/e1000.h	/^#define E1000_RXDCTL_GRAN /;"	d
E1000_RXDCTL_HTHRESH	drivers/net/e1000.h	/^#define E1000_RXDCTL_HTHRESH /;"	d
E1000_RXDCTL_PTHRESH	drivers/net/e1000.h	/^#define E1000_RXDCTL_PTHRESH /;"	d
E1000_RXDCTL_WTHRESH	drivers/net/e1000.h	/^#define E1000_RXDCTL_WTHRESH /;"	d
E1000_RXD_ERR_CE	drivers/net/e1000.h	/^#define E1000_RXD_ERR_CE	/;"	d
E1000_RXD_ERR_CXE	drivers/net/e1000.h	/^#define E1000_RXD_ERR_CXE	/;"	d
E1000_RXD_ERR_FRAME_ERR_MASK	drivers/net/e1000.h	/^#define E1000_RXD_ERR_FRAME_ERR_MASK /;"	d
E1000_RXD_ERR_IPE	drivers/net/e1000.h	/^#define E1000_RXD_ERR_IPE	/;"	d
E1000_RXD_ERR_RXE	drivers/net/e1000.h	/^#define E1000_RXD_ERR_RXE	/;"	d
E1000_RXD_ERR_SE	drivers/net/e1000.h	/^#define E1000_RXD_ERR_SE	/;"	d
E1000_RXD_ERR_SEQ	drivers/net/e1000.h	/^#define E1000_RXD_ERR_SEQ	/;"	d
E1000_RXD_ERR_TCPE	drivers/net/e1000.h	/^#define E1000_RXD_ERR_TCPE	/;"	d
E1000_RXD_SPC_CFI_MASK	drivers/net/e1000.h	/^#define E1000_RXD_SPC_CFI_MASK	/;"	d
E1000_RXD_SPC_CFI_SHIFT	drivers/net/e1000.h	/^#define E1000_RXD_SPC_CFI_SHIFT /;"	d
E1000_RXD_SPC_PRI_MASK	drivers/net/e1000.h	/^#define E1000_RXD_SPC_PRI_MASK	/;"	d
E1000_RXD_SPC_PRI_SHIFT	drivers/net/e1000.h	/^#define E1000_RXD_SPC_PRI_SHIFT /;"	d
E1000_RXD_SPC_VLAN_MASK	drivers/net/e1000.h	/^#define E1000_RXD_SPC_VLAN_MASK /;"	d
E1000_RXD_STAT_DD	drivers/net/e1000.h	/^#define E1000_RXD_STAT_DD	/;"	d
E1000_RXD_STAT_EOP	drivers/net/e1000.h	/^#define E1000_RXD_STAT_EOP	/;"	d
E1000_RXD_STAT_IPCS	drivers/net/e1000.h	/^#define E1000_RXD_STAT_IPCS	/;"	d
E1000_RXD_STAT_IXSM	drivers/net/e1000.h	/^#define E1000_RXD_STAT_IXSM	/;"	d
E1000_RXD_STAT_PIF	drivers/net/e1000.h	/^#define E1000_RXD_STAT_PIF	/;"	d
E1000_RXD_STAT_TCPCS	drivers/net/e1000.h	/^#define E1000_RXD_STAT_TCPCS	/;"	d
E1000_RXD_STAT_VP	drivers/net/e1000.h	/^#define E1000_RXD_STAT_VP	/;"	d
E1000_RXERRC	drivers/net/e1000.h	/^#define E1000_RXERRC /;"	d
E1000_SCC	drivers/net/e1000.h	/^#define E1000_SCC /;"	d
E1000_SEC	drivers/net/e1000.h	/^#define E1000_SEC /;"	d
E1000_SHADOW_RAM_WORDS	drivers/net/e1000.h	/^#define E1000_SHADOW_RAM_WORDS /;"	d
E1000_SPI	drivers/net/Kconfig	/^config E1000_SPI$/;"	c
E1000_SPI_GENERIC	drivers/net/Kconfig	/^config E1000_SPI_GENERIC$/;"	c
E1000_STATUS	drivers/net/e1000.h	/^#define E1000_STATUS /;"	d
E1000_STATUS_ASDV	drivers/net/e1000.h	/^#define E1000_STATUS_ASDV	/;"	d
E1000_STATUS_BUS64	drivers/net/e1000.h	/^#define E1000_STATUS_BUS64	/;"	d
E1000_STATUS_FD	drivers/net/e1000.h	/^#define E1000_STATUS_FD	/;"	d
E1000_STATUS_FUNC_0	drivers/net/e1000.h	/^#define E1000_STATUS_FUNC_0	/;"	d
E1000_STATUS_FUNC_1	drivers/net/e1000.h	/^#define E1000_STATUS_FUNC_1	/;"	d
E1000_STATUS_FUNC_MASK	drivers/net/e1000.h	/^#define E1000_STATUS_FUNC_MASK	/;"	d
E1000_STATUS_LU	drivers/net/e1000.h	/^#define E1000_STATUS_LU	/;"	d
E1000_STATUS_MTXCKOK	drivers/net/e1000.h	/^#define E1000_STATUS_MTXCKOK	/;"	d
E1000_STATUS_PCI66	drivers/net/e1000.h	/^#define E1000_STATUS_PCI66	/;"	d
E1000_STATUS_PCIX_MODE	drivers/net/e1000.h	/^#define E1000_STATUS_PCIX_MODE	/;"	d
E1000_STATUS_PCIX_SPEED	drivers/net/e1000.h	/^#define E1000_STATUS_PCIX_SPEED /;"	d
E1000_STATUS_PCIX_SPEED_100	drivers/net/e1000.h	/^#define E1000_STATUS_PCIX_SPEED_100 /;"	d
E1000_STATUS_PCIX_SPEED_133	drivers/net/e1000.h	/^#define E1000_STATUS_PCIX_SPEED_133 /;"	d
E1000_STATUS_PCIX_SPEED_66	drivers/net/e1000.h	/^#define E1000_STATUS_PCIX_SPEED_66 /;"	d
E1000_STATUS_PF_RST_DONE	drivers/net/e1000.h	/^#define E1000_STATUS_PF_RST_DONE /;"	d
E1000_STATUS_SPEED_10	drivers/net/e1000.h	/^#define E1000_STATUS_SPEED_10	/;"	d
E1000_STATUS_SPEED_100	drivers/net/e1000.h	/^#define E1000_STATUS_SPEED_100	/;"	d
E1000_STATUS_SPEED_1000	drivers/net/e1000.h	/^#define E1000_STATUS_SPEED_1000 /;"	d
E1000_STATUS_SPEED_MASK	drivers/net/e1000.h	/^#define E1000_STATUS_SPEED_MASK /;"	d
E1000_STATUS_TBIMODE	drivers/net/e1000.h	/^#define E1000_STATUS_TBIMODE	/;"	d
E1000_STATUS_TXOFF	drivers/net/e1000.h	/^#define E1000_STATUS_TXOFF	/;"	d
E1000_STM_OPCODE	drivers/net/e1000.h	/^#define E1000_STM_OPCODE /;"	d
E1000_SUCCESS	drivers/net/e1000.h	/^#define E1000_SUCCESS	/;"	d
E1000_SWFW_EEP_SM	drivers/net/e1000.h	/^#define E1000_SWFW_EEP_SM /;"	d
E1000_SWFW_MAC_CSR_SM	drivers/net/e1000.h	/^#define E1000_SWFW_MAC_CSR_SM /;"	d
E1000_SWFW_PHY0_SM	drivers/net/e1000.h	/^#define E1000_SWFW_PHY0_SM /;"	d
E1000_SWFW_PHY1_SM	drivers/net/e1000.h	/^#define E1000_SWFW_PHY1_SM /;"	d
E1000_SWSM	drivers/net/e1000.h	/^#define E1000_SWSM /;"	d
E1000_SWSM_DRV_LOAD	drivers/net/e1000.h	/^#define E1000_SWSM_DRV_LOAD	/;"	d
E1000_SWSM_SMBI	drivers/net/e1000.h	/^#define E1000_SWSM_SMBI	/;"	d
E1000_SWSM_SWESMBI	drivers/net/e1000.h	/^#define E1000_SWSM_SWESMBI	/;"	d
E1000_SWSM_WMNG	drivers/net/e1000.h	/^#define E1000_SWSM_WMNG	/;"	d
E1000_SW_FW_SYNC	drivers/net/e1000.h	/^#define E1000_SW_FW_SYNC /;"	d
E1000_SYMERRS	drivers/net/e1000.h	/^#define E1000_SYMERRS /;"	d
E1000_TADV	drivers/net/e1000.h	/^#define E1000_TADV /;"	d
E1000_TARC0	drivers/net/e1000.h	/^#define E1000_TARC0 /;"	d
E1000_TARC1	drivers/net/e1000.h	/^#define E1000_TARC1 /;"	d
E1000_TBT	drivers/net/e1000.h	/^#define E1000_TBT /;"	d
E1000_TCTL	drivers/net/e1000.h	/^#define E1000_TCTL /;"	d
E1000_TCTL_BCE	drivers/net/e1000.h	/^#define E1000_TCTL_BCE	/;"	d
E1000_TCTL_COLD	drivers/net/e1000.h	/^#define E1000_TCTL_COLD /;"	d
E1000_TCTL_CT	drivers/net/e1000.h	/^#define E1000_TCTL_CT	/;"	d
E1000_TCTL_EN	drivers/net/e1000.h	/^#define E1000_TCTL_EN	/;"	d
E1000_TCTL_EXT	drivers/net/e1000.h	/^#define E1000_TCTL_EXT /;"	d
E1000_TCTL_EXT_BST_MASK	drivers/net/e1000.h	/^#define E1000_TCTL_EXT_BST_MASK /;"	d
E1000_TCTL_EXT_GCEX_MASK	drivers/net/e1000.h	/^#define E1000_TCTL_EXT_GCEX_MASK /;"	d
E1000_TCTL_MULR	drivers/net/e1000.h	/^#define E1000_TCTL_MULR /;"	d
E1000_TCTL_NRTU	drivers/net/e1000.h	/^#define E1000_TCTL_NRTU /;"	d
E1000_TCTL_PBE	drivers/net/e1000.h	/^#define E1000_TCTL_PBE	/;"	d
E1000_TCTL_PSP	drivers/net/e1000.h	/^#define E1000_TCTL_PSP	/;"	d
E1000_TCTL_RST	drivers/net/e1000.h	/^#define E1000_TCTL_RST	/;"	d
E1000_TCTL_RTLC	drivers/net/e1000.h	/^#define E1000_TCTL_RTLC /;"	d
E1000_TCTL_SWXOFF	drivers/net/e1000.h	/^#define E1000_TCTL_SWXOFF /;"	d
E1000_TDBAH	drivers/net/e1000.h	/^#define E1000_TDBAH /;"	d
E1000_TDBAH1	drivers/net/e1000.h	/^#define E1000_TDBAH1 /;"	d
E1000_TDBAL	drivers/net/e1000.h	/^#define E1000_TDBAL /;"	d
E1000_TDBAL1	drivers/net/e1000.h	/^#define E1000_TDBAL1 /;"	d
E1000_TDFH	drivers/net/e1000.h	/^#define E1000_TDFH /;"	d
E1000_TDFHS	drivers/net/e1000.h	/^#define E1000_TDFHS /;"	d
E1000_TDFPC	drivers/net/e1000.h	/^#define E1000_TDFPC /;"	d
E1000_TDFT	drivers/net/e1000.h	/^#define E1000_TDFT /;"	d
E1000_TDFTS	drivers/net/e1000.h	/^#define E1000_TDFTS /;"	d
E1000_TDH	drivers/net/e1000.h	/^#define E1000_TDH /;"	d
E1000_TDH1	drivers/net/e1000.h	/^#define E1000_TDH1 /;"	d
E1000_TDLEN	drivers/net/e1000.h	/^#define E1000_TDLEN /;"	d
E1000_TDLEN1	drivers/net/e1000.h	/^#define E1000_TDLEN1 /;"	d
E1000_TDT	drivers/net/e1000.h	/^#define E1000_TDT /;"	d
E1000_TDT1	drivers/net/e1000.h	/^#define E1000_TDT1 /;"	d
E1000_TIDV	drivers/net/e1000.h	/^#define E1000_TIDV /;"	d
E1000_TIPG	drivers/net/e1000.h	/^#define E1000_TIPG /;"	d
E1000_TIPG_IPGR1_MASK	drivers/net/e1000.h	/^#define E1000_TIPG_IPGR1_MASK /;"	d
E1000_TIPG_IPGR1_SHIFT	drivers/net/e1000.h	/^#define E1000_TIPG_IPGR1_SHIFT	/;"	d
E1000_TIPG_IPGR2_MASK	drivers/net/e1000.h	/^#define E1000_TIPG_IPGR2_MASK /;"	d
E1000_TIPG_IPGR2_SHIFT	drivers/net/e1000.h	/^#define E1000_TIPG_IPGR2_SHIFT	/;"	d
E1000_TIPG_IPGT_MASK	drivers/net/e1000.h	/^#define E1000_TIPG_IPGT_MASK /;"	d
E1000_TNCRS	drivers/net/e1000.h	/^#define E1000_TNCRS /;"	d
E1000_TORH	drivers/net/e1000.h	/^#define E1000_TORH /;"	d
E1000_TORL	drivers/net/e1000.h	/^#define E1000_TORL /;"	d
E1000_TOTH	drivers/net/e1000.h	/^#define E1000_TOTH /;"	d
E1000_TOTL	drivers/net/e1000.h	/^#define E1000_TOTL /;"	d
E1000_TPR	drivers/net/e1000.h	/^#define E1000_TPR /;"	d
E1000_TPT	drivers/net/e1000.h	/^#define E1000_TPT /;"	d
E1000_TSCTC	drivers/net/e1000.h	/^#define E1000_TSCTC /;"	d
E1000_TSCTFC	drivers/net/e1000.h	/^#define E1000_TSCTFC /;"	d
E1000_TSPMT	drivers/net/e1000.h	/^#define E1000_TSPMT /;"	d
E1000_TXCW	drivers/net/e1000.h	/^#define E1000_TXCW /;"	d
E1000_TXCW_ANE	drivers/net/e1000.h	/^#define E1000_TXCW_ANE	/;"	d
E1000_TXCW_ASM_DIR	drivers/net/e1000.h	/^#define E1000_TXCW_ASM_DIR /;"	d
E1000_TXCW_CW	drivers/net/e1000.h	/^#define E1000_TXCW_CW	/;"	d
E1000_TXCW_FD	drivers/net/e1000.h	/^#define E1000_TXCW_FD	/;"	d
E1000_TXCW_HD	drivers/net/e1000.h	/^#define E1000_TXCW_HD	/;"	d
E1000_TXCW_NP	drivers/net/e1000.h	/^#define E1000_TXCW_NP	/;"	d
E1000_TXCW_PAUSE	drivers/net/e1000.h	/^#define E1000_TXCW_PAUSE /;"	d
E1000_TXCW_PAUSE_MASK	drivers/net/e1000.h	/^#define E1000_TXCW_PAUSE_MASK /;"	d
E1000_TXCW_RF	drivers/net/e1000.h	/^#define E1000_TXCW_RF	/;"	d
E1000_TXCW_TXC	drivers/net/e1000.h	/^#define E1000_TXCW_TXC	/;"	d
E1000_TXDCTL	drivers/net/e1000.h	/^#define E1000_TXDCTL /;"	d
E1000_TXDCTL1	drivers/net/e1000.h	/^#define E1000_TXDCTL1 /;"	d
E1000_TXDCTL_COUNT_DESC	drivers/net/e1000.h	/^#define E1000_TXDCTL_COUNT_DESC /;"	d
E1000_TXDCTL_FULL_TX_DESC_WB	drivers/net/e1000.h	/^#define E1000_TXDCTL_FULL_TX_DESC_WB /;"	d
E1000_TXDCTL_GRAN	drivers/net/e1000.h	/^#define E1000_TXDCTL_GRAN /;"	d
E1000_TXDCTL_HTHRESH	drivers/net/e1000.h	/^#define E1000_TXDCTL_HTHRESH /;"	d
E1000_TXDCTL_LWTHRESH	drivers/net/e1000.h	/^#define E1000_TXDCTL_LWTHRESH /;"	d
E1000_TXDCTL_PTHRESH	drivers/net/e1000.h	/^#define E1000_TXDCTL_PTHRESH /;"	d
E1000_TXDCTL_WTHRESH	drivers/net/e1000.h	/^#define E1000_TXDCTL_WTHRESH /;"	d
E1000_TXDMAC	drivers/net/e1000.h	/^#define E1000_TXDMAC /;"	d
E1000_TXDMAC_DPP	drivers/net/e1000.h	/^#define E1000_TXDMAC_DPP /;"	d
E1000_TXD_CMD_DEXT	drivers/net/e1000.h	/^#define E1000_TXD_CMD_DEXT /;"	d
E1000_TXD_CMD_EOP	drivers/net/e1000.h	/^#define E1000_TXD_CMD_EOP /;"	d
E1000_TXD_CMD_IC	drivers/net/e1000.h	/^#define E1000_TXD_CMD_IC /;"	d
E1000_TXD_CMD_IDE	drivers/net/e1000.h	/^#define E1000_TXD_CMD_IDE /;"	d
E1000_TXD_CMD_IFCS	drivers/net/e1000.h	/^#define E1000_TXD_CMD_IFCS /;"	d
E1000_TXD_CMD_IP	drivers/net/e1000.h	/^#define E1000_TXD_CMD_IP /;"	d
E1000_TXD_CMD_RPS	drivers/net/e1000.h	/^#define E1000_TXD_CMD_RPS /;"	d
E1000_TXD_CMD_RS	drivers/net/e1000.h	/^#define E1000_TXD_CMD_RS /;"	d
E1000_TXD_CMD_TCP	drivers/net/e1000.h	/^#define E1000_TXD_CMD_TCP /;"	d
E1000_TXD_CMD_TSE	drivers/net/e1000.h	/^#define E1000_TXD_CMD_TSE /;"	d
E1000_TXD_CMD_VLE	drivers/net/e1000.h	/^#define E1000_TXD_CMD_VLE /;"	d
E1000_TXD_DTYP_C	drivers/net/e1000.h	/^#define E1000_TXD_DTYP_C /;"	d
E1000_TXD_DTYP_D	drivers/net/e1000.h	/^#define E1000_TXD_DTYP_D /;"	d
E1000_TXD_POPTS_IXSM	drivers/net/e1000.h	/^#define E1000_TXD_POPTS_IXSM /;"	d
E1000_TXD_POPTS_TXSM	drivers/net/e1000.h	/^#define E1000_TXD_POPTS_TXSM /;"	d
E1000_TXD_STAT_DD	drivers/net/e1000.h	/^#define E1000_TXD_STAT_DD /;"	d
E1000_TXD_STAT_EC	drivers/net/e1000.h	/^#define E1000_TXD_STAT_EC /;"	d
E1000_TXD_STAT_LC	drivers/net/e1000.h	/^#define E1000_TXD_STAT_LC /;"	d
E1000_TXD_STAT_TC	drivers/net/e1000.h	/^#define E1000_TXD_STAT_TC /;"	d
E1000_TXD_STAT_TU	drivers/net/e1000.h	/^#define E1000_TXD_STAT_TU /;"	d
E1000_TX_BUFFER_SIZE	drivers/net/e1000.h	/^#define E1000_TX_BUFFER_SIZE /;"	d
E1000_VET	drivers/net/e1000.h	/^#define E1000_VET /;"	d
E1000_VFTA	drivers/net/e1000.h	/^#define E1000_VFTA /;"	d
E1000_VLAN_FILTER_TBL_SIZE	drivers/net/e1000.h	/^#define E1000_VLAN_FILTER_TBL_SIZE /;"	d
E1000_WAKEUP_IP_ADDRESS_COUNT_MAX	drivers/net/e1000.h	/^#define E1000_WAKEUP_IP_ADDRESS_COUNT_MAX /;"	d
E1000_WRITE_FLUSH	drivers/net/e1000.h	/^#define E1000_WRITE_FLUSH(/;"	d
E1000_WRITE_REG	drivers/net/e1000.h	/^#define E1000_WRITE_REG(/;"	d
E1000_WRITE_REG_ARRAY	drivers/net/e1000.h	/^#define E1000_WRITE_REG_ARRAY(/;"	d
E1000_WUC	drivers/net/e1000.h	/^#define E1000_WUC /;"	d
E1000_WUC_APME	drivers/net/e1000.h	/^#define E1000_WUC_APME	/;"	d
E1000_WUC_APMPME	drivers/net/e1000.h	/^#define E1000_WUC_APMPME /;"	d
E1000_WUC_PME_EN	drivers/net/e1000.h	/^#define E1000_WUC_PME_EN /;"	d
E1000_WUC_PME_STATUS	drivers/net/e1000.h	/^#define E1000_WUC_PME_STATUS /;"	d
E1000_WUFC	drivers/net/e1000.h	/^#define E1000_WUFC /;"	d
E1000_WUFC_ALL_FILTERS	drivers/net/e1000.h	/^#define E1000_WUFC_ALL_FILTERS /;"	d
E1000_WUFC_ARP	drivers/net/e1000.h	/^#define E1000_WUFC_ARP	/;"	d
E1000_WUFC_BC	drivers/net/e1000.h	/^#define E1000_WUFC_BC	/;"	d
E1000_WUFC_EX	drivers/net/e1000.h	/^#define E1000_WUFC_EX	/;"	d
E1000_WUFC_FLX0	drivers/net/e1000.h	/^#define E1000_WUFC_FLX0 /;"	d
E1000_WUFC_FLX1	drivers/net/e1000.h	/^#define E1000_WUFC_FLX1 /;"	d
E1000_WUFC_FLX2	drivers/net/e1000.h	/^#define E1000_WUFC_FLX2 /;"	d
E1000_WUFC_FLX3	drivers/net/e1000.h	/^#define E1000_WUFC_FLX3 /;"	d
E1000_WUFC_FLX_FILTERS	drivers/net/e1000.h	/^#define E1000_WUFC_FLX_FILTERS /;"	d
E1000_WUFC_FLX_OFFSET	drivers/net/e1000.h	/^#define E1000_WUFC_FLX_OFFSET /;"	d
E1000_WUFC_IPV4	drivers/net/e1000.h	/^#define E1000_WUFC_IPV4 /;"	d
E1000_WUFC_IPV6	drivers/net/e1000.h	/^#define E1000_WUFC_IPV6 /;"	d
E1000_WUFC_LNKC	drivers/net/e1000.h	/^#define E1000_WUFC_LNKC /;"	d
E1000_WUFC_MAG	drivers/net/e1000.h	/^#define E1000_WUFC_MAG	/;"	d
E1000_WUFC_MC	drivers/net/e1000.h	/^#define E1000_WUFC_MC	/;"	d
E1000_WUPL	drivers/net/e1000.h	/^#define E1000_WUPL /;"	d
E1000_WUPL_LENGTH_MASK	drivers/net/e1000.h	/^#define E1000_WUPL_LENGTH_MASK /;"	d
E1000_WUPM	drivers/net/e1000.h	/^#define E1000_WUPM /;"	d
E1000_WUS	drivers/net/e1000.h	/^#define E1000_WUS /;"	d
E1000_WUS_ARP	drivers/net/e1000.h	/^#define E1000_WUS_ARP /;"	d
E1000_WUS_BC	drivers/net/e1000.h	/^#define E1000_WUS_BC /;"	d
E1000_WUS_EX	drivers/net/e1000.h	/^#define E1000_WUS_EX /;"	d
E1000_WUS_FLX0	drivers/net/e1000.h	/^#define E1000_WUS_FLX0 /;"	d
E1000_WUS_FLX1	drivers/net/e1000.h	/^#define E1000_WUS_FLX1 /;"	d
E1000_WUS_FLX2	drivers/net/e1000.h	/^#define E1000_WUS_FLX2 /;"	d
E1000_WUS_FLX3	drivers/net/e1000.h	/^#define E1000_WUS_FLX3 /;"	d
E1000_WUS_FLX_FILTERS	drivers/net/e1000.h	/^#define E1000_WUS_FLX_FILTERS /;"	d
E1000_WUS_IPV4	drivers/net/e1000.h	/^#define E1000_WUS_IPV4 /;"	d
E1000_WUS_IPV6	drivers/net/e1000.h	/^#define E1000_WUS_IPV6 /;"	d
E1000_WUS_LNKC	drivers/net/e1000.h	/^#define E1000_WUS_LNKC /;"	d
E1000_WUS_MAG	drivers/net/e1000.h	/^#define E1000_WUS_MAG /;"	d
E1000_WUS_MC	drivers/net/e1000.h	/^#define E1000_WUS_MC /;"	d
E1000_XOFFRXC	drivers/net/e1000.h	/^#define E1000_XOFFRXC /;"	d
E1000_XOFFTXC	drivers/net/e1000.h	/^#define E1000_XOFFTXC /;"	d
E1000_XONRXC	drivers/net/e1000.h	/^#define E1000_XONRXC /;"	d
E1000_XONTXC	drivers/net/e1000.h	/^#define E1000_XONTXC /;"	d
E1_MASK	arch/arc/lib/interrupts.c	/^#define E1_MASK	/;"	d	file:
E2BIG	include/linux/errno.h	/^#define	E2BIG	/;"	d
E2P_CMD	board/micronas/vct/smc_eeprom.c	/^#define E2P_CMD	/;"	d	file:
E2P_CMD	drivers/net/smc911x.h	/^#define E2P_CMD	/;"	d
E2P_CMD	drivers/usb/eth/smsc95xx.c	/^#define E2P_CMD	/;"	d	file:
E2P_CMD_ADDR_	drivers/usb/eth/smsc95xx.c	/^#define E2P_CMD_ADDR_	/;"	d	file:
E2P_CMD_BUSY_	drivers/usb/eth/smsc95xx.c	/^#define E2P_CMD_BUSY_	/;"	d	file:
E2P_CMD_EPC_ADDR	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_ADDR	/;"	d
E2P_CMD_EPC_ADDR_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_ADDR_	/;"	d	file:
E2P_CMD_EPC_BUSY	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_BUSY	/;"	d
E2P_CMD_EPC_BUSY_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_BUSY_	/;"	d	file:
E2P_CMD_EPC_CMD	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD	/;"	d
E2P_CMD_EPC_CMD_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_	/;"	d	file:
E2P_CMD_EPC_CMD_ERAL	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_ERAL	/;"	d
E2P_CMD_EPC_CMD_ERAL_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_ERAL_	/;"	d	file:
E2P_CMD_EPC_CMD_ERASE	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_ERASE	/;"	d
E2P_CMD_EPC_CMD_ERASE_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_ERASE_	/;"	d	file:
E2P_CMD_EPC_CMD_EWDS	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_EWDS	/;"	d
E2P_CMD_EPC_CMD_EWDS_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_EWDS_	/;"	d	file:
E2P_CMD_EPC_CMD_EWEN	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_EWEN	/;"	d
E2P_CMD_EPC_CMD_EWEN_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_EWEN_	/;"	d	file:
E2P_CMD_EPC_CMD_READ	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_READ	/;"	d
E2P_CMD_EPC_CMD_READ_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_READ_	/;"	d	file:
E2P_CMD_EPC_CMD_RELOAD	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_RELOAD	/;"	d
E2P_CMD_EPC_CMD_RELOAD_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_RELOAD_ /;"	d	file:
E2P_CMD_EPC_CMD_WRAL	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_WRAL	/;"	d
E2P_CMD_EPC_CMD_WRAL_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_WRAL_	/;"	d	file:
E2P_CMD_EPC_CMD_WRITE	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_CMD_WRITE	/;"	d
E2P_CMD_EPC_CMD_WRITE_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_CMD_WRITE_	/;"	d	file:
E2P_CMD_EPC_TIMEOUT	drivers/net/smc911x.h	/^#define		E2P_CMD_EPC_TIMEOUT	/;"	d
E2P_CMD_EPC_TIMEOUT_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_EPC_TIMEOUT_	/;"	d	file:
E2P_CMD_LOADED_	drivers/usb/eth/smsc95xx.c	/^#define E2P_CMD_LOADED_	/;"	d	file:
E2P_CMD_MAC_ADDR_LOADED	drivers/net/smc911x.h	/^#define		E2P_CMD_MAC_ADDR_LOADED	/;"	d
E2P_CMD_MAC_ADDR_LOADED_	board/micronas/vct/smc_eeprom.c	/^#define  E2P_CMD_MAC_ADDR_LOADED_ /;"	d	file:
E2P_CMD_READ_	drivers/usb/eth/smsc95xx.c	/^#define E2P_CMD_READ_	/;"	d	file:
E2P_CMD_TIMEOUT_	drivers/usb/eth/smsc95xx.c	/^#define E2P_CMD_TIMEOUT_	/;"	d	file:
E2P_DATA	board/micronas/vct/smc_eeprom.c	/^#define E2P_DATA	/;"	d	file:
E2P_DATA	drivers/net/smc911x.h	/^#define E2P_DATA	/;"	d
E2P_DATA	drivers/usb/eth/smsc95xx.c	/^#define E2P_DATA	/;"	d	file:
E2P_DATA_EEPROM_DATA	drivers/net/smc911x.h	/^#define	E2P_DATA_EEPROM_DATA	/;"	d
E2_MASK	arch/arc/lib/interrupts.c	/^#define E2_MASK	/;"	d	file:
E802_HDR_SIZE	include/net.h	/^#define E802_HDR_SIZE	/;"	d
E820MAX	arch/x86/include/asm/e820.h	/^#define E820MAX	/;"	d
E820_ACPI	arch/x86/include/asm/e820.h	/^#define E820_ACPI	/;"	d
E820_NVS	arch/x86/include/asm/e820.h	/^#define E820_NVS	/;"	d
E820_RAM	arch/x86/include/asm/e820.h	/^#define E820_RAM	/;"	d
E820_RESERVED	arch/x86/include/asm/e820.h	/^#define E820_RESERVED	/;"	d
E820_SIGNATURE	include/vxworks.h	/^#define E820_SIGNATURE	/;"	d
E820_UNUSABLE	arch/x86/include/asm/e820.h	/^#define E820_UNUSABLE	/;"	d
E8390_CMD	drivers/net/8390.h	/^#define E8390_CMD	/;"	d
E8390_NODMA	drivers/net/8390.h	/^#define E8390_NODMA	/;"	d
E8390_PAGE0	drivers/net/8390.h	/^#define E8390_PAGE0	/;"	d
E8390_PAGE1	drivers/net/8390.h	/^#define E8390_PAGE1	/;"	d
E8390_PAGE2	drivers/net/8390.h	/^#define E8390_PAGE2	/;"	d
E8390_RREAD	drivers/net/8390.h	/^#define E8390_RREAD	/;"	d
E8390_RWRITE	drivers/net/8390.h	/^#define E8390_RWRITE	/;"	d
E8390_RXCONFIG	drivers/net/8390.h	/^#define E8390_RXCONFIG	/;"	d
E8390_RXOFF	drivers/net/8390.h	/^#define E8390_RXOFF	/;"	d
E8390_RX_IRQ_MASK	drivers/net/8390.h	/^#define E8390_RX_IRQ_MASK	/;"	d
E8390_START	drivers/net/8390.h	/^#define E8390_START	/;"	d
E8390_STOP	drivers/net/8390.h	/^#define E8390_STOP	/;"	d
E8390_TRANS	drivers/net/8390.h	/^#define E8390_TRANS	/;"	d
E8390_TXCONFIG	drivers/net/8390.h	/^#define E8390_TXCONFIG	/;"	d
E8390_TXOFF	drivers/net/8390.h	/^#define E8390_TXOFF	/;"	d
E8390_TX_IRQ_MASK	drivers/net/8390.h	/^#define E8390_TX_IRQ_MASK	/;"	d
EACCES	fs/yaffs2/yportenv.h	/^#define EACCES	/;"	d
EACCES	include/linux/errno.h	/^#define	EACCES	/;"	d
EADDRINUSE	include/linux/errno.h	/^#define	EADDRINUSE	/;"	d
EADDRNOTAVAIL	include/linux/errno.h	/^#define	EADDRNOTAVAIL	/;"	d
EADV	include/linux/errno.h	/^#define	EADV	/;"	d
EAFNOSUPPORT	include/linux/errno.h	/^#define	EAFNOSUPPORT	/;"	d
EAGAIN	include/linux/errno.h	/^#define	EAGAIN	/;"	d
EALREADY	include/linux/errno.h	/^#define	EALREADY	/;"	d
EAR	arch/powerpc/include/asm/processor.h	/^#define EAR	/;"	d
EARLY_AVP_STACK	arch/arm/include/asm/arch-tegra/tegra.h	/^#define EARLY_AVP_STACK	/;"	d
EARLY_CPU_STACK	arch/arm/include/asm/arch-tegra/tegra.h	/^#define EARLY_CPU_STACK	/;"	d
EARLY_DB	arch/x86/cpu/quark/smc.h	/^#define EARLY_DB	/;"	d
EARLY_EHCI_BAR	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EARLY_EHCI_BAR	/;"	d
EARLY_GTT_BAR	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EARLY_GTT_BAR	/;"	d
EARLY_INIT	arch/arm/include/asm/arch-omap3/mem.h	/^#define EARLY_INIT	/;"	d
EARLY_PGTABLE_SIZE	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define EARLY_PGTABLE_SIZE /;"	d
EARLY_POST_CROS_EC	board/google/chromebook_link/Kconfig	/^config EARLY_POST_CROS_EC$/;"	c
EARLY_POST_CROS_EC	board/google/chromebook_samus/Kconfig	/^config EARLY_POST_CROS_EC$/;"	c
EARLY_TEMP_MMIO	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EARLY_TEMP_MMIO	/;"	d
EARLY_UART_BAR	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EARLY_UART_BAR	/;"	d
EARLY_XHCI_BAR	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EARLY_XHCI_BAR	/;"	d
EASSTR_ASST	include/usb/fusbh200.h	/^#define EASSTR_ASST(/;"	d
EASSTR_EOF1	include/usb/fusbh200.h	/^#define EASSTR_EOF1(/;"	d
EASSTR_EOF2	include/usb/fusbh200.h	/^#define EASSTR_EOF2(/;"	d
EASSTR_RUNNING	include/usb/fusbh200.h	/^#define EASSTR_RUNNING /;"	d
EASSTR_SUSPEND	include/usb/fusbh200.h	/^#define EASSTR_SUSPEND /;"	d
EASYLOGO_DECOMP_BUFFER	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^static unsigned char EASYLOGO_DECOMP_BUFFER[158700];$/;"	v	typeref:typename:unsigned char[158700]
EASYLOGO_DECOMP_BUFFER	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^static unsigned char EASYLOGO_DECOMP_BUFFER[158700];$/;"	v	typeref:typename:unsigned char[158700]
EASYLOGO_DECOMP_BUFFER	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^static unsigned char EASYLOGO_DECOMP_BUFFER[105800];$/;"	v	typeref:typename:unsigned char[105800]
EASYLOGO_DECOMP_BUFFER	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^static unsigned char EASYLOGO_DECOMP_BUFFER[105800];$/;"	v	typeref:typename:unsigned char[105800]
EASYLOGO_ENABLE_GZIP	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^#define EASYLOGO_ENABLE_GZIP /;"	d
EASYLOGO_ENABLE_GZIP	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^#define EASYLOGO_ENABLE_GZIP /;"	d
EASYLOGO_ENABLE_LZMA	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^#define EASYLOGO_ENABLE_LZMA /;"	d
EASYLOGO_ENABLE_LZMA	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^#define EASYLOGO_ENABLE_LZMA /;"	d
EASYLOGO_HEADER	include/configs/bf527-ezkit.h	/^# define EASYLOGO_HEADER /;"	d
EASYLOGO_HEADER	include/configs/bf548-ezkit.h	/^#define EASYLOGO_HEADER /;"	d
EASYLOGO_HEADER	include/configs/cm-bf548.h	/^#  define EASYLOGO_HEADER /;"	d
EAWI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define EAWI	/;"	d
EAX	arch/x86/include/asm/ptrace.h	/^#define EAX /;"	d
EAX_EDX_ARGS	arch/x86/include/asm/msr.h	/^#define EAX_EDX_ARGS(/;"	d
EAX_EDX_RET	arch/x86/include/asm/msr.h	/^#define EAX_EDX_RET(/;"	d
EAX_EDX_VAL	arch/x86/include/asm/msr.h	/^#define EAX_EDX_VAL(/;"	d
EB0CAW_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0CAW_10	/;"	d
EB0CAW_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0CAW_11	/;"	d
EB0CAW_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0CAW_8	/;"	d
EB0CAW_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0CAW_9	/;"	d
EB0E	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0E	/;"	d
EB0SZ_128	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0SZ_128	/;"	d
EB0SZ_16	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0SZ_16	/;"	d
EB0SZ_32	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0SZ_32	/;"	d
EB0SZ_64	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB0SZ_64	/;"	d
EB1CAW_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1CAW_10	/;"	d
EB1CAW_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1CAW_11	/;"	d
EB1CAW_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1CAW_8	/;"	d
EB1CAW_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1CAW_9	/;"	d
EB1E	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1E	/;"	d
EB1SZ_128	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1SZ_128	/;"	d
EB1SZ_16	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1SZ_16	/;"	d
EB1SZ_32	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1SZ_32	/;"	d
EB1SZ_64	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB1SZ_64	/;"	d
EB2CAW_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2CAW_10	/;"	d
EB2CAW_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2CAW_11	/;"	d
EB2CAW_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2CAW_8	/;"	d
EB2CAW_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2CAW_9	/;"	d
EB2E	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2E	/;"	d
EB2SZ_128	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2SZ_128	/;"	d
EB2SZ_16	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2SZ_16	/;"	d
EB2SZ_32	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2SZ_32	/;"	d
EB2SZ_64	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB2SZ_64	/;"	d
EB3CAW_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3CAW_10	/;"	d
EB3CAW_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3CAW_11	/;"	d
EB3CAW_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3CAW_8	/;"	d
EB3CAW_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3CAW_9	/;"	d
EB3E	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3E	/;"	d
EB3SZ_128	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3SZ_128	/;"	d
EB3SZ_16	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3SZ_16	/;"	d
EB3SZ_32	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3SZ_32	/;"	d
EB3SZ_64	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EB3SZ_64	/;"	d
EBADCOOKIE	include/linux/errno.h	/^#define EBADCOOKIE	/;"	d
EBADE	include/linux/errno.h	/^#define	EBADE	/;"	d
EBADF	fs/yaffs2/yportenv.h	/^#define EBADF	/;"	d
EBADF	include/linux/errno.h	/^#define	EBADF	/;"	d
EBADFD	include/linux/errno.h	/^#define	EBADFD	/;"	d
EBADHANDLE	include/linux/errno.h	/^#define EBADHANDLE	/;"	d
EBADMSG	include/linux/errno.h	/^#define	EBADMSG	/;"	d
EBADR	include/linux/errno.h	/^#define	EBADR	/;"	d
EBADRQC	include/linux/errno.h	/^#define	EBADRQC	/;"	d
EBADSLT	include/linux/errno.h	/^#define	EBADSLT	/;"	d
EBADTYPE	include/linux/errno.h	/^#define EBADTYPE	/;"	d
EBANK_CS1_DIS	arch/arm/include/asm/emif.h	/^#define EBANK_CS1_DIS	/;"	d
EBANK_CS1_EN	arch/arm/include/asm/emif.h	/^#define EBANK_CS1_EN	/;"	d
EBAR_DEVICE_BOOTCS3	drivers/net/mvgbe.h	/^#define EBAR_DEVICE_BOOTCS3	/;"	d
EBAR_DEVICE_DEVCS0	drivers/net/mvgbe.h	/^#define EBAR_DEVICE_DEVCS0	/;"	d
EBAR_DEVICE_DEVCS1	drivers/net/mvgbe.h	/^#define EBAR_DEVICE_DEVCS1	/;"	d
EBAR_DEVICE_DEVCS2	drivers/net/mvgbe.h	/^#define EBAR_DEVICE_DEVCS2	/;"	d
EBAR_DEVICE_DEVCS3	drivers/net/mvgbe.h	/^#define EBAR_DEVICE_DEVCS3	/;"	d
EBAR_DRAM_CACHE_COHERENCY_WB	drivers/net/mvgbe.h	/^#define EBAR_DRAM_CACHE_COHERENCY_WB	/;"	d
EBAR_DRAM_CACHE_COHERENCY_WT	drivers/net/mvgbe.h	/^#define EBAR_DRAM_CACHE_COHERENCY_WT	/;"	d
EBAR_DRAM_CS0	drivers/net/mvgbe.h	/^#define EBAR_DRAM_CS0	/;"	d
EBAR_DRAM_CS1	drivers/net/mvgbe.h	/^#define EBAR_DRAM_CS1	/;"	d
EBAR_DRAM_CS2	drivers/net/mvgbe.h	/^#define EBAR_DRAM_CS2	/;"	d
EBAR_DRAM_CS3	drivers/net/mvgbe.h	/^#define EBAR_DRAM_CS3	/;"	d
EBAR_DRAM_NO_CACHE_COHERENCY	drivers/net/mvgbe.h	/^#define EBAR_DRAM_NO_CACHE_COHERENCY	/;"	d
EBAR_PCI_BYTE_SWAP	drivers/net/mvgbe.h	/^#define EBAR_PCI_BYTE_SWAP	/;"	d
EBAR_PCI_BYTE_WORD_SWAP	drivers/net/mvgbe.h	/^#define EBAR_PCI_BYTE_WORD_SWAP	/;"	d
EBAR_PCI_IO_SPACE	drivers/net/mvgbe.h	/^#define EBAR_PCI_IO_SPACE	/;"	d
EBAR_PCI_MEMORY_SPACE	drivers/net/mvgbe.h	/^#define EBAR_PCI_MEMORY_SPACE	/;"	d
EBAR_PCI_NO_SNOOP_ASSERT	drivers/net/mvgbe.h	/^#define EBAR_PCI_NO_SNOOP_ASSERT	/;"	d
EBAR_PCI_NO_SNOOP_NOT_ASSERT	drivers/net/mvgbe.h	/^#define EBAR_PCI_NO_SNOOP_NOT_ASSERT	/;"	d
EBAR_PCI_NO_SWAP	drivers/net/mvgbe.h	/^#define EBAR_PCI_NO_SWAP	/;"	d
EBAR_PCI_REQ64_FORCE	drivers/net/mvgbe.h	/^#define EBAR_PCI_REQ64_FORCE	/;"	d
EBAR_PCI_REQ64_SIZE	drivers/net/mvgbe.h	/^#define EBAR_PCI_REQ64_SIZE	/;"	d
EBAR_PCI_WORD_SWAP	drivers/net/mvgbe.h	/^#define EBAR_PCI_WORD_SWAP	/;"	d
EBAR_TARGET_AUNIT	drivers/net/mvgbe.h	/^#define EBAR_TARGET_AUNIT	/;"	d
EBAR_TARGET_CBS	drivers/net/mvgbe.h	/^#define EBAR_TARGET_CBS	/;"	d
EBAR_TARGET_CUNIT	drivers/net/mvgbe.h	/^#define EBAR_TARGET_CUNIT	/;"	d
EBAR_TARGET_DEVICE	drivers/net/mvgbe.h	/^#define EBAR_TARGET_DEVICE	/;"	d
EBAR_TARGET_DRAM	drivers/net/mvgbe.h	/^#define EBAR_TARGET_DRAM	/;"	d
EBAR_TARGET_GUNIT	drivers/net/mvgbe.h	/^#define EBAR_TARGET_GUNIT	/;"	d
EBAR_TARGET_PCI0	drivers/net/mvgbe.h	/^#define EBAR_TARGET_PCI0	/;"	d
EBAR_TARGET_PCI1	drivers/net/mvgbe.h	/^#define EBAR_TARGET_PCI1	/;"	d
EBASE_CPUNUM	arch/mips/include/asm/mipsregs.h	/^#define EBASE_CPUNUM	/;"	d
EBA_CONFIG	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	EBA_CONFIG,$/;"	e	enum:__anonc557e98b0103
EBA_RESERVED_PEBS	drivers/mtd/ubi/eba.c	/^#define EBA_RESERVED_PEBS /;"	d	file:
EBC0	arch/powerpc/dts/arches.dts	/^			EBC0: ebc {$/;"	l	label:POB0
EBC0	arch/powerpc/dts/canyonlands.dts	/^			EBC0: ebc {$/;"	l	label:POB0
EBC0	arch/powerpc/dts/glacier.dts	/^			EBC0: ebc {$/;"	l	label:POB0
EBC0_BNAP_BEM_RW	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_BEM_RW	/;"	d
EBC0_BNAP_BEM_WRITEONLY	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_BEM_WRITEONLY	/;"	d
EBC0_BNAP_BME_DISABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_BME_DISABLED	/;"	d
EBC0_BNAP_BME_ENABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_BME_ENABLED	/;"	d
EBC0_BNAP_CSN_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_CSN_ENCODE(/;"	d
EBC0_BNAP_LARGE_FLASH_OR_SRAM	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNAP_LARGE_FLASH_OR_SRAM	/;"	d	file:
EBC0_BNAP_NAND_FLASH	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNAP_NAND_FLASH	/;"	d	file:
EBC0_BNAP_NVRAM_FPGA	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNAP_NVRAM_FPGA	/;"	d	file:
EBC0_BNAP_OEN_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_OEN_ENCODE(/;"	d
EBC0_BNAP_PEN_DISABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_PEN_DISABLED	/;"	d
EBC0_BNAP_PEN_ENABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_PEN_ENABLED	/;"	d
EBC0_BNAP_RE_DISABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_RE_DISABLED	/;"	d
EBC0_BNAP_RE_ENABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_RE_ENABLED	/;"	d
EBC0_BNAP_SMALL_FLASH	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNAP_SMALL_FLASH	/;"	d	file:
EBC0_BNAP_SOR_DELAYED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_SOR_DELAYED	/;"	d
EBC0_BNAP_SOR_NOT_DELAYED	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_SOR_NOT_DELAYED /;"	d
EBC0_BNAP_TH_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_TH_ENCODE(/;"	d
EBC0_BNAP_TWT_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_TWT_ENCODE(/;"	d
EBC0_BNAP_WBF_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_WBF_ENCODE(/;"	d
EBC0_BNAP_WBN_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNAP_WBN_ENCODE(/;"	d
EBC0_BNCR_BAS_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BAS_ENCODE(/;"	d
EBC0_BNCR_BS_128MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_128MB	/;"	d
EBC0_BNCR_BS_16MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_16MB	/;"	d
EBC0_BNCR_BS_1MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_1MB	/;"	d
EBC0_BNCR_BS_2MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_2MB	/;"	d
EBC0_BNCR_BS_32MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_32MB	/;"	d
EBC0_BNCR_BS_4MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_4MB	/;"	d
EBC0_BNCR_BS_64MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_64MB	/;"	d
EBC0_BNCR_BS_8MB	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_8MB	/;"	d
EBC0_BNCR_BS_MASK	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BS_MASK	/;"	d
EBC0_BNCR_BU_MASK	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BU_MASK	/;"	d
EBC0_BNCR_BU_RO	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BU_RO	/;"	d
EBC0_BNCR_BU_RW	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BU_RW	/;"	d
EBC0_BNCR_BU_WO	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BU_WO	/;"	d
EBC0_BNCR_BW_16BIT	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BW_16BIT	/;"	d
EBC0_BNCR_BW_32BIT	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BW_32BIT	/;"	d
EBC0_BNCR_BW_8BIT	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BW_8BIT	/;"	d
EBC0_BNCR_BW_MASK	board/amcc/bamboo/bamboo.h	/^#define EBC0_BNCR_BW_MASK	/;"	d
EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0	/;"	d	file:
EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4	/;"	d	file:
EBC0_BNCR_NAND_FLASH_CS0	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_NAND_FLASH_CS0	/;"	d	file:
EBC0_BNCR_NAND_FLASH_CS1	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_NAND_FLASH_CS1	/;"	d	file:
EBC0_BNCR_NAND_FLASH_CS2	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_NAND_FLASH_CS2	/;"	d	file:
EBC0_BNCR_NAND_FLASH_CS3	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_NAND_FLASH_CS3	/;"	d	file:
EBC0_BNCR_NVRAM_FPGA_CS5	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_NVRAM_FPGA_CS5	/;"	d	file:
EBC0_BNCR_SMALL_FLASH_CS0	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_SMALL_FLASH_CS0	/;"	d	file:
EBC0_BNCR_SMALL_FLASH_CS4	board/amcc/bamboo/bamboo.c	/^#define EBC0_BNCR_SMALL_FLASH_CS4	/;"	d	file:
EBC0_CFG	arch/powerpc/include/asm/ppc4xx.h	/^#define EBC0_CFG	/;"	d
EBC0_CFGADDR	arch/powerpc/include/asm/ppc4xx.h	/^#define EBC0_CFGADDR	/;"	d
EBC0_CFGDATA	arch/powerpc/include/asm/ppc4xx.h	/^#define EBC0_CFGDATA	/;"	d
EBC0_CFG_BPF_FOURDW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_BPF_FOURDW	/;"	d
EBC0_CFG_BPF_ONEDW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_BPF_ONEDW	/;"	d
EBC0_CFG_BPF_TWODW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_BPF_TWODW	/;"	d
EBC0_CFG_CSTC_DRIVEN	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_CSTC_DRIVEN	/;"	d
EBC0_CFG_EBTC_DRIVEN	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EBTC_DRIVEN	/;"	d
EBC0_CFG_EMPH_HIGH	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPH_HIGH	/;"	d
EBC0_CFG_EMPH_LOW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPH_LOW	/;"	d
EBC0_CFG_EMPH_MEDIUM_HIGH	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPH_MEDIUM_HIGH /;"	d
EBC0_CFG_EMPH_MEDIUM_LOW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPH_MEDIUM_LOW /;"	d
EBC0_CFG_EMPL_HIGH	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPL_HIGH	/;"	d
EBC0_CFG_EMPL_LOW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPL_LOW	/;"	d
EBC0_CFG_EMPL_MEDIUM_HIGH	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPL_MEDIUM_HIGH /;"	d
EBC0_CFG_EMPL_MEDIUM_LOW	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMPL_MEDIUM_LOW /;"	d
EBC0_CFG_EMS_8BIT	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_EMS_8BIT	/;"	d
EBC0_CFG_PME_DISABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_PME_DISABLED	/;"	d
EBC0_CFG_PME_ENABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_PME_ENABLED	/;"	d
EBC0_CFG_PMT_ENCODE	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_PMT_ENCODE(/;"	d
EBC0_CFG_PTD_ENABLED	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_PTD_ENABLED	/;"	d
EBC0_CFG_RTC_1024PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_1024PERCLK	/;"	d
EBC0_CFG_RTC_128PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_128PERCLK	/;"	d
EBC0_CFG_RTC_16PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_16PERCLK	/;"	d
EBC0_CFG_RTC_2048PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_2048PERCLK	/;"	d
EBC0_CFG_RTC_256PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_256PERCLK	/;"	d
EBC0_CFG_RTC_32PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_32PERCLK	/;"	d
EBC0_CFG_RTC_512PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_512PERCLK	/;"	d
EBC0_CFG_RTC_64PERCLK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_64PERCLK	/;"	d
EBC0_CFG_RTC_MASK	board/amcc/bamboo/bamboo.h	/^#define EBC0_CFG_RTC_MASK	/;"	d
EBCAW_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBCAW_10	/;"	d
EBCAW_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBCAW_11	/;"	d
EBCAW_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBCAW_8	/;"	d
EBCAW_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBCAW_9	/;"	d
EBC_BXAP_16BIT_SRAM	board/amcc/redwood/redwood.c	/^#define EBC_BXAP_16BIT_SRAM	/;"	d	file:
EBC_BXAP_32BIT_SRAM	board/amcc/redwood/redwood.c	/^#define EBC_BXAP_32BIT_SRAM	/;"	d	file:
EBC_BXAP_8BIT_SRAM	board/amcc/redwood/redwood.c	/^#define EBC_BXAP_8BIT_SRAM	/;"	d	file:
EBC_BXAP_BCE_DISABLE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCE_DISABLE	/;"	d
EBC_BXAP_BCE_ENABLE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCE_ENABLE	/;"	d
EBC_BXAP_BCT_16TRANS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCT_16TRANS	/;"	d
EBC_BXAP_BCT_2TRANS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCT_2TRANS	/;"	d
EBC_BXAP_BCT_4TRANS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCT_4TRANS	/;"	d
EBC_BXAP_BCT_8TRANS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCT_8TRANS	/;"	d
EBC_BXAP_BCT_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BCT_MASK	/;"	d
EBC_BXAP_BEM_RW	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BEM_RW	/;"	d
EBC_BXAP_BEM_WRITEONLY	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BEM_WRITEONLY	/;"	d
EBC_BXAP_BME_DISABLED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BME_DISABLED	/;"	d
EBC_BXAP_BME_ENABLED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_BME_ENABLED	/;"	d
EBC_BXAP_BWT_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define	EBC_BXAP_BWT_ENCODE(/;"	d
EBC_BXAP_CSN_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_CSN_ENCODE(/;"	d
EBC_BXAP_FPGA	board/amcc/redwood/redwood.c	/^#define EBC_BXAP_FPGA	/;"	d	file:
EBC_BXAP_FPGA	board/amcc/yucca/yucca.c	/^#define EBC_BXAP_FPGA	/;"	d	file:
EBC_BXAP_FWT_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define	EBC_BXAP_FWT_ENCODE(/;"	d
EBC_BXAP_LARGE_FLASH	board/amcc/yucca/yucca.c	/^#define EBC_BXAP_LARGE_FLASH	/;"	d	file:
EBC_BXAP_NAND	board/amcc/redwood/redwood.c	/^#define EBC_BXAP_NAND	/;"	d	file:
EBC_BXAP_NOR	board/amcc/redwood/redwood.c	/^#define EBC_BXAP_NOR	/;"	d	file:
EBC_BXAP_OEN_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_OEN_ENCODE(/;"	d
EBC_BXAP_PEN_DISABLED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_PEN_DISABLED	/;"	d
EBC_BXAP_PEN_ENABLED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_PEN_ENABLED	/;"	d
EBC_BXAP_RE_DISABLED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_RE_DISABLED	/;"	d
EBC_BXAP_RE_ENABLED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_RE_ENABLED	/;"	d
EBC_BXAP_SMALL_FLASH	board/amcc/yucca/yucca.c	/^#define EBC_BXAP_SMALL_FLASH	/;"	d	file:
EBC_BXAP_SOR_DELAYED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_SOR_DELAYED	/;"	d
EBC_BXAP_SOR_NONDELAYED	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_SOR_NONDELAYED	/;"	d
EBC_BXAP_TH_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_TH_ENCODE(/;"	d
EBC_BXAP_TWT_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_TWT_ENCODE(/;"	d
EBC_BXAP_WBF_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_WBF_ENCODE(/;"	d
EBC_BXAP_WBN_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXAP_WBN_ENCODE(/;"	d
EBC_BXCR	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR(/;"	d
EBC_BXCR_16BIT_SRAM_CS0	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_16BIT_SRAM_CS0	/;"	d	file:
EBC_BXCR_32BIT_SRAM_CS0	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_32BIT_SRAM_CS0	/;"	d	file:
EBC_BXCR_8BIT_SRAM_CS0	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_8BIT_SRAM_CS0	/;"	d	file:
EBC_BXCR_BANK_SIZE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BANK_SIZE(/;"	d
EBC_BXCR_BAS_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BAS_ENCODE(/;"	d
EBC_BXCR_BAS_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define	EBC_BXCR_BAS_MASK	/;"	d
EBC_BXCR_BS_128MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_128MB	/;"	d
EBC_BXCR_BS_16MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_16MB	/;"	d
EBC_BXCR_BS_1MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_1MB	/;"	d
EBC_BXCR_BS_2MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_2MB	/;"	d
EBC_BXCR_BS_32MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_32MB	/;"	d
EBC_BXCR_BS_4MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_4MB	/;"	d
EBC_BXCR_BS_64MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_64MB	/;"	d
EBC_BXCR_BS_8MB	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_8MB	/;"	d
EBC_BXCR_BS_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BS_MASK	/;"	d
EBC_BXCR_BU_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BU_MASK	/;"	d
EBC_BXCR_BU_NONE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define	EBC_BXCR_BU_NONE	/;"	d
EBC_BXCR_BU_R	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BU_R	/;"	d
EBC_BXCR_BU_RW	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BU_RW	/;"	d
EBC_BXCR_BU_W	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BU_W	/;"	d
EBC_BXCR_BW_16BIT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BW_16BIT	/;"	d
EBC_BXCR_BW_32BIT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BW_32BIT	/;"	d
EBC_BXCR_BW_8BIT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BW_8BIT	/;"	d
EBC_BXCR_BW_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_BXCR_BW_MASK	/;"	d
EBC_BXCR_FPGA_CS1	board/amcc/yucca/yucca.c	/^#define EBC_BXCR_FPGA_CS1	/;"	d	file:
EBC_BXCR_FPGA_CS3	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_FPGA_CS3	/;"	d	file:
EBC_BXCR_LARGE_FLASH_CS0	board/amcc/yucca/yucca.c	/^#define EBC_BXCR_LARGE_FLASH_CS0	/;"	d	file:
EBC_BXCR_LARGE_FLASH_CS2	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_LARGE_FLASH_CS2	/;"	d	file:
EBC_BXCR_LARGE_FLASH_CS2	board/amcc/yucca/yucca.c	/^#define EBC_BXCR_LARGE_FLASH_CS2	/;"	d	file:
EBC_BXCR_NAND_CS0	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_NAND_CS0	/;"	d	file:
EBC_BXCR_NAND_CS1	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_NAND_CS1	/;"	d	file:
EBC_BXCR_NAND_CS2	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_NAND_CS2	/;"	d	file:
EBC_BXCR_NOR_CS0	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_NOR_CS0	/;"	d	file:
EBC_BXCR_NOR_CS1	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_NOR_CS1	/;"	d	file:
EBC_BXCR_SMALL_FLASH_CS0	board/amcc/yucca/yucca.c	/^#define EBC_BXCR_SMALL_FLASH_CS0	/;"	d	file:
EBC_BXCR_SMALL_FLASH_CS2	board/amcc/yucca/yucca.c	/^#define EBC_BXCR_SMALL_FLASH_CS2	/;"	d	file:
EBC_BXCR_SRAM_CS2	board/amcc/redwood/redwood.c	/^#define EBC_BXCR_SRAM_CS2	/;"	d	file:
EBC_CFG_ATC_HI	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_ATC_HI	/;"	d
EBC_CFG_ATC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_ATC_MASK	/;"	d
EBC_CFG_ATC_PREVIOUS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_ATC_PREVIOUS	/;"	d
EBC_CFG_BPR_1DW	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_BPR_1DW	/;"	d
EBC_CFG_BPR_2DW	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_BPR_2DW	/;"	d
EBC_CFG_BPR_4DW	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_BPR_4DW	/;"	d
EBC_CFG_BPR_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_BPR_MASK	/;"	d
EBC_CFG_CSTC_DRIVEN	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_CSTC_DRIVEN	/;"	d
EBC_CFG_CSTC_HI	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_CSTC_HI	/;"	d
EBC_CFG_CSTC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_CSTC_MASK	/;"	d
EBC_CFG_CTC_HI	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_CTC_HI	/;"	d
EBC_CFG_CTC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_CTC_MASK	/;"	d
EBC_CFG_CTC_PREVIOUS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_CTC_PREVIOUS	/;"	d
EBC_CFG_DTC_HI	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_DTC_HI	/;"	d
EBC_CFG_DTC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_DTC_MASK	/;"	d
EBC_CFG_DTC_PREVIOUS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_DTC_PREVIOUS	/;"	d
EBC_CFG_EBTC_DRIVEN	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EBTC_DRIVEN	/;"	d
EBC_CFG_EBTC_HI	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EBTC_HI	/;"	d
EBC_CFG_EBTC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EBTC_MASK	/;"	d
EBC_CFG_EMC_DEFAULT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMC_DEFAULT	/;"	d
EBC_CFG_EMC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMC_MASK	/;"	d
EBC_CFG_EMC_NONDEFAULT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMC_NONDEFAULT	/;"	d
EBC_CFG_EMPH_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMPH_ENCODE(/;"	d
EBC_CFG_EMPH_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMPH_MASK	/;"	d
EBC_CFG_EMPH_POS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMPH_POS	/;"	d
EBC_CFG_EMPL_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMPL_ENCODE(/;"	d
EBC_CFG_EMPL_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMPL_MASK	/;"	d
EBC_CFG_EMPL_POS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMPL_POS	/;"	d
EBC_CFG_EMS_16BIT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMS_16BIT	/;"	d
EBC_CFG_EMS_32BIT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMS_32BIT	/;"	d
EBC_CFG_EMS_8BIT	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMS_8BIT	/;"	d
EBC_CFG_EMS_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_EMS_MASK	/;"	d
EBC_CFG_LE_LOCK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_LE_LOCK	/;"	d
EBC_CFG_LE_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_LE_MASK	/;"	d
EBC_CFG_LE_UNLOCK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_LE_UNLOCK	/;"	d
EBC_CFG_OEO_HI	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_OEO_HI	/;"	d
EBC_CFG_OEO_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_OEO_MASK	/;"	d
EBC_CFG_OEO_PREVIOUS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_OEO_PREVIOUS	/;"	d
EBC_CFG_PME_DISABLE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PME_DISABLE	/;"	d
EBC_CFG_PME_ENABLE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PME_ENABLE	/;"	d
EBC_CFG_PME_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PME_MASK	/;"	d
EBC_CFG_PMT_ENCODE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PMT_ENCODE(/;"	d
EBC_CFG_PMT_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PMT_MASK	/;"	d
EBC_CFG_PR_128	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PR_128	/;"	d
EBC_CFG_PR_16	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PR_16	/;"	d
EBC_CFG_PR_32	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PR_32	/;"	d
EBC_CFG_PR_64	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PR_64	/;"	d
EBC_CFG_PR_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PR_MASK	/;"	d
EBC_CFG_PTD_DISABLE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PTD_DISABLE	/;"	d
EBC_CFG_PTD_ENABLE	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PTD_ENABLE	/;"	d
EBC_CFG_PTD_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_PTD_MASK	/;"	d
EBC_CFG_RTC_1024PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_1024PERCLK	/;"	d
EBC_CFG_RTC_128PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_128PERCLK	/;"	d
EBC_CFG_RTC_16PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_16PERCLK	/;"	d
EBC_CFG_RTC_2048PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_2048PERCLK	/;"	d
EBC_CFG_RTC_256PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_256PERCLK	/;"	d
EBC_CFG_RTC_32PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_32PERCLK	/;"	d
EBC_CFG_RTC_512PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_512PERCLK	/;"	d
EBC_CFG_RTC_64PERCLK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_64PERCLK	/;"	d
EBC_CFG_RTC_MASK	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_CFG_RTC_MASK	/;"	d
EBC_DCR_BASE	arch/powerpc/include/asm/ppc4xx.h	/^#define EBC_DCR_BASE	/;"	d
EBC_MASTER	board/amcc/bamboo/bamboo.h	/^			    EBC_MASTER,$/;"	e	enum:config_list
EBC_NUM_BANKS	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define EBC_NUM_BANKS	/;"	d
EBE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBE	/;"	d
EBFONT	include/linux/errno.h	/^#define	EBFONT	/;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_AMBCTL0 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_AMBCTL1 /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_AMGCTL /;"	d
EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_ARBSTAT /;"	d
EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_ARBSTAT /;"	d
EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_ARBSTAT /;"	d
EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_ARBSTAT /;"	d
EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_ARBSTAT /;"	d
EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRACCT /;"	d
EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRACCT /;"	d
EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRACCT /;"	d
EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRACCT /;"	d
EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRACCT /;"	d
EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRARCT /;"	d
EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRARCT /;"	d
EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRARCT /;"	d
EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRARCT /;"	d
EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRARCT /;"	d
EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC0 /;"	d
EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC0 /;"	d
EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC0 /;"	d
EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC0 /;"	d
EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC0 /;"	d
EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC1 /;"	d
EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC1 /;"	d
EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC1 /;"	d
EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC1 /;"	d
EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC1 /;"	d
EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC2 /;"	d
EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC2 /;"	d
EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC2 /;"	d
EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC2 /;"	d
EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC2 /;"	d
EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC3 /;"	d
EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC3 /;"	d
EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC3 /;"	d
EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC3 /;"	d
EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC3 /;"	d
EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC4 /;"	d
EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC4 /;"	d
EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC4 /;"	d
EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC4 /;"	d
EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC4 /;"	d
EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC5 /;"	d
EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC5 /;"	d
EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC5 /;"	d
EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC5 /;"	d
EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC5 /;"	d
EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC6 /;"	d
EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC6 /;"	d
EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC6 /;"	d
EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC6 /;"	d
EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC6 /;"	d
EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBRC7 /;"	d
EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBRC7 /;"	d
EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBRC7 /;"	d
EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBRC7 /;"	d
EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBRC7 /;"	d
EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC0 /;"	d
EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC0 /;"	d
EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC0 /;"	d
EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC0 /;"	d
EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC0 /;"	d
EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC1 /;"	d
EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC1 /;"	d
EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC1 /;"	d
EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC1 /;"	d
EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC1 /;"	d
EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC2 /;"	d
EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC2 /;"	d
EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC2 /;"	d
EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC2 /;"	d
EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC2 /;"	d
EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC3 /;"	d
EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC3 /;"	d
EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC3 /;"	d
EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC3 /;"	d
EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC3 /;"	d
EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC4 /;"	d
EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC4 /;"	d
EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC4 /;"	d
EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC4 /;"	d
EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC4 /;"	d
EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC5 /;"	d
EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC5 /;"	d
EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC5 /;"	d
EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC5 /;"	d
EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC5 /;"	d
EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC6 /;"	d
EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC6 /;"	d
EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC6 /;"	d
EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC6 /;"	d
EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC6 /;"	d
EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRBWC7 /;"	d
EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRBWC7 /;"	d
EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRBWC7 /;"	d
EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRBWC7 /;"	d
EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRBWC7 /;"	d
EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRCTL0 /;"	d
EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRCTL0 /;"	d
EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRCTL0 /;"	d
EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRCTL0 /;"	d
EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRCTL0 /;"	d
EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRCTL1 /;"	d
EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRCTL1 /;"	d
EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRCTL1 /;"	d
EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRCTL1 /;"	d
EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRCTL1 /;"	d
EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRCTL2 /;"	d
EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRCTL2 /;"	d
EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRCTL2 /;"	d
EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRCTL2 /;"	d
EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRCTL2 /;"	d
EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRCTL3 /;"	d
EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRCTL3 /;"	d
EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRCTL3 /;"	d
EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRCTL3 /;"	d
EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRCTL3 /;"	d
EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRGC0 /;"	d
EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRGC0 /;"	d
EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRGC0 /;"	d
EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRGC0 /;"	d
EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRGC0 /;"	d
EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRGC1 /;"	d
EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRGC1 /;"	d
EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRGC1 /;"	d
EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRGC1 /;"	d
EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRGC1 /;"	d
EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRGC2 /;"	d
EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRGC2 /;"	d
EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRGC2 /;"	d
EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRGC2 /;"	d
EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRGC2 /;"	d
EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRGC3 /;"	d
EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRGC3 /;"	d
EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRGC3 /;"	d
EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRGC3 /;"	d
EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRGC3 /;"	d
EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRMCCL /;"	d
EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRMCCL /;"	d
EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRMCCL /;"	d
EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRMCCL /;"	d
EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRMCCL /;"	d
EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRMCEN /;"	d
EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRMCEN /;"	d
EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRMCEN /;"	d
EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRMCEN /;"	d
EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRMCEN /;"	d
EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRQUE /;"	d
EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRQUE /;"	d
EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRQUE /;"	d
EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRQUE /;"	d
EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRQUE /;"	d
EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_DDRTACT /;"	d
EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_DDRTACT /;"	d
EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_DDRTACT /;"	d
EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_DDRTACT /;"	d
EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_DDRTACT /;"	d
EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_ERRADD /;"	d
EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_ERRADD /;"	d
EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_ERRADD /;"	d
EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_ERRADD /;"	d
EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_ERRADD /;"	d
EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_ERRMST /;"	d
EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_ERRMST /;"	d
EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_ERRMST /;"	d
EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_ERRMST /;"	d
EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_ERRMST /;"	d
EBIU_FCTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define EBIU_FCTL /;"	d
EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_FCTL /;"	d
EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_FCTL /;"	d
EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_FCTL /;"	d
EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_FCTL /;"	d
EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_FCTL /;"	d
EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_MBSCTL /;"	d
EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_MBSCTL /;"	d
EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_MBSCTL /;"	d
EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_MBSCTL /;"	d
EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_MBSCTL /;"	d
EBIU_MODE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define EBIU_MODE /;"	d
EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_MODE /;"	d
EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_MODE /;"	d
EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_MODE /;"	d
EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_MODE /;"	d
EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_MODE /;"	d
EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EBIU_RSTCTL /;"	d
EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EBIU_RSTCTL /;"	d
EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EBIU_RSTCTL /;"	d
EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EBIU_RSTCTL /;"	d
EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EBIU_RSTCTL /;"	d
EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_SDBCTL /;"	d
EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_SDBCTL /;"	d
EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_SDBCTL /;"	d
EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_SDBCTL /;"	d
EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_SDBCTL /;"	d
EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_SDBCTL /;"	d
EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_SDGCTL /;"	d
EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_SDGCTL /;"	d
EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_SDGCTL /;"	d
EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_SDGCTL /;"	d
EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_SDGCTL /;"	d
EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_SDGCTL /;"	d
EBIU_SDRRC	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_SDRRC /;"	d
EBIU_SDRRC	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_SDRRC /;"	d
EBIU_SDRRC	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_SDRRC /;"	d
EBIU_SDRRC	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_SDRRC /;"	d
EBIU_SDRRC	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_SDRRC /;"	d
EBIU_SDRRC	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_SDRRC /;"	d
EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define EBIU_SDSTAT /;"	d
EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define EBIU_SDSTAT /;"	d
EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define EBIU_SDSTAT /;"	d
EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define EBIU_SDSTAT /;"	d
EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define EBIU_SDSTAT /;"	d
EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define EBIU_SDSTAT /;"	d
EBI_BASE	board/armltd/integrator/arm-ebi.h	/^#define EBI_BASE	/;"	d
EBI_BASE	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_BASE	/;"	d
EBI_BASE	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_BASE	/;"	d
EBI_BASE	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_BASE	/;"	d
EBI_BUSY_EN_RD	board/micronas/vct/ebi.h	/^#define EBI_BUSY_EN_RD	/;"	d
EBI_CHIP_SELECT_1	board/micronas/vct/ebi.h	/^#define EBI_CHIP_SELECT_1	/;"	d
EBI_CHIP_SELECT_2	board/micronas/vct/ebi.h	/^#define EBI_CHIP_SELECT_2	/;"	d
EBI_CNT_ACK	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_ACK(/;"	d
EBI_CNT_ACK	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_ACK(/;"	d
EBI_CNT_ACK	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_ACK(/;"	d
EBI_CNT_ACK_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_ACK_OFFS	/;"	d
EBI_CNT_ACK_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_ACK_OFFS	/;"	d
EBI_CNT_ACK_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_ACK_OFFS	/;"	d
EBI_CNT_EXT_PAGE_SZ	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_EXT_PAGE_SZ(/;"	d
EBI_CNT_EXT_PAGE_SZ	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_EXT_PAGE_SZ(/;"	d
EBI_CNT_EXT_PAGE_SZ	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_EXT_PAGE_SZ(/;"	d
EBI_CNT_EXT_PAGE_SZ_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_EXT_PAGE_SZ_OFFS	/;"	d
EBI_CNT_EXT_PAGE_SZ_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_EXT_PAGE_SZ_OFFS	/;"	d
EBI_CNT_EXT_PAGE_SZ_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_EXT_PAGE_SZ_OFFS	/;"	d
EBI_CNT_FL_PROGR	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_FL_PROGR(/;"	d
EBI_CNT_FL_PROGR	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_FL_PROGR(/;"	d
EBI_CNT_FL_PROGR	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_FL_PROGR(/;"	d
EBI_CNT_FL_PROGR_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_FL_PROGR_OFFS	/;"	d
EBI_CNT_FL_PROGR_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_FL_PROGR_OFFS	/;"	d
EBI_CNT_FL_PROGR_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_FL_PROGR_OFFS	/;"	d
EBI_CNT_WAIT_RDY	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_WAIT_RDY(/;"	d
EBI_CNT_WAIT_RDY	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_WAIT_RDY(/;"	d
EBI_CNT_WAIT_RDY	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_WAIT_RDY(/;"	d
EBI_CNT_WAIT_RDY_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CNT_WAIT_RDY_OFFS	/;"	d
EBI_CNT_WAIT_RDY_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CNT_WAIT_RDY_OFFS	/;"	d
EBI_CNT_WAIT_RDY_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CNT_WAIT_RDY_OFFS	/;"	d
EBI_CPU_ADDR_MASK	board/micronas/vct/ebi.h	/^#define EBI_CPU_ADDR_MASK	/;"	d
EBI_CPU_ID_SHIFT	board/micronas/vct/ebi.h	/^#define EBI_CPU_ID_SHIFT	/;"	d
EBI_CPU_IO_ACCS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CPU_IO_ACCS(/;"	d
EBI_CPU_IO_ACCS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CPU_IO_ACCS(/;"	d
EBI_CPU_IO_ACCS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CPU_IO_ACCS(/;"	d
EBI_CPU_IO_ACCS2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CPU_IO_ACCS2(/;"	d
EBI_CPU_IO_ACCS2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CPU_IO_ACCS2(/;"	d
EBI_CPU_IO_ACCS2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CPU_IO_ACCS2_OFFS	/;"	d
EBI_CPU_IO_ACCS2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CPU_IO_ACCS2_OFFS	/;"	d
EBI_CPU_IO_ACCS_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CPU_IO_ACCS_OFFS	/;"	d
EBI_CPU_IO_ACCS_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CPU_IO_ACCS_OFFS	/;"	d
EBI_CPU_IO_ACCS_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CPU_IO_ACCS_OFFS	/;"	d
EBI_CPU_WRITE	board/micronas/vct/ebi.h	/^#define EBI_CPU_WRITE	/;"	d
EBI_CRC_GEN	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CRC_GEN(/;"	d
EBI_CRC_GEN	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CRC_GEN(/;"	d
EBI_CRC_GEN_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CRC_GEN_OFFS	/;"	d
EBI_CRC_GEN_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CRC_GEN_OFFS	/;"	d
EBI_CSR0_REG	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR0_REG	/;"	d
EBI_CSR1_REG	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR1_REG	/;"	d
EBI_CSR2_REG	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR2_REG	/;"	d
EBI_CSR3_REG	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR3_REG	/;"	d
EBI_CSR_ASYNC	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_ASYNC	/;"	d
EBI_CSR_MEMSIZE_16BIT	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_MEMSIZE_16BIT	/;"	d
EBI_CSR_MEMSIZE_32BIT	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_MEMSIZE_32BIT	/;"	d
EBI_CSR_MEMSIZE_8BIT	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_MEMSIZE_8BIT	/;"	d
EBI_CSR_MEMSIZE_MASK	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_MEMSIZE_MASK	/;"	d
EBI_CSR_SYNC	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_SYNC	/;"	d
EBI_CSR_SYNC_MASK	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_SYNC_MASK	/;"	d
EBI_CSR_WAIT_MASK	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_WAIT_MASK	/;"	d
EBI_CSR_WREN_DISABLE	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_WREN_DISABLE	/;"	d
EBI_CSR_WREN_ENABLE	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_WREN_ENABLE	/;"	d
EBI_CSR_WREN_MASK	board/armltd/integrator/arm-ebi.h	/^#define EBI_CSR_WREN_MASK	/;"	d
EBI_CTRL	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CTRL(/;"	d
EBI_CTRL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CTRL(/;"	d
EBI_CTRL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CTRL(/;"	d
EBI_CTRL_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CTRL_OFFS	/;"	d
EBI_CTRL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CTRL_OFFS	/;"	d
EBI_CTRL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CTRL_OFFS	/;"	d
EBI_CTRL_SIG_ACTLV	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CTRL_SIG_ACTLV(/;"	d
EBI_CTRL_SIG_ACTLV	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CTRL_SIG_ACTLV(/;"	d
EBI_CTRL_SIG_ACTLV	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CTRL_SIG_ACTLV(/;"	d
EBI_CTRL_SIG_ACTLV_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_CTRL_SIG_ACTLV_OFFS	/;"	d
EBI_CTRL_SIG_ACTLV_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_CTRL_SIG_ACTLV_OFFS	/;"	d
EBI_CTRL_SIG_ACTLV_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_CTRL_SIG_ACTLV_OFFS	/;"	d
EBI_DEV1_ACK_RM_CNT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_ACK_RM_CNT(/;"	d
EBI_DEV1_ACK_RM_CNT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_ACK_RM_CNT(/;"	d
EBI_DEV1_ACK_RM_CNT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_ACK_RM_CNT(/;"	d
EBI_DEV1_ACK_RM_CNT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV1_ACK_RM_CNT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV1_ACK_RM_CNT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV1_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_CONFIG1(/;"	d
EBI_DEV1_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_CONFIG1(/;"	d
EBI_DEV1_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_CONFIG1(/;"	d
EBI_DEV1_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_CONFIG1_OFFS	/;"	d
EBI_DEV1_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_CONFIG1_OFFS	/;"	d
EBI_DEV1_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_CONFIG1_OFFS	/;"	d
EBI_DEV1_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_CONFIG2(/;"	d
EBI_DEV1_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_CONFIG2(/;"	d
EBI_DEV1_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_CONFIG2(/;"	d
EBI_DEV1_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_CONFIG2_OFFS	/;"	d
EBI_DEV1_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_CONFIG2_OFFS	/;"	d
EBI_DEV1_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_CONFIG2_OFFS	/;"	d
EBI_DEV1_DMA_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG1(/;"	d
EBI_DEV1_DMA_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG1(/;"	d
EBI_DEV1_DMA_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG1(/;"	d
EBI_DEV1_DMA_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV1_DMA_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV1_DMA_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV1_DMA_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG2(/;"	d
EBI_DEV1_DMA_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG2(/;"	d
EBI_DEV1_DMA_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG2(/;"	d
EBI_DEV1_DMA_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV1_DMA_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV1_DMA_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV1_DMA_ECC_CTRL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_ECC_CTRL(/;"	d
EBI_DEV1_DMA_ECC_CTRL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_ECC_CTRL(/;"	d
EBI_DEV1_DMA_ECC_CTRL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV1_DMA_ECC_CTRL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV1_DMA_EXT_ADDR	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_DMA_EXT_ADDR(/;"	d
EBI_DEV1_DMA_EXT_ADDR	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_EXT_ADDR(/;"	d
EBI_DEV1_DMA_EXT_ADDR	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_EXT_ADDR(/;"	d
EBI_DEV1_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV1_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV1_DMA_EXT_ADDR_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV1_EXT_ACC	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_EXT_ACC(/;"	d
EBI_DEV1_EXT_ACC	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_EXT_ACC(/;"	d
EBI_DEV1_EXT_ACC	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_EXT_ACC(/;"	d
EBI_DEV1_EXT_ACC_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_EXT_ACC_OFFS	/;"	d
EBI_DEV1_EXT_ACC_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_EXT_ACC_OFFS	/;"	d
EBI_DEV1_EXT_ACC_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_EXT_ACC_OFFS	/;"	d
EBI_DEV1_FIFO_CONFIG	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_FIFO_CONFIG(/;"	d
EBI_DEV1_FIFO_CONFIG	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_FIFO_CONFIG(/;"	d
EBI_DEV1_FIFO_CONFIG	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_FIFO_CONFIG(/;"	d
EBI_DEV1_FIFO_CONFIG_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV1_FIFO_CONFIG_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV1_FIFO_CONFIG_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV1_FLASH_CONF_ST	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_FLASH_CONF_ST(/;"	d
EBI_DEV1_FLASH_CONF_ST	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_FLASH_CONF_ST(/;"	d
EBI_DEV1_FLASH_CONF_ST	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_FLASH_CONF_ST(/;"	d
EBI_DEV1_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV1_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV1_FLASH_CONF_ST_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV1_TIM1_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD1(/;"	d
EBI_DEV1_TIM1_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD1(/;"	d
EBI_DEV1_TIM1_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD1(/;"	d
EBI_DEV1_TIM1_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD1_OFFS	/;"	d
EBI_DEV1_TIM1_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD1_OFFS	/;"	d
EBI_DEV1_TIM1_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD1_OFFS	/;"	d
EBI_DEV1_TIM1_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD2(/;"	d
EBI_DEV1_TIM1_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD2(/;"	d
EBI_DEV1_TIM1_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD2(/;"	d
EBI_DEV1_TIM1_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD2_OFFS	/;"	d
EBI_DEV1_TIM1_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD2_OFFS	/;"	d
EBI_DEV1_TIM1_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_RD2_OFFS	/;"	d
EBI_DEV1_TIM1_WR1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR1(/;"	d
EBI_DEV1_TIM1_WR1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR1(/;"	d
EBI_DEV1_TIM1_WR1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR1(/;"	d
EBI_DEV1_TIM1_WR1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR1_OFFS	/;"	d
EBI_DEV1_TIM1_WR1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR1_OFFS	/;"	d
EBI_DEV1_TIM1_WR1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR1_OFFS	/;"	d
EBI_DEV1_TIM1_WR2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR2(/;"	d
EBI_DEV1_TIM1_WR2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR2(/;"	d
EBI_DEV1_TIM1_WR2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR2(/;"	d
EBI_DEV1_TIM1_WR2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR2_OFFS	/;"	d
EBI_DEV1_TIM1_WR2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR2_OFFS	/;"	d
EBI_DEV1_TIM1_WR2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM1_WR2_OFFS	/;"	d
EBI_DEV1_TIM2_CFI_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD1(/;"	d
EBI_DEV1_TIM2_CFI_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD1(/;"	d
EBI_DEV1_TIM2_CFI_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD1(/;"	d
EBI_DEV1_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV1_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV1_TIM2_CFI_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV1_TIM2_CFI_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD2(/;"	d
EBI_DEV1_TIM2_CFI_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD2(/;"	d
EBI_DEV1_TIM2_CFI_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD2(/;"	d
EBI_DEV1_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV1_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV1_TIM2_CFI_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV1_TIM3_DMA1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA1(/;"	d
EBI_DEV1_TIM3_DMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA1(/;"	d
EBI_DEV1_TIM3_DMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA1(/;"	d
EBI_DEV1_TIM3_DMA1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA1_OFFS	/;"	d
EBI_DEV1_TIM3_DMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA1_OFFS	/;"	d
EBI_DEV1_TIM3_DMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA1_OFFS	/;"	d
EBI_DEV1_TIM3_DMA2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA2(/;"	d
EBI_DEV1_TIM3_DMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA2(/;"	d
EBI_DEV1_TIM3_DMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA2(/;"	d
EBI_DEV1_TIM3_DMA2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA2_OFFS	/;"	d
EBI_DEV1_TIM3_DMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA2_OFFS	/;"	d
EBI_DEV1_TIM3_DMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM3_DMA2_OFFS	/;"	d
EBI_DEV1_TIM4_UDMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA1(/;"	d
EBI_DEV1_TIM4_UDMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA1(/;"	d
EBI_DEV1_TIM4_UDMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV1_TIM4_UDMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV1_TIM4_UDMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA2(/;"	d
EBI_DEV1_TIM4_UDMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA2(/;"	d
EBI_DEV1_TIM4_UDMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV1_TIM4_UDMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV1_TIM_EXT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM_EXT(/;"	d
EBI_DEV1_TIM_EXT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM_EXT(/;"	d
EBI_DEV1_TIM_EXT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM_EXT(/;"	d
EBI_DEV1_TIM_EXT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV1_TIM_EXT_OFFS	/;"	d
EBI_DEV1_TIM_EXT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV1_TIM_EXT_OFFS	/;"	d
EBI_DEV1_TIM_EXT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV1_TIM_EXT_OFFS	/;"	d
EBI_DEV2_ACK_RM_CNT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_ACK_RM_CNT(/;"	d
EBI_DEV2_ACK_RM_CNT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_ACK_RM_CNT(/;"	d
EBI_DEV2_ACK_RM_CNT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_ACK_RM_CNT(/;"	d
EBI_DEV2_ACK_RM_CNT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV2_ACK_RM_CNT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV2_ACK_RM_CNT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV2_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_CONFIG1(/;"	d
EBI_DEV2_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_CONFIG1(/;"	d
EBI_DEV2_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_CONFIG1(/;"	d
EBI_DEV2_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_CONFIG1_OFFS	/;"	d
EBI_DEV2_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_CONFIG1_OFFS	/;"	d
EBI_DEV2_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_CONFIG1_OFFS	/;"	d
EBI_DEV2_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_CONFIG2(/;"	d
EBI_DEV2_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_CONFIG2(/;"	d
EBI_DEV2_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_CONFIG2(/;"	d
EBI_DEV2_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_CONFIG2_OFFS	/;"	d
EBI_DEV2_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_CONFIG2_OFFS	/;"	d
EBI_DEV2_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_CONFIG2_OFFS	/;"	d
EBI_DEV2_DMA_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG1(/;"	d
EBI_DEV2_DMA_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG1(/;"	d
EBI_DEV2_DMA_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG1(/;"	d
EBI_DEV2_DMA_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV2_DMA_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV2_DMA_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV2_DMA_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG2(/;"	d
EBI_DEV2_DMA_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG2(/;"	d
EBI_DEV2_DMA_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG2(/;"	d
EBI_DEV2_DMA_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV2_DMA_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV2_DMA_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV2_DMA_ECC_CTRL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_ECC_CTRL(/;"	d
EBI_DEV2_DMA_ECC_CTRL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_ECC_CTRL(/;"	d
EBI_DEV2_DMA_ECC_CTRL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV2_DMA_ECC_CTRL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV2_DMA_EXT_ADDR	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_DMA_EXT_ADDR(/;"	d
EBI_DEV2_DMA_EXT_ADDR	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_EXT_ADDR(/;"	d
EBI_DEV2_DMA_EXT_ADDR	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_EXT_ADDR(/;"	d
EBI_DEV2_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV2_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV2_DMA_EXT_ADDR_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV2_EXT_ACC	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_EXT_ACC(/;"	d
EBI_DEV2_EXT_ACC	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_EXT_ACC(/;"	d
EBI_DEV2_EXT_ACC	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_EXT_ACC(/;"	d
EBI_DEV2_EXT_ACC_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_EXT_ACC_OFFS	/;"	d
EBI_DEV2_EXT_ACC_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_EXT_ACC_OFFS	/;"	d
EBI_DEV2_EXT_ACC_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_EXT_ACC_OFFS	/;"	d
EBI_DEV2_FIFO_CONFIG	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_FIFO_CONFIG(/;"	d
EBI_DEV2_FIFO_CONFIG	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_FIFO_CONFIG(/;"	d
EBI_DEV2_FIFO_CONFIG	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_FIFO_CONFIG(/;"	d
EBI_DEV2_FIFO_CONFIG_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV2_FIFO_CONFIG_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV2_FIFO_CONFIG_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV2_FLASH_CONF_ST	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_FLASH_CONF_ST(/;"	d
EBI_DEV2_FLASH_CONF_ST	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_FLASH_CONF_ST(/;"	d
EBI_DEV2_FLASH_CONF_ST	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_FLASH_CONF_ST(/;"	d
EBI_DEV2_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV2_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV2_FLASH_CONF_ST_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV2_TIM1_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD1(/;"	d
EBI_DEV2_TIM1_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD1(/;"	d
EBI_DEV2_TIM1_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD1(/;"	d
EBI_DEV2_TIM1_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD1_OFFS	/;"	d
EBI_DEV2_TIM1_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD1_OFFS	/;"	d
EBI_DEV2_TIM1_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD1_OFFS	/;"	d
EBI_DEV2_TIM1_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD2(/;"	d
EBI_DEV2_TIM1_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD2(/;"	d
EBI_DEV2_TIM1_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD2(/;"	d
EBI_DEV2_TIM1_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD2_OFFS	/;"	d
EBI_DEV2_TIM1_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD2_OFFS	/;"	d
EBI_DEV2_TIM1_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_RD2_OFFS	/;"	d
EBI_DEV2_TIM1_WR1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR1(/;"	d
EBI_DEV2_TIM1_WR1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR1(/;"	d
EBI_DEV2_TIM1_WR1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR1(/;"	d
EBI_DEV2_TIM1_WR1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR1_OFFS	/;"	d
EBI_DEV2_TIM1_WR1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR1_OFFS	/;"	d
EBI_DEV2_TIM1_WR1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR1_OFFS	/;"	d
EBI_DEV2_TIM1_WR2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR2(/;"	d
EBI_DEV2_TIM1_WR2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR2(/;"	d
EBI_DEV2_TIM1_WR2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR2(/;"	d
EBI_DEV2_TIM1_WR2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR2_OFFS	/;"	d
EBI_DEV2_TIM1_WR2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR2_OFFS	/;"	d
EBI_DEV2_TIM1_WR2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM1_WR2_OFFS	/;"	d
EBI_DEV2_TIM2_CFI_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD1(/;"	d
EBI_DEV2_TIM2_CFI_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD1(/;"	d
EBI_DEV2_TIM2_CFI_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD1(/;"	d
EBI_DEV2_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV2_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV2_TIM2_CFI_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV2_TIM2_CFI_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD2(/;"	d
EBI_DEV2_TIM2_CFI_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD2(/;"	d
EBI_DEV2_TIM2_CFI_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD2(/;"	d
EBI_DEV2_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV2_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV2_TIM2_CFI_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV2_TIM3_DMA1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA1(/;"	d
EBI_DEV2_TIM3_DMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA1(/;"	d
EBI_DEV2_TIM3_DMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA1(/;"	d
EBI_DEV2_TIM3_DMA1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA1_OFFS	/;"	d
EBI_DEV2_TIM3_DMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA1_OFFS	/;"	d
EBI_DEV2_TIM3_DMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA1_OFFS	/;"	d
EBI_DEV2_TIM3_DMA2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA2(/;"	d
EBI_DEV2_TIM3_DMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA2(/;"	d
EBI_DEV2_TIM3_DMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA2(/;"	d
EBI_DEV2_TIM3_DMA2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA2_OFFS	/;"	d
EBI_DEV2_TIM3_DMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA2_OFFS	/;"	d
EBI_DEV2_TIM3_DMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM3_DMA2_OFFS	/;"	d
EBI_DEV2_TIM4_UDMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA1(/;"	d
EBI_DEV2_TIM4_UDMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA1(/;"	d
EBI_DEV2_TIM4_UDMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV2_TIM4_UDMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV2_TIM4_UDMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA2(/;"	d
EBI_DEV2_TIM4_UDMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA2(/;"	d
EBI_DEV2_TIM4_UDMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV2_TIM4_UDMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV2_TIM_EXT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM_EXT(/;"	d
EBI_DEV2_TIM_EXT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM_EXT(/;"	d
EBI_DEV2_TIM_EXT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM_EXT(/;"	d
EBI_DEV2_TIM_EXT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV2_TIM_EXT_OFFS	/;"	d
EBI_DEV2_TIM_EXT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV2_TIM_EXT_OFFS	/;"	d
EBI_DEV2_TIM_EXT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV2_TIM_EXT_OFFS	/;"	d
EBI_DEV3_ACK_RM_CNT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_ACK_RM_CNT(/;"	d
EBI_DEV3_ACK_RM_CNT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_ACK_RM_CNT(/;"	d
EBI_DEV3_ACK_RM_CNT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_ACK_RM_CNT(/;"	d
EBI_DEV3_ACK_RM_CNT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV3_ACK_RM_CNT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV3_ACK_RM_CNT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV3_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_CONFIG1(/;"	d
EBI_DEV3_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_CONFIG1(/;"	d
EBI_DEV3_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_CONFIG1(/;"	d
EBI_DEV3_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_CONFIG1_OFFS	/;"	d
EBI_DEV3_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_CONFIG1_OFFS	/;"	d
EBI_DEV3_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_CONFIG1_OFFS	/;"	d
EBI_DEV3_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_CONFIG2(/;"	d
EBI_DEV3_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_CONFIG2(/;"	d
EBI_DEV3_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_CONFIG2(/;"	d
EBI_DEV3_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_CONFIG2_OFFS	/;"	d
EBI_DEV3_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_CONFIG2_OFFS	/;"	d
EBI_DEV3_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_CONFIG2_OFFS	/;"	d
EBI_DEV3_DMA_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG1(/;"	d
EBI_DEV3_DMA_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG1(/;"	d
EBI_DEV3_DMA_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG1(/;"	d
EBI_DEV3_DMA_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV3_DMA_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV3_DMA_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV3_DMA_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG2(/;"	d
EBI_DEV3_DMA_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG2(/;"	d
EBI_DEV3_DMA_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG2(/;"	d
EBI_DEV3_DMA_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV3_DMA_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV3_DMA_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV3_DMA_ECC_CTRL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_ECC_CTRL(/;"	d
EBI_DEV3_DMA_ECC_CTRL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_ECC_CTRL(/;"	d
EBI_DEV3_DMA_ECC_CTRL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV3_DMA_ECC_CTRL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV3_DMA_EXT_ADDR	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_DMA_EXT_ADDR(/;"	d
EBI_DEV3_DMA_EXT_ADDR	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_EXT_ADDR(/;"	d
EBI_DEV3_DMA_EXT_ADDR	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_EXT_ADDR(/;"	d
EBI_DEV3_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV3_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV3_DMA_EXT_ADDR_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV3_EXT_ACC	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_EXT_ACC(/;"	d
EBI_DEV3_EXT_ACC	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_EXT_ACC(/;"	d
EBI_DEV3_EXT_ACC	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_EXT_ACC(/;"	d
EBI_DEV3_EXT_ACC_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_EXT_ACC_OFFS	/;"	d
EBI_DEV3_EXT_ACC_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_EXT_ACC_OFFS	/;"	d
EBI_DEV3_EXT_ACC_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_EXT_ACC_OFFS	/;"	d
EBI_DEV3_FIFO_CONFIG	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_FIFO_CONFIG(/;"	d
EBI_DEV3_FIFO_CONFIG	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_FIFO_CONFIG(/;"	d
EBI_DEV3_FIFO_CONFIG	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_FIFO_CONFIG(/;"	d
EBI_DEV3_FIFO_CONFIG_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV3_FIFO_CONFIG_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV3_FIFO_CONFIG_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV3_FLASH_CONF_ST	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_FLASH_CONF_ST(/;"	d
EBI_DEV3_FLASH_CONF_ST	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_FLASH_CONF_ST(/;"	d
EBI_DEV3_FLASH_CONF_ST	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_FLASH_CONF_ST(/;"	d
EBI_DEV3_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV3_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV3_FLASH_CONF_ST_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV3_TIM1_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD1(/;"	d
EBI_DEV3_TIM1_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD1(/;"	d
EBI_DEV3_TIM1_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD1(/;"	d
EBI_DEV3_TIM1_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD1_OFFS	/;"	d
EBI_DEV3_TIM1_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD1_OFFS	/;"	d
EBI_DEV3_TIM1_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD1_OFFS	/;"	d
EBI_DEV3_TIM1_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD2(/;"	d
EBI_DEV3_TIM1_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD2(/;"	d
EBI_DEV3_TIM1_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD2(/;"	d
EBI_DEV3_TIM1_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD2_OFFS	/;"	d
EBI_DEV3_TIM1_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD2_OFFS	/;"	d
EBI_DEV3_TIM1_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_RD2_OFFS	/;"	d
EBI_DEV3_TIM1_WR1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR1(/;"	d
EBI_DEV3_TIM1_WR1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR1(/;"	d
EBI_DEV3_TIM1_WR1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR1(/;"	d
EBI_DEV3_TIM1_WR1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR1_OFFS	/;"	d
EBI_DEV3_TIM1_WR1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR1_OFFS	/;"	d
EBI_DEV3_TIM1_WR1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR1_OFFS	/;"	d
EBI_DEV3_TIM1_WR2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR2(/;"	d
EBI_DEV3_TIM1_WR2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR2(/;"	d
EBI_DEV3_TIM1_WR2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR2(/;"	d
EBI_DEV3_TIM1_WR2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR2_OFFS	/;"	d
EBI_DEV3_TIM1_WR2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR2_OFFS	/;"	d
EBI_DEV3_TIM1_WR2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM1_WR2_OFFS	/;"	d
EBI_DEV3_TIM2_CFI_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD1(/;"	d
EBI_DEV3_TIM2_CFI_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD1(/;"	d
EBI_DEV3_TIM2_CFI_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD1(/;"	d
EBI_DEV3_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV3_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV3_TIM2_CFI_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV3_TIM2_CFI_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD2(/;"	d
EBI_DEV3_TIM2_CFI_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD2(/;"	d
EBI_DEV3_TIM2_CFI_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD2(/;"	d
EBI_DEV3_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV3_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV3_TIM2_CFI_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV3_TIM3_DMA1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA1(/;"	d
EBI_DEV3_TIM3_DMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA1(/;"	d
EBI_DEV3_TIM3_DMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA1(/;"	d
EBI_DEV3_TIM3_DMA1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA1_OFFS	/;"	d
EBI_DEV3_TIM3_DMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA1_OFFS	/;"	d
EBI_DEV3_TIM3_DMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA1_OFFS	/;"	d
EBI_DEV3_TIM3_DMA2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA2(/;"	d
EBI_DEV3_TIM3_DMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA2(/;"	d
EBI_DEV3_TIM3_DMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA2(/;"	d
EBI_DEV3_TIM3_DMA2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA2_OFFS	/;"	d
EBI_DEV3_TIM3_DMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA2_OFFS	/;"	d
EBI_DEV3_TIM3_DMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM3_DMA2_OFFS	/;"	d
EBI_DEV3_TIM4_UDMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA1(/;"	d
EBI_DEV3_TIM4_UDMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA1(/;"	d
EBI_DEV3_TIM4_UDMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV3_TIM4_UDMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV3_TIM4_UDMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA2(/;"	d
EBI_DEV3_TIM4_UDMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA2(/;"	d
EBI_DEV3_TIM4_UDMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV3_TIM4_UDMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV3_TIM_EXT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM_EXT(/;"	d
EBI_DEV3_TIM_EXT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM_EXT(/;"	d
EBI_DEV3_TIM_EXT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM_EXT(/;"	d
EBI_DEV3_TIM_EXT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV3_TIM_EXT_OFFS	/;"	d
EBI_DEV3_TIM_EXT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV3_TIM_EXT_OFFS	/;"	d
EBI_DEV3_TIM_EXT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV3_TIM_EXT_OFFS	/;"	d
EBI_DEV4_ACK_RM_CNT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_ACK_RM_CNT(/;"	d
EBI_DEV4_ACK_RM_CNT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_ACK_RM_CNT(/;"	d
EBI_DEV4_ACK_RM_CNT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_ACK_RM_CNT(/;"	d
EBI_DEV4_ACK_RM_CNT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV4_ACK_RM_CNT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV4_ACK_RM_CNT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_ACK_RM_CNT_OFFS	/;"	d
EBI_DEV4_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_CONFIG1(/;"	d
EBI_DEV4_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_CONFIG1(/;"	d
EBI_DEV4_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_CONFIG1(/;"	d
EBI_DEV4_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_CONFIG1_OFFS	/;"	d
EBI_DEV4_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_CONFIG1_OFFS	/;"	d
EBI_DEV4_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_CONFIG1_OFFS	/;"	d
EBI_DEV4_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_CONFIG2(/;"	d
EBI_DEV4_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_CONFIG2(/;"	d
EBI_DEV4_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_CONFIG2(/;"	d
EBI_DEV4_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_CONFIG2_OFFS	/;"	d
EBI_DEV4_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_CONFIG2_OFFS	/;"	d
EBI_DEV4_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_CONFIG2_OFFS	/;"	d
EBI_DEV4_DMA_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG1(/;"	d
EBI_DEV4_DMA_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG1(/;"	d
EBI_DEV4_DMA_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG1(/;"	d
EBI_DEV4_DMA_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV4_DMA_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV4_DMA_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG1_OFFS	/;"	d
EBI_DEV4_DMA_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG2(/;"	d
EBI_DEV4_DMA_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG2(/;"	d
EBI_DEV4_DMA_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG2(/;"	d
EBI_DEV4_DMA_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV4_DMA_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV4_DMA_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_CONFIG2_OFFS	/;"	d
EBI_DEV4_DMA_ECC_CTRL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_ECC_CTRL(/;"	d
EBI_DEV4_DMA_ECC_CTRL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_ECC_CTRL(/;"	d
EBI_DEV4_DMA_ECC_CTRL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV4_DMA_ECC_CTRL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_ECC_CTRL_OFFS	/;"	d
EBI_DEV4_DMA_EXT_ADDR	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_DMA_EXT_ADDR(/;"	d
EBI_DEV4_DMA_EXT_ADDR	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_EXT_ADDR(/;"	d
EBI_DEV4_DMA_EXT_ADDR	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_EXT_ADDR(/;"	d
EBI_DEV4_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV4_DMA_EXT_ADDR_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV4_DMA_EXT_ADDR_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_DMA_EXT_ADDR_OFFS	/;"	d
EBI_DEV4_EXT_ACC	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_EXT_ACC(/;"	d
EBI_DEV4_EXT_ACC	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_EXT_ACC(/;"	d
EBI_DEV4_EXT_ACC	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_EXT_ACC(/;"	d
EBI_DEV4_EXT_ACC_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_EXT_ACC_OFFS	/;"	d
EBI_DEV4_EXT_ACC_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_EXT_ACC_OFFS	/;"	d
EBI_DEV4_EXT_ACC_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_EXT_ACC_OFFS	/;"	d
EBI_DEV4_FIFO_CONFIG	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_FIFO_CONFIG(/;"	d
EBI_DEV4_FIFO_CONFIG	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_FIFO_CONFIG(/;"	d
EBI_DEV4_FIFO_CONFIG	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_FIFO_CONFIG(/;"	d
EBI_DEV4_FIFO_CONFIG_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV4_FIFO_CONFIG_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV4_FIFO_CONFIG_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_FIFO_CONFIG_OFFS	/;"	d
EBI_DEV4_FLASH_CONF_ST	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_FLASH_CONF_ST(/;"	d
EBI_DEV4_FLASH_CONF_ST	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_FLASH_CONF_ST(/;"	d
EBI_DEV4_FLASH_CONF_ST	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_FLASH_CONF_ST(/;"	d
EBI_DEV4_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV4_FLASH_CONF_ST_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV4_FLASH_CONF_ST_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_FLASH_CONF_ST_OFFS	/;"	d
EBI_DEV4_TIM1_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD1(/;"	d
EBI_DEV4_TIM1_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD1(/;"	d
EBI_DEV4_TIM1_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD1(/;"	d
EBI_DEV4_TIM1_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD1_OFFS	/;"	d
EBI_DEV4_TIM1_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD1_OFFS	/;"	d
EBI_DEV4_TIM1_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD1_OFFS	/;"	d
EBI_DEV4_TIM1_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD2(/;"	d
EBI_DEV4_TIM1_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD2(/;"	d
EBI_DEV4_TIM1_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD2(/;"	d
EBI_DEV4_TIM1_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD2_OFFS	/;"	d
EBI_DEV4_TIM1_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD2_OFFS	/;"	d
EBI_DEV4_TIM1_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_RD2_OFFS	/;"	d
EBI_DEV4_TIM1_WR1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR1(/;"	d
EBI_DEV4_TIM1_WR1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR1(/;"	d
EBI_DEV4_TIM1_WR1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR1(/;"	d
EBI_DEV4_TIM1_WR1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR1_OFFS	/;"	d
EBI_DEV4_TIM1_WR1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR1_OFFS	/;"	d
EBI_DEV4_TIM1_WR1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR1_OFFS	/;"	d
EBI_DEV4_TIM1_WR2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR2(/;"	d
EBI_DEV4_TIM1_WR2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR2(/;"	d
EBI_DEV4_TIM1_WR2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR2(/;"	d
EBI_DEV4_TIM1_WR2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR2_OFFS	/;"	d
EBI_DEV4_TIM1_WR2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR2_OFFS	/;"	d
EBI_DEV4_TIM1_WR2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM1_WR2_OFFS	/;"	d
EBI_DEV4_TIM2_CFI_RD1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD1(/;"	d
EBI_DEV4_TIM2_CFI_RD1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD1(/;"	d
EBI_DEV4_TIM2_CFI_RD1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD1(/;"	d
EBI_DEV4_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV4_TIM2_CFI_RD1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV4_TIM2_CFI_RD1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD1_OFFS	/;"	d
EBI_DEV4_TIM2_CFI_RD2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD2(/;"	d
EBI_DEV4_TIM2_CFI_RD2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD2(/;"	d
EBI_DEV4_TIM2_CFI_RD2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD2(/;"	d
EBI_DEV4_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV4_TIM2_CFI_RD2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV4_TIM2_CFI_RD2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM2_CFI_RD2_OFFS	/;"	d
EBI_DEV4_TIM3_DMA1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA1(/;"	d
EBI_DEV4_TIM3_DMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA1(/;"	d
EBI_DEV4_TIM3_DMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA1(/;"	d
EBI_DEV4_TIM3_DMA1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA1_OFFS	/;"	d
EBI_DEV4_TIM3_DMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA1_OFFS	/;"	d
EBI_DEV4_TIM3_DMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA1_OFFS	/;"	d
EBI_DEV4_TIM3_DMA2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA2(/;"	d
EBI_DEV4_TIM3_DMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA2(/;"	d
EBI_DEV4_TIM3_DMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA2(/;"	d
EBI_DEV4_TIM3_DMA2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA2_OFFS	/;"	d
EBI_DEV4_TIM3_DMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA2_OFFS	/;"	d
EBI_DEV4_TIM3_DMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM3_DMA2_OFFS	/;"	d
EBI_DEV4_TIM4_UDMA1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA1(/;"	d
EBI_DEV4_TIM4_UDMA1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA1(/;"	d
EBI_DEV4_TIM4_UDMA1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV4_TIM4_UDMA1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA1_OFFS	/;"	d
EBI_DEV4_TIM4_UDMA2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA2(/;"	d
EBI_DEV4_TIM4_UDMA2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA2(/;"	d
EBI_DEV4_TIM4_UDMA2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV4_TIM4_UDMA2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM4_UDMA2_OFFS	/;"	d
EBI_DEV4_TIM_EXT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM_EXT(/;"	d
EBI_DEV4_TIM_EXT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM_EXT(/;"	d
EBI_DEV4_TIM_EXT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM_EXT(/;"	d
EBI_DEV4_TIM_EXT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_DEV4_TIM_EXT_OFFS	/;"	d
EBI_DEV4_TIM_EXT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_DEV4_TIM_EXT_OFFS	/;"	d
EBI_DEV4_TIM_EXT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_DEV4_TIM_EXT_OFFS	/;"	d
EBI_ECC0	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC0(/;"	d
EBI_ECC0	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC0(/;"	d
EBI_ECC0_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC0_OFFS	/;"	d
EBI_ECC0_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC0_OFFS	/;"	d
EBI_ECC1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC1(/;"	d
EBI_ECC1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC1(/;"	d
EBI_ECC1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC1_OFFS	/;"	d
EBI_ECC1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC1_OFFS	/;"	d
EBI_ECC2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC2(/;"	d
EBI_ECC2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC2(/;"	d
EBI_ECC2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC2_OFFS	/;"	d
EBI_ECC2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC2_OFFS	/;"	d
EBI_ECC3	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC3(/;"	d
EBI_ECC3	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC3(/;"	d
EBI_ECC3_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_ECC3_OFFS	/;"	d
EBI_ECC3_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_ECC3_OFFS	/;"	d
EBI_EXTERNAL_DATA_16	board/micronas/vct/ebi.h	/^#define EBI_EXTERNAL_DATA_16	/;"	d
EBI_EXTERNAL_DATA_8	board/micronas/vct/ebi.h	/^#define EBI_EXTERNAL_DATA_8	/;"	d
EBI_EXT_ADDR	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_EXT_ADDR(/;"	d
EBI_EXT_ADDR	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_EXT_ADDR(/;"	d
EBI_EXT_ADDR	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_EXT_ADDR(/;"	d
EBI_EXT_ADDR_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_EXT_ADDR_OFFS	/;"	d
EBI_EXT_ADDR_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_EXT_ADDR_OFFS	/;"	d
EBI_EXT_ADDR_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_EXT_ADDR_OFFS	/;"	d
EBI_EXT_ADDR_SHIFT	board/micronas/vct/ebi.h	/^#define EBI_EXT_ADDR_SHIFT	/;"	d
EBI_EXT_MASTER_SRAM_HIGH	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_HIGH(/;"	d
EBI_EXT_MASTER_SRAM_HIGH	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_HIGH(/;"	d
EBI_EXT_MASTER_SRAM_HIGH_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_HIGH_OFFS	/;"	d
EBI_EXT_MASTER_SRAM_HIGH_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_HIGH_OFFS	/;"	d
EBI_EXT_MASTER_SRAM_LOW	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_LOW(/;"	d
EBI_EXT_MASTER_SRAM_LOW	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_LOW(/;"	d
EBI_EXT_MASTER_SRAM_LOW_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_LOW_OFFS	/;"	d
EBI_EXT_MASTER_SRAM_LOW_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_EXT_MASTER_SRAM_LOW_OFFS	/;"	d
EBI_GENIO1_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO1_CONFIG1(/;"	d
EBI_GENIO1_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO1_CONFIG1(/;"	d
EBI_GENIO1_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO1_CONFIG1(/;"	d
EBI_GENIO1_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO1_CONFIG1_OFFS	/;"	d
EBI_GENIO1_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO1_CONFIG1_OFFS	/;"	d
EBI_GENIO1_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO1_CONFIG1_OFFS	/;"	d
EBI_GENIO1_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO1_CONFIG2(/;"	d
EBI_GENIO1_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO1_CONFIG2(/;"	d
EBI_GENIO1_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO1_CONFIG2(/;"	d
EBI_GENIO1_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO1_CONFIG2_OFFS	/;"	d
EBI_GENIO1_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO1_CONFIG2_OFFS	/;"	d
EBI_GENIO1_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO1_CONFIG2_OFFS	/;"	d
EBI_GENIO1_CONFIG3	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO1_CONFIG3(/;"	d
EBI_GENIO1_CONFIG3	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO1_CONFIG3(/;"	d
EBI_GENIO1_CONFIG3	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO1_CONFIG3(/;"	d
EBI_GENIO1_CONFIG3_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO1_CONFIG3_OFFS	/;"	d
EBI_GENIO1_CONFIG3_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO1_CONFIG3_OFFS	/;"	d
EBI_GENIO1_CONFIG3_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO1_CONFIG3_OFFS	/;"	d
EBI_GENIO2_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO2_CONFIG1(/;"	d
EBI_GENIO2_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO2_CONFIG1(/;"	d
EBI_GENIO2_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO2_CONFIG1(/;"	d
EBI_GENIO2_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO2_CONFIG1_OFFS	/;"	d
EBI_GENIO2_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO2_CONFIG1_OFFS	/;"	d
EBI_GENIO2_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO2_CONFIG1_OFFS	/;"	d
EBI_GENIO2_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO2_CONFIG2(/;"	d
EBI_GENIO2_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO2_CONFIG2(/;"	d
EBI_GENIO2_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO2_CONFIG2(/;"	d
EBI_GENIO2_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO2_CONFIG2_OFFS	/;"	d
EBI_GENIO2_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO2_CONFIG2_OFFS	/;"	d
EBI_GENIO2_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO2_CONFIG2_OFFS	/;"	d
EBI_GENIO2_CONFIG3	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO2_CONFIG3(/;"	d
EBI_GENIO2_CONFIG3	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO2_CONFIG3(/;"	d
EBI_GENIO2_CONFIG3	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO2_CONFIG3(/;"	d
EBI_GENIO2_CONFIG3_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO2_CONFIG3_OFFS	/;"	d
EBI_GENIO2_CONFIG3_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO2_CONFIG3_OFFS	/;"	d
EBI_GENIO2_CONFIG3_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO2_CONFIG3_OFFS	/;"	d
EBI_GENIO3_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO3_CONFIG1(/;"	d
EBI_GENIO3_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO3_CONFIG1(/;"	d
EBI_GENIO3_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO3_CONFIG1(/;"	d
EBI_GENIO3_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO3_CONFIG1_OFFS	/;"	d
EBI_GENIO3_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO3_CONFIG1_OFFS	/;"	d
EBI_GENIO3_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO3_CONFIG1_OFFS	/;"	d
EBI_GENIO3_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO3_CONFIG2(/;"	d
EBI_GENIO3_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO3_CONFIG2(/;"	d
EBI_GENIO3_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO3_CONFIG2(/;"	d
EBI_GENIO3_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO3_CONFIG2_OFFS	/;"	d
EBI_GENIO3_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO3_CONFIG2_OFFS	/;"	d
EBI_GENIO3_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO3_CONFIG2_OFFS	/;"	d
EBI_GENIO3_CONFIG3	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO3_CONFIG3(/;"	d
EBI_GENIO3_CONFIG3	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO3_CONFIG3(/;"	d
EBI_GENIO3_CONFIG3	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO3_CONFIG3(/;"	d
EBI_GENIO3_CONFIG3_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO3_CONFIG3_OFFS	/;"	d
EBI_GENIO3_CONFIG3_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO3_CONFIG3_OFFS	/;"	d
EBI_GENIO3_CONFIG3_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO3_CONFIG3_OFFS	/;"	d
EBI_GENIO4_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO4_CONFIG1(/;"	d
EBI_GENIO4_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO4_CONFIG1(/;"	d
EBI_GENIO4_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO4_CONFIG1(/;"	d
EBI_GENIO4_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO4_CONFIG1_OFFS	/;"	d
EBI_GENIO4_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO4_CONFIG1_OFFS	/;"	d
EBI_GENIO4_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO4_CONFIG1_OFFS	/;"	d
EBI_GENIO4_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO4_CONFIG2(/;"	d
EBI_GENIO4_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO4_CONFIG2(/;"	d
EBI_GENIO4_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO4_CONFIG2(/;"	d
EBI_GENIO4_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO4_CONFIG2_OFFS	/;"	d
EBI_GENIO4_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO4_CONFIG2_OFFS	/;"	d
EBI_GENIO4_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO4_CONFIG2_OFFS	/;"	d
EBI_GENIO4_CONFIG3	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO4_CONFIG3(/;"	d
EBI_GENIO4_CONFIG3	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO4_CONFIG3(/;"	d
EBI_GENIO4_CONFIG3	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO4_CONFIG3(/;"	d
EBI_GENIO4_CONFIG3_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO4_CONFIG3_OFFS	/;"	d
EBI_GENIO4_CONFIG3_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO4_CONFIG3_OFFS	/;"	d
EBI_GENIO4_CONFIG3_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO4_CONFIG3_OFFS	/;"	d
EBI_GENIO5_CONFIG1	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO5_CONFIG1(/;"	d
EBI_GENIO5_CONFIG1	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO5_CONFIG1(/;"	d
EBI_GENIO5_CONFIG1	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO5_CONFIG1(/;"	d
EBI_GENIO5_CONFIG1_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO5_CONFIG1_OFFS	/;"	d
EBI_GENIO5_CONFIG1_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO5_CONFIG1_OFFS	/;"	d
EBI_GENIO5_CONFIG1_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO5_CONFIG1_OFFS	/;"	d
EBI_GENIO5_CONFIG2	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO5_CONFIG2(/;"	d
EBI_GENIO5_CONFIG2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO5_CONFIG2(/;"	d
EBI_GENIO5_CONFIG2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO5_CONFIG2(/;"	d
EBI_GENIO5_CONFIG2_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO5_CONFIG2_OFFS	/;"	d
EBI_GENIO5_CONFIG2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO5_CONFIG2_OFFS	/;"	d
EBI_GENIO5_CONFIG2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO5_CONFIG2_OFFS	/;"	d
EBI_GENIO5_CONFIG3	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO5_CONFIG3(/;"	d
EBI_GENIO5_CONFIG3	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO5_CONFIG3(/;"	d
EBI_GENIO5_CONFIG3	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO5_CONFIG3(/;"	d
EBI_GENIO5_CONFIG3_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GENIO5_CONFIG3_OFFS	/;"	d
EBI_GENIO5_CONFIG3_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GENIO5_CONFIG3_OFFS	/;"	d
EBI_GENIO5_CONFIG3_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GENIO5_CONFIG3_OFFS	/;"	d
EBI_GEN_DMA_CTRL	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GEN_DMA_CTRL(/;"	d
EBI_GEN_DMA_CTRL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GEN_DMA_CTRL(/;"	d
EBI_GEN_DMA_CTRL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GEN_DMA_CTRL(/;"	d
EBI_GEN_DMA_CTRL_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_GEN_DMA_CTRL_OFFS	/;"	d
EBI_GEN_DMA_CTRL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_GEN_DMA_CTRL_OFFS	/;"	d
EBI_GEN_DMA_CTRL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_GEN_DMA_CTRL_OFFS	/;"	d
EBI_INTERLEAVE_CNT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_INTERLEAVE_CNT(/;"	d
EBI_INTERLEAVE_CNT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_INTERLEAVE_CNT(/;"	d
EBI_INTERLEAVE_CNT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_INTERLEAVE_CNT_OFFS	/;"	d
EBI_INTERLEAVE_CNT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_INTERLEAVE_CNT_OFFS	/;"	d
EBI_IO_ACCS2_DATA	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IO_ACCS2_DATA(/;"	d
EBI_IO_ACCS2_DATA	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IO_ACCS2_DATA(/;"	d
EBI_IO_ACCS2_DATA_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IO_ACCS2_DATA_OFFS	/;"	d
EBI_IO_ACCS2_DATA_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IO_ACCS2_DATA_OFFS	/;"	d
EBI_IO_ACCS_DATA	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_IO_ACCS_DATA(/;"	d
EBI_IO_ACCS_DATA	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IO_ACCS_DATA(/;"	d
EBI_IO_ACCS_DATA	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IO_ACCS_DATA(/;"	d
EBI_IO_ACCS_DATA_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_IO_ACCS_DATA_OFFS	/;"	d
EBI_IO_ACCS_DATA_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IO_ACCS_DATA_OFFS	/;"	d
EBI_IO_ACCS_DATA_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IO_ACCS_DATA_OFFS	/;"	d
EBI_IRQ_MASK	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_IRQ_MASK(/;"	d
EBI_IRQ_MASK	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_MASK(/;"	d
EBI_IRQ_MASK	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_MASK(/;"	d
EBI_IRQ_MASK2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_MASK2(/;"	d
EBI_IRQ_MASK2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_MASK2(/;"	d
EBI_IRQ_MASK2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_MASK2_OFFS	/;"	d
EBI_IRQ_MASK2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_MASK2_OFFS	/;"	d
EBI_IRQ_MASK_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_IRQ_MASK_OFFS	/;"	d
EBI_IRQ_MASK_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_MASK_OFFS	/;"	d
EBI_IRQ_MASK_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_MASK_OFFS	/;"	d
EBI_IRQ_STATUS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_IRQ_STATUS(/;"	d
EBI_IRQ_STATUS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_STATUS(/;"	d
EBI_IRQ_STATUS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_STATUS(/;"	d
EBI_IRQ_STATUS2	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_STATUS2(/;"	d
EBI_IRQ_STATUS2	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_STATUS2(/;"	d
EBI_IRQ_STATUS2_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_STATUS2_OFFS	/;"	d
EBI_IRQ_STATUS2_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_STATUS2_OFFS	/;"	d
EBI_IRQ_STATUS_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_IRQ_STATUS_OFFS	/;"	d
EBI_IRQ_STATUS_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_IRQ_STATUS_OFFS	/;"	d
EBI_IRQ_STATUS_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_IRQ_STATUS_OFFS	/;"	d
EBI_LOCK_REG	board/armltd/integrator/arm-ebi.h	/^#define EBI_LOCK_REG	/;"	d
EBI_SDRAM_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SDRAM_BASE	/;"	d
EBI_SDRAM_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SDRAM_SIZE	/;"	d
EBI_SIG_LEVEL	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_SIG_LEVEL(/;"	d
EBI_SIG_LEVEL	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_SIG_LEVEL(/;"	d
EBI_SIG_LEVEL	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_SIG_LEVEL(/;"	d
EBI_SIG_LEVEL_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_SIG_LEVEL_OFFS	/;"	d
EBI_SIG_LEVEL_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_SIG_LEVEL_OFFS	/;"	d
EBI_SIG_LEVEL_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_SIG_LEVEL_OFFS	/;"	d
EBI_SRAM_CS0_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS0_BASE	/;"	d
EBI_SRAM_CS0_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS0_SIZE	/;"	d
EBI_SRAM_CS1_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS1_BASE	/;"	d
EBI_SRAM_CS1_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS1_SIZE	/;"	d
EBI_SRAM_CS2_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS2_BASE	/;"	d
EBI_SRAM_CS2_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS2_SIZE	/;"	d
EBI_SRAM_CS3_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS3_BASE	/;"	d
EBI_SRAM_CS3_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS3_SIZE	/;"	d
EBI_SRAM_CS4_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS4_BASE	/;"	d
EBI_SRAM_CS4_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS4_SIZE	/;"	d
EBI_SRAM_CS5_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS5_BASE	/;"	d
EBI_SRAM_CS5_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define EBI_SRAM_CS5_SIZE	/;"	d
EBI_STATUS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_STATUS(/;"	d
EBI_STATUS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_STATUS(/;"	d
EBI_STATUS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_STATUS(/;"	d
EBI_STATUS_DMA_CNT	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_STATUS_DMA_CNT(/;"	d
EBI_STATUS_DMA_CNT	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_STATUS_DMA_CNT(/;"	d
EBI_STATUS_DMA_CNT	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_STATUS_DMA_CNT(/;"	d
EBI_STATUS_DMA_CNT_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_STATUS_DMA_CNT_OFFS	/;"	d
EBI_STATUS_DMA_CNT_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_STATUS_DMA_CNT_OFFS	/;"	d
EBI_STATUS_DMA_CNT_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_STATUS_DMA_CNT_OFFS	/;"	d
EBI_STATUS_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_STATUS_OFFS	/;"	d
EBI_STATUS_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_STATUS_OFFS	/;"	d
EBI_STATUS_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_STATUS_OFFS	/;"	d
EBI_TAG1_SYS_ID	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG1_SYS_ID(/;"	d
EBI_TAG1_SYS_ID	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG1_SYS_ID(/;"	d
EBI_TAG1_SYS_ID	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG1_SYS_ID(/;"	d
EBI_TAG1_SYS_ID_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG1_SYS_ID_OFFS	/;"	d
EBI_TAG1_SYS_ID_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG1_SYS_ID_OFFS	/;"	d
EBI_TAG1_SYS_ID_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG1_SYS_ID_OFFS	/;"	d
EBI_TAG2_SYS_ID	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG2_SYS_ID(/;"	d
EBI_TAG2_SYS_ID	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG2_SYS_ID(/;"	d
EBI_TAG2_SYS_ID	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG2_SYS_ID(/;"	d
EBI_TAG2_SYS_ID_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG2_SYS_ID_OFFS	/;"	d
EBI_TAG2_SYS_ID_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG2_SYS_ID_OFFS	/;"	d
EBI_TAG2_SYS_ID_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG2_SYS_ID_OFFS	/;"	d
EBI_TAG3_SYS_ID	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG3_SYS_ID(/;"	d
EBI_TAG3_SYS_ID	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG3_SYS_ID(/;"	d
EBI_TAG3_SYS_ID	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG3_SYS_ID(/;"	d
EBI_TAG3_SYS_ID_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG3_SYS_ID_OFFS	/;"	d
EBI_TAG3_SYS_ID_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG3_SYS_ID_OFFS	/;"	d
EBI_TAG3_SYS_ID_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG3_SYS_ID_OFFS	/;"	d
EBI_TAG4_SYS_ID	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG4_SYS_ID(/;"	d
EBI_TAG4_SYS_ID	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG4_SYS_ID(/;"	d
EBI_TAG4_SYS_ID	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG4_SYS_ID(/;"	d
EBI_TAG4_SYS_ID_OFFS	board/micronas/vct/vcth/reg_ebi.h	/^#define EBI_TAG4_SYS_ID_OFFS	/;"	d
EBI_TAG4_SYS_ID_OFFS	board/micronas/vct/vcth2/reg_ebi.h	/^#define EBI_TAG4_SYS_ID_OFFS	/;"	d
EBI_TAG4_SYS_ID_OFFS	board/micronas/vct/vctv/reg_ebi.h	/^#define EBI_TAG4_SYS_ID_OFFS	/;"	d
EBI_UNLOCK_MAGIC	board/armltd/integrator/arm-ebi.h	/^#define EBI_UNLOCK_MAGIC	/;"	d
EBP	arch/x86/include/asm/ptrace.h	/^#define EBP /;"	d
EBSZ_128	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBSZ_128	/;"	d
EBSZ_16	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBSZ_16	/;"	d
EBSZ_256	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBSZ_256	/;"	d
EBSZ_32	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBSZ_32	/;"	d
EBSZ_512	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBSZ_512	/;"	d
EBSZ_64	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBSZ_64	/;"	d
EBUFE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EBUFE	/;"	d
EBUSY	fs/yaffs2/yportenv.h	/^#define EBUSY	/;"	d
EBUSY	include/linux/errno.h	/^#define	EBUSY	/;"	d
EBX	arch/x86/include/asm/ptrace.h	/^#define EBX /;"	d
EC10G_ID_REV_MASK	include/fsl_tgec.h	/^#define EC10G_ID_REV_MASK	/;"	d
EC10G_ID_VER_MASK	include/fsl_tgec.h	/^#define EC10G_ID_VER_MASK	/;"	d
EC10G_ID_VER_SHIFT	include/fsl_tgec.h	/^#define EC10G_ID_VER_SHIFT	/;"	d
ECANCELED	include/linux/errno.h	/^#define	ECANCELED	/;"	d
ECAP_CLK_EN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECAP_CLK_EN	/;"	d
ECAP_CLK_STOP_REQ	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECAP_CLK_STOP_REQ	/;"	d
ECCB01DBCTL0	arch/x86/cpu/quark/smc.h	/^#define ECCB01DBCTL0	/;"	d
ECCB01DBCTL1	arch/x86/cpu/quark/smc.h	/^#define ECCB01DBCTL1	/;"	d
ECCB1DLLPICODER0	arch/x86/cpu/quark/smc.h	/^#define ECCB1DLLPICODER0	/;"	d
ECCB1DLLPICODER1	arch/x86/cpu/quark/smc.h	/^#define ECCB1DLLPICODER1	/;"	d
ECCB1DLLPICODER2	arch/x86/cpu/quark/smc.h	/^#define ECCB1DLLPICODER2	/;"	d
ECCB1DLLPICODER3	arch/x86/cpu/quark/smc.h	/^#define ECCB1DLLPICODER3	/;"	d
ECCCLEAR	drivers/mtd/nand/omap_gpmc.c	/^#define ECCCLEAR	/;"	d	file:
ECCCLKALIGNREG0	arch/x86/cpu/quark/smc.h	/^#define ECCCLKALIGNREG0	/;"	d
ECCCLKALIGNREG1	arch/x86/cpu/quark/smc.h	/^#define ECCCLKALIGNREG1	/;"	d
ECCCLKALIGNREG2	arch/x86/cpu/quark/smc.h	/^#define ECCCLKALIGNREG2	/;"	d
ECCDLLRXCTL	arch/x86/cpu/quark/smc.h	/^#define ECCDLLRXCTL	/;"	d
ECCDLLTXCTL	arch/x86/cpu/quark/smc.h	/^#define ECCDLLTXCTL	/;"	d
ECCGETLAYOUT	include/mtd/mtd-abi.h	/^#define ECCGETLAYOUT	/;"	d
ECCGETSTATS	include/mtd/mtd-abi.h	/^#define ECCGETSTATS	/;"	d
ECCMDLLCTL	arch/x86/cpu/quark/smc.h	/^#define ECCMDLLCTL	/;"	d
ECCRESULTREG1	drivers/mtd/nand/omap_gpmc.c	/^#define ECCRESULTREG1	/;"	d	file:
ECCSTEPS	drivers/mtd/nand/am335x_spl_bch.c	/^#define ECCSTEPS	/;"	d	file:
ECCSTEPS	drivers/mtd/nand/atmel_nand.c	/^#define ECCSTEPS /;"	d	file:
ECCSTEPS	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define ECCSTEPS	/;"	d	file:
ECCSTEPS	drivers/mtd/nand/nand_spl_simple.c	/^#define ECCSTEPS	/;"	d	file:
ECCTOTAL	drivers/mtd/nand/am335x_spl_bch.c	/^#define ECCTOTAL	/;"	d	file:
ECCTOTAL	drivers/mtd/nand/atmel_nand.c	/^#define ECCTOTAL /;"	d	file:
ECCTOTAL	drivers/mtd/nand/nand_spl_simple.c	/^#define ECCTOTAL	/;"	d	file:
ECC_45_BYTE	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_45_BYTE	/;"	d	file:
ECC_60_BYTE	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_60_BYTE	/;"	d	file:
ECC_BIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define ECC_BIT /;"	d
ECC_BYPASS	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_BYPASS	/;"	d	file:
ECC_CAPT_ATTR_BNUM	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_BNUM	/;"	d
ECC_CAPT_ATTR_BNUM_SHIFT	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_BNUM_SHIFT	/;"	d
ECC_CAPT_ATTR_TSIZ	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSIZ	/;"	d
ECC_CAPT_ATTR_TSIZ_FOUR_DW	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSIZ_FOUR_DW	/;"	d
ECC_CAPT_ATTR_TSIZ_ONE_DW	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSIZ_ONE_DW	/;"	d
ECC_CAPT_ATTR_TSIZ_SHIFT	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSIZ_SHIFT	/;"	d
ECC_CAPT_ATTR_TSIZ_THREE_DW	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSIZ_THREE_DW	/;"	d
ECC_CAPT_ATTR_TSIZ_TWO_DW	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSIZ_TWO_DW	/;"	d
ECC_CAPT_ATTR_TSRC	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC	/;"	d
ECC_CAPT_ATTR_TSRC_DMA	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_DMA	/;"	d
ECC_CAPT_ATTR_TSRC_E300_CORE_DT	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_E300_CORE_DT	/;"	d
ECC_CAPT_ATTR_TSRC_E300_CORE_IF	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_E300_CORE_IF	/;"	d
ECC_CAPT_ATTR_TSRC_ENCRYPT	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_ENCRYPT	/;"	d
ECC_CAPT_ATTR_TSRC_I2C	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_I2C	/;"	d
ECC_CAPT_ATTR_TSRC_JTAG	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_JTAG	/;"	d
ECC_CAPT_ATTR_TSRC_PCI1	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_PCI1	/;"	d
ECC_CAPT_ATTR_TSRC_PCI2	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_PCI2	/;"	d
ECC_CAPT_ATTR_TSRC_SHIFT	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_SHIFT	/;"	d
ECC_CAPT_ATTR_TSRC_TSEC1	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_TSEC1	/;"	d
ECC_CAPT_ATTR_TSRC_TSEC2	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_TSEC2	/;"	d
ECC_CAPT_ATTR_TSRC_USB	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TSRC_USB	/;"	d
ECC_CAPT_ATTR_TTYP	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TTYP	/;"	d
ECC_CAPT_ATTR_TTYP_READ	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TTYP_READ	/;"	d
ECC_CAPT_ATTR_TTYP_R_M_W	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TTYP_R_M_W	/;"	d
ECC_CAPT_ATTR_TTYP_SHIFT	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TTYP_SHIFT	/;"	d
ECC_CAPT_ATTR_TTYP_WRITE	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_TTYP_WRITE	/;"	d
ECC_CAPT_ATTR_VLD	include/mpc83xx.h	/^#define ECC_CAPT_ATTR_VLD	/;"	d
ECC_CORRECTION	drivers/mtd/nand/denali.h	/^#define ECC_CORRECTION	/;"	d
ECC_CORRECTION__VALUE	drivers/mtd/nand/denali.h	/^#define     ECC_CORRECTION__VALUE	/;"	d
ECC_DATA_ERROR	drivers/mtd/nand/tegra_nand.c	/^	ECC_DATA_ERROR = 1 << 1$/;"	e	enum:__anonf17bc69b0103	file:
ECC_EN	drivers/ddr/microchip/ddr2_regs.h	/^#define ECC_EN(/;"	d
ECC_ENABLE	drivers/mtd/nand/denali.h	/^#define ECC_ENABLE	/;"	d
ECC_ENABLE_SELECT	drivers/mtd/nand/denali.h	/^#define ECC_ENABLE_SELECT /;"	d
ECC_ENABLE__FLAG	drivers/mtd/nand/denali.h	/^#define     ECC_ENABLE__FLAG	/;"	d
ECC_END_ADDR1	arch/arm/mach-keystone/cmd_ddr3.c	/^#define ECC_END_ADDR1	/;"	d	file:
ECC_ERROR_ADDRESS	drivers/mtd/nand/denali.h	/^#define ECC_ERROR_ADDRESS	/;"	d
ECC_ERROR_ADDRESS__OFFSET	drivers/mtd/nand/denali.h	/^#define     ECC_ERROR_ADDRESS__OFFSET	/;"	d
ECC_ERROR_ADDRESS__SECTOR_NR	drivers/mtd/nand/denali.h	/^#define     ECC_ERROR_ADDRESS__SECTOR_NR	/;"	d
ECC_ERROR_BLOCK_ADDRESS	drivers/mtd/nand/denali.h	/^#define ECC_ERROR_BLOCK_ADDRESS	/;"	d
ECC_ERROR_BLOCK_ADDRESS__VALUE	drivers/mtd/nand/denali.h	/^#define     ECC_ERROR_BLOCK_ADDRESS__VALUE	/;"	d
ECC_ERROR_DETECT_MBE	include/mpc83xx.h	/^#define ECC_ERROR_DETECT_MBE	/;"	d
ECC_ERROR_DETECT_MME	include/mpc83xx.h	/^#define ECC_ERROR_DETECT_MME	/;"	d
ECC_ERROR_DETECT_MSE	include/mpc83xx.h	/^#define ECC_ERROR_DETECT_MSE	/;"	d
ECC_ERROR_DETECT_SBE	include/mpc83xx.h	/^#define ECC_ERROR_DETECT_SBE	/;"	d
ECC_ERROR_DISABLE_MBED	include/mpc83xx.h	/^#define ECC_ERROR_DISABLE_MBED	/;"	d
ECC_ERROR_DISABLE_MSED	include/mpc83xx.h	/^#define ECC_ERROR_DISABLE_MSED	/;"	d
ECC_ERROR_DISABLE_SBED	include/mpc83xx.h	/^#define ECC_ERROR_DISABLE_SBED	/;"	d
ECC_ERROR_ENABLE	include/mpc83xx.h	/^#define ECC_ERROR_ENABLE	/;"	d
ECC_ERROR_MAN_SBEC	include/mpc83xx.h	/^#define ECC_ERROR_MAN_SBEC	/;"	d
ECC_ERROR_MAN_SBEC_SHIFT	include/mpc83xx.h	/^#define ECC_ERROR_MAN_SBEC_SHIFT	/;"	d
ECC_ERROR_MAN_SBET	include/mpc83xx.h	/^#define ECC_ERROR_MAN_SBET	/;"	d
ECC_ERROR_MAN_SBET_SHIFT	include/mpc83xx.h	/^#define ECC_ERROR_MAN_SBET_SHIFT	/;"	d
ECC_ERROR_PAGE_ADDRESS	drivers/mtd/nand/denali.h	/^#define ECC_ERROR_PAGE_ADDRESS	/;"	d
ECC_ERROR_PAGE_ADDRESS__BANK	drivers/mtd/nand/denali.h	/^#define     ECC_ERROR_PAGE_ADDRESS__BANK	/;"	d
ECC_ERROR_PAGE_ADDRESS__VALUE	drivers/mtd/nand/denali.h	/^#define     ECC_ERROR_PAGE_ADDRESS__VALUE	/;"	d
ECC_ERR_INJECT_EEIM	include/mpc83xx.h	/^#define ECC_ERR_INJECT_EEIM	/;"	d
ECC_ERR_INJECT_EEIM_SHIFT	include/mpc83xx.h	/^#define ECC_ERR_INJECT_EEIM_SHIFT	/;"	d
ECC_ERR_INJECT_EIEN	include/mpc83xx.h	/^#define ECC_ERR_INJECT_EIEN	/;"	d
ECC_ERR_INJECT_EMB	include/mpc83xx.h	/^#define ECC_ERR_INJECT_EMB	/;"	d
ECC_ERR_INT_DISABLE	include/mpc83xx.h	/^#define ECC_ERR_INT_DISABLE	/;"	d
ECC_ERR_INT_EN_MBEE	include/mpc83xx.h	/^#define ECC_ERR_INT_EN_MBEE	/;"	d
ECC_ERR_INT_EN_MSEE	include/mpc83xx.h	/^#define ECC_ERR_INT_EN_MSEE	/;"	d
ECC_ERR_INT_EN_SBEE	include/mpc83xx.h	/^#define ECC_ERR_INT_EN_SBEE	/;"	d
ECC_HW	drivers/mtd/nand/bfin_nand.c	/^# define ECC_HW /;"	d	file:
ECC_HW_MODE	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_HW_MODE /;"	d	file:
ECC_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define ECC_MASK /;"	d
ECC_MASK	arch/mips/mach-pic32/cpu.c	/^#define ECC_MASK	/;"	d	file:
ECC_OK	drivers/mtd/nand/tegra_nand.c	/^	ECC_OK,$/;"	e	enum:__anonf17bc69b0103	file:
ECC_PATTERN	post/cpu/ppc4xx/denali_ecc.c	/^#define ECC_PATTERN	/;"	d	file:
ECC_PATTERN_CORR	post/cpu/ppc4xx/denali_ecc.c	/^#define ECC_PATTERN_CORR	/;"	d	file:
ECC_PATTERN_UNCORR	post/cpu/ppc4xx/denali_ecc.c	/^#define ECC_PATTERN_UNCORR	/;"	d	file:
ECC_PTR_0	drivers/mtd/nand/tegra_nand.h	/^#define ECC_PTR_0	/;"	d
ECC_PUP	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define ECC_PUP /;"	d
ECC_SECTOR_SIZE	drivers/mtd/nand/denali.h	/^#define ECC_SECTOR_SIZE /;"	d
ECC_SHIFT	arch/mips/mach-pic32/cpu.c	/^#define ECC_SHIFT	/;"	d	file:
ECC_SRAM_ADDR	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_SRAM_ADDR	/;"	d	file:
ECC_START_ADDR	post/cpu/ppc4xx/denali_ecc.c	/^#define ECC_START_ADDR	/;"	d	file:
ECC_START_ADDR1	arch/arm/mach-keystone/cmd_ddr3.c	/^#define ECC_START_ADDR1	/;"	d	file:
ECC_STATE_ERR_CORR_COMP_N	drivers/mtd/nand/davinci_nand.c	/^#define ECC_STATE_ERR_CORR_COMP_N	/;"	d	file:
ECC_STATE_ERR_CORR_COMP_P	drivers/mtd/nand/davinci_nand.c	/^#define ECC_STATE_ERR_CORR_COMP_P	/;"	d	file:
ECC_STATE_NO_ERR	drivers/mtd/nand/davinci_nand.c	/^#define ECC_STATE_NO_ERR	/;"	d	file:
ECC_STATE_TOO_MANY_ERRS	drivers/mtd/nand/davinci_nand.c	/^#define ECC_STATE_TOO_MANY_ERRS	/;"	d	file:
ECC_STATUS	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_STATUS	/;"	d	file:
ECC_STATUS_ERR_COUNT	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_STATUS_ERR_COUNT	/;"	d	file:
ECC_STATUS_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define ECC_STATUS_MASK	/;"	d	file:
ECC_STOP_ADDR	post/cpu/ppc4xx/denali_ecc.c	/^#define ECC_STOP_ADDR	/;"	d	file:
ECC_SUPPORT	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define ECC_SUPPORT$/;"	d
ECC_SUPPORT	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ECC_SUPPORT$/;"	d
ECC_TAG_ERROR	drivers/mtd/nand/tegra_nand.c	/^	ECC_TAG_ERROR = 1 << 0,$/;"	e	enum:__anonf17bc69b0103	file:
ECC_THRESHOLD	drivers/mtd/nand/denali.h	/^#define ECC_THRESHOLD	/;"	d
ECC_THRESHOLD__VALUE	drivers/mtd/nand/denali.h	/^#define     ECC_THRESHOLD__VALUE	/;"	d
ECD_ECDEN_A	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_ECDEN_A:	.long	0xffc1012c$/;"	l
ECD_ECDEN_D	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_ECDEN_D:	.long	0x00000001$/;"	l
ECD_INTSR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_INTSR_A:	.long	0xfe900024$/;"	l
ECD_INTSR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_INTSR_D:	.long	0xffffffff$/;"	l
ECD_MCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_MCR_A:	.long	0xfe900010$/;"	l
ECD_MCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_MCR_D:	.long	0x00000001$/;"	l
ECD_SPACER_A	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_SPACER_A:	.long	0xfe900018$/;"	l
ECD_SPACER_D	board/renesas/sh7757lcr/lowlevel_init.S	/^ECD_SPACER_D:	.long	SH7757LCR_SDRAM_ECC_SETTING$/;"	l
ECHILD	include/linux/errno.h	/^#define	ECHILD	/;"	d
ECHO	scripts/kconfig/zconf.lex.c	/^#define ECHO /;"	d	file:
ECHRNG	include/linux/errno.h	/^#define	ECHRNG	/;"	d
ECMR	drivers/net/sh_eth.h	/^	ECMR,$/;"	e	enum:__anon5ef54f5a0103
ECMR_CHG_DM	drivers/net/sh_eth.h	/^#define ECMR_CHG_DM	/;"	d
ECMR_CHG_DM	drivers/net/sh_eth.h	/^#define ECMR_CHG_DM /;"	d
ECMR_DM	drivers/net/sh_eth.h	/^	ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002,$/;"	e	enum:FELIC_MODE_BIT
ECMR_DPAD	drivers/net/sh_eth.h	/^	ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_ELB	drivers/net/sh_eth.h	/^	ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002,$/;"	e	enum:FELIC_MODE_BIT
ECMR_ILB	drivers/net/sh_eth.h	/^	ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002,$/;"	e	enum:FELIC_MODE_BIT
ECMR_MCT	drivers/net/sh_eth.h	/^	ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_PFR	drivers/net/sh_eth.h	/^	ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_PMDE	drivers/net/sh_eth.h	/^	ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020,$/;"	e	enum:FELIC_MODE_BIT
ECMR_PRCEF	drivers/net/sh_eth.h	/^	ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_PRM	drivers/net/sh_eth.h	/^	ECMR_PRM = 0x00000001,$/;"	e	enum:FELIC_MODE_BIT
ECMR_RCSC	drivers/net/sh_eth.h	/^	ECMR_TRCCM = 0x04000000, ECMR_RCSC = 0x00800000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_RE	drivers/net/sh_eth.h	/^	ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020,$/;"	e	enum:FELIC_MODE_BIT
ECMR_RTM	drivers/net/sh_eth.h	/^	ECMR_RTM = 0x00000010,$/;"	e	enum:FELIC_MODE_BIT
ECMR_RXF	drivers/net/sh_eth.h	/^	ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_RZPF	drivers/net/sh_eth.h	/^	ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_TE	drivers/net/sh_eth.h	/^	ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020,$/;"	e	enum:FELIC_MODE_BIT
ECMR_TRCCM	drivers/net/sh_eth.h	/^	ECMR_TRCCM = 0x04000000, ECMR_RCSC = 0x00800000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_TXF	drivers/net/sh_eth.h	/^	ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000,$/;"	e	enum:FELIC_MODE_BIT
ECMR_ZPF	drivers/net/sh_eth.h	/^	ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000,$/;"	e	enum:FELIC_MODE_BIT
ECM_ALDPS	drivers/usb/eth/r8152.h	/^#define ECM_ALDPS	/;"	d
ECNTRL_AUTOZ	include/fsl_dtsec.h	/^#define ECNTRL_AUTOZ	/;"	d
ECNTRL_CFG_RO	include/fsl_dtsec.h	/^#define ECNTRL_CFG_RO	/;"	d
ECNTRL_CLRCNT	include/fsl_dtsec.h	/^#define ECNTRL_CLRCNT	/;"	d
ECNTRL_DEFAULT	include/fsl_dtsec.h	/^#define ECNTRL_DEFAULT	/;"	d
ECNTRL_GMIIM	include/fsl_dtsec.h	/^#define ECNTRL_GMIIM	/;"	d
ECNTRL_INIT_SETTINGS	include/tsec.h	/^#define ECNTRL_INIT_SETTINGS	/;"	d
ECNTRL_R100	include/tsec.h	/^#define ECNTRL_R100	/;"	d
ECNTRL_R100M	include/fsl_dtsec.h	/^#define ECNTRL_R100M	/;"	d
ECNTRL_REDUCED_MII_MODE	include/tsec.h	/^#define ECNTRL_REDUCED_MII_MODE	/;"	d
ECNTRL_REDUCED_MODE	include/tsec.h	/^#define ECNTRL_REDUCED_MODE	/;"	d
ECNTRL_RPM	include/fsl_dtsec.h	/^#define ECNTRL_RPM	/;"	d
ECNTRL_SGMIIM	include/fsl_dtsec.h	/^#define ECNTRL_SGMIIM	/;"	d
ECNTRL_SGMII_MODE	include/tsec.h	/^#define ECNTRL_SGMII_MODE	/;"	d
ECNTRL_STEN	include/fsl_dtsec.h	/^#define ECNTRL_STEN	/;"	d
ECNTRL_TBIM	include/fsl_dtsec.h	/^#define ECNTRL_TBIM	/;"	d
ECNTRL_TBI_MODE	include/tsec.h	/^#define ECNTRL_TBI_MODE	/;"	d
ECOMM	include/linux/errno.h	/^#define	ECOMM	/;"	d
ECONNABORTED	include/linux/errno.h	/^#define	ECONNABORTED	/;"	d
ECONNREFUSED	include/linux/errno.h	/^#define	ECONNREFUSED	/;"	d
ECONNRESET	include/linux/errno.h	/^#define	ECONNRESET	/;"	d
ECONSTRJDESC	include/fsl_sec.h	/^#define ECONSTRJDESC /;"	d
ECR_ADDR_ALIGN_R	arch/avr32/include/asm/sysreg.h	/^#define ECR_ADDR_ALIGN_R	/;"	d
ECR_ADDR_ALIGN_W	arch/avr32/include/asm/sysreg.h	/^#define ECR_ADDR_ALIGN_W	/;"	d
ECR_ADDR_ALIGN_X	arch/avr32/include/asm/sysreg.h	/^#define ECR_ADDR_ALIGN_X	/;"	d
ECR_BUS_ERROR_READ	arch/avr32/include/asm/sysreg.h	/^#define ECR_BUS_ERROR_READ	/;"	d
ECR_BUS_ERROR_WRITE	arch/avr32/include/asm/sysreg.h	/^#define ECR_BUS_ERROR_WRITE	/;"	d
ECR_COPROC_ABSENT	arch/avr32/include/asm/sysreg.h	/^#define ECR_COPROC_ABSENT	/;"	d
ECR_DEBUG	arch/avr32/include/asm/sysreg.h	/^#define ECR_DEBUG	/;"	d
ECR_DTLB_MODIFIED	arch/avr32/include/asm/sysreg.h	/^#define ECR_DTLB_MODIFIED	/;"	d
ECR_FPE	arch/avr32/include/asm/sysreg.h	/^#define ECR_FPE	/;"	d
ECR_ILLEGAL_OPCODE	arch/avr32/include/asm/sysreg.h	/^#define ECR_ILLEGAL_OPCODE	/;"	d
ECR_NMI	arch/avr32/include/asm/sysreg.h	/^#define ECR_NMI	/;"	d
ECR_PRIVILEGE_VIOLATION	arch/avr32/include/asm/sysreg.h	/^#define ECR_PRIVILEGE_VIOLATION	/;"	d
ECR_PROTECTION_R	arch/avr32/include/asm/sysreg.h	/^#define ECR_PROTECTION_R	/;"	d
ECR_PROTECTION_W	arch/avr32/include/asm/sysreg.h	/^#define ECR_PROTECTION_W	/;"	d
ECR_PROTECTION_X	arch/avr32/include/asm/sysreg.h	/^#define ECR_PROTECTION_X	/;"	d
ECR_TLB_MISS_R	arch/avr32/include/asm/sysreg.h	/^#define ECR_TLB_MISS_R	/;"	d
ECR_TLB_MISS_W	arch/avr32/include/asm/sysreg.h	/^#define ECR_TLB_MISS_W	/;"	d
ECR_TLB_MISS_X	arch/avr32/include/asm/sysreg.h	/^#define ECR_TLB_MISS_X	/;"	d
ECR_TLB_MULTIPLE	arch/avr32/include/asm/sysreg.h	/^#define ECR_TLB_MULTIPLE	/;"	d
ECR_UNIMPL_INSTRUCTION	arch/avr32/include/asm/sysreg.h	/^#define ECR_UNIMPL_INSTRUCTION	/;"	d
ECR_UNRECOVERABLE	arch/avr32/include/asm/sysreg.h	/^#define ECR_UNRECOVERABLE	/;"	d
ECSIPR	drivers/net/sh_eth.h	/^	ECSIPR,$/;"	e	enum:__anon5ef54f5a0103
ECSIPR_BRCRXIP	drivers/net/sh_eth.h	/^	ECSIPR_BRCRXIP = 0x20,$/;"	e	enum:ECSIPR_STATUS_MASK_BIT
ECSIPR_ICDIP	drivers/net/sh_eth.h	/^	ECSIPR_ICDIP = 0x01,$/;"	e	enum:ECSIPR_STATUS_MASK_BIT
ECSIPR_INIT	drivers/net/sh_eth.h	/^# define ECSIPR_INIT /;"	d
ECSIPR_LCHNGIP	drivers/net/sh_eth.h	/^	ECSIPR_LCHNGIP = 0x04,$/;"	e	enum:ECSIPR_STATUS_MASK_BIT
ECSIPR_MPDIP	drivers/net/sh_eth.h	/^	ECSIPR_MPDIP = 0x02,$/;"	e	enum:ECSIPR_STATUS_MASK_BIT
ECSIPR_PSRTOIP	drivers/net/sh_eth.h	/^	ECSIPR_PSRTOIP = 0x10,$/;"	e	enum:ECSIPR_STATUS_MASK_BIT
ECSIPR_STATUS_MASK_BIT	drivers/net/sh_eth.h	/^enum ECSIPR_STATUS_MASK_BIT {$/;"	g
ECSPI1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ECSPI1_BASE_ADDR /;"	d
ECSPI1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ECSPI1_BASE_ADDR /;"	d
ECSPI1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ECSPI1_CLK_ROOT = 102,$/;"	e	enum:clk_root_index
ECSPI1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
ECSPI1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ECSPI1_CS0	board/aristainetos/aristainetos-v2.c	/^	#define ECSPI1_CS0	/;"	d	file:
ECSPI1_CS1	board/aristainetos/aristainetos-v2.c	/^	#define ECSPI1_CS1	/;"	d	file:
ECSPI1_PAD_CLK	board/barco/platinum/platinum.h	/^#define ECSPI1_PAD_CLK	/;"	d
ECSPI2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ECSPI2_BASE_ADDR /;"	d
ECSPI2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ECSPI2_BASE_ADDR /;"	d
ECSPI2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ECSPI2_CLK_ROOT = 103,$/;"	e	enum:clk_root_index
ECSPI2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
ECSPI2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ECSPI2_PAD_CLK	board/barco/platinum/platinum.h	/^#define ECSPI2_PAD_CLK	/;"	d
ECSPI3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ECSPI3_BASE_ADDR /;"	d
ECSPI3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ECSPI3_BASE_ADDR /;"	d
ECSPI3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ECSPI3_CLK_ROOT = 104,$/;"	e	enum:clk_root_index
ECSPI3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
ECSPI3_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI3_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ECSPI4_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ECSPI4_BASE_ADDR /;"	d
ECSPI4_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ECSPI4_BASE_ADDR /;"	d
ECSPI4_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ECSPI4_CLK_ROOT = 105,$/;"	e	enum:clk_root_index
ECSPI4_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
ECSPI4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ECSPI4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
ECSPI4_CS0	board/aristainetos/aristainetos-v2.c	/^	#define ECSPI4_CS0	/;"	d	file:
ECSPI4_CS1	board/aristainetos/aristainetos.c	/^#define ECSPI4_CS1	/;"	d	file:
ECSPI5_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ECSPI5_BASE_ADDR /;"	d
ECSPI_PAD_CTRL	board/compulab/cm_fx6/common.c	/^#define ECSPI_PAD_CTRL /;"	d	file:
ECSPI_PAD_MISO	board/barco/platinum/platinum.h	/^#define ECSPI_PAD_MISO	/;"	d
ECSPI_PAD_MOSI	board/barco/platinum/platinum.h	/^#define ECSPI_PAD_MOSI	/;"	d
ECSPI_PAD_SS	board/barco/platinum/platinum.h	/^#define ECSPI_PAD_SS	/;"	d
ECSR	drivers/net/sh_eth.h	/^	ECSR,$/;"	e	enum:__anon5ef54f5a0103
ECSR_BRCRX	drivers/net/sh_eth.h	/^	ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10,$/;"	e	enum:ECSR_STATUS_BIT
ECSR_ICD	drivers/net/sh_eth.h	/^	ECSR_MPD = 0x02, ECSR_ICD = 0x01,$/;"	e	enum:ECSR_STATUS_BIT
ECSR_INIT	drivers/net/sh_eth.h	/^# define ECSR_INIT /;"	d
ECSR_LCHNG	drivers/net/sh_eth.h	/^	ECSR_LCHNG = 0x04,$/;"	e	enum:ECSR_STATUS_BIT
ECSR_MPD	drivers/net/sh_eth.h	/^	ECSR_MPD = 0x02, ECSR_ICD = 0x01,$/;"	e	enum:ECSR_STATUS_BIT
ECSR_PSRTO	drivers/net/sh_eth.h	/^	ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10,$/;"	e	enum:ECSR_STATUS_BIT
ECSR_STATUS_BIT	drivers/net/sh_eth.h	/^enum ECSR_STATUS_BIT {$/;"	g
ECTRL2_CTRSTP_FREERUN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECTRL2_CTRSTP_FREERUN	/;"	d
ECTRL2_MDSL_ECAP	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECTRL2_MDSL_ECAP	/;"	d
ECTRL2_PLSL_LOW	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECTRL2_PLSL_LOW	/;"	d
ECTRL2_SYNCOSEL_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECTRL2_SYNCOSEL_MASK	/;"	d
ECTRL2_SYNC_EN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define ECTRL2_SYNC_EN	/;"	d
ECX	arch/x86/include/asm/ptrace.h	/^#define ECX /;"	d
EC_ACPI_MEM_KEYBOARD_BACKLIGHT	include/ec_commands.h	/^#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT /;"	d
EC_ACPI_MEM_TEST	include/ec_commands.h	/^#define EC_ACPI_MEM_TEST /;"	d
EC_ACPI_MEM_TEST_COMPLIMENT	include/ec_commands.h	/^#define EC_ACPI_MEM_TEST_COMPLIMENT /;"	d
EC_ACPI_MEM_VERSION	include/ec_commands.h	/^#define EC_ACPI_MEM_VERSION /;"	d
EC_ACPI_MEM_VERSION_CURRENT	include/ec_commands.h	/^#define EC_ACPI_MEM_VERSION_CURRENT /;"	d
EC_BATT_FLAG_AC_PRESENT	include/ec_commands.h	/^#define EC_BATT_FLAG_AC_PRESENT /;"	d
EC_BATT_FLAG_BATT_PRESENT	include/ec_commands.h	/^#define EC_BATT_FLAG_BATT_PRESENT /;"	d
EC_BATT_FLAG_CHARGING	include/ec_commands.h	/^#define EC_BATT_FLAG_CHARGING /;"	d
EC_BATT_FLAG_DISCHARGING	include/ec_commands.h	/^#define EC_BATT_FLAG_DISCHARGING /;"	d
EC_BATT_FLAG_LEVEL_CRITICAL	include/ec_commands.h	/^#define EC_BATT_FLAG_LEVEL_CRITICAL /;"	d
EC_CMD_ACPI_QUERY_EVENT	include/ec_commands.h	/^#define EC_CMD_ACPI_QUERY_EVENT /;"	d
EC_CMD_ACPI_READ	include/ec_commands.h	/^#define EC_CMD_ACPI_READ /;"	d
EC_CMD_ACPI_WRITE	include/ec_commands.h	/^#define EC_CMD_ACPI_WRITE /;"	d
EC_CMD_BATTERY_CUT_OFF	include/ec_commands.h	/^#define EC_CMD_BATTERY_CUT_OFF /;"	d
EC_CMD_CHARGE_CURRENT_LIMIT	include/ec_commands.h	/^#define EC_CMD_CHARGE_CURRENT_LIMIT /;"	d
EC_CMD_CHARGE_DUMP	include/ec_commands.h	/^#define EC_CMD_CHARGE_DUMP /;"	d
EC_CMD_CHARGE_FORCE_IDLE	include/ec_commands.h	/^#define EC_CMD_CHARGE_FORCE_IDLE /;"	d
EC_CMD_CONSOLE_READ	include/ec_commands.h	/^#define EC_CMD_CONSOLE_READ /;"	d
EC_CMD_CONSOLE_SNAPSHOT	include/ec_commands.h	/^#define EC_CMD_CONSOLE_SNAPSHOT /;"	d
EC_CMD_ENTERING_MODE	include/ec_commands.h	/^#define EC_CMD_ENTERING_MODE /;"	d
EC_CMD_EXT_POWER_CURRENT_LIMIT	include/ec_commands.h	/^#define EC_CMD_EXT_POWER_CURRENT_LIMIT /;"	d
EC_CMD_FLASH_ERASE	include/ec_commands.h	/^#define EC_CMD_FLASH_ERASE /;"	d
EC_CMD_FLASH_INFO	include/ec_commands.h	/^#define EC_CMD_FLASH_INFO /;"	d
EC_CMD_FLASH_PROTECT	include/ec_commands.h	/^#define EC_CMD_FLASH_PROTECT /;"	d
EC_CMD_FLASH_READ	include/ec_commands.h	/^#define EC_CMD_FLASH_READ /;"	d
EC_CMD_FLASH_REGION_INFO	include/ec_commands.h	/^#define EC_CMD_FLASH_REGION_INFO /;"	d
EC_CMD_FLASH_WRITE	include/ec_commands.h	/^#define EC_CMD_FLASH_WRITE /;"	d
EC_CMD_GET_BOARD_VERSION	include/ec_commands.h	/^#define EC_CMD_GET_BOARD_VERSION /;"	d
EC_CMD_GET_BUILD_INFO	include/ec_commands.h	/^#define EC_CMD_GET_BUILD_INFO /;"	d
EC_CMD_GET_CHIP_INFO	include/ec_commands.h	/^#define EC_CMD_GET_CHIP_INFO /;"	d
EC_CMD_GET_CMD_VERSIONS	include/ec_commands.h	/^#define EC_CMD_GET_CMD_VERSIONS /;"	d
EC_CMD_GET_COMMS_STATUS	include/ec_commands.h	/^#define EC_CMD_GET_COMMS_STATUS	/;"	d
EC_CMD_GET_PANIC_INFO	include/ec_commands.h	/^#define EC_CMD_GET_PANIC_INFO /;"	d
EC_CMD_GET_PROTOCOL_INFO	include/ec_commands.h	/^#define EC_CMD_GET_PROTOCOL_INFO	/;"	d
EC_CMD_GET_VERSION	include/ec_commands.h	/^#define EC_CMD_GET_VERSION /;"	d
EC_CMD_GPIO_GET	include/ec_commands.h	/^#define EC_CMD_GPIO_GET /;"	d
EC_CMD_GPIO_SET	include/ec_commands.h	/^#define EC_CMD_GPIO_SET /;"	d
EC_CMD_HELLO	include/ec_commands.h	/^#define EC_CMD_HELLO /;"	d
EC_CMD_HOST_EVENT_CLEAR	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_CLEAR /;"	d
EC_CMD_HOST_EVENT_CLEAR_B	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_CLEAR_B /;"	d
EC_CMD_HOST_EVENT_GET_B	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_GET_B /;"	d
EC_CMD_HOST_EVENT_GET_SCI_MASK	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_GET_SCI_MASK /;"	d
EC_CMD_HOST_EVENT_GET_SMI_MASK	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_GET_SMI_MASK /;"	d
EC_CMD_HOST_EVENT_GET_WAKE_MASK	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_GET_WAKE_MASK /;"	d
EC_CMD_HOST_EVENT_SET_SCI_MASK	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_SET_SCI_MASK /;"	d
EC_CMD_HOST_EVENT_SET_SMI_MASK	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_SET_SMI_MASK /;"	d
EC_CMD_HOST_EVENT_SET_WAKE_MASK	include/ec_commands.h	/^#define EC_CMD_HOST_EVENT_SET_WAKE_MASK /;"	d
EC_CMD_I2C_PASSTHRU	include/ec_commands.h	/^#define EC_CMD_I2C_PASSTHRU /;"	d
EC_CMD_I2C_READ	include/ec_commands.h	/^#define EC_CMD_I2C_READ /;"	d
EC_CMD_I2C_WRITE	include/ec_commands.h	/^#define EC_CMD_I2C_WRITE /;"	d
EC_CMD_KEYSCAN_SEQ_CTRL	include/ec_commands.h	/^#define EC_CMD_KEYSCAN_SEQ_CTRL /;"	d
EC_CMD_LDO_GET	include/ec_commands.h	/^#define EC_CMD_LDO_GET /;"	d
EC_CMD_LDO_SET	include/ec_commands.h	/^#define EC_CMD_LDO_SET /;"	d
EC_CMD_LED_CONTROL	include/ec_commands.h	/^#define EC_CMD_LED_CONTROL /;"	d
EC_CMD_LIGHTBAR_CMD	include/ec_commands.h	/^#define EC_CMD_LIGHTBAR_CMD /;"	d
EC_CMD_MKBP_GET_CONFIG	include/ec_commands.h	/^#define EC_CMD_MKBP_GET_CONFIG /;"	d
EC_CMD_MKBP_INFO	include/ec_commands.h	/^#define EC_CMD_MKBP_INFO /;"	d
EC_CMD_MKBP_SET_CONFIG	include/ec_commands.h	/^#define EC_CMD_MKBP_SET_CONFIG /;"	d
EC_CMD_MKBP_SIMULATE_KEY	include/ec_commands.h	/^#define EC_CMD_MKBP_SIMULATE_KEY /;"	d
EC_CMD_MKBP_STATE	include/ec_commands.h	/^#define EC_CMD_MKBP_STATE /;"	d
EC_CMD_PORT80_LAST_BOOT	include/ec_commands.h	/^#define EC_CMD_PORT80_LAST_BOOT /;"	d
EC_CMD_POWER_INFO	include/ec_commands.h	/^#define EC_CMD_POWER_INFO /;"	d
EC_CMD_PROTO_VERSION	include/ec_commands.h	/^#define EC_CMD_PROTO_VERSION /;"	d
EC_CMD_PSTORE_INFO	include/ec_commands.h	/^#define EC_CMD_PSTORE_INFO /;"	d
EC_CMD_PSTORE_READ	include/ec_commands.h	/^#define EC_CMD_PSTORE_READ /;"	d
EC_CMD_PSTORE_WRITE	include/ec_commands.h	/^#define EC_CMD_PSTORE_WRITE /;"	d
EC_CMD_PWM_GET_FAN_TARGET_RPM	include/ec_commands.h	/^#define EC_CMD_PWM_GET_FAN_TARGET_RPM /;"	d
EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT	include/ec_commands.h	/^#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT /;"	d
EC_CMD_PWM_SET_FAN_DUTY	include/ec_commands.h	/^#define EC_CMD_PWM_SET_FAN_DUTY /;"	d
EC_CMD_PWM_SET_FAN_TARGET_RPM	include/ec_commands.h	/^#define EC_CMD_PWM_SET_FAN_TARGET_RPM /;"	d
EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT	include/ec_commands.h	/^#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT /;"	d
EC_CMD_READ_MEMMAP	include/ec_commands.h	/^#define EC_CMD_READ_MEMMAP /;"	d
EC_CMD_READ_TEST	include/ec_commands.h	/^#define EC_CMD_READ_TEST /;"	d
EC_CMD_REBOOT	include/ec_commands.h	/^#define EC_CMD_REBOOT /;"	d
EC_CMD_REBOOT_EC	include/ec_commands.h	/^#define EC_CMD_REBOOT_EC /;"	d
EC_CMD_RESEND_RESPONSE	include/ec_commands.h	/^#define EC_CMD_RESEND_RESPONSE /;"	d
EC_CMD_RTC_GET_ALARM	include/ec_commands.h	/^#define EC_CMD_RTC_GET_ALARM /;"	d
EC_CMD_RTC_GET_VALUE	include/ec_commands.h	/^#define EC_CMD_RTC_GET_VALUE /;"	d
EC_CMD_RTC_SET_ALARM	include/ec_commands.h	/^#define EC_CMD_RTC_SET_ALARM /;"	d
EC_CMD_RTC_SET_VALUE	include/ec_commands.h	/^#define EC_CMD_RTC_SET_VALUE /;"	d
EC_CMD_SB_READ_BLOCK	include/ec_commands.h	/^#define EC_CMD_SB_READ_BLOCK /;"	d
EC_CMD_SB_READ_WORD	include/ec_commands.h	/^#define EC_CMD_SB_READ_WORD /;"	d
EC_CMD_SB_WRITE_BLOCK	include/ec_commands.h	/^#define EC_CMD_SB_WRITE_BLOCK /;"	d
EC_CMD_SB_WRITE_WORD	include/ec_commands.h	/^#define EC_CMD_SB_WRITE_WORD /;"	d
EC_CMD_SWITCH_ENABLE_BKLIGHT	include/ec_commands.h	/^#define EC_CMD_SWITCH_ENABLE_BKLIGHT /;"	d
EC_CMD_SWITCH_ENABLE_WIRELESS	include/ec_commands.h	/^#define EC_CMD_SWITCH_ENABLE_WIRELESS /;"	d
EC_CMD_TEMP_SENSOR_GET_INFO	include/ec_commands.h	/^#define EC_CMD_TEMP_SENSOR_GET_INFO /;"	d
EC_CMD_TEST_PROTOCOL	include/ec_commands.h	/^#define EC_CMD_TEST_PROTOCOL	/;"	d
EC_CMD_THERMAL_AUTO_FAN_CTRL	include/ec_commands.h	/^#define EC_CMD_THERMAL_AUTO_FAN_CTRL /;"	d
EC_CMD_THERMAL_GET_THRESHOLD	include/ec_commands.h	/^#define EC_CMD_THERMAL_GET_THRESHOLD /;"	d
EC_CMD_THERMAL_SET_THRESHOLD	include/ec_commands.h	/^#define EC_CMD_THERMAL_SET_THRESHOLD /;"	d
EC_CMD_TMP006_GET_CALIBRATION	include/ec_commands.h	/^#define EC_CMD_TMP006_GET_CALIBRATION /;"	d
EC_CMD_TMP006_SET_CALIBRATION	include/ec_commands.h	/^#define EC_CMD_TMP006_SET_CALIBRATION /;"	d
EC_CMD_USB_CHARGE_SET_MODE	include/ec_commands.h	/^#define EC_CMD_USB_CHARGE_SET_MODE /;"	d
EC_CMD_USB_MUX	include/ec_commands.h	/^#define EC_CMD_USB_MUX /;"	d
EC_CMD_VBNV_CONTEXT	include/ec_commands.h	/^#define EC_CMD_VBNV_CONTEXT /;"	d
EC_CMD_VBOOT_HASH	include/ec_commands.h	/^#define EC_CMD_VBOOT_HASH /;"	d
EC_CMD_VERSION0	include/ec_commands.h	/^#define EC_CMD_VERSION0 /;"	d
EC_COMMAND_PROTOCOL_3	include/ec_commands.h	/^#define EC_COMMAND_PROTOCOL_3 /;"	d
EC_COMMS_STATUS_PROCESSING	include/ec_commands.h	/^	EC_COMMS_STATUS_PROCESSING	= 1 << 0,	\/* Processing cmd *\/$/;"	e	enum:ec_comms_status
EC_FAN_SPEED_ENTRIES	include/ec_commands.h	/^#define EC_FAN_SPEED_ENTRIES /;"	d
EC_FAN_SPEED_NOT_PRESENT	include/ec_commands.h	/^#define EC_FAN_SPEED_NOT_PRESENT /;"	d
EC_FAN_SPEED_STALLED	include/ec_commands.h	/^#define EC_FAN_SPEED_STALLED /;"	d
EC_FLASH_PROTECT_ALL_AT_BOOT	include/ec_commands.h	/^#define EC_FLASH_PROTECT_ALL_AT_BOOT /;"	d
EC_FLASH_PROTECT_ALL_NOW	include/ec_commands.h	/^#define EC_FLASH_PROTECT_ALL_NOW /;"	d
EC_FLASH_PROTECT_ERROR_INCONSISTENT	include/ec_commands.h	/^#define EC_FLASH_PROTECT_ERROR_INCONSISTENT /;"	d
EC_FLASH_PROTECT_ERROR_STUCK	include/ec_commands.h	/^#define EC_FLASH_PROTECT_ERROR_STUCK /;"	d
EC_FLASH_PROTECT_GPIO_ASSERTED	include/ec_commands.h	/^#define EC_FLASH_PROTECT_GPIO_ASSERTED /;"	d
EC_FLASH_PROTECT_RO_AT_BOOT	include/ec_commands.h	/^#define EC_FLASH_PROTECT_RO_AT_BOOT /;"	d
EC_FLASH_PROTECT_RO_NOW	include/ec_commands.h	/^#define EC_FLASH_PROTECT_RO_NOW /;"	d
EC_FLASH_REGION_COUNT	include/ec_commands.h	/^	EC_FLASH_REGION_COUNT,$/;"	e	enum:ec_flash_region
EC_FLASH_REGION_RO	include/ec_commands.h	/^	EC_FLASH_REGION_RO = 0,$/;"	e	enum:ec_flash_region
EC_FLASH_REGION_RW	include/ec_commands.h	/^	EC_FLASH_REGION_RW,$/;"	e	enum:ec_flash_region
EC_FLASH_REGION_WP_RO	include/ec_commands.h	/^	EC_FLASH_REGION_WP_RO,$/;"	e	enum:ec_flash_region
EC_FLASH_WRITE_VER0_SIZE	include/ec_commands.h	/^#define EC_FLASH_WRITE_VER0_SIZE /;"	d
EC_HOST_ARGS_FLAG_FROM_HOST	include/ec_commands.h	/^#define EC_HOST_ARGS_FLAG_FROM_HOST /;"	d
EC_HOST_ARGS_FLAG_TO_HOST	include/ec_commands.h	/^#define EC_HOST_ARGS_FLAG_TO_HOST /;"	d
EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED	include/ec_commands.h	/^#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED /;"	d
EC_HOST_CMD_FLAG_VERSION_3	include/ec_commands.h	/^#define EC_HOST_CMD_FLAG_VERSION_3 /;"	d
EC_HOST_CMD_REGION0	include/ec_commands.h	/^#define EC_HOST_CMD_REGION0 /;"	d
EC_HOST_CMD_REGION1	include/ec_commands.h	/^#define EC_HOST_CMD_REGION1 /;"	d
EC_HOST_CMD_REGION_SIZE	include/ec_commands.h	/^#define EC_HOST_CMD_REGION_SIZE /;"	d
EC_HOST_EVENT_AC_CONNECTED	include/ec_commands.h	/^	EC_HOST_EVENT_AC_CONNECTED = 4,$/;"	e	enum:host_event_code
EC_HOST_EVENT_AC_DISCONNECTED	include/ec_commands.h	/^	EC_HOST_EVENT_AC_DISCONNECTED = 5,$/;"	e	enum:host_event_code
EC_HOST_EVENT_BATTERY	include/ec_commands.h	/^	EC_HOST_EVENT_BATTERY = 8,$/;"	e	enum:host_event_code
EC_HOST_EVENT_BATTERY_CRITICAL	include/ec_commands.h	/^	EC_HOST_EVENT_BATTERY_CRITICAL = 7,$/;"	e	enum:host_event_code
EC_HOST_EVENT_BATTERY_LOW	include/ec_commands.h	/^	EC_HOST_EVENT_BATTERY_LOW = 6,$/;"	e	enum:host_event_code
EC_HOST_EVENT_BATTERY_SHUTDOWN	include/ec_commands.h	/^	EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,$/;"	e	enum:host_event_code
EC_HOST_EVENT_INTERFACE_READY	include/ec_commands.h	/^	EC_HOST_EVENT_INTERFACE_READY = 14,$/;"	e	enum:host_event_code
EC_HOST_EVENT_INVALID	include/ec_commands.h	/^	EC_HOST_EVENT_INVALID = 32$/;"	e	enum:host_event_code
EC_HOST_EVENT_KEYBOARD_RECOVERY	include/ec_commands.h	/^	EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,$/;"	e	enum:host_event_code
EC_HOST_EVENT_KEY_PRESSED	include/ec_commands.h	/^	EC_HOST_EVENT_KEY_PRESSED = 13,$/;"	e	enum:host_event_code
EC_HOST_EVENT_LID_CLOSED	include/ec_commands.h	/^	EC_HOST_EVENT_LID_CLOSED = 1,$/;"	e	enum:host_event_code
EC_HOST_EVENT_LID_OPEN	include/ec_commands.h	/^	EC_HOST_EVENT_LID_OPEN = 2,$/;"	e	enum:host_event_code
EC_HOST_EVENT_MASK	include/ec_commands.h	/^#define EC_HOST_EVENT_MASK(/;"	d
EC_HOST_EVENT_POWER_BUTTON	include/ec_commands.h	/^	EC_HOST_EVENT_POWER_BUTTON = 3,$/;"	e	enum:host_event_code
EC_HOST_EVENT_THERMAL	include/ec_commands.h	/^	EC_HOST_EVENT_THERMAL = 11,$/;"	e	enum:host_event_code
EC_HOST_EVENT_THERMAL_OVERLOAD	include/ec_commands.h	/^	EC_HOST_EVENT_THERMAL_OVERLOAD = 10,$/;"	e	enum:host_event_code
EC_HOST_EVENT_THERMAL_SHUTDOWN	include/ec_commands.h	/^	EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,$/;"	e	enum:host_event_code
EC_HOST_EVENT_THERMAL_THRESHOLD	include/ec_commands.h	/^	EC_HOST_EVENT_THERMAL_THRESHOLD = 9,$/;"	e	enum:host_event_code
EC_HOST_EVENT_USB_CHARGER	include/ec_commands.h	/^	EC_HOST_EVENT_USB_CHARGER = 12,$/;"	e	enum:host_event_code
EC_HOST_REQUEST_VERSION	include/ec_commands.h	/^#define EC_HOST_REQUEST_VERSION /;"	d
EC_HOST_RESPONSE_VERSION	include/ec_commands.h	/^#define EC_HOST_RESPONSE_VERSION /;"	d
EC_I2C_ADDR_MASK	include/ec_commands.h	/^#define EC_I2C_ADDR_MASK	/;"	d
EC_I2C_FLAG_10BIT	include/ec_commands.h	/^#define EC_I2C_FLAG_10BIT	/;"	d
EC_I2C_FLAG_READ	include/ec_commands.h	/^#define EC_I2C_FLAG_READ	/;"	d
EC_I2C_STATUS_ERROR	include/ec_commands.h	/^#define EC_I2C_STATUS_ERROR	/;"	d
EC_I2C_STATUS_NAK	include/ec_commands.h	/^#define EC_I2C_STATUS_NAK	/;"	d
EC_I2C_STATUS_TIMEOUT	include/ec_commands.h	/^#define EC_I2C_STATUS_TIMEOUT	/;"	d
EC_IMAGE_RO	include/ec_commands.h	/^	EC_IMAGE_RO,$/;"	e	enum:ec_current_image
EC_IMAGE_RW	include/ec_commands.h	/^	EC_IMAGE_RW$/;"	e	enum:ec_current_image
EC_IMAGE_UNKNOWN	include/ec_commands.h	/^	EC_IMAGE_UNKNOWN = 0,$/;"	e	enum:ec_current_image
EC_KEYSCAN_SEQ_ADD	include/ec_commands.h	/^	EC_KEYSCAN_SEQ_ADD = 2,		\/* Add item to sequence *\/$/;"	e	enum:ec_keyscan_seq_cmd
EC_KEYSCAN_SEQ_CLEAR	include/ec_commands.h	/^	EC_KEYSCAN_SEQ_CLEAR = 1,	\/* Clear sequence *\/$/;"	e	enum:ec_keyscan_seq_cmd
EC_KEYSCAN_SEQ_COLLECT	include/ec_commands.h	/^	EC_KEYSCAN_SEQ_COLLECT = 4,	\/* Collect sequence summary data *\/$/;"	e	enum:ec_keyscan_seq_cmd
EC_KEYSCAN_SEQ_FLAG_DONE	include/ec_commands.h	/^	EC_KEYSCAN_SEQ_FLAG_DONE	= 1 << 0,$/;"	e	enum:ec_collect_flags
EC_KEYSCAN_SEQ_START	include/ec_commands.h	/^	EC_KEYSCAN_SEQ_START = 3,	\/* Start running sequence *\/$/;"	e	enum:ec_keyscan_seq_cmd
EC_KEYSCAN_SEQ_STATUS	include/ec_commands.h	/^	EC_KEYSCAN_SEQ_STATUS = 0,	\/* Get status information *\/$/;"	e	enum:ec_keyscan_seq_cmd
EC_LDO_STATE_OFF	include/ec_commands.h	/^	EC_LDO_STATE_OFF = 0,	\/* the LDO \/ FET is shut down *\/$/;"	e	enum:ec_ldo_state
EC_LDO_STATE_ON	include/ec_commands.h	/^	EC_LDO_STATE_ON = 1,	\/* the LDO \/ FET is ON \/ providing power *\/$/;"	e	enum:ec_ldo_state
EC_LED_COLOR_BLUE	include/ec_commands.h	/^	EC_LED_COLOR_BLUE,$/;"	e	enum:ec_led_colors
EC_LED_COLOR_COUNT	include/ec_commands.h	/^	EC_LED_COLOR_COUNT$/;"	e	enum:ec_led_colors
EC_LED_COLOR_GREEN	include/ec_commands.h	/^	EC_LED_COLOR_GREEN,$/;"	e	enum:ec_led_colors
EC_LED_COLOR_RED	include/ec_commands.h	/^	EC_LED_COLOR_RED = 0,$/;"	e	enum:ec_led_colors
EC_LED_COLOR_WHITE	include/ec_commands.h	/^	EC_LED_COLOR_WHITE,$/;"	e	enum:ec_led_colors
EC_LED_COLOR_YELLOW	include/ec_commands.h	/^	EC_LED_COLOR_YELLOW,$/;"	e	enum:ec_led_colors
EC_LED_FLAGS_AUTO	include/ec_commands.h	/^#define EC_LED_FLAGS_AUTO /;"	d
EC_LED_FLAGS_QUERY	include/ec_commands.h	/^#define EC_LED_FLAGS_QUERY /;"	d
EC_LED_ID_ADAPTER_LED	include/ec_commands.h	/^	EC_LED_ID_ADAPTER_LED,$/;"	e	enum:ec_led_id
EC_LED_ID_BATTERY_LED	include/ec_commands.h	/^	EC_LED_ID_BATTERY_LED = 0,$/;"	e	enum:ec_led_id
EC_LED_ID_POWER_BUTTON_LED	include/ec_commands.h	/^	EC_LED_ID_POWER_BUTTON_LED,$/;"	e	enum:ec_led_id
EC_LPC_ADDR_ACPI_CMD	include/ec_commands.h	/^#define EC_LPC_ADDR_ACPI_CMD /;"	d
EC_LPC_ADDR_ACPI_DATA	include/ec_commands.h	/^#define EC_LPC_ADDR_ACPI_DATA /;"	d
EC_LPC_ADDR_HOST_ARGS	include/ec_commands.h	/^#define EC_LPC_ADDR_HOST_ARGS /;"	d
EC_LPC_ADDR_HOST_CMD	include/ec_commands.h	/^#define EC_LPC_ADDR_HOST_CMD /;"	d
EC_LPC_ADDR_HOST_DATA	include/ec_commands.h	/^#define EC_LPC_ADDR_HOST_DATA /;"	d
EC_LPC_ADDR_HOST_PACKET	include/ec_commands.h	/^#define EC_LPC_ADDR_HOST_PACKET /;"	d
EC_LPC_ADDR_HOST_PARAM	include/ec_commands.h	/^#define EC_LPC_ADDR_HOST_PARAM /;"	d
EC_LPC_ADDR_MEMMAP	include/ec_commands.h	/^#define EC_LPC_ADDR_MEMMAP /;"	d
EC_LPC_CMDR_ACPI_BRST	include/ec_commands.h	/^#define EC_LPC_CMDR_ACPI_BRST	/;"	d
EC_LPC_CMDR_BUSY	include/ec_commands.h	/^#define EC_LPC_CMDR_BUSY	/;"	d
EC_LPC_CMDR_CMD	include/ec_commands.h	/^#define EC_LPC_CMDR_CMD	/;"	d
EC_LPC_CMDR_DATA	include/ec_commands.h	/^#define EC_LPC_CMDR_DATA	/;"	d
EC_LPC_CMDR_PENDING	include/ec_commands.h	/^#define EC_LPC_CMDR_PENDING	/;"	d
EC_LPC_CMDR_SCI	include/ec_commands.h	/^#define EC_LPC_CMDR_SCI	/;"	d
EC_LPC_CMDR_SMI	include/ec_commands.h	/^#define EC_LPC_CMDR_SMI	/;"	d
EC_LPC_HOST_PACKET_SIZE	include/ec_commands.h	/^#define EC_LPC_HOST_PACKET_SIZE /;"	d
EC_LPC_STATUS_BURST_MODE	include/ec_commands.h	/^#define EC_LPC_STATUS_BURST_MODE /;"	d
EC_LPC_STATUS_BUSY_MASK	include/ec_commands.h	/^#define EC_LPC_STATUS_BUSY_MASK /;"	d
EC_LPC_STATUS_FROM_HOST	include/ec_commands.h	/^#define EC_LPC_STATUS_FROM_HOST /;"	d
EC_LPC_STATUS_LAST_CMD	include/ec_commands.h	/^#define EC_LPC_STATUS_LAST_CMD /;"	d
EC_LPC_STATUS_PROCESSING	include/ec_commands.h	/^#define EC_LPC_STATUS_PROCESSING /;"	d
EC_LPC_STATUS_RESERVED	include/ec_commands.h	/^#define EC_LPC_STATUS_RESERVED /;"	d
EC_LPC_STATUS_SCI_PENDING	include/ec_commands.h	/^#define EC_LPC_STATUS_SCI_PENDING /;"	d
EC_LPC_STATUS_SMI_PENDING	include/ec_commands.h	/^#define EC_LPC_STATUS_SMI_PENDING /;"	d
EC_LPC_STATUS_TO_HOST	include/ec_commands.h	/^#define EC_LPC_STATUS_TO_HOST /;"	d
EC_MEMMAP_BATTERY_VERSION	include/ec_commands.h	/^#define EC_MEMMAP_BATTERY_VERSION /;"	d
EC_MEMMAP_BATT_CAP	include/ec_commands.h	/^#define EC_MEMMAP_BATT_CAP /;"	d
EC_MEMMAP_BATT_CCNT	include/ec_commands.h	/^#define EC_MEMMAP_BATT_CCNT /;"	d
EC_MEMMAP_BATT_DCAP	include/ec_commands.h	/^#define EC_MEMMAP_BATT_DCAP /;"	d
EC_MEMMAP_BATT_DVLT	include/ec_commands.h	/^#define EC_MEMMAP_BATT_DVLT /;"	d
EC_MEMMAP_BATT_FLAG	include/ec_commands.h	/^#define EC_MEMMAP_BATT_FLAG /;"	d
EC_MEMMAP_BATT_LFCC	include/ec_commands.h	/^#define EC_MEMMAP_BATT_LFCC /;"	d
EC_MEMMAP_BATT_MFGR	include/ec_commands.h	/^#define EC_MEMMAP_BATT_MFGR /;"	d
EC_MEMMAP_BATT_MODEL	include/ec_commands.h	/^#define EC_MEMMAP_BATT_MODEL /;"	d
EC_MEMMAP_BATT_RATE	include/ec_commands.h	/^#define EC_MEMMAP_BATT_RATE /;"	d
EC_MEMMAP_BATT_SERIAL	include/ec_commands.h	/^#define EC_MEMMAP_BATT_SERIAL /;"	d
EC_MEMMAP_BATT_TYPE	include/ec_commands.h	/^#define EC_MEMMAP_BATT_TYPE /;"	d
EC_MEMMAP_BATT_VOLT	include/ec_commands.h	/^#define EC_MEMMAP_BATT_VOLT /;"	d
EC_MEMMAP_EVENTS_VERSION	include/ec_commands.h	/^#define EC_MEMMAP_EVENTS_VERSION /;"	d
EC_MEMMAP_FAN	include/ec_commands.h	/^#define EC_MEMMAP_FAN /;"	d
EC_MEMMAP_HOST_CMD_FLAGS	include/ec_commands.h	/^#define EC_MEMMAP_HOST_CMD_FLAGS /;"	d
EC_MEMMAP_HOST_EVENTS	include/ec_commands.h	/^#define EC_MEMMAP_HOST_EVENTS /;"	d
EC_MEMMAP_ID	include/ec_commands.h	/^#define EC_MEMMAP_ID /;"	d
EC_MEMMAP_ID_VERSION	include/ec_commands.h	/^#define EC_MEMMAP_ID_VERSION /;"	d
EC_MEMMAP_SIZE	include/ec_commands.h	/^#define EC_MEMMAP_SIZE /;"	d
EC_MEMMAP_SWITCHES	include/ec_commands.h	/^#define EC_MEMMAP_SWITCHES /;"	d
EC_MEMMAP_SWITCHES_VERSION	include/ec_commands.h	/^#define EC_MEMMAP_SWITCHES_VERSION /;"	d
EC_MEMMAP_TEMP_SENSOR	include/ec_commands.h	/^#define EC_MEMMAP_TEMP_SENSOR /;"	d
EC_MEMMAP_TEMP_SENSOR_B	include/ec_commands.h	/^#define EC_MEMMAP_TEMP_SENSOR_B /;"	d
EC_MEMMAP_TEXT_MAX	include/ec_commands.h	/^#define EC_MEMMAP_TEXT_MAX /;"	d
EC_MEMMAP_THERMAL_VERSION	include/ec_commands.h	/^#define EC_MEMMAP_THERMAL_VERSION /;"	d
EC_MKBP_FLAGS_ENABLE	include/ec_commands.h	/^	EC_MKBP_FLAGS_ENABLE = 1,	\/* Enable keyboard scanning *\/$/;"	e	enum:mkbp_config_flags
EC_MKBP_VALID_DEBOUNCE_DOWN	include/ec_commands.h	/^	EC_MKBP_VALID_DEBOUNCE_DOWN		= 1 << 5,$/;"	e	enum:mkbp_config_valid
EC_MKBP_VALID_DEBOUNCE_UP	include/ec_commands.h	/^	EC_MKBP_VALID_DEBOUNCE_UP		= 1 << 6,$/;"	e	enum:mkbp_config_valid
EC_MKBP_VALID_FIFO_MAX_DEPTH	include/ec_commands.h	/^	EC_MKBP_VALID_FIFO_MAX_DEPTH		= 1 << 7,$/;"	e	enum:mkbp_config_valid
EC_MKBP_VALID_MIN_POST_SCAN_DELAY	include/ec_commands.h	/^	EC_MKBP_VALID_MIN_POST_SCAN_DELAY	= 1 << 3,$/;"	e	enum:mkbp_config_valid
EC_MKBP_VALID_OUTPUT_SETTLE	include/ec_commands.h	/^	EC_MKBP_VALID_OUTPUT_SETTLE		= 1 << 4,$/;"	e	enum:mkbp_config_valid
EC_MKBP_VALID_POLL_TIMEOUT	include/ec_commands.h	/^	EC_MKBP_VALID_POLL_TIMEOUT		= 1 << 1,$/;"	e	enum:mkbp_config_valid
EC_MKBP_VALID_SCAN_PERIOD	include/ec_commands.h	/^	EC_MKBP_VALID_SCAN_PERIOD		= 1 << 0,$/;"	e	enum:mkbp_config_valid
EC_PROTO2_MAX_PARAM_SIZE	include/ec_commands.h	/^#define EC_PROTO2_MAX_PARAM_SIZE /;"	d
EC_PROTO2_MAX_REQUEST_SIZE	include/ec_commands.h	/^#define EC_PROTO2_MAX_REQUEST_SIZE /;"	d
EC_PROTO2_MAX_RESPONSE_SIZE	include/ec_commands.h	/^#define EC_PROTO2_MAX_RESPONSE_SIZE /;"	d
EC_PROTO2_REQUEST_HEADER_BYTES	include/ec_commands.h	/^#define EC_PROTO2_REQUEST_HEADER_BYTES /;"	d
EC_PROTO2_REQUEST_OVERHEAD	include/ec_commands.h	/^#define EC_PROTO2_REQUEST_OVERHEAD /;"	d
EC_PROTO2_REQUEST_TRAILER_BYTES	include/ec_commands.h	/^#define EC_PROTO2_REQUEST_TRAILER_BYTES /;"	d
EC_PROTO2_RESPONSE_HEADER_BYTES	include/ec_commands.h	/^#define EC_PROTO2_RESPONSE_HEADER_BYTES /;"	d
EC_PROTO2_RESPONSE_OVERHEAD	include/ec_commands.h	/^#define EC_PROTO2_RESPONSE_OVERHEAD /;"	d
EC_PROTO2_RESPONSE_TRAILER_BYTES	include/ec_commands.h	/^#define EC_PROTO2_RESPONSE_TRAILER_BYTES /;"	d
EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED	include/ec_commands.h	/^#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED /;"	d
EC_PROTO_VERSION	include/ec_commands.h	/^#define EC_PROTO_VERSION /;"	d
EC_PSTORE_SIZE_MAX	include/ec_commands.h	/^#define EC_PSTORE_SIZE_MAX /;"	d
EC_REBOOT_CANCEL	include/ec_commands.h	/^	EC_REBOOT_CANCEL = 0,        \/* Cancel a pending reboot *\/$/;"	e	enum:ec_reboot_cmd
EC_REBOOT_COLD	include/ec_commands.h	/^	EC_REBOOT_COLD = 4,          \/* Cold-reboot *\/$/;"	e	enum:ec_reboot_cmd
EC_REBOOT_DISABLE_JUMP	include/ec_commands.h	/^	EC_REBOOT_DISABLE_JUMP = 5,  \/* Disable jump until next reboot *\/$/;"	e	enum:ec_reboot_cmd
EC_REBOOT_FLAG_ON_AP_SHUTDOWN	include/ec_commands.h	/^#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN /;"	d
EC_REBOOT_FLAG_RESERVED0	include/ec_commands.h	/^#define EC_REBOOT_FLAG_RESERVED0 /;"	d
EC_REBOOT_HIBERNATE	include/ec_commands.h	/^	EC_REBOOT_HIBERNATE = 6      \/* Hibernate EC *\/$/;"	e	enum:ec_reboot_cmd
EC_REBOOT_JUMP_RO	include/ec_commands.h	/^	EC_REBOOT_JUMP_RO = 1,       \/* Jump to RO without rebooting *\/$/;"	e	enum:ec_reboot_cmd
EC_REBOOT_JUMP_RW	include/ec_commands.h	/^	EC_REBOOT_JUMP_RW = 2,       \/* Jump to RW without rebooting *\/$/;"	e	enum:ec_reboot_cmd
EC_RES_ACCESS_DENIED	include/ec_commands.h	/^	EC_RES_ACCESS_DENIED = 4,$/;"	e	enum:ec_status
EC_RES_ERROR	include/ec_commands.h	/^	EC_RES_ERROR = 2,$/;"	e	enum:ec_status
EC_RES_INVALID_CHECKSUM	include/ec_commands.h	/^	EC_RES_INVALID_CHECKSUM = 7,$/;"	e	enum:ec_status
EC_RES_INVALID_COMMAND	include/ec_commands.h	/^	EC_RES_INVALID_COMMAND = 1,$/;"	e	enum:ec_status
EC_RES_INVALID_HEADER	include/ec_commands.h	/^	EC_RES_INVALID_HEADER = 12,     \/* Header contains invalid data *\/$/;"	e	enum:ec_status
EC_RES_INVALID_PARAM	include/ec_commands.h	/^	EC_RES_INVALID_PARAM = 3,$/;"	e	enum:ec_status
EC_RES_INVALID_RESPONSE	include/ec_commands.h	/^	EC_RES_INVALID_RESPONSE = 5,$/;"	e	enum:ec_status
EC_RES_INVALID_VERSION	include/ec_commands.h	/^	EC_RES_INVALID_VERSION = 6,$/;"	e	enum:ec_status
EC_RES_IN_PROGRESS	include/ec_commands.h	/^	EC_RES_IN_PROGRESS = 8,		\/* Accepted, command in progress *\/$/;"	e	enum:ec_status
EC_RES_OVERFLOW	include/ec_commands.h	/^	EC_RES_OVERFLOW = 11,		\/* Table \/ data overflow *\/$/;"	e	enum:ec_status
EC_RES_REQUEST_TRUNCATED	include/ec_commands.h	/^	EC_RES_REQUEST_TRUNCATED = 13,  \/* Didn't get the entire request *\/$/;"	e	enum:ec_status
EC_RES_RESPONSE_TOO_BIG	include/ec_commands.h	/^	EC_RES_RESPONSE_TOO_BIG = 14    \/* Response was too big to handle *\/$/;"	e	enum:ec_status
EC_RES_SUCCESS	include/ec_commands.h	/^	EC_RES_SUCCESS = 0,$/;"	e	enum:ec_status
EC_RES_TIMEOUT	include/ec_commands.h	/^	EC_RES_TIMEOUT = 10,		\/* We got a timeout *\/$/;"	e	enum:ec_status
EC_RES_UNAVAILABLE	include/ec_commands.h	/^	EC_RES_UNAVAILABLE = 9,		\/* No response available *\/$/;"	e	enum:ec_status
EC_SWITCH_DEDICATED_RECOVERY	include/ec_commands.h	/^#define EC_SWITCH_DEDICATED_RECOVERY /;"	d
EC_SWITCH_IGNORE0	include/ec_commands.h	/^#define EC_SWITCH_IGNORE0 /;"	d
EC_SWITCH_IGNORE1	include/ec_commands.h	/^#define EC_SWITCH_IGNORE1	/;"	d
EC_SWITCH_LID_OPEN	include/ec_commands.h	/^#define EC_SWITCH_LID_OPEN /;"	d
EC_SWITCH_POWER_BUTTON_PRESSED	include/ec_commands.h	/^#define EC_SWITCH_POWER_BUTTON_PRESSED /;"	d
EC_SWITCH_WRITE_PROTECT_DISABLED	include/ec_commands.h	/^#define EC_SWITCH_WRITE_PROTECT_DISABLED /;"	d
EC_TEMP_SENSOR_B_ENTRIES	include/ec_commands.h	/^#define EC_TEMP_SENSOR_B_ENTRIES /;"	d
EC_TEMP_SENSOR_ENTRIES	include/ec_commands.h	/^#define EC_TEMP_SENSOR_ENTRIES /;"	d
EC_TEMP_SENSOR_ERROR	include/ec_commands.h	/^#define EC_TEMP_SENSOR_ERROR /;"	d
EC_TEMP_SENSOR_NOT_CALIBRATED	include/ec_commands.h	/^#define EC_TEMP_SENSOR_NOT_CALIBRATED /;"	d
EC_TEMP_SENSOR_NOT_POWERED	include/ec_commands.h	/^#define EC_TEMP_SENSOR_NOT_POWERED /;"	d
EC_TEMP_SENSOR_NOT_PRESENT	include/ec_commands.h	/^#define EC_TEMP_SENSOR_NOT_PRESENT /;"	d
EC_TEMP_SENSOR_OFFSET	include/ec_commands.h	/^#define EC_TEMP_SENSOR_OFFSET /;"	d
EC_VBNV_BLOCK_SIZE	include/ec_commands.h	/^#define EC_VBNV_BLOCK_SIZE /;"	d
EC_VBNV_CONTEXT_OP_READ	include/ec_commands.h	/^	EC_VBNV_CONTEXT_OP_READ,$/;"	e	enum:ec_vbnvcontext_op
EC_VBNV_CONTEXT_OP_WRITE	include/ec_commands.h	/^	EC_VBNV_CONTEXT_OP_WRITE,$/;"	e	enum:ec_vbnvcontext_op
EC_VBOOT_HASH_ABORT	include/ec_commands.h	/^	EC_VBOOT_HASH_ABORT = 1,     \/* Abort calculating current hash *\/$/;"	e	enum:ec_vboot_hash_cmd
EC_VBOOT_HASH_GET	include/ec_commands.h	/^	EC_VBOOT_HASH_GET = 0,       \/* Get current hash status *\/$/;"	e	enum:ec_vboot_hash_cmd
EC_VBOOT_HASH_OFFSET_RO	include/ec_commands.h	/^#define EC_VBOOT_HASH_OFFSET_RO /;"	d
EC_VBOOT_HASH_OFFSET_RW	include/ec_commands.h	/^#define EC_VBOOT_HASH_OFFSET_RW /;"	d
EC_VBOOT_HASH_RECALC	include/ec_commands.h	/^	EC_VBOOT_HASH_RECALC = 3,    \/* Synchronously compute a new hash *\/$/;"	e	enum:ec_vboot_hash_cmd
EC_VBOOT_HASH_START	include/ec_commands.h	/^	EC_VBOOT_HASH_START = 2,     \/* Start computing a new hash *\/$/;"	e	enum:ec_vboot_hash_cmd
EC_VBOOT_HASH_STATUS_BUSY	include/ec_commands.h	/^	EC_VBOOT_HASH_STATUS_BUSY = 2, \/* Busy computing a hash *\/$/;"	e	enum:ec_vboot_hash_status
EC_VBOOT_HASH_STATUS_DONE	include/ec_commands.h	/^	EC_VBOOT_HASH_STATUS_DONE = 1, \/* Finished computing a hash *\/$/;"	e	enum:ec_vboot_hash_status
EC_VBOOT_HASH_STATUS_NONE	include/ec_commands.h	/^	EC_VBOOT_HASH_STATUS_NONE = 0, \/* No hash (not started, or aborted) *\/$/;"	e	enum:ec_vboot_hash_status
EC_VBOOT_HASH_TYPE_SHA256	include/ec_commands.h	/^	EC_VBOOT_HASH_TYPE_SHA256 = 0, \/* SHA-256 *\/$/;"	e	enum:ec_vboot_hash_type
EC_VER_FLASH_PROTECT	include/ec_commands.h	/^#define EC_VER_FLASH_PROTECT /;"	d
EC_VER_FLASH_REGION_INFO	include/ec_commands.h	/^#define EC_VER_FLASH_REGION_INFO /;"	d
EC_VER_FLASH_WRITE	include/ec_commands.h	/^#define EC_VER_FLASH_WRITE /;"	d
EC_VER_MASK	include/ec_commands.h	/^#define EC_VER_MASK(/;"	d
EC_VER_VBNV_CONTEXT	include/ec_commands.h	/^#define EC_VER_VBNV_CONTEXT /;"	d
EC_WIRELESS_SWITCH_BLUETOOTH	include/ec_commands.h	/^#define EC_WIRELESS_SWITCH_BLUETOOTH /;"	d
EC_WIRELESS_SWITCH_WLAN	include/ec_commands.h	/^#define EC_WIRELESS_SWITCH_WLAN /;"	d
EC_WIRELESS_SWITCH_WWAN	include/ec_commands.h	/^#define EC_WIRELESS_SWITCH_WWAN /;"	d
ED0_RACC	include/faraday/ftpmu010.h	/^	unsigned int	ED0_RACC;	\/* 0xD4 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
ED1_RACC	include/faraday/ftpmu010.h	/^	unsigned int	ED1_RACC;	\/* 0xD8 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
EDBGREQ_PD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	EDBGREQ_PD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
EDBGREQ_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	EDBGREQ_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
EDC_AC_PARITY	include/fsl_ddr_dimm_params.h	/^#define EDC_AC_PARITY	/;"	d
EDC_DATA_PARITY	include/fsl_ddr_dimm_params.h	/^#define EDC_DATA_PARITY	/;"	d
EDC_ECC	include/fsl_ddr_dimm_params.h	/^#define EDC_ECC	/;"	d
EDDBUF	include/linux/edd.h	/^#define EDDBUF	/;"	d
EDDEXTSIZE	include/linux/edd.h	/^#define EDDEXTSIZE /;"	d
EDDMAGIC1	include/linux/edd.h	/^#define EDDMAGIC1 /;"	d
EDDMAGIC2	include/linux/edd.h	/^#define EDDMAGIC2 /;"	d
EDDMAXNR	include/linux/edd.h	/^#define EDDMAXNR /;"	d
EDDNR	include/linux/edd.h	/^#define EDDNR /;"	d
EDDPARMSIZE	include/linux/edd.h	/^#define EDDPARMSIZE /;"	d
EDD_EXT_64BIT_EXTENSIONS	include/linux/edd.h	/^#define EDD_EXT_64BIT_EXTENSIONS /;"	d
EDD_EXT_DEVICE_LOCKING_AND_EJECTING	include/linux/edd.h	/^#define EDD_EXT_DEVICE_LOCKING_AND_EJECTING /;"	d
EDD_EXT_ENHANCED_DISK_DRIVE_SUPPORT	include/linux/edd.h	/^#define EDD_EXT_ENHANCED_DISK_DRIVE_SUPPORT /;"	d
EDD_EXT_FIXED_DISK_ACCESS	include/linux/edd.h	/^#define EDD_EXT_FIXED_DISK_ACCESS /;"	d
EDD_INFO_DMA_BOUNDARY_ERROR_TRANSPARENT	include/linux/edd.h	/^#define EDD_INFO_DMA_BOUNDARY_ERROR_TRANSPARENT /;"	d
EDD_INFO_GEOMETRY_VALID	include/linux/edd.h	/^#define EDD_INFO_GEOMETRY_VALID /;"	d
EDD_INFO_LOCKABLE	include/linux/edd.h	/^#define EDD_INFO_LOCKABLE /;"	d
EDD_INFO_MEDIA_CHANGE_NOTIFICATION	include/linux/edd.h	/^#define EDD_INFO_MEDIA_CHANGE_NOTIFICATION /;"	d
EDD_INFO_NO_MEDIA_PRESENT	include/linux/edd.h	/^#define EDD_INFO_NO_MEDIA_PRESENT /;"	d
EDD_INFO_REMOVABLE	include/linux/edd.h	/^#define EDD_INFO_REMOVABLE /;"	d
EDD_INFO_USE_INT13_FN50	include/linux/edd.h	/^#define EDD_INFO_USE_INT13_FN50 /;"	d
EDD_INFO_WRITE_VERIFY	include/linux/edd.h	/^#define EDD_INFO_WRITE_VERIFY /;"	d
EDD_MBR_SIG_BUF	include/linux/edd.h	/^#define EDD_MBR_SIG_BUF /;"	d
EDD_MBR_SIG_MAX	include/linux/edd.h	/^#define EDD_MBR_SIG_MAX /;"	d
EDD_MBR_SIG_NR_BUF	include/linux/edd.h	/^#define EDD_MBR_SIG_NR_BUF /;"	d
EDD_MBR_SIG_OFFSET	include/linux/edd.h	/^#define EDD_MBR_SIG_OFFSET /;"	d
EDEADLK	include/linux/errno.h	/^#define	EDEADLK	/;"	d
EDEADLOCK	include/linux/errno.h	/^#define	EDEADLOCK	/;"	d
EDEBGREQ_PULLDOWN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	EDEBGREQ_PULLDOWN_MARK,$/;"	e	enum:__anona304c1340103	file:
EDEBGREQ_PULLUP_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	EDEBGREQ_PULLUP_MARK,	\/* for JTAG *\/$/;"	e	enum:__anona304c1340103	file:
EDESTADDRREQ	include/linux/errno.h	/^#define	EDESTADDRREQ	/;"	d
EDGESTS	drivers/usb/host/r8a66597.h	/^#define	EDGESTS	/;"	d
EDGE_1	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define EDGE_1	/;"	d
EDGE_2	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define EDGE_2	/;"	d
EDGE_CLEAR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define EDGE_CLEAR	/;"	d
EDGE_FAILURE	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define EDGE_FAILURE	/;"	d
EDGE_FALL_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define EDGE_FALL_EN	/;"	d
EDGE_FP	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	EDGE_FP,$/;"	e	enum:hws_edge_compare
EDGE_FPF	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	EDGE_FPF,$/;"	e	enum:hws_edge_compare
EDGE_PF	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	EDGE_PF,$/;"	e	enum:hws_edge_compare
EDGE_PFP	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	EDGE_PFP$/;"	e	enum:hws_edge_compare
EDGE_RISE_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define EDGE_RISE_EN	/;"	d
EDH_BCOUNT	drivers/net/pic32_eth.h	/^#define EDH_BCOUNT(/;"	d
EDH_BCOUNT_SHIFT	drivers/net/pic32_eth.h	/^#define EDH_BCOUNT_SHIFT	/;"	d
EDH_EOP	drivers/net/pic32_eth.h	/^#define EDH_EOP	/;"	d
EDH_EOWN	drivers/net/pic32_eth.h	/^#define EDH_EOWN	/;"	d
EDH_NPV	drivers/net/pic32_eth.h	/^#define EDH_NPV	/;"	d
EDH_SOP	drivers/net/pic32_eth.h	/^#define EDH_SOP	/;"	d
EDH_STICKY	drivers/net/pic32_eth.h	/^#define EDH_STICKY	/;"	d
EDI	arch/x86/include/asm/ptrace.h	/^#define EDI /;"	d
EDID1_INFO_ESTABLISHED_TIMING_1024X768_60	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_60(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_1024X768_70	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_70(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_1024X768_75	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_75(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_1024X768_87I	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_87I(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_1152X870_75	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_1152X870_75(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_1280X1024_75	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_1280X1024_75(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_640X480_60	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_640X480_60(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_640X480_67	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_640X480_67(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_640X480_72	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_640X480_72(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_640X480_75	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_640X480_75(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_720X400_70	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_720X400_70(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_720X400_88	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_720X400_88(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_800X600_56	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_800X600_56(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_800X600_60	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_800X600_60(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_800X600_72	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_800X600_72(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_800X600_75	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_800X600_75(/;"	d
EDID1_INFO_ESTABLISHED_TIMING_832X624_75	include/edid.h	/^#define EDID1_INFO_ESTABLISHED_TIMING_832X624_75(/;"	d
EDID1_INFO_FEATURE_ACTIVE_OFF	include/edid.h	/^#define EDID1_INFO_FEATURE_ACTIVE_OFF(/;"	d
EDID1_INFO_FEATURE_DEFAULT_GTF_SUPPORT	include/edid.h	/^#define EDID1_INFO_FEATURE_DEFAULT_GTF_SUPPORT(/;"	d
EDID1_INFO_FEATURE_DISPLAY_TYPE	include/edid.h	/^#define EDID1_INFO_FEATURE_DISPLAY_TYPE(/;"	d
EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE	include/edid.h	/^#define EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE(/;"	d
EDID1_INFO_FEATURE_RGB	include/edid.h	/^#define EDID1_INFO_FEATURE_RGB(/;"	d
EDID1_INFO_FEATURE_STANDBY	include/edid.h	/^#define EDID1_INFO_FEATURE_STANDBY(/;"	d
EDID1_INFO_FEATURE_SUSPEND	include/edid.h	/^#define EDID1_INFO_FEATURE_SUSPEND(/;"	d
EDID1_INFO_MANUFACTURER_NAME_CHAR1	include/edid.h	/^#define EDID1_INFO_MANUFACTURER_NAME_CHAR1(/;"	d
EDID1_INFO_MANUFACTURER_NAME_CHAR2	include/edid.h	/^#define EDID1_INFO_MANUFACTURER_NAME_CHAR2(/;"	d
EDID1_INFO_MANUFACTURER_NAME_CHAR3	include/edid.h	/^#define EDID1_INFO_MANUFACTURER_NAME_CHAR3(/;"	d
EDID1_INFO_MANUFACTURER_NAME_ZERO	include/edid.h	/^#define EDID1_INFO_MANUFACTURER_NAME_ZERO(/;"	d
EDID1_INFO_PRODUCT_CODE	include/edid.h	/^#define EDID1_INFO_PRODUCT_CODE(/;"	d
EDID1_INFO_SERIAL_NUMBER	include/edid.h	/^#define EDID1_INFO_SERIAL_NUMBER(/;"	d
EDID1_INFO_STANDARD_TIMING_ASPECT	include/edid.h	/^#define EDID1_INFO_STANDARD_TIMING_ASPECT(/;"	d
EDID1_INFO_STANDARD_TIMING_VFREQ	include/edid.h	/^#define EDID1_INFO_STANDARD_TIMING_VFREQ(/;"	d
EDID1_INFO_STANDARD_TIMING_XRESOLUTION	include/edid.h	/^#define EDID1_INFO_STANDARD_TIMING_XRESOLUTION(/;"	d
EDID1_INFO_VIDEO_INPUT_BLANK_TO_BLACK	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_BLANK_TO_BLACK(/;"	d
EDID1_INFO_VIDEO_INPUT_COMPOSITE_SYNC	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_COMPOSITE_SYNC(/;"	d
EDID1_INFO_VIDEO_INPUT_DIGITAL	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_DIGITAL(/;"	d
EDID1_INFO_VIDEO_INPUT_SEPARATE_SYNC	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_SEPARATE_SYNC(/;"	d
EDID1_INFO_VIDEO_INPUT_SERRATION_V	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_SERRATION_V(/;"	d
EDID1_INFO_VIDEO_INPUT_SYNC_ON_GREEN	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_SYNC_ON_GREEN(/;"	d
EDID1_INFO_VIDEO_INPUT_VOLTAGE_LEVEL	include/edid.h	/^#define EDID1_INFO_VIDEO_INPUT_VOLTAGE_LEVEL(/;"	d
EDID_ADDR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define EDID_ADDR	/;"	d
EDID_BLOCK_LENGTH	arch/arm/mach-exynos/include/mach/dp.h	/^#define EDID_BLOCK_LENGTH	/;"	d
EDID_CEA861_DTD_COUNT	include/edid.h	/^#define EDID_CEA861_DTD_COUNT(/;"	d
EDID_CEA861_EXTENSION_TAG	include/edid.h	/^#define EDID_CEA861_EXTENSION_TAG	/;"	d
EDID_CEA861_SUPPORTS_BASIC_AUDIO	include/edid.h	/^#define EDID_CEA861_SUPPORTS_BASIC_AUDIO(/;"	d
EDID_CEA861_SUPPORTS_UNDERSCAN	include/edid.h	/^#define EDID_CEA861_SUPPORTS_UNDERSCAN(/;"	d
EDID_CEA861_SUPPORTS_YUV422	include/edid.h	/^#define EDID_CEA861_SUPPORTS_YUV422(/;"	d
EDID_CEA861_SUPPORTS_YUV444	include/edid.h	/^#define EDID_CEA861_SUPPORTS_YUV444(/;"	d
EDID_CHECKSUM	arch/arm/mach-exynos/include/mach/dp.h	/^#define EDID_CHECKSUM	/;"	d
EDID_DETAILED_TIMING_FLAG_DIGITAL_COMPOSITE	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_DIGITAL_COMPOSITE(/;"	d
EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(/;"	d
EDID_DETAILED_TIMING_FLAG_INTERLACED	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_INTERLACED(/;"	d
EDID_DETAILED_TIMING_FLAG_INTERLEAVED	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_INTERLEAVED(/;"	d
EDID_DETAILED_TIMING_FLAG_POLARITY	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_POLARITY(/;"	d
EDID_DETAILED_TIMING_FLAG_STEREO	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_STEREO(/;"	d
EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY	include/edid.h	/^#define EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY(/;"	d
EDID_DETAILED_TIMING_HIMAGE_SIZE	include/edid.h	/^#define EDID_DETAILED_TIMING_HIMAGE_SIZE(/;"	d
EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE	include/edid.h	/^#define EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE(/;"	d
EDID_DETAILED_TIMING_HORIZONTAL_BLANKING	include/edid.h	/^#define EDID_DETAILED_TIMING_HORIZONTAL_BLANKING(/;"	d
EDID_DETAILED_TIMING_HSYNC_OFFSET	include/edid.h	/^#define EDID_DETAILED_TIMING_HSYNC_OFFSET(/;"	d
EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH	include/edid.h	/^#define EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(/;"	d
EDID_DETAILED_TIMING_PIXEL_CLOCK	include/edid.h	/^#define EDID_DETAILED_TIMING_PIXEL_CLOCK(/;"	d
EDID_DETAILED_TIMING_VERTICAL_ACTIVE	include/edid.h	/^#define EDID_DETAILED_TIMING_VERTICAL_ACTIVE(/;"	d
EDID_DETAILED_TIMING_VERTICAL_BLANKING	include/edid.h	/^#define EDID_DETAILED_TIMING_VERTICAL_BLANKING(/;"	d
EDID_DETAILED_TIMING_VIMAGE_SIZE	include/edid.h	/^#define EDID_DETAILED_TIMING_VIMAGE_SIZE(/;"	d
EDID_DETAILED_TIMING_VSYNC_OFFSET	include/edid.h	/^#define EDID_DETAILED_TIMING_VSYNC_OFFSET(/;"	d
EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH	include/edid.h	/^#define EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(/;"	d
EDID_EXTENSION_FLAG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define EDID_EXTENSION_FLAG	/;"	d
EDID_EXTENSION_FLAG	arch/arm/mach-exynos/include/mach/dp.h	/^#define EDID_EXTENSION_FLAG	/;"	d
EDID_EXT_SIZE	include/edid.h	/^#define EDID_EXT_SIZE	/;"	d
EDID_HEADER	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define EDID_HEADER	/;"	d
EDID_HEADER_PATTERN	arch/arm/mach-exynos/include/mach/dp.h	/^#define EDID_HEADER_PATTERN	/;"	d
EDID_I2C_ADDR	board/gdsys/common/adv7611.c	/^	EDID_I2C_ADDR = 0x36,$/;"	e	enum:__anon3d55bc280103	file:
EDID_LENGTH	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define EDID_LENGTH	/;"	d
EDID_MONITOR_DESCRIPTOR_ASCII	include/edid.h	/^	EDID_MONITOR_DESCRIPTOR_ASCII = 0xfe,$/;"	e	enum:edid_monitor_descriptor_types
EDID_MONITOR_DESCRIPTOR_NAME	include/edid.h	/^	EDID_MONITOR_DESCRIPTOR_NAME = 0xfc,$/;"	e	enum:edid_monitor_descriptor_types
EDID_MONITOR_DESCRIPTOR_RANGE	include/edid.h	/^	EDID_MONITOR_DESCRIPTOR_RANGE = 0xfd,$/;"	e	enum:edid_monitor_descriptor_types
EDID_MONITOR_DESCRIPTOR_SERIAL	include/edid.h	/^	EDID_MONITOR_DESCRIPTOR_SERIAL = 0xff,$/;"	e	enum:edid_monitor_descriptor_types
EDID_SIZE	include/edid.h	/^#define EDID_SIZE	/;"	d
EDMA3_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define EDMA3_BASE	/;"	d
EDMA3_BASE	arch/arm/include/asm/arch-omap5/hardware.h	/^#define EDMA3_BASE	/;"	d
EDMA3_CHMAP_PARSET_MASK	drivers/dma/ti-edma3.c	/^#define EDMA3_CHMAP_PARSET_MASK	/;"	d	file:
EDMA3_CHMAP_PARSET_SHIFT	drivers/dma/ti-edma3.c	/^#define EDMA3_CHMAP_PARSET_SHIFT	/;"	d	file:
EDMA3_CHMAP_TRIGWORD_SHIFT	drivers/dma/ti-edma3.c	/^#define EDMA3_CHMAP_TRIGWORD_SHIFT	/;"	d	file:
EDMA3_ICR	drivers/dma/ti-edma3.c	/^#define EDMA3_ICR	/;"	d	file:
EDMA3_ICRH	drivers/dma/ti-edma3.c	/^#define EDMA3_ICRH	/;"	d	file:
EDMA3_IPR	drivers/dma/ti-edma3.c	/^#define EDMA3_IPR	/;"	d	file:
EDMA3_IPRH	drivers/dma/ti-edma3.c	/^#define EDMA3_IPRH	/;"	d	file:
EDMA3_PARSET_NULL_LINK	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_PARSET_NULL_LINK	/;"	d
EDMA3_QCHMAP	drivers/dma/ti-edma3.c	/^#define EDMA3_QCHMAP(/;"	d	file:
EDMA3_QEECR	drivers/dma/ti-edma3.c	/^#define EDMA3_QEECR	/;"	d	file:
EDMA3_QEESR	drivers/dma/ti-edma3.c	/^#define EDMA3_QEESR	/;"	d	file:
EDMA3_QEMCR	drivers/dma/ti-edma3.c	/^#define EDMA3_QEMCR	/;"	d	file:
EDMA3_QSECR	drivers/dma/ti-edma3.c	/^#define EDMA3_QSECR	/;"	d	file:
EDMA3_SLOPT_AB_SYNC	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_AB_SYNC	/;"	d
EDMA3_SLOPT_COMP_CODE	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_COMP_CODE(/;"	d
EDMA3_SLOPT_DST_ADDR_CONST_MODE	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_DST_ADDR_CONST_MODE	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_128	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_128	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_16	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_16	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_256	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_256	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_32	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_32	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_64	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_64	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_8	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_8	/;"	d
EDMA3_SLOPT_FIFO_WIDTH_MASK	drivers/dma/ti-edma3.c	/^#define EDMA3_SLOPT_FIFO_WIDTH_MASK	/;"	d	file:
EDMA3_SLOPT_FIFO_WIDTH_SET	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_FIFO_WIDTH_SET(/;"	d
EDMA3_SLOPT_INTERM_COMP_CHAIN_ENB	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_INTERM_COMP_CHAIN_ENB	/;"	d
EDMA3_SLOPT_INTERM_COMP_INT_ENB	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_INTERM_COMP_INT_ENB	/;"	d
EDMA3_SLOPT_PRIV_ID	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_PRIV_ID(/;"	d
EDMA3_SLOPT_PRIV_LEVEL	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_PRIV_LEVEL	/;"	d
EDMA3_SLOPT_SRC_ADDR_CONST_MODE	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_SRC_ADDR_CONST_MODE	/;"	d
EDMA3_SLOPT_STATIC	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_STATIC	/;"	d
EDMA3_SLOPT_TRANS_COMP_CHAIN_ENB	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_TRANS_COMP_CHAIN_ENB	/;"	d
EDMA3_SLOPT_TRANS_COMP_INT_ENB	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_SLOPT_TRANS_COMP_INT_ENB	/;"	d
EDMA3_SL_BASE	drivers/dma/ti-edma3.c	/^#define EDMA3_SL_BASE(/;"	d	file:
EDMA3_SL_MAX_NUM	drivers/dma/ti-edma3.c	/^#define EDMA3_SL_MAX_NUM	/;"	d	file:
EDMA3_TWORD	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define EDMA3_TWORD(/;"	d
EDMA_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define EDMA_BASE_ADDR	/;"	d
EDMA_CDTR	drivers/block/sata_mv.c	/^#define EDMA_CDTR	/;"	d	file:
EDMA_CFG	drivers/block/sata_mv.c	/^#define EDMA_CFG	/;"	d	file:
EDMA_CFG_EQUE	drivers/block/sata_mv.c	/^#define EDMA_CFG_EQUE	/;"	d	file:
EDMA_CFG_NCQ	drivers/block/sata_mv.c	/^#define EDMA_CFG_NCQ	/;"	d	file:
EDMA_CMD	drivers/block/sata_mv.c	/^#define EDMA_CMD	/;"	d	file:
EDMA_CMD_ATARST	drivers/block/sata_mv.c	/^#define EDMA_CMD_ATARST	/;"	d	file:
EDMA_CMD_DISEDMA	drivers/block/sata_mv.c	/^#define EDMA_CMD_DISEDMA	/;"	d	file:
EDMA_CMD_ENEDMA	drivers/block/sata_mv.c	/^#define EDMA_CMD_ENEDMA	/;"	d	file:
EDMA_CMD_FREEZE	drivers/block/sata_mv.c	/^#define EDMA_CMD_FREEZE	/;"	d	file:
EDMA_HLTCND	drivers/block/sata_mv.c	/^#define EDMA_HLTCND	/;"	d	file:
EDMA_IECR	drivers/block/sata_mv.c	/^#define EDMA_IECR	/;"	d	file:
EDMA_IEMR	drivers/block/sata_mv.c	/^#define EDMA_IEMR	/;"	d	file:
EDMA_IORTO	drivers/block/sata_mv.c	/^#define EDMA_IORTO	/;"	d	file:
EDMA_NTSR	drivers/block/sata_mv.c	/^#define EDMA_NTSR	/;"	d	file:
EDMA_RQBA_HI	drivers/block/sata_mv.c	/^#define EDMA_RQBA_HI	/;"	d	file:
EDMA_RQIPR	drivers/block/sata_mv.c	/^#define EDMA_RQIPR	/;"	d	file:
EDMA_RQIPR_IPMASK	drivers/block/sata_mv.c	/^#define EDMA_RQIPR_IPMASK	/;"	d	file:
EDMA_RQIPR_IPSHIFT	drivers/block/sata_mv.c	/^#define EDMA_RQIPR_IPSHIFT	/;"	d	file:
EDMA_RQOPR	drivers/block/sata_mv.c	/^#define EDMA_RQOPR	/;"	d	file:
EDMA_RQOPR_OPMASK	drivers/block/sata_mv.c	/^#define EDMA_RQOPR_OPMASK	/;"	d	file:
EDMA_RQOPR_OPSHIFT	drivers/block/sata_mv.c	/^#define EDMA_RQOPR_OPSHIFT	/;"	d	file:
EDMA_RSBA_HI	drivers/block/sata_mv.c	/^#define EDMA_RSBA_HI	/;"	d	file:
EDMA_RSIPR	drivers/block/sata_mv.c	/^#define EDMA_RSIPR	/;"	d	file:
EDMA_RSIPR_IPMASK	drivers/block/sata_mv.c	/^#define EDMA_RSIPR_IPMASK	/;"	d	file:
EDMA_RSIPR_IPSHIFT	drivers/block/sata_mv.c	/^#define EDMA_RSIPR_IPSHIFT	/;"	d	file:
EDMA_RSOPR	drivers/block/sata_mv.c	/^#define	EDMA_RSOPR	/;"	d	file:
EDMA_RSOPR_OPMASK	drivers/block/sata_mv.c	/^#define EDMA_RSOPR_OPMASK	/;"	d	file:
EDMA_RSOPR_OPSHIFT	drivers/block/sata_mv.c	/^#define EDMA_RSOPR_OPSHIFT	/;"	d	file:
EDMA_STATUS	drivers/block/sata_mv.c	/^#define EDMA_STATUS	/;"	d	file:
EDMA_TEST_CTL	drivers/block/sata_mv.c	/^#define EDMA_TEST_CTL	/;"	d	file:
EDMA_TIMER	drivers/block/sata_mv.c	/^#define EDMA_TIMER	/;"	d	file:
EDMR	arch/sh/include/asm/cpu_sh7724.h	/^#define EDMR	/;"	d
EDMR	drivers/net/sh_eth.h	/^	EDMR,$/;"	e	enum:__anon5ef54f5a0103
EDMR_DL0	drivers/net/sh_eth.h	/^	EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,$/;"	e	enum:DMAC_M_BIT
EDMR_DL1	drivers/net/sh_eth.h	/^	EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,$/;"	e	enum:DMAC_M_BIT
EDMR_EL	drivers/net/sh_eth.h	/^	EDMR_EL		= 0x40, \/* Litte endian *\/$/;"	e	enum:DMAC_M_BIT
EDMR_SRST	drivers/net/sh_eth.h	/^	EDMR_SRST	= 0x03, \/* Receive\/Send reset *\/$/;"	e	enum:DMAC_M_BIT
EDO	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
EDOCR	drivers/net/sh_eth.h	/^	EDOCR,$/;"	e	enum:__anon5ef54f5a0103
EDOM	include/linux/errno.h	/^#define	EDOM	/;"	d
EDOTDOT	include/linux/errno.h	/^#define	EDOTDOT	/;"	d
EDP_BLC_ENABLE	drivers/video/i915_reg.h	/^#define  EDP_BLC_ENABLE	/;"	d
EDP_FORCE_VDD	drivers/video/i915_reg.h	/^#define  EDP_FORCE_VDD	/;"	d
EDP_PANEL	drivers/video/i915_reg.h	/^#define  EDP_PANEL	/;"	d
EDQUOT	include/linux/errno.h	/^#define	EDQUOT	/;"	d
EDRAMBAR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define EDRAMBAR	/;"	d
EDRAM_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EDRAM_BASE_ADDRESS	/;"	d
EDRAM_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EDRAM_BASE_SIZE	/;"	d
EDRRR	drivers/net/sh_eth.h	/^	EDRRR,$/;"	e	enum:__anon5ef54f5a0103
EDRRR_R	drivers/net/sh_eth.h	/^	EDRRR_R = 0x01,$/;"	e	enum:EDRRR_R_BIT
EDRRR_R_BIT	drivers/net/sh_eth.h	/^enum EDRRR_R_BIT {$/;"	g
EDSR	drivers/net/sh_eth.h	/^	EDSR = 0,$/;"	e	enum:__anon5ef54f5a0103
EDSR_BIT	drivers/net/sh_eth.h	/^enum EDSR_BIT {$/;"	g
EDSR_ENALL	drivers/net/sh_eth.h	/^#define EDSR_ENALL /;"	d
EDSR_ENR	drivers/net/sh_eth.h	/^	EDSR_ENT = 0x01, EDSR_ENR = 0x02,$/;"	e	enum:EDSR_BIT
EDSR_ENT	drivers/net/sh_eth.h	/^	EDSR_ENT = 0x01, EDSR_ENR = 0x02,$/;"	e	enum:EDSR_BIT
EDSSI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define EDSSI	/;"	d
EDTPTI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define EDTPTI	/;"	d
EDTRR	drivers/net/sh_eth.h	/^	EDTRR,$/;"	e	enum:__anon5ef54f5a0103
EDTRR_TRNS	drivers/net/sh_eth.h	/^	EDTRR_TRNS = 0x03,$/;"	e	enum:DMAC_T_BIT
EDX	arch/x86/include/asm/ptrace.h	/^#define EDX /;"	d
ED_ALIGNMENT	drivers/usb/host/ohci.h	/^#define ED_ALIGNMENT /;"	d
ED_DEL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define ED_DEL	/;"	d
ED_DEL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define ED_DEL	/;"	d
ED_DEL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define ED_DEL	/;"	d
ED_DEL	drivers/usb/host/ohci-s3c24xx.h	/^#define ED_DEL	/;"	d
ED_DEL	drivers/usb/host/ohci.h	/^#define ED_DEL	/;"	d
ED_NEW	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define ED_NEW	/;"	d
ED_NEW	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define ED_NEW	/;"	d
ED_NEW	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define ED_NEW	/;"	d
ED_NEW	drivers/usb/host/ohci-s3c24xx.h	/^#define ED_NEW	/;"	d
ED_NEW	drivers/usb/host/ohci.h	/^#define ED_NEW	/;"	d
ED_OPER	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define ED_OPER	/;"	d
ED_OPER	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define ED_OPER	/;"	d
ED_OPER	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define ED_OPER	/;"	d
ED_OPER	drivers/usb/host/ohci-s3c24xx.h	/^#define ED_OPER	/;"	d
ED_OPER	drivers/usb/host/ohci.h	/^#define ED_OPER	/;"	d
ED_UNLINK	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define ED_UNLINK	/;"	d
ED_UNLINK	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define ED_UNLINK	/;"	d
ED_UNLINK	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define ED_UNLINK	/;"	d
ED_UNLINK	drivers/usb/host/ohci-s3c24xx.h	/^#define ED_UNLINK	/;"	d
ED_UNLINK	drivers/usb/host/ohci.h	/^#define ED_UNLINK	/;"	d
ED_URB_DEL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define ED_URB_DEL	/;"	d
ED_URB_DEL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define ED_URB_DEL	/;"	d
ED_URB_DEL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define ED_URB_DEL	/;"	d
ED_URB_DEL	drivers/usb/host/ohci-s3c24xx.h	/^#define ED_URB_DEL	/;"	d
ED_URB_DEL	drivers/usb/host/ohci.h	/^#define ED_URB_DEL	/;"	d
EE46_CMD_LEN	board/mpl/pati/pci_eeprom.h	/^#define EE46_CMD_LEN /;"	d
EE56_CMD_LEN	board/mpl/pati/pci_eeprom.h	/^#define EE56_CMD_LEN /;"	d
EE66_CMD_LEN	board/mpl/pati/pci_eeprom.h	/^#define EE66_CMD_LEN /;"	d
EEBA_CONFIG	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	EEBA_CONFIG,$/;"	e	enum:__anonc557e98b0103
EECLK	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void EECLK(int level)$/;"	f	typeref:typename:void	file:
EECLK_HIGH	drivers/net/ax88796.h	/^#define EECLK_HIGH	/;"	d
EECLK_LOW	drivers/net/ax88796.h	/^#define EECLK_LOW	/;"	d
EECONFIG_CAAM	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_CAAM,$/;"	e	enum:__anonf4dca2650103
EECONFIG_CSI0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_CSI0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_CSI1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_CSI1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ESPCI0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ESPCI0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ESPCI1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ESPCI1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ESPCI2	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ESPCI2,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ESPCI3	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ESPCI3,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ESPCI4	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ESPCI4,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ESPCI5	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ESPCI5,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ETH0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ETH0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_ETH1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_ETH1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_FLEXCAN	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_FLEXCAN,$/;"	e	enum:__anonf4dca2650103
EECONFIG_GPS	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_GPS,$/;"	e	enum:__anonf4dca2650103
EECONFIG_GSPBATT	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_GSPBATT,$/;"	e	enum:__anonf4dca2650103
EECONFIG_HDMI_IN	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_HDMI_IN,$/;"	e	enum:__anonf4dca2650103
EECONFIG_HDMI_OUT	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_HDMI_OUT,$/;"	e	enum:__anonf4dca2650103
EECONFIG_I2C0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_I2C0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_I2C1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_I2C1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_I2C2	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_I2C2,$/;"	e	enum:__anonf4dca2650103
EECONFIG_IPU0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_IPU0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_IPU1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_IPU1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_LCD	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_LCD,$/;"	e	enum:__anonf4dca2650103
EECONFIG_LVDS0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_LVDS0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_LVDS1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_LVDS1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_MEZZ	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_MEZZ,$/;"	e	enum:__anonf4dca2650103
EECONFIG_MIPI_CSI	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_MIPI_CSI,$/;"	e	enum:__anonf4dca2650103
EECONFIG_MIPI_DSI	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_MIPI_DSI,$/;"	e	enum:__anonf4dca2650103
EECONFIG_NAND	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_NAND,$/;"	e	enum:__anonf4dca2650103
EECONFIG_PCIE	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_PCIE,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES10	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES10,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES11	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES11,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES12	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES12,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES13	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES13,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES14	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES14,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES15	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES15,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES2	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES2,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES3	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES3,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES4	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES4,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES5	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES5,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES6	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES6,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES8	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES8,$/;"	e	enum:__anonf4dca2650103
EECONFIG_RES9	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_RES9,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SATA	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SATA,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SD0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SD0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SD1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SD1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SD2	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SD2,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SD3	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SD3,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SPIFL0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SPIFL0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SPIFL1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SPIFL1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SSI0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SSI0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_SSI1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_SSI1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_TZASC0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_TZASC0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_TZASC1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_TZASC1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_UART0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_UART0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_UART1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_UART1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_UART2	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_UART2,$/;"	e	enum:__anonf4dca2650103
EECONFIG_UART3	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_UART3,$/;"	e	enum:__anonf4dca2650103
EECONFIG_UART4	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_UART4,$/;"	e	enum:__anonf4dca2650103
EECONFIG_USB0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_USB0,$/;"	e	enum:__anonf4dca2650103
EECONFIG_USB1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_USB1,$/;"	e	enum:__anonf4dca2650103
EECONFIG_VID_IN	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_VID_IN,$/;"	e	enum:__anonf4dca2650103
EECONFIG_VID_OUT	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_VID_OUT,$/;"	e	enum:__anonf4dca2650103
EECONFIG_VPU	board/gateworks/gw_ventana/ventana_eeprom.h	/^	EECONFIG_VPU,$/;"	e	enum:__anonf4dca2650103
EECS	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void EECS(int level)$/;"	f	typeref:typename:void	file:
EECS_HIGH	drivers/net/ax88796.h	/^#define EECS_HIGH	/;"	d
EECS_LOW	drivers/net/ax88796.h	/^#define EECS_LOW	/;"	d
EECtrl	drivers/net/natsemi.c	/^	EECtrl		= 0x08,$/;"	e	enum:register_offsets	file:
EECtrl	drivers/net/ns8382x.c	/^	EECtrl = 0x08,$/;"	e	enum:register_offsets	file:
EEDI	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void EEDI(int level)$/;"	f	typeref:typename:void	file:
EEDI_HIGH	drivers/net/ax88796.h	/^#define EEDI_HIGH	/;"	d
EEDI_LOW	drivers/net/ax88796.h	/^#define EEDI_LOW	/;"	d
EEDO	drivers/net/ax88796.h	/^#define EEDO	/;"	d
EEE10_EN	drivers/usb/eth/r8152.h	/^#define EEE10_EN	/;"	d
EEEP_CR_EEEP_TX	drivers/usb/eth/r8152.h	/^#define EEEP_CR_EEEP_TX	/;"	d
EEE_10_CAP	drivers/usb/eth/r8152.h	/^#define EEE_10_CAP	/;"	d
EEE_CLKDIV_EN	drivers/usb/eth/r8152.h	/^#define EEE_CLKDIV_EN	/;"	d
EEE_NWAY_EN	drivers/usb/eth/r8152.h	/^#define EEE_NWAY_EN	/;"	d
EEE_RX_EN	drivers/usb/eth/r8152.h	/^#define EEE_RX_EN	/;"	d
EEE_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define EEE_SPDWN_EN	/;"	d
EEE_SPDWN_RATIO	drivers/usb/eth/r8152.h	/^#define EEE_SPDWN_RATIO	/;"	d
EEE_TX_EN	drivers/usb/eth/r8152.h	/^#define EEE_TX_EN	/;"	d
EEPCR_EECS	drivers/net/ks8851_mll.h	/^#define EEPCR_EECS	/;"	d
EEPCR_EEDO	drivers/net/ks8851_mll.h	/^#define EEPCR_EEDO	/;"	d
EEPCR_EESA	drivers/net/ks8851_mll.h	/^#define EEPCR_EESA	/;"	d
EEPCR_EESB	drivers/net/ks8851_mll.h	/^#define EEPCR_EESB	/;"	d
EEPCR_EESCK	drivers/net/ks8851_mll.h	/^#define EEPCR_EESCK	/;"	d
EEPROM	examples/standalone/smc91111_eeprom.c	/^#define EEPROM	/;"	d	file:
EEPROM_A8_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_A8_OPCODE_SPI /;"	d
EEPROM_ACTION_INVALID	cmd/eeprom.c	/^	EEPROM_ACTION_INVALID,$/;"	e	enum:eeprom_action	file:
EEPROM_ADDR	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_ADDR	/;"	d
EEPROM_ADDR_CHIP	include/configs/draco.h	/^#define EEPROM_ADDR_CHIP /;"	d
EEPROM_ADDR_CHIP	include/configs/etamin.h	/^#define EEPROM_ADDR_CHIP /;"	d
EEPROM_ADDR_CHIP	include/configs/rastaban.h	/^#define EEPROM_ADDR_CHIP /;"	d
EEPROM_ADDR_CHIP	include/configs/thuban.h	/^#define EEPROM_ADDR_CHIP /;"	d
EEPROM_ADDR_DDR3	include/configs/draco.h	/^#define EEPROM_ADDR_DDR3 /;"	d
EEPROM_ADDR_DDR3	include/configs/etamin.h	/^#define EEPROM_ADDR_DDR3 /;"	d
EEPROM_ADDR_DDR3	include/configs/rastaban.h	/^#define EEPROM_ADDR_DDR3 /;"	d
EEPROM_ADDR_DDR3	include/configs/thuban.h	/^#define EEPROM_ADDR_DDR3 /;"	d
EEPROM_ADDR_ETHADDR	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_ADDR_ETHADDR	/;"	d
EEPROM_ADDR_IDENT	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_ADDR_IDENT	/;"	d
EEPROM_ADDR_LEN_SYS	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_ADDR_LEN_SYS	/;"	d
EEPROM_ADDR_LEN_SYSCFG	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_ADDR_LEN_SYSCFG	/;"	d
EEPROM_ALTER_FREQ	board/amcc/makalu/cmd_pll.c	/^#define EEPROM_ALTER_FREQ(/;"	d	file:
EEPROM_CFG	drivers/net/e1000.h	/^#define EEPROM_CFG /;"	d
EEPROM_CHECKSUM_REG	drivers/net/e1000.h	/^#define EEPROM_CHECKSUM_REG /;"	d
EEPROM_COMPAT	drivers/net/e1000.h	/^#define EEPROM_COMPAT /;"	d
EEPROM_COMPAT_CLIENT	drivers/net/e1000.h	/^#define EEPROM_COMPAT_CLIENT /;"	d
EEPROM_COMPAT_SERVER	drivers/net/e1000.h	/^#define EEPROM_COMPAT_SERVER /;"	d
EEPROM_CONF_OFFSET	board/amcc/makalu/cmd_pll.c	/^#define EEPROM_CONF_OFFSET	/;"	d	file:
EEPROM_Cmds	drivers/net/natsemi.c	/^enum EEPROM_Cmds {$/;"	g	file:
EEPROM_Ctrl_Bits	drivers/net/natsemi.c	/^enum EEPROM_Ctrl_Bits {$/;"	g	file:
EEPROM_ERASE256_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_ERASE256_OPCODE_SPI /;"	d
EEPROM_ERASE4K_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_ERASE4K_OPCODE_SPI /;"	d
EEPROM_ERASE64K_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_ERASE64K_OPCODE_SPI /;"	d
EEPROM_ERASE_CMD	drivers/net/cs8900.h	/^#define EEPROM_ERASE_CMD	/;"	d
EEPROM_ERASE_OPCODE	drivers/net/e1000.h	/^#define EEPROM_ERASE_OPCODE /;"	d
EEPROM_ERASE_OPCODE_MICROWIRE	drivers/net/e1000.h	/^#define EEPROM_ERASE_OPCODE_MICROWIRE /;"	d
EEPROM_EWDS_OPCODE	drivers/net/e1000.h	/^#define EEPROM_EWDS_OPCODE /;"	d
EEPROM_EWDS_OPCODE_MICROWIRE	drivers/net/e1000.h	/^#define EEPROM_EWDS_OPCODE_MICROWIRE /;"	d
EEPROM_EWEN_OPCODE	drivers/net/e1000.h	/^#define EEPROM_EWEN_OPCODE /;"	d
EEPROM_EWEN_OPCODE_MICROWIRE	drivers/net/e1000.h	/^#define EEPROM_EWEN_OPCODE_MICROWIRE /;"	d
EEPROM_FATORYSET_OFFSET	board/siemens/common/factoryset.c	/^#define EEPROM_FATORYSET_OFFSET	/;"	d	file:
EEPROM_FLASH_VERSION	drivers/net/e1000.h	/^#define EEPROM_FLASH_VERSION /;"	d
EEPROM_I2C_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define EEPROM_I2C_ADDR	/;"	d
EEPROM_I2C_ADDR	board/lego/ev3/legoev3.c	/^#define EEPROM_I2C_ADDR	/;"	d	file:
EEPROM_IDENT	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_IDENT	/;"	d
EEPROM_ID_LED_SETTINGS	drivers/net/e1000.h	/^#define EEPROM_ID_LED_SETTINGS /;"	d
EEPROM_INIT_3GIO_3	drivers/net/e1000.h	/^#define EEPROM_INIT_3GIO_3 /;"	d
EEPROM_INIT_CONTROL1_REG	drivers/net/e1000.h	/^#define EEPROM_INIT_CONTROL1_REG /;"	d
EEPROM_INIT_CONTROL2_REG	drivers/net/e1000.h	/^#define EEPROM_INIT_CONTROL2_REG /;"	d
EEPROM_INIT_CONTROL3_PORT_A	drivers/net/e1000.h	/^#define EEPROM_INIT_CONTROL3_PORT_A /;"	d
EEPROM_INIT_CONTROL3_PORT_B	drivers/net/e1000.h	/^#define EEPROM_INIT_CONTROL3_PORT_B /;"	d
EEPROM_LAYOUT_VER_OFFSET	board/compulab/common/eeprom.c	/^#define EEPROM_LAYOUT_VER_OFFSET	/;"	d	file:
EEPROM_LEN	board/intercontrol/digsy_mtc/eeprom.h	/^#define EEPROM_LEN	/;"	d
EEPROM_MAC_OFFSET	board/lego/ev3/legoev3.c	/^#define EEPROM_MAC_OFFSET	/;"	d	file:
EEPROM_MAC_OFFSET	drivers/usb/eth/smsc95xx.c	/^#define EEPROM_MAC_OFFSET	/;"	d	file:
EEPROM_MAC_OFFSET_1	drivers/net/lan91c96.h	/^#define EEPROM_MAC_OFFSET_1 /;"	d
EEPROM_MAC_OFFSET_2	drivers/net/lan91c96.h	/^#define EEPROM_MAC_OFFSET_2 /;"	d
EEPROM_MAC_OFFSET_3	drivers/net/lan91c96.h	/^#define EEPROM_MAC_OFFSET_3 /;"	d
EEPROM_MAX_RETRY_SPI	drivers/net/e1000.h	/^#define EEPROM_MAX_RETRY_SPI /;"	d
EEPROM_NODE_ADDRESS_BYTE_0	drivers/net/e1000.h	/^#define EEPROM_NODE_ADDRESS_BYTE_0 /;"	d
EEPROM_PAGE_OFFSET	cmd/eeprom.c	/^#define	EEPROM_PAGE_OFFSET(/;"	d	file:
EEPROM_PAGE_SIZE	cmd/eeprom.c	/^#define	EEPROM_PAGE_SIZE	/;"	d	file:
EEPROM_PBA_BYTE_1	drivers/net/e1000.h	/^#define EEPROM_PBA_BYTE_1	/;"	d
EEPROM_PHY_CLASS_A	drivers/net/e1000.h	/^#define EEPROM_PHY_CLASS_A /;"	d
EEPROM_PHY_CLASS_WORD	drivers/net/e1000.h	/^#define EEPROM_PHY_CLASS_WORD /;"	d
EEPROM_PRINT	cmd/eeprom.c	/^	EEPROM_PRINT,$/;"	e	enum:eeprom_action	file:
EEPROM_RDSR_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_RDSR_OPCODE_SPI /;"	d
EEPROM_READ	cmd/eeprom.c	/^	EEPROM_READ,$/;"	e	enum:eeprom_action	file:
EEPROM_READ_CMD	drivers/net/cs8900.h	/^#define EEPROM_READ_CMD	/;"	d
EEPROM_READ_OPCODE	drivers/net/e1000.h	/^#define EEPROM_READ_OPCODE /;"	d
EEPROM_READ_OPCODE_MICROWIRE	drivers/net/e1000.h	/^#define EEPROM_READ_OPCODE_MICROWIRE /;"	d
EEPROM_READ_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_READ_OPCODE_SPI /;"	d
EEPROM_RESERVED_WORD	drivers/net/e1000.h	/^#define EEPROM_RESERVED_WORD /;"	d
EEPROM_REV_OFFSET	board/lego/ev3/legoev3.c	/^#define EEPROM_REV_OFFSET	/;"	d	file:
EEPROM_SDSTP_PARAM	board/amcc/makalu/cmd_pll.c	/^#define EEPROM_SDSTP_PARAM	/;"	d	file:
EEPROM_SERDES_AMPLITUDE	drivers/net/e1000.h	/^#define EEPROM_SERDES_AMPLITUDE /;"	d
EEPROM_SIZE	drivers/net/natsemi.c	/^#define EEPROM_SIZE /;"	d	file:
EEPROM_SIZE_MASK	drivers/net/e1000.h	/^#define EEPROM_SIZE_MASK /;"	d
EEPROM_SIZE_SHIFT	drivers/net/e1000.h	/^#define EEPROM_SIZE_SHIFT /;"	d
EEPROM_STATUS_BP0_SPI	drivers/net/e1000.h	/^#define EEPROM_STATUS_BP0_SPI /;"	d
EEPROM_STATUS_BP1_SPI	drivers/net/e1000.h	/^#define EEPROM_STATUS_BP1_SPI /;"	d
EEPROM_STATUS_RDY_SPI	drivers/net/e1000.h	/^#define EEPROM_STATUS_RDY_SPI /;"	d
EEPROM_STATUS_WEN_SPI	drivers/net/e1000.h	/^#define EEPROM_STATUS_WEN_SPI /;"	d
EEPROM_STATUS_WPEN_SPI	drivers/net/e1000.h	/^#define EEPROM_STATUS_WPEN_SPI /;"	d
EEPROM_SUM	drivers/net/e1000.h	/^#define EEPROM_SUM /;"	d
EEPROM_SWDEF_PINS_CTRL_PORT_0	drivers/net/e1000.h	/^#define EEPROM_SWDEF_PINS_CTRL_PORT_0 /;"	d
EEPROM_SWDEF_PINS_CTRL_PORT_1	drivers/net/e1000.h	/^#define EEPROM_SWDEF_PINS_CTRL_PORT_1 /;"	d
EEPROM_TEST_OFFSET	board/amcc/makalu/cmd_pll.c	/^#define EEPROM_TEST_OFFSET	/;"	d	file:
EEPROM_UPDATE	cmd/eeprom.c	/^	EEPROM_UPDATE,$/;"	e	enum:eeprom_action	file:
EEPROM_VERSION	drivers/net/e1000.h	/^#define EEPROM_VERSION /;"	d
EEPROM_WORD0A_66MHZ	drivers/net/e1000.h	/^#define EEPROM_WORD0A_66MHZ /;"	d
EEPROM_WORD0A_FD	drivers/net/e1000.h	/^#define EEPROM_WORD0A_FD /;"	d
EEPROM_WORD0A_ILOS	drivers/net/e1000.h	/^#define EEPROM_WORD0A_ILOS /;"	d
EEPROM_WORD0A_LRST	drivers/net/e1000.h	/^#define EEPROM_WORD0A_LRST /;"	d
EEPROM_WORD0A_SWDPIO	drivers/net/e1000.h	/^#define EEPROM_WORD0A_SWDPIO /;"	d
EEPROM_WORD0F_ANE	drivers/net/e1000.h	/^#define EEPROM_WORD0F_ANE	/;"	d
EEPROM_WORD0F_ASM_DIR	drivers/net/e1000.h	/^#define EEPROM_WORD0F_ASM_DIR	/;"	d
EEPROM_WORD0F_PAUSE	drivers/net/e1000.h	/^#define EEPROM_WORD0F_PAUSE	/;"	d
EEPROM_WORD0F_PAUSE_MASK	drivers/net/e1000.h	/^#define EEPROM_WORD0F_PAUSE_MASK /;"	d
EEPROM_WORD0F_SWPDIO_EXT	drivers/net/e1000.h	/^#define EEPROM_WORD0F_SWPDIO_EXT /;"	d
EEPROM_WORD_SIZE_SHIFT	drivers/net/e1000.h	/^#define EEPROM_WORD_SIZE_SHIFT /;"	d
EEPROM_WRDI_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_WRDI_OPCODE_SPI /;"	d
EEPROM_WREN_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_WREN_OPCODE_SPI /;"	d
EEPROM_WRITE	cmd/eeprom.c	/^	EEPROM_WRITE,$/;"	e	enum:eeprom_action	file:
EEPROM_WRITE_CMD	drivers/net/cs8900.h	/^#define EEPROM_WRITE_CMD	/;"	d
EEPROM_WRITE_DIS	drivers/net/cs8900.h	/^#define EEPROM_WRITE_DIS	/;"	d
EEPROM_WRITE_EN	drivers/net/cs8900.h	/^#define EEPROM_WRITE_EN	/;"	d
EEPROM_WRITE_OPCODE	drivers/net/e1000.h	/^#define EEPROM_WRITE_OPCODE /;"	d
EEPROM_WRITE_OPCODE_MICROWIRE	drivers/net/e1000.h	/^#define EEPROM_WRITE_OPCODE_MICROWIRE /;"	d
EEPROM_WRITE_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_WRITE_OPCODE_SPI /;"	d
EEPROM_WRSR_OPCODE_SPI	drivers/net/e1000.h	/^#define EEPROM_WRSR_OPCODE_SPI /;"	d
EEPROM_W_Data_8169_A	board/renesas/sh7785lcr/rtl8169.h	/^const unsigned short EEPROM_W_Data_8169_A[] = {$/;"	v	typeref:typename:const unsigned short[]
EEPROM_W_Data_8169_B	board/renesas/sh7785lcr/rtl8169.h	/^const unsigned short EEPROM_W_Data_8169_B[] = {$/;"	v	typeref:typename:const unsigned short[]
EEPR_PG_SZ	board/siemens/common/factoryset.c	/^#define EEPR_PG_SZ	/;"	d	file:
EEP_BUSY	drivers/usb/eth/asix88179.c	/^	#define EEP_BUSY	/;"	d	file:
EEP_OPC_ERASE	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_ERASE	/;"	d	file:
EEP_OPC_ERASE_ALL	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_ERASE_ALL	/;"	d	file:
EEP_OPC_ERASE_DIS	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_ERASE_DIS	/;"	d	file:
EEP_OPC_ERASE_EN	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_ERASE_EN	/;"	d	file:
EEP_OPC_READ	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_READ	/;"	d	file:
EEP_OPC_WRITE	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_WRITE	/;"	d	file:
EEP_OPC_WRITE_ALL	drivers/mtd/mw_eeprom.c	/^#define EEP_OPC_WRITE_ALL	/;"	d	file:
EEP_RD	drivers/usb/eth/asix88179.c	/^	#define EEP_RD	/;"	d	file:
EESIPR	drivers/net/sh_eth.h	/^	EESIPR,$/;"	e	enum:__anon5ef54f5a0103
EESR	drivers/net/sh_eth.h	/^	EESR,$/;"	e	enum:__anon5ef54f5a0103
EESR_ADE	drivers/net/sh_eth.h	/^	EESR_ADE  = 0x00800000,$/;"	e	enum:EESR_BIT
EESR_BIT	drivers/net/sh_eth.h	/^enum EESR_BIT {$/;"	g
EESR_CD	drivers/net/sh_eth.h	/^	EESR_CD   = 0x00000200, EESR_RTO  = 0x00000100,$/;"	e	enum:EESR_BIT
EESR_CEEF	drivers/net/sh_eth.h	/^	EESR_RMAF = 0x00000080, EESR_CEEF = 0x00000040,$/;"	e	enum:EESR_BIT
EESR_CELF	drivers/net/sh_eth.h	/^	EESR_CELF = 0x00000020, EESR_RRF  = 0x00000010,$/;"	e	enum:EESR_BIT
EESR_CERF	drivers/net/sh_eth.h	/^	EESR_PRE  = 0x00000002, EESR_CERF = 0x00000001,$/;"	e	enum:EESR_BIT
EESR_CND	drivers/net/sh_eth.h	/^	EESR_CND  = 0x00000800,$/;"	e	enum:EESR_BIT
EESR_DLC	drivers/net/sh_eth.h	/^	EESR_DLC  = 0x00000400,$/;"	e	enum:EESR_BIT
EESR_ECI	drivers/net/sh_eth.h	/^	EESR_ECI  = 0x00400000,$/;"	e	enum:EESR_BIT
EESR_ERR_CHECK	drivers/net/sh_eth.h	/^# define EESR_ERR_CHECK	/;"	d
EESR_FRC	drivers/net/sh_eth.h	/^	EESR_TFE  = 0x00080000, EESR_FRC  = 0x00040000,$/;"	e	enum:EESR_BIT
EESR_FTC	drivers/net/sh_eth.h	/^	EESR_FTC  = 0x00200000, EESR_TDE  = 0x00100000,$/;"	e	enum:EESR_BIT
EESR_PRE	drivers/net/sh_eth.h	/^	EESR_PRE  = 0x00000002, EESR_CERF = 0x00000001,$/;"	e	enum:EESR_BIT
EESR_RABT	drivers/net/sh_eth.h	/^	EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000,$/;"	e	enum:EESR_BIT
EESR_RDE	drivers/net/sh_eth.h	/^	EESR_RDE  = 0x00020000, EESR_RFE  = 0x00010000,$/;"	e	enum:EESR_BIT
EESR_RFE	drivers/net/sh_eth.h	/^	EESR_RDE  = 0x00020000, EESR_RFE  = 0x00010000,$/;"	e	enum:EESR_BIT
EESR_RFRMER	drivers/net/sh_eth.h	/^	EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000,$/;"	e	enum:EESR_BIT
EESR_RMAF	drivers/net/sh_eth.h	/^	EESR_RMAF = 0x00000080, EESR_CEEF = 0x00000040,$/;"	e	enum:EESR_BIT
EESR_RRF	drivers/net/sh_eth.h	/^	EESR_CELF = 0x00000020, EESR_RRF  = 0x00000010,$/;"	e	enum:EESR_BIT
EESR_RTLF	drivers/net/sh_eth.h	/^	EESR_RTLF = 0x00000008, EESR_RTSF = 0x00000004,$/;"	e	enum:EESR_BIT
EESR_RTO	drivers/net/sh_eth.h	/^	EESR_CD   = 0x00000200, EESR_RTO  = 0x00000100,$/;"	e	enum:EESR_BIT
EESR_RTSF	drivers/net/sh_eth.h	/^	EESR_RTLF = 0x00000008, EESR_RTSF = 0x00000004,$/;"	e	enum:EESR_BIT
EESR_TABT	drivers/net/sh_eth.h	/^	EESR_TABT = 0x04000000,$/;"	e	enum:EESR_BIT
EESR_TDE	drivers/net/sh_eth.h	/^	EESR_FTC  = 0x00200000, EESR_TDE  = 0x00100000,$/;"	e	enum:EESR_BIT
EESR_TFE	drivers/net/sh_eth.h	/^	EESR_TFE  = 0x00080000, EESR_FRC  = 0x00040000,$/;"	e	enum:EESR_BIT
EESR_TWB	drivers/net/sh_eth.h	/^	EESR_TWB  = 0x40000000,$/;"	e	enum:EESR_BIT
EEXIST	fs/yaffs2/yportenv.h	/^#define EEXIST /;"	d
EEXIST	include/linux/errno.h	/^#define	EEXIST	/;"	d
EE_CMD_BITS	drivers/net/eepro100.c	/^#define EE_CMD_BITS	/;"	d	file:
EE_CS	drivers/net/eepro100.c	/^#define EE_CS	/;"	d	file:
EE_CS	drivers/net/rtl8139.c	/^#define EE_CS	/;"	d	file:
EE_ChipSelect	drivers/net/natsemi.c	/^	EE_ChipSelect = 0x08,$/;"	e	enum:EEPROM_Ctrl_Bits	file:
EE_DATA_BITS	drivers/net/eepro100.c	/^#define EE_DATA_BITS	/;"	d	file:
EE_DATA_READ	drivers/net/dc2114x.c	/^#define EE_DATA_READ	/;"	d	file:
EE_DATA_READ	drivers/net/eepro100.c	/^#define EE_DATA_READ	/;"	d	file:
EE_DATA_READ	drivers/net/rtl8139.c	/^#define EE_DATA_READ	/;"	d	file:
EE_DATA_WRITE	drivers/net/dc2114x.c	/^#define EE_DATA_WRITE	/;"	d	file:
EE_DATA_WRITE	drivers/net/eepro100.c	/^#define EE_DATA_WRITE	/;"	d	file:
EE_DATA_WRITE	drivers/net/rtl8139.c	/^#define EE_DATA_WRITE	/;"	d	file:
EE_DataIn	drivers/net/natsemi.c	/^	EE_DataIn = 0x01,$/;"	e	enum:EEPROM_Ctrl_Bits	file:
EE_DataOut	drivers/net/natsemi.c	/^	EE_DataOut = 0x02$/;"	e	enum:EEPROM_Ctrl_Bits	file:
EE_ENB	drivers/net/eepro100.c	/^#define EE_ENB	/;"	d	file:
EE_ENB	drivers/net/rtl8139.c	/^#define EE_ENB	/;"	d	file:
EE_ERASE_CMD	drivers/net/eepro100.c	/^#define EE_ERASE_CMD	/;"	d	file:
EE_ERASE_CMD	drivers/net/rtl8139.c	/^#define EE_ERASE_CMD	/;"	d	file:
EE_EWENB_CMD	drivers/net/eepro100.c	/^#define EE_EWENB_CMD	/;"	d	file:
EE_EraseCmd	drivers/net/natsemi.c	/^	EE_ReadCmd = (6 << 6), EE_EraseCmd = (7 << 6),$/;"	e	enum:EEPROM_Cmds	file:
EE_OFF	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^#define EE_OFF	/;"	d	file:
EE_PRCLEAR	board/mpl/pati/pci_eeprom.h	/^#define EE_PRCLEAR /;"	d
EE_PRDS	board/mpl/pati/pci_eeprom.h	/^#define EE_PRDS /;"	d
EE_PREN	board/mpl/pati/pci_eeprom.h	/^#define EE_PREN /;"	d
EE_PRREAD	board/mpl/pati/pci_eeprom.h	/^#define EE_PRREAD /;"	d
EE_PRWRITE	board/mpl/pati/pci_eeprom.h	/^#define EE_PRWRITE /;"	d
EE_READ	board/mpl/pati/pci_eeprom.h	/^#define EE_READ /;"	d
EE_READ_CMD	drivers/net/eepro100.c	/^#define EE_READ_CMD	/;"	d	file:
EE_READ_CMD	drivers/net/rtl8139.c	/^#define EE_READ_CMD	/;"	d	file:
EE_ReadCmd	drivers/net/natsemi.c	/^	EE_ReadCmd = (6 << 6), EE_EraseCmd = (7 << 6),$/;"	e	enum:EEPROM_Cmds	file:
EE_SHIFT_CLK	drivers/net/eepro100.c	/^#define EE_SHIFT_CLK	/;"	d	file:
EE_SHIFT_CLK	drivers/net/rtl8139.c	/^#define EE_SHIFT_CLK	/;"	d	file:
EE_ShiftClk	drivers/net/natsemi.c	/^	EE_ShiftClk = 0x04,$/;"	e	enum:EEPROM_Ctrl_Bits	file:
EE_WDS	board/mpl/pati/pci_eeprom.h	/^#define EE_WDS /;"	d
EE_WRALL	board/mpl/pati/pci_eeprom.h	/^#define EE_WRALL /;"	d
EE_WREN	board/mpl/pati/pci_eeprom.h	/^#define EE_WREN /;"	d
EE_WRITE	board/mpl/pati/pci_eeprom.h	/^#define EE_WRITE /;"	d
EE_WRITE_0	drivers/net/dc2114x.c	/^#define EE_WRITE_0	/;"	d	file:
EE_WRITE_0	drivers/net/eepro100.c	/^#define EE_WRITE_0	/;"	d	file:
EE_WRITE_0	drivers/net/rtl8139.c	/^#define EE_WRITE_0	/;"	d	file:
EE_WRITE_1	drivers/net/dc2114x.c	/^#define EE_WRITE_1	/;"	d	file:
EE_WRITE_1	drivers/net/eepro100.c	/^#define EE_WRITE_1	/;"	d	file:
EE_WRITE_1	drivers/net/rtl8139.c	/^#define EE_WRITE_1	/;"	d	file:
EE_WRITE_CMD	drivers/net/eepro100.c	/^#define EE_WRITE_CMD	/;"	d	file:
EE_WRITE_CMD	drivers/net/rtl8139.c	/^#define EE_WRITE_CMD	/;"	d	file:
EE_WrEnCmd	drivers/net/natsemi.c	/^	EE_WrEnCmd = (4 << 6), EE_WriteCmd = (5 << 6),$/;"	e	enum:EEPROM_Cmds	file:
EE_Write0	drivers/net/natsemi.c	/^#define EE_Write0 /;"	d	file:
EE_Write1	drivers/net/natsemi.c	/^#define EE_Write1 /;"	d	file:
EE_WriteCmd	drivers/net/natsemi.c	/^	EE_WrEnCmd = (4 << 6), EE_WriteCmd = (5 << 6),$/;"	e	enum:EEPROM_Cmds	file:
EFAULT	fs/yaffs2/yportenv.h	/^#define EFAULT /;"	d
EFAULT	include/linux/errno.h	/^#define	EFAULT	/;"	d
EFBIG	include/linux/errno.h	/^#define	EFBIG	/;"	d
EFER_FFXSR	arch/x86/include/asm/msr-index.h	/^#define EFER_FFXSR	/;"	d
EFER_LMA	arch/x86/include/asm/msr-index.h	/^#define EFER_LMA	/;"	d
EFER_LME	arch/x86/include/asm/msr-index.h	/^#define EFER_LME	/;"	d
EFER_LMSLE	arch/x86/include/asm/msr-index.h	/^#define EFER_LMSLE	/;"	d
EFER_NX	arch/x86/include/asm/msr-index.h	/^#define EFER_NX	/;"	d
EFER_SCE	arch/x86/include/asm/msr-index.h	/^#define EFER_SCE	/;"	d
EFER_SVME	arch/x86/include/asm/msr-index.h	/^#define EFER_SVME	/;"	d
EFI	lib/efi/Kconfig	/^config EFI$/;"	c
EFIAPI	include/efi.h	/^#define EFIAPI /;"	d
EFIAPI	include/efi_api.h	/^	void (EFIAPI *arp)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* arp)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *copy_mem)(void *destination, void *source,$/;"	m	struct:efi_boot_services	typeref:typename:void (* copy_mem)(void * destination,void * source,unsigned long length)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *dhcp)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* dhcp)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *discover)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* discover)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *mftp)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* mftp)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *reset_system)(enum efi_reset_type reset_type,$/;"	m	struct:efi_runtime_services	typeref:typename:void (* reset_system)(enum efi_reset_type reset_type,efi_status_t reset_status,unsigned long data_size,void * reset_data)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *restore_tpl)(unsigned long old_tpl);$/;"	m	struct:efi_boot_services	typeref:typename:void (* restore_tpl)(unsigned long old_tpl)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *set_mem)(void *buffer, unsigned long size,$/;"	m	struct:efi_boot_services	typeref:typename:void (* set_mem)(void * buffer,unsigned long size,uint8_t value)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *setipfilter)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* setipfilter)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *setpackets)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* setpackets)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *setparams)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* setparams)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *setstationip)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* setstationip)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *start)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* start)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *stop)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* stop)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *udpread)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* udpread)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *udpwrite)(void);$/;"	m	struct:efi_pxe	typeref:typename:void (* udpwrite)(void)
EFIAPI	include/efi_api.h	/^	void (EFIAPI *waitforpacket)(void);$/;"	m	struct:efi_simple_network	typeref:typename:void (* waitforpacket)(void)
EFIAPI	lib/efi_loader/efi_boottime.c	/^	void (EFIAPI *notify_function) (void *event, void *context);$/;"	m	struct:__anonb3c3434b0108	typeref:typename:void (* notify_function)(void * event,void * context)	file:
EFIARCH	arch/x86/config.mk	/^EFIARCH = ia32$/;"	m
EFIARCH	arch/x86/config.mk	/^EFIARCH = x86_64$/;"	m
EFIET_END	include/efi.h	/^	EFIET_END,	\/* Signals this is the last (empty) entry *\/$/;"	e	enum:efi_entry_t
EFIET_MEMORY_COUNT	include/efi.h	/^	EFIET_MEMORY_COUNT,$/;"	e	enum:efi_entry_t
EFIET_MEMORY_MAP	include/efi.h	/^	EFIET_MEMORY_MAP,$/;"	e	enum:efi_entry_t
EFIPAYLOAD_BFDARCH	arch/x86/config.mk	/^EFIPAYLOAD_BFDARCH = i386$/;"	m
EFIPAYLOAD_BFDTARGET	arch/x86/config.mk	/^EFIPAYLOAD_BFDTARGET = elf32-i386$/;"	m
EFIPAYLOAD_BFDTARGET	arch/x86/config.mk	/^EFIPAYLOAD_BFDTARGET = elf64-x86-64$/;"	m
EFISTUB	arch/x86/config.mk	/^EFISTUB := crt0-efi-$(EFIARCH).o reloc_$(EFIARCH).o$/;"	m
EFI_ACCESS_DENIED	include/efi.h	/^#define EFI_ACCESS_DENIED	/;"	d
EFI_ACPI_MEMORY_NVS	include/efi.h	/^	EFI_ACPI_MEMORY_NVS,$/;"	e	enum:efi_mem_type
EFI_ACPI_RECLAIM_MEMORY	include/efi.h	/^	EFI_ACPI_RECLAIM_MEMORY,$/;"	e	enum:efi_mem_type
EFI_ALLOCATE_ADDRESS	include/efi.h	/^#define EFI_ALLOCATE_ADDRESS	/;"	d
EFI_ALLOCATE_ANY_PAGES	include/efi.h	/^#define EFI_ALLOCATE_ANY_PAGES	/;"	d
EFI_ALLOCATE_MAX_ADDRESS	include/efi.h	/^#define EFI_ALLOCATE_MAX_ADDRESS	/;"	d
EFI_APP	lib/efi/Kconfig	/^config EFI_APP$/;"	c	choice:choice04ede3cf0104
EFI_BAD_BUFFER_SIZE	include/efi.h	/^#define EFI_BAD_BUFFER_SIZE	/;"	d
EFI_BITS_PER_LONG	include/efi.h	/^#define EFI_BITS_PER_LONG	/;"	d
EFI_BLT_BUFFER_TO_VIDEO	include/efi_api.h	/^#define EFI_BLT_BUFFER_TO_VIDEO	/;"	d
EFI_BLT_VIDEO_FILL	include/efi_api.h	/^#define EFI_BLT_VIDEO_FILL	/;"	d
EFI_BLT_VIDEO_TO_BLT_BUFFER	include/efi_api.h	/^#define EFI_BLT_VIDEO_TO_BLT_BUFFER	/;"	d
EFI_BLT_VIDEO_TO_VIDEO	include/efi_api.h	/^#define EFI_BLT_VIDEO_TO_VIDEO	/;"	d
EFI_BOOT_SERVICES_CODE	include/efi.h	/^	EFI_BOOT_SERVICES_CODE,$/;"	e	enum:efi_mem_type
EFI_BOOT_SERVICES_DATA	include/efi.h	/^	EFI_BOOT_SERVICES_DATA,$/;"	e	enum:efi_mem_type
EFI_BUFFER_TOO_SMALL	include/efi.h	/^#define EFI_BUFFER_TOO_SMALL	/;"	d
EFI_CACHELINE_SIZE	lib/efi_loader/efi_runtime.c	/^#define EFI_CACHELINE_SIZE /;"	d	file:
EFI_CARVE_LOOP_AGAIN	lib/efi_loader/efi_memory.c	/^#define EFI_CARVE_LOOP_AGAIN	/;"	d	file:
EFI_CARVE_NO_OVERLAP	lib/efi_loader/efi_memory.c	/^#define EFI_CARVE_NO_OVERLAP	/;"	d	file:
EFI_CARVE_OVERLAPS_NONRAM	lib/efi_loader/efi_memory.c	/^#define EFI_CARVE_OVERLAPS_NONRAM	/;"	d	file:
EFI_CONSOLE_MODE_GFX	include/efi_api.h	/^#define EFI_CONSOLE_MODE_GFX	/;"	d
EFI_CONSOLE_MODE_TEXT	include/efi_api.h	/^#define EFI_CONSOLE_MODE_TEXT	/;"	d
EFI_CONVENTIONAL_MEMORY	include/efi.h	/^	EFI_CONVENTIONAL_MEMORY,$/;"	e	enum:efi_mem_type
EFI_DEVICE_ERROR	include/efi.h	/^#define EFI_DEVICE_ERROR	/;"	d
EFI_DISK_READ	lib/efi_loader/efi_disk.c	/^	EFI_DISK_READ,$/;"	e	enum:efi_disk_direction	file:
EFI_DISK_WRITE	lib/efi_loader/efi_disk.c	/^	EFI_DISK_WRITE,$/;"	e	enum:efi_disk_direction	file:
EFI_ENTRY	include/efi_loader.h	/^#define EFI_ENTRY(/;"	d
EFI_EXIT	include/efi_loader.h	/^#define EFI_EXIT(/;"	d
EFI_FDT_GUID	include/efi_api.h	/^#define EFI_FDT_GUID /;"	d
EFI_FVB2_ALIGNMENT	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT	/;"	d
EFI_FVB2_ALIGNMENT_1	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_1	/;"	d
EFI_FVB2_ALIGNMENT_128	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_128	/;"	d
EFI_FVB2_ALIGNMENT_128K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_128K	/;"	d
EFI_FVB2_ALIGNMENT_128M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_128M	/;"	d
EFI_FVB2_ALIGNMENT_16	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_16	/;"	d
EFI_FVB2_ALIGNMENT_16K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_16K	/;"	d
EFI_FVB2_ALIGNMENT_16M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_16M	/;"	d
EFI_FVB2_ALIGNMENT_1G	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_1G	/;"	d
EFI_FVB2_ALIGNMENT_1K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_1K	/;"	d
EFI_FVB2_ALIGNMENT_1M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_1M	/;"	d
EFI_FVB2_ALIGNMENT_2	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_2	/;"	d
EFI_FVB2_ALIGNMENT_256	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_256	/;"	d
EFI_FVB2_ALIGNMENT_256K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_256K	/;"	d
EFI_FVB2_ALIGNMENT_256M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_256M	/;"	d
EFI_FVB2_ALIGNMENT_2G	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_2G	/;"	d
EFI_FVB2_ALIGNMENT_2K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_2K	/;"	d
EFI_FVB2_ALIGNMENT_2M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_2M	/;"	d
EFI_FVB2_ALIGNMENT_32	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_32	/;"	d
EFI_FVB2_ALIGNMENT_32K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_32K	/;"	d
EFI_FVB2_ALIGNMENT_32M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_32M	/;"	d
EFI_FVB2_ALIGNMENT_4	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_4	/;"	d
EFI_FVB2_ALIGNMENT_4K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_4K	/;"	d
EFI_FVB2_ALIGNMENT_4M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_4M	/;"	d
EFI_FVB2_ALIGNMENT_512	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_512	/;"	d
EFI_FVB2_ALIGNMENT_512K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_512K	/;"	d
EFI_FVB2_ALIGNMENT_512M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_512M	/;"	d
EFI_FVB2_ALIGNMENT_64	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_64	/;"	d
EFI_FVB2_ALIGNMENT_64K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_64K	/;"	d
EFI_FVB2_ALIGNMENT_64M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_64M	/;"	d
EFI_FVB2_ALIGNMENT_8	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_8	/;"	d
EFI_FVB2_ALIGNMENT_8K	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_8K	/;"	d
EFI_FVB2_ALIGNMENT_8M	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ALIGNMENT_8M	/;"	d
EFI_FVB2_ERASE_POLARITY	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_ERASE_POLARITY	/;"	d
EFI_FVB2_LOCK_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_LOCK_CAP	/;"	d
EFI_FVB2_LOCK_STATUS	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_LOCK_STATUS	/;"	d
EFI_FVB2_MEMORY_MAPPED	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_MEMORY_MAPPED	/;"	d
EFI_FVB2_READ_DISABLED_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_READ_DISABLED_CAP	/;"	d
EFI_FVB2_READ_ENABLED_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_READ_ENABLED_CAP	/;"	d
EFI_FVB2_READ_LOCK_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_READ_LOCK_CAP	/;"	d
EFI_FVB2_READ_LOCK_STATUS	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_READ_LOCK_STATUS	/;"	d
EFI_FVB2_READ_STATUS	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_READ_STATUS	/;"	d
EFI_FVB2_STICKY_WRITE	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_STICKY_WRITE	/;"	d
EFI_FVB2_WRITE_DISABLED_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_WRITE_DISABLED_CAP	/;"	d
EFI_FVB2_WRITE_ENABLED_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_WRITE_ENABLED_CAP	/;"	d
EFI_FVB2_WRITE_LOCK_CAP	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_WRITE_LOCK_CAP	/;"	d
EFI_FVB2_WRITE_LOCK_STATUS	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_WRITE_LOCK_STATUS	/;"	d
EFI_FVB2_WRITE_STATUS	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVB2_WRITE_STATUS	/;"	d
EFI_FVH_REVISION	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVH_REVISION	/;"	d
EFI_FVH_SIGNATURE	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FVH_SIGNATURE	/;"	d
EFI_FV_FILE_ATTR_ALIGNMENT	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FV_FILE_ATTR_ALIGNMENT	/;"	d
EFI_FV_FILE_ATTR_FIXED	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FV_FILE_ATTR_FIXED	/;"	d
EFI_FV_FILE_ATTR_MEMORY_MAPPED	arch/x86/include/asm/fsp/fsp_fv.h	/^#define EFI_FV_FILE_ATTR_MEMORY_MAPPED	/;"	d
EFI_GOP_GUID	include/efi_api.h	/^#define EFI_GOP_GUID /;"	d
EFI_GOT_BGRA8	include/efi_api.h	/^#define EFI_GOT_BGRA8	/;"	d
EFI_GOT_BITMASK	include/efi_api.h	/^#define EFI_GOT_BITMASK	/;"	d
EFI_GOT_RGBA8	include/efi_api.h	/^#define EFI_GOT_RGBA8	/;"	d
EFI_GUID	include/efi.h	/^#define EFI_GUID(/;"	d
EFI_INVALID_PARAMETER	include/efi.h	/^#define EFI_INVALID_PARAMETER	/;"	d
EFI_LOADER	lib/efi_loader/Kconfig	/^config EFI_LOADER$/;"	c
EFI_LOADER_BOUNCE_BUFFER	lib/efi_loader/Kconfig	/^config EFI_LOADER_BOUNCE_BUFFER$/;"	c
EFI_LOADER_BOUNCE_BUFFER_SIZE	include/efi_loader.h	/^#define EFI_LOADER_BOUNCE_BUFFER_SIZE /;"	d
EFI_LOADER_CODE	include/efi.h	/^	EFI_LOADER_CODE,$/;"	e	enum:efi_mem_type
EFI_LOADER_DATA	include/efi.h	/^	EFI_LOADER_DATA,$/;"	e	enum:efi_mem_type
EFI_LOAD_ERROR	include/efi.h	/^#define EFI_LOAD_ERROR	/;"	d
EFI_MAX_ALLOCATE_TYPE	include/efi.h	/^#define EFI_MAX_ALLOCATE_TYPE	/;"	d
EFI_MAX_MEMORY_TYPE	include/efi.h	/^	EFI_MAX_MEMORY_TYPE,$/;"	e	enum:efi_mem_type
EFI_MEMORY_DESCRIPTOR_VERSION	include/efi.h	/^#define EFI_MEMORY_DESCRIPTOR_VERSION /;"	d
EFI_MEMORY_RP_SHIFT	include/efi.h	/^	EFI_MEMORY_RP_SHIFT	= 13,	\/* read-protect *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_RUNTIME	include/efi.h	/^	EFI_MEMORY_RUNTIME = 1ULL << EFI_MEMORY_RUNTIME_SHIFT,$/;"	e	enum:__anona52846620103
EFI_MEMORY_RUNTIME_SHIFT	include/efi.h	/^	EFI_MEMORY_RUNTIME_SHIFT = 63,	\/* range requires runtime mapping *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_UCE_SHIFT	include/efi.h	/^	EFI_MEMORY_UCE_SHIFT	= 4,	\/* uncached, exported *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_UC_SHIFT	include/efi.h	/^	EFI_MEMORY_UC_SHIFT	= 0,	\/* uncached *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_WB_SHIFT	include/efi.h	/^	EFI_MEMORY_WB_SHIFT	= 3,	\/* write-back *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_WC_SHIFT	include/efi.h	/^	EFI_MEMORY_WC_SHIFT	= 1,	\/* write-coalescing *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_WP_SHIFT	include/efi.h	/^	EFI_MEMORY_WP_SHIFT	= 12,	\/* write-protect *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_WT_SHIFT	include/efi.h	/^	EFI_MEMORY_WT_SHIFT	= 2,	\/* write-through *\/$/;"	e	enum:__anona52846620103
EFI_MEMORY_XP_SHIFT	include/efi.h	/^	EFI_MEMORY_XP_SHIFT	= 14,	\/* execute-protect *\/$/;"	e	enum:__anona52846620103
EFI_MEM_DESC_VERSION	include/efi.h	/^	EFI_MEM_DESC_VERSION	= 1,$/;"	e	enum:__anona52846620103
EFI_MMAP_IO	include/efi.h	/^	EFI_MMAP_IO,$/;"	e	enum:efi_mem_type
EFI_MMAP_IO_PORT	include/efi.h	/^	EFI_MMAP_IO_PORT,$/;"	e	enum:efi_mem_type
EFI_NETWORK_INITIALIZED	include/efi_api.h	/^	EFI_NETWORK_INITIALIZED,$/;"	e	enum:efi_simple_network_state
EFI_NETWORK_STARTED	include/efi_api.h	/^	EFI_NETWORK_STARTED,$/;"	e	enum:efi_simple_network_state
EFI_NETWORK_STOPPED	include/efi_api.h	/^	EFI_NETWORK_STOPPED,$/;"	e	enum:efi_simple_network_state
EFI_NOT_FOUND	include/efi.h	/^#define EFI_NOT_FOUND	/;"	d
EFI_NOT_READY	include/efi.h	/^#define EFI_NOT_READY	/;"	d
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER	include/efi_api.h	/^#define EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER /;"	d
EFI_OPEN_PROTOCOL_BY_DRIVER	include/efi_api.h	/^#define EFI_OPEN_PROTOCOL_BY_DRIVER /;"	d
EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL	include/efi_api.h	/^#define EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL /;"	d
EFI_OPEN_PROTOCOL_EXCLUSIVE	include/efi_api.h	/^#define EFI_OPEN_PROTOCOL_EXCLUSIVE /;"	d
EFI_OPEN_PROTOCOL_GET_PROTOCOL	include/efi_api.h	/^#define EFI_OPEN_PROTOCOL_GET_PROTOCOL /;"	d
EFI_OPEN_PROTOCOL_TEST_PROTOCOL	include/efi_api.h	/^#define EFI_OPEN_PROTOCOL_TEST_PROTOCOL /;"	d
EFI_OUT_OF_RESOURCES	include/efi.h	/^#define EFI_OUT_OF_RESOURCES	/;"	d
EFI_PAGE_MASK	include/efi.h	/^#define EFI_PAGE_MASK	/;"	d
EFI_PAGE_SHIFT	include/efi.h	/^#define EFI_PAGE_SHIFT	/;"	d
EFI_PAGE_SIZE	include/efi.h	/^#define EFI_PAGE_SIZE	/;"	d
EFI_PAL_CODE	include/efi.h	/^	EFI_PAL_CODE,$/;"	e	enum:efi_mem_type
EFI_PMBR_OSTYPE_EFI	include/part_efi.h	/^#define EFI_PMBR_OSTYPE_EFI /;"	d
EFI_PMBR_OSTYPE_EFI_GPT	include/part_efi.h	/^#define EFI_PMBR_OSTYPE_EFI_GPT /;"	d
EFI_PXE_GUID	include/efi_api.h	/^#define EFI_PXE_GUID /;"	d
EFI_RAM_SIZE	lib/efi/Kconfig	/^config EFI_RAM_SIZE$/;"	c
EFI_RESERVED_MEMORY_TYPE	include/efi.h	/^	EFI_RESERVED_MEMORY_TYPE,$/;"	e	enum:efi_mem_type
EFI_RESET_COLD	include/efi_api.h	/^	EFI_RESET_COLD = 0,$/;"	e	enum:efi_reset_type
EFI_RESET_SHUTDOWN	include/efi_api.h	/^	EFI_RESET_SHUTDOWN = 2$/;"	e	enum:efi_reset_type
EFI_RESET_WARM	include/efi_api.h	/^	EFI_RESET_WARM = 1,$/;"	e	enum:efi_reset_type
EFI_RUNTIME_SERVICES_CODE	include/efi.h	/^	EFI_RUNTIME_SERVICES_CODE,$/;"	e	enum:efi_mem_type
EFI_RUNTIME_SERVICES_DATA	include/efi.h	/^	EFI_RUNTIME_SERVICES_DATA,$/;"	e	enum:efi_mem_type
EFI_RUNTIME_SERVICES_REVISION	include/efi_api.h	/^#define EFI_RUNTIME_SERVICES_REVISION	/;"	d
EFI_RUNTIME_SERVICES_SIGNATURE	include/efi_api.h	/^#define EFI_RUNTIME_SERVICES_SIGNATURE	/;"	d
EFI_SECTION_ALL	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_ALL	/;"	d
EFI_SECTION_COMPATIBILITY16	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_COMPATIBILITY16	/;"	d
EFI_SECTION_COMPRESSION	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_COMPRESSION	/;"	d
EFI_SECTION_DISPOSABLE	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_DISPOSABLE	/;"	d
EFI_SECTION_DXE_DEPEX	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_DXE_DEPEX	/;"	d
EFI_SECTION_FIRMWARE_VOLUME_IMAGE	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE	/;"	d
EFI_SECTION_FREEFORM_SUBTYPE_GUID	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_FREEFORM_SUBTYPE_GUID	/;"	d
EFI_SECTION_GUID_DEFINED	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_GUID_DEFINED	/;"	d
EFI_SECTION_PE32	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_PE32	/;"	d
EFI_SECTION_PEI_DEPEX	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_PEI_DEPEX	/;"	d
EFI_SECTION_PIC	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_PIC	/;"	d
EFI_SECTION_RAW	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_RAW	/;"	d
EFI_SECTION_SMM_DEPEX	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_SMM_DEPEX	/;"	d
EFI_SECTION_TE	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_TE	/;"	d
EFI_SECTION_USER_INTERFACE	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_USER_INTERFACE	/;"	d
EFI_SECTION_VERSION	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define EFI_SECTION_VERSION	/;"	d
EFI_SECURITY_VIOLATION	include/efi.h	/^#define EFI_SECURITY_VIOLATION	/;"	d
EFI_SIMPLE_NETWORK_GUID	include/efi_api.h	/^#define EFI_SIMPLE_NETWORK_GUID /;"	d
EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST	include/efi_api.h	/^#define EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST /;"	d
EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST	include/efi_api.h	/^#define EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST /;"	d
EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS	include/efi_api.h	/^#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS /;"	d
EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST	include/efi_api.h	/^#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST /;"	d
EFI_SIMPLE_NETWORK_RECEIVE_UNICAST	include/efi_api.h	/^#define EFI_SIMPLE_NETWORK_RECEIVE_UNICAST /;"	d
EFI_STUB	lib/efi/Kconfig	/^config EFI_STUB$/;"	c	choice:choice04ede3cf0104
EFI_STUB_32BIT	lib/efi/Kconfig	/^config EFI_STUB_32BIT$/;"	c	choice:choice04ede3cf0204
EFI_STUB_64BIT	lib/efi/Kconfig	/^config EFI_STUB_64BIT$/;"	c	choice:choice04ede3cf0204
EFI_SUCCESS	include/efi.h	/^#define EFI_SUCCESS	/;"	d
EFI_SYSTEM_TABLE_SIGNATURE	include/efi_api.h	/^#define EFI_SYSTEM_TABLE_SIGNATURE /;"	d
EFI_TABLE_END	include/efi.h	/^	EFI_TABLE_END,	\/* For efi_build_mem_table() *\/$/;"	e	enum:efi_mem_type
EFI_TABLE_VERSION	include/efi.h	/^#define EFI_TABLE_VERSION	/;"	d
EFI_TIMER_PERIODIC	include/efi_api.h	/^	EFI_TIMER_PERIODIC = 1,$/;"	e	enum:efi_event_type
EFI_TIMER_RELATIVE	include/efi_api.h	/^	EFI_TIMER_RELATIVE = 2$/;"	e	enum:efi_event_type
EFI_TIMER_STOP	include/efi_api.h	/^	EFI_TIMER_STOP = 0,$/;"	e	enum:efi_event_type
EFI_TIME_ADJUST_DAYLIGHT	include/efi.h	/^#define EFI_TIME_ADJUST_DAYLIGHT /;"	d
EFI_TIME_IN_DAYLIGHT	include/efi.h	/^#define EFI_TIME_IN_DAYLIGHT /;"	d
EFI_UNSPECIFIED_TIMEZONE	include/efi.h	/^#define EFI_UNSPECIFIED_TIMEZONE /;"	d
EFI_UNSUPPORTED	include/efi.h	/^#define EFI_UNSUPPORTED	/;"	d
EFI_UNUSABLE_MEMORY	include/efi.h	/^	EFI_UNUSABLE_MEMORY,$/;"	e	enum:efi_mem_type
EFI_WRITE_PROTECTED	include/efi.h	/^#define EFI_WRITE_PROTECTED	/;"	d
EFL	arch/x86/include/asm/ptrace.h	/^#define EFL /;"	d
EFUSE_1	arch/arm/include/asm/arch-omap5/omap.h	/^#define EFUSE_1 /;"	d
EFUSE_2	arch/arm/include/asm/arch-omap5/omap.h	/^#define EFUSE_2 /;"	d
EFUSE_3	arch/arm/include/asm/arch-omap5/omap.h	/^#define EFUSE_3 /;"	d
EFUSE_4	arch/arm/include/asm/arch-omap5/omap.h	/^#define EFUSE_4 /;"	d
EFUSE_MAC_OFFSET	board/amlogic/odroid-c2/odroid-c2.c	/^#define EFUSE_MAC_OFFSET	/;"	d	file:
EFUSE_MAC_SIZE	board/amlogic/odroid-c2/odroid-c2.c	/^#define EFUSE_MAC_SIZE	/;"	d	file:
EFUSE_SN_OFFSET	board/amlogic/odroid-c2/odroid-c2.c	/^#define EFUSE_SN_OFFSET	/;"	d	file:
EFUSE_SN_SIZE	board/amlogic/odroid-c2/odroid-c2.c	/^#define EFUSE_SN_SIZE	/;"	d	file:
EF_CP0_BADVADDR	arch/mips/include/asm/reg.h	/^#define EF_CP0_BADVADDR	/;"	d
EF_CP0_CAUSE	arch/mips/include/asm/reg.h	/^#define EF_CP0_CAUSE	/;"	d
EF_CP0_EPC	arch/mips/include/asm/reg.h	/^#define EF_CP0_EPC	/;"	d
EF_CP0_STATUS	arch/mips/include/asm/reg.h	/^#define EF_CP0_STATUS	/;"	d
EF_HI	arch/mips/include/asm/reg.h	/^#define EF_HI	/;"	d
EF_LO	arch/mips/include/asm/reg.h	/^#define EF_LO	/;"	d
EF_PPC_EMB	include/elf.h	/^#define EF_PPC_EMB /;"	d
EF_PPC_RELOCATABLE	include/elf.h	/^#define EF_PPC_RELOCATABLE /;"	d
EF_PPC_RELOCATABLE_LIB	include/elf.h	/^#define EF_PPC_RELOCATABLE_LIB /;"	d
EF_R0	arch/mips/include/asm/reg.h	/^#define EF_R0	/;"	d
EF_R1	arch/mips/include/asm/reg.h	/^#define EF_R1	/;"	d
EF_R10	arch/mips/include/asm/reg.h	/^#define EF_R10	/;"	d
EF_R11	arch/mips/include/asm/reg.h	/^#define EF_R11	/;"	d
EF_R12	arch/mips/include/asm/reg.h	/^#define EF_R12	/;"	d
EF_R13	arch/mips/include/asm/reg.h	/^#define EF_R13	/;"	d
EF_R14	arch/mips/include/asm/reg.h	/^#define EF_R14	/;"	d
EF_R15	arch/mips/include/asm/reg.h	/^#define EF_R15	/;"	d
EF_R16	arch/mips/include/asm/reg.h	/^#define EF_R16	/;"	d
EF_R17	arch/mips/include/asm/reg.h	/^#define EF_R17	/;"	d
EF_R18	arch/mips/include/asm/reg.h	/^#define EF_R18	/;"	d
EF_R19	arch/mips/include/asm/reg.h	/^#define EF_R19	/;"	d
EF_R2	arch/mips/include/asm/reg.h	/^#define EF_R2	/;"	d
EF_R20	arch/mips/include/asm/reg.h	/^#define EF_R20	/;"	d
EF_R21	arch/mips/include/asm/reg.h	/^#define EF_R21	/;"	d
EF_R22	arch/mips/include/asm/reg.h	/^#define EF_R22	/;"	d
EF_R23	arch/mips/include/asm/reg.h	/^#define EF_R23	/;"	d
EF_R24	arch/mips/include/asm/reg.h	/^#define EF_R24	/;"	d
EF_R25	arch/mips/include/asm/reg.h	/^#define EF_R25	/;"	d
EF_R26	arch/mips/include/asm/reg.h	/^#define EF_R26	/;"	d
EF_R27	arch/mips/include/asm/reg.h	/^#define EF_R27	/;"	d
EF_R28	arch/mips/include/asm/reg.h	/^#define EF_R28	/;"	d
EF_R29	arch/mips/include/asm/reg.h	/^#define EF_R29	/;"	d
EF_R3	arch/mips/include/asm/reg.h	/^#define EF_R3	/;"	d
EF_R30	arch/mips/include/asm/reg.h	/^#define EF_R30	/;"	d
EF_R31	arch/mips/include/asm/reg.h	/^#define EF_R31	/;"	d
EF_R4	arch/mips/include/asm/reg.h	/^#define EF_R4	/;"	d
EF_R5	arch/mips/include/asm/reg.h	/^#define EF_R5	/;"	d
EF_R6	arch/mips/include/asm/reg.h	/^#define EF_R6	/;"	d
EF_R7	arch/mips/include/asm/reg.h	/^#define EF_R7	/;"	d
EF_R8	arch/mips/include/asm/reg.h	/^#define EF_R8	/;"	d
EF_R9	arch/mips/include/asm/reg.h	/^#define EF_R9	/;"	d
EF_SIZE	arch/mips/include/asm/reg.h	/^#define EF_SIZE	/;"	d
EF_UNUSED0	arch/mips/include/asm/reg.h	/^#define EF_UNUSED0	/;"	d
EGRESS_UNTAG_ALL	drivers/net/vsc9953.c	/^	EGRESS_UNTAG_ALL = 0,$/;"	e	enum:egress_untag_mode	file:
EGRESS_UNTAG_NONE	drivers/net/vsc9953.c	/^	EGRESS_UNTAG_NONE,$/;"	e	enum:egress_untag_mode	file:
EGRESS_UNTAG_PVID_AND_ZERO	drivers/net/vsc9953.c	/^	EGRESS_UNTAG_PVID_AND_ZERO,$/;"	e	enum:egress_untag_mode	file:
EGRESS_UNTAG_ZERO	drivers/net/vsc9953.c	/^	EGRESS_UNTAG_ZERO,$/;"	e	enum:egress_untag_mode	file:
EGRS_FLD_ALL	include/mv88e6352.h	/^#define EGRS_FLD_ALL	/;"	d
EGR_TAG_CLASS	drivers/net/vsc9953.c	/^	EGR_TAG_CLASS = 0,$/;"	e	enum:egress_vlan_tag	file:
EGR_TAG_PVID	drivers/net/vsc9953.c	/^	EGR_TAG_PVID,$/;"	e	enum:egress_vlan_tag	file:
EHCICTRL_ENAINCR16	arch/arm/mach-exynos/include/mach/ehci.h	/^#define EHCICTRL_ENAINCR16	/;"	d
EHCICTRL_ENAINCR4	arch/arm/mach-exynos/include/mach/ehci.h	/^#define EHCICTRL_ENAINCR4	/;"	d
EHCICTRL_ENAINCR8	arch/arm/mach-exynos/include/mach/ehci.h	/^#define EHCICTRL_ENAINCR8	/;"	d
EHCICTRL_ENAINCRXALIGN	arch/arm/mach-exynos/include/mach/ehci.h	/^#define EHCICTRL_ENAINCRXALIGN	/;"	d
EHCI_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define EHCI_DEV	/;"	d
EHCI_INSNREG01	arch/x86/include/asm/arch-quark/quark.h	/^#define EHCI_INSNREG01	/;"	d
EHCI_INSNREG04_DISABLE_UNSUSPEND	arch/arm/include/asm/ehci-omap.h	/^#define EHCI_INSNREG04_DISABLE_UNSUSPEND	/;"	d
EHCI_INSNREG05_ULPI_CONTROL_SHIFT	arch/arm/include/asm/ehci-omap.h	/^#define EHCI_INSNREG05_ULPI_CONTROL_SHIFT	/;"	d
EHCI_INSNREG05_ULPI_OPSEL_SHIFT	arch/arm/include/asm/ehci-omap.h	/^#define EHCI_INSNREG05_ULPI_OPSEL_SHIFT	/;"	d
EHCI_INSNREG05_ULPI_PORTSEL_SHIFT	arch/arm/include/asm/ehci-omap.h	/^#define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT	/;"	d
EHCI_INSNREG05_ULPI_REGADD_SHIFT	arch/arm/include/asm/ehci-omap.h	/^#define EHCI_INSNREG05_ULPI_REGADD_SHIFT	/;"	d
EHCI_OFFSET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define EHCI_OFFSET	/;"	d
EHCI_PAGE_SIZE	drivers/usb/host/ehci.h	/^#define EHCI_PAGE_SIZE	/;"	d
EHCI_PS_CLEAR	drivers/usb/host/ehci.h	/^#define EHCI_PS_CLEAR	/;"	d
EHCI_PS_CS	drivers/usb/host/ehci.h	/^#define EHCI_PS_CS	/;"	d
EHCI_PS_CSC	drivers/usb/host/ehci.h	/^#define EHCI_PS_CSC	/;"	d
EHCI_PS_FPR	drivers/usb/host/ehci.h	/^#define EHCI_PS_FPR	/;"	d
EHCI_PS_IS_LOWSPEED	drivers/usb/host/ehci.h	/^#define EHCI_PS_IS_LOWSPEED(/;"	d
EHCI_PS_LS	drivers/usb/host/ehci.h	/^#define EHCI_PS_LS	/;"	d
EHCI_PS_OCA	drivers/usb/host/ehci.h	/^#define EHCI_PS_OCA	/;"	d
EHCI_PS_OCC	drivers/usb/host/ehci.h	/^#define EHCI_PS_OCC	/;"	d
EHCI_PS_PE	drivers/usb/host/ehci.h	/^#define EHCI_PS_PE	/;"	d
EHCI_PS_PEC	drivers/usb/host/ehci.h	/^#define EHCI_PS_PEC	/;"	d
EHCI_PS_PO	drivers/usb/host/ehci.h	/^#define EHCI_PS_PO	/;"	d
EHCI_PS_PP	drivers/usb/host/ehci.h	/^#define EHCI_PS_PP	/;"	d
EHCI_PS_PR	drivers/usb/host/ehci.h	/^#define EHCI_PS_PR	/;"	d
EHCI_PS_SUSP	drivers/usb/host/ehci.h	/^#define EHCI_PS_SUSP	/;"	d
EHCI_PS_WKCNNT_E	drivers/usb/host/ehci.h	/^#define EHCI_PS_WKCNNT_E	/;"	d
EHCI_PS_WKDSCNNT_E	drivers/usb/host/ehci.h	/^#define EHCI_PS_WKDSCNNT_E	/;"	d
EHCI_PS_WKOC_E	drivers/usb/host/ehci.h	/^#define EHCI_PS_WKOC_E	/;"	d
EHCI_SIZE	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define EHCI_SIZE	/;"	d
EHCI_TWEAK_NO_INIT_CF	drivers/usb/host/ehci.h	/^	EHCI_TWEAK_NO_INIT_CF		= 1 << 0,$/;"	e	enum:__anond2a9fae80203
EHCI_USBCMD	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define EHCI_USBCMD	/;"	d
EHCI_USBCMD_HCRESET	drivers/usb/host/ohci.h	/^#define EHCI_USBCMD_HCRESET	/;"	d
EHCI_USBCMD_OFF	drivers/usb/host/ohci.h	/^#define EHCI_USBCMD_OFF	/;"	d
EHOSTDOWN	include/linux/errno.h	/^#define	EHOSTDOWN	/;"	d
EHOSTUNREACH	include/linux/errno.h	/^#define	EHOSTUNREACH	/;"	d
EHWPOISON	include/linux/errno.h	/^#define EHWPOISON	/;"	d
EIC_PCIE	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define EIC_PCIE	/;"	d	file:
EIC_SGMII	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define EIC_SGMII	/;"	d	file:
EIDRM	include/linux/errno.h	/^#define	EIDRM	/;"	d
EIEIO	common/ide.c	/^# define EIEIO	/;"	d	file:
EIEIO	drivers/usb/host/sl811-hcd.c	/^# define EIEIO	/;"	d	file:
EIF3_D1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	EIF3_D1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
EILSEQ	include/linux/errno.h	/^#define	EILSEQ	/;"	d
EIM	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define EIM /;"	d
EIM_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define EIM_BASE_ADDR	/;"	d
EIM_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	EIM_CLK_ROOT = 83,$/;"	e	enum:clk_root_index
EIM_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
EIM_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EIM_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
EINPROGRESS	include/linux/errno.h	/^#define	EINPROGRESS	/;"	d
EINTR	include/linux/errno.h	/^#define	EINTR	/;"	d
EINT_ENABLE0	arch/arm/mach-davinci/lowlevel_init.S	/^EINT_ENABLE0:$/;"	l
EINT_ENABLE1	arch/arm/mach-davinci/lowlevel_init.S	/^EINT_ENABLE1:$/;"	l
EINVAL	fs/yaffs2/yportenv.h	/^#define EINVAL	/;"	d
EINVAL	include/linux/errno.h	/^#define	EINVAL	/;"	d
EIO	include/linux/errno.h	/^#define	EIO	/;"	d
EIOCBQUEUED	include/linux/errno.h	/^#define EIOCBQUEUED	/;"	d
EIP	arch/x86/include/asm/ptrace.h	/^#define EIP /;"	d
EISA_bus	arch/arm/include/asm/processor.h	/^#define EISA_bus /;"	d
EISA_bus	arch/powerpc/include/asm/processor.h	/^#define EISA_bus /;"	d
EISA_bus__is_a_macro	arch/powerpc/include/asm/processor.h	/^#define EISA_bus__is_a_macro /;"	d
EISCONN	include/linux/errno.h	/^#define	EISCONN	/;"	d
EISDIR	fs/yaffs2/yportenv.h	/^#define EISDIR /;"	d
EISDIR	include/linux/errno.h	/^#define	EISDIR	/;"	d
EISNAM	include/linux/errno.h	/^#define	EISNAM	/;"	d
EIT_EVA	arch/nds32/cpu/n1213/start.S	/^#define EIT_EVA	/;"	d	file:
EIT_INTR_PC	arch/nds32/cpu/n1213/start.S	/^#define EIT_INTR_PC	/;"	d	file:
EIT_INTR_PSW	arch/nds32/cpu/n1213/start.S	/^#define EIT_INTR_PSW	/;"	d	file:
EIT_ITYPE	arch/nds32/cpu/n1213/start.S	/^#define EIT_ITYPE	/;"	d	file:
EIT_IVB	arch/nds32/cpu/n1213/start.S	/^#define EIT_IVB	/;"	d	file:
EIT_MACH_ERR	arch/nds32/cpu/n1213/start.S	/^#define EIT_MACH_ERR	/;"	d	file:
EIT_OVL_INTR_PC	arch/nds32/cpu/n1213/start.S	/^#define EIT_OVL_INTR_PC	/;"	d	file:
EIT_PREV_EVA	arch/nds32/cpu/n1213/start.S	/^#define EIT_PREV_EVA	/;"	d	file:
EIT_PREV_IPC	arch/nds32/cpu/n1213/start.S	/^#define EIT_PREV_IPC	/;"	d	file:
EIT_PREV_IPSW	arch/nds32/cpu/n1213/start.S	/^#define EIT_PREV_IPSW	/;"	d	file:
EIT_PREV_ITYPE	arch/nds32/cpu/n1213/start.S	/^#define EIT_PREV_ITYPE	/;"	d	file:
EIT_PREV_P0	arch/nds32/cpu/n1213/start.S	/^#define EIT_PREV_P0	/;"	d	file:
EIT_PREV_P1	arch/nds32/cpu/n1213/start.S	/^#define EIT_PREV_P1	/;"	d	file:
EI_ABIVERSION	include/elf.h	/^#define EI_ABIVERSION	/;"	d
EI_CLASS	include/elf.h	/^#define EI_CLASS	/;"	d
EI_DATA	include/elf.h	/^#define EI_DATA	/;"	d
EI_MAG0	include/elf.h	/^#define EI_MAG0	/;"	d
EI_MAG1	include/elf.h	/^#define EI_MAG1	/;"	d
EI_MAG2	include/elf.h	/^#define EI_MAG2	/;"	d
EI_MAG3	include/elf.h	/^#define EI_MAG3	/;"	d
EI_NIDENT	include/elf.h	/^#define EI_NIDENT	/;"	d
EI_OSABI	include/elf.h	/^#define EI_OSABI	/;"	d
EI_PAD	include/elf.h	/^#define EI_PAD	/;"	d
EI_SHIFT	drivers/net/8390.h	/^#define EI_SHIFT(/;"	d
EI_VERSION	include/elf.h	/^#define EI_VERSION	/;"	d
EJUKEBOX	include/linux/errno.h	/^#define EJUKEBOX	/;"	d
EKEYEXPIRED	include/linux/errno.h	/^#define	EKEYEXPIRED	/;"	d
EKEYREJECTED	include/linux/errno.h	/^#define	EKEYREJECTED	/;"	d
EKEYREVOKED	include/linux/errno.h	/^#define	EKEYREVOKED	/;"	d
EL2HLT	include/linux/errno.h	/^#define	EL2HLT	/;"	d
EL2NSYNC	include/linux/errno.h	/^#define	EL2NSYNC	/;"	d
EL3HLT	include/linux/errno.h	/^#define	EL3HLT	/;"	d
EL3RST	include/linux/errno.h	/^#define	EL3RST	/;"	d
ELBT_BUFSZ	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_BUFSZ	/;"	d	file:
ELBT_CLSWAIT	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_CLSWAIT	/;"	d	file:
ELBT_CRCSZ	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_CRCSZ	/;"	d	file:
ELBT_MAXRXERR	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_MAXRXERR	/;"	d	file:
ELBT_MAXTXERR	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_MAXTXERR	/;"	d	file:
ELBT_NRXBD	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_NRXBD	/;"	d	file:
ELBT_NTXBD	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ELBT_NTXBD	/;"	d	file:
ELCDIF1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ELCDIF1_IPS_BASE_ADDR /;"	d
ELCR1	arch/x86/include/asm/i8259.h	/^#define ELCR1	/;"	d
ELCR2	arch/x86/include/asm/i8259.h	/^#define ELCR2	/;"	d
ELF	examples/standalone/Makefile	/^ELF	:= $(addprefix $(obj)\/,$(ELF))$/;"	m
ELF	examples/standalone/Makefile	/^ELF := $(strip $(extra-y))$/;"	m
ELF32_R_INFO	include/elf.h	/^#define ELF32_R_INFO(/;"	d
ELF32_R_SYM	include/elf.h	/^#define ELF32_R_SYM(/;"	d
ELF32_R_TYPE	include/elf.h	/^#define ELF32_R_TYPE(/;"	d
ELF32_ST_BIND	include/elf.h	/^#define ELF32_ST_BIND(/;"	d
ELF32_ST_INFO	include/elf.h	/^#define ELF32_ST_INFO(/;"	d
ELF32_ST_TYPE	include/elf.h	/^#define ELF32_ST_TYPE(/;"	d
ELF32_ST_VISIBILITY	include/elf.h	/^#define ELF32_ST_VISIBILITY(/;"	d
ELF64_R_SYM	include/elf.h	/^#define ELF64_R_SYM(/;"	d
ELF64_R_TYPE	include/elf.h	/^#define ELF64_R_TYPE(/;"	d
ELFABIVERSION	include/elf.h	/^#define ELFABIVERSION	/;"	d
ELFCLASS32	include/elf.h	/^#define	ELFCLASS32	/;"	d
ELFCLASS64	include/elf.h	/^#define	ELFCLASS64	/;"	d
ELFCLASSNONE	include/elf.h	/^#define	ELFCLASSNONE	/;"	d
ELFCLASSNUM	include/elf.h	/^#define	ELFCLASSNUM	/;"	d
ELFDATA2LSB	include/elf.h	/^#define ELFDATA2LSB	/;"	d
ELFDATA2MSB	include/elf.h	/^#define ELFDATA2MSB	/;"	d
ELFDATANONE	include/elf.h	/^#define ELFDATANONE	/;"	d
ELFDATANUM	include/elf.h	/^#define ELFDATANUM	/;"	d
ELFMAG	include/elf.h	/^#define	ELFMAG	/;"	d
ELFMAG0	include/elf.h	/^#define	ELFMAG0	/;"	d
ELFMAG1	include/elf.h	/^#define	ELFMAG1	/;"	d
ELFMAG2	include/elf.h	/^#define	ELFMAG2	/;"	d
ELFMAG3	include/elf.h	/^#define	ELFMAG3	/;"	d
ELFOSABI_AIX	include/elf.h	/^#define ELFOSABI_AIX	/;"	d
ELFOSABI_FREEBSD	include/elf.h	/^#define ELFOSABI_FREEBSD	/;"	d
ELFOSABI_HPUX	include/elf.h	/^#define ELFOSABI_HPUX	/;"	d
ELFOSABI_IRIX	include/elf.h	/^#define ELFOSABI_IRIX	/;"	d
ELFOSABI_LINUX	include/elf.h	/^#define ELFOSABI_LINUX	/;"	d
ELFOSABI_MODESTO	include/elf.h	/^#define ELFOSABI_MODESTO	/;"	d
ELFOSABI_NETBSD	include/elf.h	/^#define ELFOSABI_NETBSD	/;"	d
ELFOSABI_NONE	include/elf.h	/^#define ELFOSABI_NONE	/;"	d
ELFOSABI_OPENBSD	include/elf.h	/^#define ELFOSABI_OPENBSD	/;"	d
ELFOSABI_SOLARIS	include/elf.h	/^#define ELFOSABI_SOLARIS	/;"	d
ELFOSABI_TRU64	include/elf.h	/^#define ELFOSABI_TRU64	/;"	d
ELF_BSS	include/elf.h	/^#define ELF_BSS /;"	d
ELF_COMMENT	include/elf.h	/^#define ELF_COMMENT	/;"	d
ELF_DATA	include/elf.h	/^#define ELF_DATA /;"	d
ELF_DATA1	include/elf.h	/^#define ELF_DATA1 /;"	d
ELF_DEBUG	include/elf.h	/^#define ELF_DEBUG /;"	d
ELF_DYNAMIC	include/elf.h	/^#define ELF_DYNAMIC /;"	d
ELF_DYNSTR	include/elf.h	/^#define ELF_DYNSTR /;"	d
ELF_DYNSYM	include/elf.h	/^#define ELF_DYNSYM /;"	d
ELF_FINI	include/elf.h	/^#define ELF_FINI /;"	d
ELF_FINI_ARRAY	include/elf.h	/^#define ELF_FINI_ARRAY	/;"	d
ELF_GOT	include/elf.h	/^#define ELF_GOT /;"	d
ELF_HASH	include/elf.h	/^#define ELF_HASH /;"	d
ELF_INIT	include/elf.h	/^#define ELF_INIT /;"	d
ELF_INIT_ARRAY	include/elf.h	/^#define ELF_INIT_ARRAY	/;"	d
ELF_INTERP	include/elf.h	/^#define ELF_INTERP	/;"	d
ELF_LINE	include/elf.h	/^#define ELF_LINE	/;"	d
ELF_NOTE	include/elf.h	/^#define ELF_NOTE	/;"	d
ELF_PLT	include/elf.h	/^#define ELF_PLT	/;"	d
ELF_PREINIT_ARRAY	include/elf.h	/^#define ELF_PREINIT_ARRAY /;"	d
ELF_REL_DATA	include/elf.h	/^#define ELF_REL_DATA /;"	d
ELF_REL_DYN	include/elf.h	/^#define ELF_REL_DYN /;"	d
ELF_REL_FINI	include/elf.h	/^#define ELF_REL_FINI /;"	d
ELF_REL_INIT	include/elf.h	/^#define ELF_REL_INIT /;"	d
ELF_REL_RODATA	include/elf.h	/^#define ELF_REL_RODATA /;"	d
ELF_REL_TEXT	include/elf.h	/^#define ELF_REL_TEXT /;"	d
ELF_RODATA	include/elf.h	/^#define ELF_RODATA /;"	d
ELF_RODATA1	include/elf.h	/^#define ELF_RODATA1 /;"	d
ELF_SHSTRTAB	include/elf.h	/^#define ELF_SHSTRTAB /;"	d
ELF_STRTAB	include/elf.h	/^#define ELF_STRTAB /;"	d
ELF_SYMTAB	include/elf.h	/^#define ELF_SYMTAB /;"	d
ELF_SYMTAB_SHNDX	include/elf.h	/^#define ELF_SYMTAB_SHNDX /;"	d
ELF_TARG_VER	include/elf.h	/^#define ELF_TARG_VER	/;"	d
ELF_TBSS	include/elf.h	/^#define ELF_TBSS	/;"	d
ELF_TDATA	include/elf.h	/^#define ELF_TDATA	/;"	d
ELF_TDATA1	include/elf.h	/^#define ELF_TDATA1	/;"	d
ELF_TEXT	include/elf.h	/^#define ELF_TEXT /;"	d
ELIBACC	include/linux/errno.h	/^#define	ELIBACC	/;"	d
ELIBBAD	include/linux/errno.h	/^#define	ELIBBAD	/;"	d
ELIBEXEC	include/linux/errno.h	/^#define	ELIBEXEC	/;"	d
ELIBMAX	include/linux/errno.h	/^#define	ELIBMAX	/;"	d
ELIBSCN	include/linux/errno.h	/^#define	ELIBSCN	/;"	d
ELM_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define ELM_BASE	/;"	d
ELM_BASE	arch/arm/include/asm/arch-omap4/hardware.h	/^#define ELM_BASE	/;"	d
ELM_BASE	arch/arm/include/asm/arch-omap5/hardware.h	/^#define ELM_BASE	/;"	d
ELM_DEFAULT_POLY	drivers/mtd/nand/omap_elm.c	/^#define ELM_DEFAULT_POLY /;"	d	file:
ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK	include/linux/mtd/omap_elm.h	/^#define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK	/;"	d
ELM_LOCATION_CONFIG_ECC_SIZE_MASK	include/linux/mtd/omap_elm.h	/^#define ELM_LOCATION_CONFIG_ECC_SIZE_MASK	/;"	d
ELM_LOCATION_CONFIG_ECC_SIZE_POS	include/linux/mtd/omap_elm.h	/^#define ELM_LOCATION_CONFIG_ECC_SIZE_POS	/;"	d
ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK	include/linux/mtd/omap_elm.h	/^#define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK	/;"	d
ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK	include/linux/mtd/omap_elm.h	/^#define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK	/;"	d
ELM_MAX_CHANNELS	include/linux/mtd/omap_elm.h	/^#define ELM_MAX_CHANNELS	/;"	d
ELM_MAX_ERROR_COUNT	include/linux/mtd/omap_elm.h	/^#define ELM_MAX_ERROR_COUNT	/;"	d
ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID	include/linux/mtd/omap_elm.h	/^#define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID	/;"	d
ELM_SYSCONFIG_SOFTRESET	include/linux/mtd/omap_elm.h	/^#define ELM_SYSCONFIG_SOFTRESET	/;"	d
ELM_SYSCONFIG_SOFTRESET_MASK	include/linux/mtd/omap_elm.h	/^#define ELM_SYSCONFIG_SOFTRESET_MASK	/;"	d
ELM_SYSSTATUS_RESETDONE	include/linux/mtd/omap_elm.h	/^#define ELM_SYSSTATUS_RESETDONE	/;"	d
ELM_SYSSTATUS_RESETDONE_MASK	include/linux/mtd/omap_elm.h	/^#define ELM_SYSSTATUS_RESETDONE_MASK	/;"	d
ELNRNG	include/linux/errno.h	/^#define	ELNRNG	/;"	d
ELOOP	fs/yaffs2/yportenv.h	/^#define ELOOP	/;"	d
ELOOP	include/linux/errno.h	/^#define	ELOOP	/;"	d
ELSI	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ELSI	/;"	d
ELSI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ELSI	/;"	d
ELSI_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ELSI_P	/;"	d
ELzmaDummy	lib/lzma/LzmaDec.c	/^} ELzmaDummy;$/;"	t	typeref:enum:__anon7c0cd23f0103	file:
ELzmaFinishMode	lib/lzma/LzmaDec.h	/^} ELzmaFinishMode;$/;"	t	typeref:enum:__anon7c0cd2440203
ELzmaStatus	lib/lzma/LzmaDec.h	/^} ELzmaStatus;$/;"	t	typeref:enum:__anon7c0cd2440303
EMAC0	arch/powerpc/dts/arches.dts	/^			EMAC0: ethernet@ef600e00 {$/;"	l
EMAC0	arch/powerpc/dts/canyonlands.dts	/^			EMAC0: ethernet@ef600e00 {$/;"	l
EMAC0	arch/powerpc/dts/glacier.dts	/^			EMAC0: ethernet@ef600e00 {$/;"	l
EMAC0_BASE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_BASE	/;"	d
EMAC0_IAH	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_IAH	/;"	d
EMAC0_IAL	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_IAL	/;"	d
EMAC0_IER	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_IER	/;"	d
EMAC0_IPGVR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_IPGVR	/;"	d
EMAC0_ISR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_ISR	/;"	d
EMAC0_I_FRAME_GAP_REG	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_I_FRAME_GAP_REG	/;"	d
EMAC0_MACCFG	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define EMAC0_MACCFG /;"	d
EMAC0_MR0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_MR0	/;"	d
EMAC0_MR1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_MR1	/;"	d
EMAC0_PAUSE_TIME_REG	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_PAUSE_TIME_REG	/;"	d
EMAC0_PTR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_PTR	/;"	d
EMAC0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC0_RESET	/;"	d
EMAC0_RWMR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_RWMR	/;"	d
EMAC0_RXM	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_RXM	/;"	d
EMAC0_RX_HI_LO_WMARK	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_RX_HI_LO_WMARK	/;"	d
EMAC0_STACR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_STACR	/;"	d
EMAC0_TMR0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_TMR0	/;"	d
EMAC0_TMR1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_TMR1	/;"	d
EMAC0_TRTR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC0_TRTR	/;"	d
EMAC1	arch/powerpc/dts/arches.dts	/^			EMAC1: ethernet@ef600f00 {$/;"	l
EMAC1	arch/powerpc/dts/canyonlands.dts	/^			EMAC1: ethernet@ef600f00 {$/;"	l
EMAC1	arch/powerpc/dts/glacier.dts	/^			EMAC1: ethernet@ef600f00 {$/;"	l
EMAC1_BASE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC1_BASE	/;"	d
EMAC1_MACCFG	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define EMAC1_MACCFG /;"	d
EMAC1_MR1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC1_MR1	/;"	d
EMAC1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define EMAC1_RESET	/;"	d
EMAC2	arch/powerpc/dts/arches.dts	/^			EMAC2: ethernet@ef601100 {$/;"	l
EMAC2	arch/powerpc/dts/glacier.dts	/^			EMAC2: ethernet@ef601100 {$/;"	l
EMAC3	arch/powerpc/dts/glacier.dts	/^			EMAC3: ethernet@ef601200 {$/;"	l
EMAC_4XX_HW_PST	arch/powerpc/include/asm/ppc4xx-emac.h	/^} EMAC_4XX_HW_ST, *EMAC_4XX_HW_PST;$/;"	t	typeref:struct:emac_4xx_hw_st *
EMAC_4XX_HW_ST	arch/powerpc/include/asm/ppc4xx-emac.h	/^} EMAC_4XX_HW_ST, *EMAC_4XX_HW_PST;$/;"	t	typeref:struct:emac_4xx_hw_st
EMAC_ADDR0_HIGH	drivers/net/sun8i_emac.c	/^#define EMAC_ADDR0_HIGH	/;"	d	file:
EMAC_ADDR0_LOW	drivers/net/sun8i_emac.c	/^#define EMAC_ADDR0_LOW	/;"	d	file:
EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_ADDRHI /;"	d
EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_ADDRHI /;"	d
EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_ADDRHI /;"	d
EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_ADDRLO /;"	d
EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_ADDRLO /;"	d
EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_ADDRLO /;"	d
EMAC_AUTOPAD	drivers/net/pic32_eth.h	/^#define EMAC_AUTOPAD	/;"	d
EMAC_BASE_ADDR	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_BASE_ADDR /;"	d
EMAC_BASE_ADDR	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define EMAC_BASE_ADDR	/;"	d
EMAC_CH_RX	drivers/net/davinci_emac.h	/^#define EMAC_CH_RX	/;"	d
EMAC_CH_TX	drivers/net/davinci_emac.h	/^#define EMAC_CH_TX	/;"	d
EMAC_CPPI_EOP_BIT	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_EOP_BIT	/;"	d
EMAC_CPPI_EOQ_BIT	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_EOQ_BIT	/;"	d
EMAC_CPPI_OWNERSHIP_BIT	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_OWNERSHIP_BIT	/;"	d
EMAC_CPPI_PASS_CRC_BIT	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_PASS_CRC_BIT	/;"	d
EMAC_CPPI_RX_ERROR_FRAME	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_RX_ERROR_FRAME	/;"	d
EMAC_CPPI_SOP_BIT	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_SOP_BIT	/;"	d
EMAC_CPPI_TEARDOWN_COMPLETE_BIT	drivers/net/davinci_emac.h	/^#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT	/;"	d
EMAC_CRCENABLE	drivers/net/pic32_eth.h	/^#define EMAC_CRCENABLE	/;"	d
EMAC_CRCERR	drivers/net/sunxi_emac.c	/^#define EMAC_CRCERR	/;"	d	file:
EMAC_CTL0	drivers/net/sun8i_emac.c	/^#define EMAC_CTL0	/;"	d	file:
EMAC_CTL1	drivers/net/sun8i_emac.c	/^#define EMAC_CTL1	/;"	d	file:
EMAC_EMACSL_BASE_ADDR	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_EMACSL_BASE_ADDR	/;"	d
EMAC_EMACSW_BASE_OFS	drivers/net/keystone_net.c	/^#define EMAC_EMACSW_BASE_OFS	/;"	d	file:
EMAC_EMACSW_PORT_BASE_OFS	drivers/net/keystone_net.c	/^#define EMAC_EMACSW_PORT_BASE_OFS	/;"	d	file:
EMAC_EXCESS	drivers/net/pic32_eth.h	/^#define EMAC_EXCESS	/;"	d
EMAC_FLC	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_FLC /;"	d
EMAC_FLC	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_FLC /;"	d
EMAC_FLC	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_FLC /;"	d
EMAC_FULLDUP	drivers/net/pic32_eth.h	/^#define EMAC_FULLDUP	/;"	d
EMAC_HASHHI	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_HASHHI /;"	d
EMAC_HASHHI	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_HASHHI /;"	d
EMAC_HASHHI	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_HASHHI /;"	d
EMAC_HASHLO	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_HASHLO /;"	d
EMAC_HASHLO	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_HASHLO /;"	d
EMAC_HASHLO	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_HASHLO /;"	d
EMAC_HW_RAM_ADDR	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_HW_RAM_ADDR /;"	d
EMAC_INT_EN	drivers/net/sun8i_emac.c	/^#define EMAC_INT_EN	/;"	d	file:
EMAC_INT_STA	drivers/net/sun8i_emac.c	/^#define EMAC_INT_STA	/;"	d	file:
EMAC_ISR_BFCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_BFCS	/;"	d
EMAC_ISR_BP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_BP	/;"	d
EMAC_ISR_DB0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_DB0	/;"	d
EMAC_ISR_DB1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_DB1	/;"	d
EMAC_ISR_DBDM	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_DBDM	/;"	d
EMAC_ISR_IRE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_IRE	/;"	d
EMAC_ISR_MOF	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_MOF	/;"	d
EMAC_ISR_MOS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_MOS	/;"	d
EMAC_ISR_ORE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_ORE	/;"	d
EMAC_ISR_OVR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_OVR	/;"	d
EMAC_ISR_PP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_PP	/;"	d
EMAC_ISR_PTLE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_PTLE	/;"	d
EMAC_ISR_RP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_RP	/;"	d
EMAC_ISR_SE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_SE	/;"	d
EMAC_ISR_SE0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_SE0	/;"	d
EMAC_ISR_SE1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_SE1	/;"	d
EMAC_ISR_SYE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_SYE	/;"	d
EMAC_ISR_TE0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_TE0	/;"	d
EMAC_ISR_TE1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_ISR_TE1	/;"	d
EMAC_LENERR	drivers/net/sunxi_emac.c	/^#define EMAC_LENERR	/;"	d	file:
EMAC_LENGTHCK	drivers/net/pic32_eth.h	/^#define EMAC_LENGTHCK	/;"	d
EMAC_MACCONTROL_FULLDUPLEX_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE	/;"	d
EMAC_MACCONTROL_FULLDUPLEX_ENABLE	drivers/net/davinci_emac.h	/^#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE	/;"	d
EMAC_MACCONTROL_GIGABIT_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MACCONTROL_GIGABIT_ENABLE	/;"	d
EMAC_MACCONTROL_GIGABIT_ENABLE	drivers/net/davinci_emac.h	/^#define EMAC_MACCONTROL_GIGABIT_ENABLE	/;"	d
EMAC_MACCONTROL_GIGFORCE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MACCONTROL_GIGFORCE	/;"	d
EMAC_MACCONTROL_GIGFORCE	drivers/net/davinci_emac.h	/^#define EMAC_MACCONTROL_GIGFORCE	/;"	d
EMAC_MACCONTROL_MIIEN_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MACCONTROL_MIIEN_ENABLE	/;"	d
EMAC_MACCONTROL_MIIEN_ENABLE	drivers/net/davinci_emac.h	/^#define EMAC_MACCONTROL_MIIEN_ENABLE	/;"	d
EMAC_MACCONTROL_RMIISPEED_100	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MACCONTROL_RMIISPEED_100	/;"	d
EMAC_MACCONTROL_RMIISPEED_100	drivers/net/davinci_emac.h	/^#define EMAC_MACCONTROL_RMIISPEED_100	/;"	d
EMAC_MAC_ADDR_IS_VALID	drivers/net/davinci_emac.h	/^#define EMAC_MAC_ADDR_IS_VALID	/;"	d
EMAC_MAC_ADDR_MATCH	drivers/net/davinci_emac.h	/^#define EMAC_MAC_ADDR_MATCH	/;"	d
EMAC_MAC_CTL0_RFC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL0_RFC	/;"	d	file:
EMAC_MAC_CTL0_SETUP	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL0_SETUP	/;"	d	file:
EMAC_MAC_CTL0_TFC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL0_TFC	/;"	d	file:
EMAC_MAC_CTL1_ADP	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_ADP	/;"	d	file:
EMAC_MAC_CTL1_BNB	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_BNB	/;"	d	file:
EMAC_MAC_CTL1_CRC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_CRC	/;"	d	file:
EMAC_MAC_CTL1_DCRC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_DCRC	/;"	d	file:
EMAC_MAC_CTL1_ED	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_ED	/;"	d	file:
EMAC_MAC_CTL1_FLC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_FLC	/;"	d	file:
EMAC_MAC_CTL1_HF	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_HF	/;"	d	file:
EMAC_MAC_CTL1_LPE	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_LPE	/;"	d	file:
EMAC_MAC_CTL1_NB	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_NB	/;"	d	file:
EMAC_MAC_CTL1_PC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_PC	/;"	d	file:
EMAC_MAC_CTL1_PRE	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_PRE	/;"	d	file:
EMAC_MAC_CTL1_SETUP	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_SETUP	/;"	d	file:
EMAC_MAC_CTL1_VC	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CTL1_VC	/;"	d	file:
EMAC_MAC_CW	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_CW	/;"	d	file:
EMAC_MAC_IPGT	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_IPGT	/;"	d	file:
EMAC_MAC_MFL	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_MFL	/;"	d	file:
EMAC_MAC_NBTB_IPG1	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_NBTB_IPG1	/;"	d	file:
EMAC_MAC_NBTB_IPG2	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_NBTB_IPG2	/;"	d	file:
EMAC_MAC_RM	drivers/net/sunxi_emac.c	/^#define EMAC_MAC_RM	/;"	d	file:
EMAC_MAX_ETHERNET_PKT_SIZE	drivers/net/davinci_emac.h	/^#define EMAC_MAX_ETHERNET_PKT_SIZE	/;"	d
EMAC_MAX_RX_BUFFERS	drivers/net/davinci_emac.h	/^#define EMAC_MAX_RX_BUFFERS	/;"	d
EMAC_MDIO_BASE_ADDR	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_MDIO_BASE_ADDR /;"	d
EMAC_MDIO_BASE_ADDR	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MDIO_BASE_ADDR	/;"	d
EMAC_MDIO_BASE_ADDR	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define EMAC_MDIO_BASE_ADDR	/;"	d
EMAC_MDIO_BUS_FREQ	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_MDIO_BUS_FREQ /;"	d
EMAC_MDIO_BUS_FREQ	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MDIO_BUS_FREQ	/;"	d
EMAC_MDIO_BUS_FREQ	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define EMAC_MDIO_BUS_FREQ	/;"	d
EMAC_MDIO_CLOCK_FREQ	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_MDIO_CLOCK_FREQ /;"	d
EMAC_MDIO_CLOCK_FREQ	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MDIO_CLOCK_FREQ	/;"	d
EMAC_MDIO_CLOCK_FREQ	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define EMAC_MDIO_CLOCK_FREQ	/;"	d
EMAC_MII_CMD	drivers/net/sun8i_emac.c	/^#define EMAC_MII_CMD	/;"	d	file:
EMAC_MII_DATA	drivers/net/sun8i_emac.c	/^#define EMAC_MII_DATA	/;"	d	file:
EMAC_MIN_ETHERNET_PKT_SIZE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_MIN_ETHERNET_PKT_SIZE	/;"	d
EMAC_MIN_ETHERNET_PKT_SIZE	drivers/net/davinci_emac.h	/^#define EMAC_MIN_ETHERNET_PKT_SIZE	/;"	d
EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_MMC_CTL /;"	d
EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_MMC_CTL /;"	d
EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_MMC_CTL /;"	d
EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_MMC_RIRQE /;"	d
EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_MMC_RIRQE /;"	d
EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_MMC_RIRQE /;"	d
EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_MMC_RIRQS /;"	d
EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_MMC_RIRQS /;"	d
EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_MMC_RIRQS /;"	d
EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_MMC_TIRQE /;"	d
EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_MMC_TIRQE /;"	d
EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_MMC_TIRQE /;"	d
EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_MMC_TIRQS /;"	d
EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_MMC_TIRQS /;"	d
EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_MMC_TIRQS /;"	d
EMAC_MR0_RXE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR0_RXE	/;"	d
EMAC_MR0_RXI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR0_RXI	/;"	d
EMAC_MR0_SRST	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR0_SRST	/;"	d
EMAC_MR0_TXE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR0_TXE	/;"	d
EMAC_MR0_TXI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR0_TXI	/;"	d
EMAC_MR0_WKE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR0_WKE	/;"	d
EMAC_MR1_AEMI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_AEMI	/;"	d
EMAC_MR1_APP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_APP	/;"	d
EMAC_MR1_EIFC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_EIFC	/;"	d
EMAC_MR1_FDE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_FDE	/;"	d
EMAC_MR1_FIFO_MASK	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_FIFO_MASK	/;"	d
EMAC_MR1_FIFO_SIZE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_FIFO_SIZE	/;"	d
EMAC_MR1_ILE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_ILE	/;"	d
EMAC_MR1_IPPA	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_IPPA	/;"	d
EMAC_MR1_IPPA_GET	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_IPPA_GET(/;"	d
EMAC_MR1_IPPA_SET	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_IPPA_SET(/;"	d
EMAC_MR1_IST	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_IST	/;"	d
EMAC_MR1_JUMBO_ENABLE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_JUMBO_ENABLE	/;"	d
EMAC_MR1_MF_1000GPCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_MF_1000GPCS	/;"	d
EMAC_MR1_MF_1000MBPS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_MF_1000MBPS	/;"	d
EMAC_MR1_MF_100MBPS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_MF_100MBPS	/;"	d
EMAC_MR1_MWSW	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_MWSW	/;"	d
EMAC_MR1_OBCI_100	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_OBCI_100	/;"	d
EMAC_MR1_OBCI_66	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_OBCI_66	/;"	d
EMAC_MR1_OBCI_83	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_OBCI_83	/;"	d
EMAC_MR1_OBCI_GT100	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_OBCI_GT100	/;"	d
EMAC_MR1_RFS_16K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_16K	/;"	d
EMAC_MR1_RFS_1K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_1K	/;"	d
EMAC_MR1_RFS_2K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_2K	/;"	d
EMAC_MR1_RFS_4K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_4K	/;"	d
EMAC_MR1_RFS_512	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_512	/;"	d
EMAC_MR1_RFS_8K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_8K	/;"	d
EMAC_MR1_RFS_MASK	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RFS_MASK	/;"	d
EMAC_MR1_RSVD	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RSVD	/;"	d
EMAC_MR1_RSVD1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_RSVD1	/;"	d
EMAC_MR1_TR0_DEPEND	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TR0_DEPEND	/;"	d
EMAC_MR1_TR0_MULTI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TR0_MULTI	/;"	d
EMAC_MR1_TR1_DEPEND	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TR1_DEPEND	/;"	d
EMAC_MR1_TR1_MULTI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TR1_MULTI	/;"	d
EMAC_MR1_TR_MULTI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TR_MULTI	/;"	d
EMAC_MR1_TX_FIFO_16K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_16K	/;"	d
EMAC_MR1_TX_FIFO_1K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_1K	/;"	d
EMAC_MR1_TX_FIFO_2K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_2K	/;"	d
EMAC_MR1_TX_FIFO_4K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_4K	/;"	d
EMAC_MR1_TX_FIFO_512	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_512	/;"	d
EMAC_MR1_TX_FIFO_8K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_8K	/;"	d
EMAC_MR1_TX_FIFO_MASK	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_TX_FIFO_MASK	/;"	d
EMAC_MR1_VLE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_MR1_VLE	/;"	d
EMAC_NUM_DEV	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_NUM_DEV	/;"	d
EMAC_NUM_STATS	drivers/net/davinci_emac.h	/^#define EMAC_NUM_STATS	/;"	d
EMAC_OPMODE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_OPMODE /;"	d
EMAC_OPMODE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_OPMODE /;"	d
EMAC_OPMODE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_OPMODE /;"	d
EMAC_PADENABLE	drivers/net/pic32_eth.h	/^#define EMAC_PADENABLE	/;"	d
EMAC_PHY_MODE_GMII_NONE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_GMII_NONE	/;"	d
EMAC_PHY_MODE_MII_NONE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_MII_NONE	/;"	d
EMAC_PHY_MODE_NONE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_NONE	/;"	d
EMAC_PHY_MODE_NONE_GMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_NONE_GMII	/;"	d
EMAC_PHY_MODE_NONE_MII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_NONE_MII	/;"	d
EMAC_PHY_MODE_NONE_RGMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_NONE_RGMII	/;"	d
EMAC_PHY_MODE_RGMII_NONE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_RGMII_NONE	/;"	d
EMAC_PHY_MODE_RGMII_RGMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_PHY_MODE_RGMII_RGMII	/;"	d
EMAC_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMAC_PLL_MASK = 0x3,$/;"	e	enum:__anon3783c4e20303
EMAC_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMAC_PLL_SELECT_CODEC = 0x1,$/;"	e	enum:__anon3783c4e20303
EMAC_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMAC_PLL_SELECT_GENERAL = 0x2,$/;"	e	enum:__anon3783c4e20303
EMAC_PLL_SELECT_NEW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMAC_PLL_SELECT_NEW = 0x0,$/;"	e	enum:__anon3783c4e20303
EMAC_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMAC_PLL_SHIFT = 0,$/;"	e	enum:__anon3783c4e20303
EMAC_PTP_ACCR	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ACCR /;"	d
EMAC_PTP_ADDEND	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ADDEND /;"	d
EMAC_PTP_ALARMHI	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ALARMHI /;"	d
EMAC_PTP_ALARMLO	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ALARMLO /;"	d
EMAC_PTP_CTL	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_CTL /;"	d
EMAC_PTP_FOFF	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_FOFF /;"	d
EMAC_PTP_FV1	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_FV1 /;"	d
EMAC_PTP_FV2	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_FV2 /;"	d
EMAC_PTP_FV3	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_FV3 /;"	d
EMAC_PTP_ID_OFF	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ID_OFF /;"	d
EMAC_PTP_ID_SNAP	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ID_SNAP /;"	d
EMAC_PTP_IE	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_IE /;"	d
EMAC_PTP_ISTAT	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_ISTAT /;"	d
EMAC_PTP_OFFSET	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_OFFSET /;"	d
EMAC_PTP_PPS_PERIOD	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_PPS_PERIOD /;"	d
EMAC_PTP_PPS_STARTHI	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_PPS_STARTHI /;"	d
EMAC_PTP_PPS_STARTLO	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_PPS_STARTLO /;"	d
EMAC_PTP_RXSNAPHI	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_RXSNAPHI /;"	d
EMAC_PTP_RXSNAPLO	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_RXSNAPLO /;"	d
EMAC_PTP_TIMEHI	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_TIMEHI /;"	d
EMAC_PTP_TIMELO	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_TIMELO /;"	d
EMAC_PTP_TXSNAPHI	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_TXSNAPHI /;"	d
EMAC_PTP_TXSNAPLO	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define EMAC_PTP_TXSNAPLO /;"	d
EMAC_RESET_TIMEOUT	drivers/net/4xx_enet.c	/^#define EMAC_RESET_TIMEOUT /;"	d	file:
EMAC_RMII_RESET	drivers/net/pic32_eth.h	/^#define EMAC_RMII_RESET	/;"	d
EMAC_RMII_SPD100	drivers/net/pic32_eth.h	/^#define EMAC_RMII_SPD100	/;"	d
EMAC_RMR_AROP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_AROP	/;"	d
EMAC_RMR_ARP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_ARP	/;"	d
EMAC_RMR_ARPI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_ARPI	/;"	d
EMAC_RMR_ARRP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_ARRP	/;"	d
EMAC_RMR_BAE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_BAE	/;"	d
EMAC_RMR_IAE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_IAE	/;"	d
EMAC_RMR_MAE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_MAE	/;"	d
EMAC_RMR_MIAE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_MIAE	/;"	d
EMAC_RMR_PME	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_PME	/;"	d
EMAC_RMR_PMME	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_PMME	/;"	d
EMAC_RMR_PPP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_PPP	/;"	d
EMAC_RMR_SFCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_SFCS	/;"	d
EMAC_RMR_SP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RMR_SP	/;"	d
EMAC_RXBUF_SIZE	drivers/net/davinci_emac.h	/^#define EMAC_RXBUF_SIZE	/;"	d
EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_ALIGN /;"	d
EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_ALIGN /;"	d
EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_ALIGN /;"	d
EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_ALLFRM /;"	d
EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_ALLFRM /;"	d
EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_ALLFRM /;"	d
EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_ALLOCT /;"	d
EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_ALLOCT /;"	d
EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_ALLOCT /;"	d
EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_BROAD /;"	d
EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_BROAD /;"	d
EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_BROAD /;"	d
EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_DMAOVF /;"	d
EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_DMAOVF /;"	d
EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_DMAOVF /;"	d
EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_EQ64 /;"	d
EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_EQ64 /;"	d
EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_EQ64 /;"	d
EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_FCS /;"	d
EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_FCS /;"	d
EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_FCS /;"	d
EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_GE1024 /;"	d
EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_GE1024 /;"	d
EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_GE1024 /;"	d
EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LNERRI /;"	d
EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LNERRI /;"	d
EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LNERRI /;"	d
EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LNERRO /;"	d
EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LNERRO /;"	d
EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LNERRO /;"	d
EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LONG /;"	d
EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LONG /;"	d
EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LONG /;"	d
EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LT1024 /;"	d
EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LT1024 /;"	d
EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LT1024 /;"	d
EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LT128 /;"	d
EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LT128 /;"	d
EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LT128 /;"	d
EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LT256 /;"	d
EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LT256 /;"	d
EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LT256 /;"	d
EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_LT512 /;"	d
EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_LT512 /;"	d
EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_LT512 /;"	d
EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_MACCTL /;"	d
EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_MACCTL /;"	d
EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_MACCTL /;"	d
EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_MULTI /;"	d
EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_MULTI /;"	d
EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_MULTI /;"	d
EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_OCTET /;"	d
EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_OCTET /;"	d
EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_OCTET /;"	d
EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_OK /;"	d
EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_OK /;"	d
EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_OK /;"	d
EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_OPCODE /;"	d
EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_OPCODE /;"	d
EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_OPCODE /;"	d
EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_PAUSE /;"	d
EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_PAUSE /;"	d
EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_PAUSE /;"	d
EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_SHORT /;"	d
EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_SHORT /;"	d
EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_SHORT /;"	d
EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_TYPED /;"	d
EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_TYPED /;"	d
EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_TYPED /;"	d
EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RXC_UNICST /;"	d
EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RXC_UNICST /;"	d
EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RXC_UNICST /;"	d
EMAC_RXENABLE	drivers/net/pic32_eth.h	/^#define EMAC_RXENABLE	/;"	d
EMAC_RXMBPENABLE_RXBROADEN	drivers/net/davinci_emac.h	/^#define EMAC_RXMBPENABLE_RXBROADEN	/;"	d
EMAC_RXMBPENABLE_RXCAFEN_ENABLE	drivers/net/davinci_emac.h	/^#define EMAC_RXMBPENABLE_RXCAFEN_ENABLE	/;"	d
EMAC_RXPAUSE	drivers/net/pic32_eth.h	/^#define EMAC_RXPAUSE	/;"	d
EMAC_RX_BCO	drivers/net/sunxi_emac.c	/^#define EMAC_RX_BCO	/;"	d	file:
EMAC_RX_BUFSIZE	drivers/net/sunxi_emac.c	/^#define EMAC_RX_BUFSIZE	/;"	d	file:
EMAC_RX_CTL0	drivers/net/sun8i_emac.c	/^#define EMAC_RX_CTL0	/;"	d	file:
EMAC_RX_CTL1	drivers/net/sun8i_emac.c	/^#define EMAC_RX_CTL1	/;"	d	file:
EMAC_RX_CUR_DESC	drivers/net/sun8i_emac.c	/^#define EMAC_RX_CUR_DESC	/;"	d	file:
EMAC_RX_DAF	drivers/net/sunxi_emac.c	/^#define EMAC_RX_DAF	/;"	d	file:
EMAC_RX_DESC_BASE	drivers/net/davinci_emac.h	/^#define EMAC_RX_DESC_BASE	/;"	d
EMAC_RX_DMA_DESC	drivers/net/sun8i_emac.c	/^#define EMAC_RX_DMA_DESC	/;"	d	file:
EMAC_RX_DMA_STA	drivers/net/sun8i_emac.c	/^#define EMAC_RX_DMA_STA	/;"	d	file:
EMAC_RX_DRQ_MODE	drivers/net/sunxi_emac.c	/^#define EMAC_RX_DRQ_MODE	/;"	d	file:
EMAC_RX_ERRORS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ERRORS	/;"	d
EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RX_IRQE /;"	d
EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RX_IRQE /;"	d
EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RX_IRQE /;"	d
EMAC_RX_MCO	drivers/net/sunxi_emac.c	/^#define EMAC_RX_MCO	/;"	d	file:
EMAC_RX_MHF	drivers/net/sunxi_emac.c	/^#define EMAC_RX_MHF	/;"	d	file:
EMAC_RX_PA	drivers/net/sunxi_emac.c	/^#define EMAC_RX_PA	/;"	d	file:
EMAC_RX_PCF	drivers/net/sunxi_emac.c	/^#define EMAC_RX_PCF	/;"	d	file:
EMAC_RX_PCRCE	drivers/net/sunxi_emac.c	/^#define EMAC_RX_PCRCE	/;"	d	file:
EMAC_RX_PLE	drivers/net/sunxi_emac.c	/^#define EMAC_RX_PLE	/;"	d	file:
EMAC_RX_POR	drivers/net/sunxi_emac.c	/^#define EMAC_RX_POR	/;"	d	file:
EMAC_RX_SAF	drivers/net/sunxi_emac.c	/^#define EMAC_RX_SAF	/;"	d	file:
EMAC_RX_SAIF	drivers/net/sunxi_emac.c	/^#define EMAC_RX_SAIF	/;"	d	file:
EMAC_RX_SETUP	drivers/net/sunxi_emac.c	/^#define EMAC_RX_SETUP	/;"	d	file:
EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RX_STAT /;"	d
EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RX_STAT /;"	d
EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RX_STAT /;"	d
EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_RX_STKY /;"	d
EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_RX_STKY /;"	d
EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_RX_STKY /;"	d
EMAC_RX_ST_AE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_AE	/;"	d
EMAC_RX_ST_BFCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_BFCS	/;"	d
EMAC_RX_ST_BP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_BP	/;"	d
EMAC_RX_ST_IRE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_IRE	/;"	d
EMAC_RX_ST_OE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_OE	/;"	d
EMAC_RX_ST_ORE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_ORE	/;"	d
EMAC_RX_ST_PP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_PP	/;"	d
EMAC_RX_ST_PTL	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_PTL	/;"	d
EMAC_RX_ST_RP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_RP	/;"	d
EMAC_RX_ST_SE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_RX_ST_SE	/;"	d
EMAC_RX_TM	drivers/net/sunxi_emac.c	/^#define EMAC_RX_TM	/;"	d	file:
EMAC_RX_UCAD	drivers/net/sunxi_emac.c	/^#define EMAC_RX_UCAD	/;"	d	file:
EMAC_SGMII_BASE_ADDR	arch/arm/include/asm/ti-common/keystone_net.h	/^#define EMAC_SGMII_BASE_ADDR	/;"	d
EMAC_SOFTRESET	drivers/net/pic32_eth.h	/^#define EMAC_SOFTRESET	/;"	d
EMAC_STAADD	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_STAADD /;"	d
EMAC_STAADD	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_STAADD /;"	d
EMAC_STAADD	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_STAADD /;"	d
EMAC_STACR_CLK_100MHZ	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_CLK_100MHZ	/;"	d
EMAC_STACR_CLK_66MHZ	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_CLK_66MHZ	/;"	d
EMAC_STACR_CLK_83MHZ	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_CLK_83MHZ	/;"	d
EMAC_STACR_INDIRECT_MODE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_INDIRECT_MODE /;"	d
EMAC_STACR_MDIO_ADDR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_MDIO_ADDR	/;"	d
EMAC_STACR_MDIO_READ	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_MDIO_READ	/;"	d
EMAC_STACR_MDIO_READ_INC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_MDIO_READ_INC /;"	d
EMAC_STACR_MDIO_WRITE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_MDIO_WRITE	/;"	d
EMAC_STACR_OC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_OC	/;"	d
EMAC_STACR_OC_MASK	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_OC_MASK	/;"	d
EMAC_STACR_OP_MASK	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_OP_MASK	/;"	d
EMAC_STACR_PHYE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_PHYE	/;"	d
EMAC_STACR_READ	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_READ	/;"	d
EMAC_STACR_WRITE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_STACR_WRITE	/;"	d
EMAC_STADAT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_STADAT /;"	d
EMAC_STADAT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_STADAT /;"	d
EMAC_STADAT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_STADAT /;"	d
EMAC_STATS_PST	arch/powerpc/include/asm/ppc4xx-emac.h	/^} EMAC_STATS_ST, *EMAC_STATS_PST;$/;"	t	typeref:struct:emac_stats_st *
EMAC_STATS_ST	arch/powerpc/include/asm/ppc4xx-emac.h	/^} EMAC_STATS_ST, *EMAC_STATS_PST;$/;"	t	typeref:struct:emac_stats_st
EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_SYSCTL /;"	d
EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_SYSCTL /;"	d
EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_SYSCTL /;"	d
EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_SYSTAT /;"	d
EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_SYSTAT /;"	d
EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_SYSTAT /;"	d
EMAC_TEARDOWN_VALUE	drivers/net/davinci_emac.h	/^#define EMAC_TEARDOWN_VALUE	/;"	d
EMAC_TMR0_FC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TMR0_FC	/;"	d
EMAC_TMR0_GNP0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TMR0_GNP0	/;"	d
EMAC_TMR0_GNP1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TMR0_GNP1	/;"	d
EMAC_TMR0_GNPD	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TMR0_GNPD	/;"	d
EMAC_TRTR_128	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TRTR_128	/;"	d
EMAC_TRTR_192	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TRTR_192	/;"	d
EMAC_TRTR_256	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TRTR_256	/;"	d
EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_1COL /;"	d
EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_1COL /;"	d
EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_1COL /;"	d
EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_ABORT /;"	d
EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_ABORT /;"	d
EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_ABORT /;"	d
EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_ALLFRM /;"	d
EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_ALLFRM /;"	d
EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_ALLFRM /;"	d
EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_ALLOCT /;"	d
EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_ALLOCT /;"	d
EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_ALLOCT /;"	d
EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_BROAD /;"	d
EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_BROAD /;"	d
EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_BROAD /;"	d
EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_CRSERR /;"	d
EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_CRSERR /;"	d
EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_CRSERR /;"	d
EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_DEFER /;"	d
EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_DEFER /;"	d
EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_DEFER /;"	d
EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_DMAUND /;"	d
EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_DMAUND /;"	d
EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_DMAUND /;"	d
EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_EQ64 /;"	d
EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_EQ64 /;"	d
EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_EQ64 /;"	d
EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_GE1024 /;"	d
EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_GE1024 /;"	d
EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_GE1024 /;"	d
EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_GT1COL /;"	d
EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_GT1COL /;"	d
EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_GT1COL /;"	d
EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_LATECL /;"	d
EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_LATECL /;"	d
EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_LATECL /;"	d
EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_LT1024 /;"	d
EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_LT1024 /;"	d
EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_LT1024 /;"	d
EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_LT128 /;"	d
EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_LT128 /;"	d
EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_LT128 /;"	d
EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_LT256 /;"	d
EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_LT256 /;"	d
EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_LT256 /;"	d
EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_LT512 /;"	d
EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_LT512 /;"	d
EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_LT512 /;"	d
EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_MACCTL /;"	d
EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_MACCTL /;"	d
EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_MACCTL /;"	d
EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_MULTI /;"	d
EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_MULTI /;"	d
EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_MULTI /;"	d
EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_OCTET /;"	d
EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_OCTET /;"	d
EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_OCTET /;"	d
EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_OK /;"	d
EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_OK /;"	d
EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_OK /;"	d
EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_UNICST /;"	d
EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_UNICST /;"	d
EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_UNICST /;"	d
EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_XS_COL /;"	d
EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_XS_COL /;"	d
EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_XS_COL /;"	d
EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TXC_XS_DFR /;"	d
EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TXC_XS_DFR /;"	d
EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TXC_XS_DFR /;"	d
EMAC_TXPAUSE	drivers/net/pic32_eth.h	/^#define EMAC_TXPAUSE	/;"	d
EMAC_TX_AB_M	drivers/net/sunxi_emac.c	/^#define EMAC_TX_AB_M	/;"	d	file:
EMAC_TX_CTL0	drivers/net/sun8i_emac.c	/^#define EMAC_TX_CTL0	/;"	d	file:
EMAC_TX_CTL1	drivers/net/sun8i_emac.c	/^#define EMAC_TX_CTL1	/;"	d	file:
EMAC_TX_CTRL_DEFAULT	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_DEFAULT /;"	d
EMAC_TX_CTRL_GFCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_GFCS	/;"	d
EMAC_TX_CTRL_GP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_GP	/;"	d
EMAC_TX_CTRL_ISA	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_ISA	/;"	d
EMAC_TX_CTRL_IVT	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_IVT	/;"	d
EMAC_TX_CTRL_RSA	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_RSA	/;"	d
EMAC_TX_CTRL_RVT	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_CTRL_RVT	/;"	d
EMAC_TX_CUR_BUF	drivers/net/sun8i_emac.c	/^#define EMAC_TX_CUR_BUF	/;"	d	file:
EMAC_TX_CUR_DESC	drivers/net/sun8i_emac.c	/^#define EMAC_TX_CUR_DESC	/;"	d	file:
EMAC_TX_DESC_BASE	drivers/net/davinci_emac.h	/^#define EMAC_TX_DESC_BASE	/;"	d
EMAC_TX_DMA_DESC	drivers/net/sun8i_emac.c	/^#define EMAC_TX_DMA_DESC	/;"	d	file:
EMAC_TX_DMA_STA	drivers/net/sun8i_emac.c	/^#define EMAC_TX_DMA_STA	/;"	d	file:
EMAC_TX_FLOW_CTL	drivers/net/sun8i_emac.c	/^#define EMAC_TX_FLOW_CTL	/;"	d	file:
EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TX_IRQE /;"	d
EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TX_IRQE /;"	d
EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TX_IRQE /;"	d
EMAC_TX_SETUP	drivers/net/sunxi_emac.c	/^#define EMAC_TX_SETUP	/;"	d	file:
EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TX_STAT /;"	d
EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TX_STAT /;"	d
EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TX_STAT /;"	d
EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_TX_STKY /;"	d
EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_TX_STKY /;"	d
EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_TX_STKY /;"	d
EMAC_TX_ST_BFCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_BFCS	/;"	d
EMAC_TX_ST_BPP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_BPP	/;"	d
EMAC_TX_ST_DEFAULT	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_DEFAULT	/;"	d
EMAC_TX_ST_EC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_EC	/;"	d
EMAC_TX_ST_ED	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_ED	/;"	d
EMAC_TX_ST_LC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_LC	/;"	d
EMAC_TX_ST_LCS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_LCS	/;"	d
EMAC_TX_ST_MC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_MC	/;"	d
EMAC_TX_ST_SC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_SC	/;"	d
EMAC_TX_ST_SQE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_SQE	/;"	d
EMAC_TX_ST_UR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define EMAC_TX_ST_UR	/;"	d
EMAC_TX_TM	drivers/net/sunxi_emac.c	/^#define EMAC_TX_TM	/;"	d	file:
EMAC_VLAN1	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_VLAN1 /;"	d
EMAC_VLAN1	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_VLAN1 /;"	d
EMAC_VLAN1	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_VLAN1 /;"	d
EMAC_VLAN2	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_VLAN2 /;"	d
EMAC_VLAN2	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_VLAN2 /;"	d
EMAC_VLAN2	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_VLAN2 /;"	d
EMAC_VLANX_DEF_VAL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define EMAC_VLANX_DEF_VAL /;"	d
EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_CTL /;"	d
EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_CTL /;"	d
EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_CTL /;"	d
EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFCMD /;"	d
EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFCMD /;"	d
EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFCMD /;"	d
EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFCRC0 /;"	d
EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFCRC0 /;"	d
EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFCRC0 /;"	d
EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFCRC1 /;"	d
EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFCRC1 /;"	d
EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFCRC1 /;"	d
EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFMSK0 /;"	d
EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFMSK0 /;"	d
EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFMSK0 /;"	d
EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFMSK1 /;"	d
EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFMSK1 /;"	d
EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFMSK1 /;"	d
EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFMSK2 /;"	d
EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFMSK2 /;"	d
EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFMSK2 /;"	d
EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFMSK3 /;"	d
EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFMSK3 /;"	d
EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFMSK3 /;"	d
EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define EMAC_WKUP_FFOFF /;"	d
EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define EMAC_WKUP_FFOFF /;"	d
EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define EMAC_WKUP_FFOFF /;"	d
EMAC_WRAPPER_BASE_ADDR	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_WRAPPER_BASE_ADDR /;"	d
EMAC_WRAPPER_BASE_ADDR	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define EMAC_WRAPPER_BASE_ADDR	/;"	d
EMAC_WRAPPER_RAM_ADDR	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define EMAC_WRAPPER_RAM_ADDR /;"	d
EMAC_WRAPPER_RAM_ADDR	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define EMAC_WRAPPER_RAM_ADDR	/;"	d
EMASK_OPE_M	drivers/misc/fsl_iim.c	/^#define EMASK_OPE_M	/;"	d	file:
EMASK_PARITYE_M	drivers/misc/fsl_iim.c	/^#define EMASK_PARITYE_M	/;"	d	file:
EMASK_PRGE_M	drivers/misc/fsl_iim.c	/^#define EMASK_PRGE_M	/;"	d	file:
EMASK_RPE_M	drivers/misc/fsl_iim.c	/^#define EMASK_RPE_M	/;"	d	file:
EMASK_SNSE_M	drivers/misc/fsl_iim.c	/^#define EMASK_SNSE_M	/;"	d	file:
EMASK_WLRE_M	drivers/misc/fsl_iim.c	/^#define EMASK_WLRE_M	/;"	d	file:
EMASK_WPE_M	drivers/misc/fsl_iim.c	/^#define EMASK_WPE_M	/;"	d	file:
EMBEDDIT_devices	cmd/ambapp.c	/^static ambapp_device_name EMBEDDIT_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
EMCONTROL	drivers/net/davinci_emac.h	/^	dv_reg		EMCONTROL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
EMC_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_BASE	/;"	d
EMC_CS0_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_CS0_BASE	/;"	d
EMC_CS1_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_CS1_BASE	/;"	d
EMC_CS2_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_CS2_BASE	/;"	d
EMC_CS3_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_CS3_BASE	/;"	d
EMC_DVFS_LATENCY_MAX_SIZE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define EMC_DVFS_LATENCY_MAX_SIZE	/;"	d
EMC_DYCS0_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_DYCS0_BASE	/;"	d
EMC_DYCS1_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define EMC_DYCS1_BASE	/;"	d
EMC_SDRAM_RATE_T20	arch/arm/mach-tegra/emc.c	/^#define EMC_SDRAM_RATE_T20	/;"	d	file:
EMC_SDRAM_RATE_T25	arch/arm/mach-tegra/emc.c	/^#define EMC_SDRAM_RATE_T25	/;"	d	file:
EMC_STAT_CONFIG_16BIT	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_16BIT	/;"	d
EMC_STAT_CONFIG_32BIT	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_32BIT	/;"	d
EMC_STAT_CONFIG_8BIT	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_8BIT	/;"	d
EMC_STAT_CONFIG_EW	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_EW	/;"	d
EMC_STAT_CONFIG_PB	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_PB	/;"	d
EMC_STAT_CONFIG_PC	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_PC	/;"	d
EMC_STAT_CONFIG_PM	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_PM	/;"	d
EMC_STAT_CONFIG_WP	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_CONFIG_WP	/;"	d
EMC_STAT_WAITOEN	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_WAITOEN(/;"	d
EMC_STAT_WAITPAGE	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_WAITPAGE(/;"	d
EMC_STAT_WAITRD	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_WAITRD(/;"	d
EMC_STAT_WAITTURN	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_WAITTURN(/;"	d
EMC_STAT_WAITWEN	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_WAITWEN(/;"	d
EMC_STAT_WAITWR	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define EMC_STAT_WAITWR(/;"	d
EMDR_DESC	drivers/net/sh_eth.h	/^# define EMDR_DESC /;"	d
EMDR_DESC_R	drivers/net/sh_eth.h	/^	EMDR_DESC_R	= 0x30, \/* Descriptor reserve size *\/$/;"	e	enum:DMAC_M_BIT
EMEDIUMTYPE	include/linux/errno.h	/^#define	EMEDIUMTYPE	/;"	d
EMFILE	include/linux/errno.h	/^#define	EMFILE	/;"	d
EMI1_MASK	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI1_MASK	/;"	d	file:
EMI1_MASK	board/freescale/ls1021aqds/eth.c	/^#define EMI1_MASK /;"	d	file:
EMI1_RGMII	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI1_RGMII	/;"	d	file:
EMI1_RGMII	board/freescale/t4qds/eth.c	/^#define EMI1_RGMII	/;"	d	file:
EMI1_RGMII0	board/freescale/ls1021aqds/eth.c	/^#define EMI1_RGMII0 /;"	d	file:
EMI1_RGMII0	board/freescale/t1040qds/eth.c	/^#define EMI1_RGMII0	/;"	d	file:
EMI1_RGMII1	board/freescale/ls1021aqds/eth.c	/^#define EMI1_RGMII1 /;"	d	file:
EMI1_RGMII1	board/freescale/ls1043aqds/eth.c	/^#define EMI1_RGMII1	/;"	d	file:
EMI1_RGMII1	board/freescale/ls1046aqds/eth.c	/^#define EMI1_RGMII1	/;"	d	file:
EMI1_RGMII1	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_RGMII1	/;"	d	file:
EMI1_RGMII1	board/freescale/t1040qds/eth.c	/^#define EMI1_RGMII1	/;"	d	file:
EMI1_RGMII1	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_RGMII1	/;"	d	file:
EMI1_RGMII2	board/freescale/ls1021aqds/eth.c	/^#define EMI1_RGMII2 /;"	d	file:
EMI1_RGMII2	board/freescale/ls1043aqds/eth.c	/^#define EMI1_RGMII2	/;"	d	file:
EMI1_RGMII2	board/freescale/ls1046aqds/eth.c	/^#define EMI1_RGMII2	/;"	d	file:
EMI1_RGMII2	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_RGMII2	/;"	d	file:
EMI1_RGMII2	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_RGMII2 /;"	d	file:
EMI1_SGMII1	board/freescale/ls1021aqds/eth.c	/^#define EMI1_SGMII1 /;"	d	file:
EMI1_SGMII2	board/freescale/ls1021aqds/eth.c	/^#define EMI1_SGMII2 /;"	d	file:
EMI1_SLOT1	board/freescale/ls1043aqds/eth.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT1	board/freescale/ls1046aqds/eth.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT1	board/freescale/ls2080aqds/eth.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT1	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT1	board/freescale/t1040qds/eth.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT1	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT1	board/freescale/t4qds/eth.c	/^#define EMI1_SLOT1	/;"	d	file:
EMI1_SLOT2	board/freescale/ls1043aqds/eth.c	/^#define EMI1_SLOT2	/;"	d	file:
EMI1_SLOT2	board/freescale/ls1046aqds/eth.c	/^#define EMI1_SLOT2	/;"	d	file:
EMI1_SLOT2	board/freescale/ls2080aqds/eth.c	/^#define EMI1_SLOT2	/;"	d	file:
EMI1_SLOT2	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_SLOT2	/;"	d	file:
EMI1_SLOT2	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT2	/;"	d	file:
EMI1_SLOT2	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT2 /;"	d	file:
EMI1_SLOT2	board/freescale/t4qds/eth.c	/^#define EMI1_SLOT2	/;"	d	file:
EMI1_SLOT3	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT3	board/freescale/ls1043aqds/eth.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT3	board/freescale/ls2080aqds/eth.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT3	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT3	board/freescale/t1040qds/eth.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT3	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT3	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT3 /;"	d	file:
EMI1_SLOT3	board/freescale/t4qds/eth.c	/^#define EMI1_SLOT3	/;"	d	file:
EMI1_SLOT4	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/ls1043aqds/eth.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/ls1046aqds/eth.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/ls2080aqds/eth.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/t1040qds/eth.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT4	board/freescale/t4qds/eth.c	/^#define EMI1_SLOT4	/;"	d	file:
EMI1_SLOT5	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI1_SLOT5	/;"	d	file:
EMI1_SLOT5	board/freescale/ls2080aqds/eth.c	/^#define EMI1_SLOT5	/;"	d	file:
EMI1_SLOT5	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI1_SLOT5	/;"	d	file:
EMI1_SLOT5	board/freescale/t1040qds/eth.c	/^#define EMI1_SLOT5	/;"	d	file:
EMI1_SLOT5	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT5	/;"	d	file:
EMI1_SLOT5	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT5 /;"	d	file:
EMI1_SLOT5	board/freescale/t4qds/eth.c	/^#define EMI1_SLOT5	/;"	d	file:
EMI1_SLOT6	board/freescale/ls2080aqds/eth.c	/^#define EMI1_SLOT6	/;"	d	file:
EMI1_SLOT6	board/freescale/t1040qds/eth.c	/^#define EMI1_SLOT6	/;"	d	file:
EMI1_SLOT6	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT6 /;"	d	file:
EMI1_SLOT7	board/freescale/t1040qds/eth.c	/^#define EMI1_SLOT7	/;"	d	file:
EMI1_SLOT7	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI1_SLOT7 /;"	d	file:
EMI1_SLOT7	board/freescale/t4qds/eth.c	/^#define EMI1_SLOT7	/;"	d	file:
EMI2	board/freescale/ls1043aqds/eth.c	/^#define EMI2	/;"	d	file:
EMI2	board/freescale/ls2080aqds/eth.c	/^#define EMI2	/;"	d	file:
EMI2	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI2	/;"	d	file:
EMI2	board/freescale/t1040qds/eth.c	/^#define EMI2	/;"	d	file:
EMI2	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI2	/;"	d	file:
EMI2	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI2 /;"	d	file:
EMI2	board/freescale/t4qds/eth.c	/^#define EMI2	/;"	d	file:
EMI2_MASK	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI2_MASK	/;"	d	file:
EMI2_SLOT4	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI2_SLOT4	/;"	d	file:
EMI2_SLOT5	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI2_SLOT5	/;"	d	file:
EMIF1_BASE	arch/arm/include/asm/emif.h	/^#define EMIF1_BASE	/;"	d
EMIF2_BASE	arch/arm/include/asm/emif.h	/^#define EMIF2_BASE	/;"	d
EMIF4_0_CFG_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define EMIF4_0_CFG_BASE	/;"	d
EMIF4_1_CFG_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define EMIF4_1_CFG_BASE	/;"	d
EMIF4_CFG_CL	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_CL	/;"	d
EMIF4_CFG_DDR2_DDQS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_DDR2_DDQS	/;"	d
EMIF4_CFG_DDR_DIS_DLL	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_DDR_DIS_DLL	/;"	d
EMIF4_CFG_DDR_TERM	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_DDR_TERM	/;"	d
EMIF4_CFG_EBANK	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_EBANK	/;"	d
EMIF4_CFG_IBANK	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_IBANK	/;"	d
EMIF4_CFG_IBANK_POS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_IBANK_POS	/;"	d
EMIF4_CFG_NARROW_MD	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_NARROW_MD	/;"	d
EMIF4_CFG_PGSIZE	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_PGSIZE	/;"	d
EMIF4_CFG_ROWSIZE	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_ROWSIZE	/;"	d
EMIF4_CFG_SDRAM_TYP	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_SDRAM_TYP	/;"	d
EMIF4_CFG_SDR_DRV	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_CFG_SDR_DRV	/;"	d
EMIF4_DDR1_EXT_STRB_DIS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_DDR1_EXT_STRB_DIS	/;"	d
EMIF4_DDR1_EXT_STRB_EN	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_DDR1_EXT_STRB_EN	/;"	d
EMIF4_DDR1_PWRDN_DIS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_DDR1_PWRDN_DIS	/;"	d
EMIF4_DDR1_PWRDN_EN	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_DDR1_PWRDN_EN	/;"	d
EMIF4_DDR1_READ_LAT	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_DDR1_READ_LAT	/;"	d
EMIF4_INITREF_DIS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_INITREF_DIS	/;"	d
EMIF4_PWR_DPD_DIS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_PWR_DPD_DIS	/;"	d
EMIF4_PWR_DPD_EN	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_PWR_DPD_EN	/;"	d
EMIF4_PWR_IDLE_MODE	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_PWR_IDLE_MODE	/;"	d
EMIF4_PWR_LP_MODE	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_PWR_LP_MODE	/;"	d
EMIF4_PWR_PM_TIM	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_PWR_PM_TIM	/;"	d
EMIF4_REFRESH_RATE	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_REFRESH_RATE	/;"	d
EMIF4_TIM1_T_RAS	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_RAS	/;"	d
EMIF4_TIM1_T_RC	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_RC	/;"	d
EMIF4_TIM1_T_RCD	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_RCD	/;"	d
EMIF4_TIM1_T_RP	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_RP	/;"	d
EMIF4_TIM1_T_RRD	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_RRD	/;"	d
EMIF4_TIM1_T_WR	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_WR	/;"	d
EMIF4_TIM1_T_WTR	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM1_T_WTR	/;"	d
EMIF4_TIM2_T_CKE	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM2_T_CKE	/;"	d
EMIF4_TIM2_T_ODT	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM2_T_ODT	/;"	d
EMIF4_TIM2_T_RTP	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM2_T_RTP	/;"	d
EMIF4_TIM2_T_XP	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM2_T_XP	/;"	d
EMIF4_TIM2_T_XSNR	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM2_T_XSNR	/;"	d
EMIF4_TIM2_T_XSRD	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM2_T_XSRD	/;"	d
EMIF4_TIM3_T_RAS_MAX	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM3_T_RAS_MAX	/;"	d
EMIF4_TIM3_T_RFC	arch/arm/include/asm/arch-omap3/emif4.h	/^#define EMIF4_TIM3_T_RFC	/;"	d
EMIF_4D	arch/arm/include/asm/emif.h	/^#define EMIF_4D	/;"	d
EMIF_4D5	arch/arm/include/asm/emif.h	/^#define EMIF_4D5	/;"	d
EMIF_DDR_PHY_CTRL_1_BASE_VAL	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_BASE_VAL	/;"	d
EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_MASK	/;"	d
EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_SHIFT	/;"	d
EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_MASK	/;"	d
EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_SHIFT	/;"	d
EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_MASK	/;"	d
EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_SHIFT	/;"	d
EMIF_DLL_SLAVE_DLY_CTRL_100_MHZ_AND_LESS	arch/arm/include/asm/emif.h	/^#define EMIF_DLL_SLAVE_DLY_CTRL_100_MHZ_AND_LESS	/;"	d
EMIF_DLL_SLAVE_DLY_CTRL_200_MHZ	arch/arm/include/asm/emif.h	/^#define EMIF_DLL_SLAVE_DLY_CTRL_200_MHZ	/;"	d
EMIF_DLL_SLAVE_DLY_CTRL_400_MHZ	arch/arm/include/asm/emif.h	/^#define EMIF_DLL_SLAVE_DLY_CTRL_400_MHZ	/;"	d
EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_MASK	/;"	d
EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHDW_MASK	/;"	d
EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHDW_SHIFT /;"	d
EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHIFT	/;"	d
EMIF_EXT_PHY_CTRL_TIMING_REG	arch/arm/include/asm/emif.h	/^#define EMIF_EXT_PHY_CTRL_TIMING_REG	/;"	d
EMIF_INTERLEAVING_POLICY	arch/arm/include/asm/emif.h	/^#define EMIF_INTERLEAVING_POLICY /;"	d
EMIF_INTERLEAVING_POLICY_MAX_INTERLEAVING	arch/arm/include/asm/emif.h	/^#define EMIF_INTERLEAVING_POLICY_MAX_INTERLEAVING	/;"	d
EMIF_INTERLEAVING_POLICY_NO_BANK_INTERLEAVING	arch/arm/include/asm/emif.h	/^#define EMIF_INTERLEAVING_POLICY_NO_BANK_INTERLEAVING	/;"	d
EMIF_L3_CONFIG_VAL_SYS_10_LL_0	arch/arm/include/asm/emif.h	/^#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0	/;"	d
EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0	arch/arm/include/asm/emif.h	/^#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0	/;"	d
EMIF_L3_CONFIG_VAL_SYS_10_MPU_5_LL_0	arch/arm/include/asm/emif.h	/^#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_5_LL_0	/;"	d
EMIF_MAX_NUM_FREQUENCIES	arch/arm/include/asm/emif.h	/^#define EMIF_MAX_NUM_FREQUENCIES	/;"	d
EMIF_NANDFSR_ECC_STATE_MASK	drivers/mtd/nand/davinci_nand.c	/^#define EMIF_NANDFSR_ECC_STATE_MASK /;"	d	file:
EMIF_PERIOD_DEN_LIMIT	arch/arm/include/asm/emif.h	/^#define EMIF_PERIOD_DEN_LIMIT	/;"	d
EMIF_PHYCFG	board/ti/ti816x/evm.c	/^#define EMIF_PHYCFG	/;"	d	file:
EMIF_PWR_MGMT_CTRL	arch/arm/include/asm/emif.h	/^#define EMIF_PWR_MGMT_CTRL /;"	d
EMIF_PWR_MGMT_CTRL_SHDW	arch/arm/include/asm/emif.h	/^#define EMIF_PWR_MGMT_CTRL_SHDW /;"	d
EMIF_REG_ACT_CAP_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ACT_CAP_EN_MASK	/;"	d
EMIF_REG_ACT_CAP_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ACT_CAP_EN_SHIFT	/;"	d
EMIF_REG_ADDRESS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ADDRESS_MASK	/;"	d
EMIF_REG_ADDRESS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ADDRESS_SHIFT	/;"	d
EMIF_REG_ADDR_TLMR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ADDR_TLMR_MASK	/;"	d
EMIF_REG_ADDR_TLMR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ADDR_TLMR_SHIFT	/;"	d
EMIF_REG_ASR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ASR_MASK	/;"	d
EMIF_REG_ASR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ASR_SHIFT	/;"	d
EMIF_REG_BE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_BE_MASK	/;"	d
EMIF_REG_BE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_BE_SHIFT	/;"	d
EMIF_REG_CL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CL_MASK	/;"	d
EMIF_REG_CL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CL_SHIFT	/;"	d
EMIF_REG_CMD_FIFO_DEPTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CMD_FIFO_DEPTH_MASK	/;"	d
EMIF_REG_CMD_FIFO_DEPTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CMD_FIFO_DEPTH_SHIFT	/;"	d
EMIF_REG_CNTR1_CFG_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR1_CFG_MASK	/;"	d
EMIF_REG_CNTR1_CFG_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR1_CFG_SHIFT	/;"	d
EMIF_REG_CNTR1_MCONNID_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR1_MCONNID_EN_MASK	/;"	d
EMIF_REG_CNTR1_MCONNID_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR1_MCONNID_EN_SHIFT	/;"	d
EMIF_REG_CNTR1_REGION_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR1_REGION_EN_MASK	/;"	d
EMIF_REG_CNTR1_REGION_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR1_REGION_EN_SHIFT	/;"	d
EMIF_REG_CNTR2_CFG_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR2_CFG_MASK	/;"	d
EMIF_REG_CNTR2_CFG_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR2_CFG_SHIFT	/;"	d
EMIF_REG_CNTR2_MCONNID_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR2_MCONNID_EN_MASK	/;"	d
EMIF_REG_CNTR2_MCONNID_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR2_MCONNID_EN_SHIFT	/;"	d
EMIF_REG_CNTR2_REGION_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR2_REGION_EN_MASK	/;"	d
EMIF_REG_CNTR2_REGION_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CNTR2_REGION_EN_SHIFT	/;"	d
EMIF_REG_COUNTER1_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_COUNTER1_MASK	/;"	d
EMIF_REG_COUNTER1_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_COUNTER1_SHIFT	/;"	d
EMIF_REG_COUNTER2_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_COUNTER2_MASK	/;"	d
EMIF_REG_COUNTER2_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_COUNTER2_SHIFT	/;"	d
EMIF_REG_CS1NVMEN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS1NVMEN_MASK	/;"	d
EMIF_REG_CS1NVMEN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS1NVMEN_SHIFT	/;"	d
EMIF_REG_CS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS_MASK	/;"	d
EMIF_REG_CS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS_SHIFT	/;"	d
EMIF_REG_CS_TIM_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS_TIM_MASK	/;"	d
EMIF_REG_CS_TIM_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS_TIM_SHDW_MASK	/;"	d
EMIF_REG_CS_TIM_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS_TIM_SHDW_SHIFT	/;"	d
EMIF_REG_CS_TIM_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CS_TIM_SHIFT	/;"	d
EMIF_REG_CTL_TLMR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CTL_TLMR_MASK	/;"	d
EMIF_REG_CTL_TLMR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CTL_TLMR_SHIFT	/;"	d
EMIF_REG_CWL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CWL_MASK	/;"	d
EMIF_REG_CWL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_CWL_SHIFT	/;"	d
EMIF_REG_DATA_TLMR_31_0_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DATA_TLMR_31_0_MASK	/;"	d
EMIF_REG_DATA_TLMR_31_0_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DATA_TLMR_31_0_SHIFT	/;"	d
EMIF_REG_DATA_TLMR_63_32_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DATA_TLMR_63_32_MASK	/;"	d
EMIF_REG_DATA_TLMR_63_32_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DATA_TLMR_63_32_SHIFT	/;"	d
EMIF_REG_DATA_TLMR_66_64_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DATA_TLMR_66_64_MASK	/;"	d
EMIF_REG_DATA_TLMR_66_64_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DATA_TLMR_66_64_SHIFT	/;"	d
EMIF_REG_DDR2_DDQS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR2_DDQS_MASK	/;"	d
EMIF_REG_DDR2_DDQS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR2_DDQS_SHIFT	/;"	d
EMIF_REG_DDR_DISABLE_DLL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_DISABLE_DLL_MASK	/;"	d
EMIF_REG_DDR_DISABLE_DLL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_DISABLE_DLL_SHIFT	/;"	d
EMIF_REG_DDR_PHY_CTRL_1_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_PHY_CTRL_1_MASK	/;"	d
EMIF_REG_DDR_PHY_CTRL_1_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_PHY_CTRL_1_SHDW_MASK	/;"	d
EMIF_REG_DDR_PHY_CTRL_1_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_PHY_CTRL_1_SHDW_SHIFT	/;"	d
EMIF_REG_DDR_PHY_CTRL_1_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_PHY_CTRL_1_SHIFT	/;"	d
EMIF_REG_DDR_PHY_CTRL_2_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_PHY_CTRL_2_MASK	/;"	d
EMIF_REG_DDR_PHY_CTRL_2_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_PHY_CTRL_2_SHIFT	/;"	d
EMIF_REG_DDR_TERM_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_TERM_MASK	/;"	d
EMIF_REG_DDR_TERM_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DDR_TERM_SHIFT	/;"	d
EMIF_REG_DLL_SLAVE_DLY_CTRL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DLL_SLAVE_DLY_CTRL_MASK	/;"	d
EMIF_REG_DLL_SLAVE_DLY_CTRL_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DLL_SLAVE_DLY_CTRL_SHDW_MASK	/;"	d
EMIF_REG_DLL_SLAVE_DLY_CTRL_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DLL_SLAVE_DLY_CTRL_SHDW_SHIFT	/;"	d
EMIF_REG_DLL_SLAVE_DLY_CTRL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DLL_SLAVE_DLY_CTRL_SHIFT	/;"	d
EMIF_REG_DNV_LL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DNV_LL_MASK	/;"	d
EMIF_REG_DNV_LL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DNV_LL_SHIFT	/;"	d
EMIF_REG_DNV_SYS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DNV_SYS_MASK	/;"	d
EMIF_REG_DNV_SYS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DNV_SYS_SHIFT	/;"	d
EMIF_REG_DPD_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DPD_EN_MASK	/;"	d
EMIF_REG_DPD_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DPD_EN_SHIFT	/;"	d
EMIF_REG_DQM_TLMR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DQM_TLMR_MASK	/;"	d
EMIF_REG_DQM_TLMR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DQM_TLMR_SHIFT	/;"	d
EMIF_REG_DUAL_CLK_MODE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DUAL_CLK_MODE_MASK	/;"	d
EMIF_REG_DUAL_CLK_MODE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DUAL_CLK_MODE_SHIFT	/;"	d
EMIF_REG_DYN_ODT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DYN_ODT_MASK	/;"	d
EMIF_REG_DYN_ODT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_DYN_ODT_SHIFT	/;"	d
EMIF_REG_EBANK_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EBANK_MASK	/;"	d
EMIF_REG_EBANK_POS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EBANK_POS_MASK	/;"	d
EMIF_REG_EBANK_POS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EBANK_POS_SHIFT	/;"	d
EMIF_REG_EBANK_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EBANK_SHIFT	/;"	d
EMIF_REG_EN_DNV_LL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_DNV_LL_MASK	/;"	d
EMIF_REG_EN_DNV_LL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_DNV_LL_SHIFT	/;"	d
EMIF_REG_EN_DNV_SYS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_DNV_SYS_MASK	/;"	d
EMIF_REG_EN_DNV_SYS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_DNV_SYS_SHIFT	/;"	d
EMIF_REG_EN_ERR_LL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_ERR_LL_MASK	/;"	d
EMIF_REG_EN_ERR_LL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_ERR_LL_SHIFT	/;"	d
EMIF_REG_EN_ERR_SYS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_ERR_SYS_MASK	/;"	d
EMIF_REG_EN_ERR_SYS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_ERR_SYS_SHIFT	/;"	d
EMIF_REG_EN_TA_LL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_TA_LL_MASK	/;"	d
EMIF_REG_EN_TA_LL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_TA_LL_SHIFT	/;"	d
EMIF_REG_EN_TA_SYS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_TA_SYS_MASK	/;"	d
EMIF_REG_EN_TA_SYS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EN_TA_SYS_SHIFT	/;"	d
EMIF_REG_EOI_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EOI_MASK	/;"	d
EMIF_REG_EOI_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_EOI_SHIFT	/;"	d
EMIF_REG_ERR_LL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ERR_LL_MASK	/;"	d
EMIF_REG_ERR_LL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ERR_LL_SHIFT	/;"	d
EMIF_REG_ERR_SYS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ERR_SYS_MASK	/;"	d
EMIF_REG_ERR_SYS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ERR_SYS_SHIFT	/;"	d
EMIF_REG_FAST_INIT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_FAST_INIT_MASK	/;"	d
EMIF_REG_FAST_INIT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_FAST_INIT_SHIFT	/;"	d
EMIF_REG_IBANK_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_IBANK_MASK	/;"	d
EMIF_REG_IBANK_POS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_IBANK_POS_MASK	/;"	d
EMIF_REG_IBANK_POS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_IBANK_POS_SHIFT	/;"	d
EMIF_REG_IBANK_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_IBANK_SHIFT	/;"	d
EMIF_REG_IDLEMODE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_IDLEMODE_MASK	/;"	d
EMIF_REG_IDLEMODE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_IDLEMODE_SHIFT	/;"	d
EMIF_REG_INITREF_DIS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_INITREF_DIS_MASK	/;"	d
EMIF_REG_INITREF_DIS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_INITREF_DIS_SHIFT	/;"	d
EMIF_REG_LEVELING_TO_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LEVELING_TO_MASK	/;"	d
EMIF_REG_LEVLING_TO_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LEVLING_TO_SHIFT	/;"	d
EMIF_REG_LL_BUS_WIDTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LL_BUS_WIDTH_MASK	/;"	d
EMIF_REG_LL_BUS_WIDTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LL_BUS_WIDTH_SHIFT	/;"	d
EMIF_REG_LL_THRESH_MAX_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LL_THRESH_MAX_MASK	/;"	d
EMIF_REG_LL_THRESH_MAX_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LL_THRESH_MAX_SHIFT	/;"	d
EMIF_REG_LP_MODE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LP_MODE_MASK	/;"	d
EMIF_REG_LP_MODE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_LP_MODE_SHIFT	/;"	d
EMIF_REG_MADDRSPACE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MADDRSPACE_MASK	/;"	d
EMIF_REG_MADDRSPACE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MADDRSPACE_SHIFT	/;"	d
EMIF_REG_MAJOR_REVISION_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MAJOR_REVISION_MASK	/;"	d
EMIF_REG_MAJOR_REVISION_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MAJOR_REVISION_SHIFT	/;"	d
EMIF_REG_MBURSTSEQ_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MBURSTSEQ_MASK	/;"	d
EMIF_REG_MBURSTSEQ_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MBURSTSEQ_SHIFT	/;"	d
EMIF_REG_MCMD_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCMD_MASK	/;"	d
EMIF_REG_MCMD_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCMD_SHIFT	/;"	d
EMIF_REG_MCONNID1_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCONNID1_MASK	/;"	d
EMIF_REG_MCONNID1_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCONNID1_SHIFT	/;"	d
EMIF_REG_MCONNID2_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCONNID2_MASK	/;"	d
EMIF_REG_MCONNID2_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCONNID2_SHIFT	/;"	d
EMIF_REG_MCONNID_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCONNID_MASK	/;"	d
EMIF_REG_MCONNID_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MCONNID_SHIFT	/;"	d
EMIF_REG_MC_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MC_MASK	/;"	d
EMIF_REG_MC_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MC_SHIFT	/;"	d
EMIF_REG_MINOR_REVISION_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MINOR_REVISION_MASK	/;"	d
EMIF_REG_MINOR_REVISION_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MINOR_REVISION_SHIFT	/;"	d
EMIF_REG_MMS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MMS_MASK	/;"	d
EMIF_REG_MMS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MMS_SHIFT	/;"	d
EMIF_REG_MODULE_ID_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MODULE_ID_MASK	/;"	d
EMIF_REG_MODULE_ID_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MODULE_ID_SHIFT	/;"	d
EMIF_REG_MPU_THRESH_MAX_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MPU_THRESH_MAX_MASK	/;"	d
EMIF_REG_MPU_THRESH_MAX_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MPU_THRESH_MAX_SHIFT	/;"	d
EMIF_REG_MT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MT_MASK	/;"	d
EMIF_REG_MT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_MT_SHIFT	/;"	d
EMIF_REG_NARROW_MODE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NARROW_MODE_MASK	/;"	d
EMIF_REG_NARROW_MODE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NARROW_MODE_SHIFT	/;"	d
EMIF_REG_NVM_T_RCDMIN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RCDMIN_MASK	/;"	d
EMIF_REG_NVM_T_RCDMIN_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RCDMIN_SHDW_MASK	/;"	d
EMIF_REG_NVM_T_RCDMIN_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RCDMIN_SHDW_SHIFT	/;"	d
EMIF_REG_NVM_T_RCDMIN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RCDMIN_SHIFT	/;"	d
EMIF_REG_NVM_T_RP_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RP_MASK	/;"	d
EMIF_REG_NVM_T_RP_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RP_SHDW_MASK	/;"	d
EMIF_REG_NVM_T_RP_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RP_SHDW_SHIFT	/;"	d
EMIF_REG_NVM_T_RP_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RP_SHIFT	/;"	d
EMIF_REG_NVM_T_RRD_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RRD_MASK	/;"	d
EMIF_REG_NVM_T_RRD_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RRD_SHDW_MASK	/;"	d
EMIF_REG_NVM_T_RRD_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RRD_SHDW_SHIFT	/;"	d
EMIF_REG_NVM_T_RRD_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_RRD_SHIFT	/;"	d
EMIF_REG_NVM_T_WRA_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WRA_MASK	/;"	d
EMIF_REG_NVM_T_WRA_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WRA_SHDW_MASK	/;"	d
EMIF_REG_NVM_T_WRA_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WRA_SHDW_SHIFT	/;"	d
EMIF_REG_NVM_T_WRA_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WRA_SHIFT	/;"	d
EMIF_REG_NVM_T_WTR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WTR_MASK	/;"	d
EMIF_REG_NVM_T_WTR_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WTR_SHDW_MASK	/;"	d
EMIF_REG_NVM_T_WTR_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WTR_SHDW_SHIFT	/;"	d
EMIF_REG_NVM_T_WTR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_WTR_SHIFT	/;"	d
EMIF_REG_NVM_T_XP_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_XP_MASK	/;"	d
EMIF_REG_NVM_T_XP_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_XP_SHDW_MASK	/;"	d
EMIF_REG_NVM_T_XP_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_XP_SHDW_SHIFT	/;"	d
EMIF_REG_NVM_T_XP_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_NVM_T_XP_SHIFT	/;"	d
EMIF_REG_OPG_LD_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_OPG_LD_MASK	/;"	d
EMIF_REG_OPG_LD_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_OPG_LD_SHIFT	/;"	d
EMIF_REG_PAGESIZE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PAGESIZE_MASK	/;"	d
EMIF_REG_PAGESIZE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PAGESIZE_SHIFT	/;"	d
EMIF_REG_PASR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PASR_MASK	/;"	d
EMIF_REG_PASR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PASR_SHIFT	/;"	d
EMIF_REG_PC_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PC_MASK	/;"	d
EMIF_REG_PC_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PC_SHIFT	/;"	d
EMIF_REG_PD_TIM_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PD_TIM_MASK	/;"	d
EMIF_REG_PD_TIM_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PD_TIM_SHDW_MASK	/;"	d
EMIF_REG_PD_TIM_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PD_TIM_SHDW_SHIFT	/;"	d
EMIF_REG_PD_TIM_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PD_TIM_SHIFT	/;"	d
EMIF_REG_PHY_DLL_READY_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PHY_DLL_READY_MASK	/;"	d
EMIF_REG_PHY_DLL_READY_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PHY_DLL_READY_SHIFT	/;"	d
EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR	/;"	d
EMIF_REG_PR_OLD_COUNT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PR_OLD_COUNT_MASK	/;"	d
EMIF_REG_PR_OLD_COUNT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_PR_OLD_COUNT_SHIFT	/;"	d
EMIF_REG_RCMD_FIFO_DEPTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RCMD_FIFO_DEPTH_MASK	/;"	d
EMIF_REG_RCMD_FIFO_DEPTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RCMD_FIFO_DEPTH_SHIFT	/;"	d
EMIF_REG_RDBNUM_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDBNUM_MASK	/;"	d
EMIF_REG_RDBNUM_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDBNUM_SHIFT	/;"	d
EMIF_REG_RDBSIZE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDBSIZE_MASK	/;"	d
EMIF_REG_RDBSIZE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDBSIZE_SHIFT	/;"	d
EMIF_REG_RDLVLGATEINC_INT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLGATEINC_INT_MASK	/;"	d
EMIF_REG_RDLVLGATEINC_INT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLGATEINC_INT_SHIFT	/;"	d
EMIF_REG_RDLVLGATEINC_RMP_INT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLGATEINC_RMP_INT_MASK	/;"	d
EMIF_REG_RDLVLGATEINC_RMP_INT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLGATEINC_RMP_INT_SHIFT	/;"	d
EMIF_REG_RDLVLINC_INT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLINC_INT_MASK	/;"	d
EMIF_REG_RDLVLINC_INT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLINC_INT_SHIFT	/;"	d
EMIF_REG_RDLVLINC_RMP_INT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLINC_RMP_INT_MASK	/;"	d
EMIF_REG_RDLVLINC_RMP_INT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDLVLINC_RMP_INT_SHIFT	/;"	d
EMIF_REG_RDWRLVLFULL_START_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLFULL_START_MASK	/;"	d
EMIF_REG_RDWRLVLFULL_START_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLFULL_START_SHIFT	/;"	d
EMIF_REG_RDWRLVLINC_PRE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLINC_PRE_MASK	/;"	d
EMIF_REG_RDWRLVLINC_PRE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLINC_PRE_SHIFT	/;"	d
EMIF_REG_RDWRLVLINC_RMP_PRE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLINC_RMP_PRE_MASK	/;"	d
EMIF_REG_RDWRLVLINC_RMP_PRE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLINC_RMP_PRE_SHIFT	/;"	d
EMIF_REG_RDWRLVLINC_RMP_WIN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLINC_RMP_WIN_MASK	/;"	d
EMIF_REG_RDWRLVLINC_RMP_WIN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVLINC_RMP_WIN_SHIFT	/;"	d
EMIF_REG_RDWRLVL_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVL_EN_MASK	/;"	d
EMIF_REG_RDWRLVL_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RDWRLVL_EN_SHIFT	/;"	d
EMIF_REG_READ_IDLE_INTERVAL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_INTERVAL_MASK	/;"	d
EMIF_REG_READ_IDLE_INTERVAL_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_INTERVAL_SHDW_MASK	/;"	d
EMIF_REG_READ_IDLE_INTERVAL_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_INTERVAL_SHDW_SHIFT	/;"	d
EMIF_REG_READ_IDLE_INTERVAL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_INTERVAL_SHIFT	/;"	d
EMIF_REG_READ_IDLE_LEN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_LEN_MASK	/;"	d
EMIF_REG_READ_IDLE_LEN_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_LEN_SHDW_MASK	/;"	d
EMIF_REG_READ_IDLE_LEN_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_LEN_SHDW_SHIFT	/;"	d
EMIF_REG_READ_IDLE_LEN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_LEN_SHIFT	/;"	d
EMIF_REG_READ_IDLE_LEN_VAL	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_IDLE_LEN_VAL	/;"	d
EMIF_REG_READ_LATENCY_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_LATENCY_MASK	/;"	d
EMIF_REG_READ_LATENCY_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_LATENCY_SHDW_MASK	/;"	d
EMIF_REG_READ_LATENCY_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_LATENCY_SHDW_SHIFT	/;"	d
EMIF_REG_READ_LATENCY_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_READ_LATENCY_SHIFT	/;"	d
EMIF_REG_REFRESH_EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REFRESH_EN_MASK	/;"	d
EMIF_REG_REFRESH_EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REFRESH_EN_SHIFT	/;"	d
EMIF_REG_REFRESH_RATE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REFRESH_RATE_MASK	/;"	d
EMIF_REG_REFRESH_RATE_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REFRESH_RATE_SHDW_MASK	/;"	d
EMIF_REG_REFRESH_RATE_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REFRESH_RATE_SHDW_SHIFT	/;"	d
EMIF_REG_REFRESH_RATE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REFRESH_RATE_SHIFT	/;"	d
EMIF_REG_REGION_SEL1_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REGION_SEL1_MASK	/;"	d
EMIF_REG_REGION_SEL1_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REGION_SEL1_SHIFT	/;"	d
EMIF_REG_REGION_SEL2_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REGION_SEL2_MASK	/;"	d
EMIF_REG_REGION_SEL2_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_REGION_SEL2_SHIFT	/;"	d
EMIF_REG_RESET_PHY_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RESET_PHY_MASK	/;"	d
EMIF_REG_RESET_PHY_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RESET_PHY_SHIFT	/;"	d
EMIF_REG_ROWSIZE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ROWSIZE_MASK	/;"	d
EMIF_REG_ROWSIZE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ROWSIZE_SHIFT	/;"	d
EMIF_REG_RREG_FIFO_DEPTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RREG_FIFO_DEPTH_MASK	/;"	d
EMIF_REG_RREG_FIFO_DEPTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RREG_FIFO_DEPTH_SHIFT	/;"	d
EMIF_REG_RSD_FIFO_DEPTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RSD_FIFO_DEPTH_MASK	/;"	d
EMIF_REG_RSD_FIFO_DEPTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RSD_FIFO_DEPTH_SHIFT	/;"	d
EMIF_REG_RTL_VERSION_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RTL_VERSION_MASK	/;"	d
EMIF_REG_RTL_VERSION_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_RTL_VERSION_SHIFT	/;"	d
EMIF_REG_SCHEME_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SCHEME_MASK	/;"	d
EMIF_REG_SCHEME_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SCHEME_SHIFT	/;"	d
EMIF_REG_SDRAM_DRIVE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_DRIVE_MASK	/;"	d
EMIF_REG_SDRAM_DRIVE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_DRIVE_SHIFT	/;"	d
EMIF_REG_SDRAM_TYPE_DDR1	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_DDR1	/;"	d
EMIF_REG_SDRAM_TYPE_DDR2	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_DDR2	/;"	d
EMIF_REG_SDRAM_TYPE_DDR3	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_DDR3	/;"	d
EMIF_REG_SDRAM_TYPE_LPDDR1	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_LPDDR1	/;"	d
EMIF_REG_SDRAM_TYPE_LPDDR2_S2	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_LPDDR2_S2	/;"	d
EMIF_REG_SDRAM_TYPE_LPDDR2_S4	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_LPDDR2_S4	/;"	d
EMIF_REG_SDRAM_TYPE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_MASK	/;"	d
EMIF_REG_SDRAM_TYPE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SDRAM_TYPE_SHIFT	/;"	d
EMIF_REG_SRT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SRT_MASK	/;"	d
EMIF_REG_SRT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SRT_SHIFT	/;"	d
EMIF_REG_SR_TIM_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SR_TIM_MASK	/;"	d
EMIF_REG_SR_TIM_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SR_TIM_SHDW_MASK	/;"	d
EMIF_REG_SR_TIM_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SR_TIM_SHDW_SHIFT	/;"	d
EMIF_REG_SR_TIM_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SR_TIM_SHIFT	/;"	d
EMIF_REG_SYS_BUS_WIDTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SYS_BUS_WIDTH_MASK	/;"	d
EMIF_REG_SYS_BUS_WIDTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SYS_BUS_WIDTH_SHIFT	/;"	d
EMIF_REG_SYS_THRESH_MAX_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SYS_THRESH_MAX_MASK	/;"	d
EMIF_REG_SYS_THRESH_MAX_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_SYS_THRESH_MAX_SHIFT	/;"	d
EMIF_REG_TA_CS0EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_CS0EN_MASK	/;"	d
EMIF_REG_TA_CS0EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_CS0EN_SHIFT	/;"	d
EMIF_REG_TA_CS1EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_CS1EN_MASK	/;"	d
EMIF_REG_TA_CS1EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_CS1EN_SHIFT	/;"	d
EMIF_REG_TA_DEVCNT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_DEVCNT_MASK	/;"	d
EMIF_REG_TA_DEVCNT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_DEVCNT_SHIFT	/;"	d
EMIF_REG_TA_DEVWDT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_DEVWDT_MASK	/;"	d
EMIF_REG_TA_DEVWDT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_DEVWDT_SHIFT	/;"	d
EMIF_REG_TA_LL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_LL_MASK	/;"	d
EMIF_REG_TA_LL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_LL_SHIFT	/;"	d
EMIF_REG_TA_REFINTERVAL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_REFINTERVAL_MASK	/;"	d
EMIF_REG_TA_REFINTERVAL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_REFINTERVAL_SHIFT	/;"	d
EMIF_REG_TA_SFEXITEN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_SFEXITEN_MASK	/;"	d
EMIF_REG_TA_SFEXITEN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_SFEXITEN_SHIFT	/;"	d
EMIF_REG_TA_SYS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_SYS_MASK	/;"	d
EMIF_REG_TA_SYS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TA_SYS_SHIFT	/;"	d
EMIF_REG_TLEC_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TLEC_MASK	/;"	d
EMIF_REG_TLEC_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TLEC_SHIFT	/;"	d
EMIF_REG_TM_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TM_MASK	/;"	d
EMIF_REG_TM_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TM_SHIFT	/;"	d
EMIF_REG_TOTAL_TIME_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TOTAL_TIME_MASK	/;"	d
EMIF_REG_TOTAL_TIME_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_TOTAL_TIME_SHIFT	/;"	d
EMIF_REG_T_CKESR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKESR_MASK	/;"	d
EMIF_REG_T_CKESR_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKESR_SHDW_MASK	/;"	d
EMIF_REG_T_CKESR_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKESR_SHDW_SHIFT	/;"	d
EMIF_REG_T_CKESR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKESR_SHIFT	/;"	d
EMIF_REG_T_CKE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKE_MASK	/;"	d
EMIF_REG_T_CKE_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKE_SHDW_MASK	/;"	d
EMIF_REG_T_CKE_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKE_SHDW_SHIFT	/;"	d
EMIF_REG_T_CKE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_CKE_SHIFT	/;"	d
EMIF_REG_T_ODT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_ODT_MASK	/;"	d
EMIF_REG_T_ODT_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_ODT_SHDW_MASK	/;"	d
EMIF_REG_T_ODT_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_ODT_SHDW_SHIFT	/;"	d
EMIF_REG_T_ODT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_ODT_SHIFT	/;"	d
EMIF_REG_T_RAS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_MASK	/;"	d
EMIF_REG_T_RAS_MAX_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_MAX_MASK	/;"	d
EMIF_REG_T_RAS_MAX_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_MAX_SHDW_MASK	/;"	d
EMIF_REG_T_RAS_MAX_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_MAX_SHDW_SHIFT	/;"	d
EMIF_REG_T_RAS_MAX_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_MAX_SHIFT	/;"	d
EMIF_REG_T_RAS_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_SHDW_MASK	/;"	d
EMIF_REG_T_RAS_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_SHDW_SHIFT	/;"	d
EMIF_REG_T_RAS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RAS_SHIFT	/;"	d
EMIF_REG_T_RCD_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RCD_MASK	/;"	d
EMIF_REG_T_RCD_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RCD_SHDW_MASK	/;"	d
EMIF_REG_T_RCD_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RCD_SHDW_SHIFT	/;"	d
EMIF_REG_T_RCD_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RCD_SHIFT	/;"	d
EMIF_REG_T_RC_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RC_MASK	/;"	d
EMIF_REG_T_RC_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RC_SHDW_MASK	/;"	d
EMIF_REG_T_RC_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RC_SHDW_SHIFT	/;"	d
EMIF_REG_T_RC_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RC_SHIFT	/;"	d
EMIF_REG_T_RFC_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RFC_MASK	/;"	d
EMIF_REG_T_RFC_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RFC_SHDW_MASK	/;"	d
EMIF_REG_T_RFC_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RFC_SHDW_SHIFT	/;"	d
EMIF_REG_T_RFC_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RFC_SHIFT	/;"	d
EMIF_REG_T_RP_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RP_MASK	/;"	d
EMIF_REG_T_RP_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RP_SHDW_MASK	/;"	d
EMIF_REG_T_RP_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RP_SHDW_SHIFT	/;"	d
EMIF_REG_T_RP_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RP_SHIFT	/;"	d
EMIF_REG_T_RRD_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RRD_MASK	/;"	d
EMIF_REG_T_RRD_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RRD_SHDW_MASK	/;"	d
EMIF_REG_T_RRD_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RRD_SHDW_SHIFT	/;"	d
EMIF_REG_T_RRD_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RRD_SHIFT	/;"	d
EMIF_REG_T_RTP_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RTP_MASK	/;"	d
EMIF_REG_T_RTP_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RTP_SHDW_MASK	/;"	d
EMIF_REG_T_RTP_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RTP_SHDW_SHIFT	/;"	d
EMIF_REG_T_RTP_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_RTP_SHIFT	/;"	d
EMIF_REG_T_TDQSCKMAX_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_TDQSCKMAX_MASK	/;"	d
EMIF_REG_T_TDQSCKMAX_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_TDQSCKMAX_SHDW_MASK	/;"	d
EMIF_REG_T_TDQSCKMAX_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_TDQSCKMAX_SHDW_SHIFT	/;"	d
EMIF_REG_T_TDQSCKMAX_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_TDQSCKMAX_SHIFT	/;"	d
EMIF_REG_T_WR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WR_MASK	/;"	d
EMIF_REG_T_WR_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WR_SHDW_MASK	/;"	d
EMIF_REG_T_WR_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WR_SHDW_SHIFT	/;"	d
EMIF_REG_T_WR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WR_SHIFT	/;"	d
EMIF_REG_T_WTR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WTR_MASK	/;"	d
EMIF_REG_T_WTR_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WTR_SHDW_MASK	/;"	d
EMIF_REG_T_WTR_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WTR_SHDW_SHIFT	/;"	d
EMIF_REG_T_WTR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_WTR_SHIFT	/;"	d
EMIF_REG_T_XP_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XP_MASK	/;"	d
EMIF_REG_T_XP_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XP_SHDW_MASK	/;"	d
EMIF_REG_T_XP_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XP_SHDW_SHIFT	/;"	d
EMIF_REG_T_XP_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XP_SHIFT	/;"	d
EMIF_REG_T_XSNR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSNR_MASK	/;"	d
EMIF_REG_T_XSNR_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSNR_SHDW_MASK	/;"	d
EMIF_REG_T_XSNR_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSNR_SHDW_SHIFT	/;"	d
EMIF_REG_T_XSNR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSNR_SHIFT	/;"	d
EMIF_REG_T_XSRD_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSRD_MASK	/;"	d
EMIF_REG_T_XSRD_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSRD_SHDW_MASK	/;"	d
EMIF_REG_T_XSRD_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSRD_SHDW_SHIFT	/;"	d
EMIF_REG_T_XSRD_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_T_XSRD_SHIFT	/;"	d
EMIF_REG_VALUE_0_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_VALUE_0_MASK	/;"	d
EMIF_REG_VALUE_0_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_VALUE_0_SHIFT	/;"	d
EMIF_REG_WRLVLINC_INT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_WRLVLINC_INT_MASK	/;"	d
EMIF_REG_WRLVLINC_INT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_WRLVLINC_INT_SHIFT	/;"	d
EMIF_REG_WRLVLINC_RMP_INT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_WRLVLINC_RMP_INT_MASK	/;"	d
EMIF_REG_WRLVLINC_RMP_INT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_WRLVLINC_RMP_INT_SHIFT	/;"	d
EMIF_REG_WR_FIFO_DEPTH_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_WR_FIFO_DEPTH_MASK	/;"	d
EMIF_REG_WR_FIFO_DEPTH_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_WR_FIFO_DEPTH_SHIFT	/;"	d
EMIF_REG_ZQ_CS0EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_CS0EN_MASK	/;"	d
EMIF_REG_ZQ_CS0EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_CS0EN_SHIFT	/;"	d
EMIF_REG_ZQ_CS1EN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_CS1EN_MASK	/;"	d
EMIF_REG_ZQ_CS1EN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_CS1EN_SHIFT	/;"	d
EMIF_REG_ZQ_DUALCALEN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_DUALCALEN_MASK	/;"	d
EMIF_REG_ZQ_DUALCALEN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_DUALCALEN_SHIFT	/;"	d
EMIF_REG_ZQ_REFINTERVAL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_REFINTERVAL_MASK	/;"	d
EMIF_REG_ZQ_REFINTERVAL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_REFINTERVAL_SHIFT	/;"	d
EMIF_REG_ZQ_SFEXITEN_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_SFEXITEN_MASK	/;"	d
EMIF_REG_ZQ_SFEXITEN_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_SFEXITEN_SHIFT	/;"	d
EMIF_REG_ZQ_ZQCL_MULT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQCL_MULT_MASK	/;"	d
EMIF_REG_ZQ_ZQCL_MULT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQCL_MULT_SHIFT	/;"	d
EMIF_REG_ZQ_ZQCS_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQCS_MASK	/;"	d
EMIF_REG_ZQ_ZQCS_SHDW_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQCS_SHDW_MASK	/;"	d
EMIF_REG_ZQ_ZQCS_SHDW_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQCS_SHDW_SHIFT	/;"	d
EMIF_REG_ZQ_ZQCS_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQCS_SHIFT	/;"	d
EMIF_REG_ZQ_ZQINIT_MULT_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQINIT_MULT_MASK	/;"	d
EMIF_REG_ZQ_ZQINIT_MULT_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_REG_ZQ_ZQINIT_MULT_SHIFT	/;"	d
EMIF_SDCFG	board/ti/ti816x/evm.c	/^#define EMIF_SDCFG	/;"	d	file:
EMIF_SDRAM_TYPE_DDR2	arch/arm/include/asm/emif.h	/^#define EMIF_SDRAM_TYPE_DDR2	/;"	d
EMIF_SDRAM_TYPE_DDR3	arch/arm/include/asm/emif.h	/^#define EMIF_SDRAM_TYPE_DDR3	/;"	d
EMIF_SDRAM_TYPE_LPDDR2	arch/arm/include/asm/emif.h	/^#define EMIF_SDRAM_TYPE_LPDDR2	/;"	d
EMIF_SDRC_ADDRSPC_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_ADDRSPC_MASK	/;"	d
EMIF_SDRC_ADDRSPC_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_ADDRSPC_SHIFT	/;"	d
EMIF_SDRC_ADDR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_ADDR_MASK	/;"	d
EMIF_SDRC_ADDR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_ADDR_SHIFT	/;"	d
EMIF_SDRC_INTL_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_INTL_MASK	/;"	d
EMIF_SDRC_INTL_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_INTL_SHIFT	/;"	d
EMIF_SDRC_MAP_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_MAP_MASK	/;"	d
EMIF_SDRC_MAP_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_SDRC_MAP_SHIFT	/;"	d
EMIF_SDREF	board/ti/ti816x/evm.c	/^#define EMIF_SDREF	/;"	d	file:
EMIF_SYS_ADDR_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_SYS_ADDR_MASK	/;"	d
EMIF_SYS_ADDR_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_SYS_ADDR_SHIFT	/;"	d
EMIF_SYS_SIZE_MASK	arch/arm/include/asm/emif.h	/^#define EMIF_SYS_SIZE_MASK	/;"	d
EMIF_SYS_SIZE_SHIFT	arch/arm/include/asm/emif.h	/^#define EMIF_SYS_SIZE_SHIFT	/;"	d
EMIF_TIM1	board/ti/ti816x/evm.c	/^#define EMIF_TIM1	/;"	d	file:
EMIF_TIM2	board/ti/ti816x/evm.c	/^#define EMIF_TIM2	/;"	d	file:
EMIF_TIM3	board/ti/ti816x/evm.c	/^#define EMIF_TIM3	/;"	d	file:
EMIF_ZQCS_INTERVAL_DVFS_IN_US	arch/arm/include/asm/emif.h	/^#define EMIF_ZQCS_INTERVAL_DVFS_IN_US	/;"	d
EMIF_ZQCS_INTERVAL_NORMAL_IN_US	arch/arm/include/asm/emif.h	/^#define EMIF_ZQCS_INTERVAL_NORMAL_IN_US	/;"	d
EMISO	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define EMISO	/;"	d
EMIT_CLEAR	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define EMIT_CLEAR(/;"	d
EMIT_CLEAR	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define EMIT_CLEAR(/;"	d
EMIT_CLEAR	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define EMIT_CLEAR(/;"	d
EMIT_CLEAR	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define EMIT_CLEAR(/;"	d
EMIT_CLEAR	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define EMIT_CLEAR(/;"	d
EMIT_EXIT	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define EMIT_EXIT(/;"	d
EMIT_EXIT	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define EMIT_EXIT(/;"	d
EMIT_EXIT	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define EMIT_EXIT(/;"	d
EMIT_EXIT	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define EMIT_EXIT(/;"	d
EMIT_EXIT	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define EMIT_EXIT(/;"	d
EMIT_MASKDELAY	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define EMIT_MASKDELAY(/;"	d
EMIT_MASKDELAY	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define EMIT_MASKDELAY(/;"	d
EMIT_MASKDELAY	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define EMIT_MASKDELAY(/;"	d
EMIT_MASKDELAY	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define EMIT_MASKDELAY(/;"	d
EMIT_MASKDELAY	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define EMIT_MASKDELAY(/;"	d
EMIT_MASKPOLL	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define EMIT_MASKPOLL(/;"	d
EMIT_MASKPOLL	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define EMIT_MASKPOLL(/;"	d
EMIT_MASKPOLL	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define EMIT_MASKPOLL(/;"	d
EMIT_MASKPOLL	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define EMIT_MASKPOLL(/;"	d
EMIT_MASKPOLL	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define EMIT_MASKPOLL(/;"	d
EMIT_MASKWRITE	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define EMIT_MASKWRITE(/;"	d
EMIT_MASKWRITE	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define EMIT_MASKWRITE(/;"	d
EMIT_MASKWRITE	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define EMIT_MASKWRITE(/;"	d
EMIT_MASKWRITE	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define EMIT_MASKWRITE(/;"	d
EMIT_MASKWRITE	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define EMIT_MASKWRITE(/;"	d
EMIT_WRITE	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define EMIT_WRITE(/;"	d
EMIT_WRITE	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define EMIT_WRITE(/;"	d
EMIT_WRITE	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define EMIT_WRITE(/;"	d
EMIT_WRITE	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define EMIT_WRITE(/;"	d
EMIT_WRITE	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define EMIT_WRITE(/;"	d
EMI_ACKMSK	arch/arm/include/asm/arch-spear/spr_emi.h	/^#define EMI_ACKMSK	/;"	d
EMI_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define EMI_BASE_ADDR	/;"	d
EMI_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define EMI_BASE_ADDR	/;"	d
EMI_CNTL_ENBBYTER	arch/arm/include/asm/arch-spear/spr_emi.h	/^#define EMI_CNTL_ENBBYTER	/;"	d
EMI_CNTL_ENBBYTERW	arch/arm/include/asm/arch-spear/spr_emi.h	/^#define EMI_CNTL_ENBBYTERW	/;"	d
EMI_CNTL_ENBBYTEW	arch/arm/include/asm/arch-spear/spr_emi.h	/^#define EMI_CNTL_ENBBYTEW	/;"	d
EMI_DIV_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define EMI_DIV_MAX /;"	d	file:
EMI_MASK	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI_MASK	/;"	d	file:
EMI_NONE	board/freescale/b4860qds/eth_b4860qds.c	/^#define EMI_NONE /;"	d	file:
EMI_NONE	board/freescale/corenet_ds/eth_p4080.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/ls1043aqds/eth.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/ls1046aqds/eth.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/ls2080aqds/eth.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/t102xqds/eth_t102xqds.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/t1040qds/eth.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/t208xqds/eth_t208xqds.c	/^#define EMI_NONE	/;"	d	file:
EMI_NONE	board/freescale/t4qds/eth.c	/^#define EMI_NONE	/;"	d	file:
EMLINK	include/linux/errno.h	/^#define	EMLINK	/;"	d
EMMC44_END_INDEX	arch/arm/mach-exynos/spl_boot.c	/^	EMMC44_END_INDEX,$/;"	e	enum:index	file:
EMMC44_INDEX	arch/arm/mach-exynos/spl_boot.c	/^	EMMC44_INDEX,$/;"	e	enum:index	file:
EMMCP_CTRL0	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define EMMCP_CTRL0	/;"	d
EMMCP_MPSBEGIN0	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define EMMCP_MPSBEGIN0	/;"	d
EMMCP_SEND0	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define EMMCP_SEND0	/;"	d
EMMC_CLK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_CLK	/;"	d
EMMC_CMD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_CMD	/;"	d
EMMC_DATA0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA0	/;"	d
EMMC_DATA1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA1	/;"	d
EMMC_DATA2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA2	/;"	d
EMMC_DATA3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA3	/;"	d
EMMC_DATA4	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA4	/;"	d
EMMC_DATA5	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA5	/;"	d
EMMC_DATA6	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA6	/;"	d
EMMC_DATA7	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EMMC_DATA7	/;"	d
EMMC_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define EMMC_DEV	/;"	d
EMMC_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_DIV_MASK		= 0x7f,$/;"	e	enum:__anon375ccd790103
EMMC_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_DIV_MASK		= 0x3f,$/;"	e	enum:__anon3783c4e20203
EMMC_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_DIV_SHIFT		= 0,$/;"	e	enum:__anon375ccd790103
EMMC_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_DIV_SHIFT		= 8,$/;"	e	enum:__anon3783c4e20203
EMMC_ENV	include/configs/mx6sabre_common.h	/^#define EMMC_ENV /;"	d
EMMC_GPCS	drivers/net/xilinx_ll_temac.h	/^#define EMMC_GPCS	/;"	d
EMMC_HOST	drivers/net/xilinx_ll_temac.h	/^#define EMMC_HOST	/;"	d
EMMC_LSPD_10	drivers/net/xilinx_ll_temac.h	/^#define EMMC_LSPD_10	/;"	d
EMMC_LSPD_100	drivers/net/xilinx_ll_temac.h	/^#define EMMC_LSPD_100	/;"	d
EMMC_LSPD_1000	drivers/net/xilinx_ll_temac.h	/^#define EMMC_LSPD_1000	/;"	d
EMMC_LSPD_MASK	drivers/net/xilinx_ll_temac.h	/^#define EMMC_LSPD_MASK	/;"	d
EMMC_LSPD_POS	drivers/net/xilinx_ll_temac.h	/^#define EMMC_LSPD_POS	/;"	d
EMMC_MIN_FREQ	drivers/mmc/rockchip_sdhci.c	/^#define EMMC_MIN_FREQ	/;"	d	file:
EMMC_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config EMMC_MODE$/;"	c	choice:choice5ba020940104
EMMC_MODE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define EMMC_MODE	/;"	d
EMMC_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_PLL_MASK		= 3,$/;"	e	enum:__anon375ccd790103
EMMC_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_PLL_MASK		= 3,$/;"	e	enum:__anon3783c4e20203
EMMC_PLL_SELECT_24MHZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_PLL_SELECT_24MHZ,$/;"	e	enum:__anon3783c4e20203
EMMC_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_PLL_SELECT_CODEC	= 0,$/;"	e	enum:__anon3783c4e20203
EMMC_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20203
EMMC_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_PLL_SHIFT		= 12,$/;"	e	enum:__anon375ccd790103
EMMC_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	EMMC_PLL_SHIFT		= 0xe,$/;"	e	enum:__anon3783c4e20203
EMMC_RGMII	drivers/net/xilinx_ll_temac.h	/^#define EMMC_RGMII	/;"	d
EMMC_RX16	drivers/net/xilinx_ll_temac.h	/^#define EMMC_RX16	/;"	d
EMMC_SEL_24M	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_SEL_24M,$/;"	e	enum:__anon375ccd790103
EMMC_SEL_APLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_SEL_APLL		= 0,$/;"	e	enum:__anon375ccd790103
EMMC_SEL_DPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_SEL_DPLL,$/;"	e	enum:__anon375ccd790103
EMMC_SEL_GPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	EMMC_SEL_GPLL,$/;"	e	enum:__anon375ccd790103
EMMC_SGMII	drivers/net/xilinx_ll_temac.h	/^#define EMMC_SGMII	/;"	d
EMMC_TX16	drivers/net/xilinx_ll_temac.h	/^#define EMMC_TX16	/;"	d
EMPI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	EMPI	/;"	d
EMPTY	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define EMPTY /;"	d
EMPTY	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define EMPTY$/;"	d
EMPTY	arch/arm/mach-exynos/exynos5_setup.h	/^#define EMPTY	/;"	d
EMPTY_ARRAY	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define EMPTY_ARRAY /;"	d
EMPTY_SCAN_SIZE	fs/jffs2/jffs2_1pass.c	/^static inline uint32_t EMPTY_SCAN_SIZE(uint32_t sector_size)$/;"	f	typeref:typename:uint32_t	file:
EMPTY_SCAN_SIZE	fs/jffs2/jffs2_nand_1pass.c	/^#define	EMPTY_SCAN_SIZE	/;"	d	file:
EMREN	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define EMREN	/;"	d
EMRS_A	board/espt/lowlevel_init.S	/^EMRS_A:		.long	0xFE902000$/;"	l
EMRS_A	board/renesas/r7780mp/lowlevel_init.S	/^EMRS_A:			.long	0xFEC02000$/;"	l
EMRS_D	board/espt/lowlevel_init.S	/^EMRS_D:		.long	0x00000000$/;"	l
EMRS_D	board/renesas/r7780mp/lowlevel_init.S	/^EMRS_D:			.long	0x0$/;"	l
EMR_RTT2	include/synopsys/dwcddr21mctl.h	/^#define EMR_RTT2(/;"	d
EMR_RTT6	include/synopsys/dwcddr21mctl.h	/^#define EMR_RTT6(/;"	d
EMSGSIZE	include/linux/errno.h	/^#define	EMSGSIZE	/;"	d
EMU0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define EMU0	/;"	d
EMU1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define EMU1	/;"	d
EMU2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define EMU2	/;"	d
EMU3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define EMU3	/;"	d
EMU4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define EMU4	/;"	d
EMULTIHOP	include/linux/errno.h	/^#define	EMULTIHOP	/;"	d
EMUL_GPIO_COUNT	drivers/spmi/spmi-sandbox.c	/^#define EMUL_GPIO_COUNT /;"	d	file:
EMUL_GPIO_PID_END	drivers/spmi/spmi-sandbox.c	/^#define EMUL_GPIO_PID_END /;"	d	file:
EMUL_GPIO_PID_START	drivers/spmi/spmi-sandbox.c	/^#define EMUL_GPIO_PID_START /;"	d	file:
EMUL_GPIO_REG_END	drivers/spmi/spmi-sandbox.c	/^#define EMUL_GPIO_REG_END /;"	d	file:
EMUL_PERM_R	drivers/spmi/spmi-sandbox.c	/^#define EMUL_PERM_R /;"	d	file:
EMUL_PERM_RW	drivers/spmi/spmi-sandbox.c	/^#define EMUL_PERM_RW /;"	d	file:
EMUL_PERM_W	drivers/spmi/spmi-sandbox.c	/^#define EMUL_PERM_W /;"	d	file:
EMURSTIE_MASK	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define EMURSTIE_MASK	/;"	d
EMUSW0	arch/blackfin/lib/kgdb.h	/^#define EMUSW0	/;"	d
EMUSW1	arch/blackfin/lib/kgdb.h	/^#define EMUSW1	/;"	d
EMUSW2	arch/blackfin/lib/kgdb.h	/^#define EMUSW2	/;"	d
EMUSW3	arch/blackfin/lib/kgdb.h	/^#define EMUSW3	/;"	d
EMUSW4	arch/blackfin/lib/kgdb.h	/^#define EMUSW4	/;"	d
EMUSW5	arch/blackfin/lib/kgdb.h	/^#define EMUSW5	/;"	d
EMU_DEVICE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define EMU_DEVICE	/;"	d
EMU_DEVICE	arch/arm/include/asm/omap_common.h	/^#define EMU_DEVICE /;"	d
EMU_RUN	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define EMU_RUN	/;"	d
EMVSIM1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define EMVSIM1_IPS_BASE_ADDR /;"	d
EMVSIM2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define EMVSIM2_IPS_BASE_ADDR /;"	d
EM_386	include/elf.h	/^#define EM_386	/;"	d
EM_68HC05	include/elf.h	/^#define EM_68HC05	/;"	d
EM_68HC08	include/elf.h	/^#define EM_68HC08	/;"	d
EM_68HC11	include/elf.h	/^#define EM_68HC11	/;"	d
EM_68HC12	include/elf.h	/^#define EM_68HC12	/;"	d
EM_68HC16	include/elf.h	/^#define EM_68HC16	/;"	d
EM_68K	include/elf.h	/^#define EM_68K	/;"	d
EM_860	include/elf.h	/^#define EM_860	/;"	d
EM_88K	include/elf.h	/^#define EM_88K	/;"	d
EM_960	include/elf.h	/^#define EM_960	/;"	d
EM_ALPHA	include/elf.h	/^#define EM_ALPHA	/;"	d
EM_ARC	include/elf.h	/^#define EM_ARC	/;"	d
EM_ARM	include/elf.h	/^#define EM_ARM	/;"	d
EM_AVR	include/elf.h	/^#define EM_AVR	/;"	d
EM_CHRIS	include/elf.h	/^#define EM_CHRIS	/;"	d
EM_COLDFIRE	include/elf.h	/^#define EM_COLDFIRE	/;"	d
EM_D10V	include/elf.h	/^#define EM_D10V	/;"	d
EM_D30V	include/elf.h	/^#define EM_D30V	/;"	d
EM_FIREPATH	include/elf.h	/^#define EM_FIREPATH	/;"	d
EM_FR20	include/elf.h	/^#define EM_FR20	/;"	d
EM_FR30	include/elf.h	/^#define EM_FR30	/;"	d
EM_FX66	include/elf.h	/^#define EM_FX66	/;"	d
EM_H8S	include/elf.h	/^#define EM_H8S	/;"	d
EM_H8_300	include/elf.h	/^#define EM_H8_300	/;"	d
EM_H8_300H	include/elf.h	/^#define EM_H8_300H	/;"	d
EM_H8_500	include/elf.h	/^#define EM_H8_500	/;"	d
EM_HUANY	include/elf.h	/^#define EM_HUANY	/;"	d
EM_IA_64	include/elf.h	/^#define EM_IA_64	/;"	d
EM_JAVELIN	include/elf.h	/^#define EM_JAVELIN	/;"	d
EM_M32	include/elf.h	/^#define EM_M32	/;"	d
EM_M32R	include/elf.h	/^#define EM_M32R	/;"	d
EM_ME16	include/elf.h	/^#define EM_ME16	/;"	d
EM_MIPS	include/elf.h	/^#define EM_MIPS	/;"	d
EM_MIPS_RS4_BE	include/elf.h	/^#define EM_MIPS_RS4_BE	/;"	d
EM_MIPS_X	include/elf.h	/^#define EM_MIPS_X	/;"	d
EM_MMA	include/elf.h	/^#define EM_MMA	/;"	d
EM_MMIX	include/elf.h	/^#define EM_MMIX	/;"	d
EM_MN10200	include/elf.h	/^#define EM_MN10200	/;"	d
EM_MN10300	include/elf.h	/^#define EM_MN10300	/;"	d
EM_NCPU	include/elf.h	/^#define EM_NCPU	/;"	d
EM_NDR1	include/elf.h	/^#define EM_NDR1	/;"	d
EM_NONE	include/elf.h	/^#define EM_NONE	/;"	d
EM_NUM	include/elf.h	/^#define EM_NUM	/;"	d
EM_PARISC	include/elf.h	/^#define EM_PARISC	/;"	d
EM_PCP	include/elf.h	/^#define EM_PCP	/;"	d
EM_PDSP	include/elf.h	/^#define EM_PDSP	/;"	d
EM_PJ	include/elf.h	/^#define EM_PJ	/;"	d
EM_PPC	include/elf.h	/^#define EM_PPC	/;"	d
EM_PPC64	include/elf.h	/^#define EM_PPC64	/;"	d
EM_PRISM	include/elf.h	/^#define EM_PRISM	/;"	d
EM_RCE	include/elf.h	/^#define EM_RCE	/;"	d
EM_RH32	include/elf.h	/^#define EM_RH32	/;"	d
EM_S370	include/elf.h	/^#define EM_S370	/;"	d
EM_S390	include/elf.h	/^#define EM_S390	/;"	d
EM_SH	include/elf.h	/^#define EM_SH	/;"	d
EM_SPARC	include/elf.h	/^#define EM_SPARC	/;"	d
EM_SPARC32PLUS	include/elf.h	/^#define EM_SPARC32PLUS	/;"	d
EM_SPARCV9	include/elf.h	/^#define EM_SPARCV9	/;"	d
EM_ST100	include/elf.h	/^#define EM_ST100	/;"	d
EM_ST19	include/elf.h	/^#define EM_ST19	/;"	d
EM_ST7	include/elf.h	/^#define EM_ST7	/;"	d
EM_ST9PLUS	include/elf.h	/^#define EM_ST9PLUS	/;"	d
EM_STARCORE	include/elf.h	/^#define EM_STARCORE	/;"	d
EM_SVX	include/elf.h	/^#define EM_SVX	/;"	d
EM_TINYJ	include/elf.h	/^#define EM_TINYJ	/;"	d
EM_TRICORE	include/elf.h	/^#define EM_TRICORE	/;"	d
EM_V800	include/elf.h	/^#define EM_V800	/;"	d
EM_V850	include/elf.h	/^#define EM_V850	/;"	d
EM_VAX	include/elf.h	/^#define EM_VAX	/;"	d
EM_VPP500	include/elf.h	/^#define EM_VPP500	/;"	d
EM_X86_64	include/elf.h	/^#define EM_X86_64	/;"	d
EM_ZSP	include/elf.h	/^#define EM_ZSP	/;"	d
EN	arch/arm/include/asm/arch-omap3/mux.h	/^#define EN	/;"	d
EN	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define EN /;"	d
EN	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define EN /;"	d
EN0_BOUNDARY	drivers/net/8390.h	/^#define EN0_BOUNDARY	/;"	d
EN0_CLDAHI	drivers/net/8390.h	/^#define EN0_CLDAHI	/;"	d
EN0_CLDALO	drivers/net/8390.h	/^#define EN0_CLDALO	/;"	d
EN0_COUNTER0	drivers/net/8390.h	/^#define EN0_COUNTER0	/;"	d
EN0_COUNTER1	drivers/net/8390.h	/^#define EN0_COUNTER1	/;"	d
EN0_COUNTER2	drivers/net/8390.h	/^#define EN0_COUNTER2	/;"	d
EN0_CRDAHI	drivers/net/8390.h	/^#define EN0_CRDAHI	/;"	d
EN0_CRDALO	drivers/net/8390.h	/^#define EN0_CRDALO	/;"	d
EN0_DCFG	drivers/net/8390.h	/^#define EN0_DCFG	/;"	d
EN0_FIFO	drivers/net/8390.h	/^#define EN0_FIFO	/;"	d
EN0_IMR	drivers/net/8390.h	/^#define EN0_IMR	/;"	d
EN0_ISR	drivers/net/8390.h	/^#define EN0_ISR	/;"	d
EN0_NCR	drivers/net/8390.h	/^#define EN0_NCR	/;"	d
EN0_RCNTHI	drivers/net/8390.h	/^#define EN0_RCNTHI	/;"	d
EN0_RCNTLO	drivers/net/8390.h	/^#define EN0_RCNTLO	/;"	d
EN0_RSARHI	drivers/net/8390.h	/^#define EN0_RSARHI	/;"	d
EN0_RSARLO	drivers/net/8390.h	/^#define EN0_RSARLO	/;"	d
EN0_RSR	drivers/net/8390.h	/^#define EN0_RSR	/;"	d
EN0_RXCR	drivers/net/8390.h	/^#define EN0_RXCR	/;"	d
EN0_STARTPG	drivers/net/8390.h	/^#define EN0_STARTPG	/;"	d
EN0_STOPPG	drivers/net/8390.h	/^#define EN0_STOPPG	/;"	d
EN0_TCNTHI	drivers/net/8390.h	/^#define EN0_TCNTHI	/;"	d
EN0_TCNTLO	drivers/net/8390.h	/^#define EN0_TCNTLO	/;"	d
EN0_TPSR	drivers/net/8390.h	/^#define EN0_TPSR	/;"	d
EN0_TSR	drivers/net/8390.h	/^#define EN0_TSR	/;"	d
EN0_TXCR	drivers/net/8390.h	/^#define EN0_TXCR	/;"	d
EN1_CURPAG	drivers/net/8390.h	/^#define EN1_CURPAG /;"	d
EN1_MULT	drivers/net/8390.h	/^#define EN1_MULT /;"	d
EN1_MULT_SHIFT	drivers/net/8390.h	/^#define EN1_MULT_SHIFT(/;"	d
EN1_PHYS	drivers/net/8390.h	/^#define EN1_PHYS /;"	d
EN1_PHYS_SHIFT	drivers/net/8390.h	/^#define EN1_PHYS_SHIFT(/;"	d
EN29LV040A	drivers/mtd/jedec_flash.c	/^#define EN29LV040A	/;"	d	file:
ENABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define ENABLE	/;"	d
ENABLE	board/samsung/trats/setup.h	/^#define ENABLE	/;"	d
ENABLEFORCE	drivers/usb/musb-new/omap2430.h	/^#	define	ENABLEFORCE	/;"	d
ENABLEWAKEUP	drivers/usb/musb-new/omap2430.h	/^#	define	ENABLEWAKEUP	/;"	d
ENABLE_ACPI_MODE_IN_COREBOOT	arch/x86/cpu/ivybridge/lpc.c	/^#define ENABLE_ACPI_MODE_IN_COREBOOT	/;"	d	file:
ENABLE_ARM_SOC_BOOT0_HOOK	arch/arm/Kconfig	/^config ENABLE_ARM_SOC_BOOT0_HOOK$/;"	c	menu:ARM architecture
ENABLE_AUTO_INFO_FIFO	drivers/crypto/fsl/desc_constr.h	/^#define ENABLE_AUTO_INFO_FIFO /;"	d
ENABLE_BIT	arch/arm/mach-exynos/exynos5_setup.h	/^#define ENABLE_BIT	/;"	d
ENABLE_BURST	drivers/net/ax88180.h	/^#define ENABLE_BURST	/;"	d
ENABLE_DDR_TUNING_ADDR	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define ENABLE_DDR_TUNING_ADDR	/;"	d
ENABLE_DDR_TUNING_DATA	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  ENABLE_DDR_TUNING_DATA	/;"	d
ENABLE_DEV_NOTE	drivers/usb/host/xhci.h	/^#define ENABLE_DEV_NOTE(/;"	d
ENABLE_DRIVER	drivers/power/regulator/rk808.c	/^#define ENABLE_DRIVER$/;"	d	file:
ENABLE_DUMP	arch/blackfin/cpu/traps.c	/^# define ENABLE_DUMP /;"	d	file:
ENABLE_ECC	board/mpl/mip405/mip405.c	/^#define ENABLE_ECC /;"	d	file:
ENABLE_GPIO_OUT	include/configs/motionpro.h	/^#define ENABLE_GPIO_OUT	/;"	d
ENABLE_INDP_AUTOCM_MASK	arch/x86/include/asm/msr-index.h	/^#define ENABLE_INDP_AUTOCM_MASK	/;"	d
ENABLE_INT_ARB	board/mpl/pati/pati.h	/^#define ENABLE_INT_ARB	/;"	d
ENABLE_JFFS	include/configs/astro_mcf5373l.h	/^#define ENABLE_JFFS	/;"	d
ENABLE_JUMBO	drivers/net/ax88180.h	/^#define ENABLE_JUMBO	/;"	d
ENABLE_MASK	drivers/power/regulator/s5m8767.c	/^	ENABLE_MASK	= 3,$/;"	e	enum:__anon2edc22750103	file:
ENABLE_MRC_CACHE	arch/x86/Kconfig	/^config ENABLE_MRC_CACHE$/;"	c	menu:x86 architecture
ENABLE_PREFETCH	drivers/mtd/nand/omap_gpmc.c	/^#define ENABLE_PREFETCH	/;"	d	file:
ENABLE_SHIFT	drivers/power/regulator/s5m8767.c	/^	ENABLE_SHIFT	= 6,$/;"	e	enum:__anon2edc22750103	file:
ENABLE_SUPER_QUICK_CALIBRATION	board/altera/arria5-socdk/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/denx/mcvevk/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/ebv/socrates/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/is1/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/samtec/vining_fpga/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/sr1500/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION /;"	d
ENABLE_SUPER_QUICK_CALIBRATION	board/terasic/sockit/qts/sdram_config.h	/^#define ENABLE_SUPER_QUICK_CALIBRATION	/;"	d
ENABLE_SUSPENDM	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ENABLE_SUSPENDM	/;"	d
ENABLE_ULFM_AUTOCM_MASK	arch/x86/include/asm/msr-index.h	/^#define ENABLE_ULFM_AUTOCM_MASK	/;"	d
ENABLE_VMX	arch/x86/cpu/ivybridge/Kconfig	/^config ENABLE_VMX$/;"	c
ENADLL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ENADLL	/;"	d
ENAMETOOLONG	fs/yaffs2/yportenv.h	/^#define ENAMETOOLONG /;"	d
ENAMETOOLONG	include/linux/errno.h	/^#define	ENAMETOOLONG	/;"	d
ENAVAIL	include/linux/errno.h	/^#define	ENAVAIL	/;"	d
ENA_DCAC	arch/nds32/cpu/n1213/start.S	/^#define ENA_DCAC	/;"	d	file:
ENBGSC_REF	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ENBGSC_REF	/;"	d	file:
ENBUCK	include/power/max8997_pmic.h	/^#define ENBUCK /;"	d
ENCRYPTION_BBRAM	tools/zynqimage.c	/^	ENCRYPTION_BBRAM = 0x3a5c3c5a,$/;"	e	enum:__anon2220b3eb0103	file:
ENCRYPTION_BBRAM	tools/zynqmpimage.c	/^	ENCRYPTION_BBRAM = 0x3a5c3c5a,$/;"	e	enum:__anon397c65880103	file:
ENCRYPTION_EFUSE	tools/zynqimage.c	/^	ENCRYPTION_EFUSE = 0xa5c3c5a3,$/;"	e	enum:__anon2220b3eb0103	file:
ENCRYPTION_EFUSE	tools/zynqmpimage.c	/^	ENCRYPTION_EFUSE = 0xa5c3c5a3,$/;"	e	enum:__anon397c65880103	file:
ENCRYPTION_NONE	tools/zynqimage.c	/^	ENCRYPTION_NONE = 0x0,$/;"	e	enum:__anon2220b3eb0103	file:
ENCRYPTION_NONE	tools/zynqmpimage.c	/^	ENCRYPTION_NONE = 0x0,$/;"	e	enum:__anon397c65880103	file:
ENCRYPTION_OBBRAM	tools/zynqmpimage.c	/^	ENCRYPTION_OBBRAM = 0xa35c7ca5,$/;"	e	enum:__anon397c65880103	file:
ENCRYPTION_OEFUSE	tools/zynqmpimage.c	/^	ENCRYPTION_OEFUSE = 0xa5c3c5a7,$/;"	e	enum:__anon397c65880103	file:
ENC_ECON1_BSEL0	drivers/net/enc28j60.h	/^#define ENC_ECON1_BSEL0	/;"	d
ENC_ECON1_BSEL1	drivers/net/enc28j60.h	/^#define ENC_ECON1_BSEL1	/;"	d
ENC_ECON1_CSUMEN	drivers/net/enc28j60.h	/^#define ENC_ECON1_CSUMEN	/;"	d
ENC_ECON1_DMAST	drivers/net/enc28j60.h	/^#define ENC_ECON1_DMAST	/;"	d
ENC_ECON1_RXEN	drivers/net/enc28j60.h	/^#define ENC_ECON1_RXEN	/;"	d
ENC_ECON1_RXRST	drivers/net/enc28j60.h	/^#define ENC_ECON1_RXRST	/;"	d
ENC_ECON1_TXRST	drivers/net/enc28j60.h	/^#define ENC_ECON1_TXRST	/;"	d
ENC_ECON1_TXRTS	drivers/net/enc28j60.h	/^#define ENC_ECON1_TXRTS	/;"	d
ENC_ECON2_AUTOINC	drivers/net/enc28j60.h	/^#define ENC_ECON2_AUTOINC	/;"	d
ENC_ECON2_PKTDEC	drivers/net/enc28j60.h	/^#define ENC_ECON2_PKTDEC	/;"	d
ENC_ECON2_PWRSV	drivers/net/enc28j60.h	/^#define ENC_ECON2_PWRSV	/;"	d
ENC_ECON2_VRPS	drivers/net/enc28j60.h	/^#define ENC_ECON2_VRPS	/;"	d
ENC_EIE_DMAIE	drivers/net/enc28j60.h	/^#define ENC_EIE_DMAIE	/;"	d
ENC_EIE_INTIE	drivers/net/enc28j60.h	/^#define ENC_EIE_INTIE	/;"	d
ENC_EIE_LINKIE	drivers/net/enc28j60.h	/^#define ENC_EIE_LINKIE	/;"	d
ENC_EIE_PKTIE	drivers/net/enc28j60.h	/^#define ENC_EIE_PKTIE	/;"	d
ENC_EIE_RXERIE	drivers/net/enc28j60.h	/^#define ENC_EIE_RXERIE	/;"	d
ENC_EIE_TXERIE	drivers/net/enc28j60.h	/^#define ENC_EIE_TXERIE	/;"	d
ENC_EIE_TXIE	drivers/net/enc28j60.h	/^#define ENC_EIE_TXIE	/;"	d
ENC_EIE_WOLIE	drivers/net/enc28j60.h	/^#define ENC_EIE_WOLIE	/;"	d
ENC_EIR_DMAIF	drivers/net/enc28j60.h	/^#define ENC_EIR_DMAIF	/;"	d
ENC_EIR_LINKIF	drivers/net/enc28j60.h	/^#define ENC_EIR_LINKIF	/;"	d
ENC_EIR_PKTIF	drivers/net/enc28j60.h	/^#define ENC_EIR_PKTIF	/;"	d
ENC_EIR_RXERIF	drivers/net/enc28j60.h	/^#define ENC_EIR_RXERIF	/;"	d
ENC_EIR_TXERIF	drivers/net/enc28j60.h	/^#define ENC_EIR_TXERIF	/;"	d
ENC_EIR_TXIF	drivers/net/enc28j60.h	/^#define ENC_EIR_TXIF	/;"	d
ENC_EIR_WOLIF	drivers/net/enc28j60.h	/^#define ENC_EIR_WOLIF	/;"	d
ENC_EN_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define ENC_EN_CHG	/;"	d
ENC_ESTAT_CLKRDY	drivers/net/enc28j60.h	/^#define ENC_ESTAT_CLKRDY	/;"	d
ENC_ESTAT_INT	drivers/net/enc28j60.h	/^#define ENC_ESTAT_INT	/;"	d
ENC_ESTAT_LATECOL	drivers/net/enc28j60.h	/^#define ENC_ESTAT_LATECOL	/;"	d
ENC_ESTAT_RXBUSY	drivers/net/enc28j60.h	/^#define ENC_ESTAT_RXBUSY	/;"	d
ENC_ESTAT_TXABRT	drivers/net/enc28j60.h	/^#define ENC_ESTAT_TXABRT	/;"	d
ENC_MACON1_LOOPBK	drivers/net/enc28j60.h	/^#define ENC_MACON1_LOOPBK	/;"	d
ENC_MACON1_MARXEN	drivers/net/enc28j60.h	/^#define ENC_MACON1_MARXEN	/;"	d
ENC_MACON1_PASSALL	drivers/net/enc28j60.h	/^#define ENC_MACON1_PASSALL	/;"	d
ENC_MACON1_RXPAUS	drivers/net/enc28j60.h	/^#define ENC_MACON1_RXPAUS	/;"	d
ENC_MACON1_TXPAUS	drivers/net/enc28j60.h	/^#define ENC_MACON1_TXPAUS	/;"	d
ENC_MACON2_MARST	drivers/net/enc28j60.h	/^#define ENC_MACON2_MARST	/;"	d
ENC_MACON2_MARXRST	drivers/net/enc28j60.h	/^#define ENC_MACON2_MARXRST	/;"	d
ENC_MACON2_MATXRST	drivers/net/enc28j60.h	/^#define ENC_MACON2_MATXRST	/;"	d
ENC_MACON2_RFUNRST	drivers/net/enc28j60.h	/^#define ENC_MACON2_RFUNRST	/;"	d
ENC_MACON2_RNDRST	drivers/net/enc28j60.h	/^#define ENC_MACON2_RNDRST	/;"	d
ENC_MACON2_TFUNRST	drivers/net/enc28j60.h	/^#define ENC_MACON2_TFUNRST	/;"	d
ENC_MACON3_FRMLNEN	drivers/net/enc28j60.h	/^#define ENC_MACON3_FRMLNEN	/;"	d
ENC_MACON3_FULDPX	drivers/net/enc28j60.h	/^#define ENC_MACON3_FULDPX	/;"	d
ENC_MACON3_HFRMEN	drivers/net/enc28j60.h	/^#define ENC_MACON3_HFRMEN	/;"	d
ENC_MACON3_PADCFG0	drivers/net/enc28j60.h	/^#define ENC_MACON3_PADCFG0	/;"	d
ENC_MACON3_PADCFG1	drivers/net/enc28j60.h	/^#define ENC_MACON3_PADCFG1	/;"	d
ENC_MACON3_PADCFG2	drivers/net/enc28j60.h	/^#define ENC_MACON3_PADCFG2	/;"	d
ENC_MACON3_PHDRLEN	drivers/net/enc28j60.h	/^#define ENC_MACON3_PHDRLEN	/;"	d
ENC_MACON3_TXCRCEN	drivers/net/enc28j60.h	/^#define ENC_MACON3_TXCRCEN	/;"	d
ENC_MACON4_DEFER	drivers/net/enc28j60.h	/^#define ENC_MACON4_DEFER	/;"	d
ENC_MAX_FRM_LEN	drivers/net/enc28j60.c	/^#define ENC_MAX_FRM_LEN	/;"	d	file:
ENC_MICMD_MIIRD	drivers/net/enc28j60.h	/^#define ENC_MICMD_MIIRD	/;"	d
ENC_MICMD_MIISCAN	drivers/net/enc28j60.h	/^#define ENC_MICMD_MIISCAN	/;"	d
ENC_MISTAT_BUSY	drivers/net/enc28j60.h	/^#define ENC_MISTAT_BUSY	/;"	d
ENC_MISTAT_NVALID	drivers/net/enc28j60.h	/^#define ENC_MISTAT_NVALID	/;"	d
ENC_MISTAT_SCAN	drivers/net/enc28j60.h	/^#define ENC_MISTAT_SCAN	/;"	d
ENC_PHCON1_PDPXMD	drivers/net/enc28j60.h	/^#define	ENC_PHCON1_PDPXMD	/;"	d
ENC_PHID1_VALUE	drivers/net/enc28j60.h	/^#define ENC_PHID1_VALUE	/;"	d
ENC_PHID2_MASK	drivers/net/enc28j60.h	/^#define ENC_PHID2_MASK	/;"	d
ENC_PHID2_VALUE	drivers/net/enc28j60.h	/^#define ENC_PHID2_VALUE	/;"	d
ENC_PHSTAT1_LLSTAT	drivers/net/enc28j60.h	/^#define	ENC_PHSTAT1_LLSTAT	/;"	d
ENC_PHSTAT2_DPXSTAT	drivers/net/enc28j60.h	/^#define	ENC_PHSTAT2_DPXSTAT	/;"	d
ENC_PHSTAT2_LSTAT	drivers/net/enc28j60.h	/^#define	ENC_PHSTAT2_LSTAT	/;"	d
ENC_RFR_ANDOR	drivers/net/enc28j60.h	/^#define ENC_RFR_ANDOR	/;"	d
ENC_RFR_BCEN	drivers/net/enc28j60.h	/^#define ENC_RFR_BCEN	/;"	d
ENC_RFR_CRCEN	drivers/net/enc28j60.h	/^#define ENC_RFR_CRCEN	/;"	d
ENC_RFR_HTEN	drivers/net/enc28j60.h	/^#define ENC_RFR_HTEN	/;"	d
ENC_RFR_MCEN	drivers/net/enc28j60.h	/^#define ENC_RFR_MCEN	/;"	d
ENC_RFR_MPEN	drivers/net/enc28j60.h	/^#define ENC_RFR_MPEN	/;"	d
ENC_RFR_PMEN	drivers/net/enc28j60.h	/^#define ENC_RFR_PMEN	/;"	d
ENC_RFR_UCEN	drivers/net/enc28j60.h	/^#define ENC_RFR_UCEN	/;"	d
ENC_RX_BUF_END	drivers/net/enc28j60.c	/^#define ENC_RX_BUF_END	/;"	d	file:
ENC_RX_BUF_START	drivers/net/enc28j60.c	/^#define ENC_RX_BUF_START	/;"	d	file:
ENC_TX_BUF_END	drivers/net/enc28j60.c	/^#define ENC_TX_BUF_END	/;"	d	file:
ENC_TX_BUF_START	drivers/net/enc28j60.c	/^#define ENC_TX_BUF_START	/;"	d	file:
END	arch/mips/include/asm/asm.h	/^#define END(/;"	d
END	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
END	scripts/gcc-stack-usage.sh	/^cat <<END | $@ -Werror -fstack-usage -x c - -c -o $TMP >\/dev\/null 2>&1 \\$/;"	h
END	test/trace/test-trace.sh	/^	.\/${OUTPUT_DIR}\/u-boot <<END$/;"	h
ENDCFG_AUTO_INIT	drivers/net/8390.h	/^#define ENDCFG_AUTO_INIT /;"	d
ENDCFG_BOS	drivers/net/8390.h	/^#define ENDCFG_BOS	/;"	d
ENDCFG_FIFO	drivers/net/8390.h	/^#define ENDCFG_FIFO	/;"	d
ENDCFG_WTS	drivers/net/8390.h	/^#define ENDCFG_WTS	/;"	d
ENDCPLB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENDCPLB	/;"	d
ENDCPLB_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENDCPLB_P	/;"	d
ENDDATA	include/lattice.h	/^#define ENDDATA	/;"	d
ENDDR	include/lattice.h	/^#define ENDDR	/;"	d
ENDED_OK	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define ENDED_OK	/;"	d	file:
ENDED_OK	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define ENDED_OK	/;"	d	file:
ENDFILE	include/lattice.h	/^#define ENDFILE	/;"	d
ENDFUNC	arch/arc/lib/_millicodethunk.S	/^#define ENDFUNC(/;"	d	file:
ENDFUNC0	arch/arc/lib/_millicodethunk.S	/^#define ENDFUNC0(/;"	d	file:
ENDIAN	drivers/net/smc911x.h	/^#define ENDIAN	/;"	d
ENDIANNESS	tools/pblimage.c	/^#define ENDIANNESS /;"	d	file:
ENDIGLDO	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ENDIGLDO	/;"	d	file:
ENDIR	include/lattice.h	/^#define ENDIR	/;"	d
ENDLOOP	include/lattice.h	/^#define ENDLOOP	/;"	d
ENDM	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENDM	/;"	d
ENDM_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENDM_P	/;"	d
ENDP0_INT_CTRLIN	include/usb/designware_udc.h	/^#define  ENDP0_INT_CTRLIN	/;"	d
ENDP0_INT_CTRLOUT	include/usb/designware_udc.h	/^#define  ENDP0_INT_CTRLOUT	/;"	d
ENDP1_INT_BULKIN	include/usb/designware_udc.h	/^#define  ENDP1_INT_BULKIN	/;"	d
ENDP1_INT_BULKOUT	include/usb/designware_udc.h	/^#define  ENDP1_INT_BULKOUT	/;"	d
ENDP2_INT_BULKIN	include/usb/designware_udc.h	/^#define  ENDP2_INT_BULKIN	/;"	d
ENDP2_INT_BULKOUT	include/usb/designware_udc.h	/^#define  ENDP2_INT_BULKOUT	/;"	d
ENDPOINT	arch/arm/mach-keystone/init.c	/^	ENDPOINT,$/;"	e	enum:pci_mode	file:
ENDP_CNTL_BULK	include/usb/designware_udc.h	/^#define  ENDP_CNTL_BULK	/;"	d
ENDP_CNTL_CNAK	include/usb/designware_udc.h	/^#define  ENDP_CNTL_CNAK	/;"	d
ENDP_CNTL_CONTROL	include/usb/designware_udc.h	/^#define  ENDP_CNTL_CONTROL	/;"	d
ENDP_CNTL_FLUSH	include/usb/designware_udc.h	/^#define  ENDP_CNTL_FLUSH	/;"	d
ENDP_CNTL_INT	include/usb/designware_udc.h	/^#define  ENDP_CNTL_INT	/;"	d
ENDP_CNTL_ISO	include/usb/designware_udc.h	/^#define  ENDP_CNTL_ISO	/;"	d
ENDP_CNTL_NAK	include/usb/designware_udc.h	/^#define  ENDP_CNTL_NAK	/;"	d
ENDP_CNTL_POLL	include/usb/designware_udc.h	/^#define  ENDP_CNTL_POLL	/;"	d
ENDP_CNTL_RRDY	include/usb/designware_udc.h	/^#define  ENDP_CNTL_RRDY	/;"	d
ENDP_CNTL_SNAK	include/usb/designware_udc.h	/^#define  ENDP_CNTL_SNAK	/;"	d
ENDP_CNTL_SNOOP	include/usb/designware_udc.h	/^#define  ENDP_CNTL_SNOOP	/;"	d
ENDP_CNTL_STALL	include/usb/designware_udc.h	/^#define  ENDP_CNTL_STALL	/;"	d
ENDP_EPDIR_IN	include/usb/designware_udc.h	/^#define  ENDP_EPDIR_IN	/;"	d
ENDP_EPDIR_OUT	include/usb/designware_udc.h	/^#define  ENDP_EPDIR_OUT	/;"	d
ENDP_EPTYPE_BULK	include/usb/designware_udc.h	/^#define  ENDP_EPTYPE_BULK	/;"	d
ENDP_EPTYPE_CNTL	include/usb/designware_udc.h	/^#define  ENDP_EPTYPE_CNTL	/;"	d
ENDP_EPTYPE_INT	include/usb/designware_udc.h	/^#define  ENDP_EPTYPE_INT	/;"	d
ENDP_EPTYPE_ISO	include/usb/designware_udc.h	/^#define  ENDP_EPTYPE_ISO	/;"	d
ENDP_INT_NONISOIN_MSK	include/usb/designware_udc.h	/^#define  ENDP_INT_NONISOIN_MSK	/;"	d
ENDP_INT_NONISOOUT_MSK	include/usb/designware_udc.h	/^#define  ENDP_INT_NONISOOUT_MSK	/;"	d
ENDP_STATUS_BUFFNAV	include/usb/designware_udc.h	/^#define  ENDP_STATUS_BUFFNAV	/;"	d
ENDP_STATUS_FATERR	include/usb/designware_udc.h	/^#define  ENDP_STATUS_FATERR	/;"	d
ENDP_STATUS_HOSTBUSERR	include/usb/designware_udc.h	/^#define  ENDP_STATUS_HOSTBUSERR	/;"	d
ENDP_STATUS_IN	include/usb/designware_udc.h	/^#define  ENDP_STATUS_IN	/;"	d
ENDP_STATUS_OUTMSK	include/usb/designware_udc.h	/^#define  ENDP_STATUS_OUTMSK	/;"	d
ENDP_STATUS_OUT_DATA	include/usb/designware_udc.h	/^#define  ENDP_STATUS_OUT_DATA	/;"	d
ENDP_STATUS_OUT_NONE	include/usb/designware_udc.h	/^#define  ENDP_STATUS_OUT_NONE	/;"	d
ENDP_STATUS_OUT_SETUP	include/usb/designware_udc.h	/^#define  ENDP_STATUS_OUT_SETUP	/;"	d
ENDP_STATUS_PIDMSK	include/usb/designware_udc.h	/^#define  ENDP_STATUS_PIDMSK	/;"	d
ENDP_STATUS_RXPKTMSK	include/usb/designware_udc.h	/^#define  ENDP_STATUS_RXPKTMSK	/;"	d
ENDP_STATUS_TDC	include/usb/designware_udc.h	/^#define  ENDP_STATUS_TDC	/;"	d
ENDSTATE	include/lattice.h	/^#define ENDSTATE	/;"	d
ENDVME	include/lattice.h	/^#define ENDVME	/;"	d
END_BLOCK	lib/zlib/trees.c	/^#define END_BLOCK /;"	d	file:
END_CHAR	cmd/load.c	/^#define END_CHAR /;"	d	file:
END_OF_INSTR	drivers/bios_emulator/include/x86emu/debug.h	/^# define END_OF_INSTR(/;"	d
END_OF_INSTR_NO_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define END_OF_INSTR_NO_TRACE(/;"	d
END_OF_MEM	arch/powerpc/cpu/mpc512x/traps.c	/^#define END_OF_MEM /;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc5xx/traps.c	/^#define END_OF_MEM	/;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc5xxx/traps.c	/^#define END_OF_MEM	/;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc8260/traps.c	/^#define END_OF_MEM	/;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc83xx/traps.c	/^#define END_OF_MEM	/;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc85xx/traps.c	/^#define END_OF_MEM /;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc86xx/traps.c	/^#define END_OF_MEM /;"	d	file:
END_OF_MEM	arch/powerpc/cpu/mpc8xx/traps.c	/^#define END_OF_MEM	/;"	d	file:
END_OF_MEM	arch/powerpc/cpu/ppc4xx/traps.c	/^#define END_OF_MEM	/;"	d	file:
END_ON_TERM	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               END_ON_TERM /;"	d
ENERGY_PERF_BIAS_NORMAL	arch/x86/include/asm/msr-index.h	/^#define ENERGY_PERF_BIAS_NORMAL	/;"	d
ENERGY_PERF_BIAS_PERFORMANCE	arch/x86/include/asm/msr-index.h	/^#define ENERGY_PERF_BIAS_PERFORMANCE	/;"	d
ENERGY_PERF_BIAS_POWERSAVE	arch/x86/include/asm/msr-index.h	/^#define ENERGY_PERF_BIAS_POWERSAVE	/;"	d
ENERGY_POLICY_NORMAL	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  ENERGY_POLICY_NORMAL	/;"	d
ENERGY_POLICY_NORMAL	arch/x86/include/asm/msr-index.h	/^#define  ENERGY_POLICY_NORMAL	/;"	d
ENERGY_POLICY_PERFORMANCE	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  ENERGY_POLICY_PERFORMANCE	/;"	d
ENERGY_POLICY_PERFORMANCE	arch/x86/include/asm/msr-index.h	/^#define  ENERGY_POLICY_PERFORMANCE	/;"	d
ENERGY_POLICY_POWERSAVE	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  ENERGY_POLICY_POWERSAVE	/;"	d
ENERGY_POLICY_POWERSAVE	arch/x86/include/asm/msr-index.h	/^#define  ENERGY_POLICY_POWERSAVE	/;"	d
ENET0_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define ENET0_FREQ /;"	d
ENET0_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define ENET0_FREQ /;"	d
ENET0_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define ENET0_FREQ /;"	d
ENET0_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define ENET0_FREQ /;"	d
ENET0_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define ENET0_FREQ /;"	d
ENET1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ENET1_BASE_ADDR	/;"	d
ENET1_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define ENET1_FREQ /;"	d
ENET1_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define ENET1_FREQ /;"	d
ENET1_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define ENET1_FREQ /;"	d
ENET1_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define ENET1_FREQ /;"	d
ENET1_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define ENET1_FREQ /;"	d
ENET1_NRST	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	ENET1_NRST,$/;"	e	enum:qn	file:
ENET1_REF_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET1_REF_CLK_ROOT = 78,$/;"	e	enum:clk_root_index
ENET1_REF_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
ENET1_REF_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ENET1_REF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK	/;"	d
ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
ENET1_REF_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ENET1_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ENET1_TIME_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET1_TIME_CLK_ROOT = 79,$/;"	e	enum:clk_root_index
ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
ENET1_TIME_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ENET1_TIME_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ENET1_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
ENET1_TIME_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET1_TIME_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ENET2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ENET2_BASE_ADDR /;"	d
ENET2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ENET2_IPS_BASE_ADDR /;"	d
ENET2_NRST	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	ENET2_NRST,$/;"	e	enum:qn	file:
ENET2_REF_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET2_REF_CLK_ROOT = 80,$/;"	e	enum:clk_root_index
ENET2_REF_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
ENET2_REF_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ENET2_REF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK	/;"	d
ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
ENET2_REF_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
ENET2_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ENET2_TIME_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET2_TIME_CLK_ROOT = 81,$/;"	e	enum:clk_root_index
ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
ENET2_TIME_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ENET2_TIME_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ENET2_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
ENET2_TIME_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET2_TIME_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ENETDOWN	include/linux/errno.h	/^#define	ENETDOWN	/;"	d
ENETMODE_10	board/amcc/yucca/yucca.h	/^#define ENETMODE_10	/;"	d
ENETMODE_100	board/amcc/yucca/yucca.h	/^#define ENETMODE_100	/;"	d
ENETMODE_1000	board/amcc/yucca/yucca.h	/^#define ENETMODE_1000	/;"	d
ENETMODE_AUTONEG	board/amcc/yucca/yucca.h	/^#define ENETMODE_AUTONEG	/;"	d
ENETMODE_DUPLEX	board/amcc/yucca/yucca.h	/^#define ENETMODE_DUPLEX	/;"	d
ENETMODE_FULL	board/amcc/yucca/yucca.h	/^#define ENETMODE_FULL	/;"	d
ENETMODE_HALF	board/amcc/yucca/yucca.h	/^#define ENETMODE_HALF	/;"	d
ENETMODE_NEG	board/amcc/yucca/yucca.h	/^#define ENETMODE_NEG	/;"	d
ENETMODE_NO_AUTONEG	board/amcc/yucca/yucca.h	/^#define ENETMODE_NO_AUTONEG	/;"	d
ENETMODE_SPEED	board/amcc/yucca/yucca.h	/^#define ENETMODE_SPEED	/;"	d
ENETRESET	include/linux/errno.h	/^#define	ENETRESET	/;"	d
ENETUNREACH	include/linux/errno.h	/^#define	ENETUNREACH	/;"	d
ENET_100MHZ	arch/arm/include/asm/arch-mx6/clock.h	/^	ENET_100MHZ,$/;"	e	enum:enet_freq
ENET_125MHZ	arch/arm/include/asm/arch-mx6/clock.h	/^	ENET_125MHZ,$/;"	e	enum:enet_freq
ENET_125MHz	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET_125MHz,$/;"	e	enum:enet_freq
ENET_25MHZ	arch/arm/include/asm/arch-mx6/clock.h	/^	ENET_25MHZ,$/;"	e	enum:enet_freq
ENET_25MHz	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET_25MHz,$/;"	e	enum:enet_freq
ENET_50MHZ	arch/arm/include/asm/arch-mx6/clock.h	/^	ENET_50MHZ,$/;"	e	enum:enet_freq
ENET_50MHz	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET_50MHz,$/;"	e	enum:enet_freq
ENET_ADDR_LENGTH	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ENET_ADDR_LENGTH	/;"	d
ENET_ADDR_LENGTH	drivers/net/xilinx_emaclite.c	/^#define ENET_ADDR_LENGTH	/;"	d	file:
ENET_ADDR_TYPE_BROADCAST	drivers/qe/uec.h	/^	ENET_ADDR_TYPE_BROADCAST$/;"	e	enum:enet_addr_type
ENET_ADDR_TYPE_GROUP	drivers/qe/uec.h	/^	ENET_ADDR_TYPE_GROUP,$/;"	e	enum:enet_addr_type
ENET_ADDR_TYPE_INDIVIDUAL	drivers/qe/uec.h	/^	ENET_ADDR_TYPE_INDIVIDUAL,$/;"	e	enum:enet_addr_type
ENET_ARPTYPE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ENET_ARPTYPE	/;"	d
ENET_AXI_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET_AXI_CLK_ROOT = 18,$/;"	e	enum:clk_root_index
ENET_AXI_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
ENET_AXI_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_AXI_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ENET_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ENET_BASE_ADDR /;"	d
ENET_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define ENET_BASE_ADDR	/;"	d
ENET_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ENET_BASE_ADDR	/;"	d
ENET_CLKCTRL_CMPL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ENET_CLKCTRL_CMPL	/;"	d	file:
ENET_CLK_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define ENET_CLK_PAD_CTRL /;"	d	file:
ENET_CLK_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define ENET_CLK_PAD_CTRL	/;"	d	file:
ENET_EXTERNAL_CLK	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define ENET_EXTERNAL_CLK	/;"	d
ENET_HEADER_SIZE	drivers/net/e1000.h	/^#define ENET_HEADER_SIZE	/;"	d
ENET_INIT_PARAM_MAGIC_RES_INIT0	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_MAGIC_RES_INIT0	/;"	d
ENET_INIT_PARAM_MAGIC_RES_INIT1	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_MAGIC_RES_INIT1	/;"	d
ENET_INIT_PARAM_MAGIC_RES_INIT2	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_MAGIC_RES_INIT2	/;"	d
ENET_INIT_PARAM_MAGIC_RES_INIT3	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_MAGIC_RES_INIT3	/;"	d
ENET_INIT_PARAM_MAGIC_RES_INIT4	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_MAGIC_RES_INIT4	/;"	d
ENET_INIT_PARAM_PTR_MASK	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_PTR_MASK	/;"	d
ENET_INIT_PARAM_RGF_SHIFT	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_RGF_SHIFT	/;"	d
ENET_INIT_PARAM_RISC_MASK	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_RISC_MASK	/;"	d
ENET_INIT_PARAM_SNUM_MASK	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_SNUM_MASK	/;"	d
ENET_INIT_PARAM_SNUM_SHIFT	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_SNUM_SHIFT	/;"	d
ENET_INIT_PARAM_TGF_SHIFT	drivers/qe/uec.h	/^#define ENET_INIT_PARAM_TGF_SHIFT	/;"	d
ENET_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ENET_IPS_BASE_ADDR /;"	d
ENET_IPTYPE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ENET_IPTYPE	/;"	d
ENET_MAX_MTU	drivers/net/4xx_enet.c	/^#define ENET_MAX_MTU	/;"	d	file:
ENET_MAX_MTU_ALIGNED	drivers/net/4xx_enet.c	/^#define ENET_MAX_MTU_ALIGNED /;"	d	file:
ENET_MDIO_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define ENET_MDIO_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/aristainetos/aristainetos.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/bachmann/ot1200/ot1200.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/barco/platinum/platinum.h	/^#define ENET_PAD_CTRL	/;"	d
ENET_PAD_CTRL	board/barco/titanium/titanium.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/boundary/nitrogen6x/nitrogen6x.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/compulab/cm_fx6/cm_fx6.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/el/el6x/el6x.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/embest/mx6boards/mx6boards.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/engicam/icorem6/icorem6.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6qarm2/mx6qarm2.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6sabresd/mx6sabresd.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6slevk/mx6slevk.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/freescale/vf610twr/vf610twr.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/gateworks/gw_ventana/common.h	/^#define ENET_PAD_CTRL /;"	d
ENET_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/phytec/pcm052/pcm052.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/seco/common/mx6.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/tbs/tbs2910/tbs2910.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/toradex/colibri_vf/colibri_vf.c	/^#define ENET_PAD_CTRL	/;"	d	file:
ENET_PAD_CTRL	board/tqc/tqma6/tqma6_wru4.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/udoo/udoo.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL	board/wandboard/wandboard.c	/^#define ENET_PAD_CTRL /;"	d	file:
ENET_PAD_CTRL_CLK	board/el/el6x/el6x.c	/^#define ENET_PAD_CTRL_CLK /;"	d	file:
ENET_PAD_CTRL_CLK	board/embest/mx6boards/mx6boards.c	/^#define ENET_PAD_CTRL_CLK /;"	d	file:
ENET_PAD_CTRL_CLK	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define ENET_PAD_CTRL_CLK /;"	d	file:
ENET_PAD_CTRL_MII	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define ENET_PAD_CTRL_MII /;"	d	file:
ENET_PAD_CTRL_MII	board/toradex/colibri_imx7/colibri_imx7.c	/^#define ENET_PAD_CTRL_MII /;"	d	file:
ENET_PAD_CTRL_PD	board/el/el6x/el6x.c	/^#define ENET_PAD_CTRL_PD /;"	d	file:
ENET_PAD_CTRL_PD	board/embest/mx6boards/mx6boards.c	/^#define ENET_PAD_CTRL_PD /;"	d	file:
ENET_PAD_CTRL_PD	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define ENET_PAD_CTRL_PD /;"	d	file:
ENET_PHY_CFG_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define ENET_PHY_CFG_PAD_CTRL	/;"	d	file:
ENET_PHY_REF_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	ENET_PHY_REF_CLK_ROOT = 82,$/;"	e	enum:clk_root_index
ENET_PHY_REF_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
ENET_PHY_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define ENET_PHY_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
ENET_PHY_RESET_GPIO	board/ccv/xpress/xpress.c	/^#define ENET_PHY_RESET_GPIO /;"	d	file:
ENET_PHY_RESET_GPIO	board/phytec/pcm058/pcm058.c	/^#define ENET_PHY_RESET_GPIO /;"	d	file:
ENET_PHY_RESET_GPIO	board/tqc/tqma6/tqma6_mba6.c	/^#define ENET_PHY_RESET_GPIO /;"	d	file:
ENET_PHY_RESET_GPIO	board/tqc/tqma6/tqma6_wru4.c	/^#define ENET_PHY_RESET_GPIO /;"	d	file:
ENET_PHY_RST	board/engicam/icorem6/icorem6.c	/^#define ENET_PHY_RST	/;"	d	file:
ENET_PLL	arch/arm/include/asm/arch-s32v234/clock.h	/^	ENET_PLL,$/;"	e	enum:pll_type
ENET_PLL_PHI0_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI0_FREQ	/;"	d
ENET_PLL_PHI1_DFS1_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS1_EN	/;"	d
ENET_PLL_PHI1_DFS1_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS1_MFI	/;"	d
ENET_PLL_PHI1_DFS1_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS1_MFN	/;"	d
ENET_PLL_PHI1_DFS2_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS2_EN	/;"	d
ENET_PLL_PHI1_DFS2_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS2_MFI	/;"	d
ENET_PLL_PHI1_DFS2_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS2_MFN	/;"	d
ENET_PLL_PHI1_DFS3_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS3_EN	/;"	d
ENET_PLL_PHI1_DFS3_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS3_MFI	/;"	d
ENET_PLL_PHI1_DFS3_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS3_MFN	/;"	d
ENET_PLL_PHI1_DFS4_EN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS4_EN	/;"	d
ENET_PLL_PHI1_DFS4_MFI	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS4_MFI	/;"	d
ENET_PLL_PHI1_DFS4_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS4_MFN	/;"	d
ENET_PLL_PHI1_DFS_Nr	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_DFS_Nr	/;"	d
ENET_PLL_PHI1_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PHI1_FREQ	/;"	d
ENET_PLL_PLLDV_MFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PLLDV_MFD	/;"	d
ENET_PLL_PLLDV_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PLLDV_MFN	/;"	d
ENET_PLL_PLLDV_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define ENET_PLL_PLLDV_PREDIV	/;"	d
ENET_RST_B	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	ENET_RST_B,$/;"	e	enum:qn	file:
ENET_RX_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define ENET_RX_PAD_CTRL /;"	d	file:
ENET_RX_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define ENET_RX_PAD_CTRL	/;"	d	file:
ENET_SPEED_1000BT	drivers/qe/uec.h	/^	ENET_SPEED_1000BT  \/* 1000 Base T *\/$/;"	e	enum:enet_speed
ENET_SPEED_100BT	drivers/qe/uec.h	/^	ENET_SPEED_100BT,  \/* 100 Base T *\/$/;"	e	enum:enet_speed
ENET_SPEED_10BT	drivers/qe/uec.h	/^	ENET_SPEED_10BT,   \/* 10 Base T *\/$/;"	e	enum:enet_speed
ENET_TBI_MII_ANA	drivers/qe/uec.h	/^	ENET_TBI_MII_ANA       = 0x04,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_ANEX	drivers/qe/uec.h	/^	ENET_TBI_MII_ANEX      = 0x06,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_ANLPANP	drivers/qe/uec.h	/^	ENET_TBI_MII_ANLPANP   = 0x08,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_ANLPBPA	drivers/qe/uec.h	/^	ENET_TBI_MII_ANLPBPA   = 0x05,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_ANNPT	drivers/qe/uec.h	/^	ENET_TBI_MII_ANNPT     = 0x07,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_CR	drivers/qe/uec.h	/^	ENET_TBI_MII_CR        = 0x00,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_EXST	drivers/qe/uec.h	/^	ENET_TBI_MII_EXST      = 0x0F,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_JD	drivers/qe/uec.h	/^	ENET_TBI_MII_JD        = 0x10,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_SR	drivers/qe/uec.h	/^	ENET_TBI_MII_SR        = 0x01,$/;"	e	enum:enet_tbi_mii_reg
ENET_TBI_MII_TBICON	drivers/qe/uec.h	/^	ENET_TBI_MII_TBICON    = 0x11$/;"	e	enum:enet_tbi_mii_reg
ENET_TX_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define ENET_TX_PAD_CTRL	/;"	d	file:
ENFILE	fs/yaffs2/yportenv.h	/^#define ENFILE	/;"	d
ENFILE	include/linux/errno.h	/^#define	ENFILE	/;"	d
ENGINEERING_CLOCK_CHECKING	board/amcc/yucca/yucca.h	/^#define ENGINEERING_CLOCK_CHECKING /;"	d
ENGINEERING_CLOCK_CHECKING_DATA	board/amcc/yucca/yucca.h	/^#define ENGINEERING_CLOCK_CHECKING_DATA	/;"	d
ENGINEERING_EXTERNAL_CLOCK	board/amcc/yucca/yucca.h	/^#define ENGINEERING_EXTERNAL_CLOCK /;"	d
ENGINEERING_EXTERNAL_CLOCK_DATA	board/amcc/yucca/yucca.h	/^#define ENGINEERING_EXTERNAL_CLOCK_DATA	/;"	d
ENHANCED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define ENHANCED	/;"	d
ENHANCED	arch/arm/mach-exynos/include/mach/dp.h	/^#define ENHANCED	/;"	d
ENHNCD_SUPPORT	include/mmc.h	/^#define ENHNCD_SUPPORT	/;"	d
ENH_HIST_ENABLE	drivers/video/i915_reg.h	/^#define  ENH_HIST_ENABLE	/;"	d
ENH_MODE_ADDITIVE	drivers/video/i915_reg.h	/^#define  ENH_MODE_ADDITIVE	/;"	d
ENH_MODE_DIRECT	drivers/video/i915_reg.h	/^#define  ENH_MODE_DIRECT	/;"	d
ENH_MODE_MULTIPLICATIVE	drivers/video/i915_reg.h	/^#define  ENH_MODE_MULTIPLICATIVE	/;"	d
ENH_MODIF_TBL_ENABLE	drivers/video/i915_reg.h	/^#define  ENH_MODIF_TBL_ENABLE	/;"	d
ENH_NUM_BINS	drivers/video/i915_reg.h	/^#define  ENH_NUM_BINS	/;"	d
ENH_PIPE	drivers/video/i915_reg.h	/^#define  ENH_PIPE(/;"	d
ENH_PIPE_A_SELECT	drivers/video/i915_reg.h	/^#define  ENH_PIPE_A_SELECT	/;"	d
ENH_PIPE_B_SELECT	drivers/video/i915_reg.h	/^#define  ENH_PIPE_B_SELECT	/;"	d
ENICPLB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENICPLB	/;"	d
ENICPLB_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENICPLB_P	/;"	d
ENIM	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENIM	/;"	d
ENIM_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ENIM_P	/;"	d
ENISR_ALL	drivers/net/8390.h	/^#define ENISR_ALL	/;"	d
ENISR_COUNTERS	drivers/net/8390.h	/^#define ENISR_COUNTERS	/;"	d
ENISR_OVER	drivers/net/8390.h	/^#define ENISR_OVER	/;"	d
ENISR_RDC	drivers/net/8390.h	/^#define ENISR_RDC	/;"	d
ENISR_RESET	drivers/net/8390.h	/^#define ENISR_RESET	/;"	d
ENISR_RX	drivers/net/8390.h	/^#define ENISR_RX	/;"	d
ENISR_RX_ERR	drivers/net/8390.h	/^#define ENISR_RX_ERR	/;"	d
ENISR_TX	drivers/net/8390.h	/^#define ENISR_TX	/;"	d
ENISR_TX_ERR	drivers/net/8390.h	/^#define ENISR_TX_ERR	/;"	d
ENOANO	include/linux/errno.h	/^#define	ENOANO	/;"	d
ENOBUFS	include/linux/errno.h	/^#define	ENOBUFS	/;"	d
ENOCSI	include/linux/errno.h	/^#define	ENOCSI	/;"	d
ENOC_RST_GPIO	board/bosch/shc/board.h	/^# define ENOC_RST_GPIO /;"	d
ENODATA	fs/yaffs2/yportenv.h	/^#define ENODATA /;"	d
ENODATA	include/linux/errno.h	/^#define	ENODATA	/;"	d
ENODEV	fs/yaffs2/yportenv.h	/^#define ENODEV	/;"	d
ENODEV	include/linux/errno.h	/^#define	ENODEV	/;"	d
ENOENT	fs/yaffs2/yportenv.h	/^#define ENOENT	/;"	d
ENOENT	include/linux/errno.h	/^#define	ENOENT	/;"	d
ENOEXEC	include/linux/errno.h	/^#define	ENOEXEC	/;"	d
ENOIOCTLCMD	include/linux/errno.h	/^#define ENOIOCTLCMD	/;"	d
ENOKEY	include/linux/errno.h	/^#define	ENOKEY	/;"	d
ENOLCK	include/linux/errno.h	/^#define	ENOLCK	/;"	d
ENOLINK	include/linux/errno.h	/^#define	ENOLINK	/;"	d
ENOMEDIUM	include/linux/errno.h	/^#define	ENOMEDIUM	/;"	d
ENOMEM	fs/yaffs2/yportenv.h	/^#define ENOMEM /;"	d
ENOMEM	include/linux/errno.h	/^#define	ENOMEM	/;"	d
ENOMSG	include/linux/errno.h	/^#define	ENOMSG	/;"	d
ENONET	include/linux/errno.h	/^#define	ENONET	/;"	d
ENOPKG	include/linux/errno.h	/^#define	ENOPKG	/;"	d
ENOPROTOOPT	include/linux/errno.h	/^#define	ENOPROTOOPT	/;"	d
ENOSPC	fs/yaffs2/yportenv.h	/^#define ENOSPC	/;"	d
ENOSPC	include/linux/errno.h	/^#define	ENOSPC	/;"	d
ENOSR	include/linux/errno.h	/^#define	ENOSR	/;"	d
ENOSTR	include/linux/errno.h	/^#define	ENOSTR	/;"	d
ENOSYS	include/linux/errno.h	/^#define	ENOSYS	/;"	d
ENOTBLK	include/linux/errno.h	/^#define	ENOTBLK	/;"	d
ENOTCONN	include/linux/errno.h	/^#define	ENOTCONN	/;"	d
ENOTDIR	fs/yaffs2/yportenv.h	/^#define ENOTDIR /;"	d
ENOTDIR	include/linux/errno.h	/^#define	ENOTDIR	/;"	d
ENOTEMPTY	fs/yaffs2/yportenv.h	/^#define ENOTEMPTY /;"	d
ENOTEMPTY	include/linux/errno.h	/^#define	ENOTEMPTY	/;"	d
ENOTNAM	include/linux/errno.h	/^#define	ENOTNAM	/;"	d
ENOTRECOVERABLE	include/linux/errno.h	/^#define	ENOTRECOVERABLE	/;"	d
ENOTSOCK	include/linux/errno.h	/^#define	ENOTSOCK	/;"	d
ENOTSUPP	include/linux/errno.h	/^#define ENOTSUPP	/;"	d
ENOTSYNC	include/linux/errno.h	/^#define ENOTSYNC	/;"	d
ENOTTY	include/linux/errno.h	/^#define	ENOTTY	/;"	d
ENOTUNIQ	include/linux/errno.h	/^#define	ENOTUNIQ	/;"	d
ENOUGH	lib/zlib/inftrees.h	/^#define ENOUGH /;"	d
ENPDNPS	drivers/usb/eth/r8152.h	/^#define ENPDNPS	/;"	d
ENPLL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ENPLL	/;"	d	file:
ENPLLLDO	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ENPLLLDO	/;"	d	file:
ENPWRSAVE	drivers/usb/eth/r8152.h	/^#define ENPWRSAVE	/;"	d
ENRSR_CRC	drivers/net/8390.h	/^#define ENRSR_CRC	/;"	d
ENRSR_DEF	drivers/net/8390.h	/^#define ENRSR_DEF	/;"	d
ENRSR_DIS	drivers/net/8390.h	/^#define ENRSR_DIS	/;"	d
ENRSR_FAE	drivers/net/8390.h	/^#define ENRSR_FAE	/;"	d
ENRSR_FO	drivers/net/8390.h	/^#define ENRSR_FO	/;"	d
ENRSR_MPA	drivers/net/8390.h	/^#define ENRSR_MPA	/;"	d
ENRSR_PHY	drivers/net/8390.h	/^#define ENRSR_PHY	/;"	d
ENRSR_RXOK	drivers/net/8390.h	/^#define ENRSR_RXOK	/;"	d
ENSAFEOUT1	include/power/max8997_pmic.h	/^#define ENSAFEOUT1 /;"	d
ENSAFEOUT2	include/power/max8997_pmic.h	/^#define ENSAFEOUT2 /;"	d
ENSATAMODE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define ENSATAMODE	/;"	d	file:
ENTER	include/search.h	/^	ENTER$/;"	e	enum:__anon2b83eac40103
ENTERFN	arch/x86/cpu/quark/mrc_util.h	/^#define ENTERFN(/;"	d
ENTRY	arch/mips/include/asm/asm.h	/^#define ENTRY(/;"	d
ENTRY	include/search.h	/^} ENTRY;$/;"	t	typeref:struct:entry
ENTRYLO_C	arch/mips/include/asm/mipsregs.h	/^#define ENTRYLO_C	/;"	d
ENTRYLO_C_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define ENTRYLO_C_SHIFT	/;"	d
ENTRYLO_D	arch/mips/include/asm/mipsregs.h	/^#define ENTRYLO_D	/;"	d
ENTRYLO_G	arch/mips/include/asm/mipsregs.h	/^#define ENTRYLO_G	/;"	d
ENTRYLO_V	arch/mips/include/asm/mipsregs.h	/^#define ENTRYLO_V	/;"	d
ENTRY_ADDR_LOWER	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_ADDR_LOWER	/;"	d	file:
ENTRY_ADDR_UPPER	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_ADDR_UPPER	/;"	d	file:
ENTRY_PIR	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_PIR	/;"	d	file:
ENTRY_R3_LOWER	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_R3_LOWER	/;"	d	file:
ENTRY_R3_UPPER	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_R3_UPPER	/;"	d	file:
ENTRY_RESV	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_RESV	/;"	d	file:
ENTRY_SIZE	arch/powerpc/cpu/mpc85xx/release.S	/^#define ENTRY_SIZE	/;"	d	file:
ENTSR_ABT	drivers/net/8390.h	/^#define ENTSR_ABT /;"	d
ENTSR_CDH	drivers/net/8390.h	/^#define ENTSR_CDH /;"	d
ENTSR_COL	drivers/net/8390.h	/^#define ENTSR_COL /;"	d
ENTSR_CRS	drivers/net/8390.h	/^#define ENTSR_CRS /;"	d
ENTSR_FU	drivers/net/8390.h	/^#define ENTSR_FU /;"	d
ENTSR_ND	drivers/net/8390.h	/^#define ENTSR_ND /;"	d
ENTSR_OWC	drivers/net/8390.h	/^#define ENTSR_OWC /;"	d
ENTSR_PTX	drivers/net/8390.h	/^#define ENTSR_PTX /;"	d
ENUM_BUS_16BIT	drivers/net/ks8851_mll.h	/^#define ENUM_BUS_16BIT	/;"	d
ENUM_BUS_32BIT	drivers/net/ks8851_mll.h	/^#define ENUM_BUS_32BIT	/;"	d
ENUM_BUS_8BIT	drivers/net/ks8851_mll.h	/^#define ENUM_BUS_8BIT	/;"	d
ENUM_BUS_NONE	drivers/net/ks8851_mll.h	/^#define ENUM_BUS_NONE	/;"	d
ENUM_IDE	api/api_storage.c	/^#define ENUM_IDE	/;"	d	file:
ENUM_MAX	api/api_storage.c	/^#define ENUM_MAX	/;"	d	file:
ENUM_MMC	api/api_storage.c	/^#define ENUM_MMC	/;"	d	file:
ENUM_SATA	api/api_storage.c	/^#define ENUM_SATA	/;"	d	file:
ENUM_SCSI	api/api_storage.c	/^#define ENUM_SCSI	/;"	d	file:
ENUM_USB	api/api_storage.c	/^#define ENUM_USB	/;"	d	file:
ENV1_SIZE	tools/env/fw_env.h	/^#define ENV1_SIZE /;"	d
ENV2_SIZE	tools/env/fw_env.h	/^#define ENV2_SIZE /;"	d
ENVCRC-$(CONFIG_ENV_IS_EMBEDDED)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_DATAFLASH)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_DATAFLASH) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_FLASH)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_NAND)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_NAND) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_NVRAM)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_NVRAM) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y$/;"	m
ENVCRC-$(CONFIG_ENV_IS_IN_SPI_FLASH)	tools/Makefile	/^ENVCRC-$(CONFIG_ENV_IS_IN_SPI_FLASH) = y$/;"	m
ENVSECTORS	tools/env/fw_env.c	/^#define ENVSECTORS(/;"	d	file:
ENVSIZE	tools/env/fw_env.c	/^#define ENVSIZE(/;"	d	file:
ENV_ATTR_LIST_DELIM	include/env_attr.h	/^#define ENV_ATTR_LIST_DELIM	/;"	d
ENV_ATTR_SEP	include/env_attr.h	/^#define ENV_ATTR_SEP	/;"	d
ENV_CALLBACK_LIST_STATIC	include/env_callback.h	/^#define ENV_CALLBACK_LIST_STATIC /;"	d
ENV_CALLBACK_VAR	include/env_callback.h	/^#define ENV_CALLBACK_VAR /;"	d
ENV_CRC	common/env_embedded.c	/^#  define ENV_CRC	/;"	d	file:
ENV_DEVICE_SETTINGS	include/configs/omap3_igep00x0.h	/^#define ENV_DEVICE_SETTINGS /;"	d
ENV_DEVICE_SETTINGS	include/configs/rpi.h	/^#define ENV_DEVICE_SETTINGS /;"	d
ENV_DOT_ESCAPE	include/env_callback.h	/^#define ENV_DOT_ESCAPE /;"	d
ENV_DOT_ESCAPE	include/env_callback.h	/^#define ENV_DOT_ESCAPE$/;"	d
ENV_FLAGS_ATTR_MAX_LEN	include/env_flags.h	/^#define ENV_FLAGS_ATTR_MAX_LEN /;"	d
ENV_FLAGS_LIST_STATIC	include/env_flags.h	/^#define ENV_FLAGS_LIST_STATIC /;"	d
ENV_FLAGS_NET_VARTYPE_REPS	common/env_flags.c	/^#define ENV_FLAGS_NET_VARTYPE_REPS /;"	d	file:
ENV_FLAGS_VAR	include/env_flags.h	/^#define ENV_FLAGS_VAR /;"	d
ENV_FLAGS_VARACCESS_BIN_MASK	include/env_flags.h	/^#define ENV_FLAGS_VARACCESS_BIN_MASK	/;"	d
ENV_FLAGS_VARACCESS_LOC	include/env_flags.h	/^#define ENV_FLAGS_VARACCESS_LOC /;"	d
ENV_FLAGS_VARACCESS_PREVENT_CREATE	include/env_flags.h	/^#define ENV_FLAGS_VARACCESS_PREVENT_CREATE	/;"	d
ENV_FLAGS_VARACCESS_PREVENT_DELETE	include/env_flags.h	/^#define ENV_FLAGS_VARACCESS_PREVENT_DELETE	/;"	d
ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR	include/env_flags.h	/^#define ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR	/;"	d
ENV_FLAGS_VARACCESS_PREVENT_OVERWR	include/env_flags.h	/^#define ENV_FLAGS_VARACCESS_PREVENT_OVERWR	/;"	d
ENV_FLAGS_VARTYPE_BIN_MASK	include/env_flags.h	/^#define ENV_FLAGS_VARTYPE_BIN_MASK	/;"	d
ENV_FLAGS_VARTYPE_LOC	include/env_flags.h	/^#define ENV_FLAGS_VARTYPE_LOC /;"	d
ENV_FLASH_LAYOUT	include/configs/TQM5200.h	/^#define ENV_FLASH_LAYOUT	/;"	d
ENV_HEADER_SIZE	include/environment.h	/^# define ENV_HEADER_SIZE	/;"	d
ENV_HEADER_SIZE	tools/envcrc.c	/^# define ENV_HEADER_SIZE	/;"	d	file:
ENV_IS_EMBEDDED	include/configs/bct-brettl2.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/bf533-stamp.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/bf537-pnav.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/bf537-stamp.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/bf538f-ezkit.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/cm-bf537e.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/cm-bf537u.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/dnp5370.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/ibf-dsp561.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/configs/tcm-bf537.h	/^#define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/environment.h	/^#  define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	include/environment.h	/^# define ENV_IS_EMBEDDED$/;"	d
ENV_IS_EMBEDDED	tools/envcrc.c	/^#  define ENV_IS_EMBEDDED$/;"	d	file:
ENV_MEM_LAYOUT_SETTINGS	include/configs/rk3036_common.h	/^#define ENV_MEM_LAYOUT_SETTINGS /;"	d
ENV_MEM_LAYOUT_SETTINGS	include/configs/rk3288_common.h	/^#define ENV_MEM_LAYOUT_SETTINGS /;"	d
ENV_MEM_LAYOUT_SETTINGS	include/configs/rk3399_common.h	/^#define ENV_MEM_LAYOUT_SETTINGS /;"	d
ENV_MEM_LAYOUT_SETTINGS	include/configs/rpi.h	/^#define ENV_MEM_LAYOUT_SETTINGS /;"	d
ENV_MEM_LAYOUT_SETTINGS	include/configs/xilinx_zynqmp.h	/^#define ENV_MEM_LAYOUT_SETTINGS /;"	d
ENV_OFFSET_SIZE	include/nand.h	/^#define ENV_OFFSET_SIZE /;"	d
ENV_OOB_MARKER	include/nand.h	/^#define ENV_OOB_MARKER /;"	d
ENV_OOB_MARKER_OLD	include/nand.h	/^#define ENV_OOB_MARKER_OLD /;"	d
ENV_SIZE	include/environment.h	/^#define ENV_SIZE /;"	d
ENV_SIZE	tools/env/fw_env.c	/^#define ENV_SIZE /;"	d	file:
ENV_SIZE	tools/envcrc.c	/^#define ENV_SIZE /;"	d	file:
ENV_TEST	include/test/env.h	/^#define ENV_TEST(/;"	d
ENV_UPDT	include/configs/TQM5200.h	/^#   define ENV_UPDT	/;"	d
ENV_UPDT	include/configs/TQM5200.h	/^# define ENV_UPDT	/;"	d
ENXIO	include/linux/errno.h	/^#define	ENXIO	/;"	d
EN_10M_BGOFF	drivers/usb/eth/r8152.h	/^#define EN_10M_BGOFF	/;"	d
EN_10M_PLLOFF	drivers/usb/eth/r8152.h	/^#define EN_10M_PLLOFF	/;"	d
EN_32KSYNC	arch/arm/include/asm/arch-omap3/cpu.h	/^#define EN_32KSYNC	/;"	d
EN_ALDPS	drivers/usb/eth/r8152.h	/^#define EN_ALDPS	/;"	d
EN_AUTO_PRECH	drivers/ddr/microchip/ddr2_regs.h	/^#define EN_AUTO_PRECH	/;"	d
EN_AUTO_PWR_DN	drivers/ddr/microchip/ddr2_regs.h	/^#define EN_AUTO_PWR_DN(/;"	d
EN_AUTO_SELF_REF	drivers/ddr/microchip/ddr2_regs.h	/^#define EN_AUTO_SELF_REF(/;"	d
EN_CLK100M	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define EN_CLK100M	/;"	d	file:
EN_CLK125M	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define EN_CLK125M	/;"	d	file:
EN_CLK50M	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define EN_CLK50M	/;"	d	file:
EN_CLKAUX	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define EN_CLKAUX	/;"	d	file:
EN_EMI_L	drivers/usb/eth/r8152.h	/^#define EN_EMI_L	/;"	d
EN_GPT1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define EN_GPT1	/;"	d
EN_LDO	include/power/max77686_pmic.h	/^	EN_LDO = (0x3 << 6),$/;"	e	enum:__anon582827aa0303
EN_LDO	include/power/max8997_pmic.h	/^	EN_LDO = (0x3 << 6),$/;"	e	enum:__anonca676f190203
EN_MASK	arch/arm/cpu/armv7/bcm281xx/reset.c	/^#define EN_MASK	/;"	d	file:
EN_MMC1	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define EN_MMC1	/;"	d
EN_MMC2	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define EN_MMC2	/;"	d
EN_MMC3	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define EN_MMC3	/;"	d
EN_PLLB_TIMEOUT	arch/arm/mach-at91/arm920t/clock.c	/^#define EN_PLLB_TIMEOUT	/;"	d	file:
EN_PLLB_TIMEOUT	arch/arm/mach-at91/arm926ejs/clock.c	/^#define EN_PLLB_TIMEOUT	/;"	d	file:
EN_UPLL_TIMEOUT	arch/arm/mach-at91/clock.c	/^#define EN_UPLL_TIMEOUT	/;"	d	file:
EOB_ACT_CONTINUE_SCAN	scripts/kconfig/zconf.lex.c	/^#define EOB_ACT_CONTINUE_SCAN /;"	d	file:
EOB_ACT_END_OF_FILE	scripts/kconfig/zconf.lex.c	/^#define EOB_ACT_END_OF_FILE /;"	d	file:
EOB_ACT_LAST_MATCH	scripts/kconfig/zconf.lex.c	/^#define EOB_ACT_LAST_MATCH /;"	d	file:
EOF	arch/arm/mach-socfpga/qts-filter.sh	/^	cat << EOF$/;"	h
EOF	common/cli_hush.c	/^#define EOF /;"	d	file:
EOF	common/xyzModem.c	/^#define EOF /;"	d	file:
EOF	scripts/kconfig/check.sh	/^$* -x c -o \/dev\/null - > \/dev\/null 2>&1 << EOF$/;"	h
EOF	scripts/kconfig/lxdialog/check-lxdialog.sh	/^        $cc -x c - -o $tmp 2>\/dev\/null <<'EOF'$/;"	h
EOF	scripts/mkmakefile	/^cat << EOF > $2\/Makefile$/;"	h
EOF	test/fs/fat-noncontig-test.sh	/^.\/sandbox\/u-boot << EOF$/;"	h
EOF	test/fs/fs-test.sh	/^	$UBOOT << EOF$/;"	h
EOFERR	drivers/usb/host/r8a66597.h	/^#define	EOFERR	/;"	d
EOFERRE	drivers/usb/host/r8a66597.h	/^#define	EOFERRE	/;"	d
EOL	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
EONIC_devices	cmd/ambapp.c	/^static ambapp_device_name EONIC_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
EON_ALT_MANU	include/flash.h	/^#define EON_ALT_MANU	/;"	d
EON_MANUFACT	include/flash.h	/^#define EON_MANUFACT	/;"	d
EOPENSTALE	include/linux/errno.h	/^#define EOPENSTALE	/;"	d
EOPNOTSUPP	include/linux/errno.h	/^#define	EOPNOTSUPP	/;"	d
EORbit	drivers/net/rtl8169.c	/^	EORbit = 0x40000000,$/;"	e	enum:_DescStatusBit	file:
EOS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  EOS	/;"	d
EOS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   EOS	/;"	d
EOT	common/xyzModem.c	/^#define EOT /;"	d	file:
EOT	tools/kwboot.c	/^#define EOT	/;"	d	file:
EOVERFLOW	include/linux/errno.h	/^#define	EOVERFLOW	/;"	d
EOWNERDEAD	include/linux/errno.h	/^#define	EOWNERDEAD	/;"	d
EP	arch/arm/mach-at91/include/mach/atmel_usba_udc.h	/^#define EP(/;"	d
EP0_BUFSIZE	drivers/usb/gadget/storage_common.c	/^#define EP0_BUFSIZE	/;"	d	file:
EP0_CON	drivers/usb/gadget/dwc2_udc_otg.c	/^#define EP0_CON	/;"	d	file:
EP0_DATA_PHASE	drivers/usb/dwc3/core.h	/^	EP0_DATA_PHASE,$/;"	e	enum:dwc3_ep0_state
EP0_END_XFER	drivers/usb/gadget/pxa25x_udc.h	/^	EP0_END_XFER,$/;"	e	enum:ep0_state
EP0_EPT_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define EP0_EPT_SIZE	/;"	d
EP0_FIFO_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define EP0_FIFO_SIZE	/;"	d
EP0_FIFO_SIZE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define EP0_FIFO_SIZE	/;"	d
EP0_FIFO_SIZE	drivers/usb/gadget/pxa25x_udc.h	/^#define EP0_FIFO_SIZE	/;"	d
EP0_FLAG	drivers/usb/host/xhci.h	/^#define EP0_FLAG	/;"	d
EP0_IDLE	drivers/usb/gadget/pxa25x_udc.h	/^	EP0_IDLE,$/;"	e	enum:ep0_state
EP0_IDLE	include/usb/pxa27x_udc.h	/^#define EP0_IDLE	/;"	d
EP0_IN_DATA	include/usb/pxa27x_udc.h	/^#define EP0_IN_DATA	/;"	d
EP0_IN_DATA_PHASE	drivers/usb/gadget/pxa25x_udc.h	/^	EP0_IN_DATA_PHASE,$/;"	e	enum:ep0_state
EP0_MAX_PACKET_SIZE	include/usb/ci_udc.h	/^#define EP0_MAX_PACKET_SIZE	/;"	d
EP0_MAX_PACKET_SIZE	include/usb/mpc8xx_udc.h	/^#define EP0_MAX_PACKET_SIZE	/;"	d
EP0_MAX_PACKET_SIZE	include/usb/pxa27x_udc.h	/^#define EP0_MAX_PACKET_SIZE /;"	d
EP0_MAX_PACKET_SIZE	include/usb/udc.h	/^#define EP0_MAX_PACKET_SIZE /;"	d
EP0_NAK_LIMIT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP0_NAK_LIMIT	/;"	d
EP0_NR_BANKS	drivers/usb/gadget/atmel_usba_udc.h	/^#define EP0_NR_BANKS	/;"	d
EP0_OUT_DATA	include/usb/pxa27x_udc.h	/^#define EP0_OUT_DATA	/;"	d
EP0_OUT_DATA_PHASE	drivers/usb/gadget/pxa25x_udc.h	/^	EP0_OUT_DATA_PHASE,$/;"	e	enum:ep0_state
EP0_RX_COUNT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP0_RX_COUNT	/;"	d
EP0_SETUP_PHASE	drivers/usb/dwc3/core.h	/^	EP0_SETUP_PHASE,$/;"	e	enum:dwc3_ep0_state
EP0_STALL	drivers/usb/gadget/pxa25x_udc.h	/^	EP0_STALL,$/;"	e	enum:ep0_state
EP0_STATUS_PHASE	drivers/usb/dwc3/core.h	/^	EP0_STATUS_PHASE,$/;"	e	enum:dwc3_ep0_state
EP0_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP0_TX	/;"	d
EP0_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP0_TX_E	/;"	d
EP0_UNCONNECTED	drivers/usb/dwc3/core.h	/^	EP0_UNCONNECTED		= 0,$/;"	e	enum:dwc3_ep0_state
EP0_XFER_COMPLETE	include/usb/pxa27x_udc.h	/^#define EP0_XFER_COMPLETE	/;"	d
EP1_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP1_RX	/;"	d
EP1_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP1_RX_E	/;"	d
EP1_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP1_RX_ENA	/;"	d
EP1_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP1_TX	/;"	d
EP1_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP1_TX_E	/;"	d
EP1_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP1_TX_ENA	/;"	d
EP2_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP2_RX	/;"	d
EP2_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP2_RX_E	/;"	d
EP2_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP2_RX_ENA	/;"	d
EP2_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP2_TX	/;"	d
EP2_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP2_TX_E	/;"	d
EP2_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP2_TX_ENA	/;"	d
EP3_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP3_RX	/;"	d
EP3_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP3_RX_E	/;"	d
EP3_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP3_RX_ENA	/;"	d
EP3_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP3_TX	/;"	d
EP3_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP3_TX_E	/;"	d
EP3_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP3_TX_ENA	/;"	d
EP4_FULL_FC	drivers/usb/eth/r8152.h	/^#define EP4_FULL_FC	/;"	d
EP4_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP4_RX	/;"	d
EP4_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP4_RX_E	/;"	d
EP4_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP4_RX_ENA	/;"	d
EP4_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP4_TX	/;"	d
EP4_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP4_TX_E	/;"	d
EP4_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP4_TX_ENA	/;"	d
EP5_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP5_RX	/;"	d
EP5_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP5_RX_E	/;"	d
EP5_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP5_RX_ENA	/;"	d
EP5_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP5_TX	/;"	d
EP5_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP5_TX_E	/;"	d
EP5_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP5_TX_ENA	/;"	d
EP6_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP6_RX	/;"	d
EP6_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP6_RX_E	/;"	d
EP6_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP6_RX_ENA	/;"	d
EP6_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP6_TX	/;"	d
EP6_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP6_TX_E	/;"	d
EP6_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP6_TX_ENA	/;"	d
EP7_RX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP7_RX	/;"	d
EP7_RX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP7_RX_E	/;"	d
EP7_RX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP7_RX_ENA	/;"	d
EP7_TX	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP7_TX	/;"	d
EP7_TX_E	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP7_TX_E	/;"	d
EP7_TX_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EP7_TX_ENA	/;"	d
EP93XX_AHB_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_AHB_BASE	/;"	d
EP93XX_APB_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_APB_BASE	/;"	d
EP93XX_LED_DATA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_LED_DATA	/;"	d
EP93XX_LED_DDR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_LED_DDR	/;"	d
EP93XX_LED_GREEN_ENABLE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_LED_GREEN_ENABLE	/;"	d
EP93XX_LED_GREEN_ON	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_LED_GREEN_ON	/;"	d
EP93XX_LED_RED_ENABLE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_LED_RED_ENABLE	/;"	d
EP93XX_LED_RED_ON	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_LED_RED_ON	/;"	d
EP93XX_OFF_SMCBCR0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_OFF_SMCBCR0	/;"	d
EP93XX_OFF_SMCBCR1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_OFF_SMCBCR1	/;"	d
EP93XX_OFF_SMCBCR2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_OFF_SMCBCR2	/;"	d
EP93XX_OFF_SMCBCR3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_OFF_SMCBCR3	/;"	d
EP93XX_OFF_SMCBCR6	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_OFF_SMCBCR6	/;"	d
EP93XX_OFF_SMCBCR7	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_OFF_SMCBCR7	/;"	d
EP93XX_SDRAMCTRL	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL	/;"	d
EP93XX_SDRAMCTRL_BOOTSTATUS_MEDIA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_BOOTSTATUS_MEDIA	/;"	d
EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_16	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_16	/;"	d
EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_32	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_32	/;"	d
EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_8	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_8	/;"	d
EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_BOOTSTATUS_WIDTH_MASK	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_2KPAGE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_2KPAGE	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_AUTOPRECHARGE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_AUTOPRECHARGE	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_BANKCOUNT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_BANKCOUNT	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_2	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_3	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_4	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_4	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_5	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_5	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_6	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_6	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_7	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_7	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_8	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_8	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_CASLAT_MASK	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_EXTBUSWIDTH	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_EXTBUSWIDTH	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_2	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_3	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_MASK	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_SFCONFIGADDR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_SFCONFIGADDR	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_SROM512	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_SROM512	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_SROMLL	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_SROMLL	/;"	d
EP93XX_SDRAMCTRL_DEVCFG_WBL	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_DEVCFG_WBL	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_CKE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_CKE	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_CLKSHUTDOWN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_CLKSHUTDOWN	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_INIT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_INIT	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_LCR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_LCR	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_MRS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_MRS	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_REARBEN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_REARBEN	/;"	d
EP93XX_SDRAMCTRL_GLOBALCFG_SMEMBUSY	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_GLOBALCFG_SMEMBUSY	/;"	d
EP93XX_SDRAMCTRL_REFRESH_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EP93XX_SDRAMCTRL_REFRESH_MASK	/;"	d
EPACR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPACR0	/;"	d
EPACR15	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPACR15	/;"	d
EPACR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPACR_STRIDE	/;"	d
EPAPR_MAGIC	arch/powerpc/include/asm/processor.h	/^ #define EPAPR_MAGIC	/;"	d
EPBAR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define EPBAR	/;"	d
EPBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define EPBAR	/;"	d
EPCCR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCCR0	/;"	d
EPCCR15	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCCR15	/;"	d
EPCCR31	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCCR31	/;"	d
EPCCR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCCR_STRIDE	/;"	d
EPCMPR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCMPR0	/;"	d
EPCMPR15	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCMPR15	/;"	d
EPCMPR31	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCMPR31	/;"	d
EPCMPR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCMPR_STRIDE	/;"	d
EPCR_EPOS_EE	drivers/net/dm9000x.h	/^#define EPCR_EPOS_EE	/;"	d
EPCR_EPOS_PHY	drivers/net/dm9000x.h	/^#define EPCR_EPOS_PHY	/;"	d
EPCR_ERPRR	drivers/net/dm9000x.h	/^#define EPCR_ERPRR	/;"	d
EPCR_ERPRW	drivers/net/dm9000x.h	/^#define EPCR_ERPRW	/;"	d
EPCR_ERRE	drivers/net/dm9000x.h	/^#define EPCR_ERRE	/;"	d
EPCTR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCTR0	/;"	d
EPCTR31	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCTR31	/;"	d
EPCTR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPCTR_STRIDE	/;"	d
EPDCNFG	include/power/max77696_pmic.h	/^	EPDCNFG,$/;"	e	enum:__anoncca498ab0103
EPDC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define EPDC_BASE_ADDR /;"	d
EPDC_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define EPDC_BASE_ADDR /;"	d
EPDC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define EPDC_IPS_BASE_ADDR /;"	d
EPDC_PIXEL_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	EPDC_PIXEL_CLK_ROOT = 69,$/;"	e	enum:clk_root_index
EPDC_PIXEL_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
EPDC_PIXEL_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define EPDC_PIXEL_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
EPDINT	include/power/max77696_pmic.h	/^	EPDINT,$/;"	e	enum:__anoncca498ab0103
EPDINTM	include/power/max77696_pmic.h	/^	EPDINTM,$/;"	e	enum:__anoncca498ab0103
EPDINTS	include/power/max77696_pmic.h	/^	EPDINTS,$/;"	e	enum:__anoncca498ab0103
EPDISBLD	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define EPDISBLD	/;"	d
EPDOKINTS	include/power/max77696_pmic.h	/^	EPDOKINTS,$/;"	e	enum:__anoncca498ab0103
EPDR0I	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR0I /;"	d
EPDR0O	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR0O /;"	d
EPDR0S	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR0S /;"	d
EPDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR1 /;"	d
EPDR2	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR2 /;"	d
EPDR3	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR3 /;"	d
EPDR4	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR4 /;"	d
EPDR5	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR5 /;"	d
EPDR6	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR6 /;"	d
EPDR7	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR7 /;"	d
EPDR8	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR8 /;"	d
EPDR9	arch/sh/include/asm/cpu_sh7722.h	/^#define EPDR9 /;"	d
EPDSEQ	include/power/max77696_pmic.h	/^	EPDSEQ,$/;"	e	enum:__anoncca498ab0103
EPDVCOM	include/power/max77696_pmic.h	/^	EPDVCOM,$/;"	e	enum:__anoncca498ab0103
EPDVDDH	include/power/max77696_pmic.h	/^	EPDVDDH,$/;"	e	enum:__anoncca498ab0103
EPDVEE	include/power/max77696_pmic.h	/^	EPDVEE,$/;"	e	enum:__anoncca498ab0103
EPDVNEG	include/power/max77696_pmic.h	/^	EPDVNEG,$/;"	e	enum:__anoncca498ab0103
EPDVPOS	include/power/max77696_pmic.h	/^	EPDVPOS,$/;"	e	enum:__anoncca498ab0103
EPECR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPECR0	/;"	d
EPECR15	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPECR15	/;"	d
EPECR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPECR_STRIDE	/;"	d
EPERM	include/linux/errno.h	/^#define	EPERM	/;"	d
EPEVTCR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPEVTCR0	/;"	d
EPEVTCR9	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPEVTCR9	/;"	d
EPEVTCR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPEVTCR_STRIDE	/;"	d
EPFNOSUPPORT	include/linux/errno.h	/^#define	EPFNOSUPPORT	/;"	d
EPGCR	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPGCR	/;"	d
EPH_STATUS_REG	drivers/net/smc91111.h	/^#define EPH_STATUS_REG	/;"	d
EPIMCR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPIMCR0	/;"	d
EPIMCR31	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPIMCR31	/;"	d
EPIMCR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPIMCR_STRIDE	/;"	d
EPIPE	include/linux/errno.h	/^#define	EPIPE	/;"	d
EPIR	arch/sh/include/asm/cpu_sh7722.h	/^#define EPIR /;"	d
EPIT1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define EPIT1_BASE_ADDR /;"	d
EPIT1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define EPIT1_BASE_ADDR	/;"	d
EPIT1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define EPIT1_BASE_ADDR /;"	d
EPIT2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define EPIT2_BASE_ADDR /;"	d
EPIT2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define EPIT2_BASE_ADDR	/;"	d
EPIT2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define EPIT2_BASE_ADDR /;"	d
EPLD0_BOOT_SMALL_FLASH	board/amcc/luan/epld.h	/^#define EPLD0_BOOT_SMALL_FLASH	/;"	d
EPLD0_EXT_ARB_SEL_N	board/amcc/luan/epld.h	/^#define EPLD0_EXT_ARB_SEL_N	/;"	d
EPLD0_FLASH_ONBRD_N	board/amcc/luan/epld.h	/^#define EPLD0_FLASH_ONBRD_N	/;"	d
EPLD0_FLASH_SRAM_SEL_N	board/amcc/luan/epld.h	/^#define EPLD0_FLASH_SRAM_SEL_N	/;"	d
EPLD0_FSEL_FB2	board/amcc/luan/epld.h	/^#define EPLD0_FSEL_FB2	/;"	d
EPLD0_RAW_CARD_BIT0	board/amcc/luan/epld.h	/^#define EPLD0_RAW_CARD_BIT0	/;"	d
EPLD0_RAW_CARD_BIT1	board/amcc/luan/epld.h	/^#define EPLD0_RAW_CARD_BIT1	/;"	d
EPLD0_RAW_CARD_BIT2	board/amcc/luan/epld.h	/^#define EPLD0_RAW_CARD_BIT2	/;"	d
EPLD1_CLK_CNTL0	board/amcc/luan/epld.h	/^#define EPLD1_CLK_CNTL0	/;"	d
EPLD1_CLK_CNTL3	board/amcc/luan/epld.h	/^#define EPLD1_CLK_CNTL3	/;"	d
EPLD1_CLK_CNTL4	board/amcc/luan/epld.h	/^#define EPLD1_CLK_CNTL4	/;"	d
EPLD1_MASTER_CLOCK6	board/amcc/luan/epld.h	/^#define EPLD1_MASTER_CLOCK6	/;"	d
EPLD1_MASTER_CLOCK7	board/amcc/luan/epld.h	/^#define EPLD1_MASTER_CLOCK7	/;"	d
EPLD1_MASTER_CLOCK8	board/amcc/luan/epld.h	/^#define EPLD1_MASTER_CLOCK8	/;"	d
EPLD1_PCIL0_CNTL1	board/amcc/luan/epld.h	/^#define EPLD1_PCIL0_CNTL1	/;"	d
EPLD1_PCIL0_CNTL2	board/amcc/luan/epld.h	/^#define EPLD1_PCIL0_CNTL2	/;"	d
EPLD2_DEFAULT_UART_N	board/amcc/luan/epld.h	/^#define EPLD2_DEFAULT_UART_N	/;"	d
EPLD2_ETH_AUTO_NEGO	board/amcc/luan/epld.h	/^#define EPLD2_ETH_AUTO_NEGO	/;"	d
EPLD2_ETH_DUPLEX_MODE	board/amcc/luan/epld.h	/^#define EPLD2_ETH_DUPLEX_MODE	/;"	d
EPLD2_ETH_MODE_10	board/amcc/luan/epld.h	/^#define EPLD2_ETH_MODE_10	/;"	d
EPLD2_ETH_MODE_100	board/amcc/luan/epld.h	/^#define EPLD2_ETH_MODE_100	/;"	d
EPLD2_ETH_MODE_1000	board/amcc/luan/epld.h	/^#define EPLD2_ETH_MODE_1000	/;"	d
EPLD2_RESET_ETH_N	board/amcc/luan/epld.h	/^#define EPLD2_RESET_ETH_N	/;"	d
EPLD3_STATUS_LED1	board/amcc/luan/epld.h	/^#define EPLD3_STATUS_LED1	/;"	d
EPLD3_STATUS_LED2	board/amcc/luan/epld.h	/^#define EPLD3_STATUS_LED2	/;"	d
EPLD3_STATUS_LED3	board/amcc/luan/epld.h	/^#define EPLD3_STATUS_LED3	/;"	d
EPLD3_STATUS_LED4	board/amcc/luan/epld.h	/^#define EPLD3_STATUS_LED4	/;"	d
EPLD4_PCIL0_VTH1	board/amcc/luan/epld.h	/^#define EPLD4_PCIL0_VTH1	/;"	d
EPLD4_PCIL0_VTH2	board/amcc/luan/epld.h	/^#define EPLD4_PCIL0_VTH2	/;"	d
EPLD4_PCIL0_VTH3	board/amcc/luan/epld.h	/^#define EPLD4_PCIL0_VTH3	/;"	d
EPLD4_PCIL0_VTH4	board/amcc/luan/epld.h	/^#define EPLD4_PCIL0_VTH4	/;"	d
EPLD4_PCIX1_VTH1	board/amcc/luan/epld.h	/^#define EPLD4_PCIX1_VTH1	/;"	d
EPLD4_PCIX1_VTH2	board/amcc/luan/epld.h	/^#define EPLD4_PCIX1_VTH2	/;"	d
EPLD4_PCIX1_VTH3	board/amcc/luan/epld.h	/^#define EPLD4_PCIX1_VTH3	/;"	d
EPLD4_PCIX1_VTH4	board/amcc/luan/epld.h	/^#define EPLD4_PCIX1_VTH4	/;"	d
EPLD5_PCIL0_INT0	board/amcc/luan/epld.h	/^#define EPLD5_PCIL0_INT0	/;"	d
EPLD5_PCIL0_INT1	board/amcc/luan/epld.h	/^#define EPLD5_PCIL0_INT1	/;"	d
EPLD5_PCIL0_INT2	board/amcc/luan/epld.h	/^#define EPLD5_PCIL0_INT2	/;"	d
EPLD5_PCIL0_INT3	board/amcc/luan/epld.h	/^#define EPLD5_PCIL0_INT3	/;"	d
EPLD5_PCIX1_INT0	board/amcc/luan/epld.h	/^#define EPLD5_PCIX1_INT0	/;"	d
EPLD5_PCIX1_INT1	board/amcc/luan/epld.h	/^#define EPLD5_PCIX1_INT1	/;"	d
EPLD5_PCIX1_INT2	board/amcc/luan/epld.h	/^#define EPLD5_PCIX1_INT2	/;"	d
EPLD5_PCIX1_INT3	board/amcc/luan/epld.h	/^#define EPLD5_PCIX1_INT3	/;"	d
EPLD6_ETH_INT_MODE	board/amcc/luan/epld.h	/^#define EPLD6_ETH_INT_MODE	/;"	d
EPLD6_PCI1_CLKCNTL1	board/amcc/luan/epld.h	/^#define EPLD6_PCI1_CLKCNTL1	/;"	d
EPLD6_PCI1_CLKCNTL2	board/amcc/luan/epld.h	/^#define EPLD6_PCI1_CLKCNTL2	/;"	d
EPLD6_PCI2_CLKCNTL1	board/amcc/luan/epld.h	/^#define EPLD6_PCI2_CLKCNTL1	/;"	d
EPLD6_PCI2_CLKCNTL2	board/amcc/luan/epld.h	/^#define EPLD6_PCI2_CLKCNTL2	/;"	d
EPLD6_PCIL0_RESET_CTL	board/amcc/luan/epld.h	/^#define EPLD6_PCIL0_RESET_CTL	/;"	d
EPLD6_PCIX1_RESET_CTL	board/amcc/luan/epld.h	/^#define EPLD6_PCIX1_RESET_CTL	/;"	d
EPLD6_PCIX2_RESET_CTL	board/amcc/luan/epld.h	/^#define EPLD6_PCIX2_RESET_CTL	/;"	d
EPLD7_INTA_MODE	board/amcc/luan/epld.h	/^#define EPLD7_INTA_MODE	/;"	d
EPLD7_PCI_INT_MODE_N	board/amcc/luan/epld.h	/^#define EPLD7_PCI_INT_MODE_N	/;"	d
EPLD7_VTH1	board/amcc/luan/epld.h	/^#define EPLD7_VTH1	/;"	d
EPLD7_VTH2	board/amcc/luan/epld.h	/^#define EPLD7_VTH2	/;"	d
EPLD7_VTH3	board/amcc/luan/epld.h	/^#define EPLD7_VTH3	/;"	d
EPLD7_VTH4	board/amcc/luan/epld.h	/^#define EPLD7_VTH4	/;"	d
EPLD7_WRITE_ENABLE_GPIO	board/amcc/luan/epld.h	/^#define EPLD7_WRITE_ENABLE_GPIO	/;"	d
EPLD7_WRITE_ENABLE_INT	board/amcc/luan/epld.h	/^#define EPLD7_WRITE_ENABLE_INT	/;"	d
EPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define EPLL	/;"	d
EPLL	arch/arm/mach-s5pc1xx/include/mach/clk.h	/^#define EPLL	/;"	d
EPLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define EPLL_CON0_LOCKED	/;"	d
EPLL_CON0_LOCK_DET_EN_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_LOCK_DET_EN_MASK	/;"	d
EPLL_CON0_LOCK_DET_EN_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_LOCK_DET_EN_SHIFT	/;"	d
EPLL_CON0_MDIV_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_MDIV_MASK	/;"	d
EPLL_CON0_MDIV_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_MDIV_SHIFT	/;"	d
EPLL_CON0_PDIV_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_PDIV_MASK	/;"	d
EPLL_CON0_PDIV_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_PDIV_SHIFT	/;"	d
EPLL_CON0_SDIV_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_SDIV_MASK	/;"	d
EPLL_CON0_SDIV_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define EPLL_CON0_SDIV_SHIFT	/;"	d
EPLL_CON0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define EPLL_CON0_VAL	/;"	d
EPLL_CON0_VAL	board/samsung/trats/setup.h	/^#define EPLL_CON0_VAL	/;"	d
EPLL_CON1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define EPLL_CON1_VAL	/;"	d
EPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define EPLL_CON1_VAL	/;"	d
EPLL_CON1_VAL	board/samsung/trats/setup.h	/^#define EPLL_CON1_VAL	/;"	d
EPLL_CON2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define EPLL_CON2_VAL	/;"	d
EPLL_K	arch/arm/mach-exynos/exynos4_setup.h	/^#define EPLL_K	/;"	d
EPLL_K	board/samsung/trats/setup.h	/^#define EPLL_K	/;"	d
EPLL_MDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define EPLL_MDIV	/;"	d
EPLL_MDIV	board/samsung/trats/setup.h	/^#define EPLL_MDIV	/;"	d
EPLL_PDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define EPLL_PDIV	/;"	d
EPLL_PDIV	board/samsung/trats/setup.h	/^#define EPLL_PDIV	/;"	d
EPLL_SDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define EPLL_SDIV	/;"	d
EPLL_SDIV	board/samsung/trats/setup.h	/^#define EPLL_SDIV	/;"	d
EPMAP14_DEFAULT	include/usb/fotg210.h	/^#define EPMAP14_DEFAULT /;"	d
EPMAP14_SET	include/usb/fotg210.h	/^#define EPMAP14_SET(/;"	d
EPMAP14_SET_IN	include/usb/fotg210.h	/^#define EPMAP14_SET_IN(/;"	d
EPMAP14_SET_OUT	include/usb/fotg210.h	/^#define EPMAP14_SET_OUT(/;"	d
EPMAP58_DEFAULT	include/usb/fotg210.h	/^#define EPMAP58_DEFAULT /;"	d
EPMAP58_SET	include/usb/fotg210.h	/^#define EPMAP58_SET(/;"	d
EPMAP58_SET_IN	include/usb/fotg210.h	/^#define EPMAP58_SET_IN(/;"	d
EPMAP58_SET_OUT	include/usb/fotg210.h	/^#define EPMAP58_SET_OUT(/;"	d
EPN	arch/powerpc/include/asm/mmu.h	/^#define EPN(/;"	d
EPNUM	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define EPNUM	/;"	d
EPOCH_WDAY	include/linux/time.h	/^#define EPOCH_WDAY /;"	d
EPOCH_YEAR	include/linux/time.h	/^#define EPOCH_YEAR /;"	d
EPORT_DDR_EPDD1	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD1	/;"	d
EPORT_DDR_EPDD2	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD2	/;"	d
EPORT_DDR_EPDD3	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD3	/;"	d
EPORT_DDR_EPDD4	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD4	/;"	d
EPORT_DDR_EPDD5	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD5	/;"	d
EPORT_DDR_EPDD6	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD6	/;"	d
EPORT_DDR_EPDD7	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DDR_EPDD7	/;"	d
EPORT_DR_EPD1	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD1	/;"	d
EPORT_DR_EPD2	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD2	/;"	d
EPORT_DR_EPD3	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD3	/;"	d
EPORT_DR_EPD4	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD4	/;"	d
EPORT_DR_EPD5	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD5	/;"	d
EPORT_DR_EPD6	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD6	/;"	d
EPORT_DR_EPD7	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_DR_EPD7	/;"	d
EPORT_EPDDR_EPDD1	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD1	/;"	d
EPORT_EPDDR_EPDD2	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD2	/;"	d
EPORT_EPDDR_EPDD3	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD3	/;"	d
EPORT_EPDDR_EPDD4	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD4	/;"	d
EPORT_EPDDR_EPDD5	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD5	/;"	d
EPORT_EPDDR_EPDD6	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD6	/;"	d
EPORT_EPDDR_EPDD7	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDDR_EPDD7	/;"	d
EPORT_EPDR_EPD1	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD1	/;"	d
EPORT_EPDR_EPD2	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD2	/;"	d
EPORT_EPDR_EPD3	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD3	/;"	d
EPORT_EPDR_EPD4	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD4	/;"	d
EPORT_EPDR_EPD5	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD5	/;"	d
EPORT_EPDR_EPD6	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD6	/;"	d
EPORT_EPDR_EPD7	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPDR_EPD7	/;"	d
EPORT_EPFR_EPF1	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF1	/;"	d
EPORT_EPFR_EPF2	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF2	/;"	d
EPORT_EPFR_EPF3	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF3	/;"	d
EPORT_EPFR_EPF4	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF4	/;"	d
EPORT_EPFR_EPF5	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF5	/;"	d
EPORT_EPFR_EPF6	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF6	/;"	d
EPORT_EPFR_EPF7	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPFR_EPF7	/;"	d
EPORT_EPIER_EPIE1	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE1	/;"	d
EPORT_EPIER_EPIE2	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE2	/;"	d
EPORT_EPIER_EPIE3	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE3	/;"	d
EPORT_EPIER_EPIE4	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE4	/;"	d
EPORT_EPIER_EPIE5	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE5	/;"	d
EPORT_EPIER_EPIE6	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE6	/;"	d
EPORT_EPIER_EPIE7	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPIER_EPIE7	/;"	d
EPORT_EPPAR_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_BOTH	/;"	d
EPORT_EPPAR_EPPA1	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA1(/;"	d
EPORT_EPPAR_EPPA1_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA1_BOTH	/;"	d
EPORT_EPPAR_EPPA1_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA1_FALLING	/;"	d
EPORT_EPPAR_EPPA1_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA1_LEVEL	/;"	d
EPORT_EPPAR_EPPA1_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA1_RISING	/;"	d
EPORT_EPPAR_EPPA2	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA2(/;"	d
EPORT_EPPAR_EPPA2_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA2_BOTH	/;"	d
EPORT_EPPAR_EPPA2_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA2_FALLING	/;"	d
EPORT_EPPAR_EPPA2_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA2_LEVEL	/;"	d
EPORT_EPPAR_EPPA2_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA2_RISING	/;"	d
EPORT_EPPAR_EPPA3	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA3(/;"	d
EPORT_EPPAR_EPPA3_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA3_BOTH	/;"	d
EPORT_EPPAR_EPPA3_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA3_FALLING	/;"	d
EPORT_EPPAR_EPPA3_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA3_LEVEL	/;"	d
EPORT_EPPAR_EPPA3_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA3_RISING	/;"	d
EPORT_EPPAR_EPPA4	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA4(/;"	d
EPORT_EPPAR_EPPA4_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA4_BOTH	/;"	d
EPORT_EPPAR_EPPA4_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA4_FALLING	/;"	d
EPORT_EPPAR_EPPA4_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA4_LEVEL	/;"	d
EPORT_EPPAR_EPPA4_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA4_RISING	/;"	d
EPORT_EPPAR_EPPA5	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA5(/;"	d
EPORT_EPPAR_EPPA5_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA5_BOTH	/;"	d
EPORT_EPPAR_EPPA5_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA5_FALLING	/;"	d
EPORT_EPPAR_EPPA5_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA5_LEVEL	/;"	d
EPORT_EPPAR_EPPA5_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA5_RISING	/;"	d
EPORT_EPPAR_EPPA6	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA6(/;"	d
EPORT_EPPAR_EPPA6_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA6_BOTH	/;"	d
EPORT_EPPAR_EPPA6_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA6_FALLING	/;"	d
EPORT_EPPAR_EPPA6_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA6_LEVEL	/;"	d
EPORT_EPPAR_EPPA6_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA6_RISING	/;"	d
EPORT_EPPAR_EPPA7	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA7(/;"	d
EPORT_EPPAR_EPPA7_BOTH	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA7_BOTH	/;"	d
EPORT_EPPAR_EPPA7_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA7_FALLING	/;"	d
EPORT_EPPAR_EPPA7_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA7_LEVEL	/;"	d
EPORT_EPPAR_EPPA7_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_EPPA7_RISING	/;"	d
EPORT_EPPAR_FALLING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_FALLING	/;"	d
EPORT_EPPAR_LEVEL	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_LEVEL	/;"	d
EPORT_EPPAR_RISING	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPAR_RISING	/;"	d
EPORT_EPPDR_EPPD1	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD1	/;"	d
EPORT_EPPDR_EPPD2	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD2	/;"	d
EPORT_EPPDR_EPPD3	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD3	/;"	d
EPORT_EPPDR_EPPD4	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD4	/;"	d
EPORT_EPPDR_EPPD5	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD5	/;"	d
EPORT_EPPDR_EPPD6	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD6	/;"	d
EPORT_EPPDR_EPPD7	arch/m68k/include/asm/coldfire/edma.h	/^#define EPORT_EPPDR_EPPD7	/;"	d
EPORT_FR_EPF1	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF1	/;"	d
EPORT_FR_EPF2	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF2	/;"	d
EPORT_FR_EPF3	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF3	/;"	d
EPORT_FR_EPF4	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF4	/;"	d
EPORT_FR_EPF5	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF5	/;"	d
EPORT_FR_EPF6	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF6	/;"	d
EPORT_FR_EPF7	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_FR_EPF7	/;"	d
EPORT_IER_EPIE1	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE1	/;"	d
EPORT_IER_EPIE2	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE2	/;"	d
EPORT_IER_EPIE3	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE3	/;"	d
EPORT_IER_EPIE4	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE4	/;"	d
EPORT_IER_EPIE5	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE5	/;"	d
EPORT_IER_EPIE6	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE6	/;"	d
EPORT_IER_EPIE7	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_IER_EPIE7	/;"	d
EPORT_PAR_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_BOTH	/;"	d
EPORT_PAR_EPPA1	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA1(/;"	d
EPORT_PAR_EPPA1_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA1_BOTH	/;"	d
EPORT_PAR_EPPA1_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA1_FALLING	/;"	d
EPORT_PAR_EPPA1_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA1_LEVEL	/;"	d
EPORT_PAR_EPPA1_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA1_RISING	/;"	d
EPORT_PAR_EPPA2	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA2(/;"	d
EPORT_PAR_EPPA2_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA2_BOTH	/;"	d
EPORT_PAR_EPPA2_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA2_FALLING	/;"	d
EPORT_PAR_EPPA2_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA2_LEVEL	/;"	d
EPORT_PAR_EPPA2_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA2_RISING	/;"	d
EPORT_PAR_EPPA3	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA3(/;"	d
EPORT_PAR_EPPA3_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA3_BOTH	/;"	d
EPORT_PAR_EPPA3_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA3_FALLING	/;"	d
EPORT_PAR_EPPA3_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA3_LEVEL	/;"	d
EPORT_PAR_EPPA3_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA3_RISING	/;"	d
EPORT_PAR_EPPA4	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA4(/;"	d
EPORT_PAR_EPPA4_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA4_BOTH	/;"	d
EPORT_PAR_EPPA4_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA4_FALLING	/;"	d
EPORT_PAR_EPPA4_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA4_LEVEL	/;"	d
EPORT_PAR_EPPA4_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA4_RISING	/;"	d
EPORT_PAR_EPPA5	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA5(/;"	d
EPORT_PAR_EPPA5_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA5_BOTH	/;"	d
EPORT_PAR_EPPA5_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA5_FALLING	/;"	d
EPORT_PAR_EPPA5_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA5_LEVEL	/;"	d
EPORT_PAR_EPPA5_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA5_RISING	/;"	d
EPORT_PAR_EPPA6	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA6(/;"	d
EPORT_PAR_EPPA6_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA6_BOTH	/;"	d
EPORT_PAR_EPPA6_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA6_FALLING	/;"	d
EPORT_PAR_EPPA6_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA6_LEVEL	/;"	d
EPORT_PAR_EPPA6_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA6_RISING	/;"	d
EPORT_PAR_EPPA7	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA7(/;"	d
EPORT_PAR_EPPA7_BOTH	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA7_BOTH	/;"	d
EPORT_PAR_EPPA7_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA7_FALLING	/;"	d
EPORT_PAR_EPPA7_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA7_LEVEL	/;"	d
EPORT_PAR_EPPA7_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_EPPA7_RISING	/;"	d
EPORT_PAR_FALLING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_FALLING	/;"	d
EPORT_PAR_LEVEL	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_LEVEL	/;"	d
EPORT_PAR_RISING	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PAR_RISING	/;"	d
EPORT_PDR_EPPD1	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD1	/;"	d
EPORT_PDR_EPPD2	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD2	/;"	d
EPORT_PDR_EPPD3	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD3	/;"	d
EPORT_PDR_EPPD4	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD4	/;"	d
EPORT_PDR_EPPD5	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD5	/;"	d
EPORT_PDR_EPPD6	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD6	/;"	d
EPORT_PDR_EPPD7	arch/m68k/include/asm/coldfire/eport.h	/^#define EPORT_PDR_EPPD7	/;"	d
EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_CLIP /;"	d
EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_CLIP /;"	d
EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_CLIP /;"	d
EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_CLIP /;"	d
EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_CLKDIV /;"	d
EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_CLKDIV /;"	d
EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_CLKDIV /;"	d
EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_CLKDIV /;"	d
EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_CONTROL /;"	d
EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_CONTROL /;"	d
EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_CONTROL /;"	d
EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_CONTROL /;"	d
EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_FRAME /;"	d
EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_FRAME /;"	d
EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_FRAME /;"	d
EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_FRAME /;"	d
EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_FS1P_AVPL /;"	d
EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_FS1P_AVPL /;"	d
EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_FS1P_AVPL /;"	d
EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_FS1P_AVPL /;"	d
EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_FS1W_HBL /;"	d
EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_FS1W_HBL /;"	d
EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_FS1W_HBL /;"	d
EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_FS1W_HBL /;"	d
EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_FS2P_LAVF /;"	d
EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_FS2P_LAVF /;"	d
EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_FS2P_LAVF /;"	d
EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_FS2P_LAVF /;"	d
EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_FS2W_LVB /;"	d
EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_FS2W_LVB /;"	d
EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_FS2W_LVB /;"	d
EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_FS2W_LVB /;"	d
EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_HCOUNT /;"	d
EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_HCOUNT /;"	d
EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_HCOUNT /;"	d
EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_HCOUNT /;"	d
EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_HDELAY /;"	d
EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_HDELAY /;"	d
EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_HDELAY /;"	d
EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_HDELAY /;"	d
EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_LINE /;"	d
EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_LINE /;"	d
EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_LINE /;"	d
EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_LINE /;"	d
EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_STATUS /;"	d
EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_STATUS /;"	d
EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_STATUS /;"	d
EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_STATUS /;"	d
EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_VCOUNT /;"	d
EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_VCOUNT /;"	d
EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_VCOUNT /;"	d
EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_VCOUNT /;"	d
EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI0_VDELAY /;"	d
EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI0_VDELAY /;"	d
EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI0_VDELAY /;"	d
EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI0_VDELAY /;"	d
EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_CLIP /;"	d
EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_CLIP /;"	d
EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_CLIP /;"	d
EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_CLIP /;"	d
EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_CLIP /;"	d
EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_CLKDIV /;"	d
EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_CLKDIV /;"	d
EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_CLKDIV /;"	d
EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_CLKDIV /;"	d
EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_CLKDIV /;"	d
EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_CONTROL /;"	d
EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_CONTROL /;"	d
EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_CONTROL /;"	d
EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_CONTROL /;"	d
EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_CONTROL /;"	d
EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_FRAME /;"	d
EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_FRAME /;"	d
EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_FRAME /;"	d
EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_FRAME /;"	d
EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_FRAME /;"	d
EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_FS1P_AVPL /;"	d
EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_FS1P_AVPL /;"	d
EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_FS1P_AVPL /;"	d
EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_FS1P_AVPL /;"	d
EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_FS1P_AVPL /;"	d
EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_FS1W_HBL /;"	d
EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_FS1W_HBL /;"	d
EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_FS1W_HBL /;"	d
EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_FS1W_HBL /;"	d
EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_FS1W_HBL /;"	d
EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_FS2P_LAVF /;"	d
EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_FS2P_LAVF /;"	d
EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_FS2P_LAVF /;"	d
EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_FS2P_LAVF /;"	d
EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_FS2P_LAVF /;"	d
EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_FS2W_LVB /;"	d
EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_FS2W_LVB /;"	d
EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_FS2W_LVB /;"	d
EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_FS2W_LVB /;"	d
EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_FS2W_LVB /;"	d
EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_HCOUNT /;"	d
EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_HCOUNT /;"	d
EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_HCOUNT /;"	d
EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_HCOUNT /;"	d
EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_HCOUNT /;"	d
EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_HDELAY /;"	d
EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_HDELAY /;"	d
EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_HDELAY /;"	d
EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_HDELAY /;"	d
EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_HDELAY /;"	d
EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_LINE /;"	d
EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_LINE /;"	d
EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_LINE /;"	d
EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_LINE /;"	d
EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_LINE /;"	d
EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_STATUS /;"	d
EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_STATUS /;"	d
EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_STATUS /;"	d
EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_STATUS /;"	d
EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_STATUS /;"	d
EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_VCOUNT /;"	d
EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_VCOUNT /;"	d
EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_VCOUNT /;"	d
EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_VCOUNT /;"	d
EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_VCOUNT /;"	d
EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI1_VDELAY /;"	d
EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI1_VDELAY /;"	d
EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI1_VDELAY /;"	d
EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI1_VDELAY /;"	d
EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI1_VDELAY /;"	d
EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_CLIP /;"	d
EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_CLIP /;"	d
EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_CLIP /;"	d
EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_CLIP /;"	d
EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_CLIP /;"	d
EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_CLKDIV /;"	d
EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_CLKDIV /;"	d
EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_CLKDIV /;"	d
EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_CLKDIV /;"	d
EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_CLKDIV /;"	d
EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_CONTROL /;"	d
EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_CONTROL /;"	d
EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_CONTROL /;"	d
EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_CONTROL /;"	d
EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_CONTROL /;"	d
EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_FRAME /;"	d
EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_FRAME /;"	d
EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_FRAME /;"	d
EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_FRAME /;"	d
EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_FRAME /;"	d
EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_FS1P_AVPL /;"	d
EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_FS1P_AVPL /;"	d
EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_FS1P_AVPL /;"	d
EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_FS1P_AVPL /;"	d
EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_FS1P_AVPL /;"	d
EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_FS1W_HBL /;"	d
EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_FS1W_HBL /;"	d
EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_FS1W_HBL /;"	d
EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_FS1W_HBL /;"	d
EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_FS1W_HBL /;"	d
EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_FS2P_LAVF /;"	d
EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_FS2P_LAVF /;"	d
EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_FS2P_LAVF /;"	d
EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_FS2P_LAVF /;"	d
EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_FS2P_LAVF /;"	d
EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_FS2W_LVB /;"	d
EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_FS2W_LVB /;"	d
EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_FS2W_LVB /;"	d
EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_FS2W_LVB /;"	d
EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_FS2W_LVB /;"	d
EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_HCOUNT /;"	d
EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_HCOUNT /;"	d
EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_HCOUNT /;"	d
EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_HCOUNT /;"	d
EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_HCOUNT /;"	d
EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_HDELAY /;"	d
EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_HDELAY /;"	d
EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_HDELAY /;"	d
EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_HDELAY /;"	d
EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_HDELAY /;"	d
EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_LINE /;"	d
EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_LINE /;"	d
EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_LINE /;"	d
EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_LINE /;"	d
EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_LINE /;"	d
EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_STATUS /;"	d
EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_STATUS /;"	d
EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_STATUS /;"	d
EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_STATUS /;"	d
EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_STATUS /;"	d
EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_VCOUNT /;"	d
EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_VCOUNT /;"	d
EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_VCOUNT /;"	d
EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_VCOUNT /;"	d
EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_VCOUNT /;"	d
EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define EPPI2_VDELAY /;"	d
EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define EPPI2_VDELAY /;"	d
EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define EPPI2_VDELAY /;"	d
EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define EPPI2_VDELAY /;"	d
EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define EPPI2_VDELAY /;"	d
EPPI_CLIP	board/bf548-ezkit/video.c	/^#define EPPI_CLIP	/;"	d	file:
EPPI_CLIP	board/cm-bf548/video.c	/^#define EPPI_CLIP	/;"	d	file:
EPPI_CONTROL	board/bf548-ezkit/video.c	/^#define EPPI_CONTROL	/;"	d	file:
EPPI_CONTROL	board/cm-bf548/video.c	/^#define EPPI_CONTROL	/;"	d	file:
EPPI_DIR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define EPPI_DIR /;"	d
EPPI_EN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define EPPI_EN /;"	d
EPPI_FRAME	board/bf548-ezkit/video.c	/^#define EPPI_FRAME	/;"	d	file:
EPPI_FRAME	board/cm-bf548/video.c	/^#define EPPI_FRAME	/;"	d	file:
EPPI_FS1P_AVPL	board/bf548-ezkit/video.c	/^#define EPPI_FS1P_AVPL	/;"	d	file:
EPPI_FS1P_AVPL	board/cm-bf548/video.c	/^#define EPPI_FS1P_AVPL	/;"	d	file:
EPPI_FS1W_HBL	board/bf548-ezkit/video.c	/^#define EPPI_FS1W_HBL	/;"	d	file:
EPPI_FS1W_HBL	board/cm-bf548/video.c	/^#define EPPI_FS1W_HBL	/;"	d	file:
EPPI_FS2P_LAVF	board/bf548-ezkit/video.c	/^#define EPPI_FS2P_LAVF	/;"	d	file:
EPPI_FS2P_LAVF	board/cm-bf548/video.c	/^#define EPPI_FS2P_LAVF	/;"	d	file:
EPPI_FS2W_LVB	board/bf548-ezkit/video.c	/^#define EPPI_FS2W_LVB	/;"	d	file:
EPPI_FS2W_LVB	board/cm-bf548/video.c	/^#define EPPI_FS2W_LVB	/;"	d	file:
EPPI_HCOUNT	board/bf548-ezkit/video.c	/^#define EPPI_HCOUNT	/;"	d	file:
EPPI_HCOUNT	board/cm-bf548/video.c	/^#define EPPI_HCOUNT	/;"	d	file:
EPPI_HDELAY	board/bf548-ezkit/video.c	/^#define EPPI_HDELAY	/;"	d	file:
EPPI_HDELAY	board/cm-bf548/video.c	/^#define EPPI_HDELAY	/;"	d	file:
EPPI_LINE	board/bf548-ezkit/video.c	/^#define EPPI_LINE	/;"	d	file:
EPPI_LINE	board/cm-bf548/video.c	/^#define EPPI_LINE	/;"	d	file:
EPPI_VCOUNT	board/bf548-ezkit/video.c	/^#define EPPI_VCOUNT	/;"	d	file:
EPPI_VCOUNT	board/cm-bf548/video.c	/^#define EPPI_VCOUNT	/;"	d	file:
EPPI_VDELAY	board/bf548-ezkit/video.c	/^#define EPPI_VDELAY	/;"	d	file:
EPPI_VDELAY	board/cm-bf548/video.c	/^#define EPPI_VDELAY	/;"	d	file:
EPRD_BYTECOUNT_MASK	drivers/block/sata_mv.c	/^#define EPRD_BYTECOUNT_MASK	/;"	d	file:
EPRD_EOT	drivers/block/sata_mv.c	/^#define EPRD_EOT	/;"	d	file:
EPRD_PHYADDR_MASK	drivers/block/sata_mv.c	/^#define EPRD_PHYADDR_MASK	/;"	d	file:
EPROBE_DEFER	include/linux/errno.h	/^#define EPROBE_DEFER	/;"	d
EPROTO	include/linux/errno.h	/^#define	EPROTO	/;"	d
EPROTONOSUPPORT	include/linux/errno.h	/^#define	EPROTONOSUPPORT	/;"	d
EPROTOTYPE	include/linux/errno.h	/^#define	EPROTOTYPE	/;"	d
EPS	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define EPS	/;"	d
EPS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define EPS	/;"	d
EPSMCR0	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPSMCR0	/;"	d
EPSMCR15	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPSMCR15	/;"	d
EPSMCR_STRIDE	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPSMCR_STRIDE	/;"	d
EPSTL	arch/sh/include/asm/cpu_sh7722.h	/^#define EPSTL /;"	d
EPSZ0O	arch/sh/include/asm/cpu_sh7722.h	/^#define EPSZ0O /;"	d
EPSZ3	arch/sh/include/asm/cpu_sh7722.h	/^#define EPSZ3 /;"	d
EPSZ6	arch/sh/include/asm/cpu_sh7722.h	/^#define EPSZ6 /;"	d
EPSZ9	arch/sh/include/asm/cpu_sh7722.h	/^#define EPSZ9 /;"	d
EPS_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define EPS_P	/;"	d
EPT_RX	drivers/usb/gadget/ci_udc.h	/^#define EPT_RX(/;"	d
EPT_TX	drivers/usb/gadget/ci_udc.h	/^#define EPT_TX(/;"	d
EPU_BLOCK_OFFSET	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPU_BLOCK_OFFSET	/;"	d
EPU_EPCCR5	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define EPU_EPCCR5	/;"	d
EPU_EPCMPR5	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define EPU_EPCMPR5	/;"	d
EPU_EPCTR5	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define EPU_EPCTR5	/;"	d
EPU_EPECR5	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define EPU_EPECR5	/;"	d
EPU_EPGCR	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define EPU_EPGCR	/;"	d
EPU_EPSMCR5	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define EPU_EPSMCR5	/;"	d
EPWM_CLK_EN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define EPWM_CLK_EN	/;"	d
EPWM_CLK_STOP_REQ	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define EPWM_CLK_STOP_REQ	/;"	d
EPXP_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define EPXP_IPS_BASE_ADDR /;"	d
EPXTRIGCR	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define EPXTRIGCR	/;"	d
EP_ATTACHED	include/usb/mpc8xx_udc.h	/^#define EP_ATTACHED	/;"	d
EP_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EP_BASE_ADDRESS	/;"	d
EP_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define EP_BASE_SIZE	/;"	d
EP_BUFFER_SIZE	drivers/usb/gadget/f_fastboot.c	/^#define EP_BUFFER_SIZE	/;"	d	file:
EP_CTX_CYCLE_MASK	drivers/usb/host/xhci.h	/^#define EP_CTX_CYCLE_MASK	/;"	d
EP_FIFO_SIZE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define EP_FIFO_SIZE	/;"	d
EP_FIFO_SIZE2	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define EP_FIFO_SIZE2	/;"	d
EP_GETTING_NO_STREAMS	drivers/usb/host/xhci.h	/^#define EP_GETTING_NO_STREAMS	/;"	d
EP_GETTING_STREAMS	drivers/usb/host/xhci.h	/^#define EP_GETTING_STREAMS	/;"	d
EP_HALTED	drivers/usb/host/xhci.h	/^#define EP_HALTED	/;"	d
EP_HALT_PENDING	drivers/usb/host/xhci.h	/^#define EP_HALT_PENDING	/;"	d
EP_HAS_LSA	drivers/usb/host/xhci.h	/^#define	EP_HAS_LSA	/;"	d
EP_HAS_STREAMS	drivers/usb/host/xhci.h	/^#define EP_HAS_STREAMS	/;"	d
EP_ID_FOR_TRB	drivers/usb/host/xhci.h	/^#define	EP_ID_FOR_TRB(/;"	d
EP_INTERVAL	drivers/usb/host/xhci.h	/^#define EP_INTERVAL(/;"	d
EP_INTERVAL_TO_UFRAMES	drivers/usb/host/xhci.h	/^#define EP_INTERVAL_TO_UFRAMES(/;"	d
EP_INTR_MASK_CLEAR_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_MASK_CLEAR_REG	/;"	d	file:
EP_INTR_MASK_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_MASK_REG	/;"	d	file:
EP_INTR_MASK_SET_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_MASK_SET_REG	/;"	d	file:
EP_INTR_SRC_CLEAR_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_SRC_CLEAR_REG	/;"	d	file:
EP_INTR_SRC_MASKED_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_SRC_MASKED_REG	/;"	d	file:
EP_INTR_SRC_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_SRC_REG	/;"	d	file:
EP_INTR_SRC_SET_REG	drivers/usb/musb-new/am35x.c	/^#define EP_INTR_SRC_SET_REG	/;"	d	file:
EP_MASK	drivers/usb/gadget/dwc2_udc_otg.c	/^#define EP_MASK	/;"	d	file:
EP_MAXPSTREAMS	drivers/usb/host/xhci.h	/^#define EP_MAXPSTREAMS(/;"	d
EP_MAXPSTREAMS_MASK	drivers/usb/host/xhci.h	/^#define EP_MAXPSTREAMS_MASK	/;"	d
EP_MAX_LENGTH_TRANSFER	drivers/usb/gadget/ci_udc.c	/^#define EP_MAX_LENGTH_TRANSFER	/;"	d	file:
EP_MAX_PACKET_SIZE	include/usb/ci_udc.h	/^#define EP_MAX_PACKET_SIZE	/;"	d
EP_MAX_PACKET_SIZE	include/usb/udc.h	/^#define EP_MAX_PACKET_SIZE	/;"	d
EP_MAX_PKT	include/usb/mpc8xx_udc.h	/^#define EP_MAX_PKT	/;"	d
EP_MIN_PACKET_SIZE	include/usb/mpc8xx_udc.h	/^#define EP_MIN_PACKET_SIZE /;"	d
EP_MISS_CNT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define EP_MISS_CNT(/;"	d
EP_MULT	drivers/usb/host/xhci.h	/^#define EP_MULT(/;"	d
EP_SEND_ZLP	include/usb/mpc8xx_udc.h	/^#define EP_SEND_ZLP	/;"	d
EP_STATE_DISABLED	drivers/usb/host/xhci.h	/^#define EP_STATE_DISABLED	/;"	d
EP_STATE_ERROR	drivers/usb/host/xhci.h	/^#define EP_STATE_ERROR	/;"	d
EP_STATE_HALTED	drivers/usb/host/xhci.h	/^#define EP_STATE_HALTED	/;"	d
EP_STATE_MASK	drivers/usb/host/xhci.h	/^#define EP_STATE_MASK	/;"	d
EP_STATE_RUNNING	drivers/usb/host/xhci.h	/^#define EP_STATE_RUNNING	/;"	d
EP_STATE_STOPPED	drivers/usb/host/xhci.h	/^#define EP_STATE_STOPPED	/;"	d
EP_TYPE	drivers/usb/host/xhci.h	/^#define EP_TYPE(/;"	d
EP_TYPE_SHIFT	drivers/usb/host/xhci.h	/^#define EP_TYPE_SHIFT	/;"	d
EQ	cmd/itest.c	/^#define EQ	/;"	d	file:
EQAR_IDX	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define EQAR_IDX(/;"	d	file:
EQAR_SUCCESS	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define EQAR_SUCCESS(/;"	d	file:
EQAR_VB	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define EQAR_VB(/;"	d	file:
EQOS_AUTO_CAL_CONFIG_ENABLE	drivers/net/dwc_eth_qos.c	/^#define EQOS_AUTO_CAL_CONFIG_ENABLE	/;"	d	file:
EQOS_AUTO_CAL_CONFIG_START	drivers/net/dwc_eth_qos.c	/^#define EQOS_AUTO_CAL_CONFIG_START	/;"	d	file:
EQOS_AUTO_CAL_STATUS_ACTIVE	drivers/net/dwc_eth_qos.c	/^#define EQOS_AUTO_CAL_STATUS_ACTIVE	/;"	d	file:
EQOS_BUFFER_ALIGN	drivers/net/dwc_eth_qos.c	/^#define EQOS_BUFFER_ALIGN	/;"	d	file:
EQOS_DESC3_BUF1V	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESC3_BUF1V	/;"	d	file:
EQOS_DESC3_FD	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESC3_FD	/;"	d	file:
EQOS_DESC3_LD	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESC3_LD	/;"	d	file:
EQOS_DESC3_OWN	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESC3_OWN	/;"	d	file:
EQOS_DESCRIPTORS_NUM	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTORS_NUM	/;"	d	file:
EQOS_DESCRIPTORS_RX	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTORS_RX	/;"	d	file:
EQOS_DESCRIPTORS_SIZE	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTORS_SIZE	/;"	d	file:
EQOS_DESCRIPTORS_TX	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTORS_TX	/;"	d	file:
EQOS_DESCRIPTOR_ALIGN	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTOR_ALIGN	/;"	d	file:
EQOS_DESCRIPTOR_SIZE	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTOR_SIZE	/;"	d	file:
EQOS_DESCRIPTOR_WORDS	drivers/net/dwc_eth_qos.c	/^#define EQOS_DESCRIPTOR_WORDS	/;"	d	file:
EQOS_DMA_CH0_CONTROL_PBLX8	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_CONTROL_PBLX8	/;"	d	file:
EQOS_DMA_CH0_RX_CONTROL_RBSZ_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_RX_CONTROL_RBSZ_MASK	/;"	d	file:
EQOS_DMA_CH0_RX_CONTROL_RBSZ_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_RX_CONTROL_RBSZ_SHIFT	/;"	d	file:
EQOS_DMA_CH0_RX_CONTROL_RXPBL_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_RX_CONTROL_RXPBL_MASK	/;"	d	file:
EQOS_DMA_CH0_RX_CONTROL_RXPBL_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_RX_CONTROL_RXPBL_SHIFT	/;"	d	file:
EQOS_DMA_CH0_RX_CONTROL_SR	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_RX_CONTROL_SR	/;"	d	file:
EQOS_DMA_CH0_TX_CONTROL_OSP	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_TX_CONTROL_OSP	/;"	d	file:
EQOS_DMA_CH0_TX_CONTROL_ST	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_TX_CONTROL_ST	/;"	d	file:
EQOS_DMA_CH0_TX_CONTROL_TXPBL_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_TX_CONTROL_TXPBL_MASK	/;"	d	file:
EQOS_DMA_CH0_TX_CONTROL_TXPBL_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_CH0_TX_CONTROL_TXPBL_SHIFT	/;"	d	file:
EQOS_DMA_MODE_SWR	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_MODE_SWR	/;"	d	file:
EQOS_DMA_REGS_BASE	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_REGS_BASE /;"	d	file:
EQOS_DMA_SYSBUS_MODE_BLEN16	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_SYSBUS_MODE_BLEN16	/;"	d	file:
EQOS_DMA_SYSBUS_MODE_BLEN4	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_SYSBUS_MODE_BLEN4	/;"	d	file:
EQOS_DMA_SYSBUS_MODE_BLEN8	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_SYSBUS_MODE_BLEN8	/;"	d	file:
EQOS_DMA_SYSBUS_MODE_EAME	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_SYSBUS_MODE_EAME	/;"	d	file:
EQOS_DMA_SYSBUS_MODE_RD_OSR_LMT_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_SYSBUS_MODE_RD_OSR_LMT_MASK	/;"	d	file:
EQOS_DMA_SYSBUS_MODE_RD_OSR_LMT_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_DMA_SYSBUS_MODE_RD_OSR_LMT_SHIFT	/;"	d	file:
EQOS_MAC_CONFIGURATION_ACS	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_ACS	/;"	d	file:
EQOS_MAC_CONFIGURATION_CST	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_CST	/;"	d	file:
EQOS_MAC_CONFIGURATION_DM	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_DM	/;"	d	file:
EQOS_MAC_CONFIGURATION_FES	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_FES	/;"	d	file:
EQOS_MAC_CONFIGURATION_GPSLCE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_GPSLCE	/;"	d	file:
EQOS_MAC_CONFIGURATION_JD	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_JD	/;"	d	file:
EQOS_MAC_CONFIGURATION_JE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_JE	/;"	d	file:
EQOS_MAC_CONFIGURATION_PS	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_PS	/;"	d	file:
EQOS_MAC_CONFIGURATION_RE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_RE	/;"	d	file:
EQOS_MAC_CONFIGURATION_TE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_TE	/;"	d	file:
EQOS_MAC_CONFIGURATION_WD	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_CONFIGURATION_WD	/;"	d	file:
EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK	/;"	d	file:
EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT	/;"	d	file:
EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_MASK	/;"	d	file:
EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_C45E	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_C45E	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_CR_20_35	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_CR_20_35	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_CR_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_GB	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_GB	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_GOC_READ	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_GOC_READ	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_GOC_WRITE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_GOC_WRITE	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_PA_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT	/;"	d	file:
EQOS_MAC_MDIO_ADDRESS_SKAP	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_ADDRESS_SKAP	/;"	d	file:
EQOS_MAC_MDIO_DATA_GD_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_MDIO_DATA_GD_MASK	/;"	d	file:
EQOS_MAC_Q0_TX_FLOW_CTRL_PT_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_Q0_TX_FLOW_CTRL_PT_MASK	/;"	d	file:
EQOS_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT	/;"	d	file:
EQOS_MAC_Q0_TX_FLOW_CTRL_TFE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_Q0_TX_FLOW_CTRL_TFE	/;"	d	file:
EQOS_MAC_REGS_BASE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_REGS_BASE /;"	d	file:
EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB	/;"	d	file:
EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK	/;"	d	file:
EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED	/;"	d	file:
EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT	/;"	d	file:
EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK	/;"	d	file:
EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT	/;"	d	file:
EQOS_MAC_RX_FLOW_CTRL_RFE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_RX_FLOW_CTRL_RFE	/;"	d	file:
EQOS_MAC_TXQ_PRTY_MAP0_PSTQ0_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_TXQ_PRTY_MAP0_PSTQ0_MASK	/;"	d	file:
EQOS_MAC_TXQ_PRTY_MAP0_PSTQ0_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAC_TXQ_PRTY_MAP0_PSTQ0_SHIFT	/;"	d	file:
EQOS_MAX_PACKET_SIZE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MAX_PACKET_SIZE	/;"	d	file:
EQOS_MTL_REGS_BASE	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_REGS_BASE /;"	d	file:
EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK	/;"	d	file:
EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT	/;"	d	file:
EQOS_MTL_RXQ0_DEBUG_RXQSTS_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_DEBUG_RXQSTS_MASK	/;"	d	file:
EQOS_MTL_RXQ0_DEBUG_RXQSTS_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_DEBUG_RXQSTS_SHIFT	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_EHFC	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RFA_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_SHIFT	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RFD_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RFD_MASK	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RFD_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RFD_SHIFT	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RQS_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RQS_MASK	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RQS_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RQS_SHIFT	/;"	d	file:
EQOS_MTL_RXQ0_OPERATION_MODE_RSF	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_RXQ0_OPERATION_MODE_RSF	/;"	d	file:
EQOS_MTL_TXQ0_DEBUG_TRCSTS_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_DEBUG_TRCSTS_MASK	/;"	d	file:
EQOS_MTL_TXQ0_DEBUG_TRCSTS_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_DEBUG_TRCSTS_SHIFT	/;"	d	file:
EQOS_MTL_TXQ0_DEBUG_TXQSTS	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_DEBUG_TXQSTS	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_FTQ	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_FTQ	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_TQS_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_TQS_MASK	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_TQS_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_TQS_SHIFT	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_TSF	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_TSF	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_TXQEN_ENABLED	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_TXQEN_ENABLED	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_TXQEN_MASK	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_TXQEN_MASK	/;"	d	file:
EQOS_MTL_TXQ0_OPERATION_MODE_TXQEN_SHIFT	drivers/net/dwc_eth_qos.c	/^#define EQOS_MTL_TXQ0_OPERATION_MODE_TXQEN_SHIFT	/;"	d	file:
EQOS_RX_BUFFER_SIZE	drivers/net/dwc_eth_qos.c	/^#define EQOS_RX_BUFFER_SIZE	/;"	d	file:
EQOS_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD	drivers/net/dwc_eth_qos.c	/^#define EQOS_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD	/;"	d	file:
EQOS_TEGRA186_REGS_BASE	drivers/net/dwc_eth_qos.c	/^#define EQOS_TEGRA186_REGS_BASE /;"	d	file:
EQUAL	lib/zlib/deflate.c	/^#define EQUAL /;"	d	file:
EQUAL	tools/buildman/kconfiglib.py	/^AND, OR, NOT, EQUAL, UNEQUAL = range(5)$/;"	v
ERANGE	fs/yaffs2/yportenv.h	/^#define ERANGE /;"	d
ERANGE	include/linux/errno.h	/^#define	ERANGE	/;"	d
ERASEINFO	drivers/mtd/jedec_flash.c	/^#define ERASEINFO(/;"	d	file:
ERASE_ALL	board/bf533-ezkit/flash-defines.h	/^#define ERASE_ALL	/;"	d
ERASE_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define ERASE_CMD_CODE	/;"	d	file:
ERASE_SECT	board/bf533-ezkit/flash-defines.h	/^#define ERASE_SECT	/;"	d
ERASE_TO_EOL	common/cli_readline.c	/^#define ERASE_TO_EOL(/;"	d	file:
ERASE_WAIT_CNT	drivers/mtd/nand/denali.h	/^#define ERASE_WAIT_CNT	/;"	d
ERASE_WAIT_CNT__VALUE	drivers/mtd/nand/denali.h	/^#define     ERASE_WAIT_CNT__VALUE	/;"	d
ERASE_WAIT_COUNT	drivers/mtd/nand/denali.h	/^#define ERASE_WAIT_COUNT /;"	d
ERBFI	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ERBFI	/;"	d
ERBFI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ERBFI	/;"	d
ERBFI_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ERBFI_P	/;"	d
ERCV_RCV_DISCRD	drivers/net/smc91111.h	/^#define ERCV_RCV_DISCRD	/;"	d
ERCV_REG	drivers/net/smc91111.h	/^#define	ERCV_REG	/;"	d
ERCV_THRESHOLD	drivers/net/smc91111.h	/^#define ERCV_THRESHOLD	/;"	d
ERECALLCONFLICT	include/linux/errno.h	/^#define ERECALLCONFLICT	/;"	d
EREMCHG	include/linux/errno.h	/^#define	EREMCHG	/;"	d
EREMOTE	include/linux/errno.h	/^#define	EREMOTE	/;"	d
EREMOTEIO	include/linux/errno.h	/^#define	EREMOTEIO	/;"	d
ERESTART	include/linux/errno.h	/^#define	ERESTART	/;"	d
ERESTARTNOHAND	include/linux/errno.h	/^#define ERESTARTNOHAND	/;"	d
ERESTARTNOINTR	include/linux/errno.h	/^#define ERESTARTNOINTR	/;"	d
ERESTARTSYS	include/linux/errno.h	/^#define ERESTARTSYS	/;"	d
ERESTART_RESTARTBLOCK	include/linux/errno.h	/^#define ERESTART_RESTARTBLOCK /;"	d
ERF1	include/linux/mtd/st_smi.h	/^#define ERF1	/;"	d
ERF2	include/linux/mtd/st_smi.h	/^#define ERF2	/;"	d
ERFCI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ERFCI	/;"	d
ERFKILL	include/linux/errno.h	/^#define ERFKILL	/;"	d
ERL	include/sym53c8xx.h	/^	#define   ERL /;"	d
ERMP	include/sym53c8xx.h	/^	#define   ERMP /;"	d
ERM_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define ERM_BASE_ADDR	/;"	d
EROFS	fs/yaffs2/yportenv.h	/^#define EROFS	/;"	d
EROFS	include/linux/errno.h	/^#define	EROFS	/;"	d
ERR	board/cobra5272/flash.c	/^#define ERR /;"	d	file:
ERR	drivers/usb/gadget/at91_udc.h	/^#define ERR(/;"	d
ERR	drivers/usb/gadget/mpc8xx_udc.c	/^#define ERR(/;"	d	file:
ERR	drivers/usb/host/isp116x.h	/^#define ERR(/;"	d
ERR	drivers/usb/musb-new/musb_debug.h	/^#define ERR(/;"	d
ERRDISPLAYTOOSMALL	scripts/kconfig/lxdialog/dialog.h	/^#define ERRDISPLAYTOOSMALL /;"	d
ERRI_MASK	arch/arm/include/asm/omap_mmc.h	/^#define ERRI_MASK	/;"	d
ERRNO_MSG	lib/errno_str.c	/^#define ERRNO_MSG(/;"	d	file:
ERRNO_STR	lib/Kconfig	/^config ERRNO_STR$/;"	c	menu:Library routines
ERROR	drivers/usb/gadget/storage_common.c	/^#define ERROR(/;"	d	file:
ERROR	include/dataflash.h	/^#define ERROR	/;"	d
ERROR	scripts/checkpatch.pl	/^sub ERROR {$/;"	s
ERROR	tools/patman/tout.py	/^ERROR = 0$/;"	v
ERROR_COUNT	drivers/usb/host/xhci.h	/^#define ERROR_COUNT(/;"	d
ERROR_COUNT_MASK	drivers/usb/host/xhci.h	/^#define ERROR_COUNT_MASK	/;"	d
ERROR_COUNT_SHIFT	drivers/usb/host/xhci.h	/^#define ERROR_COUNT_SHIFT	/;"	d
ERROR_ESBC_CLIENT_BAD_ADDRESS	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_BAD_ADDRESS	/;"	d
ERROR_ESBC_CLIENT_CPUID_NO_MATCH	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_CPUID_NO_MATCH	/;"	d
ERROR_ESBC_CLIENT_HASH_COMPARE_EM	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HASH_COMPARE_EM	/;"	d
ERROR_ESBC_CLIENT_HASH_COMPARE_KEY	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HASH_COMPARE_KEY	/;"	d
ERROR_ESBC_CLIENT_HDR_LOC	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HDR_LOC	/;"	d
ERROR_ESBC_CLIENT_HEADER_BARKER	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_BARKER	/;"	d
ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED	/;"	d
ERROR_ESBC_CLIENT_HEADER_IMG_SIZE	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_IMG_SIZE	/;"	d
ERROR_ESBC_CLIENT_HEADER_INVALID_IE_KEY_NUM	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_INVALID_IE_KEY_NUM	/;"	d
ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY	/;"	d
ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM	/;"	d
ERROR_ESBC_CLIENT_HEADER_INVALID_SRK_NUM_ENTRY	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_INVALID_SRK_NUM_ENTRY	/;"	d
ERROR_ESBC_CLIENT_HEADER_INV_IE_ENTRY_KEYLEN	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_INV_IE_ENTRY_KEYLEN	/;"	d
ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN	/;"	d
ERROR_ESBC_CLIENT_HEADER_KEY_LEN	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_KEY_LEN	/;"	d
ERROR_ESBC_CLIENT_HEADER_KEY_LEN_NOT_TWICE_SIG_LEN	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_KEY_LEN_NOT_TWICE_SIG_LEN	/;"	d
ERROR_ESBC_CLIENT_HEADER_KEY_MOD_1	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_KEY_MOD_1	/;"	d
ERROR_ESBC_CLIENT_HEADER_KEY_MOD_2	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_KEY_MOD_2	/;"	d
ERROR_ESBC_CLIENT_HEADER_KEY_REVOKED	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_KEY_REVOKED	/;"	d
ERROR_ESBC_CLIENT_HEADER_SG	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_SG	/;"	d
ERROR_ESBC_CLIENT_HEADER_SG_ENTIRES_BAD	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_SG_ENTIRES_BAD	/;"	d
ERROR_ESBC_CLIENT_HEADER_SG_ESBC_EP	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_SG_ESBC_EP	/;"	d
ERROR_ESBC_CLIENT_HEADER_SIG_KEY_MOD	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_SIG_KEY_MOD	/;"	d
ERROR_ESBC_CLIENT_HEADER_SIG_LEN	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_HEADER_SIG_LEN	/;"	d
ERROR_ESBC_CLIENT_MAX	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_MAX	/;"	d
ERROR_ESBC_CLIENT_MISC	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_MISC	/;"	d
ERROR_ESBC_CLIENT_SSM_TRUSTSTS	include/fsl_secboot_err.h	/^#define ERROR_ESBC_CLIENT_SSM_TRUSTSTS	/;"	d
ERROR_ESBC_MISSING_BOOTM	include/fsl_secboot_err.h	/^#define ERROR_ESBC_MISSING_BOOTM	/;"	d
ERROR_ESBC_PAMU_INIT	include/fsl_secboot_err.h	/^#define ERROR_ESBC_PAMU_INIT	/;"	d
ERROR_ESBC_SEC_DEQ	include/fsl_secboot_err.h	/^#define ERROR_ESBC_SEC_DEQ	/;"	d
ERROR_ESBC_SEC_DEQ_TO	include/fsl_secboot_err.h	/^#define ERROR_ESBC_SEC_DEQ_TO	/;"	d
ERROR_ESBC_SEC_ENQ	include/fsl_secboot_err.h	/^#define ERROR_ESBC_SEC_ENQ	/;"	d
ERROR_ESBC_SEC_INIT	include/fsl_secboot_err.h	/^#define ERROR_ESBC_SEC_INIT	/;"	d
ERROR_ESBC_SEC_JOBQ_STATUS	include/fsl_secboot_err.h	/^#define ERROR_ESBC_SEC_JOBQ_STATUS	/;"	d
ERROR_ESBC_SEC_RESET	include/fsl_secboot_err.h	/^#define ERROR_ESBC_SEC_RESET	/;"	d
ERROR_ESBC_WRONG_CMD	include/fsl_secboot_err.h	/^#define ERROR_ESBC_WRONG_CMD	/;"	d
ERROR_FPGA_PRG_DONE	board/esd/common/fpga.c	/^#define ERROR_FPGA_PRG_DONE /;"	d	file:
ERROR_FPGA_PRG_INIT_HIGH	board/esd/common/fpga.c	/^#define ERROR_FPGA_PRG_INIT_HIGH /;"	d	file:
ERROR_FPGA_PRG_INIT_LOW	board/esd/common/fpga.c	/^#define ERROR_FPGA_PRG_INIT_LOW /;"	d	file:
ERROR_H	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ERROR_H	/;"	d
ERROR_I2C_LENGTH	arch/powerpc/cpu/mpc8260/i2c.c	/^#define ERROR_I2C_LENGTH	/;"	d	file:
ERROR_I2C_NONE	arch/powerpc/cpu/mpc8260/i2c.c	/^#define ERROR_I2C_NONE	/;"	d	file:
ERROR_IE_TABLE_NOT_FOUND	include/fsl_secboot_err.h	/^#define ERROR_IE_TABLE_NOT_FOUND	/;"	d
ERROR_IN_PAGE_ALLOC	include/fsl_sec.h	/^#define ERROR_IN_PAGE_ALLOC	/;"	d
ERROR_KEY_TABLE_NOT_FOUND	include/fsl_secboot_err.h	/^#define ERROR_KEY_TABLE_NOT_FOUND	/;"	d
ERROR_RH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ERROR_RH	/;"	d
ERROR_STR_LENGTH	board/amcc/yucca/yucca.h	/^#define ERROR_STR_LENGTH	/;"	d
ERROR_TH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ERROR_TH	/;"	d
ERR_ABORTED	include/flash.h	/^#define ERR_ABORTED	/;"	d
ERR_ADDR_CYCLE	drivers/mtd/nand/arasan_nfc.c	/^#define ERR_ADDR_CYCLE	/;"	d	file:
ERR_ALIGN	include/dataflash.h	/^# define ERR_ALIGN	/;"	d
ERR_ALIGN	include/flash.h	/^#define ERR_ALIGN	/;"	d
ERR_BAD_ARGUMENT	include/reiserfs.h	/^  ERR_BAD_ARGUMENT,$/;"	e	enum:__anoncca62f110103
ERR_BAD_FILENAME	include/reiserfs.h	/^  ERR_BAD_FILENAME,$/;"	e	enum:__anoncca62f110103
ERR_BAD_FILETYPE	include/reiserfs.h	/^  ERR_BAD_FILETYPE,$/;"	e	enum:__anoncca62f110103
ERR_BAD_GZIP_DATA	include/reiserfs.h	/^  ERR_BAD_GZIP_DATA,$/;"	e	enum:__anoncca62f110103
ERR_BAD_GZIP_HEADER	include/reiserfs.h	/^  ERR_BAD_GZIP_HEADER,$/;"	e	enum:__anoncca62f110103
ERR_BAD_NUMBER	board/v38b/ethaddr.c	/^#define ERR_BAD_NUMBER	/;"	d	file:
ERR_BAD_PART_TABLE	include/reiserfs.h	/^  ERR_BAD_PART_TABLE,$/;"	e	enum:__anoncca62f110103
ERR_BAD_REGS	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_BAD_REGS,$/;"	e	enum:__anonce191d930103	file:
ERR_BAD_VERSION	include/reiserfs.h	/^  ERR_BAD_VERSION,$/;"	e	enum:__anoncca62f110103
ERR_BBERR	drivers/mtd/nand/pxa3xx_nand.c	/^	ERR_BBERR	= -4,$/;"	e	enum:__anon8b22f9f40103	file:
ERR_BELOW_1MB	include/reiserfs.h	/^  ERR_BELOW_1MB,$/;"	e	enum:__anoncca62f110103
ERR_BLOCK_ADDR	drivers/mtd/nand/denali.h	/^#define ERR_BLOCK_ADDR(/;"	d
ERR_BOOT_COMMAND	include/reiserfs.h	/^  ERR_BOOT_COMMAND,$/;"	e	enum:__anoncca62f110103
ERR_BOOT_FAILURE	include/reiserfs.h	/^  ERR_BOOT_FAILURE,$/;"	e	enum:__anoncca62f110103
ERR_BOOT_FEATURES	include/reiserfs.h	/^  ERR_BOOT_FEATURES,$/;"	e	enum:__anoncca62f110103
ERR_BYTE	drivers/mtd/nand/fsl_elbc_nand.c	/^#define ERR_BYTE /;"	d	file:
ERR_BYTE	drivers/mtd/nand/fsl_ifc_nand.c	/^#define ERR_BYTE	/;"	d	file:
ERR_CALIBRATE_IODELAY	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ERR_CALIBRATE_IODELAY	/;"	d
ERR_CAST	include/linux/err.h	/^static inline void * __must_check ERR_CAST(__force const void *ptr)$/;"	f	typeref:typename:void * __must_check
ERR_CORERR	drivers/mtd/nand/pxa3xx_nand.c	/^	ERR_CORERR	= -5,$/;"	e	enum:__anon8b22f9f40103	file:
ERR_CORRECTION_INFO	drivers/mtd/nand/denali.h	/^#define ERR_CORRECTION_INFO	/;"	d
ERR_CORRECTION_INFO__BYTEMASK	drivers/mtd/nand/denali.h	/^#define     ERR_CORRECTION_INFO__BYTEMASK	/;"	d
ERR_CORRECTION_INFO__DEVICE_NR	drivers/mtd/nand/denali.h	/^#define     ERR_CORRECTION_INFO__DEVICE_NR	/;"	d
ERR_CORRECTION_INFO__ERROR_TYPE	drivers/mtd/nand/denali.h	/^#define     ERR_CORRECTION_INFO__ERROR_TYPE	/;"	d
ERR_CORRECTION_INFO__LAST_ERR_INFO	drivers/mtd/nand/denali.h	/^#define     ERR_CORRECTION_INFO__LAST_ERR_INFO	/;"	d
ERR_CORR_EN	drivers/ddr/microchip/ddr2_regs.h	/^#define ERR_CORR_EN(/;"	d
ERR_CPDE	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ERR_CPDE	/;"	d
ERR_DEISOLATE_IO	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ERR_DEISOLATE_IO	/;"	d
ERR_DET	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define ERR_DET /;"	d
ERR_DET	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define ERR_DET	/;"	d
ERR_DEV_FORMAT	include/reiserfs.h	/^  ERR_DEV_FORMAT,$/;"	e	enum:__anoncca62f110103
ERR_DEV_NEED_INIT	include/reiserfs.h	/^  ERR_DEV_NEED_INIT,$/;"	e	enum:__anoncca62f110103
ERR_DEV_VALUES	include/reiserfs.h	/^  ERR_DEV_VALUES,$/;"	e	enum:__anoncca62f110103
ERR_DMABUSERR	drivers/mtd/nand/pxa3xx_nand.c	/^	ERR_DMABUSERR	= -1,$/;"	e	enum:__anon8b22f9f40103	file:
ERR_EXEC_FORMAT	include/reiserfs.h	/^  ERR_EXEC_FORMAT,$/;"	e	enum:__anoncca62f110103
ERR_FILELENGTH	include/reiserfs.h	/^  ERR_FILELENGTH,$/;"	e	enum:__anoncca62f110103
ERR_FILE_NOT_FOUND	include/reiserfs.h	/^  ERR_FILE_NOT_FOUND,$/;"	e	enum:__anoncca62f110103
ERR_FPDE	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ERR_FPDE	/;"	d
ERR_FREQ_NOT_FOUND	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_FREQ_NOT_FOUND,$/;"	e	enum:__anonce191d930103	file:
ERR_FSYS_CORRUPT	include/reiserfs.h	/^  ERR_FSYS_CORRUPT,$/;"	e	enum:__anoncca62f110103
ERR_FSYS_MOUNT	include/reiserfs.h	/^  ERR_FSYS_MOUNT,$/;"	e	enum:__anoncca62f110103
ERR_GEOM	include/reiserfs.h	/^  ERR_GEOM,$/;"	e	enum:__anoncca62f110103
ERR_INVAL	include/dataflash.h	/^# define ERR_INVAL	/;"	d
ERR_INVAL	include/flash.h	/^#define ERR_INVAL	/;"	d
ERR_ISOLATE_IO	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ERR_ISOLATE_IO	/;"	d
ERR_MSG	lib/zlib/zutil.h	/^#define ERR_MSG(/;"	d
ERR_NCOR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define ERR_NCOR /;"	d
ERR_NCOR	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define ERR_NCOR	/;"	d
ERR_NEED_LX_KERNEL	include/reiserfs.h	/^  ERR_NEED_LX_KERNEL,$/;"	e	enum:__anoncca62f110103
ERR_NEED_MB_KERNEL	include/reiserfs.h	/^  ERR_NEED_MB_KERNEL,$/;"	e	enum:__anoncca62f110103
ERR_NONE	drivers/mtd/nand/pxa3xx_nand.c	/^	ERR_NONE	= 0,$/;"	e	enum:__anon8b22f9f40103	file:
ERR_NONE	include/reiserfs.h	/^  ERR_NONE = 0,$/;"	e	enum:__anoncca62f110103
ERR_NOT_ERASED	include/dataflash.h	/^# define ERR_NOT_ERASED	/;"	d
ERR_NOT_ERASED	include/flash.h	/^#define ERR_NOT_ERASED	/;"	d
ERR_NO_DISK	include/reiserfs.h	/^  ERR_NO_DISK,$/;"	e	enum:__anoncca62f110103
ERR_NO_DISK_SPACE	include/reiserfs.h	/^  ERR_NO_DISK_SPACE,$/;"	e	enum:__anoncca62f110103
ERR_NO_EMC_NODE	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_NO_EMC_NODE = -10,$/;"	e	enum:__anonce191d930103	file:
ERR_NO_EMC_REG	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_NO_EMC_REG,$/;"	e	enum:__anonce191d930103	file:
ERR_NO_FREQ	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_NO_FREQ,$/;"	e	enum:__anonce191d930103	file:
ERR_NO_NUMBER	board/v38b/ethaddr.c	/^#define ERR_NO_NUMBER	/;"	d	file:
ERR_NO_PART	include/reiserfs.h	/^  ERR_NO_PART,$/;"	e	enum:__anoncca62f110103
ERR_NO_RAM_CODE	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_NO_RAM_CODE,$/;"	e	enum:__anonce191d930103	file:
ERR_NUMBER_OVERFLOW	include/reiserfs.h	/^  ERR_NUMBER_OVERFLOW,$/;"	e	enum:__anoncca62f110103
ERR_NUMBER_PARSING	include/reiserfs.h	/^  ERR_NUMBER_PARSING,$/;"	e	enum:__anoncca62f110103
ERR_OK	include/dataflash.h	/^# define ERR_OK	/;"	d
ERR_OK	include/flash.h	/^#define ERR_OK	/;"	d
ERR_OPE	drivers/misc/fsl_iim.c	/^#define ERR_OPE	/;"	d	file:
ERR_OUTSIDE_PART	include/reiserfs.h	/^  ERR_OUTSIDE_PART,$/;"	e	enum:__anoncca62f110103
ERR_PAGE_ADDR	drivers/mtd/nand/denali.h	/^#define ERR_PAGE_ADDR(/;"	d
ERR_PARITYE	drivers/misc/fsl_iim.c	/^#define ERR_PARITYE	/;"	d	file:
ERR_PRGE	drivers/misc/fsl_iim.c	/^#define ERR_PRGE	/;"	d	file:
ERR_PRINTF	drivers/bios_emulator/include/x86emu/debug.h	/^# define ERR_PRINTF(/;"	d
ERR_PRINTF2	drivers/bios_emulator/include/x86emu/debug.h	/^# define ERR_PRINTF2(/;"	d
ERR_PRIVILEGED	include/reiserfs.h	/^  ERR_PRIVILEGED,$/;"	e	enum:__anoncca62f110103
ERR_PROG_ERROR	include/dataflash.h	/^# define ERR_PROG_ERROR	/;"	d
ERR_PROG_ERROR	include/flash.h	/^#define ERR_PROG_ERROR	/;"	d
ERR_PROTECTED	include/dataflash.h	/^# define ERR_PROTECTED	/;"	d
ERR_PROTECTED	include/flash.h	/^#define ERR_PROTECTED	/;"	d
ERR_PTR	include/linux/err.h	/^static inline void *ERR_PTR(long error)$/;"	f	typeref:typename:void *
ERR_RAM_CODE_NOT_FOUND	arch/arm/mach-tegra/tegra20/emc.c	/^	ERR_RAM_CODE_NOT_FOUND,$/;"	e	enum:__anonce191d930103	file:
ERR_READ	include/reiserfs.h	/^  ERR_READ,$/;"	e	enum:__anoncca62f110103
ERR_RETURN	lib/zlib/zutil.h	/^#define ERR_RETURN(/;"	d
ERR_RPE	drivers/misc/fsl_iim.c	/^#define ERR_RPE	/;"	d	file:
ERR_SENDCMD	drivers/mtd/nand/pxa3xx_nand.c	/^	ERR_SENDCMD	= -2,$/;"	e	enum:__anon8b22f9f40103	file:
ERR_SNSE	drivers/misc/fsl_iim.c	/^#define ERR_SNSE	/;"	d	file:
ERR_STS1_CMD_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ERR_STS1_CMD_ERROR	/;"	d
ERR_STS1_CRC_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ERR_STS1_CRC_ERROR	/;"	d
ERR_STS2_RES_STOP_TIMEOUT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ERR_STS2_RES_STOP_TIMEOUT	/;"	d
ERR_STS2_RES_TIMEOUT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ERR_STS2_RES_TIMEOUT	/;"	d
ERR_STS2_SYS_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define ERR_STS2_SYS_ERROR	/;"	d
ERR_SYMLINK_LOOP	include/reiserfs.h	/^  ERR_SYMLINK_LOOP,$/;"	e	enum:__anoncca62f110103
ERR_TIMOUT	include/dataflash.h	/^# define ERR_TIMOUT	/;"	d
ERR_TIMOUT	include/flash.h	/^#define ERR_TIMOUT	/;"	d
ERR_TYP	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define ERR_TYP	/;"	d
ERR_UNALIGNED	include/reiserfs.h	/^  ERR_UNALIGNED,$/;"	e	enum:__anoncca62f110103
ERR_UNCORERR	drivers/mtd/nand/pxa3xx_nand.c	/^	ERR_UNCORERR	= -3,$/;"	e	enum:__anon8b22f9f40103	file:
ERR_UNKNOWN_FLASH_TYPE	include/dataflash.h	/^# define ERR_UNKNOWN_FLASH_TYPE	/;"	d
ERR_UNKNOWN_FLASH_TYPE	include/flash.h	/^#define ERR_UNKNOWN_FLASH_TYPE	/;"	d
ERR_UNKNOWN_FLASH_VENDOR	include/dataflash.h	/^# define ERR_UNKNOWN_FLASH_VENDOR	/;"	d
ERR_UNKNOWN_FLASH_VENDOR	include/flash.h	/^#define ERR_UNKNOWN_FLASH_VENDOR	/;"	d
ERR_UNRECOGNIZED	include/reiserfs.h	/^  ERR_UNRECOGNIZED,$/;"	e	enum:__anoncca62f110103
ERR_UPDATE_DELAY	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ERR_UPDATE_DELAY	/;"	d
ERR_WLRE	drivers/misc/fsl_iim.c	/^#define ERR_WLRE	/;"	d	file:
ERR_WONT_FIT	include/reiserfs.h	/^  ERR_WONT_FIT,$/;"	e	enum:__anoncca62f110103
ERR_WPE	drivers/misc/fsl_iim.c	/^#define ERR_WPE	/;"	d	file:
ERR_WRITE	include/reiserfs.h	/^  ERR_WRITE,$/;"	e	enum:__anoncca62f110103
ERSR	drivers/net/rtl8169.c	/^	ERSR = 0x36,$/;"	e	enum:RTL8169_registers	file:
ERST_DESI_MASK	drivers/usb/host/xhci.h	/^#define ERST_DESI_MASK	/;"	d
ERST_EHB	drivers/usb/host/xhci.h	/^#define ERST_EHB	/;"	d
ERST_ENTRIES	drivers/usb/host/xhci.h	/^#define	ERST_ENTRIES	/;"	d
ERST_NUM_SEGS	drivers/usb/host/xhci.h	/^#define	ERST_NUM_SEGS	/;"	d
ERST_PTR_MASK	drivers/usb/host/xhci.h	/^#define ERST_PTR_MASK	/;"	d
ERST_SIZE	drivers/usb/host/xhci.h	/^#define	ERST_SIZE	/;"	d
ERST_SIZE_MASK	drivers/usb/host/xhci.h	/^#define	ERST_SIZE_MASK	/;"	d
ERS_CMP	include/linux/mtd/samsung_onenand.h	/^#define ERS_CMP /;"	d
ERS_FAIL	include/linux/mtd/samsung_onenand.h	/^#define ERS_FAIL /;"	d
ERXS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ERXS	/;"	d
ER_IRQ_CLEAR	drivers/usb/host/xhci.h	/^#define	ER_IRQ_CLEAR(/;"	d
ER_IRQ_COUNTER_MASK	drivers/usb/host/xhci.h	/^#define ER_IRQ_COUNTER_MASK	/;"	d
ER_IRQ_DISABLE	drivers/usb/host/xhci.h	/^#define	ER_IRQ_DISABLE(/;"	d
ER_IRQ_ENABLE	drivers/usb/host/xhci.h	/^#define	ER_IRQ_ENABLE(/;"	d
ER_IRQ_INTERVAL_MASK	drivers/usb/host/xhci.h	/^#define ER_IRQ_INTERVAL_MASK	/;"	d
ER_IRQ_PENDING	drivers/usb/host/xhci.h	/^#define	ER_IRQ_PENDING(/;"	d
ES	arch/x86/include/asm/ptrace.h	/^#define ES /;"	d
ES	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 CS, DS, SS, ES, FS, GS;$/;"	m	struct:i386_segment_regs	typeref:typename:u16
ES	include/i8042.h	/^#define ES	/;"	d
ESAI1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ESAI1_BASE_ADDR /;"	d
ESAI_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ESAI_BASE_ADDR	/;"	d
ESAI_FIFO_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ESAI_FIFO_BASE_ADDR	/;"	d
ESA_AHBSTAT	include/ambapp_ids.h	/^#define ESA_AHBSTAT /;"	d
ESA_AHBUART	include/ambapp_ids.h	/^#define ESA_AHBUART /;"	d
ESA_BOSCHCAN	include/ambapp_ids.h	/^#define ESA_BOSCHCAN /;"	d
ESA_CFG	include/ambapp_ids.h	/^#define ESA_CFG /;"	d
ESA_HURRICANE	include/ambapp_ids.h	/^#define ESA_HURRICANE /;"	d
ESA_IO	include/ambapp_ids.h	/^#define ESA_IO /;"	d
ESA_IRQ	include/ambapp_ids.h	/^#define ESA_IRQ /;"	d
ESA_IRQ2	include/ambapp_ids.h	/^#define ESA_IRQ2 /;"	d
ESA_LEON2	include/ambapp_ids.h	/^#define ESA_LEON2 /;"	d
ESA_LEON2APB	include/ambapp_ids.h	/^#define ESA_LEON2APB /;"	d
ESA_MCTRL	include/ambapp_ids.h	/^#define ESA_MCTRL /;"	d
ESA_PCIARB	include/ambapp_ids.h	/^#define ESA_PCIARB /;"	d
ESA_PDEC3AMBA	include/ambapp_ids.h	/^#define ESA_PDEC3AMBA /;"	d
ESA_PTME3AMBA	include/ambapp_ids.h	/^#define ESA_PTME3AMBA /;"	d
ESA_SPWA	include/ambapp_ids.h	/^#define ESA_SPWA /;"	d
ESA_SPW_RMAP	include/ambapp_ids.h	/^#define ESA_SPW_RMAP /;"	d
ESA_TIMER	include/ambapp_ids.h	/^#define ESA_TIMER /;"	d
ESA_UART	include/ambapp_ids.h	/^#define ESA_UART /;"	d
ESA_WPROT	include/ambapp_ids.h	/^#define ESA_WPROT /;"	d
ESA_WPROT2	include/ambapp_ids.h	/^#define ESA_WPROT2 /;"	d
ESA_devices	cmd/ambapp.c	/^static ambapp_device_name ESA_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
ESBC_BARKER_LEN	include/fsl_validate.h	/^#define ESBC_BARKER_LEN	/;"	d
ESBC_VALID_HDR	include/fsl_validate.h	/^#define ESBC_VALID_HDR	/;"	d
ESC	include/i8042.h	/^#define ESC	/;"	d
ESC	lib/efi_loader/efi_console.c	/^#define ESC /;"	d	file:
ESC_CONVERTED	common/cli_readline.c	/^			enum { ESC_REJECT, ESC_SAVE, ESC_CONVERTED } act = ESC_REJECT;$/;"	e	enum:cread_line::__anon2191d0290103	file:
ESC_KEY	board/BuR/brxre1/board.c	/^#define ESC_KEY	/;"	d	file:
ESC_REJECT	common/cli_readline.c	/^			enum { ESC_REJECT, ESC_SAVE, ESC_CONVERTED } act = ESC_REJECT;$/;"	e	enum:cread_line::__anon2191d0290103	file:
ESC_SAVE	common/cli_readline.c	/^			enum { ESC_REJECT, ESC_SAVE, ESC_CONVERTED } act = ESC_REJECT;$/;"	e	enum:cread_line::__anon2191d0290103	file:
ESD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ESD	/;"	d
ESDCFG0_MDDR_SETUP	include/configs/mx31pdk.h	/^#define ESDCFG0_MDDR_SETUP	/;"	d
ESDCFG_TCAS	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TCAS(/;"	d
ESDCFG_TCAS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TCAS(/;"	d
ESDCFG_TMRD	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TMRD(/;"	d
ESDCFG_TMRD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TMRD(/;"	d
ESDCFG_TRAS	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TRAS(/;"	d
ESDCFG_TRAS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TRAS(/;"	d
ESDCFG_TRC	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TRC(/;"	d
ESDCFG_TRC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TRC(/;"	d
ESDCFG_TRCD	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TRCD(/;"	d
ESDCFG_TRCD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TRCD(/;"	d
ESDCFG_TRP	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TRP(/;"	d
ESDCFG_TRP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TRP(/;"	d
ESDCFG_TRRD	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TRRD(/;"	d
ESDCFG_TRRD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TRRD(/;"	d
ESDCFG_TWR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TWR	/;"	d
ESDCFG_TWR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TWR	/;"	d
ESDCFG_TWTR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TWTR	/;"	d
ESDCFG_TWTR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TWTR	/;"	d
ESDCFG_TXP	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCFG_TXP(/;"	d
ESDCFG_TXP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCFG_TXP(/;"	d
ESDCTL_0x82228080	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_0x82228080	/;"	d	file:
ESDCTL_0x82228080	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_0x82228080	/;"	d
ESDCTL_0x92220000	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_0x92220000	/;"	d	file:
ESDCTL_0x92220000	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_0x92220000	/;"	d
ESDCTL_0xA2220000	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_0xA2220000	/;"	d	file:
ESDCTL_0xA2220000	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_0xA2220000	/;"	d
ESDCTL_0xB2220000	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_0xB2220000	/;"	d	file:
ESDCTL_0xB2220000	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_0xB2220000	/;"	d
ESDCTL_AUTOREFRESH	include/configs/mx31pdk.h	/^#define ESDCTL_AUTOREFRESH	/;"	d
ESDCTL_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_BASE_ADDR	/;"	d
ESDCTL_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ESDCTL_BASE_ADDR	/;"	d
ESDCTL_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ESDCTL_BASE_ADDR	/;"	d
ESDCTL_BL	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_BL	/;"	d
ESDCTL_BL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_BL	/;"	d
ESDCTL_BL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_BL(/;"	d
ESDCTL_CMD_AUTOREFRESH	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_CMD_AUTOREFRESH	/;"	d
ESDCTL_CMD_LOADMODEREG	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_CMD_LOADMODEREG	/;"	d
ESDCTL_CMD_MANUALREFRESH	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_CMD_MANUALREFRESH	/;"	d
ESDCTL_CMD_PRECHARGE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_CMD_PRECHARGE	/;"	d
ESDCTL_CMD_RW	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_CMD_RW	/;"	d
ESDCTL_COL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_COL(/;"	d
ESDCTL_COL10	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_COL10	/;"	d
ESDCTL_COL10	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_COL10	/;"	d
ESDCTL_COL8	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_COL8	/;"	d
ESDCTL_COL8	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_COL8	/;"	d
ESDCTL_COL9	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_COL9	/;"	d
ESDCTL_COL9	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_COL9	/;"	d
ESDCTL_COL_9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_COL_9	/;"	d
ESDCTL_DDR2_CONFIG	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_CONFIG	/;"	d	file:
ESDCTL_DDR2_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_CONFIG	/;"	d
ESDCTL_DDR2_CONFIG	board/woodburn/woodburn.c	/^#define ESDCTL_DDR2_CONFIG	/;"	d	file:
ESDCTL_DDR2_EMR2	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_DDR2_EMR2	/;"	d	file:
ESDCTL_DDR2_EMR2	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_EMR2	/;"	d	file:
ESDCTL_DDR2_EMR2	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_EMR2	/;"	d
ESDCTL_DDR2_EMR3	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_DDR2_EMR3	/;"	d	file:
ESDCTL_DDR2_EMR3	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_EMR3	/;"	d	file:
ESDCTL_DDR2_EMR3	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_EMR3	/;"	d
ESDCTL_DDR2_EN_DLL	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_DDR2_EN_DLL	/;"	d	file:
ESDCTL_DDR2_EN_DLL	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_EN_DLL	/;"	d	file:
ESDCTL_DDR2_EN_DLL	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_EN_DLL	/;"	d
ESDCTL_DDR2_MR	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_DDR2_MR	/;"	d	file:
ESDCTL_DDR2_MR	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_MR	/;"	d	file:
ESDCTL_DDR2_MR	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_MR	/;"	d
ESDCTL_DDR2_OCD_DEFAULT	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_DDR2_OCD_DEFAULT /;"	d	file:
ESDCTL_DDR2_OCD_DEFAULT	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_OCD_DEFAULT /;"	d	file:
ESDCTL_DDR2_OCD_DEFAULT	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_OCD_DEFAULT /;"	d
ESDCTL_DDR2_RESET_DLL	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_DDR2_RESET_DLL	/;"	d	file:
ESDCTL_DDR2_RESET_DLL	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DDR2_RESET_DLL	/;"	d	file:
ESDCTL_DDR2_RESET_DLL	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DDR2_RESET_DLL	/;"	d
ESDCTL_DELAY_LINE5	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_DELAY_LINE5	/;"	d	file:
ESDCTL_DELAY_LINE5	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_DELAY_LINE5	/;"	d
ESDCTL_DSIZ	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_DSIZ(/;"	d
ESDCTL_DSIZ_16_LOWER	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_DSIZ_16_LOWER	/;"	d
ESDCTL_DSIZ_16_LOWER	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_DSIZ_16_LOWER	/;"	d
ESDCTL_DSIZ_16_UPPER	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_DSIZ_16_UPPER	/;"	d
ESDCTL_DSIZ_16_UPPER	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_DSIZ_16_UPPER	/;"	d
ESDCTL_DSIZ_32	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_DSIZ_32	/;"	d
ESDCTL_DSIZ_32	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_DSIZ_32	/;"	d
ESDCTL_FP	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_FP	/;"	d
ESDCTL_FP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_FP	/;"	d
ESDCTL_FP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_FP(/;"	d
ESDCTL_LOADMODEREG	include/configs/mx31pdk.h	/^#define ESDCTL_LOADMODEREG	/;"	d
ESDCTL_MDDR_CONFIG	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_MDDR_CONFIG	/;"	d
ESDCTL_MDDR_EMR	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_MDDR_EMR	/;"	d
ESDCTL_MDDR_MR	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_MDDR_MR	/;"	d
ESDCTL_PRCT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_PRCT(/;"	d
ESDCTL_PRCT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_PRCT(/;"	d
ESDCTL_PRCT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_PRCT(/;"	d
ESDCTL_PRECHARGE	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define ESDCTL_PRECHARGE	/;"	d	file:
ESDCTL_PRECHARGE	board/CarMediaLab/flea3/flea3.c	/^#define ESDCTL_PRECHARGE	/;"	d	file:
ESDCTL_PRECHARGE	board/freescale/mx35pdk/mx35pdk.h	/^#define ESDCTL_PRECHARGE	/;"	d
ESDCTL_PRECHARGE	include/configs/mx31pdk.h	/^#define ESDCTL_PRECHARGE	/;"	d
ESDCTL_PWDT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_PWDT(/;"	d
ESDCTL_PWDT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_PWDT(/;"	d
ESDCTL_PWDT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_PWDT(/;"	d
ESDCTL_ROW	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_ROW(/;"	d
ESDCTL_ROW11	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_ROW11	/;"	d
ESDCTL_ROW11	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_ROW11	/;"	d
ESDCTL_ROW12	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_ROW12	/;"	d
ESDCTL_ROW12	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_ROW12	/;"	d
ESDCTL_ROW13	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_ROW13	/;"	d
ESDCTL_ROW13	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_ROW13	/;"	d
ESDCTL_ROW14	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_ROW14	/;"	d
ESDCTL_ROW14	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_ROW14	/;"	d
ESDCTL_ROW15	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_ROW15	/;"	d
ESDCTL_ROW15	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_ROW15	/;"	d
ESDCTL_ROW_13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_ROW_13	/;"	d
ESDCTL_ROW_COL	include/configs/mx31pdk.h	/^#define ESDCTL_ROW_COL	/;"	d
ESDCTL_RW	include/configs/mx31pdk.h	/^#define ESDCTL_RW	/;"	d
ESDCTL_SDE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SDE	/;"	d
ESDCTL_SDE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SDE	/;"	d
ESDCTL_SDE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_SDE	/;"	d
ESDCTL_SETTINGS	include/configs/mx31pdk.h	/^#define ESDCTL_SETTINGS	/;"	d
ESDCTL_SMODE_AUTO_REF	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SMODE_AUTO_REF	/;"	d
ESDCTL_SMODE_AUTO_REF	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SMODE_AUTO_REF	/;"	d
ESDCTL_SMODE_LOAD_MODE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SMODE_LOAD_MODE	/;"	d
ESDCTL_SMODE_LOAD_MODE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SMODE_LOAD_MODE	/;"	d
ESDCTL_SMODE_MAN_REF	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SMODE_MAN_REF	/;"	d
ESDCTL_SMODE_MAN_REF	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SMODE_MAN_REF	/;"	d
ESDCTL_SMODE_NORMAL	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SMODE_NORMAL	/;"	d
ESDCTL_SMODE_NORMAL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SMODE_NORMAL	/;"	d
ESDCTL_SMODE_PRECHARGE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SMODE_PRECHARGE	/;"	d
ESDCTL_SMODE_PRECHARGE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SMODE_PRECHARGE	/;"	d
ESDCTL_SP	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SP	/;"	d
ESDCTL_SP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SP	/;"	d
ESDCTL_SREFR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDCTL_SREFR(/;"	d
ESDCTL_SREFR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDCTL_SREFR(/;"	d
ESDCTL_SREFR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define ESDCTL_SREFR(/;"	d
ESDC_MISC_DDR2_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ESDC_MISC_DDR2_EN	/;"	d
ESDC_MISC_DDR_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ESDC_MISC_DDR_EN	/;"	d
ESDC_MISC_MDDR_DL_RST	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ESDC_MISC_MDDR_DL_RST	/;"	d
ESDC_MISC_MDDR_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ESDC_MISC_MDDR_EN	/;"	d
ESDC_MISC_RST	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ESDC_MISC_RST	/;"	d
ESDHC0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ESDHC0_BASE_ADDR	/;"	d
ESDHC1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define ESDHC1_BASE_ADDR	/;"	d
ESDHC1_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	ESDHC1_CLK,$/;"	e	enum:mxc_peri_clock
ESDHC2_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	ESDHC2_CLK,$/;"	e	enum:mxc_peri_clock
ESDHC3_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	ESDHC3_CLK,$/;"	e	enum:mxc_peri_clock
ESDHCCTL	include/fsl_esdhc.h	/^#define ESDHCCTL	/;"	d
ESDHCCTL_PCS	include/fsl_esdhc.h	/^#define ESDHCCTL_PCS	/;"	d
ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE$/;"	d
ESDHC_BOOT_IMAGE_ADDR	board/freescale/common/sdhc_boot.c	/^#define ESDHC_BOOT_IMAGE_ADDR	/;"	d	file:
ESDHC_BOOT_IMAGE_ADDR	board/gdsys/p1022/sdhc_boot.c	/^#define ESDHC_BOOT_IMAGE_ADDR	/;"	d	file:
ESDHC_BOOT_IMAGE_ADDR	drivers/mmc/fsl_esdhc_spl.c	/^#define ESDHC_BOOT_IMAGE_ADDR	/;"	d	file:
ESDHC_BOOT_IMAGE_ADDR_OFS	board/gdsys/p1022/controlcenterd-id.c	/^	ESDHC_BOOT_IMAGE_ADDR_OFS	= 0x50,$/;"	e	enum:__anonaa5ecaea0303	file:
ESDHC_BOOT_IMAGE_ENTRY_OFS	board/gdsys/p1022/controlcenterd-id.c	/^	ESDHC_BOOT_IMAGE_ENTRY_OFS	= 0x60,$/;"	e	enum:__anonaa5ecaea0303	file:
ESDHC_BOOT_IMAGE_SIG_OFS	board/gdsys/p1022/controlcenterd-id.c	/^	ESDHC_BOOT_IMAGE_SIG_OFS	= 0x40,$/;"	e	enum:__anonaa5ecaea0303	file:
ESDHC_BOOT_IMAGE_SIZE	board/freescale/common/sdhc_boot.c	/^#define ESDHC_BOOT_IMAGE_SIZE	/;"	d	file:
ESDHC_BOOT_IMAGE_SIZE	board/gdsys/p1022/sdhc_boot.c	/^#define ESDHC_BOOT_IMAGE_SIZE	/;"	d	file:
ESDHC_BOOT_IMAGE_SIZE	drivers/mmc/fsl_esdhc_spl.c	/^#define ESDHC_BOOT_IMAGE_SIZE	/;"	d	file:
ESDHC_BOOT_IMAGE_SIZE_OFS	board/gdsys/p1022/controlcenterd-id.c	/^	ESDHC_BOOT_IMAGE_SIZE_OFS	= 0x48,$/;"	e	enum:__anonaa5ecaea0303	file:
ESDHC_BOOT_IMAGE_TARGET_OFS	board/gdsys/p1022/controlcenterd-id.c	/^	ESDHC_BOOT_IMAGE_TARGET_OFS	= 0x58,$/;"	e	enum:__anonaa5ecaea0303	file:
ESDHC_CLK_RCWSR	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ESDHC_CLK_RCWSR	/;"	d	file:
ESDHC_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ESDHC_CLK_SEL	/;"	d	file:
ESDHC_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ESDHC_CLK_SHIFT	/;"	d	file:
ESDHC_DEFAULT_ENVADDR	board/freescale/common/sdhc_boot.c	/^#define ESDHC_DEFAULT_ENVADDR	/;"	d	file:
ESDHC_HOSTCAPBLT_DMAS	include/fsl_esdhc.h	/^#define ESDHC_HOSTCAPBLT_DMAS	/;"	d
ESDHC_HOSTCAPBLT_HSS	include/fsl_esdhc.h	/^#define ESDHC_HOSTCAPBLT_HSS	/;"	d
ESDHC_HOSTCAPBLT_SRS	include/fsl_esdhc.h	/^#define ESDHC_HOSTCAPBLT_SRS	/;"	d
ESDHC_HOSTCAPBLT_VS18	include/fsl_esdhc.h	/^#define ESDHC_HOSTCAPBLT_VS18	/;"	d
ESDHC_HOSTCAPBLT_VS30	include/fsl_esdhc.h	/^#define ESDHC_HOSTCAPBLT_VS30	/;"	d
ESDHC_HOSTCAPBLT_VS33	include/fsl_esdhc.h	/^#define ESDHC_HOSTCAPBLT_VS33	/;"	d
ESDHC_PAD_CTRL	board/freescale/vf610twr/vf610twr.c	/^#define ESDHC_PAD_CTRL	/;"	d	file:
ESDHC_PAD_CTRL	board/phytec/pcm052/pcm052.c	/^#define ESDHC_PAD_CTRL	/;"	d	file:
ESDHC_PAD_CTRL	board/toradex/colibri_vf/colibri_vf.c	/^#define ESDHC_PAD_CTRL	/;"	d	file:
ESDHC_VENDORSPEC_VSELECT	include/fsl_esdhc.h	/^#define ESDHC_VENDORSPEC_VSELECT /;"	d
ESDMISC_LHD	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_LHD	/;"	d
ESDMISC_LHD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_LHD	/;"	d
ESDMISC_MA10_SHARE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_MA10_SHARE	/;"	d
ESDMISC_MA10_SHARE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_MA10_SHARE	/;"	d
ESDMISC_MDDREN	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_MDDREN	/;"	d
ESDMISC_MDDREN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_MDDREN	/;"	d
ESDMISC_MDDR_DL_RST	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_MDDR_DL_RST	/;"	d
ESDMISC_MDDR_DL_RST	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_MDDR_DL_RST	/;"	d
ESDMISC_MDDR_MDIS	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_MDDR_MDIS	/;"	d
ESDMISC_MDDR_MDIS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_MDDR_MDIS	/;"	d
ESDMISC_MDDR_RESET_DL	include/configs/mx31pdk.h	/^#define ESDMISC_MDDR_RESET_DL	/;"	d
ESDMISC_MDDR_SETUP	include/configs/mx31pdk.h	/^#define ESDMISC_MDDR_SETUP	/;"	d
ESDMISC_RST	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_RST	/;"	d
ESDMISC_RST	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_RST	/;"	d
ESDMISC_SDRAM_RDY	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define ESDMISC_SDRAM_RDY	/;"	d
ESDMISC_SDRAM_RDY	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define ESDMISC_SDRAM_RDY	/;"	d
ESD_MMDC_CTL_GET_COLUMN	arch/arm/imx-common/cpu.c	/^#define ESD_MMDC_CTL_GET_COLUMN(/;"	d	file:
ESD_MMDC_CTL_GET_CS1	arch/arm/imx-common/cpu.c	/^#define ESD_MMDC_CTL_GET_CS1(/;"	d	file:
ESD_MMDC_CTL_GET_ROW	arch/arm/imx-common/cpu.c	/^#define ESD_MMDC_CTL_GET_ROW(/;"	d	file:
ESD_MMDC_CTL_GET_WIDTH	arch/arm/imx-common/cpu.c	/^#define ESD_MMDC_CTL_GET_WIDTH(/;"	d	file:
ESD_MMDC_MISC_GET_BANK	arch/arm/imx-common/cpu.c	/^#define ESD_MMDC_MISC_GET_BANK(/;"	d	file:
ESEL_ADC_EVAL_TIME_20CLK	arch/arm/mach-exynos/include/mach/adc.h	/^#define ESEL_ADC_EVAL_TIME_20CLK	/;"	d
ESEL_ADC_EVAL_TIME_40CLK	arch/arm/mach-exynos/include/mach/adc.h	/^#define ESEL_ADC_EVAL_TIME_40CLK	/;"	d
ESERVERFAULT	include/linux/errno.h	/^#define ESERVERFAULT	/;"	d
ESHUTDOWN	include/linux/errno.h	/^#define	ESHUTDOWN	/;"	d
ESI	arch/x86/include/asm/ptrace.h	/^#define ESI /;"	d
ESOCKTNOSUPPORT	include/linux/errno.h	/^#define	ESOCKTNOSUPPORT	/;"	d
ESPIPE	include/linux/errno.h	/^#define	ESPIPE	/;"	d
ESPI_BOOT_IMAGE_ADDR	drivers/mtd/spi/fsl_espi_spl.c	/^#define ESPI_BOOT_IMAGE_ADDR	/;"	d	file:
ESPI_BOOT_IMAGE_SIZE	drivers/mtd/spi/fsl_espi_spl.c	/^#define ESPI_BOOT_IMAGE_SIZE	/;"	d	file:
ESPI_COM_CS	drivers/spi/fsl_espi.c	/^#define ESPI_COM_CS(/;"	d	file:
ESPI_COM_TRANLEN	drivers/spi/fsl_espi.c	/^#define ESPI_COM_TRANLEN(/;"	d	file:
ESPI_CSMODE_CI_INACTIVEHIGH	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_CI_INACTIVEHIGH	/;"	d	file:
ESPI_CSMODE_CP_BEGIN_EDGCLK	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_CP_BEGIN_EDGCLK	/;"	d	file:
ESPI_CSMODE_CSAFT	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_CSAFT(/;"	d	file:
ESPI_CSMODE_CSBEF	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_CSBEF(/;"	d	file:
ESPI_CSMODE_CSCG	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_CSCG(/;"	d	file:
ESPI_CSMODE_DIV16	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_DIV16	/;"	d	file:
ESPI_CSMODE_INIT_VAL	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_INIT_VAL /;"	d	file:
ESPI_CSMODE_LEN	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_LEN(/;"	d	file:
ESPI_CSMODE_PM	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_PM(/;"	d	file:
ESPI_CSMODE_POL_ASSERTED_LOW	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_POL_ASSERTED_LOW	/;"	d	file:
ESPI_CSMODE_REV_MSB_FIRST	drivers/spi/fsl_espi.c	/^#define ESPI_CSMODE_REV_MSB_FIRST	/;"	d	file:
ESPI_EV_DON	drivers/spi/fsl_espi.c	/^#define ESPI_EV_DON	/;"	d	file:
ESPI_EV_RFCNT_MASK	drivers/spi/fsl_espi.c	/^#define ESPI_EV_RFCNT_MASK	/;"	d	file:
ESPI_EV_RFCNT_SHIFT	drivers/spi/fsl_espi.c	/^#define ESPI_EV_RFCNT_SHIFT	/;"	d	file:
ESPI_EV_RNE	drivers/spi/fsl_espi.c	/^#define ESPI_EV_RNE	/;"	d	file:
ESPI_EV_TNF	drivers/spi/fsl_espi.c	/^#define ESPI_EV_TNF	/;"	d	file:
ESPI_EV_TXE	drivers/spi/fsl_espi.c	/^#define ESPI_EV_TXE	/;"	d	file:
ESPI_FIFO_WIDTH_BIT	drivers/spi/fsl_espi.c	/^#define ESPI_FIFO_WIDTH_BIT	/;"	d	file:
ESPI_MAX_CS_NUM	drivers/spi/fsl_espi.c	/^#define ESPI_MAX_CS_NUM	/;"	d	file:
ESPI_MAX_DATA_TRANSFER_LEN	drivers/spi/fsl_espi.c	/^#define ESPI_MAX_DATA_TRANSFER_LEN /;"	d	file:
ESPI_MODE_EN	drivers/spi/fsl_espi.c	/^#define ESPI_MODE_EN	/;"	d	file:
ESPI_MODE_RXTHR	drivers/spi/fsl_espi.c	/^#define ESPI_MODE_RXTHR(/;"	d	file:
ESPI_MODE_TXTHR	drivers/spi/fsl_espi.c	/^#define ESPI_MODE_TXTHR(/;"	d	file:
ESP_V4_FLOW	include/linux/ethtool.h	/^#define	ESP_V4_FLOW	/;"	d
ESP_V6_FLOW	include/linux/ethtool.h	/^#define	ESP_V6_FLOW	/;"	d
ESR	arch/powerpc/include/asm/processor.h	/^#define ESR	/;"	d
ESRAM_BASE	arch/x86/cpu/quark/Kconfig	/^config ESRAM_BASE$/;"	c
ESRAM_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define ESRAM_BASE_ADDRESS	/;"	d
ESRAM_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define ESRAM_BASE_SIZE	/;"	d
ESRAM_BLK_CTRL	arch/x86/include/asm/arch-quark/quark.h	/^#define ESRAM_BLK_CTRL	/;"	d
ESRAM_BLOCK_MODE	arch/x86/include/asm/arch-quark/quark.h	/^#define ESRAM_BLOCK_MODE	/;"	d
ESRAM_SIZE	arch/x86/include/asm/arch-quark/quark.h	/^#define ESRAM_SIZE	/;"	d
ESRCH	include/linux/errno.h	/^#define	ESRCH	/;"	d
ESRMNT	include/linux/errno.h	/^#define	ESRMNT	/;"	d
ESR_DIZ	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_DIZ /;"	d	file:
ESR_DIZ	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_DIZ /;"	d	file:
ESR_DIZ	arch/powerpc/include/asm/processor.h	/^#define   ESR_DIZ	/;"	d
ESR_DST	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_DST /;"	d	file:
ESR_DST	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_DST /;"	d	file:
ESR_DST	arch/powerpc/include/asm/processor.h	/^#define   ESR_DST	/;"	d
ESR_IMCB	arch/powerpc/include/asm/processor.h	/^#define   ESR_IMCB	/;"	d
ESR_IMCN	arch/powerpc/include/asm/processor.h	/^#define   ESR_IMCN	/;"	d
ESR_IMCP	arch/powerpc/include/asm/processor.h	/^#define   ESR_IMCP	/;"	d
ESR_IMCT	arch/powerpc/include/asm/processor.h	/^#define   ESR_IMCT	/;"	d
ESR_MCI	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_MCI /;"	d	file:
ESR_MCI	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_MCI /;"	d	file:
ESR_PIL	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_PIL /;"	d	file:
ESR_PIL	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_PIL /;"	d	file:
ESR_PIL	arch/powerpc/include/asm/processor.h	/^#define   ESR_PIL	/;"	d
ESR_PPR	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_PPR /;"	d	file:
ESR_PPR	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_PPR /;"	d	file:
ESR_PPR	arch/powerpc/include/asm/processor.h	/^#define   ESR_PPR	/;"	d
ESR_PTR	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_PTR /;"	d	file:
ESR_PTR	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_PTR /;"	d	file:
ESR_PTR	arch/powerpc/include/asm/processor.h	/^#define   ESR_PTR	/;"	d
ESR_ST	arch/powerpc/include/asm/processor.h	/^#define ESR_ST	/;"	d
ESR_U0F	arch/powerpc/cpu/mpc85xx/traps.c	/^#define ESR_U0F /;"	d	file:
ESR_U0F	arch/powerpc/cpu/ppc4xx/traps.c	/^#define ESR_U0F /;"	d	file:
ESTALE	include/linux/errno.h	/^#define	ESTALE	/;"	d
ESTATUS_1000XF	include/miiphy.h	/^#define ESTATUS_1000XF	/;"	d
ESTATUS_1000XH	include/miiphy.h	/^#define ESTATUS_1000XH	/;"	d
ESTATUS_1000_TFULL	include/linux/mii.h	/^#define ESTATUS_1000_TFULL	/;"	d
ESTATUS_1000_THALF	include/linux/mii.h	/^#define ESTATUS_1000_THALF	/;"	d
ESTATUS_1000_XFULL	include/linux/mii.h	/^#define ESTATUS_1000_XFULL	/;"	d
ESTATUS_1000_XHALF	include/linux/mii.h	/^#define ESTATUS_1000_XHALF	/;"	d
ESTRPIPE	include/linux/errno.h	/^#define	ESTRPIPE	/;"	d
ESUB_AXI_DIV_DEBUG_ADDR	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_ADDR	/;"	d	file:
ESUB_AXI_DIV_DEBUG_ADDR	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_ADDR	/;"	d	file:
ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK	/;"	d	file:
ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK	/;"	d	file:
ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK	/;"	d	file:
ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK	/;"	d	file:
ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT	/;"	d	file:
ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT	/;"	d	file:
ESUB_AXI_DIV_DEBUG_TRIGGER_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_TRIGGER_MASK	/;"	d	file:
ESUB_AXI_DIV_DEBUG_TRIGGER_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESUB_AXI_DIV_DEBUG_TRIGGER_MASK	/;"	d	file:
ESUB_CLK_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define ESUB_CLK_BASE_ADDR	/;"	d
ESW_CONTRL_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define ESW_CONTRL_BASE_ADDR	/;"	d
ESW_SYS_DIV_ADDR	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESW_SYS_DIV_ADDR	/;"	d	file:
ESW_SYS_DIV_ADDR	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESW_SYS_DIV_ADDR	/;"	d	file:
ESW_SYS_DIV_DIV_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESW_SYS_DIV_DIV_MASK	/;"	d	file:
ESW_SYS_DIV_DIV_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESW_SYS_DIV_DIV_MASK	/;"	d	file:
ESW_SYS_DIV_DIV_SELECT	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESW_SYS_DIV_DIV_SELECT	/;"	d	file:
ESW_SYS_DIV_DIV_SELECT	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESW_SYS_DIV_DIV_SELECT	/;"	d	file:
ESW_SYS_DIV_PLL_SELECT_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESW_SYS_DIV_PLL_SELECT_MASK	/;"	d	file:
ESW_SYS_DIV_PLL_SELECT_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESW_SYS_DIV_PLL_SELECT_MASK	/;"	d	file:
ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT	/;"	d	file:
ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT	/;"	d	file:
ESW_SYS_DIV_TRIGGER_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define ESW_SYS_DIV_TRIGGER_MASK	/;"	d	file:
ESW_SYS_DIV_TRIGGER_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define ESW_SYS_DIV_TRIGGER_MASK	/;"	d	file:
ES_16COL	drivers/net/smc91111.h	/^#define ES_16COL	/;"	d
ES_BE	include/usb/ehci-ci.h	/^#define ES_BE	/;"	d
ES_CTR_ROL	drivers/net/smc91111.h	/^#define ES_CTR_ROL	/;"	d
ES_EXC_DEF	drivers/net/smc91111.h	/^#define ES_EXC_DEF	/;"	d
ES_LATCOL	drivers/net/smc91111.h	/^#define ES_LATCOL	/;"	d
ES_LINK_OK	drivers/net/smc91111.h	/^#define ES_LINK_OK	/;"	d
ES_LOSTCARR	drivers/net/smc91111.h	/^#define ES_LOSTCARR	/;"	d
ES_LTXBRD	drivers/net/smc91111.h	/^#define ES_LTXBRD	/;"	d
ES_LTX_MULT	drivers/net/smc91111.h	/^#define ES_LTX_MULT	/;"	d
ES_MUL_COL	drivers/net/smc91111.h	/^#define ES_MUL_COL	/;"	d
ES_SNGL_COL	drivers/net/smc91111.h	/^#define ES_SNGL_COL	/;"	d
ES_SQET	drivers/net/smc91111.h	/^#define ES_SQET	/;"	d
ES_TXDEFR	drivers/net/smc91111.h	/^#define ES_TXDEFR	/;"	d
ES_TXUNRN	drivers/net/smc91111.h	/^#define ES_TXUNRN	/;"	d
ES_TX_SUC	drivers/net/smc91111.h	/^#define ES_TX_SUC	/;"	d
EState	lib/bzip2/bzlib_private.h	/^   EState;$/;"	t	typeref:struct:__anon93cbeec40108
ESzSeek	lib/lzma/Types.h	/^} ESzSeek;$/;"	t	typeref:enum:__anonf2a2f1b90503
ET0_COL	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_COL	/;"	d	file:
ET0_CRS	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_CRS	/;"	d	file:
ET0_ERXD0	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD0	/;"	d	file:
ET0_ERXD1	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD1	/;"	d	file:
ET0_ERXD2_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD2_A /;"	d	file:
ET0_ERXD3_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD3_A /;"	d	file:
ET0_ERXD4	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD4	/;"	d	file:
ET0_ERXD5	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD5	/;"	d	file:
ET0_ERXD6	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD6	/;"	d	file:
ET0_ERXD7	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ERXD7	/;"	d	file:
ET0_ETXD0	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD0 /;"	d	file:
ET0_ETXD1_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD1_A /;"	d	file:
ET0_ETXD2_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD2_A /;"	d	file:
ET0_ETXD3_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD3_A /;"	d	file:
ET0_ETXD4	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD4 /;"	d	file:
ET0_ETXD5_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD5_A /;"	d	file:
ET0_ETXD6_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD6_A /;"	d	file:
ET0_ETXD7	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_ETXD7 /;"	d	file:
ET0_GTX_CLK_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_GTX_CLK_A /;"	d	file:
ET0_LINK_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_LINK_A	/;"	d	file:
ET0_MDC	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_MDC	/;"	d	file:
ET0_MDIO_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_MDIO_A	/;"	d	file:
ET0_PHY_INT_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_PHY_INT_A /;"	d	file:
ET0_RX_CLK_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_RX_CLK_A /;"	d	file:
ET0_RX_DV	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_RX_DV	/;"	d	file:
ET0_RX_ER	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_RX_ER	/;"	d	file:
ET0_TX_CLK_A	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_TX_CLK_A /;"	d	file:
ET0_TX_EN	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_TX_EN	/;"	d	file:
ET0_TX_ER	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define ET0_TX_ER	/;"	d	file:
ET1011C_CONFIG_REG	drivers/net/phy/et1011c.c	/^#define ET1011C_CONFIG_REG	/;"	d	file:
ET1011C_DUPLEX_STATUS	drivers/net/phy/et1011c.c	/^#define ET1011C_DUPLEX_STATUS	/;"	d	file:
ET1011C_GMII_INTERFACE	drivers/net/phy/et1011c.c	/^#define ET1011C_GMII_INTERFACE	/;"	d	file:
ET1011C_INTERFACE_MASK	drivers/net/phy/et1011c.c	/^#define ET1011C_INTERFACE_MASK	/;"	d	file:
ET1011C_SPEED_10	drivers/net/phy/et1011c.c	/^#define ET1011C_SPEED_10	/;"	d	file:
ET1011C_SPEED_100	drivers/net/phy/et1011c.c	/^#define ET1011C_SPEED_100	/;"	d	file:
ET1011C_SPEED_1000	drivers/net/phy/et1011c.c	/^#define ET1011C_SPEED_1000	/;"	d	file:
ET1011C_SPEED_MASK	drivers/net/phy/et1011c.c	/^#define ET1011C_SPEED_MASK	/;"	d	file:
ET1011C_STATUS_REG	drivers/net/phy/et1011c.c	/^#define ET1011C_STATUS_REG	/;"	d	file:
ET1011C_SYS_CLK_EN	drivers/net/phy/et1011c.c	/^#define ET1011C_SYS_CLK_EN	/;"	d	file:
ET1011C_TX_CLK_EN	drivers/net/phy/et1011c.c	/^#define ET1011C_TX_CLK_EN	/;"	d	file:
ET1011C_TX_FIFO_DEPTH_16	drivers/net/phy/et1011c.c	/^#define ET1011C_TX_FIFO_DEPTH_16	/;"	d	file:
ET1011C_TX_FIFO_DEPTH_8	drivers/net/phy/et1011c.c	/^#define ET1011C_TX_FIFO_DEPTH_8	/;"	d	file:
ET1011C_TX_FIFO_MASK	drivers/net/phy/et1011c.c	/^#define ET1011C_TX_FIFO_MASK	/;"	d	file:
ETAMIN_NAND_GPMC_CONFIG1	include/configs/etamin.h	/^#define ETAMIN_NAND_GPMC_CONFIG1	/;"	d
ETAMIN_NAND_GPMC_CONFIG2	include/configs/etamin.h	/^#define ETAMIN_NAND_GPMC_CONFIG2	/;"	d
ETAMIN_NAND_GPMC_CONFIG3	include/configs/etamin.h	/^#define ETAMIN_NAND_GPMC_CONFIG3	/;"	d
ETAMIN_NAND_GPMC_CONFIG4	include/configs/etamin.h	/^#define ETAMIN_NAND_GPMC_CONFIG4	/;"	d
ETAMIN_NAND_GPMC_CONFIG5	include/configs/etamin.h	/^#define ETAMIN_NAND_GPMC_CONFIG5	/;"	d
ETAMIN_NAND_GPMC_CONFIG6	include/configs/etamin.h	/^#define ETAMIN_NAND_GPMC_CONFIG6	/;"	d
ETBEI	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ETBEI	/;"	d
ETBEI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ETBEI	/;"	d
ETBEI_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define ETBEI_P	/;"	d
ETFI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ETFI	/;"	d
ETH0_BASE	arch/mips/mach-au1x00/au1x00_eth.c	/^#define ETH0_BASE /;"	d	file:
ETH0_BASE_ADDRESS	include/configs/tb100.h	/^#define ETH0_BASE_ADDRESS	/;"	d
ETH1_BASE_ADDRESS	include/configs/tb100.h	/^#define ETH1_BASE_ADDRESS	/;"	d
ETHADDR_FLAGS	include/env_flags.h	/^#define ETHADDR_FLAGS /;"	d
ETHADDR_FLAGS	include/env_flags.h	/^#define ETHADDR_FLAGS$/;"	d
ETHADDR_MAX	board/Synology/ds414/cmd_syno.c	/^#define ETHADDR_MAX	/;"	d	file:
ETHADDR_WILDCARD	include/env_callback.h	/^#define ETHADDR_WILDCARD /;"	d
ETHADDR_WILDCARD	include/env_callback.h	/^#define ETHADDR_WILDCARD$/;"	d
ETHADDR_WILDCARD	include/env_flags.h	/^#define ETHADDR_WILDCARD /;"	d
ETHADDR_WILDCARD	include/env_flags.h	/^#define ETHADDR_WILDCARD$/;"	d
ETHCON_BUFCDEC	drivers/net/pic32_eth.h	/^#define ETHCON_BUFCDEC	/;"	d
ETHCON_ON	drivers/net/pic32_eth.h	/^#define ETHCON_ON	/;"	d
ETHCON_RXBUFSZ	drivers/net/pic32_eth.h	/^#define ETHCON_RXBUFSZ	/;"	d
ETHCON_RXBUFSZ_SHFT	drivers/net/pic32_eth.h	/^#define ETHCON_RXBUFSZ_SHFT	/;"	d
ETHCON_RXEN	drivers/net/pic32_eth.h	/^#define ETHCON_RXEN	/;"	d
ETHCON_TXRTS	drivers/net/pic32_eth.h	/^#define ETHCON_TXRTS	/;"	d
ETHER0_MAC_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define ETHER0_MAC_BASE	/;"	d
ETHER0_MAC_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define ETHER0_MAC_BASE	/;"	d
ETHER0_MAC_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define ETHER0_MAC_BASE	/;"	d
ETHER1_MAC_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define ETHER1_MAC_BASE	/;"	d
ETHER1_MAC_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define ETHER1_MAC_BASE	/;"	d
ETHER1_MAC_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define ETHER1_MAC_BASE	/;"	d
ETHERNET	arch/blackfin/include/asm/shared_resources.h	/^#define ETHERNET /;"	d
ETHERNET_ARP_TYPE	drivers/net/e1000.h	/^#define ETHERNET_ARP_TYPE	/;"	d
ETHERNET_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define ETHERNET_BASE	/;"	d
ETHERNET_EN	board/bf609-ezkit/soft_switch.h	/^#define ETHERNET_EN /;"	d
ETHERNET_IEEE_VLAN_TYPE	drivers/net/e1000.h	/^#define ETHERNET_IEEE_VLAN_TYPE /;"	d
ETHERNET_INT	board/freescale/mx53ard/mx53ard.c	/^#define ETHERNET_INT	/;"	d	file:
ETHERNET_IP_TYPE	drivers/net/e1000.h	/^#define ETHERNET_IP_TYPE	/;"	d
ETHERNET_MAX_LENGTH	drivers/net/lan91c96.h	/^#define ETHERNET_MAX_LENGTH /;"	d
ETHER_ADDR_LEN	drivers/net/ne2000_base.h	/^#define ETHER_ADDR_LEN /;"	d
ETHER_FLOW	include/linux/ethtool.h	/^#define	ETHER_FLOW	/;"	d
ETHER_HDR_SIZE	include/net.h	/^#define ETHER_HDR_SIZE	/;"	d
ETHER_MSTP813	board/renesas/alt/alt.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHER_MSTP813	board/renesas/gose/gose.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHER_MSTP813	board/renesas/koelsch/koelsch.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHER_MSTP813	board/renesas/lager/lager.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHER_MSTP813	board/renesas/porter/porter.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHER_MSTP813	board/renesas/silk/silk.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHER_MSTP813	board/renesas/stout/stout.c	/^#define ETHER_MSTP813	/;"	d	file:
ETHHW_PORT_INT	drivers/net/bcm-sf2-eth-gmac.h	/^#define ETHHW_PORT_INT	/;"	d
ETHOC	drivers/net/Kconfig	/^config ETHOC$/;"	c
ETHOC_BD_BASE	drivers/net/ethoc.c	/^#define	ETHOC_BD_BASE	/;"	d	file:
ETHOC_BUFSIZ	drivers/net/ethoc.c	/^#define	ETHOC_BUFSIZ	/;"	d	file:
ETHOC_IOSIZE	drivers/net/ethoc.c	/^#define	ETHOC_IOSIZE	/;"	d	file:
ETHOC_MII_TIMEOUT	drivers/net/ethoc.c	/^#define	ETHOC_MII_TIMEOUT	/;"	d	file:
ETHOC_TIMEOUT	drivers/net/ethoc.c	/^#define	ETHOC_TIMEOUT	/;"	d	file:
ETHOC_ZLEN	drivers/net/ethoc.c	/^#define	ETHOC_ZLEN	/;"	d	file:
ETHRXFC_BCEN	drivers/net/pic32_eth.h	/^#define ETHRXFC_BCEN	/;"	d
ETHRXFC_CRCOKEN	drivers/net/pic32_eth.h	/^#define ETHRXFC_CRCOKEN	/;"	d
ETHRXFC_MCEN	drivers/net/pic32_eth.h	/^#define ETHRXFC_MCEN	/;"	d
ETHRXFC_RUNTEN	drivers/net/pic32_eth.h	/^#define ETHRXFC_RUNTEN	/;"	d
ETHRXFC_UCEN	drivers/net/pic32_eth.h	/^#define ETHRXFC_UCEN	/;"	d
ETHSTAT_BUFCNT	drivers/net/pic32_eth.h	/^#define ETHSTAT_BUFCNT	/;"	d
ETHSTAT_BUSY	drivers/net/pic32_eth.h	/^#define ETHSTAT_BUSY	/;"	d
ETHSW_CMD_AGGR_GRP_NONE	include/ethsw.h	/^#define ETHSW_CMD_AGGR_GRP_NONE /;"	d
ETHSW_CMD_PORT_ALL	include/ethsw.h	/^#define ETHSW_CMD_PORT_ALL /;"	d
ETHSW_CMD_VLAN_ALL	include/ethsw.h	/^#define ETHSW_CMD_VLAN_ALL /;"	d
ETHSW_EGR_VLAN_TAG_HELP	cmd/ethsw.c	/^#define ETHSW_EGR_VLAN_TAG_HELP /;"	d	file:
ETHSW_FDB_HELP	cmd/ethsw.c	/^#define ETHSW_FDB_HELP /;"	d	file:
ETHSW_LEARN_HELP	cmd/ethsw.c	/^#define ETHSW_LEARN_HELP /;"	d	file:
ETHSW_MAX_CMD_PARAMS	include/ethsw.h	/^#define ETHSW_MAX_CMD_PARAMS /;"	d
ETHSW_PORT_AGGR_HELP	cmd/ethsw.c	/^#define ETHSW_PORT_AGGR_HELP /;"	d	file:
ETHSW_PORT_CONF_HELP	cmd/ethsw.c	/^#define ETHSW_PORT_CONF_HELP /;"	d	file:
ETHSW_PORT_INGR_FLTR_HELP	cmd/ethsw.c	/^#define ETHSW_PORT_INGR_FLTR_HELP /;"	d	file:
ETHSW_PORT_STATS_HELP	cmd/ethsw.c	/^#define ETHSW_PORT_STATS_HELP /;"	d	file:
ETHSW_PORT_UNTAG_HELP	cmd/ethsw.c	/^#define ETHSW_PORT_UNTAG_HELP /;"	d	file:
ETHSW_PVID_HELP	cmd/ethsw.c	/^#define ETHSW_PVID_HELP /;"	d	file:
ETHSW_VLAN_FDB_HELP	cmd/ethsw.c	/^#define ETHSW_VLAN_FDB_HELP /;"	d	file:
ETHSW_VLAN_HELP	cmd/ethsw.c	/^#define ETHSW_VLAN_HELP /;"	d	file:
ETHTOOL_BUSINFO_LEN	include/linux/ethtool.h	/^#define ETHTOOL_BUSINFO_LEN	/;"	d
ETHTOOL_FLASHDEV	include/linux/ethtool.h	/^#define ETHTOOL_FLASHDEV	/;"	d
ETHTOOL_FLASH_ALL_REGIONS	include/linux/ethtool.h	/^	ETHTOOL_FLASH_ALL_REGIONS	= 0,$/;"	e	enum:ethtool_flash_op_type
ETHTOOL_FLASH_MAX_FILENAME	include/linux/ethtool.h	/^#define ETHTOOL_FLASH_MAX_FILENAME	/;"	d
ETHTOOL_FWVERS_LEN	include/linux/ethtool.h	/^#define ETHTOOL_FWVERS_LEN	/;"	d
ETHTOOL_F_COMPAT	include/linux/ethtool.h	/^#define ETHTOOL_F_COMPAT /;"	d
ETHTOOL_F_COMPAT__BIT	include/linux/ethtool.h	/^	ETHTOOL_F_COMPAT__BIT,$/;"	e	enum:ethtool_sfeatures_retval_bits
ETHTOOL_F_UNSUPPORTED	include/linux/ethtool.h	/^#define ETHTOOL_F_UNSUPPORTED /;"	d
ETHTOOL_F_UNSUPPORTED__BIT	include/linux/ethtool.h	/^	ETHTOOL_F_UNSUPPORTED__BIT,$/;"	e	enum:ethtool_sfeatures_retval_bits
ETHTOOL_F_WISH	include/linux/ethtool.h	/^#define ETHTOOL_F_WISH /;"	d
ETHTOOL_F_WISH__BIT	include/linux/ethtool.h	/^	ETHTOOL_F_WISH__BIT,$/;"	e	enum:ethtool_sfeatures_retval_bits
ETHTOOL_GCOALESCE	include/linux/ethtool.h	/^#define ETHTOOL_GCOALESCE	/;"	d
ETHTOOL_GDRVINFO	include/linux/ethtool.h	/^#define ETHTOOL_GDRVINFO	/;"	d
ETHTOOL_GEEPROM	include/linux/ethtool.h	/^#define ETHTOOL_GEEPROM	/;"	d
ETHTOOL_GFEATURES	include/linux/ethtool.h	/^#define ETHTOOL_GFEATURES	/;"	d
ETHTOOL_GFLAGS	include/linux/ethtool.h	/^#define ETHTOOL_GFLAGS	/;"	d
ETHTOOL_GGRO	include/linux/ethtool.h	/^#define ETHTOOL_GGRO	/;"	d
ETHTOOL_GGSO	include/linux/ethtool.h	/^#define ETHTOOL_GGSO	/;"	d
ETHTOOL_GLINK	include/linux/ethtool.h	/^#define ETHTOOL_GLINK	/;"	d
ETHTOOL_GMSGLVL	include/linux/ethtool.h	/^#define ETHTOOL_GMSGLVL	/;"	d
ETHTOOL_GPAUSEPARAM	include/linux/ethtool.h	/^#define ETHTOOL_GPAUSEPARAM	/;"	d
ETHTOOL_GPERMADDR	include/linux/ethtool.h	/^#define ETHTOOL_GPERMADDR	/;"	d
ETHTOOL_GPFLAGS	include/linux/ethtool.h	/^#define ETHTOOL_GPFLAGS	/;"	d
ETHTOOL_GREGS	include/linux/ethtool.h	/^#define ETHTOOL_GREGS	/;"	d
ETHTOOL_GRINGPARAM	include/linux/ethtool.h	/^#define ETHTOOL_GRINGPARAM	/;"	d
ETHTOOL_GRXCLSRLALL	include/linux/ethtool.h	/^#define ETHTOOL_GRXCLSRLALL	/;"	d
ETHTOOL_GRXCLSRLCNT	include/linux/ethtool.h	/^#define ETHTOOL_GRXCLSRLCNT	/;"	d
ETHTOOL_GRXCLSRULE	include/linux/ethtool.h	/^#define ETHTOOL_GRXCLSRULE	/;"	d
ETHTOOL_GRXCSUM	include/linux/ethtool.h	/^#define ETHTOOL_GRXCSUM	/;"	d
ETHTOOL_GRXFH	include/linux/ethtool.h	/^#define ETHTOOL_GRXFH	/;"	d
ETHTOOL_GRXFHINDIR	include/linux/ethtool.h	/^#define ETHTOOL_GRXFHINDIR	/;"	d
ETHTOOL_GRXNTUPLE	include/linux/ethtool.h	/^#define ETHTOOL_GRXNTUPLE	/;"	d
ETHTOOL_GRXRINGS	include/linux/ethtool.h	/^#define ETHTOOL_GRXRINGS	/;"	d
ETHTOOL_GSET	include/linux/ethtool.h	/^#define ETHTOOL_GSET	/;"	d
ETHTOOL_GSG	include/linux/ethtool.h	/^#define ETHTOOL_GSG	/;"	d
ETHTOOL_GSSET_INFO	include/linux/ethtool.h	/^#define ETHTOOL_GSSET_INFO	/;"	d
ETHTOOL_GSTATS	include/linux/ethtool.h	/^#define ETHTOOL_GSTATS	/;"	d
ETHTOOL_GSTRINGS	include/linux/ethtool.h	/^#define ETHTOOL_GSTRINGS	/;"	d
ETHTOOL_GTSO	include/linux/ethtool.h	/^#define ETHTOOL_GTSO	/;"	d
ETHTOOL_GTXCSUM	include/linux/ethtool.h	/^#define ETHTOOL_GTXCSUM	/;"	d
ETHTOOL_GUFO	include/linux/ethtool.h	/^#define ETHTOOL_GUFO	/;"	d
ETHTOOL_GWOL	include/linux/ethtool.h	/^#define ETHTOOL_GWOL	/;"	d
ETHTOOL_NWAY_RST	include/linux/ethtool.h	/^#define ETHTOOL_NWAY_RST	/;"	d
ETHTOOL_PHYS_ID	include/linux/ethtool.h	/^#define ETHTOOL_PHYS_ID	/;"	d
ETHTOOL_RESET	include/linux/ethtool.h	/^#define ETHTOOL_RESET	/;"	d
ETHTOOL_SCOALESCE	include/linux/ethtool.h	/^#define ETHTOOL_SCOALESCE	/;"	d
ETHTOOL_SEEPROM	include/linux/ethtool.h	/^#define ETHTOOL_SEEPROM	/;"	d
ETHTOOL_SFEATURES	include/linux/ethtool.h	/^#define ETHTOOL_SFEATURES	/;"	d
ETHTOOL_SFLAGS	include/linux/ethtool.h	/^#define ETHTOOL_SFLAGS	/;"	d
ETHTOOL_SGRO	include/linux/ethtool.h	/^#define ETHTOOL_SGRO	/;"	d
ETHTOOL_SGSO	include/linux/ethtool.h	/^#define ETHTOOL_SGSO	/;"	d
ETHTOOL_SMSGLVL	include/linux/ethtool.h	/^#define ETHTOOL_SMSGLVL	/;"	d
ETHTOOL_SPAUSEPARAM	include/linux/ethtool.h	/^#define ETHTOOL_SPAUSEPARAM	/;"	d
ETHTOOL_SPFLAGS	include/linux/ethtool.h	/^#define ETHTOOL_SPFLAGS	/;"	d
ETHTOOL_SRINGPARAM	include/linux/ethtool.h	/^#define ETHTOOL_SRINGPARAM	/;"	d
ETHTOOL_SRXCLSRLDEL	include/linux/ethtool.h	/^#define ETHTOOL_SRXCLSRLDEL	/;"	d
ETHTOOL_SRXCLSRLINS	include/linux/ethtool.h	/^#define ETHTOOL_SRXCLSRLINS	/;"	d
ETHTOOL_SRXCSUM	include/linux/ethtool.h	/^#define ETHTOOL_SRXCSUM	/;"	d
ETHTOOL_SRXFH	include/linux/ethtool.h	/^#define ETHTOOL_SRXFH	/;"	d
ETHTOOL_SRXFHINDIR	include/linux/ethtool.h	/^#define ETHTOOL_SRXFHINDIR	/;"	d
ETHTOOL_SRXNTUPLE	include/linux/ethtool.h	/^#define ETHTOOL_SRXNTUPLE	/;"	d
ETHTOOL_SSET	include/linux/ethtool.h	/^#define ETHTOOL_SSET	/;"	d
ETHTOOL_SSG	include/linux/ethtool.h	/^#define ETHTOOL_SSG	/;"	d
ETHTOOL_STSO	include/linux/ethtool.h	/^#define ETHTOOL_STSO	/;"	d
ETHTOOL_STXCSUM	include/linux/ethtool.h	/^#define ETHTOOL_STXCSUM	/;"	d
ETHTOOL_SUFO	include/linux/ethtool.h	/^#define ETHTOOL_SUFO	/;"	d
ETHTOOL_SWOL	include/linux/ethtool.h	/^#define ETHTOOL_SWOL	/;"	d
ETHTOOL_TEST	include/linux/ethtool.h	/^#define ETHTOOL_TEST	/;"	d
ETH_ALEN	board/Synology/ds414/cmd_syno.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/dc2114x.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/eepro100.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/mvpp2.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/natsemi.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/ns8382x.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/rtl8139.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/net/rtl8169.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/usb/gadget/ether.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	drivers/usb/gadget/rndis.c	/^#define ETH_ALEN	/;"	d	file:
ETH_ALEN	include/usb_ether.h	/^#define ETH_ALEN	/;"	d
ETH_BASE	drivers/net/tsi108_eth.c	/^#define ETH_BASE	/;"	d	file:
ETH_BUF_SZ	drivers/net/calxedaxgmac.c	/^#define ETH_BUF_SZ	/;"	d	file:
ETH_CLK_CFG	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_CFG	/;"	d
ETH_CLK_CTRL	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_CTRL	/;"	d
ETH_CLK_MASK	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_MASK	/;"	d
ETH_CLK_RX_25M	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_RX_25M	/;"	d
ETH_CLK_RX_2M5	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_RX_2M5	/;"	d
ETH_CLK_RX_DIS	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_RX_DIS	/;"	d
ETH_CLK_RX_EXT_PHY	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_RX_EXT_PHY	/;"	d
ETH_CLK_TX_125M	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_TX_125M	/;"	d
ETH_CLK_TX_25M	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_TX_25M	/;"	d
ETH_CLK_TX_2M5	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_TX_2M5	/;"	d
ETH_CLK_TX_DIS	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_TX_DIS	/;"	d
ETH_CLK_TX_EXT_PHY	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_CLK_TX_EXT_PHY	/;"	d
ETH_CLOCK_CFG	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	ETH_CLOCK_CFG,$/;"	e	enum:periph_clock
ETH_CRS_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_CRS_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_CRS_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_CRS_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_CRS_DV_MARK, VI0_G1_MARK, MSIOF2_TXD_B_MARK, IIC0_SDA_D_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_DATA_LEN	drivers/usb/gadget/ether.c	/^#define ETH_DATA_LEN	/;"	d	file:
ETH_DATA_LEN	drivers/usb/gadget/rndis.c	/^#define ETH_DATA_LEN	/;"	d	file:
ETH_DATA_LEN	include/usb_ether.h	/^#define ETH_DATA_LEN	/;"	d
ETH_DESIGNWARE	drivers/net/Kconfig	/^config ETH_DESIGNWARE$/;"	c
ETH_EXTRA_HEADER	drivers/net/armada100_fec.h	/^#define ETH_EXTRA_HEADER /;"	d
ETH_FCS_LEN	drivers/net/xilinx_emaclite.c	/^#define ETH_FCS_LEN	/;"	d	file:
ETH_FCS_LEN	include/net.h	/^#define ETH_FCS_LEN	/;"	d
ETH_FLAG_LRO	include/linux/ethtool.h	/^	ETH_FLAG_LRO		= (1 << 15),	\/* LRO is enabled *\/$/;"	e	enum:ethtool_flags
ETH_FLAG_NTUPLE	include/linux/ethtool.h	/^	ETH_FLAG_NTUPLE		= (1 << 27),	\/* N-tuple filters enabled *\/$/;"	e	enum:ethtool_flags
ETH_FLAG_RXHASH	include/linux/ethtool.h	/^	ETH_FLAG_RXHASH		= (1 << 28),$/;"	e	enum:ethtool_flags
ETH_FLAG_RXVLAN	include/linux/ethtool.h	/^	ETH_FLAG_RXVLAN		= (1 << 8),	\/* RX VLAN offload enabled *\/$/;"	e	enum:ethtool_flags
ETH_FLAG_TXVLAN	include/linux/ethtool.h	/^	ETH_FLAG_TXVLAN		= (1 << 7),	\/* TX VLAN offload enabled *\/$/;"	e	enum:ethtool_flags
ETH_FRAME_LEN	drivers/net/rtl8139.c	/^#define ETH_FRAME_LEN	/;"	d	file:
ETH_FRAME_LEN	drivers/net/rtl8169.c	/^#define ETH_FRAME_LEN	/;"	d	file:
ETH_FRAME_LEN	drivers/usb/gadget/ether.c	/^#define ETH_FRAME_LEN	/;"	d	file:
ETH_FRAME_LEN	drivers/usb/gadget/rndis.c	/^#define ETH_FRAME_LEN	/;"	d	file:
ETH_FRAME_LEN	include/usb_ether.h	/^#define ETH_FRAME_LEN	/;"	d
ETH_FRONT_PHY_RST	board/keymile/kmp204x/kmp204x.c	/^#define ETH_FRONT_PHY_RST	/;"	d	file:
ETH_GIG_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	ETH_GIG_UNIT_ID,$/;"	e	enum:unit_id
ETH_GPIOB_10_31_C_0_4	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	ETH_GPIOB_10_31_C_0_4,$/;"	e	enum:periph_id
ETH_GSTRING_LEN	include/linux/ethtool.h	/^#define ETH_GSTRING_LEN	/;"	d
ETH_HASH0	drivers/net/ethoc.c	/^#define	ETH_HASH0	/;"	d	file:
ETH_HASH1	drivers/net/ethoc.c	/^#define	ETH_HASH1	/;"	d	file:
ETH_HLEN	drivers/net/mvneta.c	/^#define ETH_HLEN	/;"	d	file:
ETH_HLEN	drivers/net/mvpp2.c	/^#define ETH_HLEN	/;"	d	file:
ETH_HLEN	drivers/usb/gadget/ether.c	/^#define ETH_HLEN	/;"	d	file:
ETH_HLEN	drivers/usb/gadget/rndis.c	/^#define ETH_HLEN	/;"	d	file:
ETH_HLEN	include/usb_ether.h	/^#define ETH_HLEN	/;"	d
ETH_HW_IP_ALIGN	drivers/net/armada100_fec.h	/^#define ETH_HW_IP_ALIGN /;"	d
ETH_IRQ_NUM	drivers/net/4xx_enet.c	/^#define ETH_IRQ_NUM(/;"	d	file:
ETH_LENGTH_OF_ADDRESS	drivers/net/e1000.h	/^#define ETH_LENGTH_OF_ADDRESS /;"	d
ETH_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD3_MARK, ADICHS1_MARK, ETH_LINK_MARK, VI0_G5_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SDATA5_B_MARK, ETH_MAGIC_MARK, VI0_R1_MARK, SCIF3_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_MDC_MARK, VI0_R3_MARK, SCIF3_TXD_B_MARK, I2C4_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SDA_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_EN_MARK, ETH_MDIO_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_M_VDD_CFG	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define ETH_M_VDD_CFG	/;"	d
ETH_PHY_CLK_DIS	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_PHY_CLK_DIS	/;"	d
ETH_PHY_CLK_OUT	board/freescale/b4860qds/b4860qds.c	/^#define ETH_PHY_CLK_OUT	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_BIT	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define ETH_PHY_CTRL_POWER_DOWN_BIT	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_BIT	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define ETH_PHY_CTRL_POWER_DOWN_BIT	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_BIT	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define ETH_PHY_CTRL_POWER_DOWN_BIT	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_BIT	board/solidrun/clearfog/clearfog.c	/^#define ETH_PHY_CTRL_POWER_DOWN_BIT	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_MASK	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define ETH_PHY_CTRL_POWER_DOWN_MASK	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_MASK	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define ETH_PHY_CTRL_POWER_DOWN_MASK	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_MASK	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define ETH_PHY_CTRL_POWER_DOWN_MASK	/;"	d	file:
ETH_PHY_CTRL_POWER_DOWN_MASK	board/solidrun/clearfog/clearfog.c	/^#define ETH_PHY_CTRL_POWER_DOWN_MASK	/;"	d	file:
ETH_PHY_CTRL_REG	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^#define ETH_PHY_CTRL_REG	/;"	d	file:
ETH_PHY_CTRL_REG	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^#define ETH_PHY_CTRL_REG	/;"	d	file:
ETH_PHY_CTRL_REG	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define ETH_PHY_CTRL_REG	/;"	d	file:
ETH_PHY_CTRL_REG	board/solidrun/clearfog/clearfog.c	/^#define ETH_PHY_CTRL_REG	/;"	d	file:
ETH_PHY_MASK	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define ETH_PHY_MASK	/;"	d	file:
ETH_PHY_MODE_GMII	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_PHY_MODE_GMII	/;"	d
ETH_PHY_MODE_RMII	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define ETH_PHY_MODE_RMII	/;"	d
ETH_PHY_POWER	board/freescale/mx6slevk/mx6slevk.c	/^#define ETH_PHY_POWER	/;"	d	file:
ETH_PHY_RESET	board/el/el6x/el6x.c	/^#define ETH_PHY_RESET	/;"	d	file:
ETH_PHY_RESET	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define ETH_PHY_RESET	/;"	d	file:
ETH_PHY_RESET	board/wandboard/wandboard.c	/^#define ETH_PHY_RESET	/;"	d	file:
ETH_PHY_RESET_GPIO	board/siemens/rut/board.c	/^#define ETH_PHY_RESET_GPIO	/;"	d	file:
ETH_PORT_OFFSET	drivers/net/tsi108_eth.c	/^#define ETH_PORT_OFFSET	/;"	d	file:
ETH_P_8021Q	drivers/usb/eth/smsc95xx.c	/^#define ETH_P_8021Q	/;"	d	file:
ETH_RECV_CHECK_DEVICE	include/net.h	/^	ETH_RECV_CHECK_DEVICE		= 1 << 0,$/;"	e	enum:eth_recv_flags
ETH_REFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_REFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_REFCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_REFCLK_MARK, VI0_G6_MARK, SCIF2_SCK_C_MARK, AVB_TXD5_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_REF_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_RESET_ALL	include/linux/ethtool.h	/^	ETH_RESET_ALL		= 0xffffffff,	\/* All components used by this$/;"	e	enum:ethtool_reset_flags
ETH_RESET_DEDICATED	include/linux/ethtool.h	/^	ETH_RESET_DEDICATED	= 0x0000ffff,	\/* All components dedicated to$/;"	e	enum:ethtool_reset_flags
ETH_RESET_DMA	include/linux/ethtool.h	/^	ETH_RESET_DMA		= 1 << 2,	\/* DMA engine *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_FILTER	include/linux/ethtool.h	/^	ETH_RESET_FILTER	= 1 << 3,	\/* Filtering\/flow direction *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_IRQ	include/linux/ethtool.h	/^	ETH_RESET_IRQ		= 1 << 1,	\/* Interrupt requester *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_MAC	include/linux/ethtool.h	/^	ETH_RESET_MAC		= 1 << 5,	\/* Media access controller *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_MGMT	include/linux/ethtool.h	/^	ETH_RESET_MGMT		= 1 << 0,	\/* Management processor *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_OFFLOAD	include/linux/ethtool.h	/^	ETH_RESET_OFFLOAD	= 1 << 4,	\/* Protocol offload *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_PHY	include/linux/ethtool.h	/^	ETH_RESET_PHY		= 1 << 6,	\/* Transceiver\/PHY *\/$/;"	e	enum:ethtool_reset_flags
ETH_RESET_RAM	include/linux/ethtool.h	/^	ETH_RESET_RAM		= 1 << 7,	\/* RAM shared between$/;"	e	enum:ethtool_reset_flags
ETH_RESET_SHARED_SHIFT	include/linux/ethtool.h	/^#define ETH_RESET_SHARED_SHIFT	/;"	d
ETH_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AD_CLK_MARK, ETH_RXD0_MARK, VI0_G3_MARK, MSIOF2_SYNC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_RXD1_MARK, VI0_G4_MARK, MSIOF2_SS1_B_MARK, SCIF4_RXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_RX_NFC_IP4	include/linux/ethtool.h	/^#define	ETH_RX_NFC_IP4	/;"	d
ETH_SANDBOX	drivers/net/Kconfig	/^config ETH_SANDBOX$/;"	c
ETH_SANDBOX_RAW	drivers/net/Kconfig	/^config ETH_SANDBOX_RAW$/;"	c
ETH_SS_FEATURES	include/linux/ethtool.h	/^	ETH_SS_FEATURES,$/;"	e	enum:ethtool_stringset
ETH_SS_NTUPLE_FILTERS	include/linux/ethtool.h	/^	ETH_SS_NTUPLE_FILTERS,$/;"	e	enum:ethtool_stringset
ETH_SS_PRIV_FLAGS	include/linux/ethtool.h	/^	ETH_SS_PRIV_FLAGS,$/;"	e	enum:ethtool_stringset
ETH_SS_STATS	include/linux/ethtool.h	/^	ETH_SS_STATS,$/;"	e	enum:ethtool_stringset
ETH_SS_TEST	include/linux/ethtool.h	/^	ETH_SS_TEST		= 0,$/;"	e	enum:ethtool_stringset
ETH_STATE_ACTIVE	include/net.h	/^	ETH_STATE_ACTIVE$/;"	e	enum:eth_state_t
ETH_STATE_INIT	include/net.h	/^	ETH_STATE_INIT,$/;"	e	enum:eth_state_t
ETH_STATE_PASSIVE	include/net.h	/^	ETH_STATE_PASSIVE,$/;"	e	enum:eth_state_t
ETH_TEST_FL_FAILED	include/linux/ethtool.h	/^	ETH_TEST_FL_FAILED	= (1 << 1),	\/* test passed \/ failed *\/$/;"	e	enum:ethtool_test_flags
ETH_TEST_FL_OFFLINE	include/linux/ethtool.h	/^	ETH_TEST_FL_OFFLINE	= (1 << 0),	\/* online \/ offline *\/$/;"	e	enum:ethtool_test_flags
ETH_TP_MDI	include/linux/ethtool.h	/^#define ETH_TP_MDI	/;"	d
ETH_TP_MDI_INVALID	include/linux/ethtool.h	/^#define ETH_TP_MDI_INVALID	/;"	d
ETH_TP_MDI_X	include/linux/ethtool.h	/^#define ETH_TP_MDI_X	/;"	d
ETH_TXCTRL	drivers/net/ethoc.c	/^#define	ETH_TXCTRL	/;"	d	file:
ETH_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TX_ER_MARK, SSI_SCK6_B_MARK, ETH_TXD0_MARK, VI0_R2_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SCK5_B_MARK, ETH_TXD1_MARK, VI0_G7_MARK, SCIF2_RXD_C_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
ETH_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona307835a0103	file:
ETH_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
ETH_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IIC1_SCL_D_MARK, AVB_TXD6_MARK, SSI_WS5_B_MARK, ETH_TX_EN_MARK,$/;"	e	enum:__anona307901d0103	file:
ETH_VDD_CFG	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define ETH_VDD_CFG	/;"	d
ETH_ZLEN	drivers/net/ftgmac100.c	/^#define ETH_ZLEN	/;"	d	file:
ETH_ZLEN	drivers/net/ftmac100.c	/^#define ETH_ZLEN	/;"	d	file:
ETH_ZLEN	drivers/net/lan91c96.c	/^#define ETH_ZLEN /;"	d	file:
ETH_ZLEN	drivers/net/rtl8139.c	/^#define ETH_ZLEN	/;"	d	file:
ETH_ZLEN	drivers/net/rtl8169.c	/^#define ETH_ZLEN	/;"	d	file:
ETH_ZLEN	drivers/net/smc91111.c	/^#define ETH_ZLEN /;"	d	file:
ETH_ZLEN	drivers/usb/gadget/ether.c	/^#define ETH_ZLEN	/;"	d	file:
ETH_ZLEN	drivers/usb/gadget/rndis.c	/^#define ETH_ZLEN	/;"	d	file:
ETH_ZLEN	include/usb_ether.h	/^#define ETH_ZLEN	/;"	d
ETIME	include/linux/errno.h	/^#define	ETIME	/;"	d
ETIMEDOUT	include/linux/errno.h	/^#define	ETIMEDOUT	/;"	d
ETM_MODULE_DETECT	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define	ETM_MODULE_DETECT /;"	d	file:
ETOOMANYREFS	include/linux/errno.h	/^#define	ETOOMANYREFS	/;"	d
ETOOSMALL	drivers/usb/gadget/storage_common.c	/^#define ETOOSMALL	/;"	d	file:
ETOOSMALL	include/linux/errno.h	/^#define ETOOSMALL	/;"	d
ETR3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ETR3	/;"	d
ETR3_CF9GR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define  ETR3_CF9GR	/;"	d
ETR3_CWORWRE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define  ETR3_CWORWRE	/;"	d
ETTUS_USRP_E	board/overo/overo.c	/^#define ETTUS_USRP_E	/;"	d	file:
ETVPE_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ETVPE_CLK_SEL	/;"	d	file:
ETVPE_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ETVPE_CLK_SHIFT	/;"	d	file:
ETXS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define ETXS	/;"	d
ETXTBSY	include/linux/errno.h	/^#define	ETXTBSY	/;"	d
ETX_CHAR	cmd/load.c	/^#define ETX_CHAR	/;"	d	file:
ET_BUSERR	arch/powerpc/include/asm/processor.h	/^#define     ET_BUSERR	/;"	d
ET_BUSTO	arch/powerpc/include/asm/processor.h	/^#define     ET_BUSTO	/;"	d
ET_COL_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_COL_MARK,	ET_TX_ER_MARK,	ET_RX_CLK_MARK,	ET_RX_DV_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_CORE	include/elf.h	/^#define ET_CORE	/;"	d
ET_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_RX_ER_MARK,	ET_CRS_MARK,		ET_MDC_MARK,	ET_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_DYN	include/elf.h	/^#define ET_DYN	/;"	d
ET_ERXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD0_MARK,	ET_ERXD1_MARK,	ET_ERXD2_MARK,	ET_ERXD3_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ERXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD0_MARK,	ET_ERXD1_MARK,	ET_ERXD2_MARK,	ET_ERXD3_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ERXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD0_MARK,	ET_ERXD1_MARK,	ET_ERXD2_MARK,	ET_ERXD3_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ERXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD0_MARK,	ET_ERXD1_MARK,	ET_ERXD2_MARK,	ET_ERXD3_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ERXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD4_MARK,	ET_ERXD5_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ERXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD4_MARK,	ET_ERXD5_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ERXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD6_MARK,	ET_ERXD7_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ERXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ERXD6_MARK,	ET_ERXD7_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ETXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_TX_CLK_MARK,	ET_TX_EN_MARK,	ET_ETXD0_MARK,	ET_ETXD1_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ETXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_TX_CLK_MARK,	ET_TX_EN_MARK,	ET_ETXD0_MARK,	ET_ETXD1_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ETXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ETXD2_MARK,	ET_ETXD3_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ETXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ETXD2_MARK,	ET_ETXD3_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_ETXD4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ETXD4_MARK,	ET_ETXD5_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ETXD5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ETXD4_MARK,	ET_ETXD5_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ETXD6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ETXD6_MARK,	ET_ETXD7_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_ETXD7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_ETXD6_MARK,	ET_ETXD7_MARK, \/* for GEther *\/$/;"	e	enum:__anona304c1340103	file:
ET_EXEC	include/elf.h	/^#define ET_EXEC	/;"	d
ET_GTX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_LINK_MARK,	ET_PHY_INT_MARK,	ET_WOL_MARK,	ET_GTX_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_HIOS	include/elf.h	/^#define ET_HIOS	/;"	d
ET_HIPROC	include/elf.h	/^#define ET_HIPROC	/;"	d
ET_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_LINK_MARK,	ET_PHY_INT_MARK,	ET_WOL_MARK,	ET_GTX_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_LOOS	include/elf.h	/^#define ET_LOOS	/;"	d
ET_LOPROC	include/elf.h	/^#define ET_LOPROC	/;"	d
ET_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_RX_ER_MARK,	ET_CRS_MARK,		ET_MDC_MARK,	ET_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_RX_ER_MARK,	ET_CRS_MARK,		ET_MDC_MARK,	ET_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_NCFG	arch/powerpc/include/asm/processor.h	/^#define     ET_NCFG	/;"	d
ET_NONE	include/elf.h	/^#define ET_NONE	/;"	d
ET_NUM	include/elf.h	/^#define ET_NUM	/;"	d
ET_PARITY	arch/powerpc/include/asm/processor.h	/^#define     ET_PARITY	/;"	d
ET_PHY_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_LINK_MARK,	ET_PHY_INT_MARK,	ET_WOL_MARK,	ET_GTX_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_PROT	arch/powerpc/include/asm/processor.h	/^#define     ET_PROT	/;"	d
ET_REL	include/elf.h	/^#define ET_REL	/;"	d
ET_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_COL_MARK,	ET_TX_ER_MARK,	ET_RX_CLK_MARK,	ET_RX_DV_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_COL_MARK,	ET_TX_ER_MARK,	ET_RX_CLK_MARK,	ET_RX_DV_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_RX_ER_MARK,	ET_CRS_MARK,		ET_MDC_MARK,	ET_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_TX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_TX_CLK_MARK,	ET_TX_EN_MARK,	ET_ETXD0_MARK,	ET_ETXD1_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_TX_CLK_MARK,	ET_TX_EN_MARK,	ET_ETXD0_MARK,	ET_ETXD1_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_TX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_COL_MARK,	ET_TX_ER_MARK,	ET_RX_CLK_MARK,	ET_RX_DV_MARK,$/;"	e	enum:__anona304c1340103	file:
ET_WOL_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	ET_LINK_MARK,	ET_PHY_INT_MARK,	ET_WOL_MARK,	ET_GTX_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
EU00	include/mpc5xxx.h	/^	volatile u32 EU00;		\/* SDMA + 0x80 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU01	include/mpc5xxx.h	/^	volatile u32 EU01;		\/* SDMA + 0x84 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU02	include/mpc5xxx.h	/^	volatile u32 EU02;		\/* SDMA + 0x88 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU03	include/mpc5xxx.h	/^	volatile u32 EU03;		\/* SDMA + 0x8c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU04	include/mpc5xxx.h	/^	volatile u32 EU04;		\/* SDMA + 0x90 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU05	include/mpc5xxx.h	/^	volatile u32 EU05;		\/* SDMA + 0x94 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU06	include/mpc5xxx.h	/^	volatile u32 EU06;		\/* SDMA + 0x98 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU07	include/mpc5xxx.h	/^	volatile u32 EU07;		\/* SDMA + 0x9c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU10	include/mpc5xxx.h	/^	volatile u32 EU10;		\/* SDMA + 0xa0 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU11	include/mpc5xxx.h	/^	volatile u32 EU11;		\/* SDMA + 0xa4 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU12	include/mpc5xxx.h	/^	volatile u32 EU12;		\/* SDMA + 0xa8 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU13	include/mpc5xxx.h	/^	volatile u32 EU13;		\/* SDMA + 0xac *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU14	include/mpc5xxx.h	/^	volatile u32 EU14;		\/* SDMA + 0xb0 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU15	include/mpc5xxx.h	/^	volatile u32 EU15;		\/* SDMA + 0xb4 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU16	include/mpc5xxx.h	/^	volatile u32 EU16;		\/* SDMA + 0xb8 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU17	include/mpc5xxx.h	/^	volatile u32 EU17;		\/* SDMA + 0xbc *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU20	include/mpc5xxx.h	/^	volatile u32 EU20;		\/* SDMA + 0xc0 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU21	include/mpc5xxx.h	/^	volatile u32 EU21;		\/* SDMA + 0xc4 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU22	include/mpc5xxx.h	/^	volatile u32 EU22;		\/* SDMA + 0xc8 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU23	include/mpc5xxx.h	/^	volatile u32 EU23;		\/* SDMA + 0xcc *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU24	include/mpc5xxx.h	/^	volatile u32 EU24;		\/* SDMA + 0xd0 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU25	include/mpc5xxx.h	/^	volatile u32 EU25;		\/* SDMA + 0xd4 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU26	include/mpc5xxx.h	/^	volatile u32 EU26;		\/* SDMA + 0xd8 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU27	include/mpc5xxx.h	/^	volatile u32 EU27;		\/* SDMA + 0xdc *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU30	include/mpc5xxx.h	/^	volatile u32 EU30;		\/* SDMA + 0xe0 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU31	include/mpc5xxx.h	/^	volatile u32 EU31;		\/* SDMA + 0xe4 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU32	include/mpc5xxx.h	/^	volatile u32 EU32;		\/* SDMA + 0xe8 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU33	include/mpc5xxx.h	/^	volatile u32 EU33;		\/* SDMA + 0xec *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU34	include/mpc5xxx.h	/^	volatile u32 EU34;		\/* SDMA + 0xf0 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU35	include/mpc5xxx.h	/^	volatile u32 EU35;		\/* SDMA + 0xf4 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU36	include/mpc5xxx.h	/^	volatile u32 EU36;		\/* SDMA + 0xf8 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EU37	include/mpc5xxx.h	/^	volatile u32 EU37;		\/* SDMA + 0xfc *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
EUCLEAN	include/linux/errno.h	/^#define	EUCLEAN	/;"	d
EUNATCH	include/linux/errno.h	/^#define	EUNATCH	/;"	d
EUSERS	include/linux/errno.h	/^#define	EUSERS	/;"	d
EVENT_JTAG	arch/arm/include/asm/arch-tegra124/flow.h	/^#define EVENT_JTAG	/;"	d
EVENT_JTAG	arch/arm/include/asm/arch-tegra210/flow.h	/^#define EVENT_JTAG	/;"	d
EVENT_JTAG	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define EVENT_JTAG	/;"	d
EVENT_MODE_STOP	arch/arm/include/asm/arch-tegra124/flow.h	/^#define EVENT_MODE_STOP	/;"	d
EVENT_MODE_STOP	arch/arm/include/asm/arch-tegra210/flow.h	/^#define EVENT_MODE_STOP	/;"	d
EVENT_MODE_STOP	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define EVENT_MODE_STOP	/;"	d
EVENT_MSEC	arch/arm/include/asm/arch-tegra124/flow.h	/^#define EVENT_MSEC	/;"	d
EVENT_MSEC	arch/arm/include/asm/arch-tegra210/flow.h	/^#define EVENT_MSEC	/;"	d
EVENT_MSEC	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define EVENT_MSEC	/;"	d
EVENT_TRB_LEN	drivers/usb/host/xhci.h	/^#define EVENT_TRB_LEN(/;"	d
EVENT_USEC	arch/arm/include/asm/arch-tegra124/flow.h	/^#define EVENT_USEC	/;"	d
EVENT_USEC	arch/arm/include/asm/arch-tegra210/flow.h	/^#define EVENT_USEC	/;"	d
EVENT_ZERO_VAL_20	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define EVENT_ZERO_VAL_20	/;"	d
EVNTC	arch/sh/include/asm/cpu_sh7722.h	/^#define EVNTC /;"	d
EVT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT0 /;"	d
EVT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT1 /;"	d
EVT10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT10 /;"	d
EVT11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT11 /;"	d
EVT12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT12 /;"	d
EVT13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT13 /;"	d
EVT14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT14 /;"	d
EVT15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT15 /;"	d
EVT2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT2 /;"	d
EVT3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT3 /;"	d
EVT4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT4 /;"	d
EVT5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT5 /;"	d
EVT6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT6 /;"	d
EVT7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT7 /;"	d
EVT8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT8 /;"	d
EVT9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT9 /;"	d
EVTMON_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define EVTMON_BASE_ADDR /;"	d
EVT_EMU	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_EMU	/;"	d
EVT_EMU_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_EMU_P	/;"	d
EVT_EVX	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_EVX	/;"	d
EVT_EVX_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_EVX_P	/;"	d
EVT_IRPTEN	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IRPTEN	/;"	d
EVT_IRPTEN_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IRPTEN_P	/;"	d
EVT_IVG10	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG10	/;"	d
EVT_IVG10_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG10_P	/;"	d
EVT_IVG11	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG11	/;"	d
EVT_IVG11_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG11_P	/;"	d
EVT_IVG12	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG12	/;"	d
EVT_IVG12_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG12_P	/;"	d
EVT_IVG13	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG13	/;"	d
EVT_IVG13_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG13_P	/;"	d
EVT_IVG14	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG14	/;"	d
EVT_IVG14_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG14_P	/;"	d
EVT_IVG15	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG15	/;"	d
EVT_IVG15_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG15_P	/;"	d
EVT_IVG7	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG7	/;"	d
EVT_IVG7_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG7_P	/;"	d
EVT_IVG8	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG8	/;"	d
EVT_IVG8_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG8_P	/;"	d
EVT_IVG9	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG9	/;"	d
EVT_IVG9_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVG9_P	/;"	d
EVT_IVHW	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVHW	/;"	d
EVT_IVHW_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVHW_P	/;"	d
EVT_IVTMR	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVTMR	/;"	d
EVT_IVTMR_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_IVTMR_P	/;"	d
EVT_NMI	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_NMI	/;"	d
EVT_NMI_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_NMI_P	/;"	d
EVT_OVERRIDE	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define EVT_OVERRIDE /;"	d
EVT_RST	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_RST	/;"	d
EVT_RST_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EVT_RST_P	/;"	d
EV_ABS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_ABS	include/dt-bindings/input/linux-event-codes.h	/^#define EV_ABS	/;"	d
EV_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define EV_CNT	/;"	d
EV_CURRENT	include/elf.h	/^#define EV_CURRENT	/;"	d
EV_FF	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF	include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF	/;"	d
EV_FF_STATUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_FF_STATUS	include/dt-bindings/input/linux-event-codes.h	/^#define EV_FF_STATUS	/;"	d
EV_KEY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_KEY	include/dt-bindings/input/linux-event-codes.h	/^#define EV_KEY	/;"	d
EV_LED	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_LED	include/dt-bindings/input/linux-event-codes.h	/^#define EV_LED	/;"	d
EV_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define EV_MAX	/;"	d
EV_MSC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_MSC	include/dt-bindings/input/linux-event-codes.h	/^#define EV_MSC	/;"	d
EV_NONE	include/elf.h	/^#define EV_NONE	/;"	d
EV_NUM	include/elf.h	/^#define EV_NUM	/;"	d
EV_PWR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_PWR	include/dt-bindings/input/linux-event-codes.h	/^#define EV_PWR	/;"	d
EV_REL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REL	include/dt-bindings/input/linux-event-codes.h	/^#define EV_REL	/;"	d
EV_REP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_REP	include/dt-bindings/input/linux-event-codes.h	/^#define EV_REP	/;"	d
EV_SND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SND	include/dt-bindings/input/linux-event-codes.h	/^#define EV_SND	/;"	d
EV_SW	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SW	include/dt-bindings/input/linux-event-codes.h	/^#define EV_SW	/;"	d
EV_SYN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EV_SYN	include/dt-bindings/input/linux-event-codes.h	/^#define EV_SYN	/;"	d
EWIN_ACCESS_FULL	drivers/net/mvgbe.h	/^#define EWIN_ACCESS_FULL	/;"	d
EWIN_ACCESS_NOT_ALLOWED	drivers/net/mvgbe.h	/^#define EWIN_ACCESS_NOT_ALLOWED /;"	d
EWIN_ACCESS_READ_ONLY	drivers/net/mvgbe.h	/^#define EWIN_ACCESS_READ_ONLY	/;"	d
EWOULDBLOCK	include/linux/errno.h	/^#define	EWOULDBLOCK	/;"	d
EWS	include/sym53c8xx.h	/^	#define   EWS /;"	d
EX	include/i8042.h	/^#define EX	/;"	d
EXACT	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
EXAMPLES	doc/mkimage.1	/^.SH EXAMPLES$/;"	s	title:MKIMAGE
EXCAUSE	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE /;"	d
EXCAUSE0_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE0_P	/;"	d
EXCAUSE1_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE1_P	/;"	d
EXCAUSE2_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE2_P	/;"	d
EXCAUSE3_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE3_P	/;"	d
EXCAUSE4_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE4_P	/;"	d
EXCAUSE5_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE5_P	/;"	d
EXCAUSE_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define EXCAUSE_P	/;"	d
EXCCAUSE_ALLOCA	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_ALLOCA	/;"	d
EXCCAUSE_COPROCESSOR0_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR0_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR1_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR1_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR2_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR2_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR3_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR3_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR4_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR4_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR5_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR5_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR6_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR6_DISABLED	/;"	d
EXCCAUSE_COPROCESSOR7_DISABLED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_COPROCESSOR7_DISABLED	/;"	d
EXCCAUSE_DTLB_MISS	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_DTLB_MISS	/;"	d
EXCCAUSE_DTLB_MULTIHIT	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_DTLB_MULTIHIT	/;"	d
EXCCAUSE_DTLB_PRIVILEGE	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_DTLB_PRIVILEGE	/;"	d
EXCCAUSE_DTLB_SIZE_RESTRICTION	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_DTLB_SIZE_RESTRICTION	/;"	d
EXCCAUSE_EXCCAUSE_MASK	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_EXCCAUSE_MASK	/;"	d
EXCCAUSE_EXCCAUSE_SHIFT	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_EXCCAUSE_SHIFT	/;"	d
EXCCAUSE_FETCH_CACHE_ATTRIBUTE	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_FETCH_CACHE_ATTRIBUTE	/;"	d
EXCCAUSE_ILLEGAL_INSTRUCTION	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_ILLEGAL_INSTRUCTION	/;"	d
EXCCAUSE_INSTRUCTION_FETCH_ERROR	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_INSTRUCTION_FETCH_ERROR	/;"	d
EXCCAUSE_INSTR_ADDR_ERROR	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_INSTR_ADDR_ERROR	/;"	d
EXCCAUSE_INSTR_DATA_ERROR	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_INSTR_DATA_ERROR	/;"	d
EXCCAUSE_INTEGER_DIVIDE_BY_ZERO	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_INTEGER_DIVIDE_BY_ZERO	/;"	d
EXCCAUSE_ITLB_MISS	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_ITLB_MISS	/;"	d
EXCCAUSE_ITLB_MULTIHIT	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_ITLB_MULTIHIT	/;"	d
EXCCAUSE_ITLB_PRIVILEGE	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_ITLB_PRIVILEGE	/;"	d
EXCCAUSE_ITLB_SIZE_RESTRICTION	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_ITLB_SIZE_RESTRICTION	/;"	d
EXCCAUSE_LAST	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_LAST	/;"	d
EXCCAUSE_LEVEL1_INTERRUPT	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_LEVEL1_INTERRUPT	/;"	d
EXCCAUSE_LOAD_CACHE_ATTRIBUTE	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_LOAD_CACHE_ATTRIBUTE	/;"	d
EXCCAUSE_LOAD_STORE_ADDR_ERROR	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_LOAD_STORE_ADDR_ERROR	/;"	d
EXCCAUSE_LOAD_STORE_DATA_ERROR	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_LOAD_STORE_DATA_ERROR	/;"	d
EXCCAUSE_LOAD_STORE_ERROR	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_LOAD_STORE_ERROR	/;"	d
EXCCAUSE_PRIVILEGED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_PRIVILEGED	/;"	d
EXCCAUSE_SPECULATION	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_SPECULATION	/;"	d
EXCCAUSE_STORE_CACHE_ATTRIBUTE	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_STORE_CACHE_ATTRIBUTE	/;"	d
EXCCAUSE_SYSTEM_CALL	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_SYSTEM_CALL	/;"	d
EXCCAUSE_UNALIGNED	arch/xtensa/include/asm/regs.h	/^#define EXCCAUSE_UNALIGNED	/;"	d
EXCEL_MANUFACT	include/flash.h	/^#define EXCEL_MANUFACT	/;"	d
EXCEPTION_STACK_SIZE	arch/openrisc/cpu/start.S	/^#define EXCEPTION_STACK_SIZE /;"	d	file:
EXCEP_VECTOR_CPU_RESET_VECTOR	arch/arm/include/asm/arch-tegra/ap.h	/^#define EXCEP_VECTOR_CPU_RESET_VECTOR	/;"	d
EXCEP_VECTOR_CPU_RESET_VECTOR	arch/arm/mach-tegra/cpu.h	/^#define EXCEP_VECTOR_CPU_RESET_VECTOR	/;"	d
EXC_AC	arch/x86/include/asm/interrupt.h	/^	EXC_AC,$/;"	e	enum:x86_exception
EXC_ALIGNMENT	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_ALIGNMENT	/;"	d
EXC_BP	arch/x86/include/asm/interrupt.h	/^	EXC_BP,$/;"	e	enum:x86_exception
EXC_BR	arch/x86/include/asm/interrupt.h	/^	EXC_BR,$/;"	e	enum:x86_exception
EXC_BUS_ERROR	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_BUS_ERROR	/;"	d
EXC_CSO	arch/x86/include/asm/interrupt.h	/^	EXC_CSO,$/;"	e	enum:x86_exception
EXC_DATA_PAGE_FAULT	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_DATA_PAGE_FAULT	/;"	d
EXC_DB	arch/x86/include/asm/interrupt.h	/^	EXC_DB,$/;"	e	enum:x86_exception
EXC_DE	arch/x86/include/asm/interrupt.h	/^	EXC_DE = 0,$/;"	e	enum:x86_exception
EXC_DF	arch/x86/include/asm/interrupt.h	/^	EXC_DF,$/;"	e	enum:x86_exception
EXC_DTLB_MISS	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_DTLB_MISS	/;"	d
EXC_EXT_IRQ	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_EXT_IRQ	/;"	d
EXC_FLOAT_POINT	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_FLOAT_POINT	/;"	d
EXC_GP	arch/x86/include/asm/interrupt.h	/^	EXC_GP,$/;"	e	enum:x86_exception
EXC_ILLEGAL_INSTR	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_ILLEGAL_INSTR	/;"	d
EXC_INSTR_PAGE_FAULT	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_INSTR_PAGE_FAULT	/;"	d
EXC_ITLB_MISS	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_ITLB_MISS	/;"	d
EXC_MC	arch/x86/include/asm/interrupt.h	/^	EXC_MC,$/;"	e	enum:x86_exception
EXC_MF	arch/x86/include/asm/interrupt.h	/^	EXC_MF = 16,$/;"	e	enum:x86_exception
EXC_NM	arch/x86/include/asm/interrupt.h	/^	EXC_NM,$/;"	e	enum:x86_exception
EXC_NMI	arch/x86/include/asm/interrupt.h	/^	EXC_NMI,$/;"	e	enum:x86_exception
EXC_NP	arch/x86/include/asm/interrupt.h	/^	EXC_NP,$/;"	e	enum:x86_exception
EXC_OF	arch/x86/include/asm/interrupt.h	/^	EXC_OF,$/;"	e	enum:x86_exception
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc512x/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc5xx/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc5xxx/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc8260/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc83xx/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc86xx/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/mpc8xx/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/cpu/ppc4xx/start.S	/^	. = EXC_OFF_SYS_RESET$/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/include/asm/immap_512x.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	arch/powerpc/include/asm/ppc4xx.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	include/mpc5xx.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	include/mpc5xxx.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	include/mpc8260.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	include/mpc83xx.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	include/mpc86xx.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_OFF_SYS_RESET	include/mpc8xx.h	/^#define EXC_OFF_SYS_RESET	/;"	d
EXC_PF	arch/x86/include/asm/interrupt.h	/^	EXC_PF,$/;"	e	enum:x86_exception
EXC_RANGE	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_RANGE	/;"	d
EXC_RESET	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_RESET	/;"	d
EXC_SS	arch/x86/include/asm/interrupt.h	/^	EXC_SS,$/;"	e	enum:x86_exception
EXC_SYSCALL	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_SYSCALL	/;"	d
EXC_TABLE_DEFAULT	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_DEFAULT	/;"	d
EXC_TABLE_DOUBLE_SAVE	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_DOUBLE_SAVE	/;"	d
EXC_TABLE_FAST_KERNEL	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_FAST_KERNEL	/;"	d
EXC_TABLE_FAST_USER	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_FAST_USER	/;"	d
EXC_TABLE_FIXUP	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_FIXUP	/;"	d
EXC_TABLE_KSTK	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_KSTK	/;"	d
EXC_TABLE_PARAM	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_PARAM	/;"	d
EXC_TABLE_SIZE	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_SIZE	/;"	d
EXC_TABLE_SYSCALL_SAVE	arch/xtensa/include/asm/ptrace.h	/^#define EXC_TABLE_SYSCALL_SAVE	/;"	d
EXC_TIMER	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_TIMER	/;"	d
EXC_TRAP	arch/openrisc/include/asm/openrisc_exc.h	/^#define EXC_TRAP	/;"	d
EXC_TS	arch/x86/include/asm/interrupt.h	/^	EXC_TS,$/;"	e	enum:x86_exception
EXC_UD	arch/x86/include/asm/interrupt.h	/^	EXC_UD,$/;"	e	enum:x86_exception
EXC_VE	arch/x86/include/asm/interrupt.h	/^	EXC_VE$/;"	e	enum:x86_exception
EXC_XM	arch/x86/include/asm/interrupt.h	/^	EXC_XM,$/;"	e	enum:x86_exception
EXDEV	fs/yaffs2/yportenv.h	/^#define EXDEV	/;"	d
EXDEV	include/linux/errno.h	/^#define	EXDEV	/;"	d
EXECUTING	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define EXECUTING	/;"	d
EXEC_TYPE_OFFSET	arch/arc/Makefile	/^	EXEC_TYPE_OFFSET=16$/;"	m
EXEC_TYPE_OFFSET	arch/arc/Makefile	/^	EXEC_TYPE_OFFSET=17$/;"	m
EXFULL	include/linux/errno.h	/^#define	EXFULL	/;"	d
EXIER_CIE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_CIE	/;"	d
EXIER_D0IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_D0IE	/;"	d
EXIER_D1IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_D1IE	/;"	d
EXIER_D2IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_D2IE	/;"	d
EXIER_D3IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_D3IE	/;"	d
EXIER_E0IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_E0IE	/;"	d
EXIER_E1IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_E1IE	/;"	d
EXIER_E2IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_E2IE	/;"	d
EXIER_E3IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_E3IE	/;"	d
EXIER_E4IE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_E4IE	/;"	d
EXIER_JRIE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_JRIE	/;"	d
EXIER_JTIE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_JTIE	/;"	d
EXIER_SRIE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_SRIE	/;"	d
EXIER_STIE	arch/powerpc/include/asm/processor.h	/^#define   EXIER_STIE	/;"	d
EXIT_SUCCESS	common/cli_hush.c	/^#define EXIT_SUCCESS /;"	d	file:
EXIT_SUCCESS	scripts/kconfig/zconf.tab.c	/^#      define EXIT_SUCCESS /;"	d	file:
EXIT_SUCCESS	scripts/kconfig/zconf.tab.c	/^#    define EXIT_SUCCESS /;"	d	file:
EXLEN	lib/zlib/inflate.h	/^    EXLEN,      \/* i: waiting for extra length (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
EXPANSION_EEPROM_I2C_ADDRESS	board/overo/overo.c	/^#define EXPANSION_EEPROM_I2C_ADDRESS	/;"	d	file:
EXPANSION_EEPROM_I2C_ADDRESS	board/ti/beagle/beagle.c	/^#define EXPANSION_EEPROM_I2C_ADDRESS	/;"	d	file:
EXPANSION_EEPROM_I2C_BUS	board/overo/overo.c	/^#define EXPANSION_EEPROM_I2C_BUS	/;"	d	file:
EXPANSION_EEPROM_I2C_BUS	board/ti/beagle/beagle.c	/^#define EXPANSION_EEPROM_I2C_BUS	/;"	d	file:
EXPANSION_EEPROM_I2C_BUS	include/configs/omap3_logic.h	/^#define EXPANSION_EEPROM_I2C_BUS	/;"	d
EXPANSION_ENABLENPAGE	include/linux/mii.h	/^#define EXPANSION_ENABLENPAGE	/;"	d
EXPANSION_LCWP	include/linux/mii.h	/^#define EXPANSION_LCWP	/;"	d
EXPANSION_MFAULTS	include/linux/mii.h	/^#define EXPANSION_MFAULTS	/;"	d
EXPANSION_NPCAPABLE	include/linux/mii.h	/^#define EXPANSION_NPCAPABLE	/;"	d
EXPANSION_NWAY	include/linux/mii.h	/^#define EXPANSION_NWAY	/;"	d
EXPANSION_RESV	include/linux/mii.h	/^#define EXPANSION_RESV	/;"	d
EXPERT	Kconfig	/^menuconfig EXPERT$/;"	c	menu:General setup
EXPEVT	arch/sh/include/asm/cpu_sh7720.h	/^#define EXPEVT	/;"	d
EXPEVT	arch/sh/include/asm/cpu_sh7722.h	/^#define EXPEVT	/;"	d
EXPEVT	arch/sh/include/asm/cpu_sh7723.h	/^#define EXPEVT	/;"	d
EXPEVT	arch/sh/include/asm/cpu_sh7724.h	/^#define EXPEVT	/;"	d
EXPEVT	arch/sh/include/asm/cpu_sh7750.h	/^#define EXPEVT	/;"	d
EXPEVT	arch/sh/include/asm/cpu_sh7780.h	/^#define	EXPEVT	/;"	d
EXPEVT	arch/sh/include/asm/cpu_sh7785.h	/^#define	EXPEVT	/;"	d
EXPEVT_A	board/renesas/sh7752evb/lowlevel_init.S	/^EXPEVT_A:		.long	0xff000024$/;"	l
EXPEVT_A	board/renesas/sh7753evb/lowlevel_init.S	/^EXPEVT_A:		.long	0xff000024$/;"	l
EXPEVT_A	board/renesas/sh7757lcr/lowlevel_init.S	/^EXPEVT_A:		.long	0xff000024$/;"	l
EXPEVT_POWER_ON_RESET	board/renesas/sh7752evb/lowlevel_init.S	/^EXPEVT_POWER_ON_RESET:	.long	0x00000000$/;"	l
EXPEVT_POWER_ON_RESET	board/renesas/sh7753evb/lowlevel_init.S	/^EXPEVT_POWER_ON_RESET:	.long	0x00000000$/;"	l
EXPEVT_POWER_ON_RESET	board/renesas/sh7757lcr/lowlevel_init.S	/^EXPEVT_POWER_ON_RESET:	.long	0x00000000$/;"	l
EXPI_CLK_CFG_CLK_EN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define EXPI_CLK_CFG_CLK_EN	/;"	d
EXPI_CLK_CFG_INT_CLK_EN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define EXPI_CLK_CFG_INT_CLK_EN	/;"	d
EXPI_CLK_CFG_LOW_COMPR	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define EXPI_CLK_CFG_LOW_COMPR	/;"	d
EXPI_CLK_CFG_RST	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define EXPI_CLK_CFG_RST	/;"	d
EXPI_CLK_CFG_SEL_PLL2	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define EXPI_CLK_CFG_SEL_PLL2	/;"	d
EXPI_CLK_SYNT_EN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define EXPI_CLK_SYNT_EN	/;"	d
EXPORT	arch/mips/include/asm/asm.h	/^#define EXPORT(/;"	d
EXPORT_FUNC	common/exports.c	/^#define EXPORT_FUNC(/;"	d	file:
EXPORT_FUNC	examples/standalone/stubs.c	/^#define EXPORT_FUNC(/;"	d	file:
EXPORT_FUNC	include/_exports.h	/^#define EXPORT_FUNC(/;"	d
EXPORT_FUNC	include/exports.h	/^#define EXPORT_FUNC(/;"	d
EXPORT_SYMBOL	include/linux/compat.h	/^#define EXPORT_SYMBOL(/;"	d
EXPORT_SYMBOL_GPL	include/linux/compat.h	/^#define EXPORT_SYMBOL_GPL(/;"	d
EXPRESS	include/lattice.h	/^#define EXPRESS	/;"	d
EXPR_AND	scripts/kconfig/expr.h	/^#define EXPR_AND(/;"	d
EXPR_H	scripts/kconfig/expr.h	/^#define EXPR_H$/;"	d
EXPR_NOT	scripts/kconfig/expr.h	/^#define EXPR_NOT(/;"	d
EXPR_OR	scripts/kconfig/expr.h	/^#define EXPR_OR(/;"	d
EXT	include/i8042.h	/^#define EXT	/;"	d
EXT	include/sym53c8xx.h	/^	#define   EXT /;"	d
EXT2_BLOCK_SIZE	include/ext_common.h	/^#define EXT2_BLOCK_SIZE(/;"	d
EXT2_FT_DIR	include/ext_common.h	/^#define EXT2_FT_DIR	/;"	d
EXT2_JOURNAL_INO	fs/ext4/ext4_journal.h	/^#define EXT2_JOURNAL_INO	/;"	d
EXT2_JOURNAL_SUPERBLOCK	fs/ext4/ext4_journal.h	/^#define EXT2_JOURNAL_SUPERBLOCK	/;"	d
EXT2_MAGIC	include/ext_common.h	/^#define	EXT2_MAGIC	/;"	d
EXT2_MAX_BLOCK_LOG_SIZE	include/ext_common.h	/^#define EXT2_MAX_BLOCK_LOG_SIZE	/;"	d
EXT2_MAX_BLOCK_SIZE	include/ext_common.h	/^#define EXT2_MAX_BLOCK_SIZE	/;"	d
EXT2_MAX_SYMLINKCNT	include/ext_common.h	/^#define	EXT2_MAX_SYMLINKCNT	/;"	d
EXT2_MIN_BLOCK_LOG_SIZE	include/ext_common.h	/^#define EXT2_MIN_BLOCK_LOG_SIZE	/;"	d
EXT2_MIN_BLOCK_SIZE	include/ext_common.h	/^#define EXT2_MIN_BLOCK_SIZE	/;"	d
EXT2_PATH_MAX	include/ext_common.h	/^#define EXT2_PATH_MAX	/;"	d
EXT2_ROOT_INO	include/ext_common.h	/^#define EXT2_ROOT_INO	/;"	d
EXT3_FEATURE_INCOMPAT_RECOVER	fs/ext4/ext4_journal.h	/^#define EXT3_FEATURE_INCOMPAT_RECOVER	/;"	d
EXT3_JOURNAL_COMMIT_BLOCK	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_COMMIT_BLOCK	/;"	d
EXT3_JOURNAL_DESCRIPTOR_BLOCK	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_DESCRIPTOR_BLOCK	/;"	d
EXT3_JOURNAL_FLAG_DELETED	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_FLAG_DELETED	/;"	d
EXT3_JOURNAL_FLAG_ESCAPE	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_FLAG_ESCAPE	/;"	d
EXT3_JOURNAL_FLAG_LAST_TAG	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_FLAG_LAST_TAG	/;"	d
EXT3_JOURNAL_FLAG_SAME_UUID	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_FLAG_SAME_UUID	/;"	d
EXT3_JOURNAL_MAGIC_NUMBER	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_MAGIC_NUMBER	/;"	d
EXT3_JOURNAL_REVOKE_BLOCK	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_REVOKE_BLOCK	/;"	d
EXT3_JOURNAL_SUPERBLOCK_V1	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_SUPERBLOCK_V1	/;"	d
EXT3_JOURNAL_SUPERBLOCK_V2	fs/ext4/ext4_journal.h	/^#define EXT3_JOURNAL_SUPERBLOCK_V2	/;"	d
EXT4_BG_BLOCK_UNINIT	include/ext4fs.h	/^#define EXT4_BG_BLOCK_UNINIT	/;"	d
EXT4_BG_INODE_UNINIT	include/ext4fs.h	/^#define EXT4_BG_INODE_UNINIT	/;"	d
EXT4_BG_INODE_ZEROED	include/ext4fs.h	/^#define EXT4_BG_INODE_ZEROED	/;"	d
EXT4_EXTENTS_FL	include/ext4fs.h	/^#define EXT4_EXTENTS_FL	/;"	d
EXT4_EXT_MAGIC	include/ext4fs.h	/^#define EXT4_EXT_MAGIC	/;"	d
EXT4_FEATURE_INCOMPAT_64BIT	include/ext4fs.h	/^#define EXT4_FEATURE_INCOMPAT_64BIT	/;"	d
EXT4_FEATURE_INCOMPAT_EXTENTS	include/ext4fs.h	/^#define EXT4_FEATURE_INCOMPAT_EXTENTS	/;"	d
EXT4_FEATURE_RO_COMPAT_GDT_CSUM	include/ext4fs.h	/^#define EXT4_FEATURE_RO_COMPAT_GDT_CSUM	/;"	d
EXT4_INDEX_FL	include/ext4fs.h	/^#define EXT4_INDEX_FL	/;"	d
EXT4_INDIRECT_BLOCKS	include/ext4fs.h	/^#define EXT4_INDIRECT_BLOCKS	/;"	d
EXTAL2OUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	RESETOUTS__MARK, EXTAL2OUT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
EXTCLK_33_33	include/configs/yucca.h	/^#define EXTCLK_33_33	/;"	d
EXTCLK_50	include/configs/yucca.h	/^#define EXTCLK_50	/;"	d
EXTCLK_66_66	include/configs/yucca.h	/^#define EXTCLK_66_66	/;"	d
EXTCLK_83	include/configs/yucca.h	/^#define EXTCLK_83	/;"	d
EXTCP	drivers/usb/musb-new/omap2430.h	/^#	define	EXTCP	/;"	d
EXTENDED_ID_NAND	include/linux/mtd/nand.h	/^#define EXTENDED_ID_NAND(/;"	d
EXTENDED_TEMP	arch/arm/mach-keystone/ddr3_spd.c	/^	EXTENDED_TEMP$/;"	e	enum:srt	file:
EXTENSIONID	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define EXTENSIONID	/;"	d
EXTLP0	drivers/usb/host/r8a66597.h	/^#define	EXTLP0	/;"	d
EXTLP_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	EXTLP_MARK, SCIFA1_SCK_MARK, PORT226_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
EXTRA	lib/zlib/inflate.h	/^    EXTRA,      \/* i: waiting for extra bytes (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
EXTRACT_SDMMC_CHANGE_VERSION	include/mmc.h	/^#define EXTRACT_SDMMC_CHANGE_VERSION(/;"	d
EXTRACT_SDMMC_MAJOR_VERSION	include/mmc.h	/^#define EXTRACT_SDMMC_MAJOR_VERSION(/;"	d
EXTRACT_SDMMC_MINOR_VERSION	include/mmc.h	/^#define EXTRACT_SDMMC_MINOR_VERSION(/;"	d
EXTRAVERSION	Makefile	/^EXTRAVERSION =$/;"	m
EXTRA_DELAY	drivers/usb/host/isp116x-hcd.c	/^#define EXTRA_DELAY	/;"	d	file:
EXTRA_FIELD	lib/gunzip.c	/^#define EXTRA_FIELD	/;"	d	file:
EXTRA_HEADER_INFO_FLAG	fs/yaffs2/yaffs_packedtags2.c	/^#define EXTRA_HEADER_INFO_FLAG	/;"	d	file:
EXTRA_OBJECT_TYPE_MASK	fs/yaffs2/yaffs_packedtags2.c	/^#define EXTRA_OBJECT_TYPE_MASK /;"	d	file:
EXTRA_OBJECT_TYPE_SHIFT	fs/yaffs2/yaffs_packedtags2.c	/^#define EXTRA_OBJECT_TYPE_SHIFT /;"	d	file:
EXTRA_OEN_CLK	drivers/ddr/microchip/ddr2_regs.h	/^#define EXTRA_OEN_CLK(/;"	d
EXTRA_SHADOWS_FLAG	fs/yaffs2/yaffs_packedtags2.c	/^#define EXTRA_SHADOWS_FLAG	/;"	d	file:
EXTRA_SHRINK_FLAG	fs/yaffs2/yaffs_packedtags2.c	/^#define EXTRA_SHRINK_FLAG	/;"	d	file:
EXTRA_SPARE_FLAGS	fs/yaffs2/yaffs_packedtags2.c	/^#define EXTRA_SPARE_FLAGS	/;"	d	file:
EXTRA_STATE	lib/zlib/deflate.h	/^#define EXTRA_STATE /;"	d
EXTRA_THREAD_STRUCT	arch/arm/include/asm/proc-armv/processor.h	/^#define EXTRA_THREAD_STRUCT	/;"	d
EXTRA_THREAD_STRUCT_INIT	arch/arm/include/asm/proc-armv/processor.h	/^#define EXTRA_THREAD_STRUCT_INIT	/;"	d
EXT_ACCESS_BURST_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define EXT_ACCESS_BURST_LENGTH	/;"	d
EXT_CLK	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define EXT_CLK	/;"	d
EXT_CLK	include/dm/platform_data/serial_sh.h	/^	EXT_CLK,$/;"	e	enum:sh_clk_mode
EXT_CLK_1	arch/arm/include/asm/arch-mx7/clock.h	/^	EXT_CLK_1,$/;"	e	enum:clk_root_src
EXT_CLK_2	arch/arm/include/asm/arch-mx7/clock.h	/^	EXT_CLK_2,$/;"	e	enum:clk_root_src
EXT_CLK_3	arch/arm/include/asm/arch-mx7/clock.h	/^	EXT_CLK_3,$/;"	e	enum:clk_root_src
EXT_CLK_4	arch/arm/include/asm/arch-mx7/clock.h	/^	EXT_CLK_4,$/;"	e	enum:clk_root_src
EXT_CMD_TYPE_DISPATCH	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_DISPATCH	/;"	d	file:
EXT_CMD_TYPE_DISP_WR	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_DISP_WR	/;"	d	file:
EXT_CMD_TYPE_FINAL	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_FINAL	/;"	d	file:
EXT_CMD_TYPE_LAST_RW	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_LAST_RW	/;"	d	file:
EXT_CMD_TYPE_MONO	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_MONO	/;"	d	file:
EXT_CMD_TYPE_NAKED_RW	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_NAKED_RW	/;"	d	file:
EXT_CMD_TYPE_READ	drivers/mtd/nand/pxa3xx_nand.c	/^#define EXT_CMD_TYPE_READ	/;"	d	file:
EXT_CPU_ACCESS_ACTIVE	board/micronas/vct/ebi.h	/^#define EXT_CPU_ACCESS_ACTIVE	/;"	d
EXT_CPU_IORDY_SL	board/micronas/vct/ebi.h	/^#define EXT_CPU_IORDY_SL	/;"	d
EXT_CSD_BOOT_ACK	include/mmc.h	/^#define EXT_CSD_BOOT_ACK(/;"	d
EXT_CSD_BOOT_ACK_ENABLE	include/mmc.h	/^#define EXT_CSD_BOOT_ACK_ENABLE	/;"	d
EXT_CSD_BOOT_BUS_WIDTH	include/mmc.h	/^#define EXT_CSD_BOOT_BUS_WIDTH	/;"	d
EXT_CSD_BOOT_BUS_WIDTH_MODE	include/mmc.h	/^#define EXT_CSD_BOOT_BUS_WIDTH_MODE(/;"	d
EXT_CSD_BOOT_BUS_WIDTH_RESET	include/mmc.h	/^#define EXT_CSD_BOOT_BUS_WIDTH_RESET(/;"	d
EXT_CSD_BOOT_BUS_WIDTH_WIDTH	include/mmc.h	/^#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(/;"	d
EXT_CSD_BOOT_MULT	include/mmc.h	/^#define EXT_CSD_BOOT_MULT	/;"	d
EXT_CSD_BOOT_PARTITION_ENABLE	include/mmc.h	/^#define EXT_CSD_BOOT_PARTITION_ENABLE	/;"	d
EXT_CSD_BOOT_PART_NUM	include/mmc.h	/^#define EXT_CSD_BOOT_PART_NUM(/;"	d
EXT_CSD_BUS_WIDTH	include/mmc.h	/^#define EXT_CSD_BUS_WIDTH	/;"	d
EXT_CSD_BUS_WIDTH_1	include/mmc.h	/^#define EXT_CSD_BUS_WIDTH_1	/;"	d
EXT_CSD_BUS_WIDTH_4	include/mmc.h	/^#define EXT_CSD_BUS_WIDTH_4	/;"	d
EXT_CSD_BUS_WIDTH_8	include/mmc.h	/^#define EXT_CSD_BUS_WIDTH_8	/;"	d
EXT_CSD_CARD_TYPE	include/mmc.h	/^#define EXT_CSD_CARD_TYPE	/;"	d
EXT_CSD_CARD_TYPE_26	include/mmc.h	/^#define EXT_CSD_CARD_TYPE_26	/;"	d
EXT_CSD_CARD_TYPE_52	include/mmc.h	/^#define EXT_CSD_CARD_TYPE_52	/;"	d
EXT_CSD_CARD_TYPE_DDR_1_2V	include/mmc.h	/^#define EXT_CSD_CARD_TYPE_DDR_1_2V	/;"	d
EXT_CSD_CARD_TYPE_DDR_1_8V	include/mmc.h	/^#define EXT_CSD_CARD_TYPE_DDR_1_8V	/;"	d
EXT_CSD_CARD_TYPE_DDR_52	include/mmc.h	/^#define EXT_CSD_CARD_TYPE_DDR_52	/;"	d
EXT_CSD_CMD_SET_CPSECURE	include/mmc.h	/^#define EXT_CSD_CMD_SET_CPSECURE	/;"	d
EXT_CSD_CMD_SET_NORMAL	include/mmc.h	/^#define EXT_CSD_CMD_SET_NORMAL	/;"	d
EXT_CSD_CMD_SET_SECURE	include/mmc.h	/^#define EXT_CSD_CMD_SET_SECURE	/;"	d
EXT_CSD_DDR_BUS_WIDTH_4	include/mmc.h	/^#define EXT_CSD_DDR_BUS_WIDTH_4	/;"	d
EXT_CSD_DDR_BUS_WIDTH_8	include/mmc.h	/^#define EXT_CSD_DDR_BUS_WIDTH_8	/;"	d
EXT_CSD_ENH_GP	include/mmc.h	/^#define EXT_CSD_ENH_GP(/;"	d
EXT_CSD_ENH_SIZE_MULT	include/mmc.h	/^#define EXT_CSD_ENH_SIZE_MULT	/;"	d
EXT_CSD_ENH_START_ADDR	include/mmc.h	/^#define EXT_CSD_ENH_START_ADDR	/;"	d
EXT_CSD_ENH_USR	include/mmc.h	/^#define EXT_CSD_ENH_USR	/;"	d
EXT_CSD_ERASE_GROUP_DEF	include/mmc.h	/^#define EXT_CSD_ERASE_GROUP_DEF	/;"	d
EXT_CSD_GP_SIZE_MULT	include/mmc.h	/^#define EXT_CSD_GP_SIZE_MULT	/;"	d
EXT_CSD_HC_ERASE_GRP_SIZE	include/mmc.h	/^#define EXT_CSD_HC_ERASE_GRP_SIZE	/;"	d
EXT_CSD_HC_WP_GRP_SIZE	include/mmc.h	/^#define EXT_CSD_HC_WP_GRP_SIZE	/;"	d
EXT_CSD_HS_CTRL_REL	include/mmc.h	/^#define EXT_CSD_HS_CTRL_REL	/;"	d
EXT_CSD_HS_TIMING	include/mmc.h	/^#define EXT_CSD_HS_TIMING	/;"	d
EXT_CSD_MAX_ENH_SIZE_MULT	include/mmc.h	/^#define EXT_CSD_MAX_ENH_SIZE_MULT	/;"	d
EXT_CSD_PARTITIONING_SUPPORT	include/mmc.h	/^#define EXT_CSD_PARTITIONING_SUPPORT	/;"	d
EXT_CSD_PARTITIONS_ATTRIBUTE	include/mmc.h	/^#define EXT_CSD_PARTITIONS_ATTRIBUTE	/;"	d
EXT_CSD_PARTITION_ACCESS	include/mmc.h	/^#define EXT_CSD_PARTITION_ACCESS(/;"	d
EXT_CSD_PARTITION_ACCESS_DISABLE	include/mmc.h	/^#define EXT_CSD_PARTITION_ACCESS_DISABLE	/;"	d
EXT_CSD_PARTITION_ACCESS_ENABLE	include/mmc.h	/^#define EXT_CSD_PARTITION_ACCESS_ENABLE	/;"	d
EXT_CSD_PARTITION_SETTING	include/mmc.h	/^#define EXT_CSD_PARTITION_SETTING	/;"	d
EXT_CSD_PARTITION_SETTING_COMPLETED	include/mmc.h	/^#define EXT_CSD_PARTITION_SETTING_COMPLETED	/;"	d
EXT_CSD_PART_CONF	include/mmc.h	/^#define EXT_CSD_PART_CONF	/;"	d
EXT_CSD_REV	include/mmc.h	/^#define EXT_CSD_REV	/;"	d
EXT_CSD_RPMB_MULT	include/mmc.h	/^#define EXT_CSD_RPMB_MULT	/;"	d
EXT_CSD_RST_N_FUNCTION	include/mmc.h	/^#define EXT_CSD_RST_N_FUNCTION	/;"	d
EXT_CSD_SEC_CNT	include/mmc.h	/^#define EXT_CSD_SEC_CNT	/;"	d
EXT_CSD_WR_DATA_REL_GP	include/mmc.h	/^#define EXT_CSD_WR_DATA_REL_GP(/;"	d
EXT_CSD_WR_DATA_REL_USR	include/mmc.h	/^#define EXT_CSD_WR_DATA_REL_USR	/;"	d
EXT_CSD_WR_REL_PARAM	include/mmc.h	/^#define EXT_CSD_WR_REL_PARAM	/;"	d
EXT_CSD_WR_REL_SET	include/mmc.h	/^#define EXT_CSD_WR_REL_SET	/;"	d
EXT_DEVICE_CHANNEL_1	board/micronas/vct/ebi.h	/^#define EXT_DEVICE_CHANNEL_1	/;"	d
EXT_DEVICE_CHANNEL_2	board/micronas/vct/ebi.h	/^#define EXT_DEVICE_CHANNEL_2	/;"	d
EXT_DEVICE_CHANNEL_3	board/micronas/vct/ebi.h	/^#define EXT_DEVICE_CHANNEL_3	/;"	d
EXT_DMA_ACCESS_ACTIVE	board/micronas/vct/ebi.h	/^#define EXT_DMA_ACCESS_ACTIVE	/;"	d
EXT_HDR_V0_REG_COUNT	tools/kwbimage.h	/^#define EXT_HDR_V0_REG_COUNT /;"	d
EXT_IRQ16H	arch/arm/mach-rmobile/pfc-sh73a0.c	/^#define EXT_IRQ16H(/;"	d	file:
EXT_IRQ16L	arch/arm/mach-rmobile/pfc-sh73a0.c	/^#define EXT_IRQ16L(/;"	d	file:
EXT_MEM_CNTL	include/radeon.h	/^#define EXT_MEM_CNTL	/;"	d
EXT_MEM_CTRL_BASE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define EXT_MEM_CTRL_BASE	/;"	d
EXT_MODE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define EXT_MODE	/;"	d
EXT_REG	drivers/net/smc91111.h	/^#define	EXT_REG	/;"	d
EXT_SOURCE	include/power/power_chrg.h	/^	EXT_SOURCE,$/;"	e	enum:__anond3b5e45a0203
EXT_TRAINING_ID	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define EXT_TRAINING_ID	/;"	d
EXT_VENDOR_SPEC_OFFSET	include/usb/ulpi.h	/^#define EXT_VENDOR_SPEC_OFFSET	/;"	d
EXYNOS4X12_ACE_SFR_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_ACE_SFR_BASE	/;"	d
EXYNOS4X12_ADC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_ADC_BASE	/;"	d
EXYNOS4X12_AUDIOSS_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_AUDIOSS_BASE	/;"	d
EXYNOS4X12_CLK_SEL_12MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define EXYNOS4X12_CLK_SEL_12MHZ	/;"	d
EXYNOS4X12_CLK_SEL_24MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define EXYNOS4X12_CLK_SEL_24MHZ	/;"	d
EXYNOS4X12_CLOCK_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_CLOCK_BASE	/;"	d
EXYNOS4X12_COMMON_ON_N0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define EXYNOS4X12_COMMON_ON_N0	/;"	d
EXYNOS4X12_DMC_CTRL_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_DMC_CTRL_BASE	/;"	d
EXYNOS4X12_DMC_PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_DMC_PHY_BASE	/;"	d
EXYNOS4X12_DMC_TZASC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_DMC_TZASC_BASE	/;"	d
EXYNOS4X12_DP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_DP_BASE	/;"	d
EXYNOS4X12_FIMD_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_FIMD_BASE	/;"	d
EXYNOS4X12_GPIO_A00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A00,		\/* 0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A10,		\/* 8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_A17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_A17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B0,		\/* 16 0x10 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B1,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B2,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B3,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B4,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B5,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B6,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_B7	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_B7,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C00,		\/* 24 0x18 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C10,		\/* 32 0x20 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_C17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_C17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D00,		\/* 40 0x28 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D10,		\/* 48 0x30 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_D17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_D17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F00 = EXYNOS4X12_GPIO_MAX_PORT_PART_1_0,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F10,		\/* 64 0x40 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F20,		\/* 72 0x48 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F30,		\/* 80 0x50 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F31,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F32,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F33,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F34,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F35,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F36,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_F37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_F37,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J00 = EXYNOS4X12_GPIO_MAX_PORT_PART_1_1,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J10,		\/* 96 0x60 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_J17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_J17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K00 = EXYNOS4X12_GPIO_MAX_PORT_PART_1_2,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K10,		\/* 112 0x70 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K20,		\/* 120 0x78 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K30,		\/* 128 0x80 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K31,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K32,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K33,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K34,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K35,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K36,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_K37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_K37,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L00,		\/* 136 0x88 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L10,		\/* 144 0x90 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L20,		\/* 152 0x98 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_L27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_L27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M00 = EXYNOS4X12_GPIO_MAX_PORT_PART_2_1,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M10,		\/* 224 0xe0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M20,		\/* 232 0xe8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M30,		\/* 240 0xf0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M31,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M32,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M33,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M34,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M35,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M36,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M37,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M40,		\/* 248 0xf8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M41,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M42,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M43,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M44,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M45,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M46,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_M47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_M47,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_1_0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_1_0, \/* 56 0x38 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_1_1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_1_1, \/* 88 0x58 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_1_2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_1_2, \/* 104 0x66 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_2_1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_2_1, \/* 216 0xd8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_2_2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_2_2, \/* 256 0x100 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_2_3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_2_3, \/* 288 0x120 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_MAX_PORT_PART_3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_MAX_PORT_PART_3,\/* 296 0x128 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_NUM_PARTS	arch/arm/mach-exynos/include/mach/gpio.h	/^#define EXYNOS4X12_GPIO_NUM_PARTS	/;"	d
EXYNOS4X12_GPIO_PART1_0	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART1_0	/;"	d
EXYNOS4X12_GPIO_PART1_1	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART1_1	/;"	d
EXYNOS4X12_GPIO_PART1_2	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART1_2	/;"	d
EXYNOS4X12_GPIO_PART1_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART1_BASE	/;"	d
EXYNOS4X12_GPIO_PART2_0	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART2_0	/;"	d
EXYNOS4X12_GPIO_PART2_1	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART2_1	/;"	d
EXYNOS4X12_GPIO_PART2_2	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART2_2	/;"	d
EXYNOS4X12_GPIO_PART2_3	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART2_3	/;"	d
EXYNOS4X12_GPIO_PART2_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART2_BASE	/;"	d
EXYNOS4X12_GPIO_PART3_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART3_BASE	/;"	d
EXYNOS4X12_GPIO_PART4_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_GPIO_PART4_BASE	/;"	d
EXYNOS4X12_GPIO_V00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V00 = EXYNOS4X12_GPIO_MAX_PORT_PART_3,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V10,		\/* 304 0x130 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V20,		\/* 312 0x138 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V30,		\/* 320 0x140 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V31,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V32,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V33,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V34,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V35,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V36,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V37,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V40,		\/* 328 0x148 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V41,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V42,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V43,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V44,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V45,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V46,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_V47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_V47,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X00 = EXYNOS4X12_GPIO_MAX_PORT_PART_2_2,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X10,		\/* 264 0x108 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X20,		\/* 272 0x110 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X30,		\/* 280 0x118 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X31,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X32,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X33,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X34,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X35,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X36,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_X37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_X37,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y00,		\/* 160 0xa0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y01,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y02,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y03,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y04,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y05,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y06,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y07,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y10,		\/* 168 0xa8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y11,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y12,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y13,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y14,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y15,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y16,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y17,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y20,		\/* 176 0xb0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y21,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y22,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y23,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y24,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y25,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y26,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y27,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y30,		\/* 184 0xb8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y31,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y32,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y33,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y34,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y35,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y36,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y37,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y40,		\/* 192 0xc0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y41,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y42,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y43,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y44,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y45,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y46,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y47,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y50	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y50,		\/* 200 0xc8 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y51	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y51,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y52	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y52,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y53	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y53,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y54	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y54,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y55	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y55,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y56	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y56,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y57	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y57,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y60	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y60,		\/* 208 0xd0 *\/$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y61	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y61,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y62	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y62,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y63	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y63,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y64	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y64,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y65	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y65,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y66	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y66,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Y67	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Y67,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z0 = EXYNOS4X12_GPIO_MAX_PORT_PART_2_3,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z1,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z2,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z3,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z4,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z5,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z6,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_GPIO_Z7	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4X12_GPIO_Z7,$/;"	e	enum:exynos4X12_gpio_pin
EXYNOS4X12_I2C_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_I2C_BASE	/;"	d
EXYNOS4X12_I2S_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_I2S_BASE	/;"	d
EXYNOS4X12_ID_PULLUP0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define EXYNOS4X12_ID_PULLUP0	/;"	d
EXYNOS4X12_MIPI_DSIM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_MIPI_DSIM_BASE	/;"	d
EXYNOS4X12_MMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_MMC_BASE	/;"	d
EXYNOS4X12_MODEM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_MODEM_BASE	/;"	d
EXYNOS4X12_POWER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_POWER_BASE	/;"	d
EXYNOS4X12_PRO_ID	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_PRO_ID	/;"	d
EXYNOS4X12_PWMTIMER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_PWMTIMER_BASE	/;"	d
EXYNOS4X12_SPI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_SPI_BASE	/;"	d
EXYNOS4X12_SPI_ISP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_SPI_ISP_BASE	/;"	d
EXYNOS4X12_SROMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_SROMC_BASE	/;"	d
EXYNOS4X12_SWRESET	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_SWRESET	/;"	d
EXYNOS4X12_SYSREG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_SYSREG_BASE	/;"	d
EXYNOS4X12_SYSTIMER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_SYSTIMER_BASE	/;"	d
EXYNOS4X12_TZPC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_TZPC_BASE	/;"	d
EXYNOS4X12_UART_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_UART_BASE	/;"	d
EXYNOS4X12_USB3PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_USB3PHY_BASE	/;"	d
EXYNOS4X12_USBOTG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_USBOTG_BASE	/;"	d
EXYNOS4X12_USBPHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_USBPHY_BASE	/;"	d
EXYNOS4X12_USBPHY_CONTROL	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_USBPHY_CONTROL	/;"	d
EXYNOS4X12_USB_HOST_EHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_USB_HOST_EHCI_BASE	/;"	d
EXYNOS4X12_USB_HOST_XHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_USB_HOST_XHCI_BASE	/;"	d
EXYNOS4X12_WATCHDOG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4X12_WATCHDOG_BASE	/;"	d
EXYNOS4_ACE_SFR_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_ACE_SFR_BASE	/;"	d
EXYNOS4_ADC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_ADC_BASE	/;"	d
EXYNOS4_ADDR_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_ADDR_BASE	/;"	d
EXYNOS4_AUDIOSS_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_AUDIOSS_BASE	/;"	d
EXYNOS4_CLOCK_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_CLOCK_BASE	/;"	d
EXYNOS4_DEFAULT_UART_OFFSET	include/configs/smdkv310.h	/^#define EXYNOS4_DEFAULT_UART_OFFSET	/;"	d
EXYNOS4_DMC_CTRL_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_DMC_CTRL_BASE	/;"	d
EXYNOS4_DMC_PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_DMC_PHY_BASE	/;"	d
EXYNOS4_DMC_TZASC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_DMC_TZASC_BASE	/;"	d
EXYNOS4_DP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_DP_BASE	/;"	d
EXYNOS4_FIMD_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_FIMD_BASE	/;"	d
EXYNOS4_GPIO_A00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A00,		\/* 0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A10,		\/* 8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_A17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_A17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B0,		\/* 16 0x10 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B1,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B2,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B3,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B4,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B5,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B6,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_B7	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_B7,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C00,		\/* 24 0x18 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C10,		\/* 32 0x20*\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_C17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_C17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D00,		\/* 40 0x28 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D10,		\/* 48 0x30 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_D17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_D17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E00,		\/* 56 0x38 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E10,		\/* 64 0x40 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E20,		\/* 72 0x48 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E21,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E22,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E23,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E24,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E25,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E26,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E27,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E30,		\/* 80 0x50 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E31,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E32,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E33,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E34,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E35,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E36,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E37,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E40,		\/* 88 0x58 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E41,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E42,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E43,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E44,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E45,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E46,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_E47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_E47,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F00,		\/* 96 0x60 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F10,		\/* 104 0x68 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F20,		\/* 112 0x70 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F21,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F22,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F23,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F24,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F25,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F26,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F27,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F30,		\/* 120 0x78 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F31,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F32,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F33,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F34,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F35,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F36,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_F37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_F37,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J00 = EXYNOS4_GPIO_MAX_PORT_PART_1,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J10,		\/* 136 0x88 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_J17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_J17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K00,		\/* 144 0x90 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K10,		\/* 152 0x98 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K20,		\/* 160 0xA0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K21,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K22,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K23,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K24,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K25,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K26,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K27,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K30,		\/* 168 0xA8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K31,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K32,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K33,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K34,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K35,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K36,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_K37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_K37,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L00,		\/* 176 0xB0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L10,		\/* 184 0xB8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L20,		\/* 192 0xC0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L21,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L22,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L23,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L24,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L25,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L26,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_L27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_L27,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_MAX_PORT	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_MAX_PORT$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_MAX_PORT_PART_1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_MAX_PORT_PART_1,	\/* 128 0x80 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_MAX_PORT_PART_2_0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_MAX_PORT_PART_2_0, \/* 256 0x100 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_MAX_PORT_PART_2_1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_MAX_PORT_PART_2_1,	\/* 288 0x120 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_NUM_PARTS	arch/arm/mach-exynos/include/mach/gpio.h	/^#define EXYNOS4_GPIO_NUM_PARTS	/;"	d
EXYNOS4_GPIO_PART1_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_GPIO_PART1_BASE	/;"	d
EXYNOS4_GPIO_PART2_0	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_GPIO_PART2_0	/;"	d
EXYNOS4_GPIO_PART2_1	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_GPIO_PART2_1	/;"	d
EXYNOS4_GPIO_PART2_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_GPIO_PART2_BASE	/;"	d
EXYNOS4_GPIO_PART3_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_GPIO_PART3_BASE	/;"	d
EXYNOS4_GPIO_PART4_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_GPIO_PART4_BASE	/;"	d
EXYNOS4_GPIO_X00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X00 = EXYNOS4_GPIO_MAX_PORT_PART_2_0,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X10,		\/* 264 0x108 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X20,		\/* 272 0x110 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X21,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X22,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X23,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X24,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X25,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X26,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X27,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X30,		\/* 280 0x118 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X31,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X32,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X33,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X34,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X35,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X36,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_X37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_X37,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y00,		\/* 200 0xC8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y01,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y02,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y03,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y04,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y05,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y06,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y07,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y10,		\/* 208 0xD0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y11,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y12,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y13,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y14,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y15,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y16,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y17,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y20,		\/* 216 0xD8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y21,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y22,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y23,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y24,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y25,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y26,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y27,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y30,		\/* 224 0xE0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y31,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y32,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y33,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y34,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y35,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y36,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y37,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y40,		\/* 232 0xE8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y41,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y42,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y43,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y44,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y45,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y46,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y47,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y50	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y50,		\/* 240 0xF0 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y51	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y51,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y52	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y52,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y53	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y53,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y54	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y54,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y55	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y55,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y56	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y56,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y57	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y57,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y60	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y60,		\/* 248 0xF8 *\/$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y61	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y61,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y62	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y62,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y63	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y63,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y64	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y64,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y65	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y65,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y66	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y66,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Y67	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Y67,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z0 = EXYNOS4_GPIO_MAX_PORT_PART_2_1,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z1,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z2,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z3,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z4,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z5,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z6,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_GPIO_Z7	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS4_GPIO_Z7,$/;"	e	enum:exynos4_gpio_pin
EXYNOS4_I2C_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_I2C_BASE	/;"	d
EXYNOS4_I2C_SPACING	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_I2C_SPACING	/;"	d
EXYNOS4_I2S_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_I2S_BASE	/;"	d
EXYNOS4_LCD_IF_BASE_OFFSET	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS4_LCD_IF_BASE_OFFSET	/;"	d
EXYNOS4_MIPI_DSIM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_MIPI_DSIM_BASE	/;"	d
EXYNOS4_MIU_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_MIU_BASE	/;"	d
EXYNOS4_MMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_MMC_BASE	/;"	d
EXYNOS4_MODEM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_MODEM_BASE	/;"	d
EXYNOS4_NR_TZPC_BANKS	arch/arm/mach-exynos/include/mach/tzpc.h	/^#define EXYNOS4_NR_TZPC_BANKS	/;"	d
EXYNOS4_POWER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_POWER_BASE	/;"	d
EXYNOS4_PRO_ID	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_PRO_ID	/;"	d
EXYNOS4_PS_HOLD_CON_VAL	board/samsung/trats/setup.h	/^#define EXYNOS4_PS_HOLD_CON_VAL	/;"	d
EXYNOS4_PWMTIMER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_PWMTIMER_BASE	/;"	d
EXYNOS4_SPI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_SPI_BASE	/;"	d
EXYNOS4_SPI_ISP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_SPI_ISP_BASE	/;"	d
EXYNOS4_SROMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_SROMC_BASE	/;"	d
EXYNOS4_SWRESET	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_SWRESET	/;"	d
EXYNOS4_SYSREG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_SYSREG_BASE	/;"	d
EXYNOS4_SYSTIMER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_SYSTIMER_BASE	/;"	d
EXYNOS4_TZPC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_TZPC_BASE	/;"	d
EXYNOS4_UART_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_UART_BASE	/;"	d
EXYNOS4_USB3PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_USB3PHY_BASE	/;"	d
EXYNOS4_USBOTG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_USBOTG_BASE	/;"	d
EXYNOS4_USBPHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_USBPHY_BASE	/;"	d
EXYNOS4_USBPHY_CONTROL	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_USBPHY_CONTROL	/;"	d
EXYNOS4_USB_HOST_EHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_USB_HOST_EHCI_BASE	/;"	d
EXYNOS4_USB_HOST_XHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_USB_HOST_XHCI_BASE	/;"	d
EXYNOS4_WATCHDOG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS4_WATCHDOG_BASE	/;"	d
EXYNOS5420_ACE_SFR_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_ACE_SFR_BASE	/;"	d
EXYNOS5420_ADC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_ADC_BASE	/;"	d
EXYNOS5420_AUDIOSS_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_AUDIOSS_BASE	/;"	d
EXYNOS5420_CLOCK_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_CLOCK_BASE	/;"	d
EXYNOS5420_CPU_CONFIG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_CPU_CONFIG_BASE	/;"	d
EXYNOS5420_CPU_STATUS_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_CPU_STATUS_BASE	/;"	d
EXYNOS5420_DMC_CTRL_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_DMC_CTRL_BASE	/;"	d
EXYNOS5420_DMC_PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_DMC_PHY_BASE	/;"	d
EXYNOS5420_DMC_TZASC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_DMC_TZASC_BASE	/;"	d
EXYNOS5420_DP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_DP_BASE	/;"	d
EXYNOS5420_FIMD_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_FIMD_BASE	/;"	d
EXYNOS5420_GPIO_A00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A00,		\/* 0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A10,		\/* 8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A20,		\/* 16 0x10 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A21,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A22,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A23,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A24,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A25,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A26,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_A27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_A27,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B00,		\/* 24 0x18 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B10,		\/* 32 0x20 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B20,		\/* 40 0x28 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B21,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B22,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B23,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B24,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B25,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B26,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B27,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B30,		\/* 48 0x30 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B31,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B32,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B33,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B34,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B35,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B36,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B37,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B40,		\/* 56 0x38 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B41,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B42,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B43,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B44,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B45,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B46,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_B47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_B47,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C00 = EXYNOS5420_GPIO_MAX_PORT_PART_3,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C10,		\/* 120 0x78 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C20,		\/* 128 0x80 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C21,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C22,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C23,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C24,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C25,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C26,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C27,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C30,		\/* 136 0x88 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C31,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C32,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C33,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C34,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C35,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C36,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C37,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C40,		\/* 144 0x90 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C41,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C42,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C43,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C44,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C45,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C46,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_C47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_C47,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D10,		\/* 152 0x98 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_D17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_D17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E00 = EXYNOS5420_GPIO_MAX_PORT_PART_4,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E10,		\/* 224 0xe0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_E17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_E17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F00,		\/* 232 0xe8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F10,		\/* 240 0xf0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_F17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_F17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G00,		\/* 248 0xf8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G10,		\/* 256 0x100 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G20,		\/* 264 0x108 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G21,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G22,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G23,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G24,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G25,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G26,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_G27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_G27,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H00,		\/* 64 0x40 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_H07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_H07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J40,		\/* 272 0x110 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J41,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J42,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J43,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J44,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J45,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J46,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_J47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_J47,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_MAX_PORT	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_MAX_PORT$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_MAX_PORT_PART_1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_MAX_PORT_PART_1,\/* 72 0x48 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_MAX_PORT_PART_2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_MAX_PORT_PART_2,\/* 80 0x50 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_MAX_PORT_PART_3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_MAX_PORT_PART_3,\/* 112 0x70 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_MAX_PORT_PART_4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_MAX_PORT_PART_4,\/* 216 0xd8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_MAX_PORT_PART_5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_MAX_PORT_PART_5,\/* 280 0x118 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_NUM_PARTS	arch/arm/mach-exynos/include/mach/gpio.h	/^#define EXYNOS5420_GPIO_NUM_PARTS	/;"	d
EXYNOS5420_GPIO_PART1_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_GPIO_PART1_BASE	/;"	d
EXYNOS5420_GPIO_PART2_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_GPIO_PART2_BASE	/;"	d
EXYNOS5420_GPIO_PART3_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_GPIO_PART3_BASE	/;"	d
EXYNOS5420_GPIO_PART4_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_GPIO_PART4_BASE	/;"	d
EXYNOS5420_GPIO_PART5_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_GPIO_PART5_BASE	/;"	d
EXYNOS5420_GPIO_PART6_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_GPIO_PART6_BASE	/;"	d
EXYNOS5420_GPIO_X00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X00 = EXYNOS5420_GPIO_MAX_PORT_PART_2,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X10,		\/* 88 0x58 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X20,		\/* 96 0x60 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X21,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X22,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X23,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X24,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X25,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X26,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X27,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X30,		\/* 104 0x68 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X31,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X32,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X33,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X34,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X35,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X36,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_X37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_X37,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y00,		\/* 160 0xa0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y01,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y02,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y03,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y04,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y05,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y06,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y07,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y10,		\/* 168 0xa8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y11,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y12,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y13,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y14,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y15,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y16,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y17,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y20,		\/* 176 0xb0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y21,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y22,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y23,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y24,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y25,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y26,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y27,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y30,		\/* 184 0xb8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y31,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y32,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y33,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y34,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y35,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y36,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y37,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y40,		\/* 192 0xc0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y41,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y42,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y43,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y44,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y45,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y46,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y47,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y50	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y50,		\/* 200 0xc8 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y51	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y51,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y52	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y52,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y53	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y53,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y54	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y54,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y55	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y55,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y56	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y56,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y57	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y57,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y60	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y60,		\/* 208 0xd0 *\/$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y61	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y61,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y62	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y62,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y63	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y63,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y64	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y64,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y65	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y65,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y66	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y66,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y67	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y67,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y70	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y70 = EXYNOS5420_GPIO_MAX_PORT_PART_1,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y71	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y71,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y72	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y72,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y73	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y73,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y74	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y74,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y75	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y75,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y76	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y76,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Y77	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Y77,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z0 = EXYNOS5420_GPIO_MAX_PORT_PART_5,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z1,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z2,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z3,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z4,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z5,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_GPIO_Z6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5420_GPIO_Z6,$/;"	e	enum:exynos5420_gpio_pin
EXYNOS5420_I2C_8910_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_I2C_8910_BASE	/;"	d
EXYNOS5420_I2C_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_I2C_BASE	/;"	d
EXYNOS5420_I2S_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_I2S_BASE	/;"	d
EXYNOS5420_INFORM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_INFORM_BASE	/;"	d
EXYNOS5420_MIPI_DSIM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_MIPI_DSIM_BASE	/;"	d
EXYNOS5420_MMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_MMC_BASE	/;"	d
EXYNOS5420_MODEM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_MODEM_BASE	/;"	d
EXYNOS5420_POWER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_POWER_BASE	/;"	d
EXYNOS5420_PRO_ID	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_PRO_ID	/;"	d
EXYNOS5420_PWMTIMER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_PWMTIMER_BASE	/;"	d
EXYNOS5420_SPARE_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_SPARE_BASE	/;"	d
EXYNOS5420_SPI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_SPI_BASE	/;"	d
EXYNOS5420_SPI_ISP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_SPI_ISP_BASE	/;"	d
EXYNOS5420_SROMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_SROMC_BASE	/;"	d
EXYNOS5420_SWRESET	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_SWRESET	/;"	d
EXYNOS5420_SYSREG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_SYSREG_BASE	/;"	d
EXYNOS5420_TZPC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_TZPC_BASE	/;"	d
EXYNOS5420_UART_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_UART_BASE	/;"	d
EXYNOS5420_USB3PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_USB3PHY_BASE	/;"	d
EXYNOS5420_USBOTG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_USBOTG_BASE	/;"	d
EXYNOS5420_USBPHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_USBPHY_BASE	/;"	d
EXYNOS5420_USB_HOST_EHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_USB_HOST_EHCI_BASE	/;"	d
EXYNOS5420_USB_HOST_XHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_USB_HOST_XHCI_BASE	/;"	d
EXYNOS5420_WATCHDOG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5420_WATCHDOG_BASE	/;"	d
EXYNOS542X_SRC_EPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS542X_SRC_EPLL = 6,$/;"	e	enum:pll_src_bit
EXYNOS542X_SRC_MPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS542X_SRC_MPLL = 3,$/;"	e	enum:pll_src_bit
EXYNOS542X_SRC_RPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS542X_SRC_RPLL,$/;"	e	enum:pll_src_bit
EXYNOS542X_SRC_SPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS542X_SRC_SPLL,$/;"	e	enum:pll_src_bit
EXYNOS5_ACE_SFR_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_ACE_SFR_BASE	/;"	d
EXYNOS5_ADC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_ADC_BASE	/;"	d
EXYNOS5_AUDIOSS_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_AUDIOSS_BASE	/;"	d
EXYNOS5_BOARD_COUNT	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_COUNT,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_BOARD_GENERIC	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_GENERIC,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_BOARD_ODROID_UNKNOWN	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_ODROID_UNKNOWN,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_BOARD_ODROID_XU3	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_ODROID_XU3,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_BOARD_ODROID_XU3_REV01	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_ODROID_XU3_REV01,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_BOARD_ODROID_XU3_REV02	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_ODROID_XU3_REV02,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_BOARD_ODROID_XU4_REV01	include/samsung/exynos5-dt-types.h	/^	EXYNOS5_BOARD_ODROID_XU4_REV01,$/;"	e	enum:__anona2fe483d0103
EXYNOS5_CLOCK_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_CLOCK_BASE	/;"	d
EXYNOS5_DEFAULT_UART_OFFSET	include/configs/exynos5-common.h	/^#define EXYNOS5_DEFAULT_UART_OFFSET	/;"	d
EXYNOS5_DMC_CTRL_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_DMC_CTRL_BASE	/;"	d
EXYNOS5_DMC_PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_DMC_PHY_BASE	/;"	d
EXYNOS5_DMC_TZASC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_DMC_TZASC_BASE	/;"	d
EXYNOS5_DP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_DP_BASE	/;"	d
EXYNOS5_EPLLCON0_LOCKED_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define EXYNOS5_EPLLCON0_LOCKED_SHIFT	/;"	d
EXYNOS5_FIMD_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_FIMD_BASE	/;"	d
EXYNOS5_GPIO_A00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A00,		\/* 0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A10,		\/* 8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A20,		\/* 16 0x10 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_A27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_A27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B00,		\/* 24 0x18 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B10,		\/* 32 0x20 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B20,		\/* 40 0x28 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B30,		\/* 48 0x39 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B31,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B32,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B33,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B34,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B35,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B36,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_B37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_B37,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C00,		\/* 56 0x38 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C10,		\/* 64 0x40 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C20,		\/* 72 0x48 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C30,		\/* 80 0x50 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C31,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C32,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C33,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C34,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C35,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C36,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C37,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C40 = EXYNOS5_GPIO_MAX_PORT_PART_1,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C41,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C42,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C43,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C44,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C45,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C46,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_C47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_C47,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D00,		\/* 88 0x58 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D10,		\/* 96 0x60 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_D17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_D17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E00 = EXYNOS5_GPIO_MAX_PORT_PART_3,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E10,		\/* 208 0xd0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_E17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_E17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F00,		\/* 216 0xd8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F10,		\/* 224 0xe0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_F17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_F17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G00,		\/* 232 0xe8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G10,		\/* 240 0xf0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G20,		\/* 248 0xf8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_G27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_G27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H00,		\/* 256 0x100 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H10,		\/* 264 0x108 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_H17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_H17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_1,	\/* 160 0xa0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_2,	\/* 168 0xa8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_3,	\/* 200 0xc8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_4,	\/* 272 0x110 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_5,	\/* 288 0x120 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_6,	\/* 304 0x130 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_MAX_PORT_PART_7	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_MAX_PORT_PART_7,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_NUM_PARTS	arch/arm/mach-exynos/include/mach/gpio.h	/^#define EXYNOS5_GPIO_NUM_PARTS	/;"	d
EXYNOS5_GPIO_PART1_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART1_BASE	/;"	d
EXYNOS5_GPIO_PART2_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART2_BASE	/;"	d
EXYNOS5_GPIO_PART3_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART3_BASE	/;"	d
EXYNOS5_GPIO_PART4_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART4_BASE	/;"	d
EXYNOS5_GPIO_PART5_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART5_BASE	/;"	d
EXYNOS5_GPIO_PART6_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART6_BASE	/;"	d
EXYNOS5_GPIO_PART7_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART7_BASE	/;"	d
EXYNOS5_GPIO_PART8_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_GPIO_PART8_BASE	/;"	d
EXYNOS5_GPIO_V00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V00 = EXYNOS5_GPIO_MAX_PORT_PART_4,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V10,		\/* 280 0x118 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V20 = EXYNOS5_GPIO_MAX_PORT_PART_5,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V30,		\/* 296 0x128 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V31,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V32,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V33,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V34,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V35,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V36,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V37,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V40 = EXYNOS5_GPIO_MAX_PORT_PART_6,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V41,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V42,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V43,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V44,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V45,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V46,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_V47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_V47,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X00 = EXYNOS5_GPIO_MAX_PORT_PART_2,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X10,		\/* 176 0xb0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X20,		\/* 184 0xb8 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X30,		\/* 192 0xc0 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X31,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X32,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X33,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X34,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X35,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X36,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_X37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_X37,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y00	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y00,		\/* 104 0x68 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y01	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y01,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y02	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y02,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y03	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y03,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y04	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y04,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y05	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y05,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y06	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y06,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y07	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y07,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y10	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y10,		\/* 112 0x70 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y11	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y11,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y12	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y12,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y13	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y13,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y14	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y14,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y15	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y15,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y16	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y16,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y17	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y17,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y20	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y20,		\/* 120 0x78 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y21	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y21,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y22	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y22,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y23	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y23,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y24	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y24,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y25	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y25,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y26	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y26,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y27	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y27,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y30	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y30,		\/* 128 0x80 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y31	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y31,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y32	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y32,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y33	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y33,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y34	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y34,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y35	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y35,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y36	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y36,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y37	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y37,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y40	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y40,		\/* 136 0x88 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y41	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y41,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y42	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y42,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y43	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y43,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y44	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y44,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y45	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y45,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y46	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y46,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y47	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y47,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y50	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y50,		\/* 144 0x90 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y51	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y51,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y52	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y52,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y53	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y53,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y54	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y54,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y55	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y55,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y56	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y56,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y57	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y57,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y60	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y60,		\/* 152 0x98 *\/$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y61	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y61,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y62	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y62,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y63	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y63,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y64	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y64,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y65	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y65,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y66	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y66,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Y67	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Y67,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z0	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z0 = EXYNOS5_GPIO_MAX_PORT_PART_7,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z1	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z1,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z2	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z2,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z3	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z3,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z4	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z4,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z5	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z5,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_GPIO_Z6	arch/arm/mach-exynos/include/mach/gpio.h	/^	EXYNOS5_GPIO_Z6,$/;"	e	enum:exynos5_gpio_pin
EXYNOS5_I2C_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_I2C_BASE	/;"	d
EXYNOS5_I2C_SPACING	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_I2C_SPACING	/;"	d
EXYNOS5_I2S_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_I2S_BASE	/;"	d
EXYNOS5_LCD_IF_BASE_OFFSET	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS5_LCD_IF_BASE_OFFSET	/;"	d
EXYNOS5_MIPI_DSIM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_MIPI_DSIM_BASE	/;"	d
EXYNOS5_MMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_MMC_BASE	/;"	d
EXYNOS5_MODEM_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_MODEM_BASE	/;"	d
EXYNOS5_NR_TZPC_BANKS	arch/arm/mach-exynos/include/mach/tzpc.h	/^#define EXYNOS5_NR_TZPC_BANKS	/;"	d
EXYNOS5_POWER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_POWER_BASE	/;"	d
EXYNOS5_PRO_ID	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_PRO_ID	/;"	d
EXYNOS5_PWMTIMER_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_PWMTIMER_BASE	/;"	d
EXYNOS5_SPI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_SPI_BASE	/;"	d
EXYNOS5_SPI_ISP_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_SPI_ISP_BASE	/;"	d
EXYNOS5_SROMC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_SROMC_BASE	/;"	d
EXYNOS5_SWRESET	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_SWRESET	/;"	d
EXYNOS5_SYSREG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_SYSREG_BASE	/;"	d
EXYNOS5_TZPC_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_TZPC_BASE	/;"	d
EXYNOS5_UART_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_UART_BASE	/;"	d
EXYNOS5_USB3PHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_USB3PHY_BASE	/;"	d
EXYNOS5_USBOTG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_USBOTG_BASE	/;"	d
EXYNOS5_USBPHY_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_USBPHY_BASE	/;"	d
EXYNOS5_USB_HOST_EHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_USB_HOST_EHCI_BASE	/;"	d
EXYNOS5_USB_HOST_XHCI_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_USB_HOST_XHCI_BASE	/;"	d
EXYNOS5_WATCHDOG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS5_WATCHDOG_BASE	/;"	d
EXYNOS_BUFFER_OFFSET	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_BUFFER_OFFSET(/;"	d
EXYNOS_BUFFER_SIZE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_BUFFER_SIZE(/;"	d
EXYNOS_COPY_SPI_FNPTR_ADDR	include/configs/exynos5-common.h	/^#define EXYNOS_COPY_SPI_FNPTR_ADDR	/;"	d
EXYNOS_COPY_USB_FNPTR_ADDR	include/configs/exynos5-common.h	/^#define EXYNOS_COPY_USB_FNPTR_ADDR	/;"	d
EXYNOS_CPU_NAME	arch/arm/mach-exynos/include/mach/cpu.h	/^#define EXYNOS_CPU_NAME	/;"	d
EXYNOS_DEVICE_SETTINGS	include/configs/exynos5-common.h	/^#define EXYNOS_DEVICE_SETTINGS /;"	d
EXYNOS_DEVICE_SETTINGS	include/configs/exynos5-dt-common.h	/^#define EXYNOS_DEVICE_SETTINGS /;"	d
EXYNOS_DEVICE_SETTINGS	include/configs/exynos7420-common.h	/^#define EXYNOS_DEVICE_SETTINGS /;"	d
EXYNOS_DP_CLK_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DP_CLK_ENABLE	/;"	d
EXYNOS_DP_MIE_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DP_MIE_DISABLE	/;"	d
EXYNOS_DP_PHY_ENABLE	arch/arm/mach-exynos/include/mach/power.h	/^#define EXYNOS_DP_PHY_ENABLE	/;"	d
EXYNOS_DP_SUCCESS	arch/arm/mach-exynos/include/mach/dp_info.h	/^#define EXYNOS_DP_SUCCESS	/;"	d
EXYNOS_DUALRGB_BYPASS_DUAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_BYPASS_DUAL	/;"	d
EXYNOS_DUALRGB_BYPASS_SINGLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_BYPASS_SINGLE	/;"	d
EXYNOS_DUALRGB_FRAMESPLIT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_FRAMESPLIT	/;"	d
EXYNOS_DUALRGB_LINESPLIT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_LINESPLIT	/;"	d
EXYNOS_DUALRGB_MAIN_CNT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_MAIN_CNT(/;"	d
EXYNOS_DUALRGB_MIE_DUAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_MIE_DUAL	/;"	d
EXYNOS_DUALRGB_MIE_SINGLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_MIE_SINGLE	/;"	d
EXYNOS_DUALRGB_SUB_CNT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_SUB_CNT(/;"	d
EXYNOS_DUALRGB_VDEN_EN_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_VDEN_EN_DISABLE	/;"	d
EXYNOS_DUALRGB_VDEN_EN_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_DUALRGB_VDEN_EN_ENABLE	/;"	d
EXYNOS_FDTFILE_SETTING	include/configs/arndale.h	/^#define EXYNOS_FDTFILE_SETTING /;"	d
EXYNOS_FDTFILE_SETTING	include/configs/exynos5-common.h	/^#define EXYNOS_FDTFILE_SETTING$/;"	d
EXYNOS_FDTFILE_SETTING	include/configs/exynos7420-common.h	/^#define EXYNOS_FDTFILE_SETTING$/;"	d
EXYNOS_I2C_HS	drivers/i2c/s3c24x0_i2c.c	/^	EXYNOS_I2C_HS,$/;"	e	enum:exynos_i2c_type	file:
EXYNOS_I2C_STD	drivers/i2c/s3c24x0_i2c.c	/^	EXYNOS_I2C_STD,$/;"	e	enum:exynos_i2c_type	file:
EXYNOS_I80IFEN_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_I80IFEN_DISABLE	/;"	d
EXYNOS_I80IFEN_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_I80IFEN_ENABLE	/;"	d
EXYNOS_I80SOFT_TRIG_EN	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_I80SOFT_TRIG_EN	/;"	d
EXYNOS_I80START_TRIG	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_I80START_TRIG	/;"	d
EXYNOS_I80STATUS_TRIG_DONE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_I80STATUS_TRIG_DONE	/;"	d
EXYNOS_IRAM_SECONDARY_BASE	include/configs/exynos5-common.h	/^#define EXYNOS_IRAM_SECONDARY_BASE	/;"	d
EXYNOS_KEYCON0_COMPKEY	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_COMPKEY(/;"	d
EXYNOS_KEYCON0_DIRCON_MATCH_BG	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_DIRCON_MATCH_BG	/;"	d
EXYNOS_KEYCON0_DIRCON_MATCH_FG	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_DIRCON_MATCH_FG	/;"	d
EXYNOS_KEYCON0_KEYBLEN_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_KEYBLEN_DISABLE	/;"	d
EXYNOS_KEYCON0_KEYBLEN_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_KEYBLEN_ENABLE	/;"	d
EXYNOS_KEYCON0_KEY_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_KEY_DISABLE	/;"	d
EXYNOS_KEYCON0_KEY_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON0_KEY_ENABLE	/;"	d
EXYNOS_KEYCON1_COLVAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_KEYCON1_COLVAL(/;"	d
EXYNOS_LCD_CS_SETUP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_LCD_CS_SETUP(/;"	d
EXYNOS_LCD_WR_ACT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_LCD_WR_ACT(/;"	d
EXYNOS_LCD_WR_HOLD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_LCD_WR_HOLD(/;"	d
EXYNOS_LCD_WR_SETUP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_LCD_WR_SETUP(/;"	d
EXYNOS_MIE_CLK_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_MIE_CLK_ENABLE	/;"	d
EXYNOS_MIPI_PHY_ENABLE	arch/arm/mach-exynos/include/mach/power.h	/^#define EXYNOS_MIPI_PHY_ENABLE	/;"	d
EXYNOS_MIPI_PHY_MRESETN	arch/arm/mach-exynos/include/mach/power.h	/^#define EXYNOS_MIPI_PHY_MRESETN	/;"	d
EXYNOS_MIPI_PHY_SRESETN	arch/arm/mach-exynos/include/mach/power.h	/^#define EXYNOS_MIPI_PHY_SRESETN	/;"	d
EXYNOS_PIN_BANK	drivers/pinctrl/exynos/pinctrl-exynos.h	/^#define EXYNOS_PIN_BANK(/;"	d
EXYNOS_PRTCON_PROTECT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_PRTCON_PROTECT	/;"	d
EXYNOS_PRTCON_UPDATABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_PRTCON_UPDATABLE	/;"	d
EXYNOS_PS_HOLD_CONTROL_DATA_HIGH	arch/arm/mach-exynos/include/mach/power.h	/^#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH	/;"	d
EXYNOS_RSPOL_HIGH	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_RSPOL_HIGH	/;"	d
EXYNOS_RSPOL_LOW	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_RSPOL_LOW	/;"	d
EXYNOS_SPI	drivers/spi/Kconfig	/^config EXYNOS_SPI$/;"	c	menu:SPI Support
EXYNOS_SPI_MAX_FREQ	arch/arm/mach-exynos/include/mach/spi.h	/^#define EXYNOS_SPI_MAX_FREQ	/;"	d
EXYNOS_SRC_EPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS_SRC_EPLL,$/;"	e	enum:pll_src_bit
EXYNOS_SRC_MPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS_SRC_MPLL = 6,$/;"	e	enum:pll_src_bit
EXYNOS_SRC_VPLL	arch/arm/mach-exynos/include/mach/clk.h	/^	EXYNOS_SRC_VPLL,$/;"	e	enum:pll_src_bit
EXYNOS_USB_SECONDARY_BOOT	include/configs/exynos5-common.h	/^#define EXYNOS_USB_SECONDARY_BOOT	/;"	d
EXYNOS_VIDADDR_END_VBASEL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_END_VBASEL(/;"	d
EXYNOS_VIDADDR_OFFSIZE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_OFFSIZE(/;"	d
EXYNOS_VIDADDR_OFFSIZE_E	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_OFFSIZE_E(/;"	d
EXYNOS_VIDADDR_PAGEWIDTH	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_PAGEWIDTH(/;"	d
EXYNOS_VIDADDR_PAGEWIDTH_E	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_PAGEWIDTH_E(/;"	d
EXYNOS_VIDADDR_START_VBANK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_START_VBANK(/;"	d
EXYNOS_VIDADDR_START_VBASEU	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDADDR_START_VBASEU(/;"	d
EXYNOS_VIDCON0_CLKDIR_DIRECTED	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKDIR_DIRECTED	/;"	d
EXYNOS_VIDCON0_CLKDIR_DIVIDED	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKDIR_DIVIDED	/;"	d
EXYNOS_VIDCON0_CLKDIR_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKDIR_MASK	/;"	d
EXYNOS_VIDCON0_CLKSEL_HCLK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKSEL_HCLK	/;"	d
EXYNOS_VIDCON0_CLKSEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKSEL_MASK	/;"	d
EXYNOS_VIDCON0_CLKSEL_SCLK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKSEL_SCLK	/;"	d
EXYNOS_VIDCON0_CLKVALUP_ALWAYS	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKVALUP_ALWAYS	/;"	d
EXYNOS_VIDCON0_CLKVALUP_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKVALUP_MASK	/;"	d
EXYNOS_VIDCON0_CLKVALUP_START_FRAME	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKVALUP_START_FRAME	/;"	d
EXYNOS_VIDCON0_CLKVAL_F	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_CLKVAL_F(/;"	d
EXYNOS_VIDCON0_DSI_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_DSI_DISABLE	/;"	d
EXYNOS_VIDCON0_DSI_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_DSI_ENABLE	/;"	d
EXYNOS_VIDCON0_ENVID_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_ENVID_DISABLE	/;"	d
EXYNOS_VIDCON0_ENVID_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_ENVID_ENABLE	/;"	d
EXYNOS_VIDCON0_ENVID_F_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_ENVID_F_DISABLE	/;"	d
EXYNOS_VIDCON0_ENVID_F_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_ENVID_F_ENABLE	/;"	d
EXYNOS_VIDCON0_PNRMODE_BGR_P	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_PNRMODE_BGR_P	/;"	d
EXYNOS_VIDCON0_PNRMODE_BGR_S	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_PNRMODE_BGR_S	/;"	d
EXYNOS_VIDCON0_PNRMODE_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_PNRMODE_MASK	/;"	d
EXYNOS_VIDCON0_PNRMODE_RGB_P	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_PNRMODE_RGB_P	/;"	d
EXYNOS_VIDCON0_PNRMODE_RGB_S	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_PNRMODE_RGB_S	/;"	d
EXYNOS_VIDCON0_PNRMODE_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_PNRMODE_SHIFT	/;"	d
EXYNOS_VIDCON0_SCAN_INTERLACE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_SCAN_INTERLACE	/;"	d
EXYNOS_VIDCON0_SCAN_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_SCAN_MASK	/;"	d
EXYNOS_VIDCON0_SCAN_PROGRESSIVE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_SCAN_PROGRESSIVE	/;"	d
EXYNOS_VIDCON0_VCLKEN_FREERUN	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VCLKEN_FREERUN	/;"	d
EXYNOS_VIDCON0_VCLKEN_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VCLKEN_MASK	/;"	d
EXYNOS_VIDCON0_VCLKEN_NORMAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VCLKEN_NORMAL	/;"	d
EXYNOS_VIDCON0_VIDOUT_I80LDI0	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_I80LDI0	/;"	d
EXYNOS_VIDCON0_VIDOUT_I80LDI1	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_I80LDI1	/;"	d
EXYNOS_VIDCON0_VIDOUT_ITU	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_ITU	/;"	d
EXYNOS_VIDCON0_VIDOUT_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_MASK	/;"	d
EXYNOS_VIDCON0_VIDOUT_RGB	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_RGB	/;"	d
EXYNOS_VIDCON0_VIDOUT_WB_I80LDI0	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_WB_I80LDI0	/;"	d
EXYNOS_VIDCON0_VIDOUT_WB_I80LDI1	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_WB_I80LDI1	/;"	d
EXYNOS_VIDCON0_VIDOUT_WB_RGB	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON0_VIDOUT_WB_RGB	/;"	d
EXYNOS_VIDCON1_IHSYNC_INVERT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IHSYNC_INVERT	/;"	d
EXYNOS_VIDCON1_IHSYNC_NORMAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IHSYNC_NORMAL	/;"	d
EXYNOS_VIDCON1_IVCLK_FALLING_EDGE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IVCLK_FALLING_EDGE	/;"	d
EXYNOS_VIDCON1_IVCLK_RISING_EDGE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IVCLK_RISING_EDGE	/;"	d
EXYNOS_VIDCON1_IVDEN_INVERT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IVDEN_INVERT	/;"	d
EXYNOS_VIDCON1_IVDEN_NORMAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IVDEN_NORMAL	/;"	d
EXYNOS_VIDCON1_IVSYNC_INVERT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IVSYNC_INVERT	/;"	d
EXYNOS_VIDCON1_IVSYNC_NORMAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON1_IVSYNC_NORMAL	/;"	d
EXYNOS_VIDCON2_EN601_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_EN601_DISABLE	/;"	d
EXYNOS_VIDCON2_EN601_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_EN601_ENABLE	/;"	d
EXYNOS_VIDCON2_EN601_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_EN601_MASK	/;"	d
EXYNOS_VIDCON2_ORGYUV_CBCRY	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_ORGYUV_CBCRY	/;"	d
EXYNOS_VIDCON2_ORGYUV_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_ORGYUV_MASK	/;"	d
EXYNOS_VIDCON2_ORGYUV_YCBCR	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_ORGYUV_YCBCR	/;"	d
EXYNOS_VIDCON2_TVFORMATSEL_HW	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_TVFORMATSEL_HW	/;"	d
EXYNOS_VIDCON2_TVFORMATSEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_TVFORMATSEL_MASK	/;"	d
EXYNOS_VIDCON2_TVFORMATSEL_SW	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_TVFORMATSEL_SW	/;"	d
EXYNOS_VIDCON2_TVFORMATSEL_YUV422	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_TVFORMATSEL_YUV422	/;"	d
EXYNOS_VIDCON2_TVFORMATSEL_YUV444	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_TVFORMATSEL_YUV444	/;"	d
EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK	/;"	d
EXYNOS_VIDCON2_WB_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_WB_DISABLE	/;"	d
EXYNOS_VIDCON2_WB_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_WB_ENABLE	/;"	d
EXYNOS_VIDCON2_WB_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_WB_MASK	/;"	d
EXYNOS_VIDCON2_YUVORD_CBCR	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_YUVORD_CBCR	/;"	d
EXYNOS_VIDCON2_YUVORD_CRCB	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_YUVORD_CRCB	/;"	d
EXYNOS_VIDCON2_YUVORD_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDCON2_YUVORD_MASK	/;"	d
EXYNOS_VIDINTCON0_FIFOLEVEL_25	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOLEVEL_25	/;"	d
EXYNOS_VIDINTCON0_FIFOLEVEL_50	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOLEVEL_50	/;"	d
EXYNOS_VIDINTCON0_FIFOLEVEL_75	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOLEVEL_75	/;"	d
EXYNOS_VIDINTCON0_FIFOLEVEL_EMPTY	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOLEVEL_EMPTY	/;"	d
EXYNOS_VIDINTCON0_FIFOLEVEL_FULL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOLEVEL_FULL	/;"	d
EXYNOS_VIDINTCON0_FIFOLEVEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOLEVEL_MASK	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_ALL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_ALL	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_MASK	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_WIN0	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_WIN0	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_WIN1	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_WIN1	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_WIN2	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_WIN2	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_WIN3	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_WIN3	/;"	d
EXYNOS_VIDINTCON0_FIFOSEL_WIN4	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FIFOSEL_WIN4	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL0_ACTIVE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL0_ACTIVE	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL0_BACK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL0_BACK	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL0_FRONT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL0_FRONT	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL0_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL0_MASK	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL0_VSYNC	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL0_VSYNC	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL1_BACK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL1_BACK	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL1_FRONT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL1_FRONT	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL1_NONE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL1_NONE	/;"	d
EXYNOS_VIDINTCON0_FRAMESEL1_VSYNC	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_FRAMESEL1_VSYNC	/;"	d
EXYNOS_VIDINTCON0_INTFIFO_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INTFIFO_DISABLE	/;"	d
EXYNOS_VIDINTCON0_INTFIFO_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INTFIFO_ENABLE	/;"	d
EXYNOS_VIDINTCON0_INTFRMEN_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INTFRMEN_DISABLE	/;"	d
EXYNOS_VIDINTCON0_INTFRMEN_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INTFRMEN_ENABLE	/;"	d
EXYNOS_VIDINTCON0_INT_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INT_DISABLE	/;"	d
EXYNOS_VIDINTCON0_INT_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INT_ENABLE	/;"	d
EXYNOS_VIDINTCON0_INT_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_INT_MASK	/;"	d
EXYNOS_VIDINTCON0_SYSIFDONE_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_SYSIFDONE_DISABLE	/;"	d
EXYNOS_VIDINTCON0_SYSIFDONE_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_SYSIFDONE_ENABLE	/;"	d
EXYNOS_VIDINTCON0_SYSMAINCON_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_SYSMAINCON_DISABLE	/;"	d
EXYNOS_VIDINTCON0_SYSMAINCON_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_SYSMAINCON_ENABLE	/;"	d
EXYNOS_VIDINTCON0_SYSSUBCON_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_SYSSUBCON_DISABLE	/;"	d
EXYNOS_VIDINTCON0_SYSSUBCON_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON0_SYSSUBCON_ENABLE	/;"	d
EXYNOS_VIDINTCON1_INTFIFOPEND	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON1_INTFIFOPEND	/;"	d
EXYNOS_VIDINTCON1_INTFRMPEND	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON1_INTFRMPEND	/;"	d
EXYNOS_VIDINTCON1_INTI80PEND	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON1_INTI80PEND	/;"	d
EXYNOS_VIDINTCON1_INTVPPEND	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDINTCON1_INTVPPEND	/;"	d
EXYNOS_VIDOSD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD(/;"	d
EXYNOS_VIDOSD_ALPHA0_B	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA0_B(/;"	d
EXYNOS_VIDOSD_ALPHA0_G	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA0_G(/;"	d
EXYNOS_VIDOSD_ALPHA0_R	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA0_R(/;"	d
EXYNOS_VIDOSD_ALPHA0_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA0_SHIFT	/;"	d
EXYNOS_VIDOSD_ALPHA1_B	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA1_B(/;"	d
EXYNOS_VIDOSD_ALPHA1_G	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA1_G(/;"	d
EXYNOS_VIDOSD_ALPHA1_R	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA1_R(/;"	d
EXYNOS_VIDOSD_ALPHA1_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_ALPHA1_SHIFT	/;"	d
EXYNOS_VIDOSD_BOTTOM_Y	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_BOTTOM_Y(/;"	d
EXYNOS_VIDOSD_BOTTOM_Y_E	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_BOTTOM_Y_E(/;"	d
EXYNOS_VIDOSD_LEFT_X	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_LEFT_X(/;"	d
EXYNOS_VIDOSD_RIGHT_X	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_RIGHT_X(/;"	d
EXYNOS_VIDOSD_RIGHT_X_E	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_RIGHT_X_E(/;"	d
EXYNOS_VIDOSD_SIZE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_SIZE(/;"	d
EXYNOS_VIDOSD_TOP_Y	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDOSD_TOP_Y(/;"	d
EXYNOS_VIDTCON0_VBPD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON0_VBPD(/;"	d
EXYNOS_VIDTCON0_VBPDE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON0_VBPDE(/;"	d
EXYNOS_VIDTCON0_VFPD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON0_VFPD(/;"	d
EXYNOS_VIDTCON0_VSPW	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON0_VSPW(/;"	d
EXYNOS_VIDTCON1_HBPD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON1_HBPD(/;"	d
EXYNOS_VIDTCON1_HFPD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON1_HFPD(/;"	d
EXYNOS_VIDTCON1_HSPW	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON1_HSPW(/;"	d
EXYNOS_VIDTCON1_VFPDE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON1_VFPDE(/;"	d
EXYNOS_VIDTCON2_HOZVAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON2_HOZVAL(/;"	d
EXYNOS_VIDTCON2_HOZVAL_E	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON2_HOZVAL_E(/;"	d
EXYNOS_VIDTCON2_LINEVAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON2_LINEVAL(/;"	d
EXYNOS_VIDTCON2_LINEVAL_E	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_VIDTCON2_LINEVAL_E(/;"	d
EXYNOS_WINCON	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON(/;"	d
EXYNOS_WINCON1_LOCALSEL_FIMC1	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON1_LOCALSEL_FIMC1	/;"	d
EXYNOS_WINCON1_LOCALSEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON1_LOCALSEL_MASK	/;"	d
EXYNOS_WINCON1_LOCALSEL_VP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON1_LOCALSEL_VP	/;"	d
EXYNOS_WINCON1_VP_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON1_VP_DISABLE	/;"	d
EXYNOS_WINCON1_VP_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON1_VP_ENABLE	/;"	d
EXYNOS_WINCON_ALPHA0_SEL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ALPHA0_SEL	/;"	d
EXYNOS_WINCON_ALPHA1_SEL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ALPHA1_SEL	/;"	d
EXYNOS_WINCON_ALPHA_MULTI_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ALPHA_MULTI_DISABLE	/;"	d
EXYNOS_WINCON_ALPHA_MULTI_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ALPHA_MULTI_ENABLE	/;"	d
EXYNOS_WINCON_ALPHA_SEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ALPHA_SEL_MASK	/;"	d
EXYNOS_WINCON_BITSWP_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BITSWP_DISABLE	/;"	d
EXYNOS_WINCON_BITSWP_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BITSWP_ENABLE	/;"	d
EXYNOS_WINCON_BITSWP_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BITSWP_SHIFT	/;"	d
EXYNOS_WINCON_BLD_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BLD_MASK	/;"	d
EXYNOS_WINCON_BLD_PIXEL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BLD_PIXEL	/;"	d
EXYNOS_WINCON_BLD_PLANE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BLD_PLANE	/;"	d
EXYNOS_WINCON_BPPMODE_15BPP_555	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_15BPP_555	/;"	d
EXYNOS_WINCON_BPPMODE_16BPP_565	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_16BPP_565	/;"	d
EXYNOS_WINCON_BPPMODE_16BPP_A444	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_16BPP_A444	/;"	d
EXYNOS_WINCON_BPPMODE_16BPP_A555	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_16BPP_A555	/;"	d
EXYNOS_WINCON_BPPMODE_18BPP_666	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_18BPP_666	/;"	d
EXYNOS_WINCON_BPPMODE_18BPP_A665	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_18BPP_A665	/;"	d
EXYNOS_WINCON_BPPMODE_1BPP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_1BPP	/;"	d
EXYNOS_WINCON_BPPMODE_24BPP_888	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_24BPP_888	/;"	d
EXYNOS_WINCON_BPPMODE_24BPP_A887	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_24BPP_A887	/;"	d
EXYNOS_WINCON_BPPMODE_2BPP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_2BPP	/;"	d
EXYNOS_WINCON_BPPMODE_32BPP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_32BPP	/;"	d
EXYNOS_WINCON_BPPMODE_4BPP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_4BPP	/;"	d
EXYNOS_WINCON_BPPMODE_8BPP	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_8BPP	/;"	d
EXYNOS_WINCON_BPPMODE_8BPP_PAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_8BPP_PAL	/;"	d
EXYNOS_WINCON_BPPMODE_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_MASK	/;"	d
EXYNOS_WINCON_BPPMODE_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BPPMODE_SHIFT	/;"	d
EXYNOS_WINCON_BUFAUTO_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFAUTO_DISABLE	/;"	d
EXYNOS_WINCON_BUFAUTO_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFAUTO_ENABLE	/;"	d
EXYNOS_WINCON_BUFAUTO_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFAUTO_MASK	/;"	d
EXYNOS_WINCON_BUFSEL_0	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFSEL_0	/;"	d
EXYNOS_WINCON_BUFSEL_1	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFSEL_1	/;"	d
EXYNOS_WINCON_BUFSEL_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFSEL_MASK	/;"	d
EXYNOS_WINCON_BUFSEL_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BUFSEL_SHIFT	/;"	d
EXYNOS_WINCON_BURSTLEN_16WORD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BURSTLEN_16WORD	/;"	d
EXYNOS_WINCON_BURSTLEN_4WORD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BURSTLEN_4WORD	/;"	d
EXYNOS_WINCON_BURSTLEN_8WORD	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BURSTLEN_8WORD	/;"	d
EXYNOS_WINCON_BURSTLEN_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BURSTLEN_MASK	/;"	d
EXYNOS_WINCON_BYTESWP_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BYTESWP_DISABLE	/;"	d
EXYNOS_WINCON_BYTESWP_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BYTESWP_ENABLE	/;"	d
EXYNOS_WINCON_BYTESWP_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_BYTESWP_SHIFT	/;"	d
EXYNOS_WINCON_DATAPATH_DMA	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_DATAPATH_DMA	/;"	d
EXYNOS_WINCON_DATAPATH_LOCAL	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_DATAPATH_LOCAL	/;"	d
EXYNOS_WINCON_DATAPATH_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_DATAPATH_MASK	/;"	d
EXYNOS_WINCON_ENWIN_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ENWIN_DISABLE	/;"	d
EXYNOS_WINCON_ENWIN_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_ENWIN_ENABLE	/;"	d
EXYNOS_WINCON_HAWSWP_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_HAWSWP_DISABLE	/;"	d
EXYNOS_WINCON_HAWSWP_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_HAWSWP_ENABLE	/;"	d
EXYNOS_WINCON_HAWSWP_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_HAWSWP_SHIFT	/;"	d
EXYNOS_WINCON_INRGB_MASK	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_INRGB_MASK	/;"	d
EXYNOS_WINCON_INRGB_RGB	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_INRGB_RGB	/;"	d
EXYNOS_WINCON_INRGB_YUV	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_INRGB_YUV	/;"	d
EXYNOS_WINCON_WSWP_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_WSWP_DISABLE	/;"	d
EXYNOS_WINCON_WSWP_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_WSWP_ENABLE	/;"	d
EXYNOS_WINCON_WSWP_SHIFT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINCON_WSWP_SHIFT	/;"	d
EXYNOS_WINMAP_COLOR	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINMAP_COLOR(/;"	d
EXYNOS_WINMAP_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINMAP_ENABLE	/;"	d
EXYNOS_WINSHMAP_CH_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINSHMAP_CH_DISABLE(/;"	d
EXYNOS_WINSHMAP_CH_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINSHMAP_CH_ENABLE(/;"	d
EXYNOS_WINSHMAP_LOCAL_DISABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINSHMAP_LOCAL_DISABLE(/;"	d
EXYNOS_WINSHMAP_LOCAL_ENABLE	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINSHMAP_LOCAL_ENABLE(/;"	d
EXYNOS_WINSHMAP_PROTECT	arch/arm/mach-exynos/include/mach/fb.h	/^#define EXYNOS_WINSHMAP_PROTECT(/;"	d
EX_CS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_CS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_CS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	EX_CS0_N_MARK, RD_N_MARK,$/;"	e	enum:__anona307835a0103	file:
EX_CS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	EX_CS0_N_MARK, RD_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
EX_CS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_CS1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_CS2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_CS2_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_CS3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_CS3_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_CS4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_CS4_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_CS5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_CS5_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_WAIT0_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	EX_WAIT0_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
EX_WAIT0_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	EX_WAIT0_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
EX_WAIT0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_WAIT0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	EX_WAIT0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
EX_WAIT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_WAIT0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,$/;"	e	enum:__anona307879b0103	file:
EX_WAIT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,$/;"	e	enum:__anona3077f190103	file:
EX_WAIT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK,$/;"	e	enum:__anona3077f190103	file:
EYE_PATTERN	board/hisilicon/hikey/hikey.c	/^#define EYE_PATTERN	/;"	d	file:
E_AND	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_ASM_BAD_OPCODE	include/bedbug/ppc.h	/^#define E_ASM_BAD_OPCODE	/;"	d
E_ASM_BAD_REGISTER	include/bedbug/ppc.h	/^#define E_ASM_BAD_REGISTER	/;"	d
E_ASM_BAD_SPR	include/bedbug/ppc.h	/^#define E_ASM_BAD_SPR	/;"	d
E_ASM_BAD_TBR	include/bedbug/ppc.h	/^#define E_ASM_BAD_TBR	/;"	d
E_ASM_NUM_OPERANDS	include/bedbug/ppc.h	/^#define E_ASM_NUM_OPERANDS	/;"	d
E_Comp_2	lib/dhry/dhry.h	/^                  Enumeration E_Comp_2;$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0408	typeref:typename:Enumeration
E_EQUAL	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_FSR	drivers/mtd/spi/sf_internal.h	/^#define E_FSR	/;"	d
E_IO_HV_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define E_IO_HV_SHIFT	/;"	d	file:
E_LIST	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_NONE	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_NOT	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_OR	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_RANGE	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_SYMBOL	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
E_UNEQUAL	scripts/kconfig/expr.h	/^	E_NONE, E_OR, E_AND, E_NOT, E_EQUAL, E_UNEQUAL, E_LIST, E_SYMBOL, E_RANGE$/;"	e	enum:expr_type
EarlyTxThld	drivers/net/rtl8169.c	/^#define EarlyTxThld	/;"	d	file:
EarlyTxThres	drivers/net/rtl8169.c	/^	EarlyTxThres = 0xEC,$/;"	e	enum:RTL8169_registers	file:
EchoPrintTestLines	tools/patman/terminal.py	/^def EchoPrintTestLines():$/;"	f
Edac_Control	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Edac_Control;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Elf32_Addr	include/elf.h	/^typedef uint32_t	Elf32_Addr;	\/* Unsigned program address *\/$/;"	t	typeref:typename:uint32_t
Elf32_Dyn	include/elf.h	/^} Elf32_Dyn;$/;"	t	typeref:struct:__anona52b83e50708
Elf32_Ehdr	include/elf.h	/^} Elf32_Ehdr;$/;"	t	typeref:struct:elfhdr
Elf32_Half	include/elf.h	/^typedef uint16_t	Elf32_Half;	\/* Unsigned medium integer *\/$/;"	t	typeref:typename:uint16_t
Elf32_Off	include/elf.h	/^typedef uint32_t	Elf32_Off;	\/* Unsigned file offset *\/$/;"	t	typeref:typename:uint32_t
Elf32_Phdr	include/elf.h	/^} Elf32_Phdr;$/;"	t	typeref:struct:__anona52b83e50608
Elf32_Rel	include/elf.h	/^} Elf32_Rel;$/;"	t	typeref:struct:__anona52b83e50208
Elf32_Rela	include/elf.h	/^} Elf32_Rela;$/;"	t	typeref:struct:__anona52b83e50308
Elf32_Shdr	include/elf.h	/^} Elf32_Shdr;$/;"	t	typeref:struct:__anona52b83e50108
Elf32_Sword	include/elf.h	/^typedef int32_t		Elf32_Sword;	\/* Signed large integer *\/$/;"	t	typeref:typename:int32_t
Elf32_Sym	include/elf.h	/^} Elf32_Sym;$/;"	t	typeref:struct:elf32_sym
Elf32_Word	common/bedbug.c	/^#define Elf32_Word	/;"	d	file:
Elf32_Word	include/elf.h	/^typedef uint32_t	Elf32_Word;	\/* Unsigned large integer *\/$/;"	t	typeref:typename:uint32_t
Elf64_Addr	include/elf.h	/^typedef uint64_t	Elf64_Addr;$/;"	t	typeref:typename:uint64_t
Elf64_Dyn	include/elf.h	/^} Elf64_Dyn;$/;"	t	typeref:struct:__anona52b83e50908
Elf64_Half	include/elf.h	/^typedef uint16_t	Elf64_Half;$/;"	t	typeref:typename:uint16_t
Elf64_Off	include/elf.h	/^typedef uint64_t	Elf64_Off;$/;"	t	typeref:typename:uint64_t
Elf64_Rel	include/elf.h	/^} Elf64_Rel;$/;"	t	typeref:struct:__anona52b83e50408
Elf64_Rela	include/elf.h	/^} Elf64_Rela;$/;"	t	typeref:struct:__anona52b83e50508
Elf64_SHalf	include/elf.h	/^typedef int16_t		Elf64_SHalf;$/;"	t	typeref:typename:int16_t
Elf64_Sword	include/elf.h	/^typedef int32_t		Elf64_Sword;$/;"	t	typeref:typename:int32_t
Elf64_Sxword	include/elf.h	/^typedef int64_t		Elf64_Sxword;$/;"	t	typeref:typename:int64_t
Elf64_Word	include/elf.h	/^typedef uint32_t	Elf64_Word;$/;"	t	typeref:typename:uint32_t
Elf64_Xword	include/elf.h	/^typedef uint64_t	Elf64_Xword;$/;"	t	typeref:typename:uint64_t
EmailPatches	tools/patman/gitutil.py	/^def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname,$/;"	f
EnableDMA	board/bf527-ezkit/video.c	/^void EnableDMA(void)$/;"	f	typeref:typename:void
EnableDMA	board/bf548-ezkit/video.c	/^void EnableDMA(void)$/;"	f	typeref:typename:void
EnableDMA	board/cm-bf548/video.c	/^void EnableDMA(void)$/;"	f	typeref:typename:void
EnablePPI	board/bf527-ezkit/video.c	/^void EnablePPI(void)$/;"	f	typeref:typename:void
EnablePPI	board/bf548-ezkit/video.c	/^void EnablePPI(void)$/;"	f	typeref:typename:void
EnablePPI	board/cm-bf548/video.c	/^void EnablePPI(void)$/;"	f	typeref:typename:void
EnableTIMER0	board/bf527-ezkit/video.c	/^void EnableTIMER0(void)$/;"	f	typeref:typename:void
EnableTIMER1	board/bf527-ezkit/video.c	/^void EnableTIMER1(void)$/;"	f	typeref:typename:void
EnableTIMER12	board/bf527-ezkit/video.c	/^void EnableTIMER12(void)$/;"	f	typeref:typename:void
End_Time	lib/dhry/dhry_1.c	/^                End_Time,$/;"	v	typeref:typename:long
EndpointOutRequest	include/usb_defs.h	/^#define EndpointOutRequest /;"	d
EndpointRequest	include/usb_defs.h	/^#define EndpointRequest /;"	d
EnsureCompiled	tools/dtoc/fdt_util.py	/^def EnsureCompiled(fname):$/;"	f
Enum_Comp	lib/dhry/dhry.h	/^                  Enumeration Enum_Comp;$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0308	typeref:typename:Enumeration
Enumeration	lib/dhry/dhry.h	/^                Enumeration;$/;"	t	typeref:enum:__anon8188259e0103
Enumeration	lib/dhry/dhry.h	/^  typedef int   Enumeration;$/;"	t	typeref:typename:int
Environment commands	cmd/Kconfig	/^menu "Environment commands"$/;"	m	menu:Command line interface
Environment variables	test/py/README.md	/^#### Environment variables$/;"	t	subsection:U-Boot pytest suite""Testing real hardware""Hook scripts
EqualLenVal	board/esd/common/xilinx_jtag/lenval.c	/^short EqualLenVal( lenVal*  plvTdoExpected,$/;"	f	typeref:typename:short
Error	tools/gdb/error.c	/^Error(char *fmt, ...)$/;"	f	typeref:typename:void
Error	tools/patman/tout.py	/^def Error(msg):$/;"	f
Examples	test/py/README.md	/^#### Examples$/;"	t	subsection:U-Boot pytest suite""Testing real hardware""Hook scripts
ExceptionHandler	arch/xtensa/cpu/start.S	/^ExceptionHandler:$/;"	l
ExcpHndlr	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^typedef void		(*ExcpHndlr) (void) ;$/;"	t	typeref:typename:void (*)(void)
ExcpHndlr	include/SA-1100.h	/^typedef void		(*ExcpHndlr) (void) ;$/;"	t	typeref:typename:void (*)(void)
Execution environment configuration	test/py/README.md	/^### Execution environment configuration$/;"	S	section:U-Boot pytest suite""Testing real hardware
Expr	tools/buildman/board.py	/^class Expr:$/;"	c
ExtIntException	arch/powerpc/cpu/mpc85xx/traps.c	/^void ExtIntException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ExtPhy	drivers/net/natsemi.c	/^	ExtPhy		= 0x00001000,$/;"	e	enum:ChipConfigBits	file:
ExtStEn	drivers/net/ns8382x.c	/^	ExtStEn = 0x00000100,$/;"	e	enum:ChipConfigBits	file:
ExtractBlock	tools/img2srec.c	/^static uint8_t* ExtractBlock(uint16_t count, uint8_t* data, uint8_t* buffer)$/;"	f	typeref:typename:uint8_t *	file:
ExtractDecimal	tools/img2srec.c	/^static char* ExtractDecimal (uint32_t* value,  char* getPtr)$/;"	f	typeref:typename:char *	file:
ExtractHex	tools/img2srec.c	/^static char* ExtractHex (uint32_t* value,  char* getPtr)$/;"	f	typeref:typename:char *	file:
ExtractLong	tools/img2srec.c	/^static uint8_t* ExtractLong(uint32_t* value, uint8_t* buffer)$/;"	f	typeref:typename:uint8_t *	file:
ExtractNumber	tools/img2srec.c	/^static void ExtractNumber (uint32_t* value,  char* getPtr)$/;"	f	typeref:typename:void	file:
ExtractWord	tools/img2srec.c	/^static uint8_t* ExtractWord(uint16_t* value, uint8_t* buffer)$/;"	f	typeref:typename:uint8_t *	file:
F	lib/sha1.c	/^#define F(/;"	d	file:
F0	lib/sha256.c	/^#define F0(/;"	d	file:
F1	lib/md5.c	/^#define F1(/;"	d	file:
F1	lib/sha256.c	/^#define F1(/;"	d	file:
F1VB_AD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define F1VB_AD /;"	d
F1VB_BD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define F1VB_BD /;"	d
F1_ACT	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define F1_ACT /;"	d
F1stBit	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define F1stBit(/;"	d
F1stBit	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define F1stBit(/;"	d
F2	lib/md5.c	/^#define F2(/;"	d	file:
F2VB_AD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define F2VB_AD /;"	d
F2VB_BD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define F2VB_BD /;"	d
F2_ACT	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define F2_ACT /;"	d
F3	lib/md5.c	/^#define F3(/;"	d	file:
F4	lib/md5.c	/^#define F4(/;"	d	file:
F88F5182_REGS_PHYS_BASE	arch/arm/mach-orion5x/include/mach/mv88f5182.h	/^#define F88F5182_REGS_PHYS_BASE	/;"	d
FABRIC_UNITS_PREFETCH_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define FABRIC_UNITS_PREFETCH_CONTROL_REG	/;"	d
FABRIC_UNITS_PREFETCH_CONTROL_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define FABRIC_UNITS_PREFETCH_CONTROL_REG	/;"	d
FABRIC_UNITS_PRIORITY_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define FABRIC_UNITS_PRIORITY_CONTROL_REG	/;"	d
FABRIC_UNITS_PRIORITY_CONTROL_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define FABRIC_UNITS_PRIORITY_CONTROL_REG	/;"	d
FAB_OPT	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define FAB_OPT	/;"	d
FAB_OPT	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define FAB_OPT	/;"	d
FACTOR0	drivers/thermal/imx_thermal.c	/^#define FACTOR0	/;"	d	file:
FACTOR1	drivers/thermal/imx_thermal.c	/^#define FACTOR1	/;"	d	file:
FACTOR2	drivers/thermal/imx_thermal.c	/^#define FACTOR2	/;"	d	file:
FAILED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	FAILED$/;"	e	enum:link_training_state
FAKE_HEADER_SIZE	tools/socfpgaimage.c	/^#define FAKE_HEADER_SIZE /;"	d	file:
FALLBACK_QSORT_SMALL_THRESH	lib/bzip2/bzlib_blocksort.c	/^#define FALLBACK_QSORT_SMALL_THRESH /;"	d	file:
FALLBACK_QSORT_STACK_SIZE	lib/bzip2/bzlib_blocksort.c	/^#define FALLBACK_QSORT_STACK_SIZE /;"	d	file:
FAM10H_MMIO_CONF_BASE_MASK	arch/x86/include/asm/msr-index.h	/^#define FAM10H_MMIO_CONF_BASE_MASK	/;"	d
FAM10H_MMIO_CONF_BASE_SHIFT	arch/x86/include/asm/msr-index.h	/^#define FAM10H_MMIO_CONF_BASE_SHIFT	/;"	d
FAM10H_MMIO_CONF_BUSRANGE_MASK	arch/x86/include/asm/msr-index.h	/^#define FAM10H_MMIO_CONF_BUSRANGE_MASK	/;"	d
FAM10H_MMIO_CONF_BUSRANGE_SHIFT	arch/x86/include/asm/msr-index.h	/^#define FAM10H_MMIO_CONF_BUSRANGE_SHIFT /;"	d
FAM10H_MMIO_CONF_ENABLE	arch/x86/include/asm/msr-index.h	/^#define FAM10H_MMIO_CONF_ENABLE	/;"	d
FAN_CONFIG	board/gdsys/common/fanctrl.c	/^	FAN_CONFIG = 0x03,$/;"	e	enum:__anonc25617080103	file:
FAN_PWM_FREQ	board/gdsys/common/fanctrl.c	/^	FAN_PWM_FREQ = 0x4D,$/;"	e	enum:__anonc25617080103	file:
FAN_TACHLIM_LSB	board/gdsys/common/fanctrl.c	/^	FAN_TACHLIM_LSB = 0x48,$/;"	e	enum:__anonc25617080103	file:
FAN_TACHLIM_MSB	board/gdsys/common/fanctrl.c	/^	FAN_TACHLIM_MSB = 0x49,$/;"	e	enum:__anonc25617080103	file:
FAR	include/u-boot/zlib.h	/^#      define FAR /;"	d
FAR	include/u-boot/zlib.h	/^#  define FAR$/;"	d
FAR_END_DIMM_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define FAR_END_DIMM_ADDR	/;"	d
FAR_END_DIMM_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define FAR_END_DIMM_ADDR	/;"	d
FASE_CLK_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define FASE_CLK_FREQ	/;"	d
FAST	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	FAST	/;"	d
FASTBOOT	cmd/fastboot/Kconfig	/^config FASTBOOT$/;"	c
FASTBOOT_BUF_ADDR	cmd/fastboot/Kconfig	/^config FASTBOOT_BUF_ADDR$/;"	c	menu:Fastboot support
FASTBOOT_BUF_SIZE	cmd/fastboot/Kconfig	/^config FASTBOOT_BUF_SIZE$/;"	c	menu:Fastboot support
FASTBOOT_FLASH	cmd/fastboot/Kconfig	/^config FASTBOOT_FLASH$/;"	c	menu:Fastboot support
FASTBOOT_FLASH_MMC_DEV	cmd/fastboot/Kconfig	/^config FASTBOOT_FLASH_MMC_DEV$/;"	c	menu:Fastboot support
FASTBOOT_GPT_NAME	cmd/fastboot/Kconfig	/^config FASTBOOT_GPT_NAME$/;"	c	menu:Fastboot support
FASTBOOT_INTERFACE_CLASS	drivers/usb/gadget/f_fastboot.c	/^#define FASTBOOT_INTERFACE_CLASS	/;"	d	file:
FASTBOOT_INTERFACE_PROTOCOL	drivers/usb/gadget/f_fastboot.c	/^#define FASTBOOT_INTERFACE_PROTOCOL	/;"	d	file:
FASTBOOT_INTERFACE_SUB_CLASS	drivers/usb/gadget/f_fastboot.c	/^#define FASTBOOT_INTERFACE_SUB_CLASS	/;"	d	file:
FASTBOOT_KEY_GPIO	board/rockchip/kylin_rk3036/kylin_rk3036.c	/^#define FASTBOOT_KEY_GPIO /;"	d	file:
FASTBOOT_MBR_NAME	cmd/fastboot/Kconfig	/^config FASTBOOT_MBR_NAME$/;"	c	menu:Fastboot support
FASTBOOT_RESPONSE_LEN	include/fastboot.h	/^#define FASTBOOT_RESPONSE_LEN	/;"	d
FASTBOOT_VERSION	drivers/usb/gadget/f_fastboot.c	/^#define FASTBOOT_VERSION	/;"	d	file:
FASTCPU	board/mpl/vcma9/lowlevel_init.S	/^#define FASTCPU	/;"	d	file:
FAST_ETH	drivers/qe/uccf.h	/^	FAST_ETH,$/;"	e	enum:enet_type
FAST_MODE	include/linux/mtd/st_smi.h	/^#define FAST_MODE	/;"	d
FAST_PCB0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   FAST_PCB0	/;"	d
FAST_PCB1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   FAST_PCB1	/;"	d
FAST_SCB0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   FAST_SCB0	/;"	d
FAST_SCB1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   FAST_SCB1	/;"	d
FAST_SRAM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define FAST_SRAM_BASE_ADDR /;"	d
FAT12BUFSIZE	include/fat.h	/^#define FAT12BUFSIZE	/;"	d
FAT12_SIGN	include/fat.h	/^#define FAT12_SIGN	/;"	d
FAT16BUFSIZE	include/fat.h	/^#define FAT16BUFSIZE	/;"	d
FAT16_SIGN	include/fat.h	/^#define FAT16_SIGN	/;"	d
FAT2CPU16	include/fat.h	/^#define FAT2CPU16	/;"	d
FAT2CPU16	include/fat.h	/^#define FAT2CPU16(/;"	d
FAT2CPU32	include/fat.h	/^#define FAT2CPU32	/;"	d
FAT2CPU32	include/fat.h	/^#define FAT2CPU32(/;"	d
FAT32BUFSIZE	include/fat.h	/^#define FAT32BUFSIZE	/;"	d
FAT32_SIGN	include/fat.h	/^#define FAT32_SIGN	/;"	d
FATBUFBLOCKS	include/fat.h	/^#define FATBUFBLOCKS	/;"	d
FATBUFSIZE	include/fat.h	/^#define FATBUFSIZE	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/am335x_evm.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/am43xx_evm.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/am57xx_evm.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/at91-sama5_common.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/at91sam9m10g45ek.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/at91sam9n12ek.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/at91sam9rlek.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/at91sam9x5ek.h	/^#define FAT_ENV_DEVICE_AND_PART /;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/hikey.h	/^#define FAT_ENV_DEVICE_AND_PART /;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/k2g_evm.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/omap4_panda.h	/^#define FAT_ENV_DEVICE_AND_PART /;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/picosam9g45.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/rpi.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_DEVICE_AND_PART	include/configs/sama5d2_xplained.h	/^#define FAT_ENV_DEVICE_AND_PART	/;"	d
FAT_ENV_FILE	include/configs/am335x_evm.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/am43xx_evm.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/am57xx_evm.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/at91-sama5_common.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/at91sam9m10g45ek.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/at91sam9n12ek.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/at91sam9rlek.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/at91sam9x5ek.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/hikey.h	/^#define FAT_ENV_FILE /;"	d
FAT_ENV_FILE	include/configs/k2g_evm.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/omap4_panda.h	/^#define FAT_ENV_FILE /;"	d
FAT_ENV_FILE	include/configs/picosam9g45.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_FILE	include/configs/rpi.h	/^#define FAT_ENV_FILE	/;"	d
FAT_ENV_INTERFACE	include/configs/am335x_evm.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/am43xx_evm.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/am57xx_evm.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/at91-sama5_common.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/at91sam9m10g45ek.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/at91sam9n12ek.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/at91sam9rlek.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/at91sam9x5ek.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/hikey.h	/^#define FAT_ENV_INTERFACE /;"	d
FAT_ENV_INTERFACE	include/configs/k2g_evm.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/omap4_panda.h	/^#define FAT_ENV_INTERFACE /;"	d
FAT_ENV_INTERFACE	include/configs/picosam9g45.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAT_ENV_INTERFACE	include/configs/rpi.h	/^#define FAT_ENV_INTERFACE	/;"	d
FAlnMsk	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define FAlnMsk(/;"	d
FAlnMsk	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define FAlnMsk(/;"	d
FBAR_BLK	arch/powerpc/include/asm/fsl_lbc.h	/^#define FBAR_BLK /;"	d
FBBRW	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define FBBRW	/;"	d
FBCS_CSAR_BA	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSAR_BA(/;"	d
FBCS_CSCR_AA	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_AA	/;"	d
FBCS_CSCR_AA_OFF	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_AA_OFF /;"	d
FBCS_CSCR_AA_ON	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_AA_ON /;"	d
FBCS_CSCR_ASET	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_ASET(/;"	d
FBCS_CSCR_ASET_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_ASET_MASK	/;"	d
FBCS_CSCR_BEM	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BEM	/;"	d
FBCS_CSCR_BEM_OFF	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BEM_OFF /;"	d
FBCS_CSCR_BEM_ON	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BEM_ON /;"	d
FBCS_CSCR_BSTR	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BSTR	/;"	d
FBCS_CSCR_BSTR_OFF	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BSTR_OFF /;"	d
FBCS_CSCR_BSTR_ON	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BSTR_ON /;"	d
FBCS_CSCR_BSTW	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BSTW	/;"	d
FBCS_CSCR_BSTW_OFF	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BSTW_OFF /;"	d
FBCS_CSCR_BSTW_ON	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_BSTW_ON /;"	d
FBCS_CSCR_IWS	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_IWS(/;"	d
FBCS_CSCR_PS	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS(/;"	d
FBCS_CSCR_PS_16	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_16	/;"	d
FBCS_CSCR_PS_16	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_16 /;"	d
FBCS_CSCR_PS_32	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_32	/;"	d
FBCS_CSCR_PS_32	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_32 /;"	d
FBCS_CSCR_PS_8	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_8	/;"	d
FBCS_CSCR_PS_8	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_8 /;"	d
FBCS_CSCR_PS_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_PS_MASK	/;"	d
FBCS_CSCR_RDAH	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_RDAH(/;"	d
FBCS_CSCR_RDAH_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_RDAH_MASK	/;"	d
FBCS_CSCR_SBM	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_SBM	/;"	d
FBCS_CSCR_SRWS	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_SRWS(/;"	d
FBCS_CSCR_SWS	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_SWS(/;"	d
FBCS_CSCR_SWSEN	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_SWSEN	/;"	d
FBCS_CSCR_SWS_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_SWS_MASK	/;"	d
FBCS_CSCR_SWWS	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_SWWS(/;"	d
FBCS_CSCR_WRAH	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_WRAH(/;"	d
FBCS_CSCR_WRAH_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_WRAH_MASK	/;"	d
FBCS_CSCR_WS	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_WS(/;"	d
FBCS_CSCR_WS_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSCR_WS_MASK	/;"	d
FBCS_CSMR_AM	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_AM	/;"	d
FBCS_CSMR_BAM	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM(/;"	d
FBCS_CSMR_BAM_1024K	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_1024K	/;"	d
FBCS_CSMR_BAM_1024M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_1024M	/;"	d
FBCS_CSMR_BAM_128K	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_128K	/;"	d
FBCS_CSMR_BAM_128M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_128M	/;"	d
FBCS_CSMR_BAM_16M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_16M	/;"	d
FBCS_CSMR_BAM_1G	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_1G	/;"	d
FBCS_CSMR_BAM_1M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_1M	/;"	d
FBCS_CSMR_BAM_256K	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_256K	/;"	d
FBCS_CSMR_BAM_256M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_256M	/;"	d
FBCS_CSMR_BAM_2G	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_2G	/;"	d
FBCS_CSMR_BAM_2M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_2M	/;"	d
FBCS_CSMR_BAM_32M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_32M	/;"	d
FBCS_CSMR_BAM_4G	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_4G	/;"	d
FBCS_CSMR_BAM_4M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_4M	/;"	d
FBCS_CSMR_BAM_512K	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_512K	/;"	d
FBCS_CSMR_BAM_512M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_512M	/;"	d
FBCS_CSMR_BAM_64K	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_64K	/;"	d
FBCS_CSMR_BAM_64M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_64M	/;"	d
FBCS_CSMR_BAM_8M	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_8M	/;"	d
FBCS_CSMR_BAM_MASK	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_BAM_MASK	/;"	d
FBCS_CSMR_CI	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_CI	/;"	d
FBCS_CSMR_SC	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_SC	/;"	d
FBCS_CSMR_SD	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_SD	/;"	d
FBCS_CSMR_UC	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_UC	/;"	d
FBCS_CSMR_UD	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_UD	/;"	d
FBCS_CSMR_V	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_V	/;"	d
FBCS_CSMR_WP	arch/m68k/include/asm/coldfire/flexbus.h	/^#define FBCS_CSMR_WP	/;"	d
FBINFO_BE_MATH	include/linux/fb.h	/^#define FBINFO_BE_MATH	/;"	d
FBINFO_DEFAULT	include/linux/fb.h	/^#define FBINFO_DEFAULT	/;"	d
FBINFO_FLAG_DEFAULT	include/linux/fb.h	/^#define FBINFO_FLAG_DEFAULT	/;"	d
FBINFO_FLAG_MODULE	include/linux/fb.h	/^#define FBINFO_FLAG_MODULE	/;"	d
FBINFO_FOREIGN_ENDIAN	include/linux/fb.h	/^#define FBINFO_FOREIGN_ENDIAN	/;"	d
FBINFO_HWACCEL_DISABLED	include/linux/fb.h	/^#define FBINFO_HWACCEL_DISABLED	/;"	d
FBINFO_MISC_ALWAYS_SETPAR	include/linux/fb.h	/^#define FBINFO_MISC_ALWAYS_SETPAR /;"	d
FBINFO_MODULE	include/linux/fb.h	/^#define FBINFO_MODULE	/;"	d
FBINFO_PARTIAL_PAN_OK	include/linux/fb.h	/^#define FBINFO_PARTIAL_PAN_OK	/;"	d
FBINFO_READS_FAST	include/linux/fb.h	/^#define FBINFO_READS_FAST	/;"	d
FBINFO_STATE_RUNNING	include/linux/fb.h	/^#define FBINFO_STATE_RUNNING	/;"	d
FBINFO_STATE_SUSPENDED	include/linux/fb.h	/^#define FBINFO_STATE_SUSPENDED	/;"	d
FBM_LSB	drivers/spi/rk_spi.h	/^	FBM_LSB,		\/* first bit in LSB *\/$/;"	e	enum:__anondde5bacc0103
FBM_MASK	drivers/spi/rk_spi.h	/^	FBM_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
FBM_MSB	drivers/spi/rk_spi.h	/^	FBM_MSB		= 0,	\/* first bit is MSB *\/$/;"	e	enum:__anondde5bacc0103
FBM_SHIFT	drivers/spi/rk_spi.h	/^	FBM_SHIFT	= 12,	\/* First Bit Mode *\/$/;"	e	enum:__anondde5bacc0103
FBR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR0	/;"	d
FBR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR1	/;"	d
FBR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR2	/;"	d
FBR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR3	/;"	d
FBR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR4	/;"	d
FBR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR5	/;"	d
FBR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FBR6	/;"	d
FBSIZE	drivers/video/am335x-fb.c	/^#define FBSIZE(/;"	d	file:
FB_ACCEL_NONE	include/linux/fb.h	/^#define FB_ACCEL_NONE	/;"	d
FB_ACTIVATE_ALL	include/linux/fb.h	/^#define FB_ACTIVATE_ALL	/;"	d
FB_ACTIVATE_FORCE	include/linux/fb.h	/^#define FB_ACTIVATE_FORCE /;"	d
FB_ACTIVATE_INV_MODE	include/linux/fb.h	/^#define FB_ACTIVATE_INV_MODE /;"	d
FB_ACTIVATE_MASK	include/linux/fb.h	/^#define FB_ACTIVATE_MASK /;"	d
FB_ACTIVATE_NOW	include/linux/fb.h	/^#define FB_ACTIVATE_NOW	/;"	d
FB_ACTIVATE_NXTOPEN	include/linux/fb.h	/^#define FB_ACTIVATE_NXTOPEN	/;"	d
FB_ACTIVATE_TEST	include/linux/fb.h	/^#define FB_ACTIVATE_TEST	/;"	d
FB_ACTIVATE_VBL	include/linux/fb.h	/^#define FB_ACTIVATE_VBL	/;"	d
FB_AF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_AF /;"	d
FB_BACKLIGHT_LEVELS	include/linux/fb.h	/^#define FB_BACKLIGHT_LEVELS	/;"	d
FB_BACKLIGHT_MAX	include/linux/fb.h	/^#define FB_BACKLIGHT_MAX	/;"	d
FB_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define FB_BASE_ADDR	/;"	d
FB_BLANK_HSYNC_SUSPEND	include/linux/fb.h	/^	FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,$/;"	e	enum:__anone52b80150103
FB_BLANK_NORMAL	include/linux/fb.h	/^	FB_BLANK_NORMAL        = VESA_NO_BLANKING + 1,$/;"	e	enum:__anone52b80150103
FB_BLANK_POWERDOWN	include/linux/fb.h	/^	FB_BLANK_POWERDOWN     = VESA_POWERDOWN + 1$/;"	e	enum:__anone52b80150103
FB_BLANK_UNBLANK	include/linux/fb.h	/^	FB_BLANK_UNBLANK       = VESA_NO_BLANKING,$/;"	e	enum:__anone52b80150103
FB_BLANK_VSYNC_SUSPEND	include/linux/fb.h	/^	FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,$/;"	e	enum:__anone52b80150103
FB_CF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_CF /;"	d
FB_CHANGE_CMAP_VBL	include/linux/fb.h	/^#define FB_CHANGE_CMAP_VBL /;"	d
FB_CUR_SETALL	include/linux/fb.h	/^#define FB_CUR_SETALL	/;"	d
FB_CUR_SETCMAP	include/linux/fb.h	/^#define FB_CUR_SETCMAP	/;"	d
FB_CUR_SETHOT	include/linux/fb.h	/^#define FB_CUR_SETHOT	/;"	d
FB_CUR_SETIMAGE	include/linux/fb.h	/^#define FB_CUR_SETIMAGE /;"	d
FB_CUR_SETPOS	include/linux/fb.h	/^#define FB_CUR_SETPOS	/;"	d
FB_CUR_SETSHAPE	include/linux/fb.h	/^#define FB_CUR_SETSHAPE /;"	d
FB_CUR_SETSIZE	include/linux/fb.h	/^#define FB_CUR_SETSIZE	/;"	d
FB_DCLKTIMINGS	include/linux/fb.h	/^#define FB_DCLKTIMINGS	/;"	d
FB_DF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_DF /;"	d
FB_DISP_ANA_1000_400	include/linux/fb.h	/^#define FB_DISP_ANA_1000_400	/;"	d
FB_DISP_ANA_700_000	include/linux/fb.h	/^#define FB_DISP_ANA_700_000	/;"	d
FB_DISP_ANA_700_300	include/linux/fb.h	/^#define FB_DISP_ANA_700_300	/;"	d
FB_DISP_ANA_714_286	include/linux/fb.h	/^#define FB_DISP_ANA_714_286	/;"	d
FB_DISP_DDI	include/linux/fb.h	/^#define FB_DISP_DDI	/;"	d
FB_DISP_MONO	include/linux/fb.h	/^#define FB_DISP_MONO	/;"	d
FB_DISP_MULTI	include/linux/fb.h	/^#define FB_DISP_MULTI	/;"	d
FB_DISP_RGB	include/linux/fb.h	/^#define FB_DISP_RGB	/;"	d
FB_DISP_UNKNOWN	include/linux/fb.h	/^#define FB_DISP_UNKNOWN	/;"	d
FB_DPMS_ACTIVE_OFF	include/linux/fb.h	/^#define FB_DPMS_ACTIVE_OFF	/;"	d
FB_DPMS_STANDBY	include/linux/fb.h	/^#define FB_DPMS_STANDBY	/;"	d
FB_DPMS_SUSPEND	include/linux/fb.h	/^#define FB_DPMS_SUSPEND	/;"	d
FB_EVENT_BLANK	include/linux/fb.h	/^#define FB_EVENT_BLANK	/;"	d
FB_EVENT_CONBLANK	include/linux/fb.h	/^#define FB_EVENT_CONBLANK	/;"	d
FB_EVENT_FB_REGISTERED	include/linux/fb.h	/^#define FB_EVENT_FB_REGISTERED	/;"	d
FB_EVENT_FB_UNBIND	include/linux/fb.h	/^#define FB_EVENT_FB_UNBIND	/;"	d
FB_EVENT_FB_UNREGISTERED	include/linux/fb.h	/^#define FB_EVENT_FB_UNREGISTERED	/;"	d
FB_EVENT_GET_CONSOLE_MAP	include/linux/fb.h	/^#define FB_EVENT_GET_CONSOLE_MAP	/;"	d
FB_EVENT_GET_REQ	include/linux/fb.h	/^#define FB_EVENT_GET_REQ	/;"	d
FB_EVENT_MODE_CHANGE	include/linux/fb.h	/^#define FB_EVENT_MODE_CHANGE	/;"	d
FB_EVENT_MODE_CHANGE_ALL	include/linux/fb.h	/^#define FB_EVENT_MODE_CHANGE_ALL	/;"	d
FB_EVENT_MODE_DELETE	include/linux/fb.h	/^#define FB_EVENT_MODE_DELETE	/;"	d
FB_EVENT_NEW_MODELIST	include/linux/fb.h	/^#define FB_EVENT_NEW_MODELIST	/;"	d
FB_EVENT_RESUME	include/linux/fb.h	/^#define FB_EVENT_RESUME	/;"	d
FB_EVENT_SET_CONSOLE_MAP	include/linux/fb.h	/^#define FB_EVENT_SET_CONSOLE_MAP	/;"	d
FB_EVENT_SUSPEND	include/linux/fb.h	/^#define FB_EVENT_SUSPEND	/;"	d
FB_HSYNCTIMINGS	include/linux/fb.h	/^#define FB_HSYNCTIMINGS	/;"	d
FB_IF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_IF /;"	d
FB_IGNOREMON	include/linux/fb.h	/^#define FB_IGNOREMON	/;"	d
FB_LEFT_POS	include/linux/fb.h	/^#define FB_LEFT_POS(/;"	d
FB_MAX	include/linux/fb.h	/^#define FB_MAX	/;"	d
FB_MAXTIMINGS	include/linux/fb.h	/^#define FB_MAXTIMINGS	/;"	d
FB_MISC_1ST_DETAIL	include/linux/fb.h	/^#define FB_MISC_1ST_DETAIL	/;"	d
FB_MISC_PRIM_COLOR	include/linux/fb.h	/^#define FB_MISC_PRIM_COLOR	/;"	d
FB_MODE_IS_CALCULATED	include/linux/fb.h	/^#define FB_MODE_IS_CALCULATED	/;"	d
FB_MODE_IS_DETAILED	include/linux/fb.h	/^#define FB_MODE_IS_DETAILED	/;"	d
FB_MODE_IS_FIRST	include/linux/fb.h	/^#define FB_MODE_IS_FIRST	/;"	d
FB_MODE_IS_FROM_VAR	include/linux/fb.h	/^#define FB_MODE_IS_FROM_VAR	/;"	d
FB_MODE_IS_STANDARD	include/linux/fb.h	/^#define FB_MODE_IS_STANDARD	/;"	d
FB_MODE_IS_UNKNOWN	include/linux/fb.h	/^#define FB_MODE_IS_UNKNOWN	/;"	d
FB_MODE_IS_VESA	include/linux/fb.h	/^#define FB_MODE_IS_VESA	/;"	d
FB_NONSTD_HAM	include/linux/fb.h	/^#define FB_NONSTD_HAM	/;"	d
FB_NONSTD_REV_PIX_IN_B	include/linux/fb.h	/^#define FB_NONSTD_REV_PIX_IN_B	/;"	d
FB_OF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_OF /;"	d
FB_PF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_PF /;"	d
FB_PIXMAP_DEFAULT	include/linux/fb.h	/^#define FB_PIXMAP_DEFAULT /;"	d
FB_PIXMAP_IO	include/linux/fb.h	/^#define FB_PIXMAP_IO	/;"	d
FB_PIXMAP_SYNC	include/linux/fb.h	/^#define FB_PIXMAP_SYNC	/;"	d
FB_PIXMAP_SYSTEM	include/linux/fb.h	/^#define FB_PIXMAP_SYSTEM /;"	d
FB_ROTATE_CCW	include/linux/fb.h	/^#define FB_ROTATE_CCW	/;"	d
FB_ROTATE_CW	include/linux/fb.h	/^#define FB_ROTATE_CW	/;"	d
FB_ROTATE_UD	include/linux/fb.h	/^#define FB_ROTATE_UD	/;"	d
FB_ROTATE_UR	include/linux/fb.h	/^#define FB_ROTATE_UR	/;"	d
FB_SF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_SF /;"	d
FB_SHIFT_HIGH	include/linux/fb.h	/^#define FB_SHIFT_HIGH(/;"	d
FB_SHIFT_LOW	include/linux/fb.h	/^#define FB_SHIFT_LOW(/;"	d
FB_SIGNAL_BLANK_BLANK	include/linux/fb.h	/^#define FB_SIGNAL_BLANK_BLANK	/;"	d
FB_SIGNAL_COMPOSITE	include/linux/fb.h	/^#define FB_SIGNAL_COMPOSITE	/;"	d
FB_SIGNAL_NONE	include/linux/fb.h	/^#define FB_SIGNAL_NONE	/;"	d
FB_SIGNAL_SEPARATE	include/linux/fb.h	/^#define FB_SIGNAL_SEPARATE	/;"	d
FB_SIGNAL_SERRATION_ON	include/linux/fb.h	/^#define FB_SIGNAL_SERRATION_ON	/;"	d
FB_SIGNAL_SYNC_ON_GREEN	include/linux/fb.h	/^#define FB_SIGNAL_SYNC_ON_GREEN	/;"	d
FB_START_ADDRESS	board/htkw/mcx/mcx.c	/^#define FB_START_ADDRESS /;"	d	file:
FB_SYNC_BROADCAST	drivers/video/ct69000.c	/^#define FB_SYNC_BROADCAST	/;"	d	file:
FB_SYNC_BROADCAST	drivers/video/videomodes.h	/^#define FB_SYNC_BROADCAST	/;"	d
FB_SYNC_BROADCAST	include/linux/fb.h	/^#define FB_SYNC_BROADCAST	/;"	d
FB_SYNC_CLK_IDLE_EN	drivers/video/mxcfb.h	/^#define FB_SYNC_CLK_IDLE_EN	/;"	d
FB_SYNC_CLK_LAT_FALL	drivers/video/mxcfb.h	/^#define FB_SYNC_CLK_LAT_FALL	/;"	d
FB_SYNC_COMP_HIGH_ACT	drivers/video/ct69000.c	/^#define FB_SYNC_COMP_HIGH_ACT	/;"	d	file:
FB_SYNC_COMP_HIGH_ACT	drivers/video/videomodes.h	/^#define FB_SYNC_COMP_HIGH_ACT	/;"	d
FB_SYNC_COMP_HIGH_ACT	include/linux/fb.h	/^#define FB_SYNC_COMP_HIGH_ACT	/;"	d
FB_SYNC_DATA_INVERT	drivers/video/mxcfb.h	/^#define FB_SYNC_DATA_INVERT	/;"	d
FB_SYNC_EXT	drivers/video/ct69000.c	/^#define FB_SYNC_EXT	/;"	d	file:
FB_SYNC_EXT	drivers/video/videomodes.h	/^#define FB_SYNC_EXT	/;"	d
FB_SYNC_EXT	include/linux/fb.h	/^#define FB_SYNC_EXT	/;"	d
FB_SYNC_HOR_HIGH_ACT	drivers/video/ct69000.c	/^#define FB_SYNC_HOR_HIGH_ACT	/;"	d	file:
FB_SYNC_HOR_HIGH_ACT	drivers/video/videomodes.h	/^#define FB_SYNC_HOR_HIGH_ACT	/;"	d
FB_SYNC_HOR_HIGH_ACT	include/linux/fb.h	/^#define FB_SYNC_HOR_HIGH_ACT	/;"	d
FB_SYNC_OE_LOW_ACT	drivers/video/mxcfb.h	/^#define FB_SYNC_OE_LOW_ACT	/;"	d
FB_SYNC_ON_GREEN	drivers/video/ct69000.c	/^#define FB_SYNC_ON_GREEN	/;"	d	file:
FB_SYNC_ON_GREEN	drivers/video/videomodes.h	/^#define FB_SYNC_ON_GREEN	/;"	d
FB_SYNC_ON_GREEN	include/linux/fb.h	/^#define FB_SYNC_ON_GREEN	/;"	d
FB_SYNC_SHARP_MODE	drivers/video/mxcfb.h	/^#define FB_SYNC_SHARP_MODE	/;"	d
FB_SYNC_SWAP_RGB	drivers/video/mxcfb.h	/^#define FB_SYNC_SWAP_RGB	/;"	d
FB_SYNC_VERT_HIGH_ACT	drivers/video/ct69000.c	/^#define FB_SYNC_VERT_HIGH_ACT	/;"	d	file:
FB_SYNC_VERT_HIGH_ACT	drivers/video/videomodes.h	/^#define FB_SYNC_VERT_HIGH_ACT	/;"	d
FB_SYNC_VERT_HIGH_ACT	include/linux/fb.h	/^#define FB_SYNC_VERT_HIGH_ACT	/;"	d
FB_TF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_TF /;"	d
FB_TYPE_PACKED_PIXELS	include/linux/fb.h	/^#define FB_TYPE_PACKED_PIXELS	/;"	d
FB_VBLANK_HAVE_COUNT	include/linux/fb.h	/^#define FB_VBLANK_HAVE_COUNT	/;"	d
FB_VBLANK_HAVE_HBLANK	include/linux/fb.h	/^#define FB_VBLANK_HAVE_HBLANK	/;"	d
FB_VBLANK_HAVE_HCOUNT	include/linux/fb.h	/^#define FB_VBLANK_HAVE_HCOUNT	/;"	d
FB_VBLANK_HAVE_VBLANK	include/linux/fb.h	/^#define FB_VBLANK_HAVE_VBLANK	/;"	d
FB_VBLANK_HAVE_VCOUNT	include/linux/fb.h	/^#define FB_VBLANK_HAVE_VCOUNT	/;"	d
FB_VBLANK_HAVE_VSYNC	include/linux/fb.h	/^#define FB_VBLANK_HAVE_VSYNC	/;"	d
FB_VBLANK_HBLANKING	include/linux/fb.h	/^#define FB_VBLANK_HBLANKING	/;"	d
FB_VBLANK_VBLANKING	include/linux/fb.h	/^#define FB_VBLANK_VBLANKING	/;"	d
FB_VBLANK_VSYNCING	include/linux/fb.h	/^#define FB_VBLANK_VSYNCING	/;"	d
FB_VISUAL_DIRECTCOLOR	include/linux/fb.h	/^#define FB_VISUAL_DIRECTCOLOR	/;"	d
FB_VISUAL_MONO01	include/linux/fb.h	/^#define FB_VISUAL_MONO01	/;"	d
FB_VISUAL_MONO10	include/linux/fb.h	/^#define FB_VISUAL_MONO10	/;"	d
FB_VISUAL_PSEUDOCOLOR	include/linux/fb.h	/^#define FB_VISUAL_PSEUDOCOLOR	/;"	d
FB_VISUAL_STATIC_PSEUDOCOLOR	include/linux/fb.h	/^#define FB_VISUAL_STATIC_PSEUDOCOLOR	/;"	d
FB_VISUAL_TRUECOLOR	include/linux/fb.h	/^#define FB_VISUAL_TRUECOLOR	/;"	d
FB_VMODE_CONUPDATE	drivers/video/ct69000.c	/^#define FB_VMODE_CONUPDATE	/;"	d	file:
FB_VMODE_CONUPDATE	drivers/video/videomodes.h	/^#define FB_VMODE_CONUPDATE	/;"	d
FB_VMODE_CONUPDATE	include/linux/fb.h	/^#define FB_VMODE_CONUPDATE	/;"	d
FB_VMODE_DOUBLE	drivers/video/ct69000.c	/^#define FB_VMODE_DOUBLE	/;"	d	file:
FB_VMODE_DOUBLE	drivers/video/videomodes.h	/^#define FB_VMODE_DOUBLE	/;"	d
FB_VMODE_DOUBLE	include/linux/fb.h	/^#define FB_VMODE_DOUBLE	/;"	d
FB_VMODE_INTERLACED	drivers/video/ct69000.c	/^#define FB_VMODE_INTERLACED	/;"	d	file:
FB_VMODE_INTERLACED	drivers/video/videomodes.h	/^#define FB_VMODE_INTERLACED	/;"	d
FB_VMODE_INTERLACED	include/linux/fb.h	/^#define FB_VMODE_INTERLACED	/;"	d
FB_VMODE_MASK	drivers/video/ct69000.c	/^#define FB_VMODE_MASK	/;"	d	file:
FB_VMODE_MASK	drivers/video/videomodes.h	/^#define FB_VMODE_MASK	/;"	d
FB_VMODE_MASK	include/linux/fb.h	/^#define FB_VMODE_MASK	/;"	d
FB_VMODE_NONINTERLACED	drivers/video/ct69000.c	/^#define FB_VMODE_NONINTERLACED /;"	d	file:
FB_VMODE_NONINTERLACED	drivers/video/videomodes.h	/^#define FB_VMODE_NONINTERLACED	/;"	d
FB_VMODE_NONINTERLACED	include/linux/fb.h	/^#define FB_VMODE_NONINTERLACED	/;"	d
FB_VMODE_ODD_FLD_FIRST	include/linux/fb.h	/^#define FB_VMODE_ODD_FLD_FIRST	/;"	d
FB_VMODE_SMOOTH_XPAN	drivers/video/ct69000.c	/^#define FB_VMODE_SMOOTH_XPAN	/;"	d	file:
FB_VMODE_SMOOTH_XPAN	drivers/video/videomodes.h	/^#define FB_VMODE_SMOOTH_XPAN	/;"	d
FB_VMODE_SMOOTH_XPAN	include/linux/fb.h	/^#define FB_VMODE_SMOOTH_XPAN	/;"	d
FB_VMODE_YWRAP	drivers/video/ct69000.c	/^#define FB_VMODE_YWRAP	/;"	d	file:
FB_VMODE_YWRAP	drivers/video/videomodes.h	/^#define FB_VMODE_YWRAP	/;"	d
FB_VMODE_YWRAP	include/linux/fb.h	/^#define FB_VMODE_YWRAP	/;"	d
FB_VSYNCTIMINGS	include/linux/fb.h	/^#define FB_VSYNCTIMINGS	/;"	d
FB_ZF	drivers/bios_emulator/include/x86emu/regs.h	/^#define FB_ZF /;"	d
FC1_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FC1_SHIFT	/;"	d	file:
FC2_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FC2_SHIFT	/;"	d	file:
FC3_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FC3_SHIFT	/;"	d	file:
FCAP_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FCAP_MASK	/;"	d	file:
FCCU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FCCU_BASE_ADDR	/;"	d
FCC_END_LOOP	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#       define FCC_END_LOOP /;"	d	file:
FCC_ENET_BSY	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_BSY	/;"	d
FCC_ENET_BSY	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_BSY	/;"	d
FCC_ENET_GRA	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_GRA	/;"	d
FCC_ENET_GRA	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_GRA	/;"	d
FCC_ENET_RXB	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_RXB	/;"	d
FCC_ENET_RXB	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_RXB	/;"	d
FCC_ENET_RXC	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_RXC	/;"	d
FCC_ENET_RXC	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_RXC	/;"	d
FCC_ENET_RXF	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_RXF	/;"	d
FCC_ENET_RXF	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_RXF	/;"	d
FCC_ENET_TXB	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_TXB	/;"	d
FCC_ENET_TXB	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_TXB	/;"	d
FCC_ENET_TXC	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_TXC	/;"	d
FCC_ENET_TXC	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_TXC	/;"	d
FCC_ENET_TXE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_ENET_TXE	/;"	d
FCC_ENET_TXE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_ENET_TXE	/;"	d
FCC_FCRX	drivers/net/xilinx_ll_temac.h	/^#define FCC_FCRX	/;"	d
FCC_FCTX	drivers/net/xilinx_ll_temac.h	/^#define FCC_FCTX	/;"	d
FCC_GFMR_CDP	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_CDP	/;"	d
FCC_GFMR_CDP	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_CDP	/;"	d
FCC_GFMR_CDS	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_CDS	/;"	d
FCC_GFMR_CDS	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_CDS	/;"	d
FCC_GFMR_CTSP	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_CTSP	/;"	d
FCC_GFMR_CTSP	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_CTSP	/;"	d
FCC_GFMR_CTSS	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_CTSS	/;"	d
FCC_GFMR_CTSS	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_CTSS	/;"	d
FCC_GFMR_DIAG_AE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_DIAG_AE	/;"	d
FCC_GFMR_DIAG_AE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_DIAG_AE	/;"	d
FCC_GFMR_DIAG_ALE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_DIAG_ALE	/;"	d
FCC_GFMR_DIAG_ALE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_DIAG_ALE	/;"	d
FCC_GFMR_DIAG_LE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_DIAG_LE	/;"	d
FCC_GFMR_DIAG_LE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_DIAG_LE	/;"	d
FCC_GFMR_DIAG_NORM	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_DIAG_NORM	/;"	d
FCC_GFMR_DIAG_NORM	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_DIAG_NORM	/;"	d
FCC_GFMR_ENR	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_ENR	/;"	d
FCC_GFMR_ENR	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_ENR	/;"	d
FCC_GFMR_ENT	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_ENT	/;"	d
FCC_GFMR_ENT	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_ENT	/;"	d
FCC_GFMR_MODE_ATM	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_MODE_ATM	/;"	d
FCC_GFMR_MODE_ATM	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_MODE_ATM	/;"	d
FCC_GFMR_MODE_ENET	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_MODE_ENET	/;"	d
FCC_GFMR_MODE_ENET	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_MODE_ENET	/;"	d
FCC_GFMR_MODE_HDLC	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_MODE_HDLC	/;"	d
FCC_GFMR_MODE_HDLC	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_MODE_HDLC	/;"	d
FCC_GFMR_RENC_NRZ	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_RENC_NRZ	/;"	d
FCC_GFMR_RENC_NRZ	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_RENC_NRZ	/;"	d
FCC_GFMR_RENC_NRZI	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_RENC_NRZI	/;"	d
FCC_GFMR_RENC_NRZI	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_RENC_NRZI	/;"	d
FCC_GFMR_REVD	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_REVD	/;"	d
FCC_GFMR_REVD	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_REVD	/;"	d
FCC_GFMR_RTSM	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_RTSM	/;"	d
FCC_GFMR_RTSM	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_RTSM	/;"	d
FCC_GFMR_SYNL_16	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_SYNL_16	/;"	d
FCC_GFMR_SYNL_16	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_SYNL_16	/;"	d
FCC_GFMR_SYNL_8	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_SYNL_8	/;"	d
FCC_GFMR_SYNL_8	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_SYNL_8	/;"	d
FCC_GFMR_SYNL_AUTO	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_SYNL_AUTO	/;"	d
FCC_GFMR_SYNL_AUTO	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_SYNL_AUTO	/;"	d
FCC_GFMR_SYNL_NONE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_SYNL_NONE	/;"	d
FCC_GFMR_SYNL_NONE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_SYNL_NONE	/;"	d
FCC_GFMR_TCI	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TCI	/;"	d
FCC_GFMR_TCI	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TCI	/;"	d
FCC_GFMR_TCRC_16	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TCRC_16	/;"	d
FCC_GFMR_TCRC_16	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TCRC_16	/;"	d
FCC_GFMR_TCRC_32	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TCRC_32	/;"	d
FCC_GFMR_TCRC_32	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TCRC_32	/;"	d
FCC_GFMR_TENC_NRZ	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TENC_NRZ	/;"	d
FCC_GFMR_TENC_NRZ	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TENC_NRZ	/;"	d
FCC_GFMR_TENC_NRZI	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TENC_NRZI	/;"	d
FCC_GFMR_TENC_NRZI	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TENC_NRZI	/;"	d
FCC_GFMR_TRX	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TRX	/;"	d
FCC_GFMR_TRX	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TRX	/;"	d
FCC_GFMR_TTX	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_GFMR_TTX	/;"	d
FCC_GFMR_TTX	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_GFMR_TTX	/;"	d
FCC_PSMR_BRO	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_BRO	/;"	d
FCC_PSMR_BRO	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_BRO	/;"	d
FCC_PSMR_CAM	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_CAM	/;"	d
FCC_PSMR_CAM	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_CAM	/;"	d
FCC_PSMR_ENCRC	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_ENCRC	/;"	d
FCC_PSMR_ENCRC	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_ENCRC	/;"	d
FCC_PSMR_FC	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_FC	/;"	d
FCC_PSMR_FC	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_FC	/;"	d
FCC_PSMR_FCE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_FCE	/;"	d
FCC_PSMR_FCE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_FCE	/;"	d
FCC_PSMR_FDE	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_FDE	/;"	d
FCC_PSMR_FDE	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_FDE	/;"	d
FCC_PSMR_HBC	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_HBC	/;"	d
FCC_PSMR_HBC	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_HBC	/;"	d
FCC_PSMR_LCW	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_LCW	/;"	d
FCC_PSMR_LCW	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_LCW	/;"	d
FCC_PSMR_LPB	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_LPB	/;"	d
FCC_PSMR_LPB	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_LPB	/;"	d
FCC_PSMR_MON	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_MON	/;"	d
FCC_PSMR_MON	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_MON	/;"	d
FCC_PSMR_PRO	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_PRO	/;"	d
FCC_PSMR_PRO	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_PRO	/;"	d
FCC_PSMR_RMII	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_RMII	/;"	d
FCC_PSMR_RSH	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_RSH	/;"	d
FCC_PSMR_RSH	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_RSH	/;"	d
FCC_PSMR_SBT	arch/powerpc/include/asm/cpm_8260.h	/^#define FCC_PSMR_SBT	/;"	d
FCC_PSMR_SBT	arch/powerpc/include/asm/cpm_85xx.h	/^#define FCC_PSMR_SBT	/;"	d
FCC_START_LOOP	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#       define FCC_START_LOOP /;"	d	file:
FCE0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FCE0_MARK,	FCE1_MARK,	FRB_MARK, \/* FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
FCE0__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FCE0__MARK, CS6A__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FCE1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FCE0_MARK,	FCE1_MARK,	FRB_MARK, \/* FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
FCE1__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS5B__MARK, FCE1__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FCFTR	drivers/net/sh_eth.h	/^	FCFTR,$/;"	e	enum:__anon5ef54f5a0103
FCFTR_BIT	drivers/net/sh_eth.h	/^enum FCFTR_BIT {$/;"	g
FCFTR_RFD0	drivers/net/sh_eth.h	/^	FCFTR_RFD1 = 0x00000002, FCFTR_RFD0 = 0x00000001,$/;"	e	enum:FCFTR_BIT
FCFTR_RFD1	drivers/net/sh_eth.h	/^	FCFTR_RFD1 = 0x00000002, FCFTR_RFD0 = 0x00000001,$/;"	e	enum:FCFTR_BIT
FCFTR_RFD2	drivers/net/sh_eth.h	/^	FCFTR_RFF0 = 0x00010000, FCFTR_RFD2 = 0x00000004,$/;"	e	enum:FCFTR_BIT
FCFTR_RFF0	drivers/net/sh_eth.h	/^	FCFTR_RFF0 = 0x00010000, FCFTR_RFD2 = 0x00000004,$/;"	e	enum:FCFTR_BIT
FCFTR_RFF1	drivers/net/sh_eth.h	/^	FCFTR_RFF2 = 0x00040000, FCFTR_RFF1 = 0x00020000,$/;"	e	enum:FCFTR_BIT
FCFTR_RFF2	drivers/net/sh_eth.h	/^	FCFTR_RFF2 = 0x00040000, FCFTR_RFF1 = 0x00020000,$/;"	e	enum:FCFTR_BIT
FCK_CAM_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define FCK_CAM_ON	/;"	d
FCK_CORE1_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define FCK_CORE1_ON	/;"	d
FCK_DSS_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define FCK_DSS_ON	/;"	d
FCK_IVA2_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define FCK_IVA2_ON	/;"	d
FCK_WKUP_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define FCK_WKUP_ON	/;"	d
FCLK_CM0S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S	include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S	/;"	d
FCLK_CM0S_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_CM0S_SRC_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define FCLK_CM0S_SRC_PMU	/;"	d
FCLK_SPEED	board/samsung/smdk2410/smdk2410.c	/^#define FCLK_SPEED /;"	d	file:
FCLR	arch/sh/include/asm/cpu_sh7722.h	/^#define FCLR /;"	d
FCPOL	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FCPOL	/;"	d
FCPOL	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define FCPOL	/;"	d
FCPOL_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FCPOL_P	/;"	d
FCP_CNTL	include/radeon.h	/^#define FCP_CNTL	/;"	d
FCR_CMD0	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD0 /;"	d
FCR_CMD0_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD0_SHIFT /;"	d
FCR_CMD1	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD1 /;"	d
FCR_CMD1_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD1_SHIFT /;"	d
FCR_CMD2	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD2 /;"	d
FCR_CMD2_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD2_SHIFT /;"	d
FCR_CMD3	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD3 /;"	d
FCR_CMD3_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FCR_CMD3_SHIFT /;"	d
FCR_ITL1	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_ITL1	/;"	d
FCR_ITL2	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_ITL2	/;"	d
FCR_ITL_1	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_ITL_1	/;"	d
FCR_ITL_16	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_ITL_16	/;"	d
FCR_ITL_32	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_ITL_32	/;"	d
FCR_ITL_8	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_ITL_8	/;"	d
FCR_RESETRF	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_RESETRF	/;"	d
FCR_RESETTF	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_RESETTF	/;"	d
FCR_TRFIFOE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FCR_TRFIFOE	/;"	d
FCR_TXFTH0	include/ns87308.h	/^#define FCR_TXFTH0 /;"	d
FCR_TXFTH1	include/ns87308.h	/^#define FCR_TXFTH1 /;"	d
FCTL_DPC	drivers/misc/fsl_iim.c	/^#define FCTL_DPC	/;"	d	file:
FCTL_ESNS_0	drivers/misc/fsl_iim.c	/^#define FCTL_ESNS_0	/;"	d	file:
FCTL_ESNS_1	drivers/misc/fsl_iim.c	/^#define FCTL_ESNS_1	/;"	d	file:
FCTL_ESNS_N	drivers/misc/fsl_iim.c	/^#define FCTL_ESNS_N	/;"	d	file:
FCTL_PRG	drivers/misc/fsl_iim.c	/^#define FCTL_PRG	/;"	d	file:
FCTL_PRG_LENGTH_MASK	drivers/misc/fsl_iim.c	/^#define FCTL_PRG_LENGTH_MASK	/;"	d	file:
FCTR_HWOT	drivers/net/dm9000x.h	/^#define FCTR_HWOT(/;"	d
FCTR_LWOT	drivers/net/dm9000x.h	/^#define FCTR_LWOT(/;"	d
FC_DEFAULT_HI_THRESH	drivers/net/e1000.h	/^#define FC_DEFAULT_HI_THRESH	/;"	d
FC_DEFAULT_LO_THRESH	drivers/net/e1000.h	/^#define FC_DEFAULT_LO_THRESH	/;"	d
FC_DEFAULT_TX_TIMER	drivers/net/e1000.h	/^#define FC_DEFAULT_TX_TIMER	/;"	d
FC_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FC_MASK	/;"	d	file:
FD	arch/x86/include/asm/arch-broadwell/pch.h	/^#define FD	/;"	d
FD	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define FD	/;"	d
FD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define FD	/;"	d
FD2	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define FD2	/;"	d
FD2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define FD2	/;"	d
FDADR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FDADR0	/;"	d
FDADR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FDADR1	/;"	d
FDADR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FDADR2	/;"	d
FDADR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FDADR3	/;"	d
FDADR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FDADR4	/;"	d
FDADR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FDADR5	/;"	d
FDC_BASE	cmd/fdc.c	/^#define FDC_BASE	/;"	d	file:
FDC_CAL_RETRIES	cmd/fdc.c	/^#define FDC_CAL_RETRIES	/;"	d	file:
FDC_CCR	cmd/fdc.c	/^#define FDC_CCR	/;"	d	file:
FDC_CMD_CONFIGURE	cmd/fdc.c	/^#define FDC_CMD_CONFIGURE	/;"	d	file:
FDC_CMD_CONFIGURE_LEN	cmd/fdc.c	/^#define FDC_CMD_CONFIGURE_LEN	/;"	d	file:
FDC_CMD_DUMP_REG	cmd/fdc.c	/^#define FDC_CMD_DUMP_REG	/;"	d	file:
FDC_CMD_DUMP_REG_LEN	cmd/fdc.c	/^#define FDC_CMD_DUMP_REG_LEN	/;"	d	file:
FDC_CMD_READ	cmd/fdc.c	/^#define FDC_CMD_READ	/;"	d	file:
FDC_CMD_READ_ID	cmd/fdc.c	/^#define FDC_CMD_READ_ID	/;"	d	file:
FDC_CMD_READ_ID_LEN	cmd/fdc.c	/^#define FDC_CMD_READ_ID_LEN	/;"	d	file:
FDC_CMD_READ_LEN	cmd/fdc.c	/^#define FDC_CMD_READ_LEN	/;"	d	file:
FDC_CMD_READ_TRACK	cmd/fdc.c	/^#define FDC_CMD_READ_TRACK	/;"	d	file:
FDC_CMD_READ_TRACK_LEN	cmd/fdc.c	/^#define FDC_CMD_READ_TRACK_LEN	/;"	d	file:
FDC_CMD_RECALIBRATE	cmd/fdc.c	/^#define FDC_CMD_RECALIBRATE	/;"	d	file:
FDC_CMD_RECALIBRATE_LEN	cmd/fdc.c	/^#define FDC_CMD_RECALIBRATE_LEN	/;"	d	file:
FDC_CMD_SEEK	cmd/fdc.c	/^#define FDC_CMD_SEEK	/;"	d	file:
FDC_CMD_SEEK_LEN	cmd/fdc.c	/^#define FDC_CMD_SEEK_LEN	/;"	d	file:
FDC_CMD_SENSE_INT	cmd/fdc.c	/^#define FDC_CMD_SENSE_INT	/;"	d	file:
FDC_CMD_SENSE_INT_LEN	cmd/fdc.c	/^#define FDC_CMD_SENSE_INT_LEN	/;"	d	file:
FDC_CMD_SPECIFY	cmd/fdc.c	/^#define FDC_CMD_SPECIFY	/;"	d	file:
FDC_CMD_SPECIFY_LEN	cmd/fdc.c	/^#define FDC_CMD_SPECIFY_LEN	/;"	d	file:
FDC_COMMAND_STRUCT	cmd/fdc.c	/^} FDC_COMMAND_STRUCT;$/;"	t	typeref:struct:__anon1d1457860108	file:
FDC_CONFIGURE	cmd/fdc.c	/^#define FDC_CONFIGURE	/;"	d	file:
FDC_DIR	cmd/fdc.c	/^#define FDC_DIR	/;"	d	file:
FDC_DOR	cmd/fdc.c	/^#define FDC_DOR	/;"	d	file:
FDC_DSR	cmd/fdc.c	/^#define FDC_DSR	/;"	d	file:
FDC_FIFO	cmd/fdc.c	/^#define FDC_FIFO	/;"	d	file:
FDC_FIFO_DIS	cmd/fdc.c	/^#define FDC_FIFO_DIS	/;"	d	file:
FDC_FIFO_THR	cmd/fdc.c	/^#define FDC_FIFO_THR	/;"	d	file:
FDC_IMPLIED_SEEK	cmd/fdc.c	/^#define FDC_IMPLIED_SEEK	/;"	d	file:
FDC_MFM_MODE	cmd/fdc.c	/^#define FDC_MFM_MODE	/;"	d	file:
FDC_MSR	cmd/fdc.c	/^#define FDC_MSR	/;"	d	file:
FDC_POLL_DIS	cmd/fdc.c	/^#define FDC_POLL_DIS	/;"	d	file:
FDC_PRE_TRK	cmd/fdc.c	/^#define FDC_PRE_TRK	/;"	d	file:
FDC_RW_RETRIES	cmd/fdc.c	/^#define	FDC_RW_RETRIES	/;"	d	file:
FDC_SKIP_MODE	cmd/fdc.c	/^#define FDC_SKIP_MODE	/;"	d	file:
FDC_SRA	cmd/fdc.c	/^#define FDC_SRA	/;"	d	file:
FDC_SRB	cmd/fdc.c	/^#define FDC_SRB	/;"	d	file:
FDC_TDR	cmd/fdc.c	/^#define FDC_TDR	/;"	d	file:
FDC_TIME_OUT	cmd/fdc.c	/^#define FDC_TIME_OUT /;"	d	file:
FDD_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  FDD_LPC_EN	/;"	d
FDL_TP1_TIMER_MASK	drivers/video/i915_reg.h	/^#define  FDL_TP1_TIMER_MASK /;"	d
FDL_TP1_TIMER_SHIFT	drivers/video/i915_reg.h	/^#define  FDL_TP1_TIMER_SHIFT /;"	d
FDL_TP2_TIMER_MASK	drivers/video/i915_reg.h	/^#define  FDL_TP2_TIMER_MASK /;"	d
FDL_TP2_TIMER_SHIFT	drivers/video/i915_reg.h	/^#define  FDL_TP2_TIMER_SHIFT /;"	d
FDMODE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	FDMODE	/;"	d
FDR	drivers/net/sh_eth.h	/^	FDR,$/;"	e	enum:__anon5ef54f5a0103
FDR432	arch/powerpc/cpu/mpc5xxx/i2c.c	/^#define FDR432(/;"	d	file:
FDR510	arch/powerpc/cpu/mpc5xxx/i2c.c	/^#define FDR510(/;"	d	file:
FDSW	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define FDSW	/;"	d
FDTFILE	include/configs/T104xRDB.h	/^#define FDTFILE	/;"	d
FDTPROP	board/BuR/common/common.c	/^  #define FDTPROP(/;"	d	file:
FDT_ADDR_R	include/configs/sunxi-common.h	/^#define FDT_ADDR_R	/;"	d
FDT_ADDR_R	include/configs/sunxi-common.h	/^#define FDT_ADDR_R /;"	d
FDT_ADDR_T_NONE	include/fdtdec.h	/^#define FDT_ADDR_T_NONE /;"	d
FDT_ALIGN	lib/libfdt/libfdt_internal.h	/^#define FDT_ALIGN(/;"	d
FDT_ANY_GLOBAL	include/libfdt.h	/^#define FDT_ANY_GLOBAL	/;"	d
FDT_BEGIN_NODE	include/fdt.h	/^#define FDT_BEGIN_NODE	/;"	d
FDT_CHECK_HEADER	lib/libfdt/libfdt_internal.h	/^#define FDT_CHECK_HEADER(/;"	d
FDT_COPY_SIZE	test/overlay/cmd_ut_overlay.c	/^#define FDT_COPY_SIZE	/;"	d	file:
FDT_DONE_ALL	lib/libfdt/fdt_region.c	/^	FDT_DONE_ALL,$/;"	e	enum:__anonf221d6c10103	file:
FDT_DONE_END	lib/libfdt/fdt_region.c	/^	FDT_DONE_END,$/;"	e	enum:__anonf221d6c10103	file:
FDT_DONE_MEM_RSVMAP	lib/libfdt/fdt_region.c	/^	FDT_DONE_MEM_RSVMAP,$/;"	e	enum:__anonf221d6c10103	file:
FDT_DONE_NOTHING	lib/libfdt/fdt_region.c	/^	FDT_DONE_NOTHING,$/;"	e	enum:__anonf221d6c10103	file:
FDT_DONE_STRINGS	lib/libfdt/fdt_region.c	/^	FDT_DONE_STRINGS,$/;"	e	enum:__anonf221d6c10103	file:
FDT_DONE_STRUCT	lib/libfdt/fdt_region.c	/^	FDT_DONE_STRUCT,$/;"	e	enum:__anonf221d6c10103	file:
FDT_END	include/fdt.h	/^#define FDT_END	/;"	d
FDT_END_NODE	include/fdt.h	/^#define FDT_END_NODE	/;"	d
FDT_ERRTABENT	lib/libfdt/fdt_strerror.c	/^#define FDT_ERRTABENT(/;"	d	file:
FDT_ERRTABSIZE	lib/libfdt/fdt_strerror.c	/^#define FDT_ERRTABSIZE	/;"	d	file:
FDT_ERR_BADLAYOUT	include/libfdt.h	/^#define FDT_ERR_BADLAYOUT	/;"	d
FDT_ERR_BADMAGIC	include/libfdt.h	/^#define FDT_ERR_BADMAGIC	/;"	d
FDT_ERR_BADNCELLS	include/libfdt.h	/^#define FDT_ERR_BADNCELLS	/;"	d
FDT_ERR_BADOFFSET	include/libfdt.h	/^#define FDT_ERR_BADOFFSET	/;"	d
FDT_ERR_BADOVERLAY	include/libfdt.h	/^#define FDT_ERR_BADOVERLAY	/;"	d
FDT_ERR_BADPATH	include/libfdt.h	/^#define FDT_ERR_BADPATH	/;"	d
FDT_ERR_BADPHANDLE	include/libfdt.h	/^#define FDT_ERR_BADPHANDLE	/;"	d
FDT_ERR_BADSTATE	include/libfdt.h	/^#define FDT_ERR_BADSTATE	/;"	d
FDT_ERR_BADSTRUCTURE	include/libfdt.h	/^#define FDT_ERR_BADSTRUCTURE	/;"	d
FDT_ERR_BADVALUE	include/libfdt.h	/^#define FDT_ERR_BADVALUE	/;"	d
FDT_ERR_BADVERSION	include/libfdt.h	/^#define FDT_ERR_BADVERSION	/;"	d
FDT_ERR_EXISTS	include/libfdt.h	/^#define FDT_ERR_EXISTS	/;"	d
FDT_ERR_INTERNAL	include/libfdt.h	/^#define FDT_ERR_INTERNAL	/;"	d
FDT_ERR_MAX	include/libfdt.h	/^#define FDT_ERR_MAX	/;"	d
FDT_ERR_NOPHANDLES	include/libfdt.h	/^#define FDT_ERR_NOPHANDLES	/;"	d
FDT_ERR_NOSPACE	include/libfdt.h	/^#define FDT_ERR_NOSPACE	/;"	d
FDT_ERR_NOTFOUND	include/libfdt.h	/^#define FDT_ERR_NOTFOUND	/;"	d
FDT_ERR_TOODEEP	include/libfdt.h	/^#define FDT_ERR_TOODEEP	/;"	d
FDT_ERR_TRUNCATED	include/libfdt.h	/^#define FDT_ERR_TRUNCATED	/;"	d
FDT_FIRST_SUPPORTED_VERSION	include/libfdt.h	/^#define FDT_FIRST_SUPPORTED_VERSION	/;"	d
FDT_FIXUP_PARTITIONS	lib/Kconfig	/^config FDT_FIXUP_PARTITIONS$/;"	c	menu:Library routines
FDT_HIGH	include/configs/tegra-common-post.h	/^#define FDT_HIGH /;"	d
FDT_IS_ANY	include/libfdt.h	/^#define FDT_IS_ANY	/;"	d
FDT_IS_COMPAT	include/libfdt.h	/^#define FDT_IS_COMPAT	/;"	d
FDT_IS_NODE	include/libfdt.h	/^#define FDT_IS_NODE	/;"	d
FDT_IS_PROP	include/libfdt.h	/^#define FDT_IS_PROP	/;"	d
FDT_IS_VALUE	include/libfdt.h	/^#define FDT_IS_VALUE	/;"	d
FDT_LAST_SUPPORTED_VERSION	include/libfdt.h	/^#define FDT_LAST_SUPPORTED_VERSION	/;"	d
FDT_MAGIC	include/fdt.h	/^#define FDT_MAGIC	/;"	d
FDT_MAX_DEPTH	include/libfdt.h	/^#define FDT_MAX_DEPTH	/;"	d
FDT_MAX_DEPTH	lib/libfdt/fdt_wip.c	/^#define FDT_MAX_DEPTH	/;"	d	file:
FDT_MAX_NCELLS	include/libfdt.h	/^#define FDT_MAX_NCELLS	/;"	d
FDT_NAND_MAX_TCR_TAR_TRR	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_MAX_TCR_TAR_TRR,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_MAX_TCS_TCH_TALS_TALH	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_MAX_TCS_TCH_TALS_TALH,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_MAX_TRP_TREA	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_MAX_TRP_TREA,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TADL	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TADL,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TIMING_COUNT	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TIMING_COUNT$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TRH	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TRH,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TWB	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TWB,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TWH	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TWH,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TWHR	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TWHR,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NAND_TWP	drivers/mtd/nand/tegra_nand.c	/^	FDT_NAND_TWP,$/;"	e	enum:__anonf17bc69b0203	file:
FDT_NODE_HAS_PROP	include/libfdt.h	/^#define FDT_NODE_HAS_PROP	/;"	d
FDT_NOP	include/fdt.h	/^#define FDT_NOP	/;"	d
FDT_PCI_ADDR_CELLS	include/fdtdec.h	/^#define FDT_PCI_ADDR_CELLS	/;"	d
FDT_PCI_IO	common/fdt_support.c	/^#define FDT_PCI_IO	/;"	d	file:
FDT_PCI_MEM32	common/fdt_support.c	/^#define FDT_PCI_MEM32	/;"	d	file:
FDT_PCI_MEM64	common/fdt_support.c	/^#define FDT_PCI_MEM64	/;"	d	file:
FDT_PCI_PREFETCH	common/fdt_support.c	/^#define FDT_PCI_PREFETCH	/;"	d	file:
FDT_PCI_REG_SIZE	include/fdtdec.h	/^#define FDT_PCI_REG_SIZE	/;"	d
FDT_PCI_SIZE_CELLS	include/fdtdec.h	/^#define FDT_PCI_SIZE_CELLS	/;"	d
FDT_PCI_SPACE_CONFIG	include/fdtdec.h	/^	FDT_PCI_SPACE_CONFIG = 0,$/;"	e	enum:fdt_pci_space
FDT_PCI_SPACE_IO	include/fdtdec.h	/^	FDT_PCI_SPACE_IO = 0x01000000,$/;"	e	enum:fdt_pci_space
FDT_PCI_SPACE_MEM32	include/fdtdec.h	/^	FDT_PCI_SPACE_MEM32 = 0x02000000,$/;"	e	enum:fdt_pci_space
FDT_PCI_SPACE_MEM32_PREF	include/fdtdec.h	/^	FDT_PCI_SPACE_MEM32_PREF = 0x42000000,$/;"	e	enum:fdt_pci_space
FDT_PCI_SPACE_MEM64	include/fdtdec.h	/^	FDT_PCI_SPACE_MEM64 = 0x03000000,$/;"	e	enum:fdt_pci_space
FDT_PCI_SPACE_MEM64_PREF	include/fdtdec.h	/^	FDT_PCI_SPACE_MEM64_PREF = 0x43000000,$/;"	e	enum:fdt_pci_space
FDT_PROP	include/fdt.h	/^#define FDT_PROP	/;"	d
FDT_RAMDISK_OVERHEAD	include/libfdt_env.h	/^#define FDT_RAMDISK_OVERHEAD	/;"	d
FDT_REG_ADD_MEM_RSVMAP	include/libfdt.h	/^#define FDT_REG_ADD_MEM_RSVMAP	/;"	d
FDT_REG_ADD_STRING_TAB	include/libfdt.h	/^#define FDT_REG_ADD_STRING_TAB	/;"	d
FDT_REG_ALL_SUBNODES	include/libfdt.h	/^#define FDT_REG_ALL_SUBNODES	/;"	d
FDT_REG_DIRECT_SUBNODES	include/libfdt.h	/^#define FDT_REG_DIRECT_SUBNODES	/;"	d
FDT_REG_SIZE	board/xilinx/zynq/board.c	/^#define FDT_REG_SIZE /;"	d	file:
FDT_REG_SIZE	board/xilinx/zynqmp/zynqmp.c	/^#define FDT_REG_SIZE /;"	d	file:
FDT_REG_SUPERNODES	include/libfdt.h	/^#define FDT_REG_SUPERNODES	/;"	d
FDT_RW_CHECK_HEADER	lib/libfdt/fdt_rw.c	/^#define FDT_RW_CHECK_HEADER(/;"	d	file:
FDT_SIZE	lib/fdtdec_test.c	/^#define FDT_SIZE	/;"	d	file:
FDT_SROM_PMC	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_PMC,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TACC	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TACC,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TACP	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TACP,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TACS	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TACS,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TAH	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TAH,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TCOH	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TCOH,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TCOS	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TCOS,$/;"	e	enum:__anon3610dc510103
FDT_SROM_TIMING_COUNT	arch/arm/mach-exynos/include/mach/sromc.h	/^	FDT_SROM_TIMING_COUNT,$/;"	e	enum:__anon3610dc510103
FDT_STATUS_DISABLED	include/fdt_support.h	/^	FDT_STATUS_DISABLED,$/;"	e	enum:fdt_status
FDT_STATUS_FAIL	include/fdt_support.h	/^	FDT_STATUS_FAIL,$/;"	e	enum:fdt_status
FDT_STATUS_FAIL_ERROR_CODE	include/fdt_support.h	/^	FDT_STATUS_FAIL_ERROR_CODE,$/;"	e	enum:fdt_status
FDT_STATUS_OKAY	include/fdt_support.h	/^	FDT_STATUS_OKAY,$/;"	e	enum:fdt_status
FDT_SW_CHECK_HEADER	lib/libfdt/fdt_sw.c	/^#define FDT_SW_CHECK_HEADER(/;"	d	file:
FDT_SW_MAGIC	lib/libfdt/libfdt_internal.h	/^#define FDT_SW_MAGIC	/;"	d
FDT_TAGALIGN	lib/libfdt/libfdt_internal.h	/^#define FDT_TAGALIGN(/;"	d
FDT_TAGSIZE	include/fdt.h	/^#define FDT_TAGSIZE	/;"	d
FDT_V16_SIZE	include/fdt.h	/^#define FDT_V16_SIZE	/;"	d
FDT_V17_SIZE	include/fdt.h	/^#define FDT_V17_SIZE	/;"	d
FDT_V1_SIZE	include/fdt.h	/^#define FDT_V1_SIZE	/;"	d
FDT_V2_SIZE	include/fdt.h	/^#define FDT_V2_SIZE	/;"	d
FDT_V3_SIZE	include/fdt.h	/^#define FDT_V3_SIZE	/;"	d
FDTandFlags	include/MCD_dma.h	/^	u32 FDTandFlags;	\/* function descriptor table start & flags *\/$/;"	m	struct:__anon0c34f9b30108	typeref:typename:u32
FD_GEO_STRUCT	cmd/fdc.c	/^} FD_GEO_STRUCT;$/;"	t	typeref:struct:__anon1d1457860208	file:
FD_SIGNATURE	tools/ifdtool.c	/^#define FD_SIGNATURE	/;"	d	file:
FE	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FE	/;"	d
FE	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define FE	/;"	d
FEATURES	drivers/mtd/nand/denali.h	/^#define FEATURES	/;"	d
FEATURES__CMD_DMA	drivers/mtd/nand/denali.h	/^#define     FEATURES__CMD_DMA	/;"	d
FEATURES__DMA	drivers/mtd/nand/denali.h	/^#define     FEATURES__DMA	/;"	d
FEATURES__ECC_MAX_ERR	drivers/mtd/nand/denali.h	/^#define     FEATURES__ECC_MAX_ERR	/;"	d
FEATURES__GPREG	drivers/mtd/nand/denali.h	/^#define     FEATURES__GPREG	/;"	d
FEATURES__INDEX_ADDR	drivers/mtd/nand/denali.h	/^#define     FEATURES__INDEX_ADDR	/;"	d
FEATURES__N_BANKS	drivers/mtd/nand/denali.h	/^#define     FEATURES__N_BANKS	/;"	d
FEATURES__PARTITION	drivers/mtd/nand/denali.h	/^#define     FEATURES__PARTITION	/;"	d
FEATURES__XDMA_SIDEBAND	drivers/mtd/nand/denali.h	/^#define     FEATURES__XDMA_SIDEBAND	/;"	d
FEATURE_CONTROL_LOCKED	arch/x86/include/asm/msr-index.h	/^#define FEATURE_CONTROL_LOCKED	/;"	d
FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX	arch/x86/include/asm/msr-index.h	/^#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX	/;"	d
FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX	arch/x86/include/asm/msr-index.h	/^#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX	/;"	d
FEBRUARY	drivers/rtc/date.c	/^#define FEBRUARY	/;"	d	file:
FEC0_RX_INIT	arch/m68k/include/asm/immap.h	/^#define FEC0_RX_INIT	/;"	d
FEC0_RX_PRIORITY	arch/m68k/include/asm/immap.h	/^#define FEC0_RX_PRIORITY	/;"	d
FEC0_RX_TASK	arch/m68k/include/asm/immap.h	/^#define FEC0_RX_TASK	/;"	d
FEC0_TX_INIT	arch/m68k/include/asm/immap.h	/^#define FEC0_TX_INIT	/;"	d
FEC0_TX_PRIORITY	arch/m68k/include/asm/immap.h	/^#define FEC0_TX_PRIORITY	/;"	d
FEC0_TX_TASK	arch/m68k/include/asm/immap.h	/^#define FEC0_TX_TASK	/;"	d
FEC1_RX_INIT	arch/m68k/include/asm/immap.h	/^#define FEC1_RX_INIT	/;"	d
FEC1_RX_PRIORITY	arch/m68k/include/asm/immap.h	/^#define FEC1_RX_PRIORITY	/;"	d
FEC1_RX_TASK	arch/m68k/include/asm/immap.h	/^#define FEC1_RX_TASK	/;"	d
FEC1_TX_INIT	arch/m68k/include/asm/immap.h	/^#define FEC1_TX_INIT	/;"	d
FEC1_TX_PRIORITY	arch/m68k/include/asm/immap.h	/^#define FEC1_TX_PRIORITY	/;"	d
FEC1_TX_TASK	arch/m68k/include/asm/immap.h	/^#define FEC1_TX_TASK	/;"	d
FECDUPLEX	include/configs/M5208EVBE.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5235EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5272C3.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5275EVB.h	/^#define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5282EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M53017EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5329EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5373EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M54418TWR.h	/^#define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M54451EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M54455EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5475EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/M5485EVB.h	/^#		define FECDUPLEX	/;"	d
FECDUPLEX	include/configs/cobra5272.h	/^#		define FECDUPLEX	/;"	d
FECSPEED	include/configs/M5208EVBE.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5235EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5272C3.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5275EVB.h	/^#define FECSPEED	/;"	d
FECSPEED	include/configs/M5282EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M53017EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5329EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5373EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M54418TWR.h	/^#define FECSPEED	/;"	d
FECSPEED	include/configs/M54451EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M54455EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5475EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/M5485EVB.h	/^#		define FECSPEED	/;"	d
FECSPEED	include/configs/cobra5272.h	/^#		define FECSPEED	/;"	d
FEC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define FEC_BASE_ADDR /;"	d
FEC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define FEC_BASE_ADDR	/;"	d
FEC_BD_BASE	include/mpc5xxx_sdma.h	/^#define FEC_BD_BASE	/;"	d
FEC_BUFFER_SIZE	drivers/net/mpc512x_fec.h	/^#define FEC_BUFFER_SIZE	/;"	d
FEC_DMA_RX_MINALIGN	drivers/net/fec_mxc.c	/^#define FEC_DMA_RX_MINALIGN	/;"	d	file:
FEC_ECNTRL_DBSWAP	drivers/net/fec_mxc.h	/^#define FEC_ECNTRL_DBSWAP	/;"	d
FEC_ECNTRL_ETHER_EN	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ECNTRL_ETHER_EN	/;"	d	file:
FEC_ECNTRL_ETHER_EN	drivers/net/fec_mxc.h	/^#define FEC_ECNTRL_ETHER_EN	/;"	d
FEC_ECNTRL_PINMUX	arch/powerpc/cpu/mpc8xx/fec.c	/^#define	FEC_ECNTRL_PINMUX	/;"	d	file:
FEC_ECNTRL_RESET	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ECNTRL_RESET	/;"	d	file:
FEC_ECNTRL_RESET	drivers/net/fec_mxc.h	/^#define FEC_ECNTRL_RESET	/;"	d
FEC_ECNTRL_SPEED	drivers/net/fec_mxc.h	/^#define FEC_ECNTRL_SPEED	/;"	d
FEC_ECR_ETHER_EN	arch/m68k/include/asm/fec.h	/^#define FEC_ECR_ETHER_EN	/;"	d
FEC_ECR_RESET	arch/m68k/include/asm/fec.h	/^#define FEC_ECR_RESET	/;"	d
FEC_EIR_BABR	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_BABR	/;"	d
FEC_EIR_BABT	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_BABT	/;"	d
FEC_EIR_CLEAR_ALL	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_CLEAR_ALL	/;"	d
FEC_EIR_CLEAR_ALL	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_EIR_CLEAR_ALL	/;"	d
FEC_EIR_EBERR	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_EBERR	/;"	d
FEC_EIR_GRA	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_GRA	/;"	d
FEC_EIR_HBERR	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_HBERR	/;"	d
FEC_EIR_LC	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_LC	/;"	d
FEC_EIR_MII	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_MII	/;"	d
FEC_EIR_RL	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_RL	/;"	d
FEC_EIR_RXB	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_RXB	/;"	d
FEC_EIR_RXERR	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_EIR_RXERR	/;"	d
FEC_EIR_RXF	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_RXF	/;"	d
FEC_EIR_TXB	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_TXB	/;"	d
FEC_EIR_TXERR	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_EIR_TXERR	/;"	d
FEC_EIR_TXF	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_TXF	/;"	d
FEC_EIR_UN	arch/m68k/include/asm/fec.h	/^#define FEC_EIR_UN	/;"	d
FEC_EMRBR_R_BUF_SIZE	arch/m68k/include/asm/fec.h	/^#define FEC_EMRBR_R_BUF_SIZE(/;"	d
FEC_ENABLE_B	board/freescale/mx25pdk/mx25pdk.c	/^#define FEC_ENABLE_B	/;"	d	file:
FEC_ENET	include/commproc.h	/^#define FEC_ENET$/;"	d
FEC_ENET_BABR	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_BABR	/;"	d	file:
FEC_ENET_BABT	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_BABT	/;"	d	file:
FEC_ENET_EBERR	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_EBERR	/;"	d	file:
FEC_ENET_GRA	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_GRA	/;"	d	file:
FEC_ENET_HBERR	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_HBERR	/;"	d	file:
FEC_ENET_MII	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_MII	/;"	d	file:
FEC_ENET_RXB	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_RXB	/;"	d	file:
FEC_ENET_RXF	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_RXF	/;"	d	file:
FEC_ENET_TXB	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_TXB	/;"	d	file:
FEC_ENET_TXF	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_ENET_TXF	/;"	d	file:
FEC_ERDSR_R_DES_START	arch/m68k/include/asm/fec.h	/^#define FEC_ERDSR_R_DES_START(/;"	d
FEC_ETDSR_X_DES_START	arch/m68k/include/asm/fec.h	/^#define FEC_ETDSR_X_DES_START(/;"	d
FEC_FLAGS	include/configs/MPC8540ADS.h	/^#define FEC_FLAGS	/;"	d
FEC_FRBR_R_BOUND	arch/m68k/include/asm/fec.h	/^#define FEC_FRBR_R_BOUND(/;"	d
FEC_FRSR_R_FSTART	arch/m68k/include/asm/fec.h	/^#define FEC_FRSR_R_FSTART(/;"	d
FEC_IEVENT_BABR	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_BABR	/;"	d
FEC_IEVENT_BABT	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_BABT	/;"	d
FEC_IEVENT_EBERR	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_EBERR	/;"	d
FEC_IEVENT_GRA	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_GRA	/;"	d
FEC_IEVENT_HBERR	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_HBERR	/;"	d
FEC_IEVENT_LC	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_LC	/;"	d
FEC_IEVENT_MII	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_MII	/;"	d
FEC_IEVENT_RL	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_RL	/;"	d
FEC_IEVENT_RXB	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_RXB	/;"	d
FEC_IEVENT_RXF	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_RXF	/;"	d
FEC_IEVENT_TXB	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_TXB	/;"	d
FEC_IEVENT_TXF	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_TXF	/;"	d
FEC_IEVENT_UN	drivers/net/fec_mxc.h	/^#define FEC_IEVENT_UN	/;"	d
FEC_IMASKT_BABT	drivers/net/fec_mxc.h	/^#define FEC_IMASKT_BABT	/;"	d
FEC_IMASKT_RL	drivers/net/fec_mxc.h	/^#define FEC_IMASKT_RL	/;"	d
FEC_IMASKT_RXF	drivers/net/fec_mxc.h	/^#define FEC_IMASKT_RXF	/;"	d
FEC_IMASKT_TXF	drivers/net/fec_mxc.h	/^#define FEC_IMASKT_TXF	/;"	d
FEC_IMASK_BABR	drivers/net/fec_mxc.h	/^#define FEC_IMASK_BABR	/;"	d
FEC_IMASK_EBERR	drivers/net/fec_mxc.h	/^#define FEC_IMASK_EBERR	/;"	d
FEC_IMASK_GRA	drivers/net/fec_mxc.h	/^#define FEC_IMASK_GRA	/;"	d
FEC_IMASK_HBERR	drivers/net/fec_mxc.h	/^#define FEC_IMASK_HBERR	/;"	d
FEC_IMASK_LC	drivers/net/fec_mxc.h	/^#define FEC_IMASK_LC	/;"	d
FEC_IMASK_MII	drivers/net/fec_mxc.h	/^#define FEC_IMASK_MII	/;"	d
FEC_IMASK_RXB	drivers/net/fec_mxc.h	/^#define FEC_IMASK_RXB	/;"	d
FEC_IMASK_TXB	drivers/net/fec_mxc.h	/^#define FEC_IMASK_TXB	/;"	d
FEC_IMASK_UN	drivers/net/fec_mxc.h	/^#define FEC_IMASK_UN	/;"	d
FEC_INFO_T	drivers/net/mcfmii.c	/^typedef struct fec_info_dma FEC_INFO_T;$/;"	t	typeref:struct:fec_info_dma	file:
FEC_INFO_T	drivers/net/mcfmii.c	/^typedef struct fec_info_s FEC_INFO_T;$/;"	t	typeref:struct:fec_info_s	file:
FEC_MAX_FRAME_LEN	drivers/net/mpc512x_fec.h	/^#define FEC_MAX_FRAME_LEN	/;"	d
FEC_MAX_PKT_SIZE	drivers/net/fec_mxc.h	/^#define FEC_MAX_PKT_SIZE	/;"	d
FEC_MAX_PKT_SIZE	drivers/net/mpc5xxx_fec.h	/^#define FEC_MAX_PKT_SIZE	/;"	d
FEC_MIBC_MIB_DISABLE	arch/m68k/include/asm/fec.h	/^#define FEC_MIBC_MIB_DISABLE	/;"	d
FEC_MIBC_MIB_IDLE	arch/m68k/include/asm/fec.h	/^#define FEC_MIBC_MIB_IDLE	/;"	d
FEC_MII_DATA_DATAMSK	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_DATAMSK	/;"	d
FEC_MII_DATA_DATAMSK	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_DATAMSK	/;"	d
FEC_MII_DATA_DATAMSK	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_DATAMSK	/;"	d
FEC_MII_DATA_OP_RD	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_OP_RD	/;"	d
FEC_MII_DATA_OP_RD	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_OP_RD	/;"	d
FEC_MII_DATA_OP_RD	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_OP_RD	/;"	d
FEC_MII_DATA_OP_WR	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_OP_WR	/;"	d
FEC_MII_DATA_OP_WR	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_OP_WR	/;"	d
FEC_MII_DATA_OP_WR	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_OP_WR	/;"	d
FEC_MII_DATA_PA_MSK	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_PA_MSK	/;"	d
FEC_MII_DATA_PA_MSK	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_PA_MSK	/;"	d
FEC_MII_DATA_PA_MSK	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_PA_MSK	/;"	d
FEC_MII_DATA_PA_SHIFT	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_PA_SHIFT	/;"	d
FEC_MII_DATA_PA_SHIFT	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_PA_SHIFT	/;"	d
FEC_MII_DATA_PA_SHIFT	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_PA_SHIFT	/;"	d
FEC_MII_DATA_RA_MSK	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_RA_MSK	/;"	d
FEC_MII_DATA_RA_MSK	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_RA_MSK	/;"	d
FEC_MII_DATA_RA_MSK	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_RA_MSK	/;"	d
FEC_MII_DATA_RA_SHIFT	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_RA_SHIFT	/;"	d
FEC_MII_DATA_RA_SHIFT	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_RA_SHIFT	/;"	d
FEC_MII_DATA_RA_SHIFT	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_RA_SHIFT	/;"	d
FEC_MII_DATA_ST	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_ST	/;"	d
FEC_MII_DATA_ST	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_ST	/;"	d
FEC_MII_DATA_ST	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_ST	/;"	d
FEC_MII_DATA_TA	drivers/net/fec_mxc.h	/^#define FEC_MII_DATA_TA	/;"	d
FEC_MII_DATA_TA	drivers/net/mpc512x_fec.h	/^#define FEC_MII_DATA_TA	/;"	d
FEC_MII_DATA_TA	drivers/net/mpc5xxx_fec.h	/^#define FEC_MII_DATA_TA	/;"	d
FEC_MMFR_DATA	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_DATA(/;"	d
FEC_MMFR_OP_RD	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_OP_RD	/;"	d
FEC_MMFR_OP_WR	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_OP_WR	/;"	d
FEC_MMFR_PA	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_PA(/;"	d
FEC_MMFR_RA	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_RA(/;"	d
FEC_MMFR_ST	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_ST(/;"	d
FEC_MMFR_ST_01	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_ST_01	/;"	d
FEC_MMFR_TA	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_TA(/;"	d
FEC_MMFR_TA_10	arch/m68k/include/asm/fec.h	/^#define FEC_MMFR_TA_10	/;"	d
FEC_MSCR_DIS_PREAMBLE	arch/m68k/include/asm/fec.h	/^#define FEC_MSCR_DIS_PREAMBLE	/;"	d
FEC_MSCR_MII_SPEED	arch/m68k/include/asm/fec.h	/^#define FEC_MSCR_MII_SPEED(/;"	d
FEC_MXC	drivers/net/Kconfig	/^config FEC_MXC$/;"	c
FEC_OPD_OPCODE	arch/m68k/include/asm/fec.h	/^#define FEC_OPD_OPCODE(/;"	d
FEC_OPD_PAUSE_DUR	arch/m68k/include/asm/fec.h	/^#define FEC_OPD_PAUSE_DUR(/;"	d
FEC_OUT_PAD_CTRL	board/freescale/mx25pdk/mx25pdk.c	/^#define FEC_OUT_PAD_CTRL	/;"	d	file:
FEC_OUT_PAD_CTRL	board/syteco/zmx25/zmx25.c	/^#define FEC_OUT_PAD_CTRL	/;"	d	file:
FEC_PAD_CTRL	board/freescale/mx35pdk/mx35pdk.c	/^#define FEC_PAD_CTRL	/;"	d	file:
FEC_PARAM_BASE	include/mpc5xxx_sdma.h	/^#define FEC_PARAM_BASE	/;"	d
FEC_PAUR_PADDR2	arch/m68k/include/asm/fec.h	/^#define FEC_PAUR_PADDR2(/;"	d
FEC_PAUR_TYPE	arch/m68k/include/asm/fec.h	/^#define FEC_PAUR_TYPE(/;"	d
FEC_PHYIDX	include/configs/MPC8540ADS.h	/^#define FEC_PHYIDX	/;"	d
FEC_PHY_ADDR	include/configs/MPC8540ADS.h	/^#define FEC_PHY_ADDR	/;"	d
FEC_QUIRK_ENET_MAC	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define FEC_QUIRK_ENET_MAC$/;"	d
FEC_QUIRK_ENET_MAC	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define FEC_QUIRK_ENET_MAC$/;"	d
FEC_QUIRK_ENET_MAC	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FEC_QUIRK_ENET_MAC$/;"	d
FEC_QUIRK_ENET_MAC	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define FEC_QUIRK_ENET_MAC$/;"	d
FEC_RBD	drivers/net/mpc512x_fec.h	/^} FEC_RBD;$/;"	t	typeref:struct:BufferDescriptor
FEC_RBD	drivers/net/mpc5xxx_fec.h	/^} FEC_RBD;$/;"	t	typeref:struct:BufferDescriptor
FEC_RBD_BASE	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_BASE	/;"	d
FEC_RBD_BC	drivers/net/fec_mxc.h	/^#define FEC_RBD_BC	/;"	d
FEC_RBD_BC	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_BC	/;"	d
FEC_RBD_BC	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_BC	/;"	d
FEC_RBD_CR	drivers/net/fec_mxc.h	/^#define FEC_RBD_CR	/;"	d
FEC_RBD_CR	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_CR	/;"	d
FEC_RBD_CR	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_CR	/;"	d
FEC_RBD_EMPTY	drivers/net/fec_mxc.h	/^#define FEC_RBD_EMPTY	/;"	d
FEC_RBD_EMPTY	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_EMPTY	/;"	d
FEC_RBD_EMPTY	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_EMPTY	/;"	d
FEC_RBD_ERR	drivers/net/fec_mxc.h	/^#define FEC_RBD_ERR	/;"	d
FEC_RBD_ERR	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_ERR	/;"	d
FEC_RBD_ERR	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_ERR	/;"	d
FEC_RBD_INT	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_INT	/;"	d
FEC_RBD_LAST	drivers/net/fec_mxc.h	/^#define FEC_RBD_LAST	/;"	d
FEC_RBD_LAST	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_LAST	/;"	d
FEC_RBD_LAST	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_LAST	/;"	d
FEC_RBD_LG	drivers/net/fec_mxc.h	/^#define FEC_RBD_LG	/;"	d
FEC_RBD_LG	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_LG	/;"	d
FEC_RBD_LG	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_LG	/;"	d
FEC_RBD_MC	drivers/net/fec_mxc.h	/^#define FEC_RBD_MC	/;"	d
FEC_RBD_MC	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_MC	/;"	d
FEC_RBD_MC	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_MC	/;"	d
FEC_RBD_MISS	drivers/net/fec_mxc.h	/^#define FEC_RBD_MISS	/;"	d
FEC_RBD_MISS	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_MISS	/;"	d
FEC_RBD_MISS	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_MISS	/;"	d
FEC_RBD_NEXT	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_NEXT	/;"	d
FEC_RBD_NO	drivers/net/fec_mxc.h	/^#define FEC_RBD_NO	/;"	d
FEC_RBD_NO	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_NO	/;"	d
FEC_RBD_NO	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_NO	/;"	d
FEC_RBD_NUM	drivers/net/fec_mxc.h	/^#define FEC_RBD_NUM	/;"	d
FEC_RBD_NUM	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_NUM	/;"	d
FEC_RBD_NUM	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_NUM	/;"	d
FEC_RBD_OV	drivers/net/fec_mxc.h	/^#define FEC_RBD_OV	/;"	d
FEC_RBD_OV	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_OV	/;"	d
FEC_RBD_OV	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_OV	/;"	d
FEC_RBD_SH	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_SH	/;"	d
FEC_RBD_SH	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_SH	/;"	d
FEC_RBD_TR	drivers/net/fec_mxc.h	/^#define FEC_RBD_TR	/;"	d
FEC_RBD_TR	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_TR	/;"	d
FEC_RBD_TR	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_TR	/;"	d
FEC_RBD_WRAP	drivers/net/fec_mxc.h	/^#define FEC_RBD_WRAP	/;"	d
FEC_RBD_WRAP	drivers/net/mpc512x_fec.h	/^#define FEC_RBD_WRAP	/;"	d
FEC_RBD_WRAP	drivers/net/mpc5xxx_fec.h	/^#define FEC_RBD_WRAP	/;"	d
FEC_RCNTRL_BC_REJ	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_RCNTRL_BC_REJ	/;"	d	file:
FEC_RCNTRL_BC_REJ	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_BC_REJ	/;"	d
FEC_RCNTRL_DRT	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_RCNTRL_DRT	/;"	d	file:
FEC_RCNTRL_DRT	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_DRT	/;"	d
FEC_RCNTRL_FCE	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_FCE	/;"	d
FEC_RCNTRL_LOOP	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_RCNTRL_LOOP	/;"	d	file:
FEC_RCNTRL_LOOP	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_LOOP	/;"	d
FEC_RCNTRL_MAX_FL_SHIFT	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_MAX_FL_SHIFT	/;"	d
FEC_RCNTRL_MII_MODE	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_RCNTRL_MII_MODE	/;"	d	file:
FEC_RCNTRL_MII_MODE	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_MII_MODE	/;"	d
FEC_RCNTRL_PROM	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_RCNTRL_PROM	/;"	d	file:
FEC_RCNTRL_PROM	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_PROM	/;"	d
FEC_RCNTRL_RGMII	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_RGMII	/;"	d
FEC_RCNTRL_RMII	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_RMII	/;"	d
FEC_RCNTRL_RMII_10T	drivers/net/fec_mxc.h	/^#define FEC_RCNTRL_RMII_10T	/;"	d
FEC_RCR_BC_REJ	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_BC_REJ	/;"	d
FEC_RCR_DRT	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_DRT	/;"	d
FEC_RCR_FCE	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_FCE	/;"	d
FEC_RCR_LOOP	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_LOOP	/;"	d
FEC_RCR_MAX_FL	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_MAX_FL(/;"	d
FEC_RCR_MII_MODE	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_MII_MODE	/;"	d
FEC_RCR_PROM	arch/m68k/include/asm/fec.h	/^#define FEC_RCR_PROM	/;"	d
FEC_RDAR_R_DES_ACTIVE	arch/m68k/include/asm/fec.h	/^#define FEC_RDAR_R_DES_ACTIVE	/;"	d
FEC_RECV_TASK_NO	include/mpc5xxx_sdma.h	/^#define FEC_RECV_TASK_NO /;"	d
FEC_RESET_B	board/freescale/mx25pdk/mx25pdk.c	/^#define FEC_RESET_B	/;"	d	file:
FEC_RESET_DELAY	arch/m68k/include/asm/fec.h	/^#define	FEC_RESET_DELAY	/;"	d
FEC_RESET_DELAY	arch/powerpc/cpu/mpc8xx/fec.c	/^#define	FEC_RESET_DELAY	/;"	d	file:
FEC_RHASH_FCE_DC	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_RHASH_FCE_DC	/;"	d
FEC_RHASH_HASH	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_RHASH_HASH(/;"	d
FEC_RHASH_MULTCAST	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_RHASH_MULTCAST	/;"	d
FEC_RX_TOUT	arch/m68k/include/asm/fec.h	/^#define FEC_RX_TOUT	/;"	d
FEC_R_DES_ACTIVE_RDAR	drivers/net/fec_mxc.h	/^#define FEC_R_DES_ACTIVE_RDAR	/;"	d
FEC_T	drivers/net/mcfmii.c	/^#define FEC_T /;"	d	file:
FEC_TBD	drivers/net/mpc512x_fec.h	/^} FEC_TBD;$/;"	t	typeref:struct:__anonf8b8c0fc0108
FEC_TBD	drivers/net/mpc5xxx_fec.h	/^} FEC_TBD;$/;"	t	typeref:struct:__anone13c4dc90108
FEC_TBD_ABC	drivers/net/fec_mxc.h	/^#define FEC_TBD_ABC	/;"	d
FEC_TBD_ABC	drivers/net/mpc512x_fec.h	/^#define FEC_TBD_ABC	/;"	d
FEC_TBD_ABC	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_ABC	/;"	d
FEC_TBD_BASE	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_BASE	/;"	d
FEC_TBD_INT	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_INT	/;"	d
FEC_TBD_LAST	drivers/net/fec_mxc.h	/^#define FEC_TBD_LAST	/;"	d
FEC_TBD_LAST	drivers/net/mpc512x_fec.h	/^#define FEC_TBD_LAST	/;"	d
FEC_TBD_LAST	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_LAST	/;"	d
FEC_TBD_NEXT	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_NEXT	/;"	d
FEC_TBD_NUM	drivers/net/mpc512x_fec.h	/^#define FEC_TBD_NUM	/;"	d
FEC_TBD_NUM	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_NUM	/;"	d
FEC_TBD_READY	drivers/net/fec_mxc.h	/^#define FEC_TBD_READY	/;"	d
FEC_TBD_READY	drivers/net/mpc512x_fec.h	/^#define FEC_TBD_READY	/;"	d
FEC_TBD_READY	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_READY	/;"	d
FEC_TBD_TC	drivers/net/fec_mxc.h	/^#define FEC_TBD_TC	/;"	d
FEC_TBD_TC	drivers/net/mpc512x_fec.h	/^#define FEC_TBD_TC	/;"	d
FEC_TBD_TC	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_TC	/;"	d
FEC_TBD_WRAP	drivers/net/fec_mxc.h	/^#define FEC_TBD_WRAP	/;"	d
FEC_TBD_WRAP	drivers/net/mpc512x_fec.h	/^#define FEC_TBD_WRAP	/;"	d
FEC_TBD_WRAP	drivers/net/mpc5xxx_fec.h	/^#define FEC_TBD_WRAP	/;"	d
FEC_TCNTRL_FDEN	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_TCNTRL_FDEN	/;"	d	file:
FEC_TCNTRL_FDEN	drivers/net/fec_mxc.h	/^#define FEC_TCNTRL_FDEN	/;"	d
FEC_TCNTRL_GTS	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_TCNTRL_GTS	/;"	d	file:
FEC_TCNTRL_GTS	drivers/net/fec_mxc.h	/^#define FEC_TCNTRL_GTS	/;"	d
FEC_TCNTRL_HBC	arch/powerpc/cpu/mpc8xx/fec.c	/^#define FEC_TCNTRL_HBC	/;"	d	file:
FEC_TCNTRL_HBC	drivers/net/fec_mxc.h	/^#define FEC_TCNTRL_HBC	/;"	d
FEC_TCNTRL_RFC_PAUSE	drivers/net/fec_mxc.h	/^#define FEC_TCNTRL_RFC_PAUSE	/;"	d
FEC_TCNTRL_TFC_PAUSE	drivers/net/fec_mxc.h	/^#define FEC_TCNTRL_TFC_PAUSE	/;"	d
FEC_TCR_FDEN	arch/m68k/include/asm/fec.h	/^#define FEC_TCR_FDEN	/;"	d
FEC_TCR_GTS	arch/m68k/include/asm/fec.h	/^#define FEC_TCR_GTS	/;"	d
FEC_TCR_HBC	arch/m68k/include/asm/fec.h	/^#define FEC_TCR_HBC	/;"	d
FEC_TCR_RFC_PAUSE	arch/m68k/include/asm/fec.h	/^#define FEC_TCR_RFC_PAUSE	/;"	d
FEC_TCR_TFC_PAUSE	arch/m68k/include/asm/fec.h	/^#define FEC_TCR_TFC_PAUSE	/;"	d
FEC_TDAR_X_DES_ACTIVE	arch/m68k/include/asm/fec.h	/^#define FEC_TDAR_X_DES_ACTIVE	/;"	d
FEC_TFWR_X_WMRK	arch/m68k/include/asm/fec.h	/^#define FEC_TFWR_X_WMRK(/;"	d
FEC_TFWR_X_WMRK	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK(/;"	d
FEC_TFWR_X_WMRK_1024	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_1024	/;"	d
FEC_TFWR_X_WMRK_128	arch/m68k/include/asm/fec.h	/^#define FEC_TFWR_X_WMRK_128	/;"	d
FEC_TFWR_X_WMRK_128	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_128	/;"	d
FEC_TFWR_X_WMRK_192	arch/m68k/include/asm/fec.h	/^#define FEC_TFWR_X_WMRK_192	/;"	d
FEC_TFWR_X_WMRK_192	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_192	/;"	d
FEC_TFWR_X_WMRK_256	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_256	/;"	d
FEC_TFWR_X_WMRK_320	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_320	/;"	d
FEC_TFWR_X_WMRK_384	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_384	/;"	d
FEC_TFWR_X_WMRK_448	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_448	/;"	d
FEC_TFWR_X_WMRK_512	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_512	/;"	d
FEC_TFWR_X_WMRK_576	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_576	/;"	d
FEC_TFWR_X_WMRK_64	arch/m68k/include/asm/fec.h	/^#define FEC_TFWR_X_WMRK_64	/;"	d
FEC_TFWR_X_WMRK_64	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_64	/;"	d
FEC_TFWR_X_WMRK_640	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_640	/;"	d
FEC_TFWR_X_WMRK_704	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_704	/;"	d
FEC_TFWR_X_WMRK_768	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_768	/;"	d
FEC_TFWR_X_WMRK_832	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_832	/;"	d
FEC_TFWR_X_WMRK_896	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_896	/;"	d
FEC_TFWR_X_WMRK_960	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FEC_TFWR_X_WMRK_960	/;"	d
FEC_XFER_TIMEOUT	drivers/net/fec_mxc.c	/^#define FEC_XFER_TIMEOUT	/;"	d	file:
FEC_XMIT_TASK_NO	include/mpc5xxx_sdma.h	/^#define FEC_XMIT_TASK_NO /;"	d
FEC_X_DES_ACTIVE_TDAR	drivers/net/fec_mxc.h	/^#define FEC_X_DES_ACTIVE_TDAR	/;"	d
FEC_X_WMRK_STRFWD	drivers/net/fec_mxc.h	/^#define FEC_X_WMRK_STRFWD	/;"	d
FELIC_MODE_BIT	drivers/net/sh_eth.h	/^enum FELIC_MODE_BIT {$/;"	g
FEROCEON_EXTRA_FEATURE_L2C_EN	arch/arm/mach-kirkwood/cache.c	/^#define FEROCEON_EXTRA_FEATURE_L2C_EN /;"	d	file:
FES_100	drivers/net/designware.h	/^#define FES_100	/;"	d
FETCH_DECODE_MODRM	drivers/bios_emulator/include/x86emu/decode.h	/^#define FETCH_DECODE_MODRM(/;"	d
FETCTRL	include/mc13892.h	/^#define FETCTRL	/;"	d
FETH2_RST	include/configs/MPC8560ADS.h	/^  #define FETH2_RST	/;"	d
FETH3_RST	include/configs/MPC8560ADS.h	/^  #define FETH3_RST	/;"	d
FETOVRD	include/mc13892.h	/^#define FETOVRD	/;"	d
FET_CTRL_ADENFET	include/power/tps65090.h	/^	FET_CTRL_ADENFET	= 1 << 1,  \/* Enable output auto discharge *\/$/;"	e	enum:__anon01d79aa50203
FET_CTRL_ENFET	include/power/tps65090.h	/^	FET_CTRL_ENFET		= 1 << 0,  \/* Enable FET *\/$/;"	e	enum:__anon01d79aa50203
FET_CTRL_PGFET	include/power/tps65090.h	/^	FET_CTRL_PGFET		= 1 << 4,  \/* Power good for FET status *\/$/;"	e	enum:__anon01d79aa50203
FET_CTRL_TOFET	include/power/tps65090.h	/^	FET_CTRL_TOFET		= 1 << 7,  \/* Timeout, startup, overload *\/$/;"	e	enum:__anon01d79aa50203
FET_CTRL_WAIT	include/power/tps65090.h	/^	FET_CTRL_WAIT		= 3 << 2,  \/* Overcurrent timeout max *\/$/;"	e	enum:__anon01d79aa50203
FEXPORT	arch/mips/include/asm/asm.h	/^#define FEXPORT(/;"	d
FEXTNVM_SW_CONFIG	drivers/net/e1000.h	/^#define FEXTNVM_SW_CONFIG /;"	d
FE_CLK_ENA	arch/arm/include/asm/arch-armada100/armada100.h	/^#define FE_CLK_ENA	/;"	d
FE_CLK_RST	arch/arm/include/asm/arch-armada100/armada100.h	/^#define FE_CLK_RST	/;"	d
FE_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FE_P	/;"	d
FExtr	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define FExtr(/;"	d
FExtr	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define FExtr(/;"	d
FF3210	include/sym53c8xx.h	/^	#define   FF3210 /;"	d
FFE	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FFE	/;"	d
FFE	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define FFE	/;"	d
FFE_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FFE_P	/;"	d
FFUART_BASE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	FFUART_BASE	/;"	d
FFUART_INDEX	drivers/serial/serial_pxa.c	/^#define	FFUART_INDEX	/;"	d	file:
FGR	include/twl6030.h	/^#define FGR	/;"	d
FGS	include/twl6030.h	/^#define FGS	/;"	d
FG_NUM_OF_REGS	include/power/max17042_fg.h	/^	FG_NUM_OF_REGS = 0x100,$/;"	e	enum:__anon883a25da0103
FG_NUM_OF_REGS	include/power/max77693_fg.h	/^	FG_NUM_OF_REGS		= 0x100,$/;"	e	enum:__anonad3ce24c0103
FG_REG_10	include/twl6030.h	/^#define FG_REG_10	/;"	d
FG_REG_11	include/twl6030.h	/^#define FG_REG_11	/;"	d
FICS_TXCOUNT	drivers/sound/samsung-i2s.c	/^#define FICS_TXCOUNT(/;"	d	file:
FIC_RXCOUNT	drivers/sound/samsung-i2s.c	/^#define FIC_RXCOUNT(/;"	d	file:
FIC_RXFLUSH	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define FIC_RXFLUSH	/;"	d
FIC_TX1COUNT	drivers/sound/samsung-i2s.c	/^#define FIC_TX1COUNT(/;"	d	file:
FIC_TX2COUNT	drivers/sound/samsung-i2s.c	/^#define FIC_TX2COUNT(/;"	d	file:
FIC_TXCOUNT	drivers/sound/samsung-i2s.c	/^#define FIC_TXCOUNT(/;"	d	file:
FIC_TXFLUSH	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define FIC_TXFLUSH	/;"	d
FIDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FIDR0	/;"	d
FIDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FIDR1	/;"	d
FIDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FIDR2	/;"	d
FIDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FIDR3	/;"	d
FIDR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FIDR4	/;"	d
FIDR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FIDR5	/;"	d
FIELD_SIZEOF	include/linux/kernel.h	/^#define FIELD_SIZEOF(/;"	d
FIFO	arch/arm/include/asm/ti-common/ti-edma3.h	/^	FIFO = 1$/;"	e	enum:edma3_address_mode
FIFOCFG	include/usb/fotg210.h	/^#define FIFOCFG(/;"	d
FIFOCFG_1BLK	include/usb/fotg210.h	/^#define FIFOCFG_1BLK /;"	d
FIFOCFG_2BLK	include/usb/fotg210.h	/^#define FIFOCFG_2BLK /;"	d
FIFOCFG_3BLK	include/usb/fotg210.h	/^#define FIFOCFG_3BLK /;"	d
FIFOCFG_BLKSZ_1024	include/usb/fotg210.h	/^#define FIFOCFG_BLKSZ_1024 /;"	d
FIFOCFG_BLKSZ_512	include/usb/fotg210.h	/^#define FIFOCFG_BLKSZ_512 /;"	d
FIFOCFG_BULK	include/usb/fotg210.h	/^#define FIFOCFG_BULK /;"	d
FIFOCFG_CFG_MASK	include/usb/fotg210.h	/^#define FIFOCFG_CFG_MASK /;"	d
FIFOCFG_EN	include/usb/fotg210.h	/^#define FIFOCFG_EN /;"	d
FIFOCFG_INTR	include/usb/fotg210.h	/^#define FIFOCFG_INTR /;"	d
FIFOCFG_ISOC	include/usb/fotg210.h	/^#define FIFOCFG_ISOC /;"	d
FIFOCFG_NBLK_MASK	include/usb/fotg210.h	/^#define FIFOCFG_NBLK_MASK /;"	d
FIFOCFG_NBLK_SHIFT	include/usb/fotg210.h	/^#define FIFOCFG_NBLK_SHIFT /;"	d
FIFOCFG_RSVD	include/usb/fotg210.h	/^#define FIFOCFG_RSVD /;"	d
FIFOCFG_TYPE_MASK	include/usb/fotg210.h	/^#define FIFOCFG_TYPE_MASK /;"	d
FIFOCFG_TYPE_SHIFT	include/usb/fotg210.h	/^#define FIFOCFG_TYPE_SHIFT /;"	d
FIFOCLR	arch/sh/include/asm/cpu_sh7722.h	/^#define FIFOCLR /;"	d
FIFOCONTROL	drivers/net/davinci_emac.h	/^	dv_reg		FIFOCONTROL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FIFOCSR_BYTES	include/usb/fotg210.h	/^#define FIFOCSR_BYTES(/;"	d
FIFOCSR_RESET	include/usb/fotg210.h	/^#define FIFOCSR_RESET /;"	d
FIFOC_DISABLE_CLOCK_GATE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_DISABLE_CLOCK_GATE	/;"	d
FIFOC_ENABLE_CLOCK_GATE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_ENABLE_CLOCK_GATE	/;"	d
FIFOC_PSC0_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC0_RX_ADDR	/;"	d
FIFOC_PSC0_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC0_RX_SIZE	/;"	d
FIFOC_PSC0_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC0_TX_ADDR	/;"	d
FIFOC_PSC0_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC0_TX_SIZE	/;"	d
FIFOC_PSC10_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC10_RX_ADDR	/;"	d
FIFOC_PSC10_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC10_RX_SIZE	/;"	d
FIFOC_PSC10_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC10_TX_ADDR	/;"	d
FIFOC_PSC10_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC10_TX_SIZE	/;"	d
FIFOC_PSC11_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC11_RX_ADDR	/;"	d
FIFOC_PSC11_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC11_RX_SIZE	/;"	d
FIFOC_PSC11_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC11_TX_ADDR	/;"	d
FIFOC_PSC11_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC11_TX_SIZE	/;"	d
FIFOC_PSC1_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC1_RX_ADDR	/;"	d
FIFOC_PSC1_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC1_RX_SIZE	/;"	d
FIFOC_PSC1_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC1_TX_ADDR	/;"	d
FIFOC_PSC1_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC1_TX_SIZE	/;"	d
FIFOC_PSC2_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC2_RX_ADDR	/;"	d
FIFOC_PSC2_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC2_RX_SIZE	/;"	d
FIFOC_PSC2_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC2_TX_ADDR	/;"	d
FIFOC_PSC2_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC2_TX_SIZE	/;"	d
FIFOC_PSC3_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC3_RX_ADDR	/;"	d
FIFOC_PSC3_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC3_RX_SIZE	/;"	d
FIFOC_PSC3_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC3_TX_ADDR	/;"	d
FIFOC_PSC3_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC3_TX_SIZE	/;"	d
FIFOC_PSC4_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC4_RX_ADDR	/;"	d
FIFOC_PSC4_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC4_RX_SIZE	/;"	d
FIFOC_PSC4_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC4_TX_ADDR	/;"	d
FIFOC_PSC4_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC4_TX_SIZE	/;"	d
FIFOC_PSC5_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC5_RX_ADDR	/;"	d
FIFOC_PSC5_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC5_RX_SIZE	/;"	d
FIFOC_PSC5_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC5_TX_ADDR	/;"	d
FIFOC_PSC5_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC5_TX_SIZE	/;"	d
FIFOC_PSC6_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC6_RX_ADDR	/;"	d
FIFOC_PSC6_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC6_RX_SIZE	/;"	d
FIFOC_PSC6_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC6_TX_ADDR	/;"	d
FIFOC_PSC6_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC6_TX_SIZE	/;"	d
FIFOC_PSC7_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC7_RX_ADDR	/;"	d
FIFOC_PSC7_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC7_RX_SIZE	/;"	d
FIFOC_PSC7_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC7_TX_ADDR	/;"	d
FIFOC_PSC7_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC7_TX_SIZE	/;"	d
FIFOC_PSC8_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC8_RX_ADDR	/;"	d
FIFOC_PSC8_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC8_RX_SIZE	/;"	d
FIFOC_PSC8_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC8_TX_ADDR	/;"	d
FIFOC_PSC8_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC8_TX_SIZE	/;"	d
FIFOC_PSC9_RX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC9_RX_ADDR	/;"	d
FIFOC_PSC9_RX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC9_RX_SIZE	/;"	d
FIFOC_PSC9_TX_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC9_TX_ADDR	/;"	d
FIFOC_PSC9_TX_SIZE	arch/powerpc/include/asm/immap_512x.h	/^#define FIFOC_PSC9_TX_SIZE	/;"	d
FIFOLDST_EXT	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_EXT	/;"	d
FIFOLDST_EXT_LEN_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_EXT_LEN_MASK	/;"	d
FIFOLDST_EXT_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_EXT_MASK	/;"	d
FIFOLDST_EXT_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_EXT_SHIFT	/;"	d
FIFOLDST_LEN_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_LEN_MASK	/;"	d
FIFOLDST_SGF	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_SGF	/;"	d
FIFOLDST_SGF_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_SGF_MASK	/;"	d
FIFOLDST_SGF_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_SGF_SHIFT	/;"	d
FIFOLDST_VLF	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_VLF	/;"	d
FIFOLDST_VLF_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLDST_VLF_MASK	/;"	d
FIFOLD_CLASS_BOTH	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CLASS_BOTH	/;"	d
FIFOLD_CLASS_CLASS1	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CLASS_CLASS1	/;"	d
FIFOLD_CLASS_CLASS2	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CLASS_CLASS2	/;"	d
FIFOLD_CLASS_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CLASS_MASK	/;"	d
FIFOLD_CLASS_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CLASS_SHIFT	/;"	d
FIFOLD_CLASS_SKIP	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CLASS_SKIP	/;"	d
FIFOLD_CONT_TYPE_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOLD_CONT_TYPE_SHIFT	/;"	d
FIFOLD_IMM	drivers/crypto/fsl/desc.h	/^#define FIFOLD_IMM	/;"	d
FIFOLD_IMM_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_IMM_MASK	/;"	d
FIFOLD_IMM_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOLD_IMM_SHIFT	/;"	d
FIFOLD_TYPE_AAD	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_AAD	/;"	d
FIFOLD_TYPE_ACT_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_ACT_MASK	/;"	d
FIFOLD_TYPE_BITDATA	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_BITDATA	/;"	d
FIFOLD_TYPE_FLUSH1	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_FLUSH1	/;"	d
FIFOLD_TYPE_ICV	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_ICV	/;"	d
FIFOLD_TYPE_IV	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_IV	/;"	d
FIFOLD_TYPE_LAST1	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_LAST1	/;"	d
FIFOLD_TYPE_LAST2	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_LAST2	/;"	d
FIFOLD_TYPE_LAST2FLUSH	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_LAST2FLUSH	/;"	d
FIFOLD_TYPE_LAST2FLUSH1	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_LAST2FLUSH1 /;"	d
FIFOLD_TYPE_LASTBOTH	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_LASTBOTH	/;"	d
FIFOLD_TYPE_LASTBOTHFL	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_LASTBOTHFL	/;"	d
FIFOLD_TYPE_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_MASK	/;"	d
FIFOLD_TYPE_MSG	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_MSG	/;"	d
FIFOLD_TYPE_MSG1OUT2	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_MSG1OUT2	/;"	d
FIFOLD_TYPE_MSG_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_MSG_MASK	/;"	d
FIFOLD_TYPE_NOACTION	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_NOACTION	/;"	d
FIFOLD_TYPE_NOINFOFIFO	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_NOINFOFIFO	/;"	d
FIFOLD_TYPE_PK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK	/;"	d
FIFOLD_TYPE_PK_A	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_A	/;"	d
FIFOLD_TYPE_PK_A0	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_A0	/;"	d
FIFOLD_TYPE_PK_A1	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_A1	/;"	d
FIFOLD_TYPE_PK_A2	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_A2	/;"	d
FIFOLD_TYPE_PK_A3	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_A3	/;"	d
FIFOLD_TYPE_PK_B	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_B	/;"	d
FIFOLD_TYPE_PK_B0	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_B0	/;"	d
FIFOLD_TYPE_PK_B1	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_B1	/;"	d
FIFOLD_TYPE_PK_B2	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_B2	/;"	d
FIFOLD_TYPE_PK_B3	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_B3	/;"	d
FIFOLD_TYPE_PK_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_MASK	/;"	d
FIFOLD_TYPE_PK_N	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_N	/;"	d
FIFOLD_TYPE_PK_TYPEMASK	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_PK_TYPEMASK /;"	d
FIFOLD_TYPE_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOLD_TYPE_SHIFT	/;"	d
FIFOMAP	include/usb/fotg210.h	/^#define FIFOMAP(/;"	d
FIFOMAP_BIDIR	include/usb/fotg210.h	/^#define FIFOMAP_BIDIR /;"	d
FIFOMAP_CFG_MASK	include/usb/fotg210.h	/^#define FIFOMAP_CFG_MASK /;"	d
FIFOMAP_DEFAULT	include/usb/fotg210.h	/^#define FIFOMAP_DEFAULT /;"	d
FIFOMAP_DIR_MASK	include/usb/fotg210.h	/^#define FIFOMAP_DIR_MASK /;"	d
FIFOMAP_EP	include/usb/fotg210.h	/^#define FIFOMAP_EP(/;"	d
FIFOMAP_EP_MASK	include/usb/fotg210.h	/^#define FIFOMAP_EP_MASK /;"	d
FIFOMAP_IN	include/usb/fotg210.h	/^#define FIFOMAP_IN /;"	d
FIFOMAP_OUT	include/usb/fotg210.h	/^#define FIFOMAP_OUT /;"	d
FIFOST_CLASS_CLASS1KEY	drivers/crypto/fsl/desc.h	/^#define FIFOST_CLASS_CLASS1KEY	/;"	d
FIFOST_CLASS_CLASS2KEY	drivers/crypto/fsl/desc.h	/^#define FIFOST_CLASS_CLASS2KEY	/;"	d
FIFOST_CLASS_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOST_CLASS_MASK	/;"	d
FIFOST_CLASS_NORMAL	drivers/crypto/fsl/desc.h	/^#define FIFOST_CLASS_NORMAL	/;"	d
FIFOST_CLASS_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOST_CLASS_SHIFT	/;"	d
FIFOST_CONT_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOST_CONT_MASK	/;"	d
FIFOST_CONT_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOST_CONT_SHIFT	/;"	d
FIFOST_TYPE_AF_SBOX_JKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_AF_SBOX_JKEK /;"	d
FIFOST_TYPE_AF_SBOX_TKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_AF_SBOX_TKEK /;"	d
FIFOST_TYPE_KEY_KEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_KEY_KEK	/;"	d
FIFOST_TYPE_KEY_TKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_KEY_TKEK	/;"	d
FIFOST_TYPE_MASK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_MASK	/;"	d
FIFOST_TYPE_MESSAGE_DATA	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_MESSAGE_DATA /;"	d
FIFOST_TYPE_OUTFIFO_KEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_OUTFIFO_KEK	/;"	d
FIFOST_TYPE_OUTFIFO_TKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_OUTFIFO_TKEK /;"	d
FIFOST_TYPE_PKHA_A	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_A	/;"	d
FIFOST_TYPE_PKHA_A0	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_A0	/;"	d
FIFOST_TYPE_PKHA_A1	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_A1	/;"	d
FIFOST_TYPE_PKHA_A2	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_A2	/;"	d
FIFOST_TYPE_PKHA_A3	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_A3	/;"	d
FIFOST_TYPE_PKHA_B	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_B	/;"	d
FIFOST_TYPE_PKHA_B0	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_B0	/;"	d
FIFOST_TYPE_PKHA_B1	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_B1	/;"	d
FIFOST_TYPE_PKHA_B2	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_B2	/;"	d
FIFOST_TYPE_PKHA_B3	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_B3	/;"	d
FIFOST_TYPE_PKHA_E_JKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_E_JKEK	/;"	d
FIFOST_TYPE_PKHA_E_TKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_E_TKEK	/;"	d
FIFOST_TYPE_PKHA_N	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_PKHA_N	/;"	d
FIFOST_TYPE_RNGFIFO	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_RNGFIFO	/;"	d
FIFOST_TYPE_RNGSTORE	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_RNGSTORE	/;"	d
FIFOST_TYPE_SHIFT	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_SHIFT	/;"	d
FIFOST_TYPE_SKIP	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_SKIP	/;"	d
FIFOST_TYPE_SPLIT_KEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_SPLIT_KEK	/;"	d
FIFOST_TYPE_SPLIT_TKEK	drivers/crypto/fsl/desc.h	/^#define FIFOST_TYPE_SPLIT_TKEK	/;"	d
FIFO_COUNT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                FIFO_COUNT /;"	d
FIFO_COUNT	board/esd/pmc440/pmc440.h	/^#define FIFO_COUNT /;"	d
FIFO_CTRL_0	drivers/mtd/nand/tegra_nand.h	/^#define FIFO_CTRL_0	/;"	d
FIFO_CTRL_FAEMASK	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_FAEMASK	/;"	d
FIFO_CTRL_FRAME	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_FRAME	/;"	d
FIFO_CTRL_GR	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_GR(/;"	d
FIFO_CTRL_IPMASK	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_IPMASK	/;"	d
FIFO_CTRL_OFMASK	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_OFMASK	/;"	d
FIFO_CTRL_RXWMASK	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_RXWMASK	/;"	d
FIFO_CTRL_UFMASK	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_UFMASK	/;"	d
FIFO_CTRL_WCTL	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_WCTL	/;"	d
FIFO_CTRL_WFR	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_CTRL_WFR	/;"	d
FIFO_EMPTY	board/esd/pmc440/pmc440.h	/^#define FIFO_EMPTY /;"	d
FIFO_EMPTY	drivers/usb/eth/r8152.h	/^#define FIFO_EMPTY	/;"	d
FIFO_EMPTY_1FB	drivers/usb/eth/r8152.h	/^#define FIFO_EMPTY_1FB	/;"	d
FIFO_ERRSTAT	drivers/net/fsl_mcdmafec.c	/^#define FIFO_ERRSTAT	/;"	d	file:
FIFO_FLUSH	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                FIFO_FLUSH /;"	d
FIFO_FULL	board/esd/pmc440/pmc440.h	/^#define FIFO_FULL /;"	d
FIFO_FULL_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FIFO_FULL_R	/;"	d
FIFO_F_D_RFD	drivers/net/sh_eth.h	/^#define FIFO_F_D_RFD	/;"	d
FIFO_F_D_RFF	drivers/net/sh_eth.h	/^#define FIFO_F_D_RFF	/;"	d
FIFO_IE	board/esd/pmc440/pmc440.h	/^#define FIFO_IE /;"	d
FIFO_INT	drivers/net/smc911x.h	/^#define FIFO_INT	/;"	d
FIFO_INT_RX_AVAIL_LEVEL	drivers/net/smc911x.h	/^#define	FIFO_INT_RX_AVAIL_LEVEL	/;"	d
FIFO_INT_RX_STS_LEVEL	drivers/net/smc911x.h	/^#define	FIFO_INT_RX_STS_LEVEL	/;"	d
FIFO_INT_TX_AVAIL_LEVEL	drivers/net/smc911x.h	/^#define	FIFO_INT_TX_AVAIL_LEVEL	/;"	d
FIFO_INT_TX_STS_LEVEL	drivers/net/smc911x.h	/^#define	FIFO_INT_TX_STS_LEVEL	/;"	d
FIFO_LENGTH	include/i2s.h	/^#define FIFO_LENGTH	/;"	d
FIFO_LEVEL_MASK	board/esd/pmc440/pmc440.h	/^#define FIFO_LEVEL_MASK /;"	d
FIFO_MINUS_12K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_12K	/;"	d	file:
FIFO_MINUS_16K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_16K	/;"	d	file:
FIFO_MINUS_1K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_1K	/;"	d	file:
FIFO_MINUS_2K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_2K	/;"	d	file:
FIFO_MINUS_3K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_3K	/;"	d	file:
FIFO_MINUS_4K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_4K	/;"	d	file:
FIFO_MINUS_6K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_6K	/;"	d	file:
FIFO_MINUS_8K	drivers/net/calxedaxgmac.c	/^#define FIFO_MINUS_8K	/;"	d	file:
FIFO_NOT_EMPTY_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FIFO_NOT_EMPTY_T	/;"	d
FIFO_OVERFLOW	board/esd/pmc440/pmc440.h	/^#define FIFO_OVERFLOW /;"	d
FIFO_RWM	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FIFO_RWM /;"	d
FIFO_RX	include/linux/usb/musb.h	/^	FIFO_RX$/;"	e	enum:musb_fifo_style
FIFO_RXFE	drivers/serial/serial_lpuart.c	/^#define FIFO_RXFE	/;"	d	file:
FIFO_RXTX	include/linux/usb/musb.h	/^	FIFO_RXTX,$/;"	e	enum:musb_fifo_style
FIFO_SIZE	include/usb/mpc8xx_udc.h	/^#define FIFO_SIZE	/;"	d
FIFO_SIZE_BIT	drivers/net/sh_eth.h	/^enum FIFO_SIZE_BIT {$/;"	g
FIFO_SIZE_R	drivers/net/sh_eth.h	/^	FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007,$/;"	e	enum:FIFO_SIZE_BIT
FIFO_SIZE_T	drivers/net/sh_eth.h	/^	FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007,$/;"	e	enum:FIFO_SIZE_BIT
FIFO_STATUS_OFFSET	drivers/i2c/kona_i2c.c	/^#define FIFO_STATUS_OFFSET	/;"	d	file:
FIFO_STATUS_RXFIFO_EMPTY_MASK	drivers/i2c/kona_i2c.c	/^#define FIFO_STATUS_RXFIFO_EMPTY_MASK	/;"	d	file:
FIFO_STATUS_TXFIFO_EMPTY_MASK	drivers/i2c/kona_i2c.c	/^#define FIFO_STATUS_TXFIFO_EMPTY_MASK	/;"	d	file:
FIFO_STAT_ALARM	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_ALARM	/;"	d
FIFO_STAT_EMPTY	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_EMPTY	/;"	d
FIFO_STAT_FAE	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_FAE	/;"	d
FIFO_STAT_FR	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_FR	/;"	d
FIFO_STAT_FRAME	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_FRAME(/;"	d
FIFO_STAT_FULL	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_FULL	/;"	d
FIFO_STAT_IP	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_IP	/;"	d
FIFO_STAT_OF	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_OF	/;"	d
FIFO_STAT_RXW	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_RXW	/;"	d
FIFO_STAT_UF	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define FIFO_STAT_UF	/;"	d
FIFO_TX	include/linux/usb/musb.h	/^	FIFO_TX,$/;"	e	enum:musb_fifo_style
FIFO_TXFE	drivers/serial/serial_lpuart.c	/^#define FIFO_TXFE	/;"	d	file:
FIFO_UWM	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FIFO_UWM /;"	d
FILELINE	scripts/docproc.c	/^typedef void FILELINE(char * file, char * line);$/;"	t	typeref:typename:void ()(char * file,char * line)	file:
FILEONLY	scripts/docproc.c	/^typedef void FILEONLY(char * file);$/;"	t	typeref:typename:void ()(char * file)	file:
FILETYPE_DIRECTORY	include/ext_common.h	/^#define	FILETYPE_DIRECTORY	/;"	d
FILETYPE_INO_DIRECTORY	include/ext_common.h	/^#define FILETYPE_INO_DIRECTORY	/;"	d
FILETYPE_INO_MASK	include/ext_common.h	/^#define FILETYPE_INO_MASK	/;"	d
FILETYPE_INO_REG	include/ext_common.h	/^#define FILETYPE_INO_REG	/;"	d
FILETYPE_INO_SYMLINK	include/ext_common.h	/^#define FILETYPE_INO_SYMLINK	/;"	d
FILETYPE_REG	include/ext_common.h	/^#define	FILETYPE_REG	/;"	d
FILETYPE_SYMLINK	include/ext_common.h	/^#define	FILETYPE_SYMLINK	/;"	d
FILETYPE_UNKNOWN	include/ext_common.h	/^#define	FILETYPE_UNKNOWN	/;"	d
FILE_CRC	include/lattice.h	/^#define FILE_CRC	/;"	d
FILE_PERM	board/samsung/origen/tools/mkorigenspl.c	/^#define FILE_PERM	/;"	d	file:
FILE_PERM	board/samsung/smdkv310/tools/mksmdkv310spl.c	/^#define FILE_PERM	/;"	d	file:
FILE_PERM	tools/mkexynosspl.c	/^#define FILE_PERM	/;"	d	file:
FILE_TYPE_NORMAL	drivers/usb/gadget/f_thor.h	/^	FILE_TYPE_NORMAL,$/;"	e	enum:__anon8cc3e5bf0103
FILE_TYPE_PIT	drivers/usb/gadget/f_thor.h	/^	FILE_TYPE_PIT,$/;"	e	enum:__anon8cc3e5bf0103
FILL	arch/mips/include/asm/cacheops.h	/^#define FILL	/;"	d
FILL	board/bf533-ezkit/flash-defines.h	/^#define FILL	/;"	d
FILL_15BIT_555RGB	drivers/video/cfb_console.c	/^#define FILL_15BIT_555RGB(/;"	d	file:
FILL_16BIT_565RGB	drivers/video/cfb_console.c	/^#define FILL_16BIT_565RGB(/;"	d	file:
FILL_24BIT_888RGB	drivers/video/cfb_console.c	/^#define FILL_24BIT_888RGB(/;"	d	file:
FILL_32BIT_X888RGB	drivers/video/cfb_console.c	/^#define FILL_32BIT_X888RGB(/;"	d	file:
FILL_8BIT_332RGB	drivers/video/cfb_console.c	/^#define FILL_8BIT_332RGB(/;"	d	file:
FIMC0_LCLK_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC0_LCLK_RATIO	/;"	d
FIMC0_LCLK_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC0_LCLK_SEL	/;"	d
FIMC1_LCLK_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC1_LCLK_RATIO	/;"	d
FIMC1_LCLK_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC1_LCLK_SEL	/;"	d
FIMC2_LCLK_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC2_LCLK_RATIO	/;"	d
FIMC2_LCLK_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC2_LCLK_SEL	/;"	d
FIMC3_LCLK_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC3_LCLK_RATIO	/;"	d
FIMC3_LCLK_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC3_LCLK_SEL	/;"	d
FIMC_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMC_SEL_SCLKMPLL	/;"	d
FIMD0_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMD0_RATIO	/;"	d
FIMD_CPU_INTERFACE	drivers/video/exynos/exynos_fb.c	/^	FIMD_CPU_INTERFACE = 2,$/;"	e	enum:__anon2c77cb8c0103	file:
FIMD_CPU_INTERFACE	include/exynos_lcd.h	/^	FIMD_CPU_INTERFACE = 2,$/;"	e	enum:__anon698595460103
FIMD_RGB_INTERFACE	drivers/video/exynos/exynos_fb.c	/^	FIMD_RGB_INTERFACE = 1,$/;"	e	enum:__anon2c77cb8c0103	file:
FIMD_RGB_INTERFACE	include/exynos_lcd.h	/^	FIMD_RGB_INTERFACE = 1,$/;"	e	enum:__anon698595460103
FIMD_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define FIMD_SEL_SCLKMPLL	/;"	d
FINAL	common/xyzModem.c	/^#define FINAL$/;"	d	file:
FIND	Makefile	/^FIND := find$/;"	m
FIND	include/search.h	/^	FIND,$/;"	e	enum:__anon2b83eac40103
FINDFLAGS	Makefile	/^FINDFLAGS := -L$/;"	m
FIND_NEXT_MATCH_DOWN	scripts/kconfig/nconf.c	/^	FIND_NEXT_MATCH_DOWN, FIND_NEXT_MATCH_UP} match_f;$/;"	e	enum:__anon6c8863710103	file:
FIND_NEXT_MATCH_UP	scripts/kconfig/nconf.c	/^	FIND_NEXT_MATCH_DOWN, FIND_NEXT_MATCH_UP} match_f;$/;"	e	enum:__anon6c8863710103	file:
FINISHED	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	FINISHED,$/;"	e	enum:link_training_state
FINISH_STATE	lib/zlib/deflate.h	/^#define FINISH_STATE /;"	d
FIN_HZ	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define FIN_HZ	/;"	d	file:
FIO0_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_BOTH /;"	d
FIO0_DIR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_DIR /;"	d
FIO0_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_EDGE /;"	d
FIO0_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_FLAG_C /;"	d
FIO0_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_FLAG_D /;"	d
FIO0_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_FLAG_S /;"	d
FIO0_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_FLAG_T /;"	d
FIO0_INEN	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_INEN /;"	d
FIO0_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKA_C /;"	d
FIO0_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKA_D /;"	d
FIO0_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKA_S /;"	d
FIO0_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKA_T /;"	d
FIO0_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKB_C /;"	d
FIO0_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKB_D /;"	d
FIO0_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKB_S /;"	d
FIO0_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_MASKB_T /;"	d
FIO0_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO0_POLAR /;"	d
FIO1_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_BOTH /;"	d
FIO1_DIR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_DIR /;"	d
FIO1_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_EDGE /;"	d
FIO1_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_FLAG_C /;"	d
FIO1_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_FLAG_D /;"	d
FIO1_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_FLAG_S /;"	d
FIO1_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_FLAG_T /;"	d
FIO1_INEN	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_INEN /;"	d
FIO1_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKA_C /;"	d
FIO1_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKA_D /;"	d
FIO1_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKA_S /;"	d
FIO1_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKA_T /;"	d
FIO1_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKB_C /;"	d
FIO1_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKB_D /;"	d
FIO1_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKB_S /;"	d
FIO1_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_MASKB_T /;"	d
FIO1_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO1_POLAR /;"	d
FIO2_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_BOTH /;"	d
FIO2_DIR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_DIR /;"	d
FIO2_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_EDGE /;"	d
FIO2_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_FLAG_C /;"	d
FIO2_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_FLAG_D /;"	d
FIO2_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_FLAG_S /;"	d
FIO2_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_FLAG_T /;"	d
FIO2_INEN	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_INEN /;"	d
FIO2_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKA_C /;"	d
FIO2_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKA_D /;"	d
FIO2_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKA_S /;"	d
FIO2_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKA_T /;"	d
FIO2_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKB_C /;"	d
FIO2_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKB_D /;"	d
FIO2_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKB_S /;"	d
FIO2_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_MASKB_T /;"	d
FIO2_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define FIO2_POLAR /;"	d
FIOCLK	drivers/i2c/i2c-uniphier-f.c	/^#define FIOCLK	/;"	d	file:
FIO_BOTH	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_BOTH /;"	d
FIO_DIR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_DIR /;"	d
FIO_EDGE	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_EDGE /;"	d
FIO_EDGE_BITS	board/bf533-stamp/ide-cf.c	/^#define FIO_EDGE_BITS	/;"	d	file:
FIO_EDGE_CF_BITS	board/bf533-stamp/ide-cf.c	/^#define FIO_EDGE_CF_BITS	/;"	d	file:
FIO_FLAG_C	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_FLAG_C /;"	d
FIO_FLAG_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_FLAG_D /;"	d
FIO_FLAG_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_FLAG_S /;"	d
FIO_FLAG_T	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_FLAG_T /;"	d
FIO_INEN	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_INEN /;"	d
FIO_MASKA_C	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKA_C /;"	d
FIO_MASKA_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKA_D /;"	d
FIO_MASKA_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKA_S /;"	d
FIO_MASKA_T	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKA_T /;"	d
FIO_MASKB_C	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKB_C /;"	d
FIO_MASKB_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKB_D /;"	d
FIO_MASKB_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKB_S /;"	d
FIO_MASKB_T	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_MASKB_T /;"	d
FIO_POLAR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define FIO_POLAR /;"	d
FIO_POLAR_BITS	board/bf533-stamp/ide-cf.c	/^#define FIO_POLAR_BITS	/;"	d	file:
FIO_POLAR_CF_BITS	board/bf533-stamp/ide-cf.c	/^#define FIO_POLAR_CF_BITS	/;"	d	file:
FIQ26_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define FIQ26_MODE	/;"	d
FIQ_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define FIQ_MODE	/;"	d
FIQ_STACK_START	arch/arm/lib/vectors.S	/^FIQ_STACK_START:$/;"	l
FIQ_STACK_START	arch/nds32/cpu/n1213/start.S	/^FIQ_STACK_START:$/;"	l
FIRC_CLK_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define FIRC_CLK_FREQ	/;"	d
FIRI_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define FIRI_BASE_ADDR	/;"	d
FIRMWARE_NV_INDEX	drivers/tpm/tpm_tis_sandbox.c	/^#define FIRMWARE_NV_INDEX	/;"	d	file:
FIRM_ADDR1	board/Arcturus/ucp1020/cmd_arc.c	/^#define FIRM_ADDR1 /;"	d	file:
FIRM_ADDR2	board/Arcturus/ucp1020/cmd_arc.c	/^#define FIRM_ADDR2 /;"	d	file:
FIRM_ADDR3	board/Arcturus/ucp1020/cmd_arc.c	/^#define FIRM_ADDR3 /;"	d	file:
FIRM_ADDR4	board/Arcturus/ucp1020/cmd_arc.c	/^#define FIRM_ADDR4 /;"	d	file:
FIRM_START	board/mpl/common/common_util.c	/^#define FIRM_START /;"	d	file:
FIRST_BLOCK_OF_NEXT_PLANE	drivers/mtd/nand/denali.h	/^#define FIRST_BLOCK_OF_NEXT_PLANE	/;"	d
FIRST_BLOCK_OF_NEXT_PLANE__VALUE	drivers/mtd/nand/denali.h	/^#define     FIRST_BLOCK_OF_NEXT_PLANE__VALUE	/;"	d
FIRST_CELL	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define FIRST_CELL	/;"	d
FIRST_PORT	board/varisys/cyrus/eth.c	/^#define FIRST_PORT /;"	d	file:
FIRST_PORT_ADDR	board/varisys/cyrus/eth.c	/^#define FIRST_PORT_ADDR /;"	d	file:
FIR_OP0	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP0 /;"	d
FIR_OP0_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP0_SHIFT /;"	d
FIR_OP1	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP1 /;"	d
FIR_OP1_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP1_SHIFT /;"	d
FIR_OP2	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP2 /;"	d
FIR_OP2_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP2_SHIFT /;"	d
FIR_OP3	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP3 /;"	d
FIR_OP3_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP3_SHIFT /;"	d
FIR_OP4	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP4 /;"	d
FIR_OP4_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP4_SHIFT /;"	d
FIR_OP5	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP5 /;"	d
FIR_OP5_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP5_SHIFT /;"	d
FIR_OP6	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP6 /;"	d
FIR_OP6_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP6_SHIFT /;"	d
FIR_OP7	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP7 /;"	d
FIR_OP7_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP7_SHIFT /;"	d
FIR_OP_CA	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CA /;"	d
FIR_OP_CM0	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CM0 /;"	d
FIR_OP_CM1	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CM1 /;"	d
FIR_OP_CM2	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CM2 /;"	d
FIR_OP_CM3	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CM3 /;"	d
FIR_OP_CW0	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CW0 /;"	d
FIR_OP_CW1	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_CW1 /;"	d
FIR_OP_NOP	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_NOP /;"	d
FIR_OP_PA	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_PA /;"	d
FIR_OP_RB	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_RB /;"	d
FIR_OP_RBW	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_RBW /;"	d
FIR_OP_RS	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_RS /;"	d
FIR_OP_RSW	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_RSW /;"	d
FIR_OP_UA	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_UA /;"	d
FIR_OP_WB	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_WB /;"	d
FIR_OP_WS	arch/powerpc/include/asm/fsl_lbc.h	/^#define FIR_OP_WS /;"	d
FIT	Kconfig	/^config FIT$/;"	c	menu:Boot images
FIT_ALGO_PROP	include/image.h	/^#define FIT_ALGO_PROP	/;"	d
FIT_ARCH_PROP	include/image.h	/^#define FIT_ARCH_PROP	/;"	d
FIT_BEST_MATCH	Kconfig	/^config FIT_BEST_MATCH$/;"	c	menu:Boot images
FIT_COMP_PROP	include/image.h	/^#define FIT_COMP_PROP	/;"	d
FIT_CONFS_PATH	include/image.h	/^#define FIT_CONFS_PATH	/;"	d
FIT_DATA_PROP	include/image.h	/^#define FIT_DATA_PROP	/;"	d
FIT_DEFAULT_PROP	include/image.h	/^#define FIT_DEFAULT_PROP	/;"	d
FIT_DESC_PROP	include/image.h	/^#define FIT_DESC_PROP	/;"	d
FIT_ENTRY_PROP	include/image.h	/^#define FIT_ENTRY_PROP	/;"	d
FIT_FDT_PROP	include/image.h	/^#define FIT_FDT_PROP	/;"	d
FIT_FPGA_PROP	include/image.h	/^#define FIT_FPGA_PROP	/;"	d
FIT_HASH_NODENAME	include/image.h	/^#define FIT_HASH_NODENAME	/;"	d
FIT_IGNORE_PROP	include/image.h	/^#define FIT_IGNORE_PROP	/;"	d
FIT_IMAGES_PATH	include/image.h	/^#define FIT_IMAGES_PATH	/;"	d
FIT_IMAGE_POST_PROCESS	Kconfig	/^config FIT_IMAGE_POST_PROCESS$/;"	c	menu:Boot images
FIT_KERNEL_PROP	include/image.h	/^#define FIT_KERNEL_PROP	/;"	d
FIT_LOADABLE_PROP	include/image.h	/^#define FIT_LOADABLE_PROP	/;"	d
FIT_LOAD_IGNORED	include/image.h	/^	FIT_LOAD_IGNORED,	\/* Ignore load address *\/$/;"	e	enum:fit_load_op
FIT_LOAD_OPTIONAL	include/image.h	/^	FIT_LOAD_OPTIONAL,	\/* Can be provided, but optional *\/$/;"	e	enum:fit_load_op
FIT_LOAD_OPTIONAL_NON_ZERO	include/image.h	/^	FIT_LOAD_OPTIONAL_NON_ZERO,	\/* Optional, a value of 0 is ignored *\/$/;"	e	enum:fit_load_op
FIT_LOAD_PROP	include/image.h	/^#define FIT_LOAD_PROP	/;"	d
FIT_LOAD_REQUIRED	include/image.h	/^	FIT_LOAD_REQUIRED,	\/* Must be provided *\/$/;"	e	enum:fit_load_op
FIT_MAX_HASH_LEN	include/image.h	/^#define FIT_MAX_HASH_LEN	/;"	d
FIT_OS_PROP	include/image.h	/^#define FIT_OS_PROP	/;"	d
FIT_RAMDISK_PROP	include/image.h	/^#define FIT_RAMDISK_PROP	/;"	d
FIT_SETUP_PROP	include/image.h	/^#define FIT_SETUP_PROP	/;"	d
FIT_SIGNATURE	Kconfig	/^config FIT_SIGNATURE$/;"	c	menu:Boot images
FIT_SIG_NODENAME	include/image.h	/^#define FIT_SIG_NODENAME	/;"	d
FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE)	tools/Makefile	/^FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common\/image-sig.o$/;"	m
FIT_TIMESTAMP_PROP	include/image.h	/^#define FIT_TIMESTAMP_PROP	/;"	d
FIT_TYPE_PROP	include/image.h	/^#define FIT_TYPE_PROP	/;"	d
FIT_VALUE_PROP	include/image.h	/^#define FIT_VALUE_PROP	/;"	d
FIT_VERBOSE	Kconfig	/^config FIT_VERBOSE$/;"	c	menu:Boot images
FIXADDR_TOP	arch/mips/include/asm/mach-generic/spaces.h	/^#define FIXADDR_TOP	/;"	d
FIXEDBURST	drivers/net/designware.h	/^#define FIXEDBURST	/;"	d
FIXED_COMP	include/jffs2/mini_inflate.h	/^#define FIXED_COMP /;"	d
FIXED_DIVIDER	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FIXED_DIVIDER(/;"	d
FIXED_DIVIDER	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FIXED_DIVIDER(/;"	d
FIX_HREG_DEVICE_ID_HASH	board/gdsys/p1022/controlcenterd-id.c	/^	FIX_HREG_DEVICE_ID_HASH	= 0,$/;"	e	enum:__anonaa5ecaea0503	file:
FIX_HREG_SELF_HASH	board/gdsys/p1022/controlcenterd-id.c	/^	FIX_HREG_SELF_HASH	= 1,$/;"	e	enum:__anonaa5ecaea0503	file:
FIX_HREG_STAGE2_HASH	board/gdsys/p1022/controlcenterd-id.c	/^	FIX_HREG_STAGE2_HASH	= 2,$/;"	e	enum:__anonaa5ecaea0503	file:
FIX_HREG_VENDOR	board/gdsys/p1022/controlcenterd-id.c	/^	FIX_HREG_VENDOR		= 3,$/;"	e	enum:__anonaa5ecaea0503	file:
FIX_M_AUD	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define FIX_M_AUD	/;"	d
FIX_M_AUD	arch/arm/mach-exynos/include/mach/dp.h	/^#define FIX_M_AUD	/;"	d
FIX_M_VID	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define FIX_M_VID	/;"	d
FIX_M_VID	arch/arm/mach-exynos/include/mach/dp.h	/^#define FIX_M_VID	/;"	d
FInsrt	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define FInsrt(/;"	d
FInsrt	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define FInsrt(/;"	d
FLADR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLADR /;"	d
FLADR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLADR	/;"	d
FLADR2	arch/sh/include/asm/cpu_sh7722.h	/^#define FLADR2 /;"	d
FLAG	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FLAG(/;"	d
FLAG	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FLAG(/;"	d
FLAGS	drivers/bios_emulator/include/x86emu/regs.h	/^	u32 FLAGS;$/;"	m	struct:i386_special_regs	typeref:typename:u32
FLAGS	lib/zlib/inflate.h	/^    FLAGS,      \/* i: waiting for method and flags (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
FLAGS_DMA	drivers/block/dwc_ahsata.h	/^#define FLAGS_DMA	/;"	d
FLAGS_DMA	drivers/block/fsl_sata.h	/^#define FLAGS_DMA	/;"	d
FLAGS_FPDMA	drivers/block/dwc_ahsata.h	/^#define FLAGS_FPDMA	/;"	d
FLAGS_FPDMA	drivers/block/fsl_sata.h	/^#define FLAGS_FPDMA	/;"	d
FLAG_BOOLEAN	tools/env/fw_env.c	/^	FLAG_BOOLEAN,$/;"	e	enum:flag_scheme	file:
FLAG_CAPS_LOCK	drivers/input/input.c	/^	FLAG_CAPS_LOCK		= 1 << 2,$/;"	e	enum:__anon5f1be7330103	file:
FLAG_CF	drivers/usb/host/ehci.h	/^#define FLAG_CF	/;"	d
FLAG_CHILD_PROBED	test/dm/bus.c	/^	FLAG_CHILD_PROBED	= 10,$/;"	e	enum:__anon596c5e0f0103	file:
FLAG_CHILD_REMOVED	test/dm/bus.c	/^	FLAG_CHILD_REMOVED	= -7,$/;"	e	enum:__anon596c5e0f0103	file:
FLAG_CLEAR	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FLAG_CLEAR(/;"	d
FLAG_CLEAR	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FLAG_CLEAR(/;"	d
FLAG_CONT_ON_NEWLINE	include/cli_hush.h	/^#define FLAG_CONT_ON_NEWLINE /;"	d
FLAG_CONV_END	arch/arm/mach-exynos/include/mach/adc.h	/^#define FLAG_CONV_END	/;"	d
FLAG_DO	common/cli_hush.c	/^#define FLAG_DO /;"	d	file:
FLAG_DONE	common/cli_hush.c	/^#define FLAG_DONE /;"	d	file:
FLAG_EEPROM_MAC	drivers/usb/eth/asix.c	/^#define FLAG_EEPROM_MAC	/;"	d	file:
FLAG_ELIF	common/cli_hush.c	/^#define FLAG_ELIF /;"	d	file:
FLAG_ELSE	common/cli_hush.c	/^#define FLAG_ELSE /;"	d	file:
FLAG_END	common/cli_hush.c	/^#define FLAG_END /;"	d	file:
FLAG_EXIT_FROM_LOOP	common/cli_hush.c	/^#define FLAG_EXIT_FROM_LOOP /;"	d	file:
FLAG_EXIT_FROM_LOOP	include/cli_hush.h	/^#define FLAG_EXIT_FROM_LOOP /;"	d
FLAG_FI	common/cli_hush.c	/^#define FLAG_FI /;"	d	file:
FLAG_FLGOFF	arch/arm/mach-davinci/include/mach/hardware.h	/^#define FLAG_FLGOFF	/;"	d
FLAG_FLGON	arch/arm/mach-davinci/include/mach/hardware.h	/^#define FLAG_FLGON	/;"	d
FLAG_FLIP	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FLAG_FLIP(/;"	d
FLAG_FLIP	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FLAG_FLIP(/;"	d
FLAG_FOR	common/cli_hush.c	/^#define FLAG_FOR /;"	d	file:
FLAG_IF	common/cli_hush.c	/^#define FLAG_IF /;"	d	file:
FLAG_IN	common/cli_hush.c	/^#define FLAG_IN /;"	d	file:
FLAG_INCREMENTAL	tools/env/fw_env.c	/^	FLAG_INCREMENTAL,$/;"	e	enum:flag_scheme	file:
FLAG_NONE	drivers/usb/eth/asix.c	/^#define FLAG_NONE	/;"	d	file:
FLAG_NONE	drivers/usb/eth/asix88179.c	/^#define FLAG_NONE	/;"	d	file:
FLAG_NONE	tools/env/fw_env.c	/^	FLAG_NONE,$/;"	e	enum:flag_scheme	file:
FLAG_NUM_LOCK	drivers/input/input.c	/^	FLAG_NUM_LOCK		= 1 << 1,$/;"	e	enum:__anon5f1be7330103	file:
FLAG_PARSE_SEMICOLON	common/cli_hush.c	/^#define FLAG_PARSE_SEMICOLON /;"	d	file:
FLAG_PARSE_SEMICOLON	include/cli_hush.h	/^#define FLAG_PARSE_SEMICOLON /;"	d
FLAG_PORRST	arch/arm/mach-davinci/include/mach/hardware.h	/^#define FLAG_PORRST	/;"	d
FLAG_PROTECT_CLEAR	include/dataflash.h	/^# define FLAG_PROTECT_CLEAR	/;"	d
FLAG_PROTECT_CLEAR	include/flash.h	/^#define FLAG_PROTECT_CLEAR	/;"	d
FLAG_PROTECT_INVALID	include/dataflash.h	/^# define FLAG_PROTECT_INVALID	/;"	d
FLAG_PROTECT_INVALID	include/flash.h	/^#define	FLAG_PROTECT_INVALID	/;"	d
FLAG_PROTECT_SET	include/dataflash.h	/^# define FLAG_PROTECT_SET	/;"	d
FLAG_PROTECT_SET	include/flash.h	/^#define FLAG_PROTECT_SET	/;"	d
FLAG_RDLOAD	arch/arm/include/asm/setup.h	/^#define FLAG_RDLOAD	/;"	d
FLAG_RDPROMPT	arch/arm/include/asm/setup.h	/^#define FLAG_RDPROMPT	/;"	d
FLAG_READONLY	arch/arm/include/asm/setup.h	/^#define FLAG_READONLY	/;"	d
FLAG_REPARSING	common/cli_hush.c	/^#define FLAG_REPARSING /;"	d	file:
FLAG_REPARSING	include/cli_hush.h	/^#define FLAG_REPARSING /;"	d
FLAG_SCROLL_LOCK	drivers/input/input.c	/^	FLAG_SCROLL_LOCK	= 1 << 0,$/;"	e	enum:__anon5f1be7330103	file:
FLAG_SET	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FLAG_SET(/;"	d
FLAG_SET	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FLAG_SET(/;"	d
FLAG_SETENV	include/dataflash.h	/^# define	FLAG_SETENV	/;"	d
FLAG_SETENV	include/flash.h	/^#define	FLAG_SETENV	/;"	d
FLAG_SHOW_ALL	cmd/gpio.c	/^	FLAG_SHOW_ALL		= 1 << 0,$/;"	e	enum:__anonc2d1ef480103	file:
FLAG_SHOW_BANK	cmd/gpio.c	/^	FLAG_SHOW_BANK		= 1 << 1,$/;"	e	enum:__anonc2d1ef480103	file:
FLAG_SHOW_NEWLINE	cmd/gpio.c	/^	FLAG_SHOW_NEWLINE	= 1 << 2,$/;"	e	enum:__anonc2d1ef480103	file:
FLAG_START	common/cli_hush.c	/^#define FLAG_START /;"	d	file:
FLAG_TEST	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FLAG_TEST(/;"	d
FLAG_TEST	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FLAG_TEST(/;"	d
FLAG_THEN	common/cli_hush.c	/^#define FLAG_THEN /;"	d	file:
FLAG_TYPE_AX88172	drivers/usb/eth/asix.c	/^#define FLAG_TYPE_AX88172	/;"	d	file:
FLAG_TYPE_AX88178a	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_AX88178a	/;"	d	file:
FLAG_TYPE_AX88179	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_AX88179	/;"	d	file:
FLAG_TYPE_AX88772	drivers/usb/eth/asix.c	/^#define FLAG_TYPE_AX88772	/;"	d	file:
FLAG_TYPE_AX88772B	drivers/usb/eth/asix.c	/^#define FLAG_TYPE_AX88772B	/;"	d	file:
FLAG_TYPE_DLINK_DUB1312	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_DLINK_DUB1312	/;"	d	file:
FLAG_TYPE_GX3	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_GX3	/;"	d	file:
FLAG_TYPE_LENOVO	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_LENOVO	/;"	d	file:
FLAG_TYPE_SAMSUNG	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_SAMSUNG	/;"	d	file:
FLAG_TYPE_SITECOM	drivers/usb/eth/asix88179.c	/^#define FLAG_TYPE_SITECOM	/;"	d	file:
FLAG_UNTIL	common/cli_hush.c	/^#define FLAG_UNTIL /;"	d	file:
FLAG_WDTRST	arch/arm/mach-davinci/include/mach/hardware.h	/^#define FLAG_WDTRST	/;"	d
FLAG_WHILE	common/cli_hush.c	/^#define FLAG_WHILE /;"	d	file:
FLASH	arch/blackfin/include/asm/shared_resources.h	/^#define FLASH	/;"	d
FLASH	drivers/net/rtl8169.c	/^	FLASH = 0x30,$/;"	e	enum:RTL8169_registers	file:
FLASH	include/configs/microblaze-generic.h	/^#define	FLASH$/;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/bf609-ezkit.h	/^#define FLASHBOOT_ENV_SETTINGS /;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^# define FLASHBOOT_ENV_SETTINGS /;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/cm-bf527.h	/^#define FLASHBOOT_ENV_SETTINGS /;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/cm-bf533.h	/^#define FLASHBOOT_ENV_SETTINGS	/;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/cm-bf537e.h	/^#define FLASHBOOT_ENV_SETTINGS /;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/cm-bf537u.h	/^#define FLASHBOOT_ENV_SETTINGS /;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/cm-bf548.h	/^#define FLASHBOOT_ENV_SETTINGS	/;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/cm-bf561.h	/^#define FLASHBOOT_ENV_SETTINGS	/;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/tcm-bf518.h	/^#define FLASHBOOT_ENV_SETTINGS	/;"	d
FLASHBOOT_ENV_SETTINGS	include/configs/tcm-bf537.h	/^#define FLASHBOOT_ENV_SETTINGS /;"	d
FLASH_28F008S5	include/flash.h	/^#define FLASH_28F008S5	/;"	d
FLASH_28F016SV	include/flash.h	/^#define FLASH_28F016SV	/;"	d
FLASH_28F128J3A	include/flash.h	/^#define FLASH_28F128J3A /;"	d
FLASH_28F128K3	include/flash.h	/^#define FLASH_28F128K3	/;"	d
FLASH_28F160C3B	include/flash.h	/^#define FLASH_28F160C3B /;"	d
FLASH_28F160C3T	include/flash.h	/^#define FLASH_28F160C3T /;"	d
FLASH_28F160F3B	include/flash.h	/^#define FLASH_28F160F3B /;"	d
FLASH_28F160S3	include/flash.h	/^#define FLASH_28F160S3	/;"	d
FLASH_28F256J3A	include/flash.h	/^#define FLASH_28F256J3A /;"	d
FLASH_28F256K3	include/flash.h	/^#define FLASH_28F256K3	/;"	d
FLASH_28F256L18T	include/flash.h	/^#define FLASH_28F256L18T /;"	d
FLASH_28F320C3B	include/flash.h	/^#define FLASH_28F320C3B /;"	d
FLASH_28F320C3T	include/flash.h	/^#define FLASH_28F320C3T /;"	d
FLASH_28F320J3A	include/flash.h	/^#define FLASH_28F320J3A /;"	d
FLASH_28F320J5	include/flash.h	/^#define FLASH_28F320J5	/;"	d
FLASH_28F320S3	include/flash.h	/^#define FLASH_28F320S3	/;"	d
FLASH_28F400_B	include/flash.h	/^#define FLASH_28F400_B	/;"	d
FLASH_28F400_T	include/flash.h	/^#define FLASH_28F400_T	/;"	d
FLASH_28F640C3B	include/flash.h	/^#define FLASH_28F640C3B /;"	d
FLASH_28F640C3T	include/flash.h	/^#define FLASH_28F640C3T /;"	d
FLASH_28F640J3A	include/flash.h	/^#define FLASH_28F640J3A /;"	d
FLASH_28F640J5	include/flash.h	/^#define FLASH_28F640J5	/;"	d
FLASH_28F64K3	include/flash.h	/^#define FLASH_28F64K3	/;"	d
FLASH_28F800C3B	include/flash.h	/^#define FLASH_28F800C3B /;"	d
FLASH_28F800C3T	include/flash.h	/^#define FLASH_28F800C3T /;"	d
FLASH_28F800_B	include/flash.h	/^#define FLASH_28F800_B	/;"	d
FLASH_ACR_DCEN	arch/arm/mach-stm32/stm32f1/clock.c	/^#define FLASH_ACR_DCEN	/;"	d	file:
FLASH_ACR_DCEN	drivers/mtd/stm32_flash.h	/^#define FLASH_ACR_DCEN	/;"	d
FLASH_ACR_ICEN	arch/arm/mach-stm32/stm32f1/clock.c	/^#define FLASH_ACR_ICEN	/;"	d	file:
FLASH_ACR_ICEN	drivers/mtd/stm32_flash.h	/^#define FLASH_ACR_ICEN	/;"	d
FLASH_ACR_PRFTEN	arch/arm/mach-stm32/stm32f1/clock.c	/^#define FLASH_ACR_PRFTEN	/;"	d	file:
FLASH_ACR_PRFTEN	drivers/mtd/stm32_flash.h	/^#define FLASH_ACR_PRFTEN	/;"	d
FLASH_ACR_WS	arch/arm/mach-stm32/stm32f1/clock.c	/^#define FLASH_ACR_WS(/;"	d	file:
FLASH_ACR_WS	drivers/mtd/stm32_flash.h	/^#define FLASH_ACR_WS(/;"	d
FLASH_AM033	include/flash.h	/^#define FLASH_AM033	/;"	d
FLASH_AM033C	include/flash.h	/^#define FLASH_AM033C	/;"	d
FLASH_AM040	include/flash.h	/^#define FLASH_AM040	/;"	d
FLASH_AM065	include/flash.h	/^#define FLASH_AM065	/;"	d
FLASH_AM065D	include/flash.h	/^#define FLASH_AM065D	/;"	d
FLASH_AM080	include/flash.h	/^#define FLASH_AM080	/;"	d
FLASH_AM116DB	include/flash.h	/^#define FLASH_AM116DB	/;"	d
FLASH_AM116DT	include/flash.h	/^#define FLASH_AM116DT	/;"	d
FLASH_AM160B	include/flash.h	/^#define FLASH_AM160B	/;"	d
FLASH_AM160LV	include/flash.h	/^#define FLASH_AM160LV	/;"	d
FLASH_AM160T	include/flash.h	/^#define FLASH_AM160T	/;"	d
FLASH_AM29F800B	include/flash.h	/^#define FLASH_AM29F800B /;"	d
FLASH_AM320B	include/flash.h	/^#define FLASH_AM320B	/;"	d
FLASH_AM320T	include/flash.h	/^#define FLASH_AM320T	/;"	d
FLASH_AM400B	include/flash.h	/^#define FLASH_AM400B	/;"	d
FLASH_AM400T	include/flash.h	/^#define FLASH_AM400T	/;"	d
FLASH_AM640U	include/flash.h	/^#define FLASH_AM640U	/;"	d
FLASH_AM800B	include/flash.h	/^#define FLASH_AM800B	/;"	d
FLASH_AM800T	include/flash.h	/^#define FLASH_AM800T	/;"	d
FLASH_AMD016	include/flash.h	/^#define FLASH_AMD016	/;"	d
FLASH_AMDL163B	include/flash.h	/^#define FLASH_AMDL163B	/;"	d
FLASH_AMDL163T	include/flash.h	/^#define FLASH_AMDL163T	/;"	d
FLASH_AMDL322B	include/flash.h	/^#define FLASH_AMDL322B	/;"	d
FLASH_AMDL322T	include/flash.h	/^#define FLASH_AMDL322T	/;"	d
FLASH_AMDL323B	include/flash.h	/^#define FLASH_AMDL323B	/;"	d
FLASH_AMDL323T	include/flash.h	/^#define FLASH_AMDL323T	/;"	d
FLASH_AMDL324B	include/flash.h	/^#define FLASH_AMDL324B	/;"	d
FLASH_AMDL324T	include/flash.h	/^#define FLASH_AMDL324T	/;"	d
FLASH_AMDL640	include/flash.h	/^#define FLASH_AMDL640	/;"	d
FLASH_AMDL640MB	include/flash.h	/^#define FLASH_AMDL640MB /;"	d
FLASH_AMDL640MT	include/flash.h	/^#define FLASH_AMDL640MT /;"	d
FLASH_AMDLV033C	include/flash.h	/^#define FLASH_AMDLV033C /;"	d
FLASH_AMDLV065D	include/flash.h	/^#define FLASH_AMDLV065D /;"	d
FLASH_AMD_COMP	include/flash.h	/^#define FLASH_AMD_COMP	/;"	d
FLASH_AMLV128U	include/flash.h	/^#define FLASH_AMLV128U	/;"	d
FLASH_AMLV256U	include/flash.h	/^#define FLASH_AMLV256U	/;"	d
FLASH_AMLV320B	include/flash.h	/^#define FLASH_AMLV320B	/;"	d
FLASH_AMLV320T	include/flash.h	/^#define FLASH_AMLV320T	/;"	d
FLASH_AMLV320U	include/flash.h	/^#define FLASH_AMLV320U	/;"	d
FLASH_AMLV640U	include/flash.h	/^#define FLASH_AMLV640U	/;"	d
FLASH_AP	board/mpl/mip405/mip405.h	/^#define FLASH_AP	/;"	d
FLASH_AP	board/mpl/pip405/pip405.h	/^#define FLASH_AP	/;"	d
FLASH_AP_B	board/mpl/mip405/mip405.h	/^#define FLASH_AP_B	/;"	d
FLASH_AP_B	board/mpl/pip405/pip405.h	/^#define FLASH_AP_B	/;"	d
FLASH_AT040	include/flash.h	/^#define FLASH_AT040	/;"	d
FLASH_BANK_SIZE	board/cobra5272/flash.c	/^#define FLASH_BANK_SIZE /;"	d	file:
FLASH_BANK_SIZE	include/linux/mtd/st_smi.h	/^#define FLASH_BANK_SIZE	/;"	d
FLASH_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define FLASH_BASE	/;"	d
FLASH_BASE0_PRELIM	include/configs/CPCI2DP.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/CPCI4052.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/PATI.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/PLU405.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM823L.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM823M.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM850L.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM850M.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM855L.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM855M.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM860L.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM860M.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM862L.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM862M.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM866M.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/TQM885D.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/VOM405.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/bubinga.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE0_PRELIM	include/configs/walnut.h	/^#define FLASH_BASE0_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/CPCI2DP.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/CPCI4052.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM823L.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM823M.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM850L.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM850M.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM855L.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM855M.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM860L.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM860M.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM862L.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM862M.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM866M.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/TQM885D.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/bubinga.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE1_PRELIM	include/configs/walnut.h	/^#define FLASH_BASE1_PRELIM	/;"	d
FLASH_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define FLASH_BASE_ADDR /;"	d
FLASH_BASE_PRELIM	include/configs/MIP405.h	/^#define FLASH_BASE_PRELIM	/;"	d
FLASH_BASE_PRELIM	include/configs/PIP405.h	/^#define FLASH_BASE_PRELIM	/;"	d
FLASH_BASE_SDPV1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define FLASH_BASE_SDPV1	/;"	d
FLASH_BASE_SDPV2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define FLASH_BASE_SDPV2	/;"	d
FLASH_BEM	board/mpl/mip405/mip405.h	/^#define FLASH_BEM	/;"	d
FLASH_BEM	board/mpl/pip405/pip405.h	/^#define FLASH_BEM	/;"	d
FLASH_BME	board/mpl/mip405/mip405.h	/^#define FLASH_BME	/;"	d
FLASH_BME	board/mpl/pip405/pip405.h	/^#define FLASH_BME	/;"	d
FLASH_BME_B	board/mpl/mip405/mip405.h	/^#define FLASH_BME_B	/;"	d
FLASH_BME_B	board/mpl/pip405/pip405.h	/^#define FLASH_BME_B	/;"	d
FLASH_BS	board/mpl/mip405/mip405.h	/^#define FLASH_BS	/;"	d
FLASH_BS	board/mpl/pip405/pip405.h	/^#define FLASH_BS	/;"	d
FLASH_BTYPE	include/flash.h	/^#define FLASH_BTYPE	/;"	d
FLASH_BU	board/mpl/mip405/mip405.h	/^#define FLASH_BU	/;"	d
FLASH_BU	board/mpl/pip405/pip405.h	/^#define FLASH_BU	/;"	d
FLASH_BW	board/mpl/mip405/mip405.h	/^#define FLASH_BW	/;"	d
FLASH_BW	board/mpl/pip405/pip405.h	/^#define FLASH_BW	/;"	d
FLASH_BWT_B	board/mpl/mip405/mip405.h	/^#define FLASH_BWT_B	/;"	d
FLASH_BWT_B	board/mpl/pip405/pip405.h	/^#define FLASH_BWT_B	/;"	d
FLASH_CFI_16BIT	include/flash.h	/^#define FLASH_CFI_16BIT	/;"	d
FLASH_CFI_32BIT	include/flash.h	/^#define FLASH_CFI_32BIT	/;"	d
FLASH_CFI_64BIT	include/flash.h	/^#define FLASH_CFI_64BIT	/;"	d
FLASH_CFI_8BIT	include/flash.h	/^#define FLASH_CFI_8BIT	/;"	d
FLASH_CFI_BY16	include/flash.h	/^#define FLASH_CFI_BY16	/;"	d
FLASH_CFI_BY32	include/flash.h	/^#define FLASH_CFI_BY32	/;"	d
FLASH_CFI_BY64	include/flash.h	/^#define FLASH_CFI_BY64	/;"	d
FLASH_CFI_BY8	include/flash.h	/^#define FLASH_CFI_BY8	/;"	d
FLASH_CFI_X16	include/flash.h	/^#define FLASH_CFI_X16	/;"	d
FLASH_CFI_X16X32	include/flash.h	/^#define FLASH_CFI_X16X32	/;"	d
FLASH_CFI_X8	include/flash.h	/^#define FLASH_CFI_X8	/;"	d
FLASH_CFI_X8X16	include/flash.h	/^#define FLASH_CFI_X8X16	/;"	d
FLASH_CLK_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define FLASH_CLK_MASK	/;"	d
FLASH_CLK_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define FLASH_CLK_SHIFT	/;"	d
FLASH_CMD_BLOCK_ERASE	include/mtd/cfi_flash.h	/^#define FLASH_CMD_BLOCK_ERASE	/;"	d
FLASH_CMD_CFI	include/mtd/cfi_flash.h	/^#define FLASH_CMD_CFI	/;"	d
FLASH_CMD_CLEAR_STATUS	include/mtd/cfi_flash.h	/^#define FLASH_CMD_CLEAR_STATUS	/;"	d
FLASH_CMD_ERASE_CONFIRM	include/mtd/cfi_flash.h	/^#define FLASH_CMD_ERASE_CONFIRM	/;"	d
FLASH_CMD_PROTECT	include/mtd/cfi_flash.h	/^#define FLASH_CMD_PROTECT	/;"	d
FLASH_CMD_PROTECT_CLEAR	include/mtd/cfi_flash.h	/^#define FLASH_CMD_PROTECT_CLEAR	/;"	d
FLASH_CMD_PROTECT_SET	include/mtd/cfi_flash.h	/^#define FLASH_CMD_PROTECT_SET	/;"	d
FLASH_CMD_READ_ID	include/mtd/cfi_flash.h	/^#define FLASH_CMD_READ_ID	/;"	d
FLASH_CMD_READ_STATUS	include/mtd/cfi_flash.h	/^#define FLASH_CMD_READ_STATUS	/;"	d
FLASH_CMD_RESET	include/mtd/cfi_flash.h	/^# define FLASH_CMD_RESET	/;"	d
FLASH_CMD_RESET	include/mtd/cfi_flash.h	/^#define FLASH_CMD_RESET	/;"	d
FLASH_CMD_SETUP	include/mtd/cfi_flash.h	/^#define FLASH_CMD_SETUP	/;"	d
FLASH_CMD_SET_CR_CONFIRM	include/mtd/cfi_flash.h	/^#define FLASH_CMD_SET_CR_CONFIRM	/;"	d
FLASH_CMD_WRITE	include/mtd/cfi_flash.h	/^#define FLASH_CMD_WRITE	/;"	d
FLASH_CMD_WRITE_BUFFER_CONFIRM	include/mtd/cfi_flash.h	/^#define FLASH_CMD_WRITE_BUFFER_CONFIRM	/;"	d
FLASH_CMD_WRITE_BUFFER_PROG	include/mtd/cfi_flash.h	/^#define FLASH_CMD_WRITE_BUFFER_PROG	/;"	d
FLASH_CMD_WRITE_TO_BUFFER	include/mtd/cfi_flash.h	/^#define FLASH_CMD_WRITE_TO_BUFFER	/;"	d
FLASH_CNTL_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define FLASH_CNTL_BASE	/;"	d
FLASH_CNTL_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define FLASH_CNTL_BASE	/;"	d
FLASH_CONTINUATION_CODE	include/mtd/cfi_flash.h	/^#define FLASH_CONTINUATION_CODE	/;"	d
FLASH_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define FLASH_CONTROL /;"	d
FLASH_CONTROL_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define FLASH_CONTROL_CLEAR /;"	d
FLASH_CONTROL_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define FLASH_CONTROL_SET /;"	d
FLASH_CR	board/mpl/mip405/mip405.h	/^#define FLASH_CR	/;"	d
FLASH_CR	board/mpl/pip405/pip405.h	/^#define FLASH_CR	/;"	d
FLASH_CR_B	board/mpl/mip405/mip405.h	/^#define FLASH_CR_B	/;"	d
FLASH_CR_B	board/mpl/pip405/pip405.h	/^#define FLASH_CR_B	/;"	d
FLASH_CSN	board/mpl/mip405/mip405.h	/^#define FLASH_CSN	/;"	d
FLASH_CSN	board/mpl/pip405/pip405.h	/^#define FLASH_CSN	/;"	d
FLASH_CS_NC_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define FLASH_CS_NC_MASK	/;"	d
FLASH_CS_NC_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define FLASH_CS_NC_SHIFT	/;"	d
FLASH_CYCLE1	board/freescale/m5253demo/flash.c	/^#define FLASH_CYCLE1 /;"	d	file:
FLASH_CYCLE2	board/freescale/m5253demo/flash.c	/^#define FLASH_CYCLE2 /;"	d	file:
FLASH_END_POST_BLOCK	include/configs/cm-bf548.h	/^#define FLASH_END_POST_BLOCK /;"	d
FLASH_ERASE_TIMEOUT	include/flash.h	/^#define FLASH_ERASE_TIMEOUT	/;"	d
FLASH_FAIL	board/bf533-ezkit/flash-defines.h	/^#define FLASH_FAIL	/;"	d
FLASH_FUJLV650	include/flash.h	/^#define FLASH_FUJLV650	/;"	d
FLASH_FWT_B	board/mpl/mip405/mip405.h	/^#define FLASH_FWT_B	/;"	d
FLASH_FWT_B	board/mpl/pip405/pip405.h	/^#define FLASH_FWT_B	/;"	d
FLASH_GPIO_PIN	include/configs/km/km_arm.h	/^#define FLASH_GPIO_PIN	/;"	d
FLASH_ID	drivers/mtd/st_smi.c	/^#define FLASH_ID(/;"	d	file:
FLASH_INTEL160B	include/flash.h	/^#define FLASH_INTEL160B /;"	d
FLASH_INTEL160T	include/flash.h	/^#define FLASH_INTEL160T /;"	d
FLASH_INTEL320B	include/flash.h	/^#define FLASH_INTEL320B /;"	d
FLASH_INTEL320T	include/flash.h	/^#define FLASH_INTEL320T /;"	d
FLASH_INTEL640B	include/flash.h	/^#define FLASH_INTEL640B /;"	d
FLASH_INTEL640T	include/flash.h	/^#define FLASH_INTEL640T /;"	d
FLASH_INTEL800B	include/flash.h	/^#define FLASH_INTEL800B /;"	d
FLASH_INTEL800T	include/flash.h	/^#define FLASH_INTEL800T /;"	d
FLASH_LH28F016SCT	include/flash.h	/^#define FLASH_LH28F016SCT /;"	d
FLASH_LOADSIZE_NAND	tools/imximage.h	/^#define FLASH_LOADSIZE_NAND	/;"	d
FLASH_LOADSIZE_NOR	tools/imximage.h	/^#define FLASH_LOADSIZE_NOR	/;"	d
FLASH_LOADSIZE_ONENAND	tools/imximage.h	/^#define FLASH_LOADSIZE_ONENAND	/;"	d
FLASH_LOADSIZE_QSPI	tools/imximage.h	/^#define FLASH_LOADSIZE_QSPI	/;"	d
FLASH_LOADSIZE_SATA	tools/imximage.h	/^#define FLASH_LOADSIZE_SATA	/;"	d
FLASH_LOADSIZE_SD	tools/imximage.h	/^#define FLASH_LOADSIZE_SD	/;"	d
FLASH_LOADSIZE_SPI	tools/imximage.h	/^#define FLASH_LOADSIZE_SPI	/;"	d
FLASH_LOADSIZE_STANDARD	tools/imximage.h	/^#define FLASH_LOADSIZE_STANDARD	/;"	d
FLASH_LOADSIZE_UNDEFINED	tools/imximage.h	/^#define FLASH_LOADSIZE_UNDEFINED	/;"	d
FLASH_MAN_AMD	include/flash.h	/^#define FLASH_MAN_AMD	/;"	d
FLASH_MAN_ATM	include/flash.h	/^#define FLASH_MAN_ATM	/;"	d
FLASH_MAN_BM	include/flash.h	/^#define FLASH_MAN_BM	/;"	d
FLASH_MAN_CFI	include/flash.h	/^#define FLASH_MAN_CFI	/;"	d
FLASH_MAN_EXCEL	include/flash.h	/^#define FLASH_MAN_EXCEL /;"	d
FLASH_MAN_FUJ	include/flash.h	/^#define FLASH_MAN_FUJ	/;"	d
FLASH_MAN_INTEL	include/flash.h	/^#define FLASH_MAN_INTEL /;"	d
FLASH_MAN_MCHP	include/flash.h	/^#define FLASH_MAN_MCHP	/;"	d
FLASH_MAN_MT	include/flash.h	/^#define FLASH_MAN_MT	/;"	d
FLASH_MAN_MX	include/flash.h	/^#define FLASH_MAN_MX	/;"	d
FLASH_MAN_SHARP	include/flash.h	/^#define FLASH_MAN_SHARP /;"	d
FLASH_MAN_SST	include/flash.h	/^#define FLASH_MAN_SST	/;"	d
FLASH_MAN_ST	board/bf533-ezkit/flash-defines.h	/^#define FLASH_MAN_ST	/;"	d
FLASH_MAN_STM	include/flash.h	/^#define FLASH_MAN_STM	/;"	d
FLASH_MAN_TOSH	include/flash.h	/^#define FLASH_MAN_TOSH	/;"	d
FLASH_MAX_SECTOR_SIZE	include/configs/vexpress_aemv8a.h	/^#define FLASH_MAX_SECTOR_SIZE	/;"	d
FLASH_MAX_SECTOR_SIZE	include/configs/vexpress_common.h	/^#define FLASH_MAX_SECTOR_SIZE	/;"	d
FLASH_MAX_SIZE	include/configs/MIP405.h	/^#define FLASH_MAX_SIZE	/;"	d
FLASH_MAX_SIZE	include/configs/PIP405.h	/^#define FLASH_MAX_SIZE	/;"	d
FLASH_MCHP100B	include/flash.h	/^#define FLASH_MCHP100B	/;"	d
FLASH_MCHP100T	include/flash.h	/^#define FLASH_MCHP100T	/;"	d
FLASH_MT28S4M16LC	include/flash.h	/^#define FLASH_MT28S4M16LC /;"	d
FLASH_MXLV320B	include/flash.h	/^#define FLASH_MXLV320B	/;"	d
FLASH_MXLV320T	include/flash.h	/^#define FLASH_MXLV320T	/;"	d
FLASH_OEN	board/mpl/mip405/mip405.h	/^#define FLASH_OEN	/;"	d
FLASH_OEN	board/mpl/pip405/pip405.h	/^#define FLASH_OEN	/;"	d
FLASH_OFFSET	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define FLASH_OFFSET /;"	d	file:
FLASH_OFFSET	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^#define FLASH_OFFSET /;"	d	file:
FLASH_OFFSET_BUFFER_SIZE	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_BUFFER_SIZE	/;"	d
FLASH_OFFSET_CEMAX_TOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_CEMAX_TOUT	/;"	d
FLASH_OFFSET_CETOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_CETOUT	/;"	d
FLASH_OFFSET_CFI	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_CFI	/;"	d
FLASH_OFFSET_CFI_ALT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_CFI_ALT	/;"	d
FLASH_OFFSET_CFI_RESP	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_CFI_RESP	/;"	d
FLASH_OFFSET_DEVICE_ID	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_DEVICE_ID	/;"	d
FLASH_OFFSET_DEVICE_ID2	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_DEVICE_ID2	/;"	d
FLASH_OFFSET_DEVICE_ID3	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_DEVICE_ID3	/;"	d
FLASH_OFFSET_EMAX_TOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_EMAX_TOUT	/;"	d
FLASH_OFFSET_ERASE_REGIONS	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_ERASE_REGIONS	/;"	d
FLASH_OFFSET_ETOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_ETOUT	/;"	d
FLASH_OFFSET_EXT_QUERY_T_P_ADDR	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR	/;"	d
FLASH_OFFSET_INTEL_PROTECTION	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_INTEL_PROTECTION	/;"	d
FLASH_OFFSET_INTERFACE	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_INTERFACE	/;"	d
FLASH_OFFSET_MANUFACTURER_ID	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_MANUFACTURER_ID	/;"	d
FLASH_OFFSET_NAND	tools/imximage.h	/^#define FLASH_OFFSET_NAND	/;"	d
FLASH_OFFSET_NOR	tools/imximage.h	/^#define FLASH_OFFSET_NOR	/;"	d
FLASH_OFFSET_NUM_ERASE_REGIONS	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_NUM_ERASE_REGIONS	/;"	d
FLASH_OFFSET_ONENAND	tools/imximage.h	/^#define FLASH_OFFSET_ONENAND	/;"	d
FLASH_OFFSET_PRIMARY_VENDOR	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_PRIMARY_VENDOR	/;"	d
FLASH_OFFSET_PROTECT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_PROTECT	/;"	d
FLASH_OFFSET_QSPI	tools/imximage.h	/^#define FLASH_OFFSET_QSPI	/;"	d
FLASH_OFFSET_SATA	tools/imximage.h	/^#define FLASH_OFFSET_SATA	/;"	d
FLASH_OFFSET_SD	tools/imximage.h	/^#define FLASH_OFFSET_SD	/;"	d
FLASH_OFFSET_SIZE	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_SIZE	/;"	d
FLASH_OFFSET_SPI	tools/imximage.h	/^#define FLASH_OFFSET_SPI	/;"	d
FLASH_OFFSET_STANDARD	tools/imximage.h	/^#define FLASH_OFFSET_STANDARD	/;"	d
FLASH_OFFSET_UNDEFINED	tools/imximage.h	/^#define FLASH_OFFSET_UNDEFINED	/;"	d
FLASH_OFFSET_USER_PROTECTION	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_USER_PROTECTION	/;"	d
FLASH_OFFSET_WBMAX_TOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_WBMAX_TOUT	/;"	d
FLASH_OFFSET_WBTOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_WBTOUT	/;"	d
FLASH_OFFSET_WMAX_TOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_WMAX_TOUT	/;"	d
FLASH_OFFSET_WTOUT	include/mtd/cfi_flash.h	/^#define FLASH_OFFSET_WTOUT	/;"	d
FLASH_PEN	board/mpl/mip405/mip405.h	/^#define FLASH_PEN	/;"	d
FLASH_PEN	board/mpl/pip405/pip405.h	/^#define FLASH_PEN	/;"	d
FLASH_PIC32	drivers/mtd/Kconfig	/^config FLASH_PIC32$/;"	c	menu:MTD Support
FLASH_PORT_WIDTH	board/freescale/m5253demo/flash.c	/^typedef unsigned short FLASH_PORT_WIDTH;$/;"	t	typeref:typename:unsigned short	file:
FLASH_PORT_WIDTH	board/tqc/tqm834x/tqm834x.c	/^	typedef unsigned long FLASH_PORT_WIDTH;$/;"	t	function:detect_num_flash_banks	typeref:typename:unsigned long	file:
FLASH_PORT_WIDTHV	board/freescale/m5253demo/flash.c	/^typedef volatile unsigned short FLASH_PORT_WIDTHV;$/;"	t	typeref:typename:volatile unsigned short	file:
FLASH_PORT_WIDTHV	board/tqc/tqm834x/tqm834x.c	/^	typedef volatile unsigned long FLASH_PORT_WIDTHV;$/;"	t	function:detect_num_flash_banks	typeref:typename:volatile unsigned long	file:
FLASH_PSD4256GV	include/flash.h	/^#define FLASH_PSD4256GV /;"	d
FLASH_RE	board/mpl/mip405/mip405.h	/^#define FLASH_RE	/;"	d
FLASH_RE	board/mpl/pip405/pip405.h	/^#define FLASH_RE	/;"	d
FLASH_S29GL064M	include/flash.h	/^#define FLASH_S29GL064M /;"	d
FLASH_S29GL128N	include/flash.h	/^#define FLASH_S29GL128N /;"	d
FLASH_SECTORSIZE	board/amcc/yucca/yucca.h	/^#define FLASH_SECTORSIZE	/;"	d
FLASH_SECTOR_SIZE	include/configs/kzm9g.h	/^#define FLASH_SECTOR_SIZE	/;"	d
FLASH_SHOW_PROGRESS	drivers/mtd/cfi_flash.c	/^#define FLASH_SHOW_PROGRESS(/;"	d	file:
FLASH_SIZE	board/bf533-ezkit/flash-defines.h	/^#define FLASH_SIZE	/;"	d
FLASH_SIZE	include/configs/exynos5-dt-common.h	/^#define FLASH_SIZE	/;"	d
FLASH_SIZE_PRELIM	include/configs/MIP405.h	/^#define FLASH_SIZE_PRELIM	/;"	d
FLASH_SIZE_PRELIM	include/configs/PIP405.h	/^#define FLASH_SIZE_PRELIM	/;"	d
FLASH_SOR	board/mpl/mip405/mip405.h	/^#define FLASH_SOR	/;"	d
FLASH_SOR	board/mpl/pip405/pip405.h	/^#define FLASH_SOR	/;"	d
FLASH_SST020	include/flash.h	/^#define FLASH_SST020	/;"	d
FLASH_SST040	include/flash.h	/^#define FLASH_SST040	/;"	d
FLASH_SST160A	include/flash.h	/^#define FLASH_SST160A	/;"	d
FLASH_SST200A	include/flash.h	/^#define FLASH_SST200A	/;"	d
FLASH_SST320	include/flash.h	/^#define FLASH_SST320	/;"	d
FLASH_SST400A	include/flash.h	/^#define FLASH_SST400A	/;"	d
FLASH_SST640	include/flash.h	/^#define FLASH_SST640	/;"	d
FLASH_SST6401B	include/configs/M5253DEMO.h	/^#define FLASH_SST6401B	/;"	d
FLASH_SST800A	include/flash.h	/^#define FLASH_SST800A	/;"	d
FLASH_START_ADDRESS	include/linux/mtd/st_smi.h	/^#define FLASH_START_ADDRESS	/;"	d
FLASH_START_H	board/bf533-ezkit/flash-defines.h	/^#define FLASH_START_H	/;"	d
FLASH_START_L	board/bf533-ezkit/flash-defines.h	/^#define FLASH_START_L	/;"	d
FLASH_START_POST_BLOCK	include/configs/cm-bf548.h	/^#define FLASH_START_POST_BLOCK /;"	d
FLASH_STATUS_DONE	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_DONE	/;"	d
FLASH_STATUS_DPS	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_DPS	/;"	d
FLASH_STATUS_ECLBS	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_ECLBS	/;"	d
FLASH_STATUS_ESS	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_ESS	/;"	d
FLASH_STATUS_PROTECT	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_PROTECT	/;"	d
FLASH_STATUS_PSLBS	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_PSLBS	/;"	d
FLASH_STATUS_PSS	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_PSS	/;"	d
FLASH_STATUS_R	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_R	/;"	d
FLASH_STATUS_VPENS	include/mtd/cfi_flash.h	/^#define FLASH_STATUS_VPENS	/;"	d
FLASH_STATUS_WEL	drivers/spi/fsl_qspi.c	/^#define FLASH_STATUS_WEL	/;"	d	file:
FLASH_STM32	include/flash.h	/^#define FLASH_STM32	/;"	d
FLASH_STM320DB	include/flash.h	/^#define FLASH_STM320DB	/;"	d
FLASH_STM32F1	include/flash.h	/^#define FLASH_STM32F1	/;"	d
FLASH_STM800AB	include/flash.h	/^#define FLASH_STM800AB	/;"	d
FLASH_STM800DB	include/flash.h	/^#define FLASH_STM800DB	/;"	d
FLASH_STM800DT	include/flash.h	/^#define FLASH_STM800DT	/;"	d
FLASH_STMW320DB	include/flash.h	/^#define FLASH_STMW320DB /;"	d
FLASH_STMW320DT	include/flash.h	/^#define FLASH_STMW320DT /;"	d
FLASH_SUCCESS	board/bf533-ezkit/flash-defines.h	/^#define FLASH_SUCCESS	/;"	d
FLASH_TH	board/mpl/mip405/mip405.h	/^#define FLASH_TH	/;"	d
FLASH_TH	board/mpl/pip405/pip405.h	/^#define FLASH_TH	/;"	d
FLASH_TOT_SECT	board/bf533-ezkit/flash-defines.h	/^#define FLASH_TOT_SECT	/;"	d
FLASH_TOT_SECT	include/configs/bf533-ezkit.h	/^#define FLASH_TOT_SECT	/;"	d
FLASH_TWE	board/mpl/mip405/mip405.h	/^#define FLASH_TWE	/;"	d
FLASH_TWE	board/mpl/pip405/pip405.h	/^#define FLASH_TWE	/;"	d
FLASH_TYPEMASK	include/flash.h	/^#define FLASH_TYPEMASK	/;"	d
FLASH_UNKNOWN	include/flash.h	/^#define FLASH_UNKNOWN	/;"	d
FLASH_VENDMASK	include/flash.h	/^#define FLASH_VENDMASK	/;"	d
FLASH_WBF	board/mpl/mip405/mip405.h	/^#define FLASH_WBF	/;"	d
FLASH_WBF	board/mpl/pip405/pip405.h	/^#define FLASH_WBF	/;"	d
FLASH_WBN	board/mpl/mip405/mip405.h	/^#define FLASH_WBN	/;"	d
FLASH_WBN	board/mpl/pip405/pip405.h	/^#define FLASH_WBN	/;"	d
FLASH_WRITE_TIMEOUT	include/flash.h	/^#define FLASH_WRITE_TIMEOUT	/;"	d
FLBSYCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define FLBSYCNT /;"	d
FLBSYCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLBSYCNT	/;"	d
FLBSYTMR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLBSYTMR /;"	d
FLBSYTMR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLBSYTMR	/;"	d
FLCBUSY	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	FLCBUSY	/;"	d
FLCE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	FLCE	/;"	d
FLCMCDR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLCMCDR /;"	d
FLCMCDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLCMCDR	/;"	d
FLCMDCR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLCMDCR /;"	d
FLCMDCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLCMDCR	/;"	d
FLCMNCR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLCMNCR /;"	d
FLCMNCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLCMNCR	/;"	d
FLCPAUSE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	FLCPAUSE	/;"	d
FLD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FLD /;"	d
FLD	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define FLD	/;"	d
FLDATAR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLDATAR /;"	d
FLDATAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLDATAR	/;"	d
FLDTCNTR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLDTCNTR /;"	d
FLDTCNTR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLDTCNTR	/;"	d
FLDTFIFO	arch/sh/include/asm/cpu_sh7722.h	/^#define FLDTFIFO /;"	d
FLD_SEL	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FLD_SEL /;"	d
FLD_SEL	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define FLD_SEL	/;"	d
FLECFIFO	arch/sh/include/asm/cpu_sh7722.h	/^#define FLECFIFO /;"	d
FLEXCAN0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FLEXCAN0_BASE_ADDR	/;"	d
FLEXCAN1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FLEXCAN1_BASE_ADDR	/;"	d
FLEXINT_H	scripts/kconfig/zconf.lex.c	/^#define FLEXINT_H$/;"	d	file:
FLEXONENAND	include/linux/mtd/onenand.h	/^#define FLEXONENAND(/;"	d
FLEXONENAND_CMD_PI_ACCESS	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_CMD_PI_ACCESS	/;"	d
FLEXONENAND_CMD_PI_UPDATE	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_CMD_PI_UPDATE	/;"	d
FLEXONENAND_CMD_READ_PI	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_CMD_READ_PI	/;"	d
FLEXONENAND_CMD_RECOVER_LSB	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_CMD_RECOVER_LSB	/;"	d
FLEXONENAND_CMD_RESET	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_CMD_RESET	/;"	d
FLEXONENAND_PI_MASK	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_PI_MASK	/;"	d
FLEXONENAND_PI_UNLOCK_SHIFT	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_PI_UNLOCK_SHIFT	/;"	d
FLEXONENAND_UNCORRECTABLE_ERROR	include/linux/mtd/onenand_regs.h	/^#define FLEXONENAND_UNCORRECTABLE_ERROR /;"	d
FLEXRAY_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FLEXRAY_BASE_ADDR	/;"	d
FLEXTIMER1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	FLEXTIMER1_CLK_ROOT = 110,$/;"	e	enum:clk_root_index
FLEXTIMER1_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
FLEXTIMER1_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER1_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
FLEXTIMER2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	FLEXTIMER2_CLK_ROOT = 111,$/;"	e	enum:clk_root_index
FLEXTIMER2_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
FLEXTIMER2_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define FLEXTIMER2_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
FLEXTIMER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FLEXTIMER_BASE_ADDR	/;"	d
FLEXTIMER_FTM1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define FLEXTIMER_FTM1_BASE_ADDR	/;"	d
FLEX_BETA	scripts/kconfig/zconf.lex.c	/^#define FLEX_BETA$/;"	d	file:
FLEX_RATIO_EN	arch/x86/include/asm/msr-index.h	/^#define  FLEX_RATIO_EN	/;"	d
FLEX_RATIO_LOCK	arch/x86/include/asm/msr-index.h	/^#define  FLEX_RATIO_LOCK	/;"	d
FLEX_SCANNER	scripts/kconfig/zconf.lex.c	/^#define FLEX_SCANNER$/;"	d	file:
FLF	include/sym53c8xx.h	/^	#define   FLF /;"	d
FLG1	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG1	/;"	d
FLG1_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG1_P	/;"	d
FLG2	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG2	/;"	d
FLG2_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG2_P	/;"	d
FLG3	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG3	/;"	d
FLG3_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG3_P	/;"	d
FLG4	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG4	/;"	d
FLG4_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG4_P	/;"	d
FLG5	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG5	/;"	d
FLG5_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG5_P	/;"	d
FLG6	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG6	/;"	d
FLG6_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG6_P	/;"	d
FLG7	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG7	/;"	d
FLG7_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLG7_P	/;"	d
FLINTDMACR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLINTDMACR /;"	d
FLINTDMACR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLINTDMACR	/;"	d
FLM0	arch/sh/include/asm/cpu_sh7722.h	/^#define FLM0 /;"	d
FLM1	arch/sh/include/asm/cpu_sh7722.h	/^#define FLM1 /;"	d
FLOW	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW	/;"	d
FLOW	drivers/net/smc911x.h	/^#define FLOW	/;"	d
FLOW	drivers/usb/eth/smsc95xx.c	/^#define FLOW	/;"	d	file:
FLOW_ARRAY	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define FLOW_ARRAY	/;"	d
FLOW_AUTO	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_AUTO	/;"	d
FLOW_AUTO	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define FLOW_AUTO	/;"	d
FLOW_CONTROL_ADDRESS_HIGH	drivers/net/e1000.h	/^#define FLOW_CONTROL_ADDRESS_HIGH /;"	d
FLOW_CONTROL_ADDRESS_LOW	drivers/net/e1000.h	/^#define FLOW_CONTROL_ADDRESS_LOW /;"	d
FLOW_CONTROL_TYPE	drivers/net/e1000.h	/^#define FLOW_CONTROL_TYPE	/;"	d
FLOW_CTLR_HALT_COP_EVENTS	arch/arm/include/asm/arch-tegra/ap.h	/^#define FLOW_CTLR_HALT_COP_EVENTS	/;"	d
FLOW_CTLR_HALT_COP_EVENTS	arch/arm/mach-tegra/cpu.h	/^#define FLOW_CTLR_HALT_COP_EVENTS	/;"	d
FLOW_CTRL_CPU1_CSR	arch/arm/mach-tegra/psci.S	/^#define FLOW_CTRL_CPU1_CSR	/;"	d	file:
FLOW_CTRL_CPU_CSR	arch/arm/mach-tegra/psci.S	/^#define FLOW_CTRL_CPU_CSR	/;"	d	file:
FLOW_CTRL_EN	include/mv88e6352.h	/^#define FLOW_CTRL_EN	/;"	d
FLOW_CTRL_FOR	include/mv88e6352.h	/^#define FLOW_CTRL_FOR	/;"	d
FLOW_CTRL_RX	include/linux/mii.h	/^#define FLOW_CTRL_RX	/;"	d
FLOW_CTRL_TX	include/linux/mii.h	/^#define FLOW_CTRL_TX	/;"	d
FLOW_DSCA	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_DSCA	/;"	d
FLOW_DSCL	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_DSCL	/;"	d
FLOW_DSDA	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_DSDA	/;"	d
FLOW_DSDL	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_DSDL	/;"	d
FLOW_FCBSY	drivers/net/smc911x.h	/^#define FLOW_FCBSY	/;"	d
FLOW_FCEN	drivers/net/smc911x.h	/^#define FLOW_FCEN	/;"	d
FLOW_FCPASS	drivers/net/smc911x.h	/^#define FLOW_FCPASS	/;"	d
FLOW_FCPT	drivers/net/smc911x.h	/^#define FLOW_FCPT	/;"	d
FLOW_LARGE	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define FLOW_LARGE	/;"	d
FLOW_MODE_NONE	arch/arm/mach-tegra/cpu.h	/^#define FLOW_MODE_NONE	/;"	d
FLOW_MODE_STOP	arch/arm/include/asm/arch-tegra/ap.h	/^#define FLOW_MODE_STOP	/;"	d
FLOW_MODE_STOP	arch/arm/mach-tegra/cpu.h	/^#define FLOW_MODE_STOP	/;"	d
FLOW_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_P	/;"	d
FLOW_SMALL	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define FLOW_SMALL	/;"	d
FLOW_STOP	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define FLOW_STOP	/;"	d
FLOW_STOP	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define FLOW_STOP	/;"	d
FLREG_BASE	tools/ifdtool.c	/^#define FLREG_BASE(/;"	d	file:
FLREG_LIMIT	tools/ifdtool.c	/^#define FLREG_LIMIT(/;"	d	file:
FLS1	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS1	/;"	d
FLS1_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS1_P	/;"	d
FLS2	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS2	/;"	d
FLS2_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS2_P	/;"	d
FLS3	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS3	/;"	d
FLS3_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS3_P	/;"	d
FLS4	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS4	/;"	d
FLS4_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS4_P	/;"	d
FLS5	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS5	/;"	d
FLS5_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS5_P	/;"	d
FLS6	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS6	/;"	d
FLS6_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS6_P	/;"	d
FLS7	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS7	/;"	d
FLS7_P	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define FLS7_P	/;"	d
FLTRCR	arch/sh/include/asm/cpu_sh7722.h	/^#define FLTRCR /;"	d
FLTRCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FLTRCR	/;"	d
FLUSHFIFO	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FLUSHFIFO	/;"	d
FLUSHFIFO_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FLUSHFIFO_R	/;"	d
FLUSHFIFO_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FLUSHFIFO_T	/;"	d
FLUSHTXFIFO	drivers/net/designware.h	/^#define FLUSHTXFIFO	/;"	d
FLUSH_BLOCK	lib/zlib/deflate.c	/^#define FLUSH_BLOCK(/;"	d	file:
FLUSH_BLOCK_ONLY	lib/zlib/deflate.c	/^#define FLUSH_BLOCK_ONLY(/;"	d	file:
FLUT	arch/sh/include/asm/cpu_sh7722.h	/^#define FLUT /;"	d
FLYCNFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	FLYCNFG	/;"	d
FLYCNFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FLYCNFG	/;"	d
FLYCNFG_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FLYCNFG_OFFSET	/;"	d
FL_CACHEDPRG	include/linux/mtd/flashchip.h	/^	FL_CACHEDPRG,$/;"	e	enum:__anonf09221130103
FL_CFI_QUERY	include/linux/mtd/flashchip.h	/^	FL_CFI_QUERY,$/;"	e	enum:__anonf09221130103
FL_ERASE_SUSPENDED	include/linux/mtd/flashchip.h	/^	FL_ERASE_SUSPENDED,$/;"	e	enum:__anonf09221130103
FL_ERASE_SUSPENDING	include/linux/mtd/flashchip.h	/^	FL_ERASE_SUSPENDING,$/;"	e	enum:__anonf09221130103
FL_ERASING	include/linux/mtd/flashchip.h	/^	FL_ERASING,$/;"	e	enum:__anonf09221130103
FL_JEDEC_QUERY	include/linux/mtd/flashchip.h	/^	FL_JEDEC_QUERY,$/;"	e	enum:__anonf09221130103
FL_LOCKING	include/linux/mtd/flashchip.h	/^	FL_LOCKING,$/;"	e	enum:__anonf09221130103
FL_OTPING	include/linux/mtd/flashchip.h	/^	FL_OTPING,$/;"	e	enum:__anonf09221130103
FL_OTP_WRITE	include/linux/mtd/flashchip.h	/^	FL_OTP_WRITE,$/;"	e	enum:__anonf09221130103
FL_PM_SUSPENDED	include/linux/mtd/flashchip.h	/^	FL_PM_SUSPENDED,$/;"	e	enum:__anonf09221130103
FL_POINT	include/linux/mtd/flashchip.h	/^	FL_POINT,$/;"	e	enum:__anonf09221130103
FL_PREPARING_ERASE	include/linux/mtd/flashchip.h	/^	FL_PREPARING_ERASE,$/;"	e	enum:__anonf09221130103
FL_READING	include/linux/mtd/flashchip.h	/^	FL_READING,$/;"	e	enum:__anonf09221130103
FL_READY	include/linux/mtd/flashchip.h	/^	FL_READY,$/;"	e	enum:__anonf09221130103
FL_RESETING	include/linux/mtd/flashchip.h	/^	FL_RESETING,$/;"	e	enum:__anonf09221130103
FL_SHUTDOWN	include/linux/mtd/flashchip.h	/^	FL_SHUTDOWN,$/;"	e	enum:__anonf09221130103
FL_STATUS	include/linux/mtd/flashchip.h	/^	FL_STATUS,$/;"	e	enum:__anonf09221130103
FL_SYNCING	include/linux/mtd/flashchip.h	/^	FL_SYNCING,$/;"	e	enum:__anonf09221130103
FL_UNKNOWN	include/linux/mtd/flashchip.h	/^	FL_UNKNOWN$/;"	e	enum:__anonf09221130103
FL_UNLOADING	include/linux/mtd/flashchip.h	/^	FL_UNLOADING,$/;"	e	enum:__anonf09221130103
FL_UNLOCKING	include/linux/mtd/flashchip.h	/^	FL_UNLOCKING,$/;"	e	enum:__anonf09221130103
FL_VERIFYING_ERASE	include/linux/mtd/flashchip.h	/^	FL_VERIFYING_ERASE,$/;"	e	enum:__anonf09221130103
FL_WRITE_SUSPENDED	include/linux/mtd/flashchip.h	/^	FL_WRITE_SUSPENDED,$/;"	e	enum:__anonf09221130103
FL_WRITE_SUSPENDING	include/linux/mtd/flashchip.h	/^	FL_WRITE_SUSPENDING,$/;"	e	enum:__anonf09221130103
FL_WRITING	include/linux/mtd/flashchip.h	/^	FL_WRITING,$/;"	e	enum:__anonf09221130103
FL_WRITING_TO_BUFFER	include/linux/mtd/flashchip.h	/^	FL_WRITING_TO_BUFFER,$/;"	e	enum:__anonf09221130103
FL_XIP_WHILE_ERASING	include/linux/mtd/flashchip.h	/^	FL_XIP_WHILE_ERASING,$/;"	e	enum:__anonf09221130103
FL_XIP_WHILE_WRITING	include/linux/mtd/flashchip.h	/^	FL_XIP_WHILE_WRITING,$/;"	e	enum:__anonf09221130103
FM	include/sym53c8xx.h	/^	#define   FM /;"	d
FM1_10GEC1	include/fm_eth.h	/^	FM1_10GEC1,$/;"	e	enum:fm_port
FM1_10GEC1_PHY_ADDR	include/configs/T102xRDB.h	/^#define FM1_10GEC1_PHY_ADDR	/;"	d
FM1_10GEC1_PHY_ADDR	include/configs/T208xQDS.h	/^#define FM1_10GEC1_PHY_ADDR	/;"	d
FM1_10GEC1_PHY_ADDR	include/configs/T4240QDS.h	/^#define FM1_10GEC1_PHY_ADDR	/;"	d
FM1_10GEC1_PHY_ADDR	include/configs/T4240RDB.h	/^#define FM1_10GEC1_PHY_ADDR	/;"	d
FM1_10GEC1_PHY_ADDR	include/configs/ls1043ardb.h	/^#define FM1_10GEC1_PHY_ADDR	/;"	d
FM1_10GEC1_PHY_ADDR	include/configs/ls1046ardb.h	/^#define FM1_10GEC1_PHY_ADDR	/;"	d
FM1_10GEC2	include/fm_eth.h	/^	FM1_10GEC2,$/;"	e	enum:fm_port
FM1_10GEC2_PHY_ADDR	include/configs/T4240QDS.h	/^#define FM1_10GEC2_PHY_ADDR	/;"	d
FM1_10GEC2_PHY_ADDR	include/configs/T4240RDB.h	/^#define FM1_10GEC2_PHY_ADDR	/;"	d
FM1_10GEC3	include/fm_eth.h	/^	FM1_10GEC3,$/;"	e	enum:fm_port
FM1_10GEC3_PHY_ADDR	include/configs/T208xRDB.h	/^#define FM1_10GEC3_PHY_ADDR	/;"	d
FM1_10GEC4	include/fm_eth.h	/^	FM1_10GEC4,$/;"	e	enum:fm_port
FM1_10GEC4_PHY_ADDR	include/configs/T208xRDB.h	/^#define FM1_10GEC4_PHY_ADDR	/;"	d
FM1_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define FM1_CLK_SEL	/;"	d	file:
FM1_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define FM1_CLK_SHIFT	/;"	d	file:
FM1_DTSEC1	include/fm_eth.h	/^	FM1_DTSEC1,$/;"	e	enum:fm_port
FM1_DTSEC10	include/fm_eth.h	/^	FM1_DTSEC10,$/;"	e	enum:fm_port
FM1_DTSEC2	include/fm_eth.h	/^	FM1_DTSEC2,$/;"	e	enum:fm_port
FM1_DTSEC3	include/fm_eth.h	/^	FM1_DTSEC3,$/;"	e	enum:fm_port
FM1_DTSEC4	include/fm_eth.h	/^	FM1_DTSEC4,$/;"	e	enum:fm_port
FM1_DTSEC5	include/fm_eth.h	/^	FM1_DTSEC5,$/;"	e	enum:fm_port
FM1_DTSEC6	include/fm_eth.h	/^	FM1_DTSEC6,$/;"	e	enum:fm_port
FM1_DTSEC9	include/fm_eth.h	/^	FM1_DTSEC9,$/;"	e	enum:fm_port
FM2_10GEC1	include/fm_eth.h	/^	FM2_10GEC1,$/;"	e	enum:fm_port
FM2_10GEC1_PHY_ADDR	include/configs/T4240QDS.h	/^#define FM2_10GEC1_PHY_ADDR	/;"	d
FM2_10GEC1_PHY_ADDR	include/configs/T4240RDB.h	/^#define FM2_10GEC1_PHY_ADDR	/;"	d
FM2_10GEC2	include/fm_eth.h	/^	FM2_10GEC2,$/;"	e	enum:fm_port
FM2_10GEC2_PHY_ADDR	include/configs/T4240QDS.h	/^#define FM2_10GEC2_PHY_ADDR	/;"	d
FM2_10GEC2_PHY_ADDR	include/configs/T4240RDB.h	/^#define FM2_10GEC2_PHY_ADDR	/;"	d
FM2_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define FM2_CLK_SEL	/;"	d	file:
FM2_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define FM2_CLK_SHIFT	/;"	d	file:
FM2_DTSEC1	include/fm_eth.h	/^	FM2_DTSEC1,$/;"	e	enum:fm_port
FM2_DTSEC10	include/fm_eth.h	/^	FM2_DTSEC10,$/;"	e	enum:fm_port
FM2_DTSEC2	include/fm_eth.h	/^	FM2_DTSEC2,$/;"	e	enum:fm_port
FM2_DTSEC3	include/fm_eth.h	/^	FM2_DTSEC3,$/;"	e	enum:fm_port
FM2_DTSEC4	include/fm_eth.h	/^	FM2_DTSEC4,$/;"	e	enum:fm_port
FM2_DTSEC5	include/fm_eth.h	/^	FM2_DTSEC5,$/;"	e	enum:fm_port
FM2_DTSEC6	include/fm_eth.h	/^	FM2_DTSEC6,$/;"	e	enum:fm_port
FM2_DTSEC9	include/fm_eth.h	/^	FM2_DTSEC9,$/;"	e	enum:fm_port
FMAP_COMPRESS_LZO	include/fdtdec.h	/^	FMAP_COMPRESS_LZO,$/;"	e	enum:fmap_compress_t
FMAP_COMPRESS_NONE	include/fdtdec.h	/^	FMAP_COMPRESS_NONE,$/;"	e	enum:fmap_compress_t
FMAP_HASH_NONE	include/fdtdec.h	/^	FMAP_HASH_NONE,$/;"	e	enum:fmap_hash_t
FMAP_HASH_SHA1	include/fdtdec.h	/^	FMAP_HASH_SHA1,$/;"	e	enum:fmap_hash_t
FMAP_HASH_SHA256	include/fdtdec.h	/^	FMAP_HASH_SHA256,$/;"	e	enum:fmap_hash_t
FMBM_CFG1_FBPO_MASK	include/fsl_fman.h	/^#define FMBM_CFG1_FBPO_MASK	/;"	d
FMBM_CFG1_FBPS_MASK	include/fsl_fman.h	/^#define FMBM_CFG1_FBPS_MASK	/;"	d
FMBM_CFG1_FBPS_SHIFT	include/fsl_fman.h	/^#define FMBM_CFG1_FBPS_SHIFT	/;"	d
FMBM_IER_DISABLE_ALL	include/fsl_fman.h	/^#define FMBM_IER_DISABLE_ALL	/;"	d
FMBM_IER_LECE	include/fsl_fman.h	/^#define FMBM_IER_LECE	/;"	d
FMBM_IER_PECE	include/fsl_fman.h	/^#define FMBM_IER_PECE	/;"	d
FMBM_IER_SECE	include/fsl_fman.h	/^#define FMBM_IER_SECE	/;"	d
FMBM_IEVR_CLEAR_ALL	include/fsl_fman.h	/^#define FMBM_IEVR_CLEAR_ALL	/;"	d
FMBM_IEVR_LEC	include/fsl_fman.h	/^#define FMBM_IEVR_LEC	/;"	d
FMBM_IEVR_PEC	include/fsl_fman.h	/^#define FMBM_IEVR_PEC	/;"	d
FMBM_IEVR_SEC	include/fsl_fman.h	/^#define FMBM_IEVR_SEC	/;"	d
FMBM_INIT_START	include/fsl_fman.h	/^#define FMBM_INIT_START	/;"	d
FMBM_PFS_IFSZ	include/fsl_fman.h	/^#define FMBM_PFS_IFSZ(/;"	d
FMBM_PFS_IFSZ_MASK	include/fsl_fman.h	/^#define FMBM_PFS_IFSZ_MASK	/;"	d
FMBM_PP_MXD	include/fsl_fman.h	/^#define FMBM_PP_MXD(/;"	d
FMBM_PP_MXD_MASK	include/fsl_fman.h	/^#define FMBM_PP_MXD_MASK	/;"	d
FMBM_PP_MXT	include/fsl_fman.h	/^#define FMBM_PP_MXT(/;"	d
FMBM_PP_MXT_MASK	include/fsl_fman.h	/^#define FMBM_PP_MXT_MASK	/;"	d
FMBM_RCFG_EN	include/fsl_fman.h	/^#define FMBM_RCFG_EN	/;"	d
FMBM_RCFG_FDOVR	include/fsl_fman.h	/^#define FMBM_RCFG_FDOVR	/;"	d
FMBM_RCFG_IM	include/fsl_fman.h	/^#define FMBM_RCFG_IM	/;"	d
FMBM_RFCA_MR	include/fsl_fman.h	/^#define FMBM_RFCA_MR(/;"	d
FMBM_RFCA_MR_MASK	include/fsl_fman.h	/^#define FMBM_RFCA_MR_MASK	/;"	d
FMBM_RFCA_ORDER	include/fsl_fman.h	/^#define FMBM_RFCA_ORDER	/;"	d
FMBM_RSTC_EN	include/fsl_fman.h	/^#define FMBM_RSTC_EN	/;"	d
FMBM_RST_BSY	include/fsl_fman.h	/^#define FMBM_RST_BSY	/;"	d
FMBM_TCFG_EN	include/fsl_fman.h	/^#define FMBM_TCFG_EN	/;"	d
FMBM_TCFG_IM	include/fsl_fman.h	/^#define FMBM_TCFG_IM	/;"	d
FMBM_TFCA_MR	include/fsl_fman.h	/^#define FMBM_TFCA_MR(/;"	d
FMBM_TFCA_MR_MASK	include/fsl_fman.h	/^#define FMBM_TFCA_MR_MASK	/;"	d
FMBM_TFCA_ORDER	include/fsl_fman.h	/^#define FMBM_TFCA_ORDER	/;"	d
FMBM_TSTC_EN	include/fsl_fman.h	/^#define FMBM_TSTC_EN	/;"	d
FMBM_TST_BSY	include/fsl_fman.h	/^#define FMBM_TST_BSY	/;"	d
FMCLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FMCLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
FMCLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
FMCLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FMCLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
FMCLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FMCLK_C_MARK, RDS_CLK_MARK,$/;"	e	enum:__anona307901d0103	file:
FMCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,$/;"	e	enum:__anona3077f190103	file:
FMCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define FMCR /;"	d
FMC_BUSY_WAIT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_BUSY_WAIT(/;"	d
FMC_BUSY_WAIT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_BUSY_WAIT(/;"	d
FMC_FCR_MCU_EN	drivers/usb/eth/r8152.h	/^#define FMC_FCR_MCU_EN	/;"	d
FMC_SDCMR_BANK_1	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_BANK_1	/;"	d
FMC_SDCMR_BANK_1	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_BANK_1	/;"	d
FMC_SDCMR_BANK_2	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_BANK_2	/;"	d
FMC_SDCMR_BANK_2	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_BANK_2	/;"	d
FMC_SDCMR_MODE_AUTOREFRESH	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_AUTOREFRESH	/;"	d
FMC_SDCMR_MODE_AUTOREFRESH	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_AUTOREFRESH	/;"	d
FMC_SDCMR_MODE_NORMAL	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_NORMAL	/;"	d
FMC_SDCMR_MODE_NORMAL	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_NORMAL	/;"	d
FMC_SDCMR_MODE_POWERDOWN	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_POWERDOWN	/;"	d
FMC_SDCMR_MODE_POWERDOWN	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_POWERDOWN	/;"	d
FMC_SDCMR_MODE_PRECHARGE	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_PRECHARGE	/;"	d
FMC_SDCMR_MODE_PRECHARGE	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_PRECHARGE	/;"	d
FMC_SDCMR_MODE_REGISTER_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_REGISTER_SHIFT	/;"	d
FMC_SDCMR_MODE_REGISTER_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_REGISTER_SHIFT	/;"	d
FMC_SDCMR_MODE_SELFREFRESH	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_SELFREFRESH	/;"	d
FMC_SDCMR_MODE_SELFREFRESH	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_SELFREFRESH	/;"	d
FMC_SDCMR_MODE_START_CLOCK	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_START_CLOCK	/;"	d
FMC_SDCMR_MODE_START_CLOCK	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_START_CLOCK	/;"	d
FMC_SDCMR_MODE_WRITE_MODE	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_MODE_WRITE_MODE	/;"	d
FMC_SDCMR_MODE_WRITE_MODE	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_MODE_WRITE_MODE	/;"	d
FMC_SDCMR_NRFS_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCMR_NRFS_SHIFT	/;"	d
FMC_SDCMR_NRFS_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCMR_NRFS_SHIFT	/;"	d
FMC_SDCR_CAS_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_CAS_SHIFT	/;"	d
FMC_SDCR_CAS_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_CAS_SHIFT	/;"	d
FMC_SDCR_MWID_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_MWID_SHIFT	/;"	d
FMC_SDCR_MWID_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_MWID_SHIFT	/;"	d
FMC_SDCR_NB_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_NB_SHIFT	/;"	d
FMC_SDCR_NB_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_NB_SHIFT	/;"	d
FMC_SDCR_NC_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_NC_SHIFT	/;"	d
FMC_SDCR_NC_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_NC_SHIFT	/;"	d
FMC_SDCR_NR_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_NR_SHIFT	/;"	d
FMC_SDCR_NR_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_NR_SHIFT	/;"	d
FMC_SDCR_RBURST_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_RBURST_SHIFT	/;"	d
FMC_SDCR_RBURST_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_RBURST_SHIFT	/;"	d
FMC_SDCR_RPIPE_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_RPIPE_SHIFT	/;"	d
FMC_SDCR_RPIPE_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_RPIPE_SHIFT	/;"	d
FMC_SDCR_SDCLK_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_SDCLK_SHIFT	/;"	d
FMC_SDCR_SDCLK_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_SDCLK_SHIFT	/;"	d
FMC_SDCR_WP_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDCR_WP_SHIFT	/;"	d
FMC_SDCR_WP_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDCR_WP_SHIFT	/;"	d
FMC_SDSR_BUSY	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDSR_BUSY	/;"	d
FMC_SDSR_BUSY	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDSR_BUSY	/;"	d
FMC_SDTR_TMRD_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TMRD_SHIFT	/;"	d
FMC_SDTR_TMRD_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TMRD_SHIFT	/;"	d
FMC_SDTR_TRAS_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TRAS_SHIFT	/;"	d
FMC_SDTR_TRAS_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TRAS_SHIFT	/;"	d
FMC_SDTR_TRCD_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TRCD_SHIFT	/;"	d
FMC_SDTR_TRCD_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TRCD_SHIFT	/;"	d
FMC_SDTR_TRC_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TRC_SHIFT	/;"	d
FMC_SDTR_TRC_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TRC_SHIFT	/;"	d
FMC_SDTR_TRP_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TRP_SHIFT	/;"	d
FMC_SDTR_TRP_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TRP_SHIFT	/;"	d
FMC_SDTR_TWR_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TWR_SHIFT	/;"	d
FMC_SDTR_TWR_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TWR_SHIFT	/;"	d
FMC_SDTR_TXSR_SHIFT	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define FMC_SDTR_TXSR_SHIFT	/;"	d
FMC_SDTR_TXSR_SHIFT	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define FMC_SDTR_TXSR_SHIFT	/;"	d
FMDMMR_SBER	include/fsl_fman.h	/^#define FMDMMR_SBER	/;"	d
FMDMSR_BER	include/fsl_fman.h	/^#define FMDMSR_BER	/;"	d
FMDMSR_CLEAR_ALL	include/fsl_fman.h	/^#define FMDMSR_CLEAR_ALL	/;"	d
FMDMSR_CMDQNE	include/fsl_fman.h	/^#define FMDMSR_CMDQNE	/;"	d
FMDMSR_DPDAT_FECC	include/fsl_fman.h	/^#define FMDMSR_DPDAT_FECC	/;"	d
FMDMSR_DPDAT_SECC	include/fsl_fman.h	/^#define FMDMSR_DPDAT_SECC	/;"	d
FMDMSR_DPEXT_FECC	include/fsl_fman.h	/^#define FMDMSR_DPEXT_FECC	/;"	d
FMDMSR_DPEXT_SECC	include/fsl_fman.h	/^#define FMDMSR_DPEXT_SECC	/;"	d
FMDMSR_RDB_ECC	include/fsl_fman.h	/^#define FMDMSR_RDB_ECC	/;"	d
FMDMSR_SPDAT_FECC	include/fsl_fman.h	/^#define FMDMSR_SPDAT_FECC	/;"	d
FMDMSR_WRB_FECC	include/fsl_fman.h	/^#define FMDMSR_WRB_FECC	/;"	d
FMDMSR_WRB_SECC	include/fsl_fman.h	/^#define FMDMSR_WRB_SECC	/;"	d
FMFPEE_CER	include/fsl_fman.h	/^#define FMFPEE_CER	/;"	d
FMFPEE_CLEAR_EVENT	include/fsl_fman.h	/^#define FMFPEE_CLEAR_EVENT	/;"	d
FMFPEE_DECC	include/fsl_fman.h	/^#define FMFPEE_DECC	/;"	d
FMFPEE_DECC_EN	include/fsl_fman.h	/^#define FMFPEE_DECC_EN	/;"	d
FMFPEE_DER	include/fsl_fman.h	/^#define FMFPEE_DER	/;"	d
FMFPEE_EHM	include/fsl_fman.h	/^#define FMFPEE_EHM	/;"	d
FMFPEE_RFM	include/fsl_fman.h	/^#define FMFPEE_RFM	/;"	d
FMFPEE_SECC	include/fsl_fman.h	/^#define FMFPEE_SECC	/;"	d
FMFPEE_SECC_EN	include/fsl_fman.h	/^#define FMFPEE_SECC_EN	/;"	d
FMFPEE_STL	include/fsl_fman.h	/^#define FMFPEE_STL	/;"	d
FMFPEE_STL_EN	include/fsl_fman.h	/^#define FMFPEE_STL_EN	/;"	d
FMFPEE_UEC	include/fsl_fman.h	/^#define FMFPEE_UEC	/;"	d
FMFPPRC_ORA_SHIFT	include/fsl_fman.h	/^#define FMFPPRC_ORA_SHIFT	/;"	d
FMFPPRC_PORTID_MASK	include/fsl_fman.h	/^#define FMFPPRC_PORTID_MASK	/;"	d
FMFPPRC_PORTID_SHIFT	include/fsl_fman.h	/^#define FMFPPRC_PORTID_SHIFT	/;"	d
FMFPPRC_RISC1	include/fsl_fman.h	/^#define FMFPPRC_RISC1	/;"	d
FMFPPRC_RISC2	include/fsl_fman.h	/^#define FMFPPRC_RISC2	/;"	d
FMFPPRC_RISC_ALL	include/fsl_fman.h	/^#define FMFPPRC_RISC_ALL	/;"	d
FMFP_FLC_DISP_LIM_NONE	include/fsl_fman.h	/^#define FMFP_FLC_DISP_LIM_NONE	/;"	d
FMFP_RCR_IDEC	include/fsl_fman.h	/^#define FMFP_RCR_IDEC	/;"	d
FMFP_RCR_MDEC	include/fsl_fman.h	/^#define FMFP_RCR_MDEC	/;"	d
FMIN_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,$/;"	e	enum:__anona3077f190103	file:
FMIN_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FMIN_B_MARK,$/;"	e	enum:__anona307945e0103	file:
FMIN_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,$/;"	e	enum:__anona3077f190103	file:
FMIN_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
FMIN_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,$/;"	e	enum:__anona3077f190103	file:
FMIN_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIFA2_RXD_MARK, FMIN_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
FMIN_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,$/;"	e	enum:__anona3077f190103	file:
FMIN_G_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,$/;"	e	enum:__anona3077f190103	file:
FMIN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,$/;"	e	enum:__anona3077f190103	file:
FMPLL_SYNSR_LOCK	arch/m68k/include/asm/m5275.h	/^#define FMPLL_SYNSR_LOCK	/;"	d
FMQM_EIEN_DEEN	include/fsl_fman.h	/^#define FMQM_EIEN_DEEN	/;"	d
FMQM_EIEN_DFUPEN	include/fsl_fman.h	/^#define FMQM_EIEN_DFUPEN	/;"	d
FMQM_EIEN_DISABLE_ALL	include/fsl_fman.h	/^#define FMQM_EIEN_DISABLE_ALL	/;"	d
FMQM_EIE_CLEAR_ALL	include/fsl_fman.h	/^#define FMQM_EIE_CLEAR_ALL	/;"	d
FMQM_EIE_DEE	include/fsl_fman.h	/^#define FMQM_EIE_DEE	/;"	d
FMQM_EIE_DFUPE	include/fsl_fman.h	/^#define FMQM_EIE_DFUPE	/;"	d
FMQM_GC_DEQ	include/fsl_fman.h	/^#define FMQM_GC_DEQ(/;"	d
FMQM_GC_DEQ_EN	include/fsl_fman.h	/^#define FMQM_GC_DEQ_EN	/;"	d
FMQM_GC_DEQ_THR_MASK	include/fsl_fman.h	/^#define FMQM_GC_DEQ_THR_MASK	/;"	d
FMQM_GC_ENQ	include/fsl_fman.h	/^#define FMQM_GC_ENQ(/;"	d
FMQM_GC_ENQ_EN	include/fsl_fman.h	/^#define FMQM_GC_ENQ_EN	/;"	d
FMQM_GC_ENQ_THR_MASK	include/fsl_fman.h	/^#define FMQM_GC_ENQ_THR_MASK	/;"	d
FMQM_GC_STEN	include/fsl_fman.h	/^#define FMQM_GC_STEN	/;"	d
FMQM_IEN_DISABLE_ALL	include/fsl_fman.h	/^#define FMQM_IEN_DISABLE_ALL	/;"	d
FMQM_IEN_SEE	include/fsl_fman.h	/^#define FMQM_IEN_SEE	/;"	d
FMQM_IE_CLEAR_ALL	include/fsl_fman.h	/^#define FMQM_IE_CLEAR_ALL	/;"	d
FMQM_IE_SEE	include/fsl_fman.h	/^#define FMQM_IE_SEE	/;"	d
FMR_AL	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_AL /;"	d
FMR_AL_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_AL_SHIFT /;"	d
FMR_BOOT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_BOOT /;"	d
FMR_CWTO	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_CWTO /;"	d
FMR_CWTO_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_CWTO_SHIFT /;"	d
FMR_ECCM	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_ECCM /;"	d
FMR_OP	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_OP /;"	d
FMR_OP_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FMR_OP_SHIFT /;"	d
FMSICK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSICK_MARK,	FMSOILR_MARK,	FMSOIBT_MARK,	FMSOOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSIIBT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSIILR_MARK,	FMSIIBT_MARK,	FMSIOLR_MARK,	FMSIOBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSIILR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSIILR_MARK,	FMSIIBT_MARK,	FMSIOLR_MARK,	FMSIOBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSIOBT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSIILR_MARK,	FMSIIBT_MARK,	FMSIOLR_MARK,	FMSIOBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSIOLR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSIILR_MARK,	FMSIIBT_MARK,	FMSIOLR_MARK,	FMSIOBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSISLD_PORT1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSISLD_PORT1_MARK, \/* FMSISLD Port 1\/6 *\/$/;"	e	enum:__anona304c1340103	file:
FMSISLD_PORT6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSISLD_PORT6_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSOCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSOOBT_MARK,	FMSOSLD_MARK,	FMSOCK_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSOIBT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSICK_MARK,	FMSOILR_MARK,	FMSOIBT_MARK,	FMSOOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSOILR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSICK_MARK,	FMSOILR_MARK,	FMSOIBT_MARK,	FMSOOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSOOBT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSOOBT_MARK,	FMSOSLD_MARK,	FMSOCK_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSOOLR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSICK_MARK,	FMSOILR_MARK,	FMSOIBT_MARK,	FMSOOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FMSOSLD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FMSOOBT_MARK,	FMSOSLD_MARK,	FMSOCK_MARK,$/;"	e	enum:__anona304c1340103	file:
FM_DTSEC_INFO_INITIALIZER	include/fm_eth.h	/^#define FM_DTSEC_INFO_INITIALIZER(/;"	d
FM_ETH_10G_E	include/fm_eth.h	/^	FM_ETH_10G_E,$/;"	e	enum:fm_eth_type
FM_ETH_1G_E	include/fm_eth.h	/^	FM_ETH_1G_E,$/;"	e	enum:fm_eth_type
FM_ETH_INFO_INITIALIZER	include/fm_eth.h	/^#define FM_ETH_INFO_INITIALIZER(/;"	d
FM_FREE_POOL_ALIGN	drivers/net/fm/fm.h	/^#define FM_FREE_POOL_ALIGN	/;"	d
FM_FREE_POOL_SIZE	drivers/net/fm/fm.h	/^#define FM_FREE_POOL_SIZE	/;"	d
FM_MURAM_RES_SIZE	drivers/net/fm/fm.h	/^#define FM_MURAM_RES_SIZE	/;"	d
FM_PPID_RX_PORT_OFFSET	arch/powerpc/include/asm/fsl_liodn.h	/^#define FM_PPID_RX_PORT_OFFSET(/;"	d
FM_PRAM_ALIGN	drivers/net/fm/fm.h	/^#define FM_PRAM_ALIGN	/;"	d
FM_PRAM_SIZE	drivers/net/fm/fm.h	/^#define FM_PRAM_SIZE	/;"	d
FM_TGEC_INFO_INITIALIZER	include/fm_eth.h	/^#define FM_TGEC_INFO_INITIALIZER(/;"	d
FM_TGEC_INFO_INITIALIZER2	include/fm_eth.h	/^#define FM_TGEC_INFO_INITIALIZER2(/;"	d
FMsk	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define FMsk(/;"	d
FMsk	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define FMsk(/;"	d
FNLUPDTCTLCH0	arch/x86/cpu/quark/smc.h	/^#define FNLUPDTCTLCH0	/;"	d
FN_A0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A0, FN_A1, FN_A2, FN_A3,$/;"	e	enum:__anona307879b0103	file:
FN_A1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A0, FN_A1, FN_A2, FN_A3,$/;"	e	enum:__anona307879b0103	file:
FN_A10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A8, FN_A9, FN_A10, FN_A11,$/;"	e	enum:__anona307879b0103	file:
FN_A11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A8, FN_A9, FN_A10, FN_A11,$/;"	e	enum:__anona307879b0103	file:
FN_A12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A12, FN_A13, FN_A14, FN_A15,$/;"	e	enum:__anona307879b0103	file:
FN_A13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A12, FN_A13, FN_A14, FN_A15,$/;"	e	enum:__anona307879b0103	file:
FN_A14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A12, FN_A13, FN_A14, FN_A15,$/;"	e	enum:__anona307879b0103	file:
FN_A15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A12, FN_A13, FN_A14, FN_A15,$/;"	e	enum:__anona307879b0103	file:
FN_A16	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A16, FN_A17, FN_A18, FN_A19,$/;"	e	enum:__anona307879b0103	file:
FN_A17	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A16, FN_A17, FN_A18, FN_A19,$/;"	e	enum:__anona307879b0103	file:
FN_A18	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A16, FN_A17, FN_A18, FN_A19,$/;"	e	enum:__anona307879b0103	file:
FN_A19	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A16, FN_A17, FN_A18, FN_A19,$/;"	e	enum:__anona307879b0103	file:
FN_A2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A0, FN_A1, FN_A2, FN_A3,$/;"	e	enum:__anona307879b0103	file:
FN_A2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,$/;"	e	enum:__anona307901d0103	file:
FN_A20	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,$/;"	e	enum:__anona307879b0103	file:
FN_A20	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_A20,$/;"	e	enum:__anona307945e0103	file:
FN_A21	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,$/;"	e	enum:__anona307879b0103	file:
FN_A21	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_A21,$/;"	e	enum:__anona307945e0103	file:
FN_A22	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_A22	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_A22,$/;"	e	enum:__anona307945e0103	file:
FN_A23	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_A23	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_A23,$/;"	e	enum:__anona307945e0103	file:
FN_A24	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_A24	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_A24,$/;"	e	enum:__anona307945e0103	file:
FN_A25	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_A25	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_A25,$/;"	e	enum:__anona307945e0103	file:
FN_A3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A0, FN_A1, FN_A2, FN_A3,$/;"	e	enum:__anona307879b0103	file:
FN_A4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A4, FN_A5, FN_A6, FN_A7,$/;"	e	enum:__anona307879b0103	file:
FN_A5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A4, FN_A5, FN_A6, FN_A7,$/;"	e	enum:__anona307879b0103	file:
FN_A6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A4, FN_A5, FN_A6, FN_A7,$/;"	e	enum:__anona307879b0103	file:
FN_A7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A4, FN_A5, FN_A6, FN_A7,$/;"	e	enum:__anona307879b0103	file:
FN_A8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A8, FN_A9, FN_A10, FN_A11,$/;"	e	enum:__anona307879b0103	file:
FN_A9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A8, FN_A9, FN_A10, FN_A11,$/;"	e	enum:__anona307879b0103	file:
FN_ADICHS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,$/;"	e	enum:__anona307879b0103	file:
FN_ADICHS0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICHS0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N,$/;"	e	enum:__anona307901d0103	file:
FN_ADICHS0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_ADICHS0,$/;"	e	enum:__anona307945e0103	file:
FN_ADICHS0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICHS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,$/;"	e	enum:__anona307879b0103	file:
FN_ADICHS1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICHS1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_ADICHS1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_ADICHS1,$/;"	e	enum:__anona307945e0103	file:
FN_ADICHS1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICHS2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,$/;"	e	enum:__anona307879b0103	file:
FN_ADICHS2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICHS2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C,$/;"	e	enum:__anona307901d0103	file:
FN_ADICHS2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_ADICHS2,$/;"	e	enum:__anona307945e0103	file:
FN_ADICHS2_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADICHS2_B, FN_MSIOF0_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,$/;"	e	enum:__anona307879b0103	file:
FN_ADICLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,$/;"	e	enum:__anona307901d0103	file:
FN_ADICLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_ADICLK,$/;"	e	enum:__anona307945e0103	file:
FN_ADICLK_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADICLK_B, FN_MSIOF0_SS1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICLK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICLK_B, FN_AD_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_ADICS_SAMP	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,$/;"	e	enum:__anona307879b0103	file:
FN_ADICS_SAMP	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICS_SAMP	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_ADICS_SAMP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_ADICS_SAMP,$/;"	e	enum:__anona307945e0103	file:
FN_ADICS_SAMP_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,$/;"	e	enum:__anona307835a0103	file:
FN_ADICS_SAMP_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADICS_SAMP_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B,$/;"	e	enum:__anona307901d0103	file:
FN_ADIDATA	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,$/;"	e	enum:__anona307879b0103	file:
FN_ADIDATA	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADIDATA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADIDATA, FN_AD_DI,$/;"	e	enum:__anona307901d0103	file:
FN_ADIDATA	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_ADIDATA,$/;"	e	enum:__anona307945e0103	file:
FN_ADIDATA_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ADIDATA_B, FN_MSIOF0_SYNC_C,$/;"	e	enum:__anona307835a0103	file:
FN_ADIDATA_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADIDATA_B, FN_MSIOF0_SYNC_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ADIDATA_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B,$/;"	e	enum:__anona307901d0103	file:
FN_AD_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,$/;"	e	enum:__anona307901d0103	file:
FN_AD_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AD_CLK,$/;"	e	enum:__anona307945e0103	file:
FN_AD_CLK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICLK_B, FN_AD_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_AD_DI	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADIDATA, FN_AD_DI,$/;"	e	enum:__anona307901d0103	file:
FN_AD_DI	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AD_DI,$/;"	e	enum:__anona307945e0103	file:
FN_AD_DI_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_AD_DO	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_AD_DO	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AD_DO,$/;"	e	enum:__anona307945e0103	file:
FN_AD_DO_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B,$/;"	e	enum:__anona307901d0103	file:
FN_AD_NCS_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N,$/;"	e	enum:__anona307901d0103	file:
FN_AD_NSCx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AD_NSCx,$/;"	e	enum:__anona307945e0103	file:
FN_ATACS00_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,$/;"	e	enum:__anona3077f190103	file:
FN_ATACS10_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,$/;"	e	enum:__anona3077f190103	file:
FN_ATADIR0_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,$/;"	e	enum:__anona3077f190103	file:
FN_ATAG0_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,$/;"	e	enum:__anona3077f190103	file:
FN_ATARD0_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,$/;"	e	enum:__anona3077f190103	file:
FN_ATAWR0_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,$/;"	e	enum:__anona3077f190103	file:
FN_AUDIO_CLKA	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_AUDIO_CLKA	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,$/;"	e	enum:__anona307879b0103	file:
FN_AUDIO_CLKA	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_AUDIO_CLKA_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AUDIO_CLKA_B, FN_AVB_MDIO, FN_SSI_SCK78_B, FN_HSCIF0_HTX,$/;"	e	enum:__anona307901d0103	file:
FN_AUDIO_CLKA_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKA_B,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKA_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKA_C,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKA_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N,$/;"	e	enum:__anona307901d0103	file:
FN_AUDIO_CLKB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,$/;"	e	enum:__anona307879b0103	file:
FN_AUDIO_CLKB	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AUDIO_CLKB_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKB_A,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKB_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AUDIO_CLKB_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B,$/;"	e	enum:__anona307901d0103	file:
FN_AUDIO_CLKC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_AUDIO_CLKC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,$/;"	e	enum:__anona3078bdc0103	file:
FN_AUDIO_CLKC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKC_A,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKC_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B,$/;"	e	enum:__anona307901d0103	file:
FN_AUDIO_CLKC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKC_B,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,$/;"	e	enum:__anona307879b0103	file:
FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,$/;"	e	enum:__anona3078bdc0103	file:
FN_AUDIO_CLKOUT1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT1_A,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT1_B,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT2_A,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT2_B,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT3_A,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT3_B,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT_A,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_B, FN_I2C0_SDA_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN,$/;"	e	enum:__anona307901d0103	file:
FN_AUDIO_CLKOUT_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT_B,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_AUDIO_CLKOUT_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT_C,$/;"	e	enum:__anona307945e0103	file:
FN_AUDIO_CLKOUT_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AUDIO_CLKOUT_D,$/;"	e	enum:__anona307945e0103	file:
FN_AVB_AVTP_CAPTURE_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AVB_AVTP_CAPTURE_B,$/;"	e	enum:__anona307945e0103	file:
FN_AVB_AVTP_MATCH_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AVB_AVTP_MATCH_B,$/;"	e	enum:__anona307945e0103	file:
FN_AVB_AVTP_PPS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AVB_AVTP_PPS,$/;"	e	enum:__anona307945e0103	file:
FN_AVB_COL	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_COL	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_COL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_COL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_CRS	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_CRS	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_CRS	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_CRS	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_CRS	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_GTX_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_GTX_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_GTX_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_GTX_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_MAGIC, FN_SSI_SDATA7_B, FN_HSCIF0_HRTS_N, FN_VI0_R7,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA7, FN_AVB_MDC,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA7, FN_AVB_MDC,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_MDIO	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_MDIO	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_MDIO	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_MDIO	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_MDIO	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AUDIO_CLKA_B, FN_AVB_MDIO, FN_SSI_SCK78_B, FN_HSCIF0_HTX,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_D, FN_I2C0_SDA_E, FN_AVB_PHY_INT, FN_SSI_SDATA8_B,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RX_DV, FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, FN_VI0_DATA2_VI0_B2,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD1, FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD1, FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD3, FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, FN_VI0_DATA6_VI0_B6,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD3, FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, FN_VI0_DATA6_VI0_B6,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD5, FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, FN_VI0_CLKENB,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD5, FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, FN_VI0_CLKENB,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RXD7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RXD7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RXD7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RXD7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RXD7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RX_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RX_CLK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RX_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RX_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RX_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CC50_STATE31, FN_VI0_CLK, FN_AVB_RX_CLK, FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RX_DV	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RX_DV	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RX_DV	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RX_DV	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RX_DV	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RX_DV, FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, FN_VI0_DATA2_VI0_B2,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_RX_ER	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_RX_ER	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_RX_ER	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_RX_ER	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_RX_ER	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_FIELD, FN_AVB_TXD2,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TXD7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TXD7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TXD7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TXD7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF2_TXD_C, FN_IIC1_SDA_D, FN_AVB_TXD7, FN_SSI_SDATA5_B,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TX_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_TX_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TX_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TX_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TX_EN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_TX_EN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_AVB_TX_EN	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TX_EN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TX_EN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_B, FN_I2C0_SDA_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN,$/;"	e	enum:__anona307901d0103	file:
FN_AVB_TX_ER	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,$/;"	e	enum:__anona3077f190103	file:
FN_AVB_TX_ER	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,$/;"	e	enum:__anona307879b0103	file:
FN_AVB_TX_ER	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_AVB_TX_ER	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B,$/;"	e	enum:__anona307901d0103	file:
FN_AVS1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,$/;"	e	enum:__anona3077f190103	file:
FN_AVS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_AVS1, FN_AVS2,$/;"	e	enum:__anona307879b0103	file:
FN_AVS1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AVS1,$/;"	e	enum:__anona307945e0103	file:
FN_AVS2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,$/;"	e	enum:__anona3077f190103	file:
FN_AVS2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_AVS1, FN_AVS2,$/;"	e	enum:__anona307879b0103	file:
FN_AVS2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_AVS2,$/;"	e	enum:__anona307945e0103	file:
FN_BPFCLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_BPFCLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_BPFCLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_BPFCLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_BPFCLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_BPFCLK_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_BPFCLK_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_BPFCLK_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIF_CLK, FN_BPFCLK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_BPFCLK_G	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,$/;"	e	enum:__anona3077f190103	file:
FN_BS	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,$/;"	e	enum:__anona307879b0103	file:
FN_CAN0_RX	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,$/;"	e	enum:__anona307879b0103	file:
FN_CAN0_RX	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_CAN0_RX_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN0_RX_A,$/;"	e	enum:__anona307945e0103	file:
FN_CAN0_RX_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN0_RX_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,$/;"	e	enum:__anona307901d0103	file:
FN_CAN0_RX_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN0_RX_B,$/;"	e	enum:__anona307945e0103	file:
FN_CAN0_RX_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona307835a0103	file:
FN_CAN0_RX_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN0_RX_E	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona307835a0103	file:
FN_CAN0_RX_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN0_RX_F	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN0_TX	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,$/;"	e	enum:__anona307879b0103	file:
FN_CAN0_TX	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_CAN0_TX_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN0_TX_A,$/;"	e	enum:__anona307945e0103	file:
FN_CAN0_TX_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN0_TX_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N,$/;"	e	enum:__anona307901d0103	file:
FN_CAN0_TX_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN0_TX_B,$/;"	e	enum:__anona307945e0103	file:
FN_CAN0_TX_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,$/;"	e	enum:__anona307835a0103	file:
FN_CAN0_TX_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN0_TX_F	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_RX	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,$/;"	e	enum:__anona307879b0103	file:
FN_CAN1_RX	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B,$/;"	e	enum:__anona307901d0103	file:
FN_CAN1_RX	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN1_RX,$/;"	e	enum:__anona307945e0103	file:
FN_CAN1_RX_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_RX_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,$/;"	e	enum:__anona307835a0103	file:
FN_CAN1_RX_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_RX_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_D, FN_IERX, FN_CAN1_RX_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_RX_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0,$/;"	e	enum:__anona307901d0103	file:
FN_CAN1_TX	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,$/;"	e	enum:__anona307879b0103	file:
FN_CAN1_TX	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307901d0103	file:
FN_CAN1_TX	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN1_TX,$/;"	e	enum:__anona307945e0103	file:
FN_CAN1_TX_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_TX_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_CAN1_TX_C, FN_MSIOF1_TXD_E,$/;"	e	enum:__anona307835a0103	file:
FN_CAN1_TX_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_CAN1_TX_C, FN_MSIOF1_TXD_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_TX_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN1_TX_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_CANFD0_RX_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CANFD0_RX_A,$/;"	e	enum:__anona307945e0103	file:
FN_CANFD0_RX_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CANFD0_RX_B,$/;"	e	enum:__anona307945e0103	file:
FN_CANFD0_TX_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CANFD0_TX_A,$/;"	e	enum:__anona307945e0103	file:
FN_CANFD0_TX_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CANFD0_TX_B,$/;"	e	enum:__anona307945e0103	file:
FN_CANFD1_RX	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CANFD1_RX,$/;"	e	enum:__anona307945e0103	file:
FN_CANFD1_TX	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CANFD1_TX,$/;"	e	enum:__anona307945e0103	file:
FN_CAN_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,$/;"	e	enum:__anona307879b0103	file:
FN_CAN_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_CAN_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CAN_CLK,$/;"	e	enum:__anona307945e0103	file:
FN_CAN_CLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_CAN_CLK_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona307835a0103	file:
FN_CAN_CLK_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN_CLK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_CAN_CLK_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N,$/;"	e	enum:__anona307901d0103	file:
FN_CAN_DEBUGOUT11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT11, FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_CAN_DEBUGOUT12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DOTCLKOUT1, FN_CAN_DEBUGOUT12, FN_SSI_SCK6, FN_SCIFA1_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_CAN_DEBUGOUT13	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_EXHSYNC_DU1_HSYNC, FN_CAN_DEBUGOUT13, FN_SSI_WS6,$/;"	e	enum:__anona307901d0103	file:
FN_CAN_DEBUGOUT14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT14, FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_CAN_DEBUGOUT15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, FN_SSI_SCK78,$/;"	e	enum:__anona307901d0103	file:
FN_CC50_STATE28	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28,$/;"	e	enum:__anona307901d0103	file:
FN_CC50_STATE29	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29,$/;"	e	enum:__anona307901d0103	file:
FN_CC50_STATE30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB,$/;"	e	enum:__anona307901d0103	file:
FN_CC50_STATE31	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CC50_STATE31, FN_VI0_CLK, FN_AVB_RX_CLK, FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anona307901d0103	file:
FN_CC5_OSCOUT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CC5_OSCOUT,$/;"	e	enum:__anona307945e0103	file:
FN_CS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_CS1_A26	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_CTS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,$/;"	e	enum:__anona307879b0103	file:
FN_CTS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,$/;"	e	enum:__anona307879b0103	file:
FN_CTS3x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CTS3x,$/;"	e	enum:__anona307945e0103	file:
FN_CTS4x_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CTS4x_A,$/;"	e	enum:__anona307945e0103	file:
FN_CTS4x_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CTS4x_B,$/;"	e	enum:__anona307945e0103	file:
FN_CTS4x_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_CTS4x_C,$/;"	e	enum:__anona307945e0103	file:
FN_D0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D0, FN_D1, FN_D2, FN_D3,$/;"	e	enum:__anona307879b0103	file:
FN_D0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307901d0103	file:
FN_D1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D0, FN_D1, FN_D2, FN_D3,$/;"	e	enum:__anona307879b0103	file:
FN_D1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307901d0103	file:
FN_D10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D8, FN_D9, FN_D10, FN_D11,$/;"	e	enum:__anona307879b0103	file:
FN_D11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D8, FN_D9, FN_D10, FN_D11,$/;"	e	enum:__anona307879b0103	file:
FN_D12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D12, FN_D13, FN_D14, FN_D15,$/;"	e	enum:__anona307879b0103	file:
FN_D13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D12, FN_D13, FN_D14, FN_D15,$/;"	e	enum:__anona307879b0103	file:
FN_D14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D12, FN_D13, FN_D14, FN_D15,$/;"	e	enum:__anona307879b0103	file:
FN_D15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D12, FN_D13, FN_D14, FN_D15,$/;"	e	enum:__anona307879b0103	file:
FN_D2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D0, FN_D1, FN_D2, FN_D3,$/;"	e	enum:__anona307879b0103	file:
FN_D2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,$/;"	e	enum:__anona307901d0103	file:
FN_D3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D0, FN_D1, FN_D2, FN_D3,$/;"	e	enum:__anona307879b0103	file:
FN_D3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,$/;"	e	enum:__anona307901d0103	file:
FN_D4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D4, FN_D5, FN_D6, FN_D7,$/;"	e	enum:__anona307879b0103	file:
FN_D4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,$/;"	e	enum:__anona307901d0103	file:
FN_D5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D4, FN_D5, FN_D6, FN_D7,$/;"	e	enum:__anona307879b0103	file:
FN_D5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D,$/;"	e	enum:__anona307901d0103	file:
FN_D6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D4, FN_D5, FN_D6, FN_D7,$/;"	e	enum:__anona307879b0103	file:
FN_D7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D4, FN_D5, FN_D6, FN_D7,$/;"	e	enum:__anona307879b0103	file:
FN_D8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D8, FN_D9, FN_D10, FN_D11,$/;"	e	enum:__anona307879b0103	file:
FN_D9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_D8, FN_D9, FN_D10, FN_D11,$/;"	e	enum:__anona307879b0103	file:
FN_DACK0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,$/;"	e	enum:__anona3077f190103	file:
FN_DACK0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,$/;"	e	enum:__anona307879b0103	file:
FN_DACK0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0,$/;"	e	enum:__anona307901d0103	file:
FN_DACK1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,$/;"	e	enum:__anona3077f190103	file:
FN_DACK1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,$/;"	e	enum:__anona307879b0103	file:
FN_DACK2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3077f190103	file:
FN_DRACK0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,$/;"	e	enum:__anona307879b0103	file:
FN_DREQ0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,$/;"	e	enum:__anona307879b0103	file:
FN_DREQ0_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS6_B, FN_DREQ0_N, FN_SCIFB1_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_DREQ1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_TX3, FN_DREQ1, FN_RX3,$/;"	e	enum:__anona307879b0103	file:
FN_DREQ1_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,$/;"	e	enum:__anona3077f190103	file:
FN_DREQ2_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,$/;"	e	enum:__anona3077f190103	file:
FN_DU0_CDE	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_CDE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB,$/;"	e	enum:__anona307901d0103	file:
FN_DU0_DB0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB2_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB3_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB4_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB5_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB6_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DB7_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG0_DATA8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG1_DATA9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG2_C6_DATA10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG3_C7_DATA11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG4_Y0_DATA12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG5_Y1_DATA13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG6_Y2_DATA14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DG7_Y3_DATA15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DISP	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DIS/;"	e	enum:__anona307879b0103	file:
FN_DU0_DISP	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB,$/;"	e	enum:__anona307901d0103	file:
FN_DU0_DR0_DATA0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR1_DATA1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR2_Y4_DATA2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR3_Y5_DATA3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR4_Y6_DATA4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR5_Y7_DATA5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR6_Y8_DATA6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_DR7_Y9_DATA7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,$/;"	e	enum:__anona307879b0103	file:
FN_DU0_EXHSYNC_DU0_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DIS/;"	e	enum:__anona307879b0103	file:
FN_DU0_EXODDF_DU0_ODDF_DISP_CDE	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DIS/;"	e	enum:__anona307879b0103	file:
FN_DU0_EXODDF_DU0_ODDF_DISP_CDE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29,$/;"	e	enum:__anona307901d0103	file:
FN_DU0_EXVSYNC_DU0_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DIS/;"	e	enum:__anona307879b0103	file:
FN_DU0_EXVSYNC_DU0_VSYNC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_CDE	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_CDE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, FN_SSI_SDATA7,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DB2_C0_DATA12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DB3_C1_DATA13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DB4_C2_DATA14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DB5_C3_DATA15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DB6_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DB7_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DG2_C6_DATA6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DG3_C7_DATA7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DG4_Y0_DATA8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DG5_Y1_DATA9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DG6_Y2_DATA10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DG7_Y3_DATA11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DISP	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DISP	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, FN_SSI_WS78,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DOTCLKIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,$/;"	e	enum:__anona3077f190103	file:
FN_DU1_DOTCLKIN_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_DU1_DOTCLKOUT0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DOTCLKOUT1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DOTCLKOUT1, FN_CAN_DEBUGOUT12, FN_SSI_SCK6, FN_SCIFA1_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DR0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DR1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DR2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_DR2_Y4_DATA0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DR3_Y5_DATA1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DR4_Y6_DATA2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DR5_Y7_DATA3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DR6_DATA4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_DR7_DATA5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_EXHSYNC_DU1_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_EXHSYNC_DU1_HSYNC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_EXHSYNC_DU1_HSYNC, FN_CAN_DEBUGOUT13, FN_SSI_WS6,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_EXODDF_DU1_ODDF_DISP_CDE	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_EXODDF_DU1_ODDF_DISP_CDE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, FN_SSI_SCK78,$/;"	e	enum:__anona307901d0103	file:
FN_DU1_EXVSYNC_DU1_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_DU1_EXVSYNC_DU1_VSYNC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA1_RXD_B, FN_I2C4_SCL_C, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307901d0103	file:
FN_DU_CDE	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_CDE,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB0,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB1,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB2,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB3,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB4,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB5,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB6,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DB7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DB7,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG0,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG1,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG2,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG3,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG4,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG5,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG6,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DG7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DG7,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DISP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DISP,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DOTCLKIN0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,$/;"	e	enum:__anona3077f190103	file:
FN_DU_DOTCLKIN2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,$/;"	e	enum:__anona3077f190103	file:
FN_DU_DOTCLKOUT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DOTCLKOUT0,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DOTCLKOUT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DOTCLKOUT1,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR0,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR1,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR2,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR3,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR4,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR5,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR6,$/;"	e	enum:__anona307945e0103	file:
FN_DU_DR7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_DR7,$/;"	e	enum:__anona307945e0103	file:
FN_DU_EXHSYNC_DU_HSYNC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_EXHSYNC_DU_HSYNC,$/;"	e	enum:__anona307945e0103	file:
FN_DU_EXODDF_DU_ODDF_DISP_CDE	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_EXODDF_DU_ODDF_DISP_CDE,$/;"	e	enum:__anona307945e0103	file:
FN_DU_EXVSYNC_DU_VSYNC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DU_EXVSYNC_DU_VSYNC,$/;"	e	enum:__anona307945e0103	file:
FN_DVC_MUTE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_DVC_MUTE	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_DVC_MUTE,$/;"	e	enum:__anona307945e0103	file:
FN_EFUSE_READ	arch/arm/mach-meson/sm.c	/^#define FN_EFUSE_READ	/;"	d	file:
FN_EFUSE_WRITE	arch/arm/mach-meson/sm.c	/^#define FN_EFUSE_WRITE	/;"	d	file:
FN_EIF3_D1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_EIF3_D1_A,$/;"	e	enum:__anona307945e0103	file:
FN_ETH_CRS_DV	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_CRS_DV	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_CRS_DV	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_CRS_DV	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_LINK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_LINK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_LINK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_LINK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_MAGIC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_MAGIC	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_MAGIC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_MAGIC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_MDC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_MDC	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_MDC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_MDC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_MDIO	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_MDIO	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_MDIO	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_MDIO	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_REFCLK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_REFCLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_REFCLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_REF_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_RXD0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_RXD0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_RXD0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_RXD0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_RXD1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_RXD1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_RXD1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_RXD1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_RX_ER	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_RX_ER	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_RX_ER	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_RX_ER	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_TXD0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_TXD0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_TXD0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_TXD0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_TXD1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_TXD1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_TXD1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_TXD1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C,$/;"	e	enum:__anona307901d0103	file:
FN_ETH_TX_EN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_ETH_TX_EN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona307835a0103	file:
FN_ETH_TX_EN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_ETH_TX_EN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0,$/;"	e	enum:__anona307901d0103	file:
FN_EX_CS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_EX_CS0_N	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_EX_CS0_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_EX_CS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,$/;"	e	enum:__anona307879b0103	file:
FN_EX_CS2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,$/;"	e	enum:__anona307879b0103	file:
FN_EX_CS3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,$/;"	e	enum:__anona307879b0103	file:
FN_EX_CS4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,$/;"	e	enum:__anona307879b0103	file:
FN_EX_CS5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,$/;"	e	enum:__anona307879b0103	file:
FN_EX_WAIT0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,$/;"	e	enum:__anona307879b0103	file:
FN_EX_WAIT0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_EX_WAIT0_B,$/;"	e	enum:__anona307945e0103	file:
FN_EX_WAIT1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,$/;"	e	enum:__anona3077f190103	file:
FN_FMCLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_FMCLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_FMCLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_FMCLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_FMCLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_FMCLK_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_FMIN_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,$/;"	e	enum:__anona3077f190103	file:
FN_FMIN_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_FMIN_B,$/;"	e	enum:__anona307945e0103	file:
FN_FMIN_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,$/;"	e	enum:__anona3077f190103	file:
FN_FMIN_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,$/;"	e	enum:__anona3077f190103	file:
FN_FMIN_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIFA2_RXD, FN_FMIN_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_FMIN_F	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,$/;"	e	enum:__anona3077f190103	file:
FN_FSCLKST	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_FSCLKST,$/;"	e	enum:__anona307945e0103	file:
FN_FSO_CEF_1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_FSO_CEF_1_B,$/;"	e	enum:__anona307945e0103	file:
FN_FSO_CFE_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,$/;"	e	enum:__anona307879b0103	file:
FN_FSO_CFE_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_FSO_CFE_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_FSO_CFE_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,$/;"	e	enum:__anona307879b0103	file:
FN_FSO_TOE	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,$/;"	e	enum:__anona307879b0103	file:
FN_GET_SHARE_MEM_INPUT_BASE	arch/arm/mach-meson/sm.c	/^#define FN_GET_SHARE_MEM_INPUT_BASE	/;"	d	file:
FN_GET_SHARE_MEM_OUTPUT_BASE	arch/arm/mach-meson/sm.c	/^#define FN_GET_SHARE_MEM_OUTPUT_BASE	/;"	d	file:
FN_GLO_I0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_I0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_I0_B, FN_VI3_DATA6_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_I0_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_I0_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_I1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_I1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_I1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_I1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_Q0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_Q0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_Q0_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_Q0_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_Q1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_Q1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_Q1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_Q1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_RFON	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_RFON_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_RFON_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona307835a0103	file:
FN_GLO_RFON_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_RFON_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_RFON_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_SCLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SCLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SCLK_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SCLK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_SDATA	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SDATA_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SDATA_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona307835a0103	file:
FN_GLO_SDATA_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_SDATA_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SDATA_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_SS	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SS_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SS_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona307835a0103	file:
FN_GLO_SS_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_GLO_SS_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_GLO_SS_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_CLK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_CLK_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_MAG	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_SIGN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_SIGN_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_GPS_SIGN_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_HCTS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,$/;"	e	enum:__anona307879b0103	file:
FN_HCTS0_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HCTS0_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,$/;"	e	enum:__anona3077f190103	file:
FN_HCTS0_N_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,$/;"	e	enum:__anona3077f190103	file:
FN_HCTS0_N_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,$/;"	e	enum:__anona3077f190103	file:
FN_HCTS0_N_F	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,$/;"	e	enum:__anona3077f190103	file:
FN_HCTS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,$/;"	e	enum:__anona307879b0103	file:
FN_HCTS1_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_HCTS1_N_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_HCTS1x_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HCTS1x_A,$/;"	e	enum:__anona307945e0103	file:
FN_HCTS1x_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HCTS1x_B,$/;"	e	enum:__anona307945e0103	file:
FN_HCTS2x_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HCTS2x_A,$/;"	e	enum:__anona307945e0103	file:
FN_HCTS2x_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HCTS2x_B,$/;"	e	enum:__anona307945e0103	file:
FN_HCTS3x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HCTS3x,$/;"	e	enum:__anona307945e0103	file:
FN_HCTS4x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HCTS4x,$/;"	e	enum:__anona307945e0103	file:
FN_HDMI0_CEC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HDMI0_CEC,$/;"	e	enum:__anona307945e0103	file:
FN_HDMI1_CEC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HDMI1_CEC,$/;"	e	enum:__anona307945e0103	file:
FN_HRTS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,$/;"	e	enum:__anona307879b0103	file:
FN_HRTS0_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRTS0_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,$/;"	e	enum:__anona3077f190103	file:
FN_HRTS0_N_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_HRTS0_N_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,$/;"	e	enum:__anona3077f190103	file:
FN_HRTS0_N_F	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,$/;"	e	enum:__anona3077f190103	file:
FN_HRTS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,$/;"	e	enum:__anona307879b0103	file:
FN_HRTS1_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRTS1_N_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRTS1x_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRTS1x_A,$/;"	e	enum:__anona307945e0103	file:
FN_HRTS1x_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRTS1x_B,$/;"	e	enum:__anona307945e0103	file:
FN_HRTS2x_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRTS2x_A,$/;"	e	enum:__anona307945e0103	file:
FN_HRTS2x_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRTS2x_B,$/;"	e	enum:__anona307945e0103	file:
FN_HRTS3x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRTS3x,$/;"	e	enum:__anona307945e0103	file:
FN_HRTS4x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRTS4x,$/;"	e	enum:__anona307945e0103	file:
FN_HRX0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,$/;"	e	enum:__anona307879b0103	file:
FN_HRX0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRX0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,$/;"	e	enum:__anona3077f190103	file:
FN_HRX0_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,$/;"	e	enum:__anona3077f190103	file:
FN_HRX0_F	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_IVCXO27_1_B, FN_HRX0_F,$/;"	e	enum:__anona3077f190103	file:
FN_HRX1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,$/;"	e	enum:__anona307879b0103	file:
FN_HRX1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRX1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX1_A,$/;"	e	enum:__anona307945e0103	file:
FN_HRX1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX1_B,$/;"	e	enum:__anona307945e0103	file:
FN_HRX1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRX1_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_HRX1_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_HRX2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX2_A,$/;"	e	enum:__anona307945e0103	file:
FN_HRX2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX2_B,$/;"	e	enum:__anona307945e0103	file:
FN_HRX3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX3_A,$/;"	e	enum:__anona307945e0103	file:
FN_HRX3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX3_B,$/;"	e	enum:__anona307945e0103	file:
FN_HRX3_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX3_C,$/;"	e	enum:__anona307945e0103	file:
FN_HRX3_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX3_D,$/;"	e	enum:__anona307945e0103	file:
FN_HRX4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX4_A,$/;"	e	enum:__anona307945e0103	file:
FN_HRX4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HRX4_B,$/;"	e	enum:__anona307945e0103	file:
FN_HSCIF0_HCTS_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E,$/;"	e	enum:__anona307901d0103	file:
FN_HSCIF0_HRTS_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_MAGIC, FN_SSI_SDATA7_B, FN_HSCIF0_HRTS_N, FN_VI0_R7,$/;"	e	enum:__anona307901d0103	file:
FN_HSCIF0_HRX	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SDATA6_B, FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_HSCIF0_HSCK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B,$/;"	e	enum:__anona307901d0103	file:
FN_HSCIF0_HTX	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AUDIO_CLKA_B, FN_AVB_MDIO, FN_SSI_SCK78_B, FN_HSCIF0_HTX,$/;"	e	enum:__anona307901d0103	file:
FN_HSCK0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,$/;"	e	enum:__anona307879b0103	file:
FN_HSCK0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK,$/;"	e	enum:__anona3078bdc0103	file:
FN_HSCK1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,$/;"	e	enum:__anona307879b0103	file:
FN_HSCK1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HSCK1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HSCK1_A,$/;"	e	enum:__anona307945e0103	file:
FN_HSCK1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,$/;"	e	enum:__anona3077f190103	file:
FN_HSCK1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HSCK1_B,$/;"	e	enum:__anona307945e0103	file:
FN_HSCK1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_HSCK2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HSCK2_A,$/;"	e	enum:__anona307945e0103	file:
FN_HSCK2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HSCK2_B,$/;"	e	enum:__anona307945e0103	file:
FN_HSCK3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HSCK3,$/;"	e	enum:__anona307945e0103	file:
FN_HSCK4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HSCK4,$/;"	e	enum:__anona307945e0103	file:
FN_HTX0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,$/;"	e	enum:__anona307879b0103	file:
FN_HTX0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HTX0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B,$/;"	e	enum:__anona3077f190103	file:
FN_HTX0_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,$/;"	e	enum:__anona3077f190103	file:
FN_HTX0_F	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,$/;"	e	enum:__anona3077f190103	file:
FN_HTX1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,$/;"	e	enum:__anona307879b0103	file:
FN_HTX1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_HTX1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX1_A,$/;"	e	enum:__anona307945e0103	file:
FN_HTX1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX1_B,$/;"	e	enum:__anona307945e0103	file:
FN_HTX1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_HTX2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX2_A,$/;"	e	enum:__anona307945e0103	file:
FN_HTX2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX2_B,$/;"	e	enum:__anona307945e0103	file:
FN_HTX3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX3_A,$/;"	e	enum:__anona307945e0103	file:
FN_HTX3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX3_B,$/;"	e	enum:__anona307945e0103	file:
FN_HTX3_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX3_C,$/;"	e	enum:__anona307945e0103	file:
FN_HTX3_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX3_D,$/;"	e	enum:__anona307945e0103	file:
FN_HTX4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX4_A,$/;"	e	enum:__anona307945e0103	file:
FN_HTX4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_HTX4_B,$/;"	e	enum:__anona307945e0103	file:
FN_I2C0_SCL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307901d0103	file:
FN_I2C0_SCL_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_I2C0_SCL_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D,$/;"	e	enum:__anona307901d0103	file:
FN_I2C0_SCL_E	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E,$/;"	e	enum:__anona307901d0103	file:
FN_I2C0_SDA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0,$/;"	e	enum:__anona307901d0103	file:
FN_I2C0_SDA_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_B, FN_I2C0_SDA_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN,$/;"	e	enum:__anona307901d0103	file:
FN_I2C0_SDA_E	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_D, FN_I2C0_SDA_E, FN_AVB_PHY_INT, FN_SSI_SDATA8_B,$/;"	e	enum:__anona307901d0103	file:
FN_I2C1_SCL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_I2C1_SCL_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SDATA6_B, FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_I2C1_SDA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_I2C1_SDA_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B,$/;"	e	enum:__anona307901d0103	file:
FN_I2C2_SCL_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B,$/;"	e	enum:__anona307901d0103	file:
FN_I2C2_SCL_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_I2C2_SDA_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B,$/;"	e	enum:__anona307901d0103	file:
FN_I2C3_SCL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD,$/;"	e	enum:__anona307901d0103	file:
FN_I2C3_SCL_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,$/;"	e	enum:__anona307901d0103	file:
FN_I2C3_SCL_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0,$/;"	e	enum:__anona307901d0103	file:
FN_I2C3_SDA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_I2C3_SDA_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D,$/;"	e	enum:__anona307901d0103	file:
FN_I2C3_SDA_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT11, FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_I2C4_SCL_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA1_RXD_B, FN_I2C4_SCL_C, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307901d0103	file:
FN_I2C4_SCL_E	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_I2C4_SDA_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT14, FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_I2C4_SDA_E	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC,$/;"	e	enum:__anona307901d0103	file:
FN_I2C_SEL_0_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_I2C_SEL_0_0,$/;"	e	enum:__anona307945e0103	file:
FN_I2C_SEL_0_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_I2C_SEL_0_1,$/;"	e	enum:__anona307945e0103	file:
FN_I2C_SEL_3_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_I2C_SEL_3_0,$/;"	e	enum:__anona307945e0103	file:
FN_I2C_SEL_3_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_I2C_SEL_3_1,$/;"	e	enum:__anona307945e0103	file:
FN_I2C_SEL_5_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_I2C_SEL_5_0,$/;"	e	enum:__anona307945e0103	file:
FN_I2C_SEL_5_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_I2C_SEL_5_1,$/;"	e	enum:__anona307945e0103	file:
FN_IECLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_IECLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_IECLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_IECLK_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_IECLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_IECLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_IECLK_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,$/;"	e	enum:__anona3077f190103	file:
FN_IECLK_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,$/;"	e	enum:__anona307835a0103	file:
FN_IECLK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_IECLK_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_IERX	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_D, FN_IERX, FN_CAN1_RX_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_IERX_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_IERX_A,$/;"	e	enum:__anona307945e0103	file:
FN_IERX_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_DATA3, FN_IERX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_IERX_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_IERX_B,$/;"	e	enum:__anona307945e0103	file:
FN_IERX_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,$/;"	e	enum:__anona307835a0103	file:
FN_IERX_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_IERX_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_IETX	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_IETX_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_IETX_A,$/;"	e	enum:__anona307945e0103	file:
FN_IETX_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_IETX_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_IETX_B,$/;"	e	enum:__anona307945e0103	file:
FN_IETX_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,$/;"	e	enum:__anona307835a0103	file:
FN_IETX_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_IETX_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD,$/;"	e	enum:__anona307901d0103	file:
FN_IIC0_SCL_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, FN_SSI_SDATA7,$/;"	e	enum:__anona307901d0103	file:
FN_IIC0_SCL_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_IIC0_SDA_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, FN_SSI_WS78,$/;"	e	enum:__anona307901d0103	file:
FN_IIC0_SDA_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0,$/;"	e	enum:__anona307901d0103	file:
FN_IIC1_SCL_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0,$/;"	e	enum:__anona307901d0103	file:
FN_IIC1_SDA_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF2_TXD_C, FN_IIC1_SDA_D, FN_AVB_TXD7, FN_SSI_SDATA5_B,$/;"	e	enum:__anona307901d0103	file:
FN_INTC_IRQ0_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,$/;"	e	enum:__anona3077f190103	file:
FN_INTC_IRQ0_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_INTC_IRQ1_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,$/;"	e	enum:__anona3077f190103	file:
FN_INTC_IRQ1_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_INTC_IRQ2_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3077f190103	file:
FN_INTC_IRQ2_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_INTC_IRQ3_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_INTC_IRQ4_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IO2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_IO2_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_IO3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_IO3_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_10	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_11	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_11	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_11_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_13	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_14	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_14	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_15_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_16	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_16	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_17	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_17	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_18	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_18_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_18_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_19	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_19_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_19_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_20	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_20_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_20_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_21	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_21_20	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_22	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_22_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_22_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_22_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_23	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_23_22	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_24_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_24_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_25	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_26_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_26_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_26_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_27_26	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_28_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_28_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_29_28	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_30_27	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_30_29	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_30_29	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_31_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP0_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_8_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP0_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307835a0103	file:
FN_IP0_9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP0_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP0_9_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_10_7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_11_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_11_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_11_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_14_11	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_14_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_14_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_14_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_16_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_16_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_17_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_18_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_18_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_18_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_20_18, FN_IP10_23_21, FN_IP10_26_24, FN_IP10_29_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_21_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_21_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_22_19	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_20_18, FN_IP10_23_21, FN_IP10_26_24, FN_IP10_29_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_24_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_24_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_25_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_20_18, FN_IP10_23_21, FN_IP10_26_24, FN_IP10_29_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_26_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_26_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_28_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_28_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_29_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_29_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_20_18, FN_IP10_23_21, FN_IP10_26_24, FN_IP10_29_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_31_29	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_31_29	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_31_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_3_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,$/;"	e	enum:__anona307901d0103	file:
FN_IP10_6_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP10_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona307835a0103	file:
FN_IP10_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP10_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_10_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_10_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_11_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_11_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_12_11	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_13_11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_13_11, FN_IP11_15_14, FN_IP11_17_16,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_14_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_14_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_14_13	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_15_14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_13_11, FN_IP11_15_14, FN_IP11_17_16,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_16_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_16_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_17_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_17_16	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_13_11, FN_IP11_15_14, FN_IP11_17_16,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_18_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_18_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_21_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_23_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_26_24	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_29_27	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_29_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_29_28	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_29_28	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_31_30	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_31_30	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_31_30	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_3_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_6_5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP11_7_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8,$/;"	e	enum:__anona307901d0103	file:
FN_IP11_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP11_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP11_8_7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_10_8	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_10_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_12_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_12_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_12_11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_13_11	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_14_13	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_15_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_15_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_16_14	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_17_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_17_15, FN_IP12_20_18, FN_IP12_23_21, FN_IP12_26_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_17_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_17_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_19_17	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_19_18	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_19_18	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_17_15, FN_IP12_20_18, FN_IP12_23_21, FN_IP12_26_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_21_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_21_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_22_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_17_15, FN_IP12_20_18, FN_IP12_23_21, FN_IP12_26_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_23_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_23_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_24_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_26_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_26_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_17_15, FN_IP12_20_18, FN_IP12_23_21, FN_IP12_26_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_27_25	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_29_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_29_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_29_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_30_28	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_3_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_3_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_3_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_5_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_6_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_6_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP12_7_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP12_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP12_9_7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona307835a0103	file:
FN_IP12_9_7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_11	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_11	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_11_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_12_10	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_14	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_14	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_14_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_14_12, FN_IP13_17_15, FN_IP13_20_18, FN_IP13_23_21,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_15_13	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_17_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_14_12, FN_IP13_17_15, FN_IP13_20_18, FN_IP13_23_21,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_18_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_18_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_18_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_14_12, FN_IP13_17_15, FN_IP13_20_18, FN_IP13_23_21,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_21_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_21_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_22_19	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_14_12, FN_IP13_17_15, FN_IP13_20_18, FN_IP13_23_21,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_24_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_24_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_25_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_28_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_30_28	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_30_28	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_30_29	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_4_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_4_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_6_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_6_5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_6_5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP13_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9,$/;"	e	enum:__anona307901d0103	file:
FN_IP13_9_7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP13_9_7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP13_9_7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_10_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_10_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_11_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_13_11	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_13_11	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_15_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP14_15_12, FN_IP14_18_16,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_16_14	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_16_14	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_18_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP14_15_12, FN_IP14_18_16,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_19_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_19_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_21_19	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_22_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_22_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_24_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_25_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_25_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_27_25	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_28_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_28_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_30_28	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_31_29	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_31_29	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP14_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP14_7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP14_8_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_11_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_11_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_11_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_13_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_14_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_14_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_15_14	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_17_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_17_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_17_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_19_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_20_18	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_20_18	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_22_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_23_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_23_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_25_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_26_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_26_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_27_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_29_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_29_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_29_28	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_3_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_3_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_5_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_5_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP15_8_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP15_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona307835a0103	file:
FN_IP15_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP16_11_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP16_11_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP16_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP16_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP16_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP16_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,$/;"	e	enum:__anona3077f190103	file:
FN_IP16_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP16_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP16_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,$/;"	e	enum:__anona3077f190103	file:
FN_IP16_7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,$/;"	e	enum:__anona3077f190103	file:
FN_IP16_7_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP16_7_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP16_9_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP16_9_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_10_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_10_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_10_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_11_8	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_12_11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_13_11	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_13_11	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_14_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_14_13	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_16	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_16_14	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_16_14	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_17	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_17_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_17_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_18	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_19	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_19_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_19_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_19_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_20	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_21	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_21_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_21_20	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_22	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_22_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_22_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_23_22	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_25_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_25_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_25_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_26	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_27_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_28_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_28_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_29_28	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_29_28	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_31_29	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_31_29	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_31_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_3_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_3_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_3_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_3_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_4,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_5_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_5_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_5_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_7_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,$/;"	e	enum:__anona3077f190103	file:
FN_IP1_7_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona307835a0103	file:
FN_IP1_7_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP1_7_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP1_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,$/;"	e	enum:__anona307879b0103	file:
FN_IP1_9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_11_10	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_11_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_12_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_12_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_13_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_14_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_15_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_15_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_15_14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_16	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_16,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_17_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_17_16	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_17_16,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_18_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_18_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_20_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_20_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_21_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_22_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_22_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_24_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_24_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_25_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_26_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_26_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_28_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_29_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_29_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_29_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_31_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_3_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_4_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_4_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_5_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_6_5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_6_5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_7_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP2_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_8_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP2_9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP2_9_7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP2_9_7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP2_9_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_10	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_11_8	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_11_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_11_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_13_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_13_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_14_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_14_12, FN_IP3_17_15,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_14_13	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_15_14	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_15_14	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_17_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_14_12, FN_IP3_17_15,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_17_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_17_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_17_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_19_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_19_18	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_19_18	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_21_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_21_20,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_21_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_21_20,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_22_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_24_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_24_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_25_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_27_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_27_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_28_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_29_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_30_28	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_30_28	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_31	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_31_29	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_3_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_3_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_5_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_7_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,$/;"	e	enum:__anona3077f190103	file:
FN_IP3_7_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,$/;"	e	enum:__anona307901d0103	file:
FN_IP3_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona307835a0103	file:
FN_IP3_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP3_9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,$/;"	e	enum:__anona307879b0103	file:
FN_IP3_9_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_10_9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_11_10	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_11_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_12_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_12_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_12_11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_13_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_14_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_14_13	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_15_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_15_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_15_14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_16_15	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_17_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_17_16	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_18_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_18_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_18_17	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_19_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_20_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_20_19	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_21	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_22	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_22_20	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_23	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_23_21	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_23_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_23_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_24	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_25_23	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_25_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_25_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_26_24	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_27_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_27_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_27_26	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_29_27	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_29_28	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_30_28	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_30_28	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_31_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_3_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_4_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_4_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_4_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_6_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_7_5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_7_5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_7_5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12,$/;"	e	enum:__anona307901d0103	file:
FN_IP4_8_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,$/;"	e	enum:__anona3077f190103	file:
FN_IP4_8_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,$/;"	e	enum:__anona307879b0103	file:
FN_IP4_9_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona307835a0103	file:
FN_IP4_9_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP4_9_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_11	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_11_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_11_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_11_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_12_10	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_13_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_14_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_14_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_14_13	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_15_14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_16_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_16_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_17_15	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_17_16	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_19_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_19_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_19_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_20_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_21_20	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_21_20	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_21_20	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_23_21	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_23_22	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_23_22	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_23_22	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_25_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_25_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_25_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_26_24	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_27_26	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_28_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_28_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_29_27	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_29_28	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_31_29	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_31_29	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_31_30	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_3_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP5_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_5_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP5_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP5_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14,$/;"	e	enum:__anona307901d0103	file:
FN_IP5_9	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,$/;"	e	enum:__anona307879b0103	file:
FN_IP5_9_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_10	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_10_9	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_11	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_11_10	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_11_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_11_10	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_13	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_13_11	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_13_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_13_12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_13_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_14	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_15_14	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_15_14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_15_14	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_16	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_16	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_16_14	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_18_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_18_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_18_17	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_19_17	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_19_17	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_20_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_20_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_22_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_22_20	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_23_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_23_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_25_23	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_25_23	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_26_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_26_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_28_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_28_26	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_29_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_29_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_31_29	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_31_29	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_3_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_5_3, FN_IP6_7_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_5_3, FN_IP6_7_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_5_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_5_4, FN_IP6_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_7_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP6_5_3, FN_IP6_7_6,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_7_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP6_5_3, FN_IP6_7_6,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP6_7_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_5_4, FN_IP6_7_6,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_8_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP6_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,$/;"	e	enum:__anona307901d0103	file:
FN_IP6_9_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307835a0103	file:
FN_IP6_9_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona307879b0103	file:
FN_IP6_9_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_10_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_10_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_11_10	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_11_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_12_10	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_12_11	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_12_11	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_13_12	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_14_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_14_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_14_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_15_13	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_15_14	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_16	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_16_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_16_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_17	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_17_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_18	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_18_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_18_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_18_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_19	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_1_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_20	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_20_18	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_20_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_20_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_21_19	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_23_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_23_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_23_21	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_24_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_26_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_26_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_26_24	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_26_25	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_28_27	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_29_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_29_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_29_27	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_30_29	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_31	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_3_2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_5_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_5_4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,$/;"	e	enum:__anona307879b0103	file:
FN_IP7_7_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona307835a0103	file:
FN_IP7_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP7_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,$/;"	e	enum:__anona307901d0103	file:
FN_IP7_9_8	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,$/;"	e	enum:__anona3077f190103	file:
FN_IP7_9_8	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,$/;"	e	enum:__anona307879b0103	file:
FN_IP8_11_10	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_11_9	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_11_9	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_11_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_13_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_14_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_14_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_14_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_15_14	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_16_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_17_15	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_17_15	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_17_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_19_17	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_19_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_20_18	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_20_18	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_21_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_22_20	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_22_20,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_23_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_23_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_23_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_25_23	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_25_24	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_25_24	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_25_24	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_27	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_27_26	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_27_26	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_28	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_28_26	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_30_28	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_30_28	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_30_29	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_31_29	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_3_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_5_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_7_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,$/;"	e	enum:__anona3077f190103	file:
FN_IP8_8_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona307835a0103	file:
FN_IP8_8_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP8_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP8_9_8	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_10_8	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_10_8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_11	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_11	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_11_8	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_11_9	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_12	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_12	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_14_12	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_15_12	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_15_13	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_15_13	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_16	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_16	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_16_15	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_17_16	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_18_17	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_18_17,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_18_17	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_18_17,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_18_17	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_19_18	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_20_19	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_20_19	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_21_19	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_21_20	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_22_21	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_22_21	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_23_22	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_24_22	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_24_23	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_24_23	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_25_24	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_26_25	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_26_25	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_27_25	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_27_26	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_28_27	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_28_27	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_30_28	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_31_28	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_31_29	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_31_29	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_3_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_5_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_5_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3,$/;"	e	enum:__anona307901d0103	file:
FN_IP9_5_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona307835a0103	file:
FN_IP9_7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,$/;"	e	enum:__anona3078bdc0103	file:
FN_IP9_7_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,$/;"	e	enum:__anona3077f190103	file:
FN_IP9_8_6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17,$/;"	e	enum:__anona307901d0103	file:
FN_IRQ0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,$/;"	e	enum:__anona3077f190103	file:
FN_IRQ0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,$/;"	e	enum:__anona307879b0103	file:
FN_IRQ0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,$/;"	e	enum:__anona3077f190103	file:
FN_IRQ1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,$/;"	e	enum:__anona307879b0103	file:
FN_IRQ1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3077f190103	file:
FN_IRQ2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,$/;"	e	enum:__anona307879b0103	file:
FN_IRQ2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,$/;"	e	enum:__anona307879b0103	file:
FN_IRQ3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307901d0103	file:
FN_IRQ5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_IRQ6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_IRQ8	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_IRQ8	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N,$/;"	e	enum:__anona307901d0103	file:
FN_LCDOUT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT0,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT1,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT10,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT11,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT12,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT13,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT14,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT15,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT16	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT16,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT17	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT17,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT18	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT18,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT19	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT19,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT2,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT20	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT20,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT21	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT21,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT22	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT22,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT23	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT23,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT3,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT4,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT5,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT6,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT7,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT8,$/;"	e	enum:__anona307945e0103	file:
FN_LCDOUT9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_LCDOUT9,$/;"	e	enum:__anona307945e0103	file:
FN_MDATA	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_MDATA_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MDATA_A,$/;"	e	enum:__anona307945e0103	file:
FN_MDATA_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MDATA_B,$/;"	e	enum:__anona307945e0103	file:
FN_MII_COL	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anona3077f190103	file:
FN_MII_CRS	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,$/;"	e	enum:__anona3077f190103	file:
FN_MII_LINK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_MII_MAGIC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,$/;"	e	enum:__anona3077f190103	file:
FN_MII_MDC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,$/;"	e	enum:__anona3077f190103	file:
FN_MII_MDIO	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RXD0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RXD1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RXD2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RXD2,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RXD3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RX_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RX_DV	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,$/;"	e	enum:__anona3077f190103	file:
FN_MII_RX_ER	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_MII_TX_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_MII_TX_EN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_MII_TX_ER	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,$/;"	e	enum:__anona3077f190103	file:
FN_MISO_IO1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,$/;"	e	enum:__anona307879b0103	file:
FN_MISO_IO1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MLB_CK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MLB_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,$/;"	e	enum:__anona3077f190103	file:
FN_MLB_DAT	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,$/;"	e	enum:__anona3077f190103	file:
FN_MLB_DAT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MLB_SIG	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_MLB_SIG	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC0_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_CMD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,$/;"	e	enum:__anona3077f190103	file:
FN_MMC0_D7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_CMD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,$/;"	e	enum:__anona3077f190103	file:
FN_MMC1_D7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_MMC_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_CMD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_CMD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D6_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MMC_D7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B,$/;"	e	enum:__anona307901d0103	file:
FN_MMC_D7_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_MOSI_IO0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,$/;"	e	enum:__anona307879b0103	file:
FN_MOSI_IO0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MOUT0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MOUT0,$/;"	e	enum:__anona3077f190103	file:
FN_MOUT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MOUT0,$/;"	e	enum:__anona307945e0103	file:
FN_MOUT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MOUT1,$/;"	e	enum:__anona307945e0103	file:
FN_MOUT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MOUT2,$/;"	e	enum:__anona307945e0103	file:
FN_MOUT5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MOUT5,$/;"	e	enum:__anona307945e0103	file:
FN_MOUT6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MOUT6,$/;"	e	enum:__anona307945e0103	file:
FN_MSIIOF3_TXD_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIIOF3_TXD_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF0_RXD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF0_RXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_RXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF0_RXD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF0_RXD,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF0_RXD_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,$/;"	e	enum:__anona3077f190103	file:
FN_MSIOF0_RXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SCK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF0_SCK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SCK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF0_SCK,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF0_SCK_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,$/;"	e	enum:__anona307835a0103	file:
FN_MSIOF0_SCK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SS1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SS1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADICLK_B, FN_MSIOF0_SS1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SS2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SS2_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF0_SYNC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ADIDATA_B, FN_MSIOF0_SYNC_C,$/;"	e	enum:__anona307835a0103	file:
FN_MSIOF0_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADIDATA_B, FN_MSIOF0_SYNC_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_TXD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF0_TXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF0_TXD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF0_TXD,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF0_TXD_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3077f190103	file:
FN_MSIOF0_TXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ADICHS2_B, FN_MSIOF0_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_RXD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF1_RXD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_RXD_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_RXD_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_RXD_E	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SCL2_D, FN_MSIOF1_RXD_E,$/;"	e	enum:__anona307835a0103	file:
FN_MSIOF1_RXD_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCL2_D, FN_MSIOF1_RXD_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_RXD_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_E,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_RXD_F	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_F,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_RXD_G	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_RXD_G,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF1_SCK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK_E	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona307835a0103	file:
FN_MSIOF1_SCK_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_SCK_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_E,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK_F	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_F,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SCK_G	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SCK_G,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_E,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_F	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_F,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS1_G	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS1_G,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_E,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_F	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_F,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SS2_G	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SS2_G,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF1_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC_E	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,$/;"	e	enum:__anona307835a0103	file:
FN_MSIOF1_SYNC_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_SYNC_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_E,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC_F	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_F,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_SYNC_G	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_SYNC_G,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,$/;"	e	enum:__anona307879b0103	file:
FN_MSIOF1_TXD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD_E	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_CAN1_TX_C, FN_MSIOF1_TXD_E,$/;"	e	enum:__anona307835a0103	file:
FN_MSIOF1_TXD_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_CAN1_TX_C, FN_MSIOF1_TXD_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF1_TXD_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_E,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD_F	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_F,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF1_TXD_G	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF1_TXD_G,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_RXD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_RXD_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF2_RXD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_RXD_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_RXD_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_RXD_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_RXD_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_RXD_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_RXD_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF2_S1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_S1_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SCK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SCK_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SCK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF2_SCK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SCK_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SCK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SCK_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SCK_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SCK_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SCK_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF2_SS1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS1_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SS1_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF2_SS1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS1_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SS1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS1_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SS2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS2_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SS2_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF2_SS2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS2_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SS2_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS2_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SS2_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SS2_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF2_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SYNC_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SYNC_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_SYNC_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_SYNC_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF2_TXD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_TXD_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0,$/;"	e	enum:__anona307901d0103	file:
FN_MSIOF2_TXD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_TXD_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_TXD_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_TXD_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_TXD_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF2_TXD_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF2_TXD_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_MSIOF3_RXD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_RXD_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_RXD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_RXD_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_RXD_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_RXD_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_RXD_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_RXD_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SCK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SCK_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SCK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SCK_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SCK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SCK_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SCK_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SCK_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SS1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SS1_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SS1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SS1_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SS1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SS1_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SS2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SS2_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SS2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SS2_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SYNC_C,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_SYNC_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_SYNC_D,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_TXD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_TXD_A,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_TXD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_TXD_B,$/;"	e	enum:__anona307945e0103	file:
FN_MSIOF3_TXD_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MSIOF3_TXD_C,$/;"	e	enum:__anona307945e0103	file:
FN_MTS_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,$/;"	e	enum:__anona3077f190103	file:
FN_MTSx_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MTSx_A,$/;"	e	enum:__anona307945e0103	file:
FN_MTSx_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_MTSx_B,$/;"	e	enum:__anona307945e0103	file:
FN_PCMOE_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_PCMOE_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N,$/;"	e	enum:__anona307901d0103	file:
FN_PCMWE_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,$/;"	e	enum:__anona3077f190103	file:
FN_PCMWE_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_PWM0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,$/;"	e	enum:__anona3077f190103	file:
FN_PWM0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,$/;"	e	enum:__anona307879b0103	file:
FN_PWM0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_PWM0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_PWM0_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B,$/;"	e	enum:__anona307901d0103	file:
FN_PWM1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_PWM1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,$/;"	e	enum:__anona307879b0103	file:
FN_PWM1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_WP, FN_PWM1_B, FN_SDA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_PWM1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM1_B,$/;"	e	enum:__anona307945e0103	file:
FN_PWM2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_PWM2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,$/;"	e	enum:__anona307879b0103	file:
FN_PWM2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM2_B,$/;"	e	enum:__anona307945e0103	file:
FN_PWM3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,$/;"	e	enum:__anona307879b0103	file:
FN_PWM3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM3_A,$/;"	e	enum:__anona307945e0103	file:
FN_PWM3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM3_B,$/;"	e	enum:__anona307945e0103	file:
FN_PWM4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,$/;"	e	enum:__anona307879b0103	file:
FN_PWM4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM4_A,$/;"	e	enum:__anona307945e0103	file:
FN_PWM4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM4_B,$/;"	e	enum:__anona307945e0103	file:
FN_PWM5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,$/;"	e	enum:__anona3078bdc0103	file:
FN_PWM5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307901d0103	file:
FN_PWM5_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM5_A,$/;"	e	enum:__anona307945e0103	file:
FN_PWM5_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_PWM5_B, FN_SCIFA3_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_PWM5_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B,$/;"	e	enum:__anona307901d0103	file:
FN_PWM5_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM5_B,$/;"	e	enum:__anona307945e0103	file:
FN_PWM6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,$/;"	e	enum:__anona3078bdc0103	file:
FN_PWM6_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM6_A,$/;"	e	enum:__anona307945e0103	file:
FN_PWM6_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWM6_B,$/;"	e	enum:__anona307945e0103	file:
FN_PWMFSW0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_PWMFSW0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_PWMFSW0,$/;"	e	enum:__anona307945e0103	file:
FN_QCLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QCLK,$/;"	e	enum:__anona307945e0103	file:
FN_QCPV_QDE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29,$/;"	e	enum:__anona307901d0103	file:
FN_QCPV_QDE	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QCPV_QDE,$/;"	e	enum:__anona307945e0103	file:
FN_QPOLA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB,$/;"	e	enum:__anona307901d0103	file:
FN_QPOLA	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QPOLA,$/;"	e	enum:__anona307945e0103	file:
FN_QPOLB	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB,$/;"	e	enum:__anona307901d0103	file:
FN_QPOLB	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QPOLB,$/;"	e	enum:__anona307945e0103	file:
FN_QSTB_QHE	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28,$/;"	e	enum:__anona307901d0103	file:
FN_QSTB_QHE	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QSTB_QHE,$/;"	e	enum:__anona307945e0103	file:
FN_QSTH_QHS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QSTH_QHS,$/;"	e	enum:__anona307945e0103	file:
FN_QSTVA_QVS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QSTVA_QVS,$/;"	e	enum:__anona307945e0103	file:
FN_QSTVB_QVE	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_QSTVB_QVE,$/;"	e	enum:__anona307945e0103	file:
FN_RD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,$/;"	e	enum:__anona307879b0103	file:
FN_RDS_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_RDS_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_RDS_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RDS_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_RDS_CLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_RDS_CLK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RDS_CLK_C,$/;"	e	enum:__anona307945e0103	file:
FN_RDS_CLK_F	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,$/;"	e	enum:__anona3077f190103	file:
FN_RDS_DATA	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,$/;"	e	enum:__anona3077f190103	file:
FN_RDS_DATA_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RDS_DATA_A,$/;"	e	enum:__anona307945e0103	file:
FN_RDS_DATA_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,$/;"	e	enum:__anona3077f190103	file:
FN_RDS_DATA_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RDS_DATA_B,$/;"	e	enum:__anona307945e0103	file:
FN_RDS_DATA_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,$/;"	e	enum:__anona3077f190103	file:
FN_RDS_DATA_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,$/;"	e	enum:__anona3077f190103	file:
FN_RD_N	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona307835a0103	file:
FN_RD_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_RD_WR	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,$/;"	e	enum:__anona307879b0103	file:
FN_REMOCON_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_REMOCON_A,$/;"	e	enum:__anona307945e0103	file:
FN_REMOCON_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_REMOCON_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_REMOCON_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_CLK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_CLK_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_D0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_D0_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_D0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_D0_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_D0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_D0_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_D1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_D1_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_D1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_D1_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_D1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_D1_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF0_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF0_SYNC_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_CLK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_RIF1_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_CLK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_CLK_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_D0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_D0_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_D0_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_RIF1_D0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_D0_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_D0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_D0_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_D1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_D1_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_D1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_D1_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_D1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_D1_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B,$/;"	e	enum:__anona307901d0103	file:
FN_RIF1_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF1_SYNC_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF1_SYNC_C,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_D0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_D0_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_D0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_D0_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_D1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_D1_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_D1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_D1_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF2_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF2_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_D0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_D0_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_D0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_D0_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_D1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_D1_B,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_SYNC_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_SYNC_A,$/;"	e	enum:__anona307945e0103	file:
FN_RIF3_SYNC_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RIF3_SYNC_B,$/;"	e	enum:__anona307945e0103	file:
FN_RMII_CRS_DV	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_LINK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_MAGIC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_MDC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_MDIO	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_REF_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_RXD0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_RXD1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_RX_ER	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_TXD0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_TXD1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,$/;"	e	enum:__anona3077f190103	file:
FN_RMII_TX_EN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_RMIN_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RMIN_A,$/;"	e	enum:__anona307945e0103	file:
FN_RSD_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RSD_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_RSD_DATA_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RSD_DATA_C,$/;"	e	enum:__anona307945e0103	file:
FN_RSO_TOE_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RSO_TOE_B,$/;"	e	enum:__anona307945e0103	file:
FN_RTS0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,$/;"	e	enum:__anona307879b0103	file:
FN_RTS1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,$/;"	e	enum:__anona307879b0103	file:
FN_RTS3x_TANS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RTS3x_TANS,$/;"	e	enum:__anona307945e0103	file:
FN_RTS4n_TANS_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RTS4n_TANS_B,$/;"	e	enum:__anona307945e0103	file:
FN_RTS4x_TANS_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RTS4x_TANS_A,$/;"	e	enum:__anona307945e0103	file:
FN_RTS4x_TANS_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RTS4x_TANS_C,$/;"	e	enum:__anona307945e0103	file:
FN_RX0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,$/;"	e	enum:__anona307879b0103	file:
FN_RX0_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona307835a0103	file:
FN_RX0_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX0_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,$/;"	e	enum:__anona307879b0103	file:
FN_RX1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX1_B,$/;"	e	enum:__anona307945e0103	file:
FN_RX1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_RX1_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona307835a0103	file:
FN_RX1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX1_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,$/;"	e	enum:__anona3077f190103	file:
FN_RX1_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,$/;"	e	enum:__anona3077f190103	file:
FN_RX2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,$/;"	e	enum:__anona307879b0103	file:
FN_RX2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX2_B,$/;"	e	enum:__anona307945e0103	file:
FN_RX2_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_TX3, FN_DREQ1, FN_RX3,$/;"	e	enum:__anona307879b0103	file:
FN_RX3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX3_A,$/;"	e	enum:__anona307945e0103	file:
FN_RX3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX3_B,$/;"	e	enum:__anona307945e0103	file:
FN_RX3_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIFA5_RXD_B, FN_RX3_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX4_A,$/;"	e	enum:__anona307945e0103	file:
FN_RX4_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_RX4_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX4_B,$/;"	e	enum:__anona307945e0103	file:
FN_RX4_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,$/;"	e	enum:__anona3078bdc0103	file:
FN_RX4_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX4_C,$/;"	e	enum:__anona307945e0103	file:
FN_RX5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_RX5,$/;"	e	enum:__anona307945e0103	file:
FN_RX5_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SATA_DEVSLP_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SATA_DEVSLP_A,$/;"	e	enum:__anona307945e0103	file:
FN_SATA_DEVSLP_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SATA_DEVSLP_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCIF0_RXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_RXD_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_RXD_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_TXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_B, FN_I2C0_SDA_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_TXD_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF0_TXD_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_D, FN_I2C0_SDA_E, FN_AVB_PHY_INT, FN_SSI_SDATA8_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF2_RXD_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF2_SCK_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF2_TXD_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF2_TXD_C, FN_IIC1_SDA_D, FN_AVB_TXD7, FN_SSI_SDATA5_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF3_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF3_SCK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF3_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF4_RXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF4_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF4_RXD_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF4_TXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF4_TXD_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF5_RXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF5_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF5_RXD_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF5_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF5_TXD_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA1_CTS_N_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA1_RTS_N_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA1_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA1_RXD_B, FN_I2C4_SCL_C, FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA1_RXD_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA1_SCK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DOTCLKOUT1, FN_CAN_DEBUGOUT12, FN_SSI_SCK6, FN_SCIFA1_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA1_SCK_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA1_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT14, FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA1_TXD_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA2_RXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIFA2_RXD, FN_FMIN_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA2_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, FN_SSI_SDATA7,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA2_RXD_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA2_SCK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, FN_SSI_WS78,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA2_SCK_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA2_TXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA2_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA2_TXD_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFA3_RXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA3_RXD_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFA3_RXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA3_RXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA3_RXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_G6_B, FN_SCIFA3_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA3_SCK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA3_SCK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_G7_B, FN_SCIFA3_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA3_TXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT11, FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA3_TXD_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFA3_TXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA3_TXD_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA3_TXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_PWM5_B, FN_SCIFA3_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA4_RXD_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFA4_RXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA4_RXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA4_TXD_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFA4_TXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA4_TXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA5_RXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIFA5_RXD_B, FN_RX3_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA5_RXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA5_RXD_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFA5_TXD_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIFA5_TXD_B, FN_TX3_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA5_TXD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFA5_TXD_C	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFB0_CTS_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_CTS_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB0_RTS_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_RTS_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB0_RXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_RXD_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB0_RXD_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFB0_RXD_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_SCK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_SCK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB0_SCK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_TXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB0_TXD_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_CTS_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_CTS_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_RTS_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_RTS_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_RXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_RXD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS6_B, FN_DREQ0_N, FN_SCIFB1_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_SCIFB1_RXD_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_RXD_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_RXD_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_RXD_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_RXD_G	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_SCK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_SCK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_SCK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_SCK_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_SCK_G	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_TXD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_TXD_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_TXD_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_TXD_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB1_TXD_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB1_TXD_G	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,$/;"	e	enum:__anona3077f190103	file:
FN_SCIFB2_RXD_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFB2_RXD_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB2_SCK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIFB2_TXD_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_SCIFB2_TXD_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIF_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,$/;"	e	enum:__anona307879b0103	file:
FN_SCIF_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIF_CLK, FN_BPFCLK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCIF_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCIF_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_SCIF_CLK_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B,$/;"	e	enum:__anona307901d0103	file:
FN_SCIF_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCIF_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCK0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,$/;"	e	enum:__anona307879b0103	file:
FN_SCK1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,$/;"	e	enum:__anona307879b0103	file:
FN_SCK1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCK1,$/;"	e	enum:__anona307945e0103	file:
FN_SCK1_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,$/;"	e	enum:__anona3077f190103	file:
FN_SCK1_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,$/;"	e	enum:__anona3077f190103	file:
FN_SCK2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,$/;"	e	enum:__anona307879b0103	file:
FN_SCK3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,$/;"	e	enum:__anona307879b0103	file:
FN_SCK3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCK3,$/;"	e	enum:__anona307945e0103	file:
FN_SCK4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCK4_A,$/;"	e	enum:__anona307945e0103	file:
FN_SCK4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCK4_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCK4_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCK4_C,$/;"	e	enum:__anona307945e0103	file:
FN_SCK5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCK5,$/;"	e	enum:__anona307945e0103	file:
FN_SCKZ	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,$/;"	e	enum:__anona3077f190103	file:
FN_SCKZ_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCKZ_A,$/;"	e	enum:__anona307945e0103	file:
FN_SCKZ_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCKZ_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCL1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL1_A,$/;"	e	enum:__anona307945e0103	file:
FN_SCL1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCL1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL1_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCL1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL1_CIS_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,$/;"	e	enum:__anona3077f190103	file:
FN_SCL1_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL2_A,$/;"	e	enum:__anona307945e0103	file:
FN_SCL2_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCL2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL2_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCL2_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,$/;"	e	enum:__anona307835a0103	file:
FN_SCL2_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL2_CIS_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCL2_CIS_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCL2_CIS_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,$/;"	e	enum:__anona3077f190103	file:
FN_SCL2_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_SCL2_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SCL2_D, FN_MSIOF1_RXD_E,$/;"	e	enum:__anona307835a0103	file:
FN_SCL2_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCL2_D, FN_MSIOF1_RXD_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL2_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,$/;"	e	enum:__anona3077f190103	file:
FN_SCL3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona307835a0103	file:
FN_SCL3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL4_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona307835a0103	file:
FN_SCL4_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL4_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL6_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL6_A,$/;"	e	enum:__anona307945e0103	file:
FN_SCL6_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL6_B,$/;"	e	enum:__anona307945e0103	file:
FN_SCL6_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SCL6_C,$/;"	e	enum:__anona307945e0103	file:
FN_SCL7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona307835a0103	file:
FN_SCL7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL7_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SCL8_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_CD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_CD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_CD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_CD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_CMD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_CMD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_CMD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_CMD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_DAT0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_DAT0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_DAT1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_DAT1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_DAT2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_DAT2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_DAT3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_DAT3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_DATA0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_DATA0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_DATA1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_DATA1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_DATA2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_DATA2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_DATA3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_DATA3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD,$/;"	e	enum:__anona307901d0103	file:
FN_SD0_WP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,$/;"	e	enum:__anona3077f190103	file:
FN_SD0_WP	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,$/;"	e	enum:__anona307879b0103	file:
FN_SD0_WP	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD0_WP	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_CD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_CD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_CD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_CMD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_CMD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_CMD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_DAT0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_DAT1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_DAT2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_DAT3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_DATA0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_DATA0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_DATA1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_DATA1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_DATA2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_DATA2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_DATA3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_DATA3, FN_IERX_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_DATA3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SD1_WP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_SD1_WP	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_WP, FN_PWM1_B, FN_SDA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD1_WP	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_CD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_CD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_CD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_CD_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_CD_A,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_CD_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_CD_B,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_CMD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_CMD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_CMD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_CMD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_CMD,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_DAT0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_DAT1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_DAT2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_DAT3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_DAT4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_DAT4,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_DAT5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_DAT5,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_DAT6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_DAT6,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_DAT7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_DAT7,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_DATA0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_DATA0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_DATA1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_DATA1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_DATA2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_DATA2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_DATA3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_DATA3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_WP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_SD2_WP	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SD2_WP	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_SD2_WP_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_WP_A,$/;"	e	enum:__anona307945e0103	file:
FN_SD2_WP_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD2_WP_B,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_CD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_CD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_CD,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_CLK,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_CMD	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_CMD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_CMD,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_DAT0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_DAT0,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_DAT1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_DAT1,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_DAT2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_DAT2,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_DAT3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_DAT3,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_DS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_DS,$/;"	e	enum:__anona307945e0103	file:
FN_SD3_WP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,$/;"	e	enum:__anona3077f190103	file:
FN_SD3_WP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SD3_WP,$/;"	e	enum:__anona307945e0103	file:
FN_SDA1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA1_A,$/;"	e	enum:__anona307945e0103	file:
FN_SDA1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,$/;"	e	enum:__anona3077f190103	file:
FN_SDA1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA1_B,$/;"	e	enum:__anona307945e0103	file:
FN_SDA1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_WP, FN_PWM1_B, FN_SDA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA1_CIS_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SDA1_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona307835a0103	file:
FN_SDA1_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA1_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA2_A,$/;"	e	enum:__anona307945e0103	file:
FN_SDA2_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_SDA2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA2_B,$/;"	e	enum:__anona307945e0103	file:
FN_SDA2_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,$/;"	e	enum:__anona307835a0103	file:
FN_SDA2_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA2_CIS_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,$/;"	e	enum:__anona3077f190103	file:
FN_SDA2_CIS_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,$/;"	e	enum:__anona3077f190103	file:
FN_SDA2_CIS_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_SDA2_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,$/;"	e	enum:__anona3077f190103	file:
FN_SDA2_D	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona307835a0103	file:
FN_SDA2_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA2_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,$/;"	e	enum:__anona3077f190103	file:
FN_SDA3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona307835a0103	file:
FN_SDA3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA4_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_SDA4_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA4_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA6_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA6_A,$/;"	e	enum:__anona307945e0103	file:
FN_SDA6_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA6_B,$/;"	e	enum:__anona307945e0103	file:
FN_SDA6_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDA6_C,$/;"	e	enum:__anona307945e0103	file:
FN_SDA7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona307835a0103	file:
FN_SDA7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA7_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDA8_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SDATA	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,$/;"	e	enum:__anona3077f190103	file:
FN_SDATA_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDATA_A,$/;"	e	enum:__anona307945e0103	file:
FN_SDATA_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SDATA_B,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_5LINE_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_5LINE_0, FN_SEL_5LINE_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_5LINE_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_5LINE_0, FN_SEL_5LINE_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ADG_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_ADG_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_ADG_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_ADG_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ADG_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_ADG_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_ADG_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_ADG_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ADG_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_ADG_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_ADG_2, FN_SEL_ADG_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ADG_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_ADG_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_ADG_2, FN_SEL_ADG_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ADI_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_ADI_0, FN_SEL_ADI_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_ADI_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADI_0, FN_SEL_ADI_1, FN_SEL_CAN_0, FN_SEL_CAN_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_ADI_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_ADI_0, FN_SEL_ADI_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_ADI_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADI_0, FN_SEL_ADI_1, FN_SEL_CAN_0, FN_SEL_CAN_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_AVB_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC00_2, FN_SEL_IIC00_3, FN_SEL_AVB_0, FN_SEL_AVB_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_AVB_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC00_2, FN_SEL_IIC00_3, FN_SEL_AVB_0, FN_SEL_AVB_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CAN0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, FN_SEL_CAN0_0, FN_SEL_CAN0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CAN0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN0_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, FN_SEL_CAN0_0, FN_SEL_CAN0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN0_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CAN0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN0_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN0_2, FN_SEL_CAN0_3, FN_SEL_CAN1_0, FN_SEL_CAN1_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN0_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CAN0_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN0_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN0_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN0_2, FN_SEL_CAN0_3, FN_SEL_CAN1_0, FN_SEL_CAN1_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN0_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN0_4, FN_SEL_CAN0_5,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN0_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN0_4, FN_SEL_CAN0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN0_5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN0_4, FN_SEL_CAN0_5,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN0_5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN0_4, FN_SEL_CAN0_5,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CAN1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN0_2, FN_SEL_CAN0_3, FN_SEL_CAN1_0, FN_SEL_CAN1_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CAN1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN0_2, FN_SEL_CAN0_3, FN_SEL_CAN1_0, FN_SEL_CAN1_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN1_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN1_2, FN_SEL_CAN1_3, FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN1_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CAN1_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CAN1_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN1_2, FN_SEL_CAN1_3, FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CANCLK_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CANCLK_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CANCLK_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CANCLK_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_CANCLK_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CANCLK_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CANCLK_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CANCLK_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CANCLK_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_CANCLK_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_CANFD_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_CANFD_0, FN_SEL_CANFD_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_CANFD_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_CANFD_0, FN_SEL_CANFD_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_CAN_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADI_0, FN_SEL_ADI_1, FN_SEL_CAN_0, FN_SEL_CAN_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_ADI_0, FN_SEL_ADI_1, FN_SEL_CAN_0, FN_SEL_CAN_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN_2, FN_SEL_CAN_3, FN_SEL_DARC_0, FN_SEL_DARC_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_CAN_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN_2, FN_SEL_CAN_3, FN_SEL_DARC_0, FN_SEL_DARC_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DARC_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN_2, FN_SEL_CAN_3, FN_SEL_DARC_0, FN_SEL_DARC_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DARC_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN_2, FN_SEL_CAN_3, FN_SEL_DARC_0, FN_SEL_DARC_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DARC_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DARC_2, FN_SEL_DARC_3, FN_SEL_DARC_4, FN_SEL_DR0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DARC_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DARC_2, FN_SEL_DARC_3, FN_SEL_DARC_4, FN_SEL_DR0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DARC_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DARC_2, FN_SEL_DARC_3, FN_SEL_DARC_4, FN_SEL_DR0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DIS_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_DIS_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_DIS_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_DIS_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_DIS_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_DIS_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_DR0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DARC_2, FN_SEL_DARC_3, FN_SEL_DARC_4, FN_SEL_DR0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR0_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR2_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR3_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DR3_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_DRIF0_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF0_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF0_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF0_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF1_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF1_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF3_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_DRIF3_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ETHERAVB_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ETHERAVB_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_ETH_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_ETH_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_FM_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FM_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_FM_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_FM_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_FM_0, FN_SEL_FM_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_FM_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FM_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_FM_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_FM_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_FM_0, FN_SEL_FM_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_FM_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FM_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_FM_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_FM_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FM_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_FM_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_FM_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FM_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_FM_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_FM_5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FM_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_FSN_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_FSN_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_FSN_1, FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_FSO_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_FSO_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_GPS_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_GPS_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_GPS_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_GPS_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_GPS_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_GPS_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_GPS_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_GPS_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_GPS_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_GPS_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_GPS_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN1_2, FN_SEL_CAN1_3, FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_HSCIF0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF0_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_CAN1_2, FN_SEL_CAN1_3, FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_HSCIF0_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF0_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF0_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF0_5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_RDS_0, FN_SEL_RDS_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_HSCIF1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_HSCIF1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_RDS_0, FN_SEL_RDS_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_HSCIF1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF1_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF1_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF1_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF1_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF1_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF1_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF2_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF2_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF2_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF2_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF2_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_HSCIF2_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_HSCIF3_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF3_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF3_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF3_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF4_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_HSCIF4_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C00_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_FSN_1, FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C00_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_FSN_1, FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C00_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_FSN_1, FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C00_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C00_3, FN_SEL_I2C00_4, FN_SEL_I2C01_0, FN_SEL_I2C01_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C00_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C00_3, FN_SEL_I2C00_4, FN_SEL_I2C01_0, FN_SEL_I2C01_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C01_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C00_3, FN_SEL_I2C00_4, FN_SEL_I2C01_0, FN_SEL_I2C01_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C01_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C00_3, FN_SEL_I2C00_4, FN_SEL_I2C01_0, FN_SEL_I2C01_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C01_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, FN_SEL_I2C02_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C01_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, FN_SEL_I2C02_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C01_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, FN_SEL_I2C02_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C02_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, FN_SEL_I2C02_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C02_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, FN_SEL_I2C02_4,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C02_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, FN_SEL_I2C02_4,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C02_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, FN_SEL_I2C02_4,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C02_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, FN_SEL_I2C02_4,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C03_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C03_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C03_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C03_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C03_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_4, FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C04_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_4, FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C04_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_4, FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C04_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C03_4, FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C04_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C04_3, FN_SEL_I2C04_4, FN_SEL_IIC00_0, FN_SEL_IIC00_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C04_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C04_3, FN_SEL_I2C04_4, FN_SEL_IIC00_0, FN_SEL_IIC00_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_I2C1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C1_0, FN_SEL_I2C1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C1_0, FN_SEL_I2C1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C1_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C2_0, FN_SEL_I2C2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C2_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C2_0, FN_SEL_I2C2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C2_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C2_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C2_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_I2C2_4,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_I2C6_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C6_0, FN_SEL_I2C6_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C6_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C6_0, FN_SEL_I2C6_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_I2C6_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_I2C6_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_IEBUS_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_IEBUS_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_IEB_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IEB_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IEB_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IEB_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, FN_SEL_IIC01_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IEB_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IEB_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IEB_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IEB_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, FN_SEL_IIC01_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IEB_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IEB_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IEB_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IEB_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, FN_SEL_IIC01_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC00_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C04_3, FN_SEL_I2C04_4, FN_SEL_IIC00_0, FN_SEL_IIC00_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC00_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_I2C04_3, FN_SEL_I2C04_4, FN_SEL_IIC00_0, FN_SEL_IIC00_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC00_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC00_2, FN_SEL_IIC00_3, FN_SEL_AVB_0, FN_SEL_AVB_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC00_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC00_2, FN_SEL_IIC00_3, FN_SEL_AVB_0, FN_SEL_AVB_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC01_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, FN_SEL_IIC01_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC01_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, FN_SEL_LBS_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC01_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, FN_SEL_LBS_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC01_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, FN_SEL_LBS_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_IIC0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC1_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC1_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC1_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC1_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC1_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC1_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC1_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC2_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC2_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC2_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC2_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC2_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC2_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC2_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC2_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC2_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC2_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IIC2_4,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IIC3_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC3_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC3_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC3_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC3_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC3_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC3_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC3_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC4_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC4_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC4_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC4_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC4_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC4_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC7_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC7_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC7_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC7_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC7_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC7_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC8_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC8_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC8_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC8_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IIC8_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_IIC8_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_IICDVFS_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_IICDVFS_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_LBSC_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_LBSC_0, FN_SEL_LBSC_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_LBSC_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_LBSC_0, FN_SEL_LBSC_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_LBS_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_LBS_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_LBS_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_LBS_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, FN_SEL_LBS_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_LBS_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_LBS_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_LBS_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_LBS_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_LBS_1, FN_SEL_MSI1_0, FN_SEL_MSI1_1, FN_SEL_MSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_LBS_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_LBS_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_LBS_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_LBS_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_MMC_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_MMC_0, FN_SEL_MMC_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_MMC_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_MMC_0, FN_SEL_MMC_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_MMC_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_MMC_0, FN_SEL_MMC_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_MMC_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_MMC_0, FN_SEL_MMC_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_MSI1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_LBS_1, FN_SEL_MSI1_0, FN_SEL_MSI1_1, FN_SEL_MSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_MSI1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_LBS_1, FN_SEL_MSI1_0, FN_SEL_MSI1_1, FN_SEL_MSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_MSI2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_LBS_1, FN_SEL_MSI1_0, FN_SEL_MSI1_1, FN_SEL_MSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_MSI2_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_MSI2_1, FN_SEL_RAD_0, FN_SEL_RAD_1, FN_SEL_RCN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_MSIOF1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF1_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF1_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF1_4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF1_5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF1_6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF1_6,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF2_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF2_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF3_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF3_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF3_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_MSIOF3_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM1_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM2_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM3_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM3_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM3_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM4_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM4_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM4_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM4_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM5_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM5_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM5_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM5_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM6_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM6_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_PWM6_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_PWM6_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_QSP_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_QSP_0, FN_SEL_QSP_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_QSP_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_QSP_0, FN_SEL_QSP_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_QSP_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_QSP_0, FN_SEL_QSP_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_QSP_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_QSP_0, FN_SEL_QSP_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RAD_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_RAD_0, FN_SEL_RAD_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_RAD_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_RAD_0, FN_SEL_RAD_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RAD_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_MSI2_1, FN_SEL_RAD_0, FN_SEL_RAD_1, FN_SEL_RCN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RAD_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_RAD_0, FN_SEL_RAD_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_RAD_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_RAD_0, FN_SEL_RAD_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RAD_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_MSI2_1, FN_SEL_RAD_0, FN_SEL_RAD_1, FN_SEL_RCN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RCAN_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_RCAN_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_RCAN_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_RCAN_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_RCN_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_RCN_0, FN_SEL_RCN_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_RCN_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_RCN_0, FN_SEL_RCN_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RCN_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_MSI2_1, FN_SEL_RAD_0, FN_SEL_RAD_1, FN_SEL_RCN_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RCN_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_RCN_0, FN_SEL_RCN_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_RCN_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_RCN_0, FN_SEL_RCN_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RCN_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_RCN_1, FN_SEL_RSP_0, FN_SEL_RSP_1, FN_SEL_SCIFA0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RDS_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_RDS_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_RDS_0, FN_SEL_RDS_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RDS_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_RDS_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_RDS_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_RDS_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_RDS_0, FN_SEL_RDS_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RDS_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_RDS_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_RDS_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_RDS_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_RDS_2, FN_SEL_RDS_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RDS_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_RDS_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_RDS_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_RDS_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_RDS_2, FN_SEL_RDS_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RDS_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_RDS_5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_REMOCON_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_REMOCON_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_REMOCON_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_REMOCON_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_RSP_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_RSP_0, FN_SEL_RSP_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_RSP_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_RSP_0, FN_SEL_RSP_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RSP_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_RCN_1, FN_SEL_RSP_0, FN_SEL_RSP_1, FN_SEL_SCIFA0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_RSP_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_RSP_0, FN_SEL_RSP_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_RSP_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_RSP_0, FN_SEL_RSP_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_RSP_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_RCN_1, FN_SEL_RSP_0, FN_SEL_RSP_1, FN_SEL_SCIFA0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCFA_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCFA_0, FN_SEL_SCFA_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCFA_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCFA_0, FN_SEL_SCFA_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCFA_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCFA_0, FN_SEL_SCFA_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCFA_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCFA_0, FN_SEL_SCFA_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCFA_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCFA_0, FN_SEL_SCFA_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCFA_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCFA_0, FN_SEL_SCFA_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF0_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF0_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF0_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF0_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF0_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF0_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF0_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF0_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF0_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF1_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF1_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF1_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF1_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF1_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF1_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF1_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIF1_4,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF2_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF2_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF2_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF2_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF2_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF2_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF2_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF2_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF2_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF2_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF2_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF2_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF2_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF3_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF3_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF3_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF3_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF3_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF3_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF3_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF3_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF3_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF3_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF3_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF3_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF3_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF3_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF4_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF4_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF4_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF4_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF4_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF4_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF4_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF4_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF4_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF4_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF4_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF4_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF4_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF4_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF4_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF4_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF4_4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_4, FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF5_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF5_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF5_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_4, FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF5_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF5_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF5_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_4, FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF5_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF4_4, FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIF5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF5_3, FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_RCN_1, FN_SEL_RSP_0, FN_SEL_RSP_1, FN_SEL_SCIFA0_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA0_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, FN_SEL_SCIFA0_3, FN_SEL_SCIFA1_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA0_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, FN_SEL_SCIFA0_3, FN_SEL_SCIFA1_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA0_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, FN_SEL_SCIFA0_3, FN_SEL_SCIFA1_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, FN_SEL_SCIFA0_3, FN_SEL_SCIFA1_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA1_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA1_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA1_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA2_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA2_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA2_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA2_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA2_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFA3_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA3_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA3_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA3_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA3_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA3_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA3_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA3_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA4_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA4_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA4_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA4_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA4_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA4_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA4_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA4_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA4_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA4_2, FN_SEL_SCIFA4_3, FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA4_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA4_2, FN_SEL_SCIFA4_3, FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA5_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA5_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA5_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA4_2, FN_SEL_SCIFA4_3, FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA5_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA5_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA5_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA4_2, FN_SEL_SCIFA4_3, FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA5_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFA5_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFA5_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA5_2, FN_SEL_SCIFA5_3, FN_SEL_SPDM_0, FN_SEL_SPDM_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFA5_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA5_2, FN_SEL_SCIFA5_3, FN_SEL_SPDM_0, FN_SEL_SPDM_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SCIFB1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB1_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB1_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB1_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB1_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB1_4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_4,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB1_5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB1_6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB2_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB2_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB2_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB2_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB2_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB2_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB2_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB2_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFB_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFB_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIFB_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIFCLK_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIFCLK_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SCIF_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF_0, FN_SEL_SCIF_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF_0, FN_SEL_SCIF_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SCIF_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SCIF_0, FN_SEL_SCIF_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SCIF_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SCIF_0, FN_SEL_SCIF_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SCIF_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SCIF_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SDHI2_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SDHI2_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SDHI2_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SDHI2_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SIMCARD_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SIMCARD_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SIMCARD_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SIMCARD_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SIMCARD_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SIMCARD_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SIMCARD_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SIMCARD_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SIM_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SIM_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SIM_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SIM_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SIM_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SIM_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SIM_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SOF0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SOF0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SOF0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SOF1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SOF1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF1_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF1_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF1_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF1_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF1_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF1_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF2_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF2_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF2_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF2_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF2_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF2_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF2_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF2_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF2_4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SOF2_4,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SOF2_4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SOF2_4,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SOF3_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SOF3_0, FN_SEL_SOF3_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SOF3_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SOF3_0, FN_SEL_SOF3_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SPDM_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA5_2, FN_SEL_SCIFA5_3, FN_SEL_SPDM_0, FN_SEL_SPDM_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SPDM_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIFA5_2, FN_SEL_SCIFA5_3, FN_SEL_SPDM_0, FN_SEL_SPDM_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SPEED_PULSE_IF_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SPEED_PULSE_IF_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SPEED_PULSE_IF_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SPEED_PULSE_IF_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSI0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI0_0, FN_SEL_SSI0_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI0_0, FN_SEL_SSI0_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI0_0, FN_SEL_SSI0_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI0_0, FN_SEL_SSI0_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI1_0, FN_SEL_SSI1_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI1_0, FN_SEL_SSI1_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI1_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF5_3, FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI1_0, FN_SEL_SSI1_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI1_0, FN_SEL_SSI1_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI1_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF5_3, FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI2_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SCIF5_3, FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI2_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI2_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI2_1, FN_SEL_SSI4_0, FN_SEL_SSI4_1, FN_SEL_SSI5_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI4_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI2_1, FN_SEL_SSI4_0, FN_SEL_SSI4_1, FN_SEL_SSI5_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI4_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI2_1, FN_SEL_SSI4_0, FN_SEL_SSI4_1, FN_SEL_SSI5_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI5_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI5_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI2_1, FN_SEL_SSI4_0, FN_SEL_SSI4_1, FN_SEL_SSI5_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI5_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI5_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI5_1, FN_SEL_SSI6_0, FN_SEL_SSI6_1, FN_SEL_SSI7_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI5_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI6_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI6_0, FN_SEL_SSI6_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI6_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI5_1, FN_SEL_SSI6_0, FN_SEL_SSI6_1, FN_SEL_SSI7_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI6_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI6_0, FN_SEL_SSI6_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI6_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI5_1, FN_SEL_SSI6_0, FN_SEL_SSI6_1, FN_SEL_SSI7_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI7_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI7_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI7_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI7_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI5_1, FN_SEL_SSI6_0, FN_SEL_SSI6_1, FN_SEL_SSI7_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI7_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI7_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI7_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI7_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI7_1, FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI9_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI7_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI8_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI8_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI8_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI8_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI7_1, FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI9_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI8_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI8_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI8_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI8_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI7_1, FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI9_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI8_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSI9_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI9_0, FN_SEL_SSI9_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI9_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI9_0, FN_SEL_SSI9_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI9_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI7_1, FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI9_0,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI9_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSI9_0, FN_SEL_SSI9_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSI9_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSI9_0, FN_SEL_SSI9_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSI9_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_SSI9_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_SSI_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSI_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSI_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSI_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_0_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_0_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_0_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_0_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_0_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_0_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_0_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_0_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_0_4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_0_4,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_1_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_1_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_1_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP1_1_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_SSP1_1_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_SSP_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSP_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSP_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSP_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_SSP_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSP_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_SSP_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_SSP_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TIMER_TMU_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TIMER_TMU_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TIMER_TMU_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TIMER_TMU_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TMU1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TMU1_0, FN_SEL_TMU1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TMU1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_TMU1_0, FN_SEL_TMU1_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_TMU1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_TMU1_0, FN_SEL_TMU1_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TMU1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TMU1_0, FN_SEL_TMU1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TMU1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_TMU1_0, FN_SEL_TMU1_1,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_TMU1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_TMU1_0, FN_SEL_TMU1_1,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TMU_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TMU_0, FN_SEL_TMU_1, FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_TMU_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TMU_0, FN_SEL_TMU_1, FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_TSIF0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF0_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_TSIF0_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TSIF0_0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TMU_0, FN_SEL_TMU_1, FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_TSIF0_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF0_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF0_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_TSIF0_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TSIF0_1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TMU_0, FN_SEL_TMU_1, FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_TSIF0_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF0_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF0_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF0_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_TSIF0_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TSIF0_2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, FN_SEL_CAN0_0, FN_SEL_CAN0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_TSIF0_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF0_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF0_3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF0_3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_TSIF0_3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_TSIF0_3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, FN_SEL_CAN0_0, FN_SEL_CAN0_1,$/;"	e	enum:__anona307901d0103	file:
FN_SEL_TSIF0_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF0_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF0_4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF0_4,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF1_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF1_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF1_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF1_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF1_2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_TSIF1_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF1_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_TSIF1_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_TSIF1_3,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_VI0_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI0_0, FN_SEL_VI0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI0_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI0_0, FN_SEL_VI0_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI1_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI1_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_VI1_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1,$/;"	e	enum:__anona307879b0103	file:
FN_SEL_VI1_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_VI1_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI1_1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_VI1_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1,$/;"	e	enum:__anona307879b0103	file:
FN_SEL_VI1_1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_VI1_2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,$/;"	e	enum:__anona307835a0103	file:
FN_SEL_VI1_2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,$/;"	e	enum:__anona3078bdc0103	file:
FN_SEL_VI2_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI2_0, FN_SEL_VI2_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI2_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI2_0, FN_SEL_VI2_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI3_0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI3_0, FN_SEL_VI3_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VI3_1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SEL_VI3_0, FN_SEL_VI3_1,$/;"	e	enum:__anona3077f190103	file:
FN_SEL_VIN4_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_VIN4_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_VIN4_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_VIN4_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_VSP_0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_VSP_0,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_VSP_1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_VSP_1,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_VSP_2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_VSP_2,$/;"	e	enum:__anona307945e0103	file:
FN_SEL_VSP_3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SEL_VSP_3,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_SIM0_CLK_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_CLK_A,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_CLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_CLK_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_CLK_B,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_CLK_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_CLK_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_CLK_C,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_CLK_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_CLK_D,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_D	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_D, FN_IERX, FN_CAN1_RX_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SIM0_D_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_D_A,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_D_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_D_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_SIM0_D_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_D_B,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_D_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_D_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_D_C,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_D_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_D_D,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_RST	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_RST	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_SIM0_RST_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_RST_A,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_RST_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_RST_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,$/;"	e	enum:__anona3078bdc0103	file:
FN_SIM0_RST_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_RST_B,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_RST_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,$/;"	e	enum:__anona3077f190103	file:
FN_SIM0_RST_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_RST_C,$/;"	e	enum:__anona307945e0103	file:
FN_SIM0_RST_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SIM0_RST_D,$/;"	e	enum:__anona307945e0103	file:
FN_SI_SCK9_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SI_SCK9_B,$/;"	e	enum:__anona307945e0103	file:
FN_SPCLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_SPCLK_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SPEEDIN_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SPEEDIN_A,$/;"	e	enum:__anona307945e0103	file:
FN_SPEEDIN_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_SPEEDIN_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SPEEDIN_B,$/;"	e	enum:__anona307945e0103	file:
FN_SPV_EVEN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,$/;"	e	enum:__anona3077f190103	file:
FN_SPV_EVEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SPV_EVEN,$/;"	e	enum:__anona307945e0103	file:
FN_SS1_SDATA2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SS1_SDATA2_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SCK0129	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_SCK0129	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SCK1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SCK1_A,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SCK1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SCK1_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SCK2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SCK2_A,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SCK2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SCK2_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SCK3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,$/;"	e	enum:__anona307879b0103	file:
FN_SSI_SCK4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,$/;"	e	enum:__anona307879b0103	file:
FN_SSI_SCK5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SCK5,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SCK5_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SCK6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DOTCLKOUT1, FN_CAN_DEBUGOUT12, FN_SSI_SCK6, FN_SCIFA1_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SCK6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_SCK6_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SCK78	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, FN_SSI_SCK78,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SCK78_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_SCK78_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AUDIO_CLKA_B, FN_AVB_MDIO, FN_SSI_SCK78_B, FN_HSCIF0_HTX,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SCK9_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SCK9_A,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SDATA0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SDATA1_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SDATA3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,$/;"	e	enum:__anona307879b0103	file:
FN_SSI_SDATA4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,$/;"	e	enum:__anona307879b0103	file:
FN_SSI_SDATA5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT11, FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SDATA5,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_SDATA5_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF2_TXD_C, FN_IIC1_SDA_D, FN_AVB_TXD7, FN_SSI_SDATA5_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN_DEBUGOUT14, FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_SDATA6_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SDATA6_B, FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, FN_SSI_SDATA7,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA7_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_MAGIC, FN_SSI_SDATA7_B, FN_HSCIF0_HRTS_N, FN_VI0_R7,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA7_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_SDATA8_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_TXD_D, FN_I2C0_SDA_E, FN_AVB_PHY_INT, FN_SSI_SDATA8_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_SDATA8_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_SDATA9_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_SDATA9_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS0129	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS1_A,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS1_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS2_A,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS2_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,$/;"	e	enum:__anona307879b0103	file:
FN_SSI_WS4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,$/;"	e	enum:__anona307879b0103	file:
FN_SSI_WS5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS5,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS5_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_EXHSYNC_DU1_HSYNC, FN_CAN_DEBUGOUT13, FN_SSI_WS6,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_WS6_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_WS6_B, FN_DREQ0_N, FN_SCIFB1_RXD,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS78	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, FN_SSI_WS78,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS78_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B,$/;"	e	enum:__anona307901d0103	file:
FN_SSI_WS78_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,$/;"	e	enum:__anona3077f190103	file:
FN_SSI_WS9_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS9_A,$/;"	e	enum:__anona307945e0103	file:
FN_SSI_WS9_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_SSI_WS9_B,$/;"	e	enum:__anona307945e0103	file:
FN_SSL	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,$/;"	e	enum:__anona307879b0103	file:
FN_SSL_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_STM_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,$/;"	e	enum:__anona3077f190103	file:
FN_STMx_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STMx_A,$/;"	e	enum:__anona307945e0103	file:
FN_STMx_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STMx_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IDS_0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IDS_0_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IEN_1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IEN_1_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IOD_1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IOD_1_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_STP_ISCLK_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_ISCLK_0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_0_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISCLK_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_0_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_0_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_0_E,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_1_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISCLK_1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_1_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_1_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISCLK_1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISCLK_1_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_ISD_0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_0_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISD_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_0_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_0_E,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_1_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISD_1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_1_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISD_1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISD_1_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_ISEN_0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_0_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISEN_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_0_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_0_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_0_E,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISEN_1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_1_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_1_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISEN_1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISEN_1_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_ISSYNC_0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_0_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISSYNC_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_0_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_0_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_0_E,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_1_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,$/;"	e	enum:__anona3077f190103	file:
FN_STP_ISSYNC_1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_1_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_1_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_ISSYNC_1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_ISSYNC_1_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,$/;"	e	enum:__anona307835a0103	file:
FN_STP_IVCXO27_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_IVCXO27_0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_0_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,$/;"	e	enum:__anona3077f190103	file:
FN_STP_IVCXO27_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_0_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_0_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_0_E,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_1_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_IVCXO27_1_B, FN_HRX0_F,$/;"	e	enum:__anona3077f190103	file:
FN_STP_IVCXO27_1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_1_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_1_C,$/;"	e	enum:__anona307945e0103	file:
FN_STP_IVCXO27_1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_IVCXO27_1_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_OPWM_0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_OPWM_0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_OPWM_0_A,$/;"	e	enum:__anona307945e0103	file:
FN_STP_OPWM_0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_STP_OPWM_0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_OPWM_0_B,$/;"	e	enum:__anona307945e0103	file:
FN_STP_OPWM_0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_OPWM_0_D,$/;"	e	enum:__anona307945e0103	file:
FN_STP_OPWM_0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_OPWM_0_E,$/;"	e	enum:__anona307945e0103	file:
FN_STP_OPWM__C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_STP_OPWM__C,$/;"	e	enum:__anona307945e0103	file:
FN_TCLK1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,$/;"	e	enum:__anona307879b0103	file:
FN_TCLK1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_TCLK1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TCLK1_A,$/;"	e	enum:__anona307945e0103	file:
FN_TCLK1_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona307835a0103	file:
FN_TCLK1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TCLK1_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307901d0103	file:
FN_TCLK1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TCLK1_B,$/;"	e	enum:__anona307945e0103	file:
FN_TCLK2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,$/;"	e	enum:__anona307879b0103	file:
FN_TCLK2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_TCLK2, FN_VI1_DATA3_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_TCLK2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TCLK2_A,$/;"	e	enum:__anona307945e0103	file:
FN_TCLK2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TCLK2_B,$/;"	e	enum:__anona307945e0103	file:
FN_TCLK3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,$/;"	e	enum:__anona307879b0103	file:
FN_TPU0TO0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,$/;"	e	enum:__anona307879b0103	file:
FN_TPU0TO0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TPU0TO0,$/;"	e	enum:__anona307945e0103	file:
FN_TPU0TO1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,$/;"	e	enum:__anona307879b0103	file:
FN_TPU0TO1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TPU0TO1,$/;"	e	enum:__anona307945e0103	file:
FN_TPU0TO2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,$/;"	e	enum:__anona307879b0103	file:
FN_TPU0TO2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TPU0TO2,$/;"	e	enum:__anona307945e0103	file:
FN_TPU0TO3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,$/;"	e	enum:__anona307879b0103	file:
FN_TPU0TO3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TPU0TO3,$/;"	e	enum:__anona307945e0103	file:
FN_TPUTO0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0,$/;"	e	enum:__anona307901d0103	file:
FN_TPUTO0_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0,$/;"	e	enum:__anona307901d0103	file:
FN_TPUTO1_B	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B,$/;"	e	enum:__anona307901d0103	file:
FN_TPU_TO0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_TS_SCK0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK0_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SCK0_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_TS_SCK0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TS_SCK0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK0_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK0_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SCK0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK0_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SCK0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK0_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK0_E,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SCK1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK1_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SCK1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK1_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SCK1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK1_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SCK1_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SCK_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_TS_SDAT0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT0_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDAT0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT0_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT0_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDAT0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT0_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDAT0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT0_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT0_E,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDAT1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDAT1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT1_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDAT1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT1_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDAT1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDAT1_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDATA0_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_TS_SDATA0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TS_SDATA_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B,$/;"	e	enum:__anona307901d0103	file:
FN_TS_SDEN0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN0_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDEN0_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,$/;"	e	enum:__anona307835a0103	file:
FN_TS_SDEN0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TS_SDEN0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN0_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN0_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDEN0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN0_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDEN0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN0_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN0_E,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDEN1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN1_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDEN1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN1_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SDEN1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN1_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDEN1_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SDEN_D	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_TS_SDT1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SDT1_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC0_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,$/;"	e	enum:__anona307835a0103	file:
FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC0_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC0_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SPSYNC0_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC0_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC0_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SPSYNC0_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC0_D,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC0_E	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC0_E,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SPSYNC1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC1_A,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SPSYNC1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC1_B,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,$/;"	e	enum:__anona3077f190103	file:
FN_TS_SPSYNC1_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC1_C,$/;"	e	enum:__anona307945e0103	file:
FN_TS_SPSYNC1_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TS_SPSYNC1_D,$/;"	e	enum:__anona307945e0103	file:
FN_TX0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,$/;"	e	enum:__anona307879b0103	file:
FN_TX0_E	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,$/;"	e	enum:__anona307879b0103	file:
FN_TX1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX1_B,$/;"	e	enum:__anona307945e0103	file:
FN_TX1_C	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,$/;"	e	enum:__anona3077f190103	file:
FN_TX1_C	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona307835a0103	file:
FN_TX1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX1_D	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,$/;"	e	enum:__anona3077f190103	file:
FN_TX1_E	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,$/;"	e	enum:__anona3077f190103	file:
FN_TX2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,$/;"	e	enum:__anona307879b0103	file:
FN_TX2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX2_B,$/;"	e	enum:__anona307945e0103	file:
FN_TX2_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_TX3, FN_DREQ1, FN_RX3,$/;"	e	enum:__anona307879b0103	file:
FN_TX3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX3_A,$/;"	e	enum:__anona307945e0103	file:
FN_TX3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX3_B,$/;"	e	enum:__anona307945e0103	file:
FN_TX3_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SCIFA5_TXD_B, FN_TX3_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX4_A,$/;"	e	enum:__anona307945e0103	file:
FN_TX4_B	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_TX4_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX4_B,$/;"	e	enum:__anona307945e0103	file:
FN_TX4_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,$/;"	e	enum:__anona3078bdc0103	file:
FN_TX4_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX4_C,$/;"	e	enum:__anona307945e0103	file:
FN_TX5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_TX5,$/;"	e	enum:__anona307945e0103	file:
FN_TX5_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_USB0_EXTP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,$/;"	e	enum:__anona3077f190103	file:
FN_USB0_IDIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_USB0_OVC	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,$/;"	e	enum:__anona307835a0103	file:
FN_USB0_OVC	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,$/;"	e	enum:__anona3078bdc0103	file:
FN_USB0_OVC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC,$/;"	e	enum:__anona307901d0103	file:
FN_USB0_OVC_VBUS	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,$/;"	e	enum:__anona3077f190103	file:
FN_USB0_PWEN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,$/;"	e	enum:__anona3077f190103	file:
FN_USB0_PWEN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,$/;"	e	enum:__anona307835a0103	file:
FN_USB0_PWEN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,$/;"	e	enum:__anona3078bdc0103	file:
FN_USB0_PWEN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC,$/;"	e	enum:__anona307901d0103	file:
FN_USB1_EXTP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_USB1_IDIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_USB1_OVC	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC,$/;"	e	enum:__anona307901d0103	file:
FN_USB1_PWEN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,$/;"	e	enum:__anona307835a0103	file:
FN_USB1_PWEN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,$/;"	e	enum:__anona3078bdc0103	file:
FN_USB1_PWEN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC,$/;"	e	enum:__anona307901d0103	file:
FN_USB2_EXTP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,$/;"	e	enum:__anona3077f190103	file:
FN_USB2_IDIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,$/;"	e	enum:__anona3077f190103	file:
FN_USB2_OVC	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,$/;"	e	enum:__anona3077f190103	file:
FN_USB2_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_USB2_OVC,$/;"	e	enum:__anona307945e0103	file:
FN_USB2_PWEN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,$/;"	e	enum:__anona3077f190103	file:
FN_USB2_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_USB2_PWEN,$/;"	e	enum:__anona307945e0103	file:
FN_V15_DATA15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_V15_DATA15,$/;"	e	enum:__anona307945e0103	file:
FN_VI0_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_CLK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_CLK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CC50_STATE31, FN_VI0_CLK, FN_AVB_RX_CLK, FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_CLKENB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_CLKENB	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD5, FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, FN_VI0_CLKENB,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_CLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_D0_B0_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D10_G2_Y2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D11_G3_Y3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D12_G4_Y4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D13_G5_Y5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D14_G6_Y6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D15_G7_Y7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D16_R0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_/;"	e	enum:__anona307879b0103	file:
FN_VI0_D17_R1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_/;"	e	enum:__anona307879b0103	file:
FN_VI0_D18_R2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_/;"	e	enum:__anona307879b0103	file:
FN_VI0_D19_R3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_/;"	e	enum:__anona307879b0103	file:
FN_VI0_D1_B1_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D20_R4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D21_R5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D22_R6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D23_R7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D2_B2_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D3_B3_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D4_B4_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D5_B5_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D6_B6_C6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D7_B7_C7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D8_G0_Y0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_D9_G1_Y1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CC50_STATE31, FN_VI0_CLK, FN_AVB_RX_CLK, FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA0_VI0_B0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA0_VI0_B1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA0_VI0_B2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA0_VI0_B4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA0_VI0_B5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA0_VI0_B6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA0_VI0_B7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_DATA0_VI0_B7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_DATA1_VI0_B1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA1_VI0_B1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RX_DV, FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, FN_VI0_DATA2_VI0_B2,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA1_VI0_B1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA2_VI0_B2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA2_VI0_B2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RX_DV, FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, FN_VI0_DATA2_VI0_B2,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA2_VI0_B2_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA3_VI0_B3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA3_VI0_B3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD1, FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA3_VI0_B3_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA4_VI0_B4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA4_VI0_B4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD1, FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA4_VI0_B4_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA5_VI0_B5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA5_VI0_B5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD3, FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, FN_VI0_DATA6_VI0_B6,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA5_VI0_B5_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA6_VI0_B6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA6_VI0_B6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD3, FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, FN_VI0_DATA6_VI0_B6,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA6_VI0_B6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA7_VI0_B7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_DATA7_VI0_B7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_RXD5, FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, FN_VI0_CLKENB,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_DATA7_VI0_B7_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI0_FIELD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_FIELD,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_FIELD	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_G7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_HSYNC_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R0	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R1	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R2	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R3	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R4	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SSI_SDATA6_B, FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_R5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_R5	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_R6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_R6	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_R7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona307835a0103	file:
FN_VI0_R7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI0_R7	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_AVB_MAGIC, FN_SSI_SDATA7_B, FN_HSCIF0_HRTS_N, FN_VI0_R7,$/;"	e	enum:__anona307901d0103	file:
FN_VI0_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI0_VSYNC_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N,$/;"	e	enum:__anona307901d0103	file:
FN_VI1_CLK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_CLK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_CLK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_CLKENB	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_CLKENB	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_CLKENB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_CLKENB	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_CLKENB_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_CLKENB_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_CLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_CLK_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_D0_B0_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D10_G2_Y2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D11_G3_Y3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D12_G4_Y4_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_/;"	e	enum:__anona307879b0103	file:
FN_VI1_D12_G4_Y4_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D13_G5_Y5_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_/;"	e	enum:__anona307879b0103	file:
FN_VI1_D13_G5_Y5_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D14_G6_Y6_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_/;"	e	enum:__anona307879b0103	file:
FN_VI1_D14_G6_Y6_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D15_G7_Y7_0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_/;"	e	enum:__anona307879b0103	file:
FN_VI1_D15_G7_Y7_1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D16_R0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D17_R1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D18_R2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D19_R3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D1_B1_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D20_R4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D21_R5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D22_R6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D23_R7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D2_B2_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D3_B3_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D4_B4_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D5_B5_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D6_B6_C6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D7_B7_C7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D8_G0_Y0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_D9_G1_Y1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_DATA0	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA0	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA0_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA0_VI1_B0	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA0_VI1_B0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA1	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA1	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA1_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA1_VI1_B1	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA1_VI1_B1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA2	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA2	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA2_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA2_VI1_B2	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA2_VI1_B2_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA3	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA3	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA3_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_TCLK2, FN_VI1_DATA3_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA3_VI1_B3	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA3_VI1_B3_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA4	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA4	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA4_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA4_VI1_B4	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA4_VI1_B4_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA5	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA5	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA5_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA5_VI1_B5	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA5_VI1_B5_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA6_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA6_VI1_B6	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA6_VI1_B6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_DATA7, FN_AVB_MDC,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_DATA7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_DATA7, FN_AVB_MDC,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA7_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_DATA7_VI1_B7	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_DATA7_VI1_B7_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_FIELD	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_FIELD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_FIELD,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_FIELD	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_FIELD_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G2_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G3_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G4_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G5_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G6_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_G6_B, FN_SCIFA3_RXD_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_G7_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_G7_B, FN_SCIFA3_SCK_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_HSYNC_N	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_HSYNC_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_HSYNC_N_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_R0_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_R1_B	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,$/;"	e	enum:__anona307879b0103	file:
FN_VI1_VSYNC_N	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_VSYNC_N	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona307835a0103	file:
FN_VI1_VSYNC_N	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI1_VSYNC_N_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,$/;"	e	enum:__anona3077f190103	file:
FN_VI1_VSYNC_N_C	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI2_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_CLKENB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D0_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D10_Y2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D11_Y3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D12_Y4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D13_Y5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D14_Y6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D15_Y7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D1_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D2_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D3_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D4_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D5_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D6_C6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D7_C7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D8_Y0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_D9_Y1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_DATA6	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona307835a0103	file:
FN_VI2_DATA6	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI2_DATA6_VI2_B6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,$/;"	e	enum:__anona3077f190103	file:
FN_VI2_DATA7	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona307835a0103	file:
FN_VI2_DATA7	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,$/;"	e	enum:__anona3078bdc0103	file:
FN_VI2_DATA7_VI2_B7_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,$/;"	e	enum:__anona3077f190103	file:
FN_VI2_FIELD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_FIELD, FN_AVB_TXD2,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,$/;"	e	enum:__anona307879b0103	file:
FN_VI2_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_CLKENB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_CLK_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_CLK_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_D0_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D10_Y2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D11_Y3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D11_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D12_Y4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D13_Y5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D14_Y6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D15_Y7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D1_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D2_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D3_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D4_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D5_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D6_C6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D7_C7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D8_Y0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_D9_Y1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_DATA0_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA1_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA2_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA3_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA4_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA5_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA6_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_GLO_I0_B, FN_VI3_DATA6_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_DATA7_B	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B,$/;"	e	enum:__anona3077f190103	file:
FN_VI3_FIELD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_FIELD,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,$/;"	e	enum:__anona307879b0103	file:
FN_VI3_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_CLK,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_CLKENB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_CLKENB	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_CLKENB,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_D0_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D10_Y2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D11_Y3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D1_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_/;"	e	enum:__anona307879b0103	file:
FN_VI4_D2_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_/;"	e	enum:__anona307879b0103	file:
FN_VI4_D3_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_/;"	e	enum:__anona307879b0103	file:
FN_VI4_D4_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_/;"	e	enum:__anona307879b0103	file:
FN_VI4_D5_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D6_C6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D7_C7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D8_Y0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_D9_Y1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_DATA0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA0_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA0_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA0_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA10,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA11,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA12,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA13,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA14,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA15,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA16	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA16,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA17	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA17,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA18	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA18,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA19	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA19,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA1_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA1_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA1_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA20	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA20,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA21	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA21,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA22	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA22,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA23	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA23,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA2_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA2_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA2_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA3_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA3_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA3_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA3_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA4_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA4_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA4_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA4_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA5_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA5_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA5_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA5_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA6_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA6_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA6_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA6_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA7_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA7_A,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA7_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA7_B,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA8,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_DATA9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_DATA9,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_FIELD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_FIELD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_FIELD,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_HSYNCx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_HSYNCx,$/;"	e	enum:__anona307945e0103	file:
FN_VI4_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,$/;"	e	enum:__anona307879b0103	file:
FN_VI4_VSYNCx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI4_VSYNCx,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_CLK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_CLK,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_CLKENB	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_CLKENB	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_CLKENB,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_D0_C0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D10_Y2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D11_Y3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D1_C1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D2_C2	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D3_C3	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D4_C4	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D5_C5	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D6_C6	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D7_C7	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D8_Y0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_D9_Y1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_DATA0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA0,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA1,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA10,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA11,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA12,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA13,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA14,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA2,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA3,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA4,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA5,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA6,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA7,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA8,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_DATA9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_DATA9,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_FIELD	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_FIELD,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_FIELD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_FIELD,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_HSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_HSYNCx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_HSYNCx,$/;"	e	enum:__anona307945e0103	file:
FN_VI5_VSYNC	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anona307879b0103	file:
FN_VI5_VSYNCx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VI5_VSYNCx,$/;"	e	enum:__anona307945e0103	file:
FN_VSP	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,$/;"	e	enum:__anona3077f190103	file:
FN_VSP_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VSP_A,$/;"	e	enum:__anona307945e0103	file:
FN_VSP_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VSP_B,$/;"	e	enum:__anona307945e0103	file:
FN_VSP_C	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VSP_C,$/;"	e	enum:__anona307945e0103	file:
FN_VSP_D	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FN_VSP_D,$/;"	e	enum:__anona307945e0103	file:
FN_WE0	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,$/;"	e	enum:__anona307879b0103	file:
FN_WE0_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0,$/;"	e	enum:__anona307901d0103	file:
FN_WE1	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,$/;"	e	enum:__anona307879b0103	file:
FN_WE1_N	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0,$/;"	e	enum:__anona307901d0103	file:
FO	examples/standalone/stubs.c	/^#define FO(/;"	d	file:
FOLLOWING	arch/xtensa/include/asm/ldscript.h	/^#define FOLLOWING(/;"	d
FONT_BEGIN	drivers/video/console_truetype.c	/^#define FONT_BEGIN(/;"	d	file:
FONT_DECL	drivers/video/console_truetype.c	/^#define FONT_DECL(/;"	d	file:
FONT_END	drivers/video/console_truetype.c	/^#define FONT_END(/;"	d	file:
FONT_ENTRY	drivers/video/console_truetype.c	/^#define FONT_ENTRY(/;"	d	file:
FONT_IS_VALID	drivers/video/console_truetype.c	/^#define FONT_IS_VALID(/;"	d	file:
FORCE	Makefile	/^FORCE:$/;"	t
FORCE	board/hisilicon/hikey/build-tf.mak	/^FORCE:$/;"	t
FORCEIDLE	drivers/usb/musb-new/omap2430.h	/^#	define	FORCEIDLE	/;"	d
FORCEON_AIC	include/radeon.h	/^#define FORCEON_AIC	/;"	d
FORCEON_MC	include/radeon.h	/^#define FORCEON_MC	/;"	d
FORCEON_MCLKA	include/radeon.h	/^#define FORCEON_MCLKA	/;"	d
FORCEON_MCLKB	include/radeon.h	/^#define FORCEON_MCLKB	/;"	d
FORCEON_YCLKA	include/radeon.h	/^#define FORCEON_YCLKA	/;"	d
FORCEON_YCLKB	include/radeon.h	/^#define FORCEON_YCLKB	/;"	d
FORCESTDBY	drivers/usb/musb-new/omap2430.h	/^#	define	FORCESTDBY	/;"	d
FORCE_16BIT_DDRIO	arch/x86/cpu/quark/smc.h	/^#define FORCE_16BIT_DDRIO$/;"	d
FORCE_CHA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define FORCE_CHA	/;"	d
FORCE_CHA	arch/arm/mach-exynos/include/mach/dp.h	/^#define FORCE_CHA	/;"	d
FORCE_DATATOGGLE_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FORCE_DATATOGGLE_T	/;"	d
FORCE_DET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define FORCE_DET	/;"	d
FORCE_DET	arch/arm/mach-exynos/include/mach/dp.h	/^#define FORCE_DET	/;"	d
FORCE_DLL_RESYNC	arch/arm/mach-exynos/exynos4_setup.h	/^#define FORCE_DLL_RESYNC	/;"	d
FORCE_EVENT	drivers/usb/host/xhci.h	/^#define	FORCE_EVENT	/;"	d
FORCE_INLINE	lib/lz4_wrapper.c	/^#define FORCE_INLINE /;"	d	file:
FORCE_MEDIA	drivers/net/ax88180.h	/^#define FORCE_MEDIA	/;"	d
FORCE_OUTPUT	arch/xtensa/include/asm/ldscript.h	/^#define FORCE_OUTPUT	/;"	d
FORCE_SUSPEND_0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define FORCE_SUSPEND_0 /;"	d
FORM	board/cm5200/cm5200.h	/^	FORM,			\/* 3 *\/$/;"	e	enum:__anonb595836f0103
FORMAT_SEL	arch/arm/mach-exynos/include/mach/dp.h	/^#define FORMAT_SEL	/;"	d
FORM_LEN	board/cm5200/cm5200.h	/^#define FORM_LEN	/;"	d
FORM_OFFSET	board/cm5200/cm5200.h	/^#define FORM_OFFSET	/;"	d
FORWARD	arch/x86/cpu/quark/mrc_util.h	/^	FORWARD$/;"	e	enum:__anon78bf36a60103
FORWARDING	include/mv88e6352.h	/^#define FORWARDING	/;"	d
FOUTBPLL	arch/arm/mach-exynos/exynos5_setup.h	/^#define FOUTBPLL /;"	d
FOUT_AUD_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FOUT_AUD_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define FOUT_AUD_PLL	/;"	d
FP	examples/standalone/ppc_longjmp.S	/^#define FP(/;"	d	file:
FP	examples/standalone/ppc_setjmp.S	/^#define FP(/;"	d	file:
FP2_BLANK_EN	include/radeon.h	/^#define FP2_BLANK_EN	/;"	d
FP2_CRC_EN	include/radeon.h	/^#define FP2_CRC_EN	/;"	d
FP2_CRC_READ_EN	include/radeon.h	/^#define FP2_CRC_READ_EN	/;"	d
FP2_DV0_EN	include/radeon.h	/^#define FP2_DV0_EN	/;"	d
FP2_DV0_RATE_SEL_SDR	include/radeon.h	/^#define FP2_DV0_RATE_SEL_SDR	/;"	d
FP2_FP_POL	include/radeon.h	/^#define FP2_FP_POL	/;"	d
FP2_GEN_CNTL	include/radeon.h	/^#define FP2_GEN_CNTL	/;"	d
FP2_LCD_CNTL_MASK	include/radeon.h	/^#define FP2_LCD_CNTL_MASK	/;"	d
FP2_LP_POL	include/radeon.h	/^#define FP2_LP_POL	/;"	d
FP2_ON	include/radeon.h	/^#define FP2_ON	/;"	d
FP2_PAD_FLOP_EN	include/radeon.h	/^#define FP2_PAD_FLOP_EN	/;"	d
FP2_PANEL_FORMAT	include/radeon.h	/^#define FP2_PANEL_FORMAT	/;"	d
FP2_SCK_POL	include/radeon.h	/^#define FP2_SCK_POL	/;"	d
FP2_SOURCE_SEL_CRTC2	include/radeon.h	/^#define FP2_SOURCE_SEL_CRTC2	/;"	d
FP2_SOURCE_SEL_MASK	include/radeon.h	/^#define FP2_SOURCE_SEL_MASK	/;"	d
FP2_SRC_SEL_CRTC2	include/radeon.h	/^#define FP2_SRC_SEL_CRTC2	/;"	d
FP2_SRC_SEL_MASK	include/radeon.h	/^#define FP2_SRC_SEL_MASK	/;"	d
FPAR_LP_CI	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_LP_CI /;"	d
FPAR_LP_CI_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_LP_CI_SHIFT /;"	d
FPAR_LP_MS	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_LP_MS /;"	d
FPAR_LP_PI	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_LP_PI /;"	d
FPAR_LP_PI_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_LP_PI_SHIFT /;"	d
FPAR_SP_CI	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_SP_CI /;"	d
FPAR_SP_CI_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_SP_CI_SHIFT /;"	d
FPAR_SP_MS	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_SP_MS /;"	d
FPAR_SP_PI	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_SP_PI /;"	d
FPAR_SP_PI_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define FPAR_SP_PI_SHIFT /;"	d
FPCSR_RM_RIN	arch/openrisc/include/asm/spr-defs.h	/^#define FPCSR_RM_RIN	/;"	d
FPCSR_RM_RIP	arch/openrisc/include/asm/spr-defs.h	/^#define FPCSR_RM_RIP	/;"	d
FPCSR_RM_RN	arch/openrisc/include/asm/spr-defs.h	/^#define FPCSR_RM_RN	/;"	d
FPCSR_RM_RZ	arch/openrisc/include/asm/spr-defs.h	/^#define FPCSR_RM_RZ	/;"	d
FPE	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FPE	/;"	d
FPE	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define FPE	/;"	d
FPE_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define FPE_P	/;"	d
FPGA	drivers/fpga/Kconfig	/^config FPGA$/;"	c	menu:FPGA support
FPGA support	drivers/fpga/Kconfig	/^menu "FPGA support"$/;"	m
FPGA0_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define FPGA0_FREQ /;"	d
FPGA0_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define FPGA0_FREQ /;"	d
FPGA0_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define FPGA0_FREQ /;"	d
FPGA0_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define FPGA0_FREQ /;"	d
FPGA0_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define FPGA0_FREQ /;"	d
FPGA1_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define FPGA1_FREQ /;"	d
FPGA1_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define FPGA1_FREQ /;"	d
FPGA1_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define FPGA1_FREQ /;"	d
FPGA1_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define FPGA1_FREQ /;"	d
FPGA1_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define FPGA1_FREQ /;"	d
FPGA2HPS_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2HPS_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGA2HPS_RESET	/;"	d
FPGA2_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define FPGA2_FREQ /;"	d
FPGA2_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define FPGA2_FREQ /;"	d
FPGA2_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define FPGA2_FREQ /;"	d
FPGA2_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define FPGA2_FREQ /;"	d
FPGA2_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define FPGA2_FREQ /;"	d
FPGA3_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define FPGA3_FREQ /;"	d
FPGA3_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define FPGA3_FREQ /;"	d
FPGA3_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define FPGA3_FREQ /;"	d
FPGA3_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define FPGA3_FREQ /;"	d
FPGA3_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define FPGA3_FREQ /;"	d
FPGAMGRREGS_CTRL_AXICFGEN_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_CTRL_AXICFGEN_MASK	/;"	d
FPGAMGRREGS_CTRL_CDRATIO_LSB	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_CTRL_CDRATIO_LSB	/;"	d
FPGAMGRREGS_CTRL_CFGWDTH_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_CTRL_CFGWDTH_MASK	/;"	d
FPGAMGRREGS_CTRL_EN_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_CTRL_EN_MASK	/;"	d
FPGAMGRREGS_CTRL_NCE_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_CTRL_NCE_MASK	/;"	d
FPGAMGRREGS_CTRL_NCONFIGPULL_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_CTRL_NCONFIGPULL_MASK	/;"	d
FPGAMGRREGS_MODE_CFGPHASE	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MODE_CFGPHASE	/;"	d
FPGAMGRREGS_MODE_FPGAOFF	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MODE_FPGAOFF	/;"	d
FPGAMGRREGS_MODE_INITPHASE	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MODE_INITPHASE	/;"	d
FPGAMGRREGS_MODE_RESETPHASE	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MODE_RESETPHASE	/;"	d
FPGAMGRREGS_MODE_UNKNOWN	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MODE_UNKNOWN	/;"	d
FPGAMGRREGS_MODE_USERMODE	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MODE_USERMODE	/;"	d
FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK	/;"	d
FPGAMGRREGS_MON_GPIO_EXT_PORTA_CRC_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CRC_MASK	/;"	d
FPGAMGRREGS_MON_GPIO_EXT_PORTA_ID_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_ID_MASK	/;"	d
FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK	/;"	d
FPGAMGRREGS_STAT_MODE_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_STAT_MODE_MASK	/;"	d
FPGAMGRREGS_STAT_MSEL_LSB	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_STAT_MSEL_LSB	/;"	d
FPGAMGRREGS_STAT_MSEL_MASK	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define FPGAMGRREGS_STAT_MSEL_MASK	/;"	d
FPGAMGR_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAMGR_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define FPGAMGR_RESET	/;"	d
FPGAREG_BOOT_FLASH	include/configs/xtfpga.h	/^#define FPGAREG_BOOT_FLASH	/;"	d
FPGAREG_BOOT_MASK	include/configs/xtfpga.h	/^#define FPGAREG_BOOT_MASK	/;"	d
FPGAREG_BOOT_RAM	include/configs/xtfpga.h	/^#define FPGAREG_BOOT_RAM	/;"	d
FPGAREG_BOOT_SHIFT	include/configs/xtfpga.h	/^#define FPGAREG_BOOT_SHIFT	/;"	d
FPGAREG_BOOT_WIDTH	include/configs/xtfpga.h	/^#define FPGAREG_BOOT_WIDTH	/;"	d
FPGAREG_DAY_MASK	include/configs/xtfpga.h	/^#define FPGAREG_DAY_MASK	/;"	d
FPGAREG_DAY_SHIFT	include/configs/xtfpga.h	/^#define FPGAREG_DAY_SHIFT	/;"	d
FPGAREG_DAY_WIDTH	include/configs/xtfpga.h	/^#define FPGAREG_DAY_WIDTH	/;"	d
FPGAREG_MAC_MASK	include/configs/xtfpga.h	/^#define FPGAREG_MAC_MASK	/;"	d
FPGAREG_MAC_SHIFT	include/configs/xtfpga.h	/^#define FPGAREG_MAC_SHIFT	/;"	d
FPGAREG_MAC_WIDTH	include/configs/xtfpga.h	/^#define FPGAREG_MAC_WIDTH	/;"	d
FPGAREG_MTH_MASK	include/configs/xtfpga.h	/^#define FPGAREG_MTH_MASK	/;"	d
FPGAREG_MTH_SHIFT	include/configs/xtfpga.h	/^#define FPGAREG_MTH_SHIFT	/;"	d
FPGAREG_MTH_WIDTH	include/configs/xtfpga.h	/^#define FPGAREG_MTH_WIDTH	/;"	d
FPGAREG_YEAR_MASK	include/configs/xtfpga.h	/^#define FPGAREG_YEAR_MASK	/;"	d
FPGAREG_YEAR_SHIFT	include/configs/xtfpga.h	/^#define FPGAREG_YEAR_SHIFT	/;"	d
FPGAREG_YEAR_WIDTH	include/configs/xtfpga.h	/^#define FPGAREG_YEAR_WIDTH	/;"	d
FPGA_88F78XX0_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define FPGA_88F78XX0_ID	/;"	d
FPGA_BA	board/esd/pmc440/pmc440.h	/^#define FPGA_BA /;"	d
FPGA_BASE	board/renesas/r2dplus/r2dplus.c	/^#define FPGA_BASE	/;"	d	file:
FPGA_BASE	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_BASE /;"	d
FPGA_BASE_ADDR	board/amcc/bamboo/bamboo.h	/^#define FPGA_BASE_ADDR	/;"	d
FPGA_BASE_ADDR	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_BASE_ADDR	/;"	d
FPGA_BRDC	board/amcc/walnut/walnut.c	/^#define FPGA_BRDC /;"	d	file:
FPGA_BUFFER	post/board/lwmon5/fpga.c	/^#define FPGA_BUFFER	/;"	d	file:
FPGA_CCLK	board/teejet/mt_ventoux/mt_ventoux.c	/^#define FPGA_CCLK	/;"	d	file:
FPGA_CFCDINTCLR	board/renesas/r2dplus/r2dplus.c	/^#define FPGA_CFCDINTCLR	/;"	d	file:
FPGA_CFCDINTCLR	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_CFCDINTCLR /;"	d
FPGA_CFCTL	board/renesas/r2dplus/r2dplus.c	/^#define FPGA_CFCTL	/;"	d	file:
FPGA_CFCTL	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_CFCTL /;"	d
FPGA_CFPOW	board/renesas/r2dplus/r2dplus.c	/^#define FPGA_CFPOW	/;"	d	file:
FPGA_CFPOW	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_CFPOW /;"	d
FPGA_CLK	board/esd/common/fpga.c	/^# define FPGA_CLK /;"	d	file:
FPGA_CLK_HIGH	board/esd/common/fpga.c	/^#define FPGA_CLK_HIGH /;"	d	file:
FPGA_CLK_LOW	board/esd/common/fpga.c	/^#define FPGA_CLK_LOW /;"	d	file:
FPGA_CLRBITS	board/esd/pmc440/pmc440.h	/^#define FPGA_CLRBITS(/;"	d
FPGA_COOKIE	include/altera.h	/^#define FPGA_COOKIE(/;"	d
FPGA_CTRL	board/esd/plu405/plu405.c	/^#define FPGA_CTRL /;"	d	file:
FPGA_DATA	board/esd/common/fpga.c	/^# define FPGA_DATA /;"	d	file:
FPGA_DATA_HIGH	board/esd/common/fpga.c	/^#define FPGA_DATA_HIGH /;"	d	file:
FPGA_DATA_LOW	board/esd/common/fpga.c	/^#define FPGA_DATA_LOW /;"	d	file:
FPGA_DBSW	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_DBSW /;"	d
FPGA_DEBUG	drivers/fpga/altera.c	/^#define FPGA_DEBUG	/;"	d	file:
FPGA_DIN	board/teejet/mt_ventoux/mt_ventoux.c	/^#define FPGA_DIN	/;"	d	file:
FPGA_DONE	board/esd/common/fpga.c	/^# define FPGA_DONE /;"	d	file:
FPGA_DONE	board/keymile/km_arm/fpga_config.c	/^#define FPGA_DONE	/;"	d	file:
FPGA_DONE	board/keymile/kmp204x/pci.c	/^#define FPGA_DONE	/;"	d	file:
FPGA_DONE	board/teejet/mt_ventoux/mt_ventoux.c	/^#define FPGA_DONE	/;"	d	file:
FPGA_DONE_STATE	board/esd/common/fpga.c	/^# define FPGA_DONE_STATE /;"	d	file:
FPGA_DUMP	cmd/fpga.c	/^#define FPGA_DUMP /;"	d	file:
FPGA_EXTGIO	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_EXTGIO /;"	d
FPGA_FAIL	include/fpga.h	/^#define FPGA_FAIL	/;"	d
FPGA_FB_DIV_10	include/configs/yucca.h	/^#define FPGA_FB_DIV_10	/;"	d
FPGA_FB_DIV_12	include/configs/yucca.h	/^#define FPGA_FB_DIV_12	/;"	d
FPGA_FB_DIV_20	include/configs/yucca.h	/^#define FPGA_FB_DIV_20	/;"	d
FPGA_FB_DIV_6	include/configs/yucca.h	/^#define FPGA_FB_DIV_6	/;"	d
FPGA_GET_REG	include/gdsys_fpga.h	/^#define FPGA_GET_REG(/;"	d
FPGA_GPIO_BASE_ADDR	include/configs/yucca.h	/^#define FPGA_GPIO_BASE_ADDR	/;"	d
FPGA_GPMC_CONFIG1	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_GPMC_CONFIG1	/;"	d
FPGA_GPMC_CONFIG2	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_GPMC_CONFIG2	/;"	d
FPGA_GPMC_CONFIG3	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_GPMC_CONFIG3	/;"	d
FPGA_GPMC_CONFIG4	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_GPMC_CONFIG4	/;"	d
FPGA_GPMC_CONFIG5	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_GPMC_CONFIG5	/;"	d
FPGA_GPMC_CONFIG6	board/teejet/mt_ventoux/mt_ventoux.h	/^#define FPGA_GPMC_CONFIG6	/;"	d
FPGA_HWVER_200	board/gdsys/405ep/iocon.c	/^	FPGA_HWVER_200 = 0,$/;"	e	enum:__anon023d8a7b0303	file:
FPGA_HWVER_210	board/gdsys/405ep/iocon.c	/^	FPGA_HWVER_210 = 1,$/;"	e	enum:__anon023d8a7b0303	file:
FPGA_IN32	board/esd/pmc440/pmc440.h	/^#define FPGA_IN32(/;"	d
FPGA_INFO	cmd/fpga.c	/^#define FPGA_INFO /;"	d	file:
FPGA_INIT	board/esd/common/fpga.c	/^# define FPGA_INIT /;"	d	file:
FPGA_INIT	board/teejet/mt_ventoux/mt_ventoux.c	/^#define FPGA_INIT	/;"	d	file:
FPGA_INIT_B	board/keymile/km_arm/fpga_config.c	/^#define FPGA_INIT_B	/;"	d	file:
FPGA_INIT_L	board/keymile/kmp204x/pci.c	/^#define FPGA_INIT_L	/;"	d	file:
FPGA_INIT_STATE	board/esd/common/fpga.c	/^# define FPGA_INIT_STATE /;"	d	file:
FPGA_INT_BASE_ADDR	include/configs/yucca.h	/^#define FPGA_INT_BASE_ADDR	/;"	d
FPGA_INVALID_DEVICE	include/fpga.h	/^#define FPGA_INVALID_DEVICE	/;"	d
FPGA_IRLMON	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IRLMON /;"	d
FPGA_IRLMSK	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IRLMSK /;"	d
FPGA_IRLPRI1	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IRLPRI1 /;"	d
FPGA_IRLPRI2	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IRLPRI2 /;"	d
FPGA_IRLPRI3	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IRLPRI3 /;"	d
FPGA_IRLPRI4	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IRLPRI4 /;"	d
FPGA_IVDRCR	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IVDRCR /;"	d
FPGA_IVDRMON	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_IVDRMON /;"	d
FPGA_LOAD	cmd/fpga.c	/^#define FPGA_LOAD /;"	d	file:
FPGA_LOADB	cmd/fpga.c	/^#define FPGA_LOADB /;"	d	file:
FPGA_LOADBP	cmd/fpga.c	/^#define FPGA_LOADBP /;"	d	file:
FPGA_LOADFS	cmd/fpga.c	/^#define FPGA_LOADFS /;"	d	file:
FPGA_LOADMK	cmd/fpga.c	/^#define FPGA_LOADMK /;"	d	file:
FPGA_LOADP	cmd/fpga.c	/^#define FPGA_LOADP /;"	d	file:
FPGA_NAND_BUSY	board/socrates/nand.c	/^#define FPGA_NAND_BUSY	/;"	d	file:
FPGA_NAND_CMD_ADDR	board/socrates/nand.c	/^#define FPGA_NAND_CMD_ADDR	/;"	d	file:
FPGA_NAND_CMD_COMMAND	board/socrates/nand.c	/^#define FPGA_NAND_CMD_COMMAND	/;"	d	file:
FPGA_NAND_CMD_MASK	board/socrates/nand.c	/^#define FPGA_NAND_CMD_MASK	/;"	d	file:
FPGA_NAND_CMD_READ	board/socrates/nand.c	/^#define FPGA_NAND_CMD_READ	/;"	d	file:
FPGA_NAND_CMD_WRITE	board/socrates/nand.c	/^#define FPGA_NAND_CMD_WRITE	/;"	d	file:
FPGA_NAND_CTL	board/renesas/ap325rxa/ap325rxa.c	/^#define FPGA_NAND_CTL	/;"	d	file:
FPGA_NAND_DATA_SHIFT	board/socrates/nand.c	/^#define FPGA_NAND_DATA_SHIFT	/;"	d	file:
FPGA_NAND_ENABLE	board/socrates/nand.c	/^#define FPGA_NAND_ENABLE	/;"	d	file:
FPGA_NAND_INIT	board/renesas/ap325rxa/ap325rxa.c	/^#define FPGA_NAND_INIT	/;"	d	file:
FPGA_NAND_RST	board/renesas/ap325rxa/ap325rxa.c	/^#define FPGA_NAND_RST	/;"	d	file:
FPGA_NAND_RST_WAIT	board/renesas/ap325rxa/ap325rxa.c	/^#define FPGA_NAND_RST_WAIT	/;"	d	file:
FPGA_NONE	cmd/fpga.c	/^#define FPGA_NONE /;"	d	file:
FPGA_OBLED	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_OBLED /;"	d
FPGA_OBSW	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_OBSW /;"	d
FPGA_OUT32	board/esd/pmc440/pmc440.h	/^#define FPGA_OUT32(/;"	d
FPGA_PCIBD	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_PCIBD /;"	d
FPGA_PCICD	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_PCICD /;"	d
FPGA_PMR	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_PMR /;"	d
FPGA_PRG	board/esd/common/fpga.c	/^# define FPGA_PRG /;"	d	file:
FPGA_PRG_HIGH	board/esd/common/fpga.c	/^# define FPGA_PRG_HIGH /;"	d	file:
FPGA_PRG_LOW	board/esd/common/fpga.c	/^# define FPGA_PRG_LOW /;"	d	file:
FPGA_PROG	board/keymile/km_arm/fpga_config.c	/^#define FPGA_PROG	/;"	d	file:
FPGA_PROG	board/teejet/mt_ventoux/mt_ventoux.c	/^#define FPGA_PROG	/;"	d	file:
FPGA_PROG_L	board/keymile/kmp204x/pci.c	/^#define FPGA_PROG_L	/;"	d	file:
FPGA_RAM_END	post/board/lwmon5/fpga.c	/^#define FPGA_RAM_END	/;"	d	file:
FPGA_RAM_SIZE	post/board/lwmon5/fpga.c	/^#define FPGA_RAM_SIZE	/;"	d	file:
FPGA_RAM_START	post/board/lwmon5/fpga.c	/^#define FPGA_RAM_START	/;"	d	file:
FPGA_REG0	include/configs/bubinga.h	/^#define FPGA_REG0 /;"	d
FPGA_REG0_EXT_INT_DIS	include/configs/bubinga.h	/^#define FPGA_REG0_EXT_INT_DIS /;"	d
FPGA_REG0_F_RANGE	include/configs/bubinga.h	/^#define FPGA_REG0_F_RANGE /;"	d
FPGA_REG0_LED0	include/configs/bubinga.h	/^#define FPGA_REG0_LED0 /;"	d
FPGA_REG0_LED1	include/configs/bubinga.h	/^#define FPGA_REG0_LED1 /;"	d
FPGA_REG0_LED2	include/configs/bubinga.h	/^#define FPGA_REG0_LED2 /;"	d
FPGA_REG0_LED_MASK	include/configs/bubinga.h	/^#define FPGA_REG0_LED_MASK /;"	d
FPGA_REG1	include/configs/bubinga.h	/^#define FPGA_REG1 /;"	d
FPGA_REG10	include/configs/yucca.h	/^#define FPGA_REG10	/;"	d
FPGA_REG10_100MHZ_ENABLE	include/configs/yucca.h	/^#define FPGA_REG10_100MHZ_ENABLE	/;"	d
FPGA_REG10_10MHZ_ENABLE	include/configs/yucca.h	/^#define FPGA_REG10_10MHZ_ENABLE	/;"	d
FPGA_REG10_AUTO_NEG_DIS	include/configs/yucca.h	/^#define FPGA_REG10_AUTO_NEG_DIS	/;"	d
FPGA_REG10_COLA_MANUAL	include/configs/yucca.h	/^#define FPGA_REG10_COLA_MANUAL	/;"	d
FPGA_REG10_ENABLE_DISPLAY	include/configs/yucca.h	/^#define FPGA_REG10_ENABLE_DISPLAY	/;"	d
FPGA_REG10_ENET_DECODE2	include/configs/yucca.h	/^#define FPGA_REG10_ENET_DECODE2(/;"	d
FPGA_REG10_ENET_ENCODE2	include/configs/yucca.h	/^#define FPGA_REG10_ENET_ENCODE2(/;"	d
FPGA_REG10_FORCE_COLA	include/configs/yucca.h	/^#define FPGA_REG10_FORCE_COLA	/;"	d
FPGA_REG10_FULL_DUPLEX	include/configs/yucca.h	/^#define FPGA_REG10_FULL_DUPLEX	/;"	d
FPGA_REG10_GIGABIT_ENABLE	include/configs/yucca.h	/^#define FPGA_REG10_GIGABIT_ENABLE	/;"	d
FPGA_REG10_INTP_ETH	include/configs/yucca.h	/^#define FPGA_REG10_INTP_ETH	/;"	d
FPGA_REG10_OPER_BOOT	include/configs/yucca.h	/^#define FPGA_REG10_OPER_BOOT	/;"	d
FPGA_REG10_RESET_ETH	include/configs/yucca.h	/^#define FPGA_REG10_RESET_ETH	/;"	d
FPGA_REG10_RESET_HISR	include/configs/yucca.h	/^#define FPGA_REG10_RESET_HISR	/;"	d
FPGA_REG10_RESET_SDRAM	include/configs/yucca.h	/^#define FPGA_REG10_RESET_SDRAM	/;"	d
FPGA_REG10_SDRAM_ENABLE	include/configs/yucca.h	/^#define FPGA_REG10_SDRAM_ENABLE	/;"	d
FPGA_REG10_SMALL_BOOT	include/configs/yucca.h	/^#define FPGA_REG10_SMALL_BOOT	/;"	d
FPGA_REG10_SRAM_BOOT	include/configs/yucca.h	/^#define FPGA_REG10_SRAM_BOOT	/;"	d
FPGA_REG12	include/configs/yucca.h	/^#define FPGA_REG12	/;"	d
FPGA_REG12_EBC_CTL	include/configs/yucca.h	/^#define FPGA_REG12_EBC_CTL	/;"	d
FPGA_REG12_EBC_ERROR	include/configs/yucca.h	/^#define FPGA_REG12_EBC_ERROR	/;"	d
FPGA_REG12_EBC_OUT_ENABLE	include/configs/yucca.h	/^#define FPGA_REG12_EBC_OUT_ENABLE	/;"	d
FPGA_REG12_GPIO0_OUT_ENABLE	include/configs/yucca.h	/^#define FPGA_REG12_GPIO0_OUT_ENABLE	/;"	d
FPGA_REG12_GPIO1_OUT_ENABLE	include/configs/yucca.h	/^#define FPGA_REG12_GPIO1_OUT_ENABLE	/;"	d
FPGA_REG12_GPIO_CHREG	include/configs/yucca.h	/^#define FPGA_REG12_GPIO_CHREG	/;"	d
FPGA_REG12_GPIO_CLK_CHREG	include/configs/yucca.h	/^#define FPGA_REG12_GPIO_CLK_CHREG	/;"	d
FPGA_REG12_GPIO_OETRI	include/configs/yucca.h	/^#define FPGA_REG12_GPIO_OETRI	/;"	d
FPGA_REG12_GPIO_SELECT	include/configs/yucca.h	/^#define FPGA_REG12_GPIO_SELECT	/;"	d
FPGA_REG12_UART0_RX_ENABLE	include/configs/yucca.h	/^#define FPGA_REG12_UART0_RX_ENABLE	/;"	d
FPGA_REG12_UART1_CTS_RTS	include/configs/yucca.h	/^#define FPGA_REG12_UART1_CTS_RTS	/;"	d
FPGA_REG12_UART1_RX_ENABLE	include/configs/yucca.h	/^#define FPGA_REG12_UART1_RX_ENABLE	/;"	d
FPGA_REG12_UART2_RX_ENABLE	include/configs/yucca.h	/^#define FPGA_REG12_UART2_RX_ENABLE	/;"	d
FPGA_REG16	include/configs/yucca.h	/^#define FPGA_REG16	/;"	d
FPGA_REG16_FB1_DIV_HIGH	include/configs/yucca.h	/^#define FPGA_REG16_FB1_DIV_HIGH	/;"	d
FPGA_REG16_FB1_DIV_LOW	include/configs/yucca.h	/^#define FPGA_REG16_FB1_DIV_LOW	/;"	d
FPGA_REG16_FB1_DIV_MASK	include/configs/yucca.h	/^#define FPGA_REG16_FB1_DIV_MASK	/;"	d
FPGA_REG16_FB2_DIV_HIGH	include/configs/yucca.h	/^#define FPGA_REG16_FB2_DIV_HIGH	/;"	d
FPGA_REG16_FB2_DIV_LOW	include/configs/yucca.h	/^#define FPGA_REG16_FB2_DIV_LOW	/;"	d
FPGA_REG16_FB2_DIV_MASK	include/configs/yucca.h	/^#define FPGA_REG16_FB2_DIV_MASK	/;"	d
FPGA_REG16_MASTER_CLK_25	include/configs/yucca.h	/^#define FPGA_REG16_MASTER_CLK_25	/;"	d
FPGA_REG16_MASTER_CLK_33_33	include/configs/yucca.h	/^#define FPGA_REG16_MASTER_CLK_33_33	/;"	d
FPGA_REG16_MASTER_CLK_50	include/configs/yucca.h	/^#define FPGA_REG16_MASTER_CLK_50	/;"	d
FPGA_REG16_MASTER_CLK_66_66	include/configs/yucca.h	/^#define FPGA_REG16_MASTER_CLK_66_66	/;"	d
FPGA_REG16_MASTER_CLK_EXT	include/configs/yucca.h	/^#define FPGA_REG16_MASTER_CLK_EXT	/;"	d
FPGA_REG16_MASTER_CLK_MASK	include/configs/yucca.h	/^#define FPGA_REG16_MASTER_CLK_MASK	/;"	d
FPGA_REG16_PCI0_CLK_100	include/configs/yucca.h	/^#define FPGA_REG16_PCI0_CLK_100	/;"	d
FPGA_REG16_PCI0_CLK_133_33	include/configs/yucca.h	/^#define FPGA_REG16_PCI0_CLK_133_33	/;"	d
FPGA_REG16_PCI0_CLK_33_33	include/configs/yucca.h	/^#define FPGA_REG16_PCI0_CLK_33_33	/;"	d
FPGA_REG16_PCI0_CLK_66_66	include/configs/yucca.h	/^#define FPGA_REG16_PCI0_CLK_66_66	/;"	d
FPGA_REG16_PCI0_CLK_MASK	include/configs/yucca.h	/^#define FPGA_REG16_PCI0_CLK_MASK	/;"	d
FPGA_REG16_PCI_CLK_CTL0	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL0	/;"	d
FPGA_REG16_PCI_CLK_CTL1	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL1	/;"	d
FPGA_REG16_PCI_CLK_CTL2	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL2	/;"	d
FPGA_REG16_PCI_CLK_CTL3	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL3	/;"	d
FPGA_REG16_PCI_CLK_CTL4	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL4	/;"	d
FPGA_REG16_PCI_CLK_CTL5	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL5	/;"	d
FPGA_REG16_PCI_CLK_CTL6	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL6	/;"	d
FPGA_REG16_PCI_CLK_CTL7	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL7	/;"	d
FPGA_REG16_PCI_CLK_CTL8	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL8	/;"	d
FPGA_REG16_PCI_CLK_CTL9	include/configs/yucca.h	/^#define FPGA_REG16_PCI_CLK_CTL9	/;"	d
FPGA_REG16_PCI_EXT_ARB0	include/configs/yucca.h	/^#define FPGA_REG16_PCI_EXT_ARB0	/;"	d
FPGA_REG16_PCI_INTP_MODE	include/configs/yucca.h	/^#define FPGA_REG16_PCI_INTP_MODE	/;"	d
FPGA_REG16_PCI_MODE_1	include/configs/yucca.h	/^#define FPGA_REG16_PCI_MODE_1	/;"	d
FPGA_REG16_PCI_TARGET_MODE	include/configs/yucca.h	/^#define FPGA_REG16_PCI_TARGET_MODE	/;"	d
FPGA_REG16_VCO_DIV_10	include/configs/yucca.h	/^#define FPGA_REG16_VCO_DIV_10	/;"	d
FPGA_REG16_VCO_DIV_4	include/configs/yucca.h	/^#define FPGA_REG16_VCO_DIV_4	/;"	d
FPGA_REG16_VCO_DIV_6	include/configs/yucca.h	/^#define FPGA_REG16_VCO_DIV_6	/;"	d
FPGA_REG16_VCO_DIV_8	include/configs/yucca.h	/^#define FPGA_REG16_VCO_DIV_8	/;"	d
FPGA_REG16_VCO_DIV_MASK	include/configs/yucca.h	/^#define FPGA_REG16_VCO_DIV_MASK	/;"	d
FPGA_REG18	include/configs/yucca.h	/^#define FPGA_REG18	/;"	d
FPGA_REG18_PCI_INTA	include/configs/yucca.h	/^#define FPGA_REG18_PCI_INTA	/;"	d
FPGA_REG18_PCI_PCI0_VC	include/configs/yucca.h	/^#define FPGA_REG18_PCI_PCI0_VC	/;"	d
FPGA_REG18_PCI_PCI0_VTH1	include/configs/yucca.h	/^#define FPGA_REG18_PCI_PCI0_VTH1	/;"	d
FPGA_REG18_PCI_PCI0_VTH2	include/configs/yucca.h	/^#define FPGA_REG18_PCI_PCI0_VTH2	/;"	d
FPGA_REG18_PCI_PCI0_VTH3	include/configs/yucca.h	/^#define FPGA_REG18_PCI_PCI0_VTH3	/;"	d
FPGA_REG18_PCI_PRSNT1	include/configs/yucca.h	/^#define FPGA_REG18_PCI_PRSNT1	/;"	d
FPGA_REG18_PCI_PRSNT2	include/configs/yucca.h	/^#define FPGA_REG18_PCI_PRSNT2	/;"	d
FPGA_REG18_PCI_SLOT0_INTP	include/configs/yucca.h	/^#define FPGA_REG18_PCI_SLOT0_INTP	/;"	d
FPGA_REG18_PCI_SLOT1_INTP	include/configs/yucca.h	/^#define FPGA_REG18_PCI_SLOT1_INTP	/;"	d
FPGA_REG18_PCI_SLOT2_INTP	include/configs/yucca.h	/^#define FPGA_REG18_PCI_SLOT2_INTP	/;"	d
FPGA_REG18_PCI_SLOT3_INTP	include/configs/yucca.h	/^#define FPGA_REG18_PCI_SLOT3_INTP	/;"	d
FPGA_REG1A	include/configs/yucca.h	/^#define FPGA_REG1A	/;"	d
FPGA_REG1A_GLED_ENCODE	include/configs/yucca.h	/^#define FPGA_REG1A_GLED_ENCODE(/;"	d
FPGA_REG1A_PE0_GLED	include/configs/yucca.h	/^#define FPGA_REG1A_PE0_GLED	/;"	d
FPGA_REG1A_PE0_PWRON	include/configs/yucca.h	/^#define FPGA_REG1A_PE0_PWRON	/;"	d
FPGA_REG1A_PE0_REFCLK_ENABLE	include/configs/yucca.h	/^#define FPGA_REG1A_PE0_REFCLK_ENABLE	/;"	d
FPGA_REG1A_PE0_YLED	include/configs/yucca.h	/^#define FPGA_REG1A_PE0_YLED	/;"	d
FPGA_REG1A_PE1_GLED	include/configs/yucca.h	/^#define FPGA_REG1A_PE1_GLED	/;"	d
FPGA_REG1A_PE1_PWRON	include/configs/yucca.h	/^#define FPGA_REG1A_PE1_PWRON	/;"	d
FPGA_REG1A_PE1_REFCLK_ENABLE	include/configs/yucca.h	/^#define FPGA_REG1A_PE1_REFCLK_ENABLE	/;"	d
FPGA_REG1A_PE1_YLED	include/configs/yucca.h	/^#define FPGA_REG1A_PE1_YLED	/;"	d
FPGA_REG1A_PE2_GLED	include/configs/yucca.h	/^#define FPGA_REG1A_PE2_GLED	/;"	d
FPGA_REG1A_PE2_PWRON	include/configs/yucca.h	/^#define FPGA_REG1A_PE2_PWRON	/;"	d
FPGA_REG1A_PE2_REFCLK_ENABLE	include/configs/yucca.h	/^#define FPGA_REG1A_PE2_REFCLK_ENABLE	/;"	d
FPGA_REG1A_PE2_YLED	include/configs/yucca.h	/^#define FPGA_REG1A_PE2_YLED	/;"	d
FPGA_REG1A_PE_SELSOURCE_0	include/configs/yucca.h	/^#define FPGA_REG1A_PE_SELSOURCE_0	/;"	d
FPGA_REG1A_PE_SELSOURCE_1	include/configs/yucca.h	/^#define FPGA_REG1A_PE_SELSOURCE_1	/;"	d
FPGA_REG1A_PE_SPREAD0	include/configs/yucca.h	/^#define FPGA_REG1A_PE_SPREAD0	/;"	d
FPGA_REG1A_PE_SPREAD1	include/configs/yucca.h	/^#define FPGA_REG1A_PE_SPREAD1	/;"	d
FPGA_REG1A_PWRON_ENCODE	include/configs/yucca.h	/^#define FPGA_REG1A_PWRON_ENCODE(/;"	d
FPGA_REG1A_REFCLK_ENCODE	include/configs/yucca.h	/^#define FPGA_REG1A_REFCLK_ENCODE(/;"	d
FPGA_REG1A_YLED_ENCODE	include/configs/yucca.h	/^#define FPGA_REG1A_YLED_ENCODE(/;"	d
FPGA_REG1C	include/configs/yucca.h	/^#define FPGA_REG1C	/;"	d
FPGA_REG1C_PE0_PERST	include/configs/yucca.h	/^#define FPGA_REG1C_PE0_PERST	/;"	d
FPGA_REG1C_PE0_PRSNT	include/configs/yucca.h	/^#define FPGA_REG1C_PE0_PRSNT	/;"	d
FPGA_REG1C_PE0_ROOTPOINT	include/configs/yucca.h	/^#define FPGA_REG1C_PE0_ROOTPOINT	/;"	d
FPGA_REG1C_PE0_WAKE	include/configs/yucca.h	/^#define FPGA_REG1C_PE0_WAKE	/;"	d
FPGA_REG1C_PE1_ENDPOINT	include/configs/yucca.h	/^#define FPGA_REG1C_PE1_ENDPOINT	/;"	d
FPGA_REG1C_PE1_PERST	include/configs/yucca.h	/^#define FPGA_REG1C_PE1_PERST	/;"	d
FPGA_REG1C_PE1_PRSNT	include/configs/yucca.h	/^#define FPGA_REG1C_PE1_PRSNT	/;"	d
FPGA_REG1C_PE1_WAKE	include/configs/yucca.h	/^#define FPGA_REG1C_PE1_WAKE	/;"	d
FPGA_REG1C_PE2_ENDPOINT	include/configs/yucca.h	/^#define FPGA_REG1C_PE2_ENDPOINT	/;"	d
FPGA_REG1C_PE2_PERST	include/configs/yucca.h	/^#define FPGA_REG1C_PE2_PERST	/;"	d
FPGA_REG1C_PE2_PRSNT	include/configs/yucca.h	/^#define FPGA_REG1C_PE2_PRSNT	/;"	d
FPGA_REG1C_PE2_WAKE	include/configs/yucca.h	/^#define FPGA_REG1C_PE2_WAKE	/;"	d
FPGA_REG1C_PERST_ENCODE	include/configs/yucca.h	/^#define FPGA_REG1C_PERST_ENCODE(/;"	d
FPGA_REG1C_ROOTPOINT_ENCODE	include/configs/yucca.h	/^#define FPGA_REG1C_ROOTPOINT_ENCODE(/;"	d
FPGA_REG1_CLOCK_BIT_SHIFT	include/configs/bubinga.h	/^#define FPGA_REG1_CLOCK_BIT_SHIFT /;"	d
FPGA_REG1_CLOCK_MASK	include/configs/bubinga.h	/^#define FPGA_REG1_CLOCK_MASK /;"	d
FPGA_REG1_OFFBD_PCICLK	include/configs/bubinga.h	/^#define FPGA_REG1_OFFBD_PCICLK /;"	d
FPGA_REG1_OFFB_FLASH	include/configs/bubinga.h	/^#define FPGA_REG1_OFFB_FLASH /;"	d
FPGA_REG1_PCI_FREQ	include/configs/bubinga.h	/^#define FPGA_REG1_PCI_FREQ /;"	d
FPGA_REG1_PCI_INT_ARB	include/configs/bubinga.h	/^#define FPGA_REG1_PCI_INT_ARB /;"	d
FPGA_REG1_SRAM_BOOT	include/configs/bubinga.h	/^#define FPGA_REG1_SRAM_BOOT /;"	d
FPGA_REG1_SSPEC_DIS	include/configs/bubinga.h	/^#define FPGA_REG1_SSPEC_DIS /;"	d
FPGA_REG_BASE_ADDR	include/configs/yucca.h	/^#define FPGA_REG_BASE_ADDR	/;"	d
FPGA_RESET	board/teejet/mt_ventoux/mt_ventoux.c	/^#define FPGA_RESET	/;"	d	file:
FPGA_RESET_REG	board/amcc/bamboo/bamboo.h	/^#define FPGA_RESET_REG	/;"	d
FPGA_RESET_REG_RESET_DISPLAY	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_RESET_REG_RESET_DISPLAY	/;"	d
FPGA_RESET_REG_RESET_USB20_DEV	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_RESET_REG_RESET_USB20_DEV	/;"	d
FPGA_RESET_REG_STATUS_LED_0	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_RESET_REG_STATUS_LED_0	/;"	d
FPGA_RESET_REG_STATUS_LED_1	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_RESET_REG_STATUS_LED_1	/;"	d
FPGA_RESET_REG_STATUS_LED_2	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_RESET_REG_STATUS_LED_2	/;"	d
FPGA_RESET_REG_STATUS_LED_3	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_RESET_REG_STATUS_LED_3	/;"	d
FPGA_RSTCTL	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_RSTCTL /;"	d
FPGA_SCRATCH_REG	post/board/lwmon5/fpga.c	/^#define FPGA_SCRATCH_REG	/;"	d	file:
FPGA_SEL2_REG_DMA_EOT_TC_2_SEL	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_DMA_EOT_TC_2_SEL /;"	d
FPGA_SEL2_REG_DMA_EOT_TC_3_SEL	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_DMA_EOT_TC_3_SEL /;"	d
FPGA_SEL2_REG_IIC1_SCP_SEL_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_IIC1_SCP_SEL_MASK /;"	d
FPGA_SEL2_REG_SEL_DMA_A_B	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_DMA_A_B	/;"	d
FPGA_SEL2_REG_SEL_DMA_C_D	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_DMA_C_D	/;"	d
FPGA_SEL2_REG_SEL_FRAM	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_FRAM	/;"	d
FPGA_SEL2_REG_SEL_GPIO_1	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_GPIO_1	/;"	d
FPGA_SEL2_REG_SEL_GPIO_2	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_GPIO_2	/;"	d
FPGA_SEL2_REG_SEL_GPIO_3	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_GPIO_3	/;"	d
FPGA_SEL2_REG_SEL_IIC1	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_IIC1	/;"	d
FPGA_SEL2_REG_SEL_SCP	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL2_REG_SEL_SCP	/;"	d
FPGA_SEL3_REG_DTR_DSR_MODE_4_PIN_UART	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_DTR_DSR_MODE_4_PIN_UART /;"	d
FPGA_SEL3_REG_EXP_SLOT_EN	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_EXP_SLOT_EN	/;"	d
FPGA_SEL3_REG_RTS_CTS_MODE_4_PIN_UART	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_RTS_CTS_MODE_4_PIN_UART /;"	d
FPGA_SEL3_REG_SEL_UART_CONFIG1	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_SEL_UART_CONFIG1	/;"	d
FPGA_SEL3_REG_SEL_UART_CONFIG2	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_SEL_UART_CONFIG2	/;"	d
FPGA_SEL3_REG_SEL_UART_CONFIG3	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_SEL_UART_CONFIG3	/;"	d
FPGA_SEL3_REG_SEL_UART_CONFIG4	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_SEL_UART_CONFIG4	/;"	d
FPGA_SEL3_REG_SEL_UART_CONFIG_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL3_REG_SEL_UART_CONFIG_MASK	/;"	d
FPGA_SELECTION_1_REG	board/amcc/bamboo/bamboo.h	/^#define FPGA_SELECTION_1_REG	/;"	d
FPGA_SELECTION_2_REG	board/amcc/bamboo/bamboo.h	/^#define FPGA_SELECTION_2_REG	/;"	d
FPGA_SELECTION_3_REG	board/amcc/bamboo/bamboo.h	/^#define FPGA_SELECTION_3_REG	/;"	d
FPGA_SEL_1_REG_MII	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_MII	/;"	d
FPGA_SEL_1_REG_NF0_SEL_BY_NFCS1	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_NF0_SEL_BY_NFCS1 /;"	d
FPGA_SEL_1_REG_NF1_SEL_BY_NFCS2	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_NF1_SEL_BY_NFCS2 /;"	d
FPGA_SEL_1_REG_NF1_SEL_BY_NFCS3	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_NF1_SEL_BY_NFCS3 /;"	d
FPGA_SEL_1_REG_NF_SELEC_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_NF_SELEC_MASK /;"	d
FPGA_SEL_1_REG_PHY_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_PHY_MASK	/;"	d
FPGA_SEL_1_REG_RMII	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_RMII	/;"	d
FPGA_SEL_1_REG_SMII	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_SMII	/;"	d
FPGA_SEL_1_REG_USB2_DEV_SEL	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_USB2_DEV_SEL	/;"	d
FPGA_SEL_1_REG_USB2_HOST_SEL	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SEL_1_REG_USB2_HOST_SEL /;"	d
FPGA_SETBITS	board/esd/pmc440/pmc440.h	/^#define FPGA_SETBITS(/;"	d
FPGA_SETTING_REG	board/amcc/bamboo/bamboo.h	/^#define FPGA_SETTING_REG	/;"	d
FPGA_SET_REG	include/gdsys_fpga.h	/^#define FPGA_SET_REG(/;"	d
FPGA_SET_REG_BOOT_NAND_FLASH_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SET_REG_BOOT_NAND_FLASH_MASK	/;"	d
FPGA_SET_REG_BOOT_NAND_FLASH_SELECT	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SET_REG_BOOT_NAND_FLASH_SELECT	/;"	d
FPGA_SET_REG_BOOT_SMALL_FLASH	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SET_REG_BOOT_SMALL_FLASH	/;"	d
FPGA_SET_REG_OP_CODE_FLASH_ABOVE	board/amcc/bamboo/bamboo.h	/^#define	     FPGA_SET_REG_OP_CODE_FLASH_ABOVE	/;"	d
FPGA_SET_REG_OP_CODE_SRAM_SEL_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SET_REG_OP_CODE_SRAM_SEL_MASK	/;"	d
FPGA_SET_REG_PCI_EXT_ARBITER_SEL	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SET_REG_PCI_EXT_ARBITER_SEL	/;"	d
FPGA_SET_REG_PCI_EXT_ARBITER_SEL_MASK	board/amcc/bamboo/bamboo.h	/^#define	    FPGA_SET_REG_PCI_EXT_ARBITER_SEL_MASK /;"	d
FPGA_SET_REG_SRAM_ABOVE	board/amcc/bamboo/bamboo.h	/^#define	     FPGA_SET_REG_SRAM_ABOVE	/;"	d
FPGA_SPARTAN2_OPS	include/spartan2.h	/^# define FPGA_SPARTAN2_OPS	/;"	d
FPGA_SPARTAN3_OPS	include/spartan3.h	/^# define FPGA_SPARTAN3_OPS	/;"	d
FPGA_STAT	post/board/lwmon5/fpga.c	/^#define FPGA_STAT	/;"	d	file:
FPGA_STATE_DONE_FAILED	include/gdsys_fpga.h	/^	FPGA_STATE_DONE_FAILED = 1 << 0,$/;"	e	enum:__anon0760d2d50103
FPGA_STATE_PLATFORM	include/gdsys_fpga.h	/^	FPGA_STATE_PLATFORM = 1 << 2,$/;"	e	enum:__anon0760d2d50103
FPGA_STATE_REFLECTION_FAILED	include/gdsys_fpga.h	/^	FPGA_STATE_REFLECTION_FAILED = 1 << 1,$/;"	e	enum:__anon0760d2d50103
FPGA_STATUS_REG	post/board/lwmon5/dsp.c	/^#define FPGA_STATUS_REG	/;"	d	file:
FPGA_SUCCESS	include/fpga.h	/^#define FPGA_SUCCESS	/;"	d
FPGA_TIMEOUT_CNT	arch/arm/mach-socfpga/fpga_manager.c	/^#define FPGA_TIMEOUT_CNT	/;"	d	file:
FPGA_TIMEOUT_CNT	drivers/fpga/socfpga.c	/^#define FPGA_TIMEOUT_CNT	/;"	d	file:
FPGA_TPCLR	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_TPCLR /;"	d
FPGA_TPCTL	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_TPCTL /;"	d
FPGA_TPDCKCTL	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_TPDCKCTL /;"	d
FPGA_TPXPOS	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_TPXPOS /;"	d
FPGA_TPYPOS	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_TPYPOS /;"	d
FPGA_VCO_DIV_10	include/configs/yucca.h	/^#define	FPGA_VCO_DIV_10	/;"	d
FPGA_VCO_DIV_4	include/configs/yucca.h	/^#define	FPGA_VCO_DIV_4	/;"	d
FPGA_VCO_DIV_6	include/configs/yucca.h	/^#define	FPGA_VCO_DIV_6	/;"	d
FPGA_VCO_DIV_8	include/configs/yucca.h	/^#define	FPGA_VCO_DIV_8	/;"	d
FPGA_VERSION	board/renesas/r7780mp/r7780mp.h	/^#define FPGA_VERSION /;"	d
FPGA_VERSION_REG	post/board/lwmon5/fpga.c	/^#define FPGA_VERSION_REG	/;"	d	file:
FPGA_VIRTEX2_OPS	include/virtex2.h	/^# define FPGA_VIRTEX2_OPS	/;"	d
FPGA_WRITE_0	board/esd/common/fpga.c	/^#define FPGA_WRITE_0 /;"	d	file:
FPGA_WRITE_1	board/esd/common/fpga.c	/^#define FPGA_WRITE_1 /;"	d	file:
FPGA_XILINX	drivers/fpga/Kconfig	/^config FPGA_XILINX$/;"	c	menu:FPGA support
FPGA_ZYNQMPPL	drivers/fpga/Kconfig	/^config FPGA_ZYNQMPPL$/;"	c	menu:FPGA support
FPGA_ZYNQPL_OPS	include/zynqpl.h	/^# define FPGA_ZYNQPL_OPS	/;"	d
FPS00	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS00 /;"	d
FPS01	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS01 /;"	d
FPS02	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS02 /;"	d
FPS03	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS03 /;"	d
FPS04	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS04 /;"	d
FPS05	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS05 /;"	d
FPS06	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS06 /;"	d
FPS07	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS07 /;"	d
FPS08	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS08 /;"	d
FPS09	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS09 /;"	d
FPS10	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS10 /;"	d
FPS11	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define FPS11 /;"	d
FPSCR_FEX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_FEX	/;"	d
FPSCR_FI	arch/powerpc/include/asm/processor.h	/^#define FPSCR_FI	/;"	d
FPSCR_FPCC	arch/powerpc/include/asm/processor.h	/^#define FPSCR_FPCC	/;"	d
FPSCR_FPRF	arch/powerpc/include/asm/processor.h	/^#define FPSCR_FPRF	/;"	d
FPSCR_FR	arch/powerpc/include/asm/processor.h	/^#define FPSCR_FR	/;"	d
FPSCR_FX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_FX	/;"	d
FPSCR_NI	arch/powerpc/include/asm/processor.h	/^#define FPSCR_NI	/;"	d
FPSCR_OE	arch/powerpc/include/asm/processor.h	/^#define FPSCR_OE	/;"	d
FPSCR_OX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_OX	/;"	d
FPSCR_RN	arch/powerpc/include/asm/processor.h	/^#define FPSCR_RN	/;"	d
FPSCR_UE	arch/powerpc/include/asm/processor.h	/^#define FPSCR_UE	/;"	d
FPSCR_UX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_UX	/;"	d
FPSCR_VE	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VE	/;"	d
FPSCR_VX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VX	/;"	d
FPSCR_VXCVI	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXCVI	/;"	d
FPSCR_VXIDI	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXIDI	/;"	d
FPSCR_VXIMZ	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXIMZ	/;"	d
FPSCR_VXISI	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXISI	/;"	d
FPSCR_VXSNAN	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXSNAN	/;"	d
FPSCR_VXSOFT	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXSOFT	/;"	d
FPSCR_VXSQRT	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXSQRT	/;"	d
FPSCR_VXVC	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXVC	/;"	d
FPSCR_VXZDZ	arch/powerpc/include/asm/processor.h	/^#define FPSCR_VXZDZ	/;"	d
FPSCR_XE	arch/powerpc/include/asm/processor.h	/^#define FPSCR_XE	/;"	d
FPSCR_XX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_XX	/;"	d
FPSCR_ZE	arch/powerpc/include/asm/processor.h	/^#define FPSCR_ZE	/;"	d
FPSCR_ZX	arch/powerpc/include/asm/processor.h	/^#define FPSCR_ZX	/;"	d
FPU_CSR_ABS2008	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_ABS2008	/;"	d
FPU_CSR_ALL_E	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_ALL_E	/;"	d
FPU_CSR_ALL_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_ALL_S	/;"	d
FPU_CSR_ALL_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_ALL_X	/;"	d
FPU_CSR_COND	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND	/;"	d
FPU_CSR_COND1	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND1	/;"	d
FPU_CSR_COND1_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND1_S	/;"	d
FPU_CSR_COND2	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND2	/;"	d
FPU_CSR_COND2_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND2_S	/;"	d
FPU_CSR_COND3	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND3	/;"	d
FPU_CSR_COND3_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND3_S	/;"	d
FPU_CSR_COND4	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND4	/;"	d
FPU_CSR_COND4_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND4_S	/;"	d
FPU_CSR_COND5	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND5	/;"	d
FPU_CSR_COND5_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND5_S	/;"	d
FPU_CSR_COND6	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND6	/;"	d
FPU_CSR_COND6_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND6_S	/;"	d
FPU_CSR_COND7	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND7	/;"	d
FPU_CSR_COND7_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND7_S	/;"	d
FPU_CSR_CONDX	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_CONDX	/;"	d
FPU_CSR_CONDX_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_CONDX_S	/;"	d
FPU_CSR_COND_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_COND_S	/;"	d
FPU_CSR_DIV_E	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_DIV_E	/;"	d
FPU_CSR_DIV_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_DIV_S	/;"	d
FPU_CSR_DIV_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_DIV_X	/;"	d
FPU_CSR_FS	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_FS	/;"	d
FPU_CSR_FS_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_FS_S	/;"	d
FPU_CSR_INE_E	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_INE_E	/;"	d
FPU_CSR_INE_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_INE_S	/;"	d
FPU_CSR_INE_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_INE_X	/;"	d
FPU_CSR_INV_E	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_INV_E	/;"	d
FPU_CSR_INV_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_INV_S	/;"	d
FPU_CSR_INV_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_INV_X	/;"	d
FPU_CSR_NAN2008	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_NAN2008	/;"	d
FPU_CSR_OVF_E	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_OVF_E	/;"	d
FPU_CSR_OVF_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_OVF_S	/;"	d
FPU_CSR_OVF_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_OVF_X	/;"	d
FPU_CSR_RD	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_RD	/;"	d
FPU_CSR_RM	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_RM	/;"	d
FPU_CSR_RN	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_RN	/;"	d
FPU_CSR_RSVD	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_RSVD	/;"	d
FPU_CSR_RU	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_RU	/;"	d
FPU_CSR_RZ	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_RZ	/;"	d
FPU_CSR_UDF_E	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_UDF_E	/;"	d
FPU_CSR_UDF_S	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_UDF_S	/;"	d
FPU_CSR_UDF_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_UDF_X	/;"	d
FPU_CSR_UNI_X	arch/mips/include/asm/mipsregs.h	/^#define FPU_CSR_UNI_X	/;"	d
FPW	board/freescale/m5253demo/flash.c	/^#define FPW /;"	d	file:
FPW	board/tqc/tqm834x/tqm834x.c	/^#define FPW	/;"	d	file:
FPWV	board/freescale/m5253demo/flash.c	/^#define FPWV /;"	d	file:
FPWV	board/tqc/tqm834x/tqm834x.c	/^#define FPWV	/;"	d	file:
FP_2_13	arch/powerpc/include/asm/processor.h	/^#define     FP_2_13	/;"	d
FP_2_17	arch/powerpc/include/asm/processor.h	/^#define     FP_2_17	/;"	d
FP_2_21	arch/powerpc/include/asm/processor.h	/^#define     FP_2_21	/;"	d
FP_2_9	arch/powerpc/include/asm/processor.h	/^#define     FP_2_9	/;"	d
FP_CB_TUNE	drivers/video/i915_reg.h	/^#define  FP_CB_TUNE	/;"	d
FP_CRTC_DONT_SHADOW_HEND	include/radeon.h	/^#define FP_CRTC_DONT_SHADOW_HEND	/;"	d
FP_CRTC_DONT_SHADOW_HPAR	include/radeon.h	/^#define FP_CRTC_DONT_SHADOW_HPAR	/;"	d
FP_CRTC_DONT_SHADOW_VPAR	include/radeon.h	/^#define FP_CRTC_DONT_SHADOW_VPAR	/;"	d
FP_CRTC_H_DISP_MASK	include/radeon.h	/^#define FP_CRTC_H_DISP_MASK	/;"	d
FP_CRTC_H_DISP_SHIFT	include/radeon.h	/^#define FP_CRTC_H_DISP_SHIFT	/;"	d
FP_CRTC_H_TOTAL_DISP	include/radeon.h	/^#define FP_CRTC_H_TOTAL_DISP	/;"	d
FP_CRTC_H_TOTAL_MASK	include/radeon.h	/^#define FP_CRTC_H_TOTAL_MASK	/;"	d
FP_CRTC_H_TOTAL_SHIFT	include/radeon.h	/^#define FP_CRTC_H_TOTAL_SHIFT	/;"	d
FP_CRTC_LOCK_8DOT	include/radeon.h	/^#define FP_CRTC_LOCK_8DOT	/;"	d
FP_CRTC_USE_SHADOW_VEND	include/radeon.h	/^#define FP_CRTC_USE_SHADOW_VEND	/;"	d
FP_CRTC_V_DISP_MASK	include/radeon.h	/^#define FP_CRTC_V_DISP_MASK	/;"	d
FP_CRTC_V_DISP_SHIFT	include/radeon.h	/^#define FP_CRTC_V_DISP_SHIFT	/;"	d
FP_CRTC_V_TOTAL_DISP	include/radeon.h	/^#define FP_CRTC_V_TOTAL_DISP	/;"	d
FP_CRTC_V_TOTAL_MASK	include/radeon.h	/^#define FP_CRTC_V_TOTAL_MASK	/;"	d
FP_CRTC_V_TOTAL_SHIFT	include/radeon.h	/^#define FP_CRTC_V_TOTAL_SHIFT	/;"	d
FP_CRT_SYNC_ALT	include/radeon.h	/^#define FP_CRT_SYNC_ALT	/;"	d
FP_CRT_SYNC_SEL	include/radeon.h	/^#define FP_CRT_SYNC_SEL	/;"	d
FP_DETECT_SENSE	include/radeon.h	/^#define FP_DETECT_SENSE	/;"	d
FP_DFP_SYNC_SEL	include/radeon.h	/^#define FP_DFP_SYNC_SEL	/;"	d
FP_EN_TMDS	include/radeon.h	/^#define FP_EN_TMDS	/;"	d
FP_FPON	include/radeon.h	/^#define FP_FPON	/;"	d
FP_GEN_CNTL	include/radeon.h	/^#define FP_GEN_CNTL	/;"	d
FP_HORZ_STRETCH	include/radeon.h	/^#define FP_HORZ_STRETCH	/;"	d
FP_HORZ_VERT_ACTIVE	include/radeon.h	/^#define FP_HORZ_VERT_ACTIVE	/;"	d
FP_H_SYNC_STRT_CHAR_MASK	include/radeon.h	/^#define FP_H_SYNC_STRT_CHAR_MASK	/;"	d
FP_H_SYNC_STRT_CHAR_SHIFT	include/radeon.h	/^#define FP_H_SYNC_STRT_CHAR_SHIFT	/;"	d
FP_H_SYNC_STRT_WID	include/radeon.h	/^#define FP_H_SYNC_STRT_WID	/;"	d
FP_H_SYNC_WID_MASK	include/radeon.h	/^#define FP_H_SYNC_WID_MASK	/;"	d
FP_H_SYNC_WID_SHIFT	include/radeon.h	/^#define FP_H_SYNC_WID_SHIFT	/;"	d
FP_PANEL_FORMAT	include/radeon.h	/^#define FP_PANEL_FORMAT	/;"	d
FP_RESYNC	arch/arm/mach-exynos/exynos5_setup.h	/^#define FP_RESYNC	/;"	d
FP_RMX_HVSYNC_CONTROL_EN	include/radeon.h	/^#define FP_RMX_HVSYNC_CONTROL_EN	/;"	d
FP_RSYNC	arch/arm/mach-exynos/exynos5_setup.h	/^#define FP_RSYNC	/;"	d
FP_SEL_CRTC1	include/radeon.h	/^#define FP_SEL_CRTC1	/;"	d
FP_SEL_CRTC2	include/radeon.h	/^#define FP_SEL_CRTC2	/;"	d
FP_SIZE	arch/arm/include/asm/processor.h	/^#define FP_SIZE /;"	d
FP_TMDS_EN	include/radeon.h	/^#define FP_TMDS_EN	/;"	d
FP_USE_SHADOW_EN	include/radeon.h	/^#define FP_USE_SHADOW_EN	/;"	d
FP_USE_VGA_HSYNC	include/radeon.h	/^#define FP_USE_VGA_HSYNC	/;"	d
FP_VERT_STRETCH	include/radeon.h	/^#define FP_VERT_STRETCH	/;"	d
FP_V_SYNC_STRT_MASK	include/radeon.h	/^#define FP_V_SYNC_STRT_MASK	/;"	d
FP_V_SYNC_STRT_SHIFT	include/radeon.h	/^#define FP_V_SYNC_STRT_SHIFT	/;"	d
FP_V_SYNC_STRT_WID	include/radeon.h	/^#define FP_V_SYNC_STRT_WID	/;"	d
FP_V_SYNC_WID_MASK	include/radeon.h	/^#define FP_V_SYNC_WID_MASK	/;"	d
FP_V_SYNC_WID_SHIFT	include/radeon.h	/^#define FP_V_SYNC_WID_SHIFT	/;"	d
FRAC_DIVIDER	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define FRAC_DIVIDER(/;"	d
FRAC_DIVIDER	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define FRAC_DIVIDER(/;"	d
FRAME1024TUP	drivers/net/davinci_emac.h	/^	dv_reg		FRAME1024TUP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FRAME128T255	drivers/net/davinci_emac.h	/^	dv_reg		FRAME128T255;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FRAME256T511	drivers/net/davinci_emac.h	/^	dv_reg		FRAME256T511;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FRAME512T1023	drivers/net/davinci_emac.h	/^	dv_reg		FRAME512T1023;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FRAME64	drivers/net/davinci_emac.h	/^	dv_reg		FRAME64;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FRAME65T127	drivers/net/davinci_emac.h	/^	dv_reg		FRAME65T127;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
FRAMEBUFFER_SET_VESA_MODE	drivers/video/Kconfig	/^config FRAMEBUFFER_SET_VESA_MODE$/;"	c	menu:Graphics support
FRAMEBUFFER_VESA_MODE	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE$/;"	c	menu:Graphics support
FRAMEBUFFER_VESA_MODE_100	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_100$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_101	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_101$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_102	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_102$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_103	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_103$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_104	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_104$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_105	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_105$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_106	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_106$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_107	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_107$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_108	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_108$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_109	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_109$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_10A	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10A$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_10B	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10B$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_10C	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10C$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_10D	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10D$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_10E	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10E$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_10F	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_10F$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_110	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_110$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_111	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_111$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_112	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_112$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_113	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_113$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_114	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_114$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_115	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_115$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_116	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_116$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_117	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_117$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_118	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_118$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_119	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_119$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_11A	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_11A$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_11B	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_11B$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBUFFER_VESA_MODE_USER	drivers/video/Kconfig	/^config FRAMEBUFFER_VESA_MODE_USER$/;"	c	choice:Graphics support""choice8bacc91a0104
FRAMEBURSTENABLE	drivers/net/designware.h	/^#define FRAMEBURSTENABLE	/;"	d
FRAME_FILTER	drivers/net/lan91c96.h	/^#define FRAME_FILTER /;"	d
FRAME_NUMBER	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FRAME_NUMBER	/;"	d
FRAME_SIZE	arch/x86/include/asm/ptrace.h	/^#define FRAME_SIZE /;"	d
FRAME_SIZE_FULL	arch/avr32/include/asm/ptrace.h	/^#define FRAME_SIZE_FULL /;"	d
FRAME_SIZE_MIN	arch/avr32/include/asm/ptrace.h	/^#define FRAME_SIZE_MIN	/;"	d
FRB_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FCE0_MARK,	FCE1_MARK,	FRB_MARK, \/* FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
FRB_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FRB_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FRCDIV_MASK	drivers/clk/clk_pic32.c	/^#define FRCDIV_MASK	/;"	d	file:
FRDY	drivers/usb/host/r8a66597.h	/^#define	FRDY	/;"	d
FRECR	drivers/net/sh_eth.h	/^	FRECR,$/;"	e	enum:__anon5ef54f5a0103
FREEZE_CHANNEL_NUM	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define FREEZE_CHANNEL_NUM	/;"	d
FREEZE_CTRL_CHAN_STATE	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^} FREEZE_CTRL_CHAN_STATE;$/;"	t	typeref:enum:__anon2644e50e0103
FREEZE_CTRL_FROZEN	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	FREEZE_CTRL_FROZEN = 0,$/;"	e	enum:__anon2644e50e0103
FREEZE_CTRL_THAWED	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	FREEZE_CTRL_THAWED = 1$/;"	e	enum:__anon2644e50e0103
FREE_RUN	drivers/net/smc911x.h	/^#define FREE_RUN	/;"	d
FREF	arch/m68k/cpu/mcf532x/speed.c	/^#define FREF	/;"	d	file:
FREF_CLK0_OUT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define FREF_CLK0_OUT	/;"	d
FREF_CLK1_OUT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define FREF_CLK1_OUT	/;"	d
FREF_CLK1_OUT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define FREF_CLK1_OUT	/;"	d
FREF_CLK1_REQ	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define FREF_CLK1_REQ	/;"	d
FREF_CLK2_OUT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define FREF_CLK2_OUT	/;"	d
FREF_CLK2_OUT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define FREF_CLK2_OUT	/;"	d
FREF_CLK2_REQ	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define FREF_CLK2_REQ	/;"	d
FREF_CLK_IOREQ	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define FREF_CLK_IOREQ	/;"	d
FREF_MAX_HZ	drivers/clk/rockchip/clk_rk3288.c	/^	FREF_MAX_HZ	= 2200U * 1000000,$/;"	e	enum:__anon06a678fa0103	file:
FREF_MAX_KHZ	drivers/clk/rockchip/clk_rk3288.c	/^#define FREF_MAX_KHZ	/;"	d	file:
FREF_MIN_HZ	drivers/clk/rockchip/clk_rk3288.c	/^	FREF_MIN_HZ	= 269 * 1000,$/;"	e	enum:__anon06a678fa0103	file:
FREF_MIN_KHZ	drivers/clk/rockchip/clk_rk3288.c	/^#define FREF_MIN_KHZ	/;"	d	file:
FREQUENCY	include/lattice.h	/^#define FREQUENCY	/;"	d
FREQ_100	drivers/timer/tsc_timer.c	/^#define FREQ_100	/;"	d	file:
FREQ_1000	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define FREQ_1000	/;"	d
FREQ_133	drivers/timer/tsc_timer.c	/^#define FREQ_133	/;"	d	file:
FREQ_166	drivers/timer/tsc_timer.c	/^#define FREQ_166	/;"	d	file:
FREQ_266	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define FREQ_266	/;"	d
FREQ_332	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define FREQ_332	/;"	d
FREQ_333	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define FREQ_333	/;"	d
FREQ_667	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define FREQ_667	/;"	d
FREQ_83	drivers/timer/tsc_timer.c	/^#define FREQ_83	/;"	d	file:
FREQ_HIBERNATE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define FREQ_HIBERNATE	/;"	d
FREQ_MASK	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define FREQ_MASK	/;"	d
FRF_MASK	drivers/spi/rk_spi.h	/^	FRF_MASK	= 3,$/;"	e	enum:__anondde5bacc0103
FRF_MICROWIRE	drivers/spi/rk_spi.h	/^	FRF_MICROWIRE,		\/* National Semiconductors Microwire *\/$/;"	e	enum:__anondde5bacc0103
FRF_RESV	drivers/spi/rk_spi.h	/^	FRF_RESV,$/;"	e	enum:__anondde5bacc0103
FRF_SHIFT	drivers/spi/rk_spi.h	/^	FRF_SHIFT	= 16,	\/* Frame Format *\/$/;"	e	enum:__anondde5bacc0103
FRF_SPI	drivers/spi/rk_spi.h	/^	FRF_SPI		= 0,	\/* Motorola SPI *\/$/;"	e	enum:__anondde5bacc0103
FRF_SSP	drivers/spi/rk_spi.h	/^	FRF_SSP,			\/* Texas Instruments SSP*\/$/;"	e	enum:__anondde5bacc0103
FRMNUM	drivers/usb/host/r8a66597.h	/^#define FRMNUM	/;"	d
FRNM	drivers/usb/host/r8a66597.h	/^#define	FRNM	/;"	d
FRONT_BUTTON_GPIO	board/bosch/shc/board.h	/^#define FRONT_BUTTON_GPIO /;"	d
FRQCR	arch/sh/include/asm/cpu_sh7203.h	/^#define FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7264.h	/^#define FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7706.h	/^#define	FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7710.h	/^#define FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7720.h	/^#define FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7722.h	/^#define FRQCR /;"	d
FRQCR	arch/sh/include/asm/cpu_sh7723.h	/^#define FRQCR /;"	d
FRQCR	arch/sh/include/asm/cpu_sh7724.h	/^#define FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7750.h	/^#define FRQCR	/;"	d
FRQCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	FRQCR	/;"	d
FRQCR0_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^FRQCR0_A:	.long	0xFFC80000$/;"	l
FRQCR0_A	board/renesas/r0p7734/lowlevel_init.S	/^FRQCR0_A:	.long	0xFFC80000$/;"	l
FRQCR0_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^FRQCR0_D:	.long	0xCF000001$/;"	l
FRQCR0_D	board/renesas/r0p7734/lowlevel_init.S	/^FRQCR0_D:	.long	0xCF000001$/;"	l
FRQCR2_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^FRQCR2_A:	.long	0xFFC80008$/;"	l
FRQCR2_A	board/renesas/r0p7734/lowlevel_init.S	/^FRQCR2_A:	.long	0xFFC80008$/;"	l
FRQCR2_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^FRQCR2_D:	.long	0x00000000$/;"	l
FRQCR2_D	board/renesas/r0p7734/lowlevel_init.S	/^FRQCR2_D:	.long	0x00000000$/;"	l
FRQCRA	arch/sh/include/asm/cpu_sh7724.h	/^#define FRQCRA	/;"	d
FRQCRA_A	board/renesas/ecovec/lowlevel_init.S	/^FRQCRA_A:	.long	FRQCRA$/;"	l
FRQCRA_D	board/renesas/ecovec/lowlevel_init.S	/^FRQCRA_D:	.long	0x8E003508$/;"	l
FRQCRB	arch/sh/include/asm/cpu_sh7724.h	/^#define FRQCRB	/;"	d
FRQCRB_A	board/renesas/ecovec/lowlevel_init.S	/^FRQCRB_A:	.long	FRQCRB$/;"	l
FRQCRB_D	board/renesas/ecovec/lowlevel_init.S	/^FRQCRB_D:	.long	0x0$/;"	l
FRQCR_A	board/mpr2/lowlevel_init.S	/^FRQCR_A:	.long	0xA415FF80$/;"	l
FRQCR_A	board/ms7720se/lowlevel_init.S	/^FRQCR_A:	.long	0xA415FF80	\/* FRQCR Address *\/$/;"	l
FRQCR_A	board/ms7722se/lowlevel_init.S	/^FRQCR_A:	.long	FRQCR$/;"	l
FRQCR_A	board/ms7750se/lowlevel_init.S	/^FRQCR_A:	.long	FRQCR$/;"	l
FRQCR_A	board/renesas/MigoR/lowlevel_init.S	/^FRQCR_A:	.long	FRQCR$/;"	l
FRQCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^FRQCR_A:	.long	FRQCR$/;"	l
FRQCR_A	board/renesas/r2dplus/lowlevel_init.S	/^FRQCR_A:	.long	FRQCR		\/* FRQCR Address *\/$/;"	l
FRQCR_A	board/renesas/r7780mp/lowlevel_init.S	/^FRQCR_A:		.long	FRQCR$/;"	l
FRQCR_A	board/renesas/rsk7203/lowlevel_init.S	/^FRQCR_A:	.long 0xFFFE0010$/;"	l
FRQCR_A	board/renesas/rsk7264/lowlevel_init.S	/^FRQCR_A:	.long 0xFFFE0010$/;"	l
FRQCR_A	board/renesas/rsk7269/lowlevel_init.S	/^FRQCR_A:	.long 0xFFFE0010$/;"	l
FRQCR_D	board/mpr2/lowlevel_init.S	/^FRQCR_D:	.word	0x1103		\/* I:B:P=8:4:2 *\/$/;"	l
FRQCR_D	board/ms7720se/lowlevel_init.S	/^FRQCR_D:	.word	0x1103		\/* I:B:P=8:4:2 *\/$/;"	l
FRQCR_D	board/ms7722se/lowlevel_init.S	/^FRQCR_D:	.long	0x07022538$/;"	l
FRQCR_D	board/ms7750se/lowlevel_init.S	/^FRQCR_D:$/;"	l
FRQCR_D	board/renesas/MigoR/lowlevel_init.S	/^FRQCR_D:	.long	0x07033639$/;"	l
FRQCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^FRQCR_D:	.long	0x0b04474a$/;"	l
FRQCR_D	board/renesas/r2dplus/lowlevel_init.S	/^FRQCR_D:	.long	0x00000e0a	\/* 03\/07\/15 modify *\/$/;"	l
FRQCR_D	board/renesas/r7780mp/lowlevel_init.S	/^FRQCR_D:		.long	0x40233035$/;"	l
FRQCR_D	board/renesas/rsk7203/lowlevel_init.S	/^FRQCR_D:	.word 0x0104$/;"	l
FRQCR_D	board/renesas/rsk7264/lowlevel_init.S	/^FRQCR_D:	.word 0x1003$/;"	l
FRQCR_D	board/renesas/rsk7269/lowlevel_init.S	/^FRQCR_D:	.word 0x0015$/;"	l
FRZCTRLCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FRZCTRLCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define FRZCTRLCOLD_RESET	/;"	d
FS	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^#define FS /;"	d	file:
FS	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^#define FS /;"	d	file:
FS	arch/x86/include/asm/ptrace.h	/^#define FS /;"	d
FS	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 CS, DS, SS, ES, FS, GS;$/;"	m	struct:i386_segment_regs	typeref:typename:u16
FSADR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FSADR0	/;"	d
FSADR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FSADR1	/;"	d
FSADR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FSADR2	/;"	d
FSADR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FSADR3	/;"	d
FSADR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FSADR4	/;"	d
FSADR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define FSADR5	/;"	d
FSC	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define FSC	/;"	d
FSCLKST_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FSCLKST_MARK,$/;"	e	enum:__anona307945e0103	file:
FSDEV	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FSDEV	/;"	d
FSEL	board/samsung/odroid/setup.h	/^#define FSEL(/;"	d
FSEL_CLKSEL_24M	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define FSEL_CLKSEL_24M	/;"	d
FSG_BUFLEN	drivers/usb/gadget/storage_common.c	/^#define FSG_BUFLEN	/;"	d	file:
FSG_DRIVER_DESC	drivers/usb/gadget/f_mass_storage.c	/^#define FSG_DRIVER_DESC	/;"	d	file:
FSG_DRIVER_VERSION	drivers/usb/gadget/f_mass_storage.c	/^#define FSG_DRIVER_VERSION	/;"	d	file:
FSG_FS_FUNCTION_PRE_EP_ENTRIES	drivers/usb/gadget/storage_common.c	/^#  define FSG_FS_FUNCTION_PRE_EP_ENTRIES	/;"	d	file:
FSG_HS_FUNCTION_PRE_EP_ENTRIES	drivers/usb/gadget/storage_common.c	/^#  define FSG_HS_FUNCTION_PRE_EP_ENTRIES	/;"	d	file:
FSG_MAX_LUNS	drivers/usb/gadget/storage_common.c	/^#define FSG_MAX_LUNS	/;"	d	file:
FSG_NO_DEVICE_STRINGS	drivers/usb/gadget/f_mass_storage.c	/^#define FSG_NO_DEVICE_STRINGS /;"	d	file:
FSG_NO_INTR_EP	drivers/usb/gadget/f_mass_storage.c	/^#define FSG_NO_INTR_EP /;"	d	file:
FSG_NO_OTG	drivers/usb/gadget/f_mass_storage.c	/^#define FSG_NO_OTG /;"	d	file:
FSG_NUM_BUFFERS	drivers/usb/gadget/storage_common.c	/^#define FSG_NUM_BUFFERS	/;"	d	file:
FSG_PRODUCT_ID	drivers/usb/gadget/storage_common.c	/^#define FSG_PRODUCT_ID	/;"	d	file:
FSG_STATE_ABORT_BULK_OUT	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_ABORT_BULK_OUT,$/;"	e	enum:fsg_state	file:
FSG_STATE_COMMAND_PHASE	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_COMMAND_PHASE = -10,$/;"	e	enum:fsg_state	file:
FSG_STATE_CONFIG_CHANGE	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_CONFIG_CHANGE,$/;"	e	enum:fsg_state	file:
FSG_STATE_DATA_PHASE	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_DATA_PHASE,$/;"	e	enum:fsg_state	file:
FSG_STATE_DISCONNECT	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_DISCONNECT,$/;"	e	enum:fsg_state	file:
FSG_STATE_EXIT	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_EXIT,$/;"	e	enum:fsg_state	file:
FSG_STATE_IDLE	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_IDLE = 0,$/;"	e	enum:fsg_state	file:
FSG_STATE_INTERFACE_CHANGE	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_INTERFACE_CHANGE,$/;"	e	enum:fsg_state	file:
FSG_STATE_RESET	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_RESET,$/;"	e	enum:fsg_state	file:
FSG_STATE_STATUS_PHASE	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_STATUS_PHASE,$/;"	e	enum:fsg_state	file:
FSG_STATE_TERMINATED	drivers/usb/gadget/storage_common.c	/^	FSG_STATE_TERMINATED$/;"	e	enum:fsg_state	file:
FSG_STRING_CONFIG	drivers/usb/gadget/storage_common.c	/^	FSG_STRING_CONFIG,$/;"	e	enum:__anonf07acf550103	file:
FSG_STRING_INTERFACE	drivers/usb/gadget/storage_common.c	/^	FSG_STRING_INTERFACE$/;"	e	enum:__anonf07acf550103	file:
FSG_STRING_MANUFACTURER	drivers/usb/gadget/storage_common.c	/^	FSG_STRING_MANUFACTURER	= 1,$/;"	e	enum:__anonf07acf550103	file:
FSG_STRING_PRODUCT	drivers/usb/gadget/storage_common.c	/^	FSG_STRING_PRODUCT,$/;"	e	enum:__anonf07acf550103	file:
FSG_STRING_SERIAL	drivers/usb/gadget/storage_common.c	/^	FSG_STRING_SERIAL,$/;"	e	enum:__anonf07acf550103	file:
FSG_VENDOR_ID	drivers/usb/gadget/storage_common.c	/^#define FSG_VENDOR_ID	/;"	d	file:
FSIACK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIACK_MARK,	FSIAILR_MARK,	FSIAIBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIACK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIACK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, FSIAOMC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIACK_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIACK_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAIBT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIACK_MARK,	FSIAILR_MARK,	FSIAIBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAIBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, FSIAIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAIBT_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAIBT_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAILR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIACK_MARK,	FSIAILR_MARK,	FSIAIBT_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAILR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, FSIAILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAILR_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAILR_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAISLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAISLD_MARK, TPU0TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAISLD_PORT0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAISLD_PORT0_MARK,	\/* FSIAISLD Port 0\/5 *\/$/;"	e	enum:__anona304c1340103	file:
FSIAISLD_PORT5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAISLD_PORT5_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAISLD_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAISLD_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAOBT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAOBT_MARK,	FSIAOSLD_MARK,	FSIAOMC_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAOBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, FSIAIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAOLR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAOSLD1_MARK,	FSIAOSLD2_MARK,	FSIAOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAOLR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, FSIAILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAOMC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAOBT_MARK,	FSIAOSLD_MARK,	FSIAOMC_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAOMC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIACK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, FSIAOMC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIAOSLD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAOSLD1_MARK,	FSIAOSLD2_MARK,	FSIAOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAOSLD2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAOSLD1_MARK,	FSIAOSLD2_MARK,	FSIAOLR_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAOSLD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIAOBT_MARK,	FSIAOSLD_MARK,	FSIAOMC_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIAOSLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOSLD_MARK, BBIF2_TXD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIASPDIF_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIASPDIF_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, FSIBSPDIF_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
FSIASPDIF_PORT18_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIASPDIF_PORT18_MARK,$/;"	e	enum:__anona304c1340103	file:
FSIASPDIF_PORT9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	FSIASPDIF_PORT9_MARK,	\/* FSIASPDIF Port 9\/18 *\/$/;"	e	enum:__anona304c1340103	file:
FSIBCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBCK_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FSIBOMC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
FSIBIBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBOBT_MARK, FSIBIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBILR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBOLR_MARK, FSIBILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBISLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBISLD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBISLD_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBISLD_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBOBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBOBT_MARK, FSIBIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBOLR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBOLR_MARK, FSIBILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBOMC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBCK_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FSIBOMC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
FSIBOSLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBOSLD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIBSPDIF_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIASPDIF_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, FSIBSPDIF_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
FSICCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICCK_MARK, FSICOMC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICIBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOBT_MARK, FSICIBT_MARK, FSIDOBT_MARK, FSIDIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICILR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOLR_MARK, FSICILR_MARK, FSIDOLR_MARK, FSIDILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICISLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICISLD_MARK, FSIDISLD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOBT_MARK, FSICIBT_MARK, FSIDOBT_MARK, FSIDIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOLR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOLR_MARK, FSICILR_MARK, FSIDOLR_MARK, FSIDILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOMC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICCK_MARK, FSICOMC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOSLDT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA0_CTS__MARK, FSICOSLDT1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOSLDT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA0_RTS__MARK, FSICOSLDT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOSLDT3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO5_MARK, SCIFA0_SCK_MARK, FSICOSLDT3_MARK, PORT16_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSICOSLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOSLD_MARK, PORT47_FSICSPDIF_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIDIBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOBT_MARK, FSICIBT_MARK, FSIDOBT_MARK, FSIDIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIDILR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOLR_MARK, FSICILR_MARK, FSIDOLR_MARK, FSIDILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIDISLD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICISLD_MARK, FSIDISLD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIDOBT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOBT_MARK, FSICIBT_MARK, FSIDOBT_MARK, FSIDIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSIDOLR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOLR_MARK, FSICILR_MARK, FSIDOLR_MARK, FSIDILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
FSL_ATA_CTRL_ATA_RST_B	include/configs/aria.h	/^#define FSL_ATA_CTRL_ATA_RST_B	/;"	d
FSL_ATA_CTRL_ATA_RST_B	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_ATA_RST_B	/;"	d
FSL_ATA_CTRL_DMA_PENDING	include/configs/aria.h	/^#define FSL_ATA_CTRL_DMA_PENDING	/;"	d
FSL_ATA_CTRL_DMA_PENDING	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_DMA_PENDING	/;"	d
FSL_ATA_CTRL_DMA_ULTRA	include/configs/aria.h	/^#define FSL_ATA_CTRL_DMA_ULTRA	/;"	d
FSL_ATA_CTRL_DMA_ULTRA	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_DMA_ULTRA	/;"	d
FSL_ATA_CTRL_DMA_WRITE	include/configs/aria.h	/^#define FSL_ATA_CTRL_DMA_WRITE	/;"	d
FSL_ATA_CTRL_DMA_WRITE	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_DMA_WRITE	/;"	d
FSL_ATA_CTRL_FIFO_RCV_EN	include/configs/aria.h	/^#define FSL_ATA_CTRL_FIFO_RCV_EN	/;"	d
FSL_ATA_CTRL_FIFO_RCV_EN	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_FIFO_RCV_EN	/;"	d
FSL_ATA_CTRL_FIFO_RST_B	include/configs/aria.h	/^#define FSL_ATA_CTRL_FIFO_RST_B	/;"	d
FSL_ATA_CTRL_FIFO_RST_B	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_FIFO_RST_B	/;"	d
FSL_ATA_CTRL_FIFO_TX_EN	include/configs/aria.h	/^#define FSL_ATA_CTRL_FIFO_TX_EN	/;"	d
FSL_ATA_CTRL_FIFO_TX_EN	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_FIFO_TX_EN	/;"	d
FSL_ATA_CTRL_IORDY_EN	include/configs/aria.h	/^#define FSL_ATA_CTRL_IORDY_EN	/;"	d
FSL_ATA_CTRL_IORDY_EN	include/configs/mpc5121ads.h	/^#define FSL_ATA_CTRL_IORDY_EN	/;"	d
FSL_BOOKE_MAS0	arch/powerpc/include/asm/mmu.h	/^#define FSL_BOOKE_MAS0(/;"	d
FSL_BOOKE_MAS1	arch/powerpc/include/asm/mmu.h	/^#define FSL_BOOKE_MAS1(/;"	d
FSL_BOOKE_MAS2	arch/powerpc/include/asm/mmu.h	/^#define FSL_BOOKE_MAS2(/;"	d
FSL_BOOKE_MAS3	arch/powerpc/include/asm/mmu.h	/^#define FSL_BOOKE_MAS3(/;"	d
FSL_BOOKE_MAS7	arch/powerpc/include/asm/mmu.h	/^#define FSL_BOOKE_MAS7(/;"	d
FSL_BYPASS_AMQ	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_BYPASS_AMQ	/;"	d
FSL_CAAM	drivers/crypto/fsl/Kconfig	/^config FSL_CAAM$/;"	c
FSL_CHASSIS2_CCSR_PORSR1_RCW_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_CCSR_PORSR1_RCW_MASK	/;"	d
FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK	/;"	d
FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT	/;"	d
FSL_CHASSIS2_DCFG_FUSESR_VID_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DCFG_FUSESR_VID_MASK	/;"	d
FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT	/;"	d
FSL_CHASSIS2_DEVDISR2_10GEC1_1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_10GEC1_1	/;"	d
FSL_CHASSIS2_DEVDISR2_10GEC1_2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_10GEC1_2	/;"	d
FSL_CHASSIS2_DEVDISR2_10GEC1_3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_10GEC1_3	/;"	d
FSL_CHASSIS2_DEVDISR2_10GEC1_4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_10GEC1_4	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_1	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_10	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_10	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_2	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_3	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_4	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_5	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_6	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_6	/;"	d
FSL_CHASSIS2_DEVDISR2_DTSEC1_9	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_DEVDISR2_DTSEC1_9	/;"	d
FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_MASK	/;"	d
FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_SHIFT	/;"	d
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK	/;"	d
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT	/;"	d
FSL_CHASSIS2_RCWSR13_EC1	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC1	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC1	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1_FTM	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC1_FTM	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1_FTM	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC1_FTM	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1_GPIO	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC1_GPIO	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC1_GPIO	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC1_GPIO	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC2	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC2	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_1588	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_1588	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_1588	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_1588	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_FTM	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_FTM	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_FTM	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_FTM	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_GPIO	drivers/net/fm/ls1043.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_GPIO	/;"	d	file:
FSL_CHASSIS2_RCWSR13_EC2_GPIO	drivers/net/fm/ls1046.c	/^#define FSL_CHASSIS2_RCWSR13_EC2_GPIO	/;"	d	file:
FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK	/;"	d
FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT	/;"	d
FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK	/;"	d
FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT	/;"	d
FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK	/;"	d
FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT	/;"	d
FSL_CHASSIS3_DCFG_FUSESR_VID_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK	/;"	d
FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC1	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC10	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC10	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC11	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC11	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC12	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC12	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC13	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC13	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC14	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC14	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC15	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC15	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC16	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC16	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC17	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC17	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC18	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC18	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC19	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC19	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC2	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC20	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC20	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC21	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC21	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC22	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC22	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC23	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC23	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC24	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC24	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC3	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC4	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC5	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC6	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC6	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC7	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC8	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC8	/;"	d
FSL_CHASSIS3_DEVDISR2_DPMAC9	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_DEVDISR2_DPMAC9	/;"	d
FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_MASK	/;"	d
FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_SHIFT	/;"	d
FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK	/;"	d
FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT	/;"	d
FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_MASK	/;"	d
FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_SHIFT	/;"	d
FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define	FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK	/;"	d
FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define	FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT	/;"	d
FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define	FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK	/;"	d
FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define	FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT	/;"	d
FSL_CORENET2_RCWSR4_SRDS1_PRTCL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL	/;"	d
FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT	/;"	d
FSL_CORENET2_RCWSR4_SRDS2_PRTCL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL	/;"	d
FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT	/;"	d
FSL_CORENET2_RCWSR4_SRDS3_PRTCL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS3_PRTCL	/;"	d
FSL_CORENET2_RCWSR4_SRDS3_PRTCL_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS3_PRTCL_SHIFT	/;"	d
FSL_CORENET2_RCWSR4_SRDS4_PRTCL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS4_PRTCL	/;"	d
FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT	/;"	d
FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_MASK	/;"	d
FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT /;"	d
FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S1_PLL1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S1_PLL1	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S1_PLL2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S1_PLL2	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S2_PLL1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S2_PLL1	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S2_PLL2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S2_PLL2	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S3_PLL1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S3_PLL1	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S3_PLL2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S3_PLL2	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL1	/;"	d
FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL2	/;"	d
FSL_CORENET_CCSR_PORSR1_RCW_MASK	board/freescale/t102xqds/spl.c	/^#define FSL_CORENET_CCSR_PORSR1_RCW_MASK /;"	d	file:
FSL_CORENET_CCSR_PORSR1_RCW_MASK	board/freescale/t104xrdb/spl.c	/^#define FSL_CORENET_CCSR_PORSR1_RCW_MASK	/;"	d	file:
FSL_CORENET_CCSR_PORSR1_RCW_MASK	board/freescale/t4qds/spl.c	/^#define FSL_CORENET_CCSR_PORSR1_RCW_MASK	/;"	d	file:
FSL_CORENET_CCSR_PORSR1_RCW_MASK	board/freescale/t4rdb/spl.c	/^#define FSL_CORENET_CCSR_PORSR1_RCW_MASK	/;"	d	file:
FSL_CORENET_DCFG_FUSESR_ALTVID_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCFG_FUSESR_ALTVID_MASK	/;"	d
FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT	/;"	d
FSL_CORENET_DCFG_FUSESR_VID_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCFG_FUSESR_VID_MASK	/;"	d
FSL_CORENET_DCFG_FUSESR_VID_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCFG_FUSESR_VID_SHIFT	/;"	d
FSL_CORENET_DCSR_SZ_1G	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCSR_SZ_1G	/;"	d
FSL_CORENET_DCSR_SZ_4M	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCSR_SZ_4M	/;"	d
FSL_CORENET_DCSR_SZ_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DCSR_SZ_MASK	/;"	d
FSL_CORENET_DEVDISR2_10GEC1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1	/;"	d
FSL_CORENET_DEVDISR2_10GEC1_1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1_1	/;"	d
FSL_CORENET_DEVDISR2_10GEC1_1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1_1 /;"	d
FSL_CORENET_DEVDISR2_10GEC1_2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1_2	/;"	d
FSL_CORENET_DEVDISR2_10GEC1_2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1_2 /;"	d
FSL_CORENET_DEVDISR2_10GEC1_3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1_3	/;"	d
FSL_CORENET_DEVDISR2_10GEC1_4	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC1_4	/;"	d
FSL_CORENET_DEVDISR2_10GEC2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC2	/;"	d
FSL_CORENET_DEVDISR2_10GEC2_1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC2_1	/;"	d
FSL_CORENET_DEVDISR2_10GEC2_2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_10GEC2_2	/;"	d
FSL_CORENET_DEVDISR2_CPRI	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_CPRI	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_1	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_10	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_10	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_2	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_3	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_4	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_4	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_5	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_5	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_6	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_6	/;"	d
FSL_CORENET_DEVDISR2_DTSEC1_9	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC1_9	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_1	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_10	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_10	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_2	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_3	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_4	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_4	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_5	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_5	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_6	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_6	/;"	d
FSL_CORENET_DEVDISR2_DTSEC2_9	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_DTSEC2_9	/;"	d
FSL_CORENET_DEVDISR2_FM1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_FM1	/;"	d
FSL_CORENET_DEVDISR2_FM2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_FM2	/;"	d
FSL_CORENET_DEVDISR2_PME	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_PME	/;"	d
FSL_CORENET_DEVDISR2_QMBM	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_QMBM	/;"	d
FSL_CORENET_DEVDISR2_SEC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR2_SEC	/;"	d
FSL_CORENET_DEVDISR3_BMAN	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_BMAN	/;"	d
FSL_CORENET_DEVDISR3_LA1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_LA1	/;"	d
FSL_CORENET_DEVDISR3_MAPLE1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_MAPLE1	/;"	d
FSL_CORENET_DEVDISR3_MAPLE2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_MAPLE2	/;"	d
FSL_CORENET_DEVDISR3_MAPLE3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_MAPLE3	/;"	d
FSL_CORENET_DEVDISR3_PCIE1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_PCIE1	/;"	d
FSL_CORENET_DEVDISR3_PCIE2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_PCIE2	/;"	d
FSL_CORENET_DEVDISR3_PCIE3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_PCIE3	/;"	d
FSL_CORENET_DEVDISR3_PCIE4	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_PCIE4	/;"	d
FSL_CORENET_DEVDISR3_QMAN	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_QMAN	/;"	d
FSL_CORENET_DEVDISR3_SRIO1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_SRIO1	/;"	d
FSL_CORENET_DEVDISR3_SRIO2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR3_SRIO2	/;"	d
FSL_CORENET_DEVDISR4_DUART1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR4_DUART1	/;"	d
FSL_CORENET_DEVDISR4_DUART2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR4_DUART2	/;"	d
FSL_CORENET_DEVDISR4_ESPI	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR4_ESPI	/;"	d
FSL_CORENET_DEVDISR4_I2C1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR4_I2C1	/;"	d
FSL_CORENET_DEVDISR4_I2C2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR4_I2C2	/;"	d
FSL_CORENET_DEVDISR5_CPC1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_CPC1	/;"	d
FSL_CORENET_DEVDISR5_CPC2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_CPC2	/;"	d
FSL_CORENET_DEVDISR5_CPC3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_CPC3	/;"	d
FSL_CORENET_DEVDISR5_DBG	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_DBG	/;"	d
FSL_CORENET_DEVDISR5_DDR1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_DDR1	/;"	d
FSL_CORENET_DEVDISR5_DDR2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_DDR2	/;"	d
FSL_CORENET_DEVDISR5_DDR3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_DDR3	/;"	d
FSL_CORENET_DEVDISR5_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_GPIO	/;"	d
FSL_CORENET_DEVDISR5_IFC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_IFC	/;"	d
FSL_CORENET_DEVDISR5_NAL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_NAL	/;"	d
FSL_CORENET_DEVDISR5_TIMERS	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR5_TIMERS	/;"	d
FSL_CORENET_DEVDISR_DBG	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DBG	/;"	d
FSL_CORENET_DEVDISR_DCE	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DCE	/;"	d
FSL_CORENET_DEVDISR_DDR1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DDR1	/;"	d
FSL_CORENET_DEVDISR_DDR2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DDR2	/;"	d
FSL_CORENET_DEVDISR_DMA1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DMA1	/;"	d
FSL_CORENET_DEVDISR_DMA2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DMA2	/;"	d
FSL_CORENET_DEVDISR_DUART1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DUART1	/;"	d
FSL_CORENET_DEVDISR_DUART2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_DUART2	/;"	d
FSL_CORENET_DEVDISR_ELBC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_ELBC	/;"	d
FSL_CORENET_DEVDISR_ESDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_ESDHC	/;"	d
FSL_CORENET_DEVDISR_ESPI	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_ESPI	/;"	d
FSL_CORENET_DEVDISR_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_GPIO	/;"	d
FSL_CORENET_DEVDISR_I2C1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_I2C1	/;"	d
FSL_CORENET_DEVDISR_I2C2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_I2C2	/;"	d
FSL_CORENET_DEVDISR_NAL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_NAL	/;"	d
FSL_CORENET_DEVDISR_PBL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PBL	/;"	d
FSL_CORENET_DEVDISR_PCIE1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PCIE1	/;"	d
FSL_CORENET_DEVDISR_PCIE2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PCIE2	/;"	d
FSL_CORENET_DEVDISR_PCIE3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PCIE3	/;"	d
FSL_CORENET_DEVDISR_PCIE4	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PCIE4	/;"	d
FSL_CORENET_DEVDISR_PMAN	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PMAN	/;"	d
FSL_CORENET_DEVDISR_PME	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_PME	/;"	d
FSL_CORENET_DEVDISR_RMU	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_RMU	/;"	d
FSL_CORENET_DEVDISR_SATA1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_SATA1	/;"	d
FSL_CORENET_DEVDISR_SATA2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_SATA2	/;"	d
FSL_CORENET_DEVDISR_SEC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_SEC	/;"	d
FSL_CORENET_DEVDISR_SRIO1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_SRIO1	/;"	d
FSL_CORENET_DEVDISR_SRIO2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_SRIO2	/;"	d
FSL_CORENET_DEVDISR_USB1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_USB1	/;"	d
FSL_CORENET_DEVDISR_USB2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_DEVDISR_USB2	/;"	d
FSL_CORENET_NUM_DEVDISR	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_NUM_DEVDISR	/;"	d
FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK	/;"	d
FSL_CORENET_RCWSR0_MEM_PLL_RAT_RESV_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_RESV_SHIFT	/;"	d
FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT	/;"	d
FSL_CORENET_RCWSR11_EC1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1	/;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1	/;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_MII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_MII	/;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_NONE	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_NONE	/;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII	/;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_MII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_MII /;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_NONE	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_NONE /;"	d
FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_RGMII /;"	d
FSL_CORENET_RCWSR11_EC1_FM1_USB1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC1_FM1_USB1	/;"	d
FSL_CORENET_RCWSR11_EC2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2	/;"	d
FSL_CORENET_RCWSR11_EC2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2 /;"	d
FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2	/;"	d
FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_MII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_MII	/;"	d
FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_NONE	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_NONE	/;"	d
FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_RGMII	/;"	d
FSL_CORENET_RCWSR11_EC2_FM2_DTSEC1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC1	/;"	d
FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII /;"	d
FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE /;"	d
FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_RGMII /;"	d
FSL_CORENET_RCWSR11_EC2_USB2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR11_EC2_USB2	/;"	d
FSL_CORENET_RCWSR13_EC1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1	/;"	d
FSL_CORENET_RCWSR13_EC1	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC1	/;"	d	file:
FSL_CORENET_RCWSR13_EC1_DTSEC3_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_DTSEC3_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_MII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_MII	/;"	d
FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC1_FM1_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_FM1_GPIO	/;"	d
FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII	/;"	d	file:
FSL_CORENET_RCWSR13_EC1_FM2_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_FM2_GPIO	/;"	d
FSL_CORENET_RCWSR13_EC1_FM2_GPIO	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC1_FM2_GPIO	/;"	d	file:
FSL_CORENET_RCWSR13_EC1_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_GPIO	/;"	d
FSL_CORENET_RCWSR13_EC1_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC1_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2	/;"	d
FSL_CORENET_RCWSR13_EC2	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC2	/;"	d	file:
FSL_CORENET_RCWSR13_EC2_DTSEC10_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_DTSEC10_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC2_DTSEC4_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_DTSEC4_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII	/;"	d
FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII	/;"	d	file:
FSL_CORENET_RCWSR13_EC2_FM1_DTSEC6_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC6_RGMII	/;"	d
FSL_CORENET_RCWSR13_EC2_FM1_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO	/;"	d
FSL_CORENET_RCWSR13_EC2_FM1_GPIO	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO	/;"	d	file:
FSL_CORENET_RCWSR13_EC2_FM2_DTSEC6_RGMII	drivers/net/fm/t4240.c	/^#define FSL_CORENET_RCWSR13_EC2_FM2_DTSEC6_RGMII	/;"	d	file:
FSL_CORENET_RCWSR13_EC2_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_GPIO	/;"	d
FSL_CORENET_RCWSR13_EC2_RGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_EC2_RGMII	/;"	d
FSL_CORENET_RCWSR13_MAC2_GMII_SEL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL	/;"	d
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT	/;"	d
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH	/;"	d
FSL_CORENET_RCWSR4_SRDS_PRTCL	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR4_SRDS_PRTCL	/;"	d
FSL_CORENET_RCWSR5_DDR_SYNC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR5_DDR_SYNC	/;"	d
FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT	/;"	d
FSL_CORENET_RCWSR5_SRDS2_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR5_SRDS2_EN	/;"	d
FSL_CORENET_RCWSR5_SRDS_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR5_SRDS_EN	/;"	d
FSL_CORENET_RCWSR6_BOOT_LOC	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR6_BOOT_LOC	/;"	d
FSL_CORENET_RCWSR7_MCK_TO_PLAT_RAT	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR7_MCK_TO_PLAT_RAT	/;"	d
FSL_CORENET_RCWSR8_HOST_AGT_B1	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR8_HOST_AGT_B1	/;"	d
FSL_CORENET_RCWSR8_HOST_AGT_B2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSR8_HOST_AGT_B2	/;"	d
FSL_CORENET_RCWSRn_SRDS_LPD_B2	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSRn_SRDS_LPD_B2	/;"	d
FSL_CORENET_RCWSRn_SRDS_LPD_B3	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RCWSRn_SRDS_LPD_B3	/;"	d
FSL_CORENET_RSTRQMR1_SRDS_RST_MSK	arch/powerpc/include/asm/immap_85xx.h	/^#define FSL_CORENET_RSTRQMR1_SRDS_RST_MSK /;"	d
FSL_DCFG_PORSR1_SYSCLK_DIFF	arch/powerpc/include/asm/immap_85xx.h	/^#define	FSL_DCFG_PORSR1_SYSCLK_DIFF	/;"	d
FSL_DCFG_PORSR1_SYSCLK_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define	FSL_DCFG_PORSR1_SYSCLK_MASK	/;"	d
FSL_DCFG_PORSR1_SYSCLK_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define	FSL_DCFG_PORSR1_SYSCLK_SHIFT	/;"	d
FSL_DCFG_PORSR1_SYSCLK_SINGLE_ENDED	arch/powerpc/include/asm/immap_85xx.h	/^#define	FSL_DCFG_PORSR1_SYSCLK_SINGLE_ENDED	/;"	d
FSL_DDR_256B_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_256B_INTERLEAVING	/;"	d
FSL_DDR_3WAY_1KB_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_3WAY_1KB_INTERLEAVING	/;"	d
FSL_DDR_3WAY_4KB_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_3WAY_4KB_INTERLEAVING	/;"	d
FSL_DDR_3WAY_8KB_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_3WAY_8KB_INTERLEAVING	/;"	d
FSL_DDR_4WAY_1KB_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_4WAY_1KB_INTERLEAVING	/;"	d
FSL_DDR_4WAY_4KB_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_4WAY_4KB_INTERLEAVING	/;"	d
FSL_DDR_4WAY_8KB_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_4WAY_8KB_INTERLEAVING	/;"	d
FSL_DDR_BANK_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_BANK_INTERLEAVING	/;"	d
FSL_DDR_CACHE_LINE_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_CACHE_LINE_INTERLEAVING	/;"	d
FSL_DDR_CS0_CS1	include/fsl_ddr_sdram.h	/^#define FSL_DDR_CS0_CS1	/;"	d
FSL_DDR_CS0_CS1_AND_CS2_CS3	include/fsl_ddr_sdram.h	/^#define FSL_DDR_CS0_CS1_AND_CS2_CS3	/;"	d
FSL_DDR_CS0_CS1_CS2_CS3	include/fsl_ddr_sdram.h	/^#define FSL_DDR_CS0_CS1_CS2_CS3	/;"	d
FSL_DDR_CS2_CS3	include/fsl_ddr_sdram.h	/^#define FSL_DDR_CS2_CS3	/;"	d
FSL_DDR_MAIN_H	include/fsl_ddr.h	/^#define FSL_DDR_MAIN_H$/;"	d
FSL_DDR_MEMCTL_H	include/fsl_ddr_sdram.h	/^#define FSL_DDR_MEMCTL_H$/;"	d
FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	include/fsl_ddr_sdram.h	/^#define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	/;"	d
FSL_DDR_ODT_ALL	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_ALL	/;"	d
FSL_DDR_ODT_ALL_OTHER_CS	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_ALL_OTHER_CS	/;"	d
FSL_DDR_ODT_CS	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_CS	/;"	d
FSL_DDR_ODT_CS_AND_OTHER_DIMM	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_CS_AND_OTHER_DIMM	/;"	d
FSL_DDR_ODT_NEVER	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_NEVER	/;"	d
FSL_DDR_ODT_OTHER_CS_ONSAMEDIMM	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_OTHER_CS_ONSAMEDIMM	/;"	d
FSL_DDR_ODT_OTHER_DIMM	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_OTHER_DIMM	/;"	d
FSL_DDR_ODT_SAME_DIMM	include/fsl_ddr_sdram.h	/^#define FSL_DDR_ODT_SAME_DIMM	/;"	d
FSL_DDR_PAGE_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_PAGE_INTERLEAVING	/;"	d
FSL_DDR_SUPERBANK_INTERLEAVING	include/fsl_ddr_sdram.h	/^#define FSL_DDR_SUPERBANK_INTERLEAVING	/;"	d
FSL_DDR_VER_4_4	include/fsl_ddrc_version.h	/^#define FSL_DDR_VER_4_4 /;"	d
FSL_DDR_VER_4_6	include/fsl_ddrc_version.h	/^#define FSL_DDR_VER_4_6 /;"	d
FSL_DDR_VER_4_7	include/fsl_ddrc_version.h	/^#define FSL_DDR_VER_4_7	/;"	d
FSL_DDR_VER_5_0	include/fsl_ddrc_version.h	/^#define FSL_DDR_VER_5_0	/;"	d
FSL_DMA_DATR_DBPATRMU	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DBPATRMU	/;"	d
FSL_DMA_DATR_DPCIORDER	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DPCIORDER	/;"	d
FSL_DMA_DATR_DSME	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DSME	/;"	d
FSL_DMA_DATR_DTFLOWLVL_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DTFLOWLVL_MASK	/;"	d
FSL_DMA_DATR_DTRAN_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DTRAN_MASK	/;"	d
FSL_DMA_DATR_DWRITE_ALLOC	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DWRITE_ALLOC	/;"	d
FSL_DMA_DATR_DWRITE_LOCK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DWRITE_LOCK	/;"	d
FSL_DMA_DATR_DWRITE_NO_SNOOP	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DWRITE_NO_SNOOP	/;"	d
FSL_DMA_DATR_DWRITE_SNOOP	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_DWRITE_SNOOP	/;"	d
FSL_DMA_DATR_EDAD_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_DATR_EDAD_MASK	/;"	d
FSL_DMA_MAX_SIZE	drivers/dma/fsl_dma.c	/^#define FSL_DMA_MAX_SIZE	/;"	d	file:
FSL_DMA_MR_BWC_DIS	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_BWC_DIS	/;"	d
FSL_DMA_MR_BWC_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_BWC_MASK	/;"	d
FSL_DMA_MR_CA	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_CA	/;"	d
FSL_DMA_MR_CC	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_CC	/;"	d
FSL_DMA_MR_CDSM	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_CDSM	/;"	d
FSL_DMA_MR_CS	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_CS	/;"	d
FSL_DMA_MR_CTM	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_CTM	/;"	d
FSL_DMA_MR_CTM_DIRECT	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_CTM_DIRECT	/;"	d
FSL_DMA_MR_DAHE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_DAHE	/;"	d
FSL_DMA_MR_DAHTS_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_DAHTS_MASK	/;"	d
FSL_DMA_MR_DEFAULT	drivers/dma/fsl_dma.c	/^#define FSL_DMA_MR_DEFAULT /;"	d	file:
FSL_DMA_MR_DMSEN	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_DMSEN	/;"	d
FSL_DMA_MR_DRCNT	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_DRCNT	/;"	d
FSL_DMA_MR_EIE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EIE	/;"	d
FSL_DMA_MR_EMP_EN	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EMP_EN	/;"	d
FSL_DMA_MR_EMS_EN	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EMS_EN	/;"	d
FSL_DMA_MR_EOLNIE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EOLNIE	/;"	d
FSL_DMA_MR_EOLSIE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EOLSIE	/;"	d
FSL_DMA_MR_EOSIE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EOSIE	/;"	d
FSL_DMA_MR_EOTIE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_EOTIE	/;"	d
FSL_DMA_MR_IRQS	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_IRQS	/;"	d
FSL_DMA_MR_PRC_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_PRC_MASK	/;"	d
FSL_DMA_MR_SAHE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_SAHE	/;"	d
FSL_DMA_MR_SAHTS_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_SAHTS_MASK	/;"	d
FSL_DMA_MR_SRW	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_SRW	/;"	d
FSL_DMA_MR_XFE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_MR_XFE	/;"	d
FSL_DMA_SATR_ESAD_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_ESAD_MASK	/;"	d
FSL_DMA_SATR_SBPATRMU	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_SBPATRMU	/;"	d
FSL_DMA_SATR_SPCIORDER	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_SPCIORDER	/;"	d
FSL_DMA_SATR_SREAD_NO_SNOOP	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_SREAD_NO_SNOOP	/;"	d
FSL_DMA_SATR_SREAD_SNOOP	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_SREAD_SNOOP	/;"	d
FSL_DMA_SATR_SREAD_UNLOCK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_SREAD_UNLOCK	/;"	d
FSL_DMA_SATR_SSME	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_SSME	/;"	d
FSL_DMA_SATR_STFLOWLVL_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_STFLOWLVL_MASK	/;"	d
FSL_DMA_SATR_STRAN_MASK	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SATR_STRAN_MASK	/;"	d
FSL_DMA_SR_CB	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_CB	/;"	d
FSL_DMA_SR_CH	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_CH	/;"	d
FSL_DMA_SR_EOCDI	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_EOCDI	/;"	d
FSL_DMA_SR_EOLNI	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_EOLNI	/;"	d
FSL_DMA_SR_EOLSI	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_EOLSI	/;"	d
FSL_DMA_SR_EOSI	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_EOSI	/;"	d
FSL_DMA_SR_PE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_PE	/;"	d
FSL_DMA_SR_TE	arch/powerpc/include/asm/fsl_dma.h	/^#define FSL_DMA_SR_TE	/;"	d
FSL_DMA_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_DMA_STREAM_ID	/;"	d
FSL_DPAA2_STREAM_ID_END	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_DPAA2_STREAM_ID_END	/;"	d
FSL_DPAA2_STREAM_ID_START	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_DPAA2_STREAM_ID_START	/;"	d
FSL_DSPI	drivers/spi/Kconfig	/^config FSL_DSPI$/;"	c	menu:SPI Support
FSL_DSPI_COMPAT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define FSL_DSPI_COMPAT	/;"	d
FSL_DSPI_DEFAULT_SCK_FREQ	drivers/spi/fsl_dspi.c	/^#define FSL_DSPI_DEFAULT_SCK_FREQ	/;"	d	file:
FSL_DSPI_MAX_CHIPSELECT	drivers/spi/fsl_dspi.c	/^#define FSL_DSPI_MAX_CHIPSELECT	/;"	d	file:
FSL_EHCI_RXPBURST	include/usb/ehci-ci.h	/^#define FSL_EHCI_RXPBURST(/;"	d
FSL_EHCI_TXPBURST	include/usb/ehci-ci.h	/^#define FSL_EHCI_TXPBURST(/;"	d
FSL_ESPI	drivers/spi/Kconfig	/^config FSL_ESPI$/;"	c	menu:SPI Support
FSL_HW_NUM_LAWS	arch/powerpc/cpu/mpc8xxx/law.c	/^#define FSL_HW_NUM_LAWS /;"	d	file:
FSL_HW_PORTAL_DCE	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_DCE,$/;"	e	enum:fsl_dpaa_dev
FSL_HW_PORTAL_FMAN1	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_FMAN1,$/;"	e	enum:fsl_dpaa_dev
FSL_HW_PORTAL_FMAN2	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_FMAN2,$/;"	e	enum:fsl_dpaa_dev
FSL_HW_PORTAL_PME	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_PME,$/;"	e	enum:fsl_dpaa_dev
FSL_HW_PORTAL_RAID_ENGINE	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_RAID_ENGINE,$/;"	e	enum:fsl_dpaa_dev
FSL_HW_PORTAL_RMAN	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_RMAN,$/;"	e	enum:fsl_dpaa_dev
FSL_HW_PORTAL_SEC	arch/powerpc/include/asm/fsl_portals.h	/^	FSL_HW_PORTAL_SEC,$/;"	e	enum:fsl_dpaa_dev
FSL_IFC_COMPAT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define FSL_IFC_COMPAT	/;"	d
FSL_IFC_V1_1_0	include/fsl_ifc.h	/^#define FSL_IFC_V1_1_0	/;"	d
FSL_IFC_V2_0_0	include/fsl_ifc.h	/^#define FSL_IFC_V2_0_0	/;"	d
FSL_INVALID_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_INVALID_STREAM_ID	/;"	d
FSL_LPUART	drivers/serial/Kconfig	/^config FSL_LPUART$/;"	c	menu:Serial drivers
FSL_LSCH2	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config FSL_LSCH2$/;"	c
FSL_LSCH3	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config FSL_LSCH3$/;"	c
FSL_MMDC_H	include/fsl_mmdc.h	/^#define FSL_MMDC_H$/;"	d
FSL_PCIE_CFG_RDY	arch/powerpc/include/asm/fsl_pci.h	/^#define FSL_PCIE_CFG_RDY	/;"	d
FSL_PCIE_COMPAT	arch/powerpc/include/asm/fsl_pci.h	/^#define FSL_PCIE_COMPAT	/;"	d
FSL_PCIE_COMPAT	include/configs/ls1012aqds.h	/^#define FSL_PCIE_COMPAT /;"	d
FSL_PCIE_COMPAT	include/configs/ls1012ardb.h	/^#define FSL_PCIE_COMPAT /;"	d
FSL_PCIE_COMPAT	include/configs/ls1021aqds.h	/^#define FSL_PCIE_COMPAT /;"	d
FSL_PCIE_COMPAT	include/configs/ls1021atwr.h	/^#define FSL_PCIE_COMPAT /;"	d
FSL_PCIE_COMPAT	include/configs/ls1043a_common.h	/^#define FSL_PCIE_COMPAT /;"	d
FSL_PCIE_COMPAT	include/configs/ls2080a_common.h	/^#define FSL_PCIE_COMPAT /;"	d
FSL_PCIE_V3_CFG_RDY	arch/powerpc/include/asm/fsl_pci.h	/^#define FSL_PCIE_V3_CFG_RDY	/;"	d
FSL_PCI_COMPAT	arch/powerpc/include/asm/fsl_pci.h	/^#define FSL_PCI_COMPAT	/;"	d
FSL_PCI_PBFR	arch/powerpc/include/asm/fsl_pci.h	/^#define FSL_PCI_PBFR	/;"	d
FSL_PEX_STREAM_ID_END	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_PEX_STREAM_ID_END	/;"	d
FSL_PEX_STREAM_ID_START	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_PEX_STREAM_ID_START	/;"	d
FSL_PIN_SIZE	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define FSL_PIN_SIZE	/;"	d
FSL_PMIC_I2C_LENGTH	drivers/power/power_fsl.c	/^#define FSL_PMIC_I2C_LENGTH	/;"	d	file:
FSL_PMU_PCTBENR_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define FSL_PMU_PCTBENR_OFFSET /;"	d
FSL_PROG_IF_AGENT	arch/powerpc/include/asm/fsl_pci.h	/^#define FSL_PROG_IF_AGENT	/;"	d
FSL_QIXIS_BRDCFG9_QSPI	include/configs/ls2080aqds.h	/^#define FSL_QIXIS_BRDCFG9_QSPI	/;"	d
FSL_QSPI	drivers/spi/Kconfig	/^config FSL_QSPI$/;"	c	menu:SPI Support
FSL_QSPI_COMPAT	arch/arm/include/asm/arch-ls102xa/config.h	/^#define FSL_QSPI_COMPAT	/;"	d
FSL_QSPI_DEFAULT_SCK_FREQ	drivers/spi/fsl_qspi.c	/^#define FSL_QSPI_DEFAULT_SCK_FREQ	/;"	d	file:
FSL_QSPI_FLASH_NUM	include/configs/ls1012a_common.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/ls1021aqds.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/ls1021atwr.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/ls1043aqds.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/ls1046aqds.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/ls1046ardb.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/ls2080aqds.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/mx6sxsabreauto.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/mx6sxsabresd.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/mx6ul_14x14_evk.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/mx7dsabresd.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/pcm052.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_NUM	include/configs/vf610twr.h	/^#define FSL_QSPI_FLASH_NUM	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls1012a_common.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls1021aqds.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls1021atwr.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls1043aqds.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls1046aqds.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls1046ardb.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/ls2080aqds.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/mx6sxsabreauto.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/mx6sxsabresd.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/mx6ul_14x14_evk.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/mx7dsabresd.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/pcm052.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_FLASH_SIZE	include/configs/vf610twr.h	/^#define FSL_QSPI_FLASH_SIZE	/;"	d
FSL_QSPI_MAX_CHIPSELECT_NUM	drivers/spi/fsl_qspi.c	/^#define FSL_QSPI_MAX_CHIPSELECT_NUM /;"	d	file:
FSL_SATA1_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_SATA1_STREAM_ID	/;"	d
FSL_SATA2_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_SATA2_STREAM_ID	/;"	d
FSL_SDMMC_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_SDMMC_STREAM_ID	/;"	d
FSL_SEC_MON	drivers/misc/Kconfig	/^config FSL_SEC_MON$/;"	c	menu:Multifunction device drivers
FSL_SERDES_CLK_100	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_CLK_100	/;"	d
FSL_SERDES_CLK_125	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_CLK_125	/;"	d
FSL_SERDES_CLK_150	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_CLK_150	/;"	d
FSL_SERDES_PROTO_PEX	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_PROTO_PEX	/;"	d
FSL_SERDES_PROTO_PEX_X2	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_PROTO_PEX_X2	/;"	d
FSL_SERDES_PROTO_SATA	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_PROTO_SATA	/;"	d
FSL_SERDES_PROTO_SGMII	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_PROTO_SGMII	/;"	d
FSL_SERDES_VDD_1V	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define FSL_SERDES_VDD_1V	/;"	d
FSL_SKIP_PCI	include/usb/ehci-ci.h	/^#define FSL_SKIP_PCI	/;"	d
FSL_SOC_USB_AGECNTTHRSH	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_AGECNTTHRSH	/;"	d
FSL_SOC_USB_CTRL	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_CTRL	/;"	d
FSL_SOC_USB_OTGSC	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_OTGSC	/;"	d
FSL_SOC_USB_PORTSC1	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_PORTSC1	/;"	d
FSL_SOC_USB_PORTSC2	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_PORTSC2	/;"	d
FSL_SOC_USB_PRICTRL	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_PRICTRL	/;"	d
FSL_SOC_USB_SICTRL	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_SICTRL	/;"	d
FSL_SOC_USB_SNOOP1	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_SNOOP1	/;"	d
FSL_SOC_USB_SNOOP2	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_SNOOP2	/;"	d
FSL_SOC_USB_ULPIVP	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_ULPIVP	/;"	d
FSL_SOC_USB_USBMODE	include/usb/ehci-ci.h	/^#define FSL_SOC_USB_USBMODE	/;"	d
FSL_SRDSCR0_DPP_1V2	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR0_DPP_1V2	/;"	d	file:
FSL_SRDSCR0_OFFS	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR0_OFFS	/;"	d	file:
FSL_SRDSCR0_OFFS	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define	FSL_SRDSCR0_OFFS	/;"	d	file:
FSL_SRDSCR0_TXEQA_MASK	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR0_TXEQA_MASK	/;"	d	file:
FSL_SRDSCR0_TXEQA_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR0_TXEQA_MASK	/;"	d	file:
FSL_SRDSCR0_TXEQA_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR0_TXEQA_SATA	/;"	d	file:
FSL_SRDSCR0_TXEQA_SATA	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR0_TXEQA_SATA	/;"	d	file:
FSL_SRDSCR0_TXEQA_SGMII	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR0_TXEQA_SGMII	/;"	d	file:
FSL_SRDSCR0_TXEQE_MASK	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR0_TXEQE_MASK	/;"	d	file:
FSL_SRDSCR0_TXEQE_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR0_TXEQE_MASK	/;"	d	file:
FSL_SRDSCR0_TXEQE_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR0_TXEQE_SATA	/;"	d	file:
FSL_SRDSCR0_TXEQE_SATA	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR0_TXEQE_SATA	/;"	d	file:
FSL_SRDSCR0_TXEQE_SGMII	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR0_TXEQE_SGMII	/;"	d	file:
FSL_SRDSCR1_LANEA_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR1_LANEA_MASK	/;"	d	file:
FSL_SRDSCR1_LANEA_OFF	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR1_LANEA_OFF	/;"	d	file:
FSL_SRDSCR1_LANEE_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR1_LANEE_MASK	/;"	d	file:
FSL_SRDSCR1_LANEE_OFF	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR1_LANEE_OFF	/;"	d	file:
FSL_SRDSCR1_OFFS	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR1_OFFS	/;"	d	file:
FSL_SRDSCR1_OFFS	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR1_OFFS	/;"	d	file:
FSL_SRDSCR1_PLLBW	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR1_PLLBW	/;"	d	file:
FSL_SRDSCR2_EICA_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_EICA_MASK	/;"	d	file:
FSL_SRDSCR2_EICA_SATA	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_EICA_SATA	/;"	d	file:
FSL_SRDSCR2_EICA_SGMII	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_EICA_SGMII	/;"	d	file:
FSL_SRDSCR2_EICE_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_EICE_MASK	/;"	d	file:
FSL_SRDSCR2_EICE_SATA	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_EICE_SATA	/;"	d	file:
FSL_SRDSCR2_EICE_SGMII	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_EICE_SGMII	/;"	d	file:
FSL_SRDSCR2_OFFS	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR2_OFFS	/;"	d	file:
FSL_SRDSCR2_OFFS	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR2_OFFS	/;"	d	file:
FSL_SRDSCR2_SEIC_MASK	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR2_SEIC_MASK	/;"	d	file:
FSL_SRDSCR2_SEIC_PEX	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR2_SEIC_PEX	/;"	d	file:
FSL_SRDSCR2_SEIC_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR2_SEIC_SATA	/;"	d	file:
FSL_SRDSCR2_SEIC_SGMII	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR2_SEIC_SGMII	/;"	d	file:
FSL_SRDSCR2_VDD_1V2	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR2_VDD_1V2	/;"	d	file:
FSL_SRDSCR3_EIC0	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR3_EIC0(/;"	d	file:
FSL_SRDSCR3_EIC0_MASK	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR3_EIC0_MASK	/;"	d	file:
FSL_SRDSCR3_EIC1	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR3_EIC1(/;"	d	file:
FSL_SRDSCR3_EIC1_MASK	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR3_EIC1_MASK	/;"	d	file:
FSL_SRDSCR3_KFR_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR3_KFR_SATA	/;"	d	file:
FSL_SRDSCR3_KPH_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR3_KPH_SATA	/;"	d	file:
FSL_SRDSCR3_LANEA_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_LANEA_MASK	/;"	d	file:
FSL_SRDSCR3_LANEA_SATA	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_LANEA_SATA	/;"	d	file:
FSL_SRDSCR3_LANEA_SGMII	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_LANEA_SGMII	/;"	d	file:
FSL_SRDSCR3_LANEE_MASK	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_LANEE_MASK	/;"	d	file:
FSL_SRDSCR3_LANEE_SATA	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_LANEE_SATA	/;"	d	file:
FSL_SRDSCR3_LANEE_SGMII	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_LANEE_SGMII	/;"	d	file:
FSL_SRDSCR3_OFFS	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR3_OFFS	/;"	d	file:
FSL_SRDSCR3_OFFS	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define FSL_SRDSCR3_OFFS	/;"	d	file:
FSL_SRDSCR3_SDFM_SATA_PEX	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR3_SDFM_SATA_PEX	/;"	d	file:
FSL_SRDSCR3_SDTXL_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR3_SDTXL_SATA	/;"	d	file:
FSL_SRDSCR4_EIC2	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR4_EIC2(/;"	d	file:
FSL_SRDSCR4_EIC2_MASK	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR4_EIC2_MASK	/;"	d	file:
FSL_SRDSCR4_EIC3	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR4_EIC3(/;"	d	file:
FSL_SRDSCR4_EIC3_MASK	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define FSL_SRDSCR4_EIC3_MASK	/;"	d	file:
FSL_SRDSCR4_OFFS	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR4_OFFS	/;"	d	file:
FSL_SRDSCR4_PLANE_X2	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR4_PLANE_X2	/;"	d	file:
FSL_SRDSCR4_PROT_PEX	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR4_PROT_PEX	/;"	d	file:
FSL_SRDSCR4_PROT_SATA	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR4_PROT_SATA	/;"	d	file:
FSL_SRDSCR4_PROT_SGMII	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSCR4_PROT_SGMII	/;"	d	file:
FSL_SRDSRSTCTL_OFFS	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSRSTCTL_OFFS	/;"	d	file:
FSL_SRDSRSTCTL_RST	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSRSTCTL_RST	/;"	d	file:
FSL_SRDSRSTCTL_SATA_RESET	arch/powerpc/cpu/mpc83xx/serdes.c	/^#define FSL_SRDSRSTCTL_SATA_RESET	/;"	d	file:
FSL_SRDS_1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	FSL_SRDS_1  = 0,$/;"	e	enum:srds
FSL_SRDS_1	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	FSL_SRDS_1  = 0,$/;"	e	enum:srds
FSL_SRDS_1	arch/powerpc/include/asm/fsl_serdes.h	/^	FSL_SRDS_1  = 0,$/;"	e	enum:srds
FSL_SRDS_2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	FSL_SRDS_2  = 1,$/;"	e	enum:srds
FSL_SRDS_2	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	FSL_SRDS_2  = 1,$/;"	e	enum:srds
FSL_SRDS_2	arch/powerpc/include/asm/fsl_serdes.h	/^	FSL_SRDS_2  = 1,$/;"	e	enum:srds
FSL_SRDS_3	arch/powerpc/include/asm/fsl_serdes.h	/^	FSL_SRDS_3  = 2,$/;"	e	enum:srds
FSL_SRDS_4	arch/powerpc/include/asm/fsl_serdes.h	/^	FSL_SRDS_4  = 3,$/;"	e	enum:srds
FSL_SRDS_B1_LANE_A	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_A = 0,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_B	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_B = 1,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_C	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_C = 2,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_D	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_D = 3,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_E	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_E = 4,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_F	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_F = 5,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_G	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_G = 6,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_H	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_H = 7,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_I	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_I = 8,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B1_LANE_J	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B1_LANE_J = 9,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B2_LANE_A	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B2_LANE_A = 16,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B2_LANE_B	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B2_LANE_B = 17,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B2_LANE_C	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B2_LANE_C = 18,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B2_LANE_D	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B2_LANE_D = 19,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B3_LANE_A	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B3_LANE_A = 20,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B3_LANE_B	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B3_LANE_B = 21,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B3_LANE_C	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B3_LANE_C = 22,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_B3_LANE_D	arch/powerpc/include/asm/immap_85xx.h	/^	FSL_SRDS_B3_LANE_D = 23,$/;"	e	enum:__anondcd7518a0a03
FSL_SRDS_BANK_1	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h	/^	FSL_SRDS_BANK_1  = 0,$/;"	e	enum:srds_bank
FSL_SRDS_BANK_2	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h	/^	FSL_SRDS_BANK_2  = 1,$/;"	e	enum:srds_bank
FSL_SRDS_BANK_3	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h	/^	FSL_SRDS_BANK_3  = 2,$/;"	e	enum:srds_bank
FSL_STRIDE_4B	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define FSL_STRIDE_4B	/;"	d
FSL_STRIDE_8B	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define FSL_STRIDE_8B	/;"	d
FSL_UPM_WAIT_RUN_PATTERN	include/linux/mtd/fsl_upm.h	/^#define FSL_UPM_WAIT_RUN_PATTERN /;"	d
FSL_UPM_WAIT_WRITE_BUFFER	include/linux/mtd/fsl_upm.h	/^#define FSL_UPM_WAIT_WRITE_BUFFER /;"	d
FSL_UPM_WAIT_WRITE_BYTE	include/linux/mtd/fsl_upm.h	/^#define FSL_UPM_WAIT_WRITE_BYTE /;"	d
FSL_USB1_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_USB1_STREAM_ID	/;"	d
FSL_USB2_DR	drivers/usb/common/fsl-dt-fixup.c	/^#define FSL_USB2_DR	/;"	d	file:
FSL_USB2_MPH	drivers/usb/common/fsl-dt-fixup.c	/^#define FSL_USB2_MPH	/;"	d	file:
FSL_USB2_STREAM_ID	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define FSL_USB2_STREAM_ID	/;"	d
FSL_USB_XHCI_ADDR	include/linux/usb/xhci-fsl.h	/^#define FSL_USB_XHCI_ADDR	/;"	d
FSMC_CODE_RDY	include/linux/mtd/fsmc_nand.h	/^#define FSMC_CODE_RDY	/;"	d
FSMC_DEVTYPE_NAND	include/linux/mtd/fsmc_nand.h	/^#define FSMC_DEVTYPE_NAND	/;"	d
FSMC_DEVWID_16	include/linux/mtd/fsmc_nand.h	/^#define FSMC_DEVWID_16	/;"	d
FSMC_DEVWID_8	include/linux/mtd/fsmc_nand.h	/^#define FSMC_DEVWID_8	/;"	d
FSMC_ECCEN	include/linux/mtd/fsmc_nand.h	/^#define FSMC_ECCEN	/;"	d
FSMC_ECCPLEN_256	include/linux/mtd/fsmc_nand.h	/^#define FSMC_ECCPLEN_256	/;"	d
FSMC_ECCPLEN_512	include/linux/mtd/fsmc_nand.h	/^#define FSMC_ECCPLEN_512	/;"	d
FSMC_ENABLE	include/linux/mtd/fsmc_nand.h	/^#define FSMC_ENABLE	/;"	d
FSMC_MAX_ECCPLACE_ENTRIES	include/linux/mtd/fsmc_nand.h	/^#define FSMC_MAX_ECCPLACE_ENTRIES	/;"	d
FSMC_RESET	include/linux/mtd/fsmc_nand.h	/^#define FSMC_RESET	/;"	d
FSMC_REVISION_MSK	include/linux/mtd/fsmc_nand.h	/^#define FSMC_REVISION_MSK	/;"	d
FSMC_REVISION_SHFT	include/linux/mtd/fsmc_nand.h	/^#define FSMC_REVISION_SHFT	/;"	d
FSMC_TAR_1	include/linux/mtd/fsmc_nand.h	/^#define FSMC_TAR_1	/;"	d
FSMC_TCLR_1	include/linux/mtd/fsmc_nand.h	/^#define FSMC_TCLR_1	/;"	d
FSMC_THIZ_1	include/linux/mtd/fsmc_nand.h	/^#define FSMC_THIZ_1	/;"	d
FSMC_THOLD_4	include/linux/mtd/fsmc_nand.h	/^#define FSMC_THOLD_4	/;"	d
FSMC_TSET_0	include/linux/mtd/fsmc_nand.h	/^#define FSMC_TSET_0	/;"	d
FSMC_TWAIT_6	include/linux/mtd/fsmc_nand.h	/^#define FSMC_TWAIT_6	/;"	d
FSMC_VER8	include/linux/mtd/fsmc_nand.h	/^#define FSMC_VER8	/;"	d
FSMC_WAITON	include/linux/mtd/fsmc_nand.h	/^#define FSMC_WAITON	/;"	d
FSMC_WP	include/linux/mtd/fsmc_nand.h	/^#define FSMC_WP	/;"	d
FSMODE	drivers/usb/host/r8a66597.h	/^#define	  FSMODE	/;"	d
FSM_END_FLAG	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define FSM_END_FLAG	/;"	d
FSO_CEF_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FSO_CEF_1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
FSO_CFE_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	FSO_CFE_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
FSO_CFE_0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK,$/;"	e	enum:__anona307879b0103	file:
FSO_CFE_1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK,$/;"	e	enum:__anona307879b0103	file:
FSO_TOE_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK,$/;"	e	enum:__anona307879b0103	file:
FSP_ADDR	arch/x86/Kconfig	/^config FSP_ADDR$/;"	c	menu:x86 architecture
FSP_ADDR	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_ADDR$/;"	c
FSP_BOOTLOADER_TEMP_MEM_HOB_GUID	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID /;"	d
FSP_BROKEN_HOB	arch/x86/Kconfig	/^config FSP_BROKEN_HOB$/;"	c	menu:x86 architecture
FSP_BROKEN_HOB	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_BROKEN_HOB$/;"	c
FSP_FILE	arch/x86/Kconfig	/^config FSP_FILE$/;"	c	menu:x86 architecture
FSP_GUID_DATA1	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA1	/;"	d
FSP_GUID_DATA2	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA2	/;"	d
FSP_GUID_DATA3	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA3	/;"	d
FSP_GUID_DATA4_0	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_0	/;"	d
FSP_GUID_DATA4_1	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_1	/;"	d
FSP_GUID_DATA4_2	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_2	/;"	d
FSP_GUID_DATA4_3	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_3	/;"	d
FSP_GUID_DATA4_4	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_4	/;"	d
FSP_GUID_DATA4_5	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_5	/;"	d
FSP_GUID_DATA4_6	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_6	/;"	d
FSP_GUID_DATA4_7	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_GUID_DATA4_7	/;"	d
FSP_HEADER_GUID	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_HEADER_GUID /;"	d
FSP_HEADER_OFF	arch/x86/include/asm/fsp/fsp_infoheader.h	/^#define FSP_HEADER_OFF	/;"	d
FSP_HIGHMEM_BASE	arch/x86/include/asm/fsp/fsp_support.h	/^#define FSP_HIGHMEM_BASE	/;"	d
FSP_HOB_RESOURCE_OWNER_FSP_GUID	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_HOB_RESOURCE_OWNER_FSP_GUID /;"	d
FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID /;"	d
FSP_HOB_RESOURCE_OWNER_TSEG_GUID	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID /;"	d
FSP_LOWMEM_BASE	arch/x86/include/asm/fsp/fsp_support.h	/^#define FSP_LOWMEM_BASE	/;"	d
FSP_NON_VOLATILE_STORAGE_HOB_GUID	arch/x86/include/asm/fsp/fsp_hob.h	/^#define FSP_NON_VOLATILE_STORAGE_HOB_GUID /;"	d
FSP_SYS_MALLOC_F_LEN	arch/x86/Kconfig	/^config FSP_SYS_MALLOC_F_LEN$/;"	c	menu:x86 architecture
FSP_TEMP_RAM_ADDR	arch/x86/Kconfig	/^config FSP_TEMP_RAM_ADDR$/;"	c	menu:x86 architecture
FSP_USE_UPD	arch/x86/Kconfig	/^config FSP_USE_UPD$/;"	c	menu:x86 architecture
FSP_USE_UPD	arch/x86/cpu/ivybridge/Kconfig	/^config FSP_USE_UPD$/;"	c
FSTYPE_NONE	include/fat.h	/^#define FSTYPE_NONE	/;"	d
FSYS0_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS0_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS0_NR_CLK	/;"	d
FSYS1_MMC0_DIV_MASK	arch/arm/mach-exynos/clock_init_exynos5.c	/^#define FSYS1_MMC0_DIV_MASK	/;"	d	file:
FSYS1_MMC0_DIV_VAL	arch/arm/mach-exynos/clock_init_exynos5.c	/^#define FSYS1_MMC0_DIV_VAL	/;"	d	file:
FSYS1_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYS1_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define FSYS1_NR_CLK	/;"	d
FSYSREISER_CACHE_SIZE	fs/reiserfs/reiserfs_private.h	/^#define FSYSREISER_CACHE_SIZE /;"	d
FSYSREISER_MAX_BLOCKSIZE	fs/reiserfs/reiserfs_private.h	/^#define FSYSREISER_MAX_BLOCKSIZE /;"	d
FSYSREISER_MIN_BLOCKSIZE	fs/reiserfs/reiserfs_private.h	/^#define FSYSREISER_MIN_BLOCKSIZE /;"	d
FSYS_BUF	fs/reiserfs/reiserfs_private.h	/^#define FSYS_BUF /;"	d
FSYS_BUFLEN	fs/reiserfs/reiserfs_private.h	/^#define FSYS_BUFLEN /;"	d
FS_BINARY_MOUNTDATA	fs/ubifs/ubifs.h	/^#define FS_BINARY_MOUNTDATA	/;"	d
FS_BPS	drivers/usb/gadget/ether.c	/^#define	FS_BPS	/;"	d	file:
FS_CFG	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FS_CFG /;"	d
FS_HAS_SUBTYPE	fs/ubifs/ubifs.h	/^#define FS_HAS_SUBTYPE	/;"	d
FS_JSTS	drivers/usb/host/r8a66597.h	/^#define	  FS_JSTS	/;"	d
FS_KSTS	drivers/usb/host/r8a66597.h	/^#define	  FS_KSTS	/;"	d
FS_RENAME_DOES_D_MOVE	fs/ubifs/ubifs.h	/^#define FS_RENAME_DOES_D_MOVE	/;"	d
FS_REQUIRES_DEV	fs/ubifs/ubifs.h	/^#define FS_REQUIRES_DEV	/;"	d
FS_TYPE_ANY	include/fs.h	/^#define FS_TYPE_ANY	/;"	d
FS_TYPE_EXT	include/fs.h	/^#define FS_TYPE_EXT	/;"	d
FS_TYPE_FAT	include/fs.h	/^#define FS_TYPE_FAT	/;"	d
FS_TYPE_SANDBOX	include/fs.h	/^#define FS_TYPE_SANDBOX	/;"	d
FS_TYPE_UBIFS	include/fs.h	/^#define FS_TYPE_UBIFS	/;"	d
FS_USB_PKT_SIZE	drivers/usb/eth/smsc95xx.c	/^#define FS_USB_PKT_SIZE	/;"	d	file:
FS_USERNS_DEV_MOUNT	fs/ubifs/ubifs.h	/^#define FS_USERNS_DEV_MOUNT	/;"	d
FS_USERNS_MOUNT	fs/ubifs/ubifs.h	/^#define FS_USERNS_MOUNT	/;"	d
FSbit	drivers/net/rtl8169.c	/^	FSbit = 0x20000000,$/;"	e	enum:_DescStatusBit	file:
FShft	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define FShft(/;"	d
FShft	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define FShft(/;"	d
FSize	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define FSize(/;"	d
FSize	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define FSize(/;"	d
FTAHBC020S_BSR_SIZE	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_BSR_SIZE(/;"	d
FTAHBC020S_CR_INTSMASK	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_CR_INTSMASK	/;"	d
FTAHBC020S_CR_INTSTS	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_CR_INTSTS	/;"	d
FTAHBC020S_CR_REMAP	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_CR_REMAP	/;"	d
FTAHBC020S_CR_RESP	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_CR_RESP(/;"	d
FTAHBC020S_PCR_PLEVEL_	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_PCR_PLEVEL_(/;"	d
FTAHBC020S_SLAVE_BSR_BASE	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_SLAVE_BSR_BASE(/;"	d
FTAHBC020S_SLAVE_BSR_SIZE	include/faraday/ftahbc020s.h	/^#define FTAHBC020S_SLAVE_BSR_SIZE(/;"	d
FTDLL_DDR1_166MHZ	arch/arm/mach-orion5x/lowlevel_init.S	/^#define FTDLL_DDR1_166MHZ	/;"	d	file:
FTDLL_DDR1_200MHZ	arch/arm/mach-orion5x/lowlevel_init.S	/^#define FTDLL_DDR1_200MHZ	/;"	d	file:
FTERR_OVR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FTERR_OVR /;"	d
FTERR_UNDR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define FTERR_UNDR /;"	d
FTGMAC100_APTC_RXPOLL_CNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_APTC_RXPOLL_CNT(/;"	d
FTGMAC100_APTC_RXPOLL_TIME_SEL	drivers/net/ftgmac100.h	/^#define FTGMAC100_APTC_RXPOLL_TIME_SEL	/;"	d
FTGMAC100_APTC_TXPOLL_CNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_APTC_TXPOLL_CNT(/;"	d
FTGMAC100_APTC_TXPOLL_TIME_SEL	drivers/net/ftgmac100.h	/^#define FTGMAC100_APTC_TXPOLL_TIME_SEL	/;"	d
FTGMAC100_DBLAC_IFG_CNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_IFG_CNT(/;"	d
FTGMAC100_DBLAC_IFG_INC	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_IFG_INC	/;"	d
FTGMAC100_DBLAC_RXBURST_SIZE	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_RXBURST_SIZE(/;"	d
FTGMAC100_DBLAC_RXDES_SIZE	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_RXDES_SIZE(/;"	d
FTGMAC100_DBLAC_RXFIFO_HTHR	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_RXFIFO_HTHR(/;"	d
FTGMAC100_DBLAC_RXFIFO_LTHR	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_RXFIFO_LTHR(/;"	d
FTGMAC100_DBLAC_RX_THR_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_RX_THR_EN	/;"	d
FTGMAC100_DBLAC_TXBURST_SIZE	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_TXBURST_SIZE(/;"	d
FTGMAC100_DBLAC_TXDES_SIZE	drivers/net/ftgmac100.h	/^#define FTGMAC100_DBLAC_TXDES_SIZE(/;"	d
FTGMAC100_DMAFIFOS_RXDMA1_SM	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_RXDMA1_SM(/;"	d
FTGMAC100_DMAFIFOS_RXDMA2_SM	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_RXDMA2_SM(/;"	d
FTGMAC100_DMAFIFOS_RXDMA3_SM	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_RXDMA3_SM(/;"	d
FTGMAC100_DMAFIFOS_RXDMA_GRANT	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_RXDMA_GRANT	/;"	d
FTGMAC100_DMAFIFOS_RXDMA_REQ	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_RXDMA_REQ	/;"	d
FTGMAC100_DMAFIFOS_RXFIFO_EMPTY	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_RXFIFO_EMPTY	/;"	d
FTGMAC100_DMAFIFOS_TXDMA1_SM	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_TXDMA1_SM(/;"	d
FTGMAC100_DMAFIFOS_TXDMA2_SM	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_TXDMA2_SM(/;"	d
FTGMAC100_DMAFIFOS_TXDMA3_SM	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_TXDMA3_SM(/;"	d
FTGMAC100_DMAFIFOS_TXDMA_GRANT	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_TXDMA_GRANT	/;"	d
FTGMAC100_DMAFIFOS_TXDMA_REQ	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_TXDMA_REQ	/;"	d
FTGMAC100_DMAFIFOS_TXFIFO_EMPTY	drivers/net/ftgmac100.h	/^#define FTGMAC100_DMAFIFOS_TXFIFO_EMPTY	/;"	d
FTGMAC100_INT_AHB_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_AHB_ERR	/;"	d
FTGMAC100_INT_NO_HPTXBUF	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_NO_HPTXBUF	/;"	d
FTGMAC100_INT_NO_NPTXBUF	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_NO_NPTXBUF	/;"	d
FTGMAC100_INT_NO_RXBUF	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_NO_RXBUF	/;"	d
FTGMAC100_INT_PHYSTS_CHG	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_PHYSTS_CHG	/;"	d
FTGMAC100_INT_RPKT_BUF	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_RPKT_BUF	/;"	d
FTGMAC100_INT_RPKT_FIFO	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_RPKT_FIFO	/;"	d
FTGMAC100_INT_RPKT_LOST	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_RPKT_LOST	/;"	d
FTGMAC100_INT_XPKT_ETH	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_XPKT_ETH	/;"	d
FTGMAC100_INT_XPKT_FIFO	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_XPKT_FIFO	/;"	d
FTGMAC100_INT_XPKT_LOST	drivers/net/ftgmac100.h	/^#define FTGMAC100_INT_XPKT_LOST	/;"	d
FTGMAC100_ITC_RXINT_CNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_ITC_RXINT_CNT(/;"	d
FTGMAC100_ITC_RXINT_THR	drivers/net/ftgmac100.h	/^#define FTGMAC100_ITC_RXINT_THR(/;"	d
FTGMAC100_ITC_RXINT_TIME_SEL	drivers/net/ftgmac100.h	/^#define FTGMAC100_ITC_RXINT_TIME_SEL	/;"	d
FTGMAC100_ITC_TXINT_CNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_ITC_TXINT_CNT(/;"	d
FTGMAC100_ITC_TXINT_THR	drivers/net/ftgmac100.h	/^#define FTGMAC100_ITC_TXINT_THR(/;"	d
FTGMAC100_ITC_TXINT_TIME_SEL	drivers/net/ftgmac100.h	/^#define FTGMAC100_ITC_TXINT_TIME_SEL	/;"	d
FTGMAC100_MACCR_CRC_APD	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_CRC_APD	/;"	d
FTGMAC100_MACCR_DISCARD_CRCERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_DISCARD_CRCERR	/;"	d
FTGMAC100_MACCR_ENRX_IN_HALFTX	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_ENRX_IN_HALFTX	/;"	d
FTGMAC100_MACCR_FAST_MODE	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_FAST_MODE	/;"	d
FTGMAC100_MACCR_FULLDUP	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_FULLDUP	/;"	d
FTGMAC100_MACCR_GIGA_MODE	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_GIGA_MODE	/;"	d
FTGMAC100_MACCR_HPTXR_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_HPTXR_EN	/;"	d
FTGMAC100_MACCR_HT_MULTI_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_HT_MULTI_EN	/;"	d
FTGMAC100_MACCR_JUMBO_LF	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_JUMBO_LF	/;"	d
FTGMAC100_MACCR_LOOP_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_LOOP_EN	/;"	d
FTGMAC100_MACCR_RM_VLAN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RM_VLAN	/;"	d
FTGMAC100_MACCR_RXDMA_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RXDMA_EN	/;"	d
FTGMAC100_MACCR_RXMAC_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RXMAC_EN	/;"	d
FTGMAC100_MACCR_RX_ALL	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RX_ALL	/;"	d
FTGMAC100_MACCR_RX_BROADPKT	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RX_BROADPKT	/;"	d
FTGMAC100_MACCR_RX_MULTIPKT	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RX_MULTIPKT	/;"	d
FTGMAC100_MACCR_RX_RUNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_RX_RUNT	/;"	d
FTGMAC100_MACCR_SW_RST	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_SW_RST	/;"	d
FTGMAC100_MACCR_TXDMA_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_TXDMA_EN	/;"	d
FTGMAC100_MACCR_TXMAC_EN	drivers/net/ftgmac100.h	/^#define FTGMAC100_MACCR_TXMAC_EN	/;"	d
FTGMAC100_PHYCR_MDC_CYCTHR	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYCR_MDC_CYCTHR(/;"	d
FTGMAC100_PHYCR_MDC_CYCTHR_MASK	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYCR_MDC_CYCTHR_MASK	/;"	d
FTGMAC100_PHYCR_MIIRD	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYCR_MIIRD	/;"	d
FTGMAC100_PHYCR_MIIWR	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYCR_MIIWR	/;"	d
FTGMAC100_PHYCR_PHYAD	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYCR_PHYAD(/;"	d
FTGMAC100_PHYCR_REGAD	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYCR_REGAD(/;"	d
FTGMAC100_PHYDATA_MIIRDATA	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYDATA_MIIRDATA(/;"	d
FTGMAC100_PHYDATA_MIIWDATA	drivers/net/ftgmac100.h	/^#define FTGMAC100_PHYDATA_MIIWDATA(/;"	d
FTGMAC100_RBSR_SIZE	drivers/net/ftgmac100.h	/^#define FTGMAC100_RBSR_SIZE(/;"	d
FTGMAC100_RXDES0_BROADCAST	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_BROADCAST	/;"	d
FTGMAC100_RXDES0_CRC_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_CRC_ERR	/;"	d
FTGMAC100_RXDES0_EDORR	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_EDORR	/;"	d
FTGMAC100_RXDES0_FIFO_FULL	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_FIFO_FULL	/;"	d
FTGMAC100_RXDES0_FRS	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_FRS	/;"	d
FTGMAC100_RXDES0_FTL	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_FTL	/;"	d
FTGMAC100_RXDES0_LRS	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_LRS	/;"	d
FTGMAC100_RXDES0_MULTICAST	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_MULTICAST	/;"	d
FTGMAC100_RXDES0_PAUSE_FRAME	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_PAUSE_FRAME	/;"	d
FTGMAC100_RXDES0_PAUSE_OPCODE	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_PAUSE_OPCODE	/;"	d
FTGMAC100_RXDES0_RUNT	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_RUNT	/;"	d
FTGMAC100_RXDES0_RXPKT_RDY	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_RXPKT_RDY	/;"	d
FTGMAC100_RXDES0_RX_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_RX_ERR	/;"	d
FTGMAC100_RXDES0_RX_ODD_NB	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_RX_ODD_NB	/;"	d
FTGMAC100_RXDES0_VDBC	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES0_VDBC(/;"	d
FTGMAC100_RXDES1_DF	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_DF	/;"	d
FTGMAC100_RXDES1_IP_CHKSUM_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_IP_CHKSUM_ERR	/;"	d
FTGMAC100_RXDES1_LLC	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_LLC	/;"	d
FTGMAC100_RXDES1_PROT_IP	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_PROT_IP	/;"	d
FTGMAC100_RXDES1_PROT_MASK	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_PROT_MASK	/;"	d
FTGMAC100_RXDES1_PROT_NONIP	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_PROT_NONIP	/;"	d
FTGMAC100_RXDES1_PROT_TCPIP	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_PROT_TCPIP	/;"	d
FTGMAC100_RXDES1_PROT_UDPIP	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_PROT_UDPIP	/;"	d
FTGMAC100_RXDES1_TCP_CHKSUM_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_TCP_CHKSUM_ERR	/;"	d
FTGMAC100_RXDES1_UDP_CHKSUM_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_UDP_CHKSUM_ERR	/;"	d
FTGMAC100_RXDES1_VLANTAG_AVAIL	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_VLANTAG_AVAIL	/;"	d
FTGMAC100_RXDES1_VLANTAG_CI	drivers/net/ftgmac100.h	/^#define FTGMAC100_RXDES1_VLANTAG_CI	/;"	d
FTGMAC100_TXDES0_CRC_ERR	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES0_CRC_ERR	/;"	d
FTGMAC100_TXDES0_EDOTR	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES0_EDOTR	/;"	d
FTGMAC100_TXDES0_FTS	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES0_FTS	/;"	d
FTGMAC100_TXDES0_LTS	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES0_LTS	/;"	d
FTGMAC100_TXDES0_TXBUF_SIZE	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES0_TXBUF_SIZE(/;"	d
FTGMAC100_TXDES0_TXDMA_OWN	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES0_TXDMA_OWN	/;"	d
FTGMAC100_TXDES1_INS_VLANTAG	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_INS_VLANTAG	/;"	d
FTGMAC100_TXDES1_IP_CHKSUM	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_IP_CHKSUM	/;"	d
FTGMAC100_TXDES1_LLC	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_LLC	/;"	d
FTGMAC100_TXDES1_TCP_CHKSUM	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_TCP_CHKSUM	/;"	d
FTGMAC100_TXDES1_TX2FIC	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_TX2FIC	/;"	d
FTGMAC100_TXDES1_TXIC	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_TXIC	/;"	d
FTGMAC100_TXDES1_UDP_CHKSUM	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_UDP_CHKSUM	/;"	d
FTGMAC100_TXDES1_VLANTAG_CI	drivers/net/ftgmac100.h	/^#define FTGMAC100_TXDES1_VLANTAG_CI(/;"	d
FTIDE_BASE	drivers/block/ftide020.c	/^#define FTIDE_BASE	/;"	d	file:
FTIDE_DATA	drivers/block/ftide020.c	/^#define FTIDE_DATA	/;"	d	file:
FTIM0_GPCM	include/fsl_ifc.h	/^#define FTIM0_GPCM	/;"	d
FTIM0_GPCM_TACSE	include/fsl_ifc.h	/^#define FTIM0_GPCM_TACSE(/;"	d
FTIM0_GPCM_TACSE_SHIFT	include/fsl_ifc.h	/^#define FTIM0_GPCM_TACSE_SHIFT	/;"	d
FTIM0_GPCM_TAVDS	include/fsl_ifc.h	/^#define FTIM0_GPCM_TAVDS(/;"	d
FTIM0_GPCM_TAVDS_SHIFT	include/fsl_ifc.h	/^#define FTIM0_GPCM_TAVDS_SHIFT	/;"	d
FTIM0_GPCM_TEADC	include/fsl_ifc.h	/^#define FTIM0_GPCM_TEADC(/;"	d
FTIM0_GPCM_TEADC_SHIFT	include/fsl_ifc.h	/^#define FTIM0_GPCM_TEADC_SHIFT	/;"	d
FTIM0_GPCM_TEAHC	include/fsl_ifc.h	/^#define FTIM0_GPCM_TEAHC(/;"	d
FTIM0_GPCM_TEAHC_SHIFT	include/fsl_ifc.h	/^#define FTIM0_GPCM_TEAHC_SHIFT	/;"	d
FTIM0_NAND	include/fsl_ifc.h	/^#define FTIM0_NAND	/;"	d
FTIM0_NAND_TCCST	include/fsl_ifc.h	/^#define FTIM0_NAND_TCCST(/;"	d
FTIM0_NAND_TCCST_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NAND_TCCST_SHIFT	/;"	d
FTIM0_NAND_TWCHT	include/fsl_ifc.h	/^#define FTIM0_NAND_TWCHT(/;"	d
FTIM0_NAND_TWCHT_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NAND_TWCHT_SHIFT	/;"	d
FTIM0_NAND_TWH	include/fsl_ifc.h	/^#define FTIM0_NAND_TWH(/;"	d
FTIM0_NAND_TWH_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NAND_TWH_SHIFT	/;"	d
FTIM0_NAND_TWP	include/fsl_ifc.h	/^#define FTIM0_NAND_TWP(/;"	d
FTIM0_NAND_TWP_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NAND_TWP_SHIFT	/;"	d
FTIM0_NOR	include/fsl_ifc.h	/^#define FTIM0_NOR	/;"	d
FTIM0_NOR_TACSE	include/fsl_ifc.h	/^#define FTIM0_NOR_TACSE(/;"	d
FTIM0_NOR_TACSE_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NOR_TACSE_SHIFT	/;"	d
FTIM0_NOR_TAVDS	include/fsl_ifc.h	/^#define FTIM0_NOR_TAVDS(/;"	d
FTIM0_NOR_TAVDS_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NOR_TAVDS_SHIFT	/;"	d
FTIM0_NOR_TEADC	include/fsl_ifc.h	/^#define FTIM0_NOR_TEADC(/;"	d
FTIM0_NOR_TEADC_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NOR_TEADC_SHIFT	/;"	d
FTIM0_NOR_TEAHC	include/fsl_ifc.h	/^#define FTIM0_NOR_TEAHC(/;"	d
FTIM0_NOR_TEAHC_SHIFT	include/fsl_ifc.h	/^#define FTIM0_NOR_TEAHC_SHIFT	/;"	d
FTIM1_GPCM	include/fsl_ifc.h	/^#define FTIM1_GPCM	/;"	d
FTIM1_GPCM_TACO	include/fsl_ifc.h	/^#define FTIM1_GPCM_TACO(/;"	d
FTIM1_GPCM_TACO_SHIFT	include/fsl_ifc.h	/^#define FTIM1_GPCM_TACO_SHIFT	/;"	d
FTIM1_GPCM_TRAD	include/fsl_ifc.h	/^#define FTIM1_GPCM_TRAD(/;"	d
FTIM1_GPCM_TRAD_SHIFT	include/fsl_ifc.h	/^#define FTIM1_GPCM_TRAD_SHIFT	/;"	d
FTIM1_NAND	include/fsl_ifc.h	/^#define FTIM1_NAND	/;"	d
FTIM1_NAND_TADLE	include/fsl_ifc.h	/^#define FTIM1_NAND_TADLE(/;"	d
FTIM1_NAND_TADLE_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NAND_TADLE_SHIFT	/;"	d
FTIM1_NAND_TRP	include/fsl_ifc.h	/^#define FTIM1_NAND_TRP(/;"	d
FTIM1_NAND_TRP_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NAND_TRP_SHIFT	/;"	d
FTIM1_NAND_TRR	include/fsl_ifc.h	/^#define FTIM1_NAND_TRR(/;"	d
FTIM1_NAND_TRR_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NAND_TRR_SHIFT	/;"	d
FTIM1_NAND_TWBE	include/fsl_ifc.h	/^#define FTIM1_NAND_TWBE(/;"	d
FTIM1_NAND_TWBE_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NAND_TWBE_SHIFT	/;"	d
FTIM1_NOR	include/fsl_ifc.h	/^#define FTIM1_NOR	/;"	d
FTIM1_NOR_TACO	include/fsl_ifc.h	/^#define FTIM1_NOR_TACO(/;"	d
FTIM1_NOR_TACO_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NOR_TACO_SHIFT	/;"	d
FTIM1_NOR_TRAD_NOR	include/fsl_ifc.h	/^#define FTIM1_NOR_TRAD_NOR(/;"	d
FTIM1_NOR_TRAD_NOR_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NOR_TRAD_NOR_SHIFT	/;"	d
FTIM1_NOR_TSEQRAD_NOR	include/fsl_ifc.h	/^#define FTIM1_NOR_TSEQRAD_NOR(/;"	d
FTIM1_NOR_TSEQRAD_NOR_SHIFT	include/fsl_ifc.h	/^#define FTIM1_NOR_TSEQRAD_NOR_SHIFT	/;"	d
FTIM2_GPCM	include/fsl_ifc.h	/^#define FTIM2_GPCM	/;"	d
FTIM2_GPCM_TCH	include/fsl_ifc.h	/^#define FTIM2_GPCM_TCH(/;"	d
FTIM2_GPCM_TCH_SHIFT	include/fsl_ifc.h	/^#define FTIM2_GPCM_TCH_SHIFT	/;"	d
FTIM2_GPCM_TCS	include/fsl_ifc.h	/^#define FTIM2_GPCM_TCS(/;"	d
FTIM2_GPCM_TCS_SHIFT	include/fsl_ifc.h	/^#define FTIM2_GPCM_TCS_SHIFT	/;"	d
FTIM2_GPCM_TWP	include/fsl_ifc.h	/^#define FTIM2_GPCM_TWP(/;"	d
FTIM2_GPCM_TWP_SHIFT	include/fsl_ifc.h	/^#define FTIM2_GPCM_TWP_SHIFT	/;"	d
FTIM2_NAND	include/fsl_ifc.h	/^#define FTIM2_NAND	/;"	d
FTIM2_NAND_TRAD	include/fsl_ifc.h	/^#define FTIM2_NAND_TRAD(/;"	d
FTIM2_NAND_TRAD_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NAND_TRAD_SHIFT	/;"	d
FTIM2_NAND_TREH	include/fsl_ifc.h	/^#define FTIM2_NAND_TREH(/;"	d
FTIM2_NAND_TREH_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NAND_TREH_SHIFT	/;"	d
FTIM2_NAND_TWHRE	include/fsl_ifc.h	/^#define FTIM2_NAND_TWHRE(/;"	d
FTIM2_NAND_TWHRE_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NAND_TWHRE_SHIFT	/;"	d
FTIM2_NOR	include/fsl_ifc.h	/^#define FTIM2_NOR	/;"	d
FTIM2_NOR_TCH	include/fsl_ifc.h	/^#define FTIM2_NOR_TCH(/;"	d
FTIM2_NOR_TCH_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NOR_TCH_SHIFT	/;"	d
FTIM2_NOR_TCS	include/fsl_ifc.h	/^#define FTIM2_NOR_TCS(/;"	d
FTIM2_NOR_TCS_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NOR_TCS_SHIFT	/;"	d
FTIM2_NOR_TWP	include/fsl_ifc.h	/^#define FTIM2_NOR_TWP(/;"	d
FTIM2_NOR_TWPH	include/fsl_ifc.h	/^#define FTIM2_NOR_TWPH(/;"	d
FTIM2_NOR_TWPH_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NOR_TWPH_SHIFT	/;"	d
FTIM2_NOR_TWP_SHIFT	include/fsl_ifc.h	/^#define FTIM2_NOR_TWP_SHIFT	/;"	d
FTIM3_NAND	include/fsl_ifc.h	/^#define FTIM3_NAND	/;"	d
FTIM3_NAND_TWW	include/fsl_ifc.h	/^#define FTIM3_NAND_TWW(/;"	d
FTIM3_NAND_TWW_SHIFT	include/fsl_ifc.h	/^#define FTIM3_NAND_TWW_SHIFT	/;"	d
FTM0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define FTM0_BASE_ADDR	/;"	d
FTM1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define FTM1_BASE_ADDR	/;"	d
FTM1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define FTM1_IPS_BASE_ADDR /;"	d
FTM2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define FTM2_IPS_BASE_ADDR /;"	d
FTMAC100_APTC_RXPOLL_CNT	drivers/net/ftmac100.h	/^#define FTMAC100_APTC_RXPOLL_CNT(/;"	d
FTMAC100_APTC_RXPOLL_TIME_SEL	drivers/net/ftmac100.h	/^#define FTMAC100_APTC_RXPOLL_TIME_SEL	/;"	d
FTMAC100_APTC_TXPOLL_CNT	drivers/net/ftmac100.h	/^#define FTMAC100_APTC_TXPOLL_CNT(/;"	d
FTMAC100_APTC_TXPOLL_TIME_SEL	drivers/net/ftmac100.h	/^#define FTMAC100_APTC_TXPOLL_TIME_SEL	/;"	d
FTMAC100_INT_AHB_ERR	drivers/net/ftmac100.h	/^#define FTMAC100_INT_AHB_ERR	/;"	d
FTMAC100_INT_NORXBUF	drivers/net/ftmac100.h	/^#define FTMAC100_INT_NORXBUF	/;"	d
FTMAC100_INT_NOTXBUF	drivers/net/ftmac100.h	/^#define FTMAC100_INT_NOTXBUF	/;"	d
FTMAC100_INT_PHYSTS_CHG	drivers/net/ftmac100.h	/^#define FTMAC100_INT_PHYSTS_CHG	/;"	d
FTMAC100_INT_RPKT_FINISH	drivers/net/ftmac100.h	/^#define FTMAC100_INT_RPKT_FINISH	/;"	d
FTMAC100_INT_RPKT_LOST	drivers/net/ftmac100.h	/^#define FTMAC100_INT_RPKT_LOST	/;"	d
FTMAC100_INT_RPKT_SAV	drivers/net/ftmac100.h	/^#define FTMAC100_INT_RPKT_SAV	/;"	d
FTMAC100_INT_XPKT_FINISH	drivers/net/ftmac100.h	/^#define FTMAC100_INT_XPKT_FINISH	/;"	d
FTMAC100_INT_XPKT_LOST	drivers/net/ftmac100.h	/^#define FTMAC100_INT_XPKT_LOST	/;"	d
FTMAC100_INT_XPKT_OK	drivers/net/ftmac100.h	/^#define FTMAC100_INT_XPKT_OK	/;"	d
FTMAC100_MACCR_CRC_APD	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_CRC_APD	/;"	d
FTMAC100_MACCR_CRC_DIS	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_CRC_DIS	/;"	d
FTMAC100_MACCR_ENRX_IN_HALFTX	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_ENRX_IN_HALFTX	/;"	d
FTMAC100_MACCR_FULLDUP	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_FULLDUP	/;"	d
FTMAC100_MACCR_HT_MULTI_EN	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_HT_MULTI_EN	/;"	d
FTMAC100_MACCR_LOOP_EN	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_LOOP_EN	/;"	d
FTMAC100_MACCR_RCV_ALL	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RCV_ALL	/;"	d
FTMAC100_MACCR_RCV_EN	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RCV_EN	/;"	d
FTMAC100_MACCR_RDMA_EN	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RDMA_EN	/;"	d
FTMAC100_MACCR_RX_BROADPKT	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RX_BROADPKT	/;"	d
FTMAC100_MACCR_RX_FTL	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RX_FTL	/;"	d
FTMAC100_MACCR_RX_MULTIPKT	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RX_MULTIPKT	/;"	d
FTMAC100_MACCR_RX_RUNT	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_RX_RUNT	/;"	d
FTMAC100_MACCR_SW_RST	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_SW_RST	/;"	d
FTMAC100_MACCR_XDMA_EN	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_XDMA_EN	/;"	d
FTMAC100_MACCR_XMT_EN	drivers/net/ftmac100.h	/^#define FTMAC100_MACCR_XMT_EN	/;"	d
FTMAC100_RXDES0_BROADCAST	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_BROADCAST	/;"	d
FTMAC100_RXDES0_CRC_ERR	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_CRC_ERR	/;"	d
FTMAC100_RXDES0_FRS	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_FRS	/;"	d
FTMAC100_RXDES0_FTL	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_FTL	/;"	d
FTMAC100_RXDES0_LRS	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_LRS	/;"	d
FTMAC100_RXDES0_MULTICAST	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_MULTICAST	/;"	d
FTMAC100_RXDES0_RFL	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_RFL(/;"	d
FTMAC100_RXDES0_RUNT	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_RUNT	/;"	d
FTMAC100_RXDES0_RXDMA_OWN	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_RXDMA_OWN	/;"	d
FTMAC100_RXDES0_RX_ERR	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_RX_ERR	/;"	d
FTMAC100_RXDES0_RX_ODD_NB	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES0_RX_ODD_NB	/;"	d
FTMAC100_RXDES1_EDORR	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES1_EDORR	/;"	d
FTMAC100_RXDES1_RXBUF_SIZE	drivers/net/ftmac100.h	/^#define FTMAC100_RXDES1_RXBUF_SIZE(/;"	d
FTMAC100_TXDES0_TXDMA_OWN	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES0_TXDMA_OWN	/;"	d
FTMAC100_TXDES0_TXPKT_EXSCOL	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES0_TXPKT_EXSCOL	/;"	d
FTMAC100_TXDES0_TXPKT_LATECOL	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES0_TXPKT_LATECOL	/;"	d
FTMAC100_TXDES1_EDOTR	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES1_EDOTR	/;"	d
FTMAC100_TXDES1_FTS	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES1_FTS	/;"	d
FTMAC100_TXDES1_LTS	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES1_LTS	/;"	d
FTMAC100_TXDES1_TX2FIC	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES1_TX2FIC	/;"	d
FTMAC100_TXDES1_TXBUF_SIZE	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES1_TXBUF_SIZE(/;"	d
FTMAC100_TXDES1_TXIC	drivers/net/ftmac100.h	/^#define FTMAC100_TXDES1_TXIC	/;"	d
FTMAC110_RXD_BCST	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_BCST /;"	d
FTMAC110_RXD_BUFSZ	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_BUFSZ(/;"	d
FTMAC110_RXD_CLRMASK	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_CLRMASK	/;"	d
FTMAC110_RXD_CRC	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_CRC /;"	d
FTMAC110_RXD_END	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_END /;"	d
FTMAC110_RXD_ERR	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_ERR /;"	d
FTMAC110_RXD_ERRMASK	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_ERRMASK /;"	d
FTMAC110_RXD_FRS	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_FRS /;"	d
FTMAC110_RXD_FTL	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_FTL /;"	d
FTMAC110_RXD_LEN	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_LEN(/;"	d
FTMAC110_RXD_LRS	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_LRS /;"	d
FTMAC110_RXD_MCST	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_MCST /;"	d
FTMAC110_RXD_ODDNB	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_ODDNB /;"	d
FTMAC110_RXD_OWNER	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_OWNER /;"	d
FTMAC110_RXD_RUNT	drivers/net/ftmac110.h	/^#define FTMAC110_RXD_RUNT /;"	d
FTMAC110_TXD_CLRMASK	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_CLRMASK /;"	d
FTMAC110_TXD_COL	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_COL /;"	d
FTMAC110_TXD_END	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_END /;"	d
FTMAC110_TXD_FTS	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_FTS /;"	d
FTMAC110_TXD_LEN	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_LEN(/;"	d
FTMAC110_TXD_LTS	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_LTS /;"	d
FTMAC110_TXD_OWNER	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_OWNER /;"	d
FTMAC110_TXD_TX2FIC	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_TX2FIC /;"	d
FTMAC110_TXD_TXIC	drivers/net/ftmac110.h	/^#define FTMAC110_TXD_TXIC /;"	d
FTPCI100_BASE_ADR_SIZE	include/faraday/ftpci100.h	/^#define FTPCI100_BASE_ADR_SIZE(/;"	d
FTPCI100_BASE_IO_SIZE	include/faraday/ftpci100.h	/^#define FTPCI100_BASE_IO_SIZE(/;"	d
FTPCI100_BRIDGE_DEVICEID	include/faraday/ftpci100.h	/^#define FTPCI100_BRIDGE_DEVICEID	/;"	d
FTPCI100_BRIDGE_VENDORID	include/faraday/ftpci100.h	/^#define FTPCI100_BRIDGE_VENDORID	/;"	d
FTPCI100_MAX_FUNCTIONS	include/faraday/ftpci100.h	/^#define FTPCI100_MAX_FUNCTIONS	/;"	d
FTPCI100_MEM_SIZE	include/faraday/ftpci100.h	/^#define FTPCI100_MEM_SIZE(/;"	d
FTPMU010_ID_A320A	include/faraday/ftpmu010.h	/^#define FTPMU010_ID_A320A	/;"	d
FTPMU010_ID_A320C	include/faraday/ftpmu010.h	/^#define FTPMU010_ID_A320C	/;"	d
FTPMU010_ID_A320D	include/faraday/ftpmu010.h	/^#define FTPMU010_ID_A320D	/;"	d
FTPMU010_MFPSR_AC97CLKOUTSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_AC97CLKOUTSEL	/;"	d
FTPMU010_MFPSR_AC97CLKSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_AC97CLKSEL	/;"	d
FTPMU010_MFPSR_AC97PINSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_AC97PINSEL	/;"	d
FTPMU010_MFPSR_DEBUGSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_DEBUGSEL	/;"	d
FTPMU010_MFPSR_DMA0PINSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_DMA0PINSEL	/;"	d
FTPMU010_MFPSR_DMA1PINSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_DMA1PINSEL	/;"	d
FTPMU010_MFPSR_I2SCLKSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_I2SCLKSEL	/;"	d
FTPMU010_MFPSR_IRDACLKSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_IRDACLKSEL	/;"	d
FTPMU010_MFPSR_MODEMPINSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_MODEMPINSEL	/;"	d
FTPMU010_MFPSR_PWM0PINSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_PWM0PINSEL	/;"	d
FTPMU010_MFPSR_PWM1PINSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_PWM1PINSEL	/;"	d
FTPMU010_MFPSR_SSPCLKSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_SSPCLKSEL	/;"	d
FTPMU010_MFPSR_TRIAHBDBG	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_TRIAHBDBG	/;"	d
FTPMU010_MFPSR_TRIAHBDIS	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_TRIAHBDIS	/;"	d
FTPMU010_MFPSR_UARTCLKSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_MFPSR_UARTCLKSEL	/;"	d
FTPMU010_OSCC_OSCH_OFF	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCH_OFF	/;"	d
FTPMU010_OSCC_OSCH_STABLE	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCH_STABLE	/;"	d
FTPMU010_OSCC_OSCH_TRI	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCH_TRI	/;"	d
FTPMU010_OSCC_OSCL_OFF	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCL_OFF	/;"	d
FTPMU010_OSCC_OSCL_RTCLSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCL_RTCLSEL	/;"	d
FTPMU010_OSCC_OSCL_STABLE	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCL_STABLE	/;"	d
FTPMU010_OSCC_OSCL_TRI	include/faraday/ftpmu010.h	/^#define FTPMU010_OSCC_OSCL_TRI	/;"	d
FTPMU010_PDLLCR0_DLLDIS	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_DLLDIS	/;"	d
FTPMU010_PDLLCR0_DLLFRAG	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_DLLFRAG(/;"	d
FTPMU010_PDLLCR0_DLLSTABLE	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_DLLSTABLE	/;"	d
FTPMU010_PDLLCR0_DLLSTSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_DLLSTSEL	/;"	d
FTPMU010_PDLLCR0_HCLKOUTDIS	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_HCLKOUTDIS(/;"	d
FTPMU010_PDLLCR0_PLL1DIS	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_PLL1DIS	/;"	d
FTPMU010_PDLLCR0_PLL1FRANG	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_PLL1FRANG(/;"	d
FTPMU010_PDLLCR0_PLL1NS	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_PLL1NS(/;"	d
FTPMU010_PDLLCR0_PLL1STABLE	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_PLL1STABLE	/;"	d
FTPMU010_PDLLCR0_PLL1STSEL	include/faraday/ftpmu010.h	/^#define FTPMU010_PDLLCR0_PLL1STSEL	/;"	d
FTPMU010_PMODE_DIVAHBCLK	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK(/;"	d
FTPMU010_PMODE_DIVAHBCLK_2	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK_2	/;"	d
FTPMU010_PMODE_DIVAHBCLK_3	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK_3	/;"	d
FTPMU010_PMODE_DIVAHBCLK_4	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK_4	/;"	d
FTPMU010_PMODE_DIVAHBCLK_6	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK_6	/;"	d
FTPMU010_PMODE_DIVAHBCLK_8	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK_8	/;"	d
FTPMU010_PMODE_DIVAHBCLK_MASK	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_DIVAHBCLK_MASK	/;"	d
FTPMU010_PMODE_FCS	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_FCS	/;"	d
FTPMU010_PMODE_SLEEP	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_SLEEP	/;"	d
FTPMU010_PMODE_TURBO	include/faraday/ftpmu010.h	/^#define FTPMU010_PMODE_TURBO	/;"	d
FTPMU010_PMSR_CKEHLOW	include/faraday/ftpmu010.h	/^#define FTPMU010_PMSR_CKEHLOW	/;"	d
FTPMU010_PMSR_PH	include/faraday/ftpmu010.h	/^#define FTPMU010_PMSR_PH	/;"	d
FTPMU010_PMSR_RDH	include/faraday/ftpmu010.h	/^#define FTPMU010_PMSR_RDH	/;"	d
FTPMU010_PMSR_SMR	include/faraday/ftpmu010.h	/^#define FTPMU010_PMSR_SMR	/;"	d
FTPMU010_SDRAMHTC_CKE_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_CKE_DCSR	/;"	d
FTPMU010_SDRAMHTC_CTL_WCLK_DLY	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(/;"	d
FTPMU010_SDRAMHTC_DAT_WCLK_DLY	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(/;"	d
FTPMU010_SDRAMHTC_DQM_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_DQM_DCSR	/;"	d
FTPMU010_SDRAMHTC_EBICTRL_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_EBICTRL_DCSR	/;"	d
FTPMU010_SDRAMHTC_EBIDATA_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_EBIDATA_DCSR	/;"	d
FTPMU010_SDRAMHTC_RCLK_DLY	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_RCLK_DLY(/;"	d
FTPMU010_SDRAMHTC_SDCLK_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_SDCLK_DCSR	/;"	d
FTPMU010_SDRAMHTC_SDRAMCS_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR	/;"	d
FTPMU010_SDRAMHTC_SDRAMCTL_DCSR	include/faraday/ftpmu010.h	/^#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR	/;"	d
FTRTC010_CR_ENABLE	drivers/rtc/ftrtc010.c	/^#define FTRTC010_CR_ENABLE	/;"	d	file:
FTRTC010_CR_INTERRUPT_DAY	drivers/rtc/ftrtc010.c	/^#define FTRTC010_CR_INTERRUPT_DAY	/;"	d	file:
FTRTC010_CR_INTERRUPT_HR	drivers/rtc/ftrtc010.c	/^#define FTRTC010_CR_INTERRUPT_HR	/;"	d	file:
FTRTC010_CR_INTERRUPT_MIN	drivers/rtc/ftrtc010.c	/^#define FTRTC010_CR_INTERRUPT_MIN	/;"	d	file:
FTRTC010_CR_INTERRUPT_SEC	drivers/rtc/ftrtc010.c	/^#define FTRTC010_CR_INTERRUPT_SEC	/;"	d	file:
FTSDC010_BWR_CAPS_1BIT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_CAPS_1BIT /;"	d
FTSDC010_BWR_CAPS_4BIT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_CAPS_4BIT /;"	d
FTSDC010_BWR_CAPS_8BIT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_CAPS_8BIT /;"	d
FTSDC010_BWR_CAPS_MASK	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_CAPS_MASK /;"	d
FTSDC010_BWR_CAPS_SHIFT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_CAPS_SHIFT /;"	d
FTSDC010_BWR_CARD_DETECT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_CARD_DETECT /;"	d
FTSDC010_BWR_MODE_1BIT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_MODE_1BIT /;"	d
FTSDC010_BWR_MODE_4BIT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_MODE_4BIT /;"	d
FTSDC010_BWR_MODE_8BIT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_MODE_8BIT /;"	d
FTSDC010_BWR_MODE_MASK	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_MODE_MASK /;"	d
FTSDC010_BWR_MODE_SHIFT	include/faraday/ftsdc010.h	/^#define FTSDC010_BWR_MODE_SHIFT /;"	d
FTSDC010_CARD_INSERT	include/faraday/ftsdc010.h	/^#define FTSDC010_CARD_INSERT	/;"	d
FTSDC010_CARD_REMOVE	include/faraday/ftsdc010.h	/^#define FTSDC010_CARD_REMOVE	/;"	d
FTSDC010_CARD_TYPE_MMC	include/faraday/ftsdc010.h	/^#define FTSDC010_CARD_TYPE_MMC	/;"	d
FTSDC010_CARD_TYPE_SD	include/faraday/ftsdc010.h	/^#define FTSDC010_CARD_TYPE_SD	/;"	d
FTSDC010_CCR_CLK_DIS	include/faraday/ftsdc010.h	/^#define FTSDC010_CCR_CLK_DIS	/;"	d
FTSDC010_CCR_CLK_DIV	include/faraday/ftsdc010.h	/^#define FTSDC010_CCR_CLK_DIV(/;"	d
FTSDC010_CCR_CLK_HISPD	include/faraday/ftsdc010.h	/^#define FTSDC010_CCR_CLK_HISPD	/;"	d
FTSDC010_CCR_CLK_SD	include/faraday/ftsdc010.h	/^#define FTSDC010_CCR_CLK_SD	/;"	d
FTSDC010_CLR_CARD_CHANGE	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_CARD_CHANGE	/;"	d
FTSDC010_CLR_CMD_SEND	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_CMD_SEND	/;"	d
FTSDC010_CLR_DATA_CRC_FAIL	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_DATA_CRC_FAIL	/;"	d
FTSDC010_CLR_DATA_CRC_OK	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_DATA_CRC_OK	/;"	d
FTSDC010_CLR_DATA_END	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_DATA_END	/;"	d
FTSDC010_CLR_DATA_TIMEOUT	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_DATA_TIMEOUT	/;"	d
FTSDC010_CLR_RSP_CRC_FAIL	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_RSP_CRC_FAIL	/;"	d
FTSDC010_CLR_RSP_CRC_OK	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_RSP_CRC_OK	/;"	d
FTSDC010_CLR_RSP_TIMEOUT	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_RSP_TIMEOUT	/;"	d
FTSDC010_CLR_SDIO_IRPT	include/faraday/ftsdc010.h	/^#define FTSDC010_CLR_SDIO_IRPT	/;"	d
FTSDC010_CMD_APP_CMD	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_APP_CMD	/;"	d
FTSDC010_CMD_CMD_EN	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_CMD_EN	/;"	d
FTSDC010_CMD_IDX	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_IDX(/;"	d
FTSDC010_CMD_LONG_RSP	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_LONG_RSP	/;"	d
FTSDC010_CMD_MMC_INT_STOP	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_MMC_INT_STOP	/;"	d
FTSDC010_CMD_NEED_RSP	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_NEED_RSP	/;"	d
FTSDC010_CMD_RETRY	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_RETRY	/;"	d
FTSDC010_CMD_SDC_RST	include/faraday/ftsdc010.h	/^#define FTSDC010_CMD_SDC_RST	/;"	d
FTSDC010_CPRM_DATA_CHANGE_ENDIAN_EN	include/faraday/ftsdc010.h	/^#define FTSDC010_CPRM_DATA_CHANGE_ENDIAN_EN	/;"	d
FTSDC010_CPRM_DATA_SWAP_HL_EN	include/faraday/ftsdc010.h	/^#define FTSDC010_CPRM_DATA_SWAP_HL_EN	/;"	d
FTSDC010_DCR_BLK_BYTES	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_BLK_BYTES(/;"	d
FTSDC010_DCR_BLK_SIZE	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_BLK_SIZE(/;"	d
FTSDC010_DCR_DATA_EN	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DATA_EN	/;"	d
FTSDC010_DCR_DATA_WRITE	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DATA_WRITE	/;"	d
FTSDC010_DCR_DMA_EN	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DMA_EN	/;"	d
FTSDC010_DCR_DMA_TYPE	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DMA_TYPE(/;"	d
FTSDC010_DCR_DMA_TYPE_1	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DMA_TYPE_1	/;"	d
FTSDC010_DCR_DMA_TYPE_4	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DMA_TYPE_4	/;"	d
FTSDC010_DCR_DMA_TYPE_8	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_DMA_TYPE_8	/;"	d
FTSDC010_DCR_FIFOTH	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_FIFOTH	/;"	d
FTSDC010_DCR_FIFO_RST	include/faraday/ftsdc010.h	/^#define FTSDC010_DCR_FIFO_RST	/;"	d
FTSDC010_DELAY_UNIT	include/faraday/ftsdc010.h	/^#define FTSDC010_DELAY_UNIT	/;"	d
FTSDC010_FEATURE_CPRM_FUNCTION	include/faraday/ftsdc010.h	/^#define FTSDC010_FEATURE_CPRM_FUNCTION	/;"	d
FTSDC010_FEATURE_FIFO_DEPTH	include/faraday/ftsdc010.h	/^#define FTSDC010_FEATURE_FIFO_DEPTH(/;"	d
FTSDC010_FIFO_DEPTH_16	include/faraday/ftsdc010.h	/^#define FTSDC010_FIFO_DEPTH_16	/;"	d
FTSDC010_FIFO_DEPTH_4	include/faraday/ftsdc010.h	/^#define FTSDC010_FIFO_DEPTH_4	/;"	d
FTSDC010_FIFO_DEPTH_8	include/faraday/ftsdc010.h	/^#define FTSDC010_FIFO_DEPTH_8	/;"	d
FTSDC010_GPO_PORT	include/faraday/ftsdc010.h	/^#define FTSDC010_GPO_PORT(/;"	d
FTSDC010_INT_MASK_CARD_CHANGE	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_CARD_CHANGE	/;"	d
FTSDC010_INT_MASK_CMD_SEND	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_CMD_SEND	/;"	d
FTSDC010_INT_MASK_CP_BUF_READY	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_CP_BUF_READY	/;"	d
FTSDC010_INT_MASK_CP_READY	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_CP_READY	/;"	d
FTSDC010_INT_MASK_DATA_CRC_FAIL	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_DATA_CRC_FAIL	/;"	d
FTSDC010_INT_MASK_DATA_CRC_OK	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_DATA_CRC_OK	/;"	d
FTSDC010_INT_MASK_DATA_END	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_DATA_END	/;"	d
FTSDC010_INT_MASK_DATA_TIMEOUT	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_DATA_TIMEOUT	/;"	d
FTSDC010_INT_MASK_FIFO_ORUN	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_FIFO_ORUN	/;"	d
FTSDC010_INT_MASK_FIFO_URUN	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_FIFO_URUN	/;"	d
FTSDC010_INT_MASK_PLAIN_TEXT_READY	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_PLAIN_TEXT_READY	/;"	d
FTSDC010_INT_MASK_RSP_CRC_FAIL	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_RSP_CRC_FAIL	/;"	d
FTSDC010_INT_MASK_RSP_CRC_OK	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_RSP_CRC_OK	/;"	d
FTSDC010_INT_MASK_RSP_TIMEOUT	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_RSP_TIMEOUT	/;"	d
FTSDC010_INT_MASK_SDIO_IRPT	include/faraday/ftsdc010.h	/^#define FTSDC010_INT_MASK_SDIO_IRPT	/;"	d
FTSDC010_PCR_POWER	include/faraday/ftsdc010.h	/^#define FTSDC010_PCR_POWER(/;"	d
FTSDC010_PCR_POWER_ON	include/faraday/ftsdc010.h	/^#define FTSDC010_PCR_POWER_ON	/;"	d
FTSDC010_PIO_RETRY	include/faraday/ftsdc010.h	/^#define FTSDC010_PIO_RETRY	/;"	d
FTSDC010_REV_MAJOR	include/faraday/ftsdc010.h	/^#define FTSDC010_REV_MAJOR(/;"	d
FTSDC010_REV_MINOR	include/faraday/ftsdc010.h	/^#define FTSDC010_REV_MINOR(/;"	d
FTSDC010_REV_REVISION	include/faraday/ftsdc010.h	/^#define FTSDC010_REV_REVISION(/;"	d
FTSDC010_RSP_CMD_APP	include/faraday/ftsdc010.h	/^#define FTSDC010_RSP_CMD_APP	/;"	d
FTSDC010_RSP_CMD_IDX	include/faraday/ftsdc010.h	/^#define FTSDC010_RSP_CMD_IDX(/;"	d
FTSDC010_SDIO_CTRL1_READ_WAIT_EN	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL1_READ_WAIT_EN	/;"	d
FTSDC010_SDIO_CTRL1_REG	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL1_REG	/;"	d
FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE	/;"	d
FTSDC010_SDIO_CTRL1_SDIO_BLK_NO	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL1_SDIO_BLK_NO(/;"	d
FTSDC010_SDIO_CTRL1_SDIO_BLK_SIZE	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL1_SDIO_BLK_SIZE(/;"	d
FTSDC010_SDIO_CTRL1_SDIO_ENABLE	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL1_SDIO_ENABLE	/;"	d
FTSDC010_SDIO_CTRL2_REG	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL2_REG	/;"	d
FTSDC010_SDIO_CTRL2_SUSP_CMD_ABORT	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL2_SUSP_CMD_ABORT	/;"	d
FTSDC010_SDIO_CTRL2_SUSP_READ_WAIT	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_CTRL2_SUSP_READ_WAIT	/;"	d
FTSDC010_SDIO_STATUS_FIFO_REMAIN_NO	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_STATUS_FIFO_REMAIN_NO(/;"	d
FTSDC010_SDIO_STATUS_REG	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_STATUS_REG	/;"	d
FTSDC010_SDIO_STATUS_SDIO_BLK_CNT	include/faraday/ftsdc010.h	/^#define FTSDC010_SDIO_STATUS_SDIO_BLK_CNT(/;"	d
FTSDC010_STATUS_CARD_CHANGE	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_CARD_CHANGE	/;"	d
FTSDC010_STATUS_CARD_DETECT	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_CARD_DETECT	/;"	d
FTSDC010_STATUS_CMD_SEND	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_CMD_SEND	/;"	d
FTSDC010_STATUS_CP_BUF_READY	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_CP_BUF_READY	/;"	d
FTSDC010_STATUS_CP_READY	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_CP_READY	/;"	d
FTSDC010_STATUS_DATA0_STATUS	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA0_STATUS	/;"	d
FTSDC010_STATUS_DATA_CRC_FAIL	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA_CRC_FAIL	/;"	d
FTSDC010_STATUS_DATA_CRC_OK	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA_CRC_OK	/;"	d
FTSDC010_STATUS_DATA_END	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA_END	/;"	d
FTSDC010_STATUS_DATA_ERROR	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA_ERROR	/;"	d
FTSDC010_STATUS_DATA_MASK	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA_MASK	/;"	d
FTSDC010_STATUS_DATA_TIMEOUT	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_DATA_TIMEOUT	/;"	d
FTSDC010_STATUS_FIFO_ORUN	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_FIFO_ORUN	/;"	d
FTSDC010_STATUS_FIFO_URUN	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_FIFO_URUN	/;"	d
FTSDC010_STATUS_PLAIN_TEXT_READY	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_PLAIN_TEXT_READY	/;"	d
FTSDC010_STATUS_RSP_CRC_FAIL	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_RSP_CRC_FAIL	/;"	d
FTSDC010_STATUS_RSP_CRC_OK	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_RSP_CRC_OK	/;"	d
FTSDC010_STATUS_RSP_ERROR	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_RSP_ERROR	/;"	d
FTSDC010_STATUS_RSP_MASK	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_RSP_MASK	/;"	d
FTSDC010_STATUS_RSP_TIMEOUT	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_RSP_TIMEOUT	/;"	d
FTSDC010_STATUS_SDIO_IRPT	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_SDIO_IRPT	/;"	d
FTSDC010_STATUS_WRITE_PROT	include/faraday/ftsdc010.h	/^#define FTSDC010_STATUS_WRITE_PROT	/;"	d
FTSDMC020_ACR_TOC	include/faraday/ftsdmc020.h	/^#define FTSDMC020_ACR_TOC(/;"	d
FTSDMC020_ACR_TOE	include/faraday/ftsdmc020.h	/^#define FTSDMC020_ACR_TOE	/;"	d
FTSDMC020_BANK_BASE	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_BASE(/;"	d
FTSDMC020_BANK_DDW_X16	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DDW_X16	/;"	d
FTSDMC020_BANK_DDW_X32	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DDW_X32	/;"	d
FTSDMC020_BANK_DDW_X4	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DDW_X4	/;"	d
FTSDMC020_BANK_DDW_X8	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DDW_X8	/;"	d
FTSDMC020_BANK_DSZ_128M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DSZ_128M	/;"	d
FTSDMC020_BANK_DSZ_16M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DSZ_16M	/;"	d
FTSDMC020_BANK_DSZ_256M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DSZ_256M	/;"	d
FTSDMC020_BANK_DSZ_64M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_DSZ_64M	/;"	d
FTSDMC020_BANK_ENABLE	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_ENABLE	/;"	d
FTSDMC020_BANK_MBW_16	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_MBW_16	/;"	d
FTSDMC020_BANK_MBW_32	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_MBW_32	/;"	d
FTSDMC020_BANK_MBW_8	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_MBW_8	/;"	d
FTSDMC020_BANK_SIZE_128M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_128M	/;"	d
FTSDMC020_BANK_SIZE_16M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_16M	/;"	d
FTSDMC020_BANK_SIZE_1M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_1M	/;"	d
FTSDMC020_BANK_SIZE_256M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_256M	/;"	d
FTSDMC020_BANK_SIZE_2M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_2M	/;"	d
FTSDMC020_BANK_SIZE_32M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_32M	/;"	d
FTSDMC020_BANK_SIZE_4M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_4M	/;"	d
FTSDMC020_BANK_SIZE_64M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_64M	/;"	d
FTSDMC020_BANK_SIZE_8M	include/faraday/ftsdmc020.h	/^#define FTSDMC020_BANK_SIZE_8M	/;"	d
FTSDMC020_CR_IPREC	include/faraday/ftsdmc020.h	/^#define FTSDMC020_CR_IPREC	/;"	d
FTSDMC020_CR_IREF	include/faraday/ftsdmc020.h	/^#define FTSDMC020_CR_IREF	/;"	d
FTSDMC020_CR_ISMR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_CR_ISMR	/;"	d
FTSDMC020_CR_PWDN	include/faraday/ftsdmc020.h	/^#define FTSDMC020_CR_PWDN	/;"	d
FTSDMC020_CR_REFTYPE	include/faraday/ftsdmc020.h	/^#define FTSDMC020_CR_REFTYPE	/;"	d
FTSDMC020_CR_SREF	include/faraday/ftsdmc020.h	/^#define FTSDMC020_CR_SREF	/;"	d
FTSDMC020_OFFSET_ACR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_ACR	/;"	d
FTSDMC020_OFFSET_BANK0_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK0_BSR	/;"	d
FTSDMC020_OFFSET_BANK1_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK1_BSR	/;"	d
FTSDMC020_OFFSET_BANK2_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK2_BSR	/;"	d
FTSDMC020_OFFSET_BANK3_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK3_BSR	/;"	d
FTSDMC020_OFFSET_BANK4_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK4_BSR	/;"	d
FTSDMC020_OFFSET_BANK5_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK5_BSR	/;"	d
FTSDMC020_OFFSET_BANK6_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK6_BSR	/;"	d
FTSDMC020_OFFSET_BANK7_BSR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_BANK7_BSR	/;"	d
FTSDMC020_OFFSET_CR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_CR	/;"	d
FTSDMC020_OFFSET_TP0	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_TP0	/;"	d
FTSDMC020_OFFSET_TP1	include/faraday/ftsdmc020.h	/^#define FTSDMC020_OFFSET_TP1	/;"	d
FTSDMC020_TP0_TCL	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP0_TCL(/;"	d
FTSDMC020_TP0_TRAS	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP0_TRAS(/;"	d
FTSDMC020_TP0_TRCD	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP0_TRCD(/;"	d
FTSDMC020_TP0_TRF	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP0_TRF(/;"	d
FTSDMC020_TP0_TRP	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP0_TRP(/;"	d
FTSDMC020_TP0_TWR	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP0_TWR(/;"	d
FTSDMC020_TP1_INI_PREC	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP1_INI_PREC(/;"	d
FTSDMC020_TP1_INI_REFT	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP1_INI_REFT(/;"	d
FTSDMC020_TP1_REF_INTV	include/faraday/ftsdmc020.h	/^#define FTSDMC020_TP1_REF_INTV(/;"	d
FTSDMC021_BANK_BASE	include/faraday/ftsdmc021.h	/^#define FTSDMC021_BANK_BASE(/;"	d
FTSDMC021_BANK_ENABLE	include/faraday/ftsdmc021.h	/^#define FTSDMC021_BANK_ENABLE	/;"	d
FTSDMC021_BANK_SIZE	include/faraday/ftsdmc021.h	/^#define FTSDMC021_BANK_SIZE(/;"	d
FTSDMC021_CFR_CH1_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH1_FDEPTH	/;"	d
FTSDMC021_CFR_CH2_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH2_FDEPTH	/;"	d
FTSDMC021_CFR_CH3_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH3_FDEPTH	/;"	d
FTSDMC021_CFR_CH4_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH4_FDEPTH	/;"	d
FTSDMC021_CFR_CH5_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH5_FDEPTH	/;"	d
FTSDMC021_CFR_CH6_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH6_FDEPTH	/;"	d
FTSDMC021_CFR_CH7_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH7_FDEPTH	/;"	d
FTSDMC021_CFR_CH8_FDEPTH	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CH8_FDEPTH	/;"	d
FTSDMC021_CFR_CHN	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_CHN	/;"	d
FTSDMC021_CFR_EBI	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_EBI	/;"	d
FTSDMC021_CFR_EBNK	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CFR_EBNK	/;"	d
FTSDMC021_CR1_BNKSIZE	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR1_BNKSIZE(/;"	d
FTSDMC021_CR1_DDW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR1_DDW(/;"	d
FTSDMC021_CR1_DSZ	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR1_DSZ(/;"	d
FTSDMC021_CR1_MA2T	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR1_MA2T(/;"	d
FTSDMC021_CR1_MBW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR1_MBW(/;"	d
FTSDMC021_CR2_IPREC	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR2_IPREC	/;"	d
FTSDMC021_CR2_IREF	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR2_IREF	/;"	d
FTSDMC021_CR2_ISMR	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR2_ISMR	/;"	d
FTSDMC021_CR2_PWDN	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR2_PWDN	/;"	d
FTSDMC021_CR2_REFTYPE	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR2_REFTYPE	/;"	d
FTSDMC021_CR2_SREF	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CR2_SREF	/;"	d
FTSDMC021_CRR_MAJOR_VER	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CRR_MAJOR_VER	/;"	d
FTSDMC021_CRR_MINOR_VER	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CRR_MINOR_VER	/;"	d
FTSDMC021_CRR_REV_VER	include/faraday/ftsdmc021.h	/^#define FTSDMC021_CRR_REV_VER	/;"	d
FTSDMC021_EBISR_MR	include/faraday/ftsdmc021.h	/^#define FTSDMC021_EBISR_MR(/;"	d
FTSDMC021_EBISR_POPREC	include/faraday/ftsdmc021.h	/^#define FTSDMC021_EBISR_POPREC	/;"	d
FTSDMC021_EBISR_POSMR	include/faraday/ftsdmc021.h	/^#define FTSDMC021_EBISR_POSMR	/;"	d
FTSDMC021_EBISR_PRSMR	include/faraday/ftsdmc021.h	/^#define FTSDMC021_EBISR_PRSMR	/;"	d
FTSDMC021_FRR_FLUSHCHN	include/faraday/ftsdmc021.h	/^#define FTSDMC021_FRR_FLUSHCHN(/;"	d
FTSDMC021_FRR_FLUSHCMPLT	include/faraday/ftsdmc021.h	/^#define FTSDMC021_FRR_FLUSHCMPLT	/;"	d
FTSDMC021_RAGR_CH1GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH1GW(/;"	d
FTSDMC021_RAGR_CH2GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH2GW(/;"	d
FTSDMC021_RAGR_CH3GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH3GW(/;"	d
FTSDMC021_RAGR_CH4GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH4GW(/;"	d
FTSDMC021_RAGR_CH5GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH5GW(/;"	d
FTSDMC021_RAGR_CH6GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH6GW(/;"	d
FTSDMC021_RAGR_CH7GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH7GW(/;"	d
FTSDMC021_RAGR_CH8GW	include/faraday/ftsdmc021.h	/^#define FTSDMC021_RAGR_CH8GW(/;"	d
FTSDMC021_TP1_TCL	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP1_TCL(/;"	d
FTSDMC021_TP1_TRAS	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP1_TRAS(/;"	d
FTSDMC021_TP1_TRCD	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP1_TRCD(/;"	d
FTSDMC021_TP1_TRF	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP1_TRF(/;"	d
FTSDMC021_TP1_TRP	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP1_TRP(/;"	d
FTSDMC021_TP1_TWR	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP1_TWR(/;"	d
FTSDMC021_TP2_INI_PREC	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP2_INI_PREC(/;"	d
FTSDMC021_TP2_INI_REFT	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP2_INI_REFT(/;"	d
FTSDMC021_TP2_REF_INTV	include/faraday/ftsdmc021.h	/^#define FTSDMC021_TP2_REF_INTV(/;"	d
FTSMC020_BANK0_CONFIG	include/configs/adp-ag101p.h	/^#define FTSMC020_BANK0_CONFIG	/;"	d
FTSMC020_BANK0_LOWLV_CONFIG	include/configs/adp-ag101p.h	/^#define FTSMC020_BANK0_LOWLV_CONFIG	/;"	d
FTSMC020_BANK0_LOWLV_TIMING	include/configs/adp-ag101p.h	/^#define FTSMC020_BANK0_LOWLV_TIMING	/;"	d
FTSMC020_BANK0_TIMING	include/configs/adp-ag101p.h	/^#define FTSMC020_BANK0_TIMING	/;"	d
FTSMC020_BANK1_CONFIG	include/configs/adp-ag101p.h	/^#define FTSMC020_BANK1_CONFIG	/;"	d
FTSMC020_BANK1_TIMING	include/configs/adp-ag101p.h	/^#define FTSMC020_BANK1_TIMING	/;"	d
FTSMC020_BANK_BASE	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_BASE(/;"	d
FTSMC020_BANK_ENABLE	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_ENABLE	/;"	d
FTSMC020_BANK_MBW_16	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_MBW_16	/;"	d
FTSMC020_BANK_MBW_32	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_MBW_32	/;"	d
FTSMC020_BANK_MBW_8	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_MBW_8	/;"	d
FTSMC020_BANK_SIZE_128K	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_128K	/;"	d
FTSMC020_BANK_SIZE_16M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_16M	/;"	d
FTSMC020_BANK_SIZE_1M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_1M	/;"	d
FTSMC020_BANK_SIZE_256K	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_256K	/;"	d
FTSMC020_BANK_SIZE_2M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_2M	/;"	d
FTSMC020_BANK_SIZE_32K	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_32K	/;"	d
FTSMC020_BANK_SIZE_32M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_32M	/;"	d
FTSMC020_BANK_SIZE_4M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_4M	/;"	d
FTSMC020_BANK_SIZE_512K	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_512K	/;"	d
FTSMC020_BANK_SIZE_64K	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_64K	/;"	d
FTSMC020_BANK_SIZE_64M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_64M	/;"	d
FTSMC020_BANK_SIZE_8M	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_SIZE_8M	/;"	d
FTSMC020_BANK_TYPE1	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_TYPE1	/;"	d
FTSMC020_BANK_TYPE2	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_TYPE2	/;"	d
FTSMC020_BANK_TYPE3	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_TYPE3	/;"	d
FTSMC020_BANK_WPROT	include/faraday/ftsmc020.h	/^#define FTSMC020_BANK_WPROT	/;"	d
FTSMC020_TPR_AHT	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_AHT(/;"	d
FTSMC020_TPR_AST	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_AST(/;"	d
FTSMC020_TPR_AT2	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_AT2(/;"	d
FTSMC020_TPR_ATI	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_ATI(/;"	d
FTSMC020_TPR_CTW	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_CTW(/;"	d
FTSMC020_TPR_EATI	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_EATI(/;"	d
FTSMC020_TPR_ETRNA	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_ETRNA(/;"	d
FTSMC020_TPR_RBE	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_RBE	/;"	d
FTSMC020_TPR_TRNA	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_TRNA(/;"	d
FTSMC020_TPR_WTC	include/faraday/ftsmc020.h	/^#define FTSMC020_TPR_WTC(/;"	d
FTTMR010_TM1_CLOCK	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_CLOCK	/;"	d
FTTMR010_TM1_ENABLE	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_ENABLE	/;"	d
FTTMR010_TM1_MATCH1	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_MATCH1	/;"	d
FTTMR010_TM1_MATCH2	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_MATCH2	/;"	d
FTTMR010_TM1_OFENABLE	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_OFENABLE	/;"	d
FTTMR010_TM1_OVERFLOW	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_OVERFLOW	/;"	d
FTTMR010_TM1_UPDOWN	include/faraday/fttmr010.h	/^#define FTTMR010_TM1_UPDOWN	/;"	d
FTTMR010_TM2_CLOCK	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_CLOCK	/;"	d
FTTMR010_TM2_ENABLE	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_ENABLE	/;"	d
FTTMR010_TM2_MATCH1	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_MATCH1	/;"	d
FTTMR010_TM2_MATCH2	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_MATCH2	/;"	d
FTTMR010_TM2_OFENABLE	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_OFENABLE	/;"	d
FTTMR010_TM2_OVERFLOW	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_OVERFLOW	/;"	d
FTTMR010_TM2_UPDOWN	include/faraday/fttmr010.h	/^#define FTTMR010_TM2_UPDOWN	/;"	d
FTTMR010_TM3_CLOCK	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_CLOCK	/;"	d
FTTMR010_TM3_ENABLE	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_ENABLE	/;"	d
FTTMR010_TM3_MATCH1	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_MATCH1	/;"	d
FTTMR010_TM3_MATCH2	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_MATCH2	/;"	d
FTTMR010_TM3_OFENABLE	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_OFENABLE	/;"	d
FTTMR010_TM3_OVERFLOW	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_OVERFLOW	/;"	d
FTTMR010_TM3_UPDOWN	include/faraday/fttmr010.h	/^#define FTTMR010_TM3_UPDOWN	/;"	d
FTWDT010_TIMEOUT_FACTOR	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_TIMEOUT_FACTOR	/;"	d
FTWDT010_WDCLEAR	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDCLEAR	/;"	d
FTWDT010_WDCR_CLOCK	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDCR_CLOCK	/;"	d
FTWDT010_WDCR_ENABLE	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDCR_ENABLE	/;"	d
FTWDT010_WDCR_EXT	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDCR_EXT	/;"	d
FTWDT010_WDCR_INTR	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDCR_INTR	/;"	d
FTWDT010_WDCR_RST	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDCR_RST	/;"	d
FTWDT010_WDINTRLEN	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDINTRLEN(/;"	d
FTWDT010_WDLOAD	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDLOAD(/;"	d
FTWDT010_WDRESTART_MAGIC	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDRESTART_MAGIC	/;"	d
FTWDT010_WDSTATUS	include/faraday/ftwdt010_wdt.h	/^#define FTWDT010_WDSTATUS(/;"	d
FT_ERR	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define FT_ERR	/;"	d
FT_FSL_PCI1_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCI1_SETUP /;"	d
FT_FSL_PCI2_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCI2_SETUP /;"	d
FT_FSL_PCIE1_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCIE1_SETUP /;"	d
FT_FSL_PCIE2_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCIE2_SETUP /;"	d
FT_FSL_PCIE3_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCIE3_SETUP /;"	d
FT_FSL_PCIE4_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCIE4_SETUP /;"	d
FT_FSL_PCIE_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCIE_SETUP /;"	d
FT_FSL_PCI_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCI_SETUP /;"	d
FT_FSL_PCI_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define FT_FSL_PCI_SETUP$/;"	d
FUJI_ID_29F800BA	include/flash.h	/^#define FUJI_ID_29F800BA /;"	d
FUJI_ID_29F800TA	include/flash.h	/^#define FUJI_ID_29F800TA /;"	d
FUJI_ID_29LV650UE	include/flash.h	/^#define FUJI_ID_29LV650UE /;"	d
FUJ_MANUFACT	include/flash.h	/^#define FUJ_MANUFACT	/;"	d
FULL	include/miiphy.h	/^#define FULL	/;"	d
FULLDPLXMODE	drivers/net/designware.h	/^#define FULLDPLXMODE	/;"	d
FULLDUPLEX	drivers/net/ax88180.h	/^  #define FULLDUPLEX	/;"	d
FULLDUPLEXEN	drivers/net/cpsw.c	/^#define FULLDUPLEXEN	/;"	d	file:
FULLDUP_GAP_TIME	drivers/net/pic32_eth.h	/^#define FULLDUP_GAP_TIME	/;"	d
FULL_CLK	arch/x86/cpu/quark/smc.h	/^#define FULL_CLK	/;"	d
FULL_DPX	include/mv88e6352.h	/^#define FULL_DPX	/;"	d
FULL_DPX_FOR	include/mv88e6352.h	/^#define FULL_DPX_FOR	/;"	d
FULL_DUP	drivers/usb/eth/r8152.h	/^	FULL_DUP	= 0x01,$/;"	e	enum:rtl_register_content
FULL_DUPLEX	drivers/net/e1000.h	/^#define FULL_DUPLEX /;"	d
FULL_DUPLEX	include/mv88e6352.h	/^#define FULL_DUPLEX	/;"	d
FULL_ON	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define FULL_ON	/;"	d
FULL_RST	arch/x86/include/asm/processor.h	/^	FULL_RST	= 1 << 3,	\/* full power cycle *\/$/;"	e	enum:__anon33354ee00103
FULL_SPEED_BULK_PKT_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define FULL_SPEED_BULK_PKT_SIZE	/;"	d
FULL_SPEED_CONTROL_PKT_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define FULL_SPEED_CONTROL_PKT_SIZE	/;"	d
FULL_VIEW	scripts/kconfig/gconf.c	/^	SINGLE_VIEW, SPLIT_VIEW, FULL_VIEW$/;"	e	enum:__anon51b0ba2a0103	file:
FUNC	arch/arc/lib/_millicodethunk.S	/^#define FUNC(/;"	d	file:
FUNCDESC_TAB_NUM	include/MCD_dma.h	/^#define FUNCDESC_TAB_NUM	/;"	d
FUNCDESC_TAB_SIZE	include/MCD_dma.h	/^#define FUNCDESC_TAB_SIZE	/;"	d
FUNCF_ENTRY	include/trace.h	/^	FUNCF_ENTRY		= 1UL << 30,$/;"	e	enum:ftrace_flags
FUNCF_EXIT	include/trace.h	/^	FUNCF_EXIT		= 0UL << 30,$/;"	e	enum:ftrace_flags
FUNCF_TEXTBASE	include/trace.h	/^	FUNCF_TEXTBASE		= 2UL << 30,$/;"	e	enum:ftrace_flags
FUNCF_TIMESTAMP_MASK	include/trace.h	/^	FUNCF_TIMESTAMP_MASK	= 0x3fffffff,$/;"	e	enum:ftrace_flags
FUNCF_TRACE	tools/proftool.c	/^	FUNCF_TRACE	= 1 << 0,	\/* Include this function in trace *\/$/;"	e	enum:__anon8f19846b0103	file:
FUNCMUX_DEFAULT	arch/arm/include/asm/arch-tegra114/funcmux.h	/^	FUNCMUX_DEFAULT = 0,	\/* default config *\/$/;"	e	enum:__anon7c0c23c30103
FUNCMUX_DEFAULT	arch/arm/include/asm/arch-tegra124/funcmux.h	/^	FUNCMUX_DEFAULT = 0,	\/* default config *\/$/;"	e	enum:__anonacff81240103
FUNCMUX_DEFAULT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_DEFAULT = 0,	\/* default config *\/$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_DEFAULT	arch/arm/include/asm/arch-tegra210/funcmux.h	/^	FUNCMUX_DEFAULT = 0,	\/* default config *\/$/;"	e	enum:__anonb5f858400103
FUNCMUX_DEFAULT	arch/arm/include/asm/arch-tegra30/funcmux.h	/^	FUNCMUX_DEFAULT = 0,	\/* default config *\/$/;"	e	enum:__anoncc3d87900103
FUNCMUX_DVC_I2CP	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_DVC_I2CP = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_I2C1_RM	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_I2C1_RM = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_I2C2_DDC	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_I2C2_DDC = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_I2C2_PTA	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_I2C2_PTA,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_I2C3_DTF	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_I2C3_DTF = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_NDFLASH_ATC	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_NDFLASH_ATC = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_NDFLASH_KBC_8_BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_NDFLASH_KBC_8_BIT,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC1_SDIO1_4BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC1_SDIO1_4BIT = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC2_DTA_DTD_8BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC2_DTA_DTD_8BIT = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC3_SDB_4BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC3_SDB_4BIT = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC3_SDB_SLXA_8BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC3_SDB_SLXA_8BIT,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC4_ATB_GMA_4_BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC4_ATB_GMA_4_BIT,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SDMMC4_ATC_ATD_8BIT	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SDMMC4_ATC_ATD_8BIT = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_SPI1_GMC_GMD	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_SPI1_GMC_GMD = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART1_GPU	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_UART1_GPU,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART1_IRRX_IRTX	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_UART1_IRRX_IRTX = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART1_KBC	arch/arm/include/asm/arch-tegra124/funcmux.h	/^	FUNCMUX_UART1_KBC = 0,$/;"	e	enum:__anonacff81240103
FUNCMUX_UART1_SDIO1	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_UART1_SDIO1,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART1_UAA_UAB	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_UART1_UAA_UAB,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART1_UART1	arch/arm/include/asm/arch-tegra210/funcmux.h	/^	FUNCMUX_UART1_UART1 = 0,$/;"	e	enum:__anonb5f858400103
FUNCMUX_UART1_ULPI	arch/arm/include/asm/arch-tegra30/funcmux.h	/^	FUNCMUX_UART1_ULPI = 0,$/;"	e	enum:__anoncc3d87900103
FUNCMUX_UART2_UAD	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_UART2_UAD = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART4_GMC	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_UART4_GMC = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCMUX_UART4_GMI	arch/arm/include/asm/arch-tegra114/funcmux.h	/^	FUNCMUX_UART4_GMI = 0,$/;"	e	enum:__anon7c0c23c30103
FUNCMUX_UART4_GPIO	arch/arm/include/asm/arch-tegra124/funcmux.h	/^	FUNCMUX_UART4_GPIO = 0,$/;"	e	enum:__anonacff81240103
FUNCMUX_UART4_UART4	arch/arm/include/asm/arch-tegra210/funcmux.h	/^	FUNCMUX_UART4_UART4 = 0,$/;"	e	enum:__anonb5f858400103
FUNCMUX_USB2_ULPI	arch/arm/include/asm/arch-tegra20/funcmux.h	/^	FUNCMUX_USB2_ULPI = 0,$/;"	e	enum:__anon9b4a2a2f0103
FUNCTION	drivers/pinctrl/meson/pinctrl-meson.h	/^#define FUNCTION(/;"	d
FUNCTION	scripts/docproc.c	/^#define FUNCTION /;"	d	file:
FUNCTION_ADDRESS	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define FUNCTION_ADDRESS	/;"	d
FUNCTION_HIGHLIGHT	scripts/kconfig/nconf.h	/^	FUNCTION_HIGHLIGHT,$/;"	e	enum:__anon6c8863760103
FUNCTION_TEXT	scripts/kconfig/nconf.h	/^	FUNCTION_TEXT,$/;"	e	enum:__anon6c8863760103
FUNC_DISABLE	arch/x86/include/asm/arch-queensbay/tnc.h	/^#define FUNC_DISABLE	/;"	d
FUNC_NOT_SUPPORT	drivers/bios_emulator/bios.c	/^#define FUNC_NOT_SUPPORT /;"	d	file:
FUNC_SITE_SIZE	include/trace.h	/^	FUNC_SITE_SIZE	= 4,	\/* distance between function sites *\/$/;"	e	enum:__anon2e87235d0103
FUN_ADDR	drivers/usb/eth/r8152.h	/^#define FUN_ADDR	/;"	d
FUN_DATA	drivers/usb/eth/r8152.h	/^#define FUN_DATA	/;"	d
FUSE_BANKS	drivers/misc/mxc_ocotp.c	/^#define FUSE_BANKS	/;"	d	file:
FUSE_BANK_SIZE	drivers/misc/mxc_ocotp.c	/^#define FUSE_BANK_SIZE	/;"	d	file:
FUSE_SETUP_SEL	arch/arm/include/asm/arch-tegra/usb.h	/^#define FUSE_SETUP_SEL	/;"	d
FUSE_VAL_MASK	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FUSE_VAL_MASK	/;"	d	file:
FUSE_VAL_SHIFT	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^#define FUSE_VAL_SHIFT	/;"	d	file:
FWSRAM_BASE	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_BASE	/;"	d
FWSRAM_NO_MCM_FLASH	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_NO_MCM_FLASH(/;"	d
FWSRAM_NO_MCM_FLASH_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_NO_MCM_FLASH_OFFS	/;"	d
FWSRAM_SR_ADDR_OFFSET	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_SR_ADDR_OFFSET(/;"	d
FWSRAM_SR_ADDR_OFFSET_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_SR_ADDR_OFFSET_OFFS	/;"	d
FWSRAM_TOP_BOOT_LOG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_BOOT_LOG(/;"	d
FWSRAM_TOP_BOOT_LOG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_BOOT_LOG_OFFS	/;"	d
FWSRAM_TOP_CID1_H	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID1_H(/;"	d
FWSRAM_TOP_CID1_H_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID1_H_OFFS	/;"	d
FWSRAM_TOP_CID1_L	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID1_L(/;"	d
FWSRAM_TOP_CID1_L_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID1_L_OFFS	/;"	d
FWSRAM_TOP_CID2_H	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID2_H(/;"	d
FWSRAM_TOP_CID2_H_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID2_H_OFFS	/;"	d
FWSRAM_TOP_CID2_L	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID2_L(/;"	d
FWSRAM_TOP_CID2_L_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_CID2_L_OFFS	/;"	d
FWSRAM_TOP_GPIO2_0_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_0_CFG(/;"	d
FWSRAM_TOP_GPIO2_0_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_0_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_1_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_1_CFG(/;"	d
FWSRAM_TOP_GPIO2_1_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_1_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_2_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_2_CFG(/;"	d
FWSRAM_TOP_GPIO2_2_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_2_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_3_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_3_CFG(/;"	d
FWSRAM_TOP_GPIO2_3_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_3_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_4_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_4_CFG(/;"	d
FWSRAM_TOP_GPIO2_4_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_4_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_5_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_5_CFG(/;"	d
FWSRAM_TOP_GPIO2_5_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_5_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_6_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_6_CFG(/;"	d
FWSRAM_TOP_GPIO2_6_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_6_CFG_OFFS	/;"	d
FWSRAM_TOP_GPIO2_7_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_7_CFG(/;"	d
FWSRAM_TOP_GPIO2_7_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_GPIO2_7_CFG_OFFS	/;"	d
FWSRAM_TOP_ROM_KBIST	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_ROM_KBIST(/;"	d
FWSRAM_TOP_ROM_KBIST_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_ROM_KBIST_OFFS	/;"	d
FWSRAM_TOP_SCL_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_SCL_CFG(/;"	d
FWSRAM_TOP_SCL_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_SCL_CFG_OFFS	/;"	d
FWSRAM_TOP_SDA_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_SDA_CFG(/;"	d
FWSRAM_TOP_SDA_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_SDA_CFG_OFFS	/;"	d
FWSRAM_TOP_TDO_CFG	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_TDO_CFG(/;"	d
FWSRAM_TOP_TDO_CFG_OFFS	board/micronas/vct/vcth/reg_fwsram.h	/^#define FWSRAM_TOP_TDO_CFG_OFFS	/;"	d
FW_CFG_ARCH_LOCAL	include/qfw.h	/^	FW_CFG_ARCH_LOCAL	= 0x8000,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_BOOT_DEVICE	include/qfw.h	/^	FW_CFG_BOOT_DEVICE	= 0x0c,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_BOOT_MENU	include/qfw.h	/^	FW_CFG_BOOT_MENU	= 0x0e,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_CMDLINE_ADDR	include/qfw.h	/^	FW_CFG_CMDLINE_ADDR	= 0x13,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_CMDLINE_DATA	include/qfw.h	/^	FW_CFG_CMDLINE_DATA	= 0x15,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_CMDLINE_SIZE	include/qfw.h	/^	FW_CFG_CMDLINE_SIZE	= 0x14,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_DMA_ENABLED	include/qfw.h	/^#define FW_CFG_DMA_ENABLED	/;"	d
FW_CFG_DMA_ERROR	include/qfw.h	/^#define FW_CFG_DMA_ERROR	/;"	d
FW_CFG_DMA_READ	include/qfw.h	/^#define FW_CFG_DMA_READ	/;"	d
FW_CFG_DMA_SELECT	include/qfw.h	/^#define FW_CFG_DMA_SELECT	/;"	d
FW_CFG_DMA_SKIP	include/qfw.h	/^#define FW_CFG_DMA_SKIP	/;"	d
FW_CFG_ENTRY_MASK	include/qfw.h	/^#define FW_CFG_ENTRY_MASK	/;"	d
FW_CFG_FILE_DIR	include/qfw.h	/^	FW_CFG_FILE_DIR		= 0x19,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_FILE_FIRST	include/qfw.h	/^	FW_CFG_FILE_FIRST	= 0x20,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_FILE_SLOTS	include/qfw.h	/^#define FW_CFG_FILE_SLOTS	/;"	d
FW_CFG_ID	include/qfw.h	/^	FW_CFG_ID		= 0x01,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_INITRD_ADDR	include/qfw.h	/^	FW_CFG_INITRD_ADDR	= 0x0a,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_INITRD_DATA	include/qfw.h	/^	FW_CFG_INITRD_DATA	= 0x12,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_INITRD_SIZE	include/qfw.h	/^	FW_CFG_INITRD_SIZE	= 0x0b,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_INVALID	include/qfw.h	/^	FW_CFG_INVALID		= 0xffff,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_KERNEL_ADDR	include/qfw.h	/^	FW_CFG_KERNEL_ADDR	= 0x07,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_KERNEL_CMDLINE	include/qfw.h	/^	FW_CFG_KERNEL_CMDLINE   = 0x09,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_KERNEL_DATA	include/qfw.h	/^	FW_CFG_KERNEL_DATA	= 0x11,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_KERNEL_ENTRY	include/qfw.h	/^	FW_CFG_KERNEL_ENTRY	= 0x10,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_KERNEL_SIZE	include/qfw.h	/^	FW_CFG_KERNEL_SIZE	= 0x08,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_MACHINE_ID	include/qfw.h	/^	FW_CFG_MACHINE_ID	= 0x06,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_MAX_CPUS	include/qfw.h	/^	FW_CFG_MAX_CPUS		= 0x0f,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_MAX_ENTRY	include/qfw.h	/^#define FW_CFG_MAX_ENTRY	/;"	d
FW_CFG_MAX_FILE_PATH	include/qfw.h	/^#define FW_CFG_MAX_FILE_PATH	/;"	d
FW_CFG_NB_CPUS	include/qfw.h	/^	FW_CFG_NB_CPUS		= 0x05,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_NOGRAPHIC	include/qfw.h	/^	FW_CFG_NOGRAPHIC	= 0x04,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_NUMA	include/qfw.h	/^	FW_CFG_NUMA		= 0x0d,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_RAM_SIZE	include/qfw.h	/^	FW_CFG_RAM_SIZE		= 0x03,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_SETUP_ADDR	include/qfw.h	/^	FW_CFG_SETUP_ADDR	= 0x16,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_SETUP_DATA	include/qfw.h	/^	FW_CFG_SETUP_DATA	= 0x18,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_SETUP_SIZE	include/qfw.h	/^	FW_CFG_SETUP_SIZE	= 0x17,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_SIGNATURE	include/qfw.h	/^	FW_CFG_SIGNATURE	= 0x00,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_UUID	include/qfw.h	/^	FW_CFG_UUID		= 0x02,$/;"	e	enum:qemu_fwcfg_items
FW_CFG_WRITE_CHANNEL	include/qfw.h	/^	FW_CFG_WRITE_CHANNEL	= 0x4000,$/;"	e	enum:qemu_fwcfg_items
FW_CNTL	include/radeon.h	/^#define FW_CNTL	/;"	d
FW_CONTROL_PORT	arch/x86/cpu/qemu/qemu.c	/^#define FW_CONTROL_PORT	/;"	d	file:
FW_DATA_PORT	arch/x86/cpu/qemu/qemu.c	/^#define FW_DATA_PORT	/;"	d	file:
FW_DEBUG	board/cm5200/fwupdate.h	/^#define FW_DEBUG(/;"	d
FW_DIR	board/cm5200/fwupdate.h	/^#define FW_DIR	/;"	d
FW_DMA_PORT_HIGH	arch/x86/cpu/qemu/qemu.c	/^#define FW_DMA_PORT_HIGH	/;"	d	file:
FW_DMA_PORT_LOW	arch/x86/cpu/qemu/qemu.c	/^#define FW_DMA_PORT_LOW	/;"	d	file:
FW_F0	arch/sparc/include/asm/stack.h	/^#define FW_F0	/;"	d
FW_F10	arch/sparc/include/asm/stack.h	/^#define FW_F10	/;"	d
FW_F12	arch/sparc/include/asm/stack.h	/^#define FW_F12	/;"	d
FW_F14	arch/sparc/include/asm/stack.h	/^#define FW_F14	/;"	d
FW_F16	arch/sparc/include/asm/stack.h	/^#define FW_F16	/;"	d
FW_F18	arch/sparc/include/asm/stack.h	/^#define FW_F18	/;"	d
FW_F2	arch/sparc/include/asm/stack.h	/^#define FW_F2	/;"	d
FW_F20	arch/sparc/include/asm/stack.h	/^#define FW_F20	/;"	d
FW_F22	arch/sparc/include/asm/stack.h	/^#define FW_F22	/;"	d
FW_F24	arch/sparc/include/asm/stack.h	/^#define FW_F24	/;"	d
FW_F26	arch/sparc/include/asm/stack.h	/^#define FW_F26	/;"	d
FW_F28	arch/sparc/include/asm/stack.h	/^#define FW_F28	/;"	d
FW_F30	arch/sparc/include/asm/stack.h	/^#define FW_F30	/;"	d
FW_F4	arch/sparc/include/asm/stack.h	/^#define FW_F4	/;"	d
FW_F6	arch/sparc/include/asm/stack.h	/^#define FW_F6	/;"	d
FW_F8	arch/sparc/include/asm/stack.h	/^#define FW_F8	/;"	d
FW_FSR	arch/sparc/include/asm/stack.h	/^#define FW_FSR	/;"	d
FW_LOAD	arch/sparc/include/asm/winmacro.h	/^#define FW_LOAD(/;"	d
FW_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define FW_REGS_SZ	/;"	d
FW_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define FW_REGS_SZ /;"	d
FW_STORE	arch/sparc/include/asm/winmacro.h	/^#define FW_STORE(/;"	d
F_AF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_AF /;"	d
F_ALL_CALC	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_ALL_CALC	/;"	d
F_ALWAYS_ON	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_ALWAYS_ON /;"	d
F_BACK	scripts/kconfig/nconf.h	/^	F_BACK = 5,$/;"	e	enum:__anon6c8863760203
F_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define F_BIT	/;"	d
F_CF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_CF /;"	d
F_CONF	scripts/kconfig/nconf.h	/^	F_CONF = 4,$/;"	e	enum:__anon6c8863760203
F_DF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_DF /;"	d
F_EXIT	scripts/kconfig/nconf.h	/^	F_EXIT = 9,$/;"	e	enum:__anon6c8863760203
F_EXT_RST	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_EXT_RST	/;"	d
F_FCCU_HARD	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_FCCU_HARD	/;"	d
F_FCCU_SOFT	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_FCCU_SOFT	/;"	d
F_FILE	fs/ext4/ext4_common.h	/^#define F_FILE	/;"	d
F_HELP	scripts/kconfig/nconf.h	/^	F_HELP = 1,$/;"	e	enum:__anon6c8863760203
F_HPD	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define F_HPD	/;"	d
F_HPD	arch/arm/mach-exynos/include/mach/dp.h	/^#define F_HPD	/;"	d
F_IF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_IF /;"	d
F_INSTR	include/bedbug/ppc.h	/^#define F_INSTR	/;"	d
F_INSTS	scripts/kconfig/nconf.h	/^	F_INSTS = 3,$/;"	e	enum:__anon6c8863760203
F_JTAG	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_JTAG	/;"	d
F_LINENO	include/bedbug/ppc.h	/^#define F_LINENO	/;"	d
F_LOAD	scripts/kconfig/nconf.h	/^	F_LOAD = 7,$/;"	e	enum:__anon6c8863760203
F_LOCALMEM	include/bedbug/ppc.h	/^#define F_LOCALMEM	/;"	d
F_MSK	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_MSK /;"	d
F_NAME_BUF_SIZE	drivers/usb/gadget/f_thor.h	/^#define F_NAME_BUF_SIZE /;"	d
F_OF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_OF /;"	d
F_OK	fs/yaffs2/yportenv.h	/^#define F_OK	/;"	d
F_PF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_PF /;"	d
F_PF_CALC	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_PF_CALC /;"	d
F_PLL_LOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define F_PLL_LOCK	/;"	d
F_PLL_LOCK	arch/arm/mach-exynos/include/mach/dp.h	/^#define F_PLL_LOCK	/;"	d
F_RADHEX	include/bedbug/ppc.h	/^#define F_RADHEX	/;"	d
F_RADOCTAL	include/bedbug/ppc.h	/^#define F_RADOCTAL	/;"	d
F_RADSDECIMAL	include/bedbug/ppc.h	/^#define F_RADSDECIMAL	/;"	d
F_RADUDECIMAL	include/bedbug/ppc.h	/^#define F_RADUDECIMAL	/;"	d
F_SAVE	scripts/kconfig/nconf.h	/^	F_SAVE = 6,$/;"	e	enum:__anon6c8863760203
F_SEARCH	scripts/kconfig/nconf.h	/^	F_SEARCH = 8,$/;"	e	enum:__anon6c8863760203
F_SEL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define F_SEL	/;"	d
F_SF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_SF /;"	d
F_SF_CALC	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_SF_CALC /;"	d
F_SIMPLE	include/bedbug/ppc.h	/^#define F_SIMPLE	/;"	d
F_SOFT_FUNC	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_SOFT_FUNC	/;"	d
F_ST_DONE	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_ST_DONE	/;"	d
F_SWT4	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define F_SWT4	/;"	d
F_SYMBOL	include/bedbug/ppc.h	/^#define F_SYMBOL	/;"	d
F_SYMBOL	scripts/kconfig/nconf.h	/^	F_SYMBOL = 2,$/;"	e	enum:__anon6c8863760203
F_TF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_TF /;"	d
F_VALID	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define F_VALID	/;"	d
F_VALID	arch/arm/mach-exynos/include/mach/dp.h	/^#define F_VALID	/;"	d
F_VALIDONLY	include/bedbug/ppc.h	/^#define F_VALIDONLY	/;"	d
F_ZF	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_ZF /;"	d
F_ZF_CALC	drivers/bios_emulator/include/x86emu/regs.h	/^#define F_ZF_CALC /;"	d
Failed_Address	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Failed_Address;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
False	lib/bzip2/bzlib_private.h	/^#define False /;"	d
False	lib/lzma/Types.h	/^#define False /;"	d
FalseCarrierCnt	drivers/net/rtl8139.c	/^	DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,$/;"	e	enum:RTL8139_registers	file:
Fastboot support	cmd/fastboot/Kconfig	/^menu "Fastboot support"$/;"	m
Fdt	tools/dtoc/fdt.py	/^class Fdt:$/;"	c
FdtFallback	tools/dtoc/fdt_fallback.py	/^class FdtFallback(Fdt):$/;"	c
FdtNormal	tools/dtoc/fdt_normal.py	/^class FdtNormal(Fdt):$/;"	c
FdtScan	tools/dtoc/fdt_select.py	/^def FdtScan(fname, _force_fallback=False):$/;"	f
Fetch	tools/patman/gitutil.py	/^def Fetch(git_dir=None, work_tree=None):$/;"	f
FetchAndInstall	tools/buildman/toolchain.py	/^    def FetchAndInstall(self, arch):$/;"	m	class:Toolchains
File systems	fs/Kconfig	/^menu "File systems"$/;"	m
FileAlignment	include/pe.h	/^	uint32_t FileAlignment;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
FileAlignment	include/pe.h	/^	uint32_t FileAlignment;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
FileHeader	include/pe.h	/^	IMAGE_FILE_HEADER FileHeader;         \/* 0x04 *\/$/;"	m	struct:_IMAGE_NT_HEADERS	typeref:typename:IMAGE_FILE_HEADER
FileHeader	include/pe.h	/^	IMAGE_FILE_HEADER FileHeader;$/;"	m	struct:_IMAGE_NT_HEADERS64	typeref:typename:IMAGE_FILE_HEADER
Filesystem commands	cmd/Kconfig	/^menu "Filesystem commands"$/;"	m	menu:Command line interface
FilterErrors	tools/buildman/builder.py	/^    def FilterErrors(self, lines):$/;"	m	class:Builder
FinaliseOutputDir	tools/patman/tools.py	/^def FinaliseOutputDir():$/;"	f
Finalize	tools/patman/patchstream.py	/^    def Finalize(self):$/;"	m	class:PatchStream
Find	doc/README.x86	/^Find the following files:$/;"	l
FindAndSetPllParamIntoXrRegs	drivers/video/ct69000.c	/^FindAndSetPllParamIntoXrRegs (unsigned int pixelclock,$/;"	f	typeref:typename:void	file:
FindBestPQFittingMN	drivers/video/ct69000.c	/^FindBestPQFittingMN (unsigned int p, unsigned int q, unsigned int mnmin,$/;"	f	typeref:typename:unsigned int	file:
FindCheckPatch	tools/patman/checkpatch.py	/^def FindCheckPatch():$/;"	f
FindGetMaintainer	tools/patman/get_maintainer.py	/^def FindGetMaintainer():$/;"	f
FindMicrocode	tools/microcode-tool	/^def FindMicrocode(microcodes, model):$/;"	f
FindMicrocode	tools/microcode-tool.py	/^def FindMicrocode(microcodes, model):$/;"	f
Firmware	doc/README.x86	/^Firmware Support Package [5] to perform all the necessary initialization steps$/;"	l
Firmware commands	cmd/Kconfig	/^menu "Firmware commands"$/;"	m	menu:Command line interface
FirstTxDesc	drivers/net/ax88180.h	/^	unsigned short FirstTxDesc;$/;"	m	struct:ax88180_private	typeref:typename:unsigned short
FixPatch	tools/patman/patchstream.py	/^def FixPatch(backup_dir, fname, series, commit):$/;"	f
FixPatches	tools/patman/patchstream.py	/^def FixPatches(series, fnames):$/;"	f
Flags	drivers/usb/gadget/ndis.h	/^	__le32					Flags;$/;"	m	struct:NDIS_PNP_CAPABILITIES	typeref:typename:__le32
Flags	drivers/usb/gadget/storage_common.c	/^	u8	Flags;			\/* Direction in bit 7 *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:u8	file:
Fld	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define Fld(/;"	d
Fld	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define Fld(/;"	d
Flush	tools/dtoc/fdt.py	/^    def Flush(self):$/;"	m	class:Fdt
Flush	tools/dtoc/fdt_normal.py	/^    def Flush(self):$/;"	m	class:FdtNormal
For	doc/README.x86	/^For Minnowboard MAX, we can reuse the same ME firmware above, but for flash$/;"	l
Free	lib/lzma/Types.h	/^  void (*Free)(void *p, void *address); \/* address can be 0 *\/$/;"	m	struct:__anonf2a2f1b90c08	typeref:typename:void (*)(void * p,void * address)
Freq	lib/zlib/deflate.h	/^#define Freq /;"	d
FrmData	drivers/net/bfin_mac.h	/^	ADI_ETHER_FRAME_BUFFER *FrmData;\/* pointer to data *\/$/;"	m	struct:adi_ether_buffer	typeref:typename:ADI_ETHER_FRAME_BUFFER *
FullDup	drivers/net/rtl8169.c	/^	FullDup = 0x01,$/;"	e	enum:RTL8169_register_content	file:
FullDuplex	drivers/net/natsemi.c	/^	FullDuplex	= 0x20000000,$/;"	e	enum:ChipConfigBits	file:
FullDuplex	drivers/net/ns8382x.c	/^	FullDuplex = 0x10000000,$/;"	e	enum:ChipConfigBits	file:
FuncEvent	drivers/net/rtl8169.c	/^	FuncEvent = 0xF0,$/;"	e	enum:RTL8169_registers	file:
FuncEventMask	drivers/net/rtl8169.c	/^	FuncEventMask = 0xF4,$/;"	e	enum:RTL8169_registers	file:
FuncForceEvent	drivers/net/rtl8169.c	/^	FuncForceEvent = 0xFC,$/;"	e	enum:RTL8169_registers	file:
FuncPresetState	drivers/net/rtl8169.c	/^	FuncPresetState = 0xF8,$/;"	e	enum:RTL8169_registers	file:
Func_1	lib/dhry/dhry_2.c	/^Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val)$/;"	f	typeref:typename:Enumeration
Func_2	lib/dhry/dhry_2.c	/^Boolean Func_2 (Str_1_Par_Ref, Str_2_Par_Ref)$/;"	f
Func_3	lib/dhry/dhry_2.c	/^Boolean Func_3 (Enum_Par_Val)$/;"	f
G1_SETTINGS_0_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G1_SETTINGS_0_REG	/;"	d
G1_SETTINGS_1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G1_SETTINGS_1_REG	/;"	d
G1_SETTINGS_3_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G1_SETTINGS_3_REG	/;"	d
G1_SETTINGS_4_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G1_SETTINGS_4_REG	/;"	d
G2D_ACP0_SEL	board/samsung/odroid/setup.h	/^#define G2D_ACP0_SEL(/;"	d
G2D_ACP1_SEL	board/samsung/odroid/setup.h	/^#define G2D_ACP1_SEL(/;"	d
G2D_ACP_RATIO	board/samsung/odroid/setup.h	/^#define G2D_ACP_RATIO(/;"	d
G2D_ACP_SEL	board/samsung/odroid/setup.h	/^#define G2D_ACP_SEL(/;"	d
G2_SETTINGS_0_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G2_SETTINGS_0_REG	/;"	d
G2_SETTINGS_1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G2_SETTINGS_1_REG	/;"	d
G2_SETTINGS_2_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G2_SETTINGS_2_REG	/;"	d
G2_SETTINGS_3_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G2_SETTINGS_3_REG	/;"	d
G2_SETTINGS_4_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G2_SETTINGS_4_REG	/;"	d
G3D_0_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define G3D_0_SEL	/;"	d
G3D_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define G3D_RATIO	/;"	d
G3D_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define G3D_SEL	/;"	d
G3D_SEL_MPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define G3D_SEL_MPLL	/;"	d
G3_SETTINGS_0_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G3_SETTINGS_0_REG	/;"	d
G3_SETTINGS_1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G3_SETTINGS_1_REG	/;"	d
G3_SETTINGS_3_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G3_SETTINGS_3_REG	/;"	d
G3_SETTINGS_4_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define G3_SETTINGS_4_REG	/;"	d
G762_REG_FAN_CMD1	board/LaCie/net2big_v2/net2big_v2.h	/^#define G762_REG_FAN_CMD1	/;"	d
G762_REG_SET_CNT	board/LaCie/net2big_v2/net2big_v2.h	/^#define G762_REG_SET_CNT	/;"	d
G762_REG_SET_OUT	board/LaCie/net2big_v2/net2big_v2.h	/^#define G762_REG_SET_OUT	/;"	d
GAFR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR(/;"	d
GAFR	include/SA-1100.h	/^#define GAFR	/;"	d
GAFR	include/SA-1100.h	/^#define GAFR /;"	d
GAFR0_L	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR0_L	/;"	d
GAFR0_U	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR0_U	/;"	d
GAFR1_L	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR1_L	/;"	d
GAFR1_U	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR1_U	/;"	d
GAFR2_L	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR2_L	/;"	d
GAFR2_U	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR2_U	/;"	d
GAFR3_L	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR3_L	/;"	d
GAFR3_U	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GAFR3_U	/;"	d
GAHBCFG_INIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define GAHBCFG_INIT	/;"	d
GAIN_10	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define GAIN_10	/;"	d
GAIN_20	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define GAIN_20	/;"	d
GAIN_5	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define GAIN_5	/;"	d
GAIN_50	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define GAIN_50	/;"	d
GAIN_MASK	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define GAIN_MASK	/;"	d
GAISLER_1553TST	include/ambapp_ids.h	/^#define GAISLER_1553TST /;"	d
GAISLER_AES	include/ambapp_ids.h	/^#define GAISLER_AES /;"	d
GAISLER_AESDMA	include/ambapp_ids.h	/^#define GAISLER_AESDMA /;"	d
GAISLER_AHB2AHB	include/ambapp_ids.h	/^#define GAISLER_AHB2AHB /;"	d
GAISLER_AHB2PP	include/ambapp_ids.h	/^#define GAISLER_AHB2PP /;"	d
GAISLER_AHBDMA	include/ambapp_ids.h	/^#define GAISLER_AHBDMA /;"	d
GAISLER_AHBDPRAM	include/ambapp_ids.h	/^#define GAISLER_AHBDPRAM /;"	d
GAISLER_AHBJTAG	include/ambapp_ids.h	/^#define GAISLER_AHBJTAG /;"	d
GAISLER_AHBMST_EM	include/ambapp_ids.h	/^#define GAISLER_AHBMST_EM /;"	d
GAISLER_AHBRAM	include/ambapp_ids.h	/^#define GAISLER_AHBRAM /;"	d
GAISLER_AHBROM	include/ambapp_ids.h	/^#define GAISLER_AHBROM /;"	d
GAISLER_AHBSLV_EM	include/ambapp_ids.h	/^#define GAISLER_AHBSLV_EM /;"	d
GAISLER_AHBSTAT	include/ambapp_ids.h	/^#define GAISLER_AHBSTAT /;"	d
GAISLER_AHBTRACE	include/ambapp_ids.h	/^#define GAISLER_AHBTRACE /;"	d
GAISLER_AHBUART	include/ambapp_ids.h	/^#define GAISLER_AHBUART /;"	d
GAISLER_APB2PW	include/ambapp_ids.h	/^#define GAISLER_APB2PW /;"	d
GAISLER_APBMST	include/ambapp_ids.h	/^#define GAISLER_APBMST /;"	d
GAISLER_APBPS2	include/ambapp_ids.h	/^#define GAISLER_APBPS2 /;"	d
GAISLER_APBUART	include/ambapp_ids.h	/^#define GAISLER_APBUART /;"	d
GAISLER_ASCS	include/ambapp_ids.h	/^#define GAISLER_ASCS /;"	d
GAISLER_ATACTRL	include/ambapp_ids.h	/^#define GAISLER_ATACTRL /;"	d
GAISLER_ATAHBMST	include/ambapp_ids.h	/^#define GAISLER_ATAHBMST /;"	d
GAISLER_ATAHBSLV	include/ambapp_ids.h	/^#define GAISLER_ATAHBSLV /;"	d
GAISLER_ATAPBSLV	include/ambapp_ids.h	/^#define GAISLER_ATAPBSLV /;"	d
GAISLER_B1553BC	include/ambapp_ids.h	/^#define GAISLER_B1553BC /;"	d
GAISLER_B1553BRM	include/ambapp_ids.h	/^#define GAISLER_B1553BRM /;"	d
GAISLER_B1553RT	include/ambapp_ids.h	/^#define GAISLER_B1553RT /;"	d
GAISLER_BIO1	include/ambapp_ids.h	/^#define GAISLER_BIO1 /;"	d
GAISLER_CANAHB	include/ambapp_ids.h	/^#define GAISLER_CANAHB /;"	d
GAISLER_CANMUX	include/ambapp_ids.h	/^#define GAISLER_CANMUX /;"	d
GAISLER_CLKGATE	include/ambapp_ids.h	/^#define GAISLER_CLKGATE /;"	d
GAISLER_CLKMOD	include/ambapp_ids.h	/^#define GAISLER_CLKMOD /;"	d
GAISLER_DDR2SP	include/ambapp_ids.h	/^#define GAISLER_DDR2SP /;"	d
GAISLER_DDRMP	include/ambapp_ids.h	/^#define GAISLER_DDRMP /;"	d
GAISLER_DDRSP	include/ambapp_ids.h	/^#define GAISLER_DDRSP /;"	d
GAISLER_DMACTRL	include/ambapp_ids.h	/^#define GAISLER_DMACTRL /;"	d
GAISLER_DSUCTRL	include/ambapp_ids.h	/^#define GAISLER_DSUCTRL /;"	d
GAISLER_ECC	include/ambapp_ids.h	/^#define GAISLER_ECC /;"	d
GAISLER_EHCI	include/ambapp_ids.h	/^#define GAISLER_EHCI /;"	d
GAISLER_ETHAHB	include/ambapp_ids.h	/^#define GAISLER_ETHAHB /;"	d
GAISLER_ETHMAC	include/ambapp_ids.h	/^#define GAISLER_ETHMAC /;"	d
GAISLER_FTAHBRAM	include/ambapp_ids.h	/^#define GAISLER_FTAHBRAM /;"	d
GAISLER_FTMCTRL	include/ambapp_ids.h	/^#define GAISLER_FTMCTRL /;"	d
GAISLER_FTSDCTRL	include/ambapp_ids.h	/^#define GAISLER_FTSDCTRL /;"	d
GAISLER_FTSDCTRL64	include/ambapp_ids.h	/^#define GAISLER_FTSDCTRL64 /;"	d
GAISLER_FTSRCTRL	include/ambapp_ids.h	/^#define GAISLER_FTSRCTRL /;"	d
GAISLER_FTSRCTRL8	include/ambapp_ids.h	/^#define GAISLER_FTSRCTRL8 /;"	d
GAISLER_GEFFE	include/ambapp_ids.h	/^#define GAISLER_GEFFE /;"	d
GAISLER_GPIO	include/ambapp_ids.h	/^#define GAISLER_GPIO /;"	d
GAISLER_GPREG	include/ambapp_ids.h	/^#define GAISLER_GPREG /;"	d
GAISLER_GPTIMER	include/ambapp_ids.h	/^#define GAISLER_GPTIMER /;"	d
GAISLER_GR1553B	include/ambapp_ids.h	/^#define GAISLER_GR1553B /;"	d
GAISLER_GRACECTRL	include/ambapp_ids.h	/^#define GAISLER_GRACECTRL /;"	d
GAISLER_GRADCDAC	include/ambapp_ids.h	/^#define GAISLER_GRADCDAC /;"	d
GAISLER_GRCAN	include/ambapp_ids.h	/^#define GAISLER_GRCAN /;"	d
GAISLER_GRCTM	include/ambapp_ids.h	/^#define GAISLER_GRCTM /;"	d
GAISLER_GRFIFO	include/ambapp_ids.h	/^#define GAISLER_GRFIFO /;"	d
GAISLER_GRHCAN	include/ambapp_ids.h	/^#define GAISLER_GRHCAN /;"	d
GAISLER_GRIOMMU	include/ambapp_ids.h	/^#define GAISLER_GRIOMMU /;"	d
GAISLER_GRPULSE	include/ambapp_ids.h	/^#define GAISLER_GRPULSE /;"	d
GAISLER_GRPW	include/ambapp_ids.h	/^#define GAISLER_GRPW /;"	d
GAISLER_GRSYSMON	include/ambapp_ids.h	/^#define GAISLER_GRSYSMON /;"	d
GAISLER_GRTC	include/ambapp_ids.h	/^#define GAISLER_GRTC /;"	d
GAISLER_GRTCTX	include/ambapp_ids.h	/^#define GAISLER_GRTCTX /;"	d
GAISLER_GRTESTMOD	include/ambapp_ids.h	/^#define GAISLER_GRTESTMOD /;"	d
GAISLER_GRTIMER	include/ambapp_ids.h	/^#define GAISLER_GRTIMER /;"	d
GAISLER_GRTM	include/ambapp_ids.h	/^#define GAISLER_GRTM /;"	d
GAISLER_GRTMDESC	include/ambapp_ids.h	/^#define GAISLER_GRTMDESC /;"	d
GAISLER_GRTMPAHB	include/ambapp_ids.h	/^#define GAISLER_GRTMPAHB /;"	d
GAISLER_GRTMRX	include/ambapp_ids.h	/^#define GAISLER_GRTMRX /;"	d
GAISLER_GRTMVC	include/ambapp_ids.h	/^#define GAISLER_GRTMVC /;"	d
GAISLER_GRVERSION	include/ambapp_ids.h	/^#define GAISLER_GRVERSION /;"	d
GAISLER_HAPSTRAK	include/ambapp_ids.h	/^#define GAISLER_HAPSTRAK /;"	d
GAISLER_I2CMST	include/ambapp_ids.h	/^#define GAISLER_I2CMST /;"	d
GAISLER_I2CSLV	include/ambapp_ids.h	/^#define GAISLER_I2CSLV /;"	d
GAISLER_IPMVBCTRL	include/ambapp_ids.h	/^#define GAISLER_IPMVBCTRL /;"	d
GAISLER_IRQMP	include/ambapp_ids.h	/^#define GAISLER_IRQMP /;"	d
GAISLER_L2CACHE	include/ambapp_ids.h	/^#define GAISLER_L2CACHE /;"	d
GAISLER_L4STAT	include/ambapp_ids.h	/^#define GAISLER_L4STAT /;"	d
GAISLER_LEON2DSU	include/ambapp_ids.h	/^#define GAISLER_LEON2DSU /;"	d
GAISLER_LEON3	include/ambapp_ids.h	/^#define GAISLER_LEON3 /;"	d
GAISLER_LEON3DSU	include/ambapp_ids.h	/^#define GAISLER_LEON3DSU /;"	d
GAISLER_LEON3FT	include/ambapp_ids.h	/^#define GAISLER_LEON3FT /;"	d
GAISLER_LEON4	include/ambapp_ids.h	/^#define GAISLER_LEON4 /;"	d
GAISLER_LEON4DSU	include/ambapp_ids.h	/^#define GAISLER_LEON4DSU /;"	d
GAISLER_LOGAN	include/ambapp_ids.h	/^#define GAISLER_LOGAN /;"	d
GAISLER_MEMSCRUB	include/ambapp_ids.h	/^#define GAISLER_MEMSCRUB /;"	d
GAISLER_MP7WRAP	include/ambapp_ids.h	/^#define GAISLER_MP7WRAP /;"	d
GAISLER_NUHOSP3	include/ambapp_ids.h	/^#define GAISLER_NUHOSP3 /;"	d
GAISLER_PCIF	include/ambapp_ids.h	/^#define GAISLER_PCIF /;"	d
GAISLER_PCIFBRG	include/ambapp_ids.h	/^#define GAISLER_PCIFBRG /;"	d
GAISLER_PCISBRG	include/ambapp_ids.h	/^#define GAISLER_PCISBRG /;"	d
GAISLER_PCITRACE	include/ambapp_ids.h	/^#define GAISLER_PCITRACE /;"	d
GAISLER_PCITRG	include/ambapp_ids.h	/^#define GAISLER_PCITRG /;"	d
GAISLER_PW2APB	include/ambapp_ids.h	/^#define GAISLER_PW2APB /;"	d
GAISLER_PWM	include/ambapp_ids.h	/^#define GAISLER_PWM /;"	d
GAISLER_SATCAN	include/ambapp_ids.h	/^#define GAISLER_SATCAN /;"	d
GAISLER_SDCTRL	include/ambapp_ids.h	/^#define GAISLER_SDCTRL /;"	d
GAISLER_SDCTRL64	include/ambapp_ids.h	/^#define GAISLER_SDCTRL64 /;"	d
GAISLER_SLINK	include/ambapp_ids.h	/^#define GAISLER_SLINK /;"	d
GAISLER_SPICTRL	include/ambapp_ids.h	/^#define GAISLER_SPICTRL /;"	d
GAISLER_SPIMCTRL	include/ambapp_ids.h	/^#define GAISLER_SPIMCTRL /;"	d
GAISLER_SPW	include/ambapp_ids.h	/^#define GAISLER_SPW /;"	d
GAISLER_SPW2	include/ambapp_ids.h	/^#define GAISLER_SPW2 /;"	d
GAISLER_SPW2_DMA	include/ambapp_ids.h	/^#define GAISLER_SPW2_DMA /;"	d
GAISLER_SPWCUC	include/ambapp_ids.h	/^#define GAISLER_SPWCUC /;"	d
GAISLER_SPWROUTER	include/ambapp_ids.h	/^#define GAISLER_SPWROUTER /;"	d
GAISLER_SRCTRL	include/ambapp_ids.h	/^#define GAISLER_SRCTRL /;"	d
GAISLER_SSRCTRL	include/ambapp_ids.h	/^#define GAISLER_SSRCTRL /;"	d
GAISLER_SVGACTRL	include/ambapp_ids.h	/^#define GAISLER_SVGACTRL /;"	d
GAISLER_SWNODE	include/ambapp_ids.h	/^#define GAISLER_SWNODE /;"	d
GAISLER_T1AHB	include/ambapp_ids.h	/^#define GAISLER_T1AHB /;"	d
GAISLER_TEST_1X2	include/ambapp_ids.h	/^#define GAISLER_TEST_1X2 /;"	d
GAISLER_U16550	include/ambapp_ids.h	/^#define GAISLER_U16550 /;"	d
GAISLER_UHCI	include/ambapp_ids.h	/^#define GAISLER_UHCI /;"	d
GAISLER_USBDC	include/ambapp_ids.h	/^#define GAISLER_USBDC /;"	d
GAISLER_USB_DCL	include/ambapp_ids.h	/^#define GAISLER_USB_DCL /;"	d
GAISLER_VGACTRL	include/ambapp_ids.h	/^#define GAISLER_VGACTRL /;"	d
GAISLER_WILD2AHB	include/ambapp_ids.h	/^#define GAISLER_WILD2AHB /;"	d
GAISLER_devices	cmd/ambapp.c	/^static ambapp_device_name GAISLER_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
GAMEH_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  GAMEH_LPC_EN	/;"	d
GAMEL_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  GAMEL_LPC_EN	/;"	d
GAP	cmd/fdc.c	/^#define GAP	/;"	d	file:
GAS_BUG_12532	arch/arm/config.mk	/^export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \\$/;"	m
GAS_LINE_COMMENT	drivers/bios_emulator/include/x86emu.h	/^#define GAS_LINE_COMMENT	/;"	d
GB	lib/lz4.c	/^#define GB /;"	d	file:
GBC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GBC(/;"	d
GBECONT_RMII0	arch/sh/include/asm/cpu_sh7752.h	/^#define GBECONT_RMII0	/;"	d
GBECONT_RMII0	arch/sh/include/asm/cpu_sh7753.h	/^#define GBECONT_RMII0	/;"	d
GBECONT_RMII0	arch/sh/include/asm/cpu_sh7757.h	/^#define GBECONT_RMII0	/;"	d
GBECONT_RMII1	arch/sh/include/asm/cpu_sh7752.h	/^#define GBECONT_RMII1	/;"	d
GBECONT_RMII1	arch/sh/include/asm/cpu_sh7753.h	/^#define GBECONT_RMII1	/;"	d
GBECONT_RMII1	arch/sh/include/asm/cpu_sh7757.h	/^#define GBECONT_RMII1	/;"	d
GBETH_BASE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GBETH_BASE	/;"	d
GBE_CONFIGURATION_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GBE_CONFIGURATION_REG	/;"	d
GBL_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GBL_EN	/;"	d
GBL_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   GBL_EN	/;"	d
GBL_INT_MASK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define GBL_INT_MASK	/;"	d
GBL_INT_UNMASK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define GBL_INT_UNMASK	/;"	d
GBL_RLS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GBL_RLS	/;"	d
GBL_RLS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   GBL_RLS	/;"	d
GBL_SMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GBL_SMI_EN	/;"	d
GBL_SMI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   GBL_SMI_EN	/;"	d
GBL_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GBL_STS	/;"	d
GBL_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   GBL_STS	/;"	d
GC3000_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define GC3000_BASE_ADDR	/;"	d
GCALL	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define GCALL	/;"	d
GCC_VERSION	include/linux/compiler-gcc.h	/^#define GCC_VERSION /;"	d
GCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCDR(/;"	d
GCDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCDR0	/;"	d
GCDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCDR1	/;"	d
GCDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCDR2	/;"	d
GCDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCDR3	/;"	d
GCFER0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCFER0	/;"	d
GCFER1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCFER1	/;"	d
GCFER2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCFER2	/;"	d
GCFER3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCFER3	/;"	d
GCHD	fs/ubifs/ubifs.h	/^#define GCHD /;"	d
GCK_CSS_AUDIO_CLK	arch/arm/mach-at91/include/mach/clk.h	/^#define GCK_CSS_AUDIO_CLK	/;"	d
GCK_CSS_MAIN_CLK	arch/arm/mach-at91/include/mach/clk.h	/^#define GCK_CSS_MAIN_CLK	/;"	d
GCK_CSS_MCK_CLK	arch/arm/mach-at91/include/mach/clk.h	/^#define GCK_CSS_MCK_CLK	/;"	d
GCK_CSS_PLLA_CLK	arch/arm/mach-at91/include/mach/clk.h	/^#define GCK_CSS_PLLA_CLK	/;"	d
GCK_CSS_SLOW_CLK	arch/arm/mach-at91/include/mach/clk.h	/^#define GCK_CSS_SLOW_CLK	/;"	d
GCK_CSS_UPLL_CLK	arch/arm/mach-at91/include/mach/clk.h	/^#define GCK_CSS_UPLL_CLK	/;"	d
GCLK_DAC_SAMPLE_CLK	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^#define GCLK_DAC_SAMPLE_CLK	/;"	d
GCLK_LCDC_PIXCLK	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^#define GCLK_LCDC_PIXCLK	/;"	d
GCLK_PARENT_OSC0	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^	GCLK_PARENT_OSC0 = 0,$/;"	e	enum:gclk_parent
GCLK_PARENT_OSC1	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^	GCLK_PARENT_OSC1 = 1,$/;"	e	enum:gclk_parent
GCLK_PARENT_PLL0	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^	GCLK_PARENT_PLL0 = 2,$/;"	e	enum:gclk_parent
GCLK_PARENT_PLL1	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^	GCLK_PARENT_PLL1 = 3,$/;"	e	enum:gclk_parent
GCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR	/;"	d
GCR1_M1_DE_RST	include/fsl-mc/fsl_mc.h	/^#define GCR1_M1_DE_RST	/;"	d
GCR1_M2_DE_RST	include/fsl-mc/fsl_mc.h	/^#define GCR1_M2_DE_RST	/;"	d
GCR1_M_ALL_DE_RST	include/fsl-mc/fsl_mc.h	/^#define GCR1_M_ALL_DE_RST	/;"	d
GCR1_P1_DE_RST	include/fsl-mc/fsl_mc.h	/^#define GCR1_P1_DE_RST	/;"	d
GCR1_P1_STOP	include/fsl-mc/fsl_mc.h	/^#define GCR1_P1_STOP	/;"	d
GCR1_P2_DE_RST	include/fsl-mc/fsl_mc.h	/^#define GCR1_P2_DE_RST	/;"	d
GCR1_P2_STOP	include/fsl-mc/fsl_mc.h	/^#define GCR1_P2_STOP	/;"	d
GCRER0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCRER0	/;"	d
GCRER1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCRER1	/;"	d
GCRER2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCRER2	/;"	d
GCRER3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCRER3	/;"	d
GCR_ACLINK_OFF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_ACLINK_OFF	/;"	d
GCR_BASE	arch/mips/include/asm/cm.h	/^#define GCR_BASE	/;"	d
GCR_BASE_UPPER	arch/mips/include/asm/cm.h	/^#define GCR_BASE_UPPER	/;"	d
GCR_CDONE_IE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_CDONE_IE	/;"	d
GCR_COLD_RST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_COLD_RST	/;"	d
GCR_Cx_COHERENCE	arch/mips/include/asm/cm.h	/^#define GCR_Cx_COHERENCE	/;"	d
GCR_Cx_COHERENCE_DOM_EN	arch/mips/include/asm/cm.h	/^#define GCR_Cx_COHERENCE_DOM_EN	/;"	d
GCR_Cx_COHERENCE_EN	arch/mips/include/asm/cm.h	/^#define GCR_Cx_COHERENCE_EN	/;"	d
GCR_GIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_GIE	/;"	d
GCR_L2_CONFIG	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG	/;"	d
GCR_L2_CONFIG_ASSOC_BITS	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_ASSOC_BITS	/;"	d
GCR_L2_CONFIG_ASSOC_SHIFT	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_ASSOC_SHIFT	/;"	d
GCR_L2_CONFIG_BYPASS	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_BYPASS	/;"	d
GCR_L2_CONFIG_LINESZ_BITS	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_LINESZ_BITS	/;"	d
GCR_L2_CONFIG_LINESZ_SHIFT	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_LINESZ_SHIFT	/;"	d
GCR_L2_CONFIG_SETSZ_BITS	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_SETSZ_BITS	/;"	d
GCR_L2_CONFIG_SETSZ_SHIFT	arch/mips/include/asm/cm.h	/^#define GCR_L2_CONFIG_SETSZ_SHIFT	/;"	d
GCR_L2_DATA	arch/mips/include/asm/cm.h	/^#define GCR_L2_DATA	/;"	d
GCR_L2_DATA_UPPER	arch/mips/include/asm/cm.h	/^#define GCR_L2_DATA_UPPER	/;"	d
GCR_L2_TAG_ADDR	arch/mips/include/asm/cm.h	/^#define GCR_L2_TAG_ADDR	/;"	d
GCR_L2_TAG_ADDR_UPPER	arch/mips/include/asm/cm.h	/^#define GCR_L2_TAG_ADDR_UPPER	/;"	d
GCR_L2_TAG_STATE	arch/mips/include/asm/cm.h	/^#define GCR_L2_TAG_STATE	/;"	d
GCR_L2_TAG_STATE_UPPER	arch/mips/include/asm/cm.h	/^#define GCR_L2_TAG_STATE_UPPER	/;"	d
GCR_PRIRDY_IEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_PRIRDY_IEN	/;"	d
GCR_PRIRES_IEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_PRIRES_IEN	/;"	d
GCR_REV	arch/mips/include/asm/cm.h	/^#define GCR_REV	/;"	d
GCR_REV_CM3	arch/mips/include/asm/cm.h	/^#define GCR_REV_CM3	/;"	d
GCR_SDONE_IE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_SDONE_IE	/;"	d
GCR_SECRDY_IEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_SECRDY_IEN	/;"	d
GCR_SECRES_IEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_SECRES_IEN	/;"	d
GCR_WARM_RST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GCR_WARM_RST	/;"	d
GCS	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define GCS	/;"	d
GCS	arch/x86/include/asm/lpc_common.h	/^#define GCS	/;"	d
GCTRL_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define GCTRL_BASE	/;"	d
GC_BC	include/mb862xx.h	/^#define GC_BC	/;"	d
GC_CCF	include/mb862xx.h	/^#define GC_CCF	/;"	d
GC_CID	include/mb862xx.h	/^#define GC_CID	/;"	d
GC_CTR	include/mb862xx.h	/^#define GC_CTR	/;"	d
GC_CXMAX	include/mb862xx.h	/^#define GC_CXMAX	/;"	d
GC_CXMIN	include/mb862xx.h	/^#define GC_CXMIN	/;"	d
GC_CYMAX	include/mb862xx.h	/^#define GC_CYMAX	/;"	d
GC_CYMIN	include/mb862xx.h	/^#define GC_CYMIN	/;"	d
GC_DCM0	include/mb862xx.h	/^#define GC_DCM0	/;"	d
GC_DCM1	include/mb862xx.h	/^#define GC_DCM1	/;"	d
GC_DCM2	include/mb862xx.h	/^#define GC_DCM2	/;"	d
GC_DCM3	include/mb862xx.h	/^#define GC_DCM3	/;"	d
GC_DISP_BASE	include/mb862xx.h	/^#define GC_DISP_BASE	/;"	d
GC_DRAW_BASE	include/mb862xx.h	/^#define GC_DRAW_BASE	/;"	d
GC_FBR	include/mb862xx.h	/^#define GC_FBR	/;"	d
GC_FC	include/mb862xx.h	/^#define GC_FC	/;"	d
GC_FIFO	include/mb862xx.h	/^#define GC_FIFO	/;"	d
GC_GEO_FIFO	include/mb862xx.h	/^#define GC_GEO_FIFO	/;"	d
GC_HDB	include/mb862xx.h	/^#define GC_HDB	/;"	d
GC_HDB_HDP_A	include/mb862xx.h	/^#define GC_HDB_HDP_A	/;"	d
GC_HDP	include/mb862xx.h	/^#define GC_HDP	/;"	d
GC_HOST_BASE	include/mb862xx.h	/^#define GC_HOST_BASE	/;"	d
GC_HSP	include/mb862xx.h	/^#define GC_HSP	/;"	d
GC_HSW	include/mb862xx.h	/^#define GC_HSW	/;"	d
GC_HTP	include/mb862xx.h	/^#define GC_HTP	/;"	d
GC_HTP_A	include/mb862xx.h	/^#define GC_HTP_A	/;"	d
GC_IFCNT	include/mb862xx.h	/^#define GC_IFCNT	/;"	d
GC_L0DA0	include/mb862xx.h	/^#define GC_L0DA0	/;"	d
GC_L0DY_L0DX	include/mb862xx.h	/^#define GC_L0DY_L0DX	/;"	d
GC_L0EM	include/mb862xx.h	/^#define GC_L0EM	/;"	d
GC_L0M	include/mb862xx.h	/^#define GC_L0M	/;"	d
GC_L0OA0	include/mb862xx.h	/^#define GC_L0OA0	/;"	d
GC_L0PAL0	include/mb862xx.h	/^#define GC_L0PAL0	/;"	d
GC_L0WH_L0WW	include/mb862xx.h	/^#define GC_L0WH_L0WW	/;"	d
GC_L0WY_L0WX	include/mb862xx.h	/^#define GC_L0WY_L0WX	/;"	d
GC_L2DA0	include/mb862xx.h	/^#define GC_L2DA0	/;"	d
GC_L2DA1	include/mb862xx.h	/^#define GC_L2DA1	/;"	d
GC_L2DX	include/mb862xx.h	/^#define GC_L2DX	/;"	d
GC_L2DY	include/mb862xx.h	/^#define GC_L2DY	/;"	d
GC_L2EM	include/mb862xx.h	/^#define GC_L2EM	/;"	d
GC_L2M	include/mb862xx.h	/^#define GC_L2M	/;"	d
GC_L2OA0	include/mb862xx.h	/^#define GC_L2OA0	/;"	d
GC_L2OA1	include/mb862xx.h	/^#define GC_L2OA1	/;"	d
GC_L2WH	include/mb862xx.h	/^#define GC_L2WH	/;"	d
GC_L2WW	include/mb862xx.h	/^#define GC_L2WW	/;"	d
GC_L2WX	include/mb862xx.h	/^#define GC_L2WX	/;"	d
GC_L2WY	include/mb862xx.h	/^#define GC_L2WY	/;"	d
GC_MMR	include/mb862xx.h	/^#define GC_MMR	/;"	d
GC_PFP	include/usb/ehci-ci.h	/^#define GC_PFP	/;"	d
GC_PPP	include/usb/ehci-ci.h	/^#define GC_PPP	/;"	d
GC_REV	include/mb862xx.h	/^#define GC_REV	/;"	d
GC_SRST	include/mb862xx.h	/^#define GC_SRST	/;"	d
GC_ULPI_SEL	include/usb/ehci-ci.h	/^#define GC_ULPI_SEL	/;"	d
GC_VDP	include/mb862xx.h	/^#define GC_VDP	/;"	d
GC_VDP_VSP_A	include/mb862xx.h	/^#define GC_VDP_VSP_A	/;"	d
GC_VSP	include/mb862xx.h	/^#define GC_VSP	/;"	d
GC_VSW	include/mb862xx.h	/^#define GC_VSW	/;"	d
GC_VSW_HSW_HSP_A	include/mb862xx.h	/^#define GC_VSW_HSW_HSP_A	/;"	d
GC_VTR	include/mb862xx.h	/^#define GC_VTR	/;"	d
GC_VTR_A	include/mb862xx.h	/^#define GC_VTR_A	/;"	d
GC_WH_WW	include/mb862xx.h	/^#define GC_WH_WW	/;"	d
GC_WU_IE	include/usb/ehci-ci.h	/^#define GC_WU_IE	/;"	d
GC_WU_INT_CLR	include/usb/ehci-ci.h	/^#define GC_WU_INT_CLR	/;"	d
GC_WU_ULPI_EN	include/usb/ehci-ci.h	/^#define GC_WU_ULPI_EN	/;"	d
GC_WY_WX	include/mb862xx.h	/^#define GC_WY_WX	/;"	d
GC_XRES	include/mb862xx.h	/^#define GC_XRES	/;"	d
GDAC_IB_UPALL	drivers/usb/eth/r8152.h	/^#define GDAC_IB_UPALL	/;"	d
GDB_ADJUSTS_BREAK_OFFSET	arch/blackfin/lib/kgdb.h	/^#define GDB_ADJUSTS_BREAK_OFFSET$/;"	d
GDB_SKIP_HW_WATCH_TEST	arch/blackfin/lib/kgdb.h	/^#define GDB_SKIP_HW_WATCH_TEST$/;"	d
GDC_HOST_BASE	post/board/lwmon5/gdc.c	/^#define GDC_HOST_BASE	/;"	d	file:
GDC_RAM_END	post/board/lwmon5/gdc.c	/^#define GDC_RAM_END	/;"	d	file:
GDC_RAM_SIZE	post/board/lwmon5/gdc.c	/^#define GDC_RAM_SIZE	/;"	d	file:
GDC_RAM_START	post/board/lwmon5/gdc.c	/^#define GDC_RAM_START	/;"	d	file:
GDC_SCRATCH_REG	post/board/lwmon5/gdc.c	/^#define GDC_SCRATCH_REG	/;"	d	file:
GDC_VERSION_REG	post/board/lwmon5/gdc.c	/^#define GDC_VERSION_REG	/;"	d	file:
GDF_15BIT_555RGB	include/video_fb.h	/^#define GDF_15BIT_555RGB /;"	d
GDF_16BIT_565RGB	include/video_fb.h	/^#define GDF_16BIT_565RGB /;"	d
GDF_24BIT_888RGB	include/video_fb.h	/^#define GDF_24BIT_888RGB /;"	d
GDF_32BIT_X888RGB	include/video_fb.h	/^#define GDF_32BIT_X888RGB /;"	d
GDF__8BIT_332RGB	include/video_fb.h	/^#define GDF__8BIT_332RGB /;"	d
GDF__8BIT_INDEX	include/video_fb.h	/^#define GDF__8BIT_INDEX /;"	d
GDL_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define GDL_RATIO	/;"	d
GDL_RATIO	board/samsung/trats/setup.h	/^#define GDL_RATIO	/;"	d
GDR_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define GDR_RATIO	/;"	d
GDR_RATIO	board/samsung/trats/setup.h	/^#define GDR_RATIO	/;"	d
GDT_32BIT	arch/x86/include/asm/cpu.h	/^	GDT_32BIT		= 1ULL << 54,$/;"	e	enum:__anonc0d388680203
GDT_4KB	arch/x86/include/asm/cpu.h	/^	GDT_4KB			= 1ULL << 55,$/;"	e	enum:__anonc0d388680203
GDT_BASE_HIGH_MASK	arch/x86/include/asm/cpu.h	/^	GDT_BASE_HIGH_MASK	= 0xf,$/;"	e	enum:__anonc0d388680203
GDT_BASE_HIGH_SHIFT	arch/x86/include/asm/cpu.h	/^	GDT_BASE_HIGH_SHIFT	= 56,$/;"	e	enum:__anonc0d388680203
GDT_BASE_LOW_MASK	arch/x86/include/asm/cpu.h	/^	GDT_BASE_LOW_MASK	= 0xffff,$/;"	e	enum:__anonc0d388680203
GDT_BASE_LOW_SHIFT	arch/x86/include/asm/cpu.h	/^	GDT_BASE_LOW_SHIFT	= 16,$/;"	e	enum:__anonc0d388680203
GDT_CODE	arch/x86/include/asm/cpu.h	/^	GDT_CODE		= 1ULL << 43,$/;"	e	enum:__anonc0d388680203
GDT_ENTRY	arch/x86/cpu/cpu.c	/^#define GDT_ENTRY(/;"	d	file:
GDT_LIMIT_HIGH_MASK	arch/x86/include/asm/cpu.h	/^	GDT_LIMIT_HIGH_MASK	= 0xf,$/;"	e	enum:__anonc0d388680203
GDT_LIMIT_HIGH_SHIFT	arch/x86/include/asm/cpu.h	/^	GDT_LIMIT_HIGH_SHIFT	= 48,$/;"	e	enum:__anonc0d388680203
GDT_LIMIT_LOW_MASK	arch/x86/include/asm/cpu.h	/^	GDT_LIMIT_LOW_MASK	= 0xffff,$/;"	e	enum:__anonc0d388680203
GDT_LIMIT_LOW_SHIFT	arch/x86/include/asm/cpu.h	/^	GDT_LIMIT_LOW_SHIFT	= 0,$/;"	e	enum:__anonc0d388680203
GDT_LONG	arch/x86/include/asm/cpu.h	/^	GDT_LONG		= 1ULL << 53,$/;"	e	enum:__anonc0d388680203
GDT_NOTSYS	arch/x86/include/asm/cpu.h	/^	GDT_NOTSYS		= 1ULL << 44,$/;"	e	enum:__anonc0d388680203
GDT_PRESENT	arch/x86/include/asm/cpu.h	/^	GDT_PRESENT		= 1ULL << 47,$/;"	e	enum:__anonc0d388680203
GDXCBAR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GDXCBAR	/;"	d
GDXC_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define GDXC_BASE_ADDRESS	/;"	d
GDXC_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define GDXC_BASE_SIZE	/;"	d
GD_BD	include/generated/generic-asm-offsets.h	/^#define GD_BD /;"	d
GD_FLG_COLD_BOOT	arch/x86/include/asm/global_data.h	/^#define GD_FLG_COLD_BOOT	/;"	d
GD_FLG_DEVINIT	include/asm-generic/global_data.h	/^#define GD_FLG_DEVINIT	/;"	d
GD_FLG_DISABLE_CONSOLE	include/asm-generic/global_data.h	/^#define GD_FLG_DISABLE_CONSOLE	/;"	d
GD_FLG_ENV_DEFAULT	include/asm-generic/global_data.h	/^#define GD_FLG_ENV_DEFAULT	/;"	d
GD_FLG_ENV_READY	include/asm-generic/global_data.h	/^#define GD_FLG_ENV_READY	/;"	d
GD_FLG_FULL_MALLOC_INIT	include/asm-generic/global_data.h	/^#define GD_FLG_FULL_MALLOC_INIT	/;"	d
GD_FLG_LOGINIT	include/asm-generic/global_data.h	/^#define GD_FLG_LOGINIT	/;"	d
GD_FLG_POSTFAIL	include/asm-generic/global_data.h	/^#define GD_FLG_POSTFAIL	/;"	d
GD_FLG_POSTSTOP	include/asm-generic/global_data.h	/^#define GD_FLG_POSTSTOP	/;"	d
GD_FLG_RECORD	include/asm-generic/global_data.h	/^#define GD_FLG_RECORD	/;"	d
GD_FLG_RELOC	include/asm-generic/global_data.h	/^#define GD_FLG_RELOC	/;"	d
GD_FLG_SERIAL_READY	include/asm-generic/global_data.h	/^#define GD_FLG_SERIAL_READY	/;"	d
GD_FLG_SILENT	include/asm-generic/global_data.h	/^#define GD_FLG_SILENT	/;"	d
GD_FLG_SKIP_RELOC	include/asm-generic/global_data.h	/^#define GD_FLG_SKIP_RELOC	/;"	d
GD_FLG_SPL_INIT	include/asm-generic/global_data.h	/^#define GD_FLG_SPL_INIT	/;"	d
GD_FLG_WARM_BOOT	arch/x86/include/asm/global_data.h	/^#define GD_FLG_WARM_BOOT	/;"	d
GD_MALLOC_BASE	include/generated/generic-asm-offsets.h	/^#define GD_MALLOC_BASE /;"	d
GD_RELOCADDR	include/generated/generic-asm-offsets.h	/^#define GD_RELOCADDR /;"	d
GD_RELOC_OFF	include/generated/generic-asm-offsets.h	/^#define GD_RELOC_OFF /;"	d
GD_SIZE	include/generated/generic-asm-offsets.h	/^#define GD_SIZE /;"	d
GD_START_ADDR_SP	include/generated/generic-asm-offsets.h	/^#define GD_START_ADDR_SP /;"	d
GE	cmd/itest.c	/^#define GE	/;"	d	file:
GE0_CLK125	board/freescale/ls1021aqds/ls1021aqds.c	/^	GE0_CLK125,$/;"	e	enum:__anone5b89d2d0203	file:
GE0_PUP_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define GE0_PUP_EN	/;"	d
GE1_CLK125	board/freescale/ls1021aqds/ls1021aqds.c	/^	GE1_CLK125,$/;"	e	enum:__anone5b89d2d0203	file:
GE1_PUP_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define GE1_PUP_EN	/;"	d
GE2_CLK125	board/freescale/ls1021aqds/ls1021aqds.c	/^	GE2_CLK125,$/;"	e	enum:__anone5b89d2d0203	file:
GECMR	drivers/net/sh_eth.h	/^	GECMR,$/;"	e	enum:__anon5ef54f5a0103
GECMR_1000B	drivers/net/sh_eth.h	/^	GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,$/;"	e	enum:GECMR_BIT
GECMR_100B	drivers/net/sh_eth.h	/^	GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,$/;"	e	enum:GECMR_BIT
GECMR_10B	drivers/net/sh_eth.h	/^	GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,$/;"	e	enum:GECMR_BIT
GECMR_BIT	drivers/net/sh_eth.h	/^enum GECMR_BIT {$/;"	g
GEDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GEDR(/;"	d
GEDR	include/SA-1100.h	/^#define GEDR	/;"	d
GEDR	include/SA-1100.h	/^#define GEDR /;"	d
GEDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GEDR0	/;"	d
GEDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GEDR1	/;"	d
GEDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GEDR2	/;"	d
GEDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GEDR3	/;"	d
GEM_BF	drivers/net/macb.h	/^#define GEM_BF(/;"	d
GEM_BFEXT	drivers/net/macb.h	/^#define GEM_BFEXT(/;"	d
GEM_BFINS	drivers/net/macb.h	/^#define GEM_BFINS(/;"	d
GEM_BIT	drivers/net/macb.h	/^#define GEM_BIT(/;"	d
GEM_CLK_DIV16	drivers/net/macb.h	/^#define GEM_CLK_DIV16	/;"	d
GEM_CLK_DIV32	drivers/net/macb.h	/^#define GEM_CLK_DIV32	/;"	d
GEM_CLK_DIV48	drivers/net/macb.h	/^#define GEM_CLK_DIV48	/;"	d
GEM_CLK_DIV64	drivers/net/macb.h	/^#define GEM_CLK_DIV64	/;"	d
GEM_CLK_DIV8	drivers/net/macb.h	/^#define GEM_CLK_DIV8	/;"	d
GEM_CLK_DIV96	drivers/net/macb.h	/^#define GEM_CLK_DIV96	/;"	d
GEM_CLK_OFFSET	drivers/net/macb.h	/^#define GEM_CLK_OFFSET	/;"	d
GEM_CLK_SIZE	drivers/net/macb.h	/^#define GEM_CLK_SIZE	/;"	d
GEM_DBW128	drivers/net/macb.h	/^#define GEM_DBW128	/;"	d
GEM_DBW32	drivers/net/macb.h	/^#define GEM_DBW32	/;"	d
GEM_DBW64	drivers/net/macb.h	/^#define GEM_DBW64	/;"	d
GEM_DBWDEF_OFFSET	drivers/net/macb.h	/^#define GEM_DBWDEF_OFFSET	/;"	d
GEM_DBWDEF_SIZE	drivers/net/macb.h	/^#define GEM_DBWDEF_SIZE	/;"	d
GEM_DBW_OFFSET	drivers/net/macb.h	/^#define GEM_DBW_OFFSET	/;"	d
GEM_DBW_SIZE	drivers/net/macb.h	/^#define GEM_DBW_SIZE	/;"	d
GEM_DCFG1	drivers/net/macb.h	/^#define GEM_DCFG1	/;"	d
GEM_DCFG6	drivers/net/macb.h	/^#define GEM_DCFG6	/;"	d
GEM_GBE_OFFSET	drivers/net/macb.h	/^#define GEM_GBE_OFFSET	/;"	d
GEM_GBE_SIZE	drivers/net/macb.h	/^#define GEM_GBE_SIZE	/;"	d
GEM_RGMII_OFFSET	drivers/net/macb.h	/^#define GEM_RGMII_OFFSET	/;"	d
GEM_RGMII_SIZE	drivers/net/macb.h	/^#define GEM_RGMII_SIZE	/;"	d
GEM_TBQP	drivers/net/macb.h	/^#define GEM_TBQP(/;"	d
GEM_UR	drivers/net/macb.h	/^#define GEM_UR	/;"	d
GEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	GEN	/;"	d
GEN	include/sym53c8xx.h	/^  #define   GEN /;"	d
GEN2_SESS_VLD_CTRL_EN	drivers/usb/host/ehci-msm.c	/^#define GEN2_SESS_VLD_CTRL_EN /;"	d	file:
GEN2_SETTING_2_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define GEN2_SETTING_2_ADDR(/;"	d
GEN2_SETTING_3_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define GEN2_SETTING_3_ADDR(/;"	d
GENERAL_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define GENERAL_ACT_REQ	/;"	d
GENERAL_PURPOSE_RESERVED0_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GENERAL_PURPOSE_RESERVED0_REG	/;"	d
GENERAL_PURPOSE_RESERVED0_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GENERAL_PURPOSE_RESERVED0_REG	/;"	d
GENERAL_PURPOSE_RESERVED0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define GENERAL_PURPOSE_RESERVED0_REG	/;"	d
GENERAL_STATUS	drivers/usb/eth/asix88179.c	/^#define GENERAL_STATUS	/;"	d	file:
GENERAL_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define GENERAL_UPDATE	/;"	d
GENERATED_BD_INFO_SIZE	include/generated/generic-asm-offsets.h	/^#define GENERATED_BD_INFO_SIZE /;"	d
GENERATED_GBL_DATA_SIZE	include/generated/generic-asm-offsets.h	/^#define GENERATED_GBL_DATA_SIZE /;"	d
GENERATED_MAX_DIV	drivers/clk/at91/clk-generated.c	/^#define GENERATED_MAX_DIV	/;"	d	file:
GENERATED_SOURCE_MAX	drivers/clk/at91/clk-generated.c	/^#define GENERATED_SOURCE_MAX	/;"	d	file:
GENERATE_ACPI_TABLE	arch/x86/Kconfig	/^config GENERATE_ACPI_TABLE$/;"	c	menu:x86 architecture""System tables
GENERATE_ENUM	arch/arm/mach-keystone/include/mach/clock.h	/^#define GENERATE_ENUM(/;"	d
GENERATE_INDX_STR	arch/arm/mach-keystone/include/mach/clock.h	/^#define GENERATE_INDX_STR(/;"	d
GENERATE_MP_TABLE	arch/x86/Kconfig	/^config GENERATE_MP_TABLE$/;"	c	menu:x86 architecture""System tables
GENERATE_PIRQ_TABLE	arch/x86/Kconfig	/^config GENERATE_PIRQ_TABLE$/;"	c	menu:x86 architecture""System tables
GENERATE_SFI_TABLE	arch/x86/Kconfig	/^config GENERATE_SFI_TABLE$/;"	c	menu:x86 architecture""System tables
GENERATE_SMBIOS_TABLE	lib/Kconfig	/^config GENERATE_SMBIOS_TABLE$/;"	c	menu:Library routines""System tables
GENERATION	board/cm5200/cm5200.h	/^	GENERATION,		\/* 1 *\/$/;"	e	enum:__anonb595836f0103
GENERATION_DIVIDER_FORCE_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GENERATION_DIVIDER_FORCE_REG	/;"	d
GENERATION_LEN	board/cm5200/cm5200.h	/^#define GENERATION_LEN	/;"	d
GENERATION_OFFSET	board/cm5200/cm5200.h	/^#define GENERATION_OFFSET	/;"	d
GENERIC_TIMER_CLK	include/configs/ls1021aqds.h	/^#define GENERIC_TIMER_CLK	/;"	d
GENERIC_TIMER_CLK	include/configs/ls1021atwr.h	/^#define GENERIC_TIMER_CLK	/;"	d
GENMASK	include/linux/bitops.h	/^#define GENMASK(/;"	d
GENMASK_ULL	include/linux/bitops.h	/^#define GENMASK_ULL(/;"	d
GEN_74X164_NUMBER_GPIOS	drivers/gpio/74x164_gpio.c	/^#define GEN_74X164_NUMBER_GPIOS /;"	d	file:
GEN_ABS	board/mpl/pati/pati.c	/^#define GEN_ABS(/;"	d	file:
GEN_ABS	common/env_embedded.c	/^#define GEN_ABS(/;"	d	file:
GEN_BB_READ	include/bouncebuf.h	/^#define GEN_BB_READ	/;"	d
GEN_BB_RW	include/bouncebuf.h	/^#define GEN_BB_RW	/;"	d
GEN_BB_WRITE	include/bouncebuf.h	/^#define GEN_BB_WRITE	/;"	d
GEN_DEC_RANGE_128B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_128B	/;"	d
GEN_DEC_RANGE_16B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_16B	/;"	d
GEN_DEC_RANGE_256B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_256B	/;"	d
GEN_DEC_RANGE_32B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_32B	/;"	d
GEN_DEC_RANGE_4B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_4B	/;"	d
GEN_DEC_RANGE_64B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_64B	/;"	d
GEN_DEC_RANGE_8B	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_8B	/;"	d
GEN_DEC_RANGE_EN	arch/x86/include/asm/lpc_common.h	/^#define  GEN_DEC_RANGE_EN	/;"	d
GEN_INT_CNTL	include/radeon.h	/^#define GEN_INT_CNTL	/;"	d
GEN_INT_STATUS	include/radeon.h	/^#define GEN_INT_STATUS	/;"	d
GEN_PMCON_1	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define GEN_PMCON_1	/;"	d
GEN_PMCON_1	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GEN_PMCON_1	/;"	d
GEN_PMCON_1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GEN_PMCON_1	/;"	d
GEN_PMCON_2	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define GEN_PMCON_2	/;"	d
GEN_PMCON_2	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GEN_PMCON_2	/;"	d
GEN_PMCON_2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GEN_PMCON_2	/;"	d
GEN_PMCON_3	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define GEN_PMCON_3	/;"	d
GEN_PMCON_3	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GEN_PMCON_3	/;"	d
GEN_PMCON_3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GEN_PMCON_3	/;"	d
GEN_PMCON_LOCK	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define GEN_PMCON_LOCK	/;"	d
GEN_PMCON_LOCK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GEN_PMCON_LOCK	/;"	d
GEN_PURP_RES_1_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GEN_PURP_RES_1_REG	/;"	d
GEN_PURP_RES_2_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GEN_PURP_RES_2_REG	/;"	d
GEN_RST_STS	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  GEN_RST_STS	/;"	d
GEN_RST_STS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  GEN_RST_STS	/;"	d
GEN_SET_VALUE	common/env_embedded.c	/^# define GEN_SET_VALUE(/;"	d	file:
GEN_SYMNAME	board/mpl/pati/pati.c	/^#define GEN_SYMNAME(/;"	d	file:
GEN_SYMNAME	common/env_embedded.c	/^#define GEN_SYMNAME(/;"	d	file:
GEN_VALUE	board/mpl/pati/pati.c	/^#define GEN_VALUE(/;"	d	file:
GEN_VALUE	common/env_embedded.c	/^#define GEN_VALUE(/;"	d	file:
GET	arch/microblaze/include/asm/asm.h	/^#define GET(/;"	d
GETBIT	arch/powerpc/cpu/mpc8xx/video.c	/^#define GETBIT(/;"	d	file:
GETCODEDATA1	board/bf533-ezkit/flash-defines.h	/^#define GETCODEDATA1	/;"	d
GETCODEDATA2	board/bf533-ezkit/flash-defines.h	/^#define GETCODEDATA2	/;"	d
GETCODEDATA3	board/bf533-ezkit/flash-defines.h	/^#define GETCODEDATA3	/;"	d
GETDEVICEPARAMETERS	include/linux/edd.h	/^#define GETDEVICEPARAMETERS /;"	d
GETHER0_MAC_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define GETHER0_MAC_BASE	/;"	d
GETHER0_MAC_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define GETHER0_MAC_BASE	/;"	d
GETHER0_MAC_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define GETHER0_MAC_BASE	/;"	d
GETHER1_MAC_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define GETHER1_MAC_BASE	/;"	d
GETHER1_MAC_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define GETHER1_MAC_BASE	/;"	d
GETHER1_MAC_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define GETHER1_MAC_BASE	/;"	d
GETHER_CONTROL_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define GETHER_CONTROL_BASE	/;"	d
GETHER_CONTROL_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define GETHER_CONTROL_BASE	/;"	d
GETHER_CONTROL_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define GETHER_CONTROL_BASE	/;"	d
GETHER_MSTP309	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define GETHER_MSTP309	/;"	d	file:
GETREGSP	arch/sparc/cpu/leon2/prom.c	/^#define GETREGSP(/;"	d	file:
GETREGSP	arch/sparc/cpu/leon3/prom.c	/^#define GETREGSP(/;"	d	file:
GET_BAR	include/bedbug/regs.h	/^#define  GET_BAR(/;"	d
GET_BIT	include/edid.h	/^#define GET_BIT(/;"	d
GET_BIT	lib/bzip2/bzlib_decompress.c	/^#define GET_BIT(/;"	d	file:
GET_BIT	lib/lzma/LzmaDec.c	/^#define GET_BIT(/;"	d	file:
GET_BIT2	lib/lzma/LzmaDec.c	/^#define GET_BIT2(/;"	d	file:
GET_BIT2_CHECK	lib/lzma/LzmaDec.c	/^#define GET_BIT2_CHECK(/;"	d	file:
GET_BITS	include/edid.h	/^#define GET_BITS(/;"	d
GET_BITS	lib/bzip2/bzlib_decompress.c	/^#define GET_BITS(/;"	d	file:
GET_BIT_CHECK	lib/lzma/LzmaDec.c	/^#define GET_BIT_CHECK(/;"	d	file:
GET_BLOCK_ID_MAX_FREQ	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define GET_BLOCK_ID_MAX_FREQ(/;"	d
GET_BUS_NUM	cmd/i2c.c	/^#define GET_BUS_NUM	/;"	d	file:
GET_CCR0	include/bedbug/regs.h	/^#define  GET_CCR0(/;"	d
GET_CMPA	include/bedbug/regs.h	/^#define	 GET_CMPA(/;"	d
GET_CMPB	include/bedbug/regs.h	/^#define	 GET_CMPB(/;"	d
GET_CMPC	include/bedbug/regs.h	/^#define	 GET_CMPC(/;"	d
GET_CMPD	include/bedbug/regs.h	/^#define	 GET_CMPD(/;"	d
GET_CMPE	include/bedbug/regs.h	/^#define	 GET_CMPE(/;"	d
GET_CMPF	include/bedbug/regs.h	/^#define	 GET_CMPF(/;"	d
GET_CMPG	include/bedbug/regs.h	/^#define	 GET_CMPG(/;"	d
GET_CMPH	include/bedbug/regs.h	/^#define	 GET_CMPH(/;"	d
GET_CODES	board/bf533-ezkit/flash-defines.h	/^#define GET_CODES	/;"	d
GET_COMP_CODE	drivers/usb/host/xhci.h	/^#define GET_COMP_CODE(/;"	d
GET_COUNTA	include/bedbug/regs.h	/^#define	 GET_COUNTA(/;"	d
GET_COUNTB	include/bedbug/regs.h	/^#define	 GET_COUNTB(/;"	d
GET_CR	include/bedbug/regs.h	/^#define	 GET_CR(/;"	d
GET_CS_FROM_MASK	drivers/ddr/marvell/a38x/ddr3_training.c	/^#define GET_CS_FROM_MASK(/;"	d	file:
GET_CTR	include/bedbug/regs.h	/^#define	 GET_CTR(/;"	d
GET_DAC1	include/bedbug/regs.h	/^#define	 GET_DAC1(/;"	d
GET_DAC2	include/bedbug/regs.h	/^#define	 GET_DAC2(/;"	d
GET_DAR	include/bedbug/regs.h	/^#define	 GET_DAR(/;"	d
GET_DBCR0	include/bedbug/regs.h	/^#define	 GET_DBCR0(/;"	d
GET_DBCR1	include/bedbug/regs.h	/^#define	 GET_DBCR1(/;"	d
GET_DBSR	include/bedbug/regs.h	/^#define	 GET_DBSR(/;"	d
GET_DCCR	include/bedbug/regs.h	/^#define	 GET_DCCR(/;"	d
GET_DCWR	include/bedbug/regs.h	/^#define	 GET_DCWR(/;"	d
GET_DC_ADR	include/bedbug/regs.h	/^#define  GET_DC_ADR(/;"	d
GET_DC_CST	include/bedbug/regs.h	/^#define  GET_DC_CST(/;"	d
GET_DC_DAT	include/bedbug/regs.h	/^#define  GET_DC_DAT(/;"	d
GET_DEAR	include/bedbug/regs.h	/^#define	 GET_DEAR(/;"	d
GET_DEC	include/bedbug/regs.h	/^#define	 GET_DEC(/;"	d
GET_DER	include/bedbug/regs.h	/^#define	 GET_DER(/;"	d
GET_DPDR	include/bedbug/regs.h	/^#define  GET_DPDR(/;"	d
GET_DSISR	include/bedbug/regs.h	/^#define	 GET_DSISR(/;"	d
GET_DVC1	include/bedbug/regs.h	/^#define	 GET_DVC1(/;"	d
GET_DVC2	include/bedbug/regs.h	/^#define	 GET_DVC2(/;"	d
GET_EAR	include/bedbug/regs.h	/^#define  GET_EAR(/;"	d
GET_EID	include/bedbug/regs.h	/^#define	 GET_EID(/;"	d
GET_EIE	include/bedbug/regs.h	/^#define	 GET_EIE(/;"	d
GET_ENDPOINT	drivers/usb/musb/musb_udc.c	/^#define GET_ENDPOINT(/;"	d	file:
GET_ESR	include/bedbug/regs.h	/^#define	 GET_ESR(/;"	d
GET_EVPR	include/bedbug/regs.h	/^#define	 GET_EVPR(/;"	d
GET_GPIO	arch/blackfin/cpu/gpio.c	/^#define GET_GPIO(/;"	d	file:
GET_GPIO_P	arch/blackfin/cpu/gpio.c	/^#define GET_GPIO_P(/;"	d	file:
GET_IABR	include/bedbug/regs.h	/^#define	 GET_IABR(/;"	d
GET_IAC1	include/bedbug/regs.h	/^#define	 GET_IAC1(/;"	d
GET_IAC2	include/bedbug/regs.h	/^#define	 GET_IAC2(/;"	d
GET_IAC3	include/bedbug/regs.h	/^#define	 GET_IAC3(/;"	d
GET_IAC4	include/bedbug/regs.h	/^#define	 GET_IAC4(/;"	d
GET_ICCR	include/bedbug/regs.h	/^#define	 GET_ICCR(/;"	d
GET_ICDBDR	include/bedbug/regs.h	/^#define	 GET_ICDBDR(/;"	d
GET_ICR	include/bedbug/regs.h	/^#define	 GET_ICR(/;"	d
GET_ICTRL	include/bedbug/regs.h	/^#define  GET_ICTRL(/;"	d
GET_IC_ADR	include/bedbug/regs.h	/^#define  GET_IC_ADR(/;"	d
GET_IC_CST	include/bedbug/regs.h	/^#define  GET_IC_CST(/;"	d
GET_IC_DAT	include/bedbug/regs.h	/^#define  GET_IC_DAT(/;"	d
GET_IMMR	include/bedbug/regs.h	/^#define  GET_IMMR(/;"	d
GET_INITRD_START	arch/sh/lib/bootm.c	/^#define GET_INITRD_START(/;"	d	file:
GET_INTR_TARGET	drivers/usb/host/xhci.h	/^#define GET_INTR_TARGET(/;"	d
GET_LAPIC_DEST_FIELD	arch/x86/include/asm/lapic.h	/^#define GET_LAPIC_DEST_FIELD(/;"	d
GET_LCTRL1	include/bedbug/regs.h	/^#define  GET_LCTRL1(/;"	d
GET_LCTRL2	include/bedbug/regs.h	/^#define  GET_LCTRL2(/;"	d
GET_LL	lib/bzip2/bzlib_private.h	/^#define GET_LL(/;"	d
GET_LL4	lib/bzip2/bzlib_private.h	/^#define GET_LL4(/;"	d
GET_LOCK_RESULT	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define GET_LOCK_RESULT(/;"	d
GET_LR	include/bedbug/regs.h	/^#define	 GET_LR(/;"	d
GET_MAX	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define GET_MAX(/;"	d
GET_MAX_LUN_REQUEST	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^#define GET_MAX_LUN_REQUEST	/;"	d	file:
GET_MAX_PACKET	drivers/usb/host/xhci.h	/^#define GET_MAX_PACKET(/;"	d
GET_MAX_VALUE	drivers/ddr/marvell/a38x/ddr3_training.c	/^#define GET_MAX_VALUE(/;"	d	file:
GET_MD_AP	include/bedbug/regs.h	/^#define  GET_MD_AP(/;"	d
GET_MD_CTR	include/bedbug/regs.h	/^#define  GET_MD_CTR(/;"	d
GET_MD_DBCAM	include/bedbug/regs.h	/^#define  GET_MD_DBCAM(/;"	d
GET_MD_DBRAM0	include/bedbug/regs.h	/^#define  GET_MD_DBRAM0(/;"	d
GET_MD_DBRAM1	include/bedbug/regs.h	/^#define  GET_MD_DBRAM1(/;"	d
GET_MD_EPN	include/bedbug/regs.h	/^#define  GET_MD_EPN(/;"	d
GET_MD_RPN	include/bedbug/regs.h	/^#define  GET_MD_RPN(/;"	d
GET_MD_TWC	include/bedbug/regs.h	/^#define  GET_MD_TWC(/;"	d
GET_MIN	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define GET_MIN(/;"	d
GET_MI_AP	include/bedbug/regs.h	/^#define  GET_MI_AP(/;"	d
GET_MI_CTR	include/bedbug/regs.h	/^#define  GET_MI_CTR(/;"	d
GET_MI_DBCAM	include/bedbug/regs.h	/^#define  GET_MI_DBCAM(/;"	d
GET_MI_DBRAM0	include/bedbug/regs.h	/^#define  GET_MI_DBRAM0(/;"	d
GET_MI_DBRAM1	include/bedbug/regs.h	/^#define  GET_MI_DBRAM1(/;"	d
GET_MI_EPN	include/bedbug/regs.h	/^#define  GET_MI_EPN(/;"	d
GET_MI_RPN	include/bedbug/regs.h	/^#define  GET_MI_RPN(/;"	d
GET_MI_TWC	include/bedbug/regs.h	/^#define  GET_MI_TWC(/;"	d
GET_MSR	include/bedbug/regs.h	/^#define	 GET_MSR(/;"	d
GET_MTF_VAL	lib/bzip2/bzlib_decompress.c	/^#define GET_MTF_VAL(/;"	d	file:
GET_M_CASID	include/bedbug/regs.h	/^#define  GET_M_CASID(/;"	d
GET_M_TW	include/bedbug/regs.h	/^#define  GET_M_TW(/;"	d
GET_M_TWB	include/bedbug/regs.h	/^#define  GET_M_TWB(/;"	d
GET_OPCD	include/bedbug/ppc.h	/^#define GET_OPCD(/;"	d
GET_OPTION	drivers/video/videomodes.c	/^#define GET_OPTION(/;"	d	file:
GET_PDR0_CSI_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_CSI_PODF(/;"	d
GET_PDR0_CSI_PRDF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_CSI_PRDF(/;"	d
GET_PDR0_HSP_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_HSP_PODF(/;"	d
GET_PDR0_IPG_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_IPG_PODF(/;"	d
GET_PDR0_MAX_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_MAX_PODF(/;"	d
GET_PDR0_MCU_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_MCU_PODF(/;"	d
GET_PDR0_NFC_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_NFC_PODF(/;"	d
GET_PDR0_PER_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PDR0_PER_PODF(/;"	d
GET_PID	include/bedbug/regs.h	/^#define  GET_PID(/;"	d
GET_PIT	include/bedbug/regs.h	/^#define	 GET_PIT(/;"	d
GET_PLL_MFD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PLL_MFD(/;"	d
GET_PLL_MFI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PLL_MFI(/;"	d
GET_PLL_MFN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PLL_MFN(/;"	d
GET_PLL_PD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GET_PLL_PD(/;"	d
GET_PORT_ID	drivers/usb/host/xhci.h	/^#define GET_PORT_ID(/;"	d
GET_PRIV	drivers/net/ep93xx_eth.c	/^#define GET_PRIV(/;"	d	file:
GET_PVR	include/bedbug/regs.h	/^#define  GET_PVR(/;"	d
GET_RD_SAMPLE_DELAY	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define GET_RD_SAMPLE_DELAY(/;"	d	file:
GET_REGISTER	include/bedbug/regs.h	/^#define	GET_REGISTER(/;"	d
GET_REGS	drivers/net/ep93xx_eth.c	/^#define GET_REGS(/;"	d	file:
GET_REG_BIT	board/mpl/pati/pati.h	/^#define GET_REG_BIT(/;"	d
GET_RESULT_STATE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define GET_RESULT_STATE(/;"	d
GET_SDRAM_CFG	board/mpl/pati/pati.h	/^#define GET_SDRAM_CFG(/;"	d
GET_SDRAM_MUX	board/mpl/pati/pati.h	/^#define GET_SDRAM_MUX(/;"	d
GET_SECTNUM	board/bf533-ezkit/flash-defines.h	/^#define GET_SECTNUM	/;"	d
GET_SEGMENT	drivers/bios_emulator/x86emu/decode.c	/^#define GET_SEGMENT(/;"	d	file:
GET_SGR	include/bedbug/regs.h	/^#define	 GET_SGR(/;"	d
GET_SLER	include/bedbug/regs.h	/^#define	 GET_SLER(/;"	d
GET_SLOT_STATE	drivers/usb/host/xhci.h	/^#define GET_SLOT_STATE(/;"	d
GET_SPRG0	include/bedbug/regs.h	/^#define  GET_SPRG0(/;"	d
GET_SPRG1	include/bedbug/regs.h	/^#define  GET_SPRG1(/;"	d
GET_SPRG2	include/bedbug/regs.h	/^#define  GET_SPRG2(/;"	d
GET_SPRG3	include/bedbug/regs.h	/^#define  GET_SPRG3(/;"	d
GET_SPRG4	include/bedbug/regs.h	/^#define  GET_SPRG4(/;"	d
GET_SPRG4_RO	include/bedbug/regs.h	/^#define  GET_SPRG4_RO(/;"	d
GET_SPRG5	include/bedbug/regs.h	/^#define  GET_SPRG5(/;"	d
GET_SPRG5_RO	include/bedbug/regs.h	/^#define  GET_SPRG5_RO(/;"	d
GET_SPRG6	include/bedbug/regs.h	/^#define  GET_SPRG6(/;"	d
GET_SPRG6_RO	include/bedbug/regs.h	/^#define  GET_SPRG6_RO(/;"	d
GET_SPRG7	include/bedbug/regs.h	/^#define  GET_SPRG7(/;"	d
GET_SPRG7_RO	include/bedbug/regs.h	/^#define  GET_SPRG7_RO(/;"	d
GET_SRR0	include/bedbug/regs.h	/^#define	 GET_SRR0(/;"	d
GET_SRR1	include/bedbug/regs.h	/^#define	 GET_SRR1(/;"	d
GET_SRR2	include/bedbug/regs.h	/^#define	 GET_SRR2(/;"	d
GET_SRR3	include/bedbug/regs.h	/^#define	 GET_SRR3(/;"	d
GET_STATUS	include/dataflash.h	/^#define GET_STATUS	/;"	d
GET_STRING	board/keymile/common/ivm.c	/^#define GET_STRING(/;"	d	file:
GET_SU0R	include/bedbug/regs.h	/^#define	 GET_SU0R(/;"	d
GET_SYSCNTR_BOOTIND	board/mpl/pati/pati.h	/^#define GET_SYSCNTR_BOOTIND(/;"	d
GET_SYSCNTR_CFG	board/mpl/pati/pati.h	/^#define GET_SYSCNTR_CFG(/;"	d
GET_SYSCNTR_FLWAIT	board/mpl/pati/pati.h	/^#define GET_SYSCNTR_FLWAIT(/;"	d
GET_SYSCNTR_ISB	board/mpl/pati/pati.h	/^#define GET_SYSCNTR_ISB(/;"	d
GET_TAP_RESULT	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define GET_TAP_RESULT(/;"	d
GET_TBL	include/bedbug/regs.h	/^#define  GET_TBL(/;"	d
GET_TBU	include/bedbug/regs.h	/^#define  GET_TBU(/;"	d
GET_TCR	include/bedbug/regs.h	/^#define	 GET_TCR(/;"	d
GET_TOPOLOGY_NUM_OF_BUSES	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define GET_TOPOLOGY_NUM_OF_BUSES(/;"	d
GET_TSR	include/bedbug/regs.h	/^#define	 GET_TSR(/;"	d
GET_UCHAR	lib/bzip2/bzlib_decompress.c	/^#define GET_UCHAR(/;"	d	file:
GET_UINT32_BE	lib/sha1.c	/^#define GET_UINT32_BE(/;"	d	file:
GET_UINT32_BE	lib/sha256.c	/^#define GET_UINT32_BE(/;"	d	file:
GET_USPRG0	include/bedbug/regs.h	/^#define  GET_USPRG0(/;"	d
GET_WLDR_VAL	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GET_WLDR_VAL(/;"	d
GET_XER	include/bedbug/regs.h	/^#define	 GET_XER(/;"	d
GET_ZPR	include/bedbug/regs.h	/^#define  GET_ZPR(/;"	d
GEWM	arch/sh/include/asm/cpu_sh7722.h	/^#define GEWM /;"	d
GE_E0_RX_CONTROL_ABT	drivers/net/tsi108_eth.c	/^#define GE_E0_RX_CONTROL_ABT	/;"	d	file:
GE_E0_RX_CONTROL_EAI	drivers/net/tsi108_eth.c	/^#define GE_E0_RX_CONTROL_EAI	/;"	d	file:
GE_E0_RX_CONTROL_EII	drivers/net/tsi108_eth.c	/^#define GE_E0_RX_CONTROL_EII	/;"	d	file:
GE_E0_RX_CONTROL_GO	drivers/net/tsi108_eth.c	/^#define GE_E0_RX_CONTROL_GO	/;"	d	file:
GE_E0_RX_CONTROL_QUEUE_ENABLES	drivers/net/tsi108_eth.c	/^#define GE_E0_RX_CONTROL_QUEUE_ENABLES	/;"	d	file:
GFER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GFER(/;"	d
GFER	include/SA-1100.h	/^#define GFER	/;"	d
GFER	include/SA-1100.h	/^#define GFER /;"	d
GFER0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GFER0	/;"	d
GFER1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GFER1	/;"	d
GFER2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GFER2	/;"	d
GFER3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GFER3	/;"	d
GFLADJ_30MHZ	include/linux/usb/dwc3.h	/^#define GFLADJ_30MHZ(/;"	d
GFLADJ_30MHZ_DEFAULT	include/linux/usb/dwc3.h	/^#define GFLADJ_30MHZ_DEFAULT	/;"	d
GFLADJ_30MHZ_REG_SEL	include/linux/usb/dwc3.h	/^#define GFLADJ_30MHZ_REG_SEL	/;"	d
GFLAG_56X_16BIT_FLASH	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_16BIT_FLASH /;"	d
GFLAG_56X_HOLD_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_HOLD_MASK /;"	d
GFLAG_56X_HOLD_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_HOLD_SHIFT /;"	d
GFLAG_56X_SIGN_MAGIC	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SIGN_MAGIC /;"	d
GFLAG_56X_SIGN_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SIGN_MASK /;"	d
GFLAG_56X_SIGN_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SIGN_SHIFT /;"	d
GFLAG_56X_SPI_1M	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SPI_1M /;"	d
GFLAG_56X_SPI_2M	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SPI_2M /;"	d
GFLAG_56X_SPI_500K	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SPI_500K /;"	d
GFLAG_56X_SPI_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SPI_MASK /;"	d
GFLAG_56X_SPI_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_SPI_SHIFT /;"	d
GFLAG_56X_WAIT_MASK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_WAIT_MASK /;"	d
GFLAG_56X_WAIT_SHIFT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define GFLAG_56X_WAIT_SHIFT /;"	d
GFN_A0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A0,$/;"	e	enum:__anona307945e0103	file:
GFN_A1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A1,$/;"	e	enum:__anona307945e0103	file:
GFN_A10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A10,$/;"	e	enum:__anona307945e0103	file:
GFN_A11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A11,$/;"	e	enum:__anona307945e0103	file:
GFN_A12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A12,$/;"	e	enum:__anona307945e0103	file:
GFN_A13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A13,$/;"	e	enum:__anona307945e0103	file:
GFN_A14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A14,$/;"	e	enum:__anona307945e0103	file:
GFN_A15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A15,$/;"	e	enum:__anona307945e0103	file:
GFN_A16	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A16,$/;"	e	enum:__anona307945e0103	file:
GFN_A17	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A17,$/;"	e	enum:__anona307945e0103	file:
GFN_A18	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A18,$/;"	e	enum:__anona307945e0103	file:
GFN_A19	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A19,$/;"	e	enum:__anona307945e0103	file:
GFN_A2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A2,$/;"	e	enum:__anona307945e0103	file:
GFN_A3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A3,$/;"	e	enum:__anona307945e0103	file:
GFN_A4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A4,$/;"	e	enum:__anona307945e0103	file:
GFN_A5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A5,$/;"	e	enum:__anona307945e0103	file:
GFN_A6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A6,$/;"	e	enum:__anona307945e0103	file:
GFN_A7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A7,$/;"	e	enum:__anona307945e0103	file:
GFN_A8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A8,$/;"	e	enum:__anona307945e0103	file:
GFN_A9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_A9,$/;"	e	enum:__anona307945e0103	file:
GFN_AUDIO_CLKA_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AUDIO_CLKA_A,$/;"	e	enum:__anona307945e0103	file:
GFN_AUDIO_CLKB_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AUDIO_CLKB_B,$/;"	e	enum:__anona307945e0103	file:
GFN_AVB_AVTP_CAPTURE_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AVB_AVTP_CAPTURE_A,$/;"	e	enum:__anona307945e0103	file:
GFN_AVB_AVTP_MATCH_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AVB_AVTP_MATCH_A,$/;"	e	enum:__anona307945e0103	file:
GFN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AVB_LINK,$/;"	e	enum:__anona307945e0103	file:
GFN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AVB_MAGIC,$/;"	e	enum:__anona307945e0103	file:
GFN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AVB_MDC,$/;"	e	enum:__anona307945e0103	file:
GFN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_AVB_PHY_INT,$/;"	e	enum:__anona307945e0103	file:
GFN_BSx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_BSx,$/;"	e	enum:__anona307945e0103	file:
GFN_CS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_CS0x,$/;"	e	enum:__anona307945e0103	file:
GFN_CS1x_A26	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_CS1x_A26,$/;"	e	enum:__anona307945e0103	file:
GFN_CTS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_CTS0x,$/;"	e	enum:__anona307945e0103	file:
GFN_CTS1x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_CTS1x,$/;"	e	enum:__anona307945e0103	file:
GFN_D0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D0,$/;"	e	enum:__anona307945e0103	file:
GFN_D1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D1,$/;"	e	enum:__anona307945e0103	file:
GFN_D10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D10,$/;"	e	enum:__anona307945e0103	file:
GFN_D11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D11,$/;"	e	enum:__anona307945e0103	file:
GFN_D12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D12,$/;"	e	enum:__anona307945e0103	file:
GFN_D13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D13,$/;"	e	enum:__anona307945e0103	file:
GFN_D14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D14,$/;"	e	enum:__anona307945e0103	file:
GFN_D15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D15,$/;"	e	enum:__anona307945e0103	file:
GFN_D2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D2,$/;"	e	enum:__anona307945e0103	file:
GFN_D3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D3,$/;"	e	enum:__anona307945e0103	file:
GFN_D4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D4,$/;"	e	enum:__anona307945e0103	file:
GFN_D5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D5,$/;"	e	enum:__anona307945e0103	file:
GFN_D6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D6,$/;"	e	enum:__anona307945e0103	file:
GFN_D7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D7,$/;"	e	enum:__anona307945e0103	file:
GFN_D8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D8,$/;"	e	enum:__anona307945e0103	file:
GFN_D9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_D9,$/;"	e	enum:__anona307945e0103	file:
GFN_EX_WAIT0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_EX_WAIT0_A,$/;"	e	enum:__anona307945e0103	file:
GFN_HCTS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_HCTS0x,$/;"	e	enum:__anona307945e0103	file:
GFN_HRTS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_HRTS0x,$/;"	e	enum:__anona307945e0103	file:
GFN_HRX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_HRX0,$/;"	e	enum:__anona307945e0103	file:
GFN_HSCK0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_HSCK0,$/;"	e	enum:__anona307945e0103	file:
GFN_HTX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_HTX0,$/;"	e	enum:__anona307945e0103	file:
GFN_IRQ0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_IRQ0,$/;"	e	enum:__anona307945e0103	file:
GFN_IRQ1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_IRQ1,$/;"	e	enum:__anona307945e0103	file:
GFN_IRQ2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_IRQ2,$/;"	e	enum:__anona307945e0103	file:
GFN_IRQ3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_IRQ3,$/;"	e	enum:__anona307945e0103	file:
GFN_IRQ4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_IRQ4,$/;"	e	enum:__anona307945e0103	file:
GFN_IRQ5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_IRQ5,$/;"	e	enum:__anona307945e0103	file:
GFN_MLB_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_MLB_CLK,$/;"	e	enum:__anona307945e0103	file:
GFN_MLB_DAT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_MLB_DAT,$/;"	e	enum:__anona307945e0103	file:
GFN_MLB_SIG	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_MLB_SIG,$/;"	e	enum:__anona307945e0103	file:
GFN_MSIOF0_SS1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_MSIOF0_SS1,$/;"	e	enum:__anona307945e0103	file:
GFN_MSIOF0_SS2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_MSIOF0_SS2,$/;"	e	enum:__anona307945e0103	file:
GFN_MSIOF0_SYNC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_MSIOF0_SYNC,$/;"	e	enum:__anona307945e0103	file:
GFN_PWM0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_PWM0,$/;"	e	enum:__anona307945e0103	file:
GFN_PWM1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_PWM1_A,$/;"	e	enum:__anona307945e0103	file:
GFN_PWM2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_PWM2_A,$/;"	e	enum:__anona307945e0103	file:
GFN_RD_WRx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RD_WRx,$/;"	e	enum:__anona307945e0103	file:
GFN_RDx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RDx,$/;"	e	enum:__anona307945e0103	file:
GFN_RTS0x_TANS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RTS0x_TANS,$/;"	e	enum:__anona307945e0103	file:
GFN_RTS1x_TANS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RTS1x_TANS,$/;"	e	enum:__anona307945e0103	file:
GFN_RX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RX0,$/;"	e	enum:__anona307945e0103	file:
GFN_RX1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RX1_A,$/;"	e	enum:__anona307945e0103	file:
GFN_RX2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_RX2_A,$/;"	e	enum:__anona307945e0103	file:
GFN_SCK0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SCK0,$/;"	e	enum:__anona307945e0103	file:
GFN_SCK2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SCK2,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_CD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_CD,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_CLK,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_CMD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_CMD,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_DAT0,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_DAT1,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_DAT2,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_DAT3,$/;"	e	enum:__anona307945e0103	file:
GFN_SD0_WP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD0_WP,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_CD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_CD,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_CLK,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_CMD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_CMD,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_DAT0,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_DAT1,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_DAT2,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_DAT3,$/;"	e	enum:__anona307945e0103	file:
GFN_SD1_WP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD1_WP,$/;"	e	enum:__anona307945e0103	file:
GFN_SD2_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD2_CLK,$/;"	e	enum:__anona307945e0103	file:
GFN_SD2_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD2_DAT0,$/;"	e	enum:__anona307945e0103	file:
GFN_SD2_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD2_DAT1,$/;"	e	enum:__anona307945e0103	file:
GFN_SD2_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD2_DAT2,$/;"	e	enum:__anona307945e0103	file:
GFN_SD2_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD2_DAT3,$/;"	e	enum:__anona307945e0103	file:
GFN_SD2_DS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD2_DS,$/;"	e	enum:__anona307945e0103	file:
GFN_SD3_DAT4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD3_DAT4,$/;"	e	enum:__anona307945e0103	file:
GFN_SD3_DAT5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD3_DAT5,$/;"	e	enum:__anona307945e0103	file:
GFN_SD3_DAT6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD3_DAT6,$/;"	e	enum:__anona307945e0103	file:
GFN_SD3_DAT7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SD3_DAT7,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SCK0129	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SCK0129,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SCK34	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SCK34,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SCK4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SCK4,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SCK6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SCK6,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SCK78	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SCK78,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA0,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA1_A,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA2_A,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA3,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA4,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA6,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA7,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA8,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_SDATA9_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_SDATA9_A,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_WS0129	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_WS0129,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_WS34	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_WS34,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_WS4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_WS4,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_WS6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_WS6,$/;"	e	enum:__anona307945e0103	file:
GFN_SSI_WS78	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_SSI_WS78,$/;"	e	enum:__anona307945e0103	file:
GFN_TX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_TX0,$/;"	e	enum:__anona307945e0103	file:
GFN_TX1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_TX1_A,$/;"	e	enum:__anona307945e0103	file:
GFN_TX2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_TX2_A,$/;"	e	enum:__anona307945e0103	file:
GFN_USB0_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB0_OVC,$/;"	e	enum:__anona307945e0103	file:
GFN_USB0_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB0_PWEN,$/;"	e	enum:__anona307945e0103	file:
GFN_USB1_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB1_OVC,$/;"	e	enum:__anona307945e0103	file:
GFN_USB1_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB1_PWEN,$/;"	e	enum:__anona307945e0103	file:
GFN_USB30_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB30_OVC,$/;"	e	enum:__anona307945e0103	file:
GFN_USB30_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB30_PWEN,$/;"	e	enum:__anona307945e0103	file:
GFN_USB31_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB31_OVC,$/;"	e	enum:__anona307945e0103	file:
GFN_USB31_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_USB31_PWEN,$/;"	e	enum:__anona307945e0103	file:
GFN_WE0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_WE0x,$/;"	e	enum:__anona307945e0103	file:
GFN_WE1x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GFN_WE1x,$/;"	e	enum:__anona307945e0103	file:
GFP_ATOMIC	drivers/usb/gadget/f_mass_storage.c	/^#define GFP_ATOMIC /;"	d	file:
GFP_ATOMIC	include/linux/compat.h	/^#define GFP_ATOMIC /;"	d
GFP_KERNEL	include/linux/compat.h	/^#define GFP_KERNEL /;"	d
GFP_NOFS	include/linux/compat.h	/^#define GFP_NOFS /;"	d
GFP_USER	include/linux/compat.h	/^#define GFP_USER /;"	d
GFXFORMAT_ARGB16	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_ARGB16	/;"	d
GFXFORMAT_ARGB32	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_ARGB32	/;"	d
GFXFORMAT_BITMAP1	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_BITMAP1	/;"	d
GFXFORMAT_BITMAP2	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_BITMAP2	/;"	d
GFXFORMAT_BITMAP4	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_BITMAP4	/;"	d
GFXFORMAT_BITMAP8	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_BITMAP8	/;"	d
GFXFORMAT_RGB12	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_RGB12	/;"	d
GFXFORMAT_RGB16	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_RGB16	/;"	d
GFXFORMAT_RGB24_PACKED	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_RGB24_PACKED	/;"	d
GFXFORMAT_RGB24_UNPACKED	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_RGB24_UNPACKED	/;"	d
GFXFORMAT_RGBA32	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_RGBA32	/;"	d
GFXFORMAT_RGBx32	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFXFORMAT_RGBx32	/;"	d
GFX_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GFX_BASE	/;"	d
GFX_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define GFX_DEV	/;"	d
GFX_DIV	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define GFX_DIV	/;"	d
GFX_DIV_36X	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define GFX_DIV_36X	/;"	d
GFX_ENABLE	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFX_ENABLE	/;"	d
GFX_FORMAT_SHIFT	arch/arm/include/asm/arch-omap3/dss.h	/^#define GFX_FORMAT_SHIFT	/;"	d
GFX_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GFX_OFFSET	/;"	d
GF_M	lib/bch.c	/^#define GF_M(/;"	d	file:
GF_N	lib/bch.c	/^#define GF_N(/;"	d	file:
GF_POLY_SZ	lib/bch.c	/^#define GF_POLY_SZ(/;"	d	file:
GF_T	lib/bch.c	/^#define GF_T(/;"	d	file:
GG82563_DSPD_CABLE_LENGTH	drivers/net/e1000.h	/^#define GG82563_DSPD_CABLE_LENGTH /;"	d
GG82563_E_PHY_ID	drivers/net/e1000.h	/^#define GG82563_E_PHY_ID /;"	d
GG82563_ICR_DIS_PADDING	drivers/net/e1000.h	/^#define GG82563_ICR_DIS_PADDING	/;"	d
GG82563_KMCR_FORCE_LINK_UP	drivers/net/e1000.h	/^#define GG82563_KMCR_FORCE_LINK_UP /;"	d
GG82563_KMCR_MDIO_BUS_SPEED_SELECT	drivers/net/e1000.h	/^#define GG82563_KMCR_MDIO_BUS_SPEED_SELECT /;"	d
GG82563_KMCR_MDIO_BUS_SPEED_SELECT_MASK	drivers/net/e1000.h	/^#define GG82563_KMCR_MDIO_BUS_SPEED_SELECT_MASK /;"	d
GG82563_KMCR_PASS_FALSE_CARRIER	drivers/net/e1000.h	/^#define GG82563_KMCR_PASS_FALSE_CARRIER /;"	d
GG82563_KMCR_PHY_LEDS_EN	drivers/net/e1000.h	/^#define GG82563_KMCR_PHY_LEDS_EN /;"	d
GG82563_KMCR_SUPPRESS_SGMII_EPD_EXT	drivers/net/e1000.h	/^#define GG82563_KMCR_SUPPRESS_SGMII_EPD_EXT /;"	d
GG82563_MIN_ALT_REG	drivers/net/e1000.h	/^#define GG82563_MIN_ALT_REG /;"	d
GG82563_MSCR_ASSERT_CRS_ON_TX	drivers/net/e1000.h	/^#define GG82563_MSCR_ASSERT_CRS_ON_TX /;"	d
GG82563_MSCR_TX_CLK_1000MBPS_25MHZ	drivers/net/e1000.h	/^#define GG82563_MSCR_TX_CLK_1000MBPS_25MHZ /;"	d
GG82563_MSCR_TX_CLK_1000MBPS_2_5MHZ	drivers/net/e1000.h	/^#define GG82563_MSCR_TX_CLK_1000MBPS_2_5MHZ /;"	d
GG82563_MSCR_TX_CLK_100MBPS_25MHZ	drivers/net/e1000.h	/^#define GG82563_MSCR_TX_CLK_100MBPS_25MHZ /;"	d
GG82563_MSCR_TX_CLK_10MBPS_2_5MHZ	drivers/net/e1000.h	/^#define GG82563_MSCR_TX_CLK_10MBPS_2_5MHZ /;"	d
GG82563_MSCR_TX_CLK_MASK	drivers/net/e1000.h	/^#define GG82563_MSCR_TX_CLK_MASK /;"	d
GG82563_PAGE_SHIFT	drivers/net/e1000.h	/^#define GG82563_PAGE_SHIFT /;"	d
GG82563_PHY_ACK_TIMEOUTS	drivers/net/e1000.h	/^#define GG82563_PHY_ACK_TIMEOUTS /;"	d
GG82563_PHY_ADV_ABILITY	drivers/net/e1000.h	/^#define GG82563_PHY_ADV_ABILITY /;"	d
GG82563_PHY_ADV_NEXT_PAGE	drivers/net/e1000.h	/^#define GG82563_PHY_ADV_NEXT_PAGE /;"	d
GG82563_PHY_DEVICE_ID	drivers/net/e1000.h	/^#define GG82563_PHY_DEVICE_ID /;"	d
GG82563_PHY_DSP_DISTANCE	drivers/net/e1000.h	/^#define GG82563_PHY_DSP_DISTANCE /;"	d
GG82563_PHY_INBAND_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_INBAND_CTRL /;"	d
GG82563_PHY_INT_ENABLE	drivers/net/e1000.h	/^#define GG82563_PHY_INT_ENABLE /;"	d
GG82563_PHY_KMRN_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_KMRN_CTRL /;"	d
GG82563_PHY_KMRN_DIAGNOSTIC	drivers/net/e1000.h	/^#define GG82563_PHY_KMRN_DIAGNOSTIC /;"	d
GG82563_PHY_KMRN_FIFO_CTRL_STAT	drivers/net/e1000.h	/^#define GG82563_PHY_KMRN_FIFO_CTRL_STAT /;"	d
GG82563_PHY_KMRN_MISC	drivers/net/e1000.h	/^#define GG82563_PHY_KMRN_MISC /;"	d
GG82563_PHY_KMRN_MODE_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_KMRN_MODE_CTRL /;"	d
GG82563_PHY_LINK_PARTNER_ADV_ABILITY	drivers/net/e1000.h	/^#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY /;"	d
GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE	drivers/net/e1000.h	/^#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE /;"	d
GG82563_PHY_MAC_SPEC_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_MAC_SPEC_CTRL /;"	d
GG82563_PHY_MAC_SPEC_CTRL_2	drivers/net/e1000.h	/^#define GG82563_PHY_MAC_SPEC_CTRL_2 /;"	d
GG82563_PHY_PAGE_SELECT	drivers/net/e1000.h	/^#define GG82563_PHY_PAGE_SELECT /;"	d
GG82563_PHY_PAGE_SELECT_ALT	drivers/net/e1000.h	/^#define GG82563_PHY_PAGE_SELECT_ALT /;"	d
GG82563_PHY_PORT_RESET	drivers/net/e1000.h	/^#define GG82563_PHY_PORT_RESET /;"	d
GG82563_PHY_PWR_MGMT_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_PWR_MGMT_CTRL /;"	d
GG82563_PHY_RATE_ADAPT_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_RATE_ADAPT_CTRL /;"	d
GG82563_PHY_REVISION_ID	drivers/net/e1000.h	/^#define GG82563_PHY_REVISION_ID /;"	d
GG82563_PHY_RX_ERR_CNTR	drivers/net/e1000.h	/^#define GG82563_PHY_RX_ERR_CNTR /;"	d
GG82563_PHY_SPEC_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_SPEC_CTRL /;"	d
GG82563_PHY_SPEC_CTRL_2	drivers/net/e1000.h	/^#define GG82563_PHY_SPEC_CTRL_2 /;"	d
GG82563_PHY_SPEC_STATUS	drivers/net/e1000.h	/^#define GG82563_PHY_SPEC_STATUS /;"	d
GG82563_PHY_SPEC_STATUS_2	drivers/net/e1000.h	/^#define GG82563_PHY_SPEC_STATUS_2 /;"	d
GG82563_PHY_TEST_CLK_CTRL	drivers/net/e1000.h	/^#define GG82563_PHY_TEST_CLK_CTRL /;"	d
GG82563_PMCR_DISABLE_1000	drivers/net/e1000.h	/^#define GG82563_PMCR_DISABLE_1000 /;"	d
GG82563_PMCR_DISABLE_1000_NON_D0	drivers/net/e1000.h	/^#define GG82563_PMCR_DISABLE_1000_NON_D0 /;"	d
GG82563_PMCR_DISABLE_PORT	drivers/net/e1000.h	/^#define GG82563_PMCR_DISABLE_PORT /;"	d
GG82563_PMCR_DISABLE_SERDES	drivers/net/e1000.h	/^#define GG82563_PMCR_DISABLE_SERDES /;"	d
GG82563_PMCR_ENABLE_ELECTRICAL_IDLE	drivers/net/e1000.h	/^#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE /;"	d
GG82563_PMCR_FORCE_POWER_STATE	drivers/net/e1000.h	/^#define GG82563_PMCR_FORCE_POWER_STATE /;"	d
GG82563_PMCR_PROGRAMMED_POWER_STATE_D0A	drivers/net/e1000.h	/^#define GG82563_PMCR_PROGRAMMED_POWER_STATE_D0A /;"	d
GG82563_PMCR_PROGRAMMED_POWER_STATE_D0U	drivers/net/e1000.h	/^#define GG82563_PMCR_PROGRAMMED_POWER_STATE_D0U /;"	d
GG82563_PMCR_PROGRAMMED_POWER_STATE_D3	drivers/net/e1000.h	/^#define GG82563_PMCR_PROGRAMMED_POWER_STATE_D3 /;"	d
GG82563_PMCR_PROGRAMMED_POWER_STATE_DR	drivers/net/e1000.h	/^#define GG82563_PMCR_PROGRAMMED_POWER_STATE_DR /;"	d
GG82563_PMCR_PROGRAMMED_POWER_STATE_MASK	drivers/net/e1000.h	/^#define GG82563_PMCR_PROGRAMMED_POWER_STATE_MASK /;"	d
GG82563_PMCR_REVERSE_AUTO_NEG	drivers/net/e1000.h	/^#define GG82563_PMCR_REVERSE_AUTO_NEG /;"	d
GG82563_PMCR_REVERSE_AUTO_NEG_D0A	drivers/net/e1000.h	/^#define GG82563_PMCR_REVERSE_AUTO_NEG_D0A /;"	d
GG82563_PSCR2_1000BT_DISABLE	drivers/net/e1000.h	/^#define GG82563_PSCR2_1000BT_DISABLE /;"	d
GG82563_PSCR2_1000MB_TEST_SELECT_112NS	drivers/net/e1000.h	/^#define GG82563_PSCR2_1000MB_TEST_SELECT_112NS /;"	d
GG82563_PSCR2_1000MB_TEST_SELECT_16NS	drivers/net/e1000.h	/^#define GG82563_PSCR2_1000MB_TEST_SELECT_16NS /;"	d
GG82563_PSCR2_1000MB_TEST_SELECT_MASK	drivers/net/e1000.h	/^#define GG82563_PSCR2_1000MB_TEST_SELECT_MASK /;"	d
GG82563_PSCR2_1000MB_TEST_SELECT_NORMAL	drivers/net/e1000.h	/^#define GG82563_PSCR2_1000MB_TEST_SELECT_NORMAL /;"	d
GG82563_PSCR2_10BT_POLARITY_FORCE	drivers/net/e1000.h	/^#define GG82563_PSCR2_10BT_POLARITY_FORCE /;"	d
GG82563_PSCR2_REVERSE_AUTO_NEG	drivers/net/e1000.h	/^#define GG82563_PSCR2_REVERSE_AUTO_NEG /;"	d
GG82563_PSCR2_TRANSMITER_TYPE_MASK	drivers/net/e1000.h	/^#define GG82563_PSCR2_TRANSMITER_TYPE_MASK /;"	d
GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_A	drivers/net/e1000.h	/^#define GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_A /;"	d
GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_B	drivers/net/e1000.h	/^#define GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_B /;"	d
GG82563_PSCR_COPPER_TRANSMITER_DISABLE	drivers/net/e1000.h	/^#define GG82563_PSCR_COPPER_TRANSMITER_DISABLE /;"	d
GG82563_PSCR_CROSSOVER_MODE_AUTO	drivers/net/e1000.h	/^#define GG82563_PSCR_CROSSOVER_MODE_AUTO /;"	d
GG82563_PSCR_CROSSOVER_MODE_MASK	drivers/net/e1000.h	/^#define GG82563_PSCR_CROSSOVER_MODE_MASK /;"	d
GG82563_PSCR_CROSSOVER_MODE_MDI	drivers/net/e1000.h	/^#define GG82563_PSCR_CROSSOVER_MODE_MDI /;"	d
GG82563_PSCR_CROSSOVER_MODE_MDIX	drivers/net/e1000.h	/^#define GG82563_PSCR_CROSSOVER_MODE_MDIX /;"	d
GG82563_PSCR_DISABLE_JABBER	drivers/net/e1000.h	/^#define GG82563_PSCR_DISABLE_JABBER /;"	d
GG82563_PSCR_DOWNSHIFT_COUNTER_MASK	drivers/net/e1000.h	/^#define GG82563_PSCR_DOWNSHIFT_COUNTER_MASK /;"	d
GG82563_PSCR_DOWNSHIFT_COUNTER_SHIFT	drivers/net/e1000.h	/^#define GG82563_PSCR_DOWNSHIFT_COUNTER_SHIFT /;"	d
GG82563_PSCR_DOWNSHIFT_ENABLE	drivers/net/e1000.h	/^#define GG82563_PSCR_DOWNSHIFT_ENABLE /;"	d
GG82563_PSCR_ENALBE_EXTENDED_DISTANCE	drivers/net/e1000.h	/^#define GG82563_PSCR_ENALBE_EXTENDED_DISTANCE /;"	d
GG82563_PSCR_ENERGY_DETECT_MASK	drivers/net/e1000.h	/^#define GG82563_PSCR_ENERGY_DETECT_MASK /;"	d
GG82563_PSCR_ENERGY_DETECT_OFF	drivers/net/e1000.h	/^#define GG82563_PSCR_ENERGY_DETECT_OFF /;"	d
GG82563_PSCR_ENERGY_DETECT_RX	drivers/net/e1000.h	/^#define GG82563_PSCR_ENERGY_DETECT_RX /;"	d
GG82563_PSCR_ENERGY_DETECT_RX_TM	drivers/net/e1000.h	/^#define GG82563_PSCR_ENERGY_DETECT_RX_TM /;"	d
GG82563_PSCR_FORCE_LINK_GOOD	drivers/net/e1000.h	/^#define GG82563_PSCR_FORCE_LINK_GOOD /;"	d
GG82563_PSCR_POLARITY_REVERSAL_DISABLE	drivers/net/e1000.h	/^#define GG82563_PSCR_POLARITY_REVERSAL_DISABLE /;"	d
GG82563_PSCR_POWER_DOWN	drivers/net/e1000.h	/^#define GG82563_PSCR_POWER_DOWN /;"	d
GG82563_PSSR2_AUTO_NEG_COMPLETED	drivers/net/e1000.h	/^#define GG82563_PSSR2_AUTO_NEG_COMPLETED /;"	d
GG82563_PSSR2_AUTO_NEG_ERROR	drivers/net/e1000.h	/^#define GG82563_PSSR2_AUTO_NEG_ERROR /;"	d
GG82563_PSSR2_DOWNSHIFT_INTERRUPT	drivers/net/e1000.h	/^#define GG82563_PSSR2_DOWNSHIFT_INTERRUPT /;"	d
GG82563_PSSR2_DUPLEX_CHANGED	drivers/net/e1000.h	/^#define GG82563_PSSR2_DUPLEX_CHANGED /;"	d
GG82563_PSSR2_ENERGY_DETECT_CHANGED	drivers/net/e1000.h	/^#define GG82563_PSSR2_ENERGY_DETECT_CHANGED /;"	d
GG82563_PSSR2_FALSE_CARRIER	drivers/net/e1000.h	/^#define GG82563_PSSR2_FALSE_CARRIER /;"	d
GG82563_PSSR2_JABBER	drivers/net/e1000.h	/^#define GG82563_PSSR2_JABBER /;"	d
GG82563_PSSR2_LINK_STATUS_CHANGED	drivers/net/e1000.h	/^#define GG82563_PSSR2_LINK_STATUS_CHANGED /;"	d
GG82563_PSSR2_MDI_CROSSOVER_CHANGE	drivers/net/e1000.h	/^#define GG82563_PSSR2_MDI_CROSSOVER_CHANGE /;"	d
GG82563_PSSR2_PAGE_RECEIVED	drivers/net/e1000.h	/^#define GG82563_PSSR2_PAGE_RECEIVED /;"	d
GG82563_PSSR2_POLARITY_CHANGED	drivers/net/e1000.h	/^#define GG82563_PSSR2_POLARITY_CHANGED /;"	d
GG82563_PSSR2_SPEED_CHANGED	drivers/net/e1000.h	/^#define GG82563_PSSR2_SPEED_CHANGED /;"	d
GG82563_PSSR2_SYMBOL_ERROR	drivers/net/e1000.h	/^#define GG82563_PSSR2_SYMBOL_ERROR /;"	d
GG82563_PSSR_CROSSOVER_STATUS	drivers/net/e1000.h	/^#define GG82563_PSSR_CROSSOVER_STATUS /;"	d
GG82563_PSSR_DOWNSHIFT	drivers/net/e1000.h	/^#define GG82563_PSSR_DOWNSHIFT /;"	d
GG82563_PSSR_DUPLEX	drivers/net/e1000.h	/^#define GG82563_PSSR_DUPLEX /;"	d
GG82563_PSSR_ENERGY_DETECT	drivers/net/e1000.h	/^#define GG82563_PSSR_ENERGY_DETECT /;"	d
GG82563_PSSR_JABBER	drivers/net/e1000.h	/^#define GG82563_PSSR_JABBER /;"	d
GG82563_PSSR_LINK	drivers/net/e1000.h	/^#define GG82563_PSSR_LINK /;"	d
GG82563_PSSR_LINK_UP	drivers/net/e1000.h	/^#define GG82563_PSSR_LINK_UP /;"	d
GG82563_PSSR_PAGE_RECEIVED	drivers/net/e1000.h	/^#define GG82563_PSSR_PAGE_RECEIVED /;"	d
GG82563_PSSR_POLARITY	drivers/net/e1000.h	/^#define GG82563_PSSR_POLARITY /;"	d
GG82563_PSSR_RX_PAUSE_ENABLED	drivers/net/e1000.h	/^#define GG82563_PSSR_RX_PAUSE_ENABLED /;"	d
GG82563_PSSR_SPEED_1000MBPS	drivers/net/e1000.h	/^#define GG82563_PSSR_SPEED_1000MBPS /;"	d
GG82563_PSSR_SPEED_100MBPS	drivers/net/e1000.h	/^#define GG82563_PSSR_SPEED_100MBPS /;"	d
GG82563_PSSR_SPEED_10MBPS	drivers/net/e1000.h	/^#define GG82563_PSSR_SPEED_10MBPS /;"	d
GG82563_PSSR_SPEED_DUPLEX_RESOLVED	drivers/net/e1000.h	/^#define GG82563_PSSR_SPEED_DUPLEX_RESOLVED /;"	d
GG82563_PSSR_SPEED_MASK	drivers/net/e1000.h	/^#define GG82563_PSSR_SPEED_MASK /;"	d
GG82563_PSSR_TX_PAUSE_ENABLED	drivers/net/e1000.h	/^#define GG82563_PSSR_TX_PAUSE_ENABLED /;"	d
GG82563_REG	drivers/net/e1000.h	/^#define GG82563_REG(/;"	d
GGC	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GGC	/;"	d
GGC	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define GGC	/;"	d
GIC400_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GIC400_ARB_BASE_ADDR /;"	d
GIC400_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GIC400_ARB_END_ADDR /;"	d
GICC_ABPR	arch/arm/include/asm/gic.h	/^#define GICC_ABPR	/;"	d
GICC_AEOIR	arch/arm/include/asm/gic.h	/^#define GICC_AEOIR	/;"	d
GICC_AHPPIR	arch/arm/include/asm/gic.h	/^#define GICC_AHPPIR	/;"	d
GICC_AIAR	arch/arm/include/asm/gic.h	/^#define GICC_AIAR	/;"	d
GICC_APRn	arch/arm/include/asm/gic.h	/^#define GICC_APRn	/;"	d
GICC_BASE	arch/arm/cpu/armv7/sunxi/psci.c	/^#define	GICC_BASE	/;"	d	file:
GICC_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define GICC_BASE	/;"	d
GICC_BASE	arch/arm/include/asm/arch-tegra186/tegra.h	/^#define GICC_BASE	/;"	d
GICC_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define GICC_BASE	/;"	d
GICC_BASE	arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h	/^#define GICC_BASE /;"	d
GICC_BASE	include/configs/hikey.h	/^#define GICC_BASE	/;"	d
GICC_BASE	include/configs/meson-gxbb-common.h	/^#define GICC_BASE	/;"	d
GICC_BASE	include/configs/s32v234evb.h	/^#define GICC_BASE /;"	d
GICC_BASE	include/configs/salvator-x.h	/^#define GICC_BASE	/;"	d
GICC_BASE	include/configs/sun50i.h	/^#define GICC_BASE	/;"	d
GICC_BASE	include/configs/vexpress_aemv8a.h	/^#define GICC_BASE	/;"	d
GICC_BASE	include/configs/xilinx_zynqmp.h	/^#define GICC_BASE	/;"	d
GICC_BPR	arch/arm/include/asm/gic.h	/^#define GICC_BPR	/;"	d
GICC_CTLR	arch/arm/include/asm/gic.h	/^#define GICC_CTLR	/;"	d
GICC_DIR	arch/arm/include/asm/gic.h	/^#define GICC_DIR	/;"	d
GICC_EOIR	arch/arm/include/asm/gic.h	/^#define GICC_EOIR	/;"	d
GICC_HPPIR	arch/arm/include/asm/gic.h	/^#define GICC_HPPIR	/;"	d
GICC_IAR	arch/arm/include/asm/gic.h	/^#define GICC_IAR	/;"	d
GICC_IIDR	arch/arm/include/asm/gic.h	/^#define GICC_IIDR	/;"	d
GICC_NSAPRn	arch/arm/include/asm/gic.h	/^#define GICC_NSAPRn	/;"	d
GICC_PMR	arch/arm/include/asm/gic.h	/^#define GICC_PMR	/;"	d
GICC_RPR	arch/arm/include/asm/gic.h	/^#define GICC_RPR	/;"	d
GICD_BASE	arch/arm/cpu/armv7/sunxi/psci.c	/^#define	GICD_BASE	/;"	d	file:
GICD_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define GICD_BASE	/;"	d
GICD_BASE	arch/arm/include/asm/arch-tegra186/tegra.h	/^#define GICD_BASE	/;"	d
GICD_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define GICD_BASE	/;"	d
GICD_BASE	arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h	/^#define GICD_BASE /;"	d
GICD_BASE	include/configs/hikey.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/meson-gxbb-common.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/s32v234evb.h	/^#define GICD_BASE /;"	d
GICD_BASE	include/configs/salvator-x.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/sun50i.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/thunderx_88xx.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/uniphier.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/vexpress_aemv8a.h	/^#define GICD_BASE	/;"	d
GICD_BASE	include/configs/xilinx_zynqmp.h	/^#define GICD_BASE	/;"	d
GICD_CLRSPI_NSR	arch/arm/include/asm/gic.h	/^#define GICD_CLRSPI_NSR	/;"	d
GICD_CLRSPI_SR	arch/arm/include/asm/gic.h	/^#define GICD_CLRSPI_SR	/;"	d
GICD_CPENDSGIRn	arch/arm/include/asm/gic.h	/^#define GICD_CPENDSGIRn	/;"	d
GICD_CTLR	arch/arm/include/asm/gic.h	/^#define GICD_CTLR	/;"	d
GICD_ICACTIVERn	arch/arm/include/asm/gic.h	/^#define GICD_ICACTIVERn	/;"	d
GICD_ICENABLERn	arch/arm/include/asm/gic.h	/^#define GICD_ICENABLERn	/;"	d
GICD_ICFGR	arch/arm/include/asm/gic.h	/^#define GICD_ICFGR	/;"	d
GICD_ICPENDRn	arch/arm/include/asm/gic.h	/^#define GICD_ICPENDRn	/;"	d
GICD_IGROUPMODRn	arch/arm/include/asm/gic.h	/^#define GICD_IGROUPMODRn	/;"	d
GICD_IGROUPRn	arch/arm/include/asm/gic.h	/^#define GICD_IGROUPRn	/;"	d
GICD_IIDR	arch/arm/include/asm/gic.h	/^#define GICD_IIDR	/;"	d
GICD_IPRIORITYRn	arch/arm/include/asm/gic.h	/^#define GICD_IPRIORITYRn	/;"	d
GICD_IROUTERn	arch/arm/include/asm/gic.h	/^#define GICD_IROUTERn	/;"	d
GICD_ISACTIVERn	arch/arm/include/asm/gic.h	/^#define GICD_ISACTIVERn	/;"	d
GICD_ISENABLERn	arch/arm/include/asm/gic.h	/^#define GICD_ISENABLERn	/;"	d
GICD_ISPENDRn	arch/arm/include/asm/gic.h	/^#define GICD_ISPENDRn	/;"	d
GICD_ITARGETSRn	arch/arm/include/asm/gic.h	/^#define GICD_ITARGETSRn	/;"	d
GICD_NSACRn	arch/arm/include/asm/gic.h	/^#define GICD_NSACRn	/;"	d
GICD_SEIR	arch/arm/include/asm/gic.h	/^#define GICD_SEIR	/;"	d
GICD_SETSPI_NSR	arch/arm/include/asm/gic.h	/^#define GICD_SETSPI_NSR	/;"	d
GICD_SETSPI_SR	arch/arm/include/asm/gic.h	/^#define GICD_SETSPI_SR	/;"	d
GICD_SGIR	arch/arm/include/asm/gic.h	/^#define GICD_SGIR	/;"	d
GICD_SPENDSGIRn	arch/arm/include/asm/gic.h	/^#define GICD_SPENDSGIRn	/;"	d
GICD_STATUSR	arch/arm/include/asm/gic.h	/^#define GICD_STATUSR	/;"	d
GICD_TYPER	arch/arm/include/asm/gic.h	/^#define GICD_TYPER	/;"	d
GICR_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define GICR_BASE	/;"	d
GICR_BASE	include/configs/thunderx_88xx.h	/^#define GICR_BASE	/;"	d
GICR_BASE	include/configs/uniphier.h	/^#define GICR_BASE	/;"	d
GICR_BASE	include/configs/vexpress_aemv8a.h	/^#define GICR_BASE	/;"	d
GICR_CLRLPIR	arch/arm/include/asm/gic.h	/^#define GICR_CLRLPIR	/;"	d
GICR_CTLR	arch/arm/include/asm/gic.h	/^#define GICR_CTLR	/;"	d
GICR_ICACTIVERn	arch/arm/include/asm/gic.h	/^#define GICR_ICACTIVERn	/;"	d
GICR_ICENABLERn	arch/arm/include/asm/gic.h	/^#define GICR_ICENABLERn	/;"	d
GICR_ICFGR0	arch/arm/include/asm/gic.h	/^#define GICR_ICFGR0	/;"	d
GICR_ICFGR1	arch/arm/include/asm/gic.h	/^#define GICR_ICFGR1	/;"	d
GICR_ICPENDRn	arch/arm/include/asm/gic.h	/^#define GICR_ICPENDRn	/;"	d
GICR_IGROUPMODRn	arch/arm/include/asm/gic.h	/^#define GICR_IGROUPMODRn	/;"	d
GICR_IGROUPRn	arch/arm/include/asm/gic.h	/^#define GICR_IGROUPRn	/;"	d
GICR_IIDR	arch/arm/include/asm/gic.h	/^#define GICR_IIDR	/;"	d
GICR_INVALLR	arch/arm/include/asm/gic.h	/^#define GICR_INVALLR	/;"	d
GICR_INVLPIR	arch/arm/include/asm/gic.h	/^#define GICR_INVLPIR	/;"	d
GICR_IPRIORITYRn	arch/arm/include/asm/gic.h	/^#define GICR_IPRIORITYRn	/;"	d
GICR_ISACTIVERn	arch/arm/include/asm/gic.h	/^#define GICR_ISACTIVERn	/;"	d
GICR_ISENABLERn	arch/arm/include/asm/gic.h	/^#define GICR_ISENABLERn	/;"	d
GICR_ISPENDRn	arch/arm/include/asm/gic.h	/^#define GICR_ISPENDRn	/;"	d
GICR_MOVALLR	arch/arm/include/asm/gic.h	/^#define GICR_MOVALLR	/;"	d
GICR_MOVLPIR	arch/arm/include/asm/gic.h	/^#define GICR_MOVLPIR	/;"	d
GICR_NSACRn	arch/arm/include/asm/gic.h	/^#define GICR_NSACRn	/;"	d
GICR_PENDBASER	arch/arm/include/asm/gic.h	/^#define GICR_PENDBASER	/;"	d
GICR_PROPBASER	arch/arm/include/asm/gic.h	/^#define GICR_PROPBASER	/;"	d
GICR_SEIR	arch/arm/include/asm/gic.h	/^#define GICR_SEIR	/;"	d
GICR_SETLPIR	arch/arm/include/asm/gic.h	/^#define GICR_SETLPIR	/;"	d
GICR_STATUSR	arch/arm/include/asm/gic.h	/^#define GICR_STATUSR	/;"	d
GICR_SYNCR	arch/arm/include/asm/gic.h	/^#define GICR_SYNCR	/;"	d
GICR_TYPER	arch/arm/include/asm/gic.h	/^#define GICR_TYPER	/;"	d
GICR_WAKER	arch/arm/include/asm/gic.h	/^#define GICR_WAKER	/;"	d
GIC_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define GIC_BASE	/;"	d
GIC_CPU_MASK_RAW	arch/arm/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	arch/microblaze/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	arch/mips/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	arch/nios2/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	arch/sandbox/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	arch/x86/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	arch/xtensa/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_RAW	include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_RAW(/;"	d
GIC_CPU_MASK_SIMPLE	arch/arm/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	arch/microblaze/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	arch/mips/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	arch/nios2/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	arch/sandbox/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	arch/x86/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	arch/xtensa/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_MASK_SIMPLE	include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_CPU_MASK_SIMPLE(/;"	d
GIC_CPU_OFFSET_A15	arch/arm/include/asm/gic.h	/^#define GIC_CPU_OFFSET_A15	/;"	d
GIC_CPU_OFFSET_A9	arch/arm/include/asm/gic.h	/^#define GIC_CPU_OFFSET_A9	/;"	d
GIC_DIST_OFFSET	arch/arm/include/asm/gic.h	/^#define GIC_DIST_OFFSET	/;"	d
GIC_LOCAL	arch/arm/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	arch/microblaze/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	arch/mips/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	arch/nios2/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	arch/sandbox/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	arch/x86/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	arch/xtensa/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_LOCAL	include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_LOCAL /;"	d
GIC_PPI	arch/arm/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	arch/microblaze/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	arch/mips/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	arch/nios2/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	arch/sandbox/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	arch/x86/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	arch/xtensa/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_PPI	include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_PPI /;"	d
GIC_SHARED	arch/arm/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	arch/microblaze/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	arch/mips/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	arch/nios2/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	arch/sandbox/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	arch/x86/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	arch/xtensa/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SHARED	include/dt-bindings/interrupt-controller/mips-gic.h	/^#define GIC_SHARED /;"	d
GIC_SPI	arch/arm/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	arch/microblaze/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	arch/mips/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	arch/nios2/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	arch/sandbox/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	arch/x86/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	arch/xtensa/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIC_SPI	include/dt-bindings/interrupt-controller/arm-gic.h	/^#define GIC_SPI /;"	d
GIE_BIT	arch/nds32/include/asm/ptrace.h	/^#define GIE_BIT	/;"	d
GIE_STATUS	arch/nds32/lib/interrupts.c	/^int GIE_STATUS(void)$/;"	f	typeref:typename:int
GIGABITEN	drivers/net/cpsw.c	/^#define GIGABITEN	/;"	d	file:
GIGA_ETH	drivers/qe/uccf.h	/^	GIGA_ETH,$/;"	e	enum:enet_type
GIGA_MODE_EN	drivers/net/ax88180.h	/^  #define GIGA_MODE_EN	/;"	d
GIMR0_CXABORT	include/usb/fotg210.h	/^#define GIMR0_CXABORT /;"	d
GIMR0_CXEND	include/usb/fotg210.h	/^#define GIMR0_CXEND /;"	d
GIMR0_CXERR	include/usb/fotg210.h	/^#define GIMR0_CXERR /;"	d
GIMR0_CXIN	include/usb/fotg210.h	/^#define GIMR0_CXIN /;"	d
GIMR0_CXOUT	include/usb/fotg210.h	/^#define GIMR0_CXOUT /;"	d
GIMR0_CXSETUP	include/usb/fotg210.h	/^#define GIMR0_CXSETUP /;"	d
GIMR0_MASK	include/usb/fotg210.h	/^#define GIMR0_MASK /;"	d
GIMR1_FIFO_IN	include/usb/fotg210.h	/^#define GIMR1_FIFO_IN(/;"	d
GIMR1_FIFO_OUT	include/usb/fotg210.h	/^#define GIMR1_FIFO_OUT(/;"	d
GIMR1_FIFO_RX	include/usb/fotg210.h	/^#define GIMR1_FIFO_RX(/;"	d
GIMR1_FIFO_SPK	include/usb/fotg210.h	/^#define GIMR1_FIFO_SPK(/;"	d
GIMR1_FIFO_TX	include/usb/fotg210.h	/^#define GIMR1_FIFO_TX(/;"	d
GIMR1_MASK	include/usb/fotg210.h	/^#define GIMR1_MASK /;"	d
GIMR2_DMAERR	include/usb/fotg210.h	/^#define GIMR2_DMAERR /;"	d
GIMR2_DMAFIN	include/usb/fotg210.h	/^#define GIMR2_DMAFIN /;"	d
GIMR2_IDLE	include/usb/fotg210.h	/^#define GIMR2_IDLE /;"	d
GIMR2_ISOCABT	include/usb/fotg210.h	/^#define GIMR2_ISOCABT /;"	d
GIMR2_ISOCERR	include/usb/fotg210.h	/^#define GIMR2_ISOCERR /;"	d
GIMR2_MASK	include/usb/fotg210.h	/^#define GIMR2_MASK /;"	d
GIMR2_RESET	include/usb/fotg210.h	/^#define GIMR2_RESET /;"	d
GIMR2_RESUME	include/usb/fotg210.h	/^#define GIMR2_RESUME /;"	d
GIMR2_SUSPEND	include/usb/fotg210.h	/^#define GIMR2_SUSPEND /;"	d
GIMR2_WAKEUP	include/usb/fotg210.h	/^#define GIMR2_WAKEUP /;"	d
GIMR2_ZLPRX	include/usb/fotg210.h	/^#define GIMR2_ZLPRX /;"	d
GIMR2_ZLPTX	include/usb/fotg210.h	/^#define GIMR2_ZLPTX /;"	d
GIMR_GRP0	include/usb/fotg210.h	/^#define GIMR_GRP0 /;"	d
GIMR_GRP1	include/usb/fotg210.h	/^#define GIMR_GRP1 /;"	d
GIMR_GRP2	include/usb/fotg210.h	/^#define GIMR_GRP2 /;"	d
GIMR_MASK	include/usb/fotg210.h	/^#define GIMR_MASK /;"	d
GINTMSK_INIT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define GINTMSK_INIT	/;"	d
GISR0_CXABORT	include/usb/fotg210.h	/^#define GISR0_CXABORT /;"	d
GISR0_CXEND	include/usb/fotg210.h	/^#define GISR0_CXEND /;"	d
GISR0_CXERR	include/usb/fotg210.h	/^#define GISR0_CXERR /;"	d
GISR0_CXIN	include/usb/fotg210.h	/^#define GISR0_CXIN /;"	d
GISR0_CXOUT	include/usb/fotg210.h	/^#define GISR0_CXOUT /;"	d
GISR0_CXSETUP	include/usb/fotg210.h	/^#define GISR0_CXSETUP /;"	d
GISR1_IN_FIFO	include/usb/fotg210.h	/^#define GISR1_IN_FIFO(/;"	d
GISR1_OUT_FIFO	include/usb/fotg210.h	/^#define GISR1_OUT_FIFO(/;"	d
GISR1_RX_FIFO	include/usb/fotg210.h	/^#define GISR1_RX_FIFO(/;"	d
GISR1_SPK_FIFO	include/usb/fotg210.h	/^#define GISR1_SPK_FIFO(/;"	d
GISR2_DMAERR	include/usb/fotg210.h	/^#define GISR2_DMAERR /;"	d
GISR2_DMAFIN	include/usb/fotg210.h	/^#define GISR2_DMAFIN /;"	d
GISR2_IDLE	include/usb/fotg210.h	/^#define GISR2_IDLE /;"	d
GISR2_ISOCABT	include/usb/fotg210.h	/^#define GISR2_ISOCABT /;"	d
GISR2_ISOCERR	include/usb/fotg210.h	/^#define GISR2_ISOCERR /;"	d
GISR2_RESET	include/usb/fotg210.h	/^#define GISR2_RESET /;"	d
GISR2_RESUME	include/usb/fotg210.h	/^#define GISR2_RESUME /;"	d
GISR2_SUSPEND	include/usb/fotg210.h	/^#define GISR2_SUSPEND /;"	d
GISR2_WAKEUP	include/usb/fotg210.h	/^#define GISR2_WAKEUP /;"	d
GISR2_ZLPRX	include/usb/fotg210.h	/^#define GISR2_ZLPRX /;"	d
GISR2_ZLPTX	include/usb/fotg210.h	/^#define GISR2_ZLPTX /;"	d
GISR_GRP0	include/usb/fotg210.h	/^#define GISR_GRP0 /;"	d
GISR_GRP1	include/usb/fotg210.h	/^#define GISR_GRP1 /;"	d
GISR_GRP2	include/usb/fotg210.h	/^#define GISR_GRP2 /;"	d
GIS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GIS_BASE_ADDR /;"	d
GIUS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GIUS(/;"	d
GIZ_DONT_SPLIT_AHB_WR	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define GIZ_DONT_SPLIT_AHB_WR	/;"	d
GIZ_DONT_SPLIT_AHB_WR	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define GIZ_DONT_SPLIT_AHB_WR	/;"	d
GIZ_ENABLE_SPLIT	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define GIZ_ENABLE_SPLIT	/;"	d
GIZ_ENABLE_SPLIT	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define GIZ_ENABLE_SPLIT	/;"	d
GIZ_ENB_FAST_REARB	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define GIZ_ENB_FAST_REARB	/;"	d
GIZ_ENB_FAST_REARB	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define GIZ_ENB_FAST_REARB	/;"	d
GIZ_USB_IMMEDIATE	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define GIZ_USB_IMMEDIATE	/;"	d
GIZ_USB_IMMEDIATE	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define GIZ_USB_IMMEDIATE	/;"	d
GLACIER	board/amcc/canyonlands/Kconfig	/^config GLACIER$/;"	c	choice:BOARD_TYPE
GLCONFIG_CKE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_CKE	/;"	d
GLCONFIG_CLKSHUTDOWN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_CLKSHUTDOWN	/;"	d
GLCONFIG_INIT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_INIT	/;"	d
GLCONFIG_LCR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_LCR	/;"	d
GLCONFIG_MRS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_MRS	/;"	d
GLCONFIG_REARBEN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_REARBEN	/;"	d
GLCONFIG_SMEMBUSY	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GLCONFIG_SMEMBUSY	/;"	d
GLEICHMANN_AC97	include/ambapp_ids.h	/^#define GLEICHMANN_AC97 /;"	d
GLEICHMANN_ADCDAC	include/ambapp_ids.h	/^#define GLEICHMANN_ADCDAC /;"	d
GLEICHMANN_CUSTOM	include/ambapp_ids.h	/^#define GLEICHMANN_CUSTOM /;"	d
GLEICHMANN_DAC	include/ambapp_ids.h	/^#define GLEICHMANN_DAC /;"	d
GLEICHMANN_GEOLCD01	include/ambapp_ids.h	/^#define GLEICHMANN_GEOLCD01 /;"	d
GLEICHMANN_HIFC	include/ambapp_ids.h	/^#define GLEICHMANN_HIFC /;"	d
GLEICHMANN_HPI	include/ambapp_ids.h	/^#define GLEICHMANN_HPI /;"	d
GLEICHMANN_SPI	include/ambapp_ids.h	/^#define GLEICHMANN_SPI /;"	d
GLEICHMANN_SPIOC	include/ambapp_ids.h	/^#define GLEICHMANN_SPIOC /;"	d
GLEICHMANN_devices	cmd/ambapp.c	/^static ambapp_device_name GLEICHMANN_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
GLOBAL	drivers/net/phy/mv88e6352.c	/^#define GLOBAL	/;"	d	file:
GLOBAL1_CTRL	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL1_CTRL	/;"	d	file:
GLOBAL1_CTRL_SWRESET	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL1_CTRL_SWRESET	/;"	d	file:
GLOBAL1_MON_CTRL	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL1_MON_CTRL	/;"	d	file:
GLOBAL1_MON_CTRL_CPUDEST_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL1_MON_CTRL_CPUDEST_SHIFT	/;"	d	file:
GLOBAL1_MON_CTRL_CPUDEST_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL1_MON_CTRL_CPUDEST_WIDTH	/;"	d	file:
GLOBAL1_STATUS	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL1_STATUS	/;"	d	file:
GLOBAL2_REG_PHY_CMD	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL2_REG_PHY_CMD	/;"	d	file:
GLOBAL2_REG_PHY_DATA	drivers/net/phy/mv88e61xx.c	/^#define GLOBAL2_REG_PHY_DATA	/;"	d	file:
GLOBAL_BOOT_MODE_ADDR	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^#define GLOBAL_BOOT_MODE_ADDR /;"	d	file:
GLOBAL_CLK_CTRL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_CLK_CTRL	/;"	d
GLOBAL_CLK_SRC_HI	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_CLK_SRC_HI	/;"	d
GLOBAL_CORE_CNTRL	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_CORE_CNTRL	/;"	d	file:
GLOBAL_CTRL	drivers/net/phy/mv88e6352.c	/^#define GLOBAL_CTRL	/;"	d	file:
GLOBAL_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define GLOBAL_ENA	/;"	d
GLOBAL_INPUT_GAIN	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_INPUT_GAIN	/;"	d	file:
GLOBAL_INPUT_ISE1	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_INPUT_ISE1	/;"	d	file:
GLOBAL_INPUT_ISE2	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_INPUT_ISE2	/;"	d	file:
GLOBAL_INPUT_LOS	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_INPUT_LOS	/;"	d	file:
GLOBAL_INT_ENABLE	drivers/mtd/nand/denali.h	/^#define GLOBAL_INT_ENABLE	/;"	d
GLOBAL_INT_EN_FLAG	drivers/mtd/nand/denali.h	/^#define     GLOBAL_INT_EN_FLAG	/;"	d
GLOBAL_MISC_CTRL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_MISC_CTRL	/;"	d
GLOBAL_OUTPUT_LEVEL	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_OUTPUT_LEVEL	/;"	d	file:
GLOBAL_OUTPUT_PE1	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_OUTPUT_PE1	/;"	d	file:
GLOBAL_OUTPUT_PE2	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_OUTPUT_PE2	/;"	d	file:
GLOBAL_OUTPUT_TERMINATION	board/freescale/common/vsc3316_3308.c	/^#define GLOBAL_OUTPUT_TERMINATION	/;"	d	file:
GLOBAL_OUT_NAK	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define GLOBAL_OUT_NAK	/;"	d
GLOBAL_PM_CTRL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_PM_CTRL	/;"	d
GLOBAL_PM_CTRL_REG_25MHZ_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_PM_CTRL_REG_25MHZ_VAL	/;"	d
GLOBAL_PM_CTRL_REG_40MHZ_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_PM_CTRL_REG_40MHZ_VAL	/;"	d
GLOBAL_PM_CTRL_REG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLOBAL_PM_CTRL_REG_MASK	/;"	d
GLOBAL_RESET_BIOS_MRC	arch/x86/include/asm/me_common.h	/^#define GLOBAL_RESET_BIOS_MRC	/;"	d
GLOBAL_RESET_BIOS_POST	arch/x86/include/asm/me_common.h	/^#define GLOBAL_RESET_BIOS_POST	/;"	d
GLOBAL_RESET_MEBX	arch/x86/include/asm/me_common.h	/^#define GLOBAL_RESET_MEBX	/;"	d
GLOBAL_STATUS	drivers/net/phy/mv88e6352.c	/^#define GLOBAL_STATUS	/;"	d	file:
GLOBAL_TIMER_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GLOBAL_TIMER_BASE_ADDR /;"	d
GLOBAL_TIMER_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GLOBAL_TIMER_BASE_ADDR /;"	d
GLOBAL_TIMER_BASE_ADDR	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define GLOBAL_TIMER_BASE_ADDR	/;"	d
GLOBAL_TIMER_OFFSET	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GLOBAL_TIMER_OFFSET	/;"	d
GLOB_CLK_SRC_LO_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define GLOB_CLK_SRC_LO_ADDR(/;"	d
GLOB_HWCTL_DEFAULT_BLKS	drivers/mtd/nand/denali.h	/^#define GLOB_HWCTL_DEFAULT_BLKS /;"	d
GLOB_PHY_CTRL0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define GLOB_PHY_CTRL0_ADDR(/;"	d
GLO_I0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_I0_B_MARK, VI3_DATA6_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_I0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_I0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_I0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_I1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_I1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_I1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_I1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_Q0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_Q0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_Q0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_Q0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_Q1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_Q1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_Q1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_Q1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_RFON_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_RFON_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona307835a0103	file:
GLO_RFON_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_RFON_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_RFON_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_RFON_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SCLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SCLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SCLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_SCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona307835a0103	file:
GLO_SDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_SDATA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SDATA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GLO_SDATA_C_MARK, VI1_DATA6_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_SDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona307835a0103	file:
GLO_SS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_SS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
GLO_SS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GLO_SS_C_MARK, VI1_DATA7_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GLO_SS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GLUE_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GLUE_REG	/;"	d
GM	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define GM	/;"	d
GMAC0_DEV_CTRL_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DEV_CTRL_ADDR	/;"	d
GMAC0_DMA_RX_ADDR_HIGH_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_RX_ADDR_HIGH_ADDR /;"	d
GMAC0_DMA_RX_ADDR_LOW_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_RX_ADDR_LOW_ADDR /;"	d
GMAC0_DMA_RX_CTRL_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_RX_CTRL_ADDR	/;"	d
GMAC0_DMA_RX_PTR_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_RX_PTR_ADDR /;"	d
GMAC0_DMA_RX_STATUS0_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_RX_STATUS0_ADDR /;"	d
GMAC0_DMA_RX_STATUS1_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_RX_STATUS1_ADDR /;"	d
GMAC0_DMA_TX_ADDR_HIGH_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_TX_ADDR_HIGH_ADDR /;"	d
GMAC0_DMA_TX_ADDR_LOW_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_TX_ADDR_LOW_ADDR /;"	d
GMAC0_DMA_TX_CTRL_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_TX_CTRL_ADDR	/;"	d
GMAC0_DMA_TX_PTR_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_TX_PTR_ADDR /;"	d
GMAC0_DMA_TX_STATUS0_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_TX_STATUS0_ADDR /;"	d
GMAC0_DMA_TX_STATUS1_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_DMA_TX_STATUS1_ADDR /;"	d
GMAC0_INTR_RECV_LAZY_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_INTR_RECV_LAZY_ADDR	/;"	d
GMAC0_INT_STATUS_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_INT_STATUS_ADDR	/;"	d
GMAC0_IRL_FRAMECOUNT_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_IRL_FRAMECOUNT_SHIFT	/;"	d
GMAC0_PHY_CTRL_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_PHY_CTRL_ADDR	/;"	d
GMAC0_REG_BASE	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC0_REG_BASE	/;"	d
GMACSL_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_ENABLE	/;"	d
GMACSL_ENABLE_FULL_DUPLEX	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_ENABLE_FULL_DUPLEX	/;"	d
GMACSL_ENABLE_GIG_MODE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_ENABLE_GIG_MODE	/;"	d
GMACSL_ENABLE_LOOPBACK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_ENABLE_LOOPBACK	/;"	d
GMACSL_RET_CONFIG_FAIL_RESET_ACTIVE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RET_CONFIG_FAIL_RESET_ACTIVE	/;"	d
GMACSL_RET_INVALID_PORT	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RET_INVALID_PORT	/;"	d
GMACSL_RET_OK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RET_OK	/;"	d
GMACSL_RET_WARN_MAXLEN_TOO_BIG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RET_WARN_MAXLEN_TOO_BIG	/;"	d
GMACSL_RET_WARN_RESET_INCOMPLETE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RET_WARN_RESET_INCOMPLETE	/;"	d
GMACSL_RX_ENABLE_CMD_IDLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_CMD_IDLE	/;"	d
GMACSL_RX_ENABLE_EXT_CTL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_EXT_CTL	/;"	d
GMACSL_RX_ENABLE_FLOW_CTL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_FLOW_CTL	/;"	d
GMACSL_RX_ENABLE_GIG_FORCE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_GIG_FORCE	/;"	d
GMACSL_RX_ENABLE_IFCTL_A	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_IFCTL_A	/;"	d
GMACSL_RX_ENABLE_IFCTL_B	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_IFCTL_B	/;"	d
GMACSL_RX_ENABLE_RCV_CONTROL_FRAMES	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_RCV_CONTROL_FRAMES	/;"	d
GMACSL_RX_ENABLE_RCV_ERROR_FRAMES	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_RCV_ERROR_FRAMES	/;"	d
GMACSL_RX_ENABLE_RCV_SHORT_FRAMES	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_RX_ENABLE_RCV_SHORT_FRAMES	/;"	d
GMACSL_TX_ENABLE_FLOW_CTL	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_TX_ENABLE_FLOW_CTL	/;"	d
GMACSL_TX_ENABLE_PACE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_TX_ENABLE_PACE	/;"	d
GMACSL_TX_ENABLE_SHORT_GAP	arch/arm/include/asm/ti-common/keystone_net.h	/^#define GMACSL_TX_ENABLE_SHORT_GAP	/;"	d
GMAC_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GMAC_BASE_ADDR /;"	d
GMAC_CLK_SEL_125M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_CLK_SEL_125M	= 0,$/;"	e	enum:__anonbeb2b9771203
GMAC_CLK_SEL_25M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_CLK_SEL_25M	= 0x3,$/;"	e	enum:__anonbeb2b9771203
GMAC_CLK_SEL_2_5M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_CLK_SEL_2_5M	= 0x2,$/;"	e	enum:__anonbeb2b9771203
GMAC_CLK_SEL_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_CLK_SEL_MASK	= 3,$/;"	e	enum:__anonbeb2b9771203
GMAC_CLK_SEL_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_CLK_SEL_SHIFT	= 0xc,$/;"	e	enum:__anonbeb2b9771203
GMAC_DMA_ADDR_HIGH_OFFSET	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_DMA_ADDR_HIGH_OFFSET	/;"	d
GMAC_DMA_ADDR_LOW_OFFSET	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_DMA_ADDR_LOW_OFFSET	/;"	d
GMAC_DMA_PTR_OFFSET	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_DMA_PTR_OFFSET	/;"	d
GMAC_DMA_STATUS0_OFFSET	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_DMA_STATUS0_OFFSET	/;"	d
GMAC_DMA_STATUS1_OFFSET	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_DMA_STATUS1_OFFSET	/;"	d
GMAC_FLOWCTRL_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_FLOWCTRL_MASK	= 1,$/;"	e	enum:__anonbeb2b9771203
GMAC_FLOWCTRL_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_FLOWCTRL_SHIFT	= 0x9,$/;"	e	enum:__anonbeb2b9771203
GMAC_MII_BUSY_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_BUSY_SHIFT	/;"	d
GMAC_MII_CTRL_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_CTRL_ADDR	/;"	d
GMAC_MII_CTRL_BYP_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_CTRL_BYP_SHIFT	/;"	d
GMAC_MII_CTRL_EXT_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_CTRL_EXT_SHIFT	/;"	d
GMAC_MII_DATA_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_DATA_ADDR	/;"	d
GMAC_MII_DATA_READ_CMD	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_DATA_READ_CMD	/;"	d
GMAC_MII_DATA_WRITE_CMD	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_DATA_WRITE_CMD	/;"	d
GMAC_MII_PHY_ADDR_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_PHY_ADDR_SHIFT	/;"	d
GMAC_MII_PHY_REG_SHIFT	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_MII_PHY_REG_SHIFT	/;"	d
GMAC_PHY_INTF_SEL_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_PHY_INTF_SEL_MASK	= 0x7,$/;"	e	enum:__anonbeb2b9771203
GMAC_PHY_INTF_SEL_RGMII	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_PHY_INTF_SEL_RGMII	= 0x1,$/;"	e	enum:__anonbeb2b9771203
GMAC_PHY_INTF_SEL_RMII	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_PHY_INTF_SEL_RMII	= 0x4,$/;"	e	enum:__anonbeb2b9771203
GMAC_PHY_INTF_SEL_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_PHY_INTF_SEL_SHIFT	= 0x6,$/;"	e	enum:__anonbeb2b9771203
GMAC_RESET_DELAY	drivers/net/bcm-sf2-eth-gmac.h	/^#define GMAC_RESET_DELAY	/;"	d
GMAC_SPEED_100M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_SPEED_100M,$/;"	e	enum:__anonbeb2b9771203
GMAC_SPEED_10M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_SPEED_10M		= 0,$/;"	e	enum:__anonbeb2b9771203
GMAC_SPEED_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_SPEED_MASK		= 1,$/;"	e	enum:__anonbeb2b9771203
GMAC_SPEED_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GMAC_SPEED_SHIFT	= 0xa,$/;"	e	enum:__anonbeb2b9771203
GMAC_TX_DELAY	board/sunxi/Kconfig	/^config GMAC_TX_DELAY$/;"	c
GMC_3D_FCN_EN_CLR	include/radeon.h	/^#define GMC_3D_FCN_EN_CLR	/;"	d
GMC_3D_FCN_EN_SET	include/radeon.h	/^#define GMC_3D_FCN_EN_SET	/;"	d
GMC_AUX_CLIP_CLEAR	include/radeon.h	/^#define GMC_AUX_CLIP_CLEAR	/;"	d
GMC_AUX_CLIP_LEAVE	include/radeon.h	/^#define GMC_AUX_CLIP_LEAVE	/;"	d
GMC_BRUSH_1x8COLOR	include/radeon.h	/^#define GMC_BRUSH_1x8COLOR	/;"	d
GMC_BRUSH_1x8MONO	include/radeon.h	/^#define GMC_BRUSH_1x8MONO	/;"	d
GMC_BRUSH_1x8MONO_LBKGD	include/radeon.h	/^#define GMC_BRUSH_1x8MONO_LBKGD	/;"	d
GMC_BRUSH_32x1MONO	include/radeon.h	/^#define GMC_BRUSH_32x1MONO	/;"	d
GMC_BRUSH_32x1MONO_LBKGD	include/radeon.h	/^#define GMC_BRUSH_32x1MONO_LBKGD	/;"	d
GMC_BRUSH_32x32MONO	include/radeon.h	/^#define GMC_BRUSH_32x32MONO	/;"	d
GMC_BRUSH_32x32MONO_LBKGD	include/radeon.h	/^#define GMC_BRUSH_32x32MONO_LBKGD	/;"	d
GMC_BRUSH_8x1COLOR	include/radeon.h	/^#define GMC_BRUSH_8x1COLOR	/;"	d
GMC_BRUSH_8x1MONO	include/radeon.h	/^#define GMC_BRUSH_8x1MONO	/;"	d
GMC_BRUSH_8x1MONO_LBKGD	include/radeon.h	/^#define GMC_BRUSH_8x1MONO_LBKGD	/;"	d
GMC_BRUSH_8x8COLOR	include/radeon.h	/^#define GMC_BRUSH_8x8COLOR	/;"	d
GMC_BRUSH_8x8MONO	include/radeon.h	/^#define GMC_BRUSH_8x8MONO	/;"	d
GMC_BRUSH_8x8MONO_LBKGD	include/radeon.h	/^#define GMC_BRUSH_8x8MONO_LBKGD	/;"	d
GMC_BRUSH_NONE	include/radeon.h	/^#define GMC_BRUSH_NONE	/;"	d
GMC_BRUSH_SOLIDCOLOR	include/radeon.h	/^#define GMC_BRUSH_SOLIDCOLOR	/;"	d
GMC_BRUSH_SOLID_COLOR	include/radeon.h	/^#define GMC_BRUSH_SOLID_COLOR	/;"	d
GMC_BYTE_ORDER_LSB_TO_MSB	include/radeon.h	/^#define GMC_BYTE_ORDER_LSB_TO_MSB	/;"	d
GMC_BYTE_ORDER_MSB_TO_LSB	include/radeon.h	/^#define GMC_BYTE_ORDER_MSB_TO_LSB	/;"	d
GMC_CLR_CMP_CNTL_DIS	include/radeon.h	/^#define GMC_CLR_CMP_CNTL_DIS	/;"	d
GMC_DP_CONVERSION_TEMP_6500	include/radeon.h	/^#define GMC_DP_CONVERSION_TEMP_6500	/;"	d
GMC_DP_CONVERSION_TEMP_9300	include/radeon.h	/^#define GMC_DP_CONVERSION_TEMP_9300	/;"	d
GMC_DP_SRC_HOST	include/radeon.h	/^#define GMC_DP_SRC_HOST	/;"	d
GMC_DP_SRC_HOST_BYTEALIGN	include/radeon.h	/^#define GMC_DP_SRC_HOST_BYTEALIGN	/;"	d
GMC_DP_SRC_RECT	include/radeon.h	/^#define GMC_DP_SRC_RECT	/;"	d
GMC_DST_15BPP	include/radeon.h	/^#define GMC_DST_15BPP	/;"	d
GMC_DST_16BPP	include/radeon.h	/^#define GMC_DST_16BPP	/;"	d
GMC_DST_16BPP_ARGB4444	include/radeon.h	/^#define GMC_DST_16BPP_ARGB4444	/;"	d
GMC_DST_16BPP_VYUY422	include/radeon.h	/^#define GMC_DST_16BPP_VYUY422	/;"	d
GMC_DST_16BPP_YVYU422	include/radeon.h	/^#define GMC_DST_16BPP_YVYU422	/;"	d
GMC_DST_24BPP	include/radeon.h	/^#define GMC_DST_24BPP	/;"	d
GMC_DST_32BPP	include/radeon.h	/^#define GMC_DST_32BPP	/;"	d
GMC_DST_32BPP_AYUV444	include/radeon.h	/^#define GMC_DST_32BPP_AYUV444	/;"	d
GMC_DST_8BPP	include/radeon.h	/^#define GMC_DST_8BPP	/;"	d
GMC_DST_8BPP_RGB332	include/radeon.h	/^#define GMC_DST_8BPP_RGB332	/;"	d
GMC_DST_8BPP_RGB8	include/radeon.h	/^#define GMC_DST_8BPP_RGB8	/;"	d
GMC_DST_8BPP_Y8	include/radeon.h	/^#define GMC_DST_8BPP_Y8	/;"	d
GMC_DST_CLIP_DEFAULT	include/radeon.h	/^#define GMC_DST_CLIP_DEFAULT	/;"	d
GMC_DST_CLIP_LEAVE	include/radeon.h	/^#define GMC_DST_CLIP_LEAVE	/;"	d
GMC_DST_CLR_CMP_FCN_CLEAR	include/radeon.h	/^#define GMC_DST_CLR_CMP_FCN_CLEAR	/;"	d
GMC_DST_CLR_CMP_FCN_LEAVE	include/radeon.h	/^#define GMC_DST_CLR_CMP_FCN_LEAVE	/;"	d
GMC_DST_PITCH_OFFSET_DEFAULT	include/radeon.h	/^#define GMC_DST_PITCH_OFFSET_DEFAULT	/;"	d
GMC_DST_PITCH_OFFSET_LEAVE	include/radeon.h	/^#define GMC_DST_PITCH_OFFSET_LEAVE	/;"	d
GMC_SRC_CLIP_DEFAULT	include/radeon.h	/^#define GMC_SRC_CLIP_DEFAULT	/;"	d
GMC_SRC_CLIP_LEAVE	include/radeon.h	/^#define GMC_SRC_CLIP_LEAVE	/;"	d
GMC_SRC_DATATYPE_COLOR	include/radeon.h	/^#define GMC_SRC_DATATYPE_COLOR	/;"	d
GMC_SRC_DSTCOLOR	include/radeon.h	/^#define GMC_SRC_DSTCOLOR	/;"	d
GMC_SRC_MONO	include/radeon.h	/^#define GMC_SRC_MONO	/;"	d
GMC_SRC_MONO_LBKGD	include/radeon.h	/^#define GMC_SRC_MONO_LBKGD	/;"	d
GMC_SRC_PITCH_OFFSET_DEFAULT	include/radeon.h	/^#define GMC_SRC_PITCH_OFFSET_DEFAULT	/;"	d
GMC_SRC_PITCH_OFFSET_LEAVE	include/radeon.h	/^#define GMC_SRC_PITCH_OFFSET_LEAVE	/;"	d
GMC_WRITE_MASK_LEAVE	include/radeon.h	/^#define GMC_WRITE_MASK_LEAVE	/;"	d
GMC_WRITE_MASK_SET	include/radeon.h	/^#define GMC_WRITE_MASK_SET	/;"	d
GMII1_SEL_MII	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GMII1_SEL_MII	/;"	d
GMII1_SEL_MII	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GMII1_SEL_MII	/;"	d
GMII1_SEL_RGMII	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GMII1_SEL_RGMII	/;"	d
GMII1_SEL_RGMII	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GMII1_SEL_RGMII	/;"	d
GMII1_SEL_RMII	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GMII1_SEL_RMII	/;"	d
GMII1_SEL_RMII	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GMII1_SEL_RMII	/;"	d
GMII2_SEL_MII	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GMII2_SEL_MII	/;"	d
GMII2_SEL_MII	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GMII2_SEL_MII	/;"	d
GMII2_SEL_RGMII	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GMII2_SEL_RGMII	/;"	d
GMII2_SEL_RGMII	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GMII2_SEL_RGMII	/;"	d
GMII2_SEL_RMII	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GMII2_SEL_RMII	/;"	d
GMII2_SEL_RMII	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GMII2_SEL_RMII	/;"	d
GMII_LED0_ACTIVE	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED0_ACTIVE	/;"	d	file:
GMII_LED0_LINK_10	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED0_LINK_10	/;"	d	file:
GMII_LED0_LINK_100	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED0_LINK_100	/;"	d	file:
GMII_LED0_LINK_1000	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED0_LINK_1000	/;"	d	file:
GMII_LED1_ACTIVE	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED1_ACTIVE	/;"	d	file:
GMII_LED1_LINK_10	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED1_LINK_10	/;"	d	file:
GMII_LED1_LINK_100	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED1_LINK_100	/;"	d	file:
GMII_LED1_LINK_1000	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED1_LINK_1000	/;"	d	file:
GMII_LED2_ACTIVE	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED2_ACTIVE	/;"	d	file:
GMII_LED2_LINK_10	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED2_LINK_10	/;"	d	file:
GMII_LED2_LINK_100	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED2_LINK_100	/;"	d	file:
GMII_LED2_LINK_1000	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED2_LINK_1000	/;"	d	file:
GMII_LED_ACT	drivers/usb/eth/asix88179.c	/^#define GMII_LED_ACT	/;"	d	file:
GMII_LED_ACTIVE_MASK	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED_ACTIVE_MASK	/;"	d	file:
GMII_LED_LINK	drivers/usb/eth/asix88179.c	/^#define GMII_LED_LINK	/;"	d	file:
GMII_LED_LINK_MASK	drivers/usb/eth/asix88179.c	/^	#define	GMII_LED_LINK_MASK	/;"	d	file:
GMII_PHYPAGE	drivers/usb/eth/asix88179.c	/^#define GMII_PHYPAGE	/;"	d	file:
GMII_PHY_PAGE_SELECT	drivers/usb/eth/asix88179.c	/^#define GMII_PHY_PAGE_SELECT	/;"	d	file:
GMII_PHY_PGSEL_EXT	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PGSEL_EXT	/;"	d	file:
GMII_PHY_PGSEL_PAGE0	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PGSEL_PAGE0	/;"	d	file:
GMII_PHY_PHYSR	drivers/usb/eth/asix88179.c	/^#define GMII_PHY_PHYSR	/;"	d	file:
GMII_PHY_PHYSR_100	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PHYSR_100	/;"	d	file:
GMII_PHY_PHYSR_FULL	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PHYSR_FULL	/;"	d	file:
GMII_PHY_PHYSR_GIGA	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PHYSR_GIGA	/;"	d	file:
GMII_PHY_PHYSR_LINK	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PHYSR_LINK	/;"	d	file:
GMII_PHY_PHYSR_SMASK	drivers/usb/eth/asix88179.c	/^	#define GMII_PHY_PHYSR_SMASK	/;"	d	file:
GMII_SEL_MODE_MASK	drivers/net/cpsw.c	/^#define GMII_SEL_MODE_MASK	/;"	d	file:
GNSLCT	include/power/max8997_pmic.h	/^#define GNSLCT /;"	d
GNU_FPOST_ATTR	include/post.h	/^#define GNU_FPOST_ATTR	/;"	d
GNU_FPOST_ATTR	include/post.h	/^#define GNU_FPOST_ATTR$/;"	d
GOFLEXHOME_OE_HIGH	include/configs/goflexhome.h	/^#define GOFLEXHOME_OE_HIGH /;"	d
GOFLEXHOME_OE_LOW	include/configs/goflexhome.h	/^#define GOFLEXHOME_OE_LOW /;"	d
GOFLEXHOME_OE_VAL_HIGH	include/configs/goflexhome.h	/^#define GOFLEXHOME_OE_VAL_HIGH /;"	d
GOFLEXHOME_OE_VAL_LOW	include/configs/goflexhome.h	/^#define GOFLEXHOME_OE_VAL_LOW /;"	d
GOOD_BLOCK	drivers/mtd/nand/denali.h	/^#define GOOD_BLOCK /;"	d
GORESET	arch/mips/include/asm/malta.h	/^#define GORESET	/;"	d
GOT2_TYPE	drivers/bios_emulator/include/x86emu.h	/^#define GOT2_TYPE	/;"	d
GO_DIG	arch/arm/include/asm/arch-omap3/dss.h	/^#define GO_DIG	/;"	d
GO_LCD	arch/arm/include/asm/arch-omap3/dss.h	/^#define GO_LCD	/;"	d
GO_STATE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define GO_STATE	/;"	d
GO_STATE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	GO_STATE			= 2,$/;"	e	enum:__anon957231910203	file:
GP27_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   GP27_EN	/;"	d
GP27_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   GP27_STS	/;"	d
GPA0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA0,$/;"	e	enum:s3c2440_gpio
GPA1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA1,$/;"	e	enum:s3c2440_gpio
GPA10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA10,$/;"	e	enum:s3c2440_gpio
GPA11	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA11,$/;"	e	enum:s3c2440_gpio
GPA12	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA12,$/;"	e	enum:s3c2440_gpio
GPA13	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA13,$/;"	e	enum:s3c2440_gpio
GPA14	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA14,$/;"	e	enum:s3c2440_gpio
GPA15	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA15,$/;"	e	enum:s3c2440_gpio
GPA16	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA16,$/;"	e	enum:s3c2440_gpio
GPA17	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA17,$/;"	e	enum:s3c2440_gpio
GPA18	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA18,$/;"	e	enum:s3c2440_gpio
GPA19	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA19,$/;"	e	enum:s3c2440_gpio
GPA2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA2,$/;"	e	enum:s3c2440_gpio
GPA20	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA20,$/;"	e	enum:s3c2440_gpio
GPA21	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA21,$/;"	e	enum:s3c2440_gpio
GPA22	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA22,$/;"	e	enum:s3c2440_gpio
GPA23	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA23,$/;"	e	enum:s3c2440_gpio
GPA24	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA24,$/;"	e	enum:s3c2440_gpio
GPA3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA3,$/;"	e	enum:s3c2440_gpio
GPA4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA4,$/;"	e	enum:s3c2440_gpio
GPA5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA5,$/;"	e	enum:s3c2440_gpio
GPA6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA6,$/;"	e	enum:s3c2440_gpio
GPA7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA7,$/;"	e	enum:s3c2440_gpio
GPA8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA8,$/;"	e	enum:s3c2440_gpio
GPA9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPA9,$/;"	e	enum:s3c2440_gpio
GPADCR	include/twl6030.h	/^#define GPADCR	/;"	d
GPADCS	include/twl6030.h	/^#define GPADCS	/;"	d
GPADC_CTRL2_CH18_SCALER_EN	include/twl6030.h	/^#define GPADC_CTRL2_CH18_SCALER_EN	/;"	d
GPADC_CTRL_SCALER_DIV4	include/twl6030.h	/^#define GPADC_CTRL_SCALER_DIV4	/;"	d
GPB0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB0 = 32,$/;"	e	enum:s3c2440_gpio
GPB1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB1,$/;"	e	enum:s3c2440_gpio
GPB10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB10,$/;"	e	enum:s3c2440_gpio
GPB2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB2,$/;"	e	enum:s3c2440_gpio
GPB3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB3,$/;"	e	enum:s3c2440_gpio
GPB4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB4,$/;"	e	enum:s3c2440_gpio
GPB5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB5,$/;"	e	enum:s3c2440_gpio
GPB6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB6,$/;"	e	enum:s3c2440_gpio
GPB7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB7,$/;"	e	enum:s3c2440_gpio
GPB8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB8,$/;"	e	enum:s3c2440_gpio
GPB9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPB9,$/;"	e	enum:s3c2440_gpio
GPC0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC0 = 64,$/;"	e	enum:s3c2440_gpio
GPC1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC1,$/;"	e	enum:s3c2440_gpio
GPC10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC10,$/;"	e	enum:s3c2440_gpio
GPC11	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC11,$/;"	e	enum:s3c2440_gpio
GPC12	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC12,$/;"	e	enum:s3c2440_gpio
GPC13	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC13,$/;"	e	enum:s3c2440_gpio
GPC14	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC14,$/;"	e	enum:s3c2440_gpio
GPC15	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC15,$/;"	e	enum:s3c2440_gpio
GPC2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC2,$/;"	e	enum:s3c2440_gpio
GPC3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC3,$/;"	e	enum:s3c2440_gpio
GPC4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC4,$/;"	e	enum:s3c2440_gpio
GPC5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC5,$/;"	e	enum:s3c2440_gpio
GPC6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC6,$/;"	e	enum:s3c2440_gpio
GPC7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC7,$/;"	e	enum:s3c2440_gpio
GPC8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC8,$/;"	e	enum:s3c2440_gpio
GPC9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPC9,$/;"	e	enum:s3c2440_gpio
GPCH0_LSB	include/twl6030.h	/^#define GPCH0_LSB	/;"	d
GPCH0_MSB	include/twl6030.h	/^#define GPCH0_MSB	/;"	d
GPCNTL	include/sym53c8xx.h	/^#define GPCNTL	/;"	d
GPCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPCR /;"	d
GPCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPCR(/;"	d
GPCR	include/SA-1100.h	/^#define GPCR	/;"	d
GPCR	include/SA-1100.h	/^#define GPCR /;"	d
GPCR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPCR0	/;"	d
GPCR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPCR1	/;"	d
GPCR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPCR2	/;"	d
GPCR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPCR3	/;"	d
GPCR_GPIO0_OUT	drivers/net/dm9000x.h	/^#define GPCR_GPIO0_OUT	/;"	d
GPC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPC_BASE_ADDR	/;"	d
GPC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPC_BASE_ADDR /;"	d
GPC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define GPC_BASE_ADDR	/;"	d
GPC_CPU_PGC_SW_PDN_REQ	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define GPC_CPU_PGC_SW_PDN_REQ	/;"	d	file:
GPC_CPU_PGC_SW_PUP_REQ	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define GPC_CPU_PGC_SW_PUP_REQ	/;"	d	file:
GPC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPC_IPS_BASE_ADDR /;"	d
GPC_PGC_C1	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define GPC_PGC_C1	/;"	d	file:
GPD0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD0 = 96,$/;"	e	enum:s3c2440_gpio
GPD1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD1,$/;"	e	enum:s3c2440_gpio
GPD10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD10,$/;"	e	enum:s3c2440_gpio
GPD11	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD11,$/;"	e	enum:s3c2440_gpio
GPD12	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD12,$/;"	e	enum:s3c2440_gpio
GPD13	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD13,$/;"	e	enum:s3c2440_gpio
GPD14	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD14,$/;"	e	enum:s3c2440_gpio
GPD15	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD15,$/;"	e	enum:s3c2440_gpio
GPD1_OFFSET	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^#define	GPD1_OFFSET	/;"	d	file:
GPD2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD2,$/;"	e	enum:s3c2440_gpio
GPD3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD3,$/;"	e	enum:s3c2440_gpio
GPD4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD4,$/;"	e	enum:s3c2440_gpio
GPD5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD5,$/;"	e	enum:s3c2440_gpio
GPD6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD6,$/;"	e	enum:s3c2440_gpio
GPD7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD7,$/;"	e	enum:s3c2440_gpio
GPD8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD8,$/;"	e	enum:s3c2440_gpio
GPD9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPD9,$/;"	e	enum:s3c2440_gpio
GPDMA_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GPDMA_BASE_ADDR /;"	d
GPDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPDR(/;"	d
GPDR	include/SA-1100.h	/^#define GPDR	/;"	d
GPDR	include/SA-1100.h	/^#define GPDR /;"	d
GPDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPDR0	/;"	d
GPDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPDR1	/;"	d
GPDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPDR2	/;"	d
GPDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPDR3	/;"	d
GPDR_In	include/SA-1100.h	/^#define GPDR_In	/;"	d
GPDR_Out	include/SA-1100.h	/^#define GPDR_Out	/;"	d
GPE0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE0 = 128,$/;"	e	enum:s3c2440_gpio
GPE0_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define GPE0_EN(/;"	d
GPE0_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPE0_EN	/;"	d
GPE0_REG_MAX	arch/x86/include/asm/arch-broadwell/pm.h	/^#define GPE0_REG_MAX	/;"	d
GPE0_REG_SIZE	arch/x86/include/asm/arch-broadwell/pm.h	/^#define GPE0_REG_SIZE	/;"	d
GPE0_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define GPE0_STS(/;"	d
GPE0_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPE0_STS	/;"	d
GPE1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE1,$/;"	e	enum:s3c2440_gpio
GPE10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE10,$/;"	e	enum:s3c2440_gpio
GPE11	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE11,$/;"	e	enum:s3c2440_gpio
GPE12	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE12,$/;"	e	enum:s3c2440_gpio
GPE13	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE13,$/;"	e	enum:s3c2440_gpio
GPE14	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE14,$/;"	e	enum:s3c2440_gpio
GPE15	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE15,$/;"	e	enum:s3c2440_gpio
GPE2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE2,$/;"	e	enum:s3c2440_gpio
GPE3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE3,$/;"	e	enum:s3c2440_gpio
GPE4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE4,$/;"	e	enum:s3c2440_gpio
GPE5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE5,$/;"	e	enum:s3c2440_gpio
GPE6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE6,$/;"	e	enum:s3c2440_gpio
GPE7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE7,$/;"	e	enum:s3c2440_gpio
GPE8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE8,$/;"	e	enum:s3c2440_gpio
GPE9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPE9,$/;"	e	enum:s3c2440_gpio
GPE_31_0	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GPE_31_0	/;"	d
GPE_63_32	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GPE_63_32	/;"	d
GPE_94_64	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GPE_94_64	/;"	d
GPE_CNTL	arch/x86/include/asm/arch-broadwell/pm.h	/^#define GPE_CNTL	/;"	d
GPE_CNTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPE_CNTL	/;"	d
GPE_STD	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GPE_STD	/;"	d
GPF0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF0 = 160,$/;"	e	enum:s3c2440_gpio
GPF1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF1,$/;"	e	enum:s3c2440_gpio
GPF2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF2,$/;"	e	enum:s3c2440_gpio
GPF3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF3,$/;"	e	enum:s3c2440_gpio
GPF4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF4,$/;"	e	enum:s3c2440_gpio
GPF5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF5,$/;"	e	enum:s3c2440_gpio
GPF6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF6,$/;"	e	enum:s3c2440_gpio
GPF7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPF7,$/;"	e	enum:s3c2440_gpio
GPG0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG0 = 192,$/;"	e	enum:s3c2440_gpio
GPG1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG1,$/;"	e	enum:s3c2440_gpio
GPG10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG10,$/;"	e	enum:s3c2440_gpio
GPG11	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG11,$/;"	e	enum:s3c2440_gpio
GPG12	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG12,$/;"	e	enum:s3c2440_gpio
GPG13	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG13,$/;"	e	enum:s3c2440_gpio
GPG14	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG14,$/;"	e	enum:s3c2440_gpio
GPG15	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG15,$/;"	e	enum:s3c2440_gpio
GPG2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG2,$/;"	e	enum:s3c2440_gpio
GPG3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG3,$/;"	e	enum:s3c2440_gpio
GPG4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG4,$/;"	e	enum:s3c2440_gpio
GPG5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG5,$/;"	e	enum:s3c2440_gpio
GPG6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG6,$/;"	e	enum:s3c2440_gpio
GPG7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG7,$/;"	e	enum:s3c2440_gpio
GPG8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG8,$/;"	e	enum:s3c2440_gpio
GPG9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPG9,$/;"	e	enum:s3c2440_gpio
GPH0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH0 = 224,$/;"	e	enum:s3c2440_gpio
GPH1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH1,$/;"	e	enum:s3c2440_gpio
GPH10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH10,$/;"	e	enum:s3c2440_gpio
GPH2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH2,$/;"	e	enum:s3c2440_gpio
GPH3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH3,$/;"	e	enum:s3c2440_gpio
GPH4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH4,$/;"	e	enum:s3c2440_gpio
GPH5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH5,$/;"	e	enum:s3c2440_gpio
GPH6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH6,$/;"	e	enum:s3c2440_gpio
GPH7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH7,$/;"	e	enum:s3c2440_gpio
GPH8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH8,$/;"	e	enum:s3c2440_gpio
GPH9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPH9,$/;"	e	enum:s3c2440_gpio
GPHY_STS_MSK	drivers/usb/eth/r8152.h	/^#define GPHY_STS_MSK	/;"	d
GPI0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	GPO0_MARK,	GPI0_MARK,	GPO1_MARK,	GPI1_MARK,$/;"	e	enum:__anona304c1340103	file:
GPI0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	GPO0_MARK,	GPI0_MARK,	GPO1_MARK,	GPI1_MARK,$/;"	e	enum:__anona304c1340103	file:
GPI1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPI7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPI7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPIMAGE_HDR_SIZE	tools/gpheader.h	/^#define GPIMAGE_HDR_SIZE /;"	d
GPIO	include/ns87308.h	/^struct GPIO$/;"	s
GPIO Support	drivers/gpio/Kconfig	/^menu "GPIO Support"$/;"	m
GPIO0	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO0	/;"	d
GPIO0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO0	/;"	d
GPIO0	arch/powerpc/dts/canyonlands.dts	/^			GPIO0: gpio@ef600b00 {$/;"	l
GPIO0	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO0	/;"	d
GPIO0	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO0	/;"	d
GPIO0	board/amcc/bamboo/bamboo.h	/^#define GPIO0	/;"	d
GPIO0A0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A0_I2C0_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A0_I2C0_SCL,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A0_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A0_PWM1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A0_PWM1,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A1_I2C0_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A1_I2C0_SDA,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A1_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A1_PWM2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A1_PWM2,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A2_I2C1_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A2_I2C1_SCL,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A2_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A3_I2C1_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A3_I2C1_SDA,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A3_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0103
GPIO0A3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0A3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0103
GPIO0B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B0_I2S1_SDO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B0_I2S1_SDO,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B0_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B0_MMC1_CMD	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B0_MMC1_CMD,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B1_I2S1_MCLK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B1_I2S1_MCLK,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B1_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B1_MMC1_CLKOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B1_MMC1_CLKOUT,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B3_I2S1_LRCKRX	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B3_I2S1_LRCKRX,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B3_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B3_MMC1_D0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B3_MMC1_D0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B4_I2S1_LRCKTX	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B4_I2S1_LRCKTX,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B4_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B4_MMC1_D1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B4_MMC1_D1,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B5_I2S1_SDI	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B5_I2S1_SDI,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B5_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B5_MMC1_D2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B5_MMC1_D2,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B6_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B6_I2S1_SCLK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B6_I2S1_SCLK,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B6_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B6_MMC1_D3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B6_MMC1_D3,$/;"	e	enum:__anonbe8bc20e0203
GPIO0B6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0B6_SHIFT		= 12,$/;"	e	enum:__anonbe8bc20e0203
GPIO0C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C0_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C0_UART0_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C0_UART0_SOUT,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C1_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C1_UART0_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C1_UART0_SIN,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C2_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C2_UART0_RTSN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C2_UART0_RTSN,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C3_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C3_UART0_CTSN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C3_UART0_CTSN,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C4_DRIVE_VBUS	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C4_DRIVE_VBUS,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C4_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0303
GPIO0C4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0C4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0303
GPIO0D2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D2_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D2_PWM0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D2_PWM0,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D3_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D3_PWM3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D3_PWM3,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D4_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0403
GPIO0D4_SPDIF	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO0D4_SPDIF,$/;"	e	enum:__anonbe8bc20e0403
GPIO0_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO0_2	/;"	d
GPIO0_B2_GPIOB2	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B2_GPIOB2		= 0,$/;"	e	enum:__anon190ff88a0203
GPIO0_B2_MASK	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B2_MASK		= 1,$/;"	e	enum:__anon190ff88a0203
GPIO0_B2_SHIFT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B2_SHIFT		= 4,$/;"	e	enum:__anon190ff88a0203
GPIO0_B2_TSADC_INT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B2_TSADC_INT,$/;"	e	enum:__anon190ff88a0203
GPIO0_B5_CLK_27M	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B5_CLK_27M,$/;"	e	enum:__anon190ff88a0203
GPIO0_B5_GPIOB5	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B5_GPIOB5		= 0,$/;"	e	enum:__anon190ff88a0203
GPIO0_B5_MASK	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B5_MASK		= 1,$/;"	e	enum:__anon190ff88a0203
GPIO0_B5_SHIFT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B5_SHIFT		= 10,$/;"	e	enum:__anon190ff88a0203
GPIO0_B7_GPIOB7	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B7_GPIOB7		= 0,$/;"	e	enum:__anon190ff88a0203
GPIO0_B7_I2C0PMU_SDA	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B7_I2C0PMU_SDA,$/;"	e	enum:__anon190ff88a0203
GPIO0_B7_MASK	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B7_MASK		= 1,$/;"	e	enum:__anon190ff88a0203
GPIO0_B7_SHIFT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_B7_SHIFT		= 14,$/;"	e	enum:__anon190ff88a0203
GPIO0_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc405ep.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc405ex.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc405ez.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc405gp.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc440gp.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc440gx.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc440sp.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc440spe.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE	arch/powerpc/include/asm/ppc460sx.h	/^#define GPIO0_BASE	/;"	d
GPIO0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define GPIO0_BASE_ADDR	/;"	d
GPIO0_C0_GPIOC0	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C0_GPIOC0		= 0,$/;"	e	enum:__anon190ff88a0303
GPIO0_C0_I2C0PMU_SCL	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C0_I2C0PMU_SCL,$/;"	e	enum:__anon190ff88a0303
GPIO0_C0_MASK	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C0_MASK		= 1,$/;"	e	enum:__anon190ff88a0303
GPIO0_C0_SHIFT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C0_SHIFT		= 0,$/;"	e	enum:__anon190ff88a0303
GPIO0_C1_CLKT1_27M	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C1_CLKT1_27M,$/;"	e	enum:__anon190ff88a0303
GPIO0_C1_GPIOC1	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C1_GPIOC1		= 0,$/;"	e	enum:__anon190ff88a0303
GPIO0_C1_MASK	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C1_MASK		= 3,$/;"	e	enum:__anon190ff88a0303
GPIO0_C1_SHIFT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C1_SHIFT		= 2,$/;"	e	enum:__anon190ff88a0303
GPIO0_C1_TEST_CLKOUT	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	GPIO0_C1_TEST_CLKOUT,$/;"	e	enum:__anon190ff88a0303
GPIO0_DATA	include/smsc_sio1007.h	/^#define GPIO0_DATA	/;"	d
GPIO0_DIR	include/smsc_sio1007.h	/^#define GPIO0_DIR	/;"	d
GPIO0_EP_EEP	board/esd/pmc440/pmc440.h	/^#define GPIO0_EP_EEP /;"	d
GPIO0_FPGA_FORCEINIT	board/esd/pmc440/pmc440.h	/^#define GPIO0_FPGA_FORCEINIT /;"	d
GPIO0_IR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_IR	/;"	d
GPIO0_IRQSTATUS1	board/ti/am335x/board.c	/^#define GPIO0_IRQSTATUS1	/;"	d	file:
GPIO0_IRQSTATUSRAW	board/ti/am335x/board.c	/^#define GPIO0_IRQSTATUSRAW	/;"	d	file:
GPIO0_IS1H	board/amcc/bamboo/bamboo.h	/^#define GPIO0_IS1H	/;"	d
GPIO0_IS1L	board/amcc/bamboo/bamboo.h	/^#define GPIO0_IS1L	/;"	d
GPIO0_IS2H	board/amcc/bamboo/bamboo.h	/^#define GPIO0_IS2H	/;"	d
GPIO0_IS2L	board/amcc/bamboo/bamboo.h	/^#define GPIO0_IS2L	/;"	d
GPIO0_IS3H	board/amcc/bamboo/bamboo.h	/^#define GPIO0_IS3H	/;"	d
GPIO0_IS3L	board/amcc/bamboo/bamboo.h	/^#define GPIO0_IS3L	/;"	d
GPIO0_ISR1H	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ISR1H	/;"	d
GPIO0_ISR1L	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ISR1L	/;"	d
GPIO0_ISR2H	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ISR2H	/;"	d
GPIO0_ISR2L	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ISR2L	/;"	d
GPIO0_ISR3H	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ISR3H	/;"	d
GPIO0_ISR3L	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ISR3L	/;"	d
GPIO0_LED_RUN_N	board/esd/pmc440/pmc440.h	/^#define GPIO0_LED_RUN_N /;"	d
GPIO0_ODR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_ODR	/;"	d
GPIO0_OR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_OR	/;"	d
GPIO0_OSRH	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_OSRH	/;"	d
GPIO0_OSRL	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_OSRL	/;"	d
GPIO0_POL	include/smsc_sio1007.h	/^#define GPIO0_POL	/;"	d
GPIO0_REAL	board/amcc/bamboo/bamboo.h	/^#define GPIO0_REAL	/;"	d
GPIO0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO0_RESET	/;"	d
GPIO0_RISINGDETECT	board/ti/am335x/board.c	/^#define GPIO0_RISINGDETECT	/;"	d	file:
GPIO0_RR1	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_RR1	/;"	d
GPIO0_RR2	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_RR2	/;"	d
GPIO0_RR3	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_RR3	/;"	d
GPIO0_TCR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_TCR	/;"	d
GPIO0_TSRH	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_TSRH	/;"	d
GPIO0_TSRL	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO0_TSRL	/;"	d
GPIO0_TYPE	include/smsc_sio1007.h	/^#define GPIO0_TYPE	/;"	d
GPIO0_USB_ID	board/esd/pmc440/pmc440.h	/^#define GPIO0_USB_ID /;"	d
GPIO0_USB_PRSNT	board/esd/pmc440/pmc440.h	/^#define GPIO0_USB_PRSNT /;"	d
GPIO1	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO1	/;"	d
GPIO1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO1	/;"	d
GPIO1	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO1	/;"	d
GPIO1	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO1	/;"	d
GPIO1	board/amcc/bamboo/bamboo.h	/^#define GPIO1	/;"	d
GPIO10	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO10	/;"	d
GPIO10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO10	/;"	d
GPIO10	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO10	/;"	d
GPIO100	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO100	/;"	d
GPIO101	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO101	/;"	d
GPIO102	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO102	/;"	d
GPIO103	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO103	/;"	d
GPIO104	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO104	/;"	d
GPIO105	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO105	/;"	d
GPIO106	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO106	/;"	d
GPIO107	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO107	/;"	d
GPIO108	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO108	/;"	d
GPIO109	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO109	/;"	d
GPIO10_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO10_2	/;"	d
GPIO10_RTCCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO10_RTCCLK	/;"	d
GPIO10_RTCCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO10_RTCCLK_MD	/;"	d
GPIO11	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO11	/;"	d
GPIO11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO11	/;"	d
GPIO11	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO11	/;"	d
GPIO110	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO110	/;"	d
GPIO111	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO111	/;"	d
GPIO112	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO112	/;"	d
GPIO113	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO113	/;"	d
GPIO113_BIT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO113_BIT	/;"	d
GPIO114	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO114	/;"	d
GPIO115	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO115	/;"	d
GPIO116	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO116	/;"	d
GPIO117	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO117	/;"	d
GPIO117_SCL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO117_SCL	/;"	d
GPIO118	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO118	/;"	d
GPIO118_SDA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO118_SDA	/;"	d
GPIO119	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO119	/;"	d
GPIO11_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO11_2	/;"	d
GPIO11_3_6MHz	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO11_3_6MHz	/;"	d
GPIO11_3_6MHz_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO11_3_6MHz_MD	/;"	d
GPIO12	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO12	/;"	d
GPIO12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO12	/;"	d
GPIO12	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO12	/;"	d
GPIO120	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO120	/;"	d
GPIO121	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO121	/;"	d
GPIO122	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO122	/;"	d
GPIO123	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO123	/;"	d
GPIO124	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO124	/;"	d
GPIO125	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO125	/;"	d
GPIO126	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO126	/;"	d
GPIO127	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO127	/;"	d
GPIO12_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO12_2	/;"	d
GPIO12_32KHz	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO12_32KHz	/;"	d
GPIO12_32KHz_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO12_32KHz_MD	/;"	d
GPIO13	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO13	/;"	d
GPIO13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO13	/;"	d
GPIO13	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO13	/;"	d
GPIO13_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO13_2	/;"	d
GPIO13_MBGNT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO13_MBGNT	/;"	d
GPIO13_MBGNT_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO13_MBGNT_MD	/;"	d
GPIO14	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO14	/;"	d
GPIO14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO14	/;"	d
GPIO14	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO14	/;"	d
GPIO14_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO14_2	/;"	d
GPIO14_MBREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO14_MBREQ	/;"	d
GPIO14_MBREQ_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO14_MBREQ_MD	/;"	d
GPIO15	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO15	/;"	d
GPIO15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO15	/;"	d
GPIO15	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO15	/;"	d
GPIO15_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO15_2	/;"	d
GPIO15_nCS_1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO15_nCS_1	/;"	d
GPIO15_nCS_1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO15_nCS_1_MD	/;"	d
GPIO16	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO16	/;"	d
GPIO16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO16	/;"	d
GPIO16_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO16_2	/;"	d
GPIO16_PWM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO16_PWM0	/;"	d
GPIO16_PWM0_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO16_PWM0_MD	/;"	d
GPIO17	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO17	/;"	d
GPIO17	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO17	/;"	d
GPIO17_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO17_2	/;"	d
GPIO17_PWM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO17_PWM1	/;"	d
GPIO17_PWM1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO17_PWM1_MD	/;"	d
GPIO18	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO18	/;"	d
GPIO18	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO18	/;"	d
GPIO18_RDY	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO18_RDY	/;"	d
GPIO18_RDY_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO18_RDY_MD	/;"	d
GPIO19	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO19	/;"	d
GPIO19	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO19	/;"	d
GPIO19_DREQ1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO19_DREQ1	/;"	d
GPIO19_DREQ1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO19_DREQ1_MD	/;"	d
GPIO1A0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A0_I2S_MCLK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A0_I2S_MCLK,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A0_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A1_I2S_SCLK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A1_I2S_SCLK,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A1_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A2_I2S_LRCKRX	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A2_I2S_LRCKRX,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A2_I2S_PWM1_0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A2_I2S_PWM1_0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A2_MASK		= 6,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A3_I2S_LRCKTX	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A3_I2S_LRCKTX,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A3_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A4_I2S_SD0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A4_I2S_SD0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A4_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A5_I2S_SDI	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A5_I2S_SDI,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A5_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0503
GPIO1A5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1A5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0503
GPIO1B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B0_HDMI_CEC	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B0_HDMI_CEC,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B0_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B1_HDMI_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B1_HDMI_SDA,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B1_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B2_HDMI_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B2_HDMI_SCL,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B2_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B3_HDMI_HPD	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B3_HDMI_HPD,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B3_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B7_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B7_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B7_MMC0_CMD	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B7_MMC0_CMD,$/;"	e	enum:__anonbe8bc20e0603
GPIO1B7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1B7_SHIFT		= 14,$/;"	e	enum:__anonbe8bc20e0603
GPIO1C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C0_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C0_MMC0_CLKOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C0_MMC0_CLKOUT,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C1_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C1_MMC0_DETN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C1_MMC0_DETN,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C2_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C2_MMC0_D0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C2_MMC0_D0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C2_UART2_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C2_UART2_SIN,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C3_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C3_MMC0_D1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C3_MMC0_D1,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C3_UART2_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C3_UART2_SOUT,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C4_JTAG_TCK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C4_JTAG_TCK,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C4_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C4_MMC0_D2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C4_MMC0_D2,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C5_JTAG_TMS	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C5_JTAG_TMS,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C5_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C5_MMC0_D3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C5_MMC0_D3,$/;"	e	enum:__anonbe8bc20e0703
GPIO1C5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1C5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0703
GPIO1D0_EMMC_D0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D0_EMMC_D0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770103
GPIO1D0_LCDC0_HSYNC	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D0_LCDC0_HSYNC,$/;"	e	enum:__anonbeb2b9770103
GPIO1D0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D0_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D0_MASK		= 1,$/;"	e	enum:__anonbeb2b9770103
GPIO1D0_NAND_D0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D0_NAND_D0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D0_SFC_SIO0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D0_SFC_SIO0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770103
GPIO1D1_EMMC_D1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D1_EMMC_D1,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770103
GPIO1D1_LCDC0_VSYNC	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D1_LCDC0_VSYNC,$/;"	e	enum:__anonbeb2b9770103
GPIO1D1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D1_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770103
GPIO1D1_NAND_D1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D1_NAND_D1,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D1_SFC_SIO1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D1_SFC_SIO1,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770103
GPIO1D2_EMMC_D2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D2_EMMC_D2,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770103
GPIO1D2_LCDC0_DEN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D2_LCDC0_DEN,$/;"	e	enum:__anonbeb2b9770103
GPIO1D2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D2_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770103
GPIO1D2_NAND_D2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D2_NAND_D2,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D2_SFC_SIO2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D2_SFC_SIO2,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770103
GPIO1D3_EMMC_D3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D3_EMMC_D3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770103
GPIO1D3_LCDC0_DCLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D3_LCDC0_DCLK,$/;"	e	enum:__anonbeb2b9770103
GPIO1D3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D3_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D3_MASK		= 1,$/;"	e	enum:__anonbeb2b9770103
GPIO1D3_NAND_D3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D3_NAND_D3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D3_SFC_SIO3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D3_SFC_SIO3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO1D3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770103
GPIO1D4_EMMC_D4	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D4_EMMC_D4,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D4_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D4_NAND_D4	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D4_NAND_D4,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D4_SPI_RXD	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D4_SPI_RXD,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D5_EMMC_D5	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D5_EMMC_D5,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D5_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D5_NAND_D5	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D5_NAND_D5,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D5_SPI_TXD	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D5_SPI_TXD,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D6_EMMC_D6	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D6_EMMC_D6,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D6_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D6_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D6_NAND_D6	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D6_NAND_D6,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D6_SHIFT		= 12,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D6_SPI_CSN0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D6_SPI_CSN0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D7_EMMC_D7	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D7_EMMC_D7,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D7_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D7_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D7_NAND_D7	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D7_NAND_D7,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D7_SHIFT		= 14,$/;"	e	enum:__anonbe8bc20e0803
GPIO1D7_SPI_CSN1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO1D7_SPI_CSN1,$/;"	e	enum:__anonbe8bc20e0803
GPIO1_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO1_2	/;"	d
GPIO1_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE	arch/powerpc/include/asm/ppc405ez.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO1_BASE	/;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPIO1_BASE_ADDR	/;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO1_BASE_ADDR /;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GPIO1_BASE_ADDR	/;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define GPIO1_BASE_ADDR	/;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO1_BASE_ADDR	/;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO1_BASE_ADDR /;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO1_BASE_ADDR /;"	d
GPIO1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define GPIO1_BASE_ADDR	/;"	d
GPIO1_DATA	include/smsc_sio1007.h	/^#define GPIO1_DATA	/;"	d
GPIO1_DIR	include/smsc_sio1007.h	/^#define GPIO1_DIR	/;"	d
GPIO1_EMMC_SEL	board/freescale/t102xrdb/t102xrdb.c	/^	GPIO1_EMMC_SEL,$/;"	e	enum:__anonfc283aa30103	file:
GPIO1_FPGA_CLK	board/esd/pmc440/pmc440.h	/^#define GPIO1_FPGA_CLK /;"	d
GPIO1_FPGA_DATA	board/esd/pmc440/pmc440.h	/^#define GPIO1_FPGA_DATA /;"	d
GPIO1_FPGA_DONE	board/esd/pmc440/pmc440.h	/^#define GPIO1_FPGA_DONE /;"	d
GPIO1_FPGA_INIT	board/esd/pmc440/pmc440.h	/^#define GPIO1_FPGA_INIT /;"	d
GPIO1_FPGA_PRG	board/esd/pmc440/pmc440.h	/^#define GPIO1_FPGA_PRG /;"	d
GPIO1_HWID_MASK	board/esd/pmc440/pmc440.h	/^#define GPIO1_HWID_MASK /;"	d
GPIO1_INTA_FAKE	board/esd/pmc440/pmc440.h	/^#define GPIO1_INTA_FAKE /;"	d
GPIO1_IOEN_N	board/esd/pmc440/pmc440.h	/^#define GPIO1_IOEN_N /;"	d
GPIO1_IR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_IR	/;"	d
GPIO1_IRQSTATUS1	board/ti/am335x/board.c	/^#define GPIO1_IRQSTATUS1	/;"	d	file:
GPIO1_IRQSTATUSRAW	board/ti/am335x/board.c	/^#define GPIO1_IRQSTATUSRAW	/;"	d	file:
GPIO1_IS1H	board/amcc/bamboo/bamboo.h	/^#define GPIO1_IS1H	/;"	d
GPIO1_IS1L	board/amcc/bamboo/bamboo.h	/^#define GPIO1_IS1L	/;"	d
GPIO1_IS2H	board/amcc/bamboo/bamboo.h	/^#define GPIO1_IS2H	/;"	d
GPIO1_IS2L	board/amcc/bamboo/bamboo.h	/^#define GPIO1_IS2L	/;"	d
GPIO1_IS3H	board/amcc/bamboo/bamboo.h	/^#define GPIO1_IS3H	/;"	d
GPIO1_IS3L	board/amcc/bamboo/bamboo.h	/^#define GPIO1_IS3L	/;"	d
GPIO1_ISR1H	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ISR1H	/;"	d
GPIO1_ISR1L	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ISR1L	/;"	d
GPIO1_ISR2H	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ISR2H	/;"	d
GPIO1_ISR2L	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ISR2L	/;"	d
GPIO1_ISR3H	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ISR3H	/;"	d
GPIO1_ISR3L	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ISR3L	/;"	d
GPIO1_M66EN	board/esd/pmc440/pmc440.h	/^#define GPIO1_M66EN /;"	d
GPIO1_NONMONARCH	board/esd/pmc440/pmc440.h	/^#define GPIO1_NONMONARCH /;"	d
GPIO1_ODR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_ODR	/;"	d
GPIO1_OR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_OR	/;"	d
GPIO1_OSRH	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_OSRH	/;"	d
GPIO1_OSRL	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_OSRL	/;"	d
GPIO1_OUTDT1_A	board/renesas/r0p7734/lowlevel_init.S	/^GPIO1_OUTDT1_A:		.long	0xFFC41008	\/* bit15: LED4, bit22: LED5 *\/$/;"	l
GPIO1_OUTDT1_D	board/renesas/r0p7734/lowlevel_init.S	/^GPIO1_OUTDT1_D:		.long	0x80408000$/;"	l
GPIO1_POL	include/smsc_sio1007.h	/^#define GPIO1_POL	/;"	d
GPIO1_POST_N	board/esd/pmc440/pmc440.h	/^#define GPIO1_POST_N /;"	d
GPIO1_PPC_EREADY	board/esd/pmc440/pmc440.h	/^#define GPIO1_PPC_EREADY /;"	d
GPIO1_REAL	board/amcc/bamboo/bamboo.h	/^#define GPIO1_REAL	/;"	d
GPIO1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO1_RESET	/;"	d
GPIO1_RISINGDETECT	board/ti/am335x/board.c	/^#define GPIO1_RISINGDETECT	/;"	d	file:
GPIO1_RR1	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_RR1	/;"	d
GPIO1_RR2	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_RR2	/;"	d
GPIO1_RR3	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_RR3	/;"	d
GPIO1_RST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO1_RST	/;"	d
GPIO1_RTS_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO1_RTS_MD	/;"	d
GPIO1_SD_SEL	board/freescale/t102xrdb/spl.c	/^#define GPIO1_SD_SEL /;"	d	file:
GPIO1_SD_SEL	board/freescale/t102xrdb/t102xrdb.c	/^	GPIO1_SD_SEL    = 0x00020000, \/* GPIO1_14, 0: eMMC, 1:SD\/MMC *\/$/;"	e	enum:__anonfc283aa30103	file:
GPIO1_TCR	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_TCR	/;"	d
GPIO1_TSRH	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_TSRH	/;"	d
GPIO1_TSRL	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO1_TSRL	/;"	d
GPIO1_TYPE	include/smsc_sio1007.h	/^#define GPIO1_TYPE	/;"	d
GPIO1_USB_PWR_N	board/esd/pmc440/pmc440.h	/^#define GPIO1_USB_PWR_N /;"	d
GPIO2	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO2	/;"	d
GPIO2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO2	/;"	d
GPIO2	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO2	/;"	d
GPIO20	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO20	/;"	d
GPIO20	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO20	/;"	d
GPIO20_DREQ0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO20_DREQ0	/;"	d
GPIO20_DREQ0_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO20_DREQ0_MD	/;"	d
GPIO21	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO21	/;"	d
GPIO21	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO21	/;"	d
GPIO22	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO22	/;"	d
GPIO22	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO22	/;"	d
GPIO23	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO23	/;"	d
GPIO23	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO23	/;"	d
GPIO23_SCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO23_SCLK	/;"	d
GPIO23_SCLK_md	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO23_SCLK_md	/;"	d
GPIO24	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO24	/;"	d
GPIO24	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO24	/;"	d
GPIO24_SFRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO24_SFRM	/;"	d
GPIO24_SFRM_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO24_SFRM_MD	/;"	d
GPIO25	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO25	/;"	d
GPIO25	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO25	/;"	d
GPIO25_STXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO25_STXD	/;"	d
GPIO25_STXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO25_STXD_MD	/;"	d
GPIO26	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO26	/;"	d
GPIO26	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO26	/;"	d
GPIO26_SRXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO26_SRXD	/;"	d
GPIO26_SRXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO26_SRXD_MD	/;"	d
GPIO27	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO27	/;"	d
GPIO27	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO27	/;"	d
GPIO27_SEXTCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO27_SEXTCLK	/;"	d
GPIO27_SEXTCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO27_SEXTCLK_MD	/;"	d
GPIO28	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO28	/;"	d
GPIO28	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO28	/;"	d
GPIO28_BITCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO28_BITCLK	/;"	d
GPIO28_BITCLK_AC97_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO28_BITCLK_AC97_MD	/;"	d
GPIO28_BITCLK_I2S_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO28_BITCLK_I2S_MD	/;"	d
GPIO29	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO29	/;"	d
GPIO29	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO29	/;"	d
GPIO29_SDATA_IN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO29_SDATA_IN	/;"	d
GPIO29_SDATA_IN_AC97_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO29_SDATA_IN_AC97_MD /;"	d
GPIO29_SDATA_IN_I2S_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO29_SDATA_IN_I2S_MD	/;"	d
GPIO2A0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A0_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A0_NAND_ALE	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A0_NAND_ALE,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A0_SPI_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A0_SPI_CLK,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A1_EMMC_CLKOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A1_EMMC_CLKOUT,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A1_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A1_NAND_CLE	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A1_NAND_CLE,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A2_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A2_NAND_WRN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A2_NAND_WRN,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A3_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A3_NAND_RDN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A3_NAND_RDN,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A3_SFC_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A3_SFC_CLK,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_EMMC_CMD	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_EMMC_CMD,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_NAND_RDY	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_NAND_RDY,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_SFC_CSN0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_SFC_CSN0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_SFC_CSN1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_SFC_CSN1,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A6_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A6_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A6_NAND_CS0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A6_NAND_CS0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A6_SHIFT		= 12,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A7_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A7_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A7_SHIFT		= 14,$/;"	e	enum:__anonbe8bc20e0903
GPIO2A7_TESTCLK_OUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2A7_TESTCLK_OUT,$/;"	e	enum:__anonbe8bc20e0903
GPIO2B2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B2_MAC_CRS	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B2_MAC_CRS,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B2_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B4_MAC_MDIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B4_MAC_MDIO,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B4_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B5_MAC_TXEN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B5_MAC_TXEN,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B5_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B6_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B6_MAC_CLKIN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B6_MAC_CLKIN,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B6_MAC_CLKOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B6_MAC_CLKOUT,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B6_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B6_SHIFT		= 12,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B7_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B7_MAC_RXER	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B7_MAC_RXER,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B7_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2B7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2B7_SHIFT		= 14,$/;"	e	enum:__anonbe8bc20e0a03
GPIO2C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C0_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770203
GPIO2C0_I2C3CAM_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C0_I2C3CAM_SCL,$/;"	e	enum:__anonbeb2b9770203
GPIO2C0_MAC_RXD1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C0_MAC_RXD1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C0_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C0_MASK		= 1,$/;"	e	enum:__anonbeb2b9770203
GPIO2C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C0_SHIFT		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770203
GPIO2C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770203
GPIO2C1_I2C3CAM_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C1_I2C3CAM_SDA,$/;"	e	enum:__anonbeb2b9770203
GPIO2C1_MAC_RXD0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C1_MAC_RXD0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C1_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770203
GPIO2C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO2C1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770203
GPIO2C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C2_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C2_MAC_TXD1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C2_MAC_TXD1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C2_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C2_SHIFT		= 4,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C3_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C3_MAC_TXD0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C3_MAC_TXD0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C3_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C3_SHIFT		= 6,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C4_I2C2_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C4_I2C2_SDA,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C4_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C5_I2C2_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C5_I2C2_SCL,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C5_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C6_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C6_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C6_SHIFT		= 12,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C6_UART1_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C6_UART1_SIN,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C7_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C7_MASK		= 3,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C7_SHIFT		= 14,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C7_TESTCLK_OUT1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C7_TESTCLK_OUT1,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2C7_UART1_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2C7_UART1_SOUT,$/;"	e	enum:__anonbe8bc20e0b03
GPIO2D1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D1_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D1_MAC_MDC	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D1_MAC_MDC,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D1_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D1_SHIFT		= 2,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D4_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D4_I2S_SDO3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D4_I2S_SDO3,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D4_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D4_SHIFT		= 8,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D5_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D5_I2S_SDO2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D5_I2S_SDO2,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D5_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D5_SHIFT		= 10,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D6_GPIO		= 0,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D6_I2S_SDO1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D6_I2S_SDO1,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D6_MASK		= 1,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2D6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	GPIO2D6_SHIFT		= 12,$/;"	e	enum:__anonbe8bc20e0c03
GPIO2_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO2_2	/;"	d
GPIO2_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define GPIO2_BASE	/;"	d
GPIO2_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define GPIO2_BASE	/;"	d
GPIO2_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define GPIO2_BASE /;"	d
GPIO2_BASE	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO2_BASE	/;"	d
GPIO2_BASE	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO2_BASE	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO2_BASE_ADDR /;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO2_BASE_ADDR /;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO2_BASE_ADDR /;"	d
GPIO2_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define GPIO2_BASE_ADDR	/;"	d
GPIO2_DATA_EN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define GPIO2_DATA_EN /;"	d
GPIO2_DIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define GPIO2_DIR /;"	d
GPIO2_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define GPIO2_ENABLE /;"	d
GPIO2_INOUTSEL1_A	board/renesas/r0p7734/lowlevel_init.S	/^GPIO2_INOUTSEL1_A:	.long	0xFFC41004$/;"	l
GPIO2_INOUTSEL1_D	board/renesas/r0p7734/lowlevel_init.S	/^GPIO2_INOUTSEL1_D:	.long	0x80408000$/;"	l
GPIO2_INOUTSEL2_A	board/renesas/r0p7734/lowlevel_init.S	/^GPIO2_INOUTSEL2_A:	.long	0xFFC42004$/;"	l
GPIO2_INOUTSEL2_D	board/renesas/r0p7734/lowlevel_init.S	/^GPIO2_INOUTSEL2_D:	.long	0x40000120$/;"	l
GPIO2_INT_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define GPIO2_INT_ENABLE /;"	d
GPIO2_L_RESET_EN_N	board/esd/vme8349/vme8349pin.h	/^#define GPIO2_L_RESET_EN_N	/;"	d
GPIO2_OUTDT2_A	board/renesas/r0p7734/lowlevel_init.S	/^GPIO2_OUTDT2_A:		.long	0xFFC42008$/;"	l
GPIO2_OUTDT2_D	board/renesas/r0p7734/lowlevel_init.S	/^GPIO2_OUTDT2_D:		.long	0x40000120$/;"	l
GPIO2_PIN_STATE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define GPIO2_PIN_STATE /;"	d
GPIO2_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define GPIO2_RESET	/;"	d
GPIO2_TSI_PLL_RESET_N	board/esd/vme8349/vme8349pin.h	/^#define GPIO2_TSI_PLL_RESET_N	/;"	d
GPIO2_TSI_POWERUP_RESET_N	board/esd/vme8349/vme8349pin.h	/^#define GPIO2_TSI_POWERUP_RESET_N /;"	d
GPIO2_VME_RESET_N	board/esd/vme8349/vme8349pin.h	/^#define GPIO2_VME_RESET_N	/;"	d
GPIO2_V_SCON	board/esd/vme8349/vme8349pin.h	/^#define GPIO2_V_SCON	/;"	d
GPIO3	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO3	/;"	d
GPIO3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO3	/;"	d
GPIO3	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO3	/;"	d
GPIO30	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO30	/;"	d
GPIO30	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO30	/;"	d
GPIO30_SDATA_OUT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO30_SDATA_OUT	/;"	d
GPIO30_SDATA_OUT_AC97_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO30_SDATA_OUT_AC97_MD	/;"	d
GPIO30_SDATA_OUT_I2S_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO30_SDATA_OUT_I2S_MD /;"	d
GPIO31	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO31	/;"	d
GPIO31	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO31	/;"	d
GPIO31_SYNC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO31_SYNC	/;"	d
GPIO31_SYNC_AC97_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO31_SYNC_AC97_MD	/;"	d
GPIO31_SYNC_I2S_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO31_SYNC_I2S_MD	/;"	d
GPIO32	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO32	/;"	d
GPIO32_SDATA_IN1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO32_SDATA_IN1	/;"	d
GPIO32_SDATA_IN1_AC97_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO32_SDATA_IN1_AC97_MD	/;"	d
GPIO33	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO33	/;"	d
GPIO33_nCS_5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO33_nCS_5	/;"	d
GPIO33_nCS_5_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO33_nCS_5_MD	/;"	d
GPIO34	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO34	/;"	d
GPIO34_FFRXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO34_FFRXD	/;"	d
GPIO34_FFRXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO34_FFRXD_MD	/;"	d
GPIO34_MMCCS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO34_MMCCS0	/;"	d
GPIO34_MMCCS0_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO34_MMCCS0_MD	/;"	d
GPIO35	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO35	/;"	d
GPIO35_FFCTS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO35_FFCTS	/;"	d
GPIO35_FFCTS_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO35_FFCTS_MD	/;"	d
GPIO36	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO36	/;"	d
GPIO36_FFDCD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO36_FFDCD	/;"	d
GPIO36_FFDCD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO36_FFDCD_MD	/;"	d
GPIO37	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO37	/;"	d
GPIO37_FFDSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO37_FFDSR	/;"	d
GPIO37_FFDSR_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO37_FFDSR_MD	/;"	d
GPIO38	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO38	/;"	d
GPIO38_FFRI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO38_FFRI	/;"	d
GPIO38_FFRI_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO38_FFRI_MD	/;"	d
GPIO39	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO39	/;"	d
GPIO39_FFTXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO39_FFTXD	/;"	d
GPIO39_FFTXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO39_FFTXD_MD	/;"	d
GPIO39_MMCCS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO39_MMCCS1	/;"	d
GPIO39_MMCCS1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO39_MMCCS1_MD	/;"	d
GPIO3A0_EMMC_DATA0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A0_EMMC_DATA0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A0_FLASH0_DATA0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A0_FLASH0_DATA0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A1_EMMC_DATA1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A1_EMMC_DATA1,$/;"	e	enum:__anonbeb2b9770303
GPIO3A1_FLASH0_DATA1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A1_FLASH0_DATA1,$/;"	e	enum:__anonbeb2b9770303
GPIO3A1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770303
GPIO3A2_EMMC_DATA2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A2_EMMC_DATA2,$/;"	e	enum:__anonbeb2b9770303
GPIO3A2_FLASH0_DATA2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A2_FLASH0_DATA2,$/;"	e	enum:__anonbeb2b9770303
GPIO3A2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A2_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770303
GPIO3A3_EMMC_DATA3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A3_EMMC_DATA3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A3_FLASH0_DATA3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A3_FLASH0_DATA3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A3_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770303
GPIO3A4_EMMC_DATA4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A4_EMMC_DATA4,$/;"	e	enum:__anonbeb2b9770303
GPIO3A4_FLASH0_DATA4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A4_FLASH0_DATA4,$/;"	e	enum:__anonbeb2b9770303
GPIO3A4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A4_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770303
GPIO3A5_EMMC_DATA5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A5_EMMC_DATA5,$/;"	e	enum:__anonbeb2b9770303
GPIO3A5_FLASH0_DATA5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A5_FLASH0_DATA5,$/;"	e	enum:__anonbeb2b9770303
GPIO3A5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A5_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770303
GPIO3A6_EMMC_DATA6	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A6_EMMC_DATA6,$/;"	e	enum:__anonbeb2b9770303
GPIO3A6_FLASH0_DATA6	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A6_FLASH0_DATA6,$/;"	e	enum:__anonbeb2b9770303
GPIO3A6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A6_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770303
GPIO3A7_EMMC_DATA7	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A7_EMMC_DATA7,$/;"	e	enum:__anonbeb2b9770303
GPIO3A7_FLASH0_DATA7	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A7_FLASH0_DATA7,$/;"	e	enum:__anonbeb2b9770303
GPIO3A7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770303
GPIO3A7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A7_MASK		= 3,$/;"	e	enum:__anonbeb2b9770303
GPIO3A7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3A7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770303
GPIO3B0_FLASH0_RDY	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B0_FLASH0_RDY,$/;"	e	enum:__anonbeb2b9770403
GPIO3B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B0_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B1_EMMC_PWREN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B1_EMMC_PWREN,$/;"	e	enum:__anonbeb2b9770403
GPIO3B1_FLASH0_WP	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B1_FLASH0_WP,$/;"	e	enum:__anonbeb2b9770403
GPIO3B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770403
GPIO3B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770403
GPIO3B2_FLASH0_RDN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B2_FLASH0_RDN,$/;"	e	enum:__anonbeb2b9770403
GPIO3B2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770403
GPIO3B3_FLASH0_ALE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B3_FLASH0_ALE,$/;"	e	enum:__anonbeb2b9770403
GPIO3B3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B3_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770403
GPIO3B4_FLASH0_CLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B4_FLASH0_CLE,$/;"	e	enum:__anonbeb2b9770403
GPIO3B4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B4_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770403
GPIO3B5_FLASH0_WRN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B5_FLASH0_WRN,$/;"	e	enum:__anonbeb2b9770403
GPIO3B5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B5_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770403
GPIO3B6_FLASH0_CSN0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B6_FLASH0_CSN0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B6_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770403
GPIO3B7_FLASH0_CSN1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B7_FLASH0_CSN1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770403
GPIO3B7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B7_MASK		= 1,$/;"	e	enum:__anonbeb2b9770403
GPIO3B7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3B7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770403
GPIO3C0_EMMC_CMD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C0_EMMC_CMD,$/;"	e	enum:__anonbeb2b9770503
GPIO3C0_FLASH0_CSN2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C0_FLASH0_CSN2,$/;"	e	enum:__anonbeb2b9770503
GPIO3C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770503
GPIO3C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770503
GPIO3C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770503
GPIO3C1_EMMC_RSTNOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C1_EMMC_RSTNOUT,$/;"	e	enum:__anonbeb2b9770503
GPIO3C1_FLASH0_CSN3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C1_FLASH0_CSN3,$/;"	e	enum:__anonbeb2b9770503
GPIO3C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770503
GPIO3C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770503
GPIO3C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770503
GPIO3C2_EMMC_CLKOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C2_EMMC_CLKOUT,$/;"	e	enum:__anonbeb2b9770503
GPIO3C2_FLASH0_DQS	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C2_FLASH0_DQS,$/;"	e	enum:__anonbeb2b9770503
GPIO3C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770503
GPIO3C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C2_MASK		= 3,$/;"	e	enum:__anonbeb2b9770503
GPIO3C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO3C2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770503
GPIO3_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO3_2	/;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPIO3_BASE_ADDR	/;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO3_BASE_ADDR /;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GPIO3_BASE_ADDR	/;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define GPIO3_BASE_ADDR /;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO3_BASE_ADDR	/;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO3_BASE_ADDR /;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO3_BASE_ADDR /;"	d
GPIO3_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define GPIO3_BASE_ADDR	/;"	d
GPIO3_BRD_VER_MASK	board/freescale/t102xrdb/t102xrdb.c	/^	GPIO3_BRD_VER_MASK = 0x0c000000,$/;"	e	enum:__anonfc283aa30103	file:
GPIO3_GET_VERSION	board/freescale/t102xrdb/t102xrdb.c	/^	GPIO3_GET_VERSION,	       \/* GPIO3_4\/5, 00:RevB, 01: RevC *\/$/;"	e	enum:__anonfc283aa30103	file:
GPIO3_OFFSET	board/freescale/t102xrdb/t102xrdb.c	/^	GPIO3_OFFSET = 0x2000,$/;"	e	enum:__anonfc283aa30103	file:
GPIO3_PATH	board/gateworks/gw_ventana/gw_ventana.c	/^#define GPIO3_PATH	/;"	d	file:
GPIO4	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO4	/;"	d
GPIO4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO4	/;"	d
GPIO4	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO4	/;"	d
GPIO40	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO40	/;"	d
GPIO40_FFDTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO40_FFDTR	/;"	d
GPIO40_FFDTR_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO40_FFDTR_MD	/;"	d
GPIO41	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO41	/;"	d
GPIO41_FFRTS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO41_FFRTS	/;"	d
GPIO41_FFRTS_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO41_FFRTS_MD	/;"	d
GPIO42	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO42	/;"	d
GPIO42_BTRXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO42_BTRXD	/;"	d
GPIO42_BTRXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO42_BTRXD_MD	/;"	d
GPIO43	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO43	/;"	d
GPIO43_BTTXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO43_BTTXD	/;"	d
GPIO43_BTTXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO43_BTTXD_MD	/;"	d
GPIO43_USE	include/configs/canyonlands.h	/^#define GPIO43_USE	/;"	d
GPIO44	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO44	/;"	d
GPIO44_BTCTS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO44_BTCTS	/;"	d
GPIO44_BTCTS_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO44_BTCTS_MD	/;"	d
GPIO45	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO45	/;"	d
GPIO45_BTRTS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO45_BTRTS	/;"	d
GPIO45_BTRTS_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO45_BTRTS_MD	/;"	d
GPIO46	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO46	/;"	d
GPIO46_ICPRXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO46_ICPRXD	/;"	d
GPIO46_ICPRXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO46_ICPRXD_MD	/;"	d
GPIO46_STRXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO46_STRXD	/;"	d
GPIO46_STRXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO46_STRXD_MD	/;"	d
GPIO47	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO47	/;"	d
GPIO47_ICPTXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO47_ICPTXD	/;"	d
GPIO47_ICPTXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO47_ICPTXD_MD	/;"	d
GPIO47_STTXD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO47_STTXD	/;"	d
GPIO47_STTXD_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO47_STTXD_MD	/;"	d
GPIO48	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO48	/;"	d
GPIO48_nPOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO48_nPOE	/;"	d
GPIO48_nPOE_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO48_nPOE_MD	/;"	d
GPIO49	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO49	/;"	d
GPIO49_VAL	include/configs/lwmon5.h	/^#define GPIO49_VAL	/;"	d
GPIO49_nPWE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO49_nPWE	/;"	d
GPIO49_nPWE_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO49_nPWE_MD	/;"	d
GPIO4C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C0_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C0_UART0BT_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C0_UART0BT_SIN,$/;"	e	enum:__anonbeb2b9770603
GPIO4C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770603
GPIO4C1_UART0BT_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C1_UART0BT_SOUT,$/;"	e	enum:__anonbeb2b9770603
GPIO4C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770603
GPIO4C2_UART0BT_CTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C2_UART0BT_CTSN,$/;"	e	enum:__anonbeb2b9770603
GPIO4C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C3_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770603
GPIO4C3_UART0BT_RTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C3_UART0BT_RTSN,$/;"	e	enum:__anonbeb2b9770603
GPIO4C4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C4_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C4_SDIO0_DATA0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C4_SDIO0_DATA0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770603
GPIO4C5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C5_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C5_SDIO0_DATA1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C5_SDIO0_DATA1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770603
GPIO4C6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C6_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C6_SDIO0_DATA2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C6_SDIO0_DATA2,$/;"	e	enum:__anonbeb2b9770603
GPIO4C6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770603
GPIO4C7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770603
GPIO4C7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C7_MASK		= 1,$/;"	e	enum:__anonbeb2b9770603
GPIO4C7_SDIO0_DATA3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C7_SDIO0_DATA3,$/;"	e	enum:__anonbeb2b9770603
GPIO4C7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO4C7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770603
GPIO4_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO4_2	/;"	d
GPIO4_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPIO4_BASE_ADDR	/;"	d
GPIO4_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO4_BASE_ADDR /;"	d
GPIO4_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO4_BASE_ADDR	/;"	d
GPIO4_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO4_BASE_ADDR /;"	d
GPIO4_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO4_BASE_ADDR /;"	d
GPIO4_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define GPIO4_BASE_ADDR	/;"	d
GPIO4_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define GPIO4_CLKCTRL_OPTFCLKEN_MASK	/;"	d
GPIO4_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define GPIO4_CLKCTRL_OPTFCLKEN_MASK	/;"	d
GPIO4_INOUTSEL4_A	board/renesas/r0p7734/lowlevel_init.S	/^GPIO4_INOUTSEL4_A:	.long	0xFFC44004$/;"	l
GPIO4_INOUTSEL4_D	board/renesas/r0p7734/lowlevel_init.S	/^GPIO4_INOUTSEL4_D:	.long	0x04000000$/;"	l
GPIO4_OUTDT4_A	board/renesas/r0p7734/lowlevel_init.S	/^GPIO4_OUTDT4_A:		.long	0xFFC44008$/;"	l
GPIO4_OUTDT4_D	board/renesas/r0p7734/lowlevel_init.S	/^GPIO4_OUTDT4_D:		.long	0x04000000$/;"	l
GPIO4_PCIE_RESET_SET	board/freescale/p1010rdb/p1010rdb.c	/^#define GPIO4_PCIE_RESET_SET	/;"	d	file:
GPIO5	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO5	/;"	d
GPIO5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO5	/;"	d
GPIO5	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO5	/;"	d
GPIO50	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO50	/;"	d
GPIO50_nPIOR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO50_nPIOR	/;"	d
GPIO50_nPIOR_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO50_nPIOR_MD	/;"	d
GPIO51	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO51	/;"	d
GPIO51_nPIOW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO51_nPIOW	/;"	d
GPIO51_nPIOW_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO51_nPIOW_MD	/;"	d
GPIO52	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO52	/;"	d
GPIO52_nPCE_1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO52_nPCE_1	/;"	d
GPIO52_nPCE_1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO52_nPCE_1_MD	/;"	d
GPIO53	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO53	/;"	d
GPIO53_MMCCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO53_MMCCLK	/;"	d
GPIO53_MMCCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO53_MMCCLK_MD	/;"	d
GPIO53_nPCE_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO53_nPCE_2	/;"	d
GPIO53_nPCE_2_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO53_nPCE_2_MD	/;"	d
GPIO54	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO54	/;"	d
GPIO54_MMCCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO54_MMCCLK	/;"	d
GPIO54_MMCCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO54_MMCCLK_MD	/;"	d
GPIO54_pSKTSEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO54_pSKTSEL	/;"	d
GPIO54_pSKTSEL_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO54_pSKTSEL_MD	/;"	d
GPIO55	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO55	/;"	d
GPIO55_nPREG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO55_nPREG	/;"	d
GPIO55_nPREG_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO55_nPREG_MD	/;"	d
GPIO56	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO56	/;"	d
GPIO56_nPWAIT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO56_nPWAIT	/;"	d
GPIO56_nPWAIT_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO56_nPWAIT_MD	/;"	d
GPIO57	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO57	/;"	d
GPIO57_nIOIS16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO57_nIOIS16	/;"	d
GPIO57_nIOIS16_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO57_nIOIS16_MD	/;"	d
GPIO58	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO58	/;"	d
GPIO58_LDD_0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO58_LDD_0	/;"	d
GPIO58_LDD_0_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO58_LDD_0_MD	/;"	d
GPIO59	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO59	/;"	d
GPIO59_LDD_1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO59_LDD_1	/;"	d
GPIO59_LDD_1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO59_LDD_1_MD	/;"	d
GPIO5B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B0_TS0_DATA0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B0_TS0_DATA0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B0_UART1BB_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B0_UART1BB_SIN,$/;"	e	enum:__anonbeb2b9770703
GPIO5B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770703
GPIO5B1_TS0_DATA1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B1_TS0_DATA1,$/;"	e	enum:__anonbeb2b9770703
GPIO5B1_UART1BB_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B1_UART1BB_SOUT,$/;"	e	enum:__anonbeb2b9770703
GPIO5B2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B2_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770703
GPIO5B2_TS0_DATA2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B2_TS0_DATA2,$/;"	e	enum:__anonbeb2b9770703
GPIO5B2_UART1BB_CTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B2_UART1BB_CTSN,$/;"	e	enum:__anonbeb2b9770703
GPIO5B3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B3_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770703
GPIO5B3_TS0_DATA3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B3_TS0_DATA3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B3_UART1BB_RTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B3_UART1BB_RTSN,$/;"	e	enum:__anonbeb2b9770703
GPIO5B4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B4_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770703
GPIO5B4_SPI0_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B4_SPI0_CLK,$/;"	e	enum:__anonbeb2b9770703
GPIO5B4_TS0_DATA4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B4_TS0_DATA4,$/;"	e	enum:__anonbeb2b9770703
GPIO5B4_UART4EXP_CTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B4_UART4EXP_CTSN,$/;"	e	enum:__anonbeb2b9770703
GPIO5B5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B5_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770703
GPIO5B5_SPI0_CSN0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B5_SPI0_CSN0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B5_TS0_DATA5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B5_TS0_DATA5,$/;"	e	enum:__anonbeb2b9770703
GPIO5B5_UART4EXP_RTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B5_UART4EXP_RTSN,$/;"	e	enum:__anonbeb2b9770703
GPIO5B6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B6_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770703
GPIO5B6_SPI0_TXD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B6_SPI0_TXD,$/;"	e	enum:__anonbeb2b9770703
GPIO5B6_TS0_DATA6	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B6_TS0_DATA6,$/;"	e	enum:__anonbeb2b9770703
GPIO5B6_UART4EXP_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B6_UART4EXP_SOUT,$/;"	e	enum:__anonbeb2b9770703
GPIO5B7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770703
GPIO5B7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B7_MASK		= 3,$/;"	e	enum:__anonbeb2b9770703
GPIO5B7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770703
GPIO5B7_SPI0_RXD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B7_SPI0_RXD,$/;"	e	enum:__anonbeb2b9770703
GPIO5B7_TS0_DATA7	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B7_TS0_DATA7,$/;"	e	enum:__anonbeb2b9770703
GPIO5B7_UART4EXP_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5B7_UART4EXP_SIN,$/;"	e	enum:__anonbeb2b9770703
GPIO5C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770803
GPIO5C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770803
GPIO5C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770803
GPIO5C0_SPI0_CSN1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C0_SPI0_CSN1,$/;"	e	enum:__anonbeb2b9770803
GPIO5C0_TS0_SYNC	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C0_TS0_SYNC,$/;"	e	enum:__anonbeb2b9770803
GPIO5C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770803
GPIO5C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770803
GPIO5C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770803
GPIO5C1_TS0_VALID	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C1_TS0_VALID,$/;"	e	enum:__anonbeb2b9770803
GPIO5C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770803
GPIO5C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770803
GPIO5C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770803
GPIO5C2_TS0_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C2_TS0_CLK,$/;"	e	enum:__anonbeb2b9770803
GPIO5C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770803
GPIO5C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C3_MASK		= 1,$/;"	e	enum:__anonbeb2b9770803
GPIO5C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770803
GPIO5C3_TS0_ERR	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO5C3_TS0_ERR,$/;"	e	enum:__anonbeb2b9770803
GPIO5_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO5_2	/;"	d
GPIO5_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define GPIO5_BASE	/;"	d
GPIO5_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define GPIO5_BASE	/;"	d
GPIO5_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO5_BASE_ADDR /;"	d
GPIO5_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO5_BASE_ADDR /;"	d
GPIO5_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO5_BASE_ADDR /;"	d
GPIO5_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO5_BASE_ADDR /;"	d
GPIO6	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO6	/;"	d
GPIO6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO6	/;"	d
GPIO6	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO6	/;"	d
GPIO60	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO60	/;"	d
GPIO60_LDD_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO60_LDD_2	/;"	d
GPIO60_LDD_2_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO60_LDD_2_MD	/;"	d
GPIO61	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO61	/;"	d
GPIO61_LDD_3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO61_LDD_3	/;"	d
GPIO61_LDD_3_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO61_LDD_3_MD	/;"	d
GPIO62	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO62	/;"	d
GPIO62_LDD_4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO62_LDD_4	/;"	d
GPIO62_LDD_4_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO62_LDD_4_MD	/;"	d
GPIO63	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO63	/;"	d
GPIO63_LDD_5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO63_LDD_5	/;"	d
GPIO63_LDD_5_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO63_LDD_5_MD	/;"	d
GPIO64	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO64	/;"	d
GPIO64_LDD_6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO64_LDD_6	/;"	d
GPIO64_LDD_6_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO64_LDD_6_MD	/;"	d
GPIO65	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO65	/;"	d
GPIO65_LDD_7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO65_LDD_7	/;"	d
GPIO65_LDD_7_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO65_LDD_7_MD	/;"	d
GPIO66	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO66	/;"	d
GPIO66_LDD_8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO66_LDD_8	/;"	d
GPIO66_LDD_8_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO66_LDD_8_MD	/;"	d
GPIO66_MBREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO66_MBREQ	/;"	d
GPIO66_MBREQ_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO66_MBREQ_MD	/;"	d
GPIO67	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO67	/;"	d
GPIO67_LDD_9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO67_LDD_9	/;"	d
GPIO67_LDD_9_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO67_LDD_9_MD	/;"	d
GPIO67_MMCCS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO67_MMCCS0	/;"	d
GPIO67_MMCCS0_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO67_MMCCS0_MD	/;"	d
GPIO68	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO68	/;"	d
GPIO68_LDD_10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO68_LDD_10	/;"	d
GPIO68_LDD_10_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO68_LDD_10_MD	/;"	d
GPIO68_MMCCS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO68_MMCCS1	/;"	d
GPIO68_MMCCS1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO68_MMCCS1_MD	/;"	d
GPIO69	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO69	/;"	d
GPIO69_LDD_11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO69_LDD_11	/;"	d
GPIO69_LDD_11_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO69_LDD_11_MD	/;"	d
GPIO69_MMCCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO69_MMCCLK	/;"	d
GPIO69_MMCCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO69_MMCCLK_MD	/;"	d
GPIO6B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770903
GPIO6B0_I2S_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B0_I2S_CLK,$/;"	e	enum:__anonbeb2b9770903
GPIO6B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B0_MASK		= 1,$/;"	e	enum:__anonbeb2b9770903
GPIO6B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770903
GPIO6B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770903
GPIO6B1_I2C1AUDIO_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B1_I2C1AUDIO_SDA,$/;"	e	enum:__anonbeb2b9770903
GPIO6B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770903
GPIO6B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770903
GPIO6B2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770903
GPIO6B2_I2C1AUDIO_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B2_I2C1AUDIO_SCL,$/;"	e	enum:__anonbeb2b9770903
GPIO6B2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770903
GPIO6B2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770903
GPIO6B3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770903
GPIO6B3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B3_MASK		= 1,$/;"	e	enum:__anonbeb2b9770903
GPIO6B3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770903
GPIO6B3_SPDIF_TX	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6B3_SPDIF_TX,$/;"	e	enum:__anonbeb2b9770903
GPIO6C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C0_JTAG_TMS	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C0_JTAG_TMS,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C0_SDMMC0_DATA0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C0_SDMMC0_DATA0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C1_JTAG_TRSTN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C1_JTAG_TRSTN,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C1_SDMMC0_DATA1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C1_SDMMC0_DATA1,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C2_JTAG_TDI	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C2_JTAG_TDI,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C2_MASK		= 3,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C2_SDMMC0_DATA2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C2_SDMMC0_DATA2,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C3_JTAG_TCK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C3_JTAG_TCK,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C3_MASK		= 3,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C3_SDMMC0_DATA3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C3_SDMMC0_DATA3,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C4_JTAG_TDO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C4_JTAG_TDO,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C4_MASK		= 3,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C4_SDMMC0_CLKOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C4_SDMMC0_CLKOUT,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C5_MASK		= 1,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C5_SDMMC0_CMD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C5_SDMMC0_CMD,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C6_MASK		= 1,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C6_SDMMC0_DECTN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C6_SDMMC0_DECTN,$/;"	e	enum:__anonbeb2b9770a03
GPIO6C6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO6C6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770a03
GPIO6_10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPIO6_10	/;"	d
GPIO6_11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPIO6_11	/;"	d
GPIO6_14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPIO6_14	/;"	d
GPIO6_15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPIO6_15	/;"	d
GPIO6_16	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPIO6_16	/;"	d
GPIO6_182	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO6_182	/;"	d
GPIO6_183	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO6_183	/;"	d
GPIO6_184	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO6_184	/;"	d
GPIO6_185	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO6_185	/;"	d
GPIO6_186	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO6_186	/;"	d
GPIO6_187	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO6_187	/;"	d
GPIO6_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO6_2	/;"	d
GPIO6_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO6_BASE_ADDR /;"	d
GPIO6_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO6_BASE_ADDR /;"	d
GPIO6_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO6_BASE_ADDR /;"	d
GPIO6_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO6_BASE_ADDR /;"	d
GPIO6_MMCCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO6_MMCCLK	/;"	d
GPIO6_MMCCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO6_MMCCLK_MD	/;"	d
GPIO7	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO7	/;"	d
GPIO7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO7	/;"	d
GPIO7	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO7	/;"	d
GPIO70	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO70	/;"	d
GPIO70_LDD_12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO70_LDD_12	/;"	d
GPIO70_LDD_12_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO70_LDD_12_MD	/;"	d
GPIO70_RTCCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO70_RTCCLK	/;"	d
GPIO70_RTCCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO70_RTCCLK_MD	/;"	d
GPIO71	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO71	/;"	d
GPIO71_3_6MHz	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO71_3_6MHz	/;"	d
GPIO71_3_6MHz_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO71_3_6MHz_MD	/;"	d
GPIO71_LDD_13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO71_LDD_13	/;"	d
GPIO71_LDD_13_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO71_LDD_13_MD	/;"	d
GPIO72	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO72	/;"	d
GPIO72_32kHz	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO72_32kHz	/;"	d
GPIO72_32kHz_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO72_32kHz_MD	/;"	d
GPIO72_LDD_14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO72_LDD_14	/;"	d
GPIO72_LDD_14_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO72_LDD_14_MD	/;"	d
GPIO73	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO73	/;"	d
GPIO73_LDD_15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO73_LDD_15	/;"	d
GPIO73_LDD_15_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO73_LDD_15_MD	/;"	d
GPIO73_MBGNT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO73_MBGNT	/;"	d
GPIO73_MBGNT_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO73_MBGNT_MD	/;"	d
GPIO74	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO74	/;"	d
GPIO74_LCD_FCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO74_LCD_FCLK	/;"	d
GPIO74_LCD_FCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO74_LCD_FCLK_MD	/;"	d
GPIO75	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO75	/;"	d
GPIO75_LCD_LCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO75_LCD_LCLK	/;"	d
GPIO75_LCD_LCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO75_LCD_LCLK_MD	/;"	d
GPIO76	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO76	/;"	d
GPIO76_LCD_PCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO76_LCD_PCLK	/;"	d
GPIO76_LCD_PCLK_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO76_LCD_PCLK_MD	/;"	d
GPIO77	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO77	/;"	d
GPIO77_LCD_ACBIAS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO77_LCD_ACBIAS	/;"	d
GPIO77_LCD_ACBIAS_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO77_LCD_ACBIAS_MD	/;"	d
GPIO78	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO78	/;"	d
GPIO78_nCS_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO78_nCS_2	/;"	d
GPIO78_nCS_2_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO78_nCS_2_MD	/;"	d
GPIO79	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO79	/;"	d
GPIO79_nCS_3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO79_nCS_3	/;"	d
GPIO79_nCS_3_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO79_nCS_3_MD	/;"	d
GPIO7A0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A0_PWM_0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A0_PWM_0,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A0_VOP0_PWM	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A0_VOP0_PWM,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A0_VOP1_PWM	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A0_VOP1_PWM,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A1_PWM_1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A1_PWM_1,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A7_GPS_MAG	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A7_GPS_MAG,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A7_HSADCT1_DATA0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A7_HSADCT1_DATA0,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A7_MASK		= 3,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770b03
GPIO7A7_UART3GPS_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7A7_UART3GPS_SIN,$/;"	e	enum:__anonbeb2b9770b03
GPIO7B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B0_GPS_SIG	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B0_GPS_SIG,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B0_HSADCT1_DATA1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B0_HSADCT1_DATA1,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B0_UART3GPS_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B0_UART3GPS_SOUT,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B1_GPST1_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B1_GPST1_CLK,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B1_GPS_RFCLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B1_GPS_RFCLK,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B1_UART3GPS_CTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B1_UART3GPS_CTSN,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B2_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B2_UART3GPS_RTSN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B2_UART3GPS_RTSN,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B2_USB_DRVVBUS0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B2_USB_DRVVBUS0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B3_EDP_HOTPLUG	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B3_EDP_HOTPLUG,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B3_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B3_USB_DRVVBUS1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B3_USB_DRVVBUS1,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B4_ISP_SHUTTEREN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B4_ISP_SHUTTEREN,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B4_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B4_SPI1_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B4_SPI1_CLK,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B5_ISP_FLASHTRIGOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B5_ISP_FLASHTRIGOUT,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B5_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B5_SPI1_CSN0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B5_SPI1_CSN0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B6_ISP_PRELIGHTTRIG	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B6_ISP_PRELIGHTTRIG,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B6_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B6_SPI1_RXD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B6_SPI1_RXD,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B7_ISP_SHUTTERTRIG	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B7_ISP_SHUTTERTRIG,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B7_MASK		= 3,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770c03
GPIO7B7_SPI1_TXD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7B7_SPI1_TXD,$/;"	e	enum:__anonbeb2b9770c03
GPIO7C0_EDPHDMI_CECINOUTT1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C0_EDPHDMI_CECINOUTT1,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C0_ISP_FLASHTRIGIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C0_ISP_FLASHTRIGIN,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C1_I2C4TP_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C1_I2C4TP_SDA,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C1_MASK		= 1,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C1_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C2_I2C4TP_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C2_I2C4TP_SCL,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C2_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C3_EDPHDMII2C_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C3_EDPHDMII2C_SDA,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C3_I2C5HDMI_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C3_I2C5HDMI_SDA,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C3_MASK		= 3,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C3_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770d03
GPIO7C4_EDPHDMII2C_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C4_EDPHDMII2C_SCL,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C4_I2C5HDMI_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C4_I2C5HDMI_SCL,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C4_MASK		= 3,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C4_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C6_MASK		= 3,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C6_PWM_2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C6_PWM_2,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C6_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C6_UART2DBG_SIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C6_UART2DBG_SIN,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C6_UART2DBG_SIRIN	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C6_UART2DBG_SIRIN,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_EDPHDMI_CECINOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_EDPHDMI_CECINOUT,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_MASK		= 7,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_PWM_3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_PWM_3,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_UART2DBG_SIROUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_UART2DBG_SIROUT,$/;"	e	enum:__anonbeb2b9770e03
GPIO7C7_UART2DBG_SOUT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO7C7_UART2DBG_SOUT,$/;"	e	enum:__anonbeb2b9770e03
GPIO7_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO7_2	/;"	d
GPIO7_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO7_BASE_ADDR /;"	d
GPIO7_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPIO7_BASE_ADDR /;"	d
GPIO7_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPIO7_BASE_ADDR /;"	d
GPIO8	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO8	/;"	d
GPIO8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO8	/;"	d
GPIO8	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO8	/;"	d
GPIO80	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO80	/;"	d
GPIO80_nCS_4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO80_nCS_4	/;"	d
GPIO80_nCS_4_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO80_nCS_4_MD	/;"	d
GPIO81	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO81	/;"	d
GPIO82	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO82	/;"	d
GPIO83	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO83	/;"	d
GPIO84	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO84	/;"	d
GPIO85	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO85	/;"	d
GPIO86	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO86	/;"	d
GPIO87	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO87	/;"	d
GPIO88	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO88	/;"	d
GPIO89	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO89	/;"	d
GPIO8A0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A0_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A0_PS2_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A0_PS2_CLK,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A0_SC_VCC18V	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A0_SC_VCC18V,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A1_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A1_PS2_DATA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A1_PS2_DATA,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A1_SC_VCC33V	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A1_SC_VCC33V,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A2_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A2_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A2_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A2_MASK		= 1,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A2_SC_DETECTT1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A2_SC_DETECTT1,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A2_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A2_SHIFT		= 4,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A3_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A3_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A3_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A3_SC_IOT1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A3_SC_IOT1,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A3_SHIFT		= 6,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A3_SPI2_CSN1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A3_SPI2_CSN1,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A4_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A4_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A4_I2C2SENSOR_SDA	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A4_I2C2SENSOR_SDA,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A4_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A4_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A4_SC_RST	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A4_SC_RST,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A4_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A4_SHIFT		= 8,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A5_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A5_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A5_I2C2SENSOR_SCL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A5_I2C2SENSOR_SCL,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A5_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A5_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A5_SC_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A5_SC_CLK,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A5_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A5_SHIFT		= 10,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A6_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A6_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A6_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A6_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A6_RESERVE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A6_RESERVE,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A6_SC_IO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A6_SC_IO,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A6_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A6_SHIFT		= 12,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A6_SPI2_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A6_SPI2_CLK,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A7_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A7_GPIO		= 0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A7_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A7_MASK		= 3,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A7_RESERVE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A7_RESERVE,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A7_SC_DETECT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A7_SC_DETECT,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A7_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A7_SHIFT		= 14,$/;"	e	enum:__anonbeb2b9770f03
GPIO8A7_SPI2_CSN0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8A7_SPI2_CSN0,$/;"	e	enum:__anonbeb2b9770f03
GPIO8B0_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B0_GPIO		= 0,$/;"	e	enum:__anonbeb2b9771003
GPIO8B0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B0_MASK		= 3,$/;"	e	enum:__anonbeb2b9771003
GPIO8B0_SC_RST	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B0_SC_RST,$/;"	e	enum:__anonbeb2b9771003
GPIO8B0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B0_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9771003
GPIO8B0_SPI2_RXD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B0_SPI2_RXD,$/;"	e	enum:__anonbeb2b9771003
GPIO8B1_GPIO	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B1_GPIO		= 0,$/;"	e	enum:__anonbeb2b9771003
GPIO8B1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B1_MASK		= 3,$/;"	e	enum:__anonbeb2b9771003
GPIO8B1_SC_CLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B1_SC_CLK,$/;"	e	enum:__anonbeb2b9771003
GPIO8B1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B1_SHIFT		= 2,$/;"	e	enum:__anonbeb2b9771003
GPIO8B1_SPI2_TXD	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GPIO8B1_SPI2_TXD,$/;"	e	enum:__anonbeb2b9771003
GPIO8_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO8_2	/;"	d
GPIO8_233	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO8_233	/;"	d
GPIO8_234	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define GPIO8_234	/;"	d
GPIO8_48MHz	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO8_48MHz	/;"	d
GPIO8_48MHz_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO8_48MHz_MD	/;"	d
GPIO8_MMCCS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO8_MMCCS0	/;"	d
GPIO8_MMCCS0_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO8_MMCCS0_MD	/;"	d
GPIO9	arch/arm/include/asm/arch-omap3/omap.h	/^#define GPIO9	/;"	d
GPIO9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO9	/;"	d
GPIO9	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO9	/;"	d
GPIO90	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO90	/;"	d
GPIO91	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO91	/;"	d
GPIO92	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO92	/;"	d
GPIO93	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO93	/;"	d
GPIO94	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO94	/;"	d
GPIO95	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO95	/;"	d
GPIO96	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO96	/;"	d
GPIO97	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO97	/;"	d
GPIO98	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO98	/;"	d
GPIO99	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO99	/;"	d
GPIO9_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	GPIO9_2	/;"	d
GPIO9_MMCCS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO9_MMCCS1	/;"	d
GPIO9_MMCCS1_MD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO9_MMCCS1_MD	/;"	d
GPIOAO_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_0	/;"	d
GPIOAO_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_1	/;"	d
GPIOAO_10	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_10	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_10	/;"	d
GPIOAO_11	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_11	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_11	/;"	d
GPIOAO_12	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_12	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_12	/;"	d
GPIOAO_13	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_13	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_13	/;"	d
GPIOAO_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_2	/;"	d
GPIOAO_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_3	/;"	d
GPIOAO_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_4	/;"	d
GPIOAO_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_5	/;"	d
GPIOAO_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_6	/;"	d
GPIOAO_7	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_7	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_7	/;"	d
GPIOAO_8	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_8	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_8	/;"	d
GPIOAO_9	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOAO_9	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOAO_9	/;"	d
GPIOA_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GPIOA_BASE_ADDR /;"	d
GPIOBASE	board/mpl/vcma9/lowlevel_init.S	/^#define GPIOBASE	/;"	d	file:
GPIOB_16_MUX_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOB_16_MUX_MASK	/;"	d
GPIOB_16_MUX_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOB_16_MUX_SHIFT	/;"	d
GPIOB_17_MUX_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOB_17_MUX_MASK	/;"	d
GPIOB_17_MUX_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOB_17_MUX_SHIFT	/;"	d
GPIOB_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GPIOB_BASE_ADDR /;"	d
GPIOCLK_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_0	/;"	d
GPIOCLK_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_1	/;"	d
GPIOCLK_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_2	/;"	d
GPIOCLK_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCLK_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOCLK_3	/;"	d
GPIOCTRL	drivers/net/ax88180.h	/^#define GPIOCTRL	/;"	d
GPIOC_30_MODE_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_30_MODE_MASK	/;"	d
GPIOC_30_MODE_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_30_MODE_SHIFT	/;"	d
GPIOC_30_MUX_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_30_MUX_MASK	/;"	d
GPIOC_30_MUX_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_30_MUX_SHIFT	/;"	d
GPIOC_31_MODE_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_31_MODE_MASK	/;"	d
GPIOC_31_MODE_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_31_MODE_SHIFT	/;"	d
GPIOC_31_MUX_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_31_MUX_MASK	/;"	d
GPIOC_31_MUX_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define GPIOC_31_MUX_SHIFT	/;"	d
GPIOC_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GPIOC_BASE_ADDR /;"	d
GPIODATADIR1	board/ti/beagle/beagle.c	/^		#define GPIODATADIR1 /;"	d	file:
GPIODATAOUT1	board/ti/beagle/beagle.c	/^		#define GPIODATAOUT1 /;"	d	file:
GPIODV_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_0	/;"	d
GPIODV_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_1	/;"	d
GPIODV_10	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_10	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_10	/;"	d
GPIODV_11	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_11	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_11	/;"	d
GPIODV_12	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_12	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_12	/;"	d
GPIODV_13	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_13	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_13	/;"	d
GPIODV_14	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_14	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_14	/;"	d
GPIODV_15	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_15	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_15	/;"	d
GPIODV_16	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_16	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_16	/;"	d
GPIODV_17	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_17	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_17	/;"	d
GPIODV_18	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_18	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_18	/;"	d
GPIODV_19	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_19	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_19	/;"	d
GPIODV_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_2	/;"	d
GPIODV_20	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_20	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_20	/;"	d
GPIODV_21	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_21	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_21	/;"	d
GPIODV_22	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_22	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_22	/;"	d
GPIODV_23	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_23	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_23	/;"	d
GPIODV_24	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_24	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_24	/;"	d
GPIODV_25	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_25	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_25	/;"	d
GPIODV_26	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_26	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_26	/;"	d
GPIODV_27	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_27	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_27	/;"	d
GPIODV_28	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_28	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_28	/;"	d
GPIODV_29	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_29	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_29	/;"	d
GPIODV_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_3	/;"	d
GPIODV_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_4	/;"	d
GPIODV_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_5	/;"	d
GPIODV_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_6	/;"	d
GPIODV_7	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_7	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_7	/;"	d
GPIODV_8	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_8	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_8	/;"	d
GPIODV_9	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIODV_9	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIODV_9	/;"	d
GPIOD_ACTIVE_LOW	include/asm-generic/gpio.h	/^#define GPIOD_ACTIVE_LOW	/;"	d
GPIOD_IS_IN	include/asm-generic/gpio.h	/^#define GPIOD_IS_IN	/;"	d
GPIOD_IS_OUT	include/asm-generic/gpio.h	/^#define GPIOD_IS_OUT	/;"	d
GPIOD_IS_OUT_ACTIVE	include/asm-generic/gpio.h	/^#define GPIOD_IS_OUT_ACTIVE	/;"	d
GPIOD_REQUESTED	include/asm-generic/gpio.h	/^#define GPIOD_REQUESTED	/;"	d
GPIOF_COUNT	include/asm-generic/gpio.h	/^	GPIOF_COUNT,$/;"	e	enum:gpio_func_t
GPIOF_FUNC	include/asm-generic/gpio.h	/^	GPIOF_FUNC,		\/* Not used as a GPIO *\/$/;"	e	enum:gpio_func_t
GPIOF_HIGH	drivers/gpio/sandbox.c	/^#define GPIOF_HIGH	/;"	d	file:
GPIOF_INPUT	include/asm-generic/gpio.h	/^	GPIOF_INPUT = 0,$/;"	e	enum:gpio_func_t
GPIOF_ODR	drivers/gpio/sandbox.c	/^#define GPIOF_ODR	/;"	d	file:
GPIOF_OUTPUT	drivers/gpio/sandbox.c	/^#define GPIOF_OUTPUT	/;"	d	file:
GPIOF_OUTPUT	include/asm-generic/gpio.h	/^	GPIOF_OUTPUT,$/;"	e	enum:gpio_func_t
GPIOF_UNKNOWN	include/asm-generic/gpio.h	/^	GPIOF_UNKNOWN,		\/* Not known *\/$/;"	e	enum:gpio_func_t
GPIOF_UNUSED	include/asm-generic/gpio.h	/^	GPIOF_UNUSED,		\/* Not claimed *\/$/;"	e	enum:gpio_func_t
GPIOH_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_0	/;"	d
GPIOH_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_1	/;"	d
GPIOH_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_2	/;"	d
GPIOH_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOH_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOH_3	/;"	d
GPIOIC	arch/sh/include/asm/cpu_sh7750.h	/^#define GPIOIC	/;"	d
GPIOKEY_BITS_RECOVERY	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BITS_RECOVERY	/;"	d	file:
GPIOKEY_BIT_DIRDOWN	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BIT_DIRDOWN	/;"	d	file:
GPIOKEY_BIT_DIRLEFT	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BIT_DIRLEFT	/;"	d	file:
GPIOKEY_BIT_DIRRIGHT	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BIT_DIRRIGHT	/;"	d	file:
GPIOKEY_BIT_DIRUP	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BIT_DIRUP	/;"	d	file:
GPIOKEY_BIT_FNLEFT	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BIT_FNLEFT	/;"	d	file:
GPIOKEY_BIT_FNRIGHT	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_BIT_FNRIGHT	/;"	d	file:
GPIOKEY_COL0_BITMASK	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_COL0_BITMASK	/;"	d	file:
GPIOKEY_COL1_BITMASK	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_COL1_BITMASK	/;"	d	file:
GPIOKEY_COL2_BITMASK	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_COL2_BITMASK	/;"	d	file:
GPIOKEY_ROW_BITMASK	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_ROW_BITMASK	/;"	d	file:
GPIOKEY_ROW_LOWER	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_ROW_LOWER	/;"	d	file:
GPIOKEY_ROW_UPPER	board/ifm/ac14xx/ac14xx.c	/^#define GPIOKEY_ROW_UPPER	/;"	d	file:
GPIOPAD_A	include/radeon.h	/^#define GPIOPAD_A	/;"	d
GPIOPAD_EN	include/radeon.h	/^#define GPIOPAD_EN	/;"	d
GPIOPAD_MASK	include/radeon.h	/^#define GPIOPAD_MASK	/;"	d
GPIOPAD_Y	include/radeon.h	/^#define GPIOPAD_Y	/;"	d
GPIOX_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_0	/;"	d
GPIOX_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_1	/;"	d
GPIOX_10	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_10	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_10	/;"	d
GPIOX_11	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_11	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_11	/;"	d
GPIOX_12	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_12	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_12	/;"	d
GPIOX_13	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_13	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_13	/;"	d
GPIOX_14	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_14	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_14	/;"	d
GPIOX_15	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_15	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_15	/;"	d
GPIOX_16	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_16	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_16	/;"	d
GPIOX_17	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_17	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_17	/;"	d
GPIOX_18	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_18	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_18	/;"	d
GPIOX_19	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_19	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_19	/;"	d
GPIOX_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_2	/;"	d
GPIOX_20	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_20	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_20	/;"	d
GPIOX_21	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_21	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_21	/;"	d
GPIOX_22	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_22	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_22	/;"	d
GPIOX_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_3	/;"	d
GPIOX_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_4	/;"	d
GPIOX_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_5	/;"	d
GPIOX_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_6	/;"	d
GPIOX_7	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_7	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_7	/;"	d
GPIOX_8	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_8	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_8	/;"	d
GPIOX_9	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOX_9	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOX_9	/;"	d
GPIOY_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_0	/;"	d
GPIOY_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_1	/;"	d
GPIOY_10	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_10	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_10	/;"	d
GPIOY_11	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_11	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_11	/;"	d
GPIOY_12	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_12	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_12	/;"	d
GPIOY_13	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_13	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_13	/;"	d
GPIOY_14	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_14	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_14	/;"	d
GPIOY_15	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_15	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_15	/;"	d
GPIOY_16	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_16	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_16	/;"	d
GPIOY_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_2	/;"	d
GPIOY_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_3	/;"	d
GPIOY_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_4	/;"	d
GPIOY_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_5	/;"	d
GPIOY_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_6	/;"	d
GPIOY_7	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_7	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_7	/;"	d
GPIOY_8	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_8	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_8	/;"	d
GPIOY_9	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOY_9	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOY_9	/;"	d
GPIOZ_0	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_0	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_0	/;"	d
GPIOZ_1	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_1	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_1	/;"	d
GPIOZ_10	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_10	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_10	/;"	d
GPIOZ_11	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_11	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_11	/;"	d
GPIOZ_12	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_12	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_12	/;"	d
GPIOZ_13	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_13	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_13	/;"	d
GPIOZ_14	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_14	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_14	/;"	d
GPIOZ_15	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_15	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_15	/;"	d
GPIOZ_2	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_2	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_2	/;"	d
GPIOZ_3	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_3	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_3	/;"	d
GPIOZ_4	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_4	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_4	/;"	d
GPIOZ_5	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_5	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_5	/;"	d
GPIOZ_6	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_6	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_6	/;"	d
GPIOZ_7	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_7	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_7	/;"	d
GPIOZ_8	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_8	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_8	/;"	d
GPIOZ_9	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIOZ_9	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIOZ_9	/;"	d
GPIO_0	arch/blackfin/include/asm/gpio.h	/^#define GPIO_0	/;"	d
GPIO_1	arch/blackfin/include/asm/gpio.h	/^#define GPIO_1	/;"	d
GPIO_10	arch/blackfin/include/asm/gpio.h	/^#define GPIO_10	/;"	d
GPIO_11	arch/blackfin/include/asm/gpio.h	/^#define GPIO_11	/;"	d
GPIO_12	arch/blackfin/include/asm/gpio.h	/^#define GPIO_12	/;"	d
GPIO_13	arch/blackfin/include/asm/gpio.h	/^#define GPIO_13	/;"	d
GPIO_14	arch/blackfin/include/asm/gpio.h	/^#define GPIO_14	/;"	d
GPIO_15	arch/blackfin/include/asm/gpio.h	/^#define GPIO_15	/;"	d
GPIO_16	arch/blackfin/include/asm/gpio.h	/^#define GPIO_16	/;"	d
GPIO_17	arch/blackfin/include/asm/gpio.h	/^#define GPIO_17	/;"	d
GPIO_18	arch/blackfin/include/asm/gpio.h	/^#define GPIO_18	/;"	d
GPIO_19	arch/blackfin/include/asm/gpio.h	/^#define GPIO_19	/;"	d
GPIO_1Hz	include/SA-1100.h	/^#define GPIO_1Hz	/;"	d
GPIO_2	arch/blackfin/include/asm/gpio.h	/^#define GPIO_2	/;"	d
GPIO_20	arch/blackfin/include/asm/gpio.h	/^#define GPIO_20	/;"	d
GPIO_21	arch/blackfin/include/asm/gpio.h	/^#define GPIO_21	/;"	d
GPIO_22	arch/blackfin/include/asm/gpio.h	/^#define GPIO_22	/;"	d
GPIO_23	arch/blackfin/include/asm/gpio.h	/^#define GPIO_23	/;"	d
GPIO_24	arch/blackfin/include/asm/gpio.h	/^#define GPIO_24	/;"	d
GPIO_25	arch/blackfin/include/asm/gpio.h	/^#define GPIO_25	/;"	d
GPIO_26	arch/blackfin/include/asm/gpio.h	/^#define GPIO_26	/;"	d
GPIO_27	arch/blackfin/include/asm/gpio.h	/^#define GPIO_27	/;"	d
GPIO_28	arch/blackfin/include/asm/gpio.h	/^#define GPIO_28	/;"	d
GPIO_29	arch/blackfin/include/asm/gpio.h	/^#define GPIO_29	/;"	d
GPIO_2BIT_MASK	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_2BIT_MASK	/;"	d	file:
GPIO_3	arch/blackfin/include/asm/gpio.h	/^#define GPIO_3	/;"	d
GPIO_30	arch/blackfin/include/asm/gpio.h	/^#define GPIO_30	/;"	d
GPIO_31	arch/blackfin/include/asm/gpio.h	/^#define GPIO_31	/;"	d
GPIO_32	arch/blackfin/include/asm/gpio.h	/^#define GPIO_32	/;"	d
GPIO_32_768kHz	include/SA-1100.h	/^#define GPIO_32_768kHz	/;"	d
GPIO_33	arch/blackfin/include/asm/gpio.h	/^#define GPIO_33	/;"	d
GPIO_34	arch/blackfin/include/asm/gpio.h	/^#define GPIO_34	/;"	d
GPIO_35	arch/blackfin/include/asm/gpio.h	/^#define GPIO_35	/;"	d
GPIO_36	arch/blackfin/include/asm/gpio.h	/^#define GPIO_36	/;"	d
GPIO_37	arch/blackfin/include/asm/gpio.h	/^#define GPIO_37	/;"	d
GPIO_38	arch/blackfin/include/asm/gpio.h	/^#define GPIO_38	/;"	d
GPIO_39	arch/blackfin/include/asm/gpio.h	/^#define GPIO_39	/;"	d
GPIO_4	arch/blackfin/include/asm/gpio.h	/^#define GPIO_4	/;"	d
GPIO_40	arch/blackfin/include/asm/gpio.h	/^#define GPIO_40	/;"	d
GPIO_41	arch/blackfin/include/asm/gpio.h	/^#define GPIO_41	/;"	d
GPIO_42	arch/blackfin/include/asm/gpio.h	/^#define GPIO_42	/;"	d
GPIO_43	arch/blackfin/include/asm/gpio.h	/^#define GPIO_43	/;"	d
GPIO_44	arch/blackfin/include/asm/gpio.h	/^#define GPIO_44	/;"	d
GPIO_45	arch/blackfin/include/asm/gpio.h	/^#define GPIO_45	/;"	d
GPIO_46	arch/blackfin/include/asm/gpio.h	/^#define GPIO_46	/;"	d
GPIO_47	arch/blackfin/include/asm/gpio.h	/^#define GPIO_47	/;"	d
GPIO_5	arch/blackfin/include/asm/gpio.h	/^#define GPIO_5	/;"	d
GPIO_6	arch/blackfin/include/asm/gpio.h	/^#define GPIO_6	/;"	d
GPIO_7	arch/blackfin/include/asm/gpio.h	/^#define GPIO_7	/;"	d
GPIO_8	arch/blackfin/include/asm/gpio.h	/^#define GPIO_8	/;"	d
GPIO_9	arch/blackfin/include/asm/gpio.h	/^#define GPIO_9	/;"	d
GPIO_A	board/keymile/kmp204x/kmp204x.h	/^#define GPIO_A	/;"	d
GPIO_ACTIVE_HIGH	arch/arm/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	arch/microblaze/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	arch/mips/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	arch/nios2/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	arch/sandbox/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	arch/x86/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	arch/xtensa/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_HIGH	include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_HIGH /;"	d
GPIO_ACTIVE_LOW	arch/arm/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	arch/microblaze/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	arch/mips/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	arch/nios2/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	arch/sandbox/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	arch/x86/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	arch/xtensa/dts/include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_ACTIVE_LOW	include/dt-bindings/gpio/gpio.h	/^#define GPIO_ACTIVE_LOW /;"	d
GPIO_AF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AF /;"	d
GPIO_AF	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AF	/;"	d
GPIO_AIN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AIN /;"	d
GPIO_AIN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AIN	/;"	d
GPIO_ALARM_LED	board/buffalo/lsxl/lsxl.h	/^#define GPIO_ALARM_LED	/;"	d
GPIO_ALT1	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;$/;"	e	enum:gpio_select
GPIO_ALT1_SEL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_ALT1_SEL	/;"	d
GPIO_ALT2	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;$/;"	e	enum:gpio_select
GPIO_ALT2_SEL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_ALT2_SEL	/;"	d
GPIO_ALT3	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;$/;"	e	enum:gpio_select
GPIO_ALT3_SEL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_ALT3_SEL	/;"	d
GPIO_ALT_FN_1_IN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_ALT_FN_1_IN	/;"	d
GPIO_ALT_FN_1_OUT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_ALT_FN_1_OUT	/;"	d
GPIO_ALT_FN_2_IN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_ALT_FN_2_IN	/;"	d
GPIO_ALT_FN_2_OUT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_ALT_FN_2_OUT	/;"	d
GPIO_ALT_FN_3_IN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_ALT_FN_3_IN	/;"	d
GPIO_ALT_FN_3_OUT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_ALT_FN_3_OUT	/;"	d
GPIO_AOUT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AOUT /;"	d
GPIO_AOUT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AOUT	/;"	d
GPIO_AOUT_0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AOUT_0 /;"	d
GPIO_AOUT_0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AOUT_0	/;"	d
GPIO_AOUT_1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AOUT_1 /;"	d
GPIO_AOUT_1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AOUT_1	/;"	d
GPIO_AOUT_ISR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AOUT_ISR /;"	d
GPIO_AOUT_ISR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AOUT_ISR	/;"	d
GPIO_AOUT_MASK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AOUT_MASK /;"	d
GPIO_AOUT_MASK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AOUT_MASK	/;"	d
GPIO_AOUT_SHIFT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_AOUT_SHIFT /;"	d
GPIO_AOUT_SHIFT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_AOUT_SHIFT	/;"	d
GPIO_A_0	include/radeon.h	/^#define GPIO_A_0	/;"	d
GPIO_A_1	include/radeon.h	/^#define GPIO_A_1	/;"	d
GPIO_A_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_A_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_A_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_A_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_B	board/keymile/kmp204x/kmp204x.h	/^#define GPIO_B	/;"	d
GPIO_BANK	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_BANK(/;"	d
GPIO_BANK	arch/arm/include/asm/arch-tegra/gpio.h	/^#define GPIO_BANK(/;"	d
GPIO_BANK	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_BANK(/;"	d
GPIO_BANK	arch/arm/mach-davinci/include/mach/gpio.h	/^#define GPIO_BANK(/;"	d
GPIO_BANK	drivers/gpio/kona_gpio.c	/^#define GPIO_BANK(/;"	d	file:
GPIO_BANK0_REG_CLR_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK0_REG_CLR_ADDR	/;"	d
GPIO_BANK0_REG_DIR_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK0_REG_DIR_ADDR	/;"	d
GPIO_BANK0_REG_OPDATA_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK0_REG_OPDATA_ADDR	/;"	d
GPIO_BANK0_REG_SET_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK0_REG_SET_ADDR	/;"	d
GPIO_BANK2_REG_CLR_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK2_REG_CLR_ADDR	/;"	d
GPIO_BANK2_REG_DIR_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK2_REG_DIR_ADDR	/;"	d
GPIO_BANK2_REG_OPDATA_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK2_REG_OPDATA_ADDR	/;"	d
GPIO_BANK2_REG_SET_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK2_REG_SET_ADDR	/;"	d
GPIO_BANK6_REG_CLR_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK6_REG_CLR_ADDR	/;"	d
GPIO_BANK6_REG_DIR_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK6_REG_DIR_ADDR	/;"	d
GPIO_BANK6_REG_OPDATA_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK6_REG_OPDATA_ADDR	/;"	d
GPIO_BANK6_REG_SET_ADDR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define GPIO_BANK6_REG_SET_ADDR	/;"	d
GPIO_BANKS	arch/x86/include/asm/arch-broadwell/gpio.h	/^#define GPIO_BANKS	/;"	d
GPIO_BANKSIZE	arch/blackfin/include/asm/gpio.h	/^#define GPIO_BANKSIZE	/;"	d
GPIO_BANK_NUM	arch/blackfin/include/asm/gpio.h	/^#define GPIO_BANK_NUM	/;"	d
GPIO_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/powerpc/include/asm/ppc4xx.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/x86/cpu/ivybridge/bd82x6x.c	/^#define GPIO_BASE	/;"	d	file:
GPIO_BASE	arch/x86/cpu/quark/Kconfig	/^config GPIO_BASE$/;"	c
GPIO_BASE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPIO_BASE	/;"	d
GPIO_BASE	board/inka4x0/inkadiag.c	/^#define GPIO_BASE	/;"	d	file:
GPIO_BASE	board/renesas/sh7785lcr/lowlevel_init.S	/^#define GPIO_BASE	/;"	d	file:
GPIO_BASE	drivers/gpio/kona_gpio.c	/^#define GPIO_BASE	/;"	d	file:
GPIO_BASE	drivers/pch/pch7.c	/^#define GPIO_BASE	/;"	d	file:
GPIO_BASE	drivers/pch/pch9.c	/^#define GPIO_BASE	/;"	d	file:
GPIO_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define GPIO_BASE_ADDRESS	/;"	d
GPIO_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define GPIO_BASE_ADDRESS	/;"	d
GPIO_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define GPIO_BASE_ADDRESS	/;"	d
GPIO_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define GPIO_BASE_SIZE	/;"	d
GPIO_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define GPIO_BASE_SIZE	/;"	d
GPIO_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define GPIO_BASE_SIZE	/;"	d
GPIO_BI	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;$/;"	e	enum:gpio_driver
GPIO_BIN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BIN /;"	d
GPIO_BIN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BIN	/;"	d
GPIO_BIT	arch/arm/include/asm/arch-tegra/gpio.h	/^#define GPIO_BIT(/;"	d
GPIO_BIT	arch/arm/mach-davinci/include/mach/gpio.h	/^#define GPIO_BIT(/;"	d
GPIO_BITMASK	drivers/gpio/kona_gpio.c	/^#define GPIO_BITMASK(/;"	d	file:
GPIO_BLINK_EN	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_BLINK_EN(/;"	d
GPIO_BLOCK	drivers/gpio/db8500_gpio.c	/^#define GPIO_BLOCK(/;"	d	file:
GPIO_BLOCKS_COUNT	drivers/gpio/db8500_gpio.c	/^#define GPIO_BLOCKS_COUNT	/;"	d	file:
GPIO_BL_ON	board/toradex/colibri_imx7/colibri_imx7.c	/^#define GPIO_BL_ON /;"	d	file:
GPIO_BOTH_EDGES	arch/arm/include/asm/arch-pxa/hardware.h	/^#define GPIO_BOTH_EDGES	/;"	d
GPIO_BOUT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BOUT /;"	d
GPIO_BOUT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BOUT	/;"	d
GPIO_BOUT_0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BOUT_0 /;"	d
GPIO_BOUT_0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BOUT_0	/;"	d
GPIO_BOUT_1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BOUT_1 /;"	d
GPIO_BOUT_1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BOUT_1	/;"	d
GPIO_BOUT_ISR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BOUT_ISR /;"	d
GPIO_BOUT_ISR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BOUT_ISR	/;"	d
GPIO_BOUT_MASK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BOUT_MASK /;"	d
GPIO_BOUT_MASK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BOUT_MASK	/;"	d
GPIO_BOUT_SHIFT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_BOUT_SHIFT /;"	d
GPIO_BOUT_SHIFT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_BOUT_SHIFT	/;"	d
GPIO_B_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_B_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_B_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_B_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_CFG	board/micronas/vct/smc_eeprom.c	/^#define GPIO_CFG	/;"	d	file:
GPIO_CFG	drivers/net/smc911x.h	/^#define GPIO_CFG	/;"	d
GPIO_CFG_DRYRUN	drivers/gpio/sh_pfc.c	/^enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };$/;"	e	enum:__anon506e29b50103	file:
GPIO_CFG_EEPR_EN	drivers/net/smc911x.h	/^#define	GPIO_CFG_EEPR_EN	/;"	d
GPIO_CFG_FREE	drivers/gpio/sh_pfc.c	/^enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };$/;"	e	enum:__anon506e29b50103	file:
GPIO_CFG_GPIO0_INT_POL	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIO0_INT_POL	/;"	d
GPIO_CFG_GPIO1_INT_POL	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIO1_INT_POL	/;"	d
GPIO_CFG_GPIO2_INT_POL	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIO2_INT_POL	/;"	d
GPIO_CFG_GPIOBUF0	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOBUF0	/;"	d
GPIO_CFG_GPIOBUF1	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOBUF1	/;"	d
GPIO_CFG_GPIOBUF2	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOBUF2	/;"	d
GPIO_CFG_GPIOD0	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOD0	/;"	d
GPIO_CFG_GPIOD1	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOD1	/;"	d
GPIO_CFG_GPIOD2	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOD2	/;"	d
GPIO_CFG_GPIOD3	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOD3	/;"	d
GPIO_CFG_GPIOD4	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIOD4	/;"	d
GPIO_CFG_GPIODIR0	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIODIR0	/;"	d
GPIO_CFG_GPIODIR1	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIODIR1	/;"	d
GPIO_CFG_GPIODIR2	drivers/net/smc911x.h	/^#define	GPIO_CFG_GPIODIR2	/;"	d
GPIO_CFG_INDEX	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_CFG_INDEX(/;"	d
GPIO_CFG_INDEX	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_CFG_INDEX(/;"	d
GPIO_CFG_LED1_EN	drivers/net/smc911x.h	/^#define	GPIO_CFG_LED1_EN	/;"	d
GPIO_CFG_LED2_EN	drivers/net/smc911x.h	/^#define	GPIO_CFG_LED2_EN	/;"	d
GPIO_CFG_LED3_EN	drivers/net/smc911x.h	/^#define	GPIO_CFG_LED3_EN	/;"	d
GPIO_CFG_OFFSET	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_CFG_OFFSET(/;"	d
GPIO_CFG_OFFSET	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_CFG_OFFSET(/;"	d
GPIO_CFG_REQ	drivers/gpio/sh_pfc.c	/^enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };$/;"	e	enum:__anon506e29b50103	file:
GPIO_CIN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_CIN /;"	d
GPIO_CIN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_CIN	/;"	d
GPIO_CLEAR	cmd/gpio.c	/^	GPIO_CLEAR,$/;"	e	enum:gpio_cmd	file:
GPIO_CNTL	arch/x86/include/asm/arch-broadwell/pch.h	/^#define GPIO_CNTL	/;"	d
GPIO_CNTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPIO_CNTL	/;"	d
GPIO_CONFIG_OFF	drivers/gpio/msm_gpio.c	/^#define GPIO_CONFIG_OFF(/;"	d	file:
GPIO_CONTROL	drivers/gpio/kona_gpio.c	/^#define GPIO_CONTROL(/;"	d	file:
GPIO_CRT2_DDC	include/radeon.h	/^#define GPIO_CRT2_DDC	/;"	d
GPIO_CTRL_DISABLEMODULE_MASK	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define GPIO_CTRL_DISABLEMODULE_MASK	/;"	d
GPIO_CTRL_DISABLEMODULE_SHIFT	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define GPIO_CTRL_DISABLEMODULE_SHIFT	/;"	d
GPIO_CTRL_ENABLEMODULE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define GPIO_CTRL_ENABLEMODULE	/;"	d
GPIO_C_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_C_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_C_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_C_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_DATA_IN	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_DATA_IN(/;"	d
GPIO_DDR_RST_DATA	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_DDR_RST_DATA	/;"	d	file:
GPIO_DDR_RST_PIN	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_DDR_RST_PIN	/;"	d	file:
GPIO_DDR_RST_PORT	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_DDR_RST_PORT	/;"	d	file:
GPIO_DDR_VTT_EN	board/birdland/bav335x/board.c	/^#define GPIO_DDR_VTT_EN	/;"	d	file:
GPIO_DDR_VTT_EN	board/ti/am335x/board.c	/^#define GPIO_DDR_VTT_EN	/;"	d	file:
GPIO_DDR_VTT_EN	board/ti/am57xx/board.c	/^#define GPIO_DDR_VTT_EN /;"	d	file:
GPIO_DDR_VTT_EN	board/ti/dra7xx/evm.c	/^#define GPIO_DDR_VTT_EN /;"	d	file:
GPIO_DDR_VTT_EN	board/vscom/baltos/board.c	/^#define GPIO_DDR_VTT_EN	/;"	d	file:
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS /;"	d
GPIO_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define GPIO_DEFAULT_BOOT_SPI_CS$/;"	d
GPIO_DIR	board/varisys/cyrus/cyrus.c	/^#define GPIO_DIR /;"	d	file:
GPIO_DIRECTION_IN	arch/arm/include/asm/arch-spear/gpio.h	/^	GPIO_DIRECTION_IN,$/;"	e	enum:gpio_direction
GPIO_DIRECTION_IN	arch/arm/include/asm/arch-stv0991/gpio.h	/^	GPIO_DIRECTION_IN,$/;"	e	enum:gpio_direction
GPIO_DIRECTION_IN	drivers/gpio/xilinx_gpio.c	/^	GPIO_DIRECTION_IN = 1,$/;"	e	enum:gpio_direction	file:
GPIO_DIRECTION_OUT	arch/arm/include/asm/arch-spear/gpio.h	/^	GPIO_DIRECTION_OUT,$/;"	e	enum:gpio_direction
GPIO_DIRECTION_OUT	arch/arm/include/asm/arch-stv0991/gpio.h	/^	GPIO_DIRECTION_OUT,$/;"	e	enum:gpio_direction
GPIO_DIRECTION_OUT	drivers/gpio/xilinx_gpio.c	/^	GPIO_DIRECTION_OUT = 0,$/;"	e	enum:gpio_direction	file:
GPIO_DIR_INPUT	include/smsc_sio1007.h	/^#define GPIO_DIR_INPUT	/;"	d
GPIO_DIR_OUTPUT	include/smsc_sio1007.h	/^#define GPIO_DIR_OUTPUT	/;"	d
GPIO_DIS	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;$/;"	e	enum:gpio_driver
GPIO_DR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_DR /;"	d
GPIO_DR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GPIO_DR	/;"	d
GPIO_DRV_INDEX	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_DRV_INDEX(/;"	d
GPIO_DRV_INDEX	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_DRV_INDEX(/;"	d
GPIO_DRV_OFFSET	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_DRV_OFFSET(/;"	d
GPIO_DRV_OFFSET	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_DRV_OFFSET(/;"	d
GPIO_DSCR_ATA_ATA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_ATA_ATA(/;"	d
GPIO_DSCR_ATA_ATA_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_ATA_ATA_LOAD_10PF	/;"	d
GPIO_DSCR_ATA_ATA_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_ATA_ATA_LOAD_20PF	/;"	d
GPIO_DSCR_ATA_ATA_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_ATA_ATA_LOAD_30PF	/;"	d
GPIO_DSCR_ATA_ATA_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_ATA_ATA_LOAD_50PF	/;"	d
GPIO_DSCR_CLKRST_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_CLKRST_DSE(/;"	d
GPIO_DSCR_DEBUG_DEBUG	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DEBUG_DEBUG(/;"	d
GPIO_DSCR_DEBUG_DEBUG_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DEBUG_DEBUG_LOAD_10PF	/;"	d
GPIO_DSCR_DEBUG_DEBUG_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DEBUG_DEBUG_LOAD_20PF	/;"	d
GPIO_DSCR_DEBUG_DEBUG_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DEBUG_DEBUG_LOAD_30PF	/;"	d
GPIO_DSCR_DEBUG_DEBUG_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DEBUG_DEBUG_LOAD_50PF	/;"	d
GPIO_DSCR_DEBUG_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_DEBUG_DSE(/;"	d
GPIO_DSCR_DMA_DMA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DMA_DMA(/;"	d
GPIO_DSCR_DMA_DMA_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DMA_DMA_LOAD_10PF	/;"	d
GPIO_DSCR_DMA_DMA_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DMA_DMA_LOAD_20PF	/;"	d
GPIO_DSCR_DMA_DMA_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DMA_DMA_LOAD_30PF	/;"	d
GPIO_DSCR_DMA_DMA_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DMA_DMA_LOAD_50PF	/;"	d
GPIO_DSCR_DSPI_DSPI	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DSPI_DSPI(/;"	d
GPIO_DSCR_DSPI_DSPI_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DSPI_DSPI_LOAD_10PF	/;"	d
GPIO_DSCR_DSPI_DSPI_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DSPI_DSPI_LOAD_20PF	/;"	d
GPIO_DSCR_DSPI_DSPI_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DSPI_DSPI_LOAD_30PF	/;"	d
GPIO_DSCR_DSPI_DSPI_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_DSPI_DSPI_LOAD_50PF	/;"	d
GPIO_DSCR_EIM_EIM0	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_EIM_EIM0	/;"	d
GPIO_DSCR_EIM_EIM1	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_EIM_EIM1	/;"	d
GPIO_DSCR_ETPU_ETPU15_8	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_ETPU_ETPU15_8	/;"	d
GPIO_DSCR_ETPU_ETPU23_16	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_ETPU_ETPU23_16	/;"	d
GPIO_DSCR_ETPU_ETPU31_24	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_ETPU_ETPU31_24	/;"	d
GPIO_DSCR_ETPU_ETPU7_0	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_ETPU_ETPU7_0	/;"	d
GPIO_DSCR_FEC	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_FEC(/;"	d
GPIO_DSCR_FECI2C_FEC	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_FECI2C_FEC	/;"	d
GPIO_DSCR_FECI2C_I2C	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_FECI2C_I2C	/;"	d
GPIO_DSCR_FEC_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_FEC_DSE(/;"	d
GPIO_DSCR_FEC_FEC0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC0(/;"	d
GPIO_DSCR_FEC_FEC0_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC0_LOAD_10PF	/;"	d
GPIO_DSCR_FEC_FEC0_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC0_LOAD_20PF	/;"	d
GPIO_DSCR_FEC_FEC0_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC0_LOAD_30PF	/;"	d
GPIO_DSCR_FEC_FEC0_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC0_LOAD_50PF	/;"	d
GPIO_DSCR_FEC_FEC1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC1(/;"	d
GPIO_DSCR_FEC_FEC1_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC1_LOAD_10PF	/;"	d
GPIO_DSCR_FEC_FEC1_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC1_LOAD_20PF	/;"	d
GPIO_DSCR_FEC_FEC1_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC1_LOAD_30PF	/;"	d
GPIO_DSCR_FEC_FEC1_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FEC_FEC1_LOAD_50PF	/;"	d
GPIO_DSCR_FEC_RMII0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_DSCR_FEC_RMII0(/;"	d
GPIO_DSCR_FEC_RMII0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_DSCR_FEC_RMII0_UNMASK	/;"	d
GPIO_DSCR_FEC_RMII1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_DSCR_FEC_RMII1(/;"	d
GPIO_DSCR_FEC_RMII1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_DSCR_FEC_RMII1_UNMASK	/;"	d
GPIO_DSCR_FEC_RMIICLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_DSCR_FEC_RMIICLK(/;"	d
GPIO_DSCR_FEC_RMIICLK_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_DSCR_FEC_RMIICLK_UNMASK	/;"	d
GPIO_DSCR_FEC_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_FEC_UNMASK	/;"	d
GPIO_DSCR_FLEXBUS_FBADH	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADH(/;"	d
GPIO_DSCR_FLEXBUS_FBADH_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_10PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADH_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_20PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADH_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_30PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADH_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_50PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADL	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADL(/;"	d
GPIO_DSCR_FLEXBUS_FBADL_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_10PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADL_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_20PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADL_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_30PF	/;"	d
GPIO_DSCR_FLEXBUS_FBADL_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_50PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCLK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCLK(/;"	d
GPIO_DSCR_FLEXBUS_FBCLK_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_10PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCLK_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_20PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCLK_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_30PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCLK_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_50PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCTL	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCTL(/;"	d
GPIO_DSCR_FLEXBUS_FBCTL_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_10PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCTL_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_20PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCTL_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_30PF	/;"	d
GPIO_DSCR_FLEXBUS_FBCTL_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_50PF	/;"	d
GPIO_DSCR_I2C	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_I2C(/;"	d
GPIO_DSCR_I2C_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_I2C_DSE(/;"	d
GPIO_DSCR_I2C_I2C	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_I2C_I2C(/;"	d
GPIO_DSCR_I2C_I2C_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_I2C_I2C_LOAD_10PF	/;"	d
GPIO_DSCR_I2C_I2C_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_I2C_I2C_LOAD_20PF	/;"	d
GPIO_DSCR_I2C_I2C_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_I2C_I2C_LOAD_30PF	/;"	d
GPIO_DSCR_I2C_I2C_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_I2C_I2C_LOAD_50PF	/;"	d
GPIO_DSCR_I2C_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_I2C_UNMASK	/;"	d
GPIO_DSCR_IRQ_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_IRQ_DSE(/;"	d
GPIO_DSCR_IRQ_IRQ	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_IRQ_IRQ(/;"	d
GPIO_DSCR_IRQ_IRQ_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_IRQ_IRQ_LOAD_10PF	/;"	d
GPIO_DSCR_IRQ_IRQ_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_IRQ_IRQ_LOAD_20PF	/;"	d
GPIO_DSCR_IRQ_IRQ_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_IRQ_IRQ_LOAD_30PF	/;"	d
GPIO_DSCR_IRQ_IRQ_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_IRQ_IRQ_LOAD_50PF	/;"	d
GPIO_DSCR_LCD_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_LCD_DSE(/;"	d
GPIO_DSCR_MISC_DBG	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_MISC_DBG(/;"	d
GPIO_DSCR_MISC_DBG_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_MISC_DBG_UNMASK	/;"	d
GPIO_DSCR_MISC_RSTOUT	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_MISC_RSTOUT(/;"	d
GPIO_DSCR_MISC_RSTOUT_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_MISC_RSTOUT_UNMASK	/;"	d
GPIO_DSCR_MISC_TIMER	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_MISC_TIMER(/;"	d
GPIO_DSCR_MISC_TIMER_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_MISC_TIMER_UNMASK	/;"	d
GPIO_DSCR_PWM_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_PWM_DSE(/;"	d
GPIO_DSCR_QSPI	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_QSPI(/;"	d
GPIO_DSCR_QSPI_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_QSPI_DSE(/;"	d
GPIO_DSCR_QSPI_QSPI	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_QSPI_QSPI	/;"	d
GPIO_DSCR_QSPI_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_QSPI_UNMASK	/;"	d
GPIO_DSCR_RESET_RESET	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_RESET_RESET(/;"	d
GPIO_DSCR_RESET_RESET_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_RESET_RESET_LOAD_10PF	/;"	d
GPIO_DSCR_RESET_RESET_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_RESET_RESET_LOAD_20PF	/;"	d
GPIO_DSCR_RESET_RESET_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_RESET_RESET_LOAD_30PF	/;"	d
GPIO_DSCR_RESET_RESET_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_RESET_RESET_LOAD_50PF	/;"	d
GPIO_DSCR_SSI_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_SSI_DSE(/;"	d
GPIO_DSCR_SSI_SSI	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_SSI_SSI(/;"	d
GPIO_DSCR_SSI_SSI_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_SSI_SSI_LOAD_10PF	/;"	d
GPIO_DSCR_SSI_SSI_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_SSI_SSI_LOAD_20PF	/;"	d
GPIO_DSCR_SSI_SSI_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_SSI_SSI_LOAD_30PF	/;"	d
GPIO_DSCR_SSI_SSI_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_SSI_SSI_LOAD_50PF	/;"	d
GPIO_DSCR_TIMER	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_TIMER	/;"	d
GPIO_DSCR_TIMER_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_TIMER_DSE(/;"	d
GPIO_DSCR_TIMER_TIMER	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_TIMER_TIMER(/;"	d
GPIO_DSCR_TIMER_TIMER_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_TIMER_TIMER_LOAD_10PF	/;"	d
GPIO_DSCR_TIMER_TIMER_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_TIMER_TIMER_LOAD_20PF	/;"	d
GPIO_DSCR_TIMER_TIMER_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_TIMER_TIMER_LOAD_30PF	/;"	d
GPIO_DSCR_TIMER_TIMER_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_TIMER_TIMER_LOAD_50PF	/;"	d
GPIO_DSCR_UART0_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_UART0_DSE(/;"	d
GPIO_DSCR_UART1_DSE	arch/m68k/include/asm/m5329.h	/^#define GPIO_DSCR_UART1_DSE(/;"	d
GPIO_DSCR_UART_IRQ	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_UART_IRQ(/;"	d
GPIO_DSCR_UART_IRQ	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_UART_IRQ	/;"	d
GPIO_DSCR_UART_IRQ_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_UART_IRQ_UNMASK	/;"	d
GPIO_DSCR_UART_UART0	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_UART_UART0(/;"	d
GPIO_DSCR_UART_UART0	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_UART_UART0	/;"	d
GPIO_DSCR_UART_UART0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART0(/;"	d
GPIO_DSCR_UART_UART0_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART0_LOAD_10PF	/;"	d
GPIO_DSCR_UART_UART0_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART0_LOAD_20PF	/;"	d
GPIO_DSCR_UART_UART0_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART0_LOAD_30PF	/;"	d
GPIO_DSCR_UART_UART0_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART0_LOAD_50PF	/;"	d
GPIO_DSCR_UART_UART0_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_UART_UART0_UNMASK	/;"	d
GPIO_DSCR_UART_UART1	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_UART_UART1(/;"	d
GPIO_DSCR_UART_UART1	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_UART_UART1	/;"	d
GPIO_DSCR_UART_UART1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART1(/;"	d
GPIO_DSCR_UART_UART1_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART1_LOAD_10PF	/;"	d
GPIO_DSCR_UART_UART1_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART1_LOAD_20PF	/;"	d
GPIO_DSCR_UART_UART1_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART1_LOAD_30PF	/;"	d
GPIO_DSCR_UART_UART1_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_UART_UART1_LOAD_50PF	/;"	d
GPIO_DSCR_UART_UART1_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_DSCR_UART_UART1_UNMASK	/;"	d
GPIO_DSCR_UART_UART2	arch/m68k/include/asm/m5235.h	/^#define GPIO_DSCR_UART_UART2	/;"	d
GPIO_DSCR_USB_USB	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_USB_USB(/;"	d
GPIO_DSCR_USB_USB_LOAD_10PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_USB_USB_LOAD_10PF	/;"	d
GPIO_DSCR_USB_USB_LOAD_20PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_USB_USB_LOAD_20PF	/;"	d
GPIO_DSCR_USB_USB_LOAD_30PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_USB_USB_LOAD_30PF	/;"	d
GPIO_DSCR_USB_USB_LOAD_50PF	arch/m68k/include/asm/m5445x.h	/^#define GPIO_DSCR_USB_USB_LOAD_50PF	/;"	d
GPIO_DVI_DDC	include/radeon.h	/^#define GPIO_DVI_DDC	/;"	d
GPIO_D_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_D_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_D_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_D_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_EDGE_CAUSE	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_EDGE_CAUSE(/;"	d
GPIO_EDGE_MASK	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_EDGE_MASK(/;"	d
GPIO_EE_CLK	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPIO_EE_CLK	/;"	d	file:
GPIO_EE_CTS	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPIO_EE_CTS	/;"	d	file:
GPIO_EE_DI	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPIO_EE_DI	/;"	d	file:
GPIO_EE_DO	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPIO_EE_DO	/;"	d	file:
GPIO_EN	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  GPIO_EN	/;"	d
GPIO_ENTRY	arch/arm/mach-exynos/include/mach/gpio.h	/^#define GPIO_ENTRY(/;"	d
GPIO_ENTRY	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define GPIO_ENTRY(/;"	d
GPIO_EN_0	include/radeon.h	/^#define GPIO_EN_0	/;"	d
GPIO_EN_1	include/radeon.h	/^#define GPIO_EN_1	/;"	d
GPIO_ETH0_MODE	board/ti/am335x/board.c	/^#define GPIO_ETH0_MODE	/;"	d	file:
GPIO_ETH1_MODE	board/ti/am335x/board.c	/^#define GPIO_ETH1_MODE	/;"	d	file:
GPIO_EXT_PORTA	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_EXT_PORTA(/;"	d
GPIO_EXT_PORTA	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_EXT_PORTA(/;"	d
GPIO_EXT_PORTA	drivers/gpio/dwapb_gpio.c	/^#define GPIO_EXT_PORTA	/;"	d	file:
GPIO_EXT_PORTA_OFFS	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_EXT_PORTA_OFFS	/;"	d
GPIO_EXT_PORTA_OFFS	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_EXT_PORTA_OFFS	/;"	d
GPIO_E_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_E_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_E_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_E_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_FALLING_EDGE	arch/arm/include/asm/arch-pxa/hardware.h	/^#define GPIO_FALLING_EDGE	/;"	d
GPIO_FAN_HIGH	board/buffalo/lsxl/lsxl.h	/^#define GPIO_FAN_HIGH	/;"	d
GPIO_FAN_LOCK	board/buffalo/lsxl/lsxl.h	/^#define GPIO_FAN_LOCK	/;"	d
GPIO_FAN_LOW	board/buffalo/lsxl/lsxl.h	/^#define GPIO_FAN_LOW	/;"	d
GPIO_FET_SWITCH_CTRL	board/ti/am335x/board.c	/^#define GPIO_FET_SWITCH_CTRL	/;"	d	file:
GPIO_FN	include/sh_pfc.h	/^#define GPIO_FN(/;"	d
GPIO_FN_A0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,$/;"	e	enum:__anond45e39910103
GPIO_FN_A0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A0, GPIO_FN_BS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,$/;"	e	enum:__anond45e39910103
GPIO_FN_A1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A10,	GPIO_FN_A11,	GPIO_FN_A12,	GPIO_FN_A13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,$/;"	e	enum:__anond45e39910103
GPIO_FN_A10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A10,	GPIO_FN_A11,	GPIO_FN_A12,	GPIO_FN_A13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,$/;"	e	enum:__anond45e39910103
GPIO_FN_A11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A11,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A10,	GPIO_FN_A11,	GPIO_FN_A12,	GPIO_FN_A13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,$/;"	e	enum:__anond45e39910103
GPIO_FN_A12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A12, GPIO_FN_PORT58_KEYOUT7, GPIO_FN_TPU4TO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A10,	GPIO_FN_A11,	GPIO_FN_A12,	GPIO_FN_A13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,$/;"	e	enum:__anond45e39910103
GPIO_FN_A13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A13, GPIO_FN_PORT59_KEYOUT6, GPIO_FN_TPU0TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A14,	GPIO_FN_A15,	GPIO_FN_A16,	GPIO_FN_A17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A14, GPIO_FN_A15,$/;"	e	enum:__anond45e39910103
GPIO_FN_A14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A14, GPIO_FN_KEYOUT5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A14,	GPIO_FN_A15,	GPIO_FN_A16,	GPIO_FN_A17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A15, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A14, GPIO_FN_A15,$/;"	e	enum:__anond45e39910103
GPIO_FN_A15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A15, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A15, GPIO_FN_KEYOUT4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A16	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A14,	GPIO_FN_A15,	GPIO_FN_A16,	GPIO_FN_A17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A16, GPIO_FN_A17, GPIO_FN_A18, GPIO_FN_A19,$/;"	e	enum:__anond45e39910103
GPIO_FN_A16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A16	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A16, GPIO_FN_KEYOUT3, GPIO_FN_MSIOF0_SS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A17	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A14,	GPIO_FN_A15,	GPIO_FN_A16,	GPIO_FN_A17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A16, GPIO_FN_A17, GPIO_FN_A18, GPIO_FN_A19,$/;"	e	enum:__anond45e39910103
GPIO_FN_A17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A17	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A17, GPIO_FN_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A18	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A18,	GPIO_FN_A19,	GPIO_FN_A20,	GPIO_FN_A21,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A16, GPIO_FN_A17, GPIO_FN_A18, GPIO_FN_A19,$/;"	e	enum:__anond45e39910103
GPIO_FN_A18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A18	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A18, GPIO_FN_KEYOUT1, GPIO_FN_MSIOF0_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A19	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A18,	GPIO_FN_A19,	GPIO_FN_A20,	GPIO_FN_A21,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A16, GPIO_FN_A17, GPIO_FN_A18, GPIO_FN_A19,$/;"	e	enum:__anond45e39910103
GPIO_FN_A19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A19	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A19, GPIO_FN_KEYOUT0, GPIO_FN_MSIOF0_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,$/;"	e	enum:__anond45e39910103
GPIO_FN_A2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_A2, GPIO_FN_WE0_N, GPIO_FN_WE1_N, GPIO_FN_DACK0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A18,	GPIO_FN_A19,	GPIO_FN_A20,	GPIO_FN_A21,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A20, GPIO_FN_SPCLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A20, GPIO_FN_SPCLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_A20,$/;"	e	enum:__anon9923b8340103
GPIO_FN_A20	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A20, GPIO_FN_KEYIN0, GPIO_FN_MSIOF0_RSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A18,	GPIO_FN_A19,	GPIO_FN_A20,	GPIO_FN_A21,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_A21,$/;"	e	enum:__anon9923b8340103
GPIO_FN_A21	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A21, GPIO_FN_KEYIN1, GPIO_FN_MSIOF0_RSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_A22,$/;"	e	enum:__anon9923b8340103
GPIO_FN_A22	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A22, GPIO_FN_KEYIN2, GPIO_FN_MSIOF0_MCK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,$/;"	e	enum:__anond45e39910103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_A23,$/;"	e	enum:__anon9923b8340103
GPIO_FN_A23	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A23, GPIO_FN_KEYIN3, GPIO_FN_MSIOF0_MCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,$/;"	e	enum:__anond45e39910103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_A24,$/;"	e	enum:__anon9923b8340103
GPIO_FN_A24	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A24, GPIO_FN_KEYIN4, GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,$/;"	e	enum:__anond45e39910103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_A25,$/;"	e	enum:__anon9923b8340103
GPIO_FN_A25	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A25, GPIO_FN_KEYIN5, GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A26	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A26,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A26	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A26, GPIO_FN_KEYIN6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A27	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A27, GPIO_FN_PORT149_RDWR, GPIO_FN_MFG0_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_A3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,$/;"	e	enum:__anond45e39910103
GPIO_FN_A3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,$/;"	e	enum:__anond45e39910103
GPIO_FN_A4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A4_FOE	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A4_FOE,		\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,$/;"	e	enum:__anond45e39910103
GPIO_FN_A5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A5_FCDE	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A5_FCDE,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A6,	GPIO_FN_A7,	GPIO_FN_A8,	GPIO_FN_A9,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,$/;"	e	enum:__anond45e39910103
GPIO_FN_A6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A6,	GPIO_FN_A7,	GPIO_FN_A8,	GPIO_FN_A9,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,$/;"	e	enum:__anond45e39910103
GPIO_FN_A7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A6,	GPIO_FN_A7,	GPIO_FN_A8,	GPIO_FN_A9,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,$/;"	e	enum:__anond45e39910103
GPIO_FN_A8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_A9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_A6,	GPIO_FN_A7,	GPIO_FN_A8,	GPIO_FN_A9,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_A9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_A9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_A9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,$/;"	e	enum:__anond45e39910103
GPIO_FN_A9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ADICHS0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICHS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_ADIDATA, GPIO_FN_ADICHS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_ADICHS0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_AVB_TXD2, GPIO_FN_ADICHS0, GPIO_FN_AD_NCS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICHS0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_ADICHS0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ADICHS0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICHS0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_AD_NCS_N_B, GPIO_FN_DREQ1_N_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICHS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ADICHS1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICHS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICHS1, GPIO_FN_ADICHS2, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_ADICHS1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD_D, GPIO_FN_AVB_TXD3, GPIO_FN_ADICHS1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICHS1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_ADICHS1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ADICHS1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICHS1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_CAN1_RX_C, GPIO_FN_DACK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICHS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ADICHS2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICHS2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICHS1, GPIO_FN_ADICHS2, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_ADICHS2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD_D, GPIO_FN_AVB_TXD4, GPIO_FN_ADICHS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICHS2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_ADICHS2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ADICHS2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICHS2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICHS2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_CAN1_TX_C, GPIO_FN_DREQ2_N, GPIO_FN_SSI_SCK4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ADICLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_SD0_WP, GPIO_FN_ADICLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_ADICLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_AVB_TXD1, GPIO_FN_ADICLK, GPIO_FN_AD_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_ADICLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ADICLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM0_B, GPIO_FN_ADICLK_B, GPIO_FN_AD_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICS_SAMP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ADICS_SAMP	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICS_SAMP	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_ADIDATA, GPIO_FN_ADICHS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_ADICS_SAMP	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICS_SAMP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_D, GPIO_FN_AVB_TXD0, GPIO_FN_ADICS_SAMP, GPIO_FN_AD_DO,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADICS_SAMP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ADICS_SAMP_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADICS_SAMP_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADICS_SAMP_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF1_TXD_B, GPIO_FN_SCIF5_TXD_D, GPIO_FN_ADICS_SAMP_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADIDATA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ADIDATA	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADIDATA	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_ADIDATA, GPIO_FN_ADICHS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_ADIDATA	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADIDATA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SCL_D, GPIO_FN_AVB_TX_CLK, GPIO_FN_ADIDATA, GPIO_FN_AD_DI,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ADIDATA	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_ADIDATA,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ADIDATA_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ADIDATA_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ADIDATA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_AD_DI_B, GPIO_FN_PCMWE_N, GPIO_FN_SSI_WS0129,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_AVB_TXD1, GPIO_FN_ADICLK, GPIO_FN_AD_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AD_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AD_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM0_B, GPIO_FN_ADICLK_B, GPIO_FN_AD_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_DI	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_DI	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SCL_D, GPIO_FN_AVB_TX_CLK, GPIO_FN_ADIDATA, GPIO_FN_AD_DI,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_DI	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AD_DI,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AD_DI_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_DI_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_AD_DI_B, GPIO_FN_PCMWE_N, GPIO_FN_SSI_WS0129,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_DO	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_DO	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_D, GPIO_FN_AVB_TXD0, GPIO_FN_ADICS_SAMP, GPIO_FN_AD_DO,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_DO	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AD_DO,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AD_DO_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_DO_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AD_DO_B, GPIO_FN_SSI_SDATA0, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_NCS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_NCS_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_AVB_TXD2, GPIO_FN_ADICHS0, GPIO_FN_AD_NCS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_NCS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AD_NCS_N_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_AD_NCS_N_B, GPIO_FN_DREQ1_N_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AD_NSCx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AD_NSCx,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ATACS00_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATACS00_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATACS00_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATACS00_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_SCKZ, GPIO_FN_ATACS00_N, GPIO_FN_ETH_LINK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ATACS01_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATACS01_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATACS01_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATACS10_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATACS10_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATACS10_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATACS10_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_STM_N, GPIO_FN_ATACS10_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ATACS11_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATACS11_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATACS11_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATADIR0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATADIR0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATADIR0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATADIR0_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C3_SDA_E, GPIO_FN_VI1_DATA7, GPIO_FN_ATADIR0_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ATADIR0_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATADIR0_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATADIR0_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATADIR0_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATADIR1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATADIR1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATADIR1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAG0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATAG0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAG0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAG0_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_SDATA, GPIO_FN_ATAG0_N, GPIO_FN_ETH_RXD0_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ATAG0_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAG0_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAG0_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAG0_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAG1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATAG1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAG1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATARD0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATARD0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATARD0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATARD0_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C3_SCL_E, GPIO_FN_VI1_DATA6, GPIO_FN_ATARD0_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ATARD0_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATARD0_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATARD1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATARD1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATARD1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAWR0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATAWR0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAWR0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAWR0_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MDATA, GPIO_FN_ATAWR0_N, GPIO_FN_ETH_RXD1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ATAWR0_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAWR0_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAWR0_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAWR0_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ATAWR1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ATAWR1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ATAWR1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AUDIO_CLKA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKA	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AUDIO_CLKA	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_AUDIO_CLKA, GPIO_FN_AUDIO_CLKB,$/;"	e	enum:__anond45e39910103
GPIO_FN_AUDIO_CLKA	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AUDIO_CLKA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MAGIC_B, GPIO_FN_AUDIO_CLKA, GPIO_FN_I2C0_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_B, GPIO_FN_AVB_MDIO, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKA_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKA_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_C, GPIO_FN_SSI_SCK4_B, GPIO_FN_CAN_DEBUGOUT6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKA_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKA_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKA_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_D, GPIO_FN_CAN_CLK_D, GPIO_FN_PCMOE_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKB	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKB	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AUDIO_CLKB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_AUDIO_CLKA, GPIO_FN_AUDIO_CLKB,$/;"	e	enum:__anond45e39910103
GPIO_FN_AUDIO_CLKB	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AUDIO_CLKB	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF0_SYNC_B, GPIO_FN_ETH_TXD0_B, GPIO_FN_AUDIO_CLKB,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKB_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKB_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKB_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AUDIO_CLKB_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AUDIO_CLKB_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKB_B, GPIO_FN_AVB_LINK, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKB_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_DU1_DB5, GPIO_FN_AUDIO_CLKB_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AUDIO_CLKC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AUDIO_CLKC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDC_B, GPIO_FN_AUDIO_CLKC, GPIO_FN_I2C4_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKC_B, GPIO_FN_I2C0_SCL, GPIO_FN_SCIF0_RXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKC_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKC_C, GPIO_FN_SSI_SDATA4_B, GPIO_FN_CAN_DEBUGOUT8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_AUDIO_CLKOUT,$/;"	e	enum:__anond45e39910103
GPIO_FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AUDIO_CLKOUT	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_I2C4_SDA_B, GPIO_FN_SCIFA5_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKOUT1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKOUT_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_C, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKOUT_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKOUT_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SCK5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AUDIO_CLKOUT_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AUDIO_CLKOUT_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AUDIO_CLKOUT_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AVB_AVTP_CAPTURE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_D, GPIO_FN_AVB_AVTP_CAPTURE, GPIO_FN_ETH_CRS_DV_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_AVTP_CAPTURE_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AVB_AVTP_CAPTURE_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AVB_AVTP_MATCH	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA0, GPIO_FN_CAN0_TX_D, GPIO_FN_AVB_AVTP_MATCH,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_AVTP_MATCH_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AVB_AVTP_MATCH_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AVB_AVTP_PPS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AVB_AVTP_PPS,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AVB_COL	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_COL	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_COL	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D6_C6, GPIO_FN_AVB_RX_ER, GPIO_FN_VI2_D7_C7, GPIO_FN_AVB_COL,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_COL	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_COL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_COL, GPIO_FN_VI0_VSYNC_N, GPIO_FN_SCIF0_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_CRS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_CRS	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_CRS	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D8_Y0, GPIO_FN_AVB_CRS, GPIO_FN_VI3_D9_Y1, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_CRS	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_CRS	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HSCK, GPIO_FN_SCIF_CLK_B, GPIO_FN_AVB_CRS,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D8_Y0, GPIO_FN_AVB_CRS, GPIO_FN_VI3_D9_Y1, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_GTXREFCLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM5, GPIO_FN_TCLK1_B, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_GTX_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_GTX_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_GTX_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D2_C2, GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI3_D3_C3, GPIO_FN_AVB_MDC,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_GTX_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_GTX_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL_E, GPIO_FN_AVB_GTX_CLK, GPIO_FN_SSI_WS6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D4_C4, GPIO_FN_AVB_MDIO, GPIO_FN_VI3_D5_C5, GPIO_FN_AVB_LINK,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKB_B, GPIO_FN_AVB_LINK, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D6_C6, GPIO_FN_AVB_MAGIC, GPIO_FN_VI3_D7_C7, GPIO_FN_AVB_PHY_INT,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SCL_E, GPIO_FN_AVB_MAGIC, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D2_C2, GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI3_D3_C3, GPIO_FN_AVB_MDC,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA_E, GPIO_FN_AVB_MDC, GPIO_FN_SSI_SDATA6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_MDIO	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_MDIO	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_MDIO	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D4_C4, GPIO_FN_AVB_MDIO, GPIO_FN_VI3_D5_C5, GPIO_FN_AVB_LINK,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_MDIO	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_MDIO	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_B, GPIO_FN_AVB_MDIO, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D6_C6, GPIO_FN_AVB_MAGIC, GPIO_FN_VI3_D7_C7, GPIO_FN_AVB_PHY_INT,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_E, GPIO_FN_AVB_PHY_INT, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_HSYNC, GPIO_FN_AVB_RXD0, GPIO_FN_VI2_VSYNC, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD0, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_HSYNC, GPIO_FN_AVB_RXD0, GPIO_FN_VI2_VSYNC, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD0, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D0_C0, GPIO_FN_AVB_RXD2, GPIO_FN_VI2_D1_C1, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_AVB_RXD2, GPIO_FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D0_C0, GPIO_FN_AVB_RXD2, GPIO_FN_VI2_D1_C1, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD3, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_AVB_RXD4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D2_C2, GPIO_FN_AVB_RXD4, GPIO_FN_VI2_D3_C3, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD3, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_AVB_RXD4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D2_C2, GPIO_FN_AVB_RXD4, GPIO_FN_VI2_D3_C3, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA7_VI0_B7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D4_C4, GPIO_FN_AVB_RXD6, GPIO_FN_VI2_D5_C5, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_CLKENB, GPIO_FN_I2C3_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RXD7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RXD7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RXD7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D4_C4, GPIO_FN_AVB_RXD6, GPIO_FN_VI2_D5_C5, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RXD7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RXD7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA5_RXD_C, GPIO_FN_IETX_C, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_AVB_RX_CLK, GPIO_FN_VI2_CLKENB, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE31, GPIO_FN_VI0_CLK, GPIO_FN_AVB_RX_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_AVB_RX_CLK, GPIO_FN_VI2_CLKENB, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_AVB_RX_DV, GPIO_FN_VI0_DATA1_VI0_B1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D6_C6, GPIO_FN_AVB_RX_ER, GPIO_FN_VI2_D7_C7, GPIO_FN_AVB_COL,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IECLK_C, GPIO_FN_AVB_RX_ER, GPIO_FN_VI0_HSYNC_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D10_Y2, GPIO_FN_AVB_TXD0, GPIO_FN_VI2_D11_Y3, GPIO_FN_AVB_TXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_D, GPIO_FN_AVB_TXD0, GPIO_FN_ADICS_SAMP, GPIO_FN_AD_DO,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D10_Y2, GPIO_FN_AVB_TXD0, GPIO_FN_VI2_D11_Y3, GPIO_FN_AVB_TXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_AVB_TXD1, GPIO_FN_ADICLK, GPIO_FN_AD_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_FIELD, GPIO_FN_AVB_TXD2,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_AVB_TXD2, GPIO_FN_ADICHS0, GPIO_FN_AD_NCS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D8_Y0, GPIO_FN_AVB_TXD3, GPIO_FN_VI2_D9_Y1, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD_D, GPIO_FN_AVB_TXD3, GPIO_FN_ADICHS1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_AVB_TX_CLK, GPIO_FN_VI3_CLKENB, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD_D, GPIO_FN_AVB_TXD4, GPIO_FN_ADICHS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_HSYNC, GPIO_FN_AVB_TXD5, GPIO_FN_VI3_VSYNC, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_TXD5, GPIO_FN_SSI_SCK5_B, GPIO_FN_ETH_TXD1, GPIO_FN_VI0_G7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_HSYNC, GPIO_FN_AVB_TXD5, GPIO_FN_VI3_VSYNC, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_RXD_C, GPIO_FN_IIC1_SCL_D, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TXD7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TXD7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TXD7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D0_C0, GPIO_FN_AVB_TXD7, GPIO_FN_VI3_D1_C1, GPIO_FN_AVB_TX_ER,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TXD7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TXD7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_TXD_C, GPIO_FN_IIC1_SDA_D, GPIO_FN_AVB_TXD7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_AVB_TX_CLK, GPIO_FN_VI3_CLKENB, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SCL_D, GPIO_FN_AVB_TX_CLK, GPIO_FN_ADIDATA, GPIO_FN_AD_DI,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D8_Y0, GPIO_FN_AVB_TXD3, GPIO_FN_VI2_D9_Y1, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_C, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVB_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVB_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_AVB_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D0_C0, GPIO_FN_AVB_TXD7, GPIO_FN_VI3_D1_C1, GPIO_FN_AVB_TX_ER,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVB_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_AVB_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF3_SCK_B, GPIO_FN_AVB_TX_ER, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_AVS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICHS1, GPIO_FN_ADICHS2, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVS1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AVS1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_AVS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_AVS2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_ADICHS1, GPIO_FN_ADICHS2, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_AVS2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_AVS2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_BBIF1_FLOW	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_FLOW,	GPIO_FN_BBIF1_RX_FLOW_N,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_FLOW	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_RSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_TSCK,	GPIO_FN_BBIF1_RSCK,	GPIO_FN_BBIF1_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_RSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, GPIO_FN_PORT115_I2C_SCL2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_RSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_TSCK,	GPIO_FN_BBIF1_RSCK,	GPIO_FN_BBIF1_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_RSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_PORT116_I2C_SDA2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_RXD,	GPIO_FN_BBIF1_TXD,	GPIO_FN_BBIF1_TSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_RX_FLOW_N	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_FLOW,	GPIO_FN_BBIF1_RX_FLOW_N,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF1_SS2, GPIO_FN_SCIFA3_RTS_, GPIO_FN_MFG3_OUT1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_TSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_TSCK,	GPIO_FN_BBIF1_RSCK,	GPIO_FN_BBIF1_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_TSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_TSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_RXD,	GPIO_FN_BBIF1_TXD,	GPIO_FN_BBIF1_TSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_TSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF1_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF1_RXD,	GPIO_FN_BBIF1_TXD,	GPIO_FN_BBIF1_TSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF1_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF2_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_RXD2_PORT60	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_RXD2_PORT60,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_RXD2_PORT90	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_RXD2_PORT90, \/* MSEL5CR_0_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF2_SCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_SYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF2_SYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TSCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD2, GPIO_FN_PORT194_SCIFA5_RTS_, GPIO_FN_BBIF2_TSCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TSCK2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TSCK2_PORT59	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_TSCK2_PORT59,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_TSCK2_PORT89	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_TSCK2_PORT89,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_TSYNC1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD1, GPIO_FN_PORT193_SCIFA5_CTS_, GPIO_FN_BBIF2_TSYNC1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TSYNC2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TSYNC2_PORT184	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_TSYNC2_PORT184,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_TSYNC2_PORT6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_TSYNC2_PORT6,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF2_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TXD1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD3, GPIO_FN_PORT195_SCIFA5_RXD, GPIO_FN_BBIF2_TXD1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TXD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOSLD, GPIO_FN_BBIF2_TXD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BBIF2_TXD2_PORT183	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_TXD2_PORT183,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BBIF2_TXD2_PORT5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_BBIF2_TXD2_PORT5, \/* MSEL5CR_0_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BPFCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BPFCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_BPFCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_BPFCLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_BPFCLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_BPFCLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BPFCLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_BPFCLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_BPFCLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_CLK, GPIO_FN_BPFCLK_B, GPIO_FN_MSIOF0_SS1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_BPFCLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_BPFCLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_BPFCLK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BPFCLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A15, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_BPFCLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A15, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_BPFCLK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SCK_D, GPIO_FN_BPFCLK_C, GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_BPFCLK_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BPFCLK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_BPFCLK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_BPFCLK_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE39, GPIO_FN_SCIF3_SCK, GPIO_FN_IRQ2, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_BPFCLK_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BPFCLK_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_BPFCLK_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_BPFCLK_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SCK_C, GPIO_FN_RIF0_CLK_B, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anonace1e3530103
GPIO_FN_BPFCLK_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BPFCLK_G	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CKO,	GPIO_FN_BS,	GPIO_FN_RDWR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_BS	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_EX_CS3, GPIO_FN_EX_CS4, GPIO_FN_EX_CS5, GPIO_FN_BS,$/;"	e	enum:__anond45e39910103
GPIO_FN_BS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A0, GPIO_FN_BS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_BS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_BS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_BS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_RX	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_RX	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_RX	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_TX, GPIO_FN_CAN0_RX,$/;"	e	enum:__anond45e39910103
GPIO_FN_CAN0_RX	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_RX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_CAN0_RX, GPIO_FN_SD1_WP, GPIO_FN_IRQ7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN0_RX_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN0_RX_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN0_RX_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_RX_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_RX_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_RX_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_AVB_TXD1, GPIO_FN_ADICLK, GPIO_FN_AD_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN0_RX_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN0_RX_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN0_RX_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_RX_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_RX_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_RX_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_RX_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_RX_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_RX_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_D, GPIO_FN_AVB_AVTP_CAPTURE, GPIO_FN_ETH_CRS_DV_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN0_RX_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_RX_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_RX_F	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_RX_F	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_TX	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_TX	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_TX	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_TX, GPIO_FN_CAN0_RX,$/;"	e	enum:__anond45e39910103
GPIO_FN_CAN0_TX	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_TX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CLK, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN0_TX_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN0_TX_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN0_TX_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_TX_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_TX_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_TX_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_AVB_TXD2, GPIO_FN_ADICHS0, GPIO_FN_AD_NCS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN0_TX_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN0_TX_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN0_TX_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_TX_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_TX_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_TX_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN0_TX_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_TX_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_TX_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA0, GPIO_FN_CAN0_TX_D, GPIO_FN_AVB_AVTP_MATCH,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN0_TX_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_TX_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN0_TX_F	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN0_TX_F	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_RX	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN1_RX	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_RX	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_CAN1_TX, GPIO_FN_CAN1_RX,$/;"	e	enum:__anond45e39910103
GPIO_FN_CAN1_RX	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_RX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD, GPIO_FN_I2C2_SCL_B, GPIO_FN_CAN1_RX, GPIO_FN_MMC_D7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN1_RX	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN1_RX,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN1_RX_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN1_RX_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_RX_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_RX_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_RX_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_RX_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_CAN1_RX_C, GPIO_FN_DACK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN1_RX_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_RX_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_RX_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM5, GPIO_FN_TCLK1_B, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN1_TX	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN1_TX	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_TX	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_CAN1_TX, GPIO_FN_CAN1_RX,$/;"	e	enum:__anond45e39910103
GPIO_FN_CAN1_TX	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_TX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_TXD, GPIO_FN_I2C2_SDA_B, GPIO_FN_CAN1_TX, GPIO_FN_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN1_TX	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN1_TX,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN1_TX_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN1_TX_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_TX_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_TX_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_TX_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_TX_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_CAN1_TX_C, GPIO_FN_DREQ2_N, GPIO_FN_SSI_SCK4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN1_TX_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN1_TX_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN1_TX_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_DVC_MUTE, GPIO_FN_CAN1_TX_D, GPIO_FN_I2C1_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CANFD0_RX_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CANFD0_RX_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CANFD0_RX_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CANFD0_RX_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CANFD0_TX_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CANFD0_TX_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CANFD0_TX_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CANFD0_TX_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CANFD1_RX	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CANFD1_RX,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CANFD1_TX	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CANFD1_TX,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_CAN1_TX, GPIO_FN_CAN1_RX,$/;"	e	enum:__anond45e39910103
GPIO_FN_CAN_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_DVC_MUTE, GPIO_FN_CAN1_TX_D, GPIO_FN_I2C1_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CAN_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CAN_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CAN_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CAN_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_D, GPIO_FN_CAN_CLK_D, GPIO_FN_PCMOE_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK2_B, GPIO_FN_CAN_DEBUGOUT0, GPIO_FN_CC50_STATE35,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT1, GPIO_FN_CC50_STATE36, GPIO_FN_SCIF2_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_SCK, GPIO_FN_CAN_DEBUGOUT10,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_SSI_SDATA5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SCK6, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_SSI_WS6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_RTS_N, GPIO_FN_CAN_DEBUGOUT14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_SSI_SDATA6, GPIO_FN_SCIFA1_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT15, GPIO_FN_SSI_SCK78, GPIO_FN_SCIFA2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB0_EXTLP, GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_CC50_STATE37,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK9_B, GPIO_FN_USB0_OVC1, GPIO_FN_CAN_DEBUGOUT3,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS9_B, GPIO_FN_USB0_IDIN, GPIO_FN_CAN_DEBUGOUT4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_CC50_OSCOUT, GPIO_FN_SCIF3_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_C, GPIO_FN_SSI_SCK4_B, GPIO_FN_CAN_DEBUGOUT6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS4_B, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_RDS_DATA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKC_C, GPIO_FN_SSI_SDATA4_B, GPIO_FN_CAN_DEBUGOUT8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUGOUT9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUGOUT9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SCK5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_DEBUG_HW_TRIGGER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_DEBUG_HW_TRIGGER	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_CC50_STATE32,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_STEP0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_STEP0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_SSI_WS1_B, GPIO_FN_CAN_STEP0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CAN_TXCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CAN_TXCLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_SSI_SDATA1_B, GPIO_FN_CAN_TXCLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_OSCOUT	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_CC50_OSCOUT, GPIO_FN_SCIF3_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE28	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE, GPIO_FN_CC50_STATE28,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE29	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE29, GPIO_FN_DU0_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE30	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE30, GPIO_FN_DU0_CDE, GPIO_FN_QPOLB,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE31	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE31, GPIO_FN_VI0_CLK, GPIO_FN_AVB_RX_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE32	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_CC50_STATE32,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE33	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE33, GPIO_FN_SCIF1_SCK, GPIO_FN_PWM3, GPIO_FN_TCLK2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE34	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE34,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE35	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK2_B, GPIO_FN_CAN_DEBUGOUT0, GPIO_FN_CC50_STATE35,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE36	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT1, GPIO_FN_CC50_STATE36, GPIO_FN_SCIF2_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE37	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB0_EXTLP, GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_CC50_STATE37,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE38	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE38, GPIO_FN_SCIF2_SCK, GPIO_FN_IRQ1, GPIO_FN_DU1_DB2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC50_STATE39	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE39, GPIO_FN_SCIF3_SCK, GPIO_FN_IRQ2, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_CC5_OSCOUT	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CC5_OSCOUT,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CKO	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CKO,	GPIO_FN_BS,	GPIO_FN_RDWR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CKO	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CKO,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_CS0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS0,	GPIO_FN_CS2,	GPIO_FN_CS4,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_CS0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CS0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CS0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CS1_A26	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CS1_A26, GPIO_FN_EX_CS0, GPIO_FN_EX_CS1, GPIO_FN_EX_CS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_CS1_N_A26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CS1_N_A26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_CS1_N_A26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_CS2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS0,	GPIO_FN_CS2,	GPIO_FN_CS4,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS0,	GPIO_FN_CS2,	GPIO_FN_CS4,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS4_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS4_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_CS5A_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS5A_, GPIO_FN_PORT91_RDWR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_CS5A_PORT105	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS5A_PORT105, \/* CS5A PORT 19\/105 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS5A_PORT19	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS5A_PORT19,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS5B	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS5B,	GPIO_FN_CS6A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS5B_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS5B_, GPIO_FN_FCE1_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_CS6A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CS5B,	GPIO_FN_CS6A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_CS6A_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FCE0_, GPIO_FN_CS6A_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_CS6B_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS6B_, GPIO_FN_DACK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_CTS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_CTS0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CTS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_CTS1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_CTS3x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CTS3x,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CTS4x_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CTS4x_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CTS4x_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CTS4x_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_CTS4x_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_CTS4x_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_D0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anond45e39910103
GPIO_FN_D0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_TXD, GPIO_FN_I2C2_SDA_B, GPIO_FN_CAN1_TX, GPIO_FN_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_D0_NAF0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D0_NAF0,	GPIO_FN_D1_NAF1,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D0_NAF0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D0_NAF0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anond45e39910103
GPIO_FN_D1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_SCK_B, GPIO_FN_IRQ4, GPIO_FN_D1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_D10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,$/;"	e	enum:__anond45e39910103
GPIO_FN_D10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D10_NAF10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D10_NAF10,	GPIO_FN_D11_NAF11,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D10_NAF10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D10_NAF10,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,$/;"	e	enum:__anond45e39910103
GPIO_FN_D11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D11_NAF11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D10_NAF10,	GPIO_FN_D11_NAF11,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D11_NAF11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D11_NAF11,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,$/;"	e	enum:__anond45e39910103
GPIO_FN_D12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D12_NAF12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D12_NAF12,	GPIO_FN_D13_NAF13,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D12_NAF12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D12_NAF12,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,$/;"	e	enum:__anond45e39910103
GPIO_FN_D13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D13_NAF13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D12_NAF12,	GPIO_FN_D13_NAF13,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D13_NAF13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D13_NAF13,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,$/;"	e	enum:__anond45e39910103
GPIO_FN_D14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D14_NAF14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D14_NAF14,	GPIO_FN_D15_NAF15,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D14_NAF14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D14_NAF14,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,$/;"	e	enum:__anond45e39910103
GPIO_FN_D15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D15_NAF15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D14_NAF14,	GPIO_FN_D15_NAF15,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D15_NAF15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D15_NAF15,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D16	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D16,	GPIO_FN_D17,	GPIO_FN_D18,	GPIO_FN_D19,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D16	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD8, GPIO_FN_D16,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D17	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D16,	GPIO_FN_D17,	GPIO_FN_D18,	GPIO_FN_D19,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D17	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD9, GPIO_FN_D17,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D18	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D16,	GPIO_FN_D17,	GPIO_FN_D18,	GPIO_FN_D19,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D18	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD10, GPIO_FN_D18,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D19	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D16,	GPIO_FN_D17,	GPIO_FN_D18,	GPIO_FN_D19,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D19	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD11, GPIO_FN_D19,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D1_NAF1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D0_NAF0,	GPIO_FN_D1_NAF1,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D1_NAF1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D1_NAF1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anond45e39910103
GPIO_FN_D2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_D2, GPIO_FN_SCIFA3_TXD_B, GPIO_FN_D3, GPIO_FN_I2C3_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_D20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D20,	GPIO_FN_D21,	GPIO_FN_D22,	GPIO_FN_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D20	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD12, GPIO_FN_D20,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D20,	GPIO_FN_D21,	GPIO_FN_D22,	GPIO_FN_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D21	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD13, GPIO_FN_D21,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D20,	GPIO_FN_D21,	GPIO_FN_D22,	GPIO_FN_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D22	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD14, GPIO_FN_D22,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D23	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D20,	GPIO_FN_D21,	GPIO_FN_D22,	GPIO_FN_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D23	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D24	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D24,	GPIO_FN_D25,	GPIO_FN_D26,	GPIO_FN_D27,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D24	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D25	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D24,	GPIO_FN_D25,	GPIO_FN_D26,	GPIO_FN_D27,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D25	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD17, GPIO_FN_D25,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D26	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D24,	GPIO_FN_D25,	GPIO_FN_D26,	GPIO_FN_D27,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D26	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D27	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D24,	GPIO_FN_D25,	GPIO_FN_D26,	GPIO_FN_D27,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D27	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D28	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D28,	GPIO_FN_D29,	GPIO_FN_D30,	GPIO_FN_D31,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D28	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D29	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D28,	GPIO_FN_D29,	GPIO_FN_D30,	GPIO_FN_D31,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D29	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D2_NAF2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D2_NAF2,	GPIO_FN_D3_NAF3,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D2_NAF2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D2_NAF2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anond45e39910103
GPIO_FN_D3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_D2, GPIO_FN_SCIFA3_TXD_B, GPIO_FN_D3, GPIO_FN_I2C3_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_D30	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D28,	GPIO_FN_D29,	GPIO_FN_D30,	GPIO_FN_D31,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D30	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D31	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D28,	GPIO_FN_D29,	GPIO_FN_D30,	GPIO_FN_D31,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D31	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D3_NAF3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D2_NAF2,	GPIO_FN_D3_NAF3,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D3_NAF3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D3_NAF3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anond45e39910103
GPIO_FN_D4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_RXD_B, GPIO_FN_D4, GPIO_FN_I2C3_SDA_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_D4_NAF4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D4_NAF4,	GPIO_FN_D5_NAF5,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D4_NAF4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D4_NAF4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anond45e39910103
GPIO_FN_D5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_TXD_B, GPIO_FN_D5, GPIO_FN_SCIF4_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_D5_NAF5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D4_NAF4,	GPIO_FN_D5_NAF5,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D5_NAF5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D5_NAF5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,$/;"	e	enum:__anond45e39910103
GPIO_FN_D6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D6_NAF6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D6_NAF6,	GPIO_FN_D7_NAF7,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D6_NAF6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D6_NAF6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,$/;"	e	enum:__anond45e39910103
GPIO_FN_D7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D7_NAF7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D6_NAF6,	GPIO_FN_D7_NAF7,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D7_NAF7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D7_NAF7,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,$/;"	e	enum:__anond45e39910103
GPIO_FN_D8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D8_NAF8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D8_NAF8,	GPIO_FN_D9_NAF9,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D8_NAF8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D8_NAF8,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_D9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_D9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anone81c64b00103
GPIO_FN_D9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,$/;"	e	enum:__anond45e39910103
GPIO_FN_D9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_D9_NAF9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_D8_NAF8,	GPIO_FN_D9_NAF9,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_D9_NAF9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_D9_NAF9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DREQ0,		GPIO_FN_DACK0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DRACK0, GPIO_FN_SCK2, GPIO_FN_DACK0, GPIO_FN_TX2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_A2, GPIO_FN_WE0_N, GPIO_FN_WE1_N, GPIO_FN_DACK0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DACK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS6B_, GPIO_FN_DACK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DACK1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DREQ1,		GPIO_FN_DACK1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DACK1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DACK1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DACK1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_RX2, GPIO_FN_DACK1, GPIO_FN_SCK3,$/;"	e	enum:__anond45e39910103
GPIO_FN_DACK1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DACK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DACK1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_CAN1_RX_C, GPIO_FN_DACK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DACK2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DACK2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DACK2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DACK2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DACK2, GPIO_FN_ETH_MDIO_B, GPIO_FN_SSI_SCK1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DACK2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDRD_, GPIO_FN_DACK2, GPIO_FN_PORT217_LCD2RS, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DACK2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DACK2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DACK3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DBGMD10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMD10,	GPIO_FN_DBGMD11,	GPIO_FN_DBGMD20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DBGMD11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMD10,	GPIO_FN_DBGMD11,	GPIO_FN_DBGMD20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DBGMD20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMD10,	GPIO_FN_DBGMD11,	GPIO_FN_DBGMD20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DBGMD21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMD21,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DBGMDT0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMDT2,	GPIO_FN_DBGMDT1,	GPIO_FN_DBGMDT0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DBGMDT1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMDT2,	GPIO_FN_DBGMDT1,	GPIO_FN_DBGMDT0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DBGMDT2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DBGMDT2,	GPIO_FN_DBGMDT1,	GPIO_FN_DBGMDT0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DEBUG_MON_LCDD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DEBUG_MON_LCDD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DEBUG_MON_VIO	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DEBUG_MON_VIO,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DINT_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DINT_, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DRACK0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DRACK0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DRACK0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DRACK0, GPIO_FN_SCK2, GPIO_FN_DACK0, GPIO_FN_TX2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DRACK0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DREQ0,		GPIO_FN_DACK0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DREQ0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_RX2, GPIO_FN_DACK1, GPIO_FN_SCK3,$/;"	e	enum:__anond45e39910103
GPIO_FN_DREQ0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_WAIT_, GPIO_FN_DREQ0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DREQ0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DREQ0_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DREQ0_N, GPIO_FN_SCIFB1_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DREQ1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DREQ1,		GPIO_FN_DACK1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DREQ1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_TX3, GPIO_FN_DREQ1, GPIO_FN_RX3,$/;"	e	enum:__anond45e39910103
GPIO_FN_DREQ1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PORT221_LCD2CS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DREQ1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DREQ1_N_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_AD_NCS_N_B, GPIO_FN_DREQ1_N_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DREQ2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DREQ2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DREQ2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DREQ2_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DREQ2_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_CAN1_TX_C, GPIO_FN_DREQ2_N, GPIO_FN_SSI_SCK4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DREQ3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_DU0_CDE	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_DU0_DISP, GPIO_FN_DU0_CDE,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_CDE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE30, GPIO_FN_DU0_CDE, GPIO_FN_QPOLB,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU0_DB0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG7_Y3_DATA15, GPIO_FN_DU0_DB0, GPIO_FN_DU0_DB1,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG7_Y3_DATA15, GPIO_FN_DU0_DB0, GPIO_FN_DU0_DB1,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB2_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DB2_C0, GPIO_FN_DU0_DB3_C1, GPIO_FN_DU0_DB4_C2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB3_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DB2_C0, GPIO_FN_DU0_DB3_C1, GPIO_FN_DU0_DB4_C2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB4_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DB2_C0, GPIO_FN_DU0_DB3_C1, GPIO_FN_DU0_DB4_C2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB5_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DB5_C3, GPIO_FN_DU0_DB6_C4, GPIO_FN_DU0_DB7_C5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB6_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DB5_C3, GPIO_FN_DU0_DB6_C4, GPIO_FN_DU0_DB7_C5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DB7_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DB5_C3, GPIO_FN_DU0_DB6_C4, GPIO_FN_DU0_DB7_C5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG0_DATA8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR6_Y8_DATA6, GPIO_FN_DU0_DR7_Y9_DATA7, GPIO_FN_DU0_DG0_DATA8,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG1_DATA9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG1_DATA9, GPIO_FN_DU0_DG2_C6_DATA10, GPIO_FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG2_C6_DATA10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG1_DATA9, GPIO_FN_DU0_DG2_C6_DATA10, GPIO_FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG3_C7_DATA11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG1_DATA9, GPIO_FN_DU0_DG2_C6_DATA10, GPIO_FN_DU0_DG3_C7_DATA11,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG4_Y0_DATA12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG4_Y0_DATA12, GPIO_FN_DU0_DG5_Y1_DATA13, GPIO_FN_DU0_DG6_Y2_DATA14,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG5_Y1_DATA13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG4_Y0_DATA12, GPIO_FN_DU0_DG5_Y1_DATA13, GPIO_FN_DU0_DG6_Y2_DATA14,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG6_Y2_DATA14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG4_Y0_DATA12, GPIO_FN_DU0_DG5_Y1_DATA13, GPIO_FN_DU0_DG6_Y2_DATA14,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DG7_Y3_DATA15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DG7_Y3_DATA15, GPIO_FN_DU0_DB0, GPIO_FN_DU0_DB1,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DISP	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_DU0_DISP, GPIO_FN_DU0_CDE,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DISP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE29, GPIO_FN_DU0_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU0_DOTCLKOUT	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU0_DR0_DATA0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR0_DATA0, GPIO_FN_DU0_DR1_DATA1, GPIO_FN_DU0_DR2_Y4_DATA2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR0_DATA0, GPIO_FN_DU0_DR1_DATA1, GPIO_FN_DU0_DR2_Y4_DATA2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR2_Y4_DATA2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR0_DATA0, GPIO_FN_DU0_DR1_DATA1, GPIO_FN_DU0_DR2_Y4_DATA2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR3_Y5_DATA3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR3_Y5_DATA3, GPIO_FN_DU0_DR4_Y6_DATA4, GPIO_FN_DU0_DR5_Y7_DATA5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR4_Y6_DATA4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR3_Y5_DATA3, GPIO_FN_DU0_DR4_Y6_DATA4, GPIO_FN_DU0_DR5_Y7_DATA5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR5_Y7_DATA5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR3_Y5_DATA3, GPIO_FN_DU0_DR4_Y6_DATA4, GPIO_FN_DU0_DR5_Y7_DATA5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR6_Y8_DATA6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR6_Y8_DATA6, GPIO_FN_DU0_DR7_Y9_DATA7, GPIO_FN_DU0_DG0_DATA8,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_DR7_Y9_DATA7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_DR6_Y8_DATA6, GPIO_FN_DU0_DR7_Y9_DATA7, GPIO_FN_DU0_DG0_DATA8,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_EXHSYNC_DU0_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_DU0_EXVSYNC_DU0_VSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_DU0_DISP, GPIO_FN_DU0_CDE,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU0_EXVSYNC_DU0_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_DU0_EXVSYNC_DU0_VSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU0_EXVSYNC_DU0_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE, GPIO_FN_CC50_STATE28,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_CDE	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_CDE	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_DU1_DISP, GPIO_FN_DU1_CDE,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_CDE	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_CDE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_IIC0_SCL_C, GPIO_FN_DU1_CDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC1_SCL, GPIO_FN_DU1_DB0, GPIO_FN_SSI_SDATA2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_TXD, GPIO_FN_IIC1_SDA, GPIO_FN_DU1_DB1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE38, GPIO_FN_SCIF2_SCK, GPIO_FN_IRQ1, GPIO_FN_DU1_DB2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB2_C0_DATA12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB2_C0_DATA12, GPIO_FN_DU1_DB3_C1_DATA13,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DB3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_SSI_SDATA9_B, GPIO_FN_TANS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB3_C1_DATA13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB2_C0_DATA12, GPIO_FN_DU1_DB3_C1_DATA13,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DB4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C1_SCL_E, GPIO_FN_FMCLK_D, GPIO_FN_DU1_DB4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB4_C2_DATA14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB4_C2_DATA14, GPIO_FN_DU1_DB5_C3_DATA15,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DB5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_DU1_DB5, GPIO_FN_AUDIO_CLKB_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB5_C3_DATA15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB4_C2_DATA14, GPIO_FN_DU1_DB5_C3_DATA15,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DB6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C2_SCL, GPIO_FN_SCIFA5_RXD, GPIO_FN_DU1_DB6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB6_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB6_C4, GPIO_FN_DU1_DB7_C5, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DB7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DB7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DB7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C2_SDA, GPIO_FN_SCIFA5_TXD, GPIO_FN_DU1_DB7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DB7_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB6_C4, GPIO_FN_DU1_DB7_C5, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DG0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL, GPIO_FN_PWM6, GPIO_FN_DU1_DG0, GPIO_FN_HSCIF1_HTX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA, GPIO_FN_TPUTO1, GPIO_FN_DU1_DG1, GPIO_FN_HSCIF1_HSCK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_IETX, GPIO_FN_DU1_DG2, GPIO_FN_REMOCON_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG2_C6_DATA6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DG2_C6_DATA6, GPIO_FN_DU1_DG3_C7_DATA7, GPIO_FN_DU1_DG4_Y0_DATA8,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DG3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD, GPIO_FN_IECLK, GPIO_FN_DU1_DG3, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG3_C7_DATA7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DG2_C6_DATA6, GPIO_FN_DU1_DG3_C7_DATA7, GPIO_FN_DU1_DG4_Y0_DATA8,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DG4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_SSI_WS1_B, GPIO_FN_CAN_STEP0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG4_Y0_DATA8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DG2_C6_DATA6, GPIO_FN_DU1_DG3_C7_DATA7, GPIO_FN_DU1_DG4_Y0_DATA8,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DG5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_SSI_SDATA1_B, GPIO_FN_CAN_TXCLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG5_Y1_DATA9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DG5_Y1_DATA9, GPIO_FN_DU1_DG6_Y2_DATA10, GPIO_FN_DU1_DG7_Y3_DATA11,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DG6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_RXD, GPIO_FN_IIC0_SCL, GPIO_FN_DU1_DG6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG6_Y2_DATA10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DG5_Y1_DATA9, GPIO_FN_DU1_DG6_Y2_DATA10, GPIO_FN_DU1_DG7_Y3_DATA11,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DG7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DG7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DG7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_TXD, GPIO_FN_IIC0_SDA, GPIO_FN_DU1_DG7, GPIO_FN_SSI_WS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DG7_Y3_DATA11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DG5_Y1_DATA9, GPIO_FN_DU1_DG6_Y2_DATA10, GPIO_FN_DU1_DG7_Y3_DATA11,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DISP	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DISP	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_DU1_DISP, GPIO_FN_DU1_CDE,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DISP	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DISP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_C, GPIO_FN_DU1_DISP, GPIO_FN_SSI_WS78,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DOTCLKIN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU1_DOTCLKIN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DOTCLKIN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DOTCLKIN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DOTCLKIN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DOTCLKIN_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DOTCLKIN_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DOTCLKIN_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DOTCLKIN_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DOTCLKOUT	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU1_DOTCLKOUT0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DOTCLKOUT0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DOTCLKOUT0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_SSI_SDATA5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DOTCLKOUT1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DOTCLKOUT1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DOTCLKOUT1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_I2C3_SDA_C, GPIO_FN_DU1_DOTCLKOUT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD, GPIO_FN_PWM5_B, GPIO_FN_DU1_DR0, GPIO_FN_RIF1_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD, GPIO_FN_IRQ5, GPIO_FN_DU1_DR1, GPIO_FN_RIF1_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_RXD, GPIO_FN_I2C2_SCL_C, GPIO_FN_DU1_DR2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR2_Y4_DATA0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DR2_Y4_DATA0, GPIO_FN_DU1_DR3_Y5_DATA1, GPIO_FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DR3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_RIF1_D1_B, GPIO_FN_TS_SPSYNC_D, GPIO_FN_FMIN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR3_Y5_DATA1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DR2_Y4_DATA0, GPIO_FN_DU1_DR3_Y5_DATA1, GPIO_FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DR4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_RIF1_SYNC, GPIO_FN_TPUTO1_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR4_Y6_DATA2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DR2_Y4_DATA0, GPIO_FN_DU1_DR3_Y5_DATA1, GPIO_FN_DU1_DR4_Y6_DATA2,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DR5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_PWM1, GPIO_FN_TS_SCK, GPIO_FN_DU1_DR5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR5_Y7_DATA3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DR5_Y7_DATA3, GPIO_FN_DU1_DR6_DATA4, GPIO_FN_DU1_DR7_DATA5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DR6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_RXD, GPIO_FN_TS_SDEN, GPIO_FN_DU1_DR6, GPIO_FN_RIF1_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR6_DATA4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DR5_Y7_DATA3, GPIO_FN_DU1_DR6_DATA4, GPIO_FN_DU1_DR7_DATA5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_DR7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_DR7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_DR7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_TXD, GPIO_FN_TS_SPSYNC, GPIO_FN_DU1_DR7, GPIO_FN_RIF1_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_DR7_DATA5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DR5_Y7_DATA3, GPIO_FN_DU1_DR6_DATA4, GPIO_FN_DU1_DR7_DATA5,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_EXHSYNC_DU1_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_EXHSYNC_DU1_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB6_C4, GPIO_FN_DU1_DB7_C5, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_EXHSYNC_DU1_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_EXHSYNC_DU1_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_SSI_WS6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_DU1_DISP, GPIO_FN_DU1_CDE,$/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA_C, GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU1_EXVSYNC_DU1_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anone81c64b00103
GPIO_FN_DU1_EXVSYNC_DU1_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DU1_DB6_C4, GPIO_FN_DU1_DB7_C5, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_/;"	e	enum:__anond45e39910103
GPIO_FN_DU1_EXVSYNC_DU1_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_DU1_EXVSYNC_DU1_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_I2C4_SCL_C, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DU2_CDE	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DB7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG6, GPIO_FN_LCDOUT14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DG7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DISP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_DR7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_EXHSYNC_DU2_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU2_EXVSYNC_DU2_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU_CDE	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_CDE,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DB7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DB7,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DG7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DG7,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DISP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DISP,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DOTCLKIN0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU_DOTCLKIN0, GPIO_FN_DU_DOTCLKIN2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU_DOTCLKIN2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU_DOTCLKIN0, GPIO_FN_DU_DOTCLKIN2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DU_DOTCLKOUT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DOTCLKOUT0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DOTCLKOUT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DOTCLKOUT1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_DR7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_DR7,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_EXHSYNC_DU_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_EXHSYNC_DU_HSYNC,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_EXODDF_DU_ODDF_DISP_CDE	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_EXODDF_DU_ODDF_DISP_CDE,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DU_EXVSYNC_DU_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DU_EXVSYNC_DU_VSYNC,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DVC_MUTE	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_DVC_MUTE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_DVC_MUTE, GPIO_FN_CAN1_TX_D, GPIO_FN_I2C1_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_DVC_MUTE	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_DVC_MUTE,$/;"	e	enum:__anon9923b8340103
GPIO_FN_DV_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D0,	GPIO_FN_DV_D1,	GPIO_FN_DV_D2,	GPIO_FN_DV_D3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D0,	GPIO_FN_DV_D1,	GPIO_FN_DV_D2,	GPIO_FN_DV_D3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D8,	GPIO_FN_DV_D9,	GPIO_FN_DV_D10,	GPIO_FN_DV_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D8,	GPIO_FN_DV_D9,	GPIO_FN_DV_D10,	GPIO_FN_DV_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D12,	GPIO_FN_DV_D13,	GPIO_FN_DV_D14,	GPIO_FN_DV_D15,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D12,	GPIO_FN_DV_D13,	GPIO_FN_DV_D14,	GPIO_FN_DV_D15,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D12,	GPIO_FN_DV_D13,	GPIO_FN_DV_D14,	GPIO_FN_DV_D15,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D12,	GPIO_FN_DV_D13,	GPIO_FN_DV_D14,	GPIO_FN_DV_D15,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D0,	GPIO_FN_DV_D1,	GPIO_FN_DV_D2,	GPIO_FN_DV_D3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D0,	GPIO_FN_DV_D1,	GPIO_FN_DV_D2,	GPIO_FN_DV_D3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D4,	GPIO_FN_DV_D5,	GPIO_FN_DV_D6,	GPIO_FN_DV_D7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D4,	GPIO_FN_DV_D5,	GPIO_FN_DV_D6,	GPIO_FN_DV_D7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D4,	GPIO_FN_DV_D5,	GPIO_FN_DV_D6,	GPIO_FN_DV_D7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D4,	GPIO_FN_DV_D5,	GPIO_FN_DV_D6,	GPIO_FN_DV_D7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D8,	GPIO_FN_DV_D9,	GPIO_FN_DV_D10,	GPIO_FN_DV_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_D9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_D8,	GPIO_FN_DV_D9,	GPIO_FN_DV_D10,	GPIO_FN_DV_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_HSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_DV_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_DV_VSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_EDBGREQ_PD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_EDBGREQ_PD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_EDBGREQ_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_EDBGREQ_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_EDEBGREQ_PULLDOWN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_EDEBGREQ_PULLDOWN,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_EDEBGREQ_PULLUP	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_EDEBGREQ_PULLUP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_EIF3_D1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_EIF3_D1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_ETH_CRS_DV	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_CRS_DV	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_CRS_DV	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_CRS_DV	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_VI0_G1, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_CRS_DV_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_RX_D, GPIO_FN_AVB_AVTP_CAPTURE, GPIO_FN_ETH_CRS_DV_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_LINK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_LINK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_LINK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_LINK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_VI0_G5, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_LINK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_SCKZ, GPIO_FN_ATACS00_N, GPIO_FN_ETH_LINK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA5_B, GPIO_FN_ETH_MAGIC, GPIO_FN_VI0_R1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_MAGIC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MAGIC_B, GPIO_FN_AUDIO_CLKA, GPIO_FN_I2C0_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_MDC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_MDC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_MDC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_MDC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_VI0_R3, GPIO_FN_SCIF3_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_MDC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDC_B, GPIO_FN_AUDIO_CLKC, GPIO_FN_I2C4_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_MDIO	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_MDIO	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_MDIO	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_MDIO	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_VI0_G0, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_MDIO_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DACK2, GPIO_FN_ETH_MDIO_B, GPIO_FN_SSI_SCK1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_REFCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_REFCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_REFCLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_VI0_G6, GPIO_FN_SCIF2_SCK_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_REFCLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_REFCLK_B, GPIO_FN_SSI_SCK9, GPIO_FN_SCIF2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_REF_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_RXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_RXD0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_RXD0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_RXD0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_VI0_G3, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_RXD0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_SDATA, GPIO_FN_ATAG0_N, GPIO_FN_ETH_RXD0_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_RXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_RXD1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_RXD1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_RXD1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_VI0_G4, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_RXD1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MDATA, GPIO_FN_ATAWR0_N, GPIO_FN_ETH_RXD1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_VI0_G2, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_RX_ER_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RX_ER_B, GPIO_FN_SSI_SDATA1, GPIO_FN_HSCIF1_HRX_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_TXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_TXD0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_TXD0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_TXD0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_VI0_R2, GPIO_FN_SCIF3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_TXD0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF0_SYNC_B, GPIO_FN_ETH_TXD0_B, GPIO_FN_AUDIO_CLKB,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_TXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_TXD1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_TXD1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_TXD1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_TXD5, GPIO_FN_SSI_SCK5_B, GPIO_FN_ETH_TXD1, GPIO_FN_VI0_G7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_TXD1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TXD1_B, GPIO_FN_SSI_WS9, GPIO_FN_SCIF2_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_ETH_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_ETH_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_ETH_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS5_B, GPIO_FN_ETH_TX_EN, GPIO_FN_VI0_R0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ETH_TX_EN_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TX_EN_B, GPIO_FN_SSI_SDATA9, GPIO_FN_SCIF2_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_ET_COL	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_COL,		GPIO_FN_ET_TX_ER,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_CRS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_RX_ER,	GPIO_FN_ET_CRS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD0,	GPIO_FN_ET_ERXD1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD0,	GPIO_FN_ET_ERXD1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD2,	GPIO_FN_ET_ERXD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD2,	GPIO_FN_ET_ERXD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD4,	GPIO_FN_ET_ERXD5, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD4,	GPIO_FN_ET_ERXD5, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD6,	GPIO_FN_ET_ERXD7, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ERXD7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ERXD6,	GPIO_FN_ET_ERXD7, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_TX_CLK,	GPIO_FN_ET_TX_EN,	GPIO_FN_ET_ETXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD1,	GPIO_FN_ET_ETXD2,	GPIO_FN_ET_ETXD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD1,	GPIO_FN_ET_ETXD2,	GPIO_FN_ET_ETXD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD1,	GPIO_FN_ET_ETXD2,	GPIO_FN_ET_ETXD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD4,	GPIO_FN_ET_ETXD5, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD4,	GPIO_FN_ET_ETXD5, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD6,	GPIO_FN_ET_ETXD7, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_ETXD7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_ETXD6,	GPIO_FN_ET_ETXD7, \/* for GEther *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_GTX_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_WOL,		GPIO_FN_ET_GTX_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_LINK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_LINK,	GPIO_FN_ET_PHY_INT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_MDC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_MDC,		GPIO_FN_ET_MDIO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_MDIO	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_MDC,		GPIO_FN_ET_MDIO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_LINK,	GPIO_FN_ET_PHY_INT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_RX_CLK,	GPIO_FN_ET_RX_DV,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_RX_CLK,	GPIO_FN_ET_RX_DV,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_RX_ER,	GPIO_FN_ET_CRS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_TX_CLK,	GPIO_FN_ET_TX_EN,	GPIO_FN_ET_ETXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_TX_CLK,	GPIO_FN_ET_TX_EN,	GPIO_FN_ET_ETXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_COL,		GPIO_FN_ET_TX_ER,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_ET_WOL	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_ET_WOL,		GPIO_FN_ET_GTX_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_EXTAL2OUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_EXTLP	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_PORT226_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_EX_CS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CS1_A26, GPIO_FN_EX_CS0, GPIO_FN_EX_CS1, GPIO_FN_EX_CS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_CS0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_CS0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_CS0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_CS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CS1_A26, GPIO_FN_EX_CS0, GPIO_FN_EX_CS1, GPIO_FN_EX_CS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_CS1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_CS1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_CS1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_CS2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_CS1_A26, GPIO_FN_EX_CS0, GPIO_FN_EX_CS1, GPIO_FN_EX_CS2,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_CS2_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_CS2_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_CS2_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_CS3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_EX_CS3, GPIO_FN_EX_CS4, GPIO_FN_EX_CS5, GPIO_FN_BS,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_CS3_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_CS3_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_CS3_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_CS4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_EX_CS3, GPIO_FN_EX_CS4, GPIO_FN_EX_CS5, GPIO_FN_BS,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_CS4_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_CS4_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_CS4_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_CS5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_EX_CS3, GPIO_FN_EX_CS4, GPIO_FN_EX_CS5, GPIO_FN_BS,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_CS5_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_CS5_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_CS5_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_WAIT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_WAIT0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_WAIT0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_EX_WAIT0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_WAIT0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_WAIT0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_EX_WAIT0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_EX_WAIT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_WAIT1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_WAIT1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_EX_WAIT1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2_B, GPIO_FN_VI1_DATA5, GPIO_FN_MTS_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_EX_WAIT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_EX_WAIT2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_EX_WAIT2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FCE0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FCE0,	GPIO_FN_FCE1,	GPIO_FN_FRB, \/* FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FCE0_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FCE0_, GPIO_FN_CS6A_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FCE1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FCE0,	GPIO_FN_FCE1,	GPIO_FN_FRB, \/* FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FCE1_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS5B_, GPIO_FN_FCE1_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FMCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMCLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_FMCLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_FMCLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMCLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMCLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMCLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMCLK_B, GPIO_FN_RDS_CLK_B, GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMCLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_FMCLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_FMCLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMCLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMCLK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_D0_B, GPIO_FN_TS_SDEN_D, GPIO_FN_FMCLK_C, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMCLK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMCLK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMCLK_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C1_SCL_E, GPIO_FN_FMCLK_D, GPIO_FN_DU1_DB4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMCLK_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF0_D0_B, GPIO_FN_FMCLK_E, GPIO_FN_RDS_CLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMIN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMIN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMIN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMIN_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMIN_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMIN_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMIN_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA_B, GPIO_FN_HSCIF1_HRX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMIN_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_FMIN_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_FMIN_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMIN_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMIN_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMIN_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_RIF1_D1_B, GPIO_FN_TS_SPSYNC_D, GPIO_FN_FMIN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMIN_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMIN_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMIN_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMIN_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_DU1_DB5, GPIO_FN_AUDIO_CLKB_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMIN_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMIN_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_FMIN_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_FMIN_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_FMIN_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMIN_G	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_FMSICK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSICK,		GPIO_FN_FMSOILR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSIIBT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSIILR,	GPIO_FN_FMSIIBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSIILR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSIILR,	GPIO_FN_FMSIIBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSIOBT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSIOLR,	GPIO_FN_FMSIOBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSIOLR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSIOLR,	GPIO_FN_FMSIOBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSISLD_PORT1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSISLD_PORT1, \/* FMSISLD Port 1\/6 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSISLD_PORT6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSISLD_PORT6,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSOCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSOCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSOIBT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSOIBT,	GPIO_FN_FMSOOLR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSOILR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSICK,		GPIO_FN_FMSOILR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSOOBT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSOOBT,	GPIO_FN_FMSOSLD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSOOLR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSOIBT,	GPIO_FN_FMSOOLR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FMSOSLD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FMSOOBT,	GPIO_FN_FMSOSLD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FRB	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FCE0,	GPIO_FN_FCE1,	GPIO_FN_FRB, \/* FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FRB	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FRB,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSCLKST	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_FSCLKST,$/;"	e	enum:__anon9923b8340103
GPIO_FN_FSIACK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIACK,		GPIO_FN_FSIAILR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIACK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIACK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIACK_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIACK_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAIBT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAIBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAIBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAIBT_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAIBT_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAILR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIACK,		GPIO_FN_FSIAILR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAILR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAILR_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAILR_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAISLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAISLD, GPIO_FN_TPU0TO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAISLD_PORT0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAISLD_PORT0,		\/* FSIAISLD Port 0\/5 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAISLD_PORT5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAISLD_PORT5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAISLD_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAISLD_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAOBT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAOLR,	GPIO_FN_FSIAOBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAOBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAOLR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAOLR,	GPIO_FN_FSIAOBT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAOLR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAOMC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAOSLD,	GPIO_FN_FSIAOMC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAOMC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOMC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAOSLD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAOSLD,	GPIO_FN_FSIAOMC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAOSLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOSLD, GPIO_FN_BBIF2_TXD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIAOSLD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAOSLD1,	GPIO_FN_FSIAOSLD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIAOSLD2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIAOSLD1,	GPIO_FN_FSIAOSLD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIASPDIF	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIASPDIF, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIASPDIF_PORT18	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIASPDIF_PORT18,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIASPDIF_PORT9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_FSIASPDIF_PORT9,	\/* FSIASPDIF Port 9\/18 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_FSIBCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBCK, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBIBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOBT, GPIO_FN_FSIBIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBILR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOLR, GPIO_FN_FSIBILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBISLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBISLD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBOBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOBT, GPIO_FN_FSIBIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBOLR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOLR, GPIO_FN_FSIBILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBOMC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOMC, GPIO_FN_FSICCK, GPIO_FN_FSICOMC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBOSLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOSLD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIBSPDIF	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBSPDIF, GPIO_FN_PORT53_FSICSPDIF,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOMC, GPIO_FN_FSICCK, GPIO_FN_FSICOMC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICIBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICILR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICISLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICISLD, GPIO_FN_FSIDISLD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOLR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOMC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBOMC, GPIO_FN_FSICCK, GPIO_FN_FSICOMC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOSLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOSLD, GPIO_FN_PORT47_FSICSPDIF,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOSLDT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA0_CTS_, GPIO_FN_FSICOSLDT1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOSLDT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA0_RTS_, GPIO_FN_FSICOSLDT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSICOSLDT3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO5, GPIO_FN_SCIFA0_SCK, GPIO_FN_FSICOSLDT3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIDIBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIDILR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIDISLD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICISLD, GPIO_FN_FSIDISLD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIDOBT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSIDOLR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_FSO_CEF_1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_FSO_CEF_1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_FSO_CFE_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM0, GPIO_FN_TCLK1, GPIO_FN_FSO_CFE_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_FSO_CFE_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_FSO_CFE_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_FSO_CFE_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TCLK2, GPIO_FN_FSO_CFE_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_FSO_TOE	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TCLK3, GPIO_FN_FSO_TOE,$/;"	e	enum:__anond45e39910103
GPIO_FN_GLO_I0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_I0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_I0_B, GPIO_FN_VI3_DATA6_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_I0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_I0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_I1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_I1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_I1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_I1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_I1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_Q0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_Q0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_Q0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_Q1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_Q1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_Q1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_Q1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_Q1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_RFON	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_RFON	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_RFON	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_RFON_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_RFON_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_RFON_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_RFON_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_RFON_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_RFON_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_RFON_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_RFON_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SCLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SCLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SCLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SCLK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SCLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SCLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SCLK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SCLK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SDATA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SDATA	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SDATA	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SDATA_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SDATA_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SDATA_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SDATA_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SDATA_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SDATA_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SDATA_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SDATA_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SS	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SS	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SS_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SS_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SS_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SS_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GLO_SS_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SS_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GLO_SS_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GLO_SS_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPI0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_GPO0,	GPIO_FN_GPI0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_GPI0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_GPO1,	GPIO_FN_GPI1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_GPI1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPI7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPI7,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_GPO0,	GPIO_FN_GPI0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_GPO0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_GPO1,	GPIO_FN_GPI1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_GPO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO2, GPIO_FN_STATUS0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO3, GPIO_FN_STATUS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO4, GPIO_FN_STATUS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO5, GPIO_FN_SCIFA0_SCK, GPIO_FN_FSICOSLDT3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPO7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_GPS_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GPS_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_MAG	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GPS_MAG	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_MAG	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_MAG_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_MAG_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_MAG_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_MAG_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_MAG_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_MAG_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_SIGN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_GPS_SIGN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_SIGN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_SIGN_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_SIGN_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_SIGN_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_SIGN_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_GPS_SIGN_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_GPS_SIGN_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_HSCK0, GPIO_FN_MSIOF0_SYNC, GPIO_FN_HCTS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_HCTS0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS0_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS0_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS0_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS0_N_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS0_N_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS0_N_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS0_N_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_HCTS1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS1_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HCTS1_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS1_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS1_N_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS1_N_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS1x_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HCTS1x_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HCTS1x_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HCTS1x_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HCTS2_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS2_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS2_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HCTS2_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HCTS2x_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HCTS2x_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HCTS2x_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HCTS2x_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HCTS3x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HCTS3x,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HCTS4x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HCTS4x,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HDMI0_CEC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HDMI0_CEC,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HDMI1_CEC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HDMI1_CEC,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRTS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_HRTS0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS0_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS0_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS0_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS0_N_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HRTS0_N_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS0_N_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS0_N_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS0_N_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_HSCK1, GPIO_FN_MSIOF1_SYNC, GPIO_FN_HRTS1,$/;"	e	enum:__anond45e39910103
GPIO_FN_HRTS1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS1_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRTS1_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS1_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS1_N_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS1_N_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS1x_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRTS1x_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRTS1x_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRTS1x_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRTS2_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS2_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS2_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRTS2_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRTS2x_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRTS2x_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRTS2x_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRTS2x_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRTS3x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRTS3x,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRTS4x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRTS4x,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_HTX0, GPIO_FN_MSIOF0_RXD, GPIO_FN_HRX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_HRX0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX0_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX0_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_1_B, GPIO_FN_HRX0_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_HTX1, GPIO_FN_MSIOF1_RXD, GPIO_FN_HRX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_HRX1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HRX1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HRX2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HRX3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX3_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX3_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX3_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX3_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HRX4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HRX4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSCIF0_HCTS_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HCTS_N, GPIO_FN_VI0_R6, GPIO_FN_SCIF0_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF0_HRTS_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HRTS_N, GPIO_FN_VI0_R7, GPIO_FN_SCIF0_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF0_HRX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HRX, GPIO_FN_VI0_R4, GPIO_FN_I2C1_SCL_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF0_HSCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HSCK, GPIO_FN_SCIF_CLK_B, GPIO_FN_AVB_CRS,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF0_HTX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HTX, GPIO_FN_VI0_R5, GPIO_FN_I2C1_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HCTS_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SPEEDIN_B, GPIO_FN_VSP_B, GPIO_FN_HSCIF1_HCTS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HCTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_HSCIF1_HCTS_N_B, GPIO_FN_SCIFA0_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HRTS_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF1_HRTS_N, GPIO_FN_SCIFA4_TXD, GPIO_FN_IERX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HRTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_HSCIF1_HRTS_N_B, GPIO_FN_SCIFA0_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HRX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA_B, GPIO_FN_HSCIF1_HRX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HRX_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RX_ER_B, GPIO_FN_SSI_SDATA1, GPIO_FN_HSCIF1_HRX_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HSCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA, GPIO_FN_TPUTO1, GPIO_FN_DU1_DG1, GPIO_FN_HSCIF1_HSCK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HTX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL, GPIO_FN_PWM6, GPIO_FN_DU1_DG0, GPIO_FN_HSCIF1_HTX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCIF1_HTX_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_HSCIF1_HTX_B, GPIO_FN_VI1_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_HSCK0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HSCK0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_HSCK0, GPIO_FN_MSIOF0_SYNC, GPIO_FN_HCTS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_HSCK0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HSCK1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_HSCK1, GPIO_FN_MSIOF1_SYNC, GPIO_FN_HRTS1,$/;"	e	enum:__anond45e39910103
GPIO_FN_HSCK1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HSCK1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSCK1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HSCK1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HSCK1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSCK1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK1_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK1_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HSCK2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSCK2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HSCK2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSCK2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HSCK2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HSCK3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HSCK3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSCK4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HSCK4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HSI_RX_DATA	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_RX_FLAG	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_RX_READY	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, GPIO_FN_PORT115_I2C_SCL2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_RX_WAKE	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_PORT116_I2C_SDA2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_TX_DATA	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_TX_FLAG	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_FLAG,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_TX_READY	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HSI_TX_WAKE	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_HTX0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_HTX0, GPIO_FN_MSIOF0_RXD, GPIO_FN_HRX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_HTX0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX0_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX0_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_HTX1, GPIO_FN_MSIOF1_RXD, GPIO_FN_HRX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_HTX1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_HTX1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX2_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_HTX2_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_HTX3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX3_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX3_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX3_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX3_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_HTX4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_HTX4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_I2C0_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKC_B, GPIO_FN_I2C0_SCL, GPIO_FN_SCIF0_RXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SCL_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MAGIC_B, GPIO_FN_AUDIO_CLKA, GPIO_FN_I2C0_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD_B, GPIO_FN_I2C0_SCL_C, GPIO_FN_IERX_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SCL_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SCL_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SCL_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SCL_E, GPIO_FN_AVB_MAGIC, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TPUTO0_B, GPIO_FN_I2C0_SDA, GPIO_FN_SCIF0_TXD_C, GPIO_FN_TPUTO0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SDA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_B, GPIO_FN_SCIFA4_TXD_D, GPIO_FN_VI1_FIELD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_C, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C0_SDA_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_E, GPIO_FN_AVB_PHY_INT, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C1_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_CLK, GPIO_FN_DVC_MUTE, GPIO_FN_CAN1_TX_D, GPIO_FN_I2C1_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C1_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HRX, GPIO_FN_VI0_R4, GPIO_FN_I2C1_SCL_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C1_SCL_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C1_SCL_E, GPIO_FN_FMCLK_D, GPIO_FN_DU1_DB4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C1_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SDATA_D, GPIO_FN_TPUTO1_B, GPIO_FN_I2C1_SDA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C1_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HTX, GPIO_FN_VI0_R5, GPIO_FN_I2C1_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C1_SDA_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_CLK_C, GPIO_FN_SCIF3_TXD, GPIO_FN_I2C1_SDA_E,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C2_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C2_SCL, GPIO_FN_SCIFA5_RXD, GPIO_FN_DU1_DB6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C2_SCL_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD, GPIO_FN_I2C2_SCL_B, GPIO_FN_CAN1_RX, GPIO_FN_MMC_D7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C2_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_RXD, GPIO_FN_I2C2_SCL_C, GPIO_FN_DU1_DR2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C2_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C2_SDA, GPIO_FN_SCIFA5_TXD, GPIO_FN_DU1_DB7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C2_SDA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_TXD, GPIO_FN_I2C2_SDA_B, GPIO_FN_CAN1_TX, GPIO_FN_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C2_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_SCIF5_TXD, GPIO_FN_I2C2_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_CLKENB, GPIO_FN_I2C3_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SCL_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_D2, GPIO_FN_SCIFA3_TXD_B, GPIO_FN_D3, GPIO_FN_I2C3_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_SCIFA3_RXD, GPIO_FN_I2C3_SCL_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SCL_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C3_SCL_E, GPIO_FN_VI1_DATA6, GPIO_FN_ATARD0_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_I2C3_SDA, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SDA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_RXD_B, GPIO_FN_D4, GPIO_FN_I2C3_SDA_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_I2C3_SDA_C, GPIO_FN_DU1_DOTCLKOUT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C3_SDA_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C3_SDA_E, GPIO_FN_VI1_DATA7, GPIO_FN_ATADIR0_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL, GPIO_FN_PWM6, GPIO_FN_DU1_DG0, GPIO_FN_HSCIF1_HTX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SCL_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDC_B, GPIO_FN_AUDIO_CLKC, GPIO_FN_I2C4_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_I2C4_SCL_C, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SCL_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL_E, GPIO_FN_AVB_GTX_CLK, GPIO_FN_SSI_WS6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA, GPIO_FN_TPUTO1, GPIO_FN_DU1_DG1, GPIO_FN_HSCIF1_HSCK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SDA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_I2C4_SDA_B, GPIO_FN_SCIFA5_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA_C, GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_I2C4_SDA_E	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA_E, GPIO_FN_AVB_MDC, GPIO_FN_SSI_SDATA6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IDE_A0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D15,	GPIO_FN_IDE_A0,		GPIO_FN_IDE_A1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_A1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D15,	GPIO_FN_IDE_A0,		GPIO_FN_IDE_A1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_A2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_A2,		GPIO_FN_IDE_CS0,	GPIO_FN_IDE_CS1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_CS0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_A2,		GPIO_FN_IDE_CS0,	GPIO_FN_IDE_CS1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_CS1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_A2,		GPIO_FN_IDE_CS0,	GPIO_FN_IDE_CS1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D0,		GPIO_FN_IDE_D1,		GPIO_FN_IDE_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D0,		GPIO_FN_IDE_D1,		GPIO_FN_IDE_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D9,		GPIO_FN_IDE_D10,	GPIO_FN_IDE_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D9,		GPIO_FN_IDE_D10,	GPIO_FN_IDE_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D12,	GPIO_FN_IDE_D13,	GPIO_FN_IDE_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D12,	GPIO_FN_IDE_D13,	GPIO_FN_IDE_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D12,	GPIO_FN_IDE_D13,	GPIO_FN_IDE_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D15,	GPIO_FN_IDE_A0,		GPIO_FN_IDE_A1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D0,		GPIO_FN_IDE_D1,		GPIO_FN_IDE_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D3,		GPIO_FN_IDE_D4,		GPIO_FN_IDE_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D3,		GPIO_FN_IDE_D4,		GPIO_FN_IDE_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D3,		GPIO_FN_IDE_D4,		GPIO_FN_IDE_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D6,		GPIO_FN_IDE_D7,		GPIO_FN_IDE_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D6,		GPIO_FN_IDE_D7,		GPIO_FN_IDE_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D6,		GPIO_FN_IDE_D7,		GPIO_FN_IDE_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_D9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_D9,		GPIO_FN_IDE_D10,	GPIO_FN_IDE_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_DIRECTION	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_INT,	GPIO_FN_IDE_RST,	GPIO_FN_IDE_DIRECTION,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_EXBUF_ENB	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_EXBUF_ENB,	GPIO_FN_IDE_IODACK,	GPIO_FN_IDE_IODREQ,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_INT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_INT,	GPIO_FN_IDE_RST,	GPIO_FN_IDE_DIRECTION,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_IODACK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_EXBUF_ENB,	GPIO_FN_IDE_IODACK,	GPIO_FN_IDE_IODREQ,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_IODREQ	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_EXBUF_ENB,	GPIO_FN_IDE_IODACK,	GPIO_FN_IDE_IODREQ,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_IORD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_IOWR,	GPIO_FN_IDE_IORD,	GPIO_FN_IDE_IORDY,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_IORDY	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_IOWR,	GPIO_FN_IDE_IORD,	GPIO_FN_IDE_IORDY,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_IOWR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_IOWR,	GPIO_FN_IDE_IORD,	GPIO_FN_IDE_IORDY,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDE_RST	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IDE_INT,	GPIO_FN_IDE_RST,	GPIO_FN_IDE_DIRECTION,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IDIN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_RTS_, GPIO_FN_IDIN,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_IECLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IECLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IECLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IECLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD, GPIO_FN_IECLK, GPIO_FN_DU1_DG3, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IECLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_IECLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_IECLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IECLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IECLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IECLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_IECLK_B, GPIO_FN_IRD_RX, GPIO_FN_SSI_SDATA4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IECLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_IECLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_IECLK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IECLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IECLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IECLK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IECLK_C, GPIO_FN_AVB_RX_ER, GPIO_FN_VI0_HSYNC_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IERX	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IERX	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IERX	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IERX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF1_HRTS_N, GPIO_FN_SCIFA4_TXD, GPIO_FN_IERX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IERX_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_IERX_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_IERX_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IERX_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IERX_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IERX_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_IERX_B, GPIO_FN_IRD_SCK, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IERX_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_IERX_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_IERX_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IERX_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IERX_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IERX_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD_B, GPIO_FN_I2C0_SCL_C, GPIO_FN_IERX_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IETX	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IETX	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IETX	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IETX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_IETX, GPIO_FN_DU1_DG2, GPIO_FN_REMOCON_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IETX_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_IETX_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_IETX_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IETX_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IETX_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IETX_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_CK, GPIO_FN_IETX_B, GPIO_FN_IRD_TX, GPIO_FN_SSI_WS4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IETX_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_IETX_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_IETX_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IETX_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IETX_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IETX_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA5_RXD_C, GPIO_FN_IETX_C, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC0_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_RXD, GPIO_FN_IIC0_SCL, GPIO_FN_DU1_DG6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC0_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_IIC0_SCL_C, GPIO_FN_DU1_CDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC0_SCL_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SCL_D, GPIO_FN_AVB_TX_CLK, GPIO_FN_ADIDATA, GPIO_FN_AD_DI,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC0_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_TXD, GPIO_FN_IIC0_SDA, GPIO_FN_DU1_DG7, GPIO_FN_SSI_WS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC0_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_C, GPIO_FN_DU1_DISP, GPIO_FN_SSI_WS78,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC0_SDA_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_D, GPIO_FN_AVB_TXD0, GPIO_FN_ADICS_SAMP, GPIO_FN_AD_DO,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC1_SCL	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC1_SCL, GPIO_FN_DU1_DB0, GPIO_FN_SSI_SDATA2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC1_SCL_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_RXD_B, GPIO_FN_IIC1_SCL_C, GPIO_FN_VI1_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC1_SCL_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_RXD_C, GPIO_FN_IIC1_SCL_D, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC1_SDA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_TXD, GPIO_FN_IIC1_SDA, GPIO_FN_DU1_DB1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC1_SDA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCIF1_TXD_B, GPIO_FN_IIC1_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IIC1_SDA_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_TXD_C, GPIO_FN_IIC1_SDA_D, GPIO_FN_AVB_TXD7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_INTC_EN0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_EN1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_IRQ0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_IRQ0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_INTC_IRQ0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_INTC_IRQ1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_IRQ1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_INTC_IRQ1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_INTC_IRQ2_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_IRQ2_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_INTC_IRQ2_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_INTC_IRQ3_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_IRQ3_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_INTC_IRQ3_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_INTC_IRQ4_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_INTC_IRQ4_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_INTC_IRQ4_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IO2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IO2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IO2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_IO2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IO2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IO2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IO3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IO3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IO3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,$/;"	e	enum:__anond45e39910103
GPIO_FN_IO3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IO3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IO3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IOIS16	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IOIS16, \/* ? *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRDA_FIRSEL	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRDA_FIRSEL,	GPIO_FN_IRDA_IN,	GPIO_FN_IRDA_OUT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRDA_IN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRDA_FIRSEL,	GPIO_FN_IRDA_IN,	GPIO_FN_IRDA_OUT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRDA_OUT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRDA_FIRSEL,	GPIO_FN_IRDA_IN,	GPIO_FN_IRDA_OUT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRD_RX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_IECLK_B, GPIO_FN_IRD_RX, GPIO_FN_SSI_SDATA4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRD_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_IERX_B, GPIO_FN_IRD_SCK, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRD_TX	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_CK, GPIO_FN_IETX_B, GPIO_FN_IRD_TX, GPIO_FN_SSI_WS4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IROUT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IROUT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_DATA, GPIO_FN_MSIOF0_SCK, GPIO_FN_IRQ0, GPIO_FN_TS_SDATA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ0_PORT13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ0_PORT2,	GPIO_FN_IRQ0_PORT13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ0_PORT2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ0_PORT2,	GPIO_FN_IRQ0_PORT13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE38, GPIO_FN_SCIF2_SCK, GPIO_FN_IRQ1, GPIO_FN_DU1_DB2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ10,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ12_PORT42	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ12_PORT42,	GPIO_FN_IRQ12_PORT97,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ12_PORT97	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ12_PORT42,	GPIO_FN_IRQ12_PORT97,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ13_PORT64	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ13_PORT64,	GPIO_FN_IRQ13_PORT98,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ13_PORT98	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ13_PORT64,	GPIO_FN_IRQ13_PORT98,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ14_PORT63	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ14_PORT63,	GPIO_FN_IRQ14_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ14_PORT99	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ14_PORT63,	GPIO_FN_IRQ14_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ15_PORT100	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ15_PORT62,	GPIO_FN_IRQ15_PORT100,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ15_PORT62	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ15_PORT62,	GPIO_FN_IRQ15_PORT100,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ16_PORT211	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ16_PORT68,	GPIO_FN_IRQ16_PORT211,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ16_PORT68	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ16_PORT68,	GPIO_FN_IRQ16_PORT211,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ17	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ18	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ18,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ19	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ19,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE39, GPIO_FN_SCIF3_SCK, GPIO_FN_IRQ2, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ21,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ22,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ23	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ24	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ24,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ25	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ26_PORT58	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ26_PORT58,	GPIO_FN_IRQ26_PORT81,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ26_PORT81	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ26_PORT58,	GPIO_FN_IRQ26_PORT81,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ27_PORT168	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ27_PORT57,	GPIO_FN_IRQ27_PORT168,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ27_PORT57	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ27_PORT57,	GPIO_FN_IRQ27_PORT168,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ28_PORT169	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ28_PORT56,	GPIO_FN_IRQ28_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ28_PORT56	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ28_PORT56,	GPIO_FN_IRQ28_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ29_PORT170	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ29_PORT50,	GPIO_FN_IRQ29_PORT170,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ29_PORT50	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ29_PORT50,	GPIO_FN_IRQ29_PORT170,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ2_PORT11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ2_PORT11,	GPIO_FN_IRQ2_PORT12,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ2_PORT12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ2_PORT11,	GPIO_FN_IRQ2_PORT12,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_IRQ3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ3, GPIO_FN_SCL4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_IRQ3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ3, GPIO_FN_SCL4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ30_PORT171	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ30_PORT49,	GPIO_FN_IRQ30_PORT171,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ30_PORT49	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ30_PORT49,	GPIO_FN_IRQ30_PORT171,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ31_PORT167	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ31_PORT41,	GPIO_FN_IRQ31_PORT167,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ31_PORT41	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ31_PORT41,	GPIO_FN_IRQ31_PORT167,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ3_PORT10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ3_PORT10,	GPIO_FN_IRQ3_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ3_PORT14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ3_PORT10,	GPIO_FN_IRQ3_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_SCK_B, GPIO_FN_IRQ4, GPIO_FN_D1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ4_PORT15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ4_PORT15,	GPIO_FN_IRQ4_PORT172,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ4_PORT172	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ4_PORT15,	GPIO_FN_IRQ4_PORT172,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD, GPIO_FN_IRQ5, GPIO_FN_DU1_DR1, GPIO_FN_RIF1_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ5_PORT0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ5_PORT0,	GPIO_FN_IRQ5_PORT1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ5_PORT1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ5_PORT0,	GPIO_FN_IRQ5_PORT1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ6_PORT121	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ6_PORT121,	GPIO_FN_IRQ6_PORT173,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ6_PORT173	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ6_PORT121,	GPIO_FN_IRQ6_PORT173,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_CAN0_RX, GPIO_FN_SD1_WP, GPIO_FN_IRQ7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ7_PORT120	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ7_PORT120,	GPIO_FN_IRQ7_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ7_PORT209	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ7_PORT120,	GPIO_FN_IRQ7_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_SCIFA2_TXD_B, GPIO_FN_IRQ8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_IRQ9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_IRQ9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_PWM1_B, GPIO_FN_IRQ9, GPIO_FN_REMOCON,$/;"	e	enum:__anonace1e3530103
GPIO_FN_IRQ9_MCP_INT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_IRQ9_MCP_INT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_IRQ9_MEM_INT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_IRQ9_MEM_INT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_IRQ9_PORT118	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ9_PORT118,	GPIO_FN_IRQ9_PORT210,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_IRQ9_PORT210	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_IRQ9_PORT118,	GPIO_FN_IRQ9_PORT210,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A20, GPIO_FN_KEYIN0, GPIO_FN_MSIOF0_RSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN0_PORT43	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN0_PORT43, \/* MSEL4CR_18_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN0_PORT58	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN0_PORT58, \/* MSEL4CR_18_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A21, GPIO_FN_KEYIN1, GPIO_FN_MSIOF0_RSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN1_PORT44	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN1_PORT44,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN1_PORT57	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN1_PORT57,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A22, GPIO_FN_KEYIN2, GPIO_FN_MSIOF0_MCK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN2_PORT45	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN2_PORT45,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN2_PORT56	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN2_PORT56,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN2_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN2_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A23, GPIO_FN_KEYIN3, GPIO_FN_MSIOF0_MCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN3_PORT46	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN3_PORT46,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN3_PORT55	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN3_PORT55,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN3_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN3_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN4,		GPIO_FN_KEYIN5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A24, GPIO_FN_KEYIN4, GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN4_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN4_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN4,		GPIO_FN_KEYIN5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A25, GPIO_FN_KEYIN5, GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN5_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN5_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN6,		GPIO_FN_KEYIN7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A26, GPIO_FN_KEYIN6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN6_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN6_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYIN6,		GPIO_FN_KEYIN7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYIN7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN7,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYIN7_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYIN7_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT0,	GPIO_FN_KEYOUT1,	GPIO_FN_KEYOUT2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A19, GPIO_FN_KEYOUT0, GPIO_FN_MSIOF0_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT0,	GPIO_FN_KEYOUT1,	GPIO_FN_KEYOUT2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A18, GPIO_FN_KEYOUT1, GPIO_FN_MSIOF0_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT0,	GPIO_FN_KEYOUT1,	GPIO_FN_KEYOUT2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A17, GPIO_FN_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT3,	GPIO_FN_KEYOUT4,	GPIO_FN_KEYOUT5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A16, GPIO_FN_KEYOUT3, GPIO_FN_MSIOF0_SS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT3,	GPIO_FN_KEYOUT4,	GPIO_FN_KEYOUT5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A15, GPIO_FN_KEYOUT4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT3,	GPIO_FN_KEYOUT4,	GPIO_FN_KEYOUT5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A14, GPIO_FN_KEYOUT5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_KEYOUT6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT6,	GPIO_FN_KEYOUT7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_KEYOUT6,	GPIO_FN_KEYOUT7,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_KEYOUT8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_KEYOUT8,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD0_CS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_CS,	GPIO_FN_LCD0_RS, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D0,	GPIO_FN_LCD0_D1,	GPIO_FN_LCD0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D0,	GPIO_FN_LCD0_D1,	GPIO_FN_LCD0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D9,	GPIO_FN_LCD0_D10,	GPIO_FN_LCD0_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D9,	GPIO_FN_LCD0_D10,	GPIO_FN_LCD0_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D12,	GPIO_FN_LCD0_D13,	GPIO_FN_LCD0_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D12,	GPIO_FN_LCD0_D13,	GPIO_FN_LCD0_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D12,	GPIO_FN_LCD0_D13,	GPIO_FN_LCD0_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D15,	GPIO_FN_LCD0_D16,	GPIO_FN_LCD0_D17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D16	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D15,	GPIO_FN_LCD0_D16,	GPIO_FN_LCD0_D17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D17	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D15,	GPIO_FN_LCD0_D16,	GPIO_FN_LCD0_D17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D18_PORT163	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D18_PORT163,	GPIO_FN_LCD0_D19_PORT162,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D18_PORT40	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D18_PORT40,	GPIO_FN_LCD0_D19_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D19_PORT162	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D18_PORT163,	GPIO_FN_LCD0_D19_PORT162,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D19_PORT4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D18_PORT40,	GPIO_FN_LCD0_D19_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D0,	GPIO_FN_LCD0_D1,	GPIO_FN_LCD0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D20_PORT161	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D20_PORT161,	GPIO_FN_LCD0_D21_PORT158,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D20_PORT3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D20_PORT3,		GPIO_FN_LCD0_D21_PORT2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D21_PORT158	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D20_PORT161,	GPIO_FN_LCD0_D21_PORT158,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D21_PORT2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D20_PORT3,		GPIO_FN_LCD0_D21_PORT2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D22_PORT0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D22_PORT0,		GPIO_FN_LCD0_D23_PORT1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D22_PORT160	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D22_PORT160,	GPIO_FN_LCD0_D23_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D23_PORT1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D22_PORT0,		GPIO_FN_LCD0_D23_PORT1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D23_PORT159	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D22_PORT160,	GPIO_FN_LCD0_D23_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D3,	GPIO_FN_LCD0_D4,	GPIO_FN_LCD0_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D3,	GPIO_FN_LCD0_D4,	GPIO_FN_LCD0_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D3,	GPIO_FN_LCD0_D4,	GPIO_FN_LCD0_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D6,	GPIO_FN_LCD0_D7,	GPIO_FN_LCD0_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D6,	GPIO_FN_LCD0_D7,	GPIO_FN_LCD0_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D6,	GPIO_FN_LCD0_D7,	GPIO_FN_LCD0_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_D9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_D9,	GPIO_FN_LCD0_D10,	GPIO_FN_LCD0_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_DCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_DCK,	GPIO_FN_LCD0_VSYN, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_DISP	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_HSYN,	GPIO_FN_LCD0_DISP, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_DON	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_DON,	GPIO_FN_LCD0_VCPWC,	GPIO_FN_LCD0_VEPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_HSYN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_HSYN,	GPIO_FN_LCD0_DISP, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_LCLK_PORT102	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_LCLK_PORT102,	\/* MSEL5CR_6_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_LCLK_PORT165	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_LCLK_PORT165,	 \/* MSEL5CR_6_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_RD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_WR,	GPIO_FN_LCD0_RD, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_RS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_CS,	GPIO_FN_LCD0_RS, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_VCPWC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_DON,	GPIO_FN_LCD0_VCPWC,	GPIO_FN_LCD0_VEPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_VEPWC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_DON,	GPIO_FN_LCD0_VCPWC,	GPIO_FN_LCD0_VEPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_VSYN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_DCK,	GPIO_FN_LCD0_VSYN, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD0_WR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD0_WR,	GPIO_FN_LCD0_RD, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_CS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_CS,	GPIO_FN_LCD1_RS, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D0,	GPIO_FN_LCD1_D1,	GPIO_FN_LCD1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D0,	GPIO_FN_LCD1_D1,	GPIO_FN_LCD1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D9,	GPIO_FN_LCD1_D10,	GPIO_FN_LCD1_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D9,	GPIO_FN_LCD1_D10,	GPIO_FN_LCD1_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D12,	GPIO_FN_LCD1_D13,	GPIO_FN_LCD1_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D12,	GPIO_FN_LCD1_D13,	GPIO_FN_LCD1_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D12,	GPIO_FN_LCD1_D13,	GPIO_FN_LCD1_D14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D15,	GPIO_FN_LCD1_D16,	GPIO_FN_LCD1_D17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D16	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D15,	GPIO_FN_LCD1_D16,	GPIO_FN_LCD1_D17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D17	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D15,	GPIO_FN_LCD1_D16,	GPIO_FN_LCD1_D17,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D18	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D18,	GPIO_FN_LCD1_D19,	GPIO_FN_LCD1_D20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D19	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D18,	GPIO_FN_LCD1_D19,	GPIO_FN_LCD1_D20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D0,	GPIO_FN_LCD1_D1,	GPIO_FN_LCD1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D18,	GPIO_FN_LCD1_D19,	GPIO_FN_LCD1_D20,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D21,	GPIO_FN_LCD1_D22,	GPIO_FN_LCD1_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D21,	GPIO_FN_LCD1_D22,	GPIO_FN_LCD1_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D23	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D21,	GPIO_FN_LCD1_D22,	GPIO_FN_LCD1_D23,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D3,	GPIO_FN_LCD1_D4,	GPIO_FN_LCD1_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D3,	GPIO_FN_LCD1_D4,	GPIO_FN_LCD1_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D3,	GPIO_FN_LCD1_D4,	GPIO_FN_LCD1_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D6,	GPIO_FN_LCD1_D7,	GPIO_FN_LCD1_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D6,	GPIO_FN_LCD1_D7,	GPIO_FN_LCD1_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D6,	GPIO_FN_LCD1_D7,	GPIO_FN_LCD1_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_D9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_D9,	GPIO_FN_LCD1_D10,	GPIO_FN_LCD1_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_DCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_DCK,	GPIO_FN_LCD1_VSYN, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_DISP	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_HSYN,	GPIO_FN_LCD1_DISP, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_DON	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_DON,	GPIO_FN_LCD1_VCPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_HSYN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_HSYN,	GPIO_FN_LCD1_DISP, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_LCLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_LCLK,	GPIO_FN_LCD1_VEPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_RD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_WR,	GPIO_FN_LCD1_RD, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_RS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_CS,	GPIO_FN_LCD1_RS, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_VCPWC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_DON,	GPIO_FN_LCD1_VCPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_VEPWC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_LCLK,	GPIO_FN_LCD1_VEPWC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_VSYN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_DCK,	GPIO_FN_LCD1_VSYN, \/* for RGB *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD1_WR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCD1_WR,	GPIO_FN_LCD1_RD, \/* for SYS *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCD2D0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO2_HD, GPIO_FN_LCD2D1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, GPIO_FN_LCD2D10,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT131_KEYOUT11, GPIO_FN_LCD2D11,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT132_KEYOUT10, GPIO_FN_LCD2D12,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_LCD2D13,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, GPIO_FN_LCD2D14,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, GPIO_FN_LCD2D15,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D16	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYOUT8, GPIO_FN_LCD2D16,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D17	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYOUT9, GPIO_FN_LCD2D17,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D18	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO2_CLK, GPIO_FN_LCD2D18,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D19	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D20	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D20,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D21	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D21,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D22	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, GPIO_FN_LCD2D22,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D23	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, GPIO_FN_LCD2D23,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO2_D5, GPIO_FN_LCD2D3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT145_LCD2RS, GPIO_FN_VIO2_D7, GPIO_FN_LCD2D5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2D7,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2D9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2DCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_CLK, GPIO_FN_LCD2DCK, GPIO_FN_PORT146_LCD2WR_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2DCK_2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCD2DCK_2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCD2RD_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDC0_SELECT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCDC0_SELECT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCDC1_SELECT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_LCDC1_SELECT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_LCDCS2_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDCS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDC_LCDC0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDC_LCDC0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDC_LCDC1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDC_LCDC1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD1, GPIO_FN_PORT193_SCIFA5_CTS_, GPIO_FN_BBIF2_TSYNC1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD10, GPIO_FN_D18,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD11, GPIO_FN_D19,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD12, GPIO_FN_D20,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD13, GPIO_FN_D21,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD14, GPIO_FN_D22,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD16	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD17	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD17, GPIO_FN_D25,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD18	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD19	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD2, GPIO_FN_PORT194_SCIFA5_RTS_, GPIO_FN_BBIF2_TSCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD20	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD21	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD22	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD23	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD3, GPIO_FN_PORT195_SCIFA5_RXD, GPIO_FN_BBIF2_TXD1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD4, GPIO_FN_PORT196_SCIFA5_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD5, GPIO_FN_PORT197_SCIFA5_SCK, GPIO_FN_MFG2_OUT2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD8, GPIO_FN_D16,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDD9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD9, GPIO_FN_D17,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDDCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDCK, GPIO_FN_LCDWR_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDDISP	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_PORT219_LCD2WR_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDDON	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDDON2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDHSYN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDLCLK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PORT221_LCD2CS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDOUT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT10,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT11,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT12,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT13,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG6, GPIO_FN_LCDOUT14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT14,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT15,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT16,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT17,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT18,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT19,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT20	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT20,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT21	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT21,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT22	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT22,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT23	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT23,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT7,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT8,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDOUT9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_LCDOUT9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_LCDOUT9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_LCDOUT9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_LCDOUT9,$/;"	e	enum:__anon9923b8340103
GPIO_FN_LCDRD_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDRD_, GPIO_FN_DACK2, GPIO_FN_PORT217_LCD2RS, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDRS	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_PORT219_LCD2WR_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDVSYN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDVSYN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_LCDWR_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDCK, GPIO_FN_LCDWR_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_CKO	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D0_MCP_NAF0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D10_MCP_NAF10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D10_MCP_NAF10,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D11_MCP_NAF11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D11_MCP_NAF11,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D12_MCP_NAF12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D12_MCP_NAF12,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D13_MCP_NAF13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D13_MCP_NAF13,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D14_MCP_NAF14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D14_MCP_NAF14,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D15_MCP_NAF15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D15_MCP_NAF15,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D1_MCP_NAF1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D2_MCP_NAF2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D3_MCP_NAF3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D4_MCP_NAF4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D5_MCP_NAF5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D6_MCP_NAF6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D7_MCP_NAF7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D8_MCP_NAF8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_D9_MCP_NAF9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D9_MCP_NAF9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_NBRSTOUT_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_NBRSTOUT_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_RDWR_MCP_FWE	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_WAIT__MCP_FRB	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_WAIT__MCP_FRB,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MCP_WE0__MCP_FWE	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MDATA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MDATA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MDATA, GPIO_FN_ATAWR0_N, GPIO_FN_ETH_RXD1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MDATA_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MDATA_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MDATA_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MDATA_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MEMC_A0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_A0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_A1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_A1, \/* MSEL4CR_6_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD0,	GPIO_FN_MEMC_AD1,	GPIO_FN_MEMC_AD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD0,	GPIO_FN_MEMC_AD1,	GPIO_FN_MEMC_AD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD9,	GPIO_FN_MEMC_AD10,	GPIO_FN_MEMC_AD11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD9,	GPIO_FN_MEMC_AD10,	GPIO_FN_MEMC_AD11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD12,	GPIO_FN_MEMC_AD13,	GPIO_FN_MEMC_AD14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD12,	GPIO_FN_MEMC_AD13,	GPIO_FN_MEMC_AD14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD12,	GPIO_FN_MEMC_AD13,	GPIO_FN_MEMC_AD14,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD15,	GPIO_FN_MEMC_CS0,	GPIO_FN_MEMC_INT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD0,	GPIO_FN_MEMC_AD1,	GPIO_FN_MEMC_AD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD3,	GPIO_FN_MEMC_AD4,	GPIO_FN_MEMC_AD5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD3,	GPIO_FN_MEMC_AD4,	GPIO_FN_MEMC_AD5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD3,	GPIO_FN_MEMC_AD4,	GPIO_FN_MEMC_AD5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD6,	GPIO_FN_MEMC_AD7,	GPIO_FN_MEMC_AD8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD6,	GPIO_FN_MEMC_AD7,	GPIO_FN_MEMC_AD8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD6,	GPIO_FN_MEMC_AD7,	GPIO_FN_MEMC_AD8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_AD9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD9,	GPIO_FN_MEMC_AD10,	GPIO_FN_MEMC_AD11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_ADV	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_ADV,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_BUSCLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_BUSCLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_CS0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD15,	GPIO_FN_MEMC_CS0,	GPIO_FN_MEMC_INT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_CS1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_CS1, \/* MSEL4CR_6_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_DREQ0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_DREQ0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_DREQ1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_DREQ1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_INT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_AD15,	GPIO_FN_MEMC_CS0,	GPIO_FN_MEMC_INT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_NOE	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_NWE,	GPIO_FN_MEMC_NOE,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_NWE	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_NWE,	GPIO_FN_MEMC_NOE,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MEMC_WAIT	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MEMC_WAIT,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MFG0_IN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A27, GPIO_FN_PORT149_RDWR, GPIO_FN_MFG0_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG0_IN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MFG0_IN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG0_OUT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG0_OUT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG1_IN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_CTS_, GPIO_FN_MFG1_IN1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG1_IN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG1_OUT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG1_OUT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG2_IN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT244_SCIFA5_CTS_, GPIO_FN_MFG2_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG2_IN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT245_SCIFA5_RTS_, GPIO_FN_MFG2_IN2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG2_OUT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG2_OUT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD5, GPIO_FN_PORT197_SCIFA5_SCK, GPIO_FN_MFG2_OUT2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG3_IN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA3_RXD, GPIO_FN_MFG3_IN1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG3_IN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA3_CTS_, GPIO_FN_MFG3_IN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG3_OUT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF1_SS2, GPIO_FN_SCIFA3_RTS_, GPIO_FN_MFG3_OUT1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG3_OUT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG4_IN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG4_IN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG4_OUT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MFG4_OUT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MII_COL	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_CRS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_LINK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_MDC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_MDIO	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RXD2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RXD3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RX_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RX_DV	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TXD2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TXD3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TX_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MII_TX_ER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MISO_IO1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MISO_IO1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MISO_IO1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_MISO_IO1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MISO_IO1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MISO_IO1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MLB_CK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MLB_CK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MLB_CK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_CK, GPIO_FN_IETX_B, GPIO_FN_IRD_TX, GPIO_FN_SSI_WS4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MLB_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MLB_DAT	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MLB_DAT	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MLB_DAT	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MLB_DAT	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_IERX_B, GPIO_FN_IRD_SCK, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MLB_SIG	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MLB_SIG	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MLB_SIG	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MLB_SIG	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_IECLK_B, GPIO_FN_IRD_RX, GPIO_FN_SSI_SDATA4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC0_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_CLK_PORT66	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_CLK_PORT66,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_CMD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_CMD_PORT67	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_CMD_PORT67,	\/* MSEL4CR_15_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D0_PORT68	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D0_PORT68,		GPIO_FN_MMC0_D1_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D1_PORT69	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D0_PORT68,		GPIO_FN_MMC0_D1_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D2_PORT70	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D2_PORT70,		GPIO_FN_MMC0_D3_PORT71,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D3_PORT71	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D2_PORT70,		GPIO_FN_MMC0_D3_PORT71,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D4_PORT72	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D4_PORT72,		GPIO_FN_MMC0_D5_PORT73,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D5_PORT73	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D4_PORT72,		GPIO_FN_MMC0_D5_PORT73,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D6_PORT74	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D6_PORT74,		GPIO_FN_MMC0_D7_PORT75,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC0_D7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC0_D7_PORT75	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC0_D6_PORT74,		GPIO_FN_MMC0_D7_PORT75,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_CLK_PORT103	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_CLK_PORT103,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_CMD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_CMD_PORT104	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_CMD_PORT104,	\/* MSEL4CR_15_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D0_PORT149	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D0_PORT149,	GPIO_FN_MMC1_D1_PORT148,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D1_PORT148	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D0_PORT149,	GPIO_FN_MMC1_D1_PORT148,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D2_PORT147	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D2_PORT147,	GPIO_FN_MMC1_D3_PORT146,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D3_PORT146	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D2_PORT147,	GPIO_FN_MMC1_D3_PORT146,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D4_PORT145	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D4_PORT145,	GPIO_FN_MMC1_D5_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D5_PORT144	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D4_PORT145,	GPIO_FN_MMC1_D5_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D6_PORT143	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D6_PORT143,	GPIO_FN_MMC1_D7_PORT142,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMC1_D7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MMC1_D7_PORT142	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MMC1_D6_PORT143,	GPIO_FN_MMC1_D7_PORT142,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MMCCLK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCCLK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCCLK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCCMD0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCCMD0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCCMD0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCCMD0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCCMD1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCCMD1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCCMD1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_2_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_2_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_3_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_3_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_4_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_4_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_5_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_5_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_6_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_6_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD0_7_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_7_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMCD1_7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MMC_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CLK, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_CMD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_CMD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_CMD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CLK, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CMD, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CMD, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MMC_D3, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MMC_D3, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D5, GPIO_FN_SD2_WP, GPIO_FN_MMC_D6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D5, GPIO_FN_SD2_WP, GPIO_FN_MMC_D6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D6_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D6_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MMC_D7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD, GPIO_FN_I2C2_SCL_B, GPIO_FN_CAN1_RX, GPIO_FN_MMC_D7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MMC_D7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MMC_D7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MOSI_IO0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MOSI_IO0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MOSI_IO0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_MOSI_IO0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MOSI_IO0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MOSI_IO0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MOUT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MOUT0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MOUT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MOUT0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MOUT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MOUT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MOUT1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MOUT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MOUT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MOUT2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MOUT5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MOUT5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MOUT5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MOUT6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MOUT6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MOUT6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIIOF3_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIIOF3_TXD_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF0L_MCK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_MCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_RSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_RSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_TSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_TSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, GPIO_FN_PORT217_LCD2DISP,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0L_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, GPIO_FN_PORT222_LCD2VSYN,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_MCK0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_MCK0,	GPIO_FN_MSIOF0_MCK1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_MCK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A22, GPIO_FN_KEYIN2, GPIO_FN_MSIOF0_MCK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_MCK1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_MCK0,	GPIO_FN_MSIOF0_MCK1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_MCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A23, GPIO_FN_KEYIN3, GPIO_FN_MSIOF0_MCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_RSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_RSYNC,	GPIO_FN_MSIOF0_RSCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_RSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A20, GPIO_FN_KEYIN0, GPIO_FN_MSIOF0_RSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_RSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_RSYNC,	GPIO_FN_MSIOF0_RSCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_RSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A21, GPIO_FN_KEYIN1, GPIO_FN_MSIOF0_RSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_RXD,	GPIO_FN_MSIOF0_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_HTX0, GPIO_FN_MSIOF0_RXD, GPIO_FN_HRX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SCK_D, GPIO_FN_BPFCLK_C, GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF0_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A24, GPIO_FN_KEYIN4, GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SCK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_HSCK0, GPIO_FN_MSIOF0_SYNC, GPIO_FN_HCTS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF0_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_DATA, GPIO_FN_MSIOF0_SCK, GPIO_FN_IRQ0, GPIO_FN_TS_SDATA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF0_SCK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF0_SCK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_SS1,	GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_CLK, GPIO_FN_BPFCLK_B, GPIO_FN_MSIOF0_SS1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A16, GPIO_FN_KEYOUT3, GPIO_FN_MSIOF0_SS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SS1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SS1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_SS1,	GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMCLK_B, GPIO_FN_RDS_CLK_B, GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A25, GPIO_FN_KEYIN5, GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SS2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SS2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_HSCK0, GPIO_FN_MSIOF0_SYNC, GPIO_FN_HCTS0,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_PWM1, GPIO_FN_TS_SCK, GPIO_FN_DU1_DR5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF0_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_TSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_TSCK,	GPIO_FN_MSIOF0_TSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_TSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A18, GPIO_FN_KEYOUT1, GPIO_FN_MSIOF0_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_TSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_TSCK,	GPIO_FN_MSIOF0_TSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_TSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A17, GPIO_FN_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF0_RXD,	GPIO_FN_MSIOF0_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_HTX0, GPIO_FN_MSIOF0_RXD, GPIO_FN_HRX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_SCIF5_TXD, GPIO_FN_I2C2_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF0_TXD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF0_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A19, GPIO_FN_KEYOUT0, GPIO_FN_MSIOF0_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF0_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF0_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_MCK0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_MCK0,	GPIO_FN_MSIOF1_MCK1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_MCK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_MCK0, GPIO_FN_PORT236_I2C_SDA2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_MCK1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_MCK0,	GPIO_FN_MSIOF1_MCK1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_MCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_MCK1, GPIO_FN_PORT237_I2C_SCL2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_RSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_RSCK,	GPIO_FN_MSIOF1_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_RSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2_, GPIO_FN_VIO2_CLK2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_RSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_RSCK,	GPIO_FN_MSIOF1_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_RSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_RXD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_HTX1, GPIO_FN_MSIOF1_RXD, GPIO_FN_HRX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF1_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_RXD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_MSIOF1_RXD_B, GPIO_FN_SCIF5_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_RXD_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_RXD_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_F	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_F,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_G	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_RXD_G,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_RXD_PORT118	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_RXD_PORT118,	GPIO_FN_MSIOF1_TXD_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_RXD_PORT75	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_RXD_PORT75,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SCK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_HSCK1, GPIO_FN_MSIOF1_SYNC, GPIO_FN_HRTS1,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF1_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SCK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SCK_B, GPIO_FN_VI3_HSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AD_DO_B, GPIO_FN_SSI_SDATA0, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SCK_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SCK_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SCK_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SCK_F	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_F,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SCK_G	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SCK_G,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SS1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SS1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, GPIO_FN_LCD2D22,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_SS1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS34, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_SCIFA1_RXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF1_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_F	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_F,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_G	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS1_G,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS1_PORT117	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_SS2_PORT116,	GPIO_FN_MSIOF1_SS1_PORT117,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_SS1_PORT67	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_SS1_PORT67,	GPIO_FN_MSIOF1_TSCK_PORT72,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_SS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SS2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SS2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, GPIO_FN_LCD2D23,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_SS2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA3, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF1_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_F	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_F,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_G	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SS2_G,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SS2_PORT116	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_SS2_PORT116,	GPIO_FN_MSIOF1_SS1_PORT117,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_SS2_PORT202	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_SS2_PORT202,	\/* MSEL4CR_10_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_SYNC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_SYNC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_HSCK1, GPIO_FN_MSIOF1_SYNC, GPIO_FN_HRTS1,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF1_SYNC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_MSIOF1_SYNC_B, GPIO_FN_SCIFA1_SCK_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF1_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SYNC_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_SYNC_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_SYNC_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SYNC_F	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_F,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_SYNC_G	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_SYNC_G,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_TSCK_PORT121	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_TSCK_PORT121,	\/* MSEL4CR_10_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_TSCK_PORT72	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_SS1_PORT67,	GPIO_FN_MSIOF1_TSCK_PORT72,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_TSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_TSYNC_PORT120	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_TSYNC_PORT120,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_TSYNC_PORT73	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_TSYNC_PORT73,	GPIO_FN_MSIOF1_TXD_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_TXD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_HTX1, GPIO_FN_MSIOF1_RXD, GPIO_FN_HRX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_MSIOF1_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF1_TXD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF1_TXD_B, GPIO_FN_SCIF5_TXD_D, GPIO_FN_ADICS_SAMP_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF1_TXD_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF1_TXD_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_F	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_F,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_G	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF1_TXD_G,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF1_TXD_PORT119	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_RXD_PORT118,	GPIO_FN_MSIOF1_TXD_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF1_TXD_PORT74	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF1_TSYNC_PORT73,	GPIO_FN_MSIOF1_TXD_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2R_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT244_SCIFB_CTS_, GPIO_FN_MSIOF2R_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2R_TSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT248_I2C_SCL3, GPIO_FN_MSIOF2R_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2R_TSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT249_I2C_SDA3, GPIO_FN_MSIOF2R_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2R_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT245_SCIFB_RTS_, GPIO_FN_MSIOF2R_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_MCK0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_MCK1,	GPIO_FN_MSIOF2_MCK0,	GPIO_FN_MSIOF2_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_MCK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_MCK1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_MCK1,	GPIO_FN_MSIOF2_MCK0,	GPIO_FN_MSIOF2_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_MCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_RSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_RSCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_RSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_RSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_MCK1,	GPIO_FN_MSIOF2_MCK0,	GPIO_FN_MSIOF2_RSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_RSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_TXD,	GPIO_FN_MSIOF2_RXD,	GPIO_FN_MSIOF2_TSCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF2_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_RXD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_RXD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_VI0_G0, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_RXD_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_RXD_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_RXD_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_RXD_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_S1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_S1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF2_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SCK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SCK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_VI0_G2, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SCK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SCK_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SCK_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SCK_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_SS2,	GPIO_FN_MSIOF2_TSYNC,	GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_SS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF2_SS1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SS1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_VI0_G4, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF2_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SS2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_SS2,	GPIO_FN_MSIOF2_TSYNC,	GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_SS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF2_SS2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SS2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_VI0_G5, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF2_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SS2_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS2_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SS2_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SS2_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SS2_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SS2_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SYNC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF2_SYNC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SYNC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_VI0_G3, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF2_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_SYNC_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_SYNC_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_TSCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_TXD,	GPIO_FN_MSIOF2_RXD,	GPIO_FN_MSIOF2_TSCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_TSCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, GPIO_FN_LCD2D15,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_TSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_SS2,	GPIO_FN_MSIOF2_TSYNC,	GPIO_FN_MSIOF2_SS1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_TSYNC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_LCD2D13,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_MSIOF2_TXD,	GPIO_FN_MSIOF2_RXD,	GPIO_FN_MSIOF2_TSCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_MSIOF2_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF2_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, GPIO_FN_LCD2D14,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MSIOF2_TXD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_TXD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_VI0_G1, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MSIOF2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_TXD_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF2_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF2_TXD_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF2_TXD_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_MSIOF2_TXD_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_MSIOF3_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_RXD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_RXD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_RXD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_RXD_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_RXD_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_SCK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SCK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SCK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SCK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SCK_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_SS1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SS1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SS1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SS1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SS1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SS1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_SS2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SS2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SS2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SS2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SYNC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SYNC_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_SYNC_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_SYNC_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_TXD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_TXD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MSIOF3_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_TXD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MSIOF3_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MSIOF3_TXD_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MST0_TS_XX1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST0_TS_XX1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST0_TS_XX2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST0_TS_XX2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST0_TS_XX3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST0_TS_XX3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST0_TS_XX4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST0_TS_XX4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST0_TS_XX5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST0_TS_XX5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST1_TS_XX1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST1_TS_XX1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST1_TS_XX2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST1_TS_XX2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST1_TS_XX3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST1_TS_XX3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST1_TS_XX4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST1_TS_XX4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MST1_TS_XX5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MST1_TS_XX5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_MTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_MTS_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2_B, GPIO_FN_VI1_DATA5, GPIO_FN_MTS_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_MTSx_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MTSx_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_MTSx_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_MTSx_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_NBRSTOUT_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_NBRSTOUT_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_NBRST_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_NBRST_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_NMI	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_OVCN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_OVCN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PCMOE_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PCMOE_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_D, GPIO_FN_CAN_CLK_D, GPIO_FN_PCMOE_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PCMWE_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PCMWE_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_AD_DI_B, GPIO_FN_PCMWE_N, GPIO_FN_SSI_WS0129,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PORT115_I2C_SCL2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, GPIO_FN_PORT115_I2C_SCL2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT115_I2C_SCL3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT115_I2C_SCL3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT116_I2C_SDA2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_PORT116_I2C_SDA2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT116_I2C_SDA3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT116_I2C_SDA3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT128_LCD2VSYN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_VD, GPIO_FN_PORT128_LCD2VSYN, GPIO_FN_VIO2_VD, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT129_LCD2CS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_HD, GPIO_FN_PORT129_LCD2HSYN, GPIO_FN_PORT129_LCD2CS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT129_LCD2HSYN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_HD, GPIO_FN_PORT129_LCD2HSYN, GPIO_FN_PORT129_LCD2CS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT130_MSIOF2_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, GPIO_FN_LCD2D10,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT131_KEYOUT11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT131_KEYOUT11, GPIO_FN_LCD2D11,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT131_KEYOUT6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT6, GPIO_FN_PORT131_MSIOF2_SS1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT131_MSIOF2_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT6, GPIO_FN_PORT131_MSIOF2_SS1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT132_KEYOUT10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT132_KEYOUT10, GPIO_FN_LCD2D12,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT132_KEYOUT7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT7, GPIO_FN_PORT132_MSIOF2_SS2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT132_MSIOF2_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT7, GPIO_FN_PORT132_MSIOF2_SS2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT136_KEYOUT8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYOUT8, GPIO_FN_LCD2D16,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT137_KEYOUT9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYOUT9, GPIO_FN_LCD2D17,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT138_KEYOUT8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D8, GPIO_FN_PORT138_KEYOUT8, GPIO_FN_VIO2_D0, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT139_KEYOUT9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D9, GPIO_FN_PORT139_KEYOUT9, GPIO_FN_VIO2_D1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT142_KEYOUT10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D12, GPIO_FN_PORT142_KEYOUT10, GPIO_FN_VIO2_D4, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT143_KEYOUT11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D13, GPIO_FN_PORT143_KEYOUT11, GPIO_FN_PORT143_KEYOUT6, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT143_KEYOUT6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D13, GPIO_FN_PORT143_KEYOUT11, GPIO_FN_PORT143_KEYOUT6, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT144_KEYOUT7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D14, GPIO_FN_PORT144_KEYOUT7, GPIO_FN_VIO2_D6, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT145_LCD2DISP	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_LCD2DISP, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT145_LCD2RS	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT145_LCD2RS, GPIO_FN_VIO2_D7, GPIO_FN_LCD2D5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT146_LCD2WR_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_CLK, GPIO_FN_LCD2DCK, GPIO_FN_PORT146_LCD2WR_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT149_KEYOUT9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT149_KEYOUT9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT149_RDWR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A27, GPIO_FN_PORT149_RDWR, GPIO_FN_MFG0_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT153_MSIOF2_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT156_MSIOF2_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_RTS1_, GPIO_FN_PORT156_MSIOF2_SS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT157_MSIOF2_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_CTS1_, GPIO_FN_PORT157_MSIOF2_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT159_SCIFA5_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT159_SCIFB_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT160_SCIFA5_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT160_SCIFB_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT161_SCIFA5_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT161_SCIFB_CTS_, GPIO_FN_PORT161_SCIFA5_CTS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT161_SCIFB_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT161_SCIFB_CTS_, GPIO_FN_PORT161_SCIFA5_CTS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT162_SCIFA5_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT162_SCIFB_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT163_SCIFA5_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT163_SCIFB_RTS_, GPIO_FN_PORT163_SCIFA5_RTS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT163_SCIFB_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT163_SCIFB_RTS_, GPIO_FN_PORT163_SCIFA5_RTS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT16_VIO_CKOR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT16_VIO_CKOR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT193_SCIFA5_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD1, GPIO_FN_PORT193_SCIFA5_CTS_, GPIO_FN_BBIF2_TSYNC1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT194_SCIFA5_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD2, GPIO_FN_PORT194_SCIFA5_RTS_, GPIO_FN_BBIF2_TSCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT195_SCIFA5_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD3, GPIO_FN_PORT195_SCIFA5_RXD, GPIO_FN_BBIF2_TXD1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT196_SCIFA5_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD4, GPIO_FN_PORT196_SCIFA5_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT197_SCIFA5_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD5, GPIO_FN_PORT197_SCIFA5_SCK, GPIO_FN_MFG2_OUT2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT19_VIO_CKO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA7_RTS_, GPIO_FN_PORT19_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT207_MSIOF0L_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT208_MSIOF0L_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT210_MSIOF0L_SS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT211_MSIOF0L_SS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT217_LCD2DISP	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, GPIO_FN_PORT217_LCD2DISP,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT217_LCD2RS	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDRD_, GPIO_FN_DACK2, GPIO_FN_PORT217_LCD2RS, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT218_VIO_CKOR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT218_VIO_CKOR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT219_LCD2WR_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_PORT219_LCD2WR_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT221_LCD2CS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PORT221_LCD2CS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT221_LCD2HSYN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT221_LCD2HSYN,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT222_LCD2VSYN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, GPIO_FN_PORT222_LCD2VSYN,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT226_VIO_CKO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_PORT226_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT236_I2C_SDA2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_MCK0, GPIO_FN_PORT236_I2C_SDA2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT237_I2C_SCL2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_MCK1, GPIO_FN_PORT237_I2C_SCL2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT241_IRDA_OUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT241_IROUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT242_IRDA_IN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT243_IRDA_FIRSEL	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT243_VIO_CKO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT244_SCIFA5_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT244_SCIFA5_CTS_, GPIO_FN_MFG2_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT244_SCIFB_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT244_SCIFB_CTS_, GPIO_FN_MSIOF2R_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT245_SCIFA5_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT245_SCIFA5_RTS_, GPIO_FN_MFG2_IN2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT245_SCIFB_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT245_SCIFB_RTS_, GPIO_FN_MSIOF2R_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT246_SCIFA5_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT246_SCIFB_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT247_SCIFA5_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT247_SCIFB_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT248_I2C_SCL3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT248_I2C_SCL3, GPIO_FN_MSIOF2R_TSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT248_SCIFA5_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT248_SCIFB_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT249_I2C_SDA3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT249_I2C_SDA3, GPIO_FN_MSIOF2R_TSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT249_IROUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT27_I2C_SCL2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XDVFS1, GPIO_FN_PORT27_I2C_SCL2, GPIO_FN_PORT27_I2C_SCL3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT27_I2C_SCL3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XDVFS1, GPIO_FN_PORT27_I2C_SCL2, GPIO_FN_PORT27_I2C_SCL3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT27_IROUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT28_I2C_SDA2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XDVFS2, GPIO_FN_PORT28_I2C_SDA2, GPIO_FN_PORT28_I2C_SDA3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT28_I2C_SDA3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XDVFS2, GPIO_FN_PORT28_I2C_SDA2, GPIO_FN_PORT28_I2C_SDA3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT28_TPU1TO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT28_TPU1TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT29_TPU1TO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT30_VIO_CKOR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT31_IROUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT47_FSICSPDIF	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSICOSLD, GPIO_FN_PORT47_FSICSPDIF,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT49_IRDA_OUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIACK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT49_IROUT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIACK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT53_FSICSPDIF	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBSPDIF, GPIO_FN_PORT53_FSICSPDIF,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT53_IRDA_IN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIASPDIF, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT54_IRDA_FIRSEL	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBCK, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT58_KEYOUT7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A12, GPIO_FN_PORT58_KEYOUT7, GPIO_FN_TPU4TO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT59_KEYOUT6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A13, GPIO_FN_PORT59_KEYOUT6, GPIO_FN_TPU0TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PORT91_RDWR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_CS5A_, GPIO_FN_PORT91_RDWR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PWEN	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_PWM0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM0, GPIO_FN_TCLK1, GPIO_FN_FSO_CFE_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_PWM0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM0_B, GPIO_FN_ADICLK_B, GPIO_FN_AD_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TPU_TO1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TCLK2, GPIO_FN_FSO_CFE_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_PWM1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TPU_TO1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_PWM1, GPIO_FN_TS_SCK, GPIO_FN_DU1_DR5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_PWM1_B, GPIO_FN_IRQ9, GPIO_FN_REMOCON,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TPU_TO2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TCLK3, GPIO_FN_FSO_TOE,$/;"	e	enum:__anond45e39910103
GPIO_FN_PWM2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TPU_TO2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_IETX, GPIO_FN_DU1_DG2, GPIO_FN_REMOCON_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL0_C, GPIO_FN_PWM2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL0_C, GPIO_FN_PWM2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2_B, GPIO_FN_VI1_DATA5, GPIO_FN_MTS_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM3, GPIO_FN_PWM4, GPIO_FN_SSI_SCK3, GPIO_FN_TPU0TO0,$/;"	e	enum:__anond45e39910103
GPIO_FN_PWM3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE33, GPIO_FN_SCIF1_SCK, GPIO_FN_PWM3, GPIO_FN_TCLK2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM3, GPIO_FN_PWM4, GPIO_FN_SSI_SCK3, GPIO_FN_TPU0TO0,$/;"	e	enum:__anond45e39910103
GPIO_FN_PWM4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM5, GPIO_FN_TCLK1_B, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM5_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM5_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM5_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM5_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM5_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD, GPIO_FN_PWM5_B, GPIO_FN_DU1_DR0, GPIO_FN_RIF1_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM5_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM5_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWM6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anone81c64b00103
GPIO_FN_PWM6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_PWM6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL, GPIO_FN_PWM6, GPIO_FN_DU1_DG0, GPIO_FN_HSCIF1_HTX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_PWM6_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM6_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWM6_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWM6_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_PWMFSW0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_PWMFSW0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_PWMFSW0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QCLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QCLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QCPV_QDE	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QCPV_QDE	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QCPV_QDE	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QCPV_QDE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_QCPV_QDE	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QCPV_QDE,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QPOLA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QPOLA	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QPOLA	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QPOLA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE29, GPIO_FN_DU0_DISP, GPIO_FN_QPOLA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_QPOLA	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QPOLA,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QPOLB	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QPOLB	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QPOLB	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QPOLB	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE30, GPIO_FN_DU0_CDE, GPIO_FN_QPOLB,$/;"	e	enum:__anonace1e3530103
GPIO_FN_QPOLB	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QPOLB,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QSTB_QHE	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QSTB_QHE	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QSTB_QHE	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QSTB_QHE	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE, GPIO_FN_CC50_STATE28,$/;"	e	enum:__anonace1e3530103
GPIO_FN_QSTB_QHE	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QSTB_QHE,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QSTH_QHS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QSTH_QHS	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QSTH_QHS	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QSTH_QHS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QSTH_QHS,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QSTVA_QVS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QSTVA_QVS	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QSTVA_QVS	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QSTVA_QVS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QSTVA_QVS,$/;"	e	enum:__anon9923b8340103
GPIO_FN_QSTVB_QVE	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_QSTVB_QVE	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_QSTVB_QVE	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_QSTVB_QVE	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_QSTVB_QVE,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_RDS_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_D0_B, GPIO_FN_TS_SDEN_D, GPIO_FN_FMCLK_C, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RDS_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RDS_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMCLK_B, GPIO_FN_RDS_CLK_B, GPIO_FN_MSIOF0_SS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_CLK_C, GPIO_FN_SCIF3_TXD, GPIO_FN_I2C1_SDA_E,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RDS_CLK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RDS_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF0_D0_B, GPIO_FN_FMCLK_E, GPIO_FN_RDS_CLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_CLK_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_CLK_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_DATA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_DATA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_DATA, GPIO_FN_MSIOF0_SCK, GPIO_FN_IRQ0, GPIO_FN_TS_SDATA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_DATA_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RDS_DATA_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RDS_DATA_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_DATA_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA_B, GPIO_FN_HSCIF1_HRX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_DATA_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RDS_DATA_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RDS_DATA_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_DATA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS4_B, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_RDS_DATA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_DATA_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_DATA_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RDS_DATA_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDS_DATA_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RDWR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_CKO,	GPIO_FN_BS,	GPIO_FN_RDWR,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RDWR_FWE	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_WE0__FWE, GPIO_FN_RDWR_FWE,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_RD_FSC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RD_FSC,		\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RD_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RD_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RD_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RD_WR	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_RD_WR_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RD_WR_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RD_WR_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RD__FSC	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_RD__FSC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_REMOCON	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_REMOCON	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_REMOCON	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_REMOCON	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_PWM1_B, GPIO_FN_IRQ9, GPIO_FN_REMOCON,$/;"	e	enum:__anonace1e3530103
GPIO_FN_REMOCON_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_REMOCON_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_REMOCON_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_REMOCON_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_REMOCON_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_IETX, GPIO_FN_DU1_DG2, GPIO_FN_REMOCON_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_REMOCON_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_REMOCON_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RESETA_N_PU_OFF	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_RESETA_N_PU_OFF,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_RESETA_N_PU_ON	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_RESETA_N_PU_ON,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_RESETOUTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RESETOUTS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RESETOUTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_RESETP_PLAIN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RESETP_PLAIN,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RESETP_PULLUP	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RESETP_PULLUP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RIF0_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SCK_C, GPIO_FN_RIF0_CLK_B, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF0_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_CLK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_D0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_D0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_D0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF0_D0_B, GPIO_FN_FMCLK_E, GPIO_FN_RDS_CLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF0_D0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_D0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_D0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_D0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_D1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_D1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_D1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_TS_SPSYNC_C, GPIO_FN_RIF0_D1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF0_D1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_D1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_D1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_D1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF0_SYNC_B, GPIO_FN_ETH_TXD0_B, GPIO_FN_AUDIO_CLKB,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF0_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF0_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF0_SYNC_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_CLK, GPIO_FN_BPFCLK_B, GPIO_FN_MSIOF0_SS1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD, GPIO_FN_IRQ5, GPIO_FN_DU1_DR1, GPIO_FN_RIF1_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_CLK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_D0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_RXD, GPIO_FN_TS_SDEN, GPIO_FN_DU1_DR6, GPIO_FN_RIF1_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_D0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_D0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_D0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_D0_B, GPIO_FN_TS_SDEN_D, GPIO_FN_FMCLK_C, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_D0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_D0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_D0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_D0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_D1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_TXD, GPIO_FN_TS_SPSYNC, GPIO_FN_DU1_DR7, GPIO_FN_RIF1_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_D1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_D1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_D1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_RIF1_D1_B, GPIO_FN_TS_SPSYNC_D, GPIO_FN_FMIN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_D1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_D1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_D1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_D1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_SYNC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_RIF1_SYNC, GPIO_FN_TPUTO1_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD, GPIO_FN_PWM5_B, GPIO_FN_DU1_DR0, GPIO_FN_RIF1_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_RIF1_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF1_SYNC_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF1_SYNC_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_D0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_D0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_D0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_D0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_D1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_D1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_D1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_D1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF2_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF2_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_D0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_D0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_D0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_D0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_D1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_D1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_SYNC_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_SYNC_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RIF3_SYNC_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RIF3_SYNC_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RMII_CRS_DV	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_CRS_DV,	GPIO_FN_RMII_RX_ER,	GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_CRS_DV	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_LINK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_MDC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_MDC,	GPIO_FN_RMII_TXD1,	GPIO_FN_RMII_MDIO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_MDC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_MDIO	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_MDC,	GPIO_FN_RMII_TXD1,	GPIO_FN_RMII_MDIO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_MDIO	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_REF125CK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_REF125CK,	\/* for GMII *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_REF50CK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_REF50CK,	\/* for RMII *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_REF_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_RXD0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_CRS_DV,	GPIO_FN_RMII_RX_ER,	GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_RXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_RXD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_RXD1,	GPIO_FN_RMII_TX_EN,	GPIO_FN_RMII_TXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_RXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_CRS_DV,	GPIO_FN_RMII_RX_ER,	GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_RX_ER	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_TXD0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_RXD1,	GPIO_FN_RMII_TX_EN,	GPIO_FN_RMII_TXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_TXD0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_TXD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_MDC,	GPIO_FN_RMII_TXD1,	GPIO_FN_RMII_MDIO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_TXD1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMII_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RMII_RXD1,	GPIO_FN_RMII_TX_EN,	GPIO_FN_RMII_TXD0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RMII_TX_EN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RMIN_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RMIN_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RSD_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RSD_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RSD_DATA_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RSD_DATA_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RSO_TOE_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RSO_TOE_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RSPI_CK_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_CK_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RSPI_MISO_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_MOSI_A,	GPIO_FN_RSPI_MISO_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RSPI_MOSI_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_MOSI_A,	GPIO_FN_RSPI_MISO_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RSPI_SSL0_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_SSL0_A,	GPIO_FN_RSPI_SSL1_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RSPI_SSL1_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_SSL0_A,	GPIO_FN_RSPI_SSL1_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RSPI_SSL2_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_SSL2_A,	GPIO_FN_RSPI_SSL3_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RSPI_SSL3_A	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_RSPI_SSL2_A,	GPIO_FN_RSPI_SSL3_A,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_RTS0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_RTS0_N_TANS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RTS1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_RTS1_N_TANS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RTS3x_TANS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RTS3x_TANS,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RTS4n_TANS_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RTS4n_TANS_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RTS4x_TANS_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RTS4x_TANS_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RTS4x_TANS_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RTS4x_TANS_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_RX0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX0_C, GPIO_FN_SDA1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX0_C, GPIO_FN_SDA1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX0_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX0_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_RX1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX1_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX1_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_RX2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_RX2, GPIO_FN_DACK1, GPIO_FN_SCK3,$/;"	e	enum:__anond45e39910103
GPIO_FN_RX2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX2_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX2_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_TX3, GPIO_FN_DREQ1, GPIO_FN_RX3,$/;"	e	enum:__anond45e39910103
GPIO_FN_RX3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX3_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX3_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX3_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX3_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX4_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX4_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX4_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX4_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_RX5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_RX5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_RX5_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_RX5_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SATA_DEVSLP_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SATA_DEVSLP_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SATA_DEVSLP_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SATA_DEVSLP_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCIF0_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD, GPIO_FN_I2C2_SCL_B, GPIO_FN_CAN1_RX, GPIO_FN_MMC_D7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_RXD_B, GPIO_FN_I2C0_SCL_C, GPIO_FN_IERX_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKC_B, GPIO_FN_I2C0_SCL, GPIO_FN_SCIF0_RXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HCTS_N, GPIO_FN_VI0_R6, GPIO_FN_SCIF0_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF0_TXD, GPIO_FN_I2C2_SDA_B, GPIO_FN_CAN1_TX, GPIO_FN_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_COL, GPIO_FN_VI0_VSYNC_N, GPIO_FN_SCIF0_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TPUTO0_B, GPIO_FN_I2C0_SDA, GPIO_FN_SCIF0_TXD_C, GPIO_FN_TPUTO0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF0_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HRTS_N, GPIO_FN_VI0_R7, GPIO_FN_SCIF0_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF1_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_RXD, GPIO_FN_IIC0_SCL, GPIO_FN_DU1_DG6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_RXD_B, GPIO_FN_IIC1_SCL_C, GPIO_FN_VI1_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF1_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE33, GPIO_FN_SCIF1_SCK, GPIO_FN_PWM3, GPIO_FN_TCLK2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIF1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_PWM1_B, GPIO_FN_IRQ9, GPIO_FN_REMOCON,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF1_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_TXD, GPIO_FN_IIC0_SDA, GPIO_FN_DU1_DG7, GPIO_FN_SSI_WS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCIF1_TXD_B, GPIO_FN_IIC1_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT1, GPIO_FN_CC50_STATE36, GPIO_FN_SCIF2_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TXD1_B, GPIO_FN_SSI_WS9, GPIO_FN_SCIF2_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_RXD_C, GPIO_FN_IIC1_SCL_D, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE38, GPIO_FN_SCIF2_SCK, GPIO_FN_IRQ1, GPIO_FN_DU1_DB2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIF2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_REFCLK_B, GPIO_FN_SSI_SCK9, GPIO_FN_SCIF2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_VI0_G6, GPIO_FN_SCIF2_SCK_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_TXD, GPIO_FN_IIC1_SDA, GPIO_FN_DU1_DB1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TX_EN_B, GPIO_FN_SSI_SDATA9, GPIO_FN_SCIF2_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF2_TXD_C, GPIO_FN_IIC1_SDA_D, GPIO_FN_AVB_TXD7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF3_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_CC50_OSCOUT, GPIO_FN_SCIF3_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF3_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_VI0_R2, GPIO_FN_SCIF3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF3_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIF3_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIF3_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE39, GPIO_FN_SCIF3_SCK, GPIO_FN_IRQ2, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIF3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIF3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF3_SCK_B, GPIO_FN_AVB_TX_ER, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF3_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_CLK_C, GPIO_FN_SCIF3_TXD, GPIO_FN_I2C1_SDA_E,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF3_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_VI0_R3, GPIO_FN_SCIF3_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF4_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD, GPIO_FN_PWM5_B, GPIO_FN_DU1_DR0, GPIO_FN_RIF1_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF4_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_TXD_B, GPIO_FN_D5, GPIO_FN_SCIF4_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF4_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_RXD_D, GPIO_FN_AVB_TXD3, GPIO_FN_ADICHS1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF4_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD, GPIO_FN_IRQ5, GPIO_FN_DU1_DR1, GPIO_FN_RIF1_CLK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF4_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF4_TXD_D, GPIO_FN_AVB_TXD4, GPIO_FN_ADICHS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF5_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_RXD, GPIO_FN_I2C2_SCL_C, GPIO_FN_DU1_DR2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF5_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_RXD_B, GPIO_FN_D4, GPIO_FN_I2C3_SDA_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF5_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_MSIOF1_RXD_B, GPIO_FN_SCIF5_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF5_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_TXD, GPIO_FN_SCIF5_TXD, GPIO_FN_I2C2_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF5_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF5_TXD_B, GPIO_FN_D5, GPIO_FN_SCIF4_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF5_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF1_TXD_B, GPIO_FN_SCIF5_TXD_D, GPIO_FN_ADICS_SAMP_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA0_CTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA0_SCK,	GPIO_FN_SCIFA0_CTS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA0_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA0_CTS_, GPIO_FN_FSICOSLDT1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA0_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_RTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA0_RTS,	GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA0_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA0_RTS_, GPIO_FN_FSICOSLDT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA0_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA0_RTS,	GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA0_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA0_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA0_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_RXD, GPIO_FN_TS_SDEN, GPIO_FN_DU1_DR6, GPIO_FN_RIF1_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA0_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA0_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA0_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_HSCIF1_HCTS_N_B, GPIO_FN_SCIFA0_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA0_SCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA0_SCK,	GPIO_FN_SCIFA0_CTS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA0_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO5, GPIO_FN_SCIFA0_SCK, GPIO_FN_FSICOSLDT3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA0_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA0_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA0_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA0_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_TXD, GPIO_FN_TS_SPSYNC, GPIO_FN_DU1_DR7, GPIO_FN_RIF1_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA0_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA0_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA0_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_HSCIF1_HRTS_N_B, GPIO_FN_SCIFA0_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_CTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA1_CTS,	GPIO_FN_SCIFA1_SCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA1_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_CTS_, GPIO_FN_MFG1_IN1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA1_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_CTS_N_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_CTS_N_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA1_RTS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA1_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_RTS_, GPIO_FN_IDIN,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA1_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RTS_N_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RTS_N_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA1_RXD,	GPIO_FN_SCIFA1_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA1_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA1_RXD_B, GPIO_FN_I2C4_SCL_C, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS34, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_SCIFA1_RXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_SCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA1_CTS,	GPIO_FN_SCIFA1_SCK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA1_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_SCK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_PORT226_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SCK6, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_MSIOF1_SYNC_B, GPIO_FN_SCIFA1_SCK_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA1_RXD,	GPIO_FN_SCIFA1_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA1_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_SSI_SDATA6, GPIO_FN_SCIFA1_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA3, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_CTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA2_CTS,	GPIO_FN_SCIFA2_RTS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA2_CTS1_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_CTS1_, GPIO_FN_PORT157_MSIOF2_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_CTS2_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_RTS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA2_CTS,	GPIO_FN_SCIFA2_RTS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA2_RTS1_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_RTS1_, GPIO_FN_PORT156_MSIOF2_SS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_RTS2_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2_, GPIO_FN_VIO2_CLK2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA2_RXD,	GPIO_FN_SCIFA2_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA2_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA2_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA2_RXD1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_RXD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_IIC0_SCL_C, GPIO_FN_DU1_CDE,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA2_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA2_SCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DINT_, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_SCK2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT15, GPIO_FN_SSI_SCK78, GPIO_FN_SCIFA2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_SCK_PORT199	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA2_SCK_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA2_SCK_PORT22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA2_SCK_PORT22, \/* SCIFA2_SCK Port 22\/199 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA2_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA2_RXD,	GPIO_FN_SCIFA2_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA2_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA2_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA2_TXD1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_TXD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_SCIFA2_TXD_B, GPIO_FN_IRQ8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFA3_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA3_CTS_, GPIO_FN_MFG3_IN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA3_CTS_PORT117	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_CTS_PORT117,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_CTS_PORT162	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_CTS_PORT162,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_BBIF1_SS2, GPIO_FN_SCIFA3_RTS_, GPIO_FN_MFG3_OUT1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA3_RTS_PORT105	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_RTS_PORT105, \/* MSEL5CR_8_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_RTS_PORT161	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_RTS_PORT161, \/* MSEL5CR_8_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_SCIFA3_RXD, GPIO_FN_I2C3_SCL_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA3_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA3_RXD, GPIO_FN_MFG3_IN1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA3_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_SCK_B, GPIO_FN_IRQ4, GPIO_FN_D1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA3_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_RXD_PORT159	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_RXD_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_RXD_PORT174	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_RXD_PORT174,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_SCK, GPIO_FN_CAN_DEBUGOUT10,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_SCK_B, GPIO_FN_IRQ4, GPIO_FN_D1, GPIO_FN_SCIFA3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA3_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_SCK_PORT116	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_SCK_PORT116,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_SCK_PORT158	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_SCK_PORT158,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA3_TXD, GPIO_FN_I2C3_SDA_C, GPIO_FN_DU1_DOTCLKOUT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA3_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA3_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA3_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_D2, GPIO_FN_SCIFA3_TXD_B, GPIO_FN_D3, GPIO_FN_I2C3_SCL_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA3_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA3_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA3_TXD_PORT160	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_TXD_PORT160,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA3_TXD_PORT175	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA3_TXD_PORT175,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA4_CTS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA4_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA4_RTS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA4_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA4_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA4_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD, GPIO_FN_IECLK, GPIO_FN_DU1_DG3, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA4_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA4_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA4_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA4_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA4_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA4_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD_D, GPIO_FN_VI1_CLKENB, GPIO_FN_TS_SDATA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA4_RXD_PORT12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_RXD_PORT12, \/* MSEL5CR[12:11] = 00 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_RXD_PORT204	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_RXD_PORT204, \/* MSEL5CR[12:11] = 01 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_RXD_PORT94	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_RXD_PORT94, \/* MSEL5CR[12:11] = 10 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_SCK_PORT205	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_SCK_PORT205,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_SCK_PORT21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_SCK_PORT21, \/* SCIFA4_SCK Port 21\/205 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA4_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA4_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF1_HRTS_N, GPIO_FN_SCIFA4_TXD, GPIO_FN_IERX,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA4_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA4_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA4_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA4_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA4_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA4_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA4_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_B, GPIO_FN_SCIFA4_TXD_D, GPIO_FN_VI1_FIELD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA4_TXD_PORT13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_TXD_PORT13,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_TXD_PORT203	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_TXD_PORT203,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA4_TXD_PORT93	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA4_TXD_PORT93,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA5_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA5_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C2_SCL, GPIO_FN_SCIFA5_RXD, GPIO_FN_DU1_DB6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA5_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA5_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA5_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA5_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA5_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA5_RXD_C, GPIO_FN_IETX_C, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA5_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA5_RXD_D, GPIO_FN_VI1_HSYNC_N, GPIO_FN_TS_SDEN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA5_RXD_PORT10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_RXD_PORT10,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_RXD_PORT207	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_RXD_PORT207, \/* MSEL5CR[15:14] = 01 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_RXD_PORT92	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_RXD_PORT92,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_SCK_PORT206	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_SCK_PORT206,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_SCK_PORT23	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_SCK_PORT23, \/* SCIFA5_SCK Port 23\/206 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA5_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA5_TXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C2_SDA, GPIO_FN_SCIFA5_TXD, GPIO_FN_DU1_DB7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA5_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA5_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA5_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFA5_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFA5_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_I2C3_SDA, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA5_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_I2C4_SDA_B, GPIO_FN_SCIFA5_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFA5_TXD_PORT20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_TXD_PORT20, \/* MSEL5CR[15:14] = 00 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_TXD_PORT208	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_TXD_PORT208,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA5_TXD_PORT91	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA5_TXD_PORT91, \/* MSEL5CR[15:14] = 10 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA6_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA6_SCK,	GPIO_FN_SCIFA6_RXD,	GPIO_FN_SCIFA6_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA6_SCK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA6_SCK,	GPIO_FN_SCIFA6_RXD,	GPIO_FN_SCIFA6_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA6_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA6_SCK,	GPIO_FN_SCIFA6_RXD,	GPIO_FN_SCIFA6_TXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA6_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA6_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA7_CTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA7_CTS_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA7_RTS_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA7_RTS_, GPIO_FN_PORT19_VIO_CKO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA7_RXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA7_TXD,	GPIO_FN_SCIFA7_RXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA7_RXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA7_RXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFA7_TXD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFA7_TXD,	GPIO_FN_SCIFA7_RXD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFA7_TXD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA7_TXD,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SCIFB0_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB0_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB0_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB0_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_RXD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DREQ0_N, GPIO_FN_SCIFB1_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIFB1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_RXD_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_RXD_G	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_SCK_B, GPIO_FN_VI1_DATA1_VI1_B1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_SCK_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_SCK_G	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB1_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB1_TXD_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD_F	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB1_TXD_G	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_CTS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_CTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_RTS_N, GPIO_FN_CAN_DEBUGOUT14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_RTS_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_RTS_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_RXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_RXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_RXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_RXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_RXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_RXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_SCK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_SCK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_SCK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_SCK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_TXD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_TXD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_TXD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_TXD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIFB2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_TXD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB2_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIFB2_TXD_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIFB_CTS_PORT173	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_CTS_PORT173,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_CTS_PORT187	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_CTS_PORT187,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_RTS_PORT172	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_RTS_PORT172,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_RTS_PORT186	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_RTS_PORT186,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_RXD_PORT191	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_RXD_PORT191,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_RXD_PORT3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_RXD_PORT3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_SCK_PORT190	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_SCK_PORT190, \/* MSEL5CR_17_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_SCK_PORT2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_SCK_PORT2, \/* MSEL5CR_17_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_TXD_PORT192	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_TXD_PORT192,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIFB_TXD_PORT4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SCIFB_TXD_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SCIF_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIF_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIF_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_TX, GPIO_FN_CAN0_RX,$/;"	e	enum:__anond45e39910103
GPIO_FN_SCIF_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIF_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCIF_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCIF_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCIF_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCIF_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCIF_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HSCK, GPIO_FN_SCIF_CLK_B, GPIO_FN_AVB_CRS,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCIF_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCIF_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCK0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCK0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_SCK1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCK1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_SCK1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCK1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCK1_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCK1_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCK2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DRACK0, GPIO_FN_SCK2, GPIO_FN_DACK0, GPIO_FN_TX2,$/;"	e	enum:__anond45e39910103
GPIO_FN_SCK3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_RX2, GPIO_FN_DACK1, GPIO_FN_SCK3,$/;"	e	enum:__anond45e39910103
GPIO_FN_SCK3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCK3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCK4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCK4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCK4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCK4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCK4_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCK4_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCK5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCK5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCKZ	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCKZ	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_SCKZ, GPIO_FN_ATACS00_N, GPIO_FN_ETH_LINK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SCKZ_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCKZ_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCKZ_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCKZ_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL0_C, GPIO_FN_PWM2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL0_C, GPIO_FN_PWM2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL1_CIS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL1_CIS_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL1_CIS_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX0_C, GPIO_FN_SCL1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX0_C, GPIO_FN_SCL1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL1_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL1_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL2_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL2_CIS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_CIS_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_CIS_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_CIS_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_CIS_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL2_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL2_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL2_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SCL3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL3_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL3_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL3_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL3_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX1_C, GPIO_FN_SCL4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX1_C, GPIO_FN_SCL4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL4_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ3, GPIO_FN_SCL4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL4_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ3, GPIO_FN_SCL4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL6_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL6_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL6_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL6_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL6_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SCL6_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SCL7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL7_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL7_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL8_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL8_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SCL8_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SCL8_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_SD0_WP, GPIO_FN_ADICLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD0_DATA3, GPIO_FN_SD0_CD, GPIO_FN_SD0_WP,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD, GPIO_FN_SD0_DAT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB1_OVC, GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD, GPIO_FN_SD0_DAT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB1_OVC, GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_DAT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_DAT0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD, GPIO_FN_SD0_DAT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_DAT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_DAT1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_DAT1, GPIO_FN_SD0_DAT2, GPIO_FN_SD0_DAT3,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_DAT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_DAT2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_DAT1, GPIO_FN_SD0_DAT2, GPIO_FN_SD0_DAT3,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_DAT3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_DAT3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_DAT1, GPIO_FN_SD0_DAT2, GPIO_FN_SD0_DAT3,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_DATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_DATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_DATA0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_SD0_DATA1, GPIO_FN_SD0_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_DATA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_DATA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_DATA1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_SD0_DATA1, GPIO_FN_SD0_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_DATA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_DATA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_DATA2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD0_DATA0, GPIO_FN_SD0_DATA1, GPIO_FN_SD0_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_DATA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_DATA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_DATA3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD0_DATA3, GPIO_FN_SD0_CD, GPIO_FN_SD0_WP,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_SD0_WP, GPIO_FN_ADICLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD0_DATA3, GPIO_FN_SD0_CD, GPIO_FN_SD0_WP,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_CD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_CD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_CD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_CD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_CAN0_RX, GPIO_FN_SD1_WP, GPIO_FN_IRQ7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CLK, GPIO_FN_SD1_CMD, GPIO_FN_SD1_DATA0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_CMD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_CMD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_CMD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_CMD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CLK, GPIO_FN_SD1_CMD, GPIO_FN_SD1_DATA0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_DAT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_DAT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_DAT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_DAT3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_DATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_DATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_DATA0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CLK, GPIO_FN_SD1_CMD, GPIO_FN_SD1_DATA0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_SD1_DATA2, GPIO_FN_SD1_DATA3,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_DATA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_DATA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_DATA2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_SD1_DATA2, GPIO_FN_SD1_DATA3,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_DATA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_DATA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_DATA3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_DATA1, GPIO_FN_SD1_DATA2, GPIO_FN_SD1_DATA3,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD1_WP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD1_WP	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD1_WP	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD1_WP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_CAN0_RX, GPIO_FN_SD1_WP, GPIO_FN_IRQ7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_CD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_CD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_CD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_CD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D5, GPIO_FN_SD2_WP, GPIO_FN_MMC_D6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_CD_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_CD_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_CD_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_CD_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CLK, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_CMD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_CMD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_CMD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_CMD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CMD, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_CMD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_CMD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_DAT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_DAT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_DAT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_DAT3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_DAT4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_DAT4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_DAT5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_DAT5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_DAT6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_DAT6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_DAT7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_DAT7,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_DATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_DATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_DATA0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CMD, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_DATA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_DATA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_DATA1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_DATA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_DATA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_DATA2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_DATA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_DATA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_DATA3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MMC_D3, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_WP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD2_WP	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SD2_WP	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SD2_WP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SD2_CD, GPIO_FN_MMC_D5, GPIO_FN_SD2_WP, GPIO_FN_MMC_D6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SD2_WP_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_WP_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD2_WP_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD2_WP_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_CD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_CD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_CD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_CMD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_CMD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_CMD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_DAT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_DAT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_DAT2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_DAT3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_DS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_DS,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SD3_WP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SD3_WP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SD3_WP,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA1_CIS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA1_CIS_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA1_CIS_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_RX0_C, GPIO_FN_SDA1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_RX0_C, GPIO_FN_SDA1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA1_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA1_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA2_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA2_CIS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_CIS_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_CIS_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_CIS_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_CIS_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA2_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA2_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA2_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA3_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA3_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA3_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA3_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA4_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA4_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA6_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA6_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA6_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA6_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA6_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDA6_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDA7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA7_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA7_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA8_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA8_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDA8_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SDA8_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SDATA	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SDATA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_SDATA, GPIO_FN_ATAG0_N, GPIO_FN_ETH_RXD0_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SDATA_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDATA_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDATA_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SDATA_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SDENC_CPG	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDENC_CPG,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDENC_DV_CLKI	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDENC_DV_CLKI,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_CD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_D3,	GPIO_FN_SDHI0_CD,	GPIO_FN_SDHI0_WP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_CMD,	GPIO_FN_SDHI0_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_CMD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_CMD,	GPIO_FN_SDHI0_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_D0,	GPIO_FN_SDHI0_D1,	GPIO_FN_SDHI0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_D0,	GPIO_FN_SDHI0_D1,	GPIO_FN_SDHI0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_D0,	GPIO_FN_SDHI0_D1,	GPIO_FN_SDHI0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_D3,	GPIO_FN_SDHI0_CD,	GPIO_FN_SDHI0_WP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI0_VCCQ_MC0_OFF	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHI0_VCCQ_MC0_OFF,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHI0_VCCQ_MC0_ON	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHI0_VCCQ_MC0_ON,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHI0_WP	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI0_D3,	GPIO_FN_SDHI0_CD,	GPIO_FN_SDHI0_WP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_CD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_D3,	GPIO_FN_SDHI1_CD,	GPIO_FN_SDHI1_WP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_CMD,	GPIO_FN_SDHI1_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_CMD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_CMD,	GPIO_FN_SDHI1_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_D0,	GPIO_FN_SDHI1_D1,	GPIO_FN_SDHI1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_D0,	GPIO_FN_SDHI1_D1,	GPIO_FN_SDHI1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_D0,	GPIO_FN_SDHI1_D1,	GPIO_FN_SDHI1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_D3,	GPIO_FN_SDHI1_CD,	GPIO_FN_SDHI1_WP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI1_WP	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI1_D3,	GPIO_FN_SDHI1_CD,	GPIO_FN_SDHI1_WP,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_CD_PORT202	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_CD_PORT202,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_CD_PORT24	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_CD_PORT24, \/* MSEL5CR_19_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_D3,	GPIO_FN_SDHI2_CLK,	GPIO_FN_SDHI2_CMD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_CMD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_D3,	GPIO_FN_SDHI2_CLK,	GPIO_FN_SDHI2_CMD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_D0,	GPIO_FN_SDHI2_D1,	GPIO_FN_SDHI2_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_D0,	GPIO_FN_SDHI2_D1,	GPIO_FN_SDHI2_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_D0,	GPIO_FN_SDHI2_D1,	GPIO_FN_SDHI2_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_D3,	GPIO_FN_SDHI2_CLK,	GPIO_FN_SDHI2_CMD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_WP_PORT177	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_WP_PORT177, \/* MSEL5CR_19_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHI2_WP_PORT25	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SDHI2_WP_PORT25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SDHICD0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICD0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICD0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICD0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICLK0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICLK0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICLK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICLK1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICLK2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICLK2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICMD0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICMD0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICMD0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICMD0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICMD1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICMD1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICMD1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICMD1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICMD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICMD2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHICMD2_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHICMD2_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_2_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_2_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID0_3_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID0_3_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_2_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_2_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID1_3_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_3_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_1_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_1_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_2_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_2_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHID2_3_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_3_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHIWP0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHIWP0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SDHIWP0_PU	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHIWP0_PU,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SIM0_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SIM0_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SIM0_CLK_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_CLK_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_CLK_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_CLK_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_CLK_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_CLK_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SIM0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SIM0_D_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_D_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_D_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_D_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SIM0_D_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SIM0_D_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_D_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_D_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_D_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_D_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_D_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_D_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_RST	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_RST	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SIM0_RST	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SIM0_RST_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_RST_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_RST_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_RST_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SIM0_RST_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SIM0_RST_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_RST_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_RST_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SIM0_RST_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_RST_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM0_RST_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SIM0_RST_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SIM_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SIM_RST,	GPIO_FN_SIM_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SIM_CLK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SIM_D	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SIM_D_PORT199	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SIM_D_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SIM_D_PORT22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SIM_D_PORT22, \/* SIM_D  Port 22\/199 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SIM_RST	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_SIM_RST,	GPIO_FN_SIM_CLK,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_SIM_RST	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_SI_SCK9_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SI_SCK9_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SPCLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SPCLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A20, GPIO_FN_SPCLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SPCLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,$/;"	e	enum:__anond45e39910103
GPIO_FN_SPCLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A20, GPIO_FN_SPCLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SPCLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SPCLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SPEEDIN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SPEEDIN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SPEEDIN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SPEEDIN_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SPEEDIN_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SPEEDIN_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SPEEDIN_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SPEEDIN_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SPEEDIN_B, GPIO_FN_VSP_B, GPIO_FN_HSCIF1_HCTS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SPEEDIN_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SPEEDIN_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SPV_EVEN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SPV_EVEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SPV_EVEN,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SS1_SDATA2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SS1_SDATA2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK0129	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK0129	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK0129	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK0129	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK0129, GPIO_FN_MSIOF1_RXD_B, GPIO_FN_SCIF5_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK0129_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK0129_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DACK2, GPIO_FN_ETH_MDIO_B, GPIO_FN_SSI_SCK1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SCK1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD, GPIO_FN_IECLK, GPIO_FN_DU1_DG3, GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SCK1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_HSCIF1_HTX_B, GPIO_FN_VI1_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SCK2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK2_B, GPIO_FN_CAN_DEBUGOUT0, GPIO_FN_CC50_STATE35,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SCK2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM3, GPIO_FN_PWM4, GPIO_FN_SSI_SCK3, GPIO_FN_TPU0TO0,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSI_SCK34	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK34	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK34	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK34	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_MSIOF1_SYNC_B, GPIO_FN_SCIFA1_SCK_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_TPU0TO3, GPIO_FN_SSI_WS4,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADICHS2_B, GPIO_FN_CAN1_TX_C, GPIO_FN_DREQ2_N, GPIO_FN_SSI_SCK4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK4_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_C, GPIO_FN_SSI_SCK4_B, GPIO_FN_CAN_DEBUGOUT6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SCK5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SCK5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK5_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_TXD5, GPIO_FN_SSI_SCK5_B, GPIO_FN_ETH_TXD1, GPIO_FN_VI0_G7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK5_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SCK6, GPIO_FN_SCIFA1_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK6_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF3_SCK_B, GPIO_FN_AVB_TX_ER, GPIO_FN_SSI_SCK6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK78	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK78	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK78	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK78	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT15, GPIO_FN_SSI_SCK78, GPIO_FN_SCIFA2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK78_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK78_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK78_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK78_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKA_B, GPIO_FN_AVB_MDIO, GPIO_FN_SSI_SCK78_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK78_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SCK9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_REFCLK_B, GPIO_FN_SSI_SCK9, GPIO_FN_SCIF2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SCK9_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SCK9_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SCK9_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SCK9_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SCK9_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK9_B, GPIO_FN_USB0_OVC1, GPIO_FN_CAN_DEBUGOUT3,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AD_DO_B, GPIO_FN_SSI_SDATA0, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RX_ER_B, GPIO_FN_SSI_SDATA1, GPIO_FN_HSCIF1_HRX_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_SSI_SDATA1_B, GPIO_FN_CAN_TXCLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SDATA1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SDATA2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA2, GPIO_FN_HSCIF1_HRTS_N_B, GPIO_FN_SCIFA0_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC1_SCL, GPIO_FN_DU1_DB0, GPIO_FN_SSI_SDATA2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_WS3, GPIO_FN_TPU0TO1, GPIO_FN_SSI_SDATA3, GPIO_FN_TPU0TO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA3, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_SCIFA1_TXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_AUDIO_CLKOUT,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_SIG, GPIO_FN_IECLK_B, GPIO_FN_IRD_RX, GPIO_FN_SSI_SDATA4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA4_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKC_C, GPIO_FN_SSI_SDATA4_B, GPIO_FN_CAN_DEBUGOUT8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_SSI_SDATA5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SDATA5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_SDATA5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA5_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA5_B, GPIO_FN_ETH_MAGIC, GPIO_FN_VI0_R1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA5_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_SSI_SDATA6, GPIO_FN_SCIFA1_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA6_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA_E, GPIO_FN_AVB_MDC, GPIO_FN_SSI_SDATA6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_SCIFA2_TXD_B, GPIO_FN_IRQ8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA7_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SCL_E, GPIO_FN_AVB_MAGIC, GPIO_FN_SSI_SDATA7_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA7_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_DAT, GPIO_FN_IERX_B, GPIO_FN_IRD_SCK, GPIO_FN_SSI_SDATA8,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA8_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA8_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA8_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA8_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_E, GPIO_FN_AVB_PHY_INT, GPIO_FN_SSI_SDATA8_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA8_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_SDATA9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TX_EN_B, GPIO_FN_SSI_SDATA9, GPIO_FN_SCIF2_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA9_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_SDATA9_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_SDATA9_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_SSI_SDATA9_B, GPIO_FN_TANS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_SDATA9_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_SDATA9_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS0129	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS0129	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS0129	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS0129	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ADIDATA_B, GPIO_FN_AD_DI_B, GPIO_FN_PCMWE_N, GPIO_FN_SSI_WS0129,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS0129_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS0129_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS1, GPIO_FN_SCIF1_TXD_B, GPIO_FN_IIC1_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_SSI_WS1_B, GPIO_FN_CAN_STEP0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS2, GPIO_FN_HSCIF1_HCTS_N_B, GPIO_FN_SCIFA0_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS2_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_TXD, GPIO_FN_IIC0_SDA, GPIO_FN_DU1_DG7, GPIO_FN_SSI_WS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_WS3, GPIO_FN_TPU0TO1, GPIO_FN_SSI_SDATA3, GPIO_FN_TPU0TO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSI_WS34	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS34	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS34	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS34	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS34, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_SCIFA1_RXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_TPU0TO3, GPIO_FN_SSI_WS4,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MLB_CK, GPIO_FN_IETX_B, GPIO_FN_IRD_TX, GPIO_FN_SSI_WS4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS4_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS4_B, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_RDS_DATA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_SCIFA3_RXD, GPIO_FN_I2C3_SCL_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS5_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS5_B, GPIO_FN_ETH_TX_EN, GPIO_FN_VI0_R0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS5_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_SSI_WS6,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS6_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SCL_E, GPIO_FN_AVB_GTX_CLK, GPIO_FN_SSI_WS6_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS78	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS78	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS78	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS78	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IIC0_SDA_C, GPIO_FN_DU1_DISP, GPIO_FN_SSI_WS78,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS78_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS78_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS78_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS78_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AUDIO_CLKB_B, GPIO_FN_AVB_LINK, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS78_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSI_WS9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TXD1_B, GPIO_FN_SSI_WS9, GPIO_FN_SCIF2_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS9_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS9_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSI_WS9_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSI_WS9_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSI_WS9_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS9_B, GPIO_FN_USB0_IDIN, GPIO_FN_CAN_DEBUGOUT4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_SSI_WS9_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_SSI_WS9_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_SSL	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_SSL	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSL	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,$/;"	e	enum:__anond45e39910103
GPIO_FN_SSL	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_SSL_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_SSL_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STATUS0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO2, GPIO_FN_STATUS0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_STATUS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO3, GPIO_FN_STATUS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_STATUS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_GPO4, GPIO_FN_STATUS2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_STM_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STM_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_STM_N, GPIO_FN_ATACS10_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_STMx_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STMx_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STMx_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STMx_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP0_IPCLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPCLK,	GPIO_FN_STP0_IPSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD0,	GPIO_FN_STP0_IPD1,	GPIO_FN_STP0_IPD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD0,	GPIO_FN_STP0_IPD1,	GPIO_FN_STP0_IPD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD0,	GPIO_FN_STP0_IPD1,	GPIO_FN_STP0_IPD2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD3,	GPIO_FN_STP0_IPD4,	GPIO_FN_STP0_IPD5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD3,	GPIO_FN_STP0_IPD4,	GPIO_FN_STP0_IPD5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD3,	GPIO_FN_STP0_IPD4,	GPIO_FN_STP0_IPD5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD6,	GPIO_FN_STP0_IPD7,	GPIO_FN_STP0_IPEN,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPD7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD6,	GPIO_FN_STP0_IPD7,	GPIO_FN_STP0_IPEN,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPEN	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPD6,	GPIO_FN_STP0_IPD7,	GPIO_FN_STP0_IPEN,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP0_IPSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP0_IPCLK,	GPIO_FN_STP0_IPSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPCLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD7,	GPIO_FN_STP1_IPCLK,	GPIO_FN_STP1_IPSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD0_PORT186	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD0_PORT186, \/* MSEL5CR_23_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD0_PORT194	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD0_PORT194, \/* MSEL5CR_23_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD1,	GPIO_FN_STP1_IPD2,	GPIO_FN_STP1_IPD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD1,	GPIO_FN_STP1_IPD2,	GPIO_FN_STP1_IPD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD1,	GPIO_FN_STP1_IPD2,	GPIO_FN_STP1_IPD3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD4,	GPIO_FN_STP1_IPD5,	GPIO_FN_STP1_IPD6,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD4,	GPIO_FN_STP1_IPD5,	GPIO_FN_STP1_IPD6,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD4,	GPIO_FN_STP1_IPD5,	GPIO_FN_STP1_IPD6,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPD7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD7,	GPIO_FN_STP1_IPCLK,	GPIO_FN_STP1_IPSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPEN_PORT187	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPEN_PORT187,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPEN_PORT193	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPEN_PORT193,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP1_IPSYNC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_STP1_IPD7,	GPIO_FN_STP1_IPCLK,	GPIO_FN_STP1_IPSYNC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_STP_IDS_0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IDS_0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IEN_1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IEN_1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IOD_1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IOD_1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISCLK_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISCLK_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISCLK_0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISCLK_0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISCLK_0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISCLK_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISCLK_0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISCLK_0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISCLK_1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISCLK_1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISCLK_1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISCLK_1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISD_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISD_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISD_0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISD_0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISD_0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISD_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISD_0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISD_0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISD_1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISD_1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISD_1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISD_1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISEN_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISEN_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISEN_0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISEN_0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISEN_0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISEN_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISEN_0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISEN_0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISEN_1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISEN_1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISEN_1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISEN_1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISSYNC_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISSYNC_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISSYNC_0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISSYNC_0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISSYNC_0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISSYNC_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_ISSYNC_0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_ISSYNC_0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISSYNC_1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_ISSYNC_1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_ISSYNC_1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_IVCXO27_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_IVCXO27_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_IVCXO27_0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_IVCXO27_0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_IVCXO27_0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_IVCXO27_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_IVCXO27_0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_IVCXO27_0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_IVCXO27_1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_1_B, GPIO_FN_HRX0_F,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_IVCXO27_1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_IVCXO27_1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_IVCXO27_1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_OPWM_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_STP_OPWM_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_OPWM_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_OPWM_0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_OPWM_0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_OPWM_0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_OPWM_0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_OPWM_0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_OPWM_0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_OPWM_0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_STP_OPWM_0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_STP_OPWM_0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_OPWM_0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_OPWM_0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_OPWM_0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_STP_OPWM__C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_STP_OPWM__C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TANS2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_SSI_SDATA9_B, GPIO_FN_TANS2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TCKON	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TCKON,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TCLK1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TCLK1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM0, GPIO_FN_TCLK1, GPIO_FN_FSO_CFE_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_TCLK1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TCLK1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TCLK1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TCLK1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TCLK1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TCLK1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TCLK1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TCLK1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM5, GPIO_FN_TCLK1_B, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN1_RX_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TCLK1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TCLK1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TCLK2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TCLK2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TCLK2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TCLK2, GPIO_FN_FSO_CFE_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_TCLK2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TCLK2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE33, GPIO_FN_SCIF1_SCK, GPIO_FN_PWM3, GPIO_FN_TCLK2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TCLK2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TCLK2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TCLK2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TCLK2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TCLK3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TCLK3, GPIO_FN_FSO_TOE,$/;"	e	enum:__anond45e39910103
GPIO_FN_TPU0TO0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TPU0TO0,	GPIO_FN_TPU0TO1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TPU0TO0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TPU0TO0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_PWM3, GPIO_FN_PWM4, GPIO_FN_SSI_SCK3, GPIO_FN_TPU0TO0,$/;"	e	enum:__anond45e39910103
GPIO_FN_TPU0TO0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TPU0TO0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TPU0TO0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAISLD, GPIO_FN_TPU0TO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU0TO1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TPU0TO0,	GPIO_FN_TPU0TO1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TPU0TO1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TPU0TO1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_WS3, GPIO_FN_TPU0TO1, GPIO_FN_SSI_SDATA3, GPIO_FN_TPU0TO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_TPU0TO1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TPU0TO1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TPU0TO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A13, GPIO_FN_PORT59_KEYOUT6, GPIO_FN_TPU0TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU0TO2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TPU0TO2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_WS3, GPIO_FN_TPU0TO1, GPIO_FN_SSI_SDATA3, GPIO_FN_TPU0TO2,$/;"	e	enum:__anond45e39910103
GPIO_FN_TPU0TO2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TPU0TO2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TPU0TO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU0TO2_PORT202	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TPU0TO2_PORT202,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TPU0TO2_PORT66	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TPU0TO2_PORT66, \/* TPU0TO2 Port 66\/202 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TPU0TO3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TPU0TO3,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TPU0TO3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TPU0TO3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_SSI_SCK4, GPIO_FN_TPU0TO3, GPIO_FN_SSI_WS4,$/;"	e	enum:__anond45e39910103
GPIO_FN_TPU0TO3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TPU0TO3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TPU0TO3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU1TO0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU1TO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU1TO3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_LCD2DISP, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU2TO0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU2TO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU2TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU2TO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU2TO3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU3TO0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU3TO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU3TO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU3TO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIBCK, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU3TO3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_FSIASPDIF, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU4TO0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU4TO0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU4TO1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU4TO2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_A12, GPIO_FN_PORT58_KEYOUT7, GPIO_FN_TPU4TO2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPU4TO3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU4TO3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TPUTO0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TPUTO0_B, GPIO_FN_I2C0_SDA, GPIO_FN_SCIF0_TXD_C, GPIO_FN_TPUTO0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TPUTO0_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TPUTO0_B, GPIO_FN_I2C0_SDA, GPIO_FN_SCIF0_TXD_C, GPIO_FN_TPUTO0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TPUTO1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C4_SDA, GPIO_FN_TPUTO1, GPIO_FN_DU1_DG1, GPIO_FN_HSCIF1_HSCK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TPUTO1_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SDATA_D, GPIO_FN_TPUTO1_B, GPIO_FN_I2C1_SDA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TPUTO1_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR4, GPIO_FN_RIF1_SYNC, GPIO_FN_TPUTO1_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TPU_TO0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TPU_TO0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TPU_TO1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TPU_TO1,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TPU_TO1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_PWM1, GPIO_FN_TPU_TO1,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TPU_TO2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TPU_TO2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TPU_TO2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_PWM2, GPIO_FN_TPU_TO2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TPU_TO3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TPU_TO3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TRACEAUD_FROM_LCDC0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TRACEAUD_FROM_LCDC0,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TRACEAUD_FROM_MEMC	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TRACEAUD_FROM_MEMC,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TRACEAUD_FROM_VIO	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_TRACEAUD_FROM_VIO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_TSIF0_TS_XX1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF0_TS_XX1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF0_TS_XX2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF0_TS_XX2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF0_TS_XX3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF0_TS_XX3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF0_TS_XX4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF0_TS_XX4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF0_TS_XX5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF0_TS_XX5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF1_TS_XX1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF1_TS_XX1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF1_TS_XX2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF1_TS_XX2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF1_TS_XX3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF1_TS_XX3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF1_TS_XX4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF1_TS_XX4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF1_TS_XX5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF1_TS_XX5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF2_TS_XX1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF2_TS_XX1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF2_TS_XX2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF2_TS_XX2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF2_TS_XX3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF2_TS_XX3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF2_TS_XX4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF2_TS_XX4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TSIF2_TS_XX5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TSIF2_TS_XX5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SCK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_PWM1, GPIO_FN_TS_SCK, GPIO_FN_DU1_DR5,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SCK0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SCK0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SCK0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SCK0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SCK0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SCK0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SCK0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SCK0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SCK0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SCK1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SCK1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SCK1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SCK2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SCK3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DINT_, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SCK4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SCK5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SCK_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SCK_C, GPIO_FN_RIF0_CLK_B, GPIO_FN_BPFCLK_E,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SCK_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SCK_D, GPIO_FN_BPFCLK_C, GPIO_FN_MSIOF0_RXD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDAT0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDAT1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDAT1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDAT1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDAT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDAT3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDAT4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDAT5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDATA	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RDS_DATA, GPIO_FN_MSIOF0_SCK, GPIO_FN_IRQ0, GPIO_FN_TS_SDATA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDATA0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDATA0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDATA0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDATA0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDATA0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDATA0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDATA_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD_D, GPIO_FN_VI1_CLKENB, GPIO_FN_TS_SDATA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDATA_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_TS_SDATA_D, GPIO_FN_TPUTO1_B, GPIO_FN_I2C1_SDA,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDEN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_RXD, GPIO_FN_TS_SDEN, GPIO_FN_DU1_DR6, GPIO_FN_RIF1_D0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDEN0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDEN0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDEN0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDEN0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDEN0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDEN0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDEN0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SDEN0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SDEN0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDEN1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SDEN1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDEN1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SDEN2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDEN3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDEN4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDEN5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SDEN_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA5_RXD_D, GPIO_FN_VI1_HSYNC_N, GPIO_FN_TS_SDEN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDEN_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_RIF1_D0_B, GPIO_FN_TS_SDEN_D, GPIO_FN_FMCLK_C, GPIO_FN_RDS_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SDT1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SDT1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA0_TXD, GPIO_FN_TS_SPSYNC, GPIO_FN_DU1_DR7, GPIO_FN_RIF1_D1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SPSYNC0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SPSYNC0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SPSYNC0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SPSYNC0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC0_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SPSYNC0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SPSYNC0_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC0_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC0_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TS_SPSYNC0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TS_SPSYNC0_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC0_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC0_E	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC0_E,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SPSYNC1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TS_SPSYNC1_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC1_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC1_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TS_SPSYNC1_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TS_SPSYNC2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SPSYNC3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SPSYNC4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SPSYNC5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_TS_SPSYNC_C	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_TS_SPSYNC_C, GPIO_FN_RIF0_D1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TS_SPSYNC_D	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_DU1_DR3, GPIO_FN_RIF1_D1_B, GPIO_FN_TS_SPSYNC_D, GPIO_FN_FMIN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_TX0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,$/;"	e	enum:__anond45e39910103
GPIO_FN_TX0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX0_C, GPIO_FN_SCL1_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX0_C, GPIO_FN_SCL1_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX0_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX0_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX0_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX0_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,$/;"	e	enum:__anond45e39910103
GPIO_FN_TX1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX1_C	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX1_C, GPIO_FN_SCL4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX1_C, GPIO_FN_SCL4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX1_D	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX1_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX1_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX1_E	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_TX2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_DRACK0, GPIO_FN_SCK2, GPIO_FN_DACK0, GPIO_FN_TX2,$/;"	e	enum:__anond45e39910103
GPIO_FN_TX2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX2_E	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX2_E	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_TX3, GPIO_FN_DREQ1, GPIO_FN_RX3,$/;"	e	enum:__anond45e39910103
GPIO_FN_TX3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX3_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX3_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX3_D	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX3_D	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_TX4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_TX4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX4_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX4_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX4_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX4_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_TX5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_TX5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_TX5_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_TX5_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_USB0_EXTLP	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB0_EXTLP, GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_CC50_STATE37,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB0_EXTP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB0_IDIN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB0_IDIN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS9_B, GPIO_FN_USB0_IDIN, GPIO_FN_CAN_DEBUGOUT4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB0_OCI	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_USB0_OCI,	GPIO_FN_USB0_PPON,	GPIO_FN_VBUS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_USB0_OVC	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anone81c64b00103
GPIO_FN_USB0_OVC	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_USB0_OVC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB0_OVC1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK9_B, GPIO_FN_USB0_OVC1, GPIO_FN_CAN_DEBUGOUT3,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB0_OVC_VBUS	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB0_PPON	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_USB0_OCI,	GPIO_FN_USB0_PPON,	GPIO_FN_VBUS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_USB0_PWEN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB0_PWEN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anone81c64b00103
GPIO_FN_USB0_PWEN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_USB0_PWEN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB1_EXTP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB1_IDIN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB1_OCI	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_USB1_OCI,	GPIO_FN_USB1_PPON,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_USB1_OVC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB1_OVC	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB1_OVC, GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB1_PPON	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_USB1_OCI,	GPIO_FN_USB1_PPON,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anone81c64b00103
GPIO_FN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,$/;"	e	enum:__anonace1e3530103
GPIO_FN_USB2_EXTP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB2_IDIN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB2_OVC	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB2_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_USB2_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_FN_USB2_PWEN	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_USB2_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_USB2_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_FN_V15_DATA15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_V15_DATA15,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VACK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VACK,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VBUS	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_USB0_OCI,	GPIO_FN_USB0_PPON,	GPIO_FN_VBUS,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VBUS_0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VBUS_0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VI0_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_VSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_CC50_STATE31, GPIO_FN_VI0_CLK, GPIO_FN_AVB_RX_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_TX4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_VSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_TX4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_CLKENB, GPIO_FN_I2C3_SCL,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_CLKENB_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_D0_B0_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D0_B0_C0, GPIO_FN_VI0_D1_B1_C1, GPIO_FN_VI0_D2_B2_C2, GPIO_FN_VI0_D3_B3_C3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D10_G2_Y2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D8_G0_Y0, GPIO_FN_VI0_D9_G1_Y1, GPIO_FN_VI0_D10_G2_Y2, GPIO_FN_VI0_D11_G3_Y3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D11_G3_Y3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D8_G0_Y0, GPIO_FN_VI0_D9_G1_Y1, GPIO_FN_VI0_D10_G2_Y2, GPIO_FN_VI0_D11_G3_Y3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D12_G4_Y4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_CLKENB, GPIO_FN_VI0_D12_G4_Y4, GPIO_FN_VI4_HSYNC, GPIO_FN_VI0_D13_G5_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D13_G5_Y5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_CLKENB, GPIO_FN_VI0_D12_G4_Y4, GPIO_FN_VI4_HSYNC, GPIO_FN_VI0_D13_G5_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D14_G6_Y6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_VSYNC, GPIO_FN_VI0_D14_G6_Y6, GPIO_FN_VI4_D0_C0, GPIO_FN_VI0_D15_G7_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D15_G7_Y7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_VSYNC, GPIO_FN_VI0_D14_G6_Y6, GPIO_FN_VI4_D0_C0, GPIO_FN_VI0_D15_G7_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D16_R0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D1_C1, GPIO_FN_VI0_D16_R0, GPIO_FN_VI1_D12_G4_Y4_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D17_R1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D2_C2, GPIO_FN_VI0_D17_R1, GPIO_FN_VI1_D13_G5_Y5_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D18_R2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D3_C3, GPIO_FN_VI0_D18_R2, GPIO_FN_VI1_D14_G6_Y6_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D19_R3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D4_C4, GPIO_FN_VI0_D19_R3, GPIO_FN_VI1_D15_G7_Y7_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D1_B1_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D0_B0_C0, GPIO_FN_VI0_D1_B1_C1, GPIO_FN_VI0_D2_B2_C2, GPIO_FN_VI0_D3_B3_C3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D20_R4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D5_C5, GPIO_FN_VI0_D20_R4, GPIO_FN_VI2_D12_Y4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D21_R5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D6_C6, GPIO_FN_VI0_D21_R5, GPIO_FN_VI2_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D22_R6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D7_C7, GPIO_FN_VI0_D22_R6, GPIO_FN_VI2_D14_Y6,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D23_R7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D8_Y0, GPIO_FN_VI0_D23_R7, GPIO_FN_VI2_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D2_B2_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D0_B0_C0, GPIO_FN_VI0_D1_B1_C1, GPIO_FN_VI0_D2_B2_C2, GPIO_FN_VI0_D3_B3_C3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D3_B3_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D0_B0_C0, GPIO_FN_VI0_D1_B1_C1, GPIO_FN_VI0_D2_B2_C2, GPIO_FN_VI0_D3_B3_C3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D4_B4_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D4_B4_C4, GPIO_FN_VI0_D5_B5_C5, GPIO_FN_VI0_D6_B6_C6, GPIO_FN_VI0_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D5_B5_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D4_B4_C4, GPIO_FN_VI0_D5_B5_C5, GPIO_FN_VI0_D6_B6_C6, GPIO_FN_VI0_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D6_B6_C6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D4_B4_C4, GPIO_FN_VI0_D5_B5_C5, GPIO_FN_VI0_D6_B6_C6, GPIO_FN_VI0_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D7_B7_C7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D4_B4_C4, GPIO_FN_VI0_D5_B5_C5, GPIO_FN_VI0_D6_B6_C6, GPIO_FN_VI0_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D8_G0_Y0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D8_G0_Y0, GPIO_FN_VI0_D9_G1_Y1, GPIO_FN_VI0_D10_G2_Y2, GPIO_FN_VI0_D11_G3_Y3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_D9_G1_Y1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_D8_G0_Y0, GPIO_FN_VI0_D9_G1_Y1, GPIO_FN_VI0_D10_G2_Y2, GPIO_FN_VI0_D11_G3_Y3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA0_VI0_B0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_AVB_RX_DV, GPIO_FN_VI0_DATA1_VI0_B1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA0_VI0_B0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA0_VI0_B1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA0_VI0_B2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA0_VI0_B4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA0_VI0_B5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA0_VI0_B6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA0_VI0_B7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA0_VI0_B7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA1_VI0_B1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA1_VI0_B1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_AVB_RX_DV, GPIO_FN_VI0_DATA1_VI0_B1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA1_VI0_B1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA2_VI0_B2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA2_VI0_B2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD0, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA2_VI0_B2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA3_VI0_B3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA3_VI0_B3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_DATA3_VI0_B3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_DATA3_VI0_B3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_AVB_RXD2, GPIO_FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA3_VI0_B3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA4_VI0_B4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA4_VI0_B4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_AVB_RXD2, GPIO_FN_VI0_DATA4_VI0_B4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA4_VI0_B4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA5_VI0_B5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA5_VI0_B5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_RXD3, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_AVB_RXD4,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA5_VI0_B5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA6_VI0_B6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA6_VI0_B6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA7_VI0_B7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA6_VI0_B6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA7_VI0_B7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_DATA7_VI0_B7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA7_VI0_B7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_DATA7_VI0_B7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_FIELD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_FIELD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_FIELD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_FIELD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_FIELD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_I2C3_SDA, GPIO_FN_SCIFA5_TXD_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_FIELD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDIO, GPIO_FN_VI0_G0, GPIO_FN_MSIOF2_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_CRS_DV, GPIO_FN_VI0_G1, GPIO_FN_MSIOF2_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RX_ER, GPIO_FN_VI0_G2, GPIO_FN_MSIOF2_SCK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RXD0, GPIO_FN_VI0_G3, GPIO_FN_MSIOF2_SYNC_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_RXD1, GPIO_FN_VI0_G4, GPIO_FN_MSIOF2_SS1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_LINK, GPIO_FN_VI0_G5, GPIO_FN_MSIOF2_SS2_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_REFCLK, GPIO_FN_VI0_G6, GPIO_FN_SCIF2_SCK_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_G7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_G7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_G7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_TXD5, GPIO_FN_SSI_SCK5_B, GPIO_FN_ETH_TXD1, GPIO_FN_VI0_G7,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_G7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_VSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_IECLK_C, GPIO_FN_AVB_RX_ER, GPIO_FN_VI0_HSYNC_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_HSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_WS5_B, GPIO_FN_ETH_TX_EN, GPIO_FN_VI0_R0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SDATA5_B, GPIO_FN_ETH_MAGIC, GPIO_FN_VI0_R1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_TXD0, GPIO_FN_VI0_R2, GPIO_FN_SCIF3_RXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_ETH_MDC, GPIO_FN_VI0_R3, GPIO_FN_SCIF3_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HRX, GPIO_FN_VI0_R4, GPIO_FN_I2C1_SCL_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HTX, GPIO_FN_VI0_R5, GPIO_FN_I2C1_SDA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HCTS_N, GPIO_FN_VI0_R6, GPIO_FN_SCIF0_RXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R6_B, GPIO_FN_VI2_DATA2_VI2_B2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_R7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_R7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_R7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_HSCIF0_HRTS_N, GPIO_FN_VI0_R7, GPIO_FN_SCIF0_TXD_D,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_R7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_VSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI0_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI0_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI0_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI0_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_AVB_COL, GPIO_FN_VI0_VSYNC_N, GPIO_FN_SCIF0_TXD_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI0_VSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_HSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_CLK	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIF1_RXD_B, GPIO_FN_IIC1_SCL_C, GPIO_FN_VI1_CLK,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_HSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA4_RXD_D, GPIO_FN_VI1_CLKENB, GPIO_FN_TS_SDATA_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_CLKENB_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_CLKENB_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_CLKENB_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_CLKENB_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_CLKENB_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_CLK_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_D0_B0_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_VSYNC, GPIO_FN_VI1_D0_B0_C0, GPIO_FN_VI1_D1_B1_C1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D10_G2_Y2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D8_G0_Y0, GPIO_FN_VI1_D9_G1_Y1, GPIO_FN_VI1_D10_G2_Y2,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D11_G3_Y3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D11_G3_Y3, GPIO_FN_VI1_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D12_G4_Y4_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D1_C1, GPIO_FN_VI0_D16_R0, GPIO_FN_VI1_D12_G4_Y4_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D12_G4_Y4_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLKENB, GPIO_FN_VI1_D12_G4_Y4_1, GPIO_FN_VI5_HSYNC, GPIO_FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D13_G5_Y5_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D2_C2, GPIO_FN_VI0_D17_R1, GPIO_FN_VI1_D13_G5_Y5_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D13_G5_Y5_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLKENB, GPIO_FN_VI1_D12_G4_Y4_1, GPIO_FN_VI5_HSYNC, GPIO_FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D14_G6_Y6_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D3_C3, GPIO_FN_VI0_D18_R2, GPIO_FN_VI1_D14_G6_Y6_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D14_G6_Y6_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_VSYNC, GPIO_FN_VI1_D14_G6_Y6_1, GPIO_FN_VI5_D0_C0, GPIO_FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D15_G7_Y7_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D4_C4, GPIO_FN_VI0_D19_R3, GPIO_FN_VI1_D15_G7_Y7_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D15_G7_Y7_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_VSYNC, GPIO_FN_VI1_D14_G6_Y6_1, GPIO_FN_VI5_D0_C0, GPIO_FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D16_R0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D1_C1, GPIO_FN_VI1_D16_R0, GPIO_FN_VI5_D2_C2, GPIO_FN_VI1_D17_R1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D17_R1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D1_C1, GPIO_FN_VI1_D16_R0, GPIO_FN_VI5_D2_C2, GPIO_FN_VI1_D17_R1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D18_R2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D3_C3, GPIO_FN_VI1_D18_R2, GPIO_FN_VI5_D4_C4, GPIO_FN_VI1_D19_R3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D19_R3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D3_C3, GPIO_FN_VI1_D18_R2, GPIO_FN_VI5_D4_C4, GPIO_FN_VI1_D19_R3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D1_B1_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_VSYNC, GPIO_FN_VI1_D0_B0_C0, GPIO_FN_VI1_D1_B1_C1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D20_R4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D5_C5, GPIO_FN_VI1_D20_R4, GPIO_FN_VI5_D6_C6, GPIO_FN_VI1_D21_R5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D21_R5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D5_C5, GPIO_FN_VI1_D20_R4, GPIO_FN_VI5_D6_C6, GPIO_FN_VI1_D21_R5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D22_R6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D7_C7, GPIO_FN_VI1_D22_R6, GPIO_FN_VI5_D8_Y0, GPIO_FN_VI1_D23_R7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D23_R7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D7_C7, GPIO_FN_VI1_D22_R6, GPIO_FN_VI5_D8_Y0, GPIO_FN_VI1_D23_R7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D2_B2_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D2_B2_C2, GPIO_FN_VI1_D3_B3_C3, GPIO_FN_VI1_D4_B4_C4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D3_B3_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D2_B2_C2, GPIO_FN_VI1_D3_B3_C3, GPIO_FN_VI1_D4_B4_C4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D4_B4_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D2_B2_C2, GPIO_FN_VI1_D3_B3_C3, GPIO_FN_VI1_D4_B4_C4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D5_B5_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D5_B5_C5, GPIO_FN_VI1_D6_B6_C6, GPIO_FN_VI1_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D6_B6_C6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D5_B5_C5, GPIO_FN_VI1_D6_B6_C6, GPIO_FN_VI1_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D7_B7_C7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D5_B5_C5, GPIO_FN_VI1_D6_B6_C6, GPIO_FN_VI1_D7_B7_C7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D8_G0_Y0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D8_G0_Y0, GPIO_FN_VI1_D9_G1_Y1, GPIO_FN_VI1_D10_G2_Y2,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_D9_G1_Y1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D8_G0_Y0, GPIO_FN_VI1_D9_G1_Y1, GPIO_FN_VI1_D10_G2_Y2,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_DATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA0, GPIO_FN_CAN0_TX_D, GPIO_FN_AVB_AVTP_MATCH,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA0_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA0_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA0_VI1_B0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA0_VI1_B0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA1, GPIO_FN_SDATA, GPIO_FN_ATAG0_N, GPIO_FN_ETH_RXD0_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA1_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA1_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA1_VI1_B1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA1_VI1_B1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_SCK_B, GPIO_FN_VI1_DATA1_VI1_B1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SSI_SCK2, GPIO_FN_HSCIF1_HTX_B, GPIO_FN_VI1_DATA2,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA2_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA2_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA2_VI1_B2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA2_VI1_B2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA3, GPIO_FN_SCKZ, GPIO_FN_ATACS00_N, GPIO_FN_ETH_LINK_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA3_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA3_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA3_VI1_B3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA3_VI1_B3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_DATA4, GPIO_FN_STM_N, GPIO_FN_ATACS10_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA4_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA4_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA4_VI1_B4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA4_VI1_B4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_PWM2_B, GPIO_FN_VI1_DATA5, GPIO_FN_MTS_N, GPIO_FN_EX_WAIT1,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA5_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA5_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA5_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA5_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA5_VI1_B5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA5_VI1_B5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C3_SCL_E, GPIO_FN_VI1_DATA6, GPIO_FN_ATARD0_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA6_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA6_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA6_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA6_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA6_VI1_B6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA6_VI1_B6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C3_SDA_E, GPIO_FN_VI1_DATA7, GPIO_FN_ATADIR0_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_DATA7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA7_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_DATA7_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_DATA7_VI1_B7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_DATA7_VI1_B7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_FIELD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_FIELD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_FIELD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_D11_G3_Y3, GPIO_FN_VI1_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_FIELD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_FIELD	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_I2C0_SDA_B, GPIO_FN_SCIFA4_TXD_D, GPIO_FN_VI1_FIELD,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_FIELD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_FIELD_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_FIELD_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_FIELD_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_FIELD_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G5_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G5_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G6_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G6_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_G7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_G7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_G7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_CLK, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_HSYNC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SCIFA5_RXD_D, GPIO_FN_VI1_HSYNC_N, GPIO_FN_TS_SDEN_C,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_HSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_HSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_HSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_HSYNC_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_HSYNC_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R0_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R0_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R1_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R1_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R2_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R2_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R3_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R3_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R4_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R4_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R5_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R5_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R6_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R6_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_R7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_R7_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_R7_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI1_VSYNC, GPIO_FN_VI1_D0_B0_C0, GPIO_FN_VI1_D1_B1_C1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI1_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_TS_SPSYNC_C, GPIO_FN_RIF0_D1_B,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VI1_VSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI1_VSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_VSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI1_VSYNC_N_C	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI1_VSYNC_N_C	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_CLK	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_AVB_RX_CLK, GPIO_FN_VI2_CLKENB, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_CLK	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_AVB_RX_CLK, GPIO_FN_VI2_CLKENB, GPIO_FN_AVB_RX_DV,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_CLKENB_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_D0_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D0_C0, GPIO_FN_AVB_RXD2, GPIO_FN_VI2_D1_C1, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D10_Y2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D10_Y2, GPIO_FN_AVB_TXD0, GPIO_FN_VI2_D11_Y3, GPIO_FN_AVB_TXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D11_Y3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D10_Y2, GPIO_FN_AVB_TXD0, GPIO_FN_VI2_D11_Y3, GPIO_FN_AVB_TXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D12_Y4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D5_C5, GPIO_FN_VI0_D20_R4, GPIO_FN_VI2_D12_Y4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D13_Y5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D6_C6, GPIO_FN_VI0_D21_R5, GPIO_FN_VI2_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D14_Y6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D7_C7, GPIO_FN_VI0_D22_R6, GPIO_FN_VI2_D14_Y6,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D15_Y7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D8_Y0, GPIO_FN_VI0_D23_R7, GPIO_FN_VI2_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D1_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D0_C0, GPIO_FN_AVB_RXD2, GPIO_FN_VI2_D1_C1, GPIO_FN_AVB_RXD3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D2_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D2_C2, GPIO_FN_AVB_RXD4, GPIO_FN_VI2_D3_C3, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D3_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D2_C2, GPIO_FN_AVB_RXD4, GPIO_FN_VI2_D3_C3, GPIO_FN_AVB_RXD5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D4_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D4_C4, GPIO_FN_AVB_RXD6, GPIO_FN_VI2_D5_C5, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D5_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D4_C4, GPIO_FN_AVB_RXD6, GPIO_FN_VI2_D5_C5, GPIO_FN_AVB_RXD7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D6_C6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D6_C6, GPIO_FN_AVB_RX_ER, GPIO_FN_VI2_D7_C7, GPIO_FN_AVB_COL,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D7_C7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D6_C6, GPIO_FN_AVB_RX_ER, GPIO_FN_VI2_D7_C7, GPIO_FN_AVB_COL,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D8_Y0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D8_Y0, GPIO_FN_AVB_TXD3, GPIO_FN_VI2_D9_Y1, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_D9_Y1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_D8_Y0, GPIO_FN_AVB_TXD3, GPIO_FN_VI2_D9_Y1, GPIO_FN_AVB_TX_EN,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_DATA0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA0_VI2_B0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA0_VI2_B0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA1_VI2_B1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA1_VI2_B1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA2_VI2_B2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA2_VI2_B2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_R6_B, GPIO_FN_VI2_DATA2_VI2_B2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA3_VI2_B3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA3_VI2_B3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA4_VI2_B4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA4_VI2_B4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA5_VI2_B5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA5_VI2_B5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA6_VI2_B6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA6_VI2_B6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_DATA7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_DATA7_VI2_B7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_DATA7_VI2_B7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_FIELD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_FIELD	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_FIELD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_FIELD, GPIO_FN_AVB_TXD2,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_FIELD	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_FIELD_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_G7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_HSYNC, GPIO_FN_AVB_RXD0, GPIO_FN_VI2_VSYNC, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_HSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_R7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI2_HSYNC, GPIO_FN_AVB_RXD0, GPIO_FN_VI2_VSYNC, GPIO_FN_AVB_RXD1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI2_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI2_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anone81c64b00103
GPIO_FN_VI2_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_VI2_VSYNC_N_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_CLK	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_AVB_TX_CLK, GPIO_FN_VI3_CLKENB, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_CLK, GPIO_FN_AVB_TX_CLK, GPIO_FN_VI3_CLKENB, GPIO_FN_AVB_TXD4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_CLK_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_CLK_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_D0_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D0_C0, GPIO_FN_AVB_TXD7, GPIO_FN_VI3_D1_C1, GPIO_FN_AVB_TX_ER,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D10_Y2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D10_Y2, GPIO_FN_VI3_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D11_Y3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D11_Y3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D12_Y4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D9_Y1, GPIO_FN_VI3_D12_Y4, GPIO_FN_VI4_D10_Y2, GPIO_FN_VI3_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D13_Y5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D9_Y1, GPIO_FN_VI3_D12_Y4, GPIO_FN_VI4_D10_Y2, GPIO_FN_VI3_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D14_Y6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D11_Y3, GPIO_FN_VI3_D14_Y6, GPIO_FN_VI4_FIELD, GPIO_FN_VI3_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D15_Y7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D11_Y3, GPIO_FN_VI3_D14_Y6, GPIO_FN_VI4_FIELD, GPIO_FN_VI3_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D1_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D0_C0, GPIO_FN_AVB_TXD7, GPIO_FN_VI3_D1_C1, GPIO_FN_AVB_TX_ER,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D2_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D2_C2, GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI3_D3_C3, GPIO_FN_AVB_MDC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D3_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D2_C2, GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI3_D3_C3, GPIO_FN_AVB_MDC,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D4_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D4_C4, GPIO_FN_AVB_MDIO, GPIO_FN_VI3_D5_C5, GPIO_FN_AVB_LINK,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D5_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D4_C4, GPIO_FN_AVB_MDIO, GPIO_FN_VI3_D5_C5, GPIO_FN_AVB_LINK,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D6_C6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D6_C6, GPIO_FN_AVB_MAGIC, GPIO_FN_VI3_D7_C7, GPIO_FN_AVB_PHY_INT,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D7_C7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D6_C6, GPIO_FN_AVB_MAGIC, GPIO_FN_VI3_D7_C7, GPIO_FN_AVB_PHY_INT,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D8_Y0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D8_Y0, GPIO_FN_AVB_CRS, GPIO_FN_VI3_D9_Y1, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_D9_Y1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D8_Y0, GPIO_FN_AVB_CRS, GPIO_FN_VI3_D9_Y1, GPIO_FN_AVB_GTXREFCLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_DATA0_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA1_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA2_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA3_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA4_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA5_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA6_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_GLO_I0_B, GPIO_FN_VI3_DATA6_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_DATA7_B	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_FIELD	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_FIELD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_D10_Y2, GPIO_FN_VI3_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_HSYNC, GPIO_FN_AVB_TXD5, GPIO_FN_VI3_VSYNC, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_HSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_SCK_B, GPIO_FN_VI3_HSYNC_N,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI3_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI3_HSYNC, GPIO_FN_AVB_TXD5, GPIO_FN_VI3_VSYNC, GPIO_FN_AVB_TXD6,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI3_VSYNC_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VI4_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_CLK,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_CLKENB, GPIO_FN_VI0_D12_G4_Y4, GPIO_FN_VI4_HSYNC, GPIO_FN_VI0_D13_G5_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_CLKENB,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_D0_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_VSYNC, GPIO_FN_VI0_D14_G6_Y6, GPIO_FN_VI4_D0_C0, GPIO_FN_VI0_D15_G7_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D10_Y2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D9_Y1, GPIO_FN_VI3_D12_Y4, GPIO_FN_VI4_D10_Y2, GPIO_FN_VI3_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D11_Y3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D11_Y3, GPIO_FN_VI3_D14_Y6, GPIO_FN_VI4_FIELD, GPIO_FN_VI3_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D1_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D1_C1, GPIO_FN_VI0_D16_R0, GPIO_FN_VI1_D12_G4_Y4_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D2_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D2_C2, GPIO_FN_VI0_D17_R1, GPIO_FN_VI1_D13_G5_Y5_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D3_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D3_C3, GPIO_FN_VI0_D18_R2, GPIO_FN_VI1_D14_G6_Y6_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D4_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D4_C4, GPIO_FN_VI0_D19_R3, GPIO_FN_VI1_D15_G7_Y7_0,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D5_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D5_C5, GPIO_FN_VI0_D20_R4, GPIO_FN_VI2_D12_Y4,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D6_C6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D6_C6, GPIO_FN_VI0_D21_R5, GPIO_FN_VI2_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D7_C7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D7_C7, GPIO_FN_VI0_D22_R6, GPIO_FN_VI2_D14_Y6,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D8_Y0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D8_Y0, GPIO_FN_VI0_D23_R7, GPIO_FN_VI2_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_D9_Y1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D9_Y1, GPIO_FN_VI3_D12_Y4, GPIO_FN_VI4_D10_Y2, GPIO_FN_VI3_D13_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_DATA0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA0_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA0_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA0_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA10,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA11,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA12,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA13,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA14,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA15,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA16,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA17,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA18,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA19,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA1_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA1_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA1_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA20	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA20,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA21	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA21,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA22	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA22,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA23	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA23,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA2_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA2_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA2_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA3_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA3_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA3_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA3_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA4_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA4_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA4_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA4_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA5_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA5_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA5_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA5_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA6_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA6_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA6_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA6_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA7_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA7_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA7_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA7_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA8,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_DATA9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_DATA9,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_FIELD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_D11_Y3, GPIO_FN_VI3_D14_Y6, GPIO_FN_VI4_FIELD, GPIO_FN_VI3_D15_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_FIELD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_FIELD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_CLKENB, GPIO_FN_VI0_D12_G4_Y4, GPIO_FN_VI4_HSYNC, GPIO_FN_VI0_D13_G5_Y5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_HSYNCx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_HSYNCx,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI4_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI4_VSYNC, GPIO_FN_VI0_D14_G6_Y6, GPIO_FN_VI4_D0_C0, GPIO_FN_VI0_D15_G7_Y7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI4_VSYNCx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI4_VSYNCx,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_CLK	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLKENB, GPIO_FN_VI1_D12_G4_Y4_1, GPIO_FN_VI5_HSYNC, GPIO_FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_CLKENB	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_CLKENB,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_D0_C0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_VSYNC, GPIO_FN_VI1_D14_G6_Y6_1, GPIO_FN_VI5_D0_C0, GPIO_FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D10_Y2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D11_Y3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D1_C1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D1_C1, GPIO_FN_VI1_D16_R0, GPIO_FN_VI5_D2_C2, GPIO_FN_VI1_D17_R1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D2_C2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D1_C1, GPIO_FN_VI1_D16_R0, GPIO_FN_VI5_D2_C2, GPIO_FN_VI1_D17_R1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D3_C3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D3_C3, GPIO_FN_VI1_D18_R2, GPIO_FN_VI5_D4_C4, GPIO_FN_VI1_D19_R3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D4_C4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D3_C3, GPIO_FN_VI1_D18_R2, GPIO_FN_VI5_D4_C4, GPIO_FN_VI1_D19_R3,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D5_C5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D5_C5, GPIO_FN_VI1_D20_R4, GPIO_FN_VI5_D6_C6, GPIO_FN_VI1_D21_R5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D6_C6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D5_C5, GPIO_FN_VI1_D20_R4, GPIO_FN_VI5_D6_C6, GPIO_FN_VI1_D21_R5,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D7_C7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D7_C7, GPIO_FN_VI1_D22_R6, GPIO_FN_VI5_D8_Y0, GPIO_FN_VI1_D23_R7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D8_Y0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_D7_C7, GPIO_FN_VI1_D22_R6, GPIO_FN_VI5_D8_Y0, GPIO_FN_VI1_D23_R7,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_D9_Y1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_DATA0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA0,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA1,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA10,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA11,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA12,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA13,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA14,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA2,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA3,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA4,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA5,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA6,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA7,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA8,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_DATA9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_DATA9,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_FIELD	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_FIELD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_FIELD,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_HSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_CLKENB, GPIO_FN_VI1_D12_G4_Y4_1, GPIO_FN_VI5_HSYNC, GPIO_FN_VI1_D13_G5_Y5_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_HSYNCx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_HSYNCx,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VI5_VSYNC	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_VI5_VSYNC, GPIO_FN_VI1_D14_G6_Y6_1, GPIO_FN_VI5_D0_C0, GPIO_FN_VI1_D15_G7_Y7_1,$/;"	e	enum:__anond45e39910103
GPIO_FN_VI5_VSYNCx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VI5_VSYNCx,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VINT	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VINT,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO0_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_CLK,	GPIO_FN_VIO0_FIELD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D0,	GPIO_FN_VIO0_D1,	GPIO_FN_VIO0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D0,	GPIO_FN_VIO0_D1,	GPIO_FN_VIO0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D9,	GPIO_FN_VIO0_D10,	GPIO_FN_VIO0_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D9,	GPIO_FN_VIO0_D10,	GPIO_FN_VIO0_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D12,	GPIO_FN_VIO0_VD,	GPIO_FN_VIO0_HD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D13_PORT22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D13_PORT22, \/* MSEL5CR_27_1 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D13_PORT26	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D13_PORT26, \/* MSEL5CR_27_0 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D14_PORT25	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D14_PORT25,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D14_PORT95	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D14_PORT95,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D15_PORT24	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D15_PORT24,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D15_PORT96	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D15_PORT96,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D0,	GPIO_FN_VIO0_D1,	GPIO_FN_VIO0_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D3,	GPIO_FN_VIO0_D4,	GPIO_FN_VIO0_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D3,	GPIO_FN_VIO0_D4,	GPIO_FN_VIO0_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D3,	GPIO_FN_VIO0_D4,	GPIO_FN_VIO0_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D6,	GPIO_FN_VIO0_D7,	GPIO_FN_VIO0_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D6,	GPIO_FN_VIO0_D7,	GPIO_FN_VIO0_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D6,	GPIO_FN_VIO0_D7,	GPIO_FN_VIO0_D8,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_D9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D9,	GPIO_FN_VIO0_D10,	GPIO_FN_VIO0_D11,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_FIELD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_CLK,	GPIO_FN_VIO0_FIELD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_HD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D12,	GPIO_FN_VIO0_VD,	GPIO_FN_VIO0_HD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO0_VD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO0_D12,	GPIO_FN_VIO0_VD,	GPIO_FN_VIO0_HD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_CLK	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_HD,	GPIO_FN_VIO1_CLK,	GPIO_FN_VIO1_FIELD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D0,	GPIO_FN_VIO1_D1,	GPIO_FN_VIO1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D0,	GPIO_FN_VIO1_D1,	GPIO_FN_VIO1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D0,	GPIO_FN_VIO1_D1,	GPIO_FN_VIO1_D2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D3,	GPIO_FN_VIO1_D4,	GPIO_FN_VIO1_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D3,	GPIO_FN_VIO1_D4,	GPIO_FN_VIO1_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D3,	GPIO_FN_VIO1_D4,	GPIO_FN_VIO1_D5,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D6,	GPIO_FN_VIO1_D7,	GPIO_FN_VIO1_VD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_D7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D6,	GPIO_FN_VIO1_D7,	GPIO_FN_VIO1_VD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_FIELD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_HD,	GPIO_FN_VIO1_CLK,	GPIO_FN_VIO1_FIELD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_HD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_HD,	GPIO_FN_VIO1_CLK,	GPIO_FN_VIO1_FIELD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO1_VD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO1_D6,	GPIO_FN_VIO1_D7,	GPIO_FN_VIO1_VD,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO2_CLK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO2_CLK, GPIO_FN_LCD2D18,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_CLK2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2_, GPIO_FN_VIO2_CLK2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_CLK3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D8, GPIO_FN_PORT138_KEYOUT8, GPIO_FN_VIO2_D0, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D9, GPIO_FN_PORT139_KEYOUT9, GPIO_FN_VIO2_D1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D12, GPIO_FN_PORT142_KEYOUT10, GPIO_FN_VIO2_D4, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO2_D5, GPIO_FN_LCD2D3,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D14, GPIO_FN_PORT144_KEYOUT7, GPIO_FN_VIO2_D6, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_D7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PORT145_LCD2RS, GPIO_FN_VIO2_D7, GPIO_FN_LCD2D5,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_FIELD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_FIELD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, GPIO_FN_LCD2D22,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_FIELD3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, GPIO_FN_PORT217_LCD2DISP,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_HD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO2_HD, GPIO_FN_LCD2D1,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_HD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, GPIO_FN_LCD2D23,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_HD3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_VD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_VD, GPIO_FN_PORT128_LCD2VSYN, GPIO_FN_VIO2_VD, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_VD2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO2_VD3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, GPIO_FN_PORT222_LCD2VSYN,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_CKO	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO_CKO,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO_CKO	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_CKO,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_CKO1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO_CKO1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO_CKO2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO_CKO2,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO_CKO_1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_VIO_CKO_1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_VIO_CLK	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_CLK, GPIO_FN_LCD2DCK, GPIO_FN_PORT146_LCD2WR_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, GPIO_FN_LCD2D10,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT6, GPIO_FN_PORT131_MSIOF2_SS1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D12, GPIO_FN_PORT142_KEYOUT10, GPIO_FN_VIO2_D4, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D13, GPIO_FN_PORT143_KEYOUT11, GPIO_FN_PORT143_KEYOUT6, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D14, GPIO_FN_PORT144_KEYOUT7, GPIO_FN_VIO2_D6, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_LCD2DISP, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT7, GPIO_FN_PORT132_MSIOF2_SS2, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_LCD2D13,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, GPIO_FN_LCD2D14,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, GPIO_FN_LCD2D15,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYOUT8, GPIO_FN_LCD2D16,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYOUT9, GPIO_FN_LCD2D17,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D8, GPIO_FN_PORT138_KEYOUT8, GPIO_FN_VIO2_D0, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_D9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_D9, GPIO_FN_PORT139_KEYOUT9, GPIO_FN_VIO2_D1, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_FIELD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_HD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_HD, GPIO_FN_PORT129_LCD2HSYN, GPIO_FN_PORT129_LCD2CS_, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VIO_VD	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_VIO_VD, GPIO_FN_PORT128_LCD2VSYN, GPIO_FN_VIO2_VD, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_VSP	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_VSP_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VSP_A,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VSP_B	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_SPEEDIN_B, GPIO_FN_VSP_B, GPIO_FN_HSCIF1_HCTS_N,$/;"	e	enum:__anonace1e3530103
GPIO_FN_VSP_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VSP_B,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VSP_C	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VSP_C,$/;"	e	enum:__anon9923b8340103
GPIO_FN_VSP_D	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_FN_VSP_D,$/;"	e	enum:__anon9923b8340103
GPIO_FN_WAIT_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_WAIT_, GPIO_FN_DREQ0,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_WAIT_PORT177	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_WAIT_PORT177,	\/* WAIT Port 90\/177 *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_WAIT_PORT90	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_WAIT_PORT90,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_WE0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_WE0_FWE	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_WE0_FWE,	\/* share with FLCTL *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_WE0_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_WE0_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_WE0_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_WE0_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_A2, GPIO_FN_WE0_N, GPIO_FN_WE1_N, GPIO_FN_DACK0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_WE0__FWE	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_WE0__FWE, GPIO_FN_RDWR_FWE,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_WE1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_WE1,$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_WE1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0,$/;"	e	enum:__anond45e39910103
GPIO_FN_WE1_	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_WE1_,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_WE1_N	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,$/;"	e	enum:__anonfbda8fcf0103
GPIO_FN_WE1_N	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B,$/;"	e	enum:__anone81c64b00103
GPIO_FN_WE1_N	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B,$/;"	e	enum:__anonc0a00e720103
GPIO_FN_WE1_N	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_FN_A2, GPIO_FN_WE0_N, GPIO_FN_WE1_N, GPIO_FN_DACK0,$/;"	e	enum:__anonace1e3530103
GPIO_FN_WE2_ICIORD	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_WE2_ICIORD,	\/* share with PCMCIA *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_WE3_ICIOWR	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_FN_WE3_ICIOWR,	\/* share with PCMCIA *\/$/;"	e	enum:__anonb56c5aca0103
GPIO_FN_XDVFS1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XDVFS1, GPIO_FN_PORT27_I2C_SCL2, GPIO_FN_PORT27_I2C_SCL3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_XDVFS2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XDVFS2, GPIO_FN_PORT28_I2C_SDA2, GPIO_FN_PORT28_I2C_SDA3, \\$/;"	e	enum:__anon8638ecc30103
GPIO_FN_XTAL1L	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_XTAL1L,$/;"	e	enum:__anon8638ecc30103
GPIO_FN_XWUP	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,$/;"	e	enum:__anon8638ecc30103
GPIO_FULLPORT	arch/arm/include/asm/arch-tegra/gpio.h	/^#define GPIO_FULLPORT(/;"	d
GPIO_FUNC_BUTTON	board/buffalo/lsxl/lsxl.h	/^#define GPIO_FUNC_BUTTON	/;"	d
GPIO_FUNC_LED	board/buffalo/lsxl/lsxl.h	/^#define GPIO_FUNC_LED	/;"	d
GPIO_FUNC_RED_LED	board/buffalo/lsxl/lsxl.h	/^#define GPIO_FUNC_RED_LED	/;"	d
GPIO_F_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_F_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_F_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_F_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_GDIR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GPIO_GDIR	/;"	d
GPIO_GETH_SW_DATA	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_GETH_SW_DATA	/;"	d	file:
GPIO_GETH_SW_PIN	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_GETH_SW_PIN	/;"	d	file:
GPIO_GETH_SW_PORT	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_GETH_SW_PORT	/;"	d	file:
GPIO_GFN	include/sh_pfc.h	/^#define GPIO_GFN(/;"	d
GPIO_GFN_A0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A10,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A11,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A12,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A13,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A14,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A15,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A16,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A17,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A18,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A19,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A5,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A6,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A7,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A8,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_A9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_A9,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AUDIO_CLKA_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AUDIO_CLKA_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AUDIO_CLKB_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AUDIO_CLKB_B,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AVB_AVTP_CAPTURE_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AVB_AVTP_CAPTURE_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AVB_AVTP_MATCH_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AVB_AVTP_MATCH_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AVB_LINK,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AVB_MAGIC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AVB_MDC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_AVB_PHY_INT,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_BSx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_BSx,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_CS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_CS0x,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_CS1x_A26	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_CS1x_A26,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_CTS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_CTS0x,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_CTS1x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_CTS1x,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D10,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D11,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D12,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D13,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D14,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D15,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D5,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D6,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D7,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D8,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_D9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_D9,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_EX_WAIT0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_EX_WAIT0_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_HCTS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_HCTS0x,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_HRTS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_HRTS0x,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_HRX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_HRX0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_HSCK0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_HSCK0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_HTX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_HTX0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_IRQ0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_IRQ1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_IRQ2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_IRQ3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_IRQ3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_IRQ4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_IRQ4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_IRQ5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_IRQ5,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_MLB_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_MLB_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_MLB_DAT	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_MLB_DAT,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_MLB_SIG	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_MLB_SIG,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_MSIOF0_SS1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_MSIOF0_SS2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_MSIOF0_SYNC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_PWM0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_PWM0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_PWM1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_PWM1_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_PWM2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_PWM2_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RD_WRx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RD_WRx,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RDx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RDx,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RTS0x_TANS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RTS0x_TANS,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RTS1x_TANS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RTS1x_TANS,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RX0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RX1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RX1_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_RX2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_RX2_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SCK0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SCK0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SCK2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SCK2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_CD,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_CMD,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD0_WP,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_CD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_CD,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_CMD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_CMD,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD1_WP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD1_WP,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD2_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD2_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD2_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD2_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD2_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD2_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD2_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD2_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD2_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD2_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD2_DS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD2_DS,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD3_DAT4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD3_DAT4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD3_DAT5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD3_DAT5,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD3_DAT6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD3_DAT6,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SD3_DAT7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SD3_DAT7,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SCK0129	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SCK0129,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SCK34	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SCK34,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SCK4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SCK6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SCK6,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SCK78	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SCK78,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA1_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA2_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA3,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA6,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA7,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA8,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_SDATA9_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_SDATA9_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_WS0129	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_WS0129,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_WS34	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_WS34,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_WS4,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_WS6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_WS6,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_SSI_WS78	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_SSI_WS78,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_TX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_TX0,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_TX1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_TX1_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_TX2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_TX2_A,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB0_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB0_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB0_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB0_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB1_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB1_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB1_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB30_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB30_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB30_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB30_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB31_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB31_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_USB31_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_USB31_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_WE0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_WE0x,$/;"	e	enum:__anon9923b8340103
GPIO_GFN_WE1x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GFN_WE1x,$/;"	e	enum:__anon9923b8340103
GPIO_GIUS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_GIUS /;"	d
GPIO_GPCTR0_DBR_MASK	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_DBR_MASK	/;"	d	file:
GPIO_GPCTR0_DBR_SHIFT	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_DBR_SHIFT	/;"	d	file:
GPIO_GPCTR0_IOTR_CMD_0UTPUT	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_IOTR_CMD_0UTPUT	/;"	d	file:
GPIO_GPCTR0_IOTR_CMD_INPUT	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_IOTR_CMD_INPUT	/;"	d	file:
GPIO_GPCTR0_IOTR_MASK	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_IOTR_MASK	/;"	d	file:
GPIO_GPCTR0_ITR_CMD_BOTH_EDGE	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE	/;"	d	file:
GPIO_GPCTR0_ITR_CMD_FALLING_EDGE	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE	/;"	d	file:
GPIO_GPCTR0_ITR_CMD_RISING_EDGE	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE	/;"	d	file:
GPIO_GPCTR0_ITR_MASK	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_ITR_MASK	/;"	d	file:
GPIO_GPCTR0_ITR_SHIFT	drivers/gpio/kona_gpio.c	/^#define GPIO_GPCTR0_ITR_SHIFT	/;"	d	file:
GPIO_GPIO	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_GPIO	/;"	d
GPIO_GPIO	include/SA-1100.h	/^#define GPIO_GPIO(/;"	d
GPIO_GPIO0	include/SA-1100.h	/^#define GPIO_GPIO0	/;"	d
GPIO_GPIO1	include/SA-1100.h	/^#define GPIO_GPIO1	/;"	d
GPIO_GPIO10	include/SA-1100.h	/^#define GPIO_GPIO10	/;"	d
GPIO_GPIO11	include/SA-1100.h	/^#define GPIO_GPIO11	/;"	d
GPIO_GPIO12	include/SA-1100.h	/^#define GPIO_GPIO12	/;"	d
GPIO_GPIO13	include/SA-1100.h	/^#define GPIO_GPIO13	/;"	d
GPIO_GPIO14	include/SA-1100.h	/^#define GPIO_GPIO14	/;"	d
GPIO_GPIO15	include/SA-1100.h	/^#define GPIO_GPIO15	/;"	d
GPIO_GPIO16	include/SA-1100.h	/^#define GPIO_GPIO16	/;"	d
GPIO_GPIO17	include/SA-1100.h	/^#define GPIO_GPIO17	/;"	d
GPIO_GPIO18	include/SA-1100.h	/^#define GPIO_GPIO18	/;"	d
GPIO_GPIO19	include/SA-1100.h	/^#define GPIO_GPIO19	/;"	d
GPIO_GPIO2	include/SA-1100.h	/^#define GPIO_GPIO2	/;"	d
GPIO_GPIO20	include/SA-1100.h	/^#define GPIO_GPIO20	/;"	d
GPIO_GPIO21	include/SA-1100.h	/^#define GPIO_GPIO21	/;"	d
GPIO_GPIO22	include/SA-1100.h	/^#define GPIO_GPIO22	/;"	d
GPIO_GPIO23	include/SA-1100.h	/^#define GPIO_GPIO23	/;"	d
GPIO_GPIO24	include/SA-1100.h	/^#define GPIO_GPIO24	/;"	d
GPIO_GPIO25	include/SA-1100.h	/^#define GPIO_GPIO25	/;"	d
GPIO_GPIO26	include/SA-1100.h	/^#define GPIO_GPIO26	/;"	d
GPIO_GPIO27	include/SA-1100.h	/^#define GPIO_GPIO27	/;"	d
GPIO_GPIO3	include/SA-1100.h	/^#define GPIO_GPIO3	/;"	d
GPIO_GPIO4	include/SA-1100.h	/^#define GPIO_GPIO4	/;"	d
GPIO_GPIO5	include/SA-1100.h	/^#define GPIO_GPIO5	/;"	d
GPIO_GPIO6	include/SA-1100.h	/^#define GPIO_GPIO6	/;"	d
GPIO_GPIO7	include/SA-1100.h	/^#define GPIO_GPIO7	/;"	d
GPIO_GPIO8	include/SA-1100.h	/^#define GPIO_GPIO8	/;"	d
GPIO_GPIO9	include/SA-1100.h	/^#define GPIO_GPIO9	/;"	d
GPIO_GPPWR_OFFSET	drivers/gpio/kona_gpio.c	/^#define GPIO_GPPWR_OFFSET	/;"	d	file:
GPIO_GP_0_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_23	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_24	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_25	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_26	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_26	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_27	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_27	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_27	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_27	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_27	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_28	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_28	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_28	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_28,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_28	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_28	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_29	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_29	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_29	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_29	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_30	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_30	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_30	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_30	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_31	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_31	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_31	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_31	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_0_9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_0_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_0_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_0_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_0_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_0_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_10_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_0, GPIO_GP_10_1, GPIO_GP_10_2, GPIO_GP_10_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_0, GPIO_GP_10_1, GPIO_GP_10_2, GPIO_GP_10_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_8, GPIO_GP_10_9, GPIO_GP_10_10, GPIO_GP_10_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_8, GPIO_GP_10_9, GPIO_GP_10_10, GPIO_GP_10_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_12, GPIO_GP_10_13, GPIO_GP_10_14, GPIO_GP_10_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_12, GPIO_GP_10_13, GPIO_GP_10_14, GPIO_GP_10_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_12, GPIO_GP_10_13, GPIO_GP_10_14, GPIO_GP_10_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_12, GPIO_GP_10_13, GPIO_GP_10_14, GPIO_GP_10_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_16, GPIO_GP_10_17, GPIO_GP_10_18, GPIO_GP_10_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_16, GPIO_GP_10_17, GPIO_GP_10_18, GPIO_GP_10_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_16, GPIO_GP_10_17, GPIO_GP_10_18, GPIO_GP_10_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_16, GPIO_GP_10_17, GPIO_GP_10_18, GPIO_GP_10_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_0, GPIO_GP_10_1, GPIO_GP_10_2, GPIO_GP_10_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_20, GPIO_GP_10_21, GPIO_GP_10_22, GPIO_GP_10_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_20, GPIO_GP_10_21, GPIO_GP_10_22, GPIO_GP_10_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_20, GPIO_GP_10_21, GPIO_GP_10_22, GPIO_GP_10_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_23	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_20, GPIO_GP_10_21, GPIO_GP_10_22, GPIO_GP_10_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_24	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_24, GPIO_GP_10_25, GPIO_GP_10_26, GPIO_GP_10_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_25	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_24, GPIO_GP_10_25, GPIO_GP_10_26, GPIO_GP_10_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_26	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_24, GPIO_GP_10_25, GPIO_GP_10_26, GPIO_GP_10_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_27	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_24, GPIO_GP_10_25, GPIO_GP_10_26, GPIO_GP_10_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_28	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_28, GPIO_GP_10_29, GPIO_GP_10_30, GPIO_GP_10_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_29	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_28, GPIO_GP_10_29, GPIO_GP_10_30, GPIO_GP_10_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_0, GPIO_GP_10_1, GPIO_GP_10_2, GPIO_GP_10_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_30	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_28, GPIO_GP_10_29, GPIO_GP_10_30, GPIO_GP_10_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_31	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_28, GPIO_GP_10_29, GPIO_GP_10_30, GPIO_GP_10_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_4, GPIO_GP_10_5, GPIO_GP_10_6, GPIO_GP_10_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_4, GPIO_GP_10_5, GPIO_GP_10_6, GPIO_GP_10_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_4, GPIO_GP_10_5, GPIO_GP_10_6, GPIO_GP_10_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_4, GPIO_GP_10_5, GPIO_GP_10_6, GPIO_GP_10_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_8, GPIO_GP_10_9, GPIO_GP_10_10, GPIO_GP_10_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_10_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_10_8, GPIO_GP_10_9, GPIO_GP_10_10, GPIO_GP_10_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_0, GPIO_GP_11_1, GPIO_GP_11_2, GPIO_GP_11_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_0, GPIO_GP_11_1, GPIO_GP_11_2, GPIO_GP_11_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_8, GPIO_GP_11_9, GPIO_GP_11_10, GPIO_GP_11_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_8, GPIO_GP_11_9, GPIO_GP_11_10, GPIO_GP_11_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_12, GPIO_GP_11_13, GPIO_GP_11_14, GPIO_GP_11_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_12, GPIO_GP_11_13, GPIO_GP_11_14, GPIO_GP_11_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_12, GPIO_GP_11_13, GPIO_GP_11_14, GPIO_GP_11_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_12, GPIO_GP_11_13, GPIO_GP_11_14, GPIO_GP_11_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_16, GPIO_GP_11_17, GPIO_GP_11_18, GPIO_GP_11_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_16, GPIO_GP_11_17, GPIO_GP_11_18, GPIO_GP_11_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_16, GPIO_GP_11_17, GPIO_GP_11_18, GPIO_GP_11_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_16, GPIO_GP_11_17, GPIO_GP_11_18, GPIO_GP_11_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_0, GPIO_GP_11_1, GPIO_GP_11_2, GPIO_GP_11_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_20, GPIO_GP_11_21, GPIO_GP_11_22, GPIO_GP_11_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_20, GPIO_GP_11_21, GPIO_GP_11_22, GPIO_GP_11_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_20, GPIO_GP_11_21, GPIO_GP_11_22, GPIO_GP_11_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_23	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_20, GPIO_GP_11_21, GPIO_GP_11_22, GPIO_GP_11_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_24	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_24, GPIO_GP_11_25, GPIO_GP_11_26, GPIO_GP_11_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_25	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_24, GPIO_GP_11_25, GPIO_GP_11_26, GPIO_GP_11_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_26	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_24, GPIO_GP_11_25, GPIO_GP_11_26, GPIO_GP_11_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_27	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_24, GPIO_GP_11_25, GPIO_GP_11_26, GPIO_GP_11_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_28	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_28, GPIO_GP_11_29,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_29	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_28, GPIO_GP_11_29,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_0, GPIO_GP_11_1, GPIO_GP_11_2, GPIO_GP_11_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_4, GPIO_GP_11_5, GPIO_GP_11_6, GPIO_GP_11_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_4, GPIO_GP_11_5, GPIO_GP_11_6, GPIO_GP_11_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_4, GPIO_GP_11_5, GPIO_GP_11_6, GPIO_GP_11_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_4, GPIO_GP_11_5, GPIO_GP_11_6, GPIO_GP_11_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_8, GPIO_GP_11_9, GPIO_GP_11_10, GPIO_GP_11_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_11_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_11_8, GPIO_GP_11_9, GPIO_GP_11_10, GPIO_GP_11_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_20	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_21	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_22	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_23	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_24	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_25	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_26	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_27	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_27	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_28	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_28, GPIO_GP_1_29,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_29	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_28, GPIO_GP_1_29,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_1_9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_1_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_1_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_1_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_1_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_1_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_23	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_24	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_25	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_26	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_26	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_27	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_27	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_27	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_27	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_27	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_28	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_28	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_28	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_28	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_28	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_29	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_29	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_29	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_29	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_29	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_30	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_30	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_30	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_30	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_31	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_31	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_31	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_31	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_2_9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_2_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_2_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_2_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_2_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_2_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_17	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_18	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_19	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_20	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_21	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_22	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_23	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_24	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_25	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_26	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_26	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_27	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_27	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_27	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_27	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_27	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_28	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_28	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_28	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_28,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_28	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_28	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_29	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_29	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_29	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_29	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_30	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_30	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_30	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_30	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_31	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_31	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_31	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_31	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_3_9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_3_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_3_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_3_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_3_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_3_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_16,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_26	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_27	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_27	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_27	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_27	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_28	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_28	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_28	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_28	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_29	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_29	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_29	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_29	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_30	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_30	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_30	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_30	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_31	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_31	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_31	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_31	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_4_9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_4_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_4_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_4_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_4_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_4_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_0	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_1	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_10	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_11	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_12	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_13	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_14	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_15	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_16	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_16,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_17	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_18	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_19	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_2	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_20	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_20	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_21	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_21	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_22	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_22	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_23	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_23	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_24	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_24	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_25	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_25	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_26	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_26	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_27	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_27	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_27	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_27	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_28	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_28	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_28	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_29	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_29	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_29	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_3	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_30	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_30	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_30	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_31	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_31	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_31	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_4	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_5	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_6	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_7	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_8	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_5_9	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonfbda8fcf0103
GPIO_GP_5_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_5_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_5_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_5_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_5_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_0	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_1	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_10	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_11	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_12	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_13	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_14	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_15	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_16,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_16	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_17	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_18	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_19	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_2	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_20	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_20	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_21	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_21	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_22	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_22	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_23	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_23	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_24	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_24	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_25	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_25	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_26	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_26	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_26	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_27	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_27	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_27	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_28	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_28	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_28	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_29	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_29	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_29	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_3	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_30	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_30	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_30	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_31	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_31	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_31	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_4	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_5	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_6	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_7	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_8	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_6_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_6_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_6_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_6_9	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anonace1e3530103
GPIO_GP_6_9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,$/;"	e	enum:__anon9923b8340103
GPIO_GP_7_0	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_0	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_7_1	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_1	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_7_10	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_10	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_11	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_11	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_12	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_12	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_13	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_13	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_14	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_14	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_15	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_15	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_16	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_16,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_16	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_17	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_17	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_18	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_18	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_19	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_19	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_2	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_2	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_7_20	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_20	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_21	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_21	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_22	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_22	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_23	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_23	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_24	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_24, GPIO_GP_7_25,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_24	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_24, GPIO_GP_7_25,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_25	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_24, GPIO_GP_7_25,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_25	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_24, GPIO_GP_7_25,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_3	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_3	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,$/;"	e	enum:__anon9923b8340103
GPIO_GP_7_4	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_4	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_5	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_5	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_6	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_6	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_7	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_7	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_8	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_8	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_7_9	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anone81c64b00103
GPIO_GP_7_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_7_9	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^	GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,$/;"	e	enum:__anonc0a00e720103
GPIO_GP_8_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_0, GPIO_GP_8_1, GPIO_GP_8_2, GPIO_GP_8_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_0, GPIO_GP_8_1, GPIO_GP_8_2, GPIO_GP_8_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_8, GPIO_GP_8_9, GPIO_GP_8_10, GPIO_GP_8_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_8, GPIO_GP_8_9, GPIO_GP_8_10, GPIO_GP_8_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_12, GPIO_GP_8_13, GPIO_GP_8_14, GPIO_GP_8_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_12, GPIO_GP_8_13, GPIO_GP_8_14, GPIO_GP_8_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_12, GPIO_GP_8_13, GPIO_GP_8_14, GPIO_GP_8_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_12, GPIO_GP_8_13, GPIO_GP_8_14, GPIO_GP_8_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_16,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_0, GPIO_GP_8_1, GPIO_GP_8_2, GPIO_GP_8_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_0, GPIO_GP_8_1, GPIO_GP_8_2, GPIO_GP_8_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_4, GPIO_GP_8_5, GPIO_GP_8_6, GPIO_GP_8_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_4, GPIO_GP_8_5, GPIO_GP_8_6, GPIO_GP_8_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_4, GPIO_GP_8_5, GPIO_GP_8_6, GPIO_GP_8_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_4, GPIO_GP_8_5, GPIO_GP_8_6, GPIO_GP_8_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_8, GPIO_GP_8_9, GPIO_GP_8_10, GPIO_GP_8_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_8_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_8_8, GPIO_GP_8_9, GPIO_GP_8_10, GPIO_GP_8_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_0	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_0, GPIO_GP_9_1, GPIO_GP_9_2, GPIO_GP_9_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_1	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_0, GPIO_GP_9_1, GPIO_GP_9_2, GPIO_GP_9_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_10	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_8, GPIO_GP_9_9, GPIO_GP_9_10, GPIO_GP_9_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_11	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_8, GPIO_GP_9_9, GPIO_GP_9_10, GPIO_GP_9_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_12	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_12, GPIO_GP_9_13, GPIO_GP_9_14, GPIO_GP_9_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_13	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_12, GPIO_GP_9_13, GPIO_GP_9_14, GPIO_GP_9_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_14	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_12, GPIO_GP_9_13, GPIO_GP_9_14, GPIO_GP_9_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_15	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_12, GPIO_GP_9_13, GPIO_GP_9_14, GPIO_GP_9_15,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_16	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_16,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_2	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_0, GPIO_GP_9_1, GPIO_GP_9_2, GPIO_GP_9_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_3	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_0, GPIO_GP_9_1, GPIO_GP_9_2, GPIO_GP_9_3,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_4	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_4, GPIO_GP_9_5, GPIO_GP_9_6, GPIO_GP_9_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_5	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_4, GPIO_GP_9_5, GPIO_GP_9_6, GPIO_GP_9_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_6	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_4, GPIO_GP_9_5, GPIO_GP_9_6, GPIO_GP_9_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_7	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_4, GPIO_GP_9_5, GPIO_GP_9_6, GPIO_GP_9_7,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_8	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_8, GPIO_GP_9_9, GPIO_GP_9_10, GPIO_GP_9_11,$/;"	e	enum:__anond45e39910103
GPIO_GP_9_9	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^	GPIO_GP_9_8, GPIO_GP_9_9, GPIO_GP_9_10, GPIO_GP_9_11,$/;"	e	enum:__anond45e39910103
GPIO_GROUP	drivers/pinctrl/meson/pinctrl-meson.h	/^#define GPIO_GROUP(/;"	d
GPIO_GROUP_MAX	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_GROUP_MAX	/;"	d
GPIO_GROUP_NUM	include/smsc_sio1007.h	/^#define GPIO_GROUP_NUM	/;"	d
GPIO_G_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_G_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_G_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_G_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_HCR0_PD2_0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PD2_0(/;"	d
GPIO_HCR0_PD2_0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PD2_0_MASK	/;"	d
GPIO_HCR0_PE7	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PE7	/;"	d
GPIO_HCR0_PH7_3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PH7_3(/;"	d
GPIO_HCR0_PH7_3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PH7_3_MASK(/;"	d
GPIO_HCR0_PK0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PK0	/;"	d
GPIO_HCR0_PK3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR0_PK3	/;"	d
GPIO_HCR1_PB2_0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PB2_0(/;"	d
GPIO_HCR1_PB2_0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PB2_0_MASK	/;"	d
GPIO_HCR1_PC7_1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PC7_1(/;"	d
GPIO_HCR1_PC7_1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PC7_1_MASK	/;"	d
GPIO_HCR1_PD7_3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PD7_3(/;"	d
GPIO_HCR1_PD7_3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PD7_3_MASK	/;"	d
GPIO_HCR1_PE6_0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PE6_0(/;"	d
GPIO_HCR1_PE6_0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PE6_0_MASK	/;"	d
GPIO_HCR1_PF7_3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PF7_3(/;"	d
GPIO_HCR1_PF7_3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PF7_3_MASK	/;"	d
GPIO_HCR1_PG4_0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PG4_0(/;"	d
GPIO_HCR1_PG4_0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_HCR1_PG4_0_MASK	/;"	d
GPIO_HDD_POWER	board/buffalo/lsxl/lsxl.h	/^#define GPIO_HDD_POWER	/;"	d
GPIO_HIGH	arch/arm/include/asm/arch-armada100/gpio.h	/^#define GPIO_HIGH	/;"	d
GPIO_HK_NCONFIG	board/barco/platinum/platinum_picon.c	/^#define GPIO_HK_NCONFIG	/;"	d	file:
GPIO_H_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_H_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_H_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_H_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_I2C0_ENBN	board/barco/platinum/platinum_picon.c	/^#define GPIO_I2C0_ENBN	/;"	d	file:
GPIO_I2C0_SEL0	board/barco/platinum/platinum_picon.c	/^#define GPIO_I2C0_SEL0	/;"	d	file:
GPIO_I2C0_SEL1	board/barco/platinum/platinum_picon.c	/^#define GPIO_I2C0_SEL1	/;"	d	file:
GPIO_I2C2_ENBN	board/barco/platinum/platinum_picon.c	/^#define GPIO_I2C2_ENBN	/;"	d	file:
GPIO_I2C2_SEL0	board/barco/platinum/platinum_picon.c	/^#define GPIO_I2C2_SEL0	/;"	d	file:
GPIO_I2C2_SEL1	board/barco/platinum/platinum_picon.c	/^#define GPIO_I2C2_SEL1	/;"	d	file:
GPIO_I2C_SCL	include/configs/ethernut5.h	/^#define GPIO_I2C_SCL	/;"	d
GPIO_I2C_SDA	include/configs/ethernut5.h	/^#define GPIO_I2C_SDA	/;"	d
GPIO_ICCR	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define GPIO_ICCR /;"	d	file:
GPIO_ICCR_DATA	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define GPIO_ICCR_DATA	/;"	d	file:
GPIO_IFN	include/sh_pfc.h	/^#define GPIO_IFN(/;"	d
GPIO_IFN_A0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A10,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A11,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A12,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A13,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A14,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A15,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A16	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A16,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A17	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A17,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A18	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A18,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A19	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A19,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A5,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A6,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A7,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A8,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_A9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_A9,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AUDIO_CLKA_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AUDIO_CLKA_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AUDIO_CLKB_B	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AUDIO_CLKB_B,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AVB_AVTP_CAPTURE_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AVB_AVTP_CAPTURE_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AVB_AVTP_MATCH_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AVB_AVTP_MATCH_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AVB_LINK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AVB_LINK,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AVB_MAGIC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AVB_MAGIC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AVB_MDC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AVB_MDC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_AVB_PHY_INT	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_AVB_PHY_INT,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_BSx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_BSx,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_CS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_CS0x,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_CS1x_A26	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_CS1x_A26,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_CTS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_CTS0x,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_CTS1x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_CTS1x,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D10	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D10,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D11	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D11,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D12	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D12,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D13	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D13,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D14	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D14,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D15	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D15,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D5,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D6,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D7,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D8,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_D9	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_D9,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_EX_WAIT0_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_EX_WAIT0_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_HCTS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_HCTS0x,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_HRTS0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_HRTS0x,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_HRX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_HRX0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_HSCK0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_HSCK0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_HTX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_HTX0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_IRQ0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_IRQ0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_IRQ1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_IRQ1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_IRQ2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_IRQ2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_IRQ3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_IRQ3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_IRQ4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_IRQ4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_IRQ5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_IRQ5,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_MLB_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_MLB_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_MLB_DAT	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_MLB_DAT,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_MLB_SIG	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_MLB_SIG,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_MSIOF0_SS1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_MSIOF0_SS1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_MSIOF0_SS2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_MSIOF0_SS2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_MSIOF0_SYNC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_MSIOF0_SYNC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_PWM0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_PWM0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_PWM1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_PWM1_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_PWM2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_PWM2_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RD_WRx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RD_WRx,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RDx	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RDx,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RTS0x_TANS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RTS0x_TANS,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RTS1x_TANS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RTS1x_TANS,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RX0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RX1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RX1_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_RX2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_RX2_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SCK0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SCK0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SCK2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SCK2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_CD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_CD,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_CMD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_CMD,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD0_WP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD0_WP,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_CD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_CD,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_CMD	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_CMD,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD1_WP	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD1_WP,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD2_CLK	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD2_CLK,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD2_DAT0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD2_DAT0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD2_DAT1	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD2_DAT1,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD2_DAT2	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD2_DAT2,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD2_DAT3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD2_DAT3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD2_DS	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD2_DS,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD3_DAT4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD3_DAT4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD3_DAT5	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD3_DAT5,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD3_DAT6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD3_DAT6,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SD3_DAT7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SD3_DAT7,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SCK0129	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SCK0129,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SCK34	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SCK34,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SCK4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SCK4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SCK6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SCK6,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SCK78	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SCK78,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA1_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA2_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA3	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA3,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA6,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA7	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA7,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA8	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA8,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_SDATA9_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_SDATA9_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_WS0129	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_WS0129,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_WS34	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_WS34,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_WS4	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_WS4,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_WS6	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_WS6,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_SSI_WS78	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_SSI_WS78,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_TX0	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_TX0,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_TX1_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_TX1_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_TX2_A	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_TX2_A,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB0_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB0_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB0_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB0_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB1_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB1_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB1_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB30_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB30_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB30_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB30_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB31_OVC	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB31_OVC,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_USB31_PWEN	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_USB31_PWEN,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_WE0x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_WE0x,$/;"	e	enum:__anon9923b8340103
GPIO_IFN_WE1x	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^	GPIO_IFN_WE1x,$/;"	e	enum:__anon9923b8340103
GPIO_IN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_IN /;"	d
GPIO_IN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_IN	/;"	d
GPIO_IN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_IN	/;"	d
GPIO_IN	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;$/;"	e	enum:gpio_driver
GPIO_IN	drivers/gpio/msm_gpio.c	/^#define GPIO_IN /;"	d	file:
GPIO_INFO_LED	board/buffalo/lsxl/lsxl.h	/^#define GPIO_INFO_LED	/;"	d
GPIO_INIT	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/p2571/pinmux-config-p2571.h	/^#define GPIO_INIT(/;"	d
GPIO_INIT	board/nvidia/venice2/pinmux-config-venice2.h	/^#define GPIO_INIT(/;"	d
GPIO_INITIAL	board/varisys/cyrus/cyrus.c	/^#define GPIO_INITIAL /;"	d	file:
GPIO_INPUT	cmd/gpio.c	/^	GPIO_INPUT,$/;"	e	enum:gpio_cmd	file:
GPIO_INPUT	drivers/gpio/s3c2440_gpio.c	/^#define GPIO_INPUT /;"	d	file:
GPIO_INPUT_OK	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_INPUT_OK	/;"	d
GPIO_INSTANCES	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_INSTANCES	/;"	d
GPIO_INSTANCES	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_INSTANCES	/;"	d
GPIO_INTEN	drivers/gpio/dwapb_gpio.c	/^#define GPIO_INTEN	/;"	d	file:
GPIO_INTMASK	drivers/gpio/dwapb_gpio.c	/^#define GPIO_INTMASK	/;"	d	file:
GPIO_INTSTATUS	drivers/gpio/dwapb_gpio.c	/^#define GPIO_INTSTATUS	/;"	d	file:
GPIO_INTTYPE_LEVEL	drivers/gpio/dwapb_gpio.c	/^#define GPIO_INTTYPE_LEVEL	/;"	d	file:
GPIO_INT_FALL_EDGE	drivers/gpio/mxs_gpio.c	/^#define GPIO_INT_FALL_EDGE	/;"	d	file:
GPIO_INT_HIGH_LEV	drivers/gpio/mxs_gpio.c	/^#define GPIO_INT_HIGH_LEV	/;"	d	file:
GPIO_INT_LEV_MASK	drivers/gpio/mxs_gpio.c	/^#define GPIO_INT_LEV_MASK	/;"	d	file:
GPIO_INT_LOW_LEV	drivers/gpio/mxs_gpio.c	/^#define GPIO_INT_LOW_LEV	/;"	d	file:
GPIO_INT_MASK	drivers/gpio/kona_gpio.c	/^#define GPIO_INT_MASK(/;"	d	file:
GPIO_INT_MSKCLR	drivers/gpio/kona_gpio.c	/^#define GPIO_INT_MSKCLR(/;"	d	file:
GPIO_INT_POLARITY	drivers/gpio/dwapb_gpio.c	/^#define GPIO_INT_POLARITY	/;"	d	file:
GPIO_INT_POL_MASK	drivers/gpio/mxs_gpio.c	/^#define GPIO_INT_POL_MASK	/;"	d	file:
GPIO_INT_RISE_EDGE	drivers/gpio/mxs_gpio.c	/^#define GPIO_INT_RISE_EDGE	/;"	d	file:
GPIO_INT_STATUS	drivers/gpio/kona_gpio.c	/^#define GPIO_INT_STATUS(/;"	d	file:
GPIO_IN_OUT_OFF	drivers/gpio/msm_gpio.c	/^#define GPIO_IN_OUT_OFF(/;"	d	file:
GPIO_IN_PAD_CTRL	board/tqc/tqma6/tqma6.c	/^#define GPIO_IN_PAD_CTRL /;"	d	file:
GPIO_IN_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define GPIO_IN_PAD_CTRL /;"	d	file:
GPIO_IN_POL	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_IN_POL(/;"	d
GPIO_IN_SEL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_IN_SEL	/;"	d
GPIO_IN_STATUS	drivers/gpio/kona_gpio.c	/^#define GPIO_IN_STATUS(/;"	d	file:
GPIO_IOSEL_OFFSET	arch/x86/lib/pinctrl_ich6.c	/^#define GPIO_IOSEL_OFFSET(/;"	d	file:
GPIO_IOSEL_OFFSET	drivers/gpio/intel_ich6_gpio.c	/^#define GPIO_IOSEL_OFFSET(/;"	d	file:
GPIO_IO_CONF	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_IO_CONF(/;"	d
GPIO_IO_PWRDNZ	board/logicpd/omap3som/omap3logic.c	/^#define GPIO_IO_PWRDNZ	/;"	d	file:
GPIO_IO_PWRDNZ	board/pandora/pandora.c	/^#define GPIO_IO_PWRDNZ	/;"	d	file:
GPIO_IP_NCONFIG	board/barco/platinum/platinum_picon.c	/^#define GPIO_IP_NCONFIG	/;"	d	file:
GPIO_IS1	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_IS1(/;"	d
GPIO_IS1	board/amcc/bamboo/bamboo.h	/^#define GPIO_IS1(/;"	d
GPIO_IS2	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_IS2(/;"	d
GPIO_IS2	board/amcc/bamboo/bamboo.h	/^#define GPIO_IS2(/;"	d
GPIO_IS3	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_IS3(/;"	d
GPIO_IS3	board/amcc/bamboo/bamboo.h	/^#define GPIO_IS3(/;"	d
GPIO_I_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_I_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_I_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_I_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_J_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_J_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_J_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_J_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_K_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	GPIO_K_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_K_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	GPIO_K_CLOCK_CFG,$/;"	e	enum:periph_clock
GPIO_LAN9303_NRST	include/configs/draco.h	/^#define GPIO_LAN9303_NRST	/;"	d
GPIO_LAN9303_NRST	include/configs/etamin.h	/^#define GPIO_LAN9303_NRST	/;"	d
GPIO_LAN9303_NRST	include/configs/rastaban.h	/^#define GPIO_LAN9303_NRST	/;"	d
GPIO_LAN9303_NRST	include/configs/thuban.h	/^#define GPIO_LAN9303_NRST	/;"	d
GPIO_LDD	include/SA-1100.h	/^#define GPIO_LDD(/;"	d
GPIO_LDD10	include/SA-1100.h	/^#define GPIO_LDD10	/;"	d
GPIO_LDD11	include/SA-1100.h	/^#define GPIO_LDD11	/;"	d
GPIO_LDD12	include/SA-1100.h	/^#define GPIO_LDD12	/;"	d
GPIO_LDD13	include/SA-1100.h	/^#define GPIO_LDD13	/;"	d
GPIO_LDD14	include/SA-1100.h	/^#define GPIO_LDD14	/;"	d
GPIO_LDD15	include/SA-1100.h	/^#define GPIO_LDD15	/;"	d
GPIO_LDD8	include/SA-1100.h	/^#define GPIO_LDD8	/;"	d
GPIO_LDD9	include/SA-1100.h	/^#define GPIO_LDD9	/;"	d
GPIO_LEVEL_MASK	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_LEVEL_MASK(/;"	d
GPIO_LOW	arch/arm/include/asm/arch-armada100/gpio.h	/^#define GPIO_LOW	/;"	d
GPIO_LS_NCONFIG	board/barco/platinum/platinum_picon.c	/^#define GPIO_LS_NCONFIG	/;"	d	file:
GPIO_LVL_OFFSET	arch/x86/lib/pinctrl_ich6.c	/^#define GPIO_LVL_OFFSET(/;"	d	file:
GPIO_LVL_OFFSET	drivers/gpio/intel_ich6_gpio.c	/^#define GPIO_LVL_OFFSET(/;"	d	file:
GPIO_MASK	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_MASK	/;"	d
GPIO_MASK	board/cm-bf537e/gpio_cfi_flash.c	/^#define GPIO_MASK /;"	d	file:
GPIO_MASK_0	include/radeon.h	/^#define GPIO_MASK_0	/;"	d
GPIO_MASK_1	board/cm-bf537e/gpio_cfi_flash.c	/^#define GPIO_MASK_1 /;"	d	file:
GPIO_MASK_1	include/radeon.h	/^#define GPIO_MASK_1	/;"	d
GPIO_MASK_2	board/cm-bf537e/gpio_cfi_flash.c	/^#define GPIO_MASK_2 /;"	d	file:
GPIO_MASK_3	board/cm-bf537e/gpio_cfi_flash.c	/^#define GPIO_MASK_3 /;"	d	file:
GPIO_MAX	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_MAX	/;"	d
GPIO_MAX	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_MAX	/;"	d
GPIO_MAX	include/SA-1100.h	/^#define GPIO_MAX	/;"	d
GPIO_MAX_BANK_NUM	drivers/gpio/kona_gpio.c	/^#define GPIO_MAX_BANK_NUM	/;"	d	file:
GPIO_MAX_NAME_LENGTH	arch/x86/include/asm/coreboot_tables.h	/^#define GPIO_MAX_NAME_LENGTH	/;"	d
GPIO_MAX_NUM	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_MAX_NUM	/;"	d
GPIO_MBGNT	include/SA-1100.h	/^#define GPIO_MBGNT	/;"	d
GPIO_MBREQ	include/SA-1100.h	/^#define GPIO_MBREQ	/;"	d
GPIO_MCP_CLK	include/SA-1100.h	/^#define GPIO_MCP_CLK	/;"	d
GPIO_MDC	board/gdsys/405ep/iocon.c	/^	GPIO_MDC = 1 << 14,$/;"	e	enum:__anon023d8a7b0a03	file:
GPIO_MDC	board/gdsys/mpc8308/hrcon.c	/^	GPIO_MDC = 1 << 14,$/;"	e	enum:__anonc2f835a20203	file:
GPIO_MDC	board/gdsys/mpc8308/strider.c	/^	GPIO_MDC = 1 << 14,$/;"	e	enum:__anonafccc0650203	file:
GPIO_MDIO	board/gdsys/405ep/iocon.c	/^	GPIO_MDIO = 1 << 15,$/;"	e	enum:__anon023d8a7b0a03	file:
GPIO_MDIO	board/gdsys/mpc8308/hrcon.c	/^	GPIO_MDIO = 1 << 15,$/;"	e	enum:__anonc2f835a20203	file:
GPIO_MDIO	board/gdsys/mpc8308/strider.c	/^	GPIO_MDIO = 1 << 15,$/;"	e	enum:__anonafccc0650203	file:
GPIO_MD_MASK_DIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_MD_MASK_DIR	/;"	d
GPIO_MD_MASK_FN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_MD_MASK_FN	/;"	d
GPIO_MD_MASK_NR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_MD_MASK_NR	/;"	d
GPIO_MIN	include/SA-1100.h	/^#define GPIO_MIN	/;"	d
GPIO_MMC_CD	board/woodburn/woodburn.c	/^#define GPIO_MMC_CD	/;"	d	file:
GPIO_MMC_WP	board/woodburn/woodburn.c	/^#define GPIO_MMC_WP	/;"	d	file:
GPIO_MODE_FUNC0	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC0	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC0	/;"	d
GPIO_MODE_FUNC1	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC1	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC1	/;"	d
GPIO_MODE_FUNC2	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC2	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC2	/;"	d
GPIO_MODE_FUNC3	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC3	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC3	/;"	d
GPIO_MODE_FUNC4	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC4	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC4	/;"	d
GPIO_MODE_FUNC5	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC5	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC5	/;"	d
GPIO_MODE_FUNC6	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_FUNC6	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_FUNC6	/;"	d
GPIO_MODE_GPIO	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_GPIO	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_GPIO	/;"	d
GPIO_MODE_NATIVE	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODE_NATIVE	include/dt-bindings/gpio/x86-gpio.h	/^#define GPIO_MODE_NATIVE	/;"	d
GPIO_MODULE	board/micronas/vct/gpio.c	/^#define GPIO_MODULE(/;"	d	file:
GPIO_MONID	include/radeon.h	/^#define GPIO_MONID	/;"	d
GPIO_MSCR_FB_ADDRCTL_25V_33V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_ADDRCTL_25V_33V	/;"	d
GPIO_MSCR_FB_ADDRCTL_FULL_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_ADDRCTL_FULL_18V	/;"	d
GPIO_MSCR_FB_ADDRCTL_HALF_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_ADDRCTL_HALF_18V	/;"	d
GPIO_MSCR_FB_ADDRCTL_OD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_ADDRCTL_OD	/;"	d
GPIO_MSCR_FB_ADDRCTL_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_ADDRCTL_UNMASK	/;"	d
GPIO_MSCR_FB_ADRCTL	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_ADRCTL(/;"	d
GPIO_MSCR_FB_ADRCTL_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_ADRCTL_UNMASK	/;"	d
GPIO_MSCR_FB_DLO	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_DLO(/;"	d
GPIO_MSCR_FB_DLOWER_25V_33V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DLOWER_25V_33V	/;"	d
GPIO_MSCR_FB_DLOWER_FULL_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DLOWER_FULL_18V	/;"	d
GPIO_MSCR_FB_DLOWER_HALF_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DLOWER_HALF_18V	/;"	d
GPIO_MSCR_FB_DLOWER_OD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DLOWER_OD	/;"	d
GPIO_MSCR_FB_DLOWER_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DLOWER_UNMASK	/;"	d
GPIO_MSCR_FB_DLO_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_DLO_UNMASK	/;"	d
GPIO_MSCR_FB_DUP	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_DUP(/;"	d
GPIO_MSCR_FB_DUPPER_25V_33V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DUPPER_25V_33V	/;"	d
GPIO_MSCR_FB_DUPPER_FULL_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DUPPER_FULL_18V	/;"	d
GPIO_MSCR_FB_DUPPER_HALF_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DUPPER_HALF_18V	/;"	d
GPIO_MSCR_FB_DUPPER_OD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DUPPER_OD	/;"	d
GPIO_MSCR_FB_DUPPER_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_FB_DUPPER_UNMASK	/;"	d
GPIO_MSCR_FB_DUP_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_DUP_UNMASK	/;"	d
GPIO_MSCR_FB_FBCLK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_FBCLK(/;"	d
GPIO_MSCR_FB_FBCLK_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_FB_FBCLK_UNMASK	/;"	d
GPIO_MSCR_FLEXBUS_ADDRCTL	arch/m68k/include/asm/m5329.h	/^#define GPIO_MSCR_FLEXBUS_ADDRCTL(/;"	d
GPIO_MSCR_FLEXBUS_DLOWER	arch/m68k/include/asm/m5329.h	/^#define GPIO_MSCR_FLEXBUS_DLOWER(/;"	d
GPIO_MSCR_FLEXBUS_DUPPER	arch/m68k/include/asm/m5329.h	/^#define GPIO_MSCR_FLEXBUS_DUPPER(/;"	d
GPIO_MSCR_MSCR1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR1(/;"	d
GPIO_MSCR_MSCR2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR2(/;"	d
GPIO_MSCR_MSCR3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR3(/;"	d
GPIO_MSCR_MSCR4	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR4(/;"	d
GPIO_MSCR_MSCR5	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR5(/;"	d
GPIO_MSCR_MSCR5_18VDDR_FULL	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR5_18VDDR_FULL	/;"	d
GPIO_MSCR_MSCR5_18VDDR_HALF	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR5_18VDDR_HALF	/;"	d
GPIO_MSCR_MSCR5_25VDDR	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR5_25VDDR	/;"	d
GPIO_MSCR_MSCR5_SDR	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR5_SDR	/;"	d
GPIO_MSCR_MSCR5_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCR5_UNMASK	/;"	d
GPIO_MSCR_MSCRn_18VDDR_FULL	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCRn_18VDDR_FULL	/;"	d
GPIO_MSCR_MSCRn_18VDDR_HALF	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCRn_18VDDR_HALF	/;"	d
GPIO_MSCR_MSCRn_25VDDR	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCRn_25VDDR	/;"	d
GPIO_MSCR_MSCRn_SDR	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCRn_SDR	/;"	d
GPIO_MSCR_MSCRn_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_MSCR_MSCRn_UNMASK	/;"	d
GPIO_MSCR_PCI_PCI	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_PCI_PCI	/;"	d
GPIO_MSCR_PCI_PCI_HI_66MHZ	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_PCI_PCI_HI_66MHZ	/;"	d
GPIO_MSCR_PCI_PCI_LO_33MHZ	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_PCI_PCI_LO_33MHZ	/;"	d
GPIO_MSCR_SDRAM_MSC	arch/m68k/include/asm/m5441x.h	/^#define GPIO_MSCR_SDRAM_MSC(/;"	d
GPIO_MSCR_SDRAM_MSC_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_MSCR_SDRAM_MSC_MASK	/;"	d
GPIO_MSCR_SDRAM_SDCLK	arch/m68k/include/asm/m5329.h	/^#define GPIO_MSCR_SDRAM_SDCLK(/;"	d
GPIO_MSCR_SDRAM_SDCLK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCLK(/;"	d
GPIO_MSCR_SDRAM_SDCLKB	arch/m68k/include/asm/m5329.h	/^#define GPIO_MSCR_SDRAM_SDCLKB(/;"	d
GPIO_MSCR_SDRAM_SDCLKB_25V_33V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLKB_25V_33V	/;"	d
GPIO_MSCR_SDRAM_SDCLKB_FULL_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLKB_FULL_18V	/;"	d
GPIO_MSCR_SDRAM_SDCLKB_HALF_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLKB_HALF_18V	/;"	d
GPIO_MSCR_SDRAM_SDCLKB_OD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLKB_OD	/;"	d
GPIO_MSCR_SDRAM_SDCLKB_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLKB_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDCLK_25V_33V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_25V_33V	/;"	d
GPIO_MSCR_SDRAM_SDCLK_DDR1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_DDR1	/;"	d
GPIO_MSCR_SDRAM_SDCLK_DDR2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_DDR2	/;"	d
GPIO_MSCR_SDRAM_SDCLK_FS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_FS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDCLK_FULL_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_FULL_18V	/;"	d
GPIO_MSCR_SDRAM_SDCLK_HALF_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_HALF_18V	/;"	d
GPIO_MSCR_SDRAM_SDCLK_HS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_HS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDCLK_OPD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_OPD	/;"	d
GPIO_MSCR_SDRAM_SDCLK_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDCLK_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCLK_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDCTL	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCTL(/;"	d
GPIO_MSCR_SDRAM_SDCTL_25V_33V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_25V_33V	/;"	d
GPIO_MSCR_SDRAM_SDCTL_DDR1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_DDR1	/;"	d
GPIO_MSCR_SDRAM_SDCTL_DDR2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_DDR2	/;"	d
GPIO_MSCR_SDRAM_SDCTL_FS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_FS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDCTL_FULL_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_FULL_18V	/;"	d
GPIO_MSCR_SDRAM_SDCTL_HALF_18V	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_HALF_18V	/;"	d
GPIO_MSCR_SDRAM_SDCTL_HS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_HS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDCTL_OPD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_OPD	/;"	d
GPIO_MSCR_SDRAM_SDCTL_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDCTL_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDCTL_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDDATA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDATA(/;"	d
GPIO_MSCR_SDRAM_SDDATA_DDR1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDATA_DDR1	/;"	d
GPIO_MSCR_SDRAM_SDDATA_DDR2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDATA_DDR2	/;"	d
GPIO_MSCR_SDRAM_SDDATA_FS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDATA_FS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDDATA_HS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDATA_HS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDDATA_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDATA_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDDQS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDQS(/;"	d
GPIO_MSCR_SDRAM_SDDQS_DDR1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDQS_DDR1	/;"	d
GPIO_MSCR_SDRAM_SDDQS_DDR2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDQS_DDR2	/;"	d
GPIO_MSCR_SDRAM_SDDQS_FS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDQS_FS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDDQS_HS_LPDDR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDQS_HS_LPDDR	/;"	d
GPIO_MSCR_SDRAM_SDDQS_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_MSCR_SDRAM_SDDQS_UNMASK	/;"	d
GPIO_MSCR_SDRAM_SDRAM	arch/m68k/include/asm/m5329.h	/^#define GPIO_MSCR_SDRAM_SDRAM(/;"	d
GPIO_MSCR_SDR_SDCLK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_SDR_SDCLK(/;"	d
GPIO_MSCR_SDR_SDCLKB	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_SDR_SDCLKB(/;"	d
GPIO_MSCR_SDR_SDCLKB_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_SDR_SDCLKB_UNMASK	/;"	d
GPIO_MSCR_SDR_SDCLK_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_SDR_SDCLK_UNMASK	/;"	d
GPIO_MSCR_SDR_SDRAM	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_SDR_SDRAM(/;"	d
GPIO_MSCR_SDR_SDRAM_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_MSCR_SDR_SDRAM_UNMASK	/;"	d
GPIO_MUX_MII_CTRL	board/ti/am335x/board.c	/^#define GPIO_MUX_MII_CTRL	/;"	d	file:
GPIO_NAME_SIZE	arch/arm/include/asm/arch-tegra/gpio.h	/^#define GPIO_NAME_SIZE	/;"	d
GPIO_NAME_SIZE	arch/arm/mach-davinci/include/mach/gpio.h	/^#define GPIO_NAME_SIZE	/;"	d
GPIO_NAME_SIZE	drivers/gpio/xilinx_gpio.c	/^#define GPIO_NAME_SIZE	/;"	d	file:
GPIO_NC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_NC_IRQ	/;"	d
GPIO_NR	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_NR,$/;"	e	enum:__anon8638ecc30103
GPIO_NUM	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_NUM(/;"	d
GPIO_NUM	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_NUM(/;"	d
GPIO_NUM_PER_GROUP	include/smsc_sio1007.h	/^#define GPIO_NUM_PER_GROUP	/;"	d
GPIO_NUM_PIN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define GPIO_NUM_PIN	/;"	d
GPIO_NUM_PIN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPIO_NUM_PIN /;"	d
GPIO_OCR_MASK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_OCR_MASK /;"	d
GPIO_OCR_MASK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_OCR_MASK	/;"	d
GPIO_OCR_SHIFT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_OCR_SHIFT /;"	d
GPIO_OCR_SHIFT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_OCR_SHIFT	/;"	d
GPIO_OD_PAD_CTRL	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_OD_PAD_CTRL /;"	d	file:
GPIO_OE_DISABLE	drivers/gpio/msm_gpio.c	/^#define GPIO_OE_DISABLE /;"	d	file:
GPIO_OE_ENABLE	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define GPIO_OE_ENABLE(/;"	d
GPIO_OE_ENABLE	drivers/gpio/msm_gpio.c	/^#define GPIO_OE_ENABLE /;"	d	file:
GPIO_OE_MASK	drivers/gpio/msm_gpio.c	/^#define GPIO_OE_MASK /;"	d	file:
GPIO_OFF	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_OFF(/;"	d
GPIO_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define GPIO_OFFSET	/;"	d
GPIO_OPENDRAIN	board/varisys/cyrus/cyrus.c	/^#define GPIO_OPENDRAIN /;"	d	file:
GPIO_OR	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_OR(/;"	d
GPIO_OS	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_OS(/;"	d
GPIO_OS	board/amcc/bamboo/bamboo.h	/^#define GPIO_OS(/;"	d
GPIO_OUT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_OUT /;"	d
GPIO_OUT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_OUT	/;"	d
GPIO_OUT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_OUT	/;"	d
GPIO_OUT	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_OUT(/;"	d
GPIO_OUT	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;$/;"	e	enum:gpio_driver
GPIO_OUT	drivers/gpio/msm_gpio.c	/^#define GPIO_OUT /;"	d	file:
GPIO_OUTPUT	drivers/gpio/s3c2440_gpio.c	/^#define GPIO_OUTPUT /;"	d	file:
GPIO_OUTPUT_OK	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define GPIO_OUTPUT_OK	/;"	d
GPIO_OUT_0	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_out	 { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;$/;"	e	enum:gpio_out
GPIO_OUT_1	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_out	 { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;$/;"	e	enum:gpio_out
GPIO_OUT_CLEAR	drivers/gpio/kona_gpio.c	/^#define GPIO_OUT_CLEAR(/;"	d	file:
GPIO_OUT_NO_CHG	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_out	 { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;$/;"	e	enum:gpio_out
GPIO_OUT_PAD_CTRL	board/tqc/tqma6/tqma6.c	/^#define GPIO_OUT_PAD_CTRL /;"	d	file:
GPIO_OUT_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define GPIO_OUT_PAD_CTRL /;"	d	file:
GPIO_OUT_SET	drivers/gpio/kona_gpio.c	/^#define GPIO_OUT_SET(/;"	d	file:
GPIO_OUT_STATUS	drivers/gpio/kona_gpio.c	/^#define GPIO_OUT_STATUS(/;"	d	file:
GPIO_PA0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA0	/;"	d
GPIO_PA0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA0	/;"	d
GPIO_PA1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA1	/;"	d
GPIO_PA1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA1	/;"	d
GPIO_PA10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA10	/;"	d
GPIO_PA10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA10	/;"	d
GPIO_PA11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA11	/;"	d
GPIO_PA11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA11	/;"	d
GPIO_PA12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA12	/;"	d
GPIO_PA12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA12	/;"	d
GPIO_PA13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA13	/;"	d
GPIO_PA13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA13	/;"	d
GPIO_PA14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA14	/;"	d
GPIO_PA14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA14	/;"	d
GPIO_PA15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA15	/;"	d
GPIO_PA15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA15	/;"	d
GPIO_PA2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA2	/;"	d
GPIO_PA2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA2	/;"	d
GPIO_PA3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA3	/;"	d
GPIO_PA3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA3	/;"	d
GPIO_PA4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA4	/;"	d
GPIO_PA4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA4	/;"	d
GPIO_PA5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA5	/;"	d
GPIO_PA5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA5	/;"	d
GPIO_PA6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA6	/;"	d
GPIO_PA6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA6	/;"	d
GPIO_PA7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA7	/;"	d
GPIO_PA7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA7	/;"	d
GPIO_PA8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA8	/;"	d
GPIO_PA8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA8	/;"	d
GPIO_PA9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PA9	/;"	d
GPIO_PA9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PA9	/;"	d
GPIO_PACNT_DFSC2	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DFSC2	/;"	d
GPIO_PACNT_DFSC3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DFSC3	/;"	d
GPIO_PACNT_DGNT0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DGNT0	/;"	d
GPIO_PACNT_DGNT1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DGNT1	/;"	d
GPIO_PACNT_DOUT3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DOUT3	/;"	d
GPIO_PACNT_DREQ0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DREQ0	/;"	d
GPIO_PACNT_DREQ1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_DREQ1	/;"	d
GPIO_PACNT_FSC0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_FSC0	/;"	d
GPIO_PACNT_FSR0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_FSR0	/;"	d
GPIO_PACNT_PA0MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA0MSK	/;"	d
GPIO_PACNT_PA10MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA10MSK	/;"	d
GPIO_PACNT_PA11MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA11MSK	/;"	d
GPIO_PACNT_PA12MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA12MSK	/;"	d
GPIO_PACNT_PA13MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA13MSK	/;"	d
GPIO_PACNT_PA14MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA14MSK	/;"	d
GPIO_PACNT_PA15MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA15MSK	/;"	d
GPIO_PACNT_PA1MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA1MSK	/;"	d
GPIO_PACNT_PA2MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA2MSK	/;"	d
GPIO_PACNT_PA3MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA3MSK	/;"	d
GPIO_PACNT_PA4MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA4MSK	/;"	d
GPIO_PACNT_PA5MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA5MSK	/;"	d
GPIO_PACNT_PA6MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA6MSK	/;"	d
GPIO_PACNT_PA7MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA7MSK	/;"	d
GPIO_PACNT_PA8MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA8MSK	/;"	d
GPIO_PACNT_PA9MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_PA9MSK	/;"	d
GPIO_PACNT_QSPI_CS1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_QSPI_CS1	/;"	d
GPIO_PACNT_QSPI_CS3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_QSPI_CS3	/;"	d
GPIO_PACNT_USB_RN	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_RN	/;"	d
GPIO_PACNT_USB_RP	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_RP	/;"	d
GPIO_PACNT_USB_RXD	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_RXD	/;"	d
GPIO_PACNT_USB_SUSP	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_SUSP	/;"	d
GPIO_PACNT_USB_TN	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_TN	/;"	d
GPIO_PACNT_USB_TP	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_TP	/;"	d
GPIO_PACNT_USB_TXEN	arch/m68k/include/asm/m5272.h	/^#define GPIO_PACNT_USB_TXEN	/;"	d
GPIO_PAD_CTRL	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_PAD_CTRL /;"	d	file:
GPIO_PAR_AD_ADDR21	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_AD_ADDR21	/;"	d
GPIO_PAR_AD_ADDR22	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_AD_ADDR22	/;"	d
GPIO_PAR_AD_ADDR23	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_AD_ADDR23	/;"	d
GPIO_PAR_AD_DATAL	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_AD_DATAL	/;"	d
GPIO_PAR_ATA_BUFEN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_BUFEN	/;"	d
GPIO_PAR_ATA_BUFEN_BUFEN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_BUFEN_BUFEN	/;"	d
GPIO_PAR_ATA_BUFEN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_BUFEN_GPIO	/;"	d
GPIO_PAR_ATA_CS0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_CS0	/;"	d
GPIO_PAR_ATA_CS0_CS0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_CS0_CS0	/;"	d
GPIO_PAR_ATA_CS0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_CS0_GPIO	/;"	d
GPIO_PAR_ATA_CS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_CS1	/;"	d
GPIO_PAR_ATA_CS1_CS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_CS1_CS1	/;"	d
GPIO_PAR_ATA_CS1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_CS1_GPIO	/;"	d
GPIO_PAR_ATA_DA0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA0	/;"	d
GPIO_PAR_ATA_DA0_DA0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA0_DA0	/;"	d
GPIO_PAR_ATA_DA0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA0_GPIO	/;"	d
GPIO_PAR_ATA_DA1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA1	/;"	d
GPIO_PAR_ATA_DA1_DA1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA1_DA1	/;"	d
GPIO_PAR_ATA_DA1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA1_GPIO	/;"	d
GPIO_PAR_ATA_DA2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA2	/;"	d
GPIO_PAR_ATA_DA2_DA2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA2_DA2	/;"	d
GPIO_PAR_ATA_DA2_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DA2_GPIO	/;"	d
GPIO_PAR_ATA_DMARQ	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DMARQ	/;"	d
GPIO_PAR_ATA_DMARQ_DMARQ	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DMARQ_DMARQ	/;"	d
GPIO_PAR_ATA_DMARQ_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_DMARQ_GPIO	/;"	d
GPIO_PAR_ATA_IORDY	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_IORDY	/;"	d
GPIO_PAR_ATA_IORDY_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_IORDY_GPIO	/;"	d
GPIO_PAR_ATA_IORDY_IORDY	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_IORDY_IORDY	/;"	d
GPIO_PAR_ATA_RESET	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_RESET	/;"	d
GPIO_PAR_ATA_RESET_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_RESET_GPIO	/;"	d
GPIO_PAR_ATA_RESET_RESET	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_ATA_RESET_RESET	/;"	d
GPIO_PAR_BE0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_BE0	/;"	d
GPIO_PAR_BE0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_BE0	/;"	d
GPIO_PAR_BE0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BE0	/;"	d
GPIO_PAR_BE1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_BE1	/;"	d
GPIO_PAR_BE1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_BE1	/;"	d
GPIO_PAR_BE1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BE1	/;"	d
GPIO_PAR_BE2	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_BE2	/;"	d
GPIO_PAR_BE2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_BE2	/;"	d
GPIO_PAR_BE2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BE2	/;"	d
GPIO_PAR_BE3	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_BE3	/;"	d
GPIO_PAR_BE3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_BE3	/;"	d
GPIO_PAR_BE3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BE3	/;"	d
GPIO_PAR_BE_BE0_BE0	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE0_BE0	/;"	d
GPIO_PAR_BE_BE0_BE0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE0_BE0	/;"	d
GPIO_PAR_BE_BE0_BE0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE0_BE0	/;"	d
GPIO_PAR_BE_BE0_FB_TSZ0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE0_FB_TSZ0	/;"	d
GPIO_PAR_BE_BE0_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE0_GPIO	/;"	d
GPIO_PAR_BE_BE0_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE0_GPIO	/;"	d
GPIO_PAR_BE_BE0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE0_GPIO	/;"	d
GPIO_PAR_BE_BE0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE0_MASK	/;"	d
GPIO_PAR_BE_BE1_BE1	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE1_BE1	/;"	d
GPIO_PAR_BE_BE1_BE1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE1_BE1	/;"	d
GPIO_PAR_BE_BE1_BE1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE1_BE1	/;"	d
GPIO_PAR_BE_BE1_FB_TSZ1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE1_FB_TSZ1	/;"	d
GPIO_PAR_BE_BE1_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE1_GPIO	/;"	d
GPIO_PAR_BE_BE1_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE1_GPIO	/;"	d
GPIO_PAR_BE_BE1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE1_GPIO	/;"	d
GPIO_PAR_BE_BE1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE1_MASK	/;"	d
GPIO_PAR_BE_BE2_BE2	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE2_BE2	/;"	d
GPIO_PAR_BE_BE2_BE2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE2_BE2	/;"	d
GPIO_PAR_BE_BE2_BE2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE2_BE2	/;"	d
GPIO_PAR_BE_BE2_CS2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE2_CS2	/;"	d
GPIO_PAR_BE_BE2_FB_A0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE2_FB_A0	/;"	d
GPIO_PAR_BE_BE2_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE2_GPIO	/;"	d
GPIO_PAR_BE_BE2_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE2_GPIO	/;"	d
GPIO_PAR_BE_BE2_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE2_GPIO	/;"	d
GPIO_PAR_BE_BE2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE2_MASK	/;"	d
GPIO_PAR_BE_BE2_NFC_CLE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE2_NFC_CLE	/;"	d
GPIO_PAR_BE_BE2_TSIZ0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE2_TSIZ0	/;"	d
GPIO_PAR_BE_BE2_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE2_UNMASK	/;"	d
GPIO_PAR_BE_BE3_BE3	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE3_BE3	/;"	d
GPIO_PAR_BE_BE3_BE3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE3_BE3	/;"	d
GPIO_PAR_BE_BE3_BE3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE3_BE3	/;"	d
GPIO_PAR_BE_BE3_CS3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE3_CS3	/;"	d
GPIO_PAR_BE_BE3_FB_A1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE3_FB_A1	/;"	d
GPIO_PAR_BE_BE3_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_BE3_GPIO	/;"	d
GPIO_PAR_BE_BE3_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE3_GPIO	/;"	d
GPIO_PAR_BE_BE3_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE3_GPIO	/;"	d
GPIO_PAR_BE_BE3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE3_MASK	/;"	d
GPIO_PAR_BE_BE3_NFC_ALE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BE3_NFC_ALE	/;"	d
GPIO_PAR_BE_BE3_TSIZ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE3_TSIZ1	/;"	d
GPIO_PAR_BE_BE3_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BE3_UNMASK	/;"	d
GPIO_PAR_BE_BS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BS0(/;"	d
GPIO_PAR_BE_BS0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BS0	/;"	d
GPIO_PAR_BE_BS1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BS1(/;"	d
GPIO_PAR_BE_BS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BS1	/;"	d
GPIO_PAR_BE_BS2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BS2(/;"	d
GPIO_PAR_BE_BS2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BS2(/;"	d
GPIO_PAR_BE_BS3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_BE_BS3(/;"	d
GPIO_PAR_BE_BS3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_BE_BS3(/;"	d
GPIO_PAR_BE_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_BE_UNMASK	/;"	d
GPIO_PAR_BS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BS(/;"	d
GPIO_PAR_BS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BS_MASK	/;"	d
GPIO_PAR_BUSCTL_OE	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_OE	/;"	d
GPIO_PAR_BUSCTL_OE	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_OE	/;"	d
GPIO_PAR_BUSCTL_OE_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_OE_GPIO	/;"	d
GPIO_PAR_BUSCTL_OE_OE	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_OE_OE	/;"	d
GPIO_PAR_BUSCTL_RWB	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_RWB	/;"	d
GPIO_PAR_BUSCTL_RWB	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_RWB	/;"	d
GPIO_PAR_BUSCTL_RWB_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_RWB_GPIO	/;"	d
GPIO_PAR_BUSCTL_RWB_RWB	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_RWB_RWB	/;"	d
GPIO_PAR_BUSCTL_TA	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TA	/;"	d
GPIO_PAR_BUSCTL_TA	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TA	/;"	d
GPIO_PAR_BUSCTL_TA_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TA_GPIO	/;"	d
GPIO_PAR_BUSCTL_TA_TA	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TA_TA	/;"	d
GPIO_PAR_BUSCTL_TEA	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TEA(/;"	d
GPIO_PAR_BUSCTL_TEA_DREQ1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TEA_DREQ1	/;"	d
GPIO_PAR_BUSCTL_TEA_EXTBUS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TEA_EXTBUS	/;"	d
GPIO_PAR_BUSCTL_TEA_GPIO	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TEA_GPIO	/;"	d
GPIO_PAR_BUSCTL_TEA_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TEA_MASK	/;"	d
GPIO_PAR_BUSCTL_TIP	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TIP(/;"	d
GPIO_PAR_BUSCTL_TIP_DREQ0	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TIP_DREQ0	/;"	d
GPIO_PAR_BUSCTL_TIP_EXTBUS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TIP_EXTBUS	/;"	d
GPIO_PAR_BUSCTL_TIP_GPIO	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TIP_GPIO	/;"	d
GPIO_PAR_BUSCTL_TIP_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TIP_MASK	/;"	d
GPIO_PAR_BUSCTL_TS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TS(/;"	d
GPIO_PAR_BUSCTL_TS	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TS(/;"	d
GPIO_PAR_BUSCTL_TSIZ0	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TSIZ0	/;"	d
GPIO_PAR_BUSCTL_TSIZ1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TSIZ1	/;"	d
GPIO_PAR_BUSCTL_TS_DACK0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TS_DACK0	/;"	d
GPIO_PAR_BUSCTL_TS_DACK2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TS_DACK2	/;"	d
GPIO_PAR_BUSCTL_TS_EXTBUS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TS_EXTBUS	/;"	d
GPIO_PAR_BUSCTL_TS_GPIO	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TS_GPIO	/;"	d
GPIO_PAR_BUSCTL_TS_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TS_GPIO	/;"	d
GPIO_PAR_BUSCTL_TS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_BUSCTL_TS_MASK	/;"	d
GPIO_PAR_BUSCTL_TS_TS	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_BUSCTL_TS_TS	/;"	d
GPIO_PAR_CANI2C_CAN1RX	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1RX(/;"	d
GPIO_PAR_CANI2C_CAN1RX_CAN1RX	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1RX_CAN1RX	/;"	d
GPIO_PAR_CANI2C_CAN1RX_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1RX_GPIO	/;"	d
GPIO_PAR_CANI2C_CAN1RX_I2C1SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1RX_I2C1SDA	/;"	d
GPIO_PAR_CANI2C_CAN1RX_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1RX_MASK	/;"	d
GPIO_PAR_CANI2C_CAN1RX_U9RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1RX_U9RXD	/;"	d
GPIO_PAR_CANI2C_CAN1TX	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1TX(/;"	d
GPIO_PAR_CANI2C_CAN1TX_CAN1TX	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1TX_CAN1TX	/;"	d
GPIO_PAR_CANI2C_CAN1TX_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1TX_GPIO	/;"	d
GPIO_PAR_CANI2C_CAN1TX_I2C1SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1TX_I2C1SCL	/;"	d
GPIO_PAR_CANI2C_CAN1TX_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1TX_MASK	/;"	d
GPIO_PAR_CANI2C_CAN1TX_U9TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_CAN1TX_U9TXD	/;"	d
GPIO_PAR_CANI2C_I2C0SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SCL(/;"	d
GPIO_PAR_CANI2C_I2C0SCL_CAN0TX	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SCL_CAN0TX	/;"	d
GPIO_PAR_CANI2C_I2C0SCL_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SCL_GPIO	/;"	d
GPIO_PAR_CANI2C_I2C0SCL_I2C0SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SCL_I2C0SCL	/;"	d
GPIO_PAR_CANI2C_I2C0SCL_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SCL_MASK	/;"	d
GPIO_PAR_CANI2C_I2C0SCL_U8TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SCL_U8TXD	/;"	d
GPIO_PAR_CANI2C_I2C0SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SDA(/;"	d
GPIO_PAR_CANI2C_I2C0SDA_CAN0RX	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SDA_CAN0RX	/;"	d
GPIO_PAR_CANI2C_I2C0SDA_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SDA_GPIO	/;"	d
GPIO_PAR_CANI2C_I2C0SDA_I2C0SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SDA_I2C0SDA	/;"	d
GPIO_PAR_CANI2C_I2C0SDA_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SDA_MASK	/;"	d
GPIO_PAR_CANI2C_I2C0SDA_U8RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CANI2C_I2C0SDA_U8RXD	/;"	d
GPIO_PAR_CS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS(/;"	d
GPIO_PAR_CS0_CS0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS0_CS0	/;"	d
GPIO_PAR_CS0_CS4	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS0_CS4	/;"	d
GPIO_PAR_CS0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS0_UNMASK	/;"	d
GPIO_PAR_CS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS1	/;"	d
GPIO_PAR_CS1_CS1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_CS1_CS1	/;"	d
GPIO_PAR_CS1_CS1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS1_CS1	/;"	d
GPIO_PAR_CS1_CS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS1_CS1	/;"	d
GPIO_PAR_CS1_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS1_GPIO	/;"	d
GPIO_PAR_CS1_SDCS1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_CS1_SDCS1	/;"	d
GPIO_PAR_CS1_SDCS1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS1_SDCS1	/;"	d
GPIO_PAR_CS1_SDCS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS1_SDCS1	/;"	d
GPIO_PAR_CS1_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_CS1_UNMASK	/;"	d
GPIO_PAR_CS1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS1_UNMASK	/;"	d
GPIO_PAR_CS2	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_CS2	/;"	d
GPIO_PAR_CS2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS2	/;"	d
GPIO_PAR_CS3	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_CS3	/;"	d
GPIO_PAR_CS3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS3	/;"	d
GPIO_PAR_CS4	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS4	/;"	d
GPIO_PAR_CS4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS4	/;"	d
GPIO_PAR_CS5	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_CS5	/;"	d
GPIO_PAR_CS5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_CS5	/;"	d
GPIO_PAR_CS_CS0	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_CS_CS0	/;"	d
GPIO_PAR_CS_CS0_CS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS0_CS0	/;"	d
GPIO_PAR_CS_CS1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS1	/;"	d
GPIO_PAR_CS_CS1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS1(/;"	d
GPIO_PAR_CS_CS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS1	/;"	d
GPIO_PAR_CS_CS1_CS1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS1_CS1	/;"	d
GPIO_PAR_CS_CS1_CS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS1_CS1	/;"	d
GPIO_PAR_CS_CS1_FBCS1	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_CS_CS1_FBCS1	/;"	d
GPIO_PAR_CS_CS1_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_CS_CS1_GPIO	/;"	d
GPIO_PAR_CS_CS1_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS1_GPIO	/;"	d
GPIO_PAR_CS_CS1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS1_GPIO	/;"	d
GPIO_PAR_CS_CS1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS1_MASK	/;"	d
GPIO_PAR_CS_CS1_NFC_CE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS1_NFC_CE	/;"	d
GPIO_PAR_CS_CS1_SDCS1	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_CS_CS1_SDCS1	/;"	d
GPIO_PAR_CS_CS2	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_CS_CS2	/;"	d
GPIO_PAR_CS_CS2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS2	/;"	d
GPIO_PAR_CS_CS2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS2	/;"	d
GPIO_PAR_CS_CS2_CS2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS2_CS2	/;"	d
GPIO_PAR_CS_CS2_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS2_GPIO	/;"	d
GPIO_PAR_CS_CS3	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_CS_CS3	/;"	d
GPIO_PAR_CS_CS3	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS3	/;"	d
GPIO_PAR_CS_CS3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS3	/;"	d
GPIO_PAR_CS_CS3_CS3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS3_CS3	/;"	d
GPIO_PAR_CS_CS3_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_CS_CS3_GPIO	/;"	d
GPIO_PAR_CS_CS4	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS4	/;"	d
GPIO_PAR_CS_CS4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS4(/;"	d
GPIO_PAR_CS_CS4_CS4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS4_CS4	/;"	d
GPIO_PAR_CS_CS4_DREQ1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS4_DREQ1	/;"	d
GPIO_PAR_CS_CS4_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS4_GPIO	/;"	d
GPIO_PAR_CS_CS4_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS4_MASK	/;"	d
GPIO_PAR_CS_CS5	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS5	/;"	d
GPIO_PAR_CS_CS5	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS5(/;"	d
GPIO_PAR_CS_CS5_CS5	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS5_CS5	/;"	d
GPIO_PAR_CS_CS5_DACK1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS5_DACK1	/;"	d
GPIO_PAR_CS_CS5_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS5_GPIO	/;"	d
GPIO_PAR_CS_CS5_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_CS_CS5_MASK	/;"	d
GPIO_PAR_CS_CS6	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS6	/;"	d
GPIO_PAR_CS_CS7	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_CS7	/;"	d
GPIO_PAR_CS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_MASK	/;"	d
GPIO_PAR_CS_SD2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_SD2	/;"	d
GPIO_PAR_CS_SD3	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_CS_SD3	/;"	d
GPIO_PAR_DEBUGH0_PST0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH0_PST0	/;"	d
GPIO_PAR_DEBUGH0_PST1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH0_PST1	/;"	d
GPIO_PAR_DEBUGH0_PST2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH0_PST2	/;"	d
GPIO_PAR_DEBUGH0_PST3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH0_PST3	/;"	d
GPIO_PAR_DEBUGH1_DAT0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH1_DAT0	/;"	d
GPIO_PAR_DEBUGH1_DAT1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH1_DAT1	/;"	d
GPIO_PAR_DEBUGH1_DAT2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH1_DAT2	/;"	d
GPIO_PAR_DEBUGH1_DAT3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGH1_DAT3	/;"	d
GPIO_PAR_DEBUGL_ALLPST	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DEBUGL_ALLPST	/;"	d
GPIO_PAR_DEBUG_ALLPST	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DEBUG_ALLPST	/;"	d
GPIO_PAR_DMA_DACK0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK0(/;"	d
GPIO_PAR_DMA_DACK0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DACK0(/;"	d
GPIO_PAR_DMA_DACK0_DACK1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK0_DACK1	/;"	d
GPIO_PAR_DMA_DACK0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK0_GPIO	/;"	d
GPIO_PAR_DMA_DACK0_PCS3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK0_PCS3	/;"	d
GPIO_PAR_DMA_DACK0_ULPI_DIR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK0_ULPI_DIR	/;"	d
GPIO_PAR_DMA_DACK0_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK0_UNMASK	/;"	d
GPIO_PAR_DMA_DACK1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK1(/;"	d
GPIO_PAR_DMA_DACK1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DACK1(/;"	d
GPIO_PAR_DMA_DACK1_DACK1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK1_DACK1	/;"	d
GPIO_PAR_DMA_DACK1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK1_GPIO	/;"	d
GPIO_PAR_DMA_DACK1_ULPI_DIR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK1_ULPI_DIR	/;"	d
GPIO_PAR_DMA_DACK1_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DACK1_UNMASK	/;"	d
GPIO_PAR_DMA_DACKx_DACK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DACKx_DACK	/;"	d
GPIO_PAR_DMA_DACKx_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DACKx_GPIO	/;"	d
GPIO_PAR_DMA_DACKx_TOUT	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DACKx_TOUT	/;"	d
GPIO_PAR_DMA_DREQ0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ0	/;"	d
GPIO_PAR_DMA_DREQ0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DREQ0(/;"	d
GPIO_PAR_DMA_DREQ0_DREQ0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ0_DREQ0	/;"	d
GPIO_PAR_DMA_DREQ0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ0_GPIO	/;"	d
GPIO_PAR_DMA_DREQ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ1(/;"	d
GPIO_PAR_DMA_DREQ1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DREQ1(/;"	d
GPIO_PAR_DMA_DREQ1_DREQ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ1_DREQ1	/;"	d
GPIO_PAR_DMA_DREQ1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ1_GPIO	/;"	d
GPIO_PAR_DMA_DREQ1_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ1_UNMASK	/;"	d
GPIO_PAR_DMA_DREQ1_USB_CLKIN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DMA_DREQ1_USB_CLKIN	/;"	d
GPIO_PAR_DMA_DREQx_DREQ	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DREQx_DREQ	/;"	d
GPIO_PAR_DMA_DREQx_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DREQx_GPIO	/;"	d
GPIO_PAR_DMA_DREQx_TIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DMA_DREQx_TIN	/;"	d
GPIO_PAR_DSPI0_PCS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0(/;"	d
GPIO_PAR_DSPI0_PCS0_DSPI0PCS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0_DSPI0PCS0	/;"	d
GPIO_PAR_DSPI0_PCS0_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0_GPIO	/;"	d
GPIO_PAR_DSPI0_PCS0_I2C3SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0_I2C3SDA	/;"	d
GPIO_PAR_DSPI0_PCS0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0_MASK	/;"	d
GPIO_PAR_DSPI0_PCS0_SDHC_DAT3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0_SDHC_DAT3	/;"	d
GPIO_PAR_DSPI0_PCS0_SS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_PCS0_SS	/;"	d
GPIO_PAR_DSPI0_SCK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK(/;"	d
GPIO_PAR_DSPI0_SCK_DSPI0SCK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK_DSPI0SCK	/;"	d
GPIO_PAR_DSPI0_SCK_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK_GPIO	/;"	d
GPIO_PAR_DSPI0_SCK_I2C3SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK_I2C3SCL	/;"	d
GPIO_PAR_DSPI0_SCK_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK_MASK	/;"	d
GPIO_PAR_DSPI0_SCK_SBF_CK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK_SBF_CK	/;"	d
GPIO_PAR_DSPI0_SCK_SDHC_CLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SCK_SDHC_CLK	/;"	d
GPIO_PAR_DSPI0_SIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN(/;"	d
GPIO_PAR_DSPI0_SIN_DSPI0SIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN_DSPI0SIN	/;"	d
GPIO_PAR_DSPI0_SIN_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN_GPIO	/;"	d
GPIO_PAR_DSPI0_SIN_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN_MASK	/;"	d
GPIO_PAR_DSPI0_SIN_SBF_DI	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN_SBF_DI	/;"	d
GPIO_PAR_DSPI0_SIN_SDHC_CMD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN_SDHC_CMD	/;"	d
GPIO_PAR_DSPI0_SIN_U3RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SIN_U3RXD	/;"	d
GPIO_PAR_DSPI0_SOUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT(/;"	d
GPIO_PAR_DSPI0_SOUT_DSPI0SOUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT_DSPI0SOUT	/;"	d
GPIO_PAR_DSPI0_SOUT_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT_GPIO	/;"	d
GPIO_PAR_DSPI0_SOUT_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT_MASK	/;"	d
GPIO_PAR_DSPI0_SOUT_SBF_DO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT_SBF_DO	/;"	d
GPIO_PAR_DSPI0_SOUT_SDHC_DAT0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT_SDHC_DAT0	/;"	d
GPIO_PAR_DSPI0_SOUT_U3TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPI0_SOUT_U3TXD	/;"	d
GPIO_PAR_DSPIH_PCS0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_PCS0	/;"	d
GPIO_PAR_DSPIH_PCS0_U2RTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_PCS0_U2RTS	/;"	d
GPIO_PAR_DSPIH_PCS0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_PCS0_UNMASK	/;"	d
GPIO_PAR_DSPIH_SCK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SCK	/;"	d
GPIO_PAR_DSPIH_SCK_U2CTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SCK_U2CTS	/;"	d
GPIO_PAR_DSPIH_SCK_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SCK_UNMASK	/;"	d
GPIO_PAR_DSPIH_SIN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SIN	/;"	d
GPIO_PAR_DSPIH_SIN_U2RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SIN_U2RXD	/;"	d
GPIO_PAR_DSPIH_SIN_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SIN_UNMASK	/;"	d
GPIO_PAR_DSPIH_SOUT	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SOUT	/;"	d
GPIO_PAR_DSPIH_SOUT_U2TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SOUT_U2TXD	/;"	d
GPIO_PAR_DSPIH_SOUT_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIH_SOUT_UNMASK	/;"	d
GPIO_PAR_DSPIL_PCS1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS1	/;"	d
GPIO_PAR_DSPIL_PCS1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS1_UNMASK	/;"	d
GPIO_PAR_DSPIL_PCS2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS2	/;"	d
GPIO_PAR_DSPIL_PCS2_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS2_UNMASK	/;"	d
GPIO_PAR_DSPIL_PCS2_USBH_OC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS2_USBH_OC	/;"	d
GPIO_PAR_DSPIL_PCS3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS3	/;"	d
GPIO_PAR_DSPIL_PCS3_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS3_UNMASK	/;"	d
GPIO_PAR_DSPIL_PCS3_USBH_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_DSPIL_PCS3_USBH_EN	/;"	d
GPIO_PAR_DSPIOW_DSPI0PSC1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_DSPI0PSC1	/;"	d
GPIO_PAR_DSPIOW_OWDAT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_OWDAT	/;"	d
GPIO_PAR_DSPIOW_OWDAT_DACK0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_OWDAT_DACK0	/;"	d
GPIO_PAR_DSPIOW_OWDAT_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_OWDAT_GPIO	/;"	d
GPIO_PAR_DSPIOW_OWDAT_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_OWDAT_MASK	/;"	d
GPIO_PAR_DSPIOW_OWDAT_OWDAT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_OWDAT_OWDAT	/;"	d
GPIO_PAR_DSPIOW_SBF_CS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_DSPIOW_SBF_CS	/;"	d
GPIO_PAR_DSPI_CS0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS0(/;"	d
GPIO_PAR_DSPI_CS0_DSPICS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS0_DSPICS	/;"	d
GPIO_PAR_DSPI_CS0_FSYNC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS0_FSYNC	/;"	d
GPIO_PAR_DSPI_CS0_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS0_GPIO	/;"	d
GPIO_PAR_DSPI_CS0_RTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS0_RTS	/;"	d
GPIO_PAR_DSPI_CS2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS2(/;"	d
GPIO_PAR_DSPI_CS2_CANTX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS2_CANTX	/;"	d
GPIO_PAR_DSPI_CS2_DSPICS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS2_DSPICS	/;"	d
GPIO_PAR_DSPI_CS2_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS2_GPIO	/;"	d
GPIO_PAR_DSPI_CS2_TOUT	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS2_TOUT	/;"	d
GPIO_PAR_DSPI_CS3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS3(/;"	d
GPIO_PAR_DSPI_CS3_CANTX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS3_CANTX	/;"	d
GPIO_PAR_DSPI_CS3_DSPICS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS3_DSPICS	/;"	d
GPIO_PAR_DSPI_CS3_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS3_GPIO	/;"	d
GPIO_PAR_DSPI_CS3_TOUT	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS3_TOUT	/;"	d
GPIO_PAR_DSPI_CS5	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_CS5	/;"	d
GPIO_PAR_DSPI_PCS0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS0	/;"	d
GPIO_PAR_DSPI_PCS0_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_PCS0_GPIO	/;"	d
GPIO_PAR_DSPI_PCS0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS0_GPIO	/;"	d
GPIO_PAR_DSPI_PCS0_PCS0	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_PCS0_PCS0	/;"	d
GPIO_PAR_DSPI_PCS0_PCS0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS0_PCS0	/;"	d
GPIO_PAR_DSPI_PCS0_U2RTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_PCS0_U2RTS	/;"	d
GPIO_PAR_DSPI_PCS0_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_PCS0_UNMASK	/;"	d
GPIO_PAR_DSPI_PCS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS1	/;"	d
GPIO_PAR_DSPI_PCS1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS1_GPIO	/;"	d
GPIO_PAR_DSPI_PCS1_PCS1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS1_PCS1	/;"	d
GPIO_PAR_DSPI_PCS2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS2	/;"	d
GPIO_PAR_DSPI_PCS2_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS2_GPIO	/;"	d
GPIO_PAR_DSPI_PCS2_PCS2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS2_PCS2	/;"	d
GPIO_PAR_DSPI_PCS5	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS5	/;"	d
GPIO_PAR_DSPI_PCS5_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS5_GPIO	/;"	d
GPIO_PAR_DSPI_PCS5_PCS5	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_PCS5_PCS5	/;"	d
GPIO_PAR_DSPI_SCK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SCK	/;"	d
GPIO_PAR_DSPI_SCK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SCK(/;"	d
GPIO_PAR_DSPI_SCK_BCLK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SCK_BCLK	/;"	d
GPIO_PAR_DSPI_SCK_CTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SCK_CTS	/;"	d
GPIO_PAR_DSPI_SCK_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SCK_GPIO	/;"	d
GPIO_PAR_DSPI_SCK_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SCK_GPIO	/;"	d
GPIO_PAR_DSPI_SCK_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SCK_GPIO	/;"	d
GPIO_PAR_DSPI_SCK_SCK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SCK_SCK	/;"	d
GPIO_PAR_DSPI_SCK_SCK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SCK_SCK	/;"	d
GPIO_PAR_DSPI_SCK_SCK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SCK_SCK	/;"	d
GPIO_PAR_DSPI_SCK_U2CTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SCK_U2CTS	/;"	d
GPIO_PAR_DSPI_SCK_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SCK_UNMASK	/;"	d
GPIO_PAR_DSPI_SIN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SIN	/;"	d
GPIO_PAR_DSPI_SIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SIN(/;"	d
GPIO_PAR_DSPI_SIN_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SIN_GPIO	/;"	d
GPIO_PAR_DSPI_SIN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SIN_GPIO	/;"	d
GPIO_PAR_DSPI_SIN_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SIN_GPIO	/;"	d
GPIO_PAR_DSPI_SIN_RXD	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SIN_RXD	/;"	d
GPIO_PAR_DSPI_SIN_SIN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SIN_SIN	/;"	d
GPIO_PAR_DSPI_SIN_SIN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SIN_SIN	/;"	d
GPIO_PAR_DSPI_SIN_SIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SIN_SIN	/;"	d
GPIO_PAR_DSPI_SIN_U2RXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SIN_U2RXD	/;"	d
GPIO_PAR_DSPI_SIN_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SIN_UNMASK	/;"	d
GPIO_PAR_DSPI_SOUT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SOUT	/;"	d
GPIO_PAR_DSPI_SOUT	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SOUT(/;"	d
GPIO_PAR_DSPI_SOUT_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SOUT_GPIO	/;"	d
GPIO_PAR_DSPI_SOUT_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SOUT_GPIO	/;"	d
GPIO_PAR_DSPI_SOUT_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SOUT_GPIO	/;"	d
GPIO_PAR_DSPI_SOUT_SOUT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SOUT_SOUT	/;"	d
GPIO_PAR_DSPI_SOUT_SOUT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_DSPI_SOUT_SOUT	/;"	d
GPIO_PAR_DSPI_SOUT_SOUT	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SOUT_SOUT	/;"	d
GPIO_PAR_DSPI_SOUT_TXD	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_DSPI_SOUT_TXD	/;"	d
GPIO_PAR_DSPI_SOUT_U2TXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SOUT_U2TXD	/;"	d
GPIO_PAR_DSPI_SOUT_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_DSPI_SOUT_UNMASK	/;"	d
GPIO_PAR_DT0IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0IN(/;"	d
GPIO_PAR_DT0IN_DREQ0	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0IN_DREQ0	/;"	d
GPIO_PAR_DT0IN_DT0IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0IN_DT0IN	/;"	d
GPIO_PAR_DT0IN_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0IN_MASK	/;"	d
GPIO_PAR_DT0OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0OUT(/;"	d
GPIO_PAR_DT0OUT_DACK0	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0OUT_DACK0	/;"	d
GPIO_PAR_DT0OUT_DT0OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0OUT_DT0OUT	/;"	d
GPIO_PAR_DT0OUT_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT0OUT_MASK	/;"	d
GPIO_PAR_DT1IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1IN(/;"	d
GPIO_PAR_DT1IN_DREQ1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1IN_DREQ1	/;"	d
GPIO_PAR_DT1IN_DT1IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1IN_DT1IN	/;"	d
GPIO_PAR_DT1IN_DT1OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1IN_DT1OUT	/;"	d
GPIO_PAR_DT1IN_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1IN_MASK	/;"	d
GPIO_PAR_DT1OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1OUT(/;"	d
GPIO_PAR_DT1OUT_DACK1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1OUT_DACK1	/;"	d
GPIO_PAR_DT1OUT_DT1OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1OUT_DT1OUT	/;"	d
GPIO_PAR_DT1OUT_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT1OUT_MASK	/;"	d
GPIO_PAR_DT2IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2IN(/;"	d
GPIO_PAR_DT2IN_DREQ2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2IN_DREQ2	/;"	d
GPIO_PAR_DT2IN_DT2IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2IN_DT2IN	/;"	d
GPIO_PAR_DT2IN_DT2OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2IN_DT2OUT	/;"	d
GPIO_PAR_DT2IN_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2IN_MASK	/;"	d
GPIO_PAR_DT2OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2OUT(/;"	d
GPIO_PAR_DT2OUT_DACK2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2OUT_DACK2	/;"	d
GPIO_PAR_DT2OUT_DT2OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2OUT_DT2OUT	/;"	d
GPIO_PAR_DT2OUT_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT2OUT_MASK	/;"	d
GPIO_PAR_DT3IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3IN(/;"	d
GPIO_PAR_DT3IN_DT3IN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3IN_DT3IN	/;"	d
GPIO_PAR_DT3IN_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3IN_MASK	/;"	d
GPIO_PAR_DT3IN_QSPICS2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3IN_QSPICS2	/;"	d
GPIO_PAR_DT3IN_U2CTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3IN_U2CTS	/;"	d
GPIO_PAR_DT3OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3OUT(/;"	d
GPIO_PAR_DT3OUT_DT3OUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3OUT_DT3OUT	/;"	d
GPIO_PAR_DT3OUT_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3OUT_MASK	/;"	d
GPIO_PAR_DT3OUT_QSPICS3	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3OUT_QSPICS3	/;"	d
GPIO_PAR_DT3OUT_U2RTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_DT3OUT_U2RTS	/;"	d
GPIO_PAR_ETPU_LTPU_ODIS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_ETPU_LTPU_ODIS	/;"	d
GPIO_PAR_ETPU_TCRCLK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_ETPU_TCRCLK	/;"	d
GPIO_PAR_ETPU_UTPU_ODIS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_ETPU_UTPU_ODIS	/;"	d
GPIO_PAR_FBCS_CS1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCS_CS1	/;"	d
GPIO_PAR_FBCS_CS2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCS_CS2	/;"	d
GPIO_PAR_FBCS_CS3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCS_CS3	/;"	d
GPIO_PAR_FBCS_CS4	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCS_CS4	/;"	d
GPIO_PAR_FBCS_CS5	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCS_CS5	/;"	d
GPIO_PAR_FBCTL_ALE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_ALE(/;"	d
GPIO_PAR_FBCTL_ALE_FB_ALE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_ALE_FB_ALE	/;"	d
GPIO_PAR_FBCTL_ALE_FB_TS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_ALE_FB_TS	/;"	d
GPIO_PAR_FBCTL_ALE_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_ALE_GPIO	/;"	d
GPIO_PAR_FBCTL_ALE_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_ALE_MASK	/;"	d
GPIO_PAR_FBCTL_BWE0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_BWE0	/;"	d
GPIO_PAR_FBCTL_BWE1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_BWE1	/;"	d
GPIO_PAR_FBCTL_BWE2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_BWE2	/;"	d
GPIO_PAR_FBCTL_BWE3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_BWE3	/;"	d
GPIO_PAR_FBCTL_FBCLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_FBCLK	/;"	d
GPIO_PAR_FBCTL_OE	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FBCTL_OE	/;"	d
GPIO_PAR_FBCTL_OE	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_OE	/;"	d
GPIO_PAR_FBCTL_OE	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FBCTL_OE	/;"	d
GPIO_PAR_FBCTL_OE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_OE(/;"	d
GPIO_PAR_FBCTL_OE	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_OE	/;"	d
GPIO_PAR_FBCTL_OE	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_OE	/;"	d
GPIO_PAR_FBCTL_OE_FB_OE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_OE_FB_OE	/;"	d
GPIO_PAR_FBCTL_OE_FB_TBST	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_OE_FB_TBST	/;"	d
GPIO_PAR_FBCTL_OE_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_OE_GPIO	/;"	d
GPIO_PAR_FBCTL_OE_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_OE_GPIO	/;"	d
GPIO_PAR_FBCTL_OE_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_OE_MASK	/;"	d
GPIO_PAR_FBCTL_OE_NFC_RE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_OE_NFC_RE	/;"	d
GPIO_PAR_FBCTL_OE_OE	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_OE_OE	/;"	d
GPIO_PAR_FBCTL_RW	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_RW	/;"	d
GPIO_PAR_FBCTL_RW	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_RW	/;"	d
GPIO_PAR_FBCTL_RW	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_RW	/;"	d
GPIO_PAR_FBCTL_RWB	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FBCTL_RWB	/;"	d
GPIO_PAR_FBCTL_RWB	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FBCTL_RWB	/;"	d
GPIO_PAR_FBCTL_RWB	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_RWB(/;"	d
GPIO_PAR_FBCTL_RWB_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_RWB_GPIO	/;"	d
GPIO_PAR_FBCTL_RWB_RWB	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_RWB_RWB	/;"	d
GPIO_PAR_FBCTL_RWB_TBST	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_RWB_TBST	/;"	d
GPIO_PAR_FBCTL_RW_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_RW_GPIO	/;"	d
GPIO_PAR_FBCTL_RW_RW	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_RW_RW	/;"	d
GPIO_PAR_FBCTL_TA	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FBCTL_TA	/;"	d
GPIO_PAR_FBCTL_TA	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_TA	/;"	d
GPIO_PAR_FBCTL_TA	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FBCTL_TA	/;"	d
GPIO_PAR_FBCTL_TA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_TA(/;"	d
GPIO_PAR_FBCTL_TA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TA	/;"	d
GPIO_PAR_FBCTL_TA	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_TA	/;"	d
GPIO_PAR_FBCTL_TA_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_TA_GPIO	/;"	d
GPIO_PAR_FBCTL_TA_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TA_GPIO	/;"	d
GPIO_PAR_FBCTL_TA_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_TA_MASK	/;"	d
GPIO_PAR_FBCTL_TA_NFC_RB	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_TA_NFC_RB	/;"	d
GPIO_PAR_FBCTL_TA_TA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FBCTL_TA_TA	/;"	d
GPIO_PAR_FBCTL_TA_TA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TA_TA	/;"	d
GPIO_PAR_FBCTL_TS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FBCTL_TS	/;"	d
GPIO_PAR_FBCTL_TS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TS(/;"	d
GPIO_PAR_FBCTL_TS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_TS(/;"	d
GPIO_PAR_FBCTL_TS_ALE	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TS_ALE	/;"	d
GPIO_PAR_FBCTL_TS_DMA	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FBCTL_TS_DMA	/;"	d
GPIO_PAR_FBCTL_TS_DMAACK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_TS_DMAACK	/;"	d
GPIO_PAR_FBCTL_TS_FBTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_TS_FBTS	/;"	d
GPIO_PAR_FBCTL_TS_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_TS_GPIO	/;"	d
GPIO_PAR_FBCTL_TS_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TS_GPIO	/;"	d
GPIO_PAR_FBCTL_TS_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_TS_GPIO	/;"	d
GPIO_PAR_FBCTL_TS_TBST	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TS_TBST	/;"	d
GPIO_PAR_FBCTL_TS_TBST	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_TS_TBST	/;"	d
GPIO_PAR_FBCTL_TS_TS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FBCTL_TS_TS	/;"	d
GPIO_PAR_FBCTL_TS_TS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TS_TS	/;"	d
GPIO_PAR_FBCTL_TS_TS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FBCTL_TS_TS	/;"	d
GPIO_PAR_FBCTL_TS_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FBCTL_TS_UNMASK	/;"	d
GPIO_PAR_FBCTL_TS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_FBCTL_TS_UNMASK	/;"	d
GPIO_PAR_FBCTL_TS_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FBCTL_TS_UNMASK	/;"	d
GPIO_PAR_FEC0_7W_FEC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FEC0_7W_FEC	/;"	d
GPIO_PAR_FEC0_RMII_FEC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FEC0_RMII_FEC	/;"	d
GPIO_PAR_FEC1_7W_FEC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FEC1_7W_FEC	/;"	d
GPIO_PAR_FEC1_RMII_FEC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FEC1_RMII_FEC	/;"	d
GPIO_PAR_FECI2CIRQ_E07	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E07	/;"	d
GPIO_PAR_FECI2CIRQ_E0MDC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E0MDC	/;"	d
GPIO_PAR_FECI2CIRQ_E0MDIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E0MDIO	/;"	d
GPIO_PAR_FECI2CIRQ_E0MII	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E0MII	/;"	d
GPIO_PAR_FECI2CIRQ_E17	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E17	/;"	d
GPIO_PAR_FECI2CIRQ_E1MDC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDC(/;"	d
GPIO_PAR_FECI2CIRQ_E1MDC_CANTX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDC_CANTX	/;"	d
GPIO_PAR_FECI2CIRQ_E1MDC_EMDC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDC_EMDC	/;"	d
GPIO_PAR_FECI2CIRQ_E1MDC_SCL	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDC_SCL	/;"	d
GPIO_PAR_FECI2CIRQ_E1MDIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDIO(/;"	d
GPIO_PAR_FECI2CIRQ_E1MDIO_CANRX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDIO_CANRX	/;"	d
GPIO_PAR_FECI2CIRQ_E1MDIO_EMDIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDIO_EMDIO	/;"	d
GPIO_PAR_FECI2CIRQ_E1MDIO_SDA	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MDIO_SDA	/;"	d
GPIO_PAR_FECI2CIRQ_E1MII	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_E1MII	/;"	d
GPIO_PAR_FECI2CIRQ_IRQ5	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_IRQ5	/;"	d
GPIO_PAR_FECI2CIRQ_IRQ6	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_IRQ6	/;"	d
GPIO_PAR_FECI2CIRQ_SCL	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_SCL	/;"	d
GPIO_PAR_FECI2CIRQ_SDA	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_FECI2CIRQ_SDA	/;"	d
GPIO_PAR_FECI2C_EMDC	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDC(/;"	d
GPIO_PAR_FECI2C_EMDC_FECEMDC	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDC_FECEMDC	/;"	d
GPIO_PAR_FECI2C_EMDC_I2CSCL	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDC_I2CSCL	/;"	d
GPIO_PAR_FECI2C_EMDC_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDC_MASK	/;"	d
GPIO_PAR_FECI2C_EMDC_U2TXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDC_U2TXD	/;"	d
GPIO_PAR_FECI2C_EMDIO	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDIO(/;"	d
GPIO_PAR_FECI2C_EMDIO_FECEMDIO	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDIO_FECEMDIO	/;"	d
GPIO_PAR_FECI2C_EMDIO_I2CSDA	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDIO_I2CSDA	/;"	d
GPIO_PAR_FECI2C_EMDIO_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDIO_MASK	/;"	d
GPIO_PAR_FECI2C_EMDIO_U2RXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_EMDIO_U2RXD	/;"	d
GPIO_PAR_FECI2C_I2C_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_I2C_UNMASK	/;"	d
GPIO_PAR_FECI2C_MDC	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDC(/;"	d
GPIO_PAR_FECI2C_MDC0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_MDC0	/;"	d
GPIO_PAR_FECI2C_MDC0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC0	/;"	d
GPIO_PAR_FECI2C_MDC0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC0_GPIO	/;"	d
GPIO_PAR_FECI2C_MDC0_MDC0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC0_MDC0	/;"	d
GPIO_PAR_FECI2C_MDC1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_MDC1	/;"	d
GPIO_PAR_FECI2C_MDC1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC1(/;"	d
GPIO_PAR_FECI2C_MDC1_ATA_DIOR	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC1_ATA_DIOR	/;"	d
GPIO_PAR_FECI2C_MDC1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC1_GPIO	/;"	d
GPIO_PAR_FECI2C_MDC1_MDC1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC1_MDC1	/;"	d
GPIO_PAR_FECI2C_MDC1_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDC1_UNMASK	/;"	d
GPIO_PAR_FECI2C_MDC_EMDC	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDC_EMDC	/;"	d
GPIO_PAR_FECI2C_MDC_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDC_GPIO	/;"	d
GPIO_PAR_FECI2C_MDC_MDC	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDC_MDC	/;"	d
GPIO_PAR_FECI2C_MDC_SCL	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDC_SCL	/;"	d
GPIO_PAR_FECI2C_MDC_SCL	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDC_SCL	/;"	d
GPIO_PAR_FECI2C_MDC_U2TXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDC_U2TXD	/;"	d
GPIO_PAR_FECI2C_MDC_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDC_UNMASK	/;"	d
GPIO_PAR_FECI2C_MDC_UTXD2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDC_UTXD2	/;"	d
GPIO_PAR_FECI2C_MDIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDIO(/;"	d
GPIO_PAR_FECI2C_MDIO0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_MDIO0	/;"	d
GPIO_PAR_FECI2C_MDIO0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO0	/;"	d
GPIO_PAR_FECI2C_MDIO0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO0_GPIO	/;"	d
GPIO_PAR_FECI2C_MDIO0_MDIO0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO0_MDIO0	/;"	d
GPIO_PAR_FECI2C_MDIO1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_MDIO1	/;"	d
GPIO_PAR_FECI2C_MDIO1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO1(/;"	d
GPIO_PAR_FECI2C_MDIO1_ATA_DIOW	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO1_ATA_DIOW	/;"	d
GPIO_PAR_FECI2C_MDIO1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO1_GPIO	/;"	d
GPIO_PAR_FECI2C_MDIO1_MDIO1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO1_MDIO1	/;"	d
GPIO_PAR_FECI2C_MDIO1_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_MDIO1_UNMASK	/;"	d
GPIO_PAR_FECI2C_MDIO_EMDIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDIO_EMDIO	/;"	d
GPIO_PAR_FECI2C_MDIO_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDIO_GPIO	/;"	d
GPIO_PAR_FECI2C_MDIO_MDIO	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDIO_MDIO	/;"	d
GPIO_PAR_FECI2C_MDIO_SDA	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDIO_SDA	/;"	d
GPIO_PAR_FECI2C_MDIO_SDA	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDIO_SDA	/;"	d
GPIO_PAR_FECI2C_MDIO_U2RXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDIO_U2RXD	/;"	d
GPIO_PAR_FECI2C_MDIO_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_MDIO_UNMASK	/;"	d
GPIO_PAR_FECI2C_MDIO_URXD2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_MDIO_URXD2	/;"	d
GPIO_PAR_FECI2C_RMII0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_RMII0_UNMASK	/;"	d
GPIO_PAR_FECI2C_RMII1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_RMII1_UNMASK	/;"	d
GPIO_PAR_FECI2C_RMII_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_RMII_UNMASK	/;"	d
GPIO_PAR_FECI2C_SCL	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SCL(/;"	d
GPIO_PAR_FECI2C_SCL	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SCL(/;"	d
GPIO_PAR_FECI2C_SCL	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SCL(/;"	d
GPIO_PAR_FECI2C_SCL	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SCL(/;"	d
GPIO_PAR_FECI2C_SCL_CAN0RX	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SCL_CAN0RX	/;"	d
GPIO_PAR_FECI2C_SCL_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SCL_GPIO	/;"	d
GPIO_PAR_FECI2C_SCL_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SCL_GPIO	/;"	d
GPIO_PAR_FECI2C_SCL_I2CSCL	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SCL_I2CSCL	/;"	d
GPIO_PAR_FECI2C_SCL_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SCL_MASK	/;"	d
GPIO_PAR_FECI2C_SCL_MDC1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SCL_MDC1	/;"	d
GPIO_PAR_FECI2C_SCL_SCL	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_SCL_SCL	/;"	d
GPIO_PAR_FECI2C_SCL_SCL	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SCL_SCL	/;"	d
GPIO_PAR_FECI2C_SCL_SCL	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SCL_SCL	/;"	d
GPIO_PAR_FECI2C_SCL_SCL	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SCL_SCL	/;"	d
GPIO_PAR_FECI2C_SCL_U2RXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_SCL_U2RXD	/;"	d
GPIO_PAR_FECI2C_SCL_U2RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SCL_U2RXD	/;"	d
GPIO_PAR_FECI2C_SCL_U2TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SCL_U2TXD	/;"	d
GPIO_PAR_FECI2C_SCL_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_SCL_UNMASK	/;"	d
GPIO_PAR_FECI2C_SCL_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SCL_UNMASK	/;"	d
GPIO_PAR_FECI2C_SCL_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SCL_UNMASK	/;"	d
GPIO_PAR_FECI2C_SCL_UTXD2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SCL_UTXD2	/;"	d
GPIO_PAR_FECI2C_SDA	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SDA(/;"	d
GPIO_PAR_FECI2C_SDA	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SDA(/;"	d
GPIO_PAR_FECI2C_SDA	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SDA(/;"	d
GPIO_PAR_FECI2C_SDA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SDA(/;"	d
GPIO_PAR_FECI2C_SDA_CAN0TX	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SDA_CAN0TX	/;"	d
GPIO_PAR_FECI2C_SDA_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SDA_GPIO	/;"	d
GPIO_PAR_FECI2C_SDA_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SDA_GPIO	/;"	d
GPIO_PAR_FECI2C_SDA_I2CSDA	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SDA_I2CSDA	/;"	d
GPIO_PAR_FECI2C_SDA_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_FECI2C_SDA_MASK	/;"	d
GPIO_PAR_FECI2C_SDA_MDIO1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SDA_MDIO1	/;"	d
GPIO_PAR_FECI2C_SDA_SDA	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_SDA_SDA	/;"	d
GPIO_PAR_FECI2C_SDA_SDA	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SDA_SDA	/;"	d
GPIO_PAR_FECI2C_SDA_SDA	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SDA_SDA	/;"	d
GPIO_PAR_FECI2C_SDA_SDA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SDA_SDA	/;"	d
GPIO_PAR_FECI2C_SDA_U2RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SDA_U2RXD	/;"	d
GPIO_PAR_FECI2C_SDA_U2TXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_SDA_U2TXD	/;"	d
GPIO_PAR_FECI2C_SDA_U2TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SDA_U2TXD	/;"	d
GPIO_PAR_FECI2C_SDA_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FECI2C_SDA_UNMASK	/;"	d
GPIO_PAR_FECI2C_SDA_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_FECI2C_SDA_UNMASK	/;"	d
GPIO_PAR_FECI2C_SDA_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FECI2C_SDA_UNMASK	/;"	d
GPIO_PAR_FECI2C_SDA_URXD2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FECI2C_SDA_URXD2	/;"	d
GPIO_PAR_FEC_7W	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_7W(/;"	d
GPIO_PAR_FEC_7W_FEC	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FEC_7W_FEC	/;"	d
GPIO_PAR_FEC_7W_FEC	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_7W_FEC	/;"	d
GPIO_PAR_FEC_7W_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_7W_GPIO	/;"	d
GPIO_PAR_FEC_7W_U1RTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FEC_7W_U1RTS	/;"	d
GPIO_PAR_FEC_7W_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FEC_7W_UNMASK	/;"	d
GPIO_PAR_FEC_7W_URTS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_7W_URTS1	/;"	d
GPIO_PAR_FEC_FEC	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC(/;"	d
GPIO_PAR_FEC_FEC0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0(/;"	d
GPIO_PAR_FEC_FEC0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0_GPIO	/;"	d
GPIO_PAR_FEC_FEC0_MII	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0_MII	/;"	d
GPIO_PAR_FEC_FEC0_RMII_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0_RMII_GPIO	/;"	d
GPIO_PAR_FEC_FEC0_RMII_ULPI	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0_RMII_ULPI	/;"	d
GPIO_PAR_FEC_FEC0_ULPI	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0_ULPI	/;"	d
GPIO_PAR_FEC_FEC0_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC0_UNMASK	/;"	d
GPIO_PAR_FEC_FEC1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1(/;"	d
GPIO_PAR_FEC_FEC1_ATA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1_ATA	/;"	d
GPIO_PAR_FEC_FEC1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1_GPIO	/;"	d
GPIO_PAR_FEC_FEC1_MII	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1_MII	/;"	d
GPIO_PAR_FEC_FEC1_RMII_ATA	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1_RMII_ATA	/;"	d
GPIO_PAR_FEC_FEC1_RMII_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1_RMII_GPIO	/;"	d
GPIO_PAR_FEC_FEC1_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_FEC_FEC1_UNMASK	/;"	d
GPIO_PAR_FEC_FEC_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_GPIO	/;"	d
GPIO_PAR_FEC_FEC_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_MASK	/;"	d
GPIO_PAR_FEC_FEC_MII	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_MII	/;"	d
GPIO_PAR_FEC_FEC_MIIFUL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_MIIFUL	/;"	d
GPIO_PAR_FEC_FEC_RMII0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0	/;"	d
GPIO_PAR_FEC_FEC_RMII0FUL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0FUL	/;"	d
GPIO_PAR_FEC_FEC_RMII0FUL_1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0FUL_1	/;"	d
GPIO_PAR_FEC_FEC_RMII0FUL_1FUL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0FUL_1FUL	/;"	d
GPIO_PAR_FEC_FEC_RMII0FUL_ULPI	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0FUL_ULPI	/;"	d
GPIO_PAR_FEC_FEC_RMII0_1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0_1	/;"	d
GPIO_PAR_FEC_FEC_RMII0_1FUL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII0_1FUL	/;"	d
GPIO_PAR_FEC_FEC_RMII1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII1	/;"	d
GPIO_PAR_FEC_FEC_RMII1FUL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII1FUL	/;"	d
GPIO_PAR_FEC_FEC_RMII_ULPI	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_FEC_FEC_RMII_ULPI	/;"	d
GPIO_PAR_FEC_MII	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_MII(/;"	d
GPIO_PAR_FEC_MII_FEC	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FEC_MII_FEC	/;"	d
GPIO_PAR_FEC_MII_FEC	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_MII_FEC	/;"	d
GPIO_PAR_FEC_MII_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_MII_GPIO	/;"	d
GPIO_PAR_FEC_MII_UART	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_FEC_MII_UART	/;"	d
GPIO_PAR_FEC_MII_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FEC_MII_UNMASK	/;"	d
GPIO_PAR_FEC_MII_UnCTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_FEC_MII_UnCTS	/;"	d
GPIO_PAR_I2C_SCL_CANTXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SCL_CANTXD	/;"	d
GPIO_PAR_I2C_SCL_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SCL_GPIO	/;"	d
GPIO_PAR_I2C_SCL_SCL	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SCL_SCL	/;"	d
GPIO_PAR_I2C_SCL_U2TXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SCL_U2TXD	/;"	d
GPIO_PAR_I2C_SCL_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SCL_UNMASK	/;"	d
GPIO_PAR_I2C_SDA_CANRXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SDA_CANRXD	/;"	d
GPIO_PAR_I2C_SDA_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SDA_GPIO	/;"	d
GPIO_PAR_I2C_SDA_SDA	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SDA_SDA	/;"	d
GPIO_PAR_I2C_SDA_U2RXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SDA_U2RXD	/;"	d
GPIO_PAR_I2C_SDA_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_I2C_SDA_UNMASK	/;"	d
GPIO_PAR_IRQ0H_IRQ04_DREQ0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0H_IRQ04_DREQ0	/;"	d
GPIO_PAR_IRQ0H_IRQ04_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0H_IRQ04_UNMASK	/;"	d
GPIO_PAR_IRQ0H_IRQ06_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0H_IRQ06_UNMASK	/;"	d
GPIO_PAR_IRQ0H_IRQ06_USBCLKIN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0H_IRQ06_USBCLKIN	/;"	d
GPIO_PAR_IRQ0H_IRQ07_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0H_IRQ07_UNMASK	/;"	d
GPIO_PAR_IRQ0L_IRQ01_DREQ1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0L_IRQ01_DREQ1	/;"	d
GPIO_PAR_IRQ0L_IRQ01_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ0L_IRQ01_UNMASK	/;"	d
GPIO_PAR_IRQ1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_IRQ1(/;"	d
GPIO_PAR_IRQ1H_IRQ14_DDATA0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1H_IRQ14_DDATA0	/;"	d
GPIO_PAR_IRQ1H_IRQ15_DDATA1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1H_IRQ15_DDATA1	/;"	d
GPIO_PAR_IRQ1H_IRQ16_DDATA2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1H_IRQ16_DDATA2	/;"	d
GPIO_PAR_IRQ1H_IRQ17_DDATA3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1H_IRQ17_DDATA3	/;"	d
GPIO_PAR_IRQ1L_IRQ10_PST0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1L_IRQ10_PST0	/;"	d
GPIO_PAR_IRQ1L_IRQ11_PST1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1L_IRQ11_PST1	/;"	d
GPIO_PAR_IRQ1L_IRQ12_PST2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1L_IRQ12_PST2	/;"	d
GPIO_PAR_IRQ1L_IRQ13_PST3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_IRQ1L_IRQ13_PST3	/;"	d
GPIO_PAR_IRQ2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_IRQ2(/;"	d
GPIO_PAR_IRQ4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_IRQ4(/;"	d
GPIO_PAR_IRQ5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_IRQ5(/;"	d
GPIO_PAR_IRQ6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_IRQ6(/;"	d
GPIO_PAR_IRQH_IRQ1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ1	/;"	d
GPIO_PAR_IRQH_IRQ4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ4(/;"	d
GPIO_PAR_IRQH_IRQ4_DREQ0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ4_DREQ0	/;"	d
GPIO_PAR_IRQH_IRQ4_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ4_GPIO	/;"	d
GPIO_PAR_IRQH_IRQ4_IRQ4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ4_IRQ4	/;"	d
GPIO_PAR_IRQH_IRQ4_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ4_MASK	/;"	d
GPIO_PAR_IRQH_IRQ7	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQH_IRQ7	/;"	d
GPIO_PAR_IRQL_IRQ2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ2(/;"	d
GPIO_PAR_IRQL_IRQ2_DSPI0_PCS2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ2_DSPI0_PCS2	/;"	d
GPIO_PAR_IRQL_IRQ2_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ2_GPIO	/;"	d
GPIO_PAR_IRQL_IRQ2_IRQ2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ2_IRQ2	/;"	d
GPIO_PAR_IRQL_IRQ2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ2_MASK	/;"	d
GPIO_PAR_IRQL_IRQ2_USB1_VBUS_OC	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ2_USB1_VBUS_OC	/;"	d
GPIO_PAR_IRQL_IRQ3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ3(/;"	d
GPIO_PAR_IRQL_IRQ3_DSPI0_PCS3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ3_DSPI0_PCS3	/;"	d
GPIO_PAR_IRQL_IRQ3_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ3_GPIO	/;"	d
GPIO_PAR_IRQL_IRQ3_IRQ3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ3_IRQ3	/;"	d
GPIO_PAR_IRQL_IRQ3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ3_MASK	/;"	d
GPIO_PAR_IRQL_IRQ3_USB1_VBUS_EN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ3_USB1_VBUS_EN	/;"	d
GPIO_PAR_IRQL_IRQ6	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ6(/;"	d
GPIO_PAR_IRQL_IRQ6_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ6_GPIO	/;"	d
GPIO_PAR_IRQL_IRQ6_IRQ6	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ6_IRQ6	/;"	d
GPIO_PAR_IRQL_IRQ6_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ6_MASK	/;"	d
GPIO_PAR_IRQL_IRQ6_USBCLKIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_IRQL_IRQ6_USBCLKIN	/;"	d
GPIO_PAR_IRQ_IRQ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_IRQ_IRQ1	/;"	d
GPIO_PAR_IRQ_IRQ1_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ1_GPIO	/;"	d
GPIO_PAR_IRQ_IRQ1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_IRQ_IRQ1_GPIO	/;"	d
GPIO_PAR_IRQ_IRQ1_IRQ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_IRQ_IRQ1_IRQ1	/;"	d
GPIO_PAR_IRQ_IRQ1_PCIINT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ1_PCIINT	/;"	d
GPIO_PAR_IRQ_IRQ1_SSICLKIN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ1_SSICLKIN	/;"	d
GPIO_PAR_IRQ_IRQ1_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ1_UNMASK	/;"	d
GPIO_PAR_IRQ_IRQ1_USBCLKIN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ1_USBCLKIN	/;"	d
GPIO_PAR_IRQ_IRQ4	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_IRQ_IRQ4	/;"	d
GPIO_PAR_IRQ_IRQ4	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_IRQ_IRQ4	/;"	d
GPIO_PAR_IRQ_IRQ4_DMAREQ0	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ4_DMAREQ0	/;"	d
GPIO_PAR_IRQ_IRQ4_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ4_GPIO	/;"	d
GPIO_PAR_IRQ_IRQ4_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_IRQ_IRQ4_GPIO	/;"	d
GPIO_PAR_IRQ_IRQ4_IRQ4	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_IRQ_IRQ4_IRQ4	/;"	d
GPIO_PAR_IRQ_IRQ4_SSIINPCLK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ4_SSIINPCLK	/;"	d
GPIO_PAR_IRQ_IRQ4_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_IRQ_IRQ4_UNMASK	/;"	d
GPIO_PAR_LCDCTL_ACDOE_ACDOE	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_ACDOE_ACDOE	/;"	d
GPIO_PAR_LCDCTL_ACDOE_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_ACDOE_GPIO	/;"	d
GPIO_PAR_LCDCTL_ACDOE_SPLSPR	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_ACDOE_SPLSPR	/;"	d
GPIO_PAR_LCDCTL_ACDOE_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_ACDOE_UNMASK	/;"	d
GPIO_PAR_LCDCTL_ACD_OE	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_ACD_OE	/;"	d
GPIO_PAR_LCDCTL_CLS	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_CLS	/;"	d
GPIO_PAR_LCDCTL_CONTRAST	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_CONTRAST	/;"	d
GPIO_PAR_LCDCTL_FLM_VSYNC	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_FLM_VSYNC	/;"	d
GPIO_PAR_LCDCTL_FLM_VSYNC	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_FLM_VSYNC	/;"	d
GPIO_PAR_LCDCTL_LP_HSYNC	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_LP_HSYNC	/;"	d
GPIO_PAR_LCDCTL_LP_HSYNC	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_LP_HSYNC	/;"	d
GPIO_PAR_LCDCTL_LSCLK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDCTL_LSCLK	/;"	d
GPIO_PAR_LCDCTL_LSCLK	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_LSCLK	/;"	d
GPIO_PAR_LCDCTL_PS	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_PS	/;"	d
GPIO_PAR_LCDCTL_REV	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_REV	/;"	d
GPIO_PAR_LCDCTL_SPL_SPR	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDCTL_SPL_SPR	/;"	d
GPIO_PAR_LCDDATA_LD15_8	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDDATA_LD15_8(/;"	d
GPIO_PAR_LCDDATA_LD16	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDDATA_LD16(/;"	d
GPIO_PAR_LCDDATA_LD17	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDDATA_LD17(/;"	d
GPIO_PAR_LCDDATA_LD7_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_LCDDATA_LD7_0(/;"	d
GPIO_PAR_LCDH_LD12_CANRX	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD12_CANRX	/;"	d
GPIO_PAR_LCDH_LD12_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD12_GPIO	/;"	d
GPIO_PAR_LCDH_LD12_LD12	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD12_LD12	/;"	d
GPIO_PAR_LCDH_LD12_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD12_UNMASK	/;"	d
GPIO_PAR_LCDH_LD13_CANTX	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD13_CANTX	/;"	d
GPIO_PAR_LCDH_LD13_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD13_GPIO	/;"	d
GPIO_PAR_LCDH_LD13_LD13	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD13_LD13	/;"	d
GPIO_PAR_LCDH_LD13_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD13_UNMASK	/;"	d
GPIO_PAR_LCDH_LD14_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD14_GPIO	/;"	d
GPIO_PAR_LCDH_LD14_LD14	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD14_LD14	/;"	d
GPIO_PAR_LCDH_LD14_LD8	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD14_LD8	/;"	d
GPIO_PAR_LCDH_LD14_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD14_UNMASK	/;"	d
GPIO_PAR_LCDH_LD15_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD15_GPIO	/;"	d
GPIO_PAR_LCDH_LD15_LD15	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD15_LD15	/;"	d
GPIO_PAR_LCDH_LD15_LD9	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD15_LD9	/;"	d
GPIO_PAR_LCDH_LD15_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD15_UNMASK	/;"	d
GPIO_PAR_LCDH_LD16_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD16_GPIO	/;"	d
GPIO_PAR_LCDH_LD16_LD10	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD16_LD10	/;"	d
GPIO_PAR_LCDH_LD16_LD16	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD16_LD16	/;"	d
GPIO_PAR_LCDH_LD16_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD16_UNMASK	/;"	d
GPIO_PAR_LCDH_LD17_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD17_GPIO	/;"	d
GPIO_PAR_LCDH_LD17_LD11	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD17_LD11	/;"	d
GPIO_PAR_LCDH_LD17_LD17	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD17_LD17	/;"	d
GPIO_PAR_LCDH_LD17_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDH_LD17_UNMASK	/;"	d
GPIO_PAR_LCDL_LD0_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD0_GPIO	/;"	d
GPIO_PAR_LCDL_LD0_LD0	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD0_LD0	/;"	d
GPIO_PAR_LCDL_LD0_PWM1	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD0_PWM1	/;"	d
GPIO_PAR_LCDL_LD0_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD0_UNMASK	/;"	d
GPIO_PAR_LCDL_LD10_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD10_GPIO	/;"	d
GPIO_PAR_LCDL_LD10_LD10	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD10_LD10	/;"	d
GPIO_PAR_LCDL_LD10_LD6	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD10_LD6	/;"	d
GPIO_PAR_LCDL_LD10_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD10_UNMASK	/;"	d
GPIO_PAR_LCDL_LD11_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD11_GPIO	/;"	d
GPIO_PAR_LCDL_LD11_LD11	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD11_LD11	/;"	d
GPIO_PAR_LCDL_LD11_LD7	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD11_LD7	/;"	d
GPIO_PAR_LCDL_LD11_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD11_UNMASK	/;"	d
GPIO_PAR_LCDL_LD1_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD1_GPIO	/;"	d
GPIO_PAR_LCDL_LD1_LD1	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD1_LD1	/;"	d
GPIO_PAR_LCDL_LD1_PWM3	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD1_PWM3	/;"	d
GPIO_PAR_LCDL_LD1_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD1_UNMASK	/;"	d
GPIO_PAR_LCDL_LD2_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD2_GPIO	/;"	d
GPIO_PAR_LCDL_LD2_LD0	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD2_LD0	/;"	d
GPIO_PAR_LCDL_LD2_LD2	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD2_LD2	/;"	d
GPIO_PAR_LCDL_LD2_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD2_UNMASK	/;"	d
GPIO_PAR_LCDL_LD3_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD3_GPIO	/;"	d
GPIO_PAR_LCDL_LD3_LD1	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD3_LD1	/;"	d
GPIO_PAR_LCDL_LD3_LD3	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD3_LD3	/;"	d
GPIO_PAR_LCDL_LD3_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD3_UNMASK	/;"	d
GPIO_PAR_LCDL_LD4_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD4_GPIO	/;"	d
GPIO_PAR_LCDL_LD4_LD2	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD4_LD2	/;"	d
GPIO_PAR_LCDL_LD4_LD4	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD4_LD4	/;"	d
GPIO_PAR_LCDL_LD4_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD4_UNMASK	/;"	d
GPIO_PAR_LCDL_LD5_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD5_GPIO	/;"	d
GPIO_PAR_LCDL_LD5_LD3	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD5_LD3	/;"	d
GPIO_PAR_LCDL_LD5_LD5	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD5_LD5	/;"	d
GPIO_PAR_LCDL_LD5_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD5_UNMASK	/;"	d
GPIO_PAR_LCDL_LD6_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD6_GPIO	/;"	d
GPIO_PAR_LCDL_LD6_LD6	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD6_LD6	/;"	d
GPIO_PAR_LCDL_LD6_PWM5	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD6_PWM5	/;"	d
GPIO_PAR_LCDL_LD6_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD6_UNMASK	/;"	d
GPIO_PAR_LCDL_LD7_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD7_GPIO	/;"	d
GPIO_PAR_LCDL_LD7_LD7	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD7_LD7	/;"	d
GPIO_PAR_LCDL_LD7_PWM7	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD7_PWM7	/;"	d
GPIO_PAR_LCDL_LD7_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD7_UNMASK	/;"	d
GPIO_PAR_LCDL_LD8_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD8_GPIO	/;"	d
GPIO_PAR_LCDL_LD8_LD4	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD8_LD4	/;"	d
GPIO_PAR_LCDL_LD8_LD8	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD8_LD8	/;"	d
GPIO_PAR_LCDL_LD8_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD8_UNMASK	/;"	d
GPIO_PAR_LCDL_LD9_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD9_GPIO	/;"	d
GPIO_PAR_LCDL_LD9_LD5	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD9_LD5	/;"	d
GPIO_PAR_LCDL_LD9_LD9	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD9_LD9	/;"	d
GPIO_PAR_LCDL_LD9_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_LCDL_LD9_UNMASK	/;"	d
GPIO_PAR_PCIBG_PCIBG0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBG_PCIBG0(/;"	d
GPIO_PAR_PCIBG_PCIBG1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBG_PCIBG1(/;"	d
GPIO_PAR_PCIBG_PCIBG2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBG_PCIBG2(/;"	d
GPIO_PAR_PCIBG_PCIBG3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBG_PCIBG3(/;"	d
GPIO_PAR_PCIBG_PCIBG4	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBG_PCIBG4(/;"	d
GPIO_PAR_PCIBR_PCIBR0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBR_PCIBR0(/;"	d
GPIO_PAR_PCIBR_PCIBR1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBR_PCIBR1(/;"	d
GPIO_PAR_PCIBR_PCIBR2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBR_PCIBR2(/;"	d
GPIO_PAR_PCIBR_PCIBR3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBR_PCIBR3(/;"	d
GPIO_PAR_PCIBR_PCIBR4	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PCIBR_PCIBR4(/;"	d
GPIO_PAR_PCI_GNT0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT0	/;"	d
GPIO_PAR_PCI_GNT0_GNT0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT0_GNT0	/;"	d
GPIO_PAR_PCI_GNT0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT0_GPIO	/;"	d
GPIO_PAR_PCI_GNT1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT1	/;"	d
GPIO_PAR_PCI_GNT1_GNT1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT1_GNT1	/;"	d
GPIO_PAR_PCI_GNT1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT1_GPIO	/;"	d
GPIO_PAR_PCI_GNT2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT2	/;"	d
GPIO_PAR_PCI_GNT2_GNT2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT2_GNT2	/;"	d
GPIO_PAR_PCI_GNT2_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT2_GPIO	/;"	d
GPIO_PAR_PCI_GNT3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT3(/;"	d
GPIO_PAR_PCI_GNT3_ATA_DMACK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT3_ATA_DMACK	/;"	d
GPIO_PAR_PCI_GNT3_GNT3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT3_GNT3	/;"	d
GPIO_PAR_PCI_GNT3_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT3_GPIO	/;"	d
GPIO_PAR_PCI_GNT3_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_GNT3_UNMASK	/;"	d
GPIO_PAR_PCI_REQ0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ0	/;"	d
GPIO_PAR_PCI_REQ0_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ0_GPIO	/;"	d
GPIO_PAR_PCI_REQ0_REQ0	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ0_REQ0	/;"	d
GPIO_PAR_PCI_REQ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ1	/;"	d
GPIO_PAR_PCI_REQ1_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ1_GPIO	/;"	d
GPIO_PAR_PCI_REQ1_REQ1	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ1_REQ1	/;"	d
GPIO_PAR_PCI_REQ2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ2	/;"	d
GPIO_PAR_PCI_REQ2_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ2_GPIO	/;"	d
GPIO_PAR_PCI_REQ2_REQ2	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ2_REQ2	/;"	d
GPIO_PAR_PCI_REQ3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ3(/;"	d
GPIO_PAR_PCI_REQ3_ATA_INTRQ	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ3_ATA_INTRQ	/;"	d
GPIO_PAR_PCI_REQ3_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ3_GPIO	/;"	d
GPIO_PAR_PCI_REQ3_REQ3	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ3_REQ3	/;"	d
GPIO_PAR_PCI_REQ3_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_PCI_REQ3_UNMASK	/;"	d
GPIO_PAR_PSC0_CTS0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_CTS0(/;"	d
GPIO_PAR_PSC0_CTS0_BCLK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_CTS0_BCLK	/;"	d
GPIO_PAR_PSC0_CTS0_CTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_CTS0_CTS	/;"	d
GPIO_PAR_PSC0_CTS0_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_CTS0_GPIO	/;"	d
GPIO_PAR_PSC0_RTS0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_RTS0(/;"	d
GPIO_PAR_PSC0_RTS0_FSYNC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_RTS0_FSYNC	/;"	d
GPIO_PAR_PSC0_RTS0_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_RTS0_GPIO	/;"	d
GPIO_PAR_PSC0_RTS0_RTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_RTS0_RTS	/;"	d
GPIO_PAR_PSC0_RXD0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_RXD0	/;"	d
GPIO_PAR_PSC0_TXD0	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC0_TXD0	/;"	d
GPIO_PAR_PSC1_CTS1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_CTS1(/;"	d
GPIO_PAR_PSC1_CTS1_BCLK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_CTS1_BCLK	/;"	d
GPIO_PAR_PSC1_CTS1_CTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_CTS1_CTS	/;"	d
GPIO_PAR_PSC1_CTS1_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_CTS1_GPIO	/;"	d
GPIO_PAR_PSC1_RTS1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_RTS1(/;"	d
GPIO_PAR_PSC1_RTS1_FSYNC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_RTS1_FSYNC	/;"	d
GPIO_PAR_PSC1_RTS1_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_RTS1_GPIO	/;"	d
GPIO_PAR_PSC1_RTS1_RTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_RTS1_RTS	/;"	d
GPIO_PAR_PSC1_RXD1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_RXD1	/;"	d
GPIO_PAR_PSC1_TXD1	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC1_TXD1	/;"	d
GPIO_PAR_PSC2_CTS2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_CTS2(/;"	d
GPIO_PAR_PSC2_CTS2_BCLK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_CTS2_BCLK	/;"	d
GPIO_PAR_PSC2_CTS2_CTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_CTS2_CTS	/;"	d
GPIO_PAR_PSC2_CTS2_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_CTS2_GPIO	/;"	d
GPIO_PAR_PSC2_RTS2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_RTS2(/;"	d
GPIO_PAR_PSC2_RTS2_CANTX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_RTS2_CANTX	/;"	d
GPIO_PAR_PSC2_RTS2_FSYNC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_RTS2_FSYNC	/;"	d
GPIO_PAR_PSC2_RTS2_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_RTS2_GPIO	/;"	d
GPIO_PAR_PSC2_RTS2_RTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_RTS2_RTS	/;"	d
GPIO_PAR_PSC2_RXD2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_RXD2	/;"	d
GPIO_PAR_PSC2_TXD2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC2_TXD2	/;"	d
GPIO_PAR_PSC3_CTS2_CANRX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_CTS2_CANRX	/;"	d
GPIO_PAR_PSC3_CTS3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_CTS3(/;"	d
GPIO_PAR_PSC3_CTS3_BCLK	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_CTS3_BCLK	/;"	d
GPIO_PAR_PSC3_CTS3_CTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_CTS3_CTS	/;"	d
GPIO_PAR_PSC3_CTS3_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_CTS3_GPIO	/;"	d
GPIO_PAR_PSC3_RTS3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_RTS3(/;"	d
GPIO_PAR_PSC3_RTS3_FSYNC	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_RTS3_FSYNC	/;"	d
GPIO_PAR_PSC3_RTS3_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_RTS3_GPIO	/;"	d
GPIO_PAR_PSC3_RTS3_RTS	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_RTS3_RTS	/;"	d
GPIO_PAR_PSC3_RXD3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_RXD3	/;"	d
GPIO_PAR_PSC3_TXD3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_PSC3_TXD3	/;"	d
GPIO_PAR_PWM1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_PWM1(/;"	d
GPIO_PAR_PWM3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_PWM3(/;"	d
GPIO_PAR_PWM5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_PWM5	/;"	d
GPIO_PAR_PWM7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_PWM7	/;"	d
GPIO_PAR_QSPI_CS0	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_CS0	/;"	d
GPIO_PAR_QSPI_CS1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_CS1(/;"	d
GPIO_PAR_QSPI_CS1_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_CS1_MASK	/;"	d
GPIO_PAR_QSPI_CS1_QSPICS1	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_CS1_QSPICS1	/;"	d
GPIO_PAR_QSPI_CS1_SDRAMSCKE	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_CS1_SDRAMSCKE	/;"	d
GPIO_PAR_QSPI_DIN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_DIN(/;"	d
GPIO_PAR_QSPI_DIN	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_QSPI_DIN(/;"	d
GPIO_PAR_QSPI_DIN_DIN	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DIN_DIN	/;"	d
GPIO_PAR_QSPI_DIN_DREQ0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DIN_DREQ0	/;"	d
GPIO_PAR_QSPI_DIN_I2CSDA	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_DIN_I2CSDA	/;"	d
GPIO_PAR_QSPI_DIN_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_DIN_MASK	/;"	d
GPIO_PAR_QSPI_DIN_QSPIDIN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_DIN_QSPIDIN	/;"	d
GPIO_PAR_QSPI_DIN_U2CTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DIN_U2CTS	/;"	d
GPIO_PAR_QSPI_DIN_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DIN_UNMASK	/;"	d
GPIO_PAR_QSPI_DOUT	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_DOUT	/;"	d
GPIO_PAR_QSPI_DOUT	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_QSPI_DOUT(/;"	d
GPIO_PAR_QSPI_DOUT_DOUT	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DOUT_DOUT	/;"	d
GPIO_PAR_QSPI_DOUT_SDA	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DOUT_SDA	/;"	d
GPIO_PAR_QSPI_DOUT_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_DOUT_UNMASK	/;"	d
GPIO_PAR_QSPI_PCS0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_QSPI_PCS0(/;"	d
GPIO_PAR_QSPI_PCS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_QSPI_PCS1(/;"	d
GPIO_PAR_QSPI_PCS2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_QSPI_PCS2(/;"	d
GPIO_PAR_QSPI_PCS2_DACK0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_PCS2_DACK0	/;"	d
GPIO_PAR_QSPI_PCS2_PCS2	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_PCS2_PCS2	/;"	d
GPIO_PAR_QSPI_PCS2_U2RTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_PCS2_U2RTS	/;"	d
GPIO_PAR_QSPI_PCS2_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_PCS2_UNMASK	/;"	d
GPIO_PAR_QSPI_SCK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_SCK(/;"	d
GPIO_PAR_QSPI_SCK	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_QSPI_SCK(/;"	d
GPIO_PAR_QSPI_SCK_I2CSCL	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_SCK_I2CSCL	/;"	d
GPIO_PAR_QSPI_SCK_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_SCK_MASK	/;"	d
GPIO_PAR_QSPI_SCK_QSPISCK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_QSPI_SCK_QSPISCK	/;"	d
GPIO_PAR_QSPI_SCK_SCK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_SCK_SCK	/;"	d
GPIO_PAR_QSPI_SCK_SCL	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_SCK_SCL	/;"	d
GPIO_PAR_QSPI_SCK_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_QSPI_SCK_UNMASK	/;"	d
GPIO_PAR_SDHCH_DAT0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT0(/;"	d
GPIO_PAR_SDHCH_DAT0_DAT0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT0_DAT0	/;"	d
GPIO_PAR_SDHCH_DAT0_DSPI1_SOUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT0_DSPI1_SOUT	/;"	d
GPIO_PAR_SDHCH_DAT0_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT0_GPIO	/;"	d
GPIO_PAR_SDHCH_DAT0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT0_MASK	/;"	d
GPIO_PAR_SDHCH_DAT0_PWM_B2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT0_PWM_B2	/;"	d
GPIO_PAR_SDHCH_DAT1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT1(/;"	d
GPIO_PAR_SDHCH_DAT1_DAT1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT1_DAT1	/;"	d
GPIO_PAR_SDHCH_DAT1_DSPI1_PCS1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT1_DSPI1_PCS1	/;"	d
GPIO_PAR_SDHCH_DAT1_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT1_GPIO	/;"	d
GPIO_PAR_SDHCH_DAT1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT1_MASK	/;"	d
GPIO_PAR_SDHCH_DAT1_PWM_A2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT1_PWM_A2	/;"	d
GPIO_PAR_SDHCH_DAT2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT2(/;"	d
GPIO_PAR_SDHCH_DAT2_DAT2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT2_DAT2	/;"	d
GPIO_PAR_SDHCH_DAT2_DSPI1_PCS2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT2_DSPI1_PCS2	/;"	d
GPIO_PAR_SDHCH_DAT2_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT2_GPIO	/;"	d
GPIO_PAR_SDHCH_DAT2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT2_MASK	/;"	d
GPIO_PAR_SDHCH_DAT2_PWM_B1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT2_PWM_B1	/;"	d
GPIO_PAR_SDHCH_DAT3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT3(/;"	d
GPIO_PAR_SDHCH_DAT3_DAT3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT3_DAT3	/;"	d
GPIO_PAR_SDHCH_DAT3_DSPI1_PCS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT3_DSPI1_PCS0	/;"	d
GPIO_PAR_SDHCH_DAT3_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT3_GPIO	/;"	d
GPIO_PAR_SDHCH_DAT3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT3_MASK	/;"	d
GPIO_PAR_SDHCH_DAT3_PWM_A1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCH_DAT3_PWM_A1	/;"	d
GPIO_PAR_SDHCL_CLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CLK(/;"	d
GPIO_PAR_SDHCL_CLK_CLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CLK_CLK	/;"	d
GPIO_PAR_SDHCL_CLK_DSPI1_SCK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CLK_DSPI1_SCK	/;"	d
GPIO_PAR_SDHCL_CLK_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CLK_GPIO	/;"	d
GPIO_PAR_SDHCL_CLK_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CLK_MASK	/;"	d
GPIO_PAR_SDHCL_CLK_PWM_B0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CLK_PWM_B0	/;"	d
GPIO_PAR_SDHCL_CMD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CMD(/;"	d
GPIO_PAR_SDHCL_CMD_CMD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CMD_CMD	/;"	d
GPIO_PAR_SDHCL_CMD_DSPI1_SIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CMD_DSPI1_SIN	/;"	d
GPIO_PAR_SDHCL_CMD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CMD_GPIO	/;"	d
GPIO_PAR_SDHCL_CMD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CMD_MASK	/;"	d
GPIO_PAR_SDHCL_CMD_PWM_A0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SDHCL_CMD_PWM_A0	/;"	d
GPIO_PAR_SDHC_CLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SDHC_CLK	/;"	d
GPIO_PAR_SDHC_CMD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SDHC_CMD	/;"	d
GPIO_PAR_SDHC_DATA0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SDHC_DATA0	/;"	d
GPIO_PAR_SDHC_DATA1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SDHC_DATA1	/;"	d
GPIO_PAR_SDHC_DATA2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SDHC_DATA2	/;"	d
GPIO_PAR_SDHC_DATA3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SDHC_DATA3	/;"	d
GPIO_PAR_SDRAM_CSSDCS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_CSSDCS(/;"	d
GPIO_PAR_SDRAM_CSSDCS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_CSSDCS_MASK	/;"	d
GPIO_PAR_SDRAM_SCAS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_SCAS	/;"	d
GPIO_PAR_SDRAM_SCKE	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_SCKE	/;"	d
GPIO_PAR_SDRAM_SDCS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_SDCS(/;"	d
GPIO_PAR_SDRAM_SDCS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_SDCS_MASK	/;"	d
GPIO_PAR_SDRAM_SDWE	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_SDWE	/;"	d
GPIO_PAR_SDRAM_SRAS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_SDRAM_SRAS	/;"	d
GPIO_PAR_SIMP0H_DAT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_DAT(/;"	d
GPIO_PAR_SIMP0H_DAT_DAT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_DAT_DAT	/;"	d
GPIO_PAR_SIMP0H_DAT_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_DAT_GPIO	/;"	d
GPIO_PAR_SIMP0H_DAT_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_DAT_MASK	/;"	d
GPIO_PAR_SIMP0H_DAT_PWM_FAULT2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_DAT_PWM_FAULT2	/;"	d
GPIO_PAR_SIMP0H_DAT_SDHC_DAT7	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_DAT_SDHC_DAT7	/;"	d
GPIO_PAR_SIMP0H_PD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_PD(/;"	d
GPIO_PAR_SIMP0H_PD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_PD_GPIO	/;"	d
GPIO_PAR_SIMP0H_PD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_PD_MASK	/;"	d
GPIO_PAR_SIMP0H_PD_PD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_PD_PD	/;"	d
GPIO_PAR_SIMP0H_PD_PWM_SYNC	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_PD_PWM_SYNC	/;"	d
GPIO_PAR_SIMP0H_PD_SDHC_DAT5	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_PD_SDHC_DAT5	/;"	d
GPIO_PAR_SIMP0H_RST	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_RST(/;"	d
GPIO_PAR_SIMP0H_RST_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_RST_GPIO	/;"	d
GPIO_PAR_SIMP0H_RST_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_RST_MASK	/;"	d
GPIO_PAR_SIMP0H_RST_PWM_FORCE	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_RST_PWM_FORCE	/;"	d
GPIO_PAR_SIMP0H_RST_RST	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_RST_RST	/;"	d
GPIO_PAR_SIMP0H_RST_SDHC_DAT6	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_RST_SDHC_DAT6	/;"	d
GPIO_PAR_SIMP0H_VEN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_VEN(/;"	d
GPIO_PAR_SIMP0H_VEN_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_VEN_GPIO	/;"	d
GPIO_PAR_SIMP0H_VEN_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_VEN_MASK	/;"	d
GPIO_PAR_SIMP0H_VEN_PWM_FAULT0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_VEN_PWM_FAULT0	/;"	d
GPIO_PAR_SIMP0H_VEN_VEN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0H_VEN_VEN	/;"	d
GPIO_PAR_SIMP0L_CLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0L_CLK(/;"	d
GPIO_PAR_SIMP0L_CLK_CLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0L_CLK_CLK	/;"	d
GPIO_PAR_SIMP0L_CLK_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0L_CLK_GPIO	/;"	d
GPIO_PAR_SIMP0L_CLK_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0L_CLK_MASK	/;"	d
GPIO_PAR_SIMP0L_CLK_PWM_FAULT1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0L_CLK_PWM_FAULT1	/;"	d
GPIO_PAR_SIMP0L_CLK_SDHC_DAT4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SIMP0L_CLK_SDHC_DAT4	/;"	d
GPIO_PAR_SIMP0_CLK0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP0_CLK0	/;"	d
GPIO_PAR_SIMP0_DATA0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP0_DATA0	/;"	d
GPIO_PAR_SIMP0_PD0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP0_PD0	/;"	d
GPIO_PAR_SIMP0_RST0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP0_RST0	/;"	d
GPIO_PAR_SIMP0_VEN0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP0_VEN0	/;"	d
GPIO_PAR_SIMP1H_DATA1_SIMDATA1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_DATA1_SIMDATA1	/;"	d
GPIO_PAR_SIMP1H_DATA1_SSITXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_DATA1_SSITXD	/;"	d
GPIO_PAR_SIMP1H_DATA1_U1TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_DATA1_U1TXD	/;"	d
GPIO_PAR_SIMP1H_DATA1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_DATA1_UNMASK	/;"	d
GPIO_PAR_SIMP1H_PD1_SIMPD1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_PD1_SIMPD1	/;"	d
GPIO_PAR_SIMP1H_PD1_SSIBCLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_PD1_SSIBCLK	/;"	d
GPIO_PAR_SIMP1H_PD1_U1CTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_PD1_U1CTS	/;"	d
GPIO_PAR_SIMP1H_PD1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_PD1_UNMASK	/;"	d
GPIO_PAR_SIMP1H_RST1_SIMRST1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_RST1_SIMRST1	/;"	d
GPIO_PAR_SIMP1H_RST1_SSIFS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_RST1_SSIFS	/;"	d
GPIO_PAR_SIMP1H_RST1_U1RTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_RST1_U1RTS	/;"	d
GPIO_PAR_SIMP1H_RST1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_RST1_UNMASK	/;"	d
GPIO_PAR_SIMP1H_VEN1_SIMVEN1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_VEN1_SIMVEN1	/;"	d
GPIO_PAR_SIMP1H_VEN1_SSIRXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_VEN1_SSIRXD	/;"	d
GPIO_PAR_SIMP1H_VEN1_U1RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_VEN1_U1RXD	/;"	d
GPIO_PAR_SIMP1H_VEN1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1H_VEN1_UNMASK	/;"	d
GPIO_PAR_SIMP1L_CLK_CLK1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1L_CLK_CLK1	/;"	d
GPIO_PAR_SIMP1L_CLK_SSIMCLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1L_CLK_SSIMCLK	/;"	d
GPIO_PAR_SIMP1L_CLK_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SIMP1L_CLK_UNMASK	/;"	d
GPIO_PAR_SSI0H_FS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_FS(/;"	d
GPIO_PAR_SSI0H_FS_FS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_FS_FS	/;"	d
GPIO_PAR_SSI0H_FS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_FS_GPIO	/;"	d
GPIO_PAR_SSI0H_FS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_FS_MASK	/;"	d
GPIO_PAR_SSI0H_FS_SIM1_RST	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_FS_SIM1_RST	/;"	d
GPIO_PAR_SSI0H_FS_U7TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_FS_U7TXD	/;"	d
GPIO_PAR_SSI0H_MCLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_MCLK(/;"	d
GPIO_PAR_SSI0H_MCLK_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_MCLK_GPIO	/;"	d
GPIO_PAR_SSI0H_MCLK_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_MCLK_MASK	/;"	d
GPIO_PAR_SSI0H_MCLK_MCLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_MCLK_MCLK	/;"	d
GPIO_PAR_SSI0H_MCLK_SIM1_CLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_MCLK_SIM1_CLK	/;"	d
GPIO_PAR_SSI0H_MCLK_SSI_CLKIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_MCLK_SSI_CLKIN	/;"	d
GPIO_PAR_SSI0H_RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_RXD(/;"	d
GPIO_PAR_SSI0H_RXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_RXD_GPIO	/;"	d
GPIO_PAR_SSI0H_RXD_I2C2SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_RXD_I2C2SDA	/;"	d
GPIO_PAR_SSI0H_RXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_RXD_MASK	/;"	d
GPIO_PAR_SSI0H_RXD_RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_RXD_RXD	/;"	d
GPIO_PAR_SSI0H_RXD_SIM1_VEN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_RXD_SIM1_VEN	/;"	d
GPIO_PAR_SSI0H_TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_TXD(/;"	d
GPIO_PAR_SSI0H_TXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_TXD_GPIO	/;"	d
GPIO_PAR_SSI0H_TXD_I2C2SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_TXD_I2C2SCL	/;"	d
GPIO_PAR_SSI0H_TXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_TXD_MASK	/;"	d
GPIO_PAR_SSI0H_TXD_SIM1_DAT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_TXD_SIM1_DAT	/;"	d
GPIO_PAR_SSI0H_TXD_TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0H_TXD_TXD	/;"	d
GPIO_PAR_SSI0L_BCLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0L_BCLK(/;"	d
GPIO_PAR_SSI0L_BCLK_BCLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0L_BCLK_BCLK	/;"	d
GPIO_PAR_SSI0L_BCLK_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0L_BCLK_GPIO	/;"	d
GPIO_PAR_SSI0L_BCLK_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0L_BCLK_MASK	/;"	d
GPIO_PAR_SSI0L_BCLK_SIM1_PD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0L_BCLK_SIM1_PD	/;"	d
GPIO_PAR_SSI0L_BCLK_U7RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_SSI0L_BCLK_U7RXD	/;"	d
GPIO_PAR_SSIH_FS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_FS(/;"	d
GPIO_PAR_SSIH_FS_SSIFS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_FS_SSIFS	/;"	d
GPIO_PAR_SSIH_FS_U1RTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_FS_U1RTS	/;"	d
GPIO_PAR_SSIH_FS_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_FS_UNMASK	/;"	d
GPIO_PAR_SSIH_MCLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_MCLK(/;"	d
GPIO_PAR_SSIH_MCLK_SSICLKIN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_MCLK_SSICLKIN	/;"	d
GPIO_PAR_SSIH_MCLK_SSIMCLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_MCLK_SSIMCLK	/;"	d
GPIO_PAR_SSIH_MCLK_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_MCLK_UNMASK	/;"	d
GPIO_PAR_SSIH_RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_RXD(/;"	d
GPIO_PAR_SSIH_RXD_SSIRXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_RXD_SSIRXD	/;"	d
GPIO_PAR_SSIH_RXD_U1RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_RXD_U1RXD	/;"	d
GPIO_PAR_SSIH_RXD_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_RXD_UNMASK	/;"	d
GPIO_PAR_SSIH_TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_TXD(/;"	d
GPIO_PAR_SSIH_TXD_SSIRXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_TXD_SSIRXD	/;"	d
GPIO_PAR_SSIH_TXD_U1TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_TXD_U1TXD	/;"	d
GPIO_PAR_SSIH_TXD_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIH_TXD_UNMASK	/;"	d
GPIO_PAR_SSIL_BCLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIL_BCLK	/;"	d
GPIO_PAR_SSIL_U1CTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIL_U1CTS	/;"	d
GPIO_PAR_SSIL_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_SSIL_UNMASK	/;"	d
GPIO_PAR_SSI_BCLK	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_SSI_BCLK(/;"	d
GPIO_PAR_SSI_BCLK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_BCLK(/;"	d
GPIO_PAR_SSI_BCLK_BCLK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_BCLK_BCLK	/;"	d
GPIO_PAR_SSI_BCLK_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_BCLK_GPIO	/;"	d
GPIO_PAR_SSI_BCLK_U1CTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_BCLK_U1CTS	/;"	d
GPIO_PAR_SSI_BCLK_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_BCLK_UNMASK	/;"	d
GPIO_PAR_SSI_FS	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_SSI_FS(/;"	d
GPIO_PAR_SSI_FS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_FS(/;"	d
GPIO_PAR_SSI_FS_FS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_FS_FS	/;"	d
GPIO_PAR_SSI_FS_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_FS_GPIO	/;"	d
GPIO_PAR_SSI_FS_U1RTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_FS_U1RTS	/;"	d
GPIO_PAR_SSI_FS_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_FS_UNMASK	/;"	d
GPIO_PAR_SSI_MCLK	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_SSI_MCLK	/;"	d
GPIO_PAR_SSI_MCLK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_MCLK	/;"	d
GPIO_PAR_SSI_MCLK_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_MCLK_GPIO	/;"	d
GPIO_PAR_SSI_MCLK_MCLK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_MCLK_MCLK	/;"	d
GPIO_PAR_SSI_RXD	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_SSI_RXD(/;"	d
GPIO_PAR_SSI_SRXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_SRXD(/;"	d
GPIO_PAR_SSI_SRXD_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_SRXD_GPIO	/;"	d
GPIO_PAR_SSI_SRXD_SRXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_SRXD_SRXD	/;"	d
GPIO_PAR_SSI_SRXD_U1RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_SRXD_U1RXD	/;"	d
GPIO_PAR_SSI_SRXD_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_SRXD_UNMASK	/;"	d
GPIO_PAR_SSI_STXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_STXD(/;"	d
GPIO_PAR_SSI_STXD_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_STXD_GPIO	/;"	d
GPIO_PAR_SSI_STXD_STXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_STXD_STXD	/;"	d
GPIO_PAR_SSI_STXD_U1TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_STXD_U1TXD	/;"	d
GPIO_PAR_SSI_STXD_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_SSI_STXD_UNMASK	/;"	d
GPIO_PAR_SSI_TXD	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_SSI_TXD(/;"	d
GPIO_PAR_TIMER_T0IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN(/;"	d
GPIO_PAR_TIMER_T0IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T0IN(/;"	d
GPIO_PAR_TIMER_T0IN_EXTA0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_EXTA0	/;"	d
GPIO_PAR_TIMER_T0IN_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T0IN_GPIO	/;"	d
GPIO_PAR_TIMER_T0IN_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_GPIO	/;"	d
GPIO_PAR_TIMER_T0IN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T0IN_GPIO	/;"	d
GPIO_PAR_TIMER_T0IN_LCDREV	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T0IN_LCDREV	/;"	d
GPIO_PAR_TIMER_T0IN_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_MASK	/;"	d
GPIO_PAR_TIMER_T0IN_T0IN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T0IN_T0IN	/;"	d
GPIO_PAR_TIMER_T0IN_T0IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_T0IN	/;"	d
GPIO_PAR_TIMER_T0IN_T0IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T0IN_T0IN	/;"	d
GPIO_PAR_TIMER_T0IN_T0OUT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T0IN_T0OUT	/;"	d
GPIO_PAR_TIMER_T0IN_T0OUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_T0OUT	/;"	d
GPIO_PAR_TIMER_T0IN_T0OUT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T0IN_T0OUT	/;"	d
GPIO_PAR_TIMER_T0IN_U2RTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T0IN_U2RTS	/;"	d
GPIO_PAR_TIMER_T0IN_ULPI_NXT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_ULPI_NXT	/;"	d
GPIO_PAR_TIMER_T0IN_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T0IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T0IN_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T0IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T0IN_USBO_VBUSOC	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T0IN_USBO_VBUSOC	/;"	d
GPIO_PAR_TIMER_T1IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN(/;"	d
GPIO_PAR_TIMER_T1IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T1IN(/;"	d
GPIO_PAR_TIMER_T1IN_EXTA1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN_EXTA1	/;"	d
GPIO_PAR_TIMER_T1IN_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T1IN_GPIO	/;"	d
GPIO_PAR_TIMER_T1IN_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN_GPIO	/;"	d
GPIO_PAR_TIMER_T1IN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T1IN_GPIO	/;"	d
GPIO_PAR_TIMER_T1IN_LCDCONTRAST	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T1IN_LCDCONTRAST	/;"	d
GPIO_PAR_TIMER_T1IN_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN_MASK	/;"	d
GPIO_PAR_TIMER_T1IN_SDHC_DAT1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN_SDHC_DAT1	/;"	d
GPIO_PAR_TIMER_T1IN_T1IN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T1IN_T1IN	/;"	d
GPIO_PAR_TIMER_T1IN_T1IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN_T1IN	/;"	d
GPIO_PAR_TIMER_T1IN_T1IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T1IN_T1IN	/;"	d
GPIO_PAR_TIMER_T1IN_T1OUT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T1IN_T1OUT	/;"	d
GPIO_PAR_TIMER_T1IN_T1OUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T1IN_T1OUT	/;"	d
GPIO_PAR_TIMER_T1IN_T1OUT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T1IN_T1OUT	/;"	d
GPIO_PAR_TIMER_T1IN_U2CTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T1IN_U2CTS	/;"	d
GPIO_PAR_TIMER_T1IN_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T1IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T1IN_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T1IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T2IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN(/;"	d
GPIO_PAR_TIMER_T2IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T2IN(/;"	d
GPIO_PAR_TIMER_T2IN_DSPIPCS2	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T2IN_DSPIPCS2	/;"	d
GPIO_PAR_TIMER_T2IN_EXTA2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN_EXTA2	/;"	d
GPIO_PAR_TIMER_T2IN_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T2IN_GPIO	/;"	d
GPIO_PAR_TIMER_T2IN_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN_GPIO	/;"	d
GPIO_PAR_TIMER_T2IN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T2IN_GPIO	/;"	d
GPIO_PAR_TIMER_T2IN_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN_MASK	/;"	d
GPIO_PAR_TIMER_T2IN_SDHC_DAT2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN_SDHC_DAT2	/;"	d
GPIO_PAR_TIMER_T2IN_T2IN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T2IN_T2IN	/;"	d
GPIO_PAR_TIMER_T2IN_T2IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN_T2IN	/;"	d
GPIO_PAR_TIMER_T2IN_T2IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T2IN_T2IN	/;"	d
GPIO_PAR_TIMER_T2IN_T2OUT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T2IN_T2OUT	/;"	d
GPIO_PAR_TIMER_T2IN_T2OUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T2IN_T2OUT	/;"	d
GPIO_PAR_TIMER_T2IN_T2OUT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T2IN_T2OUT	/;"	d
GPIO_PAR_TIMER_T2IN_U2TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T2IN_U2TXD	/;"	d
GPIO_PAR_TIMER_T2IN_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T2IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T2IN_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T2IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T3IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN(/;"	d
GPIO_PAR_TIMER_T3IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T3IN(/;"	d
GPIO_PAR_TIMER_T3IN_EXTA3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_EXTA3	/;"	d
GPIO_PAR_TIMER_T3IN_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T3IN_GPIO	/;"	d
GPIO_PAR_TIMER_T3IN_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_GPIO	/;"	d
GPIO_PAR_TIMER_T3IN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T3IN_GPIO	/;"	d
GPIO_PAR_TIMER_T3IN_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_MASK	/;"	d
GPIO_PAR_TIMER_T3IN_SSIMCLK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T3IN_SSIMCLK	/;"	d
GPIO_PAR_TIMER_T3IN_T3IN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T3IN_T3IN	/;"	d
GPIO_PAR_TIMER_T3IN_T3IN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_T3IN	/;"	d
GPIO_PAR_TIMER_T3IN_T3IN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T3IN_T3IN	/;"	d
GPIO_PAR_TIMER_T3IN_T3OUT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T3IN_T3OUT	/;"	d
GPIO_PAR_TIMER_T3IN_T3OUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_T3OUT	/;"	d
GPIO_PAR_TIMER_T3IN_T3OUT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T3IN_T3OUT	/;"	d
GPIO_PAR_TIMER_T3IN_U2RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T3IN_U2RXD	/;"	d
GPIO_PAR_TIMER_T3IN_ULIPI_DIR	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_ULIPI_DIR	/;"	d
GPIO_PAR_TIMER_T3IN_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_TIMER_T3IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T3IN_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_TIMER_T3IN_UNMASK	/;"	d
GPIO_PAR_TIMER_T3IN_USB0_VBUSEN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_TIMER_T3IN_USB0_VBUSEN	/;"	d
GPIO_PAR_TIMER_TIN2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN2(/;"	d
GPIO_PAR_TIMER_TIN2_CANRX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN2_CANRX	/;"	d
GPIO_PAR_TIMER_TIN2_IRQ	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN2_IRQ	/;"	d
GPIO_PAR_TIMER_TIN2_TIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN2_TIN	/;"	d
GPIO_PAR_TIMER_TIN3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN3(/;"	d
GPIO_PAR_TIMER_TIN3_CANRX	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN3_CANRX	/;"	d
GPIO_PAR_TIMER_TIN3_IRQ	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN3_IRQ	/;"	d
GPIO_PAR_TIMER_TIN3_TIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TIN3_TIN	/;"	d
GPIO_PAR_TIMER_TOUT2	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TOUT2	/;"	d
GPIO_PAR_TIMER_TOUT3	arch/m68k/include/asm/m547x_8x.h	/^#define GPIO_PAR_TIMER_TOUT3	/;"	d
GPIO_PAR_TIN0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN0(/;"	d
GPIO_PAR_TIN0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN0(/;"	d
GPIO_PAR_TIN0_CODEC_ALTCLK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN0_CODEC_ALTCLK	/;"	d
GPIO_PAR_TIN0_DREQ0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN0_DREQ0	/;"	d
GPIO_PAR_TIN0_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN0_GPIO	/;"	d
GPIO_PAR_TIN0_TIN0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN0_TIN0	/;"	d
GPIO_PAR_TIN0_TIN0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN0_TIN0	/;"	d
GPIO_PAR_TIN0_TOUT0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN0_TOUT0	/;"	d
GPIO_PAR_TIN0_TOUT0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN0_TOUT0	/;"	d
GPIO_PAR_TIN0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN0_UNMASK	/;"	d
GPIO_PAR_TIN1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN1(/;"	d
GPIO_PAR_TIN1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN1(/;"	d
GPIO_PAR_TIN1_DACK1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN1_DACK1	/;"	d
GPIO_PAR_TIN1_DACK1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN1_DACK1	/;"	d
GPIO_PAR_TIN1_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN1_GPIO	/;"	d
GPIO_PAR_TIN1_TIN1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN1_TIN1	/;"	d
GPIO_PAR_TIN1_TIN1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN1_TIN1	/;"	d
GPIO_PAR_TIN1_TOUT1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN1_TOUT1	/;"	d
GPIO_PAR_TIN1_TOUT1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN1_TOUT1	/;"	d
GPIO_PAR_TIN1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN1_UNMASK	/;"	d
GPIO_PAR_TIN2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN2(/;"	d
GPIO_PAR_TIN2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN2(/;"	d
GPIO_PAR_TIN2_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN2_GPIO	/;"	d
GPIO_PAR_TIN2_IRQ02	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN2_IRQ02	/;"	d
GPIO_PAR_TIN2_TIN2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN2_TIN2	/;"	d
GPIO_PAR_TIN2_TIN2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN2_TIN2	/;"	d
GPIO_PAR_TIN2_TOUT2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN2_TOUT2	/;"	d
GPIO_PAR_TIN2_TOUT2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN2_TOUT2	/;"	d
GPIO_PAR_TIN2_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN2_UNMASK	/;"	d
GPIO_PAR_TIN2_UTXD2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN2_UTXD2	/;"	d
GPIO_PAR_TIN3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN3(/;"	d
GPIO_PAR_TIN3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN3(/;"	d
GPIO_PAR_TIN3_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN3_GPIO	/;"	d
GPIO_PAR_TIN3_IRQ03	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN3_IRQ03	/;"	d
GPIO_PAR_TIN3_TIN3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN3_TIN3	/;"	d
GPIO_PAR_TIN3_TIN3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN3_TIN3	/;"	d
GPIO_PAR_TIN3_TOUT3	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN3_TOUT3	/;"	d
GPIO_PAR_TIN3_TOUT3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN3_TOUT3	/;"	d
GPIO_PAR_TIN3_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_TIN3_UNMASK	/;"	d
GPIO_PAR_TIN3_URXD2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_TIN3_URXD2	/;"	d
GPIO_PAR_TMR_TIN0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN0(/;"	d
GPIO_PAR_TMR_TIN0_TIN0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN0_TIN0	/;"	d
GPIO_PAR_TMR_TIN0_TOUT0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN0_TOUT0	/;"	d
GPIO_PAR_TMR_TIN0_U2TXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN0_U2TXD	/;"	d
GPIO_PAR_TMR_TIN0_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN0_UNMASK	/;"	d
GPIO_PAR_TMR_TIN1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN1(/;"	d
GPIO_PAR_TMR_TIN1_TIN1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN1_TIN1	/;"	d
GPIO_PAR_TMR_TIN1_TOUT1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN1_TOUT1	/;"	d
GPIO_PAR_TMR_TIN1_U2RXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN1_U2RXD	/;"	d
GPIO_PAR_TMR_TIN1_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN1_UNMASK	/;"	d
GPIO_PAR_TMR_TIN2	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN2(/;"	d
GPIO_PAR_TMR_TIN2_TIN2	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN2_TIN2	/;"	d
GPIO_PAR_TMR_TIN2_TOUT2	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN2_TOUT2	/;"	d
GPIO_PAR_TMR_TIN2_U2RTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN2_U2RTS	/;"	d
GPIO_PAR_TMR_TIN2_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN2_UNMASK	/;"	d
GPIO_PAR_TMR_TIN3	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN3(/;"	d
GPIO_PAR_TMR_TIN3_TIN3	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN3_TIN3	/;"	d
GPIO_PAR_TMR_TIN3_TOUT3	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN3_TOUT3	/;"	d
GPIO_PAR_TMR_TIN3_U2CTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN3_U2CTS	/;"	d
GPIO_PAR_TMR_TIN3_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_TMR_TIN3_UNMASK	/;"	d
GPIO_PAR_UART0_U0CTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0CTS(/;"	d
GPIO_PAR_UART0_U0CTS_DSPI2_SCK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0CTS_DSPI2_SCK	/;"	d
GPIO_PAR_UART0_U0CTS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0CTS_GPIO	/;"	d
GPIO_PAR_UART0_U0CTS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0CTS_MASK	/;"	d
GPIO_PAR_UART0_U0CTS_U0CTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0CTS_U0CTS	/;"	d
GPIO_PAR_UART0_U0CTS_U4TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0CTS_U4TXD	/;"	d
GPIO_PAR_UART0_U0RTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RTS(/;"	d
GPIO_PAR_UART0_U0RTS_DSPI2_PCS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RTS_DSPI2_PCS0	/;"	d
GPIO_PAR_UART0_U0RTS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RTS_GPIO	/;"	d
GPIO_PAR_UART0_U0RTS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RTS_MASK	/;"	d
GPIO_PAR_UART0_U0RTS_U0RTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RTS_U0RTS	/;"	d
GPIO_PAR_UART0_U0RTS_U4RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RTS_U4RXD	/;"	d
GPIO_PAR_UART0_U0RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RXD(/;"	d
GPIO_PAR_UART0_U0RXD_DSPI2_SIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RXD_DSPI2_SIN	/;"	d
GPIO_PAR_UART0_U0RXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RXD_GPIO	/;"	d
GPIO_PAR_UART0_U0RXD_I2C4SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RXD_I2C4SDA	/;"	d
GPIO_PAR_UART0_U0RXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RXD_MASK	/;"	d
GPIO_PAR_UART0_U0RXD_U0RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0RXD_U0RXD	/;"	d
GPIO_PAR_UART0_U0TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0TXD(/;"	d
GPIO_PAR_UART0_U0TXD_DSPI2_SOUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0TXD_DSPI2_SOUT	/;"	d
GPIO_PAR_UART0_U0TXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0TXD_GPIO	/;"	d
GPIO_PAR_UART0_U0TXD_I2C4SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0TXD_I2C4SCL	/;"	d
GPIO_PAR_UART0_U0TXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0TXD_MASK	/;"	d
GPIO_PAR_UART0_U0TXD_U0TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART0_U0TXD_U0TXD	/;"	d
GPIO_PAR_UART0_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART0_UNMASK	/;"	d
GPIO_PAR_UART1_U1CTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1CTS(/;"	d
GPIO_PAR_UART1_U1CTS_DSPI3_SCK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1CTS_DSPI3_SCK	/;"	d
GPIO_PAR_UART1_U1CTS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1CTS_GPIO	/;"	d
GPIO_PAR_UART1_U1CTS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1CTS_MASK	/;"	d
GPIO_PAR_UART1_U1CTS_U1CTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1CTS_U1CTS	/;"	d
GPIO_PAR_UART1_U1CTS_U5TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1CTS_U5TXD	/;"	d
GPIO_PAR_UART1_U1RTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RTS(/;"	d
GPIO_PAR_UART1_U1RTS_DSPI3_PCS0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RTS_DSPI3_PCS0	/;"	d
GPIO_PAR_UART1_U1RTS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RTS_GPIO	/;"	d
GPIO_PAR_UART1_U1RTS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RTS_MASK	/;"	d
GPIO_PAR_UART1_U1RTS_U1RTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RTS_U1RTS	/;"	d
GPIO_PAR_UART1_U1RTS_U5RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RTS_U5RXD	/;"	d
GPIO_PAR_UART1_U1RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RXD(/;"	d
GPIO_PAR_UART1_U1RXD_DSPI3_SIN	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RXD_DSPI3_SIN	/;"	d
GPIO_PAR_UART1_U1RXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RXD_GPIO	/;"	d
GPIO_PAR_UART1_U1RXD_I2C5SDA	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RXD_I2C5SDA	/;"	d
GPIO_PAR_UART1_U1RXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RXD_MASK	/;"	d
GPIO_PAR_UART1_U1RXD_U1RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1RXD_U1RXD	/;"	d
GPIO_PAR_UART1_U1TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1TXD(/;"	d
GPIO_PAR_UART1_U1TXD_DSPI3_SOUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1TXD_DSPI3_SOUT	/;"	d
GPIO_PAR_UART1_U1TXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1TXD_GPIO	/;"	d
GPIO_PAR_UART1_U1TXD_I2C5SCL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1TXD_I2C5SCL	/;"	d
GPIO_PAR_UART1_U1TXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1TXD_MASK	/;"	d
GPIO_PAR_UART1_U1TXD_U1TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART1_U1TXD_U1TXD	/;"	d
GPIO_PAR_UART1_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART1_UNMASK	/;"	d
GPIO_PAR_UART2_U2CTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2CTS(/;"	d
GPIO_PAR_UART2_U2CTS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2CTS_GPIO	/;"	d
GPIO_PAR_UART2_U2CTS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2CTS_MASK	/;"	d
GPIO_PAR_UART2_U2CTS_SSI1_BCLK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2CTS_SSI1_BCLK	/;"	d
GPIO_PAR_UART2_U2CTS_U2CTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2CTS_U2CTS	/;"	d
GPIO_PAR_UART2_U2CTS_U6TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2CTS_U6TXD	/;"	d
GPIO_PAR_UART2_U2RTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RTS(/;"	d
GPIO_PAR_UART2_U2RTS_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RTS_GPIO	/;"	d
GPIO_PAR_UART2_U2RTS_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RTS_MASK	/;"	d
GPIO_PAR_UART2_U2RTS_SSI1_FS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RTS_SSI1_FS	/;"	d
GPIO_PAR_UART2_U2RTS_U2RTS	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RTS_U2RTS	/;"	d
GPIO_PAR_UART2_U2RTS_U6RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RTS_U6RXD	/;"	d
GPIO_PAR_UART2_U2RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RXD(/;"	d
GPIO_PAR_UART2_U2RXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RXD_GPIO	/;"	d
GPIO_PAR_UART2_U2RXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RXD_MASK	/;"	d
GPIO_PAR_UART2_U2RXD_PWM_A3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RXD_PWM_A3	/;"	d
GPIO_PAR_UART2_U2RXD_SSI1_RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RXD_SSI1_RXD	/;"	d
GPIO_PAR_UART2_U2RXD_U2RXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2RXD_U2RXD	/;"	d
GPIO_PAR_UART2_U2TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2TXD(/;"	d
GPIO_PAR_UART2_U2TXD_GPIO	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2TXD_GPIO	/;"	d
GPIO_PAR_UART2_U2TXD_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2TXD_MASK	/;"	d
GPIO_PAR_UART2_U2TXD_PWM_B3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2TXD_PWM_B3	/;"	d
GPIO_PAR_UART2_U2TXD_SSI1_TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2TXD_SSI1_TXD	/;"	d
GPIO_PAR_UART2_U2TXD_U2TXD	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PAR_UART2_U2TXD_U2TXD	/;"	d
GPIO_PAR_UART_CAN1EN	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_CAN1EN	/;"	d
GPIO_PAR_UART_CTS0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_CTS0(/;"	d
GPIO_PAR_UART_CTS0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_CTS0	/;"	d
GPIO_PAR_UART_CTS0_U0CTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_CTS0_U0CTS	/;"	d
GPIO_PAR_UART_CTS0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_CTS0_UNMASK	/;"	d
GPIO_PAR_UART_CTS0_USB0_VBEN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_CTS0_USB0_VBEN	/;"	d
GPIO_PAR_UART_CTS0_USB_PULLUP	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_CTS0_USB_PULLUP	/;"	d
GPIO_PAR_UART_CTS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_CTS1(/;"	d
GPIO_PAR_UART_CTS1_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_CTS1_GPIO	/;"	d
GPIO_PAR_UART_CTS1_SSI_BCLK	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_CTS1_SSI_BCLK	/;"	d
GPIO_PAR_UART_CTS1_UCTS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_CTS1_UCTS1	/;"	d
GPIO_PAR_UART_CTS1_ULPI_D7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_CTS1_ULPI_D7	/;"	d
GPIO_PAR_UART_DREQ2	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_DREQ2	/;"	d
GPIO_PAR_UART_RTS0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_RTS0(/;"	d
GPIO_PAR_UART_RTS0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RTS0	/;"	d
GPIO_PAR_UART_RTS0_U0RTS	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_RTS0_U0RTS	/;"	d
GPIO_PAR_UART_RTS0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_RTS0_UNMASK	/;"	d
GPIO_PAR_UART_RTS0_USBO_VBOC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_RTS0_USBO_VBOC	/;"	d
GPIO_PAR_UART_RTS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RTS1(/;"	d
GPIO_PAR_UART_RTS1_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RTS1_GPIO	/;"	d
GPIO_PAR_UART_RTS1_SSI_FS	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RTS1_SSI_FS	/;"	d
GPIO_PAR_UART_RTS1_ULPI_D6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RTS1_ULPI_D6	/;"	d
GPIO_PAR_UART_RTS1_URTS1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RTS1_URTS1	/;"	d
GPIO_PAR_UART_RXD0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RXD0	/;"	d
GPIO_PAR_UART_RXD1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RXD1(/;"	d
GPIO_PAR_UART_RXD1_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RXD1_GPIO	/;"	d
GPIO_PAR_UART_RXD1_SSI_RXD	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RXD1_SSI_RXD	/;"	d
GPIO_PAR_UART_RXD1_ULPI_D5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RXD1_ULPI_D5	/;"	d
GPIO_PAR_UART_RXD1_URXD1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_RXD1_URXD1	/;"	d
GPIO_PAR_UART_TXD0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_TXD0	/;"	d
GPIO_PAR_UART_TXD1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_TXD1(/;"	d
GPIO_PAR_UART_TXD1_GPIO	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_TXD1_GPIO	/;"	d
GPIO_PAR_UART_TXD1_SSI_TXD	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_TXD1_SSI_TXD	/;"	d
GPIO_PAR_UART_TXD1_ULPI_D4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_TXD1_ULPI_D4	/;"	d
GPIO_PAR_UART_TXD1_UTXD1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PAR_UART_TXD1_UTXD1	/;"	d
GPIO_PAR_UART_U0CTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U0CTS	/;"	d
GPIO_PAR_UART_U0CTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0CTS	/;"	d
GPIO_PAR_UART_U0CTS_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0CTS_GPIO	/;"	d
GPIO_PAR_UART_U0CTS_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0CTS_GPIO	/;"	d
GPIO_PAR_UART_U0CTS_PCS0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0CTS_PCS0	/;"	d
GPIO_PAR_UART_U0CTS_T1OUT	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0CTS_T1OUT	/;"	d
GPIO_PAR_UART_U0CTS_TIN0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0CTS_TIN0	/;"	d
GPIO_PAR_UART_U0CTS_U0CTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0CTS_U0CTS	/;"	d
GPIO_PAR_UART_U0CTS_U0CTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0CTS_U0CTS	/;"	d
GPIO_PAR_UART_U0CTS_U0CTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0CTS_U0CTS	/;"	d
GPIO_PAR_UART_U0CTS_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0CTS_UNMASK	/;"	d
GPIO_PAR_UART_U0CTS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0CTS_UNMASK	/;"	d
GPIO_PAR_UART_U0CTS_USBVBUSEN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0CTS_USBVBUSEN	/;"	d
GPIO_PAR_UART_U0RTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U0RTS	/;"	d
GPIO_PAR_UART_U0RTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0RTS	/;"	d
GPIO_PAR_UART_U0RTS_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RTS_GPIO	/;"	d
GPIO_PAR_UART_U0RTS_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0RTS_GPIO	/;"	d
GPIO_PAR_UART_U0RTS_PCS0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0RTS_PCS0	/;"	d
GPIO_PAR_UART_U0RTS_T1IN	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RTS_T1IN	/;"	d
GPIO_PAR_UART_U0RTS_TOUT0	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0RTS_TOUT0	/;"	d
GPIO_PAR_UART_U0RTS_U0RTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0RTS_U0RTS	/;"	d
GPIO_PAR_UART_U0RTS_U0RTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RTS_U0RTS	/;"	d
GPIO_PAR_UART_U0RTS_U0RTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0RTS_U0RTS	/;"	d
GPIO_PAR_UART_U0RTS_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0RTS_UNMASK	/;"	d
GPIO_PAR_UART_U0RTS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RTS_UNMASK	/;"	d
GPIO_PAR_UART_U0RTS_USBVBUSOC	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RTS_USBVBUSOC	/;"	d
GPIO_PAR_UART_U0RXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0RXD	/;"	d
GPIO_PAR_UART_U0RXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U0RXD	/;"	d
GPIO_PAR_UART_U0RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_U0RXD	/;"	d
GPIO_PAR_UART_U0RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0RXD	/;"	d
GPIO_PAR_UART_U0RXD_CANRX	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RXD_CANRX	/;"	d
GPIO_PAR_UART_U0RXD_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RXD_GPIO	/;"	d
GPIO_PAR_UART_U0RXD_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0RXD_GPIO	/;"	d
GPIO_PAR_UART_U0RXD_U0RXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RXD_U0RXD	/;"	d
GPIO_PAR_UART_U0RXD_U0RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0RXD_U0RXD	/;"	d
GPIO_PAR_UART_U0RXD_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0RXD_UNMASK	/;"	d
GPIO_PAR_UART_U0TXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U0TXD	/;"	d
GPIO_PAR_UART_U0TXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U0TXD	/;"	d
GPIO_PAR_UART_U0TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_U0TXD	/;"	d
GPIO_PAR_UART_U0TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0TXD	/;"	d
GPIO_PAR_UART_U0TXD_CANTX	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0TXD_CANTX	/;"	d
GPIO_PAR_UART_U0TXD_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0TXD_GPIO	/;"	d
GPIO_PAR_UART_U0TXD_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0TXD_GPIO	/;"	d
GPIO_PAR_UART_U0TXD_U0TXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0TXD_U0TXD	/;"	d
GPIO_PAR_UART_U0TXD_U0TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U0TXD_U0TXD	/;"	d
GPIO_PAR_UART_U0TXD_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U0TXD_UNMASK	/;"	d
GPIO_PAR_UART_U1CTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1CTS(/;"	d
GPIO_PAR_UART_U1CTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1CTS	/;"	d
GPIO_PAR_UART_U1CTS_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1CTS_GPIO	/;"	d
GPIO_PAR_UART_U1CTS_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1CTS_GPIO	/;"	d
GPIO_PAR_UART_U1CTS_LCDCLS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1CTS_LCDCLS	/;"	d
GPIO_PAR_UART_U1CTS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1CTS_MASK	/;"	d
GPIO_PAR_UART_U1CTS_PCS1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1CTS_PCS1	/;"	d
GPIO_PAR_UART_U1CTS_SSIBCLK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1CTS_SSIBCLK	/;"	d
GPIO_PAR_UART_U1CTS_TIN1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1CTS_TIN1	/;"	d
GPIO_PAR_UART_U1CTS_U1CTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1CTS_U1CTS	/;"	d
GPIO_PAR_UART_U1CTS_U1CTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1CTS_U1CTS	/;"	d
GPIO_PAR_UART_U1CTS_U1CTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1CTS_U1CTS	/;"	d
GPIO_PAR_UART_U1CTS_U1CTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1CTS_U1CTS	/;"	d
GPIO_PAR_UART_U1CTS_U2CTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1CTS_U2CTS	/;"	d
GPIO_PAR_UART_U1CTS_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1CTS_UNMASK	/;"	d
GPIO_PAR_UART_U1CTS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1CTS_UNMASK	/;"	d
GPIO_PAR_UART_U1RTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RTS(/;"	d
GPIO_PAR_UART_U1RTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1RTS	/;"	d
GPIO_PAR_UART_U1RTS_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RTS_GPIO	/;"	d
GPIO_PAR_UART_U1RTS_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1RTS_GPIO	/;"	d
GPIO_PAR_UART_U1RTS_LCDPS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RTS_LCDPS	/;"	d
GPIO_PAR_UART_U1RTS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RTS_MASK	/;"	d
GPIO_PAR_UART_U1RTS_PCS1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1RTS_PCS1	/;"	d
GPIO_PAR_UART_U1RTS_SSIFS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RTS_SSIFS	/;"	d
GPIO_PAR_UART_U1RTS_TOUT1	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1RTS_TOUT1	/;"	d
GPIO_PAR_UART_U1RTS_U1RTS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1RTS_U1RTS	/;"	d
GPIO_PAR_UART_U1RTS_U1RTS	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RTS_U1RTS	/;"	d
GPIO_PAR_UART_U1RTS_U1RTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RTS_U1RTS	/;"	d
GPIO_PAR_UART_U1RTS_U1RTS	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1RTS_U1RTS	/;"	d
GPIO_PAR_UART_U1RTS_U2RTS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RTS_U2RTS	/;"	d
GPIO_PAR_UART_U1RTS_UNMASK	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1RTS_UNMASK	/;"	d
GPIO_PAR_UART_U1RTS_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RTS_UNMASK	/;"	d
GPIO_PAR_UART_U1RXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1RXD	/;"	d
GPIO_PAR_UART_U1RXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RXD(/;"	d
GPIO_PAR_UART_U1RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1RXD	/;"	d
GPIO_PAR_UART_U1RXD_CAN0RX	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RXD_CAN0RX	/;"	d
GPIO_PAR_UART_U1RXD_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RXD_GPIO	/;"	d
GPIO_PAR_UART_U1RXD_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1RXD_GPIO	/;"	d
GPIO_PAR_UART_U1RXD_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RXD_MASK	/;"	d
GPIO_PAR_UART_U1RXD_SSIRXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RXD_SSIRXD	/;"	d
GPIO_PAR_UART_U1RXD_U1RXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RXD_U1RXD	/;"	d
GPIO_PAR_UART_U1RXD_U1RXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1RXD_U1RXD	/;"	d
GPIO_PAR_UART_U1RXD_U1RXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1RXD_U1RXD	/;"	d
GPIO_PAR_UART_U1RXD_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1RXD_UNMASK	/;"	d
GPIO_PAR_UART_U1TXD	arch/m68k/include/asm/m520x.h	/^#define GPIO_PAR_UART_U1TXD	/;"	d
GPIO_PAR_UART_U1TXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1TXD(/;"	d
GPIO_PAR_UART_U1TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1TXD	/;"	d
GPIO_PAR_UART_U1TXD_CAN0TX	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1TXD_CAN0TX	/;"	d
GPIO_PAR_UART_U1TXD_GPIO	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1TXD_GPIO	/;"	d
GPIO_PAR_UART_U1TXD_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1TXD_GPIO	/;"	d
GPIO_PAR_UART_U1TXD_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1TXD_MASK	/;"	d
GPIO_PAR_UART_U1TXD_SSITXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1TXD_SSITXD	/;"	d
GPIO_PAR_UART_U1TXD_U1TXD	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1TXD_U1TXD	/;"	d
GPIO_PAR_UART_U1TXD_U1TXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U1TXD_U1TXD	/;"	d
GPIO_PAR_UART_U1TXD_U1TXD	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_UART_U1TXD_U1TXD	/;"	d
GPIO_PAR_UART_U1TXD_UNMASK	arch/m68k/include/asm/m5227x.h	/^#define GPIO_PAR_UART_U1TXD_UNMASK	/;"	d
GPIO_PAR_UART_U2RXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U2RXD	/;"	d
GPIO_PAR_UART_U2RXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_U2RXD	/;"	d
GPIO_PAR_UART_U2TXD	arch/m68k/include/asm/m5235.h	/^#define GPIO_PAR_UART_U2TXD	/;"	d
GPIO_PAR_UART_U2TXD	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PAR_UART_U2TXD	/;"	d
GPIO_PAR_USB_VBUSEN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSEN(/;"	d
GPIO_PAR_USB_VBUSEN_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSEN_GPIO	/;"	d
GPIO_PAR_USB_VBUSEN_ULPI_NXT	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSEN_ULPI_NXT	/;"	d
GPIO_PAR_USB_VBUSEN_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSEN_UNMASK	/;"	d
GPIO_PAR_USB_VBUSEN_USBPULLUP	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSEN_USBPULLUP	/;"	d
GPIO_PAR_USB_VBUSEN_VBUSEN	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSEN_VBUSEN	/;"	d
GPIO_PAR_USB_VBUSOC	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSOC(/;"	d
GPIO_PAR_USB_VBUSOC_GPIO	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSOC_GPIO	/;"	d
GPIO_PAR_USB_VBUSOC_ULPI_STP	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSOC_ULPI_STP	/;"	d
GPIO_PAR_USB_VBUSOC_UNMASK	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSOC_UNMASK	/;"	d
GPIO_PAR_USB_VBUSOC_VBUSOC	arch/m68k/include/asm/m5445x.h	/^#define GPIO_PAR_USB_VBUSOC_VBUSOC	/;"	d
GPIO_PASSWD	drivers/gpio/kona_gpio.c	/^#define GPIO_PASSWD	/;"	d	file:
GPIO_PB0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB0	/;"	d
GPIO_PB0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB0	/;"	d
GPIO_PB1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB1	/;"	d
GPIO_PB1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB1	/;"	d
GPIO_PB10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB10	/;"	d
GPIO_PB10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB10	/;"	d
GPIO_PB11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB11	/;"	d
GPIO_PB11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB11	/;"	d
GPIO_PB12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB12	/;"	d
GPIO_PB12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB12	/;"	d
GPIO_PB13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB13	/;"	d
GPIO_PB13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB13	/;"	d
GPIO_PB14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB14	/;"	d
GPIO_PB14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB14	/;"	d
GPIO_PB15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB15	/;"	d
GPIO_PB15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB15	/;"	d
GPIO_PB2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB2	/;"	d
GPIO_PB2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB2	/;"	d
GPIO_PB3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB3	/;"	d
GPIO_PB3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB3	/;"	d
GPIO_PB4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB4	/;"	d
GPIO_PB4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB4	/;"	d
GPIO_PB5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB5	/;"	d
GPIO_PB5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB5	/;"	d
GPIO_PB6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB6	/;"	d
GPIO_PB6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB6	/;"	d
GPIO_PB7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB7	/;"	d
GPIO_PB7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB7	/;"	d
GPIO_PB8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB8	/;"	d
GPIO_PB8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB8	/;"	d
GPIO_PB9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PB9	/;"	d
GPIO_PB9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PB9	/;"	d
GPIO_PBCNT_E_MDC	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_MDC	/;"	d
GPIO_PBCNT_E_RXD1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_RXD1	/;"	d
GPIO_PBCNT_E_RXD2	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_RXD2	/;"	d
GPIO_PBCNT_E_RXD3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_RXD3	/;"	d
GPIO_PBCNT_E_RXER	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_RXER	/;"	d
GPIO_PBCNT_E_TXD1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_TXD1	/;"	d
GPIO_PBCNT_E_TXD2	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_TXD2	/;"	d
GPIO_PBCNT_E_TXD3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_E_TXD3	/;"	d
GPIO_PBCNT_PB0MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB0MSK	/;"	d
GPIO_PBCNT_PB10MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB10MSK	/;"	d
GPIO_PBCNT_PB11MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB11MSK	/;"	d
GPIO_PBCNT_PB12MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB12MSK	/;"	d
GPIO_PBCNT_PB13MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB13MSK	/;"	d
GPIO_PBCNT_PB14MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB14MSK	/;"	d
GPIO_PBCNT_PB15MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB15MSK	/;"	d
GPIO_PBCNT_PB1MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB1MSK	/;"	d
GPIO_PBCNT_PB2MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB2MSK	/;"	d
GPIO_PBCNT_PB3MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB3MSK	/;"	d
GPIO_PBCNT_PB4MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB4MSK	/;"	d
GPIO_PBCNT_PB6MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB6MSK	/;"	d
GPIO_PBCNT_PB7MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB7MSK	/;"	d
GPIO_PBCNT_PB8MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB8MSK	/;"	d
GPIO_PBCNT_PB9MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_PB9MSK	/;"	d
GPIO_PBCNT_TA	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_TA	/;"	d
GPIO_PBCNT_TOUT0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_TOUT0	/;"	d
GPIO_PBCNT_URT0_CLK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_URT0_CLK	/;"	d
GPIO_PBCNT_URT0_CTS	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_URT0_CTS	/;"	d
GPIO_PBCNT_URT0_RTS	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_URT0_RTS	/;"	d
GPIO_PBCNT_URT0_RXD	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_URT0_RXD	/;"	d
GPIO_PBCNT_URT0_TIN2	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_URT0_TIN2	/;"	d
GPIO_PBCNT_URT0_TXD	arch/m68k/include/asm/m5272.h	/^#define GPIO_PBCNT_URT0_TXD	/;"	d
GPIO_PC0	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC0	/;"	d
GPIO_PC0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC0	/;"	d
GPIO_PC0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC0	/;"	d
GPIO_PC1	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC1	/;"	d
GPIO_PC1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC1	/;"	d
GPIO_PC1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC1	/;"	d
GPIO_PC10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC10	/;"	d
GPIO_PC10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC10	/;"	d
GPIO_PC11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC11	/;"	d
GPIO_PC11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC11	/;"	d
GPIO_PC12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC12	/;"	d
GPIO_PC12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC12	/;"	d
GPIO_PC13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC13	/;"	d
GPIO_PC13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC13	/;"	d
GPIO_PC14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC14	/;"	d
GPIO_PC14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC14	/;"	d
GPIO_PC15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC15	/;"	d
GPIO_PC15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC15	/;"	d
GPIO_PC2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC2	/;"	d
GPIO_PC2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC2	/;"	d
GPIO_PC3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC3	/;"	d
GPIO_PC3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC3	/;"	d
GPIO_PC4	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC4	/;"	d
GPIO_PC4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC4	/;"	d
GPIO_PC4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC4	/;"	d
GPIO_PC5	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC5	/;"	d
GPIO_PC5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC5	/;"	d
GPIO_PC5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC5	/;"	d
GPIO_PC6	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC6	/;"	d
GPIO_PC6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC6	/;"	d
GPIO_PC6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC6	/;"	d
GPIO_PC7	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC7	/;"	d
GPIO_PC7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC7	/;"	d
GPIO_PC7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC7	/;"	d
GPIO_PC8	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC8	/;"	d
GPIO_PC8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC8	/;"	d
GPIO_PC8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC8	/;"	d
GPIO_PC9	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PC9	/;"	d
GPIO_PC9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PC9	/;"	d
GPIO_PC9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PC9	/;"	d
GPIO_PCIE1_EN	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_PCIE1_EN	/;"	d
GPIO_PCIE2_EN	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_PCIE2_EN	/;"	d
GPIO_PCIE_RST	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_PCIE_RST	/;"	d	file:
GPIO_PCLRR_ADDR	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_ADDR(/;"	d
GPIO_PCLRR_ADDR_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_ADDR_MASK	/;"	d
GPIO_PCLRR_BE_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BE_0	/;"	d
GPIO_PCLRR_BE_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BE_1	/;"	d
GPIO_PCLRR_BE_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BE_2	/;"	d
GPIO_PCLRR_BE_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BE_3	/;"	d
GPIO_PCLRR_BS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_BS(/;"	d
GPIO_PCLRR_BS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_BS_MASK	/;"	d
GPIO_PCLRR_BUSCTL_L0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BUSCTL_L0	/;"	d
GPIO_PCLRR_BUSCTL_L1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BUSCTL_L1	/;"	d
GPIO_PCLRR_BUSCTL_L2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BUSCTL_L2	/;"	d
GPIO_PCLRR_BUSCTL_L3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_BUSCTL_L3	/;"	d
GPIO_PCLRR_CS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_CS(/;"	d
GPIO_PCLRR_CS_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_CS_1	/;"	d
GPIO_PCLRR_CS_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_CS_2	/;"	d
GPIO_PCLRR_CS_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_CS_3	/;"	d
GPIO_PCLRR_CS_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_CS_4	/;"	d
GPIO_PCLRR_CS_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_CS_5	/;"	d
GPIO_PCLRR_CS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_CS_MASK	/;"	d
GPIO_PCLRR_ETPU	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_ETPU(/;"	d
GPIO_PCLRR_ETPU_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_ETPU_MASK	/;"	d
GPIO_PCLRR_FECH_L0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L0	/;"	d
GPIO_PCLRR_FECH_L1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L1	/;"	d
GPIO_PCLRR_FECH_L2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L2	/;"	d
GPIO_PCLRR_FECH_L3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L3	/;"	d
GPIO_PCLRR_FECH_L4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L4	/;"	d
GPIO_PCLRR_FECH_L5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L5	/;"	d
GPIO_PCLRR_FECH_L6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L6	/;"	d
GPIO_PCLRR_FECH_L7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECH_L7	/;"	d
GPIO_PCLRR_FECI2C	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_FECI2C(/;"	d
GPIO_PCLRR_FECI2C_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECI2C_0	/;"	d
GPIO_PCLRR_FECI2C_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECI2C_1	/;"	d
GPIO_PCLRR_FECI2C_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECI2C_2	/;"	d
GPIO_PCLRR_FECI2C_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_FECI2C_3	/;"	d
GPIO_PCLRR_FECI2C_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_FECI2C_MASK	/;"	d
GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0	/;"	d
GPIO_PCLRR_LCDCTLL0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL0	/;"	d
GPIO_PCLRR_LCDCTLL1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL1	/;"	d
GPIO_PCLRR_LCDCTLL2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL2	/;"	d
GPIO_PCLRR_LCDCTLL3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL3	/;"	d
GPIO_PCLRR_LCDCTLL4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL4	/;"	d
GPIO_PCLRR_LCDCTLL5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL5	/;"	d
GPIO_PCLRR_LCDCTLL6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL6	/;"	d
GPIO_PCLRR_LCDCTLL7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDCTLL7	/;"	d
GPIO_PCLRR_LCDDATAH0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAH0	/;"	d
GPIO_PCLRR_LCDDATAH1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAH1	/;"	d
GPIO_PCLRR_LCDDATAL0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL0	/;"	d
GPIO_PCLRR_LCDDATAL1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL1	/;"	d
GPIO_PCLRR_LCDDATAL2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL2	/;"	d
GPIO_PCLRR_LCDDATAL3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL3	/;"	d
GPIO_PCLRR_LCDDATAL4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL4	/;"	d
GPIO_PCLRR_LCDDATAL5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL5	/;"	d
GPIO_PCLRR_LCDDATAL6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL6	/;"	d
GPIO_PCLRR_LCDDATAL7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAL7	/;"	d
GPIO_PCLRR_LCDDATAM0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM0	/;"	d
GPIO_PCLRR_LCDDATAM1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM1	/;"	d
GPIO_PCLRR_LCDDATAM2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM2	/;"	d
GPIO_PCLRR_LCDDATAM3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM3	/;"	d
GPIO_PCLRR_LCDDATAM4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM4	/;"	d
GPIO_PCLRR_LCDDATAM5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM5	/;"	d
GPIO_PCLRR_LCDDATAM6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM6	/;"	d
GPIO_PCLRR_LCDDATAM7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_LCDDATAM7	/;"	d
GPIO_PCLRR_PWM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_PWM_2	/;"	d
GPIO_PCLRR_PWM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_PWM_3	/;"	d
GPIO_PCLRR_PWM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_PWM_4	/;"	d
GPIO_PCLRR_PWM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_PWM_5	/;"	d
GPIO_PCLRR_QSPI	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_QSPI(/;"	d
GPIO_PCLRR_QSPI0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_QSPI0	/;"	d
GPIO_PCLRR_QSPI1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_QSPI1	/;"	d
GPIO_PCLRR_QSPI2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_QSPI2	/;"	d
GPIO_PCLRR_QSPI3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_QSPI3	/;"	d
GPIO_PCLRR_QSPI4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_QSPI4	/;"	d
GPIO_PCLRR_QSPI5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_QSPI5	/;"	d
GPIO_PCLRR_QSPI_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_QSPI_MASK	/;"	d
GPIO_PCLRR_SDRAM	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_SDRAM(/;"	d
GPIO_PCLRR_SDRAM_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_SDRAM_MASK	/;"	d
GPIO_PCLRR_SSI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_SSI_0	/;"	d
GPIO_PCLRR_SSI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_SSI_1	/;"	d
GPIO_PCLRR_SSI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_SSI_2	/;"	d
GPIO_PCLRR_SSI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_SSI_3	/;"	d
GPIO_PCLRR_SSI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_SSI_4	/;"	d
GPIO_PCLRR_TIMER0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_TIMER0	/;"	d
GPIO_PCLRR_TIMER1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_TIMER1	/;"	d
GPIO_PCLRR_TIMER2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_TIMER2	/;"	d
GPIO_PCLRR_TIMER3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_TIMER3	/;"	d
GPIO_PCLRR_UART0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART0	/;"	d
GPIO_PCLRR_UART1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART1	/;"	d
GPIO_PCLRR_UART2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART2	/;"	d
GPIO_PCLRR_UART3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART3	/;"	d
GPIO_PCLRR_UART4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART4	/;"	d
GPIO_PCLRR_UART5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART5	/;"	d
GPIO_PCLRR_UART6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART6	/;"	d
GPIO_PCLRR_UART7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PCLRR_UART7	/;"	d
GPIO_PCLRR_UARTH	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_UARTH(/;"	d
GPIO_PCLRR_UARTH_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PCLRR_UARTH_MASK	/;"	d
GPIO_PCRH_DSPI_PCS0_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_DSPI_PCS0_PULLUP_EN	/;"	d
GPIO_PCRH_SIM_DATA1_PULLUP	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_SIM_DATA1_PULLUP	/;"	d
GPIO_PCRH_SIM_DATA1_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_SIM_DATA1_PULLUP_EN	/;"	d
GPIO_PCRH_SIM_VEN1_PULLUP	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_SIM_VEN1_PULLUP	/;"	d
GPIO_PCRH_SIM_VEN1_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_SIM_VEN1_PULLUP_EN	/;"	d
GPIO_PCRH_SSI_PULLUP	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_SSI_PULLUP	/;"	d
GPIO_PCRH_SSI_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRH_SSI_PULLUP_EN	/;"	d
GPIO_PCRL_SDHC_CMD_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRL_SDHC_CMD_PULLUP_EN	/;"	d
GPIO_PCRL_SDHC_DATA0_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRL_SDHC_DATA0_PULLUP_EN	/;"	d
GPIO_PCRL_SDHC_DATA1_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRL_SDHC_DATA1_PULLUP_EN	/;"	d
GPIO_PCRL_SDHC_DATA2_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRL_SDHC_DATA2_PULLUP_EN	/;"	d
GPIO_PCRL_SDHC_DATA3_PULLUP	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRL_SDHC_DATA3_PULLUP	/;"	d
GPIO_PCRL_SDHC_DATA3_PULLUP_EN	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PCRL_SDHC_DATA3_PULLUP_EN	/;"	d
GPIO_PCR_UCTS_U0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PCR_UCTS_U0	/;"	d
GPIO_PCR_UCTS_U1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PCR_UCTS_U1	/;"	d
GPIO_PCR_UCTS_U2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PCR_UCTS_U2	/;"	d
GPIO_PCR_URTS_U0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PCR_URTS_U0	/;"	d
GPIO_PCR_URTS_U1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PCR_URTS_U1	/;"	d
GPIO_PCR_URTS_U2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PCR_URTS_U2	/;"	d
GPIO_PD0	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD0	/;"	d
GPIO_PD0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD0	/;"	d
GPIO_PD0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD0	/;"	d
GPIO_PD1	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD1	/;"	d
GPIO_PD1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD1	/;"	d
GPIO_PD1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD1	/;"	d
GPIO_PD10	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD10	/;"	d
GPIO_PD10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD10	/;"	d
GPIO_PD10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD10	/;"	d
GPIO_PD11	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD11	/;"	d
GPIO_PD11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD11	/;"	d
GPIO_PD11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD11	/;"	d
GPIO_PD12	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD12	/;"	d
GPIO_PD12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD12	/;"	d
GPIO_PD12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD12	/;"	d
GPIO_PD13	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD13	/;"	d
GPIO_PD13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD13	/;"	d
GPIO_PD13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD13	/;"	d
GPIO_PD14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD14	/;"	d
GPIO_PD14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD14	/;"	d
GPIO_PD15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD15	/;"	d
GPIO_PD15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD15	/;"	d
GPIO_PD2	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD2	/;"	d
GPIO_PD2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD2	/;"	d
GPIO_PD2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD2	/;"	d
GPIO_PD3	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD3	/;"	d
GPIO_PD3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD3	/;"	d
GPIO_PD3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD3	/;"	d
GPIO_PD4	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD4	/;"	d
GPIO_PD4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD4	/;"	d
GPIO_PD4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD4	/;"	d
GPIO_PD5	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD5	/;"	d
GPIO_PD5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD5	/;"	d
GPIO_PD5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD5	/;"	d
GPIO_PD6	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD6	/;"	d
GPIO_PD6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD6	/;"	d
GPIO_PD6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD6	/;"	d
GPIO_PD7	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD7	/;"	d
GPIO_PD7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD7	/;"	d
GPIO_PD7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD7	/;"	d
GPIO_PD8	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD8	/;"	d
GPIO_PD8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD8	/;"	d
GPIO_PD8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD8	/;"	d
GPIO_PD9	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PD9	/;"	d
GPIO_PD9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PD9	/;"	d
GPIO_PD9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PD9	/;"	d
GPIO_PDCNT_DCL0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_DCL0	/;"	d
GPIO_PDCNT_DIN0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_DIN0	/;"	d
GPIO_PDCNT_DIN3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_DIN3	/;"	d
GPIO_PDCNT_DOUT0	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_DOUT0	/;"	d
GPIO_PDCNT_INT4	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_INT4	/;"	d
GPIO_PDCNT_INT5	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_INT5	/;"	d
GPIO_PDCNT_PD0MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD0MSK	/;"	d
GPIO_PDCNT_PD1MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD1MSK	/;"	d
GPIO_PDCNT_PD2MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD2MSK	/;"	d
GPIO_PDCNT_PD3MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD3MSK	/;"	d
GPIO_PDCNT_PD4MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD4MSK	/;"	d
GPIO_PDCNT_PD5MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD5MSK	/;"	d
GPIO_PDCNT_PD6MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD6MSK	/;"	d
GPIO_PDCNT_PD7MSK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PD7MSK	/;"	d
GPIO_PDCNT_PWM_OUT1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PWM_OUT1	/;"	d
GPIO_PDCNT_PWM_OUT2	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_PWM_OUT2	/;"	d
GPIO_PDCNT_QSPI_CS2	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_QSPI_CS2	/;"	d
GPIO_PDCNT_TIN1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_TIN1	/;"	d
GPIO_PDCNT_TOUT1	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_TOUT1	/;"	d
GPIO_PDCNT_URT1_CLK	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_URT1_CLK	/;"	d
GPIO_PDCNT_URT1_CTS	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_URT1_CTS	/;"	d
GPIO_PDCNT_URT1_RTS	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_URT1_RTS	/;"	d
GPIO_PDCNT_URT1_RXD	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_URT1_RXD	/;"	d
GPIO_PDCNT_URT1_TIN3	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_URT1_TIN3	/;"	d
GPIO_PDCNT_URT1_TXD	arch/m68k/include/asm/m5272.h	/^#define GPIO_PDCNT_URT1_TXD	/;"	d
GPIO_PDDR_ADDR	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_ADDR(/;"	d
GPIO_PDDR_ADDR_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_ADDR_MASK	/;"	d
GPIO_PDDR_BE_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BE_0	/;"	d
GPIO_PDDR_BE_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BE_1	/;"	d
GPIO_PDDR_BE_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BE_2	/;"	d
GPIO_PDDR_BE_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BE_3	/;"	d
GPIO_PDDR_BS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_BS(/;"	d
GPIO_PDDR_BS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_BS_MASK	/;"	d
GPIO_PDDR_BUSCTL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BUSCTL_0	/;"	d
GPIO_PDDR_BUSCTL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BUSCTL_1	/;"	d
GPIO_PDDR_BUSCTL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BUSCTL_2	/;"	d
GPIO_PDDR_BUSCTL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_BUSCTL_3	/;"	d
GPIO_PDDR_CS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_CS(/;"	d
GPIO_PDDR_CS_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_CS_1	/;"	d
GPIO_PDDR_CS_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_CS_2	/;"	d
GPIO_PDDR_CS_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_CS_3	/;"	d
GPIO_PDDR_CS_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_CS_4	/;"	d
GPIO_PDDR_CS_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_CS_5	/;"	d
GPIO_PDDR_CS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_CS_MASK	/;"	d
GPIO_PDDR_ETPU	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_ETPU(/;"	d
GPIO_PDDR_ETPU_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_ETPU_MASK	/;"	d
GPIO_PDDR_FECH_L0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L0	/;"	d
GPIO_PDDR_FECH_L1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L1	/;"	d
GPIO_PDDR_FECH_L2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L2	/;"	d
GPIO_PDDR_FECH_L3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L3	/;"	d
GPIO_PDDR_FECH_L4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L4	/;"	d
GPIO_PDDR_FECH_L5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L5	/;"	d
GPIO_PDDR_FECH_L6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L6	/;"	d
GPIO_PDDR_FECH_L7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECH_L7	/;"	d
GPIO_PDDR_FECI2C	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_FECI2C(/;"	d
GPIO_PDDR_FECI2C_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECI2C_0	/;"	d
GPIO_PDDR_FECI2C_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECI2C_1	/;"	d
GPIO_PDDR_FECI2C_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECI2C_2	/;"	d
GPIO_PDDR_FECI2C_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_FECI2C_3	/;"	d
GPIO_PDDR_FECI2C_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_FECI2C_MASK	/;"	d
GPIO_PDDR_G4_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PDDR_G4_MASK	/;"	d
GPIO_PDDR_G4_OUTPUT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PDDR_G4_OUTPUT	/;"	d
GPIO_PDDR_LCDCTLH_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLH_0	/;"	d
GPIO_PDDR_LCDCTLL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_0	/;"	d
GPIO_PDDR_LCDCTLL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_1	/;"	d
GPIO_PDDR_LCDCTLL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_2	/;"	d
GPIO_PDDR_LCDCTLL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_3	/;"	d
GPIO_PDDR_LCDCTLL_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_4	/;"	d
GPIO_PDDR_LCDCTLL_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_5	/;"	d
GPIO_PDDR_LCDCTLL_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_6	/;"	d
GPIO_PDDR_LCDCTLL_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDCTLL_7	/;"	d
GPIO_PDDR_LCDDATAH_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAH_0	/;"	d
GPIO_PDDR_LCDDATAH_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAH_1	/;"	d
GPIO_PDDR_LCDDATAL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_0	/;"	d
GPIO_PDDR_LCDDATAL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_1	/;"	d
GPIO_PDDR_LCDDATAL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_2	/;"	d
GPIO_PDDR_LCDDATAL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_3	/;"	d
GPIO_PDDR_LCDDATAL_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_4	/;"	d
GPIO_PDDR_LCDDATAL_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_5	/;"	d
GPIO_PDDR_LCDDATAL_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_6	/;"	d
GPIO_PDDR_LCDDATAL_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAL_7	/;"	d
GPIO_PDDR_LCDDATAM_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_0	/;"	d
GPIO_PDDR_LCDDATAM_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_1	/;"	d
GPIO_PDDR_LCDDATAM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_2	/;"	d
GPIO_PDDR_LCDDATAM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_3	/;"	d
GPIO_PDDR_LCDDATAM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_4	/;"	d
GPIO_PDDR_LCDDATAM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_5	/;"	d
GPIO_PDDR_LCDDATAM_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_6	/;"	d
GPIO_PDDR_LCDDATAM_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_LCDDATAM_7	/;"	d
GPIO_PDDR_PWM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_PWM_2	/;"	d
GPIO_PDDR_PWM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_PWM_3	/;"	d
GPIO_PDDR_PWM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_PWM_4	/;"	d
GPIO_PDDR_PWM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_PWM_5	/;"	d
GPIO_PDDR_QSPI	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_QSPI(/;"	d
GPIO_PDDR_QSPI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_QSPI_0	/;"	d
GPIO_PDDR_QSPI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_QSPI_1	/;"	d
GPIO_PDDR_QSPI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_QSPI_2	/;"	d
GPIO_PDDR_QSPI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_QSPI_3	/;"	d
GPIO_PDDR_QSPI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_QSPI_4	/;"	d
GPIO_PDDR_QSPI_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_QSPI_5	/;"	d
GPIO_PDDR_QSPI_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_QSPI_MASK	/;"	d
GPIO_PDDR_SDRAM	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_SDRAM(/;"	d
GPIO_PDDR_SDRAM_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_SDRAM_MASK	/;"	d
GPIO_PDDR_SSI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_SSI_0	/;"	d
GPIO_PDDR_SSI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_SSI_1	/;"	d
GPIO_PDDR_SSI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_SSI_2	/;"	d
GPIO_PDDR_SSI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_SSI_3	/;"	d
GPIO_PDDR_SSI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_SSI_4	/;"	d
GPIO_PDDR_TIMER_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_TIMER_0	/;"	d
GPIO_PDDR_TIMER_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_TIMER_1	/;"	d
GPIO_PDDR_TIMER_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_TIMER_2	/;"	d
GPIO_PDDR_TIMER_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_TIMER_3	/;"	d
GPIO_PDDR_UARTH	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_UARTH(/;"	d
GPIO_PDDR_UARTH_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PDDR_UARTH_MASK	/;"	d
GPIO_PDDR_UART_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_0	/;"	d
GPIO_PDDR_UART_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_1	/;"	d
GPIO_PDDR_UART_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_2	/;"	d
GPIO_PDDR_UART_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_3	/;"	d
GPIO_PDDR_UART_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_4	/;"	d
GPIO_PDDR_UART_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_5	/;"	d
GPIO_PDDR_UART_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_6	/;"	d
GPIO_PDDR_UART_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PDDR_UART_7	/;"	d
GPIO_PDR_BE	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_BE(/;"	d
GPIO_PDR_BE	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_BE	/;"	d
GPIO_PDR_BUSCTL	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_BUSCTL(/;"	d
GPIO_PDR_CS	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_CS(/;"	d
GPIO_PDR_CS10	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_CS10	/;"	d
GPIO_PDR_CS32	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_CS32	/;"	d
GPIO_PDR_DEBUG	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_DEBUG	/;"	d
GPIO_PDR_DSPI	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_DSPI	/;"	d
GPIO_PDR_FBCTL	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_FBCTL	/;"	d
GPIO_PDR_FEC0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_FEC0	/;"	d
GPIO_PDR_FECH	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_FECH(/;"	d
GPIO_PDR_FECI2C	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_FECI2C(/;"	d
GPIO_PDR_FECI2C	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_FECI2C	/;"	d
GPIO_PDR_FECL	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_FECL(/;"	d
GPIO_PDR_QSPI	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_QSPI(/;"	d
GPIO_PDR_SDHC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_SDHC	/;"	d
GPIO_PDR_SIMP0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_SIMP0	/;"	d
GPIO_PDR_SIMP1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_SIMP1	/;"	d
GPIO_PDR_SSI	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_SSI	/;"	d
GPIO_PDR_TIMER	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_TIMER(/;"	d
GPIO_PDR_TIMER	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_TIMER	/;"	d
GPIO_PDR_UART	arch/m68k/include/asm/m520x.h	/^#define GPIO_PDR_UART(/;"	d
GPIO_PDR_UART	arch/m68k/include/asm/m5301x.h	/^#define GPIO_PDR_UART	/;"	d
GPIO_PE0	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE0	/;"	d
GPIO_PE0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE0	/;"	d
GPIO_PE0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE0	/;"	d
GPIO_PE1	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE1	/;"	d
GPIO_PE1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE1	/;"	d
GPIO_PE1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE1	/;"	d
GPIO_PE10	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE10	/;"	d
GPIO_PE10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE10	/;"	d
GPIO_PE10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE10	/;"	d
GPIO_PE11	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE11	/;"	d
GPIO_PE11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE11	/;"	d
GPIO_PE11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE11	/;"	d
GPIO_PE12	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE12	/;"	d
GPIO_PE12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE12	/;"	d
GPIO_PE12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE12	/;"	d
GPIO_PE13	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE13	/;"	d
GPIO_PE13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE13	/;"	d
GPIO_PE13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE13	/;"	d
GPIO_PE14	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE14	/;"	d
GPIO_PE14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE14	/;"	d
GPIO_PE14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE14	/;"	d
GPIO_PE15	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE15	/;"	d
GPIO_PE15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE15	/;"	d
GPIO_PE15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE15	/;"	d
GPIO_PE2	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE2	/;"	d
GPIO_PE2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE2	/;"	d
GPIO_PE2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE2	/;"	d
GPIO_PE3	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE3	/;"	d
GPIO_PE3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE3	/;"	d
GPIO_PE3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE3	/;"	d
GPIO_PE4	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE4	/;"	d
GPIO_PE4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE4	/;"	d
GPIO_PE4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE4	/;"	d
GPIO_PE5	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE5	/;"	d
GPIO_PE5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE5	/;"	d
GPIO_PE5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE5	/;"	d
GPIO_PE6	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE6	/;"	d
GPIO_PE6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE6	/;"	d
GPIO_PE6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE6	/;"	d
GPIO_PE7	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE7	/;"	d
GPIO_PE7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE7	/;"	d
GPIO_PE7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE7	/;"	d
GPIO_PE8	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE8	/;"	d
GPIO_PE8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE8	/;"	d
GPIO_PE8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE8	/;"	d
GPIO_PE9	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PE9	/;"	d
GPIO_PE9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PE9	/;"	d
GPIO_PE9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PE9	/;"	d
GPIO_PER_BANK	arch/arm/mach-exynos/include/mach/gpio.h	/^#define GPIO_PER_BANK /;"	d
GPIO_PER_BANK	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define GPIO_PER_BANK /;"	d
GPIO_PER_BANK	arch/x86/include/asm/arch-broadwell/gpio.h	/^#define GPIO_PER_BANK	/;"	d
GPIO_PER_BANK	drivers/gpio/at91_gpio.c	/^#define GPIO_PER_BANK	/;"	d	file:
GPIO_PER_BANK	drivers/gpio/intel_ich6_gpio.c	/^#define GPIO_PER_BANK	/;"	d	file:
GPIO_PER_BANK	drivers/gpio/kona_gpio.c	/^#define GPIO_PER_BANK	/;"	d	file:
GPIO_PER_BANK	drivers/gpio/mxc_gpio.c	/^#define GPIO_PER_BANK	/;"	d	file:
GPIO_PER_BANK	drivers/gpio/omap_gpio.c	/^#define GPIO_PER_BANK	/;"	d	file:
GPIO_PF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PF /;"	d
GPIO_PF	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_PF	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF0	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF1	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF10	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF11	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF12	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF13	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF14	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF15	/;"	d
GPIO_PF16	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF16	/;"	d
GPIO_PF17	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF17	/;"	d
GPIO_PF18	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF18	/;"	d
GPIO_PF19	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF19	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF2	/;"	d
GPIO_PF20	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF20	/;"	d
GPIO_PF21	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF21	/;"	d
GPIO_PF22	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF22	/;"	d
GPIO_PF23	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF23	/;"	d
GPIO_PF24	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF24	/;"	d
GPIO_PF25	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF25	/;"	d
GPIO_PF26	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF26	/;"	d
GPIO_PF27	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF27	/;"	d
GPIO_PF28	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF28	/;"	d
GPIO_PF29	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF29	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF3	/;"	d
GPIO_PF30	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF30	/;"	d
GPIO_PF31	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF31	/;"	d
GPIO_PF32	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF32	/;"	d
GPIO_PF33	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF33	/;"	d
GPIO_PF34	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF34	/;"	d
GPIO_PF35	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF35	/;"	d
GPIO_PF36	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF36	/;"	d
GPIO_PF37	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF37	/;"	d
GPIO_PF38	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF38	/;"	d
GPIO_PF39	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF39	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF4	/;"	d
GPIO_PF40	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF40	/;"	d
GPIO_PF41	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF41	/;"	d
GPIO_PF42	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF42	/;"	d
GPIO_PF43	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF43	/;"	d
GPIO_PF44	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF44	/;"	d
GPIO_PF45	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF45	/;"	d
GPIO_PF46	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF46	/;"	d
GPIO_PF47	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF47	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF5	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF6	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF7	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF8	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PF9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PF9	/;"	d
GPIO_PG0	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG0	/;"	d
GPIO_PG0	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG0	/;"	d
GPIO_PG0	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG0	/;"	d
GPIO_PG0	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG0	/;"	d
GPIO_PG0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG0	/;"	d
GPIO_PG0	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG0	/;"	d
GPIO_PG1	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG1	/;"	d
GPIO_PG1	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG1	/;"	d
GPIO_PG1	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG1	/;"	d
GPIO_PG1	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG1	/;"	d
GPIO_PG1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG1	/;"	d
GPIO_PG1	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG1	/;"	d
GPIO_PG10	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG10	/;"	d
GPIO_PG10	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG10	/;"	d
GPIO_PG10	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG10	/;"	d
GPIO_PG10	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG10	/;"	d
GPIO_PG10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG10	/;"	d
GPIO_PG10	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG10	/;"	d
GPIO_PG11	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG11	/;"	d
GPIO_PG11	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG11	/;"	d
GPIO_PG11	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG11	/;"	d
GPIO_PG11	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG11	/;"	d
GPIO_PG11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG11	/;"	d
GPIO_PG11	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG11	/;"	d
GPIO_PG12	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG12	/;"	d
GPIO_PG12	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG12	/;"	d
GPIO_PG12	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG12	/;"	d
GPIO_PG12	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG12	/;"	d
GPIO_PG12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG12	/;"	d
GPIO_PG12	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG12	/;"	d
GPIO_PG13	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG13	/;"	d
GPIO_PG13	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG13	/;"	d
GPIO_PG13	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG13	/;"	d
GPIO_PG13	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG13	/;"	d
GPIO_PG13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG13	/;"	d
GPIO_PG13	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG13	/;"	d
GPIO_PG14	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG14	/;"	d
GPIO_PG14	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG14	/;"	d
GPIO_PG14	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG14	/;"	d
GPIO_PG14	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG14	/;"	d
GPIO_PG14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG14	/;"	d
GPIO_PG14	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG14	/;"	d
GPIO_PG15	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG15	/;"	d
GPIO_PG15	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG15	/;"	d
GPIO_PG15	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG15	/;"	d
GPIO_PG15	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG15	/;"	d
GPIO_PG15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG15	/;"	d
GPIO_PG15	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG15	/;"	d
GPIO_PG2	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG2	/;"	d
GPIO_PG2	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG2	/;"	d
GPIO_PG2	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG2	/;"	d
GPIO_PG2	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG2	/;"	d
GPIO_PG2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG2	/;"	d
GPIO_PG2	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG2	/;"	d
GPIO_PG3	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG3	/;"	d
GPIO_PG3	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG3	/;"	d
GPIO_PG3	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG3	/;"	d
GPIO_PG3	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG3	/;"	d
GPIO_PG3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG3	/;"	d
GPIO_PG3	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG3	/;"	d
GPIO_PG4	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG4	/;"	d
GPIO_PG4	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG4	/;"	d
GPIO_PG4	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG4	/;"	d
GPIO_PG4	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG4	/;"	d
GPIO_PG4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG4	/;"	d
GPIO_PG4	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG4	/;"	d
GPIO_PG5	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG5	/;"	d
GPIO_PG5	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG5	/;"	d
GPIO_PG5	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG5	/;"	d
GPIO_PG5	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG5	/;"	d
GPIO_PG5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG5	/;"	d
GPIO_PG5	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG5	/;"	d
GPIO_PG6	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG6	/;"	d
GPIO_PG6	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG6	/;"	d
GPIO_PG6	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG6	/;"	d
GPIO_PG6	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG6	/;"	d
GPIO_PG6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG6	/;"	d
GPIO_PG6	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG6	/;"	d
GPIO_PG7	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG7	/;"	d
GPIO_PG7	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG7	/;"	d
GPIO_PG7	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG7	/;"	d
GPIO_PG7	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG7	/;"	d
GPIO_PG7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG7	/;"	d
GPIO_PG7	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG7	/;"	d
GPIO_PG8	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG8	/;"	d
GPIO_PG8	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG8	/;"	d
GPIO_PG8	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG8	/;"	d
GPIO_PG8	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG8	/;"	d
GPIO_PG8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG8	/;"	d
GPIO_PG8	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG8	/;"	d
GPIO_PG9	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PG9	/;"	d
GPIO_PG9	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PG9	/;"	d
GPIO_PG9	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PG9	/;"	d
GPIO_PG9	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PG9	/;"	d
GPIO_PG9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PG9	/;"	d
GPIO_PG9	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define GPIO_PG9	/;"	d
GPIO_PH0	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PH0	/;"	d
GPIO_PH0	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH0	/;"	d
GPIO_PH0	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH0	/;"	d
GPIO_PH0	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH0	/;"	d
GPIO_PH0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH0	/;"	d
GPIO_PH1	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PH1	/;"	d
GPIO_PH1	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH1	/;"	d
GPIO_PH1	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH1	/;"	d
GPIO_PH1	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH1	/;"	d
GPIO_PH1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH1	/;"	d
GPIO_PH10	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH10	/;"	d
GPIO_PH10	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH10	/;"	d
GPIO_PH10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH10	/;"	d
GPIO_PH11	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH11	/;"	d
GPIO_PH11	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH11	/;"	d
GPIO_PH11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH11	/;"	d
GPIO_PH12	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH12	/;"	d
GPIO_PH12	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH12	/;"	d
GPIO_PH12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH12	/;"	d
GPIO_PH13	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH13	/;"	d
GPIO_PH13	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH13	/;"	d
GPIO_PH13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH13	/;"	d
GPIO_PH14	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH14	/;"	d
GPIO_PH14	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH14	/;"	d
GPIO_PH14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH14	/;"	d
GPIO_PH15	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH15	/;"	d
GPIO_PH15	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH15	/;"	d
GPIO_PH15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH15	/;"	d
GPIO_PH2	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define GPIO_PH2	/;"	d
GPIO_PH2	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH2	/;"	d
GPIO_PH2	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH2	/;"	d
GPIO_PH2	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH2	/;"	d
GPIO_PH2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH2	/;"	d
GPIO_PH3	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH3	/;"	d
GPIO_PH3	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH3	/;"	d
GPIO_PH3	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH3	/;"	d
GPIO_PH3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH3	/;"	d
GPIO_PH4	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH4	/;"	d
GPIO_PH4	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH4	/;"	d
GPIO_PH4	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH4	/;"	d
GPIO_PH4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH4	/;"	d
GPIO_PH5	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH5	/;"	d
GPIO_PH5	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH5	/;"	d
GPIO_PH5	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH5	/;"	d
GPIO_PH5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH5	/;"	d
GPIO_PH6	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH6	/;"	d
GPIO_PH6	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH6	/;"	d
GPIO_PH6	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH6	/;"	d
GPIO_PH6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH6	/;"	d
GPIO_PH7	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH7	/;"	d
GPIO_PH7	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH7	/;"	d
GPIO_PH7	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH7	/;"	d
GPIO_PH7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH7	/;"	d
GPIO_PH8	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define GPIO_PH8	/;"	d
GPIO_PH8	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH8	/;"	d
GPIO_PH8	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH8	/;"	d
GPIO_PH8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH8	/;"	d
GPIO_PH9	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define GPIO_PH9	/;"	d
GPIO_PH9	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define GPIO_PH9	/;"	d
GPIO_PH9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PH9	/;"	d
GPIO_PHY1_RST	board/compulab/cm_t43/cm_t43.c	/^#define GPIO_PHY1_RST	/;"	d	file:
GPIO_PHY2_RST	board/compulab/cm_t43/cm_t43.c	/^#define GPIO_PHY2_RST	/;"	d	file:
GPIO_PHY_RESET	board/ti/am335x/board.c	/^#define GPIO_PHY_RESET	/;"	d	file:
GPIO_PHY_RST	board/compulab/cm_t335/cm_t335.c	/^#define GPIO_PHY_RST	/;"	d	file:
GPIO_PI0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI0	/;"	d
GPIO_PI1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI1	/;"	d
GPIO_PI10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI10	/;"	d
GPIO_PI11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI11	/;"	d
GPIO_PI12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI12	/;"	d
GPIO_PI13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI13	/;"	d
GPIO_PI14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI14	/;"	d
GPIO_PI15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI15	/;"	d
GPIO_PI2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI2	/;"	d
GPIO_PI3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI3	/;"	d
GPIO_PI4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI4	/;"	d
GPIO_PI5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI5	/;"	d
GPIO_PI6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI6	/;"	d
GPIO_PI7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI7	/;"	d
GPIO_PI8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI8	/;"	d
GPIO_PI9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PI9	/;"	d
GPIO_PIN	board/v38b/ethaddr.c	/^#define GPIO_PIN	/;"	d	file:
GPIO_PIN	include/configs/cm_t335.h	/^#define GPIO_PIN(/;"	d
GPIO_PINS_PER_BLOCK	drivers/gpio/db8500_gpio.c	/^#define GPIO_PINS_PER_BLOCK	/;"	d	file:
GPIO_PIN_1	board/bct-brettl2/gpio_cfi_flash.c	/^#define GPIO_PIN_1 /;"	d	file:
GPIO_PIN_1	board/cm-bf527/gpio_cfi_flash.c	/^#define GPIO_PIN_1 /;"	d	file:
GPIO_PIN_1	board/cm-bf537e/gpio_cfi_flash.c	/^#define GPIO_PIN_1 /;"	d	file:
GPIO_PIN_1	board/cm-bf537u/gpio_cfi_flash.c	/^#define GPIO_PIN_1 /;"	d	file:
GPIO_PIN_1	board/tcm-bf537/gpio_cfi_flash.c	/^#define GPIO_PIN_1 /;"	d	file:
GPIO_PIN_2	board/bct-brettl2/gpio_cfi_flash.c	/^#define GPIO_PIN_2 /;"	d	file:
GPIO_PIN_2	board/cm-bf527/gpio_cfi_flash.c	/^#define GPIO_PIN_2 /;"	d	file:
GPIO_PIN_2	board/tcm-bf537/gpio_cfi_flash.c	/^#define GPIO_PIN_2 /;"	d	file:
GPIO_PIN_3	board/bct-brettl2/gpio_cfi_flash.c	/^#define GPIO_PIN_3 /;"	d	file:
GPIO_PIN_MASK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PIN_MASK /;"	d
GPIO_PIN_MASK	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PIN_MASK	/;"	d
GPIO_PIN_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PIN_MASK	/;"	d
GPIO_PIN_PA	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIN_PA(/;"	d
GPIO_PIN_PA	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIN_PA(/;"	d
GPIO_PIN_PB	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIN_PB(/;"	d
GPIO_PIN_PB	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIN_PB(/;"	d
GPIO_PIN_PC	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIN_PC(/;"	d
GPIO_PIN_PC	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIN_PC(/;"	d
GPIO_PIN_PD	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIN_PD(/;"	d
GPIO_PIN_PD	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIN_PD(/;"	d
GPIO_PIN_PE	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIN_PE(/;"	d
GPIO_PIN_PE	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIN_PE(/;"	d
GPIO_PIN_WITHIN_BLOCK	drivers/gpio/db8500_gpio.c	/^#define GPIO_PIN_WITHIN_BLOCK(/;"	d	file:
GPIO_PIOA_BASE	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIOA_BASE /;"	d
GPIO_PIOA_BASE	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIOA_BASE	/;"	d
GPIO_PIOB_BASE	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIOB_BASE /;"	d
GPIO_PIOB_BASE	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIOB_BASE	/;"	d
GPIO_PIOC_BASE	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIOC_BASE /;"	d
GPIO_PIOC_BASE	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIOC_BASE	/;"	d
GPIO_PIOD_BASE	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIOD_BASE /;"	d
GPIO_PIOD_BASE	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIOD_BASE	/;"	d
GPIO_PIOE_BASE	arch/arm/mach-at91/include/mach/gpio.h	/^#define GPIO_PIOE_BASE /;"	d
GPIO_PIOE_BASE	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define GPIO_PIOE_BASE	/;"	d
GPIO_PJ0	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ0	/;"	d
GPIO_PJ1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ1	/;"	d
GPIO_PJ10	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ10	/;"	d
GPIO_PJ11	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ11	/;"	d
GPIO_PJ12	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ12	/;"	d
GPIO_PJ13	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ13	/;"	d
GPIO_PJ14	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ14	/;"	d
GPIO_PJ15	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ15	/;"	d
GPIO_PJ2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ2	/;"	d
GPIO_PJ3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ3	/;"	d
GPIO_PJ4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ4	/;"	d
GPIO_PJ5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ5	/;"	d
GPIO_PJ6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ6	/;"	d
GPIO_PJ7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ7	/;"	d
GPIO_PJ8	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ8	/;"	d
GPIO_PJ9	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define GPIO_PJ9	/;"	d
GPIO_PODR_ADDR	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_ADDR(/;"	d
GPIO_PODR_ADDR_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_ADDR_MASK	/;"	d
GPIO_PODR_BE_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BE_0	/;"	d
GPIO_PODR_BE_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BE_1	/;"	d
GPIO_PODR_BE_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BE_2	/;"	d
GPIO_PODR_BE_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BE_3	/;"	d
GPIO_PODR_BS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_BS(/;"	d
GPIO_PODR_BS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_BS_MASK	/;"	d
GPIO_PODR_BUSCTL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BUSCTL_0	/;"	d
GPIO_PODR_BUSCTL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BUSCTL_1	/;"	d
GPIO_PODR_BUSCTL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BUSCTL_2	/;"	d
GPIO_PODR_BUSCTL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_BUSCTL_3	/;"	d
GPIO_PODR_CS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_CS(/;"	d
GPIO_PODR_CS_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_CS_1	/;"	d
GPIO_PODR_CS_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_CS_2	/;"	d
GPIO_PODR_CS_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_CS_3	/;"	d
GPIO_PODR_CS_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_CS_4	/;"	d
GPIO_PODR_CS_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_CS_5	/;"	d
GPIO_PODR_CS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_CS_MASK	/;"	d
GPIO_PODR_ETPU	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_ETPU(/;"	d
GPIO_PODR_ETPU_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_ETPU_MASK	/;"	d
GPIO_PODR_FECH_L0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L0	/;"	d
GPIO_PODR_FECH_L1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L1	/;"	d
GPIO_PODR_FECH_L2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L2	/;"	d
GPIO_PODR_FECH_L3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L3	/;"	d
GPIO_PODR_FECH_L4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L4	/;"	d
GPIO_PODR_FECH_L5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L5	/;"	d
GPIO_PODR_FECH_L6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L6	/;"	d
GPIO_PODR_FECH_L7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECH_L7	/;"	d
GPIO_PODR_FECI2C	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_FECI2C(/;"	d
GPIO_PODR_FECI2C_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECI2C_0	/;"	d
GPIO_PODR_FECI2C_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECI2C_1	/;"	d
GPIO_PODR_FECI2C_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECI2C_2	/;"	d
GPIO_PODR_FECI2C_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_FECI2C_3	/;"	d
GPIO_PODR_FECI2C_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_FECI2C_MASK	/;"	d
GPIO_PODR_G4_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PODR_G4_MASK	/;"	d
GPIO_PODR_G4_VAL	arch/m68k/include/asm/m5441x.h	/^#define GPIO_PODR_G4_VAL	/;"	d
GPIO_PODR_LCDCTLH_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLH_0	/;"	d
GPIO_PODR_LCDCTLL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_0	/;"	d
GPIO_PODR_LCDCTLL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_1	/;"	d
GPIO_PODR_LCDCTLL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_2	/;"	d
GPIO_PODR_LCDCTLL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_3	/;"	d
GPIO_PODR_LCDCTLL_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_4	/;"	d
GPIO_PODR_LCDCTLL_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_5	/;"	d
GPIO_PODR_LCDCTLL_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_6	/;"	d
GPIO_PODR_LCDCTLL_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDCTLL_7	/;"	d
GPIO_PODR_LCDDATAH_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAH_0	/;"	d
GPIO_PODR_LCDDATAH_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAH_1	/;"	d
GPIO_PODR_LCDDATAL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_0	/;"	d
GPIO_PODR_LCDDATAL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_1	/;"	d
GPIO_PODR_LCDDATAL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_2	/;"	d
GPIO_PODR_LCDDATAL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_3	/;"	d
GPIO_PODR_LCDDATAL_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_4	/;"	d
GPIO_PODR_LCDDATAL_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_5	/;"	d
GPIO_PODR_LCDDATAL_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_6	/;"	d
GPIO_PODR_LCDDATAL_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAL_7	/;"	d
GPIO_PODR_LCDDATAM_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_0	/;"	d
GPIO_PODR_LCDDATAM_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_1	/;"	d
GPIO_PODR_LCDDATAM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_2	/;"	d
GPIO_PODR_LCDDATAM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_3	/;"	d
GPIO_PODR_LCDDATAM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_4	/;"	d
GPIO_PODR_LCDDATAM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_5	/;"	d
GPIO_PODR_LCDDATAM_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_6	/;"	d
GPIO_PODR_LCDDATAM_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_LCDDATAM_7	/;"	d
GPIO_PODR_PWM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_PWM_2	/;"	d
GPIO_PODR_PWM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_PWM_3	/;"	d
GPIO_PODR_PWM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_PWM_4	/;"	d
GPIO_PODR_PWM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_PWM_5	/;"	d
GPIO_PODR_QSPI	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_QSPI(/;"	d
GPIO_PODR_QSPI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_QSPI_0	/;"	d
GPIO_PODR_QSPI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_QSPI_1	/;"	d
GPIO_PODR_QSPI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_QSPI_2	/;"	d
GPIO_PODR_QSPI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_QSPI_3	/;"	d
GPIO_PODR_QSPI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_QSPI_4	/;"	d
GPIO_PODR_QSPI_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_QSPI_5	/;"	d
GPIO_PODR_QSPI_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_QSPI_MASK	/;"	d
GPIO_PODR_SDRAM	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_SDRAM(/;"	d
GPIO_PODR_SDRAM_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_SDRAM_MASK	/;"	d
GPIO_PODR_SSI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_SSI_0	/;"	d
GPIO_PODR_SSI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_SSI_1	/;"	d
GPIO_PODR_SSI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_SSI_2	/;"	d
GPIO_PODR_SSI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_SSI_3	/;"	d
GPIO_PODR_SSI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_SSI_4	/;"	d
GPIO_PODR_TIMER_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_TIMER_0	/;"	d
GPIO_PODR_TIMER_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_TIMER_1	/;"	d
GPIO_PODR_TIMER_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_TIMER_2	/;"	d
GPIO_PODR_TIMER_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_TIMER_3	/;"	d
GPIO_PODR_UARTH	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_UARTH(/;"	d
GPIO_PODR_UARTH_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PODR_UARTH_MASK	/;"	d
GPIO_PODR_UART_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_0	/;"	d
GPIO_PODR_UART_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_1	/;"	d
GPIO_PODR_UART_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_2	/;"	d
GPIO_PODR_UART_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_3	/;"	d
GPIO_PODR_UART_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_4	/;"	d
GPIO_PODR_UART_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_5	/;"	d
GPIO_PODR_UART_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_6	/;"	d
GPIO_PODR_UART_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PODR_UART_7	/;"	d
GPIO_POL_INVERT	include/smsc_sio1007.h	/^#define GPIO_POL_INVERT	/;"	d
GPIO_POL_NO_INVERT	include/smsc_sio1007.h	/^#define GPIO_POL_NO_INVERT	/;"	d
GPIO_PORT	arch/arm/include/asm/arch-tegra/gpio.h	/^#define GPIO_PORT(/;"	d
GPIO_PORT0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT0	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT1	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT10	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT10	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT100	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT100	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT101	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT101	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT102	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT102	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT103	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT103	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT104	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT104	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT105	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT105	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT106	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT106	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT107	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT107	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT108	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT108	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT109	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT109	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT11	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT11	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT110	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT110	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT111	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT111	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT112	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT112	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT113	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT113	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT114	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT114	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT115	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT115	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT116	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT116	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT117	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT117	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT118	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT118	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT119	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT12	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT12	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT120	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT121	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT122	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT123	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT124	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT125	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT126	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT127	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT128	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT128	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT129	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT129	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT128, GPIO_PORT129,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT13	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT13	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT130	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT130	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT131	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT131	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT132	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT132	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT133	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT133	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT134	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT134	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT135	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT135	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT136	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT136	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT137	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT137	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT138	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT138	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT139	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT139	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT14	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT14	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT140	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT140	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT141	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT141	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT142	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT142	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT143	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT143	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT144	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT144	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT145	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT145	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT146	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT146	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT147	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT147	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT148	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT148	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT149	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT149	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT15	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT15	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT150	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT150	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT151	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT151	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT152	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT152	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT153	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT153	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT154	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT154	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT155	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT155	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT156	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT156	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT157	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT157	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT158	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT158	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT159	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT159	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT16	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT16	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT160	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT160	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT161	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT161	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT162	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT162	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT163	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT163	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT164	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT164	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT165	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT166	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT167	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT168	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT169	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT17	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT17	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT170	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT171	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT172	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT173	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT174	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT175	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT176	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT177	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT178	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT179	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT18	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT18	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT180	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT181	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT182	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT183	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT184	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT185	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT186	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT187	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT188	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT189	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT19	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT19	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT190	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT191	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT192	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT192	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT193	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT193	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT194	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT194	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT195	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT195	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT196	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT196	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT197	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT197	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT198	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT198	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT199	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT199	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT2	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT20	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT20	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT200	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT200	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT201	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT201	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT202	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT202	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT203	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT203	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT204	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT204	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT205	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT205	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT206	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT206	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT207	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT207	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT208	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT208	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT209	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT209	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT21	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT21	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT210	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT210, GPIO_PORT211,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT210	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT211	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT210, GPIO_PORT211,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT211	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT212	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT213	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT214	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT215	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT216	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT217	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT218	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT219	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT22	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT22	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT220	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT221	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT222	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT223	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT224	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT225	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT226	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT227	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT228	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT229	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT23	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT23	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT230	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT231	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT232	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT233	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT234	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT235	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT236	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT237	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT238	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT239	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT24	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT24	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT240	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT241	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT242	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT243	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT244	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT245	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT246	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT247	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT248	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT249	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT25	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT25	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT250	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT251	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT252	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT253	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT254	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT255	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT256	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT257	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT258	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT259	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT26	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT26	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT260	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT261	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT262	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT263	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT264	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT265	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT266	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT267	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT268	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT269	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT27	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT27	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT270	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT271	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT272	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT273	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT274	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT275	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT276	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT277	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT278	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT279	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT28	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT28	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT280	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT281	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT282	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT288	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT288, GPIO_PORT289,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT289	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT288, GPIO_PORT289,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT29	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT29	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT290	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT291	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT292	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT293	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT294	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT295	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT296	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT297	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT298	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT299	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT3	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT3	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT30	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT30	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT300	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT301	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT302	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT303	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT304	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT305	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT306	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT307	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT308	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT309	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT31	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT31	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT32	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT32	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT33	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT33	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT34	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT34	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT35	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT35	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT36	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT36	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT37	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT37	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT38	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT38	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT39	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT39	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT4	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT4	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT40	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT40	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT41	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT41	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT42	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT42	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT43	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT43	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT44	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT44	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT45	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT45	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT46	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT46	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT47	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT47	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT48	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT48	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT49	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT49	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT5	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT5	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT50	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT50	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT51	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT51	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT52	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT52	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT53	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT53	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT54	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT54	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT55	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT55	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT56	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT56	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT57	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT57	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT58	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT58	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT59	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT59	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT6	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT6	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT60	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT60	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT61	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT61	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT62	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT62	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT63	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT63	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT64	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT64	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT65	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT65	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT66	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT66	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT67	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT67	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT68	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT68	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT69	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT69	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT7	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT7	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT70	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT70	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT71	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT71	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT72	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT72	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT73	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT73	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT74	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT74	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT75	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT75	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT76	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT76	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT77	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT77	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT78	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT78	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT79	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT79	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT8	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT8	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT80	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT80	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT81	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT81	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT82	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT82	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT83	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT83	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT84	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT84	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT85	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT85	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT86	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT86	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT87	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT87	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT88	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT88	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT89	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT89	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT9	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT9	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT90	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT90	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT91	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT91	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT92	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT92	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT93	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT93	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT94	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT94	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT95	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT95	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT96	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT96	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT97	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT97	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT98	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT98	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anon8638ecc30103
GPIO_PORT99	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anonb56c5aca0103
GPIO_PORT99	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,$/;"	e	enum:__anon8638ecc30103
GPIO_PORTA	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORTA /;"	d
GPIO_PORTA	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORTA	/;"	d
GPIO_PORTA	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORTA	/;"	d
GPIO_PORTA_DEBOUNCE	drivers/gpio/dwapb_gpio.c	/^#define GPIO_PORTA_DEBOUNCE	/;"	d	file:
GPIO_PORTA_EOI	drivers/gpio/dwapb_gpio.c	/^#define GPIO_PORTA_EOI	/;"	d	file:
GPIO_PORTB	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORTB /;"	d
GPIO_PORTB	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORTB	/;"	d
GPIO_PORTB	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORTB	/;"	d
GPIO_PORTC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORTC /;"	d
GPIO_PORTC	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORTC	/;"	d
GPIO_PORTC	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORTC	/;"	d
GPIO_PORTD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORTD /;"	d
GPIO_PORTD	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORTD	/;"	d
GPIO_PORTD	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORTD	/;"	d
GPIO_PORTE	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORTE	/;"	d
GPIO_PORTE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORTE	/;"	d
GPIO_PORTF	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORTF	/;"	d
GPIO_PORTF	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORTF	/;"	d
GPIO_PORT_ALL	include/sh_pfc.h	/^#define GPIO_PORT_ALL(/;"	d
GPIO_PORT_MASK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORT_MASK /;"	d
GPIO_PORT_MASK	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORT_MASK	/;"	d
GPIO_PORT_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORT_MASK	/;"	d
GPIO_PORT_MAX	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORT_MAX /;"	d
GPIO_PORT_NUM	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define GPIO_PORT_NUM	/;"	d
GPIO_PORT_SHIFT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PORT_SHIFT /;"	d
GPIO_PORT_SHIFT	arch/arm/include/asm/arch-mx27/gpio.h	/^#define GPIO_PORT_SHIFT	/;"	d
GPIO_PORT_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define GPIO_PORT_SHIFT	/;"	d
GPIO_POWER_AUTO_SWITCH	board/buffalo/lsxl/lsxl.h	/^#define GPIO_POWER_AUTO_SWITCH	/;"	d
GPIO_POWER_LED	board/buffalo/lsxl/lsxl.h	/^#define GPIO_POWER_LED	/;"	d
GPIO_POWER_SWITCH	board/buffalo/lsxl/lsxl.h	/^#define GPIO_POWER_SWITCH	/;"	d
GPIO_PPDSDR_ADDR	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_ADDR(/;"	d
GPIO_PPDSDR_ADDR_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_ADDR_MASK	/;"	d
GPIO_PPDSDR_BE_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BE_0	/;"	d
GPIO_PPDSDR_BE_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BE_1	/;"	d
GPIO_PPDSDR_BE_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BE_2	/;"	d
GPIO_PPDSDR_BE_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BE_3	/;"	d
GPIO_PPDSDR_BS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_BS(/;"	d
GPIO_PPDSDR_BS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_BS_MASK	/;"	d
GPIO_PPDSDR_BUSCTL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BUSCTL_0	/;"	d
GPIO_PPDSDR_BUSCTL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BUSCTL_1	/;"	d
GPIO_PPDSDR_BUSCTL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BUSCTL_2	/;"	d
GPIO_PPDSDR_BUSCTL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_BUSCTL_3	/;"	d
GPIO_PPDSDR_CS	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_CS(/;"	d
GPIO_PPDSDR_CS_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_CS_1	/;"	d
GPIO_PPDSDR_CS_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_CS_2	/;"	d
GPIO_PPDSDR_CS_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_CS_3	/;"	d
GPIO_PPDSDR_CS_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_CS_4	/;"	d
GPIO_PPDSDR_CS_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_CS_5	/;"	d
GPIO_PPDSDR_CS_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_CS_MASK	/;"	d
GPIO_PPDSDR_ETPU	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_ETPU(/;"	d
GPIO_PPDSDR_ETPU_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_ETPU_MASK	/;"	d
GPIO_PPDSDR_FECH_L0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L0	/;"	d
GPIO_PPDSDR_FECH_L1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L1	/;"	d
GPIO_PPDSDR_FECH_L2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L2	/;"	d
GPIO_PPDSDR_FECH_L3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L3	/;"	d
GPIO_PPDSDR_FECH_L4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L4	/;"	d
GPIO_PPDSDR_FECH_L5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L5	/;"	d
GPIO_PPDSDR_FECH_L6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L6	/;"	d
GPIO_PPDSDR_FECH_L7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECH_L7	/;"	d
GPIO_PPDSDR_FECI2C	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_FECI2C(/;"	d
GPIO_PPDSDR_FECI2C_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECI2C_0	/;"	d
GPIO_PPDSDR_FECI2C_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECI2C_1	/;"	d
GPIO_PPDSDR_FECI2C_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECI2C_2	/;"	d
GPIO_PPDSDR_FECI2C_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_FECI2C_3	/;"	d
GPIO_PPDSDR_FECI2C_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_FECI2C_MASK	/;"	d
GPIO_PPDSDR_LCDCTLH_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLH_0	/;"	d
GPIO_PPDSDR_LCDCTLL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_0	/;"	d
GPIO_PPDSDR_LCDCTLL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_1	/;"	d
GPIO_PPDSDR_LCDCTLL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_2	/;"	d
GPIO_PPDSDR_LCDCTLL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_3	/;"	d
GPIO_PPDSDR_LCDCTLL_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_4	/;"	d
GPIO_PPDSDR_LCDCTLL_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_5	/;"	d
GPIO_PPDSDR_LCDCTLL_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_6	/;"	d
GPIO_PPDSDR_LCDCTLL_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDCTLL_7	/;"	d
GPIO_PPDSDR_LCDDATAH_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAH_0	/;"	d
GPIO_PPDSDR_LCDDATAH_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAH_1	/;"	d
GPIO_PPDSDR_LCDDATAL_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_0	/;"	d
GPIO_PPDSDR_LCDDATAL_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_1	/;"	d
GPIO_PPDSDR_LCDDATAL_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_2	/;"	d
GPIO_PPDSDR_LCDDATAL_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_3	/;"	d
GPIO_PPDSDR_LCDDATAL_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_4	/;"	d
GPIO_PPDSDR_LCDDATAL_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_5	/;"	d
GPIO_PPDSDR_LCDDATAL_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_6	/;"	d
GPIO_PPDSDR_LCDDATAL_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAL_7	/;"	d
GPIO_PPDSDR_LCDDATAM_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_0	/;"	d
GPIO_PPDSDR_LCDDATAM_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_1	/;"	d
GPIO_PPDSDR_LCDDATAM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_2	/;"	d
GPIO_PPDSDR_LCDDATAM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_3	/;"	d
GPIO_PPDSDR_LCDDATAM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_4	/;"	d
GPIO_PPDSDR_LCDDATAM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_5	/;"	d
GPIO_PPDSDR_LCDDATAM_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_6	/;"	d
GPIO_PPDSDR_LCDDATAM_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_LCDDATAM_7	/;"	d
GPIO_PPDSDR_PWM_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_PWM_2	/;"	d
GPIO_PPDSDR_PWM_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_PWM_3	/;"	d
GPIO_PPDSDR_PWM_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_PWM_4	/;"	d
GPIO_PPDSDR_PWM_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_PWM_5	/;"	d
GPIO_PPDSDR_QSPI	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_QSPI(/;"	d
GPIO_PPDSDR_QSPI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_QSPI_0	/;"	d
GPIO_PPDSDR_QSPI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_QSPI_1	/;"	d
GPIO_PPDSDR_QSPI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_QSPI_2	/;"	d
GPIO_PPDSDR_QSPI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_QSPI_3	/;"	d
GPIO_PPDSDR_QSPI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_QSPI_4	/;"	d
GPIO_PPDSDR_QSPI_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_QSPI_5	/;"	d
GPIO_PPDSDR_QSPI_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_QSPI_MASK	/;"	d
GPIO_PPDSDR_SDRAM	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_SDRAM(/;"	d
GPIO_PPDSDR_SDRAM_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_SDRAM_MASK	/;"	d
GPIO_PPDSDR_SSI_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_SSI_0	/;"	d
GPIO_PPDSDR_SSI_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_SSI_1	/;"	d
GPIO_PPDSDR_SSI_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_SSI_2	/;"	d
GPIO_PPDSDR_SSI_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_SSI_3	/;"	d
GPIO_PPDSDR_SSI_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_SSI_4	/;"	d
GPIO_PPDSDR_TIMER_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_TIMER_0	/;"	d
GPIO_PPDSDR_TIMER_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_TIMER_1	/;"	d
GPIO_PPDSDR_TIMER_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_TIMER_2	/;"	d
GPIO_PPDSDR_TIMER_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_TIMER_3	/;"	d
GPIO_PPDSDR_UARTH	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_UARTH(/;"	d
GPIO_PPDSDR_UARTH_MASK	arch/m68k/include/asm/m5235.h	/^#define GPIO_PPDSDR_UARTH_MASK	/;"	d
GPIO_PPDSDR_UART_0	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_0	/;"	d
GPIO_PPDSDR_UART_1	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_1	/;"	d
GPIO_PPDSDR_UART_2	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_2	/;"	d
GPIO_PPDSDR_UART_3	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_3	/;"	d
GPIO_PPDSDR_UART_4	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_4	/;"	d
GPIO_PPDSDR_UART_5	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_5	/;"	d
GPIO_PPDSDR_UART_6	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_6	/;"	d
GPIO_PPDSDR_UART_7	arch/m68k/include/asm/m5329.h	/^#define GPIO_PPDSDR_UART_7	/;"	d
GPIO_PR1_MII_CTRL	board/ti/am335x/board.c	/^#define GPIO_PR1_MII_CTRL	/;"	d	file:
GPIO_PSC1_4	include/mpc5xxx.h	/^#define GPIO_PSC1_4	/;"	d
GPIO_PSC2_4	board/phytec/pcm030/pcm030.c	/^#define GPIO_PSC2_4	/;"	d	file:
GPIO_PSC2_4	include/mpc5xxx.h	/^#define GPIO_PSC2_4	/;"	d
GPIO_PSC3_9	include/mpc5xxx.h	/^#define GPIO_PSC3_9	/;"	d
GPIO_PSC6_0	include/mpc5xxx.h	/^#define GPIO_PSC6_0	/;"	d
GPIO_PSR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define GPIO_PSR	/;"	d
GPIO_PUEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPIO_PUEN /;"	d
GPIO_PUEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define GPIO_PUEN	/;"	d
GPIO_PULL_INDEX	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_PULL_INDEX(/;"	d
GPIO_PULL_INDEX	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_PULL_INDEX(/;"	d
GPIO_PULL_OFFSET	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define GPIO_PULL_OFFSET(/;"	d
GPIO_PULL_OFFSET	arch/arm/include/asm/arch/gpio.h	/^#define GPIO_PULL_OFFSET(/;"	d
GPIO_PWD_STATUS	drivers/gpio/kona_gpio.c	/^#define GPIO_PWD_STATUS(/;"	d	file:
GPIO_PWM_A	board/toradex/colibri_imx7/colibri_imx7.c	/^#define GPIO_PWM_A /;"	d	file:
GPIO_RCLK	include/SA-1100.h	/^#define GPIO_RCLK	/;"	d
GPIO_REGULATOR_MAX_STATES	drivers/power/regulator/gpio-regulator.c	/^#define GPIO_REGULATOR_MAX_STATES	/;"	d	file:
GPIO_RISING_EDGE	arch/arm/include/asm/arch-pxa/hardware.h	/^#define GPIO_RISING_EDGE	/;"	d
GPIO_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPIO_ROUT	/;"	d
GPIO_S0_DED_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ(/;"	d
GPIO_S0_DED_IRQ_0	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_0	/;"	d
GPIO_S0_DED_IRQ_1	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_1	/;"	d
GPIO_S0_DED_IRQ_10	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_10	/;"	d
GPIO_S0_DED_IRQ_11	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_11	/;"	d
GPIO_S0_DED_IRQ_12	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_12	/;"	d
GPIO_S0_DED_IRQ_13	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_13	/;"	d
GPIO_S0_DED_IRQ_14	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_14	/;"	d
GPIO_S0_DED_IRQ_15	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_15	/;"	d
GPIO_S0_DED_IRQ_2	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_2	/;"	d
GPIO_S0_DED_IRQ_3	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_3	/;"	d
GPIO_S0_DED_IRQ_4	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_4	/;"	d
GPIO_S0_DED_IRQ_5	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_5	/;"	d
GPIO_S0_DED_IRQ_6	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_6	/;"	d
GPIO_S0_DED_IRQ_7	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_7	/;"	d
GPIO_S0_DED_IRQ_8	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_8	/;"	d
GPIO_S0_DED_IRQ_9	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S0_DED_IRQ_9	/;"	d
GPIO_S5_DED_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ(/;"	d
GPIO_S5_DED_IRQ_0	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_0	/;"	d
GPIO_S5_DED_IRQ_1	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_1	/;"	d
GPIO_S5_DED_IRQ_10	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_10	/;"	d
GPIO_S5_DED_IRQ_11	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_11	/;"	d
GPIO_S5_DED_IRQ_12	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_12	/;"	d
GPIO_S5_DED_IRQ_13	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_13	/;"	d
GPIO_S5_DED_IRQ_14	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_14	/;"	d
GPIO_S5_DED_IRQ_15	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_15	/;"	d
GPIO_S5_DED_IRQ_2	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_2	/;"	d
GPIO_S5_DED_IRQ_3	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_3	/;"	d
GPIO_S5_DED_IRQ_4	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_4	/;"	d
GPIO_S5_DED_IRQ_5	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_5	/;"	d
GPIO_S5_DED_IRQ_6	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_6	/;"	d
GPIO_S5_DED_IRQ_7	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_7	/;"	d
GPIO_S5_DED_IRQ_8	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_8	/;"	d
GPIO_S5_DED_IRQ_9	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_S5_DED_IRQ_9	/;"	d
GPIO_SCIFA1_RXD	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define GPIO_SCIFA1_RXD /;"	d	file:
GPIO_SCIFA1_TXD	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define GPIO_SCIFA1_TXD /;"	d	file:
GPIO_SC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_SC_IRQ	/;"	d
GPIO_SDHC_CD	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_SDHC_CD	/;"	d
GPIO_SDHC_WP	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_SDHC_WP	/;"	d
GPIO_SDLC_AAF	include/SA-1100.h	/^#define GPIO_SDLC_AAF	/;"	d
GPIO_SDLC_SCLK	include/SA-1100.h	/^#define GPIO_SDLC_SCLK	/;"	d
GPIO_SEL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;$/;"	e	enum:gpio_select
GPIO_SET	cmd/gpio.c	/^	GPIO_SET,$/;"	e	enum:gpio_cmd	file:
GPIO_SETDATAOUT	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define GPIO_SETDATAOUT(/;"	d
GPIO_SLIC_DATA	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_SLIC_DATA	/;"	d	file:
GPIO_SLIC_PIN	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_SLIC_PIN	/;"	d	file:
GPIO_SLIC_PORT	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define GPIO_SLIC_PORT	/;"	d	file:
GPIO_SLIDE	include/configs/nokia_rx51.h	/^#define GPIO_SLIDE	/;"	d
GPIO_SRCR_CANI2C_CAN1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_CANI2C_CAN1(/;"	d
GPIO_SRCR_CANI2C_CAN1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_CANI2C_CAN1_MASK	/;"	d
GPIO_SRCR_CANI2C_I2C0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_CANI2C_I2C0(/;"	d
GPIO_SRCR_CANI2C_I2C0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_CANI2C_I2C0_MASK	/;"	d
GPIO_SRCR_DSPI	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_DSPI(/;"	d
GPIO_SRCR_DSPIOW_DSPI0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_DSPIOW_DSPI0(/;"	d
GPIO_SRCR_DSPIOW_DSPI0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_DSPIOW_DSPI0_MASK	/;"	d
GPIO_SRCR_DSPIOW_OWDAT	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_DSPIOW_OWDAT(/;"	d
GPIO_SRCR_DSPIOW_OWDAT_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_DSPIOW_OWDAT_MASK	/;"	d
GPIO_SRCR_DSPI_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_DSPI_UNMASK	/;"	d
GPIO_SRCR_FB1_FB1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB1_FB1(/;"	d
GPIO_SRCR_FB1_FB1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB1_FB1_MASK	/;"	d
GPIO_SRCR_FB2_FB2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB2_FB2(/;"	d
GPIO_SRCR_FB2_FB2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB2_FB2_MASK	/;"	d
GPIO_SRCR_FB3_FB3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB3_FB3(/;"	d
GPIO_SRCR_FB3_FB3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB3_FB3_MASK	/;"	d
GPIO_SRCR_FB4_FB4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB4_FB4(/;"	d
GPIO_SRCR_FB4_FB4_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB4_FB4_MASK	/;"	d
GPIO_SRCR_FB4_FB5	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB4_FB5(/;"	d
GPIO_SRCR_FB4_FB5_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FB4_FB5_MASK	/;"	d
GPIO_SRCR_FEC_RMII0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FEC_RMII0(/;"	d
GPIO_SRCR_FEC_RMII0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FEC_RMII0_MASK	/;"	d
GPIO_SRCR_FEC_RMII1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FEC_RMII1(/;"	d
GPIO_SRCR_FEC_RMII1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_FEC_RMII1_MASK	/;"	d
GPIO_SRCR_I2C	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_I2C(/;"	d
GPIO_SRCR_I2C_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_I2C_UNMASK	/;"	d
GPIO_SRCR_IRQ0_IRQ0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_IRQ0_IRQ0(/;"	d
GPIO_SRCR_IRQ0_IRQ0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_IRQ0_IRQ0_MASK	/;"	d
GPIO_SRCR_IRQ_IRQ0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_IRQ_IRQ0(/;"	d
GPIO_SRCR_IRQ_IRQ0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_IRQ_IRQ0_UNMASK	/;"	d
GPIO_SRCR_IRQ_IRQ1DBG	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_IRQ_IRQ1DBG(/;"	d
GPIO_SRCR_IRQ_IRQ1DBG_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_IRQ_IRQ1DBG_UNMASK	/;"	d
GPIO_SRCR_SDHC	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SDHC(/;"	d
GPIO_SRCR_SDHC_SDHC	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_SDHC_SDHC(/;"	d
GPIO_SRCR_SDHC_SDHC_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_SDHC_SDHC_MASK	/;"	d
GPIO_SRCR_SDHC_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SDHC_UNMASK	/;"	d
GPIO_SRCR_SIM0_SIMP0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_SIM0_SIMP0(/;"	d
GPIO_SRCR_SIM0_SIMP0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_SIM0_SIMP0_MASK	/;"	d
GPIO_SRCR_SIM_SIMP0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SIM_SIMP0(/;"	d
GPIO_SRCR_SIM_SIMP0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SIM_SIMP0_UNMASK	/;"	d
GPIO_SRCR_SIM_SIMP1	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SIM_SIMP1(/;"	d
GPIO_SRCR_SIM_SIMP1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SIM_SIMP1_UNMASK	/;"	d
GPIO_SRCR_SSI	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SSI(/;"	d
GPIO_SRCR_SSI0_SSI0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_SSI0_SSI0(/;"	d
GPIO_SRCR_SSI0_SSI0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_SSI0_SSI0_MASK	/;"	d
GPIO_SRCR_SSI_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_SSI_UNMASK	/;"	d
GPIO_SRCR_TIMER	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_TIMER(/;"	d
GPIO_SRCR_TIMER_TMR0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR0(/;"	d
GPIO_SRCR_TIMER_TMR0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR0_MASK	/;"	d
GPIO_SRCR_TIMER_TMR1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR1(/;"	d
GPIO_SRCR_TIMER_TMR1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR1_MASK	/;"	d
GPIO_SRCR_TIMER_TMR2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR2(/;"	d
GPIO_SRCR_TIMER_TMR2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR2_MASK	/;"	d
GPIO_SRCR_TIMER_TMR3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR3(/;"	d
GPIO_SRCR_TIMER_TMR3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_TIMER_TMR3_MASK	/;"	d
GPIO_SRCR_TIMER_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_TIMER_UNMASK	/;"	d
GPIO_SRCR_UART0	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_UART0(/;"	d
GPIO_SRCR_UART0_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_UART0_UNMASK	/;"	d
GPIO_SRCR_UART2	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_UART2(/;"	d
GPIO_SRCR_UART2_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define GPIO_SRCR_UART2_UNMASK	/;"	d
GPIO_SRCR_UART_U0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_UART_U0(/;"	d
GPIO_SRCR_UART_U0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_UART_U0_MASK	/;"	d
GPIO_SRCR_UART_U1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_UART_U1(/;"	d
GPIO_SRCR_UART_U1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_UART_U1_MASK	/;"	d
GPIO_SRCR_UART_U2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_UART_U2(/;"	d
GPIO_SRCR_UART_U2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_SRCR_UART_U2_MASK	/;"	d
GPIO_SSP_CLK	include/SA-1100.h	/^#define GPIO_SSP_CLK	/;"	d
GPIO_SSP_RXD	include/SA-1100.h	/^#define GPIO_SSP_RXD	/;"	d
GPIO_SSP_SCLK	include/SA-1100.h	/^#define GPIO_SSP_SCLK	/;"	d
GPIO_SSP_SFRM	include/SA-1100.h	/^#define GPIO_SSP_SFRM	/;"	d
GPIO_SSP_TXD	include/SA-1100.h	/^#define GPIO_SSP_TXD	/;"	d
GPIO_SUS_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define GPIO_SUS_IRQ	/;"	d
GPIO_SWPORTA_DDR	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_SWPORTA_DDR(/;"	d
GPIO_SWPORTA_DDR	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_SWPORTA_DDR(/;"	d
GPIO_SWPORTA_DDR	drivers/gpio/dwapb_gpio.c	/^#define GPIO_SWPORTA_DDR	/;"	d	file:
GPIO_SWPORTA_DDR_OFFS	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_SWPORTA_DDR_OFFS	/;"	d
GPIO_SWPORTA_DDR_OFFS	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_SWPORTA_DDR_OFFS	/;"	d
GPIO_SWPORTA_DR	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_SWPORTA_DR(/;"	d
GPIO_SWPORTA_DR	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_SWPORTA_DR(/;"	d
GPIO_SWPORTA_DR	drivers/gpio/dwapb_gpio.c	/^#define GPIO_SWPORTA_DR	/;"	d	file:
GPIO_SWPORTA_DR_OFFS	board/micronas/vct/vcth/reg_gpio.h	/^#define GPIO_SWPORTA_DR_OFFS	/;"	d
GPIO_SWPORTA_DR_OFFS	board/micronas/vct/vctv/reg_gpio.h	/^#define GPIO_SWPORTA_DR_OFFS	/;"	d
GPIO_TCR	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_TCR(/;"	d
GPIO_TEST_N	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TEST_N	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define	GPIO_TEST_N	/;"	d
GPIO_TIC_ACK	include/SA-1100.h	/^#define GPIO_TIC_ACK	/;"	d
GPIO_TOGGLE	cmd/gpio.c	/^	GPIO_TOGGLE,$/;"	e	enum:gpio_cmd	file:
GPIO_TOTAL_PINS	drivers/gpio/db8500_gpio.c	/^#define GPIO_TOTAL_PINS	/;"	d	file:
GPIO_TO_BIT	arch/arm/include/asm/arch-armada100/gpio.h	/^#define GPIO_TO_BIT(/;"	d
GPIO_TO_MASK	drivers/gpio/lpc32xx_gpio.c	/^#define GPIO_TO_MASK(/;"	d	file:
GPIO_TO_PIN	board/bosch/shc/board.h	/^#define GPIO_TO_PIN(/;"	d
GPIO_TO_PIN	board/siemens/rut/board.c	/^#define GPIO_TO_PIN(/;"	d	file:
GPIO_TO_PIN	board/ti/am335x/board.c	/^#define GPIO_TO_PIN(/;"	d	file:
GPIO_TO_PORT	drivers/gpio/lpc32xx_gpio.c	/^#define GPIO_TO_PORT(/;"	d	file:
GPIO_TO_PORT	drivers/gpio/mxc_gpio.c	/^#define GPIO_TO_PORT(/;"	d	file:
GPIO_TO_RANK	drivers/gpio/lpc32xx_gpio.c	/^#define GPIO_TO_RANK(/;"	d	file:
GPIO_TO_REG	arch/arm/include/asm/arch-armada100/gpio.h	/^#define GPIO_TO_REG(/;"	d
GPIO_TREQA	include/SA-1100.h	/^#define GPIO_TREQA	/;"	d
GPIO_TREQB	include/SA-1100.h	/^#define GPIO_TREQB	/;"	d
GPIO_TS	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_TS(/;"	d
GPIO_TS	board/amcc/bamboo/bamboo.h	/^#define GPIO_TS(/;"	d
GPIO_TYPE_OPEN_DRAIN	include/smsc_sio1007.h	/^#define GPIO_TYPE_OPEN_DRAIN	/;"	d
GPIO_TYPE_PUSH_PULL	include/smsc_sio1007.h	/^#define GPIO_TYPE_PUSH_PULL	/;"	d
GPIO_UART1_PWRON	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_UART1_PWRON	/;"	d	file:
GPIO_UART2_PWRON	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_UART2_PWRON	/;"	d	file:
GPIO_UART3_PWRON	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_UART3_PWRON	/;"	d	file:
GPIO_UART_RXD	include/SA-1100.h	/^#define GPIO_UART_RXD	/;"	d
GPIO_UART_SCLK1	include/SA-1100.h	/^#define GPIO_UART_SCLK1	/;"	d
GPIO_UART_SCLK3	include/SA-1100.h	/^#define GPIO_UART_SCLK3	/;"	d
GPIO_UART_TXD	include/SA-1100.h	/^#define GPIO_UART_TXD	/;"	d
GPIO_UNIPHIER	drivers/gpio/Kconfig	/^config GPIO_UNIPHIER$/;"	c	menu:GPIO Support
GPIO_UNLOCK_SMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  GPIO_UNLOCK_SMI_EN	/;"	d
GPIO_URXD_WOM_U0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U0(/;"	d
GPIO_URXD_WOM_U0_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U0_MASK	/;"	d
GPIO_URXD_WOM_U1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U1(/;"	d
GPIO_URXD_WOM_U1_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U1_MASK	/;"	d
GPIO_URXD_WOM_U2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U2(/;"	d
GPIO_URXD_WOM_U2_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U2_MASK	/;"	d
GPIO_URXD_WOM_U3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U3(/;"	d
GPIO_URXD_WOM_U3_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U3_MASK	/;"	d
GPIO_URXD_WOM_U4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U4(/;"	d
GPIO_URXD_WOM_U4_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U4_MASK	/;"	d
GPIO_URXD_WOM_U5	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U5(/;"	d
GPIO_URXD_WOM_U5_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U5_MASK	/;"	d
GPIO_URXD_WOM_U6	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U6(/;"	d
GPIO_URXD_WOM_U6_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U6_MASK	/;"	d
GPIO_URXD_WOM_U7	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U7(/;"	d
GPIO_URXD_WOM_U7_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U7_MASK	/;"	d
GPIO_URXD_WOM_U8	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U8(/;"	d
GPIO_URXD_WOM_U8_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U8_MASK	/;"	d
GPIO_URXD_WOM_U9	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U9(/;"	d
GPIO_URXD_WOM_U9_MASK	arch/m68k/include/asm/m5441x.h	/^#define GPIO_URXD_WOM_U9_MASK	/;"	d
GPIO_USAGE	arch/blackfin/include/asm/gpio.h	/^#define GPIO_USAGE /;"	d
GPIO_USB0_PWR_ON	board/theadorable/theadorable.c	/^#define GPIO_USB0_PWR_ON	/;"	d	file:
GPIO_USB1_0	board/intercontrol/digsy_mtc/cmd_disp.c	/^#define GPIO_USB1_0	/;"	d	file:
GPIO_USB1_0	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPIO_USB1_0	/;"	d	file:
GPIO_USB1_9	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPIO_USB1_9	/;"	d	file:
GPIO_USB1_PWR_ON	board/theadorable/theadorable.c	/^#define GPIO_USB1_PWR_ON	/;"	d	file:
GPIO_USB_H_PWR	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_USB_H_PWR	/;"	d	file:
GPIO_USB_OTG_PWR	board/tqc/tqma6/tqma6_wru4.c	/^#define GPIO_USB_OTG_PWR	/;"	d	file:
GPIO_USB_PCTL0	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_USB_PCTL0	/;"	d
GPIO_USB_PCTL1	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_USB_PCTL1	/;"	d
GPIO_USB_RESET	board/barco/platinum/platinum_picon.c	/^#define GPIO_USB_RESET	/;"	d	file:
GPIO_USB_VBUS	board/buffalo/lsxl/lsxl.h	/^#define GPIO_USB_VBUS	/;"	d
GPIO_USESEL_OFFSET	arch/x86/lib/pinctrl_ich6.c	/^#define GPIO_USESEL_OFFSET(/;"	d	file:
GPIO_USESEL_OFFSET	drivers/gpio/intel_ich6_gpio.c	/^#define GPIO_USESEL_OFFSET(/;"	d	file:
GPIO_USE_SEL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPIO_USE_SEL	/;"	d
GPIO_USE_SEL2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPIO_USE_SEL2	/;"	d
GPIO_USE_SEL3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPIO_USE_SEL3	/;"	d
GPIO_UTXD_WOM_U0	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U0	/;"	d
GPIO_UTXD_WOM_U1	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U1	/;"	d
GPIO_UTXD_WOM_U2	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U2	/;"	d
GPIO_UTXD_WOM_U3	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U3	/;"	d
GPIO_UTXD_WOM_U4	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U4	/;"	d
GPIO_UTXD_WOM_U5	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U5	/;"	d
GPIO_UTXD_WOM_U6	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U6	/;"	d
GPIO_UTXD_WOM_U7	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U7	/;"	d
GPIO_UTXD_WOM_U8	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U8	/;"	d
GPIO_UTXD_WOM_U9	arch/m68k/include/asm/m5441x.h	/^#define GPIO_UTXD_WOM_U9	/;"	d
GPIO_VAL	arch/arm/include/asm/arch-armada100/gpio.h	/^#define GPIO_VAL(/;"	d
GPIO_VAL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIO_VAL(/;"	d
GPIO_VGA_DDC	include/radeon.h	/^#define GPIO_VGA_DDC	/;"	d
GPIO_VGA_SWITCH	board/varisys/cyrus/cyrus.c	/^#define GPIO_VGA_SWITCH /;"	d	file:
GPIO_WD	board/Arcturus/ucp1020/ucp1020.h	/^#define GPIO_WD	/;"	d
GPIO_WKUP_7	include/mpc5xxx.h	/^#define GPIO_WKUP_7	/;"	d
GPIO_Y_0	include/radeon.h	/^#define GPIO_Y_0	/;"	d
GPIO_Y_1	include/radeon.h	/^#define GPIO_Y_1	/;"	d
GPIO_bit	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPIO_bit(/;"	d
GPIOx_IR	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IR	/;"	d
GPIOx_IR	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IR /;"	d
GPIOx_IS1H	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IS1H	/;"	d
GPIOx_IS1H	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IS1H /;"	d
GPIOx_IS1L	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IS1L	/;"	d
GPIOx_IS1L	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IS1L /;"	d
GPIOx_IS2H	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IS2H	/;"	d
GPIOx_IS2H	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IS2H /;"	d
GPIOx_IS2L	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IS2L	/;"	d
GPIOx_IS2L	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IS2L /;"	d
GPIOx_IS3H	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IS3H	/;"	d
GPIOx_IS3H	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IS3H /;"	d
GPIOx_IS3L	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_IS3L	/;"	d
GPIOx_IS3L	board/amcc/bamboo/bamboo.h	/^#define GPIOx_IS3L /;"	d
GPIOx_ODR	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_ODR	/;"	d
GPIOx_ODR	board/amcc/bamboo/bamboo.h	/^#define GPIOx_ODR /;"	d
GPIOx_OR	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_OR	/;"	d
GPIOx_OR	board/amcc/bamboo/bamboo.h	/^#define GPIOx_OR /;"	d
GPIOx_OSH	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_OSH	/;"	d
GPIOx_OSH	board/amcc/bamboo/bamboo.h	/^#define GPIOx_OSH /;"	d
GPIOx_OSL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_OSL	/;"	d
GPIOx_OSL	board/amcc/bamboo/bamboo.h	/^#define GPIOx_OSL /;"	d
GPIOx_RR1	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_RR1	/;"	d
GPIOx_RR1	board/amcc/bamboo/bamboo.h	/^#define GPIOx_RR1 /;"	d
GPIOx_RR2	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_RR2	/;"	d
GPIOx_RR2	board/amcc/bamboo/bamboo.h	/^#define GPIOx_RR2 /;"	d
GPIOx_RR3	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_RR3	/;"	d
GPIOx_RR3	board/amcc/bamboo/bamboo.h	/^#define GPIOx_RR3 /;"	d
GPIOx_TCR	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_TCR	/;"	d
GPIOx_TCR	board/amcc/bamboo/bamboo.h	/^#define GPIOx_TCR /;"	d
GPIOx_TSH	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_TSH	/;"	d
GPIOx_TSH	board/amcc/bamboo/bamboo.h	/^#define GPIOx_TSH /;"	d
GPIOx_TSL	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define GPIOx_TSL	/;"	d
GPIOx_TSL	board/amcc/bamboo/bamboo.h	/^#define GPIOx_TSL /;"	d
GPI_INV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPI_INV	/;"	d
GPI_INV	arch/x86/lib/pinctrl_ich6.c	/^#define GPI_INV	/;"	d	file:
GPJ0	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ0 = 256,$/;"	e	enum:s3c2440_gpio
GPJ1	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ1,$/;"	e	enum:s3c2440_gpio
GPJ10	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ10,$/;"	e	enum:s3c2440_gpio
GPJ11	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ11,$/;"	e	enum:s3c2440_gpio
GPJ12	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ12,$/;"	e	enum:s3c2440_gpio
GPJ2	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ2,$/;"	e	enum:s3c2440_gpio
GPJ3	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ3,$/;"	e	enum:s3c2440_gpio
GPJ4	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ4,$/;"	e	enum:s3c2440_gpio
GPJ5	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ5,$/;"	e	enum:s3c2440_gpio
GPJ6	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ6,$/;"	e	enum:s3c2440_gpio
GPJ7	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ7,$/;"	e	enum:s3c2440_gpio
GPJ8	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ8,$/;"	e	enum:s3c2440_gpio
GPJ9	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^	GPJ9,$/;"	e	enum:s3c2440_gpio
GPLL0_STATUS	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define GPLL0_STATUS /;"	d	file:
GPLL0_STATUS_ACTIVE	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define GPLL0_STATUS_ACTIVE /;"	d	file:
GPLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define GPLL_CON0_LOCKED	/;"	d
GPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define GPLL_CON1_VAL	/;"	d
GPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define GPLL_HZ	/;"	d
GPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define GPLL_HZ	/;"	d
GPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define GPLL_HZ	/;"	d
GPLL_MODE_DEEP	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	GPLL_MODE_DEEP,$/;"	e	enum:__anon375ccd790103
GPLL_MODE_DEEP	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	GPLL_MODE_DEEP,$/;"	e	enum:__anon3783c4e20703
GPLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	GPLL_MODE_MASK		= 3,$/;"	e	enum:__anon375ccd790103
GPLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	GPLL_MODE_MASK		= 3,$/;"	e	enum:__anon3783c4e20703
GPLL_MODE_NORM	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	GPLL_MODE_NORM,$/;"	e	enum:__anon375ccd790103
GPLL_MODE_NORMAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	GPLL_MODE_NORMAL,$/;"	e	enum:__anon3783c4e20703
GPLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	GPLL_MODE_SHIFT		= 12,$/;"	e	enum:__anon375ccd790103
GPLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	GPLL_MODE_SHIFT		= 0xc,$/;"	e	enum:__anon3783c4e20703
GPLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	GPLL_MODE_SLOW		= 0,$/;"	e	enum:__anon375ccd790103
GPLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	GPLL_MODE_SLOW		= 0,$/;"	e	enum:__anon3783c4e20703
GPLR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPLR(/;"	d
GPLR	include/SA-1100.h	/^#define GPLR	/;"	d
GPLR	include/SA-1100.h	/^#define GPLR /;"	d
GPLR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPLR0	/;"	d
GPLR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPLR1	/;"	d
GPLR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPLR2	/;"	d
GPLR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPLR3	/;"	d
GPL_DMER_MASK_DISA	arch/powerpc/include/asm/4xx_pcie.h	/^#define GPL_DMER_MASK_DISA	/;"	d
GPL_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define GPL_RATIO	/;"	d
GPL_RATIO	board/samsung/trats/setup.h	/^#define GPL_RATIO	/;"	d
GPMCFCLKDIVIDER	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define GPMCFCLKDIVIDER(/;"	d
GPMC_A0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A0	/;"	d
GPMC_A1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A1	/;"	d
GPMC_A10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A10	/;"	d
GPMC_A11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A11	/;"	d
GPMC_A12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A12	/;"	d
GPMC_A13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A13	/;"	d
GPMC_A14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A14	/;"	d
GPMC_A15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A15	/;"	d
GPMC_A16	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A16	/;"	d
GPMC_A16	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A16	/;"	d
GPMC_A17	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A17	/;"	d
GPMC_A17	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A17	/;"	d
GPMC_A18	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A18	/;"	d
GPMC_A18	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A18	/;"	d
GPMC_A19	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A19	/;"	d
GPMC_A19	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A19	/;"	d
GPMC_A2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A2	/;"	d
GPMC_A20	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A20	/;"	d
GPMC_A20	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A20	/;"	d
GPMC_A21	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A21	/;"	d
GPMC_A21	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A21	/;"	d
GPMC_A22	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A22	/;"	d
GPMC_A22	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A22	/;"	d
GPMC_A23	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A23	/;"	d
GPMC_A23	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A23	/;"	d
GPMC_A24	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A24	/;"	d
GPMC_A24	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A24	/;"	d
GPMC_A25	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_A25	/;"	d
GPMC_A25	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A25	/;"	d
GPMC_A26	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A26	/;"	d
GPMC_A27	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A27	/;"	d
GPMC_A3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A3	/;"	d
GPMC_A4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A4	/;"	d
GPMC_A5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A5	/;"	d
GPMC_A6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A6	/;"	d
GPMC_A7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A7	/;"	d
GPMC_A8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A8	/;"	d
GPMC_A9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_A9	/;"	d
GPMC_AD0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD0	/;"	d
GPMC_AD0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD0	/;"	d
GPMC_AD1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD1	/;"	d
GPMC_AD1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD1	/;"	d
GPMC_AD10	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD10	/;"	d
GPMC_AD10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD10	/;"	d
GPMC_AD11	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD11	/;"	d
GPMC_AD11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD11	/;"	d
GPMC_AD12	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD12	/;"	d
GPMC_AD12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD12	/;"	d
GPMC_AD13	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD13	/;"	d
GPMC_AD13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD13	/;"	d
GPMC_AD14	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD14	/;"	d
GPMC_AD14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD14	/;"	d
GPMC_AD15	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD15	/;"	d
GPMC_AD15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD15	/;"	d
GPMC_AD2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD2	/;"	d
GPMC_AD2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD2	/;"	d
GPMC_AD3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD3	/;"	d
GPMC_AD3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD3	/;"	d
GPMC_AD4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD4	/;"	d
GPMC_AD4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD4	/;"	d
GPMC_AD5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD5	/;"	d
GPMC_AD5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD5	/;"	d
GPMC_AD6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD6	/;"	d
GPMC_AD6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD6	/;"	d
GPMC_AD7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD7	/;"	d
GPMC_AD7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD7	/;"	d
GPMC_AD8	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD8	/;"	d
GPMC_AD8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD8	/;"	d
GPMC_AD9	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_AD9	/;"	d
GPMC_AD9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_AD9	/;"	d
GPMC_ADVN_ALE	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_ADVN_ALE	/;"	d
GPMC_BASE	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define GPMC_BASE	/;"	d
GPMC_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define GPMC_BASE	/;"	d
GPMC_BASE	arch/arm/include/asm/arch-omap4/hardware.h	/^#define GPMC_BASE	/;"	d
GPMC_BASE	arch/arm/include/asm/arch-omap5/hardware.h	/^#define GPMC_BASE	/;"	d
GPMC_BASEADDR_MASK	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_BASEADDR_MASK	/;"	d
GPMC_BASEADDR_MASK	board/gumstix/duovero/duovero.c	/^#define GPMC_BASEADDR_MASK	/;"	d	file:
GPMC_BEN0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_BEN0	/;"	d
GPMC_BEN1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_BEN1	/;"	d
GPMC_BUF_EMPTY	include/linux/mtd/omap_gpmc.h	/^#define GPMC_BUF_EMPTY	/;"	d
GPMC_BUF_FULL	include/linux/mtd/omap_gpmc.h	/^#define GPMC_BUF_FULL	/;"	d
GPMC_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_CLK	/;"	d
GPMC_CLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_CLK	/;"	d
GPMC_CONFIG_CS0	arch/arm/include/asm/arch-omap3/cpu.h	/^#define GPMC_CONFIG_CS0	/;"	d
GPMC_CONFIG_CS0_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define GPMC_CONFIG_CS0_BASE	/;"	d
GPMC_CS0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_CS0	/;"	d
GPMC_CS1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_CS1	/;"	d
GPMC_CS2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_CS2	/;"	d
GPMC_CS3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_CS3	/;"	d
GPMC_CS_ENABLE	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_CS_ENABLE	/;"	d
GPMC_CS_ENABLE	board/gumstix/duovero/duovero.c	/^#define GPMC_CS_ENABLE	/;"	d	file:
GPMC_MAX_CS	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_MAX_CS	/;"	d
GPMC_MAX_CS	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_MAX_CS	/;"	d
GPMC_MAX_CS	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_MAX_CS	/;"	d
GPMC_MAX_CS	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_MAX_CS	/;"	d
GPMC_MAX_REG	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_MAX_REG	/;"	d
GPMC_MAX_REG	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_MAX_REG	/;"	d
GPMC_MAX_REG	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_MAX_REG	/;"	d
GPMC_MAX_REG	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_MAX_REG	/;"	d
GPMC_MAX_SECTORS	include/linux/mtd/omap_gpmc.h	/^#define GPMC_MAX_SECTORS	/;"	d
GPMC_NADV_ALE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NADV_ALE	/;"	d
GPMC_NAND_ECC_LP_x8_LAYOUT	include/configs/baltos.h	/^#define GPMC_NAND_ECC_LP_x8_LAYOUT	/;"	d
GPMC_NBE0_CLE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NBE0_CLE	/;"	d
GPMC_NBE1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NBE1	/;"	d
GPMC_NCS0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NCS0	/;"	d
GPMC_NCS1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NCS1	/;"	d
GPMC_NCS2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NCS2	/;"	d
GPMC_NCS3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NCS3	/;"	d
GPMC_NOE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NOE	/;"	d
GPMC_NWE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NWE	/;"	d
GPMC_NWP	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_NWP	/;"	d
GPMC_OEN_REN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_OEN_REN	/;"	d
GPMC_SIZE_128M	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_SIZE_128M	/;"	d
GPMC_SIZE_128M	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_SIZE_128M	/;"	d
GPMC_SIZE_128M	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_SIZE_128M	/;"	d
GPMC_SIZE_128M	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_SIZE_128M	/;"	d
GPMC_SIZE_16M	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_SIZE_16M	/;"	d
GPMC_SIZE_16M	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_SIZE_16M	/;"	d
GPMC_SIZE_16M	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_SIZE_16M	/;"	d
GPMC_SIZE_16M	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_SIZE_16M	/;"	d
GPMC_SIZE_16M	board/gumstix/duovero/duovero.c	/^#define GPMC_SIZE_16M	/;"	d	file:
GPMC_SIZE_256M	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_SIZE_256M	/;"	d
GPMC_SIZE_256M	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_SIZE_256M	/;"	d
GPMC_SIZE_256M	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_SIZE_256M	/;"	d
GPMC_SIZE_256M	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_SIZE_256M	/;"	d
GPMC_SIZE_32M	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_SIZE_32M	/;"	d
GPMC_SIZE_32M	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_SIZE_32M	/;"	d
GPMC_SIZE_32M	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_SIZE_32M	/;"	d
GPMC_SIZE_32M	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_SIZE_32M	/;"	d
GPMC_SIZE_64M	arch/arm/include/asm/arch-am33xx/mem.h	/^#define GPMC_SIZE_64M	/;"	d
GPMC_SIZE_64M	arch/arm/include/asm/arch-omap3/mem.h	/^#define GPMC_SIZE_64M	/;"	d
GPMC_SIZE_64M	arch/arm/include/asm/arch-omap4/mem.h	/^#define GPMC_SIZE_64M	/;"	d
GPMC_SIZE_64M	arch/arm/include/asm/arch-omap5/mem.h	/^#define GPMC_SIZE_64M	/;"	d
GPMC_WAIT0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_WAIT0	/;"	d
GPMC_WAIT0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_WAIT0	/;"	d
GPMC_WAIT1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define GPMC_WAIT1	/;"	d
GPMC_WEN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define GPMC_WEN	/;"	d
GPMI_AUXILIARY_ADDRESS_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_AUXILIARY_ADDRESS_MASK	/;"	d
GPMI_AUXILIARY_ADDRESS_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_AUXILIARY_ADDRESS_OFFSET	/;"	d
GPMI_COMPARE_MASK_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_COMPARE_MASK_MASK	/;"	d
GPMI_COMPARE_MASK_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_COMPARE_MASK_OFFSET	/;"	d
GPMI_COMPARE_REFERENCE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_COMPARE_REFERENCE_MASK	/;"	d
GPMI_COMPARE_REFERENCE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_COMPARE_REFERENCE_OFFSET	/;"	d
GPMI_CTRL0_ADDRESS_INCREMENT	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_ADDRESS_INCREMENT	/;"	d
GPMI_CTRL0_ADDRESS_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_ADDRESS_MASK	/;"	d
GPMI_CTRL0_ADDRESS_NAND_ALE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_ADDRESS_NAND_ALE	/;"	d
GPMI_CTRL0_ADDRESS_NAND_CLE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_ADDRESS_NAND_CLE	/;"	d
GPMI_CTRL0_ADDRESS_NAND_DATA	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_ADDRESS_NAND_DATA	/;"	d
GPMI_CTRL0_ADDRESS_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_ADDRESS_OFFSET	/;"	d
GPMI_CTRL0_CLKGATE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_CLKGATE	/;"	d
GPMI_CTRL0_COMMAND_MODE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_COMMAND_MODE_MASK	/;"	d
GPMI_CTRL0_COMMAND_MODE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_COMMAND_MODE_OFFSET	/;"	d
GPMI_CTRL0_COMMAND_MODE_READ	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_COMMAND_MODE_READ	/;"	d
GPMI_CTRL0_COMMAND_MODE_READ_AND_COMPARE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_COMMAND_MODE_READ_AND_COMPARE	/;"	d
GPMI_CTRL0_COMMAND_MODE_WAIT_FOR_READY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_COMMAND_MODE_WAIT_FOR_READY	/;"	d
GPMI_CTRL0_COMMAND_MODE_WRITE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_COMMAND_MODE_WRITE	/;"	d
GPMI_CTRL0_CS_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_CS_MASK	/;"	d
GPMI_CTRL0_CS_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_CS_OFFSET	/;"	d
GPMI_CTRL0_DEV_IRQ_EN	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_DEV_IRQ_EN	/;"	d
GPMI_CTRL0_LOCK_CS	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_LOCK_CS	/;"	d
GPMI_CTRL0_RUN	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_RUN	/;"	d
GPMI_CTRL0_SFTRST	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_SFTRST	/;"	d
GPMI_CTRL0_UDMA	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_UDMA	/;"	d
GPMI_CTRL0_WORD_LENGTH	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_WORD_LENGTH	/;"	d
GPMI_CTRL0_XFER_COUNT_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_XFER_COUNT_MASK	/;"	d
GPMI_CTRL0_XFER_COUNT_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL0_XFER_COUNT_OFFSET	/;"	d
GPMI_CTRL1_ABORT_WAIT_FOR_READY_CHANNEL_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_ABORT_WAIT_FOR_READY_CHANNEL_MASK	/;"	d
GPMI_CTRL1_ABORT_WAIT_FOR_READY_CHANNEL_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_ABORT_WAIT_FOR_READY_CHANNEL_OFFSET	/;"	d
GPMI_CTRL1_ABORT_WAIT_REQUEST	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_ABORT_WAIT_REQUEST	/;"	d
GPMI_CTRL1_ATA_IRQRDY_POLARITY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_ATA_IRQRDY_POLARITY	/;"	d
GPMI_CTRL1_BCH_MODE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_BCH_MODE	/;"	d
GPMI_CTRL1_BURST_EN	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_BURST_EN	/;"	d
GPMI_CTRL1_CAMERA_MODE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_CAMERA_MODE	/;"	d
GPMI_CTRL1_DECOUPLE_CS	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_DECOUPLE_CS	/;"	d
GPMI_CTRL1_DEV_IRQ	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_DEV_IRQ	/;"	d
GPMI_CTRL1_DEV_RESET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_DEV_RESET	/;"	d
GPMI_CTRL1_DLL_ENABLE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_DLL_ENABLE	/;"	d
GPMI_CTRL1_DMA2ECC_MODE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_DMA2ECC_MODE	/;"	d
GPMI_CTRL1_GANGED_RDYBUSY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_GANGED_RDYBUSY	/;"	d
GPMI_CTRL1_GPMI_MODE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_GPMI_MODE	/;"	d
GPMI_CTRL1_HALF_PERIOD	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_HALF_PERIOD	/;"	d
GPMI_CTRL1_RDN_DELAY_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_RDN_DELAY_MASK	/;"	d
GPMI_CTRL1_RDN_DELAY_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_RDN_DELAY_OFFSET	/;"	d
GPMI_CTRL1_TIMEOUT_IRQ	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_TIMEOUT_IRQ	/;"	d
GPMI_CTRL1_TIMEOUT_IRQ_EN	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_TIMEOUT_IRQ_EN	/;"	d
GPMI_CTRL1_WRN_DLY_SEL_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_WRN_DLY_SEL_MASK	/;"	d
GPMI_CTRL1_WRN_DLY_SEL_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_CTRL1_WRN_DLY_SEL_OFFSET	/;"	d
GPMI_DATA_DATA_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DATA_DATA_MASK	/;"	d
GPMI_DATA_DATA_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DATA_DATA_OFFSET	/;"	d
GPMI_DEBUG2_BUSY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_BUSY	/;"	d
GPMI_DEBUG2_GPMI2SYND_READY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_GPMI2SYND_READY	/;"	d
GPMI_DEBUG2_GPMI2SYND_VALID	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_GPMI2SYND_VALID	/;"	d
GPMI_DEBUG2_MAIN_STATE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MASK	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_BYTCNT	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_BYTCNT	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_DMAACK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_DMAACK	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_DMAREQ	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_DMAREQ	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_DONE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_DONE	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_IDLE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_IDLE	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_LDDMAR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_LDDMAR	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_LDFIFO	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_LDFIFO	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_RDCMP	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_RDCMP	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_WAITFE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_WAITFE	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_WAITFF	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_WAITFF	/;"	d
GPMI_DEBUG2_MAIN_STATE_MSM_WAITFR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_MSM_WAITFR	/;"	d
GPMI_DEBUG2_MAIN_STATE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_MAIN_STATE_OFFSET	/;"	d
GPMI_DEBUG2_PIN_STATE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_MASK	/;"	d
GPMI_DEBUG2_PIN_STATE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_OFFSET	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_ADDR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_ADDR	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_ATARDY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_ATARDY	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_BYTCNT	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_BYTCNT	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_DHOLD	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_DHOLD	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_DONE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_DONE	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_IDLE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_IDLE	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_STALL	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_STALL	/;"	d
GPMI_DEBUG2_PIN_STATE_PSM_STROBE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_PIN_STATE_PSM_STROBE	/;"	d
GPMI_DEBUG2_RDN_TAP_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_RDN_TAP_MASK	/;"	d
GPMI_DEBUG2_RDN_TAP_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_RDN_TAP_OFFSET	/;"	d
GPMI_DEBUG2_SYND2GPMI_BE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_SYND2GPMI_BE_MASK	/;"	d
GPMI_DEBUG2_SYND2GPMI_BE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_SYND2GPMI_BE_OFFSET	/;"	d
GPMI_DEBUG2_SYND2GPMI_READY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_SYND2GPMI_READY	/;"	d
GPMI_DEBUG2_SYND2GPMI_VALID	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_SYND2GPMI_VALID	/;"	d
GPMI_DEBUG2_UDMA_STATE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_UDMA_STATE_MASK	/;"	d
GPMI_DEBUG2_UDMA_STATE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_UDMA_STATE_OFFSET	/;"	d
GPMI_DEBUG2_UPDATE_WINDOW	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_UPDATE_WINDOW	/;"	d
GPMI_DEBUG2_VIEW_DELAYED_RDN	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG2_VIEW_DELAYED_RDN	/;"	d
GPMI_DEBUG3_APB_WORD_CNTR_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG3_APB_WORD_CNTR_MASK	/;"	d
GPMI_DEBUG3_APB_WORD_CNTR_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG3_APB_WORD_CNTR_OFFSET	/;"	d
GPMI_DEBUG3_DEV_WORD_CNTR_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG3_DEV_WORD_CNTR_MASK	/;"	d
GPMI_DEBUG3_DEV_WORD_CNTR_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG3_DEV_WORD_CNTR_OFFSET	/;"	d
GPMI_DEBUG_CMD_END_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_CMD_END_MASK	/;"	d
GPMI_DEBUG_CMD_END_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_CMD_END_OFFSET	/;"	d
GPMI_DEBUG_DMAREQ_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_DMAREQ_MASK	/;"	d
GPMI_DEBUG_DMAREQ_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_DMAREQ_OFFSET	/;"	d
GPMI_DEBUG_DMA_SENSE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_DMA_SENSE_MASK	/;"	d
GPMI_DEBUG_DMA_SENSE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_DMA_SENSE_OFFSET	/;"	d
GPMI_DEBUG_WAIT_FOR_READY_END_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_WAIT_FOR_READY_END_MASK	/;"	d
GPMI_DEBUG_WAIT_FOR_READY_END_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_DEBUG_WAIT_FOR_READY_END_OFFSET	/;"	d
GPMI_ECCCOUNT_COUNT_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCOUNT_COUNT_MASK	/;"	d
GPMI_ECCCOUNT_COUNT_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCOUNT_COUNT_OFFSET	/;"	d
GPMI_ECCCTRL_BUFFER_MASK_BCH_AUXONLY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_BUFFER_MASK_BCH_AUXONLY	/;"	d
GPMI_ECCCTRL_BUFFER_MASK_BCH_PAGE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_BUFFER_MASK_BCH_PAGE	/;"	d
GPMI_ECCCTRL_BUFFER_MASK_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_BUFFER_MASK_MASK	/;"	d
GPMI_ECCCTRL_BUFFER_MASK_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_BUFFER_MASK_OFFSET	/;"	d
GPMI_ECCCTRL_ECC_CMD_DECODE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_ECC_CMD_DECODE	/;"	d
GPMI_ECCCTRL_ECC_CMD_ENCODE	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_ECC_CMD_ENCODE	/;"	d
GPMI_ECCCTRL_ECC_CMD_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_ECC_CMD_MASK	/;"	d
GPMI_ECCCTRL_ECC_CMD_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_ECC_CMD_OFFSET	/;"	d
GPMI_ECCCTRL_ENABLE_ECC	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_ENABLE_ECC	/;"	d
GPMI_ECCCTRL_HANDLE_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_HANDLE_MASK	/;"	d
GPMI_ECCCTRL_HANDLE_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_ECCCTRL_HANDLE_OFFSET	/;"	d
GPMI_PAD_CTRL0	board/engicam/icorem6/icorem6.c	/^#define GPMI_PAD_CTRL0	/;"	d	file:
GPMI_PAD_CTRL0	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define GPMI_PAD_CTRL0 /;"	d	file:
GPMI_PAD_CTRL0	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define GPMI_PAD_CTRL0 /;"	d	file:
GPMI_PAD_CTRL1	board/engicam/icorem6/icorem6.c	/^#define GPMI_PAD_CTRL1	/;"	d	file:
GPMI_PAD_CTRL1	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define GPMI_PAD_CTRL1 /;"	d	file:
GPMI_PAD_CTRL1	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define GPMI_PAD_CTRL1 /;"	d	file:
GPMI_PAD_CTRL2	board/engicam/icorem6/icorem6.c	/^#define GPMI_PAD_CTRL2	/;"	d	file:
GPMI_PAD_CTRL2	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define GPMI_PAD_CTRL2 /;"	d	file:
GPMI_PAD_CTRL2	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define GPMI_PAD_CTRL2 /;"	d	file:
GPMI_PAYLOAD_ADDRESS_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_PAYLOAD_ADDRESS_MASK	/;"	d
GPMI_PAYLOAD_ADDRESS_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_PAYLOAD_ADDRESS_OFFSET	/;"	d
GPMI_STAT_ATA_IRQ	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_ATA_IRQ	/;"	d
GPMI_STAT_DEV0_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV0_ERROR	/;"	d
GPMI_STAT_DEV1_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV1_ERROR	/;"	d
GPMI_STAT_DEV2_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV2_ERROR	/;"	d
GPMI_STAT_DEV3_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV3_ERROR	/;"	d
GPMI_STAT_DEV4_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV4_ERROR	/;"	d
GPMI_STAT_DEV5_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV5_ERROR	/;"	d
GPMI_STAT_DEV6_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV6_ERROR	/;"	d
GPMI_STAT_DEV7_ERROR	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_DEV7_ERROR	/;"	d
GPMI_STAT_FIFO_EMPTY	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_FIFO_EMPTY	/;"	d
GPMI_STAT_FIFO_FULL	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_FIFO_FULL	/;"	d
GPMI_STAT_INVALID_BUFFER_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_INVALID_BUFFER_MASK	/;"	d
GPMI_STAT_PRESENT	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_PRESENT	/;"	d
GPMI_STAT_RDY_TIMEOUT_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_RDY_TIMEOUT_MASK	/;"	d
GPMI_STAT_RDY_TIMEOUT_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_RDY_TIMEOUT_OFFSET	/;"	d
GPMI_STAT_READY_BUSY_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_READY_BUSY_MASK	/;"	d
GPMI_STAT_READY_BUSY_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_STAT_READY_BUSY_OFFSET	/;"	d
GPMI_TIMING0_ADDRESS_SETUP_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING0_ADDRESS_SETUP_MASK	/;"	d
GPMI_TIMING0_ADDRESS_SETUP_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING0_ADDRESS_SETUP_OFFSET	/;"	d
GPMI_TIMING0_DATA_HOLD_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING0_DATA_HOLD_MASK	/;"	d
GPMI_TIMING0_DATA_HOLD_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING0_DATA_HOLD_OFFSET	/;"	d
GPMI_TIMING0_DATA_SETUP_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING0_DATA_SETUP_MASK	/;"	d
GPMI_TIMING0_DATA_SETUP_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING0_DATA_SETUP_OFFSET	/;"	d
GPMI_TIMING1_DEVICE_BUSY_TIMEOUT_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING1_DEVICE_BUSY_TIMEOUT_MASK	/;"	d
GPMI_TIMING1_DEVICE_BUSY_TIMEOUT_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING1_DEVICE_BUSY_TIMEOUT_OFFSET	/;"	d
GPMI_TIMING2_UDMA_ENV_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_ENV_MASK	/;"	d
GPMI_TIMING2_UDMA_ENV_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_ENV_OFFSET	/;"	d
GPMI_TIMING2_UDMA_HOLD_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_HOLD_MASK	/;"	d
GPMI_TIMING2_UDMA_HOLD_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_HOLD_OFFSET	/;"	d
GPMI_TIMING2_UDMA_SETUP_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_SETUP_MASK	/;"	d
GPMI_TIMING2_UDMA_SETUP_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_SETUP_OFFSET	/;"	d
GPMI_TIMING2_UDMA_TRP_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_TRP_MASK	/;"	d
GPMI_TIMING2_UDMA_TRP_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_TIMING2_UDMA_TRP_OFFSET	/;"	d
GPMI_VERSION_MAJOR_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_VERSION_MAJOR_MASK	/;"	d
GPMI_VERSION_MAJOR_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_VERSION_MAJOR_OFFSET	/;"	d
GPMI_VERSION_MINOR_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_VERSION_MINOR_MASK	/;"	d
GPMI_VERSION_MINOR_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_VERSION_MINOR_OFFSET	/;"	d
GPMI_VERSION_STEP_MASK	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_VERSION_STEP_MASK	/;"	d
GPMI_VERSION_STEP_OFFSET	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define	GPMI_VERSION_STEP_OFFSET	/;"	d
GPO0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	GPO0_MARK,	GPI0_MARK,	GPO1_MARK,	GPI1_MARK,$/;"	e	enum:__anona304c1340103	file:
GPO0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO1EN	include/fsl_pmic.h	/^#define GPO1EN	/;"	d
GPO1STBY	include/fsl_pmic.h	/^#define GPO1STBY	/;"	d
GPO1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	GPO0_MARK,	GPI0_MARK,	GPO1_MARK,	GPI1_MARK,$/;"	e	enum:__anona304c1340103	file:
GPO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO2EN	include/fsl_pmic.h	/^#define GPO2EN	/;"	d
GPO2STBY	include/fsl_pmic.h	/^#define GPO2STBY	/;"	d
GPO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO2_MARK, STATUS0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO3EN	include/fsl_pmic.h	/^#define GPO3EN	/;"	d
GPO3STBY	include/fsl_pmic.h	/^#define GPO3STBY	/;"	d
GPO3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO3_MARK, STATUS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO4EN	include/fsl_pmic.h	/^#define GPO4EN	/;"	d
GPO4STBY	include/fsl_pmic.h	/^#define GPO4STBY	/;"	d
GPO4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO4_MARK, STATUS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO5_MARK, SCIFA0_SCK_MARK, FSICOSLDT3_MARK, PORT16_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO6_MARK, MFG1_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO7_MARK, MFG0_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
GPO_15	board/work-microwave/work_92105/work_92105_display.c	/^#define GPO_15 /;"	d	file:
GPO_19	board/work-microwave/work_92105/work_92105.c	/^#define GPO_19 /;"	d	file:
GPO_BLINK	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GPO_BLINK	/;"	d
GPP_64_66_DATA_OUT_CLEAR_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_64_66_DATA_OUT_CLEAR_REG	/;"	d
GPP_64_66_DATA_OUT_SET_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_64_66_DATA_OUT_SET_REG	/;"	d
GPP_BLINK_EN_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_BLINK_EN_REG(/;"	d
GPP_DATA_IN_POL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_IN_POL_REG(/;"	d
GPP_DATA_IN_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GPP_DATA_IN_REG(/;"	d
GPP_DATA_IN_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_IN_REG(/;"	d
GPP_DATA_OUT_CLEAR_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_OUT_CLEAR_REG	/;"	d
GPP_DATA_OUT_EN_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GPP_DATA_OUT_EN_REG(/;"	d
GPP_DATA_OUT_EN_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_OUT_EN_REG(/;"	d
GPP_DATA_OUT_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GPP_DATA_OUT_REG(/;"	d
GPP_DATA_OUT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_OUT_REG(/;"	d
GPP_DATA_OUT_REG_0	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_OUT_REG_0	/;"	d
GPP_DATA_OUT_SET_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_DATA_OUT_SET_REG	/;"	d
GPP_FUNC_SELECT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_FUNC_SELECT_REG	/;"	d
GPP_INT_CAUSE_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_INT_CAUSE_REG(/;"	d
GPP_INT_LVL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_INT_LVL_REG(/;"	d
GPP_INT_MASK_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_INT_MASK_REG(/;"	d
GPP_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GPP_MASK(/;"	d
GPP_OUT_CLEAR_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_OUT_CLEAR_REG(/;"	d
GPP_OUT_SET_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define GPP_OUT_SET_REG(/;"	d
GPP_REG_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define GPP_REG_NUM(/;"	d
GPR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define GPR(/;"	d
GPR0	include/ppc_defs.h	/^#define	GPR0	/;"	d
GPR1	include/ppc_defs.h	/^#define	GPR1	/;"	d
GPR10	include/ppc_defs.h	/^#define	GPR10	/;"	d
GPR11	include/ppc_defs.h	/^#define	GPR11	/;"	d
GPR12	include/ppc_defs.h	/^#define	GPR12	/;"	d
GPR13	include/ppc_defs.h	/^#define	GPR13	/;"	d
GPR14	include/ppc_defs.h	/^#define	GPR14	/;"	d
GPR15	include/ppc_defs.h	/^#define	GPR15	/;"	d
GPR16	include/ppc_defs.h	/^#define	GPR16	/;"	d
GPR17	include/ppc_defs.h	/^#define	GPR17	/;"	d
GPR18	include/ppc_defs.h	/^#define	GPR18	/;"	d
GPR19	include/ppc_defs.h	/^#define	GPR19	/;"	d
GPR2	include/ppc_defs.h	/^#define	GPR2	/;"	d
GPR20	include/ppc_defs.h	/^#define	GPR20	/;"	d
GPR21	include/ppc_defs.h	/^#define	GPR21	/;"	d
GPR22	include/ppc_defs.h	/^#define	GPR22	/;"	d
GPR23	include/ppc_defs.h	/^#define	GPR23	/;"	d
GPR24	include/ppc_defs.h	/^#define	GPR24	/;"	d
GPR25	include/ppc_defs.h	/^#define	GPR25	/;"	d
GPR26	include/ppc_defs.h	/^#define	GPR26	/;"	d
GPR27	include/ppc_defs.h	/^#define	GPR27	/;"	d
GPR28	include/ppc_defs.h	/^#define	GPR28	/;"	d
GPR29	include/ppc_defs.h	/^#define	GPR29	/;"	d
GPR3	include/ppc_defs.h	/^#define	GPR3	/;"	d
GPR30	include/ppc_defs.h	/^#define	GPR30	/;"	d
GPR31	include/ppc_defs.h	/^#define	GPR31	/;"	d
GPR4	include/ppc_defs.h	/^#define	GPR4	/;"	d
GPR5	include/ppc_defs.h	/^#define	GPR5	/;"	d
GPR6	include/ppc_defs.h	/^#define	GPR6	/;"	d
GPR7	include/ppc_defs.h	/^#define	GPR7	/;"	d
GPR8	include/ppc_defs.h	/^#define	GPR8	/;"	d
GPR9	include/ppc_defs.h	/^#define	GPR9	/;"	d
GPREG	include/sym53c8xx.h	/^#define GPREG	/;"	d
GPREG_0	drivers/mtd/nand/denali.h	/^#define GPREG_0	/;"	d
GPREG_0__VALUE	drivers/mtd/nand/denali.h	/^#define     GPREG_0__VALUE	/;"	d
GPREG_1	drivers/mtd/nand/denali.h	/^#define GPREG_1	/;"	d
GPREG_1__VALUE	drivers/mtd/nand/denali.h	/^#define     GPREG_1__VALUE	/;"	d
GPREG_2	drivers/mtd/nand/denali.h	/^#define GPREG_2	/;"	d
GPREG_2__VALUE	drivers/mtd/nand/denali.h	/^#define     GPREG_2__VALUE	/;"	d
GPREG_3	drivers/mtd/nand/denali.h	/^#define GPREG_3	/;"	d
GPREG_3__VALUE	drivers/mtd/nand/denali.h	/^#define     GPREG_3__VALUE	/;"	d
GPRT_OFF	board/keymile/kmp204x/qrio.c	/^#define GPRT_OFF	/;"	d	file:
GPR_ARG0	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ARG0	/;"	d
GPR_ARG1	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ARG1	/;"	d
GPR_ARG2	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ARG2	/;"	d
GPR_ARG3	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ARG3	/;"	d
GPR_ARG4	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ARG4	/;"	d
GPR_ARG5	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ARG5	/;"	d
GPR_ASM	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ASM	/;"	d
GPR_EP	arch/microblaze/include/asm/ptrace.h	/^#define GPR_EP	/;"	d
GPR_GP	arch/microblaze/include/asm/ptrace.h	/^#define GPR_GP	/;"	d
GPR_LP	arch/microblaze/include/asm/ptrace.h	/^#define GPR_LP	/;"	d
GPR_PHY_PWROFF	drivers/net/dm9000x.h	/^#define GPR_PHY_PWROFF	/;"	d
GPR_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define GPR_RATIO	/;"	d
GPR_RATIO	board/samsung/trats/setup.h	/^#define GPR_RATIO	/;"	d
GPR_RVAL	arch/microblaze/include/asm/ptrace.h	/^#define GPR_RVAL	/;"	d
GPR_RVAL0	arch/microblaze/include/asm/ptrace.h	/^#define GPR_RVAL0	/;"	d
GPR_RVAL1	arch/microblaze/include/asm/ptrace.h	/^#define GPR_RVAL1	/;"	d
GPR_SP	arch/microblaze/include/asm/ptrace.h	/^#define GPR_SP	/;"	d
GPR_ZERO	arch/microblaze/include/asm/ptrace.h	/^#define GPR_ZERO	/;"	d
GPSCORE_PAD_BASE	arch/x86/cpu/baytrail/early_uart.c	/^#define GPSCORE_PAD_BASE	/;"	d	file:
GPSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPSR(/;"	d
GPSR	include/SA-1100.h	/^#define GPSR	/;"	d
GPSR	include/SA-1100.h	/^#define GPSR /;"	d
GPSR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPSR0	/;"	d
GPSR0	arch/sh/include/asm/cpu_sh7734.h	/^#define GPSR0	/;"	d
GPSR0	board/renesas/blanche/blanche.c	/^#define	GPSR0	/;"	d	file:
GPSR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPSR1	/;"	d
GPSR1	arch/sh/include/asm/cpu_sh7734.h	/^#define GPSR1	/;"	d
GPSR1	board/renesas/blanche/blanche.c	/^#define	GPSR1	/;"	d	file:
GPSR10	board/renesas/blanche/blanche.c	/^#define	GPSR10	/;"	d	file:
GPSR11	board/renesas/blanche/blanche.c	/^#define	GPSR11	/;"	d	file:
GPSR1_INIT	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define GPSR1_INIT /;"	d	file:
GPSR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPSR2	/;"	d
GPSR2	arch/sh/include/asm/cpu_sh7734.h	/^#define GPSR2	/;"	d
GPSR2_INIT	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define GPSR2_INIT /;"	d	file:
GPSR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GPSR3	/;"	d
GPSR3	arch/sh/include/asm/cpu_sh7734.h	/^#define GPSR3	/;"	d
GPSR3_INIT	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define GPSR3_INIT /;"	d	file:
GPSR4	arch/sh/include/asm/cpu_sh7734.h	/^#define GPSR4	/;"	d
GPSR4	board/renesas/blanche/blanche.c	/^#define	GPSR4	/;"	d	file:
GPSR4_INIT	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define GPSR4_INIT /;"	d	file:
GPSR5	arch/sh/include/asm/cpu_sh7734.h	/^#define GPSR5	/;"	d
GPSR5	board/renesas/blanche/blanche.c	/^#define	GPSR5	/;"	d	file:
GPSR6	board/renesas/blanche/blanche.c	/^#define	GPSR6	/;"	d	file:
GPSR7	board/renesas/blanche/blanche.c	/^#define	GPSR7	/;"	d	file:
GPSR8	board/renesas/blanche/blanche.c	/^#define	GPSR8	/;"	d	file:
GPSR9	board/renesas/blanche/blanche.c	/^#define	GPSR9	/;"	d	file:
GPS_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_CLK_C_MARK, GPS_CLK_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPS_CLK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_CLK_C_MARK, GPS_CLK_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPS_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
GPS_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPS_MAG_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,$/;"	e	enum:__anona3077f190103	file:
GPS_MAG_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPS_MUX_SEL_GPS	board/freescale/bsc9132qds/bsc9132qds.c	/^#define GPS_MUX_SEL_GPS	/;"	d	file:
GPS_RESET	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define GPS_RESET	/;"	d
GPS_RESET	arch/arm/include/asm/arch/clock_sun4i.h	/^#define GPS_RESET	/;"	d
GPS_SCLK_GATING_OFF	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define GPS_SCLK_GATING_OFF	/;"	d
GPS_SCLK_GATING_OFF	arch/arm/include/asm/arch/clock_sun4i.h	/^#define GPS_SCLK_GATING_OFF	/;"	d
GPS_SIGN_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_SIGN_C_MARK, GPS_SIGN_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPS_SIGN_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_SIGN_C_MARK, GPS_SIGN_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPS_SIGN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
GPS_SIGN_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
GPT0_COMP0	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP0	/;"	d
GPT0_COMP1	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP1	/;"	d
GPT0_COMP2	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP2	/;"	d
GPT0_COMP3	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP3	/;"	d
GPT0_COMP4	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP4	/;"	d
GPT0_COMP5	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP5	/;"	d
GPT0_COMP6	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_COMP6	/;"	d
GPT0_DCIS	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_DCIS	/;"	d
GPT0_DCT0	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_DCT0	/;"	d
GPT0_IE	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_IE	/;"	d
GPT0_IM	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_IM	/;"	d
GPT0_ISC	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_ISC	/;"	d
GPT0_ISS	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_ISS	/;"	d
GPT0_MASK0	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK0	/;"	d
GPT0_MASK1	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK1	/;"	d
GPT0_MASK2	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK2	/;"	d
GPT0_MASK3	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK3	/;"	d
GPT0_MASK4	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK4	/;"	d
GPT0_MASK5	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK5	/;"	d
GPT0_MASK6	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_MASK6	/;"	d
GPT0_TBC	arch/powerpc/include/asm/ppc4xx.h	/^#define GPT0_TBC	/;"	d
GPT1CLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT1CLK_48MHZ	/;"	d
GPT1CLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT1CLK_SYNTH	/;"	d
GPT1_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define GPT1_BASE	/;"	d
GPT1_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define GPT1_BASE	/;"	d
GPT1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define GPT1_BASE_ADDR /;"	d
GPT1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define GPT1_BASE_ADDR	/;"	d
GPT1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPT1_BASE_ADDR /;"	d
GPT1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPT1_BASE_ADDR /;"	d
GPT1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	GPT1_CLK_ROOT = 114,$/;"	e	enum:clk_root_index
GPT1_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
GPT1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
GPT1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
GPT1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
GPT1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
GPT1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
GPT1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
GPT1_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT1_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
GPT1_FREEZE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT1_FREEZE	/;"	d
GPT2CLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT2CLK_48MHZ	/;"	d
GPT2CLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT2CLK_SYNTH	/;"	d
GPT2_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define GPT2_BASE	/;"	d
GPT2_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define GPT2_BASE	/;"	d
GPT2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	GPT2_CLK_ROOT = 115,$/;"	e	enum:clk_root_index
GPT2_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
GPT2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
GPT2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
GPT2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
GPT2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
GPT2_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
GPT2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
GPT2_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT2_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
GPT2_FREEZE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT2_FREEZE	/;"	d
GPT2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPT2_IPS_BASE_ADDR /;"	d
GPT3CLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT3CLK_48MHZ	/;"	d
GPT3CLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT3CLK_SYNTH	/;"	d
GPT3_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define GPT3_BASE	/;"	d
GPT3_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define GPT3_BASE	/;"	d
GPT3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	GPT3_CLK_ROOT = 116,$/;"	e	enum:clk_root_index
GPT3_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
GPT3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
GPT3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
GPT3_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
GPT3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
GPT3_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
GPT3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
GPT3_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT3_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
GPT3_FREEZE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT3_FREEZE	/;"	d
GPT3_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPT3_IPS_BASE_ADDR /;"	d
GPT4CLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT4CLK_48MHZ	/;"	d
GPT4CLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT4CLK_SYNTH	/;"	d
GPT4_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	GPT4_CLK_ROOT = 117,$/;"	e	enum:clk_root_index
GPT4_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
GPT4_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
GPT4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
GPT4_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
GPT4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
GPT4_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
GPT4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
GPT4_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define GPT4_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
GPT4_FREEZE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT4_FREEZE	/;"	d
GPT4_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPT4_IPS_BASE_ADDR /;"	d
GPT5CLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT5CLK_48MHZ	/;"	d
GPT5CLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT5CLK_SYNTH	/;"	d
GPT5_FREEZE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  GPT5_FREEZE	/;"	d
GPTCNT	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTCNT	/;"	d	file:
GPTCR	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTCR	/;"	d	file:
GPTCR_24MEN	arch/arm/imx-common/timer.c	/^#define GPTCR_24MEN	/;"	d	file:
GPTCR_CLKSOURCE_32	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTCR_CLKSOURCE_32	/;"	d	file:
GPTCR_CLKSOURCE_32	arch/arm/cpu/arm1136/mx35/timer.c	/^#define GPTCR_CLKSOURCE_32 /;"	d	file:
GPTCR_CLKSOURCE_32	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define GPTCR_CLKSOURCE_32	/;"	d	file:
GPTCR_CLKSOURCE_32	arch/arm/imx-common/timer.c	/^#define GPTCR_CLKSOURCE_32	/;"	d	file:
GPTCR_CLKSOURCE_MASK	arch/arm/imx-common/timer.c	/^#define GPTCR_CLKSOURCE_MASK /;"	d	file:
GPTCR_CLKSOURCE_OSC	arch/arm/imx-common/timer.c	/^#define GPTCR_CLKSOURCE_OSC	/;"	d	file:
GPTCR_CLKSOURCE_PRE	arch/arm/imx-common/timer.c	/^#define GPTCR_CLKSOURCE_PRE	/;"	d	file:
GPTCR_FRR	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTCR_FRR	/;"	d	file:
GPTCR_FRR	arch/arm/cpu/arm1136/mx35/timer.c	/^#define GPTCR_FRR /;"	d	file:
GPTCR_FRR	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define GPTCR_FRR	/;"	d	file:
GPTCR_FRR	arch/arm/imx-common/timer.c	/^#define GPTCR_FRR	/;"	d	file:
GPTCR_SWR	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTCR_SWR	/;"	d	file:
GPTCR_SWR	arch/arm/cpu/arm1136/mx35/timer.c	/^#define GPTCR_SWR /;"	d	file:
GPTCR_SWR	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define GPTCR_SWR	/;"	d	file:
GPTCR_SWR	arch/arm/imx-common/timer.c	/^#define GPTCR_SWR	/;"	d	file:
GPTCR_TEN	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTCR_TEN	/;"	d	file:
GPTCR_TEN	arch/arm/cpu/arm1136/mx35/timer.c	/^#define GPTCR_TEN /;"	d	file:
GPTCR_TEN	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define GPTCR_TEN	/;"	d	file:
GPTCR_TEN	arch/arm/imx-common/timer.c	/^#define GPTCR_TEN	/;"	d	file:
GPTIMER1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GPTIMER1_BASE_ADDR /;"	d
GPTIMER1_CLKCTRL_CLKSEL_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define GPTIMER1_CLKCTRL_CLKSEL_MASK	/;"	d
GPTIMER1_CLKCTRL_CLKSEL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define GPTIMER1_CLKCTRL_CLKSEL_MASK	/;"	d
GPTIMER2_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define GPTIMER2_BASE_ADDR /;"	d
GPTIMER_CTRL_CH	include/grlib/gptimer.h	/^#define GPTIMER_CTRL_CH	/;"	d
GPTIMER_CTRL_EN	include/grlib/gptimer.h	/^#define GPTIMER_CTRL_EN	/;"	d
GPTIMER_CTRL_IE	include/grlib/gptimer.h	/^#define GPTIMER_CTRL_IE	/;"	d
GPTIMER_CTRL_IP	include/grlib/gptimer.h	/^#define GPTIMER_CTRL_IP	/;"	d
GPTIMER_CTRL_LD	include/grlib/gptimer.h	/^#define GPTIMER_CTRL_LD	/;"	d
GPTIMER_CTRL_RS	include/grlib/gptimer.h	/^#define GPTIMER_CTRL_RS	/;"	d
GPTPR	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTPR	/;"	d	file:
GPTPR_PRESCALER24M_MASK	arch/arm/imx-common/timer.c	/^#define GPTPR_PRESCALER24M_MASK /;"	d	file:
GPTPR_PRESCALER24M_SHIFT	arch/arm/imx-common/timer.c	/^#define GPTPR_PRESCALER24M_SHIFT /;"	d	file:
GPTSR	arch/arm/cpu/arm1136/mx31/timer.c	/^#define GPTSR	/;"	d	file:
GPT_CAPT_MODE_BOTH	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_CAPT_MODE_BOTH	/;"	d
GPT_CAPT_MODE_FE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_CAPT_MODE_FE	/;"	d
GPT_CAPT_MODE_MASK	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_CAPT_MODE_MASK	/;"	d
GPT_CAPT_MODE_NONE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_CAPT_MODE_NONE	/;"	d
GPT_CAPT_MODE_RE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_CAPT_MODE_RE	/;"	d
GPT_CFG	drivers/net/smc911x.h	/^#define GPT_CFG	/;"	d
GPT_CFG_GPT_LOAD	drivers/net/smc911x.h	/^#define	GPT_CFG_GPT_LOAD	/;"	d
GPT_CFG_TIMER_EN	drivers/net/smc911x.h	/^#define	GPT_CFG_TIMER_EN	/;"	d
GPT_CNT	drivers/net/smc911x.h	/^#define GPT_CNT	/;"	d
GPT_CNT_GPT_CNT	drivers/net/smc911x.h	/^#define	GPT_CNT_GPT_CNT	/;"	d
GPT_CR1_CEN	arch/arm/include/asm/arch-stm32f7/gpt.h	/^#define GPT_CR1_CEN	/;"	d
GPT_CR1_CEN	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define GPT_CR1_CEN	/;"	d
GPT_CTRL_CE	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_CTRL_CE	/;"	d
GPT_CTRL_CLKSOURCE_32	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPT_CTRL_CLKSOURCE_32	/;"	d
GPT_CTRL_FRR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPT_CTRL_FRR	/;"	d
GPT_CTRL_INTEN	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_CTRL_INTEN	/;"	d
GPT_CTRL_ODRAIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_CTRL_ODRAIN	/;"	d
GPT_CTRL_STPCNT	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_CTRL_STPCNT	/;"	d
GPT_CTRL_SWR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPT_CTRL_SWR	/;"	d
GPT_CTRL_TEN	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define GPT_CTRL_TEN	/;"	d
GPT_CTRL_WDEN	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_CTRL_WDEN	/;"	d
GPT_EN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define GPT_EN	/;"	d
GPT_EN	arch/arm/include/asm/arch-omap4/cpu.h	/^#define GPT_EN	/;"	d
GPT_EN	arch/arm/include/asm/arch-omap5/cpu.h	/^#define GPT_EN	/;"	d
GPT_ENABLE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_ENABLE	/;"	d
GPT_ENTRY_NUMBERS	include/part_efi.h	/^#define GPT_ENTRY_NUMBERS	/;"	d
GPT_ENTRY_SIZE	include/part_efi.h	/^#define GPT_ENTRY_SIZE	/;"	d
GPT_FREE_RUNNING	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_FREE_RUNNING	/;"	d
GPT_FREE_RUNNING	arch/arm/include/asm/arch-stm32f7/gpt.h	/^#define GPT_FREE_RUNNING	/;"	d
GPT_FREE_RUNNING	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define GPT_FREE_RUNNING	/;"	d
GPT_GPIO_IN	board/ifm/o2dnt2/o2dnt2.c	/^#define GPT_GPIO_IN	/;"	d	file:
GPT_GPIO_ON	board/intercontrol/digsy_mtc/digsy_mtc.c	/^#define GPT_GPIO_ON	/;"	d	file:
GPT_HEADER_REVISION_V1	include/part_efi.h	/^#define GPT_HEADER_REVISION_V1 /;"	d
GPT_HEADER_SIGNATURE	include/part_efi.h	/^#define GPT_HEADER_SIGNATURE /;"	d
GPT_ICT	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_ICT(/;"	d
GPT_INT_CAPT	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_INT_CAPT	/;"	d
GPT_INT_COMP	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_INT_COMP	/;"	d
GPT_INT_FE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_INT_FE	/;"	d
GPT_INT_MATCH	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_INT_MATCH	/;"	d
GPT_INT_PWMP	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_INT_PWMP	/;"	d
GPT_INT_RE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_INT_RE	/;"	d
GPT_INT_TEXP	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_INT_TEXP	/;"	d
GPT_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPT_IPS_BASE_ADDR /;"	d
GPT_MODE_AUTO_RELOAD	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_MODE_AUTO_RELOAD	/;"	d
GPT_MODE_AUTO_RELOAD	arch/arm/include/asm/arch-stm32f7/gpt.h	/^#define GPT_MODE_AUTO_RELOAD	/;"	d
GPT_MODE_AUTO_RELOAD	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define GPT_MODE_AUTO_RELOAD	/;"	d
GPT_MODE_GPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_MODE_GPIO(/;"	d
GPT_MODE_SINGLE_SHOT	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_MODE_SINGLE_SHOT	/;"	d
GPT_OCT	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_OCT(/;"	d
GPT_OVFPIN_OVF	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_OVFPIN_OVF(/;"	d
GPT_OVFPIN_PIN	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_OVFPIN_PIN	/;"	d
GPT_PRESCALER_1	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_1	/;"	d
GPT_PRESCALER_128	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_128	/;"	d
GPT_PRESCALER_128	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define GPT_PRESCALER_128	/;"	d
GPT_PRESCALER_16	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_16	/;"	d
GPT_PRESCALER_2	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_2 /;"	d
GPT_PRESCALER_256	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_256	/;"	d
GPT_PRESCALER_32	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_32	/;"	d
GPT_PRESCALER_4	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_4 /;"	d
GPT_PRESCALER_64	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_64	/;"	d
GPT_PRESCALER_8	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_8 /;"	d
GPT_PRESCALER_MASK	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_PRESCALER_MASK	/;"	d
GPT_PRIMARY_PARTITION_TABLE_LBA	include/part_efi.h	/^#define GPT_PRIMARY_PARTITION_TABLE_LBA /;"	d
GPT_PWM_WIDTH	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_PWM_WIDTH(/;"	d
GPT_RESOLUTION	arch/arm/cpu/arm926ejs/spear/timer.c	/^#define GPT_RESOLUTION	/;"	d	file:
GPT_RESOLUTION	arch/arm/cpu/armv7/stv0991/timer.c	/^#define GPT_RESOLUTION	/;"	d	file:
GPT_RESOLUTION	arch/arm/mach-stm32/stm32f7/timer.c	/^#define GPT_RESOLUTION	/;"	d	file:
GPT_STA_CAPTURE	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_STA_CAPTURE(/;"	d
GPT_STS_FE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_STS_FE	/;"	d
GPT_STS_MATCH	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_STS_MATCH	/;"	d
GPT_STS_RE	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define GPT_STS_RE	/;"	d
GPT_TMS_ICT	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_TMS_ICT	/;"	d
GPT_TMS_OCT	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_TMS_OCT	/;"	d
GPT_TMS_PWM	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_TMS_PWM	/;"	d
GPT_TMS_SGPIO	arch/m68k/include/asm/m547x_8x.h	/^#define GPT_TMS_SGPIO	/;"	d
GPU_2D_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPU_2D_ARB_BASE_ADDR /;"	d
GPU_2D_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPU_2D_ARB_END_ADDR /;"	d
GPU_3D_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPU_3D_ARB_BASE_ADDR /;"	d
GPU_3D_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPU_3D_ARB_END_ADDR /;"	d
GPU_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPU_ARB_BASE_ADDR /;"	d
GPU_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPU_ARB_END_ADDR /;"	d
GPV0_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV0_BASE_ADDR /;"	d
GPV0_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV0_BASE_ADDR /;"	d
GPV1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV1_BASE_ADDR /;"	d
GPV1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV1_BASE_ADDR /;"	d
GPV2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV2_BASE_ADDR	/;"	d
GPV2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV2_BASE_ADDR /;"	d
GPV2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV2_BASE_ADDR /;"	d
GPV3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV3_BASE_ADDR	/;"	d
GPV3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV3_BASE_ADDR /;"	d
GPV4_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV4_BASE_ADDR	/;"	d
GPV4_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV4_BASE_ADDR /;"	d
GPV5_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV5_BASE_ADDR	/;"	d
GPV5_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV5_BASE_ADDR /;"	d
GPV6_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define GPV6_BASE_ADDR	/;"	d
GPV6_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV6_BASE_ADDR /;"	d
GPV7_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define GPV7_BASE_ADDR /;"	d
GPWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define GPWE	/;"	d
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GP_ALL(DATA),$/;"	e	enum:__anona3077f190103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GP_ALL(FN),$/;"	e	enum:__anona3077f190103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GP_ALL(IN),$/;"	e	enum:__anona3077f190103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GP_ALL(OUT),$/;"	e	enum:__anona3077f190103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define GP_ALL(/;"	d
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	GP_ALL(DATA),$/;"	e	enum:__anona307835a0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	GP_ALL(FN),$/;"	e	enum:__anona307835a0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	GP_ALL(IN),$/;"	e	enum:__anona307835a0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	GP_ALL(OUT),$/;"	e	enum:__anona307835a0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	GP_ALL(DATA),$/;"	e	enum:__anona307879b0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	GP_ALL(FN),$/;"	e	enum:__anona307879b0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	GP_ALL(IN),$/;"	e	enum:__anona307879b0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	GP_ALL(OUT),$/;"	e	enum:__anona307879b0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GP_ALL(DATA),$/;"	e	enum:__anona3078bdc0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GP_ALL(FN),$/;"	e	enum:__anona3078bdc0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GP_ALL(IN),$/;"	e	enum:__anona3078bdc0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GP_ALL(OUT),$/;"	e	enum:__anona3078bdc0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define GP_ALL(/;"	d	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	GP_ALL(DATA),$/;"	e	enum:__anona307901d0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	GP_ALL(FN),$/;"	e	enum:__anona307901d0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	GP_ALL(IN),$/;"	e	enum:__anona307901d0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	GP_ALL(OUT),$/;"	e	enum:__anona307901d0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define GP_ALL(/;"	d	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GP_ALL(DATA),$/;"	e	enum:__anona307945e0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GP_ALL(FN),$/;"	e	enum:__anona307945e0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GP_ALL(IN),$/;"	e	enum:__anona307945e0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	GP_ALL(OUT),$/;"	e	enum:__anona307945e0103	file:
GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define GP_ALL(/;"	d	file:
GP_DEVICE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define GP_DEVICE	/;"	d
GP_DEVICE	arch/arm/include/asm/omap_common.h	/^#define GP_DEVICE /;"	d
GP_HIDREV	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define GP_HIDREV	/;"	d
GP_INDT	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define GP_INDT(/;"	d
GP_INDT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define GP_INDT(/;"	d	file:
GP_INDT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define GP_INDT(/;"	d	file:
GP_INDT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define GP_INDT(/;"	d	file:
GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define GP_INOUTSEL(/;"	d
GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define GP_INOUTSEL(/;"	d	file:
GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define GP_INOUTSEL(/;"	d	file:
GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define GP_INOUTSEL(/;"	d	file:
GP_IO_SEL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_IO_SEL	/;"	d
GP_IO_SEL2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_IO_SEL2	/;"	d
GP_IO_SEL3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_IO_SEL3	/;"	d
GP_LVL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_LVL	/;"	d
GP_LVL2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_LVL2	/;"	d
GP_LVL3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_LVL3	/;"	d
GP_MSATA_SEL	board/gateworks/gw_ventana/common.h	/^#define GP_MSATA_SEL	/;"	d
GP_MST_CFG_DEFAULT	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GP_MST_CFG_DEFAULT /;"	d
GP_MST_CFG_DEFAULT	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GP_MST_CFG_DEFAULT /;"	d
GP_OUT0	arch/arm/include/asm/arch-omap3/dss.h	/^#define GP_OUT0	/;"	d
GP_OUT1	arch/arm/include/asm/arch-omap3/dss.h	/^#define GP_OUT1	/;"	d
GP_PHY_RST	board/gateworks/gw_ventana/common.h	/^#define GP_PHY_RST	/;"	d
GP_REG	drivers/net/smc91111.h	/^#define	GP_REG	/;"	d
GP_RS232_EN	board/gateworks/gw_ventana/common.h	/^#define GP_RS232_EN	/;"	d
GP_RST_SEL1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_RST_SEL1	/;"	d
GP_RST_SEL2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_RST_SEL2	/;"	d
GP_RST_SEL3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define GP_RST_SEL3	/;"	d
GP_SD3_CD	board/gateworks/gw_ventana/common.h	/^#define GP_SD3_CD	/;"	d
GP_SD3_VSELECT	board/gateworks/gw_ventana/common.h	/^#define GP_SD3_VSELECT	/;"	d
GP_USB_OTG_PWR	board/boundary/nitrogen6x/nitrogen6x.c	/^#define GP_USB_OTG_PWR	/;"	d	file:
GP_USB_OTG_PWR	board/gateworks/gw_ventana/common.h	/^#define GP_USB_OTG_PWR	/;"	d
GRACEFUL_STOP_ACKNOWLEDGE_RX	drivers/qe/uec.h	/^#define GRACEFUL_STOP_ACKNOWLEDGE_RX /;"	d
GRA_C	drivers/bios_emulator/include/biosemu.h	/^#define GRA_C /;"	d
GREEN	board/bf533-stamp/video.h	/^#define GREEN /;"	d
GREEN	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
GREEN_LED	board/Seagate/dockstar/dockstar.c	/^#define GREEN_LED	/;"	d	file:
GREEN_LED	board/Seagate/goflexhome/goflexhome.c	/^#define GREEN_LED	/;"	d	file:
GREEN_LED	board/atmel/at91rm9200ek/led.c	/^#define	GREEN_LED	/;"	d	file:
GREEN_LED_DEV	include/configs/cm_t35.h	/^#define GREEN_LED_DEV	/;"	d
GREEN_LED_DEV	include/configs/cm_t3517.h	/^#define GREEN_LED_DEV	/;"	d
GREEN_LED_GPIO	include/configs/cm_t35.h	/^#define GREEN_LED_GPIO	/;"	d
GREEN_LED_GPIO	include/configs/cm_t3517.h	/^#define GREEN_LED_GPIO	/;"	d
GRER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GRER(/;"	d
GRER	include/SA-1100.h	/^#define GRER	/;"	d
GRER	include/SA-1100.h	/^#define GRER /;"	d
GRER0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GRER0	/;"	d
GRER1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GRER1	/;"	d
GRER2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GRER2	/;"	d
GRER3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GRER3	/;"	d
GRETH_BD_EN	drivers/net/greth.h	/^#define GRETH_BD_EN /;"	d
GRETH_BD_EN	include/grlib/greth.h	/^#define GRETH_BD_EN /;"	d
GRETH_BD_IE	drivers/net/greth.h	/^#define GRETH_BD_IE /;"	d
GRETH_BD_IE	include/grlib/greth.h	/^#define GRETH_BD_IE /;"	d
GRETH_BD_LEN	drivers/net/greth.h	/^#define GRETH_BD_LEN /;"	d
GRETH_BD_LEN	include/grlib/greth.h	/^#define GRETH_BD_LEN /;"	d
GRETH_BD_WR	drivers/net/greth.h	/^#define GRETH_BD_WR /;"	d
GRETH_BD_WR	include/grlib/greth.h	/^#define GRETH_BD_WR /;"	d
GRETH_BUF_ALIGN	drivers/net/greth.c	/^#define GRETH_BUF_ALIGN /;"	d	file:
GRETH_FD	drivers/net/greth.h	/^#define GRETH_FD /;"	d
GRETH_FD	include/grlib/greth.h	/^#define GRETH_FD /;"	d
GRETH_INT_RX	drivers/net/greth.h	/^#define GRETH_INT_RX /;"	d
GRETH_INT_RX	include/grlib/greth.h	/^#define GRETH_INT_RX /;"	d
GRETH_INT_TX	drivers/net/greth.h	/^#define GRETH_INT_TX /;"	d
GRETH_INT_TX	include/grlib/greth.h	/^#define GRETH_INT_TX /;"	d
GRETH_MII_100T4	drivers/net/greth.h	/^#define GRETH_MII_100T4 /;"	d
GRETH_MII_100T4	include/grlib/greth.h	/^#define GRETH_MII_100T4 /;"	d
GRETH_MII_100TXFD	drivers/net/greth.h	/^#define GRETH_MII_100TXFD /;"	d
GRETH_MII_100TXFD	include/grlib/greth.h	/^#define GRETH_MII_100TXFD /;"	d
GRETH_MII_100TXHD	drivers/net/greth.h	/^#define GRETH_MII_100TXHD /;"	d
GRETH_MII_100TXHD	include/grlib/greth.h	/^#define GRETH_MII_100TXHD /;"	d
GRETH_MII_10FD	drivers/net/greth.h	/^#define GRETH_MII_10FD /;"	d
GRETH_MII_10FD	include/grlib/greth.h	/^#define GRETH_MII_10FD /;"	d
GRETH_MII_10HD	drivers/net/greth.h	/^#define GRETH_MII_10HD /;"	d
GRETH_MII_10HD	include/grlib/greth.h	/^#define GRETH_MII_10HD /;"	d
GRETH_MII_BUSY	drivers/net/greth.h	/^#define GRETH_MII_BUSY /;"	d
GRETH_MII_BUSY	include/grlib/greth.h	/^#define GRETH_MII_BUSY /;"	d
GRETH_MII_EXTADV_1000FD	drivers/net/greth.h	/^#define GRETH_MII_EXTADV_1000FD /;"	d
GRETH_MII_EXTADV_1000FD	include/grlib/greth.h	/^#define GRETH_MII_EXTADV_1000FD /;"	d
GRETH_MII_EXTADV_1000HD	drivers/net/greth.h	/^#define GRETH_MII_EXTADV_1000HD /;"	d
GRETH_MII_EXTADV_1000HD	include/grlib/greth.h	/^#define GRETH_MII_EXTADV_1000HD /;"	d
GRETH_MII_EXTPRT_1000FD	drivers/net/greth.h	/^#define GRETH_MII_EXTPRT_1000FD /;"	d
GRETH_MII_EXTPRT_1000FD	include/grlib/greth.h	/^#define GRETH_MII_EXTPRT_1000FD /;"	d
GRETH_MII_EXTPRT_1000HD	drivers/net/greth.h	/^#define GRETH_MII_EXTPRT_1000HD /;"	d
GRETH_MII_EXTPRT_1000HD	include/grlib/greth.h	/^#define GRETH_MII_EXTPRT_1000HD /;"	d
GRETH_MII_NVALID	drivers/net/greth.h	/^#define GRETH_MII_NVALID /;"	d
GRETH_MII_NVALID	include/grlib/greth.h	/^#define GRETH_MII_NVALID /;"	d
GRETH_PHY_ADR_DEFAULT	drivers/net/greth.c	/^#define GRETH_PHY_ADR_DEFAULT /;"	d	file:
GRETH_PHY_TIMEOUT_MS	drivers/net/greth.c	/^#define GRETH_PHY_TIMEOUT_MS /;"	d	file:
GRETH_REGANDIN	drivers/net/greth.c	/^#define GRETH_REGANDIN(/;"	d	file:
GRETH_REGLOAD	drivers/net/greth.c	/^#define GRETH_REGLOAD(/;"	d	file:
GRETH_REGORIN	drivers/net/greth.c	/^#define GRETH_REGORIN(/;"	d	file:
GRETH_REGSAVE	drivers/net/greth.c	/^#define GRETH_REGSAVE(/;"	d	file:
GRETH_RESET	drivers/net/greth.h	/^#define GRETH_RESET /;"	d
GRETH_RESET	include/grlib/greth.h	/^#define GRETH_RESET /;"	d
GRETH_RXBD_CNT	drivers/net/greth.c	/^#define GRETH_RXBD_CNT /;"	d	file:
GRETH_RXBD_ERR_AE	drivers/net/greth.h	/^#define GRETH_RXBD_ERR_AE /;"	d
GRETH_RXBD_ERR_AE	include/grlib/greth.h	/^#define GRETH_RXBD_ERR_AE /;"	d
GRETH_RXBD_ERR_CRC	drivers/net/greth.h	/^#define GRETH_RXBD_ERR_CRC /;"	d
GRETH_RXBD_ERR_CRC	include/grlib/greth.h	/^#define GRETH_RXBD_ERR_CRC /;"	d
GRETH_RXBD_ERR_FT	drivers/net/greth.h	/^#define GRETH_RXBD_ERR_FT /;"	d
GRETH_RXBD_ERR_FT	include/grlib/greth.h	/^#define GRETH_RXBD_ERR_FT /;"	d
GRETH_RXBD_ERR_LE	drivers/net/greth.h	/^#define GRETH_RXBD_ERR_LE /;"	d
GRETH_RXBD_ERR_LE	include/grlib/greth.h	/^#define GRETH_RXBD_ERR_LE /;"	d
GRETH_RXBD_ERR_OE	drivers/net/greth.h	/^#define GRETH_RXBD_ERR_OE /;"	d
GRETH_RXBD_ERR_OE	include/grlib/greth.h	/^#define GRETH_RXBD_ERR_OE /;"	d
GRETH_RXBD_IP_CSERR	drivers/net/greth.h	/^#define GRETH_RXBD_IP_CSERR /;"	d
GRETH_RXBD_IP_CSERR	include/grlib/greth.h	/^#define GRETH_RXBD_IP_CSERR /;"	d
GRETH_RXBD_IP_DEC	drivers/net/greth.h	/^#define GRETH_RXBD_IP_DEC /;"	d
GRETH_RXBD_IP_DEC	include/grlib/greth.h	/^#define GRETH_RXBD_IP_DEC /;"	d
GRETH_RXBD_NUM	drivers/net/greth.h	/^#define GRETH_RXBD_NUM /;"	d
GRETH_RXBD_NUM	include/grlib/greth.h	/^#define GRETH_RXBD_NUM /;"	d
GRETH_RXBD_NUM_MASK	drivers/net/greth.h	/^#define GRETH_RXBD_NUM_MASK /;"	d
GRETH_RXBD_NUM_MASK	include/grlib/greth.h	/^#define GRETH_RXBD_NUM_MASK /;"	d
GRETH_RXBD_STATUS	drivers/net/greth.h	/^#define GRETH_RXBD_STATUS /;"	d
GRETH_RXBD_STATUS	include/grlib/greth.h	/^#define GRETH_RXBD_STATUS /;"	d
GRETH_RXBD_TCP_CSERR	drivers/net/greth.h	/^#define GRETH_RXBD_TCP_CSERR /;"	d
GRETH_RXBD_TCP_CSERR	include/grlib/greth.h	/^#define GRETH_RXBD_TCP_CSERR /;"	d
GRETH_RXBD_TCP_DEC	drivers/net/greth.h	/^#define GRETH_RXBD_TCP_DEC /;"	d
GRETH_RXBD_TCP_DEC	include/grlib/greth.h	/^#define GRETH_RXBD_TCP_DEC /;"	d
GRETH_RXBD_UDP_CSERR	drivers/net/greth.h	/^#define GRETH_RXBD_UDP_CSERR /;"	d
GRETH_RXBD_UDP_CSERR	include/grlib/greth.h	/^#define GRETH_RXBD_UDP_CSERR /;"	d
GRETH_RXBD_UDP_DEC	drivers/net/greth.h	/^#define GRETH_RXBD_UDP_DEC /;"	d
GRETH_RXBD_UDP_DEC	include/grlib/greth.h	/^#define GRETH_RXBD_UDP_DEC /;"	d
GRETH_RXBUF_EFF_SIZE	drivers/net/greth.c	/^#define GRETH_RXBUF_EFF_SIZE /;"	d	file:
GRETH_RXBUF_SIZE	drivers/net/greth.c	/^#define GRETH_RXBUF_SIZE /;"	d	file:
GRETH_RXEN	drivers/net/greth.h	/^#define GRETH_RXEN /;"	d
GRETH_RXEN	include/grlib/greth.h	/^#define GRETH_RXEN /;"	d
GRETH_RXI	drivers/net/greth.h	/^#define GRETH_RXI /;"	d
GRETH_RXI	include/grlib/greth.h	/^#define GRETH_RXI /;"	d
GRETH_RX_BUF_SIZE	drivers/net/greth.h	/^#define GRETH_RX_BUF_SIZE /;"	d
GRETH_RX_BUF_SIZE	include/grlib/greth.h	/^#define GRETH_RX_BUF_SIZE /;"	d
GRETH_TXBD_CNT	drivers/net/greth.c	/^#define GRETH_TXBD_CNT /;"	d	file:
GRETH_TXBD_ERR_AL	drivers/net/greth.h	/^#define GRETH_TXBD_ERR_AL /;"	d
GRETH_TXBD_ERR_AL	include/grlib/greth.h	/^#define GRETH_TXBD_ERR_AL /;"	d
GRETH_TXBD_ERR_LC	drivers/net/greth.h	/^#define GRETH_TXBD_ERR_LC /;"	d
GRETH_TXBD_ERR_LC	include/grlib/greth.h	/^#define GRETH_TXBD_ERR_LC /;"	d
GRETH_TXBD_ERR_UE	drivers/net/greth.h	/^#define GRETH_TXBD_ERR_UE /;"	d
GRETH_TXBD_ERR_UE	include/grlib/greth.h	/^#define GRETH_TXBD_ERR_UE /;"	d
GRETH_TXBD_IPCS	drivers/net/greth.h	/^#define GRETH_TXBD_IPCS /;"	d
GRETH_TXBD_IPCS	include/grlib/greth.h	/^#define GRETH_TXBD_IPCS /;"	d
GRETH_TXBD_MORE	drivers/net/greth.h	/^#define GRETH_TXBD_MORE /;"	d
GRETH_TXBD_MORE	include/grlib/greth.h	/^#define GRETH_TXBD_MORE /;"	d
GRETH_TXBD_NUM	drivers/net/greth.h	/^#define GRETH_TXBD_NUM /;"	d
GRETH_TXBD_NUM	include/grlib/greth.h	/^#define GRETH_TXBD_NUM /;"	d
GRETH_TXBD_NUM_MASK	drivers/net/greth.h	/^#define GRETH_TXBD_NUM_MASK /;"	d
GRETH_TXBD_NUM_MASK	include/grlib/greth.h	/^#define GRETH_TXBD_NUM_MASK /;"	d
GRETH_TXBD_STATUS	drivers/net/greth.h	/^#define GRETH_TXBD_STATUS /;"	d
GRETH_TXBD_STATUS	include/grlib/greth.h	/^#define GRETH_TXBD_STATUS /;"	d
GRETH_TXBD_TCPCS	drivers/net/greth.h	/^#define GRETH_TXBD_TCPCS /;"	d
GRETH_TXBD_TCPCS	include/grlib/greth.h	/^#define GRETH_TXBD_TCPCS /;"	d
GRETH_TXBD_UDPCS	drivers/net/greth.h	/^#define GRETH_TXBD_UDPCS /;"	d
GRETH_TXBD_UDPCS	include/grlib/greth.h	/^#define GRETH_TXBD_UDPCS /;"	d
GRETH_TXEN	drivers/net/greth.h	/^#define GRETH_TXEN /;"	d
GRETH_TXEN	include/grlib/greth.h	/^#define GRETH_TXEN /;"	d
GRETH_TXI	drivers/net/greth.h	/^#define GRETH_TXI /;"	d
GRETH_TXI	include/grlib/greth.h	/^#define GRETH_TXI /;"	d
GRETH_TX_BUF_SIZE	drivers/net/greth.h	/^#define GRETH_TX_BUF_SIZE /;"	d
GRETH_TX_BUF_SIZE	include/grlib/greth.h	/^#define GRETH_TX_BUF_SIZE /;"	d
GRF_BASE	arch/arm/mach-rockchip/rk3036-board-spl.c	/^#define GRF_BASE	/;"	d	file:
GRF_BASE	arch/arm/mach-rockchip/rk3036-board.c	/^#define GRF_BASE	/;"	d	file:
GRF_BASE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define GRF_BASE	/;"	d	file:
GRF_BASE	arch/arm/mach-rockchip/rk3288-board-spl.c	/^#define GRF_BASE	/;"	d	file:
GRF_CORE_IDLE_REQ_MODE_SEL0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_CORE_IDLE_REQ_MODE_SEL0_MASK = 1,$/;"	e	enum:__anonbeb2b9771103
GRF_CORE_IDLE_REQ_MODE_SEL0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_CORE_IDLE_REQ_MODE_SEL0_SHIFT = 0xa,$/;"	e	enum:__anonbeb2b9771103
GRF_CORE_IDLE_REQ_MODE_SEL1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_CORE_IDLE_REQ_MODE_SEL1_MASK = 1,$/;"	e	enum:__anonbeb2b9771103
GRF_CORE_IDLE_REQ_MODE_SEL1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_CORE_IDLE_REQ_MODE_SEL1_SHIFT = 0xb,$/;"	e	enum:__anonbeb2b9771103
GRF_EMMCCORE_CON11	arch/arm/mach-rockchip/rk3399/rk3399.c	/^#define GRF_EMMCCORE_CON11 /;"	d	file:
GRF_FORCE_JTAG_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_FORCE_JTAG_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
GRF_FORCE_JTAG_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_FORCE_JTAG_SHIFT	= 0xc,$/;"	e	enum:__anonbeb2b9771103
GRF_GPIO2B1_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B1_SEL_MASK	= 3 << GRF_GPIO2B1_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B1_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B1_SEL_SHIFT	= 0,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B2_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B2_SEL_MASK	= 3 << GRF_GPIO2B2_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B2_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B2_SEL_SHIFT	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B3_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B3_SEL_MASK	= 3 << GRF_GPIO2B3_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B3_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B3_SEL_SHIFT	= 6,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B4_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B4_SEL_MASK	= 3 << GRF_GPIO2B4_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO2B4_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO2B4_SEL_SHIFT	= 8,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A4_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A4_SEL_MASK	= 3 << GRF_GPIO3A4_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A4_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A4_SEL_SHIFT	= 8,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A5_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A5_SEL_MASK	= 3 << GRF_GPIO3A5_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A5_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A5_SEL_SHIFT	= 10,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A6_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A6_SEL_MASK	= 3 << GRF_GPIO3A6_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A6_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A6_SEL_SHIFT	= 12,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A7_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A7_SEL_MASK	= 3 << GRF_GPIO3A7_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3A7_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3A7_SEL_SHIFT	= 14,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3B0_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3B0_SEL_MASK	= 3 << GRF_GPIO3B0_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO3B0_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO3B0_SEL_SHIFT	= 0,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B0_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B0_SEL_MASK	= 3 << GRF_GPIO4B0_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B0_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B0_SEL_SHIFT	= 0,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B1_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B1_SEL_MASK	= 3 << GRF_GPIO4B1_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B1_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B1_SEL_SHIFT	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B2_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B2_SEL_MASK	= 3 << GRF_GPIO4B2_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B2_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B2_SEL_SHIFT	= 4,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B3_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B3_SEL_MASK	= 3 << GRF_GPIO4B3_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B3_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B3_SEL_SHIFT	= 6,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B4_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B4_SEL_MASK	= 3 << GRF_GPIO4B4_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B4_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B4_SEL_SHIFT	= 8,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B5_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B5_SEL_MASK	= 3 << GRF_GPIO4B5_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4B5_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4B5_SEL_SHIFT	= 10,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C2_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C2_SEL_MASK	= 3 << GRF_GPIO4C2_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C2_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C2_SEL_SHIFT	= 4,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C3_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C3_SEL_MASK	= 3 << GRF_GPIO4C3_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C3_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C3_SEL_SHIFT	= 6,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C4_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C4_SEL_MASK	= 3 << GRF_GPIO4C4_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C4_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C4_SEL_SHIFT	= 8,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C6_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C6_SEL_MASK	= 3 << GRF_GPIO4C6_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
GRF_GPIO4C6_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_GPIO4C6_SEL_SHIFT	= 12,$/;"	e	enum:__anon0061a4610103	file:
GRF_POC_FLASH0_CTRL_GPIO3C_3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_POC_FLASH0_CTRL_GPIO3C_3 = 0,$/;"	e	enum:__anonbeb2b9771303
GRF_POC_FLASH0_CTRL_GRF_IO_VSEL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_POC_FLASH0_CTRL_GRF_IO_VSEL,$/;"	e	enum:__anonbeb2b9771303
GRF_POC_FLASH0_CTRL_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_POC_FLASH0_CTRL_MASK = 1,$/;"	e	enum:__anonbeb2b9771303
GRF_POC_FLASH0_CTRL_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_POC_FLASH0_CTRL_SHIFT = 7,$/;"	e	enum:__anonbeb2b9771303
GRF_PWM_0	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_PWM_0		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_PWM_1	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_PWM_1		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SDMMC_CLKOUT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SDMMC_CLKOUT	= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SDMMC_CMD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SDMMC_CMD		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SDMMC_DATA0	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SDMMC_DATA0		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SDMMC_DATA1	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SDMMC_DATA1		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SDMMC_DATA2	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SDMMC_DATA2		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SDMMC_DATA3	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SDMMC_DATA3		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SOC_CON2	arch/arm/mach-rockchip/rk3288/rk3288.c	/^#define GRF_SOC_CON2 /;"	d	file:
GRF_SPDIF_2CH_EN_2CH	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_SPDIF_2CH_EN_2CH,$/;"	e	enum:__anonbeb2b9771303
GRF_SPDIF_2CH_EN_8CH	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_SPDIF_2CH_EN_8CH	= 0,$/;"	e	enum:__anonbeb2b9771303
GRF_SPDIF_2CH_EN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_SPDIF_2CH_EN_MASK	= 1,$/;"	e	enum:__anonbeb2b9771303
GRF_SPDIF_2CH_EN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	GRF_SPDIF_2CH_EN_SHIFT	= 1,$/;"	e	enum:__anonbeb2b9771303
GRF_SPI0NORCODEC_CLK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI0NORCODEC_CLK	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI0NORCODEC_CSN0	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI0NORCODEC_CSN0	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI0NORCODEC_CSN1	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI0NORCODEC_CSN1	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI0NORCODEC_RXD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI0NORCODEC_RXD	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI0NORCODEC_TXD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI0NORCODEC_TXD	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI2TPM_CLK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI2TPM_CLK		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI2TPM_CSN0	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI2TPM_CSN0	= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI2TPM_RXD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI2TPM_RXD		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_SPI2TPM_TXD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_SPI2TPM_TXD		= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_UART2DBGA_SIN	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_UART2DBGA_SIN	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_UART2DBGA_SOUT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_UART2DBGA_SOUT	= 2,$/;"	e	enum:__anon0061a4610103	file:
GRF_UART2DBGC_SOUT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_UART2DBGC_SOUT	= 1,$/;"	e	enum:__anon0061a4610103	file:
GRF_UART2DGBC_SIN	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	GRF_UART2DGBC_SIN	= 1,$/;"	e	enum:__anon0061a4610103	file:
GROUP	drivers/pinctrl/meson/pinctrl-meson.h	/^#define GROUP(/;"	d
GRPH2_BUFFER_CNTL	include/radeon.h	/^#define GRPH2_BUFFER_CNTL	/;"	d
GRPH_BUFFER_CNTL	include/radeon.h	/^#define GRPH_BUFFER_CNTL	/;"	d
GRP_COMDAT	include/elf.h	/^#define GRP_COMDAT	/;"	d
GRP_MASKOS	include/elf.h	/^#define GRP_MASKOS	/;"	d
GRP_MASKPROC	include/elf.h	/^#define GRP_MASKPROC	/;"	d
GRR_GSR	drivers/net/ks8851_mll.h	/^#define GRR_GSR	/;"	d
GRR_QMU	drivers/net/ks8851_mll.h	/^#define GRR_QMU	/;"	d
GRUB_ZFS_HEADER	include/zfs/zfs.h	/^#define	GRUB_ZFS_HEADER /;"	d
GS	arch/x86/include/asm/ptrace.h	/^#define GS /;"	d
GS	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 CS, DS, SS, ES, FS, GS;$/;"	m	struct:i386_segment_regs	typeref:typename:u16
GSC_EEPROM_ADDR	board/gateworks/gw_ventana/gsc.h	/^#define GSC_EEPROM_ADDR	/;"	d
GSC_EEPROM_DDR_SIZE	board/gateworks/gw_ventana/gw_ventana_spl.c	/^#define GSC_EEPROM_DDR_SIZE	/;"	d	file:
GSC_EEPROM_DDR_WIDTH	board/gateworks/gw_ventana/gw_ventana_spl.c	/^#define GSC_EEPROM_DDR_WIDTH	/;"	d	file:
GSC_HWMON_ADDR	board/gateworks/gw_ventana/gsc.h	/^#define GSC_HWMON_ADDR	/;"	d
GSC_HWMON_TEMP	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_TEMP		= 0x00,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VBATT	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VBATT		= 0x08,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_1P8	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_1P8	= 0x1d,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_2P5	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_2P5	= 0x23,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_3P3	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_3P3	= 0x05,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_5P0	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_5P0	= 0x0b,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_CORE	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_CORE	= 0x0e,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_DDR	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_DDR	= 0x17,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_HIGH	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_HIGH	= 0x14,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_IO2	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_IO2	= 0x20,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_IO3	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_IO3	= 0x26,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_IO4	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_IO4	= 0x29,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VDD_SOC	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VDD_SOC	= 0x11,$/;"	e	enum:__anondd4c8a4e0403
GSC_HWMON_VIN	board/gateworks/gw_ventana/gsc.h	/^	GSC_HWMON_VIN		= 0x02,$/;"	e	enum:__anondd4c8a4e0403
GSC_RTC_ADDR	board/gateworks/gw_ventana/gsc.h	/^#define GSC_RTC_ADDR	/;"	d
GSC_SC_ADDR	board/gateworks/gw_ventana/gsc.h	/^#define GSC_SC_ADDR	/;"	d
GSC_SC_CTRL0	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_CTRL0		= 0x00,$/;"	e	enum:__anondd4c8a4e0103
GSC_SC_CTRL1	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_CTRL1		= 0x01,$/;"	e	enum:__anondd4c8a4e0103
GSC_SC_CTRL1_WDDIS	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_CTRL1_WDDIS	= 7, \/* 1 = disable boot watchdog *\/$/;"	e	enum:__anondd4c8a4e0203
GSC_SC_CTRL1_WDEN	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_CTRL1_WDEN	= 5, \/* 1 = enable, 0 = disable *\/$/;"	e	enum:__anondd4c8a4e0203
GSC_SC_CTRL1_WDTIME	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_CTRL1_WDTIME	= 4, \/* 1 = 60s timeout, 0 = 30s timeout *\/$/;"	e	enum:__anondd4c8a4e0203
GSC_SC_FWCRC	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_FWCRC		= 0x0c,$/;"	e	enum:__anondd4c8a4e0103
GSC_SC_FWVER	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_FWVER		= 0x0e,$/;"	e	enum:__anondd4c8a4e0103
GSC_SC_IRQ_EEPROM_WP	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_EEPROM_WP	= 2, \/* EEPROM write violation *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_IRQ_GPIO	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_GPIO		= 4, \/* GPIO change *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_IRQ_PB	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_PB		= 0, \/* Pushbutton switch *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_IRQ_PBLONG	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_PBLONG	= 7, \/* Pushbutton long hold *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_IRQ_SECURE	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_SECURE	= 1, \/* Secure Key erase operation complete *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_IRQ_TAMPER	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_TAMPER	= 5, \/* Tamper detect *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_IRQ_WATCHDOG	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_IRQ_WATCHDOG	= 6, \/* Watchdog trip *\/$/;"	e	enum:__anondd4c8a4e0303
GSC_SC_STATUS	board/gateworks/gw_ventana/gsc.h	/^	GSC_SC_STATUS		= 0x0a,$/;"	e	enum:__anondd4c8a4e0103
GSDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSDR(/;"	d
GSDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSDR0	/;"	d
GSDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSDR1	/;"	d
GSDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSDR2	/;"	d
GSDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSDR3	/;"	d
GSERIAL_RX_ENDPOINT	drivers/serial/usbtty.c	/^#define GSERIAL_RX_ENDPOINT /;"	d	file:
GSERIAL_TX_ENDPOINT	drivers/serial/usbtty.c	/^#define GSERIAL_TX_ENDPOINT /;"	d	file:
GSFER0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSFER0	/;"	d
GSFER1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSFER1	/;"	d
GSFER2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSFER2	/;"	d
GSFER3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSFER3	/;"	d
GSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR	/;"	d
GSRER0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSRER0	/;"	d
GSRER1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSRER1	/;"	d
GSRER2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSRER2	/;"	d
GSRER3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSRER3	/;"	d
GSR_BIT1SLT12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_BIT1SLT12	/;"	d
GSR_BIT2SLT12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_BIT2SLT12	/;"	d
GSR_BIT3SLT12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_BIT3SLT12	/;"	d
GSR_CDONE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_CDONE	/;"	d
GSR_FS_MASK	include/fsl-mc/fsl_mc.h	/^#define GSR_FS_MASK	/;"	d
GSR_GSCI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_GSCI	/;"	d
GSR_MIINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_MIINT	/;"	d
GSR_MINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_MINT	/;"	d
GSR_MOINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_MOINT	/;"	d
GSR_PCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_PCR	/;"	d
GSR_PIINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_PIINT	/;"	d
GSR_POINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_POINT	/;"	d
GSR_PRIRES	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_PRIRES	/;"	d
GSR_RDCS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_RDCS	/;"	d
GSR_SCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_SCR	/;"	d
GSR_SDONE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_SDONE	/;"	d
GSR_SECRES	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define GSR_SECRES	/;"	d
GSTATUS1	board/mpl/vcma9/lowlevel_init.S	/^#define GSTATUS1	/;"	d	file:
GSX_MSTP112	board/renesas/salvator-x/salvator-x.c	/^#define GSX_MSTP112	/;"	d	file:
GT	cmd/itest.c	/^#define GT	/;"	d	file:
GTBUS_CLK_DIV_RATIO	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define GTBUS_CLK_DIV_RATIO(/;"	d
GTBUS_CLK_DIV_RATIO	arch/arm/include/asm/arch/clock_sun9i.h	/^#define GTBUS_CLK_DIV_RATIO(/;"	d
GTBUS_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define GTBUS_SRC_CLK_SELECT_SHIFT /;"	d
GTBUS_SRC_CLK_SELECT_SHIFT	arch/arm/include/asm/arch/clock_sun9i.h	/^#define GTBUS_SRC_CLK_SELECT_SHIFT /;"	d
GTBUS_SRC_MASK	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define GTBUS_SRC_MASK /;"	d
GTBUS_SRC_MASK	arch/arm/include/asm/arch/clock_sun9i.h	/^#define GTBUS_SRC_MASK /;"	d
GTBUS_SRC_OSC24M	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define GTBUS_SRC_OSC24M /;"	d
GTBUS_SRC_OSC24M	arch/arm/include/asm/arch/clock_sun9i.h	/^#define GTBUS_SRC_OSC24M /;"	d
GTBUS_SRC_PLL_PERIPH0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define GTBUS_SRC_PLL_PERIPH0 /;"	d
GTBUS_SRC_PLL_PERIPH0	arch/arm/include/asm/arch/clock_sun9i.h	/^#define GTBUS_SRC_PLL_PERIPH0 /;"	d
GTBUS_SRC_PLL_PERIPH1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define GTBUS_SRC_PLL_PERIPH1 /;"	d
GTBUS_SRC_PLL_PERIPH1	arch/arm/include/asm/arch/clock_sun9i.h	/^#define GTBUS_SRC_PLL_PERIPH1 /;"	d
GTIMER_CMP_H	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_CMP_H	/;"	d
GTIMER_CMP_L	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_CMP_L	/;"	d
GTIMER_CNT_H	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_CNT_H	/;"	d
GTIMER_CNT_L	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_CNT_L	/;"	d
GTIMER_CTRL	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_CTRL	/;"	d
GTIMER_INC	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_INC	/;"	d
GTIMER_STAT	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define GTIMER_STAT	/;"	d
GTSENDV4	drivers/usb/eth/r8152.h	/^#define GTSENDV4	/;"	d
GTSENDV6	drivers/usb/eth/r8152.h	/^#define GTSENDV6	/;"	d
GTTCPHO_MAX	drivers/usb/eth/r8152.h	/^#define GTTCPHO_MAX	/;"	d
GTTCPHO_SHIFT	drivers/usb/eth/r8152.h	/^#define GTTCPHO_SHIFT	/;"	d
GTT_RETRY	drivers/video/ivybridge_igd.c	/^#define GTT_RETRY /;"	d	file:
GT_ADERR_OFS	include/gt64120.h	/^#define GT_ADERR_OFS	/;"	d
GT_BOOTHD_OFS	include/gt64120.h	/^#define GT_BOOTHD_OFS	/;"	d
GT_BOOTLD_OFS	include/gt64120.h	/^#define GT_BOOTLD_OFS	/;"	d
GT_BW_WDW_MAX	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_BW_WDW_MAX /;"	d
GT_BW_WDW_MAX	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_BW_WDW_MAX /;"	d
GT_CDCLK_337	drivers/video/broadwell_igd.c	/^#define GT_CDCLK_337	/;"	d	file:
GT_CDCLK_450	drivers/video/broadwell_igd.c	/^#define GT_CDCLK_450	/;"	d	file:
GT_CDCLK_540	drivers/video/broadwell_igd.c	/^#define GT_CDCLK_540	/;"	d	file:
GT_CDCLK_675	drivers/video/broadwell_igd.c	/^#define GT_CDCLK_675	/;"	d	file:
GT_CFGADDR_BUSNUM_MSK	include/gt64120.h	/^#define GT_CFGADDR_BUSNUM_MSK	/;"	d
GT_CFGADDR_BUSNUM_SHF	include/gt64120.h	/^#define GT_CFGADDR_BUSNUM_SHF	/;"	d
GT_CFGADDR_CFGEN_BIT	include/gt64120.h	/^#define GT_CFGADDR_CFGEN_BIT	/;"	d
GT_CFGADDR_CFGEN_MSK	include/gt64120.h	/^#define GT_CFGADDR_CFGEN_MSK	/;"	d
GT_CFGADDR_CFGEN_SHF	include/gt64120.h	/^#define GT_CFGADDR_CFGEN_SHF	/;"	d
GT_CFGADDR_DEVNUM_MSK	include/gt64120.h	/^#define GT_CFGADDR_DEVNUM_MSK	/;"	d
GT_CFGADDR_DEVNUM_SHF	include/gt64120.h	/^#define GT_CFGADDR_DEVNUM_SHF	/;"	d
GT_CFGADDR_FUNCNUM_MSK	include/gt64120.h	/^#define GT_CFGADDR_FUNCNUM_MSK	/;"	d
GT_CFGADDR_FUNCNUM_SHF	include/gt64120.h	/^#define GT_CFGADDR_FUNCNUM_SHF	/;"	d
GT_CFGADDR_REGNUM_MSK	include/gt64120.h	/^#define GT_CFGADDR_REGNUM_MSK	/;"	d
GT_CFGADDR_REGNUM_SHF	include/gt64120.h	/^#define GT_CFGADDR_REGNUM_SHF	/;"	d
GT_CPUERR_ADDRHI_OFS	include/gt64120.h	/^#define GT_CPUERR_ADDRHI_OFS	/;"	d
GT_CPUERR_ADDRLO_OFS	include/gt64120.h	/^#define GT_CPUERR_ADDRLO_OFS	/;"	d
GT_CPUERR_DATAHI_OFS	include/gt64120.h	/^#define GT_CPUERR_DATAHI_OFS	/;"	d
GT_CPUERR_DATALO_OFS	include/gt64120.h	/^#define GT_CPUERR_DATALO_OFS	/;"	d
GT_CPUERR_PARITY_OFS	include/gt64120.h	/^#define GT_CPUERR_PARITY_OFS	/;"	d
GT_CPU_ENDIAN_BIT	include/gt64120.h	/^#define GT_CPU_ENDIAN_BIT	/;"	d
GT_CPU_ENDIAN_MSK	include/gt64120.h	/^#define GT_CPU_ENDIAN_MSK	/;"	d
GT_CPU_ENDIAN_SHF	include/gt64120.h	/^#define GT_CPU_ENDIAN_SHF	/;"	d
GT_CPU_INTSEL_OFS	include/gt64120.h	/^#define GT_CPU_INTSEL_OFS	/;"	d
GT_CPU_OFS	include/gt64120.h	/^#define GT_CPU_OFS	/;"	d
GT_CPU_WR_BIT	include/gt64120.h	/^#define GT_CPU_WR_BIT	/;"	d
GT_CPU_WR_DDDD	include/gt64120.h	/^#define GT_CPU_WR_DDDD	/;"	d
GT_CPU_WR_DXDXDXDX	include/gt64120.h	/^#define GT_CPU_WR_DXDXDXDX	/;"	d
GT_CPU_WR_MSK	include/gt64120.h	/^#define GT_CPU_WR_MSK	/;"	d
GT_CPU_WR_SHF	include/gt64120.h	/^#define GT_CPU_WR_SHF	/;"	d
GT_CS0HD_OFS	include/gt64120.h	/^#define GT_CS0HD_OFS	/;"	d
GT_CS0LD_OFS	include/gt64120.h	/^#define GT_CS0LD_OFS	/;"	d
GT_CS1HD_OFS	include/gt64120.h	/^#define GT_CS1HD_OFS	/;"	d
GT_CS1LD_OFS	include/gt64120.h	/^#define GT_CS1LD_OFS	/;"	d
GT_CS20HD_OFS	include/gt64120.h	/^#define GT_CS20HD_OFS	/;"	d
GT_CS20LD_OFS	include/gt64120.h	/^#define GT_CS20LD_OFS	/;"	d
GT_CS20R_OFS	include/gt64120.h	/^#define GT_CS20R_OFS	/;"	d
GT_CS2HD_OFS	include/gt64120.h	/^#define GT_CS2HD_OFS	/;"	d
GT_CS2LD_OFS	include/gt64120.h	/^#define GT_CS2LD_OFS	/;"	d
GT_CS3BOOTHD_OFS	include/gt64120.h	/^#define GT_CS3BOOTHD_OFS	/;"	d
GT_CS3BOOTLD_OFS	include/gt64120.h	/^#define GT_CS3BOOTLD_OFS	/;"	d
GT_CS3BOOTR_OFS	include/gt64120.h	/^#define GT_CS3BOOTR_OFS	/;"	d
GT_CS3HD_OFS	include/gt64120.h	/^#define GT_CS3HD_OFS	/;"	d
GT_CS3LD_OFS	include/gt64120.h	/^#define GT_CS3LD_OFS	/;"	d
GT_DEF_BASE	include/gt64120.h	/^#define GT_DEF_BASE	/;"	d
GT_DEF_PCI0_IO_BASE	include/gt64120.h	/^#define GT_DEF_PCI0_IO_BASE	/;"	d
GT_DEF_PCI0_IO_SIZE	include/gt64120.h	/^#define GT_DEF_PCI0_IO_SIZE	/;"	d
GT_DEF_PCI0_MEM0_BASE	include/gt64120.h	/^#define GT_DEF_PCI0_MEM0_BASE	/;"	d
GT_DEF_PCI0_MEM0_SIZE	include/gt64120.h	/^#define GT_DEF_PCI0_MEM0_SIZE	/;"	d
GT_DEV_B0_OFS	include/gt64120.h	/^#define GT_DEV_B0_OFS	/;"	d
GT_DEV_B1_OFS	include/gt64120.h	/^#define GT_DEV_B1_OFS	/;"	d
GT_DEV_B2_OFS	include/gt64120.h	/^#define GT_DEV_B2_OFS	/;"	d
GT_DEV_B3_OFS	include/gt64120.h	/^#define GT_DEV_B3_OFS	/;"	d
GT_DEV_BOOT_OFS	include/gt64120.h	/^#define GT_DEV_BOOT_OFS	/;"	d
GT_DISABLE_REQ	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_DISABLE_REQ /;"	d
GT_DISABLE_REQ	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_DISABLE_REQ /;"	d
GT_DMA0_CNT_OFS	include/gt64120.h	/^#define GT_DMA0_CNT_OFS	/;"	d
GT_DMA0_CTRL_OFS	include/gt64120.h	/^#define GT_DMA0_CTRL_OFS	/;"	d
GT_DMA0_CUR_OFS	include/gt64120.h	/^#define GT_DMA0_CUR_OFS	/;"	d
GT_DMA0_DA_OFS	include/gt64120.h	/^#define GT_DMA0_DA_OFS	/;"	d
GT_DMA0_NEXT_OFS	include/gt64120.h	/^#define GT_DMA0_NEXT_OFS	/;"	d
GT_DMA0_SA_OFS	include/gt64120.h	/^#define GT_DMA0_SA_OFS	/;"	d
GT_DMA1_CNT_OFS	include/gt64120.h	/^#define GT_DMA1_CNT_OFS	/;"	d
GT_DMA1_CTRL_OFS	include/gt64120.h	/^#define GT_DMA1_CTRL_OFS	/;"	d
GT_DMA1_CUR_OFS	include/gt64120.h	/^#define GT_DMA1_CUR_OFS	/;"	d
GT_DMA1_DA_OFS	include/gt64120.h	/^#define GT_DMA1_DA_OFS	/;"	d
GT_DMA1_NEXT_OFS	include/gt64120.h	/^#define GT_DMA1_NEXT_OFS	/;"	d
GT_DMA1_SA_OFS	include/gt64120.h	/^#define GT_DMA1_SA_OFS	/;"	d
GT_DMA2_CNT_OFS	include/gt64120.h	/^#define GT_DMA2_CNT_OFS	/;"	d
GT_DMA2_CTRL_OFS	include/gt64120.h	/^#define GT_DMA2_CTRL_OFS	/;"	d
GT_DMA2_CUR_OFS	include/gt64120.h	/^#define GT_DMA2_CUR_OFS	/;"	d
GT_DMA2_DA_OFS	include/gt64120.h	/^#define GT_DMA2_DA_OFS	/;"	d
GT_DMA2_NEXT_OFS	include/gt64120.h	/^#define GT_DMA2_NEXT_OFS	/;"	d
GT_DMA2_SA_OFS	include/gt64120.h	/^#define GT_DMA2_SA_OFS	/;"	d
GT_DMA3_CNT_OFS	include/gt64120.h	/^#define GT_DMA3_CNT_OFS	/;"	d
GT_DMA3_CTRL_OFS	include/gt64120.h	/^#define GT_DMA3_CTRL_OFS	/;"	d
GT_DMA3_CUR_OFS	include/gt64120.h	/^#define GT_DMA3_CUR_OFS	/;"	d
GT_DMA3_DA_OFS	include/gt64120.h	/^#define GT_DMA3_DA_OFS	/;"	d
GT_DMA3_NEXT_OFS	include/gt64120.h	/^#define GT_DMA3_NEXT_OFS	/;"	d
GT_DMA3_SA_OFS	include/gt64120.h	/^#define GT_DMA3_SA_OFS	/;"	d
GT_DMA_ARB_OFS	include/gt64120.h	/^#define GT_DMA_ARB_OFS	/;"	d
GT_ECC_CALC	include/gt64120.h	/^#define GT_ECC_CALC	/;"	d
GT_ECC_ERRADDR	include/gt64120.h	/^#define GT_ECC_ERRADDR	/;"	d
GT_ECC_ERRDATAHI	include/gt64120.h	/^#define GT_ECC_ERRDATAHI	/;"	d
GT_ECC_ERRDATALO	include/gt64120.h	/^#define GT_ECC_ERRDATALO	/;"	d
GT_ECC_MEM	include/gt64120.h	/^#define GT_ECC_MEM	/;"	d
GT_ENABLE_REQ	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_ENABLE_REQ /;"	d
GT_ENABLE_REQ	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_ENABLE_REQ /;"	d
GT_HINTRCAUSE_OFS	include/gt64120.h	/^#define GT_HINTRCAUSE_OFS	/;"	d
GT_HINTRMASK_OFS	include/gt64120.h	/^#define GT_HINTRMASK_OFS	/;"	d
GT_INTRCAUSE_ABORT_BITS	drivers/pci/pci_gt64120.c	/^#define GT_INTRCAUSE_ABORT_BITS	/;"	d	file:
GT_INTRCAUSE_MASABORT0_BIT	include/gt64120.h	/^#define GT_INTRCAUSE_MASABORT0_BIT	/;"	d
GT_INTRCAUSE_MASABORT0_MSK	include/gt64120.h	/^#define GT_INTRCAUSE_MASABORT0_MSK	/;"	d
GT_INTRCAUSE_MASABORT0_SHF	include/gt64120.h	/^#define GT_INTRCAUSE_MASABORT0_SHF	/;"	d
GT_INTRCAUSE_OFS	include/gt64120.h	/^#define GT_INTRCAUSE_OFS	/;"	d
GT_INTRCAUSE_TARABORT0_BIT	include/gt64120.h	/^#define GT_INTRCAUSE_TARABORT0_BIT	/;"	d
GT_INTRCAUSE_TARABORT0_MSK	include/gt64120.h	/^#define GT_INTRCAUSE_TARABORT0_MSK	/;"	d
GT_INTRCAUSE_TARABORT0_SHF	include/gt64120.h	/^#define GT_INTRCAUSE_TARABORT0_SHF	/;"	d
GT_INTRMASK_OFS	include/gt64120.h	/^#define GT_INTRMASK_OFS	/;"	d
GT_INTR_RETRYCTR0_BIT	include/gt64120.h	/^#define GT_INTR_RETRYCTR0_BIT	/;"	d
GT_INTR_RETRYCTR0_MSK	include/gt64120.h	/^#define GT_INTR_RETRYCTR0_MSK	/;"	d
GT_INTR_RETRYCTR0_SHF	include/gt64120.h	/^#define GT_INTR_RETRYCTR0_SHF	/;"	d
GT_INTR_T0EXP_BIT	include/gt64120.h	/^#define GT_INTR_T0EXP_BIT	/;"	d
GT_INTR_T0EXP_MSK	include/gt64120.h	/^#define GT_INTR_T0EXP_MSK	/;"	d
GT_INTR_T0EXP_SHF	include/gt64120.h	/^#define GT_INTR_T0EXP_SHF	/;"	d
GT_ISD_OFS	include/gt64120.h	/^#define GT_ISD_OFS	/;"	d
GT_LATTIM_MIN	include/gt64120.h	/^#define GT_LATTIM_MIN	/;"	d
GT_MAX_BANKSIZE	include/gt64120.h	/^#define GT_MAX_BANKSIZE	/;"	d
GT_MULTI_OFS	include/gt64120.h	/^#define GT_MULTI_OFS	/;"	d
GT_MVGBE_IPG_INT_RX	drivers/net/mvgbe.h	/^#define GT_MVGBE_IPG_INT_RX(/;"	d
GT_PCI0IOHD_OFS	include/gt64120.h	/^#define GT_PCI0IOHD_OFS	/;"	d
GT_PCI0IOLD_OFS	include/gt64120.h	/^#define GT_PCI0IOLD_OFS	/;"	d
GT_PCI0IOREMAP_OFS	include/gt64120.h	/^#define GT_PCI0IOREMAP_OFS	/;"	d
GT_PCI0M0HD_OFS	include/gt64120.h	/^#define GT_PCI0M0HD_OFS	/;"	d
GT_PCI0M0LD_OFS	include/gt64120.h	/^#define GT_PCI0M0LD_OFS	/;"	d
GT_PCI0M0REMAP_OFS	include/gt64120.h	/^#define GT_PCI0M0REMAP_OFS	/;"	d
GT_PCI0M1HD_OFS	include/gt64120.h	/^#define GT_PCI0M1HD_OFS	/;"	d
GT_PCI0M1LD_OFS	include/gt64120.h	/^#define GT_PCI0M1LD_OFS	/;"	d
GT_PCI0M1REMAP_OFS	include/gt64120.h	/^#define GT_PCI0M1REMAP_OFS	/;"	d
GT_PCI0SYNC_OFS	include/gt64120.h	/^#define GT_PCI0SYNC_OFS	/;"	d
GT_PCI0_BARE_CS20DIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_CS20DIS_BIT	/;"	d
GT_PCI0_BARE_CS20DIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_CS20DIS_MSK	/;"	d
GT_PCI0_BARE_CS20DIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_CS20DIS_SHF	/;"	d
GT_PCI0_BARE_CS3BOOTDIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_CS3BOOTDIS_BIT	/;"	d
GT_PCI0_BARE_CS3BOOTDIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_CS3BOOTDIS_MSK	/;"	d
GT_PCI0_BARE_CS3BOOTDIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_CS3BOOTDIS_SHF	/;"	d
GT_PCI0_BARE_INTIODIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_INTIODIS_BIT	/;"	d
GT_PCI0_BARE_INTIODIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_INTIODIS_MSK	/;"	d
GT_PCI0_BARE_INTIODIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_INTIODIS_SHF	/;"	d
GT_PCI0_BARE_INTMEMDIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_INTMEMDIS_BIT	/;"	d
GT_PCI0_BARE_INTMEMDIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_INTMEMDIS_MSK	/;"	d
GT_PCI0_BARE_INTMEMDIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_INTMEMDIS_SHF	/;"	d
GT_PCI0_BARE_OFS	include/gt64120.h	/^#define GT_PCI0_BARE_OFS	/;"	d
GT_PCI0_BARE_SCS10DIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_SCS10DIS_BIT	/;"	d
GT_PCI0_BARE_SCS10DIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_SCS10DIS_MSK	/;"	d
GT_PCI0_BARE_SCS10DIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_SCS10DIS_SHF	/;"	d
GT_PCI0_BARE_SCS32DIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_SCS32DIS_BIT	/;"	d
GT_PCI0_BARE_SCS32DIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_SCS32DIS_MSK	/;"	d
GT_PCI0_BARE_SCS32DIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_SCS32DIS_SHF	/;"	d
GT_PCI0_BARE_SWSCS10DIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS10DIS_BIT	/;"	d
GT_PCI0_BARE_SWSCS10DIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS10DIS_MSK	/;"	d
GT_PCI0_BARE_SWSCS10DIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS10DIS_SHF	/;"	d
GT_PCI0_BARE_SWSCS32DIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS32DIS_BIT	/;"	d
GT_PCI0_BARE_SWSCS32DIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS32DIS_MSK	/;"	d
GT_PCI0_BARE_SWSCS32DIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS32DIS_SHF	/;"	d
GT_PCI0_BARE_SWSCS3BOOTDIS_BIT	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT	/;"	d
GT_PCI0_BARE_SWSCS3BOOTDIS_MSK	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK	/;"	d
GT_PCI0_BARE_SWSCS3BOOTDIS_SHF	include/gt64120.h	/^#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF	/;"	d
GT_PCI0_BS_CS20_OFS	include/gt64120.h	/^#define GT_PCI0_BS_CS20_OFS	/;"	d
GT_PCI0_BS_CS3BT_OFS	include/gt64120.h	/^#define GT_PCI0_BS_CS3BT_OFS	/;"	d
GT_PCI0_BS_SCS10_OFS	include/gt64120.h	/^#define GT_PCI0_BS_SCS10_OFS	/;"	d
GT_PCI0_BS_SCS32_OFS	include/gt64120.h	/^#define GT_PCI0_BS_SCS32_OFS	/;"	d
GT_PCI0_CFGADDR_BUSNUM_MSK	include/gt64120.h	/^#define GT_PCI0_CFGADDR_BUSNUM_MSK	/;"	d
GT_PCI0_CFGADDR_BUSNUM_SHF	include/gt64120.h	/^#define GT_PCI0_CFGADDR_BUSNUM_SHF	/;"	d
GT_PCI0_CFGADDR_CONFIGEN_BIT	include/gt64120.h	/^#define GT_PCI0_CFGADDR_CONFIGEN_BIT	/;"	d
GT_PCI0_CFGADDR_CONFIGEN_MSK	include/gt64120.h	/^#define GT_PCI0_CFGADDR_CONFIGEN_MSK	/;"	d
GT_PCI0_CFGADDR_CONFIGEN_SHF	include/gt64120.h	/^#define GT_PCI0_CFGADDR_CONFIGEN_SHF	/;"	d
GT_PCI0_CFGADDR_DEVNUM_MSK	include/gt64120.h	/^#define GT_PCI0_CFGADDR_DEVNUM_MSK	/;"	d
GT_PCI0_CFGADDR_DEVNUM_SHF	include/gt64120.h	/^#define GT_PCI0_CFGADDR_DEVNUM_SHF	/;"	d
GT_PCI0_CFGADDR_FUNCTNUM_MSK	include/gt64120.h	/^#define GT_PCI0_CFGADDR_FUNCTNUM_MSK	/;"	d
GT_PCI0_CFGADDR_FUNCTNUM_SHF	include/gt64120.h	/^#define GT_PCI0_CFGADDR_FUNCTNUM_SHF	/;"	d
GT_PCI0_CFGADDR_OFS	include/gt64120.h	/^#define GT_PCI0_CFGADDR_OFS	/;"	d
GT_PCI0_CFGADDR_REGNUM_MSK	include/gt64120.h	/^#define GT_PCI0_CFGADDR_REGNUM_MSK	/;"	d
GT_PCI0_CFGADDR_REGNUM_SHF	include/gt64120.h	/^#define GT_PCI0_CFGADDR_REGNUM_SHF	/;"	d
GT_PCI0_CFGDATA_OFS	include/gt64120.h	/^#define GT_PCI0_CFGDATA_OFS	/;"	d
GT_PCI0_CMD_MBYTESWAP_BIT	include/gt64120.h	/^#define GT_PCI0_CMD_MBYTESWAP_BIT	/;"	d
GT_PCI0_CMD_MBYTESWAP_MSK	include/gt64120.h	/^#define GT_PCI0_CMD_MBYTESWAP_MSK	/;"	d
GT_PCI0_CMD_MBYTESWAP_SHF	include/gt64120.h	/^#define GT_PCI0_CMD_MBYTESWAP_SHF	/;"	d
GT_PCI0_CMD_MWORDSWAP_BIT	include/gt64120.h	/^#define GT_PCI0_CMD_MWORDSWAP_BIT	/;"	d
GT_PCI0_CMD_MWORDSWAP_MSK	include/gt64120.h	/^#define GT_PCI0_CMD_MWORDSWAP_MSK	/;"	d
GT_PCI0_CMD_MWORDSWAP_SHF	include/gt64120.h	/^#define GT_PCI0_CMD_MWORDSWAP_SHF	/;"	d
GT_PCI0_CMD_OFS	include/gt64120.h	/^#define GT_PCI0_CMD_OFS	/;"	d
GT_PCI0_CMD_SBYTESWAP_BIT	include/gt64120.h	/^#define GT_PCI0_CMD_SBYTESWAP_BIT	/;"	d
GT_PCI0_CMD_SBYTESWAP_MSK	include/gt64120.h	/^#define GT_PCI0_CMD_SBYTESWAP_MSK	/;"	d
GT_PCI0_CMD_SBYTESWAP_SHF	include/gt64120.h	/^#define GT_PCI0_CMD_SBYTESWAP_SHF	/;"	d
GT_PCI0_CMD_SWORDSWAP_BIT	include/gt64120.h	/^#define GT_PCI0_CMD_SWORDSWAP_BIT	/;"	d
GT_PCI0_CMD_SWORDSWAP_MSK	include/gt64120.h	/^#define GT_PCI0_CMD_SWORDSWAP_MSK	/;"	d
GT_PCI0_CMD_SWORDSWAP_SHF	include/gt64120.h	/^#define GT_PCI0_CMD_SWORDSWAP_SHF	/;"	d
GT_PCI0_CS20_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_CS20_BAR_OFS	/;"	d
GT_PCI0_CS3BT_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_CS3BT_BAR_OFS	/;"	d
GT_PCI0_HICMASK_OFS	include/gt64120.h	/^#define GT_PCI0_HICMASK_OFS	/;"	d
GT_PCI0_IACK_OFS	include/gt64120.h	/^#define GT_PCI0_IACK_OFS	/;"	d
GT_PCI0_ICMASK_OFS	include/gt64120.h	/^#define GT_PCI0_ICMASK_OFS	/;"	d
GT_PCI0_INTSEL_OFS	include/gt64120.h	/^#define GT_PCI0_INTSEL_OFS	/;"	d
GT_PCI0_PREFMBR_OFS	include/gt64120.h	/^#define GT_PCI0_PREFMBR_OFS	/;"	d
GT_PCI0_SCS10_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_SCS10_BAR_OFS	/;"	d
GT_PCI0_SCS32_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_SCS32_BAR_OFS	/;"	d
GT_PCI0_SCS3BT_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_SCS3BT_BAR_OFS	/;"	d
GT_PCI0_SERR0MASK_OFS	include/gt64120.h	/^#define GT_PCI0_SERR0MASK_OFS	/;"	d
GT_PCI0_SSCS10_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_SSCS10_BAR_OFS	/;"	d
GT_PCI0_SSCS32_BAR_OFS	include/gt64120.h	/^#define GT_PCI0_SSCS32_BAR_OFS	/;"	d
GT_PCI0_TOR_OFS	include/gt64120.h	/^#define GT_PCI0_TOR_OFS	/;"	d
GT_PCI1IOHD_OFS	include/gt64120.h	/^#define GT_PCI1IOHD_OFS	/;"	d
GT_PCI1IOLD_OFS	include/gt64120.h	/^#define GT_PCI1IOLD_OFS	/;"	d
GT_PCI1IOREMAP_OFS	include/gt64120.h	/^#define GT_PCI1IOREMAP_OFS	/;"	d
GT_PCI1M0HD_OFS	include/gt64120.h	/^#define GT_PCI1M0HD_OFS	/;"	d
GT_PCI1M0LD_OFS	include/gt64120.h	/^#define GT_PCI1M0LD_OFS	/;"	d
GT_PCI1M0REMAP_OFS	include/gt64120.h	/^#define GT_PCI1M0REMAP_OFS	/;"	d
GT_PCI1M1HD_OFS	include/gt64120.h	/^#define GT_PCI1M1HD_OFS	/;"	d
GT_PCI1M1LD_OFS	include/gt64120.h	/^#define GT_PCI1M1LD_OFS	/;"	d
GT_PCI1M1REMAP_OFS	include/gt64120.h	/^#define GT_PCI1M1REMAP_OFS	/;"	d
GT_PCI1SYNC_OFS	include/gt64120.h	/^#define GT_PCI1SYNC_OFS	/;"	d
GT_PCI1_BARE_OFS	include/gt64120.h	/^#define GT_PCI1_BARE_OFS	/;"	d
GT_PCI1_BS_CS20_OFS	include/gt64120.h	/^#define GT_PCI1_BS_CS20_OFS	/;"	d
GT_PCI1_BS_CS3BT_OFS	include/gt64120.h	/^#define GT_PCI1_BS_CS3BT_OFS	/;"	d
GT_PCI1_BS_SCS10_OFS	include/gt64120.h	/^#define GT_PCI1_BS_SCS10_OFS	/;"	d
GT_PCI1_BS_SCS32_OFS	include/gt64120.h	/^#define GT_PCI1_BS_SCS32_OFS	/;"	d
GT_PCI1_CFGADDR_OFS	include/gt64120.h	/^#define GT_PCI1_CFGADDR_OFS	/;"	d
GT_PCI1_CFGDATA_OFS	include/gt64120.h	/^#define GT_PCI1_CFGDATA_OFS	/;"	d
GT_PCI1_CMD_OFS	include/gt64120.h	/^#define GT_PCI1_CMD_OFS	/;"	d
GT_PCI1_CS20_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_CS20_BAR_OFS	/;"	d
GT_PCI1_CS3BT_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_CS3BT_BAR_OFS	/;"	d
GT_PCI1_IACK_OFS	include/gt64120.h	/^#define GT_PCI1_IACK_OFS	/;"	d
GT_PCI1_PREFMBR_OFS	include/gt64120.h	/^#define GT_PCI1_PREFMBR_OFS	/;"	d
GT_PCI1_SCS10_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_SCS10_BAR_OFS	/;"	d
GT_PCI1_SCS32_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_SCS32_BAR_OFS	/;"	d
GT_PCI1_SCS3BT_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_SCS3BT_BAR_OFS	/;"	d
GT_PCI1_SERR1MASK_OFS	include/gt64120.h	/^#define GT_PCI1_SERR1MASK_OFS	/;"	d
GT_PCI1_SSCS10_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_SSCS10_BAR_OFS	/;"	d
GT_PCI1_SSCS32_BAR_OFS	include/gt64120.h	/^#define GT_PCI1_SSCS32_BAR_OFS	/;"	d
GT_PCI1_TOR_OFS	include/gt64120.h	/^#define GT_PCI1_TOR_OFS	/;"	d
GT_PCI_DCRM_SHF	include/gt64120.h	/^#define GT_PCI_DCRM_SHF	/;"	d
GT_PCI_HD_MSK	include/gt64120.h	/^#define GT_PCI_HD_MSK	/;"	d
GT_PCI_HD_SHF	include/gt64120.h	/^#define GT_PCI_HD_SHF	/;"	d
GT_PCI_LD_MSK	include/gt64120.h	/^#define GT_PCI_LD_MSK	/;"	d
GT_PCI_LD_SHF	include/gt64120.h	/^#define GT_PCI_LD_SHF	/;"	d
GT_PCI_REMAP_MSK	include/gt64120.h	/^#define GT_PCI_REMAP_MSK	/;"	d
GT_PCI_REMAP_SHF	include/gt64120.h	/^#define GT_PCI_REMAP_SHF	/;"	d
GT_PORT_BE0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_BE0 /;"	d
GT_PORT_BE0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_BE0 /;"	d
GT_PORT_BE1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_BE1 /;"	d
GT_PORT_BE1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_BE1 /;"	d
GT_PORT_BE2	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_BE2 /;"	d
GT_PORT_BE2	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_BE2 /;"	d
GT_PORT_CPUM0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_CPUM0 /;"	d
GT_PORT_CPUM0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_CPUM0 /;"	d
GT_PORT_CPUM1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_PORT_CPUM1 /;"	d
GT_PORT_CPUM1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_PORT_CPUM1 /;"	d
GT_PORT_CPUM2	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_PORT_CPUM2 /;"	d
GT_PORT_CPUM2	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_PORT_CPUM2 /;"	d
GT_PORT_CPUS	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_CPUS /;"	d
GT_PORT_CPUS	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_CPUS /;"	d
GT_PORT_CSI	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_CSI /;"	d
GT_PORT_CSI	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_CSI /;"	d
GT_PORT_DMA	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_DMA /;"	d
GT_PORT_DMA	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_DMA /;"	d
GT_PORT_FD	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_FD /;"	d
GT_PORT_FD	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_FD /;"	d
GT_PORT_FE0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_FE0 /;"	d
GT_PORT_FE0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_FE0 /;"	d
GT_PORT_FE1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_FE1 /;"	d
GT_PORT_FE1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_FE1 /;"	d
GT_PORT_FE2	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_FE2 /;"	d
GT_PORT_FE2	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_FE2 /;"	d
GT_PORT_GMAC	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_GMAC /;"	d
GT_PORT_GMAC	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_GMAC /;"	d
GT_PORT_GPU0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_GPU0 /;"	d
GT_PORT_GPU0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_GPU0 /;"	d
GT_PORT_GPU1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_GPU1 /;"	d
GT_PORT_GPU1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_GPU1 /;"	d
GT_PORT_HSI	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_HSI /;"	d
GT_PORT_HSI	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_HSI /;"	d
GT_PORT_IEP0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_IEP0 /;"	d
GT_PORT_IEP0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_IEP0 /;"	d
GT_PORT_IEP1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_IEP1 /;"	d
GT_PORT_IEP1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_IEP1 /;"	d
GT_PORT_MP	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_MP /;"	d
GT_PORT_MP	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_MP /;"	d
GT_PORT_MSTG0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_MSTG0 /;"	d
GT_PORT_MSTG0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_MSTG0 /;"	d
GT_PORT_MSTG1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_MSTG1 /;"	d
GT_PORT_MSTG1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_MSTG1 /;"	d
GT_PORT_MSTG2	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_MSTG2 /;"	d
GT_PORT_MSTG2	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_MSTG2 /;"	d
GT_PORT_MSTG3	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_MSTG3 /;"	d
GT_PORT_MSTG3	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_MSTG3 /;"	d
GT_PORT_NDFC0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_NDFC0 /;"	d
GT_PORT_NDFC0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_NDFC0 /;"	d
GT_PORT_NDFC1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_NDFC1 /;"	d
GT_PORT_NDFC1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_NDFC1 /;"	d
GT_PORT_SATA	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_PORT_SATA /;"	d
GT_PORT_SATA	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_PORT_SATA /;"	d
GT_PORT_SS	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_SS /;"	d
GT_PORT_SS	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_SS /;"	d
GT_PORT_TH	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_TH /;"	d
GT_PORT_TH	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_TH /;"	d
GT_PORT_TS	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_TS /;"	d
GT_PORT_TS	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_TS /;"	d
GT_PORT_USB0	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_USB0 /;"	d
GT_PORT_USB0	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_USB0 /;"	d
GT_PORT_USB1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_USB1 /;"	d
GT_PORT_USB1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_USB1 /;"	d
GT_PORT_USB2	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_USB2 /;"	d
GT_PORT_USB2	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_USB2 /;"	d
GT_PORT_USB3	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_USB3 /;"	d
GT_PORT_USB3	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_USB3 /;"	d
GT_PORT_VED	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_VED /;"	d
GT_PORT_VED	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_VED /;"	d
GT_PORT_VEE	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define	GT_PORT_VEE /;"	d
GT_PORT_VEE	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define	GT_PORT_VEE /;"	d
GT_PRIO_HIGH	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_PRIO_HIGH /;"	d
GT_PRIO_HIGH	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_PRIO_HIGH /;"	d
GT_PRIO_LOW	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_PRIO_LOW /;"	d
GT_PRIO_LOW	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_PRIO_LOW /;"	d
GT_QOS_MAX	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_QOS_MAX /;"	d
GT_QOS_MAX	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_QOS_MAX /;"	d
GT_QOS_SHIFT	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_QOS_SHIFT /;"	d
GT_QOS_SHIFT	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_QOS_SHIFT /;"	d
GT_REQN_MAX	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_REQN_MAX /;"	d
GT_REQN_MAX	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_REQN_MAX /;"	d
GT_REQN_SHIFT	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_REQN_SHIFT /;"	d
GT_REQN_SHIFT	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_REQN_SHIFT /;"	d
GT_RETRY	drivers/video/broadwell_igd.c	/^#define GT_RETRY	/;"	d	file:
GT_SCS0HD_OFS	include/gt64120.h	/^#define GT_SCS0HD_OFS	/;"	d
GT_SCS0LD_OFS	include/gt64120.h	/^#define GT_SCS0LD_OFS	/;"	d
GT_SCS10AR_OFS	include/gt64120.h	/^#define GT_SCS10AR_OFS	/;"	d
GT_SCS10HD_OFS	include/gt64120.h	/^#define GT_SCS10HD_OFS	/;"	d
GT_SCS10LD_OFS	include/gt64120.h	/^#define GT_SCS10LD_OFS	/;"	d
GT_SCS1HD_OFS	include/gt64120.h	/^#define GT_SCS1HD_OFS	/;"	d
GT_SCS1LD_OFS	include/gt64120.h	/^#define GT_SCS1LD_OFS	/;"	d
GT_SCS2HD_OFS	include/gt64120.h	/^#define GT_SCS2HD_OFS	/;"	d
GT_SCS2LD_OFS	include/gt64120.h	/^#define GT_SCS2LD_OFS	/;"	d
GT_SCS32AR_OFS	include/gt64120.h	/^#define GT_SCS32AR_OFS	/;"	d
GT_SCS32HD_OFS	include/gt64120.h	/^#define GT_SCS32HD_OFS	/;"	d
GT_SCS32LD_OFS	include/gt64120.h	/^#define GT_SCS32LD_OFS	/;"	d
GT_SCS3HD_OFS	include/gt64120.h	/^#define GT_SCS3HD_OFS	/;"	d
GT_SCS3LD_OFS	include/gt64120.h	/^#define GT_SCS3LD_OFS	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_0	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_0	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_1	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_1	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_2	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_2	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_3	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_3	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_4	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_4	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_5	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_5	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_6	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_6	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_7	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_7	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_MSK	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_MSK	/;"	d
GT_SDRAM_ADDRDECODE_ADDR_SHF	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_ADDR_SHF	/;"	d
GT_SDRAM_ADDRDECODE_OFS	include/gt64120.h	/^#define GT_SDRAM_ADDRDECODE_OFS /;"	d
GT_SDRAM_B0_64BITINT_2	include/gt64120.h	/^#define GT_SDRAM_B0_64BITINT_2	/;"	d
GT_SDRAM_B0_64BITINT_4	include/gt64120.h	/^#define GT_SDRAM_B0_64BITINT_4	/;"	d
GT_SDRAM_B0_64BITINT_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_64BITINT_BIT	/;"	d
GT_SDRAM_B0_64BITINT_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_64BITINT_MSK	/;"	d
GT_SDRAM_B0_64BITINT_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_64BITINT_SHF	/;"	d
GT_SDRAM_B0_B0COMPAB_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_B0COMPAB_BIT	/;"	d
GT_SDRAM_B0_B0COMPAB_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_B0COMPAB_MSK	/;"	d
GT_SDRAM_B0_B0COMPAB_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_B0COMPAB_SHF	/;"	d
GT_SDRAM_B0_BLEN_4	include/gt64120.h	/^#define GT_SDRAM_B0_BLEN_4	/;"	d
GT_SDRAM_B0_BLEN_8	include/gt64120.h	/^#define GT_SDRAM_B0_BLEN_8	/;"	d
GT_SDRAM_B0_BLEN_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_BLEN_BIT	/;"	d
GT_SDRAM_B0_BLEN_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_BLEN_MSK	/;"	d
GT_SDRAM_B0_BLEN_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_BLEN_SHF	/;"	d
GT_SDRAM_B0_BLODD_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_BLODD_BIT	/;"	d
GT_SDRAM_B0_BLODD_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_BLODD_MSK	/;"	d
GT_SDRAM_B0_BLODD_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_BLODD_SHF	/;"	d
GT_SDRAM_B0_BW_32	include/gt64120.h	/^#define GT_SDRAM_B0_BW_32	/;"	d
GT_SDRAM_B0_BW_64	include/gt64120.h	/^#define GT_SDRAM_B0_BW_64	/;"	d
GT_SDRAM_B0_BW_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_BW_BIT	/;"	d
GT_SDRAM_B0_BW_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_BW_MSK	/;"	d
GT_SDRAM_B0_BW_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_BW_SHF	/;"	d
GT_SDRAM_B0_BYPASS_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_BYPASS_BIT	/;"	d
GT_SDRAM_B0_BYPASS_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_BYPASS_MSK	/;"	d
GT_SDRAM_B0_BYPASS_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_BYPASS_SHF	/;"	d
GT_SDRAM_B0_CASLAT_2	include/gt64120.h	/^#define GT_SDRAM_B0_CASLAT_2	/;"	d
GT_SDRAM_B0_CASLAT_3	include/gt64120.h	/^#define GT_SDRAM_B0_CASLAT_3	/;"	d
GT_SDRAM_B0_CASLAT_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_CASLAT_MSK	/;"	d
GT_SDRAM_B0_CASLAT_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_CASLAT_SHF	/;"	d
GT_SDRAM_B0_EXTPAR_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_EXTPAR_BIT	/;"	d
GT_SDRAM_B0_EXTPAR_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_EXTPAR_MSK	/;"	d
GT_SDRAM_B0_EXTPAR_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_EXTPAR_SHF	/;"	d
GT_SDRAM_B0_FTDIS_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_FTDIS_BIT	/;"	d
GT_SDRAM_B0_FTDIS_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_FTDIS_MSK	/;"	d
GT_SDRAM_B0_FTDIS_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_FTDIS_SHF	/;"	d
GT_SDRAM_B0_OFS	include/gt64120.h	/^#define GT_SDRAM_B0_OFS	/;"	d
GT_SDRAM_B0_PAR_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_PAR_BIT	/;"	d
GT_SDRAM_B0_PAR_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_PAR_MSK	/;"	d
GT_SDRAM_B0_PAR_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_PAR_SHF	/;"	d
GT_SDRAM_B0_SIZE_16M	include/gt64120.h	/^#define GT_SDRAM_B0_SIZE_16M	/;"	d
GT_SDRAM_B0_SIZE_64M	include/gt64120.h	/^#define GT_SDRAM_B0_SIZE_64M	/;"	d
GT_SDRAM_B0_SIZE_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_SIZE_BIT	/;"	d
GT_SDRAM_B0_SIZE_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_SIZE_MSK	/;"	d
GT_SDRAM_B0_SIZE_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_SIZE_SHF	/;"	d
GT_SDRAM_B0_SRAS2SCAS_2	include/gt64120.h	/^#define GT_SDRAM_B0_SRAS2SCAS_2	/;"	d
GT_SDRAM_B0_SRAS2SCAS_3	include/gt64120.h	/^#define GT_SDRAM_B0_SRAS2SCAS_3	/;"	d
GT_SDRAM_B0_SRAS2SCAS_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_SRAS2SCAS_BIT	/;"	d
GT_SDRAM_B0_SRAS2SCAS_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_SRAS2SCAS_MSK	/;"	d
GT_SDRAM_B0_SRAS2SCAS_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_SRAS2SCAS_SHF	/;"	d
GT_SDRAM_B0_SRASPRCHG_2	include/gt64120.h	/^#define GT_SDRAM_B0_SRASPRCHG_2	/;"	d
GT_SDRAM_B0_SRASPRCHG_3	include/gt64120.h	/^#define GT_SDRAM_B0_SRASPRCHG_3	/;"	d
GT_SDRAM_B0_SRASPRCHG_BIT	include/gt64120.h	/^#define GT_SDRAM_B0_SRASPRCHG_BIT	/;"	d
GT_SDRAM_B0_SRASPRCHG_MSK	include/gt64120.h	/^#define GT_SDRAM_B0_SRASPRCHG_MSK	/;"	d
GT_SDRAM_B0_SRASPRCHG_SHF	include/gt64120.h	/^#define GT_SDRAM_B0_SRASPRCHG_SHF	/;"	d
GT_SDRAM_B1_OFS	include/gt64120.h	/^#define GT_SDRAM_B1_OFS	/;"	d
GT_SDRAM_B2_OFS	include/gt64120.h	/^#define GT_SDRAM_B2_OFS	/;"	d
GT_SDRAM_B3_OFS	include/gt64120.h	/^#define GT_SDRAM_B3_OFS	/;"	d
GT_SDRAM_BM_OFS	include/gt64120.h	/^#define GT_SDRAM_BM_OFS	/;"	d
GT_SDRAM_BM_ORDER_BIT	include/gt64120.h	/^#define GT_SDRAM_BM_ORDER_BIT	/;"	d
GT_SDRAM_BM_ORDER_LIN	include/gt64120.h	/^#define GT_SDRAM_BM_ORDER_LIN	/;"	d
GT_SDRAM_BM_ORDER_MSK	include/gt64120.h	/^#define GT_SDRAM_BM_ORDER_MSK	/;"	d
GT_SDRAM_BM_ORDER_SHF	include/gt64120.h	/^#define GT_SDRAM_BM_ORDER_SHF	/;"	d
GT_SDRAM_BM_ORDER_SUB	include/gt64120.h	/^#define GT_SDRAM_BM_ORDER_SUB	/;"	d
GT_SDRAM_BM_RSVD_ALL1	include/gt64120.h	/^#define GT_SDRAM_BM_RSVD_ALL1	/;"	d
GT_SDRAM_CFG_DUPBA_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPBA_BIT	/;"	d
GT_SDRAM_CFG_DUPBA_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPBA_MSK	/;"	d
GT_SDRAM_CFG_DUPBA_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPBA_SHF	/;"	d
GT_SDRAM_CFG_DUPCNTL_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPCNTL_BIT	/;"	d
GT_SDRAM_CFG_DUPCNTL_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPCNTL_MSK	/;"	d
GT_SDRAM_CFG_DUPCNTL_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPCNTL_SHF	/;"	d
GT_SDRAM_CFG_DUPEOT0_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPEOT0_BIT	/;"	d
GT_SDRAM_CFG_DUPEOT0_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPEOT0_MSK	/;"	d
GT_SDRAM_CFG_DUPEOT0_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPEOT0_SHF	/;"	d
GT_SDRAM_CFG_DUPEOT1_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPEOT1_BIT	/;"	d
GT_SDRAM_CFG_DUPEOT1_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPEOT1_MSK	/;"	d
GT_SDRAM_CFG_DUPEOT1_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_DUPEOT1_SHF	/;"	d
GT_SDRAM_CFG_NINTERLEAVE_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_NINTERLEAVE_BIT	/;"	d
GT_SDRAM_CFG_NINTERLEAVE_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_NINTERLEAVE_MSK	/;"	d
GT_SDRAM_CFG_NINTERLEAVE_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_NINTERLEAVE_SHF	/;"	d
GT_SDRAM_CFG_NONSTAGREF_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_NONSTAGREF_BIT	/;"	d
GT_SDRAM_CFG_NONSTAGREF_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_NONSTAGREF_MSK	/;"	d
GT_SDRAM_CFG_NONSTAGREF_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_NONSTAGREF_SHF	/;"	d
GT_SDRAM_CFG_OFS	include/gt64120.h	/^#define GT_SDRAM_CFG_OFS	/;"	d
GT_SDRAM_CFG_REFINT_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_REFINT_MSK	/;"	d
GT_SDRAM_CFG_REFINT_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_REFINT_SHF	/;"	d
GT_SDRAM_CFG_RMW_BIT	include/gt64120.h	/^#define GT_SDRAM_CFG_RMW_BIT	/;"	d
GT_SDRAM_CFG_RMW_MSK	include/gt64120.h	/^#define GT_SDRAM_CFG_RMW_MSK	/;"	d
GT_SDRAM_CFG_RMW_SHF	include/gt64120.h	/^#define GT_SDRAM_CFG_RMW_SHF	/;"	d
GT_SDRAM_OPMODE_OFS	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OFS	/;"	d
GT_SDRAM_OPMODE_OP_CBR	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_CBR	/;"	d
GT_SDRAM_OPMODE_OP_MODE	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_MODE	/;"	d
GT_SDRAM_OPMODE_OP_MSK	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_MSK	/;"	d
GT_SDRAM_OPMODE_OP_NOP	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_NOP	/;"	d
GT_SDRAM_OPMODE_OP_NORMAL	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_NORMAL	/;"	d
GT_SDRAM_OPMODE_OP_PRCHG	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_PRCHG	/;"	d
GT_SDRAM_OPMODE_OP_SHF	include/gt64120.h	/^#define GT_SDRAM_OPMODE_OP_SHF	/;"	d
GT_TC0_OFS	include/gt64120.h	/^#define GT_TC0_OFS	/;"	d
GT_TC1_OFS	include/gt64120.h	/^#define GT_TC1_OFS	/;"	d
GT_TC2_OFS	include/gt64120.h	/^#define GT_TC2_OFS	/;"	d
GT_TC3_OFS	include/gt64120.h	/^#define GT_TC3_OFS	/;"	d
GT_TC_CONTROL_ENTC0_BIT	include/gt64120.h	/^#define GT_TC_CONTROL_ENTC0_BIT	/;"	d
GT_TC_CONTROL_ENTC0_MSK	include/gt64120.h	/^#define GT_TC_CONTROL_ENTC0_MSK	/;"	d
GT_TC_CONTROL_ENTC0_SHF	include/gt64120.h	/^#define GT_TC_CONTROL_ENTC0_SHF	/;"	d
GT_TC_CONTROL_OFS	include/gt64120.h	/^#define GT_TC_CONTROL_OFS	/;"	d
GT_TC_CONTROL_SELTC0_BIT	include/gt64120.h	/^#define GT_TC_CONTROL_SELTC0_BIT	/;"	d
GT_TC_CONTROL_SELTC0_MSK	include/gt64120.h	/^#define GT_TC_CONTROL_SELTC0_MSK	/;"	d
GT_TC_CONTROL_SELTC0_SHF	include/gt64120.h	/^#define GT_TC_CONTROL_SELTC0_SHF	/;"	d
GT_THD0_SHIFT	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_THD0_SHIFT /;"	d
GT_THD0_SHIFT	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_THD0_SHIFT /;"	d
GT_THD1_SHIFT	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_THD1_SHIFT /;"	d
GT_THD1_SHIFT	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_THD1_SHIFT /;"	d
GT_THD_MAX	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define GT_THD_MAX /;"	d
GT_THD_MAX	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define GT_THD_MAX /;"	d
GUI_ACTIVE	include/radeon.h	/^#define GUI_ACTIVE	/;"	d
GUI_SCRATCH_REG0	include/radeon.h	/^#define GUI_SCRATCH_REG0	/;"	d
GUI_SCRATCH_REG1	include/radeon.h	/^#define GUI_SCRATCH_REG1	/;"	d
GUI_SCRATCH_REG2	include/radeon.h	/^#define GUI_SCRATCH_REG2	/;"	d
GUI_SCRATCH_REG3	include/radeon.h	/^#define GUI_SCRATCH_REG3	/;"	d
GUI_SCRATCH_REG4	include/radeon.h	/^#define GUI_SCRATCH_REG4	/;"	d
GUI_SCRATCH_REG5	include/radeon.h	/^#define GUI_SCRATCH_REG5	/;"	d
GUMSTIX_ALTO35	board/overo/overo.c	/^#define GUMSTIX_ALTO35	/;"	d	file:
GUMSTIX_ARBOR43C	board/overo/overo.c	/^#define GUMSTIX_ARBOR43C	/;"	d	file:
GUMSTIX_CHESTNUT43	board/overo/overo.c	/^#define GUMSTIX_CHESTNUT43	/;"	d	file:
GUMSTIX_EMPTY_EEPROM	board/overo/overo.c	/^#define GUMSTIX_EMPTY_EEPROM	/;"	d	file:
GUMSTIX_GALLOP43	board/overo/overo.c	/^#define GUMSTIX_GALLOP43	/;"	d	file:
GUMSTIX_GPIO_USBH_CPEN	board/overo/overo.c	/^#define GUMSTIX_GPIO_USBH_CPEN	/;"	d	file:
GUMSTIX_NO_EEPROM	board/overo/overo.c	/^#define GUMSTIX_NO_EEPROM	/;"	d	file:
GUMSTIX_PALO35	board/overo/overo.c	/^#define GUMSTIX_PALO35	/;"	d	file:
GUMSTIX_PALO43	board/overo/overo.c	/^#define GUMSTIX_PALO43	/;"	d	file:
GUMSTIX_PEPPER	board/gumstix/pepper/board.h	/^#define GUMSTIX_PEPPER	/;"	d
GUMSTIX_PEPPER_DVI	board/gumstix/pepper/board.h	/^#define GUMSTIX_PEPPER_DVI	/;"	d
GUMSTIX_PINTO	board/overo/overo.c	/^#define GUMSTIX_PINTO	/;"	d	file:
GUMSTIX_STAGECOACH	board/overo/overo.c	/^#define GUMSTIX_STAGECOACH	/;"	d	file:
GUMSTIX_SUMMIT	board/overo/overo.c	/^#define GUMSTIX_SUMMIT	/;"	d	file:
GUMSTIX_THUMBO	board/overo/overo.c	/^#define GUMSTIX_THUMBO	/;"	d	file:
GUMSTIX_TOBI	board/overo/overo.c	/^#define GUMSTIX_TOBI	/;"	d	file:
GUMSTIX_TOBI_DUO	board/overo/overo.c	/^#define GUMSTIX_TOBI_DUO	/;"	d	file:
GUMSTIX_TURTLECORE	board/overo/overo.c	/^#define GUMSTIX_TURTLECORE	/;"	d	file:
GUNZIP	lib/zlib/inflate.h	/^#  define GUNZIP$/;"	d
GUNZIP	lib/zlib/zlib.h	/^#define GUNZIP$/;"	d
GURUPLUG_OE_HIGH	board/Marvell/guruplug/guruplug.h	/^#define GURUPLUG_OE_HIGH	/;"	d
GURUPLUG_OE_LOW	board/Marvell/guruplug/guruplug.h	/^#define GURUPLUG_OE_LOW	/;"	d
GURUPLUG_OE_VAL_HIGH	board/Marvell/guruplug/guruplug.h	/^#define GURUPLUG_OE_VAL_HIGH	/;"	d
GURUPLUG_OE_VAL_LOW	board/Marvell/guruplug/guruplug.h	/^#define GURUPLUG_OE_VAL_LOW	/;"	d
GUTS_PORDEVSR_OFFS	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define GUTS_PORDEVSR_OFFS	/;"	d	file:
GUTS_PORDEVSR_SERDES2_IO_SEL	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define GUTS_PORDEVSR_SERDES2_IO_SEL	/;"	d	file:
GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT	/;"	d	file:
GUTS_SVR	include/mpc86xx.h	/^#define GUTS_SVR	/;"	d
GUWKE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	GUWKE	/;"	d
GW51xx	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW51xx,$/;"	e	enum:__anonf4dca2650203
GW52xx	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW52xx,$/;"	e	enum:__anonf4dca2650203
GW53xx	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW53xx,$/;"	e	enum:__anonf4dca2650203
GW54proto	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW54proto, \/* original GW5400-A prototype *\/$/;"	e	enum:__anonf4dca2650203
GW54xx	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW54xx,$/;"	e	enum:__anonf4dca2650203
GW551x	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW551x,$/;"	e	enum:__anonf4dca2650203
GW552x	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW552x,$/;"	e	enum:__anonf4dca2650203
GW553x	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW553x,$/;"	e	enum:__anonf4dca2650203
GW_BADCRC	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW_BADCRC,$/;"	e	enum:__anonf4dca2650203
GW_UNKNOWN	board/gateworks/gw_ventana/ventana_eeprom.h	/^	GW_UNKNOWN,$/;"	e	enum:__anonf4dca2650203
GXBB_ETH_BASE	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_BASE	/;"	d
GXBB_ETH_REG_0	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_0	/;"	d
GXBB_ETH_REG_0_CLK_EN	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_0_CLK_EN	/;"	d
GXBB_ETH_REG_0_PHY_CLK_EN	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_0_PHY_CLK_EN	/;"	d
GXBB_ETH_REG_0_PHY_INTF	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_0_PHY_INTF	/;"	d
GXBB_ETH_REG_0_TX_PHASE	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_0_TX_PHASE(/;"	d
GXBB_ETH_REG_0_TX_RATIO	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_0_TX_RATIO(/;"	d
GXBB_ETH_REG_1	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_ETH_REG_1	/;"	d
GXBB_GCLK_MPEG_0	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GCLK_MPEG_0	/;"	d
GXBB_GCLK_MPEG_1	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GCLK_MPEG_1	/;"	d
GXBB_GCLK_MPEG_1_ETH	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GCLK_MPEG_1_ETH	/;"	d
GXBB_GCLK_MPEG_2	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GCLK_MPEG_2	/;"	d
GXBB_GCLK_MPEG_AO	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GCLK_MPEG_AO	/;"	d
GXBB_GCLK_MPEG_OTHER	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GCLK_MPEG_OTHER	/;"	d
GXBB_GPIO_EN	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GPIO_EN(/;"	d
GXBB_GPIO_IN	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GPIO_IN(/;"	d
GXBB_GPIO_OUT	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_GPIO_OUT(/;"	d
GXBB_HIU_ADDR	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_HIU_ADDR(/;"	d
GXBB_HIU_BASE	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_HIU_BASE	/;"	d
GXBB_MEM_PD_REG_0	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_MEM_PD_REG_0	/;"	d
GXBB_MEM_PD_REG_0_ETH_MASK	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_MEM_PD_REG_0_ETH_MASK	/;"	d
GXBB_PERIPHS_ADDR	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_PERIPHS_ADDR(/;"	d
GXBB_PERIPHS_BASE	arch/arm/include/asm/arch-meson/gxbb.h	/^#define GXBB_PERIPHS_BASE	/;"	d
GZIP	lib/zlib/deflate.h	/^#  define GZIP$/;"	d
G_DNL_MANUFACTURER	drivers/usb/gadget/Kconfig	/^config G_DNL_MANUFACTURER$/;"	c
G_DNL_PRODUCT_NUM	drivers/usb/gadget/Kconfig	/^config G_DNL_PRODUCT_NUM$/;"	c
G_DNL_VENDOR_NUM	drivers/usb/gadget/Kconfig	/^config G_DNL_VENDOR_NUM$/;"	c
G_SMRAME	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define  G_SMRAME	/;"	d
Gen_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^typedef struct i386_general_regs Gen_reg_t;$/;"	t	typeref:struct:i386_general_regs
General setup	Kconfig	/^menu "General setup"$/;"	m
GenerateStructs	tools/dtoc/dtoc	/^    def GenerateStructs(self, structs):$/;"	m	class:DtbPlatdata
GenerateStructs	tools/dtoc/dtoc.py	/^    def GenerateStructs(self, structs):$/;"	m	class:DtbPlatdata
GenerateTables	tools/dtoc/dtoc	/^    def GenerateTables(self):$/;"	m	class:DtbPlatdata
GenerateTables	tools/dtoc/dtoc.py	/^    def GenerateTables(self):$/;"	m	class:DtbPlatdata
Generic Driver Options	drivers/core/Kconfig	/^menu "Generic Driver Options"$/;"	m
GetActionSummary	tools/buildman/control.py	/^def GetActionSummary(is_summary, commits, selected, options):$/;"	f
GetAliasFile	tools/patman/gitutil.py	/^def GetAliasFile():$/;"	f
GetBool	tools/dtoc/fdt_util.py	/^def GetBool(node, propname, default=False):$/;"	f
GetBuf	tools/dtoc/dtoc	/^    def GetBuf(self):$/;"	m	class:DtbPlatdata
GetBuf	tools/dtoc/dtoc.py	/^    def GetBuf(self):$/;"	m	class:DtbPlatdata
GetBuildDir	tools/buildman/builder.py	/^    def GetBuildDir(self, commit_upto, target):$/;"	m	class:Builder
GetBuildOutcome	tools/buildman/builder.py	/^    def GetBuildOutcome(self, commit_upto, target, read_func_sizes,$/;"	m	class:Builder
GetByte	drivers/fpga/lattice.c	/^unsigned char GetByte(void)$/;"	f	typeref:typename:unsigned char
GetCompatName	tools/dtoc/dtoc	/^    def GetCompatName(self, node):$/;"	m	class:DtbPlatdata
GetCompatName	tools/dtoc/dtoc.py	/^    def GetCompatName(self, node):$/;"	m	class:DtbPlatdata
GetData	tools/patman/test.py	/^    def GetData(self, data_type):$/;"	m	class:TestPatch
GetDefaultSubjectPrefix	tools/patman/gitutil.py	/^def GetDefaultSubjectPrefix():$/;"	f
GetDefaultUserEmail	tools/patman/gitutil.py	/^def GetDefaultUserEmail():$/;"	f
GetDefaultUserName	tools/patman/gitutil.py	/^def GetDefaultUserName():$/;"	f
GetDict	tools/buildman/board.py	/^    def GetDict(self):$/;"	m	class:Boards
GetDoneFile	tools/buildman/builder.py	/^    def GetDoneFile(self, commit_upto, target):$/;"	m	class:Builder
GetEmpty	tools/dtoc/fdt.py	/^    def GetEmpty(self, type):$/;"	m	class:PropBase
GetErrFile	tools/buildman/builder.py	/^    def GetErrFile(self, commit_upto, target):$/;"	m	class:Builder
GetFdt	tools/dtoc/fdt_normal.py	/^    def GetFdt(self):$/;"	m	class:FdtNormal
GetFuncSizesFile	tools/buildman/builder.py	/^    def GetFuncSizesFile(self, commit_upto, target, elf_fname):$/;"	m	class:Builder
GetHead	tools/patman/gitutil.py	/^def GetHead():$/;"	f
GetI2CSDA	drivers/i2c/s3c24x0_i2c.c	/^static int GetI2CSDA(void)$/;"	f	typeref:typename:int	file:
GetInputFilename	tools/patman/tools.py	/^def GetInputFilename(fname):$/;"	f
GetInt	tools/dtoc/fdt_util.py	/^def GetInt(node, propname, default=None):$/;"	f
GetItems	tools/buildman/bsettings.py	/^def GetItems(section):$/;"	f
GetList	tools/buildman/board.py	/^    def GetList(self):$/;"	m	class:Boards
GetMaintainer	tools/patman/get_maintainer.py	/^def GetMaintainer(fname, verbose=False):$/;"	f
GetMakeArguments	tools/buildman/toolchain.py	/^    def GetMakeArguments(self, board):$/;"	m	class:Toolchains
GetMetaData	tools/patman/patchstream.py	/^def GetMetaData(start, count):$/;"	f
GetMetaDataForList	tools/patman/patchstream.py	/^def GetMetaDataForList(commit_range, git_dir=None, count=None,$/;"	f
GetNode	tools/dtoc/fdt.py	/^    def GetNode(self, path):$/;"	m	class:Fdt
GetObjdumpFile	tools/buildman/builder.py	/^    def GetObjdumpFile(self, commit_upto, target, elf_fname):$/;"	m	class:Builder
GetOffset	tools/dtoc/fdt.py	/^    def GetOffset(self):$/;"	m	class:PropBase
GetOffset	tools/dtoc/fdt_normal.py	/^    def GetOffset(self):$/;"	m	class:Prop
GetOutputFilename	tools/patman/tools.py	/^def GetOutputFilename(fname):$/;"	f
GetPatchPrefix	tools/patman/series.py	/^    def GetPatchPrefix(self):$/;"	m	class:Series
GetPathList	tools/buildman/toolchain.py	/^    def GetPathList(self, show_warning=True):$/;"	m	class:Toolchains
GetPhandle	tools/dtoc/fdt.py	/^    def GetPhandle(self):$/;"	m	class:PropBase
GetPlural	tools/buildman/control.py	/^def GetPlural(count):$/;"	f
GetPrintTestLines	tools/patman/terminal.py	/^def GetPrintTestLines():$/;"	f
GetPriority	tools/buildman/toolchain.py	/^    def GetPriority(self, fname):$/;"	m	class:Toolchain
GetProp	tools/dtoc/fdt_fallback.py	/^    def GetProp(self, node, prop, default=None, typespec=None):$/;"	m	class:FdtFallback
GetProps	tools/dtoc/fdt_fallback.py	/^    def GetProps(self, node):$/;"	m	class:FdtFallback
GetProps	tools/dtoc/fdt_normal.py	/^    def GetProps(self, node):$/;"	m	class:FdtNormal
GetRangeInBranch	tools/patman/gitutil.py	/^def GetRangeInBranch(git_dir, branch, include_upstream=False):$/;"	f
GetResultSummary	tools/buildman/builder.py	/^    def GetResultSummary(self, boards_selected, commit_upto, read_func_sizes,$/;"	m	class:Builder
GetRoot	tools/dtoc/fdt.py	/^    def GetRoot(self):$/;"	m	class:Fdt
GetSelected	tools/buildman/board.py	/^    def GetSelected(self):$/;"	m	class:Boards
GetSelectedDict	tools/buildman/board.py	/^    def GetSelectedDict(self):$/;"	m	class:Boards
GetSelectedNames	tools/buildman/board.py	/^    def GetSelectedNames(self):$/;"	m	class:Boards
GetSettings	tools/buildman/toolchain.py	/^    def GetSettings(self, show_warning=True):$/;"	m	class:Toolchains
GetSizesFile	tools/buildman/builder.py	/^    def GetSizesFile(self, commit_upto, target):$/;"	m	class:Builder
GetState	drivers/fpga/ivm_core.c	/^const char *GetState(unsigned char a_ucState)$/;"	f	typeref:typename:const char *
GetString	tools/dtoc/fdt_util.py	/^def GetString(node, propname, default=None):$/;"	f
GetStructOffset	tools/dtoc/fdt_normal.py	/^    def GetStructOffset(self, offset):$/;"	m	class:FdtNormal
GetSubNodes	tools/dtoc/fdt_fallback.py	/^    def GetSubNodes(self, node):$/;"	m	class:FdtFallback
GetThreadDir	tools/buildman/builder.py	/^    def GetThreadDir(self, thread_num):$/;"	m	class:Builder
GetTopLevel	tools/patman/gitutil.py	/^def GetTopLevel():$/;"	f
GetUpstream	tools/patman/gitutil.py	/^def GetUpstream(git_dir, branch):$/;"	f
GetValue	tools/dtoc/dtoc	/^    def GetValue(self, type, value):$/;"	m	class:DtbPlatdata
GetValue	tools/dtoc/dtoc.py	/^    def GetValue(self, type, value):$/;"	m	class:DtbPlatdata
GetWarningMsg	tools/patman/checkpatch.py	/^def GetWarningMsg(col, msg_type, fname, line, msg):$/;"	f
GetWrapper	tools/buildman/toolchain.py	/^    def GetWrapper(self, show_warning=True):$/;"	m	class:Toolchain
GigSpeed	drivers/net/ns8382x.c	/^	GigSpeed = 0x40000000,$/;"	e	enum:ChipConfigBits	file:
GmListElement	common/dlmalloc.c	/^struct GmListElement$/;"	s	file:
GmListElement	common/dlmalloc.c	/^typedef struct GmListElement GmListElement;$/;"	t	typeref:struct:GmListElement	file:
GraphicDevice	include/video_fb.h	/^} GraphicDevice;$/;"	t	typeref:struct:graphic_device
Graphics support	drivers/video/Kconfig	/^menu "Graphics support"$/;"	m
GuessUpstream	tools/patman/gitutil.py	/^def GuessUpstream(git_dir, branch):$/;"	f
H264_DEC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define H264_DEC_BASE_ADDR	/;"	d
H264_ENC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define H264_ENC_BASE_ADDR	/;"	d
H32MX_MAX_FREQ	drivers/clk/at91/clk-h32mx.c	/^#define H32MX_MAX_FREQ	/;"	d	file:
H32MX_SLAVE_EBI	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_EBI	/;"	d
H32MX_SLAVE_EBI	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_EBI	/;"	d
H32MX_SLAVE_H64MX_BRIDGE	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_H64MX_BRIDGE	/;"	d
H32MX_SLAVE_H64MX_BRIDGE	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_H64MX_BRIDGE	/;"	d
H32MX_SLAVE_NFC_CMD	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_NFC_CMD	/;"	d
H32MX_SLAVE_NFC_CMD	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_NFC_CMD	/;"	d
H32MX_SLAVE_NFC_SRAM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_NFC_SRAM	/;"	d
H32MX_SLAVE_NFC_SRAM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_NFC_SRAM	/;"	d
H32MX_SLAVE_PERIPH_BRIDGE0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_PERIPH_BRIDGE0	/;"	d
H32MX_SLAVE_PERIPH_BRIDGE0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_PERIPH_BRIDGE0	/;"	d
H32MX_SLAVE_PERIPH_BRIDGE1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_PERIPH_BRIDGE1	/;"	d
H32MX_SLAVE_PERIPH_BRIDGE1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_PERIPH_BRIDGE1	/;"	d
H32MX_SLAVE_SMD	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_SMD	/;"	d
H32MX_SLAVE_USB	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H32MX_SLAVE_USB	/;"	d
H32MX_SLAVE_USB	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H32MX_SLAVE_USB	/;"	d
H3_EMAC	drivers/net/sun8i_emac.c	/^	H3_EMAC,$/;"	e	enum:emac_variant	file:
H3_EPHY_ADDR_SHIFT	drivers/net/sun8i_emac.c	/^#define H3_EPHY_ADDR_SHIFT	/;"	d	file:
H3_EPHY_DEFAULT_MASK	drivers/net/sun8i_emac.c	/^#define H3_EPHY_DEFAULT_MASK	/;"	d	file:
H3_EPHY_DEFAULT_VALUE	drivers/net/sun8i_emac.c	/^#define H3_EPHY_DEFAULT_VALUE	/;"	d	file:
H3_EPHY_LED_POL	drivers/net/sun8i_emac.c	/^#define H3_EPHY_LED_POL	/;"	d	file:
H3_EPHY_SELECT	drivers/net/sun8i_emac.c	/^#define H3_EPHY_SELECT	/;"	d	file:
H3_EPHY_SHUTDOWN	drivers/net/sun8i_emac.c	/^#define H3_EPHY_SHUTDOWN	/;"	d	file:
H64MX_SLAVE_AESB	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_AESB	/;"	d
H64MX_SLAVE_AXIMX_BRIDGE	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_AXIMX_BRIDGE	/;"	d
H64MX_SLAVE_AXIMX_BRIDGE	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_AXIMX_BRIDGE	/;"	d
H64MX_SLAVE_CACHE_L2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_CACHE_L2	/;"	d
H64MX_SLAVE_DDRC_PORT0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT0	/;"	d
H64MX_SLAVE_DDRC_PORT0	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT0	/;"	d
H64MX_SLAVE_DDRC_PORT1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT1	/;"	d
H64MX_SLAVE_DDRC_PORT1	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT1	/;"	d
H64MX_SLAVE_DDRC_PORT2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT2	/;"	d
H64MX_SLAVE_DDRC_PORT2	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT2	/;"	d
H64MX_SLAVE_DDRC_PORT3	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT3	/;"	d
H64MX_SLAVE_DDRC_PORT3	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT3	/;"	d
H64MX_SLAVE_DDRC_PORT4	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT4	/;"	d
H64MX_SLAVE_DDRC_PORT4	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT4	/;"	d
H64MX_SLAVE_DDRC_PORT5	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT5	/;"	d
H64MX_SLAVE_DDRC_PORT5	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT5	/;"	d
H64MX_SLAVE_DDRC_PORT6	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT6	/;"	d
H64MX_SLAVE_DDRC_PORT6	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT6	/;"	d
H64MX_SLAVE_DDRC_PORT7	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_DDRC_PORT7	/;"	d
H64MX_SLAVE_DDRC_PORT7	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_DDRC_PORT7	/;"	d
H64MX_SLAVE_H32MX_BRIDGE	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_H32MX_BRIDGE	/;"	d
H64MX_SLAVE_PERIPH_BRIDGE	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_PERIPH_BRIDGE	/;"	d
H64MX_SLAVE_PERIPH_BRIDGE	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_PERIPH_BRIDGE	/;"	d
H64MX_SLAVE_QSPI0	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_QSPI0	/;"	d
H64MX_SLAVE_QSPI1	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_QSPI1	/;"	d
H64MX_SLAVE_SRAM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define H64MX_SLAVE_SRAM	/;"	d
H64MX_SLAVE_SRAM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_SRAM	/;"	d
H64MX_SLAVE_VDEC	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define H64MX_SLAVE_VDEC	/;"	d
H8300_SCI_DR	drivers/serial/serial_sh.h	/^# define H8300_SCI_DR(/;"	d
HAB_ALG	include/fsl_sec.h	/^#define HAB_ALG	/;"	d
HAB_CFG_CLOSED	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CFG_CLOSED = 0xcc	\/* < Secure IC *\/$/;"	e	enum:hab_config
HAB_CFG_OPEN	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CFG_OPEN = 0xf0,	\/* < Non-secure IC *\/$/;"	e	enum:hab_config
HAB_CFG_RETURN	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CFG_RETURN = 0x33,	\/* < Field Return IC *\/$/;"	e	enum:hab_config
HAB_CID_ROM	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_CID_ROM /;"	d
HAB_CID_UBOOT	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_CID_UBOOT /;"	d
HAB_CTX_ANY	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_ANY = 0x00,			\/* Match any context *\/$/;"	e	enum:hab_context
HAB_CTX_ASSERT	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_ASSERT = 0xa0,		\/* Event logged in hab_rvt.assert() *\/$/;"	e	enum:hab_context
HAB_CTX_AUTHENTICATE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_AUTHENTICATE = 0x0a,\/* Logged in hab_rvt.authenticate_image() *\/$/;"	e	enum:hab_context
HAB_CTX_AUT_DAT	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_AUT_DAT = 0xdb,		\/* Authenticated data block *\/$/;"	e	enum:hab_context
HAB_CTX_COMMAND	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_COMMAND = 0xc0,     \/* Event logged executing csf\/dcd command *\/$/;"	e	enum:hab_context
HAB_CTX_CSF	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_CSF = 0xcf,         \/* Event logged in hab_rvt.run_csf() *\/$/;"	e	enum:hab_context
HAB_CTX_DCD	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_DCD = 0xdd,         \/* Event logged in hab_rvt.run_dcd() *\/$/;"	e	enum:hab_context
HAB_CTX_ENTRY	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_ENTRY = 0xe1,		\/* Event logged in hab_rvt.entry() *\/$/;"	e	enum:hab_context
HAB_CTX_EXIT	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_EXIT = 0xee,		\/* Event logged in hab_rvt.exit() *\/$/;"	e	enum:hab_context
HAB_CTX_FAB	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_FAB = 0xff,		    \/* Event logged in hab_fab_test() *\/$/;"	e	enum:hab_context
HAB_CTX_MAX	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_MAX$/;"	e	enum:hab_context
HAB_CTX_TARGET	arch/arm/include/asm/imx-common/hab.h	/^	HAB_CTX_TARGET = 0x33,	    \/* Event logged in hab_rvt.check_target() *\/$/;"	e	enum:hab_context
HAB_ENG_ANY	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_ANY	/;"	d
HAB_ENG_CAAM	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_CAAM	/;"	d
HAB_ENG_CSU	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_CSU	/;"	d
HAB_ENG_DCP	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_DCP	/;"	d
HAB_ENG_DTCP	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_DTCP	/;"	d
HAB_ENG_FAIL	arch/arm/include/asm/imx-common/hab.h	/^	HAB_ENG_FAIL = 0x30,		\/* Engine failure *\/$/;"	e	enum:hab_reason
HAB_ENG_HDCP	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_HDCP	/;"	d
HAB_ENG_OCOTP	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_OCOTP	/;"	d
HAB_ENG_ROM	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_ROM	/;"	d
HAB_ENG_RTIC	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_RTIC	/;"	d
HAB_ENG_RTL	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_RTL	/;"	d
HAB_ENG_SAHARA	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_SAHARA /;"	d
HAB_ENG_SCC	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_SCC	/;"	d
HAB_ENG_SNVS	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_SNVS	/;"	d
HAB_ENG_SRTC	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_SRTC	/;"	d
HAB_ENG_SW	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_ENG_SW	/;"	d
HAB_FAILURE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_FAILURE = 0x33,$/;"	e	enum:hab_status
HAB_FLG	include/fsl_sec.h	/^#define HAB_FLG	/;"	d
HAB_INV_ADDRESS	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_ADDRESS = 0x22,		\/* Invalid address: access denied *\/$/;"	e	enum:hab_reason
HAB_INV_ASSERTION	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_ASSERTION = 0x0c,   \/* Invalid assertion *\/$/;"	e	enum:hab_reason
HAB_INV_CALL	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_CALL = 0x28,		\/* Function called out of sequence *\/$/;"	e	enum:hab_reason
HAB_INV_CERTIFICATE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_CERTIFICATE = 0x21, \/* Invalid certificate *\/$/;"	e	enum:hab_reason
HAB_INV_COMMAND	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_COMMAND = 0x06,     \/* Invalid command: command malformed *\/$/;"	e	enum:hab_reason
HAB_INV_CSF	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_CSF = 0x11,			\/* Invalid csf *\/$/;"	e	enum:hab_reason
HAB_INV_DCD	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_DCD = 0x27,			\/* Invalid dcd *\/$/;"	e	enum:hab_reason
HAB_INV_INDEX	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_INDEX = 0x0f,		\/* Invalid index: access denied *\/$/;"	e	enum:hab_reason
HAB_INV_IVT	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_IVT = 0x05,			\/* Invalid ivt *\/$/;"	e	enum:hab_reason
HAB_INV_KEY	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_KEY = 0x1d,			\/* Invalid key *\/$/;"	e	enum:hab_reason
HAB_INV_RETURN	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_RETURN = 0x1e,		\/* Failed callback function *\/$/;"	e	enum:hab_reason
HAB_INV_SIGNATURE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_SIGNATURE = 0x18,   \/* Invalid signature *\/$/;"	e	enum:hab_reason
HAB_INV_SIZE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_INV_SIZE = 0x17,		\/* Invalid data size *\/$/;"	e	enum:hab_reason
HAB_MEM_FAIL	arch/arm/include/asm/imx-common/hab.h	/^	HAB_MEM_FAIL = 0x2e,		\/* Memory failure *\/$/;"	e	enum:hab_reason
HAB_MOD	include/fsl_sec.h	/^#define HAB_MOD	/;"	d
HAB_OVR_COUNT	arch/arm/include/asm/imx-common/hab.h	/^	HAB_OVR_COUNT = 0x2b,		\/* Expired poll count *\/$/;"	e	enum:hab_reason
HAB_OVR_STORAGE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_OVR_STORAGE = 0x2d,		\/* Exhausted storage region *\/$/;"	e	enum:hab_reason
HAB_RSN_ANY	arch/arm/include/asm/imx-common/hab.h	/^	HAB_RSN_ANY = 0x00,			\/* Match any reason *\/$/;"	e	enum:hab_reason
HAB_RSN_MAX	arch/arm/include/asm/imx-common/hab.h	/^	HAB_RSN_MAX$/;"	e	enum:hab_reason
HAB_RVT_AUTHENTICATE_IMAGE	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_AUTHENTICATE_IMAGE	/;"	d
HAB_RVT_AUTHENTICATE_IMAGE_NEW	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_AUTHENTICATE_IMAGE_NEW /;"	d
HAB_RVT_BASE	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_BASE	/;"	d
HAB_RVT_ENTRY	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_ENTRY	/;"	d
HAB_RVT_ENTRY_NEW	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_ENTRY_NEW /;"	d
HAB_RVT_EXIT	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_EXIT	/;"	d
HAB_RVT_EXIT_NEW	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_EXIT_NEW /;"	d
HAB_RVT_REPORT_EVENT	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_REPORT_EVENT	/;"	d
HAB_RVT_REPORT_EVENT_NEW	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_REPORT_EVENT_NEW /;"	d
HAB_RVT_REPORT_STATUS	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_REPORT_STATUS	/;"	d
HAB_RVT_REPORT_STATUS_NEW	arch/arm/include/asm/imx-common/hab.h	/^#define HAB_RVT_REPORT_STATUS_NEW /;"	d
HAB_STATE_CHECK	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_CHECK = 0x55,		\/* Check state (non-secure) *\/$/;"	e	enum:hab_state
HAB_STATE_FAIL_HARD	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_FAIL_HARD = 0xff, \/* Hard fail state (terminal) *\/$/;"	e	enum:hab_state
HAB_STATE_FAIL_SOFT	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_FAIL_SOFT = 0xcc, \/* Soft fail state *\/$/;"	e	enum:hab_state
HAB_STATE_INITIAL	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_INITIAL = 0x33,	\/* Initialising state (transitory) *\/$/;"	e	enum:hab_state
HAB_STATE_MAX	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_MAX$/;"	e	enum:hab_state
HAB_STATE_NONE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_NONE = 0xf0,		\/* No security state machine *\/$/;"	e	enum:hab_state
HAB_STATE_NONSECURE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_NONSECURE = 0x66,	\/* Non-secure state *\/$/;"	e	enum:hab_state
HAB_STATE_SECURE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_SECURE = 0xaa,	\/* Secure state *\/$/;"	e	enum:hab_state
HAB_STATE_TRUSTED	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STATE_TRUSTED = 0x99,	\/* Trusted state *\/$/;"	e	enum:hab_state
HAB_STS_ANY	arch/arm/include/asm/imx-common/hab.h	/^	HAB_STS_ANY = 0x00,$/;"	e	enum:hab_status
HAB_SUCCESS	arch/arm/include/asm/imx-common/hab.h	/^	HAB_SUCCESS = 0xf0$/;"	e	enum:hab_status
HAB_UNS_ALGORITHM	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_ALGORITHM = 0x12,   \/* Unsupported algorithm *\/$/;"	e	enum:hab_reason
HAB_UNS_COMMAND	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_COMMAND = 0x03,		\/* Unsupported command *\/$/;"	e	enum:hab_reason
HAB_UNS_ENGINE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_ENGINE = 0x0a,		\/* Unsupported engine *\/$/;"	e	enum:hab_reason
HAB_UNS_ITEM	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_ITEM = 0x24,		\/* Unsupported configuration item *\/$/;"	e	enum:hab_reason
HAB_UNS_KEY	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_KEY = 0x1b,	        \/* Unsupported key type\/parameters *\/$/;"	e	enum:hab_reason
HAB_UNS_PROTOCOL	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_PROTOCOL = 0x14,	\/* Unsupported protocol *\/$/;"	e	enum:hab_reason
HAB_UNS_STATE	arch/arm/include/asm/imx-common/hab.h	/^	HAB_UNS_STATE = 0x09,		\/* Unsuitable state *\/$/;"	e	enum:hab_reason
HAB_WARNING	arch/arm/include/asm/imx-common/hab.h	/^	HAB_WARNING = 0x69,$/;"	e	enum:hab_status
HACACR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACACR	/;"	d
HACCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACCR	/;"	d
HACCSAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACCSAR	/;"	d
HACCSDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACCSDR	/;"	d
HACPCML	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACPCML	/;"	d
HACPCMR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACPCMR	/;"	d
HACRIER	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACRIER	/;"	d
HACRSR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACRSR	/;"	d
HACTIER	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACTIER	/;"	d
HACTSR	arch/sh/include/asm/cpu_sh7780.h	/^#define	HACTSR	/;"	d
HALF	include/miiphy.h	/^#define HALF	/;"	d
HALFDUP_GAP_TIME	drivers/net/pic32_eth.h	/^#define HALFDUP_GAP_TIME	/;"	d
HALF_CLK	arch/x86/cpu/quark/smc.h	/^#define HALF_CLK	/;"	d
HALF_DUPLEX	drivers/net/e1000.h	/^#define HALF_DUPLEX /;"	d
HALF_RATE	drivers/ddr/microchip/ddr2_regs.h	/^#define HALF_RATE	/;"	d
HALF_RATE_MODE	drivers/ddr/microchip/ddr2_regs.h	/^#define HALF_RATE_MODE	/;"	d
HALF_WORD_MASK	drivers/spi/rk_spi.h	/^	HALF_WORD_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
HALF_WORD_OFF	drivers/spi/rk_spi.h	/^	HALF_WORD_OFF,		\/* apb 8bit write\/read, spi 8bit write\/read *\/$/;"	e	enum:__anondde5bacc0103
HALF_WORD_ON	drivers/spi/rk_spi.h	/^	HALF_WORD_ON	= 0,	\/* apb 16bit write\/read, spi 8bit write\/read *\/$/;"	e	enum:__anondde5bacc0103
HALF_WORD_TX_SHIFT	drivers/spi/rk_spi.h	/^	HALF_WORD_TX_SHIFT = 13,	\/* Byte and Halfword Transform *\/$/;"	e	enum:__anondde5bacc0103
HALT	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define HALT	/;"	d	file:
HALTED_TO_HALT_REQ_MASK_0	arch/powerpc/include/asm/immap_85xx.h	/^#define HALTED_TO_HALT_REQ_MASK_0	/;"	d
HALT_COP_EVENT_FIQ_1	arch/arm/include/asm/arch-tegra/ap.h	/^#define HALT_COP_EVENT_FIQ_1	/;"	d
HALT_COP_EVENT_FIQ_1	arch/arm/mach-tegra/cpu.h	/^#define HALT_COP_EVENT_FIQ_1	/;"	d
HALT_COP_EVENT_IRQ_1	arch/arm/include/asm/arch-tegra/ap.h	/^#define HALT_COP_EVENT_IRQ_1	/;"	d
HALT_COP_EVENT_IRQ_1	arch/arm/mach-tegra/cpu.h	/^#define HALT_COP_EVENT_IRQ_1	/;"	d
HALT_COP_EVENT_JTAG	arch/arm/include/asm/arch-tegra/ap.h	/^#define HALT_COP_EVENT_JTAG	/;"	d
HALT_COP_EVENT_JTAG	arch/arm/mach-tegra/cpu.h	/^#define HALT_COP_EVENT_JTAG	/;"	d
HALT_SYS	drivers/bios_emulator/include/x86emu.h	/^#define HALT_SYS(/;"	d
HANDLER_MASK	arch/avr32/cpu/interrupts.c	/^#define HANDLER_MASK	/;"	d	file:
HANDLE_EXCEPTION	arch/openrisc/cpu/start.S	/^#define HANDLE_EXCEPTION	/;"	d	file:
HARD_LEBS_LIMIT	fs/ubifs/gc.c	/^#define HARD_LEBS_LIMIT /;"	d	file:
HARGS	cmd/hash.c	/^#define HARGS /;"	d	file:
HASH1	arch/powerpc/include/asm/processor.h	/^#define HASH1	/;"	d
HASH2	arch/powerpc/include/asm/processor.h	/^#define HASH2	/;"	d
HASHES_PER_LINE	net/nfs.c	/^#define HASHES_PER_LINE /;"	d	file:
HASHES_PER_LINE	net/tftp.c	/^#define HASHES_PER_LINE	/;"	d	file:
HASHH	drivers/net/smc911x.h	/^#define HASHH	/;"	d
HASHL	drivers/net/smc911x.h	/^#define HASHL	/;"	d
HASHSZ	scripts/basic/fixdep.c	/^#define HASHSZ /;"	d	file:
HASHTAB0	drivers/net/ax88180.h	/^#define HASHTAB0	/;"	d
HASHTAB1	drivers/net/ax88180.h	/^#define HASHTAB1	/;"	d
HASHTAB2	drivers/net/ax88180.h	/^#define HASHTAB2	/;"	d
HASHTAB3	drivers/net/ax88180.h	/^#define HASHTAB3	/;"	d
HASHTABLE_CTRL_ADDR_MASK	include/fsl_memac.h	/^#define HASHTABLE_CTRL_ADDR_MASK	/;"	d
HASHTABLE_CTRL_ADDR_MASK	include/fsl_tgec.h	/^#define HASHTABLE_CTRL_ADDR_MASK	/;"	d
HASHTABLE_CTRL_MCAST_EN	include/fsl_memac.h	/^#define HASHTABLE_CTRL_MCAST_EN	/;"	d
HASHTABLE_CTRL_MCAST_EN	include/fsl_tgec.h	/^#define HASHTABLE_CTRL_MCAST_EN	/;"	d
HASH_ADD	drivers/net/armada100_fec.h	/^#define HASH_ADD /;"	d
HASH_ADDR_TABLE_SIZE	drivers/net/armada100_fec.h	/^#define HASH_ADDR_TABLE_SIZE /;"	d
HASH_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define HASH_BASE_ADDR /;"	d
HASH_DELETE	drivers/net/armada100_fec.h	/^#define HASH_DELETE /;"	d
HASH_FLAG_ENV	include/hash.h	/^	HASH_FLAG_ENV		= 1 << 1,	\/* Allow env vars *\/$/;"	e	enum:__anon50dc7d720103
HASH_FLAG_VERIFY	include/hash.h	/^	HASH_FLAG_VERIFY	= 1 << 0,	\/* Enable verify mode *\/$/;"	e	enum:__anon50dc7d720103
HASH_LENGTH	arch/arm/include/asm/arch-tegra/warmboot.h	/^	HASH_LENGTH = 4$/;"	e	enum:__anonf37f1db20103
HASH_MAX_DIGEST_SIZE	include/hash.h	/^#define HASH_MAX_DIGEST_SIZE	/;"	d
HASH_TABLE_MASK_128K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_128K	/;"	d
HASH_TABLE_MASK_1M	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_1M	/;"	d
HASH_TABLE_MASK_256K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_256K	/;"	d
HASH_TABLE_MASK_2M	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_2M	/;"	d
HASH_TABLE_MASK_4M	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_4M	/;"	d
HASH_TABLE_MASK_512K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_512K	/;"	d
HASH_TABLE_MASK_64K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_MASK_64K	/;"	d
HASH_TABLE_SIZE_128K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_128K	/;"	d
HASH_TABLE_SIZE_1M	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_1M	/;"	d
HASH_TABLE_SIZE_256K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_256K	/;"	d
HASH_TABLE_SIZE_2M	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_2M	/;"	d
HASH_TABLE_SIZE_4M	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_4M	/;"	d
HASH_TABLE_SIZE_512K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_512K	/;"	d
HASH_TABLE_SIZE_64K	arch/powerpc/include/asm/mmu.h	/^#define HASH_TABLE_SIZE_64K	/;"	d
HASWELL_FAMILY_ULT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define HASWELL_FAMILY_ULT	/;"	d
HAS_IBM_MISC	drivers/net/ne2000.c	/^#define HAS_IBM_MISC	/;"	d	file:
HAS_MII	drivers/net/ne2000.c	/^#define HAS_MII	/;"	d	file:
HAS_MISC_REG	drivers/net/ne2000.c	/^#define HAS_MISC_REG	/;"	d	file:
HAS_RMII	board/Barix/ipam390/ipam390.c	/^#define HAS_RMII /;"	d	file:
HAS_RMII	board/davinci/da8xxevm/da850evm.c	/^#define HAS_RMII /;"	d	file:
HAS_RMII	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define HAS_RMII /;"	d	file:
HAS_RMII	board/davinci/ea20/ea20.c	/^#define HAS_RMII /;"	d	file:
HAS_THUMB2	arch/arm/Kconfig	/^config HAS_THUMB2$/;"	c	menu:ARM architecture
HAS_VBAR	arch/arm/Kconfig	/^config HAS_VBAR$/;"	c	menu:ARM architecture
HAVE_ARCH_IOREMAP	arch/Kconfig	/^config HAVE_ARCH_IOREMAP$/;"	c
HAVE_BLOCK_DEVICE	include/config_fallbacks.h	/^#define HAVE_BLOCK_DEVICE$/;"	d
HAVE_BLOCK_DEVICE	include/configs/blanche.h	/^#define HAVE_BLOCK_DEVICE$/;"	d
HAVE_BLOCK_DEVICE	include/configs/dragonboard410c.h	/^#define HAVE_BLOCK_DEVICE /;"	d
HAVE_CMC	arch/x86/cpu/quark/Kconfig	/^config HAVE_CMC$/;"	c
HAVE_CMC	arch/x86/cpu/queensbay/Kconfig	/^config HAVE_CMC$/;"	c
HAVE_DISABLE_HLT	arch/sh/include/asm/system.h	/^#define HAVE_DISABLE_HLT$/;"	d
HAVE_ERR_REMOVE_THREAD_STATE	lib/rsa/rsa-sign.c	/^#define HAVE_ERR_REMOVE_THREAD_STATE$/;"	d	file:
HAVE_FSP	arch/x86/Kconfig	/^config HAVE_FSP$/;"	c	menu:x86 architecture
HAVE_INTEL_ME	arch/x86/Kconfig	/^config HAVE_INTEL_ME$/;"	c	menu:x86 architecture
HAVE_IP	lib/lzo/lzo1x_decompress.c	/^#define HAVE_IP(/;"	d	file:
HAVE_LB	lib/lzo/lzo1x_decompress.c	/^#define HAVE_LB(/;"	d	file:
HAVE_MEMCPY	include/malloc.h	/^#define HAVE_MEMCPY$/;"	d
HAVE_MMAP	include/malloc.h	/^#define HAVE_MMAP /;"	d
HAVE_MRC	arch/x86/Kconfig	/^config HAVE_MRC$/;"	c	menu:x86 architecture
HAVE_OP	lib/lzo/lzo1x_decompress.c	/^#define HAVE_OP(/;"	d	file:
HAVE_PRIVATE_LIBGCC	lib/Kconfig	/^config HAVE_PRIVATE_LIBGCC$/;"	c	menu:Library routines
HAVE_REDUND	tools/env/fw_env.h	/^#define HAVE_REDUND /;"	d
HAVE_REFCODE	arch/x86/Kconfig	/^config HAVE_REFCODE$/;"	c	menu:x86 architecture
HAVE_RMU	arch/x86/cpu/quark/Kconfig	/^config HAVE_RMU$/;"	c
HAVE_SECTOR_T	arch/avr32/include/asm/types.h	/^#define HAVE_SECTOR_T$/;"	d
HAVE_VENDOR_COMMON_LIB	Makefile	/^HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)\/board\/$(VENDOR)\/common\/Makefile),y,n)$/;"	m
HAVE_VGA_BIOS	arch/x86/Kconfig	/^config HAVE_VGA_BIOS$/;"	c	menu:x86 architecture
HAWKEYE_AM35XX	arch/arm/include/asm/arch-omap3/omap.h	/^#define HAWKEYE_AM35XX	/;"	d
HAWKEYE_OMAP34XX	arch/arm/include/asm/arch-omap3/omap.h	/^#define HAWKEYE_OMAP34XX	/;"	d
HAWKEYE_OMAP36XX	arch/arm/include/asm/arch-omap3/omap.h	/^#define HAWKEYE_OMAP36XX	/;"	d
HAWKEYE_SHIFT	arch/arm/include/asm/arch-omap3/omap.h	/^#define HAWKEYE_SHIFT	/;"	d
HA_BA	include/usb/ehci-ci.h	/^#define HA_BA	/;"	d
HA_DATA_PULSE	include/usb/ehci-ci.h	/^#define HA_DATA_PULSE	/;"	d
HB_AHCI_BASE	board/highbank/highbank.c	/^#define HB_AHCI_BASE	/;"	d	file:
HB_PWR_HARD_RESET	board/highbank/highbank.c	/^#define HB_PWR_HARD_RESET	/;"	d	file:
HB_PWR_SHUTDOWN	board/highbank/highbank.c	/^#define HB_PWR_SHUTDOWN	/;"	d	file:
HB_PWR_SOFT_RESET	board/highbank/highbank.c	/^#define HB_PWR_SOFT_RESET	/;"	d	file:
HB_PWR_SUSPEND	board/highbank/highbank.c	/^#define HB_PWR_SUSPEND	/;"	d	file:
HB_SCU_A9_PWR_DORMANT	board/highbank/highbank.c	/^#define HB_SCU_A9_PWR_DORMANT	/;"	d	file:
HB_SCU_A9_PWR_NORMAL	board/highbank/highbank.c	/^#define HB_SCU_A9_PWR_NORMAL	/;"	d	file:
HB_SCU_A9_PWR_OFF	board/highbank/highbank.c	/^#define HB_SCU_A9_PWR_OFF	/;"	d	file:
HB_SCU_A9_PWR_STATUS	board/highbank/highbank.c	/^#define HB_SCU_A9_PWR_STATUS	/;"	d	file:
HB_SREG_A15_PWR_CTRL	board/highbank/highbank.c	/^#define HB_SREG_A15_PWR_CTRL	/;"	d	file:
HB_SREG_A9_BOOT_SRC_STAT	board/highbank/highbank.c	/^#define HB_SREG_A9_BOOT_SRC_STAT	/;"	d	file:
HB_SREG_A9_PWRDOM_STAT	board/highbank/highbank.c	/^#define HB_SREG_A9_PWRDOM_STAT	/;"	d	file:
HB_SREG_A9_PWR_REQ	board/highbank/highbank.c	/^#define HB_SREG_A9_PWR_REQ	/;"	d	file:
HB_SREG_SATA_ATTEN	board/highbank/ahci.c	/^#define HB_SREG_SATA_ATTEN	/;"	d	file:
HCATLBUFLEN	drivers/usb/host/isp116x.h	/^#define	HCATLBUFLEN	/;"	d
HCATLPORT	drivers/usb/host/isp116x.h	/^#define	HCATLPORT	/;"	d
HCBUFSTAT	drivers/usb/host/isp116x.h	/^#define	HCBUFSTAT	/;"	d
HCBUFSTAT_ATL_DONE	drivers/usb/host/isp116x.h	/^#define		HCBUFSTAT_ATL_DONE	/;"	d
HCBUFSTAT_ATL_FULL	drivers/usb/host/isp116x.h	/^#define		HCBUFSTAT_ATL_FULL	/;"	d
HCBUFSTAT_ITL0_DONE	drivers/usb/host/isp116x.h	/^#define		HCBUFSTAT_ITL0_DONE	/;"	d
HCBUFSTAT_ITL0_FULL	drivers/usb/host/isp116x.h	/^#define		HCBUFSTAT_ITL0_FULL	/;"	d
HCBUFSTAT_ITL1_DONE	drivers/usb/host/isp116x.h	/^#define		HCBUFSTAT_ITL1_DONE	/;"	d
HCBUFSTAT_ITL1_FULL	drivers/usb/host/isp116x.h	/^#define		HCBUFSTAT_ITL1_FULL	/;"	d
HCCHIPID	drivers/usb/host/isp116x.h	/^#define	HCCHIPID	/;"	d
HCCHIPID_MAGIC	drivers/usb/host/isp116x.h	/^#define		HCCHIPID_MAGIC	/;"	d
HCCHIPID_MASK	drivers/usb/host/isp116x.h	/^#define		HCCHIPID_MASK	/;"	d
HCCMDSTAT	drivers/usb/host/isp116x.h	/^#define	HCCMDSTAT	/;"	d
HCCMDSTAT_HCR	drivers/usb/host/isp116x.h	/^#define		HCCMDSTAT_HCR	/;"	d
HCCMDSTAT_SOC	drivers/usb/host/isp116x.h	/^#define		HCCMDSTAT_SOC	/;"	d
HCCONTROL	drivers/usb/host/isp116x.h	/^#define	HCCONTROL	/;"	d
HCCONTROL_HCFS	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_HCFS	/;"	d
HCCONTROL_RWC	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_RWC	/;"	d
HCCONTROL_RWE	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_RWE	/;"	d
HCCONTROL_USB_OPER	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_USB_OPER	/;"	d
HCCONTROL_USB_RESET	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_USB_RESET	/;"	d
HCCONTROL_USB_RESUME	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_USB_RESUME	/;"	d
HCCONTROL_USB_SUSPEND	drivers/usb/host/isp116x.h	/^#define		HCCONTROL_USB_SUSPEND	/;"	d
HCC_64BIT_ADDR	drivers/usb/host/xhci.h	/^#define HCC_64BIT_ADDR(/;"	d
HCC_64BYTE_CONTEXT	drivers/usb/host/xhci.h	/^#define HCC_64BYTE_CONTEXT(/;"	d
HCC_BANDWIDTH_NEG	drivers/usb/host/xhci.h	/^#define HCC_BANDWIDTH_NEG(/;"	d
HCC_EXT_CAPS	drivers/usb/host/xhci.h	/^#define HCC_EXT_CAPS(/;"	d
HCC_LIGHT_RESET	drivers/usb/host/xhci.h	/^#define HCC_LIGHT_RESET(/;"	d
HCC_LTC	drivers/usb/host/xhci.h	/^#define HCC_LTC(/;"	d
HCC_MAX_PSA	drivers/usb/host/xhci.h	/^#define HCC_MAX_PSA(/;"	d
HCC_NSS	drivers/usb/host/xhci.h	/^#define HCC_NSS(/;"	d
HCC_PPC	drivers/usb/host/xhci.h	/^#define HCC_PPC(/;"	d
HCDMACFG	drivers/usb/host/isp116x.h	/^#define	HCDMACFG	/;"	d
HCDMACFG_BUF_TYPE_MASK	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_BUF_TYPE_MASK	/;"	d
HCDMACFG_BURST_LEN	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_BURST_LEN(/;"	d
HCDMACFG_BURST_LEN_1	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_BURST_LEN_1	/;"	d
HCDMACFG_BURST_LEN_4	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_BURST_LEN_4	/;"	d
HCDMACFG_BURST_LEN_8	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_BURST_LEN_8	/;"	d
HCDMACFG_BURST_LEN_MASK	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_BURST_LEN_MASK	/;"	d
HCDMACFG_CTR_SEL	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_CTR_SEL	/;"	d
HCDMACFG_DMA_ENABLE	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_DMA_ENABLE	/;"	d
HCDMACFG_DMA_RW_SELECT	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_DMA_RW_SELECT	/;"	d
HCDMACFG_ITLATL_SEL	drivers/usb/host/isp116x.h	/^#define		HCDMACFG_ITLATL_SEL	/;"	d
HCFMINTVL	drivers/usb/host/isp116x.h	/^#define	HCFMINTVL	/;"	d
HCFMNUM	drivers/usb/host/isp116x.h	/^#define	HCFMNUM	/;"	d
HCFMREM	drivers/usb/host/isp116x.h	/^#define	HCFMREM	/;"	d
HCHALT_TIMEOUT	drivers/usb/host/ehci-hcd.c	/^#define HCHALT_TIMEOUT /;"	d	file:
HCHWCFG	drivers/usb/host/isp116x.h	/^#define	HCHWCFG	/;"	d
HCHWCFG_15KRSEL	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_15KRSEL	/;"	d
HCHWCFG_ANALOG_OC	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_ANALOG_OC	/;"	d
HCHWCFG_CLKNOTSTOP	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_CLKNOTSTOP	/;"	d
HCHWCFG_DACK_MODE	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_DACK_MODE	/;"	d
HCHWCFG_DACK_POL	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_DACK_POL	/;"	d
HCHWCFG_DBWIDTH	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_DBWIDTH(/;"	d
HCHWCFG_DBWIDTH_MASK	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_DBWIDTH_MASK	/;"	d
HCHWCFG_DREQ_POL	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_DREQ_POL	/;"	d
HCHWCFG_EOT_POL	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_EOT_POL	/;"	d
HCHWCFG_INT_ENABLE	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_INT_ENABLE	/;"	d
HCHWCFG_INT_POL	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_INT_POL	/;"	d
HCHWCFG_INT_TRIGGER	drivers/usb/host/isp116x.h	/^#define		HCHWCFG_INT_TRIGGER	/;"	d
HCINTDIS	drivers/usb/host/isp116x.h	/^#define	HCINTDIS	/;"	d
HCINTENB	drivers/usb/host/isp116x.h	/^#define	HCINTENB	/;"	d
HCINTSTAT	drivers/usb/host/isp116x.h	/^#define	HCINTSTAT	/;"	d
HCINT_FNO	drivers/usb/host/isp116x.h	/^#define		HCINT_FNO	/;"	d
HCINT_MIE	drivers/usb/host/isp116x.h	/^#define		HCINT_MIE	/;"	d
HCINT_OC	drivers/usb/host/isp116x.h	/^#define		HCINT_OC	/;"	d
HCINT_RD	drivers/usb/host/isp116x.h	/^#define		HCINT_RD	/;"	d
HCINT_RHSC	drivers/usb/host/isp116x.h	/^#define		HCINT_RHSC	/;"	d
HCINT_SF	drivers/usb/host/isp116x.h	/^#define		HCINT_SF	/;"	d
HCINT_SO	drivers/usb/host/isp116x.h	/^#define		HCINT_SO	/;"	d
HCINT_UE	drivers/usb/host/isp116x.h	/^#define		HCINT_UE	/;"	d
HCINT_WDH	drivers/usb/host/isp116x.h	/^#define		HCINT_WDH	/;"	d
HCITLBUFLEN	drivers/usb/host/isp116x.h	/^#define	HCITLBUFLEN	/;"	d
HCITLPORT	drivers/usb/host/isp116x.h	/^#define	HCITLPORT	/;"	d
HCI_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define HCI_BASE_ADDR /;"	d
HCLK_AHB1TOM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_AHB1TOM	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_AHB1TOM	/;"	d
HCLK_CM0S_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CM0S_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_CM0S_PMU	/;"	d
HCLK_CPU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CPU	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CPU	/;"	d
HCLK_CRYPTO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_CRYPTO	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_CRYPTO	/;"	d
HCLK_DIV	drivers/net/at91_emac.c	/^	#define HCLK_DIV	/;"	d	file:
HCLK_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_EMMC	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_EMMC	/;"	d
HCLK_GPS	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_GPS	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_GPS	/;"	d
HCLK_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP	/;"	d
HCLK_HDCP22	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP22	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP22	/;"	d
HCLK_HDCP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HDCP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HDCP_NOC	/;"	d
HCLK_HEVC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HEVC	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HEVC	/;"	d
HCLK_HOST0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0	/;"	d
HCLK_HOST0_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST0_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST0_ARB	/;"	d
HCLK_HOST1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1	/;"	d
HCLK_HOST1_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HOST1_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HOST1_ARB	/;"	d
HCLK_HSADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSADC	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSADC	/;"	d
HCLK_HSIC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_HSIC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_HSIC	/;"	d
HCLK_I2S	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_I2S	/;"	d
HCLK_I2S0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_I2S0	/;"	d
HCLK_I2S0_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S0_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S0_8CH	/;"	d
HCLK_I2S1_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S1_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S1_8CH	/;"	d
HCLK_I2S2_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_I2S2_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_I2S2_8CH	/;"	d
HCLK_IEP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP	/;"	d
HCLK_IEP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_IEP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_IEP_NOC	/;"	d
HCLK_ISP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ISP	/;"	d
HCLK_ISP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0	/;"	d
HCLK_ISP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_NOC	/;"	d
HCLK_ISP0_WRAPPER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP0_WRAPPER	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP0_WRAPPER	/;"	d
HCLK_ISP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1	/;"	d
HCLK_ISP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_NOC	/;"	d
HCLK_ISP1_WRAPPER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_ISP1_WRAPPER	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ISP1_WRAPPER	/;"	d
HCLK_LCDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_LCDC	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_LCDC	/;"	d
HCLK_M0_PERILP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP	/;"	d
HCLK_M0_PERILP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M0_PERILP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M0_PERILP_NOC	/;"	d
HCLK_M_CRYPTO0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO0	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO0	/;"	d
HCLK_M_CRYPTO1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_M_CRYPTO1	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_M_CRYPTO1	/;"	d
HCLK_NANDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_NANDC	/;"	d
HCLK_NANDC0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC0	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC0	/;"	d
HCLK_NANDC1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NANDC1	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_NANDC1	/;"	d
HCLK_NOC_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_NOC_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_NOC_PMU	/;"	d
HCLK_OTG0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG0	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_OTG0	/;"	d
HCLK_OTG1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_OTG1	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_OTG1	/;"	d
HCLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERI	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_PERI	/;"	d
HCLK_PERIHP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERIHP	/;"	d
HCLK_PERIHP_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERIHP_DIV_CON_MASK	= 3 << HCLK_PERIHP_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERIHP_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERIHP_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0	/;"	d
HCLK_PERILP0_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP0_DIV_CON_MASK	= 3 << HCLK_PERILP0_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP0_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP0_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP0_NOC	/;"	d
HCLK_PERILP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1	/;"	d
HCLK_PERILP1_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP1_DIV_CON_MASK	= 0x1f,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP1_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP1_DIV_CON_SHIFT	= 0,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_PERILP1_NOC	/;"	d
HCLK_PERILP1_PLL_SEL_CPLL	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP1_PLL_SEL_CPLL	= 0,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP1_PLL_SEL_GPLL	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP1_PLL_SEL_GPLL	= 1,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP1_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP1_PLL_SEL_MASK	= 1 << HCLK_PERILP1_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_PERILP1_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	HCLK_PERILP1_PLL_SEL_SHIFT	= 7,$/;"	e	enum:__anon06b9221d0103	file:
HCLK_RGA	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA	/;"	d
HCLK_RGA_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_RGA_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_RGA_NOC	/;"	d
HCLK_ROM	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_ROM	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_ROM	/;"	d
HCLK_SD	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SD	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SD	/;"	d
HCLK_SDIO	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO	/;"	d
HCLK_SDIO0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO0	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO0	/;"	d
HCLK_SDIO1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIO1	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDIO1	/;"	d
HCLK_SDIOAUDIO_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIOAUDIO_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIOAUDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDIO_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDIO_NOC	/;"	d
HCLK_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC	/;"	d
HCLK_SDMMC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SDMMC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SDMMC_NOC	/;"	d
HCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_SPDIF	/;"	d
HCLK_SPDIF8CH	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_SPDIF8CH	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_SPDIF8CH	/;"	d
HCLK_S_CRYPTO0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO0	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO0	/;"	d
HCLK_S_CRYPTO1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_S_CRYPTO1	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_S_CRYPTO1	/;"	d
HCLK_TSP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_TSP	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_TSP	/;"	d
HCLK_USBHOST0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST0	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST0	/;"	d
HCLK_USBHOST1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_USBHOST1	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_USBHOST1	/;"	d
HCLK_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC	/;"	d
HCLK_VCODEC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VCODEC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VCODEC_NOC	/;"	d
HCLK_VDU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU	/;"	d
HCLK_VDU_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VDU_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VDU_NOC	/;"	d
HCLK_VIO2_H2P	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO2_H2P	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO2_H2P	/;"	d
HCLK_VIO_AHB_ARBI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_AHB_ARBI	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_AHB_ARBI	/;"	d
HCLK_VIO_BUS	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_BUS	include/dt-bindings/clock/rk3036-cru.h	/^#define HCLK_VIO_BUS	/;"	d
HCLK_VIO_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIO_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIO_NIU	/;"	d
HCLK_VIP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VIP	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VIP	/;"	d
HCLK_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0	/;"	d
HCLK_VOP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP0_NOC	/;"	d
HCLK_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	include/dt-bindings/clock/rk3288-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1	/;"	d
HCLK_VOP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLK_VOP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define HCLK_VOP1_NOC	/;"	d
HCLSTHRESH	drivers/usb/host/isp116x.h	/^#define	HCLSTHRESH	/;"	d
HCONTROL_CMD_COMPLETE	drivers/block/fsl_sata.h	/^#define HCONTROL_CMD_COMPLETE	/;"	d
HCONTROL_DEVICE_ERR	drivers/block/fsl_sata.h	/^#define HCONTROL_DEVICE_ERR	/;"	d
HCONTROL_ENTERPRISE_EN	drivers/block/fsl_sata.h	/^#define HCONTROL_ENTERPRISE_EN	/;"	d
HCONTROL_FATAL_ERR	drivers/block/fsl_sata.h	/^#define HCONTROL_FATAL_ERR	/;"	d
HCONTROL_FORCE_OFFLINE	drivers/block/fsl_sata.h	/^#define HCONTROL_FORCE_OFFLINE	/;"	d
HCONTROL_HDR_SNOOP	drivers/block/fsl_sata.h	/^#define HCONTROL_HDR_SNOOP	/;"	d
HCONTROL_INT_EN_ALL	drivers/block/fsl_sata.h	/^#define HCONTROL_INT_EN_ALL	/;"	d
HCONTROL_ONOFF	drivers/block/fsl_sata.h	/^#define HCONTROL_ONOFF	/;"	d
HCONTROL_PHY_RDY	drivers/block/fsl_sata.h	/^#define HCONTROL_PHY_RDY	/;"	d
HCONTROL_PMP_ATTACHED	drivers/block/fsl_sata.h	/^#define HCONTROL_PMP_ATTACHED	/;"	d
HCONTROL_SIGNATURE	drivers/block/fsl_sata.h	/^#define HCONTROL_SIGNATURE	/;"	d
HCONTROL_SNOTIFY	drivers/block/fsl_sata.h	/^#define HCONTROL_SNOTIFY	/;"	d
HCRC	lib/zlib/inflate.h	/^    HCRC,       \/* i: waiting for header crc (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
HCRC_STATE	lib/zlib/deflate.h	/^#define HCRC_STATE /;"	d
HCRDITL0LEN	drivers/usb/host/isp116x.h	/^#define	HCRDITL0LEN	/;"	d
HCRDITL1LEN	drivers/usb/host/isp116x.h	/^#define	HCRDITL1LEN	/;"	d
HCREVISION	drivers/usb/host/isp116x.h	/^#define	HCREVISION	/;"	d
HCRHDESCA	drivers/usb/host/isp116x.h	/^#define	HCRHDESCA	/;"	d
HCRHDESCB	drivers/usb/host/isp116x.h	/^#define	HCRHDESCB	/;"	d
HCRHPORT1	drivers/usb/host/isp116x.h	/^#define	HCRHPORT1	/;"	d
HCRHPORT2	drivers/usb/host/isp116x.h	/^#define	HCRHPORT2	/;"	d
HCRHPORT_CLRMASK	drivers/usb/host/isp116x.h	/^#define		HCRHPORT_CLRMASK	/;"	d
HCRHSTATUS	drivers/usb/host/isp116x.h	/^#define	HCRHSTATUS	/;"	d
HCR_H_WAIT_1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define HCR_H_WAIT_1(/;"	d
HCR_H_WAIT_2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define HCR_H_WAIT_2(/;"	d
HCR_H_WIDTH	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define HCR_H_WIDTH(/;"	d
HCSCRATCH	drivers/usb/host/isp116x.h	/^#define	HCSCRATCH	/;"	d
HCSWRES	drivers/usb/host/isp116x.h	/^#define	HCSWRES	/;"	d
HCSWRES_MAGIC	drivers/usb/host/isp116x.h	/^#define		HCSWRES_MAGIC	/;"	d
HCS_ERST_MAX	drivers/usb/host/xhci.h	/^#define HCS_ERST_MAX(/;"	d
HCS_INDICATOR	drivers/usb/host/ehci.h	/^#define HCS_INDICATOR(/;"	d
HCS_INDICATOR	drivers/usb/host/xhci.h	/^#define HCS_INDICATOR(/;"	d
HCS_IST	drivers/usb/host/xhci.h	/^#define HCS_IST(/;"	d
HCS_MAX_INTRS	drivers/usb/host/xhci.h	/^#define HCS_MAX_INTRS(/;"	d
HCS_MAX_PORTS	drivers/usb/host/xhci.h	/^#define HCS_MAX_PORTS(/;"	d
HCS_MAX_PORTS_MASK	drivers/usb/host/xhci.h	/^#define HCS_MAX_PORTS_MASK	/;"	d
HCS_MAX_PORTS_SHIFT	drivers/usb/host/xhci.h	/^#define HCS_MAX_PORTS_SHIFT	/;"	d
HCS_MAX_SCRATCHPAD	drivers/usb/host/xhci.h	/^#define HCS_MAX_SCRATCHPAD(/;"	d
HCS_MAX_SLOTS	drivers/usb/host/xhci.h	/^#define HCS_MAX_SLOTS(/;"	d
HCS_N_PORTS	drivers/usb/host/ehci.h	/^#define HCS_N_PORTS(/;"	d
HCS_PPC	drivers/usb/host/ehci.h	/^#define HCS_PPC(/;"	d
HCS_SLOTS_MASK	drivers/usb/host/xhci.h	/^#define HCS_SLOTS_MASK	/;"	d
HCS_U1_LATENCY	drivers/usb/host/xhci.h	/^#define HCS_U1_LATENCY(/;"	d
HCS_U2_LATENCY	drivers/usb/host/xhci.h	/^#define HCS_U2_LATENCY(/;"	d
HCTS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,$/;"	e	enum:__anona307879b0103	file:
HCTS0_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS0_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS0_N_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS0_N_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS0_N_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HCTS0x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS0x_GMARK,$/;"	e	enum:__anona307945e0103	file:
HCTS0x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS0x_IMARK,$/;"	e	enum:__anona307945e0103	file:
HCTS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,$/;"	e	enum:__anona307879b0103	file:
HCTS1_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS1_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HCTS1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,$/;"	e	enum:__anona3077f190103	file:
HCTS1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HCTS1x_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS1x_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HCTS1x_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS1x_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HCTS2x_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS2x_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HCTS2x_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS2x_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HCTS3x_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS3x_MARK,$/;"	e	enum:__anona307945e0103	file:
HCTS4x_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HCTS4x_MARK,$/;"	e	enum:__anona307945e0103	file:
HCXFERCTR	drivers/usb/host/isp116x.h	/^#define	HCXFERCTR	/;"	d
HC_LENGTH	drivers/usb/host/ehci.h	/^#define HC_LENGTH(/;"	d
HC_LENGTH	drivers/usb/host/xhci.h	/^#define HC_LENGTH(/;"	d
HC_VERSION	drivers/usb/host/ehci.h	/^#define HC_VERSION(/;"	d
HC_VERSION	drivers/usb/host/xhci.h	/^#define HC_VERSION(/;"	d
HCuPINT	drivers/usb/host/isp116x.h	/^#define	HCuPINT	/;"	d
HCuPINTENB	drivers/usb/host/isp116x.h	/^#define	HCuPINTENB	/;"	d
HCuPINT_AIIEOT	drivers/usb/host/isp116x.h	/^#define		HCuPINT_AIIEOT	/;"	d
HCuPINT_ATL	drivers/usb/host/isp116x.h	/^#define		HCuPINT_ATL	/;"	d
HCuPINT_CLKRDY	drivers/usb/host/isp116x.h	/^#define		HCuPINT_CLKRDY	/;"	d
HCuPINT_OPR	drivers/usb/host/isp116x.h	/^#define		HCuPINT_OPR	/;"	d
HCuPINT_SOF	drivers/usb/host/isp116x.h	/^#define		HCuPINT_SOF	/;"	d
HCuPINT_SUSP	drivers/usb/host/isp116x.h	/^#define		HCuPINT_SUSP	/;"	d
HD44780_CLEAR_DISPLAY	board/work-microwave/work_92105/work_92105_display.c	/^#define HD44780_CLEAR_DISPLAY	/;"	d	file:
HD44780_DISPLAY_ON_OFF_CONTROL	board/work-microwave/work_92105/work_92105_display.c	/^#define HD44780_DISPLAY_ON_OFF_CONTROL	/;"	d	file:
HD44780_ENTRY_MODE_SET	board/work-microwave/work_92105/work_92105_display.c	/^#define HD44780_ENTRY_MODE_SET	/;"	d	file:
HD44780_FUNCTION_SET	board/work-microwave/work_92105/work_92105_display.c	/^#define HD44780_FUNCTION_SET	/;"	d	file:
HD44780_SET_CGRAM_ADDR	board/work-microwave/work_92105/work_92105_display.c	/^#define HD44780_SET_CGRAM_ADDR	/;"	d	file:
HD44780_SET_DDRAM_ADDR	board/work-microwave/work_92105/work_92105_display.c	/^#define HD44780_SET_DDRAM_ADDR	/;"	d	file:
HDA_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define HDA_DEV	/;"	d
HDBA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define HDBA	/;"	d
HDCP_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HDCP_FUNC_EN_N	/;"	d
HDCP_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define HDCP_FUNC_EN_N	/;"	d
HDCP_RDY	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HDCP_RDY	/;"	d
HDCP_RDY	arch/arm/mach-exynos/include/mach/dp.h	/^#define HDCP_RDY	/;"	d
HDCP_VIDEO_MUTE	arch/arm/mach-exynos/include/mach/dp.h	/^#define HDCP_VIDEO_MUTE	/;"	d
HDD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define HDD	/;"	d
HDD1_GREEN_LED	board/zyxel/nsa310s/nsa310s.h	/^#define HDD1_GREEN_LED	/;"	d
HDD1_RED_LED	board/zyxel/nsa310s/nsa310s.h	/^#define HDD1_RED_LED	/;"	d
HDD2_GREEN_LED	board/zyxel/nsa310s/nsa310s.h	/^#define HDD2_GREEN_LED	/;"	d
HDD2_POWER	board/zyxel/nsa310s/nsa310s.h	/^#define HDD2_POWER	/;"	d
HDESC_NUM	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define HDESC_NUM /;"	d
HDMI0_CEC_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HDMI0_CEC_MARK,$/;"	e	enum:__anona307945e0103	file:
HDMI1_CEC_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HDMI1_CEC_MARK,$/;"	e	enum:__anona307945e0103	file:
HDMIB_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   HDMIB_HOTPLUG_INT_EN	/;"	d
HDMIC_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   HDMIC_HOTPLUG_INT_EN	/;"	d
HDMID_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   HDMID_HOTPLUG_INT_EN	/;"	d
HDMI_AHB_DMA_BUFFSTAT_EMPTY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_BUFFSTAT_FULL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_BURST_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_HBR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_HBR = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_INCR16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_INCR16 = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_INCR4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_INCR4 = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_INCR8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_INCR8 = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_DONE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_DONE = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_ERROR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_ERROR = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_FIFO_EMPTY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_FIFO_EMPTY = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_FIFO_FULL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_FIFO_FULL = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_FIFO_THREMPTY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_FIFO_THREMPTY = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_LOSTOWNERSHIP	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_RETRY_SPLIT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_RETRY_SPLIT = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_START_START_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_START_START_MASK = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_START_START_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_START_START_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_STOP_STOP_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_STOP_STOP_MASK = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_AHB_DMA_STOP_STOP_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AHB_DMA_STOP_STOP_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define HDMI_ARB_BASE_ADDR /;"	d
HDMI_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define HDMI_ARB_END_ADDR /;"	d
HDMI_AUD_CONF0_I2S_IN_EN_0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF0_I2S_IN_EN_0 = 0x01,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF0_I2S_IN_EN_1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF0_I2S_IN_EN_1 = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF0_I2S_IN_EN_2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF0_I2S_IN_EN_2 = 0x04,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF0_I2S_IN_EN_3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF0_I2S_IN_EN_3 = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF0_I2S_SELECT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF0_I2S_SELECT = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF0_SW_AUDIO_FIFO_RST	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF0_SW_AUDIO_FIFO_RST = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF1_I2S_MODE_STANDARD_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF1_I2S_MODE_STANDARD_MODE = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CONF1_I2S_WIDTH_16BIT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CONF1_I2S_WIDTH_16BIT = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_AUDCTS19_16_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_AUDCTS19_16_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_CTS_MANUAL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_CTS_MANUAL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_1 = 0,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_1 = 0,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_128	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_128	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_16	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_256	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_256	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_32	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_32	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_64	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_64	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_CTS3_N_SHIFT_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,$/;"	e	enum:__anon173ec1180103
HDMI_AUD_CTS3_N_SHIFT_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_INPUTCLKFS_128	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_INPUTCLKFS_128 = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_N3_AUDN19_16_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_N3_AUDN19_16_MASK = 0x0f,$/;"	e	enum:__anonae42e8fa0203
HDMI_AUD_N3_NCTS_ATOMIC_WRITE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_AUD_N3_NCTS_ATOMIC_WRITE = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_A_HDCPCFG0_AVMUTE_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_AVMUTE_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_AVMUTE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_ELVENA_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_ELVENA_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_ELVENA_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_EN11FEATURE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_HDMIDVI_DVI	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_HDMIDVI_HDMI	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_HDMIDVI_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_I2CFASTMODE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_RXDETECT_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_RXDETECT_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_RXDETECT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG0_SYNCRICHECK_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_SWRESET_ASSERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_HDCPCFG1_SWRESET_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_DATAENPOL_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_HSYNCPOL_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_A_VIDPOLCFG_VSYNCPOL_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_CEC	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define HDMI_CEC	/;"	d
HDMI_CEC	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HDMI_CEC	/;"	d
HDMI_COMEXPRESS	board/renesas/stout/cpld.h	/^#define HDMI_COMEXPRESS	/;"	d
HDMI_COMEXPRESS_NODDC	board/renesas/stout/cpld.h	/^#define HDMI_COMEXPRESS_NODDC	/;"	d
HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_DECMODE_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_DECMODE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_DECMODE_MASK = 0x3,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_DECMODE_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_DECMODE_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_INTMODE_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_INTMODE_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_CSC_CFG_INTMODE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_INTMODE_MASK = 0x30,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_CFG_INTMODE_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_CFG_INTMODE_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSCSCALE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSCSCALE_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,$/;"	e	enum:__anonae42e8fa0203
HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,$/;"	e	enum:__anonae42e8fa0203
HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,$/;"	e	enum:__anonae42e8fa0203
HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,$/;"	e	enum:__anonae42e8fa0203
HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,$/;"	e	enum:__anon173ec1180103
HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xf0,$/;"	e	enum:__anonae42e8fa0203
HDMI_DDC_SCL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define HDMI_DDC_SCL	/;"	d
HDMI_DDC_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HDMI_DDC_SCL	/;"	d
HDMI_DDC_SDA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define HDMI_DDC_SDA	/;"	d
HDMI_DDC_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HDMI_DDC_SDA	/;"	d
HDMI_DVI_STAT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_DVI_STAT = 0xF2,$/;"	e	enum:__anon173ec1180103
HDMI_EDID_BLOCK_SIZE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^#define HDMI_EDID_BLOCK_SIZE /;"	d
HDMI_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define	HDMI_ENABLE	/;"	d
HDMI_FC_AUDICONF0_CC_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF0_CC_MASK = 0x70,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF0_CC_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF0_CC_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF0_CT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF0_CT_MASK = 0xF,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF0_CT_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF0_CT_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF1_SF_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF1_SF_MASK = 0x7,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF1_SF_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF1_SF_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF1_SS_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF1_SS_MASK = 0x18,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF1_SS_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF1_SS_OFFSET = 3,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF3_DM_INH_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF3_DM_INH_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF3_LFEPBL_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF3_LFEPBL_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF3_LSV_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF3_LSV_MASK = 0xF,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDICONF3_LSV_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDICONF3_LSV_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS0_CGMSA_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS7_ACCURACY_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_ACTIVE_FMT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_ACTIVE_FMT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_BAR_DATA_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_BAR_DATA_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0c,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_BAR_DATA_NO_DATA	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_BAR_DATA_NO_DATA	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0c,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_PIX_FMT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_PIX_FMT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_PIX_FMT_RGB	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_PIX_FMT_RGB	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_PIX_FMT_YCBCR422	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_PIX_FMT_YCBCR422	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_PIX_FMT_YCBCR444	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_PIX_FMT_YCBCR444	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_SCAN_INFO_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_SCAN_INFO_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_SCAN_INFO_NODATA	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_SCAN_INFO_NODATA	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0b,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0a,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0f,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xc0,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_COLORIMETRY_ITUR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_COLORIMETRY_ITUR	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_COLORIMETRY_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_COLORIMETRY_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xc0,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF1_COLORIMETRY_SMPTE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF1_COLORIMETRY_SMPTE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_IT_CONTENT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_IT_CONTENT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_IT_CONTENT_VALID	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_IT_CONTENT_VALID	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_RGB_QUANT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_RGB_QUANT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0c,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_SCALING_HORIZ	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_SCALING_HORIZ	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_SCALING_HORIZ_VERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_SCALING_HORIZ_vert	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_SCALING_HORIZ_vert = 0x03,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_SCALING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_SCALING_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_SCALING_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_SCALING_MASK = 0x03,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_SCALING_NONE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_SCALING_NONE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_SCALING_NONE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_SCALING_NONE = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF2_SCALING_VERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF2_SCALING_VERT = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF2_SCALING_VERT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF2_SCALING_VERT = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_QUANT_RANGE_FULL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_QUANT_RANGE_FULL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_AVICONF3_QUANT_RANGE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,$/;"	e	enum:__anon173ec1180103
HDMI_FC_AVICONF3_QUANT_RANGE_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0c,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_DBGFORCE_FORCEAUDIO	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_DBGFORCE_FORCEVIDEO	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_FC_GCP_CLEAR_AVMUTE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_GCP_CLEAR_AVMUTE = 0x01,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_GCP_SET_AVMUTE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_GCP_SET_AVMUTE = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INT2_OVERFLOW_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INT2_OVERFLOW_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_DVI_MODEZ_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_DVI_MODEZ_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_IN_I_P_INTERLACED	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_IN_I_P_INTERLACED	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_IN_I_P_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_IN_I_P_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_FC_MASK2_OVERFLOW_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_MASK2_OVERFLOW_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,$/;"	e	enum:__anon173ec1180103
HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_FC_STAT2_OVERFLOW_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_FC_STAT2_OVERFLOW_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_HPD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define HDMI_HPD	/;"	d
HDMI_HPD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HDMI_HPD	/;"	d
HDMI_I2CM_DIV_FAST_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_DIV_FAST_MODE = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_DIV_FAST_STD_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_DIV_STD_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_DIV_STD_MODE = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_OPT_RD8	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_OPT_RD8 = 0x4,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_OPT_RD8_EXT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_OPT_RD8_EXT = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_SEGADDR_DDC	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_SEGADDR_DDC = 0x30,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_SLAVE_DDC_ADDR	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_SLAVE_DDC_ADDR = 0x50,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2CM_SOFTRSTZ	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_I2CM_SOFTRSTZ = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_I2C_ADDR	board/gdsys/common/adv7611.c	/^	HDMI_I2C_ADDR = 0x34,$/;"	e	enum:__anon3d55bc280103	file:
HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_IH_AHBDMAAUD_STAT0_DONE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_IH_AHBDMAAUD_STAT0_ERROR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_IH_AHBDMAAUD_STAT0_LOST	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_IH_AHBDMAAUD_STAT0_RETRY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_IH_FC_INT2_OVERFLOW_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_IH_FC_STAT2_OVERFLOW_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_MUTE_ALL_INTERRUPT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_MUTE_ALL_INTERRUPT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_IH_PHY_STAT0_HPD	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_PHY_STAT0_HPD = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_IH_PHY_STAT0_HPD	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_IH_PHY_STAT0_HPD = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_IH_PHY_STAT0_RX_SENSE0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_IH_PHY_STAT0_RX_SENSE1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_IH_PHY_STAT0_RX_SENSE2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_IH_PHY_STAT0_RX_SENSE3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_IH_PHY_STAT0_TX_PHY_LOCK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_AUDCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_AUDCLK_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_CLKDIS_CECCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_CSCCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_HDCPCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_PIXELCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_PIXELCLK_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_CLKDIS_PREPCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_TMDSCLK_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_MC_CLKDIS_TMDSCLK_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_MC_HEACPHY_RST_ASSERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_MC_HEACPHY_RST_ASSERT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_HEACPHY_RST_DEASSERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_HEACPHY_RST_DEASSERT = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_MC_PHYRSTZ_ASSERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_PHYRSTZ_ASSERT = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_MC_PHYRSTZ_ASSERT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_PHYRSTZ_ASSERT = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_PHYRSTZ_DEASSERT	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_PHYRSTZ_DEASSERT = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_MC_PHYRSTZ_DEASSERT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_PHYRSTZ_DEASSERT = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_SWRSTZ_II2SSWRST_REQ	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_SWRSTZ_II2SSWRST_REQ = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_MC_SWRSTZ_TMDSSWRST_REQ	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_MC_SWRSTZ_TMDSSWRST_REQ	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_MSK	board/renesas/stout/cpld.h	/^#define HDMI_MSK	/;"	d
HDMI_NRST	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	HDMI_NRST,$/;"	e	enum:qn	file:
HDMI_OFF	board/renesas/stout/cpld.h	/^#define HDMI_OFF	/;"	d
HDMI_ONBOARD	board/renesas/stout/cpld.h	/^#define HDMI_ONBOARD	/;"	d
HDMI_ONBOARD_NODDC	board/renesas/stout/cpld.h	/^#define HDMI_ONBOARD_NODDC	/;"	d
HDMI_PHY_CONF0_ENTMDS_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_ENTMDS_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_ENTMDS_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_ENTMDS_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_GEN2_PDDQ_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_GEN2_PDDQ_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_GEN2_TXPWRON_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_GEN2_TXPWRON_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_PDZ_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_PDZ_MASK = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_PDZ_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_PDZ_MASK = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_PDZ_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_PDZ_OFFSET = 7,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_PDZ_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_PDZ_OFFSET = 7,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_SELDATAENPOL_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_SELDATAENPOL_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_SELDATAENPOL_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_SELDATAENPOL_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_SELDIPIF_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_SELDIPIF_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_SELDIPIF_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_SELDIPIF_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_SPARECTRL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_CONF0_SPARECTRL = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_CONF0_SPARECTRL_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_CONF0_SPARECTRL_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_HPD	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_HPD = 0x02,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_HPD	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_HPD = 0x02,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_I2CM_INT_ADDR_DONE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_INT_ADDR_DONE_POL	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_INT_ADDR_DONE_POL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_I2CM_OPERATION_ADDR_READ	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_OPERATION_ADDR_WRITE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_OPERATION_ADDR_WRITE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_RX_SENSE0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_RX_SENSE0 = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_RX_SENSE1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_RX_SENSE1 = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_RX_SENSE2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_RX_SENSE2 = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_RX_SENSE3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_RX_SENSE3 = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TST0_TSTCLK_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TST0_TSTCLK_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TST0_TSTCLK_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TST0_TSTCLK_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TST0_TSTCLR_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TST0_TSTCLR_MASK = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TST0_TSTCLR_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_TST0_TSTCLR_MASK = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_TST0_TSTCLR_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TST0_TSTCLR_OFFSET = 5,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TST0_TSTCLR_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_TST0_TSTCLR_OFFSET = 5,$/;"	e	enum:__anonae42e8fa0203
HDMI_PHY_TST0_TSTEN_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TST0_TSTEN_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TST0_TSTEN_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TST0_TSTEN_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TX_PHY_LOCK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_PHY_TX_PHY_LOCK = 0x01,$/;"	e	enum:__anon173ec1180103
HDMI_PHY_TX_PHY_LOCK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_PHY_TX_PHY_LOCK = 0x01,$/;"	e	enum:__anonae42e8fa0203
HDMI_RST_B	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	HDMI_RST_B,$/;"	e	enum:qn	file:
HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,$/;"	e	enum:__anonae42e8fa0203
HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INVID0_VIDEO_MAPPING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INVID0_VIDEO_MAPPING_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1f,$/;"	e	enum:__anonae42e8fa0203
HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_BYPASS_EN_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_BYPASS_EN_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_BYPASS_EN_ENABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_BYPASS_EN_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_BYPASS_EN_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_BYPASS_SELECT_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_BYPASS_SELECT_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_OUTPUT_SELECTOR_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_OUTPUT_SELECTOR_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_OUTPUT_SELECTOR_PP	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PP_EN_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_PP_EN_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PP_EN_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_PP_EN_DISABLE = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_PP_EN_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_PP_EN_ENABLE = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PP_EN_ENMASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_PP_EN_ENMASK = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PP_EN_ENMASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_PP_EN_ENMASK = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_PR_EN_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_PR_EN_DISABLE = 0x00,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PR_EN_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_PR_EN_DISABLE = 0x00,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_PR_EN_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_PR_EN_ENABLE = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PR_EN_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_PR_EN_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_PR_EN_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_PR_EN_MASK = 0x10,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_YCC422_EN_DISABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_YCC422_EN_DISABLE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_CONF_YCC422_EN_ENABLE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_YCC422_EN_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_CONF_YCC422_EN_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_VP_CONF_YCC422_EN_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_CONF_YCC422_EN_MASK = 0x8,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_PR_CD_COLOR_DEPTH_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_PR_CD_COLOR_DEPTH_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xf0,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F,$/;"	e	enum:__anon173ec1180103
HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0f,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_REMAP_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_REMAP_MASK = 0x3,$/;"	e	enum:__anon173ec1180103
HDMI_VP_REMAP_YCC422_16BIT	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_REMAP_YCC422_16BIT = 0x0,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_REMAP_YCC422_16bit	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_REMAP_YCC422_16bit = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_REMAP_YCC422_20bit	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_REMAP_YCC422_20bit = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_VP_REMAP_YCC422_24bit	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_REMAP_YCC422_24bit = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_IDEFAULT_PHASE_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_IDEFAULT_PHASE_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PP_STUFFING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PP_STUFFING_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PR_STUFFING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PR_STUFFING_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_YCC422_STUFFING_MASK	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_YCC422_STUFFING_MASK	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,$/;"	e	enum:__anonae42e8fa0203
HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,$/;"	e	enum:__anon173ec1180103
HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,$/;"	e	enum:__anonae42e8fa0203
HDM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define HDM_BASE_ADDR /;"	d
HDP_DEBUG	include/radeon.h	/^#define HDP_DEBUG	/;"	d
HDP_SOFT_RESET	include/radeon.h	/^#define HDP_SOFT_RESET	/;"	d
HDQ_SIO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define HDQ_SIO	/;"	d
HDR	include/lattice.h	/^#define HDR	/;"	d
HDR_DESCLEN_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_DESCLEN_MASK	/;"	d
HDR_DESCLEN_SHR_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_DESCLEN_SHR_MASK	/;"	d
HDR_DNR	drivers/crypto/fsl/desc.h	/^#define HDR_DNR	/;"	d
HDR_ETH_ALEN	board/birdland/bav335x/board.h	/^#define HDR_ETH_ALEN	/;"	d
HDR_ETH_ALEN	board/bosch/shc/board.h	/^#define HDR_ETH_ALEN	/;"	d
HDR_ETH_ALEN	board/vscom/baltos/board.h	/^#define HDR_ETH_ALEN	/;"	d
HDR_FATC_LEN	board/bosch/shc/board.h	/^#define HDR_FATC_LEN	/;"	d
HDR_JD_LENGTH_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_JD_LENGTH_MASK	/;"	d
HDR_JD_SHARE_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_JD_SHARE_MASK	/;"	d
HDR_JD_SHARE_SHIFT	drivers/crypto/fsl/desc.h	/^#define HDR_JD_SHARE_SHIFT	/;"	d
HDR_MAGIC	board/bosch/shc/board.h	/^#define HDR_MAGIC	/;"	d
HDR_MAKE_TRUSTED	drivers/crypto/fsl/desc.h	/^#define HDR_MAKE_TRUSTED	/;"	d
HDR_NAME_LEN	board/birdland/bav335x/board.h	/^#define HDR_NAME_LEN	/;"	d
HDR_NAME_LEN	board/bosch/shc/board.h	/^#define HDR_NAME_LEN	/;"	d
HDR_NAME_LEN	board/vscom/baltos/board.h	/^#define HDR_NAME_LEN	/;"	d
HDR_NO_OF_MAC_ADDR	board/birdland/bav335x/board.h	/^#define HDR_NO_OF_MAC_ADDR	/;"	d
HDR_NO_OF_MAC_ADDR	board/vscom/baltos/board.h	/^#define HDR_NO_OF_MAC_ADDR	/;"	d
HDR_ONE	drivers/crypto/fsl/desc.h	/^#define HDR_ONE	/;"	d
HDR_PAR	include/fsl_sec.h	/^#define HDR_PAR	/;"	d
HDR_PROP_DNR	drivers/crypto/fsl/desc.h	/^#define HDR_PROP_DNR	/;"	d
HDR_REVERSE	drivers/crypto/fsl/desc.h	/^#define HDR_REVERSE	/;"	d
HDR_REV_LEN	board/bosch/shc/board.h	/^#define HDR_REV_LEN	/;"	d
HDR_ROOT_LEN	board/bosch/shc/board.h	/^#define HDR_ROOT_LEN	/;"	d
HDR_SAVECTX	drivers/crypto/fsl/desc.h	/^#define HDR_SAVECTX	/;"	d
HDR_SD_LENGTH_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_SD_LENGTH_MASK	/;"	d
HDR_SD_SHARE_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_SD_SHARE_MASK	/;"	d
HDR_SD_SHARE_SHIFT	drivers/crypto/fsl/desc.h	/^#define HDR_SD_SHARE_SHIFT	/;"	d
HDR_SER_LEN	board/bosch/shc/board.h	/^#define HDR_SER_LEN	/;"	d
HDR_SHARED	drivers/crypto/fsl/desc.h	/^#define HDR_SHARED	/;"	d
HDR_SHARE_ALWAYS	drivers/crypto/fsl/desc.h	/^#define HDR_SHARE_ALWAYS	/;"	d
HDR_SHARE_DEFER	drivers/crypto/fsl/desc.h	/^#define HDR_SHARE_DEFER	/;"	d
HDR_SHARE_NEVER	drivers/crypto/fsl/desc.h	/^#define HDR_SHARE_NEVER	/;"	d
HDR_SHARE_SERIAL	drivers/crypto/fsl/desc.h	/^#define HDR_SHARE_SERIAL	/;"	d
HDR_SHARE_WAIT	drivers/crypto/fsl/desc.h	/^#define HDR_SHARE_WAIT	/;"	d
HDR_START_IDX_MASK	drivers/crypto/fsl/desc.h	/^#define HDR_START_IDX_MASK	/;"	d
HDR_START_IDX_SHIFT	drivers/crypto/fsl/desc.h	/^#define HDR_START_IDX_SHIFT	/;"	d
HDR_TAG	include/fsl_sec.h	/^#define HDR_TAG	/;"	d
HDR_TRUSTED	drivers/crypto/fsl/desc.h	/^#define HDR_TRUSTED	/;"	d
HDR_ZRO	drivers/crypto/fsl/desc.h	/^#define HDR_ZRO	/;"	d
HD_RESOLUTION	include/libtizen.h	/^#define HD_RESOLUTION	/;"	d
HEAD	cmd/fdc.c	/^#define HEAD	/;"	d	file:
HEAD	lib/zlib/inflate.h	/^    HEAD,       \/* i: waiting for magic header *\/$/;"	e	enum:__anon43d5a4c40103
HEADER	include/lattice.h	/^#define HEADER	/;"	d
HEADER	include/radeon.h	/^#define HEADER	/;"	d
HEADER0	lib/gunzip.c	/^#define HEADER0	/;"	d	file:
HEADER1	lib/gunzip.c	/^#define HEADER1	/;"	d	file:
HEADER_HAS_FILTER	lib/lzo/lzo1x_decompress.c	/^#define HEADER_HAS_FILTER	/;"	d	file:
HEADER_IMAGEIDENTIFIER	tools/zynqimage.c	/^#define HEADER_IMAGEIDENTIFIER /;"	d	file:
HEADER_IMAGEIDENTIFIER	tools/zynqmpimage.c	/^#define HEADER_IMAGEIDENTIFIER /;"	d	file:
HEADER_INTERRUPT_DEFAULT	tools/zynqimage.c	/^#define HEADER_INTERRUPT_DEFAULT /;"	d	file:
HEADER_INTERRUPT_DEFAULT	tools/zynqmpimage.c	/^#define HEADER_INTERRUPT_DEFAULT /;"	d	file:
HEADER_INTERRUPT_VECTORS	tools/zynqimage.c	/^#define HEADER_INTERRUPT_VECTORS /;"	d	file:
HEADER_INTERRUPT_VECTORS	tools/zynqmpimage.c	/^#define HEADER_INTERRUPT_VECTORS	/;"	d	file:
HEADER_OFFSET	tools/socfpgaimage.c	/^#define HEADER_OFFSET	/;"	d	file:
HEADER_REGINITS	tools/zynqimage.c	/^#define HEADER_REGINITS /;"	d	file:
HEADER_REGINITS	tools/zynqmpimage.c	/^#define HEADER_REGINITS	/;"	d	file:
HEADER_REGINIT_NULL	tools/zynqimage.c	/^#define HEADER_REGINIT_NULL /;"	d	file:
HEADER_REGINIT_NULL	tools/zynqmpimage.c	/^#define HEADER_REGINIT_NULL /;"	d	file:
HEADER_WIDTHDETECTION	tools/zynqimage.c	/^#define HEADER_WIDTHDETECTION /;"	d	file:
HEADER_WIDTHDETECTION	tools/zynqmpimage.c	/^#define HEADER_WIDTHDETECTION /;"	d	file:
HEAD_CRC	lib/gunzip.c	/^#define HEAD_CRC	/;"	d	file:
HEAP	include/lattice.h	/^#define HEAP	/;"	d
HEAP_END_OFFSET	arch/x86/lib/zimage.c	/^#define HEAP_END_OFFSET	/;"	d	file:
HEAP_FLAG	arch/x86/include/asm/zimage.h	/^#define HEAP_FLAG /;"	d
HEAP_IN	include/lattice.h	/^#define HEAP_IN	/;"	d
HEAP_SIZE	lib/zlib/deflate.h	/^#define HEAP_SIZE /;"	d
HECI_EOP_PERFORM_GLOBAL_RESET	arch/x86/include/asm/me_common.h	/^#define HECI_EOP_PERFORM_GLOBAL_RESET /;"	d
HECI_EOP_STATUS_SUCCESS	arch/x86/include/asm/me_common.h	/^#define HECI_EOP_STATUS_SUCCESS /;"	d
HEC_REG	arch/x86/include/asm/arch-quark/quark.h	/^#define HEC_REG	/;"	d
HEIGHT	drivers/demo/demo-shape.c	/^#define HEIGHT	/;"	d	file:
HELP	scripts/kconfig/zconf.l	/^%x COMMAND HELP STRING PARAM$/;"	c
HELP	scripts/kconfig/zconf.lex.c	/^#define HELP /;"	d	file:
HEX	tools/buildman/kconfiglib.py	/^UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6)$/;"	v
HI	arch/blackfin/include/asm/blackfin_local.h	/^#define HI(/;"	d
HI	arch/powerpc/cpu/mpc8xx/video.c	/^#define HI(/;"	d	file:
HI6220_1000_1200	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1200	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1200	/;"	d
HI6220_1000_1440	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1000_1440	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1000_1440	/;"	d
HI6220_1440_1200	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_1440_1200	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_1440_1200	/;"	d
HI6220_150M	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_150M	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_150M	/;"	d
HI6220_300M	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_300M	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_300M	/;"	d
HI6220_ACLK_CODEC_VPU	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ACLK_CODEC_VPU	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ACLK_CODEC_VPU	/;"	d
HI6220_ADE_CORE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE	/;"	d
HI6220_ADE_CORE_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_GATE	/;"	d
HI6220_ADE_CORE_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_CORE_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_CORE_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_ADE_PIX_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ADE_PIX_SRC	/;"	d
HI6220_AO_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_AO_NR_CLKS	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_AO_NR_CLKS	/;"	d
HI6220_BBPPLL0_DIV	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL0_DIV	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL0_DIV	/;"	d
HI6220_BBPPLL_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_BBPPLL_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_BBPPLL_SEL	/;"	d
HI6220_CFG_CSI2PHY	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI2PHY	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI2PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CFG_CSI4PHY	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CFG_CSI4PHY	/;"	d
HI6220_CLK_BUS	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_BUS	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_BUS	/;"	d
HI6220_CLK_PICOPHY	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_PICOPHY	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_PICOPHY	/;"	d
HI6220_CLK_TCXO	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CLK_TCXO	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CLK_TCXO	/;"	d
HI6220_CODEC_JPEG	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_JPEG	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_JPEG	/;"	d
HI6220_CODEC_VPU_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_GATE	/;"	d
HI6220_CODEC_VPU_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CODEC_VPU_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CODEC_VPU_SRC	/;"	d
HI6220_CS_ATB	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB	/;"	d
HI6220_CS_ATB_DIV	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_DIV	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_DIV	/;"	d
HI6220_CS_ATB_SYSPLL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_ATB_SYSPLL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_ATB_SYSPLL	/;"	d
HI6220_CS_DAPB	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_CS_DAPB	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_CS_DAPB	/;"	d
HI6220_DACODEC_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DACODEC_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DACODEC_PCLK	/;"	d
HI6220_DDRC_AXI1	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_AXI1	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_AXI1	/;"	d
HI6220_DDRC_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDRC_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDRC_SRC	/;"	d
HI6220_DDR_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DDR_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DDR_SRC	/;"	d
HI6220_DSI_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_DSI_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_DSI_PCLK	/;"	d
HI6220_EDMAC_ACLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_EDMAC_ACLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_EDMAC_ACLK	/;"	d
HI6220_G3D_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_CLK	/;"	d
HI6220_G3D_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_G3D_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_G3D_PCLK	/;"	d
HI6220_GPIO_BASE	arch/arm/include/asm/arch-hi6220/gpio.h	/^#define HI6220_GPIO_BASE(/;"	d
HI6220_GPIO_DIR	arch/arm/include/asm/arch-hi6220/gpio.h	/^#define HI6220_GPIO_DIR	/;"	d
HI6220_GPIO_PER_BANK	arch/arm/include/asm/arch-hi6220/gpio.h	/^#define HI6220_GPIO_PER_BANK	/;"	d
HI6220_HIFI	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI	/;"	d
HI6220_HIFI_DIV	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_DIV	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_DIV	/;"	d
HI6220_HIFI_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SEL	/;"	d
HI6220_HIFI_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_HIFI_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_HIFI_SRC	/;"	d
HI6220_I2C0_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C0_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C0_CLK	/;"	d
HI6220_I2C1_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C1_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C1_CLK	/;"	d
HI6220_I2C2_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C2_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C2_CLK	/;"	d
HI6220_I2C3_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_I2C3_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_I2C3_CLK	/;"	d
HI6220_ISP_SCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK	/;"	d
HI6220_ISP_SCLK1	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK1	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK1	/;"	d
HI6220_ISP_SCLK_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE	/;"	d
HI6220_ISP_SCLK_GATE1	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_GATE1	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_GATE1	/;"	d
HI6220_ISP_SCLK_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_ISP_SCLK_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_ISP_SCLK_SRC	/;"	d
HI6220_MEDIA_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_NR_CLKS	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_NR_CLKS	/;"	d
HI6220_MEDIA_PLL_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MEDIA_PLL_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MEDIA_PLL_SRC	/;"	d
HI6220_MED_MMU	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_MMU	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_MMU	/;"	d
HI6220_MED_SYSPLL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MED_SYSPLL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MED_SYSPLL	/;"	d
HI6220_MMC0_BASE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define HI6220_MMC0_BASE	/;"	d
HI6220_MMC0_CIUCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CIUCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CIUCLK	/;"	d
HI6220_MMC0_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_CLK	/;"	d
HI6220_MMC0_DIV	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_DIV	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_DIV	/;"	d
HI6220_MMC0_MUX0	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX0	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX0	/;"	d
HI6220_MMC0_MUX1	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_MUX1	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_MUX1	/;"	d
HI6220_MMC0_PAD	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_PAD	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_PAD	/;"	d
HI6220_MMC0_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SEL	/;"	d
HI6220_MMC0_SMP	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP	/;"	d
HI6220_MMC0_SMP_IN	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SMP_IN	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SMP_IN	/;"	d
HI6220_MMC0_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC	/;"	d
HI6220_MMC0_SRC_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SRC_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SRC_SEL	/;"	d
HI6220_MMC0_SYSPLL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC0_SYSPLL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC0_SYSPLL	/;"	d
HI6220_MMC1_BASE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define HI6220_MMC1_BASE	/;"	d
HI6220_MMC1_CIUCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CIUCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CIUCLK	/;"	d
HI6220_MMC1_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_CLK	/;"	d
HI6220_MMC1_DIV	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_DIV	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_DIV	/;"	d
HI6220_MMC1_MUX0	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX0	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX0	/;"	d
HI6220_MMC1_MUX1	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_MUX1	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_MUX1	/;"	d
HI6220_MMC1_PAD	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_PAD	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_PAD	/;"	d
HI6220_MMC1_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SEL	/;"	d
HI6220_MMC1_SMP	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP	/;"	d
HI6220_MMC1_SMP_IN	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SMP_IN	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SMP_IN	/;"	d
HI6220_MMC1_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC	/;"	d
HI6220_MMC1_SRC_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SRC_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SRC_SEL	/;"	d
HI6220_MMC1_SYSPLL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC1_SYSPLL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC1_SYSPLL	/;"	d
HI6220_MMC2_CIUCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CIUCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CIUCLK	/;"	d
HI6220_MMC2_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_CLK	/;"	d
HI6220_MMC2_DIV	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_DIV	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_DIV	/;"	d
HI6220_MMC2_MUX0	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX0	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX0	/;"	d
HI6220_MMC2_MUX1	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_MUX1	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_MUX1	/;"	d
HI6220_MMC2_PAD	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_PAD	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_PAD	/;"	d
HI6220_MMC2_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SEL	/;"	d
HI6220_MMC2_SMP	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP	/;"	d
HI6220_MMC2_SMP_IN	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SMP_IN	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SMP_IN	/;"	d
HI6220_MMC2_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC	/;"	d
HI6220_MMC2_SRC_SEL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SRC_SEL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SRC_SEL	/;"	d
HI6220_MMC2_SYSPLL	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMC2_SYSPLL	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMC2_SYSPLL	/;"	d
HI6220_MMU_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_MMU_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_MMU_CLK	/;"	d
HI6220_NONE_CLOCK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_NONE_CLOCK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_NONE_CLOCK	/;"	d
HI6220_PERI_BASE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define HI6220_PERI_BASE	/;"	d
HI6220_PICOPHY_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PICOPHY_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PICOPHY_SRC	/;"	d
HI6220_PINMUX0_BASE	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define HI6220_PINMUX0_BASE /;"	d
HI6220_PINMUX1_BASE	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define HI6220_PINMUX1_BASE /;"	d
HI6220_PLL0_BBP_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL0_BBP_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL0_BBP_GATE	/;"	d
HI6220_PLL1_DDR	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR	/;"	d
HI6220_PLL1_DDR_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL1_DDR_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL1_DDR_GATE	/;"	d
HI6220_PLL_BBP	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_BBP	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_BBP	/;"	d
HI6220_PLL_DDR	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR	/;"	d
HI6220_PLL_DDR_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_DDR_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_DDR_GATE	/;"	d
HI6220_PLL_GPU	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU	/;"	d
HI6220_PLL_GPU_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_GPU_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_GPU_GATE	/;"	d
HI6220_PLL_MEDIA	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA	/;"	d
HI6220_PLL_MEDIA_GATE	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_MEDIA_GATE	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_MEDIA_GATE	/;"	d
HI6220_PLL_SYS	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS	/;"	d
HI6220_PLL_SYS_MEDIA	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PLL_SYS_MEDIA	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_PLL_SYS_MEDIA	/;"	d
HI6220_PMUSSI_BASE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define HI6220_PMUSSI_BASE	/;"	d
HI6220_POWER_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_POWER_NR_CLKS	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_POWER_NR_CLKS	/;"	d
HI6220_REF32K	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_REF32K	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_REF32K	/;"	d
HI6220_SPI_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SPI_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SPI_CLK	/;"	d
HI6220_SYS_NR_CLKS	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_SYS_NR_CLKS	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_SYS_NR_CLKS	/;"	d
HI6220_TIMER0_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER0_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER0_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER1_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER1_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER2_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER2_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER3_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER3_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER4_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER4_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER5_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER5_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER6_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER6_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER7_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER7_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TIMER8_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TIMER8_PCLK	/;"	d
HI6220_TSENSOR_CLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_TSENSOR_CLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_TSENSOR_CLK	/;"	d
HI6220_UART0_BASE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define HI6220_UART0_BASE	/;"	d
HI6220_UART0_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART0_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART0_PCLK	/;"	d
HI6220_UART1_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_PCLK	/;"	d
HI6220_UART1_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART1_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART1_SRC	/;"	d
HI6220_UART2_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_PCLK	/;"	d
HI6220_UART2_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART2_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART2_SRC	/;"	d
HI6220_UART3_BASE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define HI6220_UART3_BASE	/;"	d
HI6220_UART3_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_PCLK	/;"	d
HI6220_UART3_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART3_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART3_SRC	/;"	d
HI6220_UART4_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_PCLK	/;"	d
HI6220_UART4_SRC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_UART4_SRC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_UART4_SRC	/;"	d
HI6220_USBOTG_HCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_USBOTG_HCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_USBOTG_HCLK	/;"	d
HI6220_VPU_CODEC	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_VPU_CODEC	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_VPU_CODEC	/;"	d
HI6220_WDT0_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT0_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT0_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT1_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT1_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6220_WDT2_PCLK	include/dt-bindings/clock/hi6220-clock.h	/^#define HI6220_WDT2_PCLK	/;"	d
HI6553_BUCK01_CTRL2	include/power/hi6553_pmic.h	/^	HI6553_BUCK01_CTRL2 = 0x0d9,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK0_CTRL1	include/power/hi6553_pmic.h	/^	HI6553_BUCK0_CTRL1 = 0x0dd,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK0_CTRL5	include/power/hi6553_pmic.h	/^	HI6553_BUCK0_CTRL5 = 0x0e1,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK0_CTRL7	include/power/hi6553_pmic.h	/^	HI6553_BUCK0_CTRL7 = 0x0e3,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK1_CTRL1	include/power/hi6553_pmic.h	/^	HI6553_BUCK1_CTRL1 = 0x0e8,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK1_CTRL5	include/power/hi6553_pmic.h	/^	HI6553_BUCK1_CTRL5 = 0x0ec,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK1_CTRL7	include/power/hi6553_pmic.h	/^	HI6553_BUCK1_CTRL7 = 0x0ef,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK2_REG1	include/power/hi6553_pmic.h	/^	HI6553_BUCK2_REG1 = 0x04a,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK2_REG5	include/power/hi6553_pmic.h	/^	HI6553_BUCK2_REG5 = 0x04e,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK2_REG6	include/power/hi6553_pmic.h	/^	HI6553_BUCK2_REG6,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK3_REG3	include/power/hi6553_pmic.h	/^	HI6553_BUCK3_REG3 = 0x054,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK3_REG5	include/power/hi6553_pmic.h	/^	HI6553_BUCK3_REG5 = 0x056,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK3_REG6	include/power/hi6553_pmic.h	/^	HI6553_BUCK3_REG6,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK4_REG2	include/power/hi6553_pmic.h	/^	HI6553_BUCK4_REG2 = 0x05b,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK4_REG5	include/power/hi6553_pmic.h	/^	HI6553_BUCK4_REG5 = 0x05e,$/;"	e	enum:__anon8cb0fe560103
HI6553_BUCK4_REG6	include/power/hi6553_pmic.h	/^	HI6553_BUCK4_REG6,$/;"	e	enum:__anon8cb0fe560103
HI6553_CLK19M2_600_586_EN	include/power/hi6553_pmic.h	/^	HI6553_CLK19M2_600_586_EN = 0x0fe,$/;"	e	enum:__anon8cb0fe560103
HI6553_CLK_TOP0	include/power/hi6553_pmic.h	/^	HI6553_CLK_TOP0 = 0x063,$/;"	e	enum:__anon8cb0fe560103
HI6553_CLK_TOP3	include/power/hi6553_pmic.h	/^	HI6553_CLK_TOP3 = 0x066,$/;"	e	enum:__anon8cb0fe560103
HI6553_CLK_TOP4	include/power/hi6553_pmic.h	/^	HI6553_CLK_TOP4,$/;"	e	enum:__anon8cb0fe560103
HI6553_DISABLE2_LDO1_8	include/power/hi6553_pmic.h	/^	HI6553_DISABLE2_LDO1_8,$/;"	e	enum:__anon8cb0fe560103
HI6553_DISABLE3_LDO9_16	include/power/hi6553_pmic.h	/^	HI6553_DISABLE3_LDO9_16,$/;"	e	enum:__anon8cb0fe560103
HI6553_DISABLE6_XO_CLK	include/power/hi6553_pmic.h	/^	HI6553_DISABLE6_XO_CLK = 0x036,$/;"	e	enum:__anon8cb0fe560103
HI6553_DISABLE6_XO_CLK_BB	include/power/hi6553_pmic.h	/^#define HI6553_DISABLE6_XO_CLK_BB	/;"	d
HI6553_DISABLE6_XO_CLK_CONN	include/power/hi6553_pmic.h	/^#define HI6553_DISABLE6_XO_CLK_CONN	/;"	d
HI6553_DISABLE6_XO_CLK_NFC	include/power/hi6553_pmic.h	/^#define HI6553_DISABLE6_XO_CLK_NFC	/;"	d
HI6553_DISABLE6_XO_CLK_RF1	include/power/hi6553_pmic.h	/^#define HI6553_DISABLE6_XO_CLK_RF1	/;"	d
HI6553_DISABLE6_XO_CLK_RF2	include/power/hi6553_pmic.h	/^#define HI6553_DISABLE6_XO_CLK_RF2	/;"	d
HI6553_DR345_TIM_CONF0	include/power/hi6553_pmic.h	/^	HI6553_DR345_TIM_CONF0 = 0x0a0,$/;"	e	enum:__anon8cb0fe560103
HI6553_DR3_ISET	include/power/hi6553_pmic.h	/^	HI6553_DR3_ISET,$/;"	e	enum:__anon8cb0fe560103
HI6553_DR3_START_DEL	include/power/hi6553_pmic.h	/^	HI6553_DR3_START_DEL,$/;"	e	enum:__anon8cb0fe560103
HI6553_DR4_ISET	include/power/hi6553_pmic.h	/^	HI6553_DR4_ISET,$/;"	e	enum:__anon8cb0fe560103
HI6553_DR4_START_DEL	include/power/hi6553_pmic.h	/^	HI6553_DR4_START_DEL,$/;"	e	enum:__anon8cb0fe560103
HI6553_DR_LED_CTRL	include/power/hi6553_pmic.h	/^	HI6553_DR_LED_CTRL = 0x098,$/;"	e	enum:__anon8cb0fe560103
HI6553_DR_OUT_CTRL	include/power/hi6553_pmic.h	/^	HI6553_DR_OUT_CTRL,$/;"	e	enum:__anon8cb0fe560103
HI6553_ENABLE2_LDO1_8	include/power/hi6553_pmic.h	/^	HI6553_ENABLE2_LDO1_8 = 0x029,$/;"	e	enum:__anon8cb0fe560103
HI6553_ENABLE3_LDO9_16	include/power/hi6553_pmic.h	/^	HI6553_ENABLE3_LDO9_16,$/;"	e	enum:__anon8cb0fe560103
HI6553_LDO10_REG_ADJ	include/power/hi6553_pmic.h	/^	HI6553_LDO10_REG_ADJ = 0x07b,$/;"	e	enum:__anon8cb0fe560103
HI6553_LDO19_REG_ADJ	include/power/hi6553_pmic.h	/^	HI6553_LDO19_REG_ADJ = 0x084,$/;"	e	enum:__anon8cb0fe560103
HI6553_LDO20_REG_ADJ	include/power/hi6553_pmic.h	/^	HI6553_LDO20_REG_ADJ,$/;"	e	enum:__anon8cb0fe560103
HI6553_LDO7_REG_ADJ	include/power/hi6553_pmic.h	/^	HI6553_LDO7_REG_ADJ = 0x078,$/;"	e	enum:__anon8cb0fe560103
HI6553_LED_ELEC_VALUE	include/power/hi6553_pmic.h	/^#define HI6553_LED_ELEC_VALUE	/;"	d
HI6553_LED_GREEN_ENABLE	include/power/hi6553_pmic.h	/^#define HI6553_LED_GREEN_ENABLE	/;"	d
HI6553_LED_LIGHT_TIME	include/power/hi6553_pmic.h	/^#define HI6553_LED_LIGHT_TIME	/;"	d
HI6553_LED_OUT_CTRL	include/power/hi6553_pmic.h	/^#define HI6553_LED_OUT_CTRL	/;"	d
HI6553_LED_START_DELAY_TIME	include/power/hi6553_pmic.h	/^#define HI6553_LED_START_DELAY_TIME	/;"	d
HI6553_NP_REG_ADJ1	include/power/hi6553_pmic.h	/^	HI6553_NP_REG_ADJ1 = 0x0be,$/;"	e	enum:__anon8cb0fe560103
HI6553_NP_REG_CHG	include/power/hi6553_pmic.h	/^	HI6553_NP_REG_CHG = 0x0c0,$/;"	e	enum:__anon8cb0fe560103
HI6553_ONOFF_STATUS2_LDO1_8	include/power/hi6553_pmic.h	/^	HI6553_ONOFF_STATUS2_LDO1_8,$/;"	e	enum:__anon8cb0fe560103
HI6553_ONOFF_STATUS3_LDO9_16	include/power/hi6553_pmic.h	/^	HI6553_ONOFF_STATUS3_LDO9_16,$/;"	e	enum:__anon8cb0fe560103
HI6553_PERI_EN_MARK	include/power/hi6553_pmic.h	/^	HI6553_PERI_EN_MARK = 0x040,$/;"	e	enum:__anon8cb0fe560103
HI6553_PMU_V300	include/power/hi6553_pmic.h	/^#define HI6553_PMU_V300	/;"	d
HI6553_PMU_V310	include/power/hi6553_pmic.h	/^#define HI6553_PMU_V310	/;"	d
HI6553_VERSION_REG	include/power/hi6553_pmic.h	/^	HI6553_VERSION_REG = 0x000,$/;"	e	enum:__anon8cb0fe560103
HI6553_VSET_BUCK2_ADJ	include/power/hi6553_pmic.h	/^	HI6553_VSET_BUCK2_ADJ = 0x06d,$/;"	e	enum:__anon8cb0fe560103
HI6553_VSET_BUCK3_ADJ	include/power/hi6553_pmic.h	/^	HI6553_VSET_BUCK3_ADJ,$/;"	e	enum:__anon8cb0fe560103
HIB	arch/blackfin/include/asm/serial1.h	/^#define HIB(/;"	d
HIBYTE	board/micronas/vct/smc_eeprom.c	/^#define HIBYTE(/;"	d	file:
HICHAR	arch/powerpc/cpu/mpc8xx/video.c	/^#define HICHAR(/;"	d	file:
HID0	arch/powerpc/include/asm/processor.h	/^#define HID0	/;"	d
HID0_ABE	arch/powerpc/include/asm/processor.h	/^#define   HID0_ABE	/;"	d
HID0_BHTE	arch/powerpc/include/asm/processor.h	/^#define   HID0_BHTE	/;"	d
HID0_BTCD	arch/powerpc/include/asm/processor.h	/^#define   HID0_BTCD	/;"	d
HID0_BTIC	arch/powerpc/include/asm/processor.h	/^#define   HID0_BTIC	/;"	d
HID0_CORE_CLK_OUT	arch/powerpc/include/asm/e300.h	/^#define HID0_CORE_CLK_OUT	/;"	d
HID0_CORE_CLK_OUT_DIV_2	arch/powerpc/include/asm/e300.h	/^#define HID0_CORE_CLK_OUT_DIV_2	/;"	d
HID0_DCE	arch/powerpc/include/asm/processor.h	/^#define   HID0_DCE	/;"	d
HID0_DCE_SHIFT	arch/powerpc/include/asm/processor.h	/^#define HID0_DCE_SHIFT	/;"	d
HID0_DCFA	arch/powerpc/include/asm/processor.h	/^#define   HID0_DCFA	/;"	d
HID0_DCFI	arch/powerpc/include/asm/processor.h	/^#define   HID0_DCFI	/;"	d
HID0_DCI	arch/powerpc/include/asm/processor.h	/^#define   HID0_DCI	/;"	d
HID0_DISABLE_ADDRESS_BROADCAST	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_ADDRESS_BROADCAST	/;"	d
HID0_DISABLE_ADDRESS_PARITY	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_ADDRESS_PARITY	/;"	d
HID0_DISABLE_ARTRY_OUT_PRECHARGE	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_ARTRY_OUT_PRECHARGE /;"	d
HID0_DISABLE_CACHE_PARITY	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_CACHE_PARITY	/;"	d
HID0_DISABLE_DATA_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_DATA_CACHE	/;"	d
HID0_DISABLE_DATA_PARITY	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_DATA_PARITY	/;"	d
HID0_DISABLE_DOSE_MODE	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_DOSE_MODE	/;"	d
HID0_DISABLE_DYNAMIC_POWER_MANAGMENT	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_DYNAMIC_POWER_MANAGMENT /;"	d
HID0_DISABLE_INSTRUCTION_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_INSTRUCTION_CACHE	/;"	d
HID0_DISABLE_M_BIT	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_M_BIT	/;"	d
HID0_DISABLE_NAP_MODE	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_NAP_MODE	/;"	d
HID0_DISABLE_NOOP_DCACHE_INSTRUCTION	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_NOOP_DCACHE_INSTRUCTION /;"	d
HID0_DISABLE_SLEEP_MODE	arch/powerpc/include/asm/e300.h	/^#define HID0_DISABLE_SLEEP_MODE	/;"	d
HID0_DLOCK	arch/powerpc/include/asm/processor.h	/^#define   HID0_DLOCK	/;"	d
HID0_DLOCK_SHIFT	arch/powerpc/include/asm/processor.h	/^#define HID0_DLOCK_SHIFT	/;"	d
HID0_DOZE	arch/powerpc/include/asm/processor.h	/^#define   HID0_DOZE	/;"	d
HID0_DPM	arch/powerpc/include/asm/processor.h	/^#define   HID0_DPM	/;"	d
HID0_EBA	arch/powerpc/include/asm/processor.h	/^#define   HID0_EBA	/;"	d
HID0_EBD	arch/powerpc/include/asm/processor.h	/^#define   HID0_EBD	/;"	d
HID0_ECLK	arch/powerpc/include/asm/processor.h	/^#define   HID0_ECLK	/;"	d
HID0_EICE	arch/powerpc/include/asm/processor.h	/^#define   HID0_EICE	/;"	d
HID0_EMCP	arch/powerpc/include/asm/processor.h	/^#define   HID0_EMCP	/;"	d
HID0_ENABLE_ADDRESS_BROADCAST	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_ADDRESS_BROADCAST	/;"	d
HID0_ENABLE_ADDRESS_PARITY	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_ADDRESS_PARITY	/;"	d
HID0_ENABLE_ARTRY_OUT_PRECHARGE	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_ARTRY_OUT_PRECHARGE /;"	d
HID0_ENABLE_CACHE_PARITY	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_CACHE_PARITY	/;"	d
HID0_ENABLE_DATA_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_DATA_CACHE	/;"	d
HID0_ENABLE_DATE_PARITY	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_DATE_PARITY	/;"	d
HID0_ENABLE_DOSE_MODE	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_DOSE_MODE	/;"	d
HID0_ENABLE_DYNAMIC_POWER_MANAGMENT	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_DYNAMIC_POWER_MANAGMENT /;"	d
HID0_ENABLE_INSTRUCTION_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_INSTRUCTION_CACHE	/;"	d
HID0_ENABLE_MACHINE_CHECK	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_MACHINE_CHECK	/;"	d
HID0_ENABLE_M_BIT	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_M_BIT	/;"	d
HID0_ENABLE_NAP_MODE	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_NAP_MODE	/;"	d
HID0_ENABLE_NOOP_DCACHE_INSTRUCTION	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_NOOP_DCACHE_INSTRUCTION /;"	d
HID0_ENABLE_SLEEP_MODE	arch/powerpc/include/asm/e300.h	/^#define HID0_ENABLE_SLEEP_MODE	/;"	d
HID0_ENMAS7	arch/powerpc/include/asm/processor.h	/^#define   HID0_ENMAS7	/;"	d
HID0_FBIOB	arch/powerpc/include/asm/e300.h	/^#define HID0_FBIOB	/;"	d
HID0_HIGH_BAT_EN	include/mpc86xx.h	/^#define HID0_HIGH_BAT_EN /;"	d
HID0_ICE	arch/powerpc/include/asm/processor.h	/^#define   HID0_ICE	/;"	d
HID0_ICE_SHIFT	arch/powerpc/include/asm/processor.h	/^#define HID0_ICE_SHIFT	/;"	d
HID0_ICFI	arch/powerpc/include/asm/processor.h	/^#define   HID0_ICFI	/;"	d
HID0_ILOCK	arch/powerpc/include/asm/processor.h	/^#define   HID0_ILOCK	/;"	d
HID0_INVALIDATE_DATA_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_INVALIDATE_DATA_CACHE	/;"	d
HID0_INVALIDATE_INSTRUCTION_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_INVALIDATE_INSTRUCTION_CACHE /;"	d
HID0_LOCK_DATA_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_LOCK_DATA_CACHE	/;"	d
HID0_LOCK_INSTRUCTION_CACHE	arch/powerpc/include/asm/e300.h	/^#define HID0_LOCK_INSTRUCTION_CACHE	/;"	d
HID0_MASK_MACHINE_CHECK	arch/powerpc/include/asm/e300.h	/^#define HID0_MASK_MACHINE_CHECK	/;"	d
HID0_NAP	arch/powerpc/include/asm/processor.h	/^#define   HID0_NAP	/;"	d
HID0_PAR	arch/powerpc/include/asm/processor.h	/^#define   HID0_PAR	/;"	d
HID0_SBCLK	arch/powerpc/include/asm/processor.h	/^#define   HID0_SBCLK	/;"	d
HID0_SGE	arch/powerpc/include/asm/processor.h	/^#define   HID0_SGE	/;"	d
HID0_SIED	arch/powerpc/include/asm/processor.h	/^#define   HID0_SIED	/;"	d
HID0_SLEEP	arch/powerpc/include/asm/processor.h	/^#define   HID0_SLEEP	/;"	d
HID0_SOFT_RESET	arch/powerpc/include/asm/e300.h	/^#define HID0_SOFT_RESET	/;"	d
HID0_SPD	arch/powerpc/include/asm/processor.h	/^#define   HID0_SPD	/;"	d
HID0_TBEN	arch/powerpc/include/asm/processor.h	/^#define   HID0_TBEN	/;"	d
HID0_XAEN	include/mpc86xx.h	/^#define HID0_XAEN /;"	d
HID0_XBSEN	include/mpc86xx.h	/^#define HID0_XBSEN /;"	d
HID1	arch/powerpc/include/asm/processor.h	/^#define HID1	/;"	d
HID1_ABE	arch/powerpc/include/asm/processor.h	/^#define	  HID1_ABE	/;"	d
HID1_ASTME	arch/powerpc/include/asm/processor.h	/^#define	  HID1_ASTME	/;"	d
HID1_MBDD	arch/powerpc/include/asm/processor.h	/^#define	  HID1_MBDD	/;"	d
HID1_RFXE	arch/powerpc/include/asm/processor.h	/^#define	  HID1_RFXE	/;"	d
HID2	arch/powerpc/include/asm/e300.h	/^#define HID2	/;"	d
HID2_HBE	arch/powerpc/include/asm/e300.h	/^#define HID2_HBE /;"	d
HID2_IWLCK_000	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_000 /;"	d
HID2_IWLCK_001	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_001 /;"	d
HID2_IWLCK_010	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_010 /;"	d
HID2_IWLCK_011	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_011 /;"	d
HID2_IWLCK_100	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_100 /;"	d
HID2_IWLCK_101	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_101 /;"	d
HID2_IWLCK_110	arch/powerpc/include/asm/e300.h	/^#define HID2_IWLCK_110 /;"	d
HID2_LET	arch/powerpc/include/asm/e300.h	/^#define HID2_LET /;"	d
HIDDEN_FUNC	arch/arc/lib/_millicodethunk.S	/^#define HIDDEN_FUNC(/;"	d	file:
HIDREV_CHIPID_MASK	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define HIDREV_CHIPID_MASK	/;"	d
HIDREV_CHIPID_SHIFT	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define HIDREV_CHIPID_SHIFT	/;"	d
HIDREV_MAJORPREV_MASK	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define HIDREV_MAJORPREV_MASK	/;"	d
HIDREV_MAJORPREV_SHIFT	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define HIDREV_MAJORPREV_SHIFT	/;"	d
HIDWORD	tools/mingw_support.h	/^#define HIDWORD(/;"	d
HIGH	board/renesas/sh7785lcr/rtl8169.h	/^#define HIGH	/;"	d
HIGHF_CONV_RATE_30KSPS	arch/arm/mach-exynos/include/mach/adc.h	/^#define HIGHF_CONV_RATE_30KSPS	/;"	d
HIGHF_CONV_RATE_600KSPS	arch/arm/mach-exynos/include/mach/adc.h	/^#define HIGHF_CONV_RATE_600KSPS	/;"	d
HIGHMEM_START	arch/mips/include/asm/mach-generic/spaces.h	/^#define HIGHMEM_START	/;"	d
HIGH_8BIT_CAL_DONE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	HIGH_8BIT_CAL_DONE			= 1 << 1,$/;"	e	enum:__anon957231910103	file:
HIGH_8BIT_DLL_BYPASS	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	HIGH_8BIT_DLL_BYPASS			= 1 << 3,$/;"	e	enum:__anon957231910103	file:
HIGH_8BIT_DLL_BYPASS_DISABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	HIGH_8BIT_DLL_BYPASS_DISABLE		= 0 << 3,$/;"	e	enum:__anon957231910103	file:
HIGH_EVEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define HIGH_EVEN /;"	d
HIGH_ODD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define HIGH_ODD /;"	d
HIGH_RAM_ADDR	arch/x86/include/asm/arch-qemu/qemu.h	/^#define HIGH_RAM_ADDR	/;"	d
HIGH_RESOLUTION_WIDTH	drivers/video/ipu.h	/^#define HIGH_RESOLUTION_WIDTH	/;"	d
HIGH_SPEED_BULK_PKT_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define HIGH_SPEED_BULK_PKT_SIZE	/;"	d
HIGH_SPEED_CONTROL_PKT_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define HIGH_SPEED_CONTROL_PKT_SIZE	/;"	d
HIGH_TABLE_SIZE	arch/x86/Kconfig	/^config HIGH_TABLE_SIZE$/;"	c	menu:x86 architecture
HIGH_WORD	board/mpl/pati/pci_eeprom.h	/^#define HIGH_WORD(/;"	d
HIGIG_FM1_MAC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	HIGIG_FM1_MAC10,$/;"	e	enum:srds_prtcl
HIGIG_FM1_MAC10	arch/powerpc/include/asm/fsl_serdes.h	/^	HIGIG_FM1_MAC10,$/;"	e	enum:srds_prtcl
HIGIG_FM1_MAC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	HIGIG_FM1_MAC9,$/;"	e	enum:srds_prtcl
HIGIG_FM1_MAC9	arch/powerpc/include/asm/fsl_serdes.h	/^	HIGIG_FM1_MAC9,$/;"	e	enum:srds_prtcl
HIGIG_FM2_MAC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	HIGIG_FM2_MAC10,$/;"	e	enum:srds_prtcl
HIGIG_FM2_MAC10	arch/powerpc/include/asm/fsl_serdes.h	/^	HIGIG_FM2_MAC10,$/;"	e	enum:srds_prtcl
HIGIG_FM2_MAC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	HIGIG_FM2_MAC9,$/;"	e	enum:srds_prtcl
HIGIG_FM2_MAC9	arch/powerpc/include/asm/fsl_serdes.h	/^	HIGIG_FM2_MAC9,$/;"	e	enum:srds_prtcl
HIR	include/lattice.h	/^#define HIR	/;"	d
HISHORT	arch/powerpc/cpu/mpc8xx/video.c	/^#define HISHORT(/;"	d	file:
HIST_MAX	common/cli_readline.c	/^#define HIST_MAX	/;"	d	file:
HIST_MODE_HSV	drivers/video/i915_reg.h	/^#define  HIST_MODE_HSV	/;"	d
HIST_MODE_YUV	drivers/video/i915_reg.h	/^#define  HIST_MODE_YUV	/;"	d
HIST_SIZE	common/cli_readline.c	/^#define HIST_SIZE	/;"	d	file:
HIT_INVALIDATE_D	arch/mips/include/asm/cacheops.h	/^#define HIT_INVALIDATE_D	/;"	d
HIT_INVALIDATE_I	arch/mips/include/asm/cacheops.h	/^#define HIT_INVALIDATE_I	/;"	d
HIT_INVALIDATE_S	arch/mips/include/asm/cacheops.h	/^#define HIT_INVALIDATE_S	/;"	d
HIT_INVALIDATE_SD	arch/mips/include/asm/cacheops.h	/^#define HIT_INVALIDATE_SD	/;"	d
HIT_INVALIDATE_SI	arch/mips/include/asm/cacheops.h	/^#define HIT_INVALIDATE_SI	/;"	d
HIT_SET_VIRTUAL_SD	arch/mips/include/asm/cacheops.h	/^#define HIT_SET_VIRTUAL_SD	/;"	d
HIT_SET_VIRTUAL_SI	arch/mips/include/asm/cacheops.h	/^#define HIT_SET_VIRTUAL_SI	/;"	d
HIT_WRITEBACK_D	arch/mips/include/asm/cacheops.h	/^#define HIT_WRITEBACK_D	/;"	d
HIT_WRITEBACK_I	arch/mips/include/asm/cacheops.h	/^#define HIT_WRITEBACK_I	/;"	d
HIT_WRITEBACK_INV_D	arch/mips/include/asm/cacheops.h	/^#define HIT_WRITEBACK_INV_D	/;"	d
HIT_WRITEBACK_INV_S	arch/mips/include/asm/cacheops.h	/^#define HIT_WRITEBACK_INV_S	/;"	d
HIT_WRITEBACK_INV_SD	arch/mips/include/asm/cacheops.h	/^#define HIT_WRITEBACK_INV_SD	/;"	d
HIT_WRITEBACK_SD	arch/mips/include/asm/cacheops.h	/^#define HIT_WRITEBACK_SD	/;"	d
HIWORD	board/micronas/vct/smc_eeprom.c	/^#define HIWORD(/;"	d	file:
HIZCRA	arch/sh/include/asm/cpu_sh7722.h	/^#define HIZCRA /;"	d
HIZCRA	arch/sh/include/asm/cpu_sh7723.h	/^#define HIZCRA /;"	d
HIZCRA	arch/sh/include/asm/cpu_sh7724.h	/^#define HIZCRA /;"	d
HIZCRA_D	board/renesas/ap325rxa/ap325rxa.c	/^#define	HIZCRA_D	/;"	d	file:
HIZCRB	arch/sh/include/asm/cpu_sh7722.h	/^#define HIZCRB /;"	d
HIZCRB	arch/sh/include/asm/cpu_sh7723.h	/^#define HIZCRB /;"	d
HIZCRB	arch/sh/include/asm/cpu_sh7724.h	/^#define HIZCRB /;"	d
HIZCRB	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define	HIZCRB	/;"	d	file:
HIZCRB_D	board/renesas/ap325rxa/ap325rxa.c	/^#define HIZCRB_D	/;"	d	file:
HIZCRC	arch/sh/include/asm/cpu_sh7722.h	/^#define HIZCRC	/;"	d
HIZCRC	arch/sh/include/asm/cpu_sh7722.h	/^#define HIZCRC /;"	d
HIZCRC	arch/sh/include/asm/cpu_sh7723.h	/^#define HIZCRC /;"	d
HIZCRC	arch/sh/include/asm/cpu_sh7724.h	/^#define HIZCRC /;"	d
HIZCRC_D	board/renesas/ap325rxa/ap325rxa.c	/^#define HIZCRC_D	/;"	d	file:
HIZCRD	arch/sh/include/asm/cpu_sh7723.h	/^#define HIZCRD /;"	d
HIZCRD	arch/sh/include/asm/cpu_sh7724.h	/^#define HIZCRD /;"	d
HIZCRD_D	board/renesas/ap325rxa/ap325rxa.c	/^#define HIZCRD_D	/;"	d	file:
HI_STAT	include/radeon.h	/^#define HI_STAT	/;"	d
HItype	arch/arc/lib/libgcc2.h	/^typedef		 int HItype	__attribute__ ((mode (HI)));$/;"	t	typeref:typename:int
HLIST_HEAD	include/linux/list.h	/^#define HLIST_HEAD(/;"	d
HLIST_HEAD_INIT	include/linux/list.h	/^#define HLIST_HEAD_INIT /;"	d
HLP_B0_ADDR	include/tsi108.h	/^#define HLP_B0_ADDR	/;"	d
HLP_B0_CTRL0	include/tsi108.h	/^#define HLP_B0_CTRL0	/;"	d
HLP_B0_CTRL1	include/tsi108.h	/^#define HLP_B0_CTRL1	/;"	d
HLP_B0_MASK	include/tsi108.h	/^#define HLP_B0_MASK	/;"	d
HLP_B1_ADDR	include/tsi108.h	/^#define HLP_B1_ADDR	/;"	d
HLP_B1_CTRL0	include/tsi108.h	/^#define HLP_B1_CTRL0	/;"	d
HLP_B1_CTRL1	include/tsi108.h	/^#define HLP_B1_CTRL1	/;"	d
HLP_B1_MASK	include/tsi108.h	/^#define HLP_B1_MASK	/;"	d
HLP_B2_ADDR	include/tsi108.h	/^#define HLP_B2_ADDR	/;"	d
HLP_B2_CTRL0	include/tsi108.h	/^#define HLP_B2_CTRL0	/;"	d
HLP_B2_CTRL1	include/tsi108.h	/^#define HLP_B2_CTRL1	/;"	d
HLP_B2_MASK	include/tsi108.h	/^#define HLP_B2_MASK	/;"	d
HLP_B3_ADDR	include/tsi108.h	/^#define HLP_B3_ADDR	/;"	d
HLP_B3_CTRL0	include/tsi108.h	/^#define HLP_B3_CTRL0	/;"	d
HLP_B3_CTRL1	include/tsi108.h	/^#define HLP_B3_CTRL1	/;"	d
HLP_B3_MASK	include/tsi108.h	/^#define HLP_B3_MASK	/;"	d
HM	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	HM	/;"	d
HMATRIX_ARBT_FIXED_PRIORITY	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ARBT_FIXED_PRIORITY	/;"	d
HMATRIX_ARBT_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ARBT_OFFSET	/;"	d
HMATRIX_ARBT_ROUND_ROBIN	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ARBT_ROUND_ROBIN	/;"	d
HMATRIX_ARBT_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ARBT_SIZE	/;"	d
HMATRIX_BF	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_BF(/;"	d
HMATRIX_BFEXT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_BFEXT(/;"	d
HMATRIX_BFINS	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_BFINS(/;"	d
HMATRIX_BIT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_BIT(/;"	d
HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT	/;"	d
HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT	/;"	d
HMATRIX_DEFMSTR_TYPE_NO_DEFAULT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT	/;"	d
HMATRIX_DEFMSTR_TYPE_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_DEFMSTR_TYPE_OFFSET	/;"	d
HMATRIX_DEFMSTR_TYPE_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_DEFMSTR_TYPE_SIZE	/;"	d
HMATRIX_EBI_CF0_ENABLE_OFFSET	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_CF0_ENABLE_OFFSET	/;"	d
HMATRIX_EBI_CF0_ENABLE_SIZE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_CF0_ENABLE_SIZE	/;"	d
HMATRIX_EBI_CF1_ENABLE_OFFSET	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_CF1_ENABLE_OFFSET	/;"	d
HMATRIX_EBI_CF1_ENABLE_SIZE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_CF1_ENABLE_SIZE	/;"	d
HMATRIX_EBI_NAND_ENABLE_OFFSET	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_NAND_ENABLE_OFFSET	/;"	d
HMATRIX_EBI_NAND_ENABLE_SIZE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_NAND_ENABLE_SIZE	/;"	d
HMATRIX_EBI_PULLUP_DISABLE_OFFSET	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_PULLUP_DISABLE_OFFSET	/;"	d
HMATRIX_EBI_PULLUP_DISABLE_SIZE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_PULLUP_DISABLE_SIZE	/;"	d
HMATRIX_EBI_SDRAM_ENABLE_OFFSET	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_SDRAM_ENABLE_OFFSET	/;"	d
HMATRIX_EBI_SDRAM_ENABLE_SIZE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_EBI_SDRAM_ENABLE_SIZE	/;"	d
HMATRIX_FIXED_DEFMSTR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_FIXED_DEFMSTR_OFFSET	/;"	d
HMATRIX_FIXED_DEFMSTR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_FIXED_DEFMSTR_SIZE	/;"	d
HMATRIX_M0PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M0PR_OFFSET	/;"	d
HMATRIX_M0PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M0PR_SIZE	/;"	d
HMATRIX_M10PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M10PR_OFFSET	/;"	d
HMATRIX_M10PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M10PR_SIZE	/;"	d
HMATRIX_M11PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M11PR_OFFSET	/;"	d
HMATRIX_M11PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M11PR_SIZE	/;"	d
HMATRIX_M12PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M12PR_OFFSET	/;"	d
HMATRIX_M12PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M12PR_SIZE	/;"	d
HMATRIX_M13PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M13PR_OFFSET	/;"	d
HMATRIX_M13PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M13PR_SIZE	/;"	d
HMATRIX_M14PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M14PR_OFFSET	/;"	d
HMATRIX_M14PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M14PR_SIZE	/;"	d
HMATRIX_M15PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M15PR_OFFSET	/;"	d
HMATRIX_M15PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M15PR_SIZE	/;"	d
HMATRIX_M1PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M1PR_OFFSET	/;"	d
HMATRIX_M1PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M1PR_SIZE	/;"	d
HMATRIX_M2PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M2PR_OFFSET	/;"	d
HMATRIX_M2PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M2PR_SIZE	/;"	d
HMATRIX_M3PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M3PR_OFFSET	/;"	d
HMATRIX_M3PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M3PR_SIZE	/;"	d
HMATRIX_M4PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M4PR_OFFSET	/;"	d
HMATRIX_M4PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M4PR_SIZE	/;"	d
HMATRIX_M5PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M5PR_OFFSET	/;"	d
HMATRIX_M5PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M5PR_SIZE	/;"	d
HMATRIX_M6PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M6PR_OFFSET	/;"	d
HMATRIX_M6PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M6PR_SIZE	/;"	d
HMATRIX_M7PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M7PR_OFFSET	/;"	d
HMATRIX_M7PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M7PR_SIZE	/;"	d
HMATRIX_M8PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M8PR_OFFSET	/;"	d
HMATRIX_M8PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M8PR_SIZE	/;"	d
HMATRIX_M9PR_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M9PR_OFFSET	/;"	d
HMATRIX_M9PR_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_M9PR_SIZE	/;"	d
HMATRIX_MASTER_CPU_DCACHE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_CPU_DCACHE	/;"	d
HMATRIX_MASTER_CPU_ICACHE	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_CPU_ICACHE	/;"	d
HMATRIX_MASTER_DMACA_M0	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_DMACA_M0	/;"	d
HMATRIX_MASTER_DMACA_M1	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_DMACA_M1	/;"	d
HMATRIX_MASTER_ISI	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_ISI	/;"	d
HMATRIX_MASTER_LCDC	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_LCDC	/;"	d
HMATRIX_MASTER_MACB0	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_MACB0	/;"	d
HMATRIX_MASTER_MACB1	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_MACB1	/;"	d
HMATRIX_MASTER_PDC	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_PDC	/;"	d
HMATRIX_MASTER_USBA	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_MASTER_USBA	/;"	d
HMATRIX_SLAVE_DMACA	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_DMACA	/;"	d
HMATRIX_SLAVE_EBI	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_EBI	/;"	d
HMATRIX_SLAVE_LCDC	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_LCDC	/;"	d
HMATRIX_SLAVE_PBA	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_PBA	/;"	d
HMATRIX_SLAVE_PBB	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_PBB	/;"	d
HMATRIX_SLAVE_SRAM0	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_SRAM0	/;"	d
HMATRIX_SLAVE_SRAM1	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_SRAM1	/;"	d
HMATRIX_SLAVE_USBA	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define HMATRIX_SLAVE_USBA	/;"	d
HMATRIX_SLOT_CYCLE_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_SLOT_CYCLE_OFFSET	/;"	d
HMATRIX_SLOT_CYCLE_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_SLOT_CYCLE_SIZE	/;"	d
HMATRIX_ULBT_EIGHT_BEAT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_EIGHT_BEAT	/;"	d
HMATRIX_ULBT_FOUR_BEAT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_FOUR_BEAT	/;"	d
HMATRIX_ULBT_INFINITE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_INFINITE	/;"	d
HMATRIX_ULBT_OFFSET	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_OFFSET	/;"	d
HMATRIX_ULBT_SINGLE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_SINGLE	/;"	d
HMATRIX_ULBT_SIXTEEN_BEAT	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_SIXTEEN_BEAT	/;"	d
HMATRIX_ULBT_SIZE	arch/avr32/include/asm/hmatrix-common.h	/^#define HMATRIX_ULBT_SIZE	/;"	d
HMC_TEST	arch/x86/cpu/quark/smc.h	/^#define HMC_TEST$/;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_BCINIT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_BCOUNT /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_CONTROL /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_ECINIT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_ECOUNT /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_ECOVERFLOW /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA0_ECURGENT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_BCINIT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_BCOUNT /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_CONTROL /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_ECINIT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_ECOUNT /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_ECOVERFLOW /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HMDMA1_ECURGENT /;"	d
HMISC2	arch/x86/include/asm/arch-quark/quark.h	/^#define HMISC2	/;"	d
HMISC2_SEGAB	arch/x86/include/asm/arch-quark/quark.h	/^#define HMISC2_SEGAB	/;"	d
HMISC2_SEGE	arch/x86/include/asm/arch-quark/quark.h	/^#define HMISC2_SEGE	/;"	d
HMISC2_SEGF	arch/x86/include/asm/arch-quark/quark.h	/^#define HMISC2_SEGF	/;"	d
HM_BOUND	arch/x86/include/asm/arch-quark/quark.h	/^#define HM_BOUND	/;"	d
HM_BOUND_LOCK	arch/x86/include/asm/arch-quark/quark.h	/^#define HM_BOUND_LOCK	/;"	d
HOB_TYPE_EOH	arch/x86/include/asm/fsp/fsp_hob.h	/^#define HOB_TYPE_EOH	/;"	d
HOB_TYPE_GUID_EXT	arch/x86/include/asm/fsp/fsp_hob.h	/^#define HOB_TYPE_GUID_EXT	/;"	d
HOB_TYPE_MEM_ALLOC	arch/x86/include/asm/fsp/fsp_hob.h	/^#define HOB_TYPE_MEM_ALLOC	/;"	d
HOB_TYPE_RES_DESC	arch/x86/include/asm/fsp/fsp_hob.h	/^#define HOB_TYPE_RES_DESC	/;"	d
HOB_TYPE_UNUSED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define HOB_TYPE_UNUSED	/;"	d
HOLD1	include/linux/mtd/st_smi.h	/^#define HOLD1	/;"	d
HOLD_CKE_LOW_EN	arch/arm/include/asm/arch-tegra/pmc.h	/^#define HOLD_CKE_LOW_EN	/;"	d
HOMEPAGE	doc/mkimage.1	/^.SH HOMEPAGE$/;"	s	title:MKIMAGE
HOOPER_RST	board/keymile/kmp204x/pci.c	/^#define HOOPER_RST	/;"	d	file:
HOP_NUMBER	drivers/net/armada100_fec.h	/^#define HOP_NUMBER /;"	d
HORIZONTAL	board/bf533-stamp/video.c	/^#define HORIZONTAL	/;"	d	file:
HORZ_AUTO_RATIO	include/radeon.h	/^#define HORZ_AUTO_RATIO	/;"	d
HORZ_AUTO_RATIO_INC	include/radeon.h	/^#define HORZ_AUTO_RATIO_INC	/;"	d
HORZ_FP_LOOP_STRETCH	include/radeon.h	/^#define HORZ_FP_LOOP_STRETCH	/;"	d
HORZ_PANEL_SHIFT	include/radeon.h	/^#define HORZ_PANEL_SHIFT	/;"	d
HORZ_PANEL_SIZE	include/radeon.h	/^#define HORZ_PANEL_SIZE	/;"	d
HORZ_STRETCH_BLEND	include/radeon.h	/^#define HORZ_STRETCH_BLEND	/;"	d
HORZ_STRETCH_ENABLE	include/radeon.h	/^#define HORZ_STRETCH_ENABLE	/;"	d
HORZ_STRETCH_PIXREP	include/radeon.h	/^#define HORZ_STRETCH_PIXREP	/;"	d
HORZ_STRETCH_RATIO_MASK	include/radeon.h	/^#define HORZ_STRETCH_RATIO_MASK	/;"	d
HORZ_STRETCH_RATIO_MAX	include/radeon.h	/^#define HORZ_STRETCH_RATIO_MAX	/;"	d
HOST1CFG	arch/arm/mach-davinci/include/mach/hardware.h	/^#define HOST1CFG	/;"	d
HOSTARCH	Makefile	/^HOSTARCH := $(shell uname -m | \\$/;"	m
HOSTC	drivers/i2c/intel_i2c.c	/^#define HOSTC	/;"	d	file:
HOSTCC	Makefile	/^HOSTCC       = $(call os_x_before, 10, 5, "cc", "gcc")$/;"	m
HOSTCC	Makefile	/^HOSTCC       = cc$/;"	m
HOSTCC	tools/Makefile	/^HOSTCC = $(CC)$/;"	m
HOSTCC	tools/env/Makefile	/^HOSTCC = $(CC)$/;"	m
HOSTCFLAGS	board/samsung/origen/Makefile	/^$(obj)\/tools\/mkorigenspl: HOSTCFLAGS:=$(filter-out -O2,$(HOSTCFLAGS))$/;"	m
HOSTCFLAGS_NOPED_ADSP	arch/blackfin/config.mk	/^HOSTCFLAGS_NOPED_ADSP := \\$/;"	m
HOSTCFLAGS_bmp_logo.o	tools/Makefile	/^HOSTCFLAGS_bmp_logo.o := -pedantic$/;"	m
HOSTCFLAGS_crc32.o	tools/Makefile	/^HOSTCFLAGS_crc32.o := -pedantic$/;"	m
HOSTCFLAGS_gconf.o	scripts/kconfig/Makefile	/^HOSTCFLAGS_gconf.o	= `pkg-config --cflags gtk+-2.0 gmodule-2.0 libglade-2.0` \\$/;"	m
HOSTCFLAGS_gen_eth_addr.o	tools/Makefile	/^HOSTCFLAGS_gen_eth_addr.o := -pedantic$/;"	m
HOSTCFLAGS_img2srec.o	tools/Makefile	/^HOSTCFLAGS_img2srec.o := -pedantic$/;"	m
HOSTCFLAGS_md5.o	tools/Makefile	/^HOSTCFLAGS_md5.o := -pedantic$/;"	m
HOSTCFLAGS_mkexynosspl.o	tools/Makefile	/^HOSTCFLAGS_mkexynosspl.o := -pedantic$/;"	m
HOSTCFLAGS_mxsboot.o	tools/Makefile	/^HOSTCFLAGS_mxsboot.o := -pedantic$/;"	m
HOSTCFLAGS_sha1.o	tools/Makefile	/^HOSTCFLAGS_sha1.o := -pedantic$/;"	m
HOSTCFLAGS_sha256.o	tools/Makefile	/^HOSTCFLAGS_sha256.o := -pedantic$/;"	m
HOSTCFLAGS_ubsha1.o	tools/Makefile	/^HOSTCFLAGS_ubsha1.o := -pedantic$/;"	m
HOSTCFLAGS_xway-swap-bytes.o	tools/Makefile	/^HOSTCFLAGS_xway-swap-bytes.o := -pedantic$/;"	m
HOSTCFLAGS_zconf.lex.o	scripts/kconfig/Makefile	/^HOSTCFLAGS_zconf.lex.o	:= -I$(src)$/;"	m
HOSTCFLAGS_zconf.tab.o	scripts/kconfig/Makefile	/^HOSTCFLAGS_zconf.tab.o	:= -I$(src)$/;"	m
HOSTCTRL_CSTM0IE_GATE	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_CSTM0IE_GATE /;"	d
HOSTCTRL_CSTM0IW_FLAG	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_CSTM0IW_FLAG /;"	d
HOSTCTRL_CSTM1IE_GATE	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_CSTM1IE_GATE /;"	d
HOSTCTRL_CSTM1IW_FLAG	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_CSTM1IW_FLAG /;"	d
HOSTCTRL_FIFOIE_FLAG	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_FIFOIE_FLAG /;"	d
HOSTCTRL_FIFOIE_GATE	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_FIFOIE_GATE /;"	d
HOSTCTRL_HCINT_FLAG	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_HCINT_FLAG /;"	d
HOSTCTRL_HCINT_GATE	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_HCINT_GATE /;"	d
HOSTCTRL_PMCRSTOUT_FLAG	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_PMCRSTOUT_FLAG /;"	d
HOSTCTRL_PMCRSTOUT_GATE	board/esd/pmc440/pmc440.h	/^#define HOSTCTRL_PMCRSTOUT_GATE /;"	d
HOSTCXX	Makefile	/^HOSTCXX      = c++$/;"	m
HOSTCXXFLAGS	Makefile	/^HOSTCXXFLAGS = -O2$/;"	m
HOSTCXXFLAGS_qconf.o	scripts/kconfig/Makefile	/^HOSTCXXFLAGS_qconf.o	= $(KC_QT_CFLAGS)$/;"	m
HOSTLOADLIBES_dumpimage	tools/Makefile	/^HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)$/;"	m
HOSTLOADLIBES_fit_check_sign	tools/Makefile	/^HOSTLOADLIBES_fit_check_sign := $(HOSTLOADLIBES_mkimage)$/;"	m
HOSTLOADLIBES_fit_info	tools/Makefile	/^HOSTLOADLIBES_fit_info := $(HOSTLOADLIBES_mkimage)$/;"	m
HOSTLOADLIBES_gconf	scripts/kconfig/Makefile	/^HOSTLOADLIBES_gconf	= `pkg-config --libs gtk+-2.0 gmodule-2.0 libglade-2.0`$/;"	m
HOSTLOADLIBES_mconf	scripts/kconfig/Makefile	/^HOSTLOADLIBES_mconf   = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))$/;"	m
HOSTLOADLIBES_nconf	scripts/kconfig/Makefile	/^HOSTLOADLIBES_nconf	= $(shell \\$/;"	m
HOSTLOADLIBES_qconf	scripts/kconfig/Makefile	/^HOSTLOADLIBES_qconf	= $(KC_QT_LIBS)$/;"	m
HOSTNAME	include/configs/inka4x0.h	/^#define HOSTNAME	/;"	d
HOSTOS	Makefile	/^HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \\$/;"	m
HOSTPC1_DEVLC	drivers/usb/host/ehci-tegra.c	/^#define HOSTPC1_DEVLC	/;"	d	file:
HOSTPC1_PSPD	drivers/usb/host/ehci-tegra.c	/^#define HOSTPC1_PSPD(/;"	d	file:
HOST_AHCI_EN	include/ahci.h	/^#define HOST_AHCI_EN	/;"	d
HOST_BIG_ENDIAN_EN	include/radeon.h	/^#define HOST_BIG_ENDIAN_EN	/;"	d
HOST_BIST_CTRL	drivers/block/sata_sil.h	/^	HOST_BIST_CTRL		= 0x50,$/;"	e	enum:__anone6fe50d30103
HOST_BIST_PTRN	drivers/block/sata_sil.h	/^	HOST_BIST_PTRN		= 0x54,$/;"	e	enum:__anone6fe50d30103
HOST_BIST_STAT	drivers/block/sata_sil.h	/^	HOST_BIST_STAT		= 0x58,$/;"	e	enum:__anone6fe50d30103
HOST_BRIDGE	arch/x86/cpu/quark/mrc_util.h	/^#define HOST_BRIDGE	/;"	d
HOST_CAP	include/ahci.h	/^#define HOST_CAP	/;"	d
HOST_CAP2	include/ahci.h	/^#define HOST_CAP2	/;"	d
HOST_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HOST_CONTROL /;"	d
HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HOST_CONTROL /;"	d
HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HOST_CONTROL /;"	d
HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HOST_CONTROL /;"	d
HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HOST_CONTROL /;"	d
HOST_CTL	include/ahci.h	/^#define HOST_CTL	/;"	d
HOST_CTRL	drivers/block/sata_sil.h	/^	HOST_CTRL		= 0x40,$/;"	e	enum:__anone6fe50d30103
HOST_CTRL0_COMMONON_N	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_COMMONON_N	/;"	d
HOST_CTRL0_FORCESLEEP	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_FORCESLEEP	/;"	d
HOST_CTRL0_FORCESUSPEND	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_FORCESUSPEND	/;"	d
HOST_CTRL0_FSEL_MASK	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_FSEL_MASK	/;"	d
HOST_CTRL0_LINKSWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_LINKSWRST	/;"	d
HOST_CTRL0_PHYSWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_PHYSWRST	/;"	d
HOST_CTRL0_PHYSWRSTALL	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_PHYSWRSTALL	/;"	d
HOST_CTRL0_SIDDQ	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_SIDDQ	/;"	d
HOST_CTRL0_UTMISWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_UTMISWRST	/;"	d
HOST_CTRL0_WORDINTERFACE	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HOST_CTRL0_WORDINTERFACE	/;"	d
HOST_CTRL_DEVSEL	drivers/block/sata_sil.h	/^	HOST_CTRL_DEVSEL	= (1 << 19), \/* latched PCI DEVSEL *\/$/;"	e	enum:__anone6fe50d30103
HOST_CTRL_GLOBAL_RST	drivers/block/sata_sil.h	/^	HOST_CTRL_GLOBAL_RST	= (1 << 31), \/* global reset *\/$/;"	e	enum:__anone6fe50d30103
HOST_CTRL_M66EN	drivers/block/sata_sil.h	/^	HOST_CTRL_M66EN		= (1 << 16), \/* M66EN PCI bus signal *\/$/;"	e	enum:__anone6fe50d30103
HOST_CTRL_REQ64	drivers/block/sata_sil.h	/^	HOST_CTRL_REQ64		= (1 << 20), \/* latched PCI REQ64 *\/$/;"	e	enum:__anone6fe50d30103
HOST_CTRL_STOP	drivers/block/sata_sil.h	/^	HOST_CTRL_STOP		= (1 << 18), \/* latched PCI STOP *\/$/;"	e	enum:__anone6fe50d30103
HOST_CTRL_TRDY	drivers/block/sata_sil.h	/^	HOST_CTRL_TRDY		= (1 << 17), \/* latched PCI TRDY *\/$/;"	e	enum:__anone6fe50d30103
HOST_DATA0	include/radeon.h	/^#define HOST_DATA0	/;"	d
HOST_DATA1	include/radeon.h	/^#define HOST_DATA1	/;"	d
HOST_DATA2	include/radeon.h	/^#define HOST_DATA2	/;"	d
HOST_DATA3	include/radeon.h	/^#define HOST_DATA3	/;"	d
HOST_DATA4	include/radeon.h	/^#define HOST_DATA4	/;"	d
HOST_DATA5	include/radeon.h	/^#define HOST_DATA5	/;"	d
HOST_DATA6	include/radeon.h	/^#define HOST_DATA6	/;"	d
HOST_DATA7	include/radeon.h	/^#define HOST_DATA7	/;"	d
HOST_DATA_LAST	include/radeon.h	/^#define HOST_DATA_LAST	/;"	d
HOST_EXTRACFLAGS	tools/env/Makefile	/^HOST_EXTRACFLAGS  = $(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \\$/;"	m
HOST_EXTRACFLAGS	tools/gdb/Makefile	/^HOST_EXTRACFLAGS := -I$(BFD_ROOT_DIR)\/include -pedantic$/;"	m
HOST_FLASH_CMD	drivers/block/sata_sil.h	/^	HOST_FLASH_CMD		= 0x70,$/;"	e	enum:__anone6fe50d30103
HOST_FLASH_DATA	drivers/block/sata_sil.h	/^	HOST_FLASH_DATA		= 0x74,$/;"	e	enum:__anone6fe50d30103
HOST_GPIO_CTRL	drivers/block/sata_sil.h	/^	HOST_GPIO_CTRL		= 0x76,$/;"	e	enum:__anone6fe50d30103
HOST_I2C_ADDR	drivers/block/sata_sil.h	/^	HOST_I2C_ADDR		= 0x78, \/* 32 bit *\/$/;"	e	enum:__anone6fe50d30103
HOST_I2C_CTRL	drivers/block/sata_sil.h	/^	HOST_I2C_CTRL		= 0x7f,$/;"	e	enum:__anone6fe50d30103
HOST_I2C_DATA	drivers/block/sata_sil.h	/^	HOST_I2C_DATA		= 0x7c,$/;"	e	enum:__anone6fe50d30103
HOST_I2C_XFER_CNT	drivers/block/sata_sil.h	/^	HOST_I2C_XFER_CNT	= 0x7e,$/;"	e	enum:__anone6fe50d30103
HOST_IRQ_EN	include/ahci.h	/^#define HOST_IRQ_EN	/;"	d
HOST_IRQ_STAT	drivers/block/sata_sil.h	/^	HOST_IRQ_STAT		= 0x44,$/;"	e	enum:__anone6fe50d30103
HOST_IRQ_STAT	include/ahci.h	/^#define HOST_IRQ_STAT	/;"	d
HOST_MEM_BIST_STAT	drivers/block/sata_sil.h	/^	HOST_MEM_BIST_STAT	= 0x5c,$/;"	e	enum:__anone6fe50d30103
HOST_MODE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define HOST_MODE	/;"	d
HOST_PATH_CNTL	include/radeon.h	/^#define HOST_PATH_CNTL	/;"	d
HOST_PHY_CFG	drivers/block/sata_sil.h	/^	HOST_PHY_CFG		= 0x48,$/;"	e	enum:__anone6fe50d30103
HOST_PORTS_IMPL	include/ahci.h	/^#define HOST_PORTS_IMPL	/;"	d
HOST_RD_REG	drivers/video/mb862xx.c	/^#define HOST_RD_REG(/;"	d	file:
HOST_REMAP_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	HOST_REMAP_MASK		= 1$/;"	e	enum:__anonbeb2b9771203
HOST_REMAP_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	HOST_REMAP_SHIFT	= 0x5,$/;"	e	enum:__anonbeb2b9771203
HOST_REQ	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define HOST_REQ	/;"	d
HOST_RESET	include/ahci.h	/^#define HOST_RESET	/;"	d
HOST_SLOT_STAT	drivers/block/sata_sil.h	/^	HOST_SLOT_STAT		= 0x00, \/* 32 bit slot stat * 4 *\/$/;"	e	enum:__anone6fe50d30103
HOST_SSTAT_ATTN	drivers/block/sata_sil.h	/^	HOST_SSTAT_ATTN		= (1 << 31),$/;"	e	enum:__anone6fe50d30103
HOST_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HOST_STATUS /;"	d
HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HOST_STATUS /;"	d
HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HOST_STATUS /;"	d
HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HOST_STATUS /;"	d
HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HOST_STATUS /;"	d
HOST_SW_RST	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define HOST_SW_RST /;"	d
HOST_TERM_XFER_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define        HOST_TERM_XFER_INT /;"	d
HOST_TERM_XFER_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define       HOST_TERM_XFER_MASK /;"	d
HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define HOST_TIMEOUT /;"	d
HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define HOST_TIMEOUT /;"	d
HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define HOST_TIMEOUT /;"	d
HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define HOST_TIMEOUT /;"	d
HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define HOST_TIMEOUT /;"	d
HOST_TOOLS_ALL	Makefile	/^tools-all: export HOST_TOOLS_ALL=y$/;"	m
HOST_TRANSITION_DETECT	drivers/block/sata_sil.h	/^	HOST_TRANSITION_DETECT	= 0x75,$/;"	e	enum:__anone6fe50d30103
HOST_VERSION	include/ahci.h	/^#define HOST_VERSION	/;"	d
HOST_WR_REG	drivers/video/mb862xx.c	/^#define HOST_WR_REG(/;"	d	file:
HOST_XHCI_H_	drivers/usb/host/xhci.h	/^#define HOST_XHCI_H_$/;"	d
HOTPLUG_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HOTPLUG_CHG	/;"	d
HOTPLUG_CHG	arch/arm/mach-exynos/include/mach/dp.h	/^#define HOTPLUG_CHG	/;"	d
HOT_PLUG_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   HOT_PLUG_EN	/;"	d
HOT_PLUG_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   HOT_PLUG_STS	/;"	d
HOT_PLUG_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   HOT_PLUG_STS	/;"	d
HOT_WATER_BUTTON	board/htkw/mcx/mcx.c	/^#define HOT_WATER_BUTTON	/;"	d	file:
HOUR	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	HOUR	/;"	d
HOURSPERDAY	include/linux/time.h	/^#define HOURSPERDAY	/;"	d
HOURS_12	drivers/rtc/rs5c372.c	/^#define HOURS_12(/;"	d	file:
HOURS_24	drivers/rtc/rs5c372.c	/^#define HOURS_24(/;"	d	file:
HOURS_AP	drivers/rtc/rs5c372.c	/^#define HOURS_AP(/;"	d	file:
HOUR_MASK	drivers/rtc/mx27rtc.c	/^#define HOUR_MASK /;"	d	file:
HOUR_SHIFT	drivers/rtc/mx27rtc.c	/^#define HOUR_SHIFT /;"	d	file:
HPBSCR_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define HPBSCR_BASE /;"	d
HPB_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define HPB_BASE	/;"	d
HPB_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define HPB_BASE	/;"	d
HPCOMR_SSM_SFNS_DIS	include/fsl_sec_mon.h	/^#define HPCOMR_SSM_SFNS_DIS	/;"	d
HPCOMR_SSM_ST	include/fsl_sec_mon.h	/^#define HPCOMR_SSM_ST	/;"	d
HPCOMR_SSM_ST_DIS	include/fsl_sec_mon.h	/^#define HPCOMR_SSM_ST_DIS	/;"	d
HPCOMR_SW_FSV	include/fsl_sec_mon.h	/^#define HPCOMR_SW_FSV	/;"	d
HPCOMR_SW_SV	include/fsl_sec_mon.h	/^#define HPCOMR_SW_SV	/;"	d
HPD_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HPD_CTRL	/;"	d
HPD_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define HPD_CTRL	/;"	d
HPD_LOST	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HPD_LOST	/;"	d
HPD_LOST	arch/arm/mach-exynos/include/mach/dp.h	/^#define HPD_LOST	/;"	d
HPD_STATUS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HPD_STATUS	/;"	d
HPD_STATUS	arch/arm/mach-exynos/include/mach/dp.h	/^#define HPD_STATUS	/;"	d
HPET_ADDRESS	arch/x86/Kconfig	/^config HPET_ADDRESS$/;"	c	menu:x86 architecture
HPET_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define HPET_BASE_ADDRESS	/;"	d
HPET_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define HPET_BASE_ADDRESS	/;"	d
HPET_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define HPET_BASE_ADDRESS	/;"	d
HPET_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define HPET_BASE_SIZE	/;"	d
HPET_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define HPET_BASE_SIZE	/;"	d
HPIPE_ADDR	drivers/phy/marvell/comphy_cp110.c	/^#define HPIPE_ADDR(/;"	d	file:
HPIPE_CAL_REG1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CAL_REG1_REG	/;"	d
HPIPE_CAL_REG_1_EXT_TXIMP_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CAL_REG_1_EXT_TXIMP_EN_MASK	/;"	d
HPIPE_CAL_REG_1_EXT_TXIMP_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CAL_REG_1_EXT_TXIMP_EN_OFFSET	/;"	d
HPIPE_CAL_REG_1_EXT_TXIMP_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CAL_REG_1_EXT_TXIMP_MASK	/;"	d
HPIPE_CAL_REG_1_EXT_TXIMP_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CAL_REG_1_EXT_TXIMP_OFFSET	/;"	d
HPIPE_CFG_PHY_RC_EP_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CFG_PHY_RC_EP_MASK	/;"	d
HPIPE_CFG_PHY_RC_EP_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CFG_PHY_RC_EP_OFFSET	/;"	d
HPIPE_CFG_UPDATE_POLARITY_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CFG_UPDATE_POLARITY_MASK	/;"	d
HPIPE_CFG_UPDATE_POLARITY_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CFG_UPDATE_POLARITY_OFFSET	/;"	d
HPIPE_CLK_SRC_HI_LANE_BREAK_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_LANE_BREAK_MASK	/;"	d
HPIPE_CLK_SRC_HI_LANE_BREAK_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_LANE_BREAK_OFFSET	/;"	d
HPIPE_CLK_SRC_HI_LANE_MASTER_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_LANE_MASTER_MASK	/;"	d
HPIPE_CLK_SRC_HI_LANE_MASTER_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_LANE_MASTER_OFFSET	/;"	d
HPIPE_CLK_SRC_HI_LANE_STRT_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_LANE_STRT_MASK	/;"	d
HPIPE_CLK_SRC_HI_LANE_STRT_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_LANE_STRT_OFFSET	/;"	d
HPIPE_CLK_SRC_HI_MODE_PIPE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_MODE_PIPE_MASK	/;"	d
HPIPE_CLK_SRC_HI_MODE_PIPE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_MODE_PIPE_OFFSET	/;"	d
HPIPE_CLK_SRC_HI_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_HI_REG	/;"	d
HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SCALE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SCALE_MASK /;"	d
HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SCALE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SCALE_OFFSET /;"	d
HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SEL_MASK	/;"	d
HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_BUNDLE_PERIOD_SEL_OFFSET /;"	d
HPIPE_CLK_SRC_LO_PLL_RDY_DL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_PLL_RDY_DL_MASK	/;"	d
HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET	/;"	d
HPIPE_CLK_SRC_LO_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_CLK_SRC_LO_REG	/;"	d
HPIPE_DFE_CTRL_28_PIPE4_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_CTRL_28_PIPE4_MASK	/;"	d
HPIPE_DFE_CTRL_28_PIPE4_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_CTRL_28_PIPE4_OFFSET	/;"	d
HPIPE_DFE_CTRL_28_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_CTRL_28_REG	/;"	d
HPIPE_DFE_F3_F5_DFE_CTRL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_F3_F5_DFE_CTRL_MASK	/;"	d
HPIPE_DFE_F3_F5_DFE_CTRL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_F3_F5_DFE_CTRL_OFFSET	/;"	d
HPIPE_DFE_F3_F5_DFE_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_F3_F5_DFE_EN_MASK	/;"	d
HPIPE_DFE_F3_F5_DFE_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_F3_F5_DFE_EN_OFFSET	/;"	d
HPIPE_DFE_F3_F5_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_F3_F5_REG	/;"	d
HPIPE_DFE_REG0	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_REG0	/;"	d
HPIPE_DFE_RES_FORCE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_RES_FORCE_MASK	/;"	d
HPIPE_DFE_RES_FORCE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_DFE_RES_FORCE_OFFSET	/;"	d
HPIPE_G1_SETTINGS_3_G1_FBCK_SEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTINGS_3_G1_FBCK_SEL_MASK	/;"	d
HPIPE_G1_SETTINGS_3_G1_FBCK_SEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTINGS_3_G1_FBCK_SEL_OFFSET	/;"	d
HPIPE_G1_SETTINGS_3_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTINGS_3_REG	/;"	d
HPIPE_G1_SETTINGS_4_G1_DFE_RES_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTINGS_4_G1_DFE_RES_MASK	/;"	d
HPIPE_G1_SETTINGS_4_G1_DFE_RES_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTINGS_4_G1_DFE_RES_OFFSET	/;"	d
HPIPE_G1_SETTINGS_4_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTINGS_4_REG	/;"	d
HPIPE_G1_SETTING_5_G1_ICP_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTING_5_G1_ICP_MASK	/;"	d
HPIPE_G1_SETTING_5_G1_ICP_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTING_5_G1_ICP_OFFSET	/;"	d
HPIPE_G1_SETTING_5_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SETTING_5_REG	/;"	d
HPIPE_G1_SET_0_G1_TX_AMP_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_0_G1_TX_AMP_MASK	/;"	d
HPIPE_G1_SET_0_G1_TX_AMP_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_0_G1_TX_AMP_OFFSET	/;"	d
HPIPE_G1_SET_0_G1_TX_EMPH1_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_0_G1_TX_EMPH1_MASK	/;"	d
HPIPE_G1_SET_0_G1_TX_EMPH1_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_0_G1_TX_EMPH1_OFFSET	/;"	d
HPIPE_G1_SET_0_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_0_REG	/;"	d
HPIPE_G1_SET_1_G1_RX_DFE_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_G1_RX_DFE_EN_MASK	/;"	d
HPIPE_G1_SET_1_G1_RX_DFE_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_G1_RX_DFE_EN_OFFSET	/;"	d
HPIPE_G1_SET_1_G1_RX_SELMUPI_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_G1_RX_SELMUPI_MASK	/;"	d
HPIPE_G1_SET_1_G1_RX_SELMUPI_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_G1_RX_SELMUPI_OFFSET	/;"	d
HPIPE_G1_SET_1_G1_RX_SELMUPP_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_G1_RX_SELMUPP_MASK	/;"	d
HPIPE_G1_SET_1_G1_RX_SELMUPP_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_G1_RX_SELMUPP_OFFSET	/;"	d
HPIPE_G1_SET_1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_1_REG	/;"	d
HPIPE_G1_SET_2_G1_TX_EMPH0_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_2_G1_TX_EMPH0_EN_MASK	/;"	d
HPIPE_G1_SET_2_G1_TX_EMPH0_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_2_G1_TX_EMPH0_EN_OFFSET	/;"	d
HPIPE_G1_SET_2_G1_TX_EMPH0_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_2_G1_TX_EMPH0_MASK	/;"	d
HPIPE_G1_SET_2_G1_TX_EMPH0_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_2_G1_TX_EMPH0_OFFSET	/;"	d
HPIPE_G1_SET_2_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G1_SET_2_REG	/;"	d
HPIPE_G2_SETTINGS_1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G2_SETTINGS_1_REG	/;"	d
HPIPE_G2_SETTINGS_3_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G2_SETTINGS_3_REG	/;"	d
HPIPE_G2_SETTINGS_4_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G2_SETTINGS_4_REG	/;"	d
HPIPE_G3_DFE_RES_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_DFE_RES_MASK	/;"	d
HPIPE_G3_DFE_RES_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_DFE_RES_OFFSET	/;"	d
HPIPE_G3_FFE_DEG_RES_LEVEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_FFE_DEG_RES_LEVEL_MASK	/;"	d
HPIPE_G3_FFE_DEG_RES_LEVEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_FFE_DEG_RES_LEVEL_OFFSET	/;"	d
HPIPE_G3_FFE_LOAD_RES_LEVEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_FFE_LOAD_RES_LEVEL_MASK	/;"	d
HPIPE_G3_FFE_LOAD_RES_LEVEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_FFE_LOAD_RES_LEVEL_OFFSET	/;"	d
HPIPE_G3_RX_SELMUPF_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_RX_SELMUPF_MASK	/;"	d
HPIPE_G3_RX_SELMUPF_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_RX_SELMUPF_OFFSET	/;"	d
HPIPE_G3_RX_SELMUPI_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_RX_SELMUPI_MASK	/;"	d
HPIPE_G3_RX_SELMUPI_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_RX_SELMUPI_OFFSET	/;"	d
HPIPE_G3_SETTINGS_1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_SETTINGS_1_REG	/;"	d
HPIPE_G3_SETTING_3_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_SETTING_3_REG	/;"	d
HPIPE_G3_SETTING_4_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_SETTING_4_REG	/;"	d
HPIPE_G3_SETTING_BIT_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_SETTING_BIT_MASK	/;"	d
HPIPE_G3_SETTING_BIT_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_G3_SETTING_BIT_OFFSET	/;"	d
HPIPE_GLOBAL_MISC_CTRL	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_GLOBAL_MISC_CTRL /;"	d
HPIPE_GLOBAL_PM_CTRL	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_GLOBAL_PM_CTRL /;"	d
HPIPE_GLOBAL_PM_RXDLOZ_WAIT_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_GLOBAL_PM_RXDLOZ_WAIT_MASK	/;"	d
HPIPE_GLOBAL_PM_RXDLOZ_WAIT_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_GLOBAL_PM_RXDLOZ_WAIT_OFFSET	/;"	d
HPIPE_INTERFACE_GEN_MAX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_INTERFACE_GEN_MAX_MASK	/;"	d
HPIPE_INTERFACE_GEN_MAX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_INTERFACE_GEN_MAX_OFFSET	/;"	d
HPIPE_INTERFACE_LINK_TRAIN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_INTERFACE_LINK_TRAIN_MASK	/;"	d
HPIPE_INTERFACE_LINK_TRAIN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_INTERFACE_LINK_TRAIN_OFFSET	/;"	d
HPIPE_INTERFACE_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_INTERFACE_REG	/;"	d
HPIPE_ISOLATE_MODE_GEN_RX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_ISOLATE_MODE_GEN_RX_MASK	/;"	d
HPIPE_ISOLATE_MODE_GEN_RX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_ISOLATE_MODE_GEN_RX_OFFSET	/;"	d
HPIPE_ISOLATE_MODE_GEN_TX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_ISOLATE_MODE_GEN_TX_MASK	/;"	d
HPIPE_ISOLATE_MODE_GEN_TX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_ISOLATE_MODE_GEN_TX_OFFSET	/;"	d
HPIPE_ISOLATE_MODE_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_ISOLATE_MODE_REG	/;"	d
HPIPE_KVCO_CALIB_CTRL_MAX_PLL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_KVCO_CALIB_CTRL_MAX_PLL_MASK	/;"	d
HPIPE_KVCO_CALIB_CTRL_MAX_PLL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_KVCO_CALIB_CTRL_MAX_PLL_OFFSET	/;"	d
HPIPE_KVCO_CALIB_CTRL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_KVCO_CALIB_CTRL_REG	/;"	d
HPIPE_LANE_ALIGN_OFF_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_ALIGN_OFF_MASK	/;"	d
HPIPE_LANE_ALIGN_OFF_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_ALIGN_OFF_OFFSET	/;"	d
HPIPE_LANE_ALIGN_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_ALIGN_REG	/;"	d
HPIPE_LANE_CFG4_DFE_CTRL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_DFE_CTRL_MASK	/;"	d
HPIPE_LANE_CFG4_DFE_CTRL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_DFE_CTRL_OFFSET	/;"	d
HPIPE_LANE_CFG4_DFE_OVER_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_DFE_OVER_MASK	/;"	d
HPIPE_LANE_CFG4_DFE_OVER_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_DFE_OVER_OFFSET	/;"	d
HPIPE_LANE_CFG4_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_REG /;"	d
HPIPE_LANE_CFG4_SSC_CTRL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_SSC_CTRL_MASK	/;"	d
HPIPE_LANE_CFG4_SSC_CTRL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CFG4_SSC_CTRL_OFFSET	/;"	d
HPIPE_LANE_CONFIG0_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG0_REG	/;"	d
HPIPE_LANE_CONFIG0_TXDEEMPH0_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG0_TXDEEMPH0_MASK	/;"	d
HPIPE_LANE_CONFIG0_TXDEEMPH0_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG0_TXDEEMPH0_OFFSET	/;"	d
HPIPE_LANE_CONFIG1_GEN2_PLL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG1_GEN2_PLL_MASK	/;"	d
HPIPE_LANE_CONFIG1_GEN2_PLL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG1_GEN2_PLL_OFFSET	/;"	d
HPIPE_LANE_CONFIG1_MAX_PLL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG1_MAX_PLL_MASK	/;"	d
HPIPE_LANE_CONFIG1_MAX_PLL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG1_MAX_PLL_OFFSET	/;"	d
HPIPE_LANE_CONFIG1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_CONFIG1_REG	/;"	d
HPIPE_LANE_EQU_CONFIG_0_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_EQU_CONFIG_0_REG	/;"	d
HPIPE_LANE_EQ_CFG1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_EQ_CFG1_REG	/;"	d
HPIPE_LANE_STATUS1_PCLK_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_STATUS1_PCLK_EN_MASK	/;"	d
HPIPE_LANE_STATUS1_PCLK_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_STATUS1_PCLK_EN_OFFSET	/;"	d
HPIPE_LANE_STATUS1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LANE_STATUS1_REG	/;"	d
HPIPE_LOOPBACK_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LOOPBACK_REG	/;"	d
HPIPE_LOOPBACK_SEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LOOPBACK_SEL_MASK	/;"	d
HPIPE_LOOPBACK_SEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_LOOPBACK_SEL_OFFSET	/;"	d
HPIPE_MISC_CLK100M_125M_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_CLK100M_125M_MASK	/;"	d
HPIPE_MISC_CLK100M_125M_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_CLK100M_125M_OFFSET	/;"	d
HPIPE_MISC_CLK500_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_CLK500_EN_MASK	/;"	d
HPIPE_MISC_CLK500_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_CLK500_EN_OFFSET	/;"	d
HPIPE_MISC_ICP_FORCE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_ICP_FORCE_MASK	/;"	d
HPIPE_MISC_ICP_FORCE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_ICP_FORCE_OFFSET	/;"	d
HPIPE_MISC_REFCLK_SEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_REFCLK_SEL_MASK	/;"	d
HPIPE_MISC_REFCLK_SEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_REFCLK_SEL_OFFSET	/;"	d
HPIPE_MISC_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_REG	/;"	d
HPIPE_MISC_TXDCLK_2X_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_TXDCLK_2X_MASK	/;"	d
HPIPE_MISC_TXDCLK_2X_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_MISC_TXDCLK_2X_OFFSET	/;"	d
HPIPE_PCIE_IDLE_SYNC_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_IDLE_SYNC_MASK	/;"	d
HPIPE_PCIE_IDLE_SYNC_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_IDLE_SYNC_OFFSET	/;"	d
HPIPE_PCIE_REG0	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_REG0 /;"	d
HPIPE_PCIE_REG1	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_REG1	/;"	d
HPIPE_PCIE_REG3	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_REG3	/;"	d
HPIPE_PCIE_SEL_BITS_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_SEL_BITS_MASK	/;"	d
HPIPE_PCIE_SEL_BITS_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PCIE_SEL_BITS_OFFSET	/;"	d
HPIPE_PLLINTP_REG1	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PLLINTP_REG1	/;"	d
HPIPE_PWR_CTR_DTL_FLOOP_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_DTL_FLOOP_EN_MASK	/;"	d
HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET	/;"	d
HPIPE_PWR_CTR_DTL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_DTL_REG	/;"	d
HPIPE_PWR_CTR_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_REG	/;"	d
HPIPE_PWR_CTR_RST_DFE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_RST_DFE_MASK	/;"	d
HPIPE_PWR_CTR_RST_DFE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_RST_DFE_OFFSET	/;"	d
HPIPE_PWR_CTR_SFT_RST_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_SFT_RST_MASK	/;"	d
HPIPE_PWR_CTR_SFT_RST_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_CTR_SFT_RST_OFFSET	/;"	d
HPIPE_PWR_PLL_PHY_MODE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_PLL_PHY_MODE_MASK	/;"	d
HPIPE_PWR_PLL_PHY_MODE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_PLL_PHY_MODE_OFFSET	/;"	d
HPIPE_PWR_PLL_REF_FREQ_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_PLL_REF_FREQ_MASK	/;"	d
HPIPE_PWR_PLL_REF_FREQ_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_PLL_REF_FREQ_OFFSET	/;"	d
HPIPE_PWR_PLL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_PWR_PLL_REG	/;"	d
HPIPE_RST_CLK_CTRL_CORE_FREQ_SEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_CORE_FREQ_SEL_MASK	/;"	d
HPIPE_RST_CLK_CTRL_CORE_FREQ_SEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_CORE_FREQ_SEL_OFFSET	/;"	d
HPIPE_RST_CLK_CTRL_FIXED_PCLK_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_FIXED_PCLK_MASK	/;"	d
HPIPE_RST_CLK_CTRL_FIXED_PCLK_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_FIXED_PCLK_OFFSET	/;"	d
HPIPE_RST_CLK_CTRL_PIPE_RST_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_PIPE_RST_MASK	/;"	d
HPIPE_RST_CLK_CTRL_PIPE_RST_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_PIPE_RST_OFFSET	/;"	d
HPIPE_RST_CLK_CTRL_PIPE_WIDTH_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_PIPE_WIDTH_MASK	/;"	d
HPIPE_RST_CLK_CTRL_PIPE_WIDTH_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_PIPE_WIDTH_OFFSET	/;"	d
HPIPE_RST_CLK_CTRL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RST_CLK_CTRL_REG	/;"	d
HPIPE_RX_CONTROL_1_CLK8T_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RX_CONTROL_1_CLK8T_EN_MASK	/;"	d
HPIPE_RX_CONTROL_1_CLK8T_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RX_CONTROL_1_CLK8T_EN_OFFSET	/;"	d
HPIPE_RX_CONTROL_1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RX_CONTROL_1_REG	/;"	d
HPIPE_RX_CONTROL_1_RXCLK2X_SEL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RX_CONTROL_1_RXCLK2X_SEL_MASK	/;"	d
HPIPE_RX_CONTROL_1_RXCLK2X_SEL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RX_CONTROL_1_RXCLK2X_SEL_OFFSET	/;"	d
HPIPE_RX_REG3	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_RX_REG3	/;"	d
HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG	/;"	d
HPIPE_SMAPLER_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_SMAPLER_MASK	/;"	d
HPIPE_SMAPLER_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_SMAPLER_OFFSET	/;"	d
HPIPE_SQUELCH_FFE_SETTING_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_SQUELCH_FFE_SETTING_REG /;"	d
HPIPE_SYNC_PATTERN_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_SYNC_PATTERN_REG /;"	d
HPIPE_TRX_TRAIN_TIMER_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TRX_TRAIN_TIMER_MASK	/;"	d
HPIPE_TRX_TRAIN_TIMER_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TRX_TRAIN_TIMER_OFFSET	/;"	d
HPIPE_TST_MODE_CTRL_MODE_MARGIN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TST_MODE_CTRL_MODE_MARGIN_MASK	/;"	d
HPIPE_TST_MODE_CTRL_MODE_MARGIN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TST_MODE_CTRL_MODE_MARGIN_OFFSET	/;"	d
HPIPE_TST_MODE_CTRL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TST_MODE_CTRL_REG	/;"	d
HPIPE_TX_NUM_OF_PRESET_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_NUM_OF_PRESET_MASK	/;"	d
HPIPE_TX_NUM_OF_PRESET_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_NUM_OF_PRESET_OFFSET	/;"	d
HPIPE_TX_REG1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_REG1_REG	/;"	d
HPIPE_TX_REG1_SLC_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_REG1_SLC_EN_MASK	/;"	d
HPIPE_TX_REG1_SLC_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_REG1_SLC_EN_OFFSET	/;"	d
HPIPE_TX_REG1_TX_EMPH_RES_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_REG1_TX_EMPH_RES_MASK	/;"	d
HPIPE_TX_REG1_TX_EMPH_RES_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_REG1_TX_EMPH_RES_OFFSET	/;"	d
HPIPE_TX_STATUS_CHECK_MODE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_STATUS_CHECK_MODE_OFFSET	/;"	d
HPIPE_TX_SWEEP_PRESET_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_SWEEP_PRESET_EN_MASK	/;"	d
HPIPE_TX_SWEEP_PRESET_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_SWEEP_PRESET_EN_OFFSET	/;"	d
HPIPE_TX_TRAIN_CHK_INIT_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CHK_INIT_MASK	/;"	d
HPIPE_TX_TRAIN_CHK_INIT_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CHK_INIT_OFFSET	/;"	d
HPIPE_TX_TRAIN_COE_FM_PIN_PCIE3_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_COE_FM_PIN_PCIE3_MASK	/;"	d
HPIPE_TX_TRAIN_COE_FM_PIN_PCIE3_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_COE_FM_PIN_PCIE3_OFFSET	/;"	d
HPIPE_TX_TRAIN_CTRL_0_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_0_REG	/;"	d
HPIPE_TX_TRAIN_CTRL_11_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_11_REG	/;"	d
HPIPE_TX_TRAIN_CTRL_4_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_4_REG	/;"	d
HPIPE_TX_TRAIN_CTRL_5_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_5_REG	/;"	d
HPIPE_TX_TRAIN_CTRL_G0_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_G0_MASK	/;"	d
HPIPE_TX_TRAIN_CTRL_G0_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_G0_OFFSET	/;"	d
HPIPE_TX_TRAIN_CTRL_G1_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_G1_MASK	/;"	d
HPIPE_TX_TRAIN_CTRL_G1_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_G1_OFFSET	/;"	d
HPIPE_TX_TRAIN_CTRL_GN1_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_GN1_MASK	/;"	d
HPIPE_TX_TRAIN_CTRL_GN1_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_GN1_OFFSET	/;"	d
HPIPE_TX_TRAIN_CTRL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_CTRL_REG	/;"	d
HPIPE_TX_TRAIN_P2P_HOLD_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_P2P_HOLD_MASK	/;"	d
HPIPE_TX_TRAIN_P2P_HOLD_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_P2P_HOLD_OFFSET	/;"	d
HPIPE_TX_TRAIN_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_REG	/;"	d
HPIPE_TX_TRAIN_START_FRM_DET_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_START_FRM_DET_EN_MASK	/;"	d
HPIPE_TX_TRAIN_START_FRM_DET_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_START_FRM_DET_EN_OFFSET	/;"	d
HPIPE_TX_TRAIN_START_FRM_LOCK_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_START_FRM_LOCK_EN_MASK	/;"	d
HPIPE_TX_TRAIN_START_FRM_LOCK_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_START_FRM_LOCK_EN_OFFSET	/;"	d
HPIPE_TX_TRAIN_START_SQ_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_START_SQ_EN_MASK	/;"	d
HPIPE_TX_TRAIN_START_SQ_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_START_SQ_EN_OFFSET	/;"	d
HPIPE_TX_TRAIN_WAIT_TIME_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_WAIT_TIME_EN_MASK	/;"	d
HPIPE_TX_TRAIN_WAIT_TIME_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TRAIN_WAIT_TIME_EN_OFFSET	/;"	d
HPIPE_TX_TX_STATUS_CHECK_MODE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_TX_TX_STATUS_CHECK_MODE_MASK	/;"	d
HPIPE_VTHIMPCAL_CTRL_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define HPIPE_VTHIMPCAL_CTRL_REG /;"	d
HPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define HPLL	/;"	d
HPLL	arch/arm/mach-s5pc1xx/include/mach/clk.h	/^#define HPLL	/;"	d
HPM_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define HPM_RATIO	/;"	d
HPM_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define HPM_RATIO /;"	d
HPM_RATIO	board/samsung/odroid/setup.h	/^#define HPM_RATIO(/;"	d
HPM_RATIO	board/samsung/trats/setup.h	/^#define HPM_RATIO	/;"	d
HPM_SEL	board/samsung/odroid/setup.h	/^#define HPM_SEL(/;"	d
HPM_SEL_SCLK_MPLL	arch/arm/mach-exynos/exynos5_setup.h	/^#define HPM_SEL_SCLK_MPLL	/;"	d
HPS2FPGA_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPS2FPGA_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define HPS2FPGA_RESET	/;"	d
HPSMI_SRAM_CONTROLLER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define HPSMI_SRAM_CONTROLLER_BASE_ADDR	/;"	d
HPSR_SSM_ST_CHECK	include/fsl_sec_mon.h	/^#define HPSR_SSM_ST_CHECK	/;"	d
HPSR_SSM_ST_MASK	include/fsl_sec_mon.h	/^#define HPSR_SSM_ST_MASK	/;"	d
HPSR_SSM_ST_NON_SECURE	include/fsl_sec_mon.h	/^#define HPSR_SSM_ST_NON_SECURE	/;"	d
HPSR_SSM_ST_SECURE	include/fsl_sec_mon.h	/^#define HPSR_SSM_ST_SECURE	/;"	d
HPSR_SSM_ST_SOFT_FAIL	include/fsl_sec_mon.h	/^#define HPSR_SSM_ST_SOFT_FAIL	/;"	d
HPSR_SSM_ST_TRUST	include/fsl_sec_mon.h	/^#define HPSR_SSM_ST_TRUST	/;"	d
HPTC	arch/x86/include/asm/arch-broadwell/pch.h	/^#define HPTC	/;"	d
HPTC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define HPTC	/;"	d
HPTC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define HPTC	/;"	d
HRCWH_32_BIT_PCI	include/mpc83xx.h	/^#define HRCWH_32_BIT_PCI	/;"	d
HRCWH_64_BIT_PCI	include/mpc83xx.h	/^#define HRCWH_64_BIT_PCI	/;"	d
HRCWH_BIG_ENDIAN	include/mpc83xx.h	/^#define HRCWH_BIG_ENDIAN	/;"	d
HRCWH_BOOTSEQ_DISABLE	include/mpc83xx.h	/^#define HRCWH_BOOTSEQ_DISABLE	/;"	d
HRCWH_BOOTSEQ_EXTENDED	include/mpc83xx.h	/^#define HRCWH_BOOTSEQ_EXTENDED	/;"	d
HRCWH_BOOTSEQ_NORMAL	include/mpc83xx.h	/^#define HRCWH_BOOTSEQ_NORMAL	/;"	d
HRCWH_CORE_DISABLE	include/mpc83xx.h	/^#define HRCWH_CORE_DISABLE	/;"	d
HRCWH_CORE_ENABLE	include/mpc83xx.h	/^#define HRCWH_CORE_ENABLE	/;"	d
HRCWH_FROM_0X00000100	include/mpc83xx.h	/^#define HRCWH_FROM_0X00000100	/;"	d
HRCWH_FROM_0XFFF00100	include/mpc83xx.h	/^#define HRCWH_FROM_0XFFF00100	/;"	d
HRCWH_LALE_EARLY	include/mpc83xx.h	/^#define HRCWH_LALE_EARLY	/;"	d
HRCWH_LALE_NORMAL	include/mpc83xx.h	/^#define HRCWH_LALE_NORMAL	/;"	d
HRCWH_LDP_CLEAR	include/mpc83xx.h	/^#define HRCWH_LDP_CLEAR	/;"	d
HRCWH_LDP_SET	include/mpc83xx.h	/^#define HRCWH_LDP_SET	/;"	d
HRCWH_LITTLE_ENDIAN	include/mpc83xx.h	/^#define HRCWH_LITTLE_ENDIAN	/;"	d
HRCWH_PCI1_ARBITER_DISABLE	include/mpc83xx.h	/^#define HRCWH_PCI1_ARBITER_DISABLE	/;"	d
HRCWH_PCI1_ARBITER_ENABLE	include/mpc83xx.h	/^#define HRCWH_PCI1_ARBITER_ENABLE	/;"	d
HRCWH_PCI2_ARBITER_DISABLE	include/mpc83xx.h	/^#define HRCWH_PCI2_ARBITER_DISABLE	/;"	d
HRCWH_PCI2_ARBITER_ENABLE	include/mpc83xx.h	/^#define HRCWH_PCI2_ARBITER_ENABLE	/;"	d
HRCWH_PCICKDRV_DISABLE	include/mpc83xx.h	/^#define HRCWH_PCICKDRV_DISABLE	/;"	d
HRCWH_PCICKDRV_ENABLE	include/mpc83xx.h	/^#define HRCWH_PCICKDRV_ENABLE	/;"	d
HRCWH_PCI_AGENT	include/mpc83xx.h	/^#define HRCWH_PCI_AGENT	/;"	d
HRCWH_PCI_ARBITER_DISABLE	include/mpc83xx.h	/^#define HRCWH_PCI_ARBITER_DISABLE	/;"	d
HRCWH_PCI_ARBITER_ENABLE	include/mpc83xx.h	/^#define HRCWH_PCI_ARBITER_ENABLE	/;"	d
HRCWH_PCI_HOST	include/mpc83xx.h	/^#define HRCWH_PCI_HOST	/;"	d
HRCWH_PCI_HOST_SHIFT	include/mpc83xx.h	/^#define HRCWH_PCI_HOST_SHIFT	/;"	d
HRCWH_RL_EXT_LEGACY	include/mpc83xx.h	/^#define HRCWH_RL_EXT_LEGACY	/;"	d
HRCWH_RL_EXT_NAND	include/mpc83xx.h	/^#define HRCWH_RL_EXT_NAND	/;"	d
HRCWH_ROM_LOC_DDR_SDRAM	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_DDR_SDRAM	/;"	d
HRCWH_ROM_LOC_LOCAL_16BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_LOCAL_16BIT	/;"	d
HRCWH_ROM_LOC_LOCAL_32BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_LOCAL_32BIT	/;"	d
HRCWH_ROM_LOC_LOCAL_8BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_LOCAL_8BIT	/;"	d
HRCWH_ROM_LOC_NAND_LP_16BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_NAND_LP_16BIT	/;"	d
HRCWH_ROM_LOC_NAND_LP_8BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_NAND_LP_8BIT	/;"	d
HRCWH_ROM_LOC_NAND_SP_16BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_NAND_SP_16BIT	/;"	d
HRCWH_ROM_LOC_NAND_SP_8BIT	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_NAND_SP_8BIT	/;"	d
HRCWH_ROM_LOC_ON_CHIP_ROM	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_ON_CHIP_ROM	/;"	d
HRCWH_ROM_LOC_PCI1	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_PCI1	/;"	d
HRCWH_ROM_LOC_PCI2	include/mpc83xx.h	/^#define HRCWH_ROM_LOC_PCI2	/;"	d
HRCWH_SECONDARY_DDR_DISABLE	include/mpc83xx.h	/^#define HRCWH_SECONDARY_DDR_DISABLE	/;"	d
HRCWH_SECONDARY_DDR_ENABLE	include/mpc83xx.h	/^#define HRCWH_SECONDARY_DDR_ENABLE	/;"	d
HRCWH_SW_WATCHDOG_DISABLE	include/mpc83xx.h	/^#define HRCWH_SW_WATCHDOG_DISABLE	/;"	d
HRCWH_SW_WATCHDOG_ENABLE	include/mpc83xx.h	/^#define HRCWH_SW_WATCHDOG_ENABLE	/;"	d
HRCWH_TSEC1M_IN_GMII	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_GMII	/;"	d
HRCWH_TSEC1M_IN_MII	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_MII	/;"	d
HRCWH_TSEC1M_IN_RGMII	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_RGMII	/;"	d
HRCWH_TSEC1M_IN_RMII	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_RMII	/;"	d
HRCWH_TSEC1M_IN_RTBI	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_RTBI	/;"	d
HRCWH_TSEC1M_IN_SGMII	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_SGMII	/;"	d
HRCWH_TSEC1M_IN_TBI	include/mpc83xx.h	/^#define HRCWH_TSEC1M_IN_TBI	/;"	d
HRCWH_TSEC1M_MASK	include/mpc83xx.h	/^#define HRCWH_TSEC1M_MASK	/;"	d
HRCWH_TSEC2M_IN_GMII	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_GMII	/;"	d
HRCWH_TSEC2M_IN_MII	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_MII	/;"	d
HRCWH_TSEC2M_IN_RGMII	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_RGMII	/;"	d
HRCWH_TSEC2M_IN_RMII	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_RMII	/;"	d
HRCWH_TSEC2M_IN_RTBI	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_RTBI	/;"	d
HRCWH_TSEC2M_IN_SGMII	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_SGMII	/;"	d
HRCWH_TSEC2M_IN_TBI	include/mpc83xx.h	/^#define HRCWH_TSEC2M_IN_TBI	/;"	d
HRCWH_TSEC2M_MASK	include/mpc83xx.h	/^#define HRCWH_TSEC2M_MASK	/;"	d
HRCWL_CEPDF	include/mpc83xx.h	/^#define HRCWL_CEPDF	/;"	d
HRCWL_CEPDF_SHIFT	include/mpc83xx.h	/^#define HRCWL_CEPDF_SHIFT	/;"	d
HRCWL_CEPMF	include/mpc83xx.h	/^#define HRCWL_CEPMF	/;"	d
HRCWL_CEPMF_SHIFT	include/mpc83xx.h	/^#define HRCWL_CEPMF_SHIFT	/;"	d
HRCWL_CEVCOD	include/mpc83xx.h	/^#define HRCWL_CEVCOD	/;"	d
HRCWL_CEVCOD_SHIFT	include/mpc83xx.h	/^#define HRCWL_CEVCOD_SHIFT	/;"	d
HRCWL_CE_PLL_DIV_1X1	include/mpc83xx.h	/^#define HRCWL_CE_PLL_DIV_1X1	/;"	d
HRCWL_CE_PLL_DIV_2X1	include/mpc83xx.h	/^#define HRCWL_CE_PLL_DIV_2X1	/;"	d
HRCWL_CE_PLL_VCO_DIV_2	include/mpc83xx.h	/^#define HRCWL_CE_PLL_VCO_DIV_2	/;"	d
HRCWL_CE_PLL_VCO_DIV_4	include/mpc83xx.h	/^#define HRCWL_CE_PLL_VCO_DIV_4	/;"	d
HRCWL_CE_PLL_VCO_DIV_8	include/mpc83xx.h	/^#define HRCWL_CE_PLL_VCO_DIV_8	/;"	d
HRCWL_CE_TO_PLL_1X10	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X10	/;"	d
HRCWL_CE_TO_PLL_1X11	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X11	/;"	d
HRCWL_CE_TO_PLL_1X12	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X12	/;"	d
HRCWL_CE_TO_PLL_1X13	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X13	/;"	d
HRCWL_CE_TO_PLL_1X14	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X14	/;"	d
HRCWL_CE_TO_PLL_1X15	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X15	/;"	d
HRCWL_CE_TO_PLL_1X16	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X16	/;"	d
HRCWL_CE_TO_PLL_1X16_	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X16_	/;"	d
HRCWL_CE_TO_PLL_1X17	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X17	/;"	d
HRCWL_CE_TO_PLL_1X18	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X18	/;"	d
HRCWL_CE_TO_PLL_1X19	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X19	/;"	d
HRCWL_CE_TO_PLL_1X2	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X2	/;"	d
HRCWL_CE_TO_PLL_1X20	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X20	/;"	d
HRCWL_CE_TO_PLL_1X21	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X21	/;"	d
HRCWL_CE_TO_PLL_1X22	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X22	/;"	d
HRCWL_CE_TO_PLL_1X23	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X23	/;"	d
HRCWL_CE_TO_PLL_1X24	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X24	/;"	d
HRCWL_CE_TO_PLL_1X25	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X25	/;"	d
HRCWL_CE_TO_PLL_1X26	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X26	/;"	d
HRCWL_CE_TO_PLL_1X27	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X27	/;"	d
HRCWL_CE_TO_PLL_1X28	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X28	/;"	d
HRCWL_CE_TO_PLL_1X29	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X29	/;"	d
HRCWL_CE_TO_PLL_1X3	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X3	/;"	d
HRCWL_CE_TO_PLL_1X30	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X30	/;"	d
HRCWL_CE_TO_PLL_1X31	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X31	/;"	d
HRCWL_CE_TO_PLL_1X4	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X4	/;"	d
HRCWL_CE_TO_PLL_1X5	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X5	/;"	d
HRCWL_CE_TO_PLL_1X6	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X6	/;"	d
HRCWL_CE_TO_PLL_1X7	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X7	/;"	d
HRCWL_CE_TO_PLL_1X8	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X8	/;"	d
HRCWL_CE_TO_PLL_1X9	include/mpc83xx.h	/^#define HRCWL_CE_TO_PLL_1X9	/;"	d
HRCWL_COREPLL	include/mpc83xx.h	/^#define HRCWL_COREPLL	/;"	d
HRCWL_COREPLL_SHIFT	include/mpc83xx.h	/^#define HRCWL_COREPLL_SHIFT	/;"	d
HRCWL_CORE_TO_CSB_1X1	include/mpc83xx.h	/^#define HRCWL_CORE_TO_CSB_1X1	/;"	d
HRCWL_CORE_TO_CSB_1_5X1	include/mpc83xx.h	/^#define HRCWL_CORE_TO_CSB_1_5X1	/;"	d
HRCWL_CORE_TO_CSB_2X1	include/mpc83xx.h	/^#define HRCWL_CORE_TO_CSB_2X1	/;"	d
HRCWL_CORE_TO_CSB_2_5X1	include/mpc83xx.h	/^#define HRCWL_CORE_TO_CSB_2_5X1	/;"	d
HRCWL_CORE_TO_CSB_3X1	include/mpc83xx.h	/^#define HRCWL_CORE_TO_CSB_3X1	/;"	d
HRCWL_CORE_TO_CSB_BYPASS	include/mpc83xx.h	/^#define HRCWL_CORE_TO_CSB_BYPASS	/;"	d
HRCWL_CSB_TO_CLKIN	include/configs/MPC8349EMDS.h	/^#define HRCWL_CSB_TO_CLKIN	/;"	d
HRCWL_CSB_TO_CLKIN	include/configs/sbc8349.h	/^#define HRCWL_CSB_TO_CLKIN	/;"	d
HRCWL_CSB_TO_CLKIN	include/configs/vme8349.h	/^#define HRCWL_CSB_TO_CLKIN	/;"	d
HRCWL_CSB_TO_CLKIN_10X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_10X1	/;"	d
HRCWL_CSB_TO_CLKIN_11X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_11X1	/;"	d
HRCWL_CSB_TO_CLKIN_12X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_12X1	/;"	d
HRCWL_CSB_TO_CLKIN_13X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_13X1	/;"	d
HRCWL_CSB_TO_CLKIN_14X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_14X1	/;"	d
HRCWL_CSB_TO_CLKIN_15X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_15X1	/;"	d
HRCWL_CSB_TO_CLKIN_16X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_16X1	/;"	d
HRCWL_CSB_TO_CLKIN_1X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_1X1	/;"	d
HRCWL_CSB_TO_CLKIN_2X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_2X1	/;"	d
HRCWL_CSB_TO_CLKIN_3X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_3X1	/;"	d
HRCWL_CSB_TO_CLKIN_4X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_4X1	/;"	d
HRCWL_CSB_TO_CLKIN_5X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_5X1	/;"	d
HRCWL_CSB_TO_CLKIN_6X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_6X1	/;"	d
HRCWL_CSB_TO_CLKIN_7X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_7X1	/;"	d
HRCWL_CSB_TO_CLKIN_8X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_8X1	/;"	d
HRCWL_CSB_TO_CLKIN_9X1	include/mpc83xx.h	/^#define HRCWL_CSB_TO_CLKIN_9X1	/;"	d
HRCWL_DDRCM	include/mpc83xx.h	/^#define HRCWL_DDRCM	/;"	d
HRCWL_DDRCM_SHIFT	include/mpc83xx.h	/^#define HRCWL_DDRCM_SHIFT	/;"	d
HRCWL_DDR_TO_SCB_CLK_1X1	include/mpc83xx.h	/^#define HRCWL_DDR_TO_SCB_CLK_1X1	/;"	d
HRCWL_DDR_TO_SCB_CLK_2X1	include/mpc83xx.h	/^#define HRCWL_DDR_TO_SCB_CLK_2X1	/;"	d
HRCWL_LBIUCM	include/mpc83xx.h	/^#define HRCWL_LBIUCM	/;"	d
HRCWL_LBIUCM_SHIFT	include/mpc83xx.h	/^#define HRCWL_LBIUCM_SHIFT	/;"	d
HRCWL_LCL_BUS_TO_SCB_CLK_1X1	include/mpc83xx.h	/^#define HRCWL_LCL_BUS_TO_SCB_CLK_1X1	/;"	d
HRCWL_LCL_BUS_TO_SCB_CLK_2X1	include/mpc83xx.h	/^#define HRCWL_LCL_BUS_TO_SCB_CLK_2X1	/;"	d
HRCWL_SPMF	include/mpc83xx.h	/^#define HRCWL_SPMF	/;"	d
HRCWL_SPMF_SHIFT	include/mpc83xx.h	/^#define HRCWL_SPMF_SHIFT	/;"	d
HRCWL_SVCOD	include/mpc83xx.h	/^#define HRCWL_SVCOD	/;"	d
HRCWL_SVCOD_DIV_1	include/mpc83xx.h	/^#define HRCWL_SVCOD_DIV_1	/;"	d
HRCWL_SVCOD_DIV_2	include/mpc83xx.h	/^#define HRCWL_SVCOD_DIV_2	/;"	d
HRCWL_SVCOD_DIV_4	include/mpc83xx.h	/^#define HRCWL_SVCOD_DIV_4	/;"	d
HRCWL_SVCOD_DIV_8	include/mpc83xx.h	/^#define HRCWL_SVCOD_DIV_8	/;"	d
HRCWL_SVCOD_SHIFT	include/mpc83xx.h	/^#define HRCWL_SVCOD_SHIFT	/;"	d
HRCWL_VCO_1X2	include/mpc83xx.h	/^#define HRCWL_VCO_1X2	/;"	d
HRCWL_VCO_1X4	include/mpc83xx.h	/^#define HRCWL_VCO_1X4	/;"	d
HRCWL_VCO_1X8	include/mpc83xx.h	/^#define HRCWL_VCO_1X8	/;"	d
HRCWL_VCO_BYPASS	include/mpc83xx.h	/^#define HRCWL_VCO_BYPASS	/;"	d
HRCW_APPC00	include/mpc8260.h	/^#define HRCW_APPC00	/;"	d
HRCW_APPC01	include/mpc8260.h	/^#define HRCW_APPC01	/;"	d
HRCW_APPC10	include/mpc8260.h	/^#define HRCW_APPC10	/;"	d
HRCW_APPC11	include/mpc8260.h	/^#define HRCW_APPC11	/;"	d
HRCW_BBD	include/mpc8260.h	/^#define HRCW_BBD	/;"	d
HRCW_BMS	include/mpc8260.h	/^#define HRCW_BMS	/;"	d
HRCW_BPS00	include/mpc8260.h	/^#define HRCW_BPS00	/;"	d
HRCW_BPS01	include/mpc8260.h	/^#define HRCW_BPS01	/;"	d
HRCW_BPS10	include/mpc8260.h	/^#define HRCW_BPS10	/;"	d
HRCW_BPS11	include/mpc8260.h	/^#define HRCW_BPS11	/;"	d
HRCW_CDIS	include/mpc8260.h	/^#define HRCW_CDIS	/;"	d
HRCW_CIP	include/mpc8260.h	/^#define HRCW_CIP	/;"	d
HRCW_CS10PC00	include/mpc8260.h	/^#define HRCW_CS10PC00	/;"	d
HRCW_CS10PC01	include/mpc8260.h	/^#define HRCW_CS10PC01	/;"	d
HRCW_CS10PC10	include/mpc8260.h	/^#define HRCW_CS10PC10	/;"	d
HRCW_CS10PC11	include/mpc8260.h	/^#define HRCW_CS10PC11	/;"	d
HRCW_DPPC00	include/mpc8260.h	/^#define HRCW_DPPC00	/;"	d
HRCW_DPPC01	include/mpc8260.h	/^#define HRCW_DPPC01	/;"	d
HRCW_DPPC10	include/mpc8260.h	/^#define HRCW_DPPC10	/;"	d
HRCW_DPPC11	include/mpc8260.h	/^#define HRCW_DPPC11	/;"	d
HRCW_EARB	include/mpc8260.h	/^#define HRCW_EARB	/;"	d
HRCW_EBM	include/mpc8260.h	/^#define HRCW_EBM	/;"	d
HRCW_EXMC	include/mpc8260.h	/^#define HRCW_EXMC	/;"	d
HRCW_ISB000	include/mpc8260.h	/^#define HRCW_ISB000	/;"	d
HRCW_ISB001	include/mpc8260.h	/^#define HRCW_ISB001	/;"	d
HRCW_ISB010	include/mpc8260.h	/^#define HRCW_ISB010	/;"	d
HRCW_ISB011	include/mpc8260.h	/^#define HRCW_ISB011	/;"	d
HRCW_ISB100	include/mpc8260.h	/^#define HRCW_ISB100	/;"	d
HRCW_ISB101	include/mpc8260.h	/^#define HRCW_ISB101	/;"	d
HRCW_ISB110	include/mpc8260.h	/^#define HRCW_ISB110	/;"	d
HRCW_ISB111	include/mpc8260.h	/^#define HRCW_ISB111	/;"	d
HRCW_ISPS	include/mpc8260.h	/^#define HRCW_ISPS	/;"	d
HRCW_L2CPC00	include/mpc8260.h	/^#define HRCW_L2CPC00	/;"	d
HRCW_L2CPC01	include/mpc8260.h	/^#define HRCW_L2CPC01	/;"	d
HRCW_L2CPC10	include/mpc8260.h	/^#define HRCW_L2CPC10	/;"	d
HRCW_L2CPC11	include/mpc8260.h	/^#define HRCW_L2CPC11	/;"	d
HRCW_LBPC00	include/mpc8260.h	/^#define HRCW_LBPC00	/;"	d
HRCW_LBPC01	include/mpc8260.h	/^#define HRCW_LBPC01	/;"	d
HRCW_LBPC10	include/mpc8260.h	/^#define HRCW_LBPC10	/;"	d
HRCW_LBPC11	include/mpc8260.h	/^#define HRCW_LBPC11	/;"	d
HRCW_MMR00	include/mpc8260.h	/^#define HRCW_MMR00	/;"	d
HRCW_MMR01	include/mpc8260.h	/^#define HRCW_MMR01	/;"	d
HRCW_MMR10	include/mpc8260.h	/^#define HRCW_MMR10	/;"	d
HRCW_MMR11	include/mpc8260.h	/^#define HRCW_MMR11	/;"	d
HRCW_MODCK_H0000	include/mpc8260.h	/^#define HRCW_MODCK_H0000 /;"	d
HRCW_MODCK_H0001	include/mpc8260.h	/^#define HRCW_MODCK_H0001 /;"	d
HRCW_MODCK_H0010	include/mpc8260.h	/^#define HRCW_MODCK_H0010 /;"	d
HRCW_MODCK_H0011	include/mpc8260.h	/^#define HRCW_MODCK_H0011 /;"	d
HRCW_MODCK_H0100	include/mpc8260.h	/^#define HRCW_MODCK_H0100 /;"	d
HRCW_MODCK_H0101	include/mpc8260.h	/^#define HRCW_MODCK_H0101 /;"	d
HRCW_MODCK_H0110	include/mpc8260.h	/^#define HRCW_MODCK_H0110 /;"	d
HRCW_MODCK_H0111	include/mpc8260.h	/^#define HRCW_MODCK_H0111 /;"	d
HRCW_MODCK_H1000	include/mpc8260.h	/^#define HRCW_MODCK_H1000 /;"	d
HRCW_MODCK_H1001	include/mpc8260.h	/^#define HRCW_MODCK_H1001 /;"	d
HRCW_MODCK_H1010	include/mpc8260.h	/^#define HRCW_MODCK_H1010 /;"	d
HRCW_MODCK_H1011	include/mpc8260.h	/^#define HRCW_MODCK_H1011 /;"	d
HRCW_MODCK_H1100	include/mpc8260.h	/^#define HRCW_MODCK_H1100 /;"	d
HRCW_MODCK_H1101	include/mpc8260.h	/^#define HRCW_MODCK_H1101 /;"	d
HRCW_MODCK_H1110	include/mpc8260.h	/^#define HRCW_MODCK_H1110 /;"	d
HRCW_MODCK_H1111	include/mpc8260.h	/^#define HRCW_MODCK_H1111 /;"	d
HRCW_reserved1	include/mpc8260.h	/^#define HRCW_reserved1	/;"	d
HREG_IDX	board/gdsys/p1022/controlcenterd-id.c	/^#define HREG_IDX(/;"	d	file:
HREG_NONE	board/gdsys/p1022/controlcenterd-id.c	/^	HREG_NONE	= 0,$/;"	e	enum:access_mode	file:
HREG_RD	board/gdsys/p1022/controlcenterd-id.c	/^	HREG_RD		= 1,$/;"	e	enum:access_mode	file:
HREG_RDWR	board/gdsys/p1022/controlcenterd-id.c	/^	HREG_RDWR	= 3,$/;"	e	enum:access_mode	file:
HREG_WR	board/gdsys/p1022/controlcenterd-id.c	/^	HREG_WR		= 2,$/;"	e	enum:access_mode	file:
HRE_AND	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_AND		= 0xC2,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_CHECK0	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_CHECK0	= 0x01,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_EXTEND	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_EXTEND	= 0xC4,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_E_INVALID_HREG	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_E_INVALID_HREG,$/;"	e	enum:__anonaa5ecaea0703	file:
HRE_E_OK	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_E_OK	= 0,$/;"	e	enum:__anonaa5ecaea0703	file:
HRE_E_TPM_FAILURE	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_E_TPM_FAILURE,$/;"	e	enum:__anonaa5ecaea0703	file:
HRE_LOAD	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_LOAD	= 0x81,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_LOADKEY	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_LOADKEY	= 0xC5,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_NOP	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_NOP		= 0x00,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_OR	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_OR		= 0xC3,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_SYNC	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_SYNC	= HRE_NOP,$/;"	e	enum:__anonaa5ecaea0603	file:
HRE_XOR	board/gdsys/p1022/controlcenterd-id.c	/^	HRE_XOR		= 0xC1,$/;"	e	enum:__anonaa5ecaea0603	file:
HRS_TO_SECS	drivers/rtc/bfin_rtc.c	/^#define HRS_TO_SECS(/;"	d	file:
HRTS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,$/;"	e	enum:__anona307879b0103	file:
HRTS0_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS0_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HRTS0_N_C_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS0_N_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS0_N_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS0_N_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRTS0x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS0x_GMARK,$/;"	e	enum:__anona307945e0103	file:
HRTS0x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS0x_IMARK,$/;"	e	enum:__anona307945e0103	file:
HRTS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,$/;"	e	enum:__anona307879b0103	file:
HRTS1_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS1_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRTS1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,$/;"	e	enum:__anona3077f190103	file:
HRTS1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRTS1x_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS1x_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HRTS1x_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS1x_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HRTS2x_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS2x_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HRTS2x_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS2x_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HRTS3x_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS3x_MARK,$/;"	e	enum:__anona307945e0103	file:
HRTS4x_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRTS4x_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX0_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_1_B_MARK, HRX0_F_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX0_GMARK,$/;"	e	enum:__anona307945e0103	file:
HRX0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX0_IMARK,$/;"	e	enum:__anona307945e0103	file:
HRX0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,$/;"	e	enum:__anona307879b0103	file:
HRX0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRX1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ4_MARK, HRX1_C_MARK, SDA4_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRX1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SDA4_B_MARK, _MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
HRX1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA4_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRX1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,$/;"	e	enum:__anona3077f190103	file:
HRX1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,$/;"	e	enum:__anona307879b0103	file:
HRX1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HRX2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX3_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX3_C_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX3_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX3_D_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HRX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HRX4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HR_NOHOSTRESP	arch/arm/include/asm/omap_mmc.h	/^#define HR_NOHOSTRESP	/;"	d
HSAXIM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define HSAXIM_BASE_ADDR /;"	d
HSC	include/sym53c8xx.h	/^	#define   HSC /;"	d
HSCIF0_HCTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_LINK_MARK, SSI_WS78_B_MARK, HSCIF0_HCTS_N_MARK, VI0_R6_MARK,$/;"	e	enum:__anona307901d0103	file:
HSCIF0_HRTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HRTS_N_MARK, VI0_R7_MARK, SCIF0_TXD_D_MARK, I2C0_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
HSCIF0_HRX_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_MDC_MARK, SSI_SDATA6_B_MARK, HSCIF0_HRX_MARK, VI0_R4_MARK,$/;"	e	enum:__anona307901d0103	file:
HSCIF0_HSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HSCK_MARK, SCIF_CLK_B_MARK, AVB_CRS_MARK, AUDIO_CLKC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
HSCIF0_HTX_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HTX_MARK, VI0_R5_MARK, I2C1_SDA_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona307901d0103	file:
HSCK0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK0_GMARK,$/;"	e	enum:__anona307945e0103	file:
HSCK0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK0_IMARK,$/;"	e	enum:__anona307945e0103	file:
HSCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,$/;"	e	enum:__anona3077f190103	file:
HSCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,$/;"	e	enum:__anona307879b0103	file:
HSCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HSCK1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HSCK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HSCK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HSCK1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HSCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
HSCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,$/;"	e	enum:__anona307879b0103	file:
HSCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HSCK2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HSCK2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HSCK3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK3_MARK,$/;"	e	enum:__anona307945e0103	file:
HSCK4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HSCK4_MARK,$/;"	e	enum:__anona307945e0103	file:
HSCR0_AME	include/SA-1100.h	/^#define HSCR0_AME	/;"	d
HSCR0_AbortURn	include/SA-1100.h	/^#define HSCR0_AbortURn	/;"	d
HSCR0_EFrmURn	include/SA-1100.h	/^#define HSCR0_EFrmURn	/;"	d
HSCR0_HSSP	include/SA-1100.h	/^#define HSCR0_HSSP	/;"	d
HSCR0_ITR	include/SA-1100.h	/^#define HSCR0_ITR	/;"	d
HSCR0_LBM	include/SA-1100.h	/^#define HSCR0_LBM	/;"	d
HSCR0_RIE	include/SA-1100.h	/^#define HSCR0_RIE	/;"	d
HSCR0_RXE	include/SA-1100.h	/^#define HSCR0_RXE	/;"	d
HSCR0_TIE	include/SA-1100.h	/^#define HSCR0_TIE	/;"	d
HSCR0_TUS	include/SA-1100.h	/^#define HSCR0_TUS	/;"	d
HSCR0_TXE	include/SA-1100.h	/^#define HSCR0_TXE	/;"	d
HSCR0_UART	include/SA-1100.h	/^#define HSCR0_UART	/;"	d
HSCR1_AMV	include/SA-1100.h	/^#define HSCR1_AMV	/;"	d
HSCR2_RXP	include/SA-1100.h	/^#define HSCR2_RXP	/;"	d
HSCR2_RcDataH	include/SA-1100.h	/^#define HSCR2_RcDataH	/;"	d
HSCR2_RcDataL	include/SA-1100.h	/^#define HSCR2_RcDataL	/;"	d
HSCR2_TXP	include/SA-1100.h	/^#define HSCR2_TXP	/;"	d
HSCR2_TrDataH	include/SA-1100.h	/^#define HSCR2_TrDataH	/;"	d
HSCR2_TrDataL	include/SA-1100.h	/^#define HSCR2_TrDataL	/;"	d
HSDEVP_FROM_AP	drivers/block/sata_dwc.c	/^#define HSDEVP_FROM_AP(/;"	d	file:
HSDRAMC1_BF	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_BF(/;"	d
HSDRAMC1_BFEXT	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_BFEXT(/;"	d
HSDRAMC1_BFINS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_BFINS(/;"	d
HSDRAMC1_BIT	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_BIT(/;"	d
HSDRAMC1_CAS_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_CAS_OFFSET	/;"	d
HSDRAMC1_CAS_ONE_CYCLE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_CAS_ONE_CYCLE	/;"	d
HSDRAMC1_CAS_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_CAS_SIZE	/;"	d
HSDRAMC1_CAS_TWO_CYCLES	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_CAS_TWO_CYCLES	/;"	d
HSDRAMC1_COUNT_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_COUNT_OFFSET	/;"	d
HSDRAMC1_COUNT_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_COUNT_SIZE	/;"	d
HSDRAMC1_CR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_CR	/;"	d
HSDRAMC1_DA_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DA_OFFSET	/;"	d
HSDRAMC1_DA_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DA_SIZE	/;"	d
HSDRAMC1_DBW_16_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DBW_16_BITS	/;"	d
HSDRAMC1_DBW_32_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DBW_32_BITS	/;"	d
HSDRAMC1_DBW_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DBW_OFFSET	/;"	d
HSDRAMC1_DBW_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DBW_SIZE	/;"	d
HSDRAMC1_DS_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DS_OFFSET	/;"	d
HSDRAMC1_DS_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_DS_SIZE	/;"	d
HSDRAMC1_HSR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_HSR	/;"	d
HSDRAMC1_IDR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_IDR	/;"	d
HSDRAMC1_IER	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_IER	/;"	d
HSDRAMC1_IMR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_IMR	/;"	d
HSDRAMC1_ISR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_ISR	/;"	d
HSDRAMC1_LPCB_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_LPCB_OFFSET	/;"	d
HSDRAMC1_LPCB_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_LPCB_SIZE	/;"	d
HSDRAMC1_LPR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_LPR	/;"	d
HSDRAMC1_MDR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MDR	/;"	d
HSDRAMC1_MD_LOW_POWER_SDRAM	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MD_LOW_POWER_SDRAM	/;"	d
HSDRAMC1_MD_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MD_OFFSET	/;"	d
HSDRAMC1_MD_SDRAM	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MD_SDRAM	/;"	d
HSDRAMC1_MD_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MD_SIZE	/;"	d
HSDRAMC1_MFN_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MFN_OFFSET	/;"	d
HSDRAMC1_MFN_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MFN_SIZE	/;"	d
HSDRAMC1_MODE_AUTO_REFRESH	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_AUTO_REFRESH	/;"	d
HSDRAMC1_MODE_BANKS_PRECHARGE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_BANKS_PRECHARGE	/;"	d
HSDRAMC1_MODE_EXT_LOAD_MODE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_EXT_LOAD_MODE	/;"	d
HSDRAMC1_MODE_LOAD_MODE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_LOAD_MODE	/;"	d
HSDRAMC1_MODE_NOP	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_NOP	/;"	d
HSDRAMC1_MODE_NORMAL	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_NORMAL	/;"	d
HSDRAMC1_MODE_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_OFFSET	/;"	d
HSDRAMC1_MODE_POWER_DOWN	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_POWER_DOWN	/;"	d
HSDRAMC1_MODE_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MODE_SIZE	/;"	d
HSDRAMC1_MR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_MR	/;"	d
HSDRAMC1_NB_FOUR_BANKS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NB_FOUR_BANKS	/;"	d
HSDRAMC1_NB_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NB_OFFSET	/;"	d
HSDRAMC1_NB_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NB_SIZE	/;"	d
HSDRAMC1_NB_TWO_BANKS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NB_TWO_BANKS	/;"	d
HSDRAMC1_NC_10_COLUMN_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NC_10_COLUMN_BITS	/;"	d
HSDRAMC1_NC_11_COLUMN_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NC_11_COLUMN_BITS	/;"	d
HSDRAMC1_NC_8_COLUMN_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NC_8_COLUMN_BITS	/;"	d
HSDRAMC1_NC_9_COLUMN_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NC_9_COLUMN_BITS	/;"	d
HSDRAMC1_NC_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NC_OFFSET	/;"	d
HSDRAMC1_NC_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NC_SIZE	/;"	d
HSDRAMC1_NR_11_ROW_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NR_11_ROW_BITS	/;"	d
HSDRAMC1_NR_12_ROW_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NR_12_ROW_BITS	/;"	d
HSDRAMC1_NR_13_ROW_BITS	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NR_13_ROW_BITS	/;"	d
HSDRAMC1_NR_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NR_OFFSET	/;"	d
HSDRAMC1_NR_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_NR_SIZE	/;"	d
HSDRAMC1_PASR_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_PASR_OFFSET	/;"	d
HSDRAMC1_PASR_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_PASR_SIZE	/;"	d
HSDRAMC1_RES_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_RES_OFFSET	/;"	d
HSDRAMC1_RES_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_RES_SIZE	/;"	d
HSDRAMC1_TCSR_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TCSR_OFFSET	/;"	d
HSDRAMC1_TCSR_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TCSR_SIZE	/;"	d
HSDRAMC1_TIMEOUT_128_CYC_AFTER_END	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TIMEOUT_128_CYC_AFTER_END	/;"	d
HSDRAMC1_TIMEOUT_64_CYC_AFTER_END	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TIMEOUT_64_CYC_AFTER_END	/;"	d
HSDRAMC1_TIMEOUT_AFTER_END	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TIMEOUT_AFTER_END	/;"	d
HSDRAMC1_TIMEOUT_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TIMEOUT_OFFSET	/;"	d
HSDRAMC1_TIMEOUT_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TIMEOUT_SIZE	/;"	d
HSDRAMC1_TR	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TR	/;"	d
HSDRAMC1_TRAS_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRAS_OFFSET	/;"	d
HSDRAMC1_TRAS_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRAS_SIZE	/;"	d
HSDRAMC1_TRCD_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRCD_OFFSET	/;"	d
HSDRAMC1_TRCD_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRCD_SIZE	/;"	d
HSDRAMC1_TRC_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRC_OFFSET	/;"	d
HSDRAMC1_TRC_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRC_SIZE	/;"	d
HSDRAMC1_TRP_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRP_OFFSET	/;"	d
HSDRAMC1_TRP_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TRP_SIZE	/;"	d
HSDRAMC1_TWR_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TWR_OFFSET	/;"	d
HSDRAMC1_TWR_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TWR_SIZE	/;"	d
HSDRAMC1_TXSR_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TXSR_OFFSET	/;"	d
HSDRAMC1_TXSR_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_TXSR_SIZE	/;"	d
HSDRAMC1_VERSION	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_VERSION	/;"	d
HSDRAMC1_VERSION_OFFSET	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_VERSION_OFFSET	/;"	d
HSDRAMC1_VERSION_SIZE	arch/avr32/cpu/hsdramc1.h	/^#define HSDRAMC1_VERSION_SIZE	/;"	d
HSDR_DATA	include/SA-1100.h	/^#define HSDR_DATA	/;"	d
HSE	drivers/usb/host/r8a66597.h	/^#define	HSE	/;"	d
HSFC_FCYCLE_MASK	drivers/spi/ich.h	/^	HSFC_FCYCLE_MASK =	0x0006,$/;"	e	enum:__anon07fadeb80403
HSFC_FCYCLE_SHIFT	drivers/spi/ich.h	/^	HSFC_FCYCLE_SHIFT =	1,$/;"	e	enum:__anon07fadeb80403
HSFC_FDBC_MASK	drivers/spi/ich.h	/^	HSFC_FDBC_MASK =	0x3f00,$/;"	e	enum:__anon07fadeb80403
HSFC_FDBC_SHIFT	drivers/spi/ich.h	/^	HSFC_FDBC_SHIFT =	8,$/;"	e	enum:__anon07fadeb80403
HSFC_FGO	drivers/spi/ich.h	/^	HSFC_FGO =		0x0001,$/;"	e	enum:__anon07fadeb80403
HSFC_FSMIE	drivers/spi/ich.h	/^	HSFC_FSMIE =		0x8000$/;"	e	enum:__anon07fadeb80403
HSFS_AEL	drivers/spi/ich.h	/^	HSFS_AEL =		0x0004,$/;"	e	enum:__anon07fadeb80303
HSFS_BERASE_MASK	drivers/spi/ich.h	/^	HSFS_BERASE_MASK =	0x0018,$/;"	e	enum:__anon07fadeb80303
HSFS_BERASE_SHIFT	drivers/spi/ich.h	/^	HSFS_BERASE_SHIFT =	3,$/;"	e	enum:__anon07fadeb80303
HSFS_FCERR	drivers/spi/ich.h	/^	HSFS_FCERR =		0x0002,$/;"	e	enum:__anon07fadeb80303
HSFS_FDONE	drivers/spi/ich.h	/^	HSFS_FDONE =		0x0001,$/;"	e	enum:__anon07fadeb80303
HSFS_FDOPSS	drivers/spi/ich.h	/^	HSFS_FDOPSS =		0x2000,$/;"	e	enum:__anon07fadeb80303
HSFS_FDV	drivers/spi/ich.h	/^	HSFS_FDV =		0x4000,$/;"	e	enum:__anon07fadeb80303
HSFS_FLOCKDN	drivers/spi/ich.h	/^	HSFS_FLOCKDN =		0x8000$/;"	e	enum:__anon07fadeb80303
HSFS_SCIP	drivers/spi/ich.h	/^	HSFS_SCIP =		0x0020,$/;"	e	enum:__anon07fadeb80303
HSI1_ACDATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_ACDATA	/;"	d
HSI1_ACFLAG	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_ACFLAG	/;"	d
HSI1_ACREADY	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_ACREADY	/;"	d
HSI1_ACWAKE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_ACWAKE	/;"	d
HSI1_CADATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_CADATA	/;"	d
HSI1_CAFLAG	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_CAFLAG	/;"	d
HSI1_CAREADY	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_CAREADY	/;"	d
HSI1_CAWAKE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI1_CAWAKE	/;"	d
HSI2C_10BIT_ADDR_MODE	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_10BIT_ADDR_MODE	/;"	d	file:
HSI2C_AUTO_MODE	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_AUTO_MODE	/;"	d	file:
HSI2C_DMA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define HSI2C_DMA_BASE_ADDR	/;"	d
HSI2C_FUNC_MODE_I2C	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_FUNC_MODE_I2C	/;"	d	file:
HSI2C_HS_MODE	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_HS_MODE	/;"	d	file:
HSI2C_INT_ERROR_MASK	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_INT_ERROR_MASK	/;"	d	file:
HSI2C_INT_I2C_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_INT_I2C_EN	/;"	d	file:
HSI2C_INT_TRAILING_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_INT_TRAILING_EN	/;"	d	file:
HSI2C_MASTER	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_MASTER	/;"	d	file:
HSI2C_MASTER_BUSY	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_MASTER_BUSY	/;"	d	file:
HSI2C_MASTER_RUN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_MASTER_RUN	/;"	d	file:
HSI2C_NO_DEV	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_NO_DEV	/;"	d	file:
HSI2C_NO_DEV_ACK	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_NO_DEV_ACK	/;"	d	file:
HSI2C_READ_WRITE	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_READ_WRITE	/;"	d	file:
HSI2C_RXCHON	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RXCHON	/;"	d	file:
HSI2C_RXFIFO_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RXFIFO_EN	/;"	d	file:
HSI2C_RXFIFO_TRIGGER_LEVEL	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RXFIFO_TRIGGER_LEVEL	/;"	d	file:
HSI2C_RX_FIFO_EMPTY	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RX_FIFO_EMPTY	/;"	d	file:
HSI2C_RX_FIFO_FULL	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RX_FIFO_FULL	/;"	d	file:
HSI2C_RX_FIFO_LEVEL	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RX_FIFO_LEVEL(/;"	d	file:
HSI2C_RX_OVERRUN_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RX_OVERRUN_EN	/;"	d	file:
HSI2C_RX_UNDERRUN_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_RX_UNDERRUN_EN	/;"	d	file:
HSI2C_SLAVE_BUSY	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_SLAVE_BUSY	/;"	d	file:
HSI2C_SLV_ADDR_MAS	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_SLV_ADDR_MAS(/;"	d	file:
HSI2C_STOP_AFTER_TRANS	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_STOP_AFTER_TRANS	/;"	d	file:
HSI2C_SW_RST	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_SW_RST	/;"	d	file:
HSI2C_TIMEOUT_AUTO	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TIMEOUT_AUTO	/;"	d	file:
HSI2C_TIMEOUT_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TIMEOUT_EN	/;"	d	file:
HSI2C_TIMEOUT_US	drivers/i2c/s3c24x0_i2c.c	/^#define	HSI2C_TIMEOUT_US /;"	d	file:
HSI2C_TRAILING_COUNT	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TRAILING_COUNT	/;"	d	file:
HSI2C_TRANS_ABORT	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TRANS_ABORT	/;"	d	file:
HSI2C_TRANS_ERROR_MASK	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TRANS_ERROR_MASK	/;"	d	file:
HSI2C_TRANS_FINISHED_MASK	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TRANS_FINISHED_MASK /;"	d	file:
HSI2C_TRANS_SUCCESS	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TRANS_SUCCESS	/;"	d	file:
HSI2C_TXCHON	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TXCHON	/;"	d	file:
HSI2C_TXFIFO_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TXFIFO_EN	/;"	d	file:
HSI2C_TXFIFO_TRIGGER_LEVEL	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TXFIFO_TRIGGER_LEVEL	/;"	d	file:
HSI2C_TX_FIFO_EMPTY	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TX_FIFO_EMPTY	/;"	d	file:
HSI2C_TX_FIFO_FULL	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TX_FIFO_FULL	/;"	d	file:
HSI2C_TX_FIFO_LEVEL	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TX_FIFO_LEVEL(/;"	d	file:
HSI2C_TX_OVERRUN_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TX_OVERRUN_EN	/;"	d	file:
HSI2C_TX_UNDERRUN_EN	drivers/i2c/s3c24x0_i2c.c	/^#define HSI2C_TX_UNDERRUN_EN	/;"	d	file:
HSI2_ACDATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_ACDATA	/;"	d
HSI2_ACFLAG	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_ACFLAG	/;"	d
HSI2_ACREADY	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_ACREADY	/;"	d
HSI2_ACWAKE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_ACWAKE	/;"	d
HSI2_CADATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_CADATA	/;"	d
HSI2_CAFLAG	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_CAFLAG	/;"	d
HSI2_CAREADY	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_CAREADY	/;"	d
HSI2_CAWAKE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define HSI2_CAWAKE	/;"	d
HSICPHY_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	HSICPHY_DIV_MASK	= 0x3f,$/;"	e	enum:__anon3783c4e20103
HSICPHY_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	HSICPHY_DIV_SHIFT	= 8,$/;"	e	enum:__anon3783c4e20103
HSIC_CTRL_FORCESLEEP	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_FORCESLEEP /;"	d
HSIC_CTRL_FORCESUSPEND	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_FORCESUSPEND /;"	d
HSIC_CTRL_PHYSWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_PHYSWRST /;"	d
HSIC_CTRL_REFCLKDIV_12	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_REFCLKDIV_12 /;"	d
HSIC_CTRL_REFCLKDIV_MASK	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_REFCLKDIV_MASK /;"	d
HSIC_CTRL_REFCLKDIV_SHIFT	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_REFCLKDIV_SHIFT /;"	d
HSIC_CTRL_REFCLKSEL	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_REFCLKSEL /;"	d
HSIC_CTRL_REFCLKSEL_MASK	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_REFCLKSEL_MASK /;"	d
HSIC_CTRL_REFCLKSEL_SHIFT	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_REFCLKSEL_SHIFT /;"	d
HSIC_CTRL_SIDDQ	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_SIDDQ /;"	d
HSIC_CTRL_UTMISWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define HSIC_CTRL_UTMISWRST /;"	d
HSI_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define HSI_ARB_BASE_ADDR /;"	d
HSI_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define HSI_ARB_END_ADDR /;"	d
HSI_RX_DATA_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_DATA_MARK, BBIF1_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
HSI_RX_FLAG_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_FLAG_MARK, BBIF1_SS1_MARK, BBIF1_FLOW_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
HSI_RX_READY_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_READY_MARK, BBIF1_RSCK_MARK, PORT115_I2C_SCL2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
HSI_RX_WAKE_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_WAKE_MARK, BBIF1_RSYNC_MARK, PORT116_I2C_SDA2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
HSI_TX_DATA_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_DATA_MARK, BBIF1_TSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
HSI_TX_FLAG_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_FLAG_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
HSI_TX_READY_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_READY_MARK, BBIF1_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
HSI_TX_WAKE_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_TX_WAKE_MARK, BBIF1_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
HSMC3_BAT_BYTE_SELECT	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BAT_BYTE_SELECT	/;"	d
HSMC3_BAT_BYTE_WRITE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BAT_BYTE_WRITE	/;"	d
HSMC3_BAT_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BAT_OFFSET	/;"	d
HSMC3_BAT_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BAT_SIZE	/;"	d
HSMC3_BF	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BF(/;"	d
HSMC3_BFEXT	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BFEXT(/;"	d
HSMC3_BFINS	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BFINS(/;"	d
HSMC3_BIT	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_BIT(/;"	d
HSMC3_CYCLE0	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_CYCLE0	/;"	d
HSMC3_CYCLE1	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_CYCLE1	/;"	d
HSMC3_CYCLE2	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_CYCLE2	/;"	d
HSMC3_CYCLE3	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_CYCLE3	/;"	d
HSMC3_CYCLE4	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_CYCLE4	/;"	d
HSMC3_CYCLE5	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_CYCLE5	/;"	d
HSMC3_DBW_16_BITS	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_DBW_16_BITS	/;"	d
HSMC3_DBW_32_BITS	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_DBW_32_BITS	/;"	d
HSMC3_DBW_8_BITS	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_DBW_8_BITS	/;"	d
HSMC3_DBW_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_DBW_OFFSET	/;"	d
HSMC3_DBW_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_DBW_SIZE	/;"	d
HSMC3_EXNW_MODE_DISABLED	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_EXNW_MODE_DISABLED	/;"	d
HSMC3_EXNW_MODE_FROZEN	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_EXNW_MODE_FROZEN	/;"	d
HSMC3_EXNW_MODE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_EXNW_MODE_OFFSET	/;"	d
HSMC3_EXNW_MODE_READY	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_EXNW_MODE_READY	/;"	d
HSMC3_EXNW_MODE_RESERVED	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_EXNW_MODE_RESERVED	/;"	d
HSMC3_EXNW_MODE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_EXNW_MODE_SIZE	/;"	d
HSMC3_MODE0	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_MODE0	/;"	d
HSMC3_MODE1	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_MODE1	/;"	d
HSMC3_MODE2	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_MODE2	/;"	d
HSMC3_MODE3	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_MODE3	/;"	d
HSMC3_MODE4	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_MODE4	/;"	d
HSMC3_MODE5	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_MODE5	/;"	d
HSMC3_NCS_RD_PULSE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_RD_PULSE_OFFSET	/;"	d
HSMC3_NCS_RD_PULSE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_RD_PULSE_SIZE	/;"	d
HSMC3_NCS_RD_SETUP_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_RD_SETUP_OFFSET	/;"	d
HSMC3_NCS_RD_SETUP_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_RD_SETUP_SIZE	/;"	d
HSMC3_NCS_WR_PULSE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_WR_PULSE_OFFSET	/;"	d
HSMC3_NCS_WR_PULSE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_WR_PULSE_SIZE	/;"	d
HSMC3_NCS_WR_SETUP_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_WR_SETUP_OFFSET	/;"	d
HSMC3_NCS_WR_SETUP_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NCS_WR_SETUP_SIZE	/;"	d
HSMC3_NRD_CYCLE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NRD_CYCLE_OFFSET	/;"	d
HSMC3_NRD_CYCLE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NRD_CYCLE_SIZE	/;"	d
HSMC3_NRD_PULSE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NRD_PULSE_OFFSET	/;"	d
HSMC3_NRD_PULSE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NRD_PULSE_SIZE	/;"	d
HSMC3_NRD_SETUP_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NRD_SETUP_OFFSET	/;"	d
HSMC3_NRD_SETUP_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NRD_SETUP_SIZE	/;"	d
HSMC3_NWE_CYCLE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NWE_CYCLE_OFFSET	/;"	d
HSMC3_NWE_CYCLE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NWE_CYCLE_SIZE	/;"	d
HSMC3_NWE_PULSE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NWE_PULSE_OFFSET	/;"	d
HSMC3_NWE_PULSE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NWE_PULSE_SIZE	/;"	d
HSMC3_NWE_SETUP_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NWE_SETUP_OFFSET	/;"	d
HSMC3_NWE_SETUP_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_NWE_SETUP_SIZE	/;"	d
HSMC3_PD_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PD_OFFSET	/;"	d
HSMC3_PD_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PD_SIZE	/;"	d
HSMC3_PMEN_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PMEN_OFFSET	/;"	d
HSMC3_PMEN_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PMEN_SIZE	/;"	d
HSMC3_PS_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PS_OFFSET	/;"	d
HSMC3_PS_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PS_SIZE	/;"	d
HSMC3_PULSE0	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PULSE0	/;"	d
HSMC3_PULSE1	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PULSE1	/;"	d
HSMC3_PULSE2	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PULSE2	/;"	d
HSMC3_PULSE3	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PULSE3	/;"	d
HSMC3_PULSE4	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PULSE4	/;"	d
HSMC3_PULSE5	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_PULSE5	/;"	d
HSMC3_READ_MODE_NCS_CONTROLLED	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_READ_MODE_NCS_CONTROLLED	/;"	d
HSMC3_READ_MODE_NRD_CONTROLLED	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_READ_MODE_NRD_CONTROLLED	/;"	d
HSMC3_READ_MODE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_READ_MODE_OFFSET	/;"	d
HSMC3_READ_MODE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_READ_MODE_SIZE	/;"	d
HSMC3_SETUP0	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_SETUP0	/;"	d
HSMC3_SETUP1	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_SETUP1	/;"	d
HSMC3_SETUP2	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_SETUP2	/;"	d
HSMC3_SETUP3	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_SETUP3	/;"	d
HSMC3_SETUP4	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_SETUP4	/;"	d
HSMC3_SETUP5	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_SETUP5	/;"	d
HSMC3_TDF_CYCLES_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_TDF_CYCLES_OFFSET	/;"	d
HSMC3_TDF_CYCLES_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_TDF_CYCLES_SIZE	/;"	d
HSMC3_TDF_MODE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_TDF_MODE_OFFSET	/;"	d
HSMC3_TDF_MODE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_TDF_MODE_SIZE	/;"	d
HSMC3_WRITE_MODE_NCS_CONTROLLED	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_WRITE_MODE_NCS_CONTROLLED	/;"	d
HSMC3_WRITE_MODE_NWE_CONTROLLED	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_WRITE_MODE_NWE_CONTROLLED	/;"	d
HSMC3_WRITE_MODE_OFFSET	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_WRITE_MODE_OFFSET	/;"	d
HSMC3_WRITE_MODE_SIZE	arch/avr32/cpu/hsmc3.h	/^#define HSMC3_WRITE_MODE_SIZE	/;"	d
HSMMC_CLKCTRL_CLKSEL_DIV_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define HSMMC_CLKCTRL_CLKSEL_DIV_MASK	/;"	d
HSMMC_CLKCTRL_CLKSEL_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define HSMMC_CLKCTRL_CLKSEL_MASK	/;"	d
HSMMC_CLKCTRL_CLKSEL_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define HSMMC_CLKCTRL_CLKSEL_MASK	/;"	d
HSMODE	drivers/usb/host/r8a66597.h	/^#define	  HSMODE	/;"	d
HSM_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define HSM_SHIFT	/;"	d	file:
HSM_ST	drivers/block/sata_dwc.h	/^	HSM_ST,$/;"	e	enum:hsm_task_states
HSM_ST_ERR	drivers/block/sata_dwc.h	/^	HSM_ST_ERR,$/;"	e	enum:hsm_task_states
HSM_ST_FIRST	drivers/block/sata_dwc.h	/^	HSM_ST_FIRST,$/;"	e	enum:hsm_task_states
HSM_ST_IDLE	drivers/block/sata_dwc.h	/^	HSM_ST_IDLE,$/;"	e	enum:hsm_task_states
HSM_ST_LAST	drivers/block/sata_dwc.h	/^	HSM_ST_LAST,$/;"	e	enum:hsm_task_states
HSOTG_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define HSOTG_BASE_ADDR	/;"	d
HSOTG_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define HSOTG_BASE_ADDR	/;"	d
HSOTG_CTRL_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define HSOTG_CTRL_BASE_ADDR	/;"	d
HSOTG_CTRL_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define HSOTG_CTRL_BASE_ADDR	/;"	d
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define    HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK	/;"	d
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define    HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK	/;"	d
HSOTG_CTRL_PHY_P1CTL_OFFSET	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define HSOTG_CTRL_PHY_P1CTL_OFFSET	/;"	d
HSOTG_CTRL_PHY_P1CTL_OFFSET	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define HSOTG_CTRL_PHY_P1CTL_OFFSET	/;"	d
HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define    HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK	/;"	d
HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define    HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK	/;"	d
HSOTG_DCTL_OFFSET	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define HSOTG_DCTL_OFFSET	/;"	d
HSOTG_DCTL_OFFSET	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define HSOTG_DCTL_OFFSET	/;"	d
HSOTG_DCTL_SFTDISCON_MASK	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define    HSOTG_DCTL_SFTDISCON_MASK	/;"	d
HSOTG_DCTL_SFTDISCON_MASK	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define    HSOTG_DCTL_SFTDISCON_MASK	/;"	d
HSPI_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define HSPI_ENABLE	/;"	d
HSPROC	drivers/usb/host/r8a66597.h	/^#define	  HSPROC	/;"	d
HSP_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	HSP_CLK,$/;"	e	enum:mxc_main_clock
HSP_DB_MASTER_BPMP	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_BPMP	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_BPMP /;"	d
HSP_DB_MASTER_CCPLEX	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_DB_MASTER_CCPLEX	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_DB_MASTER_CCPLEX /;"	d
HSP_MBOX_TYPE_AS	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_AS	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_AS /;"	d
HSP_MBOX_TYPE_DB	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_DB	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_DB /;"	d
HSP_MBOX_TYPE_SM	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SM	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SM /;"	d
HSP_MBOX_TYPE_SS	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSP_MBOX_TYPE_SS	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define HSP_MBOX_TYPE_SS /;"	d
HSSR0_EIF	include/SA-1100.h	/^#define HSSR0_EIF	/;"	d
HSSR0_FRE	include/SA-1100.h	/^#define HSSR0_FRE	/;"	d
HSSR0_RAB	include/SA-1100.h	/^#define HSSR0_RAB	/;"	d
HSSR0_RFS	include/SA-1100.h	/^#define HSSR0_RFS	/;"	d
HSSR0_TFS	include/SA-1100.h	/^#define HSSR0_TFS	/;"	d
HSSR0_TUR	include/SA-1100.h	/^#define HSSR0_TUR	/;"	d
HSSR1_CRE	include/SA-1100.h	/^#define HSSR1_CRE	/;"	d
HSSR1_EOF	include/SA-1100.h	/^#define HSSR1_EOF	/;"	d
HSSR1_RNE	include/SA-1100.h	/^#define HSSR1_RNE	/;"	d
HSSR1_ROR	include/SA-1100.h	/^#define HSSR1_ROR	/;"	d
HSSR1_RSY	include/SA-1100.h	/^#define HSSR1_RSY	/;"	d
HSSR1_TBY	include/SA-1100.h	/^#define HSSR1_TBY	/;"	d
HSSR1_TNF	include/SA-1100.h	/^#define HSSR1_TNF	/;"	d
HSTATUS_BIST_ERR	drivers/block/fsl_sata.h	/^#define HSTATUS_BIST_ERR	/;"	d
HSTATUS_CMD_COMPLETE	drivers/block/fsl_sata.h	/^#define HSTATUS_CMD_COMPLETE	/;"	d
HSTATUS_CRC_ERR_RX	drivers/block/fsl_sata.h	/^#define HSTATUS_CRC_ERR_RX	/;"	d
HSTATUS_CRC_ERR_TX	drivers/block/fsl_sata.h	/^#define HSTATUS_CRC_ERR_TX	/;"	d
HSTATUS_DATA_OVERRUN	drivers/block/fsl_sata.h	/^#define HSTATUS_DATA_OVERRUN	/;"	d
HSTATUS_DATA_UNDERRUN	drivers/block/fsl_sata.h	/^#define HSTATUS_DATA_UNDERRUN	/;"	d
HSTATUS_DEVICE_ERR	drivers/block/fsl_sata.h	/^#define HSTATUS_DEVICE_ERR	/;"	d
HSTATUS_FATAL_ERR	drivers/block/fsl_sata.h	/^#define HSTATUS_FATAL_ERR	/;"	d
HSTATUS_FATAL_ERR_ALL	drivers/block/fsl_sata.h	/^#define HSTATUS_FATAL_ERR_ALL	/;"	d
HSTATUS_FIFO_OVERFLOW_RX	drivers/block/fsl_sata.h	/^#define HSTATUS_FIFO_OVERFLOW_RX	/;"	d
HSTATUS_FIFO_OVERFLOW_TX	drivers/block/fsl_sata.h	/^#define HSTATUS_FIFO_OVERFLOW_TX	/;"	d
HSTATUS_FORCE_OFFLINE	drivers/block/fsl_sata.h	/^#define HSTATUS_FORCE_OFFLINE	/;"	d
HSTATUS_MASTER_ERR	drivers/block/fsl_sata.h	/^#define HSTATUS_MASTER_ERR	/;"	d
HSTATUS_ONOFF	drivers/block/fsl_sata.h	/^#define HSTATUS_ONOFF	/;"	d
HSTATUS_PHY_RDY	drivers/block/fsl_sata.h	/^#define HSTATUS_PHY_RDY	/;"	d
HSTATUS_SIGNATURE	drivers/block/fsl_sata.h	/^#define HSTATUS_SIGNATURE	/;"	d
HSTATUS_SNOTIFY	drivers/block/fsl_sata.h	/^#define HSTATUS_SNOTIFY	/;"	d
HSTIM_HS_HIGH_PHASE_SHIFT	drivers/i2c/kona_i2c.c	/^#define HSTIM_HS_HIGH_PHASE_SHIFT	/;"	d	file:
HSTIM_HS_HOLD_SHIFT	drivers/i2c/kona_i2c.c	/^#define HSTIM_HS_HOLD_SHIFT	/;"	d	file:
HSTIM_HS_MODE_MASK	drivers/i2c/kona_i2c.c	/^#define HSTIM_HS_MODE_MASK	/;"	d	file:
HSTIM_HS_SETUP_SHIFT	drivers/i2c/kona_i2c.c	/^#define HSTIM_HS_SETUP_SHIFT	/;"	d	file:
HSTIM_OFFSET	drivers/i2c/kona_i2c.c	/^#define HSTIM_OFFSET	/;"	d	file:
HSTL_1_5V	drivers/ddr/marvell/axp/ddr3_spd.c	/^	HSTL_1_5V,$/;"	e	enum:dimm_volt_if	file:
HST_EN	drivers/i2c/intel_i2c.c	/^#define  HST_EN	/;"	d	file:
HSUART_CTRL_HCTS_EN	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HCTS_EN	/;"	d
HSUART_CTRL_HCTS_INV	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HCTS_INV	/;"	d
HSUART_CTRL_HRTS_EN	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HRTS_EN	/;"	d
HSUART_CTRL_HRTS_INV	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HRTS_INV	/;"	d
HSUART_CTRL_HRTS_TRIG_16	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HRTS_TRIG_16	/;"	d
HSUART_CTRL_HRTS_TRIG_32	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HRTS_TRIG_32	/;"	d
HSUART_CTRL_HRTS_TRIG_48	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HRTS_TRIG_48	/;"	d
HSUART_CTRL_HRTS_TRIG_8	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HRTS_TRIG_8	/;"	d
HSUART_CTRL_HSU_BREAK	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_BREAK	/;"	d
HSUART_CTRL_HSU_ERR_INT_EN	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_ERR_INT_EN	/;"	d
HSUART_CTRL_HSU_OFFSET	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_OFFSET(/;"	d
HSUART_CTRL_HSU_RX_INT_EN	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_INT_EN	/;"	d
HSUART_CTRL_HSU_RX_TRIG_1	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_TRIG_1	/;"	d
HSUART_CTRL_HSU_RX_TRIG_16	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_TRIG_16	/;"	d
HSUART_CTRL_HSU_RX_TRIG_32	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_TRIG_32	/;"	d
HSUART_CTRL_HSU_RX_TRIG_4	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_TRIG_4	/;"	d
HSUART_CTRL_HSU_RX_TRIG_48	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_TRIG_48	/;"	d
HSUART_CTRL_HSU_RX_TRIG_8	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_RX_TRIG_8	/;"	d
HSUART_CTRL_HSU_TX_INT_EN	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_TX_INT_EN	/;"	d
HSUART_CTRL_HSU_TX_TRIG_0	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_TX_TRIG_0	/;"	d
HSUART_CTRL_HSU_TX_TRIG_16	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_TX_TRIG_16	/;"	d
HSUART_CTRL_HSU_TX_TRIG_4	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_TX_TRIG_4	/;"	d
HSUART_CTRL_HSU_TX_TRIG_8	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_HSU_TX_TRIG_8	/;"	d
HSUART_CTRL_TMO_16	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_TMO_16	/;"	d
HSUART_CTRL_TMO_4	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_TMO_4	/;"	d
HSUART_CTRL_TMO_8	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_TMO_8	/;"	d
HSUART_CTRL_TMO_DISABLED	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_CTRL_TMO_DISABLED	/;"	d
HSUART_IIR_BRK	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_BRK	/;"	d
HSUART_IIR_FE	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_FE	/;"	d
HSUART_IIR_RX_OE	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_RX_OE	/;"	d
HSUART_IIR_RX_TIMEOUT	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_RX_TIMEOUT	/;"	d
HSUART_IIR_RX_TRIG	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_RX_TRIG	/;"	d
HSUART_IIR_TX	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_TX	/;"	d
HSUART_IIR_TX_INT_SET	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_IIR_TX_INT_SET	/;"	d
HSUART_LEVEL_RX	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_LEVEL_RX	/;"	d
HSUART_LEVEL_TX	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_LEVEL_TX	/;"	d
HSUART_RX_BREAK	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_RX_BREAK	/;"	d
HSUART_RX_DATA	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_RX_DATA	/;"	d
HSUART_RX_EMPTY	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_RX_EMPTY	/;"	d
HSUART_RX_ERROR	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define HSUART_RX_ERROR	/;"	d
HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK	arch/arm/include/asm/arch-omap4/ehci.h	/^#define HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK	/;"	d
HSVS_CONTROL	drivers/video/am335x-fb.h	/^#define HSVS_CONTROL	/;"	d
HSVS_RISEFALL	drivers/video/am335x-fb.h	/^#define HSVS_RISEFALL	/;"	d
HSYNC_DELAY_MASK	include/radeon.h	/^#define HSYNC_DELAY_MASK	/;"	d
HSYNC_DELAY_SHIFT	include/radeon.h	/^#define HSYNC_DELAY_SHIFT	/;"	d
HSYNC_INVERT	drivers/video/am335x-fb.h	/^#define HSYNC_INVERT	/;"	d
HSYNC_POLARITY_CFG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HSYNC_POLARITY_CFG	/;"	d
HSYNC_POLARITY_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define HSYNC_POLARITY_CFG	/;"	d
HSYNC_POLARITY_CFG_OFFSET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HSYNC_POLARITY_CFG_OFFSET	/;"	d
HS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define HS_BASE_ADDR /;"	d
HS_BPS	drivers/usb/gadget/ether.c	/^#define	HS_BPS	/;"	d	file:
HS_DEVICE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define HS_DEVICE	/;"	d
HS_DEVICE	arch/arm/include/asm/omap_common.h	/^#define HS_DEVICE /;"	d
HS_ENABLE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define HS_ENABLE	/;"	d
HS_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define HS_IPS_BASE_ADDR /;"	d
HS_MODE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define HS_MODE	/;"	d
HS_UART1_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define HS_UART1_BASE	/;"	d
HS_UART2_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define HS_UART2_BASE	/;"	d
HS_UART7_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define HS_UART7_BASE	/;"	d
HS_USB_PKT_SIZE	drivers/usb/eth/smsc95xx.c	/^#define HS_USB_PKT_SIZE	/;"	d	file:
HTE	arch/x86/cpu/quark/mrc_util.h	/^#define HTE	/;"	d
HTERD	drivers/net/armada100_fec.h	/^	HTERD = 4,$/;"	e	enum:hash_table_entry
HTERDBIT	drivers/net/armada100_fec.h	/^	HTERDBIT = 2$/;"	e	enum:hash_table_entry
HTESKIP	drivers/net/armada100_fec.h	/^	HTESKIP = 2,$/;"	e	enum:hash_table_entry
HTEVALID	drivers/net/armada100_fec.h	/^	HTEVALID = 1,$/;"	e	enum:hash_table_entry
HTE_LFSR_AGRESSOR_SEED	arch/x86/cpu/quark/hte.h	/^#define HTE_LFSR_AGRESSOR_SEED	/;"	d
HTE_LFSR_VICTIM_SEED	arch/x86/cpu/quark/hte.h	/^#define HTE_LFSR_VICTIM_SEED	/;"	d
HTE_LOOP_CNT	arch/x86/cpu/quark/hte.h	/^#define HTE_LOOP_CNT	/;"	d
HTH	include/sym53c8xx.h	/^  #define   HTH /;"	d
HTML	doc/DocBook/Makefile	/^HTML := $(sort $(patsubst %.xml, %.html, $(BOOKS)))$/;"	m
HTOTAL_CNTL	include/radeon.h	/^#define HTOTAL_CNTL	/;"	d
HTX0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX0_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX0_GMARK,$/;"	e	enum:__anona307945e0103	file:
HTX0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX0_IMARK,$/;"	e	enum:__anona307945e0103	file:
HTX0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,$/;"	e	enum:__anona307879b0103	file:
HTX0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HTX1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HTX1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,$/;"	e	enum:__anona3077f190103	file:
HTX1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,$/;"	e	enum:__anona307879b0103	file:
HTX1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
HTX2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX3_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX3_C_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX3_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX3_D_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
HTX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	HTX4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
HU	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	HU	/;"	d
HUBPORT	drivers/usb/host/r8a66597.h	/^#define	HUBPORT	/;"	d
HUB_CHANGE_LOCAL_POWER	include/usb_defs.h	/^#define HUB_CHANGE_LOCAL_POWER	/;"	d
HUB_CHANGE_OVERCURRENT	include/usb_defs.h	/^#define HUB_CHANGE_OVERCURRENT	/;"	d
HUB_CHAR_COMPOUND	include/usb_defs.h	/^#define HUB_CHAR_COMPOUND /;"	d
HUB_CHAR_LPSM	include/usb_defs.h	/^#define HUB_CHAR_LPSM /;"	d
HUB_CHAR_OCPM	include/usb_defs.h	/^#define HUB_CHAR_OCPM /;"	d
HUB_LONG_RESET_TIME	common/usb_hub.c	/^#define HUB_LONG_RESET_TIME	/;"	d	file:
HUB_SHORT_RESET_TIME	common/usb_hub.c	/^#define HUB_SHORT_RESET_TIME	/;"	d	file:
HUB_STATUS_LOCAL_POWER	include/usb_defs.h	/^#define HUB_STATUS_LOCAL_POWER	/;"	d
HUB_STATUS_OVERCURRENT	include/usb_defs.h	/^#define HUB_STATUS_OVERCURRENT	/;"	d
HUSH_PARSER	cmd/Kconfig	/^config HUSH_PARSER$/;"	c	menu:Command line interface
HV_MODE	arch/nds32/include/asm/ptrace.h	/^#define HV_MODE	/;"	d
HWA_ASYNC_DIV	arch/powerpc/cpu/mpc85xx/speed.c	/^#define HWA_ASYNC_DIV	/;"	d	file:
HWA_CC_PLL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define HWA_CC_PLL	/;"	d	file:
HWA_CGA_M1_CLK_SEL	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^#define HWA_CGA_M1_CLK_SEL	/;"	d	file:
HWA_CGA_M1_CLK_SHIFT	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^#define HWA_CGA_M1_CLK_SHIFT	/;"	d	file:
HWA_CGA_M2_CLK_SEL	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^#define HWA_CGA_M2_CLK_SEL	/;"	d	file:
HWA_CGA_M2_CLK_SHIFT	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^#define HWA_CGA_M2_CLK_SHIFT	/;"	d	file:
HWCFG_MODE_MASK	drivers/net/ax88180.h	/^  #define HWCFG_MODE_MASK	/;"	d
HWCONFIG	include/configs/B4860QDS.h	/^#define	HWCONFIG	/;"	d
HWCONFIG	include/configs/B4860QDS.h	/^#define HWCONFIG	/;"	d
HWCONFIG_BUFFER_SIZE	arch/powerpc/include/asm/config.h	/^  #define HWCONFIG_BUFFER_SIZE /;"	d
HWCONFIG_BUFFER_SIZE	include/configs/ls1012a_common.h	/^#define HWCONFIG_BUFFER_SIZE	/;"	d
HWCONFIG_BUFFER_SIZE	include/configs/ls1021aqds.h	/^#define HWCONFIG_BUFFER_SIZE	/;"	d
HWCONFIG_BUFFER_SIZE	include/configs/ls1021atwr.h	/^#define HWCONFIG_BUFFER_SIZE	/;"	d
HWCONFIG_BUFFER_SIZE	include/configs/ls1043a_common.h	/^#define HWCONFIG_BUFFER_SIZE	/;"	d
HWCONFIG_BUFFER_SIZE	include/configs/ls1046a_common.h	/^#define HWCONFIG_BUFFER_SIZE	/;"	d
HWCONFIG_BUFFER_SIZE	include/configs/ls2080a_common.h	/^#define HWCONFIG_BUFFER_SIZE	/;"	d
HWERRCAUSE	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE /;"	d
HWERRCAUSE0_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE0_P	/;"	d
HWERRCAUSE1_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE1_P	/;"	d
HWERRCAUSE2_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE2_P	/;"	d
HWERRCAUSE3_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE3_P	/;"	d
HWERRCAUSE4_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE4_P	/;"	d
HWERRCAUSE5_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE5_P	/;"	d
HWERRCAUSE6_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE6_P	/;"	d
HWERRCAUSE7_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE7_P	/;"	d
HWERRCAUSE_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define HWERRCAUSE_P	/;"	d
HWL_ETHER	net/bootp.h	/^# define HWL_ETHER	/;"	d
HWREV_100	board/gdsys/dlvision/dlvision.c	/^#define HWREV_100	/;"	d	file:
HWRNG	arch/powerpc/dts/canyonlands.dts	/^		HWRNG: hwrng@110000 {$/;"	l
HWRNG	arch/powerpc/dts/glacier.dts	/^		HWRNG: hwrng@110000 {$/;"	l
HWRXOFF	drivers/net/bcm-sf2-eth-gmac.h	/^#define HWRXOFF	/;"	d
HWS_CONTROL_ELEMENT_ADLL	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_CONTROL_ELEMENT_ADLL,		\/* per bit 1 edge *\/$/;"	e	enum:hws_control_element
HWS_CONTROL_ELEMENT_DQS_SKEW	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_CONTROL_ELEMENT_DQS_SKEW$/;"	e	enum:hws_control_element
HWS_CONTROL_ELEMENT_DQ_SKEW	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_CONTROL_ELEMENT_DQ_SKEW,$/;"	e	enum:hws_control_element
HWS_GET_CS_CONFIG_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_GET_CS_CONFIG_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u8 dev_num,u32 cs_mask,struct hws_cs_config_info * cs_info)
HWS_GET_INIT_FREQ	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_GET_INIT_FREQ)(u8 dev_num, enum hws_ddr_freq *freq);$/;"	t	typeref:typename:int (*)(u8 dev_num,enum hws_ddr_freq * freq)
HWS_HIGH2LOW	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_HIGH2LOW,$/;"	e	enum:hws_search_dir
HWS_LOW2HIGH	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_LOW2HIGH,$/;"	e	enum:hws_search_dir
HWS_MAX_DEVICE_NUM	drivers/ddr/marvell/a38x/silicon_if.h	/^#define HWS_MAX_DEVICE_NUM /;"	d
HWS_SEARCH_DIR_LIMIT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_SEARCH_DIR_LIMIT$/;"	e	enum:hws_search_dir
HWS_SET_FREQ_DIVIDER_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_SET_FREQ_DIVIDER_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u8 dev_num,u32 if_id,enum hws_ddr_freq freq)
HWS_TEMP_HIGH	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	HWS_TEMP_HIGH$/;"	e	enum:hws_temperature
HWS_TEMP_LOW	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	HWS_TEMP_LOW,$/;"	e	enum:hws_temperature
HWS_TEMP_NORMAL	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	HWS_TEMP_NORMAL,$/;"	e	enum:hws_temperature
HWS_TIP_DUNIT_MUX_SELECT_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TIP_DUNIT_MUX_SELECT_FUNC_PTR)(u8 dev_num, int enable);$/;"	t	typeref:typename:int (*)(u8 dev_num,int enable)
HWS_TIP_DUNIT_REG_READ_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TIP_DUNIT_REG_READ_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u8 dev_num,enum hws_access_type interface_access,u32 if_id,u32 offset,u32 * data,u32 mask)
HWS_TIP_DUNIT_REG_WRITE_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TIP_DUNIT_REG_WRITE_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u8 dev_num,enum hws_access_type interface_access,u32 if_id,u32 offset,u32 data,u32 mask)
HWS_TIP_GET_DEVICE_INFO	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TIP_GET_DEVICE_INFO)($/;"	t	typeref:typename:int (*)(u8 dev_num,struct ddr3_device_info * info_ptr)
HWS_TIP_GET_FREQ_CONFIG_INFO	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TIP_GET_FREQ_CONFIG_INFO)($/;"	t	typeref:typename:int (*)(u8 dev_num,enum hws_ddr_freq freq,struct hws_tip_freq_config_info * freq_config_info)
HWS_TRAINING_IP_ALGO_RUN_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_ALGO_RUN_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_algo_type algo_type)
HWS_TRAINING_IP_BIST_ACTIVATE	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_BIST_ACTIVATE)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_pattern pattern,enum hws_access_type access_type,u32 if_num,enum hws_dir direction,enum hws_stress_jump addr_stress_jump,enum hws_pattern_duration duration,enum hws_bist_operation oper_type,u32 offset,u32 cs_num,u32 pattern_addr_length)
HWS_TRAINING_IP_BIST_READ_RESULT	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_BIST_READ_RESULT)($/;"	t	typeref:typename:int (*)(u32 dev_num,u32 if_id,struct bist_result * pst_bist_result)
HWS_TRAINING_IP_BUS_READ_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_BUS_READ_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,u32 if_id,enum hws_access_type phy_access_type,u32 phy_id,enum hws_ddr_phy phy_type,u32 reg_addr,u32 * data)
HWS_TRAINING_IP_BUS_WRITE_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_BUS_WRITE_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_access_type dunit_access_type,u32 if_id,enum hws_access_type phy_access_type,u32 phy_id,enum hws_ddr_phy phy_type,u32 reg_addr,u32 data)
HWS_TRAINING_IP_EXTERNAL_READ_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_EXTERNAL_READ_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,u32 if_id,u32 ddr_addr,u32 num_bursts,u32 * data)
HWS_TRAINING_IP_EXTERNAL_WRITE_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_EXTERNAL_WRITE_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,u32 if_id,u32 ddr_addr,u32 num_bursts,u32 * data)
HWS_TRAINING_IP_GET_TEMP	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef u32 (*HWS_TRAINING_IP_GET_TEMP)(u8 dev_num);$/;"	t	typeref:typename:u32 (*)(u8 dev_num)
HWS_TRAINING_IP_IF_READ_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_IF_READ_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_access_type access_type,u32 dunit_id,u32 reg_addr,u32 * data,u32 mask)
HWS_TRAINING_IP_IF_WRITE_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_IF_WRITE_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_access_type access_type,u32 dunit_id,u32 reg_addr,u32 data,u32 mask)
HWS_TRAINING_IP_INIT_CONTROLLER_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_INIT_CONTROLLER_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,struct init_cntr_param * init_cntr_prm)
HWS_TRAINING_IP_LOAD_TOPOLOGY	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_LOAD_TOPOLOGY)(u32 dev_num, u32 config_num);$/;"	t	typeref:typename:int (*)(u32 dev_num,u32 config_num)
HWS_TRAINING_IP_PBS_RX_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_PBS_RX_FUNC_PTR)(u32 dev_num);$/;"	t	typeref:typename:int (*)(u32 dev_num)
HWS_TRAINING_IP_PBS_TX_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_PBS_TX_FUNC_PTR)(u32 dev_num);$/;"	t	typeref:typename:int (*)(u32 dev_num)
HWS_TRAINING_IP_READ_LEVELING	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_READ_LEVELING)(u32 dev_num, u32 config_num);$/;"	t	typeref:typename:int (*)(u32 dev_num,u32 config_num)
HWS_TRAINING_IP_SELECT_CONTROLLER_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_SELECT_CONTROLLER_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,int enable)
HWS_TRAINING_IP_SET_FREQ_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_SET_FREQ_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_access_type access_type,u32 if_id,enum hws_ddr_freq frequency)
HWS_TRAINING_IP_STATIC_CONFIG_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_STATIC_CONFIG_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,enum hws_ddr_freq frequency,enum hws_static_config_type static_config_type,u32 if_id)
HWS_TRAINING_IP_STATUS_FAIL	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_TRAINING_IP_STATUS_FAIL,$/;"	e	enum:hws_training_ip_stat
HWS_TRAINING_IP_STATUS_SUCCESS	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_TRAINING_IP_STATUS_SUCCESS,$/;"	e	enum:hws_training_ip_stat
HWS_TRAINING_IP_STATUS_TIMEOUT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	HWS_TRAINING_IP_STATUS_TIMEOUT$/;"	e	enum:hws_training_ip_stat
HWS_TRAINING_IP_TOPOLOGY_MAP_LOAD_FUNC_PTR	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_TOPOLOGY_MAP_LOAD_FUNC_PTR)($/;"	t	typeref:typename:int (*)(u32 dev_num,struct hws_topology_map * topology_map)
HWS_TRAINING_IP_WRITE_LEVELING	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^typedef int (*HWS_TRAINING_IP_WRITE_LEVELING)(u32 dev_num, u32 config_num);$/;"	t	typeref:typename:int (*)(u32 dev_num,u32 config_num)
HWTYPE_DLVISION_CON	board/gdsys/dlvision/dlvision.c	/^	HWTYPE_DLVISION_CON = 1,$/;"	e	enum:__anon76f7f5850103	file:
HWTYPE_DLVISION_CPU	board/gdsys/dlvision/dlvision.c	/^	HWTYPE_DLVISION_CPU = 0,$/;"	e	enum:__anon76f7f5850103	file:
HWT_ETHER	net/bootp.h	/^# define HWT_ETHER	/;"	d
HWUART_BASE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	HWUART_BASE	/;"	d
HWUART_INDEX	drivers/serial/serial_pxa.c	/^#define	HWUART_INDEX	/;"	d	file:
HWVER_100	board/gdsys/405ep/io.c	/^	HWVER_100 = 0,$/;"	e	enum:__anonb37332db0203	file:
HWVER_100	board/gdsys/405ep/iocon.c	/^	HWVER_100 = 0,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_100	board/gdsys/405ex/io64.c	/^	HWVER_100 = 0,$/;"	e	enum:__anonbf1d9e0d0203	file:
HWVER_100	board/gdsys/p1022/controlcenterd.c	/^	HWVER_100 = 0,$/;"	e	enum:__anonc9a6df700103	file:
HWVER_101	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_101 = 0,$/;"	e	enum:__anon678ede200203	file:
HWVER_104	board/gdsys/405ep/iocon.c	/^	HWVER_104 = 1,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_110	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_110 = 1,$/;"	e	enum:__anon678ede200203	file:
HWVER_110	board/gdsys/405ep/io.c	/^	HWVER_110 = 1,$/;"	e	enum:__anonb37332db0203	file:
HWVER_110	board/gdsys/405ep/iocon.c	/^	HWVER_110 = 2,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_110	board/gdsys/405ex/io64.c	/^	HWVER_110 = 1,$/;"	e	enum:__anonbf1d9e0d0203	file:
HWVER_110	board/gdsys/p1022/controlcenterd.c	/^	HWVER_110 = 1,$/;"	e	enum:__anonc9a6df700103	file:
HWVER_120	board/gdsys/405ep/iocon.c	/^	HWVER_120 = 3,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_120	board/gdsys/p1022/controlcenterd.c	/^	HWVER_120 = 2,$/;"	e	enum:__anonc9a6df700103	file:
HWVER_121	board/gdsys/405ep/io.c	/^	HWVER_121 = 2,$/;"	e	enum:__anonb37332db0203	file:
HWVER_122	board/gdsys/405ep/io.c	/^	HWVER_122 = 3,$/;"	e	enum:__anonb37332db0203	file:
HWVER_130	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_130 = 2,$/;"	e	enum:__anon678ede200203	file:
HWVER_140	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_140 = 3,$/;"	e	enum:__anon678ede200203	file:
HWVER_150	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_150 = 4,$/;"	e	enum:__anon678ede200203	file:
HWVER_160	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_160 = 5,$/;"	e	enum:__anon678ede200203	file:
HWVER_170	board/gdsys/405ep/dlvision-10g.c	/^	HWVER_170 = 6,$/;"	e	enum:__anon678ede200203	file:
HWVER_200	board/gdsys/405ep/iocon.c	/^	HWVER_200 = 4,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_210	board/gdsys/405ep/iocon.c	/^	HWVER_210 = 5,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_220	board/gdsys/405ep/iocon.c	/^	HWVER_220 = 6,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_230	board/gdsys/405ep/iocon.c	/^	HWVER_230 = 7,$/;"	e	enum:__anon023d8a7b0203	file:
HWVER_300	board/gdsys/405ep/neo.c	/^	HWVER_300 = 3,$/;"	e	enum:__anon222f9b050203	file:
HW_AUTH_DONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_AUTH_DONE	/;"	d
HW_AUTH_STATE_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_AUTH_STATE_CHG	/;"	d
HW_BKSV_RDY	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_BKSV_RDY	/;"	d
HW_CCM_CCGR_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCGR_CLR(/;"	d
HW_CCM_CCGR_RD	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCGR_RD(/;"	d
HW_CCM_CCGR_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCGR_SET(/;"	d
HW_CCM_CCGR_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCGR_TOGGLE(/;"	d
HW_CCM_CCGR_WR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCGR_WR(/;"	d
HW_CCM_CCM_OBSERVE_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCM_OBSERVE_CLR(/;"	d
HW_CCM_CCM_OBSERVE_RD	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCM_OBSERVE_RD(/;"	d
HW_CCM_CCM_OBSERVE_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCM_OBSERVE_SET(/;"	d
HW_CCM_CCM_OBSERVE_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCM_OBSERVE_TOGGLE(/;"	d
HW_CCM_CCM_OBSERVE_WR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_CCM_OBSERVE_WR(/;"	d
HW_CCM_GPR_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_GPR_CLR(/;"	d
HW_CCM_GPR_RD	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_GPR_RD(/;"	d
HW_CCM_GPR_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_GPR_SET(/;"	d
HW_CCM_GPR_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_GPR_TOGGLE(/;"	d
HW_CCM_GPR_WR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_GPR_WR(/;"	d
HW_CCM_ROOT_TARGET_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_ROOT_TARGET_CLR(/;"	d
HW_CCM_ROOT_TARGET_RD	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_ROOT_TARGET_RD(/;"	d
HW_CCM_ROOT_TARGET_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_ROOT_TARGET_SET(/;"	d
HW_CCM_ROOT_TARGET_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_ROOT_TARGET_TOGGLE(/;"	d
HW_CCM_ROOT_TARGET_WR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_ROOT_TARGET_WR(/;"	d
HW_CCM_SCTRL_CLR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_SCTRL_CLR(/;"	d
HW_CCM_SCTRL_RD	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_SCTRL_RD(/;"	d
HW_CCM_SCTRL_SET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_SCTRL_SET(/;"	d
HW_CCM_SCTRL_TOGGLE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_SCTRL_TOGGLE(/;"	d
HW_CCM_SCTRL_WR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define HW_CCM_SCTRL_WR(/;"	d
HW_CFG	drivers/net/smc911x.h	/^#define HW_CFG	/;"	d
HW_CFG	drivers/usb/eth/smsc95xx.c	/^#define HW_CFG	/;"	d	file:
HW_CFG_32_16_BIT_MODE	drivers/net/smc911x.h	/^#define	HW_CFG_32_16_BIT_MODE	/;"	d
HW_CFG_BCE_	drivers/usb/eth/smsc95xx.c	/^#define HW_CFG_BCE_	/;"	d	file:
HW_CFG_BIR_	drivers/usb/eth/smsc95xx.c	/^#define HW_CFG_BIR_	/;"	d	file:
HW_CFG_EXT_PHY_DET	drivers/net/smc911x.h	/^#define	HW_CFG_EXT_PHY_DET	/;"	d
HW_CFG_EXT_PHY_EN	drivers/net/smc911x.h	/^#define	HW_CFG_EXT_PHY_EN	/;"	d
HW_CFG_LRST_	drivers/usb/eth/smsc95xx.c	/^#define HW_CFG_LRST_	/;"	d	file:
HW_CFG_MEF_	drivers/usb/eth/smsc95xx.c	/^#define HW_CFG_MEF_	/;"	d	file:
HW_CFG_PHY_CLK_SEL	drivers/net/smc911x.h	/^#define	HW_CFG_PHY_CLK_SEL	/;"	d
HW_CFG_PHY_CLK_SEL_CLK_DIS	drivers/net/smc911x.h	/^#define	HW_CFG_PHY_CLK_SEL_CLK_DIS	/;"	d
HW_CFG_PHY_CLK_SEL_EXT_PHY	drivers/net/smc911x.h	/^#define	HW_CFG_PHY_CLK_SEL_EXT_PHY	/;"	d
HW_CFG_PHY_CLK_SEL_INT_PHY	drivers/net/smc911x.h	/^#define	HW_CFG_PHY_CLK_SEL_INT_PHY	/;"	d
HW_CFG_RXDOFF_	drivers/usb/eth/smsc95xx.c	/^#define HW_CFG_RXDOFF_	/;"	d	file:
HW_CFG_SF	drivers/net/smc911x.h	/^#define	HW_CFG_SF	/;"	d
HW_CFG_SMI_SEL	drivers/net/smc911x.h	/^#define	HW_CFG_SMI_SEL	/;"	d
HW_CFG_SRST	drivers/net/smc911x.h	/^#define	HW_CFG_SRST	/;"	d
HW_CFG_SRST_TO	drivers/net/smc911x.h	/^#define	HW_CFG_SRST_TO	/;"	d
HW_CFG_TR	drivers/net/smc911x.h	/^#define	HW_CFG_TR	/;"	d
HW_CFG_TTM	drivers/net/smc911x.h	/^#define	HW_CFG_TTM	/;"	d
HW_CFG_TX_FIF_SZ	drivers/net/smc911x.h	/^#define	HW_CFG_TX_FIF_SZ	/;"	d
HW_COMP_MAINCPU	board/ifm/ac14xx/ac14xx.c	/^#define HW_COMP_MAINCPU /;"	d	file:
HW_DIGCTL_CHIPID_MASK	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^#define HW_DIGCTL_CHIPID_MASK	/;"	d
HW_DIGCTL_CHIPID_MX23	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^#define HW_DIGCTL_CHIPID_MX23	/;"	d
HW_DIGCTL_CHIPID_MX28	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^#define HW_DIGCTL_CHIPID_MX28	/;"	d
HW_DIGCTL_CTRL	drivers/usb/host/ehci-mxs.c	/^#define	HW_DIGCTL_CTRL	/;"	d	file:
HW_DIGCTL_CTRL_USB0_CLKGATE	drivers/usb/host/ehci-mxs.c	/^#define	HW_DIGCTL_CTRL_USB0_CLKGATE	/;"	d	file:
HW_DIGCTL_CTRL_USB1_CLKGATE	drivers/usb/host/ehci-mxs.c	/^#define	HW_DIGCTL_CTRL_USB1_CLKGATE	/;"	d	file:
HW_DRAM_CTL14	board/freescale/mx23evk/spl_boot.c	/^#define HW_DRAM_CTL14	/;"	d	file:
HW_DRAM_CTL14_CONFIG	board/freescale/mx23evk/spl_boot.c	/^#define HW_DRAM_CTL14_CONFIG	/;"	d	file:
HW_DRAM_CTL29	board/freescale/mx28evk/iomux.c	/^#define HW_DRAM_CTL29	/;"	d	file:
HW_DRAM_CTL29_CONFIG	board/freescale/mx28evk/iomux.c	/^#define HW_DRAM_CTL29_CONFIG	/;"	d	file:
HW_ENABLE_GATE	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define HW_ENABLE_GATE(/;"	d
HW_ENABLE_GATE	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define HW_ENABLE_GATE(/;"	d
HW_EXIT_IDLE_EN_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	HW_EXIT_IDLE_EN_MASK		= 1,$/;"	e	enum:__anon957231910203	file:
HW_EXIT_IDLE_EN_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	HW_EXIT_IDLE_EN_SHIFT		= 31,$/;"	e	enum:__anon957231910203	file:
HW_ID_ELEM_COUNT	board/cm5200/cm5200.h	/^	HW_ID_ELEM_COUNT	\/* count *\/$/;"	e	enum:__anonb595836f0103
HW_ID_ELEM_MAXLEN	board/cm5200/cm5200.h	/^#define HW_ID_ELEM_MAXLEN	/;"	d
HW_INST_WATCHPOINT_NUM	arch/blackfin/lib/kgdb.h	/^#define HW_INST_WATCHPOINT_NUM	/;"	d
HW_LINK_TRAINING_PATTERN	arch/arm/mach-exynos/include/mach/dp.h	/^#define HW_LINK_TRAINING_PATTERN	/;"	d
HW_LOW_POWER_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	HW_LOW_POWER_EN			= 1 << 0,$/;"	e	enum:__anon957231910203	file:
HW_LT_DONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_LT_DONE	/;"	d
HW_LT_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_LT_EN	/;"	d
HW_LT_ERR_CODE_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_LT_ERR_CODE_MASK	/;"	d
HW_LT_ERR_CODE_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_LT_ERR_CODE_SHIFT	/;"	d
HW_MCAST_SIZE	drivers/net/ks8851_mll.h	/^#define HW_MCAST_SIZE	/;"	d
HW_ONLY_GATE	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define HW_ONLY_GATE(/;"	d
HW_ONLY_GATE	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define HW_ONLY_GATE(/;"	d
HW_SHA_DONE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define HW_SHA_DONE	/;"	d
HW_SW_GATE	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define HW_SW_GATE(/;"	d
HW_SW_GATE	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define HW_SW_GATE(/;"	d
HW_SW_GATE_AUTO	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define HW_SW_GATE_AUTO(/;"	d
HW_SW_GATE_AUTO	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define HW_SW_GATE_AUTO(/;"	d
HW_TO_BD	drivers/net/davinci_emac.c	/^#define HW_TO_BD(/;"	d	file:
HW_TO_BD	drivers/net/davinci_emac.c	/^static inline unsigned long HW_TO_BD(unsigned long x)$/;"	f	typeref:typename:unsigned long	file:
HW_TRAINING_FINISH	arch/arm/mach-exynos/include/mach/dp.h	/^#define HW_TRAINING_FINISH	/;"	d
HW_USBCTRL_GPTIMERCTRL_GPTCNT_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERCTRL_GPTCNT_MASK	/;"	d
HW_USBCTRL_GPTIMERCTRL_GPTCNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERCTRL_GPTCNT_OFFSET	/;"	d
HW_USBCTRL_GPTIMERCTRL_GPTMODE	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERCTRL_GPTMODE	/;"	d
HW_USBCTRL_GPTIMERCTRL_GPTRST	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERCTRL_GPTRST	/;"	d
HW_USBCTRL_GPTIMERCTRL_GPTRUN	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERCTRL_GPTRUN	/;"	d
HW_USBCTRL_GPTIMERLD_GPTLD_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERLD_GPTLD_MASK	/;"	d
HW_USBCTRL_GPTIMERLD_GPTLD_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_GPTIMERLD_GPTLD_OFFSET	/;"	d
HW_USBCTRL_HWDEVICE_DC	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWDEVICE_DC	/;"	d
HW_USBCTRL_HWDEVICE_DEVEP_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWDEVICE_DEVEP_MASK	/;"	d
HW_USBCTRL_HWDEVICE_DEVEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWDEVICE_DEVEP_OFFSET	/;"	d
HW_USBCTRL_HWGENERAL_BWT	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_BWT	/;"	d
HW_USBCTRL_HWGENERAL_CLKC_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_CLKC_MASK	/;"	d
HW_USBCTRL_HWGENERAL_CLKC_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_CLKC_OFFSET	/;"	d
HW_USBCTRL_HWGENERAL_PHYM_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_PHYM_MASK	/;"	d
HW_USBCTRL_HWGENERAL_PHYM_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_PHYM_OFFSET	/;"	d
HW_USBCTRL_HWGENERAL_PHYW_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_PHYW_MASK	/;"	d
HW_USBCTRL_HWGENERAL_PHYW_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_PHYW_OFFSET	/;"	d
HW_USBCTRL_HWGENERAL_RT	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_RT	/;"	d
HW_USBCTRL_HWGENERAL_SM_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_SM_MASK	/;"	d
HW_USBCTRL_HWGENERAL_SM_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWGENERAL_SM_OFFSET	/;"	d
HW_USBCTRL_HWHOST_HC	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_HC	/;"	d
HW_USBCTRL_HWHOST_NPORT_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_NPORT_MASK	/;"	d
HW_USBCTRL_HWHOST_NPORT_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_NPORT_OFFSET	/;"	d
HW_USBCTRL_HWHOST_TTASY_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_TTASY_MASK	/;"	d
HW_USBCTRL_HWHOST_TTASY_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_TTASY_OFFSET	/;"	d
HW_USBCTRL_HWHOST_TTPER_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_TTPER_MASK	/;"	d
HW_USBCTRL_HWHOST_TTPER_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWHOST_TTPER_OFFSET	/;"	d
HW_USBCTRL_HWRXBUF_RXADD_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWRXBUF_RXADD_MASK	/;"	d
HW_USBCTRL_HWRXBUF_RXADD_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWRXBUF_RXADD_OFFSET	/;"	d
HW_USBCTRL_HWRXBUF_RXBURST_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWRXBUF_RXBURST_MASK	/;"	d
HW_USBCTRL_HWRXBUF_RXBURST_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWRXBUF_RXBURST_OFFSET	/;"	d
HW_USBCTRL_HWTXBUF_TXADD_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXADD_MASK	/;"	d
HW_USBCTRL_HWTXBUF_TXADD_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXADD_OFFSET	/;"	d
HW_USBCTRL_HWTXBUF_TXBURST_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXBURST_MASK	/;"	d
HW_USBCTRL_HWTXBUF_TXBURST_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXBURST_OFFSET	/;"	d
HW_USBCTRL_HWTXBUF_TXCHANADD_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXCHANADD_MASK	/;"	d
HW_USBCTRL_HWTXBUF_TXCHANADD_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXCHANADD_OFFSET	/;"	d
HW_USBCTRL_HWTXBUF_TXLCR	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_HWTXBUF_TXLCR	/;"	d
HW_USBCTRL_ID_CIVERSION_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_CIVERSION_MASK	/;"	d
HW_USBCTRL_ID_CIVERSION_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_CIVERSION_OFFSET	/;"	d
HW_USBCTRL_ID_ID_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_ID_MASK	/;"	d
HW_USBCTRL_ID_ID_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_ID_OFFSET	/;"	d
HW_USBCTRL_ID_NID_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_NID_MASK	/;"	d
HW_USBCTRL_ID_NID_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_NID_OFFSET	/;"	d
HW_USBCTRL_ID_REVISION_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_REVISION_MASK	/;"	d
HW_USBCTRL_ID_REVISION_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_REVISION_OFFSET	/;"	d
HW_USBCTRL_ID_TAG_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_TAG_MASK	/;"	d
HW_USBCTRL_ID_TAG_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_TAG_OFFSET	/;"	d
HW_USBCTRL_ID_VERSION_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_VERSION_MASK	/;"	d
HW_USBCTRL_ID_VERSION_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_ID_VERSION_OFFSET	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_MASK	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_MASK	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_OFFSET	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_OFFSET	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_S_INCR16	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_S_INCR16	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_S_INCR4	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_S_INCR4	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_S_INCR8	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_S_INCR8	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR16	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR16	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR4	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR4	/;"	d
HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR8	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define	HW_USBCTRL_SBUSCFG_AHBBURST_U_INCR8	/;"	d
HW_WATCHPOINT_NUM	arch/blackfin/lib/kgdb.h	/^#define HW_WATCHPOINT_NUM	/;"	d
HWtype	arch/arc/lib/libgcc2.h	/^#define HWtype	/;"	d
HYNIX_RASWIDTH_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_RASWIDTH_165	/;"	d
HYNIX_RASWIDTH_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_RASWIDTH_200	/;"	d
HYNIX_TCKE_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TCKE_165 /;"	d
HYNIX_TCKE_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TCKE_200	/;"	d
HYNIX_TDAL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TDAL_165 /;"	d
HYNIX_TDAL_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TDAL_200	/;"	d
HYNIX_TDPL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TDPL_165 /;"	d
HYNIX_TDPL_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TDPL_200	/;"	d
HYNIX_TRAS_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRAS_165 /;"	d
HYNIX_TRAS_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRAS_200	/;"	d
HYNIX_TRCD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRCD_165 /;"	d
HYNIX_TRCD_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRCD_200	/;"	d
HYNIX_TRC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRC_165 /;"	d
HYNIX_TRC_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRC_200	/;"	d
HYNIX_TRFC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRFC_165 /;"	d
HYNIX_TRFC_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRFC_200	/;"	d
HYNIX_TRP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRP_165 /;"	d
HYNIX_TRP_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRP_200	/;"	d
HYNIX_TRRD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRRD_165 /;"	d
HYNIX_TRRD_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TRRD_200	/;"	d
HYNIX_TWTR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TWTR_165 /;"	d
HYNIX_TWTR_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TWTR_200	/;"	d
HYNIX_TXP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TXP_165 /;"	d
HYNIX_TXP_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_TXP_200	/;"	d
HYNIX_V_ACTIMA_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_V_ACTIMA_165	/;"	d
HYNIX_V_ACTIMA_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_V_ACTIMA_200	/;"	d
HYNIX_V_ACTIMB_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_V_ACTIMB_165	/;"	d
HYNIX_V_ACTIMB_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_V_ACTIMB_200	/;"	d
HYNIX_V_MCFG_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_V_MCFG_165(/;"	d
HYNIX_V_MCFG_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_V_MCFG_200(/;"	d
HYNIX_XSR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_XSR_165 /;"	d
HYNIX_XSR_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define HYNIX_XSR_200	/;"	d
HYP_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define HYP_MODE	/;"	d
HZ	drivers/block/sata_dwc.h	/^#define HZ /;"	d
HZ	drivers/net/rtl8169.c	/^#define HZ /;"	d	file:
HZ_MODE	include/twl6030.h	/^#define HZ_MODE	/;"	d
H_ACTPIX	board/bf527-ezkit/video.c	/^#define H_ACTPIX	/;"	d	file:
H_B_PORCH_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_B_PORCH_CFG_H(/;"	d
H_B_PORCH_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_B_PORCH_CFG_L(/;"	d
H_DDA_INC_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_DDA_INC_MASK	/;"	d
H_DDA_INC_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_DDA_INC_SHIFT	/;"	d
H_DIRECTION	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_DIRECTION	/;"	d
H_DIRECTION_DECREMENT	arch/arm/include/asm/arch-tegra/dc.h	/^	H_DIRECTION_DECREMENT,$/;"	e	enum:__anonf53c9cce0803
H_DIRECTION_INCREMENT	arch/arm/include/asm/arch-tegra/dc.h	/^	H_DIRECTION_INCREMENT,$/;"	e	enum:__anonf53c9cce0803
H_FORCE	include/search.h	/^#define H_FORCE	/;"	d
H_F_PORCH_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_F_PORCH_CFG_H(/;"	d
H_F_PORCH_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_F_PORCH_CFG_L(/;"	d
H_HIDE_DOT	include/search.h	/^#define H_HIDE_DOT	/;"	d
H_IMM_HIGH	include/bedbug/ppc.h	/^#define H_IMM_HIGH	/;"	d
H_INTERACTIVE	include/search.h	/^#define H_INTERACTIVE	/;"	d
H_MATCH_BOTH	include/search.h	/^#define H_MATCH_BOTH	/;"	d
H_MATCH_DATA	include/search.h	/^#define H_MATCH_DATA	/;"	d
H_MATCH_IDENT	include/search.h	/^#define H_MATCH_IDENT	/;"	d
H_MATCH_KEY	include/search.h	/^#define H_MATCH_KEY	/;"	d
H_MATCH_METHOD	include/search.h	/^#define H_MATCH_METHOD	/;"	d
H_MATCH_REGEX	include/search.h	/^#define H_MATCH_REGEX	/;"	d
H_MATCH_SUBSTR	include/search.h	/^#define H_MATCH_SUBSTR	/;"	d
H_MISC_DISABLE_TURBO	arch/x86/include/asm/msr-index.h	/^#define H_MISC_DISABLE_TURBO	/;"	d
H_NOCLEAR	include/search.h	/^#define H_NOCLEAR	/;"	d
H_OPORTS_14	board/keymile/common/common.h	/^#define H_OPORTS_14	/;"	d
H_OPORTS_FCC1_PW_DWN	board/keymile/common/common.h	/^#define H_OPORTS_FCC1_PW_DWN	/;"	d
H_OPORTS_SCC4_ENA	board/keymile/common/common.h	/^#define H_OPORTS_SCC4_ENA	/;"	d
H_OPORTS_SCC4_FD_ENA	board/keymile/common/common.h	/^#define H_OPORTS_SCC4_FD_ENA	/;"	d
H_ORIGIN_FLAGS	include/search.h	/^#define H_ORIGIN_FLAGS	/;"	d
H_PERIOD	board/bf527-ezkit/video.c	/^#define H_PERIOD	/;"	d	file:
H_POSITION_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_POSITION_MASK	/;"	d
H_POSITION_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_POSITION_SHIFT	/;"	d
H_PRESCALED_SIZE_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_PRESCALED_SIZE_MASK	/;"	d
H_PRESCALED_SIZE_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_PRESCALED_SIZE_SHIFT	/;"	d
H_PROGRAMMATIC	include/search.h	/^#define H_PROGRAMMATIC	/;"	d
H_PULSE	board/bf527-ezkit/video.c	/^#define H_PULSE	/;"	d	file:
H_PULSE0	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE0,$/;"	e	enum:dc_disp_h_pulse_reg
H_PULSE0_POSITION_A	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE0_POSITION_A,$/;"	e	enum:dc_disp_h_pulse_pos
H_PULSE0_POSITION_B	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE0_POSITION_B,$/;"	e	enum:dc_disp_h_pulse_pos
H_PULSE0_POSITION_C	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE0_POSITION_C,$/;"	e	enum:dc_disp_h_pulse_pos
H_PULSE0_POSITION_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE0_POSITION_COUNT,$/;"	e	enum:dc_disp_h_pulse_pos
H_PULSE0_POSITION_D	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE0_POSITION_D,$/;"	e	enum:dc_disp_h_pulse_pos
H_PULSE1	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE1,$/;"	e	enum:dc_disp_h_pulse_reg
H_PULSE2	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE2,$/;"	e	enum:dc_disp_h_pulse_reg
H_PULSE_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	H_PULSE_COUNT,$/;"	e	enum:dc_disp_h_pulse_reg
H_RA0_IS_0	include/bedbug/ppc.h	/^#define H_RA0_IS_0	/;"	d
H_RELATIVE	include/bedbug/ppc.h	/^#define H_RELATIVE	/;"	d
H_SIZE_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_SIZE_MASK	/;"	d
H_SIZE_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define H_SIZE_SHIFT	/;"	d
H_START	board/bf527-ezkit/video.c	/^#define H_START	/;"	d	file:
H_SYNC_PORCH_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_SYNC_PORCH_CFG_H(/;"	d
H_SYNC_PORCH_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_SYNC_PORCH_CFG_L(/;"	d
H_S_POLARITY_CFG_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define H_S_POLARITY_CFG_SHIFT	/;"	d
H_TST_J	drivers/usb/host/r8a66597.h	/^#define	  H_TST_J	/;"	d
H_TST_K	drivers/usb/host/r8a66597.h	/^#define	  H_TST_K	/;"	d
H_TST_NORMAL	drivers/usb/host/r8a66597.h	/^#define	  H_TST_NORMAL	/;"	d
H_TST_PACKET	drivers/usb/host/r8a66597.h	/^#define	  H_TST_PACKET	/;"	d
H_TST_SE0_NAK	drivers/usb/host/r8a66597.h	/^#define	  H_TST_SE0_NAK	/;"	d
Hardware crypto devices	drivers/crypto/Kconfig	/^menu "Hardware crypto devices"$/;"	m
Hashing Support	lib/Kconfig	/^menu "Hashing Support"$/;"	m	menu:Library routines
HaveRedundEnv	tools/env/fw_env.c	/^static int HaveRedundEnv = 0;$/;"	v	typeref:typename:int	file:
HcBuldCurrentED	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcBuldCurrentED;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcBulkHeadED	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcBulkHeadED;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcCommonStatus	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcCommonStatus;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcControl	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcControl;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcControlCurrentED	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcControlCurrentED;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcControlHeadED	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcControlHeadED;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcDoneHead	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcDoneHead;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcFmNumber	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcFmNumber;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcFmRemaining	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcFmRemaining;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcHCCA	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcHCCA;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcInterruptDisable	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcInterruptDisable;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcInterruptEnable	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcInterruptEnable;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcInterruptStatus	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcInterruptStatus;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcLSThreshold	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcLSThreshold;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcPeriodCuttendED	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcPeriodCuttendED;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcPeriodicStart	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcPeriodicStart;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRevision	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRevision;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRhDescriptorA	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRhDescriptorA;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRhDescriptorB	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRhDescriptorB;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRhPortStatus1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRhPortStatus1;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRhPortStatus2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRhPortStatus2;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRhStatus	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRhStatus;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
HcRmInterval	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	HcRmInterval;$/;"	m	struct:s3c24x0_usb_host	typeref:typename:u32
Hook scripts	test/py/README.md	/^### Hook scripts$/;"	S	section:U-Boot pytest suite""Testing real hardware
Hsync_pol	drivers/video/ipu.h	/^	unsigned Hsync_pol:1;	\/* true = active high *\/$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
HundSpeed	drivers/net/natsemi.c	/^	HundSpeed	= 0x40000000,$/;"	e	enum:ChipConfigBits	file:
HundSpeed	drivers/net/ns8382x.c	/^	HundSpeed = 0x20000000,$/;"	e	enum:ChipConfigBits	file:
HwRev	board/vscom/baltos/board.h	/^	uint32_t HwRev;$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint32_t
I0	arch/blackfin/lib/memcmp.S	/^	I0 = R1;			\/* s2 *\/$/;"	d
I0	arch/blackfin/lib/memmove.S	/^	I0 = P3;$/;"	d
I1	arch/blackfin/lib/memcmp.S	/^	I1 = P3;$/;"	d
I1	arch/blackfin/lib/memcpy.S	/^	I1 = P1;$/;"	d
I1	arch/blackfin/lib/memmove.S	/^	I1 = P3;$/;"	d
I16	fs/jffs2/compr_lzo.c	/^#define I16 /;"	d	file:
I16_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	I16_reg_t I16_reg;$/;"	m	union:__anon39451e6d070a	typeref:typename:I16_reg_t
I16_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^} I16_reg_t;$/;"	t	typeref:struct:__anon39451e6d0208
I16_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^} I16_reg_t;$/;"	t	typeref:struct:__anon39451e6d0508
I210_I_PHY_ID	drivers/net/e1000.h	/^#define I210_I_PHY_ID	/;"	d
I2C support	drivers/i2c/Kconfig	/^menu "I2C support"$/;"	m
I2C0_BASE	arch/arm/mach-keystone/include/mach/i2c_defs.h	/^#define I2C0_BASE	/;"	d
I2C0_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define I2C0_BASE	/;"	d
I2C0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define I2C0_BASE_ADDR	/;"	d
I2C0_ENABLE	board/sunxi/Kconfig	/^config I2C0_ENABLE$/;"	c
I2C0_MSTP116	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define I2C0_MSTP116 /;"	d	file:
I2C0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C0_RESET	/;"	d
I2C0_SCL_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_ER_MARK, VI0_HSYNC_N_MARK, SCIF0_RXD_B_MARK, I2C0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C0_SCL_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF4_RXD_B_MARK, I2C0_SCL_D_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C0_SCL_E_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_RXD_D_MARK, I2C0_SCL_E_MARK, AVB_MAGIC_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C0_SCL_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SCL_MARK, SCIF0_RXD_C_MARK, PWM5_MARK, TCLK1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C0_SDA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SDA_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_EN_MARK, ETH_MDIO_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C0_SDA_E_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HRTS_N_MARK, VI0_R7_MARK, SCIF0_TXD_D_MARK, I2C0_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C0_SDA_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_GTXREFCLK_MARK, CAN1_RX_D_MARK, TPUTO0_B_MARK, I2C0_SDA_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C1_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define I2C1_BASE	/;"	d
I2C1_BASE	arch/arm/mach-keystone/include/mach/i2c_defs.h	/^#define I2C1_BASE	/;"	d
I2C1_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define I2C1_BASE	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define I2C1_BASE_ADDR /;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define I2C1_BASE_ADDR /;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define I2C1_BASE_ADDR /;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define I2C1_BASE_ADDR /;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define I2C1_BASE_ADDR /;"	d
I2C1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define I2C1_BASE_ADDR	/;"	d
I2C1_CLK_OFFSET	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define I2C1_CLK_OFFSET	/;"	d
I2C1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	I2C1_CLK_ROOT = 91,$/;"	e	enum:clk_root_index
I2C1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
I2C1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
I2C1_ENABLE	board/sunxi/Kconfig	/^config I2C1_ENABLE$/;"	c
I2C1_MSTP323	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define I2C1_MSTP323 /;"	d	file:
I2C1_PMIC_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C1_PMIC_SCL	/;"	d
I2C1_PMIC_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C1_PMIC_SDA	/;"	d
I2C1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C1_RESET	/;"	d
I2C1_SCL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C1_SCL	/;"	d
I2C1_SCL	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define I2C1_SCL	/;"	d
I2C1_SCL_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SCL_C_MARK, AUDIO_CLKA_B_MARK, AVB_MDIO_MARK, SSI_SCK78_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C1_SCL_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_D_MARK, I2C1_SCL_MARK, SCIF4_RXD_MARK, PWM5_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C1_SDA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C1_SDA	/;"	d
I2C1_SDA	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define I2C1_SDA	/;"	d
I2C1_SDA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HTX_MARK, VI0_R5_MARK, I2C1_SDA_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C1_SDA_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C2_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define I2C2_BASE	/;"	d
I2C2_BASE	arch/arm/mach-keystone/include/mach/i2c_defs.h	/^#define I2C2_BASE	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define I2C2_BASE_ADDR /;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define I2C2_BASE_ADDR /;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define I2C2_BASE_ADDR /;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define I2C2_BASE_ADDR /;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define I2C2_BASE_ADDR /;"	d
I2C2_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define I2C2_BASE_ADDR	/;"	d
I2C2_BASE_ADDR	drivers/i2c/mxc_i2c.c	/^#define I2C2_BASE_ADDR	/;"	d	file:
I2C2_CLK_OFFSET	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define I2C2_CLK_OFFSET	/;"	d
I2C2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	I2C2_CLK_ROOT = 92,$/;"	e	enum:clk_root_index
I2C2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
I2C2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
I2C2_ENABLE	board/sunxi/Kconfig	/^config I2C2_ENABLE$/;"	c
I2C2_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C2_RESET	/;"	d
I2C2_SCL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C2_SCL	/;"	d
I2C2_SCL	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define I2C2_SCL	/;"	d
I2C2_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C2_SCL	/;"	d
I2C2_SCL_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C2_SCL_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C2_SCL_C_MARK, DU1_DR2_MARK, RIF1_D0_B_MARK, TS_SDEN_D_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C2_SDA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C2_SDA	/;"	d
I2C2_SDA	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define I2C2_SDA	/;"	d
I2C2_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C2_SDA	/;"	d
I2C2_SDA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_RX_MARK, MMC_D7_MARK, SCIF0_TXD_MARK, I2C2_SDA_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C3_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define I2C3_BASE_ADDR	/;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define I2C3_BASE_ADDR	/;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define I2C3_BASE_ADDR	/;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define I2C3_BASE_ADDR	/;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define I2C3_BASE_ADDR /;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define I2C3_BASE_ADDR /;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define I2C3_BASE_ADDR	/;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define I2C3_BASE_ADDR /;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define I2C3_BASE_ADDR /;"	d
I2C3_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define I2C3_BASE_ADDR	/;"	d
I2C3_BASE_ADDR	drivers/i2c/mxc_i2c.c	/^#define I2C3_BASE_ADDR	/;"	d	file:
I2C3_CLK_OFFSET	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define I2C3_CLK_OFFSET	/;"	d
I2C3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	I2C3_CLK_ROOT = 93,$/;"	e	enum:clk_root_index
I2C3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
I2C3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
I2C3_ENABLE	board/sunxi/Kconfig	/^config I2C3_ENABLE$/;"	c
I2C3_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define I2C3_RESET	/;"	d
I2C3_SCL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C3_SCL	/;"	d
I2C3_SCL	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define I2C3_SCL	/;"	d
I2C3_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C3_SCL	/;"	d
I2C3_SCL_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C3_SCL_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS5_MARK, SCIFA3_RXD_MARK, I2C3_SCL_C_MARK, DU1_DOTCLKOUT0_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C3_SCL_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C3_SCL_MARK, SCIFA5_RXD_C_MARK, IETX_C_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C3_SDA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C3_SDA	/;"	d
I2C3_SDA	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define I2C3_SDA	/;"	d
I2C3_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C3_SDA	/;"	d
I2C3_SDA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C3_SDA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT11_MARK, SSI_SDATA5_MARK, SCIFA3_TXD_MARK, I2C3_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C3_SDA_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_FIELD_MARK, I2C3_SDA_MARK, SCIFA5_TXD_C_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C4_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define I2C4_BASE_ADDR	/;"	d
I2C4_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define I2C4_BASE_ADDR	/;"	d
I2C4_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define I2C4_BASE_ADDR /;"	d
I2C4_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define I2C4_BASE_ADDR /;"	d
I2C4_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define I2C4_BASE_ADDR	/;"	d
I2C4_BASE_ADDR	drivers/i2c/mxc_i2c.c	/^#define I2C4_BASE_ADDR	/;"	d	file:
I2C4_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	I2C4_CLK_ROOT = 94,$/;"	e	enum:clk_root_index
I2C4_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
I2C4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define I2C4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
I2C4_ENABLE	board/sunxi/Kconfig	/^config I2C4_ENABLE$/;"	c
I2C4_SCL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C4_SCL	/;"	d
I2C4_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C4_SCL	/;"	d
I2C4_SCL_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS6_MARK, SCIFA1_RXD_B_MARK, I2C4_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C4_SCL_E_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF3_RXD_B_MARK, I2C4_SCL_E_MARK, AVB_GTX_CLK_MARK, SSI_WS6_B_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C4_SDA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define I2C4_SDA	/;"	d
I2C4_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C4_SDA	/;"	d
I2C4_SDA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA1_TXD_B_MARK, I2C4_SDA_C_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C4_SDA_E_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_MDC_MARK, VI0_R3_MARK, SCIF3_TXD_B_MARK, I2C4_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
I2C5_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C5_SCL	/;"	d
I2C5_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define I2C5_SDA	/;"	d
I2CCON_ACKGEN	drivers/i2c/s3c24x0_i2c.c	/^#define I2CCON_ACKGEN	/;"	d	file:
I2CCON_IRPND	drivers/i2c/s3c24x0_i2c.c	/^#define I2CCON_IRPND	/;"	d	file:
I2CECB_RX_ERR	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CECB_RX_ERR	/;"	d	file:
I2CECB_RX_ERR	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CECB_RX_ERR	/;"	d	file:
I2CECB_RX_ERR_OV	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define     I2CECB_RX_ERR_OV	/;"	d	file:
I2CECB_RX_MASK	arch/powerpc/cpu/mpc8260/i2c.c	/^#define     I2CECB_RX_MASK	/;"	d	file:
I2CECB_RX_MASK	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define     I2CECB_RX_MASK	/;"	d	file:
I2CECB_RX_OV	arch/powerpc/cpu/mpc8260/i2c.c	/^#define     I2CECB_RX_OV	/;"	d	file:
I2CECB_TIMEOUT	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CECB_TIMEOUT	/;"	d	file:
I2CECB_TIMEOUT	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CECB_TIMEOUT	/;"	d	file:
I2CECB_TX_CL	arch/powerpc/cpu/mpc8260/i2c.c	/^#define     I2CECB_TX_CL	/;"	d	file:
I2CECB_TX_CL	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define     I2CECB_TX_CL	/;"	d	file:
I2CECB_TX_ERR	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CECB_TX_ERR	/;"	d	file:
I2CECB_TX_ERR	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CECB_TX_ERR	/;"	d	file:
I2CECB_TX_MASK	arch/powerpc/cpu/mpc8260/i2c.c	/^#define     I2CECB_TX_MASK	/;"	d	file:
I2CECB_TX_MASK	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define     I2CECB_TX_MASK	/;"	d	file:
I2CECB_TX_NAK	arch/powerpc/cpu/mpc8260/i2c.c	/^#define     I2CECB_TX_NAK	/;"	d	file:
I2CECB_TX_NAK	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define     I2CECB_TX_NAK	/;"	d	file:
I2CECB_TX_UN	arch/powerpc/cpu/mpc8260/i2c.c	/^#define     I2CECB_TX_UN	/;"	d	file:
I2CECB_TX_UN	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define     I2CECB_TX_UN	/;"	d	file:
I2CERR_IO_ERROR	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CERR_IO_ERROR	/;"	d	file:
I2CERR_MSG_TOO_LONG	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CERR_MSG_TOO_LONG	/;"	d	file:
I2CERR_MSG_TOO_LONG	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CERR_MSG_TOO_LONG	/;"	d	file:
I2CERR_NO_BUFFERS	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CERR_NO_BUFFERS	/;"	d	file:
I2CERR_NO_BUFFERS	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CERR_NO_BUFFERS	/;"	d	file:
I2CERR_QUEUE_EMPTY	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CERR_QUEUE_EMPTY	/;"	d	file:
I2CERR_QUEUE_EMPTY	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CERR_QUEUE_EMPTY	/;"	d	file:
I2CERR_TIMEOUT	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CERR_TIMEOUT	/;"	d	file:
I2CERR_TIMEOUT	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CERR_TIMEOUT	/;"	d	file:
I2CER_ALL	include/mpc8xx.h	/^#define I2CER_ALL	/;"	d
I2CER_BSY	include/mpc8xx.h	/^#define I2CER_BSY	/;"	d
I2CER_RXB	include/mpc8xx.h	/^#define I2CER_RXB	/;"	d
I2CER_TXB	include/mpc8xx.h	/^#define I2CER_TXB	/;"	d
I2CER_TXE	include/mpc8xx.h	/^#define I2CER_TXE	/;"	d
I2CF_ENABLE_SECONDARY	arch/powerpc/cpu/mpc8260/i2c.c	/^#define	I2CF_ENABLE_SECONDARY	/;"	d	file:
I2CF_ENABLE_SECONDARY	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CF_ENABLE_SECONDARY	/;"	d	file:
I2CF_START_COND	arch/powerpc/cpu/mpc8260/i2c.c	/^#define	I2CF_START_COND	/;"	d	file:
I2CF_START_COND	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CF_START_COND	/;"	d	file:
I2CF_STOP_COND	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2CF_STOP_COND	/;"	d	file:
I2CF_STOP_COND	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2CF_STOP_COND	/;"	d	file:
I2CINT_ERROR_EV	drivers/i2c/ihs_i2c.c	/^	I2CINT_ERROR_EV = 1 << 13,$/;"	e	enum:__anon7cedf9120103	file:
I2CINT_RECEIVE_EV	drivers/i2c/ihs_i2c.c	/^	I2CINT_RECEIVE_EV = 1 << 15,$/;"	e	enum:__anon7cedf9120103	file:
I2CINT_TRANSMIT_EV	drivers/i2c/ihs_i2c.c	/^	I2CINT_TRANSMIT_EV = 1 << 14,$/;"	e	enum:__anon7cedf9120103	file:
I2CMB_2BYTE	drivers/i2c/ihs_i2c.c	/^	I2CMB_2BYTE = 1 << 11,$/;"	e	enum:__anon7cedf9120203	file:
I2CMB_HOLD_BUS	drivers/i2c/ihs_i2c.c	/^	I2CMB_HOLD_BUS = 1 << 13,$/;"	e	enum:__anon7cedf9120203	file:
I2CMB_NATIVE	drivers/i2c/ihs_i2c.c	/^	I2CMB_NATIVE = 2 << 14,$/;"	e	enum:__anon7cedf9120203	file:
I2CMB_WRITE	drivers/i2c/ihs_i2c.c	/^	I2CMB_WRITE = 1 << 10,$/;"	e	enum:__anon7cedf9120203	file:
I2COM_MASTER	include/mpc8xx.h	/^#define I2COM_MASTER	/;"	d
I2COM_STR	include/mpc8xx.h	/^#define I2COM_STR	/;"	d
I2CR	drivers/i2c/mxc_i2c.c	/^#define I2CR	/;"	d	file:
I2CR_IDIS	drivers/i2c/mxc_i2c.c	/^#define I2CR_IDIS	/;"	d	file:
I2CR_IEN	drivers/i2c/mxc_i2c.c	/^#define I2CR_IEN	/;"	d	file:
I2CR_IIEN	drivers/i2c/mxc_i2c.c	/^#define I2CR_IIEN	/;"	d	file:
I2CR_MSTA	drivers/i2c/mxc_i2c.c	/^#define I2CR_MSTA	/;"	d	file:
I2CR_MTX	drivers/i2c/mxc_i2c.c	/^#define I2CR_MTX	/;"	d	file:
I2CR_RSTA	drivers/i2c/mxc_i2c.c	/^#define I2CR_RSTA	/;"	d	file:
I2CR_TX_NO_AK	drivers/i2c/mxc_i2c.c	/^#define I2CR_TX_NO_AK	/;"	d	file:
I2CSTAT_BSY	drivers/i2c/s3c24x0_i2c.c	/^#define I2CSTAT_BSY	/;"	d	file:
I2CSTAT_NACK	drivers/i2c/s3c24x0_i2c.c	/^#define I2CSTAT_NACK	/;"	d	file:
I2C_0	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_1	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_10	include/i2c.h	/^	I2C_8, I2C_9, I2C_10,$/;"	e	enum:__anona5540b2c0103
I2C_2	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_3	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_4	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_5	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_6	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_7	include/i2c.h	/^	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,$/;"	e	enum:__anona5540b2c0103
I2C_8	include/i2c.h	/^	I2C_8, I2C_9, I2C_10,$/;"	e	enum:__anona5540b2c0103
I2C_8574_CF	include/configs/MPC8349ITX.h	/^#define I2C_8574_CF	/;"	d
I2C_8574_FLASHSIDE	include/configs/MPC8349ITX.h	/^#define I2C_8574_FLASHSIDE	/;"	d
I2C_8574_MPCICLKRN	include/configs/MPC8349ITX.h	/^#define I2C_8574_MPCICLKRN	/;"	d
I2C_8574_PCI66	include/configs/MPC8349ITX.h	/^#define I2C_8574_PCI66	/;"	d
I2C_8574_REVISION	include/configs/MPC8349ITX.h	/^#define I2C_8574_REVISION	/;"	d
I2C_9	include/i2c.h	/^	I2C_8, I2C_9, I2C_10,$/;"	e	enum:__anona5540b2c0103
I2C_AAS	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_AAS	/;"	d
I2C_AAS	include/mpc5xxx.h	/^#define I2C_AAS	/;"	d
I2C_ACK	drivers/i2c/i2c-gpio.c	/^#define I2C_ACK	/;"	d	file:
I2C_ACK	drivers/i2c/soft_i2c.c	/^#define I2C_ACK	/;"	d	file:
I2C_ACKNAK_SENDACK	drivers/i2c/mv_i2c.h	/^#define I2C_ACKNAK_SENDACK	/;"	d
I2C_ACKNAK_SENDNAK	drivers/i2c/mv_i2c.h	/^#define I2C_ACKNAK_SENDNAK	/;"	d
I2C_ACKNAK_WAITACK	drivers/i2c/mv_i2c.h	/^#define I2C_ACKNAK_WAITACK	/;"	d
I2C_ACTIVE	drivers/i2c/soft_i2c.c	/^#  define I2C_ACTIVE /;"	d	file:
I2C_ACTIVE	include/configs/TQM855M.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/TQM866M.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/TQM885D.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/ethernut5.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/hrcon.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/hrcon.h	/^#define I2C_ACTIVE /;"	d
I2C_ACTIVE	include/configs/iocon.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/km/km_arm.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/km82xx.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/snapper9260.h	/^#define I2C_ACTIVE$/;"	d
I2C_ACTIVE	include/configs/strider.h	/^#define I2C_ACTIVE	/;"	d
I2C_ACTIVE	include/configs/strider.h	/^#define I2C_ACTIVE /;"	d
I2C_ACTIVE	include/configs/vct.h	/^#define I2C_ACTIVE	/;"	d
I2C_ADAP	include/i2c.h	/^#define	I2C_ADAP	/;"	d
I2C_ADAPTER	include/i2c.h	/^#define I2C_ADAPTER(/;"	d
I2C_ADAP_HWNR	include/i2c.h	/^#define I2C_ADAP_HWNR	/;"	d
I2C_ADAP_NR	include/i2c.h	/^#define	I2C_ADAP_NR(/;"	d
I2C_ADDR_IGNORE_LIST	include/configs/xpedite517x.h	/^#define I2C_ADDR_IGNORE_LIST	/;"	d
I2C_ADDR_IGNORE_LIST	include/configs/xpedite537x.h	/^#define I2C_ADDR_IGNORE_LIST	/;"	d
I2C_ADDR_LIST	include/configs/xpedite517x.h	/^#define I2C_ADDR_LIST	/;"	d
I2C_ADDR_LIST	include/configs/xpedite520x.h	/^#define I2C_ADDR_LIST	/;"	d
I2C_ADDR_LIST	include/configs/xpedite537x.h	/^#define I2C_ADDR_LIST	/;"	d
I2C_ADDR_LIST	include/configs/xpedite550x.h	/^#define I2C_ADDR_LIST	/;"	d
I2C_ADR	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_ADR	/;"	d
I2C_ADR	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_ADR	/;"	d
I2C_ADR_RES	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_ADR_RES	/;"	d
I2C_ADR_RES	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_ADR_RES	/;"	d
I2C_ADR_SHIFT	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_ADR_SHIFT	/;"	d
I2C_ADR_SHIFT	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_ADR_SHIFT	/;"	d
I2C_AL	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_AL	/;"	d
I2C_AL	include/mpc5xxx.h	/^#define I2C_AL	/;"	d
I2C_ARB_GPIO_CHALLENGE	drivers/i2c/muxes/Kconfig	/^config I2C_ARB_GPIO_CHALLENGE$/;"	c
I2C_BACKUP_ADDR	board/mpl/common/common_util.c	/^#define I2C_BACKUP_ADDR /;"	d	file:
I2C_BASE	arch/arm/mach-davinci/include/mach/i2c_defs.h	/^#define I2C_BASE	/;"	d
I2C_BASE	arch/arm/mach-keystone/include/mach/i2c_defs.h	/^#define I2C_BASE	/;"	d
I2C_BASE	arch/powerpc/cpu/mpc5xxx/i2c.c	/^#define I2C_BASE	/;"	d	file:
I2C_BASE1	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define  I2C_BASE1	/;"	d
I2C_BASE1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define I2C_BASE1	/;"	d
I2C_BASE1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define I2C_BASE1	/;"	d
I2C_BASE1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define I2C_BASE1	/;"	d
I2C_BASE2	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define  I2C_BASE2	/;"	d
I2C_BASE2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define I2C_BASE2	/;"	d
I2C_BASE2	arch/arm/include/asm/arch-omap4/cpu.h	/^#define I2C_BASE2	/;"	d
I2C_BASE2	arch/arm/include/asm/arch-omap5/cpu.h	/^#define I2C_BASE2	/;"	d
I2C_BASE3	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define  I2C_BASE3	/;"	d
I2C_BASE3	arch/arm/include/asm/arch-omap3/cpu.h	/^#define I2C_BASE3	/;"	d
I2C_BASE3	arch/arm/include/asm/arch-omap4/cpu.h	/^#define I2C_BASE3	/;"	d
I2C_BASE3	arch/arm/include/asm/arch-omap5/cpu.h	/^#define I2C_BASE3	/;"	d
I2C_BASE4	arch/arm/include/asm/arch-omap4/cpu.h	/^#define I2C_BASE4	/;"	d
I2C_BASE4	arch/arm/include/asm/arch-omap5/cpu.h	/^#define I2C_BASE4	/;"	d
I2C_BASE5	arch/arm/include/asm/arch-omap5/cpu.h	/^#define I2C_BASE5	/;"	d
I2C_BB	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_BB	/;"	d
I2C_BB	include/mpc5xxx.h	/^#define I2C_BB	/;"	d
I2C_BD	arch/powerpc/cpu/mpc8260/i2c.c	/^typedef struct I2C_BD {$/;"	s	file:
I2C_BD	arch/powerpc/cpu/mpc8260/i2c.c	/^} I2C_BD;$/;"	t	typeref:struct:I2C_BD	file:
I2C_BD	arch/powerpc/cpu/mpc8xx/i2c.c	/^typedef struct I2C_BD {$/;"	s	file:
I2C_BD	arch/powerpc/cpu/mpc8xx/i2c.c	/^} I2C_BD;$/;"	t	typeref:struct:I2C_BD	file:
I2C_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	I2C_BOOT,$/;"	e	enum:boot_device
I2C_BOOTROM	arch/powerpc/cpu/ppc4xx/cpu.c	/^#define I2C_BOOTROM$/;"	d	file:
I2C_BOOT_SUPPORTED	include/configs/x600.h	/^#define I2C_BOOT_SUPPORTED	/;"	d
I2C_BRFIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_BRFIEN	/;"	d
I2C_BRFIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_BRFIPD /;"	d
I2C_BRST_BRST	drivers/i2c/i2c-uniphier.c	/^#define I2C_BRST_BRST	/;"	d	file:
I2C_BRST_FOEN	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_BRST_FOEN	/;"	d	file:
I2C_BRST_FOEN	drivers/i2c/i2c-uniphier.c	/^#define I2C_BRST_FOEN	/;"	d	file:
I2C_BRST_RSCLO	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_BRST_RSCLO	/;"	d	file:
I2C_BTFIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_BTFIEN	/;"	d
I2C_BTFIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_BTFIPD /;"	d
I2C_BUF_RDMA_EN	drivers/i2c/omap24xx_i2c.h	/^#define I2C_BUF_RDMA_EN	/;"	d
I2C_BUF_XDMA_EN	drivers/i2c/omap24xx_i2c.h	/^#define I2C_BUF_XDMA_EN	/;"	d
I2C_BUS	include/i2c.h	/^#define	I2C_BUS	/;"	d
I2C_BUS_CNT	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_BUS_CNT	/;"	d
I2C_BUS_MAX	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define	 I2C_BUS_MAX	/;"	d
I2C_BUS_MAX	arch/arm/include/asm/arch-omap3/i2c.h	/^#define I2C_BUS_MAX	/;"	d
I2C_BUS_MAX	arch/arm/include/asm/arch-omap4/i2c.h	/^#define I2C_BUS_MAX	/;"	d
I2C_BUS_MAX	arch/arm/include/asm/arch-omap5/i2c.h	/^#define I2C_BUS_MAX	/;"	d
I2C_BUS_MAX	include/configs/ti_armv7_keystone2.h	/^#define I2C_BUS_MAX	/;"	d
I2C_BYTE_TO	drivers/i2c/designware_i2c.h	/^#define I2C_BYTE_TO	/;"	d
I2C_BYTE_TO_BB	drivers/i2c/designware_i2c.h	/^#define I2C_BYTE_TO_BB	/;"	d
I2C_CF	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_CF	/;"	d
I2C_CF	include/mpc5xxx.h	/^#define I2C_CF	/;"	d
I2C_CH_DEFAULT	include/configs/B4860QDS.h	/^#define I2C_CH_DEFAULT /;"	d
I2C_CH_IDT	include/configs/B4860QDS.h	/^#define I2C_CH_IDT /;"	d
I2C_CH_VSC3308	include/configs/B4860QDS.h	/^#define I2C_CH_VSC3308 /;"	d
I2C_CH_VSC3316	include/configs/B4860QDS.h	/^#define I2C_CH_VSC3316 /;"	d
I2C_CLKDIV_VAL	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CLKDIV_VAL(/;"	d
I2C_CLK_DIV_VALUE	drivers/clk/rockchip/clk_rk3399.c	/^#define I2C_CLK_DIV_VALUE(/;"	d	file:
I2C_CLK_REG_MASK	drivers/clk/rockchip/clk_rk3399.c	/^#define I2C_CLK_REG_MASK(/;"	d	file:
I2C_CLK_REG_VALUE	drivers/clk/rockchip/clk_rk3399.c	/^#define I2C_CLK_REG_VALUE(/;"	d	file:
I2C_CNFG_NEW_MASTER_FSM_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_CNFG_NEW_MASTER_FSM_MASK	/;"	d
I2C_CNFG_NEW_MASTER_FSM_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_CNFG_NEW_MASTER_FSM_SHIFT	/;"	d
I2C_CNFG_PACKET_MODE_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_CNFG_PACKET_MODE_MASK	/;"	d
I2C_CNFG_PACKET_MODE_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_CNFG_PACKET_MODE_SHIFT	/;"	d
I2C_CNTL_1	include/radeon.h	/^#define I2C_CNTL_1	/;"	d
I2C_CNTRL1	include/tsi108.h	/^#define I2C_CNTRL1	/;"	d
I2C_CNTRL1_BYTADDR	include/tsi108.h	/^#define I2C_CNTRL1_BYTADDR	/;"	d
I2C_CNTRL1_DEVCODE	include/tsi108.h	/^#define I2C_CNTRL1_DEVCODE	/;"	d
I2C_CNTRL1_I2CWRITE	include/tsi108.h	/^#define I2C_CNTRL1_I2CWRITE	/;"	d
I2C_CNTRL1_PAGE	include/tsi108.h	/^#define I2C_CNTRL1_PAGE	/;"	d
I2C_CNTRL1_RESERVED	include/tsi108.h	/^#define I2C_CNTRL1_RESERVED	/;"	d
I2C_CNTRL1_RESET_VALUE	include/tsi108.h	/^#define I2C_CNTRL1_RESET_VALUE	/;"	d
I2C_CNTRL1_RWMASK	include/tsi108.h	/^#define I2C_CNTRL1_RWMASK	/;"	d
I2C_CNTRL2	include/tsi108.h	/^#define I2C_CNTRL2	/;"	d
I2C_CNTRL2_I2C_CFGERR	include/tsi108.h	/^#define I2C_CNTRL2_I2C_CFGERR	/;"	d
I2C_CNTRL2_I2C_CMPLT	include/tsi108.h	/^#define I2C_CNTRL2_I2C_CMPLT	/;"	d
I2C_CNTRL2_I2C_TO_ERR	include/tsi108.h	/^#define I2C_CNTRL2_I2C_TO_ERR	/;"	d
I2C_CNTRL2_LANE	include/tsi108.h	/^#define I2C_CNTRL2_LANE	/;"	d
I2C_CNTRL2_MULTIBYTE	include/tsi108.h	/^#define I2C_CNTRL2_MULTIBYTE	/;"	d
I2C_CNTRL2_RD_STATUS	include/tsi108.h	/^#define I2C_CNTRL2_RD_STATUS	/;"	d
I2C_CNTRL2_RESERVED	include/tsi108.h	/^#define I2C_CNTRL2_RESERVED	/;"	d
I2C_CNTRL2_RESET_VALUE	include/tsi108.h	/^#define I2C_CNTRL2_RESET_VALUE	/;"	d
I2C_CNTRL2_RWMASK	include/tsi108.h	/^#define I2C_CNTRL2_RWMASK	/;"	d
I2C_CNTRL2_SIZE	include/tsi108.h	/^#define I2C_CNTRL2_SIZE	/;"	d
I2C_CNTRL2_START	include/tsi108.h	/^#define I2C_CNTRL2_START	/;"	d
I2C_CNTRL2_WR_STATUS	include/tsi108.h	/^#define I2C_CNTRL2_WR_STATUS	/;"	d
I2C_COND_NORMAL	drivers/i2c/mv_i2c.h	/^#define I2C_COND_NORMAL	/;"	d
I2C_COND_START	drivers/i2c/mv_i2c.h	/^#define I2C_COND_START	/;"	d
I2C_COND_STOP	drivers/i2c/mv_i2c.h	/^#define I2C_COND_STOP	/;"	d
I2C_CON_ACTACK	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_ACTACK	/;"	d
I2C_CON_BE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_BE	/;"	d
I2C_CON_EN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_EN	/;"	d
I2C_CON_EN	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_EN	/;"	d
I2C_CON_EN	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_EN	/;"	d
I2C_CON_FREE	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_FREE	/;"	d
I2C_CON_LASTACK	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_LASTACK	/;"	d
I2C_CON_MASK	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_MASK	/;"	d
I2C_CON_MOD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_MOD(/;"	d
I2C_CON_MST	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_MST	/;"	d
I2C_CON_MST	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_MST	/;"	d
I2C_CON_START	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_START	/;"	d
I2C_CON_STB	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_STB	/;"	d
I2C_CON_STB	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_STB	/;"	d
I2C_CON_STOP	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_CON_STOP	/;"	d
I2C_CON_STP	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_STP	/;"	d
I2C_CON_STP	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_STP	/;"	d
I2C_CON_STT	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_STT	/;"	d
I2C_CON_STT	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_STT	/;"	d
I2C_CON_TRX	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_TRX	/;"	d
I2C_CON_TRX	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_TRX	/;"	d
I2C_CON_XA	drivers/i2c/davinci_i2c.h	/^#define I2C_CON_XA	/;"	d
I2C_CON_XA	drivers/i2c/omap24xx_i2c.h	/^#define I2C_CON_XA	/;"	d
I2C_CPLD_ADDR	board/birdland/bav335x/mux.c	/^#define I2C_CPLD_ADDR	/;"	d	file:
I2C_CPLD_ADDR	board/ti/am335x/mux.c	/^#define I2C_CPLD_ADDR	/;"	d	file:
I2C_CROS_EC_LDO	drivers/i2c/Kconfig	/^config I2C_CROS_EC_LDO$/;"	c	menu:I2C support
I2C_CROS_EC_TUNNEL	drivers/i2c/Kconfig	/^config I2C_CROS_EC_TUNNEL$/;"	c	menu:I2C support
I2C_CR_BCST	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_BCST	/;"	d
I2C_CR_BCST	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_BCST	/;"	d
I2C_CR_BIT6	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_BIT6	/;"	d
I2C_CR_MEN	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_MEN	/;"	d
I2C_CR_MEN	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_MEN	/;"	d
I2C_CR_MIEN	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_MIEN	/;"	d
I2C_CR_MIEN	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_MIEN	/;"	d
I2C_CR_MST	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_CR_MST	/;"	d	file:
I2C_CR_MSTA	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_MSTA	/;"	d
I2C_CR_MSTA	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_MSTA	/;"	d
I2C_CR_MTX	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_MTX	/;"	d
I2C_CR_MTX	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_MTX	/;"	d
I2C_CR_NACK	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_CR_NACK	/;"	d	file:
I2C_CR_RSTA	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_RSTA	/;"	d
I2C_CR_RSTA	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_RSTA	/;"	d
I2C_CR_STA	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_CR_STA	/;"	d	file:
I2C_CR_STO	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_CR_STO	/;"	d	file:
I2C_CR_TXAK	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_CR_TXAK	/;"	d
I2C_CR_TXAK	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_CR_TXAK	/;"	d
I2C_CTRL1_ACK_MODE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_ACK_MODE	/;"	d
I2C_CTRL1_BCAST_SLAVE_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_BCAST_SLAVE_EN	/;"	d
I2C_CTRL1_BUS_FREE_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_BUS_FREE_IRQ	/;"	d
I2C_CTRL1_BUS_FREE_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_BUS_FREE_IRQ_EN	/;"	d
I2C_CTRL1_CLR_GOT_A_NAK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_CLR_GOT_A_NAK	/;"	d
I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ	/;"	d
I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ_EN	/;"	d
I2C_CTRL1_EARLY_TERM_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_EARLY_TERM_IRQ	/;"	d
I2C_CTRL1_EARLY_TERM_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_EARLY_TERM_IRQ_EN	/;"	d
I2C_CTRL1_FORCE_CLK_IDLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_FORCE_CLK_IDLE	/;"	d
I2C_CTRL1_FORCE_DATA_IDLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_FORCE_DATA_IDLE	/;"	d
I2C_CTRL1_MASTER_LOSS_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_MASTER_LOSS_IRQ	/;"	d
I2C_CTRL1_MASTER_LOSS_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_MASTER_LOSS_IRQ_EN	/;"	d
I2C_CTRL1_NO_SLAVE_ACK_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_NO_SLAVE_ACK_IRQ	/;"	d
I2C_CTRL1_NO_SLAVE_ACK_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_NO_SLAVE_ACK_IRQ_EN	/;"	d
I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ	/;"	d
I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ_EN	/;"	d
I2C_CTRL1_RD_QUEUE_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_RD_QUEUE_IRQ	/;"	d
I2C_CTRL1_SLAVE_ADDRESS_BYTE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_SLAVE_ADDRESS_BYTE_MASK	/;"	d
I2C_CTRL1_SLAVE_ADDRESS_BYTE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_SLAVE_ADDRESS_BYTE_OFFSET	/;"	d
I2C_CTRL1_SLAVE_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_SLAVE_IRQ	/;"	d
I2C_CTRL1_SLAVE_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_SLAVE_IRQ_EN	/;"	d
I2C_CTRL1_SLAVE_STOP_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_SLAVE_STOP_IRQ	/;"	d
I2C_CTRL1_SLAVE_STOP_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_SLAVE_STOP_IRQ_EN	/;"	d
I2C_CTRL1_WR_QUEUE_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL1_WR_QUEUE_IRQ	/;"	d
I2C_CTRL_ACKNOWLEDGE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_ACKNOWLEDGE	/;"	d
I2C_CTRL_CLKGATE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_CLKGATE	/;"	d
I2C_CTRL_CLOCK_HELD	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_CLOCK_HELD	/;"	d
I2C_CTRL_DIRECTION	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_DIRECTION	/;"	d
I2C_CTRL_MASTER_MODE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_MASTER_MODE	/;"	d
I2C_CTRL_MULTI_MASTER	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_MULTI_MASTER	/;"	d
I2C_CTRL_POST_SEND_STOP	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_POST_SEND_STOP	/;"	d
I2C_CTRL_PREACK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_PREACK	/;"	d
I2C_CTRL_PRE_SEND_START	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_PRE_SEND_START	/;"	d
I2C_CTRL_RETAIN_CLOCK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_RETAIN_CLOCK	/;"	d
I2C_CTRL_RUN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_RUN	/;"	d
I2C_CTRL_SEND_NAK_ON_LAST	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_SEND_NAK_ON_LAST	/;"	d
I2C_CTRL_SFTRST	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_SFTRST	/;"	d
I2C_CTRL_SLAVE_ADDRESS_ENABLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_SLAVE_ADDRESS_ENABLE	/;"	d
I2C_CTRL_XFER_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_XFER_COUNT_MASK	/;"	d
I2C_CTRL_XFER_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_CTRL_XFER_COUNT_OFFSET	/;"	d
I2C_DATA_DATA_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DATA_DATA_MASK	/;"	d
I2C_DATA_DATA_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DATA_DATA_OFFSET	/;"	d
I2C_DEBUG0_CHANGE_TOGGLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_CHANGE_TOGGLE	/;"	d
I2C_DEBUG0_DMAENDCMD	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_DMAENDCMD	/;"	d
I2C_DEBUG0_DMAKICK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_DMAKICK	/;"	d
I2C_DEBUG0_DMAREQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_DMAREQ	/;"	d
I2C_DEBUG0_DMATERMINATE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_DMATERMINATE	/;"	d
I2C_DEBUG0_DMA_STATE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_DMA_STATE_MASK	/;"	d
I2C_DEBUG0_DMA_STATE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_DMA_STATE_OFFSET	/;"	d
I2C_DEBUG0_GRAB_TOGGLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_GRAB_TOGGLE	/;"	d
I2C_DEBUG0_SLAVE_HOLD_CLK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_SLAVE_HOLD_CLK	/;"	d
I2C_DEBUG0_START_TOGGLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_START_TOGGLE	/;"	d
I2C_DEBUG0_STATE_LATCH	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_STATE_LATCH	/;"	d
I2C_DEBUG0_STATE_STATE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_STATE_STATE_MASK	/;"	d
I2C_DEBUG0_STATE_STATE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_STATE_STATE_OFFSET	/;"	d
I2C_DEBUG0_STATE_VALUE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_STATE_VALUE_MASK	/;"	d
I2C_DEBUG0_STATE_VALUE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_STATE_VALUE_OFFSET	/;"	d
I2C_DEBUG0_STOP_TOGGLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG0_STOP_TOGGLE	/;"	d
I2C_DEBUG1_CLK_GEN_STATE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_CLK_GEN_STATE_MASK	/;"	d
I2C_DEBUG1_CLK_GEN_STATE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_CLK_GEN_STATE_OFFSET	/;"	d
I2C_DEBUG1_DMA_BYTE_ENABLES_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_DMA_BYTE_ENABLES_MASK	/;"	d
I2C_DEBUG1_DMA_BYTE_ENABLES_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_DMA_BYTE_ENABLES_OFFSET	/;"	d
I2C_DEBUG1_FORCE_ABR_LOSS	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_FORCE_ABR_LOSS	/;"	d
I2C_DEBUG1_FORCE_CLK_ON	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_FORCE_CLK_ON	/;"	d
I2C_DEBUG1_FORCE_I2C_CLK_OE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_FORCE_I2C_CLK_OE	/;"	d
I2C_DEBUG1_FORCE_I2C_DATA_OE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_FORCE_I2C_DATA_OE	/;"	d
I2C_DEBUG1_FORCE_RCV_ACK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_FORCE_RCV_ACK	/;"	d
I2C_DEBUG1_I2C_CLK_IN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_I2C_CLK_IN	/;"	d
I2C_DEBUG1_I2C_DATA_IN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_I2C_DATA_IN	/;"	d
I2C_DEBUG1_LOCAL_SLAVE_TEST	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_LOCAL_SLAVE_TEST	/;"	d
I2C_DEBUG1_LST_MODE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_LST_MODE_MASK	/;"	d
I2C_DEBUG1_LST_MODE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_DEBUG1_LST_MODE_OFFSET	/;"	d
I2C_DEBUG_REG	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^#define I2C_DEBUG_REG /;"	d	file:
I2C_DEFAULT_BASE	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define I2C_DEFAULT_BASE	/;"	d
I2C_DEFAULT_BASE	arch/arm/include/asm/arch-omap3/i2c.h	/^#define I2C_DEFAULT_BASE	/;"	d
I2C_DEFAULT_BASE	arch/arm/include/asm/arch-omap4/i2c.h	/^#define I2C_DEFAULT_BASE	/;"	d
I2C_DEFAULT_BASE	arch/arm/include/asm/arch-omap5/i2c.h	/^#define I2C_DEFAULT_BASE	/;"	d
I2C_DELAY	drivers/i2c/soft_i2c.c	/^#  define I2C_DELAY /;"	d	file:
I2C_DELAY	drivers/i2c/tsi108_i2c.c	/^#define I2C_DELAY	/;"	d	file:
I2C_DELAY	include/configs/TQM855M.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/TQM866M.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/TQM885D.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/bf533-ezkit.h	/^#define I2C_DELAY /;"	d
I2C_DELAY	include/configs/bf533-stamp.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/bf561-ezkit.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/ethernut5.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/hrcon.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/iocon.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/km/km_arm.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/km82xx.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/snapper9260.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/strider.h	/^#define I2C_DELAY	/;"	d
I2C_DELAY	include/configs/vct.h	/^#define I2C_DELAY	/;"	d
I2C_DFSRR	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_DFSRR	/;"	d
I2C_DFSRR_RES	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_DFSRR_RES	/;"	d
I2C_DFSRR_SHIFT	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_DFSRR_SHIFT	/;"	d
I2C_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	I2C_DIV_CON_MASK		= 0x7f,$/;"	e	enum:__anon06b9221d0103	file:
I2C_DPM_ADDR	include/configs/B4860QDS.h	/^#define I2C_DPM_ADDR	/;"	d
I2C_DR	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_DR	/;"	d
I2C_DR	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_DR	/;"	d
I2C_DREC_LAB	drivers/i2c/i2c-uniphier.c	/^#define I2C_DREC_LAB	/;"	d	file:
I2C_DREC_LRB	drivers/i2c/i2c-uniphier.c	/^#define I2C_DREC_LRB	/;"	d	file:
I2C_DREC_STS	drivers/i2c/i2c-uniphier.c	/^#define I2C_DREC_STS	/;"	d	file:
I2C_DR_RES	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_DR_RES	/;"	d
I2C_DR_RES	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_DR_RES	/;"	d
I2C_DR_SHIFT	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_DR_SHIFT	/;"	d
I2C_DR_SHIFT	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_DR_SHIFT	/;"	d
I2C_DTRM_NACK	drivers/i2c/i2c-uniphier.c	/^#define I2C_DTRM_NACK	/;"	d	file:
I2C_DTRM_RD	drivers/i2c/i2c-uniphier.c	/^#define I2C_DTRM_RD	/;"	d	file:
I2C_DTRM_STA	drivers/i2c/i2c-uniphier.c	/^#define I2C_DTRM_STA	/;"	d	file:
I2C_DTRM_STO	drivers/i2c/i2c-uniphier.c	/^#define I2C_DTRM_STO	/;"	d	file:
I2C_DTTX_CMD	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_DTTX_CMD	/;"	d	file:
I2C_DTTX_RD	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_DTTX_RD	/;"	d	file:
I2C_DUTY_MAX	drivers/i2c/adi_i2c.c	/^#define I2C_DUTY_MAX /;"	d	file:
I2C_DUTY_MIN	drivers/i2c/adi_i2c.c	/^#define I2C_DUTY_MIN /;"	d	file:
I2C_DVI_INPUT_DATA_FORMAT_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_INPUT_DATA_FORMAT_REG	/;"	d	file:
I2C_DVI_INPUT_DATA_FORMAT_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_INPUT_DATA_FORMAT_VAL	/;"	d	file:
I2C_DVI_LOCK_STATE_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_LOCK_STATE_REG	/;"	d	file:
I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL	/;"	d	file:
I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL	/;"	d	file:
I2C_DVI_PLL_CHARGE_CNTL_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_CHARGE_CNTL_REG	/;"	d	file:
I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL	/;"	d	file:
I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL	/;"	d	file:
I2C_DVI_PLL_DIVIDER_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_DIVIDER_REG	/;"	d	file:
I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL	/;"	d	file:
I2C_DVI_PLL_FILTER_LOW_SPEED_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_FILTER_LOW_SPEED_VAL	/;"	d	file:
I2C_DVI_PLL_FILTER_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_FILTER_REG	/;"	d	file:
I2C_DVI_PLL_SUPPLY_CNTL_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_PLL_SUPPLY_CNTL_REG	/;"	d	file:
I2C_DVI_POWER_MGMT_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_POWER_MGMT_REG	/;"	d	file:
I2C_DVI_POWER_MGMT_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_POWER_MGMT_VAL	/;"	d	file:
I2C_DVI_SYNC_POLARITY_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_SYNC_POLARITY_REG	/;"	d	file:
I2C_DVI_SYNC_POLARITY_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_SYNC_POLARITY_VAL	/;"	d	file:
I2C_DVI_TEST_PATTERN_REG	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_TEST_PATTERN_REG	/;"	d	file:
I2C_DVI_TEST_PATTERN_VAL	board/freescale/common/diu_ch7301.c	/^#define I2C_DVI_TEST_PATTERN_VAL	/;"	d	file:
I2C_EARLY_INIT_INDEX	drivers/i2c/mxc_i2c.c	/^#define I2C_EARLY_INIT_INDEX	/;"	d	file:
I2C_EDID	drivers/video/Kconfig	/^config I2C_EDID$/;"	c	menu:Graphics support
I2C_EDID_DEVICE_ADDR	arch/arm/mach-exynos/include/mach/dp.h	/^#define I2C_EDID_DEVICE_ADDR	/;"	d
I2C_EEPROM	drivers/misc/Kconfig	/^config I2C_EEPROM$/;"	c	menu:Multifunction device drivers
I2C_EEPROM_DEVCODE	include/tsi108.h	/^#define I2C_EEPROM_DEVCODE	/;"	d
I2C_EN	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_EN	/;"	d
I2C_EN	include/mpc5xxx.h	/^#define I2C_EN	/;"	d
I2C_ERR_READ	cmd/i2c.c	/^	I2C_ERR_READ,$/;"	e	enum:i2c_err_op	file:
I2C_ERR_WRITE	cmd/i2c.c	/^	I2C_ERR_WRITE,$/;"	e	enum:i2c_err_op	file:
I2C_E_EDID_DEVICE_ADDR	arch/arm/mach-exynos/include/mach/dp.h	/^#define I2C_E_EDID_DEVICE_ADDR	/;"	d
I2C_FASTSPEED_SCLH_TRIM	drivers/i2c/omap24xx_i2c.h	/^#define I2C_FASTSPEED_SCLH_TRIM	/;"	d
I2C_FASTSPEED_SCLL_TRIM	drivers/i2c/omap24xx_i2c.h	/^#define I2C_FASTSPEED_SCLL_TRIM	/;"	d
I2C_FAST_SPEED	drivers/i2c/designware_i2c.h	/^#define I2C_FAST_SPEED	/;"	d
I2C_FIFO_DEPTH	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_FIFO_DEPTH = 8,		\/* I2C fifo depth *\/$/;"	e	enum:__anon0c8a95970103
I2C_FPGA_IDX	include/configs/hrcon.h	/^#define I2C_FPGA_IDX	/;"	d
I2C_FPGA_IDX	include/configs/strider.h	/^#define I2C_FPGA_IDX	/;"	d
I2C_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define I2C_FREQ /;"	d
I2C_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define I2C_FREQ /;"	d
I2C_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define I2C_FREQ /;"	d
I2C_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define I2C_FREQ /;"	d
I2C_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define I2C_FREQ /;"	d
I2C_GET_BANK	board/freescale/t102xrdb/t102xrdb.c	/^	I2C_GET_BANK,$/;"	e	enum:__anonfc283aa30103	file:
I2C_GET_BUS	include/i2c.h	/^static inline unsigned int I2C_GET_BUS(void)$/;"	f	typeref:typename:unsigned int
I2C_GET_REG	drivers/i2c/ihs_i2c.c	/^#define I2C_GET_REG(/;"	d	file:
I2C_GLITCH_EN	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^#define I2C_GLITCH_EN /;"	d	file:
I2C_GPIO_SYNC	drivers/i2c/soft_i2c.c	/^#  define I2C_GPIO_SYNC$/;"	d	file:
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	drivers/i2c/omap24xx_i2c.h	/^#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	/;"	d
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	drivers/i2c/omap24xx_i2c.h	/^#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	/;"	d
I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM	drivers/i2c/omap24xx_i2c.h	/^#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM	/;"	d
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	drivers/i2c/omap24xx_i2c.h	/^#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	/;"	d
I2C_ICCR2_A	board/renesas/r0p7734/lowlevel_init.S	/^I2C_ICCR2_A: .long	0xFFC70001$/;"	l
I2C_ICCR2_D	board/renesas/r0p7734/lowlevel_init.S	/^I2C_ICCR2_D: .long	0x00$/;"	l
I2C_ICCR2_D1	board/renesas/r0p7734/lowlevel_init.S	/^I2C_ICCR2_D1: .long	0x20$/;"	l
I2C_ICR_INIT	drivers/i2c/mv_i2c.h	/^#define I2C_ICR_INIT	/;"	d
I2C_IEN	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_IEN	/;"	d
I2C_IEN	include/mpc5xxx.h	/^#define I2C_IEN	/;"	d
I2C_IE_AL_IE	drivers/i2c/davinci_i2c.h	/^#define I2C_IE_AL_IE	/;"	d
I2C_IE_AL_IE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IE_AL_IE	/;"	d
I2C_IE_ARDY_IE	drivers/i2c/davinci_i2c.h	/^#define I2C_IE_ARDY_IE	/;"	d
I2C_IE_ARDY_IE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IE_ARDY_IE	/;"	d
I2C_IE_GC_IE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IE_GC_IE	/;"	d
I2C_IE_NACK_IE	drivers/i2c/davinci_i2c.h	/^#define I2C_IE_NACK_IE	/;"	d
I2C_IE_NACK_IE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IE_NACK_IE	/;"	d
I2C_IE_RRDY_IE	drivers/i2c/davinci_i2c.h	/^#define I2C_IE_RRDY_IE	/;"	d
I2C_IE_RRDY_IE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IE_RRDY_IE	/;"	d
I2C_IE_SCD_IE	drivers/i2c/davinci_i2c.h	/^#define I2C_IE_SCD_IE	/;"	d
I2C_IE_XRDY_IE	drivers/i2c/davinci_i2c.h	/^#define I2C_IE_XRDY_IE	/;"	d
I2C_IE_XRDY_IE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IE_XRDY_IE	/;"	d
I2C_IF	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_IF	/;"	d
I2C_IF	include/mpc5xxx.h	/^#define I2C_IF	/;"	d
I2C_IFDR_DIV_CONSERVATIVE	drivers/i2c/mxc_i2c.c	/^#define I2C_IFDR_DIV_CONSERVATIVE	/;"	d	file:
I2C_INIT	drivers/i2c/soft_i2c.c	/^#  define I2C_INIT /;"	d	file:
I2C_INIT	include/configs/TQM855M.h	/^#define I2C_INIT	/;"	d
I2C_INIT	include/configs/TQM866M.h	/^#define I2C_INIT	/;"	d
I2C_INIT	include/configs/TQM885D.h	/^#define I2C_INIT	/;"	d
I2C_INIT	include/configs/ethernut5.h	/^#define I2C_INIT /;"	d
I2C_INIT	include/configs/snapper9260.h	/^#define I2C_INIT /;"	d
I2C_INIT	include/configs/vct.h	/^#define I2C_INIT	/;"	d
I2C_INIT_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_INIT_MASK	/;"	d
I2C_INIT_MASK	include/mpc5xxx.h	/^#define I2C_INIT_MASK	/;"	d
I2C_INTCODE_AL	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_AL	/;"	d
I2C_INTCODE_AL	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_AL	/;"	d
I2C_INTCODE_ARDY	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_ARDY	/;"	d
I2C_INTCODE_ARDY	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_ARDY	/;"	d
I2C_INTCODE_MASK	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_MASK	/;"	d
I2C_INTCODE_MASK	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_MASK	/;"	d
I2C_INTCODE_NAK	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_NAK	/;"	d
I2C_INTCODE_NAK	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_NAK	/;"	d
I2C_INTCODE_NONE	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_NONE	/;"	d
I2C_INTCODE_NONE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_NONE	/;"	d
I2C_INTCODE_RRDY	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_RRDY	/;"	d
I2C_INTCODE_RRDY	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_RRDY	/;"	d
I2C_INTCODE_SCD	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_SCD	/;"	d
I2C_INTCODE_XRDY	drivers/i2c/davinci_i2c.h	/^#define I2C_INTCODE_XRDY	/;"	d
I2C_INTCODE_XRDY	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTCODE_XRDY	/;"	d
I2C_INTERNAL_SAMPLING_CLK	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define I2C_INTERNAL_SAMPLING_CLK	/;"	d
I2C_INTERNAL_SAMPLING_CLK	drivers/i2c/omap24xx_i2c.h	/^#define I2C_INTERNAL_SAMPLING_CLK	/;"	d
I2C_INT_AL	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_INT_AL	/;"	d	file:
I2C_INT_ARBITRATION_LOST_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_INT_ARBITRATION_LOST_MASK	/;"	d
I2C_INT_ARBITRATION_LOST_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_INT_ARBITRATION_LOST_SHIFT	/;"	d
I2C_INT_NA	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_INT_NA	/;"	d	file:
I2C_INT_NO_ACK_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_INT_NO_ACK_MASK	/;"	d
I2C_INT_NO_ACK_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_INT_NO_ACK_SHIFT	/;"	d
I2C_INT_RB	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_INT_RB	/;"	d	file:
I2C_INT_TE	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_INT_TE	/;"	d	file:
I2C_INT_XFER_COMPLETE_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_INT_XFER_COMPLETE_MASK	/;"	d
I2C_INT_XFER_COMPLETE_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_INT_XFER_COMPLETE_SHIFT	/;"	d
I2C_IO_CFG_REG_0	board/Marvell/mvebu_db-88f3720/board.c	/^#define I2C_IO_CFG_REG_0	/;"	d	file:
I2C_IO_CFG_REG_0	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_CFG_REG_0	/;"	d	file:
I2C_IO_DATA_OUT_REG_0	board/Marvell/mvebu_db-88f3720/board.c	/^#define I2C_IO_DATA_OUT_REG_0	/;"	d	file:
I2C_IO_DATA_OUT_REG_0	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_DATA_OUT_REG_0	/;"	d	file:
I2C_IO_EXP_ADDR	board/Marvell/mvebu_db-88f3720/board.c	/^#define I2C_IO_EXP_ADDR	/;"	d	file:
I2C_IO_EXP_ADDR	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_EXP_ADDR	/;"	d	file:
I2C_IO_REG_0_SATA_OFF	board/Marvell/mvebu_db-88f3720/board.c	/^#define I2C_IO_REG_0_SATA_OFF	/;"	d	file:
I2C_IO_REG_0_USB_H0_CL	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_REG_0_USB_H0_CL	/;"	d	file:
I2C_IO_REG_0_USB_H0_OFF	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_REG_0_USB_H0_OFF	/;"	d	file:
I2C_IO_REG_0_USB_H1_CL	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_REG_0_USB_H1_CL	/;"	d	file:
I2C_IO_REG_0_USB_H1_OFF	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_REG_0_USB_H1_OFF	/;"	d	file:
I2C_IO_REG_0_USB_H_OFF	board/Marvell/mvebu_db-88f3720/board.c	/^#define I2C_IO_REG_0_USB_H_OFF	/;"	d	file:
I2C_IO_REG_CL	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_REG_CL	/;"	d	file:
I2C_IO_REG_VBUS	board/Marvell/mvebu_db-88f7040/board.c	/^#define I2C_IO_REG_VBUS	/;"	d	file:
I2C_IPD_ALL_CLEAN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_IPD_ALL_CLEAN /;"	d
I2C_IP_CLK	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define I2C_IP_CLK	/;"	d
I2C_IP_CLK	drivers/i2c/omap24xx_i2c.h	/^#define I2C_IP_CLK	/;"	d
I2C_ISR_INIT	drivers/i2c/mv_i2c.h	/^#define I2C_ISR_INIT	/;"	d
I2C_IS_10_BIT_ADDRESS	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_IS_10_BIT_ADDRESS = 0x2,	\/* for 10-bit I2C slave address *\/$/;"	e	enum:i2c_transaction_flags
I2C_IS_WRITE	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_IS_WRITE = 0x1,		\/* for I2C write operation *\/$/;"	e	enum:i2c_transaction_flags
I2C_MAX_OFFSET_LEN	drivers/i2c/i2c-uclass.c	/^#define I2C_MAX_OFFSET_LEN	/;"	d	file:
I2C_MAX_SPEED	drivers/i2c/designware_i2c.h	/^#define I2C_MAX_SPEED	/;"	d
I2C_MBRFIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MBRFIEN	/;"	d
I2C_MBRFIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MBRFIPD /;"	d
I2C_MBTFIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MBTFIEN	/;"	d
I2C_MBTFIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MBTFIPD /;"	d
I2C_MODE_MR	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_MODE_MR	/;"	d	file:
I2C_MODE_MT	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_MODE_MT	/;"	d	file:
I2C_MODE_RRX	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MODE_RRX	/;"	d
I2C_MODE_RX	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MODE_RX	/;"	d
I2C_MODE_TRX	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MODE_TRX	/;"	d
I2C_MODE_TX	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MODE_TX	/;"	d
I2C_MRXADDR_SET	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MRXADDR_SET(/;"	d
I2C_MRXRADDR_SET	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_MRXRADDR_SET(/;"	d
I2C_MULTI_BUS	include/i2c.h	/^# define I2C_MULTI_BUS	/;"	d
I2C_MUX	drivers/i2c/muxes/Kconfig	/^config I2C_MUX$/;"	c
I2C_MUX_CH5	include/configs/T102xQDS.h	/^#define I2C_MUX_CH5	/;"	d
I2C_MUX_CH5	include/configs/ls1012aqds.h	/^#define I2C_MUX_CH5	/;"	d
I2C_MUX_CH5	include/configs/ls1043aqds.h	/^#define I2C_MUX_CH5	/;"	d
I2C_MUX_CH5	include/configs/ls1046aqds.h	/^#define I2C_MUX_CH5	/;"	d
I2C_MUX_CH6	include/configs/ls1046aqds.h	/^#define I2C_MUX_CH6	/;"	d
I2C_MUX_CH7	include/configs/T102xQDS.h	/^#define I2C_MUX_CH7	/;"	d
I2C_MUX_CH7	include/configs/ls1012aqds.h	/^#define I2C_MUX_CH7	/;"	d
I2C_MUX_CH7	include/configs/ls1043aqds.h	/^#define I2C_MUX_CH7	/;"	d
I2C_MUX_CH7	include/configs/ls1046aqds.h	/^#define I2C_MUX_CH7	/;"	d
I2C_MUX_CH_CH7301	include/configs/ls1012aqds.h	/^#define I2C_MUX_CH_CH7301	/;"	d
I2C_MUX_CH_CH7301	include/configs/ls1021aqds.h	/^#define I2C_MUX_CH_CH7301	/;"	d
I2C_MUX_CH_CH7301	include/configs/ls1043aqds.h	/^#define I2C_MUX_CH_CH7301	/;"	d
I2C_MUX_CH_CH7301	include/configs/ls1046aqds.h	/^#define I2C_MUX_CH_CH7301	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/T102xQDS.h	/^#define I2C_MUX_CH_DEFAULT /;"	d
I2C_MUX_CH_DEFAULT	include/configs/T102xRDB.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/T1040QDS.h	/^#define I2C_MUX_CH_DEFAULT /;"	d
I2C_MUX_CH_DEFAULT	include/configs/T104xRDB.h	/^#define I2C_MUX_CH_DEFAULT /;"	d
I2C_MUX_CH_DEFAULT	include/configs/T208xQDS.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/T208xRDB.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/T4240QDS.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/T4240RDB.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/ls1012aqds.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/ls1021aqds.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/ls1043aqds.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/ls1046aqds.h	/^#define I2C_MUX_CH_DEFAULT	/;"	d
I2C_MUX_CH_DEFAULT	include/configs/ls2080aqds.h	/^#define I2C_MUX_CH_DEFAULT /;"	d
I2C_MUX_CH_DEFAULT	include/configs/ls2080ardb.h	/^#define I2C_MUX_CH_DEFAULT /;"	d
I2C_MUX_CH_DIU	include/configs/T102xQDS.h	/^#define I2C_MUX_CH_DIU	/;"	d
I2C_MUX_CH_DIU	include/configs/T1040QDS.h	/^#define I2C_MUX_CH_DIU	/;"	d
I2C_MUX_CH_DPM	include/configs/B4860QDS.h	/^#define I2C_MUX_CH_DPM	/;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/B4860QDS.h	/^#define I2C_MUX_CH_VOL_MONITOR	/;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/T208xQDS.h	/^#define I2C_MUX_CH_VOL_MONITOR /;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/T208xRDB.h	/^#define I2C_MUX_CH_VOL_MONITOR	/;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/T4240QDS.h	/^#define I2C_MUX_CH_VOL_MONITOR	/;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/T4240RDB.h	/^#define I2C_MUX_CH_VOL_MONITOR	/;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/ls1012aqds.h	/^#define I2C_MUX_CH_VOL_MONITOR /;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/ls1043aqds.h	/^#define I2C_MUX_CH_VOL_MONITOR /;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/ls1046aqds.h	/^#define I2C_MUX_CH_VOL_MONITOR /;"	d
I2C_MUX_CH_VOL_MONITOR	include/configs/ls2080ardb.h	/^#define I2C_MUX_CH_VOL_MONITOR	/;"	d
I2C_MUX_CH_VSC3316_BS	include/configs/T4240QDS.h	/^#define I2C_MUX_CH_VSC3316_BS	/;"	d
I2C_MUX_CH_VSC3316_BS	include/configs/T4240RDB.h	/^#define I2C_MUX_CH_VSC3316_BS	/;"	d
I2C_MUX_CH_VSC3316_FS	include/configs/T4240QDS.h	/^#define I2C_MUX_CH_VSC3316_FS	/;"	d
I2C_MUX_CH_VSC3316_FS	include/configs/T4240RDB.h	/^#define I2C_MUX_CH_VSC3316_FS	/;"	d
I2C_MUX_IO1_ADDR	include/configs/ls1012ardb.h	/^#define I2C_MUX_IO1_ADDR	/;"	d
I2C_MUX_PCA9540	include/i2c.h	/^#define I2C_MUX_PCA9540	/;"	d
I2C_MUX_PCA9540_ID	include/i2c.h	/^#define I2C_MUX_PCA9540_ID	/;"	d
I2C_MUX_PCA9542	include/i2c.h	/^#define I2C_MUX_PCA9542	/;"	d
I2C_MUX_PCA9542_ID	include/i2c.h	/^#define I2C_MUX_PCA9542_ID	/;"	d
I2C_MUX_PCA9544	include/i2c.h	/^#define I2C_MUX_PCA9544	/;"	d
I2C_MUX_PCA9544_ID	include/i2c.h	/^#define I2C_MUX_PCA9544_ID	/;"	d
I2C_MUX_PCA9547	include/i2c.h	/^#define I2C_MUX_PCA9547	/;"	d
I2C_MUX_PCA9547_ID	include/i2c.h	/^#define I2C_MUX_PCA9547_ID	/;"	d
I2C_MUX_PCA9548	include/i2c.h	/^#define I2C_MUX_PCA9548	/;"	d
I2C_MUX_PCA9548_ID	include/i2c.h	/^#define I2C_MUX_PCA9548_ID	/;"	d
I2C_MUX_PCA954x	drivers/i2c/muxes/Kconfig	/^config I2C_MUX_PCA954x$/;"	c
I2C_MUX_PCA_ADDR	include/configs/B4860QDS.h	/^#define I2C_MUX_PCA_ADDR /;"	d
I2C_MUX_PCA_ADDR	include/configs/T102xQDS.h	/^#define I2C_MUX_PCA_ADDR	/;"	d
I2C_MUX_PCA_ADDR	include/configs/T1040QDS.h	/^#define I2C_MUX_PCA_ADDR	/;"	d
I2C_MUX_PCA_ADDR	include/configs/T104xRDB.h	/^#define I2C_MUX_PCA_ADDR /;"	d
I2C_MUX_PCA_ADDR	include/configs/ls2080aqds.h	/^#define I2C_MUX_PCA_ADDR	/;"	d
I2C_MUX_PCA_ADDR	include/configs/ls2080ardb.h	/^#define I2C_MUX_PCA_ADDR	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/T102xQDS.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/T1040QDS.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/T208xQDS.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/T208xRDB.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/T4240QDS.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/T4240RDB.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/ls1012aqds.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/ls1021aqds.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/ls1043aqds.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/ls1046aqds.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/ls2080aqds.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_PRI	include/configs/ls2080ardb.h	/^#define I2C_MUX_PCA_ADDR_PRI	/;"	d
I2C_MUX_PCA_ADDR_SEC	include/configs/T102xQDS.h	/^#define I2C_MUX_PCA_ADDR_SEC /;"	d
I2C_MUX_PCA_ADDR_SEC	include/configs/T4240QDS.h	/^#define I2C_MUX_PCA_ADDR_SEC	/;"	d
I2C_MUX_PCA_ADDR_SEC	include/configs/T4240RDB.h	/^#define I2C_MUX_PCA_ADDR_SEC	/;"	d
I2C_MUX_PCA_ADDR_SEC	include/configs/ls1012aqds.h	/^#define I2C_MUX_PCA_ADDR_SEC	/;"	d
I2C_MUX_PCA_ADDR_SEC	include/configs/ls1043aqds.h	/^#define I2C_MUX_PCA_ADDR_SEC	/;"	d
I2C_MUX_PCA_ADDR_SEC	include/configs/ls1046aqds.h	/^#define I2C_MUX_PCA_ADDR_SEC	/;"	d
I2C_MUX_PCA_ADDR_SEC1	include/configs/T208xQDS.h	/^#define I2C_MUX_PCA_ADDR_SEC1	/;"	d
I2C_MUX_PCA_ADDR_SEC1	include/configs/T208xRDB.h	/^#define I2C_MUX_PCA_ADDR_SEC1	/;"	d
I2C_MUX_PCA_ADDR_SEC2	include/configs/T208xQDS.h	/^#define I2C_MUX_PCA_ADDR_SEC2	/;"	d
I2C_MUX_PCA_ADDR_SEC2	include/configs/T208xRDB.h	/^#define I2C_MUX_PCA_ADDR_SEC2	/;"	d
I2C_M_COMBO	drivers/i2c/adi_i2c.c	/^#define I2C_M_COMBO	/;"	d	file:
I2C_M_IGNORE_NAK	include/i2c.h	/^	I2C_M_IGNORE_NAK	= 0x1000, \/* continue after NAK *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_NOSTART	drivers/i2c/kona_i2c.c	/^#define I2C_M_NOSTART	/;"	d	file:
I2C_M_NOSTART	include/i2c.h	/^	I2C_M_NOSTART		= 0x4000, \/* no start before this message *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_NO_RD_ACK	include/i2c.h	/^	I2C_M_NO_RD_ACK		= 0x0800, \/* skip the Ack bit on reads *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_RD	drivers/i2c/kona_i2c.c	/^#define I2C_M_RD	/;"	d	file:
I2C_M_RD	include/i2c.h	/^	I2C_M_RD		= 0x0001, \/* read data, from slave to master *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_READ	drivers/i2c/adi_i2c.c	/^#define I2C_M_READ	/;"	d	file:
I2C_M_RECV_LEN	include/i2c.h	/^	I2C_M_RECV_LEN		= 0x0400, \/* length is first received byte *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_REV_DIR_ADDR	include/i2c.h	/^	I2C_M_REV_DIR_ADDR	= 0x2000, \/* invert polarity of R\/W bit *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_STOP	drivers/i2c/adi_i2c.c	/^#define I2C_M_STOP	/;"	d	file:
I2C_M_STOP	include/i2c.h	/^	I2C_M_STOP		= 0x8000, \/* send stop after this message *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_M_TEN	drivers/i2c/kona_i2c.c	/^#define I2C_M_TEN	/;"	d	file:
I2C_M_TEN	include/i2c.h	/^	I2C_M_TEN		= 0x0010, \/* ten-bit chip address *\/$/;"	e	enum:dm_i2c_msg_flags
I2C_NACK	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_NACK	/;"	d	file:
I2C_NAKRCVIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_NAKRCVIEN	/;"	d
I2C_NAKRCVIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_NAKRCVIPD /;"	d
I2C_NOACK	drivers/i2c/i2c-gpio.c	/^#define I2C_NOACK	/;"	d	file:
I2C_NOACK	drivers/i2c/soft_i2c.c	/^#define I2C_NOACK	/;"	d	file:
I2C_NOK	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_NOK	/;"	d	file:
I2C_NOK_LA	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_NOK_LA	/;"	d	file:
I2C_NOK_TOUT	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_NOK_TOUT	/;"	d	file:
I2C_NO_ACK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_NO_ACK = 0x8,		\/* for slave that won't generate ACK *\/$/;"	e	enum:i2c_transaction_flags
I2C_NO_STOP	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_NO_STOP = 0x20,$/;"	e	enum:i2c_transaction_flags
I2C_NULL_HOP	include/i2c.h	/^#define I2C_NULL_HOP	/;"	d
I2C_NUM	include/power/pmic.h	/^enum { I2C_PMIC, I2C_NUM, };$/;"	e	enum:__anon2d4d8a730203
I2C_OK	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_OK	/;"	d	file:
I2C_PAD	board/advantech/dms-ba16/dms-ba16.c	/^#define I2C_PAD /;"	d	file:
I2C_PAD	board/el/el6x/el6x.c	/^#define I2C_PAD /;"	d	file:
I2C_PAD	board/freescale/mx6sabresd/mx6sabresd.c	/^#define I2C_PAD /;"	d	file:
I2C_PAD	board/ge/bx50v3/bx50v3.c	/^#define I2C_PAD /;"	d	file:
I2C_PAD	board/phytec/pcm058/pcm058.c	/^#define I2C_PAD /;"	d	file:
I2C_PAD	board/tbs/tbs2910/tbs2910.c	/^#define I2C_PAD /;"	d	file:
I2C_PADS	arch/arm/include/asm/imx-common/mxc_i2c.h	/^#define I2C_PADS(/;"	d
I2C_PADS_INFO	arch/arm/include/asm/imx-common/mxc_i2c.h	/^#define I2C_PADS_INFO(/;"	d
I2C_PAD_CTRL	board/CarMediaLab/flea3/flea3.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/aristainetos/aristainetos.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/bachmann/ot1200/ot1200.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/barco/platinum/platinum.h	/^#define I2C_PAD_CTRL	/;"	d
I2C_PAD_CTRL	board/barco/titanium/titanium.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/boundary/nitrogen6x/nitrogen6x.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/compulab/cm_fx6/cm_fx6.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/denx/m53evk/m53evk.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/el/el6x/el6x.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/embest/mx6boards/mx6boards.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/freescale/mx25pdk/mx25pdk.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/freescale/mx35pdk/mx35pdk.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/freescale/mx53evk/mx53evk.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/freescale/mx53loco/mx53loco.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/freescale/mx6sabresd/mx6sabresd.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/freescale/mx6slevk/mx6slevk.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/gateworks/gw_ventana/common.h	/^#define I2C_PAD_CTRL /;"	d
I2C_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/inversepath/usbarmory/usbarmory.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/tbs/tbs2910/tbs2910.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/tqc/tqma6/tqma6.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/wandboard/wandboard.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL	board/warp/warp.c	/^#define I2C_PAD_CTRL /;"	d	file:
I2C_PAD_CTRL	board/warp7/warp7.c	/^#define I2C_PAD_CTRL	/;"	d	file:
I2C_PAD_CTRL_SCL	board/barco/platinum/platinum.h	/^#define I2C_PAD_CTRL_SCL	/;"	d
I2C_PCA6408_ADDR	include/configs/T102xRDB.h	/^#define I2C_PCA6408_ADDR	/;"	d
I2C_PCA6408_BUS_NUM	include/configs/T102xRDB.h	/^#define I2C_PCA6408_BUS_NUM	/;"	d
I2C_PCA9557_ADDR1	include/configs/P1010RDB.h	/^#define I2C_PCA9557_ADDR1	/;"	d
I2C_PCA9557_ADDR2	include/configs/P1010RDB.h	/^#define I2C_PCA9557_ADDR2	/;"	d
I2C_PCA9557_BUS_NUM	include/configs/P1010RDB.h	/^#define I2C_PCA9557_BUS_NUM	/;"	d
I2C_PINMUX	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^#define I2C_PINMUX(/;"	d
I2C_PINMUX	board/nvidia/cardhu/pinmux-config-cardhu.h	/^#define I2C_PINMUX(/;"	d
I2C_PINMUX	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define I2C_PINMUX(/;"	d
I2C_PINMUX	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^#define I2C_PINMUX(/;"	d
I2C_PINMUX	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^#define I2C_PINMUX(/;"	d
I2C_PMIC	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/el/el6x/el6x.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/freescale/mx6sabresd/mx6sabresd.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define I2C_PMIC /;"	d	file:
I2C_PMIC	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define I2C_PMIC /;"	d	file:
I2C_PMIC	board/warp/warp.c	/^#define I2C_PMIC	/;"	d	file:
I2C_PMIC	board/warp7/warp7.c	/^#define I2C_PMIC /;"	d	file:
I2C_PMIC	include/power/pmic.h	/^enum { I2C_PMIC, I2C_NUM, };$/;"	e	enum:__anon2d4d8a730203
I2C_PMUCLK_REG_MASK	drivers/clk/rockchip/clk_rk3399.c	/^#define I2C_PMUCLK_REG_MASK(/;"	d	file:
I2C_PMUCLK_REG_VALUE	drivers/clk/rockchip/clk_rk3399.c	/^#define I2C_PMUCLK_REG_VALUE(/;"	d	file:
I2C_PORT	include/configs/km82xx.h	/^#define I2C_PORT	/;"	d
I2C_PSC_MAX	drivers/i2c/omap24xx_i2c.h	/^#define I2C_PSC_MAX	/;"	d
I2C_PSC_MIN	drivers/i2c/omap24xx_i2c.h	/^#define I2C_PSC_MIN	/;"	d
I2C_QUEUECMD_ACKNOWLEDGE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_ACKNOWLEDGE	/;"	d
I2C_QUEUECMD_CLOCK_HELD	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_CLOCK_HELD	/;"	d
I2C_QUEUECMD_DIRECTION	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_DIRECTION	/;"	d
I2C_QUEUECMD_MASTER_MODE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_MASTER_MODE	/;"	d
I2C_QUEUECMD_MULTI_MASTER	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_MULTI_MASTER	/;"	d
I2C_QUEUECMD_POST_SEND_STOP	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_POST_SEND_STOP	/;"	d
I2C_QUEUECMD_PREACK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_PREACK	/;"	d
I2C_QUEUECMD_PRE_SEND_START	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_PRE_SEND_START	/;"	d
I2C_QUEUECMD_RETAIN_CLOCK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_RETAIN_CLOCK	/;"	d
I2C_QUEUECMD_SEND_NAK_ON_LAST	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_SEND_NAK_ON_LAST	/;"	d
I2C_QUEUECMD_SLAVE_ADDRESS_ENABLE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_SLAVE_ADDRESS_ENABLE	/;"	d
I2C_QUEUECMD_XFER_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_XFER_COUNT_MASK	/;"	d
I2C_QUEUECMD_XFER_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECMD_XFER_COUNT_OFFSET	/;"	d
I2C_QUEUECTRL_PIO_QUEUE_MODE	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_PIO_QUEUE_MODE	/;"	d
I2C_QUEUECTRL_QUEUE_RUN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_QUEUE_RUN	/;"	d
I2C_QUEUECTRL_RD_CLEAR	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_RD_CLEAR	/;"	d
I2C_QUEUECTRL_RD_QUEUE_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_RD_QUEUE_IRQ_EN	/;"	d
I2C_QUEUECTRL_RD_THRESH_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_RD_THRESH_MASK	/;"	d
I2C_QUEUECTRL_RD_THRESH_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_RD_THRESH_OFFSET	/;"	d
I2C_QUEUECTRL_WR_CLEAR	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_WR_CLEAR	/;"	d
I2C_QUEUECTRL_WR_QUEUE_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_WR_QUEUE_IRQ_EN	/;"	d
I2C_QUEUECTRL_WR_THRESH_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_WR_THRESH_MASK	/;"	d
I2C_QUEUECTRL_WR_THRESH_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUECTRL_WR_THRESH_OFFSET	/;"	d
I2C_QUEUEDATA_DATA_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUEDATA_DATA_MASK	/;"	d
I2C_QUEUEDATA_DATA_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUEDATA_DATA_OFFSET	/;"	d
I2C_QUEUESTAT_RD_QUEUE_CNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_RD_QUEUE_CNT_MASK	/;"	d
I2C_QUEUESTAT_RD_QUEUE_CNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_RD_QUEUE_CNT_OFFSET	/;"	d
I2C_QUEUESTAT_RD_QUEUE_EMPTY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_RD_QUEUE_EMPTY	/;"	d
I2C_QUEUESTAT_RD_QUEUE_FULL	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_RD_QUEUE_FULL	/;"	d
I2C_QUEUESTAT_WR_QUEUE_CNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_WR_QUEUE_CNT_MASK	/;"	d
I2C_QUEUESTAT_WR_QUEUE_CNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_WR_QUEUE_CNT_OFFSET	/;"	d
I2C_QUEUESTAT_WR_QUEUE_EMPTY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_WR_QUEUE_EMPTY	/;"	d
I2C_QUEUESTAT_WR_QUEUE_FULL	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_QUEUESTAT_WR_QUEUE_FULL	/;"	d
I2C_QUIRK_FLAG	drivers/i2c/mxc_i2c.c	/^#define I2C_QUIRK_FLAG	/;"	d	file:
I2C_QUIRK_REG	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^#define I2C_QUIRK_REG	/;"	d
I2C_QUIRK_REG	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^#define I2C_QUIRK_REG	/;"	d
I2C_QUIRK_REG	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define I2C_QUIRK_REG$/;"	d
I2C_QUIRK_REG	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define I2C_QUIRK_REG$/;"	d
I2C_RD	drivers/i2c/fti2c010.c	/^#define I2C_RD(/;"	d	file:
I2C_RD_DATA	include/tsi108.h	/^#define I2C_RD_DATA	/;"	d
I2C_RD_DATA_RBYTE0	include/tsi108.h	/^#define I2C_RD_DATA_RBYTE0	/;"	d
I2C_RD_DATA_RBYTE1	include/tsi108.h	/^#define I2C_RD_DATA_RBYTE1	/;"	d
I2C_RD_DATA_RBYTE2	include/tsi108.h	/^#define I2C_RD_DATA_RBYTE2	/;"	d
I2C_RD_DATA_RBYTE3	include/tsi108.h	/^#define I2C_RD_DATA_RBYTE3	/;"	d
I2C_RD_DATA_RESERVED	include/tsi108.h	/^#define I2C_RD_DATA_RESERVED	/;"	d
I2C_RD_DATA_RESET_VALUE	include/tsi108.h	/^#define I2C_RD_DATA_RESET_VALUE	/;"	d
I2C_RD_DATA_RWMASK	include/tsi108.h	/^#define I2C_RD_DATA_RWMASK	/;"	d
I2C_READ	drivers/i2c/davinci_i2c.h	/^#define I2C_READ	/;"	d
I2C_READ	drivers/i2c/mv_i2c.h	/^#define I2C_READ	/;"	d
I2C_READ	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_READ	/;"	d	file:
I2C_READ	drivers/i2c/soft_i2c.c	/^#  define I2C_READ /;"	d	file:
I2C_READ	include/configs/TQM855M.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/TQM866M.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/TQM885D.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/ethernut5.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/hrcon.h	/^#define I2C_READ /;"	d
I2C_READ	include/configs/iocon.h	/^#define I2C_READ /;"	d
I2C_READ	include/configs/km/km_arm.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/km82xx.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/snapper9260.h	/^#define I2C_READ	/;"	d
I2C_READ	include/configs/strider.h	/^#define I2C_READ /;"	d
I2C_READ	include/configs/vct.h	/^#define I2C_READ	/;"	d
I2C_READ_BANK	board/freescale/p1010rdb/p1010rdb.c	/^	I2C_READ_BANK,$/;"	e	enum:__anon3b5aaee90203	file:
I2C_READ_BIT	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2C_READ_BIT	/;"	d	file:
I2C_READ_BIT	drivers/i2c/fsl_i2c.c	/^#define I2C_READ_BIT /;"	d	file:
I2C_READ_PCB_VER	board/freescale/p1010rdb/p1010rdb.c	/^	I2C_READ_PCB_VER,$/;"	e	enum:__anon3b5aaee90203	file:
I2C_RETIMER_ADDR	include/configs/T102xQDS.h	/^#define I2C_RETIMER_ADDR	/;"	d
I2C_RETIMER_ADDR	include/configs/ls1012aqds.h	/^#define I2C_RETIMER_ADDR	/;"	d
I2C_RETIMER_ADDR	include/configs/ls1043aqds.h	/^#define I2C_RETIMER_ADDR	/;"	d
I2C_RETIMER_ADDR	include/configs/ls1046aqds.h	/^#define I2C_RETIMER_ADDR	/;"	d
I2C_RETIMER_ADDR	include/configs/ls1046ardb.h	/^#define I2C_RETIMER_ADDR	/;"	d
I2C_RETRIES	arch/powerpc/cpu/mpc512x/i2c.c	/^#define I2C_RETRIES	/;"	d	file:
I2C_RETRIES	arch/powerpc/cpu/mpc5xxx/i2c.c	/^#define I2C_RETRIES	/;"	d	file:
I2C_RETRY_COUNT	drivers/i2c/rk_i2c.c	/^#define I2C_RETRY_COUNT	/;"	d	file:
I2C_RSTA	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_RSTA	/;"	d
I2C_RSTA	include/mpc5xxx.h	/^#define I2C_RSTA	/;"	d
I2C_RST_RBRST	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_RST_RBRST	/;"	d	file:
I2C_RST_RST	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_RST_RST	/;"	d	file:
I2C_RST_TBRST	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_RST_TBRST	/;"	d	file:
I2C_RXAK	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_RXAK	/;"	d
I2C_RXAK	include/mpc5xxx.h	/^#define I2C_RXAK	/;"	d
I2C_RXTX_LEN	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2C_RXTX_LEN	/;"	d	file:
I2C_RXTX_LEN	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define I2C_RXTX_LEN /;"	d	file:
I2C_RXTX_LEN	cmd/eeprom.c	/^#define I2C_RXTX_LEN	/;"	d	file:
I2C_RXTX_LEN	include/i2c.h	/^#define I2C_RXTX_LEN	/;"	d
I2C_SCL	drivers/i2c/soft_i2c.c	/^#  define I2C_SCL(/;"	d	file:
I2C_SCL	include/configs/TQM855M.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/TQM866M.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/TQM885D.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/ethernut5.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/hrcon.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/iocon.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/km/km_arm.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/km82xx.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/snapper9260.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/strider.h	/^#define I2C_SCL(/;"	d
I2C_SCL	include/configs/vct.h	/^#define I2C_SCL(/;"	d
I2C_SCLH_HSSCLH	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLH_HSSCLH	/;"	d
I2C_SCLH_HSSCLH_M	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLH_HSSCLH_M	/;"	d
I2C_SCLH_HSSCLL_M	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLH_HSSCLL_M	/;"	d
I2C_SCLH_SCLH	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLH_SCLH	/;"	d
I2C_SCLH_SCLH_M	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLH_SCLH_M	/;"	d
I2C_SCLL_HSSCLL	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLL_HSSCLL	/;"	d
I2C_SCLL_SCLL	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLL_SCLL	/;"	d
I2C_SCLL_SCLL_M	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SCLL_SCLL_M	/;"	d
I2C_SCL_GPIO	include/configs/hrcon.h	/^#define I2C_SCL_GPIO	/;"	d
I2C_SCL_GPIO	include/configs/strider.h	/^#define I2C_SCL_GPIO	/;"	d
I2C_SDA	drivers/i2c/soft_i2c.c	/^#  define I2C_SDA(/;"	d	file:
I2C_SDA	include/configs/TQM855M.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/TQM866M.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/TQM885D.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/ethernut5.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/hrcon.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/iocon.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/km/km_arm.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/km82xx.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/snapper9260.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/strider.h	/^#define I2C_SDA(/;"	d
I2C_SDA	include/configs/vct.h	/^#define I2C_SDA(/;"	d
I2C_SDA_GPIO	include/configs/hrcon.h	/^#define I2C_SDA_GPIO	/;"	d
I2C_SDA_GPIO	include/configs/strider.h	/^#define I2C_SDA_GPIO	/;"	d
I2C_SEND_2_BYTES	arch/arm/mach-tegra/tegra30/cpu.c	/^#define I2C_SEND_2_BYTES	/;"	d	file:
I2C_SEND_2_BYTES	board/nvidia/p2571/max77620_init.h	/^#define I2C_SEND_2_BYTES	/;"	d
I2C_SEND_2_BYTES	board/nvidia/venice2/as3722_init.h	/^#define I2C_SEND_2_BYTES	/;"	d
I2C_SET_BANK0	board/freescale/t102xrdb/t102xrdb.c	/^	I2C_SET_BANK0,$/;"	e	enum:__anonfc283aa30103	file:
I2C_SET_BANK4	board/freescale/t102xrdb/t102xrdb.c	/^	I2C_SET_BANK4,$/;"	e	enum:__anonfc283aa30103	file:
I2C_SET_BUS	include/i2c.h	/^static inline void I2C_SET_BUS(unsigned int bus)$/;"	f	typeref:typename:void
I2C_SET_REG	drivers/i2c/ihs_i2c.c	/^#define I2C_SET_REG(/;"	d	file:
I2C_SL_CNFG_NEWSL_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_SL_CNFG_NEWSL_MASK	/;"	d
I2C_SL_CNFG_NEWSL_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define I2C_SL_CNFG_NEWSL_SHIFT	/;"	d
I2C_SOC_0	board/gdsys/p1022/controlcenterd-id.c	/^	I2C_SOC_0 = 0,$/;"	e	enum:__anonaa5ecaea0403	file:
I2C_SOC_1	board/gdsys/p1022/controlcenterd-id.c	/^	I2C_SOC_1 = 1,$/;"	e	enum:__anonaa5ecaea0403	file:
I2C_SOFTWARE_CONTROLLER	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_SOFTWARE_CONTROLLER	= 0x10,	\/* for I2C transfer using GPIO *\/$/;"	e	enum:i2c_transaction_flags
I2C_SOFT_DECLARATIONS	drivers/i2c/soft_i2c.c	/^#  define I2C_SOFT_DECLARATIONS	/;"	d	file:
I2C_SOFT_DECLARATIONS	drivers/i2c/soft_i2c.c	/^#  define I2C_SOFT_DECLARATIONS /;"	d	file:
I2C_SOFT_DECLARATIONS	drivers/i2c/soft_i2c.c	/^#  define I2C_SOFT_DECLARATIONS$/;"	d	file:
I2C_SOFT_DECLARATIONS	include/configs/ethernut5.h	/^#define I2C_SOFT_DECLARATIONS$/;"	d
I2C_SOFT_DECLARATIONS	include/configs/km/km_arm.h	/^#define I2C_SOFT_DECLARATIONS$/;"	d
I2C_SOFT_DECLARATIONS	include/configs/snapper9260.h	/^#define I2C_SOFT_DECLARATIONS$/;"	d
I2C_SOFT_DECLARATIONS	include/i2c.h	/^#  define I2C_SOFT_DECLARATIONS	/;"	d
I2C_SOFT_DECLARATIONS	include/i2c.h	/^#  define I2C_SOFT_DECLARATIONS /;"	d
I2C_SOFT_DECLARATIONS	include/i2c.h	/^#  define I2C_SOFT_DECLARATIONS$/;"	d
I2C_SOFT_DECLARATIONS10	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS10$/;"	d
I2C_SOFT_DECLARATIONS10	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS10$/;"	d
I2C_SOFT_DECLARATIONS11	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS11$/;"	d
I2C_SOFT_DECLARATIONS11	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS11$/;"	d
I2C_SOFT_DECLARATIONS12	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS12$/;"	d
I2C_SOFT_DECLARATIONS12	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS12$/;"	d
I2C_SOFT_DECLARATIONS2	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS2$/;"	d
I2C_SOFT_DECLARATIONS2	include/configs/iocon.h	/^#define I2C_SOFT_DECLARATIONS2$/;"	d
I2C_SOFT_DECLARATIONS2	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS2$/;"	d
I2C_SOFT_DECLARATIONS2	include/configs/trats2.h	/^#define I2C_SOFT_DECLARATIONS2$/;"	d
I2C_SOFT_DECLARATIONS3	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS3$/;"	d
I2C_SOFT_DECLARATIONS3	include/configs/iocon.h	/^#define I2C_SOFT_DECLARATIONS3$/;"	d
I2C_SOFT_DECLARATIONS3	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS3$/;"	d
I2C_SOFT_DECLARATIONS4	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS4$/;"	d
I2C_SOFT_DECLARATIONS4	include/configs/iocon.h	/^#define I2C_SOFT_DECLARATIONS4$/;"	d
I2C_SOFT_DECLARATIONS4	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS4$/;"	d
I2C_SOFT_DECLARATIONS5	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS5$/;"	d
I2C_SOFT_DECLARATIONS5	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS5$/;"	d
I2C_SOFT_DECLARATIONS6	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS6$/;"	d
I2C_SOFT_DECLARATIONS6	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS6$/;"	d
I2C_SOFT_DECLARATIONS7	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS7$/;"	d
I2C_SOFT_DECLARATIONS7	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS7$/;"	d
I2C_SOFT_DECLARATIONS8	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS8$/;"	d
I2C_SOFT_DECLARATIONS8	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS8$/;"	d
I2C_SOFT_DECLARATIONS9	include/configs/hrcon.h	/^#define I2C_SOFT_DECLARATIONS9$/;"	d
I2C_SOFT_DECLARATIONS9	include/configs/strider.h	/^#define I2C_SOFT_DECLARATIONS9$/;"	d
I2C_SPEED_MAX	drivers/i2c/adi_i2c.c	/^#define I2C_SPEED_MAX /;"	d	file:
I2C_SPEED_TO_DUTY	drivers/i2c/adi_i2c.c	/^#define I2C_SPEED_TO_DUTY(/;"	d	file:
I2C_SRW	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_SRW	/;"	d
I2C_SRW	include/mpc5xxx.h	/^#define I2C_SRW	/;"	d
I2C_SR_BB	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_SR_BB	/;"	d	file:
I2C_SR_BCSTM	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_BCSTM	/;"	d
I2C_SR_BCSTM	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_BCSTM	/;"	d
I2C_SR_DB	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_SR_DB	/;"	d	file:
I2C_SR_MAAS	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_MAAS	/;"	d
I2C_SR_MAAS	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_MAAS	/;"	d
I2C_SR_MAL	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_MAL	/;"	d
I2C_SR_MAL	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_MAL	/;"	d
I2C_SR_MBB	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_MBB	/;"	d
I2C_SR_MBB	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_MBB	/;"	d
I2C_SR_MCF	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_MCF	/;"	d
I2C_SR_MCF	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_MCF	/;"	d
I2C_SR_MIF	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_MIF	/;"	d
I2C_SR_MIF	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_MIF	/;"	d
I2C_SR_RFF	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_SR_RFF	/;"	d	file:
I2C_SR_RNE	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_SR_RNE	/;"	d	file:
I2C_SR_RXAK	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_RXAK	/;"	d
I2C_SR_RXAK	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_RXAK	/;"	d
I2C_SR_SRW	arch/m68k/include/asm/fsl_i2c.h	/^#define I2C_SR_SRW	/;"	d
I2C_SR_SRW	arch/powerpc/include/asm/fsl_i2c.h	/^#define I2C_SR_SRW	/;"	d
I2C_SR_TFE	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_SR_TFE	/;"	d	file:
I2C_SR_TNF	drivers/i2c/i2c-uniphier-f.c	/^#define I2C_SR_TNF	/;"	d	file:
I2C_STA	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_STA	/;"	d
I2C_STA	include/mpc5xxx.h	/^#define I2C_STA	/;"	d
I2C_STANDARD_SPEED	drivers/i2c/designware_i2c.h	/^#define I2C_STANDARD_SPEED	/;"	d
I2C_STARTIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_STARTIEN	/;"	d
I2C_STARTIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_STARTIPD /;"	d
I2C_START_STOP	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_START_STOP	/;"	d	file:
I2C_STAT_AAS	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_AAS	/;"	d
I2C_STAT_AAS	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_AAS	/;"	d
I2C_STAT_AL	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_AL	/;"	d
I2C_STAT_AL	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_AL	/;"	d
I2C_STAT_ANY_ENABLED_IRQ	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_ANY_ENABLED_IRQ	/;"	d
I2C_STAT_ARDY	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_ARDY	/;"	d
I2C_STAT_ARDY	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_ARDY	/;"	d
I2C_STAT_BB	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_BB	/;"	d
I2C_STAT_BB	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_BB	/;"	d
I2C_STAT_BUS_BUSY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_BUS_BUSY	/;"	d
I2C_STAT_BUS_FREE_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_BUS_FREE_IRQ_SUMMARY	/;"	d
I2C_STAT_CLK_GEN_BUSY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_CLK_GEN_BUSY	/;"	d
I2C_STAT_DATA_ENGINE_BUSY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_DATA_ENGINE_BUSY	/;"	d
I2C_STAT_DATA_ENGINE_CMPLT_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_DATA_ENGINE_CMPLT_IRQ_SUMMARY	/;"	d
I2C_STAT_DATA_ENGING_DMA_WAIT	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_DATA_ENGING_DMA_WAIT	/;"	d
I2C_STAT_EARLY_TERM_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_EARLY_TERM_IRQ_SUMMARY	/;"	d
I2C_STAT_GC	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_GC	/;"	d
I2C_STAT_GOT_A_NAK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_GOT_A_NAK	/;"	d
I2C_STAT_MASTER_LOSS_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_MASTER_LOSS_IRQ_SUMMARY	/;"	d
I2C_STAT_MASTER_PRESENT	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_MASTER_PRESENT	/;"	d
I2C_STAT_NACK	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_NACK	/;"	d
I2C_STAT_NACK	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_NACK	/;"	d
I2C_STAT_NO_SLAVE_ACK_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_NO_SLAVE_ACK_IRQ_SUMMARY	/;"	d
I2C_STAT_OVERSIZE_XFER_TERM_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_OVERSIZE_XFER_TERM_IRQ_SUMMARY	/;"	d
I2C_STAT_RCVD_SLAVE_ADDR_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_RCVD_SLAVE_ADDR_MASK	/;"	d
I2C_STAT_RCVD_SLAVE_ADDR_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_RCVD_SLAVE_ADDR_OFFSET	/;"	d
I2C_STAT_ROVR	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_ROVR	/;"	d
I2C_STAT_ROVR	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_ROVR	/;"	d
I2C_STAT_RRDY	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_RRDY	/;"	d
I2C_STAT_RRDY	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_RRDY	/;"	d
I2C_STAT_SBD	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_SBD	/;"	d
I2C_STAT_SCD	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_SCD	/;"	d
I2C_STAT_SLAVE_ADDR_EQ_ZERO	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_ADDR_EQ_ZERO	/;"	d
I2C_STAT_SLAVE_BUSY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_BUSY	/;"	d
I2C_STAT_SLAVE_FOUND	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_FOUND	/;"	d
I2C_STAT_SLAVE_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_IRQ_SUMMARY	/;"	d
I2C_STAT_SLAVE_PRESENT	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_PRESENT	/;"	d
I2C_STAT_SLAVE_SEARCHING	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_SEARCHING	/;"	d
I2C_STAT_SLAVE_STOP_IRQ_SUMMARY	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_STAT_SLAVE_STOP_IRQ_SUMMARY	/;"	d
I2C_STAT_XRDY	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_XRDY	/;"	d
I2C_STAT_XRDY	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_XRDY	/;"	d
I2C_STAT_XUDF	drivers/i2c/davinci_i2c.h	/^#define I2C_STAT_XUDF	/;"	d
I2C_STAT_XUDF	drivers/i2c/omap24xx_i2c.h	/^#define I2C_STAT_XUDF	/;"	d
I2C_STOPDET_TO	drivers/i2c/designware_i2c.h	/^#define I2C_STOPDET_TO	/;"	d
I2C_STOPIEN	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_STOPIEN	/;"	d
I2C_STOPIPD	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define I2C_STOPIPD /;"	d
I2C_SYSS_RDONE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSS_RDONE /;"	d
I2C_SYSTEST_FREE	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_FREE	/;"	d
I2C_SYSTEST_SCL_I	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_SCL_I	/;"	d
I2C_SYSTEST_SCL_O	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_SCL_O	/;"	d
I2C_SYSTEST_SDA_I	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_SDA_I	/;"	d
I2C_SYSTEST_SDA_O	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_SDA_O	/;"	d
I2C_SYSTEST_ST_EN	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_ST_EN	/;"	d
I2C_SYSTEST_TMODE_MASK	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_TMODE_MASK	/;"	d
I2C_SYSTEST_TMODE_SHIFT	drivers/i2c/omap24xx_i2c.h	/^#define I2C_SYSTEST_TMODE_SHIFT	/;"	d
I2C_TIMEOUT	arch/powerpc/cpu/mpc512x/i2c.c	/^#define I2C_TIMEOUT	/;"	d	file:
I2C_TIMEOUT	arch/powerpc/cpu/mpc5xxx/i2c.c	/^#define I2C_TIMEOUT	/;"	d	file:
I2C_TIMEOUT	drivers/i2c/adi_i2c.c	/^#define I2C_TIMEOUT /;"	d	file:
I2C_TIMEOUT	drivers/i2c/davinci_i2c.h	/^#define I2C_TIMEOUT	/;"	d
I2C_TIMEOUT	drivers/i2c/kona_i2c.c	/^#define I2C_TIMEOUT	/;"	d	file:
I2C_TIMEOUT	drivers/i2c/omap24xx_i2c.c	/^#define I2C_TIMEOUT	/;"	d	file:
I2C_TIMEOUT_MS	drivers/i2c/at91_i2c.c	/^#define I2C_TIMEOUT_MS	/;"	d	file:
I2C_TIMEOUT_MS	drivers/i2c/rk_i2c.c	/^#define I2C_TIMEOUT_MS	/;"	d	file:
I2C_TIMEOUT_MS	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_TIMEOUT_MS /;"	d	file:
I2C_TIMEOUT_USEC	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_TIMEOUT_USEC = 10000,	\/* Wait time for completion *\/$/;"	e	enum:__anon0c8a95970103
I2C_TIMING0_HIGH_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING0_HIGH_COUNT_MASK	/;"	d
I2C_TIMING0_HIGH_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING0_HIGH_COUNT_OFFSET	/;"	d
I2C_TIMING0_RCV_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING0_RCV_COUNT_MASK	/;"	d
I2C_TIMING0_RCV_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING0_RCV_COUNT_OFFSET	/;"	d
I2C_TIMING1_LOW_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING1_LOW_COUNT_MASK	/;"	d
I2C_TIMING1_LOW_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING1_LOW_COUNT_OFFSET	/;"	d
I2C_TIMING1_XMIT_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING1_XMIT_COUNT_MASK	/;"	d
I2C_TIMING1_XMIT_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING1_XMIT_COUNT_OFFSET	/;"	d
I2C_TIMING2_BUS_FREE_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING2_BUS_FREE_MASK	/;"	d
I2C_TIMING2_BUS_FREE_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING2_BUS_FREE_OFFSET	/;"	d
I2C_TIMING2_LEADIN_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING2_LEADIN_COUNT_MASK	/;"	d
I2C_TIMING2_LEADIN_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_TIMING2_LEADIN_COUNT_OFFSET	/;"	d
I2C_TRISTATE	drivers/i2c/soft_i2c.c	/^#  define I2C_TRISTATE /;"	d	file:
I2C_TRISTATE	include/configs/TQM855M.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/TQM866M.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/TQM885D.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/ethernut5.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/hrcon.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/iocon.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/km/km_arm.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/km82xx.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/snapper9260.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/strider.h	/^#define I2C_TRISTATE	/;"	d
I2C_TRISTATE	include/configs/vct.h	/^#define I2C_TRISTATE	/;"	d
I2C_TX	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_TX	/;"	d
I2C_TX	include/mpc5xxx.h	/^#define I2C_TX	/;"	d
I2C_TXAK	arch/powerpc/include/asm/immap_512x.h	/^#define I2C_TXAK	/;"	d
I2C_TXAK	include/mpc5xxx.h	/^#define I2C_TXAK	/;"	d
I2C_TXRX_ENA	drivers/i2c/s3c24x0_i2c.c	/^#define I2C_TXRX_ENA	/;"	d	file:
I2C_TX_DATA	include/tsi108.h	/^#define I2C_TX_DATA	/;"	d
I2C_TX_DATA_RESERVED	include/tsi108.h	/^#define I2C_TX_DATA_RESERVED	/;"	d
I2C_TX_DATA_RESET_VALUE	include/tsi108.h	/^#define I2C_TX_DATA_RESET_VALUE	/;"	d
I2C_TX_DATA_RWMASK	include/tsi108.h	/^#define I2C_TX_DATA_RWMASK	/;"	d
I2C_TX_DATA_TBYTE0	include/tsi108.h	/^#define I2C_TX_DATA_TBYTE0	/;"	d
I2C_TX_DATA_TBYTE1	include/tsi108.h	/^#define I2C_TX_DATA_TBYTE1	/;"	d
I2C_TX_DATA_TBYTE2	include/tsi108.h	/^#define I2C_TX_DATA_TBYTE2	/;"	d
I2C_TX_DATA_TBYTE3	include/tsi108.h	/^#define I2C_TX_DATA_TBYTE3	/;"	d
I2C_USE_REPEATED_START	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	I2C_USE_REPEATED_START = 0x4,	\/* for repeat start *\/$/;"	e	enum:i2c_transaction_flags
I2C_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_VERSION_MAJOR_MASK	/;"	d
I2C_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_VERSION_MAJOR_OFFSET	/;"	d
I2C_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_VERSION_MINOR_MASK	/;"	d
I2C_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_VERSION_MINOR_OFFSET	/;"	d
I2C_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_VERSION_STEP_MASK	/;"	d
I2C_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define	I2C_VERSION_STEP_OFFSET	/;"	d
I2C_VOL_MONITOR_ADDR	include/configs/B4860QDS.h	/^#define I2C_VOL_MONITOR_ADDR	/;"	d
I2C_VOL_MONITOR_ADDR	include/configs/T208xQDS.h	/^#define I2C_VOL_MONITOR_ADDR /;"	d
I2C_VOL_MONITOR_ADDR	include/configs/T4240QDS.h	/^#define I2C_VOL_MONITOR_ADDR	/;"	d
I2C_VOL_MONITOR_ADDR	include/configs/T4240RDB.h	/^#define I2C_VOL_MONITOR_ADDR	/;"	d
I2C_VOL_MONITOR_ADDR	include/configs/ls1012aqds.h	/^#define I2C_VOL_MONITOR_ADDR /;"	d
I2C_VOL_MONITOR_ADDR	include/configs/ls1043aqds.h	/^#define I2C_VOL_MONITOR_ADDR /;"	d
I2C_VOL_MONITOR_ADDR	include/configs/ls1046aqds.h	/^#define I2C_VOL_MONITOR_ADDR /;"	d
I2C_VOL_MONITOR_ADDR	include/configs/ls2080ardb.h	/^#define I2C_VOL_MONITOR_ADDR	/;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/B4860QDS.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET	/;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/T208xQDS.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET /;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/T4240QDS.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET	/;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/T4240RDB.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET	/;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/ls1012aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET /;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/ls1043aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET /;"	d
I2C_VOL_MONITOR_BUS_V_OFFSET	include/configs/ls1046aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_OFFSET /;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/B4860QDS.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF	/;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/T208xQDS.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF /;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/T4240QDS.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF	/;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/T4240RDB.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF	/;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/ls1012aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF /;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/ls1043aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF /;"	d
I2C_VOL_MONITOR_BUS_V_OVF	include/configs/ls1046aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_OVF /;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/B4860QDS.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT	/;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/T208xQDS.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT /;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/T4240QDS.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT	/;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/T4240RDB.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT	/;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/ls1012aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT /;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/ls1043aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT /;"	d
I2C_VOL_MONITOR_BUS_V_SHIFT	include/configs/ls1046aqds.h	/^#define I2C_VOL_MONITOR_BUS_V_SHIFT /;"	d
I2C_WAIT	drivers/i2c/omap24xx_i2c.c	/^#define I2C_WAIT	/;"	d	file:
I2C_WR	drivers/i2c/fti2c010.c	/^#define I2C_WR(/;"	d	file:
I2C_WRITE	drivers/i2c/davinci_i2c.h	/^#define I2C_WRITE	/;"	d
I2C_WRITE	drivers/i2c/mv_i2c.h	/^#define I2C_WRITE	/;"	d
I2C_WRITE	drivers/i2c/s3c24x0_i2c.c	/^#define	I2C_WRITE	/;"	d	file:
I2C_WRITE_BIT	arch/powerpc/cpu/mpc8260/i2c.c	/^#define I2C_WRITE_BIT	/;"	d	file:
I2C_WRITE_BIT	drivers/i2c/fsl_i2c.c	/^#define I2C_WRITE_BIT /;"	d	file:
I2DR	drivers/i2c/mxc_i2c.c	/^#define I2DR	/;"	d	file:
I2MOD_EN	include/mpc8xx.h	/^#define I2MOD_EN	/;"	d
I2MOD_FLT	include/mpc8xx.h	/^#define I2MOD_FLT	/;"	d
I2MOD_GCD	include/mpc8xx.h	/^#define I2MOD_GCD	/;"	d
I2MOD_PDIV16	include/mpc8xx.h	/^#define I2MOD_PDIV16	/;"	d
I2MOD_PDIV32	include/mpc8xx.h	/^#define I2MOD_PDIV32	/;"	d
I2MOD_PDIV4	include/mpc8xx.h	/^#define I2MOD_PDIV4	/;"	d
I2MOD_PDIV8	include/mpc8xx.h	/^#define I2MOD_PDIV8	/;"	d
I2MOD_REVD	include/mpc8xx.h	/^#define I2MOD_REVD	/;"	d
I2S	drivers/sound/Kconfig	/^config I2S$/;"	c	menu:Sound support
I2SAC97_RACC	include/faraday/ftpmu010.h	/^	unsigned int	I2SAC97_RACC;	\/* 0xBC *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
I2SR	drivers/i2c/mxc_i2c.c	/^#define I2SR	/;"	d	file:
I2SR_IAL	drivers/i2c/mxc_i2c.c	/^#define I2SR_IAL	/;"	d	file:
I2SR_IBB	drivers/i2c/mxc_i2c.c	/^#define I2SR_IBB	/;"	d	file:
I2SR_ICF	drivers/i2c/mxc_i2c.c	/^#define I2SR_ICF	/;"	d	file:
I2SR_IIF	drivers/i2c/mxc_i2c.c	/^#define I2SR_IIF	/;"	d	file:
I2SR_IIF_CLEAR	drivers/i2c/mxc_i2c.c	/^#define I2SR_IIF_CLEAR	/;"	d	file:
I2SR_RX_NO_AK	drivers/i2c/mxc_i2c.c	/^#define I2SR_RX_NO_AK	/;"	d	file:
I2S_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define I2S_BASE	/;"	d
I2S_BFS	arch/arm/mach-exynos/include/mach/sound.h	/^#define I2S_BFS	/;"	d
I2S_BITS_PER_SAMPLE	arch/arm/mach-exynos/include/mach/sound.h	/^#define I2S_BITS_PER_SAMPLE	/;"	d
I2S_CHANNELS	arch/arm/mach-exynos/include/mach/sound.h	/^#define I2S_CHANNELS	/;"	d
I2S_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG /;"	d
I2S_CONFIG_FM_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_FM_BIT /;"	d
I2S_CONFIG_FM_I2S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_FM_I2S /;"	d
I2S_CONFIG_FM_LJ	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_FM_LJ /;"	d
I2S_CONFIG_FM_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_FM_MASK /;"	d
I2S_CONFIG_FM_RJ	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_FM_RJ /;"	d
I2S_CONFIG_IC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_IC /;"	d
I2S_CONFIG_LB	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_LB /;"	d
I2S_CONFIG_PD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_PD /;"	d
I2S_CONFIG_RE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_RE /;"	d
I2S_CONFIG_RF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_RF /;"	d
I2S_CONFIG_RN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_RN /;"	d
I2S_CONFIG_RO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_RO /;"	d
I2S_CONFIG_RR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_RR /;"	d
I2S_CONFIG_RU	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_RU /;"	d
I2S_CONFIG_SZ_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_SZ_BIT /;"	d
I2S_CONFIG_SZ_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_SZ_MASK /;"	d
I2S_CONFIG_TE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_TE /;"	d
I2S_CONFIG_TF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_TF /;"	d
I2S_CONFIG_TN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_TN /;"	d
I2S_CONFIG_TR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_TR /;"	d
I2S_CONFIG_XO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_XO /;"	d
I2S_CONFIG_XU	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONFIG_XU /;"	d
I2S_CONTROL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONTROL /;"	d
I2S_CONTROL_CE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONTROL_CE /;"	d
I2S_CONTROL_D	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_CONTROL_D /;"	d
I2S_DATA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_DATA /;"	d
I2S_DATA_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define I2S_DATA_MASK /;"	d
I2S_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define I2S_OFFSET	/;"	d
I2S_PLL_CLK	arch/arm/mach-exynos/include/mach/sound.h	/^#define I2S_PLL_CLK	/;"	d
I2S_RFS	arch/arm/mach-exynos/include/mach/sound.h	/^#define I2S_RFS	/;"	d
I2S_SAMPLING_RATE	arch/arm/mach-exynos/include/mach/sound.h	/^#define I2S_SAMPLING_RATE	/;"	d
I2S_SAMSUNG	drivers/sound/Kconfig	/^config I2S_SAMSUNG$/;"	c	menu:Sound support
I2S_TX_OFF	include/i2s.h	/^#define I2S_TX_OFF	/;"	d
I2S_TX_ON	include/i2s.h	/^#define I2S_TX_ON	/;"	d
I32	fs/jffs2/compr_lzo.c	/^#define I32 /;"	d	file:
I32_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	I32_reg_t I32_reg;$/;"	m	union:__anon39451e6d070a	typeref:typename:I32_reg_t
I32_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^} I32_reg_t;$/;"	t	typeref:struct:__anon39451e6d0108
I32_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^} I32_reg_t;$/;"	t	typeref:struct:__anon39451e6d0408
I440FX_PAM	arch/x86/include/asm/arch-qemu/qemu.h	/^#define I440FX_PAM	/;"	d
I440FX_VGA	arch/x86/include/asm/arch-qemu/device.h	/^#define I440FX_VGA	/;"	d
I8	fs/jffs2/compr_lzo.c	/^#define I8 /;"	d	file:
I8042_CMD_REG	include/i8042.h	/^#define I8042_CMD_REG	/;"	d
I8042_DATA_REG	include/i8042.h	/^#define I8042_DATA_REG	/;"	d
I8042_KEYB	drivers/input/Kconfig	/^config I8042_KEYB$/;"	c
I8042_STS_REG	include/i8042.h	/^#define I8042_STS_REG	/;"	d
I8254_TIMER	arch/x86/Kconfig	/^config I8254_TIMER$/;"	c	menu:x86 architecture
I82559_DUMP	drivers/net/eepro100.c	/^#define I82559_DUMP	/;"	d	file:
I82559_DUMP_WAKEUP	drivers/net/eepro100.c	/^#define I82559_DUMP_WAKEUP	/;"	d	file:
I82559_RESET	drivers/net/eepro100.c	/^#define I82559_RESET	/;"	d	file:
I82559_SELECTIVE_RESET	drivers/net/eepro100.c	/^#define I82559_SELECTIVE_RESET	/;"	d	file:
I82559_SELFTEST	drivers/net/eepro100.c	/^#define I82559_SELFTEST	/;"	d	file:
I8259_PIC	arch/x86/Kconfig	/^config I8259_PIC$/;"	c	menu:x86 architecture
I8_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	I8_reg_t I8_reg;$/;"	m	union:__anon39451e6d070a	typeref:typename:I8_reg_t
I8_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^} I8_reg_t;$/;"	t	typeref:struct:__anon39451e6d0308
I8_reg_t	drivers/bios_emulator/include/x86emu/regs.h	/^} I8_reg_t;$/;"	t	typeref:struct:__anon39451e6d0608
IA32_ENERGY_PERFORMANCE_BIAS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IA32_ENERGY_PERFORMANCE_BIAS	/;"	d
IA32_MC0_STATUS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IA32_MC0_STATUS	/;"	d
IA32_MISC_ENABLE	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IA32_MISC_ENABLE	/;"	d
IA32_PACKAGE_THERM_INTERRUPT	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IA32_PACKAGE_THERM_INTERRUPT	/;"	d
IA32_PERF_CTL	arch/x86/include/asm/cpu_common.h	/^#define IA32_PERF_CTL	/;"	d
IA32_PLATFORM_DCA_CAP	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IA32_PLATFORM_DCA_CAP	/;"	d
IA32_THERM_INTERRUPT	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IA32_THERM_INTERRUPT	/;"	d
IABR	arch/powerpc/include/asm/processor.h	/^#define IABR	/;"	d
IAC1	arch/powerpc/include/asm/processor.h	/^#define IAC1	/;"	d
IAC2	arch/powerpc/include/asm/processor.h	/^#define IAC2	/;"	d
IAC3	arch/powerpc/include/asm/processor.h	/^#define IAC3	/;"	d
IAC4	arch/powerpc/include/asm/processor.h	/^#define IAC4	/;"	d
IACR_ADDR_MASK	drivers/net/ks8851_mll.h	/^#define IACR_ADDR_MASK	/;"	d
IACR_ADDR_SHIFT	drivers/net/ks8851_mll.h	/^#define IACR_ADDR_SHIFT	/;"	d
IACR_RDEN	drivers/net/ks8851_mll.h	/^#define IACR_RDEN	/;"	d
IACR_TSEL_MASK	drivers/net/ks8851_mll.h	/^#define IACR_TSEL_MASK	/;"	d
IACR_TSEL_MIB	drivers/net/ks8851_mll.h	/^#define IACR_TSEL_MIB	/;"	d
IACR_TSEL_SHIFT	drivers/net/ks8851_mll.h	/^#define IACR_TSEL_SHIFT	/;"	d
IADR	drivers/i2c/mxc_i2c.c	/^#define IADR	/;"	d	file:
IAR	arch/powerpc/include/asm/xilinx_irq.h	/^#define IAR	/;"	d
IARB	include/sym53c8xx.h	/^  #define   IARB /;"	d
IAV	common/dlmalloc.c	/^#define IAV(/;"	d	file:
IAlloc_Alloc	lib/lzma/Types.h	/^#define IAlloc_Alloc(/;"	d
IAlloc_Free	lib/lzma/Types.h	/^#define IAlloc_Free(/;"	d
IB62x0_OE_HIGH	board/raidsonic/ib62x0/ib62x0.h	/^#define IB62x0_OE_HIGH	/;"	d
IB62x0_OE_LOW	board/raidsonic/ib62x0/ib62x0.h	/^#define IB62x0_OE_LOW	/;"	d
IB62x0_OE_VAL_HIGH	board/raidsonic/ib62x0/ib62x0.h	/^#define IB62x0_OE_VAL_HIGH	/;"	d
IB62x0_OE_VAL_LOW	board/raidsonic/ib62x0/ib62x0.h	/^#define IB62x0_OE_VAL_LOW	/;"	d
IBAT0	arch/powerpc/include/asm/mmu.h	/^	IBAT0 = 0, IBAT1, IBAT2, IBAT3,$/;"	e	enum:__anon7751fa290103
IBAT0L	arch/powerpc/include/asm/processor.h	/^#define IBAT0L	/;"	d
IBAT0U	arch/powerpc/include/asm/processor.h	/^#define IBAT0U	/;"	d
IBAT1	arch/powerpc/include/asm/mmu.h	/^	IBAT0 = 0, IBAT1, IBAT2, IBAT3,$/;"	e	enum:__anon7751fa290103
IBAT1L	arch/powerpc/include/asm/processor.h	/^#define IBAT1L	/;"	d
IBAT1U	arch/powerpc/include/asm/processor.h	/^#define IBAT1U	/;"	d
IBAT2	arch/powerpc/include/asm/mmu.h	/^	IBAT0 = 0, IBAT1, IBAT2, IBAT3,$/;"	e	enum:__anon7751fa290103
IBAT2L	arch/powerpc/include/asm/processor.h	/^#define IBAT2L	/;"	d
IBAT2U	arch/powerpc/include/asm/processor.h	/^#define IBAT2U	/;"	d
IBAT3	arch/powerpc/include/asm/mmu.h	/^	IBAT0 = 0, IBAT1, IBAT2, IBAT3,$/;"	e	enum:__anon7751fa290103
IBAT3L	arch/powerpc/include/asm/processor.h	/^#define IBAT3L	/;"	d
IBAT3U	arch/powerpc/include/asm/processor.h	/^#define IBAT3U	/;"	d
IBAT4	arch/powerpc/include/asm/mmu.h	/^	IBAT4, IBAT5, IBAT6, IBAT7,$/;"	e	enum:__anon7751fa290103
IBAT4L	arch/powerpc/include/asm/processor.h	/^#define IBAT4L	/;"	d
IBAT4U	arch/powerpc/include/asm/processor.h	/^#define IBAT4U	/;"	d
IBAT5	arch/powerpc/include/asm/mmu.h	/^	IBAT4, IBAT5, IBAT6, IBAT7,$/;"	e	enum:__anon7751fa290103
IBAT5L	arch/powerpc/include/asm/processor.h	/^#define IBAT5L	/;"	d
IBAT5U	arch/powerpc/include/asm/processor.h	/^#define IBAT5U	/;"	d
IBAT6	arch/powerpc/include/asm/mmu.h	/^	IBAT4, IBAT5, IBAT6, IBAT7,$/;"	e	enum:__anon7751fa290103
IBAT6L	arch/powerpc/include/asm/processor.h	/^#define IBAT6L	/;"	d
IBAT6U	arch/powerpc/include/asm/processor.h	/^#define IBAT6U	/;"	d
IBAT7	arch/powerpc/include/asm/mmu.h	/^	IBAT4, IBAT5, IBAT6, IBAT7,$/;"	e	enum:__anon7751fa290103
IBAT7L	arch/powerpc/include/asm/processor.h	/^#define IBAT7L	/;"	d
IBAT7U	arch/powerpc/include/asm/processor.h	/^#define IBAT7U	/;"	d
IBNR_A	board/renesas/rsk7264/lowlevel_init.S	/^IBNR_A:		.long 0xFFFE080E$/;"	l
IBNR_A	board/renesas/rsk7269/lowlevel_init.S	/^IBNR_A:		.long 0xFFFE080E$/;"	l
IBNR_D	board/renesas/rsk7264/lowlevel_init.S	/^IBNR_D:	.word 0x0000$/;"	l
IBNR_D	board/renesas/rsk7269/lowlevel_init.S	/^IBNR_D:		.word 0x0000$/;"	l
IBREAKA	arch/xtensa/include/asm/regs.h	/^#define IBREAKA	/;"	d
IBR_DEF_ATTRIB	tools/kwbimage.h	/^#define IBR_DEF_ATTRIB	/;"	d
IBR_HDR_ECC_DEFAULT	tools/kwbimage.h	/^#define IBR_HDR_ECC_DEFAULT	/;"	d
IBR_HDR_ECC_DISABLED	tools/kwbimage.h	/^#define IBR_HDR_ECC_DISABLED /;"	d
IBR_HDR_ECC_FORCED_HAMMING	tools/kwbimage.h	/^#define IBR_HDR_ECC_FORCED_HAMMING	/;"	d
IBR_HDR_ECC_FORCED_RS	tools/kwbimage.h	/^#define IBR_HDR_ECC_FORCED_RS /;"	d
IBR_HDR_I2C_ID	tools/kwbimage.h	/^#define IBR_HDR_I2C_ID	/;"	d
IBR_HDR_NAND_ID	tools/kwbimage.h	/^#define IBR_HDR_NAND_ID	/;"	d
IBR_HDR_PEX_ID	tools/kwbimage.h	/^#define IBR_HDR_PEX_ID	/;"	d
IBR_HDR_SATA_ID	tools/kwbimage.h	/^#define IBR_HDR_SATA_ID	/;"	d
IBR_HDR_SPI_ID	tools/kwbimage.h	/^#define IBR_HDR_SPI_ID	/;"	d
IBR_HDR_UART_ID	tools/kwbimage.h	/^#define IBR_HDR_UART_ID	/;"	d
IByteIn	lib/lzma/Types.h	/^} IByteIn;$/;"	t	typeref:struct:__anonf2a2f1b90108
IByteOut	lib/lzma/Types.h	/^} IByteOut;$/;"	t	typeref:struct:__anonf2a2f1b90208
IC0_ASSIGNCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_ASSIGNCLR /;"	d
IC0_ASSIGNRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_ASSIGNRD /;"	d
IC0_ASSIGNSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_ASSIGNSET /;"	d
IC0_CFG0CLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG0CLR /;"	d
IC0_CFG0RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG0RD /;"	d
IC0_CFG0SET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG0SET /;"	d
IC0_CFG1CLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG1CLR /;"	d
IC0_CFG1RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG1RD /;"	d
IC0_CFG1SET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG1SET /;"	d
IC0_CFG2CLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG2CLR /;"	d
IC0_CFG2RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG2RD /;"	d
IC0_CFG2SET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_CFG2SET /;"	d
IC0_FALLINGCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_FALLINGCLR /;"	d
IC0_FALLINGRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_FALLINGRD /;"	d
IC0_MASKCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_MASKCLR /;"	d
IC0_MASKRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_MASKRD /;"	d
IC0_MASKSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_MASKSET /;"	d
IC0_REQ0INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_REQ0INT /;"	d
IC0_REQ1INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_REQ1INT /;"	d
IC0_RISINGCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_RISINGCLR /;"	d
IC0_RISINGRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_RISINGRD /;"	d
IC0_SRCCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_SRCCLR /;"	d
IC0_SRCRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_SRCRD /;"	d
IC0_SRCSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_SRCSET /;"	d
IC0_TESTBIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_TESTBIT /;"	d
IC0_WAKECLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_WAKECLR /;"	d
IC0_WAKERD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_WAKERD /;"	d
IC0_WAKESET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC0_WAKESET /;"	d
IC1_ASSIGNCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_ASSIGNCLR /;"	d
IC1_ASSIGNRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_ASSIGNRD /;"	d
IC1_ASSIGNSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_ASSIGNSET /;"	d
IC1_CFG0CLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG0CLR /;"	d
IC1_CFG0RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG0RD /;"	d
IC1_CFG0SET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG0SET /;"	d
IC1_CFG1CLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG1CLR /;"	d
IC1_CFG1RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG1RD /;"	d
IC1_CFG1SET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG1SET /;"	d
IC1_CFG2CLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG2CLR /;"	d
IC1_CFG2RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG2RD /;"	d
IC1_CFG2SET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_CFG2SET /;"	d
IC1_FALLINGCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_FALLINGCLR /;"	d
IC1_FALLINGRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_FALLINGRD /;"	d
IC1_MASKCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_MASKCLR /;"	d
IC1_MASKRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_MASKRD /;"	d
IC1_MASKSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_MASKSET /;"	d
IC1_REQ0INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_REQ0INT /;"	d
IC1_REQ1INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_REQ1INT /;"	d
IC1_RISINGCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_RISINGCLR /;"	d
IC1_RISINGRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_RISINGRD /;"	d
IC1_SRCCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_SRCCLR /;"	d
IC1_SRCRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_SRCRD /;"	d
IC1_SRCSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_SRCSET /;"	d
IC1_TESTBIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_TESTBIT /;"	d
IC1_WAKECLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_WAKECLR /;"	d
IC1_WAKERD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_WAKERD /;"	d
IC1_WAKESET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IC1_WAKESET /;"	d
IC2_FDR	arch/m68k/include/asm/fsl_i2c.h	/^#define IC2_FDR	/;"	d
IC2_FDR	arch/powerpc/include/asm/fsl_i2c.h	/^#define IC2_FDR	/;"	d
IC2_FDR_RES	arch/m68k/include/asm/fsl_i2c.h	/^#define IC2_FDR_RES	/;"	d
IC2_FDR_RES	arch/powerpc/include/asm/fsl_i2c.h	/^#define IC2_FDR_RES	/;"	d
IC2_FDR_SHIFT	arch/m68k/include/asm/fsl_i2c.h	/^#define IC2_FDR_SHIFT	/;"	d
IC2_FDR_SHIFT	arch/powerpc/include/asm/fsl_i2c.h	/^#define IC2_FDR_SHIFT	/;"	d
ICACHE	arch/mips/include/asm/cachectl.h	/^#define	ICACHE	/;"	d
ICACHE	arch/nds32/include/asm/cache.h	/^enum cache_t {ICACHE, DCACHE};$/;"	e	enum:cache_t
ICACHE_LINE_SIZE	arch/nios2/cpu/start.S	/^#define ICACHE_LINE_SIZE	/;"	d	file:
ICACHE_SIZE_MAX	arch/nios2/cpu/start.S	/^#define ICACHE_SIZE_MAX	/;"	d	file:
ICACHE_STATUS	include/configs/M5208EVBE.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M52277EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5235EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5249EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5253DEMO.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5253EVBE.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5272C3.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5275EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5282EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M53017EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5329EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5373EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M54418TWR.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M54451EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M54455EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5475EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/M5485EVB.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/amcore.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/astro_mcf5373l.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/cobra5272.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_STATUS	include/configs/eb_cpu5282.h	/^#define ICACHE_STATUS	/;"	d
ICACHE_WAY_SHIFT	arch/xtensa/include/asm/cacheasm.h	/^#define ICACHE_WAY_SHIFT /;"	d
ICACHE_WAY_SIZE	arch/xtensa/include/asm/cacheasm.h	/^#define ICACHE_WAY_SIZE /;"	d
ICAC_LOOP	arch/nds32/cpu/n1213/start.S	/^ICAC_LOOP:$/;"	l
ICAC_MEM_KBF_ISET	arch/nds32/cpu/n1213/start.S	/^#define ICAC_MEM_KBF_ISET	/;"	d	file:
ICAC_MEM_KBF_ISZ	arch/nds32/cpu/n1213/start.S	/^#define ICAC_MEM_KBF_ISZ	/;"	d	file:
ICAC_MEM_KBF_IWAY	arch/nds32/cpu/n1213/start.S	/^#define ICAC_MEM_KBF_IWAY	/;"	d	file:
ICCCI	arch/powerpc/include/asm/mmu.h	/^#define ICCCI(/;"	d
ICCH0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICCH0 /;"	d
ICCH1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICCH1 /;"	d
ICCICR	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define ICCICR	/;"	d
ICCL0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICCL0 /;"	d
ICCL1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICCL1 /;"	d
ICCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICCR	/;"	d
ICCR	include/SA-1100.h	/^#define ICCR	/;"	d
ICCR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICCR0	/;"	d
ICCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICCR0 /;"	d
ICCR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICCR1	/;"	d
ICCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICCR1 /;"	d
ICCR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICCR2	/;"	d
ICCR_15BIT	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define ICCR_15BIT /;"	d	file:
ICCR_CACHE	arch/powerpc/include/asm/processor.h	/^#define   ICCR_CACHE	/;"	d
ICCR_DIM	include/SA-1100.h	/^#define ICCR_DIM	/;"	d
ICCR_IdleAllInt	include/SA-1100.h	/^#define ICCR_IdleAllInt	/;"	d
ICCR_IdleMskInt	include/SA-1100.h	/^#define ICCR_IdleMskInt	/;"	d
ICCR_NOCACHE	arch/powerpc/include/asm/processor.h	/^#define   ICCR_NOCACHE	/;"	d
ICC_API_VERSION_LYNXPOINT	arch/x86/include/asm/arch-broadwell/me.h	/^#define ICC_API_VERSION_LYNXPOINT	/;"	d
ICC_ASGI1R_EL1	arch/arm/include/asm/gic.h	/^#define ICC_ASGI1R_EL1	/;"	d
ICC_BPR0_EL1	arch/arm/include/asm/gic.h	/^#define ICC_BPR0_EL1	/;"	d
ICC_BPR1_EL1	arch/arm/include/asm/gic.h	/^#define ICC_BPR1_EL1	/;"	d
ICC_CTLR_EL1	arch/arm/include/asm/gic.h	/^#define ICC_CTLR_EL1	/;"	d
ICC_CTLR_EL3	arch/arm/include/asm/gic.h	/^#define ICC_CTLR_EL3	/;"	d
ICC_DIR_EL1	arch/arm/include/asm/gic.h	/^#define ICC_DIR_EL1	/;"	d
ICC_EOIR0_EL1	arch/arm/include/asm/gic.h	/^#define ICC_EOIR0_EL1	/;"	d
ICC_EOIR1_EL1	arch/arm/include/asm/gic.h	/^#define ICC_EOIR1_EL1	/;"	d
ICC_HPPIR0_EL1	arch/arm/include/asm/gic.h	/^#define ICC_HPPIR0_EL1	/;"	d
ICC_HPPIR1_EL1	arch/arm/include/asm/gic.h	/^#define ICC_HPPIR1_EL1	/;"	d
ICC_IAR0_EL1	arch/arm/include/asm/gic.h	/^#define ICC_IAR0_EL1	/;"	d
ICC_IAR1_EL1	arch/arm/include/asm/gic.h	/^#define ICC_IAR1_EL1	/;"	d
ICC_IGRPEN0_EL1	arch/arm/include/asm/gic.h	/^#define ICC_IGRPEN0_EL1	/;"	d
ICC_IGRPEN1_EL1	arch/arm/include/asm/gic.h	/^#define ICC_IGRPEN1_EL1	/;"	d
ICC_IGRPEN1_EL3	arch/arm/include/asm/gic.h	/^#define ICC_IGRPEN1_EL3	/;"	d
ICC_PMR_EL1	arch/arm/include/asm/gic.h	/^#define ICC_PMR_EL1	/;"	d
ICC_RPR_EL1	arch/arm/include/asm/gic.h	/^#define ICC_RPR_EL1	/;"	d
ICC_SEIEN_EL1	arch/arm/include/asm/gic.h	/^#define ICC_SEIEN_EL1	/;"	d
ICC_SET_CLOCK_ENABLES	arch/x86/include/asm/arch-broadwell/me.h	/^#define ICC_SET_CLOCK_ENABLES	/;"	d
ICC_SGI0R_EL1	arch/arm/include/asm/gic.h	/^#define ICC_SGI0R_EL1	/;"	d
ICC_SGI1R_EL1	arch/arm/include/asm/gic.h	/^#define ICC_SGI1R_EL1	/;"	d
ICC_SRE_EL1	arch/arm/include/asm/gic.h	/^#define ICC_SRE_EL1	/;"	d
ICC_SRE_EL2	arch/arm/include/asm/gic.h	/^#define ICC_SRE_EL2	/;"	d
ICC_SRE_EL3	arch/arm/include/asm/gic.h	/^#define ICC_SRE_EL3	/;"	d
ICD0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICD0 /;"	d
ICD1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICD1 /;"	d
ICDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICDR	/;"	d
ICDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICDR0 /;"	d
ICDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICDR1 /;"	d
ICE_GPIO_DDR_VTT_EN	board/ti/am335x/board.c	/^#define ICE_GPIO_DDR_VTT_EN	/;"	d	file:
ICE_MASK	arch/arm/include/asm/omap_mmc.h	/^#define ICE_MASK	/;"	d
ICE_OSCILLATE	arch/arm/include/asm/omap_mmc.h	/^#define ICE_OSCILLATE	/;"	d
ICE_STOP	arch/arm/include/asm/omap_mmc.h	/^#define ICE_STOP	/;"	d
ICFP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICFP	/;"	d
ICFP	include/SA-1100.h	/^#define ICFP	/;"	d
ICFP2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICFP2	/;"	d
ICH9_PM	arch/x86/include/asm/arch-qemu/device.h	/^#define ICH9_PM	/;"	d
ICHP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICHP	/;"	d
ICHRG0	include/mc13892.h	/^#define ICHRG0	/;"	d
ICHRG1	include/mc13892.h	/^#define ICHRG1	/;"	d
ICHRG2	include/mc13892.h	/^#define ICHRG2	/;"	d
ICHRG3	include/mc13892.h	/^#define ICHRG3	/;"	d
ICHV_7	drivers/spi/ich.h	/^	ICHV_7,$/;"	e	enum:ich_version
ICHV_9	drivers/spi/ich.h	/^	ICHV_9,$/;"	e	enum:ich_version
ICH_FLASH_FADDR	drivers/net/e1000.h	/^#define ICH_FLASH_FADDR /;"	d
ICH_FLASH_FDATA0	drivers/net/e1000.h	/^#define ICH_FLASH_FDATA0 /;"	d
ICH_FLASH_FPR0	drivers/net/e1000.h	/^#define ICH_FLASH_FPR0 /;"	d
ICH_FLASH_FPR1	drivers/net/e1000.h	/^#define ICH_FLASH_FPR1 /;"	d
ICH_FLASH_FRACC	drivers/net/e1000.h	/^#define ICH_FLASH_FRACC /;"	d
ICH_FLASH_FREG0	drivers/net/e1000.h	/^#define ICH_FLASH_FREG0 /;"	d
ICH_FLASH_FREG1	drivers/net/e1000.h	/^#define ICH_FLASH_FREG1 /;"	d
ICH_FLASH_FREG2	drivers/net/e1000.h	/^#define ICH_FLASH_FREG2 /;"	d
ICH_FLASH_FREG3	drivers/net/e1000.h	/^#define ICH_FLASH_FREG3 /;"	d
ICH_FLASH_GFPREG	drivers/net/e1000.h	/^#define ICH_FLASH_GFPREG /;"	d
ICH_FLASH_HSFCTL	drivers/net/e1000.h	/^#define ICH_FLASH_HSFCTL /;"	d
ICH_FLASH_HSFSTS	drivers/net/e1000.h	/^#define ICH_FLASH_HSFSTS /;"	d
ICH_FLASH_LINEAR_ADDR_MASK	drivers/net/e1000.h	/^#define ICH_FLASH_LINEAR_ADDR_MASK /;"	d
ICH_FLASH_OPMENU	drivers/net/e1000.h	/^#define ICH_FLASH_OPMENU /;"	d
ICH_FLASH_OPTYPE	drivers/net/e1000.h	/^#define ICH_FLASH_OPTYPE /;"	d
ICH_FLASH_PREOP	drivers/net/e1000.h	/^#define ICH_FLASH_PREOP /;"	d
ICH_FLASH_REG_MAPSIZE	drivers/net/e1000.h	/^#define ICH_FLASH_REG_MAPSIZE /;"	d
ICH_FLASH_SECTOR_SIZE	drivers/net/e1000.h	/^#define ICH_FLASH_SECTOR_SIZE /;"	d
ICH_FLASH_SSFCTL	drivers/net/e1000.h	/^#define ICH_FLASH_SSFCTL /;"	d
ICH_FLASH_SSFSTS	drivers/net/e1000.h	/^#define ICH_FLASH_SSFSTS /;"	d
ICH_GFPREG_BASE_MASK	drivers/net/e1000.h	/^#define ICH_GFPREG_BASE_MASK /;"	d
ICH_MAX_CMD_LEN	drivers/spi/ich.h	/^	ICH_MAX_CMD_LEN		= 5,$/;"	e	enum:__anon07fadeb80603
ICH_SPI	drivers/spi/Kconfig	/^config ICH_SPI$/;"	c	menu:SPI Support
ICIC0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICIC0 /;"	d
ICIC1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICIC1 /;"	d
ICIP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICIP	/;"	d
ICIP	include/SA-1100.h	/^#define ICIP	/;"	d
ICIP2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICIP2	/;"	d
ICK_CAM_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define ICK_CAM_ON	/;"	d
ICK_CORE1_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define ICK_CORE1_ON	/;"	d
ICK_CORE2_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define ICK_CORE2_ON	/;"	d
ICK_DSS_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define ICK_DSS_ON	/;"	d
ICK_WKUP_ON	arch/arm/include/asm/arch-omap3/clock.h	/^#define ICK_WKUP_ON	/;"	d
ICLKGEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define ICLKGEN /;"	d
ICLK_MASK	drivers/clk/clk_pic32.c	/^#define ICLK_MASK	/;"	d	file:
ICLR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICLR	/;"	d
ICLR	include/SA-1100.h	/^#define ICLR	/;"	d
ICLR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICLR2	/;"	d
ICLR_FIQ	include/SA-1100.h	/^#define ICLR_FIQ	/;"	d
ICLR_IRQ	include/SA-1100.h	/^#define ICLR_IRQ	/;"	d
ICMP	arch/powerpc/include/asm/processor.h	/^#define ICMP	/;"	d
ICMP_ECHO_REPLY	include/net.h	/^#define ICMP_ECHO_REPLY	/;"	d
ICMP_ECHO_REQUEST	include/net.h	/^#define ICMP_ECHO_REQUEST	/;"	d
ICMP_HDR_SIZE	include/net.h	/^#define ICMP_HDR_SIZE	/;"	d
ICMP_NOT_REACH	include/net.h	/^#define ICMP_NOT_REACH	/;"	d
ICMP_NOT_REACH_PORT	include/net.h	/^#define ICMP_NOT_REACH_PORT	/;"	d
ICMP_REDIRECT	include/net.h	/^#define ICMP_REDIRECT	/;"	d
ICMP_REDIR_HOST	include/net.h	/^#define ICMP_REDIR_HOST	/;"	d
ICMP_REDIR_NET	include/net.h	/^#define ICMP_REDIR_NET	/;"	d
ICMR	arch/arm/cpu/sa1100/start.S	/^#define ICMR	/;"	d	file:
ICMR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICMR	/;"	d
ICMR	include/SA-1100.h	/^#define ICMR	/;"	d
ICMR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICMR2	/;"	d
ICM_CFG_MSK_ISZ	arch/nds32/include/asm/cache.h	/^#define ICM_CFG_MSK_ISZ	/;"	d
ICM_CFG_OFF_ISZ	arch/nds32/include/asm/cache.h	/^#define ICM_CFG_OFF_ISZ	/;"	d
ICONFA1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ICONFA1(/;"	d
ICONFA2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ICONFA2(/;"	d
ICONFB1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ICONFB1(/;"	d
ICONFB2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ICONFB2(/;"	d
ICONNECT_OE_HIGH	board/iomega/iconnect/iconnect.h	/^#define ICONNECT_OE_HIGH	/;"	d
ICONNECT_OE_LOW	board/iomega/iconnect/iconnect.h	/^#define ICONNECT_OE_LOW	/;"	d
ICONNECT_OE_VAL_HIGH	board/iomega/iconnect/iconnect.h	/^#define ICONNECT_OE_VAL_HIGH	/;"	d
ICONNECT_OE_VAL_LOW	board/iomega/iconnect/iconnect.h	/^#define ICONNECT_OE_VAL_LOW	/;"	d
ICPLB_ADDR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR0 /;"	d
ICPLB_ADDR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR1 /;"	d
ICPLB_ADDR10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR10 /;"	d
ICPLB_ADDR11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR11 /;"	d
ICPLB_ADDR12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR12 /;"	d
ICPLB_ADDR13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR13 /;"	d
ICPLB_ADDR14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR14 /;"	d
ICPLB_ADDR15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR15 /;"	d
ICPLB_ADDR2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR2 /;"	d
ICPLB_ADDR3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR3 /;"	d
ICPLB_ADDR4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR4 /;"	d
ICPLB_ADDR5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR5 /;"	d
ICPLB_ADDR6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR6 /;"	d
ICPLB_ADDR7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR7 /;"	d
ICPLB_ADDR8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR8 /;"	d
ICPLB_ADDR9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_ADDR9 /;"	d
ICPLB_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA0 /;"	d
ICPLB_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA1 /;"	d
ICPLB_DATA10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA10 /;"	d
ICPLB_DATA11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA11 /;"	d
ICPLB_DATA12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA12 /;"	d
ICPLB_DATA13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA13 /;"	d
ICPLB_DATA14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA14 /;"	d
ICPLB_DATA15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA15 /;"	d
ICPLB_DATA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA2 /;"	d
ICPLB_DATA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA3 /;"	d
ICPLB_DATA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA4 /;"	d
ICPLB_DATA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA5 /;"	d
ICPLB_DATA6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA6 /;"	d
ICPLB_DATA7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA7 /;"	d
ICPLB_DATA8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA8 /;"	d
ICPLB_DATA9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_DATA9 /;"	d
ICPLB_FAULT_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_FAULT_ADDR /;"	d
ICPLB_FAULT_STATUS	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ICPLB_FAULT_STATUS /;"	d
ICPR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICPR	/;"	d
ICPR	include/SA-1100.h	/^#define ICPR	/;"	d
ICPR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICPR2	/;"	d
ICR	arch/sh/include/asm/cpu_sh7750.h	/^#define ICR	/;"	d
ICR0	arch/sh/include/asm/cpu_sh7720.h	/^#define ICR0	/;"	d
ICR0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICR0	/;"	d
ICR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	ICR0	/;"	d
ICR0_A	board/espt/lowlevel_init.S	/^ICR0_A:		.long	0xFFD00000$/;"	l
ICR0_A	board/renesas/sh7763rdp/lowlevel_init.S	/^ICR0_A:		.long	0xFFD00000$/;"	l
ICR0_D	board/espt/lowlevel_init.S	/^ICR0_D:		.long	0x80C00000$/;"	l
ICR0_D	board/renesas/sh7763rdp/lowlevel_init.S	/^ICR0_D:		.long	0x00E00000$/;"	l
ICR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ICR1(/;"	d
ICR1	arch/sh/include/asm/cpu_sh7720.h	/^#define ICR1	/;"	d
ICR1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICR1	/;"	d
ICR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	ICR1	/;"	d
ICR1_A	board/espt/lowlevel_init.S	/^ICR1_A:		.long	0xFFD0001C$/;"	l
ICR1_D	board/espt/lowlevel_init.S	/^ICR1_D:		.long	0x00020000$/;"	l
ICR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ICR2(/;"	d
ICR2	arch/sh/include/asm/cpu_sh7720.h	/^#define ICR2	/;"	d
ICREAD	arch/powerpc/include/asm/mmu.h	/^#define ICREAD(/;"	d
ICR_ACKNAK	drivers/i2c/mv_i2c.h	/^#define ICR_ACKNAK	/;"	d
ICR_ADDR4	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ICR_ADDR4 /;"	d	file:
ICR_ALDIE	drivers/i2c/mv_i2c.h	/^#define ICR_ALDIE	/;"	d
ICR_BEIE	drivers/i2c/mv_i2c.h	/^#define ICR_BEIE	/;"	d
ICR_FM	drivers/i2c/mv_i2c.h	/^#define ICR_FM	/;"	d
ICR_GCD	drivers/i2c/mv_i2c.h	/^#define ICR_GCD	/;"	d
ICR_IRFIE	drivers/i2c/mv_i2c.h	/^#define ICR_IRFIE	/;"	d
ICR_ITEIE	drivers/i2c/mv_i2c.h	/^#define ICR_ITEIE	/;"	d
ICR_IUE	drivers/i2c/mv_i2c.h	/^#define ICR_IUE	/;"	d
ICR_LARGE_BLOCKS	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ICR_LARGE_BLOCKS /;"	d	file:
ICR_MA	drivers/i2c/mv_i2c.h	/^#define ICR_MA	/;"	d
ICR_MII_CH	drivers/net/armada100_fec.h	/^#define ICR_MII_CH /;"	d
ICR_MODE_MASK	drivers/i2c/mv_i2c.h	/^#define ICR_MODE_MASK	/;"	d
ICR_RXBUF	drivers/net/armada100_fec.h	/^#define ICR_RXBUF /;"	d
ICR_RXERR	drivers/net/armada100_fec.h	/^#define ICR_RXERR /;"	d
ICR_SADIE	drivers/i2c/mv_i2c.h	/^#define ICR_SADIE	/;"	d
ICR_SCLE	drivers/i2c/mv_i2c.h	/^#define ICR_SCLE	/;"	d
ICR_SM	drivers/i2c/mv_i2c.h	/^#define ICR_SM	/;"	d
ICR_SSDIE	drivers/i2c/mv_i2c.h	/^#define ICR_SSDIE	/;"	d
ICR_START	drivers/i2c/mv_i2c.h	/^#define ICR_START	/;"	d
ICR_STOP	drivers/i2c/mv_i2c.h	/^#define ICR_STOP	/;"	d
ICR_TB	drivers/i2c/mv_i2c.h	/^#define ICR_TB	/;"	d
ICR_TXBUF_H	drivers/net/armada100_fec.h	/^#define ICR_TXBUF_H /;"	d
ICR_TXBUF_L	drivers/net/armada100_fec.h	/^#define ICR_TXBUF_L /;"	d
ICR_TXEND_H	drivers/net/armada100_fec.h	/^#define ICR_TXEND_H /;"	d
ICR_TXEND_L	drivers/net/armada100_fec.h	/^#define ICR_TXEND_L /;"	d
ICR_TXERR_H	drivers/net/armada100_fec.h	/^#define ICR_TXERR_H /;"	d
ICR_TXERR_L	drivers/net/armada100_fec.h	/^#define ICR_TXERR_L /;"	d
ICR_TX_UDR	drivers/net/armada100_fec.h	/^#define ICR_TX_UDR /;"	d
ICR_UR	drivers/i2c/mv_i2c.h	/^#define ICR_UR	/;"	d
ICS8N3QV01_FREF	board/gdsys/common/osd.c	/^#define ICS8N3QV01_FREF /;"	d	file:
ICS8N3QV01_FREF_LL	board/gdsys/common/osd.c	/^#define ICS8N3QV01_FREF_LL /;"	d	file:
ICS8N3QV01_F_DEFAULT_0	board/gdsys/common/osd.c	/^#define ICS8N3QV01_F_DEFAULT_0 /;"	d	file:
ICS8N3QV01_F_DEFAULT_1	board/gdsys/common/osd.c	/^#define ICS8N3QV01_F_DEFAULT_1 /;"	d	file:
ICS8N3QV01_F_DEFAULT_2	board/gdsys/common/osd.c	/^#define ICS8N3QV01_F_DEFAULT_2 /;"	d	file:
ICS8N3QV01_F_DEFAULT_3	board/gdsys/common/osd.c	/^#define ICS8N3QV01_F_DEFAULT_3 /;"	d	file:
ICS8N3QV01_I2C_ADDR	board/gdsys/common/osd.c	/^#define ICS8N3QV01_I2C_ADDR /;"	d	file:
ICSR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICSR0	/;"	d
ICSR0	arch/sh/include/asm/cpu_sh7722.h	/^#define ICSR0 /;"	d
ICSR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define ICSR1	/;"	d
ICSR1	arch/sh/include/asm/cpu_sh7722.h	/^#define ICSR1 /;"	d
ICS_MASK	arch/arm/include/asm/omap_mmc.h	/^#define ICS_MASK	/;"	d
ICS_NOTREADY	arch/arm/include/asm/omap_mmc.h	/^#define ICS_NOTREADY	/;"	d
ICT	arch/sh/include/asm/cpu_sh7722.h	/^#define ICT /;"	d
ICTC	arch/powerpc/include/asm/processor.h	/^#define ICTC	/;"	d
ICTRL_ISCT_SER_7	include/mpc5xx.h	/^#define ICTRL_ISCT_SER_7 /;"	d
ICW1	arch/x86/include/asm/i8259.h	/^#define ICW1	/;"	d
ICW1_1	board/mpl/common/isa.c	/^#define ICW1_1	/;"	d	file:
ICW1_2	board/mpl/common/isa.c	/^#define ICW1_2	/;"	d	file:
ICW1_ADI	arch/x86/include/asm/i8259.h	/^#define ICW1_ADI	/;"	d
ICW1_EICW4	arch/x86/include/asm/i8259.h	/^#define ICW1_EICW4	/;"	d
ICW1_LTIM	arch/x86/include/asm/i8259.h	/^#define ICW1_LTIM	/;"	d
ICW1_SEL	arch/x86/include/asm/i8259.h	/^#define ICW1_SEL	/;"	d
ICW1_SNGL	arch/x86/include/asm/i8259.h	/^#define ICW1_SNGL	/;"	d
ICW2	arch/x86/include/asm/i8259.h	/^#define ICW2	/;"	d
ICW2_1	board/mpl/common/isa.c	/^#define ICW2_1	/;"	d	file:
ICW2_2	board/mpl/common/isa.c	/^#define ICW2_2	/;"	d	file:
ICW3	arch/x86/include/asm/i8259.h	/^#define ICW3	/;"	d
ICW3_1	board/mpl/common/isa.c	/^#define ICW3_1	/;"	d	file:
ICW3_2	board/mpl/common/isa.c	/^#define ICW3_2	/;"	d	file:
ICW4	arch/x86/include/asm/i8259.h	/^#define ICW4	/;"	d
ICW4_1	board/mpl/common/isa.c	/^#define ICW4_1	/;"	d	file:
ICW4_2	board/mpl/common/isa.c	/^#define ICW4_2	/;"	d	file:
ICW4_AEOI	arch/x86/include/asm/i8259.h	/^#define ICW4_AEOI	/;"	d
ICW4_PM	arch/x86/include/asm/i8259.h	/^#define ICW4_PM	/;"	d
IC_ACTIVITY	drivers/i2c/designware_i2c.h	/^#define IC_ACTIVITY	/;"	d
IC_ADR	arch/powerpc/include/asm/cache.h	/^#define IC_ADR	/;"	d
IC_BASE	arch/arm/cpu/sa1100/start.S	/^IC_BASE:	.word	0x90050000$/;"	l
IC_CLK	drivers/i2c/designware_i2c.h	/^#define IC_CLK	/;"	d
IC_CLK	include/configs/axs10x.h	/^#define IC_CLK	/;"	d
IC_CLK	include/configs/socfpga_common.h	/^#define IC_CLK	/;"	d
IC_CMBP_1	drivers/video/mx3fb.c	/^#define IC_CMBP_1	/;"	d	file:
IC_CMBP_2	drivers/video/mx3fb.c	/^#define IC_CMBP_2	/;"	d	file:
IC_CMD	drivers/i2c/designware_i2c.h	/^#define IC_CMD	/;"	d
IC_CONF	drivers/video/mx3fb.c	/^#define IC_CONF	/;"	d	file:
IC_CONF_CSI_MEM_WR_EN	drivers/video/mx3fb.c	/^#define IC_CONF_CSI_MEM_WR_EN	/;"	d	file:
IC_CONF_IC_GLB_LOC_A	drivers/video/mx3fb.c	/^#define IC_CONF_IC_GLB_LOC_A	/;"	d	file:
IC_CONF_KEY_COLOR_EN	drivers/video/mx3fb.c	/^#define IC_CONF_KEY_COLOR_EN	/;"	d	file:
IC_CONF_PP_CMB	drivers/video/mx3fb.c	/^#define IC_CONF_PP_CMB	/;"	d	file:
IC_CONF_PP_CSC1	drivers/video/mx3fb.c	/^#define IC_CONF_PP_CSC1	/;"	d	file:
IC_CONF_PP_CSC2	drivers/video/mx3fb.c	/^#define IC_CONF_PP_CSC2	/;"	d	file:
IC_CONF_PP_EN	drivers/video/mx3fb.c	/^#define IC_CONF_PP_EN	/;"	d	file:
IC_CONF_PP_ROT_EN	drivers/video/mx3fb.c	/^#define IC_CONF_PP_ROT_EN	/;"	d	file:
IC_CONF_PRPENC_CSC1	drivers/video/mx3fb.c	/^#define IC_CONF_PRPENC_CSC1	/;"	d	file:
IC_CONF_PRPENC_EN	drivers/video/mx3fb.c	/^#define IC_CONF_PRPENC_EN	/;"	d	file:
IC_CONF_PRPENC_ROT_EN	drivers/video/mx3fb.c	/^#define IC_CONF_PRPENC_ROT_EN	/;"	d	file:
IC_CONF_PRPVF_CMB	drivers/video/mx3fb.c	/^#define IC_CONF_PRPVF_CMB	/;"	d	file:
IC_CONF_PRPVF_CSC1	drivers/video/mx3fb.c	/^#define IC_CONF_PRPVF_CSC1	/;"	d	file:
IC_CONF_PRPVF_CSC2	drivers/video/mx3fb.c	/^#define IC_CONF_PRPVF_CSC2	/;"	d	file:
IC_CONF_PRPVF_EN	drivers/video/mx3fb.c	/^#define IC_CONF_PRPVF_EN	/;"	d	file:
IC_CONF_PRPVF_ROT_EN	drivers/video/mx3fb.c	/^#define IC_CONF_PRPVF_ROT_EN	/;"	d	file:
IC_CONF_RWS_EN	drivers/video/mx3fb.c	/^#define IC_CONF_RWS_EN	/;"	d	file:
IC_CON_10BITADDRMASTER	drivers/i2c/designware_i2c.h	/^#define IC_CON_10BITADDRMASTER	/;"	d
IC_CON_10BITADDR_SLAVE	drivers/i2c/designware_i2c.h	/^#define IC_CON_10BITADDR_SLAVE	/;"	d
IC_CON_MM	drivers/i2c/designware_i2c.h	/^#define IC_CON_MM	/;"	d
IC_CON_RE	drivers/i2c/designware_i2c.h	/^#define IC_CON_RE	/;"	d
IC_CON_SD	drivers/i2c/designware_i2c.h	/^#define IC_CON_SD	/;"	d
IC_CON_SPD_FS	drivers/i2c/designware_i2c.h	/^#define IC_CON_SPD_FS	/;"	d
IC_CON_SPD_HS	drivers/i2c/designware_i2c.h	/^#define IC_CON_SPD_HS	/;"	d
IC_CON_SPD_MSK	drivers/i2c/designware_i2c.h	/^#define IC_CON_SPD_MSK	/;"	d
IC_CON_SPD_SS	drivers/i2c/designware_i2c.h	/^#define IC_CON_SPD_SS	/;"	d
IC_CST	arch/powerpc/include/asm/cache.h	/^#define IC_CST	/;"	d
IC_CTRL_CACHE_DISABLE	arch/arc/lib/cache.c	/^#define IC_CTRL_CACHE_DISABLE	/;"	d	file:
IC_DAT	arch/powerpc/include/asm/cache.h	/^#define IC_DAT	/;"	d
IC_DISTRIBUTOR_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IC_DISTRIBUTOR_BASE_ADDR /;"	d
IC_DMA	include/SA-1100.h	/^#define IC_DMA(/;"	d
IC_DMA0	include/SA-1100.h	/^#define IC_DMA0	/;"	d
IC_DMA1	include/SA-1100.h	/^#define IC_DMA1	/;"	d
IC_DMA2	include/SA-1100.h	/^#define IC_DMA2	/;"	d
IC_DMA3	include/SA-1100.h	/^#define IC_DMA3	/;"	d
IC_DMA4	include/SA-1100.h	/^#define IC_DMA4	/;"	d
IC_DMA5	include/SA-1100.h	/^#define IC_DMA5	/;"	d
IC_ENABLE_0B	drivers/i2c/designware_i2c.h	/^#define IC_ENABLE_0B	/;"	d
IC_ENB1	arch/arm/include/asm/arch-tegra/usb.h	/^#define IC_ENB1	/;"	d
IC_GEN_CALL	drivers/i2c/designware_i2c.h	/^#define IC_GEN_CALL	/;"	d
IC_GPIO	include/SA-1100.h	/^#define IC_GPIO(/;"	d
IC_GPIO0	include/SA-1100.h	/^#define IC_GPIO0	/;"	d
IC_GPIO1	include/SA-1100.h	/^#define IC_GPIO1	/;"	d
IC_GPIO10	include/SA-1100.h	/^#define IC_GPIO10	/;"	d
IC_GPIO11_27	include/SA-1100.h	/^#define IC_GPIO11_27	/;"	d
IC_GPIO2	include/SA-1100.h	/^#define IC_GPIO2	/;"	d
IC_GPIO3	include/SA-1100.h	/^#define IC_GPIO3	/;"	d
IC_GPIO4	include/SA-1100.h	/^#define IC_GPIO4	/;"	d
IC_GPIO5	include/SA-1100.h	/^#define IC_GPIO5	/;"	d
IC_GPIO6	include/SA-1100.h	/^#define IC_GPIO6	/;"	d
IC_GPIO7	include/SA-1100.h	/^#define IC_GPIO7	/;"	d
IC_GPIO8	include/SA-1100.h	/^#define IC_GPIO8	/;"	d
IC_GPIO9	include/SA-1100.h	/^#define IC_GPIO9	/;"	d
IC_INTERFACES_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IC_INTERFACES_BASE_ADDR /;"	d
IC_LCD	include/SA-1100.h	/^#define IC_LCD	/;"	d
IC_OST	include/SA-1100.h	/^#define IC_OST(/;"	d
IC_OST0	include/SA-1100.h	/^#define IC_OST0	/;"	d
IC_OST1	include/SA-1100.h	/^#define IC_OST1	/;"	d
IC_OST2	include/SA-1100.h	/^#define IC_OST2	/;"	d
IC_OST3	include/SA-1100.h	/^#define IC_OST3	/;"	d
IC_PP_RSC	drivers/video/mx3fb.c	/^#define IC_PP_RSC	/;"	d	file:
IC_PRP_ENC_RSC	drivers/video/mx3fb.c	/^#define IC_PRP_ENC_RSC	/;"	d	file:
IC_PRP_VF_RSC	drivers/video/mx3fb.c	/^#define IC_PRP_VF_RSC	/;"	d	file:
IC_RD_REQ	drivers/i2c/designware_i2c.h	/^#define IC_RD_REQ	/;"	d
IC_RTC1Hz	include/SA-1100.h	/^#define IC_RTC1Hz	/;"	d
IC_RTCAlrm	include/SA-1100.h	/^#define IC_RTCAlrm	/;"	d
IC_RX_DONE	drivers/i2c/designware_i2c.h	/^#define IC_RX_DONE	/;"	d
IC_RX_FULL	drivers/i2c/designware_i2c.h	/^#define IC_RX_FULL	/;"	d
IC_RX_OVER	drivers/i2c/designware_i2c.h	/^#define IC_RX_OVER /;"	d
IC_RX_TL	drivers/i2c/designware_i2c.h	/^#define IC_RX_TL	/;"	d
IC_RX_UNDER	drivers/i2c/designware_i2c.h	/^#define IC_RX_UNDER	/;"	d
IC_SLAVE_ADDR	drivers/i2c/designware_i2c.h	/^#define IC_SLAVE_ADDR	/;"	d
IC_SPEED_MODE_FAST	drivers/i2c/designware_i2c.h	/^#define IC_SPEED_MODE_FAST	/;"	d
IC_SPEED_MODE_MAX	drivers/i2c/designware_i2c.h	/^#define IC_SPEED_MODE_MAX	/;"	d
IC_SPEED_MODE_STANDARD	drivers/i2c/designware_i2c.h	/^#define IC_SPEED_MODE_STANDARD	/;"	d
IC_START_DET	drivers/i2c/designware_i2c.h	/^#define IC_START_DET	/;"	d
IC_STATUS_ACT	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_ACT	/;"	d
IC_STATUS_MA	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_MA	/;"	d
IC_STATUS_RFF	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_RFF	/;"	d
IC_STATUS_RFNE	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_RFNE	/;"	d
IC_STATUS_SA	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_SA	/;"	d
IC_STATUS_TFE	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_TFE	/;"	d
IC_STATUS_TFNF	drivers/i2c/designware_i2c.h	/^#define IC_STATUS_TFNF	/;"	d
IC_STOP	drivers/i2c/designware_i2c.h	/^#define IC_STOP	/;"	d
IC_STOP_DET	drivers/i2c/designware_i2c.h	/^#define IC_STOP_DET	/;"	d
IC_Ser0UDC	include/SA-1100.h	/^#define IC_Ser0UDC	/;"	d
IC_Ser1SDLC	include/SA-1100.h	/^#define IC_Ser1SDLC	/;"	d
IC_Ser1UART	include/SA-1100.h	/^#define IC_Ser1UART	/;"	d
IC_Ser2ICP	include/SA-1100.h	/^#define IC_Ser2ICP	/;"	d
IC_Ser3UART	include/SA-1100.h	/^#define IC_Ser3UART	/;"	d
IC_Ser4MCP	include/SA-1100.h	/^#define IC_Ser4MCP	/;"	d
IC_Ser4SSP	include/SA-1100.h	/^#define IC_Ser4SSP	/;"	d
IC_TL0	drivers/i2c/designware_i2c.h	/^#define IC_TL0	/;"	d
IC_TL1	drivers/i2c/designware_i2c.h	/^#define IC_TL1	/;"	d
IC_TL2	drivers/i2c/designware_i2c.h	/^#define IC_TL2	/;"	d
IC_TL3	drivers/i2c/designware_i2c.h	/^#define IC_TL3	/;"	d
IC_TL4	drivers/i2c/designware_i2c.h	/^#define IC_TL4	/;"	d
IC_TL5	drivers/i2c/designware_i2c.h	/^#define IC_TL5	/;"	d
IC_TL6	drivers/i2c/designware_i2c.h	/^#define IC_TL6	/;"	d
IC_TL7	drivers/i2c/designware_i2c.h	/^#define IC_TL7	/;"	d
IC_TX_ABRT	drivers/i2c/designware_i2c.h	/^#define IC_TX_ABRT	/;"	d
IC_TX_EMPTY	drivers/i2c/designware_i2c.h	/^#define IC_TX_EMPTY	/;"	d
IC_TX_OVER	drivers/i2c/designware_i2c.h	/^#define IC_TX_OVER	/;"	d
IC_TX_TL	drivers/i2c/designware_i2c.h	/^#define IC_TX_TL	/;"	d
ICompressProgress	lib/lzma/Types.h	/^} ICompressProgress;$/;"	t	typeref:struct:__anonf2a2f1b90b08
ID	doc/README.x86	/^ID 8086:4108, extract and save it as vga.bin in the board directory.$/;"	l
ID	drivers/gpio/sunxi_gpio.c	/^#define ID(/;"	d	file:
IDCODE_LEN	drivers/mtd/spi/sandbox.c	/^#define IDCODE_LEN /;"	d	file:
IDCR1	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	IDCR1,	\/* Indirectly Accessed DCR via SDRAM0_CFGADDR\/SDRAM0_CFGDATA *\/$/;"	e	enum:REGISTER_TYPE	file:
IDCR2	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	IDCR2,	\/* Indirectly Accessed DCR via EBC0_CFGADDR\/EBC0_CFGDATA *\/$/;"	e	enum:REGISTER_TYPE	file:
IDCR3	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	IDCR3,	\/* Indirectly Accessed DCR via EBM0_CFGADDR\/EBM0_CFGDATA *\/$/;"	e	enum:REGISTER_TYPE	file:
IDCR4	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	IDCR4,	\/* Indirectly Accessed DCR via PPM0_CFGADDR\/PPM0_CFGDATA *\/$/;"	e	enum:REGISTER_TYPE	file:
IDCR5	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	IDCR5,	\/* Indirectly Accessed DCR via CPR0_CFGADDR\/CPR0_CFGDATA *\/$/;"	e	enum:REGISTER_TYPE	file:
IDCR6	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	IDCR6,	\/* Indirectly Accessed DCR via SDR0_CFGADDR\/SDR0_CFGDATA *\/$/;"	e	enum:REGISTER_TYPE	file:
IDC_CERR1	arch/powerpc/include/asm/cache.h	/^#define IDC_CERR1	/;"	d
IDC_CERR2	arch/powerpc/include/asm/cache.h	/^#define IDC_CERR2	/;"	d
IDC_CERR3	arch/powerpc/include/asm/cache.h	/^#define IDC_CERR3	/;"	d
IDC_DISABLE	arch/powerpc/include/asm/cache.h	/^#define IDC_DISABLE	/;"	d
IDC_ENABLE	arch/powerpc/include/asm/cache.h	/^#define	IDC_ENABLE	/;"	d
IDC_ENABLED	arch/powerpc/include/asm/cache.h	/^#define IDC_ENABLED	/;"	d
IDC_INVALL	arch/powerpc/include/asm/cache.h	/^#define IDC_INVALL	/;"	d
IDC_LDLCK	arch/powerpc/include/asm/cache.h	/^#define IDC_LDLCK	/;"	d
IDC_UNALL	arch/powerpc/include/asm/cache.h	/^#define IDC_UNALL	/;"	d
IDC_UNLINE	arch/powerpc/include/asm/cache.h	/^#define IDC_UNLINE	/;"	d
IDE0_TIM	arch/x86/include/asm/arch-qemu/qemu.h	/^#define IDE0_TIM	/;"	d
IDE1_TIM	arch/x86/include/asm/arch-qemu/qemu.h	/^#define IDE1_TIM	/;"	d
IDECSR_LEGIRQ	include/w83c553f.h	/^#define IDECSR_LEGIRQ	/;"	d
IDECSR_P0EN	include/w83c553f.h	/^#define IDECSR_P0EN	/;"	d
IDECSR_P0F16	include/w83c553f.h	/^#define IDECSR_P0F16	/;"	d
IDECSR_P1EN	include/w83c553f.h	/^#define IDECSR_P1EN	/;"	d
IDECSR_P1F16	include/w83c553f.h	/^#define IDECSR_P1F16	/;"	d
IDENTIFICATION_NUMBER	board/cm5200/cm5200.h	/^	IDENTIFICATION_NUMBER,	\/* 5 *\/$/;"	e	enum:__anonb595836f0103
IDENTIFICATION_NUMBER_LEN	board/cm5200/cm5200.h	/^#define IDENTIFICATION_NUMBER_LEN	/;"	d
IDENTIFICATION_NUMBER_OFFSET	board/cm5200/cm5200.h	/^#define IDENTIFICATION_NUMBER_OFFSET	/;"	d
IDENT_STRING	board/sunxi/Kconfig	/^config IDENT_STRING$/;"	c
IDENT_STRING	common/Kconfig	/^config IDENT_STRING$/;"	c	menu:Console
IDE_A0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_A0_MARK,	IDE_A1_MARK,	IDE_A2_MARK,	IDE_CS0_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_A1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_A0_MARK,	IDE_A1_MARK,	IDE_A2_MARK,	IDE_CS0_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_A2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_A0_MARK,	IDE_A1_MARK,	IDE_A2_MARK,	IDE_CS0_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_BUS	include/ide.h	/^#define IDE_BUS(/;"	d
IDE_CONFIG	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IDE_CONFIG	/;"	d
IDE_CS0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_A0_MARK,	IDE_A1_MARK,	IDE_A2_MARK,	IDE_CS0_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_CS1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_CS1_MARK,	IDE_IOWR_MARK,	IDE_IORD_MARK,	IDE_IORDY_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D0_MARK,	IDE_D1_MARK,	IDE_D2_MARK,	IDE_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D8_MARK,	IDE_D9_MARK,	IDE_D10_MARK,	IDE_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D8_MARK,	IDE_D9_MARK,	IDE_D10_MARK,	IDE_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D12_MARK,	IDE_D13_MARK,	IDE_D14_MARK,	IDE_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D12_MARK,	IDE_D13_MARK,	IDE_D14_MARK,	IDE_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D12_MARK,	IDE_D13_MARK,	IDE_D14_MARK,	IDE_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D12_MARK,	IDE_D13_MARK,	IDE_D14_MARK,	IDE_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D0_MARK,	IDE_D1_MARK,	IDE_D2_MARK,	IDE_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D0_MARK,	IDE_D1_MARK,	IDE_D2_MARK,	IDE_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D0_MARK,	IDE_D1_MARK,	IDE_D2_MARK,	IDE_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D4_MARK,	IDE_D5_MARK,	IDE_D6_MARK,	IDE_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D4_MARK,	IDE_D5_MARK,	IDE_D6_MARK,	IDE_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D4_MARK,	IDE_D5_MARK,	IDE_D6_MARK,	IDE_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D4_MARK,	IDE_D5_MARK,	IDE_D6_MARK,	IDE_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D8_MARK,	IDE_D9_MARK,	IDE_D10_MARK,	IDE_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_D9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_D8_MARK,	IDE_D9_MARK,	IDE_D10_MARK,	IDE_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_DATA_COUNTER	drivers/block/ftide020.h	/^#define IDE_DATA_COUNTER(/;"	d
IDE_DATA_OPCODE	drivers/block/ftide020.h	/^#define IDE_DATA_OPCODE	/;"	d
IDE_DATA_WRITE	drivers/block/ftide020.h	/^#define IDE_DATA_WRITE	/;"	d
IDE_DECODE_EN	arch/x86/include/asm/arch-qemu/qemu.h	/^#define IDE_DECODE_EN	/;"	d
IDE_DECODE_ENABLE	arch/x86/include/asm/pch_common.h	/^#define   IDE_DECODE_ENABLE	/;"	d
IDE_DIRECTION_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_INT_MARK,		IDE_RST_MARK,		IDE_DIRECTION_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_DTE0	arch/x86/include/asm/pch_common.h	/^#define   IDE_DTE0	/;"	d
IDE_DTE1	arch/x86/include/asm/pch_common.h	/^#define   IDE_DTE1	/;"	d
IDE_EXBUF_ENB_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_EXBUF_ENB_MARK,	IDE_IODACK_MARK,	IDE_IODREQ_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_IE0	arch/x86/include/asm/pch_common.h	/^#define   IDE_IE0	/;"	d
IDE_IE1	arch/x86/include/asm/pch_common.h	/^#define   IDE_IE1	/;"	d
IDE_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_INT_MARK,		IDE_RST_MARK,		IDE_DIRECTION_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_IODACK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_EXBUF_ENB_MARK,	IDE_IODACK_MARK,	IDE_IODREQ_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_IODREQ_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_EXBUF_ENB_MARK,	IDE_IODACK_MARK,	IDE_IODREQ_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_IORDY_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_CS1_MARK,	IDE_IOWR_MARK,	IDE_IORD_MARK,	IDE_IORDY_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_IORD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_CS1_MARK,	IDE_IOWR_MARK,	IDE_IORD_MARK,	IDE_IORDY_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_IOWR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_CS1_MARK,	IDE_IOWR_MARK,	IDE_IORD_MARK,	IDE_IORDY_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_ISP_3_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_ISP_3_CLOCKS	/;"	d
IDE_ISP_4_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_ISP_4_CLOCKS	/;"	d
IDE_ISP_5_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_ISP_5_CLOCKS	/;"	d
IDE_MAX_PIO_MODE	include/ata.h	/^#define	IDE_MAX_PIO_MODE	/;"	d
IDE_PPE0	arch/x86/include/asm/pch_common.h	/^#define   IDE_PPE0	/;"	d
IDE_PPE1	arch/x86/include/asm/pch_common.h	/^#define   IDE_PPE1	/;"	d
IDE_PSDE0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   IDE_PSDE0	/;"	d
IDE_PSDE1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   IDE_PSDE1	/;"	d
IDE_RCT_1_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_RCT_1_CLOCKS	/;"	d
IDE_RCT_2_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_RCT_2_CLOCKS	/;"	d
IDE_RCT_3_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_RCT_3_CLOCKS	/;"	d
IDE_RCT_4_CLOCKS	arch/x86/include/asm/pch_common.h	/^#define   IDE_RCT_4_CLOCKS	/;"	d
IDE_REG_CMD_READ	drivers/block/ftide020.h	/^#define IDE_REG_CMD_READ(/;"	d
IDE_REG_CMD_WRITE	drivers/block/ftide020.h	/^#define IDE_REG_CMD_WRITE(/;"	d
IDE_REG_CS_READ	drivers/block/ftide020.h	/^#define IDE_REG_CS_READ(/;"	d
IDE_REG_CS_WRITE	drivers/block/ftide020.h	/^#define IDE_REG_CS_WRITE(/;"	d
IDE_REG_DA_READ	drivers/block/ftide020.h	/^#define IDE_REG_DA_READ(/;"	d
IDE_REG_DA_WRITE	drivers/block/ftide020.h	/^#define IDE_REG_DA_WRITE(/;"	d
IDE_REG_OPCODE_READ	drivers/block/ftide020.h	/^#define IDE_REG_OPCODE_READ	/;"	d
IDE_REG_OPCODE_WRITE	drivers/block/ftide020.h	/^#define IDE_REG_OPCODE_WRITE	/;"	d
IDE_RST_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IDE_INT_MARK,		IDE_RST_MARK,		IDE_DIRECTION_MARK,$/;"	e	enum:__anona304c1340103	file:
IDE_SDMA_CNT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IDE_SDMA_CNT	/;"	d
IDE_SDMA_TIM	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IDE_SDMA_TIM	/;"	d
IDE_SET_CX8	drivers/block/ftide020.h	/^#define IDE_SET_CX8(/;"	d
IDE_SET_DEV	drivers/block/ftide020.h	/^#define IDE_SET_DEV(/;"	d
IDE_SET_OPCODE	drivers/block/ftide020.h	/^#define IDE_SET_OPCODE	/;"	d
IDE_SITRE	arch/x86/include/asm/pch_common.h	/^#define   IDE_SITRE	/;"	d
IDE_SPIN_UP_TIME_OUT	common/ide.c	/^#define IDE_SPIN_UP_TIME_OUT /;"	d	file:
IDE_SSDE0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   IDE_SSDE0	/;"	d
IDE_SSDE1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   IDE_SSDE1	/;"	d
IDE_TIME0	arch/x86/include/asm/pch_common.h	/^#define   IDE_TIME0	/;"	d
IDE_TIME1	arch/x86/include/asm/pch_common.h	/^#define   IDE_TIME1	/;"	d
IDE_TIME_OUT	common/ide.c	/^#define IDE_TIME_OUT	/;"	d	file:
IDE_TIM_PRI	arch/x86/include/asm/pch_common.h	/^#define IDE_TIM_PRI	/;"	d
IDE_TIM_SEC	arch/x86/include/asm/pch_common.h	/^#define IDE_TIM_SEC	/;"	d
IDIN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_RTS__MARK, IDIN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
IDIS	arch/arm/include/asm/arch-omap3/mux.h	/^#define IDIS	/;"	d
IDIS	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define IDIS /;"	d
IDIS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define IDIS	/;"	d
IDIS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define IDIS /;"	d
IDLE	arch/blackfin/cpu/initcode.c	/^#define IDLE /;"	d	file:
IDLE	drivers/usb/musb/musb_udc.c	/^	IDLE = 0,$/;"	e	enum:ep0_state_enum	file:
IDLE	include/dataflash.h	/^#define IDLE	/;"	d
IDLE	include/lattice.h	/^#define IDLE	/;"	d
IDLE_CLEAR_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define IDLE_CLEAR_BIT	/;"	d	file:
IDLE_EN_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define IDLE_EN_BIT	/;"	d	file:
IDLE_IRQ_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define IDLE_IRQ_BIT	/;"	d	file:
IDLE_MS	include/usb/fotg210.h	/^#define IDLE_MS(/;"	d
IDLE_NOP	drivers/ddr/microchip/ddr2_regs.h	/^#define IDLE_NOP	/;"	d
IDLE_REQ_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define IDLE_REQ_P	/;"	d
IDMAC_ADC_0	drivers/video/mx3fb.c	/^	IDMAC_ADC_0 = 1,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_1	drivers/video/mx3fb.c	/^	IDMAC_ADC_1 = 2,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_2	drivers/video/mx3fb.c	/^	IDMAC_ADC_2 = 18,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_3	drivers/video/mx3fb.c	/^	IDMAC_ADC_3 = 19,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_4	drivers/video/mx3fb.c	/^	IDMAC_ADC_4 = 20,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_5	drivers/video/mx3fb.c	/^	IDMAC_ADC_5 = 21,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_6	drivers/video/mx3fb.c	/^	IDMAC_ADC_6 = 22,$/;"	e	enum:ipu_channel	file:
IDMAC_ADC_7	drivers/video/mx3fb.c	/^	IDMAC_ADC_7 = 23,$/;"	e	enum:ipu_channel	file:
IDMAC_BDADDR	board/synopsys/axs10x/nand.c	/^	IDMAC_BDADDR = 0x18,	\/* idmac descriptor list base address *\/$/;"	e	enum:nand_regs_t	file:
IDMAC_CHA_BUSY	drivers/video/mx3fb.c	/^#define IDMAC_CHA_BUSY	/;"	d	file:
IDMAC_CHA_EN	drivers/video/ipu_regs.h	/^#define IDMAC_CHA_EN(/;"	d
IDMAC_CHA_EN	drivers/video/mx3fb.c	/^#define IDMAC_CHA_EN	/;"	d	file:
IDMAC_CHA_PRI	drivers/video/ipu_regs.h	/^#define IDMAC_CHA_PRI(/;"	d
IDMAC_CHA_PRI	drivers/video/mx3fb.c	/^#define IDMAC_CHA_PRI	/;"	d	file:
IDMAC_CONF	drivers/video/ipu_regs.h	/^#define IDMAC_CONF	/;"	d
IDMAC_CONF	drivers/video/mx3fb.c	/^#define IDMAC_CONF	/;"	d	file:
IDMAC_IC_0	drivers/video/mx3fb.c	/^	IDMAC_IC_0 = 0,		\/* IC (encoding task) to memory *\/$/;"	e	enum:ipu_channel	file:
IDMAC_IC_1	drivers/video/mx3fb.c	/^	IDMAC_IC_1 = 1,		\/* IC (viewfinder task) to memory *\/$/;"	e	enum:ipu_channel	file:
IDMAC_IC_10	drivers/video/mx3fb.c	/^	IDMAC_IC_10 = 10,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_11	drivers/video/mx3fb.c	/^	IDMAC_IC_11 = 11,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_12	drivers/video/mx3fb.c	/^	IDMAC_IC_12 = 12,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_13	drivers/video/mx3fb.c	/^	IDMAC_IC_13 = 13,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_2	drivers/video/mx3fb.c	/^	IDMAC_IC_2 = 2,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_3	drivers/video/mx3fb.c	/^	IDMAC_IC_3 = 3,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_4	drivers/video/mx3fb.c	/^	IDMAC_IC_4 = 4,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_5	drivers/video/mx3fb.c	/^	IDMAC_IC_5 = 5,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_6	drivers/video/mx3fb.c	/^	IDMAC_IC_6 = 6,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_7	drivers/video/mx3fb.c	/^	IDMAC_IC_7 = 7,		\/* IC (sensor data) to memory *\/$/;"	e	enum:ipu_channel	file:
IDMAC_IC_8	drivers/video/mx3fb.c	/^	IDMAC_IC_8 = 8,$/;"	e	enum:ipu_channel	file:
IDMAC_IC_9	drivers/video/mx3fb.c	/^	IDMAC_IC_9 = 9,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_0	drivers/video/mx3fb.c	/^	IDMAC_PF_0 = 24,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_1	drivers/video/mx3fb.c	/^	IDMAC_PF_1 = 25,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_2	drivers/video/mx3fb.c	/^	IDMAC_PF_2 = 26,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_3	drivers/video/mx3fb.c	/^	IDMAC_PF_3 = 27,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_4	drivers/video/mx3fb.c	/^	IDMAC_PF_4 = 28,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_5	drivers/video/mx3fb.c	/^	IDMAC_PF_5 = 29,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_6	drivers/video/mx3fb.c	/^	IDMAC_PF_6 = 30,$/;"	e	enum:ipu_channel	file:
IDMAC_PF_7	drivers/video/mx3fb.c	/^	IDMAC_PF_7 = 31,$/;"	e	enum:ipu_channel	file:
IDMAC_REG	drivers/video/ipu_regs.h	/^#define IDMAC_REG	/;"	d
IDMAC_SDC_0	drivers/video/mx3fb.c	/^	IDMAC_SDC_0 = 14,	\/* Background synchronous display data *\/$/;"	e	enum:ipu_channel	file:
IDMAC_SDC_1	drivers/video/mx3fb.c	/^	IDMAC_SDC_1 = 15,	\/* Foreground data (overlay) *\/$/;"	e	enum:ipu_channel	file:
IDMAC_SDC_2	drivers/video/mx3fb.c	/^	IDMAC_SDC_2 = 16,$/;"	e	enum:ipu_channel	file:
IDMAC_SDC_3	drivers/video/mx3fb.c	/^	IDMAC_SDC_3 = 17,$/;"	e	enum:ipu_channel	file:
IDMA_CHAN_INVALID	drivers/video/ipu.h	/^#define IDMA_CHAN_INVALID	/;"	d
IDMON	drivers/usb/host/r8a66597.h	/^#define	IDMON	/;"	d
IDNMBR0	include/faraday/ftpmu010.h	/^	unsigned int	IDNMBR0;	\/* 0x00 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
IDPROM_OFFSET	arch/sparc/include/asm/prom.h	/^#define IDPROM_OFFSET /;"	d
IDPROM_OFFSET_M	arch/sparc/include/asm/prom.h	/^#define IDPROM_OFFSET_M /;"	d
IDPROM_SIZE	arch/sparc/include/asm/prom.h	/^#define IDPROM_SIZE /;"	d
IDSCPLD_SPI_CS_BASE	board/ids/ids8313/ids8313.c	/^#define IDSCPLD_SPI_CS_BASE	/;"	d	file:
IDSCPLD_SPI_CS_MASK	board/ids/ids8313/ids8313.c	/^#define IDSCPLD_SPI_CS_MASK	/;"	d	file:
IDSUMCR_RTS_MASK	board/ids/ids8313/ids8313.c	/^#define IDSUMCR_RTS_MASK /;"	d	file:
IDT_SERDES1_ADDRESS	include/configs/B4860QDS.h	/^#define IDT_SERDES1_ADDRESS /;"	d
IDT_SERDES2_ADDRESS	include/configs/B4860QDS.h	/^#define IDT_SERDES2_ADDRESS /;"	d
ID_LED_DEF1_DEF2	drivers/net/e1000.h	/^#define ID_LED_DEF1_DEF2 /;"	d
ID_LED_DEF1_OFF2	drivers/net/e1000.h	/^#define ID_LED_DEF1_OFF2 /;"	d
ID_LED_DEF1_ON2	drivers/net/e1000.h	/^#define ID_LED_DEF1_ON2 /;"	d
ID_LED_DEFAULT	drivers/net/e1000.h	/^#define ID_LED_DEFAULT	/;"	d
ID_LED_OFF1_DEF2	drivers/net/e1000.h	/^#define ID_LED_OFF1_DEF2 /;"	d
ID_LED_OFF1_OFF2	drivers/net/e1000.h	/^#define ID_LED_OFF1_OFF2 /;"	d
ID_LED_OFF1_ON2	drivers/net/e1000.h	/^#define ID_LED_OFF1_ON2 /;"	d
ID_LED_ON1_DEF2	drivers/net/e1000.h	/^#define ID_LED_ON1_DEF2 /;"	d
ID_LED_ON1_OFF2	drivers/net/e1000.h	/^#define ID_LED_ON1_OFF2 /;"	d
ID_LED_ON1_ON2	drivers/net/e1000.h	/^#define ID_LED_ON1_ON2	/;"	d
ID_LED_RESERVED_0000	drivers/net/e1000.h	/^#define ID_LED_RESERVED_0000 /;"	d
ID_LED_RESERVED_FFFF	drivers/net/e1000.h	/^#define ID_LED_RESERVED_FFFF /;"	d
ID_PULLUP0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define ID_PULLUP0 /;"	d
ID_REG	board/keymile/km_arm/fpga_config.c	/^#define ID_REG	/;"	d	file:
ID_REV	drivers/net/smc911x.h	/^#define ID_REV	/;"	d
ID_REV	drivers/usb/eth/smsc95xx.c	/^#define ID_REV	/;"	d	file:
ID_REV_CHIP_ID	drivers/net/smc911x.h	/^#define	ID_REV_CHIP_ID	/;"	d
ID_REV_REV_ID	drivers/net/smc911x.h	/^#define	ID_REV_REV_ID	/;"	d
ID_STR	arch/powerpc/cpu/mpc5xx/cpu.c	/^#  define	ID_STR	/;"	d	file:
IECLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IECLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
IECLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK,$/;"	e	enum:__anona3077f190103	file:
IECLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IECLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IECLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
IECLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,$/;"	e	enum:__anona3077f190103	file:
IECLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307835a0103	file:
IECLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IECLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_FIELD_MARK, I2C3_SDA_MARK, SCIFA5_TXD_C_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307901d0103	file:
IECLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
IECLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IED_SIZE	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define IED_SIZE	/;"	d
IEEE_8023_MAX_FRAME	drivers/net/ne2000_base.h	/^#define IEEE_8023_MAX_FRAME	/;"	d
IEEE_8023_MIN_FRAME	drivers/net/ne2000_base.h	/^#define IEEE_8023_MIN_FRAME	/;"	d
IEEE_ESR_1000T_FD_CAPS	drivers/net/e1000.h	/^#define IEEE_ESR_1000T_FD_CAPS	/;"	d
IEEE_ESR_1000T_HD_CAPS	drivers/net/e1000.h	/^#define IEEE_ESR_1000T_HD_CAPS	/;"	d
IEEE_ESR_1000X_FD_CAPS	drivers/net/e1000.h	/^#define IEEE_ESR_1000X_FD_CAPS	/;"	d
IEEE_ESR_1000X_HD_CAPS	drivers/net/e1000.h	/^#define IEEE_ESR_1000X_HD_CAPS	/;"	d
IEN	arch/arm/include/asm/arch-omap3/mux.h	/^#define IEN	/;"	d
IEN	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define IEN /;"	d
IEN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define IEN	/;"	d
IEN	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define IEN /;"	d
IEP_MAXPS	include/usb/fotg210.h	/^#define IEP_MAXPS(/;"	d
IEP_RESET	include/usb/fotg210.h	/^#define IEP_RESET /;"	d
IEP_SENDZLP	include/usb/fotg210.h	/^#define IEP_SENDZLP /;"	d
IEP_STALL	include/usb/fotg210.h	/^#define IEP_STALL /;"	d
IEP_TNRHB	include/usb/fotg210.h	/^#define IEP_TNRHB(/;"	d
IER	arch/powerpc/include/asm/xilinx_irq.h	/^#define IER	/;"	d
IER0	arch/sh/include/asm/cpu_sh7722.h	/^#define IER0 /;"	d
IERX_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IERX_A_MARK,$/;"	e	enum:__anona307945e0103	file:
IERX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK,$/;"	e	enum:__anona3077f190103	file:
IERX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_DATA3_MARK, IERX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IERX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IERX_B_MARK,$/;"	e	enum:__anona307945e0103	file:
IERX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3077f190103	file:
IERX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
IERX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IERX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IERX_C_MARK, AVB_COL_MARK, VI0_VSYNC_N_MARK, SCIF0_TXD_B_MARK,$/;"	e	enum:__anona307901d0103	file:
IERX_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
IERX_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IER_0	drivers/mtd/nand/tegra_nand.h	/^#define IER_0	/;"	d
IER_DMAE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_DMAE	/;"	d
IER_FIFO_INT_EN_MASK	drivers/i2c/kona_i2c.c	/^#define IER_FIFO_INT_EN_MASK	/;"	d	file:
IER_I2C_INT_EN_MASK	drivers/i2c/kona_i2c.c	/^#define IER_I2C_INT_EN_MASK	/;"	d	file:
IER_MIE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_MIE	/;"	d
IER_NOACK_EN_MASK	drivers/i2c/kona_i2c.c	/^#define IER_NOACK_EN_MASK	/;"	d	file:
IER_NRZE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_NRZE	/;"	d
IER_OFFSET	drivers/i2c/kona_i2c.c	/^#define IER_OFFSET	/;"	d	file:
IER_RAVIE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_RAVIE	/;"	d
IER_READ_COMPLETE_INT_MASK	drivers/i2c/kona_i2c.c	/^#define IER_READ_COMPLETE_INT_MASK	/;"	d	file:
IER_RLSE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_RLSE	/;"	d
IER_RTIOE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_RTIOE	/;"	d
IER_TIE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_TIE	/;"	d
IER_UUE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IER_UUE	/;"	d
IETX_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IETX_A_MARK,$/;"	e	enum:__anona307945e0103	file:
IETX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,$/;"	e	enum:__anona3077f190103	file:
IETX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IETX_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IETX_B_MARK,$/;"	e	enum:__anona307945e0103	file:
IETX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,$/;"	e	enum:__anona3077f190103	file:
IETX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,$/;"	e	enum:__anona307835a0103	file:
IETX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IETX_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C3_SCL_MARK, SCIFA5_RXD_C_MARK, IETX_C_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
IETX_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
IETX_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IEVENT_ABRT	include/fsl_dtsec.h	/^#define IEVENT_ABRT	/;"	d
IEVENT_BABR	include/fsl_dtsec.h	/^#define IEVENT_BABR	/;"	d
IEVENT_BABR	include/tsec.h	/^#define IEVENT_BABR	/;"	d
IEVENT_BABT	include/fsl_dtsec.h	/^#define IEVENT_BABT	/;"	d
IEVENT_BABT	include/tsec.h	/^#define IEVENT_BABT	/;"	d
IEVENT_BSY	include/tsec.h	/^#define IEVENT_BSY	/;"	d
IEVENT_CLEAR_ALL	include/fsl_dtsec.h	/^#define IEVENT_CLEAR_ALL	/;"	d
IEVENT_CLEAR_ALL	include/fsl_memac.h	/^#define IEVENT_CLEAR_ALL	/;"	d
IEVENT_CLEAR_ALL	include/fsl_tgec.h	/^#define IEVENT_CLEAR_ALL	/;"	d
IEVENT_CRL	include/fsl_dtsec.h	/^#define IEVENT_CRL	/;"	d
IEVENT_CRL	include/tsec.h	/^#define IEVENT_CRL	/;"	d
IEVENT_EBERR	include/tsec.h	/^#define IEVENT_EBERR	/;"	d
IEVENT_GRSC	include/fsl_dtsec.h	/^#define IEVENT_GRSC	/;"	d
IEVENT_GRSC	include/tsec.h	/^#define IEVENT_GRSC	/;"	d
IEVENT_GTSC	include/fsl_dtsec.h	/^#define IEVENT_GTSC	/;"	d
IEVENT_GTSC	include/tsec.h	/^#define IEVENT_GTSC	/;"	d
IEVENT_IE	include/tsec.h	/^#define IEVENT_IE	/;"	d
IEVENT_INIT_CLEAR	include/tsec.h	/^#define IEVENT_INIT_CLEAR	/;"	d
IEVENT_LC	include/fsl_dtsec.h	/^#define IEVENT_LC	/;"	d
IEVENT_LC	include/tsec.h	/^#define IEVENT_LC	/;"	d
IEVENT_LOC_FAULT	include/fsl_memac.h	/^#define IEVENT_LOC_FAULT	/;"	d
IEVENT_LOC_FAULT	include/fsl_tgec.h	/^#define IEVENT_LOC_FAULT	/;"	d
IEVENT_MDIO_CMD_CMPL	include/fsl_memac.h	/^#define IEVENT_MDIO_CMD_CMPL	/;"	d
IEVENT_MDIO_CMD_CMPL	include/fsl_tgec.h	/^#define IEVENT_MDIO_CMD_CMPL	/;"	d
IEVENT_MDIO_SCAN_EVENT	include/fsl_memac.h	/^#define IEVENT_MDIO_SCAN_EVENT	/;"	d
IEVENT_MDIO_SCAN_EVENT	include/fsl_tgec.h	/^#define IEVENT_MDIO_SCAN_EVENT	/;"	d
IEVENT_MMRD	include/fsl_dtsec.h	/^#define IEVENT_MMRD	/;"	d
IEVENT_MMWR	include/fsl_dtsec.h	/^#define IEVENT_MMWR	/;"	d
IEVENT_MSRO	include/fsl_dtsec.h	/^#define IEVENT_MSRO	/;"	d
IEVENT_MSRO	include/tsec.h	/^#define IEVENT_MSRO	/;"	d
IEVENT_RDPE	include/fsl_dtsec.h	/^#define IEVENT_RDPE	/;"	d
IEVENT_REM_FAULT	include/fsl_memac.h	/^#define IEVENT_REM_FAULT	/;"	d
IEVENT_REM_FAULT	include/fsl_tgec.h	/^#define IEVENT_REM_FAULT	/;"	d
IEVENT_RXB0	include/tsec.h	/^#define IEVENT_RXB0	/;"	d
IEVENT_RXC	include/fsl_dtsec.h	/^#define IEVENT_RXC	/;"	d
IEVENT_RXC	include/tsec.h	/^#define IEVENT_RXC	/;"	d
IEVENT_RXF0	include/tsec.h	/^#define IEVENT_RXF0	/;"	d
IEVENT_RX_ALIGN_ER	include/fsl_memac.h	/^#define IEVENT_RX_ALIGN_ER	/;"	d
IEVENT_RX_ALIGN_ER	include/fsl_tgec.h	/^#define IEVENT_RX_ALIGN_ER	/;"	d
IEVENT_RX_CRC_ER	include/fsl_memac.h	/^#define IEVENT_RX_CRC_ER	/;"	d
IEVENT_RX_CRC_ER	include/fsl_tgec.h	/^#define IEVENT_RX_CRC_ER	/;"	d
IEVENT_RX_ECC_ER	include/fsl_memac.h	/^#define IEVENT_RX_ECC_ER	/;"	d
IEVENT_RX_ECC_ER	include/fsl_tgec.h	/^#define IEVENT_RX_ECC_ER	/;"	d
IEVENT_RX_FIFO_OVFL	include/fsl_memac.h	/^#define IEVENT_RX_FIFO_OVFL	/;"	d
IEVENT_RX_FIFO_OVFL	include/fsl_tgec.h	/^#define IEVENT_RX_FIFO_OVFL	/;"	d
IEVENT_RX_FRAG_FRM	include/fsl_memac.h	/^#define IEVENT_RX_FRAG_FRM	/;"	d
IEVENT_RX_FRAG_FRM	include/fsl_tgec.h	/^#define IEVENT_RX_FRAG_FRM	/;"	d
IEVENT_RX_JAB_FRM	include/fsl_memac.h	/^#define IEVENT_RX_JAB_FRM	/;"	d
IEVENT_RX_JAB_FRM	include/fsl_tgec.h	/^#define IEVENT_RX_JAB_FRM	/;"	d
IEVENT_RX_LEN_ER	include/fsl_memac.h	/^#define IEVENT_RX_LEN_ER	/;"	d
IEVENT_RX_LEN_ER	include/fsl_tgec.h	/^#define IEVENT_RX_LEN_ER	/;"	d
IEVENT_RX_OVRSZ_FRM	include/fsl_memac.h	/^#define IEVENT_RX_OVRSZ_FRM	/;"	d
IEVENT_RX_OVRSZ_FRM	include/fsl_tgec.h	/^#define IEVENT_RX_OVRSZ_FRM	/;"	d
IEVENT_RX_RUNT_FRM	include/fsl_memac.h	/^#define IEVENT_RX_RUNT_FRM	/;"	d
IEVENT_RX_RUNT_FRM	include/fsl_tgec.h	/^#define IEVENT_RX_RUNT_FRM	/;"	d
IEVENT_TDPE	include/fsl_dtsec.h	/^#define IEVENT_TDPE	/;"	d
IEVENT_TXB	include/tsec.h	/^#define IEVENT_TXB	/;"	d
IEVENT_TXC	include/fsl_dtsec.h	/^#define IEVENT_TXC	/;"	d
IEVENT_TXC	include/tsec.h	/^#define IEVENT_TXC	/;"	d
IEVENT_TXE	include/fsl_dtsec.h	/^#define IEVENT_TXE	/;"	d
IEVENT_TXE	include/tsec.h	/^#define IEVENT_TXE	/;"	d
IEVENT_TXF	include/tsec.h	/^#define IEVENT_TXF	/;"	d
IEVENT_TX_ECC_ER	include/fsl_memac.h	/^#define IEVENT_TX_ECC_ER	/;"	d
IEVENT_TX_ECC_ER	include/fsl_tgec.h	/^#define IEVENT_TX_ECC_ER	/;"	d
IEVENT_TX_ER	include/fsl_memac.h	/^#define IEVENT_TX_ER	/;"	d
IEVENT_TX_ER	include/fsl_tgec.h	/^#define IEVENT_TX_ER	/;"	d
IEVENT_TX_FIFO_UNFL	include/fsl_memac.h	/^#define IEVENT_TX_FIFO_UNFL	/;"	d
IEVENT_TX_FIFO_UNFL	include/fsl_tgec.h	/^#define IEVENT_TX_FIFO_UNFL	/;"	d
IEVENT_XFUN	include/fsl_dtsec.h	/^#define IEVENT_XFUN	/;"	d
IEVENT_XFUN	include/tsec.h	/^#define IEVENT_XFUN	/;"	d
IE_BADA	arch/arm/include/asm/omap_mmc.h	/^#define IE_BADA	/;"	d
IE_BRR	arch/arm/include/asm/omap_mmc.h	/^#define IE_BRR	/;"	d
IE_BWR	arch/arm/include/asm/omap_mmc.h	/^#define IE_BWR	/;"	d
IE_CC	arch/arm/include/asm/omap_mmc.h	/^#define IE_CC	/;"	d
IE_CCRC	arch/arm/include/asm/omap_mmc.h	/^#define IE_CCRC	/;"	d
IE_CEB	arch/arm/include/asm/omap_mmc.h	/^#define IE_CEB	/;"	d
IE_CERR	arch/arm/include/asm/omap_mmc.h	/^#define IE_CERR	/;"	d
IE_CIE	arch/arm/include/asm/omap_mmc.h	/^#define IE_CIE	/;"	d
IE_CTO	arch/arm/include/asm/omap_mmc.h	/^#define IE_CTO	/;"	d
IE_DCRC	arch/arm/include/asm/omap_mmc.h	/^#define IE_DCRC	/;"	d
IE_DEB	arch/arm/include/asm/omap_mmc.h	/^#define IE_DEB	/;"	d
IE_DTO	arch/arm/include/asm/omap_mmc.h	/^#define IE_DTO	/;"	d
IE_IRQ0	arch/mips/include/asm/mipsregs.h	/^#define IE_IRQ0	/;"	d
IE_IRQ1	arch/mips/include/asm/mipsregs.h	/^#define IE_IRQ1	/;"	d
IE_IRQ2	arch/mips/include/asm/mipsregs.h	/^#define IE_IRQ2	/;"	d
IE_IRQ3	arch/mips/include/asm/mipsregs.h	/^#define IE_IRQ3	/;"	d
IE_IRQ4	arch/mips/include/asm/mipsregs.h	/^#define IE_IRQ4	/;"	d
IE_IRQ5	arch/mips/include/asm/mipsregs.h	/^#define IE_IRQ5	/;"	d
IE_SW0	arch/mips/include/asm/mipsregs.h	/^#define IE_SW0	/;"	d
IE_SW1	arch/mips/include/asm/mipsregs.h	/^#define IE_SW1	/;"	d
IE_TC	arch/arm/include/asm/omap_mmc.h	/^#define IE_TC	/;"	d
IF	include/sym53c8xx.h	/^#define IF(/;"	d
IFCTL	arch/sh/include/asm/cpu_sh7722.h	/^#define IFCTL /;"	d
IFC_AMASK	include/fsl_ifc.h	/^#define IFC_AMASK(/;"	d
IFC_AMASK_MASK	include/fsl_ifc.h	/^#define IFC_AMASK_MASK	/;"	d
IFC_AMASK_REG_LEN	include/fsl_ifc.h	/^#define IFC_AMASK_REG_LEN	/;"	d
IFC_AMASK_SHIFT	include/fsl_ifc.h	/^#define IFC_AMASK_SHIFT	/;"	d
IFC_AMASK_USED_LEN	include/fsl_ifc.h	/^#define IFC_AMASK_USED_LEN	/;"	d
IFC_CCR_CLK_DIV	include/fsl_ifc.h	/^#define IFC_CCR_CLK_DIV(/;"	d
IFC_CCR_CLK_DIV_MASK	include/fsl_ifc.h	/^#define IFC_CCR_CLK_DIV_MASK	/;"	d
IFC_CCR_CLK_DIV_SHIFT	include/fsl_ifc.h	/^#define IFC_CCR_CLK_DIV_SHIFT	/;"	d
IFC_CCR_CLK_DLY	include/fsl_ifc.h	/^#define IFC_CCR_CLK_DLY(/;"	d
IFC_CCR_CLK_DLY_MASK	include/fsl_ifc.h	/^#define IFC_CCR_CLK_DLY_MASK	/;"	d
IFC_CCR_CLK_DLY_SHIFT	include/fsl_ifc.h	/^#define IFC_CCR_CLK_DLY_SHIFT	/;"	d
IFC_CCR_FB_IFC_CLK_SEL	include/fsl_ifc.h	/^#define IFC_CCR_FB_IFC_CLK_SEL	/;"	d
IFC_CCR_INV_CLK_EN	include/fsl_ifc.h	/^#define IFC_CCR_INV_CLK_EN	/;"	d
IFC_CCR_MASK	include/fsl_ifc.h	/^#define IFC_CCR_MASK	/;"	d
IFC_CM_ERATTR0_ERAID	include/fsl_ifc.h	/^#define IFC_CM_ERATTR0_ERAID	/;"	d
IFC_CM_ERATTR0_ERTYP_READ	include/fsl_ifc.h	/^#define IFC_CM_ERATTR0_ERTYP_READ	/;"	d
IFC_CM_ERATTR0_ESRCID	include/fsl_ifc.h	/^#define IFC_CM_ERATTR0_ESRCID	/;"	d
IFC_CM_EVTER_EN_CSEREN	include/fsl_ifc.h	/^#define IFC_CM_EVTER_EN_CSEREN	/;"	d
IFC_CM_EVTER_INTR_EN_CSERIREN	include/fsl_ifc.h	/^#define IFC_CM_EVTER_INTR_EN_CSERIREN	/;"	d
IFC_CM_EVTER_STAT_CSER	include/fsl_ifc.h	/^#define IFC_CM_EVTER_STAT_CSER	/;"	d
IFC_CS0	include/fsl_ifc.h	/^	IFC_CS0,$/;"	e	enum:ifc_chip_sel
IFC_CS1	include/fsl_ifc.h	/^	IFC_CS1,$/;"	e	enum:ifc_chip_sel
IFC_CS2	include/fsl_ifc.h	/^	IFC_CS2,$/;"	e	enum:ifc_chip_sel
IFC_CS3	include/fsl_ifc.h	/^	IFC_CS3,$/;"	e	enum:ifc_chip_sel
IFC_CS4	include/fsl_ifc.h	/^	IFC_CS4,$/;"	e	enum:ifc_chip_sel
IFC_CS5	include/fsl_ifc.h	/^	IFC_CS5,$/;"	e	enum:ifc_chip_sel
IFC_CS6	include/fsl_ifc.h	/^	IFC_CS6,$/;"	e	enum:ifc_chip_sel
IFC_CS7	include/fsl_ifc.h	/^	IFC_CS7,$/;"	e	enum:ifc_chip_sel
IFC_CSOR_REG_LEN	include/fsl_ifc.h	/^#define IFC_CSOR_REG_LEN	/;"	d
IFC_CSOR_USED_LEN	include/fsl_ifc.h	/^#define IFC_CSOR_USED_LEN	/;"	d
IFC_CSPR_REG_LEN	include/fsl_ifc.h	/^#define IFC_CSPR_REG_LEN	/;"	d
IFC_CSPR_USED_LEN	include/fsl_ifc.h	/^#define IFC_CSPR_USED_LEN	/;"	d
IFC_CSR_CLK_STAT_STABLE	include/fsl_ifc.h	/^#define IFC_CSR_CLK_STAT_STABLE	/;"	d
IFC_FCM_BASE_ADDR	include/fsl_ifc.h	/^#define IFC_FCM_BASE_ADDR /;"	d
IFC_FIR_OP_BTRD	include/fsl_ifc.h	/^	IFC_FIR_OP_BTRD,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CA0	include/fsl_ifc.h	/^	IFC_FIR_OP_CA0,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CA1	include/fsl_ifc.h	/^	IFC_FIR_OP_CA1,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CA2	include/fsl_ifc.h	/^	IFC_FIR_OP_CA2,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CA3	include/fsl_ifc.h	/^	IFC_FIR_OP_CA3,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD0	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD0,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD1	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD1,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD2	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD2,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD3	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD3,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD4	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD4,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD5	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD5,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD6	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD6,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CMD7	include/fsl_ifc.h	/^	IFC_FIR_OP_CMD7,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW0	include/fsl_ifc.h	/^	IFC_FIR_OP_CW0,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW1	include/fsl_ifc.h	/^	IFC_FIR_OP_CW1,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW2	include/fsl_ifc.h	/^	IFC_FIR_OP_CW2,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW3	include/fsl_ifc.h	/^	IFC_FIR_OP_CW3,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW4	include/fsl_ifc.h	/^	IFC_FIR_OP_CW4,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW5	include/fsl_ifc.h	/^	IFC_FIR_OP_CW5,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW6	include/fsl_ifc.h	/^	IFC_FIR_OP_CW6,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_CW7	include/fsl_ifc.h	/^	IFC_FIR_OP_CW7,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_NOP	include/fsl_ifc.h	/^	IFC_FIR_OP_NOP,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_NWAIT	include/fsl_ifc.h	/^	IFC_FIR_OP_NWAIT,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RA0	include/fsl_ifc.h	/^	IFC_FIR_OP_RA0,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RA1	include/fsl_ifc.h	/^	IFC_FIR_OP_RA1,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RA2	include/fsl_ifc.h	/^	IFC_FIR_OP_RA2,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RA3	include/fsl_ifc.h	/^	IFC_FIR_OP_RA3,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RB	include/fsl_ifc.h	/^	IFC_FIR_OP_RB,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RBCD	include/fsl_ifc.h	/^	IFC_FIR_OP_RBCD,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_RDSTAT	include/fsl_ifc.h	/^	IFC_FIR_OP_RDSTAT,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_SBRD	include/fsl_ifc.h	/^	IFC_FIR_OP_SBRD,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_UA	include/fsl_ifc.h	/^	IFC_FIR_OP_UA,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_WBCD	include/fsl_ifc.h	/^	IFC_FIR_OP_WBCD,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FIR_OP_WFR	include/fsl_ifc.h	/^	IFC_FIR_OP_WFR,$/;"	e	enum:ifc_nand_fir_opcodes
IFC_FTIM0	include/fsl_ifc.h	/^	IFC_FTIM0,$/;"	e	enum:ifc_ftims
IFC_FTIM1	include/fsl_ifc.h	/^	IFC_FTIM1,$/;"	e	enum:ifc_ftims
IFC_FTIM2	include/fsl_ifc.h	/^	IFC_FTIM2,$/;"	e	enum:ifc_ftims
IFC_FTIM3	include/fsl_ifc.h	/^	IFC_FTIM3,$/;"	e	enum:ifc_ftims
IFC_FTIM_REG_LEN	include/fsl_ifc.h	/^#define IFC_FTIM_REG_LEN	/;"	d
IFC_FTIM_USED_LEN	include/fsl_ifc.h	/^#define IFC_FTIM_USED_LEN	/;"	d
IFC_GCR_MASK	include/fsl_ifc.h	/^#define IFC_GCR_MASK	/;"	d
IFC_GCR_SOFT_RST_ALL	include/fsl_ifc.h	/^#define IFC_GCR_SOFT_RST_ALL	/;"	d
IFC_GCR_TBCTL_TRN_TIME	include/fsl_ifc.h	/^#define IFC_GCR_TBCTL_TRN_TIME	/;"	d
IFC_GCR_TBCTL_TRN_TIME_SHIFT	include/fsl_ifc.h	/^#define IFC_GCR_TBCTL_TRN_TIME_SHIFT	/;"	d
IFC_GPCM_EEIER_PERIR_EN	include/fsl_ifc.h	/^#define IFC_GPCM_EEIER_PERIR_EN	/;"	d
IFC_GPCM_EEIER_TOERIR_EN	include/fsl_ifc.h	/^#define IFC_GPCM_EEIER_TOERIR_EN	/;"	d
IFC_GPCM_ERATTR0_ERAID	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERAID	/;"	d
IFC_GPCM_ERATTR0_ERCS_CS0	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERCS_CS0	/;"	d
IFC_GPCM_ERATTR0_ERCS_CS1	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERCS_CS1	/;"	d
IFC_GPCM_ERATTR0_ERCS_CS2	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERCS_CS2	/;"	d
IFC_GPCM_ERATTR0_ERCS_CS3	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERCS_CS3	/;"	d
IFC_GPCM_ERATTR0_ERSRCID	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERSRCID	/;"	d
IFC_GPCM_ERATTR0_ERTYPE_READ	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR0_ERTYPE_READ	/;"	d
IFC_GPCM_ERATTR2_PERR_BEAT	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR2_PERR_BEAT	/;"	d
IFC_GPCM_ERATTR2_PERR_BYTE	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR2_PERR_BYTE	/;"	d
IFC_GPCM_ERATTR2_PERR_DATA_PHASE	include/fsl_ifc.h	/^#define IFC_GPCM_ERATTR2_PERR_DATA_PHASE	/;"	d
IFC_GPCM_EVTER_EN_PER_EN	include/fsl_ifc.h	/^#define IFC_GPCM_EVTER_EN_PER_EN	/;"	d
IFC_GPCM_EVTER_EN_TOER_EN	include/fsl_ifc.h	/^#define IFC_GPCM_EVTER_EN_TOER_EN	/;"	d
IFC_GPCM_EVTER_STAT_PER	include/fsl_ifc.h	/^#define IFC_GPCM_EVTER_STAT_PER	/;"	d
IFC_GPCM_EVTER_STAT_TOER	include/fsl_ifc.h	/^#define IFC_GPCM_EVTER_STAT_TOER	/;"	d
IFC_GPCM_STAT_BSY	include/fsl_ifc.h	/^#define IFC_GPCM_STAT_BSY	/;"	d
IFC_NAND_AUTOBOOT_TRGR_BOOT_LD	include/fsl_ifc.h	/^#define IFC_NAND_AUTOBOOT_TRGR_BOOT_LD	/;"	d
IFC_NAND_AUTOBOOT_TRGR_RCW_LD	include/fsl_ifc.h	/^#define IFC_NAND_AUTOBOOT_TRGR_RCW_LD	/;"	d
IFC_NAND_BC	include/fsl_ifc.h	/^#define IFC_NAND_BC	/;"	d
IFC_NAND_COL_CA_MASK	include/fsl_ifc.h	/^#define IFC_NAND_COL_CA_MASK	/;"	d
IFC_NAND_COL_MS	include/fsl_ifc.h	/^#define IFC_NAND_COL_MS	/;"	d
IFC_NAND_CSEL	include/fsl_ifc.h	/^#define IFC_NAND_CSEL	/;"	d
IFC_NAND_CSEL_CS0	include/fsl_ifc.h	/^#define IFC_NAND_CSEL_CS0	/;"	d
IFC_NAND_CSEL_CS1	include/fsl_ifc.h	/^#define IFC_NAND_CSEL_CS1	/;"	d
IFC_NAND_CSEL_CS2	include/fsl_ifc.h	/^#define IFC_NAND_CSEL_CS2	/;"	d
IFC_NAND_CSEL_CS3	include/fsl_ifc.h	/^#define IFC_NAND_CSEL_CS3	/;"	d
IFC_NAND_CSEL_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_CSEL_SHIFT	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_MASK	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_SHIFT	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_MASK	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_SHIFT	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_MASK	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_SHIFT	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_MASK	/;"	d
IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_SHIFT	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_MASK	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_SHIFT	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_MASK	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_SHIFT	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_MASK	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_SHIFT	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_MASK	/;"	d
IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_SHIFT	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_MASK	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_SHIFT	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_MASK	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_SHIFT	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_MASK	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_SHIFT	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_MASK	/;"	d
IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_SHIFT	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_MASK	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_SHIFT	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_MASK	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_SHIFT	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_MASK	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_SHIFT	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_MASK	/;"	d
IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_SHIFT	/;"	d
IFC_NAND_ERATTR0_ERCS_CS0	include/fsl_ifc.h	/^#define IFC_NAND_ERATTR0_ERCS_CS0	/;"	d
IFC_NAND_ERATTR0_ERCS_CS1	include/fsl_ifc.h	/^#define IFC_NAND_ERATTR0_ERCS_CS1	/;"	d
IFC_NAND_ERATTR0_ERCS_CS2	include/fsl_ifc.h	/^#define IFC_NAND_ERATTR0_ERCS_CS2	/;"	d
IFC_NAND_ERATTR0_ERCS_CS3	include/fsl_ifc.h	/^#define IFC_NAND_ERATTR0_ERCS_CS3	/;"	d
IFC_NAND_ERATTR0_ERTTYPE_READ	include/fsl_ifc.h	/^#define IFC_NAND_ERATTR0_ERTTYPE_READ	/;"	d
IFC_NAND_ERATTR0_MASK	include/fsl_ifc.h	/^#define IFC_NAND_ERATTR0_MASK	/;"	d
IFC_NAND_EVTER_EN_ECCER_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_EN_ECCER_EN	/;"	d
IFC_NAND_EVTER_EN_FTOER_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_EN_FTOER_EN	/;"	d
IFC_NAND_EVTER_EN_OPC_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_EN_OPC_EN	/;"	d
IFC_NAND_EVTER_EN_PGRDCMPL_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_EN_PGRDCMPL_EN	/;"	d
IFC_NAND_EVTER_EN_WPER_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_EN_WPER_EN	/;"	d
IFC_NAND_EVTER_INTR_ECCERIR_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_INTR_ECCERIR_EN	/;"	d
IFC_NAND_EVTER_INTR_FTOERIR_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_INTR_FTOERIR_EN	/;"	d
IFC_NAND_EVTER_INTR_OPCIR_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_INTR_OPCIR_EN	/;"	d
IFC_NAND_EVTER_INTR_PGRDCMPLIR_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_INTR_PGRDCMPLIR_EN	/;"	d
IFC_NAND_EVTER_INTR_WPERIR_EN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_INTR_WPERIR_EN	/;"	d
IFC_NAND_EVTER_STAT_BBI_SRCH_SE	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_BBI_SRCH_SE	/;"	d
IFC_NAND_EVTER_STAT_BOOT_DN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_BOOT_DN	/;"	d
IFC_NAND_EVTER_STAT_ECCER	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_ECCER	/;"	d
IFC_NAND_EVTER_STAT_FTOER	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_FTOER	/;"	d
IFC_NAND_EVTER_STAT_OPC	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_OPC	/;"	d
IFC_NAND_EVTER_STAT_RCW_DN	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_RCW_DN	/;"	d
IFC_NAND_EVTER_STAT_WPER	include/fsl_ifc.h	/^#define IFC_NAND_EVTER_STAT_WPER	/;"	d
IFC_NAND_FCR0_CMD0	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD0	/;"	d
IFC_NAND_FCR0_CMD0_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD0_SHIFT	/;"	d
IFC_NAND_FCR0_CMD1	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD1	/;"	d
IFC_NAND_FCR0_CMD1_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD1_SHIFT	/;"	d
IFC_NAND_FCR0_CMD2	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD2	/;"	d
IFC_NAND_FCR0_CMD2_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD2_SHIFT	/;"	d
IFC_NAND_FCR0_CMD3	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD3	/;"	d
IFC_NAND_FCR0_CMD3_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR0_CMD3_SHIFT	/;"	d
IFC_NAND_FCR1_CMD4	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD4	/;"	d
IFC_NAND_FCR1_CMD4_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD4_SHIFT	/;"	d
IFC_NAND_FCR1_CMD5	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD5	/;"	d
IFC_NAND_FCR1_CMD5_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD5_SHIFT	/;"	d
IFC_NAND_FCR1_CMD6	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD6	/;"	d
IFC_NAND_FCR1_CMD6_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD6_SHIFT	/;"	d
IFC_NAND_FCR1_CMD7	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD7	/;"	d
IFC_NAND_FCR1_CMD7_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FCR1_CMD7_SHIFT	/;"	d
IFC_NAND_FIR0_OP0	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP0	/;"	d
IFC_NAND_FIR0_OP0_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP0_SHIFT	/;"	d
IFC_NAND_FIR0_OP1	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP1	/;"	d
IFC_NAND_FIR0_OP1_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP1_SHIFT	/;"	d
IFC_NAND_FIR0_OP2	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP2	/;"	d
IFC_NAND_FIR0_OP2_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP2_SHIFT	/;"	d
IFC_NAND_FIR0_OP3	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP3	/;"	d
IFC_NAND_FIR0_OP3_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP3_SHIFT	/;"	d
IFC_NAND_FIR0_OP4	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP4	/;"	d
IFC_NAND_FIR0_OP4_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR0_OP4_SHIFT	/;"	d
IFC_NAND_FIR1_OP5	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP5	/;"	d
IFC_NAND_FIR1_OP5_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP5_SHIFT	/;"	d
IFC_NAND_FIR1_OP6	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP6	/;"	d
IFC_NAND_FIR1_OP6_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP6_SHIFT	/;"	d
IFC_NAND_FIR1_OP7	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP7	/;"	d
IFC_NAND_FIR1_OP7_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP7_SHIFT	/;"	d
IFC_NAND_FIR1_OP8	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP8	/;"	d
IFC_NAND_FIR1_OP8_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP8_SHIFT	/;"	d
IFC_NAND_FIR1_OP9	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP9	/;"	d
IFC_NAND_FIR1_OP9_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR1_OP9_SHIFT	/;"	d
IFC_NAND_FIR2_OP10	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP10	/;"	d
IFC_NAND_FIR2_OP10_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP10_SHIFT	/;"	d
IFC_NAND_FIR2_OP11	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP11	/;"	d
IFC_NAND_FIR2_OP11_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP11_SHIFT	/;"	d
IFC_NAND_FIR2_OP12	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP12	/;"	d
IFC_NAND_FIR2_OP12_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP12_SHIFT	/;"	d
IFC_NAND_FIR2_OP13	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP13	/;"	d
IFC_NAND_FIR2_OP13_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP13_SHIFT	/;"	d
IFC_NAND_FIR2_OP14	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP14	/;"	d
IFC_NAND_FIR2_OP14_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_FIR2_OP14_SHIFT	/;"	d
IFC_NAND_MDR_RDATA0	include/fsl_ifc.h	/^#define IFC_NAND_MDR_RDATA0	/;"	d
IFC_NAND_MDR_RDATA1	include/fsl_ifc.h	/^#define IFC_NAND_MDR_RDATA1	/;"	d
IFC_NAND_NCFGR_ADDR_MODE_RC0	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_ADDR_MODE_RC0	/;"	d
IFC_NAND_NCFGR_ADDR_MODE_RC1	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_ADDR_MODE_RC1	/;"	d
IFC_NAND_NCFGR_BOOT	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_BOOT	/;"	d
IFC_NAND_NCFGR_NUM_LOOP	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_NUM_LOOP(/;"	d
IFC_NAND_NCFGR_NUM_LOOP_MASK	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_NUM_LOOP_MASK	/;"	d
IFC_NAND_NCFGR_NUM_LOOP_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_NUM_LOOP_SHIFT	/;"	d
IFC_NAND_NCFGR_NUM_WAIT_MASK	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_NUM_WAIT_MASK	/;"	d
IFC_NAND_NCFGR_NUM_WAIT_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_NCFGR_NUM_WAIT_SHIFT	/;"	d
IFC_NAND_NCR_FTOCNT	include/fsl_ifc.h	/^#define IFC_NAND_NCR_FTOCNT(/;"	d
IFC_NAND_NCR_FTOCNT_MASK	include/fsl_ifc.h	/^#define IFC_NAND_NCR_FTOCNT_MASK	/;"	d
IFC_NAND_NCR_FTOCNT_SHIFT	include/fsl_ifc.h	/^#define IFC_NAND_NCR_FTOCNT_SHIFT	/;"	d
IFC_NAND_NFSR_RS0	include/fsl_ifc.h	/^#define IFC_NAND_NFSR_RS0	/;"	d
IFC_NAND_NFSR_RS1	include/fsl_ifc.h	/^#define IFC_NAND_NFSR_RS1	/;"	d
IFC_NAND_SEQ_STRT_AUTO_CPB	include/fsl_ifc.h	/^#define IFC_NAND_SEQ_STRT_AUTO_CPB	/;"	d
IFC_NAND_SEQ_STRT_AUTO_ERS	include/fsl_ifc.h	/^#define IFC_NAND_SEQ_STRT_AUTO_ERS	/;"	d
IFC_NAND_SEQ_STRT_AUTO_PGM	include/fsl_ifc.h	/^#define IFC_NAND_SEQ_STRT_AUTO_PGM	/;"	d
IFC_NAND_SEQ_STRT_AUTO_RD	include/fsl_ifc.h	/^#define IFC_NAND_SEQ_STRT_AUTO_RD	/;"	d
IFC_NAND_SEQ_STRT_AUTO_STAT_RD	include/fsl_ifc.h	/^#define IFC_NAND_SEQ_STRT_AUTO_STAT_RD	/;"	d
IFC_NAND_SEQ_STRT_FIR_STRT	include/fsl_ifc.h	/^#define IFC_NAND_SEQ_STRT_FIR_STRT	/;"	d
IFC_NAND_SRAM_INIT_EN	include/fsl_ifc.h	/^#define IFC_NAND_SRAM_INIT_EN	/;"	d
IFC_NORCR_MASK	include/fsl_ifc.h	/^#define IFC_NORCR_MASK	/;"	d
IFC_NORCR_NUM_PHASE	include/fsl_ifc.h	/^#define IFC_NORCR_NUM_PHASE(/;"	d
IFC_NORCR_NUM_PHASE_MASK	include/fsl_ifc.h	/^#define IFC_NORCR_NUM_PHASE_MASK	/;"	d
IFC_NORCR_NUM_PHASE_SHIFT	include/fsl_ifc.h	/^#define IFC_NORCR_NUM_PHASE_SHIFT	/;"	d
IFC_NORCR_STOCNT	include/fsl_ifc.h	/^#define IFC_NORCR_STOCNT(/;"	d
IFC_NORCR_STOCNT_MASK	include/fsl_ifc.h	/^#define IFC_NORCR_STOCNT_MASK	/;"	d
IFC_NORCR_STOCNT_SHIFT	include/fsl_ifc.h	/^#define IFC_NORCR_STOCNT_SHIFT	/;"	d
IFC_NOR_ERATTR0_ERAID	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERAID	/;"	d
IFC_NOR_ERATTR0_ERCS_CS0	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERCS_CS0	/;"	d
IFC_NOR_ERATTR0_ERCS_CS1	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERCS_CS1	/;"	d
IFC_NOR_ERATTR0_ERCS_CS2	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERCS_CS2	/;"	d
IFC_NOR_ERATTR0_ERCS_CS3	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERCS_CS3	/;"	d
IFC_NOR_ERATTR0_ERSRCID	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERSRCID	/;"	d
IFC_NOR_ERATTR0_ERTYPE_READ	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR0_ERTYPE_READ	/;"	d
IFC_NOR_ERATTR2_ER_NUM_PHASE_EXP	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR2_ER_NUM_PHASE_EXP	/;"	d
IFC_NOR_ERATTR2_ER_NUM_PHASE_PER	include/fsl_ifc.h	/^#define IFC_NOR_ERATTR2_ER_NUM_PHASE_PER	/;"	d
IFC_NOR_EVTER_EN_OPCEN_NOR	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_EN_OPCEN_NOR	/;"	d
IFC_NOR_EVTER_EN_STOEREN	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_EN_STOEREN	/;"	d
IFC_NOR_EVTER_EN_WPEREN	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_EN_WPEREN	/;"	d
IFC_NOR_EVTER_INTR_OPCEN_NOR	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_INTR_OPCEN_NOR	/;"	d
IFC_NOR_EVTER_INTR_STOEREN	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_INTR_STOEREN	/;"	d
IFC_NOR_EVTER_INTR_WPEREN	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_INTR_WPEREN	/;"	d
IFC_NOR_EVTER_STAT_OPC_NOR	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_STAT_OPC_NOR	/;"	d
IFC_NOR_EVTER_STAT_STOER	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_STAT_STOER	/;"	d
IFC_NOR_EVTER_STAT_WPER	include/fsl_ifc.h	/^#define IFC_NOR_EVTER_STAT_WPER	/;"	d
IFC_RB_STAT_READY_CS0	include/fsl_ifc.h	/^#define IFC_RB_STAT_READY_CS0	/;"	d
IFC_RB_STAT_READY_CS1	include/fsl_ifc.h	/^#define IFC_RB_STAT_READY_CS1	/;"	d
IFC_RB_STAT_READY_CS2	include/fsl_ifc.h	/^#define IFC_RB_STAT_READY_CS2	/;"	d
IFC_RB_STAT_READY_CS3	include/fsl_ifc.h	/^#define IFC_RB_STAT_READY_CS3	/;"	d
IFC_RREGS_4KOFFSET	include/fsl_ifc.h	/^#define IFC_RREGS_4KOFFSET	/;"	d
IFC_RREGS_64KOFFSET	include/fsl_ifc.h	/^#define IFC_RREGS_64KOFFSET	/;"	d
IFDR	drivers/i2c/mxc_i2c.c	/^#define IFDR	/;"	d	file:
IFDTOOL	Makefile	/^IFDTOOL=$(objtree)\/tools\/ifdtool$/;"	m
IFDTOOL_FLAGS	Makefile	/^IFDTOOL_FLAGS  = -f 0:$(objtree)\/u-boot.dtb$/;"	m
IFDTOOL_ME_FLAGS	Makefile	/^IFDTOOL_ME_FLAGS  = -D $(srctree)\/board\/$(BOARDDIR)\/descriptor.bin$/;"	m
IFDTOOL_VERSION	tools/ifdtool.h	/^#define IFDTOOL_VERSION /;"	d
IFE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	IFE	/;"	d
IFE_C_E_PHY_ID	drivers/net/e1000.h	/^#define IFE_C_E_PHY_ID /;"	d
IFE_E_PHY_ID	drivers/net/e1000.h	/^#define IFE_E_PHY_ID /;"	d
IFE_PESC_100BTX_POWER_DOWN	drivers/net/e1000.h	/^#define IFE_PESC_100BTX_POWER_DOWN /;"	d
IFE_PESC_10BTX_POWER_DOWN	drivers/net/e1000.h	/^#define IFE_PESC_10BTX_POWER_DOWN /;"	d
IFE_PESC_DUPLEX	drivers/net/e1000.h	/^#define IFE_PESC_DUPLEX /;"	d
IFE_PESC_PHY_ADDR_MASK	drivers/net/e1000.h	/^#define IFE_PESC_PHY_ADDR_MASK /;"	d
IFE_PESC_POLARITY_REVERSED	drivers/net/e1000.h	/^#define IFE_PESC_POLARITY_REVERSED /;"	d
IFE_PESC_POLARITY_REVERSED_SHIFT	drivers/net/e1000.h	/^#define IFE_PESC_POLARITY_REVERSED_SHIFT /;"	d
IFE_PESC_REDUCED_POWER_DOWN_DISABLE	drivers/net/e1000.h	/^#define IFE_PESC_REDUCED_POWER_DOWN_DISABLE /;"	d
IFE_PESC_SPEED	drivers/net/e1000.h	/^#define IFE_PESC_SPEED /;"	d
IFE_PHC_ABILITY_CHECK	drivers/net/e1000.h	/^#define IFE_PHC_ABILITY_CHECK /;"	d
IFE_PHC_DISTANCE_MASK	drivers/net/e1000.h	/^#define IFE_PHC_DISTANCE_MASK /;"	d
IFE_PHC_HIGHZ	drivers/net/e1000.h	/^#define IFE_PHC_HIGHZ /;"	d
IFE_PHC_HWI_ENABLE	drivers/net/e1000.h	/^#define IFE_PHC_HWI_ENABLE /;"	d
IFE_PHC_LOWZ	drivers/net/e1000.h	/^#define IFE_PHC_LOWZ /;"	d
IFE_PHC_LOW_HIGH_Z_MASK	drivers/net/e1000.h	/^#define IFE_PHC_LOW_HIGH_Z_MASK /;"	d
IFE_PHC_MDIX_RESET_ALL_MASK	drivers/net/e1000.h	/^#define IFE_PHC_MDIX_RESET_ALL_MASK /;"	d
IFE_PHC_RESET_ALL_MASK	drivers/net/e1000.h	/^#define IFE_PHC_RESET_ALL_MASK /;"	d
IFE_PHC_TEST_EXEC	drivers/net/e1000.h	/^#define IFE_PHC_TEST_EXEC /;"	d
IFE_PHY_EQUALIZER	drivers/net/e1000.h	/^#define IFE_PHY_EQUALIZER /;"	d
IFE_PHY_EXTENDED_STATUS_CONTROL	drivers/net/e1000.h	/^#define IFE_PHY_EXTENDED_STATUS_CONTROL /;"	d
IFE_PHY_HWI_CONTROL	drivers/net/e1000.h	/^#define IFE_PHY_HWI_CONTROL /;"	d
IFE_PHY_MDIX_CONTROL	drivers/net/e1000.h	/^#define IFE_PHY_MDIX_CONTROL /;"	d
IFE_PHY_PREM_EOF_ERR	drivers/net/e1000.h	/^#define IFE_PHY_PREM_EOF_ERR /;"	d
IFE_PHY_RCV_DISCONNECT	drivers/net/e1000.h	/^#define IFE_PHY_RCV_DISCONNECT /;"	d
IFE_PHY_RCV_EOF_ERR	drivers/net/e1000.h	/^#define IFE_PHY_RCV_EOF_ERR /;"	d
IFE_PHY_RCV_ERROT_FRAME	drivers/net/e1000.h	/^#define IFE_PHY_RCV_ERROT_FRAME /;"	d
IFE_PHY_RCV_FALSE_CARRIER	drivers/net/e1000.h	/^#define IFE_PHY_RCV_FALSE_CARRIER /;"	d
IFE_PHY_RCV_SYMBOL_ERR	drivers/net/e1000.h	/^#define IFE_PHY_RCV_SYMBOL_ERR /;"	d
IFE_PHY_SPECIAL_CONTROL	drivers/net/e1000.h	/^#define IFE_PHY_SPECIAL_CONTROL /;"	d
IFE_PHY_SPECIAL_CONTROL_LED	drivers/net/e1000.h	/^#define IFE_PHY_SPECIAL_CONTROL_LED /;"	d
IFE_PHY_TX_JABBER_DETECT	drivers/net/e1000.h	/^#define IFE_PHY_TX_JABBER_DETECT /;"	d
IFE_PLUS_E_PHY_ID	drivers/net/e1000.h	/^#define IFE_PLUS_E_PHY_ID /;"	d
IFE_PMC_AUTO_MDIX	drivers/net/e1000.h	/^#define IFE_PMC_AUTO_MDIX /;"	d
IFE_PMC_AUTO_MDIX_COMPLETE	drivers/net/e1000.h	/^#define IFE_PMC_AUTO_MDIX_COMPLETE /;"	d
IFE_PMC_FORCE_MDIX	drivers/net/e1000.h	/^#define IFE_PMC_FORCE_MDIX /;"	d
IFE_PMC_MDIX_MODE_SHIFT	drivers/net/e1000.h	/^#define IFE_PMC_MDIX_MODE_SHIFT /;"	d
IFE_PMC_MDIX_STATUS	drivers/net/e1000.h	/^#define IFE_PMC_MDIX_STATUS /;"	d
IFE_PSCL_PROBE_LEDS_OFF	drivers/net/e1000.h	/^#define IFE_PSCL_PROBE_LEDS_OFF /;"	d
IFE_PSCL_PROBE_LEDS_ON	drivers/net/e1000.h	/^#define IFE_PSCL_PROBE_LEDS_ON /;"	d
IFE_PSCL_PROBE_MODE	drivers/net/e1000.h	/^#define IFE_PSCL_PROBE_MODE /;"	d
IFE_PSC_AUTO_POLARITY_DISABLE	drivers/net/e1000.h	/^#define IFE_PSC_AUTO_POLARITY_DISABLE /;"	d
IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT	drivers/net/e1000.h	/^#define IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT /;"	d
IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN	drivers/net/e1000.h	/^#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN /;"	d
IFE_PSC_FORCE_POLARITY	drivers/net/e1000.h	/^#define IFE_PSC_FORCE_POLARITY /;"	d
IFE_PSC_FORCE_POLARITY_SHIFT	drivers/net/e1000.h	/^#define IFE_PSC_FORCE_POLARITY_SHIFT /;"	d
IFE_PSC_JABBER_FUNC_DISABLE	drivers/net/e1000.h	/^#define IFE_PSC_JABBER_FUNC_DISABLE /;"	d
IFFALSE	include/sym53c8xx.h	/^#define IFFALSE(/;"	d
IFGP_MASK	drivers/net/xilinx_ll_temac.h	/^#define IFGP_MASK	/;"	d
IFGP_POS	drivers/net/xilinx_ll_temac.h	/^#define IFGP_POS	/;"	d
IFIS	drivers/usb/host/r8a66597.h	/^#define	IFIS	/;"	d
IFN_A0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A0,$/;"	e	enum:__anona307945e0103	file:
IFN_A1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A1,$/;"	e	enum:__anona307945e0103	file:
IFN_A10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A10,$/;"	e	enum:__anona307945e0103	file:
IFN_A11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A11,$/;"	e	enum:__anona307945e0103	file:
IFN_A12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A12,$/;"	e	enum:__anona307945e0103	file:
IFN_A13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A13,$/;"	e	enum:__anona307945e0103	file:
IFN_A14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A14,$/;"	e	enum:__anona307945e0103	file:
IFN_A15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A15,$/;"	e	enum:__anona307945e0103	file:
IFN_A16	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A16,$/;"	e	enum:__anona307945e0103	file:
IFN_A17	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A17,$/;"	e	enum:__anona307945e0103	file:
IFN_A18	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A18,$/;"	e	enum:__anona307945e0103	file:
IFN_A19	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A19,$/;"	e	enum:__anona307945e0103	file:
IFN_A2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A2,$/;"	e	enum:__anona307945e0103	file:
IFN_A3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A3,$/;"	e	enum:__anona307945e0103	file:
IFN_A4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A4,$/;"	e	enum:__anona307945e0103	file:
IFN_A5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A5,$/;"	e	enum:__anona307945e0103	file:
IFN_A6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A6,$/;"	e	enum:__anona307945e0103	file:
IFN_A7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A7,$/;"	e	enum:__anona307945e0103	file:
IFN_A8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A8,$/;"	e	enum:__anona307945e0103	file:
IFN_A9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_A9,$/;"	e	enum:__anona307945e0103	file:
IFN_AUDIO_CLKA_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AUDIO_CLKA_A,$/;"	e	enum:__anona307945e0103	file:
IFN_AUDIO_CLKB_B	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AUDIO_CLKB_B,$/;"	e	enum:__anona307945e0103	file:
IFN_AVB_AVTP_CAPTURE_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AVB_AVTP_CAPTURE_A,$/;"	e	enum:__anona307945e0103	file:
IFN_AVB_AVTP_MATCH_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AVB_AVTP_MATCH_A,$/;"	e	enum:__anona307945e0103	file:
IFN_AVB_LINK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AVB_LINK,$/;"	e	enum:__anona307945e0103	file:
IFN_AVB_MAGIC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AVB_MAGIC,$/;"	e	enum:__anona307945e0103	file:
IFN_AVB_MDC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AVB_MDC,$/;"	e	enum:__anona307945e0103	file:
IFN_AVB_PHY_INT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_AVB_PHY_INT,$/;"	e	enum:__anona307945e0103	file:
IFN_BSx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_BSx,$/;"	e	enum:__anona307945e0103	file:
IFN_CS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_CS0x,$/;"	e	enum:__anona307945e0103	file:
IFN_CS1x_A26	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_CS1x_A26,$/;"	e	enum:__anona307945e0103	file:
IFN_CTS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_CTS0x,$/;"	e	enum:__anona307945e0103	file:
IFN_CTS1x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_CTS1x,$/;"	e	enum:__anona307945e0103	file:
IFN_D0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D0,$/;"	e	enum:__anona307945e0103	file:
IFN_D1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D1,$/;"	e	enum:__anona307945e0103	file:
IFN_D10	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D10,$/;"	e	enum:__anona307945e0103	file:
IFN_D11	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D11,$/;"	e	enum:__anona307945e0103	file:
IFN_D12	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D12,$/;"	e	enum:__anona307945e0103	file:
IFN_D13	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D13,$/;"	e	enum:__anona307945e0103	file:
IFN_D14	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D14,$/;"	e	enum:__anona307945e0103	file:
IFN_D15	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D15,$/;"	e	enum:__anona307945e0103	file:
IFN_D2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D2,$/;"	e	enum:__anona307945e0103	file:
IFN_D3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D3,$/;"	e	enum:__anona307945e0103	file:
IFN_D4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D4,$/;"	e	enum:__anona307945e0103	file:
IFN_D5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D5,$/;"	e	enum:__anona307945e0103	file:
IFN_D6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D6,$/;"	e	enum:__anona307945e0103	file:
IFN_D7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D7,$/;"	e	enum:__anona307945e0103	file:
IFN_D8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D8,$/;"	e	enum:__anona307945e0103	file:
IFN_D9	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_D9,$/;"	e	enum:__anona307945e0103	file:
IFN_EX_WAIT0_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_EX_WAIT0_A,$/;"	e	enum:__anona307945e0103	file:
IFN_HCTS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_HCTS0x,$/;"	e	enum:__anona307945e0103	file:
IFN_HRTS0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_HRTS0x,$/;"	e	enum:__anona307945e0103	file:
IFN_HRX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_HRX0,$/;"	e	enum:__anona307945e0103	file:
IFN_HSCK0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_HSCK0,$/;"	e	enum:__anona307945e0103	file:
IFN_HTX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_HTX0,$/;"	e	enum:__anona307945e0103	file:
IFN_IRQ0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_IRQ0,$/;"	e	enum:__anona307945e0103	file:
IFN_IRQ1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_IRQ1,$/;"	e	enum:__anona307945e0103	file:
IFN_IRQ2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_IRQ2,$/;"	e	enum:__anona307945e0103	file:
IFN_IRQ3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_IRQ3,$/;"	e	enum:__anona307945e0103	file:
IFN_IRQ4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_IRQ4,$/;"	e	enum:__anona307945e0103	file:
IFN_IRQ5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_IRQ5,$/;"	e	enum:__anona307945e0103	file:
IFN_MLB_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_MLB_CLK,$/;"	e	enum:__anona307945e0103	file:
IFN_MLB_DAT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_MLB_DAT,$/;"	e	enum:__anona307945e0103	file:
IFN_MLB_SIG	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_MLB_SIG,$/;"	e	enum:__anona307945e0103	file:
IFN_MSIOF0_SS1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_MSIOF0_SS1,$/;"	e	enum:__anona307945e0103	file:
IFN_MSIOF0_SS2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_MSIOF0_SS2,$/;"	e	enum:__anona307945e0103	file:
IFN_MSIOF0_SYNC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_MSIOF0_SYNC,$/;"	e	enum:__anona307945e0103	file:
IFN_PWM0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_PWM0,$/;"	e	enum:__anona307945e0103	file:
IFN_PWM1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_PWM1_A,$/;"	e	enum:__anona307945e0103	file:
IFN_PWM2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_PWM2_A,$/;"	e	enum:__anona307945e0103	file:
IFN_RD_WRx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RD_WRx,$/;"	e	enum:__anona307945e0103	file:
IFN_RDx	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RDx,$/;"	e	enum:__anona307945e0103	file:
IFN_RTS0x_TANS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RTS0x_TANS,$/;"	e	enum:__anona307945e0103	file:
IFN_RTS1x_TANS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RTS1x_TANS,$/;"	e	enum:__anona307945e0103	file:
IFN_RX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RX0,$/;"	e	enum:__anona307945e0103	file:
IFN_RX1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RX1_A,$/;"	e	enum:__anona307945e0103	file:
IFN_RX2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_RX2_A,$/;"	e	enum:__anona307945e0103	file:
IFN_SCK0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SCK0,$/;"	e	enum:__anona307945e0103	file:
IFN_SCK2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SCK2,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_CD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_CD,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_CLK,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_CMD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_CMD,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_DAT0,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_DAT1,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_DAT2,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_DAT3,$/;"	e	enum:__anona307945e0103	file:
IFN_SD0_WP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD0_WP,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_CD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_CD,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_CLK,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_CMD	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_CMD,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_DAT0,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_DAT1,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_DAT2,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_DAT3,$/;"	e	enum:__anona307945e0103	file:
IFN_SD1_WP	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD1_WP,$/;"	e	enum:__anona307945e0103	file:
IFN_SD2_CLK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD2_CLK,$/;"	e	enum:__anona307945e0103	file:
IFN_SD2_DAT0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD2_DAT0,$/;"	e	enum:__anona307945e0103	file:
IFN_SD2_DAT1	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD2_DAT1,$/;"	e	enum:__anona307945e0103	file:
IFN_SD2_DAT2	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD2_DAT2,$/;"	e	enum:__anona307945e0103	file:
IFN_SD2_DAT3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD2_DAT3,$/;"	e	enum:__anona307945e0103	file:
IFN_SD2_DS	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD2_DS,$/;"	e	enum:__anona307945e0103	file:
IFN_SD3_DAT4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD3_DAT4,$/;"	e	enum:__anona307945e0103	file:
IFN_SD3_DAT5	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD3_DAT5,$/;"	e	enum:__anona307945e0103	file:
IFN_SD3_DAT6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD3_DAT6,$/;"	e	enum:__anona307945e0103	file:
IFN_SD3_DAT7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SD3_DAT7,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SCK0129	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SCK0129,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SCK34	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SCK34,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SCK4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SCK4,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SCK6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SCK6,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SCK78	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SCK78,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA0,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA1_A,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA2_A,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA3	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA3,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA4,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA6,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA7	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA7,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA8	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA8,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_SDATA9_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_SDATA9_A,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_WS0129	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_WS0129,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_WS34	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_WS34,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_WS4	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_WS4,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_WS6	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_WS6,$/;"	e	enum:__anona307945e0103	file:
IFN_SSI_WS78	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_SSI_WS78,$/;"	e	enum:__anona307945e0103	file:
IFN_TX0	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_TX0,$/;"	e	enum:__anona307945e0103	file:
IFN_TX1_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_TX1_A,$/;"	e	enum:__anona307945e0103	file:
IFN_TX2_A	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_TX2_A,$/;"	e	enum:__anona307945e0103	file:
IFN_USB0_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB0_OVC,$/;"	e	enum:__anona307945e0103	file:
IFN_USB0_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB0_PWEN,$/;"	e	enum:__anona307945e0103	file:
IFN_USB1_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB1_OVC,$/;"	e	enum:__anona307945e0103	file:
IFN_USB1_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB1_PWEN,$/;"	e	enum:__anona307945e0103	file:
IFN_USB30_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB30_OVC,$/;"	e	enum:__anona307945e0103	file:
IFN_USB30_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB30_PWEN,$/;"	e	enum:__anona307945e0103	file:
IFN_USB31_OVC	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB31_OVC,$/;"	e	enum:__anona307945e0103	file:
IFN_USB31_PWEN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_USB31_PWEN,$/;"	e	enum:__anona307945e0103	file:
IFN_WE0x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_WE0x,$/;"	e	enum:__anona307945e0103	file:
IFN_WE1x	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IFN_WE1x,$/;"	e	enum:__anona307945e0103	file:
IFR0	arch/sh/include/asm/cpu_sh7722.h	/^#define IFR0 /;"	d
IFSGEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define IFSGEN /;"	d
IFS_MAX	drivers/net/e1000.h	/^#define IFS_MAX	/;"	d
IFS_MIN	drivers/net/e1000.h	/^#define IFS_MIN	/;"	d
IFS_RATIO	drivers/net/e1000.h	/^#define IFS_RATIO	/;"	d
IFS_STEP	drivers/net/e1000.h	/^#define IFS_STEP	/;"	d
IFTRUE	include/sym53c8xx.h	/^#define IFTRUE(/;"	d
IF_BIT_0	lib/lzma/LzmaDec.c	/^#define IF_BIT_0(/;"	d	file:
IF_BIT_0_CHECK	lib/lzma/LzmaDec.c	/^#define IF_BIT_0_CHECK(/;"	d	file:
IF_CONF	drivers/video/mx3fb.c	/^#define IF_CONF	/;"	d	file:
IF_DEFAULT	include/fsl_memac.h	/^#define IF_DEFAULT	/;"	d
IF_MODE_EN_AUTO	include/fsl_memac.h	/^#define IF_MODE_EN_AUTO	/;"	d
IF_MODE_GMII	include/fsl_memac.h	/^#define IF_MODE_GMII	/;"	d
IF_MODE_MASK	include/fsl_memac.h	/^#define IF_MODE_MASK	/;"	d
IF_MODE_RG	include/fsl_memac.h	/^#define IF_MODE_RG	/;"	d
IF_MODE_RM	include/fsl_memac.h	/^#define IF_MODE_RM	/;"	d
IF_MODE_SETSP_1000M	include/fsl_memac.h	/^#define IF_MODE_SETSP_1000M	/;"	d
IF_MODE_SETSP_100M	include/fsl_memac.h	/^#define IF_MODE_SETSP_100M	/;"	d
IF_MODE_SETSP_10M	include/fsl_memac.h	/^#define IF_MODE_SETSP_10M	/;"	d
IF_MODE_SETSP_MASK	include/fsl_memac.h	/^#define IF_MODE_SETSP_MASK	/;"	d
IF_MODE_XGMII	include/fsl_memac.h	/^#define IF_MODE_XGMII	/;"	d
IF_TYPE_ATAPI	include/blk.h	/^	IF_TYPE_ATAPI,$/;"	e	enum:if_type
IF_TYPE_COUNT	include/blk.h	/^	IF_TYPE_COUNT,			\/* Number of interface types *\/$/;"	e	enum:if_type
IF_TYPE_DOC	include/blk.h	/^	IF_TYPE_DOC,$/;"	e	enum:if_type
IF_TYPE_HOST	include/blk.h	/^	IF_TYPE_HOST,$/;"	e	enum:if_type
IF_TYPE_IDE	include/blk.h	/^	IF_TYPE_IDE,$/;"	e	enum:if_type
IF_TYPE_MMC	include/blk.h	/^	IF_TYPE_MMC,$/;"	e	enum:if_type
IF_TYPE_SATA	include/blk.h	/^	IF_TYPE_SATA,$/;"	e	enum:if_type
IF_TYPE_SCSI	include/blk.h	/^	IF_TYPE_SCSI,$/;"	e	enum:if_type
IF_TYPE_SD	include/blk.h	/^	IF_TYPE_SD,$/;"	e	enum:if_type
IF_TYPE_SYSTEMACE	include/blk.h	/^	IF_TYPE_SYSTEMACE,$/;"	e	enum:if_type
IF_TYPE_UNKNOWN	include/blk.h	/^	IF_TYPE_UNKNOWN = 0,$/;"	e	enum:if_type
IF_TYPE_USB	include/blk.h	/^	IF_TYPE_USB,$/;"	e	enum:if_type
IF_fdt	tools/ifdtool.c	/^	IF_fdt,$/;"	e	enum:input_file_type_t	file:
IF_normal	tools/ifdtool.c	/^	IF_normal,$/;"	e	enum:input_file_type_t	file:
IF_uboot	tools/ifdtool.c	/^	IF_uboot,$/;"	e	enum:input_file_type_t	file:
IGD_FD	arch/x86/include/asm/arch-queensbay/tnc.h	/^#define IGD_FD	/;"	d
IGNORE_BULK_OUT	drivers/usb/gadget/f_mass_storage.c	/^#define IGNORE_BULK_OUT	/;"	d	file:
IGNORE_ECC_DONE	drivers/mtd/nand/denali.h	/^#define IGNORE_ECC_DONE	/;"	d
IGNORE_ECC_DONE__FLAG	drivers/mtd/nand/denali.h	/^#define     IGNORE_ECC_DONE__FLAG	/;"	d
IGP01E1000_ANALOG_FUSE_BYPASS	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_BYPASS /;"	d
IGP01E1000_ANALOG_FUSE_COARSE_10	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_COARSE_10 /;"	d
IGP01E1000_ANALOG_FUSE_COARSE_MASK	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_COARSE_MASK /;"	d
IGP01E1000_ANALOG_FUSE_COARSE_THRESH	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_COARSE_THRESH /;"	d
IGP01E1000_ANALOG_FUSE_CONTROL	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_CONTROL /;"	d
IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL /;"	d
IGP01E1000_ANALOG_FUSE_FINE_1	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_FINE_1 /;"	d
IGP01E1000_ANALOG_FUSE_FINE_10	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_FINE_10 /;"	d
IGP01E1000_ANALOG_FUSE_FINE_MASK	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_FINE_MASK /;"	d
IGP01E1000_ANALOG_FUSE_POLY_MASK	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_POLY_MASK /;"	d
IGP01E1000_ANALOG_FUSE_STATUS	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_FUSE_STATUS /;"	d
IGP01E1000_ANALOG_REGS_PAGE	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_REGS_PAGE /;"	d
IGP01E1000_ANALOG_SPARE_FUSE_ENABLED	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_SPARE_FUSE_ENABLED /;"	d
IGP01E1000_ANALOG_SPARE_FUSE_STATUS	drivers/net/e1000.h	/^#define IGP01E1000_ANALOG_SPARE_FUSE_STATUS /;"	d
IGP01E1000_GMII_FIFO	drivers/net/e1000.h	/^#define IGP01E1000_GMII_FIFO	/;"	d
IGP01E1000_GMII_FLEX_SPD	drivers/net/e1000.h	/^#define IGP01E1000_GMII_FLEX_SPD /;"	d
IGP01E1000_GMII_SPD	drivers/net/e1000.h	/^#define IGP01E1000_GMII_SPD /;"	d
IGP01E1000_IEEE_FORCE_GIGA	drivers/net/e1000.h	/^#define IGP01E1000_IEEE_FORCE_GIGA	/;"	d
IGP01E1000_IEEE_REGS_PAGE	drivers/net/e1000.h	/^#define IGP01E1000_IEEE_REGS_PAGE	/;"	d
IGP01E1000_IEEE_RESTART_AUTONEG	drivers/net/e1000.h	/^#define IGP01E1000_IEEE_RESTART_AUTONEG /;"	d
IGP01E1000_I_PHY_ID	drivers/net/e1000.h	/^#define IGP01E1000_I_PHY_ID	/;"	d
IGP01E1000_PHY_AGC_A	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_A /;"	d
IGP01E1000_PHY_AGC_B	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_B /;"	d
IGP01E1000_PHY_AGC_C	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_C /;"	d
IGP01E1000_PHY_AGC_D	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_D /;"	d
IGP01E1000_PHY_AGC_PARAM_A	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_PARAM_A /;"	d
IGP01E1000_PHY_AGC_PARAM_B	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_PARAM_B /;"	d
IGP01E1000_PHY_AGC_PARAM_C	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_PARAM_C /;"	d
IGP01E1000_PHY_AGC_PARAM_D	drivers/net/e1000.h	/^#define IGP01E1000_PHY_AGC_PARAM_D /;"	d
IGP01E1000_PHY_ANALOG_CLASS_A	drivers/net/e1000.h	/^#define IGP01E1000_PHY_ANALOG_CLASS_A /;"	d
IGP01E1000_PHY_ANALOG_TX_STATE	drivers/net/e1000.h	/^#define IGP01E1000_PHY_ANALOG_TX_STATE /;"	d
IGP01E1000_PHY_CHANNEL_NUM	drivers/net/e1000.h	/^#define IGP01E1000_PHY_CHANNEL_NUM /;"	d
IGP01E1000_PHY_CHANNEL_QUALITY	drivers/net/e1000.h	/^#define IGP01E1000_PHY_CHANNEL_QUALITY	/;"	d
IGP01E1000_PHY_DSP_FFE	drivers/net/e1000.h	/^#define IGP01E1000_PHY_DSP_FFE /;"	d
IGP01E1000_PHY_DSP_FFE_CM_CP	drivers/net/e1000.h	/^#define IGP01E1000_PHY_DSP_FFE_CM_CP /;"	d
IGP01E1000_PHY_DSP_FFE_DEFAULT	drivers/net/e1000.h	/^#define IGP01E1000_PHY_DSP_FFE_DEFAULT /;"	d
IGP01E1000_PHY_DSP_RESET	drivers/net/e1000.h	/^#define IGP01E1000_PHY_DSP_RESET /;"	d
IGP01E1000_PHY_DSP_SET	drivers/net/e1000.h	/^#define IGP01E1000_PHY_DSP_SET /;"	d
IGP01E1000_PHY_EDAC_MU_INDEX	drivers/net/e1000.h	/^#define IGP01E1000_PHY_EDAC_MU_INDEX /;"	d
IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS	drivers/net/e1000.h	/^#define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS /;"	d
IGP01E1000_PHY_FORCE_ANALOG_ENABLE	drivers/net/e1000.h	/^#define IGP01E1000_PHY_FORCE_ANALOG_ENABLE /;"	d
IGP01E1000_PHY_LINK_HEALTH	drivers/net/e1000.h	/^#define IGP01E1000_PHY_LINK_HEALTH	/;"	d
IGP01E1000_PHY_PAGE_SELECT	drivers/net/e1000.h	/^#define IGP01E1000_PHY_PAGE_SELECT	/;"	d
IGP01E1000_PHY_PCS_CTRL_REG	drivers/net/e1000.h	/^#define IGP01E1000_PHY_PCS_CTRL_REG /;"	d
IGP01E1000_PHY_PCS_INIT_REG	drivers/net/e1000.h	/^#define IGP01E1000_PHY_PCS_INIT_REG /;"	d
IGP01E1000_PHY_PORT_CONFIG	drivers/net/e1000.h	/^#define IGP01E1000_PHY_PORT_CONFIG	/;"	d
IGP01E1000_PHY_PORT_CTRL	drivers/net/e1000.h	/^#define IGP01E1000_PHY_PORT_CTRL	/;"	d
IGP01E1000_PHY_PORT_STATUS	drivers/net/e1000.h	/^#define IGP01E1000_PHY_PORT_STATUS	/;"	d
IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT	drivers/net/e1000.h	/^#define IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT /;"	d
IGP01E1000_PSCFR_DISABLE_JABBER	drivers/net/e1000.h	/^#define IGP01E1000_PSCFR_DISABLE_JABBER /;"	d
IGP01E1000_PSCFR_DISABLE_TPLOOPBACK	drivers/net/e1000.h	/^#define IGP01E1000_PSCFR_DISABLE_TPLOOPBACK /;"	d
IGP01E1000_PSCFR_DISABLE_TRANSMIT	drivers/net/e1000.h	/^#define IGP01E1000_PSCFR_DISABLE_TRANSMIT /;"	d
IGP01E1000_PSCFR_PRE_EN	drivers/net/e1000.h	/^#define IGP01E1000_PSCFR_PRE_EN /;"	d
IGP01E1000_PSCFR_SMART_SPEED	drivers/net/e1000.h	/^#define IGP01E1000_PSCFR_SMART_SPEED /;"	d
IGP01E1000_PSCR_AUTO_MDIX	drivers/net/e1000.h	/^#define IGP01E1000_PSCR_AUTO_MDIX /;"	d
IGP01E1000_PSCR_CORRECT_NC_SCMBLR	drivers/net/e1000.h	/^#define IGP01E1000_PSCR_CORRECT_NC_SCMBLR /;"	d
IGP01E1000_PSCR_FLIP_CHIP	drivers/net/e1000.h	/^#define IGP01E1000_PSCR_FLIP_CHIP /;"	d
IGP01E1000_PSCR_FORCE_MDI_MDIX	drivers/net/e1000.h	/^#define IGP01E1000_PSCR_FORCE_MDI_MDIX /;"	d
IGP01E1000_PSCR_TEN_CRS_SELECT	drivers/net/e1000.h	/^#define IGP01E1000_PSCR_TEN_CRS_SELECT /;"	d
IGP01E1000_PSCR_TP_LOOPBACK	drivers/net/e1000.h	/^#define IGP01E1000_PSCR_TP_LOOPBACK /;"	d
IGP02E1000_PHY_AGC_A	drivers/net/e1000.h	/^#define IGP02E1000_PHY_AGC_A /;"	d
IGP02E1000_PHY_AGC_B	drivers/net/e1000.h	/^#define IGP02E1000_PHY_AGC_B /;"	d
IGP02E1000_PHY_AGC_C	drivers/net/e1000.h	/^#define IGP02E1000_PHY_AGC_C /;"	d
IGP02E1000_PHY_AGC_D	drivers/net/e1000.h	/^#define IGP02E1000_PHY_AGC_D /;"	d
IGP02E1000_PHY_CHANNEL_NUM	drivers/net/e1000.h	/^#define IGP02E1000_PHY_CHANNEL_NUM /;"	d
IGP02E1000_PHY_POWER_MGMT	drivers/net/e1000.h	/^#define IGP02E1000_PHY_POWER_MGMT	/;"	d
IGP02E1000_PM_D0_LPLU	drivers/net/e1000.h	/^#define IGP02E1000_PM_D0_LPLU /;"	d
IGP02E1000_PM_D3_LPLU	drivers/net/e1000.h	/^#define IGP02E1000_PM_D3_LPLU /;"	d
IGP02E1000_PM_SPD	drivers/net/e1000.h	/^#define IGP02E1000_PM_SPD /;"	d
IGP03E1000_E_PHY_ID	drivers/net/e1000.h	/^#define IGP03E1000_E_PHY_ID /;"	d
IGP_ACTIVITY_LED_ENABLE	drivers/net/e1000.h	/^#define IGP_ACTIVITY_LED_ENABLE /;"	d
IGP_ACTIVITY_LED_MASK	drivers/net/e1000.h	/^#define IGP_ACTIVITY_LED_MASK /;"	d
IGP_LED3_MODE	drivers/net/e1000.h	/^#define IGP_LED3_MODE /;"	d
IHOST_PROC_CLK_APB0_CLKGATE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_APB0_CLKGATE	/;"	d
IHOST_PROC_CLK_ARM_PERIPH_CLKGATE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_ARM_PERIPH_CLKGATE	/;"	d
IHOST_PROC_CLK_ARM_SWITCH_CLKGATE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_ARM_SWITCH_CLKGATE	/;"	d
IHOST_PROC_CLK_CORE0_CLKGATE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_CORE0_CLKGATE	/;"	d
IHOST_PROC_CLK_CORE1_CLKGATE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_CORE1_CLKGATE	/;"	d
IHOST_PROC_CLK_PLLARMA	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMA	/;"	d
IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK	/;"	d
IHOST_PROC_CLK_PLLARMA__PLLARM_NDIV_INT_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMA__PLLARM_NDIV_INT_R	/;"	d
IHOST_PROC_CLK_PLLARMA__PLLARM_PDIV_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMA__PLLARM_PDIV_R	/;"	d
IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_POST_RESETB	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_POST_RESETB	/;"	d
IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB	/;"	d
IHOST_PROC_CLK_PLLARMB	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMB	/;"	d
IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R	/;"	d
IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH	/;"	d
IHOST_PROC_CLK_POLICY_CTL	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_CTL	/;"	d
IHOST_PROC_CLK_POLICY_CTL__GO	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_CTL__GO	/;"	d
IHOST_PROC_CLK_POLICY_CTL__GO_AC	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_CTL__GO_AC	/;"	d
IHOST_PROC_CLK_POLICY_FREQ	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_FREQ	/;"	d
IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R	/;"	d
IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R	/;"	d
IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R	/;"	d
IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R	/;"	d
IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE	/;"	d
IHOST_PROC_CLK_WR_ACCESS	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IHOST_PROC_CLK_WR_ACCESS	/;"	d
IH_ARCH	include/image.h	/^	IH_ARCH,$/;"	e	enum:ih_category
IH_ARCH_ALPHA	include/image.h	/^	IH_ARCH_ALPHA,			\/* Alpha	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_ARC	include/image.h	/^	IH_ARCH_ARC,			\/* Synopsys DesignWare ARC *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_ARM	include/image.h	/^	IH_ARCH_ARM,			\/* ARM		*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_ARM64	include/image.h	/^	IH_ARCH_ARM64,			\/* ARM64	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_AVR32	include/image.h	/^	IH_ARCH_AVR32,			\/* AVR32	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_BLACKFIN	include/image.h	/^	IH_ARCH_BLACKFIN,		\/* Blackfin	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_COUNT	include/image.h	/^	IH_ARCH_COUNT,$/;"	e	enum:__anond41eed710203
IH_ARCH_DEFAULT	arch/arc/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/arm/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/avr32/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/blackfin/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/m68k/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/microblaze/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/mips/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/nds32/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/nios2/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/openrisc/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/powerpc/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/sandbox/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/sh/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/sparc/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/x86/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	arch/xtensa/include/asm/u-boot.h	/^#define IH_ARCH_DEFAULT /;"	d
IH_ARCH_DEFAULT	tools/imagetool.h	/^#define IH_ARCH_DEFAULT	/;"	d
IH_ARCH_I386	include/image.h	/^	IH_ARCH_I386,			\/* Intel x86	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_IA64	include/image.h	/^	IH_ARCH_IA64,			\/* IA64		*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_INVALID	include/image.h	/^	IH_ARCH_INVALID		= 0,	\/* Invalid CPU	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_M68K	include/image.h	/^	IH_ARCH_M68K,			\/* M68K		*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_MICROBLAZE	include/image.h	/^	IH_ARCH_MICROBLAZE,		\/* MicroBlaze   *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_MIPS	include/image.h	/^	IH_ARCH_MIPS,			\/* MIPS		*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_MIPS64	include/image.h	/^	IH_ARCH_MIPS64,			\/* MIPS	 64 Bit *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_NDS32	include/image.h	/^	IH_ARCH_NDS32,			\/* ANDES Technology - NDS32  *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_NIOS	include/image.h	/^	IH_ARCH_NIOS,			\/* Nios-32	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_NIOS2	include/image.h	/^	IH_ARCH_NIOS2,			\/* Nios-II	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_OPENRISC	include/image.h	/^	IH_ARCH_OPENRISC,		\/* OpenRISC 1000  *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_PPC	include/image.h	/^	IH_ARCH_PPC,			\/* PowerPC	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_S390	include/image.h	/^	IH_ARCH_S390,			\/* IBM S390	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_SANDBOX	include/image.h	/^	IH_ARCH_SANDBOX,		\/* Sandbox architecture (test only) *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_SH	include/image.h	/^	IH_ARCH_SH,			\/* SuperH	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_SPARC	include/image.h	/^	IH_ARCH_SPARC,			\/* Sparc	*\/$/;"	e	enum:__anond41eed710203
IH_ARCH_SPARC64	include/image.h	/^	IH_ARCH_SPARC64,		\/* Sparc 64 Bit *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_ST200	include/image.h	/^	IH_ARCH_ST200,			\/* STMicroelectronics ST200  *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_X86_64	include/image.h	/^	IH_ARCH_X86_64,			\/* AMD x86_64, Intel and Via *\/$/;"	e	enum:__anond41eed710203
IH_ARCH_XTENSA	include/image.h	/^	IH_ARCH_XTENSA,			\/* Xtensa	*\/$/;"	e	enum:__anond41eed710203
IH_COMP	include/image.h	/^	IH_COMP,$/;"	e	enum:ih_category
IH_COMP_BZIP2	include/image.h	/^	IH_COMP_BZIP2,			\/* bzip2 Compression Used	*\/$/;"	e	enum:__anond41eed710403
IH_COMP_COUNT	include/image.h	/^	IH_COMP_COUNT,$/;"	e	enum:__anond41eed710403
IH_COMP_GZIP	include/image.h	/^	IH_COMP_GZIP,			\/* gzip	 Compression Used	*\/$/;"	e	enum:__anond41eed710403
IH_COMP_LZ4	include/image.h	/^	IH_COMP_LZ4,			\/* lz4   Compression Used	*\/$/;"	e	enum:__anond41eed710403
IH_COMP_LZMA	include/image.h	/^	IH_COMP_LZMA,			\/* lzma  Compression Used	*\/$/;"	e	enum:__anond41eed710403
IH_COMP_LZO	include/image.h	/^	IH_COMP_LZO,			\/* lzo   Compression Used	*\/$/;"	e	enum:__anond41eed710403
IH_COMP_NONE	include/image.h	/^	IH_COMP_NONE		= 0,	\/*  No	 Compression Used	*\/$/;"	e	enum:__anond41eed710403
IH_COUNT	include/image.h	/^	IH_COUNT,$/;"	e	enum:ih_category
IH_INITRD_ARCH	common/bootm.c	/^#define IH_INITRD_ARCH /;"	d	file:
IH_KEY_ISTYPE	fs/reiserfs/reiserfs_private.h	/^#define IH_KEY_ISTYPE(/;"	d
IH_KEY_OFFSET	fs/reiserfs/reiserfs_private.h	/^#define IH_KEY_OFFSET(/;"	d
IH_MAGIC	include/image.h	/^#define IH_MAGIC	/;"	d
IH_NMLEN	include/image.h	/^#define IH_NMLEN	/;"	d
IH_OS	include/image.h	/^	IH_OS,$/;"	e	enum:ih_category
IH_OS_4_4BSD	include/image.h	/^	IH_OS_4_4BSD,			\/* 4.4BSD	*\/$/;"	e	enum:__anond41eed710103
IH_OS_ARTOS	include/image.h	/^	IH_OS_ARTOS,			\/* ARTOS	*\/$/;"	e	enum:__anond41eed710103
IH_OS_COUNT	include/image.h	/^	IH_OS_COUNT,$/;"	e	enum:__anond41eed710103
IH_OS_DELL	include/image.h	/^	IH_OS_DELL,			\/* Dell		*\/$/;"	e	enum:__anond41eed710103
IH_OS_ESIX	include/image.h	/^	IH_OS_ESIX,			\/* Esix		*\/$/;"	e	enum:__anond41eed710103
IH_OS_FREEBSD	include/image.h	/^	IH_OS_FREEBSD,			\/* FreeBSD	*\/$/;"	e	enum:__anond41eed710103
IH_OS_INTEGRITY	include/image.h	/^	IH_OS_INTEGRITY,		\/* INTEGRITY	*\/$/;"	e	enum:__anond41eed710103
IH_OS_INVALID	include/image.h	/^	IH_OS_INVALID		= 0,	\/* Invalid OS	*\/$/;"	e	enum:__anond41eed710103
IH_OS_IRIX	include/image.h	/^	IH_OS_IRIX,			\/* Irix		*\/$/;"	e	enum:__anond41eed710103
IH_OS_LINUX	include/image.h	/^	IH_OS_LINUX,			\/* Linux	*\/$/;"	e	enum:__anond41eed710103
IH_OS_LYNXOS	include/image.h	/^	IH_OS_LYNXOS,			\/* LynxOS	*\/$/;"	e	enum:__anond41eed710103
IH_OS_NCR	include/image.h	/^	IH_OS_NCR,			\/* NCR		*\/$/;"	e	enum:__anond41eed710103
IH_OS_NETBSD	include/image.h	/^	IH_OS_NETBSD,			\/* NetBSD	*\/$/;"	e	enum:__anond41eed710103
IH_OS_OPENBSD	include/image.h	/^	IH_OS_OPENBSD,			\/* OpenBSD	*\/$/;"	e	enum:__anond41eed710103
IH_OS_OPENRTOS	include/image.h	/^	IH_OS_OPENRTOS,		\/* OpenRTOS	*\/$/;"	e	enum:__anond41eed710103
IH_OS_OSE	include/image.h	/^	IH_OS_OSE,			\/* OSE		*\/$/;"	e	enum:__anond41eed710103
IH_OS_PLAN9	include/image.h	/^	IH_OS_PLAN9,			\/* Plan 9	*\/$/;"	e	enum:__anond41eed710103
IH_OS_PSOS	include/image.h	/^	IH_OS_PSOS,			\/* pSOS		*\/$/;"	e	enum:__anond41eed710103
IH_OS_QNX	include/image.h	/^	IH_OS_QNX,			\/* QNX		*\/$/;"	e	enum:__anond41eed710103
IH_OS_RTEMS	include/image.h	/^	IH_OS_RTEMS,			\/* RTEMS	*\/$/;"	e	enum:__anond41eed710103
IH_OS_SCO	include/image.h	/^	IH_OS_SCO,			\/* SCO		*\/$/;"	e	enum:__anond41eed710103
IH_OS_SOLARIS	include/image.h	/^	IH_OS_SOLARIS,			\/* Solaris	*\/$/;"	e	enum:__anond41eed710103
IH_OS_SVR4	include/image.h	/^	IH_OS_SVR4,			\/* SVR4		*\/$/;"	e	enum:__anond41eed710103
IH_OS_UNITY	include/image.h	/^	IH_OS_UNITY,			\/* Unity OS	*\/$/;"	e	enum:__anond41eed710103
IH_OS_U_BOOT	include/image.h	/^	IH_OS_U_BOOT,			\/* Firmware	*\/$/;"	e	enum:__anond41eed710103
IH_OS_VXWORKS	include/image.h	/^	IH_OS_VXWORKS,			\/* VxWorks	*\/$/;"	e	enum:__anond41eed710103
IH_SIZE	fs/reiserfs/reiserfs_private.h	/^#define IH_SIZE /;"	d
IH_TYPE	include/image.h	/^	IH_TYPE,$/;"	e	enum:ih_category
IH_TYPE_AISIMAGE	include/image.h	/^	IH_TYPE_AISIMAGE,		\/* TI Davinci AIS Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_ATMELIMAGE	include/image.h	/^	IH_TYPE_ATMELIMAGE,		\/* ATMEL ROM bootable Image	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_COUNT	include/image.h	/^	IH_TYPE_COUNT,			\/* Number of image types *\/$/;"	e	enum:__anond41eed710303
IH_TYPE_FILESYSTEM	include/image.h	/^	IH_TYPE_FILESYSTEM,		\/* Filesystem Image (any type)	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_FIRMWARE	include/image.h	/^	IH_TYPE_FIRMWARE,		\/* Firmware Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_FLATDT	include/image.h	/^	IH_TYPE_FLATDT,			\/* Binary Flat Device Tree Blob	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_FPGA	include/image.h	/^	IH_TYPE_FPGA,			\/* FPGA Image *\/$/;"	e	enum:__anond41eed710303
IH_TYPE_GPIMAGE	include/image.h	/^	IH_TYPE_GPIMAGE,		\/* TI Keystone GPHeader Image	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_IMXIMAGE	include/image.h	/^	IH_TYPE_IMXIMAGE,		\/* Freescale IMXBoot Image	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_INVALID	include/image.h	/^	IH_TYPE_INVALID		= 0,	\/* Invalid Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_KERNEL	include/image.h	/^	IH_TYPE_KERNEL,			\/* OS Kernel Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_KERNEL_NOLOAD	include/image.h	/^	IH_TYPE_KERNEL_NOLOAD,$/;"	e	enum:__anond41eed710303
IH_TYPE_KWBIMAGE	include/image.h	/^	IH_TYPE_KWBIMAGE,		\/* Kirkwood Boot Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_LOADABLE	include/image.h	/^	IH_TYPE_LOADABLE,		\/* A list of typeless images	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_LPC32XXIMAGE	include/image.h	/^	IH_TYPE_LPC32XXIMAGE,		\/* x86 setup.bin Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_MULTI	include/image.h	/^	IH_TYPE_MULTI,			\/* Multi-File Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_MXSIMAGE	include/image.h	/^	IH_TYPE_MXSIMAGE,		\/* Freescale MXSBoot Image	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_OMAPIMAGE	include/image.h	/^	IH_TYPE_OMAPIMAGE,		\/* TI OMAP Config Header Image	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_PBLIMAGE	include/image.h	/^	IH_TYPE_PBLIMAGE,		\/* Freescale PBL Boot Image	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_RAMDISK	include/image.h	/^	IH_TYPE_RAMDISK,		\/* RAMDisk Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_RKIMAGE	include/image.h	/^	IH_TYPE_RKIMAGE,		\/* Rockchip Boot Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_RKSD	include/image.h	/^	IH_TYPE_RKSD,			\/* Rockchip SD card		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_RKSPI	include/image.h	/^	IH_TYPE_RKSPI,			\/* Rockchip SPI image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_SCRIPT	include/image.h	/^	IH_TYPE_SCRIPT,			\/* Script file			*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_SOCFPGAIMAGE	include/image.h	/^	IH_TYPE_SOCFPGAIMAGE,		\/* Altera SOCFPGA Preloader	*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_STANDALONE	include/image.h	/^	IH_TYPE_STANDALONE,		\/* Standalone Program		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_UBLIMAGE	include/image.h	/^	IH_TYPE_UBLIMAGE,		\/* Davinci UBL Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_VYBRIDIMAGE	include/image.h	/^	IH_TYPE_VYBRIDIMAGE,	\/* VYBRID .vyb Image *\/$/;"	e	enum:__anond41eed710303
IH_TYPE_X86_SETUP	include/image.h	/^	IH_TYPE_X86_SETUP,		\/* x86 setup.bin Image		*\/$/;"	e	enum:__anond41eed710303
IH_TYPE_ZYNQIMAGE	include/image.h	/^	IH_TYPE_ZYNQIMAGE,		\/* Xilinx Zynq Boot Image *\/$/;"	e	enum:__anond41eed710303
IH_TYPE_ZYNQMPIMAGE	include/image.h	/^	IH_TYPE_ZYNQMPIMAGE,		\/* Xilinx ZynqMP Boot Image *\/$/;"	e	enum:__anond41eed710303
IIC0	arch/powerpc/dts/arches.dts	/^			IIC0: i2c@ef600700 {$/;"	l
IIC0	arch/powerpc/dts/canyonlands.dts	/^			IIC0: i2c@ef600700 {$/;"	l
IIC0	arch/powerpc/dts/glacier.dts	/^			IIC0: i2c@ef600700 {$/;"	l
IIC0_ALT_BOOTPROM_ADDR	include/configs/katmai.h	/^#define IIC0_ALT_BOOTPROM_ADDR	/;"	d
IIC0_ALT_BOOTPROM_ADDR	include/configs/redwood.h	/^#define IIC0_ALT_BOOTPROM_ADDR	/;"	d
IIC0_ALT_BOOTPROM_ADDR	include/configs/yucca.h	/^#define IIC0_ALT_BOOTPROM_ADDR	/;"	d
IIC0_BOOTPROM_ADDR	include/configs/katmai.h	/^#define IIC0_BOOTPROM_ADDR	/;"	d
IIC0_BOOTPROM_ADDR	include/configs/redwood.h	/^#define IIC0_BOOTPROM_ADDR	/;"	d
IIC0_BOOTPROM_ADDR	include/configs/yucca.h	/^#define IIC0_BOOTPROM_ADDR	/;"	d
IIC0_CONTA	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define IIC0_CONTA /;"	d	file:
IIC0_CONTB	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define IIC0_CONTB /;"	d	file:
IIC0_DIMM0_ADDR	include/configs/redwood.h	/^#define IIC0_DIMM0_ADDR	/;"	d
IIC0_DIMM1_ADDR	include/configs/redwood.h	/^#define IIC0_DIMM1_ADDR	/;"	d
IIC0_PS33E	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define IIC0_PS33E /;"	d	file:
IIC0_SCL_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DISP_MARK, SSI_WS78_MARK, SCIFA2_RXD_B_MARK, IIC0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
IIC0_SCL_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_G0_MARK, MSIOF2_RXD_B_MARK, IIC0_SCL_D_MARK, AVB_TX_CLK_MARK,$/;"	e	enum:__anona307901d0103	file:
IIC0_SDA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT15_MARK, SSI_SCK78_MARK, SCIFA2_SCK_B_MARK, IIC0_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
IIC0_SDA_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_CRS_DV_MARK, VI0_G1_MARK, MSIOF2_TXD_B_MARK, IIC0_SDA_D_MARK,$/;"	e	enum:__anona307901d0103	file:
IIC1	arch/powerpc/dts/arches.dts	/^			IIC1: i2c@ef600800 {$/;"	l
IIC1	arch/powerpc/dts/canyonlands.dts	/^			IIC1: i2c@ef600800 {$/;"	l
IIC1	arch/powerpc/dts/glacier.dts	/^			IIC1: i2c@ef600800 {$/;"	l
IIC1_CONTA	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define IIC1_CONTA /;"	d	file:
IIC1_CONTB	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define IIC1_CONTB /;"	d	file:
IIC1_MSTP323	board/renesas/alt/alt.c	/^#define IIC1_MSTP323	/;"	d	file:
IIC1_MSTP323	board/renesas/silk/silk.c	/^#define IIC1_MSTP323	/;"	d	file:
IIC1_PS33E	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define IIC1_PS33E /;"	d	file:
IIC1_SCL_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IIC1_SCL_D_MARK, AVB_TXD6_MARK, SSI_WS5_B_MARK, ETH_TX_EN_MARK,$/;"	e	enum:__anona307901d0103	file:
IIC1_SDA_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_R0_MARK, SCIF2_TXD_C_MARK, IIC1_SDA_D_MARK, AVB_TXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
IIC_CNTL_AMD	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_CNTL_AMD	/;"	d
IIC_CNTL_CHT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_CNTL_CHT	/;"	d
IIC_CNTL_HMT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_CNTL_HMT	/;"	d
IIC_CNTL_PT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_CNTL_PT	/;"	d
IIC_CNTL_READ	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_CNTL_READ	/;"	d
IIC_CNTL_RPST	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_CNTL_RPST	/;"	d
IIC_CORE	board/amcc/bamboo/bamboo.h	/^typedef enum config_list {  IIC_CORE,$/;"	e	enum:config_list
IIC_DIRCNTL_MSC	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_DIRCNTL_MSC	/;"	d
IIC_DIRCNTL_MSDA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_DIRCNTL_MSDA	/;"	d
IIC_DIRCNTL_SCC	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_DIRCNTL_SCC	/;"	d
IIC_DIRCNTL_SDAC	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_DIRCNTL_SDAC	/;"	d
IIC_EXTSTS_BCS_FREE	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_EXTSTS_BCS_FREE	/;"	d
IIC_EXTSTS_BCS_MASK	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_EXTSTS_BCS_MASK	/;"	d
IIC_EXTSTS_ICT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_EXTSTS_ICT	/;"	d
IIC_EXTSTS_LA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_EXTSTS_LA	/;"	d
IIC_EXTSTS_XFRA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_EXTSTS_XFRA	/;"	d
IIC_MDCNTL_EGC	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_EGC	/;"	d
IIC_MDCNTL_EINT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_EINT	/;"	d
IIC_MDCNTL_ESM	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_ESM	/;"	d
IIC_MDCNTL_EUBS	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_EUBS	/;"	d
IIC_MDCNTL_FMDB	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_FMDB	/;"	d
IIC_MDCNTL_FSDB	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_FSDB	/;"	d
IIC_MDCNTL_FSM	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_FSM	/;"	d
IIC_MDCNTL_HSCL	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_MDCNTL_HSCL	/;"	d
IIC_NOK	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_NOK	/;"	d
IIC_NOK_DATA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_NOK_DATA	/;"	d
IIC_NOK_ICT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_NOK_ICT	/;"	d
IIC_NOK_LA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_NOK_LA	/;"	d
IIC_NOK_TOUT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_NOK_TOUT	/;"	d
IIC_NOK_XFRA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_NOK_XFRA	/;"	d
IIC_OK	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_OK	/;"	d
IIC_STS_ERR	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_ERR	/;"	d
IIC_STS_IRQA	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_IRQA	/;"	d
IIC_STS_MDBF	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_MDBF	/;"	d
IIC_STS_MDBS	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_MDBS	/;"	d
IIC_STS_PT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_PT	/;"	d
IIC_STS_SCMP	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_SCMP	/;"	d
IIC_STS_SLPR	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_SLPR	/;"	d
IIC_STS_SSS	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_STS_SSS	/;"	d
IIC_TIMEOUT	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_TIMEOUT	/;"	d
IIC_XTCNTLSS_EPI	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_EPI	/;"	d
IIC_XTCNTLSS_SBDD	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SBDD	/;"	d
IIC_XTCNTLSS_SDBF	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SDBF	/;"	d
IIC_XTCNTLSS_SRC	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SRC	/;"	d
IIC_XTCNTLSS_SRS	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SRS	/;"	d
IIC_XTCNTLSS_SRST	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SRST	/;"	d
IIC_XTCNTLSS_SWC	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SWC	/;"	d
IIC_XTCNTLSS_SWS	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define IIC_XTCNTLSS_SWS	/;"	d
IID	include/sym53c8xx.h	/^  #define   IID /;"	d
IIM0_SCC_KEY	include/configs/apf27.h	/^#define IIM0_SCC_KEY	/;"	d
IIM1_SUID	include/configs/apf27.h	/^#define IIM1_SUID	/;"	d
IIM_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IIM_BASE_ADDR	/;"	d
IIM_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_BASE_ADDR	/;"	d
IIM_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IIM_BASE_ADDR	/;"	d
IIM_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IIM_BASE_ADDR	/;"	d
IIM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IIM_BASE_ADDR	/;"	d
IIM_BASE_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define IIM_BASE_ADDR	/;"	d
IIM_ERR_OPE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_OPE	/;"	d
IIM_ERR_PARITYE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_PARITYE	/;"	d
IIM_ERR_PRGE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_PRGE	/;"	d
IIM_ERR_RPE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_RPE	/;"	d
IIM_ERR_SNSE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_SNSE	/;"	d
IIM_ERR_WLRE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_WLRE	/;"	d
IIM_ERR_WPE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_ERR_WPE	/;"	d
IIM_MAC_BANK	include/configs/apf27.h	/^#define IIM_MAC_BANK	/;"	d
IIM_MAC_ROW	include/configs/apf27.h	/^#define IIM_MAC_ROW	/;"	d
IIM_SREV	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IIM_SREV	/;"	d
IIM_SREV	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IIM_SREV	/;"	d
IIM_STAT_BUSY	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_STAT_BUSY	/;"	d
IIM_STAT_PRGD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_STAT_PRGD	/;"	d
IIM_STAT_SNSD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IIM_STAT_SNSD	/;"	d
IIR_FIFOES0	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IIR_FIFOES0	/;"	d
IIR_FIFOES1	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IIR_FIFOES1	/;"	d
IIR_IID1	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IIR_IID1	/;"	d
IIR_IID2	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IIR_IID2	/;"	d
IIR_IP	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IIR_IP	/;"	d
IIR_TOD	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	IIR_TOD	/;"	d
IITV	drivers/usb/host/r8a66597.h	/^#define	IITV	/;"	d
ILAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ILAT /;"	d
ILB_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define ILB_BASE_ADDRESS	/;"	d
ILB_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define ILB_BASE_SIZE	/;"	d
ILF	include/sym53c8xx.h	/^  #define   ILF /;"	d
ILF1	include/sym53c8xx.h	/^  #define   ILF1 /;"	d
ILIST_ALIGN	drivers/usb/gadget/ci_udc.c	/^#define ILIST_ALIGN	/;"	d	file:
ILIST_ENT_RAW_SZ	drivers/usb/gadget/ci_udc.c	/^#define ILIST_ENT_RAW_SZ	/;"	d	file:
ILIST_ENT_SZ	drivers/usb/gadget/ci_udc.c	/^#define ILIST_ENT_SZ	/;"	d	file:
ILIST_SZ	drivers/usb/gadget/ci_udc.c	/^#define ILIST_SZ	/;"	d	file:
ILM	arch/sh/include/asm/cpu_sh7722.h	/^#define ILM /;"	d
ILOC0	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC0	/;"	d
ILOC0_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC0_P	/;"	d
ILOC1	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC1	/;"	d
ILOC1_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC1_P	/;"	d
ILOC2	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC2	/;"	d
ILOC2_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC2_P	/;"	d
ILOC3	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC3	/;"	d
ILOC3_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define ILOC3_P	/;"	d
ILOS_SHIFT	drivers/net/e1000.h	/^#define ILOS_SHIFT /;"	d
ILookInStream	lib/lzma/Types.h	/^} ILookInStream;$/;"	t	typeref:struct:__anonf2a2f1b90708
IMAGE_BASE_RELOCATION	include/pe.h	/^} IMAGE_BASE_RELOCATION,*PIMAGE_BASE_RELOCATION;$/;"	t	typeref:struct:_IMAGE_BASE_RELOCATION
IMAGE_BOOT_GET_CMDLINE	include/image.h	/^# define IMAGE_BOOT_GET_CMDLINE	/;"	d
IMAGE_CFG_BINARY	tools/kwbimage.c	/^		IMAGE_CFG_BINARY,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_BOOT_FROM	tools/kwbimage.c	/^		IMAGE_CFG_BOOT_FROM,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_DATA	tools/kwbimage.c	/^		IMAGE_CFG_DATA,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_DEST_ADDR	tools/kwbimage.c	/^		IMAGE_CFG_DEST_ADDR,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_ELEMENT_MAX	tools/kwbimage.c	/^#define IMAGE_CFG_ELEMENT_MAX /;"	d	file:
IMAGE_CFG_EXEC_ADDR	tools/kwbimage.c	/^		IMAGE_CFG_EXEC_ADDR,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_NAND_BADBLK_LOCATION	tools/kwbimage.c	/^		IMAGE_CFG_NAND_BADBLK_LOCATION,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_NAND_BLKSZ	tools/kwbimage.c	/^		IMAGE_CFG_NAND_BLKSZ,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_NAND_ECC_MODE	tools/kwbimage.c	/^		IMAGE_CFG_NAND_ECC_MODE,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_NAND_PAGESZ	tools/kwbimage.c	/^		IMAGE_CFG_NAND_PAGESZ,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_PAYLOAD	tools/kwbimage.c	/^		IMAGE_CFG_PAYLOAD,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_CFG_VERSION	tools/kwbimage.c	/^		IMAGE_CFG_VERSION = 0x1,$/;"	e	enum:image_cfg_element::__anon9793d65d0103	file:
IMAGE_DATA_DIRECTORY	include/pe.h	/^} IMAGE_DATA_DIRECTORY, *PIMAGE_DATA_DIRECTORY;$/;"	t	typeref:struct:_IMAGE_DATA_DIRECTORY
IMAGE_DIRECTORY_ENTRY_BASERELOC	include/pe.h	/^#define IMAGE_DIRECTORY_ENTRY_BASERELOC /;"	d
IMAGE_DOS_HEADER	include/pe.h	/^} IMAGE_DOS_HEADER, *PIMAGE_DOS_HEADER;$/;"	t	typeref:struct:_IMAGE_DOS_HEADER
IMAGE_DOS_SIGNATURE	include/pe.h	/^#define IMAGE_DOS_SIGNATURE	/;"	d
IMAGE_ENABLE_BEST_MATCH	include/image.h	/^#define IMAGE_ENABLE_BEST_MATCH	/;"	d
IMAGE_ENABLE_CRC32	include/image.h	/^#   define IMAGE_ENABLE_CRC32	/;"	d
IMAGE_ENABLE_CRC32	include/image.h	/^#  define IMAGE_ENABLE_CRC32	/;"	d
IMAGE_ENABLE_CRC32	include/image.h	/^#define IMAGE_ENABLE_CRC32	/;"	d
IMAGE_ENABLE_FIT	include/image.h	/^#define IMAGE_ENABLE_FIT	/;"	d
IMAGE_ENABLE_IGNORE	include/image.h	/^#define IMAGE_ENABLE_IGNORE	/;"	d
IMAGE_ENABLE_MD5	include/image.h	/^#   define IMAGE_ENABLE_MD5	/;"	d
IMAGE_ENABLE_MD5	include/image.h	/^#  define IMAGE_ENABLE_MD5	/;"	d
IMAGE_ENABLE_MD5	include/image.h	/^#define IMAGE_ENABLE_MD5	/;"	d
IMAGE_ENABLE_OF_LIBFDT	include/image.h	/^#define IMAGE_ENABLE_OF_LIBFDT	/;"	d
IMAGE_ENABLE_RAMDISK_HIGH	include/image.h	/^# define IMAGE_ENABLE_RAMDISK_HIGH	/;"	d
IMAGE_ENABLE_SHA1	include/image.h	/^#   define IMAGE_ENABLE_SHA1	/;"	d
IMAGE_ENABLE_SHA1	include/image.h	/^#  define IMAGE_ENABLE_SHA1	/;"	d
IMAGE_ENABLE_SHA1	include/image.h	/^#define IMAGE_ENABLE_SHA1	/;"	d
IMAGE_ENABLE_SHA256	include/image.h	/^#   define IMAGE_ENABLE_SHA256	/;"	d
IMAGE_ENABLE_SHA256	include/image.h	/^#  define IMAGE_ENABLE_SHA256	/;"	d
IMAGE_ENABLE_SHA256	include/image.h	/^#define IMAGE_ENABLE_SHA256	/;"	d
IMAGE_ENABLE_SIGN	include/image.h	/^#  define IMAGE_ENABLE_SIGN	/;"	d
IMAGE_ENABLE_SIGN	include/image.h	/^# define IMAGE_ENABLE_SIGN	/;"	d
IMAGE_ENABLE_TIMESTAMP	include/image.h	/^#define IMAGE_ENABLE_TIMESTAMP /;"	d
IMAGE_ENABLE_VERIFY	include/image.h	/^#  define IMAGE_ENABLE_VERIFY	/;"	d
IMAGE_ENABLE_VERIFY	include/image.h	/^# define IMAGE_ENABLE_VERIFY	/;"	d
IMAGE_FILE_HEADER	include/pe.h	/^} IMAGE_FILE_HEADER, *PIMAGE_FILE_HEADER;$/;"	t	typeref:struct:_IMAGE_FILE_HEADER
IMAGE_FILE_MACHINE_AMD64	include/pe.h	/^#define IMAGE_FILE_MACHINE_AMD64	/;"	d
IMAGE_FILE_MACHINE_ARM	include/pe.h	/^#define IMAGE_FILE_MACHINE_ARM	/;"	d
IMAGE_FILE_MACHINE_ARM64	include/pe.h	/^#define IMAGE_FILE_MACHINE_ARM64	/;"	d
IMAGE_FILE_MACHINE_ARMNT	include/pe.h	/^#define IMAGE_FILE_MACHINE_ARMNT	/;"	d
IMAGE_FILE_MACHINE_THUMB	include/pe.h	/^#define IMAGE_FILE_MACHINE_THUMB	/;"	d
IMAGE_FORMAT_ANDROID	include/image.h	/^#define IMAGE_FORMAT_ANDROID	/;"	d
IMAGE_FORMAT_FIT	include/image.h	/^#define IMAGE_FORMAT_FIT	/;"	d
IMAGE_FORMAT_INVALID	include/image.h	/^#define IMAGE_FORMAT_INVALID	/;"	d
IMAGE_FORMAT_LEGACY	include/image.h	/^#define IMAGE_FORMAT_LEGACY	/;"	d
IMAGE_INDENT_STRING	include/image.h	/^#define IMAGE_INDENT_STRING	/;"	d
IMAGE_MAXSIZE	include/configs/nokia_rx51.h	/^#define IMAGE_MAXSIZE	/;"	d
IMAGE_MAX_HASHED_NODES	common/image-sig.c	/^#define IMAGE_MAX_HASHED_NODES	/;"	d	file:
IMAGE_NT_HEADERS32	include/pe.h	/^} IMAGE_NT_HEADERS32, *PIMAGE_NT_HEADERS32;$/;"	t	typeref:struct:_IMAGE_NT_HEADERS
IMAGE_NT_HEADERS64	include/pe.h	/^} IMAGE_NT_HEADERS64, *PIMAGE_NT_HEADERS64;$/;"	t	typeref:struct:_IMAGE_NT_HEADERS64
IMAGE_NT_OPTIONAL_HDR32_MAGIC	include/pe.h	/^#define IMAGE_NT_OPTIONAL_HDR32_MAGIC	/;"	d
IMAGE_NT_OPTIONAL_HDR64_MAGIC	include/pe.h	/^#define IMAGE_NT_OPTIONAL_HDR64_MAGIC	/;"	d
IMAGE_NT_SIGNATURE	include/pe.h	/^#define IMAGE_NT_SIGNATURE	/;"	d
IMAGE_NUMBEROF_DIRECTORY_ENTRIES	include/pe.h	/^#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES /;"	d
IMAGE_OF_BOARD_SETUP	include/image.h	/^# define IMAGE_OF_BOARD_SETUP	/;"	d
IMAGE_OF_SYSTEM_SETUP	include/image.h	/^# define IMAGE_OF_SYSTEM_SETUP	/;"	d
IMAGE_OPTIONAL_HEADER32	include/pe.h	/^} IMAGE_OPTIONAL_HEADER32, *PIMAGE_OPTIONAL_HEADER32;$/;"	t	typeref:struct:_IMAGE_OPTIONAL_HEADER
IMAGE_OPTIONAL_HEADER64	include/pe.h	/^} IMAGE_OPTIONAL_HEADER64, *PIMAGE_OPTIONAL_HEADER64;$/;"	t	typeref:struct:_IMAGE_OPTIONAL_HEADER64
IMAGE_RELOCATION	include/pe.h	/^} IMAGE_RELOCATION, *PIMAGE_RELOCATION;$/;"	t	typeref:struct:_IMAGE_RELOCATION
IMAGE_REL_ABSOLUTE	arch/x86/lib/efi/crt0-efi-ia32.S	/^#define IMAGE_REL_ABSOLUTE	/;"	d	file:
IMAGE_REL_ABSOLUTE	arch/x86/lib/efi/crt0-efi-x86_64.S	/^#define IMAGE_REL_ABSOLUTE	/;"	d	file:
IMAGE_REL_AMD64_ABSOLUTE	include/pe.h	/^#define IMAGE_REL_AMD64_ABSOLUTE /;"	d
IMAGE_REL_AMD64_ADDR32	include/pe.h	/^#define IMAGE_REL_AMD64_ADDR32 /;"	d
IMAGE_REL_AMD64_ADDR32NB	include/pe.h	/^#define IMAGE_REL_AMD64_ADDR32NB /;"	d
IMAGE_REL_AMD64_ADDR64	include/pe.h	/^#define IMAGE_REL_AMD64_ADDR64 /;"	d
IMAGE_REL_AMD64_PAIR	include/pe.h	/^#define IMAGE_REL_AMD64_PAIR /;"	d
IMAGE_REL_AMD64_REL32	include/pe.h	/^#define IMAGE_REL_AMD64_REL32 /;"	d
IMAGE_REL_AMD64_REL32_1	include/pe.h	/^#define IMAGE_REL_AMD64_REL32_1 /;"	d
IMAGE_REL_AMD64_REL32_2	include/pe.h	/^#define IMAGE_REL_AMD64_REL32_2 /;"	d
IMAGE_REL_AMD64_REL32_3	include/pe.h	/^#define IMAGE_REL_AMD64_REL32_3 /;"	d
IMAGE_REL_AMD64_REL32_4	include/pe.h	/^#define IMAGE_REL_AMD64_REL32_4 /;"	d
IMAGE_REL_AMD64_REL32_5	include/pe.h	/^#define IMAGE_REL_AMD64_REL32_5 /;"	d
IMAGE_REL_AMD64_SECREL	include/pe.h	/^#define IMAGE_REL_AMD64_SECREL /;"	d
IMAGE_REL_AMD64_SECREL7	include/pe.h	/^#define IMAGE_REL_AMD64_SECREL7 /;"	d
IMAGE_REL_AMD64_SECTION	include/pe.h	/^#define IMAGE_REL_AMD64_SECTION /;"	d
IMAGE_REL_AMD64_SREL32	include/pe.h	/^#define IMAGE_REL_AMD64_SREL32 /;"	d
IMAGE_REL_AMD64_SSPAN32	include/pe.h	/^#define IMAGE_REL_AMD64_SSPAN32 /;"	d
IMAGE_REL_AMD64_TOKEN	include/pe.h	/^#define IMAGE_REL_AMD64_TOKEN /;"	d
IMAGE_REL_ARM64_ABSOLUTE	include/pe.h	/^#define IMAGE_REL_ARM64_ABSOLUTE /;"	d
IMAGE_REL_ARM64_ADDR32	include/pe.h	/^#define IMAGE_REL_ARM64_ADDR32 /;"	d
IMAGE_REL_ARM64_ADDR32NB	include/pe.h	/^#define IMAGE_REL_ARM64_ADDR32NB /;"	d
IMAGE_REL_ARM64_ADDR64	include/pe.h	/^#define IMAGE_REL_ARM64_ADDR64 /;"	d
IMAGE_REL_ARM64_BRANCH26	include/pe.h	/^#define IMAGE_REL_ARM64_BRANCH26 /;"	d
IMAGE_REL_ARM64_PAGEBASE_REL21	include/pe.h	/^#define IMAGE_REL_ARM64_PAGEBASE_REL21 /;"	d
IMAGE_REL_ARM64_PAGEOFFSET_12A	include/pe.h	/^#define IMAGE_REL_ARM64_PAGEOFFSET_12A /;"	d
IMAGE_REL_ARM64_PAGEOFFSET_12L	include/pe.h	/^#define IMAGE_REL_ARM64_PAGEOFFSET_12L /;"	d
IMAGE_REL_ARM64_REL21	include/pe.h	/^#define IMAGE_REL_ARM64_REL21 /;"	d
IMAGE_REL_ARM64_SECREL	include/pe.h	/^#define IMAGE_REL_ARM64_SECREL /;"	d
IMAGE_REL_ARM64_SECREL_HIGH12A	include/pe.h	/^#define IMAGE_REL_ARM64_SECREL_HIGH12A /;"	d
IMAGE_REL_ARM64_SECREL_LOW12A	include/pe.h	/^#define IMAGE_REL_ARM64_SECREL_LOW12A /;"	d
IMAGE_REL_ARM64_SECREL_LOW12L	include/pe.h	/^#define IMAGE_REL_ARM64_SECREL_LOW12L /;"	d
IMAGE_REL_ARM64_SECTION	include/pe.h	/^#define IMAGE_REL_ARM64_SECTION /;"	d
IMAGE_REL_ARM64_TOKEN	include/pe.h	/^#define IMAGE_REL_ARM64_TOKEN /;"	d
IMAGE_REL_ARM_ABSOLUTE	include/pe.h	/^#define IMAGE_REL_ARM_ABSOLUTE /;"	d
IMAGE_REL_ARM_ADDR	include/pe.h	/^#define IMAGE_REL_ARM_ADDR /;"	d
IMAGE_REL_ARM_ADDR32NB	include/pe.h	/^#define IMAGE_REL_ARM_ADDR32NB /;"	d
IMAGE_REL_ARM_BLX11	include/pe.h	/^#define IMAGE_REL_ARM_BLX11 /;"	d
IMAGE_REL_ARM_BLX23T	include/pe.h	/^#define IMAGE_REL_ARM_BLX23T /;"	d
IMAGE_REL_ARM_BLX24	include/pe.h	/^#define IMAGE_REL_ARM_BLX24 /;"	d
IMAGE_REL_ARM_BRANCH11	include/pe.h	/^#define IMAGE_REL_ARM_BRANCH11 /;"	d
IMAGE_REL_ARM_BRANCH20T	include/pe.h	/^#define IMAGE_REL_ARM_BRANCH20T /;"	d
IMAGE_REL_ARM_BRANCH24	include/pe.h	/^#define IMAGE_REL_ARM_BRANCH24 /;"	d
IMAGE_REL_ARM_BRANCH24T	include/pe.h	/^#define IMAGE_REL_ARM_BRANCH24T /;"	d
IMAGE_REL_ARM_GPREL12	include/pe.h	/^#define IMAGE_REL_ARM_GPREL12 /;"	d
IMAGE_REL_ARM_GPREL7	include/pe.h	/^#define IMAGE_REL_ARM_GPREL7 /;"	d
IMAGE_REL_ARM_MOV32A	include/pe.h	/^#define IMAGE_REL_ARM_MOV32A /;"	d
IMAGE_REL_ARM_MOV32T	include/pe.h	/^#define IMAGE_REL_ARM_MOV32T /;"	d
IMAGE_REL_ARM_SECREL	include/pe.h	/^#define IMAGE_REL_ARM_SECREL /;"	d
IMAGE_REL_ARM_SECTION	include/pe.h	/^#define IMAGE_REL_ARM_SECTION /;"	d
IMAGE_REL_ARM_TOKEN	include/pe.h	/^#define IMAGE_REL_ARM_TOKEN /;"	d
IMAGE_REL_BASED_ABSOLUTE	include/pe.h	/^#define IMAGE_REL_BASED_ABSOLUTE /;"	d
IMAGE_REL_BASED_ARM_MOV32	include/pe.h	/^#define IMAGE_REL_BASED_ARM_MOV32 /;"	d
IMAGE_REL_BASED_ARM_MOV32A	include/pe.h	/^#define IMAGE_REL_BASED_ARM_MOV32A /;"	d
IMAGE_REL_BASED_ARM_MOV32T	include/pe.h	/^#define IMAGE_REL_BASED_ARM_MOV32T /;"	d
IMAGE_REL_BASED_DIR64	include/pe.h	/^#define IMAGE_REL_BASED_DIR64 /;"	d
IMAGE_REL_BASED_HIGH	include/pe.h	/^#define IMAGE_REL_BASED_HIGH /;"	d
IMAGE_REL_BASED_HIGH3ADJ	include/pe.h	/^#define IMAGE_REL_BASED_HIGH3ADJ /;"	d
IMAGE_REL_BASED_HIGHADJ	include/pe.h	/^#define IMAGE_REL_BASED_HIGHADJ /;"	d
IMAGE_REL_BASED_HIGHLOW	include/pe.h	/^#define IMAGE_REL_BASED_HIGHLOW /;"	d
IMAGE_REL_BASED_IA64_IMM64	include/pe.h	/^#define IMAGE_REL_BASED_IA64_IMM64 /;"	d
IMAGE_REL_BASED_LOW	include/pe.h	/^#define IMAGE_REL_BASED_LOW /;"	d
IMAGE_REL_BASED_MIPS_JMPADDR	include/pe.h	/^#define IMAGE_REL_BASED_MIPS_JMPADDR /;"	d
IMAGE_REL_BASED_MIPS_JMPADDR16	include/pe.h	/^#define IMAGE_REL_BASED_MIPS_JMPADDR16 /;"	d
IMAGE_REL_BASED_REL	include/pe.h	/^#define IMAGE_REL_BASED_REL /;"	d
IMAGE_REL_BASED_SECTION	include/pe.h	/^#define IMAGE_REL_BASED_SECTION /;"	d
IMAGE_REL_BASED_THUMB_MOV32	include/pe.h	/^#define IMAGE_REL_BASED_THUMB_MOV32 /;"	d
IMAGE_SECTION_HEADER	include/pe.h	/^} IMAGE_SECTION_HEADER, *PIMAGE_SECTION_HEADER;$/;"	t	typeref:struct:_IMAGE_SECTION_HEADER
IMAGE_SIZE	board/mpl/common/common_util.c	/^#define IMAGE_SIZE /;"	d	file:
IMAGE_SIZEOF_RELOCATION	include/pe.h	/^#define IMAGE_SIZEOF_RELOCATION /;"	d
IMAGE_SIZEOF_SHORT_NAME	include/pe.h	/^#define IMAGE_SIZEOF_SHORT_NAME /;"	d
IMAGE_SUBSYSTEM_EFI_APPLICATION	include/pe.h	/^#define IMAGE_SUBSYSTEM_EFI_APPLICATION	/;"	d
IMASK	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define IMASK /;"	d
IMASK_ABRTEN	include/fsl_dtsec.h	/^#define IMASK_ABRTEN	/;"	d
IMASK_BREN	include/fsl_dtsec.h	/^#define IMASK_BREN	/;"	d
IMASK_BTEN	include/fsl_dtsec.h	/^#define IMASK_BTEN	/;"	d
IMASK_CRLEN	include/fsl_dtsec.h	/^#define IMASK_CRLEN	/;"	d
IMASK_GRSCEN	include/fsl_dtsec.h	/^#define IMASK_GRSCEN	/;"	d
IMASK_GTSCEN	include/fsl_dtsec.h	/^#define IMASK_GTSCEN	/;"	d
IMASK_INIT_CLEAR	include/tsec.h	/^#define IMASK_INIT_CLEAR	/;"	d
IMASK_LCEN	include/fsl_dtsec.h	/^#define IMASK_LCEN	/;"	d
IMASK_LOC_FAULT	include/fsl_memac.h	/^#define IMASK_LOC_FAULT	/;"	d
IMASK_LOC_FAULT	include/fsl_tgec.h	/^#define IMASK_LOC_FAULT	/;"	d
IMASK_MASK_ALL	include/fsl_dtsec.h	/^#define IMASK_MASK_ALL	/;"	d
IMASK_MASK_ALL	include/fsl_memac.h	/^#define IMASK_MASK_ALL	/;"	d
IMASK_MASK_ALL	include/fsl_tgec.h	/^#define IMASK_MASK_ALL	/;"	d
IMASK_MDIO_CMD_CMPL	include/fsl_memac.h	/^#define IMASK_MDIO_CMD_CMPL	/;"	d
IMASK_MDIO_CMD_CMPL	include/fsl_tgec.h	/^#define IMASK_MDIO_CMD_CMPL	/;"	d
IMASK_MDIO_SCAN_EVENT	include/fsl_memac.h	/^#define IMASK_MDIO_SCAN_EVENT	/;"	d
IMASK_MDIO_SCAN_EVENT	include/fsl_tgec.h	/^#define IMASK_MDIO_SCAN_EVENT	/;"	d
IMASK_MMRDEN	include/fsl_dtsec.h	/^#define IMASK_MMRDEN	/;"	d
IMASK_MMWREN	include/fsl_dtsec.h	/^#define IMASK_MMWREN	/;"	d
IMASK_MSROEN	include/fsl_dtsec.h	/^#define IMASK_MSROEN	/;"	d
IMASK_RDPEEN	include/fsl_dtsec.h	/^#define IMASK_RDPEEN	/;"	d
IMASK_REM_FAULT	include/fsl_memac.h	/^#define IMASK_REM_FAULT	/;"	d
IMASK_REM_FAULT	include/fsl_tgec.h	/^#define IMASK_REM_FAULT	/;"	d
IMASK_RXCEN	include/fsl_dtsec.h	/^#define IMASK_RXCEN	/;"	d
IMASK_RXFEN0	include/tsec.h	/^#define IMASK_RXFEN0	/;"	d
IMASK_RX_ALIGN_ER	include/fsl_memac.h	/^#define IMASK_RX_ALIGN_ER	/;"	d
IMASK_RX_ALIGN_ER	include/fsl_tgec.h	/^#define IMASK_RX_ALIGN_ER	/;"	d
IMASK_RX_CRC_ER	include/fsl_memac.h	/^#define IMASK_RX_CRC_ER	/;"	d
IMASK_RX_CRC_ER	include/fsl_tgec.h	/^#define IMASK_RX_CRC_ER	/;"	d
IMASK_RX_ECC_ER	include/fsl_memac.h	/^#define IMASK_RX_ECC_ER	/;"	d
IMASK_RX_ECC_ER	include/fsl_tgec.h	/^#define IMASK_RX_ECC_ER	/;"	d
IMASK_RX_FIFO_OVFL	include/fsl_memac.h	/^#define IMASK_RX_FIFO_OVFL	/;"	d
IMASK_RX_FIFO_OVFL	include/fsl_tgec.h	/^#define IMASK_RX_FIFO_OVFL	/;"	d
IMASK_RX_FRAG_FRM	include/fsl_memac.h	/^#define IMASK_RX_FRAG_FRM	/;"	d
IMASK_RX_FRAG_FRM	include/fsl_tgec.h	/^#define IMASK_RX_FRAG_FRM	/;"	d
IMASK_RX_JAB_FRM	include/fsl_memac.h	/^#define IMASK_RX_JAB_FRM	/;"	d
IMASK_RX_JAB_FRM	include/fsl_tgec.h	/^#define IMASK_RX_JAB_FRM	/;"	d
IMASK_RX_LEN_ER	include/fsl_memac.h	/^#define IMASK_RX_LEN_ER	/;"	d
IMASK_RX_LEN_ER	include/fsl_tgec.h	/^#define IMASK_RX_LEN_ER	/;"	d
IMASK_RX_OVRSZ_FRM	include/fsl_memac.h	/^#define IMASK_RX_OVRSZ_FRM	/;"	d
IMASK_RX_OVRSZ_FRM	include/fsl_tgec.h	/^#define IMASK_RX_OVRSZ_FRM	/;"	d
IMASK_RX_RUNT_FRM	include/fsl_memac.h	/^#define IMASK_RX_RUNT_FRM	/;"	d
IMASK_RX_RUNT_FRM	include/fsl_tgec.h	/^#define IMASK_RX_RUNT_FRM	/;"	d
IMASK_TDPEEN	include/fsl_dtsec.h	/^#define IMASK_TDPEEN	/;"	d
IMASK_TXBEN	include/tsec.h	/^#define IMASK_TXBEN	/;"	d
IMASK_TXCEN	include/fsl_dtsec.h	/^#define IMASK_TXCEN	/;"	d
IMASK_TXEEN	include/fsl_dtsec.h	/^#define IMASK_TXEEN	/;"	d
IMASK_TXEEN	include/tsec.h	/^#define IMASK_TXEEN	/;"	d
IMASK_TXFEN	include/tsec.h	/^#define IMASK_TXFEN	/;"	d
IMASK_TX_ECC_ER	include/fsl_memac.h	/^#define IMASK_TX_ECC_ER	/;"	d
IMASK_TX_ECC_ER	include/fsl_tgec.h	/^#define IMASK_TX_ECC_ER	/;"	d
IMASK_TX_ER	include/fsl_memac.h	/^#define IMASK_TX_ER	/;"	d
IMASK_TX_ER	include/fsl_tgec.h	/^#define IMASK_TX_ER	/;"	d
IMASK_TX_FIFO_UNFL	include/fsl_memac.h	/^#define IMASK_TX_FIFO_UNFL	/;"	d
IMASK_TX_FIFO_UNFL	include/fsl_tgec.h	/^#define IMASK_TX_FIFO_UNFL	/;"	d
IMASK_XFUNEN	include/fsl_dtsec.h	/^#define IMASK_XFUNEN	/;"	d
IMC	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define IMC	/;"	d
IMCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR0	/;"	d
IMCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR1	/;"	d
IMCR10	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR10	/;"	d
IMCR11	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR11	/;"	d
IMCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR2	/;"	d
IMCR3	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR3	/;"	d
IMCR4	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR4	/;"	d
IMCR5	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR5	/;"	d
IMCR6	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR6	/;"	d
IMCR7	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR7	/;"	d
IMCR8	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR8	/;"	d
IMCR9	arch/sh/include/asm/cpu_sh7722.h	/^#define IMCR9	/;"	d
IMCTL_ENICPLB_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define IMCTL_ENICPLB_P	/;"	d
IMCTL_ENIM_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define IMCTL_ENIM_P	/;"	d
IMCTL_IMC_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define IMCTL_IMC_P	/;"	d
IMC_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define IMC_P	/;"	d
IMDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_CONFIG /;"	d
IMDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_CURR_ADDR /;"	d
IMDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_CURR_DESC_PTR /;"	d
IMDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_CURR_X_COUNT /;"	d
IMDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_CURR_Y_COUNT /;"	d
IMDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_IRQ_STATUS /;"	d
IMDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_NEXT_DESC_PTR /;"	d
IMDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_START_ADDR /;"	d
IMDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_X_COUNT /;"	d
IMDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_X_MODIFY /;"	d
IMDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_Y_COUNT /;"	d
IMDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D0_Y_MODIFY /;"	d
IMDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_CONFIG /;"	d
IMDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_CURR_ADDR /;"	d
IMDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_CURR_DESC_PTR /;"	d
IMDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_CURR_X_COUNT /;"	d
IMDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_CURR_Y_COUNT /;"	d
IMDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_IRQ_STATUS /;"	d
IMDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_NEXT_DESC_PTR /;"	d
IMDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_START_ADDR /;"	d
IMDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_X_COUNT /;"	d
IMDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_X_MODIFY /;"	d
IMDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_Y_COUNT /;"	d
IMDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_D1_Y_MODIFY /;"	d
IMDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_CONFIG /;"	d
IMDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_CURR_ADDR /;"	d
IMDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_CURR_DESC_PTR /;"	d
IMDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_CURR_X_COUNT /;"	d
IMDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_CURR_Y_COUNT /;"	d
IMDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_IRQ_STATUS /;"	d
IMDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_NEXT_DESC_PTR /;"	d
IMDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_START_ADDR /;"	d
IMDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_X_COUNT /;"	d
IMDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_X_MODIFY /;"	d
IMDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_Y_COUNT /;"	d
IMDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S0_Y_MODIFY /;"	d
IMDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_CONFIG /;"	d
IMDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_CURR_ADDR /;"	d
IMDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_CURR_DESC_PTR /;"	d
IMDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_CURR_X_COUNT /;"	d
IMDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_CURR_Y_COUNT /;"	d
IMDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_IRQ_STATUS /;"	d
IMDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_NEXT_DESC_PTR /;"	d
IMDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_START_ADDR /;"	d
IMDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_X_COUNT /;"	d
IMDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_X_MODIFY /;"	d
IMDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_Y_COUNT /;"	d
IMDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define IMDMA_S1_Y_MODIFY /;"	d
IMEM_CONTROL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define IMEM_CONTROL /;"	d
IMGSS_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define IMGSS_BASE_ADDR /;"	d
IMG_SIZE	board/samsung/origen/tools/mkorigenspl.c	/^#define IMG_SIZE	/;"	d	file:
IMISS	arch/powerpc/include/asm/processor.h	/^#define IMISS	/;"	d
IMMEDIATE	drivers/crypto/fsl/desc_constr.h	/^#define IMMEDIATE /;"	d
IMMR	arch/powerpc/include/asm/processor.h	/^#define IMMR	/;"	d
IMMRBAR	arch/powerpc/include/asm/immap_512x.h	/^#define IMMRBAR	/;"	d
IMMRBAR	include/mpc83xx.h	/^#define IMMRBAR	/;"	d
IMMRBAR_BASE_ADDR	arch/powerpc/include/asm/immap_512x.h	/^#define IMMRBAR_BASE_ADDR	/;"	d
IMMRBAR_BASE_ADDR	include/mpc83xx.h	/^#define IMMRBAR_BASE_ADDR	/;"	d
IMMRBAR_RES	arch/powerpc/include/asm/immap_512x.h	/^#define IMMRBAR_RES	/;"	d
IMMRBAR_RES	include/mpc83xx.h	/^#define IMMRBAR_RES	/;"	d
IMMR_ISB_MSK	include/mpc8260.h	/^#define IMMR_ISB_MSK	/;"	d
IMMR_MASKNUM_MSK	include/mpc8260.h	/^#define IMMR_MASKNUM_MSK /;"	d
IMMR_PARTNUM_MSK	include/mpc8260.h	/^#define IMMR_PARTNUM_MSK /;"	d
IMPEDANCE_30_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define IMPEDANCE_30_OHM	/;"	d
IMPEDANCE_34_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define IMPEDANCE_34_OHM	/;"	d
IMPEDANCE_40_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define IMPEDANCE_40_OHM	/;"	d
IMPEDANCE_48_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define IMPEDANCE_48_OHM	/;"	d
IMP_OUTPUT_DRV_30_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define IMP_OUTPUT_DRV_30_OHM	/;"	d
IMP_OUTPUT_DRV_40_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define IMP_OUTPUT_DRV_40_OHM	/;"	d
IMR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMR(/;"	d
IMR	arch/x86/include/asm/i8259.h	/^#define IMR	/;"	d
IMR	drivers/net/ax88180.h	/^#define IMR	/;"	d
IMR0	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR0	/;"	d
IMR1	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR1	/;"	d
IMR10	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR10	/;"	d
IMR11	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR11	/;"	d
IMR2	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR2	/;"	d
IMR3	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR3	/;"	d
IMR4	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR4	/;"	d
IMR5	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR5	/;"	d
IMR6	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR6	/;"	d
IMR7	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR7	/;"	d
IMR8	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR8	/;"	d
IMR9	arch/sh/include/asm/cpu_sh7722.h	/^#define IMR9	/;"	d
IMR_1	board/mpl/common/isa.c	/^#define IMR_1	/;"	d	file:
IMR_2	board/mpl/common/isa.c	/^#define IMR_2	/;"	d	file:
IMR_DEV	include/usb/fotg210.h	/^#define IMR_DEV /;"	d
IMR_HOST	include/usb/fotg210.h	/^#define IMR_HOST /;"	d
IMR_IRQLH	include/usb/fotg210.h	/^#define IMR_IRQLH /;"	d
IMR_IRQLL	include/usb/fotg210.h	/^#define IMR_IRQLL /;"	d
IMR_MASK	include/usb/fotg210.h	/^#define IMR_MASK /;"	d
IMR_OTG	include/usb/fotg210.h	/^#define IMR_OTG /;"	d
IMR_PAR	drivers/net/dm9000x.h	/^#define IMR_PAR	/;"	d
IMR_PHY	drivers/net/ax88180.h	/^  #define IMR_PHY	/;"	d
IMR_PRM	drivers/net/dm9000x.h	/^#define IMR_PRM	/;"	d
IMR_PTM	drivers/net/dm9000x.h	/^#define IMR_PTM	/;"	d
IMR_ROM	drivers/net/dm9000x.h	/^#define IMR_ROM	/;"	d
IMR_ROOM	drivers/net/dm9000x.h	/^#define IMR_ROOM	/;"	d
IMR_RX	drivers/net/ax88180.h	/^  #define IMR_RX	/;"	d
IMR_RXBUFFOVR	drivers/net/ax88180.h	/^  #define IMR_RXBUFFOVR	/;"	d
IMR_TX	drivers/net/ax88180.h	/^  #define IMR_TX	/;"	d
IMR_WATCHDOG	drivers/net/ax88180.h	/^  #define IMR_WATCHDOG	/;"	d
IMS_ENABLE_MASK	drivers/net/e1000.h	/^#define IMS_ENABLE_MASK /;"	d
IMX6DL_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DL_CLK_I2C4	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6DL_CLK_I2C4	/;"	d
IMX6DQ_DRIVE_STRENGTH	board/engicam/icorem6/icorem6.c	/^#define IMX6DQ_DRIVE_STRENGTH	/;"	d	file:
IMX6DQ_DRIVE_STRENGTH	board/udoo/udoo_spl.c	/^#define IMX6DQ_DRIVE_STRENGTH	/;"	d	file:
IMX6DQ_DRIVE_STRENGTH	board/wandboard/spl.c	/^#define IMX6DQ_DRIVE_STRENGTH	/;"	d	file:
IMX6QDL_CLK_AHB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_AHB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AHB	/;"	d
IMX6QDL_CLK_ANACLK1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK1	/;"	d
IMX6QDL_CLK_ANACLK2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_ANACLK2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ANACLK2	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_APBH_DMA	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_APBH_DMA	/;"	d
IMX6QDL_CLK_ARM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ARM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ARM	/;"	d
IMX6QDL_CLK_ASRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_IPG	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_MEM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_MEM	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PODF	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_PRED	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_ASRC_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ASRC_SEL	/;"	d
IMX6QDL_CLK_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_AXI_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_AXI_SEL	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_ACLK	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_ACLK	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_IPG	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAAM_MEM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAAM_MEM	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_IPG	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN1_SERIAL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN1_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_IPG	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN2_SERIAL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN2_SERIAL	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_ROOT	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_ROOT	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CAN_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CAN_SEL	/;"	d
IMX6QDL_CLK_CKIH	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIH	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIH	/;"	d
IMX6QDL_CLK_CKIL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKIL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKIL	/;"	d
IMX6QDL_CLK_CKO	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO	/;"	d
IMX6QDL_CLK_CKO1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_PODF	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO1_SEL	/;"	d
IMX6QDL_CLK_CKO2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_PODF	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_CKO2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_CKO2_SEL	/;"	d
IMX6QDL_CLK_DUMMY	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_DUMMY	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_DUMMY	/;"	d
IMX6QDL_CLK_ECSPI1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI1	/;"	d
IMX6QDL_CLK_ECSPI2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI2	/;"	d
IMX6QDL_CLK_ECSPI3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI3	/;"	d
IMX6QDL_CLK_ECSPI4	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI4	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI4	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_ROOT	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_ROOT	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_ECSPI_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ECSPI_SEL	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_PODF	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_PODF	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_EIM_SLOW_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_EIM_SLOW_SEL	/;"	d
IMX6QDL_CLK_END	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_END	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_END	/;"	d
IMX6QDL_CLK_ENET	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET	/;"	d
IMX6QDL_CLK_ENET_REF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENET_REF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENET_REF	/;"	d
IMX6QDL_CLK_ENFC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PODF	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_PRED	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ENFC_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ENFC_SEL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_EXTAL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_EXTAL	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_IPG	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_MEM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_MEM	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PODF	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_PRED	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_ESAI_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ESAI_SEL	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_APB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_BCH_APB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_BCH_APB	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPMI_IO	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPMI_IO	/;"	d
IMX6QDL_CLK_GPT_3M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_3M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_3M	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPT_IPG_PER	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPT_IPG_PER	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_AXI	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU2D_CORE_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU2D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_AXI	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_PODF	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_CORE_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_CORE_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_GPU3D_SHADER_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_GPU3D_SHADER_SEL	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_IAHB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_IAHB	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HDMI_ISFR	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HDMI_ISFR	/;"	d
IMX6QDL_CLK_HSI_TX	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_PODF	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_HSI_TX_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_HSI_TX_SEL	/;"	d
IMX6QDL_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C1	/;"	d
IMX6QDL_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C2	/;"	d
IMX6QDL_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_I2C3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_I2C3	/;"	d
IMX6QDL_CLK_IIM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IIM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IIM	/;"	d
IMX6QDL_CLK_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG	/;"	d
IMX6QDL_CLK_IPG_PER	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPG_PER_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPG_PER_SEL	/;"	d
IMX6QDL_CLK_IPU1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_PRE_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI0_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_PRE_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_DI1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_PODF	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU1_SEL	/;"	d
IMX6QDL_CLK_IPU2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_PRE_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI0_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI0_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_PRE_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_DI1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_DI1_SEL	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_PODF	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_IPU2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_IPU2_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_DIV_3_5	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_PODF	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI0_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI0_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_DIV_3_5	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_PODF	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LDB_DI1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LDB_DI1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_GATE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_GATE	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_IN	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_IN	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS1_SEL	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_GATE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_GATE	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_IN	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_IN	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_LVDS2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_LVDS2_SEL	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_CORE_CFG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_CORE_CFG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MIPI_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MIPI_IPG	/;"	d
IMX6QDL_CLK_MLB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MLB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MLB	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH0_AXI_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_CG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_CG	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_MMDC_CH1_AXI_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF	/;"	d
IMX6QDL_CLK_OCRAM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OCRAM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OCRAM	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OPENVG_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OPENVG_AXI	/;"	d
IMX6QDL_CLK_OSC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_OSC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_OSC	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_AXI_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_AXI_SEL	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PCIE_REF_125M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PCIE_REF_125M	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PER1_BCH	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PER1_BCH	/;"	d
IMX6QDL_CLK_PERIPH	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH	/;"	d
IMX6QDL_CLK_PERIPH2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_CLK2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH2_PRE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH2_PRE	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_CLK2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PERIPH_PRE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PERIPH_PRE	/;"	d
IMX6QDL_CLK_PLL1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SW	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SW	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL1_SYS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL1_SYS	/;"	d
IMX6QDL_CLK_PLL2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_198M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_198M	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_BUS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_BUS	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD0_352M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD0_352M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD1_594M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD1_594M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL2_PFD2_396M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL2_PFD2_396M	/;"	d
IMX6QDL_CLK_PLL3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_120M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_120M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_60M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_60M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_80M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_80M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD0_720M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD0_720M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD1_540M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD1_540M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD2_508M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD2_508M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_PFD3_454M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_PFD3_454M	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL3_USB_OTG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL3_USB_OTG	/;"	d
IMX6QDL_CLK_PLL4	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_AUDIO_DIV	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL4_POST_DIV	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL4_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_POST_DIV	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_POST_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL5_VIDEO_DIV	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6QDL_CLK_PLL6	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL6_ENET	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL6_ENET	/;"	d
IMX6QDL_CLK_PLL7	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL7_USB_HOST	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL7_USB_HOST	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PLL8_MLB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PLL8_MLB	/;"	d
IMX6QDL_CLK_PRE0	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE0	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE0	/;"	d
IMX6QDL_CLK_PRE1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE1	/;"	d
IMX6QDL_CLK_PRE2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE2	/;"	d
IMX6QDL_CLK_PRE3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE3	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRE_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRE_AXI	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_APB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_APB	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG0_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG0_AXI	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_APB	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_APB	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PRG1_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PRG1_AXI	/;"	d
IMX6QDL_CLK_PWM1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM1	/;"	d
IMX6QDL_CLK_PWM2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM2	/;"	d
IMX6QDL_CLK_PWM3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM3	/;"	d
IMX6QDL_CLK_PWM4	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_PWM4	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_PWM4	/;"	d
IMX6QDL_CLK_ROM	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_ROM	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_ROM	/;"	d
IMX6QDL_CLK_SATA	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA	/;"	d
IMX6QDL_CLK_SATA_REF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SATA_REF_100M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SATA_REF_100M	/;"	d
IMX6QDL_CLK_SDMA	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SDMA	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SDMA	/;"	d
IMX6QDL_CLK_SPBA	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPBA	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPBA	/;"	d
IMX6QDL_CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_GCLK	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_GCLK	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PODF	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_PRED	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SPDIF_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SPDIF_SEL	/;"	d
IMX6QDL_CLK_SSI1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_IPG	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PODF	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_PRED	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI1_SEL	/;"	d
IMX6QDL_CLK_SSI2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_IPG	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PODF	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_PRED	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI2_SEL	/;"	d
IMX6QDL_CLK_SSI3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_IPG	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PODF	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_PRED	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_PRED	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_SSI3_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_SSI3_SEL	/;"	d
IMX6QDL_CLK_STEP	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_STEP	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_STEP	/;"	d
IMX6QDL_CLK_TWD	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_TWD	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_TWD	/;"	d
IMX6QDL_CLK_UART_IPG	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_IPG	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_IPG	/;"	d
IMX6QDL_CLK_UART_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SEL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_UART_SERIAL_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_UART_SERIAL_PODF	/;"	d
IMX6QDL_CLK_USBOH3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBOH3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBOH3	/;"	d
IMX6QDL_CLK_USBPHY1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY1_GATE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY1_GATE	/;"	d
IMX6QDL_CLK_USBPHY2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USBPHY2_GATE	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USBPHY2_GATE	/;"	d
IMX6QDL_CLK_USDHC1	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_PODF	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC1_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC1_SEL	/;"	d
IMX6QDL_CLK_USDHC2	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_PODF	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC2_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC2_SEL	/;"	d
IMX6QDL_CLK_USDHC3	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_PODF	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC3_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC3_SEL	/;"	d
IMX6QDL_CLK_USDHC4	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_PODF	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_USDHC4_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_USDHC4_SEL	/;"	d
IMX6QDL_CLK_VDOA	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDOA	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDOA	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VDO_AXI_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VDO_AXI_SEL	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VIDEO_27M	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VIDEO_27M	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_PODF	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_PODF	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_CLK_VPU_AXI_SEL	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_CLK_VPU_AXI_SEL	/;"	d
IMX6QDL_PLL1_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL1_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL1_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL2_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL2_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL3_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL3_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL4_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL4_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL5_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL5_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL6_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL6_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6QDL_PLL7_BYPASS_SRC	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6QDL_PLL7_BYPASS_SRC	/;"	d
IMX6Q_CLK_ECSPI5	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_CLK_ECSPI5	include/dt-bindings/clock/imx6qdl-clock.h	/^#define IMX6Q_CLK_ECSPI5	/;"	d
IMX6Q_DRIVE_STRENGTH	board/phytec/pcm058/pcm058.c	/^#define IMX6Q_DRIVE_STRENGTH	/;"	d	file:
IMX6SDL_DRIVE_STRENGTH	board/engicam/icorem6/icorem6.c	/^#define IMX6SDL_DRIVE_STRENGTH	/;"	d	file:
IMX6SDL_DRIVE_STRENGTH	board/udoo/udoo_spl.c	/^#define IMX6SDL_DRIVE_STRENGTH	/;"	d	file:
IMX6SDL_DRIVE_STRENGTH	board/wandboard/spl.c	/^#define IMX6SDL_DRIVE_STRENGTH	/;"	d	file:
IMX6UL_CA7_SECONDARY_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CA7_SECONDARY_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CA7_SECONDARY_SEL	/;"	d
IMX6UL_CLK_ADC1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC1	/;"	d
IMX6UL_CLK_ADC2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_ADC2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ADC2	/;"	d
IMX6UL_CLK_AHB	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AHB	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AHB	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ1	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ2	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_AIPSTZ3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AIPSTZ3	/;"	d
IMX6UL_CLK_APBHDMA	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_APBHDMA	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_APBHDMA	/;"	d
IMX6UL_CLK_ARM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ARM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ARM	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_IPG	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_ASRC_MEM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ASRC_MEM	/;"	d
IMX6UL_CLK_AXI	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_ALT_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_ALT_SEL	/;"	d
IMX6UL_CLK_AXI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_PODF	/;"	d
IMX6UL_CLK_AXI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_AXI_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_AXI_SEL	/;"	d
IMX6UL_CLK_BCH_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_PODF	/;"	d
IMX6UL_CLK_BCH_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_BCH_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_BCH_SEL	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_ACLK	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_ACLK	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_IPG	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAAM_MEM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAAM_MEM	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_IPG	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN1_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN1_SERIAL	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_IPG	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN2_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN2_SERIAL	/;"	d
IMX6UL_CLK_CAN_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_PODF	/;"	d
IMX6UL_CLK_CAN_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CAN_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CAN_SEL	/;"	d
IMX6UL_CLK_CKIH	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIH	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIH	/;"	d
IMX6UL_CLK_CKIL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CKIL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CKIL	/;"	d
IMX6UL_CLK_CSI	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI	/;"	d
IMX6UL_CLK_CSI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_PODF	/;"	d
IMX6UL_CLK_CSI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_CSI_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_CSI_SEL	/;"	d
IMX6UL_CLK_DCP_CLK	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DCP_CLK	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DCP_CLK	/;"	d
IMX6UL_CLK_DUMMY	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_DUMMY	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_DUMMY	/;"	d
IMX6UL_CLK_ECSPI1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI1	/;"	d
IMX6UL_CLK_ECSPI2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI2	/;"	d
IMX6UL_CLK_ECSPI3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI3	/;"	d
IMX6UL_CLK_ECSPI4	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI4	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI4	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_PODF	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_ECSPI_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ECSPI_SEL	/;"	d
IMX6UL_CLK_EIM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_PODF	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_EIM_SLOW_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EIM_SLOW_SEL	/;"	d
IMX6UL_CLK_END	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_END	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_END	/;"	d
IMX6UL_CLK_ENET	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET	/;"	d
IMX6UL_CLK_ENET2_REF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET2_REF_125M	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET2_REF_125M	/;"	d
IMX6UL_CLK_ENET_AHB	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_AHB	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_AHB	/;"	d
IMX6UL_CLK_ENET_PTP	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_PTP_REF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_PTP_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENET_REF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENET_REF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PODF	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_PRED	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_ENFC_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ENFC_SEL	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_ACLK	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_ACLK	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PIX	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PIX	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PODF	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_PRE_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_PRE_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPDC_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPDC_SEL	/;"	d
IMX6UL_CLK_EPIT1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT1	/;"	d
IMX6UL_CLK_EPIT2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_EPIT2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_EPIT2	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_EXTAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_EXTAL	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_IPG	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_MEM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_MEM	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PODF	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_PRED	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_ESAI_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ESAI_SEL	/;"	d
IMX6UL_CLK_GPMI_APB	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_APB	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_APB	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_BCH_APB	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_BCH_APB	/;"	d
IMX6UL_CLK_GPMI_IO	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_IO	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_IO	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_PODF	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPMI_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPMI_SEL	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_BUS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_BUS	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT1_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT1_SERIAL	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_BUS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_BUS	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT2_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT2_SERIAL	/;"	d
IMX6UL_CLK_GPT_3M	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_GPT_3M	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_GPT_3M	/;"	d
IMX6UL_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C1	/;"	d
IMX6UL_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C2	/;"	d
IMX6UL_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C3	/;"	d
IMX6UL_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_I2C4	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_I2C4	/;"	d
IMX6UL_CLK_IOMUXC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IOMUXC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IOMUXC	/;"	d
IMX6UL_CLK_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPG	/;"	d
IMX6UL_CLK_IPP_DI0	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI0	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI0	/;"	d
IMX6UL_CLK_IPP_DI1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_IPP_DI1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_IPP_DI1	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_APB	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_APB	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PIX	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PIX	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PODF	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRED	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_PRE_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_PRE_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LCDIF_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LCDIF_SEL	/;"	d
IMX6UL_CLK_LDB_DI0	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_3_5	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_7	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_DIV_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI0_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI0_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_3_5	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_3_5	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_7	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_7	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_DIV_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_DIV_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_LDB_DI1_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_LDB_DI1_SEL	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_FAST	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_FAST	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_P0_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_P0_IPG	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_MMDC_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_MMDC_PODF	/;"	d
IMX6UL_CLK_OCOTP	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCOTP	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCOTP	/;"	d
IMX6UL_CLK_OCRAM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OCRAM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OCRAM	/;"	d
IMX6UL_CLK_OSC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_OSC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_OSC	/;"	d
IMX6UL_CLK_PERCLK	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERCLK_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERCLK_SEL	/;"	d
IMX6UL_CLK_PERIPH	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH	/;"	d
IMX6UL_CLK_PERIPH2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2	/;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2 /;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_CLK2_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH2_PRE	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH2_PRE	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_CLK2_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_CLK2_SEL	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PERIPH_PRE	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PERIPH_PRE	/;"	d
IMX6UL_CLK_PER_BCH	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PER_BCH	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PER_BCH	/;"	d
IMX6UL_CLK_PLL1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1	/;"	d
IMX6UL_CLK_PLL1_SW	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SW	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SW	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL1_SYS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL1_SYS	/;"	d
IMX6UL_CLK_PLL2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2	/;"	d
IMX6UL_CLK_PLL2_198M	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_198M	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_198M	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_BUS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_BUS	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD0	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD0	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD1	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD2	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL2_PFD3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL2_PFD3	/;"	d
IMX6UL_CLK_PLL3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3	/;"	d
IMX6UL_CLK_PLL3_120M	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_120M	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_120M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_60M	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_60M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_80M	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_80M	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD0	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD0	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD1	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD2	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_PFD3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_PFD3	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL3_USB_OTG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL3_USB_OTG	/;"	d
IMX6UL_CLK_PLL4	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_AUDIO_DIV	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_AUDIO_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL4_POST_DIV	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL4_POST_DIV	/;"	d
IMX6UL_CLK_PLL5	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_POST_DIV	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_POST_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL5_VIDEO_DIV	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL5_VIDEO_DIV	/;"	d
IMX6UL_CLK_PLL6	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL6_ENET	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL6_ENET	/;"	d
IMX6UL_CLK_PLL7	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PLL7_USB_HOST	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PLL7_USB_HOST	/;"	d
IMX6UL_CLK_PWM1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM1	/;"	d
IMX6UL_CLK_PWM2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM2	/;"	d
IMX6UL_CLK_PWM3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM3	/;"	d
IMX6UL_CLK_PWM4	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM4	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM4	/;"	d
IMX6UL_CLK_PWM5	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM5	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM5	/;"	d
IMX6UL_CLK_PWM6	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM6	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM6	/;"	d
IMX6UL_CLK_PWM7	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM7	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM7	/;"	d
IMX6UL_CLK_PWM8	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PWM8	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PWM8	/;"	d
IMX6UL_CLK_PXP	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_PXP	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_PXP	/;"	d
IMX6UL_CLK_QSPI	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_PDOF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_PDOF	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_QSPI1_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_QSPI1_SEL	/;"	d
IMX6UL_CLK_ROM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_ROM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_ROM	/;"	d
IMX6UL_CLK_SAI1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_IPG	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PODF	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_PRED	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI1_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI1_SEL	/;"	d
IMX6UL_CLK_SAI2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_IPG	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PODF	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_PRED	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI2_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI2_SEL	/;"	d
IMX6UL_CLK_SAI3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_IPG	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PODF	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_PRED	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SAI3_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SAI3_SEL	/;"	d
IMX6UL_CLK_SDMA	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SDMA	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SDMA	/;"	d
IMX6UL_CLK_SIM	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM	/;"	d
IMX6UL_CLK_SIM1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM1	/;"	d
IMX6UL_CLK_SIM2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM2	/;"	d
IMX6UL_CLK_SIM_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PODF	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_PRE_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_PRE_SEL	/;"	d
IMX6UL_CLK_SIM_S	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_S	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_S	/;"	d
IMX6UL_CLK_SIM_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SIM_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SIM_SEL	/;"	d
IMX6UL_CLK_SPBA	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPBA	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPBA	/;"	d
IMX6UL_CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_GCLK	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_GCLK	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PODF	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_PRED	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_PRED	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_SPDIF_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_SPDIF_SEL	/;"	d
IMX6UL_CLK_STEP	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_STEP	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_STEP	/;"	d
IMX6UL_CLK_UART1_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_IPG	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART1_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART1_SERIAL	/;"	d
IMX6UL_CLK_UART2_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_IPG	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART2_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART2_SERIAL	/;"	d
IMX6UL_CLK_UART3_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_IPG	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART3_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART3_SERIAL	/;"	d
IMX6UL_CLK_UART4_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_IPG	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART4_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART4_SERIAL	/;"	d
IMX6UL_CLK_UART5_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_IPG	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART5_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART5_SERIAL	/;"	d
IMX6UL_CLK_UART6_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_IPG	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART6_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART6_SERIAL	/;"	d
IMX6UL_CLK_UART7_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_IPG	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART7_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART7_SERIAL	/;"	d
IMX6UL_CLK_UART8_IPG	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_IPG	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_IPG	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART8_SERIAL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART8_SERIAL	/;"	d
IMX6UL_CLK_UART_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_PODF	/;"	d
IMX6UL_CLK_UART_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_UART_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_UART_SEL	/;"	d
IMX6UL_CLK_USBOH3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBOH3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBOH3	/;"	d
IMX6UL_CLK_USBPHY1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY1_GATE	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY1_GATE	/;"	d
IMX6UL_CLK_USBPHY2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USBPHY2_GATE	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USBPHY2_GATE	/;"	d
IMX6UL_CLK_USDHC1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_PODF	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC1_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC1_SEL	/;"	d
IMX6UL_CLK_USDHC2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_PODF	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_PODF	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_USDHC2_SEL	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_USDHC2_SEL	/;"	d
IMX6UL_CLK_WDOG1	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG1	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG1	/;"	d
IMX6UL_CLK_WDOG2	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG2	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG2	/;"	d
IMX6UL_CLK_WDOG3	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_CLK_WDOG3	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_CLK_WDOG3	/;"	d
IMX6UL_PLL1_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL1_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL1_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL2_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL2_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL3_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL3_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL4_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL4_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL5_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL5_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL6_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL6_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX6UL_PLL7_BYPASS_SRC	include/dt-bindings/clock/imx6ul-clock.h	/^#define IMX6UL_PLL7_BYPASS_SRC	/;"	d
IMX7D_GPR5_CSI1_MUX_CTRL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IMX7D_GPR5_CSI1_MUX_CTRL_MASK	/;"	d
IMX7D_GPR5_CSI1_MUX_CTRL_MIPI_CSI	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IMX7D_GPR5_CSI1_MUX_CTRL_MIPI_CSI	/;"	d
IMX7D_GPR5_CSI1_MUX_CTRL_PARALLEL_CSI	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IMX7D_GPR5_CSI1_MUX_CTRL_PARALLEL_CSI	/;"	d
IMXIMAGE_V1	tools/imximage.h	/^	IMXIMAGE_V1 = 1,$/;"	e	enum:imximage_version
IMXIMAGE_V2	tools/imximage.h	/^	IMXIMAGE_V2$/;"	e	enum:imximage_version
IMXIMAGE_VER_INVALID	tools/imximage.h	/^	IMXIMAGE_VER_INVALID = -1,$/;"	e	enum:imximage_version
IMX_AIPI1_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_AIPI1_BASE /;"	d
IMX_AIPI1_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_AIPI1_BASE	/;"	d
IMX_AIPI2_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_AIPI2_BASE /;"	d
IMX_AIPI2_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_AIPI2_BASE	/;"	d
IMX_AIPS1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_AIPS1_BASE	/;"	d
IMX_AIPS2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_AIPS2_BASE	/;"	d
IMX_AITC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_AITC_BASE /;"	d
IMX_ARM926_ASIC	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ARM926_ASIC	/;"	d
IMX_ARM926_ROMPATCH	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ARM926_ROMPATCH	/;"	d
IMX_ASP_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_ASP_BASE /;"	d
IMX_ATA_DMA_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ATA_DMA_BASE	/;"	d
IMX_AUDMUX_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_AUDMUX_BASE	/;"	d
IMX_BOOTAUX	arch/arm/imx-common/Kconfig	/^config IMX_BOOTAUX$/;"	c
IMX_BTA_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_BTA_BASE /;"	d
IMX_CAN1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CAN1_BASE	/;"	d
IMX_CAN2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CAN2_BASE	/;"	d
IMX_CCM_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CCM_BASE	/;"	d
IMX_CCM_BASE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IMX_CCM_BASE	/;"	d
IMX_CLKCTL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CLKCTL_BASE	/;"	d
IMX_CONFIG	arch/arm/imx-common/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CONFIG	arch/arm/imx-common/Makefile	/^IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%).cfgtmp$/;"	m
IMX_CONFIG	board/advantech/dms-ba16/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CONFIG	board/ge/bx50v3/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CONFIG	board/inversepath/usbarmory/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CONFIG	board/seco/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CONFIG	board/tbs/tbs2910/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CONFIG	board/tqc/tqma6/Kconfig	/^config IMX_CONFIG$/;"	c
IMX_CSI_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_CSI_BASE /;"	d
IMX_CSI_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CSI_BASE	/;"	d
IMX_CSPI1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CSPI1_BASE	/;"	d
IMX_CSPI2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CSPI2_BASE	/;"	d
IMX_CSPI3_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_CSPI3_BASE	/;"	d
IMX_DMAC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_DMAC_BASE /;"	d
IMX_DRYICE_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_DRYICE_BASE	/;"	d
IMX_ECT_CTIO_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ECT_CTIO_BASE	/;"	d
IMX_ECT_IP1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ECT_IP1_BASE	/;"	d
IMX_ECT_IP2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ECT_IP2_BASE	/;"	d
IMX_EIM_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_EIM_BASE /;"	d
IMX_EMI_CTRL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_EMI_CTRL_BASE	/;"	d
IMX_EPIT1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_EPIT1_BASE	/;"	d
IMX_EPIT2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_EPIT2_BASE	/;"	d
IMX_ESAI_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ESAI_BASE	/;"	d
IMX_ESDRAMC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ESDRAMC_BASE	/;"	d
IMX_ESD_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_ESD_BASE	/;"	d
IMX_ETB_SLOT4_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ETB_SLOT4_BASE	/;"	d
IMX_ETB_SLOT5_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_ETB_SLOT5_BASE	/;"	d
IMX_FEC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/advantech_dms-ba16.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/apx4devkit.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/aristainetos-common.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/cgtqmx6eval.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/cm_fx6.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/colibri_imx7.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/colibri_vf.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/embestmx6boards.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/flea3.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/ge_bx50v3.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/gw_ventana.h	/^#define IMX_FEC_BASE /;"	d
IMX_FEC_BASE	include/configs/imx6qdl_icore.h	/^# define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/m53evk.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx35pdk.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx51evk.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx53evk.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx53loco.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx53smd.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6cuboxi.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6qarm2.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6sabre_common.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6slevk.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6sxsabreauto.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6sxsabresd.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx6ul_14x14_evk.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/mx7dsabresd.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/nitrogen6x.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/novena.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/ot1200.h	/^#define IMX_FEC_BASE /;"	d
IMX_FEC_BASE	include/configs/pcm052.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/pcm058.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/pico-imx6ul.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/platinum.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/secomx6quq7.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/tbs2910.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/titanium.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/tqma6.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/ts4800.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/udoo.h	/^#define IMX_FEC_BASE /;"	d
IMX_FEC_BASE	include/configs/vf610twr.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/wandboard.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/woodburn_common.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/xpress.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/zc5202.h	/^#define IMX_FEC_BASE	/;"	d
IMX_FEC_BASE	include/configs/zc5601.h	/^#define IMX_FEC_BASE	/;"	d
IMX_GPIO1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPIO1_BASE	/;"	d
IMX_GPIO2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPIO2_BASE	/;"	d
IMX_GPIO3_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPIO3_BASE	/;"	d
IMX_GPIO4_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPIO4_BASE	/;"	d
IMX_GPIO_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_GPIO_BASE /;"	d
IMX_GPIO_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_GPIO_BASE	/;"	d
IMX_GPIO_NR	arch/arm/include/asm/imx-common/gpio.h	/^#define IMX_GPIO_NR(/;"	d
IMX_GPT1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPT1_BASE	/;"	d
IMX_GPT2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPT2_BASE	/;"	d
IMX_GPT3_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPT3_BASE	/;"	d
IMX_GPT4_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_GPT4_BASE	/;"	d
IMX_I2C_REGSHIFT	drivers/i2c/mxc_i2c.c	/^#define IMX_I2C_REGSHIFT	/;"	d	file:
IMX_IIM_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_IIM_BASE	/;"	d
IMX_IIM_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_IIM_BASE	/;"	d
IMX_IIM_BASE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IMX_IIM_BASE /;"	d
IMX_IOPADCTL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_IOPADCTL_BASE	/;"	d
IMX_IOPADGRPCTL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_IOPADGRPCTL_BASE	/;"	d
IMX_IOPADINPUTSEL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_IOPADINPUTSEL_BASE	/;"	d
IMX_IOPADMUX_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_IOPADMUX_BASE	/;"	d
IMX_IO_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_IO_BASE	/;"	d
IMX_IO_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_IO_BASE	/;"	d
IMX_KPP_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_KPP_BASE	/;"	d
IMX_LCDC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_LCDC_BASE /;"	d
IMX_LCDC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_LCDC_BASE	/;"	d
IMX_M3IF_CTRL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_M3IF_CTRL_BASE	/;"	d
IMX_MAX_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_MAX_BASE	/;"	d
IMX_MMA_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_MMA_BASE /;"	d
IMX_MMC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_MMC_BASE /;"	d
IMX_MMC_SDHC1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_MMC_SDHC1_BASE	/;"	d
IMX_MMC_SDHC2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_MMC_SDHC2_BASE	/;"	d
IMX_MSHC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_MSHC_BASE /;"	d
IMX_NFC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_NFC_BASE	/;"	d
IMX_NFC_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_NFC_BASE	/;"	d
IMX_NO_PAD_CTL	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define IMX_NO_PAD_CTL	/;"	d
IMX_OTPWRITE_ENABLED	include/configs/ot1200.h	/^#define IMX_OTPWRITE_ENABLED$/;"	d
IMX_OTP_ADDR_MAX	include/configs/ot1200.h	/^#define IMX_OTP_ADDR_MAX /;"	d
IMX_OTP_BASE	include/configs/ot1200.h	/^#define IMX_OTP_BASE /;"	d
IMX_OTP_DATA_ERROR_VAL	include/configs/ot1200.h	/^#define IMX_OTP_DATA_ERROR_VAL /;"	d
IMX_OWIRE_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_OWIRE_BASE	/;"	d
IMX_PAD_SION	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define IMX_PAD_SION	/;"	d
IMX_PLL_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_PLL_BASE /;"	d
IMX_PLL_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_PLL_BASE	/;"	d
IMX_PWM1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_PWM1_BASE	/;"	d
IMX_PWM2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_PWM2_BASE	/;"	d
IMX_PWM3_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_PWM3_BASE	/;"	d
IMX_PWM4_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_PWM4_BASE	/;"	d
IMX_PWM_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_PWM_BASE /;"	d
IMX_RAM_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_RAM_BASE	/;"	d
IMX_RAM_SIZE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_RAM_SIZE	/;"	d
IMX_RDC	arch/arm/imx-common/Kconfig	/^config IMX_RDC$/;"	c
IMX_RNGD_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_RNGD_BASE	/;"	d
IMX_RTC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_RTC_BASE /;"	d
IMX_RTC_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_RTC_BASE	/;"	d
IMX_RTIC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_RTIC_BASE	/;"	d
IMX_SCC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SCC_BASE	/;"	d
IMX_SCM_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SCM_BASE	/;"	d
IMX_SDMA_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SDMA_BASE	/;"	d
IMX_SDRAMC_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_SDRAMC_BASE /;"	d
IMX_SDRAM_BANK0_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SDRAM_BANK0_BASE	/;"	d
IMX_SDRAM_BANK1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SDRAM_BANK1_BASE	/;"	d
IMX_SIM1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SIM1_BASE	/;"	d
IMX_SIM2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SIM2_BASE	/;"	d
IMX_SIM_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_SIM_BASE /;"	d
IMX_SLCDC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SLCDC_BASE	/;"	d
IMX_SMN_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SMN_BASE	/;"	d
IMX_SPBA_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SPBA_BASE	/;"	d
IMX_SPBA_CTRL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SPBA_CTRL_BASE	/;"	d
IMX_SPI1_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_SPI1_BASE /;"	d
IMX_SPI2_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_SPI2_BASE /;"	d
IMX_SSI1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SSI1_BASE	/;"	d
IMX_SSI2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_SSI2_BASE	/;"	d
IMX_SSI_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_SSI_BASE /;"	d
IMX_SYSCTRL_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_SYSCTRL_BASE /;"	d
IMX_SYSTEM_CTL_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_SYSTEM_CTL_BASE	/;"	d
IMX_THERMAL	drivers/thermal/Kconfig	/^config IMX_THERMAL$/;"	c
IMX_TIM1_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_TIM1_BASE /;"	d
IMX_TIM1_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_TIM1_BASE	/;"	d
IMX_TIM2_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_TIM2_BASE /;"	d
IMX_TIM2_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_TIM2_BASE	/;"	d
IMX_TIM3_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_TIM3_BASE	/;"	d
IMX_TIM4_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_TIM4_BASE	/;"	d
IMX_TIM5_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_TIM5_BASE	/;"	d
IMX_TIM6_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_TIM6_BASE	/;"	d
IMX_TSC_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_TSC_BASE	/;"	d
IMX_UART1_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_UART1_BASE /;"	d
IMX_UART2_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_UART2_BASE /;"	d
IMX_UART5_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_UART5_BASE	/;"	d
IMX_UART6_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_UART6_BASE	/;"	d
IMX_USBD_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_USBD_BASE /;"	d
IMX_USB_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_USB_BASE	/;"	d
IMX_USB_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IMX_USB_BASE	/;"	d
IMX_USB_BASE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IMX_USB_BASE	/;"	d
IMX_USB_PORT_OFFSET	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_USB_PORT_OFFSET	/;"	d
IMX_USB_PORT_OFFSET	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IMX_USB_PORT_OFFSET	/;"	d
IMX_USB_PORT_OFFSET	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IMX_USB_PORT_OFFSET	/;"	d
IMX_WDT_BASE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IMX_WDT_BASE /;"	d
IMX_WDT_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WDT_BASE	/;"	d
IMX_WDT_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_WDT_BASE	/;"	d
IMX_WEIM_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IMX_WEIM_BASE	/;"	d
IMX_WEIM_CS0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WEIM_CS0	/;"	d
IMX_WEIM_CS1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WEIM_CS1	/;"	d
IMX_WEIM_CS2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WEIM_CS2	/;"	d
IMX_WEIM_CS3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WEIM_CS3	/;"	d
IMX_WEIM_CS4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WEIM_CS4	/;"	d
IMX_WEIM_CTRL_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IMX_WEIM_CTRL_BASE	/;"	d
IM_ALLOC_INT	drivers/net/smc91111.h	/^#define	IM_ALLOC_INT	/;"	d
IM_EPH_INT	drivers/net/smc91111.h	/^#define	IM_EPH_INT	/;"	d
IM_ERCV_INT	drivers/net/smc91111.h	/^#define	IM_ERCV_INT	/;"	d
IM_MDINT	drivers/net/smc91111.h	/^#define	IM_MDINT	/;"	d
IM_RCV_INT	drivers/net/smc91111.h	/^#define IM_RCV_INT	/;"	d
IM_REG	drivers/net/smc91111.h	/^#define IM_REG	/;"	d
IM_RX_OVRN_INT	drivers/net/smc91111.h	/^#define	IM_RX_OVRN_INT	/;"	d
IM_TX_EMPTY_INT	drivers/net/smc91111.h	/^#define	IM_TX_EMPTY_INT	/;"	d
IM_TX_INT	drivers/net/smc91111.h	/^#define	IM_TX_INT	/;"	d
IN	include/usbdescriptors.h	/^#define IN	/;"	d
INBOUND	include/tsi148.h	/^typedef struct _INBOUND  INBOUND;$/;"	t	typeref:struct:_INBOUND
INBOUND_DOORBELL_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_DOORBELL_REGISTER_CPU_SIDE	/;"	d
INBOUND_DOORBELL_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_DOORBELL_REGISTER_PCI_SIDE	/;"	d
INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	/;"	d
INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	/;"	d
INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	/;"	d
INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	/;"	d
INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	/;"	d
INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	/;"	d
INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	/;"	d
INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	/;"	d
INBOUND_MESSAGE_REGISTER0_CPU_SIDE	include/gt64120.h	/^#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE	/;"	d
INBOUND_MESSAGE_REGISTER0_PCI_SIDE	include/gt64120.h	/^#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE	/;"	d
INBOUND_MESSAGE_REGISTER1_CPU_SIDE	include/gt64120.h	/^#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE	/;"	d
INBOUND_MESSAGE_REGISTER1_PCI_SIDE	include/gt64120.h	/^#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE	/;"	d
INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	/;"	d
INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	/;"	d
INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	/;"	d
INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	/;"	d
INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	include/gt64120.h	/^#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	/;"	d
INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	include/gt64120.h	/^#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	/;"	d
INBUFM	drivers/usb/host/r8a66597.h	/^#define	INBUFM	/;"	d
INCOMPRX_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define INCOMPRX_R	/;"	d
INCOMPRX_RH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define INCOMPRX_RH	/;"	d
INCOMPTX_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define INCOMPTX_T	/;"	d
INCR	arch/arm/include/asm/ti-common/ti-edma3.h	/^	INCR = 0,$/;"	e	enum:edma3_address_mode
INC_DCNT_THRESHOLD_25MV	include/fsl_usb.h	/^#define INC_DCNT_THRESHOLD_25MV /;"	d
INC_DCNT_THRESHOLD_50MV	include/fsl_usb.h	/^#define INC_DCNT_THRESHOLD_50MV /;"	d
INC_DECODED_INST_LEN	drivers/bios_emulator/include/x86emu/debug.h	/^# define INC_DECODED_INST_LEN(/;"	d
INC_DECODED_INST_LEN	drivers/bios_emulator/include/x86emu/debug.h	/^#define INC_DECODED_INST_LEN(/;"	d
INDEX	arch/arm/include/asm/omap_mmc.h	/^#define INDEX(/;"	d
INDEX	drivers/serial/serial-uclass.c	/^#define INDEX /;"	d	file:
INDEX0	cmd/tpm_test.c	/^#define INDEX0	/;"	d	file:
INDEX1	cmd/tpm_test.c	/^#define INDEX1	/;"	d	file:
INDEX2	cmd/tpm_test.c	/^#define INDEX2	/;"	d	file:
INDEX3	cmd/tpm_test.c	/^#define INDEX3	/;"	d	file:
INDEX_BASE	arch/mips/lib/cache_init.S	/^#define INDEX_BASE	/;"	d	file:
INDEX_CTRL_REG	drivers/mtd/nand/denali.h	/^#define INDEX_CTRL_REG /;"	d
INDEX_DATA_REG	drivers/mtd/nand/denali.h	/^#define INDEX_DATA_REG /;"	d
INDEX_INITIALISED	cmd/tpm_test.c	/^#define INDEX_INITIALISED	/;"	d	file:
INDEX_INVALIDATE_I	arch/mips/include/asm/cacheops.h	/^#define INDEX_INVALIDATE_I /;"	d
INDEX_INVALIDATE_SI	arch/mips/include/asm/cacheops.h	/^#define INDEX_INVALIDATE_SI /;"	d
INDEX_LOAD_DATA_D	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_DATA_D	/;"	d
INDEX_LOAD_DATA_I	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_DATA_I	/;"	d
INDEX_LOAD_DATA_S	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_DATA_S	/;"	d
INDEX_LOAD_TAG_D	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_TAG_D	/;"	d
INDEX_LOAD_TAG_I	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_TAG_I	/;"	d
INDEX_LOAD_TAG_S	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_TAG_S	/;"	d
INDEX_LOAD_TAG_SD	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_TAG_SD	/;"	d
INDEX_LOAD_TAG_SI	arch/mips/include/asm/cacheops.h	/^#define INDEX_LOAD_TAG_SI	/;"	d
INDEX_MASK	arch/arm/include/asm/omap_mmc.h	/^#define INDEX_MASK	/;"	d
INDEX_OFFSET	arch/arm/include/asm/omap_mmc.h	/^#define INDEX_OFFSET	/;"	d
INDEX_STORE_DATA_D	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_DATA_D	/;"	d
INDEX_STORE_DATA_I	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_DATA_I	/;"	d
INDEX_STORE_DATA_S	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_DATA_S	/;"	d
INDEX_STORE_TAG_D	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_TAG_D	/;"	d
INDEX_STORE_TAG_I	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_TAG_I	/;"	d
INDEX_STORE_TAG_S	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_TAG_S	/;"	d
INDEX_STORE_TAG_SD	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_TAG_SD	/;"	d
INDEX_STORE_TAG_SI	arch/mips/include/asm/cacheops.h	/^#define INDEX_STORE_TAG_SI	/;"	d
INDEX_WRITEBACK_INV_D	arch/mips/include/asm/cacheops.h	/^#define INDEX_WRITEBACK_INV_D /;"	d
INDEX_WRITEBACK_INV_S	arch/mips/include/asm/cacheops.h	/^#define INDEX_WRITEBACK_INV_S	/;"	d
INDEX_WRITEBACK_INV_SD	arch/mips/include/asm/cacheops.h	/^#define INDEX_WRITEBACK_INV_SD /;"	d
INDIRECT_BLOCKS	include/ext_common.h	/^#define INDIRECT_BLOCKS	/;"	d
INDIRECT_PCI_OP	drivers/pci/pci_indirect.c	/^#define INDIRECT_PCI_OP(/;"	d	file:
INDIRECT_PCI_OP_ERRATA6	drivers/pci/pci_indirect.c	/^#define INDIRECT_PCI_OP_ERRATA6(/;"	d	file:
INDIRECT_TYPE_NO_PCIE_LINK	include/pci.h	/^#define INDIRECT_TYPE_NO_PCIE_LINK	/;"	d
INFINEON_TCKE_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TCKE_165	/;"	d
INFINEON_TDAL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TDAL_165	/;"	d
INFINEON_TDPL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TDPL_165	/;"	d
INFINEON_TRAS_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TRAS_165	/;"	d
INFINEON_TRCD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TRCD_165	/;"	d
INFINEON_TRC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TRC_165	/;"	d
INFINEON_TRFC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TRFC_165	/;"	d
INFINEON_TRP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TRP_165	/;"	d
INFINEON_TRRD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TRRD_165	/;"	d
INFINEON_TWTR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TWTR_165	/;"	d
INFINEON_TXP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_TXP_165	/;"	d
INFINEON_V_ACTIMA_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_V_ACTIMA_165	/;"	d
INFINEON_V_ACTIMB_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_V_ACTIMB_165	/;"	d
INFINEON_XSR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define INFINEON_XSR_165	/;"	d
INFO	drivers/usb/gadget/at91_udc.h	/^#define INFO(/;"	d
INFO	drivers/usb/gadget/storage_common.c	/^#define INFO(/;"	d	file:
INFO	drivers/usb/host/isp116x.h	/^#define INFO(/;"	d
INFO	drivers/usb/musb-new/musb_debug.h	/^#define INFO(/;"	d
INFO	fs/reiserfs/reiserfs_private.h	/^#define INFO /;"	d
INFO	tools/patman/tout.py	/^INFO = 3$/;"	v
INFO1M_ACCESS_END	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_ACCESS_END	/;"	d
INFO1M_ALL	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_ALL	/;"	d
INFO1M_CARD_IN	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_CARD_IN	/;"	d
INFO1M_CARD_RE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_CARD_RE	/;"	d
INFO1M_DATA3_CARD_IN	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_DATA3_CARD_IN	/;"	d
INFO1M_DATA3_CARD_RE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_DATA3_CARD_RE	/;"	d
INFO1M_RESP_END	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_RESP_END	/;"	d
INFO1M_SET	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1M_SET	/;"	d
INFO1_ACCESS_END	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_ACCESS_END	/;"	d
INFO1_CARD_IN	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_CARD_IN	/;"	d
INFO1_CARD_RE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_CARD_RE	/;"	d
INFO1_DATA3	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_DATA3	/;"	d
INFO1_DATA3_CARD_IN	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_DATA3_CARD_IN	/;"	d
INFO1_DATA3_CARD_RE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_DATA3_CARD_RE	/;"	d
INFO1_ISD0CD	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_ISD0CD	/;"	d
INFO1_RESP_END	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_RESP_END	/;"	d
INFO1_WRITE_PRO	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO1_WRITE_PRO	/;"	d
INFO2M_ALL	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_ALL	/;"	d
INFO2M_ALL_ERR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_ALL_ERR	/;"	d
INFO2M_BRE_ENABLE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_BRE_ENABLE	/;"	d
INFO2M_BUF_ILL_READ	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_BUF_ILL_READ	/;"	d
INFO2M_BUF_ILL_WRITE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_BUF_ILL_WRITE	/;"	d
INFO2M_BWE_ENABLE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_BWE_ENABLE	/;"	d
INFO2M_CMD_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_CMD_ERROR	/;"	d
INFO2M_CRC_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_CRC_ERROR	/;"	d
INFO2M_END_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_END_ERROR	/;"	d
INFO2M_ILA	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_ILA	/;"	d
INFO2M_RESP_TIMEOUT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_RESP_TIMEOUT	/;"	d
INFO2M_TIMEOUT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2M_TIMEOUT	/;"	d
INFO2_ALL_ERR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_ALL_ERR	/;"	d
INFO2_BRE_ENABLE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_BRE_ENABLE	/;"	d
INFO2_BUF_ILL_READ	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_BUF_ILL_READ	/;"	d
INFO2_BUF_ILL_WRITE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_BUF_ILL_WRITE	/;"	d
INFO2_BWE_ENABLE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_BWE_ENABLE	/;"	d
INFO2_CBUSY	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_CBUSY	/;"	d
INFO2_CMD_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_CMD_ERROR	/;"	d
INFO2_CRC_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_CRC_ERROR	/;"	d
INFO2_END_ERROR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_END_ERROR	/;"	d
INFO2_ILA	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_ILA	/;"	d
INFO2_RESP_TIMEOUT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_RESP_TIMEOUT	/;"	d
INFO2_SDDAT0	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_SDDAT0	/;"	d
INFO2_TIMEOUT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define INFO2_TIMEOUT	/;"	d
INFOFRAME_I2C_ADDR	board/gdsys/common/adv7611.c	/^	INFOFRAME_I2C_ADDR = 0x3e,$/;"	e	enum:__anon3d55bc280103	file:
INFORM0_OFFSET	include/configs/exynos5-common.h	/^#define INFORM0_OFFSET	/;"	d
INFORM1_OFFSET	include/configs/exynos5-common.h	/^#define INFORM1_OFFSET	/;"	d
INFORM2_OFFSET	include/configs/exynos5-common.h	/^#define INFORM2_OFFSET	/;"	d
INFORM3_OFFSET	include/configs/exynos5-common.h	/^#define INFORM3_OFFSET	/;"	d
INFO_ACTIVE	drivers/usb/gadget/ci_udc.h	/^#define INFO_ACTIVE	/;"	d
INFO_BUFFER_ERROR	drivers/usb/gadget/ci_udc.h	/^#define INFO_BUFFER_ERROR	/;"	d
INFO_BYTES	drivers/usb/gadget/ci_udc.h	/^#define INFO_BYTES(/;"	d
INFO_HALTED	drivers/usb/gadget/ci_udc.h	/^#define INFO_HALTED	/;"	d
INFO_IOC	drivers/usb/gadget/ci_udc.h	/^#define INFO_IOC	/;"	d
INFO_TX_ERROR	drivers/usb/gadget/ci_udc.h	/^#define INFO_TX_ERROR	/;"	d
INIT	net/bootp.h	/^typedef enum { INIT,$/;"	e	enum:__anon7cb633f50103
INIT1	drivers/mtd/ubi/crc32.c	/^#define INIT1 /;"	d	file:
INIT2	drivers/mtd/ubi/crc32.c	/^#define INIT2 /;"	d	file:
INITBITS	lib/zlib/inflate.c	/^#define INITBITS(/;"	d	file:
INITIAL	scripts/kconfig/zconf.lex.c	/^#define INITIAL /;"	d	file:
INITIAL_CS_CONFIG	board/tqc/tqm834x/tqm834x.c	/^#define INITIAL_CS_CONFIG	/;"	d	file:
INITIAL_IRQ_PREF	board/mpl/pati/pati.h	/^#define INITIAL_IRQ_PREF	/;"	d
INITIAL_MEM_0M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_0M	/;"	d
INITIAL_MEM_12M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_12M	/;"	d
INITIAL_MEM_16M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_16M	/;"	d
INITIAL_MEM_20M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_20M	/;"	d
INITIAL_MEM_24M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_24M	/;"	d
INITIAL_MEM_28M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_28M	/;"	d
INITIAL_MEM_4M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_4M	/;"	d
INITIAL_MEM_8M	board/mpl/pati/pati.h	/^#define INITIAL_MEM_8M	/;"	d
INITIAL_USB_SCAN_DELAY	board/sunxi/Kconfig	/^config INITIAL_USB_SCAN_DELAY$/;"	c
INITPC	arch/m68k/cpu/mcf5227x/start.S	/^INITPC:	.long	ASM_DRAMINIT		\/* Initial PC 	*\/$/;"	l
INITPC	arch/m68k/cpu/mcf5227x/start.S	/^INITPC:	.long	_START			\/* Initial PC 	*\/$/;"	l
INITPC	arch/m68k/cpu/mcf523x/start.S	/^INITPC:	.long	_START			\/* Initial PC	*\/$/;"	l
INITPC	arch/m68k/cpu/mcf532x/start.S	/^INITPC:	.long	_START			\/* Initial PC		*\/$/;"	l
INITPC	arch/m68k/cpu/mcf5445x/start.S	/^INITPC:	.long	ASM_DRAMINIT		\/* Initial PC 	*\/$/;"	l
INITPC	arch/m68k/cpu/mcf5445x/start.S	/^INITPC:	.long	ASM_DRAMINIT_N		\/* Initial PC 	*\/$/;"	l
INITPC	arch/m68k/cpu/mcf5445x/start.S	/^INITPC:	.long	_START			\/* Initial PC 	*\/$/;"	l
INITPC	arch/m68k/cpu/mcf547x_8x/start.S	/^INITPC:	.long	_START			\/* Initial PC	*\/$/;"	l
INITRD_HIGH	include/configs/tegra-common-post.h	/^#define INITRD_HIGH /;"	d
INITRD_SIZE	arch/sh/include/asm/zimage.h	/^#define INITRD_SIZE	/;"	d
INITRD_START	arch/sh/include/asm/zimage.h	/^#define INITRD_START	/;"	d
INITSP	arch/m68k/cpu/mcf5227x/start.S	/^INITSP:	.long	0			\/* Initial SP	*\/$/;"	l
INITSP	arch/m68k/cpu/mcf523x/start.S	/^INITSP:	.long	0x00000000		\/* Initial SP	*\/$/;"	l
INITSP	arch/m68k/cpu/mcf532x/start.S	/^INITSP:	.long	0x00000000		\/* Initial SP	*\/$/;"	l
INITSP	arch/m68k/cpu/mcf5445x/start.S	/^INITSP:	.long	0			\/* Initial SP	*\/$/;"	l
INITSP	arch/m68k/cpu/mcf547x_8x/start.S	/^INITSP:	.long	0x00000000		\/* Initial SP	*\/$/;"	l
INIT_BUFFER_SIZE	drivers/mtd/nand/pxa3xx_nand.c	/^#define INIT_BUFFER_SIZE	/;"	d	file:
INIT_CONTROLLER	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	INIT_CONTROLLER,$/;"	e	enum:auto_tune_stage
INIT_CONTROLLER_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define INIT_CONTROLLER_MASK_BIT	/;"	d
INIT_CSS	arch/arm/include/asm/proc-armv/processor.h	/^#define INIT_CSS /;"	d
INIT_DESKEW_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define INIT_DESKEW_EN	/;"	d
INIT_DONE	drivers/ddr/microchip/ddr2_regs.h	/^#define INIT_DONE	/;"	d
INIT_ESERIAL_STRUCTURE	drivers/serial/serial_ns16550.c	/^#define INIT_ESERIAL_STRUCTURE(/;"	d	file:
INIT_FUNC_WATCHDOG_INIT	include/watchdog.h	/^#define INIT_FUNC_WATCHDOG_INIT	/;"	d
INIT_FUNC_WATCHDOG_INIT	include/watchdog.h	/^#define INIT_FUNC_WATCHDOG_INIT$/;"	d
INIT_FUNC_WATCHDOG_RESET	include/watchdog.h	/^#define INIT_FUNC_WATCHDOG_RESET	/;"	d
INIT_FUNC_WATCHDOG_RESET	include/watchdog.h	/^#define INIT_FUNC_WATCHDOG_RESET$/;"	d
INIT_HLIST_HEAD	include/linux/list.h	/^#define INIT_HLIST_HEAD(/;"	d
INIT_HLIST_NODE	include/linux/list.h	/^static inline void INIT_HLIST_NODE(struct hlist_node *h)$/;"	f	typeref:typename:void
INIT_INITSTREAM	arch/arm/include/asm/omap_mmc.h	/^#define INIT_INITSTREAM	/;"	d
INIT_LIST_HEAD	include/linux/list.h	/^static inline void INIT_LIST_HEAD(struct list_head *list)$/;"	f	typeref:typename:void
INIT_MEM	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define INIT_MEM	/;"	d
INIT_MEM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	INIT_MEM			= 0,$/;"	e	enum:__anon957231910203	file:
INIT_MMAP	arch/powerpc/include/asm/processor.h	/^#define INIT_MMAP /;"	d
INIT_NOINIT	arch/arm/include/asm/omap_mmc.h	/^#define INIT_NOINIT	/;"	d
INIT_PHASE_BOOT	arch/x86/include/asm/fsp/fsp_api.h	/^	INIT_PHASE_BOOT	= 0x40$/;"	e	enum:fsp_phase
INIT_PHASE_PCI	arch/x86/include/asm/fsp/fsp_api.h	/^	INIT_PHASE_PCI	= 0x20,$/;"	e	enum:fsp_phase
INIT_PSC_SERIAL_STRUCTURE	arch/powerpc/cpu/mpc512x/serial.c	/^#define INIT_PSC_SERIAL_STRUCTURE(/;"	d	file:
INIT_PWR	drivers/mmc/arm_pl180_mmci.h	/^#define INIT_PWR	/;"	d
INIT_REBOOT	net/bootp.h	/^	       INIT_REBOOT,$/;"	e	enum:__anon7cb633f50103
INIT_RESET	board/freescale/ls1021atwr/ls1021atwr.c	/^#define INIT_RESET	/;"	d	file:
INIT_RL_DELAY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define INIT_RL_DELAY /;"	d
INIT_S3C_SERIAL_STRUCTURE	drivers/serial/serial_s3c24x0.c	/^#define INIT_S3C_SERIAL_STRUCTURE(/;"	d	file:
INIT_SECTION	tools/imagetool.h	/^#define INIT_SECTION(/;"	d
INIT_SP	arch/powerpc/include/asm/processor.h	/^#define INIT_SP	/;"	d
INIT_START	drivers/ddr/microchip/ddr2_regs.h	/^#define INIT_START	/;"	d
INIT_STATE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define INIT_STATE	/;"	d
INIT_STATE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	INIT_STATE			= 0,$/;"	e	enum:__anon957231910203	file:
INIT_STATE	lib/zlib/deflate.h	/^#define INIT_STATE /;"	d
INIT_THREAD	arch/arm/include/asm/processor.h	/^#define INIT_THREAD /;"	d
INIT_THREAD	arch/avr32/include/asm/processor.h	/^#define INIT_THREAD /;"	d
INIT_THREAD	arch/powerpc/include/asm/processor.h	/^#define INIT_THREAD /;"	d
INIT_WL_DELAY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define INIT_WL_DELAY /;"	d
INIT_WORK	include/linux/compat.h	/^#define INIT_WORK(/;"	d
INL	drivers/net/dc2114x.c	/^static int INL(struct eth_device* dev, u_long addr)$/;"	f	typeref:typename:int	file:
INL	drivers/net/eepro100.c	/^static inline int INL (struct eth_device *dev, u_long addr)$/;"	f	typeref:typename:int	file:
INL	drivers/net/natsemi.c	/^INL(struct eth_device *dev, u_long addr)$/;"	f	typeref:typename:int	file:
INL	drivers/net/ns8382x.c	/^INL(struct eth_device *dev, u_long addr)$/;"	f	typeref:typename:int	file:
INODE_LOCKED_MAX	fs/ubifs/super.c	/^#define INODE_LOCKED_MAX	/;"	d	file:
INPKT_DELAY_SOF	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define INPKT_DELAY_SOF	/;"	d
INPLL	drivers/video/ati_radeon_fb.h	/^#define INPLL(/;"	d
INPUTBOX_HEIGTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define INPUTBOX_HEIGTH_MIN /;"	d
INPUTBOX_WIDTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define INPUTBOX_WIDTH_MIN /;"	d
INPUT_BOX	scripts/kconfig/nconf.h	/^	INPUT_BOX,$/;"	e	enum:__anon6c8863760103
INPUT_BUFFER_LEN	include/input.h	/^	INPUT_BUFFER_LEN	= 16,$/;"	e	enum:__anond78b72be0103
INPUT_EN	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_EN	include/dt-bindings/pinctrl/am33xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	include/dt-bindings/pinctrl/am43xx.h	/^#define INPUT_EN	/;"	d
INPUT_EN	include/dt-bindings/pinctrl/dra.h	/^#define INPUT_EN	/;"	d
INPUT_EN	include/dt-bindings/pinctrl/omap.h	/^#define INPUT_EN	/;"	d
INPUT_FIELD	scripts/kconfig/nconf.h	/^	INPUT_FIELD,$/;"	e	enum:__anon6c8863760103
INPUT_HEADING	scripts/kconfig/nconf.h	/^	INPUT_HEADING,$/;"	e	enum:__anon6c8863760103
INPUT_LED_CAPS	include/input.h	/^	INPUT_LED_CAPS		= 1 << 2,$/;"	e	enum:__anond78b72be0203
INPUT_LED_NUM	include/input.h	/^	INPUT_LED_NUM		= 1 << 1,$/;"	e	enum:__anond78b72be0203
INPUT_LED_SCROLL	include/input.h	/^	INPUT_LED_SCROLL	= 1 << 0,$/;"	e	enum:__anond78b72be0203
INPUT_MAX_MODIFIERS	include/input.h	/^	INPUT_MAX_MODIFIERS	= 4,$/;"	e	enum:__anond78b72be0103
INPUT_PROP_ACCELEROMETER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_ACCELEROMETER	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_ACCELEROMETER	/;"	d
INPUT_PROP_BUTTONPAD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_BUTTONPAD	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_BUTTONPAD	/;"	d
INPUT_PROP_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_CNT	/;"	d
INPUT_PROP_DIRECT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_DIRECT	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_DIRECT	/;"	d
INPUT_PROP_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_MAX	/;"	d
INPUT_PROP_POINTER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTER	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTER	/;"	d
INPUT_PROP_POINTING_STICK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_POINTING_STICK	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_POINTING_STICK	/;"	d
INPUT_PROP_SEMI_MT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_SEMI_MT	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_SEMI_MT	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_PROP_TOPBUTTONPAD	include/dt-bindings/input/linux-event-codes.h	/^#define INPUT_PROP_TOPBUTTONPAD	/;"	d
INPUT_STATE_REG	board/freescale/common/vsc3316_3308.c	/^#define INPUT_STATE_REG	/;"	d	file:
INPUT_TEXT	scripts/kconfig/nconf.h	/^	INPUT_TEXT,$/;"	e	enum:__anon6c8863760103
INREG	drivers/video/ati_radeon_fb.h	/^#define INREG(/;"	d
INREG16	drivers/video/ati_radeon_fb.h	/^#define INREG16(/;"	d
INREG8	drivers/video/ati_radeon_fb.h	/^#define INREG8(/;"	d
INSERT_STRING	lib/zlib/deflate.c	/^#define INSERT_STRING(/;"	d	file:
INSTR0	drivers/spi/fsl_qspi.h	/^#define INSTR0(/;"	d
INSTR0_SHIFT	drivers/spi/fsl_qspi.h	/^#define INSTR0_SHIFT	/;"	d
INSTR1	drivers/spi/fsl_qspi.h	/^#define INSTR1(/;"	d
INSTR1_SHIFT	drivers/spi/fsl_qspi.h	/^#define INSTR1_SHIFT	/;"	d
INSTRUCTION	include/bedbug/ppc.h	/^#define INSTRUCTION(/;"	d
INS_LINK_DOWN	drivers/net/ax88180.h	/^	INS_LINK_DOWN,$/;"	e	enum:_ax88180_link_state
INS_LINK_UNKNOWN	drivers/net/ax88180.h	/^	INS_LINK_UNKNOWN$/;"	e	enum:_ax88180_link_state
INS_LINK_UP	drivers/net/ax88180.h	/^	INS_LINK_UP,$/;"	e	enum:_ax88180_link_state
INT	cmd/immap.c	/^		INT$/;"	e	enum:do_iopset::__anonb0469eed0103	file:
INT	tools/buildman/kconfiglib.py	/^UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6)$/;"	v
INT0_HI_CAN0_BUSOFF	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CAN0_BUSOFF	/;"	d
INT0_HI_CAN0_ERROR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CAN0_ERROR	/;"	d
INT0_HI_CAN0_MBOR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CAN0_MBOR	/;"	d
INT0_HI_CAN1_BOFFINT	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BOFFINT	/;"	d
INT0_HI_CAN1_BOFFINT	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BOFFINT	/;"	d
INT0_HI_CAN1_BUF0I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF0I	/;"	d
INT0_HI_CAN1_BUF0I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF0I	/;"	d
INT0_HI_CAN1_BUF10I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF10I	/;"	d
INT0_HI_CAN1_BUF10I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF10I	/;"	d
INT0_HI_CAN1_BUF11I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF11I	/;"	d
INT0_HI_CAN1_BUF11I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF11I	/;"	d
INT0_HI_CAN1_BUF12I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF12I	/;"	d
INT0_HI_CAN1_BUF12I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF12I	/;"	d
INT0_HI_CAN1_BUF13I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF13I	/;"	d
INT0_HI_CAN1_BUF13I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF13I	/;"	d
INT0_HI_CAN1_BUF14I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF14I	/;"	d
INT0_HI_CAN1_BUF14I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF14I	/;"	d
INT0_HI_CAN1_BUF15I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF15I	/;"	d
INT0_HI_CAN1_BUF15I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF15I	/;"	d
INT0_HI_CAN1_BUF1I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF1I	/;"	d
INT0_HI_CAN1_BUF1I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF1I	/;"	d
INT0_HI_CAN1_BUF2I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF2I	/;"	d
INT0_HI_CAN1_BUF2I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF2I	/;"	d
INT0_HI_CAN1_BUF3I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF3I	/;"	d
INT0_HI_CAN1_BUF3I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF3I	/;"	d
INT0_HI_CAN1_BUF4I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF4I	/;"	d
INT0_HI_CAN1_BUF4I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF4I	/;"	d
INT0_HI_CAN1_BUF5I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF5I	/;"	d
INT0_HI_CAN1_BUF5I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF5I	/;"	d
INT0_HI_CAN1_BUF6I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF6I	/;"	d
INT0_HI_CAN1_BUF6I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF6I	/;"	d
INT0_HI_CAN1_BUF7I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF7I	/;"	d
INT0_HI_CAN1_BUF7I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF7I	/;"	d
INT0_HI_CAN1_BUF8I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF8I	/;"	d
INT0_HI_CAN1_BUF8I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF8I	/;"	d
INT0_HI_CAN1_BUF9I	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_BUF9I	/;"	d
INT0_HI_CAN1_BUF9I	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_BUF9I	/;"	d
INT0_HI_CAN1_BUSOFF	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CAN1_BUSOFF	/;"	d
INT0_HI_CAN1_ERRINT	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_CAN1_ERRINT	/;"	d
INT0_HI_CAN1_ERRINT	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_CAN1_ERRINT	/;"	d
INT0_HI_CAN1_ERROR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CAN1_ERROR	/;"	d
INT0_HI_CAN1_MBOR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CAN1_MBOR	/;"	d
INT0_HI_CBPCI	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_CBPCI	/;"	d
INT0_HI_CFM_AEIF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_CFM_AEIF	/;"	d
INT0_HI_CFM_CBEIF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_CFM_CBEIF	/;"	d
INT0_HI_CFM_CCIF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_CFM_CCIF	/;"	d
INT0_HI_CFM_PVIF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_CFM_PVIF	/;"	d
INT0_HI_COMMTIM_TC	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_COMMTIM_TC	/;"	d
INT0_HI_DMA	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_DMA	/;"	d
INT0_HI_DTMR0	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_DTMR0	/;"	d
INT0_HI_DTMR0	arch/m68k/include/asm/m5227x.h	/^#define INT0_HI_DTMR0	/;"	d
INT0_HI_DTMR0	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_DTMR0	/;"	d
INT0_HI_DTMR0	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_DTMR0	/;"	d
INT0_HI_DTMR0	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_DTMR0	/;"	d
INT0_HI_DTMR0	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_DTMR0	/;"	d
INT0_HI_DTMR1	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_DTMR1	/;"	d
INT0_HI_DTMR1	arch/m68k/include/asm/m5227x.h	/^#define INT0_HI_DTMR1	/;"	d
INT0_HI_DTMR1	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_DTMR1	/;"	d
INT0_HI_DTMR1	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_DTMR1	/;"	d
INT0_HI_DTMR1	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_DTMR1	/;"	d
INT0_HI_DTMR1	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_DTMR1	/;"	d
INT0_HI_DTMR2	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_DTMR2	/;"	d
INT0_HI_DTMR2	arch/m68k/include/asm/m5227x.h	/^#define INT0_HI_DTMR2	/;"	d
INT0_HI_DTMR2	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_DTMR2	/;"	d
INT0_HI_DTMR2	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_DTMR2	/;"	d
INT0_HI_DTMR2	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_DTMR2	/;"	d
INT0_HI_DTMR2	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_DTMR2	/;"	d
INT0_HI_DTMR3	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_DTMR3	/;"	d
INT0_HI_DTMR3	arch/m68k/include/asm/m5227x.h	/^#define INT0_HI_DTMR3	/;"	d
INT0_HI_DTMR3	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_DTMR3	/;"	d
INT0_HI_DTMR3	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_DTMR3	/;"	d
INT0_HI_DTMR3	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_DTMR3	/;"	d
INT0_HI_DTMR3	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_DTMR3	/;"	d
INT0_HI_FEC0	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_FEC0	/;"	d
INT0_HI_FEC0_BABR	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_BABR	/;"	d
INT0_HI_FEC0_BABR	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_FEC0_BABR	/;"	d
INT0_HI_FEC0_BABR	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_BABR	/;"	d
INT0_HI_FEC0_BABR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_BABR	/;"	d
INT0_HI_FEC0_BABT	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_BABT	/;"	d
INT0_HI_FEC0_BABT	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_FEC0_BABT	/;"	d
INT0_HI_FEC0_BABT	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_BABT	/;"	d
INT0_HI_FEC0_BABT	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_BABT	/;"	d
INT0_HI_FEC0_EBERR	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_EBERR	/;"	d
INT0_HI_FEC0_EBERR	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_FEC0_EBERR	/;"	d
INT0_HI_FEC0_EBERR	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_EBERR	/;"	d
INT0_HI_FEC0_EBERR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_EBERR	/;"	d
INT0_HI_FEC0_GRA	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_GRA	/;"	d
INT0_HI_FEC0_GRA	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_FEC0_GRA	/;"	d
INT0_HI_FEC0_GRA	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_GRA	/;"	d
INT0_HI_FEC0_GRA	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_GRA	/;"	d
INT0_HI_FEC0_HBERR	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_HBERR	/;"	d
INT0_HI_FEC0_HBERR	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_HBERR	/;"	d
INT0_HI_FEC0_HBERR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_HBERR	/;"	d
INT0_HI_FEC0_LC	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_LC	/;"	d
INT0_HI_FEC0_LC	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_LC	/;"	d
INT0_HI_FEC0_LC	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_LC	/;"	d
INT0_HI_FEC0_MII	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_MII	/;"	d
INT0_HI_FEC0_MII	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_MII	/;"	d
INT0_HI_FEC0_MII	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_MII	/;"	d
INT0_HI_FEC0_RL	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_RL	/;"	d
INT0_HI_FEC0_RL	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_RL	/;"	d
INT0_HI_FEC0_RL	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_RL	/;"	d
INT0_HI_FEC0_RXB	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_RXB	/;"	d
INT0_HI_FEC0_RXB	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_RXB	/;"	d
INT0_HI_FEC0_RXB	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_RXB	/;"	d
INT0_HI_FEC0_RXF	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_RXF	/;"	d
INT0_HI_FEC0_RXF	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_RXF	/;"	d
INT0_HI_FEC0_RXF	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_RXF	/;"	d
INT0_HI_FEC0_TXB	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_TXB	/;"	d
INT0_HI_FEC0_TXB	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_TXB	/;"	d
INT0_HI_FEC0_TXB	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_TXB	/;"	d
INT0_HI_FEC0_TXF	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_TXF	/;"	d
INT0_HI_FEC0_TXF	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_TXF	/;"	d
INT0_HI_FEC0_TXF	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_TXF	/;"	d
INT0_HI_FEC0_UN	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_FEC0_UN	/;"	d
INT0_HI_FEC0_UN	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC0_UN	/;"	d
INT0_HI_FEC0_UN	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC0_UN	/;"	d
INT0_HI_FEC1	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_FEC1	/;"	d
INT0_HI_FEC1_BABR	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_BABR	/;"	d
INT0_HI_FEC1_BABR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_BABR	/;"	d
INT0_HI_FEC1_BABT	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_BABT	/;"	d
INT0_HI_FEC1_BABT	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_BABT	/;"	d
INT0_HI_FEC1_EBERR	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_EBERR	/;"	d
INT0_HI_FEC1_EBERR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_EBERR	/;"	d
INT0_HI_FEC1_GRA	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_GRA	/;"	d
INT0_HI_FEC1_GRA	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_GRA	/;"	d
INT0_HI_FEC1_HBERR	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_HBERR	/;"	d
INT0_HI_FEC1_HBERR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_HBERR	/;"	d
INT0_HI_FEC1_LC	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_LC	/;"	d
INT0_HI_FEC1_LC	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_LC	/;"	d
INT0_HI_FEC1_MII	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_MII	/;"	d
INT0_HI_FEC1_MII	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_MII	/;"	d
INT0_HI_FEC1_RL	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_RL	/;"	d
INT0_HI_FEC1_RL	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_RL	/;"	d
INT0_HI_FEC1_RXB	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_RXB	/;"	d
INT0_HI_FEC1_RXB	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_RXB	/;"	d
INT0_HI_FEC1_RXF	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_RXF	/;"	d
INT0_HI_FEC1_RXF	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_RXF	/;"	d
INT0_HI_FEC1_TXB	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_TXB	/;"	d
INT0_HI_FEC1_TXB	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_TXB	/;"	d
INT0_HI_FEC1_TXF	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_TXF	/;"	d
INT0_HI_FEC1_TXF	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_TXF	/;"	d
INT0_HI_FEC1_UN	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_FEC1_UN	/;"	d
INT0_HI_FEC1_UN	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_FEC1_UN	/;"	d
INT0_HI_FEC_BABR	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_FEC_BABR	/;"	d
INT0_HI_FEC_BABR	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_FEC_BABR	/;"	d
INT0_HI_FEC_BABR	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_FEC_BABR	/;"	d
INT0_HI_FEC_BABR	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_BABR	/;"	d
INT0_HI_FEC_BABT	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_FEC_BABT	/;"	d
INT0_HI_FEC_BABT	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_FEC_BABT	/;"	d
INT0_HI_FEC_BABT	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_FEC_BABT	/;"	d
INT0_HI_FEC_BABT	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_BABT	/;"	d
INT0_HI_FEC_EBERR	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_FEC_EBERR	/;"	d
INT0_HI_FEC_EBERR	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_FEC_EBERR	/;"	d
INT0_HI_FEC_EBERR	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_FEC_EBERR	/;"	d
INT0_HI_FEC_EBERR	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_EBERR	/;"	d
INT0_HI_FEC_GRA	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_FEC_GRA	/;"	d
INT0_HI_FEC_GRA	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_FEC_GRA	/;"	d
INT0_HI_FEC_GRA	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_FEC_GRA	/;"	d
INT0_HI_FEC_GRA	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_GRA	/;"	d
INT0_HI_FEC_HBERR	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_HBERR	/;"	d
INT0_HI_FEC_LC	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_LC	/;"	d
INT0_HI_FEC_MII	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_MII	/;"	d
INT0_HI_FEC_RL	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_RL	/;"	d
INT0_HI_FEC_RXB	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_RXB	/;"	d
INT0_HI_FEC_RXF	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_RXF	/;"	d
INT0_HI_FEC_TXB	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_TXB	/;"	d
INT0_HI_FEC_TXF	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_TXF	/;"	d
INT0_HI_FEC_UN	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_FEC_UN	/;"	d
INT0_HI_GPT0	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_GPT0	/;"	d
INT0_HI_GPT1	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_GPT1	/;"	d
INT0_HI_GPT2	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_GPT2	/;"	d
INT0_HI_GPT3	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_GPT3	/;"	d
INT0_HI_GPTA_C0F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_C0F	/;"	d
INT0_HI_GPTA_C1F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_C1F	/;"	d
INT0_HI_GPTA_C2F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_C2F	/;"	d
INT0_HI_GPTA_C3F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_C3F	/;"	d
INT0_HI_GPTA_PAIF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_PAIF	/;"	d
INT0_HI_GPTA_PAOVF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_PAOVF	/;"	d
INT0_HI_GPTA_TOF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTA_TOF	/;"	d
INT0_HI_GPTB_C0F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_C0F	/;"	d
INT0_HI_GPTB_C1F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_C1F	/;"	d
INT0_HI_GPTB_C2F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_C2F	/;"	d
INT0_HI_GPTB_C3F	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_C3F	/;"	d
INT0_HI_GPTB_PAIF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_PAIF	/;"	d
INT0_HI_GPTB_PAOVF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_PAOVF	/;"	d
INT0_HI_GPTB_TOF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_GPTB_TOF	/;"	d
INT0_HI_I2C	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_I2C	/;"	d
INT0_HI_MACNET0_BABR	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_BABR	/;"	d
INT0_HI_MACNET0_BABT	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_BABT	/;"	d
INT0_HI_MACNET0_EBERR	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_EBERR	/;"	d
INT0_HI_MACNET0_GRA	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_GRA	/;"	d
INT0_HI_MACNET0_LC	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_LC	/;"	d
INT0_HI_MACNET0_MII	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_MII	/;"	d
INT0_HI_MACNET0_RL	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_RL	/;"	d
INT0_HI_MACNET0_RXB	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_RXB	/;"	d
INT0_HI_MACNET0_RXF	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_RXF	/;"	d
INT0_HI_MACNET0_TXB	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_TXB	/;"	d
INT0_HI_MACNET0_TXF	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_TXF	/;"	d
INT0_HI_MACNET0_UN	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET0_UN	/;"	d
INT0_HI_MACNET1_BABR	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_BABR	/;"	d
INT0_HI_MACNET1_BABT	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_BABT	/;"	d
INT0_HI_MACNET1_EBERR	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_EBERR	/;"	d
INT0_HI_MACNET1_GRA	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_GRA	/;"	d
INT0_HI_MACNET1_LC	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_LC	/;"	d
INT0_HI_MACNET1_MII	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_MII	/;"	d
INT0_HI_MACNET1_RL	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_RL	/;"	d
INT0_HI_MACNET1_RXB	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_RXB	/;"	d
INT0_HI_MACNET1_RXF	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_RXF	/;"	d
INT0_HI_MACNET1_TXB	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_TXB	/;"	d
INT0_HI_MACNET1_TXF	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_TXF	/;"	d
INT0_HI_MACNET1_UN	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_MACNET1_UN	/;"	d
INT0_HI_MDHA	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_MDHA	/;"	d
INT0_HI_MDHA	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_MDHA	/;"	d
INT0_HI_MDHA	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_MDHA	/;"	d
INT0_HI_OW	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_OW	/;"	d
INT0_HI_PCIARB	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_PCIARB	/;"	d
INT0_HI_PIT0	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_PIT0	/;"	d
INT0_HI_PIT0	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_PIT0	/;"	d
INT0_HI_PIT0	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_PIT0	/;"	d
INT0_HI_PIT0	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_PIT0	/;"	d
INT0_HI_PIT1	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_PIT1	/;"	d
INT0_HI_PIT1	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_PIT1	/;"	d
INT0_HI_PIT1	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_PIT1	/;"	d
INT0_HI_PIT1	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_PIT1	/;"	d
INT0_HI_PIT2	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_PIT2	/;"	d
INT0_HI_PIT2	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_PIT2	/;"	d
INT0_HI_PIT2	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_PIT2	/;"	d
INT0_HI_PIT2	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_PIT2	/;"	d
INT0_HI_PIT3	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_PIT3	/;"	d
INT0_HI_PIT3	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_PIT3	/;"	d
INT0_HI_PIT3	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_PIT3	/;"	d
INT0_HI_PIT3	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_PIT3	/;"	d
INT0_HI_PMM_LVDF	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_PMM_LVDF	/;"	d
INT0_HI_QADC_CF1	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_QADC_CF1	/;"	d
INT0_HI_QADC_CF2	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_QADC_CF2	/;"	d
INT0_HI_QADC_PF1	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_QADC_PF1	/;"	d
INT0_HI_QADC_PF2	arch/m68k/include/asm/m5282.h	/^#define INT0_HI_QADC_PF2	/;"	d
INT0_HI_RNG	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_RNG	/;"	d
INT0_HI_RNG	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_RNG	/;"	d
INT0_HI_RNG	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_RNG	/;"	d
INT0_HI_RTC_ISR	arch/m68k/include/asm/m5227x.h	/^#define INT0_HI_RTC_ISR	/;"	d
INT0_HI_RTC_ISR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_RTC_ISR	/;"	d
INT0_HI_SCM	arch/m68k/include/asm/m5329.h	/^#define INT0_HI_SCM	/;"	d
INT0_HI_SCMIR	arch/m68k/include/asm/m5227x.h	/^#define INT0_HI_SCMIR	/;"	d
INT0_HI_SCMIR	arch/m68k/include/asm/m5441x.h	/^#define INT0_HI_SCMIR	/;"	d
INT0_HI_SCMIR	arch/m68k/include/asm/m5445x.h	/^#define INT0_HI_SCMIR	/;"	d
INT0_HI_SCMISR_CFEI	arch/m68k/include/asm/m520x.h	/^#define INT0_HI_SCMISR_CFEI	/;"	d
INT0_HI_SCM_CFEI	arch/m68k/include/asm/m5301x.h	/^#define INT0_HI_SCM_CFEI	/;"	d
INT0_HI_SEC	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_SEC	/;"	d
INT0_HI_SKHA	arch/m68k/include/asm/m5235.h	/^#define INT0_HI_SKHA	/;"	d
INT0_HI_SKHA	arch/m68k/include/asm/m5271.h	/^#define INT0_HI_SKHA	/;"	d
INT0_HI_SKHA	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_SKHA	/;"	d
INT0_HI_SLT0	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_SLT0	/;"	d
INT0_HI_SLT1	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_SLT1	/;"	d
INT0_HI_UART0	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_UART0	/;"	d
INT0_HI_UART1	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_UART1	/;"	d
INT0_HI_UART2	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_UART2	/;"	d
INT0_HI_UART3	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_UART3	/;"	d
INT0_HI_USB	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_USB	/;"	d
INT0_HI_USB_EP0	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_USB_EP0	/;"	d
INT0_HI_USB_EP1	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_USB_EP1	/;"	d
INT0_HI_USB_EP2	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_USB_EP2	/;"	d
INT0_HI_USB_EP3	arch/m68k/include/asm/m5275.h	/^#define INT0_HI_USB_EP3	/;"	d
INT0_HI_XLBARB	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_XLBARB	/;"	d
INT0_HI_XLBPCI	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_HI_XLBPCI	/;"	d
INT0_LO_DMA0	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DMA0	/;"	d
INT0_LO_DMA0	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DMA0	/;"	d
INT0_LO_DMA0	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DMA0	/;"	d
INT0_LO_DMA1	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DMA1	/;"	d
INT0_LO_DMA1	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DMA1	/;"	d
INT0_LO_DMA1	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DMA1	/;"	d
INT0_LO_DMA2	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DMA2	/;"	d
INT0_LO_DMA2	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DMA2	/;"	d
INT0_LO_DMA2	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DMA2	/;"	d
INT0_LO_DMA3	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DMA3	/;"	d
INT0_LO_DMA3	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DMA3	/;"	d
INT0_LO_DMA3	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DMA3	/;"	d
INT0_LO_DMA_00	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DMA_00	/;"	d
INT0_LO_DMA_01	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DMA_01	/;"	d
INT0_LO_DMA_02	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DMA_02	/;"	d
INT0_LO_DMA_03	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DMA_03	/;"	d
INT0_LO_DSPI	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_DSPI	/;"	d
INT0_LO_DSPI	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_DSPI	/;"	d
INT0_LO_DSPI0	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_DSPI0	/;"	d
INT0_LO_DTMR0	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DTMR0	/;"	d
INT0_LO_DTMR0	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DTMR0	/;"	d
INT0_LO_DTMR0	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DTMR0	/;"	d
INT0_LO_DTMR0	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DTMR0	/;"	d
INT0_LO_DTMR1	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DTMR1	/;"	d
INT0_LO_DTMR1	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DTMR1	/;"	d
INT0_LO_DTMR1	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DTMR1	/;"	d
INT0_LO_DTMR1	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DTMR1	/;"	d
INT0_LO_DTMR2	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DTMR2	/;"	d
INT0_LO_DTMR2	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DTMR2	/;"	d
INT0_LO_DTMR2	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DTMR2	/;"	d
INT0_LO_DTMR2	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DTMR2	/;"	d
INT0_LO_DTMR3	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_DTMR3	/;"	d
INT0_LO_DTMR3	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_DTMR3	/;"	d
INT0_LO_DTMR3	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_DTMR3	/;"	d
INT0_LO_DTMR3	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_DTMR3	/;"	d
INT0_LO_EDMA_00	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_00	/;"	d
INT0_LO_EDMA_00	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_00	/;"	d
INT0_LO_EDMA_00	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_00	/;"	d
INT0_LO_EDMA_00	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_00	/;"	d
INT0_LO_EDMA_00	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_00	/;"	d
INT0_LO_EDMA_00	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_00	/;"	d
INT0_LO_EDMA_01	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_01	/;"	d
INT0_LO_EDMA_01	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_01	/;"	d
INT0_LO_EDMA_01	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_01	/;"	d
INT0_LO_EDMA_01	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_01	/;"	d
INT0_LO_EDMA_01	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_01	/;"	d
INT0_LO_EDMA_01	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_01	/;"	d
INT0_LO_EDMA_02	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_02	/;"	d
INT0_LO_EDMA_02	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_02	/;"	d
INT0_LO_EDMA_02	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_02	/;"	d
INT0_LO_EDMA_02	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_02	/;"	d
INT0_LO_EDMA_02	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_02	/;"	d
INT0_LO_EDMA_02	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_02	/;"	d
INT0_LO_EDMA_03	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_03	/;"	d
INT0_LO_EDMA_03	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_03	/;"	d
INT0_LO_EDMA_03	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_03	/;"	d
INT0_LO_EDMA_03	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_03	/;"	d
INT0_LO_EDMA_03	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_03	/;"	d
INT0_LO_EDMA_03	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_03	/;"	d
INT0_LO_EDMA_04	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_04	/;"	d
INT0_LO_EDMA_04	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_04	/;"	d
INT0_LO_EDMA_04	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_04	/;"	d
INT0_LO_EDMA_04	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_04	/;"	d
INT0_LO_EDMA_04	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_04	/;"	d
INT0_LO_EDMA_04	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_04	/;"	d
INT0_LO_EDMA_05	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_05	/;"	d
INT0_LO_EDMA_05	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_05	/;"	d
INT0_LO_EDMA_05	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_05	/;"	d
INT0_LO_EDMA_05	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_05	/;"	d
INT0_LO_EDMA_05	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_05	/;"	d
INT0_LO_EDMA_05	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_05	/;"	d
INT0_LO_EDMA_06	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_06	/;"	d
INT0_LO_EDMA_06	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_06	/;"	d
INT0_LO_EDMA_06	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_06	/;"	d
INT0_LO_EDMA_06	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_06	/;"	d
INT0_LO_EDMA_06	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_06	/;"	d
INT0_LO_EDMA_06	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_06	/;"	d
INT0_LO_EDMA_07	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_07	/;"	d
INT0_LO_EDMA_07	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_07	/;"	d
INT0_LO_EDMA_07	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_07	/;"	d
INT0_LO_EDMA_07	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_07	/;"	d
INT0_LO_EDMA_07	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_07	/;"	d
INT0_LO_EDMA_07	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_07	/;"	d
INT0_LO_EDMA_08	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_08	/;"	d
INT0_LO_EDMA_08	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_08	/;"	d
INT0_LO_EDMA_08	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_08	/;"	d
INT0_LO_EDMA_08	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_08	/;"	d
INT0_LO_EDMA_08	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_08	/;"	d
INT0_LO_EDMA_08	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_08	/;"	d
INT0_LO_EDMA_09	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_09	/;"	d
INT0_LO_EDMA_09	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_09	/;"	d
INT0_LO_EDMA_09	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_09	/;"	d
INT0_LO_EDMA_09	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_09	/;"	d
INT0_LO_EDMA_09	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_09	/;"	d
INT0_LO_EDMA_09	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_09	/;"	d
INT0_LO_EDMA_10	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_10	/;"	d
INT0_LO_EDMA_10	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_10	/;"	d
INT0_LO_EDMA_10	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_10	/;"	d
INT0_LO_EDMA_10	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_10	/;"	d
INT0_LO_EDMA_10	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_10	/;"	d
INT0_LO_EDMA_10	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_10	/;"	d
INT0_LO_EDMA_11	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_11	/;"	d
INT0_LO_EDMA_11	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_11	/;"	d
INT0_LO_EDMA_11	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_11	/;"	d
INT0_LO_EDMA_11	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_11	/;"	d
INT0_LO_EDMA_11	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_11	/;"	d
INT0_LO_EDMA_11	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_11	/;"	d
INT0_LO_EDMA_12	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_12	/;"	d
INT0_LO_EDMA_12	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_12	/;"	d
INT0_LO_EDMA_12	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_12	/;"	d
INT0_LO_EDMA_12	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_12	/;"	d
INT0_LO_EDMA_12	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_12	/;"	d
INT0_LO_EDMA_12	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_12	/;"	d
INT0_LO_EDMA_13	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_13	/;"	d
INT0_LO_EDMA_13	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_13	/;"	d
INT0_LO_EDMA_13	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_13	/;"	d
INT0_LO_EDMA_13	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_13	/;"	d
INT0_LO_EDMA_13	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_13	/;"	d
INT0_LO_EDMA_13	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_13	/;"	d
INT0_LO_EDMA_14	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_14	/;"	d
INT0_LO_EDMA_14	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_14	/;"	d
INT0_LO_EDMA_14	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_14	/;"	d
INT0_LO_EDMA_14	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_14	/;"	d
INT0_LO_EDMA_14	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_14	/;"	d
INT0_LO_EDMA_14	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_14	/;"	d
INT0_LO_EDMA_15	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_15	/;"	d
INT0_LO_EDMA_15	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_15	/;"	d
INT0_LO_EDMA_15	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_15	/;"	d
INT0_LO_EDMA_15	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_15	/;"	d
INT0_LO_EDMA_15	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_15	/;"	d
INT0_LO_EDMA_15	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_15	/;"	d
INT0_LO_EDMA_ERR	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EDMA_ERR	/;"	d
INT0_LO_EDMA_ERR	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EDMA_ERR	/;"	d
INT0_LO_EDMA_ERR	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EDMA_ERR	/;"	d
INT0_LO_EDMA_ERR	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EDMA_ERR	/;"	d
INT0_LO_EDMA_ERR	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EDMA_ERR	/;"	d
INT0_LO_EDMA_ERR	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EDMA_ERR	/;"	d
INT0_LO_EP0ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP0ISR	/;"	d
INT0_LO_EP1ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP1ISR	/;"	d
INT0_LO_EP2ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP2ISR	/;"	d
INT0_LO_EP3ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP3ISR	/;"	d
INT0_LO_EP4ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP4ISR	/;"	d
INT0_LO_EP5ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP5ISR	/;"	d
INT0_LO_EP6ISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EP6ISR	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT1	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT1	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT2	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT2	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT3	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT3	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT4	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT4	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT5	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT5	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT6	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT6	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT7	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_EPORT7	/;"	d
INT0_LO_EPORT_F1	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EPORT_F1	/;"	d
INT0_LO_EPORT_F4	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EPORT_F4	/;"	d
INT0_LO_EPORT_F7	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_EPORT_F7	/;"	d
INT0_LO_FEC0_HBERR	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_HBERR	/;"	d
INT0_LO_FEC0_LC	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_LC	/;"	d
INT0_LO_FEC0_MII	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_MII	/;"	d
INT0_LO_FEC0_RL	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_RL	/;"	d
INT0_LO_FEC0_RXB	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_RXB	/;"	d
INT0_LO_FEC0_RXF	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_RXF	/;"	d
INT0_LO_FEC0_TXB	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_TXB	/;"	d
INT0_LO_FEC0_TXF	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_TXF	/;"	d
INT0_LO_FEC0_UN	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_FEC0_UN	/;"	d
INT0_LO_FEC_HBERR	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_HBERR	/;"	d
INT0_LO_FEC_HBERR	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_HBERR	/;"	d
INT0_LO_FEC_HBERR	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_HBERR	/;"	d
INT0_LO_FEC_LC	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_LC	/;"	d
INT0_LO_FEC_LC	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_LC	/;"	d
INT0_LO_FEC_LC	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_LC	/;"	d
INT0_LO_FEC_MII	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_MII	/;"	d
INT0_LO_FEC_MII	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_MII	/;"	d
INT0_LO_FEC_MII	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_MII	/;"	d
INT0_LO_FEC_RL	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_RL	/;"	d
INT0_LO_FEC_RL	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_RL	/;"	d
INT0_LO_FEC_RL	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_RL	/;"	d
INT0_LO_FEC_RXB	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_RXB	/;"	d
INT0_LO_FEC_RXB	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_RXB	/;"	d
INT0_LO_FEC_RXB	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_RXB	/;"	d
INT0_LO_FEC_RXF	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_RXF	/;"	d
INT0_LO_FEC_RXF	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_RXF	/;"	d
INT0_LO_FEC_RXF	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_RXF	/;"	d
INT0_LO_FEC_TXB	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_TXB	/;"	d
INT0_LO_FEC_TXB	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_TXB	/;"	d
INT0_LO_FEC_TXB	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_TXB	/;"	d
INT0_LO_FEC_TXF	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_TXF	/;"	d
INT0_LO_FEC_TXF	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_TXF	/;"	d
INT0_LO_FEC_TXF	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_TXF	/;"	d
INT0_LO_FEC_UN	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_FEC_UN	/;"	d
INT0_LO_FEC_UN	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_FEC_UN	/;"	d
INT0_LO_FEC_UN	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_FEC_UN	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_I2C	/;"	d
INT0_LO_I2C0	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_I2C0	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_QSPI	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_QSPI	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD0	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_RSVD0	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_RSVD1	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_RSVD1	/;"	d
INT0_LO_SCM	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_SCM	/;"	d
INT0_LO_SCM	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_SCM	/;"	d
INT0_LO_SCM	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_SCM	/;"	d
INT0_LO_SCM	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_SCM	/;"	d
INT0_LO_SCM	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_SCM	/;"	d
INT0_LO_SCM	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_SCM	/;"	d
INT0_LO_SCM_CWIC	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_SCM_CWIC	/;"	d
INT0_LO_SCM_CWIC	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_SCM_CWIC	/;"	d
INT0_LO_SCM_CWIC	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_SCM_CWIC	/;"	d
INT0_LO_SCM_SWT1	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_SCM_SWT1	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART0	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_UART0	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART1	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_UART1	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m520x.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5227x.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5235.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5271.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5275.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5282.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5301x.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5329.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART2	arch/m68k/include/asm/m5445x.h	/^#define INT0_LO_UART2	/;"	d
INT0_LO_UART3	arch/m68k/include/asm/m5441x.h	/^#define INT0_LO_UART3	/;"	d
INT0_LO_USB	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_USB	/;"	d
INT0_LO_USBAISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_USBAISR	/;"	d
INT0_LO_USBISR	arch/m68k/include/asm/m547x_8x.h	/^#define INT0_LO_USBISR	/;"	d
INT16_MAX	scripts/kconfig/zconf.lex.c	/^#define INT16_MAX /;"	d	file:
INT16_MIN	scripts/kconfig/zconf.lex.c	/^#define INT16_MIN /;"	d	file:
INT1_HI_ATA_ISR	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_ATA_ISR	/;"	d
INT1_HI_CAN_BOFFINT	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BOFFINT	/;"	d
INT1_HI_CAN_BUF0I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF0I	/;"	d
INT1_HI_CAN_BUF10I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF10I	/;"	d
INT1_HI_CAN_BUF11I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF11I	/;"	d
INT1_HI_CAN_BUF12I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF12I	/;"	d
INT1_HI_CAN_BUF13I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF13I	/;"	d
INT1_HI_CAN_BUF14I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF14I	/;"	d
INT1_HI_CAN_BUF15I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF15I	/;"	d
INT1_HI_CAN_BUF1I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF1I	/;"	d
INT1_HI_CAN_BUF2I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF2I	/;"	d
INT1_HI_CAN_BUF3I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF3I	/;"	d
INT1_HI_CAN_BUF4I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF4I	/;"	d
INT1_HI_CAN_BUF5I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF5I	/;"	d
INT1_HI_CAN_BUF6I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF6I	/;"	d
INT1_HI_CAN_BUF7I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF7I	/;"	d
INT1_HI_CAN_BUF8I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF8I	/;"	d
INT1_HI_CAN_BUF9I	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_BUF9I	/;"	d
INT1_HI_CAN_ERRINT	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CAN_ERRINT	/;"	d
INT1_HI_CCM_UOCSR	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_CCM_UOCSR	/;"	d
INT1_HI_CCM_UOCSR	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_CCM_UOCSR	/;"	d
INT1_HI_CCM_USBSTAT	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_CCM_USBSTAT	/;"	d
INT1_HI_CODEC_OR	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_CODEC_OR	/;"	d
INT1_HI_CODEC_RF_TE	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_CODEC_RF_TE	/;"	d
INT1_HI_CODEC_ROE	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_CODEC_ROE	/;"	d
INT1_HI_CODEC_TUE	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_CODEC_TUE	/;"	d
INT1_HI_DSPI1	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_DSPI1	/;"	d
INT1_HI_DSPI2	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_DSPI2	/;"	d
INT1_HI_DSPI3	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_DSPI3	/;"	d
INT1_HI_DSPI_EOQF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_EOQF	/;"	d
INT1_HI_DSPI_EOQF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_EOQF	/;"	d
INT1_HI_DSPI_EOQF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_EOQF	/;"	d
INT1_HI_DSPI_RFDF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_RFDF	/;"	d
INT1_HI_DSPI_RFDF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_RFDF	/;"	d
INT1_HI_DSPI_RFDF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_RFDF	/;"	d
INT1_HI_DSPI_RFOF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_RFOF	/;"	d
INT1_HI_DSPI_RFOF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_RFOF	/;"	d
INT1_HI_DSPI_RFOF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_RFOF	/;"	d
INT1_HI_DSPI_RFOF_TFUF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_RFOF_TFUF	/;"	d
INT1_HI_DSPI_RFOF_TFUF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_RFOF_TFUF	/;"	d
INT1_HI_DSPI_RFOF_TFUF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_RFOF_TFUF	/;"	d
INT1_HI_DSPI_TCF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_TCF	/;"	d
INT1_HI_DSPI_TCF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_TCF	/;"	d
INT1_HI_DSPI_TCF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_TCF	/;"	d
INT1_HI_DSPI_TFFF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_TFFF	/;"	d
INT1_HI_DSPI_TFFF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_TFFF	/;"	d
INT1_HI_DSPI_TFFF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_TFFF	/;"	d
INT1_HI_DSPI_TFUF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_DSPI_TFUF	/;"	d
INT1_HI_DSPI_TFUF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_DSPI_TFUF	/;"	d
INT1_HI_DSPI_TFUF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_DSPI_TFUF	/;"	d
INT1_HI_EDMA_41	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_41	/;"	d
INT1_HI_EDMA_42	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_42	/;"	d
INT1_HI_EDMA_43	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_43	/;"	d
INT1_HI_EDMA_44	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_44	/;"	d
INT1_HI_EDMA_45	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_45	/;"	d
INT1_HI_EDMA_46	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_46	/;"	d
INT1_HI_EDMA_47	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_47	/;"	d
INT1_HI_EDMA_48	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_48	/;"	d
INT1_HI_EDMA_49	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_49	/;"	d
INT1_HI_EDMA_50	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_50	/;"	d
INT1_HI_EDMA_51	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_51	/;"	d
INT1_HI_EDMA_52	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_52	/;"	d
INT1_HI_EDMA_53	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_53	/;"	d
INT1_HI_EDMA_54	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_54	/;"	d
INT1_HI_EDMA_55	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_EDMA_55	/;"	d
INT1_HI_ETPU_TC10F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC10F	/;"	d
INT1_HI_ETPU_TC11F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC11F	/;"	d
INT1_HI_ETPU_TC12F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC12F	/;"	d
INT1_HI_ETPU_TC13F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC13F	/;"	d
INT1_HI_ETPU_TC14F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC14F	/;"	d
INT1_HI_ETPU_TC15F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC15F	/;"	d
INT1_HI_ETPU_TC16F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC16F	/;"	d
INT1_HI_ETPU_TC17F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC17F	/;"	d
INT1_HI_ETPU_TC18F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC18F	/;"	d
INT1_HI_ETPU_TC19F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC19F	/;"	d
INT1_HI_ETPU_TC20F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC20F	/;"	d
INT1_HI_ETPU_TC21F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC21F	/;"	d
INT1_HI_ETPU_TC22F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC22F	/;"	d
INT1_HI_ETPU_TC23F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC23F	/;"	d
INT1_HI_ETPU_TC24F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC24F	/;"	d
INT1_HI_ETPU_TC25F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC25F	/;"	d
INT1_HI_ETPU_TC26F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC26F	/;"	d
INT1_HI_ETPU_TC27F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC27F	/;"	d
INT1_HI_ETPU_TC28F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC28F	/;"	d
INT1_HI_ETPU_TC29F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC29F	/;"	d
INT1_HI_ETPU_TC30F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC30F	/;"	d
INT1_HI_ETPU_TC31F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC31F	/;"	d
INT1_HI_ETPU_TC5F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC5F	/;"	d
INT1_HI_ETPU_TC6F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC6F	/;"	d
INT1_HI_ETPU_TC7F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC7F	/;"	d
INT1_HI_ETPU_TC8F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC8F	/;"	d
INT1_HI_ETPU_TC9F	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TC9F	/;"	d
INT1_HI_ETPU_TGIF	arch/m68k/include/asm/m5235.h	/^#define INT1_HI_ETPU_TGIF	/;"	d
INT1_HI_FEC1_BABR	arch/m68k/include/asm/m5275.h	/^#define INT1_HI_FEC1_BABR	/;"	d
INT1_HI_FEC1_BABT	arch/m68k/include/asm/m5275.h	/^#define INT1_HI_FEC1_BABT	/;"	d
INT1_HI_FEC1_EBERR	arch/m68k/include/asm/m5275.h	/^#define INT1_HI_FEC1_EBERR	/;"	d
INT1_HI_FEC1_GRA	arch/m68k/include/asm/m5275.h	/^#define INT1_HI_FEC1_GRA	/;"	d
INT1_HI_I2C1	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_I2C1	/;"	d
INT1_HI_I2C2	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_I2C2	/;"	d
INT1_HI_I2C3	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_I2C3	/;"	d
INT1_HI_I2C4	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_I2C4	/;"	d
INT1_HI_I2C5	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_I2C5	/;"	d
INT1_HI_LCDC_ISR	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_LCDC_ISR	/;"	d
INT1_HI_PCI_ASR	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PCI_ASR	/;"	d
INT1_HI_PCI_SCR	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PCI_SCR	/;"	d
INT1_HI_PIT0	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_PIT0	/;"	d
INT1_HI_PIT0_PIF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_PIT0_PIF	/;"	d
INT1_HI_PIT0_PIF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PIT0_PIF	/;"	d
INT1_HI_PIT1	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_PIT1	/;"	d
INT1_HI_PIT1_PIF	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_PIT1_PIF	/;"	d
INT1_HI_PIT1_PIF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PIT1_PIF	/;"	d
INT1_HI_PIT2	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_PIT2	/;"	d
INT1_HI_PIT2_PIF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PIT2_PIF	/;"	d
INT1_HI_PIT3	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_PIT3	/;"	d
INT1_HI_PIT3_PIF	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PIT3_PIF	/;"	d
INT1_HI_PLL_LOCF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_PLL_LOCF	/;"	d
INT1_HI_PLL_LOCKS	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_PLL_LOCKS	/;"	d
INT1_HI_PLL_LOCKS	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_PLL_LOCKS	/;"	d
INT1_HI_PLL_LOLF	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_PLL_LOLF	/;"	d
INT1_HI_PWM_INT	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_PWM_INT	/;"	d
INT1_HI_RNG_EI	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_RNG_EI	/;"	d
INT1_HI_RNG_EI	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_RNG_EI	/;"	d
INT1_HI_RTC	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_RTC	/;"	d
INT1_HI_SDHC	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_SDHC	/;"	d
INT1_HI_SIM1_DATA	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_SIM1_DATA	/;"	d
INT1_HI_SIM1_GENERAL	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_SIM1_GENERAL	/;"	d
INT1_HI_SSI	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_SSI	/;"	d
INT1_HI_SSI_ISR	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_SSI_ISR	/;"	d
INT1_HI_SSI_ISR	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_SSI_ISR	/;"	d
INT1_HI_TOUCH_ADC	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_TOUCH_ADC	/;"	d
INT1_HI_UART4	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_UART4	/;"	d
INT1_HI_UART5	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_UART5	/;"	d
INT1_HI_UART6	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_UART6	/;"	d
INT1_HI_UART7	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_UART7	/;"	d
INT1_HI_UART8	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_UART8	/;"	d
INT1_HI_UART9	arch/m68k/include/asm/m5441x.h	/^#define INT1_HI_UART9	/;"	d
INT1_HI_USBHOST_STS	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_USBHOST_STS	/;"	d
INT1_HI_USBOTG_STS	arch/m68k/include/asm/m5227x.h	/^#define INT1_HI_USBOTG_STS	/;"	d
INT1_HI_USBOTG_STS	arch/m68k/include/asm/m5301x.h	/^#define INT1_HI_USBOTG_STS	/;"	d
INT1_HI_USBOTG_USBSTS	arch/m68k/include/asm/m5445x.h	/^#define INT1_HI_USBOTG_USBSTS	/;"	d
INT1_LO_CAN0_BOFF	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_CAN0_BOFF	/;"	d
INT1_LO_CAN0_IFG	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_CAN0_IFG	/;"	d
INT1_LO_CAN0_TXRXWRN	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_CAN0_TXRXWRN	/;"	d
INT1_LO_CAN1_BOFF	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_CAN1_BOFF	/;"	d
INT1_LO_CAN1_BOFFINT	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BOFFINT	/;"	d
INT1_LO_CAN1_BUF0I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF0I	/;"	d
INT1_LO_CAN1_BUF10I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF10I	/;"	d
INT1_LO_CAN1_BUF11I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF11I	/;"	d
INT1_LO_CAN1_BUF12I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF12I	/;"	d
INT1_LO_CAN1_BUF13I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF13I	/;"	d
INT1_LO_CAN1_BUF14I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF14I	/;"	d
INT1_LO_CAN1_BUF15I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF15I	/;"	d
INT1_LO_CAN1_BUF1I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF1I	/;"	d
INT1_LO_CAN1_BUF2I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF2I	/;"	d
INT1_LO_CAN1_BUF3I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF3I	/;"	d
INT1_LO_CAN1_BUF4I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF4I	/;"	d
INT1_LO_CAN1_BUF5I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF5I	/;"	d
INT1_LO_CAN1_BUF6I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF6I	/;"	d
INT1_LO_CAN1_BUF7I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF7I	/;"	d
INT1_LO_CAN1_BUF8I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF8I	/;"	d
INT1_LO_CAN1_BUF9I	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_BUF9I	/;"	d
INT1_LO_CAN1_ERRINT	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_CAN1_ERRINT	/;"	d
INT1_LO_CAN1_IFG	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_CAN1_IFG	/;"	d
INT1_LO_CAN1_TXRXWRN	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_CAN1_TXRXWRN	/;"	d
INT1_LO_DSPI_EOQF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_EOQF	/;"	d
INT1_LO_DSPI_RFDF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_RFDF	/;"	d
INT1_LO_DSPI_RFOF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_RFOF	/;"	d
INT1_LO_DSPI_RFOF_TFUF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_RFOF_TFUF	/;"	d
INT1_LO_DSPI_TCF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_TCF	/;"	d
INT1_LO_DSPI_TFFF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_TFFF	/;"	d
INT1_LO_DSPI_TFUF	arch/m68k/include/asm/m547x_8x.h	/^#define INT1_LO_DSPI_TFUF	/;"	d
INT1_LO_EDMA_16	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_16	/;"	d
INT1_LO_EDMA_17	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_17	/;"	d
INT1_LO_EDMA_18	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_18	/;"	d
INT1_LO_EDMA_19	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_19	/;"	d
INT1_LO_EDMA_20	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_20	/;"	d
INT1_LO_EDMA_21	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_21	/;"	d
INT1_LO_EDMA_22	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_22	/;"	d
INT1_LO_EDMA_23	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_23	/;"	d
INT1_LO_EDMA_24	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_24	/;"	d
INT1_LO_EDMA_25	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_25	/;"	d
INT1_LO_EDMA_26	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_26	/;"	d
INT1_LO_EDMA_27	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_27	/;"	d
INT1_LO_EDMA_28	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_28	/;"	d
INT1_LO_EDMA_29	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_29	/;"	d
INT1_LO_EDMA_30	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_30	/;"	d
INT1_LO_EDMA_31	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_31	/;"	d
INT1_LO_EDMA_32	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_32	/;"	d
INT1_LO_EDMA_33	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_33	/;"	d
INT1_LO_EDMA_34	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_34	/;"	d
INT1_LO_EDMA_35	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_35	/;"	d
INT1_LO_EDMA_36	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_36	/;"	d
INT1_LO_EDMA_37	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_37	/;"	d
INT1_LO_EDMA_38	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_38	/;"	d
INT1_LO_EDMA_39	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_39	/;"	d
INT1_LO_EDMA_40	arch/m68k/include/asm/m5441x.h	/^#define INT1_LO_EDMA_40	/;"	d
INT1_LO_EPORT1_FLAG0	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG0	/;"	d
INT1_LO_EPORT1_FLAG1	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG1	/;"	d
INT1_LO_EPORT1_FLAG2	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG2	/;"	d
INT1_LO_EPORT1_FLAG3	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG3	/;"	d
INT1_LO_EPORT1_FLAG4	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG4	/;"	d
INT1_LO_EPORT1_FLAG5	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG5	/;"	d
INT1_LO_EPORT1_FLAG6	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG6	/;"	d
INT1_LO_EPORT1_FLAG7	arch/m68k/include/asm/m5301x.h	/^#define INT1_LO_EPORT1_FLAG7	/;"	d
INT1_LO_ETPU_TC0F	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_ETPU_TC0F	/;"	d
INT1_LO_ETPU_TC1F	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_ETPU_TC1F	/;"	d
INT1_LO_ETPU_TC2F	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_ETPU_TC2F	/;"	d
INT1_LO_ETPU_TC3F	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_ETPU_TC3F	/;"	d
INT1_LO_ETPU_TC4F	arch/m68k/include/asm/m5235.h	/^#define INT1_LO_ETPU_TC4F	/;"	d
INT1_LO_FEC1_HBERR	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_HBERR	/;"	d
INT1_LO_FEC1_LC	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_LC	/;"	d
INT1_LO_FEC1_MII	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_MII	/;"	d
INT1_LO_FEC1_RL	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_RL	/;"	d
INT1_LO_FEC1_RXB	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_RXB	/;"	d
INT1_LO_FEC1_RXF	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_RXF	/;"	d
INT1_LO_FEC1_TXB	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_TXB	/;"	d
INT1_LO_FEC1_TXF	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_TXF	/;"	d
INT1_LO_FEC1_UN	arch/m68k/include/asm/m5275.h	/^#define INT1_LO_FEC1_UN	/;"	d
INT1_LO_PIT0	arch/m68k/include/asm/m520x.h	/^#define INT1_LO_PIT0	/;"	d
INT1_LO_PIT1	arch/m68k/include/asm/m520x.h	/^#define INT1_LO_PIT1	/;"	d
INT2A0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2A0	/;"	d
INT2A1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2A1	/;"	d
INT2B0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B0	/;"	d
INT2B1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B1	/;"	d
INT2B2	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B2	/;"	d
INT2B3	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B3	/;"	d
INT2B4	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B4	/;"	d
INT2B5	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B5	/;"	d
INT2B6	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B6	/;"	d
INT2B7	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2B7	/;"	d
INT2GPIC	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2GPIC	/;"	d
INT2MSKCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2MSKCR	/;"	d
INT2MSKR	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2MSKR	/;"	d
INT2PRI0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI0	/;"	d
INT2PRI1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI1	/;"	d
INT2PRI2	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI2	/;"	d
INT2PRI3	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI3	/;"	d
INT2PRI4	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI4	/;"	d
INT2PRI5	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI5	/;"	d
INT2PRI6	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI6	/;"	d
INT2PRI7	arch/sh/include/asm/cpu_sh7780.h	/^#define	INT2PRI7	/;"	d
INT2_HI_L2SW_BERR	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_BERR	/;"	d
INT2_HI_L2SW_LRN	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_LRN	/;"	d
INT2_HI_L2SW_OD0	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_OD0	/;"	d
INT2_HI_L2SW_OD1	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_OD1	/;"	d
INT2_HI_L2SW_OD2	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_OD2	/;"	d
INT2_HI_L2SW_QM	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_QM	/;"	d
INT2_HI_L2SW_RXB	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_RXB	/;"	d
INT2_HI_L2SW_RXF	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_RXF	/;"	d
INT2_HI_L2SW_TXB	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_TXB	/;"	d
INT2_HI_L2SW_TXF	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_L2SW_TXF	/;"	d
INT2_HI_MACNET0_PLR	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_MACNET0_PLR	/;"	d
INT2_HI_MACNET0_TS	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_MACNET0_TS	/;"	d
INT2_HI_MACNET0_WAKE	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_MACNET0_WAKE	/;"	d
INT2_HI_MACNET1_PLR	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_MACNET1_PLR	/;"	d
INT2_HI_MACNET1_TS	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_MACNET1_TS	/;"	d
INT2_HI_MACNET1_WAKE	arch/m68k/include/asm/m5441x.h	/^#define INT2_HI_MACNET1_WAKE	/;"	d
INT2_LO_CCM_UOCSR	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_CCM_UOCSR	/;"	d
INT2_LO_EDMA56_63	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_EDMA56_63	/;"	d
INT2_LO_NFC	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_NFC	/;"	d
INT2_LO_PIT0_PIF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PIT0_PIF	/;"	d
INT2_LO_PIT1_PIF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PIT1_PIF	/;"	d
INT2_LO_PIT2_PIF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PIT2_PIF	/;"	d
INT2_LO_PIT3_PIF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PIT3_PIF	/;"	d
INT2_LO_PLL_SR_LOCF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PLL_SR_LOCF	/;"	d
INT2_LO_PLL_SR_LOLF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PLL_SR_LOLF	/;"	d
INT2_LO_PWM_FSR	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_FSR	/;"	d
INT2_LO_PWM_SM0SR_CF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM0SR_CF	/;"	d
INT2_LO_PWM_SM0SR_RF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM0SR_RF	/;"	d
INT2_LO_PWM_SM1SR_CF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM1SR_CF	/;"	d
INT2_LO_PWM_SM1SR_RF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM1SR_RF	/;"	d
INT2_LO_PWM_SM2SR_CF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM2SR_CF	/;"	d
INT2_LO_PWM_SM2SR_RF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM2SR_RF	/;"	d
INT2_LO_PWM_SM3SR_CF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM3SR_CF	/;"	d
INT2_LO_PWM_SM3SR_RF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SM3SR_RF	/;"	d
INT2_LO_PWM_SMSR_REF	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_PWM_SMSR_REF	/;"	d
INT2_LO_RNG_EI	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_RNG_EI	/;"	d
INT2_LO_RTC	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_RTC	/;"	d
INT2_LO_SDHC	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_SDHC	/;"	d
INT2_LO_SIM1	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_SIM1	/;"	d
INT2_LO_SIM1_DATA	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_SIM1_DATA	/;"	d
INT2_LO_SSI0	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_SSI0	/;"	d
INT2_LO_SSI1	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_SSI1	/;"	d
INT2_LO_USBH_USBSTS	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_USBH_USBSTS	/;"	d
INT2_LO_USBOTG_USBSTS	arch/m68k/include/asm/m5441x.h	/^#define INT2_LO_USBOTG_USBSTS	/;"	d
INT32_MAX	scripts/kconfig/zconf.lex.c	/^#define INT32_MAX /;"	d	file:
INT32_MIN	scripts/kconfig/zconf.lex.c	/^#define INT32_MIN /;"	d	file:
INT8_MAX	scripts/kconfig/zconf.lex.c	/^#define INT8_MAX /;"	d	file:
INT8_MIN	scripts/kconfig/zconf.lex.c	/^#define INT8_MIN /;"	d	file:
INTA	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define INTA	/;"	d
INTA	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTA	drivers/usb/host/r8a66597.h	/^#define	INTA	/;"	d
INTA	include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTA	/;"	d
INTAREF	board/freescale/mx23evk/spl_boot.c	/^#define INTAREF	/;"	d	file:
INTB	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define INTB	/;"	d
INTB	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTB	include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTB	/;"	d
INTBUFSIZE	drivers/usb/eth/r8152.h	/^#define INTBUFSIZE	/;"	d
INTC	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define INTC	/;"	d
INTC	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC	include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTC	/;"	d
INTC0_EPORT	arch/m68k/include/asm/m5329.h	/^#define INTC0_EPORT	/;"	d
INTCLEAR	arch/xtensa/include/asm/regs.h	/^#define INTCLEAR	/;"	d
INTCLEARALL	drivers/power/exynos-tmu.c	/^#define INTCLEARALL	/;"	d	file:
INTCLEAR_FALL0	drivers/power/exynos-tmu.c	/^#define INTCLEAR_FALL0	/;"	d	file:
INTCLEAR_FALL1	drivers/power/exynos-tmu.c	/^#define INTCLEAR_FALL1	/;"	d	file:
INTCLEAR_FALL2	drivers/power/exynos-tmu.c	/^#define INTCLEAR_FALL2	/;"	d	file:
INTCLEAR_RISE0	drivers/power/exynos-tmu.c	/^#define INTCLEAR_RISE0	/;"	d	file:
INTCLEAR_RISE1	drivers/power/exynos-tmu.c	/^#define INTCLEAR_RISE1	/;"	d	file:
INTCLEAR_RISE2	drivers/power/exynos-tmu.c	/^#define INTCLEAR_RISE2	/;"	d	file:
INTCPS_SYSCONFIG	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define INTCPS_SYSCONFIG	/;"	d	file:
INTCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define INTCR0 /;"	d
INTCR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTCR0	/;"	d
INTCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define INTCR1 /;"	d
INTCR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTCR1	/;"	d
INTCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define INTCR2 /;"	d
INTCR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTCR2	/;"	d
INTCS_VECT	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define INTCS_VECT(/;"	d
INTCS_VECT_BASE	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define INTCS_VECT_BASE	/;"	d
INTCTLB_IPFDC	arch/mips/include/asm/mipsregs.h	/^#define INTCTLB_IPFDC	/;"	d
INTCTLB_IPPCI	arch/mips/include/asm/mipsregs.h	/^#define INTCTLB_IPPCI	/;"	d
INTCTLB_IPTI	arch/mips/include/asm/mipsregs.h	/^#define INTCTLB_IPTI	/;"	d
INTCTLF_IPFDC	arch/mips/include/asm/mipsregs.h	/^#define INTCTLF_IPFDC	/;"	d
INTCTLF_IPPCI	arch/mips/include/asm/mipsregs.h	/^#define INTCTLF_IPPCI	/;"	d
INTCTLF_IPTI	arch/mips/include/asm/mipsregs.h	/^#define INTCTLF_IPTI	/;"	d
INTC_CIMR	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_CIMR(/;"	d
INTC_CIMR_ALL	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_CIMR_ALL	/;"	d
INTC_CIMR_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_CIMR_MASK	/;"	d
INTC_CLMASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_CLMASK(/;"	d
INTC_CLMASK_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_CLMASK_MASK	/;"	d
INTC_EN0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_EN1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_IACKLPR_LVL	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IACKLPR_LVL(/;"	d
INTC_IACKLPR_LVL_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IACKLPR_LVL_MASK	/;"	d
INTC_IACKLPR_PRI	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IACKLPR_PRI(/;"	d
INTC_IACKLPR_PRI_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IACKLPR_PRI_MASK	/;"	d
INTC_ICONFIG_ELVLPRI1	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI1	/;"	d
INTC_ICONFIG_ELVLPRI2	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI2	/;"	d
INTC_ICONFIG_ELVLPRI3	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI3	/;"	d
INTC_ICONFIG_ELVLPRI4	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI4	/;"	d
INTC_ICONFIG_ELVLPRI5	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI5	/;"	d
INTC_ICONFIG_ELVLPRI6	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI6	/;"	d
INTC_ICONFIG_ELVLPRI7	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI7	/;"	d
INTC_ICONFIG_ELVLPRI_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_ELVLPRI_MASK	/;"	d
INTC_ICONFIG_EMASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICONFIG_EMASK	/;"	d
INTC_ICR_IL	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICR_IL(/;"	d
INTC_ICR_IL_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICR_IL_MASK	/;"	d
INTC_ICR_IP	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICR_IP(/;"	d
INTC_ICR_IP_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_ICR_IP_MASK	/;"	d
INTC_IMRLn_MASKALL	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IMRLn_MASKALL	/;"	d
INTC_INT_DISABLED	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_DISABLED /;"	d
INTC_INT_FALL_EDGE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_FALL_EDGE /;"	d
INTC_INT_HIGH_AND_LOW_LEVEL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_HIGH_AND_LOW_LEVEL /;"	d
INTC_INT_HIGH_LEVEL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_HIGH_LEVEL /;"	d
INTC_INT_LOW_LEVEL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_LOW_LEVEL /;"	d
INTC_INT_RISE_AND_FALL_EDGE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_RISE_AND_FALL_EDGE /;"	d
INTC_INT_RISE_EDGE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define INTC_INT_RISE_EDGE /;"	d
INTC_IPRH_INT32	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT32	/;"	d
INTC_IPRH_INT33	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT33	/;"	d
INTC_IPRH_INT34	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT34	/;"	d
INTC_IPRH_INT35	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT35	/;"	d
INTC_IPRH_INT36	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT36	/;"	d
INTC_IPRH_INT37	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT37	/;"	d
INTC_IPRH_INT38	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT38	/;"	d
INTC_IPRH_INT39	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT39	/;"	d
INTC_IPRH_INT40	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT40	/;"	d
INTC_IPRH_INT41	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT41	/;"	d
INTC_IPRH_INT42	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT42	/;"	d
INTC_IPRH_INT43	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT43	/;"	d
INTC_IPRH_INT44	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT44	/;"	d
INTC_IPRH_INT45	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT45	/;"	d
INTC_IPRH_INT46	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT46	/;"	d
INTC_IPRH_INT47	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT47	/;"	d
INTC_IPRH_INT48	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT48	/;"	d
INTC_IPRH_INT49	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT49	/;"	d
INTC_IPRH_INT50	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT50	/;"	d
INTC_IPRH_INT51	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT51	/;"	d
INTC_IPRH_INT52	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT52	/;"	d
INTC_IPRH_INT53	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT53	/;"	d
INTC_IPRH_INT54	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT54	/;"	d
INTC_IPRH_INT55	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT55	/;"	d
INTC_IPRH_INT56	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT56	/;"	d
INTC_IPRH_INT57	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT57	/;"	d
INTC_IPRH_INT58	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT58	/;"	d
INTC_IPRH_INT59	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT59	/;"	d
INTC_IPRH_INT60	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT60	/;"	d
INTC_IPRH_INT61	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT61	/;"	d
INTC_IPRH_INT62	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT62	/;"	d
INTC_IPRH_INT63	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRH_INT63	/;"	d
INTC_IPRL_INT0	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT0	/;"	d
INTC_IPRL_INT1	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT1	/;"	d
INTC_IPRL_INT10	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT10	/;"	d
INTC_IPRL_INT11	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT11	/;"	d
INTC_IPRL_INT12	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT12	/;"	d
INTC_IPRL_INT13	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT13	/;"	d
INTC_IPRL_INT14	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT14	/;"	d
INTC_IPRL_INT15	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT15	/;"	d
INTC_IPRL_INT16	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT16	/;"	d
INTC_IPRL_INT17	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT17	/;"	d
INTC_IPRL_INT18	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT18	/;"	d
INTC_IPRL_INT19	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT19	/;"	d
INTC_IPRL_INT2	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT2	/;"	d
INTC_IPRL_INT20	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT20	/;"	d
INTC_IPRL_INT21	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT21	/;"	d
INTC_IPRL_INT22	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT22	/;"	d
INTC_IPRL_INT23	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT23	/;"	d
INTC_IPRL_INT24	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT24	/;"	d
INTC_IPRL_INT25	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT25	/;"	d
INTC_IPRL_INT26	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT26	/;"	d
INTC_IPRL_INT27	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT27	/;"	d
INTC_IPRL_INT28	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT28	/;"	d
INTC_IPRL_INT29	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT29	/;"	d
INTC_IPRL_INT3	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT3	/;"	d
INTC_IPRL_INT30	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT30	/;"	d
INTC_IPRL_INT31	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT31	/;"	d
INTC_IPRL_INT4	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT4	/;"	d
INTC_IPRL_INT5	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT5	/;"	d
INTC_IPRL_INT6	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT6	/;"	d
INTC_IPRL_INT7	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT7	/;"	d
INTC_IPRL_INT8	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT8	/;"	d
INTC_IPRL_INT9	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IPRL_INT9	/;"	d
INTC_IRLR	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IRLR(/;"	d
INTC_IRLR_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_IRLR_MASK	/;"	d
INTC_IRQ0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_IRQ0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ0_MARK, SCIFB1_RXD_D_MARK, INTC_IRQ0_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
INTC_IRQ1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_IRQ1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ1_MARK, SCIFB1_SCK_C_MARK, INTC_IRQ1_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
INTC_IRQ2_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_IRQ2_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ2_MARK, SCIFB1_TXD_D_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
INTC_IRQ3_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_IRQ3_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
INTC_IRQ4_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
INTC_IRQ4_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF2_RXD_E_MARK, INTC_IRQ4_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
INTC_MON_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define INTC_MON_BASE_ADDR	/;"	d
INTC_SIMR	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_SIMR(/;"	d
INTC_SIMR_ALL	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_SIMR_ALL	/;"	d
INTC_SIMR_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_SIMR_MASK	/;"	d
INTC_SLMASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_SLMASK(/;"	d
INTC_SLMASK_MASK	arch/m68k/include/asm/coldfire/intctrl.h	/^#define INTC_SLMASK_MASK	/;"	d
INTD	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define INTD	/;"	d
INTD	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTD	include/dt-bindings/interrupt-router/intel-irq.h	/^#define INTD	/;"	d
INTEGRATOR_BOOT_ROM_BASE	board/armltd/integrator/pci.c	/^#define INTEGRATOR_BOOT_ROM_BASE	/;"	d	file:
INTEGRATOR_HDR0_SDRAM_BASE	board/armltd/integrator/pci.c	/^#define INTEGRATOR_HDR0_SDRAM_BASE	/;"	d	file:
INTEL_ALT_MANU	include/flash.h	/^#define INTEL_ALT_MANU	/;"	d
INTEL_BAYTRAIL	arch/x86/cpu/baytrail/Kconfig	/^config INTEL_BAYTRAIL$/;"	c
INTEL_BROADWELL	arch/x86/cpu/broadwell/Kconfig	/^config INTEL_BROADWELL$/;"	c
INTEL_BROADWELL_GPIO	drivers/gpio/Kconfig	/^config INTEL_BROADWELL_GPIO$/;"	c	menu:GPIO Support
INTEL_CE4100	drivers/mtd/nand/denali.h	/^#define INTEL_CE4100	/;"	d
INTEL_ID_28F016S	include/flash.h	/^#define INTEL_ID_28F016S /;"	d
INTEL_ID_28F128J3	include/flash.h	/^#define INTEL_ID_28F128J3 /;"	d
INTEL_ID_28F128J3A	include/flash.h	/^#define INTEL_ID_28F128J3A /;"	d
INTEL_ID_28F128K3	include/flash.h	/^#define INTEL_ID_28F128K3 /;"	d
INTEL_ID_28F128P30B	include/flash.h	/^#define INTEL_ID_28F128P30B /;"	d
INTEL_ID_28F128P30T	include/flash.h	/^#define INTEL_ID_28F128P30T /;"	d
INTEL_ID_28F160B3B	include/flash.h	/^#define INTEL_ID_28F160B3B /;"	d
INTEL_ID_28F160B3T	include/flash.h	/^#define INTEL_ID_28F160B3T /;"	d
INTEL_ID_28F160C3B	include/flash.h	/^#define INTEL_ID_28F160C3B /;"	d
INTEL_ID_28F160C3T	include/flash.h	/^#define INTEL_ID_28F160C3T /;"	d
INTEL_ID_28F160F3B	include/flash.h	/^#define INTEL_ID_28F160F3B /;"	d
INTEL_ID_28F160S3	include/flash.h	/^#define INTEL_ID_28F160S3 /;"	d
INTEL_ID_28F256J3A	include/flash.h	/^#define INTEL_ID_28F256J3A /;"	d
INTEL_ID_28F256K3	include/flash.h	/^#define INTEL_ID_28F256K3 /;"	d
INTEL_ID_28F256L18T	include/flash.h	/^#define INTEL_ID_28F256L18T /;"	d
INTEL_ID_28F256P30B	include/flash.h	/^#define INTEL_ID_28F256P30B /;"	d
INTEL_ID_28F256P30T	include/flash.h	/^#define INTEL_ID_28F256P30T /;"	d
INTEL_ID_28F320B3B	include/flash.h	/^#define INTEL_ID_28F320B3B /;"	d
INTEL_ID_28F320B3T	include/flash.h	/^#define INTEL_ID_28F320B3T /;"	d
INTEL_ID_28F320C3B	include/flash.h	/^#define INTEL_ID_28F320C3B /;"	d
INTEL_ID_28F320C3T	include/flash.h	/^#define INTEL_ID_28F320C3T /;"	d
INTEL_ID_28F320J3A	include/flash.h	/^#define INTEL_ID_28F320J3A /;"	d
INTEL_ID_28F320J5	include/flash.h	/^#define INTEL_ID_28F320J5 /;"	d
INTEL_ID_28F320S3	include/flash.h	/^#define INTEL_ID_28F320S3 /;"	d
INTEL_ID_28F640B3B	include/flash.h	/^#define INTEL_ID_28F640B3B /;"	d
INTEL_ID_28F640B3T	include/flash.h	/^#define INTEL_ID_28F640B3T /;"	d
INTEL_ID_28F640C3B	include/flash.h	/^#define INTEL_ID_28F640C3B /;"	d
INTEL_ID_28F640C3T	include/flash.h	/^#define INTEL_ID_28F640C3T /;"	d
INTEL_ID_28F640J3A	include/flash.h	/^#define INTEL_ID_28F640J3A /;"	d
INTEL_ID_28F640J5	include/flash.h	/^#define INTEL_ID_28F640J5 /;"	d
INTEL_ID_28F64K3	include/flash.h	/^#define INTEL_ID_28F64K3 /;"	d
INTEL_ID_28F64P30B	include/flash.h	/^#define INTEL_ID_28F64P30B /;"	d
INTEL_ID_28F64P30T	include/flash.h	/^#define INTEL_ID_28F64P30T /;"	d
INTEL_ID_28F800B3B	include/flash.h	/^#define INTEL_ID_28F800B3B /;"	d
INTEL_ID_28F800B3T	include/flash.h	/^#define INTEL_ID_28F800B3T /;"	d
INTEL_ID_28F800C3B	include/flash.h	/^#define INTEL_ID_28F800C3B /;"	d
INTEL_ID_28F800C3T	include/flash.h	/^#define INTEL_ID_28F800C3T /;"	d
INTEL_MANUFACT	include/flash.h	/^#define INTEL_MANUFACT	/;"	d
INTEL_MRST	drivers/mtd/nand/denali.h	/^#define INTEL_MRST	/;"	d
INTEL_PRGM	include/lattice.h	/^#define INTEL_PRGM	/;"	d
INTEL_QUARK	arch/x86/cpu/quark/Kconfig	/^config INTEL_QUARK$/;"	c
INTEL_QUEENSBAY	arch/x86/cpu/queensbay/Kconfig	/^config INTEL_QUEENSBAY$/;"	c
INTEL_USB2_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  INTEL_USB2_EN	/;"	d
INTEL_USB2_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   INTEL_USB2_EN	/;"	d
INTENB0	drivers/usb/host/r8a66597.h	/^#define INTENB0	/;"	d
INTENB1	drivers/usb/host/r8a66597.h	/^#define INTENB1	/;"	d
INTENB2	drivers/usb/host/r8a66597.h	/^#define INTENB2	/;"	d
INTEN_FALL0	drivers/power/exynos-tmu.c	/^#define INTEN_FALL0	/;"	d	file:
INTEN_FALL1	drivers/power/exynos-tmu.c	/^#define INTEN_FALL1	/;"	d	file:
INTEN_FALL2	drivers/power/exynos-tmu.c	/^#define INTEN_FALL2	/;"	d	file:
INTEN_RISE0	drivers/power/exynos-tmu.c	/^#define INTEN_RISE0	/;"	d	file:
INTEN_RISE1	drivers/power/exynos-tmu.c	/^#define INTEN_RISE1	/;"	d	file:
INTEN_RISE2	drivers/power/exynos-tmu.c	/^#define INTEN_RISE2	/;"	d	file:
INTERACD_SCAN_CFG_OFFSET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define INTERACD_SCAN_CFG_OFFSET	/;"	d
INTERACE_SCAN_CFG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define INTERACE_SCAN_CFG	/;"	d
INTERACE_SCAN_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define INTERACE_SCAN_CFG	/;"	d
INTERACE_SCAN_CFG_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define INTERACE_SCAN_CFG_SHIFT	/;"	d
INTERFACE_MODE_BYTE	drivers/net/tsi108_eth.c	/^#define INTERFACE_MODE_BYTE	/;"	d	file:
INTERFACE_MODE_NIBBLE	drivers/net/tsi108_eth.c	/^#define INTERFACE_MODE_NIBBLE	/;"	d	file:
INTERFACE_MODE_REG	board/freescale/common/vsc3316_3308.c	/^#define INTERFACE_MODE_REG	/;"	d	file:
INTERFACE_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define INTERFACE_REG	/;"	d
INTERFACE_STATUS_EXCESS_DEFER	drivers/net/tsi108_eth.c	/^#define INTERFACE_STATUS_EXCESS_DEFER	/;"	d	file:
INTERFACE_STATUS_LINK_FAIL	drivers/net/tsi108_eth.c	/^#define INTERFACE_STATUS_LINK_FAIL	/;"	d	file:
INTERLAKEN	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	INTERLAKEN,$/;"	e	enum:srds_prtcl
INTERLAKEN	arch/powerpc/include/asm/fsl_serdes.h	/^	INTERLAKEN,$/;"	e	enum:srds_prtcl
INTERLEAVE_ADDR_MAP_EN	arch/arm/mach-exynos/exynos4_setup.h	/^#define INTERLEAVE_ADDR_MAP_EN	/;"	d
INTERLEAVE_ADDR_MAP_END_ADDR	arch/arm/mach-exynos/exynos4_setup.h	/^#define INTERLEAVE_ADDR_MAP_END_ADDR	/;"	d
INTERLEAVE_ADDR_MAP_START_ADDR	arch/arm/mach-exynos/exynos4_setup.h	/^#define INTERLEAVE_ADDR_MAP_START_ADDR	/;"	d
INTERNAL_ACCESS_PORT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define INTERNAL_ACCESS_PORT	/;"	d
INTERNAL_HWCONF	board/mpl/pati/pati.h	/^#define INTERNAL_HWCONF	/;"	d
INTERNAL_ID	arch/arm/mach-tegra/tegra210/clock.c	/^#define INTERNAL_ID(/;"	d	file:
INTERNAL_SIZE_T	include/malloc.h	/^#define INTERNAL_SIZE_T /;"	d
INTERNAL_SRAM_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define INTERNAL_SRAM_BASE	/;"	d
INTERNAL_SRAM_SIZE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define INTERNAL_SRAM_SIZE	/;"	d
INTERNAL_UART	arch/x86/cpu/baytrail/Kconfig	/^config INTERNAL_UART$/;"	c
INTERRUPT	include/usbdescriptors.h	/^#define INTERRUPT	/;"	d
INTERRUPT_ENABLE_BITS_MASK	include/usb/ehci-ci.h	/^#define  INTERRUPT_ENABLE_BITS_MASK /;"	d
INTERRUPT_H	arch/powerpc/include/asm/interrupt.h	/^#define INTERRUPT_H$/;"	d
INTERRUPT_LINE	include/radeon.h	/^#define INTERRUPT_LINE	/;"	d
INTERRUPT_PIN	include/radeon.h	/^#define INTERRUPT_PIN	/;"	d
INTERRUPT_STATUS_BITS_MASK	include/usb/ehci-ci.h	/^#define  INTERRUPT_STATUS_BITS_MASK /;"	d
INTER_REGS_BASE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define INTER_REGS_BASE	/;"	d
INTER_REGS_BASE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define INTER_REGS_BASE	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7720.h	/^#define INTEVT	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7722.h	/^#define INTEVT	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7723.h	/^#define INTEVT	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7724.h	/^#define INTEVT	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7750.h	/^#define INTEVT	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTEVT	/;"	d
INTEVT	arch/sh/include/asm/cpu_sh7785.h	/^#define	INTEVT	/;"	d
INTF	include/sym53c8xx.h	/^  #define   INTF /;"	d
INTKNEPMIS	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INTKNEPMIS	/;"	d
INTKN_TXFEMP	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INTKN_TXFEMP	/;"	d
INTL	drivers/usb/host/r8a66597.h	/^#define	INTL	/;"	d
INTLEV_MASK	arch/avr32/cpu/interrupts.c	/^#define INTLEV_MASK	/;"	d	file:
INTLEV_SHIFT	arch/avr32/cpu/interrupts.c	/^#define INTLEV_SHIFT	/;"	d	file:
INTMSK	arch/arm/cpu/arm920t/start.S	/^#  define INTMSK	/;"	d	file:
INTMSK	arch/sh/include/asm/cpu_sh7750.h	/^#define INTMSK	/;"	d
INTMSK0	arch/sh/include/asm/cpu_sh7722.h	/^#define INTMSK0	/;"	d
INTMSK0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTMSK0	/;"	d
INTMSK1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTMSK1	/;"	d
INTMSK2	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTMSK2	/;"	d
INTMSKCL	arch/sh/include/asm/cpu_sh7750.h	/^#define INTMSKCL	/;"	d
INTMSKCLR0	arch/sh/include/asm/cpu_sh7722.h	/^#define INTMSKCLR0	/;"	d
INTMSKCLR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTMSKCLR0	/;"	d
INTMSKCLR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTMSKCLR1	/;"	d
INTMSKCLR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTMSKCLR2	/;"	d
INTMSK_FRAME_DONE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define INTMSK_FRAME_DONE	/;"	d
INTPRI	arch/sh/include/asm/cpu_sh7750.h	/^#define INTPRI	/;"	d
INTPRI	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTPRI	/;"	d
INTPRI0	arch/sh/include/asm/cpu_sh7722.h	/^#define INTPRI0	/;"	d
INTR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define INTR	/;"	d
INTREAD	arch/xtensa/include/asm/regs.h	/^#define INTREAD	/;"	d
INTREG_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define INTREG_BASE	/;"	d
INTREG_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define INTREG_BASE	/;"	d
INTREG_BASE_ADDR_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define INTREG_BASE_ADDR_REG	/;"	d
INTREQ	arch/sh/include/asm/cpu_sh7750.h	/^#define INTREQ	/;"	d
INTREQ	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTREQ	/;"	d
INTREQ0	arch/sh/include/asm/cpu_sh7722.h	/^#define INTREQ0	/;"	d
INTR_1MS_TIMER_EN	include/usb/ehci-ci.h	/^#define INTR_1MS_TIMER_EN	/;"	d
INTR_AAE	drivers/usb/host/ehci.h	/^#define INTR_AAE /;"	d
INTR_ASYNCH	drivers/bios_emulator/include/x86emu/regs.h	/^#define	 INTR_ASYNCH	/;"	d
INTR_A_SESSION_VALID_EN	include/usb/ehci-ci.h	/^#define INTR_A_SESSION_VALID_EN /;"	d
INTR_A_VBUS_VALID_EN	include/usb/ehci-ci.h	/^#define INTR_A_VBUS_VALID_EN	/;"	d
INTR_B_SESSION_END_EN	include/usb/ehci-ci.h	/^#define INTR_B_SESSION_END_EN	/;"	d
INTR_B_SESSION_VALID_EN	include/usb/ehci-ci.h	/^#define INTR_B_SESSION_VALID_EN /;"	d
INTR_DATA_PULSING_EN	include/usb/ehci-ci.h	/^#define INTR_DATA_PULSING_EN	/;"	d
INTR_EN	drivers/mtd/nand/denali.h	/^#define INTR_EN(/;"	d
INTR_ENB	drivers/net/dnet.h	/^	u32 INTR_ENB;$/;"	m	struct:dnet_registers	typeref:typename:u32
INTR_EN__DMA_CMD_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_EN__DMA_CMD_COMP	/;"	d
INTR_EN__ECC_ERR	drivers/mtd/nand/denali.h	/^#define     INTR_EN__ECC_ERR	/;"	d
INTR_EN__ECC_TRANSACTION_DONE	drivers/mtd/nand/denali.h	/^#define     INTR_EN__ECC_TRANSACTION_DONE	/;"	d
INTR_EN__ERASE_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_EN__ERASE_COMP	/;"	d
INTR_EN__ERASE_FAIL	drivers/mtd/nand/denali.h	/^#define     INTR_EN__ERASE_FAIL	/;"	d
INTR_EN__INT_ACT	drivers/mtd/nand/denali.h	/^#define     INTR_EN__INT_ACT	/;"	d
INTR_EN__LOAD_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_EN__LOAD_COMP	/;"	d
INTR_EN__LOCKED_BLK	drivers/mtd/nand/denali.h	/^#define     INTR_EN__LOCKED_BLK	/;"	d
INTR_EN__PAGE_XFER_INC	drivers/mtd/nand/denali.h	/^#define     INTR_EN__PAGE_XFER_INC	/;"	d
INTR_EN__PIPE_CMD_ERR	drivers/mtd/nand/denali.h	/^#define     INTR_EN__PIPE_CMD_ERR	/;"	d
INTR_EN__PIPE_CPYBCK_CMD_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_EN__PIPE_CPYBCK_CMD_COMP	/;"	d
INTR_EN__PROGRAM_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_EN__PROGRAM_COMP	/;"	d
INTR_EN__PROGRAM_FAIL	drivers/mtd/nand/denali.h	/^#define     INTR_EN__PROGRAM_FAIL	/;"	d
INTR_EN__RST_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_EN__RST_COMP	/;"	d
INTR_EN__TIME_OUT	drivers/mtd/nand/denali.h	/^#define     INTR_EN__TIME_OUT	/;"	d
INTR_EN__UNSUP_CMD	drivers/mtd/nand/denali.h	/^#define     INTR_EN__UNSUP_CMD	/;"	d
INTR_HALTED	drivers/bios_emulator/include/x86emu/regs.h	/^#define	 INTR_HALTED	/;"	d
INTR_LINK	drivers/usb/eth/r8152.h	/^#define INTR_LINK	/;"	d
INTR_LN	arch/x86/include/asm/pch_common.h	/^#define INTR_LN	/;"	d
INTR_PCE	drivers/usb/host/ehci.h	/^#define INTR_PCE /;"	d
INTR_SEE	drivers/usb/host/ehci.h	/^#define INTR_SEE /;"	d
INTR_SRC	drivers/net/dnet.h	/^	u32 INTR_SRC;$/;"	m	struct:dnet_registers	typeref:typename:u32
INTR_STATUS	drivers/mtd/nand/denali.h	/^#define INTR_STATUS(/;"	d
INTR_STATUS__DMA_CMD_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__DMA_CMD_COMP	/;"	d
INTR_STATUS__ECC_ERR	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__ECC_ERR	/;"	d
INTR_STATUS__ECC_TRANSACTION_DONE	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__ECC_TRANSACTION_DONE	/;"	d
INTR_STATUS__ECC_UNCOR_ERR	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__ECC_UNCOR_ERR	/;"	d
INTR_STATUS__ERASE_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__ERASE_COMP	/;"	d
INTR_STATUS__ERASE_FAIL	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__ERASE_FAIL	/;"	d
INTR_STATUS__INT_ACT	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__INT_ACT	/;"	d
INTR_STATUS__LOAD_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__LOAD_COMP	/;"	d
INTR_STATUS__LOCKED_BLK	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__LOCKED_BLK	/;"	d
INTR_STATUS__PAGE_XFER_INC	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__PAGE_XFER_INC	/;"	d
INTR_STATUS__PIPE_CMD_ERR	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__PIPE_CMD_ERR	/;"	d
INTR_STATUS__PIPE_CPYBCK_CMD_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__PIPE_CPYBCK_CMD_COMP	/;"	d
INTR_STATUS__PROGRAM_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__PROGRAM_COMP	/;"	d
INTR_STATUS__PROGRAM_FAIL	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__PROGRAM_FAIL	/;"	d
INTR_STATUS__RST_COMP	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__RST_COMP	/;"	d
INTR_STATUS__TIME_OUT	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__TIME_OUT	/;"	d
INTR_STATUS__UNSUP_CMD	drivers/mtd/nand/denali.h	/^#define     INTR_STATUS__UNSUP_CMD	/;"	d
INTR_SYNCH	drivers/bios_emulator/include/x86emu/regs.h	/^#define	 INTR_SYNCH	/;"	d
INTR_UE	drivers/usb/host/ehci.h	/^#define INTR_UE /;"	d
INTR_UEE	drivers/usb/host/ehci.h	/^#define INTR_UEE /;"	d
INTR_USB_ID_EN	include/usb/ehci-ci.h	/^#define INTR_USB_ID_EN	/;"	d
INTSET	arch/xtensa/include/asm/regs.h	/^#define INTSET	/;"	d
INTSRC_FRAME_DONE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define INTSRC_FRAME_DONE	/;"	d
INTSRC_PLL_STABLE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define INTSRC_PLL_STABLE	/;"	d
INTSRC_SWRST_RELEASE	arch/arm/mach-exynos/include/mach/dsim.h	/^#define INTSRC_SWRST_RELEASE	/;"	d
INTSTR0	arch/sh/include/asm/cpu_sh7722.h	/^#define INTSTR0 /;"	d
INTSTR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTSTR0	/;"	d
INTSTR1	arch/sh/include/asm/cpu_sh7722.h	/^#define INTSTR1 /;"	d
INTSTR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTSTR1	/;"	d
INTSTR2	arch/sh/include/asm/cpu_sh7722.h	/^#define INTSTR2 /;"	d
INTSTR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	INTSTR2	/;"	d
INTSTS0	drivers/usb/host/r8a66597.h	/^#define INTSTS0	/;"	d
INTSTS1	drivers/usb/host/r8a66597.h	/^#define INTSTS1	/;"	d
INTSTS2	drivers/usb/host/r8a66597.h	/^#define INTSTS2	/;"	d
INTSTS_1MS	include/usb/ehci-ci.h	/^#define INTSTS_1MS	/;"	d
INTSTS_AHBE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_AHBE	/;"	d
INTSTS_A_SESSION_VALID	include/usb/ehci-ci.h	/^#define INTSTS_A_SESSION_VALID	/;"	d
INTSTS_A_VBUS_VALID	include/usb/ehci-ci.h	/^#define INTSTS_A_VBUS_VALID	/;"	d
INTSTS_B_SESSION_END	include/usb/ehci-ci.h	/^#define INTSTS_B_SESSION_END	/;"	d
INTSTS_B_SESSION_VALID	include/usb/ehci-ci.h	/^#define INTSTS_B_SESSION_VALID	/;"	d
INTSTS_DATA_PULSING	include/usb/ehci-ci.h	/^#define INTSTS_DATA_PULSING	/;"	d
INTSTS_ECIE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_ECIE	/;"	d
INTSTS_MASK	include/usb/ehci-ci.h	/^#define INTSTS_MASK	/;"	d
INTSTS_MIII	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_MIII	/;"	d
INTSTS_MOI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_MOI	/;"	d
INTSTS_OTHER	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_OTHER	/;"	d
INTSTS_PHYI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_PHYI	/;"	d
INTSTS_RWI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_RWI	/;"	d
INTSTS_RXBI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_RXBI	/;"	d
INTSTS_RXMI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_RXMI	/;"	d
INTSTS_RXROI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_RXROI	/;"	d
INTSTS_RXSQ	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_RXSQ	/;"	d
INTSTS_RXSQI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_RXSQI	/;"	d
INTSTS_TI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_TI	/;"	d
INTSTS_TXCOI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_TXCOI	/;"	d
INTSTS_TXLEI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_TXLEI	/;"	d
INTSTS_TXSQ	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_TXSQ	/;"	d
INTSTS_TXUHI	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define INTSTS_TXUHI	/;"	d
INTSTS_USB_ID	include/usb/ehci-ci.h	/^#define INTSTS_USB_ID	/;"	d
INTSUBMSK	arch/arm/cpu/arm920t/start.S	/^#  define INTSUBMSK	/;"	d	file:
INT_ACT	include/linux/mtd/samsung_onenand.h	/^#define INT_ACT /;"	d
INT_ADD	arch/mips/include/asm/asm.h	/^#define INT_ADD	/;"	d
INT_ADDI	arch/mips/include/asm/asm.h	/^#define INT_ADDI	/;"	d
INT_ADDIU	arch/mips/include/asm/asm.h	/^#define INT_ADDIU	/;"	d
INT_ADDU	arch/mips/include/asm/asm.h	/^#define INT_ADDU	/;"	d
INT_BUFRE	drivers/mmc/sh_mmcif.h	/^#define INT_BUFRE	/;"	d
INT_BUFREN	drivers/mmc/sh_mmcif.h	/^#define INT_BUFREN	/;"	d
INT_BUFVIO	drivers/mmc/sh_mmcif.h	/^#define INT_BUFVIO	/;"	d
INT_BUFWEN	drivers/mmc/sh_mmcif.h	/^#define INT_BUFWEN	/;"	d
INT_BUF_READ_EN	drivers/mmc/mxcmmc.c	/^#define INT_BUF_READ_EN	/;"	d	file:
INT_BUF_WRITE_EN	drivers/mmc/mxcmmc.c	/^#define INT_BUF_WRITE_EN	/;"	d	file:
INT_CARD_INSERTION_EN	drivers/mmc/mxcmmc.c	/^#define INT_CARD_INSERTION_EN	/;"	d	file:
INT_CARD_INSERTION_WKP_EN	drivers/mmc/mxcmmc.c	/^#define INT_CARD_INSERTION_WKP_EN	/;"	d	file:
INT_CARD_REMOVAL_EN	drivers/mmc/mxcmmc.c	/^#define INT_CARD_REMOVAL_EN	/;"	d	file:
INT_CARD_REMOVAL_WKP_EN	drivers/mmc/mxcmmc.c	/^#define INT_CARD_REMOVAL_WKP_EN	/;"	d	file:
INT_CAUSE_UNMASK_ALL	drivers/net/mvgbe.h	/^#define INT_CAUSE_UNMASK_ALL	/;"	d
INT_CAUSE_UNMASK_ALL_EXT	drivers/net/mvgbe.h	/^#define INT_CAUSE_UNMASK_ALL_EXT	/;"	d
INT_CCSDE	drivers/mmc/sh_mmcif.h	/^#define INT_CCSDE	/;"	d
INT_CCSRCV	drivers/mmc/sh_mmcif.h	/^#define INT_CCSRCV	/;"	d
INT_CCSTO	drivers/mmc/sh_mmcif.h	/^#define INT_CCSTO	/;"	d
INT_CFG	drivers/net/smc911x.h	/^#define INT_CFG	/;"	d
INT_CFG_INT_DEAS	drivers/net/smc911x.h	/^#define	INT_CFG_INT_DEAS	/;"	d
INT_CFG_INT_DEAS_CLR	drivers/net/smc911x.h	/^#define	INT_CFG_INT_DEAS_CLR	/;"	d
INT_CFG_INT_DEAS_STS	drivers/net/smc911x.h	/^#define	INT_CFG_INT_DEAS_STS	/;"	d
INT_CFG_IRQ_EN	drivers/net/smc911x.h	/^#define	INT_CFG_IRQ_EN	/;"	d
INT_CFG_IRQ_INT	drivers/net/smc911x.h	/^#define	INT_CFG_IRQ_INT	/;"	d
INT_CFG_IRQ_POL	drivers/net/smc911x.h	/^#define	INT_CFG_IRQ_POL	/;"	d
INT_CFG_IRQ_TYPE	drivers/net/smc911x.h	/^#define	INT_CFG_IRQ_TYPE	/;"	d
INT_CLK	include/dm/platform_data/serial_sh.h	/^	INT_CLK,$/;"	e	enum:sh_clk_mode
INT_CLR_STATUS	board/synopsys/axs10x/nand.c	/^	INT_CLR_STATUS = 0x120,	\/* interrupt clear status register *\/$/;"	e	enum:nand_regs_t	file:
INT_CMD12CRE	drivers/mmc/sh_mmcif.h	/^#define INT_CMD12CRE	/;"	d
INT_CMD12DRE	drivers/mmc/sh_mmcif.h	/^#define INT_CMD12DRE	/;"	d
INT_CMD12RBE	drivers/mmc/sh_mmcif.h	/^#define INT_CMD12RBE	/;"	d
INT_CMDVIO	drivers/mmc/sh_mmcif.h	/^#define INT_CMDVIO	/;"	d
INT_CONF	scripts/basic/fixdep.c	/^#define INT_CONF /;"	d	file:
INT_CONN_ID_STS_CNG	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_CONN_ID_STS_CNG	/;"	d
INT_CRCSTO	drivers/mmc/sh_mmcif.h	/^#define INT_CRCSTO	/;"	d
INT_CRSPE	drivers/mmc/sh_mmcif.h	/^#define INT_CRSPE	/;"	d
INT_DAT0_EN	drivers/mmc/mxcmmc.c	/^#define INT_DAT0_EN	/;"	d	file:
INT_DEV_MODE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_DEV_MODE	/;"	d
INT_DISCONN	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_DISCONN	/;"	d
INT_DMA	arch/m68k/include/asm/m5272.h	/^#define INT_DMA	/;"	d
INT_DTRANE	drivers/mmc/sh_mmcif.h	/^#define INT_DTRANE	/;"	d
INT_EARLY_SUSPEND	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_EARLY_SUSPEND	/;"	d
INT_EN	drivers/net/smc911x.h	/^#define INT_EN	/;"	d
INT_ENA	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define INT_ENA	/;"	d
INT_END_CMD_RES_EN	drivers/mmc/mxcmmc.c	/^#define INT_END_CMD_RES_EN	/;"	d	file:
INT_ENTC	arch/m68k/include/asm/m5272.h	/^#define INT_ENTC	/;"	d
INT_ENUMDONE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_ENUMDONE	/;"	d
INT_EN_GPIO0_INT	drivers/net/smc911x.h	/^#define	INT_EN_GPIO0_INT	/;"	d
INT_EN_GPIO1_INT	drivers/net/smc911x.h	/^#define	INT_EN_GPIO1_INT	/;"	d
INT_EN_GPIO2_INT	drivers/net/smc911x.h	/^#define	INT_EN_GPIO2_INT	/;"	d
INT_EN_GPT_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_GPT_INT_EN	/;"	d
INT_EN_PHY_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_PHY_INT_EN	/;"	d
INT_EN_PME_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_PME_INT_EN	/;"	d
INT_EN_RDFL_EN	drivers/net/smc911x.h	/^#define	INT_EN_RDFL_EN	/;"	d
INT_EN_RDFO_EN	drivers/net/smc911x.h	/^#define	INT_EN_RDFO_EN	/;"	d
INT_EN_RSFF_EN	drivers/net/smc911x.h	/^#define	INT_EN_RSFF_EN	/;"	d
INT_EN_RSFL_EN	drivers/net/smc911x.h	/^#define	INT_EN_RSFL_EN	/;"	d
INT_EN_RWT_EN	drivers/net/smc911x.h	/^#define	INT_EN_RWT_EN	/;"	d
INT_EN_RXDFH_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_RXDFH_INT_EN	/;"	d
INT_EN_RXD_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_RXD_INT_EN	/;"	d
INT_EN_RXE_EN	drivers/net/smc911x.h	/^#define	INT_EN_RXE_EN	/;"	d
INT_EN_RXSTOP_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_RXSTOP_INT_EN	/;"	d
INT_EN_SW_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_SW_INT_EN	/;"	d
INT_EN_TDFA_EN	drivers/net/smc911x.h	/^#define	INT_EN_TDFA_EN	/;"	d
INT_EN_TDFO_EN	drivers/net/smc911x.h	/^#define	INT_EN_TDFO_EN	/;"	d
INT_EN_TDFU_EN	drivers/net/smc911x.h	/^#define	INT_EN_TDFU_EN	/;"	d
INT_EN_TIOC_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_TIOC_INT_EN	/;"	d
INT_EN_TSFF_EN	drivers/net/smc911x.h	/^#define	INT_EN_TSFF_EN	/;"	d
INT_EN_TSFL_EN	drivers/net/smc911x.h	/^#define	INT_EN_TSFL_EN	/;"	d
INT_EN_TXE_EN	drivers/net/smc911x.h	/^#define	INT_EN_TXE_EN	/;"	d
INT_EN_TXSO_EN	drivers/net/smc911x.h	/^#define	INT_EN_TXSO_EN	/;"	d
INT_EN_TXSTOP_INT_EN	drivers/net/smc911x.h	/^#define	INT_EN_TXSTOP_INT_EN	/;"	d
INT_EP_CTL	drivers/usb/eth/smsc95xx.c	/^#define INT_EP_CTL	/;"	d	file:
INT_EP_CTL_PHY_INT_	drivers/usb/eth/smsc95xx.c	/^#define INT_EP_CTL_PHY_INT_	/;"	d	file:
INT_ERR_ALL	include/linux/mtd/samsung_onenand.h	/^#define INT_ERR_ALL	/;"	d
INT_ERR_STS	drivers/mmc/sh_mmcif.h	/^#define INT_ERR_STS	/;"	d
INT_ERX	arch/m68k/include/asm/m5272.h	/^#define INT_ERX	/;"	d
INT_ETX	arch/m68k/include/asm/m5272.h	/^#define INT_ETX	/;"	d
INT_FIFO_SIZE	drivers/usb/gadget/pxa25x_udc.h	/^#define INT_FIFO_SIZE	/;"	d
INT_FIG_	scripts/basic/fixdep.c	/^#define INT_FIG_ /;"	d	file:
INT_FRAME_SIZE	include/ppc_defs.h	/^#define	INT_FRAME_SIZE	/;"	d
INT_GENERATED	arch/arm/mach-exynos/include/mach/adc.h	/^#define INT_GENERATED	/;"	d
INT_GINNakEff	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_GINNakEff	/;"	d
INT_GOUTNakEff	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_GOUTNakEff	/;"	d
INT_HOST_MODE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_HOST_MODE	/;"	d
INT_HPD	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define INT_HPD	/;"	d
INT_HPD	arch/arm/mach-exynos/include/mach/dp.h	/^#define INT_HPD	/;"	d
INT_ICR1_TMR0IPL	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR0IPL(/;"	d
INT_ICR1_TMR0MASK	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR0MASK	/;"	d
INT_ICR1_TMR0PI	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR0PI	/;"	d
INT_ICR1_TMR1IPL	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR1IPL(/;"	d
INT_ICR1_TMR1MASK	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR1MASK	/;"	d
INT_ICR1_TMR1PI	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR1PI	/;"	d
INT_ICR1_TMR2IPL	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR2IPL(/;"	d
INT_ICR1_TMR2MASK	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR2MASK	/;"	d
INT_ICR1_TMR2PI	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR2PI	/;"	d
INT_ICR1_TMR3IPL	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR3IPL(/;"	d
INT_ICR1_TMR3MASK	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR3MASK	/;"	d
INT_ICR1_TMR3PI	arch/m68k/include/asm/m5272.h	/^#define INT_ICR1_TMR3PI	/;"	d
INT_INT1	arch/m68k/include/asm/m5272.h	/^#define INT_INT1	/;"	d
INT_INT2	arch/m68k/include/asm/m5272.h	/^#define INT_INT2	/;"	d
INT_INT3	arch/m68k/include/asm/m5272.h	/^#define INT_INT3	/;"	d
INT_INT4	arch/m68k/include/asm/m5272.h	/^#define INT_INT4	/;"	d
INT_INT5	arch/m68k/include/asm/m5272.h	/^#define INT_INT5	/;"	d
INT_INT6	arch/m68k/include/asm/m5272.h	/^#define INT_INT6	/;"	d
INT_IN_EP	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_IN_EP	/;"	d
INT_IN_EP	drivers/usb/host/xhci.h	/^#define INT_IN_EP	/;"	d
INT_ISR_INT0	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT0	/;"	d
INT_ISR_INT1	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT1	/;"	d
INT_ISR_INT10	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT10	/;"	d
INT_ISR_INT11	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT11	/;"	d
INT_ISR_INT12	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT12	/;"	d
INT_ISR_INT13	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT13	/;"	d
INT_ISR_INT14	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT14	/;"	d
INT_ISR_INT15	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT15	/;"	d
INT_ISR_INT16	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT16	/;"	d
INT_ISR_INT17	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT17	/;"	d
INT_ISR_INT18	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT18	/;"	d
INT_ISR_INT19	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT19	/;"	d
INT_ISR_INT2	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT2	/;"	d
INT_ISR_INT20	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT20	/;"	d
INT_ISR_INT21	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT21	/;"	d
INT_ISR_INT22	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT22	/;"	d
INT_ISR_INT23	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT23	/;"	d
INT_ISR_INT24	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT24	/;"	d
INT_ISR_INT25	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT25	/;"	d
INT_ISR_INT26	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT26	/;"	d
INT_ISR_INT27	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT27	/;"	d
INT_ISR_INT28	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT28	/;"	d
INT_ISR_INT29	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT29	/;"	d
INT_ISR_INT3	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT3	/;"	d
INT_ISR_INT30	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT30	/;"	d
INT_ISR_INT31	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT31	/;"	d
INT_ISR_INT4	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT4	/;"	d
INT_ISR_INT5	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT5	/;"	d
INT_ISR_INT6	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT6	/;"	d
INT_ISR_INT7	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT7	/;"	d
INT_ISR_INT8	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT8	/;"	d
INT_ISR_INT9	arch/m68k/include/asm/m5272.h	/^#define INT_ISR_INT9	/;"	d
INT_L	arch/mips/include/asm/asm.h	/^#define INT_L	/;"	d
INT_MASK	drivers/net/ethoc.c	/^#define	INT_MASK	/;"	d	file:
INT_MASK_ALL	drivers/net/ethoc.c	/^#define	INT_MASK_ALL /;"	d	file:
INT_MASK_BUSY	drivers/net/ethoc.c	/^#define	INT_MASK_BUSY	/;"	d	file:
INT_MASK_RX	drivers/net/ethoc.c	/^#define	INT_MASK_RX	/;"	d	file:
INT_MASK_RXC	drivers/net/ethoc.c	/^#define	INT_MASK_RXC	/;"	d	file:
INT_MASK_RXE	drivers/net/ethoc.c	/^#define	INT_MASK_RXE	/;"	d	file:
INT_MASK_RXF	drivers/net/ethoc.c	/^#define	INT_MASK_RXF	/;"	d	file:
INT_MASK_TX	drivers/net/ethoc.c	/^#define	INT_MASK_TX	/;"	d	file:
INT_MASK_TXC	drivers/net/ethoc.c	/^#define	INT_MASK_TXC	/;"	d	file:
INT_MASK_TXE	drivers/net/ethoc.c	/^#define	INT_MASK_TXE	/;"	d	file:
INT_MASK_TXF	drivers/net/ethoc.c	/^#define	INT_MASK_TXF	/;"	d	file:
INT_MAX	include/linux/kernel.h	/^#define INT_MAX	/;"	d
INT_MIN	include/linux/kernel.h	/^#define INT_MIN	/;"	d
INT_MONITOR_CYCLE_COUNT	drivers/mtd/nand/denali.h	/^#define INT_MONITOR_CYCLE_COUNT /;"	d
INT_MON_CYCCNT	drivers/mtd/nand/denali.h	/^#define INT_MON_CYCCNT	/;"	d
INT_MON_CYCCNT__VALUE	drivers/mtd/nand/denali.h	/^#define     INT_MON_CYCCNT__VALUE	/;"	d
INT_NFIG	scripts/basic/fixdep.c	/^#define INT_NFIG /;"	d	file:
INT_NOT_GENERATED	arch/arm/mach-exynos/include/mach/adc.h	/^#define INT_NOT_GENERATED	/;"	d
INT_NP_TX_FIFO_EMPTY	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_NP_TX_FIFO_EMPTY	/;"	d
INT_ONFI	scripts/basic/fixdep.c	/^#define INT_ONFI /;"	d	file:
INT_ON_FY	include/sym53c8xx.h	/^#define INT_ON_FY	/;"	d
INT_OUT_EP	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_OUT_EP	/;"	d
INT_OUT_EP	drivers/usb/host/xhci.h	/^#define INT_OUT_EP	/;"	d
INT_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define INT_P	/;"	d
INT_PLIA	arch/m68k/include/asm/m5272.h	/^#define INT_PLIA	/;"	d
INT_PLIP	arch/m68k/include/asm/m5272.h	/^#define INT_PLIP	/;"	d
INT_POL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define INT_POL	/;"	d
INT_POL	arch/arm/mach-exynos/include/mach/dp.h	/^#define INT_POL	/;"	d
INT_QSPI	arch/m68k/include/asm/m5272.h	/^#define INT_QSPI	/;"	d
INT_RAM_SIZE	arch/m68k/include/asm/m5249.h	/^#define INT_RAM_SIZE /;"	d
INT_RAM_SIZE	arch/m68k/include/asm/m5272.h	/^#define INT_RAM_SIZE /;"	d
INT_RAM_SIZE	arch/m68k/include/asm/m5282.h	/^#define INT_RAM_SIZE	/;"	d
INT_RAM_SIZE	arch/m68k/include/asm/m5307.h	/^#define INT_RAM_SIZE /;"	d
INT_RAM_SIZE2	arch/m68k/include/asm/m5249.h	/^#define INT_RAM_SIZE2 /;"	d
INT_RBSYE	drivers/mmc/sh_mmcif.h	/^#define INT_RBSYE	/;"	d
INT_RBSYTO	drivers/mmc/sh_mmcif.h	/^#define INT_RBSYTO	/;"	d
INT_RDATERR	drivers/mmc/sh_mmcif.h	/^#define INT_RDATERR	/;"	d
INT_RDATTO	drivers/mmc/sh_mmcif.h	/^#define INT_RDATTO	/;"	d
INT_READ_OP_EN	drivers/mmc/mxcmmc.c	/^#define INT_READ_OP_EN	/;"	d	file:
INT_RESET	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_RESET	/;"	d
INT_RESUME	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_RESUME	/;"	d
INT_RIDXERR	drivers/mmc/sh_mmcif.h	/^#define INT_RIDXERR	/;"	d
INT_RSPERR	drivers/mmc/sh_mmcif.h	/^#define INT_RSPERR	/;"	d
INT_RSPTO	drivers/mmc/sh_mmcif.h	/^#define INT_RSPTO	/;"	d
INT_RSVD0	arch/m68k/include/asm/m5272.h	/^#define INT_RSVD0	/;"	d
INT_RX_FIFO_NOT_EMPTY	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_RX_FIFO_NOT_EMPTY	/;"	d
INT_S	arch/mips/include/asm/asm.h	/^#define INT_S	/;"	d
INT_SDIO_INT_WKP_EN	drivers/mmc/mxcmmc.c	/^#define INT_SDIO_INT_WKP_EN	/;"	d	file:
INT_SDIO_IRQ_EN	drivers/mmc/mxcmmc.c	/^#define INT_SDIO_IRQ_EN	/;"	d	file:
INT_SLL	arch/mips/include/asm/asm.h	/^#define INT_SLL	/;"	d
INT_SLLV	arch/mips/include/asm/asm.h	/^#define INT_SLLV	/;"	d
INT_SOF	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_SOF	/;"	d
INT_SOURCE	drivers/net/ethoc.c	/^#define	INT_SOURCE	/;"	d	file:
INT_SRA	arch/mips/include/asm/asm.h	/^#define INT_SRA	/;"	d
INT_SRAV	arch/mips/include/asm/asm.h	/^#define INT_SRAV	/;"	d
INT_SRL	arch/mips/include/asm/asm.h	/^#define INT_SRL	/;"	d
INT_SRLV	arch/mips/include/asm/asm.h	/^#define INT_SRLV	/;"	d
INT_START_MAGIC	drivers/mmc/sh_mmcif.h	/^#define INT_START_MAGIC	/;"	d
INT_STATUS	board/synopsys/axs10x/nand.c	/^	INT_STATUS = 0x118,	\/* interrupt status register *\/$/;"	e	enum:nand_regs_t	file:
INT_STAT_RDY	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define INT_STAT_RDY	/;"	d	file:
INT_STAT_TC	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define INT_STAT_TC	/;"	d	file:
INT_STA_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define INT_STA_MASK	/;"	d
INT_STS	drivers/net/smc911x.h	/^#define INT_STS	/;"	d
INT_STS	drivers/usb/eth/smsc95xx.c	/^#define INT_STS	/;"	d	file:
INT_STS1	include/power/rk808_pmic.h	/^	INT_STS1,$/;"	e	enum:__anon9b8afd0f0103
INT_STS2	include/power/rk808_pmic.h	/^	INT_STS2,$/;"	e	enum:__anon9b8afd0f0103
INT_STS_GPIO0_INT	drivers/net/smc911x.h	/^#define	INT_STS_GPIO0_INT	/;"	d
INT_STS_GPIO1_INT	drivers/net/smc911x.h	/^#define	INT_STS_GPIO1_INT	/;"	d
INT_STS_GPIO2_INT	drivers/net/smc911x.h	/^#define	INT_STS_GPIO2_INT	/;"	d
INT_STS_GPT_INT	drivers/net/smc911x.h	/^#define	INT_STS_GPT_INT	/;"	d
INT_STS_MSK1	include/power/rk808_pmic.h	/^	INT_STS_MSK1,$/;"	e	enum:__anon9b8afd0f0103
INT_STS_MSK2	include/power/rk808_pmic.h	/^	INT_STS_MSK2,$/;"	e	enum:__anon9b8afd0f0103
INT_STS_PHY_INT	drivers/net/smc911x.h	/^#define	INT_STS_PHY_INT	/;"	d
INT_STS_PME_INT	drivers/net/smc911x.h	/^#define	INT_STS_PME_INT	/;"	d
INT_STS_RDFL	drivers/net/smc911x.h	/^#define	INT_STS_RDFL	/;"	d
INT_STS_RDFO	drivers/net/smc911x.h	/^#define	INT_STS_RDFO	/;"	d
INT_STS_RSFF	drivers/net/smc911x.h	/^#define	INT_STS_RSFF	/;"	d
INT_STS_RSFL	drivers/net/smc911x.h	/^#define	INT_STS_RSFL	/;"	d
INT_STS_RWT	drivers/net/smc911x.h	/^#define	INT_STS_RWT	/;"	d
INT_STS_RXDFH_INT	drivers/net/smc911x.h	/^#define	INT_STS_RXDFH_INT	/;"	d
INT_STS_RXDF_INT	drivers/net/smc911x.h	/^#define	INT_STS_RXDF_INT	/;"	d
INT_STS_RXD_INT	drivers/net/smc911x.h	/^#define	INT_STS_RXD_INT	/;"	d
INT_STS_RXE	drivers/net/smc911x.h	/^#define	INT_STS_RXE	/;"	d
INT_STS_RXSTOP_INT	drivers/net/smc911x.h	/^#define	INT_STS_RXSTOP_INT	/;"	d
INT_STS_SW_INT	drivers/net/smc911x.h	/^#define	INT_STS_SW_INT	/;"	d
INT_STS_TDFA	drivers/net/smc911x.h	/^#define	INT_STS_TDFA	/;"	d
INT_STS_TDFO	drivers/net/smc911x.h	/^#define	INT_STS_TDFO	/;"	d
INT_STS_TDFU	drivers/net/smc911x.h	/^#define	INT_STS_TDFU	/;"	d
INT_STS_TSFF	drivers/net/smc911x.h	/^#define	INT_STS_TSFF	/;"	d
INT_STS_TSFL	drivers/net/smc911x.h	/^#define	INT_STS_TSFL	/;"	d
INT_STS_TXE	drivers/net/smc911x.h	/^#define	INT_STS_TXE	/;"	d
INT_STS_TXSO	drivers/net/smc911x.h	/^#define	INT_STS_TXSO	/;"	d
INT_STS_TXSTOP_INT	drivers/net/smc911x.h	/^#define	INT_STS_TXSTOP_INT	/;"	d
INT_STS_TX_IOC	drivers/net/smc911x.h	/^#define	INT_STS_TX_IOC	/;"	d
INT_SUB	arch/mips/include/asm/asm.h	/^#define INT_SUB	/;"	d
INT_SUBU	arch/mips/include/asm/asm.h	/^#define INT_SUBU	/;"	d
INT_SUSPEND	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define INT_SUSPEND	/;"	d
INT_SWTO	arch/m68k/include/asm/m5272.h	/^#define INT_SWTO	/;"	d
INT_TFF_CLR	include/linux/mtd/st_smi.h	/^#define INT_TFF_CLR	/;"	d
INT_TMR0	arch/m68k/include/asm/m5272.h	/^#define INT_TMR0	/;"	d
INT_TMR1	arch/m68k/include/asm/m5272.h	/^#define INT_TMR1	/;"	d
INT_TMR2	arch/m68k/include/asm/m5272.h	/^#define INT_TMR2	/;"	d
INT_TMR3	arch/m68k/include/asm/m5272.h	/^#define INT_TMR3	/;"	d
INT_TO	include/linux/mtd/samsung_onenand.h	/^#define INT_TO /;"	d
INT_UART1	arch/m68k/include/asm/m5272.h	/^#define INT_UART1	/;"	d
INT_UART2	arch/m68k/include/asm/m5272.h	/^#define INT_UART2	/;"	d
INT_USB0	arch/m68k/include/asm/m5272.h	/^#define INT_USB0	/;"	d
INT_USB1	arch/m68k/include/asm/m5272.h	/^#define INT_USB1	/;"	d
INT_USB2	arch/m68k/include/asm/m5272.h	/^#define INT_USB2	/;"	d
INT_USB3	arch/m68k/include/asm/m5272.h	/^#define INT_USB3	/;"	d
INT_USB4	arch/m68k/include/asm/m5272.h	/^#define INT_USB4	/;"	d
INT_USB5	arch/m68k/include/asm/m5272.h	/^#define INT_USB5	/;"	d
INT_USB6	arch/m68k/include/asm/m5272.h	/^#define INT_USB6	/;"	d
INT_USB7	arch/m68k/include/asm/m5272.h	/^#define INT_USB7	/;"	d
INT_WCF_CLR	include/linux/mtd/st_smi.h	/^#define INT_WCF_CLR	/;"	d
INT_WDATERR	drivers/mmc/sh_mmcif.h	/^#define INT_WDATERR	/;"	d
INT_WDATTO	drivers/mmc/sh_mmcif.h	/^#define INT_WDATTO	/;"	d
INT_WRITE_OP_DONE_EN	drivers/mmc/mxcmmc.c	/^#define INT_WRITE_OP_DONE_EN	/;"	d	file:
INUM_WARN_WATERMARK	fs/ubifs/ubifs.h	/^#define INUM_WARN_WATERMARK /;"	d
INUM_WATERMARK	fs/ubifs/ubifs.h	/^#define INUM_WATERMARK /;"	d
INVALIDLOCNEND	board/bf533-ezkit/flash-defines.h	/^#define INVALIDLOCNEND	/;"	d
INVALIDLOCNSTART	board/bf533-ezkit/flash-defines.h	/^#define INVALIDLOCNSTART	/;"	d
INVALID_BOARD_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define INVALID_BOARD_ID	/;"	d
INVALID_PATTERN	arch/arm/mach-exynos/include/mach/dp_info.h	/^	INVALID_PATTERN,$/;"	e	enum:pattern_type
INVALID_VALUE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define INVALID_VALUE	/;"	d
INVENTORYDATASIZE	board/keymile/common/ivm.c	/^#define INVENTORYDATASIZE	/;"	d	file:
INV_BLOCKSIZE	board/keymile/common/ivm.c	/^#define INV_BLOCKSIZE	/;"	d	file:
INV_DATAADDRESS	board/keymile/common/ivm.c	/^#define INV_DATAADDRESS	/;"	d	file:
INW	drivers/net/ax88180.h	/^static inline unsigned short INW (struct eth_device *dev, unsigned long addr)$/;"	f	typeref:typename:unsigned short
INW	drivers/net/eepro100.c	/^static inline int INW (struct eth_device *dev, u_long addr)$/;"	f	typeref:typename:int	file:
INW	drivers/net/natsemi.c	/^INW(struct eth_device *dev, u_long addr)$/;"	f	typeref:typename:int	file:
INW	drivers/net/ns8382x.c	/^INW(struct eth_device *dev, u_long addr)$/;"	f	typeref:typename:int	file:
IN_408_OUT_102_DIVISOR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	IN_408_OUT_102_DIVISOR = 6,$/;"	e	enum:__anon84cad1990203
IN_408_OUT_204_DIVISOR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	IN_408_OUT_204_DIVISOR = 2,$/;"	e	enum:__anon84cad1990203
IN_408_OUT_48_DIVISOR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	IN_408_OUT_48_DIVISOR = 15,$/;"	e	enum:__anon84cad1990203
IN_408_OUT_9_6_DIVISOR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	IN_408_OUT_9_6_DIVISOR = 83,$/;"	e	enum:__anon84cad1990203
IN_BPC_10_BITS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_BPC_10_BITS	/;"	d
IN_BPC_10_BITS	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_BPC_10_BITS	/;"	d
IN_BPC_12_BITS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_BPC_12_BITS	/;"	d
IN_BPC_12_BITS	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_BPC_12_BITS	/;"	d
IN_BPC_6_BITS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_BPC_6_BITS	/;"	d
IN_BPC_6_BITS	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_BPC_6_BITS	/;"	d
IN_BPC_8_BITS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_BPC_8_BITS	/;"	d
IN_BPC_8_BITS	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_BPC_8_BITS	/;"	d
IN_BPC_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_BPC_MASK	/;"	d
IN_BPC_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_BPC_MASK	/;"	d
IN_BPC_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_BPC_SHIFT	/;"	d
IN_BPC_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_BPC_SHIFT	/;"	d
IN_CLASSB_HOST	net/link_local.c	/^	IN_CLASSB_HOST = 0x0000ffff,$/;"	e	enum:__anonc9befdc40103	file:
IN_CLASSB_NET	net/link_local.c	/^	IN_CLASSB_NET = 0xffff0000,$/;"	e	enum:__anonc9befdc40103	file:
IN_COLOR_F_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_COLOR_F_MASK	/;"	d
IN_COLOR_F_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_COLOR_F_MASK	/;"	d
IN_COLOR_F_RGB	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_COLOR_F_RGB	/;"	d
IN_COLOR_F_RGB	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_COLOR_F_RGB	/;"	d
IN_COLOR_F_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_COLOR_F_SHIFT	/;"	d
IN_COLOR_F_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_COLOR_F_SHIFT	/;"	d
IN_COLOR_F_YCBCR422	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_COLOR_F_YCBCR422	/;"	d
IN_COLOR_F_YCBCR422	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_COLOR_F_YCBCR422	/;"	d
IN_COLOR_F_YCBCR444	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_COLOR_F_YCBCR444	/;"	d
IN_COLOR_F_YCBCR444	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_COLOR_F_YCBCR444	/;"	d
IN_DELAY	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define IN_DELAY	/;"	d
IN_D_RANGE_CEA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_D_RANGE_CEA	/;"	d
IN_D_RANGE_CEA	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_D_RANGE_CEA	/;"	d
IN_D_RANGE_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_D_RANGE_MASK	/;"	d
IN_D_RANGE_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_D_RANGE_MASK	/;"	d
IN_D_RANGE_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_D_RANGE_SHIFT	/;"	d
IN_D_RANGE_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_D_RANGE_SHIFT	/;"	d
IN_D_RANGE_VESA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_D_RANGE_VESA	/;"	d
IN_D_RANGE_VESA	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_D_RANGE_VESA	/;"	d
IN_YC_COEFFI_ITU601	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_YC_COEFFI_ITU601	/;"	d
IN_YC_COEFFI_ITU601	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_YC_COEFFI_ITU601	/;"	d
IN_YC_COEFFI_ITU709	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_YC_COEFFI_ITU709	/;"	d
IN_YC_COEFFI_ITU709	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_YC_COEFFI_ITU709	/;"	d
IN_YC_COEFFI_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_YC_COEFFI_MASK	/;"	d
IN_YC_COEFFI_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_YC_COEFFI_MASK	/;"	d
IN_YC_COEFFI_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define IN_YC_COEFFI_SHIFT	/;"	d
IN_YC_COEFFI_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define IN_YC_COEFFI_SHIFT	/;"	d
IO2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IO2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,$/;"	e	enum:__anona3077f190103	file:
IO2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,$/;"	e	enum:__anona307879b0103	file:
IO3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IO3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,$/;"	e	enum:__anona3077f190103	file:
IO3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,$/;"	e	enum:__anona307879b0103	file:
IOADDR	arch/xtensa/include/asm/addrspace.h	/^#define IOADDR(/;"	d
IOBPD	arch/x86/cpu/broadwell/iobp.c	/^#define IOBPD	/;"	d	file:
IOBPD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOBPD	/;"	d
IOBPIRI	arch/x86/cpu/broadwell/iobp.c	/^#define IOBPIRI	/;"	d	file:
IOBPIRI	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOBPIRI	/;"	d
IOBPS	arch/x86/cpu/broadwell/iobp.c	/^#define IOBPS	/;"	d	file:
IOBPS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOBPS	/;"	d
IOBPS_MASK	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBPS_MASK /;"	d	file:
IOBPS_READ	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBPS_READ /;"	d	file:
IOBPS_READY	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBPS_READY	/;"	d	file:
IOBPS_READ_AX	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define  IOBPS_READ_AX	/;"	d
IOBPS_RW_BX	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define  IOBPS_RW_BX /;"	d
IOBPS_TX_MASK	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBPS_TX_MASK	/;"	d	file:
IOBPS_WRITE	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBPS_WRITE	/;"	d	file:
IOBPS_WRITE_AX	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define  IOBPS_WRITE_AX	/;"	d
IOBPU	arch/x86/cpu/broadwell/iobp.c	/^#define IOBPU	/;"	d	file:
IOBPU_MAGIC	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBPU_MAGIC	/;"	d	file:
IOBP_PCICFG_READ	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBP_PCICFG_READ	/;"	d	file:
IOBP_PCICFG_WRITE	arch/x86/cpu/broadwell/iobp.c	/^#define  IOBP_PCICFG_WRITE	/;"	d	file:
IOBP_RETRY	arch/x86/cpu/broadwell/iobp.c	/^#define IOBP_RETRY /;"	d	file:
IOBP_RETRY	arch/x86/cpu/ivybridge/bd82x6x.c	/^#define IOBP_RETRY /;"	d	file:
IOBUS_FREQ	drivers/i2c/i2c-uniphier.c	/^#define IOBUS_FREQ	/;"	d	file:
IOCR_2XC	arch/powerpc/include/asm/processor.h	/^#define   IOCR_2XC	/;"	d
IOCR_ARE	arch/powerpc/include/asm/processor.h	/^#define   IOCR_ARE	/;"	d
IOCR_ATC	arch/powerpc/include/asm/processor.h	/^#define   IOCR_ATC	/;"	d
IOCR_BEM	arch/powerpc/include/asm/processor.h	/^#define   IOCR_BEM	/;"	d
IOCR_DRC	arch/powerpc/include/asm/processor.h	/^#define   IOCR_DRC	/;"	d
IOCR_E0LP	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E0LP	/;"	d
IOCR_E0TE	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E0TE	/;"	d
IOCR_E1LP	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E1LP	/;"	d
IOCR_E1TE	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E1TE	/;"	d
IOCR_E2LP	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E2LP	/;"	d
IOCR_E2TE	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E2TE	/;"	d
IOCR_E3LP	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E3LP	/;"	d
IOCR_E3TE	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E3TE	/;"	d
IOCR_E4LP	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E4LP	/;"	d
IOCR_E4TE	arch/powerpc/include/asm/processor.h	/^#define   IOCR_E4TE	/;"	d
IOCR_EDO	arch/powerpc/include/asm/processor.h	/^#define   IOCR_EDO	/;"	d
IOCR_EDT	arch/powerpc/include/asm/processor.h	/^#define   IOCR_EDT	/;"	d
IOCR_PTD	arch/powerpc/include/asm/processor.h	/^#define   IOCR_PTD	/;"	d
IOCR_RDM	arch/powerpc/include/asm/processor.h	/^#define   IOCR_RDM(/;"	d
IOCR_SCS	arch/powerpc/include/asm/processor.h	/^#define   IOCR_SCS	/;"	d
IOCR_SOR	arch/powerpc/include/asm/processor.h	/^#define   IOCR_SOR	/;"	d
IOCR_SPC	arch/powerpc/include/asm/processor.h	/^#define   IOCR_SPC	/;"	d
IOCR_SPD	arch/powerpc/include/asm/processor.h	/^#define   IOCR_SPD	/;"	d
IOCR_TCS	arch/powerpc/include/asm/processor.h	/^#define   IOCR_TCS	/;"	d
IOCSIZE_MASK	include/asm-generic/ioctl.h	/^#define IOCSIZE_MASK	/;"	d
IOCSIZE_SHIFT	include/asm-generic/ioctl.h	/^#define IOCSIZE_SHIFT	/;"	d
IOC_IN	include/asm-generic/ioctl.h	/^#define IOC_IN	/;"	d
IOC_INOUT	include/asm-generic/ioctl.h	/^#define IOC_INOUT	/;"	d
IOC_OUT	include/asm-generic/ioctl.h	/^#define IOC_OUT	/;"	d
IODDRM_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define IODDRM_MASK /;"	d
IODIRA	board/bf609-ezkit/soft_switch.h	/^#define IODIRA /;"	d
IODIRB	board/bf609-ezkit/soft_switch.h	/^#define IODIRB /;"	d
IOEXP_I2C_ADDR	drivers/usb/musb/davinci.h	/^#define IOEXP_I2C_ADDR /;"	d
IOEXP_VBUSEN_MASK	drivers/usb/musb/davinci.h	/^#define IOEXP_VBUSEN_MASK /;"	d
IOIS16_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IOIS16_MARK, \/* ? *\/$/;"	e	enum:__anona304c1340103	file:
IOMUXA_ADDR0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR0	= 1,$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR16	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR16	= (1 << 1),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR17	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR17	= (1 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR18	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR18	= (1 << 3),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR19	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR19	= (1 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR20	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR20	= (1 << 5),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR21	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR21	= (1 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR22	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR22	= (1 << 7),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR23	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR23	= (1 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR24	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR24	= (1 << 9),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR25	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR25	= (1 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ADDR26	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ADDR26	= (1 << 11),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_ALE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_ALE	= (1 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_CLE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_CLE	= (1 << 17),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nFCE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nFCE		= (1 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nFRE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nFRE	= (1 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nFWE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nFWE	= (1 << 19),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nGCS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nGCS1	= (1 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nGCS2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nGCS2	= (1 << 13),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nGCS3	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nGCS3	= (1 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nGCS4	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nGCS4	= (1 << 15),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nGCS5	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nGCS5	= (1 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXA_nRSTOUT	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXA_nRSTOUT	= (1 << 21),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_TCLK0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_TCLK0	= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_TOUT0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_TOUT0	= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXB_TOUT1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_TOUT1	= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_TOUT2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_TOUT2	= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_TOUT3	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_TOUT3	= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_nXBACK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_nXBACK	= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_nXBREQ	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_nXBREQ	= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_nXDACK0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_nXDACK0	= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_nXDACK1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_nXDACK1	= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_nXDREQ0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_nXDREQ0	= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXB_nXDREQ1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXB_nXDREQ1	= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_BASE	/;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define IOMUXC_BASE_ADDR	/;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IOMUXC_BASE_ADDR /;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IOMUXC_BASE_ADDR	/;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_BASE_ADDR /;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_BASE_ADDR /;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define IOMUXC_BASE_ADDR /;"	d
IOMUXC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define IOMUXC_BASE_ADDR	/;"	d
IOMUXC_CONFIG_SION	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define IOMUXC_CONFIG_SION	/;"	d
IOMUXC_GPR11_L2CACHE_AS_OCRAM	arch/arm/imx-common/cache.c	/^#define IOMUXC_GPR11_L2CACHE_AS_OCRAM /;"	d	file:
IOMUXC_GPR12_APPS_LTSSM_ENABLE	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_APPS_LTSSM_ENABLE	/;"	d
IOMUXC_GPR12_ARMP_AHB_CLK_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_ARMP_AHB_CLK_EN	/;"	d
IOMUXC_GPR12_ARMP_APB_CLK_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_ARMP_APB_CLK_EN	/;"	d
IOMUXC_GPR12_ARMP_ATB_CLK_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_ARMP_ATB_CLK_EN	/;"	d
IOMUXC_GPR12_ARMP_IPG_CLK_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_ARMP_IPG_CLK_EN	/;"	d
IOMUXC_GPR12_DEVICE_TYPE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_DEVICE_TYPE	/;"	d
IOMUXC_GPR12_DEVICE_TYPE_EP	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_DEVICE_TYPE_EP	/;"	d
IOMUXC_GPR12_DEVICE_TYPE_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_DEVICE_TYPE_MASK	/;"	d
IOMUXC_GPR12_DEVICE_TYPE_RC	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_DEVICE_TYPE_RC	/;"	d
IOMUXC_GPR12_LOS_LEVEL	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_LOS_LEVEL	/;"	d
IOMUXC_GPR12_LOS_LEVEL_9	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_LOS_LEVEL_9	/;"	d
IOMUXC_GPR12_LOS_LEVEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_LOS_LEVEL_MASK	/;"	d
IOMUXC_GPR12_PCIE_CTL_2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR12_PCIE_CTL_2	/;"	d
IOMUXC_GPR12_RX_EQ_2	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_RX_EQ_2	/;"	d
IOMUXC_GPR12_RX_EQ_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_RX_EQ_MASK	/;"	d
IOMUXC_GPR12_TEST_POWERDOWN	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR12_TEST_POWERDOWN	/;"	d
IOMUXC_GPR13_CAN1_STOP_REQ	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_CAN1_STOP_REQ	/;"	d
IOMUXC_GPR13_CAN2_STOP_REQ	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_CAN2_STOP_REQ	/;"	d
IOMUXC_GPR13_ENET_STOP_REQ	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_ENET_STOP_REQ	/;"	d
IOMUXC_GPR13_SATA_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_MASK /;"	d
IOMUXC_GPR13_SATA_PHY_1_FAST	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_1_FAST	/;"	d
IOMUXC_GPR13_SATA_PHY_1_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_1_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_1_MEDIUM	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_1_MEDIUM	/;"	d
IOMUXC_GPR13_SATA_PHY_1_SLOW	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_1_SLOW	/;"	d
IOMUXC_GPR13_SATA_PHY_2_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P937V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P947V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P957V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P966V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P976V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P986V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_0P996V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P005V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P015V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P025V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P035V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P045V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P054V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P064V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P074V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P084V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P094V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P104V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P113V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P123V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P133V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P143V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P152V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P162V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P172V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P182V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P191V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P201V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P211V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P221V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P230V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V	/;"	d
IOMUXC_GPR13_SATA_PHY_2_TX_1P240V	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V	/;"	d
IOMUXC_GPR13_SATA_PHY_3_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB	/;"	d
IOMUXC_GPR13_SATA_PHY_4_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_4_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_5_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_5_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_6_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_6_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_6_SHIFT	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_6_SHIFT	/;"	d
IOMUXC_GPR13_SATA_PHY_7_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_7_SATA1I	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_SATA1I	/;"	d
IOMUXC_GPR13_SATA_PHY_7_SATA1M	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_SATA1M	/;"	d
IOMUXC_GPR13_SATA_PHY_7_SATA1X	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_SATA1X	/;"	d
IOMUXC_GPR13_SATA_PHY_7_SATA2I	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_SATA2I	/;"	d
IOMUXC_GPR13_SATA_PHY_7_SATA2M	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_SATA2M	/;"	d
IOMUXC_GPR13_SATA_PHY_7_SATA2X	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_7_SATA2X	/;"	d
IOMUXC_GPR13_SATA_PHY_8_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_MASK	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB	/;"	d
IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_10_16	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_10_16	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_14_16	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_14_16	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_16_16	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_16_16	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED	/;"	d
IOMUXC_GPR13_SATA_SATA_PHY_5_SS_ENABLED	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_ENABLED	/;"	d
IOMUXC_GPR13_SATA_SPEED_1P5G	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SPEED_1P5G	/;"	d
IOMUXC_GPR13_SATA_SPEED_3G	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SPEED_3G	/;"	d
IOMUXC_GPR13_SATA_SPEED_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SATA_SPEED_MASK	/;"	d
IOMUXC_GPR13_SDMA_STOP_REQ	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR13_SDMA_STOP_REQ	/;"	d
IOMUXC_GPR1_ACT_CS0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ACT_CS0	/;"	d
IOMUXC_GPR1_ACT_CS1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ACT_CS1	/;"	d
IOMUXC_GPR1_ACT_CS2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ACT_CS2	/;"	d
IOMUXC_GPR1_ACT_CS3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ACT_CS3	/;"	d
IOMUXC_GPR1_ADDRS0_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS0_MASK	/;"	d
IOMUXC_GPR1_ADDRS0_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS0_OFFSET	/;"	d
IOMUXC_GPR1_ADDRS1_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS1_MASK	/;"	d
IOMUXC_GPR1_ADDRS2_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS2_MASK	/;"	d
IOMUXC_GPR1_ADDRS3_128MB	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS3_128MB	/;"	d
IOMUXC_GPR1_ADDRS3_32MB	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS3_32MB	/;"	d
IOMUXC_GPR1_ADDRS3_64MB	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS3_64MB	/;"	d
IOMUXC_GPR1_ADDRS3_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ADDRS3_MASK	/;"	d
IOMUXC_GPR1_APP_CLK_REQ_N	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_APP_CLK_REQ_N	/;"	d
IOMUXC_GPR1_DPI_OFF	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_DPI_OFF	/;"	d
IOMUXC_GPR1_ENET_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ENET_CLK_SEL_MASK	/;"	d
IOMUXC_GPR1_ENET_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET	/;"	d
IOMUXC_GPR1_EXC_MON_SLVE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_EXC_MON_SLVE	/;"	d
IOMUXC_GPR1_GINT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_GINT	/;"	d
IOMUXC_GPR1_IPU_VPU_MUX_IPU2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_IPU_VPU_MUX_IPU2	/;"	d
IOMUXC_GPR1_MIPI_COLOR_SW	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_MIPI_COLOR_SW	/;"	d
IOMUXC_GPR1_MIPI_IPU1_MUX_IOMUX	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_MIPI_IPU1_MUX_IOMUX	/;"	d
IOMUXC_GPR1_MIPI_IPU2_MUX_IOMUX	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_MIPI_IPU2_MUX_IOMUX	/;"	d
IOMUXC_GPR1_OTG_ID_ENET_RX_ERR	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR1_OTG_ID_ENET_RX_ERR	/;"	d
IOMUXC_GPR1_OTG_ID_GPIO1	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR1_OTG_ID_GPIO1	/;"	d
IOMUXC_GPR1_OTG_ID_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR1_OTG_ID_MASK	/;"	d
IOMUXC_GPR1_PCIE_ENTER_L1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_PCIE_ENTER_L1	/;"	d
IOMUXC_GPR1_PCIE_EXIT_L1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_PCIE_EXIT_L1	/;"	d
IOMUXC_GPR1_PCIE_INT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_PCIE_INT	/;"	d
IOMUXC_GPR1_PCIE_RDY_L23	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_PCIE_RDY_L23	/;"	d
IOMUXC_GPR1_PCIE_REF_CLK_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_PCIE_REF_CLK_EN	/;"	d
IOMUXC_GPR1_PCIE_SW_RST	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR1_PCIE_SW_RST	/;"	d
IOMUXC_GPR1_PCIE_TEST_PD	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_PCIE_TEST_PD	/;"	d
IOMUXC_GPR1_REF_SSP_EN	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR1_REF_SSP_EN	/;"	d
IOMUXC_GPR1_TEST_POWERDOWN	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR1_TEST_POWERDOWN	/;"	d
IOMUXC_GPR1_USB_EXP_MODE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_USB_EXP_MODE	/;"	d
IOMUXC_GPR1_USB_OTG_ID_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_USB_OTG_ID_OFFSET	/;"	d
IOMUXC_GPR1_USB_OTG_ID_SEL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK	/;"	d
IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES	/;"	d
IOMUXC_GPR2_BGREF_RRMODE_INTERNAL_RES	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BGREF_RRMODE_INTERNAL_RES	/;"	d
IOMUXC_GPR2_BGREF_RRMODE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BGREF_RRMODE_MASK	/;"	d
IOMUXC_GPR2_BGREF_RRMODE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BGREF_RRMODE_OFFSET	/;"	d
IOMUXC_GPR2_BITMAP_JEIDA	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BITMAP_JEIDA	/;"	d
IOMUXC_GPR2_BITMAP_SPWG	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BITMAP_SPWG	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH0_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH0_MASK	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH1_JEIDA	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH1_JEIDA	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH1_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH1_MASK	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH1_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH1_OFFSET	/;"	d
IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG	/;"	d
IOMUXC_GPR2_COUNTER_RESET_VAL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_COUNTER_RESET_VAL_MASK	/;"	d
IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET	/;"	d
IOMUXC_GPR2_DATA_WIDTH_18	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_18	/;"	d
IOMUXC_GPR2_DATA_WIDTH_24	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_24	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH0_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH0_MASK	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH1_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH1_MASK	/;"	d
IOMUXC_GPR2_DATA_WIDTH_CH1_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DATA_WIDTH_CH1_OFFSET	/;"	d
IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_HIGH	/;"	d
IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW	/;"	d
IOMUXC_GPR2_DI0_VS_POLARITY_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI0_VS_POLARITY_MASK	/;"	d
IOMUXC_GPR2_DI0_VS_POLARITY_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI0_VS_POLARITY_OFFSET	/;"	d
IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH	/;"	d
IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW	/;"	d
IOMUXC_GPR2_DI1_VS_POLARITY_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI1_VS_POLARITY_MASK	/;"	d
IOMUXC_GPR2_DI1_VS_POLARITY_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_DI1_VS_POLARITY_OFFSET	/;"	d
IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED	/;"	d
IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0	/;"	d
IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI1	/;"	d
IOMUXC_GPR2_LVDS_CH0_MODE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH0_MODE_MASK	/;"	d
IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET	/;"	d
IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED	/;"	d
IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0	/;"	d
IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI1	/;"	d
IOMUXC_GPR2_LVDS_CH1_MODE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH1_MODE_MASK	/;"	d
IOMUXC_GPR2_LVDS_CH1_MODE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CH1_MODE_OFFSET	/;"	d
IOMUXC_GPR2_LVDS_CLK_SHIFT_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CLK_SHIFT_MASK	/;"	d
IOMUXC_GPR2_LVDS_CLK_SHIFT_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_LVDS_CLK_SHIFT_OFFSET	/;"	d
IOMUXC_GPR2_MODE_DISABLED	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_MODE_DISABLED	/;"	d
IOMUXC_GPR2_MODE_ENABLED_DI0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_MODE_ENABLED_DI0	/;"	d
IOMUXC_GPR2_MODE_ENABLED_DI1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_MODE_ENABLED_DI1	/;"	d
IOMUXC_GPR2_SPLIT_MODE_EN_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_SPLIT_MODE_EN_MASK	/;"	d
IOMUXC_GPR2_SPLIT_MODE_EN_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_SPLIT_MODE_EN_OFFSET	/;"	d
IOMUXC_GPR2_VSYNC_ACTIVE_HIGH	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_VSYNC_ACTIVE_HIGH	/;"	d
IOMUXC_GPR2_VSYNC_ACTIVE_LOW	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR2_VSYNC_ACTIVE_LOW	/;"	d
IOMUXC_GPR3_BCH_RD_CACHE_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_BCH_RD_CACHE_CTL_MASK	/;"	d
IOMUXC_GPR3_BCH_RD_CACHE_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_BCH_RD_CACHE_CTL_OFFSET	/;"	d
IOMUXC_GPR3_BCH_WR_CACHE_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_BCH_WR_CACHE_CTL_MASK	/;"	d
IOMUXC_GPR3_BCH_WR_CACHE_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_BCH_WR_CACHE_CTL_OFFSET	/;"	d
IOMUXC_GPR3_CORE0_DBG_ACK_EN_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE0_DBG_ACK_EN_MASK	/;"	d
IOMUXC_GPR3_CORE0_DBG_ACK_EN_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE0_DBG_ACK_EN_OFFSET	/;"	d
IOMUXC_GPR3_CORE1_DBG_ACK_EN_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE1_DBG_ACK_EN_MASK	/;"	d
IOMUXC_GPR3_CORE1_DBG_ACK_EN_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE1_DBG_ACK_EN_OFFSET	/;"	d
IOMUXC_GPR3_CORE2_DBG_ACK_EN_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE2_DBG_ACK_EN_MASK	/;"	d
IOMUXC_GPR3_CORE2_DBG_ACK_EN_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE2_DBG_ACK_EN_OFFSET	/;"	d
IOMUXC_GPR3_CORE3_DBG_ACK_EN_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE3_DBG_ACK_EN_MASK	/;"	d
IOMUXC_GPR3_CORE3_DBG_ACK_EN_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_CORE3_DBG_ACK_EN_OFFSET	/;"	d
IOMUXC_GPR3_GPU_DBG_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_GPU_DBG_MASK	/;"	d
IOMUXC_GPR3_GPU_DBG_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_GPU_DBG_OFFSET	/;"	d
IOMUXC_GPR3_HDMI_MUX_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_HDMI_MUX_CTL_MASK	/;"	d
IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET	/;"	d
IOMUXC_GPR3_IPU_DIAG_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_IPU_DIAG_MASK	/;"	d
IOMUXC_GPR3_IPU_DIAG_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_IPU_DIAG_OFFSET	/;"	d
IOMUXC_GPR3_LVDS0_MUX_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_LVDS0_MUX_CTL_MASK	/;"	d
IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET	/;"	d
IOMUXC_GPR3_LVDS1_MUX_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_LVDS1_MUX_CTL_MASK	/;"	d
IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET	/;"	d
IOMUXC_GPR3_MIPI_MUX_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_MIPI_MUX_CTL_MASK	/;"	d
IOMUXC_GPR3_MIPI_MUX_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_MIPI_MUX_CTL_OFFSET	/;"	d
IOMUXC_GPR3_MUX_SRC_IPU1_DI0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_MUX_SRC_IPU1_DI0	/;"	d
IOMUXC_GPR3_MUX_SRC_IPU1_DI1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_MUX_SRC_IPU1_DI1	/;"	d
IOMUXC_GPR3_MUX_SRC_IPU2_DI0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_MUX_SRC_IPU2_DI0	/;"	d
IOMUXC_GPR3_MUX_SRC_IPU2_DI1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_MUX_SRC_IPU2_DI1	/;"	d
IOMUXC_GPR3_OCRAM_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_OCRAM_CTL_MASK	/;"	d
IOMUXC_GPR3_OCRAM_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_OCRAM_CTL_OFFSET	/;"	d
IOMUXC_GPR3_OCRAM_STATUS_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_OCRAM_STATUS_MASK	/;"	d
IOMUXC_GPR3_OCRAM_STATUS_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_OCRAM_STATUS_OFFSET	/;"	d
IOMUXC_GPR3_TZASC1_BOOT_LOCK_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_TZASC1_BOOT_LOCK_MASK	/;"	d
IOMUXC_GPR3_TZASC1_BOOT_LOCK_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_TZASC1_BOOT_LOCK_OFFSET	/;"	d
IOMUXC_GPR3_TZASC2_BOOT_LOCK_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_TZASC2_BOOT_LOCK_MASK	/;"	d
IOMUXC_GPR3_TZASC2_BOOT_LOCK_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_TZASC2_BOOT_LOCK_OFFSET	/;"	d
IOMUXC_GPR3_uSDHCx_RD_CACHE_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_uSDHCx_RD_CACHE_CTL_MASK	/;"	d
IOMUXC_GPR3_uSDHCx_RD_CACHE_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_uSDHCx_RD_CACHE_CTL_OFFSET	/;"	d
IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_MASK	/;"	d
IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_OFFSET	/;"	d
IOMUXC_GPR5_PCIE_BTNRST	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR5_PCIE_BTNRST	/;"	d
IOMUXC_GPR5_PCIE_PERST	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR5_PCIE_PERST	/;"	d
IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1_MASK	/;"	d
IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1_OFFSET	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1_OFFSET	/;"	d
IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_MASK	/;"	d
IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_OFFSET	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_OFFSET	/;"	d
IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB_MASK	/;"	d
IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB_OFFSET	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB_OFFSET	/;"	d
IOMUXC_GPR8_PCS_TX_SWING_FULL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_SWING_FULL_MASK	/;"	d
IOMUXC_GPR8_PCS_TX_SWING_FULL_OFFSET	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_SWING_FULL_OFFSET	/;"	d
IOMUXC_GPR8_PCS_TX_SWING_LOW_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_SWING_LOW_MASK	/;"	d
IOMUXC_GPR8_PCS_TX_SWING_LOW_OFFSET	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUXC_GPR8_PCS_TX_SWING_LOW_OFFSET	/;"	d
IOMUXC_GPR_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_BASE_ADDR /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_SHIFT /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL1_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL1_SHIFT /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL2_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL2_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL2_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL2_SHIFT /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL3_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL3_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL3_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL3_SHIFT /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL4_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL4_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL4_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL4_SHIFT /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_SHIFT /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_MASK /;"	d
IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_SHIFT /;"	d
IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK /;"	d
IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_SHIFT /;"	d
IOMUXC_GPR_GPR10_GPR0_BF0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR0_BF0_MASK /;"	d
IOMUXC_GPR_GPR10_GPR0_BF0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR0_BF0_SHIFT /;"	d
IOMUXC_GPR_GPR10_GPR_DBG_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_DBG_EN_MASK /;"	d
IOMUXC_GPR_GPR10_GPR_DBG_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_DBG_EN_SHIFT /;"	d
IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION0_MASK /;"	d
IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION0_SHIFT /;"	d
IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION1(/;"	d
IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION1_MASK /;"	d
IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_OCRAM_CTRL_EPDC_OCRAM_TZ_SECURE_REGION1_SHIFT /;"	d
IOMUXC_GPR_GPR10_GPR_SEC_ERR_RESP_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_SEC_ERR_RESP_EN_MASK /;"	d
IOMUXC_GPR_GPR10_GPR_SEC_ERR_RESP_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR10_GPR_SEC_ERR_RESP_EN_SHIFT /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION0_MASK /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION0_SHIFT /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION1(/;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION1_MASK /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_OCRAM_TZ_SECURE_REGION1_SHIFT /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION0_MASK /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION0_SHIFT /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION1(/;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION1_MASK /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_PXP_OCRAM_TZ_SECURE_REGION1_SHIFT /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION0_MASK /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION0_SHIFT /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION1(/;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION1_MASK /;"	d
IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR11_GPR_OCRAM_CTRL_S_OCRAM_TZ_SECURE_REGION1_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DEVICE_TYPE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DEVICE_TYPE(/;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DEVICE_TYPE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DEVICE_TYPE_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DEVICE_TYPE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DEVICE_TYPE_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_CTRL_BUS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_CTRL_BUS(/;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_CTRL_BUS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_CTRL_BUS_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_CTRL_BUS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_CTRL_BUS_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_STATUS_BUS_SELECT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_STATUS_BUS_SELECT(/;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_STATUS_BUS_SELECT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_STATUS_BUS_SELECT_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_STATUS_BUS_SELECT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_CTRL_DIAG_STATUS_BUS_SELECT_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_CMN_REG_RST_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_CMN_REG_RST_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_CMN_REG_RST_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_CMN_REG_RST_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_REFCLK_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_REFCLK_SEL_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_REFCLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_REFCLK_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_SSC_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_SSC_EN_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_SSC_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_SSC_EN_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_REG_RST_CH0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_REG_RST_CH0_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_REG_RST_CH0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_REG_RST_CH0_SHIFT /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_RST_CH0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_RST_CH0_MASK /;"	d
IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_RST_CH0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR12_GPR_PCIE_PHY_TRSV_RST_CH0_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_EPDC_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_LCDIF_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PCIE_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_PXP_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_USDHC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_USDHC_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_ARCACHE_USDHC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_ARCACHE_USDHC_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_EPDC_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PCIE_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_EN_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_EN_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_PXP_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_USDHC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_USDHC_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_AWCACHE_USDHC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_AWCACHE_USDHC_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_AFC_CODE_OUT_CH0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_AFC_CODE_OUT_CH0(/;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_AFC_CODE_OUT_CH0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_AFC_CODE_OUT_CH0_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_AFC_CODE_OUT_CH0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_AFC_CODE_OUT_CH0_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_CDR_VCO_MON_CH0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_CDR_VCO_MON_CH0_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_CDR_VCO_MON_CH0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_CDR_VCO_MON_CH0_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PCS_REFCLK_DISABLE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PCS_REFCLK_DISABLE_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PCS_REFCLK_DISABLE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PCS_REFCLK_DISABLE_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_CDR_LOCKED_CH0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_CDR_LOCKED_CH0_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_CDR_LOCKED_CH0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_CDR_LOCKED_CH0_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_RX_PRESENT_CH0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_RX_PRESENT_CH0_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_RX_PRESENT_CH0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_PMA_RX_PRESENT_CH0_SHIFT /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_VCO_BAND	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_VCO_BAND(/;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_VCO_BAND_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_VCO_BAND_MASK /;"	d
IOMUXC_GPR_GPR13_GPR_PCIE_PHY_VCO_BAND_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR13_GPR_PCIE_PHY_VCO_BAND_SHIFT /;"	d
IOMUXC_GPR_GPR14_GPR_SIM1_SIMV2_EMV_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR14_GPR_SIM1_SIMV2_EMV_SEL_MASK /;"	d
IOMUXC_GPR_GPR14_GPR_SIM1_SIMV2_EMV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR14_GPR_SIM1_SIMV2_EMV_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR14_GPR_SIM2_SIMV2_EMV_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR14_GPR_SIM2_SIMV2_EMV_SEL_MASK /;"	d
IOMUXC_GPR_GPR14_GPR_SIM2_SIMV2_EMV_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR14_GPR_SIM2_SIMV2_EMV_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_AUTO_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_AUTO_SEL_MASK /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_AUTO_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_AUTO_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_DESKEW_CNT_SET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_DESKEW_CNT_SET(/;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_DESKEW_CNT_SET_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_DESKEW_CNT_SET_MASK /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_DESKEW_CNT_SET_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_DESKEW_CNT_SET_SHIFT /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_LOCK_PPM_SET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_LOCK_PPM_SET(/;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_LOCK_PPM_SET_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_LOCK_PPM_SET_MASK /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_LOCK_PPM_SET_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_LOCK_PPM_SET_SHIFT /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_VBLK_FLAG_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_VBLK_FLAG_MASK /;"	d
IOMUXC_GPR_GPR15_GPR_LVDS_I_VBLK_FLAG_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR15_GPR_LVDS_I_VBLK_FLAG_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_AUTO_DSK_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_AUTO_DSK_SEL_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_AUTO_DSK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_AUTO_DSK_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_CNT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_CNT(/;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_CNT_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_CNT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_CNT_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_MODE_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_MODE_SEL_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_MODE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNNCT_MODE_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNTB_TDLY_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNTB_TDLY_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_CNTB_TDLY_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_CNTB_TDLY_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_FC_CODE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_FC_CODE(/;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_FC_CODE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_FC_CODE_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_FC_CODE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_FC_CODE_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_FLT_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_FLT_CNT_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_FLT_CNT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_FLT_CNT_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_LOCK_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_LOCK_CNT_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_LOCK_CNT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_LOCK_CNT_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_OUTCON_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_OUTCON_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_OUTCON_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_OUTCON_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SEL_DATABF_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SEL_DATABF_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SEL_DATABF_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SEL_DATABF_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEWINI_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEWINI_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEWINI_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEWINI_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_EN_H_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_EN_H_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_EN_H_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_EN_H_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_REG_CUR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_REG_CUR(/;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_REG_CUR_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_REG_CUR_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_REG_CUR_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SKEW_REG_CUR_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SK_BIAS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SK_BIAS(/;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SK_BIAS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SK_BIAS_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SK_BIAS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SK_BIAS_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SRC_TRH_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SRC_TRH_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_SRC_TRH_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_SRC_TRH_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_VOD_HIGH_S_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_VOD_HIGH_S_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_VOD_HIGH_S_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_VOD_HIGH_S_SHIFT /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_VOD_ONLY_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_VOD_ONLY_CNT_MASK /;"	d
IOMUXC_GPR_GPR16_GPR_LVDS_VOD_ONLY_CNT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR16_GPR_LVDS_VOD_ONLY_CNT_SHIFT /;"	d
IOMUXC_GPR_GPR17_GPR_LVDS_CNT_PEN_H	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR17_GPR_LVDS_CNT_PEN_H(/;"	d
IOMUXC_GPR_GPR17_GPR_LVDS_CNT_PEN_H_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR17_GPR_LVDS_CNT_PEN_H_MASK /;"	d
IOMUXC_GPR_GPR17_GPR_LVDS_CNT_PEN_H_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR17_GPR_LVDS_CNT_PEN_H_SHIFT /;"	d
IOMUXC_GPR_GPR17_GPR_LVDS_CNT_VOD_H	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR17_GPR_LVDS_CNT_VOD_H(/;"	d
IOMUXC_GPR_GPR17_GPR_LVDS_CNT_VOD_H_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR17_GPR_LVDS_CNT_VOD_H_MASK /;"	d
IOMUXC_GPR_GPR17_GPR_LVDS_CNT_VOD_H_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR17_GPR_LVDS_CNT_VOD_H_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_DLYS_BST_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_DLYS_BST_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_DLYS_BST_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_DLYS_BST_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CH_SEL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CH_SEL(/;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CH_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CH_SEL_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CH_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CH_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CLK_INV	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CLK_INV(/;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CLK_INV_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CLK_INV_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CLK_INV_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_CLK_INV_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_DATA_INV	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_DATA_INV(/;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_DATA_INV_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_DATA_INV_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_DATA_INV_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_DATA_INV_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_EN_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_EN_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_FORCE_ERROR_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_FORCE_ERROR_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_FORCE_ERROR_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_FORCE_ERROR_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_PAT_SEL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_PAT_SEL(/;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_PAT_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_PAT_SEL_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_PAT_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_PAT_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_RESETB_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_RESETB_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_RESETB_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_RESETB_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_SKEW_CTRL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_SKEW_CTRL(/;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_SKEW_CTRL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_SKEW_CTRL_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_SKEW_CTRL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_SKEW_CTRL_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_USER_PATTERN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_USER_PATTERN(/;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_USER_PATTERN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_USER_PATTERN_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_USER_PATTERN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_I_BIST_USER_PATTERN_SHIFT /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_SKINI_BST_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_SKINI_BST_MASK /;"	d
IOMUXC_GPR_GPR18_GPR_LVDS_SKINI_BST_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR18_GPR_LVDS_SKINI_BST_SHIFT /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_MON_FOR_CNNCT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_MON_FOR_CNNCT_MASK /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_MON_FOR_CNNCT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_MON_FOR_CNNCT_SHIFT /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_ERR_COUNT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_ERR_COUNT(/;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_ERR_COUNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_ERR_COUNT_MASK /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_ERR_COUNT_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_ERR_COUNT_SHIFT /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_STATUS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_STATUS_MASK /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_STATUS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_STATUS_SHIFT /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_SYNC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_SYNC_MASK /;"	d
IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_SYNC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR19_GPR_LVDS_O_BIST_SYNC_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_ANATOP_TESTMODE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ANATOP_TESTMODE_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_ANATOP_TESTMODE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ANATOP_TESTMODE_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_DBG_ACK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_DBG_ACK(/;"	d
IOMUXC_GPR_GPR1_GPR_DBG_ACK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_DBG_ACK_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_DBG_ACK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_DBG_ACK_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_ENABLE_OCRAM_EPDC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENABLE_OCRAM_EPDC_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_ENABLE_OCRAM_EPDC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENABLE_OCRAM_EPDC_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_ENET2_CLK_DIR_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET2_CLK_DIR_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_ENET2_CLK_DIR_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET2_CLK_DIR_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_ENET2_TX_CLK_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET2_TX_CLK_SEL_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_ENET2_TX_CLK_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_ENET2_TX_CLK_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_EXC_ERR_RESP_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_EXC_ERR_RESP_EN_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_EXC_ERR_RESP_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_EXC_ERR_RESP_EN_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_IRQ_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_IRQ_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_IRQ_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_IRQ_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_PAD_ADD_DS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_PAD_ADD_DS_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_PAD_ADD_DS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_PAD_ADD_DS_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_TZASC1_SECURE_BOOT_LOCK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_TZASC1_SECURE_BOOT_LOCK_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_TZASC1_SECURE_BOOT_LOCK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_TZASC1_SECURE_BOOT_LOCK_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS1_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS1_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS2_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS2_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS2_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS2_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS3_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS3_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS3_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS3_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS0(/;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS0_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS0_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS1(/;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS1_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS1_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS2(/;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS2_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS2_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS2_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS2_SHIFT /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS3(/;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS3_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS3_MASK /;"	d
IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS3_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR1_GPR_WEIM_ADDRS3_SHIFT /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_CK_POL_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_CK_POL_SEL_MASK /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_CK_POL_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_CK_POL_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_I_TX2801X_DUMMY	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_I_TX2801X_DUMMY(/;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_I_TX2801X_DUMMY_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_I_TX2801X_DUMMY_MASK /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_I_TX2801X_DUMMY_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_I_TX2801X_DUMMY_SHIFT /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_M	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_M(/;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_M_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_M_MASK /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_M_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_M_SHIFT /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_P	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_P(/;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_P_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_P_MASK /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_P_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_P_SHIFT /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_S	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_S(/;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_S_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_S_MASK /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_S_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_S_SHIFT /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_VSEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_VSEL_MASK /;"	d
IOMUXC_GPR_GPR20_GPR_LVDS_VSEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR20_GPR_LVDS_VSEL_SHIFT /;"	d
IOMUXC_GPR_GPR21_DAP_BYPASS_CJTAGC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_DAP_BYPASS_CJTAGC_MASK /;"	d
IOMUXC_GPR_GPR21_DAP_BYPASS_CJTAGC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_DAP_BYPASS_CJTAGC_SHIFT /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC0(/;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC0_MASK /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC0_SHIFT /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC1(/;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC1_MASK /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC1_SHIFT /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC2(/;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC2_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC2_MASK /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC2_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC2_SHIFT /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC3(/;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC3_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC3_MASK /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC3_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC3_SHIFT /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC4(/;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC4_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC4_MASK /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKC4_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKC4_SHIFT /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKCCK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKCCK(/;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKCCK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKCCK_MASK /;"	d
IOMUXC_GPR_GPR21_GPR_LVDS_SKCCK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_GPR_LVDS_SKCCK_SHIFT /;"	d
IOMUXC_GPR_GPR21_SJC_BYPASS_CJTAGC_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_SJC_BYPASS_CJTAGC_MASK /;"	d
IOMUXC_GPR_GPR21_SJC_BYPASS_CJTAGC_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR21_SJC_BYPASS_CJTAGC_SHIFT /;"	d
IOMUXC_GPR_GPR22_GPR_PCIE_PHY_PLL_LOCKED_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_GPR_PCIE_PHY_PLL_LOCKED_MASK /;"	d
IOMUXC_GPR_GPR22_GPR_PCIE_PHY_PLL_LOCKED_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_GPR_PCIE_PHY_PLL_LOCKED_SHIFT /;"	d
IOMUXC_GPR_GPR22_GPR_chd1_dvdd_usb_stable_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_GPR_chd1_dvdd_usb_stable_MASK /;"	d
IOMUXC_GPR_GPR22_GPR_chd1_dvdd_usb_stable_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_GPR_chd1_dvdd_usb_stable_SHIFT /;"	d
IOMUXC_GPR_GPR22_GPR_chd2_dvdd_usb_stable_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_GPR_chd2_dvdd_usb_stable_MASK /;"	d
IOMUXC_GPR_GPR22_GPR_chd2_dvdd_usb_stable_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_GPR_chd2_dvdd_usb_stable_SHIFT /;"	d
IOMUXC_GPR_GPR22_aux_chrg_det_1_usb_iso_enable_1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_aux_chrg_det_1_usb_iso_enable_1_MASK /;"	d
IOMUXC_GPR_GPR22_aux_chrg_det_1_usb_iso_enable_1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_aux_chrg_det_1_usb_iso_enable_1_SHIFT /;"	d
IOMUXC_GPR_GPR22_aux_chrg_det_2_usb_iso_enable_1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_aux_chrg_det_2_usb_iso_enable_1_MASK /;"	d
IOMUXC_GPR_GPR22_aux_chrg_det_2_usb_iso_enable_1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_aux_chrg_det_2_usb_iso_enable_1_SHIFT /;"	d
IOMUXC_GPR_GPR22_ddr_phy_dfi_init_complete_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddr_phy_dfi_init_complete_MASK /;"	d
IOMUXC_GPR_GPR22_ddr_phy_dfi_init_complete_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddr_phy_dfi_init_complete_SHIFT /;"	d
IOMUXC_GPR_GPR22_ddrc_mrr_data_out	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddrc_mrr_data_out(/;"	d
IOMUXC_GPR_GPR22_ddrc_mrr_data_out_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddrc_mrr_data_out_MASK /;"	d
IOMUXC_GPR_GPR22_ddrc_mrr_data_out_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddrc_mrr_data_out_SHIFT /;"	d
IOMUXC_GPR_GPR22_ddrc_mrr_valid_out_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddrc_mrr_valid_out_MASK /;"	d
IOMUXC_GPR_GPR22_ddrc_mrr_valid_out_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR22_ddrc_mrr_valid_out_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_CKE0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_CKE0_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_CKE0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_CKE0_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_CKE1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_CKE1_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_CKE1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_CKE1_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_CKE_BYPASS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_CKE_BYPASS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_CKE_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_CKE_BYPASS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_RESET_BYPASS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_RESET_BYPASS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_RESET_BYPASS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_RESET_BYPASS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_RESET_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_RESET_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_DRAM_RESET_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_DRAM_RESET_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_DS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_DS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_DS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_DS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_LOWPOWER_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_LOWPOWER_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_LS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_LS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_LS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_LS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_SD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_SD_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_CPU_SD_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_CPU_SD_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_DS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_DS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_DS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_DS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LOWPOWER_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LOWPOWER_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_LS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_SD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_SD_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_EPDC_SD_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_EPDC_SD_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_DS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_DS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_DS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_DS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LOWPOWER_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LOWPOWER_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_LS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_SD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_SD_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_SD_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_LCDIF_SD_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_DS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_DS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_DS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_DS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_LOWPOWER_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_LOWPOWER_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_LS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_LS_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_LS_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_LS_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_SD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_SD_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MEM_PXP_SD_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MEM_PXP_SD_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_CLK_DIV	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_CLK_DIV(/;"	d
IOMUXC_GPR_GPR2_GPR_MQS_CLK_DIV_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_CLK_DIV_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_CLK_DIV_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_CLK_DIV_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_EN_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_EN_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_OVERSAMPLE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_OVERSAMPLE_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_OVERSAMPLE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_OVERSAMPLE_SHIFT /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_SW_RST_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_SW_RST_MASK /;"	d
IOMUXC_GPR_GPR2_GPR_MQS_SW_RST_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR2_GPR_MQS_SW_RST_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_DATA_WAIT_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_DATA_WAIT_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_DATA_WAIT_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_READ_DATA_WAIT_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_DATA_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_DATA_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_DATA_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_EPDC_WRITE_DATA_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_DATA_WAIT_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_DATA_WAIT_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_DATA_WAIT_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_READ_DATA_WAIT_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_DATA_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_DATA_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_DATA_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_PXP_WRITE_DATA_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_DATA_WAIT_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_DATA_WAIT_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_DATA_WAIT_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_READ_DATA_WAIT_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_DATA_WAIT_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_DATA_WAIT_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_DATA_WAIT_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_READ_DATA_WAIT_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_DATA_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_DATA_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_DATA_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_S_WRITE_DATA_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_ADDR_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_ADDR_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_ADDR_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_ADDR_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_DATA_PIPELINE_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_DATA_PIPELINE_EN_MASK /;"	d
IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_DATA_PIPELINE_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_GPR_OCRAM_CTRL_WRITE_DATA_PIPELINE_EN_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_data_wait_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_data_wait_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_data_wait_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_read_data_wait_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_data_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_data_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_data_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_epdc_write_data_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_data_wait_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_data_wait_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_data_wait_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_read_data_wait_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_data_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_data_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_data_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_pxp_write_data_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_read_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_read_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_read_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_read_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_read_data_wait_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_read_data_wait_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_read_data_wait_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_read_data_wait_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_read_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_read_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_read_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_read_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_read_data_wait_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_read_data_wait_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_read_data_wait_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_read_data_wait_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_write_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_write_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_write_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_write_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_write_data_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_write_data_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_s_write_data_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_s_write_data_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_write_addr_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_write_addr_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_write_addr_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_write_addr_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_write_data_pipeline_en_update_pending_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_write_data_pipeline_en_update_pending_MASK /;"	d
IOMUXC_GPR_GPR3_ocram_ctrl_write_data_pipeline_en_update_pending_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR3_ocram_ctrl_write_data_pipeline_en_update_pending_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_CAN1_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_CAN1_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_CAN1_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_CAN1_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_CAN2_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_CAN2_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_CAN2_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_CAN2_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_ENET1_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_ENET1_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_ENET1_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_ENET1_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_ENET2_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_ENET2_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_ENET2_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_ENET2_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_SAI1_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SAI1_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_SAI1_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SAI1_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_SAI2_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SAI2_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_SAI2_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SAI2_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_SAI3_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SAI3_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_SAI3_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SAI3_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_GPR_SDMA_IPG_STOP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SDMA_IPG_STOP_MASK /;"	d
IOMUXC_GPR_GPR4_GPR_SDMA_IPG_STOP_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_GPR_SDMA_IPG_STOP_SHIFT /;"	d
IOMUXC_GPR_GPR4_can1_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_can1_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_can1_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_can1_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_can2_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_can2_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_can2_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_can2_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_cpu_STANDBYWFE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_cpu_STANDBYWFE(/;"	d
IOMUXC_GPR_GPR4_cpu_STANDBYWFE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_cpu_STANDBYWFE_MASK /;"	d
IOMUXC_GPR_GPR4_cpu_STANDBYWFE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_cpu_STANDBYWFE_SHIFT /;"	d
IOMUXC_GPR_GPR4_cpu_STANDBYWFI	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_cpu_STANDBYWFI(/;"	d
IOMUXC_GPR_GPR4_cpu_STANDBYWFI_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_cpu_STANDBYWFI_MASK /;"	d
IOMUXC_GPR_GPR4_cpu_STANDBYWFI_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_cpu_STANDBYWFI_SHIFT /;"	d
IOMUXC_GPR_GPR4_enet1_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_enet1_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_enet1_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_enet1_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_enet2_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_enet2_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_enet2_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_enet2_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_sai1_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sai1_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_sai1_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sai1_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_sai2_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sai2_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_sai2_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sai2_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_sai3_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sai3_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_sai3_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sai3_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR4_sdma_ipg_stop_ack_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sdma_ipg_stop_ack_MASK /;"	d
IOMUXC_GPR_GPR4_sdma_ipg_stop_ack_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR4_sdma_ipg_stop_ack_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_CSI_MUX_CONTROL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_CSI_MUX_CONTROL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_CSI_MUX_CONTROL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_CSI_MUX_CONTROL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_ENET1_EVENT3IN_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_ENET1_EVENT3IN_SEL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_ENET1_EVENT3IN_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_ENET1_EVENT3IN_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_ENET2_EVENT3IN_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_ENET2_EVENT3IN_SEL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_ENET2_EVENT3IN_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_ENET2_EVENT3IN_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN1_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN1_SEL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN1_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN1_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN2_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN2_SEL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN2_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_GPT4_CAPIN2_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_LCDIF_CSI_VSYNC_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_LCDIF_CSI_VSYNC_SEL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_LCDIF_CSI_VSYNC_SEL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_LCDIF_CSI_VSYNC_SEL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_LCDIF_HANDSHAKE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_LCDIF_HANDSHAKE_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_LCDIF_HANDSHAKE_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_LCDIF_HANDSHAKE_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_LVDS_MUX_CONTROL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_LVDS_MUX_CONTROL_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_LVDS_MUX_CONTROL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_LVDS_MUX_CONTROL_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_PCIE_BTNRST_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_PCIE_BTNRST_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_PCIE_BTNRST_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_PCIE_BTNRST_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT1_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT1_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT1_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT1_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT2_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT2_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT2_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT2_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT3_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT3_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT3_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT3_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT4_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT4_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT4_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_REF_1M_CLK_GPT4_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG1_MASK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG1_MASK_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG1_MASK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG1_MASK_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG2_MASK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG2_MASK_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG2_MASK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG2_MASK_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG3_MASK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG3_MASK_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG3_MASK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG3_MASK_SHIFT /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG4_MASK_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG4_MASK_MASK /;"	d
IOMUXC_GPR_GPR5_GPR_WDOG4_MASK_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR5_GPR_WDOG4_MASK_SHIFT /;"	d
IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_EN_MASK /;"	d
IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_EN_SHIFT /;"	d
IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_MASK /;"	d
IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_ARCACHE_PXP6_SHIFT /;"	d
IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_EN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_EN_MASK /;"	d
IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_EN_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_EN_SHIFT /;"	d
IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_MASK /;"	d
IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR6_GPR_AWCACHE_PXP6_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_chrg_det_test	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_chrg_det_test(/;"	d
IOMUXC_GPR_GPR7_GPR_chd1_chrg_det_test_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_chrg_det_test_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_chrg_det_test_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_chrg_det_test_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_en_ilimit_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_en_ilimit_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_en_ilimit_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_en_ilimit_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_en_pwrupload_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_en_pwrupload_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_en_pwrupload_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_en_pwrupload_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_lowpwr_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_lowpwr_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_lowpwr_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_lowpwr_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_pwd_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_pwd_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd1_pwd_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd1_pwd_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_chrg_det_test	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_chrg_det_test(/;"	d
IOMUXC_GPR_GPR7_GPR_chd2_chrg_det_test_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_chrg_det_test_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_chrg_det_test_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_chrg_det_test_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_en_ilimit_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_en_ilimit_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_en_ilimit_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_en_ilimit_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_en_pwrupload_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_en_pwrupload_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_en_pwrupload_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_en_pwrupload_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_lowpwr_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_lowpwr_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_lowpwr_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_lowpwr_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_pwd_ldo_usb_1p0_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_pwd_ldo_usb_1p0_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_chd2_pwd_ldo_usb_1p0_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_chd2_pwd_ldo_usb_1p0_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_lnkrst_disable_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_lnkrst_disable_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_lnkrst_disable_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_lnkrst_disable_SHIFT /;"	d
IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_perst_disable_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_perst_disable_MASK /;"	d
IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_perst_disable_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR7_GPR_pcie_clk_rst_fix_perst_disable_SHIFT /;"	d
IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up(/;"	d
IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up_MASK /;"	d
IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up_SHIFT /;"	d
IOMUXC_GPR_GPR8_ddr_phy_dfi_init_start_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR8_ddr_phy_dfi_init_start_MASK /;"	d
IOMUXC_GPR_GPR8_ddr_phy_dfi_init_start_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR8_ddr_phy_dfi_init_start_SHIFT /;"	d
IOMUXC_GPR_GPR9_GPR_TZASC1_MUX_CONTROL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR9_GPR_TZASC1_MUX_CONTROL_MASK /;"	d
IOMUXC_GPR_GPR9_GPR_TZASC1_MUX_CONTROL_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR9_GPR_TZASC1_MUX_CONTROL_SHIFT /;"	d
IOMUXC_GPR_GPR9_ddr_phy_ctrl_pd	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR9_ddr_phy_ctrl_pd(/;"	d
IOMUXC_GPR_GPR9_ddr_phy_ctrl_pd_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR9_ddr_phy_ctrl_pd_MASK /;"	d
IOMUXC_GPR_GPR9_ddr_phy_ctrl_pd_SHIFT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_GPR_GPR9_ddr_phy_ctrl_pd_SHIFT /;"	d
IOMUXC_I2SSDI	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_I2SSDI	= (3 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_IPS_BASE_ADDR /;"	d
IOMUXC_LCD_LPCOE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_LCD_LPCOE	= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_LCD_LPCREV	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_LCD_LPCREV	= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_LCD_LPCREVB	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_LCD_LPCREVB	= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_LEND	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_LEND		= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXC_LPSR_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_LPSR_BASE_ADDR /;"	d
IOMUXC_LPSR_GPR_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IOMUXC_LPSR_GPR_BASE_ADDR /;"	d
IOMUXC_SNVS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IOMUXC_SNVS_BASE_ADDR /;"	d
IOMUXC_SW_MUX_CTL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_MUX_CTL(/;"	d
IOMUXC_SW_PAD_CTL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL(/;"	d
IOMUXC_SW_PAD_CTL_A10_MA10_A11	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A10_MA10_A11	/;"	d
IOMUXC_SW_PAD_CTL_A12_A13_A14	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A12_A13_A14	/;"	d
IOMUXC_SW_PAD_CTL_A15_A16_A17	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A15_A16_A17	/;"	d
IOMUXC_SW_PAD_CTL_A18_A19_A20	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A18_A19_A20	/;"	d
IOMUXC_SW_PAD_CTL_A1_A2_A3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A1_A2_A3	/;"	d
IOMUXC_SW_PAD_CTL_A21_A22_A23	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A21_A22_A23	/;"	d
IOMUXC_SW_PAD_CTL_A24_A25_SDBA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A24_A25_SDBA1	/;"	d
IOMUXC_SW_PAD_CTL_A4_A5_A6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A4_A5_A6	/;"	d
IOMUXC_SW_PAD_CTL_A7_A8_A9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_A7_A8_A9	/;"	d
IOMUXC_SW_PAD_CTL_BCLK_RW_RAS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_BCLK_RW_RAS	/;"	d
IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0	/;"	d
IOMUXC_SW_PAD_CTL_CS2_CS3_CS4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_CS2_CS3_CS4	/;"	d
IOMUXC_SW_PAD_CTL_CS5_ECB_LBA	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_CS5_ECB_LBA	/;"	d
IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2	/;"	d
IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1	/;"	d
IOMUXC_SW_PAD_CTL_OE_CS0_CS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_OE_CS0_CS1	/;"	d
IOMUXC_SW_PAD_CTL_SD11_SD12_SD13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD11_SD12_SD13	/;"	d
IOMUXC_SW_PAD_CTL_SD14_SD15_SD16	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD14_SD15_SD16	/;"	d
IOMUXC_SW_PAD_CTL_SD17_SD18_SD19	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD17_SD18_SD19	/;"	d
IOMUXC_SW_PAD_CTL_SD20_SD21_SD22	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD20_SD21_SD22	/;"	d
IOMUXC_SW_PAD_CTL_SD23_SD24_SD25	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD23_SD24_SD25	/;"	d
IOMUXC_SW_PAD_CTL_SD26_SD27_SD28	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD26_SD27_SD28	/;"	d
IOMUXC_SW_PAD_CTL_SD29_SD30_SD31	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD29_SD30_SD31	/;"	d
IOMUXC_SW_PAD_CTL_SD2_SD3_SD4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD2_SD3_SD4	/;"	d
IOMUXC_SW_PAD_CTL_SD5_SD6_SD7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD5_SD6_SD7	/;"	d
IOMUXC_SW_PAD_CTL_SD8_SD9_SD10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10	/;"	d
IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1	/;"	d
IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B	/;"	d
IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0	/;"	d
IOMUXC_VCLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VCLK		= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VFRAME	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VFRAME	= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VLINE	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VLINE	= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VM	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VM		= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS0	= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS1	= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS2	= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS3	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS3	= (2 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS4	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS4	= (2 << 24),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS5	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS5	= (2 << 26),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS6	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS6	= (2 << 28),$/;"	e	enum:s3c2440_iomux_func
IOMUXC_VS7	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXC_VS7	= (2 << 30),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_SPICLK1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_SPICLK1	= (3 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_SPIMISO1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_SPIMISO1	= (3 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_SPIMOSI1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_SPIMOSI1	= (3 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS10	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS10	= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS11	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS11	= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS12	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS12	= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS13	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS13	= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS14	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS14	= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS15	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS15	= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS16	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS16	= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS17	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS17	= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS18	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS18	= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS19	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS19	= (2 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS20	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS20	= (2 << 24),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS21	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS21	= (2 << 26),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS22	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS22	= (2 << 28),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS23	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS23	= (2 << 30),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS8	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS8	= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXD_VS9	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_VS9	= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_nSS0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_nSS0	= (3 << 30),$/;"	e	enum:s3c2440_iomux_func
IOMUXD_nSS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXD_nSS1	= (3 << 28),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_AC_BIT_CLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_AC_BIT_CLK	= (3 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_AC_SDATA_IN	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_AC_SDATA_IN	= (3 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_AC_SDATA_OUT	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_AC_SDATA_OUT	= (3 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_AC_SYNC	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_AC_SYNC		= 3,$/;"	e	enum:s3c2440_iomux_func
IOMUXE_AC_nRESET	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_AC_nRESET	= (3 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_CDCLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_CDCLK	= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_I2SDI	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_I2SDI	= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_I2SDO	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_I2SDO	= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_I2SLRCK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_I2SLRCK	= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXE_I2SSCLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_I2SSCLK	= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_IICSCL	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_IICSCL	= (2 << 28),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_IICSDA	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_IICSDA	= (2 << 30),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SDCLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SDCLK	= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SDCMD	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SDCMD	= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SDDAT0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SDDAT0	= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SDDAT1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SDDAT1	= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SDDAT2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SDDAT2	= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SDDAT3	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SDDAT3	= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SPICLK0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SPICLK0	= (2 << 26),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SPIMISO0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SPIMISO0	= (2 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXE_SPIMOSI0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXE_SPIMOSI0	= (2 << 24),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT0	= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT1	= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT2	= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT3	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT3	= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT4	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT4	= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT5	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT5	= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT6	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT6	= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXF_EINT7	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXF_EINT7	= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT10	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT10	= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT11	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT11	= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT12	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT12	= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT13	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT13	= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT14	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT14	= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT15	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT15	= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT16	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT16	= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT17	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT17	= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT18	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT18	= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT19	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT19	= (2 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT20	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT20	= (2 << 24),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT21	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT21	= (2 << 26),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT22	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT22	= (2 << 28),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT23	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT23	= (2 << 30),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT8	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT8	= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXG_EINT9	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_EINT9	= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_LCD_PWRDN	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_LCD_PWRDN	= (3 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_SPICLK1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_SPICLK1	= (3 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_SPIMISO1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_SPIMISO1	= (3 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_SPIMOSI1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_SPIMOSI1	= (3 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_TCLK1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_TCLK1	= (3 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_nCTS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_nCTS1	= (3 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_nRTS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_nRTS1	= (3 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_nSS0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_nSS0			= (3 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXG_nSS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXG_nSS1			= (3 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_CLKOUT0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_CLKOUT0	= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_CLKOUT1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_CLKOUT1	= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_RXD0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_RXD0		= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_RXD1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_RXD1		= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_RXD2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_RXD2		= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_TXD0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_TXD0		= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_TXD1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_TXD1		= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_TXD2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_TXD2		= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_UEXTCLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_UEXTCLK	= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_nCTS0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_nCTS0	= 2,$/;"	e	enum:s3c2440_iomux_func
IOMUXH_nCTS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_nCTS1	= (3 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_nRTS0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_nRTS0	= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXH_nRTS1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXH_nRTS1	= (3 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMCLKOUT	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMCLKOUT	= (2 << 22),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA0	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA0		= 2$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA1	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA1		= (2 << 2),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA2	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA2		= (2 << 4),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA3	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA3		= (2 << 6),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA4	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA4		= (2 << 8),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA5	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA5		= (2 << 10),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA6	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA6		= (2 << 12),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMDATA7	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMDATA7		= (2 << 14),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMHREF	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMHREF		= (2 << 20),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMPCLK	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMPCLK		= (2 << 16),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMRESET	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMRESET		= (2 << 24),$/;"	e	enum:s3c2440_iomux_func
IOMUXJ_CAMVSYNC	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^	IOMUXJ_CAMVSYNC		= (2 << 18),$/;"	e	enum:s3c2440_iomux_func
IOMUX_CONFIG_LPSR	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define IOMUX_CONFIG_LPSR /;"	d
IOMUX_CONFIG_SION	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define IOMUX_CONFIG_SION	/;"	d
IOMUX_GPIONUM_MASK	drivers/video/mx3fb.c	/^#define IOMUX_GPIONUM_MASK	/;"	d	file:
IOMUX_GPIONUM_SHIFT	drivers/video/mx3fb.c	/^#define IOMUX_GPIONUM_SHIFT	/;"	d	file:
IOMUX_GPIO_ONLY	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^#define IOMUX_GPIO_ONLY	/;"	d	file:
IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK /;"	d
IOMUX_GPR1_FEC1_CLOCK_MUX2_SEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC1_CLOCK_MUX2_SEL_MASK /;"	d
IOMUX_GPR1_FEC1_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC1_MASK	/;"	d
IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK /;"	d
IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK /;"	d
IOMUX_GPR1_FEC2_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC2_MASK	/;"	d
IOMUX_GPR1_FEC_CLOCK_MUX1_SEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC_CLOCK_MUX1_SEL_MASK /;"	d
IOMUX_GPR1_FEC_CLOCK_MUX2_SEL_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC_CLOCK_MUX2_SEL_MASK /;"	d
IOMUX_GPR1_FEC_MASK	arch/arm/include/asm/arch-mx6/iomux.h	/^#define IOMUX_GPR1_FEC_MASK /;"	d
IOMUX_LPSR_SEL_INPUT_OFS	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define IOMUX_LPSR_SEL_INPUT_OFS /;"	d
IOMUX_MODE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUX_MODE(/;"	d
IOMUX_MODE_L	drivers/video/mx3fb.c	/^#define IOMUX_MODE_L(/;"	d	file:
IOMUX_MODE_POS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUX_MODE_POS /;"	d
IOMUX_PAD	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define IOMUX_PAD(/;"	d
IOMUX_PADNUM_MASK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUX_PADNUM_MASK	/;"	d
IOMUX_PADNUM_MASK	drivers/video/mx3fb.c	/^#define IOMUX_PADNUM_MASK	/;"	d	file:
IOMUX_PADS	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define IOMUX_PADS(/;"	d
IOMUX_PIN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IOMUX_PIN(/;"	d
IOMUX_PIN	drivers/video/mx3fb.c	/^#define IOMUX_PIN(/;"	d	file:
IOMUX_SOURCE_PMU	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^#define IOMUX_SOURCE_PMU	/;"	d	file:
IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII	board/tqc/tqma6/tqma6_mba6.c	/^#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII	/;"	d	file:
IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P2V	board/tqc/tqma6/tqma6_mba6.c	/^#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P2V	/;"	d	file:
IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V	board/tqc/tqma6/tqma6_mba6.c	/^#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V	/;"	d	file:
IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM	board/tqc/tqma6/tqma6_mba6.c	/^#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM	/;"	d	file:
IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE	board/tqc/tqma6/tqma6_mba6.c	/^#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE	/;"	d	file:
IOMUX_UNROUTED	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^#define IOMUX_UNROUTED	/;"	d	file:
IOMUX_WIDTH_4BIT	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^#define IOMUX_WIDTH_4BIT	/;"	d	file:
IOPAD_MODE_MASK	arch/x86/lib/pinctrl_ich6.c	/^#define IOPAD_MODE_MASK	/;"	d	file:
IOPAD_PULL_ASSIGN_MASK	arch/x86/lib/pinctrl_ich6.c	/^#define IOPAD_PULL_ASSIGN_MASK	/;"	d	file:
IOPAD_PULL_ASSIGN_SHIFT	arch/x86/lib/pinctrl_ich6.c	/^#define IOPAD_PULL_ASSIGN_SHIFT	/;"	d	file:
IOPAD_PULL_STRENGTH_MASK	arch/x86/lib/pinctrl_ich6.c	/^#define IOPAD_PULL_STRENGTH_MASK	/;"	d	file:
IOPAD_PULL_STRENGTH_SHIFT	arch/x86/lib/pinctrl_ich6.c	/^#define IOPAD_PULL_STRENGTH_SHIFT	/;"	d	file:
IOPIN_PORTA	arch/powerpc/include/asm/iopin_8260.h	/^#define IOPIN_PORTA	/;"	d
IOPIN_PORTA	arch/powerpc/include/asm/iopin_8xx.h	/^#define IOPIN_PORTA	/;"	d
IOPIN_PORTB	arch/powerpc/include/asm/iopin_8260.h	/^#define IOPIN_PORTB	/;"	d
IOPIN_PORTB	arch/powerpc/include/asm/iopin_8xx.h	/^#define IOPIN_PORTB	/;"	d
IOPIN_PORTC	arch/powerpc/include/asm/iopin_8260.h	/^#define IOPIN_PORTC	/;"	d
IOPIN_PORTC	arch/powerpc/include/asm/iopin_8xx.h	/^#define IOPIN_PORTC	/;"	d
IOPIN_PORTD	arch/powerpc/include/asm/iopin_8260.h	/^#define IOPIN_PORTD	/;"	d
IOPIN_PORTD	arch/powerpc/include/asm/iopin_8xx.h	/^#define IOPIN_PORTD	/;"	d
IORDY_ACTIVELEVEL_HIGH	board/micronas/vct/ebi.h	/^#define IORDY_ACTIVELEVEL_HIGH	/;"	d
IORDY_EN	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                  IORDY_EN /;"	d
IORDY_LEVEL_MASK	board/micronas/vct/ebi.h	/^#define IORDY_LEVEL_MASK	/;"	d
IORESOURCE_AUTO	include/linux/ioport.h	/^#define IORESOURCE_AUTO	/;"	d
IORESOURCE_BITS	include/linux/ioport.h	/^#define IORESOURCE_BITS	/;"	d
IORESOURCE_BUSY	include/linux/ioport.h	/^#define IORESOURCE_BUSY	/;"	d
IORESOURCE_CACHEABLE	include/linux/ioport.h	/^#define IORESOURCE_CACHEABLE	/;"	d
IORESOURCE_DISABLED	include/linux/ioport.h	/^#define IORESOURCE_DISABLED	/;"	d
IORESOURCE_DMA	include/linux/ioport.h	/^#define IORESOURCE_DMA	/;"	d
IORESOURCE_DMA_16BIT	include/linux/ioport.h	/^#define IORESOURCE_DMA_16BIT	/;"	d
IORESOURCE_DMA_8AND16BIT	include/linux/ioport.h	/^#define IORESOURCE_DMA_8AND16BIT	/;"	d
IORESOURCE_DMA_8BIT	include/linux/ioport.h	/^#define IORESOURCE_DMA_8BIT	/;"	d
IORESOURCE_DMA_BYTE	include/linux/ioport.h	/^#define IORESOURCE_DMA_BYTE	/;"	d
IORESOURCE_DMA_COMPATIBLE	include/linux/ioport.h	/^#define IORESOURCE_DMA_COMPATIBLE	/;"	d
IORESOURCE_DMA_MASTER	include/linux/ioport.h	/^#define IORESOURCE_DMA_MASTER	/;"	d
IORESOURCE_DMA_SPEED_MASK	include/linux/ioport.h	/^#define IORESOURCE_DMA_SPEED_MASK	/;"	d
IORESOURCE_DMA_TYPEA	include/linux/ioport.h	/^#define IORESOURCE_DMA_TYPEA	/;"	d
IORESOURCE_DMA_TYPEB	include/linux/ioport.h	/^#define IORESOURCE_DMA_TYPEB	/;"	d
IORESOURCE_DMA_TYPEF	include/linux/ioport.h	/^#define IORESOURCE_DMA_TYPEF	/;"	d
IORESOURCE_DMA_TYPE_MASK	include/linux/ioport.h	/^#define IORESOURCE_DMA_TYPE_MASK	/;"	d
IORESOURCE_DMA_WORD	include/linux/ioport.h	/^#define IORESOURCE_DMA_WORD	/;"	d
IORESOURCE_EXCLUSIVE	include/linux/ioport.h	/^#define IORESOURCE_EXCLUSIVE	/;"	d
IORESOURCE_IO	include/linux/ioport.h	/^#define IORESOURCE_IO	/;"	d
IORESOURCE_IO_16BIT_ADDR	include/linux/ioport.h	/^#define IORESOURCE_IO_16BIT_ADDR	/;"	d
IORESOURCE_IO_FIXED	include/linux/ioport.h	/^#define IORESOURCE_IO_FIXED	/;"	d
IORESOURCE_IRQ	include/linux/ioport.h	/^#define IORESOURCE_IRQ	/;"	d
IORESOURCE_IRQ_HIGHEDGE	include/linux/ioport.h	/^#define IORESOURCE_IRQ_HIGHEDGE	/;"	d
IORESOURCE_IRQ_HIGHLEVEL	include/linux/ioport.h	/^#define IORESOURCE_IRQ_HIGHLEVEL	/;"	d
IORESOURCE_IRQ_LOWEDGE	include/linux/ioport.h	/^#define IORESOURCE_IRQ_LOWEDGE	/;"	d
IORESOURCE_IRQ_LOWLEVEL	include/linux/ioport.h	/^#define IORESOURCE_IRQ_LOWLEVEL	/;"	d
IORESOURCE_IRQ_OPTIONAL	include/linux/ioport.h	/^#define IORESOURCE_IRQ_OPTIONAL /;"	d
IORESOURCE_IRQ_SHAREABLE	include/linux/ioport.h	/^#define IORESOURCE_IRQ_SHAREABLE	/;"	d
IORESOURCE_MEM	include/linux/ioport.h	/^#define IORESOURCE_MEM	/;"	d
IORESOURCE_MEM_16BIT	include/linux/ioport.h	/^#define IORESOURCE_MEM_16BIT	/;"	d
IORESOURCE_MEM_32BIT	include/linux/ioport.h	/^#define IORESOURCE_MEM_32BIT	/;"	d
IORESOURCE_MEM_64	include/linux/ioport.h	/^#define IORESOURCE_MEM_64	/;"	d
IORESOURCE_MEM_8AND16BIT	include/linux/ioport.h	/^#define IORESOURCE_MEM_8AND16BIT	/;"	d
IORESOURCE_MEM_8BIT	include/linux/ioport.h	/^#define IORESOURCE_MEM_8BIT	/;"	d
IORESOURCE_MEM_CACHEABLE	include/linux/ioport.h	/^#define IORESOURCE_MEM_CACHEABLE	/;"	d
IORESOURCE_MEM_EXPANSIONROM	include/linux/ioport.h	/^#define IORESOURCE_MEM_EXPANSIONROM	/;"	d
IORESOURCE_MEM_RANGELENGTH	include/linux/ioport.h	/^#define IORESOURCE_MEM_RANGELENGTH	/;"	d
IORESOURCE_MEM_SHADOWABLE	include/linux/ioport.h	/^#define IORESOURCE_MEM_SHADOWABLE	/;"	d
IORESOURCE_MEM_TYPE_MASK	include/linux/ioport.h	/^#define IORESOURCE_MEM_TYPE_MASK	/;"	d
IORESOURCE_MEM_WRITEABLE	include/linux/ioport.h	/^#define IORESOURCE_MEM_WRITEABLE	/;"	d
IORESOURCE_PCI_FIXED	include/linux/ioport.h	/^#define IORESOURCE_PCI_FIXED	/;"	d
IORESOURCE_PREFETCH	include/linux/ioport.h	/^#define IORESOURCE_PREFETCH	/;"	d
IORESOURCE_RANGELENGTH	include/linux/ioport.h	/^#define IORESOURCE_RANGELENGTH	/;"	d
IORESOURCE_READONLY	include/linux/ioport.h	/^#define IORESOURCE_READONLY	/;"	d
IORESOURCE_ROM_BIOS_COPY	include/linux/ioport.h	/^#define IORESOURCE_ROM_BIOS_COPY	/;"	d
IORESOURCE_ROM_COPY	include/linux/ioport.h	/^#define IORESOURCE_ROM_COPY	/;"	d
IORESOURCE_ROM_ENABLE	include/linux/ioport.h	/^#define IORESOURCE_ROM_ENABLE	/;"	d
IORESOURCE_ROM_SHADOW	include/linux/ioport.h	/^#define IORESOURCE_ROM_SHADOW	/;"	d
IORESOURCE_SHADOWABLE	include/linux/ioport.h	/^#define IORESOURCE_SHADOWABLE	/;"	d
IORESOURCE_SIZEALIGN	include/linux/ioport.h	/^#define IORESOURCE_SIZEALIGN	/;"	d
IORESOURCE_STARTALIGN	include/linux/ioport.h	/^#define IORESOURCE_STARTALIGN	/;"	d
IORESOURCE_TYPE_BITS	include/linux/ioport.h	/^#define IORESOURCE_TYPE_BITS	/;"	d
IORESOURCE_UNSET	include/linux/ioport.h	/^#define IORESOURCE_UNSET	/;"	d
IOS16_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define IOS16_CTL	/;"	d
IOSFVISACONTROLCR	arch/x86/cpu/quark/smc.h	/^#define IOSFVISACONTROLCR	/;"	d
IOSFVISALANECR0	arch/x86/cpu/quark/smc.h	/^#define IOSFVISALANECR0	/;"	d
IOSFVISALANECR1	arch/x86/cpu/quark/smc.h	/^#define IOSFVISALANECR1	/;"	d
IOSYNC	board/tqc/tqm834x/tqm834x.c	/^#define IOSYNC	/;"	d	file:
IOTR0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOTR0	/;"	d
IOTR1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOTR1	/;"	d
IOTR2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOTR2	/;"	d
IOTR3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define IOTR3	/;"	d
IOTRACE_IMPL	common/iotrace.c	/^#define IOTRACE_IMPL$/;"	d	file:
IOT_16	common/iotrace.c	/^	IOT_16,$/;"	e	enum:iotrace_flags	file:
IOT_32	common/iotrace.c	/^	IOT_32,$/;"	e	enum:iotrace_flags	file:
IOT_8	common/iotrace.c	/^	IOT_8 = 0,$/;"	e	enum:iotrace_flags	file:
IOT_READ	common/iotrace.c	/^	IOT_READ = 0 << 3,$/;"	e	enum:iotrace_flags	file:
IOT_WRITE	common/iotrace.c	/^	IOT_WRITE = 1 << 3,$/;"	e	enum:iotrace_flags	file:
IOX_OE	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define IOX_OE /;"	d	file:
IOX_SDI	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define IOX_SDI /;"	d	file:
IOX_SDI	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define IOX_SDI /;"	d	file:
IOX_SHCP	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define IOX_SHCP /;"	d	file:
IOX_SHCP	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define IOX_SHCP /;"	d	file:
IOX_STCP	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define IOX_STCP /;"	d	file:
IOX_STCP	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define IOX_STCP /;"	d	file:
IO_ADDR	drivers/gpio/db8500_gpio.c	/^#define IO_ADDR(/;"	d	file:
IO_ADDRESS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define IO_ADDRESS(/;"	d
IO_ADDR_R	include/linux/mtd/nand.h	/^	void __iomem *IO_ADDR_R;$/;"	m	struct:nand_chip	typeref:typename:void __iomem *
IO_ADDR_W	include/linux/mtd/nand.h	/^	void __iomem *IO_ADDR_W;$/;"	m	struct:nand_chip	typeref:typename:void __iomem *
IO_APIC_ADDR	arch/x86/include/asm/ioapic.h	/^#define IO_APIC_ADDR	/;"	d
IO_APIC_DATA	arch/x86/include/asm/ioapic.h	/^#define IO_APIC_DATA	/;"	d
IO_APIC_ID	arch/x86/include/asm/ioapic.h	/^#define IO_APIC_ID	/;"	d
IO_APIC_INDEX	arch/x86/include/asm/ioapic.h	/^#define IO_APIC_INDEX	/;"	d
IO_APIC_VER	arch/x86/include/asm/ioapic.h	/^#define IO_APIC_VER	/;"	d
IO_BAR_EN	arch/x86/include/asm/arch-quark/quark.h	/^#define IO_BAR_EN	/;"	d
IO_BASE	arch/mips/include/asm/mach-generic/spaces.h	/^#define IO_BASE	/;"	d
IO_BASE	arch/openrisc/include/asm/io.h	/^#define IO_BASE	/;"	d
IO_BASE	drivers/pch/pch9.c	/^#define IO_BASE	/;"	d	file:
IO_BASE_ADDRESS	arch/x86/cpu/baytrail/early_uart.c	/^#define IO_BASE_ADDRESS	/;"	d	file:
IO_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define IO_BASE_ADDRESS	/;"	d
IO_BASE_OFFSET_GPNCORE	arch/x86/cpu/baytrail/early_uart.c	/^#define  IO_BASE_OFFSET_GPNCORE	/;"	d	file:
IO_BASE_OFFSET_GPNCORE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define  IO_BASE_OFFSET_GPNCORE	/;"	d
IO_BASE_OFFSET_GPSCORE	arch/x86/cpu/baytrail/early_uart.c	/^#define  IO_BASE_OFFSET_GPSCORE	/;"	d	file:
IO_BASE_OFFSET_GPSCORE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define  IO_BASE_OFFSET_GPSCORE	/;"	d
IO_BASE_OFFSET_GPSSUS	arch/x86/cpu/baytrail/early_uart.c	/^#define  IO_BASE_OFFSET_GPSSUS	/;"	d	file:
IO_BASE_OFFSET_GPSSUS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define  IO_BASE_OFFSET_GPSSUS	/;"	d
IO_BASE_SIZE	arch/x86/cpu/baytrail/early_uart.c	/^#define IO_BASE_SIZE	/;"	d	file:
IO_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define IO_BASE_SIZE	/;"	d
IO_CEC_ADDR	board/gdsys/common/adv7611.c	/^	IO_CEC_ADDR = 0xf4,$/;"	e	enum:__anon3d55bc280203	file:
IO_CP_ADDR	board/gdsys/common/adv7611.c	/^	IO_CP_ADDR = 0xfd,$/;"	e	enum:__anon3d55bc280203	file:
IO_DATA	include/ns87308.h	/^#define IO_DATA /;"	d
IO_DATA_OFFSET_0x	include/ns87308.h	/^#define IO_DATA_OFFSET_0x /;"	d
IO_DATA_OFFSET_10	include/ns87308.h	/^#define IO_DATA_OFFSET_10 /;"	d
IO_DATA_OFFSET_11	include/ns87308.h	/^#define IO_DATA_OFFSET_11 /;"	d
IO_DELAY_PER_DCHAIN_TAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/is1/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/sr1500/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DCHAIN_TAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP /;"	d
IO_DELAY_PER_DCHAIN_TAP	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DELAY_PER_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/is1/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/sr1500/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP /;"	d
IO_DELAY_PER_DQS_EN_DCHAIN_TAP	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/is1/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/sr1500/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DELAY_PER_OPA_TAP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP /;"	d
IO_DELAY_PER_OPA_TAP	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DELAY_PER_OPA_TAP	/;"	d
IO_DLL_CHAIN_LENGTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/is1/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/sr1500/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DLL_CHAIN_LENGTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH /;"	d
IO_DLL_CHAIN_LENGTH	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DLL_CHAIN_LENGTH	/;"	d
IO_DPLL_ADDR	board/gdsys/common/adv7611.c	/^	IO_DPLL_ADDR = 0xf8,$/;"	e	enum:__anon3d55bc280203	file:
IO_DQDQS_OUT_PHASE_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/is1/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQDQS_OUT_PHASE_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX /;"	d
IO_DQDQS_OUT_PHASE_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQDQS_OUT_PHASE_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/is1/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX /;"	d
IO_DQS_EN_DELAY_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_MAX	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/is1/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/sr1500/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_DELAY_OFFSET	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET /;"	d
IO_DQS_EN_DELAY_OFFSET	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQS_EN_DELAY_OFFSET	/;"	d
IO_DQS_EN_PHASE_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/is1/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_EN_PHASE_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX /;"	d
IO_DQS_EN_PHASE_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQS_EN_PHASE_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/is1/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_DELAY_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX /;"	d
IO_DQS_IN_DELAY_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQS_IN_DELAY_MAX	/;"	d
IO_DQS_IN_RESERVE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/is1/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/sr1500/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_IN_RESERVE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE /;"	d
IO_DQS_IN_RESERVE	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQS_IN_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/ebv/socrates/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/is1/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/sr1500/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_DQS_OUT_RESERVE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE /;"	d
IO_DQS_OUT_RESERVE	board/terasic/sockit/qts/sdram_config.h	/^#define IO_DQS_OUT_RESERVE	/;"	d
IO_EDID_ADDR	board/gdsys/common/adv7611.c	/^	IO_EDID_ADDR = 0xfa,$/;"	e	enum:__anon3d55bc280203	file:
IO_EXP_ETH_POWER	board/bluewater/gurnard/gurnard.c	/^#define IO_EXP_ETH_POWER	/;"	d	file:
IO_EXP_ETH_POWER	board/bluewater/snapper9260/snapper9260.c	/^#define IO_EXP_ETH_POWER	/;"	d	file:
IO_EXP_ETH_RESET	board/bluewater/gurnard/gurnard.c	/^#define IO_EXP_ETH_RESET	/;"	d	file:
IO_EXP_ETH_RESET	board/bluewater/snapper9260/snapper9260.c	/^#define IO_EXP_ETH_RESET	/;"	d	file:
IO_HDMI_ADDR	board/gdsys/common/adv7611.c	/^	IO_HDMI_ADDR = 0xfb,$/;"	e	enum:__anon3d55bc280203	file:
IO_I2C_ADDR	board/gdsys/common/adv7611.c	/^	IO_I2C_ADDR = ADV7611_I2C_ADDR,$/;"	e	enum:__anon3d55bc280103	file:
IO_INDEX	include/ns87308.h	/^#define IO_INDEX /;"	d
IO_INDEX_OFFSET_0x	include/ns87308.h	/^#define IO_INDEX_OFFSET_0x /;"	d
IO_INDEX_OFFSET_10	include/ns87308.h	/^#define IO_INDEX_OFFSET_10 /;"	d
IO_INDEX_OFFSET_11	include/ns87308.h	/^#define IO_INDEX_OFFSET_11 /;"	d
IO_INFOFRAME_ADDR	board/gdsys/common/adv7611.c	/^	IO_INFOFRAME_ADDR = 0xf5,$/;"	e	enum:__anon3d55bc280203	file:
IO_IO_IN_DELAY_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/is1/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_IN_DELAY_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX /;"	d
IO_IO_IN_DELAY_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_IO_IN_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/is1/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT1_DELAY_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX /;"	d
IO_IO_OUT1_DELAY_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_IO_OUT1_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/ebv/socrates/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/is1/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/sr1500/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_IO_OUT2_DELAY_MAX	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX /;"	d
IO_IO_OUT2_DELAY_MAX	board/terasic/sockit/qts/sdram_config.h	/^#define IO_IO_OUT2_DELAY_MAX	/;"	d
IO_KSV_ADDR	board/gdsys/common/adv7611.c	/^	IO_KSV_ADDR = 0xf9,$/;"	e	enum:__anon3d55bc280203	file:
IO_PIN_DS	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_DS(/;"	d
IO_PIN_FMUX	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_FMUX(/;"	d
IO_PIN_HOLD	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_HOLD(/;"	d
IO_PIN_OVER_DRVSTR	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_OVER_DRVSTR	/;"	d
IO_PIN_OVER_EACH	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_OVER_EACH	/;"	d
IO_PIN_OVER_FMUX	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_OVER_FMUX	/;"	d
IO_PIN_OVER_HOLD	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_OVER_HOLD	/;"	d
IO_PIN_OVER_PULL	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_OVER_PULL	/;"	d
IO_PIN_OVER_STRIG	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_OVER_STRIG	/;"	d
IO_PIN_PUD	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_PUD(/;"	d
IO_PIN_PUE	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_PUE(/;"	d
IO_PIN_ST	arch/powerpc/include/asm/immap_512x.h	/^#define IO_PIN_ST(/;"	d
IO_POL	include/power/rk808_pmic.h	/^	IO_POL,$/;"	e	enum:__anon9b8afd0f0103
IO_PORT_A	arch/blackfin/include/asm/soft_switch.h	/^#define IO_PORT_A /;"	d
IO_PORT_B	arch/blackfin/include/asm/soft_switch.h	/^#define IO_PORT_B /;"	d
IO_PORT_INPUT	arch/blackfin/include/asm/soft_switch.h	/^#define IO_PORT_INPUT /;"	d
IO_PORT_OUTPUT	arch/blackfin/include/asm/soft_switch.h	/^#define IO_PORT_OUTPUT /;"	d
IO_PORT_RESET	arch/x86/include/asm/processor.h	/^#define IO_PORT_RESET	/;"	d
IO_RD_INFO_LSB	board/gdsys/common/adv7611.c	/^	IO_RD_INFO_LSB = 0xeb,$/;"	e	enum:__anon3d55bc280203	file:
IO_RD_INFO_MSB	board/gdsys/common/adv7611.c	/^	IO_RD_INFO_MSB = 0xea,$/;"	e	enum:__anon3d55bc280203	file:
IO_RESET_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define IO_RESET_SHIFT	/;"	d	file:
IO_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define IO_SHIFT	/;"	d	file:
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/is1/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/sr1500/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS /;"	d
IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS	/;"	d
IO_SPACE_LIMIT	arch/avr32/include/asm/io.h	/^#define IO_SPACE_LIMIT	/;"	d
IO_SPACE_LIMIT	arch/m68k/include/asm/io.h	/^#define IO_SPACE_LIMIT /;"	d
IO_SPACE_LIMIT	arch/microblaze/include/asm/io.h	/^#define IO_SPACE_LIMIT /;"	d
IO_SPACE_LIMIT	arch/mips/include/asm/io.h	/^#define IO_SPACE_LIMIT /;"	d
IO_SPACE_LIMIT	arch/openrisc/include/asm/io.h	/^#define IO_SPACE_LIMIT	/;"	d
IO_SPACE_LIMIT	arch/powerpc/include/asm/io.h	/^#define IO_SPACE_LIMIT /;"	d
IO_SPACE_LIMIT	arch/x86/include/asm/io.h	/^#define IO_SPACE_LIMIT /;"	d
IO_SPACE_LIMIT	arch/xtensa/include/asm/io.h	/^#define IO_SPACE_LIMIT /;"	d
IO_STABILIZATION_DELAY	arch/arm/include/asm/arch-tegra/ap.h	/^#define IO_STABILIZATION_DELAY	/;"	d
IO_STABILIZATION_DELAY	arch/arm/mach-tegra/cpu.h	/^#define IO_STABILIZATION_DELAY	/;"	d
IP	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register SP, BP, SI, DI, IP;$/;"	m	struct:i386_special_regs	typeref:typename:i386_general_register
IP2APB_AXIMON_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IP2APB_AXIMON_IPS_BASE_ADDR /;"	d
IP2APB_PERFMON1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_PERFMON1_BASE_ADDR /;"	d
IP2APB_PERFMON1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IP2APB_PERFMON1_IPS_BASE_ADDR /;"	d
IP2APB_PERFMON2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_PERFMON2_BASE_ADDR /;"	d
IP2APB_PERFMON2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IP2APB_PERFMON2_IPS_BASE_ADDR /;"	d
IP2APB_PERFMON3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_PERFMON3_BASE_ADDR /;"	d
IP2APB_TZASC1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_TZASC1_BASE_ADDR /;"	d
IP2APB_TZASC1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IP2APB_TZASC1_IPS_BASE_ADDR /;"	d
IP2APB_TZASC2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_TZASC2_BASE_ADDR /;"	d
IP2APB_USBPHY1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_USBPHY1_BASE_ADDR /;"	d
IP2APB_USBPHY2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IP2APB_USBPHY2_BASE_ADDR /;"	d
IPADCR_IPATOM4	include/w83c553f.h	/^#define IPADCR_IPATOM4	/;"	d
IPADCR_IPATOM5	include/w83c553f.h	/^#define IPADCR_IPATOM5	/;"	d
IPADCR_IPATOM6	include/w83c553f.h	/^#define IPADCR_IPATOM6	/;"	d
IPADCR_IPATOM7	include/w83c553f.h	/^#define IPADCR_IPATOM7	/;"	d
IPADCR_MBE512	include/w83c553f.h	/^#define IPADCR_MBE512	/;"	d
IPADCR_MBE640	include/w83c553f.h	/^#define IPADCR_MBE640	/;"	d
IPEND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define IPEND /;"	d
IPF	drivers/usb/eth/r8152.h	/^#define IPF	/;"	d
IPGR	drivers/net/sh_eth.h	/^	IPGR,$/;"	e	enum:__anon5ef54f5a0103
IPGR1	drivers/net/ethoc.c	/^#define	IPGR1	/;"	d	file:
IPGR1_VAL	drivers/net/ax88180.h	/^  #define IPGR1_VAL	/;"	d
IPGR2	drivers/net/ethoc.c	/^#define	IPGR2	/;"	d	file:
IPGR2_VAL	drivers/net/ax88180.h	/^  #define IPGR2_VAL	/;"	d
IPGT	drivers/net/ethoc.c	/^#define	IPGT	/;"	d	file:
IPGT_VAL	drivers/net/ax88180.h	/^  #define IPGT_VAL	/;"	d
IPG_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	IPG_CLK,$/;"	e	enum:mxc_main_clock
IPG_DIV_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define IPG_DIV_MAX /;"	d	file:
IPG_PER_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	IPG_PER_CLK,$/;"	e	enum:mxc_main_clock
IPHdrChksum	drivers/net/bfin_mac.h	/^	u16 IPHdrChksum;		\/* the IP header checksum *\/$/;"	m	struct:adi_ether_buffer	typeref:typename:u16
IPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define IPLL	/;"	d
IPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define IPLL_CON1_VAL	/;"	d
IPL_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define IPL_BASE_ADDR	/;"	d
IPPROTO_ICMP	include/net.h	/^#define IPPROTO_ICMP	/;"	d
IPPROTO_UDP	include/net.h	/^#define IPPROTO_UDP	/;"	d
IPP_DO_CLKO1	arch/arm/include/asm/arch-mx7/clock.h	/^	IPP_DO_CLKO1 = 123,$/;"	e	enum:clk_root_index
IPP_DO_CLKO1_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_OSC_24M_CLK	/;"	d
IPP_DO_CLKO1_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
IPP_DO_CLKO1_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
IPP_DO_CLKO1_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
IPP_DO_CLKO1_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
IPP_DO_CLKO1_FROM_PLL_SYS_PFD0_196M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_PLL_SYS_PFD0_196M_CLK	/;"	d
IPP_DO_CLKO1_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_PLL_SYS_PFD3_CLK	/;"	d
IPP_DO_CLKO1_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO1_FROM_REF_1M_CLK	/;"	d
IPP_DO_CLKO2	arch/arm/include/asm/arch-mx7/clock.h	/^	IPP_DO_CLKO2 = 124,$/;"	e	enum:clk_root_index
IPP_DO_CLKO2_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_OSC_24M_CLK	/;"	d
IPP_DO_CLKO2_FROM_OSC_32K_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_OSC_32K_CLK	/;"	d
IPP_DO_CLKO2_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
IPP_DO_CLKO2_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
IPP_DO_CLKO2_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
IPP_DO_CLKO2_FROM_PLL_SYS_PFD1_166M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_PLL_SYS_PFD1_166M_CLK	/;"	d
IPP_DO_CLKO2_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_PLL_SYS_PFD4_CLK	/;"	d
IPP_DO_CLKO2_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define IPP_DO_CLKO2_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
IPPayloadChksum	drivers/net/bfin_mac.h	/^	u16 IPPayloadChksum;		\/* the IP header and payload checksum *\/$/;"	m	struct:adi_ether_buffer	typeref:typename:u16
IPR	arch/powerpc/include/asm/xilinx_irq.h	/^#define IPR	/;"	d
IPR0	include/mpc5xxx.h	/^	volatile u8 IPR0;		\/* SDMA + 0x3c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR1	include/mpc5xxx.h	/^	volatile u8 IPR1;		\/* SDMA + 0x3d *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR10	include/mpc5xxx.h	/^	volatile u8 IPR10;		\/* SDMA + 0x46 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR11	include/mpc5xxx.h	/^	volatile u8 IPR11;		\/* SDMA + 0x47 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR12	include/mpc5xxx.h	/^	volatile u8 IPR12;		\/* SDMA + 0x48 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR13	include/mpc5xxx.h	/^	volatile u8 IPR13;		\/* SDMA + 0x49 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR14	include/mpc5xxx.h	/^	volatile u8 IPR14;		\/* SDMA + 0x4a *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR15	include/mpc5xxx.h	/^	volatile u8 IPR15;		\/* SDMA + 0x4b *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR16	include/mpc5xxx.h	/^	volatile u8 IPR16;		\/* SDMA + 0x4c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR17	include/mpc5xxx.h	/^	volatile u8 IPR17;		\/* SDMA + 0x4d *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR18	include/mpc5xxx.h	/^	volatile u8 IPR18;		\/* SDMA + 0x4e *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR19	include/mpc5xxx.h	/^	volatile u8 IPR19;		\/* SDMA + 0x4f *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR2	include/mpc5xxx.h	/^	volatile u8 IPR2;		\/* SDMA + 0x3e *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR20	include/mpc5xxx.h	/^	volatile u8 IPR20;		\/* SDMA + 0x50 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR21	include/mpc5xxx.h	/^	volatile u8 IPR21;		\/* SDMA + 0x51 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR22	include/mpc5xxx.h	/^	volatile u8 IPR22;		\/* SDMA + 0x52 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR23	include/mpc5xxx.h	/^	volatile u8 IPR23;		\/* SDMA + 0x53 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR24	include/mpc5xxx.h	/^	volatile u8 IPR24;		\/* SDMA + 0x54 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR25	include/mpc5xxx.h	/^	volatile u8 IPR25;		\/* SDMA + 0x55 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR26	include/mpc5xxx.h	/^	volatile u8 IPR26;		\/* SDMA + 0x56 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR27	include/mpc5xxx.h	/^	volatile u8 IPR27;		\/* SDMA + 0x57 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR28	include/mpc5xxx.h	/^	volatile u8 IPR28;		\/* SDMA + 0x58 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR29	include/mpc5xxx.h	/^	volatile u8 IPR29;		\/* SDMA + 0x59 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR3	include/mpc5xxx.h	/^	volatile u8 IPR3;		\/* SDMA + 0x3f *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR30	include/mpc5xxx.h	/^	volatile u8 IPR30;		\/* SDMA + 0x5a *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR31	include/mpc5xxx.h	/^	volatile u8 IPR31;		\/* SDMA + 0x5b *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR4	include/mpc5xxx.h	/^	volatile u8 IPR4;		\/* SDMA + 0x40 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR5	include/mpc5xxx.h	/^	volatile u8 IPR5;		\/* SDMA + 0x41 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR6	include/mpc5xxx.h	/^	volatile u8 IPR6;		\/* SDMA + 0x42 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR7	include/mpc5xxx.h	/^	volatile u8 IPR7;		\/* SDMA + 0x43 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR8	include/mpc5xxx.h	/^	volatile u8 IPR8;		\/* SDMA + 0x44 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPR9	include/mpc5xxx.h	/^	volatile u8 IPR9;		\/* SDMA + 0x45 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IPRA	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRA	/;"	d
IPRA	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRA	/;"	d
IPRA	arch/sh/include/asm/cpu_sh7750.h	/^#define IPRA	/;"	d
IPRB	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRB	/;"	d
IPRB	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRB	/;"	d
IPRB	arch/sh/include/asm/cpu_sh7750.h	/^#define IPRB	/;"	d
IPRC	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRC	/;"	d
IPRC	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRC	/;"	d
IPRC	arch/sh/include/asm/cpu_sh7750.h	/^#define IPRC	/;"	d
IPRD	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRD	/;"	d
IPRD	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRD	/;"	d
IPRD	arch/sh/include/asm/cpu_sh7750.h	/^#define IPRD	/;"	d
IPRE	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRE	/;"	d
IPRE	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRE	/;"	d
IPRF	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRF	/;"	d
IPRF	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRF	/;"	d
IPRG	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRG	/;"	d
IPRG	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRG	/;"	d
IPRH	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRH	/;"	d
IPRH	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRH	/;"	d
IPRI	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRI	/;"	d
IPRI	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRI	/;"	d
IPRIO	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define IPRIO /;"	d
IPRJ	arch/sh/include/asm/cpu_sh7720.h	/^#define IPRJ	/;"	d
IPRJ	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRJ	/;"	d
IPRK	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRK	/;"	d
IPRL	arch/sh/include/asm/cpu_sh7722.h	/^#define IPRL	/;"	d
IPROC_CLKCT_HDELAY_SW_EN	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_CLKCT_HDELAY_SW_EN	/;"	d
IPROC_PERIPH_BASE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_PERIPH_BASE	/;"	d
IPROC_PERIPH_GLB_TIM_REG_BASE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_PERIPH_GLB_TIM_REG_BASE	/;"	d
IPROC_PERIPH_INT_CTRL_REG_BASE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_PERIPH_INT_CTRL_REG_BASE	/;"	d
IPROC_PERIPH_INT_DISTR_REG_BASE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_PERIPH_INT_DISTR_REG_BASE	/;"	d
IPROC_PERIPH_PVT_TIM_REG_BASE	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_PERIPH_PVT_TIM_REG_BASE	/;"	d
IPROC_REG_WRITE_ACCESS	arch/arm/include/asm/iproc-common/sysmap.h	/^#define IPROC_REG_WRITE_ACCESS	/;"	d
IPSR0	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR0	/;"	d
IPSR1	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR1	/;"	d
IPSR10	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR10	/;"	d
IPSR10_SCIF_ENABLE	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define IPSR10_SCIF_ENABLE /;"	d	file:
IPSR11	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR11	/;"	d
IPSR11_ETH_ENABLE	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define IPSR11_ETH_ENABLE /;"	d	file:
IPSR2	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR2	/;"	d
IPSR3	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR3	/;"	d
IPSR3_ETH_ENABLE	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define IPSR3_ETH_ENABLE /;"	d	file:
IPSR4	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR4	/;"	d
IPSR4_ETH_ENABLE	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define IPSR4_ETH_ENABLE /;"	d	file:
IPSR5	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR5	/;"	d
IPSR6	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR6	/;"	d
IPSR6	board/renesas/blanche/blanche.c	/^#define	IPSR6	/;"	d	file:
IPSR7	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR7	/;"	d
IPSR8	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR8	/;"	d
IPSR8_ETH_ENABLE	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define IPSR8_ETH_ENABLE /;"	d	file:
IPSR9	arch/sh/include/asm/cpu_sh7734.h	/^#define IPSR9	/;"	d
IPU1_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IPU1_ARB_BASE_ADDR /;"	d
IPU1_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IPU1_ARB_END_ADDR /;"	d
IPU2_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IPU2_ARB_BASE_ADDR /;"	d
IPU2_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IPU2_ARB_END_ADDR /;"	d
IPUIRQ_2_MASK	drivers/video/ipu_regs.h	/^#define IPUIRQ_2_MASK(/;"	d
IPUIRQ_2_STATREG	drivers/video/ipu_regs.h	/^#define IPUIRQ_2_STATREG(/;"	d
IPU_ALPHA_IN_BUFFER	drivers/video/ipu.h	/^	IPU_ALPHA_IN_BUFFER = 1,	\/*< Buffer for input to IPU *\/$/;"	e	enum:__anon4a35f9fd0303
IPU_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_BASE	/;"	d
IPU_BRK_CTRL_1	drivers/video/mx3fb.c	/^#define IPU_BRK_CTRL_1	/;"	d	file:
IPU_BRK_CTRL_2	drivers/video/mx3fb.c	/^#define IPU_BRK_CTRL_2	/;"	d	file:
IPU_BRK_STAT	drivers/video/mx3fb.c	/^#define IPU_BRK_STAT	/;"	d	file:
IPU_CHAN_ALPHA_IN_DMA	drivers/video/ipu.h	/^#define IPU_CHAN_ALPHA_IN_DMA(/;"	d
IPU_CHAN_ALT	drivers/video/ipu.h	/^#define IPU_CHAN_ALT(/;"	d
IPU_CHAN_GRAPH_IN_DMA	drivers/video/ipu.h	/^#define IPU_CHAN_GRAPH_IN_DMA(/;"	d
IPU_CHAN_ID	drivers/video/ipu.h	/^#define IPU_CHAN_ID(/;"	d
IPU_CHAN_OUT_DMA	drivers/video/ipu.h	/^#define IPU_CHAN_OUT_DMA(/;"	d
IPU_CHAN_VIDEO_IN_DMA	drivers/video/ipu.h	/^#define IPU_CHAN_VIDEO_IN_DMA(/;"	d
IPU_CHA_BUF0_RDY	drivers/video/ipu_regs.h	/^#define IPU_CHA_BUF0_RDY(/;"	d
IPU_CHA_BUF0_RDY	drivers/video/mx3fb.c	/^#define IPU_CHA_BUF0_RDY	/;"	d	file:
IPU_CHA_BUF1_RDY	drivers/video/ipu_regs.h	/^#define IPU_CHA_BUF1_RDY(/;"	d
IPU_CHA_BUF1_RDY	drivers/video/mx3fb.c	/^#define IPU_CHA_BUF1_RDY	/;"	d	file:
IPU_CHA_CUR_BUF	drivers/video/ipu_regs.h	/^#define IPU_CHA_CUR_BUF(/;"	d
IPU_CHA_CUR_BUF	drivers/video/mx3fb.c	/^#define IPU_CHA_CUR_BUF	/;"	d	file:
IPU_CHA_DB_MODE_SEL	drivers/video/ipu_regs.h	/^#define IPU_CHA_DB_MODE_SEL(/;"	d
IPU_CHA_DB_MODE_SEL	drivers/video/mx3fb.c	/^#define IPU_CHA_DB_MODE_SEL	/;"	d	file:
IPU_CM_REG	drivers/video/ipu_regs.h	/^#define IPU_CM_REG	/;"	d
IPU_CM_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_CM_REG_BASE	/;"	d
IPU_CONF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF	/;"	d
IPU_CONF	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF	/;"	d
IPU_CONF	drivers/video/ipu_regs.h	/^#define IPU_CONF	/;"	d
IPU_CONF_ADC_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_ADC_EN	/;"	d
IPU_CONF_ADC_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_ADC_EN	/;"	d
IPU_CONF_CSI_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_CSI_EN	/;"	d
IPU_CONF_CSI_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_CSI_EN	/;"	d
IPU_CONF_DC_EN	drivers/video/ipu_regs.h	/^	IPU_CONF_DC_EN = 0x00000200,$/;"	e	enum:__anonf09a0ccd0103
IPU_CONF_DI0_EN	drivers/video/ipu_regs.h	/^	IPU_CONF_DI0_EN = 0x00000040,$/;"	e	enum:__anonf09a0ccd0103
IPU_CONF_DI1_EN	drivers/video/ipu_regs.h	/^	IPU_CONF_DI1_EN = 0x00000080,$/;"	e	enum:__anonf09a0ccd0103
IPU_CONF_DI_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_DI_EN	/;"	d
IPU_CONF_DI_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_DI_EN	/;"	d
IPU_CONF_DMFC_EN	drivers/video/ipu_regs.h	/^	IPU_CONF_DMFC_EN = 0x00000400,$/;"	e	enum:__anonf09a0ccd0103
IPU_CONF_DP_EN	drivers/video/ipu_regs.h	/^	IPU_CONF_DP_EN = 0x00000020,$/;"	e	enum:__anonf09a0ccd0103
IPU_CONF_DU_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_DU_EN	/;"	d
IPU_CONF_DU_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_DU_EN	/;"	d
IPU_CONF_IC_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_IC_EN	/;"	d
IPU_CONF_IC_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_IC_EN	/;"	d
IPU_CONF_PF_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_PF_EN	/;"	d
IPU_CONF_PF_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_PF_EN	/;"	d
IPU_CONF_PXL_ENDIAN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_PXL_ENDIAN	/;"	d
IPU_CONF_PXL_ENDIAN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_PXL_ENDIAN	/;"	d
IPU_CONF_ROT_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_ROT_EN	/;"	d
IPU_CONF_ROT_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_ROT_EN	/;"	d
IPU_CONF_SDC_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_CONF_SDC_EN	/;"	d
IPU_CONF_SDC_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CONF_SDC_EN	/;"	d
IPU_CPMEM_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_CPMEM_REG_BASE	/;"	d
IPU_CSI0_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_CSI0_REG_BASE	/;"	d
IPU_CSI1_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_CSI1_REG_BASE	/;"	d
IPU_CTRL_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_CTRL_BASE_ADDR	/;"	d
IPU_CTRL_BASE_ADDR	drivers/video/ipu_regs.h	/^#define IPU_CTRL_BASE_ADDR	/;"	d
IPU_DC_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_DC_REG_BASE	/;"	d
IPU_DC_TMPL_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_DC_TMPL_REG_BASE	/;"	d
IPU_DI0_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_DI0_REG_BASE	/;"	d
IPU_DI1_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_DI1_REG_BASE	/;"	d
IPU_DIAGB_CTRL	drivers/video/mx3fb.c	/^#define IPU_DIAGB_CTRL	/;"	d	file:
IPU_DISP0_BASE	drivers/video/ipu_regs.h	/^#define IPU_DISP0_BASE	/;"	d
IPU_DISP1_BASE	drivers/video/ipu_regs.h	/^#define IPU_DISP1_BASE	/;"	d
IPU_DISP_GEN	drivers/video/ipu_regs.h	/^#define IPU_DISP_GEN	/;"	d
IPU_DMFC_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_DMFC_REG_BASE	/;"	d
IPU_DP_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_DP_REG_BASE	/;"	d
IPU_FS_DISP_FLOW	drivers/video/mx3fb.c	/^#define IPU_FS_DISP_FLOW	/;"	d	file:
IPU_FS_DISP_FLOW1	drivers/video/ipu_regs.h	/^#define IPU_FS_DISP_FLOW1	/;"	d
IPU_FS_PROC_FLOW	drivers/video/mx3fb.c	/^#define IPU_FS_PROC_FLOW	/;"	d	file:
IPU_FS_PROC_FLOW1	drivers/video/ipu_regs.h	/^#define IPU_FS_PROC_FLOW1	/;"	d
IPU_FS_PROC_FLOW2	drivers/video/ipu_regs.h	/^#define IPU_FS_PROC_FLOW2	/;"	d
IPU_FS_PROC_FLOW3	drivers/video/ipu_regs.h	/^#define IPU_FS_PROC_FLOW3	/;"	d
IPU_GPR	drivers/video/ipu_regs.h	/^#define IPU_GPR	/;"	d
IPU_GRAPH_IN_BUFFER	drivers/video/ipu.h	/^	IPU_GRAPH_IN_BUFFER = 2,	\/*< Buffer for input to IPU *\/$/;"	e	enum:__anon4a35f9fd0303
IPU_IC_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_IC_REG_BASE	/;"	d
IPU_IDMAC_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_IDMAC_REG_BASE	/;"	d
IPU_IMA_ADDR	drivers/video/mx3fb.c	/^#define IPU_IMA_ADDR	/;"	d	file:
IPU_IMA_DATA	drivers/video/mx3fb.c	/^#define IPU_IMA_DATA	/;"	d	file:
IPU_INPUT_BUFFER	drivers/video/ipu.h	/^	IPU_INPUT_BUFFER = IPU_VIDEO_IN_BUFFER,$/;"	e	enum:__anon4a35f9fd0303
IPU_INT_CTRL	drivers/video/ipu_regs.h	/^#define IPU_INT_CTRL(/;"	d
IPU_INT_CTRL_1	drivers/video/mx3fb.c	/^#define IPU_INT_CTRL_1	/;"	d	file:
IPU_INT_CTRL_2	drivers/video/mx3fb.c	/^#define IPU_INT_CTRL_2	/;"	d	file:
IPU_INT_CTRL_3	drivers/video/mx3fb.c	/^#define IPU_INT_CTRL_3	/;"	d	file:
IPU_INT_CTRL_4	drivers/video/mx3fb.c	/^#define IPU_INT_CTRL_4	/;"	d	file:
IPU_INT_CTRL_5	drivers/video/mx3fb.c	/^#define IPU_INT_CTRL_5	/;"	d	file:
IPU_INT_STAT	drivers/video/ipu_regs.h	/^#define IPU_INT_STAT(/;"	d
IPU_INT_STAT_1	drivers/video/mx3fb.c	/^#define IPU_INT_STAT_1	/;"	d	file:
IPU_INT_STAT_2	drivers/video/mx3fb.c	/^#define IPU_INT_STAT_2	/;"	d	file:
IPU_INT_STAT_3	drivers/video/mx3fb.c	/^#define IPU_INT_STAT_3	/;"	d	file:
IPU_INT_STAT_4	drivers/video/mx3fb.c	/^#define IPU_INT_STAT_4	/;"	d	file:
IPU_INT_STAT_5	drivers/video/mx3fb.c	/^#define IPU_INT_STAT_5	/;"	d	file:
IPU_IRQ_DC_FC_1	drivers/video/ipu.h	/^	IPU_IRQ_DC_FC_1 = 448 + 9,$/;"	e	enum:ipu_irq_line
IPU_IRQ_DP_SF_END	drivers/video/ipu.h	/^	IPU_IRQ_DP_SF_END = 448 + 3,$/;"	e	enum:ipu_irq_line
IPU_IRT_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_IRT_REG_BASE	/;"	d
IPU_ISP_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_ISP_REG_BASE	/;"	d
IPU_ISP_TBPR_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_ISP_TBPR_REG_BASE	/;"	d
IPU_LUT_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_LUT_REG_BASE	/;"	d
IPU_MAX_CH	drivers/video/ipu.h	/^#define IPU_MAX_CH	/;"	d
IPU_MCU_T_DEFAULT	drivers/video/ipu_regs.h	/^#define IPU_MCU_T_DEFAULT	/;"	d
IPU_MEM_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IPU_MEM_BASE	/;"	d
IPU_MEM_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IPU_MEM_BASE_ADDR	/;"	d
IPU_MEM_RST	drivers/video/ipu_regs.h	/^#define IPU_MEM_RST	/;"	d
IPU_OUTPUT_BUFFER	drivers/video/ipu.h	/^	IPU_OUTPUT_BUFFER = 0,	\/*< Buffer for output from IPU *\/$/;"	e	enum:__anon4a35f9fd0303
IPU_PANEL_PARALLEL	drivers/video/ipu.h	/^#define IPU_PANEL_PARALLEL	/;"	d
IPU_PANEL_SERIAL	drivers/video/ipu.h	/^#define IPU_PANEL_SERIAL	/;"	d
IPU_PANEL_SHARP_TFT	drivers/video/ipu.h	/^	IPU_PANEL_SHARP_TFT,$/;"	e	enum:__anon4a35f9fd0103
IPU_PANEL_SHARP_TFT	drivers/video/mx3fb.c	/^	IPU_PANEL_SHARP_TFT,$/;"	e	enum:ipu_panel	file:
IPU_PANEL_TFT	drivers/video/ipu.h	/^	IPU_PANEL_TFT,$/;"	e	enum:__anon4a35f9fd0103
IPU_PANEL_TFT	drivers/video/mx3fb.c	/^	IPU_PANEL_TFT,$/;"	e	enum:ipu_panel	file:
IPU_PIX_FMT_ABGR32	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_ABGR32 /;"	d
IPU_PIX_FMT_BGR24	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_BGR24 /;"	d
IPU_PIX_FMT_BGR32	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_BGR32 /;"	d
IPU_PIX_FMT_BGR666	drivers/video/mx3fb.c	/^	IPU_PIX_FMT_BGR666,$/;"	e	enum:pixel_fmt	file:
IPU_PIX_FMT_BGR666	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_BGR666 /;"	d
IPU_PIX_FMT_BGRA32	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_BGRA32 /;"	d
IPU_PIX_FMT_GENERIC	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_GENERIC /;"	d
IPU_PIX_FMT_GENERIC_32	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_GENERIC_32 /;"	d
IPU_PIX_FMT_GREY	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_GREY /;"	d
IPU_PIX_FMT_LVDS666	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_LVDS666 /;"	d
IPU_PIX_FMT_LVDS888	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_LVDS888 /;"	d
IPU_PIX_FMT_NV12	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_NV12 /;"	d
IPU_PIX_FMT_RGB24	drivers/video/mx3fb.c	/^	IPU_PIX_FMT_RGB24,$/;"	e	enum:pixel_fmt	file:
IPU_PIX_FMT_RGB24	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGB24 /;"	d
IPU_PIX_FMT_RGB32	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGB32 /;"	d
IPU_PIX_FMT_RGB332	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGB332 /;"	d
IPU_PIX_FMT_RGB555	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGB555 /;"	d
IPU_PIX_FMT_RGB565	drivers/video/mx3fb.c	/^	IPU_PIX_FMT_RGB565,$/;"	e	enum:pixel_fmt	file:
IPU_PIX_FMT_RGB565	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGB565 /;"	d
IPU_PIX_FMT_RGB666	drivers/video/mx3fb.c	/^	IPU_PIX_FMT_RGB666,$/;"	e	enum:pixel_fmt	file:
IPU_PIX_FMT_RGB666	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGB666 /;"	d
IPU_PIX_FMT_RGBA32	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_RGBA32 /;"	d
IPU_PIX_FMT_UYVY	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_UYVY /;"	d
IPU_PIX_FMT_Y41P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_Y41P /;"	d
IPU_PIX_FMT_YUV410P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YUV410P /;"	d
IPU_PIX_FMT_YUV420P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YUV420P /;"	d
IPU_PIX_FMT_YUV420P2	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YUV420P2 /;"	d
IPU_PIX_FMT_YUV422P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YUV422P /;"	d
IPU_PIX_FMT_YUV444	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YUV444 /;"	d
IPU_PIX_FMT_YUYV	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YUYV /;"	d
IPU_PIX_FMT_YVU410P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YVU410P /;"	d
IPU_PIX_FMT_YVU420P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YVU420P /;"	d
IPU_PIX_FMT_YVU422P	include/ipu_pixfmt.h	/^#define IPU_PIX_FMT_YVU422P /;"	d
IPU_SEC_INPUT_BUFFER	drivers/video/ipu.h	/^	IPU_SEC_INPUT_BUFFER = IPU_GRAPH_IN_BUFFER,$/;"	e	enum:__anon4a35f9fd0303
IPU_SMFC_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_SMFC_REG_BASE	/;"	d
IPU_SOC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IPU_SOC_BASE_ADDR	/;"	d
IPU_SOC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IPU_SOC_BASE_ADDR	/;"	d
IPU_SOC_OFFSET	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IPU_SOC_OFFSET	/;"	d
IPU_SOC_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IPU_SOC_OFFSET	/;"	d
IPU_SRM_PRI1	drivers/video/ipu_regs.h	/^#define IPU_SRM_PRI1	/;"	d
IPU_SRM_PRI2	drivers/video/ipu_regs.h	/^#define IPU_SRM_PRI2	/;"	d
IPU_SRM_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_SRM_REG_BASE	/;"	d
IPU_STAT	drivers/video/ipu_regs.h	/^#define IPU_STAT	/;"	d
IPU_STAT_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_STAT_REG_BASE	/;"	d
IPU_SW_RST_TOUT_USEC	drivers/video/ipu_common.c	/^#define IPU_SW_RST_TOUT_USEC	/;"	d	file:
IPU_TASKS_STAT	drivers/video/mx3fb.c	/^#define IPU_TASKS_STAT	/;"	d	file:
IPU_TPM_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_TPM_REG_BASE	/;"	d
IPU_VDI_REG_BASE	drivers/video/ipu_regs.h	/^#define IPU_VDI_REG_BASE	/;"	d
IPU_VIDEO_IN_BUFFER	drivers/video/ipu.h	/^	IPU_VIDEO_IN_BUFFER = 3,	\/*< Buffer for input to IPU *\/$/;"	e	enum:__anon4a35f9fd0303
IPV4_CS	drivers/usb/eth/r8152.h	/^#define IPV4_CS	/;"	d
IPV4_FLOW	include/linux/ethtool.h	/^#define	IPV4_FLOW	/;"	d
IPV6_CS	drivers/usb/eth/r8152.h	/^#define IPV6_CS	/;"	d
IPV6_FLOW	include/linux/ethtool.h	/^#define	IPV6_FLOW	/;"	d
IP_DDR	arch/arm/include/asm/arch-omap3/mem.h	/^	IP_DDR = 1,$/;"	e	enum:__anonba94f5130103
IP_FLAGS	include/net.h	/^#define IP_FLAGS	/;"	d
IP_FLAGS_DFRAG	include/net.h	/^#define IP_FLAGS_DFRAG	/;"	d
IP_FLAGS_MFRAG	include/net.h	/^#define IP_FLAGS_MFRAG	/;"	d
IP_FLAGS_RES	include/net.h	/^#define IP_FLAGS_RES	/;"	d
IP_HDR_SIZE	include/net.h	/^#define IP_HDR_SIZE	/;"	d
IP_ICMP_HDR_SIZE	include/net.h	/^#define IP_ICMP_HDR_SIZE	/;"	d
IP_MAXUDP	net/net.c	/^#define IP_MAXUDP /;"	d	file:
IP_OFFS	include/net.h	/^#define IP_OFFS	/;"	d
IP_PKTSIZE	net/net.c	/^#define IP_PKTSIZE /;"	d	file:
IP_PROTOCOL_TCP	drivers/net/e1000.h	/^#define IP_PROTOCOL_TCP /;"	d
IP_PROTOCOL_UDP	drivers/net/e1000.h	/^#define IP_PROTOCOL_UDP /;"	d
IP_SDR	arch/arm/include/asm/arch-omap3/mem.h	/^	IP_SDR = 3,$/;"	e	enum:__anonba94f5130103
IP_UDP_HDR_SIZE	include/net.h	/^#define IP_UDP_HDR_SIZE	/;"	d
IP_USER_FLOW	include/linux/ethtool.h	/^#define	IP_USER_FLOW	/;"	d
IPos	lib/zlib/deflate.h	/^typedef unsigned IPos;$/;"	t	typeref:typename:unsigned
IR0	arch/x86/include/asm/i8259.h	/^#define	IR0	/;"	d
IR1	arch/x86/include/asm/i8259.h	/^#define	IR1	/;"	d
IR2	arch/x86/include/asm/i8259.h	/^#define	IR2	/;"	d
IR3	arch/x86/include/asm/i8259.h	/^#define	IR3	/;"	d
IR36021_AMD_MODE	board/freescale/common/vid.h	/^#define IR36021_AMD_MODE	/;"	d
IR36021_INTEL_MODE	board/freescale/common/vid.h	/^#define IR36021_INTEL_MODE	/;"	d
IR36021_INTEL_MODE_OOFSET	board/freescale/common/vid.h	/^#define IR36021_INTEL_MODE_OOFSET	/;"	d
IR36021_LOOP1_MANUAL_ID_OFFSET	board/freescale/common/vid.h	/^#define IR36021_LOOP1_MANUAL_ID_OFFSET	/;"	d
IR36021_LOOP1_VOUT_OFFSET	board/freescale/common/vid.h	/^#define IR36021_LOOP1_VOUT_OFFSET	/;"	d
IR36021_MFR_ID	board/freescale/common/vid.h	/^#define IR36021_MFR_ID	/;"	d
IR36021_MFR_ID_OFFSET	board/freescale/common/vid.h	/^#define IR36021_MFR_ID_OFFSET	/;"	d
IR36021_MODE_MASK	board/freescale/common/vid.h	/^#define IR36021_MODE_MASK	/;"	d
IR4	arch/x86/include/asm/i8259.h	/^#define	IR4	/;"	d
IR5	arch/x86/include/asm/i8259.h	/^#define	IR5	/;"	d
IR6	arch/x86/include/asm/i8259.h	/^#define	IR6	/;"	d
IR7	arch/x86/include/asm/i8259.h	/^#define	IR7	/;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define	IRAM_BASE_ADDR	/;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IRAM_BASE_ADDR	/;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IRAM_BASE_ADDR	/;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IRAM_BASE_ADDR /;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IRAM_BASE_ADDR	/;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IRAM_BASE_ADDR /;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define IRAM_BASE_ADDR /;"	d
IRAM_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define IRAM_BASE_ADDR	/;"	d
IRAM_IADD_AIE	include/fsl_fman.h	/^#define IRAM_IADD_AIE	/;"	d
IRAM_READY	include/fsl_fman.h	/^#define IRAM_READY	/;"	d
IRAM_SIZE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define IRAM_SIZE	/;"	d
IRAM_SIZE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define IRAM_SIZE	/;"	d
IRAM_SIZE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define IRAM_SIZE	/;"	d
IRAM_SIZE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define IRAM_SIZE /;"	d
IRAM_SIZE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define IRAM_SIZE	/;"	d
IRAM_SIZE	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define IRAM_SIZE /;"	d
IRAM_SIZE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define IRAM_SIZE	/;"	d
IRDACLKCR	arch/sh/include/asm/cpu_sh7723.h	/^#define IRDACLKCR /;"	d
IRDACLKCR	arch/sh/include/asm/cpu_sh7724.h	/^#define IRDACLKCR /;"	d
IRDACLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  IRDACLK_48MHZ	/;"	d
IRDACLK_EXT	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  IRDACLK_EXT	/;"	d
IRDACLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  IRDACLK_SYNTH	/;"	d
IRDARX_RACC	include/faraday/ftpmu010.h	/^	unsigned int	IRDARX_RACC;	\/* 0xCC *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
IRDATX_RACC	include/faraday/ftpmu010.h	/^	unsigned int	IRDATX_RACC;	\/* 0xC0 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
IRDA_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define IRDA_BASE	/;"	d
IRDA_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IRDA_BASE /;"	d
IRDA_FIRSEL_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRDA_FIRSEL_MARK,	IRDA_IN_MARK,	IRDA_OUT_MARK,$/;"	e	enum:__anona304c1340103	file:
IRDA_IN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRDA_FIRSEL_MARK,	IRDA_IN_MARK,	IRDA_OUT_MARK,$/;"	e	enum:__anona304c1340103	file:
IRDA_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define IRDA_OFFSET	/;"	d
IRDA_OUT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRDA_FIRSEL_MARK,	IRDA_IN_MARK,	IRDA_OUT_MARK,$/;"	e	enum:__anona304c1340103	file:
IRDA_RACC	include/faraday/ftpmu010.h	/^	unsigned int	IRDA_RACC;	\/* 0xD0 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
IRDA_SCIF	drivers/serial/serial_sh.h	/^# define IRDA_SCIF	/;"	d
IREN	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define IREN	/;"	d
IREN_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define IREN_P	/;"	d
IRIF_CRC0	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_CRC0 /;"	d
IRIF_CRC1	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_CRC1 /;"	d
IRIF_CRC2	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_CRC2 /;"	d
IRIF_CRC3	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_CRC3 /;"	d
IRIF_CRC4	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_CRC4 /;"	d
IRIF_INIT1	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_INIT1 /;"	d
IRIF_INIT2	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_INIT2 /;"	d
IRIF_RINTCLR	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_RINTCLR /;"	d
IRIF_SIR0	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR0 /;"	d
IRIF_SIR1	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR1 /;"	d
IRIF_SIR2	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR2 /;"	d
IRIF_SIR3	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR3 /;"	d
IRIF_SIR_EOF	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR_EOF /;"	d
IRIF_SIR_FLG	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR_FLG /;"	d
IRIF_SIR_FRM	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR_FRM /;"	d
IRIF_SIR_STS2	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_SIR_STS2 /;"	d
IRIF_TINTCLR	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_TINTCLR /;"	d
IRIF_UART0	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART0 /;"	d
IRIF_UART1	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART1 /;"	d
IRIF_UART2	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART2 /;"	d
IRIF_UART3	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART3 /;"	d
IRIF_UART4	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART4 /;"	d
IRIF_UART5	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART5 /;"	d
IRIF_UART6	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART6 /;"	d
IRIF_UART7	arch/sh/include/asm/cpu_sh7722.h	/^#define IRIF_UART7 /;"	d
IRIGB_R_IN	board/esd/pmc440/pmc440.h	/^#define IRIGB_R_IN /;"	d
IRIGB_R_OUT	board/esd/pmc440/pmc440.h	/^#define IRIGB_R_OUT /;"	d
IRLMASK_A	board/renesas/r2dplus/lowlevel_init.S	/^IRLMASK_A:	.long	0xA4000000	\/* IRLMASK Address *\/$/;"	l
IRLMASK_D	board/renesas/r2dplus/lowlevel_init.S	/^IRLMASK_D:	.long	0x00000000	\/* IRLMASK Data *\/$/;"	l
IRMCR	arch/sh/include/asm/cpu_sh7722.h	/^#define IRMCR	/;"	d
IRMCR	arch/sh/include/asm/cpu_sh7723.h	/^#define IRMCR	/;"	d
IRMCR	arch/sh/include/asm/cpu_sh7724.h	/^#define IRMCR	/;"	d
IRMCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	IRMCR	/;"	d
IROUT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IROUT_MARK,$/;"	e	enum:__anona304c1340103	file:
IRPAUSE	include/lattice.h	/^#define IRPAUSE	/;"	d
IRQ0_FPGA	board/esd/pmc440/pmc440.h	/^#define IRQ0_FPGA /;"	d
IRQ0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ0_GMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ0_IMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,$/;"	e	enum:__anona3077f190103	file:
IRQ0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,$/;"	e	enum:__anona307879b0103	file:
IRQ0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ0_MARK, SCIFB1_RXD_D_MARK, INTC_IRQ0_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ0_PORT13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ0_PORT2_MARK,	IRQ0_PORT13_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ0_PORT2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ0_PORT2_MARK,	IRQ0_PORT13_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ10_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ11_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ12_PORT42_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ12_PORT42_MARK,	IRQ12_PORT97_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ12_PORT97_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ12_PORT42_MARK,	IRQ12_PORT97_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ13_PORT64_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ13_PORT64_MARK,	IRQ13_PORT98_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ13_PORT98_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ13_PORT64_MARK,	IRQ13_PORT98_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ14_PORT63_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ14_PORT63_MARK,	IRQ14_PORT99_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ14_PORT99_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ14_PORT63_MARK,	IRQ14_PORT99_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ15_PORT100_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ15_PORT62_MARK,	IRQ15_PORT100_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ15_PORT62_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ15_PORT62_MARK,	IRQ15_PORT100_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ16_PORT211_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ16_PORT68_MARK,	IRQ16_PORT211_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ16_PORT68_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ16_PORT68_MARK,	IRQ16_PORT211_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ17_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ17_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ18_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ18_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ19_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ19_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ1_FPGA	board/esd/pmc440/pmc440.h	/^#define IRQ1_FPGA /;"	d
IRQ1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ1_GMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ1_IMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ1_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,$/;"	e	enum:__anona3077f190103	file:
IRQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,$/;"	e	enum:__anona307879b0103	file:
IRQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ1_MARK, SCIFB1_SCK_C_MARK, INTC_IRQ1_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ1_VBATG	include/power/tps65090.h	/^	IRQ1_VBATG = 1 << 3,$/;"	e	enum:__anon01d79aa50203
IRQ20_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ20_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ21_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ21_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ22_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ23_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ23_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ24_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ24_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ25_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ25_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ26_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define IRQ26_MODE	/;"	d
IRQ26_PORT58_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ26_PORT58_MARK,	IRQ26_PORT81_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ26_PORT81_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ26_PORT58_MARK,	IRQ26_PORT81_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ27_PORT168_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ27_PORT57_MARK,	IRQ27_PORT168_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ27_PORT57_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ27_PORT57_MARK,	IRQ27_PORT168_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ28_PORT169_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ28_PORT56_MARK,	IRQ28_PORT169_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ28_PORT56_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ28_PORT56_MARK,	IRQ28_PORT169_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ29_PORT170_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ29_PORT50_MARK,	IRQ29_PORT170_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ29_PORT50_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ29_PORT50_MARK,	IRQ29_PORT170_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ2_FPGA	board/esd/pmc440/pmc440.h	/^#define IRQ2_FPGA /;"	d
IRQ2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ2_GMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ2_IMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3077f190103	file:
IRQ2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,$/;"	e	enum:__anona307879b0103	file:
IRQ2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ2_MARK, SCIFB1_TXD_D_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ2_PORT11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ2_PORT11_MARK,	IRQ2_PORT12_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ2_PORT12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ2_PORT11_MARK,	IRQ2_PORT12_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ30_PORT171_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ30_PORT49_MARK,	IRQ30_PORT171_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ30_PORT49_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ30_PORT49_MARK,	IRQ30_PORT171_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ31_PORT167_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ31_PORT41_MARK,	IRQ31_PORT167_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ31_PORT41_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ31_PORT41_MARK,	IRQ31_PORT167_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ3_GMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ3_IMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3077f190103	file:
IRQ3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,$/;"	e	enum:__anona307879b0103	file:
IRQ3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ3_PORT10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ3_PORT10_MARK,	IRQ3_PORT14_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ3_PORT14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ3_PORT10_MARK,	IRQ3_PORT14_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ4_GMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ4_IMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ4_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ4_MARK, HRX1_C_MARK, SDA4_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK,$/;"	e	enum:__anona307901d0103	file:
IRQ4_PORT15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ4_PORT15_MARK,	IRQ4_PORT172_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ4_PORT172_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ4_PORT15_MARK,	IRQ4_PORT172_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ5_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ5_GMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ5_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	IRQ5_IMARK,$/;"	e	enum:__anona307945e0103	file:
IRQ5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
IRQ5_PORT0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ5_PORT0_MARK,	IRQ5_PORT1_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ5_PORT1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ5_PORT0_MARK,	IRQ5_PORT1_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ6_PORT121_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ6_PORT121_MARK,	IRQ6_PORT173_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ6_PORT173_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ6_PORT121_MARK,	IRQ6_PORT173_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK,$/;"	e	enum:__anona307901d0103	file:
IRQ7_PORT120_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ7_PORT120_MARK,	IRQ7_PORT209_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ7_PORT209_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ7_PORT120_MARK,	IRQ7_PORT209_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ8_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ8_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
IRQ8_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_CDE_MARK, SSI_SDATA7_MARK, SCIFA2_TXD_B_MARK, IRQ8_MARK,$/;"	e	enum:__anona307901d0103	file:
IRQ9_MCP_INT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	IRQ9_MCP_INT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
IRQ9_MEM_INT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	IRQ9_MEM_INT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
IRQ9_PORT118_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ9_PORT118_MARK,	IRQ9_PORT210_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQ9_PORT210_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	IRQ9_PORT118_MARK,	IRQ9_PORT210_MARK,$/;"	e	enum:__anona304c1340103	file:
IRQCR_OFFSET	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define IRQCR_OFFSET	/;"	d
IRQD	include/sym53c8xx.h	/^	#define   IRQD /;"	d
IRQM	include/sym53c8xx.h	/^	#define   IRQM /;"	d
IRQSTAT	include/fsl_esdhc.h	/^#define IRQSTAT	/;"	d
IRQSTATEN	include/fsl_esdhc.h	/^#define IRQSTATEN	/;"	d
IRQSTATEN_AC12E	include/fsl_esdhc.h	/^#define IRQSTATEN_AC12E	/;"	d
IRQSTATEN_BGE	include/fsl_esdhc.h	/^#define IRQSTATEN_BGE	/;"	d
IRQSTATEN_BRR	include/fsl_esdhc.h	/^#define IRQSTATEN_BRR	/;"	d
IRQSTATEN_BWR	include/fsl_esdhc.h	/^#define IRQSTATEN_BWR	/;"	d
IRQSTATEN_CC	include/fsl_esdhc.h	/^#define IRQSTATEN_CC	/;"	d
IRQSTATEN_CCE	include/fsl_esdhc.h	/^#define IRQSTATEN_CCE	/;"	d
IRQSTATEN_CEBE	include/fsl_esdhc.h	/^#define IRQSTATEN_CEBE	/;"	d
IRQSTATEN_CIE	include/fsl_esdhc.h	/^#define IRQSTATEN_CIE	/;"	d
IRQSTATEN_CINS	include/fsl_esdhc.h	/^#define IRQSTATEN_CINS	/;"	d
IRQSTATEN_CINT	include/fsl_esdhc.h	/^#define IRQSTATEN_CINT	/;"	d
IRQSTATEN_CRM	include/fsl_esdhc.h	/^#define IRQSTATEN_CRM	/;"	d
IRQSTATEN_CTOE	include/fsl_esdhc.h	/^#define IRQSTATEN_CTOE	/;"	d
IRQSTATEN_DCE	include/fsl_esdhc.h	/^#define IRQSTATEN_DCE	/;"	d
IRQSTATEN_DEBE	include/fsl_esdhc.h	/^#define IRQSTATEN_DEBE	/;"	d
IRQSTATEN_DINT	include/fsl_esdhc.h	/^#define IRQSTATEN_DINT	/;"	d
IRQSTATEN_DMAE	include/fsl_esdhc.h	/^#define IRQSTATEN_DMAE	/;"	d
IRQSTATEN_DTOE	include/fsl_esdhc.h	/^#define IRQSTATEN_DTOE	/;"	d
IRQSTATEN_TC	include/fsl_esdhc.h	/^#define IRQSTATEN_TC	/;"	d
IRQSTAT_AC12E	include/fsl_esdhc.h	/^#define IRQSTAT_AC12E	/;"	d
IRQSTAT_BGE	include/fsl_esdhc.h	/^#define IRQSTAT_BGE	/;"	d
IRQSTAT_BRR	include/fsl_esdhc.h	/^#define IRQSTAT_BRR	/;"	d
IRQSTAT_BWR	include/fsl_esdhc.h	/^#define IRQSTAT_BWR	/;"	d
IRQSTAT_CC	include/fsl_esdhc.h	/^#define IRQSTAT_CC	/;"	d
IRQSTAT_CCE	include/fsl_esdhc.h	/^#define IRQSTAT_CCE	/;"	d
IRQSTAT_CEBE	include/fsl_esdhc.h	/^#define IRQSTAT_CEBE	/;"	d
IRQSTAT_CIE	include/fsl_esdhc.h	/^#define IRQSTAT_CIE	/;"	d
IRQSTAT_CINS	include/fsl_esdhc.h	/^#define IRQSTAT_CINS	/;"	d
IRQSTAT_CINT	include/fsl_esdhc.h	/^#define IRQSTAT_CINT	/;"	d
IRQSTAT_CRM	include/fsl_esdhc.h	/^#define IRQSTAT_CRM	/;"	d
IRQSTAT_CTOE	include/fsl_esdhc.h	/^#define IRQSTAT_CTOE	/;"	d
IRQSTAT_DCE	include/fsl_esdhc.h	/^#define IRQSTAT_DCE	/;"	d
IRQSTAT_DEBE	include/fsl_esdhc.h	/^#define IRQSTAT_DEBE	/;"	d
IRQSTAT_DINT	include/fsl_esdhc.h	/^#define IRQSTAT_DINT	/;"	d
IRQSTAT_DMAE	include/fsl_esdhc.h	/^#define IRQSTAT_DMAE	/;"	d
IRQSTAT_DTOE	include/fsl_esdhc.h	/^#define IRQSTAT_DTOE	/;"	d
IRQSTAT_TC	include/fsl_esdhc.h	/^#define IRQSTAT_TC	/;"	d
IRQ_ACFAIL	include/tsi148.h	/^#define IRQ_ACFAIL	/;"	d
IRQ_ACFAIL	include/universe.h	/^#define IRQ_ACFAIL /;"	d
IRQ_AHBERR	drivers/block/ftide020.h	/^#define IRQ_AHBERR	/;"	d
IRQ_CPU_PACKET_TRANSMITTED_EVENT	board/gdsys/common/cmd_ioloop.c	/^	IRQ_CPU_PACKET_TRANSMITTED_EVENT = 1<<6,$/;"	e	enum:__anon6137e5c30303	file:
IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS	board/gdsys/common/cmd_ioloop.c	/^	IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = 1<<8,$/;"	e	enum:__anon6137e5c30303	file:
IRQ_CPU_TRANSMITBUFFER_FREE_STATUS	board/gdsys/common/cmd_ioloop.c	/^	IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = 1<<5,$/;"	e	enum:__anon6137e5c30303	file:
IRQ_DEDI	drivers/net/ks8851_mll.h	/^#define IRQ_DEDI	/;"	d
IRQ_DMA	include/tsi148.h	/^#define IRQ_DMA	/;"	d
IRQ_DMA	include/universe.h	/^#define IRQ_DMA /;"	d
IRQ_EDI	drivers/net/ks8851_mll.h	/^#define IRQ_EDI	/;"	d
IRQ_ENA	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define IRQ_ENA	/;"	d
IRQ_ETH0	board/esd/pmc440/pmc440.h	/^#define IRQ_ETH0 /;"	d
IRQ_ETH1	board/esd/pmc440/pmc440.h	/^#define IRQ_ETH1 /;"	d
IRQ_HANDLED	include/linux/compat.h	/^#define IRQ_HANDLED /;"	d
IRQ_IACK	include/tsi148.h	/^#define IRQ_IACK	/;"	d
IRQ_IACK	include/universe.h	/^#define IRQ_IACK /;"	d
IRQ_IIRQ	drivers/block/ftide020.h	/^#define IRQ_IIRQ	/;"	d
IRQ_LCI	drivers/net/ks8851_mll.h	/^#define IRQ_LCI	/;"	d
IRQ_LDI	drivers/net/ks8851_mll.h	/^#define IRQ_LDI	/;"	d
IRQ_LERR	include/tsi148.h	/^#define IRQ_LERR	/;"	d
IRQ_LERR	include/universe.h	/^#define IRQ_LERR /;"	d
IRQ_MASK	arch/powerpc/include/asm/xilinx_irq.h	/^#define IRQ_MASK(/;"	d
IRQ_MAX	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define IRQ_MAX	/;"	d
IRQ_MAX	arch/powerpc/include/asm/xilinx_irq.h	/^#define IRQ_MAX	/;"	d
IRQ_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define IRQ_MODE	/;"	d
IRQ_NEW_CPU_PACKET_RECEIVED_EVENT	board/gdsys/common/cmd_ioloop.c	/^	IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = 1<<7,$/;"	e	enum:__anon6137e5c30303	file:
IRQ_NONE	include/linux/compat.h	/^#define IRQ_NONE /;"	d
IRQ_PAD_CTRL	board/gateworks/gw_ventana/common.h	/^#define IRQ_PAD_CTRL /;"	d
IRQ_PCIA	board/esd/pmc440/pmc440.h	/^#define IRQ_PCIA /;"	d
IRQ_PCIB	board/esd/pmc440/pmc440.h	/^#define IRQ_PCIB /;"	d
IRQ_PCIC	board/esd/pmc440/pmc440.h	/^#define IRQ_PCIC /;"	d
IRQ_PCID	board/esd/pmc440/pmc440.h	/^#define IRQ_PCID /;"	d
IRQ_REG_CCV_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_CCV_MASK	/;"	d
IRQ_REG_CCV_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_CCV_POS	/;"	d
IRQ_REG_CI	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_CI	/;"	d
IRQ_REG_CIC_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_CIC_MASK	/;"	d
IRQ_REG_CIC_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_CIC_POS	/;"	d
IRQ_REG_DI	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_DI	/;"	d
IRQ_REG_DIC_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_DIC_MASK	/;"	d
IRQ_REG_DIC_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_DIC_POS	/;"	d
IRQ_REG_DTV_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_DTV_MASK	/;"	d
IRQ_REG_DTV_POS	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_DTV_POS	/;"	d
IRQ_REG_EI	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_EI	/;"	d
IRQ_REG_IRQ_MASK	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_IRQ_MASK	/;"	d
IRQ_REG_PLB_RD_NMI	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_PLB_RD_NMI	/;"	d
IRQ_REG_PLB_WR_NMI	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_PLB_WR_NMI	/;"	d
IRQ_REG_WRCQ_EMPTY	drivers/net/xilinx_ll_temac_sdma.h	/^#define IRQ_REG_WRCQ_EMPTY	/;"	d
IRQ_RESVD_FIRQ	drivers/block/ftide020.h	/^#define IRQ_RESVD_FIRQ	/;"	d
IRQ_RFAEIRQ	drivers/block/ftide020.h	/^#define IRQ_RFAEIRQ	/;"	d
IRQ_RFNEIRQ	drivers/block/ftide020.h	/^#define IRQ_RFNEIRQ	/;"	d
IRQ_RTC	board/esd/pmc440/pmc440.h	/^#define IRQ_RTC /;"	d
IRQ_RXI	drivers/net/ks8851_mll.h	/^#define IRQ_RXI	/;"	d
IRQ_RXMPDI	drivers/net/ks8851_mll.h	/^#define IRQ_RXMPDI	/;"	d
IRQ_RXOI	drivers/net/ks8851_mll.h	/^#define IRQ_RXOI	/;"	d
IRQ_RXPSI	drivers/net/ks8851_mll.h	/^#define IRQ_RXPSI	/;"	d
IRQ_RXTHRESH	drivers/block/ftide020.h	/^#define IRQ_RXTHRESH(/;"	d
IRQ_RXWFDI	drivers/net/ks8851_mll.h	/^#define IRQ_RXWFDI	/;"	d
IRQ_SLOT_COUNT	arch/x86/Kconfig	/^config IRQ_SLOT_COUNT$/;"	c	menu:x86 architecture
IRQ_SPIBEI	drivers/net/ks8851_mll.h	/^#define IRQ_SPIBEI	/;"	d
IRQ_STACK_START	arch/arm/lib/vectors.S	/^IRQ_STACK_START:$/;"	l
IRQ_STACK_START	arch/nds32/cpu/n1213/start.S	/^IRQ_STACK_START:$/;"	l
IRQ_STACK_START_IN	arch/arm/lib/vectors.S	/^IRQ_STACK_START_IN:$/;"	l
IRQ_STACK_START_IN	arch/nds32/cpu/n1213/start.S	/^IRQ_STACK_START_IN:$/;"	l
IRQ_SWINT	include/tsi148.h	/^#define IRQ_SWINT	/;"	d
IRQ_SWINT	include/universe.h	/^#define IRQ_SWINT /;"	d
IRQ_SYSFAIL	include/tsi148.h	/^#define IRQ_SYSFAIL	/;"	d
IRQ_SYSFAIL	include/universe.h	/^#define IRQ_SYSFAIL /;"	d
IRQ_TERMERR	drivers/block/ftide020.h	/^#define IRQ_TERMERR	/;"	d
IRQ_TXI	drivers/net/ks8851_mll.h	/^#define IRQ_TXI	/;"	d
IRQ_TXPSI	drivers/net/ks8851_mll.h	/^#define IRQ_TXPSI	/;"	d
IRQ_TXSAI	drivers/net/ks8851_mll.h	/^#define IRQ_TXSAI	/;"	d
IRQ_TXTHRESH	drivers/block/ftide020.h	/^#define IRQ_TXTHRESH(/;"	d
IRQ_TYPE_EDGE_BOTH	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_BOTH	include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_BOTH	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_FALLING	include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_FALLING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_EDGE_RISING	include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_EDGE_RISING	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_HIGH	include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_HIGH	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_LEVEL_LOW	include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_LEVEL_LOW	/;"	d
IRQ_TYPE_NONE	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_TYPE_NONE	include/dt-bindings/interrupt-controller/irq.h	/^#define IRQ_TYPE_NONE	/;"	d
IRQ_VERR	include/tsi148.h	/^#define IRQ_VERR	/;"	d
IRQ_VERR	include/universe.h	/^#define IRQ_VERR /;"	d
IRQ_VIRQ1	include/tsi148.h	/^#define IRQ_VIRQ1	/;"	d
IRQ_VIRQ1	include/universe.h	/^#define IRQ_VIRQ1 /;"	d
IRQ_VIRQ2	include/tsi148.h	/^#define IRQ_VIRQ2	/;"	d
IRQ_VIRQ2	include/universe.h	/^#define IRQ_VIRQ2 /;"	d
IRQ_VIRQ3	include/tsi148.h	/^#define IRQ_VIRQ3	/;"	d
IRQ_VIRQ3	include/universe.h	/^#define IRQ_VIRQ3 /;"	d
IRQ_VIRQ4	include/tsi148.h	/^#define IRQ_VIRQ4	/;"	d
IRQ_VIRQ4	include/universe.h	/^#define IRQ_VIRQ4 /;"	d
IRQ_VIRQ5	include/tsi148.h	/^#define IRQ_VIRQ5	/;"	d
IRQ_VIRQ5	include/universe.h	/^#define IRQ_VIRQ5 /;"	d
IRQ_VIRQ6	include/tsi148.h	/^#define IRQ_VIRQ6	/;"	d
IRQ_VIRQ6	include/universe.h	/^#define IRQ_VIRQ6 /;"	d
IRQ_VIRQ7	include/tsi148.h	/^#define IRQ_VIRQ7	/;"	d
IRQ_VIRQ7	include/universe.h	/^#define IRQ_VIRQ7 /;"	d
IRQ_VOWN	include/tsi148.h	/^#define IRQ_VOWN	/;"	d
IRQ_VOWN	include/universe.h	/^#define IRQ_VOWN /;"	d
IRQ_WAIT	drivers/i2c/sh_i2c.c	/^#define IRQ_WAIT /;"	d	file:
IRQ_WAIT	drivers/i2c/sh_sh7734_i2c.c	/^#define IRQ_WAIT /;"	d	file:
IRQ_WAKE_THREAD	include/linux/compat.h	/^#define IRQ_WAKE_THREAD /;"	d
IRQ_WFAFIRQ	drivers/block/ftide020.h	/^#define IRQ_WFAFIRQ	/;"	d
IRQ_WFNFIRQ	drivers/block/ftide020.h	/^#define IRQ_WFNFIRQ	/;"	d
IRQ_res	include/tsi148.h	/^#define IRQ_res	/;"	d
IRQ_res	include/universe.h	/^#define IRQ_res /;"	d
IRR	arch/x86/include/asm/i8259.h	/^#define IRR	/;"	d
IRR0	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR0	/;"	d
IRR1	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR1	/;"	d
IRR2	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR2	/;"	d
IRR3	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR3	/;"	d
IRR4	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR4	/;"	d
IRR5	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR5	/;"	d
IRR6	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR6	/;"	d
IRR7	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR7	/;"	d
IRR8	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR8	/;"	d
IRR9	arch/sh/include/asm/cpu_sh7720.h	/^#define IRR9	/;"	d
IRST	include/sym53c8xx.h	/^  #define   IRST /;"	d
IRTL_1024_NS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_1024_NS	/;"	d
IRTL_1024_NS	arch/x86/include/asm/msr-index.h	/^#define  IRTL_1024_NS	/;"	d
IRTL_1048576_NS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_1048576_NS	/;"	d
IRTL_1048576_NS	arch/x86/include/asm/msr-index.h	/^#define  IRTL_1048576_NS	/;"	d
IRTL_1_NS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_1_NS	/;"	d
IRTL_1_NS	arch/x86/include/asm/msr-index.h	/^#define  IRTL_1_NS	/;"	d
IRTL_32768_NS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_32768_NS	/;"	d
IRTL_32768_NS	arch/x86/include/asm/msr-index.h	/^#define  IRTL_32768_NS	/;"	d
IRTL_32_NS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_32_NS	/;"	d
IRTL_32_NS	arch/x86/include/asm/msr-index.h	/^#define  IRTL_32_NS	/;"	d
IRTL_33554432_NS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_33554432_NS	/;"	d
IRTL_33554432_NS	arch/x86/include/asm/msr-index.h	/^#define  IRTL_33554432_NS	/;"	d
IRTL_RESPONSE_MASK	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_RESPONSE_MASK	/;"	d
IRTL_RESPONSE_MASK	arch/x86/include/asm/msr-index.h	/^#define  IRTL_RESPONSE_MASK	/;"	d
IRTL_VALID	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  IRTL_VALID	/;"	d
IRTL_VALID	arch/x86/include/asm/msr-index.h	/^#define  IRTL_VALID	/;"	d
IR_16CRC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_16CRC /;"	d
IR_CONFIG_1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_CONFIG_1 /;"	d
IR_CONFIG_2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_CONFIG_2 /;"	d
IR_DMA_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_DMA_ENABLE /;"	d
IR_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_ENABLE /;"	d
IR_FIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_FIR /;"	d
IR_INTERFACE_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_INTERFACE_CONFIG /;"	d
IR_INT_CLEAR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_INT_CLEAR /;"	d
IR_LOOPBACK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_LOOPBACK /;"	d
IR_MAX_PKT_LEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_MAX_PKT_LEN /;"	d
IR_MIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_MIR /;"	d
IR_MODE_INV	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_MODE_INV /;"	d
IR_ONE_PIN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_ONE_PIN /;"	d
IR_READ_PHY_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_READ_PHY_CONFIG /;"	d
IR_RING_ADDR_CMPR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RING_ADDR_CMPR /;"	d
IR_RING_BASE_ADDR_H	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RING_BASE_ADDR_H /;"	d
IR_RING_BASE_ADDR_L	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RING_BASE_ADDR_L /;"	d
IR_RING_PROMPT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RING_PROMPT /;"	d
IR_RING_PTR_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RING_PTR_STATUS /;"	d
IR_RING_SIZE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RING_SIZE /;"	d
IR_RX_ALL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RX_ALL /;"	d
IR_RX_BYTE_CNT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RX_BYTE_CNT /;"	d
IR_RX_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RX_ENABLE /;"	d
IR_RX_INVERT_LED	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RX_INVERT_LED /;"	d
IR_RX_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_RX_STATUS /;"	d
IR_SF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_SF /;"	d
IR_SIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_SIR /;"	d
IR_SIR_FLAGS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_SIR_FLAGS /;"	d
IR_SIR_MODE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_SIR_MODE	/;"	d
IR_ST	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_ST /;"	d
IR_TD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_TD /;"	d
IR_TX_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_TX_ENABLE /;"	d
IR_TX_INVERT_LED	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_TX_INVERT_LED /;"	d
IR_TX_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_TX_STATUS /;"	d
IR_VDD_STEP_DOWN	board/freescale/common/vid.h	/^#define IR_VDD_STEP_DOWN	/;"	d
IR_VDD_STEP_DOWN	include/configs/ls2080ardb.h	/^#define IR_VDD_STEP_DOWN	/;"	d
IR_VDD_STEP_UP	board/freescale/common/vid.h	/^#define IR_VDD_STEP_UP	/;"	d
IR_VDD_STEP_UP	include/configs/ls2080ardb.h	/^#define IR_VDD_STEP_UP	/;"	d
IR_WRITE_PHY_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define IR_WRITE_PHY_CONFIG /;"	d
ISA_ARCOMPACT	arch/arc/Kconfig	/^config ISA_ARCOMPACT$/;"	c	choice:ARC architecture""choice763e4ef80104
ISA_ARCV2	arch/arc/Kconfig	/^config ISA_ARCV2$/;"	c	choice:ARC architecture""choice763e4ef80104
ISA_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define ISA_BASE_ADDR /;"	d
ISA_END_ADDRESS	arch/x86/include/asm/e820.h	/^#define ISA_END_ADDRESS	/;"	d
ISA_OFFSET	drivers/net/ax88796.h	/^#define ISA_OFFSET	/;"	d
ISA_START_ADDRESS	arch/x86/include/asm/e820.h	/^#define ISA_START_ADDRESS	/;"	d
ISB	arch/arm/include/asm/barriers.h	/^#define ISB	/;"	d
ISCON	include/sym53c8xx.h	/^  #define   ISCON /;"	d
ISC_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define ISC_BASE	/;"	d
ISDIRDELIM	include/fat.h	/^#define ISDIRDELIM(/;"	d
ISEL	drivers/usb/host/r8a66597.h	/^#define	ISEL	/;"	d
ISIPHYCTRL	include/usb/ehci-ci.h	/^#define ISIPHYCTRL	/;"	d
ISOCHRONOUS	include/usbdescriptors.h	/^#define ISOCHRONOUS	/;"	d
ISOC_IN_EP	drivers/usb/host/xhci.h	/^#define ISOC_IN_EP	/;"	d
ISOC_OUT_EP	drivers/usb/host/xhci.h	/^#define ISOC_OUT_EP	/;"	d
ISOEASR_EP	include/usb/fotg210.h	/^#define ISOEASR_EP(/;"	d
ISOLATE_IO	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define ISOLATE_IO	/;"	d
ISOLATE_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define ISOLATE_REG	/;"	d
ISO_ENTRY_NUMBERS	include/part.h	/^#define ISO_ENTRY_NUMBERS	/;"	d
ISO_FIFO_SIZE	drivers/usb/gadget/pxa25x_udc.h	/^#define ISO_FIFO_SIZE	/;"	d
ISO_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ISO_R	/;"	d
ISO_STRING	board/mpl/mip405/Kconfig	/^config ISO_STRING$/;"	c
ISO_STRING	board/mpl/pati/Kconfig	/^config ISO_STRING$/;"	c
ISO_STRING	board/mpl/pip405/Kconfig	/^config ISO_STRING$/;"	c
ISO_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ISO_T	/;"	d
ISO_UPDATE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define ISO_UPDATE	/;"	d
ISP116x_ATL_BUFSIZE	drivers/usb/host/isp116x.h	/^#define ISP116x_ATL_BUFSIZE	/;"	d
ISP116x_BUF_SIZE	drivers/usb/host/isp116x.h	/^#define ISP116x_BUF_SIZE	/;"	d
ISP116x_ITL_BUFSIZE	drivers/usb/host/isp116x.h	/^#define ISP116x_ITL_BUFSIZE	/;"	d
ISP116x_WRITE_OFFSET	drivers/usb/host/isp116x.h	/^#define ISP116x_WRITE_OFFSET	/;"	d
ISP1301_I2C_ADDR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_ADDR	/;"	d	file:
ISP1301_I2C_INTERRUPT_FALLING_CLR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_INTERRUPT_FALLING_CLR	/;"	d	file:
ISP1301_I2C_INTERRUPT_LATCH_CLR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_INTERRUPT_LATCH_CLR	/;"	d	file:
ISP1301_I2C_INTERRUPT_RISING_CLR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_INTERRUPT_RISING_CLR	/;"	d	file:
ISP1301_I2C_MODE_CONTROL_1_CLR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_MODE_CONTROL_1_CLR	/;"	d	file:
ISP1301_I2C_MODE_CONTROL_1_SET	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_MODE_CONTROL_1_SET	/;"	d	file:
ISP1301_I2C_MODE_CONTROL_2_CLR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_MODE_CONTROL_2_CLR	/;"	d	file:
ISP1301_I2C_MODE_CONTROL_2_SET	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_MODE_CONTROL_2_SET	/;"	d	file:
ISP1301_I2C_OTG_CONTROL_1_CLR	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_OTG_CONTROL_1_CLR	/;"	d	file:
ISP1301_I2C_OTG_CONTROL_1_SET	drivers/usb/host/ohci-lpc32xx.c	/^#define ISP1301_I2C_OTG_CONTROL_1_SET	/;"	d	file:
ISPE_AN	drivers/net/xilinx_ll_temac.h	/^#define ISPE_AN	/;"	d
ISPE_HAC	drivers/net/xilinx_ll_temac.h	/^#define ISPE_HAC	/;"	d
ISPE_MR	drivers/net/xilinx_ll_temac.h	/^#define ISPE_MR	/;"	d
ISPE_RC	drivers/net/xilinx_ll_temac.h	/^#define ISPE_RC	/;"	d
ISPE_RDL	drivers/net/xilinx_ll_temac.h	/^#define ISPE_RDL	/;"	d
ISPE_RFO	drivers/net/xilinx_ll_temac.h	/^#define ISPE_RFO	/;"	d
ISPE_RR	drivers/net/xilinx_ll_temac.h	/^#define ISPE_RR	/;"	d
ISPE_TC	drivers/net/xilinx_ll_temac.h	/^#define ISPE_TC	/;"	d
ISQ_BufEvent	drivers/net/cs8900.h	/^#define ISQ_BufEvent /;"	d
ISQ_EventMask	drivers/net/cs8900.h	/^#define ISQ_EventMask /;"	d
ISQ_RxEvent	drivers/net/cs8900.h	/^#define ISQ_RxEvent /;"	d
ISQ_RxMissEvent	drivers/net/cs8900.h	/^#define ISQ_RxMissEvent /;"	d
ISQ_TxColEvent	drivers/net/cs8900.h	/^#define ISQ_TxColEvent /;"	d
ISQ_TxEvent	drivers/net/cs8900.h	/^#define ISQ_TxEvent /;"	d
ISR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define ISR(/;"	d
ISR	arch/powerpc/include/asm/xilinx_irq.h	/^#define ISR	/;"	d
ISR	arch/x86/include/asm/i8259.h	/^#define ISR	/;"	d
ISR	drivers/net/ax88180.h	/^#define ISR	/;"	d
ISR0	arch/sh/include/asm/cpu_sh7722.h	/^#define ISR0 /;"	d
ISRAM0_BEAR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_BEAR	/;"	d
ISRAM0_BESR0	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_BESR0	/;"	d
ISRAM0_BESR1	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_BESR1	/;"	d
ISRAM0_CID	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_CID	/;"	d
ISRAM0_DCR_BASE	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_DCR_BASE /;"	d
ISRAM0_DPC	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_DPC	/;"	d
ISRAM0_PMEG	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_PMEG	/;"	d
ISRAM0_REVID	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_REVID	/;"	d
ISRAM0_SB0CR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_SB0CR	/;"	d
ISRAM0_SB1CR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_SB1CR	/;"	d
ISRAM0_SB2CR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_SB2CR	/;"	d
ISRAM0_SB3CR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM0_SB3CR	/;"	d
ISRAM1_BEAR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_BEAR	/;"	d
ISRAM1_BESR0	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_BESR0	/;"	d
ISRAM1_BESR1	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_BESR1	/;"	d
ISRAM1_CID	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_CID	/;"	d
ISRAM1_DCR_BASE	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_DCR_BASE /;"	d
ISRAM1_DPC	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_DPC	/;"	d
ISRAM1_PMEG	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_PMEG	/;"	d
ISRAM1_REVID	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_REVID	/;"	d
ISRAM1_SB0CR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_SB0CR	/;"	d
ISRAM1_SIZE	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define ISRAM1_SIZE /;"	d
ISR_0	drivers/mtd/nand/tegra_nand.h	/^#define ISR_0	/;"	d
ISR_1	board/mpl/common/isa.c	/^#define ISR_1	/;"	d	file:
ISR_2	board/mpl/common/isa.c	/^#define ISR_2	/;"	d	file:
ISR_ACKNAK	drivers/i2c/mv_i2c.h	/^#define ISR_ACKNAK	/;"	d
ISR_AHBERR	drivers/net/ftmac110.h	/^#define ISR_AHBERR /;"	d
ISR_ALD	drivers/i2c/mv_i2c.h	/^#define ISR_ALD	/;"	d
ISR_ALL	drivers/net/ftmac110.h	/^#define ISR_ALL /;"	d
ISR_BED	drivers/i2c/mv_i2c.h	/^#define ISR_BED	/;"	d
ISR_CMDBUSY_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_CMDBUSY_MASK	/;"	d	file:
ISR_CONTROLLER_READY	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ISR_CONTROLLER_READY /;"	d	file:
ISR_DECODER_ERROR	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ISR_DECODER_ERROR /;"	d	file:
ISR_DECODER_ERRORS	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ISR_DECODER_ERRORS(/;"	d	file:
ISR_DECODER_FAILURE	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ISR_DECODER_FAILURE /;"	d	file:
ISR_DEV	include/usb/fotg210.h	/^#define ISR_DEV /;"	d
ISR_ECC_READY	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ISR_ECC_READY /;"	d	file:
ISR_ERR_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_ERR_MASK	/;"	d	file:
ISR_GCAD	drivers/i2c/mv_i2c.h	/^#define ISR_GCAD	/;"	d
ISR_HOST	include/usb/fotg210.h	/^#define ISR_HOST /;"	d
ISR_IBB	drivers/i2c/mv_i2c.h	/^#define ISR_IBB	/;"	d
ISR_IRF	drivers/i2c/mv_i2c.h	/^#define ISR_IRF	/;"	d
ISR_IS_CMD_DONE	drivers/mtd/nand/tegra_nand.h	/^#define ISR_IS_CMD_DONE	/;"	d
ISR_IS_ECC_ERR	drivers/mtd/nand/tegra_nand.h	/^#define ISR_IS_ECC_ERR	/;"	d
ISR_ITE	drivers/i2c/mv_i2c.h	/^#define ISR_ITE	/;"	d
ISR_MASK	include/usb/fotg210.h	/^#define ISR_MASK /;"	d
ISR_NAND_READY	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define ISR_NAND_READY /;"	d	file:
ISR_NOACK_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_NOACK_MASK	/;"	d	file:
ISR_NORXBUF	drivers/net/ftmac110.h	/^#define ISR_NORXBUF /;"	d
ISR_NOTXBUF	drivers/net/ftmac110.h	/^#define ISR_NOTXBUF /;"	d
ISR_OFFSET	drivers/i2c/kona_i2c.c	/^#define ISR_OFFSET	/;"	d	file:
ISR_OTG	include/usb/fotg210.h	/^#define ISR_OTG /;"	d
ISR_PHY	drivers/net/ax88180.h	/^  #define ISR_PHY	/;"	d
ISR_PHYSTCHG	drivers/net/ftmac110.h	/^#define ISR_PHYSTCHG /;"	d
ISR_PRS	drivers/net/dm9000x.h	/^#define ISR_PRS	/;"	d
ISR_PTS	drivers/net/dm9000x.h	/^#define ISR_PTS	/;"	d
ISR_READ_COMPLETE_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_READ_COMPLETE_MASK	/;"	d	file:
ISR_RESERVED_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_RESERVED_MASK	/;"	d	file:
ISR_ROOS	drivers/net/dm9000x.h	/^#define ISR_ROOS	/;"	d
ISR_ROS	drivers/net/dm9000x.h	/^#define ISR_ROS	/;"	d
ISR_RWM	drivers/i2c/mv_i2c.h	/^#define ISR_RWM	/;"	d
ISR_RX	drivers/net/ax88180.h	/^  #define ISR_RX	/;"	d
ISR_RXBUFFOVR	drivers/net/ax88180.h	/^  #define ISR_RXBUFFOVR	/;"	d
ISR_RXFIFO	drivers/net/ftmac110.h	/^#define ISR_RXFIFO /;"	d
ISR_RXLOST	drivers/net/ftmac110.h	/^#define ISR_RXLOST /;"	d
ISR_RXOK	drivers/net/ftmac110.h	/^#define ISR_RXOK /;"	d
ISR_SAD	drivers/i2c/mv_i2c.h	/^#define ISR_SAD	/;"	d
ISR_SES_DONE_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_SES_DONE_MASK	/;"	d	file:
ISR_SSD	drivers/i2c/mv_i2c.h	/^#define ISR_SSD	/;"	d
ISR_TX	drivers/net/ax88180.h	/^  #define ISR_TX	/;"	d
ISR_TXFIFO	drivers/net/ftmac110.h	/^#define ISR_TXFIFO /;"	d
ISR_TXFIFOEMPTY_MASK	drivers/i2c/kona_i2c.c	/^#define ISR_TXFIFOEMPTY_MASK	/;"	d	file:
ISR_TXLOST	drivers/net/ftmac110.h	/^#define ISR_TXLOST /;"	d
ISR_TXOK	drivers/net/ftmac110.h	/^#define ISR_TXOK /;"	d
ISR_UB	drivers/i2c/mv_i2c.h	/^#define ISR_UB	/;"	d
ISR_WATCHDOG	drivers/net/ax88180.h	/^  #define ISR_WATCHDOG	/;"	d
ISSET_BH	lib/bzip2/bzlib_blocksort.c	/^#define     ISSET_BH(/;"	d	file:
ISS_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define ISS_CLKCTRL_OPTFCLKEN_MASK	/;"	d
ISS_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define ISS_CLKCTRL_OPTFCLKEN_MASK	/;"	d
ISTAT	include/sym53c8xx.h	/^#define ISTAT	/;"	d
ISW_ENTRY_ADDR	arch/arm/cpu/armv7/am33xx/Kconfig	/^config ISW_ENTRY_ADDR$/;"	c
ISYNC	board/tqc/tqm834x/tqm834x.c	/^#define ISYNC	/;"	d	file:
ISYNC_CNTL	include/radeon.h	/^#define ISYNC_CNTL	/;"	d
IS_ACC_ECC_EN	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define IS_ACC_ECC_EN(/;"	d	file:
IS_ACTIVE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define IS_ACTIVE(/;"	d
IS_ALIGNED	include/linux/kernel.h	/^#define IS_ALIGNED(/;"	d
IS_BUILTIN	include/linux/kconfig.h	/^#define IS_BUILTIN(/;"	d
IS_CMOS_PORT	drivers/bios_emulator/besys.c	/^#define IS_CMOS_PORT(/;"	d	file:
IS_DBI	drivers/ddr/fsl/fsl_ddr_gen4.c	/^#define IS_DBI(/;"	d	file:
IS_DL10019	drivers/net/ne2000.c	/^#define IS_DL10019	/;"	d	file:
IS_DL10022	drivers/net/ne2000.c	/^#define IS_DL10022	/;"	d	file:
IS_ELF	include/elf.h	/^#define IS_ELF(/;"	d
IS_ENABLED	include/linux/kconfig.h	/^#define IS_ENABLED(/;"	d
IS_ERR	include/linux/err.h	/^static inline long IS_ERR(const void *ptr)$/;"	f	typeref:typename:long
IS_ERR_VALUE	include/linux/err.h	/^#define IS_ERR_VALUE(/;"	d
IS_EXYNOS_TYPE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define IS_EXYNOS_TYPE(/;"	d
IS_E_PROCESSOR	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define IS_E_PROCESSOR(/;"	d
IS_E_PROCESSOR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define IS_E_PROCESSOR(/;"	d
IS_E_PROCESSOR	arch/powerpc/include/asm/processor.h	/^#define IS_E_PROCESSOR(/;"	d
IS_FIX_HREG	board/gdsys/p1022/controlcenterd-id.c	/^#define IS_FIX_HREG(/;"	d	file:
IS_FNC_EXEC	tools/aisimage.c	/^#define IS_FNC_EXEC(/;"	d	file:
IS_HAB_ENABLED_BIT	arch/arm/imx-common/hab.c	/^#define IS_HAB_ENABLED_BIT /;"	d	file:
IS_LAST_CLUST	include/fat.h	/^#define IS_LAST_CLUST(/;"	d
IS_MMAPPED	common/dlmalloc.c	/^#define IS_MMAPPED /;"	d	file:
IS_MMC	include/mmc.h	/^#define IS_MMC(/;"	d
IS_MODULE	include/linux/kconfig.h	/^#define IS_MODULE(/;"	d
IS_PCI_PORT	drivers/bios_emulator/besys.c	/^#define IS_PCI_PORT(/;"	d	file:
IS_PCR_HREG	board/gdsys/p1022/controlcenterd-id.c	/^#define IS_PCR_HREG(/;"	d	file:
IS_POW2PS	drivers/mtd/spi/sf_dataflash.c	/^#define IS_POW2PS	/;"	d	file:
IS_PUP_ACTIVE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define IS_PUP_ACTIVE(/;"	d
IS_R300_VARIANT	drivers/video/ati_radeon_fb.h	/^#define IS_R300_VARIANT(/;"	d
IS_R8A7790_ES2	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define IS_R8A7790_ES2(/;"	d
IS_R8A7791_ES2	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define IS_R8A7791_ES2(/;"	d
IS_R8A7793_ES2	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define IS_R8A7793_ES2(/;"	d
IS_R8A7794_ES2	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define IS_R8A7794_ES2(/;"	d
IS_RANGE	board/samsung/universal_c210/universal.c	/^#define IS_RANGE(/;"	d	file:
IS_RELA	lib/efi_loader/efi_runtime.c	/^#define IS_RELA	/;"	d	file:
IS_RV100_VARIANT	drivers/video/ati_radeon_fb.h	/^#define IS_RV100_VARIANT(/;"	d
IS_SAMSUNG_TYPE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define IS_SAMSUNG_TYPE(/;"	d
IS_SAMSUNG_TYPE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define IS_SAMSUNG_TYPE(/;"	d
IS_SD	include/mmc.h	/^#define IS_SD(/;"	d
IS_SPKR_PORT	drivers/bios_emulator/besys.c	/^#define IS_SPKR_PORT(/;"	d	file:
IS_SVR_REV	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define IS_SVR_REV(/;"	d
IS_SVR_REV	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define IS_SVR_REV(/;"	d
IS_SVR_REV	arch/powerpc/include/asm/processor.h	/^#define IS_SVR_REV(/;"	d
IS_TIMER_PORT	drivers/bios_emulator/besys.c	/^#define IS_TIMER_PORT(/;"	d	file:
IS_VALID_PORT	board/varisys/cyrus/eth.c	/^#define IS_VALID_PORT(/;"	d	file:
IS_VAR_HREG	board/gdsys/p1022/controlcenterd-id.c	/^#define IS_VAR_HREG(/;"	d	file:
IS_VGA_PORT	drivers/bios_emulator/besys.c	/^#define IS_VGA_PORT(/;"	d	file:
IS_WINDOW_OUT_BOUNDARY	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^#define IS_WINDOW_OUT_BOUNDARY(/;"	d	file:
ISeekInStream	lib/lzma/Types.h	/^} ISeekInStream;$/;"	t	typeref:struct:__anonf2a2f1b90608
ISeqInStream	lib/lzma/Types.h	/^} ISeqInStream;$/;"	t	typeref:struct:__anonf2a2f1b90308
ISeqOutStream	lib/lzma/Types.h	/^} ISeqOutStream;$/;"	t	typeref:struct:__anonf2a2f1b90408
ISzAlloc	lib/lzma/Types.h	/^} ISzAlloc;$/;"	t	typeref:struct:__anonf2a2f1b90c08
IT6251_DEVICE_ID_HIGH	board/kosagi/novena/video.c	/^#define IT6251_DEVICE_ID_HIGH	/;"	d	file:
IT6251_DEVICE_ID_LOW	board/kosagi/novena/video.c	/^#define IT6251_DEVICE_ID_LOW	/;"	d	file:
IT6251_REF_STATE	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE	/;"	d	file:
IT6251_REF_STATE_AUX_CHANNEL_READ	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE_AUX_CHANNEL_READ	/;"	d	file:
IT6251_REF_STATE_CR_PATTERN	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE_CR_PATTERN	/;"	d	file:
IT6251_REF_STATE_EQ_PATTERN	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE_EQ_PATTERN	/;"	d	file:
IT6251_REF_STATE_MAIN_LINK_DISABLED	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE_MAIN_LINK_DISABLED	/;"	d	file:
IT6251_REF_STATE_MUTED	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE_MUTED	/;"	d	file:
IT6251_REF_STATE_NORMAL_OPERATION	board/kosagi/novena/video.c	/^#define IT6251_REF_STATE_NORMAL_OPERATION	/;"	d	file:
IT6251_REG_PCLK_CNT_HIGH	board/kosagi/novena/video.c	/^#define IT6251_REG_PCLK_CNT_HIGH	/;"	d	file:
IT6251_REG_PCLK_CNT_LOW	board/kosagi/novena/video.c	/^#define IT6251_REG_PCLK_CNT_LOW	/;"	d	file:
IT6251_SYSTEM_STATUS	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS	/;"	d	file:
IT6251_SYSTEM_STATUS_RAUXFREQ_LOCK	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RAUXFREQ_LOCK	/;"	d	file:
IT6251_SYSTEM_STATUS_RHPDSTATUS	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RHPDSTATUS	/;"	d	file:
IT6251_SYSTEM_STATUS_RINTSTATUS	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RINTSTATUS	/;"	d	file:
IT6251_SYSTEM_STATUS_RPLL_IOLOCK	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RPLL_IOLOCK	/;"	d	file:
IT6251_SYSTEM_STATUS_RPLL_SPLOCK	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RPLL_SPLOCK	/;"	d	file:
IT6251_SYSTEM_STATUS_RPLL_XPLOCK	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RPLL_XPLOCK	/;"	d	file:
IT6251_SYSTEM_STATUS_RVIDEOSTABLE	board/kosagi/novena/video.c	/^#define IT6251_SYSTEM_STATUS_RVIDEOSTABLE	/;"	d	file:
IT6251_VENDOR_ID_HIGH	board/kosagi/novena/video.c	/^#define IT6251_VENDOR_ID_HIGH	/;"	d	file:
IT6251_VENDOR_ID_LOW	board/kosagi/novena/video.c	/^#define IT6251_VENDOR_ID_LOW	/;"	d	file:
IT6521_RETRY_MAX	board/kosagi/novena/video.c	/^#define IT6521_RETRY_MAX	/;"	d	file:
ITCM_FLASH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define ITCM_FLASH_BASE	/;"	d
ITCM_SRAM_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define ITCM_SRAM_BASE	/;"	d
ITC_DEFAULT	drivers/net/ftmac110.h	/^#define ITC_DEFAULT /;"	d
ITC_RX_CYCLONG	drivers/net/ftmac110.h	/^#define ITC_RX_CYCLONG /;"	d
ITC_RX_CYCNORM	drivers/net/ftmac110.h	/^#define ITC_RX_CYCNORM /;"	d
ITC_RX_ITMO	drivers/net/ftmac110.h	/^#define ITC_RX_ITMO(/;"	d
ITC_RX_THR	drivers/net/ftmac110.h	/^#define ITC_RX_THR(/;"	d
ITC_TX_CYCLONG	drivers/net/ftmac110.h	/^#define ITC_TX_CYCLONG /;"	d
ITC_TX_CYCNORM	drivers/net/ftmac110.h	/^#define ITC_TX_CYCNORM /;"	d
ITC_TX_ITMO	drivers/net/ftmac110.h	/^#define ITC_TX_ITMO(/;"	d
ITC_TX_THR	drivers/net/ftmac110.h	/^#define ITC_TX_THR(/;"	d
ITEMHEAD	fs/reiserfs/reiserfs_private.h	/^#define ITEMHEAD	/;"	d
ITEM_VERSION_1	fs/reiserfs/reiserfs_private.h	/^#define ITEM_VERSION_1 /;"	d
ITEM_VERSION_2	fs/reiserfs/reiserfs_private.h	/^#define ITEM_VERSION_2 /;"	d
ITEST_COMMAND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ITEST_COMMAND /;"	d
ITEST_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ITEST_DATA0 /;"	d
ITEST_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define ITEST_DATA1 /;"	d
ITS_BIT	include/fsl_sfp.h	/^#define ITS_BIT	/;"	d
ITS_MASK	include/fsl_sfp.h	/^#define ITS_MASK	/;"	d
ITU_TYPE	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define ITU_TYPE /;"	d
IVA_FSEL_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_12	/;"	d
IVA_FSEL_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_12_ES1	/;"	d
IVA_FSEL_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_12_ES2	/;"	d
IVA_FSEL_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_13	/;"	d
IVA_FSEL_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_13_ES1	/;"	d
IVA_FSEL_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_13_ES2	/;"	d
IVA_FSEL_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_19P2	/;"	d
IVA_FSEL_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_19P2_ES1	/;"	d
IVA_FSEL_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_19P2_ES2	/;"	d
IVA_FSEL_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_26	/;"	d
IVA_FSEL_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_26_ES1	/;"	d
IVA_FSEL_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_26_ES2	/;"	d
IVA_FSEL_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_38P4	/;"	d
IVA_FSEL_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_38P4_ES1	/;"	d
IVA_FSEL_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_FSEL_38P4_ES2	/;"	d
IVA_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_12	/;"	d
IVA_M2_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_12_ES1	/;"	d
IVA_M2_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_12_ES2	/;"	d
IVA_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_13	/;"	d
IVA_M2_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_13_ES1	/;"	d
IVA_M2_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_13_ES2	/;"	d
IVA_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_19P2	/;"	d
IVA_M2_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_19P2_ES1	/;"	d
IVA_M2_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_19P2_ES2	/;"	d
IVA_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_26	/;"	d
IVA_M2_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_26_ES1	/;"	d
IVA_M2_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_26_ES2	/;"	d
IVA_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_38P4	/;"	d
IVA_M2_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_38P4_ES1	/;"	d
IVA_M2_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M2_38P4_ES2	/;"	d
IVA_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_12	/;"	d
IVA_M_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_12_ES1	/;"	d
IVA_M_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_12_ES2	/;"	d
IVA_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_13	/;"	d
IVA_M_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_13_ES1	/;"	d
IVA_M_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_13_ES2	/;"	d
IVA_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_19P2	/;"	d
IVA_M_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_19P2_ES1	/;"	d
IVA_M_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_19P2_ES2	/;"	d
IVA_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_26	/;"	d
IVA_M_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_26_ES1	/;"	d
IVA_M_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_26_ES2	/;"	d
IVA_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_38P4	/;"	d
IVA_M_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_38P4_ES1	/;"	d
IVA_M_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_M_38P4_ES2	/;"	d
IVA_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_12	/;"	d
IVA_N_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_12_ES1	/;"	d
IVA_N_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_12_ES2	/;"	d
IVA_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_13	/;"	d
IVA_N_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_13_ES1	/;"	d
IVA_N_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_13_ES2	/;"	d
IVA_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_19P2	/;"	d
IVA_N_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_19P2_ES1	/;"	d
IVA_N_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_19P2_ES2	/;"	d
IVA_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_26	/;"	d
IVA_N_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_26_ES1	/;"	d
IVA_N_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_26_ES2	/;"	d
IVA_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_38P4	/;"	d
IVA_N_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_38P4_ES1	/;"	d
IVA_N_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define IVA_N_38P4_ES2	/;"	d
IVB_CONFIG_TDP_MIN_CPUID	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define IVB_CONFIG_TDP_MIN_CPUID	/;"	d
IVB_STEP_A0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define IVB_STEP_A0	/;"	d
IVB_STEP_B0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define IVB_STEP_B0	/;"	d
IVB_STEP_C0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define IVB_STEP_C0	/;"	d
IVB_STEP_D0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define IVB_STEP_D0	/;"	d
IVB_STEP_K0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define IVB_STEP_K0	/;"	d
IVM_POS_BUILD_STATE	board/keymile/common/ivm.c	/^#define IVM_POS_BUILD_STATE	/;"	d	file:
IVM_POS_CUSTOMER_ID	board/keymile/common/ivm.c	/^#define IVM_POS_CUSTOMER_ID	/;"	d	file:
IVM_POS_CUSTOMER_PROD_ID	board/keymile/common/ivm.c	/^#define IVM_POS_CUSTOMER_PROD_ID	/;"	d	file:
IVM_POS_DELIVERY_DATE	board/keymile/common/ivm.c	/^#define IVM_POS_DELIVERY_DATE	/;"	d	file:
IVM_POS_HISTORY	board/keymile/common/ivm.c	/^#define IVM_POS_HISTORY	/;"	d	file:
IVM_POS_MANU_ID	board/keymile/common/ivm.c	/^#define IVM_POS_MANU_ID	/;"	d	file:
IVM_POS_MANU_SERIAL	board/keymile/common/ivm.c	/^#define IVM_POS_MANU_SERIAL	/;"	d	file:
IVM_POS_PART_NUMBER	board/keymile/common/ivm.c	/^#define IVM_POS_PART_NUMBER	/;"	d	file:
IVM_POS_SHORT_TEXT	board/keymile/common/ivm.c	/^#define IVM_POS_SHORT_TEXT	/;"	d	file:
IVM_POS_SUPPLIER_BUILD_STATE	board/keymile/common/ivm.c	/^#define IVM_POS_SUPPLIER_BUILD_STATE	/;"	d	file:
IVM_POS_SUPPLIER_PART_NUMBER	board/keymile/common/ivm.c	/^#define IVM_POS_SUPPLIER_PART_NUMBER	/;"	d	file:
IVM_POS_SYMBOL_ONLY	board/keymile/common/ivm.c	/^#define IVM_POS_SYMBOL_ONLY	/;"	d	file:
IVOR0	arch/powerpc/include/asm/processor.h	/^#define IVOR0	/;"	d
IVOR1	arch/powerpc/include/asm/processor.h	/^#define IVOR1	/;"	d
IVOR10	arch/powerpc/include/asm/processor.h	/^#define IVOR10	/;"	d
IVOR11	arch/powerpc/include/asm/processor.h	/^#define IVOR11	/;"	d
IVOR12	arch/powerpc/include/asm/processor.h	/^#define IVOR12	/;"	d
IVOR13	arch/powerpc/include/asm/processor.h	/^#define IVOR13	/;"	d
IVOR14	arch/powerpc/include/asm/processor.h	/^#define IVOR14	/;"	d
IVOR15	arch/powerpc/include/asm/processor.h	/^#define IVOR15	/;"	d
IVOR2	arch/powerpc/include/asm/processor.h	/^#define IVOR2	/;"	d
IVOR3	arch/powerpc/include/asm/processor.h	/^#define IVOR3	/;"	d
IVOR32	arch/powerpc/include/asm/processor.h	/^#define IVOR32	/;"	d
IVOR33	arch/powerpc/include/asm/processor.h	/^#define IVOR33	/;"	d
IVOR34	arch/powerpc/include/asm/processor.h	/^#define IVOR34	/;"	d
IVOR35	arch/powerpc/include/asm/processor.h	/^#define IVOR35	/;"	d
IVOR4	arch/powerpc/include/asm/processor.h	/^#define IVOR4	/;"	d
IVOR5	arch/powerpc/include/asm/processor.h	/^#define IVOR5	/;"	d
IVOR6	arch/powerpc/include/asm/processor.h	/^#define IVOR6	/;"	d
IVOR7	arch/powerpc/include/asm/processor.h	/^#define IVOR7	/;"	d
IVOR8	arch/powerpc/include/asm/processor.h	/^#define IVOR8	/;"	d
IVOR9	arch/powerpc/include/asm/processor.h	/^#define IVOR9	/;"	d
IVPR	arch/powerpc/include/asm/processor.h	/^#define IVPR	/;"	d
IVR	arch/powerpc/include/asm/xilinx_irq.h	/^#define IVR	/;"	d
IVT_HEADER_TAG	tools/imximage.h	/^#define IVT_HEADER_TAG	/;"	d
IVT_SIZE	arch/arm/imx-common/hab.c	/^#define IVT_SIZE	/;"	d	file:
IVT_VERSION	tools/imximage.h	/^#define IVT_VERSION	/;"	d
IWCR_EN	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define IWCR_EN	/;"	d	file:
IWCR_IO	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define IWCR_IO	/;"	d	file:
IWCR_MEM	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define IWCR_MEM	/;"	d	file:
IWCR_READ	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define IWCR_READ	/;"	d	file:
IWCR_READLINE	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define IWCR_READLINE	/;"	d	file:
IWCR_READMULT	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^#define IWCR_READMULT	/;"	d	file:
I_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define I_BIT	/;"	d
I_BIT	arch/arm/lib/vectors.S	/^#define I_BIT	/;"	d	file:
I_CLEAR	fs/ubifs/ubifs.h	/^#define I_CLEAR	/;"	d
I_DE	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_DE	/;"	d
I_DIRTY	fs/ubifs/ubifs.h	/^#define I_DIRTY /;"	d
I_DIRTY_DATASYNC	fs/ubifs/ubifs.h	/^#define I_DIRTY_DATASYNC	/;"	d
I_DIRTY_PAGES	fs/ubifs/ubifs.h	/^#define I_DIRTY_PAGES	/;"	d
I_DIRTY_SYNC	fs/ubifs/ubifs.h	/^#define I_DIRTY_SYNC	/;"	d
I_ERRORS	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_ERRORS	/;"	d
I_FREEING	fs/ubifs/ubifs.h	/^#define I_FREEING	/;"	d
I_INTMASK	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_INTMASK	/;"	d
I_LOCK	fs/ubifs/ubifs.h	/^#define I_LOCK	/;"	d
I_MASK	include/bedbug/ppc.h	/^#define I_MASK /;"	d
I_NEW	fs/ubifs/ubifs.h	/^#define I_NEW	/;"	d
I_OPCODE	include/bedbug/ppc.h	/^#define I_OPCODE(/;"	d
I_PDE	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_PDE	/;"	d
I_PDEE	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_PDEE	/;"	d
I_RDU	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_RDU	/;"	d
I_RFO	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_RFO	/;"	d
I_RI	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_RI	/;"	d
I_SYNC	fs/ubifs/ubifs.h	/^#define I_SYNC	/;"	d
I_WILL_FREE	fs/ubifs/ubifs.h	/^#define I_WILL_FREE	/;"	d
I_XFU	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_XFU	/;"	d
I_XI0	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_XI0	/;"	d
I_XI1	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_XI1	/;"	d
I_XI2	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_XI2	/;"	d
I_XI3	drivers/net/bcm-sf2-eth-gmac.h	/^#define I_XI3	/;"	d
Ident_1	lib/dhry/dhry.h	/^  typedef       enum    {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5}$/;"	e	enum:__anon8188259e0103
Ident_1	lib/dhry/dhry.h	/^#define Ident_1 /;"	d
Ident_2	lib/dhry/dhry.h	/^  typedef       enum    {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5}$/;"	e	enum:__anon8188259e0103
Ident_2	lib/dhry/dhry.h	/^#define Ident_2 /;"	d
Ident_3	lib/dhry/dhry.h	/^  typedef       enum    {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5}$/;"	e	enum:__anon8188259e0103
Ident_3	lib/dhry/dhry.h	/^#define Ident_3 /;"	d
Ident_4	lib/dhry/dhry.h	/^  typedef       enum    {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5}$/;"	e	enum:__anon8188259e0103
Ident_4	lib/dhry/dhry.h	/^#define Ident_4 /;"	d
Ident_5	lib/dhry/dhry.h	/^  typedef       enum    {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5}$/;"	e	enum:__anon8188259e0103
Ident_5	lib/dhry/dhry.h	/^#define Ident_5 /;"	d
Idle	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		enum { Idle, Running, Closing, Closed } state;$/;"	e	enum:__anon7d79ed4b0408::__anon7d79ed4b0503	file:
If	doc/README.x86	/^If not see the coreboot tree [4] where you can use:$/;"	l
If	doc/README.x86	/^If you are using em100, then this command will flash write -Boot:$/;"	l
If	doc/README.x86	/^If you have a samus you can obtain them from your flash, for example, in$/;"	l
ImageBase	include/pe.h	/^	uint32_t ImageBase;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
ImageBase	include/pe.h	/^	uint64_t ImageBase;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint64_t
ImageDescriptorByte	tools/easylogo/easylogo.c	/^	unsigned char ImageDescriptorByte;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned char	file:
ImageHeight	tools/easylogo/easylogo.c	/^	unsigned short ImageHeight;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned short	file:
ImagePixelSize	tools/easylogo/easylogo.c	/^	unsigned char ImagePixelSize;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned char	file:
ImageTypeCode	tools/easylogo/easylogo.c	/^	unsigned char ImageTypeCode;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned char	file:
ImageWidth	tools/easylogo/easylogo.c	/^	unsigned short ImageWidth;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned short	file:
ImageXOrigin	tools/easylogo/easylogo.c	/^	unsigned short ImageXOrigin;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned short	file:
ImageYOrigin	tools/easylogo/easylogo.c	/^	unsigned short ImageYOrigin;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned short	file:
Image_header	cmd/booti.c	/^struct Image_header {$/;"	s	file:
In	doc/README.x86	/^In this case, known as bare mode, from the fact that it runs on the$/;"	l
Index	board/esd/common/lcd.h	/^    ushort Index;$/;"	m	struct:__anon5a5858080108	typeref:typename:ushort
Index	include/sm501.h	/^	unsigned int Index;$/;"	m	struct:__anond2aa10c40108	typeref:typename:unsigned int
Info	tools/patman/tout.py	/^def Info(msg):$/;"	f
Info commands	cmd/Kconfig	/^menu "Info commands"$/;"	m	menu:Command line interface
InformationBufferLength	drivers/usb/gadget/rndis.h	/^	__le32	InformationBufferLength;$/;"	m	struct:rndis_query_cmplt_type	typeref:typename:__le32
InformationBufferLength	drivers/usb/gadget/rndis.h	/^	__le32	InformationBufferLength;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
InformationBufferLength	drivers/usb/gadget/rndis.h	/^	__le32	InformationBufferLength;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
InformationBufferOffset	drivers/usb/gadget/rndis.h	/^	__le32	InformationBufferOffset;$/;"	m	struct:rndis_query_cmplt_type	typeref:typename:__le32
InformationBufferOffset	drivers/usb/gadget/rndis.h	/^	__le32	InformationBufferOffset;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
InformationBufferOffset	drivers/usb/gadget/rndis.h	/^	__le32	InformationBufferOffset;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
Init	tools/patman/tout.py	/^def Init(_verbose=WARNING, stdout=sys.stdout):$/;"	f
InitTIMER0	board/bf527-ezkit/video.c	/^void InitTIMER0(void)$/;"	f	typeref:typename:void
InitTIMER1	board/bf527-ezkit/video.c	/^void InitTIMER1(void)$/;"	f	typeref:typename:void
Init_DMA	board/bf527-ezkit/video.c	/^void Init_DMA(void *dst)$/;"	f	typeref:typename:void
Init_DMA	board/bf548-ezkit/video.c	/^void Init_DMA(void *dst)$/;"	f	typeref:typename:void
Init_DMA	board/cm-bf548/video.c	/^void Init_DMA(void *dst)$/;"	f	typeref:typename:void
Init_PPI	board/bf527-ezkit/video.c	/^void Init_PPI(void)$/;"	f	typeref:typename:void
Init_PPI	board/bf548-ezkit/video.c	/^void Init_PPI(void)$/;"	f	typeref:typename:void
Init_PPI	board/cm-bf548/video.c	/^void Init_PPI(void)$/;"	f	typeref:typename:void
Init_Ports	board/bf527-ezkit/video.c	/^void Init_Ports(void)$/;"	f	typeref:typename:void
Init_Ports	board/bf548-ezkit/video.c	/^void Init_Ports(void)$/;"	f	typeref:typename:void
Init_Ports	board/cm-bf548/video.c	/^void Init_Ports(void)$/;"	f	typeref:typename:void
InsertCoverLetter	tools/patman/patchstream.py	/^def InsertCoverLetter(fname, series, count):$/;"	f
Int16	lib/bzip2/bzlib_private.h	/^typedef short           Int16;$/;"	t	typeref:typename:short
Int16	lib/lzma/Types.h	/^typedef short Int16;$/;"	t	typeref:typename:short
Int32	lib/bzip2/bzlib_private.h	/^typedef int             Int32;$/;"	t	typeref:typename:int
Int32	lib/lzma/Types.h	/^typedef int Int32;$/;"	t	typeref:typename:int
Int32	lib/lzma/Types.h	/^typedef long Int32;$/;"	t	typeref:typename:long
Int64	lib/lzma/Types.h	/^typedef __int64 Int64;$/;"	t	typeref:typename:__int64
Int64	lib/lzma/Types.h	/^typedef long Int64;$/;"	t	typeref:typename:long
Int64	lib/lzma/Types.h	/^typedef long long int Int64;$/;"	t	typeref:typename:long long int
IntMask	include/mpc5xxx.h	/^	volatile u32 IntMask;		\/* SDMA + 0x18 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
IntPend	include/mpc5xxx.h	/^	volatile u32 IntPend;		\/* SDMA + 0x14 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
IntVect1	include/mpc5xxx.h	/^	volatile u8 IntVect1;		\/* SDMA + 0x10 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
IntVect2	include/mpc5xxx.h	/^	volatile u8 IntVect2;		\/* SDMA + 0x11 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u8
Int_Comp	lib/dhry/dhry.h	/^                  int         Int_Comp;$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0308	typeref:typename:int
Int_Glob	lib/dhry/dhry_1.c	/^int             Int_Glob;$/;"	v	typeref:typename:int
Integrator Options	arch/arm/mach-integrator/Kconfig	/^menu "Integrator Options"$/;"	m
Intel	doc/README.x86	/^Intel Bay Trail based board instructions for bare mode:$/;"	l
Intel	doc/README.x86	/^Intel Cougar Canyon 2 specific instructions for bare mode:$/;"	l
Intel	doc/README.x86	/^Intel Crown Bay specific instructions for bare mode:$/;"	l
InterFrameGap	drivers/net/rtl8169.c	/^#define InterFrameGap	/;"	d	file:
InterfaceRequest	include/usb_defs.h	/^#define InterfaceRequest /;"	d
Internal_Error	tools/buildman/kconfiglib.py	/^class Internal_Error(Exception):$/;"	c
Interrupt_Clear	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Interrupt_Clear;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Interrupt_Force	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Interrupt_Force;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Interrupt_Mask	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Interrupt_Mask;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Interrupt_Pending	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Interrupt_Pending;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
IntrEnable	drivers/net/natsemi.c	/^	IntrEnable	= 0x18,$/;"	e	enum:register_offsets	file:
IntrEnable	drivers/net/ns8382x.c	/^	IntrEnable = 0x18,$/;"	e	enum:register_offsets	file:
IntrMask	drivers/net/natsemi.c	/^	IntrMask	= 0x14,$/;"	e	enum:register_offsets	file:
IntrMask	drivers/net/ns8382x.c	/^	IntrMask = 0x14,$/;"	e	enum:register_offsets	file:
IntrMask	drivers/net/rtl8139.c	/^	IntrMask=0x3C, IntrStatus=0x3E,$/;"	e	enum:RTL8139_registers	file:
IntrMask	drivers/net/rtl8169.c	/^	IntrMask = 0x3C,$/;"	e	enum:RTL8169_registers	file:
IntrStatus	drivers/net/rtl8139.c	/^	IntrMask=0x3C, IntrStatus=0x3E,$/;"	e	enum:RTL8139_registers	file:
IntrStatus	drivers/net/rtl8169.c	/^	IntrStatus = 0x3E,$/;"	e	enum:RTL8169_registers	file:
IntrStatusBits	drivers/net/rtl8139.c	/^enum IntrStatusBits {$/;"	g	file:
Introduction	test/py/README.md	/^## Introduction$/;"	s	chapter:U-Boot pytest suite
Invalidate	tools/dtoc/fdt_normal.py	/^    def Invalidate(self):$/;"	m	class:FdtNormal
IrSR_IR_RECEIVE_ON	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_IR_RECEIVE_ON /;"	d
IrSR_IR_TRANSMIT_ON	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_IR_TRANSMIT_ON /;"	d
IrSR_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_OFFSET /;"	d
IrSR_RCVEIR_IR_MODE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_RCVEIR_IR_MODE /;"	d
IrSR_RCVEIR_UART_MODE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_RCVEIR_UART_MODE /;"	d
IrSR_RXPL_NEG_IS_ZERO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_RXPL_NEG_IS_ZERO /;"	d
IrSR_RXPL_POS_IS_ZERO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_RXPL_POS_IS_ZERO /;"	d
IrSR_TXPL_NEG_IS_ZERO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_TXPL_NEG_IS_ZERO /;"	d
IrSR_TXPL_POS_IS_ZERO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_TXPL_POS_IS_ZERO /;"	d
IrSR_XMITIR_IR_MODE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_XMITIR_IR_MODE /;"	d
IrSR_XMITIR_UART_MODE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_XMITIR_UART_MODE /;"	d
IrSR_XMODE_PULSE_1_6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_XMODE_PULSE_1_6 /;"	d
IrSR_XMODE_PULSE_3_16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define IrSR_XMODE_PULSE_3_16 /;"	d
IsMatch	lib/lzma/LzmaDec.c	/^#define IsMatch /;"	d	file:
IsPhandle	tools/dtoc/dtoc	/^    def IsPhandle(self, prop):$/;"	m	class:DtbPlatdata
IsPhandle	tools/dtoc/dtoc.py	/^    def IsPhandle(self, prop):$/;"	m	class:DtbPlatdata
IsRep	lib/lzma/LzmaDec.c	/^#define IsRep /;"	d	file:
IsRep0Long	lib/lzma/LzmaDec.c	/^#define IsRep0Long /;"	d	file:
IsRepG0	lib/lzma/LzmaDec.c	/^#define IsRepG0 /;"	d	file:
IsRepG1	lib/lzma/LzmaDec.c	/^#define IsRepG1 /;"	d	file:
IsRepG2	lib/lzma/LzmaDec.c	/^#define IsRepG2 /;"	d	file:
Item	tools/buildman/kconfiglib.py	/^class Item(object):$/;"	c
JAM_LIMIT_MASK	drivers/net/ax88180.h	/^  #define JAM_LIMIT_MASK	/;"	d
JBD2_FEATURE_COMPAT_CHECKSUM	fs/ext4/ext4_journal.h	/^#define JBD2_FEATURE_COMPAT_CHECKSUM	/;"	d
JB_CR	examples/standalone/ppc_longjmp.S	/^# define JB_CR /;"	d	file:
JB_CR	examples/standalone/ppc_setjmp.S	/^# define JB_CR /;"	d	file:
JB_FPRS	examples/standalone/ppc_longjmp.S	/^# define JB_FPRS /;"	d	file:
JB_FPRS	examples/standalone/ppc_setjmp.S	/^# define JB_FPRS /;"	d	file:
JB_GPR1	examples/standalone/ppc_longjmp.S	/^# define JB_GPR1 /;"	d	file:
JB_GPR1	examples/standalone/ppc_setjmp.S	/^# define JB_GPR1 /;"	d	file:
JB_GPR2	examples/standalone/ppc_longjmp.S	/^# define JB_GPR2 /;"	d	file:
JB_GPR2	examples/standalone/ppc_setjmp.S	/^# define JB_GPR2 /;"	d	file:
JB_GPRS	examples/standalone/ppc_longjmp.S	/^# define JB_GPRS /;"	d	file:
JB_GPRS	examples/standalone/ppc_setjmp.S	/^# define JB_GPRS /;"	d	file:
JB_LR	examples/standalone/ppc_longjmp.S	/^# define JB_LR /;"	d	file:
JB_LR	examples/standalone/ppc_setjmp.S	/^# define JB_LR /;"	d	file:
JB_SIZE	examples/standalone/ppc_longjmp.S	/^# define JB_SIZE /;"	d	file:
JB_SIZE	examples/standalone/ppc_setjmp.S	/^# define JB_SIZE /;"	d	file:
JCCMD	arch/sh/include/asm/cpu_sh7722.h	/^#define JCCMD /;"	d
JCDERR	arch/sh/include/asm/cpu_sh7722.h	/^#define JCDERR /;"	d
JCDRID	arch/sh/include/asm/cpu_sh7722.h	/^#define JCDRID /;"	d
JCDRIU	arch/sh/include/asm/cpu_sh7722.h	/^#define JCDRIU /;"	d
JCDTCD	arch/sh/include/asm/cpu_sh7722.h	/^#define JCDTCD /;"	d
JCDTCM	arch/sh/include/asm/cpu_sh7722.h	/^#define JCDTCM /;"	d
JCDTCU	arch/sh/include/asm/cpu_sh7722.h	/^#define JCDTCU /;"	d
JCHSZD	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHSZD /;"	d
JCHSZU	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHSZU /;"	d
JCHTBA0	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHTBA0 /;"	d
JCHTBA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHTBA1 /;"	d
JCHTBD0	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHTBD0 /;"	d
JCHTBD1	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHTBD1 /;"	d
JCHTN	arch/sh/include/asm/cpu_sh7722.h	/^#define JCHTN /;"	d
JCMOD	arch/sh/include/asm/cpu_sh7722.h	/^#define JCMOD /;"	d
JCQTBL0	arch/sh/include/asm/cpu_sh7722.h	/^#define JCQTBL0 /;"	d
JCQTBL1	arch/sh/include/asm/cpu_sh7722.h	/^#define JCQTBL1 /;"	d
JCQTBL2	arch/sh/include/asm/cpu_sh7722.h	/^#define JCQTBL2 /;"	d
JCQTBL3	arch/sh/include/asm/cpu_sh7722.h	/^#define JCQTBL3 /;"	d
JCQTN	arch/sh/include/asm/cpu_sh7722.h	/^#define JCQTN /;"	d
JCRST	arch/sh/include/asm/cpu_sh7722.h	/^#define JCRST /;"	d
JCSTS	arch/sh/include/asm/cpu_sh7722.h	/^#define JCSTS /;"	d
JCVSZD	arch/sh/include/asm/cpu_sh7722.h	/^#define JCVSZD /;"	d
JCVSZU	arch/sh/include/asm/cpu_sh7722.h	/^#define JCVSZU /;"	d
JEDEC_BA_EMR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_BA_EMR	/;"	d
JEDEC_BA_EMR2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_BA_EMR2	/;"	d
JEDEC_BA_EMR3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_BA_EMR3	/;"	d
JEDEC_BA_MR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_BA_MR	/;"	d
JEDEC_CMD_EMR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_CMD_EMR	/;"	d
JEDEC_CMD_NOP	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_CMD_NOP	/;"	d
JEDEC_CMD_PRECHARGE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_CMD_PRECHARGE	/;"	d
JEDEC_CMD_READ	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_CMD_READ	/;"	d
JEDEC_CMD_REFRESH	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_CMD_REFRESH	/;"	d
JEDEC_CMD_WRITE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_CMD_WRITE	/;"	d
JEDEC_FEATURE_16_BIT_BUS	include/linux/mtd/nand.h	/^#define JEDEC_FEATURE_16_BIT_BUS	/;"	d
JEDEC_MA_EMR2_TEMP_COMMERCIAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR2_TEMP_COMMERCIAL	/;"	d
JEDEC_MA_EMR2_TEMP_INDUSTRIAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR2_TEMP_INDUSTRIAL	/;"	d
JEDEC_MA_EMR_AL_DDR1_0_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_AL_DDR1_0_CYC	/;"	d
JEDEC_MA_EMR_AL_DDR2_1_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_AL_DDR2_1_CYC	/;"	d
JEDEC_MA_EMR_AL_DDR2_2_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_AL_DDR2_2_CYC	/;"	d
JEDEC_MA_EMR_AL_DDR2_3_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_AL_DDR2_3_CYC	/;"	d
JEDEC_MA_EMR_AL_DDR2_4_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_AL_DDR2_4_CYC	/;"	d
JEDEC_MA_EMR_DLL_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_DLL_DISABLE	/;"	d
JEDEC_MA_EMR_DLL_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_DLL_ENABLE	/;"	d
JEDEC_MA_EMR_DLL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_DLL_MASK	/;"	d
JEDEC_MA_EMR_DQS_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_DQS_DISABLE	/;"	d
JEDEC_MA_EMR_DQS_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_DQS_ENABLE	/;"	d
JEDEC_MA_EMR_DQS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_DQS_MASK	/;"	d
JEDEC_MA_EMR_OCD_ENTER	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_OCD_ENTER	/;"	d
JEDEC_MA_EMR_OCD_EXIT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_OCD_EXIT	/;"	d
JEDEC_MA_EMR_OCD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_OCD_MASK	/;"	d
JEDEC_MA_EMR_ODS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_ODS_MASK	/;"	d
JEDEC_MA_EMR_ODS_NORMAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_ODS_NORMAL	/;"	d
JEDEC_MA_EMR_ODS_WEAK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_ODS_WEAK	/;"	d
JEDEC_MA_EMR_OUTPUT_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_OUTPUT_DISABLE	/;"	d
JEDEC_MA_EMR_OUTPUT_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_OUTPUT_ENABLE	/;"	d
JEDEC_MA_EMR_OUTPUT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_OUTPUT_MASK	/;"	d
JEDEC_MA_EMR_RDQS_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RDQS_DISABLE	/;"	d
JEDEC_MA_EMR_RDQS_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RDQS_ENABLE	/;"	d
JEDEC_MA_EMR_RQDS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RQDS_MASK	/;"	d
JEDEC_MA_EMR_RTT_150OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RTT_150OHM	/;"	d
JEDEC_MA_EMR_RTT_50OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RTT_50OHM	/;"	d
JEDEC_MA_EMR_RTT_75OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RTT_75OHM	/;"	d
JEDEC_MA_EMR_RTT_DISABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RTT_DISABLED	/;"	d
JEDEC_MA_EMR_RTT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_EMR_RTT_MASK	/;"	d
JEDEC_MA_MR_BLEN_4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_BLEN_4	/;"	d
JEDEC_MA_MR_BLEN_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_BLEN_8	/;"	d
JEDEC_MA_MR_BLEN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_BLEN_MASK	/;"	d
JEDEC_MA_MR_BTYP_INTERLEAVED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_BTYP_INTERLEAVED	/;"	d
JEDEC_MA_MR_BTYP_SEQUENTIAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_BTYP_SEQUENTIAL	/;"	d
JEDEC_MA_MR_CL_DDR1_2_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR1_2_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR1_2_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR1_2_5_CLK	/;"	d
JEDEC_MA_MR_CL_DDR1_3_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR1_3_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR2_2_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR2_2_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR2_3_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR2_3_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR2_4_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR2_4_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR2_5_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR2_5_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR2_6_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR2_6_0_CLK	/;"	d
JEDEC_MA_MR_CL_DDR2_7_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_DDR2_7_0_CLK	/;"	d
JEDEC_MA_MR_CL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_CL_MASK	/;"	d
JEDEC_MA_MR_DLL_RESET	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_DLL_RESET	/;"	d
JEDEC_MA_MR_MODE_NORMAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_MODE_NORMAL	/;"	d
JEDEC_MA_MR_MODE_TEST	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_MODE_TEST	/;"	d
JEDEC_MA_MR_PDMODE_FAST_EXIT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_PDMODE_FAST_EXIT	/;"	d
JEDEC_MA_MR_PDMODE_SLOW_EXIT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_PDMODE_SLOW_EXIT	/;"	d
JEDEC_MA_MR_WR_DDR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_DDR1	/;"	d
JEDEC_MA_MR_WR_DDR2_2_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_DDR2_2_CYC	/;"	d
JEDEC_MA_MR_WR_DDR2_3_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_DDR2_3_CYC	/;"	d
JEDEC_MA_MR_WR_DDR2_4_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_DDR2_4_CYC	/;"	d
JEDEC_MA_MR_WR_DDR2_5_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_DDR2_5_CYC	/;"	d
JEDEC_MA_MR_WR_DDR2_6_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_DDR2_6_CYC	/;"	d
JEDEC_MA_MR_WR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_MR_WR_MASK	/;"	d
JEDEC_MA_PRECHARGE_ALL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_PRECHARGE_ALL	/;"	d
JEDEC_MA_PRECHARGE_ONE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define JEDEC_MA_PRECHARGE_ONE	/;"	d
JFFS2_COMPAT_MASK	include/jffs2/jffs2.h	/^#define JFFS2_COMPAT_MASK /;"	d
JFFS2_COMPR_COPY	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_COPY	/;"	d
JFFS2_COMPR_DYNRUBIN	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_DYNRUBIN	/;"	d
JFFS2_COMPR_LZO	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_LZO	/;"	d
JFFS2_COMPR_NONE	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_NONE	/;"	d
JFFS2_COMPR_RTIME	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_RTIME	/;"	d
JFFS2_COMPR_RUBINMIPS	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_RUBINMIPS	/;"	d
JFFS2_COMPR_ZERO	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_ZERO	/;"	d
JFFS2_COMPR_ZLIB	include/jffs2/jffs2.h	/^#define JFFS2_COMPR_ZLIB	/;"	d
JFFS2_DIRTY_BITMASK	include/jffs2/jffs2.h	/^#define JFFS2_DIRTY_BITMASK /;"	d
JFFS2_EMPTY_BITMASK	include/jffs2/jffs2.h	/^#define JFFS2_EMPTY_BITMASK /;"	d
JFFS2_FEATURE_INCOMPAT	include/jffs2/jffs2.h	/^#define JFFS2_FEATURE_INCOMPAT /;"	d
JFFS2_FEATURE_ROCOMPAT	include/jffs2/jffs2.h	/^#define JFFS2_FEATURE_ROCOMPAT /;"	d
JFFS2_FEATURE_RWCOMPAT_COPY	include/jffs2/jffs2.h	/^#define JFFS2_FEATURE_RWCOMPAT_COPY /;"	d
JFFS2_FEATURE_RWCOMPAT_DELETE	include/jffs2/jffs2.h	/^#define JFFS2_FEATURE_RWCOMPAT_DELETE /;"	d
JFFS2_INO_FLAG_PREREAD	include/jffs2/jffs2.h	/^#define JFFS2_INO_FLAG_PREREAD	/;"	d
JFFS2_INO_FLAG_USERCOMPR	include/jffs2/jffs2.h	/^#define JFFS2_INO_FLAG_USERCOMPR /;"	d
JFFS2_MAGIC_BITMASK	include/jffs2/jffs2.h	/^#define JFFS2_MAGIC_BITMASK /;"	d
JFFS2_MAX_NAME_LEN	include/jffs2/jffs2.h	/^#define JFFS2_MAX_NAME_LEN /;"	d
JFFS2_MIN_DATA_LEN	include/jffs2/jffs2.h	/^#define JFFS2_MIN_DATA_LEN /;"	d
JFFS2_NODETYPE_CLEANMARKER	include/jffs2/jffs2.h	/^#define JFFS2_NODETYPE_CLEANMARKER /;"	d
JFFS2_NODETYPE_DIRENT	include/jffs2/jffs2.h	/^#define JFFS2_NODETYPE_DIRENT /;"	d
JFFS2_NODETYPE_INODE	include/jffs2/jffs2.h	/^#define JFFS2_NODETYPE_INODE /;"	d
JFFS2_NODETYPE_PADDING	include/jffs2/jffs2.h	/^#define JFFS2_NODETYPE_PADDING /;"	d
JFFS2_NODETYPE_SUMMARY	include/jffs2/jffs2.h	/^#define JFFS2_NODETYPE_SUMMARY /;"	d
JFFS2_NODE_ACCURATE	include/jffs2/jffs2.h	/^#define JFFS2_NODE_ACCURATE /;"	d
JFFS2_NUM_COMPR	include/jffs2/jffs2.h	/^#define JFFS2_NUM_COMPR	/;"	d
JFFS2_OLD_MAGIC_BITMASK	include/jffs2/jffs2.h	/^#define JFFS2_OLD_MAGIC_BITMASK /;"	d
JFFS2_SUMMARY_DIRENT_SIZE	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_DIRENT_SIZE(/;"	d
JFFS2_SUMMARY_FRAME_SIZE	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_FRAME_SIZE /;"	d
JFFS2_SUMMARY_H	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_H$/;"	d
JFFS2_SUMMARY_INODE_SIZE	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_INODE_SIZE /;"	d
JFFS2_SUMMARY_NOSUM_SIZE	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_NOSUM_SIZE /;"	d
JFFS2_SUMMARY_XATTR_SIZE	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_XATTR_SIZE /;"	d
JFFS2_SUMMARY_XREF_SIZE	fs/jffs2/summary.h	/^#define JFFS2_SUMMARY_XREF_SIZE /;"	d
JFFS2_SUM_MAGIC	include/jffs2/jffs2.h	/^#define JFFS2_SUM_MAGIC	/;"	d
JFFS2_SUPER_MAGIC	include/jffs2/jffs2.h	/^#define JFFS2_SUPER_MAGIC /;"	d
JIFCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFCNT /;"	d
JIFDCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDCNT /;"	d
JIFDDCA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDCA1 /;"	d
JIFDDCA2	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDCA2 /;"	d
JIFDDHSZ	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDHSZ /;"	d
JIFDDMW	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDMW /;"	d
JIFDDRSZ	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDRSZ /;"	d
JIFDDVSZ	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDVSZ /;"	d
JIFDDYA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDYA1 /;"	d
JIFDDYA2	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDDYA2 /;"	d
JIFDSA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDSA1 /;"	d
JIFDSA2	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFDSA2 /;"	d
JIFECNT	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFECNT /;"	d
JIFEDA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFEDA1 /;"	d
JIFEDA2	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFEDA2 /;"	d
JIFEDRSZ	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFEDRSZ /;"	d
JIFESCA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESCA1 /;"	d
JIFESCA2	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESCA2 /;"	d
JIFESHSZ	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESHSZ /;"	d
JIFESMW	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESMW /;"	d
JIFESVSZ	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESVSZ /;"	d
JIFESYA1	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESYA1 /;"	d
JIFESYA2	arch/sh/include/asm/cpu_sh7722.h	/^#define JIFESYA2 /;"	d
JINTE	arch/sh/include/asm/cpu_sh7722.h	/^#define JINTE /;"	d
JINTS	arch/sh/include/asm/cpu_sh7722.h	/^#define JINTS /;"	d
JOB_STATUS_FORMAT	common/cli_hush.c	/^#define JOB_STATUS_FORMAT /;"	d	file:
JOURNAL_DESC_MAGIC	fs/reiserfs/reiserfs_private.h	/^#define JOURNAL_DESC_MAGIC /;"	d
JOURNAL_END	fs/reiserfs/reiserfs_private.h	/^#define JOURNAL_END	/;"	d
JOURNAL_START	fs/reiserfs/reiserfs_private.h	/^#define JOURNAL_START	/;"	d
JOURNAL_TRANS_HALF	fs/reiserfs/reiserfs_private.h	/^#define JOURNAL_TRANS_HALF /;"	d
JPEG_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define JPEG_BASE_ADDR	/;"	d
JQ_DEQ_ERR	drivers/crypto/fsl/jr.h	/^#define JQ_DEQ_ERR	/;"	d
JQ_DEQ_TO_ERR	drivers/crypto/fsl/jr.h	/^#define JQ_DEQ_TO_ERR	/;"	d
JQ_ENQ_ERR	drivers/crypto/fsl/jr.h	/^#define JQ_ENQ_ERR	/;"	d
JRCR_RESET	drivers/crypto/fsl/jr.h	/^#define JRCR_RESET /;"	d
JRINT_ERR_HALT_INPROGRESS	drivers/crypto/fsl/jr.h	/^#define JRINT_ERR_HALT_INPROGRESS /;"	d
JRINT_ERR_HALT_MASK	drivers/crypto/fsl/jr.h	/^#define JRINT_ERR_HALT_MASK /;"	d
JRNSLIODN_MASK	drivers/crypto/fsl/jr.h	/^#define JRNSLIODN_MASK	/;"	d
JRNSLIODN_SHIFT	drivers/crypto/fsl/jr.h	/^#define JRNSLIODN_SHIFT	/;"	d
JRSLIODN_MASK	drivers/crypto/fsl/jr.h	/^#define JRSLIODN_MASK	/;"	d
JRSLIODN_SHIFT	drivers/crypto/fsl/jr.h	/^#define JRSLIODN_SHIFT	/;"	d
JRSTA_CCBERR_CHAID_MASK	drivers/crypto/fsl/error.c	/^#define JRSTA_CCBERR_CHAID_MASK /;"	d	file:
JRSTA_CCBERR_CHAID_RNG	drivers/crypto/fsl/error.c	/^#define JRSTA_CCBERR_CHAID_RNG /;"	d	file:
JRSTA_CCBERR_CHAID_SHIFT	drivers/crypto/fsl/error.c	/^#define JRSTA_CCBERR_CHAID_SHIFT /;"	d	file:
JRSTA_CCBERR_ERRID_MASK	drivers/crypto/fsl/error.c	/^#define JRSTA_CCBERR_ERRID_MASK /;"	d	file:
JRSTA_DECOERR_ERROR_MASK	drivers/crypto/fsl/error.c	/^#define JRSTA_DECOERR_ERROR_MASK /;"	d	file:
JRSTA_DECOERR_INDEX_MASK	drivers/crypto/fsl/error.c	/^#define JRSTA_DECOERR_INDEX_MASK /;"	d	file:
JRSTA_DECOERR_INDEX_SHIFT	drivers/crypto/fsl/error.c	/^#define JRSTA_DECOERR_INDEX_SHIFT /;"	d	file:
JRSTA_DECOERR_JUMP	drivers/crypto/fsl/error.c	/^#define JRSTA_DECOERR_JUMP /;"	d	file:
JRSTA_SSRC_SHIFT	drivers/crypto/fsl/error.c	/^#define JRSTA_SSRC_SHIFT /;"	d	file:
JR_BASE_ADDR	include/fsl_sec.h	/^#define JR_BASE_ADDR(/;"	d
JR_INTMASK	drivers/crypto/fsl/jr.h	/^#define JR_INTMASK	/;"	d
JR_MID	include/fsl_sec.h	/^#define JR_MID	/;"	d
JR_SIZE	drivers/crypto/fsl/jr.h	/^#define JR_SIZE /;"	d
JSS	include/faraday/ftpmu010.h	/^	unsigned int	JSS;		\/* 0x9C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
JTAGID_PART_NUM_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define JTAGID_PART_NUM_MASK	/;"	d
JTAGID_PART_NUM_SHIFT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define JTAGID_PART_NUM_SHIFT	/;"	d
JTAGID_VARIANT_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define JTAGID_VARIANT_MASK	/;"	d
JTAGID_VARIANT_SHIFT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define JTAGID_VARIANT_SHIFT	/;"	d
JTAG_BP_2BYTE	arch/arm/mach-socfpga/scan_manager.c	/^#define JTAG_BP_2BYTE	/;"	d	file:
JTAG_BP_4BYTE	arch/arm/mach-socfpga/scan_manager.c	/^#define JTAG_BP_4BYTE	/;"	d	file:
JTAG_BP_INSN	arch/arm/mach-socfpga/scan_manager.c	/^#define JTAG_BP_INSN	/;"	d	file:
JTAG_BP_PAYLOAD	arch/arm/mach-socfpga/scan_manager.c	/^#define JTAG_BP_PAYLOAD	/;"	d	file:
JTAG_BP_TMS	arch/arm/mach-socfpga/scan_manager.c	/^#define JTAG_BP_TMS	/;"	d	file:
JTAG_ID_REG	arch/arm/mach-davinci/include/mach/hardware.h	/^#define JTAG_ID_REG /;"	d
JTAG_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config JTAG_MODE$/;"	c	choice:choice5ba020940104
JTAG_MODE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define JTAG_MODE	/;"	d
JTAG_NTRST	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define JTAG_NTRST	/;"	d
JTAG_RTCK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define JTAG_RTCK	/;"	d
JTAG_TCK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define JTAG_TCK	/;"	d
JTAG_TCK	board/esd/common/xilinx_jtag/ports.h	/^#define JTAG_TCK /;"	d
JTAG_TDI	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define JTAG_TDI	/;"	d
JTAG_TDI	board/esd/common/xilinx_jtag/ports.h	/^#define JTAG_TDI /;"	d
JTAG_TDO	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define JTAG_TDO	/;"	d
JTAG_TDO	board/esd/common/xilinx_jtag/ports.h	/^#define JTAG_TDO /;"	d
JTAG_TMS	board/esd/common/xilinx_jtag/ports.h	/^#define JTAG_TMS /;"	d
JTAG_TMSC	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define JTAG_TMSC	/;"	d
JUMBO_LEN_15K	drivers/net/ax88180.h	/^  #define JUMBO_LEN_15K	/;"	d
JUMBO_LEN_4K	drivers/net/ax88180.h	/^  #define JUMBO_LEN_4K	/;"	d
JUMP_A	board/renesas/ecovec/lowlevel_init.S	/^JUMP_A:		.long	CONFIG_ECOVEC_ROMIMAGE_ADDR$/;"	l
JUMP_CLASS_BOTH	drivers/crypto/fsl/desc.h	/^#define JUMP_CLASS_BOTH	/;"	d
JUMP_CLASS_CLASS1	drivers/crypto/fsl/desc.h	/^#define JUMP_CLASS_CLASS1	/;"	d
JUMP_CLASS_CLASS2	drivers/crypto/fsl/desc.h	/^#define JUMP_CLASS_CLASS2	/;"	d
JUMP_CLASS_MASK	drivers/crypto/fsl/desc.h	/^#define JUMP_CLASS_MASK	/;"	d
JUMP_CLASS_NONE	drivers/crypto/fsl/desc.h	/^#define JUMP_CLASS_NONE	/;"	d
JUMP_CLASS_SHIFT	drivers/crypto/fsl/desc.h	/^#define JUMP_CLASS_SHIFT	/;"	d
JUMP_COND_CALM	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_CALM	/;"	d
JUMP_COND_JRP	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_JRP	/;"	d
JUMP_COND_MASK	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_MASK	/;"	d
JUMP_COND_MATH_C	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_MATH_C	/;"	d
JUMP_COND_MATH_N	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_MATH_N	/;"	d
JUMP_COND_MATH_NV	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_MATH_NV	/;"	d
JUMP_COND_MATH_Z	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_MATH_Z	/;"	d
JUMP_COND_NCP	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_NCP	/;"	d
JUMP_COND_NIFP	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_NIFP	/;"	d
JUMP_COND_NIP	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_NIP	/;"	d
JUMP_COND_NOP	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_NOP	/;"	d
JUMP_COND_PK_0	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_PK_0	/;"	d
JUMP_COND_PK_GCD_1	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_PK_GCD_1	/;"	d
JUMP_COND_PK_PRIME	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_PK_PRIME	/;"	d
JUMP_COND_SELF	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_SELF	/;"	d
JUMP_COND_SHIFT	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_SHIFT	/;"	d
JUMP_COND_SHRD	drivers/crypto/fsl/desc.h	/^#define JUMP_COND_SHRD	/;"	d
JUMP_JSL	drivers/crypto/fsl/desc.h	/^#define JUMP_JSL	/;"	d
JUMP_JSL_MASK	drivers/crypto/fsl/desc.h	/^#define JUMP_JSL_MASK	/;"	d
JUMP_JSL_SHIFT	drivers/crypto/fsl/desc.h	/^#define JUMP_JSL_SHIFT	/;"	d
JUMP_NB	scripts/kconfig/expr.h	/^#define JUMP_NB	/;"	d
JUMP_OFFSET_MASK	drivers/crypto/fsl/desc.h	/^#define JUMP_OFFSET_MASK	/;"	d
JUMP_OFFSET_SHIFT	drivers/crypto/fsl/desc.h	/^#define JUMP_OFFSET_SHIFT	/;"	d
JUMP_TEST_ALL	drivers/crypto/fsl/desc.h	/^#define JUMP_TEST_ALL	/;"	d
JUMP_TEST_ANY	drivers/crypto/fsl/desc.h	/^#define JUMP_TEST_ANY	/;"	d
JUMP_TEST_INVALL	drivers/crypto/fsl/desc.h	/^#define JUMP_TEST_INVALL	/;"	d
JUMP_TEST_INVANY	drivers/crypto/fsl/desc.h	/^#define JUMP_TEST_INVANY	/;"	d
JUMP_TEST_MASK	drivers/crypto/fsl/desc.h	/^#define JUMP_TEST_MASK	/;"	d
JUMP_TEST_SHIFT	drivers/crypto/fsl/desc.h	/^#define JUMP_TEST_SHIFT	/;"	d
JUMP_TYPE_HALT	drivers/crypto/fsl/desc.h	/^#define JUMP_TYPE_HALT	/;"	d
JUMP_TYPE_HALT_USER	drivers/crypto/fsl/desc.h	/^#define JUMP_TYPE_HALT_USER	/;"	d
JUMP_TYPE_LOCAL	drivers/crypto/fsl/desc.h	/^#define JUMP_TYPE_LOCAL	/;"	d
JUMP_TYPE_MASK	drivers/crypto/fsl/desc.h	/^#define JUMP_TYPE_MASK	/;"	d
JUMP_TYPE_NONLOCAL	drivers/crypto/fsl/desc.h	/^#define JUMP_TYPE_NONLOCAL	/;"	d
JUMP_TYPE_SHIFT	drivers/crypto/fsl/desc.h	/^#define JUMP_TYPE_SHIFT	/;"	d
JUNO_RESET_CTRL	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_CTRL	/;"	d	file:
JUNO_RESET_CTRL_PHY	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_CTRL_PHY	/;"	d	file:
JUNO_RESET_CTRL_RC	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_CTRL_RC	/;"	d	file:
JUNO_RESET_STATUS	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_STATUS	/;"	d	file:
JUNO_RESET_STATUS_MASK	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_STATUS_MASK	/;"	d	file:
JUNO_RESET_STATUS_PHY	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_STATUS_PHY	/;"	d	file:
JUNO_RESET_STATUS_PLL	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_STATUS_PLL	/;"	d	file:
JUNO_RESET_STATUS_RC	board/armltd/vexpress64/pcie.c	/^#define JUNO_RESET_STATUS_RC	/;"	d	file:
JUNO_V2M_MSI_SIZE	board/armltd/vexpress64/pcie.c	/^#define JUNO_V2M_MSI_SIZE	/;"	d	file:
JUNO_V2M_MSI_START	board/armltd/vexpress64/pcie.c	/^#define JUNO_V2M_MSI_START	/;"	d	file:
K	lib/sha1.c	/^#define K /;"	d	file:
K2E_MSMC_SEGMENT_PCIE1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2E_MSMC_SEGMENT_PCIE1	/;"	d
K2E_MSMC_SEGMENT_TSIP	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2E_MSMC_SEGMENT_TSIP	/;"	d
K2G_GPIO0_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define K2G_GPIO0_BASE	/;"	d
K2G_GPIO1_BANK2_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define K2G_GPIO1_BANK2_BASE	/;"	d
K2G_GPIO1_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define K2G_GPIO1_BASE	/;"	d
K2G_GPIO_DIR_OFFSET	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define K2G_GPIO_DIR_OFFSET	/;"	d
K2G_GPIO_SETDATA_OFFSET	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define K2G_GPIO_SETDATA_OFFSET	/;"	d
K2G_MMC_HOST_DEF_H	arch/arm/mach-keystone/include/mach/mmc_host_def.h	/^#define K2G_MMC_HOST_DEF_H$/;"	d
K2G_MSMC_SEGMENT_ARM	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_ARM	/;"	d
K2G_MSMC_SEGMENT_DSS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_DSS	/;"	d
K2G_MSMC_SEGMENT_ICSS0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_ICSS0	/;"	d
K2G_MSMC_SEGMENT_ICSS1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_ICSS1	/;"	d
K2G_MSMC_SEGMENT_MLB	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_MLB	/;"	d
K2G_MSMC_SEGMENT_MMC	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_MMC	/;"	d
K2G_MSMC_SEGMENT_NSS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_NSS	/;"	d
K2G_MSMC_SEGMENT_PCIE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_PCIE	/;"	d
K2G_MSMC_SEGMENT_PMMC	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_PMMC	/;"	d
K2G_MSMC_SEGMENT_USB	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2G_MSMC_SEGMENT_USB	/;"	d
K2G_PADCFG_REG	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define K2G_PADCFG_REG	/;"	d
K2HKE_MSMC_SEGMENT_HYPERLINK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2HKE_MSMC_SEGMENT_HYPERLINK	/;"	d
K2HKLE_MSMC_SEGMENT_ARM	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2HKLE_MSMC_SEGMENT_ARM	/;"	d
K2HKLE_MSMC_SEGMENT_NETCP	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2HKLE_MSMC_SEGMENT_NETCP	/;"	d
K2HKLE_MSMC_SEGMENT_PCIE0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2HKLE_MSMC_SEGMENT_PCIE0	/;"	d
K2HKLE_MSMC_SEGMENT_QM_PDSP	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2HKLE_MSMC_SEGMENT_QM_PDSP	/;"	d
K2L_MSMC_SEGMENT_PCIE1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define K2L_MSMC_SEGMENT_PCIE1	/;"	d
K4B2G1646EBIH9_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_EMIF_READ_LATENCY	/;"	d
K4B2G1646EBIH9_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_EMIF_SDCFG	/;"	d
K4B2G1646EBIH9_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_EMIF_SDREF	/;"	d
K4B2G1646EBIH9_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_EMIF_TIM1	/;"	d
K4B2G1646EBIH9_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_EMIF_TIM2	/;"	d
K4B2G1646EBIH9_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_EMIF_TIM3	/;"	d
K4B2G1646EBIH9_INVERT_CLKOUT	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_INVERT_CLKOUT	/;"	d
K4B2G1646EBIH9_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_IOCTRL_VALUE	/;"	d
K4B2G1646EBIH9_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_PHY_FIFO_WE	/;"	d
K4B2G1646EBIH9_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_PHY_WR_DATA	/;"	d
K4B2G1646EBIH9_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_RATIO	/;"	d
K4B2G1646EBIH9_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_RD_DQS	/;"	d
K4B2G1646EBIH9_WR_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_WR_DQS	/;"	d
K4B2G1646EBIH9_ZQ_CFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define K4B2G1646EBIH9_ZQ_CFG	/;"	d
K8_INTP_C1E_ACTIVE_MASK	arch/x86/include/asm/msr-index.h	/^#define K8_INTP_C1E_ACTIVE_MASK	/;"	d
K8_MTRRFIXRANGE_DRAM_ENABLE	arch/x86/include/asm/msr-index.h	/^#define K8_MTRRFIXRANGE_DRAM_ENABLE	/;"	d
K8_MTRRFIXRANGE_DRAM_MODIFY	arch/x86/include/asm/msr-index.h	/^#define K8_MTRRFIXRANGE_DRAM_MODIFY	/;"	d
K8_MTRR_RDMEM_WRMEM_MASK	arch/x86/include/asm/msr-index.h	/^#define K8_MTRR_RDMEM_WRMEM_MASK	/;"	d
KAPWR_KEY	arch/powerpc/include/asm/5xx_immap.h	/^#define KAPWR_KEY	/;"	d
KAPWR_KEY	arch/powerpc/include/asm/8xx_immap.h	/^#define KAPWR_KEY	/;"	d
KASAN_ABI_VERSION	include/linux/compiler-gcc.h	/^#define KASAN_ABI_VERSION /;"	d
KB	lib/lz4.c	/^#define KB /;"	d	file:
KB9202_NAND_BUSY	drivers/mtd/nand/kb9202_nand.c	/^#define KB9202_NAND_BUSY /;"	d	file:
KB9202_NAND_NCE	drivers/mtd/nand/kb9202_nand.c	/^#define KB9202_NAND_NCE /;"	d	file:
KB9202_SMC2_NWS	drivers/mtd/nand/kb9202_nand.c	/^#define KB9202_SMC2_NWS /;"	d	file:
KB9202_SMC2_RWHOLD	drivers/mtd/nand/kb9202_nand.c	/^#define KB9202_SMC2_RWHOLD /;"	d	file:
KB9202_SMC2_RWSETUP	drivers/mtd/nand/kb9202_nand.c	/^#define KB9202_SMC2_RWSETUP /;"	d	file:
KB9202_SMC2_TDF	drivers/mtd/nand/kb9202_nand.c	/^#define KB9202_SMC2_TDF /;"	d	file:
KBADC_BEAGLEFPGA	board/ti/beagle/beagle.c	/^#define KBADC_BEAGLEFPGA	/;"	d	file:
KBC_CLOCK_KHZ	drivers/input/tegra-kbc.c	/^	KBC_CLOCK_KHZ		= 32,	\/* Keyboard uses a 32KHz clock *\/$/;"	e	enum:__anoncdaa02530203	file:
KBC_CONTROL_FIFO_CNT_INT_EN	drivers/input/tegra-kbc.c	/^#define KBC_CONTROL_FIFO_CNT_INT_EN	/;"	d	file:
KBC_CONTROL_KBC_EN	drivers/input/tegra-kbc.c	/^#define KBC_CONTROL_KBC_EN	/;"	d	file:
KBC_DEBOUNCE_CNT_SHIFT	drivers/input/tegra-kbc.c	/^#define KBC_DEBOUNCE_CNT_SHIFT	/;"	d	file:
KBC_DEBOUNCE_COUNT	drivers/input/tegra-kbc.c	/^	KBC_DEBOUNCE_COUNT	= 2,$/;"	e	enum:__anoncdaa02530203	file:
KBC_FIFO_TH_CNT_SHIFT	drivers/input/tegra-kbc.c	/^#define KBC_FIFO_TH_CNT_SHIFT	/;"	d	file:
KBC_INT_FIFO_CNT_INT_STATUS	drivers/input/tegra-kbc.c	/^#define KBC_INT_FIFO_CNT_INT_STATUS	/;"	d	file:
KBC_KPENT_VALID	drivers/input/tegra-kbc.c	/^#define KBC_KPENT_VALID	/;"	d	file:
KBC_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  KBC_LPC_EN	/;"	d
KBC_MAX_GPIO	drivers/input/tegra-kbc.c	/^	KBC_MAX_GPIO		= 24,$/;"	e	enum:__anoncdaa02530103	file:
KBC_MAX_KEYS	drivers/input/cros_ec_keyb.c	/^	KBC_MAX_KEYS		= 8,	\/* Maximum keys held down at once *\/$/;"	e	enum:__anon4cf8068b0103	file:
KBC_MAX_KPENT	drivers/input/tegra-kbc.c	/^	KBC_MAX_KPENT		= 8,	\/* size of keypress entry queue *\/$/;"	e	enum:__anoncdaa02530103	file:
KBC_REPEAT_DELAY_MS	drivers/input/cros_ec_keyb.c	/^	KBC_REPEAT_DELAY_MS	= 240,$/;"	e	enum:__anon4cf8068b0103	file:
KBC_REPEAT_DELAY_MS	drivers/input/tegra-kbc.c	/^	KBC_REPEAT_DELAY_MS	= 240,$/;"	e	enum:__anoncdaa02530203	file:
KBC_REPEAT_RATE_MS	drivers/input/cros_ec_keyb.c	/^	KBC_REPEAT_RATE_MS	= 30,$/;"	e	enum:__anon4cf8068b0103	file:
KBC_REPEAT_RATE_MS	drivers/input/tegra-kbc.c	/^	KBC_REPEAT_RATE_MS	= 30,$/;"	e	enum:__anoncdaa02530203	file:
KBC_ST_STATUS	drivers/input/tegra-kbc.c	/^#define KBC_ST_STATUS	/;"	d	file:
KBC_TEST_OK	include/i8042.h	/^#define KBC_TEST_OK	/;"	d
KBC_TIMEOUT	board/mpl/common/kbd.c	/^#define KBC_TIMEOUT	/;"	d	file:
KBC_TIMEOUT	include/pc_keyb.h	/^#define KBC_TIMEOUT /;"	d
KBDCMD	arch/x86/include/asm/ibmpc.h	/^#define KBDCMD /;"	d
KBDDATA	arch/x86/include/asm/ibmpc.h	/^#define KBDDATA /;"	d
KBD_ACK	include/i8042.h	/^#define KBD_ACK	/;"	d
KBD_BUFFER_LEN	board/mpl/common/kbd.c	/^#define	KBD_BUFFER_LEN	/;"	d	file:
KBD_CCMD_GET_VERSION	board/mpl/common/kbd.c	/^#define KBD_CCMD_GET_VERSION	/;"	d	file:
KBD_CCMD_GET_VERSION	include/pc_keyb.h	/^#define KBD_CCMD_GET_VERSION	/;"	d
KBD_CCMD_KBD_DISABLE	board/mpl/common/kbd.c	/^#define KBD_CCMD_KBD_DISABLE	/;"	d	file:
KBD_CCMD_KBD_DISABLE	include/pc_keyb.h	/^#define KBD_CCMD_KBD_DISABLE	/;"	d
KBD_CCMD_KBD_ENABLE	board/mpl/common/kbd.c	/^#define KBD_CCMD_KBD_ENABLE	/;"	d	file:
KBD_CCMD_KBD_ENABLE	include/pc_keyb.h	/^#define KBD_CCMD_KBD_ENABLE	/;"	d
KBD_CCMD_KBD_TEST	board/mpl/common/kbd.c	/^#define KBD_CCMD_KBD_TEST	/;"	d	file:
KBD_CCMD_KBD_TEST	include/pc_keyb.h	/^#define KBD_CCMD_KBD_TEST	/;"	d
KBD_CCMD_MOUSE_DISABLE	board/mpl/common/kbd.c	/^#define KBD_CCMD_MOUSE_DISABLE	/;"	d	file:
KBD_CCMD_MOUSE_DISABLE	include/pc_keyb.h	/^#define KBD_CCMD_MOUSE_DISABLE	/;"	d
KBD_CCMD_MOUSE_ENABLE	board/mpl/common/kbd.c	/^#define KBD_CCMD_MOUSE_ENABLE	/;"	d	file:
KBD_CCMD_MOUSE_ENABLE	include/pc_keyb.h	/^#define KBD_CCMD_MOUSE_ENABLE	/;"	d
KBD_CCMD_READ_MODE	board/mpl/common/kbd.c	/^#define KBD_CCMD_READ_MODE	/;"	d	file:
KBD_CCMD_READ_MODE	include/pc_keyb.h	/^#define KBD_CCMD_READ_MODE	/;"	d
KBD_CCMD_SELF_TEST	board/mpl/common/kbd.c	/^#define KBD_CCMD_SELF_TEST	/;"	d	file:
KBD_CCMD_SELF_TEST	include/pc_keyb.h	/^#define KBD_CCMD_SELF_TEST	/;"	d
KBD_CCMD_TEST_MOUSE	board/mpl/common/kbd.c	/^#define KBD_CCMD_TEST_MOUSE	/;"	d	file:
KBD_CCMD_TEST_MOUSE	include/pc_keyb.h	/^#define KBD_CCMD_TEST_MOUSE	/;"	d
KBD_CCMD_WRITE_AUX_OBUF	board/mpl/common/kbd.c	/^#define KBD_CCMD_WRITE_AUX_OBUF	/;"	d	file:
KBD_CCMD_WRITE_AUX_OBUF	include/pc_keyb.h	/^#define KBD_CCMD_WRITE_AUX_OBUF	/;"	d
KBD_CCMD_WRITE_MODE	board/mpl/common/kbd.c	/^#define KBD_CCMD_WRITE_MODE	/;"	d	file:
KBD_CCMD_WRITE_MODE	include/pc_keyb.h	/^#define KBD_CCMD_WRITE_MODE	/;"	d
KBD_CCMD_WRITE_MOUSE	board/mpl/common/kbd.c	/^#define KBD_CCMD_WRITE_MOUSE	/;"	d	file:
KBD_CCMD_WRITE_MOUSE	include/pc_keyb.h	/^#define KBD_CCMD_WRITE_MOUSE	/;"	d
KBD_CMD_DISABLE	board/mpl/common/kbd.c	/^#define KBD_CMD_DISABLE	/;"	d	file:
KBD_CMD_DISABLE	include/pc_keyb.h	/^#define KBD_CMD_DISABLE	/;"	d
KBD_CMD_ENABLE	board/mpl/common/kbd.c	/^#define KBD_CMD_ENABLE	/;"	d	file:
KBD_CMD_ENABLE	include/pc_keyb.h	/^#define KBD_CMD_ENABLE	/;"	d
KBD_CMD_RESET	board/mpl/common/kbd.c	/^#define KBD_CMD_RESET	/;"	d	file:
KBD_CMD_RESET	include/pc_keyb.h	/^#define KBD_CMD_RESET	/;"	d
KBD_CMD_SET_LEDS	board/mpl/common/kbd.c	/^#define KBD_CMD_SET_LEDS	/;"	d	file:
KBD_CMD_SET_LEDS	include/pc_keyb.h	/^#define KBD_CMD_SET_LEDS	/;"	d
KBD_CMD_SET_RATE	board/mpl/common/kbd.c	/^#define KBD_CMD_SET_RATE	/;"	d	file:
KBD_CMD_SET_RATE	include/pc_keyb.h	/^#define KBD_CMD_SET_RATE	/;"	d
KBD_CNTL_REG	include/pc_keyb.h	/^#define KBD_CNTL_REG	/;"	d
KBD_DATA_REG	include/pc_keyb.h	/^#define KBD_DATA_REG	/;"	d
KBD_ENGLISH	drivers/input/input.c	/^	KBD_ENGLISH	= 1 << 0,$/;"	e	enum:kbd_mask	file:
KBD_GER	include/i8042.h	/^#define KBD_GER	/;"	d
KBD_GERMAN	drivers/input/input.c	/^	KBD_GERMAN	= 1 << 1,$/;"	e	enum:kbd_mask	file:
KBD_INIT_TIMEOUT	board/mpl/common/kbd.c	/^#define KBD_INIT_TIMEOUT	/;"	d	file:
KBD_INIT_TIMEOUT	include/pc_keyb.h	/^#define KBD_INIT_TIMEOUT /;"	d
KBD_INTERRUPT	board/mpl/common/kbd.h	/^#define KBD_INTERRUPT /;"	d
KBD_IRQ	arch/x86/include/asm/ibmpc.h	/^#define KBD_IRQ	/;"	d
KBD_MODE_DISABLE_KBD	board/mpl/common/kbd.c	/^#define KBD_MODE_DISABLE_KBD	/;"	d	file:
KBD_MODE_DISABLE_KBD	include/pc_keyb.h	/^#define KBD_MODE_DISABLE_KBD	/;"	d
KBD_MODE_DISABLE_MOUSE	board/mpl/common/kbd.c	/^#define KBD_MODE_DISABLE_MOUSE	/;"	d	file:
KBD_MODE_DISABLE_MOUSE	include/pc_keyb.h	/^#define KBD_MODE_DISABLE_MOUSE	/;"	d
KBD_MODE_KBD_INT	board/mpl/common/kbd.c	/^#define KBD_MODE_KBD_INT	/;"	d	file:
KBD_MODE_KBD_INT	include/pc_keyb.h	/^#define KBD_MODE_KBD_INT	/;"	d
KBD_MODE_KCC	board/mpl/common/kbd.c	/^#define KBD_MODE_KCC	/;"	d	file:
KBD_MODE_KCC	include/pc_keyb.h	/^#define KBD_MODE_KCC	/;"	d
KBD_MODE_MOUSE_INT	board/mpl/common/kbd.c	/^#define KBD_MODE_MOUSE_INT	/;"	d	file:
KBD_MODE_MOUSE_INT	include/pc_keyb.h	/^#define KBD_MODE_MOUSE_INT	/;"	d
KBD_MODE_NO_KEYLOCK	board/mpl/common/kbd.c	/^#define KBD_MODE_NO_KEYLOCK	/;"	d	file:
KBD_MODE_NO_KEYLOCK	include/pc_keyb.h	/^#define KBD_MODE_NO_KEYLOCK	/;"	d
KBD_MODE_RFU	board/mpl/common/kbd.c	/^#define KBD_MODE_RFU	/;"	d	file:
KBD_MODE_RFU	include/pc_keyb.h	/^#define KBD_MODE_RFU	/;"	d
KBD_MODE_SYS	board/mpl/common/kbd.c	/^#define KBD_MODE_SYS	/;"	d	file:
KBD_MODE_SYS	include/pc_keyb.h	/^#define KBD_MODE_SYS	/;"	d
KBD_POR	include/i8042.h	/^#define KBD_POR	/;"	d
KBD_REPLY_ACK	board/mpl/common/kbd.c	/^#define KBD_REPLY_ACK	/;"	d	file:
KBD_REPLY_ACK	include/pc_keyb.h	/^#define KBD_REPLY_ACK	/;"	d
KBD_REPLY_POR	board/mpl/common/kbd.c	/^#define KBD_REPLY_POR	/;"	d	file:
KBD_REPLY_POR	include/pc_keyb.h	/^#define KBD_REPLY_POR	/;"	d
KBD_REPLY_RESEND	board/mpl/common/kbd.c	/^#define KBD_REPLY_RESEND	/;"	d	file:
KBD_REPLY_RESEND	include/pc_keyb.h	/^#define KBD_REPLY_RESEND	/;"	d
KBD_REPORT_TIMEOUTS	include/pc_keyb.h	/^#define KBD_REPORT_TIMEOUTS	/;"	d
KBD_REPORT_UNKN	include/pc_keyb.h	/^#define KBD_REPORT_UNKN	/;"	d
KBD_RESET_TRIES	include/i8042.h	/^#define KBD_RESET_TRIES	/;"	d
KBD_STATUS_REG	include/pc_keyb.h	/^#define KBD_STATUS_REG	/;"	d
KBD_STAT_CD	board/mpl/common/kbd.c	/^#define KBD_STAT_CD	/;"	d	file:
KBD_STAT_CMD	board/mpl/common/kbd.c	/^#define KBD_STAT_CMD	/;"	d	file:
KBD_STAT_CMD	include/pc_keyb.h	/^#define KBD_STAT_CMD	/;"	d
KBD_STAT_DEFAULT	drivers/input/ps2mult.c	/^#define KBD_STAT_DEFAULT	/;"	d	file:
KBD_STAT_GTO	board/mpl/common/kbd.c	/^#define KBD_STAT_GTO	/;"	d	file:
KBD_STAT_GTO	include/pc_keyb.h	/^#define KBD_STAT_GTO	/;"	d
KBD_STAT_IBF	board/mpl/common/kbd.c	/^#define KBD_STAT_IBF	/;"	d	file:
KBD_STAT_IBF	include/pc_keyb.h	/^#define KBD_STAT_IBF	/;"	d
KBD_STAT_KOBF	board/mpl/common/kbd.c	/^#define KBD_STAT_KOBF	/;"	d	file:
KBD_STAT_LOCK	board/mpl/common/kbd.c	/^#define KBD_STAT_LOCK	/;"	d	file:
KBD_STAT_MOBF	board/mpl/common/kbd.c	/^#define KBD_STAT_MOBF	/;"	d	file:
KBD_STAT_MOUSE_OBF	board/mpl/common/kbd.c	/^#define KBD_STAT_MOUSE_OBF	/;"	d	file:
KBD_STAT_MOUSE_OBF	include/pc_keyb.h	/^#define KBD_STAT_MOUSE_OBF	/;"	d
KBD_STAT_OBF	board/mpl/common/kbd.c	/^#define KBD_STAT_OBF	/;"	d	file:
KBD_STAT_OBF	include/pc_keyb.h	/^#define KBD_STAT_OBF	/;"	d
KBD_STAT_PARERR	board/mpl/common/kbd.c	/^#define KBD_STAT_PARERR	/;"	d	file:
KBD_STAT_PERR	board/mpl/common/kbd.c	/^#define KBD_STAT_PERR	/;"	d	file:
KBD_STAT_PERR	include/pc_keyb.h	/^#define KBD_STAT_PERR	/;"	d
KBD_STAT_SELFTEST	board/mpl/common/kbd.c	/^#define KBD_STAT_SELFTEST	/;"	d	file:
KBD_STAT_SELFTEST	include/pc_keyb.h	/^#define KBD_STAT_SELFTEST	/;"	d
KBD_STAT_SYS	board/mpl/common/kbd.c	/^#define KBD_STAT_SYS	/;"	d	file:
KBD_STAT_TI_OUT	board/mpl/common/kbd.c	/^#define KBD_STAT_TI_OUT	/;"	d	file:
KBD_STAT_UNLOCKED	board/mpl/common/kbd.c	/^#define KBD_STAT_UNLOCKED	/;"	d	file:
KBD_STAT_UNLOCKED	include/pc_keyb.h	/^#define KBD_STAT_UNLOCKED	/;"	d
KBD_TIMEOUT	board/mpl/common/kbd.c	/^#define KBD_TIMEOUT	/;"	d	file:
KBD_TIMEOUT	include/i8042.h	/^#define KBD_TIMEOUT	/;"	d
KBD_TIMEOUT	include/pc_keyb.h	/^#define KBD_TIMEOUT /;"	d
KBD_US	include/i8042.h	/^#define KBD_US	/;"	d
KBUILD_AFLAGS	Makefile	/^KBUILD_AFLAGS   := -D__ASSEMBLY__$/;"	m
KBUILD_BUILTIN	Makefile	/^  KBUILD_BUILTIN := $(if $(CONFIG_MODVERSIONS),1)$/;"	m
KBUILD_BUILTIN	Makefile	/^KBUILD_BUILTIN := 1$/;"	m
KBUILD_CFLAGS	Makefile	/^KBUILD_CFLAGS   := -Wall -Wstrict-prototypes \\$/;"	m
KBUILD_CHECKSRC	Makefile	/^  KBUILD_CHECKSRC = $(C)$/;"	m
KBUILD_CHECKSRC	Makefile	/^  KBUILD_CHECKSRC = 0$/;"	m
KBUILD_CPPFLAGS	Makefile	/^KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__$/;"	m
KBUILD_DEFCONFIG	Makefile	/^KBUILD_DEFCONFIG := sandbox_defconfig$/;"	m
KBUILD_EXTMOD	Makefile	/^  KBUILD_EXTMOD := $(M)$/;"	m
KBUILD_EXTMOD	Makefile	/^  KBUILD_EXTMOD ?= $(SUBDIRS)$/;"	m
KBUILD_MODULES	Makefile	/^KBUILD_MODULES :=$/;"	m
KBUILD_OUTPUT	Makefile	/^  KBUILD_OUTPUT := $(O)$/;"	m
KBUILD_OUTPUT	Makefile	/^KBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \\$/;"	m
KBUILD_VERBOSE	Makefile	/^  KBUILD_VERBOSE = $(V)$/;"	m
KBUILD_VERBOSE	Makefile	/^  KBUILD_VERBOSE = 0$/;"	m
KC1_GPIO_MBID0	board/amazon/kc1/kc1.h	/^#define KC1_GPIO_MBID0	/;"	d
KC1_GPIO_MBID1	board/amazon/kc1/kc1.h	/^#define KC1_GPIO_MBID1	/;"	d
KC1_GPIO_MBID2	board/amazon/kc1/kc1.h	/^#define KC1_GPIO_MBID2	/;"	d
KC1_GPIO_MBID3	board/amazon/kc1/kc1.h	/^#define KC1_GPIO_MBID3	/;"	d
KC1_GPIO_USB_ID	board/amazon/kc1/kc1.h	/^#define KC1_GPIO_USB_ID	/;"	d
KCONF	arch/powerpc/include/asm/ppc405gp.h	/^#define KCONF	/;"	d
KCONFIG_CONFIG	Makefile	/^KCONFIG_CONFIG	?= .config$/;"	m
KDB_COMMAND_PORT	board/mpl/common/kbd.c	/^#define KDB_COMMAND_PORT	/;"	d	file:
KDB_DATA_PORT	board/mpl/common/kbd.c	/^#define KDB_DATA_PORT	/;"	d	file:
KDM_TO_PHYS	arch/mips/include/asm/addrspace.h	/^#define KDM_TO_PHYS(/;"	d
KEEP_OTG_ON	include/usb/ehci-ci.h	/^#define KEEP_OTG_ON	/;"	d
KEEP_SEGMENTS	arch/x86/include/asm/bootparam.h	/^#define KEEP_SEGMENTS	/;"	d
KEEP_STATUS	board/freescale/ls1021atwr/ls1021atwr.c	/^#define KEEP_STATUS	/;"	d	file:
KEK_BLOCKSIZE	drivers/crypto/fsl/desc.h	/^#define KEK_BLOCKSIZE	/;"	d
KERNELBASE	include/ppc_defs.h	/^#define	KERNELBASE	/;"	d
KERNELDOC	doc/DocBook/Makefile	/^KERNELDOC = $(srctree)\/scripts\/kernel-doc$/;"	m
KERNELDOC	scripts/docproc.c	/^#define KERNELDOC /;"	d	file:
KERNELDOCPATH	scripts/docproc.c	/^#define KERNELDOCPATH /;"	d	file:
KERNEL_ADDRESS	include/configs/nokia_rx51.h	/^#define KERNEL_ADDRESS	/;"	d
KERNEL_ADDR_R	include/configs/sunxi-common.h	/^#define KERNEL_ADDR_R	/;"	d
KERNEL_ADDR_R	include/configs/sunxi-common.h	/^#define KERNEL_ADDR_R /;"	d
KERNEL_ADDR_R	include/configs/uniphier.h	/^#define KERNEL_ADDR_R	/;"	d
KERNEL_MAGIC	arch/x86/include/asm/zimage.h	/^#define KERNEL_MAGIC /;"	d
KERNEL_MAXSIZE	include/configs/nokia_rx51.h	/^#define KERNEL_MAXSIZE	/;"	d
KERNEL_NV_INDEX	drivers/tpm/tpm_tis_sandbox.c	/^#define KERNEL_NV_INDEX	/;"	d	file:
KERNEL_OFFSET	include/configs/nokia_rx51.h	/^#define KERNEL_OFFSET	/;"	d
KERNEL_SIZE	include/configs/uniphier.h	/^#define KERNEL_SIZE	/;"	d
KERNEL_STACK_SIZE	arch/arm/include/asm/proc-armv/processor.h	/^#define KERNEL_STACK_SIZE	/;"	d
KERNEL_STACK_SIZE	arch/xtensa/include/asm/ptrace.h	/^#define KERNEL_STACK_SIZE /;"	d
KERNEL_V2_MAGIC	arch/x86/include/asm/zimage.h	/^#define KERNEL_V2_MAGIC /;"	d
KERNEL_VERSION	include/linux/compat.h	/^#define KERNEL_VERSION(/;"	d
KERN_ALERT	include/linux/compat.h	/^#define KERN_ALERT$/;"	d
KERN_CRIT	include/linux/compat.h	/^#define KERN_CRIT$/;"	d
KERN_DEBUG	include/linux/compat.h	/^#define KERN_DEBUG$/;"	d
KERN_EMERG	include/linux/compat.h	/^#define KERN_EMERG$/;"	d
KERN_ERR	include/linux/compat.h	/^#define KERN_ERR$/;"	d
KERN_INFO	include/linux/compat.h	/^#define KERN_INFO$/;"	d
KERN_NOTICE	include/linux/compat.h	/^#define KERN_NOTICE$/;"	d
KERN_WARNING	include/linux/compat.h	/^#define KERN_WARNING$/;"	d
KEY	fs/reiserfs/reiserfs_private.h	/^#define KEY(/;"	d
KEYBD_CMD_READ_KEYS	board/liebherr/lwmon5/kbd.c	/^#define	KEYBD_CMD_READ_KEYS	/;"	d	file:
KEYBD_CMD_READ_STATUS	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_CMD_READ_STATUS	/;"	d	file:
KEYBD_CMD_READ_VERSION	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_CMD_READ_VERSION	/;"	d	file:
KEYBD_CMD_RESET_ERRORS	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_CMD_RESET_ERRORS	/;"	d	file:
KEYBD_DATALEN	board/liebherr/lwmon5/kbd.c	/^#define	KEYBD_DATALEN	/;"	d	file:
KEYBD_SET_DEBUGMODE	board/liebherr/lwmon5/kbd.c	/^#define	KEYBD_SET_DEBUGMODE	/;"	d	file:
KEYBD_STATUS_BROWNOUT	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_STATUS_BROWNOUT	/;"	d	file:
KEYBD_STATUS_H_RESET	board/liebherr/lwmon5/kbd.c	/^#define	KEYBD_STATUS_H_RESET	/;"	d	file:
KEYBD_STATUS_ILLEGAL_RD	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_STATUS_ILLEGAL_RD	/;"	d	file:
KEYBD_STATUS_ILLEGAL_WR	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_STATUS_ILLEGAL_WR	/;"	d	file:
KEYBD_STATUS_MASK	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_STATUS_MASK	/;"	d	file:
KEYBD_STATUS_OVERLOAD	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_STATUS_OVERLOAD	/;"	d	file:
KEYBD_STATUS_WD_RESET	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_STATUS_WD_RESET	/;"	d	file:
KEYBD_VERSIONLEN	board/liebherr/lwmon5/kbd.c	/^#define KEYBD_VERSIONLEN	/;"	d	file:
KEYBOARD_COLS	drivers/misc/cros_ec_sandbox.c	/^#define KEYBOARD_COLS	/;"	d	file:
KEYBOARD_ROWS	drivers/misc/cros_ec_sandbox.c	/^#define KEYBOARD_ROWS	/;"	d	file:
KEYBUF_SIZE	board/nokia/rx51/rx51.c	/^#define KEYBUF_SIZE /;"	d	file:
KEYIN0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A20_MARK, KEYIN0_MARK, MSIOF0_RSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN0_PORT43_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN0_PORT43_MARK, \/* MSEL4CR_18_0 *\/$/;"	e	enum:__anona304c1340103	file:
KEYIN0_PORT58_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN0_PORT58_MARK, \/* MSEL4CR_18_1 *\/$/;"	e	enum:__anona304c1340103	file:
KEYIN0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A21_MARK, KEYIN1_MARK, MSIOF0_RSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN1_PORT44_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN1_PORT44_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN1_PORT57_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN1_PORT57_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A22_MARK, KEYIN2_MARK, MSIOF0_MCK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN2_PORT45_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN2_PORT45_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN2_PORT56_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN2_PORT56_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN2_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN2_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A23_MARK, KEYIN3_MARK, MSIOF0_MCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN3_PORT46_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN3_PORT46_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN3_PORT55_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN3_PORT55_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN3_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN3_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN4_MARK,	KEYIN5_MARK,	KEYIN6_MARK,	KEYIN7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A24_MARK, KEYIN4_MARK, MSIOF0_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN4_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN4_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN4_MARK,	KEYIN5_MARK,	KEYIN6_MARK,	KEYIN7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A25_MARK, KEYIN5_MARK, MSIOF0_SS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN5_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN5_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN4_MARK,	KEYIN5_MARK,	KEYIN6_MARK,	KEYIN7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A26_MARK, KEYIN6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN6_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN6_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYIN4_MARK,	KEYIN5_MARK,	KEYIN6_MARK,	KEYIN7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYIN7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYIN7_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYIN7_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT0_MARK,	KEYOUT1_MARK,	KEYOUT2_MARK,	KEYOUT3_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A19_MARK, KEYOUT0_MARK, MSIOF0_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT0_MARK,	KEYOUT1_MARK,	KEYOUT2_MARK,	KEYOUT3_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A18_MARK, KEYOUT1_MARK, MSIOF0_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT0_MARK,	KEYOUT1_MARK,	KEYOUT2_MARK,	KEYOUT3_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A17_MARK, KEYOUT2_MARK, MSIOF0_TSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT0_MARK,	KEYOUT1_MARK,	KEYOUT2_MARK,	KEYOUT3_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A16_MARK, KEYOUT3_MARK, MSIOF0_SS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT4_MARK,	KEYOUT5_MARK,	KEYOUT6_MARK,	KEYOUT7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A15_MARK, KEYOUT4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT4_MARK,	KEYOUT5_MARK,	KEYOUT6_MARK,	KEYOUT7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A14_MARK, KEYOUT5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYOUT6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT4_MARK,	KEYOUT5_MARK,	KEYOUT6_MARK,	KEYOUT7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	KEYOUT4_MARK,	KEYOUT5_MARK,	KEYOUT6_MARK,	KEYOUT7_MARK,$/;"	e	enum:__anona304c1340103	file:
KEYOUT8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	KEYOUT8_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
KEYSTONE2_EMAC_GIG_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define KEYSTONE2_EMAC_GIG_ENABLE$/;"	d
KEY_0	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_0	/;"	d
KEY_0	include/linux/input.h	/^#define KEY_0	/;"	d
KEY_1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_1	/;"	d
KEY_1	include/linux/input.h	/^#define KEY_1	/;"	d
KEY_102ND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_102ND	/;"	d
KEY_102ND	include/linux/input.h	/^#define KEY_102ND	/;"	d
KEY_10CHANNELSDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSDOWN	/;"	d
KEY_10CHANNELSUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_10CHANNELSUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_10CHANNELSUP	/;"	d
KEY_2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_2	/;"	d
KEY_2	include/linux/input.h	/^#define KEY_2	/;"	d
KEY_3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_3	/;"	d
KEY_3	include/linux/input.h	/^#define KEY_3	/;"	d
KEY_4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_4	/;"	d
KEY_4	include/linux/input.h	/^#define KEY_4	/;"	d
KEY_5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_5	/;"	d
KEY_5	include/linux/input.h	/^#define KEY_5	/;"	d
KEY_6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_6	/;"	d
KEY_6	include/linux/input.h	/^#define KEY_6	/;"	d
KEY_7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_7	/;"	d
KEY_7	include/linux/input.h	/^#define KEY_7	/;"	d
KEY_8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_8	/;"	d
KEY_8	include/linux/input.h	/^#define KEY_8	/;"	d
KEY_9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_9	/;"	d
KEY_9	include/linux/input.h	/^#define KEY_9	/;"	d
KEY_A	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_A	/;"	d
KEY_A	include/linux/input.h	/^#define KEY_A	/;"	d
KEY_AB	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_AB	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AB	/;"	d
KEY_ADDRESSBOOK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_ADDRESSBOOK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ADDRESSBOOK	/;"	d
KEY_AES_SRC	drivers/crypto/fsl/desc.h	/^#define KEY_AES_SRC	/;"	d
KEY_AGAIN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_AGAIN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AGAIN	/;"	d
KEY_ALS_TOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALS_TOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALS_TOGGLE	/;"	d
KEY_ALTERASE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ALTERASE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ALTERASE	/;"	d
KEY_ANGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_ANGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ANGLE	/;"	d
KEY_APOSTROPHE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APOSTROPHE	include/linux/input.h	/^#define KEY_APOSTROPHE	/;"	d
KEY_APPSELECT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_APPSELECT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_APPSELECT	/;"	d
KEY_ARCHIVE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ARCHIVE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ARCHIVE	/;"	d
KEY_ATTENDANT_OFF	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_OFF	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_OFF	/;"	d
KEY_ATTENDANT_ON	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_ON	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_ON	/;"	d
KEY_ATTENDANT_TOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_ATTENDANT_TOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ATTENDANT_TOGGLE	/;"	d
KEY_AUDIO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUDIO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUDIO	/;"	d
KEY_AUX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_AUX	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_AUX	/;"	d
KEY_B	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_B	/;"	d
KEY_B	include/linux/input.h	/^#define KEY_B	/;"	d
KEY_BACK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACK	/;"	d
KEY_BACKSLASH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSLASH	include/linux/input.h	/^#define KEY_BACKSLASH	/;"	d
KEY_BACKSPACE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BACKSPACE	include/linux/input.h	/^#define KEY_BACKSPACE	/;"	d
KEY_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define KEY_BASE	/;"	d
KEY_BASSBOOST	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BASSBOOST	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BASSBOOST	/;"	d
KEY_BATTERY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BATTERY	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BATTERY	/;"	d
KEY_BLOB_SIZE	drivers/crypto/fsl/desc.h	/^#define KEY_BLOB_SIZE	/;"	d
KEY_BLUE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUE	/;"	d
KEY_BLUETOOTH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BLUETOOTH	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BLUETOOTH	/;"	d
KEY_BOOKMARKS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BOOKMARKS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BOOKMARKS	/;"	d
KEY_BREAK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BREAK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BREAK	/;"	d
KEY_BRIGHTNESSDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSDOWN	/;"	d
KEY_BRIGHTNESSUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESSUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESSUP	/;"	d
KEY_BRIGHTNESS_AUTO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_AUTO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_AUTO	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_CYCLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_CYCLE	/;"	d
KEY_BRIGHTNESS_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MAX	/;"	d
KEY_BRIGHTNESS_MIN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_MIN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_MIN	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_TOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_TOGGLE	/;"	d
KEY_BRIGHTNESS_ZERO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRIGHTNESS_ZERO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRIGHTNESS_ZERO	/;"	d
KEY_BRL_DOT1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT1	/;"	d
KEY_BRL_DOT10	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT10	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT10	/;"	d
KEY_BRL_DOT2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT2	/;"	d
KEY_BRL_DOT3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT3	/;"	d
KEY_BRL_DOT4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT4	/;"	d
KEY_BRL_DOT5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT5	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT5	/;"	d
KEY_BRL_DOT6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT6	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT6	/;"	d
KEY_BRL_DOT7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT7	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT7	/;"	d
KEY_BRL_DOT8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT8	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT8	/;"	d
KEY_BRL_DOT9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BRL_DOT9	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BRL_DOT9	/;"	d
KEY_BUTTONCONFIG	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_BUTTONCONFIG	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_BUTTONCONFIG	/;"	d
KEY_C	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_C	/;"	d
KEY_C	include/linux/input.h	/^#define KEY_C	/;"	d
KEY_CALC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALC	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALC	/;"	d
KEY_CALENDAR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CALENDAR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CALENDAR	/;"	d
KEY_CAMERA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA	/;"	d
KEY_CAMERA_DOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_DOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_DOWN	/;"	d
KEY_CAMERA_FOCUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_FOCUS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_FOCUS	/;"	d
KEY_CAMERA_LEFT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_LEFT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_LEFT	/;"	d
KEY_CAMERA_RIGHT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_RIGHT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_RIGHT	/;"	d
KEY_CAMERA_UP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_UP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_UP	/;"	d
KEY_CAMERA_ZOOMIN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMIN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMIN	/;"	d
KEY_CAMERA_ZOOMOUT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CAMERA_ZOOMOUT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAMERA_ZOOMOUT	/;"	d
KEY_CANCEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CANCEL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CANCEL	/;"	d
KEY_CAPSLOCK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CAPSLOCK	include/linux/input.h	/^#define KEY_CAPSLOCK	/;"	d
KEY_CD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CD	/;"	d
KEY_CHANNEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNEL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNEL	/;"	d
KEY_CHANNELDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELDOWN	/;"	d
KEY_CHANNELUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHANNELUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHANNELUP	/;"	d
KEY_CHAT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHAT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CHAT	/;"	d
KEY_CHSETTINGS	tools/omapimage.h	/^#define KEY_CHSETTINGS /;"	d
KEY_CLEAR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLEAR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLEAR	/;"	d
KEY_CLOSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSE	/;"	d
KEY_CLOSECD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CLOSECD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CLOSECD	/;"	d
KEY_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CNT	/;"	d
KEY_COFFEE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COFFEE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COFFEE	/;"	d
KEY_COMMA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMMA	/;"	d
KEY_COMMA	include/linux/input.h	/^#define KEY_COMMA	/;"	d
KEY_COMPOSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPOSE	include/linux/input.h	/^#define KEY_COMPOSE	/;"	d
KEY_COMPUTER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_COMPUTER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COMPUTER	/;"	d
KEY_CONFIG	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONFIG	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONFIG	/;"	d
KEY_CONNECT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONNECT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONNECT	/;"	d
KEY_CONTEXT_MENU	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTEXT_MENU	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTEXT_MENU	/;"	d
KEY_CONTROLPANEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_CONTROLPANEL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CONTROLPANEL	/;"	d
KEY_COPY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_COPY	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_COPY	/;"	d
KEY_CUT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CUT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CUT	/;"	d
KEY_CYCLEWINDOWS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_CYCLEWINDOWS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_CYCLEWINDOWS	/;"	d
KEY_D	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_D	/;"	d
KEY_D	include/linux/input.h	/^#define KEY_D	/;"	d
KEY_DASHBOARD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DASHBOARD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DASHBOARD	/;"	d
KEY_DATABASE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DATABASE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DATABASE	/;"	d
KEY_DELETE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETE	/;"	d
KEY_DELETE	include/linux/input.h	/^#define KEY_DELETE	/;"	d
KEY_DELETEFILE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DELETEFILE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DELETEFILE	/;"	d
KEY_DEL_EOL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOL	/;"	d
KEY_DEL_EOS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_EOS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_EOS	/;"	d
KEY_DEL_LINE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEL_LINE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DEL_LINE	/;"	d
KEY_DEST_AFHA_SBOX	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_AFHA_SBOX	/;"	d
KEY_DEST_CLASS_MASK	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_CLASS_MASK	/;"	d
KEY_DEST_CLASS_REG	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_CLASS_REG	/;"	d
KEY_DEST_CLASS_SHIFT	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_CLASS_SHIFT	/;"	d
KEY_DEST_MASK	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_MASK	/;"	d
KEY_DEST_MDHA_SPLIT	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_MDHA_SPLIT	/;"	d
KEY_DEST_PKHA_E	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_PKHA_E	/;"	d
KEY_DEST_SHIFT	drivers/crypto/fsl/desc.h	/^#define KEY_DEST_SHIFT	/;"	d
KEY_DIGITS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIGITS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIGITS	/;"	d
KEY_DIRECTION	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTION	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTION	/;"	d
KEY_DIRECTORY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DIRECTORY	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DIRECTORY	/;"	d
KEY_DISPLAYTOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAYTOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAYTOGGLE	/;"	d
KEY_DISPLAY_OFF	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DISPLAY_OFF	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DISPLAY_OFF	/;"	d
KEY_DOCUMENTS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOCUMENTS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOCUMENTS	/;"	d
KEY_DOLLAR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOLLAR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOLLAR	/;"	d
KEY_DOT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOT	/;"	d
KEY_DOT	include/linux/input.h	/^#define KEY_DOT	/;"	d
KEY_DOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	cmd/bootmenu.c	/^	KEY_DOWN,$/;"	e	enum:bootmenu_key	file:
KEY_DOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DOWN	/;"	d
KEY_DOWN	include/linux/input.h	/^#define KEY_DOWN	/;"	d
KEY_DVD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_DVD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_DVD	/;"	d
KEY_E	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_E	/;"	d
KEY_E	include/linux/input.h	/^#define KEY_E	/;"	d
KEY_EDIT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDIT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDIT	/;"	d
KEY_EDITOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EDITOR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EDITOR	/;"	d
KEY_EJECTCD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCD	/;"	d
KEY_EJECTCLOSECD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EJECTCLOSECD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EJECTCLOSECD	/;"	d
KEY_EKT	drivers/crypto/fsl/desc.h	/^#define KEY_EKT	/;"	d
KEY_EMAIL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_EMAIL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EMAIL	/;"	d
KEY_ENC	drivers/crypto/fsl/desc.h	/^#define KEY_ENC	/;"	d
KEY_END	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_END	/;"	d
KEY_END	include/linux/input.h	/^#define KEY_END	/;"	d
KEY_ENTER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ENTER	/;"	d
KEY_ENTER	include/linux/input.h	/^#define KEY_ENTER	/;"	d
KEY_EPG	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EPG	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EPG	/;"	d
KEY_EQUAL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EQUAL	/;"	d
KEY_EQUAL	include/linux/input.h	/^#define KEY_EQUAL	/;"	d
KEY_ESC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ESC	/;"	d
KEY_ESC	include/linux/input.h	/^#define KEY_ESC	/;"	d
KEY_ESC	scripts/kconfig/lxdialog/dialog.h	/^#define KEY_ESC /;"	d
KEY_EURO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EURO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EURO	/;"	d
KEY_EXIT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_EXIT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_EXIT	/;"	d
KEY_F	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F	/;"	d
KEY_F	include/linux/input.h	/^#define KEY_F	/;"	d
KEY_F1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F1	/;"	d
KEY_F1	include/linux/input.h	/^#define KEY_F1	/;"	d
KEY_F10	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F10	/;"	d
KEY_F10	include/linux/input.h	/^#define KEY_F10	/;"	d
KEY_F11	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F11	/;"	d
KEY_F11	include/linux/input.h	/^#define KEY_F11	/;"	d
KEY_F12	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F12	/;"	d
KEY_F12	include/linux/input.h	/^#define KEY_F12	/;"	d
KEY_F13	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F13	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F13	/;"	d
KEY_F14	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F14	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F14	/;"	d
KEY_F15	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F15	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F15	/;"	d
KEY_F16	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F16	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F16	/;"	d
KEY_F17	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F17	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F17	/;"	d
KEY_F18	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F18	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F18	/;"	d
KEY_F19	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F19	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F19	/;"	d
KEY_F2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F2	/;"	d
KEY_F2	include/linux/input.h	/^#define KEY_F2	/;"	d
KEY_F20	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F20	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F20	/;"	d
KEY_F21	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F21	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F21	/;"	d
KEY_F22	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F22	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F22	/;"	d
KEY_F23	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F23	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F23	/;"	d
KEY_F24	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F24	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F24	/;"	d
KEY_F3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F3	/;"	d
KEY_F3	include/linux/input.h	/^#define KEY_F3	/;"	d
KEY_F4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F4	/;"	d
KEY_F4	include/linux/input.h	/^#define KEY_F4	/;"	d
KEY_F5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F5	/;"	d
KEY_F5	include/linux/input.h	/^#define KEY_F5	/;"	d
KEY_F6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F6	/;"	d
KEY_F6	include/linux/input.h	/^#define KEY_F6	/;"	d
KEY_F7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F7	/;"	d
KEY_F7	include/linux/input.h	/^#define KEY_F7	/;"	d
KEY_F8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F8	/;"	d
KEY_F8	include/linux/input.h	/^#define KEY_F8	/;"	d
KEY_F9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_F9	/;"	d
KEY_F9	include/linux/input.h	/^#define KEY_F9	/;"	d
KEY_FASTFORWARD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FASTFORWARD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FASTFORWARD	/;"	d
KEY_FAVORITES	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FAVORITES	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FAVORITES	/;"	d
KEY_FILE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FILE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FILE	/;"	d
KEY_FINANCE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FINANCE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FINANCE	/;"	d
KEY_FIND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIND	/;"	d
KEY_FIRST	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FIRST	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FIRST	/;"	d
KEY_FN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN	/;"	d
KEY_FN	include/linux/input.h	/^#define KEY_FN	/;"	d
KEY_FN_1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_1	/;"	d
KEY_FN_2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_2	/;"	d
KEY_FN_B	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_B	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_B	/;"	d
KEY_FN_D	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_D	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_D	/;"	d
KEY_FN_E	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_E	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_E	/;"	d
KEY_FN_ESC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_ESC	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_ESC	/;"	d
KEY_FN_F	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F	/;"	d
KEY_FN_F1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F1	/;"	d
KEY_FN_F10	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F10	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F10	/;"	d
KEY_FN_F11	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F11	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F11	/;"	d
KEY_FN_F12	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F12	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F12	/;"	d
KEY_FN_F2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F2	/;"	d
KEY_FN_F3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F3	/;"	d
KEY_FN_F4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F4	/;"	d
KEY_FN_F5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F5	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F5	/;"	d
KEY_FN_F6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F6	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F6	/;"	d
KEY_FN_F7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F7	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F7	/;"	d
KEY_FN_F8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F8	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F8	/;"	d
KEY_FN_F9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_F9	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_F9	/;"	d
KEY_FN_S	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FN_S	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FN_S	/;"	d
KEY_FORWARD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARD	/;"	d
KEY_FORWARDMAIL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FORWARDMAIL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FORWARDMAIL	/;"	d
KEY_FRAMEBACK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEBACK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEBACK	/;"	d
KEY_FRAMEFORWARD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRAMEFORWARD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRAMEFORWARD	/;"	d
KEY_FRONT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_FRONT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_FRONT	/;"	d
KEY_G	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_G	/;"	d
KEY_G	include/linux/input.h	/^#define KEY_G	/;"	d
KEY_GAMES	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GAMES	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GAMES	/;"	d
KEY_GOTO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GOTO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GOTO	/;"	d
KEY_GRAPHICSEDITOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAPHICSEDITOR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAPHICSEDITOR	/;"	d
KEY_GRAVE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GRAVE	/;"	d
KEY_GRAVE	include/linux/input.h	/^#define KEY_GRAVE	/;"	d
KEY_GREEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_GREEN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_GREEN	/;"	d
KEY_H	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_H	/;"	d
KEY_H	include/linux/input.h	/^#define KEY_H	/;"	d
KEY_HANGEUL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGEUL	include/linux/input.h	/^#define KEY_HANGEUL	/;"	d
KEY_HANGUEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANGUEL	include/linux/input.h	/^#define KEY_HANGUEL	/;"	d
KEY_HANJA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HANJA	/;"	d
KEY_HANJA	include/linux/input.h	/^#define KEY_HANJA	/;"	d
KEY_HELP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HELP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HELP	/;"	d
KEY_HENKAN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HENKAN	/;"	d
KEY_HENKAN	include/linux/input.h	/^#define KEY_HENKAN	/;"	d
KEY_HIRAGANA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HIRAGANA	include/linux/input.h	/^#define KEY_HIRAGANA	/;"	d
KEY_HOME	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOME	/;"	d
KEY_HOME	include/linux/input.h	/^#define KEY_HOME	/;"	d
KEY_HOMEPAGE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HOMEPAGE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HOMEPAGE	/;"	d
KEY_HP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_HP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_HP	/;"	d
KEY_I	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_I	/;"	d
KEY_I	include/linux/input.h	/^#define KEY_I	/;"	d
KEY_IDNFR_SZ_BYTES	drivers/crypto/fsl/jobdesc.h	/^#define KEY_IDNFR_SZ_BYTES	/;"	d
KEY_IMAGES	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMAGES	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_IMAGES	/;"	d
KEY_IMM	drivers/crypto/fsl/desc.h	/^#define KEY_IMM	/;"	d
KEY_INFO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INFO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INFO	/;"	d
KEY_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INSERT	/;"	d
KEY_INSERT	include/linux/input.h	/^#define KEY_INSERT	/;"	d
KEY_INS_LINE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_INS_LINE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_INS_LINE	/;"	d
KEY_ISO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_ISO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ISO	/;"	d
KEY_IS_MODIFIER	include/tegra-kbc.h	/^#define KEY_IS_MODIFIER(/;"	d
KEY_J	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_J	/;"	d
KEY_J	include/linux/input.h	/^#define KEY_J	/;"	d
KEY_JOURNAL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_JOURNAL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_JOURNAL	/;"	d
KEY_K	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_K	/;"	d
KEY_K	include/linux/input.h	/^#define KEY_K	/;"	d
KEY_KATAKANA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANA	include/linux/input.h	/^#define KEY_KATAKANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KATAKANAHIRAGANA	include/linux/input.h	/^#define KEY_KATAKANAHIRAGANA	/;"	d
KEY_KBDILLUMDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMDOWN	/;"	d
KEY_KBDILLUMTOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMTOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMTOGGLE	/;"	d
KEY_KBDILLUMUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDILLUMUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDILLUMUP	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_ACCEPT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_ACCEPT	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_CANCEL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_CANCEL	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXT	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_NEXTGROUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_NEXTGROUP	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREV	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREV	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KBDINPUTASSIST_PREVGROUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KBDINPUTASSIST_PREVGROUP	/;"	d
KEY_KEYBOARD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KEYBOARD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KEYBOARD	/;"	d
KEY_KP0	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP0	/;"	d
KEY_KP0	include/linux/input.h	/^#define KEY_KP0	/;"	d
KEY_KP1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP1	/;"	d
KEY_KP1	include/linux/input.h	/^#define KEY_KP1	/;"	d
KEY_KP2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP2	/;"	d
KEY_KP2	include/linux/input.h	/^#define KEY_KP2	/;"	d
KEY_KP3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP3	/;"	d
KEY_KP3	include/linux/input.h	/^#define KEY_KP3	/;"	d
KEY_KP4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP4	/;"	d
KEY_KP4	include/linux/input.h	/^#define KEY_KP4	/;"	d
KEY_KP5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP5	/;"	d
KEY_KP5	include/linux/input.h	/^#define KEY_KP5	/;"	d
KEY_KP6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP6	/;"	d
KEY_KP6	include/linux/input.h	/^#define KEY_KP6	/;"	d
KEY_KP7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP7	/;"	d
KEY_KP7	include/linux/input.h	/^#define KEY_KP7	/;"	d
KEY_KP8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP8	/;"	d
KEY_KP8	include/linux/input.h	/^#define KEY_KP8	/;"	d
KEY_KP9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KP9	/;"	d
KEY_KP9	include/linux/input.h	/^#define KEY_KP9	/;"	d
KEY_KPASTERISK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPASTERISK	include/linux/input.h	/^#define KEY_KPASTERISK	/;"	d
KEY_KPCOMMA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPCOMMA	include/linux/input.h	/^#define KEY_KPCOMMA	/;"	d
KEY_KPDOT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPDOT	/;"	d
KEY_KPDOT	include/linux/input.h	/^#define KEY_KPDOT	/;"	d
KEY_KPENTER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPENTER	/;"	d
KEY_KPENTER	include/linux/input.h	/^#define KEY_KPENTER	/;"	d
KEY_KPEQUAL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPEQUAL	include/linux/input.h	/^#define KEY_KPEQUAL	/;"	d
KEY_KPJPCOMMA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPJPCOMMA	include/linux/input.h	/^#define KEY_KPJPCOMMA	/;"	d
KEY_KPLEFTPAREN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPLEFTPAREN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPLEFTPAREN	/;"	d
KEY_KPMINUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPMINUS	include/linux/input.h	/^#define KEY_KPMINUS	/;"	d
KEY_KPPLUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUS	include/linux/input.h	/^#define KEY_KPPLUS	/;"	d
KEY_KPPLUSMINUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPPLUSMINUS	include/linux/input.h	/^#define KEY_KPPLUSMINUS	/;"	d
KEY_KPRIGHTPAREN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPRIGHTPAREN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPRIGHTPAREN	/;"	d
KEY_KPSLASH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_KPSLASH	/;"	d
KEY_KPSLASH	include/linux/input.h	/^#define KEY_KPSLASH	/;"	d
KEY_L	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_L	/;"	d
KEY_L	include/linux/input.h	/^#define KEY_L	/;"	d
KEY_LANGUAGE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LANGUAGE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LANGUAGE	/;"	d
KEY_LAST	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LAST	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LAST	/;"	d
KEY_LEFT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFT	/;"	d
KEY_LEFT	include/linux/input.h	/^#define KEY_LEFT	/;"	d
KEY_LEFTALT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTALT	include/linux/input.h	/^#define KEY_LEFTALT	/;"	d
KEY_LEFTBRACE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTBRACE	include/linux/input.h	/^#define KEY_LEFTBRACE	/;"	d
KEY_LEFTCTRL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTCTRL	include/linux/input.h	/^#define KEY_LEFTCTRL	/;"	d
KEY_LEFTMETA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTMETA	include/linux/input.h	/^#define KEY_LEFTMETA	/;"	d
KEY_LEFTSHIFT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LEFTSHIFT	include/linux/input.h	/^#define KEY_LEFTSHIFT	/;"	d
KEY_LENGTH_MASK	drivers/crypto/fsl/desc.h	/^#define KEY_LENGTH_MASK	/;"	d
KEY_LIGHTS_TOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LIGHTS_TOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIGHTS_TOGGLE	/;"	d
KEY_LINEFEED	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LINEFEED	/;"	d
KEY_LINEFEED	include/linux/input.h	/^#define KEY_LINEFEED	/;"	d
KEY_LIST	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LIST	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LIST	/;"	d
KEY_LOGOFF	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_LOGOFF	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_LOGOFF	/;"	d
KEY_M	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_M	/;"	d
KEY_M	include/linux/input.h	/^#define KEY_M	/;"	d
KEY_MACRO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MACRO	/;"	d
KEY_MACRO	include/linux/input.h	/^#define KEY_MACRO	/;"	d
KEY_MAIL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MAIL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAIL	/;"	d
KEY_MASK	drivers/input/input.c	/^	KEY_MASK		= 0xfff,$/;"	e	enum:__anon5f1be7330103	file:
KEY_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MAX	/;"	d
KEY_MEDIA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA	/;"	d
KEY_MEDIA_REPEAT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEDIA_REPEAT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEDIA_REPEAT	/;"	d
KEY_MEMO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MEMO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MEMO	/;"	d
KEY_MENU	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MENU	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MENU	/;"	d
KEY_MESSENGER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MESSENGER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MESSENGER	/;"	d
KEY_MHP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MHP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MHP	/;"	d
KEY_MICMUTE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MICMUTE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MICMUTE	/;"	d
KEY_MINUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MINUS	/;"	d
KEY_MINUS	include/linux/input.h	/^#define KEY_MINUS	/;"	d
KEY_MIN_INTERESTING	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MIN_INTERESTING	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MIN_INTERESTING	/;"	d
KEY_MODE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MODE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MODE	/;"	d
KEY_MOVE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MOVE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MOVE	/;"	d
KEY_MP3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MP3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MP3	/;"	d
KEY_MSDOS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MSDOS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MSDOS	/;"	d
KEY_MUHENKAN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUHENKAN	include/linux/input.h	/^#define KEY_MUHENKAN	/;"	d
KEY_MUTE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_MUTE	/;"	d
KEY_MUTE	include/linux/input.h	/^#define KEY_MUTE	/;"	d
KEY_N	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_N	/;"	d
KEY_N	include/linux/input.h	/^#define KEY_N	/;"	d
KEY_NEW	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEW	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEW	/;"	d
KEY_NEWS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEWS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEWS	/;"	d
KEY_NEXT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXT	/;"	d
KEY_NEXTSONG	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NEXTSONG	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NEXTSONG	/;"	d
KEY_NONE	cmd/bootmenu.c	/^	KEY_NONE = 0,$/;"	e	enum:bootmenu_key	file:
KEY_NUMERIC_0	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_0	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_0	/;"	d
KEY_NUMERIC_1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_1	/;"	d
KEY_NUMERIC_2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_2	/;"	d
KEY_NUMERIC_3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_3	/;"	d
KEY_NUMERIC_4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_4	/;"	d
KEY_NUMERIC_5	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_5	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_5	/;"	d
KEY_NUMERIC_6	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_6	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_6	/;"	d
KEY_NUMERIC_7	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_7	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_7	/;"	d
KEY_NUMERIC_8	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_8	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_8	/;"	d
KEY_NUMERIC_9	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_9	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_9	/;"	d
KEY_NUMERIC_A	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_A	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_A	/;"	d
KEY_NUMERIC_B	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_B	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_B	/;"	d
KEY_NUMERIC_C	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_C	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_C	/;"	d
KEY_NUMERIC_D	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_D	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_D	/;"	d
KEY_NUMERIC_POUND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_POUND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_POUND	/;"	d
KEY_NUMERIC_STAR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMERIC_STAR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMERIC_STAR	/;"	d
KEY_NUMLOCK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NUMLOCK	include/linux/input.h	/^#define KEY_NUMLOCK	/;"	d
KEY_NWB	drivers/crypto/fsl/desc.h	/^#define KEY_NWB	/;"	d
KEY_O	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_O	/;"	d
KEY_O	include/linux/input.h	/^#define KEY_O	/;"	d
KEY_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define KEY_OFFSET	/;"	d
KEY_OK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OK	/;"	d
KEY_OPEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPEN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPEN	/;"	d
KEY_OPTION	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_OPTION	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_OPTION	/;"	d
KEY_P	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_P	/;"	d
KEY_P	include/linux/input.h	/^#define KEY_P	/;"	d
KEY_PAGEDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEDOWN	include/linux/input.h	/^#define KEY_PAGEDOWN	/;"	d
KEY_PAGEUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAGEUP	/;"	d
KEY_PAGEUP	include/linux/input.h	/^#define KEY_PAGEUP	/;"	d
KEY_PASTE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PASTE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PASTE	/;"	d
KEY_PAUSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSE	include/linux/input.h	/^#define KEY_PAUSE	/;"	d
KEY_PAUSECD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PAUSECD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PAUSECD	/;"	d
KEY_PC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PC	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PC	/;"	d
KEY_PHONE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PHONE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PHONE	/;"	d
KEY_PLAY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAY	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAY	/;"	d
KEY_PLAYCD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYCD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYCD	/;"	d
KEY_PLAYER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYER	/;"	d
KEY_PLAYPAUSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_PLAYPAUSE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PLAYPAUSE	/;"	d
KEY_POWER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER	/;"	d
KEY_POWER	include/linux/input.h	/^#define KEY_POWER	/;"	d
KEY_POWER2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_POWER2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_POWER2	/;"	d
KEY_PRESENTATION	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PRESENTATION	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRESENTATION	/;"	d
KEY_PREVIOUS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUS	/;"	d
KEY_PREVIOUSSONG	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PREVIOUSSONG	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PREVIOUSSONG	/;"	d
KEY_PRINT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PRINT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PRINT	/;"	d
KEY_PROG1	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG1	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG1	/;"	d
KEY_PROG2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG2	/;"	d
KEY_PROG3	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG3	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG3	/;"	d
KEY_PROG4	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROG4	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROG4	/;"	d
KEY_PROGRAM	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROGRAM	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROGRAM	/;"	d
KEY_PROPS	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PROPS	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PROPS	/;"	d
KEY_PVR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PVR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_PVR	/;"	d
KEY_PWR_INTERRUPT_MASK	include/configs/s5pc210_universal.h	/^#define KEY_PWR_INTERRUPT_MASK	/;"	d
KEY_PWR_INTERRUPT_MASK	include/configs/trats.h	/^#define KEY_PWR_INTERRUPT_MASK	/;"	d
KEY_PWR_INTERRUPT_MASK	include/configs/trats2.h	/^#define KEY_PWR_INTERRUPT_MASK	/;"	d
KEY_PWR_INTERRUPT_REG	include/configs/s5pc210_universal.h	/^#define KEY_PWR_INTERRUPT_REG	/;"	d
KEY_PWR_INTERRUPT_REG	include/configs/trats.h	/^#define KEY_PWR_INTERRUPT_REG	/;"	d
KEY_PWR_INTERRUPT_REG	include/configs/trats2.h	/^#define KEY_PWR_INTERRUPT_REG	/;"	d
KEY_PWR_PMIC_NAME	include/configs/s5pc210_universal.h	/^#define KEY_PWR_PMIC_NAME	/;"	d
KEY_PWR_PMIC_NAME	include/configs/trats.h	/^#define KEY_PWR_PMIC_NAME	/;"	d
KEY_PWR_PMIC_NAME	include/configs/trats2.h	/^#define KEY_PWR_PMIC_NAME	/;"	d
KEY_PWR_STATUS_MASK	include/configs/s5pc210_universal.h	/^#define KEY_PWR_STATUS_MASK	/;"	d
KEY_PWR_STATUS_MASK	include/configs/trats.h	/^#define KEY_PWR_STATUS_MASK	/;"	d
KEY_PWR_STATUS_MASK	include/configs/trats2.h	/^#define KEY_PWR_STATUS_MASK	/;"	d
KEY_PWR_STATUS_REG	include/configs/s5pc210_universal.h	/^#define KEY_PWR_STATUS_REG	/;"	d
KEY_PWR_STATUS_REG	include/configs/trats.h	/^#define KEY_PWR_STATUS_REG	/;"	d
KEY_PWR_STATUS_REG	include/configs/trats2.h	/^#define KEY_PWR_STATUS_REG	/;"	d
KEY_Q	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Q	/;"	d
KEY_Q	include/linux/input.h	/^#define KEY_Q	/;"	d
KEY_QUESTION	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_QUESTION	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_QUESTION	/;"	d
KEY_R	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_R	/;"	d
KEY_R	include/linux/input.h	/^#define KEY_R	/;"	d
KEY_RADIO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RADIO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RADIO	/;"	d
KEY_RECORD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RECORD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RECORD	/;"	d
KEY_RED	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_RED	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RED	/;"	d
KEY_REDO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REDO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REDO	/;"	d
KEY_REFRESH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_REFRESH	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REFRESH	/;"	d
KEY_RELEASE	drivers/input/input.c	/^	KEY_RELEASE		= 1 << 15,$/;"	e	enum:__anon5f1be7330103	file:
KEY_REPLY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_REPLY	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REPLY	/;"	d
KEY_RESERVED	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESERVED	/;"	d
KEY_RESERVED	include/linux/input.h	/^#define KEY_RESERVED	/;"	d
KEY_RESTART	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_RESTART	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RESTART	/;"	d
KEY_REWIND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_REWIND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_REWIND	/;"	d
KEY_RFKILL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RFKILL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RFKILL	/;"	d
KEY_RIGHT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHT	include/linux/input.h	/^#define KEY_RIGHT	/;"	d
KEY_RIGHTALT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTALT	include/linux/input.h	/^#define KEY_RIGHTALT	/;"	d
KEY_RIGHTBRACE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTBRACE	include/linux/input.h	/^#define KEY_RIGHTBRACE	/;"	d
KEY_RIGHTCTRL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTCTRL	include/linux/input.h	/^#define KEY_RIGHTCTRL	/;"	d
KEY_RIGHTMETA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTMETA	include/linux/input.h	/^#define KEY_RIGHTMETA	/;"	d
KEY_RIGHTSHIFT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RIGHTSHIFT	include/linux/input.h	/^#define KEY_RIGHTSHIFT	/;"	d
KEY_RO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_RO	/;"	d
KEY_RO	include/linux/input.h	/^#define KEY_RO	/;"	d
KEY_ROTATE_DISPLAY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_ROTATE_DISPLAY	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ROTATE_DISPLAY	/;"	d
KEY_S	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_S	/;"	d
KEY_S	include/linux/input.h	/^#define KEY_S	/;"	d
KEY_SAT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT	/;"	d
KEY_SAT2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAT2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAT2	/;"	d
KEY_SAVE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SAVE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SAVE	/;"	d
KEY_SCALE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCALE	/;"	d
KEY_SCALE	include/linux/input.h	/^#define KEY_SCALE	/;"	d
KEY_SCREEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREEN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREEN	/;"	d
KEY_SCREENLOCK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENLOCK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENLOCK	/;"	d
KEY_SCREENSAVER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCREENSAVER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCREENSAVER	/;"	d
KEY_SCROLLDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLDOWN	/;"	d
KEY_SCROLLLOCK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLLOCK	include/linux/input.h	/^#define KEY_SCROLLLOCK	/;"	d
KEY_SCROLLUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SCROLLUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SCROLLUP	/;"	d
KEY_SEARCH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SEARCH	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEARCH	/;"	d
KEY_SELECT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SELECT	cmd/bootmenu.c	/^	KEY_SELECT,$/;"	e	enum:bootmenu_key	file:
KEY_SELECT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SELECT	/;"	d
KEY_SEMICOLON	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEMICOLON	include/linux/input.h	/^#define KEY_SEMICOLON	/;"	d
KEY_SEND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SEND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SEND	/;"	d
KEY_SENDFILE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SENDFILE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SENDFILE	/;"	d
KEY_SETUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SETUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SETUP	/;"	d
KEY_SGF	drivers/crypto/fsl/desc.h	/^#define KEY_SGF	/;"	d
KEY_SHOP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHOP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHOP	/;"	d
KEY_SHUFFLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SHUFFLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SHUFFLE	/;"	d
KEY_SIZE	fs/reiserfs/reiserfs_private.h	/^#define KEY_SIZE /;"	d
KEY_SIZE	include/fsl_validate.h	/^#define KEY_SIZE /;"	d
KEY_SIZE_BYTES	include/fsl_validate.h	/^#define KEY_SIZE_BYTES /;"	d
KEY_SIZE_WORDS	include/fsl_validate.h	/^#define KEY_SIZE_WORDS /;"	d
KEY_SLASH	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLASH	/;"	d
KEY_SLASH	include/linux/input.h	/^#define KEY_SLASH	/;"	d
KEY_SLEEP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLEEP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLEEP	/;"	d
KEY_SLOW	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SLOW	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SLOW	/;"	d
KEY_SOUND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SOUND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SOUND	/;"	d
KEY_SPACE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPACE	/;"	d
KEY_SPACE	include/linux/input.h	/^#define KEY_SPACE	/;"	d
KEY_SPELLCHECK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPELLCHECK	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPELLCHECK	/;"	d
KEY_SPORT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPORT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPORT	/;"	d
KEY_SPREADSHEET	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_SPREADSHEET	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SPREADSHEET	/;"	d
KEY_STOP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOP	/;"	d
KEY_STOPCD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_STOPCD	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_STOPCD	/;"	d
KEY_SUBTITLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUBTITLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUBTITLE	/;"	d
KEY_SUSPEND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SUSPEND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SUSPEND	/;"	d
KEY_SWITCHVIDEOMODE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SWITCHVIDEOMODE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SWITCHVIDEOMODE	/;"	d
KEY_SYSRQ	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_SYSRQ	/;"	d
KEY_SYSRQ	include/linux/input.h	/^#define KEY_SYSRQ	/;"	d
KEY_T	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_T	/;"	d
KEY_T	include/linux/input.h	/^#define KEY_T	/;"	d
KEY_TAB	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAB	/;"	d
KEY_TAB	include/linux/input.h	/^#define KEY_TAB	/;"	d
KEY_TAPE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TAPE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TAPE	/;"	d
KEY_TASKMANAGER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TASKMANAGER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TASKMANAGER	/;"	d
KEY_TEEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEEN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEEN	/;"	d
KEY_TEXT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TEXT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TEXT	/;"	d
KEY_TIME	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TIME	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TIME	/;"	d
KEY_TITLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TITLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TITLE	/;"	d
KEY_TK	drivers/crypto/fsl/desc.h	/^#define KEY_TK	/;"	d
KEY_TOUCHPAD_OFF	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_OFF	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_OFF	/;"	d
KEY_TOUCHPAD_ON	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_ON	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_ON	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TOUCHPAD_TOGGLE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TOUCHPAD_TOGGLE	/;"	d
KEY_TUNER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TUNER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TUNER	/;"	d
KEY_TV	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV	/;"	d
KEY_TV2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TV2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TV2	/;"	d
KEY_TWEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_TWEN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_TWEN	/;"	d
KEY_U	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_U	/;"	d
KEY_U	include/linux/input.h	/^#define KEY_U	/;"	d
KEY_UNDO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNDO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNDO	/;"	d
KEY_UNKNOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UNKNOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UNKNOWN	/;"	d
KEY_UP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	cmd/bootmenu.c	/^	KEY_UP,$/;"	e	enum:bootmenu_key	file:
KEY_UP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UP	/;"	d
KEY_UP	include/linux/input.h	/^#define KEY_UP	/;"	d
KEY_UWB	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_UWB	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_UWB	/;"	d
KEY_V	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_V	/;"	d
KEY_V	include/linux/input.h	/^#define KEY_V	/;"	d
KEY_VCR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR	/;"	d
KEY_VCR2	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VCR2	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VCR2	/;"	d
KEY_VENDOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VENDOR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VENDOR	/;"	d
KEY_VIDEO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEO	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO	/;"	d
KEY_VIDEOPHONE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEOPHONE	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEOPHONE	/;"	d
KEY_VIDEO_NEXT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_NEXT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_NEXT	/;"	d
KEY_VIDEO_PREV	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VIDEO_PREV	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VIDEO_PREV	/;"	d
KEY_VLF	drivers/crypto/fsl/desc.h	/^#define KEY_VLF	/;"	d
KEY_VOICECOMMAND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICECOMMAND	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICECOMMAND	/;"	d
KEY_VOICEMAIL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOICEMAIL	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOICEMAIL	/;"	d
KEY_VOLUMEDOWN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEDOWN	include/linux/input.h	/^#define KEY_VOLUMEDOWN	/;"	d
KEY_VOLUMEUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOLUMEUP	include/linux/input.h	/^#define KEY_VOLUMEUP	/;"	d
KEY_VOL_DOWN_GPIO	include/configs/s5pc210_universal.h	/^#define KEY_VOL_DOWN_GPIO	/;"	d
KEY_VOL_DOWN_GPIO	include/configs/trats.h	/^#define KEY_VOL_DOWN_GPIO	/;"	d
KEY_VOL_DOWN_GPIO	include/configs/trats2.h	/^#define KEY_VOL_DOWN_GPIO	/;"	d
KEY_VOL_UP	board/freescale/mx6sabresd/mx6sabresd.c	/^#define KEY_VOL_UP	/;"	d	file:
KEY_VOL_UP_GPIO	include/configs/s5pc210_universal.h	/^#define KEY_VOL_UP_GPIO	/;"	d
KEY_VOL_UP_GPIO	include/configs/trats.h	/^#define KEY_VOL_UP_GPIO	/;"	d
KEY_VOL_UP_GPIO	include/configs/trats2.h	/^#define KEY_VOL_UP_GPIO	/;"	d
KEY_W	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_W	/;"	d
KEY_W	include/linux/input.h	/^#define KEY_W	/;"	d
KEY_WAKEUP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WAKEUP	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WAKEUP	/;"	d
KEY_WIMAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WIMAX	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WIMAX	/;"	d
KEY_WLAN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WLAN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WLAN	/;"	d
KEY_WORDPROCESSOR	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WORDPROCESSOR	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WORDPROCESSOR	/;"	d
KEY_WPS_BUTTON	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WPS_BUTTON	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WPS_BUTTON	/;"	d
KEY_WWAN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWAN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWAN	/;"	d
KEY_WWW	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_WWW	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_WWW	/;"	d
KEY_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_X	/;"	d
KEY_X	include/linux/input.h	/^#define KEY_X	/;"	d
KEY_XFER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_XFER	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_XFER	/;"	d
KEY_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Y	/;"	d
KEY_Y	include/linux/input.h	/^#define KEY_Y	/;"	d
KEY_YELLOW	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YELLOW	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YELLOW	/;"	d
KEY_YEN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_YEN	/;"	d
KEY_YEN	include/linux/input.h	/^#define KEY_YEN	/;"	d
KEY_Z	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_Z	/;"	d
KEY_Z	include/linux/input.h	/^#define KEY_Z	/;"	d
KEY_ZENKAKUHANKAKU	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZENKAKUHANKAKU	include/linux/input.h	/^#define KEY_ZENKAKUHANKAKU	/;"	d
KEY_ZOOM	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOM	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOM	/;"	d
KEY_ZOOMIN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMIN	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMIN	/;"	d
KEY_ZOOMOUT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMOUT	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMOUT	/;"	d
KEY_ZOOMRESET	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KEY_ZOOMRESET	include/dt-bindings/input/linux-event-codes.h	/^#define KEY_ZOOMRESET	/;"	d
KGDBDATA_MAXPRIV	include/kgdb.h	/^#define KGDBDATA_MAXPRIV	/;"	d
KGDBDATA_MAXREGS	include/kgdb.h	/^#define KGDBDATA_MAXREGS	/;"	d
KGDBERR_ALIGNFAULT	include/kgdb.h	/^#define KGDBERR_ALIGNFAULT	/;"	d
KGDBERR_BADPARAMS	include/kgdb.h	/^#define KGDBERR_BADPARAMS	/;"	d
KGDBERR_MEMFAULT	include/kgdb.h	/^#define KGDBERR_MEMFAULT	/;"	d
KGDBERR_NOSPACE	include/kgdb.h	/^#define KGDBERR_NOSPACE	/;"	d
KGDBERR_NOTHEXDIG	include/kgdb.h	/^#define KGDBERR_NOTHEXDIG	/;"	d
KGDBEXIT_CONTINUE	include/kgdb.h	/^#define KGDBEXIT_CONTINUE	/;"	d
KGDBEXIT_KILL	include/kgdb.h	/^#define KGDBEXIT_KILL	/;"	d
KGDBEXIT_SINGLE	include/kgdb.h	/^#define KGDBEXIT_SINGLE	/;"	d
KGDBEXIT_TYPEMASK	include/kgdb.h	/^#define KGDBEXIT_TYPEMASK	/;"	d
KGDBEXIT_WITHADDR	include/kgdb.h	/^#define KGDBEXIT_WITHADDR	/;"	d
KGDB_CMXSCR_MASK	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define KGDB_CMXSCR_MASK	/;"	d	file:
KGDB_CMXSCR_VALUE	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define KGDB_CMXSCR_VALUE	/;"	d	file:
KGDB_CMXSMR_MASK	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_CMXSMR_MASK	/;"	d	file:
KGDB_CMXSMR_VALUE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_CMXSMR_VALUE	/;"	d	file:
KGDB_CPM_CR_SCC_PAGE	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define KGDB_CPM_CR_SCC_PAGE	/;"	d	file:
KGDB_CPM_CR_SCC_SBLOCK	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define KGDB_CPM_CR_SCC_SBLOCK	/;"	d	file:
KGDB_CPM_CR_SMC_PAGE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_CPM_CR_SMC_PAGE	/;"	d	file:
KGDB_CPM_CR_SMC_SBLOCK	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_CPM_CR_SMC_SBLOCK	/;"	d	file:
KGDB_MAX_NO_CPUS	arch/blackfin/lib/kgdb.h	/^#define KGDB_MAX_NO_CPUS /;"	d
KGDB_PROFF_SCC	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define KGDB_PROFF_SCC	/;"	d	file:
KGDB_PROFF_SMC	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_PROFF_SMC	/;"	d	file:
KGDB_PROFF_SMC_BASE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_PROFF_SMC_BASE	/;"	d	file:
KGDB_SCC_INDEX	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define KGDB_SCC_INDEX	/;"	d	file:
KGDB_SMC_INDEX	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define KGDB_SMC_INDEX	/;"	d	file:
KHZ2PICOS	include/linux/fb.h	/^#define KHZ2PICOS(/;"	d
KHz	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define KHz	/;"	d
KILLER_PATTERN_DQ_NUMBER	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define KILLER_PATTERN_DQ_NUMBER	/;"	d
KILLER_PATTERN_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define KILLER_PATTERN_LENGTH	/;"	d
KIRKWOOD	arch/arm/Kconfig	/^config KIRKWOOD$/;"	c	choice:ARM architecture""choice031ab9020104
KM_FLASH_ERASE_ENABLE	board/keymile/km_arm/km_arm.c	/^#define KM_FLASH_ERASE_ENABLE	/;"	d	file:
KM_FLASH_GPIO_PIN	include/configs/km/km_arm.h	/^#define KM_FLASH_GPIO_PIN	/;"	d
KM_KIRKWOOD_ENV_WP	include/configs/km/km_arm.h	/^#define KM_KIRKWOOD_ENV_WP	/;"	d
KM_KIRKWOOD_SCL_PIN	include/configs/km/km_arm.h	/^#define KM_KIRKWOOD_SCL_PIN	/;"	d
KM_KIRKWOOD_SDA_PIN	include/configs/km/km_arm.h	/^#define KM_KIRKWOOD_SDA_PIN	/;"	d
KM_KIRKWOOD_SOFT_I2C_GPIOS	include/configs/km/km_arm.h	/^#define KM_KIRKWOOD_SOFT_I2C_GPIOS	/;"	d
KM_PCIE_RESET_MPP7	include/configs/km_kirkwood.h	/^#define KM_PCIE_RESET_MPP7$/;"	d
KM_PEX_RST_GPIO_PIN	board/keymile/km_arm/fpga_config.c	/^#define KM_PEX_RST_GPIO_PIN	/;"	d	file:
KM_POST_EN_L	board/keymile/km_arm/km_arm.c	/^#define KM_POST_EN_L	/;"	d	file:
KM_XLX_PROGRAM_B_PIN	board/keymile/km_arm/fpga_config.c	/^#define KM_XLX_PROGRAM_B_PIN /;"	d	file:
KONA_MST_CLK_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define KONA_MST_CLK_BASE_ADDR	/;"	d
KONA_MST_CLK_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define KONA_MST_CLK_BASE_ADDR	/;"	d
KONA_SLV_CLK_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define KONA_SLV_CLK_BASE_ADDR	/;"	d
KONA_SLV_CLK_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define KONA_SLV_CLK_BASE_ADDR	/;"	d
KPADWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define KPADWE	/;"	d
KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define KPAD_CTL /;"	d
KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define KPAD_CTL /;"	d
KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define KPAD_CTL /;"	d
KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define KPAD_CTL /;"	d
KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define KPAD_MSEL /;"	d
KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define KPAD_MSEL /;"	d
KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define KPAD_MSEL /;"	d
KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define KPAD_MSEL /;"	d
KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define KPAD_PRESCALE /;"	d
KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define KPAD_PRESCALE /;"	d
KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define KPAD_PRESCALE /;"	d
KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define KPAD_PRESCALE /;"	d
KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define KPAD_ROWCOL /;"	d
KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define KPAD_ROWCOL /;"	d
KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define KPAD_ROWCOL /;"	d
KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define KPAD_ROWCOL /;"	d
KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define KPAD_SOFTEVAL /;"	d
KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define KPAD_SOFTEVAL /;"	d
KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define KPAD_SOFTEVAL /;"	d
KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define KPAD_SOFTEVAL /;"	d
KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define KPAD_STAT /;"	d
KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define KPAD_STAT /;"	d
KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define KPAD_STAT /;"	d
KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define KPAD_STAT /;"	d
KPAS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPAS	/;"	d
KPASMKP0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPASMKP0	/;"	d
KPASMKP1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPASMKP1	/;"	d
KPASMKP2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPASMKP2	/;"	d
KPASMKP3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPASMKP3	/;"	d
KPASMKPx_SO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPASMKPx_SO	/;"	d
KPAS_SO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPAS_SO	/;"	d
KPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC	/;"	d
KPC_AS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_AS	/;"	d
KPC_ASACT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_ASACT	/;"	d
KPC_DE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_DE	/;"	d
KPC_DEE0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_DEE0	/;"	d
KPC_DI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_DI	/;"	d
KPC_DIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_DIE	/;"	d
KPC_DK_DEB_SEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_DK_DEB_SEL	/;"	d
KPC_IMKP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_IMKP	/;"	d
KPC_ME	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_ME	/;"	d
KPC_MI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MI	/;"	d
KPC_MIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MIE	/;"	d
KPC_MS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS0	/;"	d
KPC_MS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS1	/;"	d
KPC_MS2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS2	/;"	d
KPC_MS3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS3	/;"	d
KPC_MS4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS4	/;"	d
KPC_MS5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS5	/;"	d
KPC_MS6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS6	/;"	d
KPC_MS7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPC_MS7	/;"	d
KPDK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK	/;"	d
KPDK_DK0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK0	/;"	d
KPDK_DK1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK1	/;"	d
KPDK_DK2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK2	/;"	d
KPDK_DK3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK3	/;"	d
KPDK_DK4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK4	/;"	d
KPDK_DK5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK5	/;"	d
KPDK_DK6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK6	/;"	d
KPDK_DK7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DK7	/;"	d
KPDK_DKP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPDK_DKP	/;"	d
KPDPWR_ON_INT_BIT	drivers/gpio/pm8916_gpio.c	/^#define KPDPWR_ON_INT_BIT /;"	d	file:
KPKDI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPKDI	/;"	d
KPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define KPLL_CON1_VAL	/;"	d
KPLL_FOUT	arch/arm/mach-exynos/exynos5_setup.h	/^#define KPLL_FOUT	/;"	d
KPMK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPMK	/;"	d
KPMK_MKP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPMK_MKP	/;"	d
KPN_ALE	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_ALE	/;"	d	file:
KPN_CE1N	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_CE1N	/;"	d	file:
KPN_CE2N	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_CE2N	/;"	d	file:
KPN_CLE	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_CLE	/;"	d	file:
KPN_DEFAULT_CHIP_DELAY	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_DEFAULT_CHIP_DELAY /;"	d	file:
KPN_RDY1	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_RDY1	/;"	d	file:
KPN_RDY2	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_RDY2	/;"	d	file:
KPN_WPN	drivers/mtd/nand/kmeter1_nand.c	/^#define KPN_WPN	/;"	d	file:
KPP_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define KPP_BASE_ADDR	/;"	d
KPP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define KPP_BASE_ADDR /;"	d
KPP_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define KPP_IPS_BASE_ADDR /;"	d
KPREC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPREC	/;"	d
KPREC_OF0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPREC_OF0	/;"	d
KPREC_OF1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPREC_OF1	/;"	d
KPREC_UF0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define KPREC_UF0	/;"	d
KP_COL6_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define KP_COL6_CTL	/;"	d
KP_ROW6_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define KP_ROW6_CTL	/;"	d
KP_ROW7_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define KP_ROW7_CTL	/;"	d
KS2_AEMIF_CNTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_AEMIF_CNTRL_BASE /;"	d
KS2_ARMPLLCTL0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_ARMPLLCTL0	/;"	d
KS2_ARMPLLCTL1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_ARMPLLCTL1	/;"	d
KS2_ARM_PLL_EN	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_ARM_PLL_EN	/;"	d
KS2_ARM_PLL_EN	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_ARM_PLL_EN	/;"	d
KS2_CIC2_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC2_BASE	/;"	d
KS2_CIC2_DDR3_ECC_CHAN_NUM	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_CIC2_DDR3_ECC_CHAN_NUM	/;"	d
KS2_CIC2_DDR3_ECC_CHAN_NUM	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_CIC2_DDR3_ECC_CHAN_NUM	/;"	d
KS2_CIC2_DDR3_ECC_CHAN_NUM	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_CIC2_DDR3_ECC_CHAN_NUM	/;"	d
KS2_CIC2_DDR3_ECC_IRQ_NUM	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_CIC2_DDR3_ECC_IRQ_NUM	/;"	d
KS2_CIC2_DDR3_ECC_IRQ_NUM	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_CIC2_DDR3_ECC_IRQ_NUM	/;"	d
KS2_CIC2_DDR3_ECC_IRQ_NUM	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_CIC2_DDR3_ECC_IRQ_NUM	/;"	d
KS2_CIC_CHAN_MAP	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC_CHAN_MAP(/;"	d
KS2_CIC_CTRL	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC_CTRL	/;"	d
KS2_CIC_GLOBAL_ENABLE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC_GLOBAL_ENABLE	/;"	d
KS2_CIC_HOST_CTRL	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC_HOST_CTRL	/;"	d
KS2_CIC_HOST_ENABLE_IDX_SET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC_HOST_ENABLE_IDX_SET	/;"	d
KS2_CIC_SYS_ENABLE_IDX_SET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CIC_SYS_ENABLE_IDX_SET	/;"	d
KS2_CLK1_6	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define KS2_CLK1_6	/;"	d
KS2_CLK1_6	arch/arm/mach-keystone/include/mach/clock-k2g.h	/^#define KS2_CLK1_6 /;"	d
KS2_CLK1_6	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define KS2_CLK1_6 /;"	d
KS2_CLK1_6	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define KS2_CLK1_6	/;"	d
KS2_CLOCK_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_CLOCK_BASE	/;"	d
KS2_DDR3APLLCTL0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3APLLCTL0	/;"	d
KS2_DDR3APLLCTL1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3APLLCTL1	/;"	d
KS2_DDR3A_DDRPHYC	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3A_DDRPHYC	/;"	d
KS2_DDR3A_EMIF_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3A_EMIF_CTRL_BASE	/;"	d
KS2_DDR3A_EMIF_DATA_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3A_EMIF_DATA_BASE	/;"	d
KS2_DDR3BPLLCTL0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3BPLLCTL0	/;"	d
KS2_DDR3BPLLCTL1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3BPLLCTL1	/;"	d
KS2_DDR3B_DDRPHYC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_DDR3B_DDRPHYC	/;"	d
KS2_DDR3B_EMIF_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_DDR3B_EMIF_CTRL_BASE	/;"	d
KS2_DDR3B_EMIF_DATA_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_DDR3B_EMIF_DATA_BASE	/;"	d
KS2_DDR3_1B_ECC_ERR_SYS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_1B_ECC_ERR_SYS	/;"	d
KS2_DDR3_2B_ECC_ERR_SYS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_2B_ECC_ERR_SYS	/;"	d
KS2_DDR3_ECC_ADDR_RANGE1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_ADDR_RANGE1_OFFSET	/;"	d
KS2_DDR3_ECC_ADDR_RNG_1_EN	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_ADDR_RNG_1_EN	/;"	d
KS2_DDR3_ECC_ADDR_RNG_PROT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_ADDR_RNG_PROT	/;"	d
KS2_DDR3_ECC_CTRL_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_CTRL_OFFSET	/;"	d
KS2_DDR3_ECC_EN	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_EN	/;"	d
KS2_DDR3_ECC_ENABLE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_ENABLE	/;"	d
KS2_DDR3_ECC_INT_ENABLE_SET_SYS_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_INT_ENABLE_SET_SYS_OFFSET	/;"	d
KS2_DDR3_ECC_INT_STATUS_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_INT_STATUS_OFFSET	/;"	d
KS2_DDR3_ECC_RMW_EN	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_RMW_EN	/;"	d
KS2_DDR3_ECC_VERIFY_EN	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ECC_VERIFY_EN	/;"	d
KS2_DDR3_MIDR_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_MIDR_OFFSET /;"	d
KS2_DDR3_ONE_BIT_ECC_ERR_ADDR_LOG_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ONE_BIT_ECC_ERR_ADDR_LOG_OFFSET	/;"	d
KS2_DDR3_ONE_BIT_ECC_ERR_CNT_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ONE_BIT_ECC_ERR_CNT_OFFSET	/;"	d
KS2_DDR3_PLLCTRL_PHY_RESET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_PLLCTRL_PHY_RESET	/;"	d
KS2_DDR3_PMCTL_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_PMCTL_OFFSET /;"	d
KS2_DDR3_SDCFG_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_SDCFG_OFFSET /;"	d
KS2_DDR3_SDRFC_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_SDRFC_OFFSET /;"	d
KS2_DDR3_SDTIM1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_SDTIM1_OFFSET /;"	d
KS2_DDR3_SDTIM2_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_SDTIM2_OFFSET /;"	d
KS2_DDR3_SDTIM3_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_SDTIM3_OFFSET /;"	d
KS2_DDR3_SDTIM4_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_SDTIM4_OFFSET /;"	d
KS2_DDR3_STATUS_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_STATUS_OFFSET /;"	d
KS2_DDR3_WR_ECC_ERR_SYS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_WR_ECC_ERR_SYS	/;"	d
KS2_DDR3_ZQCFG_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDR3_ZQCFG_OFFSET /;"	d
KS2_DDRPHY_DATX8_4_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DATX8_4_OFFSET /;"	d
KS2_DDRPHY_DATX8_5_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DATX8_5_OFFSET /;"	d
KS2_DDRPHY_DATX8_6_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DATX8_6_OFFSET /;"	d
KS2_DDRPHY_DATX8_7_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DATX8_7_OFFSET /;"	d
KS2_DDRPHY_DATX8_8_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DATX8_8_OFFSET /;"	d
KS2_DDRPHY_DCR_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DCR_OFFSET /;"	d
KS2_DDRPHY_DTCR_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DTCR_OFFSET /;"	d
KS2_DDRPHY_DTPR0_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DTPR0_OFFSET /;"	d
KS2_DDRPHY_DTPR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DTPR1_OFFSET /;"	d
KS2_DDRPHY_DTPR2_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_DTPR2_OFFSET /;"	d
KS2_DDRPHY_MR0_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_MR0_OFFSET /;"	d
KS2_DDRPHY_MR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_MR1_OFFSET /;"	d
KS2_DDRPHY_MR2_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_MR2_OFFSET /;"	d
KS2_DDRPHY_PGCR0_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PGCR0_OFFSET /;"	d
KS2_DDRPHY_PGCR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PGCR1_OFFSET /;"	d
KS2_DDRPHY_PGCR2_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PGCR2_OFFSET /;"	d
KS2_DDRPHY_PGSR0_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PGSR0_OFFSET /;"	d
KS2_DDRPHY_PGSR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PGSR1_OFFSET /;"	d
KS2_DDRPHY_PIR_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PIR_OFFSET /;"	d
KS2_DDRPHY_PLLCR_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PLLCR_OFFSET /;"	d
KS2_DDRPHY_PTR0_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PTR0_OFFSET /;"	d
KS2_DDRPHY_PTR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PTR1_OFFSET /;"	d
KS2_DDRPHY_PTR2_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PTR2_OFFSET /;"	d
KS2_DDRPHY_PTR3_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PTR3_OFFSET /;"	d
KS2_DDRPHY_PTR4_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_PTR4_OFFSET /;"	d
KS2_DDRPHY_ZQ0CR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_ZQ0CR1_OFFSET /;"	d
KS2_DDRPHY_ZQ1CR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_ZQ1CR1_OFFSET /;"	d
KS2_DDRPHY_ZQ2CR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_ZQ2CR1_OFFSET /;"	d
KS2_DDRPHY_ZQ3CR1_OFFSET	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DDRPHY_ZQ3CR1_OFFSET /;"	d
KS2_DEVCFG	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DEVCFG	/;"	d
KS2_DEVICE_STATE_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DEVICE_STATE_CTRL_BASE	/;"	d
KS2_DEVSTAT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DEVSTAT	/;"	d
KS2_DEV_USB_PHY_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_DEV_USB_PHY_BASE	/;"	d
KS2_EDMA0_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA0_BASE	/;"	d
KS2_EDMA_ICR	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA_ICR	/;"	d
KS2_EDMA_IPR	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA_IPR	/;"	d
KS2_EDMA_PARAM_1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA_PARAM_1(/;"	d
KS2_EDMA_QCHMAP0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA_QCHMAP0	/;"	d
KS2_EDMA_QEECR	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA_QEECR	/;"	d
KS2_EDMA_QEESR	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EDMA_QEESR	/;"	d
KS2_EFUSE_BOOTROM	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_EFUSE_BOOTROM	/;"	d
KS2_ETHERNET_CFG	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_ETHERNET_CFG	/;"	d
KS2_ETHERNET_RGMII	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_ETHERNET_RGMII	/;"	d
KS2_GEM_0_PWR_DOMAIN	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_GEM_0_PWR_DOMAIN	/;"	d
KS2_JTAG_ID_REG	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_JTAG_ID_REG	/;"	d
KS2_KICK0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_KICK0	/;"	d
KS2_KICK0_MAGIC	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_KICK0_MAGIC	/;"	d
KS2_KICK1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_KICK1	/;"	d
KS2_KICK1_MAGIC	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_KICK1_MAGIC	/;"	d
KS2_LANES_PER_SGMII_SERDES	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LANES_PER_SGMII_SERDES	/;"	d
KS2_LANES_PER_SGMII_SERDES	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LANES_PER_SGMII_SERDES	/;"	d
KS2_LANES_PER_SGMII_SERDES	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LANES_PER_SGMII_SERDES	/;"	d
KS2_LANES_PER_SGMII_SERDES	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LANES_PER_SGMII_SERDES	/;"	d
KS2_LPSC_AI2	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_AI2	/;"	d
KS2_LPSC_ALWAYSON	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_ALWAYSON	/;"	d
KS2_LPSC_ARM	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_ARM	/;"	d
KS2_LPSC_ARM_SREFLEX	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_ARM_SREFLEX	/;"	d
KS2_LPSC_ASRC	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_ASRC	/;"	d
KS2_LPSC_BCP	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_BCP	/;"	d
KS2_LPSC_BCP	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_BCP	/;"	d
KS2_LPSC_CHIP_SRSS	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_CHIP_SRSS	/;"	d
KS2_LPSC_CHIP_SRSS	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_CHIP_SRSS	/;"	d
KS2_LPSC_CHIP_SRSS	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_CHIP_SRSS	/;"	d
KS2_LPSC_CP2X4_B	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_CP2X4_B	/;"	d
KS2_LPSC_CPGMAC	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_CPGMAC	/;"	d
KS2_LPSC_CPGMAC	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_CPGMAC	/;"	d
KS2_LPSC_CPGMAC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_CPGMAC	/;"	d
KS2_LPSC_CPGMAC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_CPGMAC	/;"	d
KS2_LPSC_CRYPTO	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_CRYPTO	/;"	d
KS2_LPSC_CRYPTO	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_CRYPTO	/;"	d
KS2_LPSC_CRYPTO	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_CRYPTO	/;"	d
KS2_LPSC_CRYPTO	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_CRYPTO	/;"	d
KS2_LPSC_DDR3	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_DDR3	/;"	d
KS2_LPSC_DDUC4X_CFR2X_BB	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_DDUC4X_CFR2X_BB	/;"	d
KS2_LPSC_DEBUG	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_DEBUG	/;"	d
KS2_LPSC_DEBUGSS_TRC	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_DEBUGSS_TRC	/;"	d
KS2_LPSC_DEBUGSS_TRC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_DEBUGSS_TRC	/;"	d
KS2_LPSC_DEBUGSS_TRC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_DEBUGSS_TRC	/;"	d
KS2_LPSC_DFE_IQN_SYS	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_DFE_IQN_SYS	/;"	d
KS2_LPSC_DPD4X	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_DPD4X	/;"	d
KS2_LPSC_DSS	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_DSS	/;"	d
KS2_LPSC_DUMMY1	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_DUMMY1	/;"	d
KS2_LPSC_DXB	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_DXB	/;"	d
KS2_LPSC_ECAP	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_ECAP	/;"	d
KS2_LPSC_EHRPWM	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_EHRPWM	/;"	d
KS2_LPSC_EMIF25_SPI	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_EMIF25_SPI	/;"	d
KS2_LPSC_EMIF25_SPI	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_EMIF25_SPI	/;"	d
KS2_LPSC_EMIF25_SPI	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_EMIF25_SPI	/;"	d
KS2_LPSC_EMIF4F_DDR3	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_EMIF4F_DDR3	/;"	d
KS2_LPSC_EMIF4F_DDR3	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_EMIF4F_DDR3	/;"	d
KS2_LPSC_EMIF4F_DDR3A	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_EMIF4F_DDR3A	/;"	d
KS2_LPSC_EMIF4F_DDR3B	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_EMIF4F_DDR3B	/;"	d
KS2_LPSC_EQEP	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_EQEP	/;"	d
KS2_LPSC_FFTC_A	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_FFTC_A	/;"	d
KS2_LPSC_FFTC_A	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_FFTC_A	/;"	d
KS2_LPSC_FFTC_B	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_FFTC_B	/;"	d
KS2_LPSC_FFTC_B	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_FFTC_B	/;"	d
KS2_LPSC_FFTC_C	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_FFTC_C	/;"	d
KS2_LPSC_FFTC_D	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_FFTC_D	/;"	d
KS2_LPSC_FFTC_E	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_FFTC_E	/;"	d
KS2_LPSC_FFTC_F	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_FFTC_F	/;"	d
KS2_LPSC_GEM_0	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_GEM_0	/;"	d
KS2_LPSC_GEM_0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_LPSC_GEM_0	/;"	d
KS2_LPSC_GEM_1	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_1	/;"	d
KS2_LPSC_GEM_1	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_GEM_1	/;"	d
KS2_LPSC_GEM_2	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_2	/;"	d
KS2_LPSC_GEM_2	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_GEM_2	/;"	d
KS2_LPSC_GEM_3	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_3	/;"	d
KS2_LPSC_GEM_3	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_GEM_3	/;"	d
KS2_LPSC_GEM_4	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_4	/;"	d
KS2_LPSC_GEM_5	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_5	/;"	d
KS2_LPSC_GEM_6	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_6	/;"	d
KS2_LPSC_GEM_7	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_GEM_7	/;"	d
KS2_LPSC_GPMC	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_GPMC	/;"	d
KS2_LPSC_ICSS	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_ICSS	/;"	d
KS2_LPSC_IQN_AIL	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_IQN_AIL	/;"	d
KS2_LPSC_JESD_MISC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_JESD_MISC	/;"	d
KS2_LPSC_MCASP	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_MCASP	/;"	d
KS2_LPSC_MLB	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_MLB	/;"	d
KS2_LPSC_MMC	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_MMC	/;"	d
KS2_LPSC_MOD	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_MOD	/;"	d
KS2_LPSC_MOD	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_MOD	/;"	d
KS2_LPSC_MOD_RST	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_MOD_RST	/;"	d
KS2_LPSC_MSMC	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_MSMC	/;"	d
KS2_LPSC_MSMC	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_MSMC	/;"	d
KS2_LPSC_MSMC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_MSMC	/;"	d
KS2_LPSC_MSMC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_MSMC	/;"	d
KS2_LPSC_NSS	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_NSS	/;"	d
KS2_LPSC_OSR	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_OSR	/;"	d
KS2_LPSC_PA	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_PA	/;"	d
KS2_LPSC_PA	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_PA	/;"	d
KS2_LPSC_PA	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_PA	/;"	d
KS2_LPSC_PCIE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_PCIE	/;"	d
KS2_LPSC_PCIE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_PCIE	/;"	d
KS2_LPSC_PCIE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_PCIE	/;"	d
KS2_LPSC_PCIE0	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_PCIE0	/;"	d
KS2_LPSC_PCIE1	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_PCIE1	/;"	d
KS2_LPSC_PCIE_1	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_PCIE_1	/;"	d
KS2_LPSC_PKTPROC	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_PKTPROC	/;"	d
KS2_LPSC_PKTPROC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_PKTPROC	/;"	d
KS2_LPSC_PKTPROC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_PKTPROC	/;"	d
KS2_LPSC_PMMC	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_PMMC	/;"	d
KS2_LPSC_QSPI	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_QSPI	/;"	d
KS2_LPSC_RAC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_RAC	/;"	d
KS2_LPSC_RAC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_RAC	/;"	d
KS2_LPSC_RAC_1	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_RAC_1	/;"	d
KS2_LPSC_SA	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SA	/;"	d
KS2_LPSC_SGMII	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_SGMII	/;"	d
KS2_LPSC_SGMII	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_SGMII	/;"	d
KS2_LPSC_SGMII	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_SGMII	/;"	d
KS2_LPSC_SPARE0_LPSC0	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SPARE0_LPSC0	/;"	d
KS2_LPSC_SPARE0_LPSC1	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SPARE0_LPSC1	/;"	d
KS2_LPSC_SPARE1_LPSC0	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SPARE1_LPSC0	/;"	d
KS2_LPSC_SPARE1_LPSC1	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SPARE1_LPSC1	/;"	d
KS2_LPSC_SR	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SR	/;"	d
KS2_LPSC_SRIO	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_SRIO	/;"	d
KS2_LPSC_SYS_COMP	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_SYS_COMP	/;"	d
KS2_LPSC_TAC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TAC	/;"	d
KS2_LPSC_TAC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_TAC	/;"	d
KS2_LPSC_TCP3D_0	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TCP3D_0	/;"	d
KS2_LPSC_TCP3D_0	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_TCP3D_0	/;"	d
KS2_LPSC_TCP3D_1	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TCP3D_1	/;"	d
KS2_LPSC_TCP3D_1	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_TCP3D_1	/;"	d
KS2_LPSC_TCP3D_2	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TCP3D_2	/;"	d
KS2_LPSC_TCP3D_3	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TCP3D_3	/;"	d
KS2_LPSC_TERANET	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_TERANET	/;"	d
KS2_LPSC_TETB_TRC	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_TETB_TRC	/;"	d
KS2_LPSC_TETB_TRC	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TETB_TRC	/;"	d
KS2_LPSC_TETB_TRC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_TETB_TRC	/;"	d
KS2_LPSC_TETRIS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_LPSC_TETRIS	/;"	d
KS2_LPSC_TSIP	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_TSIP	/;"	d
KS2_LPSC_TSIP	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_TSIP	/;"	d
KS2_LPSC_TSIP	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_TSIP /;"	d
KS2_LPSC_USB	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_USB	/;"	d
KS2_LPSC_USB	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_USB	/;"	d
KS2_LPSC_USB	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_USB	/;"	d
KS2_LPSC_USB	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_USB	/;"	d
KS2_LPSC_USB_0	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_USB_0	/;"	d
KS2_LPSC_USB_1	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_USB_1	/;"	d
KS2_LPSC_USB_1	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_LPSC_USB_1	/;"	d
KS2_LPSC_VCP2X4_A	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_A	/;"	d
KS2_LPSC_VCP2X4_A	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_VCP2X4_A	/;"	d
KS2_LPSC_VCP2X4_B	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_VCP2X4_B	/;"	d
KS2_LPSC_VCP2X4_C	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_C	/;"	d
KS2_LPSC_VCP2X4_C	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_VCP2X4_C	/;"	d
KS2_LPSC_VCP2X4_D	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_D	/;"	d
KS2_LPSC_VCP2X4_D	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_LPSC_VCP2X4_D	/;"	d
KS2_LPSC_VCP2X4_E	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_E	/;"	d
KS2_LPSC_VCP2X4_F	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_F	/;"	d
KS2_LPSC_VCP2X4_G	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_G	/;"	d
KS2_LPSC_VCP2X4_H	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VCP2X4_H	/;"	d
KS2_LPSC_VUSR0	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_VUSR0	/;"	d
KS2_LPSC_VUSR0	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VUSR0	/;"	d
KS2_LPSC_VUSR1	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_VUSR1	/;"	d
KS2_LPSC_XGE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_LPSC_XGE	/;"	d
KS2_LPSC_XGE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_LPSC_XGE	/;"	d
KS2_MAC_ID_BASE_ADDR	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MAC_ID_BASE_ADDR	/;"	d
KS2_MAINPLLCTL0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MAINPLLCTL0	/;"	d
KS2_MAINPLLCTL1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MAINPLLCTL1	/;"	d
KS2_MISC_CTRL	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MISC_CTRL	/;"	d
KS2_MSMC_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_CTRL_BASE	/;"	d
KS2_MSMC_DATA_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_DATA_BASE	/;"	d
KS2_MSMC_DST_SEG_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_DST_SEG_BASE	/;"	d
KS2_MSMC_MAP_SEG_NUM	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_MAP_SEG_NUM	/;"	d
KS2_MSMC_SEGMENT_C6X_0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_0	/;"	d
KS2_MSMC_SEGMENT_C6X_1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_1	/;"	d
KS2_MSMC_SEGMENT_C6X_2	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_2	/;"	d
KS2_MSMC_SEGMENT_C6X_3	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_3	/;"	d
KS2_MSMC_SEGMENT_C6X_4	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_4	/;"	d
KS2_MSMC_SEGMENT_C6X_5	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_5	/;"	d
KS2_MSMC_SEGMENT_C6X_6	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_6	/;"	d
KS2_MSMC_SEGMENT_C6X_7	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_C6X_7	/;"	d
KS2_MSMC_SEGMENT_DEBUG	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEGMENT_DEBUG	/;"	d
KS2_MSMC_SEG_SIZE_SHIFT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_MSMC_SEG_SIZE_SHIFT	/;"	d
KS2_NETCP_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_BASE	/;"	d
KS2_NETCP_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_BASE	/;"	d
KS2_NETCP_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_BASE	/;"	d
KS2_NETCP_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_BASE	/;"	d
KS2_NETCP_PDMA_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_CTRL_BASE	/;"	d
KS2_NETCP_PDMA_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_CTRL_BASE	/;"	d
KS2_NETCP_PDMA_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_CTRL_BASE	/;"	d
KS2_NETCP_PDMA_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_CTRL_BASE	/;"	d
KS2_NETCP_PDMA_RX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_RX_BASE	/;"	d
KS2_NETCP_PDMA_RX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_RX_BASE	/;"	d
KS2_NETCP_PDMA_RX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_RX_BASE	/;"	d
KS2_NETCP_PDMA_RX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_RX_BASE	/;"	d
KS2_NETCP_PDMA_RX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_RX_CH_NUM	/;"	d
KS2_NETCP_PDMA_RX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_RX_CH_NUM	/;"	d
KS2_NETCP_PDMA_RX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_RX_CH_NUM	/;"	d
KS2_NETCP_PDMA_RX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_RX_CH_NUM	/;"	d
KS2_NETCP_PDMA_RX_FLOW_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_RX_FLOW_BASE	/;"	d
KS2_NETCP_PDMA_RX_FLOW_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_RX_FLOW_BASE	/;"	d
KS2_NETCP_PDMA_RX_FLOW_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_RX_FLOW_BASE	/;"	d
KS2_NETCP_PDMA_RX_FLOW_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_RX_FLOW_BASE	/;"	d
KS2_NETCP_PDMA_RX_FLOW_NUM	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_RX_FLOW_NUM	/;"	d
KS2_NETCP_PDMA_RX_FLOW_NUM	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_RX_FLOW_NUM	/;"	d
KS2_NETCP_PDMA_RX_FLOW_NUM	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_RX_FLOW_NUM	/;"	d
KS2_NETCP_PDMA_RX_FLOW_NUM	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_RX_FLOW_NUM	/;"	d
KS2_NETCP_PDMA_RX_FREE_QUEUE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_NETCP_PDMA_RX_FREE_QUEUE	/;"	d
KS2_NETCP_PDMA_RX_RCV_QUEUE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_NETCP_PDMA_RX_RCV_QUEUE	/;"	d
KS2_NETCP_PDMA_SCHED_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_SCHED_BASE	/;"	d
KS2_NETCP_PDMA_SCHED_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_SCHED_BASE	/;"	d
KS2_NETCP_PDMA_SCHED_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_SCHED_BASE	/;"	d
KS2_NETCP_PDMA_SCHED_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_SCHED_BASE	/;"	d
KS2_NETCP_PDMA_TX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_TX_BASE	/;"	d
KS2_NETCP_PDMA_TX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_TX_BASE	/;"	d
KS2_NETCP_PDMA_TX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_TX_BASE	/;"	d
KS2_NETCP_PDMA_TX_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_TX_BASE	/;"	d
KS2_NETCP_PDMA_TX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_TX_CH_NUM	/;"	d
KS2_NETCP_PDMA_TX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_TX_CH_NUM	/;"	d
KS2_NETCP_PDMA_TX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_TX_CH_NUM	/;"	d
KS2_NETCP_PDMA_TX_CH_NUM	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_TX_CH_NUM	/;"	d
KS2_NETCP_PDMA_TX_SND_QUEUE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NETCP_PDMA_TX_SND_QUEUE	/;"	d
KS2_NETCP_PDMA_TX_SND_QUEUE	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NETCP_PDMA_TX_SND_QUEUE	/;"	d
KS2_NETCP_PDMA_TX_SND_QUEUE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NETCP_PDMA_TX_SND_QUEUE	/;"	d
KS2_NETCP_PDMA_TX_SND_QUEUE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NETCP_PDMA_TX_SND_QUEUE	/;"	d
KS2_NUM_DSPS	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_NUM_DSPS	/;"	d
KS2_NUM_DSPS	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_NUM_DSPS	/;"	d
KS2_NUM_DSPS	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_NUM_DSPS	/;"	d
KS2_NUM_DSPS	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_NUM_DSPS	/;"	d
KS2_OSR_CFG_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_CFG_BASE	/;"	d
KS2_OSR_DATA_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_DATA_BASE	/;"	d
KS2_OSR_ECC_CTRL	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_CTRL	/;"	d
KS2_OSR_ECC_CTRL_CHK	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_CTRL_CHK	/;"	d
KS2_OSR_ECC_CTRL_EN	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_CTRL_EN	/;"	d
KS2_OSR_ECC_CTRL_RMW	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_CTRL_RMW	/;"	d
KS2_OSR_ECC_VEC	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_VEC	/;"	d
KS2_OSR_ECC_VEC_RAM_ID_SH	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_VEC_RAM_ID_SH	/;"	d
KS2_OSR_ECC_VEC_RD_ADDR_SH	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_VEC_RD_ADDR_SH	/;"	d
KS2_OSR_ECC_VEC_RD_DONE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_VEC_RD_DONE	/;"	d
KS2_OSR_ECC_VEC_TRIG_RD	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_ECC_VEC_TRIG_RD	/;"	d
KS2_OSR_NUM_RAM_BANKS	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_NUM_RAM_BANKS	/;"	d
KS2_OSR_SIZE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_OSR_SIZE	/;"	d
KS2_PASSPLLCTL0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_PASSPLLCTL0	/;"	d
KS2_PASSPLLCTL1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_PASSPLLCTL1	/;"	d
KS2_PASS_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_PASS_BASE	/;"	d
KS2_PASS_BASE	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define KS2_PASS_BASE	/;"	d
KS2_PASS_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_PASS_BASE	/;"	d
KS2_PLL_CNTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_PLL_CNTRL_BASE	/;"	d
KS2_PSC_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_PSC_BASE	/;"	d
KS2_QM_BASE_ADDRESS	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_BASE_ADDRESS	/;"	d
KS2_QM_CONF_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_CONF_BASE	/;"	d
KS2_QM_DESC_SETUP_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_DESC_SETUP_BASE	/;"	d
KS2_QM_INTD_CONF_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_INTD_CONF_BASE	/;"	d
KS2_QM_LINK_RAM_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_LINK_RAM_BASE	/;"	d
KS2_QM_MANAGER_QUEUES_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_MANAGER_QUEUES_BASE	/;"	d
KS2_QM_MANAGER_Q_PROXY_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_MANAGER_Q_PROXY_BASE	/;"	d
KS2_QM_PDSP1_CMD_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_PDSP1_CMD_BASE	/;"	d
KS2_QM_PDSP1_CTRL_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_PDSP1_CTRL_BASE	/;"	d
KS2_QM_PDSP1_IRAM_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_PDSP1_IRAM_BASE	/;"	d
KS2_QM_QPOOL_NUM	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_QPOOL_NUM	/;"	d
KS2_QM_QUEUE_STATUS_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_QUEUE_STATUS_BASE	/;"	d
KS2_QM_REGION_NUM	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_REGION_NUM	/;"	d
KS2_QM_STATUS_RAM_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_QM_STATUS_RAM_BASE	/;"	d
KS2_REV1_DEVSPEED	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_REV1_DEVSPEED	/;"	d
KS2_RSTCTRL	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTCTRL	/;"	d
KS2_RSTCTRL_KEY	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTCTRL_KEY	/;"	d
KS2_RSTCTRL_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTCTRL_MASK	/;"	d
KS2_RSTCTRL_RSCFG	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTCTRL_RSCFG	/;"	d
KS2_RSTCTRL_RSTYPE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTCTRL_RSTYPE	/;"	d
KS2_RSTCTRL_SWRST	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTCTRL_SWRST	/;"	d
KS2_RSTMUX8	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define KS2_RSTMUX8	/;"	d
KS2_RSTYPE_PLL_SOFT	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_RSTYPE_PLL_SOFT	/;"	d
KS2_SGMII_SERDES2_BASE	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define KS2_SGMII_SERDES2_BASE	/;"	d
KS2_SGMII_SERDES2_BASE	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define KS2_SGMII_SERDES2_BASE	/;"	d
KS2_SGMII_SERDES_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_SGMII_SERDES_BASE	/;"	d
KS2_SPI0_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_SPI0_BASE	/;"	d
KS2_SPI1_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_SPI1_BASE	/;"	d
KS2_SPI2_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_SPI2_BASE	/;"	d
KS2_SPI3_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_SPI3_BASE	/;"	d
KS2_SPI_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_SPI_BASE	/;"	d
KS2_TETRIS_PWR_DOMAIN	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_TETRIS_PWR_DOMAIN	/;"	d
KS2_UART0_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_UART0_BASE /;"	d
KS2_UART1_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_UART1_BASE /;"	d
KS2_UARTPLLCTL0	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_UARTPLLCTL0	/;"	d
KS2_UARTPLLCTL1	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_UARTPLLCTL1	/;"	d
KS2_USB_HOST_XHCI_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_USB_HOST_XHCI_BASE	/;"	d
KS2_USB_PHY_CFG_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_USB_PHY_CFG_BASE	/;"	d
KS2_USB_SS_BASE	arch/arm/mach-keystone/include/mach/hardware.h	/^#define KS2_USB_SS_BASE	/;"	d
KS8721_driver	drivers/net/phy/micrel.c	/^static struct phy_driver KS8721_driver = {$/;"	v	typeref:struct:phy_driver	file:
KSAMTIB_CIGAM_2SFFJ	include/jffs2/jffs2.h	/^#define KSAMTIB_CIGAM_2SFFJ /;"	d
KSEG0	arch/mips/include/asm/addrspace.h	/^#define KSEG0	/;"	d
KSEG0ADDR	arch/mips/include/asm/addrspace.h	/^#define KSEG0ADDR(/;"	d
KSEG1	arch/mips/include/asm/addrspace.h	/^#define KSEG1	/;"	d
KSEG1ADDR	arch/mips/include/asm/addrspace.h	/^#define KSEG1ADDR(/;"	d
KSEG2	arch/mips/include/asm/addrspace.h	/^#define KSEG2	/;"	d
KSEG2ADDR	arch/mips/include/asm/addrspace.h	/^#define KSEG2ADDR(/;"	d
KSEG3	arch/mips/include/asm/addrspace.h	/^#define KSEG3	/;"	d
KSEG3ADDR	arch/mips/include/asm/addrspace.h	/^#define KSEG3ADDR(/;"	d
KSEGX	arch/mips/include/asm/addrspace.h	/^#define KSEGX(/;"	d
KSP	include/ppc_defs.h	/^#define	KSP	/;"	d
KSTK_EIP	arch/arm/include/asm/proc-armv/processor.h	/^#define KSTK_EIP(/;"	d
KSTK_EIP	arch/powerpc/include/asm/processor.h	/^#define KSTK_EIP(/;"	d
KSTK_ESP	arch/arm/include/asm/proc-armv/processor.h	/^#define KSTK_ESP(/;"	d
KSTK_ESP	arch/powerpc/include/asm/processor.h	/^#define KSTK_ESP(/;"	d
KSU_KERNEL	arch/mips/include/asm/mipsregs.h	/^#  define KSU_KERNEL	/;"	d
KSU_SUPERVISOR	arch/mips/include/asm/mipsregs.h	/^#  define KSU_SUPERVISOR	/;"	d
KSU_USER	arch/mips/include/asm/mipsregs.h	/^#  define KSU_USER	/;"	d
KSV_I2C_ADDR	board/gdsys/common/adv7611.c	/^	KSV_I2C_ADDR = 0x32,$/;"	e	enum:__anon3d55bc280103	file:
KSZ8031_driver	drivers/net/phy/micrel.c	/^static struct phy_driver KSZ8031_driver = {$/;"	v	typeref:struct:phy_driver	file:
KSZ804_driver	drivers/net/phy/micrel.c	/^static struct phy_driver KSZ804_driver = {$/;"	v	typeref:struct:phy_driver	file:
KSZ8051_driver	drivers/net/phy/micrel.c	/^static struct phy_driver KSZ8051_driver = {$/;"	v	typeref:struct:phy_driver	file:
KSZ8081_driver	drivers/net/phy/micrel.c	/^static struct phy_driver KSZ8081_driver = {$/;"	v	typeref:struct:phy_driver	file:
KSZPHY_OMSO_B_CAST_OFF	drivers/net/phy/micrel.c	/^#define KSZPHY_OMSO_B_CAST_OFF	/;"	d	file:
KSZ_MAX_HZ	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_MAX_HZ /;"	d	file:
KSZ_POSSIBLE	board/bf518f-ezbrd/bf518f-ezbrd.c	/^# define KSZ_POSSIBLE /;"	d	file:
KSZ_READ	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_READ /;"	d	file:
KSZ_REG_CHID	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_REG_CHID /;"	d	file:
KSZ_REG_GC9	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_REG_GC9 /;"	d	file:
KSZ_REG_P3C0	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_REG_P3C0 /;"	d	file:
KSZ_REG_STPID	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_REG_STPID /;"	d	file:
KSZ_WRITE	board/bf518f-ezbrd/bf518f-ezbrd.c	/^#define KSZ_WRITE /;"	d	file:
KS_CCR	drivers/net/ks8851_mll.h	/^#define KS_CCR	/;"	d
KS_CGCR	drivers/net/ks8851_mll.h	/^#define KS_CGCR	/;"	d
KS_CIDER	drivers/net/ks8851_mll.h	/^#define KS_CIDER	/;"	d
KS_EEPCR	drivers/net/ks8851_mll.h	/^#define KS_EEPCR	/;"	d
KS_FCHWR	drivers/net/ks8851_mll.h	/^#define KS_FCHWR	/;"	d
KS_FCLWR	drivers/net/ks8851_mll.h	/^#define KS_FCLWR	/;"	d
KS_FCOWR	drivers/net/ks8851_mll.h	/^#define KS_FCOWR	/;"	d
KS_G1	include/fsl_sec.h	/^#define KS_G1	/;"	d
KS_GRR	drivers/net/ks8851_mll.h	/^#define KS_GRR	/;"	d
KS_IACR	drivers/net/ks8851_mll.h	/^#define KS_IACR	/;"	d
KS_IADLR	drivers/net/ks8851_mll.h	/^#define KS_IADLR	/;"	d
KS_IAHDR	drivers/net/ks8851_mll.h	/^#define KS_IAHDR	/;"	d
KS_IER	drivers/net/ks8851_mll.h	/^#define KS_IER	/;"	d
KS_ISR	drivers/net/ks8851_mll.h	/^#define KS_ISR	/;"	d
KS_MAHTR0	drivers/net/ks8851_mll.h	/^#define KS_MAHTR0	/;"	d
KS_MAHTR1	drivers/net/ks8851_mll.h	/^#define KS_MAHTR1	/;"	d
KS_MAHTR2	drivers/net/ks8851_mll.h	/^#define KS_MAHTR2	/;"	d
KS_MAHTR3	drivers/net/ks8851_mll.h	/^#define KS_MAHTR3	/;"	d
KS_MARH	drivers/net/ks8851_mll.h	/^#define KS_MARH	/;"	d
KS_MARL	drivers/net/ks8851_mll.h	/^#define KS_MARL	/;"	d
KS_MARM	drivers/net/ks8851_mll.h	/^#define KS_MARM	/;"	d
KS_MBIR	drivers/net/ks8851_mll.h	/^#define KS_MBIR	/;"	d
KS_OBCR	drivers/net/ks8851_mll.h	/^#define KS_OBCR	/;"	d
KS_P1ANAR	drivers/net/ks8851_mll.h	/^#define KS_P1ANAR	/;"	d
KS_P1ANLPR	drivers/net/ks8851_mll.h	/^#define KS_P1ANLPR	/;"	d
KS_P1CR	drivers/net/ks8851_mll.h	/^#define KS_P1CR	/;"	d
KS_P1MBCR	drivers/net/ks8851_mll.h	/^#define KS_P1MBCR	/;"	d
KS_P1MBSR	drivers/net/ks8851_mll.h	/^#define KS_P1MBSR	/;"	d
KS_P1SCLMD	drivers/net/ks8851_mll.h	/^#define KS_P1SCLMD	/;"	d
KS_P1SR	drivers/net/ks8851_mll.h	/^#define KS_P1SR	/;"	d
KS_PHY1IHR	drivers/net/ks8851_mll.h	/^#define KS_PHY1IHR	/;"	d
KS_PHY1ILR	drivers/net/ks8851_mll.h	/^#define KS_PHY1ILR	/;"	d
KS_PMECR	drivers/net/ks8851_mll.h	/^#define KS_PMECR	/;"	d
KS_RXCR1	drivers/net/ks8851_mll.h	/^#define KS_RXCR1	/;"	d
KS_RXCR2	drivers/net/ks8851_mll.h	/^#define KS_RXCR2	/;"	d
KS_RXDBCTR	drivers/net/ks8851_mll.h	/^#define KS_RXDBCTR	/;"	d
KS_RXDTTR	drivers/net/ks8851_mll.h	/^#define KS_RXDTTR	/;"	d
KS_RXFC	drivers/net/ks8851_mll.h	/^#define KS_RXFC	/;"	d
KS_RXFCTR	drivers/net/ks8851_mll.h	/^#define KS_RXFCTR	/;"	d
KS_RXFDPR	drivers/net/ks8851_mll.h	/^#define KS_RXFDPR	/;"	d
KS_RXFHBCR	drivers/net/ks8851_mll.h	/^#define KS_RXFHBCR	/;"	d
KS_RXFHSR	drivers/net/ks8851_mll.h	/^#define KS_RXFHSR	/;"	d
KS_RXQCR	drivers/net/ks8851_mll.h	/^#define KS_RXQCR	/;"	d
KS_TXCR	drivers/net/ks8851_mll.h	/^#define KS_TXCR	/;"	d
KS_TXFDPR	drivers/net/ks8851_mll.h	/^#define KS_TXFDPR	/;"	d
KS_TXMIR	drivers/net/ks8851_mll.h	/^#define KS_TXMIR	/;"	d
KS_TXNTFSR	drivers/net/ks8851_mll.h	/^#define KS_TXNTFSR	/;"	d
KS_TXQCR	drivers/net/ks8851_mll.h	/^#define KS_TXQCR	/;"	d
KS_TXSR	drivers/net/ks8851_mll.h	/^#define KS_TXSR	/;"	d
KS_WF0BM0	drivers/net/ks8851_mll.h	/^#define KS_WF0BM0	/;"	d
KS_WF0BM1	drivers/net/ks8851_mll.h	/^#define KS_WF0BM1	/;"	d
KS_WF0BM2	drivers/net/ks8851_mll.h	/^#define KS_WF0BM2	/;"	d
KS_WF0BM3	drivers/net/ks8851_mll.h	/^#define KS_WF0BM3	/;"	d
KS_WF0CRC0	drivers/net/ks8851_mll.h	/^#define KS_WF0CRC0	/;"	d
KS_WF0CRC1	drivers/net/ks8851_mll.h	/^#define KS_WF0CRC1	/;"	d
KS_WF1BM0	drivers/net/ks8851_mll.h	/^#define KS_WF1BM0	/;"	d
KS_WF1BM1	drivers/net/ks8851_mll.h	/^#define KS_WF1BM1	/;"	d
KS_WF1BM2	drivers/net/ks8851_mll.h	/^#define KS_WF1BM2	/;"	d
KS_WF1BM3	drivers/net/ks8851_mll.h	/^#define KS_WF1BM3	/;"	d
KS_WF1CRC0	drivers/net/ks8851_mll.h	/^#define KS_WF1CRC0	/;"	d
KS_WF1CRC1	drivers/net/ks8851_mll.h	/^#define KS_WF1CRC1	/;"	d
KS_WF2BM0	drivers/net/ks8851_mll.h	/^#define KS_WF2BM0	/;"	d
KS_WF2BM1	drivers/net/ks8851_mll.h	/^#define KS_WF2BM1	/;"	d
KS_WF2BM2	drivers/net/ks8851_mll.h	/^#define KS_WF2BM2	/;"	d
KS_WF2BM3	drivers/net/ks8851_mll.h	/^#define KS_WF2BM3	/;"	d
KS_WF2CRC0	drivers/net/ks8851_mll.h	/^#define KS_WF2CRC0	/;"	d
KS_WF2CRC1	drivers/net/ks8851_mll.h	/^#define KS_WF2CRC1	/;"	d
KS_WF3BM0	drivers/net/ks8851_mll.h	/^#define KS_WF3BM0	/;"	d
KS_WF3BM1	drivers/net/ks8851_mll.h	/^#define KS_WF3BM1	/;"	d
KS_WF3BM2	drivers/net/ks8851_mll.h	/^#define KS_WF3BM2	/;"	d
KS_WF3BM3	drivers/net/ks8851_mll.h	/^#define KS_WF3BM3	/;"	d
KS_WF3CRC0	drivers/net/ks8851_mll.h	/^#define KS_WF3CRC0	/;"	d
KS_WF3CRC1	drivers/net/ks8851_mll.h	/^#define KS_WF3CRC1	/;"	d
KS_WFCR	drivers/net/ks8851_mll.h	/^#define KS_WFCR	/;"	d
KTCR	drivers/net/ns8382x.c	/^	KTCR = 0x09,$/;"	e	enum:phy_reg_offsets	file:
KUSEG	arch/mips/include/asm/addrspace.h	/^#define KUSEG	/;"	d
KU_KERN	arch/mips/include/asm/isadep.h	/^#define KU_KERN /;"	d
KU_MASK	arch/mips/include/asm/isadep.h	/^#define KU_MASK /;"	d
KU_USER	arch/mips/include/asm/isadep.h	/^#define KU_USER /;"	d
KVADDR_TO_NID	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define KVADDR_TO_NID(/;"	d
KVCO_CAL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define KVCO_CAL_CTRL_ADDR(/;"	d
KVCO_DEFALUT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define KVCO_DEFALUT	/;"	d
KW88F6192_REGS_PHYS_BASE	arch/arm/mach-kirkwood/include/mach/kw88f6192.h	/^#define KW88F6192_REGS_PHYS_BASE	/;"	d
KW88F6281_REGS_PHYS_BASE	arch/arm/mach-kirkwood/include/mach/kw88f6281.h	/^#define KW88F6281_REGS_PHYS_BASE	/;"	d
KWBHEADER_V1_SIZE	tools/kwbimage.h	/^#define KWBHEADER_V1_SIZE(/;"	d
KWBIMAGE_MAX_CONFIG	tools/kwbimage.h	/^#define KWBIMAGE_MAX_CONFIG	/;"	d
KWBOOT	doc/kwboot.1	/^.TH KWBOOT 1 "2012-05-19"$/;"	t
KWBOOT_BLK_RSP_TIMEO	tools/kwboot.c	/^#define KWBOOT_BLK_RSP_TIMEO /;"	d	file:
KWBOOT_MSG_REQ_DELAY	tools/kwboot.c	/^#define KWBOOT_MSG_REQ_DELAY	/;"	d	file:
KWBOOT_MSG_REQ_DELAY_AXP	tools/kwboot.c	/^#define KWBOOT_MSG_REQ_DELAY_AXP	/;"	d	file:
KWBOOT_MSG_RSP_TIMEO	tools/kwboot.c	/^#define KWBOOT_MSG_RSP_TIMEO	/;"	d	file:
KWBOOT_MSG_RSP_TIMEO_AXP	tools/kwboot.c	/^#define KWBOOT_MSG_RSP_TIMEO_AXP	/;"	d	file:
KWCPU_ATTR_BOOTROM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_BOOTROM = 0x1d,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_DRAM_CS0	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_DRAM_CS0 = 0x0e,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_DRAM_CS1	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_DRAM_CS1 = 0x0d,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_DRAM_CS2	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_DRAM_CS2 = 0x0b,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_DRAM_CS3	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_DRAM_CS3 = 0x07,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_NANDFLASH	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_NANDFLASH = 0x2f,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_PCIE_IO	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_PCIE_IO = 0xe0,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_PCIE_MEM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_PCIE_MEM = 0xe8$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_SASRAM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_SASRAM = 0x01,$/;"	e	enum:kwcpu_attrib
KWCPU_ATTR_SPIFLASH	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_ATTR_SPIFLASH = 0x1e,$/;"	e	enum:kwcpu_attrib
KWCPU_TARGET_1RESERVED	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_TARGET_1RESERVED,$/;"	e	enum:kwcpu_target
KWCPU_TARGET_MEMORY	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_TARGET_MEMORY,$/;"	e	enum:kwcpu_target
KWCPU_TARGET_PCIE	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_TARGET_PCIE$/;"	e	enum:kwcpu_target
KWCPU_TARGET_RESERVED	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_TARGET_RESERVED,$/;"	e	enum:kwcpu_target
KWCPU_TARGET_SASRAM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_TARGET_SASRAM,$/;"	e	enum:kwcpu_target
KWCPU_WIN_CTRL_DATA	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KWCPU_WIN_CTRL_DATA(/;"	d
KWCPU_WIN_DISABLE	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_WIN_DISABLE,$/;"	e	enum:kwcpu_winen
KWCPU_WIN_ENABLE	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	KWCPU_WIN_ENABLE$/;"	e	enum:kwcpu_winen
KWGBE_PORT_SERIAL_CONTROL1_REG	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KWGBE_PORT_SERIAL_CONTROL1_REG(/;"	d
KWSPI_ADRLEN_1BYTE	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_ADRLEN_1BYTE	/;"	d
KWSPI_ADRLEN_2BYTE	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_ADRLEN_2BYTE	/;"	d
KWSPI_ADRLEN_3BYTE	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_ADRLEN_3BYTE	/;"	d
KWSPI_ADRLEN_4BYTE	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_ADRLEN_4BYTE	/;"	d
KWSPI_ADRLEN_MASK	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_ADRLEN_MASK	/;"	d
KWSPI_CLKPRESCL_MASK	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_CLKPRESCL_MASK	/;"	d
KWSPI_CLKPRESCL_MIN	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_CLKPRESCL_MIN	/;"	d
KWSPI_CSN_ACT	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_CSN_ACT	/;"	d
KWSPI_CS_MASK	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_CS_MASK	/;"	d
KWSPI_CS_SHIFT	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_CS_SHIFT	/;"	d
KWSPI_IRQMASK	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_IRQMASK	/;"	d
KWSPI_IRQUNMASK	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_IRQUNMASK	/;"	d
KWSPI_SMEMRDIRQ	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_SMEMRDIRQ	/;"	d
KWSPI_SMEMRDY	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_SMEMRDY	/;"	d
KWSPI_TIMEOUT	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_TIMEOUT	/;"	d
KWSPI_XFERLEN_1BYTE	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_XFERLEN_1BYTE	/;"	d
KWSPI_XFERLEN_2BYTE	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_XFERLEN_2BYTE	/;"	d
KWSPI_XFERLEN_MASK	arch/arm/include/asm/arch-mvebu/spi.h	/^#define KWSPI_XFERLEN_MASK	/;"	d
KW_CPU_REG_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_CPU_REG_BASE	/;"	d
KW_CPU_WIN_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_CPU_WIN_BASE	/;"	d
KW_DEFADR_BOOTROM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_BOOTROM	/;"	d
KW_DEFADR_NANDF	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_NANDF	/;"	d
KW_DEFADR_PCI_IO	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_PCI_IO	/;"	d
KW_DEFADR_PCI_IO_REMAP	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_PCI_IO_REMAP	/;"	d
KW_DEFADR_PCI_MEM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_PCI_MEM	/;"	d
KW_DEFADR_SASRAM	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_SASRAM	/;"	d
KW_DEFADR_SPIF	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_DEFADR_SPIF	/;"	d
KW_EGIGA0_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_EGIGA0_BASE	/;"	d
KW_EGIGA1_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_EGIGA1_BASE	/;"	d
KW_MPP_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_MPP_BASE	/;"	d
KW_NANDF_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_NANDF_BASE	/;"	d
KW_OFFSET_REG	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_OFFSET_REG	/;"	d
KW_REGISTER	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_REGISTER(/;"	d
KW_REGS_PHY_BASE	arch/arm/mach-kirkwood/include/mach/kw88f6192.h	/^#define KW_REGS_PHY_BASE	/;"	d
KW_REGS_PHY_BASE	arch/arm/mach-kirkwood/include/mach/kw88f6281.h	/^#define KW_REGS_PHY_BASE	/;"	d
KW_REG_DEVICE_ID	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_REG_DEVICE_ID	/;"	d
KW_REG_MPP_OUT_DRV_REG	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_REG_MPP_OUT_DRV_REG	/;"	d
KW_REG_PCIE_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_REG_PCIE_BASE	/;"	d
KW_REG_PCIE_DEVID	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_REG_PCIE_DEVID	/;"	d
KW_REG_PCIE_REVID	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_REG_PCIE_REVID	/;"	d
KW_REG_SYSRST_CNT	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define KW_REG_SYSRST_CNT	/;"	d
KW_REG_UNDOC_0x1470	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_REG_UNDOC_0x1470	/;"	d
KW_REG_UNDOC_0x1478	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_REG_UNDOC_0x1478	/;"	d
KW_RTC_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_RTC_BASE	/;"	d
KW_SATA_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_SATA_BASE	/;"	d
KW_SATA_PORT0_OFFSET	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_SATA_PORT0_OFFSET	/;"	d
KW_SATA_PORT1_OFFSET	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_SATA_PORT1_OFFSET	/;"	d
KW_SDIO_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_SDIO_BASE	/;"	d
KW_TWSI_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_TWSI_BASE	/;"	d
KW_UART0_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_UART0_BASE	/;"	d
KW_UART1_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_UART1_BASE	/;"	d
KW_USB20_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define KW_USB20_BASE	/;"	d
KYCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define KYCR1 /;"	d
KYCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define KYCR2 /;"	d
KYINDR	arch/sh/include/asm/cpu_sh7722.h	/^#define KYINDR /;"	d
KYOUTDR	arch/sh/include/asm/cpu_sh7722.h	/^#define KYOUTDR /;"	d
KZM_FLASH_BASE	include/configs/kzm9g.h	/^#define KZM_FLASH_BASE	/;"	d
KZM_SDRAM_BASE	include/configs/kzm9g.h	/^#define KZM_SDRAM_BASE	/;"	d
K_CALG_COH_EXCL	arch/mips/include/asm/addrspace.h	/^#define K_CALG_COH_EXCL	/;"	d
K_CALG_COH_EXCL1_NOL2	arch/mips/include/asm/addrspace.h	/^#define K_CALG_COH_EXCL1_NOL2	/;"	d
K_CALG_COH_SHAREABLE	arch/mips/include/asm/addrspace.h	/^#define K_CALG_COH_SHAREABLE	/;"	d
K_CALG_COH_SHRL1_NOL2	arch/mips/include/asm/addrspace.h	/^#define K_CALG_COH_SHRL1_NOL2	/;"	d
K_CALG_NONCOHERENT	arch/mips/include/asm/addrspace.h	/^#define K_CALG_NONCOHERENT	/;"	d
K_CALG_NOTUSED	arch/mips/include/asm/addrspace.h	/^#define K_CALG_NOTUSED	/;"	d
K_CALG_UNCACHED	arch/mips/include/asm/addrspace.h	/^#define K_CALG_UNCACHED	/;"	d
K_CALG_UNCACHED_ACCEL	arch/mips/include/asm/addrspace.h	/^#define K_CALG_UNCACHED_ACCEL	/;"	d
K_ESCAPE	cmd/load.c	/^#define K_ESCAPE /;"	d	file:
Kconfig	scripts/kconfig/Makefile	/^Kconfig := $(KBUILD_KCONFIG)$/;"	m
Kconfig	scripts/kconfig/Makefile	/^Kconfig := Kconfig$/;"	m
KconfigParser	tools/moveconfig.py	/^class KconfigParser:$/;"	c
KconfigScanner	tools/genboardscfg.py	/^class KconfigScanner:$/;"	c
Kconfig_Syntax_Error	tools/buildman/kconfiglib.py	/^class Kconfig_Syntax_Error(Exception):$/;"	c
L	arch/x86/cpu/quark/smc.h	/^	L,	\/* LEFT RDQS *\/$/;"	e	enum:__anone34d010a0203
L01_CNFG1	include/power/max77696_pmic.h	/^	L01_CNFG1 =	0x43,$/;"	e	enum:__anoncca498ab0103
L01_CNFG2	include/power/max77696_pmic.h	/^	L01_CNFG2,$/;"	e	enum:__anoncca498ab0103
L02_CNFG1	include/power/max77696_pmic.h	/^	L02_CNFG1,$/;"	e	enum:__anoncca498ab0103
L02_CNFG2	include/power/max77696_pmic.h	/^	L02_CNFG2,$/;"	e	enum:__anoncca498ab0103
L03_CNFG1	include/power/max77696_pmic.h	/^	L03_CNFG1,$/;"	e	enum:__anoncca498ab0103
L03_CNFG2	include/power/max77696_pmic.h	/^	L03_CNFG2,$/;"	e	enum:__anoncca498ab0103
L04_CNFG1	include/power/max77696_pmic.h	/^	L04_CNFG1,$/;"	e	enum:__anoncca498ab0103
L04_CNFG2	include/power/max77696_pmic.h	/^	L04_CNFG2,$/;"	e	enum:__anoncca498ab0103
L05_CNFG1	include/power/max77696_pmic.h	/^	L05_CNFG1,$/;"	e	enum:__anoncca498ab0103
L05_CNFG2	include/power/max77696_pmic.h	/^	L05_CNFG2,$/;"	e	enum:__anoncca498ab0103
L06_CNFG1	include/power/max77696_pmic.h	/^	L06_CNFG1,$/;"	e	enum:__anoncca498ab0103
L06_CNFG2	include/power/max77696_pmic.h	/^	L06_CNFG2,$/;"	e	enum:__anoncca498ab0103
L07_CNFG1	include/power/max77696_pmic.h	/^	L07_CNFG1,$/;"	e	enum:__anoncca498ab0103
L07_CNFG2	include/power/max77696_pmic.h	/^	L07_CNFG2,$/;"	e	enum:__anoncca498ab0103
L08_CNFG1	include/power/max77696_pmic.h	/^	L08_CNFG1,$/;"	e	enum:__anoncca498ab0103
L08_CNFG2	include/power/max77696_pmic.h	/^	L08_CNFG2,$/;"	e	enum:__anoncca498ab0103
L09_CNFG1	include/power/max77696_pmic.h	/^	L09_CNFG1,$/;"	e	enum:__anoncca498ab0103
L09_CNFG2	include/power/max77696_pmic.h	/^	L09_CNFG2,$/;"	e	enum:__anoncca498ab0103
L0PAL_WR_REG	drivers/video/mb862xx.c	/^#define L0PAL_WR_REG(/;"	d	file:
L1	arch/sparc/cpu/leon3/ambapp_low.S	/^L1:$/;"	l
L1	board/amcc/bamboo/bamboo.h	/^typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;$/;"	e	enum:uart_config_nb
L100_return	arch/sparc/cpu/leon3/ambapp_low.S	/^.L100_return:$/;"	l
L100_search_next_ahb_bus	arch/sparc/cpu/leon3/ambapp_low.S	/^.L100_search_next_ahb_bus:$/;"	l
L10_CNFG1	include/power/max77696_pmic.h	/^	L10_CNFG1,$/;"	e	enum:__anoncca498ab0103
L10_CNFG2	include/power/max77696_pmic.h	/^	L10_CNFG2,$/;"	e	enum:__anoncca498ab0103
L1CFG0	arch/powerpc/include/asm/processor.h	/^#define L1CFG0	/;"	d
L1CFG1	arch/powerpc/include/asm/processor.h	/^#define L1CFG1	/;"	d
L1CSR0	arch/powerpc/include/asm/processor.h	/^#define L1CSR0	/;"	d
L1CSR0_CPE	arch/powerpc/include/asm/processor.h	/^#define   L1CSR0_CPE	/;"	d
L1CSR0_CUL	arch/powerpc/include/asm/processor.h	/^#define   L1CSR0_CUL	/;"	d
L1CSR0_DCE	arch/powerpc/include/asm/processor.h	/^#define   L1CSR0_DCE	/;"	d
L1CSR0_DCFI	arch/powerpc/include/asm/processor.h	/^#define   L1CSR0_DCFI	/;"	d
L1CSR0_DCLFR	arch/powerpc/include/asm/processor.h	/^#define   L1CSR0_DCLFR	/;"	d
L1CSR1	arch/powerpc/include/asm/processor.h	/^#define L1CSR1	/;"	d
L1CSR1_CPE	arch/powerpc/include/asm/processor.h	/^#define   L1CSR1_CPE	/;"	d
L1CSR1_ICE	arch/powerpc/include/asm/processor.h	/^#define   L1CSR1_ICE	/;"	d
L1CSR1_ICFI	arch/powerpc/include/asm/processor.h	/^#define   L1CSR1_ICFI	/;"	d
L1CSR1_ICLFR	arch/powerpc/include/asm/processor.h	/^#define   L1CSR1_ICLFR	/;"	d
L1CSR1_ICUL	arch/powerpc/include/asm/processor.h	/^#define   L1CSR1_ICUL	/;"	d
L1CSR2	arch/powerpc/include/asm/processor.h	/^#define L1CSR2	/;"	d
L1CSR2_DCWS	arch/powerpc/include/asm/processor.h	/^#define   L1CSR2_DCWS	/;"	d
L1LXT971A_PHY_ID	drivers/net/e1000.h	/^#define L1LXT971A_PHY_ID /;"	d
L1_CACHE_ALIGN	arch/powerpc/include/asm/cache.h	/^#define	L1_CACHE_ALIGN(/;"	d
L1_CACHE_BYTES	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define L1_CACHE_BYTES	/;"	d
L1_CACHE_BYTES	arch/blackfin/include/asm/blackfin_local.h	/^#define L1_CACHE_BYTES /;"	d
L1_CACHE_BYTES	arch/blackfin/include/asm/cache.h	/^#define L1_CACHE_BYTES	/;"	d
L1_CACHE_BYTES	arch/mips/include/asm/cache.h	/^#define L1_CACHE_BYTES	/;"	d
L1_CACHE_BYTES	arch/powerpc/include/asm/cache.h	/^#define L1_CACHE_BYTES /;"	d
L1_CACHE_BYTES	arch/sh/include/asm/cache.h	/^#define L1_CACHE_BYTES /;"	d
L1_CACHE_PAGES	arch/powerpc/include/asm/cache.h	/^#define	L1_CACHE_PAGES	/;"	d
L1_CACHE_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define L1_CACHE_SHIFT	/;"	d
L1_CACHE_SHIFT	arch/blackfin/include/asm/blackfin_local.h	/^#define L1_CACHE_SHIFT /;"	d
L1_CACHE_SHIFT	arch/blackfin/include/asm/cache.h	/^#define L1_CACHE_SHIFT	/;"	d
L1_CACHE_SHIFT	arch/mips/include/asm/cache.h	/^#define L1_CACHE_SHIFT	/;"	d
L1_CACHE_SHIFT	arch/powerpc/include/asm/cache.h	/^#define	L1_CACHE_SHIFT	/;"	d
L1_CACHE_SHIFT	arch/powerpc/include/asm/cache.h	/^#define L1_CACHE_SHIFT	/;"	d
L1_CACHE_SHIFT_MAX	arch/blackfin/include/asm/cache.h	/^#define L1_CACHE_SHIFT_MAX	/;"	d
L1_CODE_ORIGIN	arch/blackfin/cpu/u-boot.lds	/^# define L1_CODE_ORIGIN /;"	d	file:
L1_DATA_A_SRAM	arch/blackfin/cpu/u-boot.lds	/^# define L1_DATA_A_SRAM /;"	d	file:
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_DATA_A_SRAM /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_END	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_DATA_A_SRAM_END /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/cpu/u-boot.lds	/^# define L1_DATA_A_SRAM_SIZE /;"	d	file:
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_A_SRAM_SIZE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_DATA_A_SRAM_SIZE /;"	d
L1_DATA_B_SRAM	arch/blackfin/cpu/u-boot.lds	/^# define L1_DATA_B_SRAM /;"	d	file:
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_DATA_B_SRAM /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_END	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_DATA_B_SRAM_END /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/cpu/u-boot.lds	/^# define L1_DATA_B_SRAM_SIZE /;"	d	file:
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DATA_B_SRAM_SIZE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_DATA_B_SRAM_SIZE /;"	d
L1_DMEMORY	arch/blackfin/include/asm/cplb.h	/^#define L1_DMEMORY /;"	d
L1_IMEMORY	arch/blackfin/include/asm/cplb.h	/^#define L1_IMEMORY /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf533/BF532_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_INST_SRAM /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf533/BF532_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_END	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_INST_SRAM_END /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf533/BF532_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_INST_SRAM_SIZE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define L1_INST_SRAM_SIZE /;"	d
L1_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define L1_SPDWN_EN	/;"	d
L1_SRAM_SCRATCH	arch/blackfin/include/asm/mem_map.h	/^# define L1_SRAM_SCRATCH /;"	d
L1_SRAM_SCRATCH_END	arch/blackfin/include/asm/mem_map.h	/^# define L1_SRAM_SCRATCH_END /;"	d
L1_SRAM_SCRATCH_SIZE	arch/blackfin/include/asm/mem_map.h	/^# define L1_SRAM_SCRATCH_SIZE /;"	d
L1iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L1iack0;		\/* 0xE4 Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L1iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L1iack1;		\/* 0xE4 Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
L2	arch/arm/dts/armada-375.dtsi	/^			L2: cache-controller@8000 {$/;"	l
L2	arch/arm/dts/armada-38x.dtsi	/^			L2: cache-controller@8000 {$/;"	l
L2	arch/arm/dts/armada-xp.dtsi	/^			L2: l2-cache {$/;"	l
L2	arch/arm/dts/imx6qdl.dtsi	/^		L2: l2-cache@00a02000 {$/;"	l
L2	arch/arm/dts/socfpga.dtsi	/^		L2: l2-cache@fffef000 {$/;"	l
L2	arch/arm/dts/zynq-7000.dtsi	/^		L2: cache-controller@f8f02000 {$/;"	l	label:amba
L2	arch/sparc/cpu/leon3/ambapp_low.S	/^L2:$/;"	l
L2	board/amcc/bamboo/bamboo.h	/^typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;$/;"	e	enum:uart_config_nb
L2C0	arch/powerpc/dts/arches.dts	/^	L2C0: l2c {$/;"	l
L2C0	arch/powerpc/dts/canyonlands.dts	/^	L2C0: l2c {$/;"	l
L2C0	arch/powerpc/dts/glacier.dts	/^	L2C0: l2c {$/;"	l
L2CACHE_1MB	arch/powerpc/include/asm/cache.h	/^#define L2CACHE_1MB	/;"	d
L2CACHE_256KB	arch/powerpc/include/asm/cache.h	/^#define L2CACHE_256KB	/;"	d
L2CACHE_512KB	arch/powerpc/include/asm/cache.h	/^#define L2CACHE_512KB	/;"	d
L2CACHE_MASK	arch/powerpc/include/asm/cache.h	/^#define L2CACHE_MASK	/;"	d
L2CACHE_NONE	arch/powerpc/include/asm/cache.h	/^#define L2CACHE_NONE	/;"	d
L2CACHE_PARITY	arch/powerpc/include/asm/cache.h	/^#define L2CACHE_PARITY /;"	d
L2CC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2CC_BASE_ADDR	/;"	d
L2CFG0	arch/powerpc/include/asm/processor.h	/^#define L2CFG0	/;"	d
L2CR	arch/powerpc/include/asm/processor.h	/^#define L2CR	/;"	d
L2CR_HWF	include/mpc86xx.h	/^#define L2CR_HWF /;"	d
L2CR_L2CTL	include/mpc86xx.h	/^#define L2CR_L2CTL /;"	d
L2CR_L2DO	include/mpc86xx.h	/^#define L2CR_L2DO /;"	d
L2CR_L2E	include/mpc86xx.h	/^#define L2CR_L2E /;"	d
L2CR_L2I	include/mpc86xx.h	/^#define L2CR_L2I /;"	d
L2CR_L2IP	include/mpc86xx.h	/^#define L2CR_L2IP /;"	d
L2CR_L2PE	include/mpc86xx.h	/^#define L2CR_L2PE /;"	d
L2CR_REP	include/mpc86xx.h	/^#define L2CR_REP /;"	d
L2CSR0	arch/powerpc/include/asm/processor.h	/^#define L2CSR0	/;"	d
L2CSR0_L2CM	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2CM	/;"	d
L2CSR0_L2DO	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2DO	/;"	d
L2CSR0_L2E	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2E	/;"	d
L2CSR0_L2FI	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2FI	/;"	d
L2CSR0_L2FL	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2FL	/;"	d
L2CSR0_L2IO	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2IO	/;"	d
L2CSR0_L2LFC	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2LFC	/;"	d
L2CSR0_L2LO	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2LO	/;"	d
L2CSR0_L2LOA	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2LOA	/;"	d
L2CSR0_L2PE	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2PE	/;"	d
L2CSR0_L2REP	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2REP	/;"	d
L2CSR0_L2REP_FIFO	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2REP_FIFO	/;"	d
L2CSR0_L2REP_MODE	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2REP_MODE	/;"	d
L2CSR0_L2REP_PLRU	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2REP_PLRU	/;"	d
L2CSR0_L2REP_SPLRU	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2REP_SPLRU	/;"	d
L2CSR0_L2REP_SPLRUAGE	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2REP_SPLRUAGE	/;"	d
L2CSR0_L2WP	arch/powerpc/include/asm/processor.h	/^#define   L2CSR0_L2WP	/;"	d
L2CSR1	arch/powerpc/include/asm/processor.h	/^#define L2CSR1	/;"	d
L2C_RAM_SEL	arch/arm/cpu/arm926ejs/armada100/cpu.c	/^#define L2C_RAM_SEL	/;"	d	file:
L2X0_CTRL_EN	arch/arm/include/asm/pl310.h	/^#define L2X0_CTRL_EN	/;"	d
L2X0_DYNAMIC_CLK_GATING_EN	arch/arm/include/asm/pl310.h	/^#define L2X0_DYNAMIC_CLK_GATING_EN	/;"	d
L2X0_STNDBY_MODE_EN	arch/arm/include/asm/pl310.h	/^#define L2X0_STNDBY_MODE_EN	/;"	d
L2_CACHE_ADDR	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_ADDR	/;"	d
L2_CACHE_AUX_CTL_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_AUX_CTL_REG	/;"	d
L2_CACHE_BASE	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_BASE	/;"	d
L2_CACHE_CFG	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_CFG	/;"	d
L2_CACHE_CLEAN_INV_LINE_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_CLEAN_INV_LINE_REG	/;"	d
L2_CACHE_CLEAN_LINE_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_CLEAN_LINE_REG	/;"	d
L2_CACHE_CMD	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_CMD	/;"	d
L2_CACHE_CTL_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_CTL_REG	/;"	d
L2_CACHE_CVER	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_CVER	/;"	d
L2_CACHE_DATA	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_DATA	/;"	d
L2_CACHE_DBG_CTL_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_DBG_CTL_REG	/;"	d
L2_CACHE_INV_LINE_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_INV_LINE_REG	/;"	d
L2_CACHE_INV_WAY_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_INV_WAY_REG	/;"	d
L2_CACHE_LINE_SIZE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_LINE_SIZE	/;"	d
L2_CACHE_SNP0	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_SNP0	/;"	d
L2_CACHE_SNP1	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_SNP1	/;"	d
L2_CACHE_STAT	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define L2_CACHE_STAT	/;"	d
L2_CACHE_SYNC_REG	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define L2_CACHE_SYNC_REG	/;"	d
L2_ENABLE	include/configs/MPC8610HPCD.h	/^#define L2_ENABLE	/;"	d
L2_ENABLE	include/configs/MPC8641HPCN.h	/^#define L2_ENABLE	/;"	d
L2_ENABLE	include/configs/sbc8641d.h	/^#define L2_ENABLE	/;"	d
L2_ENABLE	include/configs/xpedite517x.h	/^#define L2_ENABLE	/;"	d
L2_FILTER_FOR_MAX_MEMORY_SIZE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define L2_FILTER_FOR_MAX_MEMORY_SIZE /;"	d
L2_INIT	include/configs/MPC8610HPCD.h	/^#define L2_INIT	/;"	d
L2_INIT	include/configs/MPC8641HPCN.h	/^#define L2_INIT	/;"	d
L2_INIT	include/configs/sbc8641d.h	/^#define L2_INIT	/;"	d
L2_INIT	include/configs/xpedite517x.h	/^#define L2_INIT	/;"	d
L2_PL310_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define L2_PL310_BASE	/;"	d
L2_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define L2_RESET	/;"	d
L2_maxloops_detected	arch/sparc/cpu/leon3/ambapp_low.S	/^.L2_maxloops_detected:$/;"	l
L2_no_device_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L2_no_device_found:$/;"	l
L2_search_next_ahb_bus	arch/sparc/cpu/leon3/ambapp_low.S	/^.L2_search_next_ahb_bus:$/;"	l
L2iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L2iack0;		\/* 0xE8 Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L2iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L2iack1;		\/* 0xE8 Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
L3	board/amcc/bamboo/bamboo.h	/^typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;$/;"	e	enum:uart_config_nb
L310_AUX_CTRL_DATA_PREFETCH_MASK	arch/arm/include/asm/pl310.h	/^#define L310_AUX_CTRL_DATA_PREFETCH_MASK	/;"	d
L310_AUX_CTRL_INST_PREFETCH_MASK	arch/arm/include/asm/pl310.h	/^#define L310_AUX_CTRL_INST_PREFETCH_MASK	/;"	d
L310_SHARED_ATT_OVERRIDE_ENABLE	arch/arm/include/asm/pl310.h	/^#define L310_SHARED_ATT_OVERRIDE_ENABLE	/;"	d
L3F_CFG_BWLIMITER	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define L3F_CFG_BWLIMITER	/;"	d
L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK	/;"	d
L3REGS_REMAP_HPS2FPGA_MASK	arch/arm/mach-socfpga/reset_manager.c	/^#define L3REGS_REMAP_HPS2FPGA_MASK	/;"	d	file:
L3REGS_REMAP_LWHPS2FPGA_MASK	arch/arm/mach-socfpga/reset_manager.c	/^#define L3REGS_REMAP_LWHPS2FPGA_MASK	/;"	d	file:
L3REGS_REMAP_OCRAM_MASK	arch/arm/mach-socfpga/reset_manager.c	/^#define L3REGS_REMAP_OCRAM_MASK	/;"	d	file:
L3_CLKCTRL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define L3_CLKCTRL	/;"	d	file:
L3_M	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define L3_M	/;"	d	file:
L3_M2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define L3_M2	/;"	d	file:
L3_N	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define L3_N	/;"	d	file:
L3_OSC_SRC	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define L3_OSC_SRC	/;"	d	file:
L3_PLL_BASE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define L3_PLL_BASE	/;"	d	file:
L3iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L3iack0;		\/* 0xEC Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L3iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L3iack1;		\/* 0xEC Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
L4	board/amcc/bamboo/bamboo.h	/^typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;$/;"	e	enum:uart_config_nb
L4WD0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD0_RESET	/;"	d
L4WD1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4WD1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define L4WD1_RESET	/;"	d
L4iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L4iack0;		\/* 0xF0 Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L4iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L4iack1;		\/* 0xF0 Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
L5iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L5iack0;		\/* 0xF4 Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L5iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L5iack1;		\/* 0xF4 Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
L6iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L6iack0;		\/* 0xF8 Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L6iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L6iack1;		\/* 0xF8 Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
L7iack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L7iack0;		\/* 0xFC Level n interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
L7iack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 L7iack1;		\/* 0xFC Level n interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
LAC	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define LAC	/;"	d
LACKS_SYS_PARAM_H	include/malloc.h	/^#define LACKS_SYS_PARAM_H$/;"	d
LACKS_UNISTD_H	include/malloc.h	/^#define	LACKS_UNISTD_H	/;"	d
LACKS_UNISTD_H	include/malloc.h	/^#define LACKS_UNISTD_H$/;"	d
LADDR_HIGH	drivers/net/zynq_gem.c	/^#define LADDR_HIGH	/;"	d	file:
LADDR_LOW	drivers/net/zynq_gem.c	/^#define LADDR_LOW	/;"	d	file:
LAN91C111_MEMORY_MULTIPLIER	drivers/net/smc91111.c	/^#define LAN91C111_MEMORY_MULTIPLIER	/;"	d	file:
LAN91C96_ACK_ERCV_INT	drivers/net/lan91c96.h	/^#define LAN91C96_ACK_ERCV_INT /;"	d
LAN91C96_ACK_RX_OVRN_INT	drivers/net/lan91c96.h	/^#define LAN91C96_ACK_RX_OVRN_INT /;"	d
LAN91C96_ACK_TX_EMPTY_INT	drivers/net/lan91c96.h	/^#define LAN91C96_ACK_TX_EMPTY_INT /;"	d
LAN91C96_ACK_TX_INT	drivers/net/lan91c96.h	/^#define LAN91C96_ACK_TX_INT /;"	d
LAN91C96_ALGN_ERR	drivers/net/lan91c96.h	/^#define LAN91C96_ALGN_ERR /;"	d
LAN91C96_ARR	drivers/net/lan91c96.h	/^#define LAN91C96_ARR /;"	d
LAN91C96_ARR_ALLOC_PN	drivers/net/lan91c96.h	/^#define LAN91C96_ARR_ALLOC_PN /;"	d
LAN91C96_ARR_FAILED	drivers/net/lan91c96.h	/^#define LAN91C96_ARR_FAILED /;"	d
LAN91C96_AUTOTX	drivers/net/lan91c96.h	/^#define LAN91C96_AUTOTX /;"	d
LAN91C96_AUTO_TX_START	drivers/net/lan91c96.h	/^#define LAN91C96_AUTO_TX_START /;"	d
LAN91C96_BAD_CRC	drivers/net/lan91c96.h	/^#define LAN91C96_BAD_CRC /;"	d
LAN91C96_BANKSELECT	drivers/net/lan91c96.h	/^#define LAN91C96_BANKSELECT /;"	d
LAN91C96_BANK_SELECT	drivers/net/lan91c96.h	/^#define LAN91C96_BANK_SELECT /;"	d
LAN91C96_BAR_A_BITS	drivers/net/lan91c96.h	/^#define LAN91C96_BAR_A_BITS /;"	d
LAN91C96_BAR_RA_BITS	drivers/net/lan91c96.h	/^#define LAN91C96_BAR_RA_BITS /;"	d
LAN91C96_BAR_ROM_SIZE	drivers/net/lan91c96.h	/^#define LAN91C96_BAR_ROM_SIZE /;"	d
LAN91C96_BASE	drivers/net/lan91c96.h	/^#define LAN91C96_BASE /;"	d
LAN91C96_BROD_CAST	drivers/net/lan91c96.h	/^#define LAN91C96_BROD_CAST /;"	d
LAN91C96_CONFIG	drivers/net/lan91c96.h	/^#define LAN91C96_CONFIG /;"	d
LAN91C96_CONTROL	drivers/net/lan91c96.h	/^#define LAN91C96_CONTROL /;"	d
LAN91C96_CONTROL_CRC	drivers/net/lan91c96.h	/^#define LAN91C96_CONTROL_CRC /;"	d
LAN91C96_CONTROL_ODD	drivers/net/lan91c96.h	/^#define LAN91C96_CONTROL_ODD /;"	d
LAN91C96_COUNTER	drivers/net/lan91c96.h	/^#define LAN91C96_COUNTER /;"	d
LAN91C96_CR_16BIT	drivers/net/lan91c96.h	/^#define LAN91C96_CR_16BIT /;"	d
LAN91C96_CR_AUI_SELECT	drivers/net/lan91c96.h	/^#define LAN91C96_CR_AUI_SELECT /;"	d
LAN91C96_CR_DIS_LINK	drivers/net/lan91c96.h	/^#define LAN91C96_CR_DIS_LINK /;"	d
LAN91C96_CR_FULL_STEP	drivers/net/lan91c96.h	/^#define LAN91C96_CR_FULL_STEP /;"	d
LAN91C96_CR_INT_SEL0	drivers/net/lan91c96.h	/^#define LAN91C96_CR_INT_SEL0 /;"	d
LAN91C96_CR_INT_SEL1	drivers/net/lan91c96.h	/^#define LAN91C96_CR_INT_SEL1 /;"	d
LAN91C96_CR_NO_WAIT	drivers/net/lan91c96.h	/^#define LAN91C96_CR_NO_WAIT /;"	d
LAN91C96_CR_RES	drivers/net/lan91c96.h	/^#define LAN91C96_CR_RES /;"	d
LAN91C96_CR_SET_SQLCH	drivers/net/lan91c96.h	/^#define LAN91C96_CR_SET_SQLCH /;"	d
LAN91C96_CTR_AUTO_RELEASE	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_AUTO_RELEASE /;"	d
LAN91C96_CTR_BIT_8	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_BIT_8 /;"	d
LAN91C96_CTR_CR_ENABLE	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_CR_ENABLE /;"	d
LAN91C96_CTR_EEPROM	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_EEPROM /;"	d
LAN91C96_CTR_LE_ENABLE	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_LE_ENABLE /;"	d
LAN91C96_CTR_PWRDN	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_PWRDN /;"	d
LAN91C96_CTR_RCV_BAD	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_RCV_BAD /;"	d
LAN91C96_CTR_RELOAD	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_RELOAD /;"	d
LAN91C96_CTR_STORE	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_STORE /;"	d
LAN91C96_CTR_TE_ENABLE	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_TE_ENABLE /;"	d
LAN91C96_CTR_WAKEUP_EN	drivers/net/lan91c96.h	/^#define LAN91C96_CTR_WAKEUP_EN /;"	d
LAN91C96_DATA_HIGH	drivers/net/lan91c96.h	/^#define LAN91C96_DATA_HIGH /;"	d
LAN91C96_DATA_LOW	drivers/net/lan91c96.h	/^#define LAN91C96_DATA_LOW /;"	d
LAN91C96_ECOR	drivers/net/lan91c96.h	/^#define LAN91C96_ECOR /;"	d
LAN91C96_ECOR_ENABLE	drivers/net/lan91c96.h	/^#define LAN91C96_ECOR_ENABLE /;"	d
LAN91C96_ECOR_LEVEL_REQ	drivers/net/lan91c96.h	/^#define LAN91C96_ECOR_LEVEL_REQ /;"	d
LAN91C96_ECOR_SRESET	drivers/net/lan91c96.h	/^#define LAN91C96_ECOR_SRESET /;"	d
LAN91C96_ECOR_WR_ATTRIB	drivers/net/lan91c96.h	/^#define LAN91C96_ECOR_WR_ATTRIB /;"	d
LAN91C96_ECR_DEF_TX	drivers/net/lan91c96.h	/^#define LAN91C96_ECR_DEF_TX /;"	d
LAN91C96_ECR_EXC_DEF_TX	drivers/net/lan91c96.h	/^#define LAN91C96_ECR_EXC_DEF_TX /;"	d
LAN91C96_ECR_MULT_COL	drivers/net/lan91c96.h	/^#define LAN91C96_ECR_MULT_COL /;"	d
LAN91C96_ECR_SNGL_COL	drivers/net/lan91c96.h	/^#define LAN91C96_ECR_SNGL_COL /;"	d
LAN91C96_ECSR	drivers/net/lan91c96.h	/^#define LAN91C96_ECSR /;"	d
LAN91C96_ECSR_INTR	drivers/net/lan91c96.h	/^#define LAN91C96_ECSR_INTR /;"	d
LAN91C96_ECSR_IOIS8	drivers/net/lan91c96.h	/^#define LAN91C96_ECSR_IOIS8 /;"	d
LAN91C96_ECSR_PWRDWN	drivers/net/lan91c96.h	/^#define LAN91C96_ECSR_PWRDWN /;"	d
LAN91C96_EPHSR_16COL	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_16COL /;"	d
LAN91C96_EPHSR_CTR_ROL	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_CTR_ROL /;"	d
LAN91C96_EPHSR_ERRORS	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_ERRORS /;"	d
LAN91C96_EPHSR_EXC_DEF	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_EXC_DEF /;"	d
LAN91C96_EPHSR_LATCOL	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_LATCOL /;"	d
LAN91C96_EPHSR_LINK_OK	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_LINK_OK /;"	d
LAN91C96_EPHSR_LOST_CARR	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_LOST_CARR /;"	d
LAN91C96_EPHSR_LTX_BRD	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_LTX_BRD /;"	d
LAN91C96_EPHSR_LTX_MULT	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_LTX_MULT /;"	d
LAN91C96_EPHSR_MUL_COL	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_MUL_COL /;"	d
LAN91C96_EPHSR_SNGL_COL	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_SNGL_COL /;"	d
LAN91C96_EPHSR_SQET	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_SQET /;"	d
LAN91C96_EPHSR_TX_DEFR	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_TX_DEFR /;"	d
LAN91C96_EPHSR_TX_SUC	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_TX_SUC /;"	d
LAN91C96_EPHSR_TX_UNRN	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_TX_UNRN /;"	d
LAN91C96_EPHSR_WAKEUP	drivers/net/lan91c96.h	/^#define LAN91C96_EPHSR_WAKEUP /;"	d
LAN91C96_EPH_STATUS	drivers/net/lan91c96.h	/^#define LAN91C96_EPH_STATUS /;"	d
LAN91C96_ERCV_RCV_DISCRD	drivers/net/lan91c96.h	/^#define LAN91C96_ERCV_RCV_DISCRD /;"	d
LAN91C96_ERCV_THRESHOLD	drivers/net/lan91c96.h	/^#define LAN91C96_ERCV_THRESHOLD /;"	d
LAN91C96_FIFO	drivers/net/lan91c96.h	/^#define LAN91C96_FIFO /;"	d
LAN91C96_FIFO_RXEMPTY	drivers/net/lan91c96.h	/^#define LAN91C96_FIFO_RXEMPTY /;"	d
LAN91C96_FIFO_RX_DONE_PN	drivers/net/lan91c96.h	/^#define LAN91C96_FIFO_RX_DONE_PN /;"	d
LAN91C96_FIFO_TEMPTY	drivers/net/lan91c96.h	/^#define LAN91C96_FIFO_TEMPTY /;"	d
LAN91C96_FIFO_TX_DONE_PN	drivers/net/lan91c96.h	/^#define LAN91C96_FIFO_TX_DONE_PN /;"	d
LAN91C96_GEN_PURPOSE	drivers/net/lan91c96.h	/^#define LAN91C96_GEN_PURPOSE /;"	d
LAN91C96_HIGH_SIGNATURE	drivers/net/lan91c96.h	/^#define LAN91C96_HIGH_SIGNATURE /;"	d
LAN91C96_IA0	drivers/net/lan91c96.h	/^#define LAN91C96_IA0 /;"	d
LAN91C96_IA1	drivers/net/lan91c96.h	/^#define LAN91C96_IA1 /;"	d
LAN91C96_IA2	drivers/net/lan91c96.h	/^#define LAN91C96_IA2 /;"	d
LAN91C96_IA3	drivers/net/lan91c96.h	/^#define LAN91C96_IA3 /;"	d
LAN91C96_IA4	drivers/net/lan91c96.h	/^#define LAN91C96_IA4 /;"	d
LAN91C96_IA5	drivers/net/lan91c96.h	/^#define LAN91C96_IA5 /;"	d
LAN91C96_INT_ACK	drivers/net/lan91c96.h	/^#define LAN91C96_INT_ACK /;"	d
LAN91C96_INT_MASK	drivers/net/lan91c96.h	/^#define LAN91C96_INT_MASK /;"	d
LAN91C96_INT_STATS	drivers/net/lan91c96.h	/^#define LAN91C96_INT_STATS /;"	d
LAN91C96_IST_ALLOC_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_ALLOC_INT /;"	d
LAN91C96_IST_EPH_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_EPH_INT /;"	d
LAN91C96_IST_ERCV_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_ERCV_INT /;"	d
LAN91C96_IST_RCV_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_RCV_INT /;"	d
LAN91C96_IST_RX_IDLE_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_RX_IDLE_INT /;"	d
LAN91C96_IST_RX_OVRN_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_RX_OVRN_INT /;"	d
LAN91C96_IST_TX_EMPTY_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_TX_EMPTY_INT /;"	d
LAN91C96_IST_TX_INT	drivers/net/lan91c96.h	/^#define LAN91C96_IST_TX_INT /;"	d
LAN91C96_LOW_SIGNATURE	drivers/net/lan91c96.h	/^#define LAN91C96_LOW_SIGNATURE /;"	d
LAN91C96_MAX_PAGES	drivers/net/lan91c96.h	/^#define LAN91C96_MAX_PAGES /;"	d
LAN91C96_MCR	drivers/net/lan91c96.h	/^#define LAN91C96_MCR /;"	d
LAN91C96_MCR_HIGH_ID	drivers/net/lan91c96.h	/^#define LAN91C96_MCR_HIGH_ID /;"	d
LAN91C96_MCR_MEM_MULT	drivers/net/lan91c96.h	/^#define LAN91C96_MCR_MEM_MULT /;"	d
LAN91C96_MCR_MEM_RES	drivers/net/lan91c96.h	/^#define LAN91C96_MCR_MEM_RES /;"	d
LAN91C96_MCR_TRANSMIT_PAGES	drivers/net/lan91c96.h	/^#define LAN91C96_MCR_TRANSMIT_PAGES /;"	d
LAN91C96_MGMT_HIGH_ID	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_HIGH_ID /;"	d
LAN91C96_MGMT_IOS0	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_IOS0 /;"	d
LAN91C96_MGMT_IOS1	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_IOS1 /;"	d
LAN91C96_MGMT_IOS2	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_IOS2 /;"	d
LAN91C96_MGMT_LOW_ID	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_LOW_ID /;"	d
LAN91C96_MGMT_MCLK	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_MCLK /;"	d
LAN91C96_MGMT_MDI	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_MDI /;"	d
LAN91C96_MGMT_MDO	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_MDO /;"	d
LAN91C96_MGMT_MDOE	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_MDOE /;"	d
LAN91C96_MGMT_nXNDEC	drivers/net/lan91c96.h	/^#define LAN91C96_MGMT_nXNDEC /;"	d
LAN91C96_MIR	drivers/net/lan91c96.h	/^#define LAN91C96_MIR /;"	d
LAN91C96_MIR_SIZE	drivers/net/lan91c96.h	/^#define LAN91C96_MIR_SIZE /;"	d
LAN91C96_MMU	drivers/net/lan91c96.h	/^#define LAN91C96_MMU /;"	d
LAN91C96_MMUCR_ALLOC_TX	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_ALLOC_TX /;"	d
LAN91C96_MMUCR_COMMAND	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_COMMAND /;"	d
LAN91C96_MMUCR_ENQUEUE	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_ENQUEUE /;"	d
LAN91C96_MMUCR_N1	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_N1 /;"	d
LAN91C96_MMUCR_N2	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_N2 /;"	d
LAN91C96_MMUCR_NO_BUSY	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_NO_BUSY /;"	d
LAN91C96_MMUCR_RELEASE_RX	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_RELEASE_RX /;"	d
LAN91C96_MMUCR_RELEASE_TX	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_RELEASE_TX /;"	d
LAN91C96_MMUCR_REMOVE_RX	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_REMOVE_RX /;"	d
LAN91C96_MMUCR_REMOVE_TX	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_REMOVE_TX /;"	d
LAN91C96_MMUCR_RESET_MMU	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_RESET_MMU /;"	d
LAN91C96_MMUCR_RESET_TX	drivers/net/lan91c96.h	/^#define LAN91C96_MMUCR_RESET_TX /;"	d
LAN91C96_MSK_ALLOC_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_ALLOC_INT /;"	d
LAN91C96_MSK_EPH_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_EPH_INT /;"	d
LAN91C96_MSK_ERCV_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_ERCV_INT /;"	d
LAN91C96_MSK_RCV_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_RCV_INT /;"	d
LAN91C96_MSK_RX_OVRN_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_RX_OVRN_INT /;"	d
LAN91C96_MSK_TX_EMPTY_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_TX_EMPTY_INT /;"	d
LAN91C96_MSK_TX_IDLE_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_TX_IDLE_INT /;"	d
LAN91C96_MSK_TX_INT	drivers/net/lan91c96.h	/^#define LAN91C96_MSK_TX_INT /;"	d
LAN91C96_ODD_FRM	drivers/net/lan91c96.h	/^#define LAN91C96_ODD_FRM /;"	d
LAN91C96_PNR	drivers/net/lan91c96.h	/^#define LAN91C96_PNR /;"	d
LAN91C96_PNR_TX	drivers/net/lan91c96.h	/^#define LAN91C96_PNR_TX /;"	d
LAN91C96_POINTER	drivers/net/lan91c96.h	/^#define LAN91C96_POINTER /;"	d
LAN91C96_PTR_AUTO_INCR	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_AUTO_INCR /;"	d
LAN91C96_PTR_AUTO_TX	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_AUTO_TX /;"	d
LAN91C96_PTR_ETEN	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_ETEN /;"	d
LAN91C96_PTR_HIGH	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_HIGH /;"	d
LAN91C96_PTR_LOW	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_LOW /;"	d
LAN91C96_PTR_RCV	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_RCV /;"	d
LAN91C96_PTR_READ	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_READ /;"	d
LAN91C96_PTR_RX_FRAME	drivers/net/lan91c96.h	/^#define LAN91C96_PTR_RX_FRAME /;"	d
LAN91C96_RCR	drivers/net/lan91c96.h	/^#define LAN91C96_RCR /;"	d
LAN91C96_RCR_ALMUL	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_ALMUL /;"	d
LAN91C96_RCR_FILT_CAR	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_FILT_CAR /;"	d
LAN91C96_RCR_PRMS	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_PRMS /;"	d
LAN91C96_RCR_RXEN	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_RXEN /;"	d
LAN91C96_RCR_RX_ABORT	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_RX_ABORT /;"	d
LAN91C96_RCR_SOFT_RST	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_SOFT_RST /;"	d
LAN91C96_RCR_STRIP_CRC	drivers/net/lan91c96.h	/^#define LAN91C96_RCR_STRIP_CRC /;"	d
LAN91C96_REV_CHIPID	drivers/net/lan91c96.h	/^#define LAN91C96_REV_CHIPID /;"	d
LAN91C96_REV_REVID	drivers/net/lan91c96.h	/^#define LAN91C96_REV_REVID /;"	d
LAN91C96_SIGNATURE	drivers/net/lan91c96.h	/^#define LAN91C96_SIGNATURE /;"	d
LAN91C96_TCR	drivers/net/lan91c96.h	/^#define LAN91C96_TCR /;"	d
LAN91C96_TCR_EPH_LOOP	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_EPH_LOOP /;"	d
LAN91C96_TCR_ETEN_TYPE	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_ETEN_TYPE /;"	d
LAN91C96_TCR_FDSE	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_FDSE /;"	d
LAN91C96_TCR_FDUPLX	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_FDUPLX /;"	d
LAN91C96_TCR_FORCOL	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_FORCOL /;"	d
LAN91C96_TCR_LOOP	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_LOOP /;"	d
LAN91C96_TCR_MON_CSN	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_MON_CSN /;"	d
LAN91C96_TCR_NOCRC	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_NOCRC /;"	d
LAN91C96_TCR_PAD_EN	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_PAD_EN /;"	d
LAN91C96_TCR_STP_SQET	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_STP_SQET /;"	d
LAN91C96_TCR_TXENA	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_TXENA /;"	d
LAN91C96_TCR_TXP_EN	drivers/net/lan91c96.h	/^#define LAN91C96_TCR_TXP_EN /;"	d
LAN91C96_TOO_LONG	drivers/net/lan91c96.h	/^#define LAN91C96_TOO_LONG /;"	d
LAN91C96_TOO_SHORT	drivers/net/lan91c96.h	/^#define LAN91C96_TOO_SHORT /;"	d
LANE0_MAP_LOGIC_LANE_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE0_MAP_LOGIC_LANE_0	/;"	d
LANE0_MAP_LOGIC_LANE_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE0_MAP_LOGIC_LANE_1	/;"	d
LANE0_MAP_LOGIC_LANE_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE0_MAP_LOGIC_LANE_2	/;"	d
LANE0_MAP_LOGIC_LANE_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE0_MAP_LOGIC_LANE_3	/;"	d
LANE1_MAP_LOGIC_LANE_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE1_MAP_LOGIC_LANE_0	/;"	d
LANE1_MAP_LOGIC_LANE_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE1_MAP_LOGIC_LANE_1	/;"	d
LANE1_MAP_LOGIC_LANE_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE1_MAP_LOGIC_LANE_2	/;"	d
LANE1_MAP_LOGIC_LANE_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE1_MAP_LOGIC_LANE_3	/;"	d
LANE2_MAP_LOGIC_LANE_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE2_MAP_LOGIC_LANE_0	/;"	d
LANE2_MAP_LOGIC_LANE_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE2_MAP_LOGIC_LANE_1	/;"	d
LANE2_MAP_LOGIC_LANE_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE2_MAP_LOGIC_LANE_2	/;"	d
LANE2_MAP_LOGIC_LANE_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE2_MAP_LOGIC_LANE_3	/;"	d
LANE3_MAP_LOGIC_LANE_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE3_MAP_LOGIC_LANE_0	/;"	d
LANE3_MAP_LOGIC_LANE_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE3_MAP_LOGIC_LANE_1	/;"	d
LANE3_MAP_LOGIC_LANE_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE3_MAP_LOGIC_LANE_2	/;"	d
LANE3_MAP_LOGIC_LANE_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LANE3_MAP_LOGIC_LANE_3	/;"	d
LANE4_PREEMPHASIS	drivers/video/tegra124/sor.h	/^#define LANE4_PREEMPHASIS(/;"	d
LANEB_SATA	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LANEB_SATA	/;"	d	file:
LANEB_SGMII1	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LANEB_SGMII1	/;"	d	file:
LANEC_PCIEX1	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LANEC_PCIEX1	/;"	d	file:
LANEC_SGMII1	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LANEC_SGMII1	/;"	d	file:
LANED_PCIEX2	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LANED_PCIEX2	/;"	d	file:
LANED_SGMII2	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LANED_SGMII2	/;"	d	file:
LANE_ALIGN_REG0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_ALIGN_REG0	/;"	d
LANE_CFG0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define LANE_CFG0_ADDR(/;"	d
LANE_CFG1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define LANE_CFG1_ADDR(/;"	d
LANE_CFG1_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_CFG1_REG	/;"	d
LANE_CFG4_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define LANE_CFG4_ADDR(/;"	d
LANE_CFG4_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_CFG4_REG	/;"	d
LANE_CFG4_REG_25MHZ_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_CFG4_REG_25MHZ_VAL	/;"	d
LANE_CFG4_REG_40MHZ_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_CFG4_REG_40MHZ_VAL	/;"	d
LANE_CFG4_REG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_CFG4_REG_MASK	/;"	d
LANE_CFG5_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LANE_CFG5_REG	/;"	d
LANE_CNT1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LANE_CNT1 = 1,$/;"	e	enum:link_lane_count_type
LANE_CNT2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LANE_CNT2 = 2,$/;"	e	enum:link_lane_count_type
LANE_CNT4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LANE_CNT4 = 4$/;"	e	enum:link_lane_count_type
LANE_DRIVE_CURRENT	drivers/video/tegra124/sor.h	/^#define LANE_DRIVE_CURRENT(/;"	d
LANE_SEQ_CTL	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL	/;"	d
LANE_SEQ_CTL_DELAY_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_DELAY_DEFAULT_MASK	/;"	d
LANE_SEQ_CTL_DELAY_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_DELAY_SHIFT	/;"	d
LANE_SEQ_CTL_LANE0_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE0_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE0_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE0_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE0_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE0_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE1_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE1_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE1_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE1_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE1_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE1_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE2_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE2_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE2_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE2_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE2_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE2_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE3_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE3_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE3_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE3_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE3_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE3_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE4_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE4_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE4_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE4_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE4_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE4_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE5_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE5_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE5_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE5_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE5_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE5_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE6_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE6_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE6_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE6_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE6_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE6_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE7_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE7_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE7_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE7_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE7_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE7_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE8_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE8_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE8_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE8_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE8_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE8_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_LANE9_STATE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE9_STATE_POWERDOWN	/;"	d
LANE_SEQ_CTL_LANE9_STATE_POWERUP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE9_STATE_POWERUP	/;"	d
LANE_SEQ_CTL_LANE9_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_LANE9_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_NEW_POWER_STATE_PD	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_NEW_POWER_STATE_PD	/;"	d
LANE_SEQ_CTL_NEW_POWER_STATE_PU	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_NEW_POWER_STATE_PU	/;"	d
LANE_SEQ_CTL_NEW_POWER_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_NEW_POWER_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_SEQUENCE_DOWN	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SEQUENCE_DOWN	/;"	d
LANE_SEQ_CTL_SEQUENCE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SEQUENCE_SHIFT	/;"	d
LANE_SEQ_CTL_SEQUENCE_UP	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SEQUENCE_UP	/;"	d
LANE_SEQ_CTL_SEQ_STATE_BUSY	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SEQ_STATE_BUSY	/;"	d
LANE_SEQ_CTL_SEQ_STATE_IDLE	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SEQ_STATE_IDLE	/;"	d
LANE_SEQ_CTL_SEQ_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SEQ_STATE_SHIFT	/;"	d
LANE_SEQ_CTL_SETTING_MASK	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SETTING_MASK	/;"	d
LANE_SEQ_CTL_SETTING_NEW_DONE	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SETTING_NEW_DONE	/;"	d
LANE_SEQ_CTL_SETTING_NEW_PENDING	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SETTING_NEW_PENDING	/;"	d
LANE_SEQ_CTL_SETTING_NEW_SHIFT	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SETTING_NEW_SHIFT	/;"	d
LANE_SEQ_CTL_SETTING_NEW_TRIGGER	drivers/video/tegra124/sor.h	/^#define LANE_SEQ_CTL_SETTING_NEW_TRIGGER	/;"	d
LANE_STAT1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define LANE_STAT1_ADDR(/;"	d
LANGUAGE	include/SA-1100.h	/^#  define LANGUAGE /;"	d
LAN_WAKE_EN	drivers/usb/eth/r8152.h	/^#define LAN_WAKE_EN	/;"	d
LAPIC_DEFAULT_BASE	arch/x86/include/asm/lapic.h	/^#define LAPIC_DEFAULT_BASE	/;"	d
LAPIC_DELIVERY_MODE_EXTINT	arch/x86/include/asm/lapic.h	/^#define LAPIC_DELIVERY_MODE_EXTINT	/;"	d
LAPIC_DELIVERY_MODE_FIXED	arch/x86/include/asm/lapic.h	/^#define LAPIC_DELIVERY_MODE_FIXED	/;"	d
LAPIC_DELIVERY_MODE_MASK	arch/x86/include/asm/lapic.h	/^#define LAPIC_DELIVERY_MODE_MASK	/;"	d
LAPIC_DELIVERY_MODE_NMI	arch/x86/include/asm/lapic.h	/^#define LAPIC_DELIVERY_MODE_NMI	/;"	d
LAPIC_DEST_ALLBUT	arch/x86/include/asm/lapic.h	/^#define LAPIC_DEST_ALLBUT	/;"	d
LAPIC_DEST_ALLINC	arch/x86/include/asm/lapic.h	/^#define LAPIC_DEST_ALLINC	/;"	d
LAPIC_DEST_LOGICAL	arch/x86/include/asm/lapic.h	/^#define LAPIC_DEST_LOGICAL	/;"	d
LAPIC_DEST_SELF	arch/x86/include/asm/lapic.h	/^#define LAPIC_DEST_SELF	/;"	d
LAPIC_DM_EXTINT	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_EXTINT	/;"	d
LAPIC_DM_FIXED	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_FIXED	/;"	d
LAPIC_DM_INIT	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_INIT	/;"	d
LAPIC_DM_LOWEST	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_LOWEST	/;"	d
LAPIC_DM_NMI	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_NMI	/;"	d
LAPIC_DM_REMRD	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_REMRD	/;"	d
LAPIC_DM_SMI	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_SMI	/;"	d
LAPIC_DM_STARTUP	arch/x86/include/asm/lapic.h	/^#define LAPIC_DM_STARTUP	/;"	d
LAPIC_ICR	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR	/;"	d
LAPIC_ICR2	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR2	/;"	d
LAPIC_ICR_BUSY	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR_BUSY	/;"	d
LAPIC_ICR_RR_INPROG	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR_RR_INPROG	/;"	d
LAPIC_ICR_RR_INVALID	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR_RR_INVALID	/;"	d
LAPIC_ICR_RR_MASK	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR_RR_MASK	/;"	d
LAPIC_ICR_RR_VALID	arch/x86/include/asm/lapic.h	/^#define LAPIC_ICR_RR_VALID	/;"	d
LAPIC_ID	arch/x86/include/asm/lapic.h	/^#define LAPIC_ID	/;"	d
LAPIC_INPUT_POLARITY	arch/x86/include/asm/lapic.h	/^#define LAPIC_INPUT_POLARITY	/;"	d
LAPIC_INT_ASSERT	arch/x86/include/asm/lapic.h	/^#define LAPIC_INT_ASSERT	/;"	d
LAPIC_INT_LEVELTRIG	arch/x86/include/asm/lapic.h	/^#define LAPIC_INT_LEVELTRIG	/;"	d
LAPIC_LVR	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVR	/;"	d
LAPIC_LVT0	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVT0	/;"	d
LAPIC_LVT1	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVT1	/;"	d
LAPIC_LVT_LEVEL_TRIGGER	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVT_LEVEL_TRIGGER	/;"	d
LAPIC_LVT_MASKED	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVT_MASKED	/;"	d
LAPIC_LVT_REMOTE_IRR	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVT_REMOTE_IRR	/;"	d
LAPIC_LVT_RESERVED_1	arch/x86/include/asm/lapic.h	/^#define LAPIC_LVT_RESERVED_1	/;"	d
LAPIC_RRR	arch/x86/include/asm/lapic.h	/^#define LAPIC_RRR	/;"	d
LAPIC_SEND_PENDING	arch/x86/include/asm/lapic.h	/^#define LAPIC_SEND_PENDING	/;"	d
LAPIC_SPIV	arch/x86/include/asm/lapic.h	/^#define LAPIC_SPIV	/;"	d
LAPIC_SPIV_ENABLE	arch/x86/include/asm/lapic.h	/^#define LAPIC_SPIV_ENABLE	/;"	d
LAPIC_TASKPRI	arch/x86/include/asm/lapic.h	/^#define LAPIC_TASKPRI	/;"	d
LAPIC_TPRI_MASK	arch/x86/include/asm/lapic.h	/^#define LAPIC_TPRI_MASK	/;"	d
LAPIC_VECTOR_MASK	arch/x86/include/asm/lapic.h	/^#define LAPIC_VECTOR_MASK	/;"	d
LARGE_PAGE_SIZE	arch/x86/lib/physmem.c	/^#define LARGE_PAGE_SIZE /;"	d	file:
LARGE_RAM	board/esd/vme8349/vme8349.c	/^#define LARGE_RAM	/;"	d	file:
LASF0	arch/arm/lib/asm-offsets.s	/^.LASF0:$/;"	l
LASF0	lib/asm-offsets.s	/^.LASF0:$/;"	l
LASF1	arch/arm/lib/asm-offsets.s	/^.LASF1:$/;"	l
LASF1	lib/asm-offsets.s	/^.LASF1:$/;"	l
LASF10	arch/arm/lib/asm-offsets.s	/^.LASF10:$/;"	l
LASF10	lib/asm-offsets.s	/^.LASF10:$/;"	l
LASF100	arch/arm/lib/asm-offsets.s	/^.LASF100:$/;"	l
LASF100	lib/asm-offsets.s	/^.LASF100:$/;"	l
LASF101	arch/arm/lib/asm-offsets.s	/^.LASF101:$/;"	l
LASF101	lib/asm-offsets.s	/^.LASF101:$/;"	l
LASF102	arch/arm/lib/asm-offsets.s	/^.LASF102:$/;"	l
LASF102	lib/asm-offsets.s	/^.LASF102:$/;"	l
LASF103	arch/arm/lib/asm-offsets.s	/^.LASF103:$/;"	l
LASF103	lib/asm-offsets.s	/^.LASF103:$/;"	l
LASF104	arch/arm/lib/asm-offsets.s	/^.LASF104:$/;"	l
LASF104	lib/asm-offsets.s	/^.LASF104:$/;"	l
LASF105	arch/arm/lib/asm-offsets.s	/^.LASF105:$/;"	l
LASF105	lib/asm-offsets.s	/^.LASF105:$/;"	l
LASF106	arch/arm/lib/asm-offsets.s	/^.LASF106:$/;"	l
LASF106	lib/asm-offsets.s	/^.LASF106:$/;"	l
LASF107	arch/arm/lib/asm-offsets.s	/^.LASF107:$/;"	l
LASF107	lib/asm-offsets.s	/^.LASF107:$/;"	l
LASF108	arch/arm/lib/asm-offsets.s	/^.LASF108:$/;"	l
LASF108	lib/asm-offsets.s	/^.LASF108:$/;"	l
LASF109	arch/arm/lib/asm-offsets.s	/^.LASF109:$/;"	l
LASF109	lib/asm-offsets.s	/^.LASF109:$/;"	l
LASF11	arch/arm/lib/asm-offsets.s	/^.LASF11:$/;"	l
LASF11	lib/asm-offsets.s	/^.LASF11:$/;"	l
LASF110	arch/arm/lib/asm-offsets.s	/^.LASF110:$/;"	l
LASF110	lib/asm-offsets.s	/^.LASF110:$/;"	l
LASF111	arch/arm/lib/asm-offsets.s	/^.LASF111:$/;"	l
LASF111	lib/asm-offsets.s	/^.LASF111:$/;"	l
LASF112	arch/arm/lib/asm-offsets.s	/^.LASF112:$/;"	l
LASF112	lib/asm-offsets.s	/^.LASF112:$/;"	l
LASF113	arch/arm/lib/asm-offsets.s	/^.LASF113:$/;"	l
LASF113	lib/asm-offsets.s	/^.LASF113:$/;"	l
LASF114	arch/arm/lib/asm-offsets.s	/^.LASF114:$/;"	l
LASF114	lib/asm-offsets.s	/^.LASF114:$/;"	l
LASF115	arch/arm/lib/asm-offsets.s	/^.LASF115:$/;"	l
LASF115	lib/asm-offsets.s	/^.LASF115:$/;"	l
LASF116	arch/arm/lib/asm-offsets.s	/^.LASF116:$/;"	l
LASF116	lib/asm-offsets.s	/^.LASF116:$/;"	l
LASF117	arch/arm/lib/asm-offsets.s	/^.LASF117:$/;"	l
LASF117	lib/asm-offsets.s	/^.LASF117:$/;"	l
LASF118	arch/arm/lib/asm-offsets.s	/^.LASF118:$/;"	l
LASF118	lib/asm-offsets.s	/^.LASF118:$/;"	l
LASF119	arch/arm/lib/asm-offsets.s	/^.LASF119:$/;"	l
LASF119	lib/asm-offsets.s	/^.LASF119:$/;"	l
LASF12	arch/arm/lib/asm-offsets.s	/^.LASF12:$/;"	l
LASF12	lib/asm-offsets.s	/^.LASF12:$/;"	l
LASF120	arch/arm/lib/asm-offsets.s	/^.LASF120:$/;"	l
LASF120	lib/asm-offsets.s	/^.LASF120:$/;"	l
LASF121	arch/arm/lib/asm-offsets.s	/^.LASF121:$/;"	l
LASF121	lib/asm-offsets.s	/^.LASF121:$/;"	l
LASF122	arch/arm/lib/asm-offsets.s	/^.LASF122:$/;"	l
LASF122	lib/asm-offsets.s	/^.LASF122:$/;"	l
LASF123	arch/arm/lib/asm-offsets.s	/^.LASF123:$/;"	l
LASF123	lib/asm-offsets.s	/^.LASF123:$/;"	l
LASF124	arch/arm/lib/asm-offsets.s	/^.LASF124:$/;"	l
LASF124	lib/asm-offsets.s	/^.LASF124:$/;"	l
LASF125	arch/arm/lib/asm-offsets.s	/^.LASF125:$/;"	l
LASF125	lib/asm-offsets.s	/^.LASF125:$/;"	l
LASF126	arch/arm/lib/asm-offsets.s	/^.LASF126:$/;"	l
LASF126	lib/asm-offsets.s	/^.LASF126:$/;"	l
LASF127	arch/arm/lib/asm-offsets.s	/^.LASF127:$/;"	l
LASF127	lib/asm-offsets.s	/^.LASF127:$/;"	l
LASF128	arch/arm/lib/asm-offsets.s	/^.LASF128:$/;"	l
LASF128	lib/asm-offsets.s	/^.LASF128:$/;"	l
LASF129	arch/arm/lib/asm-offsets.s	/^.LASF129:$/;"	l
LASF129	lib/asm-offsets.s	/^.LASF129:$/;"	l
LASF13	arch/arm/lib/asm-offsets.s	/^.LASF13:$/;"	l
LASF13	lib/asm-offsets.s	/^.LASF13:$/;"	l
LASF130	arch/arm/lib/asm-offsets.s	/^.LASF130:$/;"	l
LASF130	lib/asm-offsets.s	/^.LASF130:$/;"	l
LASF131	arch/arm/lib/asm-offsets.s	/^.LASF131:$/;"	l
LASF131	lib/asm-offsets.s	/^.LASF131:$/;"	l
LASF132	arch/arm/lib/asm-offsets.s	/^.LASF132:$/;"	l
LASF132	lib/asm-offsets.s	/^.LASF132:$/;"	l
LASF133	arch/arm/lib/asm-offsets.s	/^.LASF133:$/;"	l
LASF133	lib/asm-offsets.s	/^.LASF133:$/;"	l
LASF134	arch/arm/lib/asm-offsets.s	/^.LASF134:$/;"	l
LASF134	lib/asm-offsets.s	/^.LASF134:$/;"	l
LASF135	arch/arm/lib/asm-offsets.s	/^.LASF135:$/;"	l
LASF135	lib/asm-offsets.s	/^.LASF135:$/;"	l
LASF136	arch/arm/lib/asm-offsets.s	/^.LASF136:$/;"	l
LASF136	lib/asm-offsets.s	/^.LASF136:$/;"	l
LASF137	arch/arm/lib/asm-offsets.s	/^.LASF137:$/;"	l
LASF137	lib/asm-offsets.s	/^.LASF137:$/;"	l
LASF138	arch/arm/lib/asm-offsets.s	/^.LASF138:$/;"	l
LASF138	lib/asm-offsets.s	/^.LASF138:$/;"	l
LASF139	arch/arm/lib/asm-offsets.s	/^.LASF139:$/;"	l
LASF139	lib/asm-offsets.s	/^.LASF139:$/;"	l
LASF14	arch/arm/lib/asm-offsets.s	/^.LASF14:$/;"	l
LASF14	lib/asm-offsets.s	/^.LASF14:$/;"	l
LASF140	arch/arm/lib/asm-offsets.s	/^.LASF140:$/;"	l
LASF140	lib/asm-offsets.s	/^.LASF140:$/;"	l
LASF141	arch/arm/lib/asm-offsets.s	/^.LASF141:$/;"	l
LASF141	lib/asm-offsets.s	/^.LASF141:$/;"	l
LASF142	arch/arm/lib/asm-offsets.s	/^.LASF142:$/;"	l
LASF142	lib/asm-offsets.s	/^.LASF142:$/;"	l
LASF143	arch/arm/lib/asm-offsets.s	/^.LASF143:$/;"	l
LASF143	lib/asm-offsets.s	/^.LASF143:$/;"	l
LASF144	arch/arm/lib/asm-offsets.s	/^.LASF144:$/;"	l
LASF144	lib/asm-offsets.s	/^.LASF144:$/;"	l
LASF145	arch/arm/lib/asm-offsets.s	/^.LASF145:$/;"	l
LASF145	lib/asm-offsets.s	/^.LASF145:$/;"	l
LASF146	arch/arm/lib/asm-offsets.s	/^.LASF146:$/;"	l
LASF146	lib/asm-offsets.s	/^.LASF146:$/;"	l
LASF147	arch/arm/lib/asm-offsets.s	/^.LASF147:$/;"	l
LASF147	lib/asm-offsets.s	/^.LASF147:$/;"	l
LASF148	arch/arm/lib/asm-offsets.s	/^.LASF148:$/;"	l
LASF148	lib/asm-offsets.s	/^.LASF148:$/;"	l
LASF149	arch/arm/lib/asm-offsets.s	/^.LASF149:$/;"	l
LASF149	lib/asm-offsets.s	/^.LASF149:$/;"	l
LASF15	arch/arm/lib/asm-offsets.s	/^.LASF15:$/;"	l
LASF15	lib/asm-offsets.s	/^.LASF15:$/;"	l
LASF150	arch/arm/lib/asm-offsets.s	/^.LASF150:$/;"	l
LASF150	lib/asm-offsets.s	/^.LASF150:$/;"	l
LASF151	arch/arm/lib/asm-offsets.s	/^.LASF151:$/;"	l
LASF151	lib/asm-offsets.s	/^.LASF151:$/;"	l
LASF152	arch/arm/lib/asm-offsets.s	/^.LASF152:$/;"	l
LASF152	lib/asm-offsets.s	/^.LASF152:$/;"	l
LASF153	arch/arm/lib/asm-offsets.s	/^.LASF153:$/;"	l
LASF153	lib/asm-offsets.s	/^.LASF153:$/;"	l
LASF154	arch/arm/lib/asm-offsets.s	/^.LASF154:$/;"	l
LASF154	lib/asm-offsets.s	/^.LASF154:$/;"	l
LASF155	arch/arm/lib/asm-offsets.s	/^.LASF155:$/;"	l
LASF155	lib/asm-offsets.s	/^.LASF155:$/;"	l
LASF156	arch/arm/lib/asm-offsets.s	/^.LASF156:$/;"	l
LASF156	lib/asm-offsets.s	/^.LASF156:$/;"	l
LASF157	arch/arm/lib/asm-offsets.s	/^.LASF157:$/;"	l
LASF157	lib/asm-offsets.s	/^.LASF157:$/;"	l
LASF158	arch/arm/lib/asm-offsets.s	/^.LASF158:$/;"	l
LASF158	lib/asm-offsets.s	/^.LASF158:$/;"	l
LASF159	arch/arm/lib/asm-offsets.s	/^.LASF159:$/;"	l
LASF159	lib/asm-offsets.s	/^.LASF159:$/;"	l
LASF16	arch/arm/lib/asm-offsets.s	/^.LASF16:$/;"	l
LASF16	lib/asm-offsets.s	/^.LASF16:$/;"	l
LASF160	arch/arm/lib/asm-offsets.s	/^.LASF160:$/;"	l
LASF160	lib/asm-offsets.s	/^.LASF160:$/;"	l
LASF161	arch/arm/lib/asm-offsets.s	/^.LASF161:$/;"	l
LASF161	lib/asm-offsets.s	/^.LASF161:$/;"	l
LASF162	arch/arm/lib/asm-offsets.s	/^.LASF162:$/;"	l
LASF162	lib/asm-offsets.s	/^.LASF162:$/;"	l
LASF17	arch/arm/lib/asm-offsets.s	/^.LASF17:$/;"	l
LASF17	lib/asm-offsets.s	/^.LASF17:$/;"	l
LASF18	arch/arm/lib/asm-offsets.s	/^.LASF18:$/;"	l
LASF18	lib/asm-offsets.s	/^.LASF18:$/;"	l
LASF19	arch/arm/lib/asm-offsets.s	/^.LASF19:$/;"	l
LASF19	lib/asm-offsets.s	/^.LASF19:$/;"	l
LASF2	arch/arm/lib/asm-offsets.s	/^.LASF2:$/;"	l
LASF2	lib/asm-offsets.s	/^.LASF2:$/;"	l
LASF20	arch/arm/lib/asm-offsets.s	/^.LASF20:$/;"	l
LASF20	lib/asm-offsets.s	/^.LASF20:$/;"	l
LASF21	arch/arm/lib/asm-offsets.s	/^.LASF21:$/;"	l
LASF21	lib/asm-offsets.s	/^.LASF21:$/;"	l
LASF22	arch/arm/lib/asm-offsets.s	/^.LASF22:$/;"	l
LASF22	lib/asm-offsets.s	/^.LASF22:$/;"	l
LASF23	arch/arm/lib/asm-offsets.s	/^.LASF23:$/;"	l
LASF23	lib/asm-offsets.s	/^.LASF23:$/;"	l
LASF24	arch/arm/lib/asm-offsets.s	/^.LASF24:$/;"	l
LASF24	lib/asm-offsets.s	/^.LASF24:$/;"	l
LASF25	arch/arm/lib/asm-offsets.s	/^.LASF25:$/;"	l
LASF25	lib/asm-offsets.s	/^.LASF25:$/;"	l
LASF26	arch/arm/lib/asm-offsets.s	/^.LASF26:$/;"	l
LASF26	lib/asm-offsets.s	/^.LASF26:$/;"	l
LASF27	arch/arm/lib/asm-offsets.s	/^.LASF27:$/;"	l
LASF27	lib/asm-offsets.s	/^.LASF27:$/;"	l
LASF28	arch/arm/lib/asm-offsets.s	/^.LASF28:$/;"	l
LASF28	lib/asm-offsets.s	/^.LASF28:$/;"	l
LASF29	arch/arm/lib/asm-offsets.s	/^.LASF29:$/;"	l
LASF29	lib/asm-offsets.s	/^.LASF29:$/;"	l
LASF3	arch/arm/lib/asm-offsets.s	/^.LASF3:$/;"	l
LASF3	lib/asm-offsets.s	/^.LASF3:$/;"	l
LASF30	arch/arm/lib/asm-offsets.s	/^.LASF30:$/;"	l
LASF30	lib/asm-offsets.s	/^.LASF30:$/;"	l
LASF31	arch/arm/lib/asm-offsets.s	/^.LASF31:$/;"	l
LASF31	lib/asm-offsets.s	/^.LASF31:$/;"	l
LASF32	arch/arm/lib/asm-offsets.s	/^.LASF32:$/;"	l
LASF32	lib/asm-offsets.s	/^.LASF32:$/;"	l
LASF33	arch/arm/lib/asm-offsets.s	/^.LASF33:$/;"	l
LASF33	lib/asm-offsets.s	/^.LASF33:$/;"	l
LASF34	arch/arm/lib/asm-offsets.s	/^.LASF34:$/;"	l
LASF34	lib/asm-offsets.s	/^.LASF34:$/;"	l
LASF35	arch/arm/lib/asm-offsets.s	/^.LASF35:$/;"	l
LASF35	lib/asm-offsets.s	/^.LASF35:$/;"	l
LASF36	arch/arm/lib/asm-offsets.s	/^.LASF36:$/;"	l
LASF36	lib/asm-offsets.s	/^.LASF36:$/;"	l
LASF37	arch/arm/lib/asm-offsets.s	/^.LASF37:$/;"	l
LASF37	lib/asm-offsets.s	/^.LASF37:$/;"	l
LASF38	arch/arm/lib/asm-offsets.s	/^.LASF38:$/;"	l
LASF38	lib/asm-offsets.s	/^.LASF38:$/;"	l
LASF39	arch/arm/lib/asm-offsets.s	/^.LASF39:$/;"	l
LASF39	lib/asm-offsets.s	/^.LASF39:$/;"	l
LASF4	arch/arm/lib/asm-offsets.s	/^.LASF4:$/;"	l
LASF4	lib/asm-offsets.s	/^.LASF4:$/;"	l
LASF40	arch/arm/lib/asm-offsets.s	/^.LASF40:$/;"	l
LASF40	lib/asm-offsets.s	/^.LASF40:$/;"	l
LASF41	arch/arm/lib/asm-offsets.s	/^.LASF41:$/;"	l
LASF41	lib/asm-offsets.s	/^.LASF41:$/;"	l
LASF42	arch/arm/lib/asm-offsets.s	/^.LASF42:$/;"	l
LASF42	lib/asm-offsets.s	/^.LASF42:$/;"	l
LASF43	arch/arm/lib/asm-offsets.s	/^.LASF43:$/;"	l
LASF43	lib/asm-offsets.s	/^.LASF43:$/;"	l
LASF44	arch/arm/lib/asm-offsets.s	/^.LASF44:$/;"	l
LASF44	lib/asm-offsets.s	/^.LASF44:$/;"	l
LASF45	arch/arm/lib/asm-offsets.s	/^.LASF45:$/;"	l
LASF45	lib/asm-offsets.s	/^.LASF45:$/;"	l
LASF46	arch/arm/lib/asm-offsets.s	/^.LASF46:$/;"	l
LASF46	lib/asm-offsets.s	/^.LASF46:$/;"	l
LASF47	arch/arm/lib/asm-offsets.s	/^.LASF47:$/;"	l
LASF47	lib/asm-offsets.s	/^.LASF47:$/;"	l
LASF48	arch/arm/lib/asm-offsets.s	/^.LASF48:$/;"	l
LASF48	lib/asm-offsets.s	/^.LASF48:$/;"	l
LASF49	arch/arm/lib/asm-offsets.s	/^.LASF49:$/;"	l
LASF49	lib/asm-offsets.s	/^.LASF49:$/;"	l
LASF5	arch/arm/lib/asm-offsets.s	/^.LASF5:$/;"	l
LASF5	lib/asm-offsets.s	/^.LASF5:$/;"	l
LASF50	arch/arm/lib/asm-offsets.s	/^.LASF50:$/;"	l
LASF50	lib/asm-offsets.s	/^.LASF50:$/;"	l
LASF51	arch/arm/lib/asm-offsets.s	/^.LASF51:$/;"	l
LASF51	lib/asm-offsets.s	/^.LASF51:$/;"	l
LASF52	arch/arm/lib/asm-offsets.s	/^.LASF52:$/;"	l
LASF52	lib/asm-offsets.s	/^.LASF52:$/;"	l
LASF53	arch/arm/lib/asm-offsets.s	/^.LASF53:$/;"	l
LASF53	lib/asm-offsets.s	/^.LASF53:$/;"	l
LASF54	arch/arm/lib/asm-offsets.s	/^.LASF54:$/;"	l
LASF54	lib/asm-offsets.s	/^.LASF54:$/;"	l
LASF55	arch/arm/lib/asm-offsets.s	/^.LASF55:$/;"	l
LASF55	lib/asm-offsets.s	/^.LASF55:$/;"	l
LASF56	arch/arm/lib/asm-offsets.s	/^.LASF56:$/;"	l
LASF56	lib/asm-offsets.s	/^.LASF56:$/;"	l
LASF57	arch/arm/lib/asm-offsets.s	/^.LASF57:$/;"	l
LASF57	lib/asm-offsets.s	/^.LASF57:$/;"	l
LASF58	arch/arm/lib/asm-offsets.s	/^.LASF58:$/;"	l
LASF58	lib/asm-offsets.s	/^.LASF58:$/;"	l
LASF59	arch/arm/lib/asm-offsets.s	/^.LASF59:$/;"	l
LASF59	lib/asm-offsets.s	/^.LASF59:$/;"	l
LASF6	arch/arm/lib/asm-offsets.s	/^.LASF6:$/;"	l
LASF6	lib/asm-offsets.s	/^.LASF6:$/;"	l
LASF60	arch/arm/lib/asm-offsets.s	/^.LASF60:$/;"	l
LASF60	lib/asm-offsets.s	/^.LASF60:$/;"	l
LASF61	arch/arm/lib/asm-offsets.s	/^.LASF61:$/;"	l
LASF61	lib/asm-offsets.s	/^.LASF61:$/;"	l
LASF62	arch/arm/lib/asm-offsets.s	/^.LASF62:$/;"	l
LASF62	lib/asm-offsets.s	/^.LASF62:$/;"	l
LASF63	arch/arm/lib/asm-offsets.s	/^.LASF63:$/;"	l
LASF63	lib/asm-offsets.s	/^.LASF63:$/;"	l
LASF64	arch/arm/lib/asm-offsets.s	/^.LASF64:$/;"	l
LASF64	lib/asm-offsets.s	/^.LASF64:$/;"	l
LASF65	arch/arm/lib/asm-offsets.s	/^.LASF65:$/;"	l
LASF65	lib/asm-offsets.s	/^.LASF65:$/;"	l
LASF66	arch/arm/lib/asm-offsets.s	/^.LASF66:$/;"	l
LASF66	lib/asm-offsets.s	/^.LASF66:$/;"	l
LASF67	arch/arm/lib/asm-offsets.s	/^.LASF67:$/;"	l
LASF67	lib/asm-offsets.s	/^.LASF67:$/;"	l
LASF68	arch/arm/lib/asm-offsets.s	/^.LASF68:$/;"	l
LASF68	lib/asm-offsets.s	/^.LASF68:$/;"	l
LASF69	arch/arm/lib/asm-offsets.s	/^.LASF69:$/;"	l
LASF69	lib/asm-offsets.s	/^.LASF69:$/;"	l
LASF7	arch/arm/lib/asm-offsets.s	/^.LASF7:$/;"	l
LASF7	lib/asm-offsets.s	/^.LASF7:$/;"	l
LASF70	arch/arm/lib/asm-offsets.s	/^.LASF70:$/;"	l
LASF70	lib/asm-offsets.s	/^.LASF70:$/;"	l
LASF71	arch/arm/lib/asm-offsets.s	/^.LASF71:$/;"	l
LASF71	lib/asm-offsets.s	/^.LASF71:$/;"	l
LASF72	arch/arm/lib/asm-offsets.s	/^.LASF72:$/;"	l
LASF72	lib/asm-offsets.s	/^.LASF72:$/;"	l
LASF73	arch/arm/lib/asm-offsets.s	/^.LASF73:$/;"	l
LASF73	lib/asm-offsets.s	/^.LASF73:$/;"	l
LASF74	arch/arm/lib/asm-offsets.s	/^.LASF74:$/;"	l
LASF74	lib/asm-offsets.s	/^.LASF74:$/;"	l
LASF75	arch/arm/lib/asm-offsets.s	/^.LASF75:$/;"	l
LASF75	lib/asm-offsets.s	/^.LASF75:$/;"	l
LASF76	arch/arm/lib/asm-offsets.s	/^.LASF76:$/;"	l
LASF76	lib/asm-offsets.s	/^.LASF76:$/;"	l
LASF77	arch/arm/lib/asm-offsets.s	/^.LASF77:$/;"	l
LASF77	lib/asm-offsets.s	/^.LASF77:$/;"	l
LASF78	arch/arm/lib/asm-offsets.s	/^.LASF78:$/;"	l
LASF78	lib/asm-offsets.s	/^.LASF78:$/;"	l
LASF79	arch/arm/lib/asm-offsets.s	/^.LASF79:$/;"	l
LASF79	lib/asm-offsets.s	/^.LASF79:$/;"	l
LASF8	arch/arm/lib/asm-offsets.s	/^.LASF8:$/;"	l
LASF8	lib/asm-offsets.s	/^.LASF8:$/;"	l
LASF80	arch/arm/lib/asm-offsets.s	/^.LASF80:$/;"	l
LASF80	lib/asm-offsets.s	/^.LASF80:$/;"	l
LASF81	arch/arm/lib/asm-offsets.s	/^.LASF81:$/;"	l
LASF81	lib/asm-offsets.s	/^.LASF81:$/;"	l
LASF82	arch/arm/lib/asm-offsets.s	/^.LASF82:$/;"	l
LASF82	lib/asm-offsets.s	/^.LASF82:$/;"	l
LASF83	arch/arm/lib/asm-offsets.s	/^.LASF83:$/;"	l
LASF83	lib/asm-offsets.s	/^.LASF83:$/;"	l
LASF84	arch/arm/lib/asm-offsets.s	/^.LASF84:$/;"	l
LASF84	lib/asm-offsets.s	/^.LASF84:$/;"	l
LASF85	arch/arm/lib/asm-offsets.s	/^.LASF85:$/;"	l
LASF85	lib/asm-offsets.s	/^.LASF85:$/;"	l
LASF86	arch/arm/lib/asm-offsets.s	/^.LASF86:$/;"	l
LASF86	lib/asm-offsets.s	/^.LASF86:$/;"	l
LASF87	arch/arm/lib/asm-offsets.s	/^.LASF87:$/;"	l
LASF87	lib/asm-offsets.s	/^.LASF87:$/;"	l
LASF88	arch/arm/lib/asm-offsets.s	/^.LASF88:$/;"	l
LASF88	lib/asm-offsets.s	/^.LASF88:$/;"	l
LASF89	arch/arm/lib/asm-offsets.s	/^.LASF89:$/;"	l
LASF89	lib/asm-offsets.s	/^.LASF89:$/;"	l
LASF9	arch/arm/lib/asm-offsets.s	/^.LASF9:$/;"	l
LASF9	lib/asm-offsets.s	/^.LASF9:$/;"	l
LASF90	arch/arm/lib/asm-offsets.s	/^.LASF90:$/;"	l
LASF90	lib/asm-offsets.s	/^.LASF90:$/;"	l
LASF91	arch/arm/lib/asm-offsets.s	/^.LASF91:$/;"	l
LASF91	lib/asm-offsets.s	/^.LASF91:$/;"	l
LASF92	arch/arm/lib/asm-offsets.s	/^.LASF92:$/;"	l
LASF92	lib/asm-offsets.s	/^.LASF92:$/;"	l
LASF93	arch/arm/lib/asm-offsets.s	/^.LASF93:$/;"	l
LASF93	lib/asm-offsets.s	/^.LASF93:$/;"	l
LASF94	arch/arm/lib/asm-offsets.s	/^.LASF94:$/;"	l
LASF94	lib/asm-offsets.s	/^.LASF94:$/;"	l
LASF95	arch/arm/lib/asm-offsets.s	/^.LASF95:$/;"	l
LASF95	lib/asm-offsets.s	/^.LASF95:$/;"	l
LASF96	arch/arm/lib/asm-offsets.s	/^.LASF96:$/;"	l
LASF96	lib/asm-offsets.s	/^.LASF96:$/;"	l
LASF97	arch/arm/lib/asm-offsets.s	/^.LASF97:$/;"	l
LASF97	lib/asm-offsets.s	/^.LASF97:$/;"	l
LASF98	arch/arm/lib/asm-offsets.s	/^.LASF98:$/;"	l
LASF98	lib/asm-offsets.s	/^.LASF98:$/;"	l
LASF99	arch/arm/lib/asm-offsets.s	/^.LASF99:$/;"	l
LASF99	lib/asm-offsets.s	/^.LASF99:$/;"	l
LASTLITERALS	lib/lz4.c	/^#define LASTLITERALS /;"	d	file:
LAST_CTX	drivers/usb/host/xhci.h	/^#define LAST_CTX(/;"	d
LAST_CTX_MASK	drivers/usb/host/xhci.h	/^#define LAST_CTX_MASK	/;"	d
LAST_CTX_TO_EP_NUM	drivers/usb/host/xhci.h	/^#define LAST_CTX_TO_EP_NUM(/;"	d
LAST_EMAC_NUM	drivers/net/4xx_enet.c	/^#define LAST_EMAC_NUM	/;"	d	file:
LAST_EMAC_NUM	post/cpu/ppc4xx/ether.c	/^#define LAST_EMAC_NUM	/;"	d	file:
LAST_EP_INDEX	drivers/usb/host/xhci.h	/^#define LAST_EP_INDEX	/;"	d
LAST_FREQ	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^	LAST_FREQ$/;"	e	enum:__anonb2845d370103
LAST_LONG_ENTRY_MASK	include/fat.h	/^#define LAST_LONG_ENTRY_MASK	/;"	d
LAST_PEX_USB_SEQ_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_PEX_USB_SEQ_TYPE$/;"	e	enum:__anon525929f50103
LAST_PEX_USB_SPEED_SEQ_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_PEX_USB_SPEED_SEQ_TYPE$/;"	e	enum:__anon525929f50203
LAST_PKTBUFSRX	drivers/net/fsl_mcdmafec.c	/^#define LAST_PKTBUFSRX	/;"	d	file:
LAST_PKTBUFSRX	drivers/net/mcffec.c	/^#define LAST_PKTBUFSRX	/;"	d	file:
LAST_QSGMII_SEQ_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_QSGMII_SEQ_TYPE$/;"	e	enum:__anon525929f50403
LAST_SATA_SGMII_SEQ_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_SATA_SGMII_SEQ_TYPE$/;"	e	enum:__anon525929f50303
LAST_SATA_SGMII_SPEED_SEQ_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_SATA_SGMII_SPEED_SEQ_TYPE$/;"	e	enum:__anon525929f50603
LAST_SERDES_SPEED	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_SERDES_SPEED$/;"	e	enum:serdes_speed
LAST_SERDES_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_SERDES_TYPE$/;"	e	enum:serdes_type
LAST_SYSCALL	include/ppc_defs.h	/^#define	LAST_SYSCALL	/;"	d
LAST_TRACK	cmd/fdc.c	/^#define LAST_TRACK	/;"	d	file:
LAST_XAUI_RXAUI_SEQ_TYPE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	LAST_XAUI_RXAUI_SEQ_TYPE$/;"	e	enum:__anon525929f50503
LATCH0_BASE	board/gdsys/405ep/dlvision-10g.c	/^#define LATCH0_BASE /;"	d	file:
LATCH0_BASE	board/gdsys/405ep/io.c	/^#define LATCH0_BASE /;"	d	file:
LATCH0_BASE	board/gdsys/405ep/iocon.c	/^#define LATCH0_BASE /;"	d	file:
LATCH0_BASE	board/gdsys/405ep/neo.c	/^#define LATCH0_BASE /;"	d	file:
LATCH0_BASE	board/gdsys/405ex/io64.c	/^#define LATCH0_BASE /;"	d	file:
LATCH1CTL	arch/x86/cpu/quark/smc.h	/^#define LATCH1CTL	/;"	d
LATCH1_BASE	board/gdsys/405ep/dlvision-10g.c	/^#define LATCH1_BASE /;"	d	file:
LATCH1_BASE	board/gdsys/405ep/io.c	/^#define LATCH1_BASE /;"	d	file:
LATCH1_BASE	board/gdsys/405ep/iocon.c	/^#define LATCH1_BASE /;"	d	file:
LATCH1_BASE	board/gdsys/405ep/neo.c	/^#define LATCH1_BASE /;"	d	file:
LATCH1_BASE	board/gdsys/405ex/io64.c	/^#define LATCH1_BASE /;"	d	file:
LATCH2_BASE	board/gdsys/405ep/dlvision-10g.c	/^#define LATCH2_BASE /;"	d	file:
LATCH2_BASE	board/gdsys/405ep/io.c	/^#define LATCH2_BASE /;"	d	file:
LATCH2_BASE	board/gdsys/405ep/iocon.c	/^#define LATCH2_BASE /;"	d	file:
LATCH2_BASE	board/gdsys/405ep/neo.c	/^#define LATCH2_BASE /;"	d	file:
LATCH2_BASE	board/gdsys/405ex/io64.c	/^#define LATCH2_BASE /;"	d	file:
LATCH2_MC2_PRESENT_N	board/gdsys/405ep/dlvision-10g.c	/^#define LATCH2_MC2_PRESENT_N /;"	d	file:
LATCH3_BASE	board/gdsys/405ep/dlvision-10g.c	/^#define LATCH3_BASE /;"	d	file:
LATCH3_BASE	board/gdsys/405ex/io64.c	/^#define LATCH3_BASE /;"	d	file:
LATENCY	include/radeon.h	/^#define LATENCY	/;"	d
LATE_DB	arch/x86/cpu/quark/smc.h	/^#define LATE_DB	/;"	d
LATTICE	include/lattice.h	/^#define LATTICE	/;"	d
LAT_16X	include/radeon.h	/^#define LAT_16X	/;"	d
LAWAR_ADDR	arch/powerpc/cpu/mpc8xxx/law.c	/^#define LAWAR_ADDR(/;"	d	file:
LAWAR_EN	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_EN	/;"	d
LAWAR_SIZE	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE	/;"	d
LAWAR_SIZE_128K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_128K	/;"	d
LAWAR_SIZE_128M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_128M	/;"	d
LAWAR_SIZE_16G	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_16G	/;"	d
LAWAR_SIZE_16K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_16K	/;"	d
LAWAR_SIZE_16M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_16M	/;"	d
LAWAR_SIZE_1G	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_1G	/;"	d
LAWAR_SIZE_1M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_1M	/;"	d
LAWAR_SIZE_256K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_256K	/;"	d
LAWAR_SIZE_256M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_256M	/;"	d
LAWAR_SIZE_2G	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_2G	/;"	d
LAWAR_SIZE_2M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_2M	/;"	d
LAWAR_SIZE_32G	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_32G	/;"	d
LAWAR_SIZE_32K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_32K	/;"	d
LAWAR_SIZE_32M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_32M	/;"	d
LAWAR_SIZE_4G	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_4G	/;"	d
LAWAR_SIZE_4K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_4K	/;"	d
LAWAR_SIZE_4M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_4M	/;"	d
LAWAR_SIZE_512K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_512K	/;"	d
LAWAR_SIZE_512M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_512M	/;"	d
LAWAR_SIZE_64K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_64K	/;"	d
LAWAR_SIZE_64M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_64M	/;"	d
LAWAR_SIZE_8G	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_8G	/;"	d
LAWAR_SIZE_8K	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_8K	/;"	d
LAWAR_SIZE_8M	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_8M	/;"	d
LAWAR_SIZE_BASE	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_SIZE_BASE	/;"	d
LAWAR_TRGT_IF_CCSR	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_CCSR	/;"	d
LAWAR_TRGT_IF_DDR	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_DDR	/;"	d
LAWAR_TRGT_IF_DDR1	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_DDR1	/;"	d
LAWAR_TRGT_IF_DDR2	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_DDR2	/;"	d
LAWAR_TRGT_IF_DDR_INTERLEAVED	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_DDR_INTERLEAVED /;"	d
LAWAR_TRGT_IF_LBC	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_LBC	/;"	d
LAWAR_TRGT_IF_PCI	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCI	/;"	d
LAWAR_TRGT_IF_PCI1	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCI1	/;"	d
LAWAR_TRGT_IF_PCI2	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCI2	/;"	d
LAWAR_TRGT_IF_PCIE1	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCIE1	/;"	d
LAWAR_TRGT_IF_PCIE2	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCIE2	/;"	d
LAWAR_TRGT_IF_PCIE3	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCIE3	/;"	d
LAWAR_TRGT_IF_PCIX	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_PCIX	/;"	d
LAWAR_TRGT_IF_RIO	arch/powerpc/include/asm/mmu.h	/^#define LAWAR_TRGT_IF_RIO	/;"	d
LAWBARH_ADDR	arch/powerpc/cpu/mpc8xxx/law.c	/^#define LAWBARH_ADDR(/;"	d	file:
LAWBARL_ADDR	arch/powerpc/cpu/mpc8xxx/law.c	/^#define LAWBARL_ADDR(/;"	d	file:
LAWBAR_ADDR	arch/powerpc/cpu/mpc8xxx/law.c	/^#define LAWBAR_ADDR(/;"	d	file:
LAWBAR_BAR	arch/powerpc/include/asm/immap_512x.h	/^#define LAWBAR_BAR	/;"	d
LAWBAR_BAR	include/mpc83xx.h	/^#define LAWBAR_BAR	/;"	d
LAWBAR_SHIFT	arch/powerpc/cpu/mpc8xxx/law.c	/^#define LAWBAR_SHIFT /;"	d	file:
LAW_BASE	arch/powerpc/cpu/mpc8xxx/law.c	/^#define LAW_BASE /;"	d	file:
LAW_EN	arch/powerpc/cpu/mpc85xx/start.S	/^#define LAW_EN	/;"	d	file:
LAW_EN	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_EN	/;"	d
LAW_SIZE_128K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_128K,$/;"	e	enum:law_size
LAW_SIZE_128M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_128M,$/;"	e	enum:law_size
LAW_SIZE_16G	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_16G,$/;"	e	enum:law_size
LAW_SIZE_16K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_16K,$/;"	e	enum:law_size
LAW_SIZE_16M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_16M,$/;"	e	enum:law_size
LAW_SIZE_1G	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_1G,$/;"	e	enum:law_size
LAW_SIZE_1M	arch/powerpc/cpu/mpc85xx/start.S	/^#define LAW_SIZE_1M	/;"	d	file:
LAW_SIZE_1M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_1M,$/;"	e	enum:law_size
LAW_SIZE_256K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_256K,$/;"	e	enum:law_size
LAW_SIZE_256M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_256M,$/;"	e	enum:law_size
LAW_SIZE_2G	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_2G,$/;"	e	enum:law_size
LAW_SIZE_2M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_2M,$/;"	e	enum:law_size
LAW_SIZE_32G	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_32G,$/;"	e	enum:law_size
LAW_SIZE_32K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_32K,$/;"	e	enum:law_size
LAW_SIZE_32M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_32M,$/;"	e	enum:law_size
LAW_SIZE_4G	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_4G,$/;"	e	enum:law_size
LAW_SIZE_4K	arch/powerpc/cpu/mpc85xx/start.S	/^#define LAW_SIZE_4K	/;"	d	file:
LAW_SIZE_4K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_4K = 0xb,$/;"	e	enum:law_size
LAW_SIZE_4M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_4M,$/;"	e	enum:law_size
LAW_SIZE_512K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_512K,$/;"	e	enum:law_size
LAW_SIZE_512M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_512M,$/;"	e	enum:law_size
LAW_SIZE_64K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_64K,$/;"	e	enum:law_size
LAW_SIZE_64M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_64M,$/;"	e	enum:law_size
LAW_SIZE_8G	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_8G,$/;"	e	enum:law_size
LAW_SIZE_8K	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_8K,$/;"	e	enum:law_size
LAW_SIZE_8M	arch/powerpc/include/asm/fsl_law.h	/^	LAW_SIZE_8M,$/;"	e	enum:law_size
LAW_TRGT_IF_BMAN	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_BMAN = 0x18,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_CCSR	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_CCSR = 0x08,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_CCSR	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_CCSR = 0x1e,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_CLASS_DSP	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_CLASS_DSP = 0x0d,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DCSR	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DCSR = 0x1d,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR = 0x0f,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_DDR	/;"	d
LAW_TRGT_IF_DDR_1	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_1 = 0x10,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_1	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_DDR_1	/;"	d
LAW_TRGT_IF_DDR_2	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_2 = 0x11,	\/* 2nd controller *\/$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_2	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_2 = 0x16,	\/* 2nd controller *\/$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_3	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_3 = 0x12,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_3	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_3,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_4	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_4 = 0x13,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_4	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_4,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTLV_123	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTLV_123 = 0x17,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTLV_123	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTLV_123,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTLV_1234	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTLV_1234 = 0x16,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTLV_1234	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTLV_1234,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTLV_34	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTLV_34 = 0x15,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTLV_34	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTLV_34,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTRLV	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTRLV = 0x0b,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DDR_INTRLV	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DDR_INTRLV = 0x14,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DPAA_SWP_SRAM	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DPAA_SWP_SRAM = 0x0e,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_DSP_CCSR	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_DSP_CCSR = 0x09,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_IFC	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_IFC	/;"	d
LAW_TRGT_IF_LBC	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_LBC = 0x04,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_LBC	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_LBC = 0x1f,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_MAPLE	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_MAPLE = 0x50,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_OCN_DSP	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_OCN_DSP = 0x03,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCI	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCI = 0x00,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCIE_1	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCIE_1 = 0x00,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCIE_1	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCIE_1 = 0x02,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCIE_1	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_PCIE_1	/;"	d
LAW_TRGT_IF_PCIE_2	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCIE_2 = 0x01,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCIE_2	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_PCIE_2	/;"	d
LAW_TRGT_IF_PCIE_3	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCIE_3 = 0x02,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCIE_3	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_PCIE_3	/;"	d
LAW_TRGT_IF_PCIE_4	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCIE_4 = 0x03,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PCIX	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_PCIX	/;"	d
LAW_TRGT_IF_PCI_1	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_PCI_1	/;"	d
LAW_TRGT_IF_PCI_2	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PCI_2 = 0x01,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_PLATFORM_SRAM	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_PLATFORM_SRAM = 0x0a,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_QMAN	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_QMAN = 0x3c,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_RIO	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_RIO = 0x0c,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_RIO_1	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_RIO_1 = 0x08,$/;"	e	enum:law_trgt_if
LAW_TRGT_IF_RIO_1	arch/powerpc/include/asm/fsl_law.h	/^#define LAW_TRGT_IF_RIO_1	/;"	d
LAW_TRGT_IF_RIO_2	arch/powerpc/include/asm/fsl_law.h	/^	LAW_TRGT_IF_RIO_2 = 0x09,$/;"	e	enum:law_trgt_if
LAYOUT_INVALID	board/compulab/common/eeprom.c	/^#define LAYOUT_INVALID	/;"	d	file:
LAYOUT_LEGACY	board/compulab/common/eeprom.c	/^#define LAYOUT_LEGACY	/;"	d	file:
LAYOUT_VERSION_AUTODETECT	include/eeprom_layout.h	/^#define LAYOUT_VERSION_AUTODETECT	/;"	d
LAYOUT_VERSION_LEGACY	board/compulab/common/eeprom.c	/^#define	LAYOUT_VERSION_LEGACY /;"	d	file:
LAYOUT_VERSION_UNRECOGNIZED	include/eeprom_layout.h	/^#define LAYOUT_VERSION_UNRECOGNIZED	/;"	d
LAYOUT_VERSION_VER1	board/compulab/common/eeprom.c	/^#define	LAYOUT_VERSION_VER1 /;"	d	file:
LAYOUT_VERSION_VER2	board/compulab/common/eeprom.c	/^#define	LAYOUT_VERSION_VER2 /;"	d	file:
LAYOUT_VERSION_VER3	board/compulab/common/eeprom.c	/^#define	LAYOUT_VERSION_VER3 /;"	d	file:
LA_A_BIT_MASK	drivers/misc/fsl_iim.c	/^#define LA_A_BIT_MASK	/;"	d	file:
LA_A_ROWL_MASK	drivers/misc/fsl_iim.c	/^#define LA_A_ROWL_MASK	/;"	d	file:
LB	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	LB	/;"	d
LBAF	include/blk.h	/^#define LBAF /;"	d
LBAFU	include/blk.h	/^#define LBAFU /;"	d
LBAFlength	include/blk.h	/^#define LBAFlength /;"	d
LBCR_BCTLC	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_BCTLC	/;"	d
LBCR_BCTLC_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_BCTLC_SHIFT	/;"	d
LBCR_BMT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_BMT	/;"	d
LBCR_BMTPS	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_BMTPS	/;"	d
LBCR_BMTPS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_BMTPS_SHIFT /;"	d
LBCR_BMT_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_BMT_SHIFT	/;"	d
LBCR_EPAR	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_EPAR	/;"	d
LBCR_EPAR_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_EPAR_SHIFT	/;"	d
LBCR_LDIS	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_LDIS	/;"	d
LBCR_LDIS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_LDIS_SHIFT	/;"	d
LBCR_LPBSE	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_LPBSE	/;"	d
LBCR_LPBSE_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBCR_LPBSE_SHIFT	/;"	d
LBC_BASE_ADDR	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBC_BASE_ADDR /;"	d
LBLAWAR0	include/mpc83xx.h	/^#define LBLAWAR0	/;"	d
LBLAWAR1	include/mpc83xx.h	/^#define LBLAWAR1	/;"	d
LBLAWAR2	include/mpc83xx.h	/^#define LBLAWAR2	/;"	d
LBLAWAR3	include/mpc83xx.h	/^#define LBLAWAR3	/;"	d
LBLAWAR_128KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_128KB	/;"	d
LBLAWAR_128MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_128MB	/;"	d
LBLAWAR_16KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_16KB	/;"	d
LBLAWAR_16MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_16MB	/;"	d
LBLAWAR_1GB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_1GB	/;"	d
LBLAWAR_1MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_1MB	/;"	d
LBLAWAR_256KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_256KB	/;"	d
LBLAWAR_256MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_256MB	/;"	d
LBLAWAR_2GB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_2GB	/;"	d
LBLAWAR_2MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_2MB	/;"	d
LBLAWAR_32KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_32KB	/;"	d
LBLAWAR_32MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_32MB	/;"	d
LBLAWAR_4KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_4KB	/;"	d
LBLAWAR_4MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_4MB	/;"	d
LBLAWAR_512KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_512KB	/;"	d
LBLAWAR_512MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_512MB	/;"	d
LBLAWAR_64KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_64KB	/;"	d
LBLAWAR_64MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_64MB	/;"	d
LBLAWAR_8KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_8KB	/;"	d
LBLAWAR_8MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_8MB	/;"	d
LBLAWAR_EN	arch/powerpc/include/asm/fsl_lbc.h	/^#define LBLAWAR_EN	/;"	d
LBLAWBAR0	include/mpc83xx.h	/^#define LBLAWBAR0	/;"	d
LBLAWBAR1	include/mpc83xx.h	/^#define LBLAWBAR1	/;"	d
LBLAWBAR2	include/mpc83xx.h	/^#define LBLAWBAR2	/;"	d
LBLAWBAR3	include/mpc83xx.h	/^#define LBLAWBAR3	/;"	d
LBSC_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define LBSC_BASE	/;"	d
LBSC_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define LBSC_BASE	/;"	d
LBSC_BASE	arch/sh/include/asm/cpu_sh7785.h	/^#define LBSC_BASE	/;"	d
LB_ACTL	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_ACTL	/;"	d
LB_BATTERY_LEVELS	include/ec_commands.h	/^#define LB_BATTERY_LEVELS /;"	d
LB_BC	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_BC	/;"	d
LB_BCE	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_BCE	/;"	d
LB_GBA	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_GBA	/;"	d
LB_GPE0BLK	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_GPE0BLK	/;"	d
LB_PABCDRC	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_PABCDRC	/;"	d
LB_PEFGHRC	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_PEFGHRC	/;"	d
LB_PM1BLK	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_PM1BLK	/;"	d
LB_RCBA	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_RCBA	/;"	d
LB_RGB_1280X8	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	LB_RGB_1280X8 = 0x5$/;"	e	enum:__anon3548bdad0103
LB_RGB_1920X5	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	LB_RGB_1920X5 = 0x4,$/;"	e	enum:__anon3548bdad0103
LB_RGB_2560X4	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	LB_RGB_2560X4 = 0x3,$/;"	e	enum:__anon3548bdad0103
LB_RGB_3840X2	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	LB_RGB_3840X2 = 0x2,$/;"	e	enum:__anon3548bdad0103
LB_WDTBA	arch/x86/include/asm/arch-quark/quark.h	/^#define LB_WDTBA	/;"	d
LB_YUV_2560X8	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	LB_YUV_2560X8 = 0x1,$/;"	e	enum:__anon3548bdad0103
LB_YUV_3840X5	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	LB_YUV_3840X5 = 0x0,$/;"	e	enum:__anon3548bdad0103
LC0	arch/blackfin/cpu/interrupt.S	/^	LC0 = R7;$/;"	d
LC1	arch/blackfin/cpu/interrupt.S	/^	LC1 = R7;$/;"	d
LCCR	drivers/net/sh_eth.h	/^	LCCR,$/;"	e	enum:__anon5ef54f5a0103
LCCR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0	/;"	d
LCCR0	include/SA-1100.h	/^#define LCCR0	/;"	d
LCCR0_4PixMono	include/SA-1100.h	/^#define LCCR0_4PixMono	/;"	d
LCCR0_8PixMono	include/SA-1100.h	/^#define LCCR0_8PixMono	/;"	d
LCCR0_Act	include/SA-1100.h	/^#define LCCR0_Act	/;"	d
LCCR0_BAM	include/SA-1100.h	/^#define LCCR0_BAM	/;"	d
LCCR0_BLE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_BLE	/;"	d
LCCR0_BLE	include/SA-1100.h	/^#define LCCR0_BLE	/;"	d
LCCR0_BM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_BM	/;"	d
LCCR0_BigEnd	include/SA-1100.h	/^#define LCCR0_BigEnd	/;"	d
LCCR0_CMDIM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_CMDIM	/;"	d
LCCR0_CMS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_CMS	/;"	d
LCCR0_CMS	include/SA-1100.h	/^#define LCCR0_CMS	/;"	d
LCCR0_Color	include/SA-1100.h	/^#define LCCR0_Color	/;"	d
LCCR0_DIS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_DIS	/;"	d
LCCR0_DMADel	include/SA-1100.h	/^#define LCCR0_DMADel(/;"	d
LCCR0_DPD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_DPD	/;"	d
LCCR0_DPD	include/SA-1100.h	/^#define LCCR0_DPD	/;"	d
LCCR0_Dual	include/SA-1100.h	/^#define LCCR0_Dual	/;"	d
LCCR0_EFM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_EFM	/;"	d
LCCR0_ENB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_ENB	/;"	d
LCCR0_ERM	include/SA-1100.h	/^#define LCCR0_ERM	/;"	d
LCCR0_IUM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_IUM	/;"	d
LCCR0_LCDT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_LCDT	/;"	d
LCCR0_LDDALT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_LDDALT	/;"	d
LCCR0_LDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_LDM	/;"	d
LCCR0_LDM	include/SA-1100.h	/^#define LCCR0_LDM	/;"	d
LCCR0_LEN	include/SA-1100.h	/^#define LCCR0_LEN	/;"	d
LCCR0_LtlEnd	include/SA-1100.h	/^#define LCCR0_LtlEnd	/;"	d
LCCR0_Mono	include/SA-1100.h	/^#define LCCR0_Mono	/;"	d
LCCR0_OUC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_OUC	/;"	d
LCCR0_OUM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_OUM	/;"	d
LCCR0_PAS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_PAS	/;"	d
LCCR0_PAS	include/SA-1100.h	/^#define LCCR0_PAS	/;"	d
LCCR0_PDD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_PDD	/;"	d
LCCR0_PDD	include/SA-1100.h	/^#define LCCR0_PDD	/;"	d
LCCR0_PDD_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_PDD_S	/;"	d
LCCR0_Pas	include/SA-1100.h	/^#define LCCR0_Pas	/;"	d
LCCR0_QDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_QDM	/;"	d
LCCR0_RDSTM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_RDSTM	/;"	d
LCCR0_SDS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_SDS	/;"	d
LCCR0_SDS	include/SA-1100.h	/^#define LCCR0_SDS	/;"	d
LCCR0_SFM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR0_SFM	/;"	d
LCCR0_Sngl	include/SA-1100.h	/^#define LCCR0_Sngl	/;"	d
LCCR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1	/;"	d
LCCR1	include/SA-1100.h	/^#define LCCR1	/;"	d
LCCR1_BLW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_BLW	/;"	d
LCCR1_BLW	include/SA-1100.h	/^#define LCCR1_BLW	/;"	d
LCCR1_BegLnDel	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_BegLnDel(/;"	d
LCCR1_BegLnDel	include/SA-1100.h	/^#define LCCR1_BegLnDel(/;"	d
LCCR1_DisWdth	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_DisWdth(/;"	d
LCCR1_DisWdth	include/SA-1100.h	/^#define LCCR1_DisWdth(/;"	d
LCCR1_ELW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_ELW	/;"	d
LCCR1_ELW	include/SA-1100.h	/^#define LCCR1_ELW	/;"	d
LCCR1_EndLnDel	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_EndLnDel(/;"	d
LCCR1_EndLnDel	include/SA-1100.h	/^#define LCCR1_EndLnDel(/;"	d
LCCR1_HSW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_HSW	/;"	d
LCCR1_HSW	include/SA-1100.h	/^#define LCCR1_HSW	/;"	d
LCCR1_HorSnchWdth	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_HorSnchWdth(/;"	d
LCCR1_HorSnchWdth	include/SA-1100.h	/^#define LCCR1_HorSnchWdth(/;"	d
LCCR1_PPL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR1_PPL	/;"	d
LCCR1_PPL	include/SA-1100.h	/^#define LCCR1_PPL	/;"	d
LCCR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2	/;"	d
LCCR2	include/SA-1100.h	/^#define LCCR2	/;"	d
LCCR2_BFW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_BFW	/;"	d
LCCR2_BFW	include/SA-1100.h	/^#define LCCR2_BFW	/;"	d
LCCR2_BegFrmDel	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_BegFrmDel(/;"	d
LCCR2_BegFrmDel	include/SA-1100.h	/^#define LCCR2_BegFrmDel(/;"	d
LCCR2_DisHght	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_DisHght(/;"	d
LCCR2_DisHght	include/SA-1100.h	/^#define LCCR2_DisHght(/;"	d
LCCR2_EFW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_EFW	/;"	d
LCCR2_EFW	include/SA-1100.h	/^#define LCCR2_EFW	/;"	d
LCCR2_EndFrmDel	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_EndFrmDel(/;"	d
LCCR2_EndFrmDel	include/SA-1100.h	/^#define LCCR2_EndFrmDel(/;"	d
LCCR2_LPP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_LPP	/;"	d
LCCR2_LPP	include/SA-1100.h	/^#define LCCR2_LPP	/;"	d
LCCR2_VSW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_VSW	/;"	d
LCCR2_VSW	include/SA-1100.h	/^#define LCCR2_VSW	/;"	d
LCCR2_VrtSnchWdth	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR2_VrtSnchWdth(/;"	d
LCCR2_VrtSnchWdth	include/SA-1100.h	/^#define LCCR2_VrtSnchWdth(/;"	d
LCCR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3	/;"	d
LCCR3	include/SA-1100.h	/^#define LCCR3	/;"	d
LCCR3_ACB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_ACB	/;"	d
LCCR3_ACB	include/SA-1100.h	/^#define LCCR3_ACB	/;"	d
LCCR3_ACBsCnt	include/SA-1100.h	/^#define LCCR3_ACBsCnt(/;"	d
LCCR3_ACBsCntOff	include/SA-1100.h	/^#define LCCR3_ACBsCntOff	/;"	d
LCCR3_ACBsDiv	include/SA-1100.h	/^#define LCCR3_ACBsDiv(/;"	d
LCCR3_API	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_API	/;"	d
LCCR3_API	include/SA-1100.h	/^#define LCCR3_API	/;"	d
LCCR3_API_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_API_S	/;"	d
LCCR3_Acb	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_Acb(/;"	d
LCCR3_BPP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_BPP	/;"	d
LCCR3_Bpp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_Bpp(/;"	d
LCCR3_CeilACBsDiv	include/SA-1100.h	/^#define LCCR3_CeilACBsDiv(/;"	d
LCCR3_CeilPixClkDiv	include/SA-1100.h	/^#define LCCR3_CeilPixClkDiv(/;"	d
LCCR3_DPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_DPC	/;"	d
LCCR3_HSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_HSP	/;"	d
LCCR3_HSP	include/SA-1100.h	/^#define LCCR3_HSP	/;"	d
LCCR3_HorSnchH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_HorSnchH	/;"	d
LCCR3_HorSnchH	include/SA-1100.h	/^#define LCCR3_HorSnchH	/;"	d
LCCR3_HorSnchL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_HorSnchL	/;"	d
LCCR3_HorSnchL	include/SA-1100.h	/^#define LCCR3_HorSnchL	/;"	d
LCCR3_OEP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_OEP	/;"	d
LCCR3_OEP	include/SA-1100.h	/^#define LCCR3_OEP	/;"	d
LCCR3_OutEnH	include/SA-1100.h	/^#define LCCR3_OutEnH	/;"	d
LCCR3_OutEnL	include/SA-1100.h	/^#define LCCR3_OutEnL	/;"	d
LCCR3_PCD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PCD	/;"	d
LCCR3_PCD	include/SA-1100.h	/^#define LCCR3_PCD	/;"	d
LCCR3_PCP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PCP	/;"	d
LCCR3_PCP	include/SA-1100.h	/^#define LCCR3_PCP	/;"	d
LCCR3_PDFOR_0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PDFOR_0	/;"	d
LCCR3_PDFOR_1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PDFOR_1	/;"	d
LCCR3_PDFOR_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PDFOR_2	/;"	d
LCCR3_PDFOR_3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PDFOR_3	/;"	d
LCCR3_PixClkDiv	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_PixClkDiv(/;"	d
LCCR3_PixClkDiv	include/SA-1100.h	/^#define LCCR3_PixClkDiv(/;"	d
LCCR3_PixFlEdg	include/SA-1100.h	/^#define LCCR3_PixFlEdg	/;"	d
LCCR3_PixRsEdg	include/SA-1100.h	/^#define LCCR3_PixRsEdg	/;"	d
LCCR3_VSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_VSP	/;"	d
LCCR3_VSP	include/SA-1100.h	/^#define LCCR3_VSP	/;"	d
LCCR3_VrtSnchH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_VrtSnchH	/;"	d
LCCR3_VrtSnchH	include/SA-1100.h	/^#define LCCR3_VrtSnchH	/;"	d
LCCR3_VrtSnchL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR3_VrtSnchL	/;"	d
LCCR3_VrtSnchL	include/SA-1100.h	/^#define LCCR3_VrtSnchL	/;"	d
LCCR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR4	/;"	d
LCCR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5	/;"	d
LCCR5_BSM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_BSM1	/;"	d
LCCR5_BSM2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_BSM2	/;"	d
LCCR5_BSM3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_BSM3	/;"	d
LCCR5_BSM4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_BSM4	/;"	d
LCCR5_BSM5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_BSM5	/;"	d
LCCR5_BSM6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_BSM6	/;"	d
LCCR5_EOFM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_EOFM1	/;"	d
LCCR5_EOFM2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_EOFM2	/;"	d
LCCR5_EOFM3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_EOFM3	/;"	d
LCCR5_EOFM4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_EOFM4	/;"	d
LCCR5_EOFM5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_EOFM5	/;"	d
LCCR5_EOFM6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_EOFM6	/;"	d
LCCR5_IUM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_IUM1	/;"	d
LCCR5_IUM2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_IUM2	/;"	d
LCCR5_IUM3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_IUM3	/;"	d
LCCR5_IUM4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_IUM4	/;"	d
LCCR5_IUM5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_IUM5	/;"	d
LCCR5_IUM6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_IUM6	/;"	d
LCCR5_SOFM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_SOFM1	/;"	d
LCCR5_SOFM2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_SOFM2	/;"	d
LCCR5_SOFM3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_SOFM3	/;"	d
LCCR5_SOFM4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_SOFM4	/;"	d
LCCR5_SOFM5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_SOFM5	/;"	d
LCCR5_SOFM6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCCR5_SOFM6	/;"	d
LCCR_BNUM	include/lcdvideo.h	/^#define LCCR_BNUM	/;"	d
LCCR_BNUM_BIT	include/lcdvideo.h	/^#define LCCR_BNUM_BIT	/;"	d
LCCR_BPIX	include/lcdvideo.h	/^#define LCCR_BPIX	/;"	d
LCCR_BPIX_BIT	include/lcdvideo.h	/^#define LCCR_BPIX_BIT	/;"	d
LCCR_CLKP	include/lcdvideo.h	/^#define LCCR_CLKP	/;"	d
LCCR_CLKP_BIT	include/lcdvideo.h	/^#define LCCR_CLKP_BIT	/;"	d
LCCR_CLOR	include/lcdvideo.h	/^#define LCCR_CLOR	/;"	d
LCCR_CLOR_BIT	include/lcdvideo.h	/^#define LCCR_CLOR_BIT	/;"	d
LCCR_DP	include/lcdvideo.h	/^#define LCCR_DP	/;"	d
LCCR_DP_BIT	include/lcdvideo.h	/^#define LCCR_DP_BIT	/;"	d
LCCR_EIEN	include/lcdvideo.h	/^#define LCCR_EIEN	/;"	d
LCCR_EIEN_BIT	include/lcdvideo.h	/^#define LCCR_EIEN_BIT	/;"	d
LCCR_HSP	include/lcdvideo.h	/^#define LCCR_HSP	/;"	d
LCCR_HSP_BIT	include/lcdvideo.h	/^#define LCCR_HSP_BIT	/;"	d
LCCR_IEN	include/lcdvideo.h	/^#define LCCR_IEN	/;"	d
LCCR_IEN_BIT	include/lcdvideo.h	/^#define LCCR_IEN_BIT	/;"	d
LCCR_IROL_BIT	include/lcdvideo.h	/^#define LCCR_IROL_BIT	/;"	d
LCCR_IRQL	include/lcdvideo.h	/^#define LCCR_IRQL	/;"	d
LCCR_LBW	include/lcdvideo.h	/^#define LCCR_LBW	/;"	d
LCCR_LBW_BIT	include/lcdvideo.h	/^#define LCCR_LBW_BIT	/;"	d
LCCR_OEP	include/lcdvideo.h	/^#define LCCR_OEP	/;"	d
LCCR_OEP_BIT	include/lcdvideo.h	/^#define LCCR_OEP_BIT	/;"	d
LCCR_PON	include/lcdvideo.h	/^#define LCCR_PON	/;"	d
LCCR_PON_BIT	include/lcdvideo.h	/^#define LCCR_PON_BIT	/;"	d
LCCR_SPLT	include/lcdvideo.h	/^#define LCCR_SPLT	/;"	d
LCCR_SPLT_BIT	include/lcdvideo.h	/^#define LCCR_SPLT_BIT	/;"	d
LCCR_TFT	include/lcdvideo.h	/^#define LCCR_TFT	/;"	d
LCCR_TFT_BIT	include/lcdvideo.h	/^#define LCCR_TFT_BIT	/;"	d
LCCR_VSP	include/lcdvideo.h	/^#define LCCR_VSP	/;"	d
LCCR_VSP_BIT	include/lcdvideo.h	/^#define LCCR_VSP_BIT	/;"	d
LCD	drivers/video/Kconfig	/^config LCD$/;"	c	menu:Graphics support
LCD0_CS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_CS_MARK,	LCD0_RS_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D0_MARK,	LCD0_D1_MARK,	LCD0_D2_MARK,	LCD0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D8_MARK,	LCD0_D9_MARK,	LCD0_D10_MARK,	LCD0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D8_MARK,	LCD0_D9_MARK,	LCD0_D10_MARK,	LCD0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D12_MARK,	LCD0_D13_MARK,	LCD0_D14_MARK,	LCD0_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D12_MARK,	LCD0_D13_MARK,	LCD0_D14_MARK,	LCD0_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D12_MARK,	LCD0_D13_MARK,	LCD0_D14_MARK,	LCD0_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D12_MARK,	LCD0_D13_MARK,	LCD0_D14_MARK,	LCD0_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D16_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D16_MARK,	LCD0_D17_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D17_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D16_MARK,	LCD0_D17_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D18_PORT163_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D19_PORT162_MARK,	LCD0_D18_PORT163_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D18_PORT40_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D18_PORT40_MARK,	LCD0_D22_PORT0_MARK, \/* MSEL5CR_6_0 *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_D19_PORT162_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D19_PORT162_MARK,	LCD0_D18_PORT163_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D19_PORT4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D20_PORT3_MARK,	LCD0_D19_PORT4_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D0_MARK,	LCD0_D1_MARK,	LCD0_D2_MARK,	LCD0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D20_PORT161_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D22_PORT160_MARK,	LCD0_D20_PORT161_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D20_PORT3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D20_PORT3_MARK,	LCD0_D19_PORT4_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D21_PORT158_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D21_PORT158_MARK,	LCD0_D23_PORT159_MARK, \/* MSEL5CR_6_1 *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_D21_PORT2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D23_PORT1_MARK,	LCD0_D21_PORT2_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D22_PORT0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D18_PORT40_MARK,	LCD0_D22_PORT0_MARK, \/* MSEL5CR_6_0 *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_D22_PORT160_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D22_PORT160_MARK,	LCD0_D20_PORT161_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D23_PORT159_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D21_PORT158_MARK,	LCD0_D23_PORT159_MARK, \/* MSEL5CR_6_1 *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_D23_PORT1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D23_PORT1_MARK,	LCD0_D21_PORT2_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D0_MARK,	LCD0_D1_MARK,	LCD0_D2_MARK,	LCD0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D0_MARK,	LCD0_D1_MARK,	LCD0_D2_MARK,	LCD0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D4_MARK,	LCD0_D5_MARK,	LCD0_D6_MARK,	LCD0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D4_MARK,	LCD0_D5_MARK,	LCD0_D6_MARK,	LCD0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D4_MARK,	LCD0_D5_MARK,	LCD0_D6_MARK,	LCD0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D4_MARK,	LCD0_D5_MARK,	LCD0_D6_MARK,	LCD0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D8_MARK,	LCD0_D9_MARK,	LCD0_D10_MARK,	LCD0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_D9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_D8_MARK,	LCD0_D9_MARK,	LCD0_D10_MARK,	LCD0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_DCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_DCK_MARK,	LCD0_VSYN_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_HSYN_MARK,	LCD0_DISP_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_DON_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_DON_MARK,	LCD0_VCPWC_MARK,	LCD0_VEPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_HSYN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_HSYN_MARK,	LCD0_DISP_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_LCLK_PORT102_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_LCLK_PORT102_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_LCLK_PORT165_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_LCLK_PORT165_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_RD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_WR_MARK,	LCD0_RD_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_RS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_CS_MARK,	LCD0_RS_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_VCPWC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_DON_MARK,	LCD0_VCPWC_MARK,	LCD0_VEPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_VEPWC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_DON_MARK,	LCD0_VCPWC_MARK,	LCD0_VEPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD0_VSYN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_DCK_MARK,	LCD0_VSYN_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD0_WR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD0_WR_MARK,	LCD0_RD_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_CS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_RS_MARK,	LCD1_CS_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D0_MARK,	LCD1_D1_MARK,	LCD1_D2_MARK,	LCD1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D8_MARK,	LCD1_D9_MARK,	LCD1_D10_MARK,	LCD1_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D8_MARK,	LCD1_D9_MARK,	LCD1_D10_MARK,	LCD1_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D12_MARK,	LCD1_D13_MARK,	LCD1_D14_MARK,	LCD1_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D12_MARK,	LCD1_D13_MARK,	LCD1_D14_MARK,	LCD1_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D12_MARK,	LCD1_D13_MARK,	LCD1_D14_MARK,	LCD1_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D12_MARK,	LCD1_D13_MARK,	LCD1_D14_MARK,	LCD1_D15_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D16_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D16_MARK,	LCD1_D17_MARK,	LCD1_D18_MARK,	LCD1_D19_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D17_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D16_MARK,	LCD1_D17_MARK,	LCD1_D18_MARK,	LCD1_D19_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D18_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D16_MARK,	LCD1_D17_MARK,	LCD1_D18_MARK,	LCD1_D19_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D19_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D16_MARK,	LCD1_D17_MARK,	LCD1_D18_MARK,	LCD1_D19_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D0_MARK,	LCD1_D1_MARK,	LCD1_D2_MARK,	LCD1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D20_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D20_MARK,	LCD1_D21_MARK,	LCD1_D22_MARK,	LCD1_D23_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D21_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D20_MARK,	LCD1_D21_MARK,	LCD1_D22_MARK,	LCD1_D23_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D20_MARK,	LCD1_D21_MARK,	LCD1_D22_MARK,	LCD1_D23_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D23_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D20_MARK,	LCD1_D21_MARK,	LCD1_D22_MARK,	LCD1_D23_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D0_MARK,	LCD1_D1_MARK,	LCD1_D2_MARK,	LCD1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D0_MARK,	LCD1_D1_MARK,	LCD1_D2_MARK,	LCD1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D4_MARK,	LCD1_D5_MARK,	LCD1_D6_MARK,	LCD1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D4_MARK,	LCD1_D5_MARK,	LCD1_D6_MARK,	LCD1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D4_MARK,	LCD1_D5_MARK,	LCD1_D6_MARK,	LCD1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D4_MARK,	LCD1_D5_MARK,	LCD1_D6_MARK,	LCD1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D8_MARK,	LCD1_D9_MARK,	LCD1_D10_MARK,	LCD1_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_D9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_D8_MARK,	LCD1_D9_MARK,	LCD1_D10_MARK,	LCD1_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_DCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_DCK_MARK,	LCD1_VSYN_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_DISP_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_HSYN_MARK,	LCD1_DISP_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_DON_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_DON_MARK,	LCD1_VCPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_HSYN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_HSYN_MARK,	LCD1_DISP_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_LCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_LCLK_MARK,	LCD1_VEPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_RD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_RD_MARK,	LCD1_WR_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_RS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_RS_MARK,	LCD1_CS_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_VCPWC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_DON_MARK,	LCD1_VCPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_VEPWC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_LCLK_MARK,	LCD1_VEPWC_MARK,$/;"	e	enum:__anona304c1340103	file:
LCD1_VSYN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_DCK_MARK,	LCD1_VSYN_MARK,	\/* for RGB *\/$/;"	e	enum:__anona304c1340103	file:
LCD1_WR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCD1_RD_MARK,	LCD1_WR_MARK,	\/* for SYS *\/$/;"	e	enum:__anona304c1340103	file:
LCD2D0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_VD_MARK, PORT128_LCD2VSYN_MARK, VIO2_VD_MARK, LCD2D0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D0_MARK, PORT130_MSIOF2_RXD_MARK, LCD2D10_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT131_KEYOUT11_MARK, LCD2D11_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D12_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT132_KEYOUT10_MARK, LCD2D12_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D13_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D3_MARK, MSIOF2_TSYNC_MARK, LCD2D13_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D14_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D4_MARK, MSIOF2_TXD_MARK, LCD2D14_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D15_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D5_MARK, MSIOF2_TSCK_MARK, LCD2D15_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D16_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D6_MARK, PORT136_KEYOUT8_MARK, LCD2D16_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D17_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D7_MARK, PORT137_KEYOUT9_MARK, LCD2D17_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D18_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCD2D18_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D19_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_FIELD_MARK, LCD2RD__MARK, VIO2_FIELD_MARK, LCD2D19_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_HD_MARK, LCD2D1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D20_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSCK_MARK, SCIFA2_RTS2__MARK, VIO2_CLK2_MARK, LCD2D20_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D21_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSYNC_MARK, MFG1_IN2_MARK, VIO2_VD2_MARK, LCD2D21_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D22_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_SS1_MARK, VIO2_FIELD2_MARK, LCD2D22_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D23_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_SS2_MARK, VIO2_HD2_MARK, LCD2D23_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D12_MARK, PORT142_KEYOUT10_MARK, VIO2_D4_MARK, LCD2D2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_D5_MARK, LCD2D3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D14_MARK, PORT144_KEYOUT7_MARK, VIO2_D6_MARK, LCD2D4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT145_LCD2RS_MARK, VIO2_D7_MARK, LCD2D5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D8_MARK, PORT138_KEYOUT8_MARK, VIO2_D0_MARK, LCD2D6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D9_MARK, PORT139_KEYOUT9_MARK, VIO2_D1_MARK, LCD2D7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D10_MARK, TPU0TO2_MARK, VIO2_D2_MARK, LCD2D8_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2D9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D11_MARK, TPU0TO3_MARK, VIO2_D3_MARK, LCD2D9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2DCK_2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF0L_TSCK_MARK, VIO2_CLK3_MARK, LCD2DCK_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD2DCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_CLK_MARK, LCD2DCK_MARK, PORT146_LCD2WR__MARK, VIO2_CLK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCD2RD__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_FIELD_MARK, LCD2RD__MARK, VIO2_FIELD_MARK, LCD2D19_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDBIT	include/lcdvideo.h	/^#define LCDBIT(/;"	d
LCDC0_SELECT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCDC0_SELECT_MARK,$/;"	e	enum:__anona304c1340103	file:
LCDC1_SELECT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	LCDC1_SELECT_MARK,$/;"	e	enum:__anona304c1340103	file:
LCDCS2__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDHSYN_MARK, LCDCS__MARK, LCDCS2__MARK, DACK3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDCS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDHSYN_MARK, LCDCS__MARK, LCDCS2__MARK, DACK3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDC_BASE	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define LCDC_BASE	/;"	d
LCDC_BASECFG0_BLEN_AHB_INCR16	include/atmel_hlcdc.h	/^#define LCDC_BASECFG0_BLEN_AHB_INCR16	/;"	d
LCDC_BASECFG0_BLEN_AHB_INCR4	include/atmel_hlcdc.h	/^#define LCDC_BASECFG0_BLEN_AHB_INCR4	/;"	d
LCDC_BASECFG0_BLEN_AHB_INCR8	include/atmel_hlcdc.h	/^#define LCDC_BASECFG0_BLEN_AHB_INCR8	/;"	d
LCDC_BASECFG0_BLEN_AHB_SINGLE	include/atmel_hlcdc.h	/^#define LCDC_BASECFG0_BLEN_AHB_SINGLE	/;"	d
LCDC_BASECFG0_BLEN_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECFG0_BLEN_Pos	/;"	d
LCDC_BASECFG0_DLBO	include/atmel_hlcdc.h	/^#define LCDC_BASECFG0_DLBO	/;"	d
LCDC_BASECFG1_RGBMODE_12BPP_RGB_444	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_12BPP_RGB_444	/;"	d
LCDC_BASECFG1_RGBMODE_16BPP_ARGB_4444	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_16BPP_ARGB_4444	/;"	d
LCDC_BASECFG1_RGBMODE_16BPP_RGBA_4444	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_16BPP_RGBA_4444	/;"	d
LCDC_BASECFG1_RGBMODE_16BPP_RGB_565	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_16BPP_RGB_565	/;"	d
LCDC_BASECFG1_RGBMODE_16BPP_TRGB_1555	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_16BPP_TRGB_1555	/;"	d
LCDC_BASECFG1_RGBMODE_18BPP_RGB_666	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_18BPP_RGB_666	/;"	d
LCDC_BASECFG1_RGBMODE_18BPP_RGB_666_PACKED	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_18BPP_RGB_666_PACKED	/;"	d
LCDC_BASECFG1_RGBMODE_19BPP_TRGB_1666	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_19BPP_TRGB_1666	/;"	d
LCDC_BASECFG1_RGBMODE_19BPP_TRGB_PACKED	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_19BPP_TRGB_PACKED	/;"	d
LCDC_BASECFG1_RGBMODE_24BPP_RGB_888	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_24BPP_RGB_888	/;"	d
LCDC_BASECFG1_RGBMODE_24BPP_RGB_888_PACKED	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_24BPP_RGB_888_PACKED	/;"	d
LCDC_BASECFG1_RGBMODE_25BPP_TRGB_1888	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_25BPP_TRGB_1888	/;"	d
LCDC_BASECFG1_RGBMODE_32BPP_ARGB_8888	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_32BPP_ARGB_8888	/;"	d
LCDC_BASECFG1_RGBMODE_32BPP_RGBA_8888	include/atmel_hlcdc.h	/^#define LCDC_BASECFG1_RGBMODE_32BPP_RGBA_8888	/;"	d
LCDC_BASECFG2_XSTRIDE	include/atmel_hlcdc.h	/^#define LCDC_BASECFG2_XSTRIDE(/;"	d
LCDC_BASECFG2_XSTRIDE_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECFG2_XSTRIDE_Msk /;"	d
LCDC_BASECFG2_XSTRIDE_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECFG2_XSTRIDE_Pos /;"	d
LCDC_BASECFG3_BDEF	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_BDEF(/;"	d
LCDC_BASECFG3_BDEF_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_BDEF_Msk	/;"	d
LCDC_BASECFG3_BDEF_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_BDEF_Pos	/;"	d
LCDC_BASECFG3_GDEF	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_GDEF(/;"	d
LCDC_BASECFG3_GDEF_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_GDEF_Msk	/;"	d
LCDC_BASECFG3_GDEF_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_GDEF_Pos	/;"	d
LCDC_BASECFG3_RDEF	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_RDEF(/;"	d
LCDC_BASECFG3_RDEF_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_RDEF_Msk	/;"	d
LCDC_BASECFG3_RDEF_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECFG3_RDEF_Pos	/;"	d
LCDC_BASECFG4_DMA	include/atmel_hlcdc.h	/^#define LCDC_BASECFG4_DMA	/;"	d
LCDC_BASECFG4_REP	include/atmel_hlcdc.h	/^#define LCDC_BASECFG4_REP	/;"	d
LCDC_BASECHER_A2QEN	include/atmel_hlcdc.h	/^#define LCDC_BASECHER_A2QEN	/;"	d
LCDC_BASECHER_CHEN	include/atmel_hlcdc.h	/^#define LCDC_BASECHER_CHEN	/;"	d
LCDC_BASECHER_UPDATEEN	include/atmel_hlcdc.h	/^#define LCDC_BASECHER_UPDATEEN	/;"	d
LCDC_BASECLUT_BCLUT_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECLUT_BCLUT_Msk /;"	d
LCDC_BASECLUT_BCLUT_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECLUT_BCLUT_Pos /;"	d
LCDC_BASECLUT_GCLUT_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECLUT_GCLUT_Msk /;"	d
LCDC_BASECLUT_GCLUT_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECLUT_GCLUT_Pos /;"	d
LCDC_BASECLUT_RCLUT_Msk	include/atmel_hlcdc.h	/^#define LCDC_BASECLUT_RCLUT_Msk /;"	d
LCDC_BASECLUT_RCLUT_Pos	include/atmel_hlcdc.h	/^#define LCDC_BASECLUT_RCLUT_Pos /;"	d
LCDC_BASECTRL_ADDIEN	include/atmel_hlcdc.h	/^#define LCDC_BASECTRL_ADDIEN	/;"	d
LCDC_BASECTRL_DFETCH	include/atmel_hlcdc.h	/^#define LCDC_BASECTRL_DFETCH	/;"	d
LCDC_BASECTRL_DMAIEN	include/atmel_hlcdc.h	/^#define LCDC_BASECTRL_DMAIEN	/;"	d
LCDC_BASECTRL_DONEIEN	include/atmel_hlcdc.h	/^#define LCDC_BASECTRL_DONEIEN	/;"	d
LCDC_BASECTRL_DSCRIEN	include/atmel_hlcdc.h	/^#define LCDC_BASECTRL_DSCRIEN	/;"	d
LCDC_BASECTRL_LFETCH	include/atmel_hlcdc.h	/^#define LCDC_BASECTRL_LFETCH	/;"	d
LCDC_BASEIDR_ADD	include/atmel_hlcdc.h	/^#define LCDC_BASEIDR_ADD	/;"	d
LCDC_BASEIDR_DMA	include/atmel_hlcdc.h	/^#define LCDC_BASEIDR_DMA	/;"	d
LCDC_BASEIDR_DONE	include/atmel_hlcdc.h	/^#define LCDC_BASEIDR_DONE	/;"	d
LCDC_BASEIDR_DSCR	include/atmel_hlcdc.h	/^#define LCDC_BASEIDR_DSCR	/;"	d
LCDC_BASEIDR_OVR	include/atmel_hlcdc.h	/^#define LCDC_BASEIDR_OVR	/;"	d
LCDC_CCMR_CUR_COL_B	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CCMR_CUR_COL_B(/;"	d
LCDC_CCMR_CUR_COL_G	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CCMR_CUR_COL_G(/;"	d
LCDC_CCMR_CUR_COL_R	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CCMR_CUR_COL_R(/;"	d
LCDC_CPOS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_CPOS	/;"	d
LCDC_CPR_CC	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CC(/;"	d
LCDC_CPR_CC_AND	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CC_AND	/;"	d
LCDC_CPR_CC_OR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CC_OR	/;"	d
LCDC_CPR_CC_TRANSPARENT	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CC_TRANSPARENT	/;"	d
LCDC_CPR_CC_XOR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CC_XOR	/;"	d
LCDC_CPR_CXP	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CXP(/;"	d
LCDC_CPR_CYP	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_CYP(/;"	d
LCDC_CPR_OP	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CPR_OP	/;"	d
LCDC_CWHBR_BD	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CWHBR_BD(/;"	d
LCDC_CWHBR_BK_EN	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CWHBR_BK_EN	/;"	d
LCDC_CWHBR_CH	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CWHBR_CH(/;"	d
LCDC_CWHBR_CW	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_CWHBR_CW(/;"	d
LCDC_DCR_BURST	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_DCR_BURST	/;"	d
LCDC_DCR_HM	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_DCR_HM(/;"	d
LCDC_DCR_TM	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_DCR_TM(/;"	d
LCDC_DMACR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_DMACR	/;"	d
LCDC_GWCR_GWAV	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWCR_GWAV(/;"	d
LCDC_GWCR_GWCKE	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWCR_GWCKE	/;"	d
LCDC_GWPOR_GWPO	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWPOR_GWPO(/;"	d
LCDC_GWPR_GWXP	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWPR_GWXP(/;"	d
LCDC_GWPR_GWYP	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWPR_GWYP(/;"	d
LCDC_GWSAR_GWSA	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWSAR_GWSA(/;"	d
LCDC_GWSR_GWH	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWSR_GWH(/;"	d
LCDC_GWSR_GWW	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWSR_GWW(/;"	d
LCDC_GWVPWR_GWVPW	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_GWVPWR_GWVPW(/;"	d
LCDC_HCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_HCR	/;"	d
LCDC_HCR_H_WAIT_1	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_HCR_H_WAIT_1(/;"	d
LCDC_HCR_H_WAIT_2	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_HCR_H_WAIT_2(/;"	d
LCDC_HCR_H_WIDTH	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_HCR_H_WIDTH(/;"	d
LCDC_ICR_GW_INT_CON	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_ICR_GW_INT_CON	/;"	d
LCDC_ICR_INTCON	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_ICR_INTCON	/;"	d
LCDC_ICR_INTSYN	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_ICR_INTSYN	/;"	d
LCDC_IER_BOF	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_BOF	/;"	d
LCDC_IER_EOF	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_EOF	/;"	d
LCDC_IER_ERR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_ERR	/;"	d
LCDC_IER_GW_BOF	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_GW_BOF	/;"	d
LCDC_IER_GW_EOF	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_GW_EOF	/;"	d
LCDC_IER_GW_ERR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_GW_ERR	/;"	d
LCDC_IER_GW_UDR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_GW_UDR	/;"	d
LCDC_IER_UDR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_IER_UDR	/;"	d
LCDC_LCDC0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDC_LCDC0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDC_LCDC1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDC_LCDC1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDC_LCDCFG0_CGDISBASE	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CGDISBASE	/;"	d
LCDC_LCDCFG0_CGDISHCR	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CGDISHCR	/;"	d
LCDC_LCDCFG0_CGDISHEO	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CGDISHEO	/;"	d
LCDC_LCDCFG0_CGDISOVR1	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CGDISOVR1	/;"	d
LCDC_LCDCFG0_CLKDIV	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CLKDIV(/;"	d
LCDC_LCDCFG0_CLKDIV_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CLKDIV_Msk	/;"	d
LCDC_LCDCFG0_CLKDIV_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CLKDIV_Pos	/;"	d
LCDC_LCDCFG0_CLKPOL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CLKPOL	/;"	d
LCDC_LCDCFG0_CLKPWMSEL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CLKPWMSEL	/;"	d
LCDC_LCDCFG0_CLKSEL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG0_CLKSEL	/;"	d
LCDC_LCDCFG1_HSPW	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG1_HSPW(/;"	d
LCDC_LCDCFG1_HSPW_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG1_HSPW_Msk	/;"	d
LCDC_LCDCFG1_HSPW_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG1_HSPW_Pos	/;"	d
LCDC_LCDCFG1_VSPW	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG1_VSPW(/;"	d
LCDC_LCDCFG1_VSPW_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG1_VSPW_Msk	/;"	d
LCDC_LCDCFG1_VSPW_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG1_VSPW_Pos	/;"	d
LCDC_LCDCFG2_VBPW	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG2_VBPW(/;"	d
LCDC_LCDCFG2_VBPW_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG2_VBPW_Msk	/;"	d
LCDC_LCDCFG2_VBPW_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG2_VBPW_Pos	/;"	d
LCDC_LCDCFG2_VFPW	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG2_VFPW(/;"	d
LCDC_LCDCFG2_VFPW_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG2_VFPW_Msk	/;"	d
LCDC_LCDCFG2_VFPW_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG2_VFPW_Pos	/;"	d
LCDC_LCDCFG3_HBPW	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG3_HBPW(/;"	d
LCDC_LCDCFG3_HBPW_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG3_HBPW_Msk	/;"	d
LCDC_LCDCFG3_HBPW_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG3_HBPW_Pos	/;"	d
LCDC_LCDCFG3_HFPW	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG3_HFPW(/;"	d
LCDC_LCDCFG3_HFPW_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG3_HFPW_Msk	/;"	d
LCDC_LCDCFG3_HFPW_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG3_HFPW_Pos	/;"	d
LCDC_LCDCFG4_PPL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG4_PPL(/;"	d
LCDC_LCDCFG4_PPL_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG4_PPL_Msk	/;"	d
LCDC_LCDCFG4_PPL_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG4_PPL_Pos	/;"	d
LCDC_LCDCFG4_RPF	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG4_RPF(/;"	d
LCDC_LCDCFG4_RPF_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG4_RPF_Msk	/;"	d
LCDC_LCDCFG4_RPF_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG4_RPF_Pos	/;"	d
LCDC_LCDCFG5_DISPDLY	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_DISPDLY	/;"	d
LCDC_LCDCFG5_DISPPOL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_DISPPOL	/;"	d
LCDC_LCDCFG5_DITHER	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_DITHER	/;"	d
LCDC_LCDCFG5_GUARDTIME	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_GUARDTIME(/;"	d
LCDC_LCDCFG5_GUARDTIME_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_GUARDTIME_Msk	/;"	d
LCDC_LCDCFG5_GUARDTIME_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_GUARDTIME_Pos	/;"	d
LCDC_LCDCFG5_HSPOL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_HSPOL	/;"	d
LCDC_LCDCFG5_MODE_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_MODE_Msk	/;"	d
LCDC_LCDCFG5_MODE_OUTPUT_12BPP	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_MODE_OUTPUT_12BPP	/;"	d
LCDC_LCDCFG5_MODE_OUTPUT_16BPP	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_MODE_OUTPUT_16BPP	/;"	d
LCDC_LCDCFG5_MODE_OUTPUT_18BPP	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_MODE_OUTPUT_18BPP	/;"	d
LCDC_LCDCFG5_MODE_OUTPUT_24BPP	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_MODE_OUTPUT_24BPP	/;"	d
LCDC_LCDCFG5_MODE_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_MODE_Pos	/;"	d
LCDC_LCDCFG5_SERIAL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_SERIAL	/;"	d
LCDC_LCDCFG5_VSPDLYE	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_VSPDLYE	/;"	d
LCDC_LCDCFG5_VSPDLYS	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_VSPDLYS	/;"	d
LCDC_LCDCFG5_VSPHO	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_VSPHO	/;"	d
LCDC_LCDCFG5_VSPOL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_VSPOL	/;"	d
LCDC_LCDCFG5_VSPSU	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG5_VSPSU	/;"	d
LCDC_LCDCFG6_PWMCVAL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMCVAL(/;"	d
LCDC_LCDCFG6_PWMCVAL_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMCVAL_Msk	/;"	d
LCDC_LCDCFG6_PWMCVAL_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMCVAL_Pos	/;"	d
LCDC_LCDCFG6_PWMPOL	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMPOL	/;"	d
LCDC_LCDCFG6_PWMPS	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMPS(/;"	d
LCDC_LCDCFG6_PWMPS_Msk	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMPS_Msk	/;"	d
LCDC_LCDCFG6_PWMPS_Pos	include/atmel_hlcdc.h	/^#define LCDC_LCDCFG6_PWMPS_Pos	/;"	d
LCDC_LCDDIS_CLKDIS	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_CLKDIS	/;"	d
LCDC_LCDDIS_CLKRST	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_CLKRST	/;"	d
LCDC_LCDDIS_DISPDIS	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_DISPDIS	/;"	d
LCDC_LCDDIS_DISPRST	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_DISPRST	/;"	d
LCDC_LCDDIS_PWMDIS	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_PWMDIS	/;"	d
LCDC_LCDDIS_PWMRST	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_PWMRST	/;"	d
LCDC_LCDDIS_SYNCDIS	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_SYNCDIS	/;"	d
LCDC_LCDDIS_SYNCRST	include/atmel_hlcdc.h	/^#define LCDC_LCDDIS_SYNCRST	/;"	d
LCDC_LCDEN_CLKEN	include/atmel_hlcdc.h	/^#define LCDC_LCDEN_CLKEN	/;"	d
LCDC_LCDEN_DISPEN	include/atmel_hlcdc.h	/^#define LCDC_LCDEN_DISPEN	/;"	d
LCDC_LCDEN_PWMEN	include/atmel_hlcdc.h	/^#define LCDC_LCDEN_PWMEN	/;"	d
LCDC_LCDEN_SYNCEN	include/atmel_hlcdc.h	/^#define LCDC_LCDEN_SYNCEN	/;"	d
LCDC_LCDICR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_LCDICR	/;"	d
LCDC_LCDIDR_BASEID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_BASEID	/;"	d
LCDC_LCDIDR_DISID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_DISID	/;"	d
LCDC_LCDIDR_DISPID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_DISPID	/;"	d
LCDC_LCDIDR_FIFOERRID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_FIFOERRID	/;"	d
LCDC_LCDIDR_HCRID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_HCRID	/;"	d
LCDC_LCDIDR_HEOID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_HEOID	/;"	d
LCDC_LCDIDR_OVR1ID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_OVR1ID	/;"	d
LCDC_LCDIDR_SOFID	include/atmel_hlcdc.h	/^#define LCDC_LCDIDR_SOFID	/;"	d
LCDC_LCDISR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_LCDISR	/;"	d
LCDC_LCDSR_CLKSTS	include/atmel_hlcdc.h	/^#define LCDC_LCDSR_CLKSTS	/;"	d
LCDC_LCDSR_DISPSTS	include/atmel_hlcdc.h	/^#define LCDC_LCDSR_DISPSTS	/;"	d
LCDC_LCDSR_LCDSTS	include/atmel_hlcdc.h	/^#define LCDC_LCDSR_LCDSTS	/;"	d
LCDC_LCDSR_PWMSTS	include/atmel_hlcdc.h	/^#define LCDC_LCDSR_PWMSTS	/;"	d
LCDC_LCDSR_SIPSTS	include/atmel_hlcdc.h	/^#define LCDC_LCDSR_SIPSTS	/;"	d
LCDC_LCHCC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_LCHCC	/;"	d
LCDC_LCWHB	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_LCWHB	/;"	d
LCDC_LGWCR_GWCKB	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWCR_GWCKB(/;"	d
LCDC_LGWCR_GWCKG	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWCR_GWCKG(/;"	d
LCDC_LGWCR_GWCKR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWCR_GWCKR(/;"	d
LCDC_LGWCR_GWE	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWCR_GWE	/;"	d
LCDC_LGWCR_GW_RVS	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWCR_GW_RVS	/;"	d
LCDC_LGWDCR_GWBT	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWDCR_GWBT	/;"	d
LCDC_LGWDCR_GWHM	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWDCR_GWHM(/;"	d
LCDC_LGWDCR_GWTM	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_LGWDCR_GWTM(/;"	d
LCDC_LSCR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_LSCR1	/;"	d
LCDC_PCCR_CC_EN	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_CC_EN	/;"	d
LCDC_PCCR_CLS_HI_WID	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_CLS_HI_WID(/;"	d
LCDC_PCCR_LDMSK	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_LDMSK	/;"	d
LCDC_PCCR_PW	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_PW(/;"	d
LCDC_PCCR_SCR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_SCR(/;"	d
LCDC_PCCR_SCR_LCDCLK	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_SCR_LCDCLK	/;"	d
LCDC_PCCR_SCR_LNPULSE	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_SCR_LNPULSE	/;"	d
LCDC_PCCR_SCR_PIXCLK	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCCR_SCR_PIXCLK	/;"	d
LCDC_PCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_PCR	/;"	d
LCDC_PCR_ACD	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_ACD(/;"	d
LCDC_PCR_ACDSEL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_ACDSEL	/;"	d
LCDC_PCR_BPIX	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX(/;"	d
LCDC_PCR_BPIX_12bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_12bpp	/;"	d
LCDC_PCR_BPIX_16bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_16bpp	/;"	d
LCDC_PCR_BPIX_18bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_18bpp	/;"	d
LCDC_PCR_BPIX_1bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_1bpp	/;"	d
LCDC_PCR_BPIX_2bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_2bpp	/;"	d
LCDC_PCR_BPIX_4bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_4bpp	/;"	d
LCDC_PCR_BPIX_8bpp	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_BPIX_8bpp	/;"	d
LCDC_PCR_CLKPOL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_CLKPOL	/;"	d
LCDC_PCR_COLOR	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_COLOR	/;"	d
LCDC_PCR_ENDSEL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_ENDSEL	/;"	d
LCDC_PCR_FLM	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_FLM	/;"	d
LCDC_PCR_LPPOL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_LPPOL	/;"	d
LCDC_PCR_MODE_CSTN	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_MODE_CSTN	/;"	d
LCDC_PCR_MODE_MONOCHROME	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_MODE_MONOCHROME	/;"	d
LCDC_PCR_MODE_TFT	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_MODE_TFT	/;"	d
LCDC_PCR_OEPOL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_OEPOL	/;"	d
LCDC_PCR_PANEL_TYPE	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PANEL_TYPE(/;"	d
LCDC_PCR_PBSIZ	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PBSIZ(/;"	d
LCDC_PCR_PBSIZ_1	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PBSIZ_1	/;"	d
LCDC_PCR_PBSIZ_2	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PBSIZ_2	/;"	d
LCDC_PCR_PBSIZ_4	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PBSIZ_4	/;"	d
LCDC_PCR_PBSIZ_8	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PBSIZ_8	/;"	d
LCDC_PCR_PCD	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PCD(/;"	d
LCDC_PCR_PIXPOL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_PIXPOL	/;"	d
LCDC_PCR_REV_VS	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_REV_VS	/;"	d
LCDC_PCR_SCLKIDLE	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_SCLKIDLE	/;"	d
LCDC_PCR_SCLKSEL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_SCLKSEL	/;"	d
LCDC_PCR_SHARP	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_SHARP	/;"	d
LCDC_PCR_SWAP_SEL	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_SWAP_SEL	/;"	d
LCDC_PCR_TFT	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_PCR_TFT	/;"	d
LCDC_POS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_POS	/;"	d
LCDC_PWMR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_PWMR	/;"	d
LCDC_RMCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_RMCR	/;"	d
LCDC_RMCR_SEL_REF	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_RMCR_SEL_REF	/;"	d
LCDC_SCR_CLS_R_DELAY	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SCR_CLS_R_DELAY(/;"	d
LCDC_SCR_GRAY1	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SCR_GRAY1(/;"	d
LCDC_SCR_GRAY2	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SCR_GRAY2(/;"	d
LCDC_SCR_PS_R_DELAY	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SCR_PS_R_DELAY(/;"	d
LCDC_SCR_RTG_DELAY	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SCR_RTG_DELAY(/;"	d
LCDC_SIZE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_SIZE	/;"	d
LCDC_SR_XMAX	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SR_XMAX(/;"	d
LCDC_SR_YMAX	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SR_YMAX(/;"	d
LCDC_SSA	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_SSA	/;"	d
LCDC_SSAR_SSA	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_SSAR_SSA(/;"	d
LCDC_VCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_VCR	/;"	d
LCDC_VCR_V_WAIT_1	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_VCR_V_WAIT_1(/;"	d
LCDC_VCR_V_WAIT_2	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_VCR_V_WAIT_2(/;"	d
LCDC_VCR_V_WIDTH	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_VCR_V_WIDTH(/;"	d
LCDC_VPW	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDC_VPW	/;"	d
LCDC_VPWR_VPW	arch/m68k/include/asm/coldfire/lcd.h	/^#define LCDC_VPWR_VPW(/;"	d
LCDD0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD10_MARK, D18_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD11_MARK, D19_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD12_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD12_MARK, D20_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD13_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD13_MARK, D21_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD14_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD14_MARK, D22_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD15_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, D23_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD16_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, D24_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD17_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD17_MARK, D25_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD18_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD19_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD1_MARK, PORT193_SCIFA5_CTS__MARK, BBIF2_TSYNC1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD20_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD21_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD22_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD23_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD2_MARK, PORT194_SCIFA5_RTS__MARK, BBIF2_TSCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD3_MARK, PORT195_SCIFA5_RXD_MARK, BBIF2_TXD1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD4_MARK, PORT196_SCIFA5_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD8_MARK, D16_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDD9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD9_MARK, D17_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDDCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDCK_MARK, LCDWR__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDDISP_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDISP_MARK, LCDRS_MARK, PORT219_LCD2WR__MARK, DREQ3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDDON2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDDON_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDHSYN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDHSYN_MARK, LCDCS__MARK, LCDCS2__MARK, DACK3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDICR_INT_CON	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDICR_INT_CON /;"	d
LCDICR_INT_SYN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDICR_INT_SYN /;"	d
LCDIF1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define LCDIF1_BASE_ADDR /;"	d
LCDIF2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define LCDIF2_BASE_ADDR /;"	d
LCDIF_CTRL1_BM_ERROR_IRQ	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_BM_ERROR_IRQ	/;"	d
LCDIF_CTRL1_BM_ERROR_IRQ	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_BM_ERROR_IRQ	/;"	d
LCDIF_CTRL1_BM_ERROR_IRQ_EN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_BM_ERROR_IRQ_EN	/;"	d
LCDIF_CTRL1_BM_ERROR_IRQ_EN	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_BM_ERROR_IRQ_EN	/;"	d
LCDIF_CTRL1_BUSY_ENABLE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_BUSY_ENABLE	/;"	d
LCDIF_CTRL1_BUSY_ENABLE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_BUSY_ENABLE	/;"	d
LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK	/;"	d
LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK	/;"	d
LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET	/;"	d
LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET	/;"	d
LCDIF_CTRL1_COMBINE_MPU_WR_STRB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_COMBINE_MPU_WR_STRB	/;"	d
LCDIF_CTRL1_COMBINE_MPU_WR_STRB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_COMBINE_MPU_WR_STRB	/;"	d
LCDIF_CTRL1_CUR_FRAME_DONE_IRQ	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_CUR_FRAME_DONE_IRQ	/;"	d
LCDIF_CTRL1_CUR_FRAME_DONE_IRQ	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_CUR_FRAME_DONE_IRQ	/;"	d
LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN	/;"	d
LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN	/;"	d
LCDIF_CTRL1_FIFO_CLEAR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_FIFO_CLEAR	/;"	d
LCDIF_CTRL1_FIFO_CLEAR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_FIFO_CLEAR	/;"	d
LCDIF_CTRL1_INTERLACE_FIELDS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_INTERLACE_FIELDS	/;"	d
LCDIF_CTRL1_INTERLACE_FIELDS	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_INTERLACE_FIELDS	/;"	d
LCDIF_CTRL1_IRQ_ON_ALTERNATE_FIELDS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_IRQ_ON_ALTERNATE_FIELDS	/;"	d
LCDIF_CTRL1_IRQ_ON_ALTERNATE_FIELDS	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_IRQ_ON_ALTERNATE_FIELDS	/;"	d
LCDIF_CTRL1_MODE86	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_MODE86	/;"	d
LCDIF_CTRL1_MODE86	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_MODE86	/;"	d
LCDIF_CTRL1_OVERFLOW_IRQ	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_OVERFLOW_IRQ	/;"	d
LCDIF_CTRL1_OVERFLOW_IRQ	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_OVERFLOW_IRQ	/;"	d
LCDIF_CTRL1_OVERFLOW_IRQ_EN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_OVERFLOW_IRQ_EN	/;"	d
LCDIF_CTRL1_OVERFLOW_IRQ_EN	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_OVERFLOW_IRQ_EN	/;"	d
LCDIF_CTRL1_RECOVER_ON_UNDERFLOW	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_RECOVER_ON_UNDERFLOW	/;"	d
LCDIF_CTRL1_RECOVER_ON_UNDERFLOW	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_RECOVER_ON_UNDERFLOW	/;"	d
LCDIF_CTRL1_RESET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_RESET	/;"	d
LCDIF_CTRL1_RESET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_RESET	/;"	d
LCDIF_CTRL1_START_INTERLACE_FROM_SECOND_FIELD	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_START_INTERLACE_FROM_SECOND_FIELD	/;"	d
LCDIF_CTRL1_START_INTERLACE_FROM_SECOND_FIELD	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_START_INTERLACE_FROM_SECOND_FIELD	/;"	d
LCDIF_CTRL1_UNDERFLOW_IRQ	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_UNDERFLOW_IRQ	/;"	d
LCDIF_CTRL1_UNDERFLOW_IRQ	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_UNDERFLOW_IRQ	/;"	d
LCDIF_CTRL1_UNDERFLOW_IRQ_EN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_UNDERFLOW_IRQ_EN	/;"	d
LCDIF_CTRL1_UNDERFLOW_IRQ_EN	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_UNDERFLOW_IRQ_EN	/;"	d
LCDIF_CTRL1_VSYNC_EDGE_IRQ	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_VSYNC_EDGE_IRQ	/;"	d
LCDIF_CTRL1_VSYNC_EDGE_IRQ	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_VSYNC_EDGE_IRQ	/;"	d
LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN	/;"	d
LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN	/;"	d
LCDIF_CTRL2_BURST_LEN_8	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_BURST_LEN_8	/;"	d
LCDIF_CTRL2_BURST_LEN_8	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_BURST_LEN_8	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_BGR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_BGR	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_BGR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_BGR	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_BRG	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_BRG	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_BRG	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_BRG	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_GBR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_GBR	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_GBR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_GBR	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_GRB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_GRB	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_GRB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_GRB	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_MASK	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_MASK	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_OFFSET	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_OFFSET	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_RBG	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_RBG	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_RBG	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_RBG	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_RGB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_RGB	/;"	d
LCDIF_CTRL2_EVEN_LINE_PATTERN_RGB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_EVEN_LINE_PATTERN_RGB	/;"	d
LCDIF_CTRL2_INITIAL_DUMMY_READ_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_INITIAL_DUMMY_READ_MASK	/;"	d
LCDIF_CTRL2_INITIAL_DUMMY_READ_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_INITIAL_DUMMY_READ_MASK	/;"	d
LCDIF_CTRL2_INITIAL_DUMMY_READ_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_INITIAL_DUMMY_READ_OFFSET	/;"	d
LCDIF_CTRL2_INITIAL_DUMMY_READ_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_INITIAL_DUMMY_READ_OFFSET	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_BGR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_BGR	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_BGR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_BGR	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_BRG	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_BRG	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_BRG	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_BRG	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_GBR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_GBR	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_GBR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_GBR	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_GRB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_GRB	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_GRB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_GRB	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_MASK	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_MASK	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_OFFSET	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_OFFSET	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_RBG	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_RBG	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_RBG	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_RBG	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_RGB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_RGB	/;"	d
LCDIF_CTRL2_ODD_LINE_PATTERN_RGB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_ODD_LINE_PATTERN_RGB	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_MASK	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_MASK	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_OFFSET	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_OFFSET	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_1	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_1	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_1	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_16	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_16	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_16	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_16	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_2	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_2	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_2	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_4	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_4	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_4	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_8	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_8	/;"	d
LCDIF_CTRL2_OUTSTANDING_REQS_REQ_8	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_OUTSTANDING_REQS_REQ_8	/;"	d
LCDIF_CTRL2_READ_MODE_6_BIT_INPUT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_READ_MODE_6_BIT_INPUT	/;"	d
LCDIF_CTRL2_READ_MODE_6_BIT_INPUT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_READ_MODE_6_BIT_INPUT	/;"	d
LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_MASK	/;"	d
LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_MASK	/;"	d
LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_OFFSET	/;"	d
LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_READ_MODE_NUM_PACKED_SUBWORDS_OFFSET	/;"	d
LCDIF_CTRL2_READ_MODE_OUTPUT_IN_RGB_FORMAT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_READ_MODE_OUTPUT_IN_RGB_FORMAT	/;"	d
LCDIF_CTRL2_READ_MODE_OUTPUT_IN_RGB_FORMAT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_READ_MODE_OUTPUT_IN_RGB_FORMAT	/;"	d
LCDIF_CTRL2_READ_PACK_DIR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL2_READ_PACK_DIR	/;"	d
LCDIF_CTRL2_READ_PACK_DIR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL2_READ_PACK_DIR	/;"	d
LCDIF_CTRL_BYPASS_COUNT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_BYPASS_COUNT	/;"	d
LCDIF_CTRL_BYPASS_COUNT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_BYPASS_COUNT	/;"	d
LCDIF_CTRL_CLKGATE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_CLKGATE	/;"	d
LCDIF_CTRL_CLKGATE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_CLKGATE	/;"	d
LCDIF_CTRL_CSC_DATA_SWIZZLE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_CSC_DATA_SWIZZLE_MASK	/;"	d
LCDIF_CTRL_CSC_DATA_SWIZZLE_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_CSC_DATA_SWIZZLE_MASK	/;"	d
LCDIF_CTRL_CSC_DATA_SWIZZLE_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_CSC_DATA_SWIZZLE_OFFSET	/;"	d
LCDIF_CTRL_CSC_DATA_SWIZZLE_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_CSC_DATA_SWIZZLE_OFFSET	/;"	d
LCDIF_CTRL_DATA_FORMAT_16_BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DATA_FORMAT_16_BIT	/;"	d
LCDIF_CTRL_DATA_FORMAT_16_BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DATA_FORMAT_16_BIT	/;"	d
LCDIF_CTRL_DATA_FORMAT_18_BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DATA_FORMAT_18_BIT	/;"	d
LCDIF_CTRL_DATA_FORMAT_18_BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DATA_FORMAT_18_BIT	/;"	d
LCDIF_CTRL_DATA_FORMAT_24_BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DATA_FORMAT_24_BIT	/;"	d
LCDIF_CTRL_DATA_FORMAT_24_BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DATA_FORMAT_24_BIT	/;"	d
LCDIF_CTRL_DATA_SELECT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DATA_SELECT	/;"	d
LCDIF_CTRL_DATA_SELECT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DATA_SELECT	/;"	d
LCDIF_CTRL_DATA_SHIFT_DIR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DATA_SHIFT_DIR	/;"	d
LCDIF_CTRL_DATA_SHIFT_DIR	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DATA_SHIFT_DIR	/;"	d
LCDIF_CTRL_DOTCLK_MODE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DOTCLK_MODE	/;"	d
LCDIF_CTRL_DOTCLK_MODE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DOTCLK_MODE	/;"	d
LCDIF_CTRL_DVI_MODE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_DVI_MODE	/;"	d
LCDIF_CTRL_DVI_MODE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_DVI_MODE	/;"	d
LCDIF_CTRL_INPUT_DATA_SWIZZLE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_INPUT_DATA_SWIZZLE_MASK	/;"	d
LCDIF_CTRL_INPUT_DATA_SWIZZLE_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_INPUT_DATA_SWIZZLE_MASK	/;"	d
LCDIF_CTRL_INPUT_DATA_SWIZZLE_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_INPUT_DATA_SWIZZLE_OFFSET	/;"	d
LCDIF_CTRL_INPUT_DATA_SWIZZLE_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_INPUT_DATA_SWIZZLE_OFFSET	/;"	d
LCDIF_CTRL_LCDIF_MASTER	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCDIF_MASTER	/;"	d
LCDIF_CTRL_LCDIF_MASTER	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCDIF_MASTER	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_MASK	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_MASK	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_OFFSET	/;"	d
LCDIF_CTRL_LCD_DATABUS_WIDTH_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_LCD_DATABUS_WIDTH_OFFSET	/;"	d
LCDIF_CTRL_READ_WRITEB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_READ_WRITEB	/;"	d
LCDIF_CTRL_READ_WRITEB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_READ_WRITEB	/;"	d
LCDIF_CTRL_RGB_TO_YCBCR422_CSC	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_RGB_TO_YCBCR422_CSC	/;"	d
LCDIF_CTRL_RGB_TO_YCBCR422_CSC	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_RGB_TO_YCBCR422_CSC	/;"	d
LCDIF_CTRL_RUN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_RUN	/;"	d
LCDIF_CTRL_RUN	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_RUN	/;"	d
LCDIF_CTRL_SFTRST	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_SFTRST	/;"	d
LCDIF_CTRL_SFTRST	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_SFTRST	/;"	d
LCDIF_CTRL_SHIFT_NUM_BITS_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_SHIFT_NUM_BITS_MASK	/;"	d
LCDIF_CTRL_SHIFT_NUM_BITS_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_SHIFT_NUM_BITS_MASK	/;"	d
LCDIF_CTRL_SHIFT_NUM_BITS_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_SHIFT_NUM_BITS_OFFSET	/;"	d
LCDIF_CTRL_SHIFT_NUM_BITS_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_SHIFT_NUM_BITS_OFFSET	/;"	d
LCDIF_CTRL_VSYNC_MODE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_VSYNC_MODE	/;"	d
LCDIF_CTRL_VSYNC_MODE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_VSYNC_MODE	/;"	d
LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE	/;"	d
LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE	/;"	d
LCDIF_CTRL_WORD_LENGTH_16BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WORD_LENGTH_16BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_16BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WORD_LENGTH_16BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_18BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WORD_LENGTH_18BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_18BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WORD_LENGTH_18BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_24BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WORD_LENGTH_24BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_24BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WORD_LENGTH_24BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_8BIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WORD_LENGTH_8BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_8BIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WORD_LENGTH_8BIT	/;"	d
LCDIF_CTRL_WORD_LENGTH_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WORD_LENGTH_MASK	/;"	d
LCDIF_CTRL_WORD_LENGTH_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WORD_LENGTH_MASK	/;"	d
LCDIF_CTRL_WORD_LENGTH_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_WORD_LENGTH_OFFSET	/;"	d
LCDIF_CTRL_WORD_LENGTH_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_WORD_LENGTH_OFFSET	/;"	d
LCDIF_CTRL_YCBCR422_INPUT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CTRL_YCBCR422_INPUT	/;"	d
LCDIF_CTRL_YCBCR422_INPUT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CTRL_YCBCR422_INPUT	/;"	d
LCDIF_CUR_BUF_ADDR_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CUR_BUF_ADDR_MASK	/;"	d
LCDIF_CUR_BUF_ADDR_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CUR_BUF_ADDR_MASK	/;"	d
LCDIF_CUR_BUF_ADDR_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_CUR_BUF_ADDR_OFFSET	/;"	d
LCDIF_CUR_BUF_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_CUR_BUF_ADDR_OFFSET	/;"	d
LCDIF_NEXT_BUF_ADDR_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_NEXT_BUF_ADDR_MASK	/;"	d
LCDIF_NEXT_BUF_ADDR_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_NEXT_BUF_ADDR_MASK	/;"	d
LCDIF_NEXT_BUF_ADDR_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_NEXT_BUF_ADDR_OFFSET	/;"	d
LCDIF_NEXT_BUF_ADDR_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_NEXT_BUF_ADDR_OFFSET	/;"	d
LCDIF_PIXEL_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	LCDIF_PIXEL_CLK_ROOT = 70,$/;"	e	enum:clk_root_index
LCDIF_PIXEL_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
LCDIF_PIXEL_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define LCDIF_PIXEL_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
LCDIF_TIMING_CMD_HOLD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_CMD_HOLD_MASK	/;"	d
LCDIF_TIMING_CMD_HOLD_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_CMD_HOLD_MASK	/;"	d
LCDIF_TIMING_CMD_HOLD_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_CMD_HOLD_OFFSET	/;"	d
LCDIF_TIMING_CMD_HOLD_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_CMD_HOLD_OFFSET	/;"	d
LCDIF_TIMING_CMD_SETUP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_CMD_SETUP_MASK	/;"	d
LCDIF_TIMING_CMD_SETUP_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_CMD_SETUP_MASK	/;"	d
LCDIF_TIMING_CMD_SETUP_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_CMD_SETUP_OFFSET	/;"	d
LCDIF_TIMING_CMD_SETUP_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_CMD_SETUP_OFFSET	/;"	d
LCDIF_TIMING_DATA_HOLD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_DATA_HOLD_MASK	/;"	d
LCDIF_TIMING_DATA_HOLD_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_DATA_HOLD_MASK	/;"	d
LCDIF_TIMING_DATA_HOLD_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_DATA_HOLD_OFFSET	/;"	d
LCDIF_TIMING_DATA_HOLD_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_DATA_HOLD_OFFSET	/;"	d
LCDIF_TIMING_DATA_SETUP_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_DATA_SETUP_MASK	/;"	d
LCDIF_TIMING_DATA_SETUP_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_DATA_SETUP_MASK	/;"	d
LCDIF_TIMING_DATA_SETUP_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TIMING_DATA_SETUP_OFFSET	/;"	d
LCDIF_TIMING_DATA_SETUP_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TIMING_DATA_SETUP_OFFSET	/;"	d
LCDIF_TRANSFER_COUNT_H_COUNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TRANSFER_COUNT_H_COUNT_MASK	/;"	d
LCDIF_TRANSFER_COUNT_H_COUNT_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TRANSFER_COUNT_H_COUNT_MASK	/;"	d
LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET	/;"	d
LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET	/;"	d
LCDIF_TRANSFER_COUNT_V_COUNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TRANSFER_COUNT_V_COUNT_MASK	/;"	d
LCDIF_TRANSFER_COUNT_V_COUNT_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TRANSFER_COUNT_V_COUNT_MASK	/;"	d
LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET	/;"	d
LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET	/;"	d
LCDIF_VDCTRL0_DOTCLK_POL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_DOTCLK_POL	/;"	d
LCDIF_VDCTRL0_DOTCLK_POL	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_DOTCLK_POL	/;"	d
LCDIF_VDCTRL0_ENABLE_POL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_ENABLE_POL	/;"	d
LCDIF_VDCTRL0_ENABLE_POL	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_ENABLE_POL	/;"	d
LCDIF_VDCTRL0_ENABLE_PRESENT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_ENABLE_PRESENT	/;"	d
LCDIF_VDCTRL0_ENABLE_PRESENT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_ENABLE_PRESENT	/;"	d
LCDIF_VDCTRL0_HALF_LINE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_HALF_LINE	/;"	d
LCDIF_VDCTRL0_HALF_LINE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_HALF_LINE	/;"	d
LCDIF_VDCTRL0_HALF_LINE_MODE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_HALF_LINE_MODE	/;"	d
LCDIF_VDCTRL0_HALF_LINE_MODE	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_HALF_LINE_MODE	/;"	d
LCDIF_VDCTRL0_HSYNC_POL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_HSYNC_POL	/;"	d
LCDIF_VDCTRL0_HSYNC_POL	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_HSYNC_POL	/;"	d
LCDIF_VDCTRL0_VSYNC_OEB	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_VSYNC_OEB	/;"	d
LCDIF_VDCTRL0_VSYNC_OEB	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_VSYNC_OEB	/;"	d
LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT	/;"	d
LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT	/;"	d
LCDIF_VDCTRL0_VSYNC_POL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_VSYNC_POL	/;"	d
LCDIF_VDCTRL0_VSYNC_POL	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_VSYNC_POL	/;"	d
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_MASK	/;"	d
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_MASK	/;"	d
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_OFFSET	/;"	d
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_OFFSET	/;"	d
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT	/;"	d
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT	/;"	d
LCDIF_VDCTRL1_VSYNC_PERIOD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL1_VSYNC_PERIOD_MASK	/;"	d
LCDIF_VDCTRL1_VSYNC_PERIOD_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL1_VSYNC_PERIOD_MASK	/;"	d
LCDIF_VDCTRL1_VSYNC_PERIOD_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL1_VSYNC_PERIOD_OFFSET	/;"	d
LCDIF_VDCTRL1_VSYNC_PERIOD_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL1_VSYNC_PERIOD_OFFSET	/;"	d
LCDIF_VDCTRL2_HSYNC_PERIOD_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL2_HSYNC_PERIOD_MASK	/;"	d
LCDIF_VDCTRL2_HSYNC_PERIOD_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL2_HSYNC_PERIOD_MASK	/;"	d
LCDIF_VDCTRL2_HSYNC_PERIOD_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL2_HSYNC_PERIOD_OFFSET	/;"	d
LCDIF_VDCTRL2_HSYNC_PERIOD_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL2_HSYNC_PERIOD_OFFSET	/;"	d
LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_MASK	/;"	d
LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_MASK	/;"	d
LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET	/;"	d
LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET	/;"	d
LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_MASK	/;"	d
LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_MASK	/;"	d
LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET	/;"	d
LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET	/;"	d
LCDIF_VDCTRL3_MUX_SYNC_SIGNALS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL3_MUX_SYNC_SIGNALS	/;"	d
LCDIF_VDCTRL3_MUX_SYNC_SIGNALS	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL3_MUX_SYNC_SIGNALS	/;"	d
LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_MASK	/;"	d
LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_MASK	/;"	d
LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_OFFSET	/;"	d
LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_OFFSET	/;"	d
LCDIF_VDCTRL3_VSYNC_ONLY	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL3_VSYNC_ONLY	/;"	d
LCDIF_VDCTRL3_VSYNC_ONLY	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL3_VSYNC_ONLY	/;"	d
LCDIF_VDCTRL4_DOTCLK_DLY_SEL_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL4_DOTCLK_DLY_SEL_MASK	/;"	d
LCDIF_VDCTRL4_DOTCLK_DLY_SEL_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL4_DOTCLK_DLY_SEL_MASK	/;"	d
LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET	/;"	d
LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET	/;"	d
LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_MASK	/;"	d
LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_MASK	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_MASK	/;"	d
LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_OFFSET	/;"	d
LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_OFFSET	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_OFFSET	/;"	d
LCDIF_VDCTRL4_SYNC_SIGNALS_ON	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	LCDIF_VDCTRL4_SYNC_SIGNALS_ON	/;"	d
LCDIF_VDCTRL4_SYNC_SIGNALS_ON	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define	LCDIF_VDCTRL4_SYNC_SIGNALS_ON	/;"	d
LCDISR_BOF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDISR_BOF /;"	d
LCDISR_EOF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDISR_EOF /;"	d
LCDISR_ERR_RES	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDISR_ERR_RES /;"	d
LCDISR_UDR_ERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCDISR_UDR_ERR /;"	d
LCDLCLK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDLCLK_MARK, DREQ1_MARK, PORT221_LCD2CS__MARK, PWEN_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT0_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT10_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT10_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT10_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT11_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT11_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT11_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT12_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT12_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT12_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT13_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT13_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT13_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT14_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG6_MARK, LCDOUT14_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT14_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT14_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT15_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT15_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT15_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT16_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT16_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT16_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT17_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT17_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT17_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT18_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT18_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT18_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT19_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT19_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT19_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT1_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT20_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT20_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT20_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT21_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT21_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT21_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT22_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT22_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT22_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT23_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT23_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT23_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT2_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT3_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT4_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT5_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT6_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT7_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT7_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT8_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT8_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT8_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDOUT9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
LCDOUT9_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	LCDOUT9_MARK,$/;"	e	enum:__anona307945e0103	file:
LCDRD__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDRD__MARK, DACK2_MARK, PORT217_LCD2RS_MARK, MSIOF0L_TSYNC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDRS_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDISP_MARK, LCDRS_MARK, PORT219_LCD2WR__MARK, DREQ3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
LCDVSYN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDVSYN_MARK, LCDVSYN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDVSYN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDVSYN_MARK, LCDVSYN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCDWR__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDCK_MARK, LCDWR__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
LCD_12_16Bit	include/SA-1100.h	/^#define LCD_12_16Bit	/;"	d
LCD_12_16BitPSp	include/SA-1100.h	/^#define LCD_12_16BitPSp	/;"	d
LCD_4Bit	include/SA-1100.h	/^#define LCD_4Bit	/;"	d
LCD_4BitPSp	include/SA-1100.h	/^#define LCD_4BitPSp	/;"	d
LCD_8Bit	include/SA-1100.h	/^#define LCD_8Bit	/;"	d
LCD_8BitPSp	include/SA-1100.h	/^#define LCD_8BitPSp	/;"	d
LCD_AC_BIAS_FREQUENCY	drivers/video/da8xx-fb.c	/^#define LCD_AC_BIAS_FREQUENCY(/;"	d	file:
LCD_AC_BIAS_TRANSITIONS_PER_INT	drivers/video/da8xx-fb.c	/^#define LCD_AC_BIAS_TRANSITIONS_PER_INT(/;"	d	file:
LCD_ADCMODE	drivers/video/sed156x.c	/^#define LCD_ADCMODE	/;"	d	file:
LCD_ADC_NRM	drivers/video/sed156x.c	/^#define LCD_ADC_NRM	/;"	d	file:
LCD_ADC_REV	drivers/video/sed156x.c	/^#define LCD_ADC_REV	/;"	d	file:
LCD_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define LCD_BASE	/;"	d
LCD_BIAS	drivers/video/sed156x.c	/^#define LCD_BIAS	/;"	d	file:
LCD_BIAS7	drivers/video/sed156x.c	/^#define LCD_BIAS7	/;"	d	file:
LCD_BIAS9	drivers/video/sed156x.c	/^#define LCD_BIAS9	/;"	d	file:
LCD_BPP	board/bf527-ezkit/video.c	/^#define LCD_BPP	/;"	d	file:
LCD_BPP	board/bf548-ezkit/video.c	/^#define LCD_BPP	/;"	d	file:
LCD_BPP	board/cm-bf548/video.c	/^#define LCD_BPP	/;"	d	file:
LCD_BPP	drivers/video/mpc8xx_lcd.c	/^#define LCD_BPP	/;"	d	file:
LCD_BPP	drivers/video/pxa_lcd.c	/^# define LCD_BPP	/;"	d	file:
LCD_BPP	drivers/video/pxa_lcd.c	/^#define LCD_BPP	/;"	d	file:
LCD_BPP	include/configs/at91sam9261ek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/at91sam9263ek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/at91sam9m10g45ek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/at91sam9n12ek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/at91sam9rlek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/at91sam9x5ek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/brppt1.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/brxre1.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/cm_t35.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/cm_t3517.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/exynos5-dt-common.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/ma5d4evk.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/peach-pi.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/picosam9g45.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/pm9261.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/pm9263.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/rpi.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/s5pc210_universal.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/sama5d2_xplained.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/sama5d3xek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/sama5d4_xplained.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/sama5d4ek.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/sandbox.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/sansa_fuze_plus.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/trats.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/configs/trats2.h	/^#define LCD_BPP /;"	d
LCD_BPP	include/configs/xfi3.h	/^#define LCD_BPP	/;"	d
LCD_BPP	include/lcd.h	/^#define LCD_BPP	/;"	d
LCD_BYTE_LINESZ	drivers/video/sed156x.c	/^#define LCD_BYTE_LINESZ	/;"	d	file:
LCD_BYTE_WIDTH	drivers/video/sed156x.c	/^#define LCD_BYTE_WIDTH	/;"	d	file:
LCD_CADRH	drivers/video/sed156x.c	/^#define LCD_CADRH	/;"	d	file:
LCD_CADRL	drivers/video/sed156x.c	/^#define LCD_CADRL	/;"	d	file:
LCD_CAEND	drivers/video/sed156x.c	/^#define LCD_CAEND	/;"	d	file:
LCD_CAINC	drivers/video/sed156x.c	/^#define LCD_CAINC	/;"	d	file:
LCD_CLK	board/bf548-ezkit/video.c	/^#define	LCD_CLK /;"	d	file:
LCD_CLK	board/cm-bf548/video.c	/^#define	LCD_CLK /;"	d	file:
LCD_CLK_DIVISOR	drivers/video/am335x-fb.c	/^#define LCD_CLK_DIVISOR(/;"	d	file:
LCD_CLK_DIVISOR	drivers/video/da8xx-fb.c	/^#define LCD_CLK_DIVISOR(/;"	d	file:
LCD_CLK_MAIN_RESET	drivers/video/da8xx-fb.c	/^#define  LCD_CLK_MAIN_RESET	/;"	d	file:
LCD_CNTL_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define LCD_CNTL_BASE	/;"	d
LCD_CNTRST	drivers/video/sed156x.c	/^#define LCD_CNTRST	/;"	d	file:
LCD_COLOR16	include/lcd.h	/^#define LCD_COLOR16	/;"	d
LCD_COLOR2	include/lcd.h	/^#define LCD_COLOR2	/;"	d
LCD_COLOR32	include/lcd.h	/^#define LCD_COLOR32	/;"	d
LCD_COLOR4	include/lcd.h	/^#define LCD_COLOR4	/;"	d
LCD_COLOR8	include/lcd.h	/^#define LCD_COLOR8	/;"	d
LCD_COLUMNS	drivers/video/sed156x.c	/^#define LCD_COLUMNS	/;"	d	file:
LCD_COMDIR	drivers/video/sed156x.c	/^#define LCD_COMDIR	/;"	d	file:
LCD_CORECLKEN	drivers/video/am335x-fb.c	/^#define LCD_CORECLKEN	/;"	d	file:
LCD_C_NRM	drivers/video/sed156x.c	/^#define LCD_C_NRM	/;"	d	file:
LCD_C_RVS	drivers/video/sed156x.c	/^#define LCD_C_RVS	/;"	d	file:
LCD_DF	drivers/video/mpc8xx_lcd.c	/^#define LCD_DF /;"	d	file:
LCD_DF	include/lcd.h	/^#define LCD_DF	/;"	d
LCD_DMACLKEN	drivers/video/am335x-fb.c	/^#define LCD_DMACLKEN	/;"	d	file:
LCD_DMA_BURST_1	drivers/video/am335x-fb.c	/^#define LCD_DMA_BURST_1	/;"	d	file:
LCD_DMA_BURST_1	drivers/video/da8xx-fb.c	/^#define LCD_DMA_BURST_1	/;"	d	file:
LCD_DMA_BURST_16	drivers/video/am335x-fb.c	/^#define LCD_DMA_BURST_16	/;"	d	file:
LCD_DMA_BURST_16	drivers/video/da8xx-fb.c	/^#define LCD_DMA_BURST_16	/;"	d	file:
LCD_DMA_BURST_2	drivers/video/am335x-fb.c	/^#define LCD_DMA_BURST_2	/;"	d	file:
LCD_DMA_BURST_2	drivers/video/da8xx-fb.c	/^#define LCD_DMA_BURST_2	/;"	d	file:
LCD_DMA_BURST_4	drivers/video/am335x-fb.c	/^#define LCD_DMA_BURST_4	/;"	d	file:
LCD_DMA_BURST_4	drivers/video/da8xx-fb.c	/^#define LCD_DMA_BURST_4	/;"	d	file:
LCD_DMA_BURST_8	drivers/video/am335x-fb.c	/^#define LCD_DMA_BURST_8	/;"	d	file:
LCD_DMA_BURST_8	drivers/video/da8xx-fb.c	/^#define LCD_DMA_BURST_8	/;"	d	file:
LCD_DMA_BURST_SIZE	drivers/video/am335x-fb.c	/^#define LCD_DMA_BURST_SIZE(/;"	d	file:
LCD_DMA_BURST_SIZE	drivers/video/da8xx-fb.c	/^#define LCD_DMA_BURST_SIZE(/;"	d	file:
LCD_DPT_ALL	drivers/video/sed156x.c	/^#define LCD_DPT_ALL	/;"	d	file:
LCD_DPT_NRM	drivers/video/sed156x.c	/^#define LCD_DPT_NRM	/;"	d	file:
LCD_DSP_NRM	drivers/video/sed156x.c	/^#define LCD_DSP_NRM	/;"	d	file:
LCD_DSP_REV	drivers/video/sed156x.c	/^#define LCD_DSP_REV	/;"	d	file:
LCD_DUAL_FRAME_BUFFER_ENABLE	drivers/video/da8xx-fb.c	/^#define LCD_DUAL_FRAME_BUFFER_ENABLE	/;"	d	file:
LCD_ENABLE	arch/arm/include/asm/arch-omap3/dss.h	/^#define LCD_ENABLE	/;"	d
LCD_END_OF_FRAME0	drivers/video/da8xx-fb.c	/^#define LCD_END_OF_FRAME0	/;"	d	file:
LCD_END_OF_FRAME1	drivers/video/da8xx-fb.c	/^#define LCD_END_OF_FRAME1	/;"	d	file:
LCD_ERR_P	drivers/video/sed156x.c	/^#define LCD_ERR_P	/;"	d	file:
LCD_EVSET	drivers/video/sed156x.c	/^#define LCD_EVSET	/;"	d	file:
LCD_FIFO_UNDERFLOW	drivers/video/da8xx-fb.c	/^#define LCD_FIFO_UNDERFLOW	/;"	d	file:
LCD_HBPLSB	drivers/video/am335x-fb.c	/^#define LCD_HBPLSB(/;"	d	file:
LCD_HBPMSB	drivers/video/am335x-fb.c	/^#define LCD_HBPMSB(/;"	d	file:
LCD_HEIGHT	drivers/video/sed156x.c	/^#define LCD_HEIGHT	/;"	d	file:
LCD_HFPLSB	drivers/video/am335x-fb.c	/^#define LCD_HFPLSB(/;"	d	file:
LCD_HFPMSB	drivers/video/am335x-fb.c	/^#define LCD_HFPMSB(/;"	d	file:
LCD_HORLSB	drivers/video/am335x-fb.c	/^#define LCD_HORLSB(/;"	d	file:
LCD_HORMSB	drivers/video/am335x-fb.c	/^#define LCD_HORMSB(/;"	d	file:
LCD_HSWLSB	drivers/video/am335x-fb.c	/^#define LCD_HSWLSB(/;"	d	file:
LCD_HSWMSB	drivers/video/am335x-fb.c	/^#define LCD_HSWMSB(/;"	d	file:
LCD_INFO_X	include/lcd.h	/^#define LCD_INFO_X	/;"	d
LCD_INFO_Y	include/lcd.h	/^#define LCD_INFO_Y	/;"	d
LCD_INTERFACE_12_BIT	arch/arm/include/asm/arch-omap3/dss.h	/^#define LCD_INTERFACE_12_BIT	/;"	d
LCD_INTERFACE_16_BIT	arch/arm/include/asm/arch-omap3/dss.h	/^#define LCD_INTERFACE_16_BIT	/;"	d
LCD_INTERFACE_18_BIT	arch/arm/include/asm/arch-omap3/dss.h	/^#define LCD_INTERFACE_18_BIT	/;"	d
LCD_INTERFACE_24_BIT	arch/arm/include/asm/arch-omap3/dss.h	/^#define LCD_INTERFACE_24_BIT	/;"	d
LCD_INVERT_COLORS	drivers/video/pxa_lcd.c	/^# define LCD_INVERT_COLORS	/;"	d	file:
LCD_INVERT_COLORS	drivers/video/pxa_lcd.c	/^# define LCD_INVERT_COLORS$/;"	d	file:
LCD_INVERT_FRAME_CLOCK	drivers/video/da8xx-fb.c	/^#define LCD_INVERT_FRAME_CLOCK	/;"	d	file:
LCD_INVERT_LINE_CLOCK	drivers/video/da8xx-fb.c	/^#define LCD_INVERT_LINE_CLOCK	/;"	d	file:
LCD_INVERT_PIXEL_CLOCK	drivers/video/da8xx-fb.c	/^#define LCD_INVERT_PIXEL_CLOCK	/;"	d	file:
LCD_INVMASK	drivers/video/am335x-fb.c	/^#define LCD_INVMASK(/;"	d	file:
LCD_Int0_0	include/SA-1100.h	/^#define LCD_Int0_0	/;"	d
LCD_Int100_0	include/SA-1100.h	/^#define LCD_Int100_0	/;"	d
LCD_Int100_0A	include/SA-1100.h	/^#define LCD_Int100_0A	/;"	d
LCD_Int11_1	include/SA-1100.h	/^#define LCD_Int11_1	/;"	d
LCD_Int20_0	include/SA-1100.h	/^#define LCD_Int20_0	/;"	d
LCD_Int26_7	include/SA-1100.h	/^#define LCD_Int26_7	/;"	d
LCD_Int33_3	include/SA-1100.h	/^#define LCD_Int33_3	/;"	d
LCD_Int40_0	include/SA-1100.h	/^#define LCD_Int40_0	/;"	d
LCD_Int44_4	include/SA-1100.h	/^#define LCD_Int44_4	/;"	d
LCD_Int50_0	include/SA-1100.h	/^#define LCD_Int50_0	/;"	d
LCD_Int55_6	include/SA-1100.h	/^#define LCD_Int55_6	/;"	d
LCD_Int60_0	include/SA-1100.h	/^#define LCD_Int60_0	/;"	d
LCD_Int66_7	include/SA-1100.h	/^#define LCD_Int66_7	/;"	d
LCD_Int73_3	include/SA-1100.h	/^#define LCD_Int73_3	/;"	d
LCD_Int80_0	include/SA-1100.h	/^#define LCD_Int80_0	/;"	d
LCD_Int88_9	include/SA-1100.h	/^#define LCD_Int88_9	/;"	d
LCD_LADDR	drivers/video/sed156x.c	/^#define LCD_LADDR	/;"	d	file:
LCD_LIDDCLKEN	drivers/video/am335x-fb.c	/^#define LCD_LIDDCLKEN	/;"	d	file:
LCD_LINES	drivers/video/sed156x.c	/^#define LCD_LINES	/;"	d	file:
LCD_MAX_HEIGHT	drivers/video/atmel_lcdfb.c	/^	LCD_MAX_HEIGHT		= 768,$/;"	e	enum:__anonba7a97f70103	file:
LCD_MAX_HEIGHT	drivers/video/sandbox_sdl.c	/^	LCD_MAX_HEIGHT		= 768,$/;"	e	enum:__anonf92114db0103	file:
LCD_MAX_HEIGHT	drivers/video/tegra.c	/^	LCD_MAX_HEIGHT		= 768,$/;"	e	enum:__anone3dc25dd0103	file:
LCD_MAX_HEIGHT	drivers/video/tegra124/display.c	/^	LCD_MAX_HEIGHT		= 1200,$/;"	e	enum:__anon1e616af90103	file:
LCD_MAX_LOG2_BPP	drivers/video/atmel_lcdfb.c	/^	LCD_MAX_LOG2_BPP	= VIDEO_BPP16,$/;"	e	enum:__anonba7a97f70103	file:
LCD_MAX_LOG2_BPP	drivers/video/tegra.c	/^	LCD_MAX_LOG2_BPP	= VIDEO_BPP16,$/;"	e	enum:__anone3dc25dd0103	file:
LCD_MAX_LOG2_BPP	drivers/video/tegra124/display.c	/^	LCD_MAX_LOG2_BPP	= 4,		\/* 2^4 = 16 bpp *\/$/;"	e	enum:__anon1e616af90103	file:
LCD_MAX_WIDTH	drivers/video/atmel_lcdfb.c	/^	LCD_MAX_WIDTH		= 1366,$/;"	e	enum:__anonba7a97f70103	file:
LCD_MAX_WIDTH	drivers/video/sandbox_sdl.c	/^	LCD_MAX_WIDTH		= 1366,$/;"	e	enum:__anonf92114db0103	file:
LCD_MAX_WIDTH	drivers/video/tegra.c	/^	LCD_MAX_WIDTH		= 1366,$/;"	e	enum:__anone3dc25dd0103	file:
LCD_MAX_WIDTH	drivers/video/tegra124/display.c	/^	LCD_MAX_WIDTH		= 1920,$/;"	e	enum:__anon1e616af90103	file:
LCD_MONOCHROME	include/lcd.h	/^#define LCD_MONOCHROME	/;"	d
LCD_MONOCHROME_MODE	drivers/video/da8xx-fb.c	/^#define LCD_MONOCHROME_MODE	/;"	d	file:
LCD_MONO_8BIT_MODE	drivers/video/da8xx-fb.c	/^#define LCD_MONO_8BIT_MODE	/;"	d	file:
LCD_M_CADRH	drivers/video/sed156x.c	/^#define LCD_M_CADRH	/;"	d	file:
LCD_M_CADRL	drivers/video/sed156x.c	/^#define LCD_M_CADRL	/;"	d	file:
LCD_M_EVSET	drivers/video/sed156x.c	/^#define LCD_M_EVSET	/;"	d	file:
LCD_M_LADDR	drivers/video/sed156x.c	/^#define LCD_M_LADDR	/;"	d	file:
LCD_M_PADDR	drivers/video/sed156x.c	/^#define LCD_M_PADDR	/;"	d	file:
LCD_M_PWRMD	drivers/video/sed156x.c	/^#define LCD_M_PWRMD	/;"	d	file:
LCD_M_RESRT	drivers/video/sed156x.c	/^#define LCD_M_RESRT	/;"	d	file:
LCD_M_SION	drivers/video/sed156x.c	/^#define LCD_M_SION	/;"	d	file:
LCD_NEXTP	drivers/video/sed156x.c	/^#define LCD_NEXTP	/;"	d	file:
LCD_NOP	drivers/video/sed156x.c	/^#define LCD_NOP	/;"	d	file:
LCD_NPWREN	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	LCD_NPWREN,$/;"	e	enum:qn	file:
LCD_NUM_BUFFERS	drivers/video/da8xx-fb.c	/^#define LCD_NUM_BUFFERS	/;"	d	file:
LCD_OFF	drivers/video/sed156x.c	/^#define LCD_OFF	/;"	d	file:
LCD_ON	drivers/video/sed156x.c	/^#define LCD_ON	/;"	d	file:
LCD_OUTPUT	board/htkw/mcx/mcx.c	/^#define LCD_OUTPUT	/;"	d	file:
LCD_OUTPUT_BPP	include/configs/at91sam9n12ek.h	/^#define LCD_OUTPUT_BPP	/;"	d
LCD_OUTPUT_BPP	include/configs/at91sam9x5ek.h	/^#define LCD_OUTPUT_BPP	/;"	d
LCD_OUTPUT_BPP	include/configs/ma5d4evk.h	/^#define LCD_OUTPUT_BPP /;"	d
LCD_OUTPUT_BPP	include/configs/sama5d2_xplained.h	/^#define LCD_OUTPUT_BPP /;"	d
LCD_OUTPUT_BPP	include/configs/sama5d3xek.h	/^#define LCD_OUTPUT_BPP /;"	d
LCD_OUTPUT_BPP	include/configs/sama5d4_xplained.h	/^#define LCD_OUTPUT_BPP /;"	d
LCD_OUTPUT_BPP	include/configs/sama5d4ek.h	/^#define LCD_OUTPUT_BPP /;"	d
LCD_PADDR	drivers/video/sed156x.c	/^#define LCD_PADDR	/;"	d	file:
LCD_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define LCD_PAD_CTRL /;"	d	file:
LCD_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define LCD_PAD_CTRL /;"	d	file:
LCD_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define LCD_PAD_CTRL /;"	d	file:
LCD_PAD_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define LCD_PAD_CTRL /;"	d	file:
LCD_PAGES	drivers/video/sed156x.c	/^#define LCD_PAGES	/;"	d	file:
LCD_PALETTE_LOAD_MODE	drivers/video/da8xx-fb.c	/^#define LCD_PALETTE_LOAD_MODE(/;"	d	file:
LCD_PALMODE_RAWDATA	drivers/video/am335x-fb.c	/^#define LCD_PALMODE_RAWDATA	/;"	d	file:
LCD_PBS	include/SA-1100.h	/^#define LCD_PBS	/;"	d
LCD_PBlue	include/SA-1100.h	/^#define LCD_PBlue	/;"	d
LCD_PEntrySp	include/SA-1100.h	/^#define LCD_PEntrySp	/;"	d
LCD_PGreen	include/SA-1100.h	/^#define LCD_PGreen	/;"	d
LCD_PGrey	include/SA-1100.h	/^#define LCD_PGrey	/;"	d
LCD_PIXEL_SIZE	board/bf527-ezkit/video.c	/^#define LCD_PIXEL_SIZE	/;"	d	file:
LCD_PIXEL_SIZE	board/bf548-ezkit/video.c	/^#define LCD_PIXEL_SIZE	/;"	d	file:
LCD_PIXEL_SIZE	board/cm-bf548/video.c	/^#define LCD_PIXEL_SIZE	/;"	d	file:
LCD_PL_LOAD_DONE	drivers/video/da8xx-fb.c	/^#define LCD_PL_LOAD_DONE	/;"	d	file:
LCD_PON_PIN	board/teejet/mt_ventoux/mt_ventoux.c	/^#define LCD_PON_PIN	/;"	d	file:
LCD_POWERM	drivers/video/sed156x.c	/^#define LCD_POWERM	/;"	d	file:
LCD_PPB	drivers/video/sed156x.c	/^#define LCD_PPB	/;"	d	file:
LCD_PREVP	drivers/video/sed156x.c	/^#define LCD_PREVP	/;"	d	file:
LCD_PRed	include/SA-1100.h	/^#define LCD_PRed	/;"	d
LCD_PUP_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define LCD_PUP_EN	/;"	d
LCD_PWR	board/BuR/brxre1/board.c	/^#define LCD_PWR	/;"	d	file:
LCD_PWR	board/teejet/mt_ventoux/mt_ventoux.c	/^#define LCD_PWR	/;"	d	file:
LCD_PWRBSTR	drivers/video/sed156x.c	/^#define LCD_PWRBSTR	/;"	d	file:
LCD_PWRMD	drivers/video/sed156x.c	/^#define LCD_PWRMD	/;"	d	file:
LCD_PWRVFOL	drivers/video/sed156x.c	/^#define LCD_PWRVFOL	/;"	d	file:
LCD_PWRVREG	drivers/video/sed156x.c	/^#define LCD_PWRVREG	/;"	d	file:
LCD_PWR_EN	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	LCD_PWR_EN,$/;"	e	enum:qn	file:
LCD_RASTER_ENABLE	drivers/video/am335x-fb.c	/^#define LCD_RASTER_ENABLE	/;"	d	file:
LCD_RASTER_ENABLE	drivers/video/da8xx-fb.c	/^#define LCD_RASTER_ENABLE	/;"	d	file:
LCD_RASTER_MODE	drivers/video/am335x-fb.c	/^#define LCD_RASTER_MODE	/;"	d	file:
LCD_RASTER_MODE	drivers/video/da8xx-fb.c	/^#define LCD_RASTER_MODE	/;"	d	file:
LCD_RASTER_ORDER	drivers/video/da8xx-fb.c	/^#define LCD_RASTER_ORDER	/;"	d	file:
LCD_RESET	drivers/video/sed156x.c	/^#define LCD_RESET	/;"	d	file:
LCD_RESRT	drivers/video/sed156x.c	/^#define LCD_RESRT	/;"	d	file:
LCD_RRATIO	drivers/video/sed156x.c	/^#define LCD_RRATIO	/;"	d	file:
LCD_SIOFF	drivers/video/sed156x.c	/^#define LCD_SIOFF	/;"	d	file:
LCD_SION	drivers/video/sed156x.c	/^#define LCD_SION	/;"	d	file:
LCD_SIS_BL	drivers/video/sed156x.c	/^#define LCD_SIS_BL	/;"	d	file:
LCD_SIS_OFF	drivers/video/sed156x.c	/^#define LCD_SIS_OFF	/;"	d	file:
LCD_SIS_ON	drivers/video/sed156x.c	/^#define LCD_SIS_ON	/;"	d	file:
LCD_SIS_RBL	drivers/video/sed156x.c	/^#define LCD_SIS_RBL	/;"	d	file:
LCD_STN_565_ENABLE	drivers/video/da8xx-fb.c	/^#define LCD_STN_565_ENABLE	/;"	d	file:
LCD_SYNC_CTRL	drivers/video/da8xx-fb.c	/^#define LCD_SYNC_CTRL	/;"	d	file:
LCD_SYNC_EDGE	drivers/video/da8xx-fb.c	/^#define LCD_SYNC_EDGE	/;"	d	file:
LCD_SYNC_LOST	drivers/video/da8xx-fb.c	/^#define LCD_SYNC_LOST	/;"	d	file:
LCD_S_ADC	drivers/video/sed156x.c	/^#define LCD_S_ADC	/;"	d	file:
LCD_S_BUSY	drivers/video/sed156x.c	/^#define LCD_S_BUSY	/;"	d	file:
LCD_S_ONOFF	drivers/video/sed156x.c	/^#define LCD_S_ONOFF	/;"	d	file:
LCD_S_RESET	drivers/video/sed156x.c	/^#define LCD_S_RESET	/;"	d	file:
LCD_TEST	drivers/video/sed156x.c	/^#define LCD_TEST	/;"	d	file:
LCD_TEXT_HEIGHT	drivers/video/sed156x.c	/^#define LCD_TEXT_HEIGHT /;"	d	file:
LCD_TEXT_WIDTH	drivers/video/sed156x.c	/^#define LCD_TEXT_WIDTH	/;"	d	file:
LCD_TFT_24BPP_MODE	drivers/video/am335x-fb.c	/^#define LCD_TFT_24BPP_MODE	/;"	d	file:
LCD_TFT_24BPP_UNPACK	drivers/video/am335x-fb.c	/^#define LCD_TFT_24BPP_UNPACK	/;"	d	file:
LCD_TFT_ALT_ENABLE	drivers/video/da8xx-fb.c	/^#define LCD_TFT_ALT_ENABLE	/;"	d	file:
LCD_TFT_MODE	drivers/video/am335x-fb.c	/^#define LCD_TFT_MODE	/;"	d	file:
LCD_TFT_MODE	drivers/video/da8xx-fb.c	/^#define LCD_TFT_MODE	/;"	d	file:
LCD_V1_END_OF_FRAME_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V1_END_OF_FRAME_INT_ENA	/;"	d	file:
LCD_V1_PL_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V1_PL_INT_ENA	/;"	d	file:
LCD_V1_UNDERFLOW_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V1_UNDERFLOW_INT_ENA	/;"	d	file:
LCD_V2_CORE_CLK_EN	drivers/video/da8xx-fb.c	/^#define LCD_V2_CORE_CLK_EN	/;"	d	file:
LCD_V2_DMA_CLK_EN	drivers/video/da8xx-fb.c	/^#define LCD_V2_DMA_CLK_EN	/;"	d	file:
LCD_V2_END_OF_FRAME0_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V2_END_OF_FRAME0_INT_ENA	/;"	d	file:
LCD_V2_END_OF_FRAME1_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V2_END_OF_FRAME1_INT_ENA	/;"	d	file:
LCD_V2_LIDD_CLK_EN	drivers/video/da8xx-fb.c	/^#define LCD_V2_LIDD_CLK_EN	/;"	d	file:
LCD_V2_LPP_B10	drivers/video/da8xx-fb.c	/^#define LCD_V2_LPP_B10	/;"	d	file:
LCD_V2_PL_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V2_PL_INT_ENA	/;"	d	file:
LCD_V2_TFT_24BPP_MODE	drivers/video/da8xx-fb.c	/^#define LCD_V2_TFT_24BPP_MODE	/;"	d	file:
LCD_V2_TFT_24BPP_UNPACK	drivers/video/da8xx-fb.c	/^#define LCD_V2_TFT_24BPP_UNPACK	/;"	d	file:
LCD_V2_UNDERFLOW_INT_ENA	drivers/video/da8xx-fb.c	/^#define LCD_V2_UNDERFLOW_INT_ENA	/;"	d	file:
LCD_VBP	drivers/video/am335x-fb.c	/^#define LCD_VBP(/;"	d	file:
LCD_VERLSB	drivers/video/am335x-fb.c	/^#define LCD_VERLSB(/;"	d	file:
LCD_VERMSB	drivers/video/am335x-fb.c	/^#define LCD_VERMSB(/;"	d	file:
LCD_VERSION_1	drivers/video/da8xx-fb.c	/^#define LCD_VERSION_1	/;"	d	file:
LCD_VERSION_2	drivers/video/da8xx-fb.c	/^#define LCD_VERSION_2	/;"	d	file:
LCD_VFP	drivers/video/am335x-fb.c	/^#define LCD_VFP(/;"	d	file:
LCD_VSW	drivers/video/am335x-fb.c	/^#define LCD_VSW(/;"	d	file:
LCD_WIDTH	drivers/video/sed156x.c	/^#define LCD_WIDTH	/;"	d	file:
LCD_X_RES	board/bf527-ezkit/video.c	/^#define LCD_X_RES	/;"	d	file:
LCD_X_RES	board/bf548-ezkit/video.c	/^#define LCD_X_RES	/;"	d	file:
LCD_X_RES	board/cm-bf548/video.c	/^#define LCD_X_RES	/;"	d	file:
LCD_Y_RES	board/bf527-ezkit/video.c	/^#define LCD_Y_RES	/;"	d	file:
LCD_Y_RES	board/bf548-ezkit/video.c	/^#define LCD_Y_RES	/;"	d	file:
LCD_Y_RES	board/cm-bf548/video.c	/^#define LCD_Y_RES	/;"	d	file:
LCHCC_CUR_COL_B	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCHCC_CUR_COL_B(/;"	d
LCHCC_CUR_COL_G	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCHCC_CUR_COL_G(/;"	d
LCHCC_CUR_COL_R	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCHCC_CUR_COL_R(/;"	d
LCHCR_AT	include/lcdvideo.h	/^#define LCHCR_AT	/;"	d
LCHCR_AT_BIT	include/lcdvideo.h	/^#define LCHCR_AT_BIT	/;"	d
LCHCR_BO	include/lcdvideo.h	/^#define LCHCR_BO	/;"	d
LCHCR_HPC	include/lcdvideo.h	/^#define LCHCR_HPC	/;"	d
LCHCR_HPC_BIT	include/lcdvideo.h	/^#define LCHCR_HPC_BIT	/;"	d
LCHCR_WBL	include/lcdvideo.h	/^#define LCHCR_WBL	/;"	d
LCHCR_WBL_BIT	include/lcdvideo.h	/^#define LCHCR_WBL_BIT	/;"	d
LCKFRQ	include/sym53c8xx.h	/^	#define LCKFRQ /;"	d
LCL_ACR_DBGD	include/mpc8260.h	/^#define LCL_ACR_DBGD	/;"	d
LCL_ACR_PRKM_CPMH	include/mpc8260.h	/^#define LCL_ACR_PRKM_CPMH /;"	d
LCL_ACR_PRKM_CPML	include/mpc8260.h	/^#define LCL_ACR_PRKM_CPML /;"	d
LCL_ACR_PRKM_CPMM	include/mpc8260.h	/^#define LCL_ACR_PRKM_CPMM /;"	d
LCL_ACR_PRKM_HOST	include/mpc8260.h	/^#define LCL_ACR_PRKM_HOST /;"	d
LCL_ACR_PRKM_MSK	include/mpc8260.h	/^#define LCL_ACR_PRKM_MSK /;"	d
LCL_ALRH_PF0_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF0_MSK /;"	d
LCL_ALRH_PF1_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF1_MSK /;"	d
LCL_ALRH_PF2_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF2_MSK /;"	d
LCL_ALRH_PF3_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF3_MSK /;"	d
LCL_ALRH_PF4_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF4_MSK /;"	d
LCL_ALRH_PF5_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF5_MSK /;"	d
LCL_ALRH_PF6_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF6_MSK /;"	d
LCL_ALRH_PF7_MSK	include/mpc8260.h	/^#define LCL_ALRH_PF7_MSK /;"	d
LCL_ALRL_PF10_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF10_MSK /;"	d
LCL_ALRL_PF11_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF11_MSK /;"	d
LCL_ALRL_PF12_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF12_MSK /;"	d
LCL_ALRL_PF13_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF13_MSK /;"	d
LCL_ALRL_PF14_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF14_MSK /;"	d
LCL_ALRL_PF15_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF15_MSK /;"	d
LCL_ALRL_PF8_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF8_MSK /;"	d
LCL_ALRL_PF9_MSK	include/mpc8260.h	/^#define LCL_ALRL_PF9_MSK /;"	d
LCOUNT	include/lattice.h	/^#define LCOUNT	/;"	d
LCRR_BUFCMDC	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_BUFCMDC	/;"	d
LCRR_BUFCMDC_1	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_BUFCMDC_1	/;"	d
LCRR_BUFCMDC_2	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_BUFCMDC_2	/;"	d
LCRR_BUFCMDC_3	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_BUFCMDC_3	/;"	d
LCRR_BUFCMDC_4	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_BUFCMDC_4	/;"	d
LCRR_BUFCMDC_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_BUFCMDC_SHIFT	/;"	d
LCRR_CLKDIV	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV	/;"	d
LCRR_CLKDIV_16	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV_16	/;"	d
LCRR_CLKDIV_2	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV_2	/;"	d
LCRR_CLKDIV_32	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV_32	/;"	d
LCRR_CLKDIV_4	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV_4	/;"	d
LCRR_CLKDIV_8	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV_8	/;"	d
LCRR_CLKDIV_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_CLKDIV_SHIFT	/;"	d
LCRR_DBYP	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_DBYP	/;"	d
LCRR_DBYP_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_DBYP_SHIFT	/;"	d
LCRR_EADC	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_EADC	/;"	d
LCRR_EADC_1	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_EADC_1	/;"	d
LCRR_EADC_2	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_EADC_2	/;"	d
LCRR_EADC_3	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_EADC_3	/;"	d
LCRR_EADC_4	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_EADC_4	/;"	d
LCRR_EADC_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_EADC_SHIFT	/;"	d
LCRR_ECL	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_ECL	/;"	d
LCRR_ECL_4	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_ECL_4	/;"	d
LCRR_ECL_5	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_ECL_5	/;"	d
LCRR_ECL_6	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_ECL_6	/;"	d
LCRR_ECL_7	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_ECL_7	/;"	d
LCRR_ECL_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LCRR_ECL_SHIFT	/;"	d
LCR_DLAB	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_DLAB	/;"	d
LCR_EPS	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_EPS	/;"	d
LCR_MASK	drivers/serial/serial_uniphier.c	/^#define LCR_MASK	/;"	d	file:
LCR_PEN	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_PEN	/;"	d
LCR_SB	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_SB	/;"	d
LCR_SHIFT	drivers/serial/serial_uniphier.c	/^#define LCR_SHIFT	/;"	d	file:
LCR_STB	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_STB	/;"	d
LCR_STKYP	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_STKYP	/;"	d
LCR_WLS0	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_WLS0	/;"	d
LCR_WLS1	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LCR_WLS1	/;"	d
LCSR	include/SA-1100.h	/^#define LCSR	/;"	d
LCSR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0	/;"	d
LCSR0_ABC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_ABC	/;"	d
LCSR0_BER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_BER	/;"	d
LCSR0_BS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_BS	/;"	d
LCSR0_EOF0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_EOF0	/;"	d
LCSR0_IUL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_IUL	/;"	d
LCSR0_IUU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_IUU	/;"	d
LCSR0_LDD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_LDD	/;"	d
LCSR0_OU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_OU	/;"	d
LCSR0_QD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_QD	/;"	d
LCSR0_SINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_SINT	/;"	d
LCSR0_SOF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR0_SOF	/;"	d
LCSR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1	/;"	d
LCSR1_BS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_BS1	/;"	d
LCSR1_BS2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_BS2	/;"	d
LCSR1_BS3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_BS3	/;"	d
LCSR1_BS4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_BS4	/;"	d
LCSR1_BS5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_BS5	/;"	d
LCSR1_BS6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_BS6	/;"	d
LCSR1_EOF1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_EOF1	/;"	d
LCSR1_EOF2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_EOF2	/;"	d
LCSR1_EOF3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_EOF3	/;"	d
LCSR1_EOF4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_EOF4	/;"	d
LCSR1_EOF5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_EOF5	/;"	d
LCSR1_EOF6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_EOF6	/;"	d
LCSR1_IU2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_IU2	/;"	d
LCSR1_IU3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_IU3	/;"	d
LCSR1_IU4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_IU4	/;"	d
LCSR1_IU5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_IU5	/;"	d
LCSR1_IU6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_IU6	/;"	d
LCSR1_SOF1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_SOF1	/;"	d
LCSR1_SOF2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_SOF2	/;"	d
LCSR1_SOF3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_SOF3	/;"	d
LCSR1_SOF4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_SOF4	/;"	d
LCSR1_SOF5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_SOF5	/;"	d
LCSR1_SOF6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LCSR1_SOF6	/;"	d
LCSR_ABC	include/SA-1100.h	/^#define LCSR_ABC	/;"	d
LCSR_BAU	include/SA-1100.h	/^#define LCSR_BAU	/;"	d
LCSR_BER	include/SA-1100.h	/^#define LCSR_BER	/;"	d
LCSR_IOL	include/SA-1100.h	/^#define LCSR_IOL	/;"	d
LCSR_IOU	include/SA-1100.h	/^#define LCSR_IOU	/;"	d
LCSR_IUL	include/SA-1100.h	/^#define LCSR_IUL	/;"	d
LCSR_IUU	include/SA-1100.h	/^#define LCSR_IUU	/;"	d
LCSR_LDD	include/SA-1100.h	/^#define LCSR_LDD	/;"	d
LCSR_OOL	include/SA-1100.h	/^#define LCSR_OOL	/;"	d
LCSR_OOU	include/SA-1100.h	/^#define LCSR_OOU	/;"	d
LCSR_OUL	include/SA-1100.h	/^#define LCSR_OUL	/;"	d
LCSR_OUU	include/SA-1100.h	/^#define LCSR_OUU	/;"	d
LCTRE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	LCTRE	/;"	d
LCVCR_LCD_AC	include/lcdvideo.h	/^#define LCVCR_LCD_AC	/;"	d
LCVCR_LCD_AC_BIT	include/lcdvideo.h	/^#define LCVCR_LCD_AC_BIT /;"	d
LCVCR_VPC	include/lcdvideo.h	/^#define LCVCR_VPC	/;"	d
LCVCR_VPC_BIT	include/lcdvideo.h	/^#define LCVCR_VPC_BIT	/;"	d
LCVCR_VPW	include/lcdvideo.h	/^#define LCVCR_VPW	/;"	d
LCVCR_VPW_BIT	include/lcdvideo.h	/^#define LCVCR_VPW_BIT	/;"	d
LCVCR_WBF	include/lcdvideo.h	/^#define LCVCR_WBF	/;"	d
LCWHB_BD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCWHB_BD(/;"	d
LCWHB_BK_EN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCWHB_BK_EN /;"	d
LCWHB_CH	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCWHB_CH(/;"	d
LCWHB_CW	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LCWHB_CW(/;"	d
LC_COLLATE	Makefile	/^LC_COLLATE=C$/;"	m
LC_NUMERIC	Makefile	/^LC_NUMERIC=C$/;"	m
LD	Makefile	/^LD		= $(CROSS_COMPILE)ld$/;"	m
LD	Makefile	/^LD		= $(CROSS_COMPILE)ld.bfd$/;"	m
LDA0	arch/sh/include/asm/cpu_sh7780.h	/^#define	LDA0	/;"	d
LDA1	arch/sh/include/asm/cpu_sh7780.h	/^#define	LDA1	/;"	d
LDBG	drivers/usb/gadget/storage_common.c	/^#define LDBG(/;"	d	file:
LDCMBK1R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMBK1R /;"	d
LDCMBK2R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMBK2R /;"	d
LDCMBKCMYR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMBKCMYR /;"	d
LDCMBKRGBR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMBKRGBR /;"	d
LDCMCNTR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMCNTR /;"	d
LDCMD0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD0	/;"	d
LDCMD1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD1	/;"	d
LDCMD2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD2	/;"	d
LDCMD3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD3	/;"	d
LDCMD4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD4	/;"	d
LDCMD5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD5	/;"	d
LDCMDTHR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMDTHR /;"	d
LDCMD_EOFINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD_EOFINT	/;"	d
LDCMD_PAL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD_PAL	/;"	d
LDCMD_SOFINT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LDCMD_SOFINT	/;"	d
LDCMGK1R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMGK1R /;"	d
LDCMGK2R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMGK2R /;"	d
LDCMGKCMYR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMGKCMYR /;"	d
LDCMGKRGBR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMGKRGBR /;"	d
LDCMHKPR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMHKPR /;"	d
LDCMHKQR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMHKQR /;"	d
LDCMRK1R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMRK1R /;"	d
LDCMRK2R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMRK2R /;"	d
LDCMRKCMYR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMRKCMYR /;"	d
LDCMRKRGBR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMRKRGBR /;"	d
LDCMSELR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMSELR /;"	d
LDCMTVR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMTVR /;"	d
LDCMTVSELR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCMTVSELR /;"	d
LDCNT1R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCNT1R /;"	d
LDCNT2R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDCNT2R /;"	d
LDDCKR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDCKR /;"	d
LDDCKSTPR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDCKSTPR /;"	d
LDDDSR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDDSR /;"	d
LDDRAR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDRAR /;"	d
LDDRDR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDRDR /;"	d
LDDWAR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWAR /;"	d
LDDWD0R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD0R /;"	d
LDDWD1R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD1R /;"	d
LDDWD2R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD2R /;"	d
LDDWD3R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD3R /;"	d
LDDWD4R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD4R /;"	d
LDDWD5R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD5R /;"	d
LDDWD6R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD6R /;"	d
LDDWD7R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD7R /;"	d
LDDWD8R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD8R /;"	d
LDDWD9R	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWD9R /;"	d
LDDWDAR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWDAR /;"	d
LDDWDBR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWDBR /;"	d
LDDWDCR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWDCR /;"	d
LDDWDDR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWDDR /;"	d
LDDWDER	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWDER /;"	d
LDDWDFR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDDWDFR /;"	d
LDELAY	arch/arm/include/asm/arch-am33xx/clock.h	/^#define LDELAY /;"	d
LDELAY	arch/arm/include/asm/arch-omap3/clock.h	/^#define LDELAY	/;"	d
LDELAY	arch/arm/include/asm/arch-omap4/clock.h	/^#define LDELAY	/;"	d
LDELAY	arch/arm/include/asm/arch-omap5/clock.h	/^#define LDELAY	/;"	d
LDELAY	include/lattice.h	/^#define LDELAY	/;"	d
LDEV_FDC	include/ns87308.h	/^#define LDEV_FDC /;"	d
LDEV_GPIO	include/ns87308.h	/^#define LDEV_GPIO /;"	d
LDEV_KBC1	include/ns87308.h	/^#define LDEV_KBC1 /;"	d
LDEV_KBC2	include/ns87308.h	/^#define LDEV_KBC2 /;"	d
LDEV_MOUSE	include/ns87308.h	/^#define LDEV_MOUSE /;"	d
LDEV_PARP	include/ns87308.h	/^#define LDEV_PARP /;"	d
LDEV_POWRMAN	include/ns87308.h	/^#define LDEV_POWRMAN /;"	d
LDEV_RTC_APC	include/ns87308.h	/^#define LDEV_RTC_APC /;"	d
LDEV_UART1	include/ns87308.h	/^#define LDEV_UART1 /;"	d
LDEV_UART2	include/ns87308.h	/^#define LDEV_UART2 /;"	d
LDFLAGS	config.mk	/^LDFLAGS :=$/;"	m
LDFLAGS_EFI_PAYLOAD	arch/x86/config.mk	/^LDFLAGS_EFI_PAYLOAD := -Bsymbolic -Bsymbolic-functions -shared --no-undefined$/;"	m
LDFLAGS_FINAL	arch/sh/config.mk	/^LDFLAGS_FINAL = --gc-sections$/;"	m
LDFLAGS_FINAL	config.mk	/^LDFLAGS_FINAL :=$/;"	m
LDFLAGS_u-boot	arch/avr32/config.mk	/^LDFLAGS_u-boot		= --gc-sections --relax$/;"	m
LDFLAGS_u-boot	arch/nds32/config.mk	/^LDFLAGS_u-boot		= --gc-sections --relax -pie$/;"	m
LDINTR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDINTR /;"	d
LDLEN_ENABLE_OSL_COUNT	drivers/crypto/fsl/desc.h	/^#define LDLEN_ENABLE_OSL_COUNT	/;"	d
LDLEN_RST_CHA_OFIFO_PTR	drivers/crypto/fsl/desc.h	/^#define LDLEN_RST_CHA_OFIFO_PTR	/;"	d
LDLEN_RST_OFIFO	drivers/crypto/fsl/desc.h	/^#define LDLEN_RST_OFIFO	/;"	d
LDLEN_SET_OFIFO_OFFSET_MASK	drivers/crypto/fsl/desc.h	/^#define LDLEN_SET_OFIFO_OFFSET_MASK	/;"	d
LDLEN_SET_OFIFO_OFFSET_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDLEN_SET_OFIFO_OFFSET_SHIFT	/;"	d
LDLEN_SET_OFIFO_OFF_RSVD	drivers/crypto/fsl/desc.h	/^#define LDLEN_SET_OFIFO_OFF_RSVD	/;"	d
LDLEN_SET_OFIFO_OFF_VALID	drivers/crypto/fsl/desc.h	/^#define LDLEN_SET_OFIFO_OFF_VALID	/;"	d
LDO1	test/dm/regulator.c	/^	LDO1,$/;"	e	enum:__anone475d93a0103	file:
LDO1_CTRL	include/palmas.h	/^#define LDO1_CTRL	/;"	d
LDO1_ON_VSEL	include/power/rk808_pmic.h	/^	LDO1_ON_VSEL			= 0x3b,$/;"	e	enum:__anon9b8afd0f0103
LDO1_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO1_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO1_VOLTAGE	include/palmas.h	/^#define LDO1_VOLTAGE	/;"	d
LDO2	test/dm/regulator.c	/^	LDO2,$/;"	e	enum:__anone475d93a0103	file:
LDO2_CTRL	include/palmas.h	/^#define LDO2_CTRL	/;"	d
LDO2_ON_VSEL	include/power/rk808_pmic.h	/^	LDO2_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO2_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO2_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO2_VOLTAGE	include/palmas.h	/^#define LDO2_VOLTAGE	/;"	d
LDO3_ON_VSEL	include/power/rk808_pmic.h	/^	LDO3_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO3_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO3_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO4_ON_VSEL	include/power/rk808_pmic.h	/^	LDO4_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO4_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO4_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO5_ON_VSEL	include/power/rk808_pmic.h	/^	LDO5_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO5_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO5_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO6_ON_VSEL	include/power/rk808_pmic.h	/^	LDO6_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO6_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO6_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO7_ON_VSEL	include/power/rk808_pmic.h	/^	LDO7_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO7_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO7_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO8_ON_VSEL	include/power/rk808_pmic.h	/^	LDO8_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO8_SLP_VSEL	include/power/rk808_pmic.h	/^	LDO8_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
LDO9_BYPASS	include/palmas.h	/^#define LDO9_BYPASS	/;"	d
LDO9_BYP_EN	include/palmas.h	/^#define LDO9_BYP_EN	/;"	d
LDO9_CTRL	include/palmas.h	/^#define LDO9_CTRL	/;"	d
LDO9_VOLTAGE	include/palmas.h	/^#define LDO9_VOLTAGE	/;"	d
LDOA_0_80V	include/power/pfuze100_pmic.h	/^#define LDOA_0_80V	/;"	d
LDOA_0_85V	include/power/pfuze100_pmic.h	/^#define LDOA_0_85V	/;"	d
LDOA_0_90V	include/power/pfuze100_pmic.h	/^#define LDOA_0_90V	/;"	d
LDOA_0_95V	include/power/pfuze100_pmic.h	/^#define LDOA_0_95V	/;"	d
LDOA_1_00V	include/power/pfuze100_pmic.h	/^#define LDOA_1_00V	/;"	d
LDOA_1_05V	include/power/pfuze100_pmic.h	/^#define LDOA_1_05V	/;"	d
LDOA_1_10V	include/power/pfuze100_pmic.h	/^#define LDOA_1_10V	/;"	d
LDOA_1_15V	include/power/pfuze100_pmic.h	/^#define LDOA_1_15V	/;"	d
LDOA_1_20V	include/power/pfuze100_pmic.h	/^#define LDOA_1_20V	/;"	d
LDOA_1_25V	include/power/pfuze100_pmic.h	/^#define LDOA_1_25V	/;"	d
LDOA_1_30V	include/power/pfuze100_pmic.h	/^#define LDOA_1_30V	/;"	d
LDOA_1_35V	include/power/pfuze100_pmic.h	/^#define LDOA_1_35V	/;"	d
LDOA_1_40V	include/power/pfuze100_pmic.h	/^#define LDOA_1_40V	/;"	d
LDOA_1_45V	include/power/pfuze100_pmic.h	/^#define LDOA_1_45V	/;"	d
LDOA_1_50V	include/power/pfuze100_pmic.h	/^#define LDOA_1_50V	/;"	d
LDOA_1_55V	include/power/pfuze100_pmic.h	/^#define LDOA_1_55V	/;"	d
LDOB_1_80V	include/power/pfuze100_pmic.h	/^#define LDOB_1_80V	/;"	d
LDOB_1_90V	include/power/pfuze100_pmic.h	/^#define LDOB_1_90V	/;"	d
LDOB_2_00V	include/power/pfuze100_pmic.h	/^#define LDOB_2_00V	/;"	d
LDOB_2_10V	include/power/pfuze100_pmic.h	/^#define LDOB_2_10V	/;"	d
LDOB_2_20V	include/power/pfuze100_pmic.h	/^#define LDOB_2_20V	/;"	d
LDOB_2_30V	include/power/pfuze100_pmic.h	/^#define LDOB_2_30V	/;"	d
LDOB_2_40V	include/power/pfuze100_pmic.h	/^#define LDOB_2_40V	/;"	d
LDOB_2_50V	include/power/pfuze100_pmic.h	/^#define LDOB_2_50V	/;"	d
LDOB_2_60V	include/power/pfuze100_pmic.h	/^#define LDOB_2_60V	/;"	d
LDOB_2_70V	include/power/pfuze100_pmic.h	/^#define LDOB_2_70V	/;"	d
LDOB_2_80V	include/power/pfuze100_pmic.h	/^#define LDOB_2_80V	/;"	d
LDOB_2_90V	include/power/pfuze100_pmic.h	/^#define LDOB_2_90V	/;"	d
LDOB_3_00V	include/power/pfuze100_pmic.h	/^#define LDOB_3_00V	/;"	d
LDOB_3_10V	include/power/pfuze100_pmic.h	/^#define LDOB_3_10V	/;"	d
LDOB_3_20V	include/power/pfuze100_pmic.h	/^#define LDOB_3_20V	/;"	d
LDOB_3_30V	include/power/pfuze100_pmic.h	/^#define LDOB_3_30V	/;"	d
LDOFF_CHG_NONSEQLIODN_MASK	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_NONSEQLIODN_MASK	/;"	d
LDOFF_CHG_NONSEQLIODN_NON_SEQ	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_NONSEQLIODN_NON_SEQ	/;"	d
LDOFF_CHG_NONSEQLIODN_SEQ	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_NONSEQLIODN_SEQ	/;"	d
LDOFF_CHG_NONSEQLIODN_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_NONSEQLIODN_SHIFT	/;"	d
LDOFF_CHG_NONSEQLIODN_TRUSTED	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_NONSEQLIODN_TRUSTED	/;"	d
LDOFF_CHG_SEQLIODN_MASK	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SEQLIODN_MASK	/;"	d
LDOFF_CHG_SEQLIODN_NON_SEQ	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SEQLIODN_NON_SEQ	/;"	d
LDOFF_CHG_SEQLIODN_SEQ	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SEQLIODN_SEQ	/;"	d
LDOFF_CHG_SEQLIODN_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SEQLIODN_SHIFT	/;"	d
LDOFF_CHG_SEQLIODN_TRUSTED	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SEQLIODN_TRUSTED	/;"	d
LDOFF_CHG_SHARE_MASK	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SHARE_MASK	/;"	d
LDOFF_CHG_SHARE_NEVER	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SHARE_NEVER	/;"	d
LDOFF_CHG_SHARE_OK_NO_PROP	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SHARE_OK_NO_PROP	/;"	d
LDOFF_CHG_SHARE_OK_PROP	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SHARE_OK_PROP	/;"	d
LDOFF_CHG_SHARE_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDOFF_CHG_SHARE_SHIFT	/;"	d
LDOFF_DISABLE_AUTO_NFIFO	drivers/crypto/fsl/desc.h	/^#define LDOFF_DISABLE_AUTO_NFIFO	/;"	d
LDOFF_ENABLE_AUTO_NFIFO	drivers/crypto/fsl/desc.h	/^#define LDOFF_ENABLE_AUTO_NFIFO	/;"	d
LDOSRAM_ACTMODE_VSET_IN_MASK	arch/arm/include/asm/arch-omap4/omap.h	/^#define LDOSRAM_ACTMODE_VSET_IN_MASK	/;"	d
LDOSRAM_ACTMODE_VSET_IN_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define LDOSRAM_ACTMODE_VSET_IN_MASK	/;"	d
LDOSRAM_VOLT_CTRL_OVERRIDE	arch/arm/include/asm/arch-omap4/omap.h	/^#define LDOSRAM_VOLT_CTRL_OVERRIDE	/;"	d
LDOSRAM_VOLT_CTRL_OVERRIDE	arch/arm/include/asm/arch-omap5/omap.h	/^#define LDOSRAM_VOLT_CTRL_OVERRIDE	/;"	d
LDOUSB_CTRL	include/palmas.h	/^#define LDOUSB_CTRL	/;"	d
LDOUSB_VOLTAGE	include/palmas.h	/^#define LDOUSB_VOLTAGE	/;"	d
LDO_ADE	include/power/max8997_pmic.h	/^#define LDO_ADE /;"	d
LDO_ARM	arch/arm/cpu/armv7/mx6/soc.c	/^	LDO_ARM,$/;"	e	enum:ldo_reg	file:
LDO_CNFG3	include/power/max77696_pmic.h	/^	LDO_CNFG3,$/;"	e	enum:__anoncca498ab0103
LDO_CTRL	include/palmas.h	/^#define LDO_CTRL	/;"	d
LDO_EN	include/power/pfuze100_pmic.h	/^#define LDO_EN	/;"	d
LDO_EN_MASK	include/power/act8846_pmic.h	/^#define LDO_EN_MASK /;"	d
LDO_INT1	include/power/max77696_pmic.h	/^	LDO_INT1,$/;"	e	enum:__anoncca498ab0103
LDO_INT1M	include/power/max77696_pmic.h	/^	LDO_INT1M,$/;"	e	enum:__anoncca498ab0103
LDO_INT2	include/power/max77696_pmic.h	/^	LDO_INT2,$/;"	e	enum:__anoncca498ab0103
LDO_INT2M	include/power/max77696_pmic.h	/^	LDO_INT2M,$/;"	e	enum:__anoncca498ab0103
LDO_MODE_MASK	drivers/power/regulator/palmas_regulator.c	/^#define	LDO_MODE_MASK	/;"	d	file:
LDO_MODE_MASK	include/power/pfuze100_pmic.h	/^#define LDO_MODE_MASK	/;"	d
LDO_MODE_OFF	include/power/pfuze100_pmic.h	/^#define LDO_MODE_OFF	/;"	d
LDO_MODE_ON	include/power/pfuze100_pmic.h	/^#define LDO_MODE_ON	/;"	d
LDO_MODE_SHIFT	drivers/power/regulator/palmas_regulator.c	/^#define	LDO_MODE_SHIFT	/;"	d	file:
LDO_MODE_SHIFT	include/power/pfuze100_pmic.h	/^#define LDO_MODE_SHIFT	/;"	d
LDO_OFF	include/power/max77686_pmic.h	/^	LDO_OFF = 0,$/;"	e	enum:__anon582827aa0303
LDO_OFF	include/power/max8997_pmic.h	/^	LDO_OFF = 0,$/;"	e	enum:__anonca676f190203
LDO_OFF	include/power/max8998_pmic.h	/^enum { LDO_OFF, LDO_ON };$/;"	e	enum:__anonb6a943fa0203
LDO_OM_COUNT	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_COUNT	/;"	d
LDO_OM_COUNT	include/power/sandbox_pmic.h	/^	LDO_OM_COUNT,$/;"	e	enum:__anon64fe6be10403
LDO_OM_OFF	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_OFF	/;"	d
LDO_OM_OFF	include/power/sandbox_pmic.h	/^	LDO_OM_OFF = 0,$/;"	e	enum:__anon64fe6be10403
LDO_OM_ON	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_ON	/;"	d
LDO_OM_ON	include/power/sandbox_pmic.h	/^	LDO_OM_ON,$/;"	e	enum:__anon64fe6be10403
LDO_OM_SLEEP	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_SLEEP	/;"	d
LDO_OM_SLEEP	include/power/sandbox_pmic.h	/^	LDO_OM_SLEEP,$/;"	e	enum:__anon64fe6be10403
LDO_OM_STANDBY	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	include/dt-bindings/pmic/sandbox_pmic.h	/^#define LDO_OM_STANDBY	/;"	d
LDO_OM_STANDBY	include/power/sandbox_pmic.h	/^	LDO_OM_STANDBY,$/;"	e	enum:__anon64fe6be10403
LDO_ON	include/power/max77686_pmic.h	/^	LDO_ON,$/;"	e	enum:__anon582827aa0303
LDO_ON	include/power/max8997_pmic.h	/^	LDO_ON = 1,$/;"	e	enum:__anonca676f190203
LDO_ON	include/power/max8998_pmic.h	/^enum { LDO_OFF, LDO_ON };$/;"	e	enum:__anonb6a943fa0203
LDO_OUTPUT_V_SEL_145	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LDO_OUTPUT_V_SEL_145	/;"	d
LDO_PU	arch/arm/cpu/armv7/mx6/soc.c	/^	LDO_PU,$/;"	e	enum:ldo_reg	file:
LDO_SOC	arch/arm/cpu/armv7/mx6/soc.c	/^	LDO_SOC,$/;"	e	enum:ldo_reg	file:
LDO_VOLT_1V8	include/palmas.h	/^#define LDO_VOLT_1V8	/;"	d
LDO_VOLT_3V0	include/palmas.h	/^#define LDO_VOLT_3V0	/;"	d
LDO_VOLT_3V3	include/palmas.h	/^#define LDO_VOLT_3V3	/;"	d
LDO_VOLT_OFF	include/palmas.h	/^#define LDO_VOLT_OFF	/;"	d
LDO_VOL_MASK	include/power/act8846_pmic.h	/^#define LDO_VOL_MASK /;"	d
LDO_VOL_MASK	include/power/pfuze100_pmic.h	/^#define LDO_VOL_MASK	/;"	d
LDPAA_DQ_STAT_EXPIRED	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_EXPIRED /;"	d
LDPAA_DQ_STAT_FORCEELIGIBLE	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_FORCEELIGIBLE /;"	d
LDPAA_DQ_STAT_FQEMPTY	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_FQEMPTY /;"	d
LDPAA_DQ_STAT_HELDACTIVE	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_HELDACTIVE /;"	d
LDPAA_DQ_STAT_ODPVALID	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_ODPVALID /;"	d
LDPAA_DQ_STAT_VALIDFRAME	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_VALIDFRAME /;"	d
LDPAA_DQ_STAT_VOLATILE	include/fsl-mc/fsl_dpaa_fd.h	/^#define LDPAA_DQ_STAT_VOLATILE /;"	d
LDPAA_ETH_10G_E	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	LDPAA_ETH_10G_E,$/;"	e	enum:ldpaa_eth_type
LDPAA_ETH_1G_E	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	LDPAA_ETH_1G_E,$/;"	e	enum:ldpaa_eth_type
LDPAA_ETH_BUF_ALIGN	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_BUF_ALIGN	/;"	d
LDPAA_ETH_FAS_BC	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_BC	/;"	d
LDPAA_ETH_FAS_BLE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_BLE	/;"	d
LDPAA_ETH_FAS_DISC	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_DISC	/;"	d
LDPAA_ETH_FAS_EOFHE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_EOFHE	/;"	d
LDPAA_ETH_FAS_FLE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_FLE	/;"	d
LDPAA_ETH_FAS_FPE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_FPE	/;"	d
LDPAA_ETH_FAS_ISP	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_ISP	/;"	d
LDPAA_ETH_FAS_KSE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_KSE	/;"	d
LDPAA_ETH_FAS_L3CE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_L3CE	/;"	d
LDPAA_ETH_FAS_L3CV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_L3CV	/;"	d
LDPAA_ETH_FAS_L4CE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_L4CE	/;"	d
LDPAA_ETH_FAS_L4CV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_L4CV	/;"	d
LDPAA_ETH_FAS_MC	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_MC	/;"	d
LDPAA_ETH_FAS_MNLE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_MNLE	/;"	d
LDPAA_ETH_FAS_MS	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_MS	/;"	d
LDPAA_ETH_FAS_PHE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_PHE	/;"	d
LDPAA_ETH_FAS_PIEE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_PIEE	/;"	d
LDPAA_ETH_FAS_PTE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_PTE	/;"	d
LDPAA_ETH_FAS_PTP	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_PTP	/;"	d
LDPAA_ETH_FAS_TIDE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_FAS_TIDE	/;"	d
LDPAA_ETH_NUM_BUFS	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_NUM_BUFS	/;"	d
LDPAA_ETH_REFILL_THRESH	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_REFILL_THRESH	/;"	d
LDPAA_ETH_RX_BUFFER_SIZE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_RX_BUFFER_SIZE	/;"	d
LDPAA_ETH_RX_ERR_MASK	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_RX_ERR_MASK	/;"	d
LDPAA_ETH_RX_UNSUPP_MASK	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_RX_UNSUPP_MASK	/;"	d
LDPAA_ETH_SWA_SIZE	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_SWA_SIZE	/;"	d
LDPAA_ETH_TXCONF_ERR_MASK	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_ETH_TXCONF_ERR_MASK	/;"	d
LDPAA_FD_CTRL_ASAL	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_CTRL_ASAL	/;"	d
LDPAA_FD_CTRL_PTA	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_CTRL_PTA	/;"	d
LDPAA_FD_CTRL_PTV1	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_CTRL_PTV1	/;"	d
LDPAA_FD_FRC_FAEADV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_FRC_FAEADV	/;"	d
LDPAA_FD_FRC_FAIADV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_FRC_FAIADV	/;"	d
LDPAA_FD_FRC_FAICFDV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_FRC_FAICFDV	/;"	d
LDPAA_FD_FRC_FAPRV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_FRC_FAPRV	/;"	d
LDPAA_FD_FRC_FASV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_FRC_FASV	/;"	d
LDPAA_FD_FRC_FASWOV	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define LDPAA_FD_FRC_FASWOV	/;"	d
LDPALCR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDPALCR /;"	d
LDPR00	arch/sh/include/asm/cpu_sh7722.h	/^#define LDPR00 /;"	d
LDR	Makefile	/^LDR		= $(CROSS_COMPILE)ldr$/;"	m
LDR1W_SHIFT	arch/arm/lib/memcpy.S	/^#define LDR1W_SHIFT	/;"	d	file:
LDRCNTR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDRCNTR /;"	d
LDRCR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDRCR /;"	d
LDRV	drivers/usb/host/r8a66597.h	/^#define	LDRV	/;"	d
LDR_FLAGS-BFIN_BOOT_FIFO	board/bf548-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_FIFO       := --dma 1$/;"	m
LDR_FLAGS-BFIN_BOOT_FIFO	board/cm-bf548/config.mk	/^LDR_FLAGS-BFIN_BOOT_FIFO       := --dma 1$/;"	m
LDR_FLAGS-BFIN_BOOT_NAND	board/bf548-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_NAND       := --dma 6$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf527-sdp/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 6$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf533-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf533-stamp/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf537-stamp/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf538f-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf548-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA       := --dma 6$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf561-acvilon/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/bf561-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/cm-bf533/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/cm-bf537e/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/cm-bf537u/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/cm-bf548/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA       := --dma 6$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/cm-bf561/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/ibf-dsp561/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/ip04/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_PARA	board/tcm-bf537/config.mk	/^LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8$/;"	m
LDR_FLAGS-BFIN_BOOT_SPI_MASTER	board/bf548-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_SPI_MASTER := --dma 1$/;"	m
LDR_FLAGS-BFIN_BOOT_SPI_MASTER	board/cm-bf548/config.mk	/^LDR_FLAGS-BFIN_BOOT_SPI_MASTER := --dma 1$/;"	m
LDR_FLAGS-BFIN_BOOT_UART	board/bf537-minotaur/config.mk	/^LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6$/;"	m
LDR_FLAGS-BFIN_BOOT_UART	board/bf537-srv1/config.mk	/^LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6$/;"	m
LDR_FLAGS-BFIN_BOOT_UART	board/bf537-stamp/config.mk	/^LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6$/;"	m
LDR_FLAGS-BFIN_BOOT_UART	board/bf548-ezkit/config.mk	/^LDR_FLAGS-BFIN_BOOT_UART       := --dma 1$/;"	m
LDR_FLAGS-BFIN_BOOT_UART	board/cm-bf548/config.mk	/^LDR_FLAGS-BFIN_BOOT_UART       := --dma 1$/;"	m
LDR_FLAGS-BFIN_BOOT_UART	board/ip04/config.mk	/^LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6$/;"	m
LDR_FLAGS-y	arch/blackfin/config.mk	/^LDR_FLAGS-y :=$/;"	m
LDSC	include/sym53c8xx.h	/^  #define   LDSC /;"	d
LDSCRIPT	Makefile	/^		LDSCRIPT := $(srctree)\/$(CONFIG_SYS_LDSCRIPT:"%"=%)$/;"	m
LDSCRIPT	Makefile	/^		LDSCRIPT := $(srctree)\/$(CPUDIR)\/u-boot.lds$/;"	m
LDSCRIPT	Makefile	/^		LDSCRIPT := $(srctree)\/arch\/$(ARCH)\/cpu\/u-boot.lds$/;"	m
LDSCRIPT	Makefile	/^		LDSCRIPT := $(srctree)\/board\/$(BOARDDIR)\/u-boot.lds$/;"	m
LDSCRIPT	arch/x86/config.mk	/^LDSCRIPT := $(LDSCRIPT_EFI)$/;"	m
LDSCRIPT_EFI	arch/x86/config.mk	/^LDSCRIPT_EFI := $(srctree)\/$(CPUDIR)\/efi\/elf_$(EFIARCH)_efi.lds$/;"	m
LDSR	arch/sh/include/asm/cpu_sh7722.h	/^#define LDSR /;"	d
LDSTCR	arch/powerpc/include/asm/processor.h	/^#define LDSTCR	/;"	d
LDST_CLASS_1_CCB	drivers/crypto/fsl/desc.h	/^#define LDST_CLASS_1_CCB	/;"	d
LDST_CLASS_2_CCB	drivers/crypto/fsl/desc.h	/^#define LDST_CLASS_2_CCB	/;"	d
LDST_CLASS_DECO	drivers/crypto/fsl/desc.h	/^#define LDST_CLASS_DECO	/;"	d
LDST_CLASS_IND_CCB	drivers/crypto/fsl/desc.h	/^#define LDST_CLASS_IND_CCB	/;"	d
LDST_CLASS_MASK	drivers/crypto/fsl/desc.h	/^#define LDST_CLASS_MASK	/;"	d
LDST_CLASS_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDST_CLASS_SHIFT	/;"	d
LDST_IMM	drivers/crypto/fsl/desc.h	/^#define LDST_IMM	/;"	d
LDST_IMM_MASK	drivers/crypto/fsl/desc.h	/^#define LDST_IMM_MASK	/;"	d
LDST_IMM_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDST_IMM_SHIFT	/;"	d
LDST_LEN_MASK	drivers/crypto/fsl/desc.h	/^#define LDST_LEN_MASK	/;"	d
LDST_LEN_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDST_LEN_SHIFT	/;"	d
LDST_OFFSET_MASK	drivers/crypto/fsl/desc.h	/^#define LDST_OFFSET_MASK	/;"	d
LDST_OFFSET_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDST_OFFSET_SHIFT	/;"	d
LDST_SGF	drivers/crypto/fsl/desc.h	/^#define LDST_SGF	/;"	d
LDST_SRCDST_BYTE_CONTEXT	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_BYTE_CONTEXT	/;"	d
LDST_SRCDST_BYTE_INFIFO	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_BYTE_INFIFO	/;"	d
LDST_SRCDST_BYTE_KEY	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_BYTE_KEY	/;"	d
LDST_SRCDST_BYTE_OUTFIFO	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_BYTE_OUTFIFO	/;"	d
LDST_SRCDST_MASK	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_MASK	/;"	d
LDST_SRCDST_SHIFT	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_SHIFT	/;"	d
LDST_SRCDST_WORD_ALTDS_CLASS1	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_ALTDS_CLASS1	/;"	d
LDST_SRCDST_WORD_CHACTRL	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_CHACTRL	/;"	d
LDST_SRCDST_WORD_CLASS1_ICV_SZ	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_CLASS1_ICV_SZ	/;"	d
LDST_SRCDST_WORD_CLASS_CTX	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_CLASS_CTX	/;"	d
LDST_SRCDST_WORD_CLRW	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_CLRW	/;"	d
LDST_SRCDST_WORD_DATASZ_REG	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DATASZ_REG	/;"	d
LDST_SRCDST_WORD_DECOCTRL	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECOCTRL	/;"	d
LDST_SRCDST_WORD_DECO_AAD_SZ	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECO_AAD_SZ	/;"	d
LDST_SRCDST_WORD_DECO_MATH0	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECO_MATH0	/;"	d
LDST_SRCDST_WORD_DECO_MATH1	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECO_MATH1	/;"	d
LDST_SRCDST_WORD_DECO_MATH2	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECO_MATH2	/;"	d
LDST_SRCDST_WORD_DECO_MATH3	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECO_MATH3	/;"	d
LDST_SRCDST_WORD_DECO_PCLOVRD	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DECO_PCLOVRD	/;"	d
LDST_SRCDST_WORD_DESCBUF	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DESCBUF	/;"	d
LDST_SRCDST_WORD_DESCBUF_JOB	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DESCBUF_JOB	/;"	d
LDST_SRCDST_WORD_DESCBUF_JOB_WE	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DESCBUF_JOB_WE	/;"	d
LDST_SRCDST_WORD_DESCBUF_SHARED	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DESCBUF_SHARED	/;"	d
LDST_SRCDST_WORD_DESCBUF_SHARED_WE	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_DESCBUF_SHARED_WE /;"	d
LDST_SRCDST_WORD_ICVSZ_REG	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_ICVSZ_REG	/;"	d
LDST_SRCDST_WORD_INFO_FIFO	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_INFO_FIFO	/;"	d
LDST_SRCDST_WORD_IRQCTRL	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_IRQCTRL	/;"	d
LDST_SRCDST_WORD_KEYSZ_REG	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_KEYSZ_REG	/;"	d
LDST_SRCDST_WORD_MODE_REG	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_MODE_REG	/;"	d
LDST_SRCDST_WORD_PKHA_A_SZ	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_PKHA_A_SZ	/;"	d
LDST_SRCDST_WORD_PKHA_B_SZ	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_PKHA_B_SZ	/;"	d
LDST_SRCDST_WORD_PKHA_E_SZ	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_PKHA_E_SZ	/;"	d
LDST_SRCDST_WORD_PKHA_N_SZ	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_PKHA_N_SZ	/;"	d
LDST_SRCDST_WORD_STAT	drivers/crypto/fsl/desc.h	/^#define LDST_SRCDST_WORD_STAT	/;"	d
LDST_VLF	drivers/crypto/fsl/desc.h	/^#define LDST_VLF	/;"	d
LDS_BOARD_TEXT	arch/blackfin/cpu/u-boot.lds	/^# define LDS_BOARD_TEXT$/;"	d	file:
LDS_BOARD_TEXT	arch/m68k/cpu/u-boot.lds	/^#define LDS_BOARD_TEXT$/;"	d	file:
LDS_BOARD_TEXT	include/configs/M5208EVBE.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M52277EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5235EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5249EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5253DEMO.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5253EVBE.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5272C3.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5275EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5282EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M53017EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5329EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/M5373EVB.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/amcore.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/astro_mcf5373l.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/bct-brettl2.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/bf533-stamp.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/bf537-pnav.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/bf537-stamp.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/bf538f-ezkit.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/cm-bf537e.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/cm-bf537u.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/cobra5272.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/dnp5370.h	/^#define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/ibf-dsp561.h	/^# define LDS_BOARD_TEXT /;"	d
LDS_BOARD_TEXT	include/configs/tcm-bf537.h	/^# define LDS_BOARD_TEXT /;"	d
LD_AT_LEAST	include/u-boot/u-boot.lds.h	/^#define LD_AT_LEAST(/;"	d
LD_CCM_MODE	drivers/crypto/fsl/desc.h	/^#define LD_CCM_MODE	/;"	d
LD_FAIL_ECC_ERR	include/linux/mtd/samsung_onenand.h	/^#define LD_FAIL_ECC_ERR /;"	d
LD_SHIFT	arch/arm/cpu/armv7/bcm281xx/reset.c	/^#define LD_SHIFT	/;"	d	file:
LD_VERSION_STRING	include/generated/version_autogenerated.h	/^#define LD_VERSION_STRING /;"	d
LE	cmd/itest.c	/^#define LE	/;"	d	file:
LEAF	arch/mips/include/asm/asm.h	/^#define LEAF(/;"	d
LEAF	fs/reiserfs/reiserfs_private.h	/^#define LEAF	/;"	d
LEAF_HASH	fs/zfs/zfs.c	/^#define	LEAF_HASH(/;"	d	file:
LEAVEFN	arch/x86/cpu/quark/mrc_util.h	/^#define LEAVEFN(/;"	d
LEB_FREED	fs/ubifs/ubifs.h	/^	LEB_FREED,$/;"	e	enum:__anonf648d0840b03
LEB_FREED_IDX	fs/ubifs/ubifs.h	/^	LEB_FREED_IDX,$/;"	e	enum:__anonf648d0840b03
LEB_RETAINED	fs/ubifs/ubifs.h	/^	LEB_RETAINED,$/;"	e	enum:__anonf648d0840b03
LED	drivers/led/Kconfig	/^config LED$/;"	c	menu:LED Support
LED Support	drivers/led/Kconfig	/^menu "LED Support"$/;"	m
LED0_ACTIVE	drivers/usb/eth/asix88179.c	/^	#define	LED0_ACTIVE	/;"	d	file:
LED0_FD	drivers/usb/eth/asix88179.c	/^	#define	LED0_FD	/;"	d	file:
LED0_LINK_10	drivers/usb/eth/asix88179.c	/^	#define	LED0_LINK_10	/;"	d	file:
LED0_LINK_100	drivers/usb/eth/asix88179.c	/^	#define	LED0_LINK_100	/;"	d	file:
LED0_LINK_1000	drivers/usb/eth/asix88179.c	/^	#define	LED0_LINK_1000	/;"	d	file:
LED0_OFF	include/configs/xpedite1000.h	/^#define LED0_OFF(/;"	d
LED0_ON	include/configs/xpedite1000.h	/^#define LED0_ON(/;"	d
LED0_USB3_MASK	drivers/usb/eth/asix88179.c	/^	#define	LED0_USB3_MASK	/;"	d	file:
LED1_ACTIVE	drivers/usb/eth/asix88179.c	/^	#define	LED1_ACTIVE	/;"	d	file:
LED1_FD	drivers/usb/eth/asix88179.c	/^	#define	LED1_FD	/;"	d	file:
LED1_GPIO_EN	board/bf609-ezkit/soft_switch.h	/^#define LED1_GPIO_EN /;"	d
LED1_LINK_10	drivers/usb/eth/asix88179.c	/^	#define	LED1_LINK_10	/;"	d	file:
LED1_LINK_100	drivers/usb/eth/asix88179.c	/^	#define	LED1_LINK_100	/;"	d	file:
LED1_LINK_1000	drivers/usb/eth/asix88179.c	/^	#define	LED1_LINK_1000	/;"	d	file:
LED1_OFF	include/configs/xpedite1000.h	/^#define LED1_OFF(/;"	d
LED1_ON	include/configs/xpedite1000.h	/^#define LED1_ON(/;"	d
LED1_USB3_MASK	drivers/usb/eth/asix88179.c	/^	#define	LED1_USB3_MASK	/;"	d	file:
LED2_ACTIVE	drivers/usb/eth/asix88179.c	/^	#define	LED2_ACTIVE	/;"	d	file:
LED2_FD	drivers/usb/eth/asix88179.c	/^	#define	LED2_FD	/;"	d	file:
LED2_GPIO_EN	board/bf609-ezkit/soft_switch.h	/^#define LED2_GPIO_EN /;"	d
LED2_LINK_10	drivers/usb/eth/asix88179.c	/^	#define	LED2_LINK_10	/;"	d	file:
LED2_LINK_100	drivers/usb/eth/asix88179.c	/^	#define	LED2_LINK_100	/;"	d	file:
LED2_LINK_1000	drivers/usb/eth/asix88179.c	/^	#define	LED2_LINK_1000	/;"	d	file:
LED2_OFF	include/configs/xpedite1000.h	/^#define LED2_OFF(/;"	d
LED2_ON	include/configs/xpedite1000.h	/^#define LED2_ON(/;"	d
LED2_USB3_MASK	drivers/usb/eth/asix88179.c	/^	#define	LED2_USB3_MASK	/;"	d	file:
LED3_GPIO_EN	board/bf609-ezkit/soft_switch.h	/^#define LED3_GPIO_EN /;"	d
LED3_OFF	include/configs/xpedite1000.h	/^#define LED3_OFF(/;"	d
LED3_ON	include/configs/xpedite1000.h	/^#define LED3_ON(/;"	d
LED4_GPIO_EN	board/bf609-ezkit/soft_switch.h	/^#define LED4_GPIO_EN /;"	d
LED_A	board/ms7720se/lowlevel_init.S	/^LED_A:		.long	0xB6800000$/;"	l
LED_A	board/renesas/r2dplus/lowlevel_init.S	/^LED_A:		.long	0x04000036	\/* LED Address *\/$/;"	l
LED_ALARM_BLINKING	board/buffalo/lsxl/lsxl.c	/^#define LED_ALARM_BLINKING /;"	d	file:
LED_ALARM_ON	board/buffalo/lsxl/lsxl.c	/^#define LED_ALARM_ON /;"	d	file:
LED_BASE	arch/arm/mach-uniphier/micro-support-card.c	/^#define LED_BASE	/;"	d	file:
LED_BASE	board/ms7720se/ms7720se.c	/^#define LED_BASE	/;"	d	file:
LED_BASE	board/ms7722se/ms7722se.c	/^#define LED_BASE	/;"	d	file:
LED_BLINK	cmd/led.c	/^enum led_cmd { LED_ON, LED_OFF, LED_TOGGLE, LED_BLINK };$/;"	e	enum:led_cmd	file:
LED_CAP	board/mpl/common/kbd.c	/^#define	LED_CAP	/;"	d	file:
LED_CAPSL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CAPSL	include/dt-bindings/input/linux-event-codes.h	/^#define LED_CAPSL	/;"	d
LED_CHARGING	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CHARGING	include/dt-bindings/input/linux-event-codes.h	/^#define LED_CHARGING	/;"	d
LED_CLOUD_BL_GPIO	board/bosch/shc/board.h	/^# define LED_CLOUD_BL_GPIO /;"	d
LED_CLOUD_RD_GPIO	board/bosch/shc/board.h	/^# define LED_CLOUD_RD_GPIO /;"	d
LED_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define LED_CNT	/;"	d
LED_COMPOSE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_COMPOSE	include/dt-bindings/input/linux-event-codes.h	/^#define LED_COMPOSE	/;"	d
LED_CONN_BL_GPIO	board/bosch/shc/board.h	/^# define LED_CONN_BL_GPIO /;"	d
LED_CONN_GN_GPIO	board/bosch/shc/board.h	/^# define LED_CONN_GN_GPIO /;"	d
LED_CONN_RD_GPIO	board/bosch/shc/board.h	/^# define LED_CONN_RD_GPIO /;"	d
LED_D	board/ms7720se/lowlevel_init.S	/^LED_D:		.long	0xFF$/;"	l
LED_D	board/renesas/r2dplus/lowlevel_init.S	/^LED_D:		.long	0xFF		\/* LED Data *\/$/;"	l
LED_FULL	include/linux/compat.h	/^	LED_FULL	= 255,$/;"	e	enum:led_brightness
LED_GPIO	drivers/led/Kconfig	/^config LED_GPIO$/;"	c	menu:LED Support
LED_GPIO_CFG	drivers/usb/eth/smsc95xx.c	/^#define LED_GPIO_CFG	/;"	d	file:
LED_GPIO_CFG_FDX_LED	drivers/usb/eth/smsc95xx.c	/^#define LED_GPIO_CFG_FDX_LED	/;"	d	file:
LED_GPIO_CFG_LNK_LED	drivers/usb/eth/smsc95xx.c	/^#define LED_GPIO_CFG_LNK_LED	/;"	d	file:
LED_GPIO_CFG_SPD_LED	drivers/usb/eth/smsc95xx.c	/^#define LED_GPIO_CFG_SPD_LED	/;"	d	file:
LED_HALF	include/linux/compat.h	/^	LED_HALF	= 127,$/;"	e	enum:led_brightness
LED_HIGH	board/inka4x0/inkadiag.c	/^#define LED_HIGH(/;"	d	file:
LED_IDE1	common/ide.c	/^# define LED_IDE1 /;"	d	file:
LED_IDE1	include/ide.h	/^#define LED_IDE1	/;"	d
LED_IDE2	common/ide.c	/^# define LED_IDE2 /;"	d	file:
LED_IDE2	include/ide.h	/^#define LED_IDE2	/;"	d
LED_INFO_BLINKING	board/buffalo/lsxl/lsxl.c	/^#define LED_INFO_BLINKING /;"	d	file:
LED_INFO_ON	board/buffalo/lsxl/lsxl.c	/^#define LED_INFO_ON /;"	d	file:
LED_KANA	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_KANA	include/dt-bindings/input/linux-event-codes.h	/^#define LED_KANA	/;"	d
LED_LAN_BL_GPIO	board/bosch/shc/board.h	/^# define LED_LAN_BL_GPIO /;"	d
LED_LAN_RD_GPIO	board/bosch/shc/board.h	/^# define LED_LAN_RD_GPIO /;"	d
LED_LOW	board/inka4x0/inkadiag.c	/^#define LED_LOW(/;"	d	file:
LED_MAIL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAIL	include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAIL	/;"	d
LED_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define LED_MAX	/;"	d
LED_MISC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MISC	include/dt-bindings/input/linux-event-codes.h	/^#define LED_MISC	/;"	d
LED_MODE_MASK	drivers/usb/eth/r8152.h	/^#define LED_MODE_MASK	/;"	d
LED_MUTE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_MUTE	include/dt-bindings/input/linux-event-codes.h	/^#define LED_MUTE	/;"	d
LED_NUM	board/mpl/common/kbd.c	/^#define	LED_NUM	/;"	d	file:
LED_NUML	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_NUML	include/dt-bindings/input/linux-event-codes.h	/^#define LED_NUML	/;"	d
LED_OFF	board/Barix/ipam390/ipam390.c	/^#define LED_OFF	/;"	d	file:
LED_OFF	board/buffalo/lsxl/lsxl.c	/^#define LED_OFF /;"	d	file:
LED_OFF	cmd/led.c	/^enum led_cmd { LED_ON, LED_OFF, LED_TOGGLE, LED_BLINK };$/;"	e	enum:led_cmd	file:
LED_OFF	include/linux/compat.h	/^	LED_OFF		= 0,$/;"	e	enum:led_brightness
LED_ON	board/Barix/ipam390/ipam390.c	/^#define LED_ON	/;"	d	file:
LED_ON	cmd/led.c	/^enum led_cmd { LED_ON, LED_OFF, LED_TOGGLE, LED_BLINK };$/;"	e	enum:led_cmd	file:
LED_ON	include/configs/motionpro.h	/^#define LED_ON	/;"	d
LED_PORT	include/ide.h	/^#define	LED_PORT	/;"	d
LED_POWER_BLINKING	board/buffalo/lsxl/lsxl.c	/^#define LED_POWER_BLINKING /;"	d	file:
LED_POWER_ON	board/buffalo/lsxl/lsxl.c	/^#define LED_POWER_ON /;"	d	file:
LED_PWM_GPIO	board/bosch/shc/board.h	/^# define LED_PWM_GPIO /;"	d
LED_PWR_BL_GPIO	board/bosch/shc/board.h	/^# define LED_PWR_BL_GPIO /;"	d
LED_PWR_GN_GPIO	board/bosch/shc/board.h	/^# define LED_PWR_GN_GPIO /;"	d
LED_PWR_RD_GPIO	board/bosch/shc/board.h	/^# define LED_PWR_RD_GPIO /;"	d
LED_SCR	board/mpl/common/kbd.c	/^#define	LED_SCR	/;"	d	file:
LED_SCROLLL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SCROLLL	include/dt-bindings/input/linux-event-codes.h	/^#define LED_SCROLLL	/;"	d
LED_SLEEP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_SLEEP	include/dt-bindings/input/linux-event-codes.h	/^#define LED_SLEEP	/;"	d
LED_STAT_0	include/configs/cobra5272.h	/^#define	LED_STAT_0	/;"	d
LED_STAT_1	include/configs/cobra5272.h	/^#define	LED_STAT_1	/;"	d
LED_STAT_2	include/configs/cobra5272.h	/^#define	LED_STAT_2	/;"	d
LED_STAT_3	include/configs/cobra5272.h	/^#define	LED_STAT_3	/;"	d
LED_STAT_4	include/configs/cobra5272.h	/^#define	LED_STAT_4	/;"	d
LED_STAT_5	include/configs/cobra5272.h	/^#define	LED_STAT_5	/;"	d
LED_STAT_6	include/configs/cobra5272.h	/^#define	LED_STAT_6	/;"	d
LED_STAT_7	include/configs/cobra5272.h	/^#define	LED_STAT_7	/;"	d
LED_SUSPEND	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_SUSPEND	include/dt-bindings/input/linux-event-codes.h	/^#define LED_SUSPEND	/;"	d
LED_TOGGLE	cmd/led.c	/^enum led_cmd { LED_ON, LED_OFF, LED_TOGGLE, LED_BLINK };$/;"	e	enum:led_cmd	file:
LED_VALID	drivers/usb/eth/asix88179.c	/^	#define	LED_VALID	/;"	d	file:
LEFT	board/tqc/tqm5200/cmd_stk52xx.c	/^#define LEFT	/;"	d	file:
LEFT	lib/vsprintf.c	/^#define LEFT	/;"	d	file:
LEFTPAREN	include/lattice.h	/^#define LEFTPAREN	/;"	d
LEFT_ALT	common/usb_kbd.c	/^#define LEFT_ALT	/;"	d	file:
LEFT_CHN_RX_DQS_DELAY_TAP_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_RX_DQS_DELAY_TAP_MASK		= 3,$/;"	e	enum:__anon957231910103	file:
LEFT_CHN_RX_DQS_DELAY_TAP_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_RX_DQS_DELAY_TAP_SHIFT		= 0,$/;"	e	enum:__anon957231910103	file:
LEFT_CHN_TX_DQ_DLL_DELAY_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_TX_DQ_DLL_DELAY_MASK		= 7,$/;"	e	enum:__anon957231910103	file:
LEFT_CHN_TX_DQ_DLL_DELAY_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_TX_DQ_DLL_DELAY_SHIFT		= 0,$/;"	e	enum:__anon957231910103	file:
LEFT_CHN_TX_DQ_DLL_ENABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_TX_DQ_DLL_ENABLE		= 1 << 3,$/;"	e	enum:__anon957231910103	file:
LEFT_CHN_TX_DQ_PHASE_BYPASS_0	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_TX_DQ_PHASE_BYPASS_0		= 0 << 4,$/;"	e	enum:__anon957231910103	file:
LEFT_CHN_TX_DQ_PHASE_BYPASS_90	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LEFT_CHN_TX_DQ_PHASE_BYPASS_90		= 1 << 4,$/;"	e	enum:__anon957231910103	file:
LEFT_CNTR	common/usb_kbd.c	/^#define LEFT_CNTR	/;"	d	file:
LEFT_GUI	common/usb_kbd.c	/^#define LEFT_GUI	/;"	d	file:
LEFT_MARGIN	drivers/video/da8xx-fb.c	/^#define LEFT_MARGIN	/;"	d	file:
LEFT_RIGHT	board/tqc/tqm5200/cmd_stk52xx.c	/^#define LEFT_RIGHT	/;"	d	file:
LEFT_SHIFT	common/usb_kbd.c	/^#define LEFT_SHIFT	/;"	d	file:
LEGACYGETDEVICEPARAMETERS	include/linux/edd.h	/^#define LEGACYGETDEVICEPARAMETERS /;"	d
LEGACY_ENDPOINT	arch/arm/mach-keystone/init.c	/^	LEGACY_ENDPOINT,$/;"	e	enum:pci_mode	file:
LEGACY_ID_NAND	include/linux/mtd/nand.h	/^#define LEGACY_ID_NAND(/;"	d
LEGACY_MBR_PARTITION_GUID	include/part_efi.h	/^#define LEGACY_MBR_PARTITION_GUID /;"	d
LEGACY_USB2_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  LEGACY_USB2_EN	/;"	d
LEGACY_USB2_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   LEGACY_USB2_EN /;"	d
LEGACY_USB_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  LEGACY_USB_EN	/;"	d
LEGACY_USB_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   LEGACY_USB_EN /;"	d
LEN	lib/zlib/inflate.h	/^            LEN,        \/* i: waiting for length\/lit code *\/$/;"	e	enum:__anon43d5a4c40103
LENEXT	lib/zlib/inflate.h	/^            LENEXT,     \/* i: waiting for length extra bits *\/$/;"	e	enum:__anon43d5a4c40103
LENGTH	lib/zlib/inflate.h	/^    LENGTH,     \/* i: waiting for 32-bit length (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
LENGTH_CODES	lib/zlib/deflate.h	/^#define LENGTH_CODES /;"	d
LENLENS	lib/zlib/inflate.h	/^        LENLENS,    \/* i: waiting for code length code lengths *\/$/;"	e	enum:__anon43d5a4c40103
LENS	lib/zlib/inftrees.h	/^    LENS,$/;"	e	enum:__anon4cf584e10203
LEN_16BIT_KILLER_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_16BIT_KILLER_PATTERN /;"	d
LEN_16BIT_PBS_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_16BIT_PBS_PATTERN /;"	d
LEN_16BIT_SPECIAL_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_16BIT_SPECIAL_PATTERN /;"	d
LEN_16BIT_STD_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_16BIT_STD_PATTERN /;"	d
LEN_64BIT_KILLER_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_64BIT_KILLER_PATTERN /;"	d
LEN_64BIT_PBS_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_64BIT_PBS_PATTERN /;"	d
LEN_64BIT_SPECIAL_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_64BIT_SPECIAL_PATTERN /;"	d
LEN_64BIT_STD_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_64BIT_STD_PATTERN /;"	d
LEN_KILLER_PATTERN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define LEN_KILLER_PATTERN	/;"	d
LEN_PBS_PATTERN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define LEN_PBS_PATTERN	/;"	d
LEN_SPECIAL_PATTERN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define LEN_SPECIAL_PATTERN	/;"	d
LEN_STD_PATTERN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define LEN_STD_PATTERN	/;"	d
LEN_WL_SUP_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define LEN_WL_SUP_PATTERN	/;"	d
LEON	arch/sparc/Kconfig	/^config LEON$/;"	c	menu:SPARC architecture
LEON2	arch/sparc/Kconfig	/^config LEON2$/;"	c	menu:SPARC architecture
LEON2_CCTRL	arch/sparc/include/asm/leon2.h	/^#define LEON2_CCTRL	/;"	d
LEON2_CONSOLE_SELECT	include/configs/grsim_leon2.h	/^#define LEON2_CONSOLE_SELECT /;"	d
LEON2_ECTRL	arch/sparc/include/asm/leon2.h	/^#define LEON2_ECTRL	/;"	d
LEON2_FADDR	arch/sparc/include/asm/leon2.h	/^#define LEON2_FADDR	/;"	d
LEON2_ICLEAR	arch/sparc/include/asm/leon2.h	/^#define LEON2_ICLEAR	/;"	d
LEON2_ICLEAR2	arch/sparc/include/asm/leon2.h	/^#define LEON2_ICLEAR2	/;"	d
LEON2_IFORCE	arch/sparc/include/asm/leon2.h	/^#define LEON2_IFORCE	/;"	d
LEON2_IMASK	arch/sparc/include/asm/leon2.h	/^#define LEON2_IMASK	/;"	d
LEON2_IMASK2	arch/sparc/include/asm/leon2.h	/^#define LEON2_IMASK2	/;"	d
LEON2_IODIR	arch/sparc/include/asm/leon2.h	/^#define LEON2_IODIR	/;"	d
LEON2_IOICONF	arch/sparc/include/asm/leon2.h	/^#define LEON2_IOICONF	/;"	d
LEON2_IOREG	arch/sparc/include/asm/leon2.h	/^#define LEON2_IOREG	/;"	d
LEON2_IPEND	arch/sparc/include/asm/leon2.h	/^#define LEON2_IPEND	/;"	d
LEON2_IPEND2	arch/sparc/include/asm/leon2.h	/^#define LEON2_IPEND2	/;"	d
LEON2_ISTAT2	arch/sparc/include/asm/leon2.h	/^#define LEON2_ISTAT2	/;"	d
LEON2_LCONF	arch/sparc/include/asm/leon2.h	/^#define LEON2_LCONF	/;"	d
LEON2_MCFG1	arch/sparc/include/asm/leon2.h	/^#define LEON2_MCFG1	/;"	d
LEON2_MCFG2	arch/sparc/include/asm/leon2.h	/^#define LEON2_MCFG2	/;"	d
LEON2_MSTAT	arch/sparc/include/asm/leon2.h	/^#define LEON2_MSTAT	/;"	d
LEON2_PREGS	arch/sparc/include/asm/leon2.h	/^#define LEON2_PREGS	/;"	d
LEON2_PWDOWN	arch/sparc/include/asm/leon2.h	/^#define LEON2_PWDOWN	/;"	d
LEON2_SCNT	arch/sparc/include/asm/leon2.h	/^#define LEON2_SCNT	/;"	d
LEON2_SRLD	arch/sparc/include/asm/leon2.h	/^#define LEON2_SRLD	/;"	d
LEON2_TCNT0	arch/sparc/include/asm/leon2.h	/^#define LEON2_TCNT0	/;"	d
LEON2_TCNT1	arch/sparc/include/asm/leon2.h	/^#define LEON2_TCNT1	/;"	d
LEON2_TCTRL0	arch/sparc/include/asm/leon2.h	/^#define LEON2_TCTRL0	/;"	d
LEON2_TCTRL1	arch/sparc/include/asm/leon2.h	/^#define LEON2_TCTRL1	/;"	d
LEON2_TIMER1_IE	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER1_IE	/;"	d
LEON2_TIMER1_IRQNO	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER1_IRQNO	/;"	d
LEON2_TIMER2_IE	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER2_IE	/;"	d
LEON2_TIMER2_IRQNO	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER2_IRQNO	/;"	d
LEON2_TIMER_CTRL_EN	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER_CTRL_EN	/;"	d
LEON2_TIMER_CTRL_LD	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER_CTRL_LD	/;"	d
LEON2_TIMER_CTRL_RS	arch/sparc/include/asm/leon2.h	/^#define LEON2_TIMER_CTRL_RS	/;"	d
LEON2_TRLD0	arch/sparc/include/asm/leon2.h	/^#define LEON2_TRLD0	/;"	d
LEON2_TRLD1	arch/sparc/include/asm/leon2.h	/^#define LEON2_TRLD1	/;"	d
LEON2_UART0	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART0	/;"	d
LEON2_UART1	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART1	/;"	d
LEON2_UART1_FLOWCTRL_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART1_FLOWCTRL_ENABLE /;"	d
LEON2_UART1_LOOPBACK_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART1_LOOPBACK_ENABLE /;"	d
LEON2_UART1_ODDPAR_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART1_ODDPAR_ENABLE /;"	d
LEON2_UART1_PARITY_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART1_PARITY_ENABLE /;"	d
LEON2_UART2_FLOWCTRL_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART2_FLOWCTRL_ENABLE /;"	d
LEON2_UART2_LOOPBACK_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART2_LOOPBACK_ENABLE /;"	d
LEON2_UART2_ODDPAR_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART2_ODDPAR_ENABLE /;"	d
LEON2_UART2_PARITY_ENABLE	include/configs/grsim_leon2.h	/^#define LEON2_UART2_PARITY_ENABLE /;"	d
LEON2_UART_CTRL_DBG	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_CTRL_DBG /;"	d
LEON2_UART_CTRL_RE	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_CTRL_RE	/;"	d
LEON2_UART_CTRL_RI	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_CTRL_RI	/;"	d
LEON2_UART_CTRL_TE	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_CTRL_TE	/;"	d
LEON2_UART_CTRL_TI	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_CTRL_TI	/;"	d
LEON2_UART_STAT_DR	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_STAT_DR	/;"	d
LEON2_UART_STAT_THE	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_STAT_THE	/;"	d
LEON2_UART_STAT_TSE	arch/sparc/include/asm/leon2.h	/^#define LEON2_UART_STAT_TSE	/;"	d
LEON2_UCTRL0	arch/sparc/include/asm/leon2.h	/^#define LEON2_UCTRL0	/;"	d
LEON2_UCTRL1	arch/sparc/include/asm/leon2.h	/^#define LEON2_UCTRL1	/;"	d
LEON2_UDATA0	arch/sparc/include/asm/leon2.h	/^#define LEON2_UDATA0	/;"	d
LEON2_UDATA1	arch/sparc/include/asm/leon2.h	/^#define LEON2_UDATA1	/;"	d
LEON2_USCAL0	arch/sparc/include/asm/leon2.h	/^#define LEON2_USCAL0	/;"	d
LEON2_USCAL1	arch/sparc/include/asm/leon2.h	/^#define LEON2_USCAL1	/;"	d
LEON2_USTAT0	arch/sparc/include/asm/leon2.h	/^#define LEON2_USTAT0	/;"	d
LEON2_USTAT1	arch/sparc/include/asm/leon2.h	/^#define LEON2_USTAT1	/;"	d
LEON2_Uart_regs	arch/sparc/include/asm/leon2.h	/^} LEON2_Uart_regs;$/;"	t	typeref:struct:__anonf183ba530208
LEON2_WPROT1	arch/sparc/include/asm/leon2.h	/^#define LEON2_WPROT1	/;"	d
LEON2_WPROT2	arch/sparc/include/asm/leon2.h	/^#define LEON2_WPROT2	/;"	d
LEON2_regs	arch/sparc/include/asm/leon2.h	/^} LEON2_regs;$/;"	t	typeref:struct:__anonf183ba530108
LEON3	arch/sparc/Kconfig	/^config LEON3$/;"	c	menu:SPARC architecture
LEON_CONSOLE_UART1	include/configs/grsim_leon2.h	/^#define LEON_CONSOLE_UART1 /;"	d
LEON_CONSOLE_UART2	include/configs/grsim_leon2.h	/^#define LEON_CONSOLE_UART2 /;"	d
LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR	/;"	d
LEON_INTERRUPT_EMPTY1	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EMPTY1	/;"	d
LEON_INTERRUPT_EMPTY2	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EMPTY2	/;"	d
LEON_INTERRUPT_EMPTY4	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EMPTY4	/;"	d
LEON_INTERRUPT_EMPTY5	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EMPTY5	/;"	d
LEON_INTERRUPT_EMPTY6	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EMPTY6	/;"	d
LEON_INTERRUPT_EXTERNAL_0	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EXTERNAL_0	/;"	d
LEON_INTERRUPT_EXTERNAL_1	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EXTERNAL_1	/;"	d
LEON_INTERRUPT_EXTERNAL_2	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EXTERNAL_2	/;"	d
LEON_INTERRUPT_EXTERNAL_3	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_EXTERNAL_3	/;"	d
LEON_INTERRUPT_OPEN_ETH	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_OPEN_ETH	/;"	d
LEON_INTERRUPT_TIMER1	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_TIMER1	/;"	d
LEON_INTERRUPT_TIMER2	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_TIMER2	/;"	d
LEON_INTERRUPT_UART_0_RX_TX	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_UART_0_RX_TX	/;"	d
LEON_INTERRUPT_UART_1_RX_TX	arch/sparc/include/asm/leon2.h	/^#define LEON_INTERRUPT_UART_1_RX_TX	/;"	d
LEON_REG_CACHECTRL_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_CACHECTRL_OFFSET /;"	d
LEON_REG_EDACCTRL_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_EDACCTRL_OFFSET /;"	d
LEON_REG_FAILADDR_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_FAILADDR_OFFSET /;"	d
LEON_REG_IRQCLEAR_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_IRQCLEAR_OFFSET /;"	d
LEON_REG_IRQFORCE_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_IRQFORCE_OFFSET /;"	d
LEON_REG_IRQMASK_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_IRQMASK_OFFSET /;"	d
LEON_REG_IRQPEND_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_IRQPEND_OFFSET /;"	d
LEON_REG_LEONCONF_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_LEONCONF_OFFSET /;"	d
LEON_REG_MEMCFG1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_MEMCFG1_OFFSET /;"	d
LEON_REG_MEMCFG2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_MEMCFG2_OFFSET /;"	d
LEON_REG_MEMSTATUS_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_MEMSTATUS_OFFSET /;"	d
LEON_REG_PIODATA_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_PIODATA_OFFSET /;"	d
LEON_REG_PIODIR_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_PIODIR_OFFSET /;"	d
LEON_REG_PIOIRQ_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_PIOIRQ_OFFSET /;"	d
LEON_REG_POWERDOWN_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_POWERDOWN_OFFSET /;"	d
LEON_REG_SCALERCNT_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_SCALERCNT_OFFSET /;"	d
LEON_REG_SCALER_LOAD_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_SCALER_LOAD_OFFSET /;"	d
LEON_REG_SIM_RAM_SIZE_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_SIM_RAM_SIZE_OFFSET /;"	d
LEON_REG_SIM_ROM_SIZE_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_SIM_ROM_SIZE_OFFSET /;"	d
LEON_REG_TIMERCNT1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_TIMERCNT1_OFFSET /;"	d
LEON_REG_TIMERCNT2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_TIMERCNT2_OFFSET /;"	d
LEON_REG_TIMERCTRL1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_TIMERCTRL1_OFFSET /;"	d
LEON_REG_TIMERCTRL2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_TIMERCTRL2_OFFSET /;"	d
LEON_REG_TIMERLOAD1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_TIMERLOAD1_OFFSET /;"	d
LEON_REG_TIMERLOAD2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_TIMERLOAD2_OFFSET /;"	d
LEON_REG_UARTCTRL1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTCTRL1_OFFSET /;"	d
LEON_REG_UARTCTRL2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTCTRL2_OFFSET /;"	d
LEON_REG_UARTDATA1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTDATA1_OFFSET /;"	d
LEON_REG_UARTDATA2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTDATA2_OFFSET /;"	d
LEON_REG_UARTSCALER1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTSCALER1_OFFSET /;"	d
LEON_REG_UARTSCALER2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTSCALER2_OFFSET /;"	d
LEON_REG_UARTSTATUS1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTSTATUS1_OFFSET /;"	d
LEON_REG_UARTSTATUS2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UARTSTATUS2_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_10_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_10_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_2_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_3_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_3_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_4_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_4_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_5_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_5_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_6_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_6_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_7_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_7_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_8_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_8_OFFSET /;"	d
LEON_REG_UNIMPLEMENTED_9_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_UNIMPLEMENTED_9_OFFSET /;"	d
LEON_REG_WDOG_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_WDOG_OFFSET /;"	d
LEON_REG_WRITEPROT1_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_WRITEPROT1_OFFSET /;"	d
LEON_REG_WRITEPROT2_OFFSET	arch/sparc/include/asm/leon2.h	/^#define  LEON_REG_WRITEPROT2_OFFSET /;"	d
LERROR	drivers/usb/gadget/storage_common.c	/^#define LERROR(/;"	d	file:
LEX_PREFIX_zconf	scripts/kconfig/Makefile	/^LEX_PREFIX_zconf	:= zconf$/;"	m
LFAST_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define LFAST_BASE_ADDR	/;"	d
LFB158	arch/arm/lib/asm-offsets.s	/^.LFB158:$/;"	l
LFB158	lib/asm-offsets.s	/^.LFB158:$/;"	l
LFD	arch/powerpc/lib/kgdb.c	/^#define LFD(/;"	d	file:
LFDI	arch/powerpc/lib/kgdb.c	/^#define LFDI(/;"	d	file:
LFDM	arch/powerpc/lib/kgdb.c	/^#define LFDM(/;"	d	file:
LFE158	arch/arm/lib/asm-offsets.s	/^.LFE158:$/;"	l
LFE158	lib/asm-offsets.s	/^.LFE158:$/;"	l
LGSEND	drivers/usb/eth/r8152.h	/^#define LGSEND	/;"	d
LG_CACHE_LINE_SIZE	arch/powerpc/cpu/mpc86xx/cache.S	/^#define LG_CACHE_LINE_SIZE /;"	d	file:
LG_CACHE_LINE_SIZE	examples/standalone/test_burst.h	/^#define LG_CACHE_LINE_SIZE	/;"	d
LHEAP	include/lattice.h	/^#define LHEAP	/;"	d
LHEAP_IN	include/lattice.h	/^#define LHEAP_IN	/;"	d
LIB	examples/standalone/Makefile	/^LIB	= $(obj)\/libstubs.o$/;"	m
LIBATA_DUMB_MAX_PRD	drivers/block/sata_dwc.h	/^	LIBATA_DUMB_MAX_PRD	= ATA_MAX_PRD \/ 4,$/;"	e	enum:__anone5f668490203
LIBATA_MAX_PRD	drivers/block/sata_dwc.h	/^	LIBATA_MAX_PRD		= ATA_MAX_PRD \/ 2,$/;"	e	enum:__anone5f668490203
LIBFDT_OBJS	tools/Makefile	/^LIBFDT_OBJS := $(addprefix lib\/libfdt\/, \\$/;"	m
LIBGCC2_MAX_UNITS_PER_WORD	arch/arc/lib/libgcc2.h	/^# define LIBGCC2_MAX_UNITS_PER_WORD /;"	d
LIBGCC2_UNITS_PER_WORD	arch/arc/lib/libgcc2.h	/^#define LIBGCC2_UNITS_PER_WORD /;"	d
LIBOBJS	examples/standalone/Makefile	/^LIBOBJS	:= $(addprefix $(obj)\/,$(LIBOBJS-y))$/;"	m
LIB_RAND	lib/Kconfig	/^config LIB_RAND$/;"	c	menu:Library routines
LICENSE_H	tools/Makefile	/^LICENSE_H = $(objtree)\/include\/license.h$/;"	m
LICENSE_MAX	cmd/license.c	/^#define LICENSE_MAX	/;"	d	file:
LIFEC_SEC_SRC	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define LIFEC_SEC_SRC	/;"	d
LIFEC_SEC_SRC_BIT	board/kmc/kzm9g/kzm9g.c	/^	#define LIFEC_SEC_SRC_BIT	/;"	d	file:
LIGHTBAR_CMD_BRIGHTNESS	include/ec_commands.h	/^	LIGHTBAR_CMD_BRIGHTNESS = 4,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_DEMO	include/ec_commands.h	/^	LIGHTBAR_CMD_DEMO = 9,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_DUMP	include/ec_commands.h	/^	LIGHTBAR_CMD_DUMP = 0,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_GET_PARAMS	include/ec_commands.h	/^	LIGHTBAR_CMD_GET_PARAMS = 10,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_GET_SEQ	include/ec_commands.h	/^	LIGHTBAR_CMD_GET_SEQ = 8,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_INIT	include/ec_commands.h	/^	LIGHTBAR_CMD_INIT = 3,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_OFF	include/ec_commands.h	/^	LIGHTBAR_CMD_OFF = 1,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_ON	include/ec_commands.h	/^	LIGHTBAR_CMD_ON = 2,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_REG	include/ec_commands.h	/^	LIGHTBAR_CMD_REG = 6,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_RGB	include/ec_commands.h	/^	LIGHTBAR_CMD_RGB = 7,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_SEQ	include/ec_commands.h	/^	LIGHTBAR_CMD_SEQ = 5,$/;"	e	enum:lightbar_command
LIGHTBAR_CMD_SET_PARAMS	include/ec_commands.h	/^	LIGHTBAR_CMD_SET_PARAMS = 11,$/;"	e	enum:lightbar_command
LIGHTBAR_NUM_CMDS	include/ec_commands.h	/^	LIGHTBAR_NUM_CMDS$/;"	e	enum:lightbar_command
LIIDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define LIIDR	/;"	d
LIMIT_DEV	cmd/pmic.c	/^#define LIMIT_DEV	/;"	d	file:
LIMIT_DEVNAME	cmd/regulator.c	/^#define LIMIT_DEVNAME	/;"	d	file:
LIMIT_INFO	cmd/regulator.c	/^#define LIMIT_INFO	/;"	d	file:
LIMIT_OFNAME	cmd/regulator.c	/^#define LIMIT_OFNAME	/;"	d	file:
LIMIT_PARENT	cmd/pmic.c	/^#define LIMIT_PARENT	/;"	d	file:
LINCR1_BF	drivers/serial/serial_linflexuart.c	/^#define LINCR1_BF /;"	d	file:
LINCR1_INIT	drivers/serial/serial_linflexuart.c	/^#define LINCR1_INIT /;"	d	file:
LINCR1_MME	drivers/serial/serial_linflexuart.c	/^#define LINCR1_MME /;"	d	file:
LINE_GROWTH	scripts/kconfig/confdata.c	/^#define LINE_GROWTH /;"	d	file:
LINFLEXD0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define LINFLEXD0_BASE_ADDR	/;"	d
LINFLEXD1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define LINFLEXD1_BASE_ADDR	/;"	d
LINFLEXUART_BASE	include/configs/s32v234evb.h	/^#define LINFLEXUART_BASE	/;"	d
LINFO	drivers/usb/gadget/storage_common.c	/^#define LINFO(/;"	d	file:
LINK	drivers/net/davinci_emac.h	/^	dv_reg		LINK;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
LINKENA	drivers/usb/eth/r8152.h	/^#define LINKENA	/;"	d
LINKINTMASKED	drivers/net/davinci_emac.h	/^	dv_reg		LINKINTMASKED;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
LINKINTRAW	drivers/net/davinci_emac.h	/^	dv_reg		LINKINTRAW;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
LINKLOCAL	include/net.h	/^	TFTPSRV, TFTPPUT, LINKLOCAL$/;"	e	enum:proto_t
LINKLOCAL_ADDR	net/link_local.c	/^	LINKLOCAL_ADDR = 0xa9fe0000,$/;"	e	enum:__anonc9befdc40103	file:
LINKSTATUS	include/configs/M54418TWR.h	/^#define LINKSTATUS	/;"	d
LINKSTATUS_TIMEOUT	drivers/usb/eth/mcs7830.c	/^#define LINKSTATUS_TIMEOUT	/;"	d	file:
LINKSTATUS_TIMEOUT_RES	drivers/usb/eth/mcs7830.c	/^#define LINKSTATUS_TIMEOUT_RES	/;"	d	file:
LINKSYSTEM_FLADJ	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define LINKSYSTEM_FLADJ(/;"	d
LINKSYSTEM_FLADJ_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define LINKSYSTEM_FLADJ_MASK	/;"	d
LINKSYSTEM_XHCI_VERSION_CONTROL	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define LINKSYSTEM_XHCI_VERSION_CONTROL	/;"	d
LINK_CHANGE_INT	drivers/net/ax88180.h	/^  #define LINK_CHANGE_INT	/;"	d
LINK_CHANGE_STATUS	drivers/net/ax88180.h	/^  #define LINK_CHANGE_STATUS	/;"	d
LINK_DUPLEX_FULL	drivers/net/tsi108_eth.c	/^#define LINK_DUPLEX_FULL	/;"	d	file:
LINK_DUPLEX_HALF	drivers/net/tsi108_eth.c	/^#define LINK_DUPLEX_HALF	/;"	d	file:
LINK_DUPLEX_UNKNOWN	drivers/net/tsi108_eth.c	/^#define LINK_DUPLEX_UNKNOWN	/;"	d	file:
LINK_FOR	include/mv88e6352.h	/^#define LINK_FOR	/;"	d
LINK_LIST_READY	drivers/usb/eth/r8152.h	/^#define LINK_LIST_READY	/;"	d
LINK_LOST	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_LOST	/;"	d
LINK_N2V	arch/x86/include/asm/irq.h	/^#define LINK_N2V(/;"	d
LINK_OFF_WAKE_EN	drivers/usb/eth/r8152.h	/^#define LINK_OFF_WAKE_EN	/;"	d
LINK_ON_WAKE_EN	drivers/usb/eth/r8152.h	/^#define LINK_ON_WAKE_EN	/;"	d
LINK_QUAL_PATTERN_SET_80BIT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_QUAL_PATTERN_SET_80BIT	/;"	d
LINK_QUAL_PATTERN_SET_D10_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_QUAL_PATTERN_SET_D10_2	/;"	d
LINK_QUAL_PATTERN_SET_D10_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define LINK_QUAL_PATTERN_SET_D10_2	/;"	d
LINK_QUAL_PATTERN_SET_DISABLE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_QUAL_PATTERN_SET_DISABLE	/;"	d
LINK_QUAL_PATTERN_SET_DISABLE	arch/arm/mach-exynos/include/mach/dp.h	/^#define LINK_QUAL_PATTERN_SET_DISABLE	/;"	d
LINK_QUAL_PATTERN_SET_HBR2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_QUAL_PATTERN_SET_HBR2	/;"	d
LINK_QUAL_PATTERN_SET_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_QUAL_PATTERN_SET_MASK	/;"	d
LINK_QUAL_PATTERN_SET_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define LINK_QUAL_PATTERN_SET_MASK	/;"	d
LINK_QUAL_PATTERN_SET_PRBS7	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LINK_QUAL_PATTERN_SET_PRBS7	/;"	d
LINK_QUAL_PATTERN_SET_PRBS7	arch/arm/mach-exynos/include/mach/dp.h	/^#define LINK_QUAL_PATTERN_SET_PRBS7	/;"	d
LINK_RATE_1_62GBPS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LINK_RATE_1_62GBPS = 0x06,$/;"	e	enum:link_rate_type
LINK_RATE_2_70GBPS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LINK_RATE_2_70GBPS = 0x0a$/;"	e	enum:link_rate_type
LINK_SPEED_10	drivers/net/tsi108_eth.c	/^#define LINK_SPEED_10	/;"	d	file:
LINK_SPEED_100	drivers/net/tsi108_eth.c	/^#define LINK_SPEED_100	/;"	d	file:
LINK_SPEED_1000	drivers/net/tsi108_eth.c	/^#define LINK_SPEED_1000	/;"	d	file:
LINK_SPEED_UNKNOWN	drivers/net/tsi108_eth.c	/^#define LINK_SPEED_UNKNOWN	/;"	d	file:
LINK_STATUS	drivers/usb/eth/r8152.h	/^	LINK_STATUS	= 0x02,$/;"	e	enum:rtl_register_content
LINK_SW_RST	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define LINK_SW_RST /;"	d
LINK_TOGGLE	drivers/usb/host/xhci.h	/^#define LINK_TOGGLE /;"	d
LINK_TYPE_10G_MAC_TO_MAC_FORCED_MODE	drivers/net/keystone_net.c	/^	LINK_TYPE_10G_MAC_TO_MAC_FORCED_MODE = 11,$/;"	e	enum:link_type	file:
LINK_TYPE_10G_MAC_TO_PHY_MODE	drivers/net/keystone_net.c	/^	LINK_TYPE_10G_MAC_TO_PHY_MODE = 10,$/;"	e	enum:link_type	file:
LINK_TYPE_MAC_TO_FIBRE_MODE	drivers/net/keystone_net.c	/^	LINK_TYPE_MAC_TO_FIBRE_MODE = 3,$/;"	e	enum:link_type	file:
LINK_TYPE_MAC_TO_MAC_AUTO	drivers/net/keystone_net.c	/^	LINK_TYPE_MAC_TO_MAC_AUTO = 0,$/;"	e	enum:link_type	file:
LINK_TYPE_MAC_TO_MAC_FORCED_MODE	drivers/net/keystone_net.c	/^	LINK_TYPE_MAC_TO_MAC_FORCED_MODE = 2,$/;"	e	enum:link_type	file:
LINK_TYPE_MAC_TO_PHY_MODE	drivers/net/keystone_net.c	/^	LINK_TYPE_MAC_TO_PHY_MODE = 1,$/;"	e	enum:link_type	file:
LINK_TYPE_MAC_TO_PHY_NO_MDIO_MODE	drivers/net/keystone_net.c	/^	LINK_TYPE_MAC_TO_PHY_NO_MDIO_MODE = 4,$/;"	e	enum:link_type	file:
LINK_UP_TIMEOUT	drivers/net/e1000.h	/^#define LINK_UP_TIMEOUT	/;"	d
LINK_V2N	arch/x86/include/asm/irq.h	/^#define LINK_V2N(/;"	d
LINK_VAL	include/mv88e6352.h	/^#define LINK_VAL	/;"	d
LINK_WAIT_CNTR	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define LINK_WAIT_CNTR	/;"	d	file:
LINK_WAIT_SLEEP	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define LINK_WAIT_SLEEP	/;"	d	file:
LINSR_LINS_INITMODE	drivers/serial/serial_linflexuart.c	/^#define LINSR_LINS_INITMODE /;"	d	file:
LINSR_LINS_MASK	drivers/serial/serial_linflexuart.c	/^#define LINSR_LINS_MASK /;"	d	file:
LINUXBOOT_CMD	include/configs/uniphier.h	/^#define LINUXBOOT_CMD	/;"	d
LINUXBOOT_ENV_SETTINGS	include/configs/uniphier.h	/^#define LINUXBOOT_ENV_SETTINGS /;"	d
LINUX_ARM64_IMAGE_MAGIC	cmd/booti.c	/^#define LINUX_ARM64_IMAGE_MAGIC	/;"	d	file:
LINUX_ARM_ZIMAGE_MAGIC	arch/arm/lib/zimage.c	/^#define	LINUX_ARM_ZIMAGE_MAGIC	/;"	d	file:
LINUX_ARM_ZIMAGE_MAGIC	arch/sandbox/lib/bootm.c	/^#define	LINUX_ARM_ZIMAGE_MAGIC	/;"	d	file:
LINUX_BOOT_PARAM_ADDR	include/configs/calimain.h	/^#define LINUX_BOOT_PARAM_ADDR /;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/da850evm.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/ea20.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/edb93xx.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/ipam390.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/legoev3.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/omapl138_lcdk.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_BOOT_PARAM_ADDR	include/configs/vexpress_common.h	/^#define LINUX_BOOT_PARAM_ADDR	/;"	d
LINUX_LOGO_COLORS	drivers/video/cfb_console.c	/^#define LINUX_LOGO_COLORS	/;"	d	file:
LINUX_LOGO_HEIGHT	drivers/video/cfb_console.c	/^#define LINUX_LOGO_HEIGHT	/;"	d	file:
LINUX_LOGO_LUT_OFFSET	drivers/video/cfb_console.c	/^#define LINUX_LOGO_LUT_OFFSET	/;"	d	file:
LINUX_LOGO_WIDTH	drivers/video/cfb_console.c	/^#define LINUX_LOGO_WIDTH	/;"	d	file:
LINUX_MAX_ARGS	arch/m68k/lib/bootm.c	/^#define LINUX_MAX_ARGS	/;"	d	file:
LINUX_MAX_ARGS	arch/mips/lib/bootm.c	/^#define	LINUX_MAX_ARGS	/;"	d	file:
LINUX_MAX_ENVS	arch/m68k/lib/bootm.c	/^#define LINUX_MAX_ENVS	/;"	d	file:
LINUX_MAX_ENVS	arch/mips/lib/bootm.c	/^#define	LINUX_MAX_ENVS	/;"	d	file:
LINUX_OPPROM_MAGIC	arch/sparc/include/asm/prom.h	/^#define	LINUX_OPPROM_MAGIC /;"	d
LIST	scripts/docproc.c	/^#define LIST /;"	d	file:
LIST_H	scripts/kconfig/list.h	/^#define LIST_H$/;"	d
LIST_HEAD	include/linux/list.h	/^#define LIST_HEAD(/;"	d
LIST_HEAD	scripts/kconfig/list.h	/^#define LIST_HEAD(/;"	d
LIST_HEAD_INIT	include/linux/list.h	/^#define LIST_HEAD_INIT(/;"	d
LIST_HEAD_INIT	scripts/kconfig/list.h	/^#define LIST_HEAD_INIT(/;"	d
LIST_POISON1	include/linux/poison.h	/^#define LIST_POISON1 /;"	d
LIST_POISON1	scripts/kconfig/list.h	/^#define LIST_POISON1 /;"	d
LIST_POISON2	include/linux/poison.h	/^#define LIST_POISON2 /;"	d
LIST_POISON2	scripts/kconfig/list.h	/^#define LIST_POISON2 /;"	d
LIT	lib/zlib/inflate.h	/^            LIT,        \/* o: waiting for output space to write literal *\/$/;"	e	enum:__anon43d5a4c40103
LITERALS	lib/zlib/deflate.h	/^#define LITERALS /;"	d
LITTLE_ENDIAN	include/zfs_common.h	/^	LITTLE_ENDIAN = -1,$/;"	e	enum:zfs_endian
LKC_H	scripts/kconfig/lkc.h	/^#define LKC_H$/;"	d
LLIA_WAKEREQIN	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define LLIA_WAKEREQIN	/;"	d
LLIA_WAKEREQOUT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define LLIA_WAKEREQOUT	/;"	d
LLIB_WAKEREQIN	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define LLIB_WAKEREQIN	/;"	d
LLIB_WAKEREQOUT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define LLIB_WAKEREQOUT	/;"	d
LLONG_MAX	include/linux/kernel.h	/^#define LLONG_MAX	/;"	d
LLONG_MIN	include/linux/kernel.h	/^#define LLONG_MIN	/;"	d
LLVMS_RELFLAGS	arch/arm/config.mk	/^LLVMS_RELFLAGS		:= $(call cc-option,-mllvm,) \\$/;"	m
LL_FIFO_IER_RC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_RC	/;"	d
LL_FIFO_IER_RPORE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_RPORE	/;"	d
LL_FIFO_IER_RPUE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_RPUE	/;"	d
LL_FIFO_IER_RPURE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_RPURE	/;"	d
LL_FIFO_IER_RRC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_RRC	/;"	d
LL_FIFO_IER_TC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_TC	/;"	d
LL_FIFO_IER_TPOE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_TPOE	/;"	d
LL_FIFO_IER_TRC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_TRC	/;"	d
LL_FIFO_IER_TSE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_IER_TSE	/;"	d
LL_FIFO_ISR_RC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_RC	/;"	d
LL_FIFO_ISR_RPORE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_RPORE	/;"	d
LL_FIFO_ISR_RPUE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_RPUE	/;"	d
LL_FIFO_ISR_RPURE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_RPURE	/;"	d
LL_FIFO_ISR_RRC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_RRC	/;"	d
LL_FIFO_ISR_TC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_TC	/;"	d
LL_FIFO_ISR_TPOE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_TPOE	/;"	d
LL_FIFO_ISR_TRC	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_TRC	/;"	d
LL_FIFO_ISR_TSE	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_ISR_TSE	/;"	d
LL_FIFO_LLR_KEY	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_LLR_KEY	/;"	d
LL_FIFO_RDFO_MASK	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RDFO_MASK	/;"	d
LL_FIFO_RDFO_POS	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RDFO_POS	/;"	d
LL_FIFO_RDFR_KEY	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RDFR_KEY	/;"	d
LL_FIFO_RLF_MASK	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RLF_MASK	/;"	d
LL_FIFO_RLF_MAX	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RLF_MAX	/;"	d
LL_FIFO_RLF_MIN	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RLF_MIN	/;"	d
LL_FIFO_RLF_POS	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_RLF_POS	/;"	d
LL_FIFO_TDFR_KEY	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TDFR_KEY	/;"	d
LL_FIFO_TDFV_MASK	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TDFV_MASK	/;"	d
LL_FIFO_TDFV_POS	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TDFV_POS	/;"	d
LL_FIFO_TLF_MASK	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TLF_MASK	/;"	d
LL_FIFO_TLF_MAX	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TLF_MAX	/;"	d
LL_FIFO_TLF_MIN	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TLF_MIN	/;"	d
LL_FIFO_TLF_POS	drivers/net/xilinx_ll_temac_fifo.h	/^#define LL_FIFO_TLF_POS	/;"	d
LMA_EQ_VMA	arch/xtensa/include/asm/ldscript.h	/^#define LMA_EQ_VMA$/;"	d
LMB_ALLOC_ANYWHERE	lib/lmb.c	/^#define LMB_ALLOC_ANYWHERE	/;"	d	file:
LNKW_X1	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^	LNKW_X1			= 0x1,$/;"	e	enum:__anon6535c0830103	file:
LNKW_X4	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^	LNKW_X4			= 0x4,$/;"	e	enum:__anon6535c0830103	file:
LNKW_X8	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^	LNKW_X8			= 0x8$/;"	e	enum:__anon6535c0830103	file:
LNST	drivers/usb/host/r8a66597.h	/^#define	LNST	/;"	d
LO	arch/blackfin/include/asm/blackfin_local.h	/^#define LO(/;"	d
LO	arch/powerpc/cpu/mpc8xx/video.c	/^#define LO(/;"	d	file:
LOA	include/sym53c8xx.h	/^  #define   LOA /;"	d
LOAD	lib/zlib/inflate.c	/^#define LOAD(/;"	d	file:
LOADDLL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define LOADDLL	/;"	d
LOADED_HIGH	arch/x86/include/asm/bootparam.h	/^#define LOADED_HIGH	/;"	d
LOADED_IMAGE_GUID	include/efi_api.h	/^#define LOADED_IMAGE_GUID /;"	d
LOADED_IMAGE_PROTOCOL_GUID	include/efi_api.h	/^#define LOADED_IMAGE_PROTOCOL_GUID /;"	d
LOADER_TYPE	arch/sh/include/asm/zimage.h	/^#define LOADER_TYPE	/;"	d
LOADMODE_SHIFT	arch/arm/include/asm/arch-omap3/dss.h	/^#define LOADMODE_SHIFT	/;"	d
LOAD_ADDR	board/cm5200/fwupdate.h	/^#define LOAD_ADDR	/;"	d
LOAD_ADDR	examples/api/Makefile	/^LOAD_ADDR = 0x1000000$/;"	m
LOAD_ADDR	examples/api/Makefile	/^LOAD_ADDR = 0x40000$/;"	m
LOAD_ADDR	examples/api/Makefile	/^LOAD_ADDR = 0x80200000$/;"	m
LOAD_ADDR	examples/api/Makefile	/^LOAD_ADDR = 0xffffffff80200000$/;"	m
LOAD_CMP	include/linux/mtd/samsung_onenand.h	/^#define LOAD_CMP /;"	d
LOAD_DATA	drivers/video/da8xx-fb.h	/^	LOAD_DATA = 1,$/;"	e	enum:raster_load_mode
LOAD_LONG	board/esd/common/lcd.h	/^#define LOAD_LONG(/;"	d
LOAD_MODE_CMD	drivers/ddr/microchip/ddr2_regs.h	/^#define LOAD_MODE_CMD	/;"	d
LOAD_PALETTE	drivers/video/da8xx-fb.h	/^	LOAD_PALETTE,$/;"	e	enum:raster_load_mode
LOAD_PATTERN	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	LOAD_PATTERN,$/;"	e	enum:auto_tune_stage
LOAD_PATTERN_2	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	LOAD_PATTERN_2,$/;"	e	enum:auto_tune_stage
LOAD_PATTERN_2_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define LOAD_PATTERN_2_MASK_BIT	/;"	d
LOAD_PATTERN_HIGH	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	LOAD_PATTERN_HIGH,$/;"	e	enum:auto_tune_stage
LOAD_PATTERN_HIGH_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define LOAD_PATTERN_HIGH_MASK_BIT	/;"	d
LOAD_PATTERN_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define LOAD_PATTERN_MASK_BIT	/;"	d
LOAD_SHORT	board/esd/common/lcd.h	/^#define LOAD_SHORT(/;"	d
LOAD_WAIT_CNT	drivers/mtd/nand/denali.h	/^#define LOAD_WAIT_CNT	/;"	d
LOAD_WAIT_CNT__VALUE	drivers/mtd/nand/denali.h	/^#define     LOAD_WAIT_CNT__VALUE	/;"	d
LOAD_WAIT_COUNT	drivers/mtd/nand/denali.h	/^#define LOAD_WAIT_COUNT /;"	d
LOB	arch/blackfin/include/asm/serial1.h	/^#define LOB(/;"	d
LOBYTE	board/micronas/vct/smc_eeprom.c	/^#define LOBYTE(/;"	d	file:
LOCALEDIR	scripts/kconfig/lkc.h	/^#define LOCALEDIR /;"	d
LOCALITY0	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define LOCALITY0	/;"	d	file:
LOCALITY0	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define LOCALITY0	/;"	d	file:
LOCALVERSION	Kconfig	/^config LOCALVERSION$/;"	c	menu:General setup
LOCALVERSION_AUTO	Kconfig	/^config LOCALVERSION_AUTO$/;"	c	menu:General setup
LOCAL_APIC_FLAG_ENABLED	arch/x86/include/asm/acpi_table.h	/^#define LOCAL_APIC_FLAG_ENABLED	/;"	d
LOCAL_CPU_SLAVE	board/mpl/pati/pati.h	/^#define LOCAL_CPU_SLAVE	/;"	d
LOCAL_MAP_NR	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define LOCAL_MAP_NR(/;"	d
LOCAL_OFFSET	board/mpl/pati/plx9056.h	/^#define LOCAL_OFFSET	/;"	d
LOCHAR	arch/powerpc/cpu/mpc8xx/video.c	/^#define LOCHAR(/;"	d	file:
LOCK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define LOCK	/;"	d	file:
LOCK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define LOCK	/;"	d
LOCKED_BLK	include/linux/mtd/samsung_onenand.h	/^#define LOCKED_BLK /;"	d
LOCKED_MASK	arch/arm/mach-socfpga/clock_manager.c	/^#define LOCKED_MASK /;"	d	file:
LOCKTIME	board/mpl/vcma9/lowlevel_init.S	/^#define LOCKTIME	/;"	d	file:
LOCK_DET_BYPASS	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LOCK_DET_BYPASS	/;"	d
LOCK_DET_CNT_SEL_256	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LOCK_DET_CNT_SEL_256	/;"	d
LOCK_KEY	arch/mips/mach-pic32/reset.c	/^#define LOCK_KEY	/;"	d	file:
LOCK_KEY	drivers/mtd/pic32_flash.c	/^#define LOCK_KEY	/;"	d	file:
LOCK_LOCK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	LOCK_LOCK,$/;"	e	enum:__anon3783c4e20903
LOCK_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	LOCK_MASK		= 1,$/;"	e	enum:__anon3783c4e20903
LOCK_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define LOCK_P	/;"	d
LOCK_PREFIX	arch/x86/include/asm/bitops.h	/^#define LOCK_PREFIX /;"	d
LOCK_PR_UNLOCK_KEY	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define LOCK_PR_UNLOCK_KEY /;"	d	file:
LOCK_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	LOCK_SHIFT		= 0x1f,$/;"	e	enum:__anon3783c4e20903
LOCK_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define LOCK_SHIFT	/;"	d	file:
LOCK_UNLOCK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	LOCK_UNLOCK		= 0,$/;"	e	enum:__anon3783c4e20903
LODWORD	tools/mingw_support.h	/^#define LODWORD(/;"	d
LOG2	include/part.h	/^#define LOG2(/;"	d
LOG2_BLOCK_SIZE	include/ext_common.h	/^#define LOG2_BLOCK_SIZE(/;"	d
LOG2_INVALID	include/part.h	/^#define LOG2_INVALID(/;"	d
LOG2_PERIODIC_SIZE	drivers/usb/host/isp116x.h	/^#define	LOG2_PERIODIC_SIZE	/;"	d
LOG2_STATUS_INTERVAL_MSEC	drivers/usb/gadget/ether.c	/^#define LOG2_STATUS_INTERVAL_MSEC	/;"	d	file:
LOGBUFF_LEN	include/logbuff.h	/^#define LOGBUFF_LEN	/;"	d
LOGBUFF_MAGIC	include/logbuff.h	/^#define LOGBUFF_MAGIC	/;"	d
LOGBUFF_MASK	include/logbuff.h	/^#define LOGBUFF_MASK	/;"	d
LOGBUFF_OVERHEAD	include/logbuff.h	/^#define LOGBUFF_OVERHEAD /;"	d
LOGBUFF_RESERVE	include/logbuff.h	/^#define LOGBUFF_RESERVE /;"	d
LOGICAL_DEVICE	include/ns87308.h	/^#define LOGICAL_DEVICE /;"	d
LOGICAL_PAGE_DATA_SIZE	drivers/mtd/nand/denali.h	/^#define LOGICAL_PAGE_DATA_SIZE	/;"	d
LOGICAL_PAGE_DATA_SIZE__VALUE	drivers/mtd/nand/denali.h	/^#define     LOGICAL_PAGE_DATA_SIZE__VALUE	/;"	d
LOGICAL_PAGE_SPARE_SIZE	drivers/mtd/nand/denali.h	/^#define LOGICAL_PAGE_SPARE_SIZE	/;"	d
LOGICAL_PAGE_SPARE_SIZE__VALUE	drivers/mtd/nand/denali.h	/^#define     LOGICAL_PAGE_SPARE_SIZE__VALUE	/;"	d
LOGO_BMP	tools/Makefile	/^LOGO_BMP= $(srctree)\/$(src)\/logos\/$(BOARD).bmp$/;"	m
LOGO_BMP	tools/Makefile	/^LOGO_BMP= $(srctree)\/$(src)\/logos\/$(VENDOR).bmp$/;"	m
LOGO_BMP	tools/Makefile	/^LOGO_BMP= $(srctree)\/$(src)\/logos\/denx.bmp$/;"	m
LOGO_DATA_H	tools/Makefile	/^LOGO_DATA_H = $(objtree)\/include\/bmp_logo_data.h$/;"	m
LOGO_H	tools/Makefile	/^LOGO_H = $(objtree)\/include\/bmp_logo.h$/;"	m
LOG_PREFIX	board/cm5200/fwupdate.h	/^#define LOG_PREFIX	/;"	d
LOG_inpb	drivers/bios_emulator/biosemui.h	/^#define LOG_inpb(/;"	d
LOG_inpd	drivers/bios_emulator/biosemui.h	/^#define LOG_inpd(/;"	d
LOG_inpw	drivers/bios_emulator/biosemui.h	/^#define LOG_inpw(/;"	d
LOG_outpb	drivers/bios_emulator/biosemui.h	/^#define LOG_outpb(/;"	d
LOG_outpd	drivers/bios_emulator/biosemui.h	/^#define LOG_outpd(/;"	d
LOG_outpw	drivers/bios_emulator/biosemui.h	/^#define LOG_outpw(/;"	d
LONG	arch/mips/include/asm/asm.h	/^#define LONG	/;"	d
LONGLOG	arch/mips/include/asm/asm.h	/^#define LONGLOG	/;"	d
LONGMASK	arch/mips/include/asm/asm.h	/^#define LONGMASK	/;"	d
LONGSIZE	arch/mips/include/asm/asm.h	/^#define LONGSIZE	/;"	d
LONG_ADD	arch/mips/include/asm/asm.h	/^#define LONG_ADD	/;"	d
LONG_ADDI	arch/mips/include/asm/asm.h	/^#define LONG_ADDI	/;"	d
LONG_ADDIU	arch/mips/include/asm/asm.h	/^#define LONG_ADDIU	/;"	d
LONG_ADDU	arch/mips/include/asm/asm.h	/^#define LONG_ADDU	/;"	d
LONG_L	arch/mips/include/asm/asm.h	/^#define LONG_L	/;"	d
LONG_MAX	include/linux/kernel.h	/^#define LONG_MAX	/;"	d
LONG_MIN	include/linux/kernel.h	/^#define LONG_MIN	/;"	d
LONG_S	arch/mips/include/asm/asm.h	/^#define LONG_S	/;"	d
LONG_SLL	arch/mips/include/asm/asm.h	/^#define LONG_SLL	/;"	d
LONG_SLLV	arch/mips/include/asm/asm.h	/^#define LONG_SLLV	/;"	d
LONG_SP	arch/mips/include/asm/asm.h	/^#define LONG_SP	/;"	d
LONG_SRA	arch/mips/include/asm/asm.h	/^#define LONG_SRA	/;"	d
LONG_SRAV	arch/mips/include/asm/asm.h	/^#define LONG_SRAV	/;"	d
LONG_SRL	arch/mips/include/asm/asm.h	/^#define LONG_SRL	/;"	d
LONG_SRLV	arch/mips/include/asm/asm.h	/^#define LONG_SRLV	/;"	d
LONG_SUB	arch/mips/include/asm/asm.h	/^#define LONG_SUB	/;"	d
LONG_SUBU	arch/mips/include/asm/asm.h	/^#define LONG_SUBU	/;"	d
LOOP	drivers/serial/serial_bfin.c	/^# define LOOP(/;"	d	file:
LOOP	drivers/serial/serial_bfin.c	/^LOOP($/;"	f	file:
LOOPBACK_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define LOOPBACK_REG	/;"	d
LOOPW	cmd/Kconfig	/^config LOOPW$/;"	c	menu:Command line interface""Memory commands
LOOP_ENA	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define LOOP_ENA	/;"	d
LOOP_ENA	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define LOOP_ENA	/;"	d
LOOP_ENA_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define LOOP_ENA_P	/;"	d
LOOP_FILTER_RESET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LOOP_FILTER_RESET	/;"	d
LOSHORT	arch/powerpc/cpu/mpc8xx/video.c	/^#define LOSHORT(/;"	d	file:
LOSTARB	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	LOSTARB	/;"	d
LOW	board/renesas/sh7785lcr/rtl8169.h	/^#define LOW	/;"	d
LOWER_BITS_RUBIN	include/jffs2/compr_rubin.h	/^#define LOWER_BITS_RUBIN /;"	d
LOWER_MARGIN	drivers/video/da8xx-fb.c	/^#define LOWER_MARGIN	/;"	d	file:
LOWORD	board/micronas/vct/smc_eeprom.c	/^#define LOWORD(/;"	d	file:
LOW_8BIT_CAL_DONE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LOW_8BIT_CAL_DONE			= 1 << 0,$/;"	e	enum:__anon957231910103	file:
LOW_8BIT_DLL_BYPASS	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LOW_8BIT_DLL_BYPASS			= 1 << 2,$/;"	e	enum:__anon957231910103	file:
LOW_8BIT_DLL_BYPASS_DISABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LOW_8BIT_DLL_BYPASS_DISABLE		= 0 << 2,$/;"	e	enum:__anon957231910103	file:
LOW_EVEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define LOW_EVEN /;"	d
LOW_LEVEL_MERAM_STACK	include/configs/alt.h	/^#define LOW_LEVEL_MERAM_STACK /;"	d
LOW_LEVEL_MERAM_STACK	include/configs/armadillo-800eva.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_MERAM_STACK	include/configs/blanche.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_MERAM_STACK	include/configs/gose.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_MERAM_STACK	include/configs/koelsch.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_MERAM_STACK	include/configs/kzm9g.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_MERAM_STACK	include/configs/lager.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_MERAM_STACK	include/configs/porter.h	/^#define LOW_LEVEL_MERAM_STACK /;"	d
LOW_LEVEL_MERAM_STACK	include/configs/silk.h	/^#define LOW_LEVEL_MERAM_STACK /;"	d
LOW_LEVEL_MERAM_STACK	include/configs/stout.h	/^#define LOW_LEVEL_MERAM_STACK	/;"	d
LOW_LEVEL_SRAM_STACK	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define LOW_LEVEL_SRAM_STACK	/;"	d
LOW_LEVEL_SRAM_STACK	arch/arm/include/asm/arch-omap3/omap.h	/^#define LOW_LEVEL_SRAM_STACK	/;"	d
LOW_LEVEL_SRAM_STACK	arch/arm/include/asm/arch-tegra/tegra.h	/^#define LOW_LEVEL_SRAM_STACK	/;"	d
LOW_LEVEL_SRAM_STACK	include/configs/sunxi-common.h	/^#define LOW_LEVEL_SRAM_STACK	/;"	d
LOW_ODD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define LOW_ODD /;"	d
LOW_POWER	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LOW_POWER	/;"	d
LOW_POWER	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LOW_POWER,$/;"	e	enum:__anon957231910203	file:
LOW_POWER_ENTRY_REQ	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LOW_POWER_ENTRY_REQ	/;"	d
LOW_POWER_ENTRY_REQ	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LOW_POWER_ENTRY_REQ,$/;"	e	enum:__anon957231910203	file:
LOW_POWER_EXIT_REQ	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LOW_POWER_EXIT_REQ	/;"	d
LOW_POWER_EXIT_REQ	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LOW_POWER_EXIT_REQ,$/;"	e	enum:__anon957231910203	file:
LOW_RAM_ADDR	arch/x86/include/asm/arch-qemu/qemu.h	/^#define LOW_RAM_ADDR	/;"	d
LOW_WORD	board/mpl/pati/pci_eeprom.h	/^#define LOW_WORD(/;"	d
LP8732	include/power/lp873x.h	/^#define	LP8732	/;"	d
LP8733	include/power/lp873x.h	/^#define LP8733	/;"	d
LP873X_BUCK_DRIVER	include/power/lp873x.h	/^#define LP873X_BUCK_DRIVER	/;"	d
LP873X_BUCK_MODE_MASK	include/power/lp873x.h	/^#define LP873X_BUCK_MODE_MASK	/;"	d
LP873X_BUCK_NUM	include/power/lp873x.h	/^#define LP873X_BUCK_NUM	/;"	d
LP873X_BUCK_VOLT_MASK	include/power/lp873x.h	/^#define LP873X_BUCK_VOLT_MASK	/;"	d
LP873X_BUCK_VOLT_MAX	include/power/lp873x.h	/^#define LP873X_BUCK_VOLT_MAX	/;"	d
LP873X_BUCK_VOLT_MAX_HEX	include/power/lp873x.h	/^#define LP873X_BUCK_VOLT_MAX_HEX	/;"	d
LP873X_LDO_DRIVER	include/power/lp873x.h	/^#define LP873X_LDO_DRIVER	/;"	d
LP873X_LDO_MODE_MASK	include/power/lp873x.h	/^#define LP873X_LDO_MODE_MASK	/;"	d
LP873X_LDO_NUM	include/power/lp873x.h	/^#define LP873X_LDO_NUM	/;"	d
LP873X_LDO_VOLT_MASK	include/power/lp873x.h	/^#define LP873X_LDO_VOLT_MASK /;"	d
LP873X_LDO_VOLT_MAX	include/power/lp873x.h	/^#define LP873X_LDO_VOLT_MAX /;"	d
LP873X_LDO_VOLT_MAX_HEX	include/power/lp873x.h	/^#define LP873X_LDO_VOLT_MAX_HEX /;"	d
LPA_100	include/linux/mii.h	/^#define LPA_100	/;"	d
LPA_1000FULL	include/linux/mii.h	/^#define LPA_1000FULL	/;"	d
LPA_1000HALF	include/linux/mii.h	/^#define LPA_1000HALF	/;"	d
LPA_1000LOCALRXOK	include/linux/mii.h	/^#define LPA_1000LOCALRXOK	/;"	d
LPA_1000REMRXOK	include/linux/mii.h	/^#define LPA_1000REMRXOK	/;"	d
LPA_1000XFULL	include/linux/mii.h	/^#define LPA_1000XFULL	/;"	d
LPA_1000XHALF	include/linux/mii.h	/^#define LPA_1000XHALF	/;"	d
LPA_1000XPAUSE	include/linux/mii.h	/^#define LPA_1000XPAUSE	/;"	d
LPA_1000XPAUSE_ASYM	include/linux/mii.h	/^#define LPA_1000XPAUSE_ASYM	/;"	d
LPA_100BASE4	include/linux/mii.h	/^#define LPA_100BASE4	/;"	d
LPA_100FULL	include/linux/mii.h	/^#define LPA_100FULL	/;"	d
LPA_100HALF	include/linux/mii.h	/^#define LPA_100HALF	/;"	d
LPA_10FULL	include/linux/mii.h	/^#define LPA_10FULL	/;"	d
LPA_10HALF	include/linux/mii.h	/^#define LPA_10HALF	/;"	d
LPA_DUPLEX	include/linux/mii.h	/^#define LPA_DUPLEX	/;"	d
LPA_LPACK	include/linux/mii.h	/^#define LPA_LPACK	/;"	d
LPA_NPAGE	include/linux/mii.h	/^#define LPA_NPAGE	/;"	d
LPA_PAUSE_ASYM	include/linux/mii.h	/^#define LPA_PAUSE_ASYM	/;"	d
LPA_PAUSE_CAP	include/linux/mii.h	/^#define LPA_PAUSE_CAP	/;"	d
LPA_RESV	include/linux/mii.h	/^#define LPA_RESV	/;"	d
LPA_RFAULT	include/linux/mii.h	/^#define LPA_RFAULT	/;"	d
LPA_SLCT	include/linux/mii.h	/^#define LPA_SLCT	/;"	d
LPC32XX_BOOT_BLOCK_OK	tools/lpc32xximage.c	/^#define LPC32XX_BOOT_BLOCK_OK /;"	d	file:
LPC32XX_BOOT_CODESIZE	tools/lpc32xximage.c	/^#define LPC32XX_BOOT_CODESIZE /;"	d	file:
LPC32XX_BOOT_ICR	tools/lpc32xximage.c	/^#define LPC32XX_BOOT_ICR /;"	d	file:
LPC32XX_BOOT_NAND_PAGESIZE	tools/lpc32xximage.c	/^#define LPC32XX_BOOT_NAND_PAGESIZE /;"	d	file:
LPC32XX_BOOT_NAND_PAGES_PER_SECTOR	tools/lpc32xximage.c	/^#define LPC32XX_BOOT_NAND_PAGES_PER_SECTOR /;"	d	file:
LPC32XX_ETH_BASE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define LPC32XX_ETH_BASE /;"	d
LPC32XX_ETH_DEVICE_SIZE	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_DEVICE_SIZE /;"	d	file:
LPC32XX_ETH_RX_CTRL_INTERRUPT	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_RX_CTRL_INTERRUPT /;"	d	file:
LPC32XX_ETH_RX_CTRL_SIZE_MASK	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_RX_CTRL_SIZE_MASK /;"	d	file:
LPC32XX_ETH_RX_CTRL_UNUSED	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_RX_CTRL_UNUSED /;"	d	file:
LPC32XX_ETH_RX_DESC_SIZE	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_RX_DESC_SIZE /;"	d	file:
LPC32XX_ETH_RX_STAT_SIZE	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_RX_STAT_SIZE /;"	d	file:
LPC32XX_ETH_TX_DESC_SIZE	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_TX_DESC_SIZE /;"	d	file:
LPC32XX_ETH_TX_STAT_SIZE	drivers/net/lpc32xx_eth.c	/^#define LPC32XX_ETH_TX_STAT_SIZE /;"	d	file:
LPC32XX_GPIO	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPIO(/;"	d
LPC32XX_GPIO	drivers/gpio/Kconfig	/^config LPC32XX_GPIO$/;"	c	menu:GPIO Support
LPC32XX_GPIOS	drivers/gpio/lpc32xx_gpio.c	/^#define LPC32XX_GPIOS /;"	d	file:
LPC32XX_GPIO_P0_GRP	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPIO_P0_GRP /;"	d
LPC32XX_GPIO_P1_GRP	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPIO_P1_GRP /;"	d
LPC32XX_GPIO_P2_GRP	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPIO_P2_GRP /;"	d
LPC32XX_GPIO_P3_GRP	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPIO_P3_GRP /;"	d
LPC32XX_GPI_P3_GRP	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPI_P3_GRP /;"	d
LPC32XX_GPO_P3_GRP	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define LPC32XX_GPO_P3_GRP /;"	d
LPC32XX_I2C_SOFT_RESET	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_SOFT_RESET	/;"	d	file:
LPC32XX_I2C_STAT_DRMI	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_STAT_DRMI	/;"	d	file:
LPC32XX_I2C_STAT_NAI	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_STAT_NAI	/;"	d	file:
LPC32XX_I2C_STAT_RFE	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_STAT_RFE	/;"	d	file:
LPC32XX_I2C_STAT_TDI	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_STAT_TDI	/;"	d	file:
LPC32XX_I2C_STAT_TFF	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_STAT_TFF	/;"	d	file:
LPC32XX_I2C_TX_START	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_TX_START	/;"	d	file:
LPC32XX_I2C_TX_STOP	drivers/i2c/lpc32xx_i2c.c	/^#define LPC32XX_I2C_TX_STOP	/;"	d	file:
LPC32X_NAND_TIMEOUT	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define LPC32X_NAND_TIMEOUT /;"	d	file:
LPC47M_FDC	include/smsc_lpc47m.h	/^#define LPC47M_FDC	/;"	d
LPC47M_IO_PORT	include/smsc_lpc47m.h	/^#define LPC47M_IO_PORT	/;"	d
LPC47M_KBC	include/smsc_lpc47m.h	/^#define LPC47M_KBC	/;"	d
LPC47M_PME	include/smsc_lpc47m.h	/^#define LPC47M_PME	/;"	d
LPC47M_PP	include/smsc_lpc47m.h	/^#define LPC47M_PP	/;"	d
LPC47M_SP1	include/smsc_lpc47m.h	/^#define LPC47M_SP1	/;"	d
LPC47M_SP2	include/smsc_lpc47m.h	/^#define LPC47M_SP2	/;"	d
LPCI_DEVICE	cmd/tsi148.c	/^#define LPCI_DEVICE /;"	d	file:
LPCI_VENDOR	cmd/tsi148.c	/^#define LPCI_VENDOR /;"	d	file:
LPCS0AW	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define LPCS0AW	/;"	d
LPC_DEV	arch/x86/cpu/baytrail/early_uart.c	/^#define LPC_DEV	/;"	d	file:
LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define LPC_EN	/;"	d
LPC_FUNC	arch/x86/cpu/baytrail/early_uart.c	/^#define LPC_FUNC	/;"	d	file:
LPC_GEN1_DEC	arch/x86/include/asm/lpc_common.h	/^#define LPC_GEN1_DEC	/;"	d
LPC_GEN2_DEC	arch/x86/include/asm/lpc_common.h	/^#define LPC_GEN2_DEC	/;"	d
LPC_GEN3_DEC	arch/x86/include/asm/lpc_common.h	/^#define LPC_GEN3_DEC	/;"	d
LPC_GEN4_DEC	arch/x86/include/asm/lpc_common.h	/^#define LPC_GEN4_DEC	/;"	d
LPC_GENX_DEC	arch/x86/include/asm/lpc_common.h	/^#define LPC_GENX_DEC(/;"	d
LPC_IO_DEC	arch/x86/include/asm/lpc_common.h	/^#define LPC_IO_DEC	/;"	d
LPC_OFFSET	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define LPC_OFFSET	/;"	d
LPC_RCBA	arch/x86/include/asm/arch-queensbay/tnc.h	/^#define LPC_RCBA	/;"	d
LPDDR2IO_GR10_WD_MASK	arch/arm/include/asm/arch-omap4/omap.h	/^#define LPDDR2IO_GR10_WD_MASK	/;"	d
LPDDR2IO_GR10_WD_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define LPDDR2IO_GR10_WD_MASK	/;"	d
LPDDR2_ADDRCTRL_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_ADDRCTRL_IOCTRL_VALUE /;"	d
LPDDR2_ADDRCTRL_WD0_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_ADDRCTRL_WD0_IOCTRL_VALUE /;"	d
LPDDR2_ADDRCTRL_WD1_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_ADDRCTRL_WD1_IOCTRL_VALUE /;"	d
LPDDR2_An_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_An_PAD	/;"	d
LPDDR2_CKEn_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_CKEn_PAD	/;"	d
LPDDR2_CLK0_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_CLK0_PAD	/;"	d
LPDDR2_CS_Bn_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_CS_Bn_PAD	/;"	d
LPDDR2_DATA0_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_DATA0_IOCTRL_VALUE /;"	d
LPDDR2_DATA1_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_DATA1_IOCTRL_VALUE /;"	d
LPDDR2_DATA2_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_DATA2_IOCTRL_VALUE /;"	d
LPDDR2_DATA3_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define  LPDDR2_DATA3_IOCTRL_VALUE /;"	d
LPDDR2_DENSITY_128Mb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_128Mb	/;"	d
LPDDR2_DENSITY_16Gb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_16Gb	/;"	d
LPDDR2_DENSITY_1Gb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_1Gb	/;"	d
LPDDR2_DENSITY_256Mb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_256Mb	/;"	d
LPDDR2_DENSITY_2Gb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_2Gb	/;"	d
LPDDR2_DENSITY_32Gb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_32Gb	/;"	d
LPDDR2_DENSITY_4Gb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_4Gb	/;"	d
LPDDR2_DENSITY_512Mb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_512Mb	/;"	d
LPDDR2_DENSITY_64Mb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_64Mb	/;"	d
LPDDR2_DENSITY_8Gb	arch/arm/include/asm/emif.h	/^#define LPDDR2_DENSITY_8Gb	/;"	d
LPDDR2_DMn_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_DMn_PAD	/;"	d
LPDDR2_DQSn_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_DQSn_PAD	/;"	d
LPDDR2_Dn_PAD	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define LPDDR2_Dn_PAD	/;"	d
LPDDR2_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_EN	/;"	d
LPDDR2_IO_WIDTH_16	arch/arm/include/asm/emif.h	/^#define	LPDDR2_IO_WIDTH_16	/;"	d
LPDDR2_IO_WIDTH_32	arch/arm/include/asm/emif.h	/^#define	LPDDR2_IO_WIDTH_32	/;"	d
LPDDR2_IO_WIDTH_8	arch/arm/include/asm/emif.h	/^#define	LPDDR2_IO_WIDTH_8	/;"	d
LPDDR2_MANUFACTURER_ELPIDA	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_ELPIDA	/;"	d
LPDDR2_MANUFACTURER_ESMT	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_ESMT	/;"	d
LPDDR2_MANUFACTURER_ETRON	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_ETRON	/;"	d
LPDDR2_MANUFACTURER_HYNIX	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_HYNIX	/;"	d
LPDDR2_MANUFACTURER_INTEL	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_INTEL	/;"	d
LPDDR2_MANUFACTURER_MICRON	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_MICRON	/;"	d
LPDDR2_MANUFACTURER_MOSEL	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_MOSEL	/;"	d
LPDDR2_MANUFACTURER_NANYA	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_NANYA	/;"	d
LPDDR2_MANUFACTURER_NUMONYX	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_NUMONYX	/;"	d
LPDDR2_MANUFACTURER_QIMONDA	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_QIMONDA	/;"	d
LPDDR2_MANUFACTURER_SAMSUNG	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_SAMSUNG	/;"	d
LPDDR2_MANUFACTURER_SPANSION	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_SPANSION /;"	d
LPDDR2_MANUFACTURER_SST	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_SST	/;"	d
LPDDR2_MANUFACTURER_WINBOND	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_WINBOND	/;"	d
LPDDR2_MANUFACTURER_ZMOS	arch/arm/include/asm/emif.h	/^#define LPDDR2_MANUFACTURER_ZMOS	/;"	d
LPDDR2_MA_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_MA_MASK	/;"	d
LPDDR2_MA_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_MA_SHIFT	/;"	d
LPDDR2_MR0	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0	/;"	d
LPDDR2_MR0_DAI_MASK	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0_DAI_MASK	/;"	d
LPDDR2_MR0_DAI_SHIFT	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0_DAI_SHIFT	/;"	d
LPDDR2_MR0_DI_MASK	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0_DI_MASK	/;"	d
LPDDR2_MR0_DI_SHIFT	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0_DI_SHIFT	/;"	d
LPDDR2_MR0_DNVI_MASK	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0_DNVI_MASK	/;"	d
LPDDR2_MR0_DNVI_SHIFT	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR0_DNVI_SHIFT	/;"	d
LPDDR2_MR1	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR1	/;"	d
LPDDR2_MR10	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR10	/;"	d
LPDDR2_MR11	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR11	/;"	d
LPDDR2_MR16	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR16	/;"	d
LPDDR2_MR17	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR17	/;"	d
LPDDR2_MR18	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR18	/;"	d
LPDDR2_MR2	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR2	/;"	d
LPDDR2_MR3	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR3	/;"	d
LPDDR2_MR4	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR4	/;"	d
LPDDR2_MR5	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR5	/;"	d
LPDDR2_MR6	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR6	/;"	d
LPDDR2_MR7	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR7	/;"	d
LPDDR2_MR8	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR8	/;"	d
LPDDR2_MR9	arch/arm/include/asm/emif.h	/^#define LPDDR2_MR9	/;"	d
LPDDR2_OP_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_OP_MASK	/;"	d
LPDDR2_OP_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_OP_SHIFT	/;"	d
LPDDR2_S2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_S2	/;"	d
LPDDR2_S4	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LPDDR2_S4	/;"	d
LPDDR2_TYPE_NVM	arch/arm/include/asm/emif.h	/^#define	LPDDR2_TYPE_NVM	/;"	d
LPDDR2_TYPE_S2	arch/arm/include/asm/emif.h	/^#define	LPDDR2_TYPE_S2	/;"	d
LPDDR2_TYPE_S4	arch/arm/include/asm/emif.h	/^#define	LPDDR2_TYPE_S4	/;"	d
LPDDR2_VOLTAGE_RAMPING	arch/arm/include/asm/emif.h	/^#define LPDDR2_VOLTAGE_RAMPING	/;"	d
LPDDR2_VOLTAGE_STABLE	arch/arm/include/asm/emif.h	/^#define LPDDR2_VOLTAGE_STABLE	/;"	d
LPDDR3	arch/arm/include/asm/arch-rockchip/sdram.h	/^	LPDDR3 = 6,$/;"	e	enum:__anoncf023d3e0103
LPDDR3_EN0_LPDDR3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	LPDDR3_EN0_LPDDR3	= 1,$/;"	e	enum:__anonbeb2b9771303
LPDDR3_EN0_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	LPDDR3_EN0_MASK		= 1,$/;"	e	enum:__anonbeb2b9771303
LPDDR3_EN0_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	LPDDR3_EN0_SHIFT	= 8,$/;"	e	enum:__anonbeb2b9771303
LPDDR3_EN1_LPDDR3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	LPDDR3_EN1_LPDDR3	= 1,$/;"	e	enum:__anonbeb2b9771303
LPDDR3_EN1_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	LPDDR3_EN1_MASK		= 1,$/;"	e	enum:__anonbeb2b9771303
LPDDR3_EN1_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	LPDDR3_EN1_SHIFT	= 0xb,$/;"	e	enum:__anonbeb2b9771303
LPE_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define LPE_DEV	/;"	d
LPE_DMA0_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPE_DMA0_IRQ	/;"	d
LPE_DMA1_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPE_DMA1_IRQ	/;"	d
LPE_IPC2HOST_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPE_IPC2HOST_IRQ	/;"	d
LPE_SSP0_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPE_SSP0_IRQ	/;"	d
LPE_SSP1_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPE_SSP1_IRQ	/;"	d
LPE_SSP2_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPE_SSP2_IRQ	/;"	d
LPF_AUTO_TUNE	drivers/usb/eth/r8152.h	/^#define LPF_AUTO_TUNE	/;"	d
LPMD_MASK	arch/arm/mach-tegra/pinmux-common.c	/^#define LPMD_MASK	/;"	d	file:
LPMD_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define LPMD_SHIFT	/;"	d	file:
LPM_TIMER_500MS	drivers/usb/eth/r8152.h	/^#define LPM_TIMER_500MS	/;"	d
LPM_TIMER_500US	drivers/usb/eth/r8152.h	/^#define LPM_TIMER_500US	/;"	d
LPM_TIMER_MASK	drivers/usb/eth/r8152.h	/^#define LPM_TIMER_MASK	/;"	d
LPROPS_CAT_MASK	fs/ubifs/ubifs.h	/^	LPROPS_CAT_MASK  = 15,$/;"	e	enum:__anonf648d0840c03
LPROPS_DIRTY	fs/ubifs/ubifs.h	/^	LPROPS_DIRTY     =  1,$/;"	e	enum:__anonf648d0840c03
LPROPS_DIRTY_IDX	fs/ubifs/ubifs.h	/^	LPROPS_DIRTY_IDX =  2,$/;"	e	enum:__anonf648d0840c03
LPROPS_EMPTY	fs/ubifs/ubifs.h	/^	LPROPS_EMPTY     =  4,$/;"	e	enum:__anonf648d0840c03
LPROPS_FRDI_IDX	fs/ubifs/ubifs.h	/^	LPROPS_FRDI_IDX  =  6,$/;"	e	enum:__anonf648d0840c03
LPROPS_FREE	fs/ubifs/ubifs.h	/^	LPROPS_FREE      =  3,$/;"	e	enum:__anonf648d0840c03
LPROPS_FREEABLE	fs/ubifs/ubifs.h	/^	LPROPS_FREEABLE  =  5,$/;"	e	enum:__anonf648d0840c03
LPROPS_HEAP_CNT	fs/ubifs/ubifs.h	/^	LPROPS_HEAP_CNT  =  3,$/;"	e	enum:__anonf648d0840c03
LPROPS_INDEX	fs/ubifs/ubifs.h	/^	LPROPS_INDEX     = 32,$/;"	e	enum:__anonf648d0840c03
LPROPS_NC	fs/ubifs/ubifs.h	/^#define LPROPS_NC /;"	d
LPROPS_TAKEN	fs/ubifs/ubifs.h	/^	LPROPS_TAKEN     = 16,$/;"	e	enum:__anonf648d0840c03
LPROPS_UNCAT	fs/ubifs/ubifs.h	/^	LPROPS_UNCAT     =  0,$/;"	e	enum:__anonf648d0840c03
LPSME	drivers/usb/host/r8a66597.h	/^#define	LPSME	/;"	d
LPSS_DMA1_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_DMA1_IRQ	/;"	d
LPSS_DMA2_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_DMA2_IRQ	/;"	d
LPSS_HSUART1_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_HSUART1_IRQ	/;"	d
LPSS_HSUART2_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_HSUART2_IRQ	/;"	d
LPSS_I2C1_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C1_IRQ	/;"	d
LPSS_I2C2_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C2_IRQ	/;"	d
LPSS_I2C3_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C3_IRQ	/;"	d
LPSS_I2C4_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C4_IRQ	/;"	d
LPSS_I2C5_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C5_IRQ	/;"	d
LPSS_I2C6_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C6_IRQ	/;"	d
LPSS_I2C7_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_I2C7_IRQ	/;"	d
LPSS_SPI_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define LPSS_SPI_IRQ	/;"	d
LPTMR_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define LPTMR_BASE_ADDR	/;"	d
LPT_HEAP_SZ	fs/ubifs/ubifs.h	/^#define LPT_HEAP_SZ /;"	d
LPT_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  LPT_LPC_EN	/;"	d
LPT_SCAN_ADD	fs/ubifs/ubifs.h	/^	LPT_SCAN_ADD = 1,$/;"	e	enum:__anonf648d0840f03
LPT_SCAN_CONTINUE	fs/ubifs/ubifs.h	/^	LPT_SCAN_CONTINUE = 0,$/;"	e	enum:__anonf648d0840f03
LPT_SCAN_STOP	fs/ubifs/ubifs.h	/^	LPT_SCAN_STOP = 2,$/;"	e	enum:__anonf648d0840f03
LPUART_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define LPUART_BASE	/;"	d
LPUART_BASE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define LPUART_BASE	/;"	d
LP_MODE_CLK_REGULATOR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LP_MODE_CLK_REGULATOR	/;"	d
LP_MODE_CLOCK_STOP	arch/arm/include/asm/emif.h	/^#define LP_MODE_CLOCK_STOP	/;"	d
LP_MODE_DISABLE	arch/arm/include/asm/emif.h	/^#define LP_MODE_DISABLE	/;"	d
LP_MODE_PWR_DN	arch/arm/include/asm/emif.h	/^#define LP_MODE_PWR_DN	/;"	d
LP_MODE_SELF_REFRESH	arch/arm/include/asm/emif.h	/^#define LP_MODE_SELF_REFRESH	/;"	d
LP_OPTIONS	drivers/mtd/nand/nand_ids.c	/^#define LP_OPTIONS /;"	d	file:
LP_OPTIONS	drivers/mtd/nand/tegra_nand.h	/^#define LP_OPTIONS	/;"	d
LP_OPTIONS16	drivers/mtd/nand/nand_ids.c	/^#define LP_OPTIONS16 /;"	d	file:
LP_PD_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LP_PD_EN	/;"	d
LP_PD_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LP_PD_EN			= 1 << 0,$/;"	e	enum:__anon957231910203	file:
LP_RNPR_ACKNOWLDGE	drivers/net/e1000.h	/^#define LP_RNPR_ACKNOWLDGE	/;"	d
LP_RNPR_ACKNOWLDGE2	drivers/net/e1000.h	/^#define LP_RNPR_ACKNOWLDGE2	/;"	d
LP_RNPR_MSG_CODE_FIELD	drivers/net/e1000.h	/^#define LP_RNPR_MSG_CODE_FIELD	/;"	d
LP_RNPR_MSG_PAGE	drivers/net/e1000.h	/^#define LP_RNPR_MSG_PAGE	/;"	d
LP_RNPR_NEXT_PAGE	drivers/net/e1000.h	/^#define LP_RNPR_NEXT_PAGE	/;"	d
LP_RNPR_TOGGLE	drivers/net/e1000.h	/^#define LP_RNPR_TOGGLE	/;"	d
LP_SR_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LP_SR_EN	/;"	d
LP_SR_EN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	LP_SR_EN			= 1 << 8,$/;"	e	enum:__anon957231910203	file:
LP_TRIG_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LP_TRIG_MASK	/;"	d
LP_TRIG_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define LP_TRIG_SHIFT	/;"	d
LQ035_BGR	board/bf527-ezkit/video.c	/^#define LQ035_BGR	/;"	d	file:
LQ035_BT	board/bf527-ezkit/video.c	/^#define LQ035_BT	/;"	d	file:
LQ035_DATA	board/bf527-ezkit/video.c	/^#define LQ035_DATA	/;"	d	file:
LQ035_DRIVER_OUTPUT_CTL	board/bf527-ezkit/video.c	/^#define LQ035_DRIVER_OUTPUT_CTL	/;"	d	file:
LQ035_DRIVER_OUTPUT_DEFAULT	board/bf527-ezkit/video.c	/^#define LQ035_DRIVER_OUTPUT_DEFAULT	/;"	d	file:
LQ035_DRIVER_OUTPUT_MASK	board/bf527-ezkit/video.c	/^#define LQ035_DRIVER_OUTPUT_MASK	/;"	d	file:
LQ035_INDEX	board/bf527-ezkit/video.c	/^#define LQ035_INDEX	/;"	d	file:
LQ035_LR	board/bf527-ezkit/video.c	/^#define LQ035_LR	/;"	d	file:
LQ035_NORM	board/bf527-ezkit/video.c	/^#define LQ035_NORM	/;"	d	file:
LQ035_ON	board/bf527-ezkit/video.c	/^#define LQ035_ON	/;"	d	file:
LQ035_REV	board/bf527-ezkit/video.c	/^#define LQ035_REV	/;"	d	file:
LQ035_RGB	board/bf527-ezkit/video.c	/^#define LQ035_RGB	/;"	d	file:
LQ035_RL	board/bf527-ezkit/video.c	/^#define LQ035_RL	/;"	d	file:
LQ035_SHUT	board/bf527-ezkit/video.c	/^#define LQ035_SHUT	/;"	d	file:
LQ035_SHUT_CTL	board/bf527-ezkit/video.c	/^#define LQ035_SHUT_CTL	/;"	d	file:
LQ035_TB	board/bf527-ezkit/video.c	/^#define LQ035_TB	/;"	d	file:
LR	arch/powerpc/include/asm/processor.h	/^#define LR	/;"	d
LRADC_CH7_TESTMODE_TOGGLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH7_TESTMODE_TOGGLE	/;"	d
LRADC_CH_ACCUMULATE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH_ACCUMULATE	/;"	d
LRADC_CH_NUM_SAMPLES_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH_NUM_SAMPLES_MASK	/;"	d
LRADC_CH_NUM_SAMPLES_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH_NUM_SAMPLES_OFFSET	/;"	d
LRADC_CH_TOGGLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH_TOGGLE	/;"	d
LRADC_CH_VALUE_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH_VALUE_MASK	/;"	d
LRADC_CH_VALUE_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CH_VALUE_OFFSET	/;"	d
LRADC_CONVERSION_AUTOMATIC	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_AUTOMATIC	/;"	d
LRADC_CONVERSION_SCALED_BATT_VOLTAGE_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALED_BATT_VOLTAGE_MASK	/;"	d
LRADC_CONVERSION_SCALED_BATT_VOLTAGE_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALED_BATT_VOLTAGE_OFFSET	/;"	d
LRADC_CONVERSION_SCALE_FACTOR_ALT_LI_ION	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALE_FACTOR_ALT_LI_ION	/;"	d
LRADC_CONVERSION_SCALE_FACTOR_DUAL_NIMH	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALE_FACTOR_DUAL_NIMH	/;"	d
LRADC_CONVERSION_SCALE_FACTOR_LI_ION	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALE_FACTOR_LI_ION	/;"	d
LRADC_CONVERSION_SCALE_FACTOR_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALE_FACTOR_MASK	/;"	d
LRADC_CONVERSION_SCALE_FACTOR_NIMH	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALE_FACTOR_NIMH	/;"	d
LRADC_CONVERSION_SCALE_FACTOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CONVERSION_SCALE_FACTOR_OFFSET	/;"	d
LRADC_CTRL0_BUTTON0_DETECT_ENABLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_BUTTON0_DETECT_ENABLE	/;"	d
LRADC_CTRL0_BUTTON1_DETECT_ENABLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_BUTTON1_DETECT_ENABLE	/;"	d
LRADC_CTRL0_CLKGATE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_CLKGATE	/;"	d
LRADC_CTRL0_ONCHIP_GROUNDREF	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_ONCHIP_GROUNDREF	/;"	d
LRADC_CTRL0_SCHEDULE_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_SCHEDULE_MASK	/;"	d
LRADC_CTRL0_SCHEDULE_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_SCHEDULE_OFFSET	/;"	d
LRADC_CTRL0_SFTRST	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_SFTRST	/;"	d
LRADC_CTRL0_TOUCH_DETECT_ENABLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_TOUCH_DETECT_ENABLE	/;"	d
LRADC_CTRL0_TOUCH_SCREEN_TYPE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_TOUCH_SCREEN_TYPE	/;"	d
LRADC_CTRL0_XNURSW_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_XNURSW_MASK	/;"	d
LRADC_CTRL0_XNURSW_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_XNURSW_OFFSET	/;"	d
LRADC_CTRL0_XPULSW	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_XPULSW	/;"	d
LRADC_CTRL0_YNLRSW	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_YNLRSW	/;"	d
LRADC_CTRL0_YPLLSW_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_YPLLSW_MASK	/;"	d
LRADC_CTRL0_YPLLSW_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL0_YPLLSW_OFFSET	/;"	d
LRADC_CTRL1_BUTTON0_DETECT_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_BUTTON0_DETECT_IRQ	/;"	d
LRADC_CTRL1_BUTTON0_DETECT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_BUTTON0_DETECT_IRQ_EN	/;"	d
LRADC_CTRL1_BUTTON1_DETECT_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_BUTTON1_DETECT_IRQ	/;"	d
LRADC_CTRL1_BUTTON1_DETECT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_BUTTON1_DETECT_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC0_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC0_IRQ	/;"	d
LRADC_CTRL1_LRADC0_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC0_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC1_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC1_IRQ	/;"	d
LRADC_CTRL1_LRADC1_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC1_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC2_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC2_IRQ	/;"	d
LRADC_CTRL1_LRADC2_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC2_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC3_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC3_IRQ	/;"	d
LRADC_CTRL1_LRADC3_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC3_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC4_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC4_IRQ	/;"	d
LRADC_CTRL1_LRADC4_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC4_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC5_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC5_IRQ	/;"	d
LRADC_CTRL1_LRADC5_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC5_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC6_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC6_IRQ	/;"	d
LRADC_CTRL1_LRADC6_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC6_IRQ_EN	/;"	d
LRADC_CTRL1_LRADC7_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC7_IRQ	/;"	d
LRADC_CTRL1_LRADC7_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_LRADC7_IRQ_EN	/;"	d
LRADC_CTRL1_THRESHOLD0_DETECT_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_THRESHOLD0_DETECT_IRQ	/;"	d
LRADC_CTRL1_THRESHOLD0_DETECT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_THRESHOLD0_DETECT_IRQ_EN	/;"	d
LRADC_CTRL1_THRESHOLD1_DETECT_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_THRESHOLD1_DETECT_IRQ	/;"	d
LRADC_CTRL1_THRESHOLD1_DETECT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_THRESHOLD1_DETECT_IRQ_EN	/;"	d
LRADC_CTRL1_TOUCH_DETECT_IRQ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_TOUCH_DETECT_IRQ	/;"	d
LRADC_CTRL1_TOUCH_DETECT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL1_TOUCH_DETECT_IRQ_EN	/;"	d
LRADC_CTRL2_DISABLE_MUXAMP_BYPASS	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_DISABLE_MUXAMP_BYPASS	/;"	d
LRADC_CTRL2_DIVIDE_BY_TWO_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_DIVIDE_BY_TWO_MASK	/;"	d
LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET	/;"	d
LRADC_CTRL2_TEMPSENSE_PWD	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMPSENSE_PWD	/;"	d
LRADC_CTRL2_TEMP_ISRC0_100	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_100	/;"	d
LRADC_CTRL2_TEMP_ISRC0_120	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_120	/;"	d
LRADC_CTRL2_TEMP_ISRC0_140	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_140	/;"	d
LRADC_CTRL2_TEMP_ISRC0_160	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_160	/;"	d
LRADC_CTRL2_TEMP_ISRC0_180	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_180	/;"	d
LRADC_CTRL2_TEMP_ISRC0_20	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_20	/;"	d
LRADC_CTRL2_TEMP_ISRC0_200	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_200	/;"	d
LRADC_CTRL2_TEMP_ISRC0_220	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_220	/;"	d
LRADC_CTRL2_TEMP_ISRC0_240	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_240	/;"	d
LRADC_CTRL2_TEMP_ISRC0_260	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_260	/;"	d
LRADC_CTRL2_TEMP_ISRC0_280	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_280	/;"	d
LRADC_CTRL2_TEMP_ISRC0_300	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_300	/;"	d
LRADC_CTRL2_TEMP_ISRC0_40	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_40	/;"	d
LRADC_CTRL2_TEMP_ISRC0_60	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_60	/;"	d
LRADC_CTRL2_TEMP_ISRC0_80	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_80	/;"	d
LRADC_CTRL2_TEMP_ISRC0_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_MASK	/;"	d
LRADC_CTRL2_TEMP_ISRC0_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_OFFSET	/;"	d
LRADC_CTRL2_TEMP_ISRC0_ZERO	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC0_ZERO	/;"	d
LRADC_CTRL2_TEMP_ISRC1_100	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_100	/;"	d
LRADC_CTRL2_TEMP_ISRC1_120	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_120	/;"	d
LRADC_CTRL2_TEMP_ISRC1_140	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_140	/;"	d
LRADC_CTRL2_TEMP_ISRC1_160	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_160	/;"	d
LRADC_CTRL2_TEMP_ISRC1_180	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_180	/;"	d
LRADC_CTRL2_TEMP_ISRC1_20	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_20	/;"	d
LRADC_CTRL2_TEMP_ISRC1_200	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_200	/;"	d
LRADC_CTRL2_TEMP_ISRC1_220	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_220	/;"	d
LRADC_CTRL2_TEMP_ISRC1_240	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_240	/;"	d
LRADC_CTRL2_TEMP_ISRC1_260	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_260	/;"	d
LRADC_CTRL2_TEMP_ISRC1_280	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_280	/;"	d
LRADC_CTRL2_TEMP_ISRC1_300	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_300	/;"	d
LRADC_CTRL2_TEMP_ISRC1_40	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_40	/;"	d
LRADC_CTRL2_TEMP_ISRC1_60	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_60	/;"	d
LRADC_CTRL2_TEMP_ISRC1_80	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_80	/;"	d
LRADC_CTRL2_TEMP_ISRC1_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_MASK	/;"	d
LRADC_CTRL2_TEMP_ISRC1_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_OFFSET	/;"	d
LRADC_CTRL2_TEMP_ISRC1_ZERO	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_ISRC1_ZERO	/;"	d
LRADC_CTRL2_TEMP_SENSOR_IENABLE0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_SENSOR_IENABLE0	/;"	d
LRADC_CTRL2_TEMP_SENSOR_IENABLE1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_TEMP_SENSOR_IENABLE1	/;"	d
LRADC_CTRL2_VTHSENSE_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_VTHSENSE_MASK	/;"	d
LRADC_CTRL2_VTHSENSE_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL2_VTHSENSE_OFFSET	/;"	d
LRADC_CTRL3_CYCLE_TIME_2MHZ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_CYCLE_TIME_2MHZ	/;"	d
LRADC_CTRL3_CYCLE_TIME_3MHZ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_CYCLE_TIME_3MHZ	/;"	d
LRADC_CTRL3_CYCLE_TIME_4MHZ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_CYCLE_TIME_4MHZ	/;"	d
LRADC_CTRL3_CYCLE_TIME_6MHZ	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_CYCLE_TIME_6MHZ	/;"	d
LRADC_CTRL3_CYCLE_TIME_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_CYCLE_TIME_MASK	/;"	d
LRADC_CTRL3_CYCLE_TIME_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_CYCLE_TIME_OFFSET	/;"	d
LRADC_CTRL3_DELAY_CLOCK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_DELAY_CLOCK	/;"	d
LRADC_CTRL3_DISCARD_1_SAMPLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_DISCARD_1_SAMPLE	/;"	d
LRADC_CTRL3_DISCARD_2_SAMPLES	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_DISCARD_2_SAMPLES	/;"	d
LRADC_CTRL3_DISCARD_3_SAMPLES	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_DISCARD_3_SAMPLES	/;"	d
LRADC_CTRL3_DISCARD_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_DISCARD_MASK	/;"	d
LRADC_CTRL3_DISCARD_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_DISCARD_OFFSET	/;"	d
LRADC_CTRL3_FORCE_ANALOG_PWDN	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_FORCE_ANALOG_PWDN	/;"	d
LRADC_CTRL3_FORCE_ANALOG_PWUP	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_FORCE_ANALOG_PWUP	/;"	d
LRADC_CTRL3_HIGH_TIME_125NS	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_HIGH_TIME_125NS	/;"	d
LRADC_CTRL3_HIGH_TIME_250NS	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_HIGH_TIME_250NS	/;"	d
LRADC_CTRL3_HIGH_TIME_42NS	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_HIGH_TIME_42NS	/;"	d
LRADC_CTRL3_HIGH_TIME_83NS	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_HIGH_TIME_83NS	/;"	d
LRADC_CTRL3_HIGH_TIME_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_HIGH_TIME_MASK	/;"	d
LRADC_CTRL3_HIGH_TIME_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_HIGH_TIME_OFFSET	/;"	d
LRADC_CTRL3_INVERT_CLOCK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL3_INVERT_CLOCK	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC0SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC0SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC0SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC1SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC1SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC1SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC1SELECT_OFFSET	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC2SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC2SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC2SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC2SELECT_OFFSET	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC3SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC3SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC3SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC3SELECT_OFFSET	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC4SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC4SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC4SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC4SELECT_OFFSET	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC5SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC5SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC5SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC5SELECT_OFFSET	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC6SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC6SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC6SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC6SELECT_OFFSET	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL0	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL1	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL10	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL10	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL11	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL11	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL12	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL12	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL13	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL13	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL14	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL14	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL15	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL15	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL2	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL3	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL4	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL5	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL6	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL7	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL8	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL8	/;"	d
LRADC_CTRL4_LRADC7SELECT_CHANNEL9	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_CHANNEL9	/;"	d
LRADC_CTRL4_LRADC7SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_MASK	/;"	d
LRADC_CTRL4_LRADC7SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_CTRL4_LRADC7SELECT_OFFSET	/;"	d
LRADC_DEBUG0_READONLY_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG0_READONLY_MASK	/;"	d
LRADC_DEBUG0_READONLY_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG0_READONLY_OFFSET	/;"	d
LRADC_DEBUG0_STATE_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG0_STATE_MASK	/;"	d
LRADC_DEBUG0_STATE_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG0_STATE_OFFSET	/;"	d
LRADC_DEBUG1_REQUEST_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_REQUEST_MASK	/;"	d
LRADC_DEBUG1_REQUEST_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_REQUEST_OFFSET	/;"	d
LRADC_DEBUG1_TESTMODE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_TESTMODE	/;"	d
LRADC_DEBUG1_TESTMODE5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_TESTMODE5	/;"	d
LRADC_DEBUG1_TESTMODE6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_TESTMODE6	/;"	d
LRADC_DEBUG1_TESTMODE_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_TESTMODE_COUNT_MASK	/;"	d
LRADC_DEBUG1_TESTMODE_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DEBUG1_TESTMODE_COUNT_OFFSET	/;"	d
LRADC_DELAY_DELAY_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_DELAY_MASK	/;"	d
LRADC_DELAY_DELAY_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_DELAY_OFFSET	/;"	d
LRADC_DELAY_KICK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_KICK	/;"	d
LRADC_DELAY_LOOP_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_LOOP_COUNT_MASK	/;"	d
LRADC_DELAY_LOOP_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_LOOP_COUNT_OFFSET	/;"	d
LRADC_DELAY_TRIGGER_DELAYS_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_TRIGGER_DELAYS_MASK	/;"	d
LRADC_DELAY_TRIGGER_DELAYS_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_TRIGGER_DELAYS_OFFSET	/;"	d
LRADC_DELAY_TRIGGER_LRADCS_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_TRIGGER_LRADCS_MASK	/;"	d
LRADC_DELAY_TRIGGER_LRADCS_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_DELAY_TRIGGER_LRADCS_OFFSET	/;"	d
LRADC_STATUS_BUTTON0_DETECT_RAW	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_BUTTON0_DETECT_RAW	/;"	d
LRADC_STATUS_BUTTON0_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_BUTTON0_PRESENT	/;"	d
LRADC_STATUS_BUTTON1_DETECT_RAW	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_BUTTON1_DETECT_RAW	/;"	d
LRADC_STATUS_BUTTON1_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_BUTTON1_PRESENT	/;"	d
LRADC_STATUS_CHANNEL0_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL0_PRESENT	/;"	d
LRADC_STATUS_CHANNEL1_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL1_PRESENT	/;"	d
LRADC_STATUS_CHANNEL2_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL2_PRESENT	/;"	d
LRADC_STATUS_CHANNEL3_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL3_PRESENT	/;"	d
LRADC_STATUS_CHANNEL4_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL4_PRESENT	/;"	d
LRADC_STATUS_CHANNEL5_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL5_PRESENT	/;"	d
LRADC_STATUS_CHANNEL6_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL6_PRESENT	/;"	d
LRADC_STATUS_CHANNEL7_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_CHANNEL7_PRESENT	/;"	d
LRADC_STATUS_TEMP0_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_TEMP0_PRESENT	/;"	d
LRADC_STATUS_TEMP1_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_TEMP1_PRESENT	/;"	d
LRADC_STATUS_TOUCH_DETECT_RAW	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_TOUCH_DETECT_RAW	/;"	d
LRADC_STATUS_TOUCH_PANEL_PRESENT	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_STATUS_TOUCH_PANEL_PRESENT	/;"	d
LRADC_THRESHOLD_BATTCHRG_DISABLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_BATTCHRG_DISABLE	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL0	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL0	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL1	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL1	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL2	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL2	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL3	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL3	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL4	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL4	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL5	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL5	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL6	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL6	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL7	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL7	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_MASK	/;"	d
LRADC_THRESHOLD_CHANNEL_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_CHANNEL_SEL_OFFSET	/;"	d
LRADC_THRESHOLD_ENABLE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_ENABLE	/;"	d
LRADC_THRESHOLD_SETTING_DETECT_HIGH	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_SETTING_DETECT_HIGH	/;"	d
LRADC_THRESHOLD_SETTING_DETECT_LOW	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_SETTING_DETECT_LOW	/;"	d
LRADC_THRESHOLD_SETTING_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_SETTING_MASK	/;"	d
LRADC_THRESHOLD_SETTING_NO_COMPARE	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_SETTING_NO_COMPARE	/;"	d
LRADC_THRESHOLD_SETTING_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_SETTING_OFFSET	/;"	d
LRADC_THRESHOLD_SETTING_RESERVED	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_SETTING_RESERVED	/;"	d
LRADC_THRESHOLD_VALUE_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_VALUE_MASK	/;"	d
LRADC_THRESHOLD_VALUE_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_THRESHOLD_VALUE_OFFSET	/;"	d
LRADC_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_VERSION_MAJOR_MASK	/;"	d
LRADC_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_VERSION_MAJOR_OFFSET	/;"	d
LRADC_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_VERSION_MINOR_MASK	/;"	d
LRADC_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_VERSION_MINOR_OFFSET	/;"	d
LRADC_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_VERSION_STEP_MASK	/;"	d
LRADC_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define	LRADC_VERSION_STEP_OFFSET	/;"	d
LRUPRIORST	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define LRUPRIORST	/;"	d
LRUPRIORST_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define LRUPRIORST_P	/;"	d
LS102xA architecture	arch/arm/cpu/armv7/ls102xa/Kconfig	/^menu "LS102xA architecture"$/;"	m
LS1TWR_I2C_BUS_MC34VR500	board/freescale/ls1021atwr/ls1021atwr.c	/^#define LS1TWR_I2C_BUS_MC34VR500	/;"	d	file:
LS1_DEEP_SLEEP	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config LS1_DEEP_SLEEP$/;"	c	menu:LS102xA architecture
LSA0	arch/sh/include/asm/cpu_sh7780.h	/^#define	LSA0	/;"	d
LSA1	arch/sh/include/asm/cpu_sh7780.h	/^#define	LSA1	/;"	d
LSAVE_DIRTY	fs/ubifs/ubifs.h	/^	LSAVE_DIRTY = 2,$/;"	e	enum:__anonf648d0840a03
LSBF	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define LSBF	/;"	d
LSCR1_CLS_RISE_DELAY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LSCR1_CLS_RISE_DELAY(/;"	d
LSCR1_GRAY1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LSCR1_GRAY1(/;"	d
LSCR1_GRAY2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LSCR1_GRAY2(/;"	d
LSCR1_PS_RISE_DELAY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LSCR1_PS_RISE_DELAY(/;"	d
LSCR1_REV_TOGGLE_DELAY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define LSCR1_REV_TOGGLE_DELAY(/;"	d
LSDEV	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define LSDEV	/;"	d
LSDMR_ACTTORW3	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_ACTTORW3	/;"	d
LSDMR_ACTTORW6	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_ACTTORW6	/;"	d
LSDMR_ACTTORW7	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_ACTTORW7	/;"	d
LSDMR_BL8	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_BL8	/;"	d
LSDMR_BSMA1516	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_BSMA1516	/;"	d
LSDMR_BSMA1617	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_BSMA1617	/;"	d
LSDMR_BUFCMD	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_BUFCMD	/;"	d
LSDMR_CL3	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_CL3	/;"	d
LSDMR_OP_ACTBNK	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_ACTBNK	/;"	d
LSDMR_OP_ARFRSH	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_ARFRSH	/;"	d
LSDMR_OP_MRW	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_MRW	/;"	d
LSDMR_OP_NORMAL	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_NORMAL	/;"	d
LSDMR_OP_PCHALL	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_PCHALL	/;"	d
LSDMR_OP_PRECH	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_PRECH	/;"	d
LSDMR_OP_RWINV	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_RWINV	/;"	d
LSDMR_OP_SRFRSH	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_OP_SRFRSH	/;"	d
LSDMR_PRETOACT3	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_PRETOACT3 /;"	d
LSDMR_PRETOACT7	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_PRETOACT7	/;"	d
LSDMR_RFCR16	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_RFCR16	/;"	d
LSDMR_RFCR5	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_RFCR5	/;"	d
LSDMR_RFEN	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_RFEN	/;"	d
LSDMR_WRC2	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_WRC2	/;"	d
LSDMR_WRC4	arch/powerpc/include/asm/fsl_lbc.h	/^#define LSDMR_WRC4	/;"	d
LSDR	include/lattice.h	/^#define LSDR	/;"	d
LSF_EN	include/usb/ehci-ci.h	/^#define LSF_EN	/;"	d
LSMODE	drivers/usb/host/r8a66597.h	/^#define	  LSMODE	/;"	d
LSR_BI	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_BI	/;"	d
LSR_COM6L_ADPT	board/ti/beagle/beagle.c	/^#define LSR_COM6L_ADPT	/;"	d	file:
LSR_DR	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_DR	/;"	d
LSR_FE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_FE	/;"	d
LSR_FIFOE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_FIFOE	/;"	d
LSR_OE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_OE	/;"	d
LSR_PE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_PE	/;"	d
LSR_TDRQ	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_TDRQ	/;"	d
LSR_TEMT	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	LSR_TEMT	/;"	d
LSW_PHYAD_MASK	drivers/net/xilinx_ll_temac.h	/^#define LSW_PHYAD_MASK	/;"	d
LSW_PHYAD_POS	drivers/net/xilinx_ll_temac.h	/^#define LSW_PHYAD_POS	/;"	d
LSW_REGAD_MASK	drivers/net/xilinx_ll_temac.h	/^#define LSW_REGAD_MASK	/;"	d
LSW_REGAD_POS	drivers/net/xilinx_ll_temac.h	/^#define LSW_REGAD_POS	/;"	d
LSW_REGDAT_MASK	drivers/net/xilinx_ll_temac.h	/^#define LSW_REGDAT_MASK	/;"	d
LSW_REGDAT_POS	drivers/net/xilinx_ll_temac.h	/^#define LSW_REGDAT_POS	/;"	d
LSXL_OE_HIGH	board/buffalo/lsxl/lsxl.h	/^#define LSXL_OE_HIGH /;"	d
LSXL_OE_LOW	board/buffalo/lsxl/lsxl.h	/^#define LSXL_OE_LOW /;"	d
LSXL_OE_VAL_HIGH	board/buffalo/lsxl/lsxl.h	/^#define LSXL_OE_VAL_HIGH /;"	d
LSXL_OE_VAL_LOW	board/buffalo/lsxl/lsxl.h	/^#define LSXL_OE_VAL_LOW /;"	d
LSXL_POL_VAL_HIGH	board/buffalo/lsxl/lsxl.h	/^#define LSXL_POL_VAL_HIGH /;"	d
LSXL_POL_VAL_LOW	board/buffalo/lsxl/lsxl.h	/^#define LSXL_POL_VAL_LOW /;"	d
LS_CLK_DOMAIN_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define LS_CLK_DOMAIN_FUNC_EN_N	/;"	d
LS_CLK_DOMAIN_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define LS_CLK_DOMAIN_FUNC_EN_N	/;"	d
LS_DIR	include/fat.h	/^#define LS_DIR	/;"	d
LS_JSTS	drivers/usb/host/r8a66597.h	/^#define	  LS_JSTS	/;"	d
LS_KSTS	drivers/usb/host/r8a66597.h	/^#define	  LS_KSTS	/;"	d
LS_NO	include/fat.h	/^#define LS_NO	/;"	d
LS_ROOT	include/fat.h	/^#define LS_ROOT	/;"	d
LS_YES	include/fat.h	/^#define LS_YES	/;"	d
LSbit	drivers/net/rtl8169.c	/^	LSbit = 0x10000000,$/;"	e	enum:_DescStatusBit	file:
LT	cmd/itest.c	/^#define LT	/;"	d	file:
LTAB_DIRTY	fs/ubifs/ubifs.h	/^	LTAB_DIRTY  = 1,$/;"	e	enum:__anonf648d0840a03
LTC3676_BUCK1	include/power/ltc3676_pmic.h	/^	LTC3676_BUCK1	= 0x01,$/;"	e	enum:__anonf3144c8b0103
LTC3676_BUCK2	include/power/ltc3676_pmic.h	/^	LTC3676_BUCK2	= 0x02,$/;"	e	enum:__anonf3144c8b0103
LTC3676_BUCK3	include/power/ltc3676_pmic.h	/^	LTC3676_BUCK3	= 0x03,$/;"	e	enum:__anonf3144c8b0103
LTC3676_BUCK4	include/power/ltc3676_pmic.h	/^	LTC3676_BUCK4	= 0x04,$/;"	e	enum:__anonf3144c8b0103
LTC3676_CLIRQ	include/power/ltc3676_pmic.h	/^	LTC3676_CLIRQ	= 0x1F,$/;"	e	enum:__anonf3144c8b0103
LTC3676_CNTRL	include/power/ltc3676_pmic.h	/^	LTC3676_CNTRL	= 0x09,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB1A	include/power/ltc3676_pmic.h	/^	LTC3676_DVB1A	= 0x0A,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB1B	include/power/ltc3676_pmic.h	/^	LTC3676_DVB1B	= 0x0B,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB2A	include/power/ltc3676_pmic.h	/^	LTC3676_DVB2A	= 0x0C,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB2B	include/power/ltc3676_pmic.h	/^	LTC3676_DVB2B	= 0x0D,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB3A	include/power/ltc3676_pmic.h	/^	LTC3676_DVB3A	= 0x0E,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB3B	include/power/ltc3676_pmic.h	/^	LTC3676_DVB3B	= 0x0F,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB4A	include/power/ltc3676_pmic.h	/^	LTC3676_DVB4A	= 0x10,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB4B	include/power/ltc3676_pmic.h	/^	LTC3676_DVB4B	= 0x11,$/;"	e	enum:__anonf3144c8b0103
LTC3676_DVB_MASK	include/power/ltc3676_pmic.h	/^#define LTC3676_DVB_MASK	/;"	d
LTC3676_HRST	include/power/ltc3676_pmic.h	/^	LTC3676_HRST	= 0x1E,$/;"	e	enum:__anonf3144c8b0103
LTC3676_IRQSTAT	include/power/ltc3676_pmic.h	/^	LTC3676_IRQSTAT	= 0x15,$/;"	e	enum:__anonf3144c8b0103
LTC3676_LDOA	include/power/ltc3676_pmic.h	/^	LTC3676_LDOA	= 0x05,$/;"	e	enum:__anonf3144c8b0103
LTC3676_LDOB	include/power/ltc3676_pmic.h	/^	LTC3676_LDOB	= 0x06,$/;"	e	enum:__anonf3144c8b0103
LTC3676_MSKIRQ	include/power/ltc3676_pmic.h	/^	LTC3676_MSKIRQ	= 0x12,$/;"	e	enum:__anonf3144c8b0103
LTC3676_MSKPG	include/power/ltc3676_pmic.h	/^	LTC3676_MSKPG	= 0x13,$/;"	e	enum:__anonf3144c8b0103
LTC3676_NUM_OF_REGS	include/power/ltc3676_pmic.h	/^	LTC3676_NUM_OF_REGS = 0x20,$/;"	e	enum:__anonf3144c8b0103
LTC3676_PGOOD_MASK	include/power/ltc3676_pmic.h	/^#define LTC3676_PGOOD_MASK	/;"	d
LTC3676_PGSTATL	include/power/ltc3676_pmic.h	/^	LTC3676_PGSTATL	= 0x16,$/;"	e	enum:__anonf3144c8b0103
LTC3676_PGSTATR	include/power/ltc3676_pmic.h	/^	LTC3676_PGSTATR	= 0x17,$/;"	e	enum:__anonf3144c8b0103
LTC3676_REF_SELA	include/power/ltc3676_pmic.h	/^#define LTC3676_REF_SELA	/;"	d
LTC3676_REF_SELB	include/power/ltc3676_pmic.h	/^#define LTC3676_REF_SELB	/;"	d
LTC3676_SQD1	include/power/ltc3676_pmic.h	/^	LTC3676_SQD1	= 0x07,$/;"	e	enum:__anonf3144c8b0103
LTC3676_SQD2	include/power/ltc3676_pmic.h	/^	LTC3676_SQD2	= 0x08,$/;"	e	enum:__anonf3144c8b0103
LTC3676_USER	include/power/ltc3676_pmic.h	/^	LTC3676_USER	= 0x14,$/;"	e	enum:__anonf3144c8b0103
LTEDR_BMD	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTEDR_BMD	/;"	d
LTEDR_CSD	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTEDR_CSD	/;"	d
LTEDR_PARD	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTEDR_PARD	/;"	d
LTEDR_RAWA	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTEDR_RAWA	/;"	d
LTEDR_WARA	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTEDR_WARA	/;"	d
LTEDR_WPD	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTEDR_WPD	/;"	d
LTERR_OVR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define LTERR_OVR /;"	d
LTERR_UNDR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define LTERR_UNDR /;"	d
LTESR_ATMR	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_ATMR /;"	d
LTESR_ATMW	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_ATMW /;"	d
LTESR_BM	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_BM /;"	d
LTESR_CC	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_CC /;"	d
LTESR_CS	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_CS /;"	d
LTESR_FCT	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_FCT /;"	d
LTESR_NAND_MASK	drivers/mtd/nand/fsl_elbc_nand.c	/^#define LTESR_NAND_MASK /;"	d	file:
LTESR_PAR	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_PAR /;"	d
LTESR_WP	arch/powerpc/include/asm/fsl_lbc.h	/^#define LTESR_WP /;"	d
LTGT	post/lib_powerpc/fpu/compare-fp-1.c	/^#define LTGT(/;"	d	file:
LTSSM_PCIE_L0	drivers/pci/pcie_layerscape.c	/^#define LTSSM_PCIE_L0	/;"	d	file:
LTSSM_STATE_MASK	drivers/pci/pcie_layerscape.c	/^#define LTSSM_STATE_MASK	/;"	d	file:
LTSSM_STATE_SHIFT	drivers/pci/pcie_layerscape.c	/^#define LTSSM_STATE_SHIFT	/;"	d	file:
LT_CLK_RECOVERY	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LT_CLK_RECOVERY,$/;"	e	enum:link_training_state
LT_EQ_TRAINING	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LT_EQ_TRAINING,$/;"	e	enum:link_training_state
LT_START	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	LT_START,$/;"	e	enum:link_training_state
LTfield	drivers/net/bfin_mac.h	/^	u16 LTfield;		\/* length\/type field		*\/$/;"	m	struct:adi_ether_frame_buffer	typeref:typename:u16
LUAC	drivers/dma/MCD_dmaApi.c	/^#define LUAC	/;"	d	file:
LUN_CONFIG_REG	include/ns87308.h	/^#define LUN_CONFIG_REG	/;"	d
LURC	drivers/dma/MCD_dmaApi.c	/^#define LURC	/;"	d	file:
LUT_ADDR	drivers/spi/fsl_qspi.h	/^#define LUT_ADDR	/;"	d
LUT_CMD	drivers/spi/fsl_qspi.h	/^#define LUT_CMD	/;"	d
LUT_DUMMY	drivers/spi/fsl_qspi.h	/^#define LUT_DUMMY	/;"	d
LUT_KEY_VALUE	drivers/spi/fsl_qspi.h	/^#define LUT_KEY_VALUE	/;"	d
LUT_PAD1	drivers/spi/fsl_qspi.h	/^#define LUT_PAD1	/;"	d
LUT_PAD2	drivers/spi/fsl_qspi.h	/^#define LUT_PAD2	/;"	d
LUT_PAD4	drivers/spi/fsl_qspi.h	/^#define LUT_PAD4	/;"	d
LUT_READ	drivers/spi/fsl_qspi.h	/^#define LUT_READ	/;"	d
LUT_WRITE	drivers/spi/fsl_qspi.h	/^#define LUT_WRITE	/;"	d
LV2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define LV2	/;"	d
LV3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define LV3	/;"	d
LV4	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define LV4	/;"	d
LVDS	drivers/video/tegra124/sor.h	/^#define LVDS	/;"	d
LVDS	include/lattice.h	/^#define LVDS	/;"	d
LVDSPair	include/lattice.h	/^} LVDSPair;$/;"	t	typeref:struct:__anon773a64540108
LVDS_18BIT	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_18BIT	/;"	d
LVDS_24BIT	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_24BIT	/;"	d
LVDS_BACKLIGHT_GP	board/advantech/dms-ba16/dms-ba16.c	/^#define LVDS_BACKLIGHT_GP /;"	d	file:
LVDS_BACKLIGHT_GP	board/boundary/nitrogen6x/nitrogen6x.c	/^#define LVDS_BACKLIGHT_GP /;"	d	file:
LVDS_BACKLIGHT_GP	board/ge/bx50v3/bx50v3.c	/^#define LVDS_BACKLIGHT_GP /;"	d	file:
LVDS_BALANCED_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_BALANCED_DEFAULT_MASK	/;"	d
LVDS_BALANCED_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_BALANCED_DISABLE	/;"	d
LVDS_BALANCED_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_BALANCED_ENABLE	/;"	d
LVDS_BALANCED_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_BALANCED_SHIFT	/;"	d
LVDS_BLON	include/radeon.h	/^#define LVDS_BLON	/;"	d
LVDS_BL_MOD_EN	include/radeon.h	/^#define LVDS_BL_MOD_EN	/;"	d
LVDS_BL_MOD_LEVEL_MASK	include/radeon.h	/^#define LVDS_BL_MOD_LEVEL_MASK	/;"	d
LVDS_BL_MOD_LEVEL_SHIFT	include/radeon.h	/^#define LVDS_BL_MOD_LEVEL_SHIFT	/;"	d
LVDS_CH0_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_CH0_EN	/;"	d
LVDS_CH1_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_CH1_EN	/;"	d
LVDS_DCLK_INV	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_DCLK_INV	/;"	d
LVDS_DIGON	include/radeon.h	/^#define LVDS_DIGON	/;"	d
LVDS_DISPLAY_DIS	include/radeon.h	/^#define LVDS_DISPLAY_DIS	/;"	d
LVDS_DUAL	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_DUAL	/;"	d
LVDS_DUP_SYNC_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_DUP_SYNC_DEFAULT_MASK	/;"	d
LVDS_DUP_SYNC_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_DUP_SYNC_DISABLE	/;"	d
LVDS_DUP_SYNC_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_DUP_SYNC_ENABLE	/;"	d
LVDS_DUP_SYNC_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_DUP_SYNC_SHIFT	/;"	d
LVDS_EN	include/radeon.h	/^#define LVDS_EN	/;"	d
LVDS_FMT_1	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_FMT_1	/;"	d
LVDS_FMT_MASK	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_FMT_MASK	/;"	d
LVDS_FORMAT_JEIDA	arch/arm/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	arch/microblaze/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	arch/mips/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	arch/nios2/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	arch/sandbox/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	arch/x86/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	arch/xtensa/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_JEIDA	include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_JEIDA /;"	d
LVDS_FORMAT_VESA	arch/arm/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	arch/microblaze/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	arch/mips/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	arch/nios2/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	arch/sandbox/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	arch/x86/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	arch/xtensa/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_FORMAT_VESA	include/dt-bindings/video/rk3288.h	/^#define LVDS_FORMAT_VESA /;"	d
LVDS_GEN_CNTL	include/radeon.h	/^#define LVDS_GEN_CNTL	/;"	d
LVDS_LINKACTA_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTA_DEFAULT_MASK	/;"	d
LVDS_LINKACTA_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTA_ENABLE	/;"	d
LVDS_LINKACTA_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTA_SHIFT	/;"	d
LVDS_LINKACTB_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTB_DEFAULT_MASK	/;"	d
LVDS_LINKACTB_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTB_DISABLE	/;"	d
LVDS_LINKACTB_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTB_ENABLE	/;"	d
LVDS_LINKACTB_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_LINKACTB_SHIFT	/;"	d
LVDS_LVDS_EN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_LVDS_EN_DEFAULT_MASK	/;"	d
LVDS_LVDS_EN_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_LVDS_EN_ENABLE	/;"	d
LVDS_LVDS_EN_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_LVDS_EN_SHIFT	/;"	d
LVDS_MODE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_MODE_DEFAULT_MASK	/;"	d
LVDS_MODE_LVDS	drivers/video/tegra124/sor.h	/^#define LVDS_MODE_LVDS	/;"	d
LVDS_MODE_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_MODE_SHIFT	/;"	d
LVDS_MSB	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_MSB	/;"	d
LVDS_NEW_MODE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_NEW_MODE_DEFAULT_MASK	/;"	d
LVDS_NEW_MODE_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_NEW_MODE_DISABLE	/;"	d
LVDS_NEW_MODE_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_NEW_MODE_ENABLE	/;"	d
LVDS_NEW_MODE_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_NEW_MODE_SHIFT	/;"	d
LVDS_ON	include/radeon.h	/^#define LVDS_ON	/;"	d
LVDS_OUTPUT_DUAL	arch/arm/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	arch/microblaze/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	arch/mips/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	arch/nios2/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	arch/sandbox/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	arch/x86/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	arch/xtensa/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_DUAL	include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_DUAL /;"	d
LVDS_OUTPUT_RGB	arch/arm/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	arch/microblaze/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	arch/mips/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	arch/nios2/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	arch/sandbox/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	arch/x86/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	arch/xtensa/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_RGB	include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_RGB /;"	d
LVDS_OUTPUT_SINGLE	arch/arm/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	arch/microblaze/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	arch/mips/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	arch/nios2/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	arch/sandbox/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	arch/x86/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	arch/xtensa/dts/include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_OUTPUT_SINGLE	include/dt-bindings/video/rk3288.h	/^#define LVDS_OUTPUT_SINGLE /;"	d
LVDS_PANEL_FORMAT	include/radeon.h	/^#define LVDS_PANEL_FORMAT	/;"	d
LVDS_PANEL_TYPE	include/radeon.h	/^#define LVDS_PANEL_TYPE	/;"	d
LVDS_PD_TXCA_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCA_DEFAULT_MASK	/;"	d
LVDS_PD_TXCA_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCA_ENABLE	/;"	d
LVDS_PD_TXCA_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCA_SHIFT	/;"	d
LVDS_PD_TXCB_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCB_DEFAULT_MASK	/;"	d
LVDS_PD_TXCB_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCB_DISABLE	/;"	d
LVDS_PD_TXCB_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCB_ENABLE	/;"	d
LVDS_PD_TXCB_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXCB_SHIFT	/;"	d
LVDS_PD_TXDA_0_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_0_DEFAULT_MASK	/;"	d
LVDS_PD_TXDA_0_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_0_ENABLE	/;"	d
LVDS_PD_TXDA_0_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_0_SHIFT	/;"	d
LVDS_PD_TXDA_1_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_1_DEFAULT_MASK	/;"	d
LVDS_PD_TXDA_1_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_1_ENABLE	/;"	d
LVDS_PD_TXDA_1_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_1_SHIFT	/;"	d
LVDS_PD_TXDA_2_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_2_DEFAULT_MASK	/;"	d
LVDS_PD_TXDA_2_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_2_ENABLE	/;"	d
LVDS_PD_TXDA_2_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_2_SHIFT	/;"	d
LVDS_PD_TXDA_3_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_3_DEFAULT_MASK	/;"	d
LVDS_PD_TXDA_3_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_3_DISABLE	/;"	d
LVDS_PD_TXDA_3_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_3_ENABLE	/;"	d
LVDS_PD_TXDA_3_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDA_3_SHIFT	/;"	d
LVDS_PD_TXDB_0_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_0_DEFAULT_MASK	/;"	d
LVDS_PD_TXDB_0_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_0_DISABLE	/;"	d
LVDS_PD_TXDB_0_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_0_ENABLE	/;"	d
LVDS_PD_TXDB_0_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_0_SHIFT	/;"	d
LVDS_PD_TXDB_1_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_1_DEFAULT_MASK	/;"	d
LVDS_PD_TXDB_1_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_1_DISABLE	/;"	d
LVDS_PD_TXDB_1_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_1_ENABLE	/;"	d
LVDS_PD_TXDB_1_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_1_SHIFT	/;"	d
LVDS_PD_TXDB_2_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_2_DEFAULT_MASK	/;"	d
LVDS_PD_TXDB_2_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_2_DISABLE	/;"	d
LVDS_PD_TXDB_2_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_2_ENABLE	/;"	d
LVDS_PD_TXDB_2_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_2_SHIFT	/;"	d
LVDS_PD_TXDB_3_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_3_DEFAULT_MASK	/;"	d
LVDS_PD_TXDB_3_DISABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_3_DISABLE	/;"	d
LVDS_PD_TXDB_3_ENABLE	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_3_ENABLE	/;"	d
LVDS_PD_TXDB_3_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PD_TXDB_3_SHIFT	/;"	d
LVDS_PLLDIV_BY_7	drivers/video/tegra124/sor.h	/^#define LVDS_PLLDIV_BY_7	/;"	d
LVDS_PLLDIV_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_PLLDIV_DEFAULT_MASK	/;"	d
LVDS_PLLDIV_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_PLLDIV_SHIFT	/;"	d
LVDS_PLL_CNTL	include/radeon.h	/^#define LVDS_PLL_CNTL	/;"	d
LVDS_POWER_GP	board/advantech/dms-ba16/dms-ba16.c	/^#define LVDS_POWER_GP /;"	d	file:
LVDS_POWER_GP	board/ge/bx50v3/bx50v3.c	/^#define LVDS_POWER_GP /;"	d	file:
LVDS_PWRDN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_PWRDN	/;"	d
LVDS_ROTCLK_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_ROTCLK_DEFAULT_MASK	/;"	d
LVDS_ROTCLK_RST	drivers/video/tegra124/sor.h	/^#define LVDS_ROTCLK_RST	/;"	d
LVDS_ROTCLK_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_ROTCLK_SHIFT	/;"	d
LVDS_ROTDAT_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_ROTDAT_DEFAULT_MASK	/;"	d
LVDS_ROTDAT_RST	drivers/video/tegra124/sor.h	/^#define LVDS_ROTDAT_RST	/;"	d
LVDS_ROTDAT_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_ROTDAT_SHIFT	/;"	d
LVDS_SEL_CRTC2	include/radeon.h	/^#define LVDS_SEL_CRTC2	/;"	d
LVDS_START_PHASE_RST_1	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_START_PHASE_RST_1	/;"	d
LVDS_STATE_MASK	include/radeon.h	/^#define LVDS_STATE_MASK /;"	d
LVDS_TTL_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define LVDS_TTL_EN	/;"	d
LVDS_UPPER_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define LVDS_UPPER_DEFAULT_MASK	/;"	d
LVDS_UPPER_FALSE	drivers/video/tegra124/sor.h	/^#define LVDS_UPPER_FALSE	/;"	d
LVDS_UPPER_SHIFT	drivers/video/tegra124/sor.h	/^#define LVDS_UPPER_SHIFT	/;"	d
LVDS_UPPER_TRUE	drivers/video/tegra124/sor.h	/^#define LVDS_UPPER_TRUE	/;"	d
LVTTL	drivers/ddr/marvell/axp/ddr3_spd.c	/^	LVTTL,$/;"	e	enum:dimm_volt_if	file:
LV_PINMUX	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^#define LV_PINMUX(/;"	d
LV_PINMUX	board/nvidia/cardhu/pinmux-config-cardhu.h	/^#define LV_PINMUX(/;"	d
LV_PINMUX	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^#define LV_PINMUX(/;"	d
LV_PINMUX	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^#define LV_PINMUX(/;"	d
LWAIT_HERE	arch/blackfin/cpu/start.S	/^.LWAIT_HERE:$/;"	l
LWARN	drivers/usb/gadget/storage_common.c	/^#define LWARN(/;"	d	file:
LWERR	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define LWERR	/;"	d
LWHPS2FPGA_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LWHPS2FPGA_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define LWHPS2FPGA_RESET	/;"	d
LW_BEAGLETOUCH	board/ti/beagle/beagle.c	/^#define LW_BEAGLETOUCH	/;"	d	file:
LXT971_LED_CFG_LINK_ACTIVITY	board/ifm/o2dnt2/o2dnt2.c	/^#define LXT971_LED_CFG_LINK_ACTIVITY	/;"	d	file:
LXT971_LED_CFG_LINK_STATUS	board/ifm/o2dnt2/o2dnt2.c	/^#define LXT971_LED_CFG_LINK_STATUS	/;"	d	file:
LXT971_LED_CFG_PULSE_STRETCH	board/ifm/o2dnt2/o2dnt2.c	/^#define LXT971_LED_CFG_PULSE_STRETCH	/;"	d	file:
LXT971_LED_CFG_RX_TX_ACTIVITY	board/ifm/o2dnt2/o2dnt2.c	/^#define LXT971_LED_CFG_RX_TX_ACTIVITY	/;"	d	file:
LXT971_driver	drivers/net/phy/lxt.c	/^static struct phy_driver LXT971_driver = {$/;"	v	typeref:struct:phy_driver	file:
LZ4	lib/Kconfig	/^config LZ4$/;"	c	menu:Library routines""Compression Support
LZ4F_MAGIC	lib/lz4_wrapper.c	/^#define LZ4F_MAGIC /;"	d	file:
LZ4_copy4	lib/lz4_wrapper.c	/^static void LZ4_copy4(void *dst, const void *src) { *(u32 *)dst = *(u32 *)src; }$/;"	f	typeref:typename:void	file:
LZ4_copy8	lib/lz4_wrapper.c	/^static void LZ4_copy8(void *dst, const void *src) { *(u64 *)dst = *(u64 *)src; }$/;"	f	typeref:typename:void	file:
LZ4_decompress_generic	lib/lz4.c	/^FORCE_INLINE int LZ4_decompress_generic($/;"	f	typeref:typename:FORCE_INLINE int
LZ4_minLength	lib/lz4.c	/^static const int LZ4_minLength = (MFLIMIT+1);$/;"	v	typeref:typename:const int	file:
LZ4_readLE16	lib/lz4_wrapper.c	/^static u16 LZ4_readLE16(const void *src) { return le16_to_cpu(*(u16 *)src); }$/;"	f	typeref:typename:u16	file:
LZ4_wildCopy	lib/lz4.c	/^static void LZ4_wildCopy(void* dstPtr, const void* srcPtr, void* dstEnd)$/;"	f	typeref:typename:void	file:
LZMA_BASE_SIZE	lib/lzma/LzmaDec.c	/^#define LZMA_BASE_SIZE /;"	d	file:
LZMA_DATA_OFFSET	lib/lzma/LzmaTools.c	/^#define LZMA_DATA_OFFSET /;"	d	file:
LZMA_DIC_MIN	lib/lzma/LzmaDec.c	/^#define LZMA_DIC_MIN /;"	d	file:
LZMA_FINISH_ANY	lib/lzma/LzmaDec.h	/^  LZMA_FINISH_ANY,   \/* finish at any point *\/$/;"	e	enum:__anon7c0cd2440203
LZMA_FINISH_END	lib/lzma/LzmaDec.h	/^  LZMA_FINISH_END    \/* block must be finished at the end *\/$/;"	e	enum:__anon7c0cd2440203
LZMA_LIT_SIZE	lib/lzma/LzmaDec.c	/^#define LZMA_LIT_SIZE /;"	d	file:
LZMA_PROPERTIES_OFFSET	lib/lzma/LzmaTools.c	/^#define LZMA_PROPERTIES_OFFSET /;"	d	file:
LZMA_PROPS_SIZE	lib/lzma/LzmaDec.h	/^#define LZMA_PROPS_SIZE /;"	d
LZMA_REQUIRED_INPUT_MAX	lib/lzma/LzmaDec.h	/^#define LZMA_REQUIRED_INPUT_MAX /;"	d
LZMA_SIZE_OFFSET	lib/lzma/LzmaTools.c	/^#define LZMA_SIZE_OFFSET /;"	d	file:
LZMA_STATUS_FINISHED_WITH_MARK	lib/lzma/LzmaDec.h	/^  LZMA_STATUS_FINISHED_WITH_MARK,          \/* stream was finished with end mark. *\/$/;"	e	enum:__anon7c0cd2440303
LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK	lib/lzma/LzmaDec.h	/^  LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK  \/* there is probability that stream was finished wit/;"	e	enum:__anon7c0cd2440303
LZMA_STATUS_NEEDS_MORE_INPUT	lib/lzma/LzmaDec.h	/^  LZMA_STATUS_NEEDS_MORE_INPUT,            \/* you must provide more input bytes *\/$/;"	e	enum:__anon7c0cd2440303
LZMA_STATUS_NOT_FINISHED	lib/lzma/LzmaDec.h	/^  LZMA_STATUS_NOT_FINISHED,                \/* stream was not finished *\/$/;"	e	enum:__anon7c0cd2440303
LZMA_STATUS_NOT_SPECIFIED	lib/lzma/LzmaDec.h	/^  LZMA_STATUS_NOT_SPECIFIED,               \/* use main error code instead *\/$/;"	e	enum:__anon7c0cd2440303
LZO1X_1_MEM_COMPRESS	include/linux/lzo.h	/^#define LZO1X_1_MEM_COMPRESS	/;"	d
LZO1X_MEM_COMPRESS	include/linux/lzo.h	/^#define LZO1X_MEM_COMPRESS	/;"	d
LZO_E_EOF_NOT_FOUND	fs/jffs2/compr_lzo.c	/^#define LZO_E_EOF_NOT_FOUND	/;"	d	file:
LZO_E_EOF_NOT_FOUND	include/linux/lzo.h	/^#define LZO_E_EOF_NOT_FOUND	/;"	d
LZO_E_ERROR	fs/jffs2/compr_lzo.c	/^#define LZO_E_ERROR	/;"	d	file:
LZO_E_ERROR	include/linux/lzo.h	/^#define LZO_E_ERROR	/;"	d
LZO_E_INPUT_NOT_CONSUMED	fs/jffs2/compr_lzo.c	/^#define LZO_E_INPUT_NOT_CONSUMED /;"	d	file:
LZO_E_INPUT_NOT_CONSUMED	include/linux/lzo.h	/^#define LZO_E_INPUT_NOT_CONSUMED	/;"	d
LZO_E_INPUT_OVERRUN	fs/jffs2/compr_lzo.c	/^#define LZO_E_INPUT_OVERRUN	/;"	d	file:
LZO_E_INPUT_OVERRUN	include/linux/lzo.h	/^#define LZO_E_INPUT_OVERRUN	/;"	d
LZO_E_LOOKBEHIND_OVERRUN	fs/jffs2/compr_lzo.c	/^#define LZO_E_LOOKBEHIND_OVERRUN /;"	d	file:
LZO_E_LOOKBEHIND_OVERRUN	include/linux/lzo.h	/^#define LZO_E_LOOKBEHIND_OVERRUN	/;"	d
LZO_E_NOT_COMPRESSIBLE	fs/jffs2/compr_lzo.c	/^#define LZO_E_NOT_COMPRESSIBLE	/;"	d	file:
LZO_E_NOT_COMPRESSIBLE	include/linux/lzo.h	/^#define LZO_E_NOT_COMPRESSIBLE	/;"	d
LZO_E_NOT_YET_IMPLEMENTED	include/linux/lzo.h	/^#define LZO_E_NOT_YET_IMPLEMENTED	/;"	d
LZO_E_OK	fs/jffs2/compr_lzo.c	/^#define LZO_E_OK	/;"	d	file:
LZO_E_OK	include/linux/lzo.h	/^#define LZO_E_OK	/;"	d
LZO_E_OUTPUT_OVERRUN	fs/jffs2/compr_lzo.c	/^#define LZO_E_OUTPUT_OVERRUN	/;"	d	file:
LZO_E_OUTPUT_OVERRUN	include/linux/lzo.h	/^#define LZO_E_OUTPUT_OVERRUN	/;"	d
LZO_E_OUT_OF_MEMORY	fs/jffs2/compr_lzo.c	/^#define LZO_E_OUT_OF_MEMORY	/;"	d	file:
LZO_E_OUT_OF_MEMORY	include/linux/lzo.h	/^#define LZO_E_OUT_OF_MEMORY	/;"	d
LZO_VERSION	lib/lzo/lzodefs.h	/^#define LZO_VERSION	/;"	d
LZO_VERSION_DATE	lib/lzo/lzodefs.h	/^#define LZO_VERSION_DATE	/;"	d
LZO_VERSION_STRING	lib/lzo/lzodefs.h	/^#define LZO_VERSION_STRING	/;"	d
L_1	arch/arm/lib/uldivmod.S	/^L_1:$/;"	l
L_CODES	lib/zlib/deflate.h	/^#define L_CODES /;"	d
L_KEYWORD	cmd/pxe.c	/^	L_KEYWORD,$/;"	e	enum:lex_state	file:
L_LSB	arch/sh/lib/udivsi3_i4i.S	/^#define L_LSB /;"	d	file:
L_LSWMSB	arch/sh/lib/udivsi3_i4i.S	/^#define L_LSWMSB /;"	d	file:
L_MSWLSB	arch/sh/lib/udivsi3_i4i.S	/^#define L_MSWLSB /;"	d	file:
L_NORMAL	cmd/pxe.c	/^	L_NORMAL = 0,$/;"	e	enum:lex_state	file:
L_P1L2147483647	arch/blackfin/lib/memcpy.S	/^.L_P1L2147483647:$/;"	l
L_SLITERAL	cmd/pxe.c	/^	L_SLITERAL$/;"	e	enum:lex_state	file:
L_all_mctrl_handled	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_all_mctrl_handled:$/;"	l
L_all_mctrl_next	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_all_mctrl_next:$/;"	l
L_apb_dev_not_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_apb_dev_not_found:$/;"	l
L_call_one_mem_handler	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_call_one_mem_handler:$/;"	l
L_clear_bss	arch/openrisc/cpu/start.S	/^.L_clear_bss:$/;"	l
L_conf_area_calculated	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_conf_area_calculated:$/;"	l
L_div_32_32	arch/arm/lib/uldivmod.S	/^L_div_32_32:$/;"	l
L_div_64_64	arch/arm/lib/uldivmod.S	/^L_div_64_64:$/;"	l
L_div_by_0	arch/arm/lib/uldivmod.S	/^L_div_by_0:$/;"	l
L_do_next_ahbreg	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_do_next_ahbreg:$/;"	l
L_do_next_reg	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_do_next_reg:$/;"	l
L_do_one_ahbreg	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_do_one_ahbreg:$/;"	l
L_do_one_mem_handler	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_do_one_mem_handler:$/;"	l
L_do_one_reg	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_do_one_reg:$/;"	l
L_done_shift	arch/arm/lib/uldivmod.S	/^L_done_shift:$/;"	l
L_exit	arch/arm/lib/uldivmod.S	/^L_exit:$/;"	l
L_find_ahb_memctrl	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_find_ahb_memctrl:$/;"	l
L_find_apb_memctrl	arch/sparc/cpu/leon3/memcfg_low.S	/^.L_find_apb_memctrl:$/;"	l
L_found_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_found_bridge:$/;"	l
L_is_ahb2ahb_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_is_ahb2ahb_bridge:$/;"	l
L_is_l2cache_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_is_l2cache_bridge:$/;"	l
L_lsl_1	arch/arm/lib/uldivmod.S	/^L_lsl_1:$/;"	l
L_lsl_4	arch/arm/lib/uldivmod.S	/^L_lsl_4:$/;"	l
L_maxloops_detected	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_maxloops_detected:$/;"	l
L_movmem_2mod4_end	arch/sh/lib/movmem.S	/^L_movmem_2mod4_end:$/;"	l
L_movmem_loop	arch/sh/lib/movmem.S	/^L_movmem_loop:$/;"	l
L_movmem_start_even	arch/sh/lib/movmem.S	/^L_movmem_start_even:$/;"	l
L_next_conf	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_next_conf:$/;"	l
L_no_apb_bridge_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_no_apb_bridge_found:$/;"	l
L_no_device_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_no_device_found:$/;"	l
L_pow2	arch/arm/lib/uldivmod.S	/^L_pow2:$/;"	l
L_process_ahb_dev_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_process_ahb_dev_found:$/;"	l
L_process_apb_dev_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_process_apb_dev_found:$/;"	l
L_process_apb_dev_not_found	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_process_apb_dev_not_found:$/;"	l
L_process_one_apb_conf	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_process_one_apb_conf:$/;"	l
L_process_one_conf	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_process_one_conf:$/;"	l
L_reloc	arch/openrisc/cpu/start.S	/^.L_reloc:$/;"	l
L_relocvectors	arch/openrisc/cpu/start.S	/^.L_relocvectors:$/;"	l
L_scan_next_ahb_slave	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_scan_next_ahb_slave:$/;"	l
L_scan_one_ahb_slave	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_scan_one_ahb_slave:$/;"	l
L_search_next_ahb_bus	arch/sparc/cpu/leon3/ambapp_low.S	/^.L_search_next_ahb_bus:$/;"	l
L_subtract	arch/arm/lib/uldivmod.S	/^L_subtract:$/;"	l
L_update	arch/arm/lib/uldivmod.S	/^L_update:$/;"	l
Laligned	arch/arc/lib/memset.S	/^.Laligned:$/;"	l
Laligned	arch/arc/lib/strchr-700.S	/^.Laligned:$/;"	l
Laligned	arch/blackfin/lib/memset.S	/^.Laligned:$/;"	l
Last_cmp	arch/arc/lib/memcmp.S	/^.Last_cmp:$/;"	l
Last_store	arch/arc/lib/memcpy-700.S	/^.Last_store:$/;"	l
Lattice_Family	include/lattice.h	/^} Lattice_Family;$/;"	t	typeref:enum:__anon773a64540303
Lattice_XP2	include/lattice.h	/^	Lattice_XP2,			\/* Lattice XP2 Family *\/$/;"	e	enum:__anon773a64540303
Lattice_desc	include/lattice.h	/^} Lattice_desc;			\/* end, typedef Altera_desc *\/$/;"	t	typeref:struct:__anon773a64540408
Lattice_iface	include/lattice.h	/^} Lattice_iface;$/;"	t	typeref:enum:__anon773a64540203
Lattice_jtag_get_tdo	include/lattice.h	/^typedef int (*Lattice_jtag_get_tdo)(void);$/;"	t	typeref:typename:int (*)(void)
Lattice_jtag_init	include/lattice.h	/^typedef void (*Lattice_jtag_init)(void);$/;"	t	typeref:typename:void (*)(void)
Lattice_jtag_set_tck	include/lattice.h	/^typedef void (*Lattice_jtag_set_tck)(int v);$/;"	t	typeref:typename:void (*)(int v)
Lattice_jtag_set_tdi	include/lattice.h	/^typedef void (*Lattice_jtag_set_tdi)(int v);$/;"	t	typeref:typename:void (*)(int v)
Lattice_jtag_set_tms	include/lattice.h	/^typedef void (*Lattice_jtag_set_tms)(int v);$/;"	t	typeref:typename:void (*)(int v)
Layerscape architecture	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^menu "Layerscape architecture"$/;"	m
Lboard_init_code	arch/xtensa/cpu/start.S	/^.Lboard_init_code:$/;"	l
Lbyte2_e	arch/blackfin/lib/memmove.S	/^.Lbyte2_e:   B[P0++] = R1;$/;"	l
Lbyte2_s	arch/blackfin/lib/memmove.S	/^.Lbyte2_s:   R1 = B[P3++](Z);$/;"	l
Lbyte_end	arch/arc/lib/memcmp.S	/^.Lbyte_end:$/;"	l
Lbyte_end	arch/blackfin/lib/memcpy.S	/^.Lbyte_end:$/;"	l
Lbyte_even	arch/arc/lib/memcmp.S	/^.Lbyte_even:$/;"	l
Lbyte_loop	arch/blackfin/lib/memset.S	/^.Lbyte_loop:$/;"	l
Lbyte_loop_e	arch/blackfin/lib/memcmp.S	/^.Lbyte_loop_e:$/;"	l
Lbyte_loop_e	arch/blackfin/lib/outs.S	/^.Lbyte_loop_e: B[P0] = R0;$/;"	l
Lbyte_loop_s	arch/blackfin/lib/memcmp.S	/^.Lbyte_loop_s:$/;"	l
Lbyte_loop_s	arch/blackfin/lib/outs.S	/^.Lbyte_loop_s: R0 = B[P1++];$/;"	l
Lbyte_odd	arch/arc/lib/memcmp.S	/^.Lbyte_odd:$/;"	l
Lbyte_start	arch/blackfin/lib/memcpy.S	/^.Lbyte_start:$/;"	l
Lbytes	arch/blackfin/lib/memcmp.S	/^.Lbytes:$/;"	l
Lbytes	arch/blackfin/lib/memmove.S	/^.Lbytes:     LSETUP (.Lbyte2_s , .Lbyte2_e) LC0=P2;$/;"	l
Lbytes	arch/blackfin/lib/memset.S	/^.Lbytes:$/;"	l
Lbytes_left	arch/blackfin/lib/memcpy.S	/^.Lbytes_left:	P2 = R3;$/;"	l
Lbytes_left	arch/blackfin/lib/memset.S	/^.Lbytes_left:$/;"	l
Lbytewise	arch/arc/lib/memcmp.S	/^.Lbytewise:$/;"	l
Lcharloop	arch/arc/lib/strcmp.S	/^.Lcharloop:$/;"	l
Lcmpend	arch/arc/lib/strcmp.S	/^.Lcmpend:$/;"	l
Lcopy_bytewise	arch/arc/lib/memcpy-700.S	/^.Lcopy_bytewise:$/;"	l
Ldebug_abbrev0	arch/arm/lib/asm-offsets.s	/^.Ldebug_abbrev0:$/;"	l
Ldebug_abbrev0	lib/asm-offsets.s	/^.Ldebug_abbrev0:$/;"	l
Ldebug_info0	arch/arm/lib/asm-offsets.s	/^.Ldebug_info0:$/;"	l
Ldebug_info0	lib/asm-offsets.s	/^.Ldebug_info0:$/;"	l
Ldebug_line0	arch/arm/lib/asm-offsets.s	/^.Ldebug_line0:$/;"	l
Ldebug_line0	lib/asm-offsets.s	/^.Ldebug_line0:$/;"	l
Ldebug_ranges0	arch/arm/lib/asm-offsets.s	/^.Ldebug_ranges0:$/;"	l
Ldebug_ranges0	lib/asm-offsets.s	/^.Ldebug_ranges0:$/;"	l
Ldifferent	arch/blackfin/lib/memcmp.S	/^.Ldifferent:$/;"	l
Ldiv0	arch/arm/lib/lib1funcs.S	/^Ldiv0:$/;"	l
Ldiv0_64	arch/arm/lib/div64.S	/^Ldiv0_64:$/;"	l
Ldma_and_reprogram	arch/blackfin/cpu/start.S	/^.Ldma_and_reprogram:$/;"	l
Learly_end	arch/arc/lib/strlen.S	/^.Learly_end:$/;"	l
Len	lib/zlib/deflate.h	/^#define Len /;"	d
LenChoice	lib/lzma/LzmaDec.c	/^#define LenChoice /;"	d	file:
LenChoice2	lib/lzma/LzmaDec.c	/^#define LenChoice2 /;"	d	file:
LenCoder	lib/lzma/LzmaDec.c	/^#define LenCoder /;"	d	file:
LenHigh	lib/lzma/LzmaDec.c	/^#define LenHigh /;"	d	file:
LenLow	lib/lzma/LzmaDec.c	/^#define LenLow /;"	d	file:
LenMid	lib/lzma/LzmaDec.c	/^#define LenMid /;"	d	file:
Lenable_nested	arch/blackfin/cpu/start.S	/^.Lenable_nested:$/;"	l
Lend	arch/arc/lib/strlen.S	/^.Lend:$/;"	l
Lendbloop	arch/arc/lib/memcpy-700.S	/^.Lendbloop:$/;"	l
Lendloop	arch/arc/lib/memcpy-700.S	/^.Lendloop:$/;"	l
Length	drivers/usb/gadget/storage_common.c	/^	u8	Length;			\/* Of the CDB, <= MAX_COMMAND_SIZE *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:u8	file:
Leon_Configuration	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Leon_Configuration;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Letext0	arch/arm/lib/asm-offsets.s	/^.Letext0:$/;"	l
Letext0	lib/asm-offsets.s	/^.Letext0:$/;"	l
Leven	arch/arc/lib/memcmp.S	/^.Leven:$/;"	l
Leven_cmp	arch/arc/lib/memcmp.S	/^.Leven_cmp:$/;"	l
Lexit_trap	arch/blackfin/cpu/interrupt.S	/^.Lexit_trap:$/;"	l
Lfe1	arch/powerpc/cpu/ppc4xx/dcr.S	/^.Lfe1:		.size	 _create_MFDCR,.Lfe1-_create_MFDCR$/;"	l
Lfe2	arch/powerpc/cpu/ppc4xx/dcr.S	/^.Lfe2:		.size	 _create_MTDCR,.Lfe2-_create_MTDCR$/;"	l
Lfe3	arch/powerpc/cpu/ppc4xx/dcr.S	/^.Lfe3:		.size	get_dcr,.Lfe3-get_dcr$/;"	l
Lfe4	arch/powerpc/cpu/ppc4xx/dcr.S	/^.Lfe4:		.size	set_dcr,.Lfe4-set_dcr$/;"	l
Lfinished	arch/blackfin/lib/__kgdb.S	/^.Lfinished:$/;"	l
Lfinished	arch/blackfin/lib/memcmp.S	/^.Lfinished:$/;"	l
Lfinished	arch/blackfin/lib/memmove.S	/^.Lfinished:  P3 = I1;$/;"	l
Lfinished	arch/blackfin/lib/memset.S	/^.Lfinished:$/;"	l
Lforce_align	arch/blackfin/lib/memset.S	/^.Lforce_align:$/;"	l
Lfound0	arch/arc/lib/strchr-700.S	/^.Lfound0:$/;"	l
Lfound0	arch/arc/lib/strcmp.S	/^.Lfound0:$/;"	l
Lfound0_ua	arch/arc/lib/strchr-700.S	/^.Lfound0_ua:$/;"	l
Lfound_char	arch/arc/lib/strchr-700.S	/^.Lfound_char:$/;"	l
Lfound_char_b	arch/arc/lib/strchr-700.S	/^.Lfound_char_b:$/;"	l
Lhas_overlap	arch/blackfin/lib/memcpy.S	/^.Lhas_overlap:$/;"	l
Library routines	lib/Kconfig	/^menu "Library routines"$/;"	m
LinkState	drivers/net/ax88180.h	/^	ax88180_link_state LinkState;$/;"	m	struct:ax88180_private	typeref:typename:ax88180_link_state
LinkStatus	drivers/net/rtl8169.c	/^	LinkStatus = 0x02,$/;"	e	enum:RTL8169_register_content	file:
LinkSts	drivers/net/natsemi.c	/^	LinkSts	= 0x80000000,$/;"	e	enum:ChipConfigBits	file:
LinkSts	drivers/net/ns8382x.c	/^	LinkSts = 0x80000000,$/;"	e	enum:ChipConfigBits	file:
Linux	doc/README.x86	/^Linux kernel as part of a FIT image. It also supports a compressed zImage.$/;"	l
List	tools/buildman/toolchain.py	/^    def List(self):$/;"	m	class:Toolchains
List	tools/microcode-tool	/^def List(date, microcodes, model):$/;"	f
List	tools/microcode-tool.py	/^def List(date, microcodes, model):$/;"	f
ListArchs	tools/buildman/toolchain.py	/^    def ListArchs(self):$/;"	m	class:Toolchains
Literal	lib/lzma/LzmaDec.c	/^#define Literal /;"	d	file:
Llong_loop_e	arch/blackfin/lib/outs.S	/^.Llong_loop_e: [P0] = R0;$/;"	l
Llong_loop_s	arch/blackfin/lib/outs.S	/^.Llong_loop_s: R0 = [P1++];$/;"	l
Lmore_than_seven	arch/blackfin/lib/memcpy.S	/^.Lmore_than_seven:$/;"	l
Lnil	arch/arc/lib/memcmp.S	/^.Lnil:$/;"	l
Lno_loop	arch/blackfin/lib/memmove.S	/^.Lno_loop: B[P0] = R1;$/;"	l
Lno_overlap	arch/blackfin/lib/memcpy.S	/^.Lno_overlap:$/;"	l
Lno_overlap	arch/blackfin/lib/memmove.S	/^.Lno_overlap:$/;"	l
Lnorelocate	arch/blackfin/cpu/start.S	/^.Lnorelocate:$/;"	l
Lnot_aligned	arch/blackfin/lib/memcpy.S	/^.Lnot_aligned:$/;"	l
Lnox1	arch/arc/lib/memcpy-700.S	/^.Lnox1:$/;"	l
Lnox4	arch/arc/lib/memcpy-700.S	/^.Lnox4:$/;"	l
LoaderFlags	include/pe.h	/^	uint32_t LoaderFlags;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
LoaderFlags	include/pe.h	/^	uint32_t LoaderFlags;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
LocateArchUrl	tools/buildman/toolchain.py	/^    def LocateArchUrl(self, fetch_arch):$/;"	m	class:Toolchains
Lodd	arch/arc/lib/memcmp.S	/^.Lodd:$/;"	l
Loffset	arch/blackfin/cpu/start.S	/^.Loffset:$/;"	l
LogCmd	tools/patman/gitutil.py	/^def LogCmd(commit_range, git_dir=None, oneline=False, reverse=False,$/;"	f
Logfile	test/py/multiplexed_log.py	/^class Logfile(object):$/;"	c
LogfileStream	test/py/multiplexed_log.py	/^class LogfileStream(object):$/;"	c
Lol_e	arch/blackfin/lib/memmove.S	/^.Lol_e:    R1 = B[P3--] (Z);$/;"	l
Lol_s	arch/blackfin/lib/memmove.S	/^.Lol_s:    B[P0--] = R1;$/;"	l
Look	lib/lzma/Types.h	/^  SRes (*Look)(void *p, const void **buf, size_t *size);$/;"	m	struct:__anonf2a2f1b90708	typeref:typename:SRes (*)(void * p,const void ** buf,size_t * size)
LookToRead_BUF_SIZE	lib/lzma/Types.h	/^#define LookToRead_BUF_SIZE /;"	d
LookupEmail	tools/patman/gitutil.py	/^def LookupEmail(lookup_name, alias=None, raise_on_error=True, level=0):$/;"	f
Loop	arch/arc/lib/strchr-700.S	/^.Loop:$/;"	l
Loop	arch/arc/lib/strlen.S	/^.Loop:$/;"	l
LoopOsc	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^LoopOsc:$/;"	l
Loop_end	arch/arc/lib/memcmp.S	/^.Loop_end:$/;"	l
Loop_end	arch/arc/lib/memset.S	/^.Loop_end:$/;"	l
Lots	arch/sh/lib/udiv_qrnnd.S	/^.Lots:$/;"	l
Lover_end	arch/blackfin/lib/memcpy.S	/^.Lover_end:$/;"	l
Lover_start	arch/blackfin/lib/memcpy.S	/^.Lover_start:$/;"	l
Loverlap	arch/blackfin/lib/memmove.S	/^.Loverlap:$/;"	l
LowMem	include/bios_emul.h	/^	u8 LowMem[1536];$/;"	m	struct:__anoneb05efed0108	typeref:typename:u8[1536]
Lprogrammed	arch/blackfin/cpu/start.S	/^.Lprogrammed:$/;"	l
Lquad_different	arch/blackfin/lib/memcmp.S	/^.Lquad_different:$/;"	l
Lquad_loop	arch/blackfin/lib/memmove.S	/^.Lquad_loop: MNOP || [P0++] = R1 || R1 = [I0++];$/;"	l
Lquad_loop	arch/blackfin/lib/memset.S	/^.Lquad_loop:$/;"	l
Lquad_loop_e	arch/blackfin/lib/memcmp.S	/^.Lquad_loop_e:$/;"	l
Lquad_loop_s	arch/blackfin/lib/memcmp.S	/^.Lquad_loop_s:$/;"	l
Lskip1	arch/blackfin/lib/memset.S	/^.Lskip1:$/;"	l
Ltext0	arch/arm/lib/asm-offsets.s	/^.Ltext0:$/;"	l
Ltext0	lib/asm-offsets.s	/^.Ltext0:$/;"	l
Lthree_end	arch/blackfin/lib/memcpy.S	/^.Lthree_end:$/;"	l
Lthree_start	arch/blackfin/lib/memcpy.S	/^.Lthree_start:$/;"	l
Ltiny	arch/arc/lib/memset.S	/^.Ltiny:$/;"	l
Ltiny_end	arch/arc/lib/memset.S	/^.Ltiny_end:$/;"	l
Ltoo_small	arch/blackfin/lib/memcmp.S	/^.Ltoo_small:$/;"	l
Ltoo_small	arch/blackfin/lib/memset.S	/^.Ltoo_small:$/;"	l
Lun	drivers/usb/gadget/storage_common.c	/^	u8	Lun;			\/* LUN (normally 0) *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:u8	file:
Lword8_loop_e	arch/blackfin/lib/outs.S	/^.Lword8_loop_e: W[P0] = R0;$/;"	l
Lword8_loop_s	arch/blackfin/lib/outs.S	/^.Lword8_loop_s: R1 = B[P1++];$/;"	l
Lword_loop	arch/blackfin/lib/memcpy.S	/^.Lword_loop:$/;"	l
Lword_loop_e	arch/blackfin/lib/outs.S	/^.Lword_loop_e: W[P0] = R0;$/;"	l
Lword_loop_s	arch/blackfin/lib/outs.S	/^.Lword_loop_s: R0 = W[P1++];$/;"	l
Lwordloop	arch/arc/lib/strcmp.S	/^.Lwordloop:$/;"	l
LzmaDec_Allocate	lib/lzma/LzmaDec.c	/^SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)$/;"	f	typeref:typename:SRes
LzmaDec_AllocateProbs	lib/lzma/LzmaDec.c	/^SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)$/;"	f	typeref:typename:SRes
LzmaDec_AllocateProbs2	lib/lzma/LzmaDec.c	/^static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc)$/;"	f	typeref:typename:SRes	file:
LzmaDec_Construct	lib/lzma/LzmaDec.h	/^#define LzmaDec_Construct(/;"	d
LzmaDec_DecodeReal	lib/lzma/LzmaDec.c	/^static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit)$/;"	f	typeref:typename:StopCompilingDueBUG int MY_FAST_CALL	file:
LzmaDec_DecodeReal2	lib/lzma/LzmaDec.c	/^static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit)$/;"	f	typeref:typename:int MY_FAST_CALL	file:
LzmaDec_DecodeToBuf	lib/lzma/LzmaDec.c	/^SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen/;"	f	typeref:typename:SRes
LzmaDec_DecodeToDic	lib/lzma/LzmaDec.c	/^SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,$/;"	f	typeref:typename:SRes
LzmaDec_Free	lib/lzma/LzmaDec.c	/^void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)$/;"	f	typeref:typename:void
LzmaDec_FreeDict	lib/lzma/LzmaDec.c	/^static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)$/;"	f	typeref:typename:void	file:
LzmaDec_FreeProbs	lib/lzma/LzmaDec.c	/^void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)$/;"	f	typeref:typename:void
LzmaDec_Init	lib/lzma/LzmaDec.c	/^void LzmaDec_Init(CLzmaDec *p)$/;"	f	typeref:typename:void
LzmaDec_InitDicAndState	lib/lzma/LzmaDec.c	/^void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)$/;"	f	typeref:typename:void
LzmaDec_InitRc	lib/lzma/LzmaDec.c	/^static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data)$/;"	f	typeref:typename:void	file:
LzmaDec_InitStateReal	lib/lzma/LzmaDec.c	/^static void LzmaDec_InitStateReal(CLzmaDec *p)$/;"	f	typeref:typename:void	file:
LzmaDec_TryDummy	lib/lzma/LzmaDec.c	/^static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize)$/;"	f	typeref:typename:ELzmaDummy	file:
LzmaDec_WriteRem	lib/lzma/LzmaDec.c	/^static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit)$/;"	f	typeref:typename:void MY_FAST_CALL	file:
LzmaDecode	lib/lzma/LzmaDec.c	/^SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,$/;"	f	typeref:typename:SRes
LzmaProps_Decode	lib/lzma/LzmaDec.c	/^SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)$/;"	f	typeref:typename:SRes
LzmaProps_GetNumProbs	lib/lzma/LzmaDec.c	/^#define LzmaProps_GetNumProbs(/;"	d	file:
M	arch/arm/mach-snapdragon/clock-apq8016.c	/^	uintptr_t M;$/;"	m	struct:bcr_regs	typeref:typename:uintptr_t	file:
M	drivers/bios_emulator/biosemui.h	/^#define M	/;"	d
M	drivers/bios_emulator/include/x86emu/regs.h	/^#define	  M	/;"	d
M0	arch/arm/include/asm/arch-omap3/mux.h	/^#define M0	/;"	d
M0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M0 /;"	d
M0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M0	/;"	d
M0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M0 /;"	d
M0_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	M0_DIV_MASK		= 0xf,$/;"	e	enum:__anon06a678fa0203	file:
M0_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	M0_DIV_SHIFT		= 0,$/;"	e	enum:__anon06a678fa0203	file:
M1	arch/arm/include/asm/arch-omap3/mux.h	/^#define M1	/;"	d
M1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M1 /;"	d
M1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M1	/;"	d
M1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M1 /;"	d
M10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M10	/;"	d
M11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M11	/;"	d
M12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M12	/;"	d
M13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M13	/;"	d
M14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M14	/;"	d
M15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M15	/;"	d
M1_MARKER	lib/lzo/lzodefs.h	/^#define M1_MARKER	/;"	d
M1_MAX_LEN	lib/lzo/lzodefs.h	/^#define M1_MAX_LEN	/;"	d
M1_MAX_OFFSET	fs/jffs2/compr_lzo.c	/^#define M1_MAX_OFFSET	/;"	d	file:
M1_MAX_OFFSET	lib/lzo/lzodefs.h	/^#define M1_MAX_OFFSET	/;"	d
M1_MIN_LEN	lib/lzo/lzodefs.h	/^#define M1_MIN_LEN	/;"	d
M2	arch/arm/include/asm/arch-omap3/mux.h	/^#define M2	/;"	d
M2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M2 /;"	d
M2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M2	/;"	d
M2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M2 /;"	d
M25_READ	board/renesas/sh7752evb/spi-boot.c	/^#define M25_READ	/;"	d	file:
M25_READ	board/renesas/sh7753evb/spi-boot.c	/^#define M25_READ	/;"	d	file:
M25_READ	board/renesas/sh7757lcr/spi-boot.c	/^#define M25_READ	/;"	d	file:
M25_READ_4BYTE	board/renesas/sh7753evb/spi-boot.c	/^#define M25_READ_4BYTE	/;"	d	file:
M2_MARKER	lib/lzo/lzodefs.h	/^#define M2_MARKER	/;"	d
M2_MAX_LEN	lib/lzo/lzodefs.h	/^#define M2_MAX_LEN	/;"	d
M2_MAX_OFFSET	fs/jffs2/compr_lzo.c	/^#define M2_MAX_OFFSET	/;"	d	file:
M2_MAX_OFFSET	lib/lzo/lzodefs.h	/^#define M2_MAX_OFFSET	/;"	d
M2_MIN_LEN	lib/lzo/lzodefs.h	/^#define M2_MIN_LEN	/;"	d
M3	arch/arm/include/asm/arch-omap3/mux.h	/^#define M3	/;"	d
M3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M3 /;"	d
M3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M3	/;"	d
M3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M3 /;"	d
M3IF_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define M3IF_BASE_ADDR	/;"	d
M3IF_CTL_MRRP	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define M3IF_CTL_MRRP(/;"	d
M3_MARKER	lib/lzo/lzodefs.h	/^#define M3_MARKER	/;"	d
M3_MAX_LEN	lib/lzo/lzodefs.h	/^#define M3_MAX_LEN	/;"	d
M3_MAX_OFFSET	fs/jffs2/compr_lzo.c	/^#define M3_MAX_OFFSET	/;"	d	file:
M3_MAX_OFFSET	lib/lzo/lzodefs.h	/^#define M3_MAX_OFFSET	/;"	d
M3_MIN_LEN	lib/lzo/lzodefs.h	/^#define M3_MIN_LEN	/;"	d
M4	arch/arm/include/asm/arch-omap3/mux.h	/^#define M4	/;"	d
M4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M4 /;"	d
M4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M4	/;"	d
M4	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M4 /;"	d
M41T11_STORAGE_SZ	drivers/rtc/m41t11.c	/^#define M41T11_STORAGE_SZ /;"	d	file:
M41T11_YEAR_DATA	drivers/rtc/m41t11.c	/^#define M41T11_YEAR_DATA /;"	d	file:
M41T11_YEAR_SIZE	drivers/rtc/m41t11.c	/^#define M41T11_YEAR_SIZE /;"	d	file:
M41T62_ALARM_REG_SIZE	drivers/rtc/m41t62.c	/^#define M41T62_ALARM_REG_SIZE	/;"	d	file:
M41T62_ALHOUR_HT	drivers/rtc/m41t62.c	/^#define M41T62_ALHOUR_HT	/;"	d	file:
M41T62_ALMON_AFE	drivers/rtc/m41t62.c	/^#define M41T62_ALMON_AFE	/;"	d	file:
M41T62_ALMON_SQWE	drivers/rtc/m41t62.c	/^#define M41T62_ALMON_SQWE	/;"	d	file:
M41T62_DATETIME_REG_SIZE	drivers/rtc/m41t62.c	/^#define M41T62_DATETIME_REG_SIZE	/;"	d	file:
M41T62_FEATURE_BL	drivers/rtc/m41t62.c	/^#define M41T62_FEATURE_BL	/;"	d	file:
M41T62_FEATURE_HT	drivers/rtc/m41t62.c	/^#define M41T62_FEATURE_HT	/;"	d	file:
M41T62_FLAGS_AF	drivers/rtc/m41t62.c	/^#define M41T62_FLAGS_AF	/;"	d	file:
M41T62_FLAGS_BATT_LOW	drivers/rtc/m41t62.c	/^#define M41T62_FLAGS_BATT_LOW	/;"	d	file:
M41T62_REG_ALARM_DAY	drivers/rtc/m41t62.c	/^#define M41T62_REG_ALARM_DAY	/;"	d	file:
M41T62_REG_ALARM_HOUR	drivers/rtc/m41t62.c	/^#define M41T62_REG_ALARM_HOUR	/;"	d	file:
M41T62_REG_ALARM_MIN	drivers/rtc/m41t62.c	/^#define M41T62_REG_ALARM_MIN	/;"	d	file:
M41T62_REG_ALARM_MON	drivers/rtc/m41t62.c	/^#define M41T62_REG_ALARM_MON	/;"	d	file:
M41T62_REG_ALARM_SEC	drivers/rtc/m41t62.c	/^#define M41T62_REG_ALARM_SEC	/;"	d	file:
M41T62_REG_DAY	drivers/rtc/m41t62.c	/^#define M41T62_REG_DAY	/;"	d	file:
M41T62_REG_FLAGS	drivers/rtc/m41t62.c	/^#define M41T62_REG_FLAGS	/;"	d	file:
M41T62_REG_HOUR	drivers/rtc/m41t62.c	/^#define M41T62_REG_HOUR	/;"	d	file:
M41T62_REG_MIN	drivers/rtc/m41t62.c	/^#define M41T62_REG_MIN	/;"	d	file:
M41T62_REG_MON	drivers/rtc/m41t62.c	/^#define M41T62_REG_MON	/;"	d	file:
M41T62_REG_SEC	drivers/rtc/m41t62.c	/^#define M41T62_REG_SEC	/;"	d	file:
M41T62_REG_SSEC	drivers/rtc/m41t62.c	/^#define M41T62_REG_SSEC	/;"	d	file:
M41T62_REG_WDAY	drivers/rtc/m41t62.c	/^#define M41T62_REG_WDAY	/;"	d	file:
M41T62_REG_YEAR	drivers/rtc/m41t62.c	/^#define M41T62_REG_YEAR	/;"	d	file:
M41T62_SEC_ST	drivers/rtc/m41t62.c	/^#define M41T62_SEC_ST	/;"	d	file:
M41T80_ALHOUR_HT	drivers/rtc/m41t62.c	/^#define M41T80_ALHOUR_HT	/;"	d	file:
M41T94_BIT_CB	drivers/rtc/m41t94.c	/^#define M41T94_BIT_CB	/;"	d	file:
M41T94_BIT_CEB	drivers/rtc/m41t94.c	/^#define M41T94_BIT_CEB	/;"	d	file:
M41T94_BIT_HALT	drivers/rtc/m41t94.c	/^#define M41T94_BIT_HALT	/;"	d	file:
M41T94_BIT_STOP	drivers/rtc/m41t94.c	/^#define M41T94_BIT_STOP	/;"	d	file:
M41T94_REG_DAY	drivers/rtc/m41t94.c	/^#define M41T94_REG_DAY	/;"	d	file:
M41T94_REG_HOURS	drivers/rtc/m41t94.c	/^#define M41T94_REG_HOURS	/;"	d	file:
M41T94_REG_HT	drivers/rtc/m41t94.c	/^#define M41T94_REG_HT	/;"	d	file:
M41T94_REG_MINUTES	drivers/rtc/m41t94.c	/^#define M41T94_REG_MINUTES	/;"	d	file:
M41T94_REG_MONTH	drivers/rtc/m41t94.c	/^#define M41T94_REG_MONTH	/;"	d	file:
M41T94_REG_SECONDS	drivers/rtc/m41t94.c	/^#define M41T94_REG_SECONDS	/;"	d	file:
M41T94_REG_WDAY	drivers/rtc/m41t94.c	/^#define M41T94_REG_WDAY	/;"	d	file:
M41T94_REG_YEAR	drivers/rtc/m41t94.c	/^#define M41T94_REG_YEAR	/;"	d	file:
M4IF_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define M4IF_BASE_ADDR	/;"	d
M4IF_FBPM0	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define M4IF_FBPM0	/;"	d
M4IF_FIDBP	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define M4IF_FIDBP	/;"	d
M4IF_GENP_WEIM_MM_MASK	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define M4IF_GENP_WEIM_MM_MASK	/;"	d
M4_BOOTROM_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define M4_BOOTROM_BASE_ADDR	/;"	d
M4_BOOTROM_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define M4_BOOTROM_BASE_ADDR /;"	d
M4_MARKER	lib/lzo/lzodefs.h	/^#define M4_MARKER	/;"	d
M4_MAX_LEN	lib/lzo/lzodefs.h	/^#define M4_MAX_LEN	/;"	d
M4_MAX_OFFSET	fs/jffs2/compr_lzo.c	/^#define M4_MAX_OFFSET	/;"	d	file:
M4_MAX_OFFSET	lib/lzo/lzodefs.h	/^#define M4_MAX_OFFSET	/;"	d
M4_MIN_LEN	lib/lzo/lzodefs.h	/^#define M4_MIN_LEN	/;"	d
M5	arch/arm/include/asm/arch-omap3/mux.h	/^#define M5	/;"	d
M5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M5 /;"	d
M5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M5	/;"	d
M5	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M5 /;"	d
M5208	arch/m68k/Kconfig	/^config M5208$/;"	c	menu:M68000 architecture
M52277	arch/m68k/Kconfig	/^config M52277$/;"	c	menu:M68000 architecture
M5235	arch/m68k/Kconfig	/^config M5235$/;"	c	menu:M68000 architecture
M5249	arch/m68k/Kconfig	/^config M5249$/;"	c	menu:M68000 architecture
M5253	arch/m68k/Kconfig	/^config M5253$/;"	c	menu:M68000 architecture
M5271	arch/m68k/Kconfig	/^config M5271$/;"	c	menu:M68000 architecture
M5272	arch/m68k/Kconfig	/^config M5272$/;"	c	menu:M68000 architecture
M5275	arch/m68k/Kconfig	/^config M5275$/;"	c	menu:M68000 architecture
M5282	arch/m68k/Kconfig	/^config M5282$/;"	c	menu:M68000 architecture
M53015	arch/m68k/Kconfig	/^config M53015$/;"	c	menu:M68000 architecture
M5307	arch/m68k/Kconfig	/^config M5307$/;"	c	menu:M68000 architecture
M5329	arch/m68k/Kconfig	/^config M5329$/;"	c	menu:M68000 architecture
M5373	arch/m68k/Kconfig	/^config M5373$/;"	c	menu:M68000 architecture
M54418	arch/m68k/Kconfig	/^config M54418$/;"	c	menu:M68000 architecture
M54451	arch/m68k/Kconfig	/^config M54451$/;"	c	menu:M68000 architecture
M54455	arch/m68k/Kconfig	/^config M54455$/;"	c	menu:M68000 architecture
M547x	arch/m68k/Kconfig	/^config M547x$/;"	c	menu:M68000 architecture
M548x	arch/m68k/Kconfig	/^config M548x$/;"	c	menu:M68000 architecture
M6	arch/arm/include/asm/arch-omap3/mux.h	/^#define M6	/;"	d
M6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M6 /;"	d
M6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M6	/;"	d
M6	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M6 /;"	d
M64En	drivers/net/ns8382x.c	/^	M64En = 0x00000800,$/;"	e	enum:ChipConfigBits	file:
M68000 architecture	arch/m68k/Kconfig	/^menu "M68000 architecture"$/;"	m
M68K	arch/Kconfig	/^config M68K$/;"	c	choice:choice07312ef30104
M7	arch/arm/include/asm/arch-omap3/mux.h	/^#define M7	/;"	d
M7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define M7 /;"	d
M7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M7	/;"	d
M7	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define M7 /;"	d
M8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M8	/;"	d
M8265_PCIBR0	arch/powerpc/include/asm/m8260_pci.h	/^#define M8265_PCIBR0	/;"	d
M8265_PCIBR0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define M8265_PCIBR0	/;"	d
M8265_PCIBR1	arch/powerpc/include/asm/m8260_pci.h	/^#define M8265_PCIBR1	/;"	d
M8265_PCIBR1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define M8265_PCIBR1	/;"	d
M8265_PCIMSK0	arch/powerpc/include/asm/m8260_pci.h	/^#define M8265_PCIMSK0	/;"	d
M8265_PCIMSK0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define M8265_PCIMSK0	/;"	d
M8265_PCIMSK1	arch/powerpc/include/asm/m8260_pci.h	/^#define M8265_PCIMSK1	/;"	d
M8265_PCIMSK1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define M8265_PCIMSK1	/;"	d
M826X_SCCR_PCI_MODE_EN	arch/powerpc/include/asm/m8260_pci.h	/^#define M826X_SCCR_PCI_MODE_EN /;"	d
M826X_SCCR_PCI_MODE_EN	arch/powerpc/include/asm/mpc8349_pci.h	/^#define M826X_SCCR_PCI_MODE_EN /;"	d
M88E1000_12_PHY_ID	drivers/net/e1000.h	/^#define M88E1000_12_PHY_ID	/;"	d
M88E1000_14_PHY_ID	drivers/net/e1000.h	/^#define M88E1000_14_PHY_ID	/;"	d
M88E1000_EPSCR_DOWN_NO_IDLE	drivers/net/e1000.h	/^#define M88E1000_EPSCR_DOWN_NO_IDLE	/;"	d
M88E1000_EPSCR_FIBER_LOOPBACK	drivers/net/e1000.h	/^#define M88E1000_EPSCR_FIBER_LOOPBACK	/;"	d
M88E1000_EPSCR_MASTER_DOWNSHIFT_1X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X /;"	d
M88E1000_EPSCR_MASTER_DOWNSHIFT_2X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X /;"	d
M88E1000_EPSCR_MASTER_DOWNSHIFT_3X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X /;"	d
M88E1000_EPSCR_MASTER_DOWNSHIFT_4X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X /;"	d
M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK	drivers/net/e1000.h	/^#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK /;"	d
M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X /;"	d
M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X /;"	d
M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X	drivers/net/e1000.h	/^#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X /;"	d
M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS	drivers/net/e1000.h	/^#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS /;"	d
M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK	drivers/net/e1000.h	/^#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK /;"	d
M88E1000_EPSCR_TX_CLK_0	drivers/net/e1000.h	/^#define M88E1000_EPSCR_TX_CLK_0	/;"	d
M88E1000_EPSCR_TX_CLK_25	drivers/net/e1000.h	/^#define M88E1000_EPSCR_TX_CLK_25	/;"	d
M88E1000_EPSCR_TX_CLK_2_5	drivers/net/e1000.h	/^#define M88E1000_EPSCR_TX_CLK_2_5	/;"	d
M88E1000_EXT_PHY_SPEC_CTRL	drivers/net/e1000.h	/^#define M88E1000_EXT_PHY_SPEC_CTRL	/;"	d
M88E1000_E_PHY_ID	drivers/net/e1000.h	/^#define M88E1000_E_PHY_ID	/;"	d
M88E1000_INT_ENABLE	drivers/net/e1000.h	/^#define M88E1000_INT_ENABLE	/;"	d
M88E1000_INT_STATUS	drivers/net/e1000.h	/^#define M88E1000_INT_STATUS	/;"	d
M88E1000_I_PHY_ID	drivers/net/e1000.h	/^#define M88E1000_I_PHY_ID	/;"	d
M88E1000_PHY_GEN_CONTROL	drivers/net/e1000.h	/^#define M88E1000_PHY_GEN_CONTROL /;"	d
M88E1000_PHY_PAGE_SELECT	drivers/net/e1000.h	/^#define M88E1000_PHY_PAGE_SELECT /;"	d
M88E1000_PHY_SPEC_CTRL	drivers/net/e1000.h	/^#define M88E1000_PHY_SPEC_CTRL	/;"	d
M88E1000_PHY_SPEC_STATUS	drivers/net/e1000.h	/^#define M88E1000_PHY_SPEC_STATUS	/;"	d
M88E1000_PSCR_10BT_EXT_DIST_ENABLE	drivers/net/e1000.h	/^#define M88E1000_PSCR_10BT_EXT_DIST_ENABLE /;"	d
M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT	drivers/net/e1000.h	/^#define M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT /;"	d
M88E1000_PSCR_ASSERT_CRS_ON_TX	drivers/net/e1000.h	/^#define M88E1000_PSCR_ASSERT_CRS_ON_TX	/;"	d
M88E1000_PSCR_AUTO_X_1000T	drivers/net/e1000.h	/^#define M88E1000_PSCR_AUTO_X_1000T	/;"	d
M88E1000_PSCR_AUTO_X_MODE	drivers/net/e1000.h	/^#define M88E1000_PSCR_AUTO_X_MODE	/;"	d
M88E1000_PSCR_AUTO_X_MODE_SHIFT	drivers/net/e1000.h	/^#define M88E1000_PSCR_AUTO_X_MODE_SHIFT	/;"	d
M88E1000_PSCR_CLK125_DISABLE	drivers/net/e1000.h	/^#define M88E1000_PSCR_CLK125_DISABLE	/;"	d
M88E1000_PSCR_FORCE_LINK_GOOD	drivers/net/e1000.h	/^#define M88E1000_PSCR_FORCE_LINK_GOOD	/;"	d
M88E1000_PSCR_JABBER_DISABLE	drivers/net/e1000.h	/^#define M88E1000_PSCR_JABBER_DISABLE	/;"	d
M88E1000_PSCR_MDIX_MANUAL_MODE	drivers/net/e1000.h	/^#define M88E1000_PSCR_MDIX_MANUAL_MODE	/;"	d
M88E1000_PSCR_MDI_MANUAL_MODE	drivers/net/e1000.h	/^#define M88E1000_PSCR_MDI_MANUAL_MODE	/;"	d
M88E1000_PSCR_MII_5BIT_ENABLE	drivers/net/e1000.h	/^#define M88E1000_PSCR_MII_5BIT_ENABLE	/;"	d
M88E1000_PSCR_POLARITY_REVERSAL	drivers/net/e1000.h	/^#define M88E1000_PSCR_POLARITY_REVERSAL /;"	d
M88E1000_PSCR_POLARITY_REVERSAL_SHIFT	drivers/net/e1000.h	/^#define M88E1000_PSCR_POLARITY_REVERSAL_SHIFT	/;"	d
M88E1000_PSCR_SCRAMBLER_DISABLE	drivers/net/e1000.h	/^#define M88E1000_PSCR_SCRAMBLER_DISABLE /;"	d
M88E1000_PSCR_SQE_TEST	drivers/net/e1000.h	/^#define M88E1000_PSCR_SQE_TEST	/;"	d
M88E1000_PSSR_1000MBS	drivers/net/e1000.h	/^#define M88E1000_PSSR_1000MBS	/;"	d
M88E1000_PSSR_100MBS	drivers/net/e1000.h	/^#define M88E1000_PSSR_100MBS	/;"	d
M88E1000_PSSR_10MBS	drivers/net/e1000.h	/^#define M88E1000_PSSR_10MBS	/;"	d
M88E1000_PSSR_CABLE_LENGTH	drivers/net/e1000.h	/^#define M88E1000_PSSR_CABLE_LENGTH	/;"	d
M88E1000_PSSR_CABLE_LENGTH_SHIFT	drivers/net/e1000.h	/^#define M88E1000_PSSR_CABLE_LENGTH_SHIFT /;"	d
M88E1000_PSSR_DPLX	drivers/net/e1000.h	/^#define M88E1000_PSSR_DPLX	/;"	d
M88E1000_PSSR_JABBER	drivers/net/e1000.h	/^#define M88E1000_PSSR_JABBER	/;"	d
M88E1000_PSSR_LINK	drivers/net/e1000.h	/^#define M88E1000_PSSR_LINK	/;"	d
M88E1000_PSSR_MDIX	drivers/net/e1000.h	/^#define M88E1000_PSSR_MDIX	/;"	d
M88E1000_PSSR_MDIX_SHIFT	drivers/net/e1000.h	/^#define M88E1000_PSSR_MDIX_SHIFT	/;"	d
M88E1000_PSSR_PAGE_RCVD	drivers/net/e1000.h	/^#define M88E1000_PSSR_PAGE_RCVD	/;"	d
M88E1000_PSSR_REV_POLARITY	drivers/net/e1000.h	/^#define M88E1000_PSSR_REV_POLARITY	/;"	d
M88E1000_PSSR_REV_POLARITY_SHIFT	drivers/net/e1000.h	/^#define M88E1000_PSSR_REV_POLARITY_SHIFT /;"	d
M88E1000_PSSR_SPD_DPLX_RESOLVED	drivers/net/e1000.h	/^#define M88E1000_PSSR_SPD_DPLX_RESOLVED /;"	d
M88E1000_PSSR_SPEED	drivers/net/e1000.h	/^#define M88E1000_PSSR_SPEED	/;"	d
M88E1000_RX_ERR_CNTR	drivers/net/e1000.h	/^#define M88E1000_RX_ERR_CNTR	/;"	d
M88E1011S_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1011S_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1011_I_PHY_ID	drivers/net/e1000.h	/^#define M88E1011_I_PHY_ID	/;"	d
M88E1011_I_REV_4	drivers/net/e1000.h	/^#define M88E1011_I_REV_4 /;"	d
M88E1111S_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1111S_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1111_EXT_SCR	drivers/net/ax88180.h	/^#define M88E1111_EXT_SCR	/;"	d
M88E1111_EXT_SSR	drivers/net/ax88180.h	/^#define M88E1111_EXT_SSR	/;"	d
M88E1111_I_PHY_ID	drivers/net/e1000.h	/^#define M88E1111_I_PHY_ID /;"	d
M88E1118R_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1118R_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1118_CR	drivers/net/ax88180.h	/^#define M88E1118_CR	/;"	d
M88E1118_CR_DEFAULT	drivers/net/ax88180.h	/^  #define M88E1118_CR_DEFAULT	/;"	d
M88E1118_CR_RGMII_RXCLK_DELAY	drivers/net/ax88180.h	/^  #define M88E1118_CR_RGMII_RXCLK_DELAY	/;"	d
M88E1118_CR_RGMII_TXCLK_DELAY	drivers/net/ax88180.h	/^  #define M88E1118_CR_RGMII_TXCLK_DELAY	/;"	d
M88E1118_LEDCTL	drivers/net/ax88180.h	/^#define M88E1118_LEDCTL	/;"	d
M88E1118_LEDCTL_DEFAULT	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_DEFAULT	/;"	d
M88E1118_LEDCTL_LED0DUALMODE1	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_LED0DUALMODE1	/;"	d
M88E1118_LEDCTL_LED0DUALMODE2	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_LED0DUALMODE2	/;"	d
M88E1118_LEDCTL_LED0DUALMODE3	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_LED0DUALMODE3	/;"	d
M88E1118_LEDCTL_LED0DUALMODE4	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_LED0DUALMODE4	/;"	d
M88E1118_LEDCTL_LED2BLNK	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_LED2BLNK	/;"	d
M88E1118_LEDCTL_LED2INT	drivers/net/ax88180.h	/^  #define M88E1118_LEDCTL_LED2INT	/;"	d
M88E1118_LEDMIX	drivers/net/ax88180.h	/^#define M88E1118_LEDMIX	/;"	d
M88E1118_LEDMIX_LED050	drivers/net/ax88180.h	/^  #define M88E1118_LEDMIX_LED050	/;"	d
M88E1118_LEDMIX_LED150	drivers/net/ax88180.h	/^  #define M88E1118_LEDMIX_LED150	/;"	d
M88E1118_PAGE_SEL	drivers/net/ax88180.h	/^#define M88E1118_PAGE_SEL	/;"	d
M88E1118_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1118_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1121R_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1121R_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1145_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1145_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1149S_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1149S_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1310_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1310_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1510_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1510_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88E1518_driver	drivers/net/phy/marvell.c	/^static struct phy_driver M88E1518_driver = {$/;"	v	typeref:struct:phy_driver	file:
M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X /;"	d
M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK	drivers/net/e1000.h	/^#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK /;"	d
M88_IER	drivers/net/ax88180.h	/^#define M88_IER	/;"	d
M88_ISR	drivers/net/ax88180.h	/^#define M88_ISR	/;"	d
M88_SSR	drivers/net/ax88180.h	/^#define M88_SSR	/;"	d
M8XX_SIZES_NO	drivers/pcmcia/mpc8xx_pcmcia.c	/^#define M8XX_SIZES_NO /;"	d	file:
M9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define M9	/;"	d
M98095_000_HOST_DATA	drivers/sound/max98095.h	/^#define M98095_000_HOST_DATA	/;"	d
M98095_001_HOST_INT_STS	drivers/sound/max98095.h	/^#define M98095_001_HOST_INT_STS	/;"	d
M98095_002_HOST_RSP_STS	drivers/sound/max98095.h	/^#define M98095_002_HOST_RSP_STS	/;"	d
M98095_003_HOST_CMD_STS	drivers/sound/max98095.h	/^#define M98095_003_HOST_CMD_STS	/;"	d
M98095_004_CODEC_STS	drivers/sound/max98095.h	/^#define M98095_004_CODEC_STS	/;"	d
M98095_005_DAI1_ALC_STS	drivers/sound/max98095.h	/^#define M98095_005_DAI1_ALC_STS	/;"	d
M98095_006_DAI2_ALC_STS	drivers/sound/max98095.h	/^#define M98095_006_DAI2_ALC_STS	/;"	d
M98095_007_JACK_AUTO_STS	drivers/sound/max98095.h	/^#define M98095_007_JACK_AUTO_STS	/;"	d
M98095_008_JACK_MANUAL_STS	drivers/sound/max98095.h	/^#define M98095_008_JACK_MANUAL_STS	/;"	d
M98095_009_JACK_VBAT_STS	drivers/sound/max98095.h	/^#define M98095_009_JACK_VBAT_STS	/;"	d
M98095_00A_ACC_ADC_STS	drivers/sound/max98095.h	/^#define M98095_00A_ACC_ADC_STS	/;"	d
M98095_00B_MIC_NG_AGC_STS	drivers/sound/max98095.h	/^#define M98095_00B_MIC_NG_AGC_STS	/;"	d
M98095_00C_SPK_L_VOLT_STS	drivers/sound/max98095.h	/^#define M98095_00C_SPK_L_VOLT_STS	/;"	d
M98095_00D_SPK_R_VOLT_STS	drivers/sound/max98095.h	/^#define M98095_00D_SPK_R_VOLT_STS	/;"	d
M98095_00E_TEMP_SENSOR_STS	drivers/sound/max98095.h	/^#define M98095_00E_TEMP_SENSOR_STS	/;"	d
M98095_00F_HOST_CFG	drivers/sound/max98095.h	/^#define M98095_00F_HOST_CFG	/;"	d
M98095_010_HOST_INT_CFG	drivers/sound/max98095.h	/^#define M98095_010_HOST_INT_CFG	/;"	d
M98095_011_HOST_INT_EN	drivers/sound/max98095.h	/^#define M98095_011_HOST_INT_EN	/;"	d
M98095_012_CODEC_INT_EN	drivers/sound/max98095.h	/^#define M98095_012_CODEC_INT_EN	/;"	d
M98095_013_JACK_INT_EN	drivers/sound/max98095.h	/^#define M98095_013_JACK_INT_EN	/;"	d
M98095_014_JACK_INT_EN	drivers/sound/max98095.h	/^#define M98095_014_JACK_INT_EN	/;"	d
M98095_015_DEC	drivers/sound/max98095.h	/^#define M98095_015_DEC	/;"	d
M98095_016_RESERVED	drivers/sound/max98095.h	/^#define M98095_016_RESERVED	/;"	d
M98095_017_RESERVED	drivers/sound/max98095.h	/^#define M98095_017_RESERVED	/;"	d
M98095_018_KEYCODE3	drivers/sound/max98095.h	/^#define M98095_018_KEYCODE3	/;"	d
M98095_019_KEYCODE2	drivers/sound/max98095.h	/^#define M98095_019_KEYCODE2	/;"	d
M98095_01A_KEYCODE1	drivers/sound/max98095.h	/^#define M98095_01A_KEYCODE1	/;"	d
M98095_01B_KEYCODE0	drivers/sound/max98095.h	/^#define M98095_01B_KEYCODE0	/;"	d
M98095_01C_OEMCODE1	drivers/sound/max98095.h	/^#define M98095_01C_OEMCODE1	/;"	d
M98095_01D_OEMCODE0	drivers/sound/max98095.h	/^#define M98095_01D_OEMCODE0	/;"	d
M98095_01E_XCFG1	drivers/sound/max98095.h	/^#define M98095_01E_XCFG1	/;"	d
M98095_01F_XCFG2	drivers/sound/max98095.h	/^#define M98095_01F_XCFG2	/;"	d
M98095_020_XCFG3	drivers/sound/max98095.h	/^#define M98095_020_XCFG3	/;"	d
M98095_021_XCFG4	drivers/sound/max98095.h	/^#define M98095_021_XCFG4	/;"	d
M98095_022_XCFG5	drivers/sound/max98095.h	/^#define M98095_022_XCFG5	/;"	d
M98095_023_XCFG6	drivers/sound/max98095.h	/^#define M98095_023_XCFG6	/;"	d
M98095_024_XGPIO	drivers/sound/max98095.h	/^#define M98095_024_XGPIO	/;"	d
M98095_025_XCLKCFG	drivers/sound/max98095.h	/^#define M98095_025_XCLKCFG	/;"	d
M98095_026_SYS_CLK	drivers/sound/max98095.h	/^#define M98095_026_SYS_CLK	/;"	d
M98095_027_DAI1_CLKMODE	drivers/sound/max98095.h	/^#define M98095_027_DAI1_CLKMODE	/;"	d
M98095_028_DAI1_CLKCFG_HI	drivers/sound/max98095.h	/^#define M98095_028_DAI1_CLKCFG_HI	/;"	d
M98095_029_DAI1_CLKCFG_LO	drivers/sound/max98095.h	/^#define M98095_029_DAI1_CLKCFG_LO	/;"	d
M98095_02A_DAI1_FORMAT	drivers/sound/max98095.h	/^#define M98095_02A_DAI1_FORMAT	/;"	d
M98095_02B_DAI1_CLOCK	drivers/sound/max98095.h	/^#define M98095_02B_DAI1_CLOCK	/;"	d
M98095_02C_DAI1_IOCFG	drivers/sound/max98095.h	/^#define M98095_02C_DAI1_IOCFG	/;"	d
M98095_02D_DAI1_TDM	drivers/sound/max98095.h	/^#define M98095_02D_DAI1_TDM	/;"	d
M98095_02E_DAI1_FILTERS	drivers/sound/max98095.h	/^#define M98095_02E_DAI1_FILTERS	/;"	d
M98095_02F_DAI1_LVL1	drivers/sound/max98095.h	/^#define M98095_02F_DAI1_LVL1	/;"	d
M98095_030_DAI1_LVL2	drivers/sound/max98095.h	/^#define M98095_030_DAI1_LVL2	/;"	d
M98095_031_DAI2_CLKMODE	drivers/sound/max98095.h	/^#define M98095_031_DAI2_CLKMODE	/;"	d
M98095_032_DAI2_CLKCFG_HI	drivers/sound/max98095.h	/^#define M98095_032_DAI2_CLKCFG_HI	/;"	d
M98095_033_DAI2_CLKCFG_LO	drivers/sound/max98095.h	/^#define M98095_033_DAI2_CLKCFG_LO	/;"	d
M98095_034_DAI2_FORMAT	drivers/sound/max98095.h	/^#define M98095_034_DAI2_FORMAT	/;"	d
M98095_035_DAI2_CLOCK	drivers/sound/max98095.h	/^#define M98095_035_DAI2_CLOCK	/;"	d
M98095_036_DAI2_IOCFG	drivers/sound/max98095.h	/^#define M98095_036_DAI2_IOCFG	/;"	d
M98095_037_DAI2_TDM	drivers/sound/max98095.h	/^#define M98095_037_DAI2_TDM	/;"	d
M98095_038_DAI2_FILTERS	drivers/sound/max98095.h	/^#define M98095_038_DAI2_FILTERS	/;"	d
M98095_039_DAI2_LVL1	drivers/sound/max98095.h	/^#define M98095_039_DAI2_LVL1	/;"	d
M98095_03A_DAI2_LVL2	drivers/sound/max98095.h	/^#define M98095_03A_DAI2_LVL2	/;"	d
M98095_03B_DAI3_CLKMODE	drivers/sound/max98095.h	/^#define M98095_03B_DAI3_CLKMODE	/;"	d
M98095_03C_DAI3_CLKCFG_HI	drivers/sound/max98095.h	/^#define M98095_03C_DAI3_CLKCFG_HI	/;"	d
M98095_03D_DAI3_CLKCFG_LO	drivers/sound/max98095.h	/^#define M98095_03D_DAI3_CLKCFG_LO	/;"	d
M98095_03E_DAI3_FORMAT	drivers/sound/max98095.h	/^#define M98095_03E_DAI3_FORMAT	/;"	d
M98095_03F_DAI3_CLOCK	drivers/sound/max98095.h	/^#define M98095_03F_DAI3_CLOCK	/;"	d
M98095_040_DAI3_IOCFG	drivers/sound/max98095.h	/^#define M98095_040_DAI3_IOCFG	/;"	d
M98095_041_DAI3_TDM	drivers/sound/max98095.h	/^#define M98095_041_DAI3_TDM	/;"	d
M98095_042_DAI3_FILTERS	drivers/sound/max98095.h	/^#define M98095_042_DAI3_FILTERS	/;"	d
M98095_043_DAI3_LVL1	drivers/sound/max98095.h	/^#define M98095_043_DAI3_LVL1	/;"	d
M98095_044_DAI3_LVL2	drivers/sound/max98095.h	/^#define M98095_044_DAI3_LVL2	/;"	d
M98095_045_CFG_DSP	drivers/sound/max98095.h	/^#define M98095_045_CFG_DSP	/;"	d
M98095_046_DAC_CTRL1	drivers/sound/max98095.h	/^#define M98095_046_DAC_CTRL1	/;"	d
M98095_047_DAC_CTRL2	drivers/sound/max98095.h	/^#define M98095_047_DAC_CTRL2	/;"	d
M98095_048_MIX_DAC_LR	drivers/sound/max98095.h	/^#define M98095_048_MIX_DAC_LR	/;"	d
M98095_049_MIX_DAC_M	drivers/sound/max98095.h	/^#define M98095_049_MIX_DAC_M	/;"	d
M98095_04A_MIX_ADC_LEFT	drivers/sound/max98095.h	/^#define M98095_04A_MIX_ADC_LEFT	/;"	d
M98095_04B_MIX_ADC_RIGHT	drivers/sound/max98095.h	/^#define M98095_04B_MIX_ADC_RIGHT	/;"	d
M98095_04C_MIX_HP_LEFT	drivers/sound/max98095.h	/^#define M98095_04C_MIX_HP_LEFT	/;"	d
M98095_04D_MIX_HP_RIGHT	drivers/sound/max98095.h	/^#define M98095_04D_MIX_HP_RIGHT	/;"	d
M98095_04E_CFG_HP	drivers/sound/max98095.h	/^#define M98095_04E_CFG_HP	/;"	d
M98095_04F_MIX_RCV	drivers/sound/max98095.h	/^#define M98095_04F_MIX_RCV	/;"	d
M98095_050_MIX_SPK_LEFT	drivers/sound/max98095.h	/^#define M98095_050_MIX_SPK_LEFT	/;"	d
M98095_051_MIX_SPK_RIGHT	drivers/sound/max98095.h	/^#define M98095_051_MIX_SPK_RIGHT	/;"	d
M98095_052_MIX_SPK_CFG	drivers/sound/max98095.h	/^#define M98095_052_MIX_SPK_CFG	/;"	d
M98095_053_MIX_LINEOUT1	drivers/sound/max98095.h	/^#define M98095_053_MIX_LINEOUT1	/;"	d
M98095_054_MIX_LINEOUT2	drivers/sound/max98095.h	/^#define M98095_054_MIX_LINEOUT2	/;"	d
M98095_055_MIX_LINEOUT_CFG	drivers/sound/max98095.h	/^#define M98095_055_MIX_LINEOUT_CFG	/;"	d
M98095_056_LVL_SIDETONE_DAI12	drivers/sound/max98095.h	/^#define M98095_056_LVL_SIDETONE_DAI12	/;"	d
M98095_057_LVL_SIDETONE_DAI3	drivers/sound/max98095.h	/^#define M98095_057_LVL_SIDETONE_DAI3	/;"	d
M98095_058_LVL_DAI1_PLAY	drivers/sound/max98095.h	/^#define M98095_058_LVL_DAI1_PLAY	/;"	d
M98095_059_LVL_DAI1_EQ	drivers/sound/max98095.h	/^#define M98095_059_LVL_DAI1_EQ	/;"	d
M98095_05A_LVL_DAI2_PLAY	drivers/sound/max98095.h	/^#define M98095_05A_LVL_DAI2_PLAY	/;"	d
M98095_05B_LVL_DAI2_EQ	drivers/sound/max98095.h	/^#define M98095_05B_LVL_DAI2_EQ	/;"	d
M98095_05C_LVL_DAI3_PLAY	drivers/sound/max98095.h	/^#define M98095_05C_LVL_DAI3_PLAY	/;"	d
M98095_05D_LVL_ADC_L	drivers/sound/max98095.h	/^#define M98095_05D_LVL_ADC_L	/;"	d
M98095_05E_LVL_ADC_R	drivers/sound/max98095.h	/^#define M98095_05E_LVL_ADC_R	/;"	d
M98095_05F_LVL_MIC1	drivers/sound/max98095.h	/^#define M98095_05F_LVL_MIC1	/;"	d
M98095_060_LVL_MIC2	drivers/sound/max98095.h	/^#define M98095_060_LVL_MIC2	/;"	d
M98095_061_LVL_LINEIN	drivers/sound/max98095.h	/^#define M98095_061_LVL_LINEIN	/;"	d
M98095_062_LVL_LINEOUT1	drivers/sound/max98095.h	/^#define M98095_062_LVL_LINEOUT1	/;"	d
M98095_063_LVL_LINEOUT2	drivers/sound/max98095.h	/^#define M98095_063_LVL_LINEOUT2	/;"	d
M98095_064_LVL_HP_L	drivers/sound/max98095.h	/^#define M98095_064_LVL_HP_L	/;"	d
M98095_065_LVL_HP_R	drivers/sound/max98095.h	/^#define M98095_065_LVL_HP_R	/;"	d
M98095_066_LVL_RCV	drivers/sound/max98095.h	/^#define M98095_066_LVL_RCV	/;"	d
M98095_067_LVL_SPK_L	drivers/sound/max98095.h	/^#define M98095_067_LVL_SPK_L	/;"	d
M98095_068_LVL_SPK_R	drivers/sound/max98095.h	/^#define M98095_068_LVL_SPK_R	/;"	d
M98095_069_MICAGC_CFG	drivers/sound/max98095.h	/^#define M98095_069_MICAGC_CFG	/;"	d
M98095_06A_MICAGC_THRESH	drivers/sound/max98095.h	/^#define M98095_06A_MICAGC_THRESH	/;"	d
M98095_06B_SPK_NOISEGATE	drivers/sound/max98095.h	/^#define M98095_06B_SPK_NOISEGATE	/;"	d
M98095_06C_DAI1_ALC1_TIME	drivers/sound/max98095.h	/^#define M98095_06C_DAI1_ALC1_TIME	/;"	d
M98095_06D_DAI1_ALC1_COMP	drivers/sound/max98095.h	/^#define M98095_06D_DAI1_ALC1_COMP	/;"	d
M98095_06E_DAI1_ALC1_EXPN	drivers/sound/max98095.h	/^#define M98095_06E_DAI1_ALC1_EXPN	/;"	d
M98095_06F_DAI1_ALC1_GAIN	drivers/sound/max98095.h	/^#define M98095_06F_DAI1_ALC1_GAIN	/;"	d
M98095_070_DAI1_ALC2_TIME	drivers/sound/max98095.h	/^#define M98095_070_DAI1_ALC2_TIME	/;"	d
M98095_071_DAI1_ALC2_COMP	drivers/sound/max98095.h	/^#define M98095_071_DAI1_ALC2_COMP	/;"	d
M98095_072_DAI1_ALC2_EXPN	drivers/sound/max98095.h	/^#define M98095_072_DAI1_ALC2_EXPN	/;"	d
M98095_073_DAI1_ALC2_GAIN	drivers/sound/max98095.h	/^#define M98095_073_DAI1_ALC2_GAIN	/;"	d
M98095_074_DAI1_ALC3_TIME	drivers/sound/max98095.h	/^#define M98095_074_DAI1_ALC3_TIME	/;"	d
M98095_075_DAI1_ALC3_COMP	drivers/sound/max98095.h	/^#define M98095_075_DAI1_ALC3_COMP	/;"	d
M98095_076_DAI1_ALC3_EXPN	drivers/sound/max98095.h	/^#define M98095_076_DAI1_ALC3_EXPN	/;"	d
M98095_077_DAI1_ALC3_GAIN	drivers/sound/max98095.h	/^#define M98095_077_DAI1_ALC3_GAIN	/;"	d
M98095_078_DAI2_ALC1_TIME	drivers/sound/max98095.h	/^#define M98095_078_DAI2_ALC1_TIME	/;"	d
M98095_079_DAI2_ALC1_COMP	drivers/sound/max98095.h	/^#define M98095_079_DAI2_ALC1_COMP	/;"	d
M98095_07A_DAI2_ALC1_EXPN	drivers/sound/max98095.h	/^#define M98095_07A_DAI2_ALC1_EXPN	/;"	d
M98095_07B_DAI2_ALC1_GAIN	drivers/sound/max98095.h	/^#define M98095_07B_DAI2_ALC1_GAIN	/;"	d
M98095_07C_DAI2_ALC2_TIME	drivers/sound/max98095.h	/^#define M98095_07C_DAI2_ALC2_TIME	/;"	d
M98095_07D_DAI2_ALC2_COMP	drivers/sound/max98095.h	/^#define M98095_07D_DAI2_ALC2_COMP	/;"	d
M98095_07E_DAI2_ALC2_EXPN	drivers/sound/max98095.h	/^#define M98095_07E_DAI2_ALC2_EXPN	/;"	d
M98095_07F_DAI2_ALC2_GAIN	drivers/sound/max98095.h	/^#define M98095_07F_DAI2_ALC2_GAIN	/;"	d
M98095_080_DAI2_ALC3_TIME	drivers/sound/max98095.h	/^#define M98095_080_DAI2_ALC3_TIME	/;"	d
M98095_081_DAI2_ALC3_COMP	drivers/sound/max98095.h	/^#define M98095_081_DAI2_ALC3_COMP	/;"	d
M98095_082_DAI2_ALC3_EXPN	drivers/sound/max98095.h	/^#define M98095_082_DAI2_ALC3_EXPN	/;"	d
M98095_083_DAI2_ALC3_GAIN	drivers/sound/max98095.h	/^#define M98095_083_DAI2_ALC3_GAIN	/;"	d
M98095_084_HP_NOISE_GATE	drivers/sound/max98095.h	/^#define M98095_084_HP_NOISE_GATE	/;"	d
M98095_085_AUX_ADC	drivers/sound/max98095.h	/^#define M98095_085_AUX_ADC	/;"	d
M98095_086_CFG_LINE	drivers/sound/max98095.h	/^#define M98095_086_CFG_LINE	/;"	d
M98095_087_CFG_MIC	drivers/sound/max98095.h	/^#define M98095_087_CFG_MIC	/;"	d
M98095_088_CFG_LEVEL	drivers/sound/max98095.h	/^#define M98095_088_CFG_LEVEL	/;"	d
M98095_089_JACK_DET_AUTO	drivers/sound/max98095.h	/^#define M98095_089_JACK_DET_AUTO	/;"	d
M98095_08A_JACK_DET_MANUAL	drivers/sound/max98095.h	/^#define M98095_08A_JACK_DET_MANUAL	/;"	d
M98095_08B_JACK_KEYSCAN_DBC	drivers/sound/max98095.h	/^#define M98095_08B_JACK_KEYSCAN_DBC	/;"	d
M98095_08C_JACK_KEYSCAN_DLY	drivers/sound/max98095.h	/^#define M98095_08C_JACK_KEYSCAN_DLY	/;"	d
M98095_08D_JACK_KEY_THRESH	drivers/sound/max98095.h	/^#define M98095_08D_JACK_KEY_THRESH	/;"	d
M98095_08E_JACK_DC_SLEW	drivers/sound/max98095.h	/^#define M98095_08E_JACK_DC_SLEW	/;"	d
M98095_08F_JACK_TEST_CFG	drivers/sound/max98095.h	/^#define M98095_08F_JACK_TEST_CFG	/;"	d
M98095_090_PWR_EN_IN	drivers/sound/max98095.h	/^#define M98095_090_PWR_EN_IN	/;"	d
M98095_091_PWR_EN_OUT	drivers/sound/max98095.h	/^#define M98095_091_PWR_EN_OUT	/;"	d
M98095_092_PWR_EN_OUT	drivers/sound/max98095.h	/^#define M98095_092_PWR_EN_OUT	/;"	d
M98095_093_BIAS_CTRL	drivers/sound/max98095.h	/^#define M98095_093_BIAS_CTRL	/;"	d
M98095_094_PWR_DAC_21	drivers/sound/max98095.h	/^#define M98095_094_PWR_DAC_21	/;"	d
M98095_095_PWR_DAC_03	drivers/sound/max98095.h	/^#define M98095_095_PWR_DAC_03	/;"	d
M98095_096_PWR_DAC_CK	drivers/sound/max98095.h	/^#define M98095_096_PWR_DAC_CK	/;"	d
M98095_097_PWR_SYS	drivers/sound/max98095.h	/^#define M98095_097_PWR_SYS	/;"	d
M98095_0FF_REV_ID	drivers/sound/max98095.h	/^#define M98095_0FF_REV_ID	/;"	d
M98095_110_DAI1_EQ_BASE	drivers/sound/max98095.h	/^#define M98095_110_DAI1_EQ_BASE	/;"	d
M98095_142_DAI2_EQ_BASE	drivers/sound/max98095.h	/^#define M98095_142_DAI2_EQ_BASE	/;"	d
M98095_174_DAI1_BQ_BASE	drivers/sound/max98095.h	/^#define M98095_174_DAI1_BQ_BASE	/;"	d
M98095_17E_DAI2_BQ_BASE	drivers/sound/max98095.h	/^#define M98095_17E_DAI2_BQ_BASE	/;"	d
M98095_ADLEN	drivers/sound/max98095.h	/^#define M98095_ADLEN	/;"	d
M98095_ADREN	drivers/sound/max98095.h	/^#define M98095_ADREN	/;"	d
M98095_BQ1EN	drivers/sound/max98095.h	/^#define M98095_BQ1EN	/;"	d
M98095_BQ2EN	drivers/sound/max98095.h	/^#define M98095_BQ2EN	/;"	d
M98095_CLKMODE_MASK	drivers/sound/max98095.h	/^#define M98095_CLKMODE_MASK	/;"	d
M98095_COEFS_PER_BAND	drivers/sound/max98095.h	/^#define M98095_COEFS_PER_BAND	/;"	d
M98095_DAI1L_TO_DACL	drivers/sound/max98095.h	/^#define M98095_DAI1L_TO_DACL	/;"	d
M98095_DAI1L_TO_DACM	drivers/sound/max98095.h	/^#define M98095_DAI1L_TO_DACM	/;"	d
M98095_DAI1L_TO_DACR	drivers/sound/max98095.h	/^#define M98095_DAI1L_TO_DACR	/;"	d
M98095_DAI1R_TO_DACL	drivers/sound/max98095.h	/^#define M98095_DAI1R_TO_DACL	/;"	d
M98095_DAI1R_TO_DACM	drivers/sound/max98095.h	/^#define M98095_DAI1R_TO_DACM	/;"	d
M98095_DAI1R_TO_DACR	drivers/sound/max98095.h	/^#define M98095_DAI1R_TO_DACR	/;"	d
M98095_DAI2M_TO_DACL	drivers/sound/max98095.h	/^#define M98095_DAI2M_TO_DACL	/;"	d
M98095_DAI2M_TO_DACM	drivers/sound/max98095.h	/^#define M98095_DAI2M_TO_DACM	/;"	d
M98095_DAI2M_TO_DACR	drivers/sound/max98095.h	/^#define M98095_DAI2M_TO_DACR	/;"	d
M98095_DAI3M_TO_DACL	drivers/sound/max98095.h	/^#define M98095_DAI3M_TO_DACL	/;"	d
M98095_DAI3M_TO_DACM	drivers/sound/max98095.h	/^#define M98095_DAI3M_TO_DACM	/;"	d
M98095_DAI_BCI	drivers/sound/max98095.h	/^#define M98095_DAI_BCI	/;"	d
M98095_DAI_BSEL64	drivers/sound/max98095.h	/^#define M98095_DAI_BSEL64	/;"	d
M98095_DAI_DHF	drivers/sound/max98095.h	/^#define M98095_DAI_DHF	/;"	d
M98095_DAI_DLY	drivers/sound/max98095.h	/^#define M98095_DAI_DLY	/;"	d
M98095_DAI_DOSR_DIV2	drivers/sound/max98095.h	/^#define M98095_DAI_DOSR_DIV2	/;"	d
M98095_DAI_DOSR_DIV4	drivers/sound/max98095.h	/^#define M98095_DAI_DOSR_DIV4	/;"	d
M98095_DAI_FSW	drivers/sound/max98095.h	/^#define M98095_DAI_FSW	/;"	d
M98095_DAI_MAS	drivers/sound/max98095.h	/^#define M98095_DAI_MAS	/;"	d
M98095_DAI_TDM	drivers/sound/max98095.h	/^#define M98095_DAI_TDM	/;"	d
M98095_DAI_WCI	drivers/sound/max98095.h	/^#define M98095_DAI_WCI	/;"	d
M98095_DAI_WS	drivers/sound/max98095.h	/^#define M98095_DAI_WS	/;"	d
M98095_DALEN	drivers/sound/max98095.h	/^#define M98095_DALEN	/;"	d
M98095_DAREN	drivers/sound/max98095.h	/^#define M98095_DAREN	/;"	d
M98095_DIGMIC2L	drivers/sound/max98095.h	/^#define M98095_DIGMIC2L	/;"	d
M98095_DIGMIC2R	drivers/sound/max98095.h	/^#define M98095_DIGMIC2R	/;"	d
M98095_DIGMIC_L	drivers/sound/max98095.h	/^#define M98095_DIGMIC_L	/;"	d
M98095_DIGMIC_R	drivers/sound/max98095.h	/^#define M98095_DIGMIC_R	/;"	d
M98095_DSPNORMAL	drivers/sound/max98095.h	/^#define M98095_DSPNORMAL	/;"	d
M98095_EQ1EN	drivers/sound/max98095.h	/^#define M98095_EQ1EN	/;"	d
M98095_EQ2EN	drivers/sound/max98095.h	/^#define M98095_EQ2EN	/;"	d
M98095_HPLEN	drivers/sound/max98095.h	/^#define M98095_HPLEN	/;"	d
M98095_HPNORMAL	drivers/sound/max98095.h	/^#define M98095_HPNORMAL	/;"	d
M98095_HPPLYBACK	drivers/sound/max98095.h	/^#define M98095_HPPLYBACK	/;"	d
M98095_HPREN	drivers/sound/max98095.h	/^#define M98095_HPREN	/;"	d
M98095_HP_MUTE	drivers/sound/max98095.h	/^#define M98095_HP_MUTE	/;"	d
M98095_INEN	drivers/sound/max98095.h	/^#define M98095_INEN	/;"	d
M98095_MB1EN	drivers/sound/max98095.h	/^#define M98095_MB1EN	/;"	d
M98095_MB2EN	drivers/sound/max98095.h	/^#define M98095_MB2EN	/;"	d
M98095_MBEN	drivers/sound/max98095.h	/^#define M98095_MBEN	/;"	d
M98095_MDLLEN	drivers/sound/max98095.h	/^#define M98095_MDLLEN	/;"	d
M98095_MICPRE_MASK	drivers/sound/max98095.h	/^#define M98095_MICPRE_MASK	/;"	d
M98095_MICPRE_SHIFT	drivers/sound/max98095.h	/^#define M98095_MICPRE_SHIFT	/;"	d
M98095_MICSEL_MASK	drivers/sound/max98095.h	/^#define M98095_MICSEL_MASK	/;"	d
M98095_PERFMODE	drivers/sound/max98095.h	/^#define M98095_PERFMODE	/;"	d
M98095_PWRSV	drivers/sound/max98095.h	/^#define M98095_PWRSV	/;"	d
M98095_PWRSV8K	drivers/sound/max98095.h	/^#define M98095_PWRSV8K	/;"	d
M98095_RECEN	drivers/sound/max98095.h	/^#define M98095_RECEN	/;"	d
M98095_REC_MUTE	drivers/sound/max98095.h	/^#define M98095_REC_MUTE	/;"	d
M98095_REG_CNT	drivers/sound/max98095.h	/^#define M98095_REG_CNT	/;"	d
M98095_REG_MAX_CACHED	drivers/sound/max98095.h	/^#define M98095_REG_MAX_CACHED	/;"	d
M98095_S1NORMAL	drivers/sound/max98095.h	/^#define M98095_S1NORMAL	/;"	d
M98095_S2NORMAL	drivers/sound/max98095.h	/^#define M98095_S2NORMAL	/;"	d
M98095_S3NORMAL	drivers/sound/max98095.h	/^#define M98095_S3NORMAL	/;"	d
M98095_SDATA	drivers/sound/max98095.h	/^#define M98095_SDATA	/;"	d
M98095_SEG	drivers/sound/max98095.h	/^#define M98095_SEG	/;"	d
M98095_SHDNRUN	drivers/sound/max98095.h	/^#define M98095_SHDNRUN	/;"	d
M98095_SPK_FIXEDSPECTRUM	drivers/sound/max98095.h	/^#define M98095_SPK_FIXEDSPECTRUM	/;"	d
M98095_SPK_SPREADSPECTRUM	drivers/sound/max98095.h	/^#define M98095_SPK_SPREADSPECTRUM	/;"	d
M98095_SPLEN	drivers/sound/max98095.h	/^#define M98095_SPLEN	/;"	d
M98095_SPREN	drivers/sound/max98095.h	/^#define M98095_SPREN	/;"	d
M98095_SP_MUTE	drivers/sound/max98095.h	/^#define M98095_SP_MUTE	/;"	d
M98095_VSEN	drivers/sound/max98095.h	/^#define M98095_VSEN	/;"	d
M98095_XTEN	drivers/sound/max98095.h	/^#define M98095_XTEN	/;"	d
M98095_ZDEN	drivers/sound/max98095.h	/^#define M98095_ZDEN	/;"	d
MA	include/sym53c8xx.h	/^  #define   MA /;"	d
MAC	drivers/dma/MCD_dmaApi.c	/^#define MAC	/;"	d	file:
MAC	examples/standalone/smc91111_eeprom.c	/^#define MAC	/;"	d	file:
MAC0	drivers/net/rtl8139.c	/^	MAC0=0,			\/* Ethernet hardware address. *\/$/;"	e	enum:RTL8139_registers	file:
MAC0	drivers/net/rtl8169.c	/^	MAC0 = 0,		\/* Ethernet hardware address. *\/$/;"	e	enum:RTL8169_registers	file:
MAC0_ENABLE	arch/mips/mach-au1x00/au1x00_eth.c	/^#define MAC0_ENABLE /;"	d	file:
MAC0_RX_DMA_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC0_RX_DMA_ADDR /;"	d
MAC0_TX_DMA_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC0_TX_DMA_ADDR /;"	d
MAC1	board/vscom/baltos/board.h	/^	uint8_t MAC1[6];        \/\/ internal EMAC$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint8_t[6]
MAC1_PASS_ALL_RX_FRAMES	drivers/net/lpc32xx_eth.c	/^#define MAC1_PASS_ALL_RX_FRAMES /;"	d	file:
MAC1_RECV_ENABLE	drivers/net/lpc32xx_eth.c	/^#define MAC1_RECV_ENABLE /;"	d	file:
MAC1_RESETS	drivers/net/lpc32xx_eth.c	/^#define MAC1_RESETS /;"	d	file:
MAC1_RX_DMA_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC1_RX_DMA_ADDR /;"	d
MAC1_SOFT_RESET	drivers/net/lpc32xx_eth.c	/^#define MAC1_SOFT_RESET /;"	d	file:
MAC1_TX_DMA_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC1_TX_DMA_ADDR /;"	d
MAC2	board/vscom/baltos/board.h	/^	uint8_t MAC2[6];        \/\/ SMSC9514$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint8_t[6]
MAC2_CRC_ENABLE	drivers/net/lpc32xx_eth.c	/^#define MAC2_CRC_ENABLE /;"	d	file:
MAC2_FULL_DUPLEX	drivers/net/lpc32xx_eth.c	/^#define MAC2_FULL_DUPLEX /;"	d	file:
MAC2_PAD_CRC_ENABLE	drivers/net/lpc32xx_eth.c	/^#define MAC2_PAD_CRC_ENABLE /;"	d	file:
MAC3	board/vscom/baltos/board.h	/^	uint8_t MAC3[6];        \/\/ WL1271 WLAN$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint8_t[6]
MACADDRHI	drivers/net/davinci_emac.h	/^	dv_reg		MACADDRHI;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACADDRLO	drivers/net/davinci_emac.h	/^	dv_reg		MACADDRLO;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACB_ALE	drivers/net/macb.h	/^#define MACB_ALE	/;"	d
MACB_ARP_OFFSET	drivers/net/macb.h	/^#define MACB_ARP_OFFSET	/;"	d
MACB_ARP_SIZE	drivers/net/macb.h	/^#define MACB_ARP_SIZE	/;"	d
MACB_AUTONEG_TIMEOUT	drivers/net/macb.c	/^#define MACB_AUTONEG_TIMEOUT	/;"	d	file:
MACB_BEX_OFFSET	drivers/net/macb.h	/^#define MACB_BEX_OFFSET	/;"	d
MACB_BEX_SIZE	drivers/net/macb.h	/^#define MACB_BEX_SIZE	/;"	d
MACB_BF	drivers/net/macb.h	/^#define MACB_BF(/;"	d
MACB_BFEXT	drivers/net/macb.h	/^#define MACB_BFEXT(/;"	d
MACB_BFINS	drivers/net/macb.h	/^#define MACB_BFINS(/;"	d
MACB_BIG_OFFSET	drivers/net/macb.h	/^#define MACB_BIG_OFFSET	/;"	d
MACB_BIG_SIZE	drivers/net/macb.h	/^#define MACB_BIG_SIZE	/;"	d
MACB_BIT	drivers/net/macb.h	/^#define MACB_BIT(/;"	d
MACB_BIT_RATE_OFFSET	drivers/net/macb.h	/^#define MACB_BIT_RATE_OFFSET	/;"	d
MACB_BIT_RATE_SIZE	drivers/net/macb.h	/^#define MACB_BIT_RATE_SIZE	/;"	d
MACB_BNA_OFFSET	drivers/net/macb.h	/^#define MACB_BNA_OFFSET	/;"	d
MACB_BNA_SIZE	drivers/net/macb.h	/^#define MACB_BNA_SIZE	/;"	d
MACB_BP_OFFSET	drivers/net/macb.h	/^#define MACB_BP_OFFSET	/;"	d
MACB_BP_SIZE	drivers/net/macb.h	/^#define MACB_BP_SIZE	/;"	d
MACB_CAF_OFFSET	drivers/net/macb.h	/^#define MACB_CAF_OFFSET	/;"	d
MACB_CAF_SIZE	drivers/net/macb.h	/^#define MACB_CAF_SIZE	/;"	d
MACB_CLKEN_OFFSET	drivers/net/macb.h	/^#define MACB_CLKEN_OFFSET	/;"	d
MACB_CLKEN_SIZE	drivers/net/macb.h	/^#define MACB_CLKEN_SIZE	/;"	d
MACB_CLK_DIV16	drivers/net/macb.h	/^#define MACB_CLK_DIV16	/;"	d
MACB_CLK_DIV32	drivers/net/macb.h	/^#define MACB_CLK_DIV32	/;"	d
MACB_CLK_DIV64	drivers/net/macb.h	/^#define MACB_CLK_DIV64	/;"	d
MACB_CLK_DIV8	drivers/net/macb.h	/^#define MACB_CLK_DIV8	/;"	d
MACB_CLK_OFFSET	drivers/net/macb.h	/^#define MACB_CLK_OFFSET	/;"	d
MACB_CLK_SIZE	drivers/net/macb.h	/^#define MACB_CLK_SIZE	/;"	d
MACB_CLRSTAT_OFFSET	drivers/net/macb.h	/^#define MACB_CLRSTAT_OFFSET	/;"	d
MACB_CLRSTAT_SIZE	drivers/net/macb.h	/^#define MACB_CLRSTAT_SIZE	/;"	d
MACB_CODE_OFFSET	drivers/net/macb.h	/^#define MACB_CODE_OFFSET	/;"	d
MACB_CODE_SIZE	drivers/net/macb.h	/^#define MACB_CODE_SIZE	/;"	d
MACB_COL_OFFSET	drivers/net/macb.h	/^#define MACB_COL_OFFSET	/;"	d
MACB_COL_SIZE	drivers/net/macb.h	/^#define MACB_COL_SIZE	/;"	d
MACB_COMP_OFFSET	drivers/net/macb.h	/^#define MACB_COMP_OFFSET	/;"	d
MACB_COMP_SIZE	drivers/net/macb.h	/^#define MACB_COMP_SIZE	/;"	d
MACB_CSE	drivers/net/macb.h	/^#define MACB_CSE	/;"	d
MACB_DATA_OFFSET	drivers/net/macb.h	/^#define MACB_DATA_OFFSET	/;"	d
MACB_DATA_SIZE	drivers/net/macb.h	/^#define MACB_DATA_SIZE	/;"	d
MACB_DRFCS_OFFSET	drivers/net/macb.h	/^#define MACB_DRFCS_OFFSET	/;"	d
MACB_DRFCS_SIZE	drivers/net/macb.h	/^#define MACB_DRFCS_SIZE	/;"	d
MACB_DTF	drivers/net/macb.h	/^#define MACB_DTF	/;"	d
MACB_EAE_OFFSET	drivers/net/macb.h	/^#define MACB_EAE_OFFSET	/;"	d
MACB_EAE_SIZE	drivers/net/macb.h	/^#define MACB_EAE_SIZE	/;"	d
MACB_EAM_OFFSET	drivers/net/macb.h	/^#define MACB_EAM_OFFSET	/;"	d
MACB_EAM_SIZE	drivers/net/macb.h	/^#define MACB_EAM_SIZE	/;"	d
MACB_EFRHD_OFFSET	drivers/net/macb.h	/^#define MACB_EFRHD_OFFSET	/;"	d
MACB_EFRHD_SIZE	drivers/net/macb.h	/^#define MACB_EFRHD_SIZE	/;"	d
MACB_ELE	drivers/net/macb.h	/^#define MACB_ELE	/;"	d
MACB_EXCOL	drivers/net/macb.h	/^#define MACB_EXCOL	/;"	d
MACB_FCSE	drivers/net/macb.h	/^#define MACB_FCSE	/;"	d
MACB_FD_OFFSET	drivers/net/macb.h	/^#define MACB_FD_OFFSET	/;"	d
MACB_FD_SIZE	drivers/net/macb.h	/^#define MACB_FD_SIZE	/;"	d
MACB_FRO	drivers/net/macb.h	/^#define MACB_FRO	/;"	d
MACB_FTO	drivers/net/macb.h	/^#define MACB_FTO	/;"	d
MACB_HRB	drivers/net/macb.h	/^#define MACB_HRB	/;"	d
MACB_HRESP_OFFSET	drivers/net/macb.h	/^#define MACB_HRESP_OFFSET	/;"	d
MACB_HRESP_SIZE	drivers/net/macb.h	/^#define MACB_HRESP_SIZE	/;"	d
MACB_HRT	drivers/net/macb.h	/^#define MACB_HRT	/;"	d
MACB_IDLE_OFFSET	drivers/net/macb.h	/^#define MACB_IDLE_OFFSET	/;"	d
MACB_IDLE_SIZE	drivers/net/macb.h	/^#define MACB_IDLE_SIZE	/;"	d
MACB_IDNUM_OFFSET	drivers/net/macb.h	/^#define MACB_IDNUM_OFFSET	/;"	d
MACB_IDNUM_SIZE	drivers/net/macb.h	/^#define MACB_IDNUM_SIZE	/;"	d
MACB_IDR	drivers/net/macb.h	/^#define MACB_IDR	/;"	d
MACB_IER	drivers/net/macb.h	/^#define MACB_IER	/;"	d
MACB_IMR	drivers/net/macb.h	/^#define MACB_IMR	/;"	d
MACB_INCSTAT_OFFSET	drivers/net/macb.h	/^#define MACB_INCSTAT_OFFSET	/;"	d
MACB_INCSTAT_SIZE	drivers/net/macb.h	/^#define MACB_INCSTAT_SIZE	/;"	d
MACB_IP_OFFSET	drivers/net/macb.h	/^#define MACB_IP_OFFSET	/;"	d
MACB_IP_SIZE	drivers/net/macb.h	/^#define MACB_IP_SIZE	/;"	d
MACB_IRXFCS_OFFSET	drivers/net/macb.h	/^#define MACB_IRXFCS_OFFSET	/;"	d
MACB_IRXFCS_SIZE	drivers/net/macb.h	/^#define MACB_IRXFCS_SIZE	/;"	d
MACB_ISR	drivers/net/macb.h	/^#define MACB_ISR	/;"	d
MACB_ISR_LINK_OFFSET	drivers/net/macb.h	/^#define MACB_ISR_LINK_OFFSET	/;"	d
MACB_ISR_LINK_SIZE	drivers/net/macb.h	/^#define MACB_ISR_LINK_SIZE	/;"	d
MACB_ISR_RLE_OFFSET	drivers/net/macb.h	/^#define MACB_ISR_RLE_OFFSET	/;"	d
MACB_ISR_RLE_SIZE	drivers/net/macb.h	/^#define MACB_ISR_RLE_SIZE	/;"	d
MACB_ISR_ROVR_OFFSET	drivers/net/macb.h	/^#define MACB_ISR_ROVR_OFFSET	/;"	d
MACB_ISR_ROVR_SIZE	drivers/net/macb.h	/^#define MACB_ISR_ROVR_SIZE	/;"	d
MACB_ISR_TUND_OFFSET	drivers/net/macb.h	/^#define MACB_ISR_TUND_OFFSET	/;"	d
MACB_ISR_TUND_SIZE	drivers/net/macb.h	/^#define MACB_ISR_TUND_SIZE	/;"	d
MACB_JFRAME_OFFSET	drivers/net/macb.h	/^#define MACB_JFRAME_OFFSET	/;"	d
MACB_JFRAME_SIZE	drivers/net/macb.h	/^#define MACB_JFRAME_SIZE	/;"	d
MACB_LB_OFFSET	drivers/net/macb.h	/^#define MACB_LB_OFFSET	/;"	d
MACB_LB_SIZE	drivers/net/macb.h	/^#define MACB_LB_SIZE	/;"	d
MACB_LCOL	drivers/net/macb.h	/^#define MACB_LCOL	/;"	d
MACB_LLB_OFFSET	drivers/net/macb.h	/^#define MACB_LLB_OFFSET	/;"	d
MACB_LLB_SIZE	drivers/net/macb.h	/^#define MACB_LLB_SIZE	/;"	d
MACB_MAG_OFFSET	drivers/net/macb.h	/^#define MACB_MAG_OFFSET	/;"	d
MACB_MAG_SIZE	drivers/net/macb.h	/^#define MACB_MAG_SIZE	/;"	d
MACB_MAN	drivers/net/macb.h	/^#define MACB_MAN	/;"	d
MACB_MAN_CODE	drivers/net/macb.h	/^#define MACB_MAN_CODE	/;"	d
MACB_MAN_READ	drivers/net/macb.h	/^#define MACB_MAN_READ	/;"	d
MACB_MAN_SOF	drivers/net/macb.h	/^#define MACB_MAN_SOF	/;"	d
MACB_MAN_WRITE	drivers/net/macb.h	/^#define MACB_MAN_WRITE	/;"	d
MACB_MAX_QUEUES	drivers/net/macb.h	/^#define MACB_MAX_QUEUES	/;"	d
MACB_MCF	drivers/net/macb.h	/^#define MACB_MCF	/;"	d
MACB_MDIO_OFFSET	drivers/net/macb.h	/^#define MACB_MDIO_OFFSET	/;"	d
MACB_MDIO_SIZE	drivers/net/macb.h	/^#define MACB_MDIO_SIZE	/;"	d
MACB_MFD_OFFSET	drivers/net/macb.h	/^#define MACB_MFD_OFFSET	/;"	d
MACB_MFD_SIZE	drivers/net/macb.h	/^#define MACB_MFD_SIZE	/;"	d
MACB_MID	drivers/net/macb.h	/^#define MACB_MID	/;"	d
MACB_MII_OFFSET	drivers/net/macb.h	/^#define MACB_MII_OFFSET	/;"	d
MACB_MII_SIZE	drivers/net/macb.h	/^#define MACB_MII_SIZE	/;"	d
MACB_MPE_OFFSET	drivers/net/macb.h	/^#define MACB_MPE_OFFSET	/;"	d
MACB_MPE_SIZE	drivers/net/macb.h	/^#define MACB_MPE_SIZE	/;"	d
MACB_NBC_OFFSET	drivers/net/macb.h	/^#define MACB_NBC_OFFSET	/;"	d
MACB_NBC_SIZE	drivers/net/macb.h	/^#define MACB_NBC_SIZE	/;"	d
MACB_NCFGR	drivers/net/macb.h	/^#define MACB_NCFGR	/;"	d
MACB_NCFGR_MTI_OFFSET	drivers/net/macb.h	/^#define MACB_NCFGR_MTI_OFFSET	/;"	d
MACB_NCFGR_MTI_SIZE	drivers/net/macb.h	/^#define MACB_NCFGR_MTI_SIZE	/;"	d
MACB_NCR	drivers/net/macb.h	/^#define MACB_NCR	/;"	d
MACB_NCR_TPF_OFFSET	drivers/net/macb.h	/^#define MACB_NCR_TPF_OFFSET	/;"	d
MACB_NCR_TPF_SIZE	drivers/net/macb.h	/^#define MACB_NCR_TPF_SIZE	/;"	d
MACB_NSR	drivers/net/macb.h	/^#define MACB_NSR	/;"	d
MACB_NSR_LINK_OFFSET	drivers/net/macb.h	/^#define MACB_NSR_LINK_OFFSET	/;"	d
MACB_NSR_LINK_SIZE	drivers/net/macb.h	/^#define MACB_NSR_LINK_SIZE	/;"	d
MACB_OVR_OFFSET	drivers/net/macb.h	/^#define MACB_OVR_OFFSET	/;"	d
MACB_OVR_SIZE	drivers/net/macb.h	/^#define MACB_OVR_SIZE	/;"	d
MACB_PAE_OFFSET	drivers/net/macb.h	/^#define MACB_PAE_OFFSET	/;"	d
MACB_PAE_SIZE	drivers/net/macb.h	/^#define MACB_PAE_SIZE	/;"	d
MACB_PFR	drivers/net/macb.h	/^#define MACB_PFR	/;"	d
MACB_PFR_OFFSET	drivers/net/macb.h	/^#define MACB_PFR_OFFSET	/;"	d
MACB_PFR_SIZE	drivers/net/macb.h	/^#define MACB_PFR_SIZE	/;"	d
MACB_PHYA_OFFSET	drivers/net/macb.h	/^#define MACB_PHYA_OFFSET	/;"	d
MACB_PHYA_SIZE	drivers/net/macb.h	/^#define MACB_PHYA_SIZE	/;"	d
MACB_PTR	drivers/net/macb.h	/^#define MACB_PTR	/;"	d
MACB_PTZ_OFFSET	drivers/net/macb.h	/^#define MACB_PTZ_OFFSET	/;"	d
MACB_PTZ_SIZE	drivers/net/macb.h	/^#define MACB_PTZ_SIZE	/;"	d
MACB_RBOF_OFFSET	drivers/net/macb.h	/^#define MACB_RBOF_OFFSET	/;"	d
MACB_RBOF_SIZE	drivers/net/macb.h	/^#define MACB_RBOF_SIZE	/;"	d
MACB_RBQP	drivers/net/macb.h	/^#define MACB_RBQP	/;"	d
MACB_RCOMP_OFFSET	drivers/net/macb.h	/^#define MACB_RCOMP_OFFSET	/;"	d
MACB_RCOMP_SIZE	drivers/net/macb.h	/^#define MACB_RCOMP_SIZE	/;"	d
MACB_REC_OFFSET	drivers/net/macb.h	/^#define MACB_REC_OFFSET	/;"	d
MACB_REC_SIZE	drivers/net/macb.h	/^#define MACB_REC_SIZE	/;"	d
MACB_REGA_OFFSET	drivers/net/macb.h	/^#define MACB_REGA_OFFSET	/;"	d
MACB_REGA_SIZE	drivers/net/macb.h	/^#define MACB_REGA_SIZE	/;"	d
MACB_RE_OFFSET	drivers/net/macb.h	/^#define MACB_RE_OFFSET	/;"	d
MACB_RE_SIZE	drivers/net/macb.h	/^#define MACB_RE_SIZE	/;"	d
MACB_RJA	drivers/net/macb.h	/^#define MACB_RJA	/;"	d
MACB_RLCE_OFFSET	drivers/net/macb.h	/^#define MACB_RLCE_OFFSET	/;"	d
MACB_RLCE_SIZE	drivers/net/macb.h	/^#define MACB_RLCE_SIZE	/;"	d
MACB_RLE	drivers/net/macb.h	/^#define MACB_RLE	/;"	d
MACB_RMII_OFFSET	drivers/net/macb.h	/^#define MACB_RMII_OFFSET	/;"	d
MACB_RMII_SIZE	drivers/net/macb.h	/^#define MACB_RMII_SIZE	/;"	d
MACB_ROVR	drivers/net/macb.h	/^#define MACB_ROVR	/;"	d
MACB_RRE	drivers/net/macb.h	/^#define MACB_RRE	/;"	d
MACB_RSE	drivers/net/macb.h	/^#define MACB_RSE	/;"	d
MACB_RSR	drivers/net/macb.h	/^#define MACB_RSR	/;"	d
MACB_RTY_OFFSET	drivers/net/macb.h	/^#define MACB_RTY_OFFSET	/;"	d
MACB_RTY_SIZE	drivers/net/macb.h	/^#define MACB_RTY_SIZE	/;"	d
MACB_RW_OFFSET	drivers/net/macb.h	/^#define MACB_RW_OFFSET	/;"	d
MACB_RW_SIZE	drivers/net/macb.h	/^#define MACB_RW_SIZE	/;"	d
MACB_RXUBR_OFFSET	drivers/net/macb.h	/^#define MACB_RXUBR_OFFSET	/;"	d
MACB_RXUBR_SIZE	drivers/net/macb.h	/^#define MACB_RXUBR_SIZE	/;"	d
MACB_RX_BUFFER_SIZE	drivers/net/macb.c	/^#define MACB_RX_BUFFER_SIZE	/;"	d	file:
MACB_RX_DMA_DESC_SIZE	drivers/net/macb.c	/^#define MACB_RX_DMA_DESC_SIZE	/;"	d	file:
MACB_RX_RING_SIZE	drivers/net/macb.c	/^#define MACB_RX_RING_SIZE	/;"	d	file:
MACB_SA1B	drivers/net/macb.h	/^#define MACB_SA1B	/;"	d
MACB_SA1T	drivers/net/macb.h	/^#define MACB_SA1T	/;"	d
MACB_SA1_OFFSET	drivers/net/macb.h	/^#define MACB_SA1_OFFSET	/;"	d
MACB_SA1_SIZE	drivers/net/macb.h	/^#define MACB_SA1_SIZE	/;"	d
MACB_SA2B	drivers/net/macb.h	/^#define MACB_SA2B	/;"	d
MACB_SA2T	drivers/net/macb.h	/^#define MACB_SA2T	/;"	d
MACB_SA3B	drivers/net/macb.h	/^#define MACB_SA3B	/;"	d
MACB_SA3T	drivers/net/macb.h	/^#define MACB_SA3T	/;"	d
MACB_SA4B	drivers/net/macb.h	/^#define MACB_SA4B	/;"	d
MACB_SA4T	drivers/net/macb.h	/^#define MACB_SA4T	/;"	d
MACB_SCF	drivers/net/macb.h	/^#define MACB_SCF	/;"	d
MACB_SOF_OFFSET	drivers/net/macb.h	/^#define MACB_SOF_OFFSET	/;"	d
MACB_SOF_SIZE	drivers/net/macb.h	/^#define MACB_SOF_SIZE	/;"	d
MACB_SPD_OFFSET	drivers/net/macb.h	/^#define MACB_SPD_OFFSET	/;"	d
MACB_SPD_SIZE	drivers/net/macb.h	/^#define MACB_SPD_SIZE	/;"	d
MACB_STE	drivers/net/macb.h	/^#define MACB_STE	/;"	d
MACB_TBQP	drivers/net/macb.h	/^#define MACB_TBQP	/;"	d
MACB_TCOMP_OFFSET	drivers/net/macb.h	/^#define MACB_TCOMP_OFFSET	/;"	d
MACB_TCOMP_SIZE	drivers/net/macb.h	/^#define MACB_TCOMP_SIZE	/;"	d
MACB_TE_OFFSET	drivers/net/macb.h	/^#define MACB_TE_OFFSET	/;"	d
MACB_TE_SIZE	drivers/net/macb.h	/^#define MACB_TE_SIZE	/;"	d
MACB_TGO_OFFSET	drivers/net/macb.h	/^#define MACB_TGO_OFFSET	/;"	d
MACB_TGO_SIZE	drivers/net/macb.h	/^#define MACB_TGO_SIZE	/;"	d
MACB_THALT_OFFSET	drivers/net/macb.h	/^#define MACB_THALT_OFFSET	/;"	d
MACB_THALT_SIZE	drivers/net/macb.h	/^#define MACB_THALT_SIZE	/;"	d
MACB_TID	drivers/net/macb.h	/^#define MACB_TID	/;"	d
MACB_TPF	drivers/net/macb.h	/^#define MACB_TPF	/;"	d
MACB_TPQ	drivers/net/macb.h	/^#define MACB_TPQ	/;"	d
MACB_TSR	drivers/net/macb.h	/^#define MACB_TSR	/;"	d
MACB_TSR_RLE_OFFSET	drivers/net/macb.h	/^#define MACB_TSR_RLE_OFFSET	/;"	d
MACB_TSR_RLE_SIZE	drivers/net/macb.h	/^#define MACB_TSR_RLE_SIZE	/;"	d
MACB_TSTART_OFFSET	drivers/net/macb.h	/^#define MACB_TSTART_OFFSET	/;"	d
MACB_TSTART_SIZE	drivers/net/macb.h	/^#define MACB_TSTART_SIZE	/;"	d
MACB_TUND	drivers/net/macb.h	/^#define MACB_TUND	/;"	d
MACB_TXERR_OFFSET	drivers/net/macb.h	/^#define MACB_TXERR_OFFSET	/;"	d
MACB_TXERR_SIZE	drivers/net/macb.h	/^#define MACB_TXERR_SIZE	/;"	d
MACB_TXUBR_OFFSET	drivers/net/macb.h	/^#define MACB_TXUBR_OFFSET	/;"	d
MACB_TXUBR_SIZE	drivers/net/macb.h	/^#define MACB_TXUBR_SIZE	/;"	d
MACB_TX_DMA_DESC_SIZE	drivers/net/macb.c	/^#define MACB_TX_DMA_DESC_SIZE	/;"	d	file:
MACB_TX_DUMMY_DMA_DESC_SIZE	drivers/net/macb.c	/^#define MACB_TX_DUMMY_DMA_DESC_SIZE	/;"	d	file:
MACB_TX_PAUSE_OFFSET	drivers/net/macb.h	/^#define MACB_TX_PAUSE_OFFSET	/;"	d
MACB_TX_PAUSE_SIZE	drivers/net/macb.h	/^#define MACB_TX_PAUSE_SIZE	/;"	d
MACB_TX_PAUSE_ZERO_OFFSET	drivers/net/macb.h	/^#define MACB_TX_PAUSE_ZERO_OFFSET	/;"	d
MACB_TX_PAUSE_ZERO_SIZE	drivers/net/macb.h	/^#define MACB_TX_PAUSE_ZERO_SIZE	/;"	d
MACB_TX_RING_SIZE	drivers/net/macb.c	/^#define MACB_TX_RING_SIZE	/;"	d	file:
MACB_TX_TIMEOUT	drivers/net/macb.c	/^#define MACB_TX_TIMEOUT	/;"	d	file:
MACB_TZQ_OFFSET	drivers/net/macb.h	/^#define MACB_TZQ_OFFSET	/;"	d
MACB_TZQ_SIZE	drivers/net/macb.h	/^#define MACB_TZQ_SIZE	/;"	d
MACB_UBR_OFFSET	drivers/net/macb.h	/^#define MACB_UBR_OFFSET	/;"	d
MACB_UBR_SIZE	drivers/net/macb.h	/^#define MACB_UBR_SIZE	/;"	d
MACB_UND_OFFSET	drivers/net/macb.h	/^#define MACB_UND_OFFSET	/;"	d
MACB_UND_SIZE	drivers/net/macb.h	/^#define MACB_UND_SIZE	/;"	d
MACB_UNI_OFFSET	drivers/net/macb.h	/^#define MACB_UNI_OFFSET	/;"	d
MACB_UNI_SIZE	drivers/net/macb.h	/^#define MACB_UNI_SIZE	/;"	d
MACB_USF	drivers/net/macb.h	/^#define MACB_USF	/;"	d
MACB_USRIO	drivers/net/macb.h	/^#define MACB_USRIO	/;"	d
MACB_WESTAT_OFFSET	drivers/net/macb.h	/^#define MACB_WESTAT_OFFSET	/;"	d
MACB_WESTAT_SIZE	drivers/net/macb.h	/^#define MACB_WESTAT_SIZE	/;"	d
MACB_WOL	drivers/net/macb.h	/^#define MACB_WOL	/;"	d
MACB_WOL_MTI_OFFSET	drivers/net/macb.h	/^#define MACB_WOL_MTI_OFFSET	/;"	d
MACB_WOL_MTI_SIZE	drivers/net/macb.h	/^#define MACB_WOL_MTI_SIZE	/;"	d
MACCFG0	drivers/net/ax88180.h	/^#define MACCFG0	/;"	d
MACCFG0_BIT3_0	drivers/net/ax88180.h	/^  #define MACCFG0_BIT3_0	/;"	d
MACCFG1	drivers/net/ax88180.h	/^#define MACCFG1	/;"	d
MACCFG1_ENABLE_RX	drivers/qe/uec.h	/^#define MACCFG1_ENABLE_RX	/;"	d
MACCFG1_ENABLE_SYNCHED_RX	drivers/qe/uec.h	/^#define MACCFG1_ENABLE_SYNCHED_RX	/;"	d
MACCFG1_ENABLE_SYNCHED_TX	drivers/qe/uec.h	/^#define MACCFG1_ENABLE_SYNCHED_TX	/;"	d
MACCFG1_ENABLE_TX	drivers/qe/uec.h	/^#define MACCFG1_ENABLE_TX	/;"	d
MACCFG1_FLOW_RX	drivers/qe/uec.h	/^#define MACCFG1_FLOW_RX	/;"	d
MACCFG1_FLOW_TX	drivers/qe/uec.h	/^#define MACCFG1_FLOW_TX	/;"	d
MACCFG1_INIT	drivers/net/fm/dtsec.c	/^#define MACCFG1_INIT	/;"	d	file:
MACCFG1_INIT_VALUE	drivers/qe/uec.h	/^#define MACCFG1_INIT_VALUE	/;"	d
MACCFG1_LOOPBACK	include/fsl_dtsec.h	/^#define MACCFG1_LOOPBACK	/;"	d
MACCFG1_LOOPBACK	include/tsec.h	/^#define MACCFG1_LOOPBACK	/;"	d
MACCFG1_RESET_RX_FUN	include/tsec.h	/^#define MACCFG1_RESET_RX_FUN	/;"	d
MACCFG1_RESET_RX_MC	include/tsec.h	/^#define MACCFG1_RESET_RX_MC	/;"	d
MACCFG1_RESET_TX_FUN	include/tsec.h	/^#define MACCFG1_RESET_TX_FUN	/;"	d
MACCFG1_RESET_TX_MC	include/tsec.h	/^#define MACCFG1_RESET_TX_MC	/;"	d
MACCFG1_RST_RXFUN	include/fsl_dtsec.h	/^#define MACCFG1_RST_RXFUN	/;"	d
MACCFG1_RST_RXMAC	include/fsl_dtsec.h	/^#define MACCFG1_RST_RXMAC	/;"	d
MACCFG1_RST_TXFUN	include/fsl_dtsec.h	/^#define MACCFG1_RST_TXFUN	/;"	d
MACCFG1_RST_TXMAC	include/fsl_dtsec.h	/^#define MACCFG1_RST_TXMAC	/;"	d
MACCFG1_RXTX_EN	include/fsl_dtsec.h	/^#define MACCFG1_RXTX_EN	/;"	d
MACCFG1_RX_EN	include/fsl_dtsec.h	/^#define MACCFG1_RX_EN	/;"	d
MACCFG1_RX_EN	include/tsec.h	/^#define MACCFG1_RX_EN	/;"	d
MACCFG1_RX_FLOW	include/fsl_dtsec.h	/^#define MACCFG1_RX_FLOW	/;"	d
MACCFG1_RX_FLOW	include/tsec.h	/^#define MACCFG1_RX_FLOW	/;"	d
MACCFG1_SOFT_RESET	include/tsec.h	/^#define MACCFG1_SOFT_RESET	/;"	d
MACCFG1_SOFT_RST	include/fsl_dtsec.h	/^#define MACCFG1_SOFT_RST	/;"	d
MACCFG1_SYNCD_RX_EN	include/tsec.h	/^#define MACCFG1_SYNCD_RX_EN	/;"	d
MACCFG1_SYNCD_TX_EN	include/tsec.h	/^#define MACCFG1_SYNCD_TX_EN	/;"	d
MACCFG1_SYNC_RXEN	include/fsl_dtsec.h	/^#define MACCFG1_SYNC_RXEN	/;"	d
MACCFG1_SYNC_TXEN	include/fsl_dtsec.h	/^#define MACCFG1_SYNC_TXEN	/;"	d
MACCFG1_TX_EN	include/fsl_dtsec.h	/^#define MACCFG1_TX_EN	/;"	d
MACCFG1_TX_EN	include/tsec.h	/^#define MACCFG1_TX_EN	/;"	d
MACCFG1_TX_FLOW	include/fsl_dtsec.h	/^#define MACCFG1_TX_FLOW	/;"	d
MACCFG1_TX_FLOW	include/tsec.h	/^#define MACCFG1_TX_FLOW	/;"	d
MACCFG2	drivers/net/ax88180.h	/^#define MACCFG2	/;"	d
MACCFG2_BIT15_8	drivers/net/ax88180.h	/^  #define MACCFG2_BIT15_8	/;"	d
MACCFG2_CRC_EN	drivers/qe/uec.h	/^#define MACCFG2_CRC_EN	/;"	d
MACCFG2_CRC_EN	include/fsl_dtsec.h	/^#define MACCFG2_CRC_EN	/;"	d
MACCFG2_FDX	drivers/qe/uec.h	/^#define MACCFG2_FDX	/;"	d
MACCFG2_FDX_MASK	drivers/qe/uec.h	/^#define MACCFG2_FDX_MASK	/;"	d
MACCFG2_FULL_DUPLEX	include/fsl_dtsec.h	/^#define MACCFG2_FULL_DUPLEX	/;"	d
MACCFG2_FULL_DUPLEX	include/tsec.h	/^#define MACCFG2_FULL_DUPLEX	/;"	d
MACCFG2_GMII	include/tsec.h	/^#define MACCFG2_GMII	/;"	d
MACCFG2_HUGE_FRAME	include/fsl_dtsec.h	/^#define MACCFG2_HUGE_FRAME	/;"	d
MACCFG2_IF	include/tsec.h	/^#define MACCFG2_IF	/;"	d
MACCFG2_IF_MODE_BYTE	include/fsl_dtsec.h	/^#define MACCFG2_IF_MODE_BYTE	/;"	d
MACCFG2_IF_MODE_MASK	include/fsl_dtsec.h	/^#define MACCFG2_IF_MODE_MASK	/;"	d
MACCFG2_IF_MODE_NIBBLE	include/fsl_dtsec.h	/^#define MACCFG2_IF_MODE_NIBBLE	/;"	d
MACCFG2_INIT	drivers/net/fm/dtsec.c	/^#define MACCFG2_INIT	/;"	d	file:
MACCFG2_INIT_SETTINGS	include/tsec.h	/^#define MACCFG2_INIT_SETTINGS	/;"	d
MACCFG2_INIT_VALUE	drivers/qe/uec.h	/^#define MACCFG2_INIT_VALUE	/;"	d
MACCFG2_INTERFACE_MODE_BYTE	drivers/qe/uec.h	/^#define MACCFG2_INTERFACE_MODE_BYTE	/;"	d
MACCFG2_INTERFACE_MODE_MASK	drivers/qe/uec.h	/^#define MACCFG2_INTERFACE_MODE_MASK	/;"	d
MACCFG2_INTERFACE_MODE_NIBBLE	drivers/qe/uec.h	/^#define MACCFG2_INTERFACE_MODE_NIBBLE	/;"	d
MACCFG2_LC	drivers/qe/uec.h	/^#define MACCFG2_LC	/;"	d
MACCFG2_LEN_CHECK	include/fsl_dtsec.h	/^#define MACCFG2_LEN_CHECK	/;"	d
MACCFG2_MAG_EN	include/fsl_dtsec.h	/^#define MACCFG2_MAG_EN	/;"	d
MACCFG2_MII	include/tsec.h	/^#define MACCFG2_MII	/;"	d
MACCFG2_MPE	drivers/qe/uec.h	/^#define MACCFG2_MPE	/;"	d
MACCFG2_PAD_AND_CRC_MODE_CRC_ONLY	drivers/qe/uec.h	/^#define MACCFG2_PAD_AND_CRC_MODE_CRC_ONLY	/;"	d
MACCFG2_PAD_AND_CRC_MODE_NONE	drivers/qe/uec.h	/^#define MACCFG2_PAD_AND_CRC_MODE_NONE	/;"	d
MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC	drivers/qe/uec.h	/^#define MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC	/;"	d
MACCFG2_PAD_CRC	drivers/qe/uec.h	/^#define MACCFG2_PAD_CRC	/;"	d
MACCFG2_PAD_CRC	include/fsl_dtsec.h	/^#define MACCFG2_PAD_CRC	/;"	d
MACCFG2_PREL	drivers/qe/uec.h	/^#define MACCFG2_PREL	/;"	d
MACCFG2_PREL_MASK	drivers/qe/uec.h	/^#define MACCFG2_PREL_MASK	/;"	d
MACCFG2_PREL_SHIFT	drivers/qe/uec.h	/^#define MACCFG2_PREL_SHIFT	/;"	d
MACCFG2_PRE_LEN	include/fsl_dtsec.h	/^#define MACCFG2_PRE_LEN(/;"	d
MACCFG2_PRE_LEN_MASK	include/fsl_dtsec.h	/^#define MACCFG2_PRE_LEN_MASK	/;"	d
MACCFG2_PRE_RX_EN	include/fsl_dtsec.h	/^#define MACCFG2_PRE_RX_EN	/;"	d
MACCFG2_PRE_TX_EN	include/fsl_dtsec.h	/^#define MACCFG2_PRE_TX_EN	/;"	d
MACCFG2_RESERVED_1	drivers/qe/uec.h	/^#define MACCFG2_RESERVED_1	/;"	d
MACCFG2_SRP	drivers/qe/uec.h	/^#define MACCFG2_SRP	/;"	d
MACCFG2_STP	drivers/qe/uec.h	/^#define MACCFG2_STP	/;"	d
MACCFG3	drivers/net/ax88180.h	/^#define MACCFG3	/;"	d
MACCONFIG	drivers/net/davinci_emac.h	/^	dv_reg		MACCONFIG;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACCONTROL	drivers/net/davinci_emac.h	/^	dv_reg		MACCONTROL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACCR_100M	drivers/net/ftmac110.h	/^#define MACCR_100M /;"	d
MACCR_CRCAPD	drivers/net/ftmac110.h	/^#define MACCR_CRCAPD /;"	d
MACCR_CRCDIS	drivers/net/ftmac110.h	/^#define MACCR_CRCDIS /;"	d
MACCR_FD	drivers/net/ftmac110.h	/^#define MACCR_FD /;"	d
MACCR_LOOPBACK	drivers/net/ftmac110.h	/^#define MACCR_LOOPBACK /;"	d
MACCR_RESET	drivers/net/ftmac110.h	/^#define MACCR_RESET /;"	d
MACCR_RXALL	drivers/net/ftmac110.h	/^#define MACCR_RXALL /;"	d
MACCR_RXBCST	drivers/net/ftmac110.h	/^#define MACCR_RXBCST /;"	d
MACCR_RXDMAEN	drivers/net/ftmac110.h	/^#define MACCR_RXDMAEN /;"	d
MACCR_RXEN	drivers/net/ftmac110.h	/^#define MACCR_RXEN /;"	d
MACCR_RXFTL	drivers/net/ftmac110.h	/^#define MACCR_RXFTL /;"	d
MACCR_RXINHDTX	drivers/net/ftmac110.h	/^#define MACCR_RXINHDTX /;"	d
MACCR_RXMCST	drivers/net/ftmac110.h	/^#define MACCR_RXMCST /;"	d
MACCR_RXMCSTHT	drivers/net/ftmac110.h	/^#define MACCR_RXMCSTHT /;"	d
MACCR_RXRUNT	drivers/net/ftmac110.h	/^#define MACCR_RXRUNT /;"	d
MACCR_TXDMAEN	drivers/net/ftmac110.h	/^#define MACCR_TXDMAEN /;"	d
MACCR_TXEN	drivers/net/ftmac110.h	/^#define MACCR_TXEN /;"	d
MACHASH1	drivers/net/davinci_emac.h	/^	dv_reg		MACHASH1;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACHASH2	drivers/net/davinci_emac.h	/^	dv_reg		MACHASH2;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACH_PIC32	arch/mips/Kconfig	/^config MACH_PIC32$/;"	c	choice:MIPS architecture""choiced4351f5b0104
MACH_PLL_H	arch/arm/mach-uniphier/clk/pll.h	/^#define MACH_PLL_H$/;"	d
MACH_SUN4I	board/sunxi/Kconfig	/^config MACH_SUN4I$/;"	c	choice:choicebcdb41430104
MACH_SUN50I	board/sunxi/Kconfig	/^config MACH_SUN50I$/;"	c	choice:choicebcdb41430104
MACH_SUN5I	board/sunxi/Kconfig	/^config MACH_SUN5I$/;"	c	choice:choicebcdb41430104
MACH_SUN6I	board/sunxi/Kconfig	/^config MACH_SUN6I$/;"	c	choice:choicebcdb41430104
MACH_SUN7I	board/sunxi/Kconfig	/^config MACH_SUN7I$/;"	c	choice:choicebcdb41430104
MACH_SUN8I	board/sunxi/Kconfig	/^config MACH_SUN8I$/;"	c
MACH_SUN8I_A23	board/sunxi/Kconfig	/^config MACH_SUN8I_A23$/;"	c	choice:choicebcdb41430104
MACH_SUN8I_A33	board/sunxi/Kconfig	/^config MACH_SUN8I_A33$/;"	c	choice:choicebcdb41430104
MACH_SUN8I_A83T	board/sunxi/Kconfig	/^config MACH_SUN8I_A83T$/;"	c	choice:choicebcdb41430104
MACH_SUN8I_H3	board/sunxi/Kconfig	/^config MACH_SUN8I_H3$/;"	c	choice:choicebcdb41430104
MACH_SUN9I	board/sunxi/Kconfig	/^config MACH_SUN9I$/;"	c	choice:choicebcdb41430104
MACH_TYPE_A0	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_A0 /;"	d
MACH_TYPE_A2F	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_A2F /;"	d
MACH_TYPE_AAED2000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AAED2000 /;"	d
MACH_TYPE_ABACUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ABACUS /;"	d
MACH_TYPE_ABB_GMA_1_1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ABB_GMA_1_1 /;"	d
MACH_TYPE_ABILENE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ABILENE /;"	d
MACH_TYPE_ABLE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ABLE /;"	d
MACH_TYPE_ACER_A5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACER_A5 /;"	d
MACH_TYPE_ACER_A8	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACER_A8 /;"	d
MACH_TYPE_ACER_GAUGUIN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACER_GAUGUIN /;"	d
MACH_TYPE_ACER_MAYA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACER_MAYA /;"	d
MACH_TYPE_ACMENETUSFOXG20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACMENETUSFOXG20 /;"	d
MACH_TYPE_ACMEROVER1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACMEROVER1 /;"	d
MACH_TYPE_ACRO37XBRD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACRO37XBRD /;"	d
MACH_TYPE_ACS5K	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACS5K /;"	d
MACH_TYPE_ACSX106	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ACSX106 /;"	d
MACH_TYPE_ADI_COYOTE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ADI_COYOTE /;"	d
MACH_TYPE_ADPAG101P	arch/nds32/include/asm/mach-types.h	/^#define MACH_TYPE_ADPAG101P /;"	d
MACH_TYPE_ADSBITSY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ADSBITSY /;"	d
MACH_TYPE_ADSSPHERE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ADSSPHERE /;"	d
MACH_TYPE_AEBL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AEBL /;"	d
MACH_TYPE_AF4000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AF4000 /;"	d
MACH_TYPE_AFEB9260	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AFEB9260 /;"	d
MACH_TYPE_AG11005	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AG11005 /;"	d
MACH_TYPE_AG5EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AG5EVM /;"	d
MACH_TYPE_AKITA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AKITA /;"	d
MACH_TYPE_AM3517_MT_VENTOUX	include/configs/mt_ventoux.h	/^#define MACH_TYPE_AM3517_MT_VENTOUX	/;"	d
MACH_TYPE_AMK_A4	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AMK_A4 /;"	d
MACH_TYPE_AML_M5900	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AML_M5900 /;"	d
MACH_TYPE_AMS_DELTA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AMS_DELTA /;"	d
MACH_TYPE_ANCHOVY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ANCHOVY /;"	d
MACH_TYPE_ANTARES	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ANTARES /;"	d
MACH_TYPE_ANTERO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ANTERO /;"	d
MACH_TYPE_ANUBIS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ANUBIS /;"	d
MACH_TYPE_ANW6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ANW6410 /;"	d
MACH_TYPE_AP4EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AP4EVB /;"	d
MACH_TYPE_APALIS_T30	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_APALIS_T30 /;"	d
MACH_TYPE_APP3K_ROBIN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_APP3K_ROBIN /;"	d
MACH_TYPE_APX4DEVKIT	include/configs/apx4devkit.h	/^#define MACH_TYPE_APX4DEVKIT	/;"	d
MACH_TYPE_AQUARIUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AQUARIUS /;"	d
MACH_TYPE_AQUILA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AQUILA /;"	d
MACH_TYPE_ARCOM_VULCAN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARCOM_VULCAN /;"	d
MACH_TYPE_ARCOM_ZEUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARCOM_ZEUS /;"	d
MACH_TYPE_ARK9431	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARK9431 /;"	d
MACH_TYPE_ARMADA_XP_DB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMADA_XP_DB /;"	d
MACH_TYPE_ARMADILLO460	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMADILLO460 /;"	d
MACH_TYPE_ARMADILLO5X0	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMADILLO5X0 /;"	d
MACH_TYPE_ARMADILLO_800EVA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMADILLO_800EVA /;"	d
MACH_TYPE_ARMCORE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMCORE /;"	d
MACH_TYPE_ARMLEX4210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMLEX4210 /;"	d
MACH_TYPE_ARMLGUEST	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARMLGUEST /;"	d
MACH_TYPE_AROWANA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AROWANA /;"	d
MACH_TYPE_ARTHUR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARTHUR /;"	d
MACH_TYPE_ARUBA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ARUBA /;"	d
MACH_TYPE_AS1167	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AS1167 /;"	d
MACH_TYPE_ASL_PHOENIX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ASL_PHOENIX /;"	d
MACH_TYPE_ASPEN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ASPEN /;"	d
MACH_TYPE_ASPENITE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ASPENITE /;"	d
MACH_TYPE_ASSABET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ASSABET /;"	d
MACH_TYPE_AST2200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AST2200 /;"	d
MACH_TYPE_AT2440EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT2440EVB /;"	d
MACH_TYPE_AT572D940HFEB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT572D940HFEB /;"	d
MACH_TYPE_AT91CAP7STK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91CAP7STK /;"	d
MACH_TYPE_AT91CAP7XDK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91CAP7XDK /;"	d
MACH_TYPE_AT91CAP9ADK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91CAP9ADK /;"	d
MACH_TYPE_AT91EB01	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91EB01 /;"	d
MACH_TYPE_AT91RM9200DK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91RM9200DK /;"	d
MACH_TYPE_AT91RM9200EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91RM9200EK /;"	d
MACH_TYPE_AT91SAM9260EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9260EK /;"	d
MACH_TYPE_AT91SAM9261EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9261EK /;"	d
MACH_TYPE_AT91SAM9263DESK16L	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9263DESK16L /;"	d
MACH_TYPE_AT91SAM9263EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9263EK /;"	d
MACH_TYPE_AT91SAM9263OTLITE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9263OTLITE /;"	d
MACH_TYPE_AT91SAM9G10EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9G10EK /;"	d
MACH_TYPE_AT91SAM9G20EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9G20EK /;"	d
MACH_TYPE_AT91SAM9G20EK_2MMC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9G20EK_2MMC /;"	d
MACH_TYPE_AT91SAM9G45EKES	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9G45EKES /;"	d
MACH_TYPE_AT91SAM9M10G45EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9M10G45EK /;"	d
MACH_TYPE_AT91SAM9RLEK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9RLEK /;"	d
MACH_TYPE_AT91SAM9X5EK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AT91SAM9X5EK /;"	d
MACH_TYPE_ATDGP318	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ATDGP318 /;"	d
MACH_TYPE_ATEB9200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ATEB9200 /;"	d
MACH_TYPE_ATHENE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ATHENE /;"	d
MACH_TYPE_ATLAS5_C1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ATLAS5_C1 /;"	d
MACH_TYPE_AUTCPU12	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AUTCPU12 /;"	d
MACH_TYPE_AUTOBOT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AUTOBOT /;"	d
MACH_TYPE_AVENGERS_LITE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AVENGERS_LITE /;"	d
MACH_TYPE_AVILA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AVILA /;"	d
MACH_TYPE_AWM2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AWM2 /;"	d
MACH_TYPE_AX502	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AX502 /;"	d
MACH_TYPE_AX8008	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_AX8008 /;"	d
MACH_TYPE_B5500	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_B5500 /;"	d
MACH_TYPE_BADGE4	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BADGE4 /;"	d
MACH_TYPE_BASI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BASI /;"	d
MACH_TYPE_BAST	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BAST /;"	d
MACH_TYPE_BCM2708	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BCM2708 /;"	d
MACH_TYPE_BCM589X	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BCM589X /;"	d
MACH_TYPE_BCMHANA_SV	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BCMHANA_SV /;"	d
MACH_TYPE_BCMHANA_TABLET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BCMHANA_TABLET /;"	d
MACH_TYPE_BCMRING	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BCMRING /;"	d
MACH_TYPE_BEAVER	include/configs/beaver.h	/^#define MACH_TYPE_BEAVER	/;"	d
MACH_TYPE_BEECT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BEECT /;"	d
MACH_TYPE_BIGDISK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BIGDISK /;"	d
MACH_TYPE_BIO3K	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BIO3K /;"	d
MACH_TYPE_BIPNET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BIPNET /;"	d
MACH_TYPE_BLISS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BLISS /;"	d
MACH_TYPE_BLISSC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BLISSC /;"	d
MACH_TYPE_BLUECHEESE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BLUECHEESE /;"	d
MACH_TYPE_BLUEPOINT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BLUEPOINT /;"	d
MACH_TYPE_BLUESHARK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BLUESHARK /;"	d
MACH_TYPE_BOCKW	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BOCKW /;"	d
MACH_TYPE_BONAIRE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BONAIRE /;"	d
MACH_TYPE_BORABORA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BORABORA /;"	d
MACH_TYPE_BORZOI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BORZOI /;"	d
MACH_TYPE_BOSCH_SHC	include/configs/am335x_shc.h	/^#define MACH_TYPE_BOSCH_SHC	/;"	d
MACH_TYPE_BOSCH_SHC_B	include/configs/am335x_shc.h	/^#define MACH_TYPE_BOSCH_SHC_B	/;"	d
MACH_TYPE_BOSCH_SHC_B2	include/configs/am335x_shc.h	/^#define MACH_TYPE_BOSCH_SHC_B2	/;"	d
MACH_TYPE_BOSCH_SHC_C	include/configs/am335x_shc.h	/^#define MACH_TYPE_BOSCH_SHC_C	/;"	d
MACH_TYPE_BOSCH_SHC_C2	include/configs/am335x_shc.h	/^#define MACH_TYPE_BOSCH_SHC_C2	/;"	d
MACH_TYPE_BOSCH_SHC_C3	include/configs/am335x_shc.h	/^#define MACH_TYPE_BOSCH_SHC_C3	/;"	d
MACH_TYPE_BROWNSTONE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BROWNSTONE /;"	d
MACH_TYPE_BRUTUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BRUTUS /;"	d
MACH_TYPE_BSTBRD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BSTBRD /;"	d
MACH_TYPE_BTMAVB101	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BTMAVB101 /;"	d
MACH_TYPE_BTMAWB101	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BTMAWB101 /;"	d
MACH_TYPE_BUBBA3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BUBBA3 /;"	d
MACH_TYPE_BUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BUG /;"	d
MACH_TYPE_BUG20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BUG20 /;"	d
MACH_TYPE_BURY_BL7582	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BURY_BL7582 /;"	d
MACH_TYPE_BURY_BPS5270	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BURY_BPS5270 /;"	d
MACH_TYPE_BV07	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_BV07 /;"	d
MACH_TYPE_C2MMI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_C2MMI /;"	d
MACH_TYPE_CALIMAIN	include/configs/calimain.h	/^#define MACH_TYPE_CALIMAIN	/;"	d
MACH_TYPE_CALLISTO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CALLISTO /;"	d
MACH_TYPE_CAM60	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CAM60 /;"	d
MACH_TYPE_CAPC7117	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CAPC7117 /;"	d
MACH_TYPE_CARDHU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CARDHU /;"	d
MACH_TYPE_CARMEVA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CARMEVA /;"	d
MACH_TYPE_CATS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CATS /;"	d
MACH_TYPE_CAYENNE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CAYENNE /;"	d
MACH_TYPE_CC9P9360DEV	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CC9P9360DEV /;"	d
MACH_TYPE_CC9P9360JS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CC9P9360JS /;"	d
MACH_TYPE_CCMX53	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CCMX53 /;"	d
MACH_TYPE_CCMX53JS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CCMX53JS /;"	d
MACH_TYPE_CCWMX51MUT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CCWMX51MUT /;"	d
MACH_TYPE_CCWMX53	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CCWMX53 /;"	d
MACH_TYPE_CCWMX53JS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CCWMX53JS /;"	d
MACH_TYPE_CDB89712	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CDB89712 /;"	d
MACH_TYPE_CEIVA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CEIVA /;"	d
MACH_TYPE_CENTRO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CENTRO /;"	d
MACH_TYPE_CERF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CERF /;"	d
MACH_TYPE_CETUS9263	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CETUS9263 /;"	d
MACH_TYPE_CHACHA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CHACHA /;"	d
MACH_TYPE_CHALTEN_XA1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CHALTEN_XA1 /;"	d
MACH_TYPE_CHARON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CHARON /;"	d
MACH_TYPE_CINTEGRATOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CINTEGRATOR /;"	d
MACH_TYPE_CLEP7212	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CLEP7212 /;"	d
MACH_TYPE_CLOD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CLOD /;"	d
MACH_TYPE_CM4745	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CM4745 /;"	d
MACH_TYPE_CM_A510	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CM_A510 /;"	d
MACH_TYPE_CM_T335	include/configs/cm_t335.h	/^#define MACH_TYPE_CM_T335	/;"	d
MACH_TYPE_CM_T35	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CM_T35 /;"	d
MACH_TYPE_CM_T3517	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CM_T3517 /;"	d
MACH_TYPE_CM_T3730	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CM_T3730 /;"	d
MACH_TYPE_CM_X300	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CM_X300 /;"	d
MACH_TYPE_CNS2133EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CNS2133EVB /;"	d
MACH_TYPE_CNS21XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CNS21XX /;"	d
MACH_TYPE_CNS3420VB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CNS3420VB /;"	d
MACH_TYPE_COBRAL138	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COBRAL138 /;"	d
MACH_TYPE_COCONUT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COCONUT /;"	d
MACH_TYPE_COLIBRI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COLIBRI /;"	d
MACH_TYPE_COLIBRI300	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COLIBRI300 /;"	d
MACH_TYPE_COLIBRI320	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COLIBRI320 /;"	d
MACH_TYPE_COLIBRI_T20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COLIBRI_T20 /;"	d
MACH_TYPE_COLIBRI_T30	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COLIBRI_T30 /;"	d
MACH_TYPE_COLLIE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_COLLIE /;"	d
MACH_TYPE_CONSUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CONSUS /;"	d
MACH_TYPE_CONTROLTEK9G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CONTROLTEK9G20 /;"	d
MACH_TYPE_CORETEC_VCX7400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CORETEC_VCX7400 /;"	d
MACH_TYPE_CORGI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CORGI /;"	d
MACH_TYPE_CPUAT9260	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CPUAT9260 /;"	d
MACH_TYPE_CPUAT9G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CPUAT9G20 /;"	d
MACH_TYPE_CPX2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CPX2 /;"	d
MACH_TYPE_CRANEBOARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CRANEBOARD /;"	d
MACH_TYPE_CRUX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CRUX /;"	d
MACH_TYPE_CSB337	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CSB337 /;"	d
MACH_TYPE_CSB637	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CSB637 /;"	d
MACH_TYPE_CSB726	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CSB726 /;"	d
MACH_TYPE_CSC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CSC /;"	d
MACH_TYPE_CTBU_GEN2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CTBU_GEN2 /;"	d
MACH_TYPE_CTERA_PLUG_C2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CTERA_PLUG_C2 /;"	d
MACH_TYPE_CURACAO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CURACAO /;"	d
MACH_TYPE_CV2201	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CV2201 /;"	d
MACH_TYPE_CV2202	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CV2202 /;"	d
MACH_TYPE_CV2203	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CV2203 /;"	d
MACH_TYPE_CWAM1808	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CWAM1808 /;"	d
MACH_TYPE_CWDM365	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CWDM365 /;"	d
MACH_TYPE_CWME9210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CWME9210 /;"	d
MACH_TYPE_CWME9210JS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CWME9210JS /;"	d
MACH_TYPE_CWMX233	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_CWMX233 /;"	d
MACH_TYPE_D2NET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_D2NET /;"	d
MACH_TYPE_D2NET_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_D2NET_V2 /;"	d
MACH_TYPE_D2PLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_D2PLUG /;"	d
MACH_TYPE_DA850_K5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DA850_K5 /;"	d
MACH_TYPE_DAINTREE_CWAC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAINTREE_CWAC /;"	d
MACH_TYPE_DALMORE	include/configs/dalmore.h	/^#define MACH_TYPE_DALMORE	/;"	d
MACH_TYPE_DATAWAY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DATAWAY /;"	d
MACH_TYPE_DAVINCI_DA830_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DA830_EVM /;"	d
MACH_TYPE_DAVINCI_DA850_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DA850_EVM /;"	d
MACH_TYPE_DAVINCI_DM355_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM355_EVM /;"	d
MACH_TYPE_DAVINCI_DM355_MMM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM355_MMM /;"	d
MACH_TYPE_DAVINCI_DM365_BV	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM365_BV /;"	d
MACH_TYPE_DAVINCI_DM365_DVR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM365_DVR /;"	d
MACH_TYPE_DAVINCI_DM365_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM365_EVM /;"	d
MACH_TYPE_DAVINCI_DM6467TEVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM6467TEVM /;"	d
MACH_TYPE_DAVINCI_DM6467_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_DM6467_EVM /;"	d
MACH_TYPE_DAVINCI_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_EVM /;"	d
MACH_TYPE_DAVINCI_PICTO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAVINCI_PICTO /;"	d
MACH_TYPE_DAWAD7	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DAWAD7 /;"	d
MACH_TYPE_DB78X00_BP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DB78X00_BP /;"	d
MACH_TYPE_DB88F5281	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DB88F5281 /;"	d
MACH_TYPE_DB88F6281_BP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DB88F6281_BP /;"	d
MACH_TYPE_DDNAS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DDNAS /;"	d
MACH_TYPE_DDPLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DDPLUG /;"	d
MACH_TYPE_DDS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DDS /;"	d
MACH_TYPE_DEEP_R_EK_1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DEEP_R_EK_1 /;"	d
MACH_TYPE_DEVIXP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DEVIXP /;"	d
MACH_TYPE_DEVKIT3250	include/configs/devkit3250.h	/^#define MACH_TYPE_DEVKIT3250	/;"	d
MACH_TYPE_DEVKIT8000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DEVKIT8000 /;"	d
MACH_TYPE_DGM3240	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DGM3240 /;"	d
MACH_TYPE_DIMMSAM9G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DIMMSAM9G20 /;"	d
MACH_TYPE_DIMM_IMX28	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DIMM_IMX28 /;"	d
MACH_TYPE_DIMM_MX257	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DIMM_MX257 /;"	d
MACH_TYPE_DINGO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DINGO /;"	d
MACH_TYPE_DIR665	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DIR665 /;"	d
MACH_TYPE_DM355_LEOPARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM355_LEOPARD /;"	d
MACH_TYPE_DM365_CV100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM365_CV100 /;"	d
MACH_TYPE_DM368_LEOPARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM368_LEOPARD /;"	d
MACH_TYPE_DM3730_SOM_LV	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM3730_SOM_LV /;"	d
MACH_TYPE_DM3730_TORPEDO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM3730_TORPEDO /;"	d
MACH_TYPE_DM6441_ESP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM6441_ESP /;"	d
MACH_TYPE_DM6446_ADBOX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DM6446_ADBOX /;"	d
MACH_TYPE_DMA6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DMA6410 /;"	d
MACH_TYPE_DMA_THUNDERBUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DMA_THUNDERBUG /;"	d
MACH_TYPE_DMW96	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DMW96 /;"	d
MACH_TYPE_DNS323	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DNS323 /;"	d
MACH_TYPE_DNS325	include/configs/dns325.h	/^#define MACH_TYPE_DNS325	/;"	d
MACH_TYPE_DOCKSTAR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DOCKSTAR /;"	d
MACH_TYPE_DOORBOY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DOORBOY /;"	d
MACH_TYPE_DOUBLESHOT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DOUBLESHOT /;"	d
MACH_TYPE_DOVE_AVNG_V3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DOVE_AVNG_V3 /;"	d
MACH_TYPE_DOVE_DB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DOVE_DB /;"	d
MACH_TYPE_DP6XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DP6XX /;"	d
MACH_TYPE_DRACO	include/configs/draco.h	/^#define MACH_TYPE_DRACO	/;"	d
MACH_TYPE_DRAGONET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DRAGONET /;"	d
MACH_TYPE_DREAMPLUG	include/configs/dreamplug.h	/^#define MACH_TYPE_DREAMPLUG /;"	d
MACH_TYPE_DSM320	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DSM320 /;"	d
MACH_TYPE_DSMG600	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DSMG600 /;"	d
MACH_TYPE_DURIAN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DURIAN /;"	d
MACH_TYPE_DYNASTY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_DYNASTY /;"	d
MACH_TYPE_E10	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E10 /;"	d
MACH_TYPE_E330	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E330 /;"	d
MACH_TYPE_E350	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E350 /;"	d
MACH_TYPE_E400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E400 /;"	d
MACH_TYPE_E740	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E740 /;"	d
MACH_TYPE_E750	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E750 /;"	d
MACH_TYPE_E800	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_E800 /;"	d
MACH_TYPE_EA20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EA20 /;"	d
MACH_TYPE_EA2478DEVKIT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EA2478DEVKIT /;"	d
MACH_TYPE_EAG_CI4000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EAG_CI4000 /;"	d
MACH_TYPE_EASYCRRH	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EASYCRRH /;"	d
MACH_TYPE_EBSA110	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EBSA110 /;"	d
MACH_TYPE_EBSA285	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EBSA285 /;"	d
MACH_TYPE_EC4350SDB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EC4350SDB /;"	d
MACH_TYPE_EC4350TBM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EC4350TBM /;"	d
MACH_TYPE_ECBAT91	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ECBAT91 /;"	d
MACH_TYPE_ECO5_PK	include/configs/eco5pk.h	/^#define MACH_TYPE_ECO5_PK	/;"	d
MACH_TYPE_ECO920	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ECO920 /;"	d
MACH_TYPE_ECUV5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ECUV5 /;"	d
MACH_TYPE_EDB7211	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB7211 /;"	d
MACH_TYPE_EDB9301	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9301 /;"	d
MACH_TYPE_EDB9302	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9302 /;"	d
MACH_TYPE_EDB9302A	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9302A /;"	d
MACH_TYPE_EDB9307	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9307 /;"	d
MACH_TYPE_EDB9307A	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9307A /;"	d
MACH_TYPE_EDB9312	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9312 /;"	d
MACH_TYPE_EDB9315	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9315 /;"	d
MACH_TYPE_EDB9315A	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDB9315A /;"	d
MACH_TYPE_EDISON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDISON /;"	d
MACH_TYPE_EDMINI_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EDMINI_V2 /;"	d
MACH_TYPE_EELX2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EELX2 /;"	d
MACH_TYPE_EIGEN_TTR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EIGEN_TTR /;"	d
MACH_TYPE_ELEPHANT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ELEPHANT /;"	d
MACH_TYPE_ELKE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ELKE /;"	d
MACH_TYPE_ELOG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ELOG /;"	d
MACH_TYPE_EM1SY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EM1SY /;"	d
MACH_TYPE_EM7210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EM7210 /;"	d
MACH_TYPE_EMERALD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EMERALD /;"	d
MACH_TYPE_EM_X270	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EM_X270 /;"	d
MACH_TYPE_ENCORE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ENCORE /;"	d
MACH_TYPE_ENDIAN_MINI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ENDIAN_MINI /;"	d
MACH_TYPE_ENP2611	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ENP2611 /;"	d
MACH_TYPE_EP80219	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EP80219 /;"	d
MACH_TYPE_EPC10	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EPC10 /;"	d
MACH_TYPE_EPIPHAN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EPIPHAN /;"	d
MACH_TYPE_ES2440	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ES2440 /;"	d
MACH_TYPE_ESATA_SHEEVAPLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ESATA_SHEEVAPLUG /;"	d
MACH_TYPE_ESL_MOBILIS_A	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ESL_MOBILIS_A /;"	d
MACH_TYPE_ESL_MOBILIS_B	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ESL_MOBILIS_B /;"	d
MACH_TYPE_ESL_WAVE_A	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ESL_WAVE_A /;"	d
MACH_TYPE_ESL_WAVE_B	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ESL_WAVE_B /;"	d
MACH_TYPE_ESPRESSO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ESPRESSO /;"	d
MACH_TYPE_ETHERCAN2	include/configs/meesc.h	/^#define MACH_TYPE_ETHERCAN2	/;"	d
MACH_TYPE_ETHERNUT5	include/configs/ethernut5.h	/^#define MACH_TYPE_ETHERNUT5 /;"	d
MACH_TYPE_ETHERPRO_ISP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ETHERPRO_ISP /;"	d
MACH_TYPE_ETNA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ETNA /;"	d
MACH_TYPE_EUKREA_CPUIMX25SD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EUKREA_CPUIMX25SD /;"	d
MACH_TYPE_EUKREA_CPUIMX27	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EUKREA_CPUIMX27 /;"	d
MACH_TYPE_EUKREA_CPUIMX35SD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EUKREA_CPUIMX35SD /;"	d
MACH_TYPE_EUKREA_CPUIMX51	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EUKREA_CPUIMX51 /;"	d
MACH_TYPE_EUKREA_CPUIMX51SD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EUKREA_CPUIMX51SD /;"	d
MACH_TYPE_EVA2000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EVA2000 /;"	d
MACH_TYPE_EVSY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EVSY /;"	d
MACH_TYPE_EXEDA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EXEDA /;"	d
MACH_TYPE_EXPRESS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EXPRESS /;"	d
MACH_TYPE_EXPRESSCT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EXPRESSCT /;"	d
MACH_TYPE_EXPRESSH	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EXPRESSH /;"	d
MACH_TYPE_EXPRESS_KT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EXPRESS_KT /;"	d
MACH_TYPE_EZX_A1200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EZX_A1200 /;"	d
MACH_TYPE_EZX_A780	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EZX_A780 /;"	d
MACH_TYPE_EZX_A910	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EZX_A910 /;"	d
MACH_TYPE_EZX_E2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EZX_E2 /;"	d
MACH_TYPE_EZX_E6	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EZX_E6 /;"	d
MACH_TYPE_EZX_E680	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_EZX_E680 /;"	d
MACH_TYPE_FA9X27	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FA9X27 /;"	d
MACH_TYPE_FFCORE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FFCORE /;"	d
MACH_TYPE_FLEA3	include/configs/flea3.h	/^#define MACH_TYPE_FLEA3 /;"	d
MACH_TYPE_FLEA3	include/configs/woodburn_common.h	/^#define MACH_TYPE_FLEA3 /;"	d
MACH_TYPE_FLEXANET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FLEXANET /;"	d
MACH_TYPE_FLEXIBITY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FLEXIBITY /;"	d
MACH_TYPE_FLINT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FLINT /;"	d
MACH_TYPE_FLYER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FLYER /;"	d
MACH_TYPE_FORTUNET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FORTUNET /;"	d
MACH_TYPE_FRISMS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FRISMS /;"	d
MACH_TYPE_FRRHWCDMA60W	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FRRHWCDMA60W /;"	d
MACH_TYPE_FSG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FSG /;"	d
MACH_TYPE_FSM9XXX_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FSM9XXX_FFA /;"	d
MACH_TYPE_FSM9XXX_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FSM9XXX_SURF /;"	d
MACH_TYPE_FS_S5PC100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FS_S5PC100 /;"	d
MACH_TYPE_FUJI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FUJI /;"	d
MACH_TYPE_FWBD_0404	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_FWBD_0404 /;"	d
MACH_TYPE_G3EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_G3EVM /;"	d
MACH_TYPE_G4EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_G4EVM /;"	d
MACH_TYPE_GATEWAY7001	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GATEWAY7001 /;"	d
MACH_TYPE_GENEVA_B5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GENEVA_B5 /;"	d
MACH_TYPE_GESBC9312	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GESBC9312 /;"	d
MACH_TYPE_GFS_SPM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GFS_SPM /;"	d
MACH_TYPE_GINGER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GINGER /;"	d
MACH_TYPE_GIRA_KNXIP_ROUTER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GIRA_KNXIP_ROUTER /;"	d
MACH_TYPE_GLANTANK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GLANTANK /;"	d
MACH_TYPE_GNET_SGCE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GNET_SGCE /;"	d
MACH_TYPE_GNET_SGME	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GNET_SGME /;"	d
MACH_TYPE_GNET_SLC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GNET_SLC /;"	d
MACH_TYPE_GOFLEXHOME	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GOFLEXHOME /;"	d
MACH_TYPE_GOFLEXNET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GOFLEXNET /;"	d
MACH_TYPE_GOLDENGATE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GOLDENGATE /;"	d
MACH_TYPE_GONI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GONI /;"	d
MACH_TYPE_GORAMO_MLR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GORAMO_MLR /;"	d
MACH_TYPE_GPSDISPLAY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GPSDISPLAY /;"	d
MACH_TYPE_GRAPHICSCLIENT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GRAPHICSCLIENT /;"	d
MACH_TYPE_GRAPHICSMASTER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GRAPHICSMASTER /;"	d
MACH_TYPE_GREECO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GREECO /;"	d
MACH_TYPE_GSIA18S	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GSIA18S /;"	d
MACH_TYPE_GSL_DIAMOND	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GSL_DIAMOND /;"	d
MACH_TYPE_GSNCOMM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GSNCOMM /;"	d
MACH_TYPE_GTA04	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GTA04 /;"	d
MACH_TYPE_GTIB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GTIB /;"	d
MACH_TYPE_GTL_IT5100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GTL_IT5100 /;"	d
MACH_TYPE_GTWX5715	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GTWX5715 /;"	d
MACH_TYPE_GT_I5700	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GT_I5700 /;"	d
MACH_TYPE_GUMSTIX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GUMSTIX /;"	d
MACH_TYPE_GUPPY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GUPPY /;"	d
MACH_TYPE_GURNARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GURNARD /;"	d
MACH_TYPE_GURUPLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GURUPLUG /;"	d
MACH_TYPE_GW2361	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_GW2361 /;"	d
MACH_TYPE_H1600	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H1600 /;"	d
MACH_TYPE_H1940	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H1940 /;"	d
MACH_TYPE_H2200	include/configs/h2200.h	/^#define MACH_TYPE_H2200	/;"	d
MACH_TYPE_H3100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H3100 /;"	d
MACH_TYPE_H3600	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H3600 /;"	d
MACH_TYPE_H4700	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H4700 /;"	d
MACH_TYPE_H5400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H5400 /;"	d
MACH_TYPE_H7201	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H7201 /;"	d
MACH_TYPE_H7202	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_H7202 /;"	d
MACH_TYPE_HABA_KNX_EXPLORER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HABA_KNX_EXPLORER /;"	d
MACH_TYPE_HACKKIT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HACKKIT /;"	d
MACH_TYPE_HALIBUT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HALIBUT /;"	d
MACH_TYPE_HAMMERHEAD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HAMMERHEAD /;"	d
MACH_TYPE_HARMONY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HARMONY /;"	d
MACH_TYPE_HARVEST_DESOTO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HARVEST_DESOTO /;"	d
MACH_TYPE_HAWKS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HAWKS /;"	d
MACH_TYPE_HDGU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HDGU /;"	d
MACH_TYPE_HDMINI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HDMINI /;"	d
MACH_TYPE_HDNVP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HDNVP /;"	d
MACH_TYPE_HELIOS_V1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HELIOS_V1 /;"	d
MACH_TYPE_HELIOS_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HELIOS_V2 /;"	d
MACH_TYPE_HERALD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HERALD /;"	d
MACH_TYPE_HERRING	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HERRING /;"	d
MACH_TYPE_HIMALAYA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HIMALAYA /;"	d
MACH_TYPE_HJSDU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HJSDU /;"	d
MACH_TYPE_HKDKC100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HKDKC100 /;"	d
MACH_TYPE_HMT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HMT /;"	d
MACH_TYPE_HOLIDAY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HOLIDAY /;"	d
MACH_TYPE_HREFV60	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HREFV60 /;"	d
MACH_TYPE_HSGX6D	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HSGX6D /;"	d
MACH_TYPE_HTCMEGA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HTCMEGA /;"	d
MACH_TYPE_HTCTORNADO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HTCTORNADO /;"	d
MACH_TYPE_HTC_HD_MINI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HTC_HD_MINI /;"	d
MACH_TYPE_HTC_SPV_M700	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HTC_SPV_M700 /;"	d
MACH_TYPE_HUASHAN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HUASHAN /;"	d
MACH_TYPE_HUSKY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HUSKY /;"	d
MACH_TYPE_HWGW6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_HWGW6410 /;"	d
MACH_TYPE_IAM28	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IAM28 /;"	d
MACH_TYPE_ICON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ICON /;"	d
MACH_TYPE_ICONG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ICONG /;"	d
MACH_TYPE_ICONNECT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ICONNECT /;"	d
MACH_TYPE_ICONTROL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ICONTROL /;"	d
MACH_TYPE_ICON_G	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ICON_G /;"	d
MACH_TYPE_ICS_IF_VOIP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ICS_IF_VOIP /;"	d
MACH_TYPE_IDEA6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IDEA6410 /;"	d
MACH_TYPE_IGEP0020	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IGEP0020 /;"	d
MACH_TYPE_IGEP0030	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IGEP0030 /;"	d
MACH_TYPE_IGEP0032	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IGEP0032 /;"	d
MACH_TYPE_IGEP0033	include/configs/am335x_igep0033.h	/^#define MACH_TYPE_IGEP0033	/;"	d
MACH_TYPE_IJ3K_2440	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IJ3K_2440 /;"	d
MACH_TYPE_IMATE8502	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IMATE8502 /;"	d
MACH_TYPE_IMX27IPCAM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IMX27IPCAM /;"	d
MACH_TYPE_IMX27LITE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IMX27LITE /;"	d
MACH_TYPE_IMX27_VISSTRIM_M10	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IMX27_VISSTRIM_M10 /;"	d
MACH_TYPE_INCOME	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INCOME /;"	d
MACH_TYPE_INETSPACE_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INETSPACE_V2 /;"	d
MACH_TYPE_INHAND_APEIRON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INHAND_APEIRON /;"	d
MACH_TYPE_INHAND_FURY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INHAND_FURY /;"	d
MACH_TYPE_INHAND_SIREN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INHAND_SIREN /;"	d
MACH_TYPE_INTEGRATOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INTEGRATOR /;"	d
MACH_TYPE_INTELMOTE2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_INTELMOTE2 /;"	d
MACH_TYPE_IOMEGA_IX2_200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IOMEGA_IX2_200 /;"	d
MACH_TYPE_IQ31244	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IQ31244 /;"	d
MACH_TYPE_IQ80321	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IQ80321 /;"	d
MACH_TYPE_IQ80331	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IQ80331 /;"	d
MACH_TYPE_IQ80332	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IQ80332 /;"	d
MACH_TYPE_IQ81340MC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IQ81340MC /;"	d
MACH_TYPE_IQ81340SC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IQ81340SC /;"	d
MACH_TYPE_ISC3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ISC3 /;"	d
MACH_TYPE_IXCDP1100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXCDP1100 /;"	d
MACH_TYPE_IXDP2351	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP2351 /;"	d
MACH_TYPE_IXDP2400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP2400 /;"	d
MACH_TYPE_IXDP2401	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP2401 /;"	d
MACH_TYPE_IXDP2800	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP2800 /;"	d
MACH_TYPE_IXDP2801	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP2801 /;"	d
MACH_TYPE_IXDP28X5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP28X5 /;"	d
MACH_TYPE_IXDP425	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP425 /;"	d
MACH_TYPE_IXDP465	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDP465 /;"	d
MACH_TYPE_IXDPG425	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_IXDPG425 /;"	d
MACH_TYPE_JANUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_JANUS /;"	d
MACH_TYPE_JIGEN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_JIGEN /;"	d
MACH_TYPE_JIVE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_JIVE /;"	d
MACH_TYPE_JOCPU550	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_JOCPU550 /;"	d
MACH_TYPE_JORNADA720	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_JORNADA720 /;"	d
MACH_TYPE_KAEN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KAEN /;"	d
MACH_TYPE_KAFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KAFA /;"	d
MACH_TYPE_KB9200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KB9200 /;"	d
MACH_TYPE_KEV7A400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KEV7A400 /;"	d
MACH_TYPE_KINGDOM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KINGDOM /;"	d
MACH_TYPE_KIXRP435	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KIXRP435 /;"	d
MACH_TYPE_KMM2M01	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KMM2M01 /;"	d
MACH_TYPE_KMP_AM17_01	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KMP_AM17_01 /;"	d
MACH_TYPE_KM_KIRKWOOD	include/configs/km/km_arm.h	/^#define MACH_TYPE_KM_KIRKWOOD /;"	d
MACH_TYPE_KOI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KOI /;"	d
MACH_TYPE_KRONOS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KRONOS /;"	d
MACH_TYPE_KS8695	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KS8695 /;"	d
MACH_TYPE_KT_SBC_SAM9_1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KT_SBC_SAM9_1 /;"	d
MACH_TYPE_KUROBOX_PRO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KUROBOX_PRO /;"	d
MACH_TYPE_KX33XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KX33XX /;"	d
MACH_TYPE_KZM9D	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KZM9D /;"	d
MACH_TYPE_KZM9G	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KZM9G /;"	d
MACH_TYPE_KZM_ARM11_01	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_KZM_ARM11_01 /;"	d
MACH_TYPE_L7200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_L7200 /;"	d
MACH_TYPE_LANREADYFN511	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LANREADYFN511 /;"	d
MACH_TYPE_LART	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LART /;"	d
MACH_TYPE_LAUSANNE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LAUSANNE /;"	d
MACH_TYPE_LB88RC8480	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LB88RC8480 /;"	d
MACH_TYPE_LEAD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LEAD /;"	d
MACH_TYPE_LEGACY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LEGACY /;"	d
MACH_TYPE_LEMON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LEMON /;"	d
MACH_TYPE_LIBRA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LIBRA /;"	d
MACH_TYPE_LIGHTNING	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LIGHTNING /;"	d
MACH_TYPE_LILLY1131	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LILLY1131 /;"	d
MACH_TYPE_LINKSTATION_CHLV2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LINKSTATION_CHLV2 /;"	d
MACH_TYPE_LINKSTATION_LSCHL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LINKSTATION_LSCHL /;"	d
MACH_TYPE_LINKSTATION_LS_HGL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LINKSTATION_LS_HGL /;"	d
MACH_TYPE_LINKSTATION_MINI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LINKSTATION_MINI /;"	d
MACH_TYPE_LINKSTATION_PRO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LINKSTATION_PRO /;"	d
MACH_TYPE_LITTLETON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LITTLETON /;"	d
MACH_TYPE_LOFT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LOFT /;"	d
MACH_TYPE_LOGICPD_PXA270	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LOGICPD_PXA270 /;"	d
MACH_TYPE_LPC24XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LPC24XX /;"	d
MACH_TYPE_LPD7A400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LPD7A400 /;"	d
MACH_TYPE_LPD7A404	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LPD7A404 /;"	d
MACH_TYPE_LQ2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LQ2 /;"	d
MACH_TYPE_LS9G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LS9G20 /;"	d
MACH_TYPE_LSWXL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LSWXL /;"	d
MACH_TYPE_LUBBOCK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_LUBBOCK /;"	d
MACH_TYPE_M28EVK	include/configs/m28evk.h	/^#define MACH_TYPE_M28EVK	/;"	d
MACH_TYPE_M502	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_M502 /;"	d
MACH_TYPE_MACH_SDH001	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MACH_SDH001 /;"	d
MACH_TYPE_MACKEREL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MACKEREL /;"	d
MACH_TYPE_MAGICIAN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MAGICIAN /;"	d
MACH_TYPE_MAGX_ZN5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MAGX_ZN5 /;"	d
MACH_TYPE_MAHIMAHI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MAHIMAHI /;"	d
MACH_TYPE_MAINSTONE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MAINSTONE /;"	d
MACH_TYPE_MANUAE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MANUAE /;"	d
MACH_TYPE_MAPLE1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MAPLE1 /;"	d
MACH_TYPE_MARVEL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MARVEL /;"	d
MACH_TYPE_MARVELC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MARVELC /;"	d
MACH_TYPE_MARVELCT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MARVELCT /;"	d
MACH_TYPE_MARVELL_JASPER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MARVELL_JASPER /;"	d
MACH_TYPE_MATRIX505	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MATRIX505 /;"	d
MACH_TYPE_MATRIX518	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MATRIX518 /;"	d
MACH_TYPE_MAXIMASP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MAXIMASP /;"	d
MACH_TYPE_MB3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MB3 /;"	d
MACH_TYPE_MCX	include/configs/mcx.h	/^#define MACH_TYPE_MCX	/;"	d
MACH_TYPE_MECHA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MECHA /;"	d
MACH_TYPE_MEESC	include/configs/meesc.h	/^#define MACH_TYPE_MEESC	/;"	d
MACH_TYPE_MENO_QNG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MENO_QNG /;"	d
MACH_TYPE_MESON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MESON /;"	d
MACH_TYPE_MESON_6236M	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MESON_6236M /;"	d
MACH_TYPE_MESON_8626M	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MESON_8626M /;"	d
MACH_TYPE_MESSINA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MESSINA /;"	d
MACH_TYPE_MIC256	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIC256 /;"	d
MACH_TYPE_MICCPT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MICCPT /;"	d
MACH_TYPE_MICRO9	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MICRO9 /;"	d
MACH_TYPE_MICRO9L	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MICRO9L /;"	d
MACH_TYPE_MICRO9M	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MICRO9M /;"	d
MACH_TYPE_MICRO9S	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MICRO9S /;"	d
MACH_TYPE_MIF10P	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIF10P /;"	d
MACH_TYPE_MIMAS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIMAS /;"	d
MACH_TYPE_MINI210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MINI210 /;"	d
MACH_TYPE_MINI2440	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MINI2440 /;"	d
MACH_TYPE_MINI6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MINI6410 /;"	d
MACH_TYPE_MINI8168	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MINI8168 /;"	d
MACH_TYPE_MIOA502	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIOA502 /;"	d
MACH_TYPE_MIOA701	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIOA701 /;"	d
MACH_TYPE_MIONE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIONE /;"	d
MACH_TYPE_MIOS_V1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MIOS_V1 /;"	d
MACH_TYPE_MITYOMAPL138	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MITYOMAPL138 /;"	d
MACH_TYPE_MMM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MMM /;"	d
MACH_TYPE_MONCH	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MONCH /;"	d
MACH_TYPE_MONE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MONE /;"	d
MACH_TYPE_MOON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MOON /;"	d
MACH_TYPE_MORA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MORA /;"	d
MACH_TYPE_MPL_VCMA9	include/configs/VCMA9.h	/^#define MACH_TYPE_MPL_VCMA9	/;"	d
MACH_TYPE_MR301A	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MR301A /;"	d
MACH_TYPE_MSM7X25_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X25_FFA /;"	d
MACH_TYPE_MSM7X25_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X25_SURF /;"	d
MACH_TYPE_MSM7X27A_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X27A_FFA /;"	d
MACH_TYPE_MSM7X27A_RUMI3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X27A_RUMI3 /;"	d
MACH_TYPE_MSM7X27A_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X27A_SURF /;"	d
MACH_TYPE_MSM7X27_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X27_FFA /;"	d
MACH_TYPE_MSM7X27_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X27_SURF /;"	d
MACH_TYPE_MSM7X30_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X30_FFA /;"	d
MACH_TYPE_MSM7X30_FLUID	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X30_FLUID /;"	d
MACH_TYPE_MSM7X30_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM7X30_SURF /;"	d
MACH_TYPE_MSM8960_APQ	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8960_APQ /;"	d
MACH_TYPE_MSM8960_CDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8960_CDP /;"	d
MACH_TYPE_MSM8960_FLUID	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8960_FLUID /;"	d
MACH_TYPE_MSM8960_MDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8960_MDP /;"	d
MACH_TYPE_MSM8960_RUMI3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8960_RUMI3 /;"	d
MACH_TYPE_MSM8960_SIM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8960_SIM /;"	d
MACH_TYPE_MSM8X55_SVLTE_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X55_SVLTE_FFA /;"	d
MACH_TYPE_MSM8X55_SVLTE_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X55_SVLTE_SURF /;"	d
MACH_TYPE_MSM8X60_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_FFA /;"	d
MACH_TYPE_MSM8X60_FLUID	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_FLUID /;"	d
MACH_TYPE_MSM8X60_QRDC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_QRDC /;"	d
MACH_TYPE_MSM8X60_QT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_QT /;"	d
MACH_TYPE_MSM8X60_RUMI3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_RUMI3 /;"	d
MACH_TYPE_MSM8X60_SIM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_SIM /;"	d
MACH_TYPE_MSM8X60_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSM8X60_SURF /;"	d
MACH_TYPE_MSS2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MSS2 /;"	d
MACH_TYPE_MULTHSU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MULTHSU /;"	d
MACH_TYPE_MV2120	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MV2120 /;"	d
MACH_TYPE_MV88F6281GTW_GE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MV88F6281GTW_GE /;"	d
MACH_TYPE_MVBLX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MVBLX /;"	d
MACH_TYPE_MX1ADS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX1ADS /;"	d
MACH_TYPE_MX21ADS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX21ADS /;"	d
MACH_TYPE_MX23EVK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX23EVK /;"	d
MACH_TYPE_MX257SOL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX257SOL /;"	d
MACH_TYPE_MX257SX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX257SX /;"	d
MACH_TYPE_MX25_3DS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX25_3DS /;"	d
MACH_TYPE_MX25_E2S_UC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX25_E2S_UC /;"	d
MACH_TYPE_MX27ADS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX27ADS /;"	d
MACH_TYPE_MX27SU2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX27SU2 /;"	d
MACH_TYPE_MX27_3DS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX27_3DS /;"	d
MACH_TYPE_MX27_WMULTRA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX27_WMULTRA /;"	d
MACH_TYPE_MX28EVK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX28EVK /;"	d
MACH_TYPE_MX31ADS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX31ADS /;"	d
MACH_TYPE_MX31LITE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX31LITE /;"	d
MACH_TYPE_MX31MOBOARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX31MOBOARD /;"	d
MACH_TYPE_MX31_3DS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX31_3DS /;"	d
MACH_TYPE_MX35_3DS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX35_3DS /;"	d
MACH_TYPE_MX50_ARM2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX50_ARM2 /;"	d
MACH_TYPE_MX50_RDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX50_RDP /;"	d
MACH_TYPE_MX51EREBUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51EREBUS /;"	d
MACH_TYPE_MX51_3DS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_3DS /;"	d
MACH_TYPE_MX51_ASTER7	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_ASTER7 /;"	d
MACH_TYPE_MX51_BABBAGE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_BABBAGE /;"	d
MACH_TYPE_MX51_BRAVO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_BRAVO /;"	d
MACH_TYPE_MX51_EFIKAMX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_EFIKAMX /;"	d
MACH_TYPE_MX51_EFIKASB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_EFIKASB /;"	d
MACH_TYPE_MX51_GGC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_GGC /;"	d
MACH_TYPE_MX51_MORAY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_MORAY /;"	d
MACH_TYPE_MX51_TULIP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX51_TULIP /;"	d
MACH_TYPE_MX53_ARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX53_ARD /;"	d
MACH_TYPE_MX53_EVK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX53_EVK /;"	d
MACH_TYPE_MX53_LOCO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX53_LOCO /;"	d
MACH_TYPE_MX53_SMD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX53_SMD /;"	d
MACH_TYPE_MX61_ARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MX61_ARD /;"	d
MACH_TYPE_MX6SLEVK	include/configs/mx6slevk.h	/^#define MACH_TYPE_MX6SLEVK	/;"	d
MACH_TYPE_MXC25_TOPAZ	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MXC25_TOPAZ /;"	d
MACH_TYPE_MXLADS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MXLADS /;"	d
MACH_TYPE_MXT_TD60	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MXT_TD60 /;"	d
MACH_TYPE_MXT_TD61	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_MXT_TD61 /;"	d
MACH_TYPE_N2100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_N2100 /;"	d
MACH_TYPE_N30	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_N30 /;"	d
MACH_TYPE_N35	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_N35 /;"	d
MACH_TYPE_NAJAY_A9263	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAJAY_A9263 /;"	d
MACH_TYPE_NANOENGINE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NANOENGINE /;"	d
MACH_TYPE_NANOS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NANOS /;"	d
MACH_TYPE_NANOZOOM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NANOZOOM /;"	d
MACH_TYPE_NAS100D	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAS100D /;"	d
MACH_TYPE_NAS220	include/configs/nas220.h	/^#define MACH_TYPE_NAS220	/;"	d
MACH_TYPE_NAS4220B	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAS4220B /;"	d
MACH_TYPE_NAS6210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAS6210 /;"	d
MACH_TYPE_NAVEFIHID	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAVEFIHID /;"	d
MACH_TYPE_NAXY1200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAXY1200 /;"	d
MACH_TYPE_NAXY400	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NAXY400 /;"	d
MACH_TYPE_NB31	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NB31 /;"	d
MACH_TYPE_NCP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NCP /;"	d
MACH_TYPE_NDA_EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NDA_EVM /;"	d
MACH_TYPE_NEC_MP900	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NEC_MP900 /;"	d
MACH_TYPE_NEO1973_GTA02	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NEO1973_GTA02 /;"	d
MACH_TYPE_NEOCORE926	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NEOCORE926 /;"	d
MACH_TYPE_NERY_1000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NERY_1000 /;"	d
MACH_TYPE_NET2BIG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NET2BIG /;"	d
MACH_TYPE_NET2BIG_NAND_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NET2BIG_NAND_V2 /;"	d
MACH_TYPE_NET2BIG_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NET2BIG_V2 /;"	d
MACH_TYPE_NET5BIG_NAND_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NET5BIG_NAND_V2 /;"	d
MACH_TYPE_NET5BIG_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NET5BIG_V2 /;"	d
MACH_TYPE_NETSPACE_LITE_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NETSPACE_LITE_V2 /;"	d
MACH_TYPE_NETSPACE_LITE_V2	include/configs/lacie_kw.h	/^#define MACH_TYPE_NETSPACE_LITE_V2	/;"	d
MACH_TYPE_NETSPACE_MAX_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NETSPACE_MAX_V2 /;"	d
MACH_TYPE_NETSPACE_MINI_V2	include/configs/lacie_kw.h	/^#define MACH_TYPE_NETSPACE_MINI_V2	/;"	d
MACH_TYPE_NETSPACE_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NETSPACE_V2 /;"	d
MACH_TYPE_NETVIZ	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NETVIZ /;"	d
MACH_TYPE_NETWALKER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NETWALKER /;"	d
MACH_TYPE_NETWINDER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NETWINDER /;"	d
MACH_TYPE_NEUROS_OSD2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NEUROS_OSD2 /;"	d
MACH_TYPE_NEXCODER_2440	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NEXCODER_2440 /;"	d
MACH_TYPE_NITROGEN_IMX51	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NITROGEN_IMX51 /;"	d
MACH_TYPE_NITROGEN_IMX53	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NITROGEN_IMX53 /;"	d
MACH_TYPE_NITROGEN_VM_IMX51	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NITROGEN_VM_IMX51 /;"	d
MACH_TYPE_NMH	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NMH /;"	d
MACH_TYPE_NOKIA770	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOKIA770 /;"	d
MACH_TYPE_NOKIA_N800	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOKIA_N800 /;"	d
MACH_TYPE_NOKIA_N810	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOKIA_N810 /;"	d
MACH_TYPE_NOKIA_N810_WIMAX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOKIA_N810_WIMAX /;"	d
MACH_TYPE_NOKIA_RM680	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOKIA_RM680 /;"	d
MACH_TYPE_NOKIA_RX51	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOKIA_RX51 /;"	d
MACH_TYPE_NOMADIK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOMADIK /;"	d
MACH_TYPE_NOTLE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NOTLE /;"	d
MACH_TYPE_NS2416	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NS2416 /;"	d
MACH_TYPE_NS2816TB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NS2816TB /;"	d
MACH_TYPE_NS2816_NTNB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NS2816_NTNB /;"	d
MACH_TYPE_NS2816_NTPAD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NS2816_NTPAD /;"	d
MACH_TYPE_NSB3AST	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NSB3AST /;"	d
MACH_TYPE_NSK330	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NSK330 /;"	d
MACH_TYPE_NSLU2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NSLU2 /;"	d
MACH_TYPE_NSSLSBOARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NSSLSBOARD /;"	d
MACH_TYPE_NS_K330	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NS_K330 /;"	d
MACH_TYPE_NUC700EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NUC700EVB /;"	d
MACH_TYPE_NUC710EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NUC710EVB /;"	d
MACH_TYPE_NUC740EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NUC740EVB /;"	d
MACH_TYPE_NUC745EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NUC745EVB /;"	d
MACH_TYPE_NUC932EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NUC932EVB /;"	d
MACH_TYPE_NUC950TS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NUC950TS /;"	d
MACH_TYPE_NURI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NURI /;"	d
MACH_TYPE_NV1000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NV1000 /;"	d
MACH_TYPE_NXDB500	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NXDB500 /;"	d
MACH_TYPE_NXDKN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NXDKN /;"	d
MACH_TYPE_NXEB500HMI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_NXEB500HMI /;"	d
MACH_TYPE_OCE_NIGMA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OCE_NIGMA /;"	d
MACH_TYPE_OMAP2EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP2EVM /;"	d
MACH_TYPE_OMAP3505NOVA8	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3505NOVA8 /;"	d
MACH_TYPE_OMAP3517EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3517EVM /;"	d
MACH_TYPE_OMAP3530_LV_SOM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3530_LV_SOM /;"	d
MACH_TYPE_OMAP3621_EDP1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3621_EDP1 /;"	d
MACH_TYPE_OMAP3EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3EVM /;"	d
MACH_TYPE_OMAP3SMARTDISPLAY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3SMARTDISPLAY /;"	d
MACH_TYPE_OMAP3_BAIA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_BAIA /;"	d
MACH_TYPE_OMAP3_BC10	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_BC10 /;"	d
MACH_TYPE_OMAP3_BEAGLE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_BEAGLE /;"	d
MACH_TYPE_OMAP3_BRAILLO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_BRAILLO /;"	d
MACH_TYPE_OMAP3_CAIRO	include/configs/omap3_cairo.h	/^#define MACH_TYPE_OMAP3_CAIRO	/;"	d
MACH_TYPE_OMAP3_IBIZA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_IBIZA /;"	d
MACH_TYPE_OMAP3_PANDORA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_PANDORA /;"	d
MACH_TYPE_OMAP3_RFS200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_RFS200 /;"	d
MACH_TYPE_OMAP3_TAO3530	include/configs/tao3530.h	/^#define MACH_TYPE_OMAP3_TAO3530	/;"	d
MACH_TYPE_OMAP3_TDM3730	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_TDM3730 /;"	d
MACH_TYPE_OMAP3_TORPEDO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_TORPEDO /;"	d
MACH_TYPE_OMAP3_WALDO1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP3_WALDO1 /;"	d
MACH_TYPE_OMAP4_DUOVERO	include/configs/duovero.h	/^#define MACH_TYPE_OMAP4_DUOVERO /;"	d
MACH_TYPE_OMAP4_PANDA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP4_PANDA /;"	d
MACH_TYPE_OMAP5_SEVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP5_SEVM /;"	d
MACH_TYPE_OMAPL138_CASE_A3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAPL138_CASE_A3 /;"	d
MACH_TYPE_OMAPL138_EUROPALC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAPL138_EUROPALC /;"	d
MACH_TYPE_OMAPL138_HAWKBOARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAPL138_HAWKBOARD /;"	d
MACH_TYPE_OMAPL138_LCDK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAPL138_LCDK /;"	d
MACH_TYPE_OMAP_2430SDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_2430SDP /;"	d
MACH_TYPE_OMAP_3430SDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_3430SDP /;"	d
MACH_TYPE_OMAP_3630SDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_3630SDP /;"	d
MACH_TYPE_OMAP_4430SDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_4430SDP /;"	d
MACH_TYPE_OMAP_APOLLON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_APOLLON /;"	d
MACH_TYPE_OMAP_BENDER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_BENDER /;"	d
MACH_TYPE_OMAP_FSAMPLE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_FSAMPLE /;"	d
MACH_TYPE_OMAP_GENERIC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_GENERIC /;"	d
MACH_TYPE_OMAP_H2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_H2 /;"	d
MACH_TYPE_OMAP_H3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_H3 /;"	d
MACH_TYPE_OMAP_H4	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_H4 /;"	d
MACH_TYPE_OMAP_INNOVATOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_INNOVATOR /;"	d
MACH_TYPE_OMAP_LDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_LDP /;"	d
MACH_TYPE_OMAP_MCOP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_MCOP /;"	d
MACH_TYPE_OMAP_OSK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_OSK /;"	d
MACH_TYPE_OMAP_PALMTE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_PALMTE /;"	d
MACH_TYPE_OMAP_PALMTT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_PALMTT /;"	d
MACH_TYPE_OMAP_PALMZ71	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_PALMZ71 /;"	d
MACH_TYPE_OMAP_PERSEUS2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_PERSEUS2 /;"	d
MACH_TYPE_OMAP_ZOOM2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_ZOOM2 /;"	d
MACH_TYPE_OMAP_ZOOM3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMAP_ZOOM3 /;"	d
MACH_TYPE_OMN_AT91SAM9G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OMN_AT91SAM9G20 /;"	d
MACH_TYPE_ONEARM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ONEARM /;"	d
MACH_TYPE_OPENRD_BASE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OPENRD_BASE /;"	d
MACH_TYPE_OPENRD_CLIENT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OPENRD_CLIENT /;"	d
MACH_TYPE_OPENRD_ULTIMATE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OPENRD_ULTIMATE /;"	d
MACH_TYPE_ORATISAES	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ORATISAES /;"	d
MACH_TYPE_ORATISLINK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ORATISLINK /;"	d
MACH_TYPE_ORIGEN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ORIGEN /;"	d
MACH_TYPE_OSIRIS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OSIRIS /;"	d
MACH_TYPE_OSLO_AMUNDSEN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OSLO_AMUNDSEN /;"	d
MACH_TYPE_OTOM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OTOM /;"	d
MACH_TYPE_OVERO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OVERO /;"	d
MACH_TYPE_OVERO_CTU_INERTIAL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_OVERO_CTU_INERTIAL /;"	d
MACH_TYPE_P720T	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_P720T /;"	d
MACH_TYPE_P87_SMARTSIM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_P87_SMARTSIM /;"	d
MACH_TYPE_PALMLD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PALMLD /;"	d
MACH_TYPE_PALMT5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PALMT5 /;"	d
MACH_TYPE_PALMTC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PALMTC /;"	d
MACH_TYPE_PALMTE2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PALMTE2 /;"	d
MACH_TYPE_PALMTX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PALMTX /;"	d
MACH_TYPE_PALMZ72	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PALMZ72 /;"	d
MACH_TYPE_PAZ00	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PAZ00 /;"	d
MACH_TYPE_PC7302	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PC7302 /;"	d
MACH_TYPE_PC7308	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PC7308 /;"	d
MACH_TYPE_PC9260_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PC9260_V2 /;"	d
MACH_TYPE_PCA100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCA100 /;"	d
MACH_TYPE_PCA102	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCA102 /;"	d
MACH_TYPE_PCATS_OVERLAY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCATS_OVERLAY /;"	d
MACH_TYPE_PCM027	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCM027 /;"	d
MACH_TYPE_PCM037	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCM037 /;"	d
MACH_TYPE_PCM038	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCM038 /;"	d
MACH_TYPE_PCM043	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCM043 /;"	d
MACH_TYPE_PCM048	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCM048 /;"	d
MACH_TYPE_PCM049	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCM049 /;"	d
MACH_TYPE_PCM051	include/configs/pcm051.h	/^#define MACH_TYPE_PCM051	/;"	d
MACH_TYPE_PCONTROL_G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PCONTROL_G20 /;"	d
MACH_TYPE_PEC_HC2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PEC_HC2 /;"	d
MACH_TYPE_PEC_TC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PEC_TC /;"	d
MACH_TYPE_PEMP_OMAP3_APOLLO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PEMP_OMAP3_APOLLO /;"	d
MACH_TYPE_PEPPER	include/configs/pepper.h	/^#define MACH_TYPE_PEPPER	/;"	d
MACH_TYPE_PERSONAL_SERVER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PERSONAL_SERVER /;"	d
MACH_TYPE_PFS168	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PFS168 /;"	d
MACH_TYPE_PGS_SITARA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PGS_SITARA /;"	d
MACH_TYPE_PHILHWANI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PHILHWANI /;"	d
MACH_TYPE_PHY3250	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PHY3250 /;"	d
MACH_TYPE_PICASSO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PICASSO /;"	d
MACH_TYPE_PICO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PICO /;"	d
MACH_TYPE_PICOCOM3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PICOCOM3 /;"	d
MACH_TYPE_PICOCOM4	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PICOCOM4 /;"	d
MACH_TYPE_PICOSAM9G45	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PICOSAM9G45 /;"	d
MACH_TYPE_PICOTUX2XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PICOTUX2XX /;"	d
MACH_TYPE_PIVICC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PIVICC /;"	d
MACH_TYPE_PLEB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PLEB /;"	d
MACH_TYPE_PM9261	include/configs/pm9261.h	/^#define MACH_TYPE_PM9261	/;"	d
MACH_TYPE_PM9263	include/configs/pm9263.h	/^#define MACH_TYPE_PM9263	/;"	d
MACH_TYPE_PM9G45	include/configs/pm9g45.h	/^#define MACH_TYPE_PM9G45	/;"	d
MACH_TYPE_PNX4008	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PNX4008 /;"	d
MACH_TYPE_POGO_E02	include/configs/pogo_e02.h	/^#define MACH_TYPE_POGO_E02	/;"	d
MACH_TYPE_POLYSAT1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_POLYSAT1 /;"	d
MACH_TYPE_POODLE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_POODLE /;"	d
MACH_TYPE_PORTUXG20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PORTUXG20 /;"	d
MACH_TYPE_POV15HD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_POV15HD /;"	d
MACH_TYPE_PREMIERWAVE_EN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PREMIERWAVE_EN /;"	d
MACH_TYPE_PRIMA2_EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PRIMA2_EVB /;"	d
MACH_TYPE_PTX7510	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PTX7510 /;"	d
MACH_TYPE_PTX7545	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PTX7545 /;"	d
MACH_TYPE_PT_SYSTEM3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PT_SYSTEM3 /;"	d
MACH_TYPE_PUNICA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PUNICA /;"	d
MACH_TYPE_PUPITRE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PUPITRE /;"	d
MACH_TYPE_PVM2030	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PVM2030 /;"	d
MACH_TYPE_PWB3090	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PWB3090 /;"	d
MACH_TYPE_PXA_IDP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PXA_IDP /;"	d
MACH_TYPE_PXM2	include/configs/pxm2.h	/^#define MACH_TYPE_PXM2	/;"	d
MACH_TYPE_PXWNAS_500_1000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PXWNAS_500_1000 /;"	d
MACH_TYPE_PYRAMID	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_PYRAMID /;"	d
MACH_TYPE_QBC9263	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QBC9263 /;"	d
MACH_TYPE_QIL_A9260	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QIL_A9260 /;"	d
MACH_TYPE_QONG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QONG /;"	d
MACH_TYPE_QSD8X50A_ST1_5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QSD8X50A_ST1_5 /;"	d
MACH_TYPE_QSD8X50_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QSD8X50_SURF /;"	d
MACH_TYPE_QSD8X72_FFA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QSD8X72_FFA /;"	d
MACH_TYPE_QSD8X72_SURF	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QSD8X72_SURF /;"	d
MACH_TYPE_QT2410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QT2410 /;"	d
MACH_TYPE_QUAD_SALSA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QUAD_SALSA /;"	d
MACH_TYPE_QUICKSTEP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_QUICKSTEP /;"	d
MACH_TYPE_R1801E	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_R1801E /;"	d
MACH_TYPE_RASCAL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RASCAL /;"	d
MACH_TYPE_RAUMFELD_CONNECTOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RAUMFELD_CONNECTOR /;"	d
MACH_TYPE_RAUMFELD_RC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RAUMFELD_RC /;"	d
MACH_TYPE_RAUMFELD_SPEAKER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RAUMFELD_SPEAKER /;"	d
MACH_TYPE_RD78X00_MASA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD78X00_MASA /;"	d
MACH_TYPE_RD88F5181L_FXO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD88F5181L_FXO /;"	d
MACH_TYPE_RD88F5181L_GE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD88F5181L_GE /;"	d
MACH_TYPE_RD88F5182	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD88F5182 /;"	d
MACH_TYPE_RD88F6183AP_GE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD88F6183AP_GE /;"	d
MACH_TYPE_RD88F6192_NAS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD88F6192_NAS /;"	d
MACH_TYPE_RD88F6281	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RD88F6281 /;"	d
MACH_TYPE_RDSTOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RDSTOR /;"	d
MACH_TYPE_RE2REV20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RE2REV20 /;"	d
MACH_TYPE_RE2REV21	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RE2REV21 /;"	d
MACH_TYPE_REAL6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REAL6410 /;"	d
MACH_TYPE_REALVIEW_EB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REALVIEW_EB /;"	d
MACH_TYPE_REALVIEW_PB1176	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REALVIEW_PB1176 /;"	d
MACH_TYPE_REALVIEW_PB11MP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REALVIEW_PB11MP /;"	d
MACH_TYPE_REALVIEW_PBA8	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REALVIEW_PBA8 /;"	d
MACH_TYPE_REALVIEW_PBX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REALVIEW_PBX /;"	d
MACH_TYPE_REMUS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REMUS /;"	d
MACH_TYPE_REXMAS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_REXMAS /;"	d
MACH_TYPE_RFL109145_SSRV	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RFL109145_SSRV /;"	d
MACH_TYPE_RHINO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RHINO /;"	d
MACH_TYPE_RIB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RIB /;"	d
MACH_TYPE_RIDER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RIDER /;"	d
MACH_TYPE_RIOT_BEI2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RIOT_BEI2 /;"	d
MACH_TYPE_RIOT_X37	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RIOT_X37 /;"	d
MACH_TYPE_RISCPC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RISCPC /;"	d
MACH_TYPE_ROADRUNNER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ROADRUNNER /;"	d
MACH_TYPE_ROCKHOPPER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ROCKHOPPER /;"	d
MACH_TYPE_ROVERPCS8	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ROVERPCS8 /;"	d
MACH_TYPE_ROVERX7	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ROVERX7 /;"	d
MACH_TYPE_ROVER_G8	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ROVER_G8 /;"	d
MACH_TYPE_RPC353	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RPC353 /;"	d
MACH_TYPE_RUBY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RUBY /;"	d
MACH_TYPE_RUBYS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RUBYS /;"	d
MACH_TYPE_RUMP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RUMP /;"	d
MACH_TYPE_RUT	include/configs/rut.h	/^#define MACH_TYPE_RUT	/;"	d
MACH_TYPE_RUT100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RUT100 /;"	d
MACH_TYPE_RV082	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RV082 /;"	d
MACH_TYPE_RX1950	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RX1950 /;"	d
MACH_TYPE_RX3715	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_RX3715 /;"	d
MACH_TYPE_S3C2413	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_S3C2413 /;"	d
MACH_TYPE_S3C2440	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_S3C2440 /;"	d
MACH_TYPE_S5500	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_S5500 /;"	d
MACH_TYPE_S5PC110_CRESPO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_S5PC110_CRESPO /;"	d
MACH_TYPE_SAAR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAAR /;"	d
MACH_TYPE_SAARB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAARB /;"	d
MACH_TYPE_SAARB_MG1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAARB_MG1 /;"	d
MACH_TYPE_SAGA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAGA /;"	d
MACH_TYPE_SALUDA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SALUDA /;"	d
MACH_TYPE_SAM9REPEATER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAM9REPEATER /;"	d
MACH_TYPE_SAM9_L9260	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAM9_L9260 /;"	d
MACH_TYPE_SANTIAGO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SANTIAGO /;"	d
MACH_TYPE_SAPPHIRE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SAPPHIRE /;"	d
MACH_TYPE_SBC3530	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SBC3530 /;"	d
MACH_TYPE_SBC6000X	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SBC6000X /;"	d
MACH_TYPE_SBCA11	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SBCA11 /;"	d
MACH_TYPE_SC575IPC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SC575IPC /;"	d
MACH_TYPE_SC575PLC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SC575PLC /;"	d
MACH_TYPE_SCB9328	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SCB9328 /;"	d
MACH_TYPE_SCIPHONE_G2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SCIPHONE_G2 /;"	d
MACH_TYPE_SC_SPS_1	include/configs/sc_sps_1.h	/^#define MACH_TYPE_SC_SPS_1	/;"	d
MACH_TYPE_SDI_ESS_9263	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SDI_ESS_9263 /;"	d
MACH_TYPE_SDVR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SDVR /;"	d
MACH_TYPE_SEABOARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SEABOARD /;"	d
MACH_TYPE_SERRANO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SERRANO /;"	d
MACH_TYPE_SFFSDR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SFFSDR /;"	d
MACH_TYPE_SGH_I740	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SGH_I740 /;"	d
MACH_TYPE_SHANNON	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHANNON /;"	d
MACH_TYPE_SHARESPACE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHARESPACE /;"	d
MACH_TYPE_SHARK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHARK /;"	d
MACH_TYPE_SHEEVAD	include/configs/gplugd.h	/^#define MACH_TYPE_SHEEVAD	/;"	d
MACH_TYPE_SHEEVAPLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHEEVAPLUG /;"	d
MACH_TYPE_SHENZHOU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHENZHOU /;"	d
MACH_TYPE_SHEPHERD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHEPHERD /;"	d
MACH_TYPE_SHOOTER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHOOTER /;"	d
MACH_TYPE_SHOOTER_CT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHOOTER_CT /;"	d
MACH_TYPE_SHOOTER_U	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHOOTER_U /;"	d
MACH_TYPE_SHORTLOIN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SHORTLOIN /;"	d
MACH_TYPE_SIEMENS_L0	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SIEMENS_L0 /;"	d
MACH_TYPE_SIMPAD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SIMPAD /;"	d
MACH_TYPE_SIMPLENET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SIMPLENET /;"	d
MACH_TYPE_SIMTEC_KIRKMOD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SIMTEC_KIRKMOD /;"	d
MACH_TYPE_SIM_ONE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SIM_ONE /;"	d
MACH_TYPE_SKY25	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SKY25 /;"	d
MACH_TYPE_SKY6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SKY6410 /;"	d
MACH_TYPE_SM1K	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SM1K /;"	d
MACH_TYPE_SMARTQ5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMARTQ5 /;"	d
MACH_TYPE_SMARTQ7	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMARTQ7 /;"	d
MACH_TYPE_SMARTQV3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMARTQV3 /;"	d
MACH_TYPE_SMARTQV5	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMARTQV5 /;"	d
MACH_TYPE_SMARTQV7	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMARTQV7 /;"	d
MACH_TYPE_SMARTWEB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMARTWEB /;"	d
MACH_TYPE_SMDK2410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK2410 /;"	d
MACH_TYPE_SMDK2412	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK2412 /;"	d
MACH_TYPE_SMDK2413	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK2413 /;"	d
MACH_TYPE_SMDK2416	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK2416 /;"	d
MACH_TYPE_SMDK2443	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK2443 /;"	d
MACH_TYPE_SMDK5250	include/configs/exynos5250-common.h	/^#define MACH_TYPE_SMDK5250	/;"	d
MACH_TYPE_SMDK5420	include/configs/exynos5420-common.h	/^#define MACH_TYPE_SMDK5420	/;"	d
MACH_TYPE_SMDK6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK6410 /;"	d
MACH_TYPE_SMDK6440	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK6440 /;"	d
MACH_TYPE_SMDK6442	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK6442 /;"	d
MACH_TYPE_SMDK6450	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDK6450 /;"	d
MACH_TYPE_SMDKC100	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDKC100 /;"	d
MACH_TYPE_SMDKC110	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDKC110 /;"	d
MACH_TYPE_SMDKC210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDKC210 /;"	d
MACH_TYPE_SMDKV210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDKV210 /;"	d
MACH_TYPE_SMDKV310	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SMDKV310 /;"	d
MACH_TYPE_SNAPPER_9260	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SNAPPER_9260 /;"	d
MACH_TYPE_SNAPPER_CL15	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SNAPPER_CL15 /;"	d
MACH_TYPE_SOFTWINNER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SOFTWINNER /;"	d
MACH_TYPE_SOLI_01	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SOLI_01 /;"	d
MACH_TYPE_SPADE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPADE /;"	d
MACH_TYPE_SPADE_LTE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPADE_LTE /;"	d
MACH_TYPE_SPDM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPDM /;"	d
MACH_TYPE_SPEAR1310	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR1310 /;"	d
MACH_TYPE_SPEAR1340	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR1340 /;"	d
MACH_TYPE_SPEAR300	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR300 /;"	d
MACH_TYPE_SPEAR310	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR310 /;"	d
MACH_TYPE_SPEAR320	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR320 /;"	d
MACH_TYPE_SPEAR600	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR600 /;"	d
MACH_TYPE_SPEAR900	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPEAR900 /;"	d
MACH_TYPE_SPICA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPICA /;"	d
MACH_TYPE_SPITZ	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPITZ /;"	d
MACH_TYPE_SPLENDOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPLENDOR /;"	d
MACH_TYPE_SPX_SAKURA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPX_SAKURA /;"	d
MACH_TYPE_SPYPLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SPYPLUG /;"	d
MACH_TYPE_SSC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SSC /;"	d
MACH_TYPE_STAMP9G20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STAMP9G20 /;"	d
MACH_TYPE_STAMP9G45	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STAMP9G45 /;"	d
MACH_TYPE_STARGATE2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STARGATE2 /;"	d
MACH_TYPE_STEELYARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STEELYARD /;"	d
MACH_TYPE_STELLA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STELLA /;"	d
MACH_TYPE_STMP378X	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STMP378X /;"	d
MACH_TYPE_STMP37XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STMP37XX /;"	d
MACH_TYPE_STRASBOURG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STRASBOURG /;"	d
MACH_TYPE_STRASBOURG_A2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STRASBOURG_A2 /;"	d
MACH_TYPE_STRETCHS7000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_STRETCHS7000 /;"	d
MACH_TYPE_SUNFIRE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SUNFIRE /;"	d
MACH_TYPE_SUNFLOWER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SUNFLOWER /;"	d
MACH_TYPE_SVCID	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SVCID /;"	d
MACH_TYPE_SVP5500	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SVP5500 /;"	d
MACH_TYPE_SVP8500V1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SVP8500V1 /;"	d
MACH_TYPE_SVP8500V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SVP8500V2 /;"	d
MACH_TYPE_SWARCOEXTMODEM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SWARCOEXTMODEM /;"	d
MACH_TYPE_SWEDA_TMS2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SWEDA_TMS2 /;"	d
MACH_TYPE_SX1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SX1 /;"	d
MACH_TYPE_SYNERGY	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SYNERGY /;"	d
MACH_TYPE_SYNOLOGY	include/configs/ds109.h	/^#define MACH_TYPE_SYNOLOGY /;"	d
MACH_TYPE_SYNOLOGY_6282	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_SYNOLOGY_6282 /;"	d
MACH_TYPE_T20	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_T20 /;"	d
MACH_TYPE_T5325	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_T5325 /;"	d
MACH_TYPE_T5388P	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_T5388P /;"	d
MACH_TYPE_T55	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_T55 /;"	d
MACH_TYPE_TAG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TAG /;"	d
MACH_TYPE_TAGW	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TAGW /;"	d
MACH_TYPE_TAM3517	include/configs/twister.h	/^#define MACH_TYPE_TAM3517	/;"	d
MACH_TYPE_TANNA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TANNA /;"	d
MACH_TYPE_TAVOREVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TAVOREVB /;"	d
MACH_TYPE_TAVOREVB3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TAVOREVB3 /;"	d
MACH_TYPE_TCC8000_SDK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TCC8000_SDK /;"	d
MACH_TYPE_TCT_HAMMER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TCT_HAMMER /;"	d
MACH_TYPE_TD3_REV1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TD3_REV1 /;"	d
MACH_TYPE_TEENOTE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TEENOTE /;"	d
MACH_TYPE_TEGRA_DAYTONA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TEGRA_DAYTONA /;"	d
MACH_TYPE_TEGRA_E1165	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TEGRA_E1165 /;"	d
MACH_TYPE_TEGRA_SWORDFISH	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TEGRA_SWORDFISH /;"	d
MACH_TYPE_TEGRA_VOGUE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TEGRA_VOGUE /;"	d
MACH_TYPE_TEM3X30	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TEM3X30 /;"	d
MACH_TYPE_TENDERLOIN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TENDERLOIN /;"	d
MACH_TYPE_TERASTATION_PRO2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TERASTATION_PRO2 /;"	d
MACH_TYPE_TERASTATION_WXL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TERASTATION_WXL /;"	d
MACH_TYPE_TERA_PRO2_RACK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TERA_PRO2_RACK /;"	d
MACH_TYPE_TETON_BGA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TETON_BGA /;"	d
MACH_TYPE_THALES_ADC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_THALES_ADC /;"	d
MACH_TYPE_THALES_CBC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_THALES_CBC /;"	d
MACH_TYPE_THEBE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_THEBE /;"	d
MACH_TYPE_TI8148EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TI8148EVM /;"	d
MACH_TYPE_TI8168EVM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TI8168EVM /;"	d
MACH_TYPE_TIAM335EVM	include/configs/am335x_evm.h	/^#define MACH_TYPE_TIAM335EVM	/;"	d
MACH_TYPE_TIAM335EVM	include/configs/baltos.h	/^#define MACH_TYPE_TIAM335EVM	/;"	d
MACH_TYPE_TIAM335EVM	include/configs/bav335x.h	/^#define MACH_TYPE_TIAM335EVM	/;"	d
MACH_TYPE_TIMU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TIMU /;"	d
MACH_TYPE_TIN307	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TIN307 /;"	d
MACH_TYPE_TIN510	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TIN510 /;"	d
MACH_TYPE_TINY_GURNARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TINY_GURNARD /;"	d
MACH_TYPE_TITAN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TITAN /;"	d
MACH_TYPE_TITANIUM	include/configs/titanium.h	/^#define MACH_TYPE_TITANIUM	/;"	d
MACH_TYPE_TJINC1000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TJINC1000 /;"	d
MACH_TYPE_TM_EFDC	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TM_EFDC /;"	d
MACH_TYPE_TN200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TN200 /;"	d
MACH_TYPE_TNETV107X	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TNETV107X /;"	d
MACH_TYPE_TNY_T3530	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TNY_T3530 /;"	d
MACH_TYPE_TONGA2_TFTTIMER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TONGA2_TFTTIMER /;"	d
MACH_TYPE_TOP9000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOP9000 /;"	d
MACH_TYPE_TOP9000_BSL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOP9000_BSL /;"	d
MACH_TYPE_TOP9000_EVAL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOP9000_EVAL /;"	d
MACH_TYPE_TOP9000_SU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOP9000_SU /;"	d
MACH_TYPE_TOP9000_TCU	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOP9000_TCU /;"	d
MACH_TYPE_TORBRECK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TORBRECK /;"	d
MACH_TYPE_TORNADO3240	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TORNADO3240 /;"	d
MACH_TYPE_TOSA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOSA /;"	d
MACH_TYPE_TOUCHBOOK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TOUCHBOOK /;"	d
MACH_TYPE_TPT_2_0	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TPT_2_0 /;"	d
MACH_TYPE_TQ6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TQ6410 /;"	d
MACH_TYPE_TQMA35	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TQMA35 /;"	d
MACH_TYPE_TQMA9263	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TQMA9263 /;"	d
MACH_TYPE_TRANSCEDE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRANSCEDE /;"	d
MACH_TYPE_TRATS	include/configs/trats.h	/^#define MACH_TYPE_TRATS	/;"	d
MACH_TYPE_TREO680	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TREO680 /;"	d
MACH_TYPE_TRICORDER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRICORDER /;"	d
MACH_TYPE_TRIDENT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRIDENT /;"	d
MACH_TYPE_TRIMSLICE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRIMSLICE /;"	d
MACH_TYPE_TRIPEL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRIPEL /;"	d
MACH_TYPE_TRITIP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRITIP /;"	d
MACH_TYPE_TRIZEPS4	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRIZEPS4 /;"	d
MACH_TYPE_TRIZEPS4WL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TRIZEPS4WL /;"	d
MACH_TYPE_TROUT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TROUT /;"	d
MACH_TYPE_TS209	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS209 /;"	d
MACH_TYPE_TS219	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS219 /;"	d
MACH_TYPE_TS3	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS3 /;"	d
MACH_TYPE_TS409	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS409 /;"	d
MACH_TYPE_TS41X	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS41X /;"	d
MACH_TYPE_TS42XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS42XX /;"	d
MACH_TYPE_TS47XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS47XX /;"	d
MACH_TYPE_TS4800	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS4800 /;"	d
MACH_TYPE_TS48XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS48XX /;"	d
MACH_TYPE_TS72XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS72XX /;"	d
MACH_TYPE_TS75XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS75XX /;"	d
MACH_TYPE_TS78XX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TS78XX /;"	d
MACH_TYPE_TSOPLOADER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TSOPLOADER /;"	d
MACH_TYPE_TSUNAGI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TSUNAGI /;"	d
MACH_TYPE_TTC_DKB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TTC_DKB /;"	d
MACH_TYPE_TUBE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TUBE /;"	d
MACH_TYPE_TULIP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TULIP /;"	d
MACH_TYPE_TUNA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TUNA /;"	d
MACH_TYPE_TUXRAIL	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TUXRAIL /;"	d
MACH_TYPE_TX28	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TX28 /;"	d
MACH_TYPE_TX53	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_TX53 /;"	d
MACH_TYPE_U300	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_U300 /;"	d
MACH_TYPE_U5500	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_U5500 /;"	d
MACH_TYPE_UBISYS_P9D_EVP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UBISYS_P9D_EVP /;"	d
MACH_TYPE_UDOO	include/configs/udoo.h	/^#define MACH_TYPE_UDOO	/;"	d
MACH_TYPE_UEMD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UEMD /;"	d
MACH_TYPE_UNINO1	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UNINO1 /;"	d
MACH_TYPE_UNISDEV	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UNISDEV /;"	d
MACH_TYPE_UNISENSE_MMM	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UNISENSE_MMM /;"	d
MACH_TYPE_UNIT2S	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UNIT2S /;"	d
MACH_TYPE_UNIVERSAL_C210	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UNIVERSAL_C210 /;"	d
MACH_TYPE_USB_A9260	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_USB_A9260 /;"	d
MACH_TYPE_USB_A9263	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_USB_A9263 /;"	d
MACH_TYPE_USDLOADER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_USDLOADER /;"	d
MACH_TYPE_UTM300	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_UTM300 /;"	d
MACH_TYPE_VALDEZ	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VALDEZ /;"	d
MACH_TYPE_VANGOGH	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VANGOGH /;"	d
MACH_TYPE_VC0718	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VC0718 /;"	d
MACH_TYPE_VENTANA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VENTANA /;"	d
MACH_TYPE_VERDI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VERDI /;"	d
MACH_TYPE_VERDI_LTE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VERDI_LTE /;"	d
MACH_TYPE_VERIDIS_A300	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VERIDIS_A300 /;"	d
MACH_TYPE_VERSATILE_AB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VERSATILE_AB /;"	d
MACH_TYPE_VERSATILE_PB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VERSATILE_PB /;"	d
MACH_TYPE_VEXPRESS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VEXPRESS /;"	d
MACH_TYPE_VIGOR	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VIGOR /;"	d
MACH_TYPE_VIPER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VIPER /;"	d
MACH_TYPE_VIPRINET	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VIPRINET /;"	d
MACH_TYPE_VIT_IBOX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VIT_IBOX /;"	d
MACH_TYPE_VIVO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VIVO /;"	d
MACH_TYPE_VIVOW_CT	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VIVOW_CT /;"	d
MACH_TYPE_VMX25	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VMX25 /;"	d
MACH_TYPE_VMX51	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VMX51 /;"	d
MACH_TYPE_VMX53	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VMX53 /;"	d
MACH_TYPE_VOICEBLUE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VOICEBLUE /;"	d
MACH_TYPE_VPAC270	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VPAC270 /;"	d
MACH_TYPE_VPR200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VPR200 /;"	d
MACH_TYPE_VR1000	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VR1000 /;"	d
MACH_TYPE_VSTMS	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VSTMS /;"	d
MACH_TYPE_VVBOX_SDLITE2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VVBOX_SDLITE2 /;"	d
MACH_TYPE_VVBOX_SDORIG2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VVBOX_SDORIG2 /;"	d
MACH_TYPE_VVBOX_SDPRO4	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_VVBOX_SDPRO4 /;"	d
MACH_TYPE_W21	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_W21 /;"	d
MACH_TYPE_W90N960EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_W90N960EVB /;"	d
MACH_TYPE_W90P910EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_W90P910EVB /;"	d
MACH_TYPE_W90P950EVB	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_W90P950EVB /;"	d
MACH_TYPE_WANDBOARD	include/configs/wandboard.h	/^#define MACH_TYPE_WANDBOARD	/;"	d
MACH_TYPE_WARIO	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WARIO /;"	d
MACH_TYPE_WASABI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WASABI /;"	d
MACH_TYPE_WATSON_EFM_PLUGIN	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WATSON_EFM_PLUGIN /;"	d
MACH_TYPE_WB40N	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WB40N /;"	d
MACH_TYPE_WBD111	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WBD111 /;"	d
MACH_TYPE_WBD222	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WBD222 /;"	d
MACH_TYPE_WG302V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WG302V2 /;"	d
MACH_TYPE_WHISTLER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WHISTLER /;"	d
MACH_TYPE_WLAN_COMPUTER	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WLAN_COMPUTER /;"	d
MACH_TYPE_WLF_CRAGG_6410	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WLF_CRAGG_6410 /;"	d
MACH_TYPE_WM8505_7IN_NETBOOK	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WM8505_7IN_NETBOOK /;"	d
MACH_TYPE_WM8650REFBOARD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WM8650REFBOARD /;"	d
MACH_TYPE_WN802T	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WN802T /;"	d
MACH_TYPE_WNR854T	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WNR854T /;"	d
MACH_TYPE_WORK_92105	include/configs/work_92105.h	/^#define MACH_TYPE_WORK_92105	/;"	d
MACH_TYPE_WRT350N_V2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WRT350N_V2 /;"	d
MACH_TYPE_WTPLUG	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_WTPLUG /;"	d
MACH_TYPE_XARINA	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_XARINA /;"	d
MACH_TYPE_XCEP	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_XCEP /;"	d
MACH_TYPE_XILINX	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_XILINX /;"	d
MACH_TYPE_XILINX_EP107	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_XILINX_EP107 /;"	d
MACH_TYPE_XP860	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_XP860 /;"	d
MACH_TYPE_XSBASE255	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_XSBASE255 /;"	d
MACH_TYPE_YANOMAMI	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_YANOMAMI /;"	d
MACH_TYPE_YL9200	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_YL9200 /;"	d
MACH_TYPE_Z3_814X_MOD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_Z3_814X_MOD /;"	d
MACH_TYPE_Z3_816X_MOD	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_Z3_816X_MOD /;"	d
MACH_TYPE_ZIPIT2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ZIPIT2 /;"	d
MACH_TYPE_ZMX25	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ZMX25 /;"	d
MACH_TYPE_ZYLONITE	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ZYLONITE /;"	d
MACH_TYPE_ZYLONITE2	arch/arm/include/asm/mach-types.h	/^#define MACH_TYPE_ZYLONITE2 /;"	d
MACID0	drivers/net/ax88180.h	/^#define MACID0	/;"	d
MACID1	drivers/net/ax88180.h	/^#define MACID1	/;"	d
MACID2	drivers/net/ax88180.h	/^#define MACID2	/;"	d
MACINDEX	drivers/net/davinci_emac.h	/^	dv_reg		MACINDEX;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACINTMASKCLEAR	drivers/net/davinci_emac.h	/^	dv_reg		MACINTMASKCLEAR;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACINTMASKSET	drivers/net/davinci_emac.h	/^	dv_reg		MACINTMASKSET;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACINTSTATMASKED	drivers/net/davinci_emac.h	/^	dv_reg		MACINTSTATMASKED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACINTSTATRAW	drivers/net/davinci_emac.h	/^	dv_reg		MACINTSTATRAW;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACINVECTOR	drivers/net/davinci_emac.h	/^	dv_reg		MACINVECTOR;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACNTL	include/sym53c8xx.h	/^#define MACNTL	/;"	d
MACREG_ADDR	drivers/net/dnet.h	/^	u32 MACREG_ADDR;	\/* Mac-Reg Addr *\/$/;"	m	struct:dnet_registers	typeref:typename:u32
MACREG_DATA	drivers/net/dnet.h	/^	u32 MACREG_DATA;	\/* Mac-Reg Data *\/$/;"	m	struct:dnet_registers	typeref:typename:u32
MACRO_RST	arch/arm/mach-exynos/include/mach/dp.h	/^#define MACRO_RST	/;"	d
MACSRCADDRHI	drivers/net/davinci_emac.h	/^	dv_reg		MACSRCADDRHI;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACSRCADDRLO	drivers/net/davinci_emac.h	/^	dv_reg		MACSRCADDRLO;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MACSTATUS	drivers/net/davinci_emac.h	/^	dv_reg		MACSTATUS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
MAC_ADDR0	drivers/net/ethoc.c	/^#define	MAC_ADDR0	/;"	d	file:
MAC_ADDR1	drivers/net/ethoc.c	/^#define	MAC_ADDR1	/;"	d	file:
MAC_ADDRESS_HIGH	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_ADDRESS_HIGH /;"	d
MAC_ADDRESS_LOW	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_ADDRESS_LOW /;"	d
MAC_ADDRH	board/micronas/vct/smc_eeprom.c	/^#define MAC_ADDRH	/;"	d	file:
MAC_ADDRL	board/micronas/vct/smc_eeprom.c	/^#define MAC_ADDRL	/;"	d	file:
MAC_ADDR_LEN	drivers/net/ks8851_mll.h	/^#define MAC_ADDR_LEN	/;"	d
MAC_ADDR_LEN	drivers/net/rtl8169.c	/^#define MAC_ADDR_LEN	/;"	d	file:
MAC_ADDR_LEN	include/tsec.h	/^#define MAC_ADDR_LEN	/;"	d
MAC_ADDR_OFFSET	board/compulab/common/eeprom.c	/^#define MAC_ADDR_OFFSET	/;"	d	file:
MAC_ADDR_OFFSET_LEGACY	board/compulab/common/eeprom.c	/^#define MAC_ADDR_OFFSET_LEGACY	/;"	d	file:
MAC_AUTO_PAD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_AUTO_PAD /;"	d
MAC_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MAC_BASE	/;"	d
MAC_BIG_ENDIAN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_BIG_ENDIAN /;"	d
MAC_CONFIG_1_LOOP_BACK	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_LOOP_BACK	/;"	d	file:
MAC_CONFIG_1_RESET_RX_FUNCTION	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_RESET_RX_FUNCTION	/;"	d	file:
MAC_CONFIG_1_RESET_RX_MAC	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_RESET_RX_MAC	/;"	d	file:
MAC_CONFIG_1_RESET_TX_FUNCTION	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_RESET_TX_FUNCTION	/;"	d	file:
MAC_CONFIG_1_RESET_TX_MAC	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_RESET_TX_MAC	/;"	d	file:
MAC_CONFIG_1_RX_ENABLE	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_RX_ENABLE	/;"	d	file:
MAC_CONFIG_1_RX_FLOW_CONTROL	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_RX_FLOW_CONTROL	/;"	d	file:
MAC_CONFIG_1_SIM_RESET	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_SIM_RESET	/;"	d	file:
MAC_CONFIG_1_SOFT_RESET	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_SOFT_RESET	/;"	d	file:
MAC_CONFIG_1_SYNC_RX_ENABLE	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_SYNC_RX_ENABLE	/;"	d	file:
MAC_CONFIG_1_SYNC_TX_ENABLE	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_SYNC_TX_ENABLE	/;"	d	file:
MAC_CONFIG_1_TX_ENABLE	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_TX_ENABLE	/;"	d	file:
MAC_CONFIG_1_TX_FLOW_CONTROL	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_1_TX_FLOW_CONTROL	/;"	d	file:
MAC_CONFIG_2_CRC_ENABLE	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_CRC_ENABLE	/;"	d	file:
MAC_CONFIG_2_FULL_DUPLEX	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_FULL_DUPLEX	/;"	d	file:
MAC_CONFIG_2_HUGE_FRAME	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_HUGE_FRAME	/;"	d	file:
MAC_CONFIG_2_INTERFACE_MODE	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_INTERFACE_MODE(/;"	d	file:
MAC_CONFIG_2_LENGTH_CHECK	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_LENGTH_CHECK	/;"	d	file:
MAC_CONFIG_2_PAD_CRC	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_PAD_CRC	/;"	d	file:
MAC_CONFIG_2_PREAMBLE_LENGTH	drivers/net/tsi108_eth.c	/^#define MAC_CONFIG_2_PREAMBLE_LENGTH(/;"	d	file:
MAC_CONTROL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_CONTROL /;"	d
MAC_CR	drivers/net/smc911x.h	/^#define MAC_CR	/;"	d
MAC_CR	drivers/usb/eth/smsc95xx.c	/^#define MAC_CR	/;"	d	file:
MAC_CR_BCAST	drivers/net/smc911x.h	/^#define MAC_CR_BCAST	/;"	d
MAC_CR_BOLMT_MASK	drivers/net/smc911x.h	/^#define MAC_CR_BOLMT_MASK	/;"	d
MAC_CR_DFCHK	drivers/net/smc911x.h	/^#define MAC_CR_DFCHK	/;"	d
MAC_CR_DISRTY	drivers/net/smc911x.h	/^#define MAC_CR_DISRTY	/;"	d
MAC_CR_FDPX	drivers/net/smc911x.h	/^#define MAC_CR_FDPX	/;"	d
MAC_CR_HBDIS	drivers/net/smc911x.h	/^#define MAC_CR_HBDIS	/;"	d
MAC_CR_HFILT	drivers/net/smc911x.h	/^#define MAC_CR_HFILT	/;"	d
MAC_CR_HPFILT	drivers/net/smc911x.h	/^#define MAC_CR_HPFILT	/;"	d
MAC_CR_HPFILT_	drivers/usb/eth/smsc95xx.c	/^#define MAC_CR_HPFILT_	/;"	d	file:
MAC_CR_INVFILT	drivers/net/smc911x.h	/^#define MAC_CR_INVFILT	/;"	d
MAC_CR_LCOLL	drivers/net/smc911x.h	/^#define MAC_CR_LCOLL	/;"	d
MAC_CR_LOOPBK	drivers/net/smc911x.h	/^#define MAC_CR_LOOPBK	/;"	d
MAC_CR_MCPAS	drivers/net/smc911x.h	/^#define MAC_CR_MCPAS	/;"	d
MAC_CR_MCPAS_	drivers/usb/eth/smsc95xx.c	/^#define MAC_CR_MCPAS_	/;"	d	file:
MAC_CR_PADSTR	drivers/net/smc911x.h	/^#define MAC_CR_PADSTR	/;"	d
MAC_CR_PASSBAD	drivers/net/smc911x.h	/^#define MAC_CR_PASSBAD	/;"	d
MAC_CR_PRMS	drivers/net/smc911x.h	/^#define MAC_CR_PRMS	/;"	d
MAC_CR_PRMS_	drivers/usb/eth/smsc95xx.c	/^#define MAC_CR_PRMS_	/;"	d	file:
MAC_CR_RCVOWN	drivers/net/smc911x.h	/^#define MAC_CR_RCVOWN	/;"	d
MAC_CR_RXALL	drivers/net/smc911x.h	/^#define MAC_CR_RXALL	/;"	d
MAC_CR_RXEN	drivers/net/smc911x.h	/^#define MAC_CR_RXEN	/;"	d
MAC_CR_RXEN_	drivers/usb/eth/smsc95xx.c	/^#define MAC_CR_RXEN_	/;"	d	file:
MAC_CR_TXEN	drivers/net/smc911x.h	/^#define MAC_CR_TXEN	/;"	d
MAC_CR_TXEN_	drivers/usb/eth/smsc95xx.c	/^#define MAC_CR_TXEN_	/;"	d	file:
MAC_CSR_CMD	board/micronas/vct/smc_eeprom.c	/^#define MAC_CSR_CMD	/;"	d	file:
MAC_CSR_CMD	drivers/net/smc911x.h	/^#define MAC_CSR_CMD	/;"	d
MAC_CSR_CMD_CSR_ADDR	drivers/net/smc911x.h	/^#define	 MAC_CSR_CMD_CSR_ADDR	/;"	d
MAC_CSR_CMD_CSR_BUSY	board/micronas/vct/smc_eeprom.c	/^#define  MAC_CSR_CMD_CSR_BUSY	/;"	d	file:
MAC_CSR_CMD_CSR_BUSY	drivers/net/smc911x.h	/^#define	 MAC_CSR_CMD_CSR_BUSY	/;"	d
MAC_CSR_CMD_RNW	board/micronas/vct/smc_eeprom.c	/^#define  MAC_CSR_CMD_RNW	/;"	d	file:
MAC_CSR_CMD_R_NOT_W	drivers/net/smc911x.h	/^#define	 MAC_CSR_CMD_R_NOT_W	/;"	d
MAC_CSR_DATA	board/micronas/vct/smc_eeprom.c	/^#define MAC_CSR_DATA	/;"	d	file:
MAC_CSR_DATA	drivers/net/smc911x.h	/^#define MAC_CSR_DATA	/;"	d
MAC_DECODE_SIZE	drivers/net/e1000.h	/^#define MAC_DECODE_SIZE /;"	d
MAC_DEF_CHECK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_DEF_CHECK /;"	d
MAC_DEF_HI	drivers/net/lan91c96.h	/^#define MAC_DEF_HI /;"	d
MAC_DEF_LO	drivers/net/lan91c96.h	/^#define MAC_DEF_LO /;"	d
MAC_DEF_MED	drivers/net/lan91c96.h	/^#define MAC_DEF_MED /;"	d
MAC_DISABLE_BCAST	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_DISABLE_BCAST /;"	d
MAC_DISABLE_RETRY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_DISABLE_RETRY /;"	d
MAC_DISABLE_RX_OWN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_DISABLE_RX_OWN /;"	d
MAC_DIV_CON_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MAC_DIV_CON_MASK = 0x1f,$/;"	e	enum:__anon3783c4e20303
MAC_DIV_CON_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MAC_DIV_CON_SHIFT = 0xf,$/;"	e	enum:__anon3783c4e20303
MAC_DMA_RESET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_DMA_RESET /;"	d
MAC_DMA_RX	drivers/net/bcm-sf2-eth.h	/^	MAC_DMA_RX = 2$/;"	e	enum:__anonacee30370103
MAC_DMA_TX	drivers/net/bcm-sf2-eth.h	/^	MAC_DMA_TX = 1,$/;"	e	enum:__anonacee30370103
MAC_DRIVER_MAGIC	disk/part_mac.h	/^#define MAC_DRIVER_MAGIC	/;"	d
MAC_EEP_ERACE	board/renesas/sh7785lcr/rtl8169.h	/^#define MAC_EEP_ERACE	/;"	d
MAC_EEP_ERACE	drivers/net/ax88796.h	/^#define MAC_EEP_ERACE	/;"	d
MAC_EEP_EWDS	board/renesas/sh7785lcr/rtl8169.h	/^#define MAC_EEP_EWDS	/;"	d
MAC_EEP_EWDS	drivers/net/ax88796.h	/^#define MAC_EEP_EWDS	/;"	d
MAC_EEP_EWEN	board/renesas/sh7785lcr/rtl8169.h	/^#define MAC_EEP_EWEN	/;"	d
MAC_EEP_EWEN	drivers/net/ax88796.h	/^#define MAC_EEP_EWEN	/;"	d
MAC_EEP_READ	board/renesas/sh7785lcr/rtl8169.h	/^#define MAC_EEP_READ	/;"	d
MAC_EEP_READ	drivers/net/ax88796.h	/^#define MAC_EEP_READ	/;"	d
MAC_EEP_WRITE	board/renesas/sh7785lcr/rtl8169.h	/^#define MAC_EEP_WRITE	/;"	d
MAC_EEP_WRITE	drivers/net/ax88796.h	/^#define MAC_EEP_WRITE	/;"	d
MAC_ENTRY_NUMBERS	include/part.h	/^#define MAC_ENTRY_NUMBERS	/;"	d
MAC_EN_CACHEABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EN_CACHEABLE /;"	d
MAC_EN_CLOCK_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EN_CLOCK_ENABLE /;"	d
MAC_EN_RESET0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EN_RESET0 /;"	d
MAC_EN_RESET1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EN_RESET1 /;"	d
MAC_EN_RESET2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EN_RESET2 /;"	d
MAC_EN_TOSS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EN_TOSS /;"	d
MAC_EOC	include/twl6030.h	/^#define MAC_EOC	/;"	d
MAC_EXT_LOOPBACK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_EXT_LOOPBACK /;"	d
MAC_FLOW_CNTRL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_FLOW_CNTRL /;"	d
MAC_FLOW_CNTRL_BUSY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_FLOW_CNTRL_BUSY /;"	d
MAC_FLOW_CNTRL_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_FLOW_CNTRL_ENABLE /;"	d
MAC_FULL_DUPLEX	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_FULL_DUPLEX /;"	d
MAC_HASH_MODE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_HASH_MODE /;"	d
MAC_HASH_ONLY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_HASH_ONLY /;"	d
MAC_ID_BASE_ADDR	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MAC_ID_BASE_ADDR	/;"	d
MAC_INT_LOOPBACK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_INT_LOOPBACK /;"	d
MAC_INVERSE_FILTER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_INVERSE_FILTER /;"	d
MAC_LATE_COL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_LATE_COL /;"	d
MAC_LEN	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define MAC_LEN	/;"	d
MAC_MAX_FRAME_SZ	drivers/net/designware.h	/^#define MAC_MAX_FRAME_SZ	/;"	d
MAC_MCAST_HIGH	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MCAST_HIGH /;"	d
MAC_MCAST_LOW	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MCAST_LOW /;"	d
MAC_MII_BUSY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MII_BUSY /;"	d
MAC_MII_CNTRL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MII_CNTRL /;"	d
MAC_MII_DATA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MII_DATA /;"	d
MAC_MII_READ	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MII_READ /;"	d
MAC_MII_WRITE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_MII_WRITE /;"	d
MAC_NORMAL_MODE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_NORMAL_MODE /;"	d
MAC_OFF	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define MAC_OFF	/;"	d
MAC_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MAC_OFFSET	/;"	d
MAC_PARTITION_MAGIC	disk/part_mac.h	/^#define MAC_PARTITION_MAGIC	/;"	d
MAC_PASS_ALL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_PASS_ALL /;"	d
MAC_PASS_ALL_MULTI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_PASS_ALL_MULTI /;"	d
MAC_PASS_CONTROL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_PASS_CONTROL /;"	d
MAC_PROMISCUOUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_PROMISCUOUS /;"	d
MAC_RD_CMD	board/micronas/vct/smc_eeprom.c	/^#define  MAC_RD_CMD(/;"	d	file:
MAC_RX_ALL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_ALL /;"	d
MAC_RX_BUFF0_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF0_ADDR /;"	d
MAC_RX_BUFF0_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF0_STATUS /;"	d
MAC_RX_BUFF1_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF1_ADDR /;"	d
MAC_RX_BUFF1_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF1_STATUS /;"	d
MAC_RX_BUFF2_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF2_ADDR /;"	d
MAC_RX_BUFF2_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF2_STATUS /;"	d
MAC_RX_BUFF3_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF3_ADDR /;"	d
MAC_RX_BUFF3_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_BUFF3_STATUS /;"	d
MAC_RX_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_RX_ENABLE /;"	d
MAC_SET_BL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_SET_BL(/;"	d
MAC_SET_MII_SELECT_PHY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_SET_MII_SELECT_PHY(/;"	d
MAC_SET_MII_SELECT_REG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_SET_MII_SELECT_REG(/;"	d
MAC_SET_PAUSE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_SET_PAUSE(/;"	d
MAC_SIZE	drivers/crypto/fsl/desc.h	/^#define MAC_SIZE	/;"	d
MAC_STATUS_BOOTABLE	disk/part_mac.h	/^#define MAC_STATUS_BOOTABLE	/;"	d
MAC_STR_SZ	board/keymile/common/ivm.c	/^#define MAC_STR_SZ	/;"	d	file:
MAC_TABLE_AGE	drivers/net/vsc9953.c	/^	MAC_TABLE_AGE,$/;"	e	enum:mac_table_cmd	file:
MAC_TABLE_FORGET	drivers/net/vsc9953.c	/^	MAC_TABLE_FORGET,$/;"	e	enum:mac_table_cmd	file:
MAC_TABLE_GET_NEXT	drivers/net/vsc9953.c	/^	MAC_TABLE_GET_NEXT,$/;"	e	enum:mac_table_cmd	file:
MAC_TABLE_LEARN	drivers/net/vsc9953.c	/^	MAC_TABLE_LEARN,$/;"	e	enum:mac_table_cmd	file:
MAC_TABLE_LOOKUP	drivers/net/vsc9953.c	/^	MAC_TABLE_LOOKUP,$/;"	e	enum:mac_table_cmd	file:
MAC_TABLE_READ	drivers/net/vsc9953.c	/^	MAC_TABLE_READ,$/;"	e	enum:mac_table_cmd	file:
MAC_TABLE_WRITE	drivers/net/vsc9953.c	/^	MAC_TABLE_WRITE,$/;"	e	enum:mac_table_cmd	file:
MAC_TIMEOUT	board/micronas/vct/smc_eeprom.c	/^#define MAC_TIMEOUT	/;"	d	file:
MAC_TIMEOUT	drivers/net/calxedaxgmac.c	/^#define MAC_TIMEOUT	/;"	d	file:
MAC_TX_BUFF0_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF0_ADDR /;"	d
MAC_TX_BUFF0_LEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF0_LEN /;"	d
MAC_TX_BUFF0_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF0_STATUS /;"	d
MAC_TX_BUFF1_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF1_ADDR /;"	d
MAC_TX_BUFF1_LEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF1_LEN /;"	d
MAC_TX_BUFF1_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF1_STATUS /;"	d
MAC_TX_BUFF2_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF2_ADDR /;"	d
MAC_TX_BUFF2_LEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF2_LEN /;"	d
MAC_TX_BUFF2_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF2_STATUS /;"	d
MAC_TX_BUFF3_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF3_ADDR /;"	d
MAC_TX_BUFF3_LEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF3_LEN /;"	d
MAC_TX_BUFF3_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_BUFF3_STATUS /;"	d
MAC_TX_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_TX_ENABLE /;"	d
MAC_VLAN1_TAG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_VLAN1_TAG /;"	d
MAC_VLAN2_TAG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MAC_VLAN2_TAG /;"	d
MAC_WR_CMD	board/micronas/vct/smc_eeprom.c	/^#define  MAC_WR_CMD(/;"	d	file:
MADD_LEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	MADD_LEN	/;"	d
MADR_PHY_MASK	drivers/net/lpc32xx_eth.c	/^#define MADR_PHY_MASK /;"	d	file:
MADR_PHY_OFFSET	drivers/net/lpc32xx_eth.c	/^#define MADR_PHY_OFFSET /;"	d	file:
MADR_REG_MASK	drivers/net/lpc32xx_eth.c	/^#define MADR_REG_MASK /;"	d	file:
MADR_REG_OFFSET	drivers/net/lpc32xx_eth.c	/^#define MADR_REG_OFFSET /;"	d	file:
MAFCR	drivers/net/sh_eth.h	/^	MAFCR,$/;"	e	enum:__anon5ef54f5a0103
MAGENTA	board/bf533-stamp/video.h	/^#define MAGENTA /;"	d
MAGENTA	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
MAGIC_BYTE0	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define MAGIC_BYTE0	/;"	d
MAGIC_BYTE1	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define MAGIC_BYTE1	/;"	d
MAGIC_CHIP	board/siemens/draco/board.h	/^#define MAGIC_CHIP	/;"	d
MAGIC_EN	drivers/usb/eth/r8152.h	/^#define MAGIC_EN	/;"	d
MAGIC_END_OF_CHAIN	board/gdsys/p1022/controlcenterd-id.c	/^	MAGIC_END_OF_CHAIN	= 0x00000000,$/;"	e	enum:__anonaa5ecaea0203	file:
MAGIC_HMAC	board/gdsys/p1022/controlcenterd-id.c	/^	MAGIC_HMAC		= 0x68616300,$/;"	e	enum:__anonaa5ecaea0203	file:
MAGIC_KEY_PROGRAM	board/gdsys/p1022/controlcenterd-id.c	/^	MAGIC_KEY_PROGRAM	= 0x68726500,$/;"	e	enum:__anonaa5ecaea0203	file:
MAGIC_LEN	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define MAGIC_LEN	/;"	d
MAGIC_MASK	drivers/bootcount/bootcount_blackfin.c	/^#define MAGIC_MASK /;"	d	file:
MAGIC_OFF	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define MAGIC_OFF	/;"	d
MAHR	drivers/net/sh_eth.h	/^	MAHR,$/;"	e	enum:__anon5ef54f5a0103
MAILBOX_BIOS_CMD_FSM_MEASURE_INTVL	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_FSM_MEASURE_INTVL	/;"	d
MAILBOX_BIOS_CMD_READ_C9C10_VOLTAGE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_READ_C9C10_VOLTAGE	/;"	d
MAILBOX_BIOS_CMD_READ_CALIBRATION	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_READ_CALIBRATION	/;"	d
MAILBOX_BIOS_CMD_READ_PCH_POWER	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_READ_PCH_POWER	/;"	d
MAILBOX_BIOS_CMD_READ_PCH_POWER_EXT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_READ_PCH_POWER_EXT	/;"	d
MAILBOX_BIOS_CMD_READ_PCS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_READ_PCS	/;"	d
MAILBOX_BIOS_CMD_WRITE_C9C10_VOLTAGE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_WRITE_C9C10_VOLTAGE	/;"	d
MAILBOX_BIOS_CMD_WRITE_PCS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_CMD_WRITE_PCS	/;"	d
MAILBOX_BIOS_ERROR_ILLEGAL_DATA	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_ILLEGAL_DATA	/;"	d
MAILBOX_BIOS_ERROR_ILLEGAL_VR_ID	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_ILLEGAL_VR_ID	/;"	d
MAILBOX_BIOS_ERROR_INVALID_COMMAND	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_INVALID_COMMAND	/;"	d
MAILBOX_BIOS_ERROR_NONE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_NONE	/;"	d
MAILBOX_BIOS_ERROR_RESERVED	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_RESERVED	/;"	d
MAILBOX_BIOS_ERROR_TIMEOUT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_TIMEOUT	/;"	d
MAILBOX_BIOS_ERROR_VR_ERROR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_VR_ERROR	/;"	d
MAILBOX_BIOS_ERROR_VR_INTERFACE_LOCKED	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_BIOS_ERROR_VR_INTERFACE_LOCKED	/;"	d
MAILBOX_RUN_BUSY	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  MAILBOX_RUN_BUSY	/;"	d
MAINBOARD_POWER_KEEP	arch/x86/include/asm/arch-broadwell/pm.h	/^#define MAINBOARD_POWER_KEEP	/;"	d
MAINBOARD_POWER_KEEP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define MAINBOARD_POWER_KEEP	/;"	d
MAINBOARD_POWER_OFF	arch/x86/include/asm/arch-broadwell/pm.h	/^#define MAINBOARD_POWER_OFF	/;"	d
MAINBOARD_POWER_OFF	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define MAINBOARD_POWER_OFF	/;"	d
MAINBOARD_POWER_ON	arch/x86/include/asm/arch-broadwell/pm.h	/^#define MAINBOARD_POWER_ON	/;"	d
MAINBOARD_POWER_ON	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define MAINBOARD_POWER_ON	/;"	d
MAIN_ACCESS	drivers/mtd/nand/denali.c	/^#define MAIN_ACCESS	/;"	d	file:
MAIN_ACCESS	drivers/mtd/nand/denali_spl.c	/^#define MAIN_ACCESS	/;"	d	file:
MAIN_AXI_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	MAIN_AXI_CLK_ROOT = 16,$/;"	e	enum:clk_root_index
MAIN_AXI_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
MAIN_AXI_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MAIN_AXI_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
MAIN_CLK_RATE	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^#define MAIN_CLK_RATE	/;"	d
MAIN_FRACFREQ1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_FRACFREQ1	/;"	d	file:
MAIN_FRACFREQ2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_FRACFREQ2	/;"	d	file:
MAIN_FRACFREQ3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_FRACFREQ3	/;"	d	file:
MAIN_FRACFREQ4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_FRACFREQ4	/;"	d	file:
MAIN_FRACFREQ5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_FRACFREQ5	/;"	d	file:
MAIN_HEADING	scripts/kconfig/nconf.h	/^	MAIN_HEADING,$/;"	e	enum:__anon6c8863760103
MAIN_INTFREQ1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_INTFREQ1	/;"	d	file:
MAIN_INTFREQ2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_INTFREQ2	/;"	d	file:
MAIN_INTFREQ3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_INTFREQ3	/;"	d	file:
MAIN_INTFREQ4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_INTFREQ4	/;"	d	file:
MAIN_INTFREQ5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_INTFREQ5	/;"	d	file:
MAIN_MDIV1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV1	/;"	d	file:
MAIN_MDIV2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV2	/;"	d	file:
MAIN_MDIV3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV3	/;"	d	file:
MAIN_MDIV4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV4	/;"	d	file:
MAIN_MDIV5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV5	/;"	d	file:
MAIN_MDIV6	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV6	/;"	d	file:
MAIN_MDIV7	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_MDIV7	/;"	d	file:
MAIN_MENU_BACK	scripts/kconfig/nconf.h	/^	MAIN_MENU_BACK,$/;"	e	enum:__anon6c8863760103
MAIN_MENU_BOX	scripts/kconfig/nconf.h	/^	MAIN_MENU_BOX,$/;"	e	enum:__anon6c8863760103
MAIN_MENU_FORE	scripts/kconfig/nconf.h	/^	MAIN_MENU_FORE,$/;"	e	enum:__anon6c8863760103
MAIN_MENU_GREY	scripts/kconfig/nconf.h	/^	MAIN_MENU_GREY,$/;"	e	enum:__anon6c8863760103
MAIN_MENU_HEADING	scripts/kconfig/nconf.h	/^	MAIN_MENU_HEADING,$/;"	e	enum:__anon6c8863760103
MAIN_N	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_N	/;"	d	file:
MAIN_P	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^#define MAIN_P	/;"	d	file:
MAIN_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^	MAIN_PLL,$/;"	e	enum:__anonc27926650203
MAIN_PLL_DIV	include/configs/pm9261.h	/^#define MAIN_PLL_DIV	/;"	d
MAIN_PLL_DIV	include/configs/pm9263.h	/^#define MAIN_PLL_DIV	/;"	d
MAIN_QSORT_DEPTH_THRESH	lib/bzip2/bzlib_blocksort.c	/^#define MAIN_QSORT_DEPTH_THRESH /;"	d	file:
MAIN_QSORT_SMALL_THRESH	lib/bzip2/bzlib_blocksort.c	/^#define MAIN_QSORT_SMALL_THRESH /;"	d	file:
MAIN_QSORT_STACK_SIZE	lib/bzip2/bzlib_blocksort.c	/^#define MAIN_QSORT_STACK_SIZE /;"	d	file:
MAIN_SINGLEBIT_ERROR	drivers/mtd/nand/mxc_nand.c	/^#define MAIN_SINGLEBIT_ERROR /;"	d	file:
MAIN_SPARE_ACCESS	drivers/mtd/nand/denali.c	/^#define MAIN_SPARE_ACCESS	/;"	d	file:
MAIN_VCO_BASE	arch/arm/mach-socfpga/wrap_pll_config.c	/^#define MAIN_VCO_BASE /;"	d	file:
MAJOR	include/linux/compat.h	/^#define MAJOR(/;"	d
MAJOR_SW_VERSION	board/cm5200/cm5200.h	/^	MAJOR_SW_VERSION,	\/* 6 *\/$/;"	e	enum:__anonb595836f0103
MAJOR_SW_VERSION_LEN	board/cm5200/cm5200.h	/^#define MAJOR_SW_VERSION_LEN	/;"	d
MAJOR_SW_VERSION_OFFSET	board/cm5200/cm5200.h	/^#define MAJOR_SW_VERSION_OFFSET	/;"	d
MAKE_CFGVAL	arch/arm/include/asm/imx-common/boot_mode.h	/^#define MAKE_CFGVAL(/;"	d
MAKE_COMPARABLE_REVISION	drivers/mtd/nand/denali.h	/^#define MAKE_COMPARABLE_REVISION(/;"	d
MAKE_FLASH	board/cm-bf537e/gpio_cfi_flash.c	/^#define MAKE_FLASH(/;"	d	file:
MAKE_MASK32	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define MAKE_MASK32(/;"	d
MAKE_MMC_VERSION	include/mmc.h	/^#define MAKE_MMC_VERSION(/;"	d
MAKE_OPCODE	include/bedbug/ppc.h	/^#define MAKE_OPCODE(/;"	d
MAKE_SDMMC_VERSION	include/mmc.h	/^#define MAKE_SDMMC_VERSION(/;"	d
MAKE_SD_VERSION	include/mmc.h	/^#define MAKE_SD_VERSION(/;"	d
MAKE_SPI_FUNC	drivers/spi/bfin_spi.c	/^#define MAKE_SPI_FUNC(/;"	d	file:
MAKE_TPM_CMD_ENTRY	cmd/tpm.c	/^#define MAKE_TPM_CMD_ENTRY(/;"	d	file:
MAKE_UMASK64	include/fsl-mc/fsl_mc_cmd.h	/^#define MAKE_UMASK64(/;"	d
MAL0	arch/powerpc/dts/arches.dts	/^		MAL0: mcmal {$/;"	l
MAL0	arch/powerpc/dts/canyonlands.dts	/^		MAL0: mcmal {$/;"	l
MAL0	arch/powerpc/dts/glacier.dts	/^		MAL0: mcmal {$/;"	l
MAL0_CFG	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_CFG	/;"	d
MAL0_ESR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_ESR	/;"	d
MAL0_IER	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_IER	/;"	d
MAL0_RCBS0	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS0	/;"	d
MAL0_RCBS1	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS1	/;"	d
MAL0_RCBS16	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS16	/;"	d
MAL0_RCBS2	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS2	/;"	d
MAL0_RCBS24	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS24	/;"	d
MAL0_RCBS3	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS3	/;"	d
MAL0_RCBS8	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RCBS8	/;"	d
MAL0_RXBADDR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXBADDR	/;"	d
MAL0_RXCARR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCARR	/;"	d
MAL0_RXCASR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCASR	/;"	d
MAL0_RXCTP0R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP0R	/;"	d
MAL0_RXCTP16R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP16R	/;"	d
MAL0_RXCTP1R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP1R	/;"	d
MAL0_RXCTP24R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP24R	/;"	d
MAL0_RXCTP2R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP2R	/;"	d
MAL0_RXCTP3R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP3R	/;"	d
MAL0_RXCTP8R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXCTP8R	/;"	d
MAL0_RXDEIR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXDEIR	/;"	d
MAL0_RXEOBISR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_RXEOBISR	/;"	d
MAL0_TXBADDR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXBADDR	/;"	d
MAL0_TXCARR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXCARR	/;"	d
MAL0_TXCASR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXCASR	/;"	d
MAL0_TXCTP0R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXCTP0R	/;"	d
MAL0_TXCTP1R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXCTP1R	/;"	d
MAL0_TXCTP2R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXCTP2R	/;"	d
MAL0_TXCTP3R	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXCTP3R	/;"	d
MAL0_TXDEIR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXDEIR	/;"	d
MAL0_TXEOBISR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL0_TXEOBISR	/;"	d
MALLOC_ALIGNMENT	common/dlmalloc.c	/^#define MALLOC_ALIGNMENT /;"	d	file:
MALLOC_ALIGN_MASK	common/dlmalloc.c	/^#define MALLOC_ALIGN_MASK /;"	d	file:
MALLOC_COPY	include/malloc.h	/^#define MALLOC_COPY(/;"	d
MALLOC_ZERO	include/malloc.h	/^#define MALLOC_ZERO(/;"	d
MALR	drivers/net/sh_eth.h	/^	MALR,$/;"	e	enum:__anon5ef54f5a0103
MALTA_ASCIIPOS0	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS0	/;"	d
MALTA_ASCIIPOS1	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS1	/;"	d
MALTA_ASCIIPOS2	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS2	/;"	d
MALTA_ASCIIPOS3	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS3	/;"	d
MALTA_ASCIIPOS4	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS4	/;"	d
MALTA_ASCIIPOS5	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS5	/;"	d
MALTA_ASCIIPOS6	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS6	/;"	d
MALTA_ASCIIPOS7	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIPOS7	/;"	d
MALTA_ASCIIWORD	arch/mips/include/asm/malta.h	/^#define MALTA_ASCIIWORD	/;"	d
MALTA_FLASH_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_FLASH_BASE	/;"	d
MALTA_GT_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_GT_BASE	/;"	d
MALTA_GT_PCIIO_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_GT_PCIIO_BASE	/;"	d
MALTA_GT_UART0_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_GT_UART0_BASE	/;"	d
MALTA_MSC01_BIU_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_BIU_BASE	/;"	d
MALTA_MSC01_IP1_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP1_BASE	/;"	d
MALTA_MSC01_IP1_SIZE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP1_SIZE	/;"	d
MALTA_MSC01_IP2_BASE1	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP2_BASE1	/;"	d
MALTA_MSC01_IP2_BASE2	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP2_BASE2	/;"	d
MALTA_MSC01_IP2_SIZE1	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP2_SIZE1	/;"	d
MALTA_MSC01_IP2_SIZE2	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP2_SIZE2	/;"	d
MALTA_MSC01_IP3_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP3_BASE	/;"	d
MALTA_MSC01_IP3_SIZE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_IP3_SIZE	/;"	d
MALTA_MSC01_PBC_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PBC_BASE	/;"	d
MALTA_MSC01_PCIIO_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCIIO_BASE	/;"	d
MALTA_MSC01_PCIIO_MAP	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCIIO_MAP	/;"	d
MALTA_MSC01_PCIIO_SIZE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCIIO_SIZE	/;"	d
MALTA_MSC01_PCIMEM_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCIMEM_BASE	/;"	d
MALTA_MSC01_PCIMEM_MAP	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCIMEM_MAP	/;"	d
MALTA_MSC01_PCIMEM_SIZE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCIMEM_SIZE	/;"	d
MALTA_MSC01_PCI_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_PCI_BASE	/;"	d
MALTA_MSC01_UART0_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_MSC01_UART0_BASE	/;"	d
MALTA_RESET_BASE	arch/mips/include/asm/malta.h	/^#define MALTA_RESET_BASE	/;"	d
MALTA_REVISION	arch/mips/include/asm/malta.h	/^#define MALTA_REVISION	/;"	d
MALTA_REVISION_CORID_CORE_FPGA6	arch/mips/include/asm/malta.h	/^#define MALTA_REVISION_CORID_CORE_FPGA6	/;"	d
MALTA_REVISION_CORID_CORE_LV	arch/mips/include/asm/malta.h	/^#define MALTA_REVISION_CORID_CORE_LV	/;"	d
MALTA_REVISION_CORID_MSK	arch/mips/include/asm/malta.h	/^#define MALTA_REVISION_CORID_MSK	/;"	d
MALTA_REVISION_CORID_SHF	arch/mips/include/asm/malta.h	/^#define MALTA_REVISION_CORID_SHF	/;"	d
MAL_ALLOC_SIZE	drivers/net/4xx_enet.c	/^#define MAL_ALLOC_SIZE	/;"	d	file:
MAL_CR_EOPIE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_EOPIE	/;"	d
MAL_CR_GA	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_GA	/;"	d
MAL_CR_LEA	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_LEA	/;"	d
MAL_CR_MMSR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_MMSR	/;"	d
MAL_CR_MSD	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_MSD	/;"	d
MAL_CR_OA	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_OA	/;"	d
MAL_CR_OPBBL	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_OPBBL	/;"	d
MAL_CR_PLBB	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBB	/;"	d
MAL_CR_PLBLE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBLE	/;"	d
MAL_CR_PLBLT_1	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBLT_1	/;"	d
MAL_CR_PLBLT_2	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBLT_2	/;"	d
MAL_CR_PLBLT_3	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBLT_3	/;"	d
MAL_CR_PLBLT_4	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBLT_4	/;"	d
MAL_CR_PLBLT_DEFAULT	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBLT_DEFAULT /;"	d
MAL_CR_PLBP_1	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBP_1	/;"	d
MAL_CR_PLBP_2	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBP_2	/;"	d
MAL_CR_PLBP_3	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_CR_PLBP_3	/;"	d
MAL_DCR_BASE	arch/powerpc/include/asm/ppc405ez.h	/^#define	MAL_DCR_BASE	/;"	d
MAL_DCR_BASE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_DCR_BASE	/;"	d
MAL_ESR_CID	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_CID	/;"	d
MAL_ESR_DE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_DE	/;"	d
MAL_ESR_DEI	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_DEI	/;"	d
MAL_ESR_EVB	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_EVB	/;"	d
MAL_ESR_ONE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_ONE	/;"	d
MAL_ESR_ONEI	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_ONEI	/;"	d
MAL_ESR_OSE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_OSE	/;"	d
MAL_ESR_OSEI	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_OSEI	/;"	d
MAL_ESR_OTE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_OTE	/;"	d
MAL_ESR_OTEI	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_OTEI	/;"	d
MAL_ESR_PBEI	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_PBEI	/;"	d
MAL_ESR_PEIN	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_ESR_PEIN	/;"	d
MAL_IER_DE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_DE	/;"	d
MAL_IER_NE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_NE	/;"	d
MAL_IER_OE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_OE	/;"	d
MAL_IER_OPBE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_OPBE	/;"	d
MAL_IER_OTE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_OTE	/;"	d
MAL_IER_PE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_PE	/;"	d
MAL_IER_PLBE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_PLBE	/;"	d
MAL_IER_PRE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_PRE	/;"	d
MAL_IER_PT	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_PT	/;"	d
MAL_IER_PWE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_PWE	/;"	d
MAL_IER_TE	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_IER_TE	/;"	d
MAL_RX_CHAN_MUL	drivers/net/4xx_enet.c	/^#define MAL_RX_CHAN_MUL	/;"	d	file:
MAL_RX_CTRL_CM	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_RX_CTRL_CM	/;"	d
MAL_RX_CTRL_EMPTY	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_RX_CTRL_EMPTY /;"	d
MAL_RX_CTRL_FIRST	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_RX_CTRL_FIRST /;"	d
MAL_RX_CTRL_INTR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_RX_CTRL_INTR /;"	d
MAL_RX_CTRL_LAST	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_RX_CTRL_LAST /;"	d
MAL_RX_CTRL_WRAP	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_RX_CTRL_WRAP /;"	d
MAL_RX_DESC_SIZE	drivers/net/4xx_enet.c	/^#define MAL_RX_DESC_SIZE	/;"	d	file:
MAL_TXRX_CASR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TXRX_CASR	/;"	d
MAL_TXRX_CASR_V	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TXRX_CASR_V(/;"	d
MAL_TX_CTRL_CM	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TX_CTRL_CM	/;"	d
MAL_TX_CTRL_INTR	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TX_CTRL_INTR /;"	d
MAL_TX_CTRL_LAST	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TX_CTRL_LAST /;"	d
MAL_TX_CTRL_READY	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TX_CTRL_READY /;"	d
MAL_TX_CTRL_WRAP	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define MAL_TX_CTRL_WRAP /;"	d
MAL_TX_DESC_SIZE	drivers/net/4xx_enet.c	/^#define MAL_TX_DESC_SIZE	/;"	d	file:
MAL_UIC_DEF	drivers/net/4xx_enet.c	/^#define MAL_UIC_DEF	/;"	d	file:
MAL_UIC_ERR	drivers/net/4xx_enet.c	/^#define MAL_UIC_ERR	/;"	d	file:
MAMR_AMA_MSK	include/mpc8xx.h	/^#define MAMR_AMA_MSK	/;"	d
MAMR_AMA_TYPE_0	include/mpc8xx.h	/^#define MAMR_AMA_TYPE_0 /;"	d
MAMR_AMA_TYPE_1	include/mpc8xx.h	/^#define MAMR_AMA_TYPE_1 /;"	d
MAMR_AMA_TYPE_2	include/mpc8xx.h	/^#define MAMR_AMA_TYPE_2 /;"	d
MAMR_AMA_TYPE_3	include/mpc8xx.h	/^#define MAMR_AMA_TYPE_3 /;"	d
MAMR_AMA_TYPE_4	include/mpc8xx.h	/^#define MAMR_AMA_TYPE_4 /;"	d
MAMR_AMA_TYPE_5	include/mpc8xx.h	/^#define MAMR_AMA_TYPE_5 /;"	d
MAMR_DSA_1_CYCL	include/mpc8xx.h	/^#define MAMR_DSA_1_CYCL /;"	d
MAMR_DSA_2_CYCL	include/mpc8xx.h	/^#define MAMR_DSA_2_CYCL /;"	d
MAMR_DSA_3_CYCL	include/mpc8xx.h	/^#define MAMR_DSA_3_CYCL /;"	d
MAMR_DSA_4_CYCL	include/mpc8xx.h	/^#define MAMR_DSA_4_CYCL /;"	d
MAMR_DSA_MSK	include/mpc8xx.h	/^#define MAMR_DSA_MSK	/;"	d
MAMR_G0CLA_A10	include/mpc8xx.h	/^#define MAMR_G0CLA_A10	/;"	d
MAMR_G0CLA_A11	include/mpc8xx.h	/^#define MAMR_G0CLA_A11	/;"	d
MAMR_G0CLA_A12	include/mpc8xx.h	/^#define MAMR_G0CLA_A12	/;"	d
MAMR_G0CLA_A5	include/mpc8xx.h	/^#define MAMR_G0CLA_A5	/;"	d
MAMR_G0CLA_A6	include/mpc8xx.h	/^#define MAMR_G0CLA_A6	/;"	d
MAMR_G0CLA_A7	include/mpc8xx.h	/^#define MAMR_G0CLA_A7	/;"	d
MAMR_G0CLA_A8	include/mpc8xx.h	/^#define MAMR_G0CLA_A8	/;"	d
MAMR_G0CLA_A9	include/mpc8xx.h	/^#define MAMR_G0CLA_A9	/;"	d
MAMR_G0CLA_MSK	include/mpc8xx.h	/^#define MAMR_G0CLA_MSK	/;"	d
MAMR_GPL_A4DIS	include/mpc8xx.h	/^#define MAMR_GPL_A4DIS	/;"	d
MAMR_PTAE	include/mpc8xx.h	/^#define MAMR_PTAE	/;"	d
MAMR_PTA_MSK	include/mpc8xx.h	/^#define MAMR_PTA_MSK	/;"	d
MAMR_PTA_SHIFT	include/mpc8xx.h	/^#define MAMR_PTA_SHIFT	/;"	d
MAMR_RLFA_10X	include/mpc8xx.h	/^#define MAMR_RLFA_10X	/;"	d
MAMR_RLFA_11X	include/mpc8xx.h	/^#define MAMR_RLFA_11X	/;"	d
MAMR_RLFA_12X	include/mpc8xx.h	/^#define MAMR_RLFA_12X	/;"	d
MAMR_RLFA_13X	include/mpc8xx.h	/^#define MAMR_RLFA_13X	/;"	d
MAMR_RLFA_14X	include/mpc8xx.h	/^#define MAMR_RLFA_14X	/;"	d
MAMR_RLFA_15X	include/mpc8xx.h	/^#define MAMR_RLFA_15X	/;"	d
MAMR_RLFA_16X	include/mpc8xx.h	/^#define MAMR_RLFA_16X	/;"	d
MAMR_RLFA_1X	include/mpc8xx.h	/^#define MAMR_RLFA_1X	/;"	d
MAMR_RLFA_2X	include/mpc8xx.h	/^#define MAMR_RLFA_2X	/;"	d
MAMR_RLFA_3X	include/mpc8xx.h	/^#define MAMR_RLFA_3X	/;"	d
MAMR_RLFA_4X	include/mpc8xx.h	/^#define MAMR_RLFA_4X	/;"	d
MAMR_RLFA_5X	include/mpc8xx.h	/^#define MAMR_RLFA_5X	/;"	d
MAMR_RLFA_6X	include/mpc8xx.h	/^#define MAMR_RLFA_6X	/;"	d
MAMR_RLFA_7X	include/mpc8xx.h	/^#define MAMR_RLFA_7X	/;"	d
MAMR_RLFA_8X	include/mpc8xx.h	/^#define MAMR_RLFA_8X	/;"	d
MAMR_RLFA_9X	include/mpc8xx.h	/^#define MAMR_RLFA_9X	/;"	d
MAMR_RLFA_MSK	include/mpc8xx.h	/^#define MAMR_RLFA_MSK	/;"	d
MAMR_TLFA_10X	include/mpc8xx.h	/^#define MAMR_TLFA_10X	/;"	d
MAMR_TLFA_11X	include/mpc8xx.h	/^#define MAMR_TLFA_11X	/;"	d
MAMR_TLFA_12X	include/mpc8xx.h	/^#define MAMR_TLFA_12X	/;"	d
MAMR_TLFA_13X	include/mpc8xx.h	/^#define MAMR_TLFA_13X	/;"	d
MAMR_TLFA_14X	include/mpc8xx.h	/^#define MAMR_TLFA_14X	/;"	d
MAMR_TLFA_15X	include/mpc8xx.h	/^#define MAMR_TLFA_15X	/;"	d
MAMR_TLFA_16X	include/mpc8xx.h	/^#define MAMR_TLFA_16X	/;"	d
MAMR_TLFA_1X	include/mpc8xx.h	/^#define MAMR_TLFA_1X	/;"	d
MAMR_TLFA_2X	include/mpc8xx.h	/^#define MAMR_TLFA_2X	/;"	d
MAMR_TLFA_3X	include/mpc8xx.h	/^#define MAMR_TLFA_3X	/;"	d
MAMR_TLFA_4X	include/mpc8xx.h	/^#define MAMR_TLFA_4X	/;"	d
MAMR_TLFA_5X	include/mpc8xx.h	/^#define MAMR_TLFA_5X	/;"	d
MAMR_TLFA_6X	include/mpc8xx.h	/^#define MAMR_TLFA_6X	/;"	d
MAMR_TLFA_7X	include/mpc8xx.h	/^#define MAMR_TLFA_7X	/;"	d
MAMR_TLFA_8X	include/mpc8xx.h	/^#define MAMR_TLFA_8X	/;"	d
MAMR_TLFA_9X	include/mpc8xx.h	/^#define MAMR_TLFA_9X	/;"	d
MAMR_TLFA_MSK	include/mpc8xx.h	/^#define MAMR_TLFA_MSK	/;"	d
MAMR_WLFA_10X	include/mpc8xx.h	/^#define MAMR_WLFA_10X	/;"	d
MAMR_WLFA_11X	include/mpc8xx.h	/^#define MAMR_WLFA_11X	/;"	d
MAMR_WLFA_12X	include/mpc8xx.h	/^#define MAMR_WLFA_12X	/;"	d
MAMR_WLFA_13X	include/mpc8xx.h	/^#define MAMR_WLFA_13X	/;"	d
MAMR_WLFA_14X	include/mpc8xx.h	/^#define MAMR_WLFA_14X	/;"	d
MAMR_WLFA_15X	include/mpc8xx.h	/^#define MAMR_WLFA_15X	/;"	d
MAMR_WLFA_16X	include/mpc8xx.h	/^#define MAMR_WLFA_16X	/;"	d
MAMR_WLFA_1X	include/mpc8xx.h	/^#define MAMR_WLFA_1X	/;"	d
MAMR_WLFA_2X	include/mpc8xx.h	/^#define MAMR_WLFA_2X	/;"	d
MAMR_WLFA_3X	include/mpc8xx.h	/^#define MAMR_WLFA_3X	/;"	d
MAMR_WLFA_4X	include/mpc8xx.h	/^#define MAMR_WLFA_4X	/;"	d
MAMR_WLFA_5X	include/mpc8xx.h	/^#define MAMR_WLFA_5X	/;"	d
MAMR_WLFA_6X	include/mpc8xx.h	/^#define MAMR_WLFA_6X	/;"	d
MAMR_WLFA_7X	include/mpc8xx.h	/^#define MAMR_WLFA_7X	/;"	d
MAMR_WLFA_8X	include/mpc8xx.h	/^#define MAMR_WLFA_8X	/;"	d
MAMR_WLFA_9X	include/mpc8xx.h	/^#define MAMR_WLFA_9X	/;"	d
MAMR_WLFA_MSK	include/mpc8xx.h	/^#define MAMR_WLFA_MSK	/;"	d
MAN	doc/DocBook/Makefile	/^MAN := $(patsubst %.xml, %.9, $(BOOKS))$/;"	m
MAN	include/sym53c8xx.h	/^	#define   MAN /;"	d
MANUAL_MODE	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MANUAL_MODE	/;"	d
MANUFACTURER_ID	drivers/mtd/nand/denali.h	/^#define MANUFACTURER_ID	/;"	d
MANUFACTURER_ID__VALUE	drivers/mtd/nand/denali.h	/^#define     MANUFACTURER_ID__VALUE	/;"	d
MAP_00	drivers/mtd/onenand/samsung.c	/^#define MAP_00	/;"	d	file:
MAP_01	drivers/mtd/onenand/samsung.c	/^#define MAP_01	/;"	d	file:
MAP_10	drivers/mtd/onenand/samsung.c	/^#define MAP_10	/;"	d	file:
MAP_11	drivers/mtd/onenand/samsung.c	/^#define MAP_11	/;"	d	file:
MAP_ANONYMOUS	include/malloc.h	/^#define MAP_ANONYMOUS /;"	d
MAP_BASE	arch/mips/include/asm/mach-generic/spaces.h	/^#define MAP_BASE	/;"	d
MAP_FAILED	include/compiler.h	/^# define MAP_FAILED /;"	d
MAP_NOCACHE	arch/arc/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/arm/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/blackfin/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/m68k/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/microblaze/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/mips/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/nds32/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/nios2/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/openrisc/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/powerpc/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/sandbox/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/sh/include/asm/io.h	/^#define MAP_NOCACHE /;"	d
MAP_NOCACHE	arch/sparc/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/x86/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_NOCACHE	arch/xtensa/include/asm/io.h	/^#define MAP_NOCACHE	/;"	d
MAP_PRIVATE	tools/mingw_support.h	/^#define MAP_PRIVATE	/;"	d
MAP_SHARED	tools/mingw_support.h	/^#define MAP_SHARED	/;"	d
MAP_WRBACK	arch/arc/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/arm/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/blackfin/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/m68k/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/microblaze/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/mips/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/nds32/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/nios2/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/openrisc/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/powerpc/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/sandbox/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/sh/include/asm/io.h	/^#define MAP_WRBACK /;"	d
MAP_WRBACK	arch/sparc/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/x86/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRBACK	arch/xtensa/include/asm/io.h	/^#define MAP_WRBACK	/;"	d
MAP_WRCOMBINE	arch/arc/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/arm/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/blackfin/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/m68k/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/microblaze/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/mips/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/nds32/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/nios2/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/openrisc/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/powerpc/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/sandbox/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/sh/include/asm/io.h	/^#define MAP_WRCOMBINE /;"	d
MAP_WRCOMBINE	arch/sparc/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/x86/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRCOMBINE	arch/xtensa/include/asm/io.h	/^#define MAP_WRCOMBINE	/;"	d
MAP_WRTHROUGH	arch/arc/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/arm/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/blackfin/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/m68k/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/microblaze/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/mips/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/nds32/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/nios2/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/openrisc/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/powerpc/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/sandbox/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/sh/include/asm/io.h	/^#define MAP_WRTHROUGH /;"	d
MAP_WRTHROUGH	arch/sparc/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/x86/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAP_WRTHROUGH	arch/xtensa/include/asm/io.h	/^#define MAP_WRTHROUGH	/;"	d
MAR0	drivers/net/rtl8139.c	/^	MAR0=8,			\/* Multicast filter. *\/$/;"	e	enum:RTL8139_registers	file:
MAR0	drivers/net/rtl8169.c	/^	MAR0 = 8,		\/* Multicast filter. *\/$/;"	e	enum:RTL8169_registers	file:
MARGIN_FREQ	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MARGIN_FREQ	/;"	d
MARVELL_88E1118_PHYSID1	drivers/net/ax88180.h	/^#define MARVELL_88E1118_PHYSID1	/;"	d
MARVELL_ALASKA_PHYSID0	drivers/net/ax88180.h	/^#define MARVELL_ALASKA_PHYSID0	/;"	d
MARVELL_BOARD	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define MARVELL_BOARD	/;"	d
MARVELL_BOARD_ID_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MARVELL_BOARD_ID_BASE	/;"	d
MARVELL_BOARD_ID_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MARVELL_BOARD_ID_MASK	/;"	d
MAS0	arch/powerpc/include/asm/processor.h	/^#define MAS0	/;"	d
MAS0_ESEL	arch/powerpc/include/asm/mmu.h	/^#define MAS0_ESEL(/;"	d
MAS0_ESEL_MSK	arch/powerpc/include/asm/mmu.h	/^#define MAS0_ESEL_MSK	/;"	d
MAS0_NV	arch/powerpc/include/asm/mmu.h	/^#define MAS0_NV(/;"	d
MAS0_TLBSEL	arch/powerpc/include/asm/mmu.h	/^#define MAS0_TLBSEL(/;"	d
MAS0_TLBSEL_MSK	arch/powerpc/include/asm/mmu.h	/^#define MAS0_TLBSEL_MSK	/;"	d
MAS1	arch/powerpc/include/asm/processor.h	/^#define MAS1	/;"	d
MAS1_IPROT	arch/powerpc/include/asm/mmu.h	/^#define MAS1_IPROT	/;"	d
MAS1_TID	arch/powerpc/include/asm/mmu.h	/^#define MAS1_TID(/;"	d
MAS1_TS	arch/powerpc/include/asm/mmu.h	/^#define MAS1_TS	/;"	d
MAS1_TSIZE	arch/powerpc/include/asm/mmu.h	/^#define MAS1_TSIZE(/;"	d
MAS1_VALID	arch/powerpc/include/asm/mmu.h	/^#define MAS1_VALID	/;"	d
MAS2	arch/powerpc/include/asm/processor.h	/^#define MAS2	/;"	d
MAS2_E	arch/powerpc/include/asm/mmu.h	/^#define MAS2_E	/;"	d
MAS2_EPN	arch/powerpc/include/asm/mmu.h	/^#define MAS2_EPN	/;"	d
MAS2_G	arch/powerpc/include/asm/mmu.h	/^#define MAS2_G	/;"	d
MAS2_I	arch/powerpc/include/asm/mmu.h	/^#define MAS2_I	/;"	d
MAS2_M	arch/powerpc/include/asm/mmu.h	/^#define MAS2_M	/;"	d
MAS2_W	arch/powerpc/include/asm/mmu.h	/^#define MAS2_W	/;"	d
MAS2_X0	arch/powerpc/include/asm/mmu.h	/^#define MAS2_X0	/;"	d
MAS2_X1	arch/powerpc/include/asm/mmu.h	/^#define MAS2_X1	/;"	d
MAS3	arch/powerpc/include/asm/processor.h	/^#define MAS3	/;"	d
MAS3_RPN	arch/powerpc/include/asm/mmu.h	/^#define MAS3_RPN	/;"	d
MAS3_SR	arch/powerpc/include/asm/mmu.h	/^#define MAS3_SR	/;"	d
MAS3_SW	arch/powerpc/include/asm/mmu.h	/^#define MAS3_SW	/;"	d
MAS3_SX	arch/powerpc/include/asm/mmu.h	/^#define MAS3_SX	/;"	d
MAS3_U0	arch/powerpc/include/asm/mmu.h	/^#define MAS3_U0	/;"	d
MAS3_U1	arch/powerpc/include/asm/mmu.h	/^#define MAS3_U1	/;"	d
MAS3_U2	arch/powerpc/include/asm/mmu.h	/^#define MAS3_U2	/;"	d
MAS3_U3	arch/powerpc/include/asm/mmu.h	/^#define MAS3_U3	/;"	d
MAS3_UR	arch/powerpc/include/asm/mmu.h	/^#define MAS3_UR	/;"	d
MAS3_UW	arch/powerpc/include/asm/mmu.h	/^#define MAS3_UW	/;"	d
MAS3_UX	arch/powerpc/include/asm/mmu.h	/^#define MAS3_UX	/;"	d
MAS4	arch/powerpc/include/asm/processor.h	/^#define MAS4	/;"	d
MAS4_ED	arch/powerpc/include/asm/mmu.h	/^#define MAS4_ED	/;"	d
MAS4_GD	arch/powerpc/include/asm/mmu.h	/^#define MAS4_GD	/;"	d
MAS4_ID	arch/powerpc/include/asm/mmu.h	/^#define MAS4_ID	/;"	d
MAS4_MD	arch/powerpc/include/asm/mmu.h	/^#define MAS4_MD	/;"	d
MAS4_TIDDSEL	arch/powerpc/include/asm/mmu.h	/^#define MAS4_TIDDSEL	/;"	d
MAS4_TLBSELD	arch/powerpc/include/asm/mmu.h	/^#define MAS4_TLBSELD(/;"	d
MAS4_TSIZED	arch/powerpc/include/asm/mmu.h	/^#define MAS4_TSIZED(/;"	d
MAS4_WD	arch/powerpc/include/asm/mmu.h	/^#define MAS4_WD	/;"	d
MAS4_X0D	arch/powerpc/include/asm/mmu.h	/^#define MAS4_X0D	/;"	d
MAS4_X1D	arch/powerpc/include/asm/mmu.h	/^#define MAS4_X1D	/;"	d
MAS5	arch/powerpc/include/asm/processor.h	/^#define MAS5	/;"	d
MAS6	arch/powerpc/include/asm/processor.h	/^#define MAS6	/;"	d
MAS6_SAS	arch/powerpc/include/asm/mmu.h	/^#define MAS6_SAS	/;"	d
MAS6_SPID	arch/powerpc/include/asm/mmu.h	/^#define MAS6_SPID	/;"	d
MAS6_SPID0	arch/powerpc/include/asm/mmu.h	/^#define MAS6_SPID0	/;"	d
MAS6_SPID1	arch/powerpc/include/asm/mmu.h	/^#define MAS6_SPID1	/;"	d
MAS7	arch/powerpc/include/asm/processor.h	/^#define MAS7	/;"	d
MAS7_RPN	arch/powerpc/include/asm/mmu.h	/^#define MAS7_RPN	/;"	d
MAS8	arch/powerpc/include/asm/processor.h	/^#define MAS8 /;"	d
MASK	board/micronas/vct/gpio.c	/^#define MASK(/;"	d	file:
MASK	include/lattice.h	/^#define MASK	/;"	d
MASK	include/sym53c8xx.h	/^#define MASK(/;"	d
MASKADDRESS	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define MASKADDRESS(/;"	d
MASK_ALE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define MASK_ALE	/;"	d
MASK_ALE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define MASK_ALE /;"	d
MASK_ALE	drivers/mtd/nand/kb9202_nand.c	/^#define MASK_ALE /;"	d	file:
MASK_ALL	drivers/mmc/sh_mmcif.h	/^#define MASK_ALL	/;"	d
MASK_ALL_BITS	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define MASK_ALL_BITS	/;"	d
MASK_BITS_31_28	arch/arm/include/asm/arch-tegra/clock.h	/^	MASK_BITS_31_28,$/;"	e	enum:__anonde538b530103
MASK_BITS_31_29	arch/arm/include/asm/arch-tegra/clock.h	/^	MASK_BITS_31_29,$/;"	e	enum:__anonde538b530103
MASK_BITS_31_30	arch/arm/include/asm/arch-tegra/clock.h	/^	MASK_BITS_31_30,$/;"	e	enum:__anonde538b530103
MASK_CLE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define MASK_CLE	/;"	d
MASK_CLE	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define MASK_CLE /;"	d
MASK_CLE	drivers/mtd/nand/kb9202_nand.c	/^#define MASK_CLE /;"	d	file:
MASK_DATA	include/lattice.h	/^#define MASK_DATA	/;"	d
MASK_LANE_B	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MASK_LANE_B	/;"	d	file:
MASK_LANE_C	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MASK_LANE_C	/;"	d	file:
MASK_LANE_D	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MASK_LANE_D	/;"	d	file:
MASK_MBUFRE	drivers/mmc/sh_mmcif.h	/^#define MASK_MBUFRE	/;"	d
MASK_MBUFREN	drivers/mmc/sh_mmcif.h	/^#define MASK_MBUFREN	/;"	d
MASK_MBUFVIO	drivers/mmc/sh_mmcif.h	/^#define MASK_MBUFVIO	/;"	d
MASK_MBUFWEN	drivers/mmc/sh_mmcif.h	/^#define MASK_MBUFWEN	/;"	d
MASK_MCCSDE	drivers/mmc/sh_mmcif.h	/^#define MASK_MCCSDE	/;"	d
MASK_MCCSRCV	drivers/mmc/sh_mmcif.h	/^#define MASK_MCCSRCV	/;"	d
MASK_MCCSTO	drivers/mmc/sh_mmcif.h	/^#define MASK_MCCSTO	/;"	d
MASK_MCHARGERUSB_FAULT	include/twl6030.h	/^#define MASK_MCHARGERUSB_FAULT	/;"	d
MASK_MCHARGERUSB_STAT	include/twl6030.h	/^#define MASK_MCHARGERUSB_STAT	/;"	d
MASK_MCHARGERUSB_THMREG	include/twl6030.h	/^#define MASK_MCHARGERUSB_THMREG	/;"	d
MASK_MCMD12CRE	drivers/mmc/sh_mmcif.h	/^#define MASK_MCMD12CRE	/;"	d
MASK_MCMD12DRE	drivers/mmc/sh_mmcif.h	/^#define MASK_MCMD12DRE	/;"	d
MASK_MCMD12RBE	drivers/mmc/sh_mmcif.h	/^#define MASK_MCMD12RBE	/;"	d
MASK_MCMDVIO	drivers/mmc/sh_mmcif.h	/^#define MASK_MCMDVIO	/;"	d
MASK_MCRCSTO	drivers/mmc/sh_mmcif.h	/^#define MASK_MCRCSTO	/;"	d
MASK_MCRSPE	drivers/mmc/sh_mmcif.h	/^#define MASK_MCRSPE	/;"	d
MASK_MCURRENT_TERM	include/twl6030.h	/^#define MASK_MCURRENT_TERM	/;"	d
MASK_MDTRANE	drivers/mmc/sh_mmcif.h	/^#define MASK_MDTRANE	/;"	d
MASK_MRBSYE	drivers/mmc/sh_mmcif.h	/^#define MASK_MRBSYE	/;"	d
MASK_MRBSYTO	drivers/mmc/sh_mmcif.h	/^#define MASK_MRBSYTO	/;"	d
MASK_MRDATERR	drivers/mmc/sh_mmcif.h	/^#define MASK_MRDATERR	/;"	d
MASK_MRDATTO	drivers/mmc/sh_mmcif.h	/^#define MASK_MRDATTO	/;"	d
MASK_MRIDXERR	drivers/mmc/sh_mmcif.h	/^#define MASK_MRIDXERR	/;"	d
MASK_MRSPERR	drivers/mmc/sh_mmcif.h	/^#define MASK_MRSPERR	/;"	d
MASK_MRSPTO	drivers/mmc/sh_mmcif.h	/^#define MASK_MRSPTO	/;"	d
MASK_MWDATERR	drivers/mmc/sh_mmcif.h	/^#define MASK_MWDATERR	/;"	d
MASK_MWDATTO	drivers/mmc/sh_mmcif.h	/^#define MASK_MWDATTO	/;"	d
MASK_PRE_RATIO	arch/arm/mach-exynos/include/mach/clk.h	/^#define MASK_PRE_RATIO(/;"	d
MASK_RATIO	arch/arm/mach-exynos/include/mach/clk.h	/^#define MASK_RATIO(/;"	d
MASK_RBI_DEFECT_16	board/keymile/km_arm/km_arm.c	/^#define MASK_RBI_DEFECT_16	/;"	d	file:
MASK_RBX_PGY_PRESENT	board/keymile/km_arm/km_arm.c	/^#define MASK_RBX_PGY_PRESENT	/;"	d	file:
MASK_SGMII	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MASK_SGMII	/;"	d	file:
MASK_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^MASK_VAL:$/;"	l
MASK_WRL_UNITRUN	board/keymile/km_arm/km_arm.c	/^#define MASK_WRL_UNITRUN	/;"	d	file:
MASTEREN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MASTEREN	/;"	d
MASTERRSTN	arch/x86/cpu/quark/smc.h	/^#define MASTERRSTN	/;"	d
MASTER_NODE_OBJ	include/zfs/zfs_znode.h	/^#define	MASTER_NODE_OBJ	/;"	d
MASTER_PIC	arch/x86/include/asm/ibmpc.h	/^#define MASTER_PIC /;"	d
MASTER_PLL_DIV	include/configs/at91sam9263ek.h	/^#define MASTER_PLL_DIV	/;"	d
MASTER_PLL_DIV	include/configs/pm9261.h	/^#define MASTER_PLL_DIV	/;"	d
MASTER_PLL_DIV	include/configs/pm9263.h	/^#define MASTER_PLL_DIV	/;"	d
MASTER_PLL_MUL	include/configs/at91sam9263ek.h	/^#define MASTER_PLL_MUL	/;"	d
MASTER_PLL_MUL	include/configs/pm9261.h	/^#define MASTER_PLL_MUL	/;"	d
MASTER_PLL_MUL	include/configs/pm9263.h	/^#define MASTER_PLL_MUL	/;"	d
MASTER_PLL_OUT	include/configs/at91sam9263ek.h	/^#define MASTER_PLL_OUT	/;"	d
MASTER_THREAD	examples/standalone/sched.c	/^#define MASTER_THREAD /;"	d	file:
MASTER_VIDEO_INTERLACE_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define MASTER_VIDEO_INTERLACE_EN	/;"	d
MASTER_VID_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define MASTER_VID_FUNC_EN_N	/;"	d
MATCH	lib/zlib/inflate.h	/^            MATCH,      \/* o: waiting for output space to copy string *\/$/;"	e	enum:__anon43d5a4c40103
MATCHPOINTS_TO_NDP	arch/openrisc/include/asm/spr-defs.h	/^#define MATCHPOINTS_TO_NDP(/;"	d
MATCH_BITS	fs/zfs/zfs_lzjb.c	/^#define	MATCH_BITS	/;"	d	file:
MATCH_CMP	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define MATCH_CMP(/;"	d	file:
MATCH_MIN	fs/zfs/zfs_lzjb.c	/^#define	MATCH_MIN	/;"	d	file:
MATCH_TINKER_PATTERN_DOWN	scripts/kconfig/nconf.c	/^typedef enum {MATCH_TINKER_PATTERN_UP, MATCH_TINKER_PATTERN_DOWN,$/;"	e	enum:__anon6c8863710103	file:
MATCH_TINKER_PATTERN_UP	scripts/kconfig/nconf.c	/^typedef enum {MATCH_TINKER_PATTERN_UP, MATCH_TINKER_PATTERN_DOWN,$/;"	e	enum:__anon6c8863710103	file:
MATRIX_KEY	arch/arm/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	arch/microblaze/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	arch/mips/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	arch/nios2/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	arch/sandbox/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	arch/x86/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	arch/xtensa/dts/include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MATRIX_KEY	include/dt-bindings/input/input.h	/^#define MATRIX_KEY(/;"	d
MAW0_MADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define MAW0_MADDR_MASK	/;"	d
MAW0_MADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define MAW0_MADDR_POS	/;"	d
MAW1_MADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define MAW1_MADDR_MASK	/;"	d
MAW1_MADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define MAW1_MADDR_POS	/;"	d
MAW1_MAIDX_MASK	drivers/net/xilinx_ll_temac.h	/^#define MAW1_MAIDX_MASK	/;"	d
MAW1_MAIDX_POS	drivers/net/xilinx_ll_temac.h	/^#define MAW1_MAIDX_POS	/;"	d
MAW1_RNW	drivers/net/xilinx_ll_temac.h	/^#define MAW1_RNW	/;"	d
MAX	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MAX(/;"	d	file:
MAX	scripts/kconfig/lxdialog/dialog.h	/^#define MAX(/;"	d
MAX17042_AVG_CURRENT	include/power/max17042_fg.h	/^	MAX17042_AVG_CURRENT	= 0x0B,$/;"	e	enum:__anon883a25da0103
MAX17042_AVG_VCELL	include/power/max17042_fg.h	/^	MAX17042_AVG_VCELL	= 0x19,$/;"	e	enum:__anon883a25da0103
MAX17042_CGAIN	include/power/max17042_fg.h	/^	MAX17042_CGAIN		= 0x2E,$/;"	e	enum:__anon883a25da0103
MAX17042_COFF	include/power/max17042_fg.h	/^	MAX17042_COFF		= 0x2F,$/;"	e	enum:__anon883a25da0103
MAX17042_CONFIG	include/power/max17042_fg.h	/^	MAX17042_CONFIG	= 0x1D,$/;"	e	enum:__anon883a25da0103
MAX17042_CURRENT	include/power/max17042_fg.h	/^	MAX17042_CURRENT        = 0x0A,$/;"	e	enum:__anon883a25da0103
MAX17042_DESIGN_CAP	include/power/max17042_fg.h	/^	MAX17042_DESIGN_CAP	= 0x18,$/;"	e	enum:__anon883a25da0103
MAX17042_FILTERCFG	include/power/max17042_fg.h	/^	MAX17042_FILTERCFG	= 0x29,$/;"	e	enum:__anon883a25da0103
MAX17042_FSTAT	include/power/max17042_fg.h	/^	MAX17042_FSTAT		= 0x3D,$/;"	e	enum:__anon883a25da0103
MAX17042_I2C_ADDR	include/power/max17042_fg.h	/^#define MAX17042_I2C_ADDR	/;"	d
MAX17042_LEARNCFG	include/power/max17042_fg.h	/^	MAX17042_LEARNCFG       = 0x28,$/;"	e	enum:__anon883a25da0103
MAX17042_MISCCFG	include/power/max17042_fg.h	/^	MAX17042_MISCCFG	= 0x2B,$/;"	e	enum:__anon883a25da0103
MAX17042_MLOCKReg1	include/power/max17042_fg.h	/^	MAX17042_MLOCKReg1	= 0x62,$/;"	e	enum:__anon883a25da0103
MAX17042_MLOCKReg2	include/power/max17042_fg.h	/^	MAX17042_MLOCKReg2	= 0x63,$/;"	e	enum:__anon883a25da0103
MAX17042_MODEL1	include/power/max17042_fg.h	/^	MAX17042_MODEL1         = 0x80,$/;"	e	enum:__anon883a25da0103
MAX17042_MODEL2	include/power/max17042_fg.h	/^	MAX17042_MODEL2         = 0x90,$/;"	e	enum:__anon883a25da0103
MAX17042_MODEL3	include/power/max17042_fg.h	/^	MAX17042_MODEL3         = 0xA0,$/;"	e	enum:__anon883a25da0103
MAX17042_POR	include/power/max17042_fg.h	/^#define MAX17042_POR /;"	d
MAX17042_RCOMP0	include/power/max17042_fg.h	/^	MAX17042_RCOMP0	= 0x38,$/;"	e	enum:__anon883a25da0103
MAX17042_RELAXCFG	include/power/max17042_fg.h	/^	MAX17042_RELAXCFG	= 0x2A,$/;"	e	enum:__anon883a25da0103
MAX17042_SOCAV	include/power/max17042_fg.h	/^	MAX17042_SOCAV		= 0x0E,$/;"	e	enum:__anon883a25da0103
MAX17042_SOCMIX	include/power/max17042_fg.h	/^	MAX17042_SOCMIX	= 0x0D,$/;"	e	enum:__anon883a25da0103
MAX17042_SOCREP	include/power/max17042_fg.h	/^	MAX17042_SOCREP         = 0x06,$/;"	e	enum:__anon883a25da0103
MAX17042_STATUS	include/power/max17042_fg.h	/^	MAX17042_STATUS         = 0x00,$/;"	e	enum:__anon883a25da0103
MAX17042_TEMPCO	include/power/max17042_fg.h	/^	MAX17042_TEMPCO	= 0x39,$/;"	e	enum:__anon883a25da0103
MAX17042_VCELL	include/power/max17042_fg.h	/^	MAX17042_VCELL          = 0x09,$/;"	e	enum:__anon883a25da0103
MAX17042_VERSION	include/power/max17042_fg.h	/^	MAX17042_VERSION	= 0x21,$/;"	e	enum:__anon883a25da0103
MAX17042_VFOCV	include/power/max17042_fg.h	/^	MAX17042_VFOCV		= 0xFB,$/;"	e	enum:__anon883a25da0103
MAX17042_VFSOC	include/power/max17042_fg.h	/^	MAX17042_VFSOC		= 0xFF,$/;"	e	enum:__anon883a25da0103
MAX6957AAX_HD44780_DATA	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957AAX_HD44780_DATA	/;"	d	file:
MAX6957AAX_HD44780_EN	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957AAX_HD44780_EN	/;"	d	file:
MAX6957AAX_HD44780_RS	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957AAX_HD44780_RS	/;"	d	file:
MAX6957AAX_HD44780_R_W	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957AAX_HD44780_R_W	/;"	d	file:
MAX6957_CONF	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957_CONF	/;"	d	file:
MAX6957_CONF_08_11	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957_CONF_08_11	/;"	d	file:
MAX6957_CONF_12_15	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957_CONF_12_15	/;"	d	file:
MAX6957_CONF_16_19	board/work-microwave/work_92105/work_92105_display.c	/^#define MAX6957_CONF_16_19	/;"	d	file:
MAX77620_AME_GPIO	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_AME_GPIO	/;"	d
MAX77620_CID0_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CID0_REG	/;"	d
MAX77620_CID1_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CID1_REG	/;"	d
MAX77620_CID2_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CID2_REG	/;"	d
MAX77620_CID3_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CID3_REG	/;"	d
MAX77620_CID4_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CID4_REG	/;"	d
MAX77620_CID5_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CID5_REG	/;"	d
MAX77620_CNFG1_L0_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L0_REG	/;"	d
MAX77620_CNFG1_L1_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L1_REG	/;"	d
MAX77620_CNFG1_L2_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L2_REG	/;"	d
MAX77620_CNFG1_L3_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L3_REG	/;"	d
MAX77620_CNFG1_L4_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L4_REG	/;"	d
MAX77620_CNFG1_L5_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L5_REG	/;"	d
MAX77620_CNFG1_L6_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L6_REG	/;"	d
MAX77620_CNFG1_L7_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L7_REG	/;"	d
MAX77620_CNFG1_L8_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG1_L8_REG	/;"	d
MAX77620_CNFG2SD_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2SD_REG	/;"	d
MAX77620_CNFG2_L0_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L0_REG	/;"	d
MAX77620_CNFG2_L1_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L1_REG	/;"	d
MAX77620_CNFG2_L2_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L2_REG	/;"	d
MAX77620_CNFG2_L3_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L3_REG	/;"	d
MAX77620_CNFG2_L4_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L4_REG	/;"	d
MAX77620_CNFG2_L5_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L5_REG	/;"	d
MAX77620_CNFG2_L6_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L6_REG	/;"	d
MAX77620_CNFG2_L7_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L7_REG	/;"	d
MAX77620_CNFG2_L8_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG2_L8_REG	/;"	d
MAX77620_CNFG3_LDO_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFG3_LDO_REG	/;"	d
MAX77620_CNFGGLBL1_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_CNFGGLBL1_REG	/;"	d
MAX77620_GPIO0_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO0_REG	/;"	d
MAX77620_GPIO1_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO1_REG	/;"	d
MAX77620_GPIO2_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO2_REG	/;"	d
MAX77620_GPIO3_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO3_REG	/;"	d
MAX77620_GPIO4_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO4_REG	/;"	d
MAX77620_GPIO5_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO5_REG	/;"	d
MAX77620_GPIO6_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO6_REG	/;"	d
MAX77620_GPIO7_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO7_REG	/;"	d
MAX77620_GPIO_PDE_GPIO	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO_PDE_GPIO	/;"	d
MAX77620_GPIO_PUE_GPIO	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_GPIO_PUE_GPIO	/;"	d
MAX77620_I2C_ADDR	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_I2C_ADDR	/;"	d
MAX77620_I2C_ADDR_7BIT	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_I2C_ADDR_7BIT	/;"	d
MAX77620_REG_ONOFF_CFG1	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_REG_ONOFF_CFG1	/;"	d
MAX77620_REG_ONOFF_CFG2	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_REG_ONOFF_CFG2	/;"	d
MAX77620_SD0_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_SD0_REG	/;"	d
MAX77620_SD1_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_SD1_REG	/;"	d
MAX77620_SD2_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_SD2_REG	/;"	d
MAX77620_SD3_REG	board/nvidia/p2571/max77620_init.h	/^#define MAX77620_SD3_REG	/;"	d
MAX77686_32KHCP_EN	include/power/max77686_pmic.h	/^#define MAX77686_32KHCP_EN	/;"	d
MAX77686_BBCHOSTEN	include/power/max77686_pmic.h	/^#define MAX77686_BBCHOSTEN	/;"	d
MAX77686_BBCVS_3_5V	include/power/max77686_pmic.h	/^#define MAX77686_BBCVS_3_5V	/;"	d
MAX77686_BUCK1CTRL_EN	include/power/max77686_pmic.h	/^#define MAX77686_BUCK1CTRL_EN	/;"	d
MAX77686_BUCK1OUT_1V	include/power/max77686_pmic.h	/^#define MAX77686_BUCK1OUT_1V	/;"	d
MAX77686_BUCK1OUT_1_05V	include/power/max77686_pmic.h	/^#define MAX77686_BUCK1OUT_1_05V /;"	d
MAX77686_BUCK234_VOLT_MASK	include/power/max77686_pmic.h	/^#define MAX77686_BUCK234_VOLT_MASK	/;"	d
MAX77686_BUCK234_VOLT_MAX_HEX	include/power/max77686_pmic.h	/^#define MAX77686_BUCK234_VOLT_MAX_HEX	/;"	d
MAX77686_BUCK2CTRL_ON	include/power/max77686_pmic.h	/^#define MAX77686_BUCK2CTRL_ON	/;"	d
MAX77686_BUCK2DVS1_1_3V	include/power/max77686_pmic.h	/^#define MAX77686_BUCK2DVS1_1_3V	/;"	d
MAX77686_BUCK3CTRL_ON	include/power/max77686_pmic.h	/^#define MAX77686_BUCK3CTRL_ON	/;"	d
MAX77686_BUCK3DVS1_1_0125V	include/power/max77686_pmic.h	/^#define MAX77686_BUCK3DVS1_1_0125V	/;"	d
MAX77686_BUCK4CTRL_ON	include/power/max77686_pmic.h	/^#define MAX77686_BUCK4CTRL_ON	/;"	d
MAX77686_BUCK4DVS1_1_2V	include/power/max77686_pmic.h	/^#define MAX77686_BUCK4DVS1_1_2V	/;"	d
MAX77686_BUCK_DRIVER	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_DRIVER	/;"	d
MAX77686_BUCK_MODE_LPM	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_LPM	/;"	d
MAX77686_BUCK_MODE_MASK	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_MASK	/;"	d
MAX77686_BUCK_MODE_OFF	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_OFF	/;"	d
MAX77686_BUCK_MODE_ON	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_ON	/;"	d
MAX77686_BUCK_MODE_SHIFT_1	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_SHIFT_1	/;"	d
MAX77686_BUCK_MODE_SHIFT_2	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_SHIFT_2	/;"	d
MAX77686_BUCK_MODE_STANDBY	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_MODE_STANDBY	/;"	d
MAX77686_BUCK_NUM	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_NUM	/;"	d
MAX77686_BUCK_UV_HMIN	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_UV_HMIN	/;"	d
MAX77686_BUCK_UV_HSTEP	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_UV_HSTEP	/;"	d
MAX77686_BUCK_UV_LMIN	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_UV_LMIN	/;"	d
MAX77686_BUCK_UV_LSTEP	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_UV_LSTEP	/;"	d
MAX77686_BUCK_VOLT_MASK	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_VOLT_MASK	/;"	d
MAX77686_BUCK_VOLT_MAX_HEX	include/power/max77686_pmic.h	/^#define MAX77686_BUCK_VOLT_MAX_HEX	/;"	d
MAX77686_I2C_ADDR	include/power/max77686_pmic.h	/^#define MAX77686_I2C_ADDR	/;"	d
MAX77686_LD02CTRL1_1_5V	include/power/max77686_pmic.h	/^#define MAX77686_LD02CTRL1_1_5V	/;"	d
MAX77686_LD03CTRL1_1_8V	include/power/max77686_pmic.h	/^#define MAX77686_LD03CTRL1_1_8V	/;"	d
MAX77686_LD05CTRL1_1_8V	include/power/max77686_pmic.h	/^#define MAX77686_LD05CTRL1_1_8V	/;"	d
MAX77686_LD10CTRL1_1_8V	include/power/max77686_pmic.h	/^#define MAX77686_LD10CTRL1_1_8V	/;"	d
MAX77686_LDO_DRIVER	include/power/max77686_pmic.h	/^#define MAX77686_LDO_DRIVER	/;"	d
MAX77686_LDO_MODE_LPM	include/power/max77686_pmic.h	/^#define MAX77686_LDO_MODE_LPM	/;"	d
MAX77686_LDO_MODE_MASK	include/power/max77686_pmic.h	/^#define MAX77686_LDO_MODE_MASK	/;"	d
MAX77686_LDO_MODE_OFF	include/power/max77686_pmic.h	/^#define MAX77686_LDO_MODE_OFF	/;"	d
MAX77686_LDO_MODE_ON	include/power/max77686_pmic.h	/^#define MAX77686_LDO_MODE_ON	/;"	d
MAX77686_LDO_MODE_STANDBY	include/power/max77686_pmic.h	/^#define MAX77686_LDO_MODE_STANDBY	/;"	d
MAX77686_LDO_MODE_STANDBY_LPM	include/power/max77686_pmic.h	/^#define MAX77686_LDO_MODE_STANDBY_LPM	/;"	d
MAX77686_LDO_NUM	include/power/max77686_pmic.h	/^#define MAX77686_LDO_NUM	/;"	d
MAX77686_LDO_UV_HSTEP	include/power/max77686_pmic.h	/^#define MAX77686_LDO_UV_HSTEP	/;"	d
MAX77686_LDO_UV_LSTEP	include/power/max77686_pmic.h	/^#define MAX77686_LDO_UV_LSTEP	/;"	d
MAX77686_LDO_UV_MIN	include/power/max77686_pmic.h	/^#define MAX77686_LDO_UV_MIN	/;"	d
MAX77686_LDO_VOLT_MASK	include/power/max77686_pmic.h	/^#define MAX77686_LDO_VOLT_MASK	/;"	d
MAX77686_LDO_VOLT_MAX_HEX	include/power/max77686_pmic.h	/^#define MAX77686_LDO_VOLT_MAX_HEX	/;"	d
MAX77686_NUM_OF_REGS	include/power/max77686_pmic.h	/^	MAX77686_NUM_OF_REGS,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_32KHZ	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_32KHZ,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BBAT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BBAT		= 0x7e,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK1CRTL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK1CRTL	= 0x10,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK1OUT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK1OUT,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK234FREQ	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK234FREQ,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS3	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS3,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS4	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS4,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS5	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS5,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS6	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS6,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS7	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS7,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK2DVS8	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK2DVS8,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3CTRL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3CTRL,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS1	= 0x1e,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS3	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS3,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS4	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS4,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS5	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS5,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS6	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS6,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS7	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS7,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK3DVS8	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK3DVS8,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS1	= 0x28,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS3	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS3,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS4	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS4,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS5	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS5,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS6	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS6,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS7	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS7,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK4DVS8	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK4DVS8,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK5CTRL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK5CTRL,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK5OUT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK5OUT,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK6CRTL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK6CRTL,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK6OUT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK6OUT,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK7CRTL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK7CRTL,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK7OUT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK7OUT,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK8CRTL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK8CRTL,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK8OUT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK8OUT,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK9CRTL	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK9CRTL,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_BUCK9OUT	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_BUCK9OUT,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_ID	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_ID		= 0x0,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_INT1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_INT1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_INT1MSK	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_INT1MSK,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_INT2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_INT2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_INT2MSK	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_INT2MSK,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_INTSRC	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_INTSRC,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO10CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO10CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO10CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO10CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO11CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO11CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO11CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO11CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO12CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO12CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO12CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO12CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO13CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO13CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO13CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO13CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO14CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO14CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO14CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO14CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO15CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO15CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO15CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO15CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO16CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO16CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO16CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO16CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO17CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO17CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO17CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO17CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO18CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO18CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO18CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO18CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO19CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO19CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO19CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO19CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO1CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO1CTRL1	= 0x40,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO1CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO1CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO20CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO20CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO20CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO20CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO21CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO21CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO21CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO21CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO22CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO22CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO22CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO22CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO23CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO23CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO23CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO23CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO24CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO24CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO24CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO24CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO25CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO25CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO25CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO25CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO26CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO26CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO26CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO26CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO2CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO2CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO2CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO2CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO3CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO3CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO3CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO3CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO4CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO4CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO4CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO4CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO5CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO5CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO5CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO5CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO6CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO6CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO6CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO6CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO7CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO7CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO7CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO7CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO8CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO8CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO8CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO8CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO9CTRL1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO9CTRL1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_LDO9CTRL2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_LDO9CTRL2,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_MRSTB	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_MRSTB,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_ONOFFDELAY	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_ONOFFDELAY,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_PWRON	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_PWRON,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_STATUS1	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_STATUS1,$/;"	e	enum:__anon582827aa0103
MAX77686_REG_PMIC_STATUS2	include/power/max77686_pmic.h	/^	MAX77686_REG_PMIC_STATUS2,$/;"	e	enum:__anon582827aa0103
MAX77693_AVG_CURRENT	include/power/max77693_fg.h	/^	MAX77693_AVG_CURRENT	= 0x0B,$/;"	e	enum:__anonad3ce24c0103
MAX77693_AVG_VCELL	include/power/max77693_fg.h	/^	MAX77693_AVG_VCELL	= 0x19,$/;"	e	enum:__anonad3ce24c0103
MAX77693_CGAIN	include/power/max77693_fg.h	/^	MAX77693_CGAIN		= 0x2E,$/;"	e	enum:__anonad3ce24c0103
MAX77693_CHG_BASE	include/power/max77693_pmic.h	/^#define MAX77693_CHG_BASE	/;"	d
MAX77693_CHG_CC	include/power/max77693_pmic.h	/^#define MAX77693_CHG_CC	/;"	d
MAX77693_CHG_CNFG_00	include/power/max77693_pmic.h	/^#define MAX77693_CHG_CNFG_00	/;"	d
MAX77693_CHG_CNFG_02	include/power/max77693_pmic.h	/^#define MAX77693_CHG_CNFG_02	/;"	d
MAX77693_CHG_CNFG_06	include/power/max77693_pmic.h	/^#define MAX77693_CHG_CNFG_06	/;"	d
MAX77693_CHG_DETBAT	include/power/max77693_pmic.h	/^#define MAX77693_CHG_DETBAT	/;"	d
MAX77693_CHG_INT_OK	include/power/max77693_pmic.h	/^#define MAX77693_CHG_INT_OK	/;"	d
MAX77693_CHG_LOCK	include/power/max77693_pmic.h	/^#define MAX77693_CHG_LOCK	/;"	d
MAX77693_CHG_MODE_ON	include/power/max77693_pmic.h	/^#define MAX77693_CHG_MODE_ON	/;"	d
MAX77693_CHG_PREFIX	include/power/max77693_pmic.h	/^#define MAX77693_CHG_PREFIX	/;"	d
MAX77693_CHG_UNLOCK	include/power/max77693_pmic.h	/^#define MAX77693_CHG_UNLOCK	/;"	d
MAX77693_COFF	include/power/max77693_fg.h	/^	MAX77693_COFF		= 0x2F,$/;"	e	enum:__anonad3ce24c0103
MAX77693_CONFIG	include/power/max77693_fg.h	/^	MAX77693_CONFIG		= 0x1D,$/;"	e	enum:__anonad3ce24c0103
MAX77693_CURRENT	include/power/max77693_fg.h	/^	MAX77693_CURRENT	= 0x0A,$/;"	e	enum:__anonad3ce24c0103
MAX77693_DESIGN_CAP	include/power/max77693_fg.h	/^	MAX77693_DESIGN_CAP	= 0x18,$/;"	e	enum:__anonad3ce24c0103
MAX77693_ENSAFEOUT1	include/power/max77693_pmic.h	/^#define MAX77693_ENSAFEOUT1	/;"	d
MAX77693_ENSAFEOUT2	include/power/max77693_pmic.h	/^#define MAX77693_ENSAFEOUT2	/;"	d
MAX77693_FILTERCFG	include/power/max77693_fg.h	/^	MAX77693_FILTERCFG	= 0x29,$/;"	e	enum:__anonad3ce24c0103
MAX77693_FSTAT	include/power/max77693_fg.h	/^	MAX77693_FSTAT		= 0x3D,$/;"	e	enum:__anonad3ce24c0103
MAX77693_FUEL_I2C_ADDR	include/power/max77693_fg.h	/^#define MAX77693_FUEL_I2C_ADDR	/;"	d
MAX77693_LEARNCFG	include/power/max77693_fg.h	/^	MAX77693_LEARNCFG	= 0x28,$/;"	e	enum:__anonad3ce24c0103
MAX77693_MISCCFG	include/power/max77693_fg.h	/^	MAX77693_MISCCFG	= 0x2B,$/;"	e	enum:__anonad3ce24c0103
MAX77693_MUIC_ADC_MASK	include/power/max77693_muic.h	/^#define MAX77693_MUIC_ADC_MASK	/;"	d
MAX77693_MUIC_CDETCTRL	include/power/max77693_muic.h	/^	MAX77693_MUIC_CDETCTRL	= 0x0A,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_CHG_MASK	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_MASK	/;"	d
MAX77693_MUIC_CHG_NO	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_NO	/;"	d
MAX77693_MUIC_CHG_TA	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_TA	/;"	d
MAX77693_MUIC_CHG_TA_1A	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_TA_1A	/;"	d
MAX77693_MUIC_CHG_TA_500	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_TA_500	/;"	d
MAX77693_MUIC_CHG_USB	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_USB	/;"	d
MAX77693_MUIC_CHG_USB_D	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CHG_USB_D	/;"	d
MAX77693_MUIC_CONTROL1	include/power/max77693_muic.h	/^	MAX77693_MUIC_CONTROL1	= 0x0C,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_CONTROL2	include/power/max77693_muic.h	/^	MAX77693_MUIC_CONTROL2	= 0x0D,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_CONTROL3	include/power/max77693_muic.h	/^	MAX77693_MUIC_CONTROL3	= 0x0E,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_CTRL1_ADN1ADP2	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CTRL1_ADN1ADP2	/;"	d
MAX77693_MUIC_CTRL1_AUT1AUR2	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CTRL1_AUT1AUR2	/;"	d
MAX77693_MUIC_CTRL1_DN1DP2	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CTRL1_DN1DP2	/;"	d
MAX77693_MUIC_CTRL1_MASK	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CTRL1_MASK	/;"	d
MAX77693_MUIC_CTRL1_UT1UR2	include/power/max77693_muic.h	/^#define MAX77693_MUIC_CTRL1_UT1UR2	/;"	d
MAX77693_MUIC_I2C_ADDR	include/power/max77693_muic.h	/^#define MAX77693_MUIC_I2C_ADDR	/;"	d
MAX77693_MUIC_ID	include/power/max77693_muic.h	/^	MAX77693_MUIC_ID	= 0x00,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_INT1	include/power/max77693_muic.h	/^	MAX77693_MUIC_INT1	= 0x01,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_INT2	include/power/max77693_muic.h	/^	MAX77693_MUIC_INT2	= 0x02,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_INT3	include/power/max77693_muic.h	/^	MAX77693_MUIC_INT3	= 0x03,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_INTMASK1	include/power/max77693_muic.h	/^	MAX77693_MUIC_INTMASK1	= 0x07,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_INTMASK2	include/power/max77693_muic.h	/^	MAX77693_MUIC_INTMASK2	= 0x08,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_INTMASK3	include/power/max77693_muic.h	/^	MAX77693_MUIC_INTMASK3	= 0x09,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_PREFIX	include/power/max77693_muic.h	/^#define MAX77693_MUIC_PREFIX	/;"	d
MAX77693_MUIC_STATUS1	include/power/max77693_muic.h	/^	MAX77693_MUIC_STATUS1	= 0x04,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_STATUS2	include/power/max77693_muic.h	/^	MAX77693_MUIC_STATUS2	= 0x05,$/;"	e	enum:__anon0170642d0103
MAX77693_MUIC_STATUS3	include/power/max77693_muic.h	/^	MAX77693_MUIC_STATUS3	= 0x06,$/;"	e	enum:__anon0170642d0103
MAX77693_PMIC_I2C_ADDR	include/power/max77693_pmic.h	/^#define MAX77693_PMIC_I2C_ADDR	/;"	d
MAX77693_POR	include/power/max77693_fg.h	/^#define MAX77693_POR /;"	d
MAX77693_RCOMP0	include/power/max77693_fg.h	/^	MAX77693_RCOMP0		= 0x38,$/;"	e	enum:__anonad3ce24c0103
MAX77693_RELAXCFG	include/power/max77693_fg.h	/^	MAX77693_RELAXCFG	= 0x2A,$/;"	e	enum:__anonad3ce24c0103
MAX77693_SAFEOUT	include/power/max77693_pmic.h	/^#define MAX77693_SAFEOUT	/;"	d
MAX77693_SOCAV	include/power/max77693_fg.h	/^	MAX77693_SOCAV		= 0x0E,$/;"	e	enum:__anonad3ce24c0103
MAX77693_SOCMIX	include/power/max77693_fg.h	/^	MAX77693_SOCMIX		= 0x0D,$/;"	e	enum:__anonad3ce24c0103
MAX77693_SOCREP	include/power/max77693_fg.h	/^	MAX77693_SOCREP		= 0x06,$/;"	e	enum:__anonad3ce24c0103
MAX77693_STATUS	include/power/max77693_fg.h	/^	MAX77693_STATUS		= 0x00,$/;"	e	enum:__anonad3ce24c0103
MAX77693_TEMPCO	include/power/max77693_fg.h	/^	MAX77693_TEMPCO		= 0x39,$/;"	e	enum:__anonad3ce24c0103
MAX77693_VCELL	include/power/max77693_fg.h	/^	MAX77693_VCELL		= 0x09,$/;"	e	enum:__anonad3ce24c0103
MAX77693_VERSION	include/power/max77693_fg.h	/^	MAX77693_VERSION	= 0x21,$/;"	e	enum:__anonad3ce24c0103
MAX77693_VFOCV	include/power/max77693_fg.h	/^	MAX77693_VFOCV		= 0xEE,$/;"	e	enum:__anonad3ce24c0103
MAX77693_VFSOC	include/power/max77693_fg.h	/^	MAX77693_VFSOC		= 0xFF,$/;"	e	enum:__anonad3ce24c0103
MAX77802_CLKS_NUM	arch/arm/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	arch/microblaze/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	arch/mips/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	arch/nios2/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	arch/sandbox/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	arch/x86/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	arch/xtensa/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLKS_NUM	include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLKS_NUM	/;"	d
MAX77802_CLK_32K_AP	arch/arm/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	arch/microblaze/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	arch/mips/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	arch/nios2/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	arch/sandbox/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	arch/x86/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	arch/xtensa/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_AP	include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_AP	/;"	d
MAX77802_CLK_32K_CP	arch/arm/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	arch/microblaze/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	arch/mips/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	arch/nios2/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	arch/sandbox/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	arch/x86/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	arch/xtensa/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_CLK_32K_CP	include/dt-bindings/clock/maxim,max77802.h	/^#define MAX77802_CLK_32K_CP	/;"	d
MAX77802_OPMODE_LP	arch/arm/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	arch/microblaze/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	arch/mips/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	arch/nios2/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	arch/sandbox/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	arch/x86/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	arch/xtensa/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_LP	include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_LP	/;"	d
MAX77802_OPMODE_NORMAL	arch/arm/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	arch/microblaze/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	arch/mips/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	arch/nios2/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	arch/sandbox/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	arch/x86/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	arch/xtensa/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX77802_OPMODE_NORMAL	include/dt-bindings/regulator/maxim,max77802.h	/^#define MAX77802_OPMODE_NORMAL	/;"	d
MAX8997_FG_ADDR	include/power/max8997_pmic.h	/^#define MAX8997_FG_ADDR	/;"	d
MAX8997_I2C_ADDR	include/power/max8997_pmic.h	/^#define MAX8997_I2C_ADDR /;"	d
MAX8997_LDO_MAX_VAL	include/power/max8997_pmic.h	/^#define MAX8997_LDO_MAX_VAL /;"	d
MAX8997_MUIC_ADDR	include/power/max8997_pmic.h	/^#define MAX8997_MUIC_ADDR	/;"	d
MAX8997_MUIC_CDETCTRL	include/power/max8997_muic.h	/^	MAX8997_MUIC_CDETCTRL	= 0x0A,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_CHG_MASK	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_MASK	/;"	d
MAX8997_MUIC_CHG_NO	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_NO	/;"	d
MAX8997_MUIC_CHG_TA	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_TA	/;"	d
MAX8997_MUIC_CHG_TA_1A	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_TA_1A	/;"	d
MAX8997_MUIC_CHG_TA_500	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_TA_500 /;"	d
MAX8997_MUIC_CHG_USB	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_USB	/;"	d
MAX8997_MUIC_CHG_USB_D	include/power/max8997_muic.h	/^#define MAX8997_MUIC_CHG_USB_D	/;"	d
MAX8997_MUIC_CONTROL1	include/power/max8997_muic.h	/^	MAX8997_MUIC_CONTROL1	= 0x0C,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_CONTROL2	include/power/max8997_muic.h	/^	MAX8997_MUIC_CONTROL2	= 0x0D,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_CONTROL3	include/power/max8997_muic.h	/^	MAX8997_MUIC_CONTROL3	= 0x0E,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_I2C_ADDR	include/power/max8997_muic.h	/^#define MAX8997_MUIC_I2C_ADDR	/;"	d
MAX8997_MUIC_ID	include/power/max8997_muic.h	/^	MAX8997_MUIC_ID         = 0x00,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_INT1	include/power/max8997_muic.h	/^	MAX8997_MUIC_INT1	= 0x01,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_INT2	include/power/max8997_muic.h	/^	MAX8997_MUIC_INT2	= 0x02,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_INT3	include/power/max8997_muic.h	/^	MAX8997_MUIC_INT3	= 0x03,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_INTMASK1	include/power/max8997_muic.h	/^	MAX8997_MUIC_INTMASK1	= 0x07,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_INTMASK2	include/power/max8997_muic.h	/^	MAX8997_MUIC_INTMASK2	= 0x08,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_INTMASK3	include/power/max8997_muic.h	/^	MAX8997_MUIC_INTMASK3	= 0x09,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_STATUS1	include/power/max8997_muic.h	/^	MAX8997_MUIC_STATUS1	= 0x04,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_STATUS2	include/power/max8997_muic.h	/^	MAX8997_MUIC_STATUS2	= 0x05,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_MUIC_STATUS3	include/power/max8997_muic.h	/^	MAX8997_MUIC_STATUS3	= 0x06,$/;"	e	enum:__anonc3f8b93e0103
MAX8997_REG_BBCCTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BBCCTRL	= 0x60,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BOOST_CNTL	include/power/max8997_pmic.h	/^	MAX8997_REG_BOOST_CNTL	= 0x67,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1CTRL	= 0x18,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS1	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS1	= 0x19,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS2	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS2	= 0x1a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS3	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS3	= 0x1b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS4	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS4	= 0x1c,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS5	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS5	= 0x1d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS6	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS6	= 0x1e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS7	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS7	= 0x1f,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK1DVS8	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK1DVS8	= 0x20,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2CTRL	= 0x21,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS1	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS1	= 0x22,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS2	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS2	= 0x23,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS3	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS3	= 0x24,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS4	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS4	= 0x25,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS5	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS5	= 0x26,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS6	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS6	= 0x27,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS7	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS7	= 0x28,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK2DVS8	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK2DVS8	= 0x29,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK3CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK3CTRL	= 0x2a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK3DVS	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK3DVS	= 0x2b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK4CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK4CTRL	= 0x2c,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK4DVS	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK4DVS	= 0x2d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5CTRL	= 0x2e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS1	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS1	= 0x2f,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS2	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS2	= 0x30,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS3	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS3	= 0x31,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS4	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS4	= 0x32,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS5	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS5	= 0x33,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS6	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS6	= 0x34,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS7	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS7	= 0x35,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK5DVS8	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK5DVS8	= 0x36,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK6BPSKIPCTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK6BPSKIPCTRL	= 0x38,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK6CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK6CTRL	= 0x37,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK7CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK7CTRL	= 0x39,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCK7DVS	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCK7DVS	= 0x3a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_BUCKRAMP	include/power/max8997_pmic.h	/^	MAX8997_REG_BUCKRAMP	= 0x15,$/;"	e	enum:__anonca676f190103
MAX8997_REG_DVSOKTIMER1	include/power/max8997_pmic.h	/^	MAX8997_REG_DVSOKTIMER1	= 0x97,$/;"	e	enum:__anonca676f190103
MAX8997_REG_DVSOKTIMER2	include/power/max8997_pmic.h	/^	MAX8997_REG_DVSOKTIMER2	= 0x98,$/;"	e	enum:__anonca676f190103
MAX8997_REG_DVSOKTIMER4	include/power/max8997_pmic.h	/^	MAX8997_REG_DVSOKTIMER4	= 0x99,$/;"	e	enum:__anonca676f190103
MAX8997_REG_DVSOKTIMER5	include/power/max8997_pmic.h	/^	MAX8997_REG_DVSOKTIMER5	= 0x9a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_FLASH1_CUR	include/power/max8997_pmic.h	/^	MAX8997_REG_FLASH1_CUR	= 0x63, \/* 0x63 ~ 0x6e for FLASH *\/$/;"	e	enum:__anonca676f190103
MAX8997_REG_FLASH2_CUR	include/power/max8997_pmic.h	/^	MAX8997_REG_FLASH2_CUR	= 0x64,$/;"	e	enum:__anonca676f190103
MAX8997_REG_FLASHSTATUS	include/power/max8997_pmic.h	/^	MAX8997_REG_FLASHSTATUS	= 0x6d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_FLASHSTATUSMASK	include/power/max8997_pmic.h	/^	MAX8997_REG_FLASHSTATUSMASK	= 0x6e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_FLASH_CNTL	include/power/max8997_pmic.h	/^	MAX8997_REG_FLASH_CNTL	= 0x69,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL1	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL1	= 0x70,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL10	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL10	= 0x79,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL11	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL11	= 0x7a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL12	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL12	= 0x7b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL2	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL2	= 0x71,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL3	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL3	= 0x72,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL4	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL4	= 0x73,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL5	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL5	= 0x74,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL6	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL6	= 0x75,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL7	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL7	= 0x76,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL8	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL8	= 0x77,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GPIOCNTL9	include/power/max8997_pmic.h	/^	MAX8997_REG_GPIOCNTL9	= 0x78,$/;"	e	enum:__anonca676f190103
MAX8997_REG_GSMB_CUR	include/power/max8997_pmic.h	/^	MAX8997_REG_GSMB_CUR	= 0x66,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT1	include/power/max8997_pmic.h	/^	MAX8997_REG_INT1	= 0x03,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT1MSK	include/power/max8997_pmic.h	/^	MAX8997_REG_INT1MSK	= 0x08,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT2	include/power/max8997_pmic.h	/^	MAX8997_REG_INT2	= 0x04,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT2MSK	include/power/max8997_pmic.h	/^	MAX8997_REG_INT2MSK	= 0x09,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT3	include/power/max8997_pmic.h	/^	MAX8997_REG_INT3	= 0x05,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT3MSK	include/power/max8997_pmic.h	/^	MAX8997_REG_INT3MSK	= 0x0a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT4	include/power/max8997_pmic.h	/^	MAX8997_REG_INT4	= 0x06,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INT4MSK	include/power/max8997_pmic.h	/^	MAX8997_REG_INT4MSK	= 0x0b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_INTSRC	include/power/max8997_pmic.h	/^	MAX8997_REG_INTSRC	= 0x02,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LBCNFG1	include/power/max8997_pmic.h	/^	MAX8997_REG_LBCNFG1	= 0x5e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LBCNFG2	include/power/max8997_pmic.h	/^	MAX8997_REG_LBCNFG2	= 0x5f,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO10CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO10CONFIG	= 0x89,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO10CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO10CTRL	= 0x44,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO11CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO11CONFIG	= 0x8a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO11CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO11CTRL	= 0x45,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO12CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO12CONFIG	= 0x8b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO12CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO12CTRL	= 0x46,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO13CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO13CONFIG	= 0x8c,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO13CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO13CTRL	= 0x47,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO14CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO14CONFIG	= 0x8d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO14CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO14CTRL	= 0x48,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO15CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO15CONFIG	= 0x8e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO15CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO15CTRL	= 0x49,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO16CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO16CONFIG	= 0x8f,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO16CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO16CTRL	= 0x4a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO17CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO17CONFIG	= 0x90,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO17CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO17CTRL	= 0x4b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO18CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO18CONFIG	= 0x91,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO18CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO18CTRL	= 0x4c,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO1CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO1CONFIG	= 0x80,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO1CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO1CTRL	= 0x3b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO21CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO21CONFIG	= 0x92,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO21CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO21CTRL	= 0x4d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO2CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO2CONFIG	= 0x81,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO2CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO2CTRL	= 0x3c,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO3CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO3CONFIG	= 0x82,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO3CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO3CTRL	= 0x3d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO4CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO4CONFIG	= 0x83,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO4CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO4CTRL	= 0x3e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO5CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO5CONFIG	= 0x84,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO5CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO5CTRL	= 0x3f,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO6CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO6CONFIG	= 0x85,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO6CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO6CTRL	= 0x40,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO7CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO7CONFIG	= 0x86,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO7CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO7CTRL	= 0x41,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO8CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO8CONFIG	= 0x87,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO8CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO8CTRL	= 0x42,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO9CONFIG	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO9CONFIG	= 0x88,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LDO9CTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_LDO9CTRL	= 0x43,$/;"	e	enum:__anonca676f190103
MAX8997_REG_LEN_CNTL	include/power/max8997_pmic.h	/^	MAX8997_REG_LEN_CNTL	= 0x68,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MAINCON1	include/power/max8997_pmic.h	/^	MAX8997_REG_MAINCON1	= 0x13,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MAINCON2	include/power/max8997_pmic.h	/^	MAX8997_REG_MAINCON2	= 0x14,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MAXFLASH1	include/power/max8997_pmic.h	/^	MAX8997_REG_MAXFLASH1	= 0x6b,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MAXFLASH2	include/power/max8997_pmic.h	/^	MAX8997_REG_MAXFLASH2	= 0x6c,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MBCCTRL1	include/power/max8997_pmic.h	/^	MAX8997_REG_MBCCTRL1	= 0x50,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MBCCTRL2	include/power/max8997_pmic.h	/^	MAX8997_REG_MBCCTRL2	= 0x51,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MBCCTRL3	include/power/max8997_pmic.h	/^	MAX8997_REG_MBCCTRL3	= 0x52,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MBCCTRL4	include/power/max8997_pmic.h	/^	MAX8997_REG_MBCCTRL4	= 0x53,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MBCCTRL5	include/power/max8997_pmic.h	/^	MAX8997_REG_MBCCTRL5	= 0x54,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MBCCTRL6	include/power/max8997_pmic.h	/^	MAX8997_REG_MBCCTRL6	= 0x55,$/;"	e	enum:__anonca676f190103
MAX8997_REG_MOVIE_CUR	include/power/max8997_pmic.h	/^	MAX8997_REG_MOVIE_CUR	= 0x65,$/;"	e	enum:__anonca676f190103
MAX8997_REG_OTPCGHCVS	include/power/max8997_pmic.h	/^	MAX8997_REG_OTPCGHCVS	= 0x56,$/;"	e	enum:__anonca676f190103
MAX8997_REG_PMIC_ID0	include/power/max8997_pmic.h	/^	MAX8997_REG_PMIC_ID0	= 0x00,$/;"	e	enum:__anonca676f190103
MAX8997_REG_PMIC_ID1	include/power/max8997_pmic.h	/^	MAX8997_REG_PMIC_ID1	= 0x01,$/;"	e	enum:__anonca676f190103
MAX8997_REG_SAFEOUTCTRL	include/power/max8997_pmic.h	/^	MAX8997_REG_SAFEOUTCTRL = 0x5a,$/;"	e	enum:__anonca676f190103
MAX8997_REG_STATUS1	include/power/max8997_pmic.h	/^	MAX8997_REG_STATUS1	= 0x0d,$/;"	e	enum:__anonca676f190103
MAX8997_REG_STATUS2	include/power/max8997_pmic.h	/^	MAX8997_REG_STATUS2	= 0x0e,$/;"	e	enum:__anonca676f190103
MAX8997_REG_STATUS3	include/power/max8997_pmic.h	/^	MAX8997_REG_STATUS3	= 0x0f,$/;"	e	enum:__anonca676f190103
MAX8997_REG_STATUS4	include/power/max8997_pmic.h	/^	MAX8997_REG_STATUS4	= 0x10,$/;"	e	enum:__anonca676f190103
MAX8997_REG_WDT_CNTL	include/power/max8997_pmic.h	/^	MAX8997_REG_WDT_CNTL	= 0x6a,$/;"	e	enum:__anonca676f190103
MAX8997_RTC_ADDR	include/power/max8997_pmic.h	/^#define MAX8997_RTC_ADDR	/;"	d
MAX8998_I2C_ADDR	include/power/max8998_pmic.h	/^#define MAX8998_I2C_ADDR /;"	d
MAX8998_LDO17	include/power/max8998_pmic.h	/^#define MAX8998_LDO17	/;"	d
MAX8998_LDO3	include/power/max8998_pmic.h	/^#define MAX8998_LDO3	/;"	d
MAX8998_LDO4	include/power/max8998_pmic.h	/^#define MAX8998_LDO4	/;"	d
MAX8998_LDO7	include/power/max8998_pmic.h	/^#define MAX8998_LDO7	/;"	d
MAX8998_LDO8	include/power/max8998_pmic.h	/^#define MAX8998_LDO8	/;"	d
MAX8998_REG_BKCHR	include/power/max8998_pmic.h	/^	MAX8998_REG_BKCHR,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK1_VOLTAGE1	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK1_VOLTAGE1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK1_VOLTAGE2	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK1_VOLTAGE2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK1_VOLTAGE3	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK1_VOLTAGE3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK1_VOLTAGE4	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK1_VOLTAGE4,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK2_VOLTAGE1	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK2_VOLTAGE1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK2_VOLTAGE2	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK2_VOLTAGE2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK3	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK4	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK4,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_BUCK_ACTIVE_DISCHARGE3	include/power/max8998_pmic.h	/^	MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_CHGR1	include/power/max8998_pmic.h	/^	MAX8998_REG_CHGR1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_CHGR2	include/power/max8998_pmic.h	/^	MAX8998_REG_CHGR2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQ1	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQ1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQ2	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQ2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQ3	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQ3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQ4	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQ4,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQM1	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQM1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQM2	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQM2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQM3	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQM3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_IRQM4	include/power/max8998_pmic.h	/^	MAX8998_REG_IRQM4,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LBCNFG1	include/power/max8998_pmic.h	/^	MAX8998_REG_LBCNFG1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LBCNFG2	include/power/max8998_pmic.h	/^	MAX8998_REG_LBCNFG2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO10_LDO11	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO10_LDO11,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO12	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO12,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO13	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO13,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO14	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO14,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO15	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO15,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO16	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO16,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO17	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO17,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO2_LDO3	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO2_LDO3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO4	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO4,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO5	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO5,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO6	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO6,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO7	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO7,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO8_LDO9	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO8_LDO9,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO_ACTIVE_DISCHARGE1	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO_ACTIVE_DISCHARGE1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_LDO_ACTIVE_DISCHARGE2	include/power/max8998_pmic.h	/^	MAX8998_REG_LDO_ACTIVE_DISCHARGE2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_ONOFF1	include/power/max8998_pmic.h	/^	MAX8998_REG_ONOFF1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_ONOFF2	include/power/max8998_pmic.h	/^	MAX8998_REG_ONOFF2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_ONOFF3	include/power/max8998_pmic.h	/^	MAX8998_REG_ONOFF3,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_ONOFF4	include/power/max8998_pmic.h	/^	MAX8998_REG_ONOFF4,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_STATUS1	include/power/max8998_pmic.h	/^	MAX8998_REG_STATUS1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_STATUS2	include/power/max8998_pmic.h	/^	MAX8998_REG_STATUS2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_STATUSM1	include/power/max8998_pmic.h	/^	MAX8998_REG_STATUSM1,$/;"	e	enum:__anonb6a943fa0103
MAX8998_REG_STATUSM2	include/power/max8998_pmic.h	/^	MAX8998_REG_STATUSM2,$/;"	e	enum:__anonb6a943fa0103
MAX8998_SAFEOUT1	include/power/max8998_pmic.h	/^#define MAX8998_SAFEOUT1	/;"	d
MAX98095	drivers/sound/max98095.c	/^	MAX98095,$/;"	e	enum:max98095_type	file:
MAXBANKS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define MAXBANKS	/;"	d	file:
MAXBANKSPERDIMM	board/amcc/yucca/yucca.h	/^#define MAXBANKSPERDIMM	/;"	d
MAXBITS	lib/zlib/inftrees.c	/^#define MAXBITS /;"	d	file:
MAXBUFBYTES	tools/gdb/remote.c	/^#define MAXBUFBYTES(/;"	d	file:
MAXBXCF	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define MAXBXCF	/;"	d	file:
MAXBXCF	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^#define MAXBXCF	/;"	d	file:
MAXBXCF	board/amcc/yucca/yucca.h	/^#define MAXBXCF	/;"	d
MAXBXCR	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define MAXBXCR	/;"	d	file:
MAXCONTROLLERS	drivers/qe/uec.c	/^#define MAXCONTROLLERS	/;"	d	file:
MAXD	lib/zlib/inftrees.h	/^#define MAXD /;"	d
MAXDIMMS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define MAXDIMMS	/;"	d	file:
MAXDIMMS	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define MAXDIMMS	/;"	d	file:
MAXDIMMS	board/amcc/yucca/yucca.h	/^#define MAXDIMMS	/;"	d
MAXD_LOG	lib/lz4.c	/^#define MAXD_LOG /;"	d	file:
MAXFILES	scripts/docproc.c	/^#define MAXFILES /;"	d	file:
MAXFRM_MASK	drivers/net/fm/dtsec.c	/^#define MAXFRM_MASK	/;"	d	file:
MAXFRM_MASK	drivers/net/fm/memac.c	/^#define MAXFRM_MASK	/;"	d	file:
MAXFRM_MASK	drivers/net/fm/tgec.c	/^#define MAXFRM_MASK	/;"	d	file:
MAXIMUM_ETHERNET_FRAME_SIZE	drivers/net/e1000.h	/^#define MAXIMUM_ETHERNET_FRAME_SIZE /;"	d
MAXIMUM_ETHERNET_PACKET_SIZE	drivers/net/e1000.h	/^#define MAXIMUM_ETHERNET_PACKET_SIZE /;"	d
MAXITEMSTR	scripts/kconfig/lxdialog/dialog.h	/^#define MAXITEMSTR /;"	d
MAXLINESZ	scripts/docproc.c	/^#define MAXLINESZ /;"	d	file:
MAXNAMEL	drivers/net/bcm-sf2-eth-gmac.h	/^#define MAXNAMEL	/;"	d
MAXP	drivers/usb/host/r8a66597.h	/^#define	MAXP	/;"	d
MAXP2BYTES	drivers/usb/gadget/dwc2_udc_otg.c	/^#define MAXP2BYTES(/;"	d	file:
MAXPSW	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define MAXPSW /;"	d
MAXPSW	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define MAXPSW /;"	d
MAXPSW	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define MAXPSW /;"	d
MAXPSW	drivers/usb/host/ohci-s3c24xx.h	/^#define MAXPSW /;"	d
MAXPSW	drivers/usb/host/ohci.h	/^#define MAXPSW /;"	d
MAXRANKS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define MAXRANKS	/;"	d	file:
MAXRANKS	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define MAXRANKS	/;"	d	file:
MAXRANKS	board/amcc/yucca/yucca.h	/^#define MAXRANKS	/;"	d
MAXRANKSPERDIMM	board/amcc/yucca/yucca.h	/^#define MAXRANKSPERDIMM	/;"	d
MAXRXLEN	drivers/net/ax88180.h	/^#define MAXRXLEN	/;"	d
MAXSDRAMMEMORY	board/amcc/yucca/yucca.h	/^#define MAXSDRAMMEMORY	/;"	d
MAXSEG_64K	include/u-boot/zlib.h	/^#  define MAXSEG_64K$/;"	d
MAXTOUCH_RESET_GPIO	board/siemens/rut/board.c	/^#define MAXTOUCH_RESET_GPIO	/;"	d	file:
MAX_ACPI_TABLES	arch/x86/include/asm/acpi_table.h	/^#define MAX_ACPI_TABLES	/;"	d
MAX_ALGOS	arch/x86/cpu/quark/mrc_util.h	/^	MAX_ALGOS,$/;"	e	enum:__anon78bf36a60203
MAX_BANK	drivers/gpio/pca953x_gpio.c	/^#define MAX_BANK /;"	d	file:
MAX_BANKS	drivers/mtd/nand/fsl_elbc_nand.c	/^#define MAX_BANKS /;"	d	file:
MAX_BANKS	drivers/mtd/nand/fsl_ifc_nand.c	/^#define MAX_BANKS	/;"	d	file:
MAX_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MAX_BASE_ADDR /;"	d
MAX_BIOSLEN	drivers/bios_emulator/atibios.c	/^#define MAX_BIOSLEN	/;"	d	file:
MAX_BITS	lib/zlib/deflate.h	/^#define MAX_BITS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLACKFIN_GPIOS	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define MAX_BLACKFIN_GPIOS /;"	d
MAX_BLK_ADDR	drivers/mtd/nand/denali.h	/^#define MAX_BLK_ADDR(/;"	d
MAX_BLK_ADDR__VALUE	drivers/mtd/nand/denali.h	/^#define     MAX_BLK_ADDR__VALUE	/;"	d
MAX_BLK_CNT	include/fsl_esdhc.h	/^#define MAX_BLK_CNT	/;"	d
MAX_BL_BITS	lib/zlib/trees.c	/^#define MAX_BL_BITS /;"	d	file:
MAX_BOOTSTREAM_SIZE	tools/mxsboot.c	/^#define	MAX_BOOTSTREAM_SIZE	/;"	d	file:
MAX_BPORTALS	arch/powerpc/cpu/mpc85xx/portals.c	/^#define MAX_BPORTALS /;"	d	file:
MAX_BREAK_POINTS	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^#define MAX_BREAK_POINTS /;"	d	file:
MAX_BREAK_POINTS	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^#define MAX_BREAK_POINTS /;"	d	file:
MAX_BREAK_POINTS	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^#define MAX_BREAK_POINTS /;"	d	file:
MAX_BRIGHTNESS	board/pdm360ng/pdm360ng.c	/^#define MAX_BRIGHTNESS	/;"	d	file:
MAX_BUFFER	arch/powerpc/cpu/mpc8260/spi.c	/^#define MAX_BUFFER	/;"	d	file:
MAX_BUFFER	arch/powerpc/cpu/mpc8xx/spi.c	/^#define MAX_BUFFER	/;"	d	file:
MAX_BUFFERRAM	include/linux/mtd/onenand.h	/^#define MAX_BUFFERRAM	/;"	d
MAX_BUF_SIZE	drivers/net/ks8851_mll.c	/^#define MAX_BUF_SIZE	/;"	d	file:
MAX_BUF_SIZE	drivers/net/sh_eth.h	/^#define MAX_BUF_SIZE	/;"	d
MAX_BURST	drivers/ddr/microchip/ddr2_regs.h	/^#define MAX_BURST(/;"	d
MAX_BURST	drivers/usb/host/xhci.h	/^#define MAX_BURST(/;"	d
MAX_BURST_MASK	drivers/usb/host/xhci.h	/^#define MAX_BURST_MASK	/;"	d
MAX_BURST_SHIFT	drivers/usb/host/xhci.h	/^#define MAX_BURST_SHIFT	/;"	d
MAX_BUSES	arch/powerpc/cpu/mpc83xx/pci.c	/^#define MAX_BUSES /;"	d	file:
MAX_BUS_NUM	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define MAX_BUS_NUM	/;"	d
MAX_BUS_NUM	include/faraday/ftpci100.h	/^#define MAX_BUS_NUM	/;"	d
MAX_BYTES_PER_TRANS	drivers/block/dwc_ahsata.c	/^#define MAX_BYTES_PER_TRANS /;"	d	file:
MAX_BYTE_LANES	arch/x86/include/asm/arch-quark/mrc.h	/^#define MAX_BYTE_LANES	/;"	d
MAX_CAAM_DESCSIZE	drivers/crypto/fsl/desc.h	/^#define MAX_CAAM_DESCSIZE	/;"	d
MAX_CBMEM_ENTRIES	arch/x86/include/asm/coreboot_tables.h	/^#define MAX_CBMEM_ENTRIES	/;"	d
MAX_CHANNELS	arch/x86/include/asm/arch-quark/mrc.h	/^#define MAX_CHANNELS	/;"	d
MAX_CHECK_PACKET	drivers/net/uli526x.c	/^#define MAX_CHECK_PACKET	/;"	d	file:
MAX_CHIPS	include/linux/mtd/doc2000.h	/^#define MAX_CHIPS /;"	d
MAX_CHIPS_MIL	include/linux/mtd/doc2000.h	/^#define MAX_CHIPS_MIL /;"	d
MAX_CHIPS_MPLUS	include/linux/mtd/doc2000.h	/^#define MAX_CHIPS_MPLUS /;"	d
MAX_CLUSTSIZE	include/fat.h	/^#define MAX_CLUSTSIZE	/;"	d
MAX_CMD_BUFFER	tools/aisimage.c	/^#define MAX_CMD_BUFFER	/;"	d	file:
MAX_COMMAND_SIZE	drivers/usb/gadget/storage_common.c	/^#define MAX_COMMAND_SIZE	/;"	d	file:
MAX_CONFIG_INTERFACES	include/linux/usb/composite.h	/^#define	MAX_CONFIG_INTERFACES	/;"	d
MAX_CONFIG_SELECT_NB	board/amcc/yucca/yucca.h	/^#define MAX_CONFIG_SELECT_NB	/;"	d
MAX_CONFLICTS	net/link_local.c	/^	MAX_CONFLICTS = 10,$/;"	e	enum:__anonc9befdc40103	file:
MAX_CORE_SELECT_NB	board/amcc/bamboo/bamboo.h	/^#define MAX_CORE_SELECT_NB	/;"	d
MAX_COUNT	cmd/bootmenu.c	/^#define MAX_COUNT	/;"	d	file:
MAX_COUNT	drivers/tpm/tpm_tis.h	/^#define MAX_COUNT	/;"	d
MAX_COUNT_LONG	drivers/tpm/tpm_tis.h	/^#define MAX_COUNT_LONG	/;"	d
MAX_CPUS	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config MAX_CPUS$/;"	c	menu:LS102xA architecture
MAX_CPUS	arch/arm/cpu/armv7/mx6/mp.c	/^#define MAX_CPUS /;"	d	file:
MAX_CPUS	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config MAX_CPUS$/;"	c	menu:Layerscape architecture
MAX_CPUS	arch/x86/Kconfig	/^config MAX_CPUS$/;"	c	menu:x86 architecture
MAX_CPU_MRQ_ID	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MAX_CPU_MRQ_ID	/;"	d
MAX_CR_LOOP	arch/arm/mach-exynos/include/mach/dp_info.h	/^#define MAX_CR_LOOP	/;"	d
MAX_CR_LOOP	drivers/video/rockchip/rk_edp.c	/^#define MAX_CR_LOOP /;"	d	file:
MAX_CS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MAX_CS	/;"	d
MAX_CS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MAX_CS	/;"	d
MAX_CS_COUNT	drivers/spi/atmel_spi.c	/^#define MAX_CS_COUNT	/;"	d	file:
MAX_CS_NUM	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define MAX_CS_NUM	/;"	d
MAX_CTRL_CS	arch/blackfin/include/asm/config-pre.h	/^#define MAX_CTRL_CS /;"	d
MAX_CTRL_READ_TRIES	include/power/tps65090.h	/^	MAX_CTRL_READ_TRIES = 5,$/;"	e	enum:__anon01d79aa50203
MAX_DATA_ARRAY	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define MAX_DATA_ARRAY	/;"	d
MAX_DATA_BYTES_PER_SG	drivers/block/dwc_ahsata.c	/^#define MAX_DATA_BYTES_PER_SG /;"	d	file:
MAX_DATA_BYTE_COUNT	drivers/block/ahci.c	/^#define MAX_DATA_BYTE_COUNT /;"	d	file:
MAX_DDR_CLK	arch/arm/cpu/armv7/mx5/clock.c	/^#define MAX_DDR_CLK /;"	d	file:
MAX_DELAY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_DELAY /;"	d
MAX_DELAY_INV	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_DELAY_INV /;"	d
MAX_DELAY_INV_LIMIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_DELAY_INV_LIMIT /;"	d
MAX_DELAY_STOP_STR	common/autoboot.c	/^#define MAX_DELAY_STOP_STR /;"	d	file:
MAX_DELAY_US	drivers/tpm/tpm_tis_lpc.c	/^#define MAX_DELAY_US	/;"	d	file:
MAX_DESC_BUF_SZ	drivers/net/calxedaxgmac.c	/^#define MAX_DESC_BUF_SZ	/;"	d	file:
MAX_DEVICE	drivers/usb/host/dwc2.c	/^#define MAX_DEVICE	/;"	d	file:
MAX_DEVS	drivers/usb/host/xhci.h	/^#define MAX_DEVS(/;"	d
MAX_DEV_ID_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MAX_DEV_ID_NUM	/;"	d
MAX_DEV_NUM	include/faraday/ftpci100.h	/^#define MAX_DEV_NUM	/;"	d
MAX_DIES	include/linux/mtd/onenand.h	/^#define MAX_DIES	/;"	d
MAX_DIMM_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MAX_DIMM_ADDR	/;"	d
MAX_DIMM_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MAX_DIMM_ADDR	/;"	d
MAX_DIMM_NUM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_DIMM_NUM /;"	d
MAX_DIMM_NUM	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MAX_DIMM_NUM	/;"	d
MAX_DIST	lib/zlib/deflate.h	/^#define MAX_DIST(/;"	d
MAX_DISTANCE	lib/lz4.c	/^#define MAX_DISTANCE /;"	d	file:
MAX_DMA1_LEN	drivers/qe/uec.h	/^#define MAX_DMA1_LEN	/;"	d
MAX_DMA2_LEN	drivers/qe/uec.h	/^#define MAX_DMA2_LEN	/;"	d
MAX_DQ_NUM	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define MAX_DQ_NUM	/;"	d
MAX_DQ_READ_LEVELING_DELAY	drivers/ddr/marvell/a38x/ddr3_training_leveling.h	/^#define MAX_DQ_READ_LEVELING_DELAY /;"	d
MAX_DRIVE_CURRENT_REACH_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_DRIVE_CURRENT_REACH_0	/;"	d
MAX_DRIVE_CURRENT_REACH_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_DRIVE_CURRENT_REACH_1	/;"	d
MAX_DRIVE_CURRENT_REACH_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_DRIVE_CURRENT_REACH_2	/;"	d
MAX_DRIVE_CURRENT_REACH_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_DRIVE_CURRENT_REACH_3	/;"	d
MAX_ENDPOINT	drivers/usb/host/dwc2.c	/^#define MAX_ENDPOINT	/;"	d	file:
MAX_ENDPOINT	drivers/usb/musb/musb_udc.c	/^#define MAX_ENDPOINT /;"	d	file:
MAX_ENDPOINTS	include/usb/designware_udc.h	/^#define MAX_ENDPOINTS	/;"	d
MAX_ENDPOINTS	include/usb/mpc8xx_udc.h	/^#define MAX_ENDPOINTS	/;"	d
MAX_ENDPOINTS	include/usb/pxa27x_udc.h	/^#define MAX_ENDPOINTS	/;"	d
MAX_ENETMODE_PARM	board/amcc/yucca/yucca.h	/^#define MAX_ENETMODE_PARM	/;"	d
MAX_ENET_INIT_PARAM_ENTRIES_RX	drivers/qe/uec.h	/^#define MAX_ENET_INIT_PARAM_ENTRIES_RX	/;"	d
MAX_ENET_INIT_PARAM_ENTRIES_TX	drivers/qe/uec.h	/^#define MAX_ENET_INIT_PARAM_ENTRIES_TX	/;"	d
MAX_ENV_SIZE	cmd/bootmenu.c	/^#define MAX_ENV_SIZE	/;"	d	file:
MAX_ENV_SIZE	cmd/nvedit.c	/^#define	MAX_ENV_SIZE	/;"	d	file:
MAX_EP_CTX_NUM	drivers/usb/host/xhci.h	/^#define MAX_EP_CTX_NUM	/;"	d
MAX_EQ_LOOP	arch/arm/mach-exynos/include/mach/dp_info.h	/^#define MAX_EQ_LOOP	/;"	d
MAX_EQ_LOOP	drivers/video/rockchip/rk_edp.c	/^#define MAX_EQ_LOOP /;"	d	file:
MAX_ERRNO	include/linux/err.h	/^#define MAX_ERRNO	/;"	d
MAX_ERR_LOG	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define MAX_ERR_LOG /;"	d
MAX_ERR_NUM	include/reiserfs.h	/^  MAX_ERR_NUM$/;"	e	enum:__anoncca62f110103
MAX_ESIT_PAYLOAD_FOR_EP	drivers/usb/host/xhci.h	/^#define MAX_ESIT_PAYLOAD_FOR_EP(/;"	d
MAX_ETH_FRAME_SIZE	drivers/net/rtl8169.c	/^#define MAX_ETH_FRAME_SIZE	/;"	d	file:
MAX_EXIT	drivers/usb/host/xhci.h	/^#define MAX_EXIT	/;"	d
MAX_FEATURES	cmd/pcmcia.c	/^#define MAX_FEATURES	/;"	d	file:
MAX_FEATURES	drivers/pcmcia/ti_pci1410a.c	/^#define MAX_FEATURES	/;"	d	file:
MAX_FET_NUM	include/power/tps65090.h	/^	MAX_FET_NUM	= 7,$/;"	e	enum:__anon01d79aa50203
MAX_FILES	include/common.h	/^#define MAX_FILES	/;"	d
MAX_FLOORS	include/linux/mtd/doc2000.h	/^#define MAX_FLOORS /;"	d
MAX_FLOORS_MIL	include/linux/mtd/doc2000.h	/^#define MAX_FLOORS_MIL /;"	d
MAX_FLOORS_MPLUS	include/linux/mtd/doc2000.h	/^#define MAX_FLOORS_MPLUS /;"	d
MAX_FRAME_LEN	drivers/qe/uec.h	/^#define MAX_FRAME_LEN	/;"	d
MAX_FSYS	arch/m68k/cpu/mcf532x/speed.c	/^#define MAX_FSYS	/;"	d	file:
MAX_FUN_NUM	include/faraday/ftpci100.h	/^#define MAX_FUN_NUM	/;"	d
MAX_FVCO	arch/m68k/cpu/mcf532x/speed.c	/^#define MAX_FVCO	/;"	d	file:
MAX_GPIO	drivers/gpio/lpc32xx_gpio.c	/^#define MAX_GPIO /;"	d	file:
MAX_GPIOS	arch/blackfin/include/asm/gpio.h	/^#define MAX_GPIOS /;"	d
MAX_GPIOS	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	MAX_GPIOS	= 95,$/;"	e	enum:__anond59805d10103	file:
MAX_GPIO_BANKS	arch/arm/mach-at91/include/mach/gpio.h	/^#define MAX_GPIO_BANKS	/;"	d
MAX_GROUPS	arch/arm/mach-tegra/xusb-padctl-common.h	/^#define MAX_GROUPS /;"	d
MAX_GRPS	arch/openrisc/include/asm/spr-defs.h	/^#define MAX_GRPS /;"	d
MAX_HASH_VALUE	scripts/kconfig/zconf.hash.c	/^      MAX_HASH_VALUE = 72$/;"	e	enum:kconf_id_lookup::__anond60376ef0103	file:
MAX_HC_PORTS	drivers/usb/host/xhci.h	/^#define MAX_HC_PORTS /;"	d
MAX_HC_SLOTS	drivers/usb/host/xhci.h	/^#define MAX_HC_SLOTS /;"	d
MAX_HEIGHT	fs/reiserfs/reiserfs_private.h	/^#define MAX_HEIGHT /;"	d
MAX_HWADDR_SIZE	board/Arcturus/ucp1020/cmd_arc.c	/^#define MAX_HWADDR_SIZE /;"	d	file:
MAX_HW_CFG_SIZE_V1	tools/imximage.h	/^#define MAX_HW_CFG_SIZE_V1 /;"	d
MAX_HW_CFG_SIZE_V2	tools/imximage.h	/^#define MAX_HW_CFG_SIZE_V2 /;"	d
MAX_I2C_RETRY	board/nvidia/cardhu/cardhu.c	/^#define MAX_I2C_RETRY	/;"	d	file:
MAX_I2C_RETRY	board/toradex/apalis_t30/apalis_t30.c	/^#define MAX_I2C_RETRY	/;"	d	file:
MAX_I2C_RETRY	board/toradex/colibri_t20/colibri_t20.c	/^#define MAX_I2C_RETRY	/;"	d	file:
MAX_I2C_RETRY	drivers/power/tps6586x.c	/^#define MAX_I2C_RETRY	/;"	d	file:
MAX_IDENT_CHARS	cmd/pcmcia.c	/^#define MAX_IDENT_CHARS	/;"	d	file:
MAX_IDENT_CHARS	drivers/pcmcia/ti_pci1410a.c	/^#define MAX_IDENT_CHARS	/;"	d	file:
MAX_IDENT_FIELDS	cmd/pcmcia.c	/^#define	MAX_IDENT_FIELDS	/;"	d	file:
MAX_IDENT_FIELDS	drivers/pcmcia/ti_pci1410a.c	/^#define	MAX_IDENT_FIELDS	/;"	d	file:
MAX_IDR_ID	drivers/mtd/mtdcore.c	/^#define MAX_IDR_ID	/;"	d	file:
MAX_IMAGES	cmd/armflash.c	/^#define MAX_IMAGES /;"	d	file:
MAX_INPUT_SIZE	tools/socfpgaimage.c	/^#define MAX_INPUT_SIZE	/;"	d	file:
MAX_INTERFACES	drivers/serial/usbtty.c	/^#define MAX_INTERFACES /;"	d	file:
MAX_INTERFACES	drivers/usb/gadget/core.c	/^#define MAX_INTERFACES /;"	d	file:
MAX_INTERFACE_NUM	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define MAX_INTERFACE_NUM	/;"	d
MAX_INTS_PER_SEC	drivers/net/e1000.c	/^#define MAX_INTS_PER_SEC	/;"	d	file:
MAX_INTX_ENTRIES	arch/x86/include/asm/pirq_routing.h	/^#define MAX_INTX_ENTRIES	/;"	d
MAX_INT_BUFSZ	examples/standalone/mem_to_mem_idma2intr.c	/^#define MAX_INT_BUFSZ	/;"	d	file:
MAX_INT_QUEUESIZE	drivers/usb/host/ohci-hcd.c	/^#define MAX_INT_QUEUESIZE /;"	d	file:
MAX_INUM	fs/ubifs/ubifs.h	/^#define MAX_INUM /;"	d
MAX_IPH_OFFSET_ENTRY	drivers/qe/uec.h	/^#define MAX_IPH_OFFSET_ENTRY	/;"	d
MAX_JOURNAL_ENTRIES	fs/ext4/ext4_journal.h	/^#define MAX_JOURNAL_ENTRIES /;"	d
MAX_JUMBO_FRAME_SIZE	drivers/net/e1000.h	/^#define MAX_JUMBO_FRAME_SIZE	/;"	d
MAX_JUMBO_LEN	drivers/net/ax88180.h	/^  #define MAX_JUMBO_LEN	/;"	d
MAX_JUMBO_MTU	drivers/net/ax88180.h	/^#define MAX_JUMBO_MTU	/;"	d
MAX_KEY_ENTRIES	include/fsl_validate.h	/^#define MAX_KEY_ENTRIES /;"	d
MAX_LANE_OPTIONS	drivers/phy/marvell/comphy.h	/^#define MAX_LANE_OPTIONS	/;"	d
MAX_LATENCY	include/radeon.h	/^#define MAX_LATENCY	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/is1/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/sr1500/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LATENCY_COUNT_WIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH /;"	d
MAX_LATENCY_COUNT_WIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define MAX_LATENCY_COUNT_WIDTH	/;"	d
MAX_LED_DEV	drivers/misc/status_led.c	/^#define MAX_LED_DEV	/;"	d	file:
MAX_LEN	board/esd/common/xilinx_jtag/lenval.h	/^#define MAX_LEN /;"	d
MAX_LEN	net/tftp.c	/^#define MAX_LEN /;"	d	file:
MAX_LEN	scripts/kconfig/lxdialog/dialog.h	/^#define MAX_LEN /;"	d
MAX_LEVEL	cmd/fdt.c	/^#define MAX_LEVEL	/;"	d	file:
MAX_LFS_FILESIZE	fs/ubifs/ubifs.h	/^#define MAX_LFS_FILESIZE	/;"	d
MAX_LFS_FILESIZE	fs/ubifs/ubifs.h	/^#define MAX_LFS_FILESIZE /;"	d
MAX_LINE	cmd/ini.c	/^#define MAX_LINE /;"	d	file:
MAX_LINE_LEN	tools/proftool.c	/^#define MAX_LINE_LEN /;"	d	file:
MAX_LINE_LENGTH_BYTES	lib/display_options.c	/^#define MAX_LINE_LENGTH_BYTES /;"	d	file:
MAX_LINK_COUNT	fs/reiserfs/reiserfs_private.h	/^#define MAX_LINK_COUNT	/;"	d
MAX_LIST_LENGTH_BITS	lib/list_sort.c	/^#define MAX_LIST_LENGTH_BITS /;"	d	file:
MAX_LMB_REGIONS	include/lmb.h	/^#define MAX_LMB_REGIONS /;"	d
MAX_LOAD_LIMIT	drivers/usb/host/isp116x.h	/^#define  MAX_LOAD_LIMIT	/;"	d
MAX_LOOP_WAIT_NEW_VOL	board/freescale/common/vid.c	/^#define MAX_LOOP_WAIT_NEW_VOL	/;"	d	file:
MAX_LOOP_WAIT_VOL_STABLE	board/freescale/common/vid.c	/^#define MAX_LOOP_WAIT_VOL_STABLE	/;"	d	file:
MAX_LPD	arch/m68k/cpu/mcf532x/speed.c	/^#define MAX_LPD	/;"	d	file:
MAX_LPDDR2_FREQ	arch/arm/include/asm/emif.h	/^#define MAX_LPDDR2_FREQ	/;"	d
MAX_MAPPED_VRAM	drivers/video/ati_radeon_fb.c	/^#define MAX_MAPPED_VRAM	/;"	d	file:
MAX_MATCH	lib/zlib/zutil.h	/^#define MAX_MATCH /;"	d
MAX_MATCHPOINTS	arch/openrisc/include/asm/spr-defs.h	/^#define MAX_MATCHPOINTS	/;"	d
MAX_MCAST_LST	drivers/net/ks8851_mll.h	/^#define MAX_MCAST_LST	/;"	d
MAX_MEM_LEVEL	include/u-boot/zlib.h	/^#    define MAX_MEM_LEVEL /;"	d
MAX_MENU_ITEMS	scripts/kconfig/nconf.c	/^#define MAX_MENU_ITEMS /;"	d	file:
MAX_MFD	arch/m68k/cpu/mcf532x/speed.c	/^#define MAX_MFD	/;"	d	file:
MAX_MGPCR_AULB	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MAX_MGPCR_AULB(/;"	d
MAX_MKSPC_RETRIES	fs/ubifs/budget.c	/^#define MAX_MKSPC_RETRIES /;"	d	file:
MAX_MTD_DEVICES	include/linux/mtd/mtd.h	/^#define MAX_MTD_DEVICES /;"	d
MAX_MTD_UBI_BEB_LIMIT	drivers/mtd/ubi/build.c	/^#define MAX_MTD_UBI_BEB_LIMIT /;"	d	file:
MAX_MTRR_REQUESTS	arch/x86/include/asm/global_data.h	/^#define MAX_MTRR_REQUESTS	/;"	d
MAX_MUX_CHANNELS	board/gdsys/405ep/iocon.c	/^#define MAX_MUX_CHANNELS /;"	d	file:
MAX_MUX_CHANNELS	board/gdsys/mpc8308/hrcon.c	/^#define MAX_MUX_CHANNELS /;"	d	file:
MAX_MUX_CHANNELS	board/gdsys/mpc8308/strider.c	/^#define MAX_MUX_CHANNELS /;"	d	file:
MAX_MVGBE_DEVS	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MAX_MVGBE_DEVS	/;"	d
MAX_MVGBE_DEVS	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MAX_MVGBE_DEVS	/;"	d
MAX_N	tools/omap/clocks_get_m_n.c	/^#define MAX_N	/;"	d	file:
MAX_NAME	cmd/ini.c	/^#define MAX_NAME /;"	d	file:
MAX_NEST_LEVEL	cmd/pxe.c	/^#define MAX_NEST_LEVEL /;"	d	file:
MAX_NODES	lib/fdtdec_test.c	/^#define MAX_NODES	/;"	d	file:
MAX_NR_LEDS	board/siemens/common/board.c	/^#define MAX_NR_LEDS	/;"	d	file:
MAX_NUMBER_OF_DESCRIPTORS	drivers/net/e1000.h	/^#define MAX_NUMBER_OF_DESCRIPTORS /;"	d
MAX_NUM_CPU	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define MAX_NUM_CPU /;"	d
MAX_NUM_CPU	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define MAX_NUM_CPU	/;"	d
MAX_NUM_CPU	arch/arm/include/asm/arch-tegra20/tegra.h	/^#define MAX_NUM_CPU	/;"	d
MAX_NUM_CPU	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define MAX_NUM_CPU	/;"	d
MAX_NUM_CPU	arch/arm/include/asm/arch-tegra30/tegra.h	/^#define MAX_NUM_CPU	/;"	d
MAX_NUM_FREQS	drivers/timer/tsc_timer.c	/^#define MAX_NUM_FREQS	/;"	d	file:
MAX_NUM_GPIOS	arch/arm/include/asm/arch-tegra/gpio.h	/^#define MAX_NUM_GPIOS /;"	d
MAX_NUM_GPIOS	arch/arm/mach-davinci/include/mach/gpio.h	/^#define MAX_NUM_GPIOS	/;"	d
MAX_NUM_GPIOS	arch/powerpc/include/asm/arch-mpc83xx/gpio.h	/^#define MAX_NUM_GPIOS /;"	d
MAX_NUM_OF_DUNITS	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define MAX_NUM_OF_DUNITS	/;"	d
MAX_NUM_OH_PORT	drivers/net/fm/fm.h	/^#define MAX_NUM_OH_PORT	/;"	d
MAX_NUM_PORTS	board/freescale/common/sys_eeprom.c	/^#define MAX_NUM_PORTS	/;"	d	file:
MAX_NUM_PORTS	board/varisys/common/sys_eeprom.c	/^#define MAX_NUM_PORTS	/;"	d	file:
MAX_NUM_PORTS	include/configs/P1010RDB.h	/^#define MAX_NUM_PORTS	/;"	d
MAX_NUM_RX_PORT_1G	drivers/net/fm/fm.h	/^#define MAX_NUM_RX_PORT_1G	/;"	d
MAX_NUM_SPEEDBINS	arch/arm/include/asm/emif.h	/^#define MAX_NUM_SPEEDBINS	/;"	d
MAX_NUM_TX_PORT_1G	drivers/net/fm/fm.h	/^#define MAX_NUM_TX_PORT_1G	/;"	d
MAX_ONENAND_PAGESIZE	include/linux/mtd/onenand.h	/^#define MAX_ONENAND_PAGESIZE	/;"	d
MAX_ONES	board/esd/common/fpga.c	/^#define MAX_ONES /;"	d	file:
MAX_OPERANDS	include/bedbug/ppc.h	/^#define MAX_OPERANDS /;"	d
MAX_OSD_SCREEN	board/gdsys/common/osd.c	/^#define MAX_OSD_SCREEN /;"	d	file:
MAX_PACKET	drivers/usb/host/xhci.h	/^#define MAX_PACKET(/;"	d
MAX_PACKET_DECODED	drivers/usb/host/xhci.h	/^#define MAX_PACKET_DECODED(/;"	d
MAX_PACKET_LENGTH	post/cpu/mpc8xx/ether.c	/^#define MAX_PACKET_LENGTH	/;"	d	file:
MAX_PACKET_LENGTH	post/cpu/ppc4xx/ether.c	/^#define MAX_PACKET_LENGTH	/;"	d	file:
MAX_PACKET_MASK	drivers/usb/host/xhci.h	/^#define MAX_PACKET_MASK	/;"	d
MAX_PACKET_SHIFT	drivers/usb/host/xhci.h	/^#define MAX_PACKET_SHIFT	/;"	d
MAX_PACKET_SIZE	drivers/net/uli526x.c	/^#define MAX_PACKET_SIZE	/;"	d	file:
MAX_PACKET_SIZE_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define MAX_PACKET_SIZE_R	/;"	d
MAX_PACKET_SIZE_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define MAX_PACKET_SIZE_T	/;"	d
MAX_PBS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PBS /;"	d
MAX_PCI_DEVICES	arch/powerpc/include/asm/4xx_pci.h	/^#define MAX_PCI_DEVICES /;"	d
MAX_PCI_DEVS	board/gateworks/gw_ventana/gw_ventana.c	/^#define MAX_PCI_DEVS	/;"	d	file:
MAX_PCI_PORTS	arch/arm/mach-keystone/init.c	/^#define MAX_PCI_PORTS	/;"	d	file:
MAX_PCI_REGIONS	include/pci.h	/^#define MAX_PCI_REGIONS	/;"	d
MAX_PEND_REF	drivers/ddr/microchip/ddr2_regs.h	/^#define MAX_PEND_REF(/;"	d
MAX_PEX	drivers/pci/pci_mvebu.c	/^#define MAX_PEX /;"	d	file:
MAX_PEX_BUSSES	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define MAX_PEX_BUSSES	/;"	d
MAX_PEX_BUSSES	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MAX_PEX_BUSSES	/;"	d
MAX_PEX_DEVICES	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MAX_PEX_DEVICES	/;"	d
MAX_PEX_FUNCS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MAX_PEX_FUNCS	/;"	d
MAX_PHANDLE_ARGS	include/fdtdec.h	/^#define MAX_PHANDLE_ARGS /;"	d
MAX_PHASE_1TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PHASE_1TO1 /;"	d
MAX_PHASE_2TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PHASE_2TO1 /;"	d
MAX_PHASE_RL_L_1TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PHASE_RL_L_1TO1 /;"	d
MAX_PHASE_RL_L_2TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PHASE_RL_L_2TO1 /;"	d
MAX_PHASE_RL_UL_1TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PHASE_RL_UL_1TO1 /;"	d
MAX_PHASE_RL_UL_2TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PHASE_RL_UL_2TO1 /;"	d
MAX_PHY_PASSES	arch/powerpc/cpu/mpc8xx/fec.c	/^#define MAX_PHY_PASSES /;"	d	file:
MAX_PHY_PASSES	drivers/net/mcfmii.c	/^#define MAX_PHY_PASSES /;"	d	file:
MAX_PHY_REG_ADDRESS	drivers/net/e1000.h	/^#define MAX_PHY_REG_ADDRESS	/;"	d
MAX_PINMUX_ENTRIES	drivers/pinctrl/pinctrl-at91-pio4.c	/^#define MAX_PINMUX_ENTRIES	/;"	d	file:
MAX_PINS	arch/arm/mach-tegra/xusb-padctl-common.h	/^#define MAX_PINS /;"	d
MAX_PIN_N	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define MAX_PIN_N	/;"	d
MAX_PIN_NUMBER	board/siemens/common/board.c	/^#define MAX_PIN_NUMBER	/;"	d	file:
MAX_PIRQ_LINKS	arch/x86/Kconfig	/^config MAX_PIRQ_LINKS$/;"	c	menu:x86 architecture
MAX_PKT_SIZE	drivers/net/armada100_fec.h	/^#define MAX_PKT_SIZE /;"	d
MAX_PLL_COUNT	arch/arm/mach-keystone/include/mach/clock.h	/^	MAX_PLL_COUNT,$/;"	e	enum:__anonc27926650203
MAX_PLUGIN_CODE_SIZE	tools/imximage.h	/^#define MAX_PLUGIN_CODE_SIZE /;"	d
MAX_POLLING_ITERATIONS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MAX_POLLING_ITERATIONS	/;"	d
MAX_PORT_NUM	drivers/net/sh_eth.h	/^#define MAX_PORT_NUM	/;"	d
MAX_PREFETCHED_BDS	drivers/qe/uec.h	/^#define MAX_PREFETCHED_BDS	/;"	d
MAX_PRE_EMPHASIS_REACH_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_PRE_EMPHASIS_REACH_0	/;"	d
MAX_PRE_EMPHASIS_REACH_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_PRE_EMPHASIS_REACH_1	/;"	d
MAX_PRE_EMPHASIS_REACH_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_PRE_EMPHASIS_REACH_2	/;"	d
MAX_PRE_EMPHASIS_REACH_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define MAX_PRE_EMPHASIS_REACH_3	/;"	d
MAX_PTE_ENTRIES	arch/arm/cpu/armv8/cache_v8.c	/^#define MAX_PTE_ENTRIES /;"	d	file:
MAX_PUP_NUM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_PUP_NUM /;"	d
MAX_QE_RISC	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define MAX_QE_RISC	/;"	d
MAX_QE_RISC	arch/powerpc/include/asm/config_mpc85xx.h	/^#define MAX_QE_RISC	/;"	d
MAX_QE_RISC	include/linux/immap_qe.h	/^#define MAX_QE_RISC	/;"	d
MAX_QE_RISC	include/linux/immap_qe.h	/^#define MAX_QE_RISC /;"	d
MAX_QPORTALS	arch/powerpc/cpu/mpc85xx/portals.c	/^#define MAX_QPORTALS /;"	d	file:
MAX_QUICK_PIT_ITERATIONS	drivers/timer/tsc_timer.c	/^#define MAX_QUICK_PIT_ITERATIONS /;"	d	file:
MAX_QUICK_PIT_MS	drivers/timer/tsc_timer.c	/^#define MAX_QUICK_PIT_MS /;"	d	file:
MAX_RANKS	arch/x86/include/asm/arch-quark/mrc.h	/^#define MAX_RANKS	/;"	d
MAX_RDW	board/freescale/common/ics307_clk.c	/^#define MAX_RDW	/;"	d	file:
MAX_RD_DELAY	drivers/mtd/nand/denali.h	/^#define MAX_RD_DELAY	/;"	d
MAX_RD_DELAY__VALUE	drivers/mtd/nand/denali.h	/^#define     MAX_RD_DELAY__VALUE	/;"	d
MAX_RECORD_BYTES	arch/arm/imx-common/hab.c	/^#define MAX_RECORD_BYTES /;"	d	file:
MAX_RECV_FRAMES	drivers/net/ks8851_mll.c	/^#define MAX_RECV_FRAMES	/;"	d	file:
MAX_REGIONS	cmd/armflash.c	/^#define MAX_REGIONS /;"	d	file:
MAX_REGIONS	tools/ifdtool.h	/^#define MAX_REGIONS	/;"	d
MAX_REG_OFFSET	arch/mips/include/asm/ptrace.h	/^#define MAX_REG_OFFSET /;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RESOURCES	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define MAX_RESOURCES	/;"	d
MAX_RETRY_MS	drivers/mmc/omap_hsmmc.c	/^#define MAX_RETRY_MS	/;"	d	file:
MAX_ROOT_PORTS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define MAX_ROOT_PORTS	/;"	d
MAX_ROOT_PORTS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define MAX_ROOT_PORTS	/;"	d
MAX_ROOT_PORTS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define MAX_ROOT_PORTS	/;"	d
MAX_ROOT_PORTS	drivers/usb/host/ohci-s3c24xx.h	/^#define MAX_ROOT_PORTS	/;"	d
MAX_ROWS	arch/x86/include/asm/arch-quark/mrc.h	/^#define MAX_ROWS	/;"	d
MAX_RSVD_CMD_TRBS	drivers/usb/host/xhci.h	/^#define MAX_RSVD_CMD_TRBS	/;"	d
MAX_RXBUF_LEN	drivers/net/fm/fm.h	/^#define MAX_RXBUF_LEN	/;"	d
MAX_RXBUF_LEN	drivers/qe/uec.h	/^#define MAX_RXBUF_LEN	/;"	d
MAX_RXBUF_LOG2	drivers/net/fm/fm.h	/^#define MAX_RXBUF_LOG2	/;"	d
MAX_RX_BUF_SIZE	drivers/net/pic32_eth.c	/^#define MAX_RX_BUF_SIZE	/;"	d	file:
MAX_RX_DESCR	drivers/net/pic32_eth.c	/^#define MAX_RX_DESCR	/;"	d	file:
MAX_RX_FIFO_SIZE	drivers/i2c/kona_i2c.c	/^#define MAX_RX_FIFO_SIZE	/;"	d	file:
MAX_RX_QUEUES	drivers/qe/uec.h	/^#define MAX_RX_QUEUES	/;"	d
MAX_RX_SIZE	drivers/net/ax88180.h	/^#define MAX_RX_SIZE	/;"	d
MAX_RX_THREADS	drivers/qe/uec.h	/^#define MAX_RX_THREADS	/;"	d
MAX_SATA_BLOCKS_READ_WRITE	drivers/block/ahci.c	/^#define MAX_SATA_BLOCKS_READ_WRITE	/;"	d	file:
MAX_SEARCH_PARTITIONS	disk/part.c	/^#define MAX_SEARCH_PARTITIONS /;"	d	file:
MAX_SECTION	cmd/ini.c	/^#define MAX_SECTION /;"	d	file:
MAX_SELECTOR_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MAX_SELECTOR_VAL	/;"	d
MAX_SERDES	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define MAX_SERDES	/;"	d
MAX_SERDES	arch/powerpc/include/asm/immap_85xx.h	/^#define MAX_SERDES /;"	d
MAX_SERDES_LANES	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define MAX_SERDES_LANES	/;"	d
MAX_SERIAL_SIZE	board/Arcturus/ucp1020/cmd_arc.c	/^#define MAX_SERIAL_SIZE /;"	d	file:
MAX_SG_32	drivers/crypto/fsl/fsl_hash.h	/^#define MAX_SG_32	/;"	d
MAX_SG_ENTRIES	include/fsl_validate.h	/^#define MAX_SG_ENTRIES	/;"	d
MAX_SIDES	arch/x86/include/asm/arch-quark/mrc.h	/^#define MAX_SIDES	/;"	d
MAX_SINGLE_PACKET_SIZE	drivers/usb/eth/smsc95xx.c	/^#define MAX_SINGLE_PACKET_SIZE	/;"	d	file:
MAX_SIZE_STREAM_BUFFER	drivers/net/keystone_net.c	/^#define MAX_SIZE_STREAM_BUFFER /;"	d	file:
MAX_SMALLBIN	common/dlmalloc.c	/^#define MAX_SMALLBIN /;"	d	file:
MAX_SMALLBIN_SIZE	common/dlmalloc.c	/^#define MAX_SMALLBIN_SIZE /;"	d	file:
MAX_SOCKETS	arch/x86/include/asm/arch-quark/mrc.h	/^#define MAX_SOCKETS	/;"	d
MAX_SOURCES	arch/arm/dts/dra7.dtsi	/^#define MAX_SOURCES /;"	d	file:
MAX_SPD_BYTES	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define MAX_SPD_BYTES	/;"	d	file:
MAX_SPD_BYTES	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define MAX_SPD_BYTES	/;"	d	file:
MAX_SPD_BYTES	board/amcc/yucca/yucca.h	/^#define MAX_SPD_BYTES	/;"	d
MAX_SPI_BYTES	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MAX_SPI_BYTES	/;"	d
MAX_SPI_BYTES	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MAX_SPI_BYTES	/;"	d
MAX_SPI_BYTES	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MAX_SPI_BYTES	/;"	d
MAX_SPI_BYTES	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MAX_SPI_BYTES	/;"	d
MAX_SPI_BYTES	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MAX_SPI_BYTES	/;"	d
MAX_SPI_BYTES	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MAX_SPI_BYTES	/;"	d
MAX_SPI_BYTES	cmd/spi.c	/^#   define MAX_SPI_BYTES /;"	d	file:
MAX_SPI_LATENCY	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define MAX_SPI_LATENCY	/;"	d	file:
MAX_SPRS	arch/openrisc/include/asm/spr-defs.h	/^#define MAX_SPRS /;"	d
MAX_SPRS_PER_GRP	arch/openrisc/include/asm/spr-defs.h	/^#define MAX_SPRS_PER_GRP /;"	d
MAX_SPRS_PER_GRP_BITS	arch/openrisc/include/asm/spr-defs.h	/^#define MAX_SPRS_PER_GRP_BITS /;"	d
MAX_STAGE_LIMIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	MAX_STAGE_LIMIT$/;"	e	enum:auto_tune_stage
MAX_STATIC_SEQ	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^#define MAX_STATIC_SEQ	/;"	d	file:
MAX_STRAPS	tools/ifdtool.h	/^#define MAX_STRAPS	/;"	d
MAX_STRING_LENGTH	board/siemens/common/factoryset.h	/^#define MAX_STRING_LENGTH	/;"	d
MAX_STRING_SERIAL	drivers/usb/gadget/g_dnl.c	/^#define MAX_STRING_SERIAL	/;"	d	file:
MAX_STR_LEN	lib/fdtdec.c	/^#define MAX_STR_LEN /;"	d	file:
MAX_TEMPBUF_LEN	tools/kwbimage.h	/^#define MAX_TEMPBUF_LEN	/;"	d
MAX_TFTP_PATH_LEN	cmd/pxe.c	/^#define MAX_TFTP_PATH_LEN /;"	d	file:
MAX_THREADS	examples/standalone/sched.c	/^#define MAX_THREADS /;"	d	file:
MAX_TIM_LOAD	arch/blackfin/cpu/interrupts.c	/^#define MAX_TIM_LOAD	/;"	d	file:
MAX_TOTAL_BUS_NUM	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define MAX_TOTAL_BUS_NUM	/;"	d
MAX_TRAINING_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	MAX_TRAINING_MODE,$/;"	e	enum:training_modes
MAX_TRAINING_RETRY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MAX_TRAINING_RETRY /;"	d
MAX_TRANSFER_SIZE_FULLSPEED	drivers/usb/host/isp116x.h	/^#define MAX_TRANSFER_SIZE_FULLSPEED	/;"	d
MAX_TRANSFER_SIZE_LOWSPEED	drivers/usb/host/isp116x.h	/^#define MAX_TRANSFER_SIZE_LOWSPEED	/;"	d
MAX_TRIES	common/usb_hub.c	/^#define MAX_TRIES /;"	d	file:
MAX_TRIES	tools/gdb/remote.c	/^#define MAX_TRIES /;"	d	file:
MAX_TUPEL_SZ	cmd/pcmcia.c	/^#define	MAX_TUPEL_SZ	/;"	d	file:
MAX_TUPEL_SZ	drivers/pcmcia/ti_pci1410a.c	/^#define	MAX_TUPEL_SZ	/;"	d	file:
MAX_TX_DESCR	drivers/net/pic32_eth.c	/^#define MAX_TX_DESCR	/;"	d	file:
MAX_TX_FIFO_SIZE	drivers/i2c/kona_i2c.c	/^#define MAX_TX_FIFO_SIZE	/;"	d	file:
MAX_TX_JUMBO_SIZE	drivers/net/ax88180.h	/^#define MAX_TX_JUMBO_SIZE	/;"	d
MAX_TX_QUEUES	drivers/qe/uec.h	/^#define MAX_TX_QUEUES	/;"	d
MAX_TX_SPACE	arch/powerpc/cpu/mpc8260/i2c.c	/^#define MAX_TX_SPACE /;"	d	file:
MAX_TX_SPACE	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define MAX_TX_SPACE /;"	d	file:
MAX_TX_THREADS	drivers/qe/uec.h	/^#define MAX_TX_THREADS	/;"	d
MAX_UBI_MTD_NAME_LEN	include/mtd/ubi-user.h	/^#define MAX_UBI_MTD_NAME_LEN /;"	d
MAX_UNITS	drivers/net/rtl8169.c	/^#define MAX_UNITS /;"	d	file:
MAX_UNITS_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MAX_UNITS_ID$/;"	e	enum:unit_id
MAX_UNIT_NUMB	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define MAX_UNIT_NUMB	/;"	d	file:
MAX_URBS_QUEUED	include/usbdevice.h	/^#define MAX_URBS_QUEUED /;"	d
MAX_USB2_PORTS	arch/x86/include/asm/arch-broadwell/pei_data.h	/^#define MAX_USB2_PORTS /;"	d
MAX_USB3_PORTS	arch/x86/include/asm/arch-broadwell/pei_data.h	/^#define MAX_USB3_PORTS /;"	d
MAX_UTMI_PHY_COUNT	drivers/phy/marvell/comphy.h	/^#define MAX_UTMI_PHY_COUNT	/;"	d
MAX_VALUE	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define MAX_VALUE	/;"	d	file:
MAX_VCO	board/freescale/common/ics307_clk.c	/^#define MAX_VCO	/;"	d	file:
MAX_VDW	board/freescale/common/ics307_clk.c	/^#define MAX_VDW	/;"	d	file:
MAX_WAIT	arch/mips/mach-au1x00/au1x00_eth.c	/^#define MAX_WAIT /;"	d	file:
MAX_WAIT	include/lattice.h	/^#define MAX_WAIT	/;"	d
MAX_WATCHPOINTS	arch/openrisc/include/asm/spr-defs.h	/^#define MAX_WATCHPOINTS	/;"	d
MAX_WBITS	include/u-boot/zlib.h	/^#  define MAX_WBITS /;"	d
MAX_WINDOW_SIZE_RX	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define MAX_WINDOW_SIZE_RX	/;"	d
MAX_WINDOW_SIZE_TX	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define MAX_WINDOW_SIZE_TX	/;"	d
MAX_WORD_LENGTH	scripts/kconfig/zconf.hash.c	/^      MAX_WORD_LENGTH = 14,$/;"	e	enum:kconf_id_lookup::__anond60376ef0103	file:
MAX_X_CHARS	board/gdsys/common/osd.c	/^#define MAX_X_CHARS /;"	d	file:
MAX_Y_CHARS	board/gdsys/common/osd.c	/^#define MAX_Y_CHARS /;"	d	file:
MA_BASE	arch/arm/include/asm/emif.h	/^#define MA_BASE	/;"	d
MA_HIMEM_INTERLEAVE_UN_MASK	arch/arm/include/asm/emif.h	/^#define MA_HIMEM_INTERLEAVE_UN_MASK	/;"	d
MA_HIMEM_INTERLEAVE_UN_SHIFT	arch/arm/include/asm/emif.h	/^#define MA_HIMEM_INTERLEAVE_UN_SHIFT	/;"	d
MA_PRIORITY	arch/arm/include/asm/emif.h	/^#define MA_PRIORITY	/;"	d
MB	lib/lz4.c	/^#define MB /;"	d	file:
MB862XX_TYPE_LIME	include/mb862xx.h	/^#define MB862XX_TYPE_LIME	/;"	d
MBA6	board/tqc/tqma6/Kconfig	/^config MBA6$/;"	c	choice:choice3e84a7cc0304
MBA6X_KSZ9031_CLK_SKEW	board/tqc/tqma6/tqma6_mba6.c	/^#define MBA6X_KSZ9031_CLK_SKEW	/;"	d	file:
MBA6X_KSZ9031_CTRL_SKEW	board/tqc/tqma6/tqma6_mba6.c	/^#define MBA6X_KSZ9031_CTRL_SKEW	/;"	d	file:
MBA6X_KSZ9031_RX_SKEW	board/tqc/tqma6/tqma6_mba6.c	/^#define MBA6X_KSZ9031_RX_SKEW	/;"	d	file:
MBA6X_KSZ9031_TX_SKEW	board/tqc/tqma6/tqma6_mba6.c	/^#define MBA6X_KSZ9031_TX_SKEW	/;"	d	file:
MBAR	arch/powerpc/include/asm/processor.h	/^#define MBAR	/;"	d
MBAR_INST	arch/powerpc/include/asm/mmu.h	/^#define MBAR_INST	/;"	d
MBAT_REMOVED	include/twl6030.h	/^#define MBAT_REMOVED	/;"	d
MBAT_TEMP	include/twl6030.h	/^#define MBAT_TEMP	/;"	d
MBCHOSTEN	include/power/max8997_pmic.h	/^#define MBCHOSTEN /;"	d
MBCICHFCSET	include/power/max8997_pmic.h	/^#define MBCICHFCSET /;"	d
MBC_SBIC	arch/x86/include/asm/arch-quark/quark.h	/^#define MBC_SBIC	/;"	d
MBER_BANK0	include/mpc106.h	/^#define MBER_BANK0	/;"	d
MBER_BANK1	include/mpc106.h	/^#define MBER_BANK1	/;"	d
MBER_BANK2	include/mpc106.h	/^#define MBER_BANK2	/;"	d
MBER_BANK3	include/mpc106.h	/^#define MBER_BANK3	/;"	d
MBIR_RXMBF	drivers/net/ks8851_mll.h	/^#define MBIR_RXMBF	/;"	d
MBIR_RXMBFA	drivers/net/ks8851_mll.h	/^#define MBIR_RXMBFA	/;"	d
MBIR_TXMBF	drivers/net/ks8851_mll.h	/^#define MBIR_TXMBF	/;"	d
MBIR_TXMBFA	drivers/net/ks8851_mll.h	/^#define MBIR_TXMBFA	/;"	d
MBIST_CONTROLLER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MBIST_CONTROLLER_BASE_ADDR	/;"	d
MBMR_AMB_MSK	include/mpc8xx.h	/^#define MBMR_AMB_MSK	/;"	d
MBMR_AMB_TYPE_0	include/mpc8xx.h	/^#define MBMR_AMB_TYPE_0 /;"	d
MBMR_AMB_TYPE_1	include/mpc8xx.h	/^#define MBMR_AMB_TYPE_1 /;"	d
MBMR_AMB_TYPE_2	include/mpc8xx.h	/^#define MBMR_AMB_TYPE_2 /;"	d
MBMR_AMB_TYPE_3	include/mpc8xx.h	/^#define MBMR_AMB_TYPE_3 /;"	d
MBMR_AMB_TYPE_4	include/mpc8xx.h	/^#define MBMR_AMB_TYPE_4 /;"	d
MBMR_AMB_TYPE_5	include/mpc8xx.h	/^#define MBMR_AMB_TYPE_5 /;"	d
MBMR_DSB_1_CYCL	include/mpc8xx.h	/^#define MBMR_DSB_1_CYCL /;"	d
MBMR_DSB_2_CYCL	include/mpc8xx.h	/^#define MBMR_DSB_2_CYCL /;"	d
MBMR_DSB_3_CYCL	include/mpc8xx.h	/^#define MBMR_DSB_3_CYCL /;"	d
MBMR_DSB_4_CYCL	include/mpc8xx.h	/^#define MBMR_DSB_4_CYCL /;"	d
MBMR_DSB_MSK	include/mpc8xx.h	/^#define MBMR_DSB_MSK	/;"	d
MBMR_G0CLB_A10	include/mpc8xx.h	/^#define MBMR_G0CLB_A10	/;"	d
MBMR_G0CLB_A11	include/mpc8xx.h	/^#define MBMR_G0CLB_A11	/;"	d
MBMR_G0CLB_A12	include/mpc8xx.h	/^#define MBMR_G0CLB_A12	/;"	d
MBMR_G0CLB_A5	include/mpc8xx.h	/^#define MBMR_G0CLB_A5	/;"	d
MBMR_G0CLB_A6	include/mpc8xx.h	/^#define MBMR_G0CLB_A6	/;"	d
MBMR_G0CLB_A7	include/mpc8xx.h	/^#define MBMR_G0CLB_A7	/;"	d
MBMR_G0CLB_A8	include/mpc8xx.h	/^#define MBMR_G0CLB_A8	/;"	d
MBMR_G0CLB_A9	include/mpc8xx.h	/^#define MBMR_G0CLB_A9	/;"	d
MBMR_G0CLB_MSK	include/mpc8xx.h	/^#define MBMR_G0CLB_MSK	/;"	d
MBMR_GPL_B4DIS	include/mpc8xx.h	/^#define MBMR_GPL_B4DIS	/;"	d
MBMR_PTBE	include/mpc8xx.h	/^#define MBMR_PTBE	/;"	d
MBMR_PTB_MSK	include/mpc8xx.h	/^#define MBMR_PTB_MSK	/;"	d
MBMR_PTB_SHIFT	include/mpc8xx.h	/^#define MBMR_PTB_SHIFT	/;"	d
MBMR_RLFB_10X	include/mpc8xx.h	/^#define MBMR_RLFB_10X	/;"	d
MBMR_RLFB_11X	include/mpc8xx.h	/^#define MBMR_RLFB_11X	/;"	d
MBMR_RLFB_12X	include/mpc8xx.h	/^#define MBMR_RLFB_12X	/;"	d
MBMR_RLFB_13X	include/mpc8xx.h	/^#define MBMR_RLFB_13X	/;"	d
MBMR_RLFB_14X	include/mpc8xx.h	/^#define MBMR_RLFB_14X	/;"	d
MBMR_RLFB_15X	include/mpc8xx.h	/^#define MBMR_RLFB_15X	/;"	d
MBMR_RLFB_16X	include/mpc8xx.h	/^#define MBMR_RLFB_16X	/;"	d
MBMR_RLFB_1X	include/mpc8xx.h	/^#define MBMR_RLFB_1X	/;"	d
MBMR_RLFB_2X	include/mpc8xx.h	/^#define MBMR_RLFB_2X	/;"	d
MBMR_RLFB_3X	include/mpc8xx.h	/^#define MBMR_RLFB_3X	/;"	d
MBMR_RLFB_4X	include/mpc8xx.h	/^#define MBMR_RLFB_4X	/;"	d
MBMR_RLFB_5X	include/mpc8xx.h	/^#define MBMR_RLFB_5X	/;"	d
MBMR_RLFB_6X	include/mpc8xx.h	/^#define MBMR_RLFB_6X	/;"	d
MBMR_RLFB_7X	include/mpc8xx.h	/^#define MBMR_RLFB_7X	/;"	d
MBMR_RLFB_8X	include/mpc8xx.h	/^#define MBMR_RLFB_8X	/;"	d
MBMR_RLFB_9X	include/mpc8xx.h	/^#define MBMR_RLFB_9X	/;"	d
MBMR_RLFB_MSK	include/mpc8xx.h	/^#define MBMR_RLFB_MSK	/;"	d
MBMR_TLFB_10X	include/mpc8xx.h	/^#define MBMR_TLFB_10X	/;"	d
MBMR_TLFB_11X	include/mpc8xx.h	/^#define MBMR_TLFB_11X	/;"	d
MBMR_TLFB_12X	include/mpc8xx.h	/^#define MBMR_TLFB_12X	/;"	d
MBMR_TLFB_13X	include/mpc8xx.h	/^#define MBMR_TLFB_13X	/;"	d
MBMR_TLFB_14X	include/mpc8xx.h	/^#define MBMR_TLFB_14X	/;"	d
MBMR_TLFB_15X	include/mpc8xx.h	/^#define MBMR_TLFB_15X	/;"	d
MBMR_TLFB_16X	include/mpc8xx.h	/^#define MBMR_TLFB_16X	/;"	d
MBMR_TLFB_1X	include/mpc8xx.h	/^#define MBMR_TLFB_1X	/;"	d
MBMR_TLFB_2X	include/mpc8xx.h	/^#define MBMR_TLFB_2X	/;"	d
MBMR_TLFB_3X	include/mpc8xx.h	/^#define MBMR_TLFB_3X	/;"	d
MBMR_TLFB_4X	include/mpc8xx.h	/^#define MBMR_TLFB_4X	/;"	d
MBMR_TLFB_5X	include/mpc8xx.h	/^#define MBMR_TLFB_5X	/;"	d
MBMR_TLFB_6X	include/mpc8xx.h	/^#define MBMR_TLFB_6X	/;"	d
MBMR_TLFB_7X	include/mpc8xx.h	/^#define MBMR_TLFB_7X	/;"	d
MBMR_TLFB_8X	include/mpc8xx.h	/^#define MBMR_TLFB_8X	/;"	d
MBMR_TLFB_9X	include/mpc8xx.h	/^#define MBMR_TLFB_9X	/;"	d
MBMR_TLFB_MSK	include/mpc8xx.h	/^#define MBMR_TLFB_MSK	/;"	d
MBMR_WLFB_10X	include/mpc8xx.h	/^#define MBMR_WLFB_10X	/;"	d
MBMR_WLFB_11X	include/mpc8xx.h	/^#define MBMR_WLFB_11X	/;"	d
MBMR_WLFB_12X	include/mpc8xx.h	/^#define MBMR_WLFB_12X	/;"	d
MBMR_WLFB_13X	include/mpc8xx.h	/^#define MBMR_WLFB_13X	/;"	d
MBMR_WLFB_14X	include/mpc8xx.h	/^#define MBMR_WLFB_14X	/;"	d
MBMR_WLFB_15X	include/mpc8xx.h	/^#define MBMR_WLFB_15X	/;"	d
MBMR_WLFB_16X	include/mpc8xx.h	/^#define MBMR_WLFB_16X	/;"	d
MBMR_WLFB_1X	include/mpc8xx.h	/^#define MBMR_WLFB_1X	/;"	d
MBMR_WLFB_2X	include/mpc8xx.h	/^#define MBMR_WLFB_2X	/;"	d
MBMR_WLFB_3X	include/mpc8xx.h	/^#define MBMR_WLFB_3X	/;"	d
MBMR_WLFB_4X	include/mpc8xx.h	/^#define MBMR_WLFB_4X	/;"	d
MBMR_WLFB_5X	include/mpc8xx.h	/^#define MBMR_WLFB_5X	/;"	d
MBMR_WLFB_6X	include/mpc8xx.h	/^#define MBMR_WLFB_6X	/;"	d
MBMR_WLFB_7X	include/mpc8xx.h	/^#define MBMR_WLFB_7X	/;"	d
MBMR_WLFB_8X	include/mpc8xx.h	/^#define MBMR_WLFB_8X	/;"	d
MBMR_WLFB_9X	include/mpc8xx.h	/^#define MBMR_WLFB_9X	/;"	d
MBMR_WLFB_MSK	include/mpc8xx.h	/^#define MBMR_WLFB_MSK	/;"	d
MBP_APPID_HWA	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_APPID_HWA /;"	d
MBP_APPID_ICC	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_APPID_ICC /;"	d
MBP_APPID_INTEL_AT	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_APPID_INTEL_AT /;"	d
MBP_APPID_KERNEL	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_APPID_KERNEL /;"	d
MBP_APPID_NFC	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_APPID_NFC /;"	d
MBP_HWA_REQUEST_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_HWA_REQUEST_ITEM /;"	d
MBP_ICC_PROFILE_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_ICC_PROFILE_ITEM /;"	d
MBP_IDENT	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_IDENT(/;"	d
MBP_INTEL_AT_STATE_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_INTEL_AT_STATE_ITEM /;"	d
MBP_KERNEL_FW_CAP_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_FW_CAP_ITEM /;"	d
MBP_KERNEL_FW_TYPE_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_FW_TYPE_ITEM /;"	d
MBP_KERNEL_FW_VER_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_FW_VER_ITEM /;"	d
MBP_KERNEL_MFS_FAILURE_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_MFS_FAILURE_ITEM /;"	d
MBP_KERNEL_PLAT_KEY_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_PLAT_KEY_ITEM /;"	d
MBP_KERNEL_PLAT_TIME_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_PLAT_TIME_ITEM /;"	d
MBP_KERNEL_ROM_BIST_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_KERNEL_ROM_BIST_ITEM /;"	d
MBP_MAKE_IDENT	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_MAKE_IDENT(/;"	d
MBP_NFC_SUPPORT_DATA_ITEM	arch/x86/include/asm/arch-broadwell/me.h	/^#define MBP_NFC_SUPPORT_DATA_ITEM /;"	d
MBRDBR_BOOT_SIG_55	drivers/mmc/fsl_esdhc_spl.c	/^#define MBRDBR_BOOT_SIG_55	/;"	d	file:
MBRDBR_BOOT_SIG_AA	drivers/mmc/fsl_esdhc_spl.c	/^#define MBRDBR_BOOT_SIG_AA	/;"	d	file:
MBRPARTS_DEFAULT	include/configs/s5pc210_universal.h	/^#define MBRPARTS_DEFAULT	/;"	d
MBUS_BOOTROM_BASE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_BOOTROM_BASE	/;"	d
MBUS_BOOTROM_SIZE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_BOOTROM_SIZE	/;"	d
MBUS_BRIDGE_WIN_BASE_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MBUS_BRIDGE_WIN_BASE_REG /;"	d
MBUS_BRIDGE_WIN_CTRL_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MBUS_BRIDGE_WIN_CTRL_REG /;"	d
MBUS_CLK_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define MBUS_CLK_DEFAULT	/;"	d
MBUS_CLK_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define MBUS_CLK_DEFAULT	/;"	d
MBUS_CLK_DEFAULT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define MBUS_CLK_DEFAULT	/;"	d
MBUS_CLK_DEFAULT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define MBUS_CLK_DEFAULT	/;"	d
MBUS_CLK_GATE	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define MBUS_CLK_GATE	/;"	d
MBUS_CLK_GATE	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define MBUS_CLK_GATE	/;"	d
MBUS_CLK_GATE	arch/arm/include/asm/arch/clock_sun6i.h	/^#define MBUS_CLK_GATE	/;"	d
MBUS_CLK_GATE	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define MBUS_CLK_GATE	/;"	d
MBUS_ERR_PROP_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MBUS_ERR_PROP_EN	/;"	d
MBUS_ID	arch/arm/dts/armada-370-xp.dtsi	/^#define MBUS_ID(/;"	d	file:
MBUS_ID	arch/arm/dts/armada-375.dtsi	/^#define MBUS_ID(/;"	d	file:
MBUS_ID	arch/arm/dts/armada-38x.dtsi	/^#define MBUS_ID(/;"	d	file:
MBUS_PCI_IO_BASE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_PCI_IO_BASE	/;"	d
MBUS_PCI_IO_SIZE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_PCI_IO_SIZE	/;"	d
MBUS_PCI_MEM_BASE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_PCI_MEM_BASE	/;"	d
MBUS_PCI_MEM_SIZE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_PCI_MEM_SIZE	/;"	d
MBUS_SPI_BASE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_SPI_BASE	/;"	d
MBUS_SPI_SIZE	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MBUS_SPI_SIZE	/;"	d
MBUS_UNITS_PREFETCH_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MBUS_UNITS_PREFETCH_CONTROL_REG	/;"	d
MBUS_UNITS_PREFETCH_CONTROL_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MBUS_UNITS_PREFETCH_CONTROL_REG	/;"	d
MBUS_UNITS_PRIORITY_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MBUS_UNITS_PRIORITY_CONTROL_REG	/;"	d
MBUS_UNITS_PRIORITY_CONTROL_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MBUS_UNITS_PRIORITY_CONTROL_REG	/;"	d
MBW	drivers/usb/host/r8a66597.h	/^#define	MBW	/;"	d
MBW_16	drivers/usb/host/r8a66597.h	/^#define	  MBW_16	/;"	d
MBW_8	drivers/usb/host/r8a66597.h	/^#define	  MBW_8	/;"	d
MB_PART_STRING	arch/x86/include/asm/coreboot_tables.h	/^#define MB_PART_STRING(/;"	d
MB_VENDOR_STRING	arch/x86/include/asm/coreboot_tables.h	/^#define MB_VENDOR_STRING(/;"	d
MC1_DAT_SE0	drivers/usb/host/ohci-lpc32xx.c	/^#define MC1_DAT_SE0	/;"	d	file:
MC1_SPEED_REG	drivers/usb/host/ohci-lpc32xx.c	/^#define MC1_SPEED_REG	/;"	d	file:
MC1_UART_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define MC1_UART_EN	/;"	d	file:
MC2_BI_DI	drivers/usb/host/ohci-lpc32xx.c	/^#define MC2_BI_DI	/;"	d	file:
MC2_PSW_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define MC2_PSW_EN	/;"	d	file:
MC2_SPD_SUSP_CTRL	drivers/usb/host/ohci-lpc32xx.c	/^#define MC2_SPD_SUSP_CTRL	/;"	d	file:
MC34704_FAULTS_REG	include/mc34704.h	/^	MC34704_FAULTS_REG,		\/* 0x18 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_FSW2SET_REG	include/mc34704.h	/^	MC34704_FSW2SET_REG,		\/* 0x13 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_GENERAL1_REG	include/mc34704.h	/^	MC34704_GENERAL1_REG,		\/* 0x01 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_GENERAL2_REG	include/mc34704.h	/^	MC34704_GENERAL2_REG,		\/* 0x02 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_GENERAL3_REG	include/mc34704.h	/^	MC34704_GENERAL3_REG,		\/* 0x03 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_I2CSET1	include/mc34704.h	/^	MC34704_I2CSET1,		\/* 0x19 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_NUM_OF_REGS	include/mc34704.h	/^	MC34704_NUM_OF_REGS,$/;"	e	enum:__anon9fc158e00103
MC34704_REG2SET1_REG	include/mc34704.h	/^	MC34704_REG2SET1_REG,		\/* 0x06 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG2SET2_REG	include/mc34704.h	/^	MC34704_REG2SET2_REG,		\/* 0x07 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG3SET1_REG	include/mc34704.h	/^	MC34704_REG3SET1_REG,		\/* 0x08 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG3SET2_REG	include/mc34704.h	/^	MC34704_REG3SET2_REG,		\/* 0x09 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG4SET1_REG	include/mc34704.h	/^	MC34704_REG4SET1_REG,		\/* 0x0a *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG4SET2_REG	include/mc34704.h	/^	MC34704_REG4SET2_REG,		\/* 0x0b *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG5SET1_REG	include/mc34704.h	/^	MC34704_REG5SET1_REG,		\/* 0x0c *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG5SET2_REG	include/mc34704.h	/^	MC34704_REG5SET2_REG,		\/* 0x0d *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG5SET3_REG	include/mc34704.h	/^	MC34704_REG5SET3_REG,		\/* 0x0e *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG8SET1_REG	include/mc34704.h	/^	MC34704_REG8SET1_REG,		\/* 0x15 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG8SET2_REG	include/mc34704.h	/^	MC34704_REG8SET2_REG,		\/* 0x16 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_REG8SET3_REG	include/mc34704.h	/^	MC34704_REG8SET3_REG,		\/* 0x17 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVED0_REG	include/mc34704.h	/^	MC34704_RESERVED0_REG = 0,	\/* 0x00 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVED10_REG	include/mc34704.h	/^	MC34704_RESERVED10_REG,		\/* 0x10 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVED11_REG	include/mc34704.h	/^	MC34704_RESERVED11_REG,		\/* 0x11 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVED12_REG	include/mc34704.h	/^	MC34704_RESERVED12_REG,		\/* 0x12 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVED14_REG	include/mc34704.h	/^	MC34704_RESERVED14_REG,		\/* 0x14 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVED4_REG	include/mc34704.h	/^	MC34704_RESERVED4_REG,		\/* 0x04 *\/$/;"	e	enum:__anon9fc158e00103
MC34704_RESERVEDF_REG	include/mc34704.h	/^	MC34704_RESERVEDF_REG,		\/* 0x0f *\/$/;"	e	enum:__anon9fc158e00103
MC34704_VGSET2_REG	include/mc34704.h	/^	MC34704_VGSET2_REG,		\/* 0x05 *\/$/;"	e	enum:__anon9fc158e00103
MC34VR500_ADDR	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MC34VR500_ADDR	/;"	d	file:
MC34VR500_DEVICEID	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MC34VR500_DEVICEID	/;"	d	file:
MC34VR500_DEVICEID_MASK	board/freescale/ls1021atwr/ls1021atwr.c	/^#define MC34VR500_DEVICEID_MASK	/;"	d	file:
MC9SDZ60_REG_ALARM_HRS	include/mc9sdz60.h	/^	MC9SDZ60_REG_ALARM_HRS		= 0x0b,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_ALARM_MINS	include/mc9sdz60.h	/^	MC9SDZ60_REG_ALARM_MINS		= 0x0a,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_ALARM_SECS	include/mc9sdz60.h	/^	MC9SDZ60_REG_ALARM_SECS		= 0x09,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_DATE	include/mc9sdz60.h	/^	MC9SDZ60_REG_DATE		= 0x06,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_DAY	include/mc9sdz60.h	/^	MC9SDZ60_REG_DAY		= 0x05,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_DELAY_CONFIG	include/mc9sdz60.h	/^	MC9SDZ60_REG_DELAY_CONFIG	= 0x1d,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_DES_FLAG	include/mc9sdz60.h	/^	MC9SDZ60_REG_DES_FLAG		= 0x29,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_GPIO_1	include/mc9sdz60.h	/^	MC9SDZ60_REG_GPIO_1		= 0x20,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_GPIO_2	include/mc9sdz60.h	/^	MC9SDZ60_REG_GPIO_2		= 0x21,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_HRS	include/mc9sdz60.h	/^	MC9SDZ60_REG_HRS		= 0x04,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_INT_ENABLE_1	include/mc9sdz60.h	/^	MC9SDZ60_REG_INT_ENABLE_1	= 0x25,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_INT_ENABLE_2	include/mc9sdz60.h	/^	MC9SDZ60_REG_INT_ENABLE_2	= 0x26,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_INT_FLAG_1	include/mc9sdz60.h	/^	MC9SDZ60_REG_INT_FLAG_1		= 0x27,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_INT_FLAG_2	include/mc9sdz60.h	/^	MC9SDZ60_REG_INT_FLAG_2		= 0x28,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_KPD_1	include/mc9sdz60.h	/^	MC9SDZ60_REG_KPD_1		= 0x22,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_KPD_2	include/mc9sdz60.h	/^	MC9SDZ60_REG_KPD_2		= 0x23,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_KPD_CONTROL	include/mc9sdz60.h	/^	MC9SDZ60_REG_KPD_CONTROL	= 0x24,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_MINS	include/mc9sdz60.h	/^	MC9SDZ60_REG_MINS		= 0x03,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_MONTH	include/mc9sdz60.h	/^	MC9SDZ60_REG_MONTH		= 0x07,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_POWER_CTL	include/mc9sdz60.h	/^	MC9SDZ60_REG_POWER_CTL		= 0x1c,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_RESET_1	include/mc9sdz60.h	/^	MC9SDZ60_REG_RESET_1		= 0x1a,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_RESET_2	include/mc9sdz60.h	/^	MC9SDZ60_REG_RESET_2		= 0x1b,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_SECS	include/mc9sdz60.h	/^	MC9SDZ60_REG_SECS		= 0x02,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_TS_CONTROL	include/mc9sdz60.h	/^	MC9SDZ60_REG_TS_CONTROL		= 0x0e,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_VERSION	include/mc9sdz60.h	/^	MC9SDZ60_REG_VERSION		= 0x00,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_XY_HIGH	include/mc9sdz60.h	/^	MC9SDZ60_REG_XY_HIGH		= 0x11,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_X_LEFT_HIGH	include/mc9sdz60.h	/^	MC9SDZ60_REG_X_LEFT_HIGH	= 0x13,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_X_LEFT_LOW	include/mc9sdz60.h	/^	MC9SDZ60_REG_X_LEFT_LOW		= 0x12,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_X_LOW	include/mc9sdz60.h	/^	MC9SDZ60_REG_X_LOW		= 0x0f,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_X_RIGHT	include/mc9sdz60.h	/^	MC9SDZ60_REG_X_RIGHT		= 0x14,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_YEAR	include/mc9sdz60.h	/^	MC9SDZ60_REG_YEAR		= 0x08,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_Y_BOTTOM	include/mc9sdz60.h	/^	MC9SDZ60_REG_Y_BOTTOM		= 0x17,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_Y_LOW	include/mc9sdz60.h	/^	MC9SDZ60_REG_Y_LOW		= 0x10,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_Y_TOP_HIGH	include/mc9sdz60.h	/^	MC9SDZ60_REG_Y_TOP_HIGH		= 0x16,$/;"	e	enum:mc9sdz60_reg
MC9SDZ60_REG_Y_TOP_LOW	include/mc9sdz60.h	/^	MC9SDZ60_REG_Y_TOP_LOW		= 0x15,$/;"	e	enum:mc9sdz60_reg
MCASP1_ACLKR	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_ACLKR	/;"	d
MCASP1_ACLKX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_ACLKX	/;"	d
MCASP1_AXR0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR0	/;"	d
MCASP1_AXR1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR1	/;"	d
MCASP1_AXR10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR10	/;"	d
MCASP1_AXR11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR11	/;"	d
MCASP1_AXR12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR12	/;"	d
MCASP1_AXR13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR13	/;"	d
MCASP1_AXR14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR14	/;"	d
MCASP1_AXR15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR15	/;"	d
MCASP1_AXR2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR2	/;"	d
MCASP1_AXR3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR3	/;"	d
MCASP1_AXR4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR4	/;"	d
MCASP1_AXR5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR5	/;"	d
MCASP1_AXR6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR6	/;"	d
MCASP1_AXR7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR7	/;"	d
MCASP1_AXR8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR8	/;"	d
MCASP1_AXR9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_AXR9	/;"	d
MCASP1_FSR	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_FSR	/;"	d
MCASP1_FSX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP1_FSX	/;"	d
MCASP2_ACLKR	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_ACLKR	/;"	d
MCASP2_ACLKX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_ACLKX	/;"	d
MCASP2_AXR0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR0	/;"	d
MCASP2_AXR1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR1	/;"	d
MCASP2_AXR2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR2	/;"	d
MCASP2_AXR3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR3	/;"	d
MCASP2_AXR4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR4	/;"	d
MCASP2_AXR5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR5	/;"	d
MCASP2_AXR6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR6	/;"	d
MCASP2_AXR7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_AXR7	/;"	d
MCASP2_FSR	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_FSR	/;"	d
MCASP2_FSX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP2_FSX	/;"	d
MCASP3_ACLKX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP3_ACLKX	/;"	d
MCASP3_AXR0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP3_AXR0	/;"	d
MCASP3_AXR1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP3_AXR1	/;"	d
MCASP3_FSX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP3_FSX	/;"	d
MCASP4_ACLKX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP4_ACLKX	/;"	d
MCASP4_AXR0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP4_AXR0	/;"	d
MCASP4_AXR1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP4_AXR1	/;"	d
MCASP4_FSX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP4_FSX	/;"	d
MCASP5_ACLKX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP5_ACLKX	/;"	d
MCASP5_AXR0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP5_AXR0	/;"	d
MCASP5_AXR1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP5_AXR1	/;"	d
MCASP5_FSX	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MCASP5_FSX	/;"	d
MCAST_REG1	drivers/net/smc91111.h	/^#define	MCAST_REG1	/;"	d
MCAST_REG2	drivers/net/smc91111.h	/^#define	MCAST_REG2	/;"	d
MCAST_REG3	drivers/net/smc91111.h	/^#define	MCAST_REG3	/;"	d
MCAST_REG4	drivers/net/smc91111.h	/^#define	MCAST_REG4	/;"	d
MCATT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCATT(/;"	d
MCATT0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MCATT0	/;"	d
MCATT0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCATT0	/;"	d
MCATT0_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCATT0_OFFSET	/;"	d
MCATT1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCATT1	/;"	d
MCATT1_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCATT1_OFFSET	/;"	d
MCA_bus	arch/arm/include/asm/processor.h	/^#define MCA_bus /;"	d
MCA_bus	arch/powerpc/include/asm/processor.h	/^#define MCA_bus /;"	d
MCA_bus__is_a_macro	arch/arm/include/asm/processor.h	/^#define MCA_bus__is_a_macro$/;"	d
MCA_bus__is_a_macro	arch/powerpc/include/asm/processor.h	/^#define MCA_bus__is_a_macro /;"	d
MCB_EMEM_ARB_OVERRIDE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define MCB_EMEM_ARB_OVERRIDE	/;"	d
MCB_EMEM_ARB_OVERRIDE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define MCB_EMEM_ARB_OVERRIDE	/;"	d
MCCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCCR	/;"	d
MCCR0_ADM	include/SA-1100.h	/^#define MCCR0_ADM	/;"	d
MCCR0_ARE	include/SA-1100.h	/^#define MCCR0_ARE	/;"	d
MCCR0_ASD	include/SA-1100.h	/^#define MCCR0_ASD	/;"	d
MCCR0_ATE	include/SA-1100.h	/^#define MCCR0_ATE	/;"	d
MCCR0_AudSmpDiv	include/SA-1100.h	/^#define MCCR0_AudSmpDiv(/;"	d
MCCR0_CeilAudSmpDiv	include/SA-1100.h	/^#define MCCR0_CeilAudSmpDiv(/;"	d
MCCR0_CeilTcmSmpDiv	include/SA-1100.h	/^#define MCCR0_CeilTcmSmpDiv(/;"	d
MCCR0_ECP	include/SA-1100.h	/^#define MCCR0_ECP	/;"	d
MCCR0_ECS	include/SA-1100.h	/^#define MCCR0_ECS	/;"	d
MCCR0_ExtClk	include/SA-1100.h	/^#define MCCR0_ExtClk	/;"	d
MCCR0_ExtClkDiv	include/SA-1100.h	/^#define MCCR0_ExtClkDiv(/;"	d
MCCR0_IntClk	include/SA-1100.h	/^#define MCCR0_IntClk	/;"	d
MCCR0_LBM	include/SA-1100.h	/^#define MCCR0_LBM	/;"	d
MCCR0_MCE	include/SA-1100.h	/^#define MCCR0_MCE	/;"	d
MCCR0_SmpCnt	include/SA-1100.h	/^#define MCCR0_SmpCnt	/;"	d
MCCR0_TRE	include/SA-1100.h	/^#define MCCR0_TRE	/;"	d
MCCR0_TSD	include/SA-1100.h	/^#define MCCR0_TSD	/;"	d
MCCR0_TTE	include/SA-1100.h	/^#define MCCR0_TTE	/;"	d
MCCR0_TcmSmpDiv	include/SA-1100.h	/^#define MCCR0_TcmSmpDiv(/;"	d
MCCR0_VldBit	include/SA-1100.h	/^#define MCCR0_VldBit	/;"	d
MCCR1_BK0_10BITS	include/mpc106.h	/^#define MCCR1_BK0_10BITS	/;"	d
MCCR1_BK0_11BITS	include/mpc106.h	/^#define MCCR1_BK0_11BITS	/;"	d
MCCR1_BK0_12BITS	include/mpc106.h	/^#define MCCR1_BK0_12BITS	/;"	d
MCCR1_BK0_9BITS	include/mpc106.h	/^#define MCCR1_BK0_9BITS	/;"	d
MCCR1_BK1_10BITS	include/mpc106.h	/^#define MCCR1_BK1_10BITS	/;"	d
MCCR1_BK1_11BITS	include/mpc106.h	/^#define MCCR1_BK1_11BITS	/;"	d
MCCR1_BK1_12BITS	include/mpc106.h	/^#define MCCR1_BK1_12BITS	/;"	d
MCCR1_BK1_9BITS	include/mpc106.h	/^#define MCCR1_BK1_9BITS	/;"	d
MCCR1_BK2_10BITS	include/mpc106.h	/^#define MCCR1_BK2_10BITS	/;"	d
MCCR1_BK2_11BITS	include/mpc106.h	/^#define MCCR1_BK2_11BITS	/;"	d
MCCR1_BK2_12BITS	include/mpc106.h	/^#define MCCR1_BK2_12BITS	/;"	d
MCCR1_BK2_9BITS	include/mpc106.h	/^#define MCCR1_BK2_9BITS	/;"	d
MCCR1_BK3_10BITS	include/mpc106.h	/^#define MCCR1_BK3_10BITS	/;"	d
MCCR1_BK3_11BITS	include/mpc106.h	/^#define MCCR1_BK3_11BITS	/;"	d
MCCR1_BK3_12BITS	include/mpc106.h	/^#define MCCR1_BK3_12BITS	/;"	d
MCCR1_BK3_9BITS	include/mpc106.h	/^#define MCCR1_BK3_9BITS	/;"	d
MCCR1_CFS	include/SA-1100.h	/^#define MCCR1_CFS	/;"	d
MCCR1_F10MHz	include/SA-1100.h	/^#define MCCR1_F10MHz	/;"	d
MCCR1_F12MHz	include/SA-1100.h	/^#define MCCR1_F12MHz	/;"	d
MCCR1_MEMGO	include/mpc106.h	/^#define MCCR1_MEMGO	/;"	d
MCCR1_TYPE_EDO	include/mpc106.h	/^#define MCCR1_TYPE_EDO	/;"	d
MCCR_FEIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCCR_FEIE	/;"	d
MCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCDR	/;"	d
MCDR0_DATA	include/SA-1100.h	/^#define MCDR0_DATA	/;"	d
MCDR1_DATA	include/SA-1100.h	/^#define MCDR1_DATA	/;"	d
MCDR2_ADD	include/SA-1100.h	/^#define MCDR2_ADD	/;"	d
MCDR2_DATA	include/SA-1100.h	/^#define MCDR2_DATA	/;"	d
MCDR2_RW	include/SA-1100.h	/^#define MCDR2_RW	/;"	d
MCDR2_Rd	include/SA-1100.h	/^#define MCDR2_Rd	/;"	d
MCDR2_Wr	include/SA-1100.h	/^#define MCDR2_Wr	/;"	d
MCD_BIT_REV	include/MCD_dma.h	/^#define MCD_BIT_REV	/;"	d
MCD_BUF_READY	include/MCD_dma.h	/^#define MCD_BUF_READY	/;"	d
MCD_BYTE_REVERSE	include/MCD_dma.h	/^#define MCD_BYTE_REVERSE	/;"	d
MCD_BYTE_SWAP_KILLER	drivers/dma/MCD_dmaApi.c	/^#define MCD_BYTE_SWAP_KILLER	/;"	d	file:
MCD_CHAIN_DMA	include/MCD_dma.h	/^#define MCD_CHAIN_DMA	/;"	d
MCD_CHANNEL_INVALID	include/MCD_dma.h	/^#define MCD_CHANNEL_INVALID	/;"	d
MCD_COMM_PREFETCH_EN	include/MCD_dma.h	/^#define MCD_COMM_PREFETCH_EN	/;"	d
MCD_CRC16	include/MCD_dma.h	/^#define MCD_CRC16	/;"	d
MCD_CRC32	include/MCD_dma.h	/^#define MCD_CRC32	/;"	d
MCD_CRCCCITT	include/MCD_dma.h	/^#define MCD_CRCCCITT	/;"	d
MCD_CRC_RESTART	include/MCD_dma.h	/^#define MCD_CRC_RESTART	/;"	d
MCD_CSUMINET	include/MCD_dma.h	/^#define MCD_CSUMINET	/;"	d
MCD_ChainEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ChainEu_TDT[] = {$/;"	v	typeref:typename:u32[]
MCD_ChainEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ChainEu_TDT[];$/;"	v	typeref:typename:u32[]
MCD_ChainNoEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ChainNoEu_TDT[] = {$/;"	v	typeref:typename:u32[]
MCD_ChainNoEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ChainNoEu_TDT[];$/;"	v	typeref:typename:u32[]
MCD_DONE	include/MCD_dma.h	/^#define MCD_DONE	/;"	d
MCD_END_FRAME	include/MCD_dma.h	/^#define MCD_END_FRAME	/;"	d
MCD_ENetRcv_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ENetRcv_TDT[] = {$/;"	v	typeref:typename:u32[]
MCD_ENetRcv_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ENetRcv_TDT[];$/;"	v	typeref:typename:u32[]
MCD_ENetXmit_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ENetXmit_TDT[] = {$/;"	v	typeref:typename:u32[]
MCD_ENetXmit_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_ENetXmit_TDT[];$/;"	v	typeref:typename:u32[]
MCD_ERROR	include/MCD_dma.h	/^#define MCD_ERROR	/;"	d
MCD_EU_DMA	include/MCD_dma.h	/^#define MCD_EU_DMA	/;"	d
MCD_FALSE	include/MCD_dma.h	/^#define MCD_FALSE	/;"	d
MCD_FECRX_DMA	include/MCD_dma.h	/^#define MCD_FECRX_DMA	/;"	d
MCD_FECTX_DMA	include/MCD_dma.h	/^#define MCD_FECTX_DMA	/;"	d
MCD_FEC_BUF_READY	include/MCD_dma.h	/^#define MCD_FEC_BUF_READY	/;"	d
MCD_FEC_END_FRAME	include/MCD_dma.h	/^#define MCD_FEC_END_FRAME	/;"	d
MCD_FEC_INTERRUPT	include/MCD_dma.h	/^#define MCD_FEC_INTERRUPT	/;"	d
MCD_FEC_WRAP	include/MCD_dma.h	/^#define MCD_FEC_WRAP	/;"	d
MCD_FUNC_NOEU1	include/MCD_dma.h	/^#define MCD_FUNC_NOEU1	/;"	d
MCD_FUNC_NOEU2	include/MCD_dma.h	/^#define MCD_FUNC_NOEU2	/;"	d
MCD_HALTED	include/MCD_dma.h	/^#define MCD_HALTED	/;"	d
MCD_IDLE	include/MCD_dma.h	/^#define MCD_IDLE	/;"	d
MCD_INTERRUPT	include/MCD_dma.h	/^#define MCD_INTERRUPT	/;"	d
MCD_NO_BIT_REV	include/MCD_dma.h	/^#define MCD_NO_BIT_REV	/;"	d
MCD_NO_BYTE_SWAP	include/MCD_dma.h	/^#define MCD_NO_BYTE_SWAP	/;"	d
MCD_NO_BYTE_SWAP_ATALL	drivers/dma/MCD_dmaApi.c	/^#define MCD_NO_BYTE_SWAP_ATALL	/;"	d	file:
MCD_NO_CSUM	include/MCD_dma.h	/^#define MCD_NO_CSUM	/;"	d
MCD_NO_DMA	include/MCD_dma.h	/^#define MCD_NO_DMA	/;"	d
MCD_NO_RELOC_TASKS	include/MCD_dma.h	/^#define MCD_NO_RELOC_TASKS	/;"	d
MCD_OK	include/MCD_dma.h	/^#define MCD_OK	/;"	d
MCD_PAUSED	include/MCD_dma.h	/^#define MCD_PAUSED	/;"	d
MCD_RELOC_TASKS	include/MCD_dma.h	/^#define MCD_RELOC_TASKS	/;"	d
MCD_REV_MAJOR	drivers/dma/MCD_dmaApi.c	/^#define MCD_REV_MAJOR /;"	d	file:
MCD_REV_MINOR	drivers/dma/MCD_dmaApi.c	/^#define MCD_REV_MINOR /;"	d	file:
MCD_RUNNING	include/MCD_dma.h	/^#define MCD_RUNNING	/;"	d
MCD_SET_VAR	include/MCD_dma.h	/^#define MCD_SET_VAR(/;"	d
MCD_SINGLE_DMA	include/MCD_dma.h	/^#define MCD_SINGLE_DMA	/;"	d
MCD_SingleEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_SingleEu_TDT[] = {$/;"	v	typeref:typename:u32[]
MCD_SingleEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_SingleEu_TDT[];$/;"	v	typeref:typename:u32[]
MCD_SingleNoEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_SingleNoEu_TDT[] = {$/;"	v	typeref:typename:u32[]
MCD_SingleNoEu_TDT	drivers/dma/MCD_tasks.c	/^u32 MCD_SingleNoEu_TDT[];$/;"	v	typeref:typename:u32[]
MCD_TABLE_UNALIGNED	include/MCD_dma.h	/^#define MCD_TABLE_UNALIGNED	/;"	d
MCD_TRUE	include/MCD_dma.h	/^#define MCD_TRUE	/;"	d
MCD_TSK_INIT_H	include/MCD_tasksInit.h	/^#define MCD_TSK_INIT_H /;"	d
MCD_TT_FLAGS_CW	include/MCD_dma.h	/^#define MCD_TT_FLAGS_CW	/;"	d
MCD_TT_FLAGS_DEF	include/MCD_dma.h	/^#define MCD_TT_FLAGS_DEF	/;"	d
MCD_TT_FLAGS_MASK	include/MCD_dma.h	/^#define MCD_TT_FLAGS_MASK	/;"	d
MCD_TT_FLAGS_RL	include/MCD_dma.h	/^#define MCD_TT_FLAGS_RL	/;"	d
MCD_TT_FLAGS_SP	include/MCD_dma.h	/^#define MCD_TT_FLAGS_SP	/;"	d
MCD_U16_BYTE_REVERSE	include/MCD_dma.h	/^#define MCD_U16_BYTE_REVERSE	/;"	d
MCD_U16_REVERSE	include/MCD_dma.h	/^#define MCD_U16_REVERSE	/;"	d
MCD_WRAP	include/MCD_dma.h	/^#define MCD_WRAP	/;"	d
MCD_XferProg	include/MCD_dma.h	/^} MCD_XferProg;$/;"	t	typeref:typename:volatile struct MCD_XferProg_struct
MCD_XferProg_struct	include/MCD_dma.h	/^typedef volatile struct MCD_XferProg_struct {$/;"	s
MCD_XferProgrQuery	drivers/dma/MCD_dmaApi.c	/^int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep)$/;"	f	typeref:typename:int
MCD_bufDesc	include/MCD_dma.h	/^typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;$/;"	t	typeref:typename:volatile struct MCD_bufDesc_struct
MCD_bufDescFec	include/MCD_dma.h	/^} MCD_bufDescFec;$/;"	t	typeref:typename:volatile struct MCD_bufDescFec_struct
MCD_bufDescFec_struct	include/MCD_dma.h	/^typedef volatile struct MCD_bufDescFec_struct {$/;"	s
MCD_bufDesc_struct	include/MCD_dma.h	/^struct MCD_bufDesc_struct {$/;"	s
MCD_chStatus	drivers/dma/MCD_dmaApi.c	/^static int MCD_chStatus[NCHANNELS] = {$/;"	v	typeref:typename:int[]	file:
MCD_contextSave0	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave0[128];	\/* Task 0 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave0	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave0[];$/;"	v	typeref:typename:u32[]
MCD_contextSave1	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave1[128];	\/* Task 1 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave1	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave1[];$/;"	v	typeref:typename:u32[]
MCD_contextSave10	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave10[128];	\/* Task 10 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave10	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave10[];$/;"	v	typeref:typename:u32[]
MCD_contextSave11	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave11[128];	\/* Task 11 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave11	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave11[];$/;"	v	typeref:typename:u32[]
MCD_contextSave12	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave12[128];	\/* Task 12 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave12	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave12[];$/;"	v	typeref:typename:u32[]
MCD_contextSave13	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave13[128];	\/* Task 13 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave13	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave13[];$/;"	v	typeref:typename:u32[]
MCD_contextSave14	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave14[128];	\/* Task 14 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave14	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave14[];$/;"	v	typeref:typename:u32[]
MCD_contextSave15	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave15[128];	\/* Task 15 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave15	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave15[];$/;"	v	typeref:typename:u32[]
MCD_contextSave2	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave2[128];	\/* Task 2 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave2	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave2[];$/;"	v	typeref:typename:u32[]
MCD_contextSave3	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave3[128];	\/* Task 3 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave3	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave3[];$/;"	v	typeref:typename:u32[]
MCD_contextSave4	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave4[128];	\/* Task 4 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave4	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave4[];$/;"	v	typeref:typename:u32[]
MCD_contextSave5	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave5[128];	\/* Task 5 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave5	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave5[];$/;"	v	typeref:typename:u32[]
MCD_contextSave6	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave6[128];	\/* Task 6 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave6	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave6[];$/;"	v	typeref:typename:u32[]
MCD_contextSave7	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave7[128];	\/* Task 7 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave7	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave7[];$/;"	v	typeref:typename:u32[]
MCD_contextSave8	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave8[128];	\/* Task 8 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave8	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave8[];$/;"	v	typeref:typename:u32[]
MCD_contextSave9	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave9[128];	\/* Task 9 context save space *\/$/;"	v	typeref:typename:u32[128]
MCD_contextSave9	drivers/dma/MCD_tasks.c	/^u32 MCD_contextSave9[];$/;"	v	typeref:typename:u32[]
MCD_continDma	drivers/dma/MCD_dmaApi.c	/^int MCD_continDma(int channel)$/;"	f	typeref:typename:int
MCD_csumQuery	drivers/dma/MCD_dmaApi.c	/^int MCD_csumQuery(int channel, u32 * csum)$/;"	f	typeref:typename:int
MCD_dmaBar	drivers/dma/MCD_dmaApi.c	/^dmaRegs *MCD_dmaBar;$/;"	v	typeref:typename:dmaRegs *
MCD_dmaStatus	drivers/dma/MCD_dmaApi.c	/^int MCD_dmaStatus(int channel)$/;"	f	typeref:typename:int
MCD_funcDescTab0	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab0[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab0	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab0[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab1	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab1[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab1	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab1[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab10	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab10[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab10	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab10[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab11	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab11[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab11	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab11[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab12	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab12[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab12	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab12[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab13	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab13[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab13	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab13[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab14	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab14[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab14	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab14[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab15	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab15[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab15	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab15[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab2	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab2[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab2	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab2[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab3	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab3[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab3	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab3[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab4	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab4[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab4	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab4[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab5	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab5[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab5	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab5[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab6	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab6[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab6	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab6[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab7	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab7[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab7	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab7[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab8	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab8[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab8	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab8[];$/;"	v	typeref:typename:u32[]
MCD_funcDescTab9	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab9[] = {$/;"	v	typeref:typename:u32[]
MCD_funcDescTab9	drivers/dma/MCD_tasks.c	/^u32 MCD_funcDescTab9[];$/;"	v	typeref:typename:u32[]
MCD_getCodeSize	drivers/dma/MCD_dmaApi.c	/^int MCD_getCodeSize(void)$/;"	f	typeref:typename:int
MCD_getVersion	drivers/dma/MCD_dmaApi.c	/^int MCD_getVersion(char **longVersion)$/;"	f	typeref:typename:int
MCD_initDma	drivers/dma/MCD_dmaApi.c	/^int MCD_initDma(dmaRegs * dmaBarAddr, void *taskTableDest, u32 flags)$/;"	f	typeref:typename:int
MCD_killDma	drivers/dma/MCD_dmaApi.c	/^int MCD_killDma(int channel)$/;"	f	typeref:typename:int
MCD_memcpy	drivers/dma/MCD_dmaApi.c	/^static void MCD_memcpy(int *dest, int *src, u32 size)$/;"	f	typeref:typename:void	file:
MCD_modelTaskTable	drivers/dma/MCD_dmaApi.c	/^TaskTableEntry *MCD_modelTaskTable;$/;"	v	typeref:typename:TaskTableEntry *
MCD_modelTaskTableSrc	drivers/dma/MCD_tasks.c	/^u32 MCD_modelTaskTableSrc[] = {$/;"	v	typeref:typename:u32[]
MCD_pauseDma	drivers/dma/MCD_dmaApi.c	/^int MCD_pauseDma(int channel)$/;"	f	typeref:typename:int
MCD_realTaskTableSrc	drivers/dma/MCD_tasks.c	/^u32 MCD_realTaskTableSrc[] = {$/;"	v	typeref:typename:u32[]
MCD_relocBuffDesc	drivers/dma/MCD_dmaApi.c	/^MCD_bufDesc *MCD_relocBuffDesc;$/;"	v	typeref:typename:MCD_bufDesc *
MCD_remVariant	drivers/dma/MCD_dmaApi.c	/^typedef struct MCD_remVariants_struct MCD_remVariant;$/;"	t	typeref:struct:MCD_remVariants_struct	file:
MCD_remVariants	drivers/dma/MCD_dmaApi.c	/^MCD_remVariant MCD_remVariants;$/;"	v	typeref:typename:MCD_remVariant
MCD_remVariants_struct	drivers/dma/MCD_dmaApi.c	/^struct MCD_remVariants_struct {$/;"	s	file:
MCD_resmActions	drivers/dma/MCD_dmaApi.c	/^static void MCD_resmActions(int channel)$/;"	f	typeref:typename:void	file:
MCD_resumeDma	drivers/dma/MCD_dmaApi.c	/^int MCD_resumeDma(int channel)$/;"	f	typeref:typename:int
MCD_singleBufDescs	drivers/dma/MCD_dmaApi.c	/^MCD_bufDesc MCD_singleBufDescs[NCHANNELS];$/;"	v	typeref:typename:MCD_bufDesc[]
MCD_singleBufDescs	drivers/dma/MCD_tasks.c	/^MCD_bufDesc MCD_singleBufDescs[NCHANNELS];$/;"	v	typeref:typename:MCD_bufDesc[]
MCD_startDma	drivers/dma/MCD_dmaApi.c	/^int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr,$/;"	f	typeref:typename:int
MCD_startDmaChainEu	drivers/dma/MCD_tasksInit.c	/^void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,$/;"	f	typeref:typename:void
MCD_startDmaChainNoEu	drivers/dma/MCD_tasksInit.c	/^void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr,$/;"	f	typeref:typename:void
MCD_startDmaENetRcv	drivers/dma/MCD_tasksInit.c	/^void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,$/;"	f	typeref:typename:void
MCD_startDmaENetXmit	drivers/dma/MCD_tasksInit.c	/^void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr,$/;"	f	typeref:typename:void
MCD_startDmaSingleEu	drivers/dma/MCD_tasksInit.c	/^void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr,$/;"	f	typeref:typename:void
MCD_startDmaSingleNoEu	drivers/dma/MCD_tasksInit.c	/^void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr,$/;"	f	typeref:typename:void
MCD_taskTable	drivers/dma/MCD_dmaApi.c	/^volatile TaskTableEntry *MCD_taskTable;$/;"	v	typeref:typename:volatile TaskTableEntry *
MCD_varTab0	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab0[] = {		\/* Task 0 Variable Table *\/$/;"	v	typeref:typename:u32[]
MCD_varTab0	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab0[];$/;"	v	typeref:typename:u32[]
MCD_varTab1	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab1[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab1	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab1[];$/;"	v	typeref:typename:u32[]
MCD_varTab10	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab10[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab10	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab10[];$/;"	v	typeref:typename:u32[]
MCD_varTab11	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab11[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab11	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab11[];$/;"	v	typeref:typename:u32[]
MCD_varTab12	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab12[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab12	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab12[];$/;"	v	typeref:typename:u32[]
MCD_varTab13	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab13[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab13	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab13[];$/;"	v	typeref:typename:u32[]
MCD_varTab14	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab14[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab14	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab14[];$/;"	v	typeref:typename:u32[]
MCD_varTab15	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab15[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab15	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab15[];$/;"	v	typeref:typename:u32[]
MCD_varTab2	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab2[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab2	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab2[];$/;"	v	typeref:typename:u32[]
MCD_varTab3	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab3[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab3	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab3[];$/;"	v	typeref:typename:u32[]
MCD_varTab4	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab4[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab4	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab4[];$/;"	v	typeref:typename:u32[]
MCD_varTab5	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab5[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab5	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab5[];$/;"	v	typeref:typename:u32[]
MCD_varTab6	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab6[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab6	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab6[];$/;"	v	typeref:typename:u32[]
MCD_varTab7	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab7[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab7	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab7[];$/;"	v	typeref:typename:u32[]
MCD_varTab8	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab8[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab8	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab8[];$/;"	v	typeref:typename:u32[]
MCD_varTab9	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab9[] = {$/;"	v	typeref:typename:u32[]
MCD_varTab9	drivers/dma/MCD_tasks.c	/^u32 MCD_varTab9[];$/;"	v	typeref:typename:u32[]
MCD_versionString	drivers/dma/MCD_dmaApi.c	/^char MCD_versionString[] = "Multi-channel DMA API Alpha v0.3 (2004-04-26)";$/;"	v	typeref:typename:char[]
MCEIL	arch/x86/cpu/quark/smc.h	/^#define MCEIL(/;"	d
MCE_SMC_ROC_CLEAN_CACHE_ONLY	arch/arm/mach-tegra/tegra186/cache.S	/^#define MCE_SMC_ROC_CLEAN_CACHE_ONLY	/;"	d	file:
MCE_SMC_ROC_FLUSH_CACHE	arch/arm/mach-tegra/tegra186/cache.S	/^#define MCE_SMC_ROC_FLUSH_CACHE	/;"	d	file:
MCE_SMC_ROC_FLUSH_CACHE_ONLY	arch/arm/mach-tegra/tegra186/cache.S	/^#define MCE_SMC_ROC_FLUSH_CACHE_ONLY	/;"	d	file:
MCF520x	arch/m68k/Kconfig	/^config MCF520x$/;"	c	menu:M68000 architecture
MCF5227x	arch/m68k/Kconfig	/^config MCF5227x$/;"	c	menu:M68000 architecture
MCF523x	arch/m68k/Kconfig	/^config MCF523x$/;"	c	menu:M68000 architecture
MCF52x2	arch/m68k/Kconfig	/^config MCF52x2$/;"	c	menu:M68000 architecture
MCF5301x	arch/m68k/Kconfig	/^config MCF5301x$/;"	c	menu:M68000 architecture
MCF5307_SP_ERR_FIX	arch/m68k/cpu/mcf530x/cpu_init.c	/^#define MCF5307_SP_ERR_FIX(/;"	d	file:
MCF530x	arch/m68k/Kconfig	/^config MCF530x$/;"	c	menu:M68000 architecture
MCF532x	arch/m68k/Kconfig	/^config MCF532x$/;"	c	menu:M68000 architecture
MCF537x	arch/m68k/Kconfig	/^config MCF537x$/;"	c	menu:M68000 architecture
MCF5441x	arch/m68k/Kconfig	/^config MCF5441x$/;"	c	menu:M68000 architecture
MCF5445x	arch/m68k/Kconfig	/^config MCF5445x$/;"	c	menu:M68000 architecture
MCF547x_8x	arch/m68k/Kconfig	/^config MCF547x_8x$/;"	c	menu:M68000 architecture
MCFCCM_CCR	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR	/;"	d
MCFCCM_CCR_BME	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR_BME	/;"	d
MCFCCM_CCR_BMT	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR_BMT(/;"	d
MCFCCM_CCR_LOAD	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR_LOAD	/;"	d
MCFCCM_CCR_MODE	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR_MODE(/;"	d
MCFCCM_CCR_PSTEN	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR_PSTEN	/;"	d
MCFCCM_CCR_SZEN	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CCR_SZEN	/;"	d
MCFCCM_CIR	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CIR	/;"	d
MCFCCM_CIR_PIN_MASK	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CIR_PIN_MASK	/;"	d
MCFCCM_CIR_PRN_MASK	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_CIR_PRN_MASK	/;"	d
MCFCCM_RCON	arch/m68k/include/asm/m5282.h	/^#define MCFCCM_RCON	/;"	d
MCFCFM_CLKD	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CLKD	/;"	d
MCFCFM_CMD	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CMD	/;"	d
MCFCFM_CMD_ERSVER	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CMD_ERSVER	/;"	d
MCFCFM_CMD_MASERS	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CMD_MASERS	/;"	d
MCFCFM_CMD_PGERS	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CMD_PGERS	/;"	d
MCFCFM_CMD_PGERSVER	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CMD_PGERSVER	/;"	d
MCFCFM_CMD_PGM	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_CMD_PGM	/;"	d
MCFCFM_DACC	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_DACC	/;"	d
MCFCFM_MCR	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR	/;"	d
MCFCFM_MCR_AEIE	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR_AEIE	/;"	d
MCFCFM_MCR_CBEIE	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR_CBEIE	/;"	d
MCFCFM_MCR_CCIE	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR_CCIE	/;"	d
MCFCFM_MCR_KEYACC	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR_KEYACC	/;"	d
MCFCFM_MCR_LOCK	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR_LOCK	/;"	d
MCFCFM_MCR_PVIE	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_MCR_PVIE	/;"	d
MCFCFM_PROT	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_PROT	/;"	d
MCFCFM_SACC	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_SACC	/;"	d
MCFCFM_SEC	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_SEC	/;"	d
MCFCFM_SEC_KEYEN	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_SEC_KEYEN	/;"	d
MCFCFM_SEC_SECSTAT	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_SEC_SECSTAT	/;"	d
MCFCFM_USTAT	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_USTAT	/;"	d
MCFCFM_USTAT_ACCERR	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_USTAT_ACCERR	/;"	d
MCFCFM_USTAT_BLANK	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_USTAT_BLANK	/;"	d
MCFCFM_USTAT_CBEIF	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_USTAT_CBEIF	/;"	d
MCFCFM_USTAT_CCIF	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_USTAT_CCIF	/;"	d
MCFCFM_USTAT_PVIOL	arch/m68k/include/asm/m5282.h	/^#define MCFCFM_USTAT_PVIOL	/;"	d
MCFCLOCK_SYNCR	arch/m68k/include/asm/m5282.h	/^#define MCFCLOCK_SYNCR	/;"	d
MCFCLOCK_SYNCR_MFD	arch/m68k/include/asm/m5282.h	/^#define MCFCLOCK_SYNCR_MFD(/;"	d
MCFCLOCK_SYNCR_RFD	arch/m68k/include/asm/m5282.h	/^#define MCFCLOCK_SYNCR_RFD(/;"	d
MCFCLOCK_SYNSR	arch/m68k/include/asm/m5282.h	/^#define MCFCLOCK_SYNSR	/;"	d
MCFCLOCK_SYNSR_LOCK	arch/m68k/include/asm/m5282.h	/^#define MCFCLOCK_SYNSR_LOCK	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5208EVBE.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5235EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5272C3.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5275EVB.h	/^#define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5282EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M53017EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5329EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5373EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M54418TWR.h	/^#define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M54451EVB.h	/^#	define MCFFEC_TOUT_LOOP /;"	d
MCFFEC_TOUT_LOOP	include/configs/M54455EVB.h	/^#	define MCFFEC_TOUT_LOOP /;"	d
MCFFEC_TOUT_LOOP	include/configs/M5475EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/M5485EVB.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/cobra5272.h	/^#	define MCFFEC_TOUT_LOOP	/;"	d
MCFFEC_TOUT_LOOP	include/configs/eb_cpu5282.h	/^#define MCFFEC_TOUT_LOOP	/;"	d
MCFG	arch/arm/include/asm/arch-omap3/mem.h	/^#define MCFG(/;"	d
MCFG	arch/avr32/include/asm/hmatrix-common.h	/^	u32	MCFG[16];$/;"	m	struct:hmatrix_regs	typeref:typename:u32[16]
MCFGPIO_CLRA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRA	/;"	d
MCFGPIO_CLRAS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRAS	/;"	d
MCFGPIO_CLRB	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRB	/;"	d
MCFGPIO_CLRC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRC	/;"	d
MCFGPIO_CLRD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRD	/;"	d
MCFGPIO_CLRDD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRDD	/;"	d
MCFGPIO_CLRE	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRE	/;"	d
MCFGPIO_CLREH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLREH	/;"	d
MCFGPIO_CLREL	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLREL	/;"	d
MCFGPIO_CLRF	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRF	/;"	d
MCFGPIO_CLRG	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRG	/;"	d
MCFGPIO_CLRH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRH	/;"	d
MCFGPIO_CLRJ	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRJ	/;"	d
MCFGPIO_CLRQS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRQS	/;"	d
MCFGPIO_CLRSD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRSD	/;"	d
MCFGPIO_CLRTC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRTC	/;"	d
MCFGPIO_CLRTD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRTD	/;"	d
MCFGPIO_CLRUA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_CLRUA	/;"	d
MCFGPIO_DDR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR(/;"	d
MCFGPIO_DDR0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR0	/;"	d
MCFGPIO_DDR1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR1	/;"	d
MCFGPIO_DDR2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR2	/;"	d
MCFGPIO_DDR3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR3	/;"	d
MCFGPIO_DDR4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR4	/;"	d
MCFGPIO_DDR5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR5	/;"	d
MCFGPIO_DDR6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR6	/;"	d
MCFGPIO_DDR7	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDR7	/;"	d
MCFGPIO_DDRA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRA	/;"	d
MCFGPIO_DDRAS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRAS	/;"	d
MCFGPIO_DDRB	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRB	/;"	d
MCFGPIO_DDRC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRC	/;"	d
MCFGPIO_DDRD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRD	/;"	d
MCFGPIO_DDRDD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRDD	/;"	d
MCFGPIO_DDRE	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRE	/;"	d
MCFGPIO_DDREH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDREH	/;"	d
MCFGPIO_DDREL	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDREL	/;"	d
MCFGPIO_DDRF	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRF	/;"	d
MCFGPIO_DDRG	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRG	/;"	d
MCFGPIO_DDRH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRH	/;"	d
MCFGPIO_DDRJ	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRJ	/;"	d
MCFGPIO_DDRQS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRQS	/;"	d
MCFGPIO_DDRSD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRSD	/;"	d
MCFGPIO_DDRTC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRTC	/;"	d
MCFGPIO_DDRTD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRTD	/;"	d
MCFGPIO_DDRUA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_DDRUA	/;"	d
MCFGPIO_PASPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR	/;"	d
MCFGPIO_PASPAR_PASPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR_PASPA0(/;"	d
MCFGPIO_PASPAR_PASPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR_PASPA1(/;"	d
MCFGPIO_PASPAR_PASPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR_PASPA2(/;"	d
MCFGPIO_PASPAR_PASPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR_PASPA3(/;"	d
MCFGPIO_PASPAR_PASPA4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR_PASPA4(/;"	d
MCFGPIO_PASPAR_PASPA5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PASPAR_PASPA5(/;"	d
MCFGPIO_PBCDPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PBCDPAR	/;"	d
MCFGPIO_PBCDPAR_PBPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PBCDPAR_PBPA	/;"	d
MCFGPIO_PBCDPAR_PCDPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PBCDPAR_PCDPA	/;"	d
MCFGPIO_PEHLPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEHLPAR	/;"	d
MCFGPIO_PEHLPAR_PEHPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEHLPAR_PEHPA	/;"	d
MCFGPIO_PEHLPAR_PELPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEHLPAR_PELPA	/;"	d
MCFGPIO_PEPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR	/;"	d
MCFGPIO_PEPAR_PEPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA0(/;"	d
MCFGPIO_PEPAR_PEPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA1(/;"	d
MCFGPIO_PEPAR_PEPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA2	/;"	d
MCFGPIO_PEPAR_PEPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA3	/;"	d
MCFGPIO_PEPAR_PEPA4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA4	/;"	d
MCFGPIO_PEPAR_PEPA5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA5	/;"	d
MCFGPIO_PEPAR_PEPA6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA6	/;"	d
MCFGPIO_PEPAR_PEPA7	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PEPAR_PEPA7	/;"	d
MCFGPIO_PFPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PFPAR	/;"	d
MCFGPIO_PFPAR_PFPA5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PFPAR_PFPA5	/;"	d
MCFGPIO_PFPAR_PFPA6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PFPAR_PFPA6	/;"	d
MCFGPIO_PFPAR_PFPA7	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PFPAR_PFPA7	/;"	d
MCFGPIO_PJPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR	/;"	d
MCFGPIO_PJPAR_PJPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA(/;"	d
MCFGPIO_PJPAR_PJPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA0	/;"	d
MCFGPIO_PJPAR_PJPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA1	/;"	d
MCFGPIO_PJPAR_PJPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA2	/;"	d
MCFGPIO_PJPAR_PJPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA3	/;"	d
MCFGPIO_PJPAR_PJPA4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA4	/;"	d
MCFGPIO_PJPAR_PJPA5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA5	/;"	d
MCFGPIO_PJPAR_PJPA6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA6	/;"	d
MCFGPIO_PJPAR_PJPA7	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PJPAR_PJPA7	/;"	d
MCFGPIO_PORT	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT(/;"	d
MCFGPIO_PORT0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT0	/;"	d
MCFGPIO_PORT1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT1	/;"	d
MCFGPIO_PORT2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT2	/;"	d
MCFGPIO_PORT3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT3	/;"	d
MCFGPIO_PORT4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT4	/;"	d
MCFGPIO_PORT5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT5	/;"	d
MCFGPIO_PORT6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT6	/;"	d
MCFGPIO_PORT7	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORT7	/;"	d
MCFGPIO_PORTA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTA	/;"	d
MCFGPIO_PORTAP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTAP	/;"	d
MCFGPIO_PORTAS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTAS	/;"	d
MCFGPIO_PORTASP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTASP	/;"	d
MCFGPIO_PORTB	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTB	/;"	d
MCFGPIO_PORTBP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTBP	/;"	d
MCFGPIO_PORTC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTC	/;"	d
MCFGPIO_PORTCP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTCP	/;"	d
MCFGPIO_PORTD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTD	/;"	d
MCFGPIO_PORTDD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTDD	/;"	d
MCFGPIO_PORTDDP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTDDP	/;"	d
MCFGPIO_PORTDP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTDP	/;"	d
MCFGPIO_PORTE	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTE	/;"	d
MCFGPIO_PORTEH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTEH	/;"	d
MCFGPIO_PORTEHP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTEHP	/;"	d
MCFGPIO_PORTEL	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTEL	/;"	d
MCFGPIO_PORTELP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTELP	/;"	d
MCFGPIO_PORTEP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTEP	/;"	d
MCFGPIO_PORTF	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTF	/;"	d
MCFGPIO_PORTFP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTFP	/;"	d
MCFGPIO_PORTG	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTG	/;"	d
MCFGPIO_PORTGP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTGP	/;"	d
MCFGPIO_PORTH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTH	/;"	d
MCFGPIO_PORTHP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTHP	/;"	d
MCFGPIO_PORTJ	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTJ	/;"	d
MCFGPIO_PORTJP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTJP	/;"	d
MCFGPIO_PORTQS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTQS	/;"	d
MCFGPIO_PORTQSP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTQSP	/;"	d
MCFGPIO_PORTSD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTSD	/;"	d
MCFGPIO_PORTSDP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTSDP	/;"	d
MCFGPIO_PORTTC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTTC	/;"	d
MCFGPIO_PORTTCP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTTCP	/;"	d
MCFGPIO_PORTTD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTTD	/;"	d
MCFGPIO_PORTTDP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTTDP	/;"	d
MCFGPIO_PORTUA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTUA	/;"	d
MCFGPIO_PORTUAP	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PORTUAP	/;"	d
MCFGPIO_PQSPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR	/;"	d
MCFGPIO_PQSPAR_PQSPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA(/;"	d
MCFGPIO_PQSPAR_PQSPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA0	/;"	d
MCFGPIO_PQSPAR_PQSPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA1	/;"	d
MCFGPIO_PQSPAR_PQSPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA2	/;"	d
MCFGPIO_PQSPAR_PQSPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA3	/;"	d
MCFGPIO_PQSPAR_PQSPA4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA4	/;"	d
MCFGPIO_PQSPAR_PQSPA5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA5	/;"	d
MCFGPIO_PQSPAR_PQSPA6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PQSPAR_PQSPA6	/;"	d
MCFGPIO_PSDPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PSDPAR	/;"	d
MCFGPIO_PSDPAR_PSDPA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PSDPAR_PSDPA	/;"	d
MCFGPIO_PTCPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTCPAR	/;"	d
MCFGPIO_PTCPAR_PTCPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTCPAR_PTCPA0(/;"	d
MCFGPIO_PTCPAR_PTCPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTCPAR_PTCPA1(/;"	d
MCFGPIO_PTCPAR_PTCPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTCPAR_PTCPA2(/;"	d
MCFGPIO_PTCPAR_PTCPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTCPAR_PTCPA3(/;"	d
MCFGPIO_PTDPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTDPAR	/;"	d
MCFGPIO_PTDPAR_PTDPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTDPAR_PTDPA0(/;"	d
MCFGPIO_PTDPAR_PTDPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTDPAR_PTDPA1(/;"	d
MCFGPIO_PTDPAR_PTDPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTDPAR_PTDPA2(/;"	d
MCFGPIO_PTDPAR_PTDPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PTDPAR_PTDPA3(/;"	d
MCFGPIO_PUAPAR	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PUAPAR	/;"	d
MCFGPIO_PUAPAR_PUAPA0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PUAPAR_PUAPA0	/;"	d
MCFGPIO_PUAPAR_PUAPA1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PUAPAR_PUAPA1	/;"	d
MCFGPIO_PUAPAR_PUAPA2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PUAPAR_PUAPA2	/;"	d
MCFGPIO_PUAPAR_PUAPA3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_PUAPAR_PUAPA3	/;"	d
MCFGPIO_Px	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px(/;"	d
MCFGPIO_Px0	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px0	/;"	d
MCFGPIO_Px1	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px1	/;"	d
MCFGPIO_Px2	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px2	/;"	d
MCFGPIO_Px3	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px3	/;"	d
MCFGPIO_Px4	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px4	/;"	d
MCFGPIO_Px5	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px5	/;"	d
MCFGPIO_Px6	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px6	/;"	d
MCFGPIO_Px7	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_Px7	/;"	d
MCFGPIO_SETA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETA	/;"	d
MCFGPIO_SETAS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETAS	/;"	d
MCFGPIO_SETB	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETB	/;"	d
MCFGPIO_SETC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETC	/;"	d
MCFGPIO_SETD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETD	/;"	d
MCFGPIO_SETDD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETDD	/;"	d
MCFGPIO_SETE	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETE	/;"	d
MCFGPIO_SETEH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETEH	/;"	d
MCFGPIO_SETEL	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETEL	/;"	d
MCFGPIO_SETF	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETF	/;"	d
MCFGPIO_SETG	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETG	/;"	d
MCFGPIO_SETH	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETH	/;"	d
MCFGPIO_SETJ	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETJ	/;"	d
MCFGPIO_SETQS	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETQS	/;"	d
MCFGPIO_SETSD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETSD	/;"	d
MCFGPIO_SETTC	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETTC	/;"	d
MCFGPIO_SETTD	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETTD	/;"	d
MCFGPIO_SETUA	arch/m68k/include/asm/m5282.h	/^#define MCFGPIO_SETUA	/;"	d
MCFGPTA_GPTC0	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTC0	/;"	d
MCFGPTA_GPTC1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTC1	/;"	d
MCFGPTA_GPTC2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTC2	/;"	d
MCFGPTA_GPTC3	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTC3	/;"	d
MCFGPTA_GPTCFORC	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTCFORC	/;"	d
MCFGPTA_GPTCNT	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTCNT	/;"	d
MCFGPTA_GPTCTL1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTCTL1	/;"	d
MCFGPTA_GPTCTL2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTCTL2	/;"	d
MCFGPTA_GPTDDR	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTDDR	/;"	d
MCFGPTA_GPTFLG1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTFLG1	/;"	d
MCFGPTA_GPTFLG2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTFLG2	/;"	d
MCFGPTA_GPTIE	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTIE	/;"	d
MCFGPTA_GPTIOS	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTIOS	/;"	d
MCFGPTA_GPTOC3D	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTOC3D	/;"	d
MCFGPTA_GPTOC3M	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTOC3M	/;"	d
MCFGPTA_GPTPACNT	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTPACNT	/;"	d
MCFGPTA_GPTPACTL	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTPACTL	/;"	d
MCFGPTA_GPTPAFLG	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTPAFLG	/;"	d
MCFGPTA_GPTPORT	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTPORT	/;"	d
MCFGPTA_GPTSCR1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTSCR1	/;"	d
MCFGPTA_GPTSCR2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTSCR2	/;"	d
MCFGPTA_GPTTOV	arch/m68k/include/asm/m5282.h	/^#define MCFGPTA_GPTTOV	/;"	d
MCFGPTB_GPTC0	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTC0	/;"	d
MCFGPTB_GPTC1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTC1	/;"	d
MCFGPTB_GPTC2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTC2	/;"	d
MCFGPTB_GPTC3	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTC3	/;"	d
MCFGPTB_GPTCFORC	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTCFORC	/;"	d
MCFGPTB_GPTCNT	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTCNT	/;"	d
MCFGPTB_GPTCTL1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTCTL1	/;"	d
MCFGPTB_GPTCTL2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTCTL2	/;"	d
MCFGPTB_GPTDDR	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTDDR	/;"	d
MCFGPTB_GPTFLG1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTFLG1	/;"	d
MCFGPTB_GPTFLG2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTFLG2	/;"	d
MCFGPTB_GPTIE	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTIE	/;"	d
MCFGPTB_GPTIOS	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTIOS	/;"	d
MCFGPTB_GPTOC3D	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTOC3D	/;"	d
MCFGPTB_GPTOC3M	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTOC3M	/;"	d
MCFGPTB_GPTPACNT	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTPACNT	/;"	d
MCFGPTB_GPTPACTL	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTPACTL	/;"	d
MCFGPTB_GPTPAFLG	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTPAFLG	/;"	d
MCFGPTB_GPTPORT	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTPORT	/;"	d
MCFGPTB_GPTSCR1	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTSCR1	/;"	d
MCFGPTB_GPTSCR2	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTSCR2	/;"	d
MCFGPTB_GPTTOV	arch/m68k/include/asm/m5282.h	/^#define MCFGPTB_GPTTOV	/;"	d
MCFGPT_GPTCFORC_FOC0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCFORC_FOC0	/;"	d
MCFGPT_GPTCFORC_FOC1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCFORC_FOC1	/;"	d
MCFGPT_GPTCFORC_FOC2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCFORC_FOC2	/;"	d
MCFGPT_GPTCFORC_FOC3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCFORC_FOC3	/;"	d
MCFGPT_GPTCTL2_EDG0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL2_EDG0(/;"	d
MCFGPT_GPTCTL2_EDG1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL2_EDG1(/;"	d
MCFGPT_GPTCTL2_EDG2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL2_EDG2(/;"	d
MCFGPT_GPTCTL2_EDG3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL2_EDG3(/;"	d
MCFGPT_GPTCTL_OMOL0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL_OMOL0(/;"	d
MCFGPT_GPTCTL_OMOL1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL_OMOL1(/;"	d
MCFGPT_GPTCTL_OMOL2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL_OMOL2(/;"	d
MCFGPT_GPTCTL_OMOL3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTCTL_OMOL3(/;"	d
MCFGPT_GPTDDR_DDRT0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTDDR_DDRT0	/;"	d
MCFGPT_GPTDDR_DDRT1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTDDR_DDRT1	/;"	d
MCFGPT_GPTDDR_DDRT2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTDDR_DDRT2	/;"	d
MCFGPT_GPTDDR_DDRT3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTDDR_DDRT3	/;"	d
MCFGPT_GPTFLG1_C0F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG1_C0F	/;"	d
MCFGPT_GPTFLG1_C1F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG1_C1F	/;"	d
MCFGPT_GPTFLG1_C2F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG1_C2F	/;"	d
MCFGPT_GPTFLG1_C3F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG1_C3F	/;"	d
MCFGPT_GPTFLG2_C0F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG2_C0F	/;"	d
MCFGPT_GPTFLG2_C1F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG2_C1F	/;"	d
MCFGPT_GPTFLG2_C2F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG2_C2F	/;"	d
MCFGPT_GPTFLG2_C3F	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG2_C3F	/;"	d
MCFGPT_GPTFLG2_TOF	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTFLG2_TOF	/;"	d
MCFGPT_GPTIE_C0I	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIE_C0I	/;"	d
MCFGPT_GPTIE_C1I	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIE_C1I	/;"	d
MCFGPT_GPTIE_C2I	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIE_C2I	/;"	d
MCFGPT_GPTIE_C3I	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIE_C3I	/;"	d
MCFGPT_GPTIOS_IOS0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIOS_IOS0	/;"	d
MCFGPT_GPTIOS_IOS1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIOS_IOS1	/;"	d
MCFGPT_GPTIOS_IOS2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIOS_IOS2	/;"	d
MCFGPT_GPTIOS_IOS3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTIOS_IOS3	/;"	d
MCFGPT_GPTOC3M_OC3D	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTOC3M_OC3D(/;"	d
MCFGPT_GPTOC3M_OC3M0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTOC3M_OC3M0	/;"	d
MCFGPT_GPTOC3M_OC3M1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTOC3M_OC3M1	/;"	d
MCFGPT_GPTOC3M_OC3M2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTOC3M_OC3M2	/;"	d
MCFGPT_GPTOC3M_OC3M3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTOC3M_OC3M3	/;"	d
MCFGPT_GPTPACTL_CLK	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_CLK(/;"	d
MCFGPT_GPTPACTL_CLK_PACLK	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_CLK_PACLK	/;"	d
MCFGPT_GPTPACTL_CLK_PACLK256	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_CLK_PACLK256	/;"	d
MCFGPT_GPTPACTL_CLK_PACLK65536	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_CLK_PACLK65536	/;"	d
MCFGPT_GPTPACTL_PAE	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_PAE	/;"	d
MCFGPT_GPTPACTL_PAI	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_PAI	/;"	d
MCFGPT_GPTPACTL_PAMOD	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_PAMOD	/;"	d
MCFGPT_GPTPACTL_PAOVI	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_PAOVI	/;"	d
MCFGPT_GPTPACTL_PEDGE	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPACTL_PEDGE	/;"	d
MCFGPT_GPTPAFLG_PAIF	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPAFLG_PAIF	/;"	d
MCFGPT_GPTPAFLG_PAOVF	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPAFLG_PAOVF	/;"	d
MCFGPT_GPTPORT_PORTT0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPORT_PORTT0	/;"	d
MCFGPT_GPTPORT_PORTT1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPORT_PORTT1	/;"	d
MCFGPT_GPTPORT_PORTT2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPORT_PORTT2	/;"	d
MCFGPT_GPTPORT_PORTT3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTPORT_PORTT3	/;"	d
MCFGPT_GPTSCR1_GPTEN	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR1_GPTEN	/;"	d
MCFGPT_GPTSCR1_TFFCA	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR1_TFFCA	/;"	d
MCFGPT_GPTSCR2_PR	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR2_PR(/;"	d
MCFGPT_GPTSCR2_PUPT	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR2_PUPT	/;"	d
MCFGPT_GPTSCR2_RDPT	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR2_RDPT	/;"	d
MCFGPT_GPTSCR2_TCRE	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR2_TCRE	/;"	d
MCFGPT_GPTSCR2_TOI	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTSCR2_TOI	/;"	d
MCFGPT_GPTTOV0	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTTOV0	/;"	d
MCFGPT_GPTTOV1	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTTOV1	/;"	d
MCFGPT_GPTTOV2	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTTOV2	/;"	d
MCFGPT_GPTTOV3	arch/m68k/include/asm/m5282.h	/^#define MCFGPT_GPTTOV3	/;"	d
MCFGR_ARCACHE_MASK	drivers/crypto/fsl/jr.h	/^#define MCFGR_ARCACHE_MASK	/;"	d
MCFGR_ARCACHE_SHIFT	drivers/crypto/fsl/jr.h	/^#define MCFGR_ARCACHE_SHIFT	/;"	d
MCFGR_AWCACHE_MASK	drivers/crypto/fsl/jr.h	/^#define MCFGR_AWCACHE_MASK	/;"	d
MCFGR_AWCACHE_SHIFT	drivers/crypto/fsl/jr.h	/^#define MCFGR_AWCACHE_SHIFT	/;"	d
MCFGR_AXIPIPE	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^#define MCFGR_AXIPIPE /;"	d	file:
MCFGR_DMA_RST	drivers/crypto/fsl/jr.h	/^#define MCFGR_DMA_RST /;"	d
MCFGR_PS_SHIFT	drivers/crypto/fsl/jr.h	/^#define MCFGR_PS_SHIFT /;"	d
MCFGR_SWRST	drivers/crypto/fsl/jr.h	/^#define MCFGR_SWRST /;"	d
MCFG_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define MCFG_BASE_ADDRESS	/;"	d
MCFG_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define MCFG_BASE_ADDRESS	/;"	d
MCFG_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define MCFG_BASE_ADDRESS	/;"	d
MCFG_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define MCFG_BASE_SIZE	/;"	d
MCFG_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define MCFG_BASE_SIZE	/;"	d
MCFG_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define MCFG_BASE_SIZE	/;"	d
MCFG_CLOCK_SELECT_DIV28	drivers/net/lpc32xx_eth.c	/^#define MCFG_CLOCK_SELECT_DIV28 /;"	d	file:
MCFG_RESET_MII_MGMT	drivers/net/lpc32xx_eth.c	/^#define MCFG_RESET_MII_MGMT /;"	d	file:
MCFPGA_DONE	board/gdsys/405ep/iocon.c	/^	MCFPGA_DONE = 1 << 0,$/;"	e	enum:__anon023d8a7b0903	file:
MCFPGA_DONE	board/gdsys/mpc8308/hrcon.c	/^	MCFPGA_DONE = 1 << 0,$/;"	e	enum:__anonc2f835a20103	file:
MCFPGA_DONE	board/gdsys/mpc8308/strider.c	/^	MCFPGA_DONE = 1 << 0,$/;"	e	enum:__anonafccc0650103	file:
MCFPGA_INIT_N	board/gdsys/405ep/iocon.c	/^	MCFPGA_INIT_N = 1 << 1,$/;"	e	enum:__anon023d8a7b0903	file:
MCFPGA_INIT_N	board/gdsys/mpc8308/hrcon.c	/^	MCFPGA_INIT_N = 1 << 1,$/;"	e	enum:__anonc2f835a20103	file:
MCFPGA_INIT_N	board/gdsys/mpc8308/strider.c	/^	MCFPGA_INIT_N = 1 << 1,$/;"	e	enum:__anonafccc0650103	file:
MCFPGA_PROGRAM_N	board/gdsys/405ep/iocon.c	/^	MCFPGA_PROGRAM_N = 1 << 2,$/;"	e	enum:__anon023d8a7b0903	file:
MCFPGA_PROGRAM_N	board/gdsys/mpc8308/hrcon.c	/^	MCFPGA_PROGRAM_N = 1 << 2,$/;"	e	enum:__anonc2f835a20103	file:
MCFPGA_PROGRAM_N	board/gdsys/mpc8308/strider.c	/^	MCFPGA_PROGRAM_N = 1 << 2,$/;"	e	enum:__anonafccc0650103	file:
MCFPGA_RESET_N	board/gdsys/405ep/iocon.c	/^	MCFPGA_RESET_N = 1 << 4,$/;"	e	enum:__anon023d8a7b0903	file:
MCFPGA_RESET_N	board/gdsys/mpc8308/hrcon.c	/^	MCFPGA_RESET_N = 1 << 4,$/;"	e	enum:__anonc2f835a20103	file:
MCFPGA_RESET_N	board/gdsys/mpc8308/strider.c	/^	MCFPGA_RESET_N = 1 << 4,$/;"	e	enum:__anonafccc0650103	file:
MCFPGA_UPDATE_ENABLE_N	board/gdsys/405ep/iocon.c	/^	MCFPGA_UPDATE_ENABLE_N = 1 << 3,$/;"	e	enum:__anon023d8a7b0903	file:
MCFPGA_UPDATE_ENABLE_N	board/gdsys/mpc8308/hrcon.c	/^	MCFPGA_UPDATE_ENABLE_N = 1 << 3,$/;"	e	enum:__anonc2f835a20103	file:
MCFPGA_UPDATE_ENABLE_N	board/gdsys/mpc8308/strider.c	/^	MCFPGA_UPDATE_ENABLE_N = 1 << 3,$/;"	e	enum:__anonafccc0650103	file:
MCFRESET_RCR	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR	/;"	d
MCFRESET_RCR_FRCRSTOUT	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR_FRCRSTOUT	/;"	d
MCFRESET_RCR_LVDE	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR_LVDE	/;"	d
MCFRESET_RCR_LVDF	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR_LVDF	/;"	d
MCFRESET_RCR_LVDIE	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR_LVDIE	/;"	d
MCFRESET_RCR_LVDRE	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR_LVDRE	/;"	d
MCFRESET_RCR_SOFTRST	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RCR_SOFTRST	/;"	d
MCFRESET_RSR	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR	/;"	d
MCFRESET_RSR_ALL	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_ALL	/;"	d
MCFRESET_RSR_EXT	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_EXT	/;"	d
MCFRESET_RSR_LOC	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_LOC	/;"	d
MCFRESET_RSR_LOL	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_LOL	/;"	d
MCFRESET_RSR_LVD	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_LVD	/;"	d
MCFRESET_RSR_POR	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_POR	/;"	d
MCFRESET_RSR_SOFT	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_SOFT	/;"	d
MCFRESET_RSR_WDR	arch/m68k/include/asm/m5282.h	/^#define MCFRESET_RSR_WDR	/;"	d
MCFSCM_CRSR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_CRSR	/;"	d
MCFSCM_CRSR_CWDR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_CRSR_CWDR	/;"	d
MCFSCM_CRSR_EXT	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_CRSR_EXT	/;"	d
MCFSCM_CWCR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_CWCR	/;"	d
MCFSCM_CWSR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_CWSR	/;"	d
MCFSCM_GPACR0	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_GPACR0	/;"	d
MCFSCM_GPACR1	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_GPACR1	/;"	d
MCFSCM_LPICR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_LPICR	/;"	d
MCFSCM_MPARK	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_MPARK	/;"	d
MCFSCM_MPR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_MPR	/;"	d
MCFSCM_PACR0	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR0	/;"	d
MCFSCM_PACR1	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR1	/;"	d
MCFSCM_PACR2	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR2	/;"	d
MCFSCM_PACR3	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR3	/;"	d
MCFSCM_PACR4	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR4	/;"	d
MCFSCM_PACR5	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR5	/;"	d
MCFSCM_PACR6	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR6	/;"	d
MCFSCM_PACR7	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR7	/;"	d
MCFSCM_PACR8	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_PACR8	/;"	d
MCFSCM_RAMBAR	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_RAMBAR	/;"	d
MCFSCM_RAMBAR_BA	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_RAMBAR_BA(/;"	d
MCFSCM_RAMBAR_BDE	arch/m68k/include/asm/m5282.h	/^#define MCFSCM_RAMBAR_BDE	/;"	d
MCFSDRAMC_DACR0	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR0	/;"	d
MCFSDRAMC_DACR1	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR1	/;"	d
MCFSDRAMC_DACR_BASE	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_BASE(/;"	d
MCFSDRAMC_DACR_CASL	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_CASL(/;"	d
MCFSDRAMC_DACR_CBM	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_CBM(/;"	d
MCFSDRAMC_DACR_IMRS	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_IMRS	/;"	d
MCFSDRAMC_DACR_IP	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_IP	/;"	d
MCFSDRAMC_DACR_PS_16	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_PS_16	/;"	d
MCFSDRAMC_DACR_PS_32	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_PS_32	/;"	d
MCFSDRAMC_DACR_PS_8	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_PS_8	/;"	d
MCFSDRAMC_DACR_RE	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DACR_RE	/;"	d
MCFSDRAMC_DCR	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR	/;"	d
MCFSDRAMC_DCR_COC	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_COC	/;"	d
MCFSDRAMC_DCR_IS	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_IS	/;"	d
MCFSDRAMC_DCR_NAM	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_NAM	/;"	d
MCFSDRAMC_DCR_RC	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_RC(/;"	d
MCFSDRAMC_DCR_RTIM_3	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_RTIM_3	/;"	d
MCFSDRAMC_DCR_RTIM_6	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_RTIM_6	/;"	d
MCFSDRAMC_DCR_RTIM_9	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DCR_RTIM_9	/;"	d
MCFSDRAMC_DMR0	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR0	/;"	d
MCFSDRAMC_DMR1	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR1	/;"	d
MCFSDRAMC_DMR_AM	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_AM	/;"	d
MCFSDRAMC_DMR_BAM_16M	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_BAM_16M	/;"	d
MCFSDRAMC_DMR_CI	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_CI	/;"	d
MCFSDRAMC_DMR_SC	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_SC	/;"	d
MCFSDRAMC_DMR_SD	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_SD	/;"	d
MCFSDRAMC_DMR_UC	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_UC	/;"	d
MCFSDRAMC_DMR_UD	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_UD	/;"	d
MCFSDRAMC_DMR_V	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_V	/;"	d
MCFSDRAMC_DMR_WP	arch/m68k/include/asm/m5282.h	/^#define MCFSDRAMC_DMR_WP	/;"	d
MCFSIM_DACR0	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_DACR0	/;"	d
MCFSIM_DACR1	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_DACR1	/;"	d
MCFSIM_DCR	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_DCR	/;"	d
MCFSIM_DMR0	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_DMR0	/;"	d
MCFSIM_DMR1	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_DMR1	/;"	d
MCFSIM_GPIO1_EN	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO1_EN	/;"	d
MCFSIM_GPIO1_FUNC	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO1_FUNC	/;"	d
MCFSIM_GPIO1_OUT	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO1_OUT	/;"	d
MCFSIM_GPIO1_READ	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO1_READ	/;"	d
MCFSIM_GPIO_EN	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_EN	/;"	d
MCFSIM_GPIO_FUNC	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_FUNC	/;"	d
MCFSIM_GPIO_INT_CLEAR	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_INT_CLEAR	/;"	d
MCFSIM_GPIO_INT_EN	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_INT_EN	/;"	d
MCFSIM_GPIO_INT_STAT	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_INT_STAT	/;"	d
MCFSIM_GPIO_OUT	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_OUT	/;"	d
MCFSIM_GPIO_READ	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_GPIO_READ	/;"	d
MCFSIM_I2CICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_I2CICR	/;"	d
MCFSIM_ICR0	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR0	/;"	d
MCFSIM_ICR1	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR1	/;"	d
MCFSIM_ICR1	arch/m68k/include/asm/m5271.h	/^#define MCFSIM_ICR1	/;"	d
MCFSIM_ICR10	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR10	/;"	d
MCFSIM_ICR11	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR11	/;"	d
MCFSIM_ICR2	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR2	/;"	d
MCFSIM_ICR3	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR3	/;"	d
MCFSIM_ICR4	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR4	/;"	d
MCFSIM_ICR5	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR5	/;"	d
MCFSIM_ICR6	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR6	/;"	d
MCFSIM_ICR7	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR7	/;"	d
MCFSIM_ICR8	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR8	/;"	d
MCFSIM_ICR9	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR9	/;"	d
MCFSIM_ICR_AUTOVEC	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_AUTOVEC	/;"	d
MCFSIM_ICR_AUTOVEC	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_AUTOVEC	/;"	d
MCFSIM_ICR_LEVEL0	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL0	/;"	d
MCFSIM_ICR_LEVEL0	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL0	/;"	d
MCFSIM_ICR_LEVEL1	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL1	/;"	d
MCFSIM_ICR_LEVEL1	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL1	/;"	d
MCFSIM_ICR_LEVEL2	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL2	/;"	d
MCFSIM_ICR_LEVEL2	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL2	/;"	d
MCFSIM_ICR_LEVEL3	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL3	/;"	d
MCFSIM_ICR_LEVEL3	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL3	/;"	d
MCFSIM_ICR_LEVEL4	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL4	/;"	d
MCFSIM_ICR_LEVEL4	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL4	/;"	d
MCFSIM_ICR_LEVEL5	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL5	/;"	d
MCFSIM_ICR_LEVEL5	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL5	/;"	d
MCFSIM_ICR_LEVEL6	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL6	/;"	d
MCFSIM_ICR_LEVEL6	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL6	/;"	d
MCFSIM_ICR_LEVEL7	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_LEVEL7	/;"	d
MCFSIM_ICR_LEVEL7	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_LEVEL7	/;"	d
MCFSIM_ICR_PRI0	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_PRI0	/;"	d
MCFSIM_ICR_PRI0	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_PRI0	/;"	d
MCFSIM_ICR_PRI1	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_PRI1	/;"	d
MCFSIM_ICR_PRI1	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_PRI1	/;"	d
MCFSIM_ICR_PRI2	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_PRI2	/;"	d
MCFSIM_ICR_PRI2	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_PRI2	/;"	d
MCFSIM_ICR_PRI3	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_ICR_PRI3	/;"	d
MCFSIM_ICR_PRI3	arch/m68k/include/asm/m5307.h	/^#define	MCFSIM_ICR_PRI3	/;"	d
MCFSIM_IDECONFIG1	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_IDECONFIG1	/;"	d
MCFSIM_IDECONFIG2	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_IDECONFIG2	/;"	d
MCFSIM_IMR	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_IMR	/;"	d
MCFSIM_INTBASE	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTBASE	/;"	d
MCFSIM_INTLEV1	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV1	/;"	d
MCFSIM_INTLEV2	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV2	/;"	d
MCFSIM_INTLEV3	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV3	/;"	d
MCFSIM_INTLEV4	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV4	/;"	d
MCFSIM_INTLEV5	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV5	/;"	d
MCFSIM_INTLEV6	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV6	/;"	d
MCFSIM_INTLEV7	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV7	/;"	d
MCFSIM_INTLEV8	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INTLEV8	/;"	d
MCFSIM_INT_CLEAR3	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INT_CLEAR3	/;"	d
MCFSIM_INT_EN3	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INT_EN3	/;"	d
MCFSIM_INT_STAT3	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_INT_STAT3	/;"	d
MCFSIM_IPR	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_IPR	/;"	d
MCFSIM_MPARK	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_MPARK	/;"	d
MCFSIM_PLLCR	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_PLLCR	/;"	d
MCFSIM_QSPIICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_QSPIICR	/;"	d
MCFSIM_RSR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_RSR	/;"	d
MCFSIM_SDCR	arch/m68k/include/asm/m5275.h	/^#define MCFSIM_SDCR	/;"	d
MCFSIM_SIMR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_SIMR	/;"	d
MCFSIM_SPURVEC	arch/m68k/include/asm/m5249.h	/^#define MCFSIM_SPURVEC	/;"	d
MCFSIM_SWDICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_SWDICR	/;"	d
MCFSIM_SWIVR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_SWIVR	/;"	d
MCFSIM_SWSR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_SWSR	/;"	d
MCFSIM_SYPCR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_SYPCR	/;"	d
MCFSIM_TIMER1ICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_TIMER1ICR	/;"	d
MCFSIM_TIMER2ICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_TIMER2ICR	/;"	d
MCFSIM_UART1ICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_UART1ICR	/;"	d
MCFSIM_UART2ICR	arch/m68k/include/asm/m5249.h	/^#define	MCFSIM_UART2ICR	/;"	d
MCFSIM_WRRR	arch/m68k/include/asm/m5275.h	/^#define MCFSIM_WRRR	/;"	d
MCFWTM_WCNTR	arch/m68k/include/asm/m5282.h	/^#define MCFWTM_WCNTR	/;"	d
MCFWTM_WCR	arch/m68k/include/asm/m5282.h	/^#define MCFWTM_WCR	/;"	d
MCFWTM_WMR	arch/m68k/include/asm/m5282.h	/^#define MCFWTM_WMR	/;"	d
MCFWTM_WSR	arch/m68k/include/asm/m5282.h	/^#define MCFWTM_WSR	/;"	d
MCF_CCM_CIR	arch/m68k/include/asm/m5271.h	/^#define MCF_CCM_CIR	/;"	d
MCF_CCM_CIR_PIN_LEN	arch/m68k/include/asm/m5271.h	/^#define MCF_CCM_CIR_PIN_LEN	/;"	d
MCF_CCM_CIR_PIN_MCF5270	arch/m68k/include/asm/m5271.h	/^#define MCF_CCM_CIR_PIN_MCF5270	/;"	d
MCF_CCM_CIR_PIN_MCF5271	arch/m68k/include/asm/m5271.h	/^#define MCF_CCM_CIR_PIN_MCF5271	/;"	d
MCF_CCM_CIR_PRN_MASK	arch/m68k/include/asm/m5271.h	/^#define MCF_CCM_CIR_PRN_MASK	/;"	d
MCF_DCSR_FEC12C	arch/m68k/include/asm/m5271.h	/^#define MCF_DCSR_FEC12C /;"	d
MCF_DCSR_QSPI	arch/m68k/include/asm/m5271.h	/^#define MCF_DCSR_QSPI	/;"	d
MCF_DCSR_TIMER	arch/m68k/include/asm/m5271.h	/^#define MCF_DCSR_TIMER	/;"	d
MCF_DCSR_UART	arch/m68k/include/asm/m5271.h	/^#define MCF_DCSR_UART	/;"	d
MCF_DSCR_EIM	arch/m68k/include/asm/m5271.h	/^#define MCF_DSCR_EIM	/;"	d
MCF_FMPLL_SYNCR	arch/m68k/include/asm/m5271.h	/^#define MCF_FMPLL_SYNCR	/;"	d
MCF_FMPLL_SYNCR_MFD	arch/m68k/include/asm/m5271.h	/^#define MCF_FMPLL_SYNCR_MFD(/;"	d
MCF_FMPLL_SYNCR_RFD	arch/m68k/include/asm/m5271.h	/^#define MCF_FMPLL_SYNCR_RFD(/;"	d
MCF_FMPLL_SYNSR	arch/m68k/include/asm/m5271.h	/^#define MCF_FMPLL_SYNSR	/;"	d
MCF_FMPLL_SYNSR_LOCK	arch/m68k/include/asm/m5271.h	/^#define MCF_FMPLL_SYNSR_LOCK	/;"	d
MCF_GPIO_AD_ADDR21	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_AD_ADDR21	/;"	d
MCF_GPIO_AD_ADDR22	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_AD_ADDR22	/;"	d
MCF_GPIO_AD_ADDR23	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_AD_ADDR23	/;"	d
MCF_GPIO_AD_DATAL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_AD_DATAL	/;"	d
MCF_GPIO_AD_MASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_AD_MASK	/;"	d
MCF_GPIO_PAR_AD	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_AD	/;"	d
MCF_GPIO_PAR_BS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_BS	/;"	d
MCF_GPIO_PAR_BUSCTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_BUSCTL	/;"	d
MCF_GPIO_PAR_CS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_CS	/;"	d
MCF_GPIO_PAR_CS_PAR_CS2	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_CS_PAR_CS2	/;"	d
MCF_GPIO_PAR_FECI2C	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_FECI2C	/;"	d
MCF_GPIO_PAR_FECI2C	arch/m68k/include/asm/m5275.h	/^#define MCF_GPIO_PAR_FECI2C	/;"	d
MCF_GPIO_PAR_QSPI	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI	/;"	d
MCF_GPIO_PAR_QSPI_PCS0_GPIO	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS0_GPIO	/;"	d
MCF_GPIO_PAR_QSPI_PCS0_PCS0	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS0_PCS0	/;"	d
MCF_GPIO_PAR_QSPI_PCS0_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS0_UNMASK	/;"	d
MCF_GPIO_PAR_QSPI_PCS1_GPIO	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS1_GPIO	/;"	d
MCF_GPIO_PAR_QSPI_PCS1_PCS1	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS1_PCS1	/;"	d
MCF_GPIO_PAR_QSPI_PCS1_SDRAM_SCKE	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS1_SDRAM_SCKE	/;"	d
MCF_GPIO_PAR_QSPI_PCS1_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_PCS1_UNMASK	/;"	d
MCF_GPIO_PAR_QSPI_SCK_GPIO	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SCK_GPIO	/;"	d
MCF_GPIO_PAR_QSPI_SCK_I2C_SCL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SCK_I2C_SCL	/;"	d
MCF_GPIO_PAR_QSPI_SCK_SCK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SCK_SCK	/;"	d
MCF_GPIO_PAR_QSPI_SCK_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SCK_UNMASK	/;"	d
MCF_GPIO_PAR_QSPI_SIN_GPIO	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SIN_GPIO	/;"	d
MCF_GPIO_PAR_QSPI_SIN_I2C_SDA	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SIN_I2C_SDA	/;"	d
MCF_GPIO_PAR_QSPI_SIN_SIN	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SIN_SIN	/;"	d
MCF_GPIO_PAR_QSPI_SIN_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SIN_UNMASK	/;"	d
MCF_GPIO_PAR_QSPI_SOUT_GPIO	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SOUT_GPIO	/;"	d
MCF_GPIO_PAR_QSPI_SOUT_SOUT	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SOUT_SOUT	/;"	d
MCF_GPIO_PAR_QSPI_SOUT_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_QSPI_SOUT_UNMASK	/;"	d
MCF_GPIO_PAR_SDRAM	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_SDRAM	/;"	d
MCF_GPIO_PAR_SDRAM_PAR_CSSDCS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(/;"	d
MCF_GPIO_PAR_TIMER	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_TIMER	/;"	d
MCF_GPIO_PAR_TIMER_T3IN_QSPI_PCS2	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_TIMER_T3IN_QSPI_PCS2	/;"	d
MCF_GPIO_PAR_TIMER_T3IN_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_TIMER_T3IN_UNMASK	/;"	d
MCF_GPIO_PAR_TIMER_T3OUT_QSPI_PCS3	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_TIMER_T3OUT_QSPI_PCS3	/;"	d
MCF_GPIO_PAR_TIMER_T3OUT_UNMASK	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_TIMER_T3OUT_UNMASK	/;"	d
MCF_GPIO_PAR_UART	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART	/;"	d
MCF_GPIO_PAR_UART	arch/m68k/include/asm/m5275.h	/^#define MCF_GPIO_PAR_UART	/;"	d
MCF_GPIO_PAR_UART_U0CTS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART_U0CTS	/;"	d
MCF_GPIO_PAR_UART_U0RTS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART_U0RTS	/;"	d
MCF_GPIO_PAR_UART_U0RXD	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART_U0RXD	/;"	d
MCF_GPIO_PAR_UART_U0TXD	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART_U0TXD	/;"	d
MCF_GPIO_PAR_UART_U1RXD_UART1	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART_U1RXD_UART1	/;"	d
MCF_GPIO_PAR_UART_U1TXD_UART1	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PAR_UART_U1TXD_UART1	/;"	d
MCF_GPIO_PCLRR_ADDR	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_ADDR	/;"	d
MCF_GPIO_PCLRR_BS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_BS	/;"	d
MCF_GPIO_PCLRR_BUSCTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_BUSCTL	/;"	d
MCF_GPIO_PCLRR_CS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_CS	/;"	d
MCF_GPIO_PCLRR_DATAH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_DATAH	/;"	d
MCF_GPIO_PCLRR_DATAL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_DATAL	/;"	d
MCF_GPIO_PCLRR_FECI2C	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_FECI2C	/;"	d
MCF_GPIO_PCLRR_QSPI	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_QSPI	/;"	d
MCF_GPIO_PCLRR_SDRAM	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_SDRAM	/;"	d
MCF_GPIO_PCLRR_TIMER	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_TIMER	/;"	d
MCF_GPIO_PCLRR_UARTH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_UARTH	/;"	d
MCF_GPIO_PCLRR_UARTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PCLRR_UARTL	/;"	d
MCF_GPIO_PDDR_ADDR	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_ADDR	/;"	d
MCF_GPIO_PDDR_BS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_BS	/;"	d
MCF_GPIO_PDDR_BUSCTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_BUSCTL	/;"	d
MCF_GPIO_PDDR_CS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_CS	/;"	d
MCF_GPIO_PDDR_DATAH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_DATAH	/;"	d
MCF_GPIO_PDDR_DATAL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_DATAL	/;"	d
MCF_GPIO_PDDR_FECI2C	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_FECI2C	/;"	d
MCF_GPIO_PDDR_QSPI	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_QSPI	/;"	d
MCF_GPIO_PDDR_SDRAM	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_SDRAM	/;"	d
MCF_GPIO_PDDR_TIMER	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_TIMER	/;"	d
MCF_GPIO_PDDR_UARTH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_UARTH	/;"	d
MCF_GPIO_PDDR_UARTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PDDR_UARTL	/;"	d
MCF_GPIO_PODR_ADDR	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_ADDR	/;"	d
MCF_GPIO_PODR_BS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_BS	/;"	d
MCF_GPIO_PODR_BUSCTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_BUSCTL	/;"	d
MCF_GPIO_PODR_CS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_CS	/;"	d
MCF_GPIO_PODR_DATAH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_DATAH	/;"	d
MCF_GPIO_PODR_DATAL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_DATAL	/;"	d
MCF_GPIO_PODR_FECI2C	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_FECI2C	/;"	d
MCF_GPIO_PODR_QSPI	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_QSPI	/;"	d
MCF_GPIO_PODR_SDRAM	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_SDRAM	/;"	d
MCF_GPIO_PODR_TIMER	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_TIMER	/;"	d
MCF_GPIO_PODR_UARTH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_UARTH	/;"	d
MCF_GPIO_PODR_UARTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PODR_UARTL	/;"	d
MCF_GPIO_PPDSDR_ADDR	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_ADDR	/;"	d
MCF_GPIO_PPDSDR_BS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_BS	/;"	d
MCF_GPIO_PPDSDR_BUSCTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_BUSCTL	/;"	d
MCF_GPIO_PPDSDR_CS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_CS	/;"	d
MCF_GPIO_PPDSDR_DATAH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_DATAH	/;"	d
MCF_GPIO_PPDSDR_DATAL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_DATAL	/;"	d
MCF_GPIO_PPDSDR_FECI2C	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_FECI2C	/;"	d
MCF_GPIO_PPDSDR_QSPI	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_QSPI	/;"	d
MCF_GPIO_PPDSDR_SDRAM	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_SDRAM	/;"	d
MCF_GPIO_PPDSDR_TIMER	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_TIMER	/;"	d
MCF_GPIO_PPDSDR_UARTH	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_UARTH	/;"	d
MCF_GPIO_PPDSDR_UARTL	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_PPDSDR_UARTL	/;"	d
MCF_GPIO_SDRAM_CSSDCS_00	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_CSSDCS_00	/;"	d
MCF_GPIO_SDRAM_CSSDCS_01	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_CSSDCS_01	/;"	d
MCF_GPIO_SDRAM_CSSDCS_10	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_CSSDCS_10	/;"	d
MCF_GPIO_SDRAM_CSSDCS_11	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_CSSDCS_11	/;"	d
MCF_GPIO_SDRAM_SCAS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SCAS	/;"	d
MCF_GPIO_SDRAM_SCKE	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SCKE	/;"	d
MCF_GPIO_SDRAM_SDCS_00	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SDCS_00	/;"	d
MCF_GPIO_SDRAM_SDCS_01	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SDCS_01	/;"	d
MCF_GPIO_SDRAM_SDCS_10	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SDCS_10	/;"	d
MCF_GPIO_SDRAM_SDCS_11	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SDCS_11	/;"	d
MCF_GPIO_SDRAM_SDWE	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SDWE	/;"	d
MCF_GPIO_SDRAM_SRAS	arch/m68k/include/asm/m5271.h	/^#define MCF_GPIO_SDRAM_SRAS	/;"	d
MCF_RCM_RCR	arch/m68k/include/asm/m5271.h	/^#define MCF_RCM_RCR	/;"	d
MCF_RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5271.h	/^#define MCF_RCM_RCR_FRCRSTOUT	/;"	d
MCF_RCM_RCR_SOFTRST	arch/m68k/include/asm/m5271.h	/^#define MCF_RCM_RCR_SOFTRST	/;"	d
MCF_SDRAMC_DACR0	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACR0	/;"	d
MCF_SDRAMC_DACRn_BA	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_BA(/;"	d
MCF_SDRAMC_DACRn_CASL	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_CASL(/;"	d
MCF_SDRAMC_DACRn_CBM	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_CBM(/;"	d
MCF_SDRAMC_DACRn_IP	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_IP	/;"	d
MCF_SDRAMC_DACRn_MRS	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_MRS	/;"	d
MCF_SDRAMC_DACRn_PS	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_PS(/;"	d
MCF_SDRAMC_DACRn_RE	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DACRn_RE	/;"	d
MCF_SDRAMC_DCR	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DCR	/;"	d
MCF_SDRAMC_DCR_COC	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DCR_COC	/;"	d
MCF_SDRAMC_DCR_IS	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DCR_IS	/;"	d
MCF_SDRAMC_DCR_NAM	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DCR_NAM	/;"	d
MCF_SDRAMC_DCR_RC	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DCR_RC(/;"	d
MCF_SDRAMC_DCR_RTIM	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DCR_RTIM(/;"	d
MCF_SDRAMC_DMR0	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DMR0	/;"	d
MCF_SDRAMC_DMRn_BAM_16M	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DMRn_BAM_16M	/;"	d
MCF_SDRAMC_DMRn_BAM_8M	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DMRn_BAM_8M	/;"	d
MCF_SDRAMC_DMRn_V	arch/m68k/include/asm/m5271.h	/^#define MCF_SDRAMC_DMRn_V	/;"	d
MCF_SDRAMC_SDBAR0	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDBAR0	/;"	d
MCF_SDRAMC_SDBAR1	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDBAR1	/;"	d
MCF_SDRAMC_SDBARn_BA	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDBARn_BA(/;"	d
MCF_SDRAMC_SDBARn_BASE	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDBARn_BASE(/;"	d
MCF_SDRAMC_SDCFG1	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1	/;"	d
MCF_SDRAMC_SDCFG1_ACT2RW	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_ACT2RW(/;"	d
MCF_SDRAMC_SDCFG1_PRE2ACT	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_PRE2ACT(/;"	d
MCF_SDRAMC_SDCFG1_RDLAT	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_RDLAT(/;"	d
MCF_SDRAMC_SDCFG1_REF2ACT	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_REF2ACT(/;"	d
MCF_SDRAMC_SDCFG1_SRD2RW	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_SRD2RW(/;"	d
MCF_SDRAMC_SDCFG1_SWT2RD	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_SWT2RD(/;"	d
MCF_SDRAMC_SDCFG1_WTLAT	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG1_WTLAT(/;"	d
MCF_SDRAMC_SDCFG2	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG2	/;"	d
MCF_SDRAMC_SDCFG2_BL	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG2_BL(/;"	d
MCF_SDRAMC_SDCFG2_BRD2PRE	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG2_BRD2PRE(/;"	d
MCF_SDRAMC_SDCFG2_BRD2WT	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG2_BRD2WT(/;"	d
MCF_SDRAMC_SDCFG2_BWT2RW	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCFG2_BWT2RW(/;"	d
MCF_SDRAMC_SDCR	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR	/;"	d
MCF_SDRAMC_SDCR_CKE	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_CKE	/;"	d
MCF_SDRAMC_SDCR_DQP_BP	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_DQP_BP	/;"	d
MCF_SDRAMC_SDCR_DQS_OE	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_DQS_OE(/;"	d
MCF_SDRAMC_SDCR_IPALL	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_IPALL	/;"	d
MCF_SDRAMC_SDCR_IREF	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_IREF	/;"	d
MCF_SDRAMC_SDCR_MODE_EN	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_MODE_EN	/;"	d
MCF_SDRAMC_SDCR_MUX	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_MUX(/;"	d
MCF_SDRAMC_SDCR_RCNT	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_RCNT(/;"	d
MCF_SDRAMC_SDCR_REF	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDCR_REF	/;"	d
MCF_SDRAMC_SDMR	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR	/;"	d
MCF_SDRAMC_SDMR0	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR0	/;"	d
MCF_SDRAMC_SDMR1	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR1	/;"	d
MCF_SDRAMC_SDMR_AD	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR_AD(/;"	d
MCF_SDRAMC_SDMR_BNKAD	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR_BNKAD(/;"	d
MCF_SDRAMC_SDMR_BNKAD_LEMR	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR_BNKAD_LEMR	/;"	d
MCF_SDRAMC_SDMR_BNKAD_LMR	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR_BNKAD_LMR	/;"	d
MCF_SDRAMC_SDMR_CMD	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMR_CMD	/;"	d
MCF_SDRAMC_SDMRn_BAM_1024K	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_1024K	/;"	d
MCF_SDRAMC_SDMRn_BAM_1024M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_1024M	/;"	d
MCF_SDRAMC_SDMRn_BAM_128K	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_128K	/;"	d
MCF_SDRAMC_SDMRn_BAM_128M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_128M	/;"	d
MCF_SDRAMC_SDMRn_BAM_16M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_16M	/;"	d
MCF_SDRAMC_SDMRn_BAM_1G	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_1G	/;"	d
MCF_SDRAMC_SDMRn_BAM_1M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_1M	/;"	d
MCF_SDRAMC_SDMRn_BAM_256K	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_256K	/;"	d
MCF_SDRAMC_SDMRn_BAM_256M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_256M	/;"	d
MCF_SDRAMC_SDMRn_BAM_2G	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_2G	/;"	d
MCF_SDRAMC_SDMRn_BAM_2M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_2M	/;"	d
MCF_SDRAMC_SDMRn_BAM_32M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_32M	/;"	d
MCF_SDRAMC_SDMRn_BAM_4G	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_4G	/;"	d
MCF_SDRAMC_SDMRn_BAM_4M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_4M	/;"	d
MCF_SDRAMC_SDMRn_BAM_512K	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_512K	/;"	d
MCF_SDRAMC_SDMRn_BAM_512M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_512M	/;"	d
MCF_SDRAMC_SDMRn_BAM_64K	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_64K	/;"	d
MCF_SDRAMC_SDMRn_BAM_64M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_64M	/;"	d
MCF_SDRAMC_SDMRn_BAM_8M	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_BAM_8M	/;"	d
MCF_SDRAMC_SDMRn_MASK	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_MASK(/;"	d
MCF_SDRAMC_SDMRn_V	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_V	/;"	d
MCF_SDRAMC_SDMRn_WP	arch/m68k/include/asm/m5275.h	/^#define MCF_SDRAMC_SDMRn_WP	/;"	d
MCF_SYNCR_MFD_10X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_10X	/;"	d
MCF_SYNCR_MFD_12X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_12X	/;"	d
MCF_SYNCR_MFD_14X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_14X	/;"	d
MCF_SYNCR_MFD_16X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_16X	/;"	d
MCF_SYNCR_MFD_18X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_18X	/;"	d
MCF_SYNCR_MFD_4X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_4X	/;"	d
MCF_SYNCR_MFD_6X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_6X	/;"	d
MCF_SYNCR_MFD_8X	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_MFD_8X	/;"	d
MCF_SYNCR_RFD_DIV1	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV1	/;"	d
MCF_SYNCR_RFD_DIV128	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV128	/;"	d
MCF_SYNCR_RFD_DIV16	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV16	/;"	d
MCF_SYNCR_RFD_DIV2	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV2	/;"	d
MCF_SYNCR_RFD_DIV32	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV32	/;"	d
MCF_SYNCR_RFD_DIV4	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV4	/;"	d
MCF_SYNCR_RFD_DIV64	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV64	/;"	d
MCF_SYNCR_RFD_DIV8	arch/m68k/include/asm/m5271.h	/^#define MCF_SYNCR_RFD_DIV8	/;"	d
MCF_WTM_WCNTR	arch/m68k/include/asm/m5271.h	/^#define MCF_WTM_WCNTR	/;"	d
MCF_WTM_WCR	arch/m68k/include/asm/m5271.h	/^#define MCF_WTM_WCR	/;"	d
MCF_WTM_WCR_EN	arch/m68k/include/asm/m5271.h	/^#define MCF_WTM_WCR_EN	/;"	d
MCF_WTM_WSR	arch/m68k/include/asm/m5271.h	/^#define MCF_WTM_WSR	/;"	d
MCHBAR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define MCHBAR	/;"	d
MCHBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define MCHBAR	/;"	d
MCHBAR_PEI_VERSION	arch/x86/include/asm/arch-broadwell/pch.h	/^#define MCHBAR_PEI_VERSION	/;"	d
MCHBAR_PEI_VERSION	arch/x86/include/asm/intel_regs.h	/^#define MCHBAR_PEI_VERSION	/;"	d
MCHBAR_PEI_VERSION	arch/x86/include/asm/me_common.h	/^#define MCHBAR_PEI_VERSION	/;"	d
MCHBAR_REG	arch/x86/include/asm/intel_regs.h	/^#define MCHBAR_REG(/;"	d
MCH_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define MCH_BASE_ADDRESS	/;"	d
MCH_BASE_ADDRESS	arch/x86/include/asm/intel_regs.h	/^#define MCH_BASE_ADDRESS	/;"	d
MCH_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define MCH_BASE_SIZE	/;"	d
MCH_BASE_SIZE	arch/x86/include/asm/intel_regs.h	/^#define MCH_BASE_SIZE	/;"	d
MCH_DDR_POWER_LIMIT_HI	arch/x86/include/asm/intel_regs.h	/^#define MCH_DDR_POWER_LIMIT_HI	/;"	d
MCH_DDR_POWER_LIMIT_LO	arch/x86/include/asm/intel_regs.h	/^#define MCH_DDR_POWER_LIMIT_LO	/;"	d
MCH_PAIR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define MCH_PAIR	/;"	d
MCH_PKG_POWER_LIMIT_HI	arch/x86/include/asm/intel_regs.h	/^#define MCH_PKG_POWER_LIMIT_HI	/;"	d
MCH_PKG_POWER_LIMIT_LO	arch/x86/include/asm/intel_regs.h	/^#define MCH_PKG_POWER_LIMIT_LO	/;"	d
MCINT_RX_CONTENT_AVAILABLE	board/gdsys/common/mclink.c	/^	MCINT_RX_CONTENT_AVAILABLE = 1 << 14,$/;"	e	enum:__anon306b739c0103	file:
MCINT_RX_ERROR_EV	board/gdsys/common/mclink.c	/^	MCINT_RX_ERROR_EV = 1 << 13,$/;"	e	enum:__anon306b739c0103	file:
MCINT_RX_PACKET_RECEIVED_EV	board/gdsys/common/mclink.c	/^	MCINT_RX_PACKET_RECEIVED_EV = 1 << 15,$/;"	e	enum:__anon306b739c0103	file:
MCINT_SLAVE_LINK_CHANGED_EV	board/gdsys/common/mclink.c	/^	MCINT_SLAVE_LINK_CHANGED_EV = 1 << 7,$/;"	e	enum:__anon306b739c0103	file:
MCINT_TX_BUFFER_FREE	board/gdsys/common/mclink.c	/^	MCINT_TX_BUFFER_FREE = 1 << 10,$/;"	e	enum:__anon306b739c0103	file:
MCINT_TX_ERROR_EV	board/gdsys/common/mclink.c	/^	MCINT_TX_ERROR_EV = 1 << 9,$/;"	e	enum:__anon306b739c0103	file:
MCINT_TX_PACKET_TRANSMITTED_EV	board/gdsys/common/mclink.c	/^	MCINT_TX_PACKET_TRANSMITTED_EV = 1 << 11,$/;"	e	enum:__anon306b739c0103	file:
MCIO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCIO(/;"	d
MCIO0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MCIO0	/;"	d
MCIO0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCIO0	/;"	d
MCIO0_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCIO0_OFFSET	/;"	d
MCIO1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCIO1	/;"	d
MCIO1_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCIO1_OFFSET	/;"	d
MCI_BUS	drivers/mmc/gen_atmel_mci.c	/^# define MCI_BUS /;"	d	file:
MCKOA_FB_SKEW_MASK	include/radeon.h	/^#define MCKOA_FB_SKEW_MASK	/;"	d
MCKOA_REF_SKEW_MASK	include/radeon.h	/^#define MCKOA_REF_SKEW_MASK	/;"	d
MCKOA_RESET	include/radeon.h	/^#define MCKOA_RESET	/;"	d
MCKOA_SLEEP	include/radeon.h	/^#define MCKOA_SLEEP	/;"	d
MCKRDY_Loop	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^MCKRDY_Loop:$/;"	l
MCKRDY_Loop1	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^MCKRDY_Loop1:$/;"	l
MCLK_CDREX2_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define MCLK_CDREX2_RATIO /;"	d
MCLK_CDREX_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define MCLK_CDREX_RATIO	/;"	d
MCLK_CNTL	include/radeon.h	/^#define MCLK_CNTL	/;"	d
MCLK_CNTL__FORCE_AIC	include/radeon.h	/^#define MCLK_CNTL__FORCE_AIC	/;"	d
MCLK_CNTL__FORCE_AIC_MASK	include/radeon.h	/^#define MCLK_CNTL__FORCE_AIC_MASK	/;"	d
MCLK_CNTL__FORCE_MC	include/radeon.h	/^#define MCLK_CNTL__FORCE_MC	/;"	d
MCLK_CNTL__FORCE_MCLKA	include/radeon.h	/^#define MCLK_CNTL__FORCE_MCLKA	/;"	d
MCLK_CNTL__FORCE_MCLKA_MASK	include/radeon.h	/^#define MCLK_CNTL__FORCE_MCLKA_MASK	/;"	d
MCLK_CNTL__FORCE_MCLKB	include/radeon.h	/^#define MCLK_CNTL__FORCE_MCLKB	/;"	d
MCLK_CNTL__FORCE_MCLKB_MASK	include/radeon.h	/^#define MCLK_CNTL__FORCE_MCLKB_MASK	/;"	d
MCLK_CNTL__FORCE_MC_MASK	include/radeon.h	/^#define MCLK_CNTL__FORCE_MC_MASK	/;"	d
MCLK_CNTL__FORCE_YCLKA	include/radeon.h	/^#define MCLK_CNTL__FORCE_YCLKA	/;"	d
MCLK_CNTL__FORCE_YCLKA_MASK	include/radeon.h	/^#define MCLK_CNTL__FORCE_YCLKA_MASK	/;"	d
MCLK_CNTL__FORCE_YCLKB	include/radeon.h	/^#define MCLK_CNTL__FORCE_YCLKB	/;"	d
MCLK_CNTL__FORCE_YCLKB_MASK	include/radeon.h	/^#define MCLK_CNTL__FORCE_YCLKB_MASK	/;"	d
MCLK_CNTL__MCLKA_SRC_SEL_MASK	include/radeon.h	/^#define MCLK_CNTL__MCLKA_SRC_SEL_MASK	/;"	d
MCLK_CNTL__MCLKB_SRC_SEL_MASK	include/radeon.h	/^#define MCLK_CNTL__MCLKB_SRC_SEL_MASK	/;"	d
MCLK_CNTL__MRDCKA0_SOUTSEL_MASK	include/radeon.h	/^#define MCLK_CNTL__MRDCKA0_SOUTSEL_MASK	/;"	d
MCLK_CNTL__MRDCKA1_SOUTSEL_MASK	include/radeon.h	/^#define MCLK_CNTL__MRDCKA1_SOUTSEL_MASK	/;"	d
MCLK_CNTL__MRDCKB0_SOUTSEL_MASK	include/radeon.h	/^#define MCLK_CNTL__MRDCKB0_SOUTSEL_MASK	/;"	d
MCLK_CNTL__MRDCKB1_SOUTSEL_MASK	include/radeon.h	/^#define MCLK_CNTL__MRDCKB1_SOUTSEL_MASK	/;"	d
MCLK_CNTL__R300_DISABLE_MC_MCLKA	include/radeon.h	/^#define MCLK_CNTL__R300_DISABLE_MC_MCLKA	/;"	d
MCLK_CNTL__R300_DISABLE_MC_MCLKB	include/radeon.h	/^#define MCLK_CNTL__R300_DISABLE_MC_MCLKB	/;"	d
MCLK_CNTL__YCLKA_SRC_SEL_MASK	include/radeon.h	/^#define MCLK_CNTL__YCLKA_SRC_SEL_MASK	/;"	d
MCLK_CNTL__YCLKB_SRC_SEL_MASK	include/radeon.h	/^#define MCLK_CNTL__YCLKB_SRC_SEL_MASK	/;"	d
MCLK_DPHY_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define MCLK_DPHY_RATIO	/;"	d
MCLK_MISC	include/radeon.h	/^#define MCLK_MISC	/;"	d
MCLK_MISC__CGM_CLK_TO_OUTPIN	include/radeon.h	/^#define MCLK_MISC__CGM_CLK_TO_OUTPIN	/;"	d
MCLK_MISC__CGM_CLK_TO_OUTPIN_MASK	include/radeon.h	/^#define MCLK_MISC__CGM_CLK_TO_OUTPIN_MASK	/;"	d
MCLK_MISC__CGM_SPARE_A_MASK	include/radeon.h	/^#define MCLK_MISC__CGM_SPARE_A_MASK	/;"	d
MCLK_MISC__CGM_SPARE_A_RD_MASK	include/radeon.h	/^#define MCLK_MISC__CGM_SPARE_A_RD_MASK	/;"	d
MCLK_MISC__CGM_SPARE_RD_MASK	include/radeon.h	/^#define MCLK_MISC__CGM_SPARE_RD_MASK	/;"	d
MCLK_MISC__CLK_OR_COUNT_SEL	include/radeon.h	/^#define MCLK_MISC__CLK_OR_COUNT_SEL	/;"	d
MCLK_MISC__CLK_OR_COUNT_SEL_MASK	include/radeon.h	/^#define MCLK_MISC__CLK_OR_COUNT_SEL_MASK	/;"	d
MCLK_MISC__DLL_READY_LAT	include/radeon.h	/^#define MCLK_MISC__DLL_READY_LAT	/;"	d
MCLK_MISC__DLL_READY_LAT_MASK	include/radeon.h	/^#define MCLK_MISC__DLL_READY_LAT_MASK	/;"	d
MCLK_MISC__ENABLE_SCLK_FROM_MPLL	include/radeon.h	/^#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL	/;"	d
MCLK_MISC__ENABLE_SCLK_FROM_MPLL_MASK	include/radeon.h	/^#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL_MASK	/;"	d
MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND	include/radeon.h	/^#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND	/;"	d
MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND_MASK	include/radeon.h	/^#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND_MASK	/;"	d
MCLK_MISC__IO_MCLK_DYN_ENABLE	include/radeon.h	/^#define MCLK_MISC__IO_MCLK_DYN_ENABLE	/;"	d
MCLK_MISC__IO_MCLK_DYN_ENABLE_MASK	include/radeon.h	/^#define MCLK_MISC__IO_MCLK_DYN_ENABLE_MASK	/;"	d
MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT	include/radeon.h	/^#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT	/;"	d
MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT_MASK	include/radeon.h	/^#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT_MASK	/;"	d
MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL	include/radeon.h	/^#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL	/;"	d
MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL_MASK	include/radeon.h	/^#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL_MASK	/;"	d
MCLK_MISC__MC_MCLK_DYN_ENABLE	include/radeon.h	/^#define MCLK_MISC__MC_MCLK_DYN_ENABLE	/;"	d
MCLK_MISC__MC_MCLK_DYN_ENABLE_MASK	include/radeon.h	/^#define MCLK_MISC__MC_MCLK_DYN_ENABLE_MASK	/;"	d
MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT	include/radeon.h	/^#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT	/;"	d
MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT_MASK	include/radeon.h	/^#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT_MASK	/;"	d
MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN	include/radeon.h	/^#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN	/;"	d
MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN_MASK	include/radeon.h	/^#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN_MASK	/;"	d
MCLK_MISC__SCLK_SOURCED_FROM_MPLL_SEL_MASK	include/radeon.h	/^#define MCLK_MISC__SCLK_SOURCED_FROM_MPLL_SEL_MASK	/;"	d
MCLK_MISC__TCLK_TO_YCLKB_EN	include/radeon.h	/^#define MCLK_MISC__TCLK_TO_YCLKB_EN	/;"	d
MCLK_MISC__TCLK_TO_YCLKB_EN_MASK	include/radeon.h	/^#define MCLK_MISC__TCLK_TO_YCLKB_EN_MASK	/;"	d
MCMEM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCMEM(/;"	d
MCMEM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MCMEM0	/;"	d
MCMEM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCMEM0	/;"	d
MCMEM0_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCMEM0_OFFSET	/;"	d
MCMEM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCMEM1	/;"	d
MCMEM1_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCMEM1_OFFSET	/;"	d
MCM_ABCR	include/mpc86xx.h	/^#define MCM_ABCR	/;"	d
MCM_DBCR	include/mpc86xx.h	/^#define MCM_DBCR	/;"	d
MCOMP	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	MCOMP	/;"	d
MCP7941X_BIT_ST	drivers/rtc/ds1307.c	/^#define MCP7941X_BIT_ST	/;"	d	file:
MCP7941X_BIT_VBATEN	drivers/rtc/ds1307.c	/^#define MCP7941X_BIT_VBATEN	/;"	d	file:
MCP_CKO_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_CKO_MARK, MMCCLK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D0_MCP_NAF0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D0_MCP_NAF0_MARK, MMCD1_0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D10_MCP_NAF10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D10_MCP_NAF10_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D11_MCP_NAF11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D11_MCP_NAF11_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D12_MCP_NAF12_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D12_MCP_NAF12_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D13_MCP_NAF13_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D13_MCP_NAF13_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D14_MCP_NAF14_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D14_MCP_NAF14_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D15_MCP_NAF15_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D15_MCP_NAF15_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D1_MCP_NAF1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D1_MCP_NAF1_MARK, MMCD1_1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D2_MCP_NAF2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D2_MCP_NAF2_MARK, MMCD1_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D3_MCP_NAF3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D3_MCP_NAF3_MARK, MMCD1_3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D4_MCP_NAF4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D4_MCP_NAF4_MARK, MMCD1_4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D5_MCP_NAF5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D5_MCP_NAF5_MARK, MMCD1_5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D6_MCP_NAF6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D6_MCP_NAF6_MARK, MMCD1_6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D7_MCP_NAF7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D7_MCP_NAF7_MARK, MMCD1_7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D8_MCP_NAF8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D8_MCP_NAF8_MARK, MMCCMD1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_D9_MCP_NAF9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D9_MCP_NAF9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_NBRSTOUT__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_NBRSTOUT__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_RDWR_MCP_FWE_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_WE0__MCP_FWE_MARK, MCP_RDWR_MCP_FWE_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_WAIT__MCP_FRB_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_WAIT__MCP_FRB_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCP_WE0__MCP_FWE_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_WE0__MCP_FWE_MARK, MCP_RDWR_MCP_FWE_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MCR	arch/sh/include/asm/cpu_sh7706.h	/^#define	MCR	/;"	d
MCR	arch/sh/include/asm/cpu_sh7750.h	/^#define MCR	/;"	d
MCR_A	board/ms7750se/lowlevel_init.S	/^MCR_A:		.long	MCR$/;"	l
MCR_A	board/renesas/r2dplus/lowlevel_init.S	/^MCR_A:		.long	MCR		\/* MCR Address *\/$/;"	l
MCR_D1	board/ms7750se/lowlevel_init.S	/^MCR_D1:		.long	MCR_D1_VALUE$/;"	l
MCR_D1	board/renesas/r2dplus/lowlevel_init.S	/^MCR_D1:		.long	0x081901F4	\/* MRSET:'0' *\/$/;"	l
MCR_D1_VALUE	board/ms7750se/lowlevel_init.S	/^#define MCR_D1_VALUE	/;"	d	file:
MCR_D2	board/ms7750se/lowlevel_init.S	/^MCR_D2:		.long	MCR_D2_VALUE$/;"	l
MCR_D2	board/renesas/r2dplus/lowlevel_init.S	/^MCR_D2:		.long	0x481901F4	\/* MRSET:'1' *\/$/;"	l
MCR_D2_VALUE	board/ms7750se/lowlevel_init.S	/^#define MCR_D2_VALUE	/;"	d	file:
MCR_DTR	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MCR_DTR	/;"	d
MCR_ESG	drivers/i2c/rcar_i2c.c	/^#define MCR_ESG	/;"	d	file:
MCR_FSB	drivers/i2c/rcar_i2c.c	/^#define MCR_FSB	/;"	d	file:
MCR_FSCL	drivers/i2c/rcar_i2c.c	/^#define MCR_FSCL	/;"	d	file:
MCR_FSDA	drivers/i2c/rcar_i2c.c	/^#define MCR_FSDA	/;"	d	file:
MCR_LOOP	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MCR_LOOP	/;"	d
MCR_MAD	include/mpc8xx.h	/^#define MCR_MAD(/;"	d
MCR_MB_CS0	include/mpc8xx.h	/^#define MCR_MB_CS0	/;"	d
MCR_MB_CS1	include/mpc8xx.h	/^#define MCR_MB_CS1	/;"	d
MCR_MB_CS2	include/mpc8xx.h	/^#define MCR_MB_CS2	/;"	d
MCR_MB_CS3	include/mpc8xx.h	/^#define MCR_MB_CS3	/;"	d
MCR_MB_CS4	include/mpc8xx.h	/^#define MCR_MB_CS4	/;"	d
MCR_MB_CS5	include/mpc8xx.h	/^#define MCR_MB_CS5	/;"	d
MCR_MB_CS6	include/mpc8xx.h	/^#define MCR_MB_CS6	/;"	d
MCR_MB_CS7	include/mpc8xx.h	/^#define MCR_MB_CS7	/;"	d
MCR_MDBS	drivers/i2c/rcar_i2c.c	/^#define MCR_MDBS	/;"	d	file:
MCR_MDSL_CIR	include/ns87308.h	/^#define MCR_MDSL_CIR /;"	d
MCR_MDSL_MSK	include/ns87308.h	/^#define MCR_MDSL_MSK /;"	d
MCR_MDSL_SHRPIR	include/ns87308.h	/^#define MCR_MDSL_SHRPIR /;"	d
MCR_MDSL_SIR	include/ns87308.h	/^#define MCR_MDSL_SIR /;"	d
MCR_MDSL_UART	include/ns87308.h	/^#define MCR_MDSL_UART /;"	d
MCR_MIE	drivers/i2c/rcar_i2c.c	/^#define MCR_MIE	/;"	d	file:
MCR_MLCF	include/mpc8xx.h	/^#define MCR_MLCF(/;"	d
MCR_OBPC	drivers/i2c/rcar_i2c.c	/^#define MCR_OBPC	/;"	d	file:
MCR_OP_READ	include/mpc8xx.h	/^#define MCR_OP_READ	/;"	d
MCR_OP_RUN	include/mpc8xx.h	/^#define MCR_OP_RUN	/;"	d
MCR_OP_WRITE	include/mpc8xx.h	/^#define MCR_OP_WRITE	/;"	d
MCR_OUT1	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MCR_OUT1	/;"	d
MCR_OUT2	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MCR_OUT2	/;"	d
MCR_RTS	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MCR_RTS	/;"	d
MCR_TSBE	drivers/i2c/rcar_i2c.c	/^#define MCR_TSBE	/;"	d	file:
MCR_UPM_A	include/mpc8xx.h	/^#define MCR_UPM_A	/;"	d
MCR_UPM_B	include/mpc8xx.h	/^#define MCR_UPM_B	/;"	d
MCS7830_BASE_NAME	drivers/usb/eth/mcs7830.c	/^#define MCS7830_BASE_NAME	/;"	d	file:
MCS7830_RD_BREQ	drivers/usb/eth/mcs7830.c	/^#define MCS7830_RD_BREQ	/;"	d	file:
MCS7830_RX_URB_SIZE	drivers/usb/eth/mcs7830.c	/^#define MCS7830_RX_URB_SIZE	/;"	d	file:
MCS7830_WR_BREQ	drivers/usb/eth/mcs7830.c	/^#define MCS7830_WR_BREQ	/;"	d	file:
MCSMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  MCSMI_EN	/;"	d
MCSMI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   MCSMI_EN	/;"	d
MCSPI1_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_CLK	/;"	d
MCSPI1_CLK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI1_CLK	/;"	d
MCSPI1_CS0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_CS0	/;"	d
MCSPI1_CS0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI1_CS0	/;"	d
MCSPI1_CS1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_CS1	/;"	d
MCSPI1_CS1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI1_CS1	/;"	d
MCSPI1_CS2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_CS2	/;"	d
MCSPI1_CS3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_CS3	/;"	d
MCSPI1_SIMO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_SIMO	/;"	d
MCSPI1_SIMO	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI1_SIMO	/;"	d
MCSPI1_SOMI	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI1_SOMI	/;"	d
MCSPI1_SOMI	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI1_SOMI	/;"	d
MCSPI2_CLK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI2_CLK	/;"	d
MCSPI2_CS0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI2_CS0	/;"	d
MCSPI2_SIMO	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI2_SIMO	/;"	d
MCSPI2_SOMI	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define MCSPI2_SOMI	/;"	d
MCSPI4_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI4_CLK	/;"	d
MCSPI4_CS0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI4_CS0	/;"	d
MCSPI4_SIMO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI4_SIMO	/;"	d
MCSPI4_SOMI	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define MCSPI4_SOMI	/;"	d
MCSPI_PINDIR_D0_IN_D1_OUT	drivers/spi/omap3_spi.c	/^#define MCSPI_PINDIR_D0_IN_D1_OUT	/;"	d	file:
MCSPI_PINDIR_D0_OUT_D1_IN	drivers/spi/omap3_spi.c	/^#define MCSPI_PINDIR_D0_OUT_D1_IN	/;"	d	file:
MCSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCSR	/;"	d
MCSR	arch/powerpc/include/asm/processor.h	/^#define MCSR	/;"	d
MCSRR0	arch/powerpc/include/asm/processor.h	/^#define MCSRR0	/;"	d
MCSRR1	arch/powerpc/include/asm/processor.h	/^#define MCSRR1	/;"	d
MCSR_ACE	include/SA-1100.h	/^#define MCSR_ACE	/;"	d
MCSR_ANE	include/SA-1100.h	/^#define MCSR_ANE	/;"	d
MCSR_ANF	include/SA-1100.h	/^#define MCSR_ANF	/;"	d
MCSR_ARO	include/SA-1100.h	/^#define MCSR_ARO	/;"	d
MCSR_ARS	include/SA-1100.h	/^#define MCSR_ARS	/;"	d
MCSR_ATS	include/SA-1100.h	/^#define MCSR_ATS	/;"	d
MCSR_ATU	include/SA-1100.h	/^#define MCSR_ATU	/;"	d
MCSR_CRC	include/SA-1100.h	/^#define MCSR_CRC	/;"	d
MCSR_CWC	include/SA-1100.h	/^#define MCSR_CWC	/;"	d
MCSR_DB	arch/powerpc/include/asm/processor.h	/^#define MCSR_DB	/;"	d
MCSR_DCFP	arch/powerpc/include/asm/processor.h	/^#define MCSR_DCFP	/;"	d
MCSR_DCSP	arch/powerpc/include/asm/processor.h	/^#define MCSR_DCSP	/;"	d
MCSR_DRB	arch/powerpc/include/asm/processor.h	/^#define MCSR_DRB	/;"	d
MCSR_DWB	arch/powerpc/include/asm/processor.h	/^#define MCSR_DWB	/;"	d
MCSR_FIFOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MCSR_FIFOE	/;"	d
MCSR_IB	arch/powerpc/include/asm/processor.h	/^#define MCSR_IB	/;"	d
MCSR_ICP	arch/powerpc/include/asm/processor.h	/^#define MCSR_ICP	/;"	d
MCSR_IMPE	arch/powerpc/include/asm/processor.h	/^#define MCSR_IMPE	/;"	d
MCSR_MCS	arch/powerpc/include/asm/processor.h	/^#define MCSR_MCS	/;"	d
MCSR_TCE	include/SA-1100.h	/^#define MCSR_TCE	/;"	d
MCSR_TLBP	arch/powerpc/include/asm/processor.h	/^#define MCSR_TLBP	/;"	d
MCSR_TNE	include/SA-1100.h	/^#define MCSR_TNE	/;"	d
MCSR_TNF	include/SA-1100.h	/^#define MCSR_TNF	/;"	d
MCSR_TRO	include/SA-1100.h	/^#define MCSR_TRO	/;"	d
MCSR_TRS	include/SA-1100.h	/^#define MCSR_TRS	/;"	d
MCSR_TTS	include/SA-1100.h	/^#define MCSR_TTS	/;"	d
MCSR_TTU	include/SA-1100.h	/^#define MCSR_TTU	/;"	d
MCTL_ACIOCR_DISABLE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_ACIOCR_DISABLE	/;"	d
MCTL_ACIOCR_DISABLE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_ACIOCR_DISABLE	/;"	d
MCTL_BL	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MCTL_BL /;"	d	file:
MCTL_CCR_CH0_CLK_EN	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CCR_CH0_CLK_EN	/;"	d
MCTL_CCR_CH0_CLK_EN	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CCR_CH0_CLK_EN	/;"	d
MCTL_CCR_CH0_CLK_EN	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CCR_CH0_CLK_EN	/;"	d
MCTL_CCR_CH0_CLK_EN	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CCR_CH0_CLK_EN	/;"	d
MCTL_CCR_CH1_CLK_EN	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CCR_CH1_CLK_EN	/;"	d
MCTL_CCR_CH1_CLK_EN	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CCR_CH1_CLK_EN	/;"	d
MCTL_CCR_CH1_CLK_EN	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CCR_CH1_CLK_EN	/;"	d
MCTL_CCR_CH1_CLK_EN	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CCR_CH1_CLK_EN	/;"	d
MCTL_CCR_MASTER_CLK_EN	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CCR_MASTER_CLK_EN	/;"	d
MCTL_CCR_MASTER_CLK_EN	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CCR_MASTER_CLK_EN	/;"	d
MCTL_CR_16BIT	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_16BIT	/;"	d
MCTL_CR_16BIT	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_16BIT	/;"	d
MCTL_CR_1T	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_1T	/;"	d
MCTL_CR_1T	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_1T	/;"	d
MCTL_CR_2T	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_2T	/;"	d
MCTL_CR_2T	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_2T	/;"	d
MCTL_CR_32BIT	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_32BIT	/;"	d
MCTL_CR_32BIT	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_32BIT	/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_BANK(/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BANK_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_BANK_MASK	/;"	d
MCTL_CR_BL8	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_BL8	/;"	d
MCTL_CR_BL8	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_BL8	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW16	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_BUSW16	/;"	d
MCTL_CR_BUSW32	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_BUSW32	/;"	d
MCTL_CR_BUSW32	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_BUSW32	/;"	d
MCTL_CR_BUSW32	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_BUSW32	/;"	d
MCTL_CR_BUSW32	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_BUSW32	/;"	d
MCTL_CR_BUSW8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_BUSW8	/;"	d
MCTL_CR_BUSW8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_BUSW8	/;"	d
MCTL_CR_BUSW8	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_BUSW8	/;"	d
MCTL_CR_BUSW8	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_BUSW8	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUSW_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_BUSW_MASK	/;"	d
MCTL_CR_BUS_WIDTH	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_BUS_WIDTH(/;"	d
MCTL_CR_BUS_WIDTH	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_BUS_WIDTH(/;"	d
MCTL_CR_CHANNEL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_CHANNEL(/;"	d
MCTL_CR_CHANNEL	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_CHANNEL(/;"	d
MCTL_CR_CHANNEL	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_CHANNEL(/;"	d
MCTL_CR_CHANNEL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_CHANNEL(/;"	d
MCTL_CR_CHANNEL	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_CHANNEL(/;"	d
MCTL_CR_CHANNEL	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_CHANNEL(/;"	d
MCTL_CR_CHANNEL_DUAL	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_CHANNEL_DUAL /;"	d
MCTL_CR_CHANNEL_DUAL	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_CHANNEL_DUAL /;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_CHANNEL_MASK	/;"	d
MCTL_CR_CHANNEL_SINGLE	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_CHANNEL_SINGLE /;"	d
MCTL_CR_CHANNEL_SINGLE	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_CHANNEL_SINGLE /;"	d
MCTL_CR_CS1_CONTROL	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_CS1_CONTROL(/;"	d
MCTL_CR_CS1_CONTROL	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_CS1_CONTROL(/;"	d
MCTL_CR_CS1_CONTROL	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_CS1_CONTROL(/;"	d
MCTL_CR_CS1_CONTROL	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_CS1_CONTROL(/;"	d
MCTL_CR_DDR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_DDR2	/;"	d
MCTL_CR_DDR2	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_DDR2	/;"	d
MCTL_CR_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_DDR3	/;"	d
MCTL_CR_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_DDR3	/;"	d
MCTL_CR_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_DDR3	/;"	d
MCTL_CR_DDR3	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_DDR3	/;"	d
MCTL_CR_DDR3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_DDR3	/;"	d
MCTL_CR_DDR3	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_DDR3	/;"	d
MCTL_CR_DRAMTYPE_DDR2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_DDR2	/;"	d
MCTL_CR_DRAMTYPE_DDR2	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_DDR2	/;"	d
MCTL_CR_DRAMTYPE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_DDR3	/;"	d
MCTL_CR_DRAMTYPE_DDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_DDR3	/;"	d
MCTL_CR_DRAMTYPE_LPDDR2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_LPDDR2	/;"	d
MCTL_CR_DRAMTYPE_LPDDR2	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_LPDDR2	/;"	d
MCTL_CR_DRAMTYPE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_MASK /;"	d
MCTL_CR_DRAMTYPE_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_DRAMTYPE_MASK /;"	d
MCTL_CR_DRAM_TYPE	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_DRAM_TYPE(/;"	d
MCTL_CR_DRAM_TYPE	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_DRAM_TYPE(/;"	d
MCTL_CR_DUAL_RANK	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_DUAL_RANK	/;"	d
MCTL_CR_DUAL_RANK	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_DUAL_RANK	/;"	d
MCTL_CR_EIGHT_BANKS	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_EIGHT_BANKS	/;"	d
MCTL_CR_EIGHT_BANKS	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_EIGHT_BANKS	/;"	d
MCTL_CR_FOUR_BANKS	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_FOUR_BANKS	/;"	d
MCTL_CR_FOUR_BANKS	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_FOUR_BANKS	/;"	d
MCTL_CR_INTERLEAVED	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_INTERLEAVED	/;"	d
MCTL_CR_INTERLEAVED	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_INTERLEAVED	/;"	d
MCTL_CR_LPDDR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_LPDDR2	/;"	d
MCTL_CR_LPDDR2	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_LPDDR2	/;"	d
MCTL_CR_LPDDR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_LPDDR3	/;"	d
MCTL_CR_LPDDR3	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_LPDDR3	/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_PAGE_SIZE(/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_PAGE_SIZE_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_PAGE_SIZE_MASK	/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_RANK(/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_RANK_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_RANK_MASK	/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_ROW(/;"	d
MCTL_CR_ROW_BITS	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_ROW_BITS(/;"	d
MCTL_CR_ROW_BITS	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_ROW_BITS(/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_ROW_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_CR_ROW_MASK	/;"	d
MCTL_CR_SEQUENCE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_SEQUENCE	/;"	d
MCTL_CR_SEQUENCE	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_SEQUENCE	/;"	d
MCTL_CR_SEQUENCE	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_SEQUENCE	/;"	d
MCTL_CR_SEQUENCE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_SEQUENCE	/;"	d
MCTL_CR_SEQUENCE	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_SEQUENCE	/;"	d
MCTL_CR_SEQUENCE	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_SEQUENCE	/;"	d
MCTL_CR_SEQUENTIAL	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_SEQUENTIAL	/;"	d
MCTL_CR_SEQUENTIAL	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_SEQUENTIAL	/;"	d
MCTL_CR_SINGLE_RANK	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define MCTL_CR_SINGLE_RANK	/;"	d
MCTL_CR_SINGLE_RANK	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define MCTL_CR_SINGLE_RANK	/;"	d
MCTL_CR_UNKNOWN	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_CR_UNKNOWN	/;"	d
MCTL_CR_UNKNOWN	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_CR_UNKNOWN	/;"	d
MCTL_CR_UNKNOWN	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_CR_UNKNOWN	/;"	d
MCTL_CR_UNKNOWN	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_CR_UNKNOWN	/;"	d
MCTL_CR_UNKNOWN	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_CR_UNKNOWN	/;"	d
MCTL_CR_UNKNOWN	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_CR_UNKNOWN	/;"	d
MCTL_DCR_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DCR_DDR3	/;"	d
MCTL_DCR_DDR3	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DCR_DDR3	/;"	d
MCTL_DFIMISC_DFI_INIT_COMPLETE_EN	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_DFIMISC_DFI_INIT_COMPLETE_EN /;"	d
MCTL_DFIMISC_DFI_INIT_COMPLETE_EN	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_DFIMISC_DFI_INIT_COMPLETE_EN /;"	d
MCTL_DFISTCFG0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DFISTCFG0	/;"	d
MCTL_DFISTCFG0	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DFISTCFG0	/;"	d
MCTL_DFITPHYRDL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DFITPHYRDL	/;"	d
MCTL_DFITPHYRDL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DFITPHYRDL	/;"	d
MCTL_DFIUPD0_DIS_AUTO_CTRLUPD	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_DFIUPD0_DIS_AUTO_CTRLUPD /;"	d
MCTL_DFIUPD0_DIS_AUTO_CTRLUPD	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_DFIUPD0_DIS_AUTO_CTRLUPD /;"	d
MCTL_DFIUPDCFG_UPD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DFIUPDCFG_UPD	/;"	d
MCTL_DFIUPDCFG_UPD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DFIUPDCFG_UPD	/;"	d
MCTL_DIV1024	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MCTL_DIV1024(/;"	d	file:
MCTL_DIV2	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MCTL_DIV2(/;"	d	file:
MCTL_DIV32	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MCTL_DIV32(/;"	d	file:
MCTL_DLLCR_DISABLE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DLLCR_DISABLE	/;"	d
MCTL_DLLCR_DISABLE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DLLCR_DISABLE	/;"	d
MCTL_DLLCR_NRESET	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DLLCR_NRESET	/;"	d
MCTL_DLLCR_NRESET	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DLLCR_NRESET	/;"	d
MCTL_DSGCR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DSGCR	/;"	d
MCTL_DSGCR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DSGCR	/;"	d
MCTL_DSGCR_ENABLE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DSGCR_ENABLE	/;"	d
MCTL_DSGCR_ENABLE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DSGCR_ENABLE	/;"	d
MCTL_DTCR_DEFAULT	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_DTCR_DEFAULT /;"	d
MCTL_DTCR_DEFAULT	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_DTCR_DEFAULT /;"	d
MCTL_DTCR_RANKEN	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_DTCR_RANKEN(/;"	d
MCTL_DTCR_RANKEN	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_DTCR_RANKEN(/;"	d
MCTL_DXCCR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DXCCR	/;"	d
MCTL_DXCCR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DXCCR	/;"	d
MCTL_DXCCR_DISABLE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DXCCR_DISABLE	/;"	d
MCTL_DXCCR_DISABLE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DXCCR_DISABLE	/;"	d
MCTL_DX_GCR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DX_GCR	/;"	d
MCTL_DX_GCR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DX_GCR	/;"	d
MCTL_DX_GCR_EN	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DX_GCR_EN	/;"	d
MCTL_DX_GCR_EN	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DX_GCR_EN	/;"	d
MCTL_DX_GSR0_RANK0_TRAIN_DONE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK0_TRAIN_DONE	/;"	d
MCTL_DX_GSR0_RANK0_TRAIN_DONE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK0_TRAIN_DONE	/;"	d
MCTL_DX_GSR0_RANK0_TRAIN_ERR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK0_TRAIN_ERR	/;"	d
MCTL_DX_GSR0_RANK0_TRAIN_ERR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK0_TRAIN_ERR	/;"	d
MCTL_DX_GSR0_RANK1_TRAIN_DONE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK1_TRAIN_DONE	/;"	d
MCTL_DX_GSR0_RANK1_TRAIN_DONE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK1_TRAIN_DONE	/;"	d
MCTL_DX_GSR0_RANK1_TRAIN_ERR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK1_TRAIN_ERR	/;"	d
MCTL_DX_GSR0_RANK1_TRAIN_ERR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_DX_GSR0_RANK1_TRAIN_ERR	/;"	d
MCTL_INIT0_POST_CKE_x1024	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT0_POST_CKE_x1024(/;"	d
MCTL_INIT0_POST_CKE_x1024	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT0_POST_CKE_x1024(/;"	d
MCTL_INIT0_PRE_CKE_x1024	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT0_PRE_CKE_x1024(/;"	d
MCTL_INIT0_PRE_CKE_x1024	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT0_PRE_CKE_x1024(/;"	d
MCTL_INIT1_DRAM_RSTN_x1024	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT1_DRAM_RSTN_x1024(/;"	d
MCTL_INIT1_DRAM_RSTN_x1024	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT1_DRAM_RSTN_x1024(/;"	d
MCTL_INIT1_FINAL_WAIT_x32	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT1_FINAL_WAIT_x32(/;"	d
MCTL_INIT1_FINAL_WAIT_x32	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT1_FINAL_WAIT_x32(/;"	d
MCTL_INIT1_PRE_OCD_x32	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT1_PRE_OCD_x32(/;"	d
MCTL_INIT1_PRE_OCD_x32	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT1_PRE_OCD_x32(/;"	d
MCTL_INIT2_IDLE_AFTER_RESET_x32	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT2_IDLE_AFTER_RESET_x32(/;"	d
MCTL_INIT2_IDLE_AFTER_RESET_x32	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT2_IDLE_AFTER_RESET_x32(/;"	d
MCTL_INIT2_MIN_STABLE_CLOCK_x1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT2_MIN_STABLE_CLOCK_x1(/;"	d
MCTL_INIT2_MIN_STABLE_CLOCK_x1	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT2_MIN_STABLE_CLOCK_x1(/;"	d
MCTL_INIT3_EMR	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT3_EMR(/;"	d
MCTL_INIT3_EMR	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT3_EMR(/;"	d
MCTL_INIT3_MR	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT3_MR(/;"	d
MCTL_INIT3_MR	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT3_MR(/;"	d
MCTL_INIT4_EMR2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT4_EMR2(/;"	d
MCTL_INIT4_EMR2	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT4_EMR2(/;"	d
MCTL_INIT4_EMR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT4_EMR3(/;"	d
MCTL_INIT4_EMR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT4_EMR3(/;"	d
MCTL_INIT5_DEV_ZQINIT_x32	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT5_DEV_ZQINIT_x32(/;"	d
MCTL_INIT5_DEV_ZQINIT_x32	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT5_DEV_ZQINIT_x32(/;"	d
MCTL_INIT5_MAX_AUTO_INIT_x1024	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_INIT5_MAX_AUTO_INIT_x1024(/;"	d
MCTL_INIT5_MAX_AUTO_INIT_x1024	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_INIT5_MAX_AUTO_INIT_x1024(/;"	d
MCTL_LPDDR3_MR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR0	/;"	d
MCTL_LPDDR3_MR0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR0	/;"	d
MCTL_LPDDR3_MR1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR1	/;"	d
MCTL_LPDDR3_MR1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR1	/;"	d
MCTL_LPDDR3_MR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR2	/;"	d
MCTL_LPDDR3_MR2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR2	/;"	d
MCTL_LPDDR3_MR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR3	/;"	d
MCTL_LPDDR3_MR3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_LPDDR3_MR3	/;"	d
MCTL_MASTER_CFG0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_MASTER_CFG0(/;"	d
MCTL_MASTER_CFG0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_MASTER_CFG0(/;"	d
MCTL_MASTER_CFG1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_MASTER_CFG1(/;"	d
MCTL_MASTER_CFG1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_MASTER_CFG1(/;"	d
MCTL_MCFG_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MCFG_DDR3	/;"	d
MCTL_MCFG_DDR3	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MCFG_DDR3	/;"	d
MCTL_MCMD_BUSY	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MCMD_BUSY	/;"	d
MCTL_MCMD_BUSY	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MCMD_BUSY	/;"	d
MCTL_MCMD_NOP	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MCMD_NOP	/;"	d
MCTL_MCMD_NOP	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MCMD_NOP	/;"	d
MCTL_MR0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MR0	/;"	d
MCTL_MR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_MR0	/;"	d
MCTL_MR0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_MR0	/;"	d
MCTL_MR0	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MR0	/;"	d
MCTL_MR0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_MR0	/;"	d
MCTL_MR0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_MR0	/;"	d
MCTL_MR1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MR1	/;"	d
MCTL_MR1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_MR1	/;"	d
MCTL_MR1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_MR1	/;"	d
MCTL_MR1	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MR1	/;"	d
MCTL_MR1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_MR1	/;"	d
MCTL_MR1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_MR1	/;"	d
MCTL_MR2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MR2	/;"	d
MCTL_MR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_MR2	/;"	d
MCTL_MR2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_MR2	/;"	d
MCTL_MR2	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MR2	/;"	d
MCTL_MR2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_MR2	/;"	d
MCTL_MR2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_MR2	/;"	d
MCTL_MR3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_MR3	/;"	d
MCTL_MR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define MCTL_MR3	/;"	d
MCTL_MR3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_MR3	/;"	d
MCTL_MR3	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_MR3	/;"	d
MCTL_MR3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define MCTL_MR3	/;"	d
MCTL_MR3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_MR3	/;"	d
MCTL_MSTR_2TMODE	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_2TMODE /;"	d
MCTL_MSTR_2TMODE	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_2TMODE /;"	d
MCTL_MSTR_ACTIVERANKS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_ACTIVERANKS(/;"	d
MCTL_MSTR_ACTIVERANKS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_ACTIVERANKS(/;"	d
MCTL_MSTR_BURSTLENGTH	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH(/;"	d
MCTL_MSTR_BURSTLENGTH	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH(/;"	d
MCTL_MSTR_BURSTLENGTH16	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH16 /;"	d
MCTL_MSTR_BURSTLENGTH16	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH16 /;"	d
MCTL_MSTR_BURSTLENGTH4	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH4 /;"	d
MCTL_MSTR_BURSTLENGTH4	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH4 /;"	d
MCTL_MSTR_BURSTLENGTH8	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH8 /;"	d
MCTL_MSTR_BURSTLENGTH8	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BURSTLENGTH8 /;"	d
MCTL_MSTR_BUSWIDTH16	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BUSWIDTH16 /;"	d
MCTL_MSTR_BUSWIDTH16	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BUSWIDTH16 /;"	d
MCTL_MSTR_BUSWIDTH32	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BUSWIDTH32 /;"	d
MCTL_MSTR_BUSWIDTH32	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BUSWIDTH32 /;"	d
MCTL_MSTR_BUSWIDTH8	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_BUSWIDTH8 /;"	d
MCTL_MSTR_BUSWIDTH8	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_BUSWIDTH8 /;"	d
MCTL_MSTR_DEVICETYPE	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE(/;"	d
MCTL_MSTR_DEVICETYPE	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE(/;"	d
MCTL_MSTR_DEVICETYPE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE_DDR3 /;"	d
MCTL_MSTR_DEVICETYPE_DDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE_DDR3 /;"	d
MCTL_MSTR_DEVICETYPE_LPDDR2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE_LPDDR2 /;"	d
MCTL_MSTR_DEVICETYPE_LPDDR2	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE_LPDDR2 /;"	d
MCTL_MSTR_DEVICETYPE_LPDDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE_LPDDR3 /;"	d
MCTL_MSTR_DEVICETYPE_LPDDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_MSTR_DEVICETYPE_LPDDR3 /;"	d
MCTL_NS2CYCLES_CEIL	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_NS2CYCLES_CEIL(/;"	d
MCTL_NS2CYCLES_CEIL	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_NS2CYCLES_CEIL(/;"	d
MCTL_PGCR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_PGCR	/;"	d
MCTL_PGCR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_PGCR	/;"	d
MCTL_PGCR1_INHVT_EN	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PGCR1_INHVT_EN /;"	d
MCTL_PGCR1_INHVT_EN	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PGCR1_INHVT_EN /;"	d
MCTL_PGCR1_IODDRM_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PGCR1_IODDRM_DDR3 /;"	d
MCTL_PGCR1_IODDRM_DDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PGCR1_IODDRM_DDR3 /;"	d
MCTL_PGCR1_IODDRM_DDR3L	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PGCR1_IODDRM_DDR3L /;"	d
MCTL_PGCR1_IODDRM_DDR3L	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PGCR1_IODDRM_DDR3L /;"	d
MCTL_PGCR1_IODDRM_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PGCR1_IODDRM_MASK /;"	d
MCTL_PGCR1_IODDRM_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PGCR1_IODDRM_MASK /;"	d
MCTL_PGCR1_ZCKSEL_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PGCR1_ZCKSEL_MASK /;"	d
MCTL_PGCR1_ZCKSEL_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PGCR1_ZCKSEL_MASK /;"	d
MCTL_PGCR_RANK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_PGCR_RANK	/;"	d
MCTL_PGCR_RANK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_PGCR_RANK	/;"	d
MCTL_PGSR0_ERRORS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PGSR0_ERRORS /;"	d
MCTL_PGSR0_ERRORS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PGSR0_ERRORS /;"	d
MCTL_PGSR_TRAIN_ERR_MASK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_PGSR_TRAIN_ERR_MASK	/;"	d
MCTL_PGSR_TRAIN_ERR_MASK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_PGSR_TRAIN_ERR_MASK	/;"	d
MCTL_PHY_DCR_2TMODE	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PHY_DCR_2TMODE /;"	d
MCTL_PHY_DCR_2TMODE	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PHY_DCR_2TMODE /;"	d
MCTL_PHY_DCR_BYTEMASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PHY_DCR_BYTEMASK /;"	d
MCTL_PHY_DCR_BYTEMASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PHY_DCR_BYTEMASK /;"	d
MCTL_PHY_DCR_DDR8BNK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PHY_DCR_DDR8BNK /;"	d
MCTL_PHY_DCR_DDR8BNK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PHY_DCR_DDR8BNK /;"	d
MCTL_PHY_DRAMMODE_DDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PHY_DRAMMODE_DDR3 /;"	d
MCTL_PHY_DRAMMODE_DDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PHY_DRAMMODE_DDR3 /;"	d
MCTL_PHY_DRAMMODE_LPDDR2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PHY_DRAMMODE_LPDDR2 /;"	d
MCTL_PHY_DRAMMODE_LPDDR2	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PHY_DRAMMODE_LPDDR2 /;"	d
MCTL_PHY_DRAMMODE_LPDDR3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PHY_DRAMMODE_LPDDR3 /;"	d
MCTL_PHY_DRAMMODE_LPDDR3	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PHY_DRAMMODE_LPDDR3 /;"	d
MCTL_PHY_TRTODT	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MCTL_PHY_TRTODT /;"	d	file:
MCTL_PHY_TRTW	arch/arm/mach-sunxi/dram_sun9i.c	/^#define MCTL_PHY_TRTW /;"	d	file:
MCTL_PIR_CLEAR_STATUS	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_PIR_CLEAR_STATUS	/;"	d
MCTL_PIR_CLEAR_STATUS	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_PIR_CLEAR_STATUS	/;"	d
MCTL_PIR_INIT	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PIR_INIT /;"	d
MCTL_PIR_INIT	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PIR_INIT /;"	d
MCTL_PIR_MASK	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PIR_MASK /;"	d
MCTL_PIR_MASK	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PIR_MASK /;"	d
MCTL_PIR_PLL_BYPASS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PIR_PLL_BYPASS /;"	d
MCTL_PIR_PLL_BYPASS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PIR_PLL_BYPASS /;"	d
MCTL_PIR_STEP1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_PIR_STEP1	/;"	d
MCTL_PIR_STEP1	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_PIR_STEP1	/;"	d
MCTL_PIR_STEP2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_PIR_STEP2	/;"	d
MCTL_PIR_STEP2	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_PIR_STEP2	/;"	d
MCTL_PLLGCR_PLL_BYPASS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PLLGCR_PLL_BYPASS /;"	d
MCTL_PLLGCR_PLL_BYPASS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PLLGCR_PLL_BYPASS /;"	d
MCTL_PLLGCR_PLL_POWERDOWN	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_PLLGCR_PLL_POWERDOWN /;"	d
MCTL_PLLGCR_PLL_POWERDOWN	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_PLLGCR_PLL_POWERDOWN /;"	d
MCTL_PROTECT	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MCTL_PROTECT	/;"	d
MCTL_PROTECT	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MCTL_PROTECT	/;"	d
MCTL_RFSHCTL3_DIS_AUTO_REFRESH	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_RFSHCTL3_DIS_AUTO_REFRESH /;"	d
MCTL_RFSHCTL3_DIS_AUTO_REFRESH	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_RFSHCTL3_DIS_AUTO_REFRESH /;"	d
MCTL_SCTL_ACCESS	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_SCTL_ACCESS	/;"	d
MCTL_SCTL_ACCESS	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_SCTL_ACCESS	/;"	d
MCTL_SCTL_CONFIG	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_SCTL_CONFIG	/;"	d
MCTL_SCTL_CONFIG	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_SCTL_CONFIG	/;"	d
MCTL_TAL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TAL	/;"	d
MCTL_TAL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TAL	/;"	d
MCTL_TAOND	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TAOND	/;"	d
MCTL_TAOND	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TAOND	/;"	d
MCTL_TCCD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCCD	/;"	d
MCTL_TCCD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCCD	/;"	d
MCTL_TCKE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCKE	/;"	d
MCTL_TCKE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCKE	/;"	d
MCTL_TCKESR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCKESR	/;"	d
MCTL_TCKESR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCKESR	/;"	d
MCTL_TCKSRE	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCKSRE	/;"	d
MCTL_TCKSRE	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCKSRE	/;"	d
MCTL_TCKSRX	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCKSRX	/;"	d
MCTL_TCKSRX	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCKSRX	/;"	d
MCTL_TCL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCL	/;"	d
MCTL_TCL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCL	/;"	d
MCTL_TCWL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TCWL	/;"	d
MCTL_TCWL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TCWL	/;"	d
MCTL_TDINIT0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDINIT0	/;"	d
MCTL_TDINIT0	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDINIT0	/;"	d
MCTL_TDINIT1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDINIT1	/;"	d
MCTL_TDINIT1	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDINIT1	/;"	d
MCTL_TDINIT2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDINIT2	/;"	d
MCTL_TDINIT2	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDINIT2	/;"	d
MCTL_TDINIT3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDINIT3	/;"	d
MCTL_TDINIT3	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDINIT3	/;"	d
MCTL_TDLLK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDLLK	/;"	d
MCTL_TDLLK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDLLK	/;"	d
MCTL_TDLLLOCK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDLLLOCK	/;"	d
MCTL_TDLLLOCK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDLLLOCK	/;"	d
MCTL_TDLLSRST	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDLLSRST	/;"	d
MCTL_TDLLSRST	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDLLSRST	/;"	d
MCTL_TDPD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDPD	/;"	d
MCTL_TDPD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDPD	/;"	d
MCTL_TDQS	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDQS	/;"	d
MCTL_TDQS	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDQS	/;"	d
MCTL_TDQSCK	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDQSCK	/;"	d
MCTL_TDQSCK	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDQSCK	/;"	d
MCTL_TDQSCKMAX	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TDQSCKMAX	/;"	d
MCTL_TDQSCKMAX	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TDQSCKMAX	/;"	d
MCTL_TEXSR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TEXSR	/;"	d
MCTL_TEXSR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TEXSR	/;"	d
MCTL_TFAW	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TFAW	/;"	d
MCTL_TFAW	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TFAW	/;"	d
MCTL_TITMSRST	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TITMSRST	/;"	d
MCTL_TITMSRST	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TITMSRST	/;"	d
MCTL_TMOD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TMOD	/;"	d
MCTL_TMOD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TMOD	/;"	d
MCTL_TMRD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TMRD	/;"	d
MCTL_TMRD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TMRD	/;"	d
MCTL_TMRR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TMRR	/;"	d
MCTL_TMRR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TMRR	/;"	d
MCTL_TPREA	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TPREA	/;"	d
MCTL_TPREA	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TPREA	/;"	d
MCTL_TRAS	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRAS	/;"	d
MCTL_TRAS	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRAS	/;"	d
MCTL_TRC	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRC	/;"	d
MCTL_TRC	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRC	/;"	d
MCTL_TRCD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRCD	/;"	d
MCTL_TRCD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRCD	/;"	d
MCTL_TREFI	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TREFI	/;"	d
MCTL_TREFI	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TREFI	/;"	d
MCTL_TRFC	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRFC	/;"	d
MCTL_TRFC	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRFC	/;"	d
MCTL_TRP	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRP	/;"	d
MCTL_TRP	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRP	/;"	d
MCTL_TRRD	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRRD	/;"	d
MCTL_TRRD	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRRD	/;"	d
MCTL_TRSTL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRSTL	/;"	d
MCTL_TRSTL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRSTL	/;"	d
MCTL_TRTODT	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRTODT	/;"	d
MCTL_TRTODT	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRTODT	/;"	d
MCTL_TRTP	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRTP	/;"	d
MCTL_TRTP	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRTP	/;"	d
MCTL_TRTW	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TRTW	/;"	d
MCTL_TRTW	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TRTW	/;"	d
MCTL_TWR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TWR	/;"	d
MCTL_TWR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TWR	/;"	d
MCTL_TWTR	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TWTR	/;"	d
MCTL_TWTR	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TWTR	/;"	d
MCTL_TXP	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TXP	/;"	d
MCTL_TXP	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TXP	/;"	d
MCTL_TXPDLL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TXPDLL	/;"	d
MCTL_TXPDLL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TXPDLL	/;"	d
MCTL_TZQCL	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TZQCL	/;"	d
MCTL_TZQCL	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TZQCL	/;"	d
MCTL_TZQCS	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TZQCS	/;"	d
MCTL_TZQCS	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TZQCS	/;"	d
MCTL_TZQCSI	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define MCTL_TZQCSI	/;"	d
MCTL_TZQCSI	arch/arm/include/asm/arch/dram_sun6i.h	/^#define MCTL_TZQCSI	/;"	d
MCTL_ZQCTRL0_TZQCL	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL0_TZQCL(/;"	d
MCTL_ZQCTRL0_TZQCL	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL0_TZQCL(/;"	d
MCTL_ZQCTRL0_TZQCS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL0_TZQCS(/;"	d
MCTL_ZQCTRL0_TZQCS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL0_TZQCS(/;"	d
MCTL_ZQCTRL0_ZQCL_DIS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL0_ZQCL_DIS /;"	d
MCTL_ZQCTRL0_ZQCL_DIS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL0_ZQCL_DIS /;"	d
MCTL_ZQCTRL0_ZQCS_DIS	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL0_ZQCS_DIS /;"	d
MCTL_ZQCTRL0_ZQCS_DIS	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL0_ZQCS_DIS /;"	d
MCTL_ZQCTRL1_TZQRESET	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL1_TZQRESET(/;"	d
MCTL_ZQCTRL1_TZQRESET	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL1_TZQRESET(/;"	d
MCTL_ZQCTRL1_TZQSI_x1024	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL1_TZQSI_x1024(/;"	d
MCTL_ZQCTRL1_TZQSI_x1024	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL1_TZQSI_x1024(/;"	d
MCTL_ZQCTRL2_TZRESET_TRIGGER	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define MCTL_ZQCTRL2_TZRESET_TRIGGER /;"	d
MCTL_ZQCTRL2_TZRESET_TRIGGER	arch/arm/include/asm/arch/dram_sun9i.h	/^#define MCTL_ZQCTRL2_TZRESET_TRIGGER /;"	d
MCT_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MCT_BASE_ADDR	/;"	d
MCU_BORW_EN	drivers/usb/eth/r8152.h	/^#define MCU_BORW_EN	/;"	d
MCU_CLK_RATIO	drivers/usb/eth/r8152.h	/^#define MCU_CLK_RATIO	/;"	d
MCU_CLK_RATIO_MASK	drivers/usb/eth/r8152.h	/^#define MCU_CLK_RATIO_MASK	/;"	d
MCU_TYPE_PLA	drivers/usb/eth/r8152.h	/^#define MCU_TYPE_PLA	/;"	d
MCU_TYPE_USB	drivers/usb/eth/r8152.h	/^#define MCU_TYPE_USB	/;"	d
MC_AGP_LOCATION	include/radeon.h	/^#define MC_AGP_LOCATION	/;"	d
MC_ALLOC	drivers/net/smc91111.h	/^#define	MC_ALLOC	/;"	d
MC_ASIDMASK	arch/powerpc/include/asm/mmu.h	/^#define MC_ASIDMASK	/;"	d
MC_BOOT_ENV_VAR	board/freescale/ls2080aqds/eth.c	/^#define MC_BOOT_ENV_VAR /;"	d	file:
MC_BOOT_ENV_VAR	board/freescale/ls2080ardb/eth_ls2080rdb.c	/^#define MC_BOOT_ENV_VAR /;"	d	file:
MC_BOOT_TIMEOUT_ENV_VAR	drivers/net/fsl-mc/mc.c	/^#define MC_BOOT_TIMEOUT_ENV_VAR	/;"	d	file:
MC_BUSY	drivers/net/smc91111.h	/^#define MC_BUSY	/;"	d
MC_CCSR_BASE_ADDR	include/fsl-mc/fsl_mc.h	/^#define MC_CCSR_BASE_ADDR /;"	d
MC_CGM0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_CGM0_BASE_ADDR	/;"	d
MC_CGM1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_CGM1_BASE_ADDR	/;"	d
MC_CGM2_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_CGM2_BASE_ADDR	/;"	d
MC_CGM3_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_CGM3_BASE_ADDR	/;"	d
MC_CGM_ACn_DCm_DE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_DCm_DE	/;"	d
MC_CGM_ACn_DCm_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_DCm_PREDIV(/;"	d
MC_CGM_ACn_DCm_PREDIV_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_DCm_PREDIV_MASK	/;"	d
MC_CGM_ACn_DCm_PREDIV_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_DCm_PREDIV_OFFSET	/;"	d
MC_CGM_ACn_SEL_ARMPLL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_ARMPLL	/;"	d
MC_CGM_ACn_SEL_DDRPLL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_DDRPLL	/;"	d
MC_CGM_ACn_SEL_ENETPLL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_ENETPLL	/;"	d
MC_CGM_ACn_SEL_EXTSRCPAD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_EXTSRCPAD	/;"	d
MC_CGM_ACn_SEL_FIRC	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_FIRC	/;"	d
MC_CGM_ACn_SEL_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_MASK	/;"	d
MC_CGM_ACn_SEL_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_OFFSET	/;"	d
MC_CGM_ACn_SEL_PERCLK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_PERCLK	/;"	d
MC_CGM_ACn_SEL_PERPLLDIVX	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_PERPLLDIVX	/;"	d
MC_CGM_ACn_SEL_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_SET(/;"	d
MC_CGM_ACn_SEL_SYSCLK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_SYSCLK	/;"	d
MC_CGM_ACn_SEL_VIDEOPLLDIVX	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_VIDEOPLLDIVX	/;"	d
MC_CGM_ACn_SEL_XOSC	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_ACn_SEL_XOSC	/;"	d
MC_CGM_SC_DCn_DE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_DCn_DE	/;"	d
MC_CGM_SC_DCn_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_DCn_PREDIV(/;"	d
MC_CGM_SC_DCn_PREDIV_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_DCn_PREDIV_MASK	/;"	d
MC_CGM_SC_DCn_PREDIV_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_DCn_PREDIV_OFFSET	/;"	d
MC_CGM_SC_SEL_ARMPLL	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_SEL_ARMPLL	/;"	d
MC_CGM_SC_SEL_CLKDISABLE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_SEL_CLKDISABLE	/;"	d
MC_CGM_SC_SEL_FIRC	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_SEL_FIRC	/;"	d
MC_CGM_SC_SEL_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_SEL_MASK	/;"	d
MC_CGM_SC_SEL_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_SEL_OFFSET	/;"	d
MC_CGM_SC_SEL_XOSC	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define MC_CGM_SC_SEL_XOSC	/;"	d
MC_CHIP_IO_OE_CNTL_AB	include/radeon.h	/^#define MC_CHIP_IO_OE_CNTL_AB	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CLK_INVA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CLK_INVA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CLK_INVA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CLK_SELA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CLK_SELA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A	/;"	d
MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_IO_MODEA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_IO_MODEA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_AA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_AA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_AA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_AA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_CKA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_CKA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_DQMA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_DQMA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_DQSA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_REC_DQSA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA__SHIFT	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA_MASK	/;"	d
MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CLK_INVB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CLK_INVB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CLK_INVB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CLK_SELB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CLK_SELB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B	/;"	d
MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_IO_MODEB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_IO_MODEB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_AB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_AB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_AB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_AB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_CKB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_CKB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_DQMB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_DQMB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_DQSB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_REC_DQSB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB__SHIFT	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB_MASK	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB_MASK	/;"	d
MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB__SHIFT	include/radeon.h	/^#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB__SHIFT	/;"	d
MC_CLKDIV	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV(/;"	d
MC_CLKDIV_10	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV_10(/;"	d
MC_CLKDIV_15	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV_15(/;"	d
MC_CLKDIV_20	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV_20(/;"	d
MC_CLKDIV_25	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV_25(/;"	d
MC_CLKDIV_MASK	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV_MASK	/;"	d
MC_CLKDIV_POS	drivers/net/xilinx_ll_temac.h	/^#define MC_CLKDIV_POS	/;"	d
MC_CMD_FLAG_INTR_DIS	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_FLAG_INTR_DIS	/;"	d
MC_CMD_FLAG_PRI	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_FLAG_PRI	/;"	d
MC_CMD_HDR_CMDID_O	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_CMDID_O	/;"	d
MC_CMD_HDR_CMDID_S	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_CMDID_S	/;"	d
MC_CMD_HDR_FLAGS_MASK	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_FLAGS_MASK	/;"	d
MC_CMD_HDR_FLAGS_O	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_FLAGS_O	/;"	d
MC_CMD_HDR_FLAGS_S	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_FLAGS_S	/;"	d
MC_CMD_HDR_READ_CMDID	drivers/net/fsl-mc/mc_sys.c	/^#define MC_CMD_HDR_READ_CMDID(/;"	d	file:
MC_CMD_HDR_READ_STATUS	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_READ_STATUS(/;"	d
MC_CMD_HDR_READ_TOKEN	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_READ_TOKEN(/;"	d
MC_CMD_HDR_STATUS_O	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_STATUS_O	/;"	d
MC_CMD_HDR_STATUS_S	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_STATUS_S	/;"	d
MC_CMD_HDR_TOKEN_O	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_TOKEN_O	/;"	d
MC_CMD_HDR_TOKEN_S	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_HDR_TOKEN_S	/;"	d
MC_CMD_NO_FLAGS	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_NO_FLAGS	/;"	d
MC_CMD_NUM_OF_PARAMS	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_NUM_OF_PARAMS	/;"	d
MC_CMD_OP	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_CMD_OP(/;"	d
MC_CMD_STATUS_AUTH_ERR	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_AUTH_ERR = 0x3, \/*!< Authentication error *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_BUSY	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_BUSY = 0xA, \/*!< Device is busy *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_CONFIG_ERR	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_CONFIG_ERR = 0x6, \/*!< Configuration error *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_DMA_ERR	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_DMA_ERR = 0x5, \/*!< DMA or I\/O error *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_INVALID_STATE	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_INVALID_STATE = 0xC \/*!< Invalid state *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_NO_MEMORY	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_NO_MEMORY = 0x9, \/*!< No memory available *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_NO_PRIVILEGE	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_NO_PRIVILEGE = 0x4, \/*!< No privilege *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_NO_RESOURCE	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_NO_RESOURCE = 0x8, \/*!< No resources *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_OK	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_OK = 0x0, \/*!< Completed successfully *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_READY	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_READY = 0x1, \/*!< Ready to be processed *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_TIMEOUT	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_TIMEOUT = 0x7, \/*!< Operation timed out *\/$/;"	e	enum:mc_cmd_status
MC_CMD_STATUS_UNSUPPORTED_OP	include/fsl-mc/fsl_mc_cmd.h	/^	MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, \/*!< Unsupported operation *\/$/;"	e	enum:mc_cmd_status
MC_CNTL	include/radeon.h	/^#define MC_CNTL	/;"	d
MC_DEBUG	include/radeon.h	/^#define MC_DEBUG	/;"	d
MC_ENQUEUE	drivers/net/smc91111.h	/^#define MC_ENQUEUE	/;"	d
MC_EXT_OP	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_EXT_OP(/;"	d
MC_FB_LOCATION	include/radeon.h	/^#define MC_FB_LOCATION	/;"	d
MC_FREEPKT	drivers/net/smc91111.h	/^#define MC_FREEPKT	/;"	d
MC_IND_DATA	include/radeon.h	/^#define MC_IND_DATA	/;"	d
MC_IND_DATA__MC_IND_DATA_MASK	include/radeon.h	/^#define MC_IND_DATA__MC_IND_DATA_MASK	/;"	d
MC_IND_INDEX	include/radeon.h	/^#define MC_IND_INDEX	/;"	d
MC_IND_INDEX__MC_IND_ADDR_MASK	include/radeon.h	/^#define MC_IND_INDEX__MC_IND_ADDR_MASK	/;"	d
MC_IND_INDEX__MC_IND_WR_EN	include/radeon.h	/^#define MC_IND_INDEX__MC_IND_WR_EN	/;"	d
MC_IND_INDEX__MC_IND_WR_EN_MASK	include/radeon.h	/^#define MC_IND_INDEX__MC_IND_WR_EN_MASK	/;"	d
MC_INIT_GFX_LAT_TIMER	include/radeon.h	/^#define MC_INIT_GFX_LAT_TIMER	/;"	d
MC_INIT_MISC_LAT_TIMER	include/radeon.h	/^#define MC_INIT_MISC_LAT_TIMER	/;"	d
MC_IOPAD_CNTL	include/radeon.h	/^#define MC_IOPAD_CNTL	/;"	d
MC_LPC_EN	arch/x86/include/asm/lpc_common.h	/^#define  MC_LPC_EN	/;"	d
MC_MDIOEN	drivers/net/xilinx_ll_temac.h	/^#define MC_MDIOEN	/;"	d
MC_MEM_SIZE_ENV_VAR	drivers/net/fsl-mc/mc.c	/^#define MC_MEM_SIZE_ENV_VAR	/;"	d	file:
MC_ME_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_ME_BASE_ADDR	/;"	d
MC_ME_CS	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_CS /;"	d
MC_ME_DRUN_MC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_DRUN_MC	/;"	d
MC_ME_DRUN_SEC_CC_I	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_DRUN_SEC_CC_I	/;"	d
MC_ME_GS	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS	/;"	d
MC_ME_GS_S_ARMPLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_ARMPLL	/;"	d
MC_ME_GS_S_CRT_MODE_DRUN	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_DRUN	/;"	d
MC_ME_GS_S_CRT_MODE_RESET	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_RESET	/;"	d
MC_ME_GS_S_CRT_MODE_RUN0	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_RUN0	/;"	d
MC_ME_GS_S_CRT_MODE_RUN1	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_RUN1	/;"	d
MC_ME_GS_S_CRT_MODE_RUN2	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_RUN2	/;"	d
MC_ME_GS_S_CRT_MODE_RUN3	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_RUN3	/;"	d
MC_ME_GS_S_CRT_MODE_TEST	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_CRT_MODE_TEST	/;"	d
MC_ME_GS_S_DDRPLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_DDRPLL	/;"	d
MC_ME_GS_S_ENETPLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_ENETPLL	/;"	d
MC_ME_GS_S_FIRC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_FIRC	/;"	d
MC_ME_GS_S_MTRANS	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_MTRANS	/;"	d
MC_ME_GS_S_MVR	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_MVR	/;"	d
MC_ME_GS_S_PDO	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_PDO	/;"	d
MC_ME_GS_S_PERPLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_PERPLL	/;"	d
MC_ME_GS_S_STSCLK_DISABLE	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_STSCLK_DISABLE	/;"	d
MC_ME_GS_S_SYSCLK_ARMPLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_SYSCLK_ARMPLL	/;"	d
MC_ME_GS_S_SYSCLK_FIRC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_SYSCLK_FIRC	/;"	d
MC_ME_GS_S_SYSCLK_FXOSC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_SYSCLK_FXOSC	/;"	d
MC_ME_GS_S_VIDEOPLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_VIDEOPLL	/;"	d
MC_ME_GS_S_XOSC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_GS_S_XOSC	/;"	d
MC_ME_MCTL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL	/;"	d
MC_ME_MCTL_DRUN	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_DRUN	/;"	d
MC_ME_MCTL_INVERTEDKEY	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_INVERTEDKEY	/;"	d
MC_ME_MCTL_KEY	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_KEY	/;"	d
MC_ME_MCTL_RESET	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_RESET	/;"	d
MC_ME_MCTL_RUN0	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_RUN0	/;"	d
MC_ME_MCTL_RUN1	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_RUN1	/;"	d
MC_ME_MCTL_RUN2	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_RUN2	/;"	d
MC_ME_MCTL_RUN3	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_RUN3	/;"	d
MC_ME_MCTL_TEST	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_MCTL_TEST	/;"	d
MC_ME_ME	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME	/;"	d
MC_ME_ME_DRUN	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_DRUN	/;"	d
MC_ME_ME_RESET_FUNC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_RESET_FUNC	/;"	d
MC_ME_ME_RUN0	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_RUN0	/;"	d
MC_ME_ME_RUN1	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_RUN1	/;"	d
MC_ME_ME_RUN2	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_RUN2	/;"	d
MC_ME_ME_RUN3	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_RUN3	/;"	d
MC_ME_ME_TEST	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_ME_TEST	/;"	d
MC_ME_PCTL100	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL100	/;"	d
MC_ME_PCTL104	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL104	/;"	d
MC_ME_PCTL116	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL116	/;"	d
MC_ME_PCTL120	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL120	/;"	d
MC_ME_PCTL160	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL160	/;"	d
MC_ME_PCTL161	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL161	/;"	d
MC_ME_PCTL162	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL162	/;"	d
MC_ME_PCTL166	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL166	/;"	d
MC_ME_PCTL170	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL170	/;"	d
MC_ME_PCTL182	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL182	/;"	d
MC_ME_PCTL184	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL184	/;"	d
MC_ME_PCTL186	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL186	/;"	d
MC_ME_PCTL188	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL188	/;"	d
MC_ME_PCTL190	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL190	/;"	d
MC_ME_PCTL192	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL192	/;"	d
MC_ME_PCTL194	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL194	/;"	d
MC_ME_PCTL204	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL204	/;"	d
MC_ME_PCTL206	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL206	/;"	d
MC_ME_PCTL208	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL208	/;"	d
MC_ME_PCTL212	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL212	/;"	d
MC_ME_PCTL216	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL216	/;"	d
MC_ME_PCTL220	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL220	/;"	d
MC_ME_PCTL236	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL236	/;"	d
MC_ME_PCTL39	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL39	/;"	d
MC_ME_PCTL40	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL40	/;"	d
MC_ME_PCTL48	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL48	/;"	d
MC_ME_PCTL49	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL49	/;"	d
MC_ME_PCTL50	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL50	/;"	d
MC_ME_PCTL52	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL52	/;"	d
MC_ME_PCTL54	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL54	/;"	d
MC_ME_PCTL58	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL58	/;"	d
MC_ME_PCTL77	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL77	/;"	d
MC_ME_PCTL79	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL79	/;"	d
MC_ME_PCTL81	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL81	/;"	d
MC_ME_PCTL83	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL83	/;"	d
MC_ME_PCTL85	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL85	/;"	d
MC_ME_PCTL87	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL87	/;"	d
MC_ME_PCTL89	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL89	/;"	d
MC_ME_PCTL91	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL91	/;"	d
MC_ME_PCTL93	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTL93	/;"	d
MC_ME_PCTLn_RUNPCm	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTLn_RUNPCm(/;"	d
MC_ME_PCTLn_RUNPCm_MASK	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_PCTLn_RUNPCm_MASK	/;"	d
MC_ME_RESET_MC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RESET_MC	/;"	d
MC_ME_RUNMODE_MC_FIRCON	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_FIRCON	/;"	d
MC_ME_RUNMODE_MC_MVRON	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_MVRON	/;"	d
MC_ME_RUNMODE_MC_PDO	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_PDO	/;"	d
MC_ME_RUNMODE_MC_PLL	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_PLL(/;"	d
MC_ME_RUNMODE_MC_PWRLVL0	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_PWRLVL0	/;"	d
MC_ME_RUNMODE_MC_PWRLVL1	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_PWRLVL1	/;"	d
MC_ME_RUNMODE_MC_PWRLVL2	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_PWRLVL2	/;"	d
MC_ME_RUNMODE_MC_SYSCLK	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_SYSCLK(/;"	d
MC_ME_RUNMODE_MC_SYSCLK_MASK	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_SYSCLK_MASK	/;"	d
MC_ME_RUNMODE_MC_XOSCON	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_MC_XOSCON	/;"	d
MC_ME_RUNMODE_SEC_CC_I_SYSCLK	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK(/;"	d
MC_ME_RUNMODE_SEC_CC_I_SYSCLK1_OFFSET	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK1_OFFSET	/;"	d
MC_ME_RUNMODE_SEC_CC_I_SYSCLK2_OFFSET	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK2_OFFSET	/;"	d
MC_ME_RUNMODE_SEC_CC_I_SYSCLK3_OFFSET	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK3_OFFSET	/;"	d
MC_ME_RUNMODE_SEC_CC_I_SYSCLK_MASK	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK_MASK	/;"	d
MC_ME_RUN_PCn	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn(/;"	d
MC_ME_RUN_PCn_DRUN	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_DRUN	/;"	d
MC_ME_RUN_PCn_RESET	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_RESET	/;"	d
MC_ME_RUN_PCn_RUN0	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_RUN0	/;"	d
MC_ME_RUN_PCn_RUN1	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_RUN1	/;"	d
MC_ME_RUN_PCn_RUN2	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_RUN2	/;"	d
MC_ME_RUN_PCn_RUN3	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_RUN3	/;"	d
MC_ME_RUN_PCn_TEST	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUN_PCn_TEST	/;"	d
MC_ME_RUNn_MC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNn_MC(/;"	d
MC_ME_RUNn_SEC_CC_I	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_RUNn_SEC_CC_I(/;"	d
MC_ME_TEST_MC	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define MC_ME_TEST_MC	/;"	d
MC_NOP	drivers/net/smc91111.h	/^#define MC_NOP	/;"	d
MC_PCU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_PCU_BASE_ADDR	/;"	d
MC_PORTAL_OFFSET_TO_PORTAL_ID	include/fsl-mc/fsl_mc.h	/^#define MC_PORTAL_OFFSET_TO_PORTAL_ID(/;"	d
MC_PREP_OP	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_PREP_OP(/;"	d
MC_RAM_BASE_ADDR_ALIGNMENT	drivers/net/fsl-mc/mc.c	/^#define MC_RAM_BASE_ADDR_ALIGNMENT /;"	d	file:
MC_RAM_BASE_ADDR_ALIGNMENT_MASK	drivers/net/fsl-mc/mc.c	/^#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK	/;"	d	file:
MC_RAM_SIZE_ALIGNMENT	drivers/net/fsl-mc/mc.c	/^#define MC_RAM_SIZE_ALIGNMENT	/;"	d	file:
MC_READ_CNTL_AB	include/radeon.h	/^#define MC_READ_CNTL_AB	/;"	d
MC_RELEASE	drivers/net/smc91111.h	/^#define MC_RELEASE	/;"	d
MC_REMOVE	drivers/net/smc91111.h	/^#define	MC_REMOVE	/;"	d
MC_RESET	drivers/net/smc91111.h	/^#define	MC_RESET	/;"	d
MC_RGM_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MC_RGM_BASE_ADDR	/;"	d
MC_RGM_DDR_HE	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_DDR_HE	/;"	d
MC_RGM_DDR_HS	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_DDR_HS	/;"	d
MC_RGM_DES	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_DES	/;"	d
MC_RGM_DRET	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_DRET	/;"	d
MC_RGM_FBRE	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FBRE	/;"	d
MC_RGM_FERD	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FERD	/;"	d
MC_RGM_FES	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FES	/;"	d
MC_RGM_FESS	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FESS	/;"	d
MC_RGM_FREC	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FREC	/;"	d
MC_RGM_FRET	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FRET	/;"	d
MC_RGM_FRHE	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define MC_RGM_FRHE	/;"	d
MC_RSP_OP	include/fsl-mc/fsl_mc_cmd.h	/^#define MC_RSP_OP(/;"	d
MC_RSTTXFIFO	drivers/net/smc91111.h	/^#define MC_RSTTXFIFO	/;"	d
MC_STATUS	include/radeon.h	/^#define MC_STATUS	/;"	d
MC_STATUS__DUMMY_OUT_R_BACK	include/radeon.h	/^#define MC_STATUS__DUMMY_OUT_R_BACK	/;"	d
MC_STATUS__DUMMY_OUT_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__DUMMY_OUT_R_BACK_MASK	/;"	d
MC_STATUS__IMP_N_VALUE_A_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__IMP_N_VALUE_A_R_BACK_MASK	/;"	d
MC_STATUS__IMP_N_VALUE_CK_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__IMP_N_VALUE_CK_R_BACK_MASK	/;"	d
MC_STATUS__IMP_N_VALUE_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__IMP_N_VALUE_R_BACK_MASK	/;"	d
MC_STATUS__IMP_P_VALUE_A_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__IMP_P_VALUE_A_R_BACK_MASK	/;"	d
MC_STATUS__IMP_P_VALUE_CK_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__IMP_P_VALUE_CK_R_BACK_MASK	/;"	d
MC_STATUS__IMP_P_VALUE_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__IMP_P_VALUE_R_BACK_MASK	/;"	d
MC_STATUS__MC_IDLE	include/radeon.h	/^#define MC_STATUS__MC_IDLE	/;"	d
MC_STATUS__MC_IDLE_MASK	include/radeon.h	/^#define MC_STATUS__MC_IDLE_MASK	/;"	d
MC_STATUS__MEM_PWRUP_COMPL_A	include/radeon.h	/^#define MC_STATUS__MEM_PWRUP_COMPL_A	/;"	d
MC_STATUS__MEM_PWRUP_COMPL_A_MASK	include/radeon.h	/^#define MC_STATUS__MEM_PWRUP_COMPL_A_MASK	/;"	d
MC_STATUS__MEM_PWRUP_COMPL_B	include/radeon.h	/^#define MC_STATUS__MEM_PWRUP_COMPL_B	/;"	d
MC_STATUS__MEM_PWRUP_COMPL_B_MASK	include/radeon.h	/^#define MC_STATUS__MEM_PWRUP_COMPL_B_MASK	/;"	d
MC_STATUS__TEST_OUT_R_BACK	include/radeon.h	/^#define MC_STATUS__TEST_OUT_R_BACK	/;"	d
MC_STATUS__TEST_OUT_R_BACK_MASK	include/radeon.h	/^#define MC_STATUS__TEST_OUT_R_BACK_MASK	/;"	d
MC_TIMING_CNTL	include/radeon.h	/^#define MC_TIMING_CNTL	/;"	d
MC_VER_MAJOR	include/fsl-mc/fsl_dpmng.h	/^#define MC_VER_MAJOR /;"	d
MC_VER_MINOR	include/fsl-mc/fsl_dpmng.h	/^#define MC_VER_MINOR /;"	d
MD5Context	include/u-boot/md5.h	/^struct MD5Context {$/;"	s
MD5Final	lib/md5.c	/^MD5Final(unsigned char digest[16], struct MD5Context *ctx)$/;"	f	typeref:typename:void	file:
MD5Init	lib/md5.c	/^MD5Init(struct MD5Context *ctx)$/;"	f	typeref:typename:void	file:
MD5STEP	lib/md5.c	/^#define MD5STEP(/;"	d	file:
MD5Transform	lib/md5.c	/^MD5Transform(__u32 buf[4], __u32 const in[16])$/;"	f	typeref:typename:void	file:
MD5Update	lib/md5.c	/^MD5Update(struct MD5Context *ctx, unsigned char const *buf, unsigned len)$/;"	f	typeref:typename:void	file:
MDATA_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MDATA_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MDATA_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
MDC	include/configs/MPC8560ADS.h	/^#define MDC(/;"	d
MDCAS	include/SA-1100.h	/^#define MDCAS	/;"	d
MDCAS0	include/SA-1100.h	/^#define MDCAS0	/;"	d
MDCAS1	include/SA-1100.h	/^#define MDCAS1	/;"	d
MDCAS2	include/SA-1100.h	/^#define MDCAS2	/;"	d
MDCCLKPAT	drivers/net/ax88180.h	/^#define MDCCLKPAT	/;"	d
MDCDIV	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	MDCDIV	/;"	d
MDCLKH	drivers/net/uli526x.c	/^#define MDCLKH	/;"	d	file:
MDCNFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MDCNFG	/;"	d
MDCNFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG	/;"	d
MDCNFG	include/SA-1100.h	/^#define MDCNFG	/;"	d
MDCNFG_CDB2	include/SA-1100.h	/^#define MDCNFG_CDB2	/;"	d
MDCNFG_CeilPrChrg	include/SA-1100.h	/^#define MDCNFG_CeilPrChrg(/;"	d
MDCNFG_CeilRef	include/SA-1100.h	/^#define MDCNFG_CeilRef(/;"	d
MDCNFG_DBW_16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DBW_16	/;"	d
MDCNFG_DCAC_10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DCAC_10	/;"	d
MDCNFG_DCAC_11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DCAC_11	/;"	d
MDCNFG_DCAC_9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DCAC_9	/;"	d
MDCNFG_DCSE0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DCSE0	/;"	d
MDCNFG_DCSE1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DCSE1	/;"	d
MDCNFG_DE	include/SA-1100.h	/^#define MDCNFG_DE(/;"	d
MDCNFG_DE0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DE0	/;"	d
MDCNFG_DE0	include/SA-1100.h	/^#define MDCNFG_DE0	/;"	d
MDCNFG_DE1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DE1	/;"	d
MDCNFG_DE1	include/SA-1100.h	/^#define MDCNFG_DE1	/;"	d
MDCNFG_DE2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DE2	/;"	d
MDCNFG_DE2	include/SA-1100.h	/^#define MDCNFG_DE2	/;"	d
MDCNFG_DE3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DE3	/;"	d
MDCNFG_DE3	include/SA-1100.h	/^#define MDCNFG_DE3	/;"	d
MDCNFG_DMAP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DMAP	/;"	d
MDCNFG_DMCEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DMCEN	/;"	d
MDCNFG_DRAC	include/SA-1100.h	/^#define MDCNFG_DRAC	/;"	d
MDCNFG_DRAC_12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DRAC_12	/;"	d
MDCNFG_DRAC_13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DRAC_13	/;"	d
MDCNFG_DRAC_14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DRAC_14	/;"	d
MDCNFG_DRI	include/SA-1100.h	/^#define MDCNFG_DRI	/;"	d
MDCNFG_DTC_0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DTC_0	/;"	d
MDCNFG_DTC_1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DTC_1	/;"	d
MDCNFG_DTC_2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DTC_2	/;"	d
MDCNFG_DTC_3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DTC_3	/;"	d
MDCNFG_DTYPE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DTYPE	/;"	d
MDCNFG_DWID0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_DWID0	/;"	d
MDCNFG_DataLtch	include/SA-1100.h	/^#define MDCNFG_DataLtch(/;"	d
MDCNFG_HWFREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_HWFREQ	/;"	d
MDCNFG_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDCNFG_OFFSET	/;"	d
MDCNFG_PrChrg	include/SA-1100.h	/^#define MDCNFG_PrChrg(/;"	d
MDCNFG_Ref	include/SA-1100.h	/^#define MDCNFG_Ref(/;"	d
MDCNFG_RefInt	include/SA-1100.h	/^#define MDCNFG_RefInt(/;"	d
MDCNFG_RowAdd	include/SA-1100.h	/^#define MDCNFG_RowAdd(/;"	d
MDCNFG_SA1110_CDB20	include/SA-1100.h	/^#define MDCNFG_SA1110_CDB20	/;"	d
MDCNFG_SA1110_CDB22	include/SA-1100.h	/^#define MDCNFG_SA1110_CDB22	/;"	d
MDCNFG_SA1110_DE0	include/SA-1100.h	/^#define MDCNFG_SA1110_DE0	/;"	d
MDCNFG_SA1110_DE1	include/SA-1100.h	/^#define MDCNFG_SA1110_DE1	/;"	d
MDCNFG_SA1110_DE2	include/SA-1100.h	/^#define MDCNFG_SA1110_DE2	/;"	d
MDCNFG_SA1110_DE3	include/SA-1100.h	/^#define MDCNFG_SA1110_DE3	/;"	d
MDCNFG_SA1110_DRAC0	include/SA-1100.h	/^#define MDCNFG_SA1110_DRAC0	/;"	d
MDCNFG_SA1110_DRAC2	include/SA-1100.h	/^#define MDCNFG_SA1110_DRAC2	/;"	d
MDCNFG_SA1110_DTIM0	include/SA-1100.h	/^#define MDCNFG_SA1110_DTIM0	/;"	d
MDCNFG_SA1110_DTIM2	include/SA-1100.h	/^#define MDCNFG_SA1110_DTIM2	/;"	d
MDCNFG_SA1110_DWID0	include/SA-1100.h	/^#define MDCNFG_SA1110_DWID0	/;"	d
MDCNFG_SA1110_DWID2	include/SA-1100.h	/^#define MDCNFG_SA1110_DWID2	/;"	d
MDCNFG_SA1110_TDL0	include/SA-1100.h	/^#define MDCNFG_SA1110_TDL0	/;"	d
MDCNFG_SA1110_TDL2	include/SA-1100.h	/^#define MDCNFG_SA1110_TDL2	/;"	d
MDCNFG_SA1110_TRP0	include/SA-1100.h	/^#define MDCNFG_SA1110_TRP0	/;"	d
MDCNFG_SA1110_TRP2	include/SA-1100.h	/^#define MDCNFG_SA1110_TRP2	/;"	d
MDCNFG_SA1110_TWR0	include/SA-1100.h	/^#define MDCNFG_SA1110_TWR0	/;"	d
MDCNFG_SA1110_TWR2	include/SA-1100.h	/^#define MDCNFG_SA1110_TWR2	/;"	d
MDCNFG_TDL	include/SA-1100.h	/^#define MDCNFG_TDL	/;"	d
MDCNFG_TRASR	include/SA-1100.h	/^#define MDCNFG_TRASR	/;"	d
MDCNFG_TRP	include/SA-1100.h	/^#define MDCNFG_TRP	/;"	d
MDCTL_DDR2	arch/arm/mach-davinci/lowlevel_init.S	/^MDCTL_DDR2:$/;"	l
MDCTL_GEM	arch/arm/mach-davinci/lowlevel_init.S	/^MDCTL_GEM:$/;"	l
MDCTL_SDE0	include/fsl_mmdc.h	/^#define MDCTL_SDE0	/;"	d
MDCTL_SDE1	include/fsl_mmdc.h	/^#define MDCTL_SDE1	/;"	d
MDC_DECLARE	include/configs/MPC8560ADS.h	/^#define MDC_DECLARE	/;"	d
MDC_FREQ_TO_DIV	drivers/net/bfin_mac.c	/^#define MDC_FREQ_TO_DIV(/;"	d	file:
MDDRC_REFRESH_ZERO_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define MDDRC_REFRESH_ZERO_MASK	/;"	d
MDDRC_SYS_CFG_CKE_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define MDDRC_SYS_CFG_CKE_MASK	/;"	d
MDDRC_SYS_CFG_CMD_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define MDDRC_SYS_CFG_CMD_MASK	/;"	d
MDDRC_SYS_CFG_EN	arch/powerpc/include/asm/immap_512x.h	/^#define MDDRC_SYS_CFG_EN	/;"	d
MDDRENABLE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define MDDRENABLE	/;"	d
MDDR_EN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define MDDR_EN	/;"	d
MDDR_LPDDR2_BL_16	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define MDDR_LPDDR2_BL_16	/;"	d
MDDR_LPDDR2_BL_2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define MDDR_LPDDR2_BL_2	/;"	d
MDDR_LPDDR2_BL_4	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define MDDR_LPDDR2_BL_4	/;"	d
MDDR_LPDDR2_BL_8	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define MDDR_LPDDR2_BL_8	/;"	d
MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT	/;"	d
MDEDebug	include/mpc5xxx.h	/^	volatile u32 MDEDebug;		\/* SDMA + 0x68 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
MDFS_CLK_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define MDFS_CLK_DEFAULT	/;"	d
MDFS_CLK_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define MDFS_CLK_DEFAULT	/;"	d
MDFS_CLK_DEFAULT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define MDFS_CLK_DEFAULT	/;"	d
MDFS_CLK_DEFAULT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define MDFS_CLK_DEFAULT	/;"	d
MDHA_CMD_CI	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CMD_CI	/;"	d
MDHA_CMD_GO	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CMD_GO	/;"	d
MDHA_CMD_RI	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CMD_RI	/;"	d
MDHA_CMD_SWR	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CMD_SWR	/;"	d
MDHA_CR_DMA	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CR_DMA	/;"	d
MDHA_CR_DMAL	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CR_DMAL(/;"	d
MDHA_CR_DMAL_MASK	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CR_DMAL_MASK	/;"	d
MDHA_CR_END	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CR_END	/;"	d
MDHA_CR_IE	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_CR_IE	/;"	d
MDHA_ISR_DRL	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_DRL	/;"	d
MDHA_ISR_DSE	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_DSE	/;"	d
MDHA_ISR_ERE	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_ERE	/;"	d
MDHA_ISR_GTDS	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_GTDS	/;"	d
MDHA_ISR_IFO	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_IFO	/;"	d
MDHA_ISR_IME	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_IME	/;"	d
MDHA_ISR_NEIF	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_NEIF	/;"	d
MDHA_ISR_RMDP	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_ISR_RMDP	/;"	d
MDHA_MR_ALG	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_ALG	/;"	d
MDHA_MR_INIT	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_INIT	/;"	d
MDHA_MR_IPAD	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_IPAD	/;"	d
MDHA_MR_MAC	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_MAC(/;"	d
MDHA_MR_MACFUL	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_MACFUL	/;"	d
MDHA_MR_MAC_EHMAC	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_MAC_EHMAC	/;"	d
MDHA_MR_MAC_HMAC	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_MAC_HMAC	/;"	d
MDHA_MR_MAC_MASK	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_MAC_MASK	/;"	d
MDHA_MR_MAC_NONE	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_MAC_NONE	/;"	d
MDHA_MR_OPAD	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_OPAD	/;"	d
MDHA_MR_PDATA	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_PDATA	/;"	d
MDHA_MR_SSL	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_SSL	/;"	d
MDHA_MR_SWAP	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_MR_SWAP	/;"	d
MDHA_SR_APD	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_APD(/;"	d
MDHA_SR_APD_MASK	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_APD_MASK	/;"	d
MDHA_SR_BUSY	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_BUSY	/;"	d
MDHA_SR_DONE	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_DONE	/;"	d
MDHA_SR_ERR	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_ERR	/;"	d
MDHA_SR_FS	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_FS(/;"	d
MDHA_SR_FS_MASK	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_FS_MASK	/;"	d
MDHA_SR_GNW	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_GNW	/;"	d
MDHA_SR_HSH	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_HSH	/;"	d
MDHA_SR_IFL	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_IFL(/;"	d
MDHA_SR_IFL_MASK	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_IFL_MASK	/;"	d
MDHA_SR_INT	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_INT	/;"	d
MDHA_SR_RD	arch/m68k/include/asm/coldfire/mdha.h	/^#define MDHA_SR_RD	/;"	d
MDIO	include/configs/MPC8560ADS.h	/^#define MDIO(/;"	d
MDIOCTRL	drivers/net/ax88180.h	/^#define MDIOCTRL	/;"	d
MDIODP	drivers/net/ax88180.h	/^#define MDIODP	/;"	d
MDIO_ACTIVE	include/configs/MPC8560ADS.h	/^#define MDIO_ACTIVE	/;"	d
MDIO_AN_10GBT_CTRL	include/linux/mdio.h	/^#define MDIO_AN_10GBT_CTRL	/;"	d
MDIO_AN_10GBT_CTRL_ADV10G	include/linux/mdio.h	/^#define MDIO_AN_10GBT_CTRL_ADV10G	/;"	d
MDIO_AN_10GBT_STAT	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT	/;"	d
MDIO_AN_10GBT_STAT_LOCOK	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_LOCOK	/;"	d
MDIO_AN_10GBT_STAT_LP10G	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_LP10G	/;"	d
MDIO_AN_10GBT_STAT_LPLTABLE	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_LPLTABLE	/;"	d
MDIO_AN_10GBT_STAT_LPTRR	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_LPTRR	/;"	d
MDIO_AN_10GBT_STAT_MS	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_MS	/;"	d
MDIO_AN_10GBT_STAT_MSFLT	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_MSFLT	/;"	d
MDIO_AN_10GBT_STAT_REMOK	include/linux/mdio.h	/^#define MDIO_AN_10GBT_STAT_REMOK	/;"	d
MDIO_AN_ADVERTISE	include/linux/mdio.h	/^#define MDIO_AN_ADVERTISE	/;"	d
MDIO_AN_CTRL1_ENABLE	include/linux/mdio.h	/^#define MDIO_AN_CTRL1_ENABLE	/;"	d
MDIO_AN_CTRL1_RESTART	include/linux/mdio.h	/^#define MDIO_AN_CTRL1_RESTART	/;"	d
MDIO_AN_CTRL1_XNP	include/linux/mdio.h	/^#define MDIO_AN_CTRL1_XNP	/;"	d
MDIO_AN_EEE_ADV	include/linux/mdio.h	/^#define MDIO_AN_EEE_ADV	/;"	d
MDIO_AN_EEE_ADV_1000T	include/linux/mdio.h	/^#define MDIO_AN_EEE_ADV_1000T	/;"	d
MDIO_AN_EEE_ADV_100TX	include/linux/mdio.h	/^#define MDIO_AN_EEE_ADV_100TX	/;"	d
MDIO_AN_LPA	include/linux/mdio.h	/^#define MDIO_AN_LPA	/;"	d
MDIO_AN_STAT1_ABLE	include/linux/mdio.h	/^#define MDIO_AN_STAT1_ABLE	/;"	d
MDIO_AN_STAT1_COMPLETE	include/linux/mdio.h	/^#define MDIO_AN_STAT1_COMPLETE	/;"	d
MDIO_AN_STAT1_LPABLE	include/linux/mdio.h	/^#define MDIO_AN_STAT1_LPABLE	/;"	d
MDIO_AN_STAT1_PAGE	include/linux/mdio.h	/^#define MDIO_AN_STAT1_PAGE	/;"	d
MDIO_AN_STAT1_RFAULT	include/linux/mdio.h	/^#define MDIO_AN_STAT1_RFAULT	/;"	d
MDIO_AN_STAT1_XNP	include/linux/mdio.h	/^#define MDIO_AN_STAT1_XNP	/;"	d
MDIO_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define MDIO_BASE_ADDR	/;"	d
MDIO_BASE_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define MDIO_BASE_ADDR	/;"	d
MDIO_BASE_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define MDIO_BASE_ADDR	/;"	d
MDIO_BASE_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define MDIO_BASE_ADDR	/;"	d
MDIO_CLOCK_DIV	drivers/net/xilinx_ll_temac_mdio.c	/^#define MDIO_CLOCK_DIV	/;"	d	file:
MDIO_CMD_MII_BUSY	drivers/net/sun8i_emac.c	/^#define MDIO_CMD_MII_BUSY	/;"	d	file:
MDIO_CMD_MII_PHY_ADDR_MASK	drivers/net/sun8i_emac.c	/^#define MDIO_CMD_MII_PHY_ADDR_MASK	/;"	d	file:
MDIO_CMD_MII_PHY_ADDR_SHIFT	drivers/net/sun8i_emac.c	/^#define MDIO_CMD_MII_PHY_ADDR_SHIFT	/;"	d	file:
MDIO_CMD_MII_PHY_REG_ADDR_MASK	drivers/net/sun8i_emac.c	/^#define MDIO_CMD_MII_PHY_REG_ADDR_MASK	/;"	d	file:
MDIO_CMD_MII_PHY_REG_ADDR_SHIFT	drivers/net/sun8i_emac.c	/^#define MDIO_CMD_MII_PHY_REG_ADDR_SHIFT	/;"	d	file:
MDIO_CMD_MII_WRITE	drivers/net/sun8i_emac.c	/^#define MDIO_CMD_MII_WRITE	/;"	d	file:
MDIO_CONTROL_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_CONTROL_ENABLE	/;"	d
MDIO_CONTROL_ENABLE	drivers/net/davinci_emac.h	/^#define MDIO_CONTROL_ENABLE	/;"	d
MDIO_CONTROL_FAULT	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_CONTROL_FAULT	/;"	d
MDIO_CONTROL_FAULT	drivers/net/davinci_emac.h	/^#define MDIO_CONTROL_FAULT	/;"	d
MDIO_CONTROL_FAULT_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_CONTROL_FAULT_ENABLE	/;"	d
MDIO_CONTROL_FAULT_ENABLE	drivers/net/davinci_emac.h	/^#define MDIO_CONTROL_FAULT_ENABLE	/;"	d
MDIO_CONTROL_IDLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_CONTROL_IDLE	/;"	d
MDIO_CONTROL_IDLE	drivers/net/davinci_emac.h	/^#define MDIO_CONTROL_IDLE	/;"	d
MDIO_CTL_DEV_ADDR	include/fsl_memac.h	/^#define MDIO_CTL_DEV_ADDR(/;"	d
MDIO_CTL_DEV_ADDR	include/fsl_tgec.h	/^#define MDIO_CTL_DEV_ADDR(/;"	d
MDIO_CTL_PORT_ADDR	include/fsl_memac.h	/^#define MDIO_CTL_PORT_ADDR(/;"	d
MDIO_CTL_PORT_ADDR	include/fsl_tgec.h	/^#define MDIO_CTL_PORT_ADDR(/;"	d
MDIO_CTL_POST_INC	include/fsl_memac.h	/^#define MDIO_CTL_POST_INC	/;"	d
MDIO_CTL_POST_INC	include/fsl_tgec.h	/^#define MDIO_CTL_POST_INC	/;"	d
MDIO_CTL_PRE_DIS	include/fsl_memac.h	/^#define MDIO_CTL_PRE_DIS	/;"	d
MDIO_CTL_PRE_DIS	include/fsl_tgec.h	/^#define MDIO_CTL_PRE_DIS	/;"	d
MDIO_CTL_READ	include/fsl_memac.h	/^#define MDIO_CTL_READ	/;"	d
MDIO_CTL_READ	include/fsl_tgec.h	/^#define MDIO_CTL_READ	/;"	d
MDIO_CTL_SCAN_EN	include/fsl_memac.h	/^#define MDIO_CTL_SCAN_EN	/;"	d
MDIO_CTL_SCAN_EN	include/fsl_tgec.h	/^#define MDIO_CTL_SCAN_EN	/;"	d
MDIO_CTRL1	include/linux/mdio.h	/^#define MDIO_CTRL1	/;"	d
MDIO_CTRL1_FULLDPLX	include/linux/mdio.h	/^#define MDIO_CTRL1_FULLDPLX	/;"	d
MDIO_CTRL1_LPOWER	include/linux/mdio.h	/^#define MDIO_CTRL1_LPOWER	/;"	d
MDIO_CTRL1_RESET	include/linux/mdio.h	/^#define MDIO_CTRL1_RESET	/;"	d
MDIO_CTRL1_SPEED10G	include/linux/mdio.h	/^#define MDIO_CTRL1_SPEED10G	/;"	d
MDIO_CTRL1_SPEED10P2B	include/linux/mdio.h	/^#define MDIO_CTRL1_SPEED10P2B	/;"	d
MDIO_CTRL1_SPEEDSEL	include/linux/mdio.h	/^#define MDIO_CTRL1_SPEEDSEL	/;"	d
MDIO_CTRL1_SPEEDSELEXT	include/linux/mdio.h	/^#define MDIO_CTRL1_SPEEDSELEXT	/;"	d
MDIO_CTRL2	include/linux/mdio.h	/^#define MDIO_CTRL2	/;"	d
MDIO_D	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MDIO_D	/;"	d
MDIO_DATA	include/fsl_memac.h	/^#define MDIO_DATA(/;"	d
MDIO_DATA	include/fsl_tgec.h	/^#define MDIO_DATA(/;"	d
MDIO_DATA_BSY	include/fsl_memac.h	/^#define MDIO_DATA_BSY	/;"	d
MDIO_DATA_BSY	include/fsl_tgec.h	/^#define MDIO_DATA_BSY	/;"	d
MDIO_DECLARE	include/configs/MPC8560ADS.h	/^#define MDIO_DECLARE	/;"	d
MDIO_DEVAD_NONE	include/linux/mdio.h	/^#define MDIO_DEVAD_NONE	/;"	d
MDIO_DEVID1	include/linux/mdio.h	/^#define MDIO_DEVID1	/;"	d
MDIO_DEVID2	include/linux/mdio.h	/^#define MDIO_DEVID2	/;"	d
MDIO_DEVS1	include/linux/mdio.h	/^#define MDIO_DEVS1	/;"	d
MDIO_DEVS2	include/linux/mdio.h	/^#define MDIO_DEVS2	/;"	d
MDIO_DEVS_AN	include/linux/mdio.h	/^#define MDIO_DEVS_AN	/;"	d
MDIO_DEVS_C22EXT	include/linux/mdio.h	/^#define MDIO_DEVS_C22EXT	/;"	d
MDIO_DEVS_DTEXS	include/linux/mdio.h	/^#define MDIO_DEVS_DTEXS	/;"	d
MDIO_DEVS_LINK	include/linux/mdio.h	/^#define MDIO_DEVS_LINK	/;"	d
MDIO_DEVS_PCS	include/linux/mdio.h	/^#define MDIO_DEVS_PCS	/;"	d
MDIO_DEVS_PHYXS	include/linux/mdio.h	/^#define MDIO_DEVS_PHYXS	/;"	d
MDIO_DEVS_PMAPMD	include/linux/mdio.h	/^#define MDIO_DEVS_PMAPMD	/;"	d
MDIO_DEVS_PRESENT	include/linux/mdio.h	/^#define MDIO_DEVS_PRESENT(/;"	d
MDIO_DEVS_TC	include/linux/mdio.h	/^#define MDIO_DEVS_TC	/;"	d
MDIO_DEVS_VEND1	include/linux/mdio.h	/^#define MDIO_DEVS_VEND1	/;"	d
MDIO_DEVS_VEND2	include/linux/mdio.h	/^#define MDIO_DEVS_VEND2	/;"	d
MDIO_DEVS_WIS	include/linux/mdio.h	/^#define MDIO_DEVS_WIS	/;"	d
MDIO_Data	drivers/net/ns8382x.c	/^	MDIO_Data = 0x0010,$/;"	e	enum:mii_reg_bits	file:
MDIO_EMULATE_C22	include/linux/mdio.h	/^#define MDIO_EMULATE_C22	/;"	d
MDIO_EnbIn	drivers/net/ns8382x.c	/^#define MDIO_EnbIn /;"	d	file:
MDIO_EnbOutput	drivers/net/ns8382x.c	/^	MDIO_EnbOutput = 0x0020,$/;"	e	enum:mii_reg_bits	file:
MDIO_MCLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MDIO_MCLK	/;"	d
MDIO_MMD_AN	include/linux/mdio.h	/^#define MDIO_MMD_AN	/;"	d
MDIO_MMD_C22EXT	include/linux/mdio.h	/^#define MDIO_MMD_C22EXT	/;"	d
MDIO_MMD_DTEXS	include/linux/mdio.h	/^#define MDIO_MMD_DTEXS	/;"	d
MDIO_MMD_PCS	include/linux/mdio.h	/^#define MDIO_MMD_PCS	/;"	d
MDIO_MMD_PHYXS	include/linux/mdio.h	/^#define MDIO_MMD_PHYXS	/;"	d
MDIO_MMD_PMAPMD	include/linux/mdio.h	/^#define MDIO_MMD_PMAPMD	/;"	d
MDIO_MMD_TC	include/linux/mdio.h	/^#define MDIO_MMD_TC	/;"	d
MDIO_MMD_VEND1	include/linux/mdio.h	/^#define MDIO_MMD_VEND1	/;"	d
MDIO_MMD_VEND2	include/linux/mdio.h	/^#define MDIO_MMD_VEND2	/;"	d
MDIO_MMD_WIS	include/linux/mdio.h	/^#define MDIO_MMD_WIS	/;"	d
MDIO_NAME_LEN	include/phy.h	/^#define MDIO_NAME_LEN /;"	d
MDIO_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define MDIO_PAD_CTRL /;"	d	file:
MDIO_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define MDIO_PAD_CTRL /;"	d	file:
MDIO_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define MDIO_PAD_CTRL /;"	d	file:
MDIO_PCS_10GBRT_STAT1	include/linux/mdio.h	/^#define MDIO_PCS_10GBRT_STAT1	/;"	d
MDIO_PCS_10GBRT_STAT1_BLKLK	include/linux/mdio.h	/^#define MDIO_PCS_10GBRT_STAT1_BLKLK	/;"	d
MDIO_PCS_10GBRT_STAT2	include/linux/mdio.h	/^#define MDIO_PCS_10GBRT_STAT2	/;"	d
MDIO_PCS_10GBRT_STAT2_BER	include/linux/mdio.h	/^#define MDIO_PCS_10GBRT_STAT2_BER	/;"	d
MDIO_PCS_10GBRT_STAT2_ERR	include/linux/mdio.h	/^#define MDIO_PCS_10GBRT_STAT2_ERR	/;"	d
MDIO_PCS_10GBX_STAT1	include/linux/mdio.h	/^#define MDIO_PCS_10GBX_STAT1	/;"	d
MDIO_PCS_CTRL1_LOOPBACK	include/linux/mdio.h	/^#define MDIO_PCS_CTRL1_LOOPBACK	/;"	d
MDIO_PCS_CTRL2_10GBR	include/linux/mdio.h	/^#define MDIO_PCS_CTRL2_10GBR	/;"	d
MDIO_PCS_CTRL2_10GBT	include/linux/mdio.h	/^#define MDIO_PCS_CTRL2_10GBT	/;"	d
MDIO_PCS_CTRL2_10GBW	include/linux/mdio.h	/^#define MDIO_PCS_CTRL2_10GBW	/;"	d
MDIO_PCS_CTRL2_10GBX	include/linux/mdio.h	/^#define MDIO_PCS_CTRL2_10GBX	/;"	d
MDIO_PCS_CTRL2_TYPE	include/linux/mdio.h	/^#define MDIO_PCS_CTRL2_TYPE	/;"	d
MDIO_PCS_SPEED_10P2B	include/linux/mdio.h	/^#define MDIO_PCS_SPEED_10P2B	/;"	d
MDIO_PCS_STAT2_10GBR	include/linux/mdio.h	/^#define MDIO_PCS_STAT2_10GBR	/;"	d
MDIO_PCS_STAT2_10GBW	include/linux/mdio.h	/^#define MDIO_PCS_STAT2_10GBW	/;"	d
MDIO_PCS_STAT2_10GBX	include/linux/mdio.h	/^#define MDIO_PCS_STAT2_10GBX	/;"	d
MDIO_PCS_STAT2_RXFLTABLE	include/linux/mdio.h	/^#define MDIO_PCS_STAT2_RXFLTABLE	/;"	d
MDIO_PCS_STAT2_TXFLTABLE	include/linux/mdio.h	/^#define MDIO_PCS_STAT2_TXFLTABLE	/;"	d
MDIO_PHYXS_CTRL1_LOOPBACK	include/linux/mdio.h	/^#define MDIO_PHYXS_CTRL1_LOOPBACK	/;"	d
MDIO_PHYXS_LANE_READY	drivers/net/phy/teranetics.c	/^#define MDIO_PHYXS_LANE_READY /;"	d	file:
MDIO_PHYXS_LNSTAT	include/linux/mdio.h	/^#define MDIO_PHYXS_LNSTAT	/;"	d
MDIO_PHYXS_LNSTAT_ALIGN	include/linux/mdio.h	/^#define MDIO_PHYXS_LNSTAT_ALIGN	/;"	d
MDIO_PHYXS_LNSTAT_SYNC0	include/linux/mdio.h	/^#define MDIO_PHYXS_LNSTAT_SYNC0	/;"	d
MDIO_PHYXS_LNSTAT_SYNC1	include/linux/mdio.h	/^#define MDIO_PHYXS_LNSTAT_SYNC1	/;"	d
MDIO_PHYXS_LNSTAT_SYNC2	include/linux/mdio.h	/^#define MDIO_PHYXS_LNSTAT_SYNC2	/;"	d
MDIO_PHYXS_LNSTAT_SYNC3	include/linux/mdio.h	/^#define MDIO_PHYXS_LNSTAT_SYNC3	/;"	d
MDIO_PHY_ID_C45	include/linux/mdio.h	/^#define MDIO_PHY_ID_C45	/;"	d
MDIO_PHY_ID_C45_MASK	include/linux/mdio.h	/^#define MDIO_PHY_ID_C45_MASK	/;"	d
MDIO_PHY_ID_DEVAD	include/linux/mdio.h	/^#define MDIO_PHY_ID_DEVAD	/;"	d
MDIO_PHY_ID_PRTAD	include/linux/mdio.h	/^#define MDIO_PHY_ID_PRTAD	/;"	d
MDIO_PKGID1	include/linux/mdio.h	/^#define MDIO_PKGID1	/;"	d
MDIO_PKGID2	include/linux/mdio.h	/^#define MDIO_PKGID2	/;"	d
MDIO_PMA_10GBR_FECABLE	include/linux/mdio.h	/^#define MDIO_PMA_10GBR_FECABLE	/;"	d
MDIO_PMA_10GBR_FECABLE_ABLE	include/linux/mdio.h	/^#define MDIO_PMA_10GBR_FECABLE_ABLE	/;"	d
MDIO_PMA_10GBR_FECABLE_ERRABLE	include/linux/mdio.h	/^#define MDIO_PMA_10GBR_FECABLE_ERRABLE	/;"	d
MDIO_PMA_10GBT_SNR	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SNR	/;"	d
MDIO_PMA_10GBT_SNR_BIAS	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SNR_BIAS	/;"	d
MDIO_PMA_10GBT_SNR_MAX	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SNR_MAX	/;"	d
MDIO_PMA_10GBT_SWAPPOL	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL	/;"	d
MDIO_PMA_10GBT_SWAPPOL_ABNX	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL_ABNX	/;"	d
MDIO_PMA_10GBT_SWAPPOL_AREV	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL_AREV	/;"	d
MDIO_PMA_10GBT_SWAPPOL_BREV	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL_BREV	/;"	d
MDIO_PMA_10GBT_SWAPPOL_CDNX	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL_CDNX	/;"	d
MDIO_PMA_10GBT_SWAPPOL_CREV	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL_CREV	/;"	d
MDIO_PMA_10GBT_SWAPPOL_DREV	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_SWAPPOL_DREV	/;"	d
MDIO_PMA_10GBT_TXPWR	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_TXPWR	/;"	d
MDIO_PMA_10GBT_TXPWR_SHORT	include/linux/mdio.h	/^#define MDIO_PMA_10GBT_TXPWR_SHORT	/;"	d
MDIO_PMA_CTRL1_LOOPBACK	include/linux/mdio.h	/^#define MDIO_PMA_CTRL1_LOOPBACK	/;"	d
MDIO_PMA_CTRL1_SPEED100	include/linux/mdio.h	/^#define MDIO_PMA_CTRL1_SPEED100	/;"	d
MDIO_PMA_CTRL1_SPEED1000	include/linux/mdio.h	/^#define MDIO_PMA_CTRL1_SPEED1000	/;"	d
MDIO_PMA_CTRL2_1000BKX	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_1000BKX	/;"	d
MDIO_PMA_CTRL2_1000BT	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_1000BT	/;"	d
MDIO_PMA_CTRL2_100BTX	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_100BTX	/;"	d
MDIO_PMA_CTRL2_10BT	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10BT	/;"	d
MDIO_PMA_CTRL2_10GBCX4	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBCX4	/;"	d
MDIO_PMA_CTRL2_10GBER	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBER	/;"	d
MDIO_PMA_CTRL2_10GBEW	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBEW	/;"	d
MDIO_PMA_CTRL2_10GBKR	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBKR	/;"	d
MDIO_PMA_CTRL2_10GBKX4	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBKX4	/;"	d
MDIO_PMA_CTRL2_10GBLR	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBLR	/;"	d
MDIO_PMA_CTRL2_10GBLRM	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBLRM	/;"	d
MDIO_PMA_CTRL2_10GBLW	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBLW	/;"	d
MDIO_PMA_CTRL2_10GBLX4	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBLX4	/;"	d
MDIO_PMA_CTRL2_10GBSR	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBSR	/;"	d
MDIO_PMA_CTRL2_10GBSW	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBSW	/;"	d
MDIO_PMA_CTRL2_10GBT	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_10GBT	/;"	d
MDIO_PMA_CTRL2_TYPE	include/linux/mdio.h	/^#define MDIO_PMA_CTRL2_TYPE	/;"	d
MDIO_PMA_EXTABLE	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE	/;"	d
MDIO_PMA_EXTABLE_1000BKX	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_1000BKX	/;"	d
MDIO_PMA_EXTABLE_1000BT	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_1000BT	/;"	d
MDIO_PMA_EXTABLE_100BTX	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_100BTX	/;"	d
MDIO_PMA_EXTABLE_10BT	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_10BT	/;"	d
MDIO_PMA_EXTABLE_10GBKR	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_10GBKR	/;"	d
MDIO_PMA_EXTABLE_10GBKX4	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_10GBKX4	/;"	d
MDIO_PMA_EXTABLE_10GBLRM	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_10GBLRM	/;"	d
MDIO_PMA_EXTABLE_10GBT	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_10GBT	/;"	d
MDIO_PMA_EXTABLE_10GCX4	include/linux/mdio.h	/^#define MDIO_PMA_EXTABLE_10GCX4	/;"	d
MDIO_PMA_LASI_CTRL	include/linux/mdio.h	/^#define MDIO_PMA_LASI_CTRL	/;"	d
MDIO_PMA_LASI_LSALARM	include/linux/mdio.h	/^#define MDIO_PMA_LASI_LSALARM	/;"	d
MDIO_PMA_LASI_RXALARM	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RXALARM	/;"	d
MDIO_PMA_LASI_RXCTRL	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RXCTRL	/;"	d
MDIO_PMA_LASI_RXSTAT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RXSTAT	/;"	d
MDIO_PMA_LASI_RX_OPTICPOWERFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RX_OPTICPOWERFLT	/;"	d
MDIO_PMA_LASI_RX_PCSLFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RX_PCSLFLT	/;"	d
MDIO_PMA_LASI_RX_PHYXSLFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RX_PHYXSLFLT	/;"	d
MDIO_PMA_LASI_RX_PMALFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RX_PMALFLT	/;"	d
MDIO_PMA_LASI_RX_WISLFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_RX_WISLFLT	/;"	d
MDIO_PMA_LASI_STAT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_STAT	/;"	d
MDIO_PMA_LASI_TXALARM	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TXALARM	/;"	d
MDIO_PMA_LASI_TXCTRL	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TXCTRL	/;"	d
MDIO_PMA_LASI_TXSTAT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TXSTAT	/;"	d
MDIO_PMA_LASI_TX_LASERBICURRFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TX_LASERBICURRFLT	/;"	d
MDIO_PMA_LASI_TX_LASERPOWERFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TX_LASERPOWERFLT	/;"	d
MDIO_PMA_LASI_TX_LASERTEMPFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TX_LASERTEMPFLT	/;"	d
MDIO_PMA_LASI_TX_PCSLFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TX_PCSLFLT	/;"	d
MDIO_PMA_LASI_TX_PHYXSLFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TX_PHYXSLFLT	/;"	d
MDIO_PMA_LASI_TX_PMALFLT	include/linux/mdio.h	/^#define MDIO_PMA_LASI_TX_PMALFLT	/;"	d
MDIO_PMA_RXDET	include/linux/mdio.h	/^#define MDIO_PMA_RXDET	/;"	d
MDIO_PMA_SPEED_10	include/linux/mdio.h	/^#define MDIO_PMA_SPEED_10	/;"	d
MDIO_PMA_SPEED_100	include/linux/mdio.h	/^#define MDIO_PMA_SPEED_100	/;"	d
MDIO_PMA_SPEED_1000	include/linux/mdio.h	/^#define MDIO_PMA_SPEED_1000	/;"	d
MDIO_PMA_SPEED_10P	include/linux/mdio.h	/^#define MDIO_PMA_SPEED_10P	/;"	d
MDIO_PMA_SPEED_2B	include/linux/mdio.h	/^#define MDIO_PMA_SPEED_2B	/;"	d
MDIO_PMA_STAT2_10GBER	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBER	/;"	d
MDIO_PMA_STAT2_10GBEW	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBEW	/;"	d
MDIO_PMA_STAT2_10GBLR	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBLR	/;"	d
MDIO_PMA_STAT2_10GBLW	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBLW	/;"	d
MDIO_PMA_STAT2_10GBLX4	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBLX4	/;"	d
MDIO_PMA_STAT2_10GBSR	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBSR	/;"	d
MDIO_PMA_STAT2_10GBSW	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_10GBSW	/;"	d
MDIO_PMA_STAT2_EXTABLE	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_EXTABLE	/;"	d
MDIO_PMA_STAT2_LBABLE	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_LBABLE	/;"	d
MDIO_PMA_STAT2_RXFLTABLE	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_RXFLTABLE	/;"	d
MDIO_PMA_STAT2_TXFLTABLE	include/linux/mdio.h	/^#define MDIO_PMA_STAT2_TXFLTABLE	/;"	d
MDIO_PMA_TXDIS	include/linux/mdio.h	/^#define MDIO_PMA_TXDIS	/;"	d
MDIO_PMD_RXDET_0	include/linux/mdio.h	/^#define MDIO_PMD_RXDET_0	/;"	d
MDIO_PMD_RXDET_1	include/linux/mdio.h	/^#define MDIO_PMD_RXDET_1	/;"	d
MDIO_PMD_RXDET_2	include/linux/mdio.h	/^#define MDIO_PMD_RXDET_2	/;"	d
MDIO_PMD_RXDET_3	include/linux/mdio.h	/^#define MDIO_PMD_RXDET_3	/;"	d
MDIO_PMD_RXDET_GLOBAL	include/linux/mdio.h	/^#define MDIO_PMD_RXDET_GLOBAL	/;"	d
MDIO_PMD_STAT2_TXDISAB	include/linux/mdio.h	/^#define MDIO_PMD_STAT2_TXDISAB	/;"	d
MDIO_PMD_TXDIS_0	include/linux/mdio.h	/^#define MDIO_PMD_TXDIS_0	/;"	d
MDIO_PMD_TXDIS_1	include/linux/mdio.h	/^#define MDIO_PMD_TXDIS_1	/;"	d
MDIO_PMD_TXDIS_2	include/linux/mdio.h	/^#define MDIO_PMD_TXDIS_2	/;"	d
MDIO_PMD_TXDIS_3	include/linux/mdio.h	/^#define MDIO_PMD_TXDIS_3	/;"	d
MDIO_PMD_TXDIS_GLOBAL	include/linux/mdio.h	/^#define MDIO_PMD_TXDIS_GLOBAL	/;"	d
MDIO_PORT	include/configs/MPC8560ADS.h	/^#define MDIO_PORT	/;"	d
MDIO_PRTAD_NONE	include/linux/mdio.h	/^#define MDIO_PRTAD_NONE	/;"	d
MDIO_READ	include/configs/MPC8560ADS.h	/^#define MDIO_READ	/;"	d
MDIO_SPEED	include/linux/mdio.h	/^#define MDIO_SPEED	/;"	d
MDIO_SPEED_10G	include/linux/mdio.h	/^#define MDIO_SPEED_10G	/;"	d
MDIO_STAT1	include/linux/mdio.h	/^#define MDIO_STAT1	/;"	d
MDIO_STAT1_FAULT	include/linux/mdio.h	/^#define MDIO_STAT1_FAULT	/;"	d
MDIO_STAT1_LPOWERABLE	include/linux/mdio.h	/^#define MDIO_STAT1_LPOWERABLE	/;"	d
MDIO_STAT1_LSTATUS	include/linux/mdio.h	/^#define MDIO_STAT1_LSTATUS	/;"	d
MDIO_STAT2	include/linux/mdio.h	/^#define MDIO_STAT2	/;"	d
MDIO_STAT2_DEVPRST	include/linux/mdio.h	/^#define MDIO_STAT2_DEVPRST	/;"	d
MDIO_STAT2_DEVPRST_VAL	include/linux/mdio.h	/^#define MDIO_STAT2_DEVPRST_VAL	/;"	d
MDIO_STAT2_RXFAULT	include/linux/mdio.h	/^#define MDIO_STAT2_RXFAULT	/;"	d
MDIO_STAT2_TXFAULT	include/linux/mdio.h	/^#define MDIO_STAT2_TXFAULT	/;"	d
MDIO_STAT_BSY	include/fsl_memac.h	/^#define MDIO_STAT_BSY	/;"	d
MDIO_STAT_BSY	include/fsl_tgec.h	/^#define MDIO_STAT_BSY	/;"	d
MDIO_STAT_CLKDIV	include/fsl_memac.h	/^#define MDIO_STAT_CLKDIV(/;"	d
MDIO_STAT_CLKDIV	include/fsl_tgec.h	/^#define MDIO_STAT_CLKDIV(/;"	d
MDIO_STAT_ENC	include/fsl_memac.h	/^#define MDIO_STAT_ENC	/;"	d
MDIO_STAT_HOLD_15_CLK	include/fsl_memac.h	/^#define MDIO_STAT_HOLD_15_CLK	/;"	d
MDIO_STAT_NEG	include/fsl_memac.h	/^#define MDIO_STAT_NEG	/;"	d
MDIO_STAT_PRE	include/fsl_memac.h	/^#define MDIO_STAT_PRE	/;"	d
MDIO_STAT_RD_ER	include/fsl_memac.h	/^#define MDIO_STAT_RD_ER	/;"	d
MDIO_STAT_RD_ER	include/fsl_tgec.h	/^#define MDIO_STAT_RD_ER	/;"	d
MDIO_ShiftClk	drivers/net/ns8382x.c	/^	MDIO_ShiftClk = 0x0040,$/;"	e	enum:mii_reg_bits	file:
MDIO_TIMEOUT	drivers/net/cpsw.c	/^#define MDIO_TIMEOUT /;"	d	file:
MDIO_TRISTATE	include/configs/MPC8560ADS.h	/^#define MDIO_TRISTATE	/;"	d
MDIO_USERACCESS0_ACK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_USERACCESS0_ACK	/;"	d
MDIO_USERACCESS0_ACK	drivers/net/davinci_emac.h	/^#define MDIO_USERACCESS0_ACK	/;"	d
MDIO_USERACCESS0_GO	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_USERACCESS0_GO	/;"	d
MDIO_USERACCESS0_GO	drivers/net/davinci_emac.h	/^#define MDIO_USERACCESS0_GO	/;"	d
MDIO_USERACCESS0_WRITE_READ	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_USERACCESS0_WRITE_READ	/;"	d
MDIO_USERACCESS0_WRITE_READ	drivers/net/davinci_emac.h	/^#define MDIO_USERACCESS0_WRITE_READ	/;"	d
MDIO_USERACCESS0_WRITE_WRITE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MDIO_USERACCESS0_WRITE_WRITE	/;"	d
MDIO_USERACCESS0_WRITE_WRITE	drivers/net/davinci_emac.h	/^#define MDIO_USERACCESS0_WRITE_WRITE	/;"	d
MDIO_WRITE0	drivers/net/ns8382x.c	/^#define MDIO_WRITE0 /;"	d	file:
MDIO_WRITE1	drivers/net/ns8382x.c	/^#define MDIO_WRITE1 /;"	d	file:
MDIR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	MDIR	/;"	d
MDIV	board/samsung/odroid/setup.h	/^#define MDIV(/;"	d
MDIVINT	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define MDIVINT	/;"	d	file:
MDIV_QSPI_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define MDIV_QSPI_SHIFT	/;"	d
MDIV_SHIFT_ETH	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define MDIV_SHIFT_ETH	/;"	d
MDIV_SHIFT_TMR	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define MDIV_SHIFT_TMR	/;"	d
MDIV_SHIFT_UART	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define MDIV_SHIFT_UART	/;"	d
MDLL_CKO	include/radeon.h	/^#define MDLL_CKO	/;"	d
MDLL_CKO__ERSTA_SOUTSEL_MASK	include/radeon.h	/^#define MDLL_CKO__ERSTA_SOUTSEL_MASK	/;"	d
MDLL_CKO__ERSTB_SOUTSEL_MASK	include/radeon.h	/^#define MDLL_CKO__ERSTB_SOUTSEL_MASK	/;"	d
MDLL_CKO__MCKOA_BP_SEL	include/radeon.h	/^#define MDLL_CKO__MCKOA_BP_SEL	/;"	d
MDLL_CKO__MCKOA_BP_SEL_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_BP_SEL_MASK	/;"	d
MDLL_CKO__MCKOA_FB_SEL_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_FB_SEL_MASK	/;"	d
MDLL_CKO__MCKOA_FB_SKEW_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_FB_SKEW_MASK	/;"	d
MDLL_CKO__MCKOA_RANGE_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_RANGE_MASK	/;"	d
MDLL_CKO__MCKOA_REF_SKEW_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_REF_SKEW_MASK	/;"	d
MDLL_CKO__MCKOA_RESET	include/radeon.h	/^#define MDLL_CKO__MCKOA_RESET	/;"	d
MDLL_CKO__MCKOA_RESET_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_RESET_MASK	/;"	d
MDLL_CKO__MCKOA_SLEEP	include/radeon.h	/^#define MDLL_CKO__MCKOA_SLEEP	/;"	d
MDLL_CKO__MCKOA_SLEEP_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOA_SLEEP_MASK	/;"	d
MDLL_CKO__MCKOB_BP_SEL	include/radeon.h	/^#define MDLL_CKO__MCKOB_BP_SEL	/;"	d
MDLL_CKO__MCKOB_BP_SEL_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_BP_SEL_MASK	/;"	d
MDLL_CKO__MCKOB_FB_SEL_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_FB_SEL_MASK	/;"	d
MDLL_CKO__MCKOB_FB_SKEW_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_FB_SKEW_MASK	/;"	d
MDLL_CKO__MCKOB_RANGE_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_RANGE_MASK	/;"	d
MDLL_CKO__MCKOB_REF_SKEW_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_REF_SKEW_MASK	/;"	d
MDLL_CKO__MCKOB_RESET	include/radeon.h	/^#define MDLL_CKO__MCKOB_RESET	/;"	d
MDLL_CKO__MCKOB_RESET_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_RESET_MASK	/;"	d
MDLL_CKO__MCKOB_SLEEP	include/radeon.h	/^#define MDLL_CKO__MCKOB_SLEEP	/;"	d
MDLL_CKO__MCKOB_SLEEP_MASK	include/radeon.h	/^#define MDLL_CKO__MCKOB_SLEEP_MASK	/;"	d
MDLL_R300_RDCK__MRDCKA_RESET	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKA_RESET	/;"	d
MDLL_R300_RDCK__MRDCKA_SLEEP	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKA_SLEEP	/;"	d
MDLL_R300_RDCK__MRDCKB_RESET	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKB_RESET	/;"	d
MDLL_R300_RDCK__MRDCKB_SLEEP	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKB_SLEEP	/;"	d
MDLL_R300_RDCK__MRDCKC_RESET	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKC_RESET	/;"	d
MDLL_R300_RDCK__MRDCKC_SLEEP	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKC_SLEEP	/;"	d
MDLL_R300_RDCK__MRDCKD_RESET	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKD_RESET	/;"	d
MDLL_R300_RDCK__MRDCKD_SLEEP	include/radeon.h	/^#define MDLL_R300_RDCK__MRDCKD_SLEEP	/;"	d
MDLL_RDCKA	include/radeon.h	/^#define MDLL_RDCKA	/;"	d
MDLL_RDCKA__MRDCKA0_BP_SEL	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_BP_SEL	/;"	d
MDLL_RDCKA__MRDCKA0_BP_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_BP_SEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_FB_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_FB_SEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_FB_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_FB_SKEW_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_RANGE_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_RANGE_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_REF_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_REF_SEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_REF_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_REF_SKEW_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_RESET	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_RESET	/;"	d
MDLL_RDCKA__MRDCKA0_RESET_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_RESET_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_SINSEL	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_SINSEL	/;"	d
MDLL_RDCKA__MRDCKA0_SINSEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_SINSEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA0_SLEEP	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_SLEEP	/;"	d
MDLL_RDCKA__MRDCKA0_SLEEP_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA0_SLEEP_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_BP_SEL	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_BP_SEL	/;"	d
MDLL_RDCKA__MRDCKA1_BP_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_BP_SEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_FB_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_FB_SEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_FB_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_FB_SKEW_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_RANGE_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_RANGE_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_REF_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_REF_SEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_REF_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_REF_SKEW_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_RESET	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_RESET	/;"	d
MDLL_RDCKA__MRDCKA1_RESET_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_RESET_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_SINSEL	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_SINSEL	/;"	d
MDLL_RDCKA__MRDCKA1_SINSEL_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_SINSEL_MASK	/;"	d
MDLL_RDCKA__MRDCKA1_SLEEP	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_SLEEP	/;"	d
MDLL_RDCKA__MRDCKA1_SLEEP_MASK	include/radeon.h	/^#define MDLL_RDCKA__MRDCKA1_SLEEP_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_BP_SEL	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_BP_SEL	/;"	d
MDLL_RDCKB__MRDCKB0_BP_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_BP_SEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_FB_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_FB_SEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_FB_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_FB_SKEW_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_RANGE_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_RANGE_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_REF_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_REF_SEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_REF_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_REF_SKEW_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_RESET	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_RESET	/;"	d
MDLL_RDCKB__MRDCKB0_RESET_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_RESET_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_SINSEL	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_SINSEL	/;"	d
MDLL_RDCKB__MRDCKB0_SINSEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_SINSEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB0_SLEEP	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_SLEEP	/;"	d
MDLL_RDCKB__MRDCKB0_SLEEP_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB0_SLEEP_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_BP_SEL	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_BP_SEL	/;"	d
MDLL_RDCKB__MRDCKB1_BP_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_BP_SEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_FB_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_FB_SEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_FB_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_FB_SKEW_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_RANGE_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_RANGE_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_REF_SEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_REF_SEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_REF_SKEW_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_REF_SKEW_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_RESET	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_RESET	/;"	d
MDLL_RDCKB__MRDCKB1_RESET_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_RESET_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_SINSEL	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_SINSEL	/;"	d
MDLL_RDCKB__MRDCKB1_SINSEL_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_SINSEL_MASK	/;"	d
MDLL_RDCKB__MRDCKB1_SLEEP	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_SLEEP	/;"	d
MDLL_RDCKB__MRDCKB1_SLEEP_MASK	include/radeon.h	/^#define MDLL_RDCKB__MRDCKB1_SLEEP_MASK	/;"	d
MDMA0_D0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_CONFIG /;"	d
MDMA0_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_CURR_ADDR /;"	d
MDMA0_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_CURR_DESC_PTR /;"	d
MDMA0_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_CURR_X_COUNT /;"	d
MDMA0_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_CURR_Y_COUNT /;"	d
MDMA0_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_IRQ_STATUS /;"	d
MDMA0_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_NEXT_DESC_PTR /;"	d
MDMA0_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_PERIPHERAL_MAP /;"	d
MDMA0_D0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_START_ADDR /;"	d
MDMA0_D0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_X_COUNT /;"	d
MDMA0_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_X_MODIFY /;"	d
MDMA0_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_Y_COUNT /;"	d
MDMA0_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D0_Y_MODIFY /;"	d
MDMA0_D1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_CONFIG /;"	d
MDMA0_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_CURR_ADDR /;"	d
MDMA0_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_CURR_DESC_PTR /;"	d
MDMA0_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_CURR_X_COUNT /;"	d
MDMA0_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_CURR_Y_COUNT /;"	d
MDMA0_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_IRQ_STATUS /;"	d
MDMA0_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_NEXT_DESC_PTR /;"	d
MDMA0_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_PERIPHERAL_MAP /;"	d
MDMA0_D1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_START_ADDR /;"	d
MDMA0_D1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_X_COUNT /;"	d
MDMA0_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_X_MODIFY /;"	d
MDMA0_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_Y_COUNT /;"	d
MDMA0_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_D1_Y_MODIFY /;"	d
MDMA0_S0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_CONFIG /;"	d
MDMA0_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_CURR_ADDR /;"	d
MDMA0_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_CURR_DESC_PTR /;"	d
MDMA0_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_CURR_X_COUNT /;"	d
MDMA0_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_CURR_Y_COUNT /;"	d
MDMA0_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_IRQ_STATUS /;"	d
MDMA0_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_NEXT_DESC_PTR /;"	d
MDMA0_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_PERIPHERAL_MAP /;"	d
MDMA0_S0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_START_ADDR /;"	d
MDMA0_S0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_X_COUNT /;"	d
MDMA0_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_X_MODIFY /;"	d
MDMA0_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_Y_COUNT /;"	d
MDMA0_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S0_Y_MODIFY /;"	d
MDMA0_S1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_CONFIG /;"	d
MDMA0_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_CURR_ADDR /;"	d
MDMA0_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_CURR_DESC_PTR /;"	d
MDMA0_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_CURR_X_COUNT /;"	d
MDMA0_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_CURR_Y_COUNT /;"	d
MDMA0_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_IRQ_STATUS /;"	d
MDMA0_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_NEXT_DESC_PTR /;"	d
MDMA0_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_PERIPHERAL_MAP /;"	d
MDMA0_S1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_START_ADDR /;"	d
MDMA0_S1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_X_COUNT /;"	d
MDMA0_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_X_MODIFY /;"	d
MDMA0_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_Y_COUNT /;"	d
MDMA0_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA0_S1_Y_MODIFY /;"	d
MDMA1_D0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_CONFIG /;"	d
MDMA1_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_CONFIG /;"	d
MDMA1_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_CURR_ADDR /;"	d
MDMA1_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_CURR_ADDR /;"	d
MDMA1_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_CURR_DESC_PTR /;"	d
MDMA1_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_CURR_DESC_PTR /;"	d
MDMA1_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_CURR_X_COUNT /;"	d
MDMA1_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_CURR_X_COUNT /;"	d
MDMA1_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_CURR_Y_COUNT /;"	d
MDMA1_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_CURR_Y_COUNT /;"	d
MDMA1_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_IRQ_STATUS /;"	d
MDMA1_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_IRQ_STATUS /;"	d
MDMA1_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_NEXT_DESC_PTR /;"	d
MDMA1_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_NEXT_DESC_PTR /;"	d
MDMA1_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_PERIPHERAL_MAP /;"	d
MDMA1_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_PERIPHERAL_MAP /;"	d
MDMA1_D0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_START_ADDR /;"	d
MDMA1_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_START_ADDR /;"	d
MDMA1_D0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_X_COUNT /;"	d
MDMA1_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_X_COUNT /;"	d
MDMA1_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_X_MODIFY /;"	d
MDMA1_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_X_MODIFY /;"	d
MDMA1_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_Y_COUNT /;"	d
MDMA1_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_Y_COUNT /;"	d
MDMA1_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D0_Y_MODIFY /;"	d
MDMA1_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D0_Y_MODIFY /;"	d
MDMA1_D1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_CONFIG /;"	d
MDMA1_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_CONFIG /;"	d
MDMA1_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_CURR_ADDR /;"	d
MDMA1_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_CURR_ADDR /;"	d
MDMA1_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_CURR_DESC_PTR /;"	d
MDMA1_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_CURR_DESC_PTR /;"	d
MDMA1_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_CURR_X_COUNT /;"	d
MDMA1_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_CURR_X_COUNT /;"	d
MDMA1_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_CURR_Y_COUNT /;"	d
MDMA1_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_CURR_Y_COUNT /;"	d
MDMA1_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_IRQ_STATUS /;"	d
MDMA1_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_IRQ_STATUS /;"	d
MDMA1_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_NEXT_DESC_PTR /;"	d
MDMA1_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_NEXT_DESC_PTR /;"	d
MDMA1_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_PERIPHERAL_MAP /;"	d
MDMA1_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_PERIPHERAL_MAP /;"	d
MDMA1_D1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_START_ADDR /;"	d
MDMA1_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_START_ADDR /;"	d
MDMA1_D1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_X_COUNT /;"	d
MDMA1_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_X_COUNT /;"	d
MDMA1_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_X_MODIFY /;"	d
MDMA1_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_X_MODIFY /;"	d
MDMA1_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_Y_COUNT /;"	d
MDMA1_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_Y_COUNT /;"	d
MDMA1_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_D1_Y_MODIFY /;"	d
MDMA1_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_D1_Y_MODIFY /;"	d
MDMA1_S0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_CONFIG /;"	d
MDMA1_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_CONFIG /;"	d
MDMA1_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_CURR_ADDR /;"	d
MDMA1_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_CURR_ADDR /;"	d
MDMA1_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_CURR_DESC_PTR /;"	d
MDMA1_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_CURR_DESC_PTR /;"	d
MDMA1_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_CURR_X_COUNT /;"	d
MDMA1_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_CURR_X_COUNT /;"	d
MDMA1_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_CURR_Y_COUNT /;"	d
MDMA1_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_CURR_Y_COUNT /;"	d
MDMA1_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_IRQ_STATUS /;"	d
MDMA1_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_IRQ_STATUS /;"	d
MDMA1_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_NEXT_DESC_PTR /;"	d
MDMA1_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_NEXT_DESC_PTR /;"	d
MDMA1_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_PERIPHERAL_MAP /;"	d
MDMA1_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_PERIPHERAL_MAP /;"	d
MDMA1_S0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_START_ADDR /;"	d
MDMA1_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_START_ADDR /;"	d
MDMA1_S0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_X_COUNT /;"	d
MDMA1_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_X_COUNT /;"	d
MDMA1_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_X_MODIFY /;"	d
MDMA1_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_X_MODIFY /;"	d
MDMA1_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_Y_COUNT /;"	d
MDMA1_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_Y_COUNT /;"	d
MDMA1_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S0_Y_MODIFY /;"	d
MDMA1_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S0_Y_MODIFY /;"	d
MDMA1_S1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_CONFIG /;"	d
MDMA1_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_CONFIG /;"	d
MDMA1_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_CURR_ADDR /;"	d
MDMA1_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_CURR_ADDR /;"	d
MDMA1_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_CURR_DESC_PTR /;"	d
MDMA1_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_CURR_DESC_PTR /;"	d
MDMA1_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_CURR_X_COUNT /;"	d
MDMA1_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_CURR_X_COUNT /;"	d
MDMA1_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_CURR_Y_COUNT /;"	d
MDMA1_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_CURR_Y_COUNT /;"	d
MDMA1_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_IRQ_STATUS /;"	d
MDMA1_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_IRQ_STATUS /;"	d
MDMA1_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_NEXT_DESC_PTR /;"	d
MDMA1_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_NEXT_DESC_PTR /;"	d
MDMA1_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_PERIPHERAL_MAP /;"	d
MDMA1_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_PERIPHERAL_MAP /;"	d
MDMA1_S1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_START_ADDR /;"	d
MDMA1_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_START_ADDR /;"	d
MDMA1_S1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_X_COUNT /;"	d
MDMA1_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_X_COUNT /;"	d
MDMA1_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_X_MODIFY /;"	d
MDMA1_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_X_MODIFY /;"	d
MDMA1_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_Y_COUNT /;"	d
MDMA1_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_Y_COUNT /;"	d
MDMA1_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define MDMA1_S1_Y_MODIFY /;"	d
MDMA1_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA1_S1_Y_MODIFY /;"	d
MDMA2_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_CONFIG /;"	d
MDMA2_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_CURR_ADDR /;"	d
MDMA2_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_CURR_DESC_PTR /;"	d
MDMA2_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_CURR_X_COUNT /;"	d
MDMA2_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_CURR_Y_COUNT /;"	d
MDMA2_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_IRQ_STATUS /;"	d
MDMA2_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_NEXT_DESC_PTR /;"	d
MDMA2_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_PERIPHERAL_MAP /;"	d
MDMA2_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_START_ADDR /;"	d
MDMA2_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_X_COUNT /;"	d
MDMA2_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_X_MODIFY /;"	d
MDMA2_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_Y_COUNT /;"	d
MDMA2_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D0_Y_MODIFY /;"	d
MDMA2_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_CONFIG /;"	d
MDMA2_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_CURR_ADDR /;"	d
MDMA2_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_CURR_DESC_PTR /;"	d
MDMA2_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_CURR_X_COUNT /;"	d
MDMA2_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_CURR_Y_COUNT /;"	d
MDMA2_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_IRQ_STATUS /;"	d
MDMA2_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_NEXT_DESC_PTR /;"	d
MDMA2_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_PERIPHERAL_MAP /;"	d
MDMA2_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_START_ADDR /;"	d
MDMA2_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_X_COUNT /;"	d
MDMA2_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_X_MODIFY /;"	d
MDMA2_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_Y_COUNT /;"	d
MDMA2_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_D1_Y_MODIFY /;"	d
MDMA2_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_CONFIG /;"	d
MDMA2_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_CURR_ADDR /;"	d
MDMA2_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_CURR_DESC_PTR /;"	d
MDMA2_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_CURR_X_COUNT /;"	d
MDMA2_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_CURR_Y_COUNT /;"	d
MDMA2_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_IRQ_STATUS /;"	d
MDMA2_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_NEXT_DESC_PTR /;"	d
MDMA2_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_PERIPHERAL_MAP /;"	d
MDMA2_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_START_ADDR /;"	d
MDMA2_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_X_COUNT /;"	d
MDMA2_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_X_MODIFY /;"	d
MDMA2_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_Y_COUNT /;"	d
MDMA2_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S0_Y_MODIFY /;"	d
MDMA2_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_CONFIG /;"	d
MDMA2_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_CURR_ADDR /;"	d
MDMA2_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_CURR_DESC_PTR /;"	d
MDMA2_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_CURR_X_COUNT /;"	d
MDMA2_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_CURR_Y_COUNT /;"	d
MDMA2_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_IRQ_STATUS /;"	d
MDMA2_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_NEXT_DESC_PTR /;"	d
MDMA2_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_PERIPHERAL_MAP /;"	d
MDMA2_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_START_ADDR /;"	d
MDMA2_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_X_COUNT /;"	d
MDMA2_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_X_MODIFY /;"	d
MDMA2_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_Y_COUNT /;"	d
MDMA2_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define MDMA2_S1_Y_MODIFY /;"	d
MDMAFLX0_CURXCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_CURXCOUNT_D /;"	d
MDMAFLX0_CURXCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_CURXCOUNT_S /;"	d
MDMAFLX0_CURYCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_CURYCOUNT_D /;"	d
MDMAFLX0_CURYCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_CURYCOUNT_S /;"	d
MDMAFLX0_DMACNFG_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_DMACNFG_D /;"	d
MDMAFLX0_DMACNFG_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_DMACNFG_S /;"	d
MDMAFLX0_IRQSTAT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_IRQSTAT_D /;"	d
MDMAFLX0_IRQSTAT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_IRQSTAT_S /;"	d
MDMAFLX0_PMAP_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_PMAP_D /;"	d
MDMAFLX0_PMAP_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_PMAP_S /;"	d
MDMAFLX0_XCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_XCOUNT_D /;"	d
MDMAFLX0_XCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_XCOUNT_S /;"	d
MDMAFLX0_XMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_XMODIFY_D /;"	d
MDMAFLX0_XMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_XMODIFY_S /;"	d
MDMAFLX0_YCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_YCOUNT_D /;"	d
MDMAFLX0_YCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_YCOUNT_S /;"	d
MDMAFLX0_YMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_YMODIFY_D /;"	d
MDMAFLX0_YMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX0_YMODIFY_S /;"	d
MDMAFLX1_CURXCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_CURXCOUNT_D /;"	d
MDMAFLX1_CURXCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_CURXCOUNT_S /;"	d
MDMAFLX1_CURYCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_CURYCOUNT_D /;"	d
MDMAFLX1_CURYCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_CURYCOUNT_S /;"	d
MDMAFLX1_DMACNFG_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_DMACNFG_D /;"	d
MDMAFLX1_DMACNFG_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_DMACNFG_S /;"	d
MDMAFLX1_IRQSTAT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_IRQSTAT_D /;"	d
MDMAFLX1_IRQSTAT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_IRQSTAT_S /;"	d
MDMAFLX1_PMAP_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_PMAP_D /;"	d
MDMAFLX1_PMAP_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_PMAP_S /;"	d
MDMAFLX1_XCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_XCOUNT_D /;"	d
MDMAFLX1_XCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_XCOUNT_S /;"	d
MDMAFLX1_XMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_XMODIFY_D /;"	d
MDMAFLX1_XMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_XMODIFY_S /;"	d
MDMAFLX1_YCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_YCOUNT_D /;"	d
MDMAFLX1_YCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_YCOUNT_S /;"	d
MDMAFLX1_YMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_YMODIFY_D /;"	d
MDMAFLX1_YMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMAFLX1_YMODIFY_S /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_CONFIG /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_CURR_ADDR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_CURR_DESC_PTR /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_CURR_X_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_CURR_Y_COUNT /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_IRQ_STATUS /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define MDMA_D0_NEXT_DESC_PTR /;"	d
MDMA_D0_NEXT_DESC_PTR	arch/blackfin/lib/string.c	/^# define MDMA_D0_NEXT_DESC_PTR /;"	d	file:
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_PERIPHERAL_MAP /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_START_ADDR /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_X_COUNT /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_X_MODIFY /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_Y_COUNT /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D0_Y_MODIFY /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_CONFIG /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_CURR_ADDR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_CURR_DESC_PTR /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_CURR_X_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_CURR_Y_COUNT /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_IRQ_STATUS /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_NEXT_DESC_PTR /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_PERIPHERAL_MAP /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_START_ADDR /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_X_COUNT /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_X_MODIFY /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_Y_COUNT /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D1_Y_MODIFY /;"	d
MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_CONFIG /;"	d
MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_CONFIG /;"	d
MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_CONFIG /;"	d
MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_CONFIG /;"	d
MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_CONFIG /;"	d
MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_CURR_ADDR /;"	d
MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_CURR_ADDR /;"	d
MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_CURR_ADDR /;"	d
MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_CURR_ADDR /;"	d
MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_CURR_ADDR /;"	d
MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_CURR_DESC_PTR /;"	d
MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_CURR_DESC_PTR /;"	d
MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_CURR_DESC_PTR /;"	d
MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_CURR_DESC_PTR /;"	d
MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_CURR_DESC_PTR /;"	d
MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_CURR_X_COUNT /;"	d
MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_CURR_X_COUNT /;"	d
MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_CURR_X_COUNT /;"	d
MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_CURR_X_COUNT /;"	d
MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_CURR_X_COUNT /;"	d
MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_CURR_Y_COUNT /;"	d
MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_CURR_Y_COUNT /;"	d
MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_CURR_Y_COUNT /;"	d
MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_CURR_Y_COUNT /;"	d
MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_CURR_Y_COUNT /;"	d
MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_IRQ_STATUS /;"	d
MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_IRQ_STATUS /;"	d
MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_IRQ_STATUS /;"	d
MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_IRQ_STATUS /;"	d
MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_IRQ_STATUS /;"	d
MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_NEXT_DESC_PTR /;"	d
MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_NEXT_DESC_PTR /;"	d
MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_NEXT_DESC_PTR /;"	d
MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_NEXT_DESC_PTR /;"	d
MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_NEXT_DESC_PTR /;"	d
MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_PERIPHERAL_MAP /;"	d
MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_PERIPHERAL_MAP /;"	d
MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_PERIPHERAL_MAP /;"	d
MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_PERIPHERAL_MAP /;"	d
MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_PERIPHERAL_MAP /;"	d
MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_START_ADDR /;"	d
MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_START_ADDR /;"	d
MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_START_ADDR /;"	d
MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_START_ADDR /;"	d
MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_START_ADDR /;"	d
MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_X_COUNT /;"	d
MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_X_COUNT /;"	d
MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_X_COUNT /;"	d
MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_X_COUNT /;"	d
MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_X_COUNT /;"	d
MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_X_MODIFY /;"	d
MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_X_MODIFY /;"	d
MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_X_MODIFY /;"	d
MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_X_MODIFY /;"	d
MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_X_MODIFY /;"	d
MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_Y_COUNT /;"	d
MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_Y_COUNT /;"	d
MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_Y_COUNT /;"	d
MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_Y_COUNT /;"	d
MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_Y_COUNT /;"	d
MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D2_Y_MODIFY /;"	d
MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D2_Y_MODIFY /;"	d
MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D2_Y_MODIFY /;"	d
MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D2_Y_MODIFY /;"	d
MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D2_Y_MODIFY /;"	d
MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_CONFIG /;"	d
MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_CONFIG /;"	d
MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_CONFIG /;"	d
MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_CONFIG /;"	d
MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_CONFIG /;"	d
MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_CURR_ADDR /;"	d
MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_CURR_ADDR /;"	d
MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_CURR_ADDR /;"	d
MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_CURR_ADDR /;"	d
MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_CURR_ADDR /;"	d
MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_CURR_DESC_PTR /;"	d
MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_CURR_DESC_PTR /;"	d
MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_CURR_DESC_PTR /;"	d
MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_CURR_DESC_PTR /;"	d
MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_CURR_DESC_PTR /;"	d
MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_CURR_X_COUNT /;"	d
MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_CURR_X_COUNT /;"	d
MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_CURR_X_COUNT /;"	d
MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_CURR_X_COUNT /;"	d
MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_CURR_X_COUNT /;"	d
MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_CURR_Y_COUNT /;"	d
MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_CURR_Y_COUNT /;"	d
MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_CURR_Y_COUNT /;"	d
MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_CURR_Y_COUNT /;"	d
MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_CURR_Y_COUNT /;"	d
MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_IRQ_STATUS /;"	d
MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_IRQ_STATUS /;"	d
MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_IRQ_STATUS /;"	d
MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_IRQ_STATUS /;"	d
MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_IRQ_STATUS /;"	d
MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_NEXT_DESC_PTR /;"	d
MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_NEXT_DESC_PTR /;"	d
MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_NEXT_DESC_PTR /;"	d
MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_NEXT_DESC_PTR /;"	d
MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_NEXT_DESC_PTR /;"	d
MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_PERIPHERAL_MAP /;"	d
MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_PERIPHERAL_MAP /;"	d
MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_PERIPHERAL_MAP /;"	d
MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_PERIPHERAL_MAP /;"	d
MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_PERIPHERAL_MAP /;"	d
MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_START_ADDR /;"	d
MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_START_ADDR /;"	d
MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_START_ADDR /;"	d
MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_START_ADDR /;"	d
MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_START_ADDR /;"	d
MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_X_COUNT /;"	d
MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_X_COUNT /;"	d
MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_X_COUNT /;"	d
MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_X_COUNT /;"	d
MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_X_COUNT /;"	d
MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_X_MODIFY /;"	d
MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_X_MODIFY /;"	d
MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_X_MODIFY /;"	d
MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_X_MODIFY /;"	d
MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_X_MODIFY /;"	d
MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_Y_COUNT /;"	d
MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_Y_COUNT /;"	d
MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_Y_COUNT /;"	d
MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_Y_COUNT /;"	d
MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_Y_COUNT /;"	d
MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_D3_Y_MODIFY /;"	d
MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_D3_Y_MODIFY /;"	d
MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_D3_Y_MODIFY /;"	d
MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_D3_Y_MODIFY /;"	d
MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_D3_Y_MODIFY /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_CONFIG /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_CURR_ADDR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_CURR_DESC_PTR /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_CURR_X_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_CURR_Y_COUNT /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_IRQ_STATUS /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define MDMA_S0_NEXT_DESC_PTR /;"	d
MDMA_S0_NEXT_DESC_PTR	arch/blackfin/lib/string.c	/^# define MDMA_S0_NEXT_DESC_PTR /;"	d	file:
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_PERIPHERAL_MAP /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_START_ADDR /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_X_COUNT /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_X_MODIFY /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_Y_COUNT /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S0_Y_MODIFY /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_CONFIG /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_CURR_ADDR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_CURR_DESC_PTR /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_CURR_X_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_CURR_Y_COUNT /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_IRQ_STATUS /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_NEXT_DESC_PTR /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_PERIPHERAL_MAP /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_START_ADDR /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_X_COUNT /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_X_MODIFY /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_Y_COUNT /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S1_Y_MODIFY /;"	d
MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_CONFIG /;"	d
MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_CONFIG /;"	d
MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_CONFIG /;"	d
MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_CONFIG /;"	d
MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_CONFIG /;"	d
MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_CURR_ADDR /;"	d
MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_CURR_ADDR /;"	d
MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_CURR_ADDR /;"	d
MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_CURR_ADDR /;"	d
MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_CURR_ADDR /;"	d
MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_CURR_DESC_PTR /;"	d
MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_CURR_DESC_PTR /;"	d
MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_CURR_DESC_PTR /;"	d
MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_CURR_DESC_PTR /;"	d
MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_CURR_DESC_PTR /;"	d
MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_CURR_X_COUNT /;"	d
MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_CURR_X_COUNT /;"	d
MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_CURR_X_COUNT /;"	d
MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_CURR_X_COUNT /;"	d
MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_CURR_X_COUNT /;"	d
MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_CURR_Y_COUNT /;"	d
MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_CURR_Y_COUNT /;"	d
MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_CURR_Y_COUNT /;"	d
MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_CURR_Y_COUNT /;"	d
MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_CURR_Y_COUNT /;"	d
MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_IRQ_STATUS /;"	d
MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_IRQ_STATUS /;"	d
MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_IRQ_STATUS /;"	d
MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_IRQ_STATUS /;"	d
MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_IRQ_STATUS /;"	d
MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_NEXT_DESC_PTR /;"	d
MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_NEXT_DESC_PTR /;"	d
MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_NEXT_DESC_PTR /;"	d
MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_NEXT_DESC_PTR /;"	d
MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_NEXT_DESC_PTR /;"	d
MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_PERIPHERAL_MAP /;"	d
MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_PERIPHERAL_MAP /;"	d
MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_PERIPHERAL_MAP /;"	d
MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_PERIPHERAL_MAP /;"	d
MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_PERIPHERAL_MAP /;"	d
MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_START_ADDR /;"	d
MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_START_ADDR /;"	d
MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_START_ADDR /;"	d
MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_START_ADDR /;"	d
MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_START_ADDR /;"	d
MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_X_COUNT /;"	d
MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_X_COUNT /;"	d
MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_X_COUNT /;"	d
MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_X_COUNT /;"	d
MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_X_COUNT /;"	d
MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_X_MODIFY /;"	d
MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_X_MODIFY /;"	d
MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_X_MODIFY /;"	d
MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_X_MODIFY /;"	d
MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_X_MODIFY /;"	d
MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_Y_COUNT /;"	d
MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_Y_COUNT /;"	d
MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_Y_COUNT /;"	d
MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_Y_COUNT /;"	d
MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_Y_COUNT /;"	d
MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S2_Y_MODIFY /;"	d
MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S2_Y_MODIFY /;"	d
MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S2_Y_MODIFY /;"	d
MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S2_Y_MODIFY /;"	d
MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S2_Y_MODIFY /;"	d
MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_CONFIG /;"	d
MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_CONFIG /;"	d
MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_CONFIG /;"	d
MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_CONFIG /;"	d
MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_CONFIG /;"	d
MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_CURR_ADDR /;"	d
MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_CURR_ADDR /;"	d
MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_CURR_ADDR /;"	d
MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_CURR_ADDR /;"	d
MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_CURR_ADDR /;"	d
MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_CURR_DESC_PTR /;"	d
MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_CURR_DESC_PTR /;"	d
MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_CURR_DESC_PTR /;"	d
MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_CURR_DESC_PTR /;"	d
MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_CURR_DESC_PTR /;"	d
MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_CURR_X_COUNT /;"	d
MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_CURR_X_COUNT /;"	d
MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_CURR_X_COUNT /;"	d
MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_CURR_X_COUNT /;"	d
MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_CURR_X_COUNT /;"	d
MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_CURR_Y_COUNT /;"	d
MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_CURR_Y_COUNT /;"	d
MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_CURR_Y_COUNT /;"	d
MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_CURR_Y_COUNT /;"	d
MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_CURR_Y_COUNT /;"	d
MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_IRQ_STATUS /;"	d
MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_IRQ_STATUS /;"	d
MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_IRQ_STATUS /;"	d
MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_IRQ_STATUS /;"	d
MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_IRQ_STATUS /;"	d
MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_NEXT_DESC_PTR /;"	d
MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_NEXT_DESC_PTR /;"	d
MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_NEXT_DESC_PTR /;"	d
MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_NEXT_DESC_PTR /;"	d
MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_NEXT_DESC_PTR /;"	d
MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_PERIPHERAL_MAP /;"	d
MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_PERIPHERAL_MAP /;"	d
MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_PERIPHERAL_MAP /;"	d
MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_PERIPHERAL_MAP /;"	d
MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_PERIPHERAL_MAP /;"	d
MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_START_ADDR /;"	d
MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_START_ADDR /;"	d
MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_START_ADDR /;"	d
MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_START_ADDR /;"	d
MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_START_ADDR /;"	d
MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_X_COUNT /;"	d
MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_X_COUNT /;"	d
MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_X_COUNT /;"	d
MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_X_COUNT /;"	d
MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_X_COUNT /;"	d
MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_X_MODIFY /;"	d
MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_X_MODIFY /;"	d
MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_X_MODIFY /;"	d
MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_X_MODIFY /;"	d
MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_X_MODIFY /;"	d
MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_Y_COUNT /;"	d
MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_Y_COUNT /;"	d
MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_Y_COUNT /;"	d
MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_Y_COUNT /;"	d
MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_Y_COUNT /;"	d
MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define MDMA_S3_Y_MODIFY /;"	d
MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define MDMA_S3_Y_MODIFY /;"	d
MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define MDMA_S3_Y_MODIFY /;"	d
MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define MDMA_S3_Y_MODIFY /;"	d
MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MDMA_S3_Y_MODIFY /;"	d
MDMRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MDMRS	/;"	d
MDMRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDMRS	/;"	d
MDMRS_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDMRS_OFFSET	/;"	d
MDNIE0_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MDNIE0_SEL_XUSBXTI	/;"	d
MDNIE_PWM0_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MDNIE_PWM0_SEL_XUSBXTI	/;"	d
MDPE	include/sym53c8xx.h	/^  #define   MDPE /;"	d
MDREFR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MDREFR	/;"	d
MDREFR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR	/;"	d
MDREFR	include/SA-1100.h	/^#define MDREFR	/;"	d
MDREFR	include/SA-1100.h	/^#define MDREFR /;"	d
MDREFR_ALTREFA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_ALTREFA	/;"	d
MDREFR_ALTREFB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_ALTREFB	/;"	d
MDREFR_APD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_APD	/;"	d
MDREFR_DRI	include/SA-1100.h	/^#define MDREFR_DRI	/;"	d
MDREFR_E0PIN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_E0PIN	/;"	d
MDREFR_E0PIN	include/SA-1100.h	/^#define MDREFR_E0PIN	/;"	d
MDREFR_E1PIN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_E1PIN	/;"	d
MDREFR_E1PIN	include/SA-1100.h	/^#define MDREFR_E1PIN	/;"	d
MDREFR_EAPD	include/SA-1100.h	/^#define MDREFR_EAPD	/;"	d
MDREFR_K0DB2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K0DB2	/;"	d
MDREFR_K0DB2	include/SA-1100.h	/^#define MDREFR_K0DB2	/;"	d
MDREFR_K0DB4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K0DB4	/;"	d
MDREFR_K0FREE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K0FREE	/;"	d
MDREFR_K0RUN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K0RUN	/;"	d
MDREFR_K0RUN	include/SA-1100.h	/^#define MDREFR_K0RUN	/;"	d
MDREFR_K1DB2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K1DB2	/;"	d
MDREFR_K1DB2	include/SA-1100.h	/^#define MDREFR_K1DB2	/;"	d
MDREFR_K1FREE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K1FREE	/;"	d
MDREFR_K1RUN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K1RUN	/;"	d
MDREFR_K1RUN	include/SA-1100.h	/^#define MDREFR_K1RUN	/;"	d
MDREFR_K2DB2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K2DB2	/;"	d
MDREFR_K2DB2	include/SA-1100.h	/^#define MDREFR_K2DB2	/;"	d
MDREFR_K2FREE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K2FREE	/;"	d
MDREFR_K2RUN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_K2RUN	/;"	d
MDREFR_K2RUN	include/SA-1100.h	/^#define MDREFR_K2RUN	/;"	d
MDREFR_KAPD	include/SA-1100.h	/^#define MDREFR_KAPD	/;"	d
MDREFR_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_OFFSET	/;"	d
MDREFR_SLFRSH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MDREFR_SLFRSH	/;"	d
MDREFR_SLFRSH	include/SA-1100.h	/^#define MDREFR_SLFRSH	/;"	d
MDREFR_TRASR	include/SA-1100.h	/^#define MDREFR_TRASR	/;"	d
MDREF_START_REFRESH	include/fsl_mmdc.h	/^#define MDREF_START_REFRESH	/;"	d
MDSCR_CON_ACK	include/fsl_mmdc.h	/^#define MDSCR_CON_ACK	/;"	d
MDSCR_DISABLE_CFG_REQ	include/fsl_mmdc.h	/^#define MDSCR_DISABLE_CFG_REQ /;"	d
MDSCR_ENABLE_CON_REQ	include/fsl_mmdc.h	/^#define MDSCR_ENABLE_CON_REQ	/;"	d
MDSCR_WL_EN	include/fsl_mmdc.h	/^#define MDSCR_WL_EN	/;"	d
MDSTAT_DDR2	arch/arm/mach-davinci/lowlevel_init.S	/^MDSTAT_DDR2:$/;"	l
MDSTAT_GEM	arch/arm/mach-davinci/lowlevel_init.S	/^MDSTAT_GEM:$/;"	l
MDSTAT_STATE	arch/arm/mach-davinci/lowlevel_init.S	/^#define MDSTAT_STATE	/;"	d	file:
MDS_MASK	include/bedbug/ppc.h	/^#define MDS_MASK /;"	d
MDS_OPCODE	include/bedbug/ppc.h	/^#define MDS_OPCODE(/;"	d
MD_AP	arch/powerpc/include/asm/mmu.h	/^#define MD_AP	/;"	d
MD_APG	arch/powerpc/include/asm/mmu.h	/^#define MD_APG	/;"	d
MD_ASIDMASK	arch/powerpc/include/asm/mmu.h	/^#define MD_ASIDMASK	/;"	d
MD_CIDEF	arch/powerpc/include/asm/mmu.h	/^#define MD_CIDEF	/;"	d
MD_CK0	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^#define MD_CK0	/;"	d
MD_CK1	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^#define MD_CK1	/;"	d
MD_CK2	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^#define MD_CK2	/;"	d
MD_CNTL_CKE_CNTL_HIGH	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CKE_CNTL_HIGH	/;"	d
MD_CNTL_CKE_CNTL_LOW	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CKE_CNTL_LOW	/;"	d
MD_CNTL_CS_SEL	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL(/;"	d
MD_CNTL_CS_SEL_CS0	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL_CS0	/;"	d
MD_CNTL_CS_SEL_CS0_CS1	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL_CS0_CS1	/;"	d
MD_CNTL_CS_SEL_CS1	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL_CS1	/;"	d
MD_CNTL_CS_SEL_CS2	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL_CS2	/;"	d
MD_CNTL_CS_SEL_CS2_CS3	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL_CS2_CS3	/;"	d
MD_CNTL_CS_SEL_CS3	include/fsl_ddr_sdram.h	/^#define MD_CNTL_CS_SEL_CS3	/;"	d
MD_CNTL_MD_EN	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_EN	/;"	d
MD_CNTL_MD_SEL	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_SEL(/;"	d
MD_CNTL_MD_SEL_EMR	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_SEL_EMR	/;"	d
MD_CNTL_MD_SEL_EMR2	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_SEL_EMR2	/;"	d
MD_CNTL_MD_SEL_EMR3	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_SEL_EMR3	/;"	d
MD_CNTL_MD_SEL_MR	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_SEL_MR	/;"	d
MD_CNTL_MD_VALUE	include/fsl_ddr_sdram.h	/^#define MD_CNTL_MD_VALUE(/;"	d
MD_CNTL_SET_PRE	include/fsl_ddr_sdram.h	/^#define MD_CNTL_SET_PRE	/;"	d
MD_CNTL_SET_REF	include/fsl_ddr_sdram.h	/^#define MD_CNTL_SET_REF	/;"	d
MD_CNTL_WRCW	include/fsl_ddr_sdram.h	/^#define MD_CNTL_WRCW	/;"	d
MD_CTR	arch/powerpc/include/asm/mmu.h	/^#define MD_CTR	/;"	d
MD_EPN	arch/powerpc/include/asm/mmu.h	/^#define MD_EPN	/;"	d
MD_EPNMASK	arch/powerpc/include/asm/mmu.h	/^#define MD_EPNMASK	/;"	d
MD_EVALID	arch/powerpc/include/asm/mmu.h	/^#define MD_EVALID	/;"	d
MD_GPM	arch/powerpc/include/asm/mmu.h	/^#define MD_GPM	/;"	d
MD_GUARDED	arch/powerpc/include/asm/mmu.h	/^#define MD_GUARDED	/;"	d
MD_IDXMASK	arch/powerpc/include/asm/mmu.h	/^#define MD_IDXMASK	/;"	d
MD_Kp	arch/powerpc/include/asm/mmu.h	/^#define MD_Kp	/;"	d
MD_Ks	arch/powerpc/include/asm/mmu.h	/^#define MD_Ks	/;"	d
MD_L2INDX	arch/powerpc/include/asm/mmu.h	/^#define MD_L2INDX	/;"	d
MD_L2TB	arch/powerpc/include/asm/mmu.h	/^#define MD_L2TB	/;"	d
MD_MASK	include/bedbug/ppc.h	/^#define MD_MASK /;"	d
MD_OPCODE	include/bedbug/ppc.h	/^#define MD_OPCODE(/;"	d
MD_PPCS	arch/powerpc/include/asm/mmu.h	/^#define MD_PPCS	/;"	d
MD_PPM	arch/powerpc/include/asm/mmu.h	/^#define MD_PPM	/;"	d
MD_PS4K_16K	arch/powerpc/include/asm/mmu.h	/^#define MD_PS4K_16K	/;"	d
MD_PS512K	arch/powerpc/include/asm/mmu.h	/^#define MD_PS512K	/;"	d
MD_PS8MEG	arch/powerpc/include/asm/mmu.h	/^#define MD_PS8MEG	/;"	d
MD_PSMASK	arch/powerpc/include/asm/mmu.h	/^#define MD_PSMASK	/;"	d
MD_RESETVAL	arch/powerpc/include/asm/mmu.h	/^#define MD_RESETVAL	/;"	d
MD_RPN	arch/powerpc/include/asm/mmu.h	/^#define MD_RPN	/;"	d
MD_RSV4I	arch/powerpc/include/asm/mmu.h	/^#define MD_RSV4I	/;"	d
MD_SVALID	arch/powerpc/include/asm/mmu.h	/^#define MD_SVALID	/;"	d
MD_TWAM	arch/powerpc/include/asm/mmu.h	/^#define MD_TWAM	/;"	d
MD_TWC	arch/powerpc/include/asm/mmu.h	/^#define MD_TWC	/;"	d
MD_WT	arch/powerpc/include/asm/mmu.h	/^#define MD_WT	/;"	d
MD_WTDEF	arch/powerpc/include/asm/mmu.h	/^#define MD_WTDEF	/;"	d
MEASURE_FREQ	drivers/thermal/imx_thermal.c	/^#define MEASURE_FREQ	/;"	d	file:
MECR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MECR	/;"	d
MECR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MECR	/;"	d
MECR	include/SA-1100.h	/^#define MECR	/;"	d
MECR_AttrClk	include/SA-1100.h	/^#define MECR_AttrClk(/;"	d
MECR_BSA	include/SA-1100.h	/^#define MECR_BSA	/;"	d
MECR_BSIO	include/SA-1100.h	/^#define MECR_BSIO	/;"	d
MECR_BSM	include/SA-1100.h	/^#define MECR_BSM	/;"	d
MECR_CIT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MECR_CIT	/;"	d
MECR_CeilAttrClk	include/SA-1100.h	/^#define MECR_CeilAttrClk(/;"	d
MECR_CeilIOClk	include/SA-1100.h	/^#define MECR_CeilIOClk(/;"	d
MECR_CeilMemClk	include/SA-1100.h	/^#define MECR_CeilMemClk(/;"	d
MECR_IOClk	include/SA-1100.h	/^#define MECR_IOClk(/;"	d
MECR_MemClk	include/SA-1100.h	/^#define MECR_MemClk(/;"	d
MECR_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MECR_OFFSET	/;"	d
MECR_PCMCIA	include/SA-1100.h	/^#define MECR_PCMCIA(/;"	d
MECR_PCMCIA0	include/SA-1100.h	/^#define MECR_PCMCIA0	/;"	d
MECR_PCMCIA1	include/SA-1100.h	/^#define MECR_PCMCIA1	/;"	d
MEDIA_1000FULL	drivers/net/ax88180.h	/^#define MEDIA_1000FULL	/;"	d
MEDIA_1000HALF	drivers/net/ax88180.h	/^#define MEDIA_1000HALF	/;"	d
MEDIA_100FULL	drivers/net/ax88180.h	/^#define MEDIA_100FULL	/;"	d
MEDIA_100HALF	drivers/net/ax88180.h	/^#define MEDIA_100HALF	/;"	d
MEDIA_10FULL	drivers/net/ax88180.h	/^#define MEDIA_10FULL	/;"	d
MEDIA_10HALF	drivers/net/ax88180.h	/^#define MEDIA_10HALF	/;"	d
MEDIA_AUTO	drivers/net/ax88180.h	/^#define MEDIA_AUTO	/;"	d
MEDIA_AXI_DU0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_DU0R_BASE	/;"	d
MEDIA_AXI_DU0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_DU0W_BASE	/;"	d
MEDIA_AXI_DU1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_DU1R_BASE	/;"	d
MEDIA_AXI_DU1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_DU1W_BASE	/;"	d
MEDIA_AXI_FDP0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_FDP0R_BASE	/;"	d
MEDIA_AXI_FDP0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_FDP0W_BASE	/;"	d
MEDIA_AXI_FDP1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_FDP1R_BASE	/;"	d
MEDIA_AXI_FDP1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_FDP1W_BASE	/;"	d
MEDIA_AXI_FDP2R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_FDP2R_BASE	/;"	d
MEDIA_AXI_FDP2W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_FDP2W_BASE	/;"	d
MEDIA_AXI_GCU0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_GCU0R_BASE	/;"	d
MEDIA_AXI_GCU0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_GCU0W_BASE	/;"	d
MEDIA_AXI_GCU1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_GCU1R_BASE	/;"	d
MEDIA_AXI_GCU1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_GCU1W_BASE	/;"	d
MEDIA_AXI_IMRR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMRR_BASE	/;"	d
MEDIA_AXI_IMRW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMRW_BASE	/;"	d
MEDIA_AXI_IMS01R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMS01R_BASE	/;"	d
MEDIA_AXI_IMS01W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMS01W_BASE	/;"	d
MEDIA_AXI_IMS23R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMS23R_BASE	/;"	d
MEDIA_AXI_IMS23W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMS23W_BASE	/;"	d
MEDIA_AXI_IMS45R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMS45R_BASE	/;"	d
MEDIA_AXI_IMS45W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMS45W_BASE	/;"	d
MEDIA_AXI_IMSR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMSR_BASE	/;"	d
MEDIA_AXI_IMSW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_IMSW_BASE	/;"	d
MEDIA_AXI_JPR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_JPR_BASE	/;"	d
MEDIA_AXI_JPW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_JPW_BASE	/;"	d
MEDIA_AXI_MXR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_MXR_BASE	/;"	d
MEDIA_AXI_MXW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_MXW_BASE	/;"	d
MEDIA_AXI_RDRW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_RDRW_BASE	/;"	d
MEDIA_AXI_ROTCE0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE0R_BASE	/;"	d
MEDIA_AXI_ROTCE0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE0W_BASE	/;"	d
MEDIA_AXI_ROTCE1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE1R_BASE	/;"	d
MEDIA_AXI_ROTCE1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE1W_BASE	/;"	d
MEDIA_AXI_ROTCE2R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE2R_BASE	/;"	d
MEDIA_AXI_ROTCE2W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE2W_BASE	/;"	d
MEDIA_AXI_ROTCE3R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE3R_BASE	/;"	d
MEDIA_AXI_ROTCE3W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE3W_BASE	/;"	d
MEDIA_AXI_ROTCE4R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE4R_BASE	/;"	d
MEDIA_AXI_ROTCE4W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTCE4W_BASE	/;"	d
MEDIA_AXI_ROTVLC0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC0R_BASE	/;"	d
MEDIA_AXI_ROTVLC0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC0W_BASE	/;"	d
MEDIA_AXI_ROTVLC1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC1R_BASE	/;"	d
MEDIA_AXI_ROTVLC1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC1W_BASE	/;"	d
MEDIA_AXI_ROTVLC2R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC2R_BASE	/;"	d
MEDIA_AXI_ROTVLC2W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC2W_BASE	/;"	d
MEDIA_AXI_ROTVLC3R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC3R_BASE	/;"	d
MEDIA_AXI_ROTVLC3W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC3W_BASE	/;"	d
MEDIA_AXI_ROTVLC4R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC4R_BASE	/;"	d
MEDIA_AXI_ROTVLC4W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_ROTVLC4W_BASE	/;"	d
MEDIA_AXI_TDMR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_TDMR_BASE	/;"	d
MEDIA_AXI_TDMW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_TDMW_BASE	/;"	d
MEDIA_AXI_VCP0CR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP0CR_BASE	/;"	d
MEDIA_AXI_VCP0CW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP0CW_BASE	/;"	d
MEDIA_AXI_VCP0VR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP0VR_BASE	/;"	d
MEDIA_AXI_VCP0VW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP0VW_BASE	/;"	d
MEDIA_AXI_VCP1CR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP1CR_BASE	/;"	d
MEDIA_AXI_VCP1CW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP1CW_BASE	/;"	d
MEDIA_AXI_VCP1VR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP1VR_BASE	/;"	d
MEDIA_AXI_VCP1VW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCP1VW_BASE	/;"	d
MEDIA_AXI_VCTU0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCTU0R_BASE	/;"	d
MEDIA_AXI_VCTU0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VCTU0W_BASE	/;"	d
MEDIA_AXI_VDCTU0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VDCTU0R_BASE	/;"	d
MEDIA_AXI_VDCTU0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VDCTU0W_BASE	/;"	d
MEDIA_AXI_VDCTU1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VDCTU1R_BASE	/;"	d
MEDIA_AXI_VDCTU1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VDCTU1W_BASE	/;"	d
MEDIA_AXI_VIN0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VIN0W_BASE	/;"	d
MEDIA_AXI_VIN1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VIN1W_BASE	/;"	d
MEDIA_AXI_VPC0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VPC0R_BASE	/;"	d
MEDIA_AXI_VPC1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VPC1R_BASE	/;"	d
MEDIA_AXI_VSP0CR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP0CR_BASE	/;"	d
MEDIA_AXI_VSP0CW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP0CW_BASE	/;"	d
MEDIA_AXI_VSP0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP0R_BASE	/;"	d
MEDIA_AXI_VSP0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP0W_BASE	/;"	d
MEDIA_AXI_VSP1CR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP1CR_BASE	/;"	d
MEDIA_AXI_VSP1CW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP1CW_BASE	/;"	d
MEDIA_AXI_VSP1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP1R_BASE	/;"	d
MEDIA_AXI_VSP1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSP1W_BASE	/;"	d
MEDIA_AXI_VSPD0R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPD0R_BASE	/;"	d
MEDIA_AXI_VSPD0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPD0W_BASE	/;"	d
MEDIA_AXI_VSPD1R_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPD1R_BASE	/;"	d
MEDIA_AXI_VSPD1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPD1W_BASE	/;"	d
MEDIA_AXI_VSPDU0CR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPDU0CR_BASE	/;"	d
MEDIA_AXI_VSPDU0CW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPDU0CW_BASE	/;"	d
MEDIA_AXI_VSPDU1CR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPDU1CR_BASE	/;"	d
MEDIA_AXI_VSPDU1CW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MEDIA_AXI_VSPDU1CW_BASE	/;"	d
MEDIA_UNKNOWN	drivers/net/ax88180.h	/^#define MEDIA_UNKNOWN	/;"	d
MEGA	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MEGA	/;"	d
MEGA_BYTE	board/mpl/mip405/mip405.c	/^#define MEGA_BYTE /;"	d	file:
MEG_TO_AM	arch/powerpc/include/asm/fsl_lbc.h	/^#define MEG_TO_AM(/;"	d
MEG_TO_AM	include/mpc8260.h	/^#define MEG_TO_AM(/;"	d
MEI_ADDRESS_AMT	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_AMT	/;"	d
MEI_ADDRESS_CORE	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_CORE	/;"	d
MEI_ADDRESS_ICC	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_ICC	/;"	d
MEI_ADDRESS_MKHI	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_MKHI	/;"	d
MEI_ADDRESS_RESERVED	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_RESERVED	/;"	d
MEI_ADDRESS_THERMAL	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_THERMAL	/;"	d
MEI_ADDRESS_WDT	arch/x86/include/asm/me_common.h	/^#define MEI_ADDRESS_WDT	/;"	d
MEI_HOST_ADDRESS	arch/x86/include/asm/me_common.h	/^#define MEI_HOST_ADDRESS	/;"	d
MEI_H_CB_WW	arch/x86/include/asm/me_common.h	/^#define MEI_H_CB_WW	/;"	d
MEI_H_CSR	arch/x86/include/asm/me_common.h	/^#define MEI_H_CSR	/;"	d
MEI_ME_CB_RW	arch/x86/include/asm/me_common.h	/^#define MEI_ME_CB_RW	/;"	d
MEI_ME_CSR_HA	arch/x86/include/asm/me_common.h	/^#define MEI_ME_CSR_HA	/;"	d
MEM	include/lattice.h	/^#define MEM	/;"	d
MEM	lib/zlib/inflate.h	/^    MEM,        \/* got an inflate() memory error -- remain here until reset *\/$/;"	e	enum:__anon43d5a4c40103
MEMAC_CMD_CFG_NO_LEN_CHK	include/fsl_memac.h	/^#define MEMAC_CMD_CFG_NO_LEN_CHK /;"	d
MEMAC_CMD_CFG_RXTX_EN	include/fsl_memac.h	/^#define MEMAC_CMD_CFG_RXTX_EN	/;"	d
MEMAC_CMD_CFG_RX_EN	include/fsl_memac.h	/^#define MEMAC_CMD_CFG_RX_EN	/;"	d
MEMAC_CMD_CFG_TX_EN	include/fsl_memac.h	/^#define MEMAC_CMD_CFG_TX_EN	/;"	d
MEMADDR	arch/xtensa/include/asm/addrspace.h	/^#define MEMADDR(/;"	d
MEMBASECONFIG0_CHIP_BASE_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEMBASECONFIG0_CHIP_BASE_VAL	/;"	d
MEMBASECONFIG1_CHIP_BASE_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEMBASECONFIG1_CHIP_BASE_VAL	/;"	d
MEMBASECONFIG_CHIP_MASK_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEMBASECONFIG_CHIP_MASK_OFFSET	/;"	d
MEMBASECONFIG_CHIP_MASK_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEMBASECONFIG_CHIP_MASK_VAL	/;"	d
MEMCLKCFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MEMCLKCFG	/;"	d
MEMCOMP_PADCTRL_VREF	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define MEMCOMP_PADCTRL_VREF	/;"	d
MEMCONFIG0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MEMCONFIG0_VAL	/;"	d
MEMCONFIG1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MEMCONFIG1_VAL	/;"	d
MEMCONFIG_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEMCONFIG_VAL	/;"	d
MEMCONTROL_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MEMCONTROL_VAL	/;"	d
MEMCTL_BASE	arch/arm/imx-common/cpu.c	/^#define MEMCTL_BASE	/;"	d	file:
MEMC_A0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_A0_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_A1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_A1_MARK, \/* MSEL4CR_6_1 *\/$/;"	e	enum:__anona304c1340103	file:
MEMC_AD0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD0_MARK,	MEMC_AD1_MARK,	MEMC_AD2_MARK,	MEMC_AD3_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD8_MARK,	MEMC_AD9_MARK,	MEMC_AD10_MARK,	MEMC_AD11_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD8_MARK,	MEMC_AD9_MARK,	MEMC_AD10_MARK,	MEMC_AD11_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD12_MARK,	MEMC_AD13_MARK,	MEMC_AD14_MARK,	MEMC_AD15_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD12_MARK,	MEMC_AD13_MARK,	MEMC_AD14_MARK,	MEMC_AD15_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD14_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD12_MARK,	MEMC_AD13_MARK,	MEMC_AD14_MARK,	MEMC_AD15_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD15_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD12_MARK,	MEMC_AD13_MARK,	MEMC_AD14_MARK,	MEMC_AD15_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD0_MARK,	MEMC_AD1_MARK,	MEMC_AD2_MARK,	MEMC_AD3_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD0_MARK,	MEMC_AD1_MARK,	MEMC_AD2_MARK,	MEMC_AD3_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD0_MARK,	MEMC_AD1_MARK,	MEMC_AD2_MARK,	MEMC_AD3_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD4_MARK,	MEMC_AD5_MARK,	MEMC_AD6_MARK,	MEMC_AD7_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD4_MARK,	MEMC_AD5_MARK,	MEMC_AD6_MARK,	MEMC_AD7_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD4_MARK,	MEMC_AD5_MARK,	MEMC_AD6_MARK,	MEMC_AD7_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD4_MARK,	MEMC_AD5_MARK,	MEMC_AD6_MARK,	MEMC_AD7_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD8_MARK,	MEMC_AD9_MARK,	MEMC_AD10_MARK,	MEMC_AD11_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_AD9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_AD8_MARK,	MEMC_AD9_MARK,	MEMC_AD10_MARK,	MEMC_AD11_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_ADV_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_ADV_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_BASE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MEMC_BASE	/;"	d
MEMC_BUSCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_BUSCLK_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_CS0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_CS0_MARK,	MEMC_INT_MARK,	MEMC_NWE_MARK,	MEMC_NOE_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_CS1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_CS1_MARK, \/* MSEL4CR_6_0 *\/$/;"	e	enum:__anona304c1340103	file:
MEMC_DREQ0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_DREQ0_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_DREQ1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_DREQ1_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_INT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_CS0_MARK,	MEMC_INT_MARK,	MEMC_NWE_MARK,	MEMC_NOE_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_NOE_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_CS0_MARK,	MEMC_INT_MARK,	MEMC_NWE_MARK,	MEMC_NOE_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_NWE_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_CS0_MARK,	MEMC_INT_MARK,	MEMC_NWE_MARK,	MEMC_NOE_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMC_WAIT_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MEMC_WAIT_MARK,$/;"	e	enum:__anona304c1340103	file:
MEMEN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MEMEN	/;"	d
MEMERASE	include/mtd/mtd-abi.h	/^#define MEMERASE	/;"	d
MEMERASE64	include/mtd/mtd-abi.h	/^#define MEMERASE64	/;"	d
MEMGETBADBLOCK	include/mtd/mtd-abi.h	/^#define MEMGETBADBLOCK	/;"	d
MEMGETINFO	include/mtd/mtd-abi.h	/^#define MEMGETINFO	/;"	d
MEMGETOOBSEL	include/mtd/mtd-abi.h	/^#define MEMGETOOBSEL	/;"	d
MEMGETREGIONCOUNT	include/mtd/mtd-abi.h	/^#define MEMGETREGIONCOUNT	/;"	d
MEMGETREGIONINFO	include/mtd/mtd-abi.h	/^#define MEMGETREGIONINFO	/;"	d
MEMIF_CG_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEMIF_CG_EN	/;"	d
MEMINITDONE	arch/blackfin/cpu/initcode.c	/^#define MEMINITDONE /;"	d	file:
MEMISLOCKED	include/mtd/mtd-abi.h	/^#define MEMISLOCKED	/;"	d
MEMLOCK	include/mtd/mtd-abi.h	/^#define MEMLOCK	/;"	d
MEMORY_ATTRIBUTES	arch/arm/include/asm/armv8/mmu.h	/^#define MEMORY_ATTRIBUTES	/;"	d
MEMORY_ATTRIBUTES	arch/arm/include/asm/system.h	/^#define MEMORY_ATTRIBUTES	/;"	d
MEMORY_BANKS_MAX	common/fdt_support.c	/^#define MEMORY_BANKS_MAX /;"	d	file:
MEMORY_SELECT_DDR3	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	MEMORY_SELECT_DDR3			= 0 << 6,$/;"	e	enum:__anon957231910103	file:
MEMORY_TYPE_CONVENTIONAL	arch/xtensa/include/asm/bootparam.h	/^#define MEMORY_TYPE_CONVENTIONAL /;"	d
MEMORY_TYPE_DDR	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_DDR,$/;"	e	enum:memory_type
MEMORY_TYPE_DDR2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_DDR2,$/;"	e	enum:memory_type
MEMORY_TYPE_FORCE32	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_FORCE32 = 0x7FFFFFFF$/;"	e	enum:memory_type
MEMORY_TYPE_LPDDR	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_LPDDR,$/;"	e	enum:memory_type
MEMORY_TYPE_LPDDR2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_LPDDR2,$/;"	e	enum:memory_type
MEMORY_TYPE_NONE	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_NONE = 0,$/;"	e	enum:memory_type
MEMORY_TYPE_NONE	arch/xtensa/include/asm/bootparam.h	/^#define MEMORY_TYPE_NONE /;"	d
MEMORY_TYPE_NUM	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	MEMORY_TYPE_NUM,$/;"	e	enum:memory_type
MEMORY_WAIT_TIME	drivers/net/lan91c96.c	/^#define MEMORY_WAIT_TIME /;"	d	file:
MEMORY_WAIT_TIME	drivers/net/smc91111.c	/^#define MEMORY_WAIT_TIME /;"	d	file:
MEMREADOOB	include/mtd/mtd-abi.h	/^#define MEMREADOOB	/;"	d
MEMREADOOB64	include/mtd/mtd-abi.h	/^#define MEMREADOOB64	/;"	d
MEMSETBADBLOCK	include/mtd/mtd-abi.h	/^#define MEMSETBADBLOCK	/;"	d
MEMSIZE_4G	drivers/ddr/altera/sdram.c	/^#define MEMSIZE_4G	/;"	d	file:
MEMUNLOCK	include/mtd/mtd-abi.h	/^#define MEMUNLOCK	/;"	d
MEMU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MEMU_BASE_ADDR	/;"	d
MEMWRITE	include/mtd/mtd-abi.h	/^#define MEMWRITE	/;"	d
MEMWRITEOOB	include/mtd/mtd-abi.h	/^#define MEMWRITEOOB	/;"	d
MEMWRITEOOB64	include/mtd/mtd-abi.h	/^#define MEMWRITEOOB64	/;"	d
MEM_1G	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	MEM_1G,$/;"	e	enum:hws_mem_size
MEM_1MS	board/dbau1x00/lowlevel_init.S	/^#define MEM_1MS	/;"	d	file:
MEM_1MS	board/pb1x00/lowlevel_init.S	/^#define MEM_1MS	/;"	d	file:
MEM_2G	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	MEM_2G,$/;"	e	enum:hws_mem_size
MEM_4G	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	MEM_4G,$/;"	e	enum:hws_mem_size
MEM_512M	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	MEM_512M,$/;"	e	enum:hws_mem_size
MEM_8G	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	MEM_8G,$/;"	e	enum:hws_mem_size
MEM_ARBITER_STATUS_BUSY	include/radeon.h	/^#define MEM_ARBITER_STATUS_BUSY	/;"	d
MEM_ARBITER_STATUS_IDLE	include/radeon.h	/^#define MEM_ARBITER_STATUS_IDLE	/;"	d
MEM_BAR_EN	arch/x86/include/asm/arch-quark/quark.h	/^#define MEM_BAR_EN	/;"	d
MEM_BAR_EN	arch/x86/include/asm/arch-queensbay/tnc.h	/^#define MEM_BAR_EN	/;"	d
MEM_BASE	include/configs/thunderx_88xx.h	/^#define MEM_BASE	/;"	d
MEM_BG_ASYNC0	drivers/video/ipu.h	/^	MEM_BG_ASYNC0 = _MAKE_CHAN(11, 24, NO_DMA, 52, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
MEM_BG_ASYNC1	drivers/video/ipu.h	/^	MEM_BG_ASYNC1 = _MAKE_ALT_CHAN(MEM_BG_ASYNC0),$/;"	e	enum:__anon4a35f9fd0203
MEM_BG_SYNC	drivers/video/ipu.h	/^	MEM_BG_SYNC = _MAKE_CHAN(9, 23, NO_DMA, 51, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
MEM_BL4	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	MEM_BL4				= 0 << 0,$/;"	e	enum:__anon957231910203	file:
MEM_BL8	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	MEM_BL8				= 1 << 0,$/;"	e	enum:__anon957231910203	file:
MEM_CFG_TYPE	include/radeon.h	/^#define MEM_CFG_TYPE	/;"	d
MEM_CLK_2HCLK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MEM_CLK_2HCLK	/;"	d
MEM_CLK_HCLK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MEM_CLK_HCLK	/;"	d
MEM_CLK_PLL2	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MEM_CLK_PLL2	/;"	d
MEM_CLK_SEL_MSK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MEM_CLK_SEL_MSK	/;"	d
MEM_CNTL	include/radeon.h	/^#define MEM_CNTL	/;"	d
MEM_CS	drivers/spi/ti_qspi.c	/^#define MEM_CS(/;"	d	file:
MEM_CS_UNSELECT	drivers/spi/ti_qspi.c	/^#define MEM_CS_UNSELECT /;"	d	file:
MEM_CTLR	arch/x86/cpu/quark/mrc_util.h	/^#define MEM_CTLR	/;"	d
MEM_CTLR_STATUS_BUSY	include/radeon.h	/^#define MEM_CTLR_STATUS_BUSY	/;"	d
MEM_CTLR_STATUS_IDLE	include/radeon.h	/^#define MEM_CTLR_STATUS_IDLE	/;"	d
MEM_DC_ASYNC	drivers/video/ipu.h	/^	MEM_DC_ASYNC = _MAKE_CHAN(8, 41, NO_DMA, NO_DMA, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
MEM_DC_SYNC	drivers/video/ipu.h	/^	MEM_DC_SYNC = _MAKE_CHAN(7, 28, NO_DMA, NO_DMA, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
MEM_FG_ASYNC0	drivers/video/ipu.h	/^	MEM_FG_ASYNC0 = _MAKE_CHAN(12, 29, NO_DMA, 33, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
MEM_FG_ASYNC1	drivers/video/ipu.h	/^	MEM_FG_ASYNC1 = _MAKE_ALT_CHAN(MEM_FG_ASYNC0),$/;"	e	enum:__anon4a35f9fd0203
MEM_FG_SYNC	drivers/video/ipu.h	/^	MEM_FG_SYNC = _MAKE_CHAN(10, 27, NO_DMA, 31, NO_DMA),$/;"	e	enum:__anon4a35f9fd0203
MEM_FLASH_ADDR1	board/cobra5272/flash.c	/^#define MEM_FLASH_ADDR1	/;"	d	file:
MEM_FLASH_ADDR2	board/cobra5272/flash.c	/^#define MEM_FLASH_ADDR2	/;"	d	file:
MEM_INIT_LATENCY_TIMER	include/radeon.h	/^#define MEM_INIT_LATENCY_TIMER	/;"	d
MEM_IO_CNTL_A0	include/radeon.h	/^#define MEM_IO_CNTL_A0	/;"	d
MEM_IO_CNTL_A1	include/radeon.h	/^#define MEM_IO_CNTL_A1	/;"	d
MEM_IO_CNTL_B0	include/radeon.h	/^#define MEM_IO_CNTL_B0	/;"	d
MEM_IO_CNTL_B1	include/radeon.h	/^#define MEM_IO_CNTL_B1	/;"	d
MEM_IO_OE_CNTL	include/radeon.h	/^#define MEM_IO_OE_CNTL	/;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/am335x_sl50.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/colibri_imx7.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/embestmx6boards.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/exynos5-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/exynos7420-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/peach-pi.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/peach-pit.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/pic32mzdask.h	/^#define MEM_LAYOUT_ENV_SETTINGS	/;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/sandbox.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/sunxi-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/tegra114-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/tegra124-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/tegra186-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/tegra20-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/tegra210-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/tegra30-common.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/usbarmory.h	/^#define MEM_LAYOUT_ENV_SETTINGS	/;"	d
MEM_LAYOUT_ENV_SETTINGS	include/configs/vf610twr.h	/^#define MEM_LAYOUT_ENV_SETTINGS /;"	d
MEM_LAYOUT_SETTINGS	include/configs/omap3_igep00x0.h	/^#define MEM_LAYOUT_SETTINGS /;"	d
MEM_MANUF_AUTODETECT	arch/arm/mach-exynos/include/mach/dmc.h	/^	MEM_MANUF_AUTODETECT,$/;"	e	enum:mem_manuf
MEM_MANUF_COUNT	arch/arm/mach-exynos/include/mach/dmc.h	/^	MEM_MANUF_COUNT,$/;"	e	enum:mem_manuf
MEM_MANUF_ELPIDA	arch/arm/mach-exynos/include/mach/dmc.h	/^	MEM_MANUF_ELPIDA,$/;"	e	enum:mem_manuf
MEM_MANUF_SAMSUNG	arch/arm/mach-exynos/include/mach/dmc.h	/^	MEM_MANUF_SAMSUNG,$/;"	e	enum:mem_manuf
MEM_MGR	arch/x86/cpu/quark/mrc_util.h	/^#define MEM_MGR	/;"	d
MEM_NUM_CHANNELS_MASK	include/radeon.h	/^#define MEM_NUM_CHANNELS_MASK	/;"	d
MEM_RANGE_COUNT	arch/x86/include/asm/coreboot_tables.h	/^#define MEM_RANGE_COUNT(/;"	d
MEM_RANGE_PTR	arch/x86/include/asm/coreboot_tables.h	/^#define MEM_RANGE_PTR(/;"	d
MEM_REFRESH_CNTL	include/radeon.h	/^#define MEM_REFRESH_CNTL	/;"	d
MEM_REFRESH_CNTL__DLL_FB_SLCT_CKA_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKA_MASK	/;"	d
MEM_REFRESH_CNTL__DLL_FB_SLCT_CKB_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKB_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE	/;"	d
MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE	/;"	d
MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_REFRESH_DIS	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS	/;"	d
MEM_REFRESH_CNTL__MEM_REFRESH_DIS_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_REFRESH_RATE_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_REFRESH_RATE_MASK	/;"	d
MEM_REFRESH_CNTL__MEM_TRFC_MASK	include/radeon.h	/^#define MEM_REFRESH_CNTL__MEM_TRFC_MASK	/;"	d
MEM_REQ_LOCK	include/radeon.h	/^#define MEM_REQ_LOCK	/;"	d
MEM_REQ_UNLOCK	include/radeon.h	/^#define MEM_REQ_UNLOCK	/;"	d
MEM_RESERVE_SECURE_ADDR_MASK	arch/arm/include/asm/global_data.h	/^#define MEM_RESERVE_SECURE_ADDR_MASK	/;"	d
MEM_RESERVE_SECURE_MAINTAINED	arch/arm/include/asm/global_data.h	/^#define MEM_RESERVE_SECURE_MAINTAINED	/;"	d
MEM_RESERVE_SECURE_SECURED	arch/arm/include/asm/global_data.h	/^#define MEM_RESERVE_SECURE_SECURED	/;"	d
MEM_SDADDR0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDADDR0 /;"	d
MEM_SDADDR1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDADDR1 /;"	d
MEM_SDADDR2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDADDR2 /;"	d
MEM_SDAUTOREF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDAUTOREF /;"	d
MEM_SDCONFIGA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDCONFIGA /;"	d
MEM_SDCONFIGB	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDCONFIGB /;"	d
MEM_SDMODE0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDMODE0 /;"	d
MEM_SDMODE1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDMODE1 /;"	d
MEM_SDMODE2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDMODE2 /;"	d
MEM_SDPRECMD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDPRECMD /;"	d
MEM_SDRAM_MODE_REG	include/radeon.h	/^#define MEM_SDRAM_MODE_REG	/;"	d
MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE	/;"	d
MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE_MASK	/;"	d
MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_CFG_TYPE	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE	/;"	d
MEM_SDRAM_MODE_REG__MEM_CFG_TYPE_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_CFG_TYPE__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY	/;"	d
MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_DDR_DLL	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL	/;"	d
MEM_SDRAM_MODE_REG__MEM_DDR_DLL_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_DDR_DLL__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_MODE_REG_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_MODE_REG_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_MODE_REG__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_MODE_REG__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET	/;"	d
MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_STR_LATENCY	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY	/;"	d
MEM_SDRAM_MODE_REG__MEM_STR_LATENCY_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_STR_LATENCY__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY__SHIFT	/;"	d
MEM_SDRAM_MODE_REG__MEM_WR_LATENCY_MASK	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY_MASK	/;"	d
MEM_SDRAM_MODE_REG__MEM_WR_LATENCY__SHIFT	include/radeon.h	/^#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY__SHIFT	/;"	d
MEM_SDREFCFG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDREFCFG /;"	d
MEM_SDSLEEP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDSLEEP /;"	d
MEM_SDSMCKE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDSMCKE /;"	d
MEM_SDWRMD0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDWRMD0 /;"	d
MEM_SDWRMD1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDWRMD1 /;"	d
MEM_SDWRMD2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_SDWRMD2 /;"	d
MEM_SEQNCR_STATUS_BUSY	include/radeon.h	/^#define MEM_SEQNCR_STATUS_BUSY	/;"	d
MEM_SEQNCR_STATUS_IDLE	include/radeon.h	/^#define MEM_SEQNCR_STATUS_IDLE	/;"	d
MEM_SIZE	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define MEM_SIZE /;"	d
MEM_SIZE	include/configs/dbau1x00.h	/^#define MEM_SIZE /;"	d
MEM_SIZE	include/configs/qemu-mips.h	/^#define MEM_SIZE	/;"	d
MEM_SIZE	include/configs/qemu-mips64.h	/^#define MEM_SIZE	/;"	d
MEM_SIZE_LAST	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	MEM_SIZE_LAST$/;"	e	enum:hws_mem_size
MEM_STADDR0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STADDR0 /;"	d
MEM_STADDR1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STADDR1 /;"	d
MEM_STADDR2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STADDR2 /;"	d
MEM_STADDR3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STADDR3 /;"	d
MEM_STCFG0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STCFG0 /;"	d
MEM_STCFG1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STCFG1 /;"	d
MEM_STCFG2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STCFG2 /;"	d
MEM_STCFG3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STCFG3 /;"	d
MEM_STTIME0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STTIME0 /;"	d
MEM_STTIME1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STTIME1 /;"	d
MEM_STTIME2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STTIME2 /;"	d
MEM_STTIME3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define MEM_STTIME3 /;"	d
MEM_TERM_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define MEM_TERM_EN	/;"	d
MEM_TEXT_SIZE	drivers/misc/swap_case.c	/^	MEM_TEXT_SIZE	= 0x100,$/;"	e	enum:__anon314a90350103	file:
MEM_TIMINGS_MSR_COUNT	arch/arm/mach-exynos/clock_init.h	/^	MEM_TIMINGS_MSR_COUNT	= 5,$/;"	e	enum:__anone01067d10103
MEM_TIMINGS_MSR_COUNT	arch/arm/mach-exynos/exynos4_setup.h	/^#define MEM_TIMINGS_MSR_COUNT	/;"	d
MEM_TYPE_DDR1	drivers/ddr/marvell/axp/ddr3_spd.c	/^	MEM_TYPE_DDR1,$/;"	e	enum:memory_type	file:
MEM_TYPE_DDR2	drivers/ddr/marvell/axp/ddr3_spd.c	/^	MEM_TYPE_DDR2,$/;"	e	enum:memory_type	file:
MEM_TYPE_DDR3	arch/arm/mach-exynos/exynos4_setup.h	/^#define MEM_TYPE_DDR3	/;"	d
MEM_TYPE_DDR3	drivers/ddr/marvell/axp/ddr3_spd.c	/^	MEM_TYPE_DDR3$/;"	e	enum:memory_type	file:
MEM_TYPE_SDRAM	drivers/ddr/marvell/axp/ddr3_spd.c	/^	MEM_TYPE_SDRAM,$/;"	e	enum:memory_type	file:
MEM_USE_B_CH_ONLY	include/radeon.h	/^#define MEM_USE_B_CH_ONLY	/;"	d
MEM_VGA_RP_SEL	include/radeon.h	/^#define MEM_VGA_RP_SEL	/;"	d
MEM_VGA_WP_SEL	include/radeon.h	/^#define MEM_VGA_WP_SEL	/;"	d
MEM_WIDTH_32	arch/arm/mach-exynos/exynos4_setup.h	/^#define MEM_WIDTH_32	/;"	d
MEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	MEN	/;"	d
MENTA_devices	cmd/ambapp.c	/^static ambapp_device_name MENTA_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
MENTOR_USB0_BASE	drivers/usb/musb/davinci.h	/^#define MENTOR_USB0_BASE /;"	d
MENTOR_USB0_BASE	drivers/usb/musb/omap3.h	/^#define MENTOR_USB0_BASE /;"	d
MENUBOX_HEIGTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define MENUBOX_HEIGTH_MIN /;"	d
MENUBOX_WIDTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define MENUBOX_WIDTH_MIN /;"	d
MENU_CHANGED	scripts/kconfig/expr.h	/^#define MENU_CHANGED	/;"	d
MENU_ROOT	scripts/kconfig/expr.h	/^#define MENU_ROOT	/;"	d
MER	arch/powerpc/include/asm/xilinx_irq.h	/^#define MER	/;"	d
MERAM_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define MERAM_BASE	/;"	d
MERAM_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define MERAM_BASE	/;"	d
MERAM_STACK	arch/arm/mach-rmobile/lowlevel_init.S	/^MERAM_STACK:$/;"	l
MERR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	MERR	/;"	d
MESON_GXBB	arch/arm/mach-meson/Kconfig	/^config MESON_GXBB$/;"	c
MESON_PIN	drivers/pinctrl/meson/pinctrl-meson.h	/^#define MESON_PIN(/;"	d
MESON_SERIAL	drivers/serial/Kconfig	/^config MESON_SERIAL$/;"	c	menu:Serial drivers
MEW0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MEW0_BASE_ADDR	/;"	d
MEW1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MEW1_BASE_ADDR	/;"	d
ME_DELAY	arch/x86/include/asm/me_common.h	/^#define ME_DELAY	/;"	d
ME_DISABLE_BIOS_PATH	arch/x86/include/asm/me_common.h	/^	ME_DISABLE_BIOS_PATH,$/;"	e	enum:me_bios_path
ME_ERROR_BIOS_PATH	arch/x86/include/asm/me_common.h	/^	ME_ERROR_BIOS_PATH,$/;"	e	enum:me_bios_path
ME_FIRMWARE_UPDATE_BIOS_PATH	arch/x86/include/asm/me_common.h	/^	ME_FIRMWARE_UPDATE_BIOS_PATH,$/;"	e	enum:me_bios_path
ME_GMES_PHASE_BUP	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_BUP	/;"	d
ME_GMES_PHASE_HOST	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_HOST	/;"	d
ME_GMES_PHASE_MODULE	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_MODULE	/;"	d
ME_GMES_PHASE_POLICY	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_POLICY	/;"	d
ME_GMES_PHASE_ROM	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_ROM	/;"	d
ME_GMES_PHASE_UKERNEL	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_UKERNEL	/;"	d
ME_GMES_PHASE_UNKNOWN	arch/x86/include/asm/me_common.h	/^#define  ME_GMES_PHASE_UNKNOWN	/;"	d
ME_HFS2_PHASE_BUP	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_BUP	/;"	d
ME_HFS2_PHASE_HOST_COMM	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_HOST_COMM	/;"	d
ME_HFS2_PHASE_MODULE_LOAD	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_MODULE_LOAD	/;"	d
ME_HFS2_PHASE_POLICY	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_POLICY	/;"	d
ME_HFS2_PHASE_ROM	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_ROM	/;"	d
ME_HFS2_PHASE_UKERNEL	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_UKERNEL	/;"	d
ME_HFS2_PHASE_UNKNOWN	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PHASE_UNKNOWN	/;"	d
ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET /;"	d
ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR /;"	d
ME_HFS2_PMEVENT_CLEAN_ME_RESET	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_CLEAN_ME_RESET /;"	d
ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE /;"	d
ME_HFS2_PMEVENT_ME_RESET_EXCEPTION	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_ME_RESET_EXCEPTION /;"	d
ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR /;"	d
ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET /;"	d
ME_HFS2_PMEVENT_PSEUDO_ME_RESET	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_PSEUDO_ME_RESET /;"	d
ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3 /;"	d
ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF /;"	d
ME_HFS2_PMEVENT_S0MO_SXM3	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_S0MO_SXM3 /;"	d
ME_HFS2_PMEVENT_SXM3_S0M0	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_SXM3_S0M0 /;"	d
ME_HFS2_PMEVENT_SXMX_SXMOFF	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_PMEVENT_SXMX_SXMOFF /;"	d
ME_HFS2_STATE_BUP_CHECK_STRAP	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_CHECK_STRAP /;"	d
ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING /;"	d
ME_HFS2_STATE_BUP_DID_NO_FAIL	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_DID_NO_FAIL /;"	d
ME_HFS2_STATE_BUP_DIS_HOST_WAKE	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_DIS_HOST_WAKE /;"	d
ME_HFS2_STATE_BUP_ENABLE_UMA	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_ENABLE_UMA /;"	d
ME_HFS2_STATE_BUP_ENABLE_UMA_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_ENABLE_UMA_ERR /;"	d
ME_HFS2_STATE_BUP_FLOW_DET	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_FLOW_DET /;"	d
ME_HFS2_STATE_BUP_FLOW_DET_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_FLOW_DET_ERR /;"	d
ME_HFS2_STATE_BUP_INIT	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_INIT /;"	d
ME_HFS2_STATE_BUP_M0	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M0 /;"	d
ME_HFS2_STATE_BUP_M0_CLK	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M0_CLK /;"	d
ME_HFS2_STATE_BUP_M0_CLK_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M0_CLK_ERR /;"	d
ME_HFS2_STATE_BUP_M0_KERN_LOAD	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M0_KERN_LOAD /;"	d
ME_HFS2_STATE_BUP_M3	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M3 /;"	d
ME_HFS2_STATE_BUP_M3_CLK_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M3_CLK_ERR /;"	d
ME_HFS2_STATE_BUP_M3_KERN_LOAD	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_M3_KERN_LOAD /;"	d
ME_HFS2_STATE_BUP_MANUF_OVRD_STRAP	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_MANUF_OVRD_STRAP /;"	d
ME_HFS2_STATE_BUP_PWR_OK_TIMEOUT	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_PWR_OK_TIMEOUT /;"	d
ME_HFS2_STATE_BUP_SEND_DID_ACK	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_SEND_DID_ACK /;"	d
ME_HFS2_STATE_BUP_SEND_DID_ACK_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_SEND_DID_ACK_ERR /;"	d
ME_HFS2_STATE_BUP_T32_MISSING	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_T32_MISSING /;"	d
ME_HFS2_STATE_BUP_TEMP_DIS	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_TEMP_DIS /;"	d
ME_HFS2_STATE_BUP_VSCC_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_VSCC_ERR /;"	d
ME_HFS2_STATE_BUP_WAIT_DID	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_WAIT_DID /;"	d
ME_HFS2_STATE_BUP_WAIT_DID_FAIL	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_BUP_WAIT_DID_FAIL /;"	d
ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR /;"	d
ME_HFS2_STATE_POLICY_ENTRY	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_ENTRY /;"	d
ME_HFS2_STATE_POLICY_FPB_ERR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_FPB_ERR /;"	d
ME_HFS2_STATE_POLICY_RCVD_AC_DC	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_AC_DC /;"	d
ME_HFS2_STATE_POLICY_RCVD_DID	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_DID /;"	d
ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE /;"	d
ME_HFS2_STATE_POLICY_RCVD_NPCR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_NPCR /;"	d
ME_HFS2_STATE_POLICY_RCVD_PCR	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_PCR /;"	d
ME_HFS2_STATE_POLICY_RCVD_S3	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_S3 /;"	d
ME_HFS2_STATE_POLICY_RCVD_S4	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_S4 /;"	d
ME_HFS2_STATE_POLICY_RCVD_S5	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_S5 /;"	d
ME_HFS2_STATE_POLICY_RCVD_UPD	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_RCVD_UPD /;"	d
ME_HFS2_STATE_POLICY_VSCC_INVALID	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_VSCC_INVALID /;"	d
ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND /;"	d
ME_HFS2_STATE_POLICY_VSCC_NO_MATCH	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_POLICY_VSCC_NO_MATCH /;"	d
ME_HFS2_STATE_ROM_BEGIN	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_ROM_BEGIN /;"	d
ME_HFS2_STATE_ROM_DISABLE	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_HFS2_STATE_ROM_DISABLE /;"	d
ME_HFS_ACK_CONTINUE	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_CONTINUE	/;"	d
ME_HFS_ACK_GBL_RESET	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_GBL_RESET	/;"	d
ME_HFS_ACK_NO_DID	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_NO_DID	/;"	d
ME_HFS_ACK_PWR_CYCLE	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_PWR_CYCLE	/;"	d
ME_HFS_ACK_RESET	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_RESET	/;"	d
ME_HFS_ACK_S3	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_S3	/;"	d
ME_HFS_ACK_S4	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_S4	/;"	d
ME_HFS_ACK_S5	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ACK_S5	/;"	d
ME_HFS_BIOS_DRAM_ACK	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_BIOS_DRAM_ACK	/;"	d
ME_HFS_CWS_INIT	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_INIT	/;"	d
ME_HFS_CWS_INVALID	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_INVALID	/;"	d
ME_HFS_CWS_NORMAL	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_NORMAL	/;"	d
ME_HFS_CWS_REC	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_REC	/;"	d
ME_HFS_CWS_RESET	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_RESET	/;"	d
ME_HFS_CWS_TRANS	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_TRANS	/;"	d
ME_HFS_CWS_WAIT	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_CWS_WAIT	/;"	d
ME_HFS_ERROR_DEBUG	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ERROR_DEBUG	/;"	d
ME_HFS_ERROR_IMAGE	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ERROR_IMAGE	/;"	d
ME_HFS_ERROR_NONE	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ERROR_NONE	/;"	d
ME_HFS_ERROR_UNCAT	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_ERROR_UNCAT	/;"	d
ME_HFS_MODE_DEBUG	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_MODE_DEBUG	/;"	d
ME_HFS_MODE_DIS	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_MODE_DIS	/;"	d
ME_HFS_MODE_NORMAL	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_MODE_NORMAL	/;"	d
ME_HFS_MODE_OVER_JMPR	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_MODE_OVER_JMPR	/;"	d
ME_HFS_MODE_OVER_MEI	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_MODE_OVER_MEI	/;"	d
ME_HFS_STATE_BRINGUP	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_STATE_BRINGUP	/;"	d
ME_HFS_STATE_ERROR	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_STATE_ERROR	/;"	d
ME_HFS_STATE_M0	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_STATE_M0	/;"	d
ME_HFS_STATE_M0_UMA	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_STATE_M0_UMA	/;"	d
ME_HFS_STATE_M3	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_STATE_M3	/;"	d
ME_HFS_STATE_PREBOOT	arch/x86/include/asm/me_common.h	/^#define  ME_HFS_STATE_PREBOOT	/;"	d
ME_HSIO_CMD_CLOSE	arch/x86/include/asm/arch-broadwell/me.h	/^#define ME_HSIO_CMD_CLOSE	/;"	d
ME_HSIO_CMD_GETHSIOVER	arch/x86/include/asm/arch-broadwell/me.h	/^#define ME_HSIO_CMD_GETHSIOVER	/;"	d
ME_HSIO_MESSAGE	arch/x86/include/asm/arch-broadwell/me.h	/^#define ME_HSIO_MESSAGE	/;"	d
ME_INIT_DONE	arch/x86/include/asm/me_common.h	/^#define  ME_INIT_DONE	/;"	d
ME_INIT_STATUS_ERROR	arch/x86/include/asm/me_common.h	/^#define  ME_INIT_STATUS_ERROR	/;"	d
ME_INIT_STATUS_NOMEM	arch/x86/include/asm/me_common.h	/^#define  ME_INIT_STATUS_NOMEM	/;"	d
ME_INIT_STATUS_SUCCESS	arch/x86/include/asm/me_common.h	/^#define  ME_INIT_STATUS_SUCCESS	/;"	d
ME_INIT_STATUS_SUCCESS_OTHER	arch/x86/include/asm/arch-broadwell/me.h	/^#define  ME_INIT_STATUS_SUCCESS_OTHER /;"	d
ME_NORMAL_BIOS_PATH	arch/x86/include/asm/me_common.h	/^	ME_NORMAL_BIOS_PATH,$/;"	e	enum:me_bios_path
ME_RECOVERY_BIOS_PATH	arch/x86/include/asm/me_common.h	/^	ME_RECOVERY_BIOS_PATH,$/;"	e	enum:me_bios_path
ME_RETRY	arch/x86/include/asm/me_common.h	/^#define ME_RETRY	/;"	d
ME_S3WAKE_BIOS_PATH	arch/x86/include/asm/me_common.h	/^	ME_S3WAKE_BIOS_PATH,$/;"	e	enum:me_bios_path
ME_SCI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   ME_SCI_EN	/;"	d
ME_SCI_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   ME_SCI_STS	/;"	d
ME_SMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  ME_SMI_EN	/;"	d
MFAULT_WDG	include/twl6030.h	/^#define MFAULT_WDG	/;"	d
MFC0	arch/mips/include/asm/asm.h	/^#define MFC0	/;"	d
MFC_0_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MFC_0_SEL	/;"	d
MFC_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MFC_RATIO	/;"	d
MFC_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MFC_SEL	/;"	d
MFC_SEL_MPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MFC_SEL_MPLL	/;"	d
MFG0_IN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A27_MARK, PORT149_RDWR_MARK, MFG0_IN1_MARK, PORT149_KEYOUT9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG0_IN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MFG0_IN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG0_OUT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MFG0_OUT1_MARK, PORT27_IROUT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG0_OUT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO7_MARK, MFG0_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG1_IN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_CTS__MARK, MFG1_IN1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG1_IN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSYNC_MARK, MFG1_IN2_MARK, VIO2_VD2_MARK, LCD2D21_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG1_OUT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MFG1_OUT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO6_MARK, MFG1_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG2_IN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT244_SCIFA5_CTS__MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MFG2_IN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT245_SCIFA5_RTS__MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MFG2_OUT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MFG2_OUT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG3_IN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA3_RXD_MARK, MFG3_IN1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG3_IN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA3_CTS__MARK, MFG3_IN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG3_OUT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF1_SS2_MARK, SCIFA3_RTS__MARK, MFG3_OUT1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG3_OUT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MFG4_IN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_I2C_SDA3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MFG4_IN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG4_OUT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, TPU4TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFG4_OUT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MFIADR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIADR /;"	d
MFIADRR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIADRR /;"	d
MFIADRW	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIADRW /;"	d
MFIBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIBCR /;"	d
MFIDATA	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIDATA /;"	d
MFIDATAR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIDATAR /;"	d
MFIDATAW	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIDATAW /;"	d
MFIDEVCR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIDEVCR /;"	d
MFIDNRR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIDNRR /;"	d
MFIDNRW	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIDNRW /;"	d
MFIEICR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIEICR /;"	d
MFIGSR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIGSR /;"	d
MFIIDX	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIIDX /;"	d
MFIIICR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIIICR /;"	d
MFIIMASK	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIIMASK /;"	d
MFIINTEVT	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIINTEVT /;"	d
MFIMCR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIMCR /;"	d
MFIMCRR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIMCRR /;"	d
MFIMCRW	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIMCRW /;"	d
MFIRCR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFIRCR /;"	d
MFISCR	arch/sh/include/asm/cpu_sh7722.h	/^#define MFISCR /;"	d
MFISIZER	arch/sh/include/asm/cpu_sh7722.h	/^#define MFISIZER /;"	d
MFISIZEW	arch/sh/include/asm/cpu_sh7722.h	/^#define MFISIZEW /;"	d
MFISM4	arch/sh/include/asm/cpu_sh7722.h	/^#define MFISM4 /;"	d
MFI_IMCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR0	/;"	d
MFI_IMCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR1	/;"	d
MFI_IMCR10	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR10	/;"	d
MFI_IMCR11	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR11	/;"	d
MFI_IMCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR2	/;"	d
MFI_IMCR3	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR3	/;"	d
MFI_IMCR4	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR4	/;"	d
MFI_IMCR5	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR5	/;"	d
MFI_IMCR6	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR6	/;"	d
MFI_IMCR7	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR7	/;"	d
MFI_IMCR8	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR8	/;"	d
MFI_IMCR9	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMCR9	/;"	d
MFI_IMR0	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR0	/;"	d
MFI_IMR1	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR1	/;"	d
MFI_IMR10	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR10	/;"	d
MFI_IMR11	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR11	/;"	d
MFI_IMR2	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR2	/;"	d
MFI_IMR3	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR3	/;"	d
MFI_IMR4	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR4	/;"	d
MFI_IMR5	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR5	/;"	d
MFI_IMR6	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR6	/;"	d
MFI_IMR7	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR7	/;"	d
MFI_IMR8	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR8	/;"	d
MFI_IMR9	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IMR9	/;"	d
MFI_IPRA	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRA	/;"	d
MFI_IPRB	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRB	/;"	d
MFI_IPRC	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRC	/;"	d
MFI_IPRD	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRD	/;"	d
MFI_IPRE	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRE	/;"	d
MFI_IPRF	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRF	/;"	d
MFI_IPRG	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRG	/;"	d
MFI_IPRH	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRH	/;"	d
MFI_IPRI	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRI	/;"	d
MFI_IPRJ	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRJ	/;"	d
MFI_IPRK	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRK	/;"	d
MFI_IPRL	arch/sh/include/asm/cpu_sh7722.h	/^#define MFI_IPRL	/;"	d
MFLIMIT	lib/lz4.c	/^#define MFLIMIT /;"	d	file:
MFP	include/mvmfp.h	/^#define MFP(/;"	d
MFP086_ETH_TXCLK	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP086_ETH_TXCLK	/;"	d
MFP087_ETH_TXEN	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP087_ETH_TXEN	/;"	d
MFP088_ETH_TXDQ3	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP088_ETH_TXDQ3	/;"	d
MFP089_ETH_TXDQ2	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP089_ETH_TXDQ2	/;"	d
MFP090_ETH_TXDQ1	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP090_ETH_TXDQ1	/;"	d
MFP091_ETH_TXDQ0	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP091_ETH_TXDQ0	/;"	d
MFP092_ETH_CRS	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP092_ETH_CRS	/;"	d
MFP093_ETH_COL	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP093_ETH_COL	/;"	d
MFP094_ETH_RXCLK	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP094_ETH_RXCLK	/;"	d
MFP095_ETH_RXER	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP095_ETH_RXER	/;"	d
MFP096_ETH_RXDQ3	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP096_ETH_RXDQ3	/;"	d
MFP097_ETH_RXDQ2	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP097_ETH_RXDQ2	/;"	d
MFP098_ETH_RXDQ1	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP098_ETH_RXDQ1	/;"	d
MFP099_ETH_RXDQ0	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP099_ETH_RXDQ0	/;"	d
MFP100_ETH_MDC	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP100_ETH_MDC	/;"	d
MFP101_ETH_MDIO	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP101_ETH_MDIO	/;"	d
MFP103_ETH_RXDV	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP103_ETH_RXDV	/;"	d
MFP105_CI2C_SDA	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP105_CI2C_SDA	/;"	d
MFP106_CI2C_SCL	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP106_CI2C_SCL	/;"	d
MFP107_SSP2_RXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP107_SSP2_RXD	/;"	d
MFP107_UART1_RXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP107_UART1_RXD	/;"	d
MFP107_UART1_TXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP107_UART1_TXD	/;"	d
MFP108_SSP2_TXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP108_SSP2_TXD	/;"	d
MFP108_UART1_RXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP108_UART1_RXD	/;"	d
MFP108_UART1_TXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP108_UART1_TXD	/;"	d
MFP109_UART1_CTS	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP109_UART1_CTS	/;"	d
MFP109_UART1_RTS	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP109_UART1_RTS	/;"	d
MFP110_SSP2_CS	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP110_SSP2_CS	/;"	d
MFP110_UART1_CTS	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP110_UART1_CTS	/;"	d
MFP110_UART1_RTS	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP110_UART1_RTS	/;"	d
MFP111_SSP2_CLK	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP111_SSP2_CLK	/;"	d
MFP111_UART1_DSR	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP111_UART1_DSR	/;"	d
MFP111_UART1_RI	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP111_UART1_RI	/;"	d
MFP112_UART1_DCD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP112_UART1_DCD	/;"	d
MFP112_UART1_DTR	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP112_UART1_DTR	/;"	d
MFP47_UART2_RXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP47_UART2_RXD	/;"	d
MFP48_UART2_TXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP48_UART2_TXD	/;"	d
MFP88_UART2_RXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP88_UART2_RXD	/;"	d
MFP89_UART2_TXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP89_UART2_TXD	/;"	d
MFPO8_UART3_TXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFPO8_UART3_TXD	/;"	d
MFPO9_UART3_RXD	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFPO9_UART3_RXD	/;"	d
MFPSR	include/faraday/ftpmu010.h	/^	unsigned int	MFPSR;		\/* 0x28 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
MFP_AF0	include/mvmfp.h	/^#define MFP_AF0	/;"	d
MFP_AF1	include/mvmfp.h	/^#define MFP_AF1	/;"	d
MFP_AF2	include/mvmfp.h	/^#define MFP_AF2	/;"	d
MFP_AF3	include/mvmfp.h	/^#define MFP_AF3	/;"	d
MFP_AF4	include/mvmfp.h	/^#define MFP_AF4	/;"	d
MFP_AF5	include/mvmfp.h	/^#define MFP_AF5	/;"	d
MFP_AF6	include/mvmfp.h	/^#define MFP_AF6	/;"	d
MFP_AF7	include/mvmfp.h	/^#define MFP_AF7	/;"	d
MFP_AF_MASK	include/mvmfp.h	/^#define MFP_AF_MASK	/;"	d
MFP_DRIVE_FAST	include/mvmfp.h	/^#define MFP_DRIVE_FAST	/;"	d
MFP_DRIVE_MASK	include/mvmfp.h	/^#define MFP_DRIVE_MASK	/;"	d
MFP_DRIVE_MEDIUM	include/mvmfp.h	/^#define MFP_DRIVE_MEDIUM	/;"	d
MFP_DRIVE_SLOW	include/mvmfp.h	/^#define MFP_DRIVE_SLOW	/;"	d
MFP_DRIVE_VERY_SLOW	include/mvmfp.h	/^#define MFP_DRIVE_VERY_SLOW	/;"	d
MFP_EOC	include/mvmfp.h	/^#define MFP_EOC	/;"	d
MFP_LPM_EDGE_BOTH	include/mvmfp.h	/^#define MFP_LPM_EDGE_BOTH	/;"	d
MFP_LPM_EDGE_FALL	include/mvmfp.h	/^#define MFP_LPM_EDGE_FALL	/;"	d
MFP_LPM_EDGE_MASK	include/mvmfp.h	/^#define MFP_LPM_EDGE_MASK	/;"	d
MFP_LPM_EDGE_NONE	include/mvmfp.h	/^#define MFP_LPM_EDGE_NONE	/;"	d
MFP_LPM_EDGE_RISE	include/mvmfp.h	/^#define MFP_LPM_EDGE_RISE	/;"	d
MFP_OFFSET_MASK	include/mvmfp.h	/^#define MFP_OFFSET_MASK	/;"	d
MFP_PIN_MAX	arch/arm/include/asm/arch-armada100/mfp.h	/^#define MFP_PIN_MAX	/;"	d
MFP_PULL_BOTH	include/mvmfp.h	/^#define MFP_PULL_BOTH	/;"	d
MFP_PULL_FLOAT	include/mvmfp.h	/^#define MFP_PULL_FLOAT	/;"	d
MFP_PULL_HIGH	include/mvmfp.h	/^#define MFP_PULL_HIGH	/;"	d
MFP_PULL_LOW	include/mvmfp.h	/^#define MFP_PULL_LOW	/;"	d
MFP_PULL_MASK	include/mvmfp.h	/^#define MFP_PULL_MASK	/;"	d
MFP_PULL_NONE	include/mvmfp.h	/^#define MFP_PULL_NONE	/;"	d
MFP_REG	include/mvmfp.h	/^#define MFP_REG(/;"	d
MFP_REG_GET_OFFSET	include/mvmfp.h	/^#define MFP_REG_GET_OFFSET(/;"	d
MFP_SLEEP_CTRL	include/mvmfp.h	/^#define MFP_SLEEP_CTRL	/;"	d
MFP_SLEEP_CTRL2	include/mvmfp.h	/^#define MFP_SLEEP_CTRL2	/;"	d
MFP_SLEEP_DATA	include/mvmfp.h	/^#define MFP_SLEEP_DATA	/;"	d
MFP_SLEEP_DIR	include/mvmfp.h	/^#define MFP_SLEEP_DIR	/;"	d
MFP_SLEEP_MASK	include/mvmfp.h	/^#define MFP_SLEEP_MASK	/;"	d
MFP_SLP_DI	include/mvmfp.h	/^#define MFP_SLP_DI	/;"	d
MFP_VALUE_MASK	include/mvmfp.h	/^#define MFP_VALUE_MASK	/;"	d
MFREG	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define MFREG(/;"	d	file:
MFS	arch/microblaze/include/asm/asm.h	/^#define MFS(/;"	d
MGC_BUSCTL_OFFSET	drivers/usb/musb/davinci.h	/^#define MGC_BUSCTL_OFFSET(/;"	d
MHZ	arch/m68k/cpu/mcf5227x/speed.c	/^#define MHZ	/;"	d	file:
MHZ	arch/m68k/cpu/mcf5445x/speed.c	/^#define MHZ	/;"	d	file:
MHZ	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define MHZ	/;"	d	file:
MH_END	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_END	/;"	d
MH_FUNC	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_FUNC	/;"	d
MH_INDEX	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_INDEX	/;"	d
MH_PRIV	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_PRIV	/;"	d
MH_STRUCT_SIZE	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_STRUCT_SIZE	/;"	d
MH_TYPE	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_TYPE	/;"	d
MH_TYPE_AHB_MST	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_TYPE_AHB_MST	/;"	d
MH_TYPE_AHB_SLV	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_TYPE_AHB_SLV	/;"	d
MH_TYPE_APB_SLV	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_TYPE_APB_SLV	/;"	d
MH_TYPE_NONE	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_TYPE_NONE	/;"	d
MH_UNUSED	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_UNUSED	/;"	d
MH_VENDOR_DEVICE	arch/sparc/cpu/leon3/memcfg.h	/^#define MH_VENDOR_DEVICE	/;"	d
MHz	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define MHz	/;"	d
MIC	include/linux/usb/ch9.h	/^	__u8 MIC[8];$/;"	m	struct:usb_handshake	typeref:typename:__u8[8]
MICBIAS_2_0V	arch/arm/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	arch/microblaze/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	arch/mips/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	arch/nios2/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	arch/sandbox/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	arch/x86/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	arch/xtensa/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_0V	include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_0V	/;"	d
MICBIAS_2_5V	arch/arm/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	arch/microblaze/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	arch/mips/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	arch/nios2/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	arch/sandbox/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	arch/x86/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	arch/xtensa/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_2_5V	include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_2_5V	/;"	d
MICBIAS_AVDDV	arch/arm/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	arch/microblaze/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	arch/mips/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	arch/nios2/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	arch/sandbox/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	arch/x86/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	arch/xtensa/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICBIAS_AVDDV	include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define MICBIAS_AVDDV	/;"	d
MICR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MICR	/;"	d
MICROBLAZE	arch/Kconfig	/^config MICROBLAZE$/;"	c	choice:choice07312ef30104
MICROBLAZE_V5	include/configs/microblaze-generic.h	/^#define	MICROBLAZE_V5	/;"	d
MICROCHIP_GPIOS_PER_BANK	drivers/gpio/pic32_gpio.c	/^	MICROCHIP_GPIOS_PER_BANK = 16,$/;"	e	enum:__anon60007c910103	file:
MICROCHIP_GPIO_DIR_IN	drivers/gpio/pic32_gpio.c	/^	MICROCHIP_GPIO_DIR_IN,$/;"	e	enum:__anon60007c910103	file:
MICROCHIP_GPIO_DIR_OUT	drivers/gpio/pic32_gpio.c	/^	MICROCHIP_GPIO_DIR_OUT,$/;"	e	enum:__anon60007c910103	file:
MICROCODE_DIR	tools/microcode-tool	/^MICROCODE_DIR = 'arch\/x86\/dts\/microcode'$/;"	v
MICROCODE_DIR	tools/microcode-tool.py	/^MICROCODE_DIR = 'arch\/x86\/dts\/microcode'$/;"	v
MICRON_BL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_BL_165	/;"	d
MICRON_CASL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_CASL_165	/;"	d
MICRON_RASWIDTH_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_RASWIDTH_165	/;"	d
MICRON_RASWIDTH_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_RASWIDTH_200	/;"	d
MICRON_SIL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_SIL_165	/;"	d
MICRON_SPD_JEDEC_ID	board/amcc/yucca/yucca.h	/^#define MICRON_SPD_JEDEC_ID /;"	d
MICRON_TCKE_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TCKE_165	/;"	d
MICRON_TCKE_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TCKE_200	/;"	d
MICRON_TDAL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TDAL_165	/;"	d
MICRON_TDAL_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TDAL_200	/;"	d
MICRON_TDPL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TDPL_165	/;"	d
MICRON_TDPL_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TDPL_200	/;"	d
MICRON_TRAS_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRAS_165	/;"	d
MICRON_TRAS_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRAS_200	/;"	d
MICRON_TRCD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRCD_165	/;"	d
MICRON_TRCD_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRCD_200	/;"	d
MICRON_TRC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRC_165	/;"	d
MICRON_TRC_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRC_200	/;"	d
MICRON_TRFC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRFC_165	/;"	d
MICRON_TRFC_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRFC_200	/;"	d
MICRON_TRP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRP_165	/;"	d
MICRON_TRP_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRP_200	/;"	d
MICRON_TRRD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRRD_165	/;"	d
MICRON_TRRD_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TRRD_200	/;"	d
MICRON_TWTR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TWTR_165	/;"	d
MICRON_TWTR_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TWTR_200	/;"	d
MICRON_TXP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TXP_165	/;"	d
MICRON_TXP_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_TXP_200	/;"	d
MICRON_V_ACTIMA_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_ACTIMA_165	/;"	d
MICRON_V_ACTIMA_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_ACTIMA_200	/;"	d
MICRON_V_ACTIMB_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_ACTIMB_165	/;"	d
MICRON_V_ACTIMB_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_ACTIMB_200	/;"	d
MICRON_V_MCFG_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_MCFG_165(/;"	d
MICRON_V_MCFG_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_MCFG_200(/;"	d
MICRON_V_MR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_V_MR_165	/;"	d
MICRON_WBST_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_WBST_165	/;"	d
MICRON_XSR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_XSR_165	/;"	d
MICRON_XSR_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define MICRON_XSR_200	/;"	d
MICRO_8FRAME	drivers/usb/gadget/ci_udc.h	/^#define MICRO_8FRAME	/;"	d
MICRO_SUPPORT_CARD	arch/arm/mach-uniphier/Kconfig	/^config MICRO_SUPPORT_CARD$/;"	c
MICRO_SUPPORT_CARD_BASE	arch/arm/mach-uniphier/micro-support-card.c	/^#define MICRO_SUPPORT_CARD_BASE	/;"	d	file:
MICRO_SUPPORT_CARD_H	arch/arm/mach-uniphier/micro-support-card.h	/^#define MICRO_SUPPORT_CARD_H$/;"	d
MICRO_SUPPORT_CARD_RESET	arch/arm/mach-uniphier/micro-support-card.c	/^#define MICRO_SUPPORT_CARD_RESET	/;"	d	file:
MICRO_SUPPORT_CARD_REVISION	arch/arm/mach-uniphier/micro-support-card.c	/^#define MICRO_SUPPORT_CARD_REVISION	/;"	d	file:
MICR_FEIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MICR_FEIE	/;"	d
MIDLEMODE	drivers/usb/musb-new/omap2430.h	/^#	define	MIDLEMODE	/;"	d
MIDR_CORTEX_A15_R0P0	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A15_R0P0	/;"	d
MIDR_CORTEX_A15_R2P2	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A15_R2P2	/;"	d
MIDR_CORTEX_A7_R0P0	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A7_R0P0	/;"	d
MIDR_CORTEX_A9_R0P1	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A9_R0P1	/;"	d
MIDR_CORTEX_A9_R1P2	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A9_R1P2	/;"	d
MIDR_CORTEX_A9_R1P3	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A9_R1P3	/;"	d
MIDR_CORTEX_A9_R2P10	arch/arm/include/asm/armv7.h	/^#define MIDR_CORTEX_A9_R2P10	/;"	d
MIDR_PRIMARY_PART_MASK	arch/arm/include/asm/armv7.h	/^#define MIDR_PRIMARY_PART_MASK	/;"	d
MIGO_R_FLASH_BANK_SIZE	include/configs/MigoR.h	/^#define MIGO_R_FLASH_BANK_SIZE	/;"	d
MIGO_R_FLASH_BASE_1	include/configs/MigoR.h	/^#define MIGO_R_FLASH_BASE_1	/;"	d
MIGO_R_SDRAM_BASE	include/configs/MigoR.h	/^#define MIGO_R_SDRAM_BASE	/;"	d
MII10	drivers/net/fec_mxc.h	/^	MII10,		\/* MII 10Mbps   *\/$/;"	e	enum:xceiver_type
MII10	drivers/net/mpc512x_fec.h	/^	MII10,				\/* MII 10Mbps   *\/$/;"	e	enum:__anonf8b8c0fc0203
MII10	drivers/net/mpc5xxx_fec.h	/^	MII10,				\/* MII 10Mbps   *\/$/;"	e	enum:__anone13c4dc90203
MII100	drivers/net/fec_mxc.h	/^	MII100,		\/* MII 100Mbps  *\/$/;"	e	enum:xceiver_type
MII100	drivers/net/mpc512x_fec.h	/^	MII100				\/* MII 100Mbps  *\/$/;"	e	enum:__anonf8b8c0fc0203
MII100	drivers/net/mpc5xxx_fec.h	/^	MII100				\/* MII 100Mbps  *\/$/;"	e	enum:__anone13c4dc90203
MIIADDRESS	drivers/net/ethoc.c	/^#define	MIIADDRESS	/;"	d	file:
MIIADDRESS_ADDR	drivers/net/ethoc.c	/^#define	MIIADDRESS_ADDR(/;"	d	file:
MIIADDRESS_FIAD	drivers/net/ethoc.c	/^#define	MIIADDRESS_FIAD(/;"	d	file:
MIIADDRESS_RGAD	drivers/net/ethoc.c	/^#define	MIIADDRESS_RGAD(/;"	d	file:
MIIADDRSHIFT	drivers/net/designware.h	/^#define MIIADDRSHIFT	/;"	d
MIIBMCRBits	drivers/net/rtl8139.c	/^enum MIIBMCRBits {$/;"	g	file:
MIICMD_MODIFY	board/gdsys/common/phy.c	/^	MIICMD_MODIFY,$/;"	e	enum:__anon2ff7912f0103	file:
MIICMD_OPCODE_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIICMD_OPCODE_MASK	/;"	d
MIICMD_OPCODE_READ	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIICMD_OPCODE_READ	/;"	d
MIICMD_OPCODE_WRITE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIICMD_OPCODE_WRITE	/;"	d
MIICMD_PHYAD_8950	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIICMD_PHYAD_8950	/;"	d
MIICMD_PHYAD_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIICMD_PHYAD_MASK	/;"	d
MIICMD_REGAD_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIICMD_REGAD_MASK	/;"	d
MIICMD_SET	board/gdsys/common/phy.c	/^	MIICMD_SET,$/;"	e	enum:__anon2ff7912f0103	file:
MIICMD_VERIFY_VALUE	board/gdsys/common/phy.c	/^	MIICMD_VERIFY_VALUE,$/;"	e	enum:__anon2ff7912f0103	file:
MIICMD_WAIT_FOR_VALUE	board/gdsys/common/phy.c	/^	MIICMD_WAIT_FOR_VALUE,$/;"	e	enum:__anon2ff7912f0103	file:
MIICOMMAND	drivers/net/ethoc.c	/^#define	MIICOMMAND	/;"	d	file:
MIICOMMAND_READ	drivers/net/ethoc.c	/^#define	MIICOMMAND_READ	/;"	d	file:
MIICOMMAND_SCAN	drivers/net/ethoc.c	/^#define	MIICOMMAND_SCAN	/;"	d	file:
MIICOMMAND_WRITE	drivers/net/ethoc.c	/^#define	MIICOMMAND_WRITE	/;"	d	file:
MIIDELAY	include/configs/MPC8560ADS.h	/^#define MIIDELAY	/;"	d
MIIEN	drivers/net/cpsw.c	/^#define MIIEN	/;"	d	file:
MIIGSK_CFGR_EMODE	drivers/net/fec_mxc.h	/^#define MIIGSK_CFGR_EMODE	/;"	d
MIIGSK_CFGR_FRCONT	drivers/net/fec_mxc.h	/^#define MIIGSK_CFGR_FRCONT	/;"	d
MIIGSK_CFGR_IF_MODE_MASK	drivers/net/fec_mxc.h	/^#define MIIGSK_CFGR_IF_MODE_MASK	/;"	d
MIIGSK_CFGR_IF_MODE_MII	drivers/net/fec_mxc.h	/^#define MIIGSK_CFGR_IF_MODE_MII	/;"	d
MIIGSK_CFGR_IF_MODE_RMII	drivers/net/fec_mxc.h	/^#define MIIGSK_CFGR_IF_MODE_RMII	/;"	d
MIIGSK_CFGR_LBMODE	drivers/net/fec_mxc.h	/^#define MIIGSK_CFGR_LBMODE	/;"	d
MIIGSK_ENR_EN	drivers/net/fec_mxc.h	/^#define MIIGSK_ENR_EN	/;"	d
MIIGSK_ENR_READY	drivers/net/fec_mxc.h	/^#define MIIGSK_ENR_READY	/;"	d
MIIMADD_PHYADDR_SHIFT	drivers/net/pic32_eth.h	/^#define MIIMADD_PHYADDR_SHIFT	/;"	d
MIIMADD_PHY_ADDRESS_SHIFT	drivers/qe/uec.h	/^#define MIIMADD_PHY_ADDRESS_SHIFT	/;"	d
MIIMADD_PHY_ADDR_SHIFT	include/fsl_mdio.h	/^#define MIIMADD_PHY_ADDR_SHIFT	/;"	d
MIIMADD_PHY_REGISTER_SHIFT	drivers/qe/uec.h	/^#define MIIMADD_PHY_REGISTER_SHIFT	/;"	d
MIIMADD_REGADDR	drivers/net/pic32_eth.h	/^#define MIIMADD_REGADDR	/;"	d
MIIMADD_REGADDR_SHIFT	drivers/net/pic32_eth.h	/^#define MIIMADD_REGADDR_SHIFT	/;"	d
MIIMCFG_CLKSEL_DIV40	drivers/net/pic32_eth.h	/^#define MIIMCFG_CLKSEL_DIV40	/;"	d
MIIMCFG_CLOCK_DIVIDE_MASK	drivers/qe/uec.h	/^#define MIIMCFG_CLOCK_DIVIDE_MASK	/;"	d
MIIMCFG_CLOCK_DIVIDE_SHIFT	drivers/qe/uec.h	/^#define MIIMCFG_CLOCK_DIVIDE_SHIFT	/;"	d
MIIMCFG_INIT_VALUE	include/fsl_mdio.h	/^#define MIIMCFG_INIT_VALUE	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_10	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_10	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_14	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_14	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_20	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_20	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_28	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_28	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_4	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_4	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_6	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_6	/;"	d
MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_8	drivers/qe/uec.h	/^#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_8	/;"	d
MIIMCFG_MGMT_CLOCK_SELECT	include/fsl_mdio.h	/^#define MIIMCFG_MGMT_CLOCK_SELECT	/;"	d
MIIMCFG_MNGMNT_CLC_DIV_INIT_VALUE	drivers/qe/uec.h	/^#define MIIMCFG_MNGMNT_CLC_DIV_INIT_VALUE	/;"	d
MIIMCFG_NO_PREAMBLE	drivers/qe/uec.h	/^#define MIIMCFG_NO_PREAMBLE	/;"	d
MIIMCFG_RESET_MANAGEMENT	drivers/qe/uec.h	/^#define MIIMCFG_RESET_MANAGEMENT	/;"	d
MIIMCFG_RESET_MGMT	include/fsl_mdio.h	/^#define MIIMCFG_RESET_MGMT	/;"	d
MIIMCFG_RSTMGMT	drivers/net/pic32_eth.h	/^#define MIIMCFG_RSTMGMT	/;"	d
MIIMCMD_READ	drivers/net/pic32_eth.h	/^#define MIIMCMD_READ	/;"	d
MIIMCMD_SCAN	drivers/net/pic32_eth.h	/^#define MIIMCMD_SCAN	/;"	d
MIIMCOM_READ_CYCLE	drivers/qe/uec.h	/^#define MIIMCOM_READ_CYCLE	/;"	d
MIIMCOM_READ_CYCLE	include/fsl_mdio.h	/^#define MIIMCOM_READ_CYCLE	/;"	d
MIIMCOM_SCAN_CYCLE	drivers/qe/uec.h	/^#define MIIMCOM_SCAN_CYCLE	/;"	d
MIIMCOM_SCAN_CYCLE	include/fsl_mdio.h	/^#define MIIMCOM_SCAN_CYCLE	/;"	d
MIIMCON_PHY_CONTROL_SHIFT	drivers/qe/uec.h	/^#define MIIMCON_PHY_CONTROL_SHIFT	/;"	d
MIIMCON_PHY_STATUS_SHIFT	drivers/qe/uec.h	/^#define MIIMCON_PHY_STATUS_SHIFT	/;"	d
MIIMIND_BUSY	drivers/net/pic32_eth.h	/^#define MIIMIND_BUSY	/;"	d
MIIMIND_BUSY	drivers/qe/uec.h	/^#define MIIMIND_BUSY	/;"	d
MIIMIND_BUSY	drivers/qe/uec_phy.h	/^#define MIIMIND_BUSY	/;"	d
MIIMIND_BUSY	include/fsl_mdio.h	/^#define MIIMIND_BUSY	/;"	d
MIIMIND_LINKFAIL	drivers/net/pic32_eth.h	/^#define MIIMIND_LINKFAIL	/;"	d
MIIMIND_NOTVALID	drivers/net/pic32_eth.h	/^#define MIIMIND_NOTVALID	/;"	d
MIIMIND_NOTVALID	drivers/qe/uec_phy.h	/^#define MIIMIND_NOTVALID	/;"	d
MIIMIND_NOTVALID	include/fsl_mdio.h	/^#define MIIMIND_NOTVALID	/;"	d
MIIMIND_NOT_VALID	drivers/qe/uec.h	/^#define MIIMIND_NOT_VALID	/;"	d
MIIMIND_OPR_PEND	include/vsc9953.h	/^#define MIIMIND_OPR_PEND	/;"	d
MIIMIND_SCAN	drivers/qe/uec.h	/^#define MIIMIND_SCAN	/;"	d
MIIMODER	drivers/net/ethoc.c	/^#define	MIIMODER	/;"	d	file:
MIIMODER_CLKDIV	drivers/net/ethoc.c	/^#define	MIIMODER_CLKDIV(/;"	d	file:
MIIMODER_NOPRE	drivers/net/ethoc.c	/^#define	MIIMODER_NOPRE	/;"	d	file:
MIIMWD_DATA_MASK	drivers/net/xilinx_ll_temac.h	/^#define MIIMWD_DATA_MASK	/;"	d
MIIMWD_DATA_POS	drivers/net/xilinx_ll_temac.h	/^#define MIIMWD_DATA_POS	/;"	d
MIIM_88E1111_COPPER	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_COPPER	/;"	d	file:
MIIM_88E1111_FIBER	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_FIBER	/;"	d	file:
MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO	/;"	d	file:
MIIM_88E1111_HWCFG_FIBER_COPPER_RES	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_FIBER_COPPER_RES	/;"	d	file:
MIIM_88E1111_HWCFG_MODE_COPPER_RGMII	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_MODE_COPPER_RGMII	/;"	d	file:
MIIM_88E1111_HWCFG_MODE_COPPER_RTBI	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_MODE_COPPER_RTBI	/;"	d	file:
MIIM_88E1111_HWCFG_MODE_FIBER_RGMII	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_MODE_FIBER_RGMII	/;"	d	file:
MIIM_88E1111_HWCFG_MODE_MASK	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_MODE_MASK	/;"	d	file:
MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK	/;"	d	file:
MIIM_88E1111_PHY_EXT_CR	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_PHY_EXT_CR	/;"	d	file:
MIIM_88E1111_PHY_EXT_SR	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_PHY_EXT_SR	/;"	d	file:
MIIM_88E1111_PHY_LED_COMBINE	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_PHY_LED_COMBINE	/;"	d	file:
MIIM_88E1111_PHY_LED_CONTROL	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_PHY_LED_CONTROL	/;"	d	file:
MIIM_88E1111_PHY_LED_DIRECT	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_PHY_LED_DIRECT	/;"	d	file:
MIIM_88E1111_RX_DELAY	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_RX_DELAY	/;"	d	file:
MIIM_88E1111_TX_DELAY	drivers/net/phy/marvell.c	/^#define MIIM_88E1111_TX_DELAY	/;"	d	file:
MIIM_88E1118_PHY_LED_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1118_PHY_LED_PAGE	/;"	d	file:
MIIM_88E1118_PHY_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1118_PHY_PAGE	/;"	d	file:
MIIM_88E1121_PHY_IRQ_EN	drivers/net/phy/marvell.c	/^#define MIIM_88E1121_PHY_IRQ_EN	/;"	d	file:
MIIM_88E1121_PHY_IRQ_STATUS	drivers/net/phy/marvell.c	/^#define MIIM_88E1121_PHY_IRQ_STATUS	/;"	d	file:
MIIM_88E1121_PHY_LED_CTRL	drivers/net/phy/marvell.c	/^#define MIIM_88E1121_PHY_LED_CTRL	/;"	d	file:
MIIM_88E1121_PHY_LED_DEF	drivers/net/phy/marvell.c	/^#define MIIM_88E1121_PHY_LED_DEF	/;"	d	file:
MIIM_88E1121_PHY_LED_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1121_PHY_LED_PAGE	/;"	d	file:
MIIM_88E1121_PHY_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1121_PHY_PAGE	/;"	d	file:
MIIM_88E1145_PHY_CAL_OV	drivers/net/phy/marvell.c	/^#define MIIM_88E1145_PHY_CAL_OV /;"	d	file:
MIIM_88E1145_PHY_EXT_CR	drivers/net/phy/marvell.c	/^#define MIIM_88E1145_PHY_EXT_CR /;"	d	file:
MIIM_88E1145_PHY_LED_CONTROL	drivers/net/phy/marvell.c	/^#define MIIM_88E1145_PHY_LED_CONTROL	/;"	d	file:
MIIM_88E1145_PHY_LED_DIRECT	drivers/net/phy/marvell.c	/^#define MIIM_88E1145_PHY_LED_DIRECT	/;"	d	file:
MIIM_88E1145_PHY_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1145_PHY_PAGE	/;"	d	file:
MIIM_88E1149_PHY_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1149_PHY_PAGE	/;"	d	file:
MIIM_88E1310_PHY_IRQ_EN	drivers/net/phy/marvell.c	/^#define MIIM_88E1310_PHY_IRQ_EN	/;"	d	file:
MIIM_88E1310_PHY_LED_CTRL	drivers/net/phy/marvell.c	/^#define MIIM_88E1310_PHY_LED_CTRL	/;"	d	file:
MIIM_88E1310_PHY_PAGE	drivers/net/phy/marvell.c	/^#define MIIM_88E1310_PHY_PAGE	/;"	d	file:
MIIM_88E1310_PHY_RGMII_CTRL	drivers/net/phy/marvell.c	/^#define MIIM_88E1310_PHY_RGMII_CTRL	/;"	d	file:
MIIM_88E1xxx_PHYSTAT_100	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHYSTAT_100	/;"	d	file:
MIIM_88E1xxx_PHYSTAT_DUPLEX	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHYSTAT_DUPLEX	/;"	d	file:
MIIM_88E1xxx_PHYSTAT_GBIT	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHYSTAT_GBIT	/;"	d	file:
MIIM_88E1xxx_PHYSTAT_LINK	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHYSTAT_LINK	/;"	d	file:
MIIM_88E1xxx_PHYSTAT_SPDDONE	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHYSTAT_SPDDONE	/;"	d	file:
MIIM_88E1xxx_PHYSTAT_SPEED	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHYSTAT_SPEED	/;"	d	file:
MIIM_88E1xxx_PHY_MDI_X_AUTO	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHY_MDI_X_AUTO	/;"	d	file:
MIIM_88E1xxx_PHY_SCR	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHY_SCR	/;"	d	file:
MIIM_88E1xxx_PHY_STATUS	drivers/net/phy/marvell.c	/^#define MIIM_88E1xxx_PHY_STATUS	/;"	d	file:
MIIM_BCM54XX_EXP_DATA	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_EXP_DATA	/;"	d	file:
MIIM_BCM54XX_EXP_SEL	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_EXP_SEL	/;"	d	file:
MIIM_BCM54XX_EXP_SEL_ER	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_EXP_SEL_ER	/;"	d	file:
MIIM_BCM54XX_EXP_SEL_SSD	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_EXP_SEL_SSD	/;"	d	file:
MIIM_BCM54XX_SHD	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_SHD	/;"	d	file:
MIIM_BCM54XX_SHD_DATA	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_SHD_DATA(/;"	d	file:
MIIM_BCM54XX_SHD_VAL	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_SHD_VAL(/;"	d	file:
MIIM_BCM54XX_SHD_WRITE	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_SHD_WRITE	/;"	d	file:
MIIM_BCM54XX_SHD_WR_ENCODE	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54XX_SHD_WR_ENCODE(/;"	d	file:
MIIM_BCM54xx_AUXCNTL	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54xx_AUXCNTL	/;"	d	file:
MIIM_BCM54xx_AUXCNTL_ENCODE	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54xx_AUXCNTL_ENCODE(/;"	d	file:
MIIM_BCM54xx_AUXSTATUS	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54xx_AUXSTATUS	/;"	d	file:
MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK	/;"	d	file:
MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT	drivers/net/phy/broadcom.c	/^#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT	/;"	d	file:
MIIM_CIS8201_EXTCON1_INIT	drivers/net/phy/vitesse.c	/^#define MIIM_CIS8201_EXTCON1_INIT	/;"	d	file:
MIIM_CIS8204_EPHYCON_INIT	drivers/net/phy/vitesse.c	/^#define MIIM_CIS8204_EPHYCON_INIT	/;"	d	file:
MIIM_CIS8204_EPHYCON_RGMII	drivers/net/phy/vitesse.c	/^#define MIIM_CIS8204_EPHYCON_RGMII	/;"	d	file:
MIIM_CIS8204_EPHY_CON	drivers/net/phy/vitesse.c	/^#define MIIM_CIS8204_EPHY_CON	/;"	d	file:
MIIM_CIS8204_SLEDCON_INIT	board/freescale/mpc8544ds/mpc8544ds.c	/^#define MIIM_CIS8204_SLEDCON_INIT	/;"	d	file:
MIIM_CIS8204_SLEDCON_INIT	drivers/net/phy/vitesse.c	/^#define MIIM_CIS8204_SLEDCON_INIT	/;"	d	file:
MIIM_CIS8204_SLED_CON	board/freescale/mpc8544ds/mpc8544ds.c	/^#define MIIM_CIS8204_SLED_CON	/;"	d	file:
MIIM_CIS8204_SLED_CON	drivers/net/phy/vitesse.c	/^#define MIIM_CIS8204_SLED_CON	/;"	d	file:
MIIM_CIS82xx_AUXCONSTAT_100	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_AUXCONSTAT_100	/;"	d	file:
MIIM_CIS82xx_AUXCONSTAT_DUPLEX	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_AUXCONSTAT_DUPLEX	/;"	d	file:
MIIM_CIS82xx_AUXCONSTAT_GBIT	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_AUXCONSTAT_GBIT	/;"	d	file:
MIIM_CIS82xx_AUXCONSTAT_INIT	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_AUXCONSTAT_INIT	/;"	d	file:
MIIM_CIS82xx_AUXCONSTAT_SPEED	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_AUXCONSTAT_SPEED	/;"	d	file:
MIIM_CIS82xx_AUX_CONSTAT	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_AUX_CONSTAT	/;"	d	file:
MIIM_CIS82xx_EXT_CON1	drivers/net/phy/vitesse.c	/^#define MIIM_CIS82xx_EXT_CON1	/;"	d	file:
MIIM_DM9161_10BTCSR	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_10BTCSR /;"	d	file:
MIIM_DM9161_10BTCSR_INIT	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_10BTCSR_INIT /;"	d	file:
MIIM_DM9161_SCR	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCR /;"	d	file:
MIIM_DM9161_SCR_INIT	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCR_INIT /;"	d	file:
MIIM_DM9161_SCSR	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCSR /;"	d	file:
MIIM_DM9161_SCSR_100F	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCSR_100F /;"	d	file:
MIIM_DM9161_SCSR_100H	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCSR_100H /;"	d	file:
MIIM_DM9161_SCSR_10F	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCSR_10F /;"	d	file:
MIIM_DM9161_SCSR_10H	drivers/net/phy/davicom.c	/^#define MIIM_DM9161_SCSR_10H /;"	d	file:
MIIM_DP83865_DPX_FULL	drivers/net/phy/natsemi.c	/^#define MIIM_DP83865_DPX_FULL /;"	d	file:
MIIM_DP83865_LANR	drivers/net/phy/natsemi.c	/^#define MIIM_DP83865_LANR /;"	d	file:
MIIM_DP83865_SPD_100	drivers/net/phy/natsemi.c	/^#define MIIM_DP83865_SPD_100 /;"	d	file:
MIIM_DP83865_SPD_1000	drivers/net/phy/natsemi.c	/^#define MIIM_DP83865_SPD_1000 /;"	d	file:
MIIM_DP83865_SPD_MASK	drivers/net/phy/natsemi.c	/^#define MIIM_DP83865_SPD_MASK /;"	d	file:
MIIM_KSZ90xx_PHYCTL_10	drivers/net/phy/micrel.c	/^#define MIIM_KSZ90xx_PHYCTL_10	/;"	d	file:
MIIM_KSZ90xx_PHYCTL_100	drivers/net/phy/micrel.c	/^#define MIIM_KSZ90xx_PHYCTL_100	/;"	d	file:
MIIM_KSZ90xx_PHYCTL_1000	drivers/net/phy/micrel.c	/^#define MIIM_KSZ90xx_PHYCTL_1000	/;"	d	file:
MIIM_KSZ90xx_PHYCTL_DUPLEX	drivers/net/phy/micrel.c	/^#define MIIM_KSZ90xx_PHYCTL_DUPLEX	/;"	d	file:
MIIM_LXT971_LED_CFG_REG	board/ifm/o2dnt2/o2dnt2.c	/^#define MIIM_LXT971_LED_CFG_REG	/;"	d	file:
MIIM_LXT971_SR2	drivers/net/phy/lxt.c	/^#define MIIM_LXT971_SR2 /;"	d	file:
MIIM_LXT971_SR2_100FDX	drivers/net/phy/lxt.c	/^#define MIIM_LXT971_SR2_100FDX /;"	d	file:
MIIM_LXT971_SR2_100HDX	drivers/net/phy/lxt.c	/^#define MIIM_LXT971_SR2_100HDX /;"	d	file:
MIIM_LXT971_SR2_10FDX	drivers/net/phy/lxt.c	/^#define MIIM_LXT971_SR2_10FDX /;"	d	file:
MIIM_LXT971_SR2_10HDX	drivers/net/phy/lxt.c	/^#define MIIM_LXT971_SR2_10HDX /;"	d	file:
MIIM_LXT971_SR2_SPEED_MASK	drivers/net/phy/lxt.c	/^#define MIIM_LXT971_SR2_SPEED_MASK /;"	d	file:
MIIM_M88E1145_RGMII_RX_DELAY	drivers/net/phy/marvell.c	/^#define MIIM_M88E1145_RGMII_RX_DELAY	/;"	d	file:
MIIM_M88E1145_RGMII_TX_DELAY	drivers/net/phy/marvell.c	/^#define MIIM_M88E1145_RGMII_TX_DELAY	/;"	d	file:
MIIM_RTL8211F_AUTONEG_ENABLE	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_AUTONEG_ENABLE /;"	d	file:
MIIM_RTL8211F_LCR	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_LCR	/;"	d	file:
MIIM_RTL8211F_PAGE_SELECT	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PAGE_SELECT /;"	d	file:
MIIM_RTL8211F_PHYSTAT_100	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHYSTAT_100 /;"	d	file:
MIIM_RTL8211F_PHYSTAT_DUPLEX	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHYSTAT_DUPLEX /;"	d	file:
MIIM_RTL8211F_PHYSTAT_GBIT	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHYSTAT_GBIT /;"	d	file:
MIIM_RTL8211F_PHYSTAT_LINK	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHYSTAT_LINK /;"	d	file:
MIIM_RTL8211F_PHYSTAT_SPDDONE	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHYSTAT_SPDDONE /;"	d	file:
MIIM_RTL8211F_PHYSTAT_SPEED	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHYSTAT_SPEED /;"	d	file:
MIIM_RTL8211F_PHY_STATUS	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_PHY_STATUS /;"	d	file:
MIIM_RTL8211F_TX_DELAY	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211F_TX_DELAY	/;"	d	file:
MIIM_RTL8211X_CTRL1000T_MASTER	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211X_CTRL1000T_MASTER /;"	d	file:
MIIM_RTL8211x_CTRL1000T_MSCE	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_CTRL1000T_MSCE /;"	d	file:
MIIM_RTL8211x_PHYSTAT_100	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHYSTAT_100 /;"	d	file:
MIIM_RTL8211x_PHYSTAT_DUPLEX	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHYSTAT_DUPLEX /;"	d	file:
MIIM_RTL8211x_PHYSTAT_GBIT	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHYSTAT_GBIT /;"	d	file:
MIIM_RTL8211x_PHYSTAT_LINK	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHYSTAT_LINK /;"	d	file:
MIIM_RTL8211x_PHYSTAT_SPDDONE	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHYSTAT_SPDDONE /;"	d	file:
MIIM_RTL8211x_PHYSTAT_SPEED	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHYSTAT_SPEED /;"	d	file:
MIIM_RTL8211x_PHY_INER	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHY_INER /;"	d	file:
MIIM_RTL8211x_PHY_INSR	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHY_INSR /;"	d	file:
MIIM_RTL8211x_PHY_INTR_DIS	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHY_INTR_DIS /;"	d	file:
MIIM_RTL8211x_PHY_INTR_ENA	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHY_INTR_ENA /;"	d	file:
MIIM_RTL8211x_PHY_STATUS	drivers/net/phy/realtek.c	/^#define MIIM_RTL8211x_PHY_STATUS /;"	d	file:
MIIM_TIMEOUT	drivers/net/fm/fm.h	/^#define MIIM_TIMEOUT /;"	d
MIIM_VSC8514_18G_CMDSTAT	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8514_18G_CMDSTAT	/;"	d	file:
MIIM_VSC8514_18G_QSGMII	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8514_18G_QSGMII	/;"	d	file:
MIIM_VSC8514_GENERAL18	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8514_GENERAL18	/;"	d	file:
MIIM_VSC8514_GENERAL19	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8514_GENERAL19	/;"	d	file:
MIIM_VSC8514_GENERAL23	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8514_GENERAL23	/;"	d	file:
MIIM_VSC8514_MAC_SERDES_CON	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8514_MAC_SERDES_CON /;"	d	file:
MIIM_VSC8574_18G_CMDSTAT	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_18G_CMDSTAT	/;"	d	file:
MIIM_VSC8574_18G_QSGMII	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_18G_QSGMII	/;"	d	file:
MIIM_VSC8574_18G_SGMII	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_18G_SGMII	/;"	d	file:
MIIM_VSC8574_GENERAL18	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_GENERAL18	/;"	d	file:
MIIM_VSC8574_GENERAL19	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_GENERAL19	/;"	d	file:
MIIM_VSC8574_MAC_SERDES_ANEG	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_MAC_SERDES_ANEG	/;"	d	file:
MIIM_VSC8574_MAC_SERDES_CON	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8574_MAC_SERDES_CON	/;"	d	file:
MIIM_VSC8601_EPHY_CON	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8601_EPHY_CON	/;"	d	file:
MIIM_VSC8601_EPHY_CON_INIT_SKEW	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8601_EPHY_CON_INIT_SKEW	/;"	d	file:
MIIM_VSC8601_SKEW_CTRL	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8601_SKEW_CTRL	/;"	d	file:
MIIM_VSC8664_ADDITIONAL_DEV	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8664_ADDITIONAL_DEV	/;"	d	file:
MIIM_VSC8664_EPHY_CON	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8664_EPHY_CON	/;"	d	file:
MIIM_VSC8664_LED_CON	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8664_LED_CON	/;"	d	file:
MIIM_VSC8664_SERDES_AND_SIGDET	drivers/net/phy/vitesse.c	/^#define MIIM_VSC8664_SERDES_AND_SIGDET	/;"	d	file:
MIIREGSHIFT	drivers/net/designware.h	/^#define MIIREGSHIFT	/;"	d
MIIRX_DATA	drivers/net/ethoc.c	/^#define	MIIRX_DATA	/;"	d	file:
MIIRX_DATA_VAL	drivers/net/ethoc.c	/^#define	MIIRX_DATA_VAL(/;"	d	file:
MIISTATUS	drivers/net/ethoc.c	/^#define	MIISTATUS	/;"	d	file:
MIISTATUS_BUSY	drivers/net/ethoc.c	/^#define	MIISTATUS_BUSY	/;"	d	file:
MIISTATUS_INVALID	drivers/net/ethoc.c	/^#define	MIISTATUS_INVALID	/;"	d	file:
MIISTATUS_LINKFAIL	drivers/net/ethoc.c	/^#define	MIISTATUS_LINKFAIL	/;"	d	file:
MIISTS_BUSY	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define MIISTS_BUSY	/;"	d
MIITX_DATA	drivers/net/ethoc.c	/^#define	MIITX_DATA	/;"	d	file:
MIITX_DATA_VAL	drivers/net/ethoc.c	/^#define	MIITX_DATA_VAL(/;"	d	file:
MII_ACC	drivers/net/smc911x.h	/^#define MII_ACC	/;"	d
MII_ACC_MIIRINDA	drivers/net/smc911x.h	/^#define MII_ACC_MIIRINDA	/;"	d
MII_ACC_MII_BUSY	drivers/net/smc911x.h	/^#define MII_ACC_MII_BUSY	/;"	d
MII_ACC_MII_WRITE	drivers/net/smc911x.h	/^#define MII_ACC_MII_WRITE	/;"	d
MII_ACC_PHY_ADDR	drivers/net/smc911x.h	/^#define MII_ACC_PHY_ADDR	/;"	d
MII_ADDR	drivers/usb/eth/smsc95xx.c	/^#define MII_ADDR	/;"	d	file:
MII_ADDRESS_MAX	drivers/net/ep93xx_eth.c	/^#define MII_ADDRESS_MAX	/;"	d	file:
MII_ADDRMSK	drivers/net/designware.h	/^#define MII_ADDRMSK	/;"	d
MII_ADVERTISE	drivers/usb/eth/r8152.h	/^#define MII_ADVERTISE /;"	d
MII_ADVERTISE	include/linux/mii.h	/^#define MII_ADVERTISE	/;"	d
MII_BASIC_FEATURES	drivers/qe/uec_phy.h	/^#define MII_BASIC_FEATURES /;"	d
MII_BMCR	drivers/net/rtl8139.c	/^	MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,$/;"	e	enum:RTL8139_registers	file:
MII_BMCR	drivers/usb/eth/r8152.h	/^#define MII_BMCR /;"	d
MII_BMCR	include/linux/mii.h	/^#define MII_BMCR	/;"	d
MII_BMSR	drivers/net/rtl8139.c	/^	MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,$/;"	e	enum:RTL8139_registers	file:
MII_BMSR	drivers/usb/eth/r8152.h	/^#define MII_BMSR /;"	d
MII_BMSR	include/linux/mii.h	/^#define MII_BMSR	/;"	d
MII_BUSY	drivers/net/designware.h	/^#define MII_BUSY	/;"	d
MII_BUSY_	drivers/usb/eth/smsc95xx.c	/^#define MII_BUSY_	/;"	d	file:
MII_CIS8201_AUXCONSTAT_100	drivers/qe/uec_phy.h	/^#define MII_CIS8201_AUXCONSTAT_100 /;"	d
MII_CIS8201_AUXCONSTAT_DUPLEX	drivers/qe/uec_phy.h	/^#define MII_CIS8201_AUXCONSTAT_DUPLEX /;"	d
MII_CIS8201_AUXCONSTAT_GBIT	drivers/qe/uec_phy.h	/^#define MII_CIS8201_AUXCONSTAT_GBIT /;"	d
MII_CIS8201_AUXCONSTAT_INIT	drivers/qe/uec_phy.h	/^#define MII_CIS8201_AUXCONSTAT_INIT /;"	d
MII_CIS8201_AUXCONSTAT_SPEED	drivers/qe/uec_phy.h	/^#define MII_CIS8201_AUXCONSTAT_SPEED /;"	d
MII_CIS8201_AUX_CONSTAT	drivers/qe/uec_phy.h	/^#define MII_CIS8201_AUX_CONSTAT	/;"	d
MII_CIS8201_EXTCON1_INIT	drivers/qe/uec_phy.h	/^#define MII_CIS8201_EXTCON1_INIT /;"	d
MII_CIS8201_EXT_CON1	drivers/qe/uec_phy.h	/^#define MII_CIS8201_EXT_CON1	/;"	d
MII_CIS8201_IMASK	drivers/qe/uec_phy.h	/^#define MII_CIS8201_IMASK	/;"	d
MII_CIS8201_IMASK_DUPLEX	drivers/qe/uec_phy.h	/^#define MII_CIS8201_IMASK_DUPLEX /;"	d
MII_CIS8201_IMASK_IEN	drivers/qe/uec_phy.h	/^#define MII_CIS8201_IMASK_IEN	/;"	d
MII_CIS8201_IMASK_LINK	drivers/qe/uec_phy.h	/^#define MII_CIS8201_IMASK_LINK	/;"	d
MII_CIS8201_IMASK_MASK	drivers/qe/uec_phy.h	/^#define MII_CIS8201_IMASK_MASK	/;"	d
MII_CIS8201_IMASK_SPEED	drivers/qe/uec_phy.h	/^#define MII_CIS8201_IMASK_SPEED	/;"	d
MII_CIS8201_ISTAT	drivers/qe/uec_phy.h	/^#define MII_CIS8201_ISTAT	/;"	d
MII_CIS8201_ISTAT_DUPLEX	drivers/qe/uec_phy.h	/^#define MII_CIS8201_ISTAT_DUPLEX /;"	d
MII_CIS8201_ISTAT_LINK	drivers/qe/uec_phy.h	/^#define MII_CIS8201_ISTAT_LINK	/;"	d
MII_CIS8201_ISTAT_SPEED	drivers/qe/uec_phy.h	/^#define MII_CIS8201_ISTAT_SPEED	/;"	d
MII_CIS8201_ISTAT_STATUS	drivers/qe/uec_phy.h	/^#define MII_CIS8201_ISTAT_STATUS /;"	d
MII_CLKRANGE_100_150M	drivers/net/designware.h	/^#define MII_CLKRANGE_100_150M	/;"	d
MII_CLKRANGE_150_250M	drivers/net/designware.h	/^#define MII_CLKRANGE_150_250M	/;"	d
MII_CLKRANGE_20_35M	drivers/net/designware.h	/^#define MII_CLKRANGE_20_35M	/;"	d
MII_CLKRANGE_250_300M	drivers/net/designware.h	/^#define MII_CLKRANGE_250_300M	/;"	d
MII_CLKRANGE_35_60M	drivers/net/designware.h	/^#define MII_CLKRANGE_35_60M	/;"	d
MII_CLKRANGE_60_100M	drivers/net/designware.h	/^#define MII_CLKRANGE_60_100M	/;"	d
MII_COL_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_CRS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_CR_AUTO_NEG_EN	drivers/net/e1000.h	/^#define MII_CR_AUTO_NEG_EN	/;"	d
MII_CR_COLL_TEST_ENABLE	drivers/net/e1000.h	/^#define MII_CR_COLL_TEST_ENABLE	/;"	d
MII_CR_FULL_DUPLEX	drivers/net/e1000.h	/^#define MII_CR_FULL_DUPLEX	/;"	d
MII_CR_ISOLATE	drivers/net/e1000.h	/^#define MII_CR_ISOLATE	/;"	d
MII_CR_LOOPBACK	drivers/net/e1000.h	/^#define MII_CR_LOOPBACK	/;"	d
MII_CR_POWER_DOWN	drivers/net/e1000.h	/^#define MII_CR_POWER_DOWN	/;"	d
MII_CR_RESET	drivers/net/e1000.h	/^#define MII_CR_RESET	/;"	d
MII_CR_RESTART_AUTO_NEG	drivers/net/e1000.h	/^#define MII_CR_RESTART_AUTO_NEG	/;"	d
MII_CR_SPEED_10	drivers/net/e1000.h	/^#define MII_CR_SPEED_10	/;"	d
MII_CR_SPEED_100	drivers/net/e1000.h	/^#define MII_CR_SPEED_100	/;"	d
MII_CR_SPEED_1000	drivers/net/e1000.h	/^#define MII_CR_SPEED_1000	/;"	d
MII_CR_SPEED_SELECT_LSB	drivers/net/e1000.h	/^#define MII_CR_SPEED_SELECT_LSB	/;"	d
MII_CR_SPEED_SELECT_MSB	drivers/net/e1000.h	/^#define MII_CR_SPEED_SELECT_MSB	/;"	d
MII_CTRL1000	drivers/usb/eth/r8152.h	/^#define MII_CTRL1000 /;"	d
MII_CTRL1000	include/linux/mii.h	/^#define MII_CTRL1000	/;"	d
MII_DATA	drivers/net/smc911x.h	/^#define MII_DATA	/;"	d
MII_DATA	drivers/usb/eth/smsc95xx.c	/^#define MII_DATA	/;"	d	file:
MII_DBG_PORT2_REG	board/freescale/mx6qarm2/mx6qarm2.c	/^#define MII_DBG_PORT2_REG	/;"	d	file:
MII_DBG_PORT_REG	board/freescale/mx6qarm2/mx6qarm2.c	/^#define MII_DBG_PORT_REG	/;"	d	file:
MII_DCOUNTER	drivers/usb/eth/r8152.h	/^#define MII_DCOUNTER /;"	d
MII_DCOUNTER	include/linux/mii.h	/^#define MII_DCOUNTER	/;"	d
MII_DM9161_10BTCSR	drivers/qe/uec_phy.h	/^#define MII_DM9161_10BTCSR	/;"	d
MII_DM9161_10BTCSR_INIT	drivers/qe/uec_phy.h	/^#define MII_DM9161_10BTCSR_INIT	/;"	d
MII_DM9161_INTR	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR	/;"	d
MII_DM9161_INTR_DPLX_CHANGE	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_DPLX_CHANGE	/;"	d
MII_DM9161_INTR_DPLX_MASK	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_DPLX_MASK	/;"	d
MII_DM9161_INTR_INIT	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_INIT	/;"	d
MII_DM9161_INTR_LINK_CHANGE	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_LINK_CHANGE	/;"	d
MII_DM9161_INTR_LINK_MASK	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_LINK_MASK	/;"	d
MII_DM9161_INTR_MASK	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_MASK	/;"	d
MII_DM9161_INTR_PEND	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_PEND	/;"	d
MII_DM9161_INTR_SPD_CHANGE	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_SPD_CHANGE	/;"	d
MII_DM9161_INTR_SPD_MASK	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_SPD_MASK	/;"	d
MII_DM9161_INTR_STOP	drivers/qe/uec_phy.h	/^#define MII_DM9161_INTR_STOP	/;"	d
MII_DM9161_SCR	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCR	/;"	d
MII_DM9161_SCR_INIT	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCR_INIT	/;"	d
MII_DM9161_SCR_RMII_INIT	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCR_RMII_INIT	/;"	d
MII_DM9161_SCSR	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCSR	/;"	d
MII_DM9161_SCSR_100F	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCSR_100F	/;"	d
MII_DM9161_SCSR_100H	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCSR_100H	/;"	d
MII_DM9161_SCSR_10F	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCSR_10F	/;"	d
MII_DM9161_SCSR_10H	drivers/qe/uec_phy.h	/^#define MII_DM9161_SCSR_10H	/;"	d
MII_DP83867_BISCR	drivers/net/phy/ti.c	/^#define MII_DP83867_BISCR	/;"	d	file:
MII_DP83867_CFG2	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2	/;"	d	file:
MII_DP83867_CFG2_MASK	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2_MASK	/;"	d	file:
MII_DP83867_CFG2_SGMII_AUTONEGEN	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2_SGMII_AUTONEGEN	/;"	d	file:
MII_DP83867_CFG2_SPEEDOPT_10EN	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2_SPEEDOPT_10EN	/;"	d	file:
MII_DP83867_CFG2_SPEEDOPT_CNT	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2_SPEEDOPT_CNT	/;"	d	file:
MII_DP83867_CFG2_SPEEDOPT_ENH	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2_SPEEDOPT_ENH	/;"	d	file:
MII_DP83867_CFG2_SPEEDOPT_INTLOW	drivers/net/phy/ti.c	/^#define MII_DP83867_CFG2_SPEEDOPT_INTLOW	/;"	d	file:
MII_DP83867_MICR	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR	/;"	d	file:
MII_DP83867_MICR_AN_ERR_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_AN_ERR_INT_EN	/;"	d	file:
MII_DP83867_MICR_AUTONEG_COMP_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_AUTONEG_COMP_INT_EN	/;"	d	file:
MII_DP83867_MICR_DUP_MODE_CHNG_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_DUP_MODE_CHNG_INT_EN	/;"	d	file:
MII_DP83867_MICR_FALSE_CARRIER_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_FALSE_CARRIER_INT_EN	/;"	d	file:
MII_DP83867_MICR_JABBER_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_JABBER_INT_EN	/;"	d	file:
MII_DP83867_MICR_LINK_STS_CHNG_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_LINK_STS_CHNG_INT_EN	/;"	d	file:
MII_DP83867_MICR_PAGE_RXD_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_PAGE_RXD_INT_EN	/;"	d	file:
MII_DP83867_MICR_POL_CHNG_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_POL_CHNG_INT_EN	/;"	d	file:
MII_DP83867_MICR_SLEEP_MODE_CHNG_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_SLEEP_MODE_CHNG_INT_EN	/;"	d	file:
MII_DP83867_MICR_SPEED_CHNG_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_SPEED_CHNG_INT_EN	/;"	d	file:
MII_DP83867_MICR_WOL_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_WOL_INT_EN	/;"	d	file:
MII_DP83867_MICR_XGMII_ERR_INT_EN	drivers/net/phy/ti.c	/^#define MII_DP83867_MICR_XGMII_ERR_INT_EN	/;"	d	file:
MII_DP83867_PHYCTRL	drivers/net/phy/ti.c	/^#define MII_DP83867_PHYCTRL	/;"	d	file:
MII_ESTATUS	drivers/usb/eth/r8152.h	/^#define MII_ESTATUS /;"	d
MII_ESTATUS	include/linux/mii.h	/^#define MII_ESTATUS	/;"	d
MII_EXPANSION	drivers/usb/eth/r8152.h	/^#define MII_EXPANSION /;"	d
MII_EXPANSION	include/linux/mii.h	/^#define MII_EXPANSION	/;"	d
MII_FCSCOUNTER	drivers/usb/eth/r8152.h	/^#define MII_FCSCOUNTER /;"	d
MII_FCSCOUNTER	include/linux/mii.h	/^#define MII_FCSCOUNTER	/;"	d
MII_GBIT_FEATURES	drivers/qe/uec_phy.h	/^#define MII_GBIT_FEATURES /;"	d
MII_INTERRUPT_DISABLED	drivers/qe/uec_phy.h	/^#define MII_INTERRUPT_DISABLED	/;"	d
MII_INTERRUPT_ENABLED	drivers/qe/uec_phy.h	/^#define MII_INTERRUPT_ENABLED	/;"	d
MII_KSZ8051_PHY_OMSO	drivers/net/phy/micrel.c	/^#define MII_KSZ8051_PHY_OMSO	/;"	d	file:
MII_KSZ8051_PHY_OMSO_NAND_TREE_ON	drivers/net/phy/micrel.c	/^#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON	/;"	d	file:
MII_KSZ9021_EXTENDED_CTRL	drivers/net/phy/micrel.c	/^#define MII_KSZ9021_EXTENDED_CTRL	/;"	d	file:
MII_KSZ9021_EXTENDED_DATAR	drivers/net/phy/micrel.c	/^#define MII_KSZ9021_EXTENDED_DATAR	/;"	d	file:
MII_KSZ9021_EXTENDED_DATAW	drivers/net/phy/micrel.c	/^#define MII_KSZ9021_EXTENDED_DATAW	/;"	d	file:
MII_KSZ9021_EXT_ANALOG_TEST	include/micrel.h	/^#define MII_KSZ9021_EXT_ANALOG_TEST	/;"	d
MII_KSZ9021_EXT_COMMON_CTRL	include/micrel.h	/^#define MII_KSZ9021_EXT_COMMON_CTRL	/;"	d
MII_KSZ9021_EXT_OP_STRAP_OVERRIDE	include/micrel.h	/^#define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE	/;"	d
MII_KSZ9021_EXT_OP_STRAP_STATUS	include/micrel.h	/^#define MII_KSZ9021_EXT_OP_STRAP_STATUS	/;"	d
MII_KSZ9021_EXT_RGMII_CLOCK_SKEW	include/micrel.h	/^#define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW	/;"	d
MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW	include/micrel.h	/^#define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW	/;"	d
MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW	include/micrel.h	/^#define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW	/;"	d
MII_KSZ9021_EXT_STRAP_STATUS	include/micrel.h	/^#define MII_KSZ9021_EXT_STRAP_STATUS	/;"	d
MII_KSZ9031_EXT_RGMII_CLOCK_SKEW	include/micrel.h	/^#define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW	/;"	d
MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW	include/micrel.h	/^#define MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW	/;"	d
MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW	include/micrel.h	/^#define MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW	/;"	d
MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW	include/micrel.h	/^#define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW	/;"	d
MII_KSZ9031_FLP_BURST_TX_HI	include/micrel.h	/^#define MII_KSZ9031_FLP_BURST_TX_HI	/;"	d
MII_KSZ9031_FLP_BURST_TX_LO	include/micrel.h	/^#define MII_KSZ9031_FLP_BURST_TX_LO	/;"	d
MII_KSZ9031_MMD_ACCES_CTRL	drivers/net/phy/micrel.c	/^#define MII_KSZ9031_MMD_ACCES_CTRL	/;"	d	file:
MII_KSZ9031_MMD_REG_DATA	drivers/net/phy/micrel.c	/^#define MII_KSZ9031_MMD_REG_DATA	/;"	d	file:
MII_KSZ9031_MOD_DATA_NO_POST_INC	include/micrel.h	/^#define MII_KSZ9031_MOD_DATA_NO_POST_INC	/;"	d
MII_KSZ9031_MOD_DATA_POST_INC_RW	include/micrel.h	/^#define MII_KSZ9031_MOD_DATA_POST_INC_RW	/;"	d
MII_KSZ9031_MOD_DATA_POST_INC_W	include/micrel.h	/^#define MII_KSZ9031_MOD_DATA_POST_INC_W	/;"	d
MII_KSZ9031_MOD_REG	include/micrel.h	/^#define MII_KSZ9031_MOD_REG	/;"	d
MII_KSZ90xx_PHY_CTL	drivers/net/phy/micrel.c	/^#define MII_KSZ90xx_PHY_CTL	/;"	d	file:
MII_KSZPHY_OMSO	drivers/net/phy/micrel.c	/^#define MII_KSZPHY_OMSO	/;"	d	file:
MII_LBRERROR	drivers/usb/eth/r8152.h	/^#define MII_LBRERROR /;"	d
MII_LBRERROR	include/linux/mii.h	/^#define MII_LBRERROR	/;"	d
MII_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_LPA	drivers/usb/eth/r8152.h	/^#define MII_LPA /;"	d
MII_LPA	include/linux/mii.h	/^#define MII_LPA	/;"	d
MII_M1011_IEVENT	drivers/qe/uec_phy.h	/^#define MII_M1011_IEVENT	/;"	d
MII_M1011_IEVENT_CLEAR	drivers/qe/uec_phy.h	/^#define MII_M1011_IEVENT_CLEAR	/;"	d
MII_M1011_IMASK	drivers/qe/uec_phy.h	/^#define MII_M1011_IMASK	/;"	d
MII_M1011_IMASK_CLEAR	drivers/qe/uec_phy.h	/^#define MII_M1011_IMASK_CLEAR	/;"	d
MII_M1011_IMASK_INIT	drivers/qe/uec_phy.h	/^#define MII_M1011_IMASK_INIT	/;"	d
MII_M1011_PHY_SPEC_STATUS	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS	/;"	d
MII_M1011_PHY_SPEC_STATUS_100	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS_100	/;"	d
MII_M1011_PHY_SPEC_STATUS_1000	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS_1000	/;"	d
MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX	/;"	d
MII_M1011_PHY_SPEC_STATUS_LINK	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS_LINK	/;"	d
MII_M1011_PHY_SPEC_STATUS_RESOLVED	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS_RESOLVED	/;"	d
MII_M1011_PHY_SPEC_STATUS_SPD_MASK	drivers/qe/uec_phy.h	/^#define MII_M1011_PHY_SPEC_STATUS_SPD_MASK	/;"	d
MII_M1111_HWCFG_MODE_MASK	drivers/qe/uec_phy.h	/^#define MII_M1111_HWCFG_MODE_MASK /;"	d
MII_M1111_HWCFG_MODE_RGMII	drivers/qe/uec_phy.h	/^#define MII_M1111_HWCFG_MODE_RGMII /;"	d
MII_M1111_PHY_EXT_CR	drivers/qe/uec_phy.h	/^#define MII_M1111_PHY_EXT_CR /;"	d
MII_M1111_PHY_EXT_SR	drivers/qe/uec_phy.h	/^#define MII_M1111_PHY_EXT_SR /;"	d
MII_M1111_RX_DELAY	drivers/qe/uec_phy.h	/^#define MII_M1111_RX_DELAY /;"	d
MII_M1111_TX_DELAY	drivers/qe/uec_phy.h	/^#define MII_M1111_TX_DELAY /;"	d
MII_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_MARVELL_PHY_PAGE	board/LaCie/common/common.c	/^#define MII_MARVELL_PHY_PAGE	/;"	d	file:
MII_MAX_PHY	drivers/net/lpc32xx_eth.c	/^#define MII_MAX_PHY /;"	d	file:
MII_MAX_REG	drivers/net/lpc32xx_eth.c	/^#define MII_MAX_REG /;"	d	file:
MII_MCLK	drivers/net/smc91111.h	/^#define MII_MCLK	/;"	d
MII_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_MDI	drivers/net/smc91111.h	/^#define MII_MDI	/;"	d
MII_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_MDO	drivers/net/smc91111.h	/^#define MII_MDO	/;"	d
MII_MDOE	drivers/net/smc91111.h	/^#define MII_MDOE	/;"	d
MII_MGMT_COMMAND_READ_CYCLE	drivers/net/tsi108_eth.c	/^#define MII_MGMT_COMMAND_READ_CYCLE	/;"	d	file:
MII_MGMT_COMMAND_SCAN_CYCLE	drivers/net/tsi108_eth.c	/^#define MII_MGMT_COMMAND_SCAN_CYCLE	/;"	d	file:
MII_MGMT_CONFIG_MGMT_CLOCK_SELECT	drivers/net/tsi108_eth.c	/^#define MII_MGMT_CONFIG_MGMT_CLOCK_SELECT(/;"	d	file:
MII_MGMT_CONFIG_NO_PREAMBLE	drivers/net/tsi108_eth.c	/^#define MII_MGMT_CONFIG_NO_PREAMBLE	/;"	d	file:
MII_MGMT_CONFIG_RESET_MGMT	drivers/net/tsi108_eth.c	/^#define MII_MGMT_CONFIG_RESET_MGMT	/;"	d	file:
MII_MGMT_CONFIG_SCAN_INCREMENT	drivers/net/tsi108_eth.c	/^#define MII_MGMT_CONFIG_SCAN_INCREMENT	/;"	d	file:
MII_MGMT_INDICATORS_BUSY	drivers/net/tsi108_eth.c	/^#define MII_MGMT_INDICATORS_BUSY	/;"	d	file:
MII_MGMT_INDICATORS_NOT_VALID	drivers/net/tsi108_eth.c	/^#define MII_MGMT_INDICATORS_NOT_VALID	/;"	d	file:
MII_MGMT_INDICATORS_SCAN	drivers/net/tsi108_eth.c	/^#define MII_MGMT_INDICATORS_SCAN	/;"	d	file:
MII_MIPSCR	include/miiphy.h	/^#define MII_MIPSCR	/;"	d
MII_MMD_ACCESS_ADDR_DATA_REG	board/freescale/mx6qarm2/mx6qarm2.c	/^#define MII_MMD_ACCESS_ADDR_DATA_REG	/;"	d	file:
MII_MMD_ACCESS_CTRL_REG	board/freescale/mx6qarm2/mx6qarm2.c	/^#define MII_MMD_ACCESS_CTRL_REG	/;"	d	file:
MII_MMD_CTRL	drivers/net/phy/ti.c	/^#define MII_MMD_CTRL	/;"	d	file:
MII_MMD_CTRL	drivers/usb/eth/r8152.h	/^#define MII_MMD_CTRL /;"	d
MII_MMD_CTRL_ADDR	drivers/net/phy/ti.c	/^#define MII_MMD_CTRL_ADDR	/;"	d	file:
MII_MMD_CTRL_DEVAD_MASK	drivers/net/phy/ti.c	/^#define MII_MMD_CTRL_DEVAD_MASK	/;"	d	file:
MII_MMD_CTRL_INCR_ON_WT	drivers/net/phy/ti.c	/^#define MII_MMD_CTRL_INCR_ON_WT	/;"	d	file:
MII_MMD_CTRL_INCR_RDWT	drivers/net/phy/ti.c	/^#define MII_MMD_CTRL_INCR_RDWT	/;"	d	file:
MII_MMD_CTRL_NOINCR	drivers/net/phy/ti.c	/^#define MII_MMD_CTRL_NOINCR	/;"	d	file:
MII_MMD_DATA	drivers/net/phy/ti.c	/^#define MII_MMD_DATA	/;"	d	file:
MII_MMD_DATA	drivers/usb/eth/r8152.h	/^#define MII_MMD_DATA /;"	d
MII_MODE_ENABLE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define MII_MODE_ENABLE	/;"	d
MII_MODE_ENABLE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define MII_MODE_ENABLE	/;"	d
MII_MSK_CRS100	drivers/net/smc91111.h	/^#define MII_MSK_CRS100	/;"	d
MII_NCONFIG	drivers/usb/eth/r8152.h	/^#define MII_NCONFIG /;"	d
MII_NCONFIG	include/linux/mii.h	/^#define MII_NCONFIG	/;"	d
MII_NWAYTEST	drivers/usb/eth/r8152.h	/^#define MII_NWAYTEST /;"	d
MII_NWAYTEST	include/linux/mii.h	/^#define MII_NWAYTEST	/;"	d
MII_OPMODE_STRAP_OVERRIDE	board/denx/m28evk/m28evk.c	/^#define	MII_OPMODE_STRAP_OVERRIDE	/;"	d	file:
MII_PHYADDR	drivers/usb/eth/r8152.h	/^#define MII_PHYADDR /;"	d
MII_PHYADDR	include/linux/mii.h	/^#define MII_PHYADDR	/;"	d
MII_PHYID_REG1	drivers/net/ne2000.c	/^#define MII_PHYID_REG1	/;"	d	file:
MII_PHYID_REG2	drivers/net/ne2000.c	/^#define MII_PHYID_REG2	/;"	d	file:
MII_PHYID_REV_MASK	drivers/net/ne2000.c	/^#define MII_PHYID_REV_MASK	/;"	d	file:
MII_PHYSID1	drivers/usb/eth/r8152.h	/^#define MII_PHYSID1 /;"	d
MII_PHYSID1	include/linux/mii.h	/^#define MII_PHYSID1	/;"	d
MII_PHYSID2	drivers/usb/eth/r8152.h	/^#define MII_PHYSID2 /;"	d
MII_PHYSID2	include/linux/mii.h	/^#define MII_PHYSID2	/;"	d
MII_PHY_CONFIG_REG	arch/arm/mach-davinci/et1011c.c	/^#define MII_PHY_CONFIG_REG	/;"	d	file:
MII_PHY_CTRL1	board/denx/m28evk/m28evk.c	/^#define	MII_PHY_CTRL1	/;"	d	file:
MII_PHY_CTRL2	board/bluegiga/apx4devkit/apx4devkit.c	/^#define MII_PHY_CTRL2 /;"	d	file:
MII_PHY_CTRL2	board/denx/m28evk/m28evk.c	/^#define	MII_PHY_CTRL2	/;"	d	file:
MII_PHY_STATUS_100	drivers/net/phy/xilinx_phy.c	/^#define MII_PHY_STATUS_100	/;"	d	file:
MII_PHY_STATUS_1000	drivers/net/phy/xilinx_phy.c	/^#define MII_PHY_STATUS_1000	/;"	d	file:
MII_PHY_STATUS_FULLDUPLEX	drivers/net/phy/xilinx_phy.c	/^#define MII_PHY_STATUS_FULLDUPLEX	/;"	d	file:
MII_PHY_STATUS_SPD_MASK	drivers/net/phy/xilinx_phy.c	/^#define MII_PHY_STATUS_SPD_MASK	/;"	d	file:
MII_PORTSELECT	drivers/net/designware.h	/^#define MII_PORTSELECT	/;"	d
MII_READ_	drivers/usb/eth/smsc95xx.c	/^#define MII_READ_	/;"	d	file:
MII_READ_COMMAND	drivers/qe/uec_phy.h	/^#define MII_READ_COMMAND	/;"	d
MII_REG	drivers/net/smc91111.h	/^#define	MII_REG	/;"	d
MII_REGISTER_MAX	drivers/net/ep93xx_eth.c	/^#define MII_REGISTER_MAX	/;"	d	file:
MII_REGMSK	drivers/net/designware.h	/^#define MII_REGMSK	/;"	d
MII_RERRCOUNTER	drivers/usb/eth/r8152.h	/^#define MII_RERRCOUNTER /;"	d
MII_RERRCOUNTER	include/linux/mii.h	/^#define MII_RERRCOUNTER /;"	d
MII_RESV1	drivers/usb/eth/r8152.h	/^#define MII_RESV1 /;"	d
MII_RESV1	include/linux/mii.h	/^#define MII_RESV1	/;"	d
MII_RESV2	drivers/usb/eth/r8152.h	/^#define MII_RESV2 /;"	d
MII_RESV2	include/linux/mii.h	/^#define MII_RESV2	/;"	d
MII_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_RXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_RXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_RX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_RX_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_SEL	board/amcc/bamboo/bamboo.h	/^			    MII_SEL,$/;"	e	enum:config_list
MII_SREVISION	drivers/usb/eth/r8152.h	/^#define MII_SREVISION /;"	d
MII_SREVISION	include/linux/mii.h	/^#define MII_SREVISION	/;"	d
MII_SR_100T2_FD_CAPS	drivers/net/e1000.h	/^#define MII_SR_100T2_FD_CAPS	/;"	d
MII_SR_100T2_HD_CAPS	drivers/net/e1000.h	/^#define MII_SR_100T2_HD_CAPS	/;"	d
MII_SR_100T4_CAPS	drivers/net/e1000.h	/^#define MII_SR_100T4_CAPS	/;"	d
MII_SR_100X_FD_CAPS	drivers/net/e1000.h	/^#define MII_SR_100X_FD_CAPS	/;"	d
MII_SR_100X_HD_CAPS	drivers/net/e1000.h	/^#define MII_SR_100X_HD_CAPS	/;"	d
MII_SR_10T_FD_CAPS	drivers/net/e1000.h	/^#define MII_SR_10T_FD_CAPS	/;"	d
MII_SR_10T_HD_CAPS	drivers/net/e1000.h	/^#define MII_SR_10T_HD_CAPS	/;"	d
MII_SR_AUTONEG_CAPS	drivers/net/e1000.h	/^#define MII_SR_AUTONEG_CAPS	/;"	d
MII_SR_AUTONEG_COMPLETE	drivers/net/e1000.h	/^#define MII_SR_AUTONEG_COMPLETE	/;"	d
MII_SR_EXTENDED_CAPS	drivers/net/e1000.h	/^#define MII_SR_EXTENDED_CAPS	/;"	d
MII_SR_EXTENDED_STATUS	drivers/net/e1000.h	/^#define MII_SR_EXTENDED_STATUS	/;"	d
MII_SR_JABBER_DETECT	drivers/net/e1000.h	/^#define MII_SR_JABBER_DETECT	/;"	d
MII_SR_LINK_STATUS	drivers/net/e1000.h	/^#define MII_SR_LINK_STATUS	/;"	d
MII_SR_PREAMBLE_SUPPRESS	drivers/net/e1000.h	/^#define MII_SR_PREAMBLE_SUPPRESS	/;"	d
MII_SR_REMOTE_FAULT	drivers/net/e1000.h	/^#define MII_SR_REMOTE_FAULT	/;"	d
MII_STAT1000	drivers/usb/eth/r8152.h	/^#define MII_STAT1000 /;"	d
MII_STAT1000	include/linux/mii.h	/^#define MII_STAT1000	/;"	d
MII_STATUS_LINK_MASK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MII_STATUS_LINK_MASK	/;"	d
MII_STATUS_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define MII_STATUS_REG	/;"	d
MII_STATUS_REG	drivers/net/davinci_emac.h	/^#define MII_STATUS_REG	/;"	d
MII_TIMEOUT	drivers/net/lpc32xx_eth.c	/^#define MII_TIMEOUT /;"	d	file:
MII_TPISTATUS	drivers/usb/eth/r8152.h	/^#define MII_TPISTATUS /;"	d
MII_TPISTATUS	include/linux/mii.h	/^#define MII_TPISTATUS	/;"	d
MII_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_TXD2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_TXD3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_TX_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_TX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MII_WRITE	drivers/net/designware.h	/^#define MII_WRITE	/;"	d
MII_WRITE_	drivers/usb/eth/smsc95xx.c	/^#define MII_WRITE_	/;"	d	file:
MII_dump_0_to_5	cmd/mii.c	/^static void MII_dump_0_to_5($/;"	f	typeref:typename:void	file:
MII_end	drivers/qe/uec_phy.h	/^#define MII_end /;"	d
MII_field_desc_and_len_t	cmd/mii.c	/^} MII_field_desc_and_len_t;$/;"	t	typeref:struct:_MII_field_desc_and_len_t	file:
MII_field_desc_t	cmd/mii.c	/^} MII_field_desc_t;$/;"	t	typeref:struct:_MII_field_desc_t	file:
MII_read	drivers/qe/uec_phy.h	/^#define MII_read /;"	d
MII_reg_desc_t	cmd/mii.c	/^} MII_reg_desc_t;$/;"	t	typeref:struct:_MII_reg_desc_t	file:
MIM8_A	board/renesas/sh7763rdp/lowlevel_init.S	/^MIM8_A:		.long	0xFE800008$/;"	l
MIM8_D	board/renesas/sh7763rdp/lowlevel_init.S	/^MIM8_D:		.long	0x00000000$/;"	l
MIMC_A	board/renesas/sh7763rdp/lowlevel_init.S	/^MIMC_A:		.long	0xFE80000C$/;"	l
MIMC_D1	board/renesas/sh7763rdp/lowlevel_init.S	/^MIMC_D1:	.long	0x01d10008$/;"	l
MIMC_D2	board/renesas/sh7763rdp/lowlevel_init.S	/^MIMC_D2:	.long	0x01d10009$/;"	l
MIMC_D3	board/renesas/sh7763rdp/lowlevel_init.S	/^MIMC_D3:	.long	0x01d10209$/;"	l
MIM_1	arch/sh/include/asm/cpu_sh7780.h	/^#define	MIM_1	/;"	d
MIM_2	arch/sh/include/asm/cpu_sh7780.h	/^#define	MIM_2	/;"	d
MIM_L_A	board/espt/lowlevel_init.S	/^MIM_L_A:	.long	0xFE80000C$/;"	l
MIM_L_A	board/renesas/r7780mp/lowlevel_init.S	/^MIM_L_A:		.long	MIM_2$/;"	l
MIM_L_A_D1	board/espt/lowlevel_init.S	/^MIM_L_A_D1:	.long	0x04100009$/;"	l
MIM_L_A_D2	board/espt/lowlevel_init.S	/^MIM_L_A_D2:	.long	0x04100209$/;"	l
MIM_L_D0	board/espt/lowlevel_init.S	/^MIM_L_D0:	.long	0x04100008$/;"	l
MIM_L_D0	board/renesas/r7780mp/lowlevel_init.S	/^MIM_L_D0:		.long	0x03e80009$/;"	l
MIM_L_D1	board/espt/lowlevel_init.S	/^MIM_L_D1:	.long	0x02EE0009$/;"	l
MIM_L_D1	board/renesas/r7780mp/lowlevel_init.S	/^MIM_L_D1:		.long	0x03e80209$/;"	l
MIM_L_D2	board/espt/lowlevel_init.S	/^MIM_L_D2:	.long	0x02EE0209$/;"	l
MIM_U_A	board/espt/lowlevel_init.S	/^MIM_U_A:	.long	0xFE800008$/;"	l
MIM_U_A	board/renesas/r7780mp/lowlevel_init.S	/^MIM_U_A:		.long	MIM_1$/;"	l
MIM_U_D	board/espt/lowlevel_init.S	/^MIM_U_D:	.long	0x00000000$/;"	l
MIM_U_D	board/renesas/r7780mp/lowlevel_init.S	/^MIM_U_D:		.long	0x00004000$/;"	l
MIN	scripts/kconfig/lxdialog/dialog.h	/^#define MIN(/;"	d
MIND_BUSY	drivers/net/lpc32xx_eth.c	/^#define MIND_BUSY /;"	d	file:
MINFLR_INIT_SETTINGS	include/tsec.h	/^#define MINFLR_INIT_SETTINGS	/;"	d
MINFRAME	arch/sparc/cpu/leon2/start.S	/^MINFRAME = (WINDOWSIZE + ARGPUSHSIZE + 4)$/;"	d
MINFRAME	arch/sparc/cpu/leon3/start.S	/^MINFRAME = (WINDOWSIZE + ARGPUSHSIZE + 4)$/;"	d
MINIMAL	arch/powerpc/cpu/mpc83xx/Makefile	/^MINIMAL=$/;"	m
MINIMAL	arch/powerpc/cpu/mpc83xx/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	arch/powerpc/cpu/mpc85xx/Makefile	/^MINIMAL=$/;"	m
MINIMAL	arch/powerpc/cpu/mpc85xx/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	arch/powerpc/cpu/mpc8xxx/Makefile	/^MINIMAL=$/;"	m
MINIMAL	arch/powerpc/cpu/mpc8xxx/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	arch/powerpc/lib/Makefile	/^MINIMAL=$/;"	m
MINIMAL	arch/powerpc/lib/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/Arcturus/ucp1020/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/Arcturus/ucp1020/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/bsc9131rdb/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/bsc9131rdb/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/bsc9132qds/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/bsc9132qds/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/c29xpcie/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/c29xpcie/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/common/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/common/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/p1010rdb/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/p1010rdb/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/p1022ds/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/p1022ds/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/freescale/p1_p2_rdb_pc/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/freescale/p1_p2_rdb_pc/Makefile	/^MINIMAL=y$/;"	m
MINIMAL	board/varisys/common/Makefile	/^MINIMAL=$/;"	m
MINIMAL	board/varisys/common/Makefile	/^MINIMAL=y$/;"	m
MINIMAL_SPL	arch/powerpc/cpu/mpc83xx/start.S	/^#define MINIMAL_SPL$/;"	d	file:
MINIMAL_SPL	arch/powerpc/cpu/mpc85xx/start.S	/^#define MINIMAL_SPL$/;"	d	file:
MINIMUM_ETHERNET_FRAME_SIZE	drivers/net/e1000.h	/^#define MINIMUM_ETHERNET_FRAME_SIZE /;"	d
MINIMUM_ETHERNET_PACKET_SIZE	drivers/net/e1000.h	/^#define MINIMUM_ETHERNET_PACKET_SIZE /;"	d
MINIMUS_INTERRUPTUS	drivers/usb/gadget/at91_udc.h	/^#define	MINIMUS_INTERRUPTUS /;"	d
MINMATCH	lib/lz4.c	/^#define MINMATCH /;"	d	file:
MINOR	include/linux/compat.h	/^#define MINOR(/;"	d
MINOR_SW_VERSION	board/cm5200/cm5200.h	/^	MINOR_SW_VERSION,	\/* 7 *\/$/;"	e	enum:__anonb595836f0103
MINOR_SW_VERSION_LEN	board/cm5200/cm5200.h	/^#define MINOR_SW_VERSION_LEN	/;"	d
MINOR_SW_VERSION_OFFSET	board/cm5200/cm5200.h	/^#define MINOR_SW_VERSION_OFFSET	/;"	d
MINSIGSTKSZ	arch/powerpc/include/asm/signal.h	/^#define MINSIGSTKSZ	/;"	d
MINSIGSTKSZ	include/asm-generic/signal.h	/^#define MINSIGSTKSZ	/;"	d
MINSIZE	common/dlmalloc.c	/^#define MINSIZE /;"	d	file:
MINSPERHOUR	include/linux/time.h	/^#define MINSPERHOUR	/;"	d
MINUS1	include/MCD_dma.h	/^#define MINUS1	/;"	d
MINUTE	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	MINUTE	/;"	d
MIN_BLK_ADDR	drivers/mtd/nand/denali.h	/^#define MIN_BLK_ADDR(/;"	d
MIN_BLK_ADDR__VALUE	drivers/mtd/nand/denali.h	/^#define     MIN_BLK_ADDR__VALUE	/;"	d
MIN_CHUNK	tools/getline.c	/^#define MIN_CHUNK /;"	d	file:
MIN_CMDACPT_WIDTH	drivers/ddr/microchip/ddr2_regs.h	/^#define MIN_CMDACPT_WIDTH	/;"	d
MIN_COMMITS	scripts/mailmapper	/^MIN_COMMITS = 50$/;"	v
MIN_DELAY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MIN_DELAY /;"	d
MIN_DELAY_PHASE_1_LIMIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MIN_DELAY_PHASE_1_LIMIT /;"	d
MIN_DIMM_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MIN_DIMM_ADDR	/;"	d
MIN_DIMM_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MIN_DIMM_ADDR	/;"	d
MIN_FRAME_LEN	drivers/qe/uec.h	/^#define MIN_FRAME_LEN	/;"	d
MIN_FREQ	drivers/mmc/bcm2835_sdhci.c	/^#define MIN_FREQ /;"	d	file:
MIN_FSYS	arch/m68k/cpu/mcf532x/speed.c	/^#define MIN_FSYS	/;"	d	file:
MIN_FS_SCL_HIGHTIME	drivers/i2c/designware_i2c.h	/^#define MIN_FS_SCL_HIGHTIME	/;"	d
MIN_FS_SCL_LOWTIME	drivers/i2c/designware_i2c.h	/^#define MIN_FS_SCL_LOWTIME	/;"	d
MIN_GRANT	include/radeon.h	/^#define MIN_GRANT	/;"	d
MIN_HASH_VALUE	scripts/kconfig/zconf.hash.c	/^      MIN_HASH_VALUE = 2,$/;"	e	enum:kconf_id_lookup::__anond60376ef0103	file:
MIN_HS_SCL_HIGHTIME	drivers/i2c/designware_i2c.h	/^#define MIN_HS_SCL_HIGHTIME	/;"	d
MIN_HS_SCL_LOWTIME	drivers/i2c/designware_i2c.h	/^#define MIN_HS_SCL_LOWTIME	/;"	d
MIN_INDEX_LEBS	fs/ubifs/ubifs.h	/^#define MIN_INDEX_LEBS /;"	d
MIN_LIM_WIDTH	drivers/ddr/microchip/ddr2_regs.h	/^#define MIN_LIM_WIDTH	/;"	d
MIN_LOOKAHEAD	lib/zlib/deflate.h	/^#define MIN_LOOKAHEAD /;"	d
MIN_LPD	arch/m68k/cpu/mcf532x/speed.c	/^#define MIN_LPD	/;"	d	file:
MIN_MAPPED_VRAM	drivers/video/ati_radeon_fb.c	/^#define MIN_MAPPED_VRAM	/;"	d	file:
MIN_MASK	drivers/rtc/mx27rtc.c	/^#define MIN_MASK /;"	d	file:
MIN_MATCH	lib/zlib/zutil.h	/^#define MIN_MATCH /;"	d
MIN_MAX_BANK	drivers/mtd/nand/denali.h	/^#define MIN_MAX_BANK(/;"	d
MIN_MAX_BANK__MAX_VALUE	drivers/mtd/nand/denali.h	/^#define     MIN_MAX_BANK__MAX_VALUE	/;"	d
MIN_MAX_BANK__MIN_VALUE	drivers/mtd/nand/denali.h	/^#define     MIN_MAX_BANK__MIN_VALUE	/;"	d
MIN_MFD	arch/m68k/cpu/mcf532x/speed.c	/^#define MIN_MFD	/;"	d	file:
MIN_NUMBER_OF_DESCRIPTORS	drivers/net/e1000.h	/^#define MIN_NUMBER_OF_DESCRIPTORS /;"	d
MIN_NUM_XMITS	drivers/net/e1000.h	/^#define MIN_NUM_XMITS	/;"	d
MIN_PACKET_LENGTH	post/cpu/mpc8xx/ether.c	/^#define MIN_PACKET_LENGTH	/;"	d	file:
MIN_PACKET_LENGTH	post/cpu/ppc4xx/ether.c	/^#define MIN_PACKET_LENGTH	/;"	d	file:
MIN_PART_SIZE	cmd/jffs2.c	/^#define MIN_PART_SIZE	/;"	d	file:
MIN_PART_SIZE	cmd/mtdparts.c	/^#define MIN_PART_SIZE	/;"	d	file:
MIN_PBS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MIN_PBS /;"	d
MIN_PCI_MEMADDR1	arch/powerpc/include/asm/4xx_pci.h	/^#define MIN_PCI_MEMADDR1 /;"	d
MIN_PCI_MEMADDR2	arch/powerpc/include/asm/4xx_pci.h	/^#define MIN_PCI_MEMADDR2 /;"	d
MIN_PCI_PCI_IOADDR	arch/powerpc/include/asm/4xx_pci.h	/^#define MIN_PCI_PCI_IOADDR /;"	d
MIN_PLB_PCI_IOADDR	arch/powerpc/include/asm/4xx_pci.h	/^#define MIN_PLB_PCI_IOADDR /;"	d
MIN_RDQS_EYE	arch/x86/cpu/quark/smc.h	/^#define MIN_RDQS_EYE	/;"	d
MIN_RDW	board/freescale/common/ics307_clk.c	/^#define MIN_RDW	/;"	d	file:
MIN_SHIFT	drivers/rtc/mx27rtc.c	/^#define MIN_SHIFT /;"	d	file:
MIN_SS_SCL_HIGHTIME	drivers/i2c/designware_i2c.h	/^#define MIN_SS_SCL_HIGHTIME	/;"	d
MIN_SS_SCL_LOWTIME	drivers/i2c/designware_i2c.h	/^#define MIN_SS_SCL_LOWTIME	/;"	d
MIN_TO_SECS	drivers/rtc/bfin_rtc.c	/^#define MIN_TO_SECS(/;"	d	file:
MIN_UNITS_PER_WORD	arch/arc/lib/libgcc2.h	/^#define MIN_UNITS_PER_WORD /;"	d
MIN_VALUE	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define MIN_VALUE	/;"	d	file:
MIN_VCO	board/freescale/common/ics307_clk.c	/^#define MIN_VCO	/;"	d	file:
MIN_VDW	board/freescale/common/ics307_clk.c	/^#define MIN_VDW	/;"	d	file:
MIN_VREF_EYE	arch/x86/cpu/quark/smc.h	/^#define MIN_VREF_EYE	/;"	d
MIN_WINDOW_SIZE	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define MIN_WINDOW_SIZE	/;"	d
MIN_WIN_SIZE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MIN_WIN_SIZE /;"	d
MIN_WORD_LENGTH	scripts/kconfig/zconf.hash.c	/^      MIN_WORD_LENGTH = 2,$/;"	e	enum:kconf_id_lookup::__anond60376ef0103	file:
MIN_WRITE_SZ	fs/ubifs/ubifs.h	/^#define MIN_WRITE_SZ /;"	d
MIPI0_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MIPI0_SEL_XUSBXTI	/;"	d
MIPIPADCTRLCFG	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^#define MIPIPADCTRLCFG(/;"	d
MIPIPADCTRLCFG	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^#define MIPIPADCTRLCFG(/;"	d
MIPIPADCTRL_GRP	arch/arm/mach-tegra/tegra124/pinmux.c	/^#define MIPIPADCTRL_GRP(/;"	d	file:
MIPIPADCTRL_REG	arch/arm/mach-tegra/pinmux-common.c	/^#define MIPIPADCTRL_REG(/;"	d	file:
MIPIPADCTRL_RESERVED	arch/arm/mach-tegra/tegra124/pinmux.c	/^#define MIPIPADCTRL_RESERVED /;"	d	file:
MIPI_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MIPI_BASE_ADDR	/;"	d
MIPI_CSI0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MIPI_CSI0_BASE_ADDR	/;"	d
MIPI_CSI2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MIPI_CSI2_BASE_ADDR /;"	d
MIPI_CSI2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MIPI_CSI2_IPS_BASE_ADDR /;"	d
MIPI_CSI_WARP_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	MIPI_CSI_WARP_CLK_ROOT = 72,$/;"	e	enum:clk_root_index
MIPI_CSI_WARP_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_PFD0_196M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_PFD0_196M_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_CSI_WARP_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
MIPI_DCS_ENTER_IDLE_MODE	include/mipi_display.h	/^	MIPI_DCS_ENTER_IDLE_MODE	= 0x39,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_ENTER_INVERT_MODE	include/mipi_display.h	/^	MIPI_DCS_ENTER_INVERT_MODE	= 0x21,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_ENTER_NORMAL_MODE	include/mipi_display.h	/^	MIPI_DCS_ENTER_NORMAL_MODE	= 0x13,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_ENTER_PARTIAL_MODE	include/mipi_display.h	/^	MIPI_DCS_ENTER_PARTIAL_MODE	= 0x12,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_ENTER_SLEEP_MODE	include/mipi_display.h	/^	MIPI_DCS_ENTER_SLEEP_MODE	= 0x10,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_EXIT_IDLE_MODE	include/mipi_display.h	/^	MIPI_DCS_EXIT_IDLE_MODE		= 0x38,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_EXIT_INVERT_MODE	include/mipi_display.h	/^	MIPI_DCS_EXIT_INVERT_MODE	= 0x20,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_EXIT_SLEEP_MODE	include/mipi_display.h	/^	MIPI_DCS_EXIT_SLEEP_MODE	= 0x11,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_ADDRESS_MODE	include/mipi_display.h	/^	MIPI_DCS_GET_ADDRESS_MODE	= 0x0B,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_BLUE_CHANNEL	include/mipi_display.h	/^	MIPI_DCS_GET_BLUE_CHANNEL	= 0x08,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_DIAGNOSTIC_RESULT	include/mipi_display.h	/^	MIPI_DCS_GET_DIAGNOSTIC_RESULT	= 0x0F,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_DISPLAY_ID	include/mipi_display.h	/^	MIPI_DCS_GET_DISPLAY_ID		= 0x04,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_DISPLAY_MODE	include/mipi_display.h	/^	MIPI_DCS_GET_DISPLAY_MODE	= 0x0D,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_DISPLAY_STATUS	include/mipi_display.h	/^	MIPI_DCS_GET_DISPLAY_STATUS	= 0x09,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_GREEN_CHANNEL	include/mipi_display.h	/^	MIPI_DCS_GET_GREEN_CHANNEL	= 0x07,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_PIXEL_FORMAT	include/mipi_display.h	/^	MIPI_DCS_GET_PIXEL_FORMAT	= 0x0C,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_POWER_MODE	include/mipi_display.h	/^	MIPI_DCS_GET_POWER_MODE		= 0x0A,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_RED_CHANNEL	include/mipi_display.h	/^	MIPI_DCS_GET_RED_CHANNEL	= 0x06,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_SCANLINE	include/mipi_display.h	/^	MIPI_DCS_GET_SCANLINE		= 0x45,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_GET_SIGNAL_MODE	include/mipi_display.h	/^	MIPI_DCS_GET_SIGNAL_MODE	= 0x0E,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_NOP	include/mipi_display.h	/^	MIPI_DCS_NOP			= 0x00,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_PIXEL_FMT_12BIT	include/mipi_display.h	/^#define MIPI_DCS_PIXEL_FMT_12BIT	/;"	d
MIPI_DCS_PIXEL_FMT_16BIT	include/mipi_display.h	/^#define MIPI_DCS_PIXEL_FMT_16BIT	/;"	d
MIPI_DCS_PIXEL_FMT_18BIT	include/mipi_display.h	/^#define MIPI_DCS_PIXEL_FMT_18BIT	/;"	d
MIPI_DCS_PIXEL_FMT_24BIT	include/mipi_display.h	/^#define MIPI_DCS_PIXEL_FMT_24BIT	/;"	d
MIPI_DCS_PIXEL_FMT_3BIT	include/mipi_display.h	/^#define MIPI_DCS_PIXEL_FMT_3BIT	/;"	d
MIPI_DCS_PIXEL_FMT_8BIT	include/mipi_display.h	/^#define MIPI_DCS_PIXEL_FMT_8BIT	/;"	d
MIPI_DCS_READ_DDB_CONTINUE	include/mipi_display.h	/^	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_READ_DDB_START	include/mipi_display.h	/^	MIPI_DCS_READ_DDB_START		= 0xA1,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_READ_MEMORY_CONTINUE	include/mipi_display.h	/^	MIPI_DCS_READ_MEMORY_CONTINUE	= 0x3E,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_READ_MEMORY_START	include/mipi_display.h	/^	MIPI_DCS_READ_MEMORY_START	= 0x2E,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_ADDRESS_MODE	include/mipi_display.h	/^	MIPI_DCS_SET_ADDRESS_MODE	= 0x36,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_COLUMN_ADDRESS	include/mipi_display.h	/^	MIPI_DCS_SET_COLUMN_ADDRESS	= 0x2A,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_DISPLAY_OFF	include/mipi_display.h	/^	MIPI_DCS_SET_DISPLAY_OFF	= 0x28,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_DISPLAY_ON	include/mipi_display.h	/^	MIPI_DCS_SET_DISPLAY_ON		= 0x29,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_GAMMA_CURVE	include/mipi_display.h	/^	MIPI_DCS_SET_GAMMA_CURVE	= 0x26,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_PAGE_ADDRESS	include/mipi_display.h	/^	MIPI_DCS_SET_PAGE_ADDRESS	= 0x2B,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_PARTIAL_AREA	include/mipi_display.h	/^	MIPI_DCS_SET_PARTIAL_AREA	= 0x30,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_PIXEL_FORMAT	include/mipi_display.h	/^	MIPI_DCS_SET_PIXEL_FORMAT	= 0x3A,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_SCROLL_AREA	include/mipi_display.h	/^	MIPI_DCS_SET_SCROLL_AREA	= 0x33,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_SCROLL_START	include/mipi_display.h	/^	MIPI_DCS_SET_SCROLL_START	= 0x37,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_TEAR_OFF	include/mipi_display.h	/^	MIPI_DCS_SET_TEAR_OFF		= 0x34,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_TEAR_ON	include/mipi_display.h	/^	MIPI_DCS_SET_TEAR_ON		= 0x35,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SET_TEAR_SCANLINE	include/mipi_display.h	/^	MIPI_DCS_SET_TEAR_SCANLINE	= 0x44,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_SOFT_RESET	include/mipi_display.h	/^	MIPI_DCS_SOFT_RESET		= 0x01,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_WRITE_LUT	include/mipi_display.h	/^	MIPI_DCS_WRITE_LUT		= 0x2D,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_WRITE_MEMORY_CONTINUE	include/mipi_display.h	/^	MIPI_DCS_WRITE_MEMORY_CONTINUE	= 0x3C,$/;"	e	enum:__anon21c8cdb20303
MIPI_DCS_WRITE_MEMORY_START	include/mipi_display.h	/^	MIPI_DCS_WRITE_MEMORY_START	= 0x2C,$/;"	e	enum:__anon21c8cdb20303
MIPI_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define MIPI_DEV	/;"	d
MIPI_DISPLAY_H	include/mipi_display.h	/^#define MIPI_DISPLAY_H$/;"	d
MIPI_DPHY_REF_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	MIPI_DPHY_REF_CLK_ROOT = 73,$/;"	e	enum:clk_root_index
MIPI_DPHY_REF_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
MIPI_DPHY_REF_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DPHY_REF_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
MIPI_DSI_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MIPI_DSI_BASE_ADDR /;"	d
MIPI_DSI_BLANKING_PACKET	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_BLANKING_PACKET			= 0x19,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_BLANKING_PACKET	include/mipi_display.h	/^	MIPI_DSI_BLANKING_PACKET			= 0x19,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_COLOR_MODE_OFF	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_COLOR_MODE_OFF				= 0x02,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_COLOR_MODE_OFF	include/mipi_display.h	/^	MIPI_DSI_COLOR_MODE_OFF				= 0x02,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_COLOR_MODE_ON	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_COLOR_MODE_ON				= 0x12,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_COLOR_MODE_ON	include/mipi_display.h	/^	MIPI_DSI_COLOR_MODE_ON				= 0x12,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_DCS_LONG_WRITE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_DCS_LONG_WRITE				= 0x39,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_DCS_LONG_WRITE	include/mipi_display.h	/^	MIPI_DSI_DCS_LONG_WRITE				= 0x39,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_DCS_READ	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_DCS_READ				= 0x06,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_DCS_READ	include/mipi_display.h	/^	MIPI_DSI_DCS_READ				= 0x06,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_DCS_SHORT_WRITE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_DCS_SHORT_WRITE	include/mipi_display.h	/^	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_DCS_SHORT_WRITE_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_DCS_SHORT_WRITE_PARAM	include/mipi_display.h	/^	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_END_OF_TRANSMISSION	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_END_OF_TRANSMISSION	include/mipi_display.h	/^	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_EXTSER_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	MIPI_DSI_EXTSER_CLK_ROOT = 71,$/;"	e	enum:clk_root_index
MIPI_DSI_EXTSER_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_PFD0_196M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_PFD0_196M_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	/;"	d
MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define MIPI_DSI_EXTSER_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
MIPI_DSI_GENERIC_LONG_WRITE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_LONG_WRITE	include/mipi_display.h	/^	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM	include/mipi_display.h	/^	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM	include/mipi_display.h	/^	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM	include/mipi_display.h	/^	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM	include/mipi_display.h	/^	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM	include/mipi_display.h	/^	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM	include/mipi_display.h	/^	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_H_SYNC_END	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_H_SYNC_END				= 0x31,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_H_SYNC_END	include/mipi_display.h	/^	MIPI_DSI_H_SYNC_END				= 0x31,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_H_SYNC_START	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_H_SYNC_START				= 0x21,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_H_SYNC_START	include/mipi_display.h	/^	MIPI_DSI_H_SYNC_START				= 0x21,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MIPI_DSI_IPS_BASE_ADDR /;"	d
MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	include/mipi_display.h	/^	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_NULL_PACKET	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_NULL_PACKET				= 0x09,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_NULL_PACKET	include/mipi_display.h	/^	MIPI_DSI_NULL_PACKET				= 0x09,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_16	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_16	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_18	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_18	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_24	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_24	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_30	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_30	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_36	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_36	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24	include/mipi_display.h	/^	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_PIXEL_STREAM_3BYTE_18	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_PIXEL_STREAM_3BYTE_18	include/mipi_display.h	/^	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT	include/mipi_display.h	/^	MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT	= 0x02,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_DCS_LONG_READ_RESPONSE	include/mipi_display.h	/^	MIPI_DSI_RX_DCS_LONG_READ_RESPONSE		= 0x1c,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE	include/mipi_display.h	/^	MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE	= 0x21,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE	include/mipi_display.h	/^	MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE	= 0x22,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_END_OF_TRANSMISSION	include/mipi_display.h	/^	MIPI_DSI_RX_END_OF_TRANSMISSION			= 0x08,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE	include/mipi_display.h	/^	MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE		= 0x1a,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE	include/mipi_display.h	/^	MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE	= 0x11,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE	include/mipi_display.h	/^	MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE	= 0x12,$/;"	e	enum:__anon21c8cdb20203
MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE	include/mipi_display.h	/^	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_SHUTDOWN_PERIPHERAL	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_SHUTDOWN_PERIPHERAL	include/mipi_display.h	/^	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_TURN_ON_PERIPHERAL	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_TURN_ON_PERIPHERAL	include/mipi_display.h	/^	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_V_SYNC_END	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_V_SYNC_END				= 0x11,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_V_SYNC_END	include/mipi_display.h	/^	MIPI_DSI_V_SYNC_END				= 0x11,$/;"	e	enum:__anon21c8cdb20103
MIPI_DSI_V_SYNC_START	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	MIPI_DSI_V_SYNC_START				= 0x01,$/;"	e	enum:__anon1ad276e80103
MIPI_DSI_V_SYNC_START	include/mipi_display.h	/^	MIPI_DSI_V_SYNC_START				= 0x01,$/;"	e	enum:__anon21c8cdb20103
MIPI_HSC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MIPI_HSC_BASE_ADDR	/;"	d
MIPS	arch/Kconfig	/^config MIPS$/;"	c	choice:choice07312ef30104
MIPS architecture	arch/mips/Kconfig	/^menu "MIPS architecture"$/;"	m
MIPS64_R_INFO	arch/mips/cpu/start.S	/^#  define MIPS64_R_INFO(/;"	d	file:
MIPS_BOOT_CMDLINE_LEGACY	arch/mips/Kconfig	/^config MIPS_BOOT_CMDLINE_LEGACY$/;"	c	menu:MIPS architecture""OS boot interface
MIPS_BOOT_ENV_LEGACY	arch/mips/Kconfig	/^config MIPS_BOOT_ENV_LEGACY$/;"	c	menu:MIPS architecture""OS boot interface
MIPS_BOOT_FDT	arch/mips/Kconfig	/^config MIPS_BOOT_FDT$/;"	c	menu:MIPS architecture""OS boot interface
MIPS_CDMMBASE_ADDR_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CDMMBASE_ADDR_SHIFT /;"	d
MIPS_CDMMBASE_ADDR_START	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CDMMBASE_ADDR_START /;"	d
MIPS_CDMMBASE_CI	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CDMMBASE_CI	/;"	d
MIPS_CDMMBASE_EN	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CDMMBASE_EN	/;"	d
MIPS_CDMMBASE_SIZE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CDMMBASE_SIZE	/;"	d
MIPS_CDMMBASE_SIZE_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CDMMBASE_SIZE_SHIFT /;"	d
MIPS_CM	arch/mips/Kconfig	/^config MIPS_CM$/;"	c	menu:MIPS architecture
MIPS_CMGCRB_BASE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CMGCRB_BASE	/;"	d
MIPS_CMGCRF_BASE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CMGCRF_BASE	/;"	d
MIPS_CM_BASE	arch/mips/Kconfig	/^config MIPS_CM_BASE$/;"	c	menu:MIPS architecture
MIPS_CONF1_C2	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_C2	/;"	d
MIPS_CONF1_CA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_CA	/;"	d
MIPS_CONF1_DA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DA	/;"	d
MIPS_CONF1_DA_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DA_SHF	/;"	d
MIPS_CONF1_DA_SZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DA_SZ	/;"	d
MIPS_CONF1_DL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DL	/;"	d
MIPS_CONF1_DL_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DL_SHF	/;"	d
MIPS_CONF1_DL_SZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DL_SZ	/;"	d
MIPS_CONF1_DS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DS	/;"	d
MIPS_CONF1_DS_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DS_SHF	/;"	d
MIPS_CONF1_DS_SZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_DS_SZ	/;"	d
MIPS_CONF1_EP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_EP	/;"	d
MIPS_CONF1_FP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_FP	/;"	d
MIPS_CONF1_IA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IA	/;"	d
MIPS_CONF1_IA_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IA_SHF	/;"	d
MIPS_CONF1_IA_SZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IA_SZ	/;"	d
MIPS_CONF1_IL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IL	/;"	d
MIPS_CONF1_IL_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IL_SHF	/;"	d
MIPS_CONF1_IL_SZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IL_SZ	/;"	d
MIPS_CONF1_IS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IS	/;"	d
MIPS_CONF1_IS_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IS_SHF	/;"	d
MIPS_CONF1_IS_SZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_IS_SZ	/;"	d
MIPS_CONF1_MD	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_MD	/;"	d
MIPS_CONF1_PC	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_PC	/;"	d
MIPS_CONF1_TLBS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_TLBS /;"	d
MIPS_CONF1_TLBS_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_TLBS_SHIFT /;"	d
MIPS_CONF1_TLBS_SIZE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_TLBS_SIZE /;"	d
MIPS_CONF1_WR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF1_WR	/;"	d
MIPS_CONF2_L2B	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_L2B	/;"	d
MIPS_CONF2_SA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SA	/;"	d
MIPS_CONF2_SA_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SA_SHF	/;"	d
MIPS_CONF2_SL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SL	/;"	d
MIPS_CONF2_SL_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SL_SHF	/;"	d
MIPS_CONF2_SS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SS	/;"	d
MIPS_CONF2_SS_SHF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SS_SHF	/;"	d
MIPS_CONF2_SU	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_SU	/;"	d
MIPS_CONF2_TA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_TA	/;"	d
MIPS_CONF2_TL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_TL	/;"	d
MIPS_CONF2_TS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_TS	/;"	d
MIPS_CONF2_TU	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF2_TU	/;"	d
MIPS_CONF3_BI	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_BI	/;"	d
MIPS_CONF3_BP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_BP	/;"	d
MIPS_CONF3_BPG	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_BPG	/;"	d
MIPS_CONF3_CDMM	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_CDMM	/;"	d
MIPS_CONF3_CMGCR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_CMGCR	/;"	d
MIPS_CONF3_CTXTC	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_CTXTC	/;"	d
MIPS_CONF3_DSP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_DSP	/;"	d
MIPS_CONF3_DSP2P	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_DSP2P	/;"	d
MIPS_CONF3_IPLW	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_IPLW	/;"	d
MIPS_CONF3_ISA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_ISA	/;"	d
MIPS_CONF3_ISA_OE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_ISA_OE	/;"	d
MIPS_CONF3_ITL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_ITL	/;"	d
MIPS_CONF3_LPA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_LPA	/;"	d
MIPS_CONF3_MCU	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_MCU	/;"	d
MIPS_CONF3_MMAR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_MMAR	/;"	d
MIPS_CONF3_MSA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_MSA	/;"	d
MIPS_CONF3_MT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_MT	/;"	d
MIPS_CONF3_PW	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_PW	/;"	d
MIPS_CONF3_RXI	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_RXI	/;"	d
MIPS_CONF3_SC	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_SC	/;"	d
MIPS_CONF3_SM	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_SM	/;"	d
MIPS_CONF3_SP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_SP	/;"	d
MIPS_CONF3_TL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_TL	/;"	d
MIPS_CONF3_ULRI	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_ULRI	/;"	d
MIPS_CONF3_VEIC	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_VEIC	/;"	d
MIPS_CONF3_VINT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_VINT	/;"	d
MIPS_CONF3_VZ	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF3_VZ	/;"	d
MIPS_CONF4_AE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_AE	/;"	d
MIPS_CONF4_FTLBPAGESIZE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_FTLBPAGESIZE /;"	d
MIPS_CONF4_FTLBPAGESIZE_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_FTLBPAGESIZE_SHIFT	/;"	d
MIPS_CONF4_FTLBSETS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_FTLBSETS	/;"	d
MIPS_CONF4_FTLBSETS_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_FTLBSETS_SHIFT	/;"	d
MIPS_CONF4_FTLBWAYS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_FTLBWAYS	/;"	d
MIPS_CONF4_FTLBWAYS_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_FTLBWAYS_SHIFT	/;"	d
MIPS_CONF4_IE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_IE	/;"	d
MIPS_CONF4_KSCREXIST	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_KSCREXIST	/;"	d
MIPS_CONF4_MMUEXTDEF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_MMUEXTDEF	/;"	d
MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT	/;"	d
MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT /;"	d
MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT	/;"	d
MIPS_CONF4_MMUSIZEEXT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_MMUSIZEEXT	/;"	d
MIPS_CONF4_MMUSIZEEXT_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_MMUSIZEEXT_SHIFT	/;"	d
MIPS_CONF4_TLBINV	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_TLBINV	/;"	d
MIPS_CONF4_VFTLBPAGESIZE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_VFTLBPAGESIZE /;"	d
MIPS_CONF4_VTLBSIZEEXT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_VTLBSIZEEXT	/;"	d
MIPS_CONF4_VTLBSIZEEXT_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF4_VTLBSIZEEXT_SHIFT	/;"	d
MIPS_CONF5_CV	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_CV	/;"	d
MIPS_CONF5_EVA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_EVA	/;"	d
MIPS_CONF5_FRE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_FRE	/;"	d
MIPS_CONF5_K	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_K	/;"	d
MIPS_CONF5_L2C	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_L2C	/;"	d
MIPS_CONF5_LLB	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_LLB	/;"	d
MIPS_CONF5_MRP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_MRP	/;"	d
MIPS_CONF5_MSAEN	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_MSAEN	/;"	d
MIPS_CONF5_MVH	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_MVH	/;"	d
MIPS_CONF5_NF	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_NF	/;"	d
MIPS_CONF5_UFE	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_UFE	/;"	d
MIPS_CONF5_UFR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_UFR	/;"	d
MIPS_CONF5_VP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF5_VP	/;"	d
MIPS_CONF6_FTLBEN	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF6_FTLBEN	/;"	d
MIPS_CONF6_FTLBP_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF6_FTLBP_SHIFT	/;"	d
MIPS_CONF6_SYND	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF6_SYND	/;"	d
MIPS_CONF7_AR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF7_AR	/;"	d
MIPS_CONF7_FTLBP_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF7_FTLBP_SHIFT	/;"	d
MIPS_CONF7_IAR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF7_IAR	/;"	d
MIPS_CONF7_RPS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF7_RPS	/;"	d
MIPS_CONF7_WII	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF7_WII	/;"	d
MIPS_CONF_AR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_AR	/;"	d
MIPS_CONF_AT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_AT	/;"	d
MIPS_CONF_IMPL	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_IMPL	/;"	d
MIPS_CONF_M	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_M	/;"	d
MIPS_CONF_MT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_MT	/;"	d
MIPS_CONF_MT_FTLB	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_MT_FTLB	/;"	d
MIPS_CONF_MT_TLB	arch/mips/include/asm/mipsregs.h	/^#define MIPS_CONF_MT_TLB	/;"	d
MIPS_ENTRYHI_EHINV	arch/mips/include/asm/mipsregs.h	/^#define MIPS_ENTRYHI_EHINV	/;"	d
MIPS_ENTRYLO_PFN_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_ENTRYLO_PFN_SHIFT	/;"	d
MIPS_ENTRYLO_RI	arch/mips/include/asm/mipsregs.h	/^#define MIPS_ENTRYLO_RI	/;"	d
MIPS_ENTRYLO_XI	arch/mips/include/asm/mipsregs.h	/^#define MIPS_ENTRYLO_XI	/;"	d
MIPS_FCCR_COND0	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND0	/;"	d
MIPS_FCCR_COND0_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND0_S	/;"	d
MIPS_FCCR_COND1	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND1	/;"	d
MIPS_FCCR_COND1_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND1_S	/;"	d
MIPS_FCCR_COND2	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND2	/;"	d
MIPS_FCCR_COND2_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND2_S	/;"	d
MIPS_FCCR_COND3	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND3	/;"	d
MIPS_FCCR_COND3_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND3_S	/;"	d
MIPS_FCCR_COND4	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND4	/;"	d
MIPS_FCCR_COND4_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND4_S	/;"	d
MIPS_FCCR_COND5	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND5	/;"	d
MIPS_FCCR_COND5_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND5_S	/;"	d
MIPS_FCCR_COND6	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND6	/;"	d
MIPS_FCCR_COND6_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND6_S	/;"	d
MIPS_FCCR_COND7	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND7	/;"	d
MIPS_FCCR_COND7_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_COND7_S	/;"	d
MIPS_FCCR_CONDX	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_CONDX	/;"	d
MIPS_FCCR_CONDX_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FCCR_CONDX_S	/;"	d
MIPS_FENR_FS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FENR_FS	/;"	d
MIPS_FENR_FS_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FENR_FS_S	/;"	d
MIPS_FPIR_3D	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_3D	/;"	d
MIPS_FPIR_D	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_D	/;"	d
MIPS_FPIR_F64	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_F64	/;"	d
MIPS_FPIR_FREP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_FREP	/;"	d
MIPS_FPIR_HAS2008	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_HAS2008	/;"	d
MIPS_FPIR_L	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_L	/;"	d
MIPS_FPIR_PS	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_PS	/;"	d
MIPS_FPIR_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_S	/;"	d
MIPS_FPIR_UFRP	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_UFRP	/;"	d
MIPS_FPIR_W	arch/mips/include/asm/mipsregs.h	/^#define MIPS_FPIR_W	/;"	d
MIPS_L1_CACHE_SHIFT	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT$/;"	c	menu:MIPS architecture
MIPS_L1_CACHE_SHIFT_4	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_4$/;"	c	menu:MIPS architecture
MIPS_L1_CACHE_SHIFT_5	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_5$/;"	c	menu:MIPS architecture
MIPS_L1_CACHE_SHIFT_6	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_6$/;"	c	menu:MIPS architecture
MIPS_L1_CACHE_SHIFT_7	arch/mips/Kconfig	/^config MIPS_L1_CACHE_SHIFT_7$/;"	c	menu:MIPS architecture
MIPS_L2_CACHE	arch/mips/Kconfig	/^config MIPS_L2_CACHE$/;"	c	menu:MIPS architecture
MIPS_MAAR_ADDR	arch/mips/include/asm/mipsregs.h	/^#define MIPS_MAAR_ADDR	/;"	d
MIPS_MAAR_ADDR_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_MAAR_ADDR_SHIFT	/;"	d
MIPS_MAAR_S	arch/mips/include/asm/mipsregs.h	/^#define MIPS_MAAR_S	/;"	d
MIPS_MAAR_V	arch/mips/include/asm/mipsregs.h	/^#define MIPS_MAAR_V	/;"	d
MIPS_PWCTL_DPH_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_DPH_MASK	/;"	d
MIPS_PWCTL_DPH_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_DPH_SHIFT	/;"	d
MIPS_PWCTL_HUGEPG_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_HUGEPG_MASK	/;"	d
MIPS_PWCTL_HUGEPG_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_HUGEPG_SHIFT	/;"	d
MIPS_PWCTL_PSN_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_PSN_MASK	/;"	d
MIPS_PWCTL_PSN_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_PSN_SHIFT	/;"	d
MIPS_PWCTL_PWEN_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_PWEN_MASK	/;"	d
MIPS_PWCTL_PWEN_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWCTL_PWEN_SHIFT	/;"	d
MIPS_PWFIELD_GDI_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_GDI_MASK	/;"	d
MIPS_PWFIELD_GDI_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_GDI_SHIFT	/;"	d
MIPS_PWFIELD_MDI_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_MDI_MASK	/;"	d
MIPS_PWFIELD_MDI_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_MDI_SHIFT	/;"	d
MIPS_PWFIELD_PTEI_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_PTEI_MASK	/;"	d
MIPS_PWFIELD_PTEI_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_PTEI_SHIFT	/;"	d
MIPS_PWFIELD_PTI_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_PTI_MASK	/;"	d
MIPS_PWFIELD_PTI_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_PTI_SHIFT	/;"	d
MIPS_PWFIELD_UDI_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_UDI_MASK	/;"	d
MIPS_PWFIELD_UDI_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWFIELD_UDI_SHIFT	/;"	d
MIPS_PWSIZE_GDW_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_GDW_MASK	/;"	d
MIPS_PWSIZE_GDW_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_GDW_SHIFT	/;"	d
MIPS_PWSIZE_MDW_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_MDW_MASK	/;"	d
MIPS_PWSIZE_MDW_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_MDW_SHIFT	/;"	d
MIPS_PWSIZE_PTEW_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_PTEW_MASK	/;"	d
MIPS_PWSIZE_PTEW_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_PTEW_SHIFT	/;"	d
MIPS_PWSIZE_PTW_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_PTW_MASK	/;"	d
MIPS_PWSIZE_PTW_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_PTW_SHIFT	/;"	d
MIPS_PWSIZE_UDW_MASK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_UDW_MASK	/;"	d
MIPS_PWSIZE_UDW_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_PWSIZE_UDW_SHIFT	/;"	d
MIPS_RELOC	arch/mips/cpu/start.S	/^# define MIPS_RELOC	/;"	d	file:
MIPS_SEGCFG_AM	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_AM	/;"	d
MIPS_SEGCFG_AM_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_AM_SHIFT	/;"	d
MIPS_SEGCFG_C	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_C	/;"	d
MIPS_SEGCFG_C_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_C_SHIFT	/;"	d
MIPS_SEGCFG_EU	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_EU	/;"	d
MIPS_SEGCFG_EU_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_EU_SHIFT	/;"	d
MIPS_SEGCFG_MK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_MK	/;"	d
MIPS_SEGCFG_MSK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_MSK	/;"	d
MIPS_SEGCFG_MUSK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_MUSK	/;"	d
MIPS_SEGCFG_MUSUK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_MUSUK	/;"	d
MIPS_SEGCFG_PA	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_PA	/;"	d
MIPS_SEGCFG_PA_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_PA_SHIFT	/;"	d
MIPS_SEGCFG_UK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_UK	/;"	d
MIPS_SEGCFG_USK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_USK	/;"	d
MIPS_SEGCFG_UUSK	arch/mips/include/asm/mipsregs.h	/^#define MIPS_SEGCFG_UUSK	/;"	d
MIPS_TUNE_14KC	arch/mips/Kconfig	/^config MIPS_TUNE_14KC$/;"	c	menu:MIPS architecture
MIPS_TUNE_24KC	arch/mips/Kconfig	/^config MIPS_TUNE_24KC$/;"	c	menu:MIPS architecture
MIPS_TUNE_34KC	arch/mips/Kconfig	/^config MIPS_TUNE_34KC$/;"	c	menu:MIPS architecture
MIPS_TUNE_4KC	arch/mips/Kconfig	/^config MIPS_TUNE_4KC$/;"	c	menu:MIPS architecture
MIPS_TUNE_74KC	arch/mips/Kconfig	/^config MIPS_TUNE_74KC$/;"	c	menu:MIPS architecture
MIR_REG	drivers/net/smc91111.h	/^#define	MIR_REG	/;"	d
MISC	drivers/misc/Kconfig	/^config MISC$/;"	c	menu:Multifunction device drivers
MISC	drivers/net/ax88180.h	/^#define MISC	/;"	d
MISC	include/faraday/ftpmu010.h	/^	unsigned int	MISC;		\/* 0x2C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
MISC0_REFTOP_SELBIASOFF	drivers/thermal/imx_thermal.c	/^#define MISC0_REFTOP_SELBIASOFF	/;"	d	file:
MISC1	include/twl6030.h	/^#define MISC1	/;"	d
MISCR_ASST	include/usb/fotg210.h	/^#define MISCR_ASST(/;"	d
MISCR_EOF1	include/usb/fotg210.h	/^#define MISCR_EOF1(/;"	d
MISCR_EOF2	include/usb/fotg210.h	/^#define MISCR_EOF2(/;"	d
MISCR_SUSPEND	include/usb/fotg210.h	/^#define MISCR_SUSPEND /;"	d
MISC_CTL1_ARM_PLL_EN	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define MISC_CTL1_ARM_PLL_EN	/;"	d
MISC_CTL_AURORA_SEL	board/freescale/t104xrdb/cpld.h	/^#define MISC_CTL_AURORA_SEL	/;"	d
MISC_CTL_SG_SEL	board/freescale/t104xrdb/cpld.h	/^#define MISC_CTL_SG_SEL	/;"	d
MISC_ETHENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_ETHENB	/;"	d
MISC_FSMCENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_FSMCENB	/;"	d
MISC_GPIO4ENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_GPIO4ENB	/;"	d
MISC_GPT2ENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_GPT2ENB	/;"	d
MISC_GPT3ENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_GPT3ENB	/;"	d
MISC_GPT3SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_GPT3SYNTH	/;"	d
MISC_GPT4SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_GPT4SYNTH	/;"	d
MISC_I2CENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_I2CENB	/;"	d
MISC_INT_DMA	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_DMA	/;"	d
MISC_INT_ERROR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_ERROR	/;"	d
MISC_INT_ETHSW	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_ETHSW	/;"	d
MISC_INT_GPIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_GPIO	/;"	d
MISC_INT_MIPS_SI_TIMERINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_MIPS_SI_TIMERINT_MASK	/;"	d
MISC_INT_OHCI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_OHCI	/;"	d
MISC_INT_PERFC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_PERFC	/;"	d
MISC_INT_TIMER	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_TIMER	/;"	d
MISC_INT_TIMER2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_TIMER2	/;"	d
MISC_INT_TIMER3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_TIMER3	/;"	d
MISC_INT_TIMER4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_TIMER4	/;"	d
MISC_INT_UART	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_UART	/;"	d
MISC_INT_WDOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define MISC_INT_WDOG	/;"	d
MISC_MUX_QE_TDM	board/freescale/t104xrdb/cpld.h	/^#define MISC_MUX_QE_TDM	/;"	d
MISC_NANDDIS	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_NANDDIS	/;"	d
MISC_NORMAL	drivers/net/ax88180.h	/^  #define MISC_NORMAL	/;"	d
MISC_PRSC_CFG	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_CFG	/;"	d
MISC_PRSC_M_124	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_M_124	/;"	d
MISC_PRSC_M_2593	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_M_2593	/;"	d
MISC_PRSC_M_399	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_M_399	/;"	d
MISC_PRSC_M_9	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_M_9	/;"	d
MISC_PRSC_N_1	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_N_1	/;"	d
MISC_PRSC_N_4	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_N_4	/;"	d
MISC_PRSC_N_6	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_PRSC_N_6	/;"	d
MISC_PWR_MGMT_EIST_HW_DIS	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  MISC_PWR_MGMT_EIST_HW_DIS	/;"	d
MISC_PWR_MGMT_EIST_HW_DIS	arch/x86/include/asm/msr-index.h	/^#define  MISC_PWR_MGMT_EIST_HW_DIS	/;"	d
MISC_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MISC_REG	/;"	d
MISC_REG	board/mpl/vcma9/lowlevel_init.S	/^#define MISC_REG	/;"	d	file:
MISC_REG0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define MISC_REG0_ADDR(/;"	d
MISC_REG1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define MISC_REG1_ADDR(/;"	d
MISC_REGS_OFFSET	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define MISC_REGS_OFFSET	/;"	d
MISC_RESET_MAC	drivers/net/ax88180.h	/^  #define MISC_RESET_MAC	/;"	d
MISC_RESET_MAC_PHY	drivers/net/ax88180.h	/^  #define MISC_RESET_MAC_PHY	/;"	d
MISC_RESET_PHY	drivers/net/ax88180.h	/^  #define MISC_RESET_PHY	/;"	d
MISC_SMIENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_SMIENB	/;"	d
MISC_SOCCFG30	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_SOCCFG30 /;"	d
MISC_SOCCFG31	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_SOCCFG31 /;"	d
MISC_SOCCFGMSK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_SOCCFGMSK /;"	d
MISC_SSP2ENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_SSP2ENB	/;"	d
MISC_UART0ENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_UART0ENB	/;"	d
MISC_USBDENB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define MISC_USBDENB	/;"	d
MISO	board/renesas/stout/cpld.c	/^#define MISO	/;"	d	file:
MISO_IO1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MISO_IO1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MISO_IO1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,$/;"	e	enum:__anona307879b0103	file:
MISO_MPP11	arch/arm/include/asm/arch-mvebu/spi.h	/^#define MISO_MPP11	/;"	d
MISR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MISR	/;"	d
MISR_FIFOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MISR_FIFOE	/;"	d
MIT_CTO	arch/arm/include/asm/omap_mmc.h	/^#define MIT_CTO	/;"	d
MI_AP	arch/powerpc/include/asm/mmu.h	/^#define MI_AP	/;"	d
MI_APG	arch/powerpc/include/asm/mmu.h	/^#define MI_APG	/;"	d
MI_ASIDMASK	arch/powerpc/include/asm/mmu.h	/^#define MI_ASIDMASK	/;"	d
MI_BOOTINIT	arch/powerpc/include/asm/mmu.h	/^#define MI_BOOTINIT	/;"	d
MI_CIDEF	arch/powerpc/include/asm/mmu.h	/^#define MI_CIDEF	/;"	d
MI_CTR	arch/powerpc/include/asm/mmu.h	/^#define MI_CTR	/;"	d
MI_EPN	arch/powerpc/include/asm/mmu.h	/^#define MI_EPN	/;"	d
MI_EPNMASK	arch/powerpc/include/asm/mmu.h	/^#define MI_EPNMASK	/;"	d
MI_EVALID	arch/powerpc/include/asm/mmu.h	/^#define MI_EVALID	/;"	d
MI_GPM	arch/powerpc/include/asm/mmu.h	/^#define MI_GPM	/;"	d
MI_GUARDED	arch/powerpc/include/asm/mmu.h	/^#define MI_GUARDED	/;"	d
MI_IDXMASK	arch/powerpc/include/asm/mmu.h	/^#define MI_IDXMASK	/;"	d
MI_Kp	arch/powerpc/include/asm/mmu.h	/^#define MI_Kp	/;"	d
MI_Ks	arch/powerpc/include/asm/mmu.h	/^#define MI_Ks	/;"	d
MI_PPCS	arch/powerpc/include/asm/mmu.h	/^#define MI_PPCS	/;"	d
MI_PPM	arch/powerpc/include/asm/mmu.h	/^#define MI_PPM	/;"	d
MI_PS4K_16K	arch/powerpc/include/asm/mmu.h	/^#define MI_PS4K_16K	/;"	d
MI_PS512K	arch/powerpc/include/asm/mmu.h	/^#define MI_PS512K	/;"	d
MI_PS8MEG	arch/powerpc/include/asm/mmu.h	/^#define MI_PS8MEG	/;"	d
MI_PSMASK	arch/powerpc/include/asm/mmu.h	/^#define MI_PSMASK	/;"	d
MI_RESETVAL	arch/powerpc/include/asm/mmu.h	/^#define MI_RESETVAL	/;"	d
MI_RPN	arch/powerpc/include/asm/mmu.h	/^#define MI_RPN	/;"	d
MI_RSV4I	arch/powerpc/include/asm/mmu.h	/^#define MI_RSV4I	/;"	d
MI_SVALID	arch/powerpc/include/asm/mmu.h	/^#define MI_SVALID	/;"	d
MI_TWC	arch/powerpc/include/asm/mmu.h	/^#define MI_TWC	/;"	d
MKDEV	include/linux/compat.h	/^#define MKDEV(/;"	d
MKHI_END_OF_POST	arch/x86/include/asm/me_common.h	/^#define MKHI_END_OF_POST	/;"	d
MKHI_END_OF_POST_NOACK	arch/x86/include/asm/me_common.h	/^#define MKHI_END_OF_POST_NOACK	/;"	d
MKHI_FEATURE_OVERRIDE	arch/x86/include/asm/me_common.h	/^#define MKHI_FEATURE_OVERRIDE	/;"	d
MKHI_FWCAPS_GET_RULE	arch/x86/include/asm/me_common.h	/^#define MKHI_FWCAPS_GET_RULE	/;"	d
MKHI_GET_FW_VERSION	arch/x86/include/asm/me_common.h	/^#define MKHI_GET_FW_VERSION	/;"	d
MKHI_GLOBAL_RESET	arch/x86/include/asm/me_common.h	/^#define MKHI_GLOBAL_RESET	/;"	d
MKHI_GROUP_ID_CBM	arch/x86/include/asm/me_common.h	/^#define MKHI_GROUP_ID_CBM	/;"	d
MKHI_GROUP_ID_FWCAPS	arch/x86/include/asm/me_common.h	/^#define MKHI_GROUP_ID_FWCAPS	/;"	d
MKHI_GROUP_ID_GEN	arch/x86/include/asm/me_common.h	/^#define MKHI_GROUP_ID_GEN	/;"	d
MKHI_GROUP_ID_HMRFPO	arch/x86/include/asm/me_common.h	/^#define MKHI_GROUP_ID_HMRFPO	/;"	d
MKHI_GROUP_ID_MDES	arch/x86/include/asm/me_common.h	/^#define MKHI_GROUP_ID_MDES	/;"	d
MKHI_HMRFPO_LOCK	arch/x86/include/asm/me_common.h	/^#define MKHI_HMRFPO_LOCK	/;"	d
MKHI_HMRFPO_LOCK_NOACK	arch/x86/include/asm/me_common.h	/^#define MKHI_HMRFPO_LOCK_NOACK	/;"	d
MKHI_MDES_ENABLE	arch/x86/include/asm/me_common.h	/^#define MKHI_MDES_ENABLE	/;"	d
MKIMAGE	doc/mkimage.1	/^.TH MKIMAGE 1 "2010-05-16"$/;"	t
MKIMAGEFLAGS_MLO	arch/arm/mach-keystone/config.mk	/^MKIMAGEFLAGS_MLO = -A $(ARCH) -T gpimage -C none \\$/;"	m
MKIMAGEFLAGS_SPL	arch/arm/imx-common/Makefile	/^MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \\$/;"	m
MKIMAGEFLAGS_lpc32xx-spl.img	Makefile	/^MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE)$/;"	m
MKIMAGEFLAGS_u-boot-dtb.img	Makefile	/^MKIMAGEFLAGS_u-boot-dtb.img = $(MKIMAGEFLAGS_u-boot.img)$/;"	m
MKIMAGEFLAGS_u-boot-dtb.imx	arch/arm/imx-common/Makefile	/^MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \\$/;"	m
MKIMAGEFLAGS_u-boot-signed.sb	arch/arm/cpu/arm926ejs/mxs/Makefile	/^MKIMAGEFLAGS_u-boot-signed.sb = -n $< -T mxsimage$/;"	m
MKIMAGEFLAGS_u-boot-spl.ais	Makefile	/^MKIMAGEFLAGS_u-boot-spl.ais = -s -n $(if $(CONFIG_AIS_CONFIG_FILE), \\$/;"	m
MKIMAGEFLAGS_u-boot-spl.gph	arch/arm/mach-keystone/config.mk	/^MKIMAGEFLAGS_u-boot-spl.gph = -A $(ARCH) -T gpimage -C none \\$/;"	m
MKIMAGEFLAGS_u-boot-spl.img	Makefile	/^MKIMAGEFLAGS_u-boot-spl.img = -A $(ARCH) -T firmware -C none \\$/;"	m
MKIMAGEFLAGS_u-boot-spl.kwb	Makefile	/^MKIMAGEFLAGS_u-boot-spl.kwb = -n $(srctree)\/$(CONFIG_SYS_KWD_CONFIG:"%"=%) \\$/;"	m
MKIMAGEFLAGS_u-boot-spl.pbl	Makefile	/^MKIMAGEFLAGS_u-boot-spl.pbl = -n $(srctree)\/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \\$/;"	m
MKIMAGEFLAGS_u-boot.img	Makefile	/^MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \\$/;"	m
MKIMAGEFLAGS_u-boot.img	Makefile	/^MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \\$/;"	m
MKIMAGEFLAGS_u-boot.imx	arch/arm/imx-common/Makefile	/^MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \\$/;"	m
MKIMAGEFLAGS_u-boot.kwb	Makefile	/^MKIMAGEFLAGS_u-boot.kwb = -n $(srctree)\/$(CONFIG_SYS_KWD_CONFIG:"%"=%) \\$/;"	m
MKIMAGEFLAGS_u-boot.pbl	Makefile	/^MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)\/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \\$/;"	m
MKIMAGEFLAGS_u-boot.sb	arch/arm/cpu/arm926ejs/mxs/Makefile	/^MKIMAGEFLAGS_u-boot.sb = -n $< -T mxsimage$/;"	m
MKIMAGEFLAGS_u-boot.ubl	Makefile	/^MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE)$/;"	m
MKIMAGEFLAGS_u-boot.uim	arch/arm/imx-common/Makefile	/^MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \\$/;"	m
MKIMAGEFLAGS_u-boot.vyb	arch/arm/cpu/armv7/vf610/Makefile	/^MKIMAGEFLAGS_u-boot.vyb = -T vybridimage$/;"	m
MKIMAGEFLAGS_u-boot_HS.img	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^MKIMAGEFLAGS_u-boot_HS.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \\$/;"	m
MKIMAGE_DEFAULT_DTC_OPTIONS	tools/mkimage.h	/^#define MKIMAGE_DEFAULT_DTC_OPTIONS	/;"	d
MKIMAGE_DTC	tools/mkimage.h	/^#define MKIMAGE_DTC	/;"	d
MKIMAGE_MAX_DTC_CMDLINE_LEN	tools/mkimage.h	/^#define MKIMAGE_MAX_DTC_CMDLINE_LEN	/;"	d
MKIMAGE_MAX_TMPFILE_LEN	tools/mkimage.h	/^#define MKIMAGE_MAX_TMPFILE_LEN	/;"	d
MKIMAGE_TARGET-$(CONFIG_MX23)	arch/arm/cpu/arm926ejs/mxs/Makefile	/^MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage.mx23.cfg$/;"	m
MKIMAGE_TARGET-$(CONFIG_MX28)	arch/arm/cpu/arm926ejs/mxs/Makefile	/^MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage.mx28.cfg$/;"	m
MKIMAGE_TMPFILE_SUFFIX	tools/mkimage.h	/^#define MKIMAGE_TMPFILE_SUFFIX	/;"	d
MKSTR	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^#define MKSTR(/;"	d	file:
MKSTR	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^#define MKSTR(/;"	d	file:
MK_BANKCON	board/mpl/vcma9/lowlevel_init.S	/^#define MK_BANKCON(/;"	d	file:
MK_BANKCON_SDRAM	board/mpl/vcma9/lowlevel_init.S	/^#define MK_BANKCON_SDRAM(/;"	d	file:
MK_BMSK_	arch/blackfin/include/asm/blackfin_local.h	/^#define MK_BMSK_(/;"	d
MK_BWSCON	board/mpl/vcma9/lowlevel_init.S	/^#define MK_BWSCON(/;"	d	file:
MK_CLK_CNTL	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define MK_CLK_CNTL(/;"	d	file:
MK_CLK_CNTL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_CLK_CNTL(/;"	d	file:
MK_DPLL2	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_DPLL2(/;"	d	file:
MK_PLL_CLK_CTRL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_PLL_CLK_CTRL(/;"	d	file:
MK_PLL_CONF	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define MK_PLL_CONF(/;"	d	file:
MK_PLL_CONF	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_PLL_CONF(/;"	d	file:
MK_PLL_CPU_CONF	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_PLL_CPU_CONF(/;"	d	file:
MK_PLL_CPU_DIT_FRAC	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_PLL_CPU_DIT_FRAC(/;"	d	file:
MK_PLL_DDR_CONF	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_PLL_DDR_CONF(/;"	d	file:
MK_PLL_DDR_DIT_FRAC	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define MK_PLL_DDR_DIT_FRAC(/;"	d	file:
MK_SDRAM_REFRESH	board/mpl/vcma9/lowlevel_init.S	/^#define MK_SDRAM_REFRESH(/;"	d	file:
MLB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MLB_BASE_ADDR /;"	d
MLB_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define MLB_BASE_ADDR	/;"	d
MLB_CK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MLB_CLK_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MLB_CLK_GMARK,$/;"	e	enum:__anona307945e0103	file:
MLB_CLK_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MLB_CLK_IMARK,$/;"	e	enum:__anona307945e0103	file:
MLB_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MLB_DAT_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MLB_DAT_GMARK,$/;"	e	enum:__anona307945e0103	file:
MLB_DAT_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MLB_DAT_IMARK,$/;"	e	enum:__anona307945e0103	file:
MLB_DAT_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,$/;"	e	enum:__anona3077f190103	file:
MLB_DAT_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MLB_SIG_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MLB_SIG_GMARK,$/;"	e	enum:__anona307945e0103	file:
MLB_SIG_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MLB_SIG_IMARK,$/;"	e	enum:__anona307945e0103	file:
MLB_SIG_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MLB_SIG_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MLC_NAND_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define MLC_NAND_BASE	/;"	d
MLDDCKPAT1R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDDCKPAT1R /;"	d
MLDDCKPAT2R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDDCKPAT2R /;"	d
MLDDFR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDDFR /;"	d
MLDHCNR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDHCNR /;"	d
MLDHPDR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDHPDR /;"	d
MLDHSYNR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDHSYNR /;"	d
MLDMLSR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDMLSR /;"	d
MLDMT1R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDMT1R /;"	d
MLDMT2R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDMT2R /;"	d
MLDMT3R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDMT3R /;"	d
MLDPMR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDPMR /;"	d
MLDSA1R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDSA1R /;"	d
MLDSA2R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDSA2R /;"	d
MLDSM1R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDSM1R /;"	d
MLDSM2R	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDSM2R /;"	d
MLDVLNR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDVLNR /;"	d
MLDVPDR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDVPDR /;"	d
MLDVSYNR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDVSYNR /;"	d
MLDWBAR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDWBAR /;"	d
MLDWBCNTR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDWBCNTR /;"	d
MLDWBFR	arch/sh/include/asm/cpu_sh7722.h	/^#define MLDWBFR /;"	d
MLO	arch/arm/mach-keystone/config.mk	/^MLO: u-boot-dtb.bin FORCE$/;"	t
MLSW_MASK	drivers/net/xilinx_ll_temac.h	/^#define MLSW_MASK	/;"	d
MLSW_POS	drivers/net/xilinx_ll_temac.h	/^#define MLSW_POS	/;"	d
ML_BITS	lib/lz4.c	/^#define ML_BITS /;"	d	file:
ML_MASK	lib/lz4.c	/^#define ML_MASK /;"	d	file:
MM	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	MM	\/* Directly Accessed MMIO Register *\/$/;"	e	enum:REGISTER_TYPE	file:
MM	include/ppc_defs.h	/^#define	MM	/;"	d
MMAP_1WIRE	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_1WIRE	/;"	d
MMAP_ADC	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_ADC	/;"	d
MMAP_ADC	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_ADC	/;"	d
MMAP_ATA	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_ATA	/;"	d
MMAP_CAN	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_CAN	/;"	d
MMAP_CAN	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_CAN	/;"	d
MMAP_CAN	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_CAN	/;"	d
MMAP_CAN0	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_CAN0	/;"	d
MMAP_CAN0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_CAN0	/;"	d
MMAP_CAN0	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_CAN0	/;"	d
MMAP_CAN1	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_CAN1	/;"	d
MMAP_CAN1	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_CAN1	/;"	d
MMAP_CAN1	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_CAN1	/;"	d
MMAP_CAN1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_CAN1	/;"	d
MMAP_CAN1	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_CAN1	/;"	d
MMAP_CAN2	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_CAN2	/;"	d
MMAP_CAN2	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_CAN2	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_CCM	/;"	d
MMAP_CCM	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_CCM	/;"	d
MMAP_CFG	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_CFG	/;"	d
MMAP_CFMC	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_CFMC	/;"	d
MMAP_CFMMEM	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_CFMMEM	/;"	d
MMAP_CSM	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_CSM	/;"	d
MMAP_CTM	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_CTM	/;"	d
MMAP_DAC0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DAC0	/;"	d
MMAP_DAC1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DAC1	/;"	d
MMAP_DMA0	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DMA0	/;"	d
MMAP_DMA0	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DMA0	/;"	d
MMAP_DMA0	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_DMA0	/;"	d
MMAP_DMA0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DMA0	/;"	d
MMAP_DMA0	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DMA0	/;"	d
MMAP_DMA1	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DMA1	/;"	d
MMAP_DMA1	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DMA1	/;"	d
MMAP_DMA1	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DMA1	/;"	d
MMAP_DMA1	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DMA1	/;"	d
MMAP_DMA2	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DMA2	/;"	d
MMAP_DMA2	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DMA2	/;"	d
MMAP_DMA2	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DMA2	/;"	d
MMAP_DMA2	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DMA2	/;"	d
MMAP_DMA3	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DMA3	/;"	d
MMAP_DMA3	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DMA3	/;"	d
MMAP_DMA3	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DMA3	/;"	d
MMAP_DMA3	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DMA3	/;"	d
MMAP_DRAMC	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_DRAMC	/;"	d
MMAP_DSPI	arch/m68k/include/asm/immap.h	/^#define MMAP_DSPI	/;"	d
MMAP_DSPI	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_DSPI	/;"	d
MMAP_DSPI	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_DSPI	/;"	d
MMAP_DSPI	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_DSPI	/;"	d
MMAP_DSPI	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_DSPI	/;"	d
MMAP_DSPI	include/configs/ls1012aqds.h	/^#define MMAP_DSPI /;"	d
MMAP_DSPI0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DSPI0	/;"	d
MMAP_DSPI1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DSPI1	/;"	d
MMAP_DSPI2	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DSPI2	/;"	d
MMAP_DSPI3	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DSPI3	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR0	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_DTMR0	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR1	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_DTMR1	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR2	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_DTMR2	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_DTMR3	/;"	d
MMAP_DTMR3	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_DTMR3	/;"	d
MMAP_EDMA	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_EDMA	/;"	d
MMAP_EDMA	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_EDMA	/;"	d
MMAP_EDMA	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_EDMA	/;"	d
MMAP_EDMA	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_EDMA	/;"	d
MMAP_EDMA	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_EDMA	/;"	d
MMAP_EDMA	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_EDMA	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_EPORT	/;"	d
MMAP_EPORT0	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_EPORT0	/;"	d
MMAP_EPORT0	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_EPORT0	/;"	d
MMAP_EPORT0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_EPORT0	/;"	d
MMAP_EPORT1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_EPORT1	/;"	d
MMAP_ESDHC	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_ESDHC	/;"	d
MMAP_ESDHC	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_ESDHC	/;"	d
MMAP_ETPU	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_ETPU	/;"	d
MMAP_ETPU	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_ETPU	/;"	d
MMAP_EXTDMA	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_EXTDMA	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_FBCS	/;"	d
MMAP_FBCS	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_FBCS	/;"	d
MMAP_FEC	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_FEC	/;"	d
MMAP_FEC	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_FEC	/;"	d
MMAP_FEC	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_FEC	/;"	d
MMAP_FEC	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_FEC	/;"	d
MMAP_FEC	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_FEC	/;"	d
MMAP_FEC0	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_FEC0	/;"	d
MMAP_FEC0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_FEC0	/;"	d
MMAP_FEC0	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_FEC0	/;"	d
MMAP_FEC0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_FEC0	/;"	d
MMAP_FEC0	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_FEC0	/;"	d
MMAP_FEC0	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_FEC0	/;"	d
MMAP_FEC0FIFO	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_FEC0FIFO	/;"	d
MMAP_FEC1	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_FEC1	/;"	d
MMAP_FEC1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_FEC1	/;"	d
MMAP_FEC1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_FEC1	/;"	d
MMAP_FEC1	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_FEC1	/;"	d
MMAP_FEC1	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_FEC1	/;"	d
MMAP_FEC1FIFO	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_FEC1FIFO	/;"	d
MMAP_FECFIFO	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_FECFIFO	/;"	d
MMAP_FECFIFO	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_FECFIFO	/;"	d
MMAP_FECFIFO	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_FECFIFO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPIO	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_GPIO	/;"	d
MMAP_GPTMR	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_GPTMR	/;"	d
MMAP_GPTMRA	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_GPTMRA	/;"	d
MMAP_GPTMRB	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_GPTMRB	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_I2C	/;"	d
MMAP_I2C0	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_I2C0	/;"	d
MMAP_I2C0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_I2C0	/;"	d
MMAP_I2C1	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_I2C1	/;"	d
MMAP_I2C1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_I2C1	/;"	d
MMAP_I2C2	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_I2C2	/;"	d
MMAP_I2C3	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_I2C3	/;"	d
MMAP_I2C4	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_I2C4	/;"	d
MMAP_I2C5	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_I2C5	/;"	d
MMAP_IACK	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_IACK	/;"	d
MMAP_IACK	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_IACK	/;"	d
MMAP_IACK	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_IACK	/;"	d
MMAP_IIM	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_IIM	/;"	d
MMAP_INTC	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_INTC	/;"	d
MMAP_INTC	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_INTC	/;"	d
MMAP_INTC	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_INTC	/;"	d
MMAP_INTC	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_INTC	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC0	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_INTC0	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC1	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_INTC1	/;"	d
MMAP_INTC2	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_INTC2	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_INTCACK	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_INTCACK	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_INTCACK	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_INTCACK	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_INTCACK	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_INTCACK	/;"	d
MMAP_INTCACK	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_INTCACK	/;"	d
MMAP_L2_SW0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_L2_SW0	/;"	d
MMAP_L2_SW1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_L2_SW1	/;"	d
MMAP_LCD	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_LCD	/;"	d
MMAP_LCDC	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_LCDC	/;"	d
MMAP_LCD_BGLUT	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_LCD_BGLUT	/;"	d
MMAP_LCD_GWLUT	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_LCD_GWLUT	/;"	d
MMAP_MCDMA	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_MCDMA	/;"	d
MMAP_MDHA	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_MDHA	/;"	d
MMAP_MDHA	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_MDHA	/;"	d
MMAP_MDHA	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_MDHA	/;"	d
MMAP_MDHA	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_MDHA	/;"	d
MMAP_MPU	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_MPU	/;"	d
MMAP_NFC	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_NFC	/;"	d
MMAP_NFC_RAM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_NFC_RAM	/;"	d
MMAP_PAR	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_PAR	/;"	d
MMAP_PCI	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PCI	/;"	d
MMAP_PCI	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_PCI	/;"	d
MMAP_PCIARB	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PCIARB	/;"	d
MMAP_PCIARB	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_PCIARB	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT0	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PIT0	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT1	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PIT1	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT2	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PIT2	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_PIT3	/;"	d
MMAP_PIT3	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PIT3	/;"	d
MMAP_PLIC	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_PLIC	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_PLL	/;"	d
MMAP_PLL	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_PLL	/;"	d
MMAP_PM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_PM	/;"	d
MMAP_PWM	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_PWM	/;"	d
MMAP_PWM	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_PWM	/;"	d
MMAP_PWM	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_PWM	/;"	d
MMAP_PWM0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_PWM0	/;"	d
MMAP_QADC	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_QADC	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_QSPI	/;"	d
MMAP_QSPI	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_QSPI	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_RCM	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_RCM	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_RCM	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_RCM	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_RCM	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_RCM	/;"	d
MMAP_RCM	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_RCM	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_RNG	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_RNG	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_RNG	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_RNG	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_RNG	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_RNG	/;"	d
MMAP_RNG	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_RNG	/;"	d
MMAP_RRTC	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_RRTC	/;"	d
MMAP_RTC	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_RTC	/;"	d
MMAP_RTC	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_RTC	/;"	d
MMAP_RTC	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_RTC	/;"	d
MMAP_RTC	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_RTC	/;"	d
MMAP_SBF	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_SBF	/;"	d
MMAP_SCM	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_SCM	/;"	d
MMAP_SCM	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_SCM	/;"	d
MMAP_SCM	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_SCM	/;"	d
MMAP_SCM	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_SCM	/;"	d
MMAP_SCM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_SCM	/;"	d
MMAP_SCM1	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_SCM1	/;"	d
MMAP_SCM1	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_SCM1	/;"	d
MMAP_SCM1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_SCM1	/;"	d
MMAP_SCM1	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_SCM1	/;"	d
MMAP_SCM1	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_SCM1	/;"	d
MMAP_SCM2	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_SCM2	/;"	d
MMAP_SCM2	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_SCM2	/;"	d
MMAP_SCM2	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_SCM2	/;"	d
MMAP_SCM2	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_SCM2	/;"	d
MMAP_SCM2	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_SCM2	/;"	d
MMAP_SCM3	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_SCM3	/;"	d
MMAP_SCM3	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_SCM3	/;"	d
MMAP_SCPCI	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SCPCI	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAM	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SDRAM	/;"	d
MMAP_SDRAMC	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_SDRAMC	/;"	d
MMAP_SEC	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SEC	/;"	d
MMAP_SIM	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_SIM	/;"	d
MMAP_SIM	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_SIM	/;"	d
MMAP_SIM	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_SIM	/;"	d
MMAP_SIU	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SIU	/;"	d
MMAP_SKHA	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_SKHA	/;"	d
MMAP_SKHA	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_SKHA	/;"	d
MMAP_SKHA	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_SKHA	/;"	d
MMAP_SKHA	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_SKHA	/;"	d
MMAP_SLT0	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SLT0	/;"	d
MMAP_SLT1	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SLT1	/;"	d
MMAP_SRAM	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SRAM	/;"	d
MMAP_SRAMCFG	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_SRAMCFG	/;"	d
MMAP_SSI	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_SSI	/;"	d
MMAP_SSI	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_SSI	/;"	d
MMAP_SSI	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_SSI	/;"	d
MMAP_SSI	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_SSI	/;"	d
MMAP_SSI0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_SSI0	/;"	d
MMAP_SSI1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_SSI1	/;"	d
MMAP_START_ADDR_AM43x	drivers/spi/ti_qspi.c	/^#define MMAP_START_ADDR_AM43x	/;"	d	file:
MMAP_START_ADDR_DRA	drivers/spi/ti_qspi.c	/^#define MMAP_START_ADDR_DRA	/;"	d	file:
MMAP_TCD	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_TCD	/;"	d
MMAP_TMR0	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_TMR0	/;"	d
MMAP_TMR1	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_TMR1	/;"	d
MMAP_TMR2	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_TMR2	/;"	d
MMAP_TMR3	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_TMR3	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_UART0	/;"	d
MMAP_UART0	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_UART0	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5249.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5307.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_UART1	/;"	d
MMAP_UART1	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_UART1	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5253.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_UART2	/;"	d
MMAP_UART2	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_UART2	/;"	d
MMAP_UART3	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART3	/;"	d
MMAP_UART3	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_UART3	/;"	d
MMAP_UART4	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART4	/;"	d
MMAP_UART5	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART5	/;"	d
MMAP_UART6	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART6	/;"	d
MMAP_UART7	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART7	/;"	d
MMAP_UART8	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART8	/;"	d
MMAP_UART9	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_UART9	/;"	d
MMAP_USB	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_USB	/;"	d
MMAP_USB	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_USB	/;"	d
MMAP_USBCAPS	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_USBCAPS	/;"	d
MMAP_USBCAPS	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_USBCAPS	/;"	d
MMAP_USBD	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_USBD	/;"	d
MMAP_USBEHCI	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_USBEHCI	/;"	d
MMAP_USBEHCI	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_USBEHCI	/;"	d
MMAP_USBEHCI	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_USBEHCI	/;"	d
MMAP_USBH	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_USBH	/;"	d
MMAP_USBH	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_USBH	/;"	d
MMAP_USBHW	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_USBHW	/;"	d
MMAP_USBHW	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_USBHW	/;"	d
MMAP_USBOTG	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_USBOTG	/;"	d
MMAP_USBOTG	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_USBOTG	/;"	d
MMAP_USBOTG	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_USBOTG	/;"	d
MMAP_USBOTG	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_USBOTG	/;"	d
MMAP_USBOTG	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_USBOTG	/;"	d
MMAP_VOICOD	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_VOICOD	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_WDOG	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_5235.h	/^#define MMAP_WDOG	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_5271.h	/^#define MMAP_WDOG	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_5272.h	/^#define MMAP_WDOG	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_5275.h	/^#define MMAP_WDOG	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_5282.h	/^#define MMAP_WDOG	/;"	d
MMAP_WDOG	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_WDOG	/;"	d
MMAP_WTM	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_WTM	/;"	d
MMAP_XARB	arch/m68k/include/asm/immap_547x_8x.h	/^#define MMAP_XARB	/;"	d
MMAP_XBS	arch/m68k/include/asm/immap_520x.h	/^#define MMAP_XBS	/;"	d
MMAP_XBS	arch/m68k/include/asm/immap_5227x.h	/^#define MMAP_XBS	/;"	d
MMAP_XBS	arch/m68k/include/asm/immap_5301x.h	/^#define MMAP_XBS	/;"	d
MMAP_XBS	arch/m68k/include/asm/immap_5329.h	/^#define MMAP_XBS	/;"	d
MMAP_XBS	arch/m68k/include/asm/immap_5441x.h	/^#define MMAP_XBS	/;"	d
MMAP_XBS	arch/m68k/include/asm/immap_5445x.h	/^#define MMAP_XBS	/;"	d
MMARG_BRF0	arch/arm/mach-davinci/lowlevel_init.S	/^MMARG_BRF0:$/;"	l
MMARG_BRF0_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^MMARG_BRF0_VAL:$/;"	l
MMAX	arch/x86/cpu/quark/smc.h	/^#define MMAX(/;"	d
MMC	board/sunxi/Kconfig	/^config MMC$/;"	c
MMC	drivers/mmc/Kconfig	/^config MMC$/;"	c	menu:MMC Host controller Support
MMC Host controller Support	drivers/mmc/Kconfig	/^menu "MMC Host controller Support"$/;"	m
MMC0_BASE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC0_BASE	/;"	d
MMC0_CD_PIN	board/sunxi/Kconfig	/^config MMC0_CD_PIN$/;"	c
MMC0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_CLK_PORT66_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D6_PORT74_MARK,	MMC0_D7_PORT75_MARK,	MMC0_CLK_PORT66_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_CMD_PORT67_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_CMD_PORT67_MARK,	\/* MSEL4CR_15_0 *\/$/;"	e	enum:__anona304c1340103	file:
MMC0_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D0_PORT68_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D0_PORT68_MARK,	MMC0_D1_PORT69_MARK,	MMC0_D2_PORT70_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D1_PORT69_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D0_PORT68_MARK,	MMC0_D1_PORT69_MARK,	MMC0_D2_PORT70_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D2_PORT70_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D0_PORT68_MARK,	MMC0_D1_PORT69_MARK,	MMC0_D2_PORT70_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D3_PORT71_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D3_PORT71_MARK,	MMC0_D4_PORT72_MARK,	MMC0_D5_PORT73_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D4_PORT72_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D3_PORT71_MARK,	MMC0_D4_PORT72_MARK,	MMC0_D5_PORT73_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D5_PORT73_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D3_PORT71_MARK,	MMC0_D4_PORT72_MARK,	MMC0_D5_PORT73_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D6_PORT74_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D6_PORT74_MARK,	MMC0_D7_PORT75_MARK,	MMC0_CLK_PORT66_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC0_D7_PORT75_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC0_D6_PORT74_MARK,	MMC0_D7_PORT75_MARK,	MMC0_CLK_PORT66_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC0_DEFAULT_FREQ	drivers/mmc/hi6220_dw_mmc.c	/^#define MMC0_DEFAULT_FREQ	/;"	d	file:
MMC0_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_DIV_MASK		= 0x7f,$/;"	e	enum:__anon375ccd790103
MMC0_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_DIV_MASK		= 0x3f,$/;"	e	enum:__anon3783c4e20103
MMC0_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_DIV_SHIFT		= 0,$/;"	e	enum:__anon375ccd790103
MMC0_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_DIV_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20103
MMC0_MSTP315	board/renesas/alt/alt.c	/^#define MMC0_MSTP315	/;"	d	file:
MMC0_MSTP315	board/renesas/silk/silk.c	/^#define MMC0_MSTP315	/;"	d	file:
MMC0_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_PLL_MASK		= 3,$/;"	e	enum:__anon375ccd790103
MMC0_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_PLL_MASK		= 3,$/;"	e	enum:__anon3783c4e20103
MMC0_PLL_SELECT_24MHZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_PLL_SELECT_24MHZ,$/;"	e	enum:__anon3783c4e20103
MMC0_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_PLL_SELECT_CODEC	= 0,$/;"	e	enum:__anon3783c4e20103
MMC0_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20103
MMC0_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_PLL_SHIFT		= 8,$/;"	e	enum:__anon375ccd790103
MMC0_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	MMC0_PLL_SHIFT		= 6,$/;"	e	enum:__anon3783c4e20103
MMC0_PRE_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC0_PRE_RATIO	/;"	d
MMC0_PRE_RATIO	board/samsung/odroid/setup.h	/^#define MMC0_PRE_RATIO(/;"	d
MMC0_PRE_RATIO	board/samsung/trats/setup.h	/^#define MMC0_PRE_RATIO	/;"	d
MMC0_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC0_RATIO	/;"	d
MMC0_RATIO	board/samsung/odroid/setup.h	/^#define MMC0_RATIO(/;"	d
MMC0_RATIO	board/samsung/trats/setup.h	/^#define MMC0_RATIO	/;"	d
MMC0_SEL_24M	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_SEL_24M,$/;"	e	enum:__anon375ccd790103
MMC0_SEL_APLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_SEL_APLL		= 0,$/;"	e	enum:__anon375ccd790103
MMC0_SEL_DPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_SEL_DPLL,$/;"	e	enum:__anon375ccd790103
MMC0_SEL_GPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	MMC0_SEL_GPLL,$/;"	e	enum:__anon375ccd790103
MMC1_BASE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC1_BASE	/;"	d
MMC1_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	MMC1_BOOT,$/;"	e	enum:boot_device
MMC1_CD_PIN	board/sunxi/Kconfig	/^config MMC1_CD_PIN$/;"	c
MMC1_CLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_CLK	/;"	d
MMC1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_CLK_PORT103_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D6_PORT143_MARK,	MMC1_D7_PORT142_MARK,	MMC1_CLK_PORT103_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_CMD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_CMD	/;"	d
MMC1_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_CMD_PORT104_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_CMD_PORT104_MARK,	\/* MSEL4CR_15_1 *\/$/;"	e	enum:__anona304c1340103	file:
MMC1_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D0_PORT149_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D0_PORT149_MARK,	MMC1_D1_PORT148_MARK,	MMC1_D2_PORT147_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D1_PORT148_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D0_PORT149_MARK,	MMC1_D1_PORT148_MARK,	MMC1_D2_PORT147_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D2_PORT147_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D0_PORT149_MARK,	MMC1_D1_PORT148_MARK,	MMC1_D2_PORT147_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D3_PORT146_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D3_PORT146_MARK,	MMC1_D4_PORT145_MARK,	MMC1_D5_PORT144_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D4_PORT145_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D3_PORT146_MARK,	MMC1_D4_PORT145_MARK,	MMC1_D5_PORT144_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D5_PORT144_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D3_PORT146_MARK,	MMC1_D4_PORT145_MARK,	MMC1_D5_PORT144_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D6_PORT143_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D6_PORT143_MARK,	MMC1_D7_PORT142_MARK,	MMC1_CLK_PORT103_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
MMC1_D7_PORT142_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MMC1_D6_PORT143_MARK,	MMC1_D7_PORT142_MARK,	MMC1_CLK_PORT103_MARK,$/;"	e	enum:__anona304c1340103	file:
MMC1_DAT0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_DAT0	/;"	d
MMC1_DAT1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_DAT1	/;"	d
MMC1_DAT2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_DAT2	/;"	d
MMC1_DAT3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_DAT3	/;"	d
MMC1_MSTP305	board/renesas/lager/lager.c	/^#define MMC1_MSTP305 /;"	d	file:
MMC1_PBIASLITE_PWRDNZ	arch/arm/include/asm/arch-omap4/omap.h	/^#define MMC1_PBIASLITE_PWRDNZ	/;"	d
MMC1_PBIASLITE_VMODE	arch/arm/include/asm/arch-omap4/omap.h	/^#define MMC1_PBIASLITE_VMODE	/;"	d
MMC1_PINS	board/sunxi/Kconfig	/^config MMC1_PINS$/;"	c
MMC1_PRE_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC1_PRE_RATIO	/;"	d
MMC1_PRE_RATIO	board/samsung/odroid/setup.h	/^#define MMC1_PRE_RATIO(/;"	d
MMC1_PRE_RATIO	board/samsung/trats/setup.h	/^#define MMC1_PRE_RATIO	/;"	d
MMC1_PWRDNZ	arch/arm/include/asm/arch-omap4/omap.h	/^#define MMC1_PWRDNZ	/;"	d
MMC1_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC1_RATIO	/;"	d
MMC1_RATIO	board/samsung/odroid/setup.h	/^#define MMC1_RATIO(/;"	d
MMC1_RATIO	board/samsung/trats/setup.h	/^#define MMC1_RATIO	/;"	d
MMC1_SDCD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_SDCD	/;"	d
MMC1_SDWP	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC1_SDWP	/;"	d
MMC2_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	MMC2_BOOT,$/;"	e	enum:boot_device
MMC2_CD_PIN	board/sunxi/Kconfig	/^config MMC2_CD_PIN$/;"	c
MMC2_PINS	board/sunxi/Kconfig	/^config MMC2_PINS$/;"	c
MMC2_PRE_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC2_PRE_RATIO	/;"	d
MMC2_PRE_RATIO	board/samsung/odroid/setup.h	/^#define MMC2_PRE_RATIO(/;"	d
MMC2_PRE_RATIO	board/samsung/trats/setup.h	/^#define MMC2_PRE_RATIO	/;"	d
MMC2_PRE_RATIO_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC2_PRE_RATIO_MASK	/;"	d
MMC2_PRE_RATIO_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC2_PRE_RATIO_OFFSET	/;"	d
MMC2_PRE_RATIO_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC2_PRE_RATIO_VAL	/;"	d
MMC2_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC2_RATIO	/;"	d
MMC2_RATIO	board/samsung/odroid/setup.h	/^#define MMC2_RATIO(/;"	d
MMC2_RATIO	board/samsung/trats/setup.h	/^#define MMC2_RATIO	/;"	d
MMC2_RATIO_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC2_RATIO_MASK	/;"	d
MMC2_RATIO_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC2_RATIO_OFFSET	/;"	d
MMC2_RATIO_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC2_RATIO_VAL	/;"	d
MMC3_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	MMC3_BOOT,$/;"	e	enum:boot_device
MMC3_CD_PIN	board/sunxi/Kconfig	/^config MMC3_CD_PIN$/;"	c
MMC3_CLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_CLK	/;"	d
MMC3_CMD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_CMD	/;"	d
MMC3_DAT0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT0	/;"	d
MMC3_DAT1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT1	/;"	d
MMC3_DAT2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT2	/;"	d
MMC3_DAT3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT3	/;"	d
MMC3_DAT4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT4	/;"	d
MMC3_DAT5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT5	/;"	d
MMC3_DAT6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT6	/;"	d
MMC3_DAT7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MMC3_DAT7	/;"	d
MMC3_PINS	board/sunxi/Kconfig	/^config MMC3_PINS$/;"	c
MMC3_PRE_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC3_PRE_RATIO	/;"	d
MMC3_PRE_RATIO	board/samsung/odroid/setup.h	/^#define MMC3_PRE_RATIO(/;"	d
MMC3_PRE_RATIO	board/samsung/trats/setup.h	/^#define MMC3_PRE_RATIO	/;"	d
MMC3_PRE_RATIO_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC3_PRE_RATIO_MASK	/;"	d
MMC3_PRE_RATIO_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC3_PRE_RATIO_OFFSET	/;"	d
MMC3_PRE_RATIO_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC3_PRE_RATIO_VAL	/;"	d
MMC3_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC3_RATIO	/;"	d
MMC3_RATIO	board/samsung/odroid/setup.h	/^#define MMC3_RATIO(/;"	d
MMC3_RATIO	board/samsung/trats/setup.h	/^#define MMC3_RATIO	/;"	d
MMC3_RATIO_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC3_RATIO_MASK	/;"	d
MMC3_RATIO_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC3_RATIO_OFFSET	/;"	d
MMC3_RATIO_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MMC3_RATIO_VAL	/;"	d
MMC45_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define MMC45_DEV	/;"	d
MMC4_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	MMC4_BOOT,$/;"	e	enum:boot_device
MMC4_PRE_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC4_PRE_RATIO	/;"	d
MMC4_PRE_RATIO	board/samsung/odroid/setup.h	/^#define MMC4_PRE_RATIO(/;"	d
MMC4_PRE_RATIO	board/samsung/trats/setup.h	/^#define MMC4_PRE_RATIO	/;"	d
MMC4_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC4_RATIO	/;"	d
MMC4_RATIO	board/samsung/odroid/setup.h	/^#define MMC4_RATIO(/;"	d
MMC4_RATIO	board/samsung/trats/setup.h	/^#define MMC4_RATIO	/;"	d
MMCARGS	include/configs/brppt1.h	/^#define MMCARGS /;"	d
MMCARGS	include/configs/cm_t335.h	/^#define MMCARGS /;"	d
MMCBLEN_BLEN_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCBLEN_BLEN_MASK	/;"	d
MMCC0_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMCC0_SEL	/;"	d
MMCC0_SEL	board/samsung/trats/setup.h	/^#define MMCC0_SEL	/;"	d
MMCC1_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMCC1_SEL	/;"	d
MMCC1_SEL	board/samsung/trats/setup.h	/^#define MMCC1_SEL	/;"	d
MMCC2_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMCC2_SEL	/;"	d
MMCC2_SEL	board/samsung/trats/setup.h	/^#define MMCC2_SEL	/;"	d
MMCC3_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMCC3_SEL	/;"	d
MMCC3_SEL	board/samsung/trats/setup.h	/^#define MMCC3_SEL	/;"	d
MMCC4_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMCC4_SEL	/;"	d
MMCC4_SEL	board/samsung/trats/setup.h	/^#define MMCC4_SEL	/;"	d
MMCCLK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCCLK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCCLK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_CKO_MARK, MMCCLK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCCLK_CLKEN	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCLK_CLKEN	/;"	d
MMCCLK_CLKRT_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCLK_CLKRT_MASK	/;"	d
MMCCMD0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCCMD0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCCMD0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCCMD0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCCMD1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D8_MCP_NAF8_MARK, MMCCMD1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCCMD1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCCMD1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCCMD_BSYEXP	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_BSYEXP	/;"	d
MMCCMD_CMD_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_CMD_MASK	/;"	d
MMCCMD_DCLR	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_DCLR	/;"	d
MMCCMD_DMATRIG	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_DMATRIG	/;"	d
MMCCMD_DTRW	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_DTRW	/;"	d
MMCCMD_INITCK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_INITCK	/;"	d
MMCCMD_PPLEN	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_PPLEN	/;"	d
MMCCMD_RSPFMT_NONE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_RSPFMT_NONE	/;"	d
MMCCMD_RSPFMT_R1567	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_RSPFMT_R1567	/;"	d
MMCCMD_RSPFMT_R2	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_RSPFMT_R2	/;"	d
MMCCMD_RSPFMT_R3	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_RSPFMT_R3	/;"	d
MMCCMD_STRMTP	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_STRMTP	/;"	d
MMCCMD_WDATX	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCMD_WDATX	/;"	d
MMCCTL_CMDRST	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_CMDRST	/;"	d
MMCCTL_DATEG_BOTH	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_DATEG_BOTH	/;"	d
MMCCTL_DATEG_DISABLED	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_DATEG_DISABLED	/;"	d
MMCCTL_DATEG_FALLING	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_DATEG_FALLING	/;"	d
MMCCTL_DATEG_RISING	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_DATEG_RISING	/;"	d
MMCCTL_DATRST	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_DATRST	/;"	d
MMCCTL_PERMDR_BE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_PERMDR_BE	/;"	d
MMCCTL_PERMDR_LE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_PERMDR_LE	/;"	d
MMCCTL_PERMDX_BE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_PERMDX_BE	/;"	d
MMCCTL_PERMDX_LE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_PERMDX_LE	/;"	d
MMCCTL_WIDTH_4_BIT	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCCTL_WIDTH_4_BIT	/;"	d
MMCD0_0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_2_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_2_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_3_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_3_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_4_MARK, TS_SPSYNC5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_4_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_4_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_5_MARK, TS_SDAT5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_5_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_5_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_6_MARK, TS_SDEN5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_6_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_6_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_7_MARK, TS_SCK5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD0_7_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_7_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D0_MCP_NAF0_MARK, MMCD1_0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D1_MCP_NAF1_MARK, MMCD1_1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D2_MCP_NAF2_MARK, MMCD1_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D3_MCP_NAF3_MARK, MMCD1_3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D4_MCP_NAF4_MARK, MMCD1_4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D5_MCP_NAF5_MARK, MMCD1_5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D6_MCP_NAF6_MARK, MMCD1_6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCD1_7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MCP_D7_MCP_NAF7_MARK, MMCD1_7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MMCE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	MMCE	/;"	d
MMCFIFOCTL_ACCWD_1	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_ACCWD_1	/;"	d
MMCFIFOCTL_ACCWD_2	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_ACCWD_2	/;"	d
MMCFIFOCTL_ACCWD_3	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_ACCWD_3	/;"	d
MMCFIFOCTL_ACCWD_4	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_ACCWD_4	/;"	d
MMCFIFOCTL_FIFODIR	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_FIFODIR	/;"	d
MMCFIFOCTL_FIFOLEV	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_FIFOLEV	/;"	d
MMCFIFOCTL_FIFORST	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCFIFOCTL_FIFORST	/;"	d
MMCIF_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define MMCIF_BASE	/;"	d
MMCIM_EBSYDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_EBSYDNE	/;"	d
MMCIM_ECRCRD	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ECRCRD	/;"	d
MMCIM_ECRCRS	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ECRCRS	/;"	d
MMCIM_ECRCWR	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ECRCWR	/;"	d
MMCIM_EDATDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_EDATDNE	/;"	d
MMCIM_EDATED	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_EDATED	/;"	d
MMCIM_EDRRDY	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_EDRRDY	/;"	d
MMCIM_EDXRDY	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_EDXRDY	/;"	d
MMCIM_ERSPDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ERSPDNE	/;"	d
MMCIM_ETOUTRD	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ETOUTRD	/;"	d
MMCIM_ETOUTRS	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ETOUTRS	/;"	d
MMCIM_ETRNDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_ETRNDNE	/;"	d
MMCIM_MASKALL	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCIM_MASKALL	/;"	d
MMCINT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	MMCINT	/;"	d
MMCI_ARG_OFFSET	include/atmel_mci.h	/^#define MMCI_ARG_OFFSET	/;"	d
MMCI_ARG_SIZE	include/atmel_mci.h	/^#define MMCI_ARG_SIZE	/;"	d
MMCI_BCNT_OFFSET	include/atmel_mci.h	/^#define MMCI_BCNT_OFFSET	/;"	d
MMCI_BCNT_SIZE	include/atmel_mci.h	/^#define MMCI_BCNT_SIZE	/;"	d
MMCI_BF	include/atmel_mci.h	/^#define MMCI_BF(/;"	d
MMCI_BFEXT	include/atmel_mci.h	/^#define MMCI_BFEXT(/;"	d
MMCI_BFINS	include/atmel_mci.h	/^#define MMCI_BFINS(/;"	d
MMCI_BIT	include/atmel_mci.h	/^#define MMCI_BIT(/;"	d
MMCI_BLKE_OFFSET	include/atmel_mci.h	/^#define MMCI_BLKE_OFFSET	/;"	d
MMCI_BLKE_SIZE	include/atmel_mci.h	/^#define MMCI_BLKE_SIZE	/;"	d
MMCI_BLKLEN_OFFSET	include/atmel_mci.h	/^#define MMCI_BLKLEN_OFFSET	/;"	d
MMCI_BLKLEN_SIZE	include/atmel_mci.h	/^#define MMCI_BLKLEN_SIZE	/;"	d
MMCI_CLKDIV_OFFSET	include/atmel_mci.h	/^#define MMCI_CLKDIV_OFFSET	/;"	d
MMCI_CLKDIV_SIZE	include/atmel_mci.h	/^#define MMCI_CLKDIV_SIZE	/;"	d
MMCI_CLKODD_OFFSET	include/atmel_mci.h	/^#define MMCI_CLKODD_OFFSET	/;"	d
MMCI_CLKODD_SIZE	include/atmel_mci.h	/^#define MMCI_CLKODD_SIZE	/;"	d
MMCI_CMDNB_OFFSET	include/atmel_mci.h	/^#define MMCI_CMDNB_OFFSET	/;"	d
MMCI_CMDNB_SIZE	include/atmel_mci.h	/^#define MMCI_CMDNB_SIZE	/;"	d
MMCI_CMDRDY_OFFSET	include/atmel_mci.h	/^#define MMCI_CMDRDY_OFFSET	/;"	d
MMCI_CMDRDY_SIZE	include/atmel_mci.h	/^#define MMCI_CMDRDY_SIZE	/;"	d
MMCI_DCRCE_OFFSET	include/atmel_mci.h	/^#define MMCI_DCRCE_OFFSET	/;"	d
MMCI_DCRCE_SIZE	include/atmel_mci.h	/^#define MMCI_DCRCE_SIZE	/;"	d
MMCI_DTIP_OFFSET	include/atmel_mci.h	/^#define MMCI_DTIP_OFFSET	/;"	d
MMCI_DTIP_SIZE	include/atmel_mci.h	/^#define MMCI_DTIP_SIZE	/;"	d
MMCI_DTOCYC_OFFSET	include/atmel_mci.h	/^#define MMCI_DTOCYC_OFFSET	/;"	d
MMCI_DTOCYC_SIZE	include/atmel_mci.h	/^#define MMCI_DTOCYC_SIZE	/;"	d
MMCI_DTOE_OFFSET	include/atmel_mci.h	/^#define MMCI_DTOE_OFFSET	/;"	d
MMCI_DTOE_SIZE	include/atmel_mci.h	/^#define MMCI_DTOE_SIZE	/;"	d
MMCI_DTOMUL_1024_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_1024_CYCLES	/;"	d
MMCI_DTOMUL_1048576_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_1048576_CYCLES	/;"	d
MMCI_DTOMUL_128_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_128_CYCLES	/;"	d
MMCI_DTOMUL_16_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_16_CYCLES	/;"	d
MMCI_DTOMUL_1_CYCLE	include/atmel_mci.h	/^#define MMCI_DTOMUL_1_CYCLE	/;"	d
MMCI_DTOMUL_256_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_256_CYCLES	/;"	d
MMCI_DTOMUL_4096_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_4096_CYCLES	/;"	d
MMCI_DTOMUL_65536_CYCLES	include/atmel_mci.h	/^#define MMCI_DTOMUL_65536_CYCLES	/;"	d
MMCI_DTOMUL_OFFSET	include/atmel_mci.h	/^#define MMCI_DTOMUL_OFFSET	/;"	d
MMCI_DTOMUL_SIZE	include/atmel_mci.h	/^#define MMCI_DTOMUL_SIZE	/;"	d
MMCI_ENDRX_OFFSET	include/atmel_mci.h	/^#define MMCI_ENDRX_OFFSET	/;"	d
MMCI_ENDRX_SIZE	include/atmel_mci.h	/^#define MMCI_ENDRX_SIZE	/;"	d
MMCI_ENDTX_OFFSET	include/atmel_mci.h	/^#define MMCI_ENDTX_OFFSET	/;"	d
MMCI_ENDTX_SIZE	include/atmel_mci.h	/^#define MMCI_ENDTX_SIZE	/;"	d
MMCI_FERRCTRL_OFFSET	include/atmel_mci.h	/^#define MMCI_FERRCTRL_OFFSET	/;"	d
MMCI_FERRCTRL_SIZE	include/atmel_mci.h	/^#define MMCI_FERRCTRL_SIZE	/;"	d
MMCI_FIFOMODE_OFFSET	include/atmel_mci.h	/^#define MMCI_FIFOMODE_OFFSET	/;"	d
MMCI_FIFOMODE_SIZE	include/atmel_mci.h	/^#define MMCI_FIFOMODE_SIZE	/;"	d
MMCI_HSMODE_OFFSET	include/atmel_mci.h	/^#define MMCI_HSMODE_OFFSET	/;"	d
MMCI_HSMODE_SIZE	include/atmel_mci.h	/^#define MMCI_HSMODE_SIZE	/;"	d
MMCI_LSYNC_OFFSET	include/atmel_mci.h	/^#define MMCI_LSYNC_OFFSET	/;"	d
MMCI_LSYNC_SIZE	include/atmel_mci.h	/^#define MMCI_LSYNC_SIZE	/;"	d
MMCI_MAXLAT_OFFSET	include/atmel_mci.h	/^#define MMCI_MAXLAT_OFFSET	/;"	d
MMCI_MAXLAT_SIZE	include/atmel_mci.h	/^#define MMCI_MAXLAT_SIZE	/;"	d
MMCI_MCIDIS_OFFSET	include/atmel_mci.h	/^#define MMCI_MCIDIS_OFFSET	/;"	d
MMCI_MCIDIS_SIZE	include/atmel_mci.h	/^#define MMCI_MCIDIS_SIZE	/;"	d
MMCI_MCIEN_OFFSET	include/atmel_mci.h	/^#define MMCI_MCIEN_OFFSET	/;"	d
MMCI_MCIEN_SIZE	include/atmel_mci.h	/^#define MMCI_MCIEN_SIZE	/;"	d
MMCI_NOTBUSY_OFFSET	include/atmel_mci.h	/^#define MMCI_NOTBUSY_OFFSET	/;"	d
MMCI_NOTBUSY_SIZE	include/atmel_mci.h	/^#define MMCI_NOTBUSY_SIZE	/;"	d
MMCI_OPDCMD_OFFSET	include/atmel_mci.h	/^#define MMCI_OPDCMD_OFFSET	/;"	d
MMCI_OPDCMD_SIZE	include/atmel_mci.h	/^#define MMCI_OPDCMD_SIZE	/;"	d
MMCI_OVRE_OFFSET	include/atmel_mci.h	/^#define MMCI_OVRE_OFFSET	/;"	d
MMCI_OVRE_SIZE	include/atmel_mci.h	/^#define MMCI_OVRE_SIZE	/;"	d
MMCI_PDCMODE_OFFSET	include/atmel_mci.h	/^#define MMCI_PDCMODE_OFFSET	/;"	d
MMCI_PDCMODE_SIZE	include/atmel_mci.h	/^#define MMCI_PDCMODE_SIZE	/;"	d
MMCI_PDCPADV_OFFSET	include/atmel_mci.h	/^#define MMCI_PDCPADV_OFFSET	/;"	d
MMCI_PDCPADV_SIZE	include/atmel_mci.h	/^#define MMCI_PDCPADV_SIZE	/;"	d
MMCI_PWSDIS_OFFSET	include/atmel_mci.h	/^#define MMCI_PWSDIS_OFFSET	/;"	d
MMCI_PWSDIS_SIZE	include/atmel_mci.h	/^#define MMCI_PWSDIS_SIZE	/;"	d
MMCI_PWSDIV_OFFSET	include/atmel_mci.h	/^#define MMCI_PWSDIV_OFFSET	/;"	d
MMCI_PWSDIV_SIZE	include/atmel_mci.h	/^#define MMCI_PWSDIV_SIZE	/;"	d
MMCI_PWSEN_OFFSET	include/atmel_mci.h	/^#define MMCI_PWSEN_OFFSET	/;"	d
MMCI_PWSEN_SIZE	include/atmel_mci.h	/^#define MMCI_PWSEN_SIZE	/;"	d
MMCI_RCRCE_OFFSET	include/atmel_mci.h	/^#define MMCI_RCRCE_OFFSET	/;"	d
MMCI_RCRCE_SIZE	include/atmel_mci.h	/^#define MMCI_RCRCE_SIZE	/;"	d
MMCI_RDIRE_OFFSET	include/atmel_mci.h	/^#define MMCI_RDIRE_OFFSET	/;"	d
MMCI_RDIRE_SIZE	include/atmel_mci.h	/^#define MMCI_RDIRE_SIZE	/;"	d
MMCI_RDPROOF_OFFSET	include/atmel_mci.h	/^#define MMCI_RDPROOF_OFFSET	/;"	d
MMCI_RDPROOF_SIZE	include/atmel_mci.h	/^#define MMCI_RDPROOF_SIZE	/;"	d
MMCI_RENDE_OFFSET	include/atmel_mci.h	/^#define MMCI_RENDE_OFFSET	/;"	d
MMCI_RENDE_SIZE	include/atmel_mci.h	/^#define MMCI_RENDE_SIZE	/;"	d
MMCI_RINDE_OFFSET	include/atmel_mci.h	/^#define MMCI_RINDE_OFFSET	/;"	d
MMCI_RINDE_SIZE	include/atmel_mci.h	/^#define MMCI_RINDE_SIZE	/;"	d
MMCI_RSPTYP_136_BIT_RESP	include/atmel_mci.h	/^#define MMCI_RSPTYP_136_BIT_RESP	/;"	d
MMCI_RSPTYP_48_BIT_RESP	include/atmel_mci.h	/^#define MMCI_RSPTYP_48_BIT_RESP	/;"	d
MMCI_RSPTYP_NO_RESP	include/atmel_mci.h	/^#define MMCI_RSPTYP_NO_RESP	/;"	d
MMCI_RSPTYP_OFFSET	include/atmel_mci.h	/^#define MMCI_RSPTYP_OFFSET	/;"	d
MMCI_RSPTYP_SIZE	include/atmel_mci.h	/^#define MMCI_RSPTYP_SIZE	/;"	d
MMCI_RSP_OFFSET	include/atmel_mci.h	/^#define MMCI_RSP_OFFSET	/;"	d
MMCI_RSP_SIZE	include/atmel_mci.h	/^#define MMCI_RSP_SIZE	/;"	d
MMCI_RTOE_OFFSET	include/atmel_mci.h	/^#define MMCI_RTOE_OFFSET	/;"	d
MMCI_RTOE_SIZE	include/atmel_mci.h	/^#define MMCI_RTOE_SIZE	/;"	d
MMCI_RXBUFF_OFFSET	include/atmel_mci.h	/^#define MMCI_RXBUFF_OFFSET	/;"	d
MMCI_RXBUFF_SIZE	include/atmel_mci.h	/^#define MMCI_RXBUFF_SIZE	/;"	d
MMCI_RXRDY_OFFSET	include/atmel_mci.h	/^#define MMCI_RXRDY_OFFSET	/;"	d
MMCI_RXRDY_SIZE	include/atmel_mci.h	/^#define MMCI_RXRDY_SIZE	/;"	d
MMCI_SCDBUS_OFFSET	include/atmel_mci.h	/^#define MMCI_SCDBUS_OFFSET	/;"	d
MMCI_SCDBUS_SIZE	include/atmel_mci.h	/^#define MMCI_SCDBUS_SIZE	/;"	d
MMCI_SCDSEL_OFFSET	include/atmel_mci.h	/^#define MMCI_SCDSEL_OFFSET	/;"	d
MMCI_SCDSEL_SIZE	include/atmel_mci.h	/^#define MMCI_SCDSEL_SIZE	/;"	d
MMCI_SPCMD_INIT_CMD	include/atmel_mci.h	/^#define MMCI_SPCMD_INIT_CMD	/;"	d
MMCI_SPCMD_INT_CMD	include/atmel_mci.h	/^#define MMCI_SPCMD_INT_CMD	/;"	d
MMCI_SPCMD_INT_RESP	include/atmel_mci.h	/^#define MMCI_SPCMD_INT_RESP	/;"	d
MMCI_SPCMD_NO_SPEC_CMD	include/atmel_mci.h	/^#define MMCI_SPCMD_NO_SPEC_CMD	/;"	d
MMCI_SPCMD_OFFSET	include/atmel_mci.h	/^#define MMCI_SPCMD_OFFSET	/;"	d
MMCI_SPCMD_SIZE	include/atmel_mci.h	/^#define MMCI_SPCMD_SIZE	/;"	d
MMCI_SPCMD_SYNC_CMD	include/atmel_mci.h	/^#define MMCI_SPCMD_SYNC_CMD	/;"	d
MMCI_SWRST_OFFSET	include/atmel_mci.h	/^#define MMCI_SWRST_OFFSET	/;"	d
MMCI_SWRST_SIZE	include/atmel_mci.h	/^#define MMCI_SWRST_SIZE	/;"	d
MMCI_TRCMD_NO_TRANS	include/atmel_mci.h	/^#define MMCI_TRCMD_NO_TRANS	/;"	d
MMCI_TRCMD_OFFSET	include/atmel_mci.h	/^#define MMCI_TRCMD_OFFSET	/;"	d
MMCI_TRCMD_SIZE	include/atmel_mci.h	/^#define MMCI_TRCMD_SIZE	/;"	d
MMCI_TRCMD_START_TRANS	include/atmel_mci.h	/^#define MMCI_TRCMD_START_TRANS	/;"	d
MMCI_TRCMD_STOP_TRANS	include/atmel_mci.h	/^#define MMCI_TRCMD_STOP_TRANS	/;"	d
MMCI_TRDIR_OFFSET	include/atmel_mci.h	/^#define MMCI_TRDIR_OFFSET	/;"	d
MMCI_TRDIR_SIZE	include/atmel_mci.h	/^#define MMCI_TRDIR_SIZE	/;"	d
MMCI_TRTYP_BLOCK	include/atmel_mci.h	/^#define MMCI_TRTYP_BLOCK	/;"	d
MMCI_TRTYP_MULTI_BLOCK	include/atmel_mci.h	/^#define MMCI_TRTYP_MULTI_BLOCK	/;"	d
MMCI_TRTYP_OFFSET	include/atmel_mci.h	/^#define MMCI_TRTYP_OFFSET	/;"	d
MMCI_TRTYP_SIZE	include/atmel_mci.h	/^#define MMCI_TRTYP_SIZE	/;"	d
MMCI_TRTYP_STREAM	include/atmel_mci.h	/^#define MMCI_TRTYP_STREAM	/;"	d
MMCI_TXBUFE_OFFSET	include/atmel_mci.h	/^#define MMCI_TXBUFE_OFFSET	/;"	d
MMCI_TXBUFE_SIZE	include/atmel_mci.h	/^#define MMCI_TXBUFE_SIZE	/;"	d
MMCI_TXRDY_OFFSET	include/atmel_mci.h	/^#define MMCI_TXRDY_OFFSET	/;"	d
MMCI_TXRDY_SIZE	include/atmel_mci.h	/^#define MMCI_TXRDY_SIZE	/;"	d
MMCI_UNRE_OFFSET	include/atmel_mci.h	/^#define MMCI_UNRE_OFFSET	/;"	d
MMCI_UNRE_SIZE	include/atmel_mci.h	/^#define MMCI_UNRE_SIZE	/;"	d
MMCI_WRPROOF_OFFSET	include/atmel_mci.h	/^#define MMCI_WRPROOF_OFFSET	/;"	d
MMCI_WRPROOF_SIZE	include/atmel_mci.h	/^#define MMCI_WRPROOF_SIZE	/;"	d
MMCNBLC_NBLC_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCNBLC_NBLC_MASK	/;"	d
MMCNBLK_NBLK_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCNBLK_NBLK_MASK	/;"	d
MMCNBLK_NBLK_MAX	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCNBLK_NBLK_MAX	/;"	d
MMCPART_NOAVAILABLE	include/mmc.h	/^#define MMCPART_NOAVAILABLE	/;"	d
MMCSDIO1ADPCLKISEL	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define MMCSDIO1ADPCLKISEL	/;"	d
MMCSDIO2ADPCLKISEL	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define MMCSDIO2ADPCLKISEL	/;"	d
MMCSD_MODE_EMMCBOOT	include/spl.h	/^#define MMCSD_MODE_EMMCBOOT	/;"	d
MMCSD_MODE_FS	include/spl.h	/^#define MMCSD_MODE_FS	/;"	d
MMCSD_MODE_RAW	include/spl.h	/^#define MMCSD_MODE_RAW	/;"	d
MMCSD_MODE_UNDEFINED	include/spl.h	/^#define MMCSD_MODE_UNDEFINED	/;"	d
MMCSD_SECTOR_SIZE	arch/arm/include/asm/arch-mx35/mmc_host_def.h	/^#define MMCSD_SECTOR_SIZE	/;"	d
MMCSD_SECTOR_SIZE	arch/arm/include/asm/omap_mmc.h	/^#define MMCSD_SECTOR_SIZE	/;"	d
MMCST0_BSYDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_BSYDNE	/;"	d
MMCST0_CRCRD	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_CRCRD	/;"	d
MMCST0_CRCRS	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_CRCRS	/;"	d
MMCST0_CRCWR	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_CRCWR	/;"	d
MMCST0_DATDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_DATDNE	/;"	d
MMCST0_DATED	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_DATED	/;"	d
MMCST0_DRRDY	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_DRRDY	/;"	d
MMCST0_DXRDY	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_DXRDY	/;"	d
MMCST0_ERR_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_ERR_MASK	/;"	d
MMCST0_RSPDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_RSPDNE	/;"	d
MMCST0_TOUTRD	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_TOUTRD	/;"	d
MMCST0_TOUTRS	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_TOUTRS	/;"	d
MMCST0_TRNDNE	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST0_TRNDNE	/;"	d
MMCST1_BUSY	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_BUSY	/;"	d
MMCST1_CLKSTP	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_CLKSTP	/;"	d
MMCST1_DAT3ST	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_DAT3ST	/;"	d
MMCST1_DRFUL	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_DRFUL	/;"	d
MMCST1_DXEMP	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_DXEMP	/;"	d
MMCST1_FIFOEMP	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_FIFOEMP	/;"	d
MMCST1_FIFOFUL	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCST1_FIFOFUL	/;"	d
MMCTOD_TOD_0_15_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCTOD_TOD_0_15_MASK	/;"	d
MMCTOR_TOD_20_16_SHIFT	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCTOR_TOD_20_16_SHIFT /;"	d
MMCTOR_TOR_MASK	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define MMCTOR_TOR_MASK	/;"	d
MMC_ARGH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_ARGH	/;"	d
MMC_ARGL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_ARGL	/;"	d
MMC_BLKLEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_BLKLEN	/;"	d
MMC_BLK_LEN_MAX_MASK	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_BLK_LEN_MAX_MASK	/;"	d
MMC_BLOCK_SIZE	include/mvebu_mmc.h	/^#define MMC_BLOCK_SIZE	/;"	d
MMC_BOOT_DEVICES_END	arch/arm/include/asm/arch-am33xx/spl.h	/^#define MMC_BOOT_DEVICES_END	/;"	d
MMC_BOOT_DEVICES_END	arch/arm/include/asm/arch-omap3/spl.h	/^#define MMC_BOOT_DEVICES_END	/;"	d
MMC_BOOT_DEVICES_END	arch/arm/include/asm/arch-omap4/spl.h	/^#define MMC_BOOT_DEVICES_END	/;"	d
MMC_BOOT_DEVICES_END	arch/arm/include/asm/arch-omap5/spl.h	/^#define MMC_BOOT_DEVICES_END	/;"	d
MMC_BOOT_DEVICES_START	arch/arm/include/asm/arch-am33xx/spl.h	/^#define MMC_BOOT_DEVICES_START	/;"	d
MMC_BOOT_DEVICES_START	arch/arm/include/asm/arch-omap3/spl.h	/^#define MMC_BOOT_DEVICES_START	/;"	d
MMC_BOOT_DEVICES_START	arch/arm/include/asm/arch-omap4/spl.h	/^#define MMC_BOOT_DEVICES_START	/;"	d
MMC_BOOT_DEVICES_START	arch/arm/include/asm/arch-omap5/spl.h	/^#define MMC_BOOT_DEVICES_START	/;"	d
MMC_BOOT_SUPPORTED	include/configs/x600.h	/^#define MMC_BOOT_SUPPORTED	/;"	d
MMC_BUSMODE_OPENDRAIN	include/mvebu_mmc.h	/^#define MMC_BUSMODE_OPENDRAIN	/;"	d
MMC_BUSMODE_PUSHPULL	include/mvebu_mmc.h	/^#define MMC_BUSMODE_PUSHPULL	/;"	d
MMC_BUS_WIDTH_1	drivers/mmc/sh_mmcif.h	/^#define MMC_BUS_WIDTH_1	/;"	d
MMC_BUS_WIDTH_1	include/mvebu_mmc.h	/^#define MMC_BUS_WIDTH_1	/;"	d
MMC_BUS_WIDTH_4	drivers/mmc/sh_mmcif.h	/^#define MMC_BUS_WIDTH_4	/;"	d
MMC_BUS_WIDTH_4	include/mvebu_mmc.h	/^#define MMC_BUS_WIDTH_4	/;"	d
MMC_BUS_WIDTH_8	drivers/mmc/sh_mmcif.h	/^#define MMC_BUS_WIDTH_8	/;"	d
MMC_BUS_WIDTH_8	include/mvebu_mmc.h	/^#define MMC_BUS_WIDTH_8	/;"	d
MMC_CAP_1_2V_DDR	include/mvebu_mmc.h	/^#define MMC_CAP_1_2V_DDR	/;"	d
MMC_CAP_1_8V_DDR	include/mvebu_mmc.h	/^#define MMC_CAP_1_8V_DDR	/;"	d
MMC_CAP_4_BIT_DATA	include/mvebu_mmc.h	/^#define MMC_CAP_4_BIT_DATA	/;"	d
MMC_CAP_8_BIT_DATA	include/mvebu_mmc.h	/^#define MMC_CAP_8_BIT_DATA	/;"	d
MMC_CAP_BUS_WIDTH_TEST	include/mvebu_mmc.h	/^#define MMC_CAP_BUS_WIDTH_TEST	/;"	d
MMC_CAP_CMD23	include/mvebu_mmc.h	/^#define MMC_CAP_CMD23	/;"	d
MMC_CAP_DRIVER_TYPE_A	include/mvebu_mmc.h	/^#define MMC_CAP_DRIVER_TYPE_A	/;"	d
MMC_CAP_DRIVER_TYPE_C	include/mvebu_mmc.h	/^#define MMC_CAP_DRIVER_TYPE_C	/;"	d
MMC_CAP_DRIVER_TYPE_D	include/mvebu_mmc.h	/^#define MMC_CAP_DRIVER_TYPE_D	/;"	d
MMC_CAP_ERASE	include/mvebu_mmc.h	/^#define MMC_CAP_ERASE	/;"	d
MMC_CAP_HW_RESET	include/mvebu_mmc.h	/^#define MMC_CAP_HW_RESET	/;"	d
MMC_CAP_MMC_HIGHSPEED	include/mvebu_mmc.h	/^#define MMC_CAP_MMC_HIGHSPEED	/;"	d
MMC_CAP_NEEDS_POLL	include/mvebu_mmc.h	/^#define MMC_CAP_NEEDS_POLL	/;"	d
MMC_CAP_NONREMOVABLE	include/mvebu_mmc.h	/^#define MMC_CAP_NONREMOVABLE	/;"	d
MMC_CAP_POWER_OFF_CARD	include/mvebu_mmc.h	/^#define MMC_CAP_POWER_OFF_CARD	/;"	d
MMC_CAP_SDIO_IRQ	include/mvebu_mmc.h	/^#define MMC_CAP_SDIO_IRQ	/;"	d
MMC_CAP_SD_HIGHSPEED	include/mvebu_mmc.h	/^#define MMC_CAP_SD_HIGHSPEED	/;"	d
MMC_CAP_SPI	include/mvebu_mmc.h	/^#define MMC_CAP_SPI	/;"	d
MMC_CAP_UHS_DDR50	include/mvebu_mmc.h	/^#define MMC_CAP_UHS_DDR50	/;"	d
MMC_CAP_UHS_SDR104	include/mvebu_mmc.h	/^#define MMC_CAP_UHS_SDR104	/;"	d
MMC_CAP_UHS_SDR12	include/mvebu_mmc.h	/^#define MMC_CAP_UHS_SDR12	/;"	d
MMC_CAP_UHS_SDR25	include/mvebu_mmc.h	/^#define MMC_CAP_UHS_SDR25	/;"	d
MMC_CAP_UHS_SDR50	include/mvebu_mmc.h	/^#define MMC_CAP_UHS_SDR50	/;"	d
MMC_CAP_WAIT_WHILE_BUSY	include/mvebu_mmc.h	/^#define MMC_CAP_WAIT_WHILE_BUSY	/;"	d
MMC_CARD	arch/arm/include/asm/omap_mmc.h	/^#define MMC_CARD	/;"	d
MMC_CARD	drivers/mmc/mv_sdhci.c	/^#define  MMC_CARD	/;"	d	file:
MMC_CLKRT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_CLKRT	/;"	d
MMC_CLKRT_0_3125MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_0_3125MHZ	/;"	d
MMC_CLKRT_0_625MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_0_625MHZ	/;"	d
MMC_CLKRT_10MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_10MHZ	/;"	d
MMC_CLKRT_1_25MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_1_25MHZ	/;"	d
MMC_CLKRT_20MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_20MHZ	/;"	d
MMC_CLKRT_2_5MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_2_5MHZ	/;"	d
MMC_CLKRT_5MHZ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CLKRT_5MHZ	/;"	d
MMC_CLK_DIV_MAX	drivers/mmc/sh_mmcif.h	/^#define MMC_CLK_DIV_MAX(/;"	d
MMC_CLK_DIV_MIN	drivers/mmc/sh_mmcif.h	/^#define MMC_CLK_DIV_MIN(/;"	d
MMC_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_CLOCK_REFERENCE	arch/arm/include/asm/arch-am33xx/mmc_host_def.h	/^#define MMC_CLOCK_REFERENCE	/;"	d
MMC_CLOCK_REFERENCE	arch/arm/include/asm/omap_mmc.h	/^#define MMC_CLOCK_REFERENCE	/;"	d
MMC_CMD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_CMD	/;"	d
MMC_CMD0	arch/arm/include/asm/omap_mmc.h	/^#define MMC_CMD0	/;"	d
MMC_CMD62_ARG1	include/mmc.h	/^#define MMC_CMD62_ARG1	/;"	d
MMC_CMD62_ARG2	include/mmc.h	/^#define MMC_CMD62_ARG2	/;"	d
MMC_CMDAT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_CMDAT	/;"	d
MMC_CMDAT_BCR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_BCR	/;"	d
MMC_CMDAT_BUSY	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_BUSY	/;"	d
MMC_CMDAT_DATA_EN	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_DATA_EN	/;"	d
MMC_CMDAT_INIT	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_INIT	/;"	d
MMC_CMDAT_MMC_DMA_EN	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_MMC_DMA_EN	/;"	d
MMC_CMDAT_R0	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_R0	/;"	d
MMC_CMDAT_R1	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_R1	/;"	d
MMC_CMDAT_R2	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_R2	/;"	d
MMC_CMDAT_R3	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_R3	/;"	d
MMC_CMDAT_SD_4DAT	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_SD_4DAT	/;"	d
MMC_CMDAT_STREAM	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_STREAM	/;"	d
MMC_CMDAT_WRITE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMDAT_WRITE	/;"	d
MMC_CMD_ALL_SEND_CID	include/mmc.h	/^#define MMC_CMD_ALL_SEND_CID	/;"	d
MMC_CMD_APP_CMD	include/mmc.h	/^#define MMC_CMD_APP_CMD	/;"	d
MMC_CMD_ERASE	include/mmc.h	/^#define MMC_CMD_ERASE	/;"	d
MMC_CMD_ERASE_GROUP_END	include/mmc.h	/^#define MMC_CMD_ERASE_GROUP_END	/;"	d
MMC_CMD_ERASE_GROUP_START	include/mmc.h	/^#define MMC_CMD_ERASE_GROUP_START	/;"	d
MMC_CMD_GO_IDLE_STATE	include/mmc.h	/^#define MMC_CMD_GO_IDLE_STATE	/;"	d
MMC_CMD_INDEX_MAX	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_CMD_INDEX_MAX	/;"	d
MMC_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_CMD_READ_MULTIPLE_BLOCK	include/mmc.h	/^#define MMC_CMD_READ_MULTIPLE_BLOCK	/;"	d
MMC_CMD_READ_SINGLE_BLOCK	include/mmc.h	/^#define MMC_CMD_READ_SINGLE_BLOCK	/;"	d
MMC_CMD_RES_MAN	include/mmc.h	/^#define MMC_CMD_RES_MAN	/;"	d
MMC_CMD_SELECT_CARD	include/mmc.h	/^#define MMC_CMD_SELECT_CARD	/;"	d
MMC_CMD_SEND_CID	include/mmc.h	/^#define MMC_CMD_SEND_CID	/;"	d
MMC_CMD_SEND_CSD	include/mmc.h	/^#define MMC_CMD_SEND_CSD	/;"	d
MMC_CMD_SEND_EXT_CSD	include/mmc.h	/^#define MMC_CMD_SEND_EXT_CSD	/;"	d
MMC_CMD_SEND_OP_COND	include/mmc.h	/^#define MMC_CMD_SEND_OP_COND	/;"	d
MMC_CMD_SEND_STATUS	include/mmc.h	/^#define MMC_CMD_SEND_STATUS	/;"	d
MMC_CMD_SET_BLOCKLEN	include/mmc.h	/^#define MMC_CMD_SET_BLOCKLEN	/;"	d
MMC_CMD_SET_BLOCK_COUNT	include/mmc.h	/^#define MMC_CMD_SET_BLOCK_COUNT /;"	d
MMC_CMD_SET_DSR	include/mmc.h	/^#define MMC_CMD_SET_DSR	/;"	d
MMC_CMD_SET_RELATIVE_ADDR	include/mmc.h	/^#define MMC_CMD_SET_RELATIVE_ADDR	/;"	d
MMC_CMD_SPI_CRC_ON_OFF	include/mmc.h	/^#define MMC_CMD_SPI_CRC_ON_OFF	/;"	d
MMC_CMD_SPI_READ_OCR	include/mmc.h	/^#define MMC_CMD_SPI_READ_OCR	/;"	d
MMC_CMD_STOP_TRANSMISSION	include/mmc.h	/^#define MMC_CMD_STOP_TRANSMISSION	/;"	d
MMC_CMD_SWITCH	include/mmc.h	/^#define MMC_CMD_SWITCH	/;"	d
MMC_CMD_WRITE_MULTIPLE_BLOCK	include/mmc.h	/^#define MMC_CMD_WRITE_MULTIPLE_BLOCK	/;"	d
MMC_CMD_WRITE_SINGLE_BLOCK	include/mmc.h	/^#define MMC_CMD_WRITE_SINGLE_BLOCK	/;"	d
MMC_CTLR_VERSION_1	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	MMC_CTLR_VERSION_1 = 0,	\/* DM644x and DM355 *\/$/;"	e	enum:__anon9fe8c5ba0103
MMC_CTLR_VERSION_2	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	MMC_CTLR_VERSION_2,	\/* DA830 *\/$/;"	e	enum:__anon9fe8c5ba0103
MMC_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA0_MARK, MMC_D1_MARK, SD2_DATA1_MARK, MMC_D2_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA0_MARK, MMC_D1_MARK, SD2_DATA1_MARK, MMC_D2_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_D7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MMC_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_RX_MARK, MMC_D7_MARK, SCIF0_TXD_MARK, I2C2_SDA_B_MARK,$/;"	e	enum:__anona307901d0103	file:
MMC_DATA_BOTH_DIR	include/faraday/ftsdc010.h	/^#define MMC_DATA_BOTH_DIR	/;"	d
MMC_DATA_READ	include/mmc.h	/^#define MMC_DATA_READ	/;"	d
MMC_DATA_WRITE	include/mmc.h	/^#define MMC_DATA_WRITE	/;"	d
MMC_DEFAULT_BLKLEN	drivers/mmc/gen_atmel_mci.c	/^#define MMC_DEFAULT_BLKLEN	/;"	d	file:
MMC_DISCARD_ARG	include/mmc.h	/^#define MMC_DISCARD_ARG	/;"	d
MMC_ERASE_ARG	include/mmc.h	/^#define MMC_ERASE_ARG	/;"	d
MMC_HOST_DEF_H	arch/arm/include/asm/arch-am33xx/mmc_host_def.h	/^#define MMC_HOST_DEF_H$/;"	d
MMC_HOST_DEF_H	arch/arm/include/asm/arch-mx35/mmc_host_def.h	/^#define MMC_HOST_DEF_H$/;"	d
MMC_HOST_DEF_H	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define MMC_HOST_DEF_H$/;"	d
MMC_HOST_DEF_H	arch/arm/include/asm/arch-omap4/mmc_host_def.h	/^#define MMC_HOST_DEF_H$/;"	d
MMC_HOST_DEF_H	arch/arm/include/asm/arch-omap5/mmc_host_def.h	/^#define MMC_HOST_DEF_H$/;"	d
MMC_HWPART_CONF_CHECK	include/mmc.h	/^	MMC_HWPART_CONF_CHECK,$/;"	e	enum:mmc_hwpart_conf_mode
MMC_HWPART_CONF_COMPLETE	include/mmc.h	/^	MMC_HWPART_CONF_COMPLETE,$/;"	e	enum:mmc_hwpart_conf_mode
MMC_HWPART_CONF_SET	include/mmc.h	/^	MMC_HWPART_CONF_SET,$/;"	e	enum:mmc_hwpart_conf_mode
MMC_INDEX	arch/arm/mach-exynos/spl_boot.c	/^	MMC_INDEX,$/;"	e	enum:index	file:
MMC_I_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_I_MASK	/;"	d
MMC_I_MASK_ALL	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_ALL	/;"	d
MMC_I_MASK_CLK_IS_OFF	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_CLK_IS_OFF	/;"	d
MMC_I_MASK_DATA_TRAN_DONE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_DATA_TRAN_DONE	/;"	d
MMC_I_MASK_END_CMD_RES	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_END_CMD_RES	/;"	d
MMC_I_MASK_PRG_DONE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_PRG_DONE	/;"	d
MMC_I_MASK_RXFIFO_RD_REQ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_RXFIFO_RD_REQ	/;"	d
MMC_I_MASK_STOP_CMD	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_STOP_CMD	/;"	d
MMC_I_MASK_TXFIFO_WR_REQ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_MASK_TXFIFO_WR_REQ	/;"	d
MMC_I_REG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_I_REG	/;"	d
MMC_I_REG_CLK_IS_OFF	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_CLK_IS_OFF	/;"	d
MMC_I_REG_DATA_TRAN_DONE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_DATA_TRAN_DONE	/;"	d
MMC_I_REG_END_CMD_RES	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_END_CMD_RES	/;"	d
MMC_I_REG_PRG_DONE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_PRG_DONE	/;"	d
MMC_I_REG_RXFIFO_RD_REQ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_RXFIFO_RD_REQ	/;"	d
MMC_I_REG_STOP_CMD	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_STOP_CMD	/;"	d
MMC_I_REG_TXFIFO_WR_REQ	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_I_REG_TXFIFO_WR_REQ	/;"	d
MMC_MAX_BLOCK_LEN	include/mmc.h	/^#define MMC_MAX_BLOCK_LEN	/;"	d
MMC_MODE_4BIT	include/mmc.h	/^#define MMC_MODE_4BIT	/;"	d
MMC_MODE_8BIT	include/mmc.h	/^#define MMC_MODE_8BIT	/;"	d
MMC_MODE_DDR_52MHz	include/mmc.h	/^#define MMC_MODE_DDR_52MHz	/;"	d
MMC_MODE_HS	include/mmc.h	/^#define MMC_MODE_HS	/;"	d
MMC_MODE_HS_52MHz	include/mmc.h	/^#define MMC_MODE_HS_52MHz	/;"	d
MMC_MODE_SPI	include/mmc.h	/^#define MMC_MODE_SPI	/;"	d
MMC_NOB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_NOB	/;"	d
MMC_NUM_BOOT_PARTITION	include/mmc.h	/^#define MMC_NUM_BOOT_PARTITION	/;"	d
MMC_PART_RPMB	include/mmc.h	/^#define MMC_PART_RPMB /;"	d
MMC_PRTBUF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_PRTBUF	/;"	d
MMC_PRTBUF_BUF_PART_FULL	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_PRTBUF_BUF_PART_FULL	/;"	d
MMC_R1B_ADDR_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_ADDR_ERR	/;"	d
MMC_R1B_CARD_ECC_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_CARD_ECC_ERR	/;"	d
MMC_R1B_CC_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_CC_ERR	/;"	d
MMC_R1B_COM_CRC_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_COM_CRC_ERR	/;"	d
MMC_R1B_ERASE_PARAM	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_ERASE_PARAM	/;"	d
MMC_R1B_ERASE_RESET	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_ERASE_RESET	/;"	d
MMC_R1B_ERASE_SEQ_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_ERASE_SEQ_ERR	/;"	d
MMC_R1B_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_ERR	/;"	d
MMC_R1B_IDLE_STATE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_IDLE_STATE	/;"	d
MMC_R1B_ILLEGAL_CMD	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_ILLEGAL_CMD	/;"	d
MMC_R1B_OOR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_OOR	/;"	d
MMC_R1B_PARAM_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_PARAM_ERR	/;"	d
MMC_R1B_WP_ERASE_SKIP	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_WP_ERASE_SKIP	/;"	d
MMC_R1B_WP_VIOLATION	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1B_WP_VIOLATION	/;"	d
MMC_R1_ADDR_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_ADDR_ERR	/;"	d
MMC_R1_COM_CRC_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_COM_CRC_ERR	/;"	d
MMC_R1_ERASE_SEQ_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_ERASE_SEQ_ERR	/;"	d
MMC_R1_ERASE_STATE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_ERASE_STATE	/;"	d
MMC_R1_IDLE_STATE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_IDLE_STATE	/;"	d
MMC_R1_ILLEGAL_CMD	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_ILLEGAL_CMD	/;"	d
MMC_R1_PARAM_ERR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_R1_PARAM_ERR	/;"	d
MMC_RDTO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_RDTO	/;"	d
MMC_READ_TO_MAX_MASK	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_READ_TO_MAX_MASK	/;"	d
MMC_RES	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_RES	/;"	d
MMC_RESTO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_RESTO	/;"	d
MMC_RES_TO_MAX_MASK	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_RES_TO_MAX_MASK	/;"	d
MMC_RSP_136	include/mmc.h	/^#define MMC_RSP_136	/;"	d
MMC_RSP_136	include/mvebu_mmc.h	/^#define MMC_RSP_136	/;"	d
MMC_RSP_BUSY	include/mmc.h	/^#define MMC_RSP_BUSY	/;"	d
MMC_RSP_BUSY	include/mvebu_mmc.h	/^#define MMC_RSP_BUSY	/;"	d
MMC_RSP_CRC	include/mmc.h	/^#define MMC_RSP_CRC	/;"	d
MMC_RSP_CRC	include/mvebu_mmc.h	/^#define MMC_RSP_CRC	/;"	d
MMC_RSP_NONE	include/mmc.h	/^#define MMC_RSP_NONE	/;"	d
MMC_RSP_OPCODE	include/mmc.h	/^#define MMC_RSP_OPCODE	/;"	d
MMC_RSP_OPCODE	include/mvebu_mmc.h	/^#define MMC_RSP_OPCODE	/;"	d
MMC_RSP_PRESENT	include/mmc.h	/^#define MMC_RSP_PRESENT /;"	d
MMC_RSP_PRESENT	include/mvebu_mmc.h	/^#define MMC_RSP_PRESENT	/;"	d
MMC_RSP_R1	include/mmc.h	/^#define MMC_RSP_R1	/;"	d
MMC_RSP_R1b	include/mmc.h	/^#define MMC_RSP_R1b	/;"	d
MMC_RSP_R2	include/mmc.h	/^#define MMC_RSP_R2	/;"	d
MMC_RSP_R3	include/mmc.h	/^#define MMC_RSP_R3	/;"	d
MMC_RSP_R4	include/mmc.h	/^#define MMC_RSP_R4	/;"	d
MMC_RSP_R5	include/mmc.h	/^#define MMC_RSP_R5	/;"	d
MMC_RSP_R6	include/mmc.h	/^#define MMC_RSP_R6	/;"	d
MMC_RSP_R7	include/mmc.h	/^#define MMC_RSP_R7	/;"	d
MMC_RXFIFO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_RXFIFO	/;"	d
MMC_SDHC1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MMC_SDHC1_BASE_ADDR	/;"	d
MMC_SDHC1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MMC_SDHC1_BASE_ADDR	/;"	d
MMC_SDHC2_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MMC_SDHC2_BASE_ADDR	/;"	d
MMC_SDHC2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MMC_SDHC2_BASE_ADDR	/;"	d
MMC_SDHC3_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MMC_SDHC3_BASE_ADDR	/;"	d
MMC_SDHC3_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MMC_SDHC3_BASE_ADDR	/;"	d
MMC_SDHC4_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MMC_SDHC4_BASE_ADDR	/;"	d
MMC_SECURE_ERASE_ARG	include/mmc.h	/^#define MMC_SECURE_ERASE_ARG	/;"	d
MMC_SECURE_TRIM1_ARG	include/mmc.h	/^#define MMC_SECURE_TRIM1_ARG	/;"	d
MMC_SECURE_TRIM2_ARG	include/mmc.h	/^#define MMC_SECURE_TRIM2_ARG	/;"	d
MMC_SEL_SCLKEPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLKEPLL	/;"	d
MMC_SEL_SCLKEPLL	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLKEPLL	/;"	d
MMC_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLKMPLL	/;"	d
MMC_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLKMPLL	/;"	d
MMC_SEL_SCLKVPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLKVPLL	/;"	d
MMC_SEL_SCLKVPLL	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLKVPLL	/;"	d
MMC_SEL_SCLK_HDMI24M	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLK_HDMI24M	/;"	d
MMC_SEL_SCLK_HDMI24M	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLK_HDMI24M	/;"	d
MMC_SEL_SCLK_HDMIPHY	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLK_HDMIPHY	/;"	d
MMC_SEL_SCLK_HDMIPHY	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLK_HDMIPHY	/;"	d
MMC_SEL_SCLK_USBPHY0	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLK_USBPHY0	/;"	d
MMC_SEL_SCLK_USBPHY0	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLK_USBPHY0	/;"	d
MMC_SEL_SCLK_USBPHY1	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_SCLK_USBPHY1	/;"	d
MMC_SEL_SCLK_USBPHY1	board/samsung/trats/setup.h	/^#define MMC_SEL_SCLK_USBPHY1	/;"	d
MMC_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_XUSBXTI	/;"	d
MMC_SEL_XUSBXTI	board/samsung/trats/setup.h	/^#define MMC_SEL_XUSBXTI	/;"	d
MMC_SEL_XXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MMC_SEL_XXTI	/;"	d
MMC_SEL_XXTI	board/samsung/trats/setup.h	/^#define MMC_SEL_XXTI	/;"	d
MMC_SOFTRESET	arch/arm/include/asm/omap_mmc.h	/^#define MMC_SOFTRESET	/;"	d
MMC_SPI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_SPI	/;"	d
MMC_SPI_CMD	drivers/mmc/mmc_spi.c	/^#define MMC_SPI_CMD(/;"	d	file:
MMC_SPI_CRC_ON	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_SPI_CRC_ON	/;"	d
MMC_SPI_CS_ADDRESS	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_SPI_CS_ADDRESS	/;"	d
MMC_SPI_CS_EN	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_SPI_CS_EN	/;"	d
MMC_SPI_EN	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_SPI_EN	/;"	d
MMC_SPI_MIN_CLOCK	drivers/mmc/mmc_spi.c	/^#define MMC_SPI_MIN_CLOCK /;"	d	file:
MMC_SPI_VOLTAGE	drivers/mmc/mmc_spi.c	/^#define MMC_SPI_VOLTAGE /;"	d	file:
MMC_STAT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_STAT	/;"	d
MMC_STATE_PRG	include/mmc.h	/^#define MMC_STATE_PRG	/;"	d
MMC_STATUS_CURR_STATE	include/mmc.h	/^#define MMC_STATUS_CURR_STATE	/;"	d
MMC_STATUS_ERROR	include/mmc.h	/^#define MMC_STATUS_ERROR	/;"	d
MMC_STATUS_MASK	include/mmc.h	/^#define MMC_STATUS_MASK	/;"	d
MMC_STATUS_RDY_FOR_DATA	include/mmc.h	/^#define MMC_STATUS_RDY_FOR_DATA /;"	d
MMC_STATUS_SWITCH_ERROR	include/mmc.h	/^#define MMC_STATUS_SWITCH_ERROR	/;"	d
MMC_STAT_CLK_EN	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_CLK_EN	/;"	d
MMC_STAT_CRC_READ_ERROR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_CRC_READ_ERROR	/;"	d
MMC_STAT_CRC_WRITE_ERROR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_CRC_WRITE_ERROR	/;"	d
MMC_STAT_DATA_TRAN_DONE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_DATA_TRAN_DONE	/;"	d
MMC_STAT_END_CMD_RES	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_END_CMD_RES	/;"	d
MMC_STAT_ERRORS	drivers/mmc/pxa_mmc_gen.c	/^#define MMC_STAT_ERRORS	/;"	d	file:
MMC_STAT_PRG_DONE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_PRG_DONE	/;"	d
MMC_STAT_READ_TIME_OUT	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_READ_TIME_OUT	/;"	d
MMC_STAT_RECV_FIFO_FULL	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_RECV_FIFO_FULL	/;"	d
MMC_STAT_RES_CRC_ERROR	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_RES_CRC_ERROR	/;"	d
MMC_STAT_SPI_READ_ERROR_TOKEN	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_SPI_READ_ERROR_TOKEN	/;"	d
MMC_STAT_TIME_OUT_RESPONSE	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_TIME_OUT_RESPONSE	/;"	d
MMC_STAT_XMIT_FIFO_EMPTY	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STAT_XMIT_FIFO_EMPTY	/;"	d
MMC_STRPCL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_STRPCL	/;"	d
MMC_STRPCL_START_CLK	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STRPCL_START_CLK	/;"	d
MMC_STRPCL_STOP_CLK	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define MMC_STRPCL_STOP_CLK	/;"	d
MMC_SUNXI_SLOT_EXTRA	board/sunxi/Kconfig	/^config MMC_SUNXI_SLOT_EXTRA$/;"	c
MMC_SWITCH_MODE_CLEAR_BITS	include/mmc.h	/^#define MMC_SWITCH_MODE_CLEAR_BITS	/;"	d
MMC_SWITCH_MODE_CMD_SET	include/mmc.h	/^#define MMC_SWITCH_MODE_CMD_SET	/;"	d
MMC_SWITCH_MODE_SET_BITS	include/mmc.h	/^#define MMC_SWITCH_MODE_SET_BITS	/;"	d
MMC_SWITCH_MODE_WRITE_BYTE	include/mmc.h	/^#define MMC_SWITCH_MODE_WRITE_BYTE	/;"	d
MMC_TRIM_ARG	include/mmc.h	/^#define MMC_TRIM_ARG	/;"	d
MMC_TXFIFO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MMC_TXFIFO	/;"	d
MMC_TYPE_SDIO	include/faraday/ftsdc010.h	/^#define MMC_TYPE_SDIO	/;"	d
MMC_UNIPHIER	drivers/mmc/Kconfig	/^config MMC_UNIPHIER$/;"	c	menu:MMC Host controller Support
MMC_VDD_165_195	include/mmc.h	/^#define MMC_VDD_165_195	/;"	d
MMC_VDD_20_21	include/mmc.h	/^#define MMC_VDD_20_21	/;"	d
MMC_VDD_21_22	include/mmc.h	/^#define MMC_VDD_21_22	/;"	d
MMC_VDD_22_23	include/mmc.h	/^#define MMC_VDD_22_23	/;"	d
MMC_VDD_23_24	include/mmc.h	/^#define MMC_VDD_23_24	/;"	d
MMC_VDD_24_25	include/mmc.h	/^#define MMC_VDD_24_25	/;"	d
MMC_VDD_25_26	include/mmc.h	/^#define MMC_VDD_25_26	/;"	d
MMC_VDD_26_27	include/mmc.h	/^#define MMC_VDD_26_27	/;"	d
MMC_VDD_27_28	include/mmc.h	/^#define MMC_VDD_27_28	/;"	d
MMC_VDD_28_29	include/mmc.h	/^#define MMC_VDD_28_29	/;"	d
MMC_VDD_29_30	include/mmc.h	/^#define MMC_VDD_29_30	/;"	d
MMC_VDD_30_31	include/mmc.h	/^#define MMC_VDD_30_31	/;"	d
MMC_VDD_31_32	include/mmc.h	/^#define MMC_VDD_31_32	/;"	d
MMC_VDD_32_33	include/mmc.h	/^#define MMC_VDD_32_33	/;"	d
MMC_VDD_33_34	include/mmc.h	/^#define MMC_VDD_33_34	/;"	d
MMC_VDD_34_35	include/mmc.h	/^#define MMC_VDD_34_35	/;"	d
MMC_VDD_35_36	include/mmc.h	/^#define MMC_VDD_35_36	/;"	d
MMC_VERSION_1_2	include/mmc.h	/^#define MMC_VERSION_1_2	/;"	d
MMC_VERSION_1_4	include/mmc.h	/^#define MMC_VERSION_1_4	/;"	d
MMC_VERSION_2_2	include/mmc.h	/^#define MMC_VERSION_2_2	/;"	d
MMC_VERSION_3	include/mmc.h	/^#define MMC_VERSION_3	/;"	d
MMC_VERSION_4	include/mmc.h	/^#define MMC_VERSION_4	/;"	d
MMC_VERSION_4_1	include/mmc.h	/^#define MMC_VERSION_4_1	/;"	d
MMC_VERSION_4_2	include/mmc.h	/^#define MMC_VERSION_4_2	/;"	d
MMC_VERSION_4_3	include/mmc.h	/^#define MMC_VERSION_4_3	/;"	d
MMC_VERSION_4_41	include/mmc.h	/^#define MMC_VERSION_4_41	/;"	d
MMC_VERSION_4_5	include/mmc.h	/^#define MMC_VERSION_4_5	/;"	d
MMC_VERSION_5_0	include/mmc.h	/^#define MMC_VERSION_5_0	/;"	d
MMC_VERSION_5_1	include/mmc.h	/^#define MMC_VERSION_5_1	/;"	d
MMC_VERSION_MMC	include/mmc.h	/^#define MMC_VERSION_MMC	/;"	d
MMC_VERSION_UNKNOWN	include/mmc.h	/^#define MMC_VERSION_UNKNOWN	/;"	d
MMC_WIDTH	drivers/mmc/mv_sdhci.c	/^#define  MMC_WIDTH	/;"	d	file:
MMDC0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC0	/;"	d
MMDC0_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MMDC0_ARB_BASE_ADDR /;"	d
MMDC0_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MMDC0_ARB_BASE_ADDR /;"	d
MMDC0_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MMDC0_ARB_END_ADDR /;"	d
MMDC0_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MMDC0_ARB_END_ADDR /;"	d
MMDC0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MMDC0_BASE_ADDR	/;"	d
MMDC1	arch/arm/cpu/armv7/mx6/ddr.c	/^#define MMDC1(/;"	d	file:
MMDC1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC1	/;"	d
MMDC1_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MMDC1_ARB_BASE_ADDR /;"	d
MMDC1_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MMDC1_ARB_BASE_ADDR /;"	d
MMDC1_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MMDC1_ARB_END_ADDR /;"	d
MMDC1_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MMDC1_ARB_END_ADDR /;"	d
MMDC1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MMDC1_BASE_ADDR	/;"	d
MMDC_MAARCR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MAARCR	/;"	d
MMDC_MADPCR0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPCR0	/;"	d
MMDC_MADPCR1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPCR1	/;"	d
MMDC_MADPSR0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPSR0	/;"	d
MMDC_MADPSR1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPSR1	/;"	d
MMDC_MADPSR2	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPSR2	/;"	d
MMDC_MADPSR3	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPSR3	/;"	d
MMDC_MADPSR4	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPSR4	/;"	d
MMDC_MADPSR5	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MADPSR5	/;"	d
MMDC_MAEXIDR0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MAEXIDR0	/;"	d
MMDC_MAEXIDR1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MAEXIDR1	/;"	d
MMDC_MAGENP	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MAGENP	/;"	d
MMDC_MAPSR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MAPSR	/;"	d
MMDC_MAPSR_PWR_SAV_CTRL_STAT	include/fsl_mmdc.h	/^#define MMDC_MAPSR_PWR_SAV_CTRL_STAT	/;"	d
MMDC_MASBS0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MASBS0	/;"	d
MMDC_MASBS1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MASBS1	/;"	d
MMDC_MDASP	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDASP	/;"	d
MMDC_MDASP_MODULE0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDASP_MODULE0_VALUE	/;"	d
MMDC_MDASP_MODULE1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDASP_MODULE1_VALUE	/;"	d
MMDC_MDCFG0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDCFG0	/;"	d
MMDC_MDCFG0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDCFG0_VALUE	/;"	d
MMDC_MDCFG1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDCFG1	/;"	d
MMDC_MDCFG1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDCFG1_VALUE	/;"	d
MMDC_MDCFG2	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDCFG2	/;"	d
MMDC_MDCFG2_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDCFG2_VALUE	/;"	d
MMDC_MDCFG3LP	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDCFG3LP	/;"	d
MMDC_MDCFG3LP_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDCFG3LP_VALUE	/;"	d
MMDC_MDCTL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDCTL	/;"	d
MMDC_MDMISC	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDMISC	/;"	d
MMDC_MDMISC_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDMISC_VALUE	/;"	d
MMDC_MDMR4	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDMR4	/;"	d
MMDC_MDMRR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDMRR	/;"	d
MMDC_MDOR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDOR	/;"	d
MMDC_MDOR_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDOR_VALUE	/;"	d
MMDC_MDOTC	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDOTC	/;"	d
MMDC_MDOTC_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDOTC_VALUE	/;"	d
MMDC_MDPDC	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDPDC	/;"	d
MMDC_MDPDC_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDPDC_VALUE	/;"	d
MMDC_MDREF	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDREF	/;"	d
MMDC_MDREF_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDREF_VALUE	/;"	d
MMDC_MDRWD	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDRWD	/;"	d
MMDC_MDRWD_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDRWD_VALUE	/;"	d
MMDC_MDSCR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MDSCR	/;"	d
MMDC_MDSCR_CFG_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_CFG_VALUE	/;"	d
MMDC_MDSCR_DEASSERT_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_DEASSERT_VALUE	/;"	d
MMDC_MDSCR_MR10_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_MR10_VALUE	/;"	d
MMDC_MDSCR_MR1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_MR1_VALUE	/;"	d
MMDC_MDSCR_MR2_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_MR2_VALUE	/;"	d
MMDC_MDSCR_MR3_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_MR3_VALUE	/;"	d
MMDC_MDSCR_RST_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MDSCR_RST_VALUE	/;"	d
MMDC_MPDCCR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDCCR	/;"	d
MMDC_MPDGCTRL0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGCTRL0	/;"	d
MMDC_MPDGCTRL0_MODULE0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPDGCTRL0_MODULE0_VALUE	/;"	d
MMDC_MPDGCTRL0_MODULE1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPDGCTRL0_MODULE1_VALUE	/;"	d
MMDC_MPDGCTRL1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGCTRL1	/;"	d
MMDC_MPDGCTRL1_MODULE0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPDGCTRL1_MODULE0_VALUE	/;"	d
MMDC_MPDGCTRL1_MODULE1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPDGCTRL1_MODULE1_VALUE	/;"	d
MMDC_MPDGDLST0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGDLST0	/;"	d
MMDC_MPDGHWST0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGHWST0	/;"	d
MMDC_MPDGHWST1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGHWST1	/;"	d
MMDC_MPDGHWST2	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGHWST2	/;"	d
MMDC_MPDGHWST3	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPDGHWST3	/;"	d
MMDC_MPMUR0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPMUR0	/;"	d
MMDC_MPMUR0_FRC_MSR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPMUR0_FRC_MSR	/;"	d
MMDC_MPMUR0_FRC_MSR	include/fsl_mmdc.h	/^#define MMDC_MPMUR0_FRC_MSR	/;"	d
MMDC_MPMUR0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPMUR0_VALUE	/;"	d
MMDC_MPODTCTRL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPODTCTRL	/;"	d
MMDC_MPODTCTRL_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPODTCTRL_VALUE	/;"	d
MMDC_MPPDCMPR1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPPDCMPR1	/;"	d
MMDC_MPPDCMPR2	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPPDCMPR2	/;"	d
MMDC_MPRDDLCTL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDLCTL	/;"	d
MMDC_MPRDDLCTL_DEFAULT_DELAY	include/fsl_mmdc.h	/^#define MMDC_MPRDDLCTL_DEFAULT_DELAY	/;"	d
MMDC_MPRDDLCTL_MODULE0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPRDDLCTL_MODULE0_VALUE	/;"	d
MMDC_MPRDDLCTL_MODULE1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPRDDLCTL_MODULE1_VALUE	/;"	d
MMDC_MPRDDLHWCTL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDLHWCTL	/;"	d
MMDC_MPRDDLHWST0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDLHWST0	/;"	d
MMDC_MPRDDLHWST1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDLHWST1	/;"	d
MMDC_MPRDDLST	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDLST	/;"	d
MMDC_MPRDDQBY0DL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDQBY0DL	/;"	d
MMDC_MPRDDQBY1DL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDQBY1DL	/;"	d
MMDC_MPRDDQBY2DL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDQBY2DL	/;"	d
MMDC_MPRDDQBY3DL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPRDDQBY3DL	/;"	d
MMDC_MPSWDAR0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDAR0	/;"	d
MMDC_MPSWDRDR0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR0	/;"	d
MMDC_MPSWDRDR1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR1	/;"	d
MMDC_MPSWDRDR2	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR2	/;"	d
MMDC_MPSWDRDR3	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR3	/;"	d
MMDC_MPSWDRDR4	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR4	/;"	d
MMDC_MPSWDRDR5	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR5	/;"	d
MMDC_MPSWDRDR6	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR6	/;"	d
MMDC_MPSWDRDR7	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPSWDRDR7	/;"	d
MMDC_MPWLDECTRL0	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWLDECTRL0	/;"	d
MMDC_MPWLDECTRL1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWLDECTRL1	/;"	d
MMDC_MPWLDLST	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWLDLST	/;"	d
MMDC_MPWLGCR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWLGCR	/;"	d
MMDC_MPWLHWERR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWLHWERR	/;"	d
MMDC_MPWRDLCTL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWRDLCTL	/;"	d
MMDC_MPWRDLCTL_MODULE0_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPWRDLCTL_MODULE0_VALUE	/;"	d
MMDC_MPWRDLCTL_MODULE1_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPWRDLCTL_MODULE1_VALUE	/;"	d
MMDC_MPWRDLHWCTL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWRDLHWCTL	/;"	d
MMDC_MPWRDLHWST1	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWRDLHWST1	/;"	d
MMDC_MPWRDLHWST2	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWRDLHWST2	/;"	d
MMDC_MPWRDLST	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPWRDLST	/;"	d
MMDC_MPZQHWCTRL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPZQHWCTRL	/;"	d
MMDC_MPZQHWCTRL_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPZQHWCTRL_VALUE	/;"	d
MMDC_MPZQHWCTRL_ZQ_HW_FOR	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPZQHWCTRL_ZQ_HW_FOR	/;"	d
MMDC_MPZQLP2CTL	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define MMDC_MPZQLP2CTL	/;"	d
MMDC_MPZQLP2CTL_VALUE	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define MMDC_MPZQLP2CTL_VALUE	/;"	d
MMDC_P0_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MMDC_P0_BASE_ADDR /;"	d
MMDC_P1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MMDC_P1_BASE_ADDR /;"	d
MMD_ACCESS_CONTROL	include/micrel.h	/^#define MMD_ACCESS_CONTROL	/;"	d
MMD_ACCESS_REG_DATA	include/micrel.h	/^#define MMD_ACCESS_REG_DATA	/;"	d
MMODE_BOUNDARY	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_BOUNDARY	/;"	d
MMODE_BURST_WIDTH	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_BURST_WIDTH	/;"	d
MMODE_BYTE_BURST	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_BYTE_BURST	/;"	d
MMODE_HBUSREQ	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_HBUSREQ	/;"	d
MMODE_HTRANS	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_HTRANS	/;"	d
MMODE_SINGLE_MODE	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_SINGLE_MODE	/;"	d
MMODE_WR_INCR	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define MMODE_WR_INCR	/;"	d
MMR_UART	arch/blackfin/include/asm/serial1.h	/^#define MMR_UART(/;"	d
MMR_UART	arch/blackfin/include/asm/serial4.h	/^#define MMR_UART(/;"	d
MMSELR	arch/sh/include/asm/cpu_sh7724.h	/^#define MMSELR	/;"	d
MMSELR	arch/sh/include/asm/cpu_sh7780.h	/^#define	MMSELR	/;"	d
MMSELR	arch/sh/include/asm/cpu_sh7785.h	/^#define MMSELR	/;"	d
MMSELR_A	board/renesas/ecovec/lowlevel_init.S	/^MMSELR_A:	.long	MMSELR$/;"	l
MMSELR_A	board/renesas/r7780mp/lowlevel_init.S	/^MMSELR_A:		.long	MMSELR$/;"	l
MMSELR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^MMSELR_A:	.long	0xFE600020$/;"	l
MMSELR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^MMSELR_A:      .long   0xfc400020$/;"	l
MMSELR_D	board/renesas/ecovec/lowlevel_init.S	/^MMSELR_D:	.long	0xA5A50000$/;"	l
MMSELR_D	board/renesas/r7780mp/lowlevel_init.S	/^MMSELR_D:		.long	0xA5A50003$/;"	l
MMSELR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^MMSELR_D:	.long	0xa5a50000$/;"	l
MMSELR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^MMSELR_D:      .long   0xa5a50002$/;"	l
MMSELR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^MMSELR_D:      .long   0xa5a50005$/;"	l
MMSEL_A	board/espt/lowlevel_init.S	/^MMSEL_A:	.long	0xFE600020$/;"	l
MMSEL_D	board/espt/lowlevel_init.S	/^MMSEL_D:	.long	0xA5A50000$/;"	l
MMUCFG_MAVN	arch/powerpc/include/asm/processor.h	/^#define MMUCFG_MAVN	/;"	d
MMUCFG_MAVN_V1	arch/powerpc/include/asm/processor.h	/^#define MMUCFG_MAVN_V1	/;"	d
MMUCFG_MAVN_V2	arch/powerpc/include/asm/processor.h	/^#define MMUCFG_MAVN_V2	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7706.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7710.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7720.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7722.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7723.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7724.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7750.h	/^#define MMUCR	/;"	d
MMUCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	MMUCR	/;"	d
MMUCR_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^MMUCR_A:	.long	0xFF000010$/;"	l
MMUCR_A	board/espt/lowlevel_init.S	/^MMUCR_A:	.long	0xFF000010$/;"	l
MMUCR_A	board/ms7722se/lowlevel_init.S	/^MMUCR_A:	.long	MMUCR$/;"	l
MMUCR_A	board/renesas/MigoR/lowlevel_init.S	/^MMUCR_A:	.long	MMUCR$/;"	l
MMUCR_A	board/renesas/ecovec/lowlevel_init.S	/^MMUCR_A:	.long	MMUCR$/;"	l
MMUCR_A	board/renesas/r0p7734/lowlevel_init.S	/^MMUCR_A:	.long	0xFF000010$/;"	l
MMUCR_A	board/renesas/r2dplus/lowlevel_init.S	/^MMUCR_A:	.long	MMUCR		\/* MMUCCR Address *\/$/;"	l
MMUCR_A	board/renesas/r7780mp/lowlevel_init.S	/^MMUCR_A:		.long	MMUCR$/;"	l
MMUCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^MMUCR_A:		.long	0xff000010$/;"	l
MMUCR_A	board/renesas/sh7753evb/lowlevel_init.S	/^MMUCR_A:		.long	0xff000010$/;"	l
MMUCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^MMUCR_A:		.long	0xff000010$/;"	l
MMUCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^MMUCR_A:	.long	0xFF000010$/;"	l
MMUCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^MMUCR_A:	.long	0xff000010$/;"	l
MMUCR_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^MMUCR_D:	.long	0x00000004$/;"	l
MMUCR_D	board/ms7722se/lowlevel_init.S	/^MMUCR_D:	.long	0x00000004$/;"	l
MMUCR_D	board/renesas/MigoR/lowlevel_init.S	/^MMUCR_D:	.long	0x00000004$/;"	l
MMUCR_D	board/renesas/ecovec/lowlevel_init.S	/^MMUCR_D:	.long	0x00000004$/;"	l
MMUCR_D	board/renesas/r0p7734/lowlevel_init.S	/^MMUCR_D:	.long	0x00000004$/;"	l
MMUCR_D	board/renesas/r2dplus/lowlevel_init.S	/^MMUCR_D:	.long	0x00000000	\/* MMUCCR Data *\/$/;"	l
MMUCR_D	board/renesas/r7780mp/lowlevel_init.S	/^MMUCR_D:		.long	0x00000004$/;"	l
MMUCR_D	board/renesas/sh7752evb/lowlevel_init.S	/^MMUCR_D:		.long	0x00000004	\/* clear ITLB *\/$/;"	l
MMUCR_D	board/renesas/sh7753evb/lowlevel_init.S	/^MMUCR_D:		.long	0x00000004	\/* clear ITLB *\/$/;"	l
MMUCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^MMUCR_D:		.long	0x00000004	\/* clear ITLB *\/$/;"	l
MMUCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^MMUCR_D:	.long	0x00000004	\/* clear ITLB *\/$/;"	l
MMUCSR0	arch/powerpc/include/asm/processor.h	/^#define MMUCSR0	/;"	d
MMU_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define MMU_BASE	/;"	d
MMU_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define MMU_BASE	/;"	d
MMU_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define MMU_BASE	/;"	d
MMU_CMD_REG	drivers/net/smc91111.h	/^#define MMU_CMD_REG	/;"	d
MMU_PAGE_ADDR_MASK	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_PAGE_ADDR_MASK	/;"	d
MMU_PAGE_SHIFT	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_PAGE_SHIFT	/;"	d
MMU_PAGE_SIZE	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_PAGE_SIZE	/;"	d
MMU_SECTION_SHIFT	arch/arm/include/asm/system.h	/^	MMU_SECTION_SHIFT	= 21, \/* 2MB *\/$/;"	e	enum:__anona021e53f0103
MMU_SECTION_SHIFT	arch/arm/include/asm/system.h	/^#define MMU_SECTION_SHIFT	/;"	d
MMU_SECTION_SIZE	arch/arm/include/asm/system.h	/^	MMU_SECTION_SIZE	= 1 << MMU_SECTION_SHIFT,$/;"	e	enum:__anona021e53f0103
MMU_SECTION_SIZE	arch/arm/include/asm/system.h	/^#define MMU_SECTION_SIZE	/;"	d
MMU_VMR_CACHE_NONE	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_VMR_CACHE_NONE	/;"	d
MMU_VMR_CACHE_WBUF	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_VMR_CACHE_WBUF	/;"	d
MMU_VMR_CACHE_WRBACK	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_VMR_CACHE_WRBACK	/;"	d
MMU_VMR_CACHE_WRTHRU	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define MMU_VMR_CACHE_WRTHRU	/;"	d
MMU_context	arch/powerpc/include/asm/mmu.h	/^} MMU_context;$/;"	t	typeref:struct:_MMU_context
MM_APER	include/radeon.h	/^#define MM_APER	/;"	d
MM_DATA	include/radeon.h	/^#define MM_DATA	/;"	d
MM_INDEX	include/radeon.h	/^#define MM_INDEX	/;"	d
MM_SWITCH	drivers/spi/ti_qspi.c	/^#define MM_SWITCH /;"	d	file:
MOBILE_WHITEBAR_32	arch/arm/mach-exynos/include/mach/dp_info.h	/^	MOBILE_WHITEBAR_32,$/;"	e	enum:pattern_type
MOBILE_WHITEBAR_64	arch/arm/mach-exynos/include/mach/dp_info.h	/^	MOBILE_WHITEBAR_64$/;"	e	enum:pattern_type
MOCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MOCR	/;"	d
MOCR_FEIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MOCR_FEIE	/;"	d
MOD	lib/zlib/adler32.c	/^#  define MOD(/;"	d	file:
MOD4	lib/zlib/adler32.c	/^#  define MOD4(/;"	d	file:
MODE	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define MODE(/;"	d
MODE	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define MODE(/;"	d
MODE	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define MODE(/;"	d
MODE	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define MODE(/;"	d
MODE	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define MODE(/;"	d
MODE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define MODE	/;"	d
MODE	drivers/power/regulator/max77686.c	/^#define MODE(/;"	d	file:
MODE	drivers/power/regulator/pfuze100.c	/^#define MODE(/;"	d	file:
MODE	drivers/power/regulator/sandbox.c	/^#define MODE(/;"	d	file:
MODEL_LOCK1	include/power/max17042_fg.h	/^#define MODEL_LOCK1	/;"	d
MODEL_LOCK1	include/power/max77693_fg.h	/^#define MODEL_LOCK1	/;"	d
MODEL_LOCK2	include/power/max17042_fg.h	/^#define MODEL_LOCK2	/;"	d
MODEL_LOCK2	include/power/max77693_fg.h	/^#define MODEL_LOCK2	/;"	d
MODEL_UNLOCK1	include/power/max17042_fg.h	/^#define MODEL_UNLOCK1	/;"	d
MODEL_UNLOCK1	include/power/max77693_fg.h	/^#define MODEL_UNLOCK1	/;"	d
MODEL_UNLOCK2	include/power/max17042_fg.h	/^#define MODEL_UNLOCK2	/;"	d
MODEL_UNLOCK2	include/power/max77693_fg.h	/^#define MODEL_UNLOCK2	/;"	d
MODEMR	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define MODEMR	/;"	d	file:
MODEMR	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^MODEMR:		.long	0xFFCC0020$/;"	l
MODEMR	board/renesas/r0p7734/lowlevel_init.S	/^MODEMR:		.long	0xFFCC0020$/;"	l
MODEMR	board/renesas/r0p7734/r0p7734.c	/^#define MODEMR	/;"	d	file:
MODEMR_533MHZ	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define MODEMR_533MHZ	/;"	d	file:
MODEMR_533MHZ	board/renesas/r0p7734/r0p7734.c	/^#define MODEMR_533MHZ	/;"	d	file:
MODEMR_MASK	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define MODEMR_MASK	/;"	d	file:
MODEMR_MASK	board/renesas/r0p7734/r0p7734.c	/^#define MODEMR_MASK	/;"	d	file:
MODER	arch/sh/include/asm/cpu_sh7722.h	/^#define MODER /;"	d
MODER	arch/sh/include/asm/cpu_sh7780.h	/^#define	MODER	/;"	d
MODER	drivers/net/ethoc.c	/^#define	MODER	/;"	d	file:
MODER_BRO	drivers/net/ethoc.c	/^#define	MODER_BRO	/;"	d	file:
MODER_CRC	drivers/net/ethoc.c	/^#define	MODER_CRC	/;"	d	file:
MODER_DCRC	drivers/net/ethoc.c	/^#define	MODER_DCRC	/;"	d	file:
MODER_EDE	drivers/net/ethoc.c	/^#define	MODER_EDE	/;"	d	file:
MODER_FULLD	drivers/net/ethoc.c	/^#define	MODER_FULLD	/;"	d	file:
MODER_HUGE	drivers/net/ethoc.c	/^#define	MODER_HUGE	/;"	d	file:
MODER_IAM	drivers/net/ethoc.c	/^#define	MODER_IAM	/;"	d	file:
MODER_IFG	drivers/net/ethoc.c	/^#define	MODER_IFG	/;"	d	file:
MODER_LOOP	drivers/net/ethoc.c	/^#define	MODER_LOOP	/;"	d	file:
MODER_NBO	drivers/net/ethoc.c	/^#define	MODER_NBO	/;"	d	file:
MODER_NOPRE	drivers/net/ethoc.c	/^#define	MODER_NOPRE	/;"	d	file:
MODER_PAD	drivers/net/ethoc.c	/^#define	MODER_PAD	/;"	d	file:
MODER_PRO	drivers/net/ethoc.c	/^#define	MODER_PRO	/;"	d	file:
MODER_RESET	drivers/net/ethoc.c	/^#define	MODER_RESET	/;"	d	file:
MODER_RSM	drivers/net/ethoc.c	/^#define	MODER_RSM	/;"	d	file:
MODER_RXEN	drivers/net/ethoc.c	/^#define	MODER_RXEN	/;"	d	file:
MODER_TXEN	drivers/net/ethoc.c	/^#define	MODER_TXEN	/;"	d	file:
MODESEL0	arch/sh/include/asm/cpu_sh7734.h	/^#define MODESEL0 /;"	d
MODESEL2	arch/sh/include/asm/cpu_sh7734.h	/^#define MODESEL2 /;"	d
MODESEL2_INIT	arch/sh/include/asm/cpu_sh7734.h	/^#define MODESEL2_INIT /;"	d
MODE_00	drivers/mtd/nand/denali.h	/^#define MODE_00 /;"	d
MODE_01	drivers/mtd/nand/denali.h	/^#define MODE_01 /;"	d
MODE_10	drivers/mtd/nand/denali.h	/^#define MODE_10 /;"	d
MODE_11	drivers/mtd/nand/denali.h	/^#define MODE_11 /;"	d
MODE_1TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MODE_1TO1 /;"	d
MODE_2TO1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MODE_2TO1 /;"	d
MODE_BGR_P	drivers/video/exynos/exynos_fb.c	/^	MODE_BGR_P = 1,$/;"	e	enum:exynos_fb_rgb_mode_t	file:
MODE_BGR_P	include/exynos_lcd.h	/^	MODE_BGR_P = 1,$/;"	e	enum:exynos_fb_rgb_mode_t
MODE_BGR_S	drivers/video/exynos/exynos_fb.c	/^	MODE_BGR_S = 3,$/;"	e	enum:exynos_fb_rgb_mode_t	file:
MODE_BGR_S	include/exynos_lcd.h	/^	MODE_BGR_S = 3,$/;"	e	enum:exynos_fb_rgb_mode_t
MODE_CASLAT	board/tqc/tqm834x/tqm834x.c	/^#define MODE_CASLAT	/;"	d	file:
MODE_DMA	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define MODE_DMA	/;"	d
MODE_EXCEPTION	arch/avr32/include/asm/ptrace.h	/^#define MODE_EXCEPTION	/;"	d
MODE_FUNC	arch/arm/include/asm/omap_mmc.h	/^#define MODE_FUNC	/;"	d
MODE_GEN_DATA	tools/bmp_logo.c	/^	MODE_GEN_DATA$/;"	e	enum:__anonced3efe50103	file:
MODE_GEN_INFO	tools/bmp_logo.c	/^	MODE_GEN_INFO,$/;"	e	enum:__anonced3efe50103	file:
MODE_I2C_READ	include/linux/drm_dp_helper.h	/^#define MODE_I2C_READ	/;"	d
MODE_I2C_START	include/linux/drm_dp_helper.h	/^#define MODE_I2C_START	/;"	d
MODE_I2C_STOP	include/linux/drm_dp_helper.h	/^#define MODE_I2C_STOP	/;"	d
MODE_I2C_WRITE	include/linux/drm_dp_helper.h	/^#define MODE_I2C_WRITE	/;"	d
MODE_INT0	arch/avr32/include/asm/ptrace.h	/^#define MODE_INT0	/;"	d
MODE_INT1	arch/avr32/include/asm/ptrace.h	/^#define MODE_INT1	/;"	d
MODE_INT2	arch/avr32/include/asm/ptrace.h	/^#define MODE_INT2	/;"	d
MODE_INT3	arch/avr32/include/asm/ptrace.h	/^#define MODE_INT3	/;"	d
MODE_MASK	arch/arm/include/asm/proc-armv/ptrace.h	/^#define MODE_MASK	/;"	d
MODE_MASK	arch/avr32/include/asm/ptrace.h	/^#define MODE_MASK	/;"	d
MODE_MASK	arch/nds32/include/asm/ptrace.h	/^#define MODE_MASK	/;"	d
MODE_MSK_BOOT_CA15	board/renesas/stout/cpld.h	/^#define MODE_MSK_BOOT_CA15	/;"	d
MODE_MSK_BOOT_CA7	board/renesas/stout/cpld.h	/^#define MODE_MSK_BOOT_CA7	/;"	d
MODE_MSK_BOOT_SH4	board/renesas/stout/cpld.h	/^#define MODE_MSK_BOOT_SH4	/;"	d
MODE_MSK_BOOT_SQPI_16KB_FAST	board/renesas/stout/cpld.h	/^#define MODE_MSK_BOOT_SQPI_16KB_FAST	/;"	d
MODE_MSK_BOOT_SQPI_16KB_SLOW	board/renesas/stout/cpld.h	/^#define MODE_MSK_BOOT_SQPI_16KB_SLOW	/;"	d
MODE_MSK_BOOT_SQPI_4KB_SLOW	board/renesas/stout/cpld.h	/^#define MODE_MSK_BOOT_SQPI_4KB_SLOW	/;"	d
MODE_MSK_DDR3_1333	board/renesas/stout/cpld.h	/^#define MODE_MSK_DDR3_1333	/;"	d
MODE_MSK_DDR3_1600	board/renesas/stout/cpld.h	/^#define MODE_MSK_DDR3_1600	/;"	d
MODE_MSK_FREE_RUN	board/renesas/stout/cpld.h	/^#define MODE_MSK_FREE_RUN	/;"	d
MODE_MSK_JTAG_CORESIGHT	board/renesas/stout/cpld.h	/^#define MODE_MSK_JTAG_CORESIGHT	/;"	d
MODE_MSK_JTAG_SH4	board/renesas/stout/cpld.h	/^#define MODE_MSK_JTAG_SH4	/;"	d
MODE_MSK_PHY0_PCIE	board/renesas/stout/cpld.h	/^#define MODE_MSK_PHY0_PCIE	/;"	d
MODE_MSK_PHY0_SATA0	board/renesas/stout/cpld.h	/^#define MODE_MSK_PHY0_SATA0	/;"	d
MODE_MSK_PHY1_SATA1	board/renesas/stout/cpld.h	/^#define MODE_MSK_PHY1_SATA1	/;"	d
MODE_MSK_PHY1_USB3	board/renesas/stout/cpld.h	/^#define MODE_MSK_PHY1_USB3	/;"	d
MODE_MSK_STEP_UP	board/renesas/stout/cpld.h	/^#define MODE_MSK_STEP_UP	/;"	d
MODE_NMI	arch/avr32/include/asm/ptrace.h	/^#define MODE_NMI	/;"	d
MODE_PRODUCTION	arch/arm/include/asm/arch-tegra/warmboot.h	/^	MODE_PRODUCTION = 3,$/;"	e	enum:fuse_operating_mode
MODE_READ	arch/arm/lib/semihosting.c	/^#define MODE_READ	/;"	d	file:
MODE_READBIN	arch/arm/lib/semihosting.c	/^#define MODE_READBIN	/;"	d	file:
MODE_RESET	arch/arm/cpu/armv8/zynqmp/spl.c	/^# define MODE_RESET	/;"	d	file:
MODE_RGB_P	drivers/video/exynos/exynos_fb.c	/^	MODE_RGB_P = 0,$/;"	e	enum:exynos_fb_rgb_mode_t	file:
MODE_RGB_P	include/exynos_lcd.h	/^	MODE_RGB_P = 0,$/;"	e	enum:exynos_fb_rgb_mode_t
MODE_RGB_S	drivers/video/exynos/exynos_fb.c	/^	MODE_RGB_S = 2,$/;"	e	enum:exynos_fb_rgb_mode_t	file:
MODE_RGB_S	include/exynos_lcd.h	/^	MODE_RGB_S = 2,$/;"	e	enum:exynos_fb_rgb_mode_t
MODE_SELECT	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define MODE_SELECT	/;"	d
MODE_SHIFT	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define MODE_SHIFT /;"	d
MODE_SHIFT	arch/avr32/include/asm/ptrace.h	/^#define MODE_SHIFT	/;"	d
MODE_SLAVE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define MODE_SLAVE	/;"	d
MODE_SUPERVISOR	arch/avr32/include/asm/ptrace.h	/^#define MODE_SUPERVISOR	/;"	d
MODE_SVC	arch/arm/lib/vectors.S	/^#define MODE_SVC /;"	d	file:
MODE_SW	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define MODE_SW	/;"	d	file:
MODE_UNDEFINED	arch/arm/include/asm/arch-tegra/warmboot.h	/^	MODE_UNDEFINED,$/;"	e	enum:fuse_operating_mode
MODE_USER	arch/avr32/include/asm/ptrace.h	/^#define MODE_USER	/;"	d
MODE_VAL_BOOT_CA15	board/renesas/stout/cpld.h	/^#define MODE_VAL_BOOT_CA15	/;"	d
MODE_VAL_BOOT_CA7	board/renesas/stout/cpld.h	/^#define MODE_VAL_BOOT_CA7	/;"	d
MODE_VAL_BOOT_SH4	board/renesas/stout/cpld.h	/^#define MODE_VAL_BOOT_SH4	/;"	d
MODE_VAL_BOOT_SQPI_16KB_FAST	board/renesas/stout/cpld.h	/^#define MODE_VAL_BOOT_SQPI_16KB_FAST	/;"	d
MODE_VAL_BOOT_SQPI_16KB_SLOW	board/renesas/stout/cpld.h	/^#define MODE_VAL_BOOT_SQPI_16KB_SLOW	/;"	d
MODE_VAL_BOOT_SQPI_4KB_SLOW	board/renesas/stout/cpld.h	/^#define MODE_VAL_BOOT_SQPI_4KB_SLOW	/;"	d
MODE_VAL_DDR3_1333	board/renesas/stout/cpld.h	/^#define MODE_VAL_DDR3_1333	/;"	d
MODE_VAL_DDR3_1600	board/renesas/stout/cpld.h	/^#define MODE_VAL_DDR3_1600	/;"	d
MODE_VAL_FREE_RUN	board/renesas/stout/cpld.h	/^#define MODE_VAL_FREE_RUN	/;"	d
MODE_VAL_JTAG_CORESIGHT	board/renesas/stout/cpld.h	/^#define MODE_VAL_JTAG_CORESIGHT	/;"	d
MODE_VAL_JTAG_SH4	board/renesas/stout/cpld.h	/^#define MODE_VAL_JTAG_SH4	/;"	d
MODE_VAL_PHY0_PCIE	board/renesas/stout/cpld.h	/^#define MODE_VAL_PHY0_PCIE	/;"	d
MODE_VAL_PHY0_SATA0	board/renesas/stout/cpld.h	/^#define MODE_VAL_PHY0_SATA0	/;"	d
MODE_VAL_PHY1_SATA1	board/renesas/stout/cpld.h	/^#define MODE_VAL_PHY1_SATA1	/;"	d
MODE_VAL_PHY1_USB3	board/renesas/stout/cpld.h	/^#define MODE_VAL_PHY1_USB3	/;"	d
MODE_VAL_STEP_UP	board/renesas/stout/cpld.h	/^#define MODE_VAL_STEP_UP	/;"	d
MODF	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define MODF	/;"	d
MODR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MODR	/;"	d
MODULE_ALIAS	include/linux/compat.h	/^#define MODULE_ALIAS(/;"	d
MODULE_AUTHOR	include/linux/compat.h	/^#define MODULE_AUTHOR(/;"	d
MODULE_CLKCTRL_IDLEST_DISABLED	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_IDLEST_DISABLED	/;"	d
MODULE_CLKCTRL_IDLEST_DISABLED	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_IDLEST_DISABLED	/;"	d
MODULE_CLKCTRL_IDLEST_DISABLED	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_IDLEST_DISABLED	/;"	d
MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL	/;"	d
MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL	/;"	d
MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL	/;"	d
MODULE_CLKCTRL_IDLEST_IDLE	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_IDLEST_IDLE	/;"	d
MODULE_CLKCTRL_IDLEST_IDLE	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_IDLEST_IDLE	/;"	d
MODULE_CLKCTRL_IDLEST_IDLE	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_IDLEST_IDLE	/;"	d
MODULE_CLKCTRL_IDLEST_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_IDLEST_MASK	/;"	d
MODULE_CLKCTRL_IDLEST_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_IDLEST_MASK	/;"	d
MODULE_CLKCTRL_IDLEST_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_IDLEST_MASK	/;"	d
MODULE_CLKCTRL_IDLEST_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_IDLEST_SHIFT	/;"	d
MODULE_CLKCTRL_IDLEST_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_IDLEST_SHIFT	/;"	d
MODULE_CLKCTRL_IDLEST_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_IDLEST_SHIFT	/;"	d
MODULE_CLKCTRL_IDLEST_TRANSITIONING	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_IDLEST_TRANSITIONING	/;"	d
MODULE_CLKCTRL_IDLEST_TRANSITIONING	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_IDLEST_TRANSITIONING	/;"	d
MODULE_CLKCTRL_IDLEST_TRANSITIONING	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_IDLEST_TRANSITIONING	/;"	d
MODULE_CLKCTRL_MODULEMODE_HW_AUTO	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_HW_AUTO	/;"	d
MODULE_CLKCTRL_MODULEMODE_HW_AUTO	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_HW_AUTO	/;"	d
MODULE_CLKCTRL_MODULEMODE_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_MASK	/;"	d
MODULE_CLKCTRL_MODULEMODE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_MASK	/;"	d
MODULE_CLKCTRL_MODULEMODE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_MASK	/;"	d
MODULE_CLKCTRL_MODULEMODE_SHIFT	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SHIFT	/;"	d
MODULE_CLKCTRL_MODULEMODE_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SHIFT	/;"	d
MODULE_CLKCTRL_MODULEMODE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SHIFT	/;"	d
MODULE_CLKCTRL_MODULEMODE_SW_DISABLE	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SW_DISABLE	/;"	d
MODULE_CLKCTRL_MODULEMODE_SW_DISABLE	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SW_DISABLE	/;"	d
MODULE_CLKCTRL_MODULEMODE_SW_DISABLE	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SW_DISABLE	/;"	d
MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN	arch/arm/include/asm/arch-am33xx/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN	/;"	d
MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN	arch/arm/include/asm/arch-omap4/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN	/;"	d
MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN	arch/arm/include/asm/arch-omap5/clock.h	/^#define MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN	/;"	d
MODULE_DESCRIPTION	include/linux/compat.h	/^#define MODULE_DESCRIPTION(/;"	d
MODULE_LICENSE	include/linux/compat.h	/^#define MODULE_LICENSE(/;"	d
MODULE_NAME	board/tqc/tqm5200/tqm5200.c	/^# define MODULE_NAME	/;"	d	file:
MODULE_NAME_MAXLEN	board/cm5200/cm5200.h	/^#define MODULE_NAME_MAXLEN	/;"	d
MODULE_PARM_DESC	include/linux/compat.h	/^#define MODULE_PARM_DESC(/;"	d
MODULE_VERSION	include/linux/compat.h	/^#define MODULE_VERSION(/;"	d
MODVERDIR	Makefile	/^export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))\/).tmp_versions$/;"	m
MOD_BCLK_16FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BCLK_16FS	/;"	d
MOD_BCLK_24FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BCLK_24FS	/;"	d
MOD_BCLK_32FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BCLK_32FS	/;"	d
MOD_BCLK_48FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BCLK_48FS	/;"	d
MOD_BCLK_MASK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BCLK_MASK	/;"	d
MOD_BLCP_16BIT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLCP_16BIT	/;"	d
MOD_BLCP_24BIT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLCP_24BIT	/;"	d
MOD_BLCP_8BIT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLCP_8BIT	/;"	d
MOD_BLCP_MASK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLCP_MASK	/;"	d
MOD_BLCP_SHIFT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLCP_SHIFT	/;"	d
MOD_BLC_16BIT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLC_16BIT	/;"	d
MOD_BLC_24BIT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLC_24BIT	/;"	d
MOD_BLC_8BIT	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLC_8BIT	/;"	d
MOD_BLC_MASK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_BLC_MASK	/;"	d
MOD_CDCLKCON	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_CDCLKCON	/;"	d
MOD_LR_LLOW	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_LR_LLOW	/;"	d
MOD_LR_RLOW	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_LR_RLOW	/;"	d
MOD_MASK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_MASK	/;"	d
MOD_OP_CLK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_OP_CLK	/;"	d
MOD_RCLKSRC	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_RCLKSRC	/;"	d
MOD_RCLK_256FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_RCLK_256FS	/;"	d
MOD_RCLK_384FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_RCLK_384FS	/;"	d
MOD_RCLK_512FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_RCLK_512FS	/;"	d
MOD_RCLK_768FS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_RCLK_768FS	/;"	d
MOD_RCLK_MASK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_RCLK_MASK	/;"	d
MOD_SDF_IIS	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_SDF_IIS	/;"	d
MOD_SDF_LSB	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_SDF_LSB	/;"	d
MOD_SDF_MASK	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_SDF_MASK	/;"	d
MOD_SDF_MSB	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_SDF_MSB	/;"	d
MOD_SLAVE	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define MOD_SLAVE	/;"	d
MONITOR	net/link_local.c	/^	MONITOR,$/;"	e	enum:ll_state_t	file:
MONITOR_CCI0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MONITOR_CCI0_BASE_ADDR	/;"	d
MONITOR_DDR0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MONITOR_DDR0_BASE_ADDR	/;"	d
MONOCHROME	drivers/video/da8xx-fb.h	/^	MONOCHROME = 0,$/;"	e	enum:panel_shade
MONOTONIC_MS	net/link_local.c	/^#define MONOTONIC_MS(/;"	d	file:
MONSPERYEAR	include/linux/time.h	/^#define MONSPERYEAR	/;"	d
MORECORE	include/malloc.h	/^#define MORECORE /;"	d
MORECORE_CLEARS	include/malloc.h	/^#define MORECORE_CLEARS /;"	d
MORECORE_FAILURE	include/malloc.h	/^#define MORECORE_FAILURE /;"	d
MOSCS_Loop	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^MOSCS_Loop:$/;"	l
MOSCS_Loop1	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^MOSCS_Loop1:$/;"	l
MOSI	board/renesas/stout/cpld.c	/^#define MOSI	/;"	d	file:
MOSI_IO0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MOSI_IO0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
MOSI_IO0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,$/;"	e	enum:__anona307879b0103	file:
MOSI_MPP6	arch/arm/include/asm/arch-mvebu/spi.h	/^#define MOSI_MPP6	/;"	d
MOSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MOSR	/;"	d
MOSR_FIFOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MOSR_FIFOE	/;"	d
MOUNT_ADDENTRY	net/nfs.h	/^#define MOUNT_ADDENTRY /;"	d
MOUNT_ROOT_RDONLY	arch/sh/include/asm/zimage.h	/^#define MOUNT_ROOT_RDONLY	/;"	d
MOUNT_UMOUNTALL	net/nfs.h	/^#define MOUNT_UMOUNTALL /;"	d
MOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MOUT0_MARK,$/;"	e	enum:__anona3077f190103	file:
MOUT0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MOUT0_MARK,$/;"	e	enum:__anona307945e0103	file:
MOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,$/;"	e	enum:__anona3077f190103	file:
MOUT1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MOUT1_MARK,$/;"	e	enum:__anona307945e0103	file:
MOUT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK,$/;"	e	enum:__anona3077f190103	file:
MOUT2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MOUT2_MARK,$/;"	e	enum:__anona307945e0103	file:
MOUT5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
MOUT5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MOUT5_MARK,$/;"	e	enum:__anona307945e0103	file:
MOUT6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
MOUT6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MOUT6_MARK,$/;"	e	enum:__anona307945e0103	file:
MOUTG3D_0	arch/arm/mach-exynos/exynos4_setup.h	/^#define MOUTG3D_0	/;"	d
MOUTMFC_0	arch/arm/mach-exynos/exynos4_setup.h	/^#define MOUTMFC_0	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_FSYS1_PHYCLK_SEL1	include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_FSYS1_PHYCLK_SEL1	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOUT_SCLK_UFSUNIPRO20	include/dt-bindings/clock/exynos7420-clk.h	/^#define MOUT_SCLK_UFSUNIPRO20	/;"	d
MOVELEN_MRSEL_MASK	drivers/crypto/fsl/desc.h	/^#define MOVELEN_MRSEL_MASK	/;"	d
MOVELEN_MRSEL_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVELEN_MRSEL_SHIFT	/;"	d
MOVE_AUX_LS	drivers/crypto/fsl/desc.h	/^#define MOVE_AUX_LS	/;"	d
MOVE_AUX_MASK	drivers/crypto/fsl/desc.h	/^#define MOVE_AUX_MASK	/;"	d
MOVE_AUX_MS	drivers/crypto/fsl/desc.h	/^#define MOVE_AUX_MS	/;"	d
MOVE_AUX_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVE_AUX_SHIFT	/;"	d
MOVE_CANCEL_RACE	drivers/mtd/ubi/ubi.h	/^	MOVE_CANCEL_RACE = 1,$/;"	e	enum:__anon5a04ca2c0203
MOVE_DEST_CLASS1CTX	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_CLASS1CTX	/;"	d
MOVE_DEST_CLASS1INFIFO	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_CLASS1INFIFO	/;"	d
MOVE_DEST_CLASS1KEY	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_CLASS1KEY	/;"	d
MOVE_DEST_CLASS2CTX	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_CLASS2CTX	/;"	d
MOVE_DEST_CLASS2INFIFO	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_CLASS2INFIFO	/;"	d
MOVE_DEST_CLASS2KEY	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_CLASS2KEY	/;"	d
MOVE_DEST_DESCBUF	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_DESCBUF	/;"	d
MOVE_DEST_INFIFO_NOINFO	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_INFIFO_NOINFO /;"	d
MOVE_DEST_MASK	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_MASK	/;"	d
MOVE_DEST_MATH0	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_MATH0	/;"	d
MOVE_DEST_MATH1	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_MATH1	/;"	d
MOVE_DEST_MATH2	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_MATH2	/;"	d
MOVE_DEST_MATH3	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_MATH3	/;"	d
MOVE_DEST_OUTFIFO	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_OUTFIFO	/;"	d
MOVE_DEST_PK_A	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_PK_A	/;"	d
MOVE_DEST_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVE_DEST_SHIFT	/;"	d
MOVE_LEN_MASK	drivers/crypto/fsl/desc.h	/^#define MOVE_LEN_MASK	/;"	d
MOVE_LEN_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVE_LEN_SHIFT	/;"	d
MOVE_OFFSET_MASK	drivers/crypto/fsl/desc.h	/^#define MOVE_OFFSET_MASK	/;"	d
MOVE_OFFSET_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVE_OFFSET_SHIFT	/;"	d
MOVE_RETRY	drivers/mtd/ubi/ubi.h	/^	MOVE_RETRY,$/;"	e	enum:__anon5a04ca2c0203
MOVE_SOURCE_RD_ERR	drivers/mtd/ubi/ubi.h	/^	MOVE_SOURCE_RD_ERR,$/;"	e	enum:__anon5a04ca2c0203
MOVE_SRC_CLASS1CTX	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_CLASS1CTX	/;"	d
MOVE_SRC_CLASS2CTX	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_CLASS2CTX	/;"	d
MOVE_SRC_DESCBUF	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_DESCBUF	/;"	d
MOVE_SRC_INFIFO	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_INFIFO	/;"	d
MOVE_SRC_INFIFO_CL	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_INFIFO_CL	/;"	d
MOVE_SRC_MASK	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_MASK	/;"	d
MOVE_SRC_MATH0	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_MATH0	/;"	d
MOVE_SRC_MATH1	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_MATH1	/;"	d
MOVE_SRC_MATH2	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_MATH2	/;"	d
MOVE_SRC_MATH3	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_MATH3	/;"	d
MOVE_SRC_OUTFIFO	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_OUTFIFO	/;"	d
MOVE_SRC_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVE_SRC_SHIFT	/;"	d
MOVE_TARGET_BITFLIPS	drivers/mtd/ubi/ubi.h	/^	MOVE_TARGET_BITFLIPS,$/;"	e	enum:__anon5a04ca2c0203
MOVE_TARGET_RD_ERR	drivers/mtd/ubi/ubi.h	/^	MOVE_TARGET_RD_ERR,$/;"	e	enum:__anon5a04ca2c0203
MOVE_TARGET_WR_ERR	drivers/mtd/ubi/ubi.h	/^	MOVE_TARGET_WR_ERR,$/;"	e	enum:__anon5a04ca2c0203
MOVE_WAITCOMP	drivers/crypto/fsl/desc.h	/^#define MOVE_WAITCOMP	/;"	d
MOVE_WAITCOMP_MASK	drivers/crypto/fsl/desc.h	/^#define MOVE_WAITCOMP_MASK	/;"	d
MOVE_WAITCOMP_SHIFT	drivers/crypto/fsl/desc.h	/^#define MOVE_WAITCOMP_SHIFT	/;"	d
MOVIDIA_devices	cmd/ambapp.c	/^static ambapp_device_name MOVIDIA_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
MOVN	arch/mips/include/asm/asm.h	/^#define MOVN(/;"	d
MOVZ	arch/mips/include/asm/asm.h	/^#define MOVZ(/;"	d
MPAX_SEG_128K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_128K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_128M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_128M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_16K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_16K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_16M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_16M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_1G	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_1G,$/;"	e	enum:mpax_seg_size
MPAX_SEG_1M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_1M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_256K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_256K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_256M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_256M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_2G	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_2G,$/;"	e	enum:mpax_seg_size
MPAX_SEG_2M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_2M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_32K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_32K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_32M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_32M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_4G	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_4G$/;"	e	enum:mpax_seg_size
MPAX_SEG_4K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_4K = 0x0b,$/;"	e	enum:mpax_seg_size
MPAX_SEG_4M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_4M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_512K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_512K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_512M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_512M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_64K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_64K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_64M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_64M,$/;"	e	enum:mpax_seg_size
MPAX_SEG_8K	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_8K,$/;"	e	enum:mpax_seg_size
MPAX_SEG_8M	arch/arm/mach-keystone/include/mach/msmc.h	/^	MPAX_SEG_8M,$/;"	e	enum:mpax_seg_size
MPC106_EMEAR1	include/mpc106.h	/^#define MPC106_EMEAR1	/;"	d
MPC106_EMEAR2	include/mpc106.h	/^#define MPC106_EMEAR2	/;"	d
MPC106_EMSAR1	include/mpc106.h	/^#define MPC106_EMSAR1	/;"	d
MPC106_EMSAR2	include/mpc106.h	/^#define MPC106_EMSAR2	/;"	d
MPC106_ISA_IO_BUS	include/mpc106.h	/^#define MPC106_ISA_IO_BUS	/;"	d
MPC106_ISA_IO_PHYS	include/mpc106.h	/^#define MPC106_ISA_IO_PHYS	/;"	d
MPC106_ISA_IO_SIZE	include/mpc106.h	/^#define MPC106_ISA_IO_SIZE	/;"	d
MPC106_ISA_MEM_BUS	include/mpc106.h	/^#define MPC106_ISA_MEM_BUS	/;"	d
MPC106_ISA_MEM_PHYS	include/mpc106.h	/^#define MPC106_ISA_MEM_PHYS	/;"	d
MPC106_ISA_MEM_SIZE	include/mpc106.h	/^#define MPC106_ISA_MEM_SIZE	/;"	d
MPC106_MBER	include/mpc106.h	/^#define MPC106_MBER	/;"	d
MPC106_MCCR1	include/mpc106.h	/^#define MPC106_MCCR1	/;"	d
MPC106_MCCR2	include/mpc106.h	/^#define MPC106_MCCR2	/;"	d
MPC106_MCCR3	include/mpc106.h	/^#define MPC106_MCCR3	/;"	d
MPC106_MCCR4	include/mpc106.h	/^#define MPC106_MCCR4	/;"	d
MPC106_MEAR1	include/mpc106.h	/^#define MPC106_MEAR1	/;"	d
MPC106_MSAR1	include/mpc106.h	/^#define MPC106_MSAR1	/;"	d
MPC106_PCI_IO_BUS	include/mpc106.h	/^#define MPC106_PCI_IO_BUS	/;"	d
MPC106_PCI_IO_PHYS	include/mpc106.h	/^#define MPC106_PCI_IO_PHYS	/;"	d
MPC106_PCI_IO_SIZE	include/mpc106.h	/^#define MPC106_PCI_IO_SIZE	/;"	d
MPC106_PCI_MEMORY_BUS	include/mpc106.h	/^#define	MPC106_PCI_MEMORY_BUS	/;"	d
MPC106_PCI_MEMORY_PHYS	include/mpc106.h	/^#define	MPC106_PCI_MEMORY_PHYS	/;"	d
MPC106_PCI_MEMORY_SIZE	include/mpc106.h	/^#define	MPC106_PCI_MEMORY_SIZE	/;"	d
MPC106_PCI_MEMORY_SIZE	include/mpc106.h	/^#define MPC106_PCI_MEMORY_SIZE	/;"	d
MPC106_PCI_MEM_BUS	include/mpc106.h	/^#define MPC106_PCI_MEM_BUS	/;"	d
MPC106_PCI_MEM_PHYS	include/mpc106.h	/^#define MPC106_PCI_MEM_PHYS	/;"	d
MPC106_PCI_MEM_SIZE	include/mpc106.h	/^#define MPC106_PCI_MEM_SIZE	/;"	d
MPC106_REG	include/mpc106.h	/^#define	MPC106_REG	/;"	d
MPC106_REG_ADDR	include/mpc106.h	/^#define MPC106_REG_ADDR	/;"	d
MPC106_REG_DATA	include/mpc106.h	/^#define	MPC106_REG_DATA	/;"	d
MPC2_IPF	arch/x86/include/asm/arch-quark/quark.h	/^#define MPC2_IPF	/;"	d
MPC512X	arch/powerpc/Kconfig	/^config MPC512X$/;"	c	choice:PowerPC architecture""choice207a02820104
MPC5XXX_ADDECR	include/mpc5xxx.h	/^#define MPC5XXX_ADDECR	/;"	d
MPC5XXX_ATA	include/mpc5xxx.h	/^#define MPC5XXX_ATA /;"	d
MPC5XXX_ATA_HOST_CONFIG	include/mpc5xxx.h	/^#define MPC5XXX_ATA_HOST_CONFIG /;"	d
MPC5XXX_ATA_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_ATA_IRQ	/;"	d
MPC5XXX_ATA_PIO1	include/mpc5xxx.h	/^#define MPC5XXX_ATA_PIO1 /;"	d
MPC5XXX_ATA_PIO2	include/mpc5xxx.h	/^#define MPC5XXX_ATA_PIO2 /;"	d
MPC5XXX_ATA_SHARE_COUNT	include/mpc5xxx.h	/^#define MPC5XXX_ATA_SHARE_COUNT /;"	d
MPC5XXX_BDLC_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_BDLC_IRQ	/;"	d
MPC5XXX_BOOTCS_CFG	include/mpc5xxx.h	/^#define MPC5XXX_BOOTCS_CFG	/;"	d
MPC5XXX_BOOTCS_START	include/mpc5xxx.h	/^#define MPC5XXX_BOOTCS_START	/;"	d
MPC5XXX_BOOTCS_STOP	include/mpc5xxx.h	/^#define MPC5XXX_BOOTCS_STOP	/;"	d
MPC5XXX_CCS_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_CCS_IRQ	/;"	d
MPC5XXX_CDM	include/mpc5xxx.h	/^#define MPC5XXX_CDM	/;"	d
MPC5XXX_CDM_48_FDC	include/mpc5xxx.h	/^#define MPC5XXX_CDM_48_FDC	/;"	d
MPC5XXX_CDM_BRDCRMB	include/mpc5xxx.h	/^#define MPC5XXX_CDM_BRDCRMB /;"	d
MPC5XXX_CDM_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CDM_CFG	/;"	d
MPC5XXX_CDM_CLK_ENA	include/mpc5xxx.h	/^#define MPC5XXX_CDM_CLK_ENA	/;"	d
MPC5XXX_CDM_JTAGID	include/mpc5xxx.h	/^#define MPC5XXX_CDM_JTAGID	/;"	d
MPC5XXX_CDM_PORCFG	include/mpc5xxx.h	/^#define MPC5XXX_CDM_PORCFG	/;"	d
MPC5XXX_CDM_SRESET	include/mpc5xxx.h	/^#define MPC5XXX_CDM_SRESET	/;"	d
MPC5XXX_CRIT_IRQ_BASE	include/mpc5xxx.h	/^#define MPC5XXX_CRIT_IRQ_BASE	/;"	d
MPC5XXX_CRIT_IRQ_NUM	include/mpc5xxx.h	/^#define MPC5XXX_CRIT_IRQ_NUM	/;"	d
MPC5XXX_CS0_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS0_CFG	/;"	d
MPC5XXX_CS0_START	include/mpc5xxx.h	/^#define MPC5XXX_CS0_START	/;"	d
MPC5XXX_CS0_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS0_STOP	/;"	d
MPC5XXX_CS1_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS1_CFG	/;"	d
MPC5XXX_CS1_START	include/mpc5xxx.h	/^#define MPC5XXX_CS1_START	/;"	d
MPC5XXX_CS1_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS1_STOP	/;"	d
MPC5XXX_CS2_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS2_CFG	/;"	d
MPC5XXX_CS2_START	include/mpc5xxx.h	/^#define MPC5XXX_CS2_START	/;"	d
MPC5XXX_CS2_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS2_STOP	/;"	d
MPC5XXX_CS3_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS3_CFG	/;"	d
MPC5XXX_CS3_START	include/mpc5xxx.h	/^#define MPC5XXX_CS3_START	/;"	d
MPC5XXX_CS3_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS3_STOP	/;"	d
MPC5XXX_CS4_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS4_CFG	/;"	d
MPC5XXX_CS4_START	include/mpc5xxx.h	/^#define MPC5XXX_CS4_START	/;"	d
MPC5XXX_CS4_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS4_STOP	/;"	d
MPC5XXX_CS5_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS5_CFG	/;"	d
MPC5XXX_CS5_START	include/mpc5xxx.h	/^#define MPC5XXX_CS5_START	/;"	d
MPC5XXX_CS5_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS5_STOP	/;"	d
MPC5XXX_CS6_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS6_CFG	/;"	d
MPC5XXX_CS6_START	include/mpc5xxx.h	/^#define MPC5XXX_CS6_START	/;"	d
MPC5XXX_CS6_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS6_STOP	/;"	d
MPC5XXX_CS7_CFG	include/mpc5xxx.h	/^#define MPC5XXX_CS7_CFG	/;"	d
MPC5XXX_CS7_START	include/mpc5xxx.h	/^#define MPC5XXX_CS7_START	/;"	d
MPC5XXX_CS7_STOP	include/mpc5xxx.h	/^#define MPC5XXX_CS7_STOP	/;"	d
MPC5XXX_CS_BURST	include/mpc5xxx.h	/^#define MPC5XXX_CS_BURST	/;"	d
MPC5XXX_CS_CTRL	include/mpc5xxx.h	/^#define MPC5XXX_CS_CTRL	/;"	d
MPC5XXX_CS_DEADCYCLE	include/mpc5xxx.h	/^#define MPC5XXX_CS_DEADCYCLE	/;"	d
MPC5XXX_CS_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_CS_STATUS	/;"	d
MPC5XXX_FEC	include/mpc5xxx.h	/^#define	MPC5XXX_FEC	/;"	d
MPC5XXX_FEC_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_FEC_IRQ	/;"	d
MPC5XXX_GPIO	include/mpc5xxx.h	/^#define MPC5XXX_GPIO	/;"	d
MPC5XXX_GPIO_DATA_I	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_DATA_I /;"	d
MPC5XXX_GPIO_DATA_O	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_DATA_O /;"	d
MPC5XXX_GPIO_DIR	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_DIR /;"	d
MPC5XXX_GPIO_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_ENABLE /;"	d
MPC5XXX_GPIO_ODE	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_ODE /;"	d
MPC5XXX_GPIO_OO_DATA	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_OO_DATA /;"	d
MPC5XXX_GPIO_OO_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_OO_ENABLE /;"	d
MPC5XXX_GPIO_SIMPLE_PSC1_0	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC1_0 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC1_1	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC1_1 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC1_2	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC1_2 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC1_3	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC1_3 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC2_0	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC2_0 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC2_1	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC2_1 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC2_2	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC2_2 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC2_3	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC2_3 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC3_0	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC3_0 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC3_1	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC3_1 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC3_2	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC3_2 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC3_3	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC3_3 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC3_6	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC3_6 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC3_7	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC3_7 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC6_2	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC6_2 /;"	d
MPC5XXX_GPIO_SIMPLE_PSC6_3	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SIMPLE_PSC6_3 /;"	d
MPC5XXX_GPIO_SINT_ETH_13	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_ETH_13 /;"	d
MPC5XXX_GPIO_SINT_ETH_14	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_ETH_14 /;"	d
MPC5XXX_GPIO_SINT_ETH_15	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_ETH_15 /;"	d
MPC5XXX_GPIO_SINT_ETH_16	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_ETH_16 /;"	d
MPC5XXX_GPIO_SINT_PSC3_4	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_PSC3_4 /;"	d
MPC5XXX_GPIO_SINT_PSC3_5	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_PSC3_5 /;"	d
MPC5XXX_GPIO_SINT_PSC3_8	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_PSC3_8 /;"	d
MPC5XXX_GPIO_SINT_USB1_9	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SINT_USB1_9 /;"	d
MPC5XXX_GPIO_SI_DATA	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_DATA /;"	d
MPC5XXX_GPIO_SI_DIR	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_DIR /;"	d
MPC5XXX_GPIO_SI_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_ENABLE /;"	d
MPC5XXX_GPIO_SI_IEN	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_IEN /;"	d
MPC5XXX_GPIO_SI_ITYPE	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_ITYPE /;"	d
MPC5XXX_GPIO_SI_MEN	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_MEN /;"	d
MPC5XXX_GPIO_SI_ODE	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_ODE /;"	d
MPC5XXX_GPIO_SI_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_SI_STATUS /;"	d
MPC5XXX_GPIO_WKUP_6	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_6 /;"	d
MPC5XXX_GPIO_WKUP_7	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_7 /;"	d
MPC5XXX_GPIO_WKUP_ETH17	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_ETH17 /;"	d
MPC5XXX_GPIO_WKUP_PSC1_4	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_PSC1_4 /;"	d
MPC5XXX_GPIO_WKUP_PSC2_4	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_PSC2_4 /;"	d
MPC5XXX_GPIO_WKUP_PSC3_9	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_PSC3_9 /;"	d
MPC5XXX_GPIO_WKUP_PSC6_0	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_PSC6_0 /;"	d
MPC5XXX_GPIO_WKUP_PSC6_1	include/mpc5xxx.h	/^#define MPC5XXX_GPIO_WKUP_PSC6_1 /;"	d
MPC5XXX_GPS_PORT_CONFIG	include/mpc5xxx.h	/^#define MPC5XXX_GPS_PORT_CONFIG	/;"	d
MPC5XXX_GPT	include/mpc5xxx.h	/^#define MPC5XXX_GPT	/;"	d
MPC5XXX_GPT0_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT0_COUNTER	/;"	d
MPC5XXX_GPT0_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT0_ENABLE	/;"	d
MPC5XXX_GPT0_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT0_STATUS	/;"	d
MPC5XXX_GPT1_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT1_COUNTER	/;"	d
MPC5XXX_GPT1_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT1_ENABLE	/;"	d
MPC5XXX_GPT1_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT1_STATUS	/;"	d
MPC5XXX_GPT2_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT2_COUNTER	/;"	d
MPC5XXX_GPT2_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT2_ENABLE	/;"	d
MPC5XXX_GPT2_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT2_STATUS	/;"	d
MPC5XXX_GPT3_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT3_COUNTER	/;"	d
MPC5XXX_GPT3_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT3_ENABLE	/;"	d
MPC5XXX_GPT3_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT3_STATUS	/;"	d
MPC5XXX_GPT4_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT4_COUNTER	/;"	d
MPC5XXX_GPT4_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT4_ENABLE	/;"	d
MPC5XXX_GPT4_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT4_STATUS	/;"	d
MPC5XXX_GPT5_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT5_COUNTER	/;"	d
MPC5XXX_GPT5_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT5_ENABLE	/;"	d
MPC5XXX_GPT5_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT5_STATUS	/;"	d
MPC5XXX_GPT6_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT6_COUNTER	/;"	d
MPC5XXX_GPT6_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT6_ENABLE	/;"	d
MPC5XXX_GPT6_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT6_STATUS	/;"	d
MPC5XXX_GPT7_COUNTER	include/mpc5xxx.h	/^#define MPC5XXX_GPT7_COUNTER	/;"	d
MPC5XXX_GPT7_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_GPT7_ENABLE	/;"	d
MPC5XXX_GPT7_PWMCFG	include/mpc5xxx.h	/^#define MPC5XXX_GPT7_PWMCFG	/;"	d
MPC5XXX_GPT7_STATUS	include/mpc5xxx.h	/^#define MPC5XXX_GPT7_STATUS	/;"	d
MPC5XXX_GPT_GPIO_PIN	include/mpc5xxx.h	/^#define MPC5XXX_GPT_GPIO_PIN(/;"	d
MPC5XXX_HI_INT_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_HI_INT_IRQ	/;"	d
MPC5XXX_I2C1	include/mpc5xxx.h	/^#define MPC5XXX_I2C1	/;"	d
MPC5XXX_I2C1_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_I2C1_IRQ	/;"	d
MPC5XXX_I2C2	include/mpc5xxx.h	/^#define MPC5XXX_I2C2	/;"	d
MPC5XXX_I2C2_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_I2C2_IRQ	/;"	d
MPC5XXX_ICTL	include/mpc5xxx.h	/^#define MPC5XXX_ICTL	/;"	d
MPC5XXX_ICTL_BUS_STS	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_BUS_STS	/;"	d
MPC5XXX_ICTL_CRIT	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_CRIT	/;"	d
MPC5XXX_ICTL_CRIT_STS	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_CRIT_STS	/;"	d
MPC5XXX_ICTL_EXT	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_EXT	/;"	d
MPC5XXX_ICTL_MAIN_PRIO1	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_MAIN_PRIO1	/;"	d
MPC5XXX_ICTL_MAIN_PRIO2	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_MAIN_PRIO2	/;"	d
MPC5XXX_ICTL_MAIN_STS	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_MAIN_STS	/;"	d
MPC5XXX_ICTL_PER_MASK	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_PER_MASK	/;"	d
MPC5XXX_ICTL_PER_PRIO1	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_PER_PRIO1	/;"	d
MPC5XXX_ICTL_PER_PRIO2	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_PER_PRIO2	/;"	d
MPC5XXX_ICTL_PER_PRIO3	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_PER_PRIO3	/;"	d
MPC5XXX_ICTL_PER_STS	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_PER_STS	/;"	d
MPC5XXX_ICTL_STS	include/mpc5xxx.h	/^#define MPC5XXX_ICTL_STS	/;"	d
MPC5XXX_IRDA_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_IRDA_IRQ	/;"	d
MPC5XXX_IRQ0	include/mpc5xxx.h	/^#define MPC5XXX_IRQ0	/;"	d
MPC5XXX_IRQ1	include/mpc5xxx.h	/^#define MPC5XXX_IRQ1	/;"	d
MPC5XXX_IRQ2	include/mpc5xxx.h	/^#define MPC5XXX_IRQ2	/;"	d
MPC5XXX_IRQ3	include/mpc5xxx.h	/^#define MPC5XXX_IRQ3	/;"	d
MPC5XXX_IR_RX_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_IR_RX_IRQ	/;"	d
MPC5XXX_IR_TX_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_IR_TX_IRQ	/;"	d
MPC5XXX_LPB	include/mpc5xxx.h	/^#define MPC5XXX_LPB	/;"	d
MPC5XXX_MAIN_IRQ_BASE	include/mpc5xxx.h	/^#define MPC5XXX_MAIN_IRQ_BASE	/;"	d
MPC5XXX_MAIN_IRQ_NUM	include/mpc5xxx.h	/^#define MPC5XXX_MAIN_IRQ_NUM	/;"	d
MPC5XXX_MSCAN1_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_MSCAN1_IRQ	/;"	d
MPC5XXX_MSCAN2_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_MSCAN2_IRQ	/;"	d
MPC5XXX_PCI	include/mpc5xxx.h	/^#define MPC5XXX_PCI	/;"	d
MPC5XXX_PCI_ARB	include/mpc5xxx.h	/^#define MPC5XXX_PCI_ARB	/;"	d
MPC5XXX_PCI_BAR0	include/mpc5xxx.h	/^#define MPC5XXX_PCI_BAR0	/;"	d
MPC5XXX_PCI_BAR1	include/mpc5xxx.h	/^#define MPC5XXX_PCI_BAR1	/;"	d
MPC5XXX_PCI_CAR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_CAR	/;"	d
MPC5XXX_PCI_CFG	include/mpc5xxx.h	/^#define MPC5XXX_PCI_CFG	/;"	d
MPC5XXX_PCI_CMD	include/mpc5xxx.h	/^#define MPC5XXX_PCI_CMD	/;"	d
MPC5XXX_PCI_CNTRL_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PCI_CNTRL_IRQ	/;"	d
MPC5XXX_PCI_GSCR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_GSCR	/;"	d
MPC5XXX_PCI_ICR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_ICR	/;"	d
MPC5XXX_PCI_ISR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_ISR	/;"	d
MPC5XXX_PCI_IW0BTAR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_IW0BTAR	/;"	d
MPC5XXX_PCI_IW1BTAR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_IW1BTAR	/;"	d
MPC5XXX_PCI_IW2BTAR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_IW2BTAR	/;"	d
MPC5XXX_PCI_IWCR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_IWCR	/;"	d
MPC5XXX_PCI_SCIRX_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PCI_SCIRX_IRQ	/;"	d
MPC5XXX_PCI_SCITX_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PCI_SCITX_IRQ	/;"	d
MPC5XXX_PCI_TBATR0	include/mpc5xxx.h	/^#define MPC5XXX_PCI_TBATR0	/;"	d
MPC5XXX_PCI_TBATR1	include/mpc5xxx.h	/^#define MPC5XXX_PCI_TBATR1	/;"	d
MPC5XXX_PCI_TCR	include/mpc5xxx.h	/^#define MPC5XXX_PCI_TCR	/;"	d
MPC5XXX_PERP_IRQ_BASE	include/mpc5xxx.h	/^#define MPC5XXX_PERP_IRQ_BASE	/;"	d
MPC5XXX_PERP_IRQ_NUM	include/mpc5xxx.h	/^#define MPC5XXX_PERP_IRQ_NUM	/;"	d
MPC5XXX_PSC1	include/mpc5xxx.h	/^#define	MPC5XXX_PSC1	/;"	d
MPC5XXX_PSC1_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PSC1_IRQ	/;"	d
MPC5XXX_PSC2	include/mpc5xxx.h	/^#define	MPC5XXX_PSC2	/;"	d
MPC5XXX_PSC2_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PSC2_IRQ	/;"	d
MPC5XXX_PSC3	include/mpc5xxx.h	/^#define	MPC5XXX_PSC3	/;"	d
MPC5XXX_PSC3_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PSC3_IRQ	/;"	d
MPC5XXX_PSC4	include/mpc5xxx.h	/^#define	MPC5XXX_PSC4	/;"	d
MPC5XXX_PSC4_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PSC4_IRQ	/;"	d
MPC5XXX_PSC5	include/mpc5xxx.h	/^#define	MPC5XXX_PSC5	/;"	d
MPC5XXX_PSC5_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PSC5_IRQ	/;"	d
MPC5XXX_PSC6	include/mpc5xxx.h	/^#define	MPC5XXX_PSC6	/;"	d
MPC5XXX_PSC6_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_PSC6_IRQ	/;"	d
MPC5XXX_RTC_GPIO_STD_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_RTC_GPIO_STD_IRQ	/;"	d
MPC5XXX_RTC_GPIO_WKUP_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_RTC_GPIO_WKUP_IRQ	/;"	d
MPC5XXX_RTC_PINT_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_RTC_PINT_IRQ	/;"	d
MPC5XXX_RTC_SINT_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_RTC_SINT_IRQ	/;"	d
MPC5XXX_SDMA	include/mpc5xxx.h	/^#define MPC5XXX_SDMA	/;"	d
MPC5XXX_SDMA_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_SDMA_IRQ	/;"	d
MPC5XXX_SDMA_IRQ_BASE	include/mpc5xxx.h	/^#define MPC5XXX_SDMA_IRQ_BASE	/;"	d
MPC5XXX_SDMA_IRQ_NUM	include/mpc5xxx.h	/^#define MPC5XXX_SDMA_IRQ_NUM	/;"	d
MPC5XXX_SDRAM	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM	/;"	d
MPC5XXX_SDRAM_CONFIG1	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_CONFIG1	/;"	d
MPC5XXX_SDRAM_CONFIG2	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_CONFIG2	/;"	d
MPC5XXX_SDRAM_CS0CFG	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_CS0CFG	/;"	d
MPC5XXX_SDRAM_CS1CFG	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_CS1CFG	/;"	d
MPC5XXX_SDRAM_CTRL	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_CTRL	/;"	d
MPC5XXX_SDRAM_MODE	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_MODE	/;"	d
MPC5XXX_SDRAM_SDELAY	include/mpc5xxx.h	/^#define MPC5XXX_SDRAM_SDELAY	/;"	d
MPC5XXX_SLICE_TIMER_0_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_SLICE_TIMER_0_IRQ	/;"	d
MPC5XXX_SPI	include/mpc5xxx.h	/^#define MPC5XXX_SPI	/;"	d
MPC5XXX_SPI_MODF_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_SPI_MODF_IRQ	/;"	d
MPC5XXX_SPI_SPIF_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_SPI_SPIF_IRQ	/;"	d
MPC5XXX_SRAM	include/mpc5xxx.h	/^#define MPC5XXX_SRAM	/;"	d
MPC5XXX_SRAM_POST_SIZE	include/configs/TQM5200.h	/^#define MPC5XXX_SRAM_POST_SIZE /;"	d
MPC5XXX_SRAM_POST_SIZE	include/configs/cm5200.h	/^#define MPC5XXX_SRAM_POST_SIZE	/;"	d
MPC5XXX_SRAM_POST_SIZE	include/configs/inka4x0.h	/^#define MPC5XXX_SRAM_POST_SIZE /;"	d
MPC5XXX_SRAM_POST_SIZE	include/configs/o2dnt-common.h	/^#define MPC5XXX_SRAM_POST_SIZE	/;"	d
MPC5XXX_SRAM_SIZE	include/mpc5xxx.h	/^#define MPC5XXX_SRAM_SIZE	/;"	d
MPC5XXX_TMR0_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR0_IRQ	/;"	d
MPC5XXX_TMR1_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR1_IRQ	/;"	d
MPC5XXX_TMR2_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR2_IRQ	/;"	d
MPC5XXX_TMR3_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR3_IRQ	/;"	d
MPC5XXX_TMR4_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR4_IRQ	/;"	d
MPC5XXX_TMR5_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR5_IRQ	/;"	d
MPC5XXX_TMR6_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR6_IRQ	/;"	d
MPC5XXX_TMR7_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_TMR7_IRQ	/;"	d
MPC5XXX_USB	include/mpc5xxx.h	/^#define MPC5XXX_USB	/;"	d
MPC5XXX_USB_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_USB_IRQ	/;"	d
MPC5XXX_WU_GPIO	include/mpc5xxx.h	/^#define MPC5XXX_WU_GPIO /;"	d
MPC5XXX_WU_GPIO_DATA_I	include/mpc5xxx.h	/^#define MPC5XXX_WU_GPIO_DATA_I /;"	d
MPC5XXX_WU_GPIO_DATA_O	include/mpc5xxx.h	/^#define MPC5XXX_WU_GPIO_DATA_O /;"	d
MPC5XXX_WU_GPIO_DIR	include/mpc5xxx.h	/^#define MPC5XXX_WU_GPIO_DIR /;"	d
MPC5XXX_WU_GPIO_ENABLE	include/mpc5xxx.h	/^#define MPC5XXX_WU_GPIO_ENABLE /;"	d
MPC5XXX_WU_GPIO_ODE	include/mpc5xxx.h	/^#define MPC5XXX_WU_GPIO_ODE /;"	d
MPC5XXX_XLBARB	include/mpc5xxx.h	/^#define MPC5XXX_XLBARB	/;"	d
MPC5XXX_XLBARB_CFG	include/mpc5xxx.h	/^#define MPC5XXX_XLBARB_CFG	/;"	d
MPC5XXX_XLBARB_MPRIEN	include/mpc5xxx.h	/^#define MPC5XXX_XLBARB_MPRIEN	/;"	d
MPC5XXX_XLBARB_MPRIVAL	include/mpc5xxx.h	/^#define MPC5XXX_XLBARB_MPRIVAL	/;"	d
MPC5XXX_XLB_ARB_IRQ	include/mpc5xxx.h	/^#define MPC5XXX_XLB_ARB_IRQ	/;"	d
MPC5xxx	arch/powerpc/Kconfig	/^config MPC5xxx$/;"	c	choice:PowerPC architecture""choice207a02820104
MPC5xxx_ATA_HOSTCONF_FR	include/mpc5xxx.h	/^#define MPC5xxx_ATA_HOSTCONF_FR	/;"	d
MPC5xxx_ATA_HOSTCONF_IE	include/mpc5xxx.h	/^#define MPC5xxx_ATA_HOSTCONF_IE	/;"	d
MPC5xxx_ATA_HOSTCONF_IORDY	include/mpc5xxx.h	/^#define MPC5xxx_ATA_HOSTCONF_IORDY	/;"	d
MPC5xxx_ATA_HOSTCONF_SMR	include/mpc5xxx.h	/^#define MPC5xxx_ATA_HOSTCONF_SMR	/;"	d
MPC8260	arch/powerpc/Kconfig	/^config MPC8260$/;"	c	choice:PowerPC architecture""choice207a02820104
MPC83XX_GPIO_CTRLRS	arch/powerpc/include/asm/arch-mpc83xx/gpio.h	/^#define MPC83XX_GPIO_CTRLRS /;"	d
MPC83XX_SCCR_USB_DRCM_01	include/usb/ehci-ci.h	/^#define MPC83XX_SCCR_USB_DRCM_01	/;"	d
MPC83XX_SCCR_USB_DRCM_10	include/usb/ehci-ci.h	/^#define MPC83XX_SCCR_USB_DRCM_10	/;"	d
MPC83XX_SCCR_USB_DRCM_11	include/usb/ehci-ci.h	/^#define MPC83XX_SCCR_USB_DRCM_11	/;"	d
MPC83XX_SCCR_USB_MASK	include/usb/ehci-ci.h	/^#define MPC83XX_SCCR_USB_MASK	/;"	d
MPC83xx	arch/powerpc/Kconfig	/^config MPC83xx$/;"	c	choice:PowerPC architecture""choice207a02820104
MPC83xx_RESET	include/mpc83xx.h	/^#define MPC83xx_RESET$/;"	d
MPC85XX_CPU_BOARD_MAJOR	board/freescale/common/eeprom.h	/^#define MPC85XX_CPU_BOARD_MAJOR(/;"	d
MPC85XX_CPU_BOARD_MINOR	board/freescale/common/eeprom.h	/^#define MPC85XX_CPU_BOARD_MINOR(/;"	d
MPC85XX_CPU_BOARD_REV	board/freescale/common/eeprom.h	/^#define MPC85XX_CPU_BOARD_REV(/;"	d
MPC85XX_CPU_BOARD_REV_1_0	board/freescale/common/eeprom.h	/^#define MPC85XX_CPU_BOARD_REV_1_0	/;"	d
MPC85XX_CPU_BOARD_REV_1_1	board/freescale/common/eeprom.h	/^#define MPC85XX_CPU_BOARD_REV_1_1	/;"	d
MPC85XX_CPU_BOARD_REV_UNKNOWN	board/freescale/common/eeprom.h	/^#define MPC85XX_CPU_BOARD_REV_UNKNOWN	/;"	d
MPC85XX_GPIO	drivers/gpio/Kconfig	/^config MPC85XX_GPIO$/;"	c	menu:GPIO Support
MPC85xx	arch/powerpc/Kconfig	/^config MPC85xx$/;"	c	choice:PowerPC architecture""choice207a02820104
MPC85xx_DEVDISR_CPU	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_CPU	/;"	d
MPC85xx_DEVDISR_CPU0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_CPU0	/;"	d
MPC85xx_DEVDISR_CPU1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_CPU1	/;"	d
MPC85xx_DEVDISR_DDR	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_DDR	/;"	d
MPC85xx_DEVDISR_DMA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_DMA	/;"	d
MPC85xx_DEVDISR_DUART	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_DUART	/;"	d
MPC85xx_DEVDISR_I2C	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_I2C	/;"	d
MPC85xx_DEVDISR_LBC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_LBC	/;"	d
MPC85xx_DEVDISR_PCI1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_PCI1	/;"	d
MPC85xx_DEVDISR_PCI2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_PCI2	/;"	d
MPC85xx_DEVDISR_PCIE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_PCIE	/;"	d
MPC85xx_DEVDISR_PCIE2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_PCIE2	/;"	d
MPC85xx_DEVDISR_PCIE3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_PCIE3	/;"	d
MPC85xx_DEVDISR_QE_DISABLE	drivers/qe/qe.c	/^#define MPC85xx_DEVDISR_QE_DISABLE	/;"	d	file:
MPC85xx_DEVDISR_RMSG	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_RMSG	/;"	d
MPC85xx_DEVDISR_SEC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_SEC	/;"	d
MPC85xx_DEVDISR_SRIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_SRIO	/;"	d
MPC85xx_DEVDISR_TB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TB	/;"	d
MPC85xx_DEVDISR_TB0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TB0	/;"	d
MPC85xx_DEVDISR_TB1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TB1	/;"	d
MPC85xx_DEVDISR_TSEC1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TSEC1	/;"	d
MPC85xx_DEVDISR_TSEC2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TSEC2	/;"	d
MPC85xx_DEVDISR_TSEC3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TSEC3	/;"	d
MPC85xx_DEVDISR_TSEC4	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_DEVDISR_TSEC4	/;"	d
MPC85xx_GENCFGR_SDHC_WP_INV	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_GENCFGR_SDHC_WP_INV	/;"	d
MPC85xx_L2CTL_L2E	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_L2CTL_L2E	/;"	d
MPC85xx_L2CTL_L2SRAM_ENTIRE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_L2CTL_L2SRAM_ENTIRE	/;"	d
MPC85xx_L2ERRDIS_MBECC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_L2ERRDIS_MBECC	/;"	d
MPC85xx_L2ERRDIS_SBECC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_L2ERRDIS_SBECC	/;"	d
MPC85xx_PICGCR_M	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PICGCR_M	/;"	d
MPC85xx_PICGCR_RST	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PICGCR_RST	/;"	d
MPC85xx_PMUXCR0_SIM_SEL	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR0_SIM_SEL	/;"	d
MPC85xx_PMUXCR0_SIM_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR0_SIM_SEL_MASK	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO0_3_ANT2_DO_3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO0_3_ANT2_DO_3	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO0_3_GPIO81_84	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO0_3_GPIO81_84	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO0_3_SPI3_CS0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO0_3_SPI3_CS0	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO10_11_ANT2_DO10_11	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO10_11_ANT2_DO10_11	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO10_11_GPIO23_24	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO10_11_GPIO23_24	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO10_11_TIMER6_7	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO10_11_TIMER6_7	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO4_7_ANT2_DO4_7	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO4_7_ANT2_DO4_7	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO4_7_GPIO85_88	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO4_7_GPIO85_88	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO4_7_SPI4	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO4_7_SPI4	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO8_9_ANT2_DO8_9	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO8_9_ANT2_DO8_9	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO8_9_GPIO21_22	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO8_9_GPIO21_22	/;"	d
MPC85xx_PMUXCR2_ANT1_DIO8_9_MAX2_1_LOCK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_DIO8_9_MAX2_1_LOCK	/;"	d
MPC85xx_PMUXCR2_ANT1_GPIO95_19	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_GPIO95_19	/;"	d
MPC85xx_PMUXCR2_ANT1_TIMER5	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_TIMER5	/;"	d
MPC85xx_PMUXCR2_ANT1_TSEC_1588	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_TSEC_1588	/;"	d
MPC85xx_PMUXCR2_ANT1_TX_RX_FRAME_GPIO80_20	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_TX_RX_FRAME_GPIO80_20	/;"	d
MPC85xx_PMUXCR2_ANT1_TX_RX_FRAME_MAX3_LOCK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_TX_RX_FRAME_MAX3_LOCK	/;"	d
MPC85xx_PMUXCR2_ANT1_TX_RX_FRAME_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT1_TX_RX_FRAME_RSVD	/;"	d
MPC85xx_PMUXCR2_ANT2_DIO11_GPIO61	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_DIO11_GPIO61	/;"	d
MPC85xx_PMUXCR2_ANT2_DIO11_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_DIO11_RSVD	/;"	d
MPC85xx_PMUXCR2_ANT2_DIO11_TIMER8	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_DIO11_TIMER8	/;"	d
MPC85xx_PMUXCR2_ANT2_ENABLE_DIO0_10_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_ENABLE_DIO0_10_GPIO	/;"	d
MPC85xx_PMUXCR2_ANT2_ENABLE_DIO0_10_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_ENABLE_DIO0_10_USB	/;"	d
MPC85xx_PMUXCR2_ANT2_GPO90_91_DMA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_GPO90_91_DMA	/;"	d
MPC85xx_PMUXCR2_ANT2_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT2_RSVD	/;"	d
MPC85xx_PMUXCR2_ANT3_AGC_GPO53	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT3_AGC_GPO53	/;"	d
MPC85xx_PMUXCR2_ANT3_DO_GPIO46_49	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT3_DO_GPIO46_49	/;"	d
MPC85xx_PMUXCR2_ANT3_DO_TDM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ANT3_DO_TDM	/;"	d
MPC85xx_PMUXCR2_DDR_ECC_MUX	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_DDR_ECC_MUX	/;"	d
MPC85xx_PMUXCR2_DEBUG_MUX_SEL_USBPHY	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_DEBUG_MUX_SEL_USBPHY	/;"	d
MPC85xx_PMUXCR2_DEBUG_PORT_EXPOSE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_DEBUG_PORT_EXPOSE	/;"	d
MPC85xx_PMUXCR2_ETSECUSB_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_ETSECUSB_MASK	/;"	d
MPC85xx_PMUXCR2_GPIO01_DRVVBUS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO01_DRVVBUS	/;"	d
MPC85xx_PMUXCR2_GPIO01_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO01_RES	/;"	d
MPC85xx_PMUXCR2_GPIO23_CKSTP	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO23_CKSTP	/;"	d
MPC85xx_PMUXCR2_GPIO23_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO23_RES	/;"	d
MPC85xx_PMUXCR2_GPIO23_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO23_USB	/;"	d
MPC85xx_PMUXCR2_GPIO4_CLK_OUT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO4_CLK_OUT	/;"	d
MPC85xx_PMUXCR2_GPIO4_MCP	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO4_MCP	/;"	d
MPC85xx_PMUXCR2_GPIO4_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO4_RES	/;"	d
MPC85xx_PMUXCR2_GPIO5_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO5_RES	/;"	d
MPC85xx_PMUXCR2_GPIO5_UDE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_GPIO5_UDE	/;"	d
MPC85xx_PMUXCR2_IRQ2_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_IRQ2_RES	/;"	d
MPC85xx_PMUXCR2_IRQ2_TRIG_IN	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_IRQ2_TRIG_IN	/;"	d
MPC85xx_PMUXCR2_IRQ3_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_IRQ3_RES	/;"	d
MPC85xx_PMUXCR2_IRQ3_SRESET	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_IRQ3_SRESET	/;"	d
MPC85xx_PMUXCR2_PLL_LKDT_EXPOSE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_PLL_LKDT_EXPOSE	/;"	d
MPC85xx_PMUXCR2_POST_EXPOSE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_POST_EXPOSE	/;"	d
MPC85xx_PMUXCR2_READY_ASLEEP	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_READY_ASLEEP	/;"	d
MPC85xx_PMUXCR2_TRIG_OUT_ASLEEP	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_TRIG_OUT_ASLEEP	/;"	d
MPC85xx_PMUXCR2_TRIG_OUT_DSP_TRST_B	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_TRIG_OUT_DSP_TRST_B	/;"	d
MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS	/;"	d
MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42	/;"	d
MPC85xx_PMUXCR2_UART_CTS_B0_SIM_PD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_CTS_B0_SIM_PD	/;"	d
MPC85xx_PMUXCR2_UART_CTS_B1_GPIO44	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_CTS_B1_GPIO44	/;"	d
MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD	/;"	d
MPC85xx_PMUXCR2_UART_CTS_B1_SRESET_B	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_CTS_B1_SRESET_B	/;"	d
MPC85xx_PMUXCR2_UART_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_GPIO	/;"	d
MPC85xx_PMUXCR2_UART_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RES	/;"	d
MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK	/;"	d
MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43	/;"	d
MPC85xx_PMUXCR2_UART_RTS_B0_PWM2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RTS_B0_PWM2	/;"	d
MPC85xx_PMUXCR2_UART_RTS_B1_GPIO45	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RTS_B1_GPIO45	/;"	d
MPC85xx_PMUXCR2_UART_RTS_B1_PPS_LED	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RTS_B1_PPS_LED	/;"	d
MPC85xx_PMUXCR2_UART_RTS_B1_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_RTS_B1_RSVD	/;"	d
MPC85xx_PMUXCR2_UART_TDM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_UART_TDM	/;"	d
MPC85xx_PMUXCR2_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR2_USB	/;"	d
MPC85xx_PMUXCR3_ANT2_AGC_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT2_AGC_RSVD	/;"	d
MPC85xx_PMUXCR3_ANT2_GPO89	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT2_GPO89	/;"	d
MPC85xx_PMUXCR3_ANT3_DO11_GPIO57	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO11_GPIO57	/;"	d
MPC85xx_PMUXCR3_ANT3_DO11_IRQ_OUT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO11_IRQ_OUT	/;"	d
MPC85xx_PMUXCR3_ANT3_DO4_5_GPIO_50_51	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO4_5_GPIO_50_51	/;"	d
MPC85xx_PMUXCR3_ANT3_DO4_5_TDM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO4_5_TDM	/;"	d
MPC85xx_PMUXCR3_ANT3_DO6_7_GPIO_52_53	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO6_7_GPIO_52_53	/;"	d
MPC85xx_PMUXCR3_ANT3_DO6_7_TRIG_IN_SRESET_B	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO6_7_TRIG_IN_SRESET_B	/;"	d
MPC85xx_PMUXCR3_ANT3_DO8_GPIO54	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO8_GPIO54	/;"	d
MPC85xx_PMUXCR3_ANT3_DO8_MCP_B	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO8_MCP_B	/;"	d
MPC85xx_PMUXCR3_ANT3_DO9_10_CKSTP_IN_OUT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO9_10_CKSTP_IN_OUT	/;"	d
MPC85xx_PMUXCR3_ANT3_DO9_10_GPIO55_56	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_ANT3_DO9_10_GPIO55_56	/;"	d
MPC85xx_PMUXCR3_SPI2_CS2_GPO93	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_SPI2_CS2_GPO93	/;"	d
MPC85xx_PMUXCR3_SPI2_CS3_GPO94	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_SPI2_CS3_GPO94	/;"	d
MPC85xx_PMUXCR3_UART2_SEL	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_UART2_SEL	/;"	d
MPC85xx_PMUXCR3_UART3_SEL	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_UART3_SEL	/;"	d
MPC85xx_PMUXCR3_UART3_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_UART3_SEL_MASK	/;"	d
MPC85xx_PMUXCR3_USB_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR3_USB_SEL_MASK	/;"	d
MPC85xx_PMUXCR_CAN1_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_CAN1_RES	/;"	d
MPC85xx_PMUXCR_CAN1_TDM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_CAN1_TDM	/;"	d
MPC85xx_PMUXCR_CAN1_UART	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_CAN1_UART	/;"	d
MPC85xx_PMUXCR_CAN2_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_CAN2_RES	/;"	d
MPC85xx_PMUXCR_CAN2_TDM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_CAN2_TDM	/;"	d
MPC85xx_PMUXCR_CAN2_UART	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_CAN2_UART	/;"	d
MPC85xx_PMUXCR_ELBC_OFF_USB2_ON	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_ELBC_OFF_USB2_ON	/;"	d
MPC85xx_PMUXCR_IFC_AD15_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD15_GPIO	/;"	d
MPC85xx_PMUXCR_IFC_AD15_TIMER2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD15_TIMER2	/;"	d
MPC85xx_PMUXCR_IFC_AD16_GPO8	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD16_GPO8	/;"	d
MPC85xx_PMUXCR_IFC_AD16_MSRCID0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD16_MSRCID0	/;"	d
MPC85xx_PMUXCR_IFC_AD17_GPO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD17_GPO	/;"	d
MPC85xx_PMUXCR_IFC_AD17_GPO_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD17_GPO_MASK	/;"	d
MPC85xx_PMUXCR_IFC_AD17_MSRCID_DSP	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD17_MSRCID_DSP	/;"	d
MPC85xx_PMUXCR_IFC_ADDR16_IFC_CS2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR16_IFC_CS2	/;"	d
MPC85xx_PMUXCR_IFC_ADDR16_SDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR16_SDHC	/;"	d
MPC85xx_PMUXCR_IFC_ADDR16_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR16_USB	/;"	d
MPC85xx_PMUXCR_IFC_ADDR17_18_DMA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR17_18_DMA	/;"	d
MPC85xx_PMUXCR_IFC_ADDR17_18_SDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR17_18_SDHC	/;"	d
MPC85xx_PMUXCR_IFC_ADDR17_18_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR17_18_USB	/;"	d
MPC85xx_PMUXCR_IFC_ADDR19_DMA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR19_DMA	/;"	d
MPC85xx_PMUXCR_IFC_ADDR19_SDHC_DATA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR19_SDHC_DATA	/;"	d
MPC85xx_PMUXCR_IFC_ADDR19_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR19_USB	/;"	d
MPC85xx_PMUXCR_IFC_ADDR20_21_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR20_21_RES	/;"	d
MPC85xx_PMUXCR_IFC_ADDR20_21_SDHC_DATA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR20_21_SDHC_DATA	/;"	d
MPC85xx_PMUXCR_IFC_ADDR20_21_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR20_21_USB	/;"	d
MPC85xx_PMUXCR_IFC_ADDR22_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR22_RES	/;"	d
MPC85xx_PMUXCR_IFC_ADDR22_SDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR22_SDHC	/;"	d
MPC85xx_PMUXCR_IFC_ADDR22_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR22_USB	/;"	d
MPC85xx_PMUXCR_IFC_ADDR23_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR23_RES	/;"	d
MPC85xx_PMUXCR_IFC_ADDR23_SDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR23_SDHC	/;"	d
MPC85xx_PMUXCR_IFC_ADDR23_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR23_USB	/;"	d
MPC85xx_PMUXCR_IFC_ADDR24_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR24_RES	/;"	d
MPC85xx_PMUXCR_IFC_ADDR24_SDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR24_SDHC	/;"	d
MPC85xx_PMUXCR_IFC_ADDR24_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_ADDR24_USB	/;"	d
MPC85xx_PMUXCR_IFC_AD_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD_GPIO	/;"	d
MPC85xx_PMUXCR_IFC_AD_GPIO_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_AD_GPIO_MASK	/;"	d
MPC85xx_PMUXCR_IFC_CS2_DSP_TDI	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_CS2_DSP_TDI	/;"	d
MPC85xx_PMUXCR_IFC_CS2_GPO65	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_CS2_GPO65	/;"	d
MPC85xx_PMUXCR_IFC_PAR_PERR_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_PAR_PERR_RES	/;"	d
MPC85xx_PMUXCR_IFC_PAR_PERR_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_IFC_PAR_PERR_USB	/;"	d
MPC85xx_PMUXCR_LCLK_IFC_CS3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_LCLK_IFC_CS3	/;"	d
MPC85xx_PMUXCR_LCLK_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_LCLK_RES	/;"	d
MPC85xx_PMUXCR_LCLK_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_LCLK_USB	/;"	d
MPC85xx_PMUXCR_QE0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE0	/;"	d
MPC85xx_PMUXCR_QE1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE1	/;"	d
MPC85xx_PMUXCR_QE10	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE10	/;"	d
MPC85xx_PMUXCR_QE11	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE11	/;"	d
MPC85xx_PMUXCR_QE12	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE12	/;"	d
MPC85xx_PMUXCR_QE2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE2	/;"	d
MPC85xx_PMUXCR_QE3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE3	/;"	d
MPC85xx_PMUXCR_QE4	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE4	/;"	d
MPC85xx_PMUXCR_QE5	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE5	/;"	d
MPC85xx_PMUXCR_QE6	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE6	/;"	d
MPC85xx_PMUXCR_QE7	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE7	/;"	d
MPC85xx_PMUXCR_QE8	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE8	/;"	d
MPC85xx_PMUXCR_QE9	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_QE9	/;"	d
MPC85xx_PMUXCR_SDHC_CD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_CD	/;"	d
MPC85xx_PMUXCR_SDHC_GPIO77	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_GPIO77	/;"	d
MPC85xx_PMUXCR_SDHC_GPIO_TIMER4	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_GPIO_TIMER4	/;"	d
MPC85xx_PMUXCR_SDHC_RESV	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_RESV	/;"	d
MPC85xx_PMUXCR_SDHC_TDM_RFS_RCK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_TDM_RFS_RCK	/;"	d
MPC85xx_PMUXCR_SDHC_TDM_TXD_RXD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_TDM_TXD_RXD	/;"	d
MPC85xx_PMUXCR_SDHC_USIM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_USIM	/;"	d
MPC85xx_PMUXCR_SDHC_WP	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SDHC_WP	/;"	d
MPC85xx_PMUXCR_SD_DATA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SD_DATA	/;"	d
MPC85xx_PMUXCR_SPI	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI	/;"	d
MPC85xx_PMUXCR_SPI1_CKSTP_IN_GPO74	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CKSTP_IN_GPO74	/;"	d
MPC85xx_PMUXCR_SPI1_CS2_CKSTP_OUT_B	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CS2_CKSTP_OUT_B	/;"	d
MPC85xx_PMUXCR_SPI1_CS2_GPO75	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CS2_GPO75	/;"	d
MPC85xx_PMUXCR_SPI1_CS2_dbg_adi1_rxen	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CS2_dbg_adi1_rxen	/;"	d
MPC85xx_PMUXCR_SPI1_CS3_ANT_TCXO_PWM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CS3_ANT_TCXO_PWM	/;"	d
MPC85xx_PMUXCR_SPI1_CS3_GPO76	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CS3_GPO76	/;"	d
MPC85xx_PMUXCR_SPI1_CS3_dbg_adi2_rxen	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_CS3_dbg_adi2_rxen	/;"	d
MPC85xx_PMUXCR_SPI1_SIM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_SIM	/;"	d
MPC85xx_PMUXCR_SPI1_UART3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI1_UART3	/;"	d
MPC85xx_PMUXCR_SPI_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI_GPIO	/;"	d
MPC85xx_PMUXCR_SPI_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI_MASK	/;"	d
MPC85xx_PMUXCR_SPI_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_SPI_RES	/;"	d
MPC85xx_PMUXCR_TDM	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TDM	/;"	d
MPC85xx_PMUXCR_TDM_ENA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TDM_ENA	/;"	d
MPC85xx_PMUXCR_TDM_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TDM_MASK	/;"	d
MPC85xx_PMUXCR_TSEC1_0_1588	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_0_1588	/;"	d
MPC85xx_PMUXCR_TSEC1_0_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_0_RES	/;"	d
MPC85xx_PMUXCR_TSEC1_1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_1	/;"	d
MPC85xx_PMUXCR_TSEC1_1_1588_TRIG	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_1_1588_TRIG	/;"	d
MPC85xx_PMUXCR_TSEC1_1_GPIO_12	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_1_GPIO_12	/;"	d
MPC85xx_PMUXCR_TSEC1_1_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_1_RES	/;"	d
MPC85xx_PMUXCR_TSEC1_2_DMA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_2_DMA	/;"	d
MPC85xx_PMUXCR_TSEC1_2_GPIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_2_GPIO	/;"	d
MPC85xx_PMUXCR_TSEC1_2_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_2_RES	/;"	d
MPC85xx_PMUXCR_TSEC1_3_GPIO_15	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_3_GPIO_15	/;"	d
MPC85xx_PMUXCR_TSEC1_3_RES	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC1_3_RES	/;"	d
MPC85xx_PMUXCR_TSEC2_1588_PPS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC2_1588_PPS	/;"	d
MPC85xx_PMUXCR_TSEC2_1588_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC2_1588_RSVD	/;"	d
MPC85xx_PMUXCR_TSEC2_DMA_GPIO_IRQ	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC2_DMA_GPIO_IRQ	/;"	d
MPC85xx_PMUXCR_TSEC2_USB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_TSEC2_USB	/;"	d
MPC85xx_PMUXCR_USB_CLK_GPIO69	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_CLK_GPIO69	/;"	d
MPC85xx_PMUXCR_USB_CLK_TIMER3	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_CLK_TIMER3	/;"	d
MPC85xx_PMUXCR_USB_CLK_UART_SIN	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_CLK_UART_SIN	/;"	d
MPC85xx_PMUXCR_USB_D1_2_GPIO71_72	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_D1_2_GPIO71_72	/;"	d
MPC85xx_PMUXCR_USB_D1_2_IIC2_SDA_SCL	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_D1_2_IIC2_SDA_SCL	/;"	d
MPC85xx_PMUXCR_USB_D1_2_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_D1_2_RSVD	/;"	d
MPC85xx_PMUXCR_USB_DIR_GPIO2	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_DIR_GPIO2	/;"	d
MPC85xx_PMUXCR_USB_DIR_MCP_B	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_DIR_MCP_B	/;"	d
MPC85xx_PMUXCR_USB_DIR_TIMER1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_DIR_TIMER1	/;"	d
MPC85xx_PMUXCR_USB_GPIO62_TRIG_IN	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_GPIO62_TRIG_IN	/;"	d
MPC85xx_PMUXCR_USB_RSVD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_RSVD	/;"	d
MPC85xx_PMUXCR_USB_UART_GPIO0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PMUXCR_USB_UART_GPIO0	/;"	d
MPC85xx_PORBMSR_HA	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORBMSR_HA	/;"	d
MPC85xx_PORBMSR_HA_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORBMSR_HA_SHIFT	/;"	d
MPC85xx_PORBMSR_ROMLOC_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORBMSR_ROMLOC_SHIFT	/;"	d
MPC85xx_PORDEVSR2_DDR_SPD_0	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR2_DDR_SPD_0	/;"	d
MPC85xx_PORDEVSR2_DDR_SPD_0_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR2_DDR_SPD_0_SHIFT	/;"	d
MPC85xx_PORDEVSR2_SBC_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR2_SBC_MASK	/;"	d
MPC85xx_PORDEVSR2_SEC_CFG	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR2_SEC_CFG	/;"	d
MPC85xx_PORDEVSR_DRAM_RTYPE	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_DRAM_RTYPE	/;"	d
MPC85xx_PORDEVSR_IO_SEL	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_IO_SEL	/;"	d
MPC85xx_PORDEVSR_IO_SEL_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_IO_SEL_SHIFT	/;"	d
MPC85xx_PORDEVSR_PCI1	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_PCI1	/;"	d
MPC85xx_PORDEVSR_PCI1_ARB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_PCI1_ARB	/;"	d
MPC85xx_PORDEVSR_PCI1_PCI32	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_PCI1_PCI32	/;"	d
MPC85xx_PORDEVSR_PCI1_SPD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_PCI1_SPD	/;"	d
MPC85xx_PORDEVSR_PCI2_ARB	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_PCI2_ARB	/;"	d
MPC85xx_PORDEVSR_PCI2_SPD	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_PCI2_SPD	/;"	d
MPC85xx_PORDEVSR_RIO_CTLS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_RIO_CTLS	/;"	d
MPC85xx_PORDEVSR_RIO_DEV_ID	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_RIO_DEV_ID	/;"	d
MPC85xx_PORDEVSR_SGMII1_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_SGMII1_DIS	/;"	d
MPC85xx_PORDEVSR_SGMII2_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_SGMII2_DIS	/;"	d
MPC85xx_PORDEVSR_SGMII3_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_SGMII3_DIS	/;"	d
MPC85xx_PORDEVSR_SGMII4_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_SGMII4_DIS	/;"	d
MPC85xx_PORDEVSR_SRDS2_IO_SEL	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_SRDS2_IO_SEL	/;"	d
MPC85xx_PORDEVSR_TSEC1_PRTC	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORDEVSR_TSEC1_PRTC	/;"	d
MPC85xx_PORPLLSR_DDR_RATIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORPLLSR_DDR_RATIO	/;"	d
MPC85xx_PORPLLSR_DDR_RATIO_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT	/;"	d
MPC85xx_PORPLLSR_PLAT_RATIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORPLLSR_PLAT_RATIO	/;"	d
MPC85xx_PORPLLSR_PLAT_RATIO_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORPLLSR_PLAT_RATIO_SHIFT	/;"	d
MPC85xx_PORPLLSR_QE_RATIO	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORPLLSR_QE_RATIO	/;"	d
MPC85xx_PORPLLSR_QE_RATIO_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT	/;"	d
MPC85xx_SYS_INFO	include/e500.h	/^} MPC85xx_SYS_INFO;$/;"	t	typeref:struct:__anon469b21c80108
MPC8610_PORBMSR_HA	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8610_PORBMSR_HA /;"	d
MPC8610_PORBMSR_HA_SHIFT	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8610_PORBMSR_HA_SHIFT	/;"	d
MPC8610_PORDEVSR_IO_SEL	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8610_PORDEVSR_IO_SEL	/;"	d
MPC8610_PORDEVSR_IO_SEL_SHIFT	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8610_PORDEVSR_IO_SEL_SHIFT	/;"	d
MPC8641_PORBMSR_HA	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8641_PORBMSR_HA /;"	d
MPC8641_PORBMSR_HA_SHIFT	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8641_PORBMSR_HA_SHIFT	/;"	d
MPC8641_PORDEVSR_IO_SEL	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8641_PORDEVSR_IO_SEL	/;"	d
MPC8641_PORDEVSR_IO_SEL_SHIFT	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC8641_PORDEVSR_IO_SEL_SHIFT	/;"	d
MPC86xx	arch/powerpc/Kconfig	/^config MPC86xx$/;"	c	choice:PowerPC architecture""choice207a02820104
MPC86xx_DEVDISR_CPU0	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_CPU0	/;"	d
MPC86xx_DEVDISR_CPU1	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_CPU1	/;"	d
MPC86xx_DEVDISR_PCI1	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_PCI1	/;"	d
MPC86xx_DEVDISR_PCIE1	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_PCIE1	/;"	d
MPC86xx_DEVDISR_PCIE2	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_PCIE2	/;"	d
MPC86xx_DEVDISR_PCIEX1	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_PCIEX1	/;"	d
MPC86xx_DEVDISR_PCIEX2	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_PCIEX2	/;"	d
MPC86xx_DEVDISR_RMSG	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_RMSG	/;"	d
MPC86xx_DEVDISR_SRIO	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_DEVDISR_SRIO	/;"	d
MPC86xx_PICGCR_MODE	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_PICGCR_MODE	/;"	d
MPC86xx_PICGCR_RST	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_PICGCR_RST	/;"	d
MPC86xx_PORDEVSR_CORE1TE	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_PORDEVSR_CORE1TE	/;"	d
MPC86xx_RSTCR_HRST_REQ	arch/powerpc/include/asm/immap_86xx.h	/^#define MPC86xx_RSTCR_HRST_REQ	/;"	d
MPC86xx_SYS_INFO	include/mpc86xx.h	/^} MPC86xx_SYS_INFO;$/;"	t	typeref:struct:__anon176fb30c0108
MPC8xx_NEW_CLK	include/mpc8xx.h	/^#define MPC8xx_NEW_CLK /;"	d
MPC8xxx_PICFRR_NCPU_MASK	arch/powerpc/cpu/mpc8xxx/cpu.c	/^#define MPC8xxx_PICFRR_NCPU_MASK /;"	d	file:
MPC8xxx_PICFRR_NCPU_SHIFT	arch/powerpc/cpu/mpc8xxx/cpu.c	/^#define MPC8xxx_PICFRR_NCPU_SHIFT /;"	d	file:
MPCTL0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define MPCTL0 /;"	d
MPCTL0_VAL	include/configs/imx27lite-common.h	/^#define MPCTL0_VAL	/;"	d
MPCTL1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define MPCTL1 /;"	d
MPCTL1_BRMO	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define MPCTL1_BRMO	/;"	d
MPCTL1_LF	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define MPCTL1_LF	/;"	d
MPCTL_PARAM_532	board/freescale/mx31ads/lowlevel_init.S	/^MPCTL_PARAM_532:$/;"	l
MPCTL_PARAM_532_27	board/freescale/mx31ads/lowlevel_init.S	/^MPCTL_PARAM_532_27:$/;"	l
MPC_APIC_USABLE	arch/x86/include/asm/mpspec.h	/^#define MPC_APIC_USABLE	/;"	d
MPC_CPU_BP	arch/x86/include/asm/mpspec.h	/^#define MPC_CPU_BP	/;"	d
MPC_CPU_EN	arch/x86/include/asm/mpspec.h	/^#define MPC_CPU_EN	/;"	d
MPC_SIGNATURE	arch/x86/include/asm/mpspec.h	/^#define MPC_SIGNATURE	/;"	d
MPDB_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define MPDB_GPMC_CONFIG1	/;"	d
MPDB_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define MPDB_GPMC_CONFIG2	/;"	d
MPDB_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define MPDB_GPMC_CONFIG3	/;"	d
MPDB_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define MPDB_GPMC_CONFIG4	/;"	d
MPDB_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define MPDB_GPMC_CONFIG5	/;"	d
MPDB_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define MPDB_GPMC_CONFIG6	/;"	d
MPEE	include/sym53c8xx.h	/^	#define   MPEE /;"	d
MPE_BUS_HIERARCHY	arch/x86/include/asm/mpspec.h	/^	MPE_BUS_HIERARCHY,$/;"	e	enum:mp_ext_config_entry_type
MPE_COMPAT_ADDRESS_SPACE	arch/x86/include/asm/mpspec.h	/^	MPE_COMPAT_ADDRESS_SPACE$/;"	e	enum:mp_ext_config_entry_type
MPE_SYSTEM_ADDRESS_SPACE	arch/x86/include/asm/mpspec.h	/^	MPE_SYSTEM_ADDRESS_SPACE = 128,$/;"	e	enum:mp_ext_config_entry_type
MPF_SIGNATURE	arch/x86/include/asm/mpspec.h	/^#define MPF_SIGNATURE	/;"	d
MPHY_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define MPHY_BASE_ADDRESS	/;"	d
MPHY_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define MPHY_BASE_SIZE	/;"	d
MPIC_CSR	include/tsi108.h	/^#define MPIC_CSR(/;"	d
MPKE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	MPKE	/;"	d
MPKS	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	MPKS	/;"	d
MPLL	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^#define MPLL /;"	d	file:
MPLL	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define MPLL	/;"	d
MPLL	arch/arm/mach-s5pc1xx/include/mach/clk.h	/^#define MPLL	/;"	d
MPLL	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLL	include/dt-bindings/clock/microchip,clock.h	/^#define MPLL	/;"	d
MPLLCON	board/mpl/vcma9/lowlevel_init.S	/^#define MPLLCON	/;"	d	file:
MPLLCSR0	arch/x86/cpu/quark/smc.h	/^#define MPLLCSR0	/;"	d
MPLLCSR1	arch/x86/cpu/quark/smc.h	/^#define MPLLCSR1	/;"	d
MPLLCSR2	arch/x86/cpu/quark/smc.h	/^#define MPLLCSR2	/;"	d
MPLLCTRL0	arch/x86/cpu/quark/smc.h	/^#define MPLLCTRL0	/;"	d
MPLLCTRL1	arch/x86/cpu/quark/smc.h	/^#define MPLLCTRL1	/;"	d
MPLLDFT	arch/x86/cpu/quark/smc.h	/^#define MPLLDFT	/;"	d
MPLLDFTOUT0	arch/x86/cpu/quark/smc.h	/^#define MPLLDFTOUT0	/;"	d
MPLLDFTOUT1	arch/x86/cpu/quark/smc.h	/^#define MPLLDFTOUT1	/;"	d
MPLLMON0CTL	arch/x86/cpu/quark/smc.h	/^#define MPLLMON0CTL	/;"	d
MPLLMON1CTL	arch/x86/cpu/quark/smc.h	/^#define MPLLMON1CTL	/;"	d
MPLLMON2CTL	arch/x86/cpu/quark/smc.h	/^#define MPLLMON2CTL	/;"	d
MPLL_AFC	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_AFC	/;"	d
MPLL_AFC	board/samsung/trats/setup.h	/^#define MPLL_AFC	/;"	d
MPLL_AFC_ENB	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_AFC_ENB	/;"	d
MPLL_AFC_ENB	board/samsung/trats/setup.h	/^#define MPLL_AFC_ENB	/;"	d
MPLL_CNTL	include/radeon.h	/^#define MPLL_CNTL	/;"	d
MPLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define MPLL_CON0_LOCKED	/;"	d
MPLL_CON0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_CON0_VAL	/;"	d
MPLL_CON0_VAL	board/samsung/trats/setup.h	/^#define MPLL_CON0_VAL	/;"	d
MPLL_CON1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_CON1_VAL	/;"	d
MPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MPLL_CON1_VAL /;"	d
MPLL_CON1_VAL	board/samsung/trats/setup.h	/^#define MPLL_CON1_VAL	/;"	d
MPLL_FOUT_SEL_MASK	arch/arm/mach-exynos/include/mach/clock.h	/^#define MPLL_FOUT_SEL_MASK	/;"	d
MPLL_FOUT_SEL_SHIFT	arch/arm/mach-exynos/include/mach/clock.h	/^#define MPLL_FOUT_SEL_SHIFT	/;"	d
MPLL_IDIV	drivers/clk/clk_pic32.c	/^#define MPLL_IDIV	/;"	d	file:
MPLL_IDIV_INIT	drivers/clk/clk_pic32.c	/^#define MPLL_IDIV_INIT	/;"	d	file:
MPLL_IDIV_SHIFT	drivers/clk/clk_pic32.c	/^#define MPLL_IDIV_SHIFT	/;"	d	file:
MPLL_MDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_MDIV	/;"	d
MPLL_MDIV	board/samsung/trats/setup.h	/^#define MPLL_MDIV	/;"	d
MPLL_MULT	drivers/clk/clk_pic32.c	/^#define MPLL_MULT	/;"	d	file:
MPLL_MULT_INIT	drivers/clk/clk_pic32.c	/^#define MPLL_MULT_INIT	/;"	d	file:
MPLL_MULT_SHIFT	drivers/clk/clk_pic32.c	/^#define MPLL_MULT_SHIFT	/;"	d	file:
MPLL_ODIV1	drivers/clk/clk_pic32.c	/^#define MPLL_ODIV1	/;"	d	file:
MPLL_ODIV1_INIT	drivers/clk/clk_pic32.c	/^#define MPLL_ODIV1_INIT	/;"	d	file:
MPLL_ODIV1_SHIFT	drivers/clk/clk_pic32.c	/^#define MPLL_ODIV1_SHIFT	/;"	d	file:
MPLL_ODIV2	drivers/clk/clk_pic32.c	/^#define MPLL_ODIV2	/;"	d	file:
MPLL_ODIV2_INIT	drivers/clk/clk_pic32.c	/^#define MPLL_ODIV2_INIT	/;"	d	file:
MPLL_ODIV2_SHIFT	drivers/clk/clk_pic32.c	/^#define MPLL_ODIV2_SHIFT	/;"	d	file:
MPLL_PDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_PDIV	/;"	d
MPLL_PDIV	board/samsung/trats/setup.h	/^#define MPLL_PDIV	/;"	d
MPLL_RDY	drivers/clk/clk_pic32.c	/^#define MPLL_RDY	/;"	d	file:
MPLL_RESET	include/radeon.h	/^#define MPLL_RESET	/;"	d
MPLL_SDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define MPLL_SDIV	/;"	d
MPLL_SDIV	board/samsung/trats/setup.h	/^#define MPLL_SDIV	/;"	d
MPLL_SEL	board/samsung/odroid/setup.h	/^#define MPLL_SEL(/;"	d
MPLL_SEL_MOUT_MPLLFOUT	arch/arm/mach-exynos/exynos5_setup.h	/^#define MPLL_SEL_MOUT_MPLLFOUT	/;"	d
MPLL_USER_SEL_C	board/samsung/odroid/setup.h	/^#define MPLL_USER_SEL_C(/;"	d
MPLL_VREG_RDY	drivers/clk/clk_pic32.c	/^#define MPLL_VREG_RDY	/;"	d	file:
MPMU_APRR_WDTR	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define MPMU_APRR_WDTR	/;"	d	file:
MPP	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP(/;"	d
MPP0_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP0_GPIO	/;"	d
MPP0_NF_IO2	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP0_NF_IO2	/;"	d
MPP0_SPI_SCn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP0_SPI_SCn	/;"	d
MPP10_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP10_GPO	/;"	d
MPP10_PTP_TRIG_GEN	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP10_PTP_TRIG_GEN	/;"	d
MPP10_SATA1_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP10_SATA1_ACTn	/;"	d
MPP10_SPI_SCK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP10_SPI_SCK	/;"	d
MPP10_UART0_TXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP10_UART0_TXD	/;"	d
MPP11_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_GPIO	/;"	d
MPP11_PTP_CLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_PTP_CLK	/;"	d
MPP11_PTP_EVENT_REQ	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_PTP_EVENT_REQ	/;"	d
MPP11_PTP_TRIG_GEN	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_PTP_TRIG_GEN	/;"	d
MPP11_SATA0_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_SATA0_ACTn	/;"	d
MPP11_SPI_MISO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_SPI_MISO	/;"	d
MPP11_UART0_RXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP11_UART0_RXD	/;"	d
MPP12_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP12_GPO	/;"	d
MPP12_SD_CLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP12_SD_CLK	/;"	d
MPP13_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP13_GPIO	/;"	d
MPP13_SD_CMD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP13_SD_CMD	/;"	d
MPP13_UART1_TXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP13_UART1_TXD	/;"	d
MPP14_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP14_GPIO	/;"	d
MPP14_MII0_COL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP14_MII0_COL	/;"	d
MPP14_SATA1_PRESENTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP14_SATA1_PRESENTn	/;"	d
MPP14_SD_D0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP14_SD_D0	/;"	d
MPP14_UART1_RXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP14_UART1_RXD	/;"	d
MPP15_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP15_GPIO	/;"	d
MPP15_SATA0_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP15_SATA0_ACTn	/;"	d
MPP15_SD_D1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP15_SD_D1	/;"	d
MPP15_UART0_RTS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP15_UART0_RTS	/;"	d
MPP15_UART1_TXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP15_UART1_TXD	/;"	d
MPP16_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP16_GPIO	/;"	d
MPP16_MII0_CRS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP16_MII0_CRS	/;"	d
MPP16_SATA1_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP16_SATA1_ACTn	/;"	d
MPP16_SD_D2	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP16_SD_D2	/;"	d
MPP16_UART0_CTS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP16_UART0_CTS	/;"	d
MPP16_UART1_RXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP16_UART1_RXD	/;"	d
MPP17_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP17_GPIO	/;"	d
MPP17_SATA0_PRESENTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP17_SATA0_PRESENTn	/;"	d
MPP17_SD_D3	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP17_SD_D3	/;"	d
MPP18	arch/arm/dts/armada-388-clearfog.dts	/^MPP18: gpio		? (pca9655 int?)$/;"	l
MPP18_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP18_GPO	/;"	d
MPP18_NF_IO0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP18_NF_IO0	/;"	d
MPP19	arch/arm/dts/armada-388-clearfog.dts	/^MPP19: gpio		? (clkreq?)$/;"	l	label:MPP18
MPP19_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP19_GPO	/;"	d
MPP19_NF_IO1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP19_NF_IO1	/;"	d
MPP1_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP1_GPO	/;"	d
MPP1_NF_IO3	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP1_NF_IO3	/;"	d
MPP1_SPI_MOSI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP1_SPI_MOSI	/;"	d
MPP20	arch/arm/dts/armada-388-clearfog.dts	/^MPP20: gpio		? (sd0 detect)$/;"	l	label:MPP18.MPP19
MPP20_AUDIO_SPDIFI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP20_AUDIO_SPDIFI	/;"	d
MPP20_GE1_0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP20_GE1_0	/;"	d
MPP20_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP20_GPIO	/;"	d
MPP20_SATA1_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP20_SATA1_ACTn	/;"	d
MPP20_TDM_CH0_TX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP20_TDM_CH0_TX_QL	/;"	d
MPP20_TSMP0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP20_TSMP0	/;"	d
MPP21	arch/arm/dts/armada-388-clearfog.dts	/^MPP21: sd0:cmd		x sd0$/;"	l	label:MPP18.MPP19.MPP20
MPP21_AUDIO_SPDIFO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP21_AUDIO_SPDIFO	/;"	d
MPP21_GE1_1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP21_GE1_1	/;"	d
MPP21_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP21_GPIO	/;"	d
MPP21_SATA0_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP21_SATA0_ACTn	/;"	d
MPP21_TDM_CH0_RX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP21_TDM_CH0_RX_QL	/;"	d
MPP21_TSMP1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP21_TSMP1	/;"	d
MPP22	arch/arm/dts/armada-388-clearfog.dts	/^MPP22: gpio		x mikro int$/;"	l	label:MPP18.MPP19.MPP20.MPP21
MPP22_AUDIO_SPDIFRMKCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP22_AUDIO_SPDIFRMKCLK	/;"	d
MPP22_GE1_2	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP22_GE1_2	/;"	d
MPP22_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP22_GPIO	/;"	d
MPP22_SATA1_PRESENTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP22_SATA1_PRESENTn	/;"	d
MPP22_TDM_CH2_TX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP22_TDM_CH2_TX_QL	/;"	d
MPP22_TSMP2	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP22_TSMP2	/;"	d
MPP23	arch/arm/dts/armada-388-clearfog.dts	/^MPP23: gpio		x switch irq$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22
MPP23_AUDIO_I2SBCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP23_AUDIO_I2SBCLK	/;"	d
MPP23_GE1_3	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP23_GE1_3	/;"	d
MPP23_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP23_GPIO	/;"	d
MPP23_SATA0_PRESENTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP23_SATA0_PRESENTn	/;"	d
MPP23_TDM_CH2_RX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP23_TDM_CH2_RX_QL	/;"	d
MPP23_TSMP3	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP23_TSMP3	/;"	d
MPP24	arch/arm/dts/armada-388-clearfog.dts	/^MPP24: ua1:rxd		x mikro rx$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23
MPP24_AUDIO_I2SDO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP24_AUDIO_I2SDO	/;"	d
MPP24_GE1_4	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP24_GE1_4	/;"	d
MPP24_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP24_GPIO	/;"	d
MPP24_TDM_SPI_CS0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP24_TDM_SPI_CS0	/;"	d
MPP24_TSMP4	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP24_TSMP4	/;"	d
MPP25	arch/arm/dts/armada-388-clearfog.dts	/^MPP25: ua1:txd		x mikro tx$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24
MPP25_AUDIO_I2SLRCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP25_AUDIO_I2SLRCLK	/;"	d
MPP25_GE1_5	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP25_GE1_5	/;"	d
MPP25_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP25_GPIO	/;"	d
MPP25_TDM_SPI_SCK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP25_TDM_SPI_SCK	/;"	d
MPP25_TSMP5	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP25_TSMP5	/;"	d
MPP26	arch/arm/dts/armada-388-clearfog.dts	/^MPP26: i2c1:sck		x mikro sck$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25
MPP26_AUDIO_I2SMCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP26_AUDIO_I2SMCLK	/;"	d
MPP26_GE1_6	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP26_GE1_6	/;"	d
MPP26_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP26_GPIO	/;"	d
MPP26_TDM_SPI_MISO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP26_TDM_SPI_MISO	/;"	d
MPP26_TSMP6	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP26_TSMP6	/;"	d
MPP27	arch/arm/dts/armada-388-clearfog.dts	/^MPP27: i2c1:sda		x mikro sda$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26
MPP27_AUDIO_I2SDI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP27_AUDIO_I2SDI	/;"	d
MPP27_GE1_7	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP27_GE1_7	/;"	d
MPP27_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP27_GPIO	/;"	d
MPP27_TDM_SPI_MOSI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP27_TDM_SPI_MOSI	/;"	d
MPP27_TSMP7	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP27_TSMP7	/;"	d
MPP28	arch/arm/dts/armada-388-clearfog.dts	/^MPP28: sd0:clk		x sd0$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27
MPP28_AUDIO_EXTCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP28_AUDIO_EXTCLK	/;"	d
MPP28_GE1_8	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP28_GE1_8	/;"	d
MPP28_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP28_GPIO	/;"	d
MPP28_TDM_CODEC_INTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP28_TDM_CODEC_INTn	/;"	d
MPP28_TSMP8	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP28_TSMP8	/;"	d
MPP29	arch/arm/dts/armada-388-clearfog.dts	/^MPP29: gpio		x mikro rst$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28
MPP29_GE1_9	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP29_GE1_9	/;"	d
MPP29_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP29_GPIO	/;"	d
MPP29_TDM_CODEC_RSTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP29_TDM_CODEC_RSTn	/;"	d
MPP29_TSMP9	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP29_TSMP9	/;"	d
MPP2_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP2_GPO	/;"	d
MPP2_NF_IO4	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP2_NF_IO4	/;"	d
MPP2_SPI_SCK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP2_SPI_SCK	/;"	d
MPP30	arch/arm/dts/armada-388-clearfog.dts	/^MPP30: ge1:txd2		? (config)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29
MPP30_GE1_10	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP30_GE1_10	/;"	d
MPP30_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP30_GPIO	/;"	d
MPP30_TDM_PCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP30_TDM_PCLK	/;"	d
MPP30_TSMP10	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP30_TSMP10	/;"	d
MPP31	arch/arm/dts/armada-388-clearfog.dts	/^MPP31: ge1:txd3		? (config)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30
MPP31_GE1_11	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP31_GE1_11	/;"	d
MPP31_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP31_GPIO	/;"	d
MPP31_TDM_FS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP31_TDM_FS	/;"	d
MPP31_TSMP11	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP31_TSMP11	/;"	d
MPP32	arch/arm/dts/armada-388-clearfog.dts	/^MPP32: ge1:txctl	? (unused)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31
MPP32_GE1_12	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP32_GE1_12	/;"	d
MPP32_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP32_GPIO	/;"	d
MPP32_TDM_DRX	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP32_TDM_DRX	/;"	d
MPP32_TSMP12	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP32_TSMP12	/;"	d
MPP33	arch/arm/dts/armada-388-clearfog.dts	/^MPP33: gpio		? (pic_com0)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32
MPP33_GE1_13	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP33_GE1_13	/;"	d
MPP33_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP33_GPIO	/;"	d
MPP33_TDM_DTX	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP33_TDM_DTX	/;"	d
MPP34	arch/arm/dts/armada-388-clearfog.dts	/^MPP34: gpio		x rear button (pic_com1)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33
MPP34_GE1_14	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP34_GE1_14	/;"	d
MPP34_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP34_GPIO	/;"	d
MPP34_TDM_SPI_CS1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP34_TDM_SPI_CS1	/;"	d
MPP35	arch/arm/dts/armada-388-clearfog.dts	/^MPP35: gpio		? (pic_com2)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34
MPP35_GE1_15	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP35_GE1_15	/;"	d
MPP35_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP35_GPIO	/;"	d
MPP35_MII0_RXERR	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP35_MII0_RXERR	/;"	d
MPP35_SATA0_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP35_SATA0_ACTn	/;"	d
MPP35_TDM_CH0_TX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP35_TDM_CH0_TX_QL	/;"	d
MPP36	arch/arm/dts/armada-388-clearfog.dts	/^MPP36: gpio		? (unused)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35
MPP36_AUDIO_SPDIFI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP36_AUDIO_SPDIFI	/;"	d
MPP36_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP36_GPIO	/;"	d
MPP36_TDM_SPI_CS1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP36_TDM_SPI_CS1	/;"	d
MPP36_TSMP0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP36_TSMP0	/;"	d
MPP37	arch/arm/dts/armada-388-clearfog.dts	/^MPP37: sd0:d3		x sd0$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36
MPP37_AUDIO_SPDIFO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP37_AUDIO_SPDIFO	/;"	d
MPP37_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP37_GPIO	/;"	d
MPP37_TDM_CH2_TX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP37_TDM_CH2_TX_QL	/;"	d
MPP37_TSMP1	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP37_TSMP1	/;"	d
MPP38	arch/arm/dts/armada-388-clearfog.dts	/^MPP38: sd0:d0		x sd0$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37
MPP38_AUDIO_SPDIFRMLCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP38_AUDIO_SPDIFRMLCLK	/;"	d
MPP38_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP38_GPIO	/;"	d
MPP38_TDM_CH2_RX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP38_TDM_CH2_RX_QL	/;"	d
MPP38_TSMP2	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP38_TSMP2	/;"	d
MPP39	arch/arm/dts/armada-388-clearfog.dts	/^MPP39: sd0:d1		x sd0$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38
MPP39_AUDIO_I2SBCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP39_AUDIO_I2SBCLK	/;"	d
MPP39_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP39_GPIO	/;"	d
MPP39_TDM_SPI_CS0	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP39_TDM_SPI_CS0	/;"	d
MPP39_TSMP3	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP39_TSMP3	/;"	d
MPP3_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP3_GPO	/;"	d
MPP3_NF_IO5	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP3_NF_IO5	/;"	d
MPP3_SPI_MISO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP3_SPI_MISO	/;"	d
MPP40	arch/arm/dts/armada-388-clearfog.dts	/^MPP40: sd0:d2		x sd0$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39
MPP40_AUDIO_I2SDO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP40_AUDIO_I2SDO	/;"	d
MPP40_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP40_GPIO	/;"	d
MPP40_TDM_SPI_SCK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP40_TDM_SPI_SCK	/;"	d
MPP40_TSMP4	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP40_TSMP4	/;"	d
MPP41	arch/arm/dts/armada-388-clearfog.dts	/^MPP41: gpio		x switch reset$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40
MPP41_AUDIO_I2SLRC	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP41_AUDIO_I2SLRC	/;"	d
MPP41_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP41_GPIO	/;"	d
MPP41_TDM_SPI_MISO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP41_TDM_SPI_MISO	/;"	d
MPP41_TSMP5	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP41_TSMP5	/;"	d
MPP42	arch/arm/dts/armada-388-clearfog.dts	/^MPP42: gpio		? sw1-1$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41
MPP42_AUDIO_I2SMCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP42_AUDIO_I2SMCLK	/;"	d
MPP42_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP42_GPIO	/;"	d
MPP42_TDM_SPI_MOSI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP42_TDM_SPI_MOSI	/;"	d
MPP42_TSMP6	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP42_TSMP6	/;"	d
MPP43	arch/arm/dts/armada-388-clearfog.dts	/^MPP43: spi1:cs2		x mikro cs$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42
MPP43_AUDIO_I2SDI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP43_AUDIO_I2SDI	/;"	d
MPP43_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP43_GPIO	/;"	d
MPP43_TDM_CODEC_INTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP43_TDM_CODEC_INTn	/;"	d
MPP43_TSMP7	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP43_TSMP7	/;"	d
MPP44	arch/arm/dts/armada-388-clearfog.dts	/^MPP44: sata3:prsnt	? (unused)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43
MPP44_AUDIO_EXTCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP44_AUDIO_EXTCLK	/;"	d
MPP44_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP44_GPIO	/;"	d
MPP44_TDM_CODEC_RSTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP44_TDM_CODEC_RSTn	/;"	d
MPP44_TSMP8	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP44_TSMP8	/;"	d
MPP45	arch/arm/dts/armada-388-clearfog.dts	/^MPP45: ref:clk_out0	?$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44
MPP45_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP45_GPIO	/;"	d
MPP45_TDM_PCLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP45_TDM_PCLK	/;"	d
MPP45_TSMP9	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP45_TSMP9	/;"	d
MPP46	arch/arm/dts/armada-388-clearfog.dts	/^MPP46: ref:clk_out1	x switch clk$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45
MPP46_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP46_GPIO	/;"	d
MPP46_TDM_FS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP46_TDM_FS	/;"	d
MPP46_TSMP10	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP46_TSMP10	/;"	d
MPP47	arch/arm/dts/armada-388-clearfog.dts	/^MPP47: 4		? (unused)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46
MPP47_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP47_GPIO	/;"	d
MPP47_TDM_DRX	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP47_TDM_DRX	/;"	d
MPP47_TSMP11	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP47_TSMP11	/;"	d
MPP48	arch/arm/dts/armada-388-clearfog.dts	/^MPP48: tdm:pclk$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47
MPP48_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP48_GPIO	/;"	d
MPP48_TDM_DTX	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP48_TDM_DTX	/;"	d
MPP48_TSMP12	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP48_TSMP12	/;"	d
MPP49	arch/arm/dts/armada-388-clearfog.dts	/^MPP49: tdm:fsync$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48
MPP49_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP49_GPIO	/;"	d
MPP49_PTP_CLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP49_PTP_CLK	/;"	d
MPP49_TDM_CH0_RX_QL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP49_TDM_CH0_RX_QL	/;"	d
MPP49_TSMP9	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP49_TSMP9	/;"	d
MPP4_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP4_GPIO	/;"	d
MPP4_NF_IO6	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP4_NF_IO6	/;"	d
MPP4_PTP_CLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP4_PTP_CLK	/;"	d
MPP4_SATA1_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP4_SATA1_ACTn	/;"	d
MPP4_UART0_RXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP4_UART0_RXD	/;"	d
MPP50	arch/arm/dts/armada-388-clearfog.dts	/^MPP50: tdm:drx$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49
MPP51	arch/arm/dts/armada-388-clearfog.dts	/^MPP51: tdm:dtx$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50
MPP52	arch/arm/dts/armada-388-clearfog.dts	/^MPP52: tdm:int$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51
MPP53	arch/arm/dts/armada-388-clearfog.dts	/^MPP53: tdm:rst$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52
MPP54	arch/arm/dts/armada-388-clearfog.dts	/^MPP54: gpio		? (pwm)$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52.MPP53
MPP55	arch/arm/dts/armada-388-clearfog.dts	/^MPP55: spi1:cs1		x slic$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52.MPP53.MPP54
MPP56	arch/arm/dts/armada-388-clearfog.dts	/^MPP56: spi1:mosi	x mikro mosi$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52.MPP53.MPP54.MPP55
MPP57	arch/arm/dts/armada-388-clearfog.dts	/^MPP57: spi1:sck		x mikro sck$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52.MPP53.MPP54.MPP55.MPP56
MPP58	arch/arm/dts/armada-388-clearfog.dts	/^MPP58: spi1:miso	x mikro miso$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52.MPP53.MPP54.MPP55.MPP56.MPP57
MPP59	arch/arm/dts/armada-388-clearfog.dts	/^MPP59: spi1:cs0		x w25q32$/;"	l	label:MPP18.MPP19.MPP20.MPP21.MPP22.MPP23.MPP24.MPP25.MPP26.MPP27.MPP28.MPP29.MPP30.MPP31.MPP32.MPP33.MPP34.MPP35.MPP36.MPP37.MPP38.MPP39.MPP40.MPP41.MPP42.MPP43.MPP44.MPP45.MPP46.MPP47.MPP48.MPP49.MPP50.MPP51.MPP52.MPP53.MPP54.MPP55.MPP56.MPP57.MPP58
MPP5_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP5_GPO	/;"	d
MPP5_NF_IO7	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP5_NF_IO7	/;"	d
MPP5_PTP_TRIG_GEN	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP5_PTP_TRIG_GEN	/;"	d
MPP5_SATA0_ACTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP5_SATA0_ACTn	/;"	d
MPP5_UART0_TXD	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP5_UART0_TXD	/;"	d
MPP6_PTP_TRIG_GEN	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP6_PTP_TRIG_GEN	/;"	d
MPP6_SPI_MOSI	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP6_SPI_MOSI	/;"	d
MPP6_SYSRST_OUTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP6_SYSRST_OUTn	/;"	d
MPP7_GPO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP7_GPO	/;"	d
MPP7_PEX_RST_OUTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP7_PEX_RST_OUTn	/;"	d
MPP7_PTP_TRIG_GEN	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP7_PTP_TRIG_GEN	/;"	d
MPP7_SPI_SCn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP7_SPI_SCn	/;"	d
MPP8_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_GPIO	/;"	d
MPP8_MII0_COL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_MII0_COL	/;"	d
MPP8_MII0_RXERR	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_MII0_RXERR	/;"	d
MPP8_PTP_CLK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_PTP_CLK	/;"	d
MPP8_SATA1_PRESENTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_SATA1_PRESENTn	/;"	d
MPP8_TW_SDA	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_TW_SDA	/;"	d
MPP8_UART0_RTS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_UART0_RTS	/;"	d
MPP8_UART1_RTS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP8_UART1_RTS	/;"	d
MPP9_GPIO	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_GPIO	/;"	d
MPP9_MII0_CRS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_MII0_CRS	/;"	d
MPP9_PTP_EVENT_REQ	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_PTP_EVENT_REQ	/;"	d
MPP9_SATA0_PRESENTn	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_SATA0_PRESENTn	/;"	d
MPP9_TW_SCK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_TW_SCK	/;"	d
MPP9_UART0_CTS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_UART0_CTS	/;"	d
MPP9_UART1_CTS	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP9_UART1_CTS	/;"	d
MPPDCMPR2_MPR_COMPARE_EN	include/fsl_mmdc.h	/^#define MPPDCMPR2_MPR_COMPARE_EN	/;"	d
MPP_CONTROL_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_CONTROL_REG(/;"	d
MPP_CONTROL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MPP_CONTROL_REG(/;"	d
MPP_CTRL	arch/arm/mach-kirkwood/mpp.c	/^#define MPP_CTRL(/;"	d	file:
MPP_CTRL_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_CTRL_REG	/;"	d
MPP_F6180_MASK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_F6180_MASK	/;"	d
MPP_F6190_MASK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_F6190_MASK	/;"	d
MPP_F6192_MASK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_F6192_MASK	/;"	d
MPP_F6281_MASK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_F6281_MASK	/;"	d
MPP_INPUT_MASK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_INPUT_MASK	/;"	d
MPP_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_MASK(/;"	d
MPP_MAX	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_MAX	/;"	d
MPP_NR_REGS	arch/arm/mach-kirkwood/mpp.c	/^#define MPP_NR_REGS	/;"	d	file:
MPP_NUM	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_NUM(/;"	d
MPP_OUTPUT_MASK	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_OUTPUT_MASK	/;"	d
MPP_REG_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_REG_NUM(/;"	d
MPP_SAMPLE_AT_RESET	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define MPP_SAMPLE_AT_RESET(/;"	d
MPP_SAMPLE_AT_RESET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MPP_SAMPLE_AT_RESET(/;"	d
MPP_SEL	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define MPP_SEL(/;"	d
MPP_SET_DATA	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_SET_DATA	/;"	d
MPP_SET_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_SET_MASK	/;"	d
MPP_TB_CONFIG	include/radeon.h	/^#define MPP_TB_CONFIG	/;"	d
MPP_UART1_SET_DATA	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_UART1_SET_DATA	/;"	d
MPP_UART1_SET_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MPP_UART1_SET_MASK	/;"	d
MPR	drivers/net/sh_eth.h	/^	MPR,$/;"	e	enum:__anon5ef54f5a0103
MPRDDLHWCTL_AUTO_RD_CALIBRATION_EN	include/fsl_mmdc.h	/^#define MPRDDLHWCTL_AUTO_RD_CALIBRATION_EN	/;"	d
MPRDQ_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define MPRDQ_MASK /;"	d
MPROG	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	MPROG	/;"	d
MPROT_MPL	arch/m68k/include/asm/m520x.h	/^#define MPROT_MPL	/;"	d
MPROT_MPL	arch/m68k/include/asm/m5301x.h	/^#define MPROT_MPL	/;"	d
MPROT_MPL	arch/m68k/include/asm/m5329.h	/^#define MPROT_MPL	/;"	d
MPROT_MTR	arch/m68k/include/asm/m520x.h	/^#define MPROT_MTR	/;"	d
MPROT_MTR	arch/m68k/include/asm/m5301x.h	/^#define MPROT_MTR	/;"	d
MPROT_MTR	arch/m68k/include/asm/m5329.h	/^#define MPROT_MTR	/;"	d
MPROT_MTW	arch/m68k/include/asm/m520x.h	/^#define MPROT_MTW	/;"	d
MPROT_MTW	arch/m68k/include/asm/m5301x.h	/^#define MPROT_MTW	/;"	d
MPROT_MTW	arch/m68k/include/asm/m5329.h	/^#define MPROT_MTW	/;"	d
MPR_BIT	drivers/net/sh_eth.h	/^enum MPR_BIT {$/;"	g
MPR_MP	drivers/net/sh_eth.h	/^	MPR_MP = 0x00000006,$/;"	e	enum:MPR_BIT
MPSCTRL_ECB_MODE	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_ECB_MODE	/;"	d
MPSCTRL_ENCRYPTION	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_ENCRYPTION	/;"	d
MPSCTRL_NON_SECURE_READ_BIT	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_NON_SECURE_READ_BIT	/;"	d
MPSCTRL_NON_SECURE_WRITE_BIT	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_NON_SECURE_WRITE_BIT	/;"	d
MPSCTRL_SECURE_READ_BIT	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_SECURE_READ_BIT	/;"	d
MPSCTRL_SECURE_WRITE_BIT	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_SECURE_WRITE_BIT	/;"	d
MPSCTRL_USE_FUSE_KEY	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_USE_FUSE_KEY	/;"	d
MPSCTRL_VALID	arch/arm/mach-exynos/include/mach/dwmmc.h	/^#define MPSCTRL_VALID	/;"	d
MPSPEC_V14	arch/x86/include/asm/mpspec.h	/^#define MPSPEC_V14	/;"	d
MPS_AP	board/mpl/mip405/mip405.h	/^#define MPS_AP	/;"	d
MPS_AP	board/mpl/pip405/pip405.h	/^#define MPS_AP	/;"	d
MPS_AP_B	board/mpl/mip405/mip405.h	/^#define MPS_AP_B	/;"	d
MPS_AP_B	board/mpl/pip405/pip405.h	/^#define MPS_AP_B	/;"	d
MPS_BEM	board/mpl/mip405/mip405.h	/^#define MPS_BEM	/;"	d
MPS_BEM	board/mpl/pip405/pip405.h	/^#define MPS_BEM	/;"	d
MPS_BME	board/mpl/mip405/mip405.h	/^#define MPS_BME	/;"	d
MPS_BME	board/mpl/pip405/pip405.h	/^#define MPS_BME	/;"	d
MPS_BME_B	board/mpl/mip405/mip405.h	/^#define MPS_BME_B	/;"	d
MPS_BME_B	board/mpl/pip405/pip405.h	/^#define MPS_BME_B	/;"	d
MPS_BS	board/mpl/mip405/mip405.h	/^#define MPS_BS	/;"	d
MPS_BS	board/mpl/pip405/pip405.h	/^#define MPS_BS	/;"	d
MPS_BS_B	board/mpl/mip405/mip405.h	/^#define MPS_BS_B	/;"	d
MPS_BS_B	board/mpl/pip405/pip405.h	/^#define MPS_BS_B	/;"	d
MPS_BU	board/mpl/mip405/mip405.h	/^#define MPS_BU	/;"	d
MPS_BU	board/mpl/pip405/pip405.h	/^#define MPS_BU	/;"	d
MPS_BW	board/mpl/mip405/mip405.h	/^#define MPS_BW	/;"	d
MPS_BW	board/mpl/pip405/pip405.h	/^#define MPS_BW	/;"	d
MPS_BWT_B	board/mpl/mip405/mip405.h	/^#define MPS_BWT_B	/;"	d
MPS_BWT_B	board/mpl/pip405/pip405.h	/^#define MPS_BWT_B	/;"	d
MPS_CR	board/mpl/mip405/mip405.h	/^#define MPS_CR	/;"	d
MPS_CR	board/mpl/pip405/pip405.h	/^#define MPS_CR	/;"	d
MPS_CR_B	board/mpl/mip405/mip405.h	/^#define MPS_CR_B	/;"	d
MPS_CR_B	board/mpl/pip405/pip405.h	/^#define MPS_CR_B	/;"	d
MPS_CSN	board/mpl/mip405/mip405.h	/^#define MPS_CSN	/;"	d
MPS_CSN	board/mpl/pip405/pip405.h	/^#define MPS_CSN	/;"	d
MPS_FWT_B	board/mpl/mip405/mip405.h	/^#define MPS_FWT_B	/;"	d
MPS_FWT_B	board/mpl/pip405/pip405.h	/^#define MPS_FWT_B	/;"	d
MPS_OEN	board/mpl/mip405/mip405.h	/^#define MPS_OEN	/;"	d
MPS_OEN	board/mpl/pip405/pip405.h	/^#define MPS_OEN	/;"	d
MPS_PEN	board/mpl/mip405/mip405.h	/^#define MPS_PEN	/;"	d
MPS_PEN	board/mpl/pip405/pip405.h	/^#define MPS_PEN	/;"	d
MPS_RE	board/mpl/mip405/mip405.h	/^#define MPS_RE	/;"	d
MPS_RE	board/mpl/pip405/pip405.h	/^#define MPS_RE	/;"	d
MPS_SOR	board/mpl/mip405/mip405.h	/^#define MPS_SOR	/;"	d
MPS_SOR	board/mpl/pip405/pip405.h	/^#define MPS_SOR	/;"	d
MPS_TH	board/mpl/mip405/mip405.h	/^#define MPS_TH	/;"	d
MPS_TH	board/mpl/pip405/pip405.h	/^#define MPS_TH	/;"	d
MPS_TWE	board/mpl/mip405/mip405.h	/^#define MPS_TWE	/;"	d
MPS_TWE	board/mpl/pip405/pip405.h	/^#define MPS_TWE	/;"	d
MPS_WBF	board/mpl/mip405/mip405.h	/^#define MPS_WBF	/;"	d
MPS_WBF	board/mpl/pip405/pip405.h	/^#define MPS_WBF	/;"	d
MPS_WBN	board/mpl/mip405/mip405.h	/^#define MPS_WBN	/;"	d
MPS_WBN	board/mpl/pip405/pip405.h	/^#define MPS_WBN	/;"	d
MPTPR_PTP_DIV16	include/mpc8260.h	/^#define MPTPR_PTP_DIV16	/;"	d
MPTPR_PTP_DIV16	include/mpc8xx.h	/^#define MPTPR_PTP_DIV16 /;"	d
MPTPR_PTP_DIV2	include/mpc8260.h	/^#define MPTPR_PTP_DIV2	/;"	d
MPTPR_PTP_DIV2	include/mpc8xx.h	/^#define MPTPR_PTP_DIV2	/;"	d
MPTPR_PTP_DIV32	include/mpc8260.h	/^#define MPTPR_PTP_DIV32	/;"	d
MPTPR_PTP_DIV32	include/mpc8xx.h	/^#define MPTPR_PTP_DIV32 /;"	d
MPTPR_PTP_DIV4	include/mpc8260.h	/^#define MPTPR_PTP_DIV4	/;"	d
MPTPR_PTP_DIV4	include/mpc8xx.h	/^#define MPTPR_PTP_DIV4	/;"	d
MPTPR_PTP_DIV64	include/mpc8260.h	/^#define MPTPR_PTP_DIV64	/;"	d
MPTPR_PTP_DIV64	include/mpc8xx.h	/^#define MPTPR_PTP_DIV64 /;"	d
MPTPR_PTP_DIV8	include/mpc8260.h	/^#define MPTPR_PTP_DIV8	/;"	d
MPTPR_PTP_DIV8	include/mpc8xx.h	/^#define MPTPR_PTP_DIV8	/;"	d
MPTPR_PTP_MSK	include/mpc8260.h	/^#define MPTPR_PTP_MSK	/;"	d
MPTPR_PTP_MSK	include/mpc8xx.h	/^#define MPTPR_PTP_MSK	/;"	d
MPU	board/siemens/pxm2/board.c	/^#define MPU	/;"	d	file:
MPU	include/power/tps65910.h	/^#define MPU /;"	d
MPUPLL_FREF	board/bosch/shc/board.c	/^#define MPUPLL_FREF /;"	d	file:
MPUPLL_M_1000	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define MPUPLL_M_1000	/;"	d
MPUPLL_M_300	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define MPUPLL_M_300	/;"	d
MPUPLL_M_550	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define MPUPLL_M_550	/;"	d
MPUPLL_M_600	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define MPUPLL_M_600	/;"	d
MPUPLL_M_720	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define MPUPLL_M_720	/;"	d
MPUPLL_M_800	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define MPUPLL_M_800	/;"	d
MPUPLL_N	board/bosch/shc/board.c	/^#define MPUPLL_N /;"	d	file:
MPU_CLKCTRL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define MPU_CLKCTRL	/;"	d	file:
MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK	/;"	d
MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK	/;"	d
MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT	/;"	d
MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT	/;"	d
MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	/;"	d
MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	/;"	d
MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	/;"	d
MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	/;"	d
MPU_FSEL_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_12	/;"	d
MPU_FSEL_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_12_ES1	/;"	d
MPU_FSEL_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_12_ES2	/;"	d
MPU_FSEL_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_13	/;"	d
MPU_FSEL_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_13_ES1	/;"	d
MPU_FSEL_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_13_ES2	/;"	d
MPU_FSEL_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_19P2	/;"	d
MPU_FSEL_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_19P2_ES1	/;"	d
MPU_FSEL_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_19P2_ES2	/;"	d
MPU_FSEL_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_26	/;"	d
MPU_FSEL_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_26_ES1	/;"	d
MPU_FSEL_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_26_ES2	/;"	d
MPU_FSEL_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_38P4	/;"	d
MPU_FSEL_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_38P4_ES1	/;"	d
MPU_FSEL_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_FSEL_38P4_ES2	/;"	d
MPU_M	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define MPU_M	/;"	d	file:
MPU_M2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define MPU_M2	/;"	d	file:
MPU_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_12	/;"	d
MPU_M2_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_12_ES1	/;"	d
MPU_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_13	/;"	d
MPU_M2_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_13_ES1	/;"	d
MPU_M2_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_13_ES2	/;"	d
MPU_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_19P2	/;"	d
MPU_M2_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_19P2_ES1	/;"	d
MPU_M2_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_19P2_ES2	/;"	d
MPU_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_26	/;"	d
MPU_M2_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_26_ES1	/;"	d
MPU_M2_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_26_ES2	/;"	d
MPU_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_38P4	/;"	d
MPU_M2_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_38P4_ES1	/;"	d
MPU_M2_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_38P4_ES2	/;"	d
MPU_M2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M2_ES2	/;"	d
MPU_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_12	/;"	d
MPU_M_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_12_ES1	/;"	d
MPU_M_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_12_ES2	/;"	d
MPU_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_13	/;"	d
MPU_M_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_13_ES1	/;"	d
MPU_M_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_13_ES2	/;"	d
MPU_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_19P2	/;"	d
MPU_M_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_19P2_ES1	/;"	d
MPU_M_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_19P2_ES2	/;"	d
MPU_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_26	/;"	d
MPU_M_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_26_ES1	/;"	d
MPU_M_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_26_ES2	/;"	d
MPU_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_38P4	/;"	d
MPU_M_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_38P4_ES1	/;"	d
MPU_M_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_M_38P4_ES2	/;"	d
MPU_N	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define MPU_N	/;"	d	file:
MPU_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_12	/;"	d
MPU_N_12_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_12_ES1	/;"	d
MPU_N_12_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_12_ES2	/;"	d
MPU_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_13	/;"	d
MPU_N_13_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_13_ES1	/;"	d
MPU_N_13_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_13_ES2	/;"	d
MPU_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_19P2	/;"	d
MPU_N_19P2_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_19P2_ES1	/;"	d
MPU_N_19P2_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_19P2_ES2	/;"	d
MPU_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_26	/;"	d
MPU_N_26_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_26_ES1	/;"	d
MPU_N_26_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_26_ES2	/;"	d
MPU_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_38P4	/;"	d
MPU_N_38P4_ES1	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_38P4_ES1	/;"	d
MPU_N_38P4_ES2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define MPU_N_38P4_ES2	/;"	d
MPU_PLL_BASE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define MPU_PLL_BASE	/;"	d	file:
MPU_SPREADING_PERMILLE	board/bosch/shc/board.c	/^#define MPU_SPREADING_PERMILLE /;"	d	file:
MPWLGCR_HW_WL_EN	include/fsl_mmdc.h	/^#define MPWLGCR_HW_WL_EN	/;"	d
MPZQHWCTRL_ZQ_HW_FORCE	include/fsl_mmdc.h	/^#define MPZQHWCTRL_ZQ_HW_FORCE	/;"	d
MP_APIC_ALL	arch/x86/include/asm/mpspec.h	/^#define MP_APIC_ALL	/;"	d
MP_AXI_ADSPDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ADSPDMSCR	/;"	d
MP_AXI_ADSPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ADSPSLVDMSCR	/;"	d
MP_AXI_ADSP_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ADSP_BASE	/;"	d
MP_AXI_ASDM0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ASDM0DMSCR	/;"	d
MP_AXI_ASDM1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ASDM1DMSCR	/;"	d
MP_AXI_ASDS0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ASDS0DMSCR	/;"	d
MP_AXI_ASDS0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ASDS0_BASE	/;"	d
MP_AXI_ASDS1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ASDS1DMSCR	/;"	d
MP_AXI_ASDS1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_ASDS1_BASE	/;"	d
MP_AXI_MLMSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MLMSLVDMSCR	/;"	d
MP_AXI_MLPDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MLPDMSCR	/;"	d
MP_AXI_MLP_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MLP_BASE	/;"	d
MP_AXI_MMUMPDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MMUMPDMSCR	/;"	d
MP_AXI_MMUMP_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MMUMP_BASE	/;"	d
MP_AXI_MP2SY2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MP2SY2SLVDMSCR	/;"	d
MP_AXI_MP2SYSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MP2SYSLVDMSCR	/;"	d
MP_AXI_MPAP4SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MPAP4SLVDMSCR	/;"	d
MP_AXI_MPAP5SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MPAP5SLVDMSCR	/;"	d
MP_AXI_MPAP6SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MPAP6SLVDMSCR	/;"	d
MP_AXI_MPAP7SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MPAP7SLVDMSCR	/;"	d
MP_AXI_MPXAPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_MPXAPSLVDMSCR	/;"	d
MP_AXI_SPUCDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_SPUCDMSCR	/;"	d
MP_AXI_SPUC_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_SPUC_BASE	/;"	d
MP_AXI_SPUDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_SPUDMSCR	/;"	d
MP_AXI_SPUSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_SPUSLVDMSCR	/;"	d
MP_AXI_SPU_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_SPU_BASE	/;"	d
MP_AXI_SY2MPDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_SY2MPDMSCR	/;"	d
MP_AXI_UTLBMPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MP_AXI_UTLBMPSLVDMSCR	/;"	d
MP_BUS	arch/x86/include/asm/mpspec.h	/^	MP_BUS,$/;"	e	enum:mp_base_config_entry_type
MP_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	MP_DIV_MASK		= 0xf,$/;"	e	enum:__anon06a678fa0203	file:
MP_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	MP_DIV_SHIFT		= 4,$/;"	e	enum:__anon06a678fa0203	file:
MP_EXTINT	arch/x86/include/asm/mpspec.h	/^	MP_EXTINT$/;"	e	enum:mp_irq_source_types
MP_FLIGHT_RECORD	arch/x86/include/asm/mp.h	/^#define MP_FLIGHT_RECORD(/;"	d
MP_FR_BLOCK_APS	arch/x86/include/asm/mp.h	/^#define MP_FR_BLOCK_APS(/;"	d
MP_FR_NOBLOCK_APS	arch/x86/include/asm/mp.h	/^#define MP_FR_NOBLOCK_APS(/;"	d
MP_INT	arch/x86/include/asm/mpspec.h	/^	MP_INT,$/;"	e	enum:mp_irq_source_types
MP_INTSRC	arch/x86/include/asm/mpspec.h	/^	MP_INTSRC,$/;"	e	enum:mp_base_config_entry_type
MP_IOAPIC	arch/x86/include/asm/mpspec.h	/^	MP_IOAPIC,$/;"	e	enum:mp_base_config_entry_type
MP_IRQ_POLARITY_DEFAULT	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_POLARITY_DEFAULT	/;"	d
MP_IRQ_POLARITY_HIGH	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_POLARITY_HIGH	/;"	d
MP_IRQ_POLARITY_LOW	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_POLARITY_LOW	/;"	d
MP_IRQ_POLARITY_MASK	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_POLARITY_MASK	/;"	d
MP_IRQ_TRIGGER_DEFAULT	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_TRIGGER_DEFAULT	/;"	d
MP_IRQ_TRIGGER_EDGE	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_TRIGGER_EDGE	/;"	d
MP_IRQ_TRIGGER_LEVEL	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_TRIGGER_LEVEL	/;"	d
MP_IRQ_TRIGGER_MASK	arch/x86/include/asm/mpspec.h	/^#define MP_IRQ_TRIGGER_MASK	/;"	d
MP_LINTSRC	arch/x86/include/asm/mpspec.h	/^	MP_LINTSRC$/;"	e	enum:mp_base_config_entry_type
MP_NMI	arch/x86/include/asm/mpspec.h	/^	MP_NMI,$/;"	e	enum:mp_irq_source_types
MP_PROCESSOR	arch/x86/include/asm/mpspec.h	/^	MP_PROCESSOR,$/;"	e	enum:mp_base_config_entry_type
MP_SMI	arch/x86/include/asm/mpspec.h	/^	MP_SMI,$/;"	e	enum:mp_irq_source_types
MR	arch/arm/cpu/armv7/mx6/ddr.c	/^#define MR(/;"	d	file:
MR0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MR0_REG	/;"	d
MR10_ZQ_ZQCL	arch/arm/include/asm/emif.h	/^#define MR10_ZQ_ZQCL	/;"	d
MR10_ZQ_ZQCS	arch/arm/include/asm/emif.h	/^#define MR10_ZQ_ZQCS	/;"	d
MR10_ZQ_ZQINIT	arch/arm/include/asm/emif.h	/^#define MR10_ZQ_ZQINIT	/;"	d
MR10_ZQ_ZQRESET	arch/arm/include/asm/emif.h	/^#define MR10_ZQ_ZQRESET	/;"	d
MR16_REF_FULL_ARRAY	arch/arm/include/asm/emif.h	/^#define MR16_REF_FULL_ARRAY	/;"	d
MR1_BL_8_BT_SEQ_WRAP_EN_NWR_3	arch/arm/include/asm/emif.h	/^#define MR1_BL_8_BT_SEQ_WRAP_EN_NWR_3	/;"	d
MR1_BL_8_BT_SEQ_WRAP_EN_NWR_8	arch/arm/include/asm/emif.h	/^#define MR1_BL_8_BT_SEQ_WRAP_EN_NWR_8	/;"	d
MR1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MR1_REG	/;"	d
MR2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MR2_REG	/;"	d
MR2_RL3_WL1	arch/arm/include/asm/emif.h	/^#define MR2_RL3_WL1	/;"	d
MR2_RL4_WL2	arch/arm/include/asm/emif.h	/^#define MR2_RL4_WL2	/;"	d
MR2_RL5_WL2	arch/arm/include/asm/emif.h	/^#define MR2_RL5_WL2	/;"	d
MR2_RL6_WL3	arch/arm/include/asm/emif.h	/^#define MR2_RL6_WL3	/;"	d
MR3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MR3_REG	/;"	d
MR4_SDRAM_REF_RATE_MASK	arch/arm/include/asm/emif.h	/^#define MR4_SDRAM_REF_RATE_MASK	/;"	d
MR4_SDRAM_REF_RATE_SHIFT	arch/arm/include/asm/emif.h	/^#define MR4_SDRAM_REF_RATE_SHIFT	/;"	d
MR4_TUF_MASK	arch/arm/include/asm/emif.h	/^#define MR4_TUF_MASK	/;"	d
MR4_TUF_SHIFT	arch/arm/include/asm/emif.h	/^#define MR4_TUF_SHIFT	/;"	d
MR8_DENSITY_MASK	arch/arm/include/asm/emif.h	/^#define MR8_DENSITY_MASK	/;"	d
MR8_DENSITY_SHIFT	arch/arm/include/asm/emif.h	/^#define MR8_DENSITY_SHIFT	/;"	d
MR8_IO_WIDTH_MASK	arch/arm/include/asm/emif.h	/^#define MR8_IO_WIDTH_MASK	/;"	d
MR8_IO_WIDTH_SHIFT	arch/arm/include/asm/emif.h	/^#define MR8_IO_WIDTH_SHIFT	/;"	d
MR8_TYPE_MASK	arch/arm/include/asm/emif.h	/^#define MR8_TYPE_MASK	/;"	d
MR8_TYPE_SHIFT	arch/arm/include/asm/emif.h	/^#define MR8_TYPE_SHIFT	/;"	d
MRBLR_INIT_SETTINGS	include/tsec.h	/^#define MRBLR_INIT_SETTINGS	/;"	d
MRCR	arch/avr32/include/asm/hmatrix-common.h	/^	u32	MRCR;$/;"	m	struct:hmatrix_regs	typeref:typename:u32
MRC_DATA_ALIGN	arch/x86/include/asm/mrccache.h	/^#define MRC_DATA_ALIGN	/;"	d
MRC_DATA_HEADER_SIZE	arch/x86/include/asm/mrccache.h	/^#define MRC_DATA_HEADER_SIZE	/;"	d
MRC_DATA_SIGNATURE	arch/x86/include/asm/mrccache.h	/^#define MRC_DATA_SIGNATURE	/;"	d
MRC_E_MEMTEST	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_E_MEMTEST	/;"	d
MRC_FLAG_ECC_EN	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_ECC_EN	include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_ECC_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_MEMTEST_EN	include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_MEMTEST_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_SCRAMBLE_EN	include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_SCRAMBLE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_TOP_TREE_EN	include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_TOP_TREE_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_FLAG_WR_ODT_EN	include/dt-bindings/mrc/quark.h	/^#define MRC_FLAG_WR_ODT_EN	/;"	d
MRC_MEM_INIT	arch/x86/cpu/quark/hte.h	/^	MRC_MEM_INIT,$/;"	e	enum:__anone289d2a80103
MRC_MEM_TEST	arch/x86/cpu/quark/hte.h	/^	MRC_MEM_TEST$/;"	e	enum:__anone289d2a80103
MRC_SUCCESS	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_SUCCESS	/;"	d
MRC_VERSION	arch/x86/include/asm/arch-quark/mrc.h	/^#define MRC_VERSION	/;"	d
MRDCKA0_RESET	include/radeon.h	/^#define MRDCKA0_RESET	/;"	d
MRDCKA0_SLEEP	include/radeon.h	/^#define MRDCKA0_SLEEP	/;"	d
MRDCKA1_RESET	include/radeon.h	/^#define MRDCKA1_RESET	/;"	d
MRDCKA1_SLEEP	include/radeon.h	/^#define MRDCKA1_SLEEP	/;"	d
MREQPRIO_0_SAB_INIT0_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define MREQPRIO_0_SAB_INIT0_MASK	/;"	d
MREQPRIO_0_SAB_INIT1_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define MREQPRIO_0_SAB_INIT1_MASK	/;"	d
MREQPRIO_1_DSS_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define MREQPRIO_1_DSS_MASK	/;"	d
MRQ_ABI_RATCHET	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_ABI_RATCHET	/;"	d
MRQ_CLK	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_CLK	/;"	d
MRQ_CLK_MAX_PARENTS	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_CLK_MAX_PARENTS	/;"	d
MRQ_CLK_NAME_MAXLEN	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_CLK_NAME_MAXLEN	/;"	d
MRQ_CPU_VHINT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_CPU_VHINT	/;"	d
MRQ_DEBUGFS	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_DEBUGFS	/;"	d
MRQ_EMC_DVFS_LATENCY	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_EMC_DVFS_LATENCY	/;"	d
MRQ_I2C	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_I2C	/;"	d
MRQ_MODULE_LOAD	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_MODULE_LOAD	/;"	d
MRQ_MODULE_MAIL	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_MODULE_MAIL	/;"	d
MRQ_MODULE_UNLOAD	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_MODULE_UNLOAD	/;"	d
MRQ_PG_READ_STATE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_PG_READ_STATE	/;"	d
MRQ_PG_UPDATE_STATE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_PG_UPDATE_STATE	/;"	d
MRQ_PING	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_PING	/;"	d
MRQ_QUERY_ABI	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_QUERY_ABI	/;"	d
MRQ_QUERY_TAG	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_QUERY_TAG	/;"	d
MRQ_RESET	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_RESET	/;"	d
MRQ_THERMAL	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_THERMAL	/;"	d
MRQ_THREADED_PING	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_THREADED_PING	/;"	d
MRQ_TRACE_ITER	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_TRACE_ITER	/;"	d
MRQ_TRACE_MODIFY	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_TRACE_MODIFY	/;"	d
MRQ_WRITE_TRACE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MRQ_WRITE_TRACE	/;"	d
MRR_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	MRR_CMD				= 8,$/;"	e	enum:__anon114585520103
MRR_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	MRR_CMD				= 8,$/;"	e	enum:__anon957231910203	file:
MRS0_CMD	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MRS0_CMD	/;"	d
MRS1_A	board/espt/lowlevel_init.S	/^MRS1_A:		.long	0xFE900B08$/;"	l
MRS1_A	board/renesas/r7780mp/lowlevel_init.S	/^MRS1_A:			.long	0xFEC00B08$/;"	l
MRS1_CMD	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MRS1_CMD	/;"	d
MRS1_D	board/espt/lowlevel_init.S	/^MRS1_D:		.long	0x00000000$/;"	l
MRS1_D	board/renesas/r7780mp/lowlevel_init.S	/^MRS1_D:			.long	0x0$/;"	l
MRS2_A	board/espt/lowlevel_init.S	/^MRS2_A:		.long	0xFE900308$/;"	l
MRS2_A	board/renesas/r7780mp/lowlevel_init.S	/^MRS2_A:			.long	0xFEC00308$/;"	l
MRS2_CMD	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MRS2_CMD	/;"	d
MRS2_D	board/espt/lowlevel_init.S	/^MRS2_D:		.long	0x00000000$/;"	l
MRS2_D	board/renesas/r7780mp/lowlevel_init.S	/^MRS2_D:			.long	0x0$/;"	l
MRS3_CMD	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define MRS3_CMD	/;"	d
MRSHPC_CDCR	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_CDCR /;"	d	file:
MRSHPC_CPWCR	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_CPWCR /;"	d	file:
MRSHPC_CSR	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_CSR /;"	d	file:
MRSHPC_ICR	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_ICR /;"	d	file:
MRSHPC_IOWCR1	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_IOWCR1 /;"	d	file:
MRSHPC_IOWCR2	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_IOWCR2 /;"	d	file:
MRSHPC_ISR	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_ISR /;"	d	file:
MRSHPC_MODE	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_MODE	/;"	d	file:
MRSHPC_MW0CR1	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_MW0CR1 /;"	d	file:
MRSHPC_MW0CR2	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_MW0CR2 /;"	d	file:
MRSHPC_MW1CR1	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_MW1CR1 /;"	d	file:
MRSHPC_MW1CR2	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_MW1CR2 /;"	d	file:
MRSHPC_OPTION	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_OPTION /;"	d	file:
MRSHPC_PCIC_INFO	drivers/pcmcia/marubun_pcmcia.c	/^#define MRSHPC_PCIC_INFO /;"	d	file:
MRSTCR0_A	board/renesas/sh7752evb/lowlevel_init.S	/^MRSTCR0_A:	.long	0xffd50030$/;"	l
MRSTCR0_A	board/renesas/sh7753evb/lowlevel_init.S	/^MRSTCR0_A:	.long	0xffd50030$/;"	l
MRSTCR0_D	board/renesas/sh7752evb/lowlevel_init.S	/^MRSTCR0_D:	.long	0xfe1ffe7f$/;"	l
MRSTCR0_D	board/renesas/sh7753evb/lowlevel_init.S	/^MRSTCR0_D:	.long	0xfe1ffe7f$/;"	l
MRSTCR1_A	board/renesas/sh7752evb/lowlevel_init.S	/^MRSTCR1_A:	.long	0xffd50034$/;"	l
MRSTCR1_A	board/renesas/sh7753evb/lowlevel_init.S	/^MRSTCR1_A:	.long	0xffd50034$/;"	l
MRSTCR1_D	board/renesas/sh7752evb/lowlevel_init.S	/^MRSTCR1_D:	.long	0xfff3ffff$/;"	l
MRSTCR1_D	board/renesas/sh7753evb/lowlevel_init.S	/^MRSTCR1_D:	.long	0xfff3ffff$/;"	l
MRS_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	MRS_CMD,$/;"	e	enum:__anon114585520103
MRS_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	MRS_CMD,$/;"	e	enum:__anon957231910203	file:
MRS_DELAY	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MRS_DELAY	/;"	d
MRTS	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define MRTS	/;"	d
MRTS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define MRTS	/;"	d
MRTS_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define MRTS_P	/;"	d
MRU_MASK	drivers/net/mvgbe.h	/^#define MRU_MASK	/;"	d
MR_ATTR_DRAM	include/api_public.h	/^#define MR_ATTR_DRAM	/;"	d
MR_ATTR_FLASH	include/api_public.h	/^#define MR_ATTR_FLASH	/;"	d
MR_ATTR_SRAM	include/api_public.h	/^#define MR_ATTR_SRAM	/;"	d
MR_CAC_CTL	arch/nds32/cpu/n1213/start.S	/^#define MR_CAC_CTL	/;"	d	file:
MR_CS_ADDR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	MR_CS_ADDR_OFFS	/;"	d
MR_CS_ADDR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	MR_CS_ADDR_OFFS	/;"	d
MS7720SE_FLASH_BANK_SIZE	include/configs/ms7720se.h	/^#define MS7720SE_FLASH_BANK_SIZE	/;"	d
MS7720SE_FLASH_BASE_1	include/configs/ms7720se.h	/^#define MS7720SE_FLASH_BASE_1	/;"	d
MS7720SE_SDRAM_BASE	include/configs/ms7720se.h	/^#define MS7720SE_SDRAM_BASE	/;"	d
MS7722SE_FLASH_BANK_SIZE	include/configs/ms7722se.h	/^#define MS7722SE_FLASH_BANK_SIZE	/;"	d
MS7722SE_FLASH_BASE_1	include/configs/ms7722se.h	/^#define MS7722SE_FLASH_BASE_1	/;"	d
MS7722SE_SDRAM_BASE	include/configs/ms7722se.h	/^#define MS7722SE_SDRAM_BASE	/;"	d
MSAC	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define MSAC	/;"	d
MSAR_ARMDDRCLCK_333_167	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_333_167	/;"	d	file:
MSAR_ARMDDRCLCK_400_200	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_400_200	/;"	d	file:
MSAR_ARMDDRCLCK_400_200_1	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_400_200_1	/;"	d	file:
MSAR_ARMDDRCLCK_500_167	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_500_167	/;"	d	file:
MSAR_ARMDDRCLCK_600_200	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_600_200	/;"	d	file:
MSAR_ARMDDRCLCK_667_167	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_667_167	/;"	d	file:
MSAR_ARMDDRCLCK_800_200	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_800_200	/;"	d	file:
MSAR_ARMDDRCLCK_H_MASK	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_H_MASK	/;"	d	file:
MSAR_ARMDDRCLCK_MASK	arch/arm/mach-orion5x/lowlevel_init.S	/^#define MSAR_ARMDDRCLCK_MASK	/;"	d	file:
MSAR_TCLK_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MSAR_TCLK_MASK	/;"	d
MSAR_TCLK_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MSAR_TCLK_OFFS	/;"	d
MSBS_MULTIBLK	arch/arm/include/asm/omap_mmc.h	/^#define MSBS_MULTIBLK	/;"	d
MSBS_SGLEBLK	arch/arm/include/asm/omap_mmc.h	/^#define MSBS_SGLEBLK	/;"	d
MSC	include/SA-1100.h	/^#define MSC	/;"	d
MSC0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MSC0	/;"	d
MSC0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MSC0	/;"	d
MSC0	include/SA-1100.h	/^#define MSC0	/;"	d
MSC01_BIU_IP1BAS1L_OFS	include/msc01.h	/^#define MSC01_BIU_IP1BAS1L_OFS	/;"	d
MSC01_BIU_IP1BAS2L_OFS	include/msc01.h	/^#define MSC01_BIU_IP1BAS2L_OFS	/;"	d
MSC01_BIU_IP1MSK1L_OFS	include/msc01.h	/^#define MSC01_BIU_IP1MSK1L_OFS	/;"	d
MSC01_BIU_IP1MSK2L_OFS	include/msc01.h	/^#define MSC01_BIU_IP1MSK2L_OFS	/;"	d
MSC01_BIU_IP2BAS1L_OFS	include/msc01.h	/^#define MSC01_BIU_IP2BAS1L_OFS	/;"	d
MSC01_BIU_IP2BAS2L_OFS	include/msc01.h	/^#define MSC01_BIU_IP2BAS2L_OFS	/;"	d
MSC01_BIU_IP2MSK1L_OFS	include/msc01.h	/^#define MSC01_BIU_IP2MSK1L_OFS	/;"	d
MSC01_BIU_IP2MSK2L_OFS	include/msc01.h	/^#define MSC01_BIU_IP2MSK2L_OFS	/;"	d
MSC01_BIU_IP3BAS1L_OFS	include/msc01.h	/^#define MSC01_BIU_IP3BAS1L_OFS	/;"	d
MSC01_BIU_IP3BAS2L_OFS	include/msc01.h	/^#define MSC01_BIU_IP3BAS2L_OFS	/;"	d
MSC01_BIU_IP3MSK1L_OFS	include/msc01.h	/^#define MSC01_BIU_IP3MSK1L_OFS	/;"	d
MSC01_BIU_IP3MSK2L_OFS	include/msc01.h	/^#define MSC01_BIU_IP3MSK2L_OFS	/;"	d
MSC01_BIU_MCBAS1L_OFS	include/msc01.h	/^#define MSC01_BIU_MCBAS1L_OFS	/;"	d
MSC01_BIU_MCBAS2L_OFS	include/msc01.h	/^#define MSC01_BIU_MCBAS2L_OFS	/;"	d
MSC01_BIU_MCMSK1L_OFS	include/msc01.h	/^#define MSC01_BIU_MCMSK1L_OFS	/;"	d
MSC01_BIU_MCMSK2L_OFS	include/msc01.h	/^#define MSC01_BIU_MCMSK2L_OFS	/;"	d
MSC01_PBC_CLKCFG_MSK	include/msc01.h	/^#define MSC01_PBC_CLKCFG_MSK	/;"	d
MSC01_PBC_CLKCFG_OFS	include/msc01.h	/^#define MSC01_PBC_CLKCFG_OFS	/;"	d
MSC01_PBC_CLKCFG_SHF	include/msc01.h	/^#define MSC01_PBC_CLKCFG_SHF	/;"	d
MSC01_PBC_CS0CFG_ADM_MSK	include/msc01.h	/^#define MSC01_PBC_CS0CFG_ADM_MSK	/;"	d
MSC01_PBC_CS0CFG_ADM_SHF	include/msc01.h	/^#define MSC01_PBC_CS0CFG_ADM_SHF	/;"	d
MSC01_PBC_CS0CFG_DTYP_MSK	include/msc01.h	/^#define MSC01_PBC_CS0CFG_DTYP_MSK	/;"	d
MSC01_PBC_CS0CFG_DTYP_SHF	include/msc01.h	/^#define MSC01_PBC_CS0CFG_DTYP_SHF	/;"	d
MSC01_PBC_CS0CFG_OFS	include/msc01.h	/^#define MSC01_PBC_CS0CFG_OFS	/;"	d
MSC01_PBC_CS0CFG_WSIDLE_MSK	include/msc01.h	/^#define MSC01_PBC_CS0CFG_WSIDLE_MSK	/;"	d
MSC01_PBC_CS0CFG_WSIDLE_SHF	include/msc01.h	/^#define MSC01_PBC_CS0CFG_WSIDLE_SHF	/;"	d
MSC01_PBC_CS0CFG_WS_MSK	include/msc01.h	/^#define MSC01_PBC_CS0CFG_WS_MSK	/;"	d
MSC01_PBC_CS0CFG_WS_SHF	include/msc01.h	/^#define MSC01_PBC_CS0CFG_WS_SHF	/;"	d
MSC01_PBC_CS0RW_OFS	include/msc01.h	/^#define MSC01_PBC_CS0RW_OFS	/;"	d
MSC01_PBC_CS0RW_RAT_MSK	include/msc01.h	/^#define MSC01_PBC_CS0RW_RAT_MSK	/;"	d
MSC01_PBC_CS0RW_RAT_SHF	include/msc01.h	/^#define MSC01_PBC_CS0RW_RAT_SHF	/;"	d
MSC01_PBC_CS0RW_RDT_MSK	include/msc01.h	/^#define MSC01_PBC_CS0RW_RDT_MSK	/;"	d
MSC01_PBC_CS0RW_RDT_SHF	include/msc01.h	/^#define MSC01_PBC_CS0RW_RDT_SHF	/;"	d
MSC01_PBC_CS0RW_WAT_MSK	include/msc01.h	/^#define MSC01_PBC_CS0RW_WAT_MSK	/;"	d
MSC01_PBC_CS0RW_WAT_SHF	include/msc01.h	/^#define MSC01_PBC_CS0RW_WAT_SHF	/;"	d
MSC01_PBC_CS0RW_WDT_MSK	include/msc01.h	/^#define MSC01_PBC_CS0RW_WDT_MSK	/;"	d
MSC01_PBC_CS0RW_WDT_SHF	include/msc01.h	/^#define MSC01_PBC_CS0RW_WDT_SHF	/;"	d
MSC01_PBC_CS0TIM_CAT_MSK	include/msc01.h	/^#define MSC01_PBC_CS0TIM_CAT_MSK	/;"	d
MSC01_PBC_CS0TIM_CAT_SHF	include/msc01.h	/^#define MSC01_PBC_CS0TIM_CAT_SHF	/;"	d
MSC01_PBC_CS0TIM_CDT_MSK	include/msc01.h	/^#define MSC01_PBC_CS0TIM_CDT_MSK	/;"	d
MSC01_PBC_CS0TIM_CDT_SHF	include/msc01.h	/^#define MSC01_PBC_CS0TIM_CDT_SHF	/;"	d
MSC01_PBC_CS0TIM_OFS	include/msc01.h	/^#define MSC01_PBC_CS0TIM_OFS	/;"	d
MSC01_PCI_BAR0_OFS	include/msc01.h	/^#define MSC01_PCI_BAR0_OFS	/;"	d
MSC01_PCI_CFGADDR_BNUM_MSK	include/msc01.h	/^#define MSC01_PCI_CFGADDR_BNUM_MSK	/;"	d
MSC01_PCI_CFGADDR_BNUM_SHF	include/msc01.h	/^#define MSC01_PCI_CFGADDR_BNUM_SHF	/;"	d
MSC01_PCI_CFGADDR_DNUM_MSK	include/msc01.h	/^#define MSC01_PCI_CFGADDR_DNUM_MSK	/;"	d
MSC01_PCI_CFGADDR_DNUM_SHF	include/msc01.h	/^#define MSC01_PCI_CFGADDR_DNUM_SHF	/;"	d
MSC01_PCI_CFGADDR_FNUM_MSK	include/msc01.h	/^#define MSC01_PCI_CFGADDR_FNUM_MSK	/;"	d
MSC01_PCI_CFGADDR_FNUM_SHF	include/msc01.h	/^#define MSC01_PCI_CFGADDR_FNUM_SHF	/;"	d
MSC01_PCI_CFGADDR_OFS	include/msc01.h	/^#define MSC01_PCI_CFGADDR_OFS	/;"	d
MSC01_PCI_CFGADDR_RNUM_MSK	include/msc01.h	/^#define MSC01_PCI_CFGADDR_RNUM_MSK	/;"	d
MSC01_PCI_CFGADDR_RNUM_SHF	include/msc01.h	/^#define MSC01_PCI_CFGADDR_RNUM_SHF	/;"	d
MSC01_PCI_CFGDATA_OFS	include/msc01.h	/^#define MSC01_PCI_CFGDATA_OFS	/;"	d
MSC01_PCI_CFG_EN_MSK	include/msc01.h	/^#define MSC01_PCI_CFG_EN_MSK	/;"	d
MSC01_PCI_CFG_EN_SHF	include/msc01.h	/^#define MSC01_PCI_CFG_EN_SHF	/;"	d
MSC01_PCI_CFG_G_MSK	include/msc01.h	/^#define MSC01_PCI_CFG_G_MSK	/;"	d
MSC01_PCI_CFG_G_SHF	include/msc01.h	/^#define MSC01_PCI_CFG_G_SHF	/;"	d
MSC01_PCI_CFG_OFS	include/msc01.h	/^#define MSC01_PCI_CFG_OFS	/;"	d
MSC01_PCI_CFG_RA_MSK	include/msc01.h	/^#define MSC01_PCI_CFG_RA_MSK	/;"	d
MSC01_PCI_CFG_RA_SHF	include/msc01.h	/^#define MSC01_PCI_CFG_RA_SHF	/;"	d
MSC01_PCI_HEAD0_DEVICEID_SHF	include/msc01.h	/^#define MSC01_PCI_HEAD0_DEVICEID_SHF	/;"	d
MSC01_PCI_HEAD0_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD0_OFS	/;"	d
MSC01_PCI_HEAD0_VENDORID_SHF	include/msc01.h	/^#define MSC01_PCI_HEAD0_VENDORID_SHF	/;"	d
MSC01_PCI_HEAD10_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD10_OFS	/;"	d
MSC01_PCI_HEAD11_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD11_OFS	/;"	d
MSC01_PCI_HEAD12_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD12_OFS	/;"	d
MSC01_PCI_HEAD13_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD13_OFS	/;"	d
MSC01_PCI_HEAD14_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD14_OFS	/;"	d
MSC01_PCI_HEAD15_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD15_OFS	/;"	d
MSC01_PCI_HEAD1_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD1_OFS	/;"	d
MSC01_PCI_HEAD2_CLASS_SHF	include/msc01.h	/^#define MSC01_PCI_HEAD2_CLASS_SHF	/;"	d
MSC01_PCI_HEAD2_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD2_OFS	/;"	d
MSC01_PCI_HEAD2_REV_SHF	include/msc01.h	/^#define MSC01_PCI_HEAD2_REV_SHF	/;"	d
MSC01_PCI_HEAD3_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD3_OFS	/;"	d
MSC01_PCI_HEAD4_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD4_OFS	/;"	d
MSC01_PCI_HEAD5_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD5_OFS	/;"	d
MSC01_PCI_HEAD6_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD6_OFS	/;"	d
MSC01_PCI_HEAD7_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD7_OFS	/;"	d
MSC01_PCI_HEAD8_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD8_OFS	/;"	d
MSC01_PCI_HEAD9_OFS	include/msc01.h	/^#define MSC01_PCI_HEAD9_OFS	/;"	d
MSC01_PCI_INTSTAT_MA_MSK	include/msc01.h	/^#define MSC01_PCI_INTSTAT_MA_MSK	/;"	d
MSC01_PCI_INTSTAT_MA_SHF	include/msc01.h	/^#define MSC01_PCI_INTSTAT_MA_SHF	/;"	d
MSC01_PCI_INTSTAT_OFS	include/msc01.h	/^#define MSC01_PCI_INTSTAT_OFS	/;"	d
MSC01_PCI_INTSTAT_TA_MSK	include/msc01.h	/^#define MSC01_PCI_INTSTAT_TA_MSK	/;"	d
MSC01_PCI_INTSTAT_TA_SHF	include/msc01.h	/^#define MSC01_PCI_INTSTAT_TA_SHF	/;"	d
MSC01_PCI_P2SCMAPL_OFS	include/msc01.h	/^#define MSC01_PCI_P2SCMAPL_OFS	/;"	d
MSC01_PCI_P2SCMSKL_OFS	include/msc01.h	/^#define MSC01_PCI_P2SCMSKL_OFS	/;"	d
MSC01_PCI_SC2PIOBASL_OFS	include/msc01.h	/^#define MSC01_PCI_SC2PIOBASL_OFS	/;"	d
MSC01_PCI_SC2PIOMAPL_OFS	include/msc01.h	/^#define MSC01_PCI_SC2PIOMAPL_OFS	/;"	d
MSC01_PCI_SC2PIOMSKL_MSK_MSK	include/msc01.h	/^#define MSC01_PCI_SC2PIOMSKL_MSK_MSK	/;"	d
MSC01_PCI_SC2PIOMSKL_OFS	include/msc01.h	/^#define MSC01_PCI_SC2PIOMSKL_OFS	/;"	d
MSC01_PCI_SC2PMBASL_OFS	include/msc01.h	/^#define MSC01_PCI_SC2PMBASL_OFS	/;"	d
MSC01_PCI_SC2PMMAPL_OFS	include/msc01.h	/^#define MSC01_PCI_SC2PMMAPL_OFS	/;"	d
MSC01_PCI_SC2PMMSKL_MSK_MSK	include/msc01.h	/^#define MSC01_PCI_SC2PMMSKL_MSK_MSK	/;"	d
MSC01_PCI_SC2PMMSKL_OFS	include/msc01.h	/^#define MSC01_PCI_SC2PMMSKL_OFS	/;"	d
MSC01_PCI_SWAP_BAR0_BSWAP_SHF	include/msc01.h	/^#define MSC01_PCI_SWAP_BAR0_BSWAP_SHF	/;"	d
MSC01_PCI_SWAP_IO_BSWAP_SHF	include/msc01.h	/^#define MSC01_PCI_SWAP_IO_BSWAP_SHF	/;"	d
MSC01_PCI_SWAP_OFS	include/msc01.h	/^#define MSC01_PCI_SWAP_OFS	/;"	d
MSC0_Bnk0	include/SA-1100.h	/^#define MSC0_Bnk0	/;"	d
MSC0_Bnk1	include/SA-1100.h	/^#define MSC0_Bnk1	/;"	d
MSC0_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MSC0_OFFSET	/;"	d
MSC1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	MSC1	/;"	d
MSC1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MSC1	/;"	d
MSC1	include/SA-1100.h	/^#define MSC1	/;"	d
MSC1_Bnk2	include/SA-1100.h	/^#define MSC1_Bnk2	/;"	d
MSC1_Bnk3	include/SA-1100.h	/^#define MSC1_Bnk3	/;"	d
MSC1_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MSC1_OFFSET	/;"	d
MSC2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MSC2	/;"	d
MSC2	include/SA-1100.h	/^#define MSC2	/;"	d
MSC2_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define MSC2_OFFSET	/;"	d
MSCH0_MAINDDR3_DDR3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH0_MAINDDR3_DDR3	= 1,$/;"	e	enum:__anonbeb2b9771103
MSCH0_MAINDDR3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH0_MAINDDR3_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
MSCH0_MAINDDR3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH0_MAINDDR3_SHIFT	= 3,$/;"	e	enum:__anonbeb2b9771103
MSCH0_MAINPARTIALPOP_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH0_MAINPARTIALPOP_MASK = 1,$/;"	e	enum:__anonbeb2b9771103
MSCH0_MAINPARTIALPOP_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH0_MAINPARTIALPOP_SHIFT = 1,$/;"	e	enum:__anonbeb2b9771103
MSCH1_MAINDDR3_DDR3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH1_MAINDDR3_DDR3	= 1,$/;"	e	enum:__anonbeb2b9771103
MSCH1_MAINDDR3_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH1_MAINDDR3_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
MSCH1_MAINDDR3_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH1_MAINDDR3_SHIFT	= 4,$/;"	e	enum:__anonbeb2b9771103
MSCH1_MAINPARTIALPOP_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH1_MAINPARTIALPOP_MASK = 1,$/;"	e	enum:__anonbeb2b9771103
MSCH1_MAINPARTIALPOP_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	MSCH1_MAINPARTIALPOP_SHIFT = 2,$/;"	e	enum:__anonbeb2b9771103
MSCH4_MAINDDR3	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define	MSCH4_MAINDDR3	/;"	d	file:
MSCHECK	drivers/video/tegra124/sor.h	/^#define MSCHECK	/;"	d
MSCHECK_CTL_CLEAR	drivers/video/tegra124/sor.h	/^#define MSCHECK_CTL_CLEAR	/;"	d
MSCHECK_CTL_RUN	drivers/video/tegra124/sor.h	/^#define MSCHECK_CTL_RUN	/;"	d
MSCHECK_CTL_SHIFT	drivers/video/tegra124/sor.h	/^#define MSCHECK_CTL_SHIFT	/;"	d
MSCL_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCL_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define MSCL_NR_CLK	/;"	d
MSCM_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_BASE_ADDR	/;"	d
MSCM_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define MSCM_BASE_ADDR	/;"	d
MSCM_CPXTYPE_PERS_A53	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_CPXTYPE_PERS_A53	/;"	d
MSCM_CPXTYPE_PERS_CM4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_CPXTYPE_PERS_CM4	/;"	d
MSCM_CPXTYPE_PERS_MASK	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_CPXTYPE_PERS_MASK	/;"	d
MSCM_CPXTYPE_PERS_OFFSET	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_CPXTYPE_PERS_OFFSET	/;"	d
MSCM_CPXTYPE_RYPZ_MASK	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_CPXTYPE_RYPZ_MASK	/;"	d
MSCM_CPXTYPE_RYPZ_OFFSET	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_CPXTYPE_RYPZ_OFFSET	/;"	d
MSCM_IRSPRC_CP0_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define MSCM_IRSPRC_CP0_EN	/;"	d
MSCM_IRSPRC_CPn_EN	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_IRSPRC_CPn_EN	/;"	d
MSCM_IRSPRC_NUM	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define MSCM_IRSPRC_NUM	/;"	d
MSCM_IRSPRC_NUM	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define MSCM_IRSPRC_NUM	/;"	d
MSCM_IR_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define MSCM_IR_BASE_ADDR	/;"	d
MSCNTR	arch/x86/cpu/quark/smc.h	/^#define MSCNTR	/;"	d
MSCR_18VDDR_FULL	arch/m68k/include/asm/m520x.h	/^#define MSCR_18VDDR_FULL	/;"	d
MSCR_18VDDR_HALF	arch/m68k/include/asm/m520x.h	/^#define MSCR_18VDDR_HALF	/;"	d
MSCR_25VDDR	arch/m68k/include/asm/m520x.h	/^#define MSCR_25VDDR	/;"	d
MSCR_OPENDRAIN	arch/m68k/include/asm/m520x.h	/^#define MSCR_OPENDRAIN	/;"	d
MSC_16BitStMem	include/SA-1100.h	/^#define MSC_16BitStMem	/;"	d
MSC_1stRdAcc	include/SA-1100.h	/^#define MSC_1stRdAcc(/;"	d
MSC_32BitStMem	include/SA-1100.h	/^#define MSC_32BitStMem	/;"	d
MSC_Bnk	include/SA-1100.h	/^#define MSC_Bnk(/;"	d
MSC_Brst4	include/SA-1100.h	/^#define MSC_Brst4	/;"	d
MSC_Brst8	include/SA-1100.h	/^#define MSC_Brst8	/;"	d
MSC_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_CNT	/;"	d
MSC_Ceil1stRdAcc	include/SA-1100.h	/^#define MSC_Ceil1stRdAcc(/;"	d
MSC_CeilNxtRdAcc	include/SA-1100.h	/^#define MSC_CeilNxtRdAcc(/;"	d
MSC_CeilRdAcc	include/SA-1100.h	/^#define MSC_CeilRdAcc(/;"	d
MSC_CeilRec	include/SA-1100.h	/^#define MSC_CeilRec(/;"	d
MSC_CeilWrAcc	include/SA-1100.h	/^#define MSC_CeilWrAcc(/;"	d
MSC_GESTURE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_GESTURE	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_GESTURE	/;"	d
MSC_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_MAX	/;"	d
MSC_NonBrst	include/SA-1100.h	/^#define MSC_NonBrst	/;"	d
MSC_NxtRdAcc	include/SA-1100.h	/^#define MSC_NxtRdAcc(/;"	d
MSC_PULSELED	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_PULSELED	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_PULSELED	/;"	d
MSC_RAW	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RAW	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_RAW	/;"	d
MSC_RBW	include/SA-1100.h	/^#define MSC_RBW	/;"	d
MSC_RDF	include/SA-1100.h	/^#define MSC_RDF	/;"	d
MSC_RDN	include/SA-1100.h	/^#define MSC_RDN	/;"	d
MSC_RRR	include/SA-1100.h	/^#define MSC_RRR	/;"	d
MSC_RT	include/SA-1100.h	/^#define MSC_RT	/;"	d
MSC_RdAcc	include/SA-1100.h	/^#define MSC_RdAcc(/;"	d
MSC_Rec	include/SA-1100.h	/^#define MSC_Rec(/;"	d
MSC_SCAN	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SCAN	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SCAN	/;"	d
MSC_SERIAL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SERIAL	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_SERIAL	/;"	d
MSC_SRAM	include/SA-1100.h	/^#define MSC_SRAM	/;"	d
MSC_TIMESTAMP	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_TIMESTAMP	include/dt-bindings/input/linux-event-codes.h	/^#define MSC_TIMESTAMP	/;"	d
MSC_WrAcc	include/SA-1100.h	/^#define MSC_WrAcc(/;"	d
MSDOS	include/u-boot/zlib.h	/^#  define MSDOS$/;"	d
MSDOS_MBR_SIGNATURE	include/part_efi.h	/^#define MSDOS_MBR_SIGNATURE /;"	d
MSEC_PER_SEC	arch/blackfin/include/asm/blackfin_local.h	/^#define MSEC_PER_SEC /;"	d
MSEC_TO_SCLK	arch/blackfin/include/asm/blackfin_local.h	/^#define MSEC_TO_SCLK(/;"	d
MSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define MSEL	/;"	d
MSEL	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define MSEL	/;"	d
MSEL1CR_0_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_0_0,	MSEL1CR_0_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_0_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_0_0,	MSEL1CR_0_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_12_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_12_0,	MSEL1CR_12_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_12_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_12_0,	MSEL1CR_12_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_13_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_13_0,	MSEL1CR_13_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_13_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_13_0,	MSEL1CR_13_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_14_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_14_0,	MSEL1CR_14_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_14_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_14_0,	MSEL1CR_14_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_15_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_15_0,	MSEL1CR_15_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_15_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_15_0,	MSEL1CR_15_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_16_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_16_0,	MSEL1CR_16_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_16_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_16_0,	MSEL1CR_16_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_26_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_26_0,	MSEL1CR_26_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_26_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_26_0,	MSEL1CR_26_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_27_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_27_0,	MSEL1CR_27_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_27_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_27_0,	MSEL1CR_27_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_28_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_28_0,	MSEL1CR_28_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_28_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_28_0,	MSEL1CR_28_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_29_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_29_0,	MSEL1CR_29_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_29_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_29_0,	MSEL1CR_29_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_2_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_2_0,	MSEL1CR_2_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_2_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_2_0,	MSEL1CR_2_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_30_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_30_0,	MSEL1CR_30_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_30_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_30_0,	MSEL1CR_30_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_31_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_31_0,	MSEL1CR_31_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_31_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_31_0,	MSEL1CR_31_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_3_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_3_0,	MSEL1CR_3_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_3_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_3_0,	MSEL1CR_3_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_4_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_4_0,	MSEL1CR_4_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_4_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_4_0,	MSEL1CR_4_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_5_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_5_0,	MSEL1CR_5_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_5_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_5_0,	MSEL1CR_5_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_6_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_6_0,	MSEL1CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_6_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_6_0,	MSEL1CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_7_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_7_0,	MSEL1CR_7_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_7_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_7_0,	MSEL1CR_7_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_9_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_9_0,	MSEL1CR_9_1,$/;"	e	enum:__anona304c1340103	file:
MSEL1CR_9_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL1CR_9_0,	MSEL1CR_9_1,$/;"	e	enum:__anona304c1340103	file:
MSEL2CR_MSEL0_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL0_0, MSEL2CR_MSEL0_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL0_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL0_0, MSEL2CR_MSEL0_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL10_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL10_0, MSEL2CR_MSEL10_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL10_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL10_0, MSEL2CR_MSEL10_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL11_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL11_0, MSEL2CR_MSEL11_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL11_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL11_0, MSEL2CR_MSEL11_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL12_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL12_0, MSEL2CR_MSEL12_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL12_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL12_0, MSEL2CR_MSEL12_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL13_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL13_0, MSEL2CR_MSEL13_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL13_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL13_0, MSEL2CR_MSEL13_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL14_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL14_0, MSEL2CR_MSEL14_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL14_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL14_0, MSEL2CR_MSEL14_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL16_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL16_0, MSEL2CR_MSEL16_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL16_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL16_0, MSEL2CR_MSEL16_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL17_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL17_0, MSEL2CR_MSEL17_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL17_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL17_0, MSEL2CR_MSEL17_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL18_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL18_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL19_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL19_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL1_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL1_0, MSEL2CR_MSEL1_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL1_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL1_0, MSEL2CR_MSEL1_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL2_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL2_0, MSEL2CR_MSEL2_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL2_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL2_0, MSEL2CR_MSEL2_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL3_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL3_0, MSEL2CR_MSEL3_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL3_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL3_0, MSEL2CR_MSEL3_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL4_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL4_0, MSEL2CR_MSEL4_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL4_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL4_0, MSEL2CR_MSEL4_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL5_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL5_0, MSEL2CR_MSEL5_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL5_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL5_0, MSEL2CR_MSEL5_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL6_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL6_0, MSEL2CR_MSEL6_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL6_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL6_0, MSEL2CR_MSEL6_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL7_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL7_0, MSEL2CR_MSEL7_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL7_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL7_0, MSEL2CR_MSEL7_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL8_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL8_0, MSEL2CR_MSEL8_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL8_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL8_0, MSEL2CR_MSEL8_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL9_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL9_0, MSEL2CR_MSEL9_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL2CR_MSEL9_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL2CR_MSEL9_0, MSEL2CR_MSEL9_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_15_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL3CR_15_0,	MSEL3CR_15_1, \/* Trace \/ Debug ? *\/$/;"	e	enum:__anona304c1340103	file:
MSEL3CR_15_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL3CR_15_0,	MSEL3CR_15_1, \/* Trace \/ Debug ? *\/$/;"	e	enum:__anona304c1340103	file:
MSEL3CR_6_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL3CR_6_0,	MSEL3CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL3CR_6_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL3CR_6_0,	MSEL3CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL3CR_MSEL11_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL11_0, MSEL3CR_MSEL11_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL11_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL11_0, MSEL3CR_MSEL11_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL15_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL15_0, MSEL3CR_MSEL15_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL15_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL15_0, MSEL3CR_MSEL15_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL28_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL28_0, MSEL3CR_MSEL28_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL28_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL28_0, MSEL3CR_MSEL28_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL2_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL2_0, MSEL3CR_MSEL2_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL2_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL2_0, MSEL3CR_MSEL2_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL6_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL6_0, MSEL3CR_MSEL6_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL6_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL6_0, MSEL3CR_MSEL6_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL9_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL9_0, MSEL3CR_MSEL9_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL3CR_MSEL9_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL3CR_MSEL9_0, MSEL3CR_MSEL9_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_10_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_10_0,	MSEL4CR_10_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_10_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_10_0,	MSEL4CR_10_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_15_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_15_0,	MSEL4CR_15_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_15_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_15_0,	MSEL4CR_15_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_18_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_18_0,	MSEL4CR_18_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_18_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_18_0,	MSEL4CR_18_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_19_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_19_0,	MSEL4CR_19_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_19_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_19_0,	MSEL4CR_19_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_1_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_1_0,	MSEL4CR_1_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_1_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_1_0,	MSEL4CR_1_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_4_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_4_0,	MSEL4CR_4_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_4_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_4_0,	MSEL4CR_4_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_6_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_6_0,	MSEL4CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_6_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL4CR_6_0,	MSEL4CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL4CR_MSEL10_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL10_0, MSEL4CR_MSEL10_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL10_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL10_0, MSEL4CR_MSEL10_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL11_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL11_0, MSEL4CR_MSEL11_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL11_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL11_0, MSEL4CR_MSEL11_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL12_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL12_0, MSEL4CR_MSEL12_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL12_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL12_0, MSEL4CR_MSEL12_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL13_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL13_0, MSEL4CR_MSEL13_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL13_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL13_0, MSEL4CR_MSEL13_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL15_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL15_0, MSEL4CR_MSEL15_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL15_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL15_0, MSEL4CR_MSEL15_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL19_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL19_0, MSEL4CR_MSEL19_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL19_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL19_0, MSEL4CR_MSEL19_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL1_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL1_0, MSEL4CR_MSEL1_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL1_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL1_0, MSEL4CR_MSEL1_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL20_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL20_0, MSEL4CR_MSEL20_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL20_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL20_0, MSEL4CR_MSEL20_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL21_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL21_0, MSEL4CR_MSEL21_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL21_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL21_0, MSEL4CR_MSEL21_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL22_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL22_0, MSEL4CR_MSEL22_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL22_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL22_0, MSEL4CR_MSEL22_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL26_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL26_0, MSEL4CR_MSEL26_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL26_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL26_0, MSEL4CR_MSEL26_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL27_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL27_0, MSEL4CR_MSEL27_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL27_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL27_0, MSEL4CR_MSEL27_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL29_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL29_0, MSEL4CR_MSEL29_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL29_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL29_0, MSEL4CR_MSEL29_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL4_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL4_0, MSEL4CR_MSEL4_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL4_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL4_0, MSEL4CR_MSEL4_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL7_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL7_0, MSEL4CR_MSEL7_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL7_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL7_0, MSEL4CR_MSEL7_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL8_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL8_0, MSEL4CR_MSEL8_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL8_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL8_0, MSEL4CR_MSEL8_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL9_0	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL9_0, MSEL4CR_MSEL9_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL4CR_MSEL9_1	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSEL4CR_MSEL9_0, MSEL4CR_MSEL9_1,$/;"	e	enum:__anon991a8e2d0103	file:
MSEL5CR_0_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_0_0,	MSEL5CR_0_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_0_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_0_0,	MSEL5CR_0_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_10_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_10_0,	MSEL5CR_10_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_10_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_10_0,	MSEL5CR_10_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_11_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_11_0,	MSEL5CR_11_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_11_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_11_0,	MSEL5CR_11_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_12_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_12_0,	MSEL5CR_12_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_12_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_12_0,	MSEL5CR_12_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_13_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_13_0,	MSEL5CR_13_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_13_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_13_0,	MSEL5CR_13_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_14_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_14_0,	MSEL5CR_14_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_14_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_14_0,	MSEL5CR_14_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_15_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_15_0,	MSEL5CR_15_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_15_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_15_0,	MSEL5CR_15_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_17_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_17_0,	MSEL5CR_17_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_17_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_17_0,	MSEL5CR_17_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_19_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_19_0,	MSEL5CR_19_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_19_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_19_0,	MSEL5CR_19_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_21_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_21_0,	MSEL5CR_21_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_21_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_21_0,	MSEL5CR_21_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_23_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_23_0,	MSEL5CR_23_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_23_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_23_0,	MSEL5CR_23_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_25_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_25_0,	MSEL5CR_25_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_25_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_25_0,	MSEL5CR_25_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_27_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_27_0,	MSEL5CR_27_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_27_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_27_0,	MSEL5CR_27_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_29_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_29_0,	MSEL5CR_29_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_29_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_29_0,	MSEL5CR_29_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_2_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_2_0,	MSEL5CR_2_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_2_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_2_0,	MSEL5CR_2_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_30_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_30_0,	MSEL5CR_30_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_30_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_30_0,	MSEL5CR_30_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_31_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_31_0,	MSEL5CR_31_1, \/* irq\/fiq output *\/$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_31_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_31_0,	MSEL5CR_31_1, \/* irq\/fiq output *\/$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_3_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_3_0,	MSEL5CR_3_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_3_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_3_0,	MSEL5CR_3_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_4_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_4_0,	MSEL5CR_4_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_4_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_4_0,	MSEL5CR_4_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_5_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_5_0,	MSEL5CR_5_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_5_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_5_0,	MSEL5CR_5_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_6_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_6_0,	MSEL5CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_6_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_6_0,	MSEL5CR_6_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_7_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_7_0,	MSEL5CR_7_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_7_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_7_0,	MSEL5CR_7_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_8_0	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_8_0,	MSEL5CR_8_1,$/;"	e	enum:__anona304c1340103	file:
MSEL5CR_8_1	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSEL5CR_8_0,	MSEL5CR_8_1,$/;"	e	enum:__anona304c1340103	file:
MSELCRA	arch/sh/include/asm/cpu_sh7722.h	/^#define MSELCRA	/;"	d
MSELCRA	arch/sh/include/asm/cpu_sh7723.h	/^#define MSELCRA /;"	d
MSELCRA	arch/sh/include/asm/cpu_sh7724.h	/^#define MSELCRA /;"	d
MSELCRA_D	board/renesas/ap325rxa/ap325rxa.c	/^#define MSELCRA_D	/;"	d	file:
MSELCRB	arch/sh/include/asm/cpu_sh7722.h	/^#define MSELCRB	/;"	d
MSELCRB	arch/sh/include/asm/cpu_sh7723.h	/^#define MSELCRB /;"	d
MSELCRB	arch/sh/include/asm/cpu_sh7724.h	/^#define MSELCRB /;"	d
MSELCRB_D	board/renesas/ap325rxa/ap325rxa.c	/^#define MSELCRB_D	/;"	d	file:
MSELECT_CLK_SRC_PLLP_OUT0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define MSELECT_CLK_SRC_PLLP_OUT0	/;"	d
MSEL_MASK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define MSEL_MASK /;"	d
MSEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define MSEL_P	/;"	d
MSEL_P	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define MSEL_P	/;"	d
MSE_IRQ	arch/x86/include/asm/ibmpc.h	/^#define MSE_IRQ	/;"	d
MSGDMA_CSR_CTL_RESET	drivers/net/altera_tse.h	/^#define MSGDMA_CSR_CTL_RESET	/;"	d
MSGDMA_CSR_STAT_BUSY	drivers/net/altera_tse.h	/^#define MSGDMA_CSR_STAT_BUSY	/;"	d
MSGDMA_CSR_STAT_MASK	drivers/net/altera_tse.h	/^#define MSGDMA_CSR_STAT_MASK	/;"	d
MSGDMA_CSR_STAT_RESETTING	drivers/net/altera_tse.h	/^#define MSGDMA_CSR_STAT_RESETTING	/;"	d
MSGDMA_DESC_CTL_END_ON_EOP	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_END_ON_EOP	/;"	d
MSGDMA_DESC_CTL_END_ON_LEN	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_END_ON_LEN	/;"	d
MSGDMA_DESC_CTL_GEN_EOP	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_GEN_EOP	/;"	d
MSGDMA_DESC_CTL_GEN_SOP	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_GEN_SOP	/;"	d
MSGDMA_DESC_CTL_GO	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_GO	/;"	d
MSGDMA_DESC_CTL_RX_SINGLE	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_RX_SINGLE	/;"	d
MSGDMA_DESC_CTL_TX_SINGLE	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_CTL_TX_SINGLE	/;"	d
MSGDMA_DESC_RX_STRIDE	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_RX_STRIDE	/;"	d
MSGDMA_DESC_TX_STRIDE	drivers/net/altera_tse.h	/^#define MSGDMA_DESC_TX_STRIDE	/;"	d
MSG_BROADCAST	include/twl4030.h	/^#define MSG_BROADCAST(/;"	d
MSG_BROADCAST_ALL	include/twl4030.h	/^#define MSG_BROADCAST_ALL(/;"	d
MSG_BROADCAST_PROV	include/twl4030.h	/^#define MSG_BROADCAST_PROV /;"	d
MSG_BROADCAST_REF	include/twl4030.h	/^#define MSG_BROADCAST_REF /;"	d
MSG_BROADCAST__CLK_RST	include/twl4030.h	/^#define MSG_BROADCAST__CLK_RST /;"	d
MSG_BYTES	include/cros_ec_message.h	/^	MSG_BYTES		= EC_PROTO2_MAX_PARAM_SIZE + MSG_PROTO_BYTES,$/;"	e	enum:__anon481099100103
MSG_BYTE_ENABLE	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_BYTE_ENABLE	/;"	d
MSG_CALL	net/nfs.h	/^#define MSG_CALL /;"	d
MSG_CTRL_EXT_REG	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_CTRL_EXT_REG	/;"	d
MSG_CTRL_REG	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_CTRL_REG	/;"	d
MSG_DATA_MIN_SZ	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MSG_DATA_MIN_SZ	/;"	d
MSG_DATA_REG	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_DATA_REG	/;"	d
MSG_HEADER	include/cros_ec_message.h	/^	MSG_HEADER	= 0xec,$/;"	e	enum:__anon481099100103
MSG_HEADER_BYTES	include/cros_ec_message.h	/^	MSG_HEADER_BYTES	= 3,$/;"	e	enum:__anon481099100103
MSG_MIN_SZ	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define MSG_MIN_SZ	/;"	d
MSG_OP_ALT_READ	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_OP_ALT_READ	/;"	d
MSG_OP_ALT_WRITE	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_OP_ALT_WRITE	/;"	d
MSG_OP_DRAM_INIT	arch/x86/cpu/quark/smc.h	/^#define MSG_OP_DRAM_INIT	/;"	d
MSG_OP_DRAM_WAKE	arch/x86/cpu/quark/smc.h	/^#define MSG_OP_DRAM_WAKE	/;"	d
MSG_OP_IO_READ	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_OP_IO_READ	/;"	d
MSG_OP_IO_WRITE	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_OP_IO_WRITE	/;"	d
MSG_OP_READ	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_OP_READ	/;"	d
MSG_OP_WRITE	arch/x86/include/asm/arch-quark/msg_port.h	/^#define MSG_OP_WRITE	/;"	d
MSG_PORT_HOST_BRIDGE	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_HOST_BRIDGE	/;"	d
MSG_PORT_MEM_ARBITER	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_MEM_ARBITER	/;"	d
MSG_PORT_MEM_MGR	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_MEM_MGR	/;"	d
MSG_PORT_PCIE_AFE	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_PCIE_AFE	/;"	d
MSG_PORT_RMU	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_RMU	/;"	d
MSG_PORT_SOC_UNIT	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_SOC_UNIT	/;"	d
MSG_PORT_USB_AFE	arch/x86/include/asm/arch-quark/quark.h	/^#define MSG_PORT_USB_AFE	/;"	d
MSG_PROTO_BYTES	include/cros_ec_message.h	/^	MSG_PROTO_BYTES		= MSG_HEADER_BYTES + MSG_TRAILER_BYTES,$/;"	e	enum:__anon481099100103
MSG_REPLY	net/nfs.h	/^#define MSG_REPLY /;"	d
MSG_SINGULAR	include/twl4030.h	/^#define MSG_SINGULAR(/;"	d
MSG_TRAILER_BYTES	include/cros_ec_message.h	/^	MSG_TRAILER_BYTES	= 2,$/;"	e	enum:__anon481099100103
MSHC_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MSHC_CLK,$/;"	e	enum:mxc_peri_clock
MSHC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MSHC_IPS_BASE_ADDR /;"	d
MSI	arch/powerpc/dts/canyonlands.dts	/^		MSI: ppc4xx-msi@C10000000 {$/;"	l
MSIIOF3_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIIOF3_TXD_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0L_MCK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_MCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_RSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_RSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF0L_RXD_MARK, VIO2_HD3_MARK, PORT221_LCD2HSYN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_TSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF0L_TSCK_MARK, VIO2_CLK3_MARK, LCD2DCK_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_TSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDRD__MARK, DACK2_MARK, PORT217_LCD2RS_MARK, MSIOF0L_TSYNC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0L_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_MCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_TXD_MARK,	MSIOF0_MCK0_MARK,	MSIOF0_MCK1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_MCK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A22_MARK, KEYIN2_MARK, MSIOF0_MCK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_MCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_TXD_MARK,	MSIOF0_MCK0_MARK,	MSIOF0_MCK1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_MCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A23_MARK, KEYIN3_MARK, MSIOF0_MCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_RSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_RSYNC_MARK,	MSIOF0_RSCK_MARK,	MSIOF0_TSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_RSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A20_MARK, KEYIN0_MARK, MSIOF0_RSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_RSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_RSYNC_MARK,	MSIOF0_RSCK_MARK,	MSIOF0_TSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_RSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A21_MARK, KEYIN1_MARK, MSIOF0_RSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_SS1_MARK,	MSIOF0_SS2_MARK,	MSIOF0_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	TS_SCK_D_MARK, BPFCLK_C_MARK, MSIOF0_RXD_MARK, SCIF5_RXD_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_RXD_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A24_MARK, KEYIN4_MARK, MSIOF0_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,$/;"	e	enum:__anona307835a0103	file:
MSIOF0_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SCK_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SS1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADICLK_B_MARK, MSIOF0_SS1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SS1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SS1_GMARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SS1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SS1_IMARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_SS1_MARK,	MSIOF0_SS2_MARK,	MSIOF0_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A16_MARK, KEYOUT3_MARK, MSIOF0_SS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SS2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SS2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SS2_GMARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SS2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SS2_IMARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_SS1_MARK,	MSIOF0_SS2_MARK,	MSIOF0_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A25_MARK, KEYIN5_MARK, MSIOF0_SS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,$/;"	e	enum:__anona307835a0103	file:
MSIOF0_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_SYNC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SYNC_GMARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SYNC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_SYNC_IMARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF0_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_TSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_RSYNC_MARK,	MSIOF0_RSCK_MARK,	MSIOF0_TSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_TSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A18_MARK, KEYOUT1_MARK, MSIOF0_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_TSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_TSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_TSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A17_MARK, KEYOUT2_MARK, MSIOF0_TSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF0_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ADICHS2_B_MARK, MSIOF0_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF0_TXD_MARK,	MSIOF0_MCK0_MARK,	MSIOF0_MCK1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF0_TXD_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF0_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A19_MARK, KEYOUT0_MARK, MSIOF0_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_MCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_MCK0_MARK,	MSIOF1_MCK1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_MCK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_MCK0_MARK, PORT236_I2C_SDA2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_MCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_MCK0_MARK,	MSIOF1_MCK1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_MCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_MCK1_MARK, PORT237_I2C_SCL2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_RSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_RSCK_MARK,	MSIOF1_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_RSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSCK_MARK, SCIFA2_RTS2__MARK, VIO2_CLK2_MARK, LCD2D20_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_RSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_RSCK_MARK,	MSIOF1_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_RSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSYNC_MARK, MFG1_IN2_MARK, VIO2_VD2_MARK, LCD2D21_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_RXD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF1_RXD_B_MARK, SCIF5_RXD_D_MARK, ADIDATA_B_MARK, AD_DI_B_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SCL2_D_MARK, MSIOF1_RXD_E_MARK,$/;"	e	enum:__anona307835a0103	file:
MSIOF1_RXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCL2_D_MARK, MSIOF1_RXD_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_RXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_E_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_F_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_F_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_G_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_RXD_G_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF1_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_RXD_PORT118_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_RXD_PORT118_MARK,	MSIOF1_TXD_PORT119_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_RXD_PORT75_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_RXD_PORT75_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_SCK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ADICS_SAMP_B_MARK, AD_DO_B_MARK, SSI_SDATA0_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SDA2_D_MARK, MSIOF1_SCK_E_MARK,$/;"	e	enum:__anona307835a0103	file:
MSIOF1_SCK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA2_D_MARK, MSIOF1_SCK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_SCK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_E_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_F_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_F_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_G_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SCK_G_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF1_SS1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_E_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_F_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_F_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_G_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS1_G_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_SS1_MARK, VIO2_FIELD2_MARK, LCD2D22_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_SS1_PORT117_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_SS2_PORT116_MARK,	MSIOF1_SS1_PORT117_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_SS1_PORT67_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_SS1_PORT67_MARK,		MSIOF1_TSCK_PORT72_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_SS2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_E_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_F_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_F_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_G_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SS2_G_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_SS2_MARK, VIO2_HD2_MARK, LCD2D23_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_SS2_PORT116_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_SS2_PORT116_MARK,	MSIOF1_SS1_PORT117_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_SS2_PORT202_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_SS2_PORT202_MARK,	\/* MSEL4CR_10_1 *\/$/;"	e	enum:__anona304c1340103	file:
MSIOF1_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_E_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,$/;"	e	enum:__anona307835a0103	file:
MSIOF1_SYNC_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_SYNC_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_E_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_F_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_F_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_G_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_SYNC_G_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF1_TSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_TSCK_PORT121_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_TSCK_PORT121_MARK,	\/* MSEL4CR_10_0 *\/$/;"	e	enum:__anona304c1340103	file:
MSIOF1_TSCK_PORT72_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_SS1_PORT67_MARK,		MSIOF1_TSCK_PORT72_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_TSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_TSYNC_MARK, SCIFA2_CTS2__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_TSYNC_PORT120_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_TSYNC_PORT120_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_TSYNC_PORT73_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_TSYNC_PORT73_MARK,	MSIOF1_TXD_PORT74_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_TXD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PCMWE_N_MARK, SSI_WS0129_MARK, MSIOF1_TXD_B_MARK, SCIF5_TXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,$/;"	e	enum:__anona307835a0103	file:
MSIOF1_TXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF1_TXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_E_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_F_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_F_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_G_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF1_TXD_G_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,$/;"	e	enum:__anona307879b0103	file:
MSIOF1_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF1_TXD_PORT119_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_RXD_PORT118_MARK,	MSIOF1_TXD_PORT119_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF1_TXD_PORT74_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF1_TSYNC_PORT73_MARK,	MSIOF1_TXD_PORT74_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2R_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF2R_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2R_TSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU2TO0_MARK, PORT248_I2C_SCL3_MARK, MSIOF2R_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2R_TSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF2R_TSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2R_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF2R_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_MCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_MCK1_MARK,	MSIOF2_MCK0_MARK,	MSIOF2_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_MCK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_MCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_MCK1_MARK,	MSIOF2_MCK0_MARK,	MSIOF2_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_MCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_RSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_RSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_RSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_RSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_MCK1_MARK,	MSIOF2_MCK0_MARK,	MSIOF2_RSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_RSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_RXD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_RXD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_G0_MARK, MSIOF2_RXD_B_MARK, IIC0_SCL_D_MARK, AVB_TX_CLK_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF2_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_RXD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_RXD_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_RXD_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_RXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF2_RXD_E_MARK, INTC_IRQ4_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF2_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_TXD_MARK,	MSIOF2_RXD_MARK,	MSIOF2_TSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF2_S1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_S1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SCK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SCK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SCK_B_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, ADICLK_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF2_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SCK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SCK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SCK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SCK_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SCK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF2_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF2_SS1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_RXD1_MARK, VI0_G4_MARK, MSIOF2_SS1_B_MARK, SCIF4_RXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF2_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_SS2_MARK,	MSIOF2_TSYNC_MARK,	MSIOF2_SS1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF2_SS2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SS2_B_MARK, SCIF4_TXD_D_MARK, AVB_TXD4_MARK, ADICHS2_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF2_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS2_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SS2_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_SS2_MARK,	MSIOF2_TSYNC_MARK,	MSIOF2_SS1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF2_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AD_CLK_MARK, ETH_RXD0_MARK, VI0_G3_MARK, MSIOF2_SYNC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF2_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SYNC_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SYNC_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_SYNC_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_SYNC_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA1_E_MARK, MSIOF2_SYNC_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF2_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF2_TSCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_TXD_MARK,	MSIOF2_RXD_MARK,	MSIOF2_TSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_TSCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D5_MARK, MSIOF2_TSCK_MARK, LCD2D15_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_TSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_SS2_MARK,	MSIOF2_TSYNC_MARK,	MSIOF2_SS1_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_TSYNC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D3_MARK, MSIOF2_TSYNC_MARK, LCD2D13_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF2_TXD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_TXD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_CRS_DV_MARK, VI0_G1_MARK, MSIOF2_TXD_B_MARK, IIC0_SDA_D_MARK,$/;"	e	enum:__anona307901d0103	file:
MSIOF2_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_TXD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_TXD_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF2_TXD_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF2_TXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
MSIOF2_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	MSIOF2_TXD_MARK,	MSIOF2_RXD_MARK,	MSIOF2_TSCK_MARK,$/;"	e	enum:__anona304c1340103	file:
MSIOF2_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF2_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D4_MARK, MSIOF2_TXD_MARK, LCD2D14_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSIOF3_RXD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_RXD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_RXD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_RXD_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_RXD_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_SCK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SCK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SCK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SCK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SCK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SCK_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_SS1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SS1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SS1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SS1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SS1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_SS2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SS2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SS2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SYNC_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SYNC_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_SYNC_D_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_SYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_TXD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_TXD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIOF3_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_TXD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MSIOF3_TXD_C_MARK,$/;"	e	enum:__anona307945e0103	file:
MSIOF3_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,$/;"	e	enum:__anona3077f190103	file:
MSIZE	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE	/;"	d
MSIZE	include/dwmmc.h	/^#define MSIZE(/;"	d
MSIZE_1	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_1	/;"	d
MSIZE_16	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_16	/;"	d
MSIZE_2	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_2	/;"	d
MSIZE_32	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_32	/;"	d
MSIZE_4	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_4	/;"	d
MSIZE_8	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_8	/;"	d
MSIZE_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define MSIZE_P	/;"	d
MSK	include/gt64120.h	/^#define MSK(/;"	d
MSK_PH	drivers/usb/eth/r8152.h	/^#define MSK_PH	/;"	d
MSM_GPIO	drivers/gpio/Kconfig	/^config MSM_GPIO$/;"	c	menu:GPIO Support
MSM_SDHCI	drivers/mmc/Kconfig	/^config MSM_SDHCI$/;"	c	menu:MMC Host controller Support
MSM_SERIAL	drivers/serial/Kconfig	/^config MSM_SERIAL$/;"	c	menu:Serial drivers
MSRCLR	arch/microblaze/include/asm/asm.h	/^#define MSRCLR(/;"	d
MSRLinkFail	drivers/net/rtl8139.c	/^	MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,$/;"	e	enum:MediaStatusBits	file:
MSRRxFlowEnable	drivers/net/rtl8139.c	/^	MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,$/;"	e	enum:MediaStatusBits	file:
MSRRxPauseFlag	drivers/net/rtl8139.c	/^	MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,$/;"	e	enum:MediaStatusBits	file:
MSRSET	arch/microblaze/include/asm/asm.h	/^#define MSRSET(/;"	d
MSRSpeed10	drivers/net/rtl8139.c	/^	MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,$/;"	e	enum:MediaStatusBits	file:
MSRTxFlowEnable	drivers/net/rtl8139.c	/^	MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,$/;"	e	enum:MediaStatusBits	file:
MSRTxPauseFlag	drivers/net/rtl8139.c	/^	MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,$/;"	e	enum:MediaStatusBits	file:
MSR_	arch/powerpc/include/asm/processor.h	/^#define MSR_	/;"	d
MSR_AMD64_BU_CFG2	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_BU_CFG2	/;"	d
MSR_AMD64_DC_CFG	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_DC_CFG	/;"	d
MSR_AMD64_IBSBRTARGET	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSBRTARGET	/;"	d
MSR_AMD64_IBSCTL	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSCTL	/;"	d
MSR_AMD64_IBSDCLINAD	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSDCLINAD	/;"	d
MSR_AMD64_IBSDCPHYSAD	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSDCPHYSAD	/;"	d
MSR_AMD64_IBSFETCHCTL	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSFETCHCTL	/;"	d
MSR_AMD64_IBSFETCHLINAD	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSFETCHLINAD	/;"	d
MSR_AMD64_IBSFETCHPHYSAD	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSFETCHPHYSAD	/;"	d
MSR_AMD64_IBSFETCH_REG_COUNT	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSFETCH_REG_COUNT	/;"	d
MSR_AMD64_IBSFETCH_REG_MASK	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSFETCH_REG_MASK	/;"	d
MSR_AMD64_IBSOPCTL	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOPCTL	/;"	d
MSR_AMD64_IBSOPDATA	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOPDATA	/;"	d
MSR_AMD64_IBSOPDATA2	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOPDATA2	/;"	d
MSR_AMD64_IBSOPDATA3	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOPDATA3	/;"	d
MSR_AMD64_IBSOPRIP	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOPRIP	/;"	d
MSR_AMD64_IBSOP_REG_COUNT	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOP_REG_COUNT	/;"	d
MSR_AMD64_IBSOP_REG_MASK	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBSOP_REG_MASK	/;"	d
MSR_AMD64_IBS_REG_COUNT_MAX	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_IBS_REG_COUNT_MAX	/;"	d
MSR_AMD64_LS_CFG	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_LS_CFG	/;"	d
MSR_AMD64_MC0_MASK	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_MC0_MASK	/;"	d
MSR_AMD64_MCx_MASK	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_MCx_MASK(/;"	d
MSR_AMD64_NB_CFG	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_NB_CFG	/;"	d
MSR_AMD64_OSVW_ID_LENGTH	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_OSVW_ID_LENGTH	/;"	d
MSR_AMD64_OSVW_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_OSVW_STATUS	/;"	d
MSR_AMD64_PATCH_LEVEL	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_PATCH_LEVEL	/;"	d
MSR_AMD64_PATCH_LOADER	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_PATCH_LOADER	/;"	d
MSR_AMD64_TSC_RATIO	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD64_TSC_RATIO	/;"	d
MSR_AMD_PERF_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD_PERF_CTL	/;"	d
MSR_AMD_PERF_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD_PERF_STATUS	/;"	d
MSR_AMD_PSTATE_DEF_BASE	arch/x86/include/asm/msr-index.h	/^#define MSR_AMD_PSTATE_DEF_BASE	/;"	d
MSR_BE	arch/powerpc/include/asm/processor.h	/^#define MSR_BE	/;"	d
MSR_BSEL_CR_OVERCLOCK_CONTROL	arch/x86/include/asm/msr-index.h	/^#define MSR_BSEL_CR_OVERCLOCK_CONTROL	/;"	d
MSR_CE	arch/powerpc/include/asm/processor.h	/^#define MSR_CE	/;"	d
MSR_CONFIG_TDP_CONTROL	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_CONFIG_TDP_CONTROL	/;"	d
MSR_CONFIG_TDP_LEVEL1	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_CONFIG_TDP_LEVEL1	/;"	d
MSR_CONFIG_TDP_LEVEL2	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_CONFIG_TDP_LEVEL2	/;"	d
MSR_CONFIG_TDP_NOMINAL	arch/x86/include/asm/msr-index.h	/^#define MSR_CONFIG_TDP_NOMINAL	/;"	d
MSR_CORE_C1_RES	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_C1_RES	/;"	d
MSR_CORE_C3_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_C3_RESIDENCY	/;"	d
MSR_CORE_C6_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_C6_RESIDENCY	/;"	d
MSR_CORE_C7_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_C7_RESIDENCY	/;"	d
MSR_CORE_PERF_FIXED_CTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_FIXED_CTR0	/;"	d
MSR_CORE_PERF_FIXED_CTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_FIXED_CTR1	/;"	d
MSR_CORE_PERF_FIXED_CTR2	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_FIXED_CTR2	/;"	d
MSR_CORE_PERF_FIXED_CTR_CTRL	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_FIXED_CTR_CTRL	/;"	d
MSR_CORE_PERF_GLOBAL_CTRL	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_GLOBAL_CTRL	/;"	d
MSR_CORE_PERF_GLOBAL_OVF_CTRL	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_GLOBAL_OVF_CTRL	/;"	d
MSR_CORE_PERF_GLOBAL_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_CORE_PERF_GLOBAL_STATUS	/;"	d
MSR_CPU_THERM_CFG1	arch/x86/include/asm/msr-index.h	/^#define MSR_CPU_THERM_CFG1	/;"	d
MSR_CPU_THERM_CFG2	arch/x86/include/asm/msr-index.h	/^#define MSR_CPU_THERM_CFG2	/;"	d
MSR_CPU_THERM_SENS_CFG	arch/x86/include/asm/msr-index.h	/^#define MSR_CPU_THERM_SENS_CFG	/;"	d
MSR_CPU_TURBO_WKLD_CFG1	arch/x86/include/asm/msr-index.h	/^#define MSR_CPU_TURBO_WKLD_CFG1	/;"	d
MSR_CPU_TURBO_WKLD_CFG2	arch/x86/include/asm/msr-index.h	/^#define MSR_CPU_TURBO_WKLD_CFG2	/;"	d
MSR_CSTAR	arch/x86/include/asm/msr-index.h	/^#define MSR_CSTAR	/;"	d
MSR_CTS	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_CTS	/;"	d
MSR_C_STATE_LATENCY_CONTROL_0	arch/x86/include/asm/msr-index.h	/^#define MSR_C_STATE_LATENCY_CONTROL_0	/;"	d
MSR_C_STATE_LATENCY_CONTROL_1	arch/x86/include/asm/msr-index.h	/^#define MSR_C_STATE_LATENCY_CONTROL_1	/;"	d
MSR_C_STATE_LATENCY_CONTROL_2	arch/x86/include/asm/msr-index.h	/^#define MSR_C_STATE_LATENCY_CONTROL_2	/;"	d
MSR_C_STATE_LATENCY_CONTROL_3	arch/x86/include/asm/msr-index.h	/^#define MSR_C_STATE_LATENCY_CONTROL_3	/;"	d
MSR_C_STATE_LATENCY_CONTROL_4	arch/x86/include/asm/msr-index.h	/^#define MSR_C_STATE_LATENCY_CONTROL_4	/;"	d
MSR_C_STATE_LATENCY_CONTROL_5	arch/x86/include/asm/msr-index.h	/^#define MSR_C_STATE_LATENCY_CONTROL_5	/;"	d
MSR_DCD	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_DCD	/;"	d
MSR_DCTS	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_DCTS	/;"	d
MSR_DDCD	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_DDCD	/;"	d
MSR_DDR_RAPL_LIMIT	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define MSR_DDR_RAPL_LIMIT	/;"	d
MSR_DDSR	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_DDSR	/;"	d
MSR_DE	arch/powerpc/include/asm/processor.h	/^#define MSR_DE	/;"	d
MSR_DR	arch/powerpc/include/asm/processor.h	/^#define MSR_DR	/;"	d
MSR_DRAM_ENERGY_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_DRAM_ENERGY_STATUS	/;"	d
MSR_DRAM_PERF_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_DRAM_PERF_STATUS	/;"	d
MSR_DRAM_POWER_INFO	arch/x86/include/asm/msr-index.h	/^#define MSR_DRAM_POWER_INFO	/;"	d
MSR_DRAM_POWER_LIMIT	arch/x86/include/asm/msr-index.h	/^#define MSR_DRAM_POWER_LIMIT	/;"	d
MSR_DS	arch/powerpc/include/asm/processor.h	/^#define MSR_DS	/;"	d
MSR_DSR	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_DSR	/;"	d
MSR_DWE	arch/powerpc/include/asm/processor.h	/^#define MSR_DWE	/;"	d
MSR_EBC_FREQUENCY_ID	arch/x86/include/asm/msr-index.h	/^#define MSR_EBC_FREQUENCY_ID	/;"	d
MSR_EE	arch/powerpc/include/asm/processor.h	/^#define MSR_EE	/;"	d
MSR_EFER	arch/x86/include/asm/msr-index.h	/^#define MSR_EFER	/;"	d
MSR_F15H_NB_PERF_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_F15H_NB_PERF_CTL	/;"	d
MSR_F15H_NB_PERF_CTR	arch/x86/include/asm/msr-index.h	/^#define MSR_F15H_NB_PERF_CTR	/;"	d
MSR_F15H_PERF_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_F15H_PERF_CTL	/;"	d
MSR_F15H_PERF_CTR	arch/x86/include/asm/msr-index.h	/^#define MSR_F15H_PERF_CTR	/;"	d
MSR_F16H_L2I_PERF_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_F16H_L2I_PERF_CTL	/;"	d
MSR_F16H_L2I_PERF_CTR	arch/x86/include/asm/msr-index.h	/^#define MSR_F16H_L2I_PERF_CTR	/;"	d
MSR_FAM10H_MMIO_CONF_BASE	arch/x86/include/asm/msr-index.h	/^#define MSR_FAM10H_MMIO_CONF_BASE	/;"	d
MSR_FAM10H_NODE_ID	arch/x86/include/asm/msr-index.h	/^#define MSR_FAM10H_NODE_ID	/;"	d
MSR_FE0	arch/powerpc/include/asm/processor.h	/^#define MSR_FE0	/;"	d
MSR_FE1	arch/powerpc/include/asm/processor.h	/^#define MSR_FE1	/;"	d
MSR_FEATURE_CONFIG	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_FEATURE_CONFIG	/;"	d
MSR_FLEX_RATIO	arch/x86/include/asm/msr-index.h	/^#define MSR_FLEX_RATIO	/;"	d
MSR_FP	arch/powerpc/include/asm/processor.h	/^#define MSR_FP	/;"	d
MSR_FSB_FREQ	arch/x86/include/asm/msr-index.h	/^#define MSR_FSB_FREQ	/;"	d
MSR_FS_BASE	arch/x86/include/asm/msr-index.h	/^#define MSR_FS_BASE	/;"	d
MSR_GEODE_BUSCONT_CONF0	arch/x86/include/asm/msr-index.h	/^#define MSR_GEODE_BUSCONT_CONF0	/;"	d
MSR_GS_BASE	arch/x86/include/asm/msr-index.h	/^#define MSR_GS_BASE	/;"	d
MSR_IA32_APERF	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_APERF	/;"	d
MSR_IA32_APICBASE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_APICBASE	/;"	d
MSR_IA32_APICBASE_BASE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_APICBASE_BASE	/;"	d
MSR_IA32_APICBASE_BSP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_APICBASE_BSP	/;"	d
MSR_IA32_APICBASE_ENABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_APICBASE_ENABLE	/;"	d
MSR_IA32_BBL_CR_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_BBL_CR_CTL	/;"	d
MSR_IA32_BBL_CR_CTL3	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_BBL_CR_CTL3	/;"	d
MSR_IA32_CR_PAT	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_CR_PAT	/;"	d
MSR_IA32_DEBUGCTLMSR	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_DEBUGCTLMSR	/;"	d
MSR_IA32_DS_AREA	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_DS_AREA	/;"	d
MSR_IA32_EBL_CR_POWERON	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_EBL_CR_POWERON	/;"	d
MSR_IA32_ENERGY_PERFORMANCE_BIAS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_ENERGY_PERFORMANCE_BIAS	/;"	d
MSR_IA32_ENERGY_PERF_BIAS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_ENERGY_PERF_BIAS	/;"	d
MSR_IA32_FEATURE_CONTROL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_FEATURE_CONTROL /;"	d
MSR_IA32_LASTBRANCHFROMIP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_LASTBRANCHFROMIP	/;"	d
MSR_IA32_LASTBRANCHTOIP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_LASTBRANCHTOIP	/;"	d
MSR_IA32_LASTINTFROMIP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_LASTINTFROMIP	/;"	d
MSR_IA32_LASTINTTOIP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_LASTINTTOIP	/;"	d
MSR_IA32_MC0_ADDR	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MC0_ADDR	/;"	d
MSR_IA32_MC0_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MC0_CTL	/;"	d
MSR_IA32_MC0_CTL2	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MC0_CTL2	/;"	d
MSR_IA32_MC0_MISC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MC0_MISC	/;"	d
MSR_IA32_MC0_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MC0_STATUS	/;"	d
MSR_IA32_MCG_CAP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_CAP	/;"	d
MSR_IA32_MCG_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_CTL	/;"	d
MSR_IA32_MCG_EAX	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EAX	/;"	d
MSR_IA32_MCG_EBP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EBP	/;"	d
MSR_IA32_MCG_EBX	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EBX	/;"	d
MSR_IA32_MCG_ECX	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_ECX	/;"	d
MSR_IA32_MCG_EDI	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EDI	/;"	d
MSR_IA32_MCG_EDX	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EDX	/;"	d
MSR_IA32_MCG_EFLAGS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EFLAGS	/;"	d
MSR_IA32_MCG_EIP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_EIP	/;"	d
MSR_IA32_MCG_ESI	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_ESI	/;"	d
MSR_IA32_MCG_ESP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_ESP	/;"	d
MSR_IA32_MCG_RESERVED	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_RESERVED	/;"	d
MSR_IA32_MCG_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCG_STATUS	/;"	d
MSR_IA32_MCx_ADDR	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCx_ADDR(/;"	d
MSR_IA32_MCx_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCx_CTL(/;"	d
MSR_IA32_MCx_CTL2	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCx_CTL2(/;"	d
MSR_IA32_MCx_MISC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCx_MISC(/;"	d
MSR_IA32_MCx_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MCx_STATUS(/;"	d
MSR_IA32_MISC_ENABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE	/;"	d
MSR_IA32_MISC_ENABLES	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLES	/;"	d
MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_BTS_UNAVAIL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL	/;"	d
MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_EMON	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_EMON	/;"	d
MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP	/;"	d
MSR_IA32_MISC_ENABLE_FAST_STRING	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_FAST_STRING	/;"	d
MSR_IA32_MISC_ENABLE_FERR	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_FERR	/;"	d
MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX	/;"	d
MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_L1D_CONTEXT	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_L1D_CONTEXT	/;"	d
MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_LIMIT_CPUID	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID	/;"	d
MSR_IA32_MISC_ENABLE_MWAIT	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_MWAIT	/;"	d
MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL	/;"	d
MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK	/;"	d
MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK	/;"	d
MSR_IA32_MISC_ENABLE_TCC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_TCC	/;"	d
MSR_IA32_MISC_ENABLE_TM1	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_TM1	/;"	d
MSR_IA32_MISC_ENABLE_TM2	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_TM2	/;"	d
MSR_IA32_MISC_ENABLE_TURBO_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_X87_COMPAT	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_X87_COMPAT	/;"	d
MSR_IA32_MISC_ENABLE_XD_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_XD_DISABLE	/;"	d
MSR_IA32_MISC_ENABLE_XTPR_DISABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE	/;"	d
MSR_IA32_MPERF	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_MPERF	/;"	d
MSR_IA32_P5_MC_ADDR	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_P5_MC_ADDR	/;"	d
MSR_IA32_P5_MC_TYPE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_P5_MC_TYPE	/;"	d
MSR_IA32_PACKAGE_THERM_INTERRUPT	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PACKAGE_THERM_INTERRUPT	/;"	d
MSR_IA32_PACKAGE_THERM_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PACKAGE_THERM_STATUS	/;"	d
MSR_IA32_PEBS_ENABLE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PEBS_ENABLE	/;"	d
MSR_IA32_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PERFCTR0	/;"	d
MSR_IA32_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PERFCTR1	/;"	d
MSR_IA32_PERF_CAPABILITIES	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PERF_CAPABILITIES	/;"	d
MSR_IA32_PERF_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PERF_CTL	/;"	d
MSR_IA32_PERF_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PERF_STATUS	/;"	d
MSR_IA32_PLATFORM_DCA_CAP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PLATFORM_DCA_CAP	/;"	d
MSR_IA32_PLATFORM_ID	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PLATFORM_ID	/;"	d
MSR_IA32_PMC0	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_PMC0	/;"	d
MSR_IA32_POWER_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_POWER_CTL	/;"	d
MSR_IA32_SYSENTER_CS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_SYSENTER_CS	/;"	d
MSR_IA32_SYSENTER_EIP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_SYSENTER_EIP	/;"	d
MSR_IA32_SYSENTER_ESP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_SYSENTER_ESP	/;"	d
MSR_IA32_TEMPERATURE_TARGET	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_TEMPERATURE_TARGET	/;"	d
MSR_IA32_THERM_CONTROL	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_THERM_CONTROL	/;"	d
MSR_IA32_THERM_INTERRUPT	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_THERM_INTERRUPT	/;"	d
MSR_IA32_THERM_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_THERM_STATUS	/;"	d
MSR_IA32_TSC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_TSC	/;"	d
MSR_IA32_TSCDEADLINE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_TSCDEADLINE	/;"	d
MSR_IA32_TSC_ADJUST	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_TSC_ADJUST /;"	d
MSR_IA32_TSC_DEADLINE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_TSC_DEADLINE	/;"	d
MSR_IA32_UCODE_REV	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_UCODE_REV	/;"	d
MSR_IA32_UCODE_WRITE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_UCODE_WRITE	/;"	d
MSR_IA32_VMX_BASIC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_BASIC /;"	d
MSR_IA32_VMX_CR0_FIXED0	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_CR0_FIXED0 /;"	d
MSR_IA32_VMX_CR0_FIXED1	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_CR0_FIXED1 /;"	d
MSR_IA32_VMX_CR4_FIXED0	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_CR4_FIXED0 /;"	d
MSR_IA32_VMX_CR4_FIXED1	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_CR4_FIXED1 /;"	d
MSR_IA32_VMX_ENTRY_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_ENTRY_CTLS /;"	d
MSR_IA32_VMX_EPT_VPID_CAP	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_EPT_VPID_CAP /;"	d
MSR_IA32_VMX_EXIT_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_EXIT_CTLS /;"	d
MSR_IA32_VMX_MISC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_MISC /;"	d
MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE /;"	d
MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS /;"	d
MSR_IA32_VMX_PINBASED_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_PINBASED_CTLS /;"	d
MSR_IA32_VMX_PROCBASED_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_PROCBASED_CTLS /;"	d
MSR_IA32_VMX_PROCBASED_CTLS2	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_PROCBASED_CTLS2 /;"	d
MSR_IA32_VMX_TRUE_ENTRY_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_TRUE_ENTRY_CTLS /;"	d
MSR_IA32_VMX_TRUE_EXIT_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_TRUE_EXIT_CTLS /;"	d
MSR_IA32_VMX_TRUE_PINBASED_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_TRUE_PINBASED_CTLS /;"	d
MSR_IA32_VMX_TRUE_PROCBASED_CTLS	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_TRUE_PROCBASED_CTLS /;"	d
MSR_IA32_VMX_VMCS_ENUM	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_VMCS_ENUM /;"	d
MSR_IA32_VMX_VMFUNC	arch/x86/include/asm/msr-index.h	/^#define MSR_IA32_VMX_VMFUNC /;"	d
MSR_IACORE_RATIOS	arch/x86/include/asm/msr-index.h	/^#define MSR_IACORE_RATIOS	/;"	d
MSR_IACORE_TURBO_RATIOS	arch/x86/include/asm/msr-index.h	/^#define MSR_IACORE_TURBO_RATIOS	/;"	d
MSR_IACORE_TURBO_VIDS	arch/x86/include/asm/msr-index.h	/^#define MSR_IACORE_TURBO_VIDS	/;"	d
MSR_IACORE_VIDS	arch/x86/include/asm/msr-index.h	/^#define MSR_IACORE_VIDS	/;"	d
MSR_IDT_FCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_FCR1	/;"	d
MSR_IDT_FCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_FCR2	/;"	d
MSR_IDT_FCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_FCR3	/;"	d
MSR_IDT_FCR4	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_FCR4	/;"	d
MSR_IDT_MCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR0	/;"	d
MSR_IDT_MCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR1	/;"	d
MSR_IDT_MCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR2	/;"	d
MSR_IDT_MCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR3	/;"	d
MSR_IDT_MCR4	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR4	/;"	d
MSR_IDT_MCR5	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR5	/;"	d
MSR_IDT_MCR6	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR6	/;"	d
MSR_IDT_MCR7	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR7	/;"	d
MSR_IDT_MCR_CTRL	arch/x86/include/asm/msr-index.h	/^#define MSR_IDT_MCR_CTRL	/;"	d
MSR_ILE	arch/powerpc/include/asm/processor.h	/^#define MSR_ILE	/;"	d
MSR_IP	arch/powerpc/include/asm/processor.h	/^#define MSR_IP	/;"	d
MSR_IR	arch/powerpc/include/asm/processor.h	/^#define MSR_IR	/;"	d
MSR_IS	arch/powerpc/include/asm/processor.h	/^#define MSR_IS	/;"	d
MSR_ISF	arch/powerpc/include/asm/processor.h	/^#define MSR_ISF	/;"	d
MSR_IVT_TURBO_RATIO_LIMIT	arch/x86/include/asm/msr-index.h	/^#define MSR_IVT_TURBO_RATIO_LIMIT	/;"	d
MSR_K6_EPMR	arch/x86/include/asm/msr-index.h	/^#define MSR_K6_EPMR	/;"	d
MSR_K6_PFIR	arch/x86/include/asm/msr-index.h	/^#define MSR_K6_PFIR	/;"	d
MSR_K6_PSOR	arch/x86/include/asm/msr-index.h	/^#define MSR_K6_PSOR	/;"	d
MSR_K6_UWCCR	arch/x86/include/asm/msr-index.h	/^#define MSR_K6_UWCCR	/;"	d
MSR_K6_WHCR	arch/x86/include/asm/msr-index.h	/^#define MSR_K6_WHCR	/;"	d
MSR_K7_CLK_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_CLK_CTL	/;"	d
MSR_K7_EVNTSEL0	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_EVNTSEL0	/;"	d
MSR_K7_EVNTSEL1	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_EVNTSEL1	/;"	d
MSR_K7_EVNTSEL2	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_EVNTSEL2	/;"	d
MSR_K7_EVNTSEL3	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_EVNTSEL3	/;"	d
MSR_K7_FID_VID_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_FID_VID_CTL	/;"	d
MSR_K7_FID_VID_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_FID_VID_STATUS	/;"	d
MSR_K7_HWCR	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_HWCR	/;"	d
MSR_K7_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_PERFCTR0	/;"	d
MSR_K7_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_PERFCTR1	/;"	d
MSR_K7_PERFCTR2	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_PERFCTR2	/;"	d
MSR_K7_PERFCTR3	arch/x86/include/asm/msr-index.h	/^#define MSR_K7_PERFCTR3	/;"	d
MSR_K8_INT_PENDING_MSG	arch/x86/include/asm/msr-index.h	/^#define MSR_K8_INT_PENDING_MSG	/;"	d
MSR_K8_SYSCFG	arch/x86/include/asm/msr-index.h	/^#define MSR_K8_SYSCFG	/;"	d
MSR_K8_TOP_MEM1	arch/x86/include/asm/msr-index.h	/^#define MSR_K8_TOP_MEM1	/;"	d
MSR_K8_TOP_MEM2	arch/x86/include/asm/msr-index.h	/^#define MSR_K8_TOP_MEM2	/;"	d
MSR_K8_TSEG_ADDR	arch/x86/include/asm/msr-index.h	/^#define MSR_K8_TSEG_ADDR	/;"	d
MSR_KERNEL	arch/powerpc/cpu/mpc512x/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/mpc5xx/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/mpc5xxx/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/mpc8260/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/mpc83xx/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/mpc85xx/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/mpc8xx/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/cpu/ppc4xx/start.S	/^#define MSR_KERNEL /;"	d	file:
MSR_KERNEL	arch/powerpc/include/asm/processor.h	/^#define MSR_KERNEL	/;"	d
MSR_KERNEL_GS_BASE	arch/x86/include/asm/msr-index.h	/^#define MSR_KERNEL_GS_BASE	/;"	d
MSR_KNC_EVNTSEL0	arch/x86/include/asm/msr-index.h	/^#define MSR_KNC_EVNTSEL0 /;"	d
MSR_KNC_EVNTSEL1	arch/x86/include/asm/msr-index.h	/^#define MSR_KNC_EVNTSEL1 /;"	d
MSR_KNC_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_KNC_PERFCTR0 /;"	d
MSR_KNC_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_KNC_PERFCTR1 /;"	d
MSR_LBR_CORE_FROM	arch/x86/include/asm/msr-index.h	/^#define MSR_LBR_CORE_FROM	/;"	d
MSR_LBR_CORE_TO	arch/x86/include/asm/msr-index.h	/^#define MSR_LBR_CORE_TO	/;"	d
MSR_LBR_NHM_FROM	arch/x86/include/asm/msr-index.h	/^#define MSR_LBR_NHM_FROM	/;"	d
MSR_LBR_NHM_TO	arch/x86/include/asm/msr-index.h	/^#define MSR_LBR_NHM_TO	/;"	d
MSR_LBR_SELECT	arch/x86/include/asm/msr-index.h	/^#define MSR_LBR_SELECT	/;"	d
MSR_LBR_TOS	arch/x86/include/asm/msr-index.h	/^#define MSR_LBR_TOS	/;"	d
MSR_LE	arch/powerpc/include/asm/processor.h	/^#define MSR_LE	/;"	d
MSR_LSTAR	arch/x86/include/asm/msr-index.h	/^#define MSR_LSTAR	/;"	d
MSR_LT_LOCK_MEMORY	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_LT_LOCK_MEMORY	/;"	d
MSR_MAL	drivers/i2c/rcar_i2c.c	/^#define MSR_MAL	/;"	d	file:
MSR_MASK	drivers/i2c/rcar_i2c.c	/^#define MSR_MASK	/;"	d	file:
MSR_MAT	drivers/i2c/rcar_i2c.c	/^#define MSR_MAT	/;"	d	file:
MSR_MDE	drivers/i2c/rcar_i2c.c	/^#define MSR_MDE	/;"	d	file:
MSR_MDR	drivers/i2c/rcar_i2c.c	/^#define MSR_MDR	/;"	d	file:
MSR_MDT	drivers/i2c/rcar_i2c.c	/^#define MSR_MDT	/;"	d	file:
MSR_ME	arch/powerpc/include/asm/processor.h	/^#define MSR_ME	/;"	d
MSR_MISC_PWR_MGMT	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_MISC_PWR_MGMT	/;"	d
MSR_MISC_PWR_MGMT	arch/x86/include/asm/msr-index.h	/^#define MSR_MISC_PWR_MGMT	/;"	d
MSR_MNR	drivers/i2c/rcar_i2c.c	/^#define MSR_MNR	/;"	d	file:
MSR_MST	drivers/i2c/rcar_i2c.c	/^#define MSR_MST	/;"	d	file:
MSR_MTRRcap	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRcap	/;"	d
MSR_MTRRdefType	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRdefType	/;"	d
MSR_MTRRfix16K_80000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix16K_80000	/;"	d
MSR_MTRRfix16K_A0000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix16K_A0000	/;"	d
MSR_MTRRfix4K_C0000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_C0000	/;"	d
MSR_MTRRfix4K_C8000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_C8000	/;"	d
MSR_MTRRfix4K_D0000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_D0000	/;"	d
MSR_MTRRfix4K_D8000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_D8000	/;"	d
MSR_MTRRfix4K_E0000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_E0000	/;"	d
MSR_MTRRfix4K_E8000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_E8000	/;"	d
MSR_MTRRfix4K_F0000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_F0000	/;"	d
MSR_MTRRfix4K_F8000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix4K_F8000	/;"	d
MSR_MTRRfix64K_00000	arch/x86/include/asm/msr-index.h	/^#define MSR_MTRRfix64K_00000	/;"	d
MSR_NHM_PLATFORM_INFO	arch/x86/include/asm/msr-index.h	/^#define MSR_NHM_PLATFORM_INFO	/;"	d
MSR_NHM_SNB_PKG_CST_CFG_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_NHM_SNB_PKG_CST_CFG_CTL	/;"	d
MSR_NHM_TURBO_RATIO_LIMIT	arch/x86/include/asm/msr-index.h	/^#define MSR_NHM_TURBO_RATIO_LIMIT	/;"	d
MSR_OFFCORE_RSP_0	arch/x86/include/asm/msr-index.h	/^#define MSR_OFFCORE_RSP_0	/;"	d
MSR_OFFCORE_RSP_1	arch/x86/include/asm/msr-index.h	/^#define MSR_OFFCORE_RSP_1	/;"	d
MSR_P4_ALF_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_ALF_ESCR0	/;"	d
MSR_P4_ALF_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_ALF_ESCR1	/;"	d
MSR_P4_BPU_CCCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_CCCR0	/;"	d
MSR_P4_BPU_CCCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_CCCR1	/;"	d
MSR_P4_BPU_CCCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_CCCR2	/;"	d
MSR_P4_BPU_CCCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_CCCR3	/;"	d
MSR_P4_BPU_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_ESCR0	/;"	d
MSR_P4_BPU_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_ESCR1	/;"	d
MSR_P4_BPU_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_PERFCTR0	/;"	d
MSR_P4_BPU_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_PERFCTR1	/;"	d
MSR_P4_BPU_PERFCTR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_PERFCTR2	/;"	d
MSR_P4_BPU_PERFCTR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BPU_PERFCTR3	/;"	d
MSR_P4_BSU_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BSU_ESCR0	/;"	d
MSR_P4_BSU_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_BSU_ESCR1	/;"	d
MSR_P4_CRU_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_CRU_ESCR0	/;"	d
MSR_P4_CRU_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_CRU_ESCR1	/;"	d
MSR_P4_CRU_ESCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_CRU_ESCR2	/;"	d
MSR_P4_CRU_ESCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_CRU_ESCR3	/;"	d
MSR_P4_CRU_ESCR4	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_CRU_ESCR4	/;"	d
MSR_P4_CRU_ESCR5	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_CRU_ESCR5	/;"	d
MSR_P4_DAC_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_DAC_ESCR0	/;"	d
MSR_P4_DAC_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_DAC_ESCR1	/;"	d
MSR_P4_FIRM_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FIRM_ESCR0	/;"	d
MSR_P4_FIRM_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FIRM_ESCR1	/;"	d
MSR_P4_FLAME_CCCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_CCCR0	/;"	d
MSR_P4_FLAME_CCCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_CCCR1	/;"	d
MSR_P4_FLAME_CCCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_CCCR2	/;"	d
MSR_P4_FLAME_CCCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_CCCR3	/;"	d
MSR_P4_FLAME_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_ESCR0	/;"	d
MSR_P4_FLAME_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_ESCR1	/;"	d
MSR_P4_FLAME_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_PERFCTR0	/;"	d
MSR_P4_FLAME_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_PERFCTR1	/;"	d
MSR_P4_FLAME_PERFCTR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_PERFCTR2	/;"	d
MSR_P4_FLAME_PERFCTR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FLAME_PERFCTR3	/;"	d
MSR_P4_FSB_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FSB_ESCR0	/;"	d
MSR_P4_FSB_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_FSB_ESCR1	/;"	d
MSR_P4_IQ_CCCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_CCCR0	/;"	d
MSR_P4_IQ_CCCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_CCCR1	/;"	d
MSR_P4_IQ_CCCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_CCCR2	/;"	d
MSR_P4_IQ_CCCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_CCCR3	/;"	d
MSR_P4_IQ_CCCR4	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_CCCR4	/;"	d
MSR_P4_IQ_CCCR5	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_CCCR5	/;"	d
MSR_P4_IQ_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_ESCR0	/;"	d
MSR_P4_IQ_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_ESCR1	/;"	d
MSR_P4_IQ_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_PERFCTR0	/;"	d
MSR_P4_IQ_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_PERFCTR1	/;"	d
MSR_P4_IQ_PERFCTR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_PERFCTR2	/;"	d
MSR_P4_IQ_PERFCTR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_PERFCTR3	/;"	d
MSR_P4_IQ_PERFCTR4	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_PERFCTR4	/;"	d
MSR_P4_IQ_PERFCTR5	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IQ_PERFCTR5	/;"	d
MSR_P4_IS_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IS_ESCR0	/;"	d
MSR_P4_IS_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IS_ESCR1	/;"	d
MSR_P4_ITLB_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_ITLB_ESCR0	/;"	d
MSR_P4_ITLB_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_ITLB_ESCR1	/;"	d
MSR_P4_IX_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IX_ESCR0	/;"	d
MSR_P4_IX_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_IX_ESCR1	/;"	d
MSR_P4_MOB_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MOB_ESCR0	/;"	d
MSR_P4_MOB_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MOB_ESCR1	/;"	d
MSR_P4_MS_CCCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_CCCR0	/;"	d
MSR_P4_MS_CCCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_CCCR1	/;"	d
MSR_P4_MS_CCCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_CCCR2	/;"	d
MSR_P4_MS_CCCR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_CCCR3	/;"	d
MSR_P4_MS_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_ESCR0	/;"	d
MSR_P4_MS_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_ESCR1	/;"	d
MSR_P4_MS_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_PERFCTR0	/;"	d
MSR_P4_MS_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_PERFCTR1	/;"	d
MSR_P4_MS_PERFCTR2	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_PERFCTR2	/;"	d
MSR_P4_MS_PERFCTR3	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_MS_PERFCTR3	/;"	d
MSR_P4_PEBS_MATRIX_VERT	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_PEBS_MATRIX_VERT	/;"	d
MSR_P4_PMH_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_PMH_ESCR0	/;"	d
MSR_P4_PMH_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_PMH_ESCR1	/;"	d
MSR_P4_RAT_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_RAT_ESCR0	/;"	d
MSR_P4_RAT_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_RAT_ESCR1	/;"	d
MSR_P4_SAAT_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_SAAT_ESCR0	/;"	d
MSR_P4_SAAT_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_SAAT_ESCR1	/;"	d
MSR_P4_SSU_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_SSU_ESCR0	/;"	d
MSR_P4_SSU_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_SSU_ESCR1	/;"	d
MSR_P4_TBPU_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_TBPU_ESCR0	/;"	d
MSR_P4_TBPU_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_TBPU_ESCR1	/;"	d
MSR_P4_TC_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_TC_ESCR0	/;"	d
MSR_P4_TC_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_TC_ESCR1	/;"	d
MSR_P4_U2L_ESCR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_U2L_ESCR0	/;"	d
MSR_P4_U2L_ESCR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P4_U2L_ESCR1	/;"	d
MSR_P6_EVNTSEL0	arch/x86/include/asm/msr-index.h	/^#define MSR_P6_EVNTSEL0	/;"	d
MSR_P6_EVNTSEL1	arch/x86/include/asm/msr-index.h	/^#define MSR_P6_EVNTSEL1	/;"	d
MSR_P6_PERFCTR0	arch/x86/include/asm/msr-index.h	/^#define MSR_P6_PERFCTR0	/;"	d
MSR_P6_PERFCTR1	arch/x86/include/asm/msr-index.h	/^#define MSR_P6_PERFCTR1	/;"	d
MSR_PE	arch/powerpc/include/asm/processor.h	/^#define MSR_PE	/;"	d
MSR_PEBS_LD_LAT_THRESHOLD	arch/x86/include/asm/msr-index.h	/^#define MSR_PEBS_LD_LAT_THRESHOLD	/;"	d
MSR_PIC_MSG_CONTROL	arch/x86/include/asm/msr-index.h	/^#define MSR_PIC_MSG_CONTROL	/;"	d
MSR_PKGC3_IRTL	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_PKGC3_IRTL	/;"	d
MSR_PKGC6_IRTL	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_PKGC6_IRTL	/;"	d
MSR_PKGC7_IRTL	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_PKGC7_IRTL	/;"	d
MSR_PKG_C10_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C10_RESIDENCY	/;"	d
MSR_PKG_C2_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C2_RESIDENCY	/;"	d
MSR_PKG_C3_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C3_RESIDENCY	/;"	d
MSR_PKG_C6_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C6_RESIDENCY	/;"	d
MSR_PKG_C7_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C7_RESIDENCY	/;"	d
MSR_PKG_C8_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C8_RESIDENCY	/;"	d
MSR_PKG_C9_RESIDENCY	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_C9_RESIDENCY	/;"	d
MSR_PKG_ENERGY_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_ENERGY_STATUS	/;"	d
MSR_PKG_PERF_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_PERF_STATUS	/;"	d
MSR_PKG_POWER_INFO	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_POWER_INFO	/;"	d
MSR_PKG_POWER_LIMIT	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_POWER_LIMIT	/;"	d
MSR_PKG_POWER_SKU	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define MSR_PKG_POWER_SKU	/;"	d
MSR_PKG_POWER_SKU	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_PKG_POWER_SKU	/;"	d
MSR_PKG_POWER_SKU_UNIT	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_POWER_SKU_UNIT	/;"	d
MSR_PKG_TURBO_CFG1	arch/x86/include/asm/msr-index.h	/^#define MSR_PKG_TURBO_CFG1	/;"	d
MSR_PLATFORM_INFO	arch/x86/include/asm/msr-index.h	/^#define MSR_PLATFORM_INFO	/;"	d
MSR_PMG_CST_CONFIG_CONTROL	arch/x86/include/asm/msr-index.h	/^#define MSR_PMG_CST_CONFIG_CONTROL	/;"	d
MSR_PMG_CST_CONFIG_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_PMG_CST_CONFIG_CTL	/;"	d
MSR_PMG_IO_CAPTURE_ADR	arch/x86/include/asm/msr-index.h	/^#define MSR_PMG_IO_CAPTURE_ADR	/;"	d
MSR_PMM	arch/powerpc/include/asm/processor.h	/^#define MSR_PMM	/;"	d
MSR_POW	arch/powerpc/include/asm/processor.h	/^#define MSR_POW	/;"	d
MSR_POWER_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_POWER_CTL	/;"	d
MSR_POWER_MISC	arch/x86/include/asm/msr-index.h	/^#define MSR_POWER_MISC	/;"	d
MSR_PP0_CURRENT_CONFIG	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_PP0_CURRENT_CONFIG	/;"	d
MSR_PP0_ENERGY_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_PP0_ENERGY_STATUS	/;"	d
MSR_PP0_PERF_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_PP0_PERF_STATUS	/;"	d
MSR_PP0_POLICY	arch/x86/include/asm/msr-index.h	/^#define MSR_PP0_POLICY	/;"	d
MSR_PP0_POWER_LIMIT	arch/x86/include/asm/msr-index.h	/^#define MSR_PP0_POWER_LIMIT	/;"	d
MSR_PP1_CURRENT_CONFIG	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_PP1_CURRENT_CONFIG	/;"	d
MSR_PP1_ENERGY_STATUS	arch/x86/include/asm/msr-index.h	/^#define MSR_PP1_ENERGY_STATUS	/;"	d
MSR_PP1_POLICY	arch/x86/include/asm/msr-index.h	/^#define MSR_PP1_POLICY	/;"	d
MSR_PP1_POWER_LIMIT	arch/x86/include/asm/msr-index.h	/^#define MSR_PP1_POWER_LIMIT	/;"	d
MSR_PR	arch/powerpc/include/asm/processor.h	/^#define MSR_PR	/;"	d
MSR_PX	arch/powerpc/include/asm/processor.h	/^#define MSR_PX	/;"	d
MSR_RI	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_RI	/;"	d
MSR_RI	arch/powerpc/include/asm/processor.h	/^#define MSR_RI	/;"	d
MSR_SE	arch/powerpc/include/asm/processor.h	/^#define MSR_SE	/;"	d
MSR_SF	arch/powerpc/include/asm/processor.h	/^#define MSR_SF	/;"	d
MSR_SMI_COUNT	arch/x86/include/asm/msr-index.h	/^#define MSR_SMI_COUNT	/;"	d
MSR_SPE	arch/powerpc/include/asm/processor.h	/^#define MSR_SPE	/;"	d
MSR_STAR	arch/x86/include/asm/msr-index.h	/^#define MSR_STAR	/;"	d
MSR_SYSCALL_MASK	arch/x86/include/asm/msr-index.h	/^#define MSR_SYSCALL_MASK	/;"	d
MSR_TEMPERATURE_TARGET	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define MSR_TEMPERATURE_TARGET	/;"	d
MSR_TEMPERATURE_TARGET	arch/x86/include/asm/msr-index.h	/^#define MSR_TEMPERATURE_TARGET	/;"	d
MSR_TERI	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	MSR_TERI	/;"	d
MSR_TGPR	arch/powerpc/include/asm/processor.h	/^#define MSR_TGPR	/;"	d
MSR_THERM2_CTL	arch/x86/include/asm/msr-index.h	/^#define MSR_THERM2_CTL	/;"	d
MSR_THERM2_CTL_TM_SELECT	arch/x86/include/asm/msr-index.h	/^#define MSR_THERM2_CTL_TM_SELECT	/;"	d
MSR_TMTA_LONGRUN_CTRL	arch/x86/include/asm/msr-index.h	/^#define MSR_TMTA_LONGRUN_CTRL	/;"	d
MSR_TMTA_LONGRUN_FLAGS	arch/x86/include/asm/msr-index.h	/^#define MSR_TMTA_LONGRUN_FLAGS	/;"	d
MSR_TMTA_LRTI_READOUT	arch/x86/include/asm/msr-index.h	/^#define MSR_TMTA_LRTI_READOUT	/;"	d
MSR_TMTA_LRTI_VOLT_MHZ	arch/x86/include/asm/msr-index.h	/^#define MSR_TMTA_LRTI_VOLT_MHZ	/;"	d
MSR_TSC_AUX	arch/x86/include/asm/msr-index.h	/^#define MSR_TSC_AUX	/;"	d
MSR_TURBO_ACTIVATION_RATIO	arch/x86/include/asm/msr-index.h	/^#define MSR_TURBO_ACTIVATION_RATIO	/;"	d
MSR_UBLE	arch/powerpc/include/asm/processor.h	/^#define MSR_UBLE	/;"	d
MSR_UCLE	arch/powerpc/include/asm/processor.h	/^#define MSR_UCLE	/;"	d
MSR_VEC	arch/powerpc/include/asm/processor.h	/^#define MSR_VEC	/;"	d
MSR_VIA_BCR2	arch/x86/include/asm/msr-index.h	/^#define MSR_VIA_BCR2	/;"	d
MSR_VIA_FCR	arch/x86/include/asm/msr-index.h	/^#define MSR_VIA_FCR	/;"	d
MSR_VIA_LONGHAUL	arch/x86/include/asm/msr-index.h	/^#define MSR_VIA_LONGHAUL	/;"	d
MSR_VIA_RNG	arch/x86/include/asm/msr-index.h	/^#define MSR_VIA_RNG	/;"	d
MSR_VM_CR	arch/x86/include/asm/msr-index.h	/^#define MSR_VM_CR /;"	d
MSR_VM_HSAVE_PA	arch/x86/include/asm/msr-index.h	/^#define MSR_VM_HSAVE_PA /;"	d
MSR_VM_IGNNE	arch/x86/include/asm/msr-index.h	/^#define MSR_VM_IGNNE /;"	d
MSR_VR_CURRENT_CONFIG	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define MSR_VR_CURRENT_CONFIG	/;"	d
MSR_VR_MISC_CONFIG	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define MSR_VR_MISC_CONFIG	/;"	d
MSR_VR_MISC_CONFIG2	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define MSR_VR_MISC_CONFIG2	/;"	d
MSR_WE	arch/powerpc/include/asm/processor.h	/^#define MSR_WE	/;"	d
MSSCR0	arch/powerpc/include/asm/processor.h	/^#define MSSCR0	/;"	d
MSS_MAX	drivers/usb/eth/r8152.h	/^#define MSS_MAX	/;"	d
MSS_SHIFT	drivers/usb/eth/r8152.h	/^#define MSS_SHIFT	/;"	d
MST0_TS_XX1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST0_TS_XX1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST0_TS_XX2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST0_TS_XX2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST0_TS_XX3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST0_TS_XX3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST0_TS_XX4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST0_TS_XX4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST0_TS_XX5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST0_TS_XX5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST1_TS_XX1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST1_TS_XX1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST1_TS_XX2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST1_TS_XX2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST1_TS_XX3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST1_TS_XX3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST1_TS_XX4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST1_TS_XX4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MST1_TS_XX5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MST1_TS_XX5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
MSTP0_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP0_BITS	/;"	d
MSTP0_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP0_BITS	/;"	d
MSTP0_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP0_BITS	/;"	d
MSTP0_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP0_BITS	/;"	d
MSTP0_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP0_BITS	/;"	d
MSTP0_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP0_BITS	/;"	d
MSTP10_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP10_BITS	/;"	d
MSTP10_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP10_BITS	/;"	d
MSTP10_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP10_BITS	/;"	d
MSTP10_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP10_BITS	/;"	d
MSTP10_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP10_BITS	/;"	d
MSTP10_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP10_BITS	/;"	d
MSTP11_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP11_BITS	/;"	d
MSTP11_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP11_BITS	/;"	d
MSTP11_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP11_BITS	/;"	d
MSTP11_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP11_BITS	/;"	d
MSTP11_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP11_BITS	/;"	d
MSTP11_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP11_BITS	/;"	d
MSTP1_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP1_BITS	/;"	d
MSTP1_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP1_BITS	/;"	d
MSTP1_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP1_BITS	/;"	d
MSTP1_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP1_BITS	/;"	d
MSTP1_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP1_BITS	/;"	d
MSTP1_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP1_BITS	/;"	d
MSTP2_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP2_BITS	/;"	d
MSTP2_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP2_BITS	/;"	d
MSTP2_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP2_BITS	/;"	d
MSTP2_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP2_BITS	/;"	d
MSTP2_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP2_BITS	/;"	d
MSTP2_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP2_BITS	/;"	d
MSTP3_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP3_BITS	/;"	d
MSTP3_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP3_BITS	/;"	d
MSTP3_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP3_BITS	/;"	d
MSTP3_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP3_BITS	/;"	d
MSTP3_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP3_BITS	/;"	d
MSTP3_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP3_BITS	/;"	d
MSTP4_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP4_BITS	/;"	d
MSTP4_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP4_BITS	/;"	d
MSTP4_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP4_BITS	/;"	d
MSTP4_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP4_BITS	/;"	d
MSTP4_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP4_BITS	/;"	d
MSTP4_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP4_BITS	/;"	d
MSTP5_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP5_BITS	/;"	d
MSTP5_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP5_BITS	/;"	d
MSTP5_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP5_BITS	/;"	d
MSTP5_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP5_BITS	/;"	d
MSTP5_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP5_BITS	/;"	d
MSTP5_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP5_BITS	/;"	d
MSTP6_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP6_BITS	/;"	d
MSTP7_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP7_BITS	/;"	d
MSTP7_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP7_BITS	/;"	d
MSTP7_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP7_BITS	/;"	d
MSTP7_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP7_BITS	/;"	d
MSTP7_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP7_BITS	/;"	d
MSTP7_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP7_BITS	/;"	d
MSTP8_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP8_BITS	/;"	d
MSTP8_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP8_BITS	/;"	d
MSTP8_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP8_BITS	/;"	d
MSTP8_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP8_BITS	/;"	d
MSTP8_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP8_BITS	/;"	d
MSTP8_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP8_BITS	/;"	d
MSTP9_BITS	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define MSTP9_BITS	/;"	d
MSTP9_BITS	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define MSTP9_BITS	/;"	d
MSTP9_BITS	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define MSTP9_BITS	/;"	d
MSTP9_BITS	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define MSTP9_BITS	/;"	d
MSTP9_BITS	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define MSTP9_BITS	/;"	d
MSTP9_BITS	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define MSTP9_BITS	/;"	d
MSTPCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	MSTPCR	/;"	d
MSTPCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define MSTPCR0 /;"	d
MSTPCR0	arch/sh/include/asm/cpu_sh7723.h	/^#define MSTPCR0 /;"	d
MSTPCR0	arch/sh/include/asm/cpu_sh7724.h	/^#define MSTPCR0 /;"	d
MSTPCR0_A	board/espt/lowlevel_init.S	/^MSTPCR0_A:	.long	0xFFC80030$/;"	l
MSTPCR0_A	board/ms7722se/lowlevel_init.S	/^MSTPCR0_A:	.long	MSTPCR0$/;"	l
MSTPCR0_A	board/renesas/MigoR/lowlevel_init.S	/^MSTPCR0_A:	.long	MSTPCR0$/;"	l
MSTPCR0_A	board/renesas/sh7763rdp/lowlevel_init.S	/^MSTPCR0_A:	.long	0xFFC80030$/;"	l
MSTPCR0_D	board/espt/lowlevel_init.S	/^MSTPCR0_D:	.long	0x00000000$/;"	l
MSTPCR0_D	board/ms7722se/lowlevel_init.S	/^MSTPCR0_D:	.long	0x00001001$/;"	l
MSTPCR0_D	board/renesas/MigoR/lowlevel_init.S	/^MSTPCR0_D:	.long	0x00001001$/;"	l
MSTPCR0_D	board/renesas/r7780mp/lowlevel_init.S	/^MSTPCR0_D:		.long	0x00001001$/;"	l
MSTPCR0_D	board/renesas/sh7763rdp/lowlevel_init.S	/^MSTPCR0_D:	.long	0x00000000$/;"	l
MSTPCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define MSTPCR1 /;"	d
MSTPCR1	arch/sh/include/asm/cpu_sh7723.h	/^#define MSTPCR1 /;"	d
MSTPCR1	arch/sh/include/asm/cpu_sh7724.h	/^#define MSTPCR1 /;"	d
MSTPCR1	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define MSTPCR1	/;"	d	file:
MSTPCR1	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define MSTPCR1 /;"	d	file:
MSTPCR1	board/renesas/r0p7734/r0p7734.c	/^#define MSTPCR1	/;"	d	file:
MSTPCR1_A	board/espt/lowlevel_init.S	/^MSTPCR1_A:	.long	0xFFC80038$/;"	l
MSTPCR1_A	board/renesas/sh7763rdp/lowlevel_init.S	/^MSTPCR1_A:	.long	0xFFC80038$/;"	l
MSTPCR1_D	board/espt/lowlevel_init.S	/^MSTPCR1_D:	.long	0x00000000$/;"	l
MSTPCR1_D	board/renesas/sh7763rdp/lowlevel_init.S	/^MSTPCR1_D:	.long	0x00000000$/;"	l
MSTPCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define MSTPCR2 /;"	d
MSTPCR2	arch/sh/include/asm/cpu_sh7723.h	/^#define MSTPCR2 /;"	d
MSTPCR2	arch/sh/include/asm/cpu_sh7724.h	/^#define MSTPCR2 /;"	d
MSTPCR2_A	board/ms7722se/lowlevel_init.S	/^MSTPCR2_A:	.long	MSTPCR2$/;"	l
MSTPCR2_A	board/renesas/MigoR/lowlevel_init.S	/^MSTPCR2_A:	.long	MSTPCR2$/;"	l
MSTPCR2_D	board/ms7722se/lowlevel_init.S	/^MSTPCR2_D:	.long	0xffffffff$/;"	l
MSTPCR2_D	board/renesas/MigoR/lowlevel_init.S	/^MSTPCR2_D:	.long	0xffffffff$/;"	l
MSTPCR2_D	board/renesas/ap325rxa/ap325rxa.c	/^#define MSTPCR2_D	/;"	d	file:
MSTPCR2_D	board/renesas/r7780mp/lowlevel_init.S	/^MSTPCR2_D:		.long	0xffffffff$/;"	l
MSTPCR3	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define MSTPCR3 /;"	d	file:
MSTPSR0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR0	/;"	d
MSTPSR0	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR0	/;"	d
MSTPSR1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR1	/;"	d
MSTPSR1	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR1	/;"	d
MSTPSR1	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define MSTPSR1	/;"	d	file:
MSTPSR1	board/renesas/r0p7734/r0p7734.c	/^#define MSTPSR1	/;"	d	file:
MSTPSR10	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR10	/;"	d
MSTPSR10	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR10	/;"	d
MSTPSR11	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR11	/;"	d
MSTPSR11	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR11	/;"	d
MSTPSR1_GETHER	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define MSTPSR1_GETHER	/;"	d	file:
MSTPSR1_GETHER	board/renesas/r0p7734/r0p7734.c	/^#define MSTPSR1_GETHER	/;"	d	file:
MSTPSR2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR2	/;"	d
MSTPSR2	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR2	/;"	d
MSTPSR3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR3	/;"	d
MSTPSR3	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR3	/;"	d
MSTPSR3	board/renesas/lager/lager.c	/^#define MSTPSR3	/;"	d	file:
MSTPSR3	board/renesas/stout/stout.c	/^#define MSTPSR3	/;"	d	file:
MSTPSR4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR4	/;"	d
MSTPSR4	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR4	/;"	d
MSTPSR5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR5	/;"	d
MSTPSR5	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR5	/;"	d
MSTPSR6	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR6	/;"	d
MSTPSR7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR7	/;"	d
MSTPSR7	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR7	/;"	d
MSTPSR8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR8	/;"	d
MSTPSR8	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR8	/;"	d
MSTPSR9	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MSTPSR9	/;"	d
MSTPSR9	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define MSTPSR9	/;"	d
MSTR	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define MSTR	/;"	d
MSYNC	arch/powerpc/include/asm/mmu.h	/^#define MSYNC	/;"	d
MS_ACTIVE	fs/ubifs/ubifs.h	/^#define MS_ACTIVE	/;"	d
MS_BIND	fs/ubifs/ubifs.h	/^#define MS_BIND	/;"	d
MS_DIRSYNC	fs/ubifs/ubifs.h	/^#define MS_DIRSYNC	/;"	d
MS_I_VERSION	fs/ubifs/ubifs.h	/^#define MS_I_VERSION	/;"	d
MS_KERNMOUNT	fs/ubifs/ubifs.h	/^#define MS_KERNMOUNT	/;"	d
MS_MANDLOCK	fs/ubifs/ubifs.h	/^#define MS_MANDLOCK	/;"	d
MS_MOVE	fs/ubifs/ubifs.h	/^#define MS_MOVE	/;"	d
MS_NOATIME	fs/ubifs/ubifs.h	/^#define MS_NOATIME	/;"	d
MS_NODEV	fs/ubifs/ubifs.h	/^#define MS_NODEV	/;"	d
MS_NODIRATIME	fs/ubifs/ubifs.h	/^#define MS_NODIRATIME	/;"	d
MS_NOEXEC	fs/ubifs/ubifs.h	/^#define MS_NOEXEC	/;"	d
MS_NOSUID	fs/ubifs/ubifs.h	/^#define MS_NOSUID	/;"	d
MS_NOUSER	fs/ubifs/ubifs.h	/^#define MS_NOUSER	/;"	d
MS_POSIXACL	fs/ubifs/ubifs.h	/^#define MS_POSIXACL	/;"	d
MS_PRIVATE	fs/ubifs/ubifs.h	/^#define MS_PRIVATE	/;"	d
MS_RDONLY	fs/ubifs/ubifs.h	/^#define MS_RDONLY	/;"	d
MS_REC	fs/ubifs/ubifs.h	/^#define MS_REC	/;"	d
MS_RELATIME	fs/ubifs/ubifs.h	/^#define MS_RELATIME	/;"	d
MS_REMOUNT	fs/ubifs/ubifs.h	/^#define MS_REMOUNT	/;"	d
MS_SHARED	fs/ubifs/ubifs.h	/^#define MS_SHARED	/;"	d
MS_SILENT	fs/ubifs/ubifs.h	/^#define MS_SILENT	/;"	d
MS_SLAVE	fs/ubifs/ubifs.h	/^#define MS_SLAVE	/;"	d
MS_SYNCHRONOUS	fs/ubifs/ubifs.h	/^#define MS_SYNCHRONOUS	/;"	d
MS_UNBINDABLE	fs/ubifs/ubifs.h	/^#define MS_UNBINDABLE	/;"	d
MS_VERBOSE	fs/ubifs/ubifs.h	/^#define MS_VERBOSE	/;"	d
MT2_MANUFACT	include/flash.h	/^#define MT2_MANUFACT	/;"	d
MT41J128MJT125_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_READ_LATENCY	/;"	d
MT41J128MJT125_EMIF_READ_LATENCY_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_READ_LATENCY_400MHz	/;"	d
MT41J128MJT125_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_SDCFG	/;"	d
MT41J128MJT125_EMIF_SDCFG_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_SDCFG_400MHz	/;"	d
MT41J128MJT125_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_SDREF	/;"	d
MT41J128MJT125_EMIF_SDREF_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_SDREF_400MHz	/;"	d
MT41J128MJT125_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_TIM1	/;"	d
MT41J128MJT125_EMIF_TIM1_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_TIM1_400MHz	/;"	d
MT41J128MJT125_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_TIM2	/;"	d
MT41J128MJT125_EMIF_TIM2_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_TIM2_400MHz	/;"	d
MT41J128MJT125_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_TIM3	/;"	d
MT41J128MJT125_EMIF_TIM3_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_EMIF_TIM3_400MHz	/;"	d
MT41J128MJT125_INVERT_CLKOUT	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_INVERT_CLKOUT	/;"	d
MT41J128MJT125_INVERT_CLKOUT_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_INVERT_CLKOUT_400MHz	/;"	d
MT41J128MJT125_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_IOCTRL_VALUE	/;"	d
MT41J128MJT125_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_PHY_FIFO_WE	/;"	d
MT41J128MJT125_PHY_FIFO_WE_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_PHY_FIFO_WE_400MHz	/;"	d
MT41J128MJT125_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_PHY_WR_DATA	/;"	d
MT41J128MJT125_PHY_WR_DATA_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_PHY_WR_DATA_400MHz	/;"	d
MT41J128MJT125_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_RATIO	/;"	d
MT41J128MJT125_RATIO_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_RATIO_400MHz	/;"	d
MT41J128MJT125_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_RD_DQS	/;"	d
MT41J128MJT125_RD_DQS_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_RD_DQS_400MHz	/;"	d
MT41J128MJT125_WR_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_WR_DQS	/;"	d
MT41J128MJT125_WR_DQS_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_WR_DQS_400MHz	/;"	d
MT41J128MJT125_ZQ_CFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_ZQ_CFG	/;"	d
MT41J128MJT125_ZQ_CFG_400MHz	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J128MJT125_ZQ_CFG_400MHz	/;"	d
MT41J256M8HX15E_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_EMIF_READ_LATENCY	/;"	d
MT41J256M8HX15E_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_EMIF_SDCFG	/;"	d
MT41J256M8HX15E_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_EMIF_SDREF	/;"	d
MT41J256M8HX15E_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_EMIF_TIM1	/;"	d
MT41J256M8HX15E_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_EMIF_TIM2	/;"	d
MT41J256M8HX15E_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_EMIF_TIM3	/;"	d
MT41J256M8HX15E_INVERT_CLKOUT	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_INVERT_CLKOUT	/;"	d
MT41J256M8HX15E_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_IOCTRL_VALUE	/;"	d
MT41J256M8HX15E_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_PHY_FIFO_WE	/;"	d
MT41J256M8HX15E_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_PHY_WR_DATA	/;"	d
MT41J256M8HX15E_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_RATIO	/;"	d
MT41J256M8HX15E_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_RD_DQS	/;"	d
MT41J256M8HX15E_WR_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_WR_DQS	/;"	d
MT41J256M8HX15E_ZQ_CFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256M8HX15E_ZQ_CFG	/;"	d
MT41J256MJT125_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J256MJT125_EMIF_SDCFG	/;"	d
MT41J512M8RH125_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_EMIF_READ_LATENCY	/;"	d
MT41J512M8RH125_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_EMIF_SDCFG	/;"	d
MT41J512M8RH125_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_EMIF_SDREF	/;"	d
MT41J512M8RH125_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_EMIF_TIM1	/;"	d
MT41J512M8RH125_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_EMIF_TIM2	/;"	d
MT41J512M8RH125_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_EMIF_TIM3	/;"	d
MT41J512M8RH125_INVERT_CLKOUT	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_INVERT_CLKOUT	/;"	d
MT41J512M8RH125_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_IOCTRL_VALUE	/;"	d
MT41J512M8RH125_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_PHY_FIFO_WE	/;"	d
MT41J512M8RH125_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_PHY_WR_DATA	/;"	d
MT41J512M8RH125_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_RATIO	/;"	d
MT41J512M8RH125_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_RD_DQS	/;"	d
MT41J512M8RH125_WR_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_WR_DQS	/;"	d
MT41J512M8RH125_ZQ_CFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J512M8RH125_ZQ_CFG	/;"	d
MT41J64MJT125_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41J64MJT125_EMIF_SDCFG	/;"	d
MT41K128MJT187E_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_EMIF_READ_LATENCY	/;"	d
MT41K128MJT187E_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_EMIF_SDCFG	/;"	d
MT41K128MJT187E_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_EMIF_SDREF	/;"	d
MT41K128MJT187E_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_EMIF_TIM1	/;"	d
MT41K128MJT187E_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_EMIF_TIM2	/;"	d
MT41K128MJT187E_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_EMIF_TIM3	/;"	d
MT41K128MJT187E_INVERT_CLKOUT	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_INVERT_CLKOUT	/;"	d
MT41K128MJT187E_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_IOCTRL_VALUE	/;"	d
MT41K128MJT187E_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_PHY_FIFO_WE	/;"	d
MT41K128MJT187E_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_PHY_WR_DATA	/;"	d
MT41K128MJT187E_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_RATIO	/;"	d
MT41K128MJT187E_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_RD_DQS	/;"	d
MT41K128MJT187E_WR_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_WR_DQS	/;"	d
MT41K128MJT187E_ZQ_CFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K128MJT187E_ZQ_CFG	/;"	d
MT41K256M16HA125E_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_EMIF_READ_LATENCY	/;"	d
MT41K256M16HA125E_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_EMIF_SDCFG	/;"	d
MT41K256M16HA125E_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_EMIF_SDREF	/;"	d
MT41K256M16HA125E_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_EMIF_TIM1	/;"	d
MT41K256M16HA125E_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_EMIF_TIM2	/;"	d
MT41K256M16HA125E_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_EMIF_TIM3	/;"	d
MT41K256M16HA125E_INVERT_CLKOUT	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_INVERT_CLKOUT	/;"	d
MT41K256M16HA125E_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_IOCTRL_VALUE	/;"	d
MT41K256M16HA125E_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_PHY_FIFO_WE	/;"	d
MT41K256M16HA125E_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_PHY_WR_DATA	/;"	d
MT41K256M16HA125E_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_RATIO	/;"	d
MT41K256M16HA125E_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_RD_DQS	/;"	d
MT41K256M16HA125E_WR_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_WR_DQS	/;"	d
MT41K256M16HA125E_ZQ_CFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT41K256M16HA125E_ZQ_CFG	/;"	d
MT46H64M32_TCKE	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TCKE /;"	d	file:
MT46H64M32_TDAL	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TDAL /;"	d	file:
MT46H64M32_TDPL	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TDPL /;"	d	file:
MT46H64M32_TRAS	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TRAS /;"	d	file:
MT46H64M32_TRC	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TRC /;"	d	file:
MT46H64M32_TRCD	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TRCD /;"	d	file:
MT46H64M32_TRFC	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TRFC /;"	d	file:
MT46H64M32_TRP	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TRP /;"	d	file:
MT46H64M32_TRRD	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TRRD /;"	d	file:
MT46H64M32_TWTR	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TWTR /;"	d	file:
MT46H64M32_TXP	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_TXP /;"	d	file:
MT46H64M32_XSR	board/corscience/tricorder/tricorder.c	/^#define MT46H64M32_XSR /;"	d	file:
MT47H128M16RT25E_EMIF_READ_LATENCY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_EMIF_READ_LATENCY	/;"	d
MT47H128M16RT25E_EMIF_SDCFG	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_EMIF_SDCFG	/;"	d
MT47H128M16RT25E_EMIF_SDREF	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_EMIF_SDREF	/;"	d
MT47H128M16RT25E_EMIF_TIM1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_EMIF_TIM1	/;"	d
MT47H128M16RT25E_EMIF_TIM2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_EMIF_TIM2	/;"	d
MT47H128M16RT25E_EMIF_TIM3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_EMIF_TIM3	/;"	d
MT47H128M16RT25E_IOCTRL_VALUE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_IOCTRL_VALUE	/;"	d
MT47H128M16RT25E_PHY_FIFO_WE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_PHY_FIFO_WE	/;"	d
MT47H128M16RT25E_PHY_WR_DATA	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_PHY_WR_DATA	/;"	d
MT47H128M16RT25E_RATIO	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_RATIO	/;"	d
MT47H128M16RT25E_RD_DQS	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define MT47H128M16RT25E_RD_DQS	/;"	d
MTC0	arch/mips/include/asm/asm.h	/^#define MTC0	/;"	d
MTC_TRANSFER_SIZE	board/intercontrol/digsy_mtc/cmd_mtc.h	/^#define MTC_TRANSFER_SIZE /;"	d
MTD	drivers/mtd/Kconfig	/^config MTD$/;"	c	menu:MTD Support
MTD Support	drivers/mtd/Kconfig	/^menu "MTD Support"$/;"	m
MTDDEBUG	include/linux/mtd/mtd.h	/^#define MTDDEBUG(/;"	d
MTDFILEMODE	include/mtd/mtd-abi.h	/^#define MTDFILEMODE	/;"	d
MTDIDS_DEFAULT	cmd/mtdparts.c	/^#define MTDIDS_DEFAULT /;"	d	file:
MTDIDS_DEFAULT	include/configs/BSC9131RDB.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/BSC9132QDS.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/M54418TWR.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/MPC8313ERDB.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/MPC8315ERDB.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/P1010RDB.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/P1022DS.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/T102xQDS.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/T102xRDB.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/T1040QDS.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/T104xRDB.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/T208xQDS.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/T208xRDB.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/TQM5200.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM823L.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM823M.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM834x.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM850L.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM850M.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM855L.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM855M.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM860L.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM860M.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM862L.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM862M.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/TQM866M.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/a3m071.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/am335x_evm.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/am335x_igep0033.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/am3517_evm.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/am3517_evm.h	/^#define MTDIDS_DEFAULT$/;"	d
MTDIDS_DEFAULT	include/configs/am43xx_evm.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/ap121.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/ap143.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/apf27.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/apx4devkit.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/aria.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/at91sam9n12ek.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/baltos.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/bav335x.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/bk4r1.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/brppt1.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/cm5200.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/cm_fx6.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/cm_t335.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/cm_t35.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/cm_t3517.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/colibri_imx7.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/colibri_t20.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/colibri_vf.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/devkit8000.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/dns325.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/dra7xx_evm.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/eco5pk.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/etamin.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/ethernut5.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/flea3.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/guruplug.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/gw_ventana.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/ids8313.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/imx6qdl_icore.h	/^# define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/ipam390.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/km/km83xx-common.h	/^# define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/km/km_arm.h	/^# define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/km/kmp204x-common.h	/^# define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/km82xx.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/km8360.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/m28evk.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/m53evk.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/mcx.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/microblaze-generic.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/motionpro.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/mpc5121ads.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/mt_ventoux.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/mx28evk.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/mx35pdk.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/nokia_rx51.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/omap3_beagle.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/omap3_logic.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/omap3_overo.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/omap3_pandora.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/omap3_zoom1.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/openrd.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/p1_p2_rdb_pc.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/p1_twr.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/pcm030.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/pcm052.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/pcm058.h	/^#define MTDIDS_DEFAULT /;"	d
MTDIDS_DEFAULT	include/configs/pdm360ng.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/pengwyn.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/platinum.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/pm9261.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/pm9263.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/s5p_goni.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/s5pc210_universal.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/sheevaplug.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/siemens-am33x-common.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/smartweb.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/smdkc100.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/socfpga_common.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/suvd3.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/tam3517-common.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/tao3530.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/ti_armv7_keystone2.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/titanium.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/tricorder.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/vct.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/vf610twr.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/woodburn_common.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/x600.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/xilinx-ppc405-generic.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_DEFAULT	include/configs/xilinx-ppc440-generic.h	/^#define MTDIDS_DEFAULT	/;"	d
MTDIDS_MAXLEN	cmd/mtdparts.c	/^#define MTDIDS_MAXLEN	/;"	d	file:
MTDIDS_NAME_STR	include/configs/etamin.h	/^#define MTDIDS_NAME_STR	/;"	d
MTDIDS_NAME_STR	include/configs/ipam390.h	/^#define MTDIDS_NAME_STR	/;"	d
MTDIDS_NAME_STR	include/configs/siemens-am33x-common.h	/^#define MTDIDS_NAME_STR	/;"	d
MTDIDS_NAME_STR	include/configs/smartweb.h	/^#define MTDIDS_NAME_STR	/;"	d
MTDPARTS_DEFAULT	cmd/mtdparts.c	/^#define MTDPARTS_DEFAULT /;"	d	file:
MTDPARTS_DEFAULT	include/configs/BSC9131RDB.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/BSC9132QDS.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/M54418TWR.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/MPC8313ERDB.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/MPC8315ERDB.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/P1010RDB.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/P1022DS.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/T102xQDS.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/T102xRDB.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/T1040QDS.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/T104xRDB.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/T208xQDS.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/T208xRDB.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/TQM5200.h	/^#   define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM823L.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM823M.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM834x.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM850L.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM850M.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM855L.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM855M.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM860L.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM860M.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM862L.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM862M.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/TQM866M.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/a3m071.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/am335x_evm.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/am335x_igep0033.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/am3517_evm.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/am3517_evm.h	/^#define MTDPARTS_DEFAULT$/;"	d
MTDPARTS_DEFAULT	include/configs/am43xx_evm.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/ap121.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/ap143.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/apf27.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/apx4devkit.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/apx4devkit.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/aria.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/at91sam9n12ek.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/baltos.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/bav335x.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/bav335x.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/bk4r1.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/brppt1.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/cm5200.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/cm_fx6.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/cm_t335.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/cm_t35.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/cm_t3517.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/colibri_imx7.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/colibri_t20.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/colibri_vf.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/devkit8000.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/dns325.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/dra7xx_evm.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/draco.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/eco5pk.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/etamin.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/ethernut5.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/flea3.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/guruplug.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/gw_ventana.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/ids8313.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/imx31_phycore.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/imx6qdl_icore.h	/^# define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/ipam390.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/km/km83xx-common.h	/^# define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/km/km_arm.h	/^# define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/km/kmp204x-common.h	/^# define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/km82xx.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/km8360.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/ls1043a_common.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/ls1046aqds.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/ls1046ardb.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/m28evk.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/m53evk.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/mcx.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/microblaze-generic.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/motionpro.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/mpc5121ads.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/mt_ventoux.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/mx28evk.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/mx35pdk.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/nokia_rx51.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/nokia_rx51.h	/^#define MTDPARTS_DEFAULT$/;"	d
MTDPARTS_DEFAULT	include/configs/omap3_beagle.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/omap3_logic.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/omap3_overo.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/omap3_overo.h	/^#define MTDPARTS_DEFAULT$/;"	d
MTDPARTS_DEFAULT	include/configs/omap3_pandora.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/omap3_pandora.h	/^#define MTDPARTS_DEFAULT$/;"	d
MTDPARTS_DEFAULT	include/configs/omap3_zoom1.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/openrd.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/p1_p2_rdb_pc.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/p1_twr.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/pcm030.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/pcm052.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/pcm058.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/pdm360ng.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/pengwyn.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/platinum.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/pm9261.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/pm9263.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/pxm2.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/rastaban.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/rut.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/s5p_goni.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/s5pc210_universal.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/sheevaplug.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/smartweb.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/smdkc100.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/socfpga_common.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/socfpga_vining_fpga.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/suvd3.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/tam3517-common.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/tao3530.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/thuban.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/ti_armv7_keystone2.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/titanium.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/tricorder.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/usb_a9263.h	/^#define MTDPARTS_DEFAULT /;"	d
MTDPARTS_DEFAULT	include/configs/vct.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/vf610twr.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/woodburn_common.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/x600.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/xilinx-ppc405-generic.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT	include/configs/xilinx-ppc440-generic.h	/^#define MTDPARTS_DEFAULT	/;"	d
MTDPARTS_DEFAULT_V1	include/configs/siemens-am33x-common.h	/^#define MTDPARTS_DEFAULT_V1	/;"	d
MTDPARTS_DEFAULT_V2	include/configs/etamin.h	/^#define MTDPARTS_DEFAULT_V2 /;"	d
MTDPARTS_DEFAULT_V2	include/configs/siemens-am33x-common.h	/^#define MTDPARTS_DEFAULT_V2	/;"	d
MTDPARTS_DEFAULT_V3	include/configs/siemens-am33x-common.h	/^#define MTDPARTS_DEFAULT_V3	/;"	d
MTDPARTS_MAXLEN	cmd/mtdparts.c	/^#define MTDPARTS_MAXLEN	/;"	d	file:
MTDPART_OFS_APPEND	include/linux/mtd/partitions.h	/^#define MTDPART_OFS_APPEND	/;"	d
MTDPART_OFS_NXTBLK	include/linux/mtd/partitions.h	/^#define MTDPART_OFS_NXTBLK	/;"	d
MTDPART_OFS_RETAIN	include/linux/mtd/partitions.h	/^#define MTDPART_OFS_RETAIN	/;"	d
MTDPART_SIZ_FULL	include/linux/mtd/partitions.h	/^#define MTDPART_SIZ_FULL	/;"	d
MTD_ABSENT	include/mtd/mtd-abi.h	/^#define MTD_ABSENT	/;"	d
MTD_BIT_WRITEABLE	include/mtd/mtd-abi.h	/^#define MTD_BIT_WRITEABLE	/;"	d
MTD_CAP_NANDFLASH	include/mtd/mtd-abi.h	/^#define MTD_CAP_NANDFLASH	/;"	d
MTD_CAP_NORFLASH	include/mtd/mtd-abi.h	/^#define MTD_CAP_NORFLASH	/;"	d
MTD_CAP_RAM	include/mtd/mtd-abi.h	/^#define MTD_CAP_RAM	/;"	d
MTD_CAP_ROM	include/mtd/mtd-abi.h	/^#define MTD_CAP_ROM	/;"	d
MTD_CONCAT_H	include/linux/mtd/concat.h	/^#define MTD_CONCAT_H$/;"	d
MTD_DATAFLASH	include/mtd/mtd-abi.h	/^#define MTD_DATAFLASH	/;"	d
MTD_DEBUG_LEVEL0	include/linux/mtd/mtd.h	/^#define MTD_DEBUG_LEVEL0	/;"	d
MTD_DEBUG_LEVEL1	include/linux/mtd/mtd.h	/^#define MTD_DEBUG_LEVEL1	/;"	d
MTD_DEBUG_LEVEL2	include/linux/mtd/mtd.h	/^#define MTD_DEBUG_LEVEL2	/;"	d
MTD_DEBUG_LEVEL3	include/linux/mtd/mtd.h	/^#define MTD_DEBUG_LEVEL3	/;"	d
MTD_DEVT	drivers/mtd/mtdcore.c	/^#define MTD_DEVT(/;"	d	file:
MTD_DEV_TYPE	include/jffs2/load_kernel.h	/^#define MTD_DEV_TYPE(/;"	d
MTD_DEV_TYPE_NAND	include/jffs2/load_kernel.h	/^#define MTD_DEV_TYPE_NAND	/;"	d
MTD_DEV_TYPE_NOR	include/jffs2/load_kernel.h	/^#define MTD_DEV_TYPE_NOR	/;"	d
MTD_DEV_TYPE_ONENAND	include/jffs2/load_kernel.h	/^#define MTD_DEV_TYPE_ONENAND	/;"	d
MTD_ERASE_DONE	include/linux/mtd/mtd.h	/^#define MTD_ERASE_DONE	/;"	d
MTD_ERASE_FAILED	include/linux/mtd/mtd.h	/^#define MTD_ERASE_FAILED	/;"	d
MTD_ERASE_PENDING	include/linux/mtd/mtd.h	/^#define MTD_ERASE_PENDING	/;"	d
MTD_ERASE_SUSPEND	include/linux/mtd/mtd.h	/^#define MTD_ERASE_SUSPEND	/;"	d
MTD_ERASING	include/linux/mtd/mtd.h	/^#define MTD_ERASING	/;"	d
MTD_FAIL_ADDR_UNKNOWN	include/linux/mtd/mtd.h	/^#define MTD_FAIL_ADDR_UNKNOWN /;"	d
MTD_FILE_MODE_NORMAL	include/mtd/mtd-abi.h	/^	MTD_FILE_MODE_NORMAL = MTD_OTP_OFF,$/;"	e	enum:mtd_file_modes
MTD_FILE_MODE_OTP_FACTORY	include/mtd/mtd-abi.h	/^	MTD_FILE_MODE_OTP_FACTORY = MTD_OTP_FACTORY,$/;"	e	enum:mtd_file_modes
MTD_FILE_MODE_OTP_USER	include/mtd/mtd-abi.h	/^	MTD_FILE_MODE_OTP_USER = MTD_OTP_USER,$/;"	e	enum:mtd_file_modes
MTD_FILE_MODE_RAW	include/mtd/mtd-abi.h	/^	MTD_FILE_MODE_RAW,$/;"	e	enum:mtd_file_modes
MTD_MAX_ECCPOS_ENTRIES	include/mtd/mtd-abi.h	/^#define MTD_MAX_ECCPOS_ENTRIES	/;"	d
MTD_MAX_ECCPOS_ENTRIES_LARGE	include/linux/mtd/mtd.h	/^#define MTD_MAX_ECCPOS_ENTRIES_LARGE	/;"	d
MTD_MAX_OOBFREE_ENTRIES	include/mtd/mtd-abi.h	/^#define MTD_MAX_OOBFREE_ENTRIES	/;"	d
MTD_MAX_OOBFREE_ENTRIES_LARGE	include/linux/mtd/mtd.h	/^#define MTD_MAX_OOBFREE_ENTRIES_LARGE	/;"	d
MTD_MLCNANDFLASH	include/mtd/mtd-abi.h	/^#define MTD_MLCNANDFLASH	/;"	d
MTD_NANDECC_AUTOPLACE	include/mtd/mtd-abi.h	/^#define MTD_NANDECC_AUTOPLACE	/;"	d
MTD_NANDECC_AUTOPL_USR	include/mtd/mtd-abi.h	/^#define MTD_NANDECC_AUTOPL_USR /;"	d
MTD_NANDECC_OFF	include/mtd/mtd-abi.h	/^#define MTD_NANDECC_OFF	/;"	d
MTD_NANDECC_PLACE	include/mtd/mtd-abi.h	/^#define MTD_NANDECC_PLACE	/;"	d
MTD_NANDECC_PLACEONLY	include/mtd/mtd-abi.h	/^#define MTD_NANDECC_PLACEONLY	/;"	d
MTD_NANDFLASH	include/mtd/mtd-abi.h	/^#define MTD_NANDFLASH	/;"	d
MTD_NAND_FSL_NFC_SWECC	include/configs/s32v234evb.h	/^#define MTD_NAND_FSL_NFC_SWECC /;"	d
MTD_NORFLASH	include/mtd/mtd-abi.h	/^#define MTD_NORFLASH	/;"	d
MTD_NO_ERASE	include/mtd/mtd-abi.h	/^#define MTD_NO_ERASE	/;"	d
MTD_OPS_AUTO_OOB	include/mtd/mtd-abi.h	/^	MTD_OPS_AUTO_OOB = 1,$/;"	e	enum:__anon53414c400103
MTD_OPS_PLACE_OOB	include/mtd/mtd-abi.h	/^	MTD_OPS_PLACE_OOB = 0,$/;"	e	enum:__anon53414c400103
MTD_OPS_RAW	include/mtd/mtd-abi.h	/^	MTD_OPS_RAW = 2,$/;"	e	enum:__anon53414c400103
MTD_OTP_FACTORY	include/mtd/mtd-abi.h	/^#define MTD_OTP_FACTORY	/;"	d
MTD_OTP_OFF	include/mtd/mtd-abi.h	/^#define MTD_OTP_OFF	/;"	d
MTD_OTP_USER	include/mtd/mtd-abi.h	/^#define MTD_OTP_USER	/;"	d
MTD_PARAM_LEN_MAX	drivers/mtd/ubi/build.c	/^#define MTD_PARAM_LEN_MAX /;"	d	file:
MTD_PARAM_MAX_COUNT	drivers/mtd/ubi/build.c	/^#define MTD_PARAM_MAX_COUNT /;"	d	file:
MTD_PARTITIONS_H	include/linux/mtd/partitions.h	/^#define MTD_PARTITIONS_H$/;"	d
MTD_POWERUP_LOCK	include/mtd/mtd-abi.h	/^#define MTD_POWERUP_LOCK	/;"	d
MTD_RAM	include/mtd/mtd-abi.h	/^#define MTD_RAM	/;"	d
MTD_ROM	include/mtd/mtd-abi.h	/^#define MTD_ROM	/;"	d
MTD_UADDR_0x0555_0x02AA	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_0x0555_0x02AA,$/;"	e	enum:uaddr	file:
MTD_UADDR_0x0555_0x0AAA	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_0x0555_0x0AAA,$/;"	e	enum:uaddr	file:
MTD_UADDR_0x0AAA_0x0555	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_0x0AAA_0x0555,$/;"	e	enum:uaddr	file:
MTD_UADDR_0x5555_0x2AAA	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_0x5555_0x2AAA,$/;"	e	enum:uaddr	file:
MTD_UADDR_DONT_CARE	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_DONT_CARE,		\/* Requires an arbitrary address *\/$/;"	e	enum:uaddr	file:
MTD_UADDR_NOT_SUPPORTED	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_NOT_SUPPORTED = 0,	\/* data width not supported *\/$/;"	e	enum:uaddr	file:
MTD_UADDR_UNNECESSARY	drivers/mtd/jedec_flash.c	/^	MTD_UADDR_UNNECESSARY,		\/* Does not require any address *\/$/;"	e	enum:uaddr	file:
MTD_UBI	drivers/mtd/ubi/Kconfig	/^config MTD_UBI$/;"	c	menu:UBI support
MTD_UBIVOLUME	include/mtd/mtd-abi.h	/^#define MTD_UBIVOLUME	/;"	d
MTD_UBI_BEB_LIMIT	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_BEB_LIMIT$/;"	c	menu:UBI support
MTD_UBI_FASTMAP	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FASTMAP$/;"	c	menu:UBI support
MTD_UBI_FASTMAP_AUTOCONVERT	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FASTMAP_AUTOCONVERT$/;"	c	menu:UBI support
MTD_UBI_FM_DEBUG	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_FM_DEBUG$/;"	c	menu:UBI support
MTD_UBI_WL_THRESHOLD	drivers/mtd/ubi/Kconfig	/^config MTD_UBI_WL_THRESHOLD$/;"	c	menu:UBI support
MTD_WRITEABLE	include/mtd/mtd-abi.h	/^#define MTD_WRITEABLE	/;"	d
MTD_WRITEABLE_CMD	cmd/jffs2.c	/^#define MTD_WRITEABLE_CMD	/;"	d	file:
MTD_WRITEABLE_CMD	cmd/mtdparts.c	/^#define MTD_WRITEABLE_CMD	/;"	d	file:
MTFA_SIZE	lib/bzip2/bzlib_private.h	/^#define MTFA_SIZE /;"	d
MTFL_SIZE	lib/bzip2/bzlib_private.h	/^#define MTFL_SIZE /;"	d
MTFTP_BITMAPSIZE	net/tftp.c	/^#define MTFTP_BITMAPSIZE	/;"	d	file:
MTPS_DEFAULT	drivers/usb/eth/r8152.h	/^#define MTPS_DEFAULT	/;"	d
MTPS_JUMBO	drivers/usb/eth/r8152.h	/^#define MTPS_JUMBO	/;"	d
MTREG	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define MTREG(/;"	d	file:
MTRR_BASE_TYPE_MASK	arch/x86/include/asm/mtrr.h	/^#define MTRR_BASE_TYPE_MASK	/;"	d
MTRR_CAP	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_CAP	/;"	d
MTRR_CAP_FIX	arch/x86/include/asm/mtrr.h	/^#define MTRR_CAP_FIX	/;"	d
MTRR_CAP_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_CAP_MSR	/;"	d
MTRR_CAP_SMRR	arch/x86/include/asm/mtrr.h	/^#define MTRR_CAP_SMRR	/;"	d
MTRR_CAP_VCNT_MASK	arch/x86/include/asm/mtrr.h	/^#define MTRR_CAP_VCNT_MASK	/;"	d
MTRR_CAP_WC	arch/x86/include/asm/mtrr.h	/^#define MTRR_CAP_WC	/;"	d
MTRR_COUNT	arch/x86/include/asm/mtrr.h	/^#define MTRR_COUNT	/;"	d
MTRR_DEF_TYPE	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_DEF_TYPE	/;"	d
MTRR_DEF_TYPE_EN	arch/x86/include/asm/mtrr.h	/^#define MTRR_DEF_TYPE_EN	/;"	d
MTRR_DEF_TYPE_FIX_EN	arch/x86/include/asm/mtrr.h	/^#define MTRR_DEF_TYPE_FIX_EN	/;"	d
MTRR_DEF_TYPE_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_DEF_TYPE_MSR	/;"	d
MTRR_FIX_16K_80000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_16K_80000	/;"	d
MTRR_FIX_16K_80000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_16K_80000_MSR	/;"	d
MTRR_FIX_16K_90000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_16K_90000	/;"	d
MTRR_FIX_16K_A0000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_16K_A0000	/;"	d
MTRR_FIX_16K_A0000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_16K_A0000_MSR	/;"	d
MTRR_FIX_16K_B0000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_16K_B0000	/;"	d
MTRR_FIX_4K_C0000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_C0000	/;"	d
MTRR_FIX_4K_C0000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_C0000_MSR	/;"	d
MTRR_FIX_4K_C4000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_C4000	/;"	d
MTRR_FIX_4K_C8000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_C8000	/;"	d
MTRR_FIX_4K_C8000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_C8000_MSR	/;"	d
MTRR_FIX_4K_CC000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_CC000	/;"	d
MTRR_FIX_4K_D0000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_D0000	/;"	d
MTRR_FIX_4K_D0000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_D0000_MSR	/;"	d
MTRR_FIX_4K_D4000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_D4000	/;"	d
MTRR_FIX_4K_D8000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_D8000	/;"	d
MTRR_FIX_4K_D8000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_D8000_MSR	/;"	d
MTRR_FIX_4K_DC000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_DC000	/;"	d
MTRR_FIX_4K_E0000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_E0000	/;"	d
MTRR_FIX_4K_E0000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_E0000_MSR	/;"	d
MTRR_FIX_4K_E4000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_E4000	/;"	d
MTRR_FIX_4K_E8000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_E8000	/;"	d
MTRR_FIX_4K_E8000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_E8000_MSR	/;"	d
MTRR_FIX_4K_EC000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_EC000	/;"	d
MTRR_FIX_4K_F0000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_F0000	/;"	d
MTRR_FIX_4K_F0000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_F0000_MSR	/;"	d
MTRR_FIX_4K_F4000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_F4000	/;"	d
MTRR_FIX_4K_F8000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_F8000	/;"	d
MTRR_FIX_4K_F8000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_4K_F8000_MSR	/;"	d
MTRR_FIX_4K_FC000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_4K_FC000	/;"	d
MTRR_FIX_64K_00000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_64K_00000	/;"	d
MTRR_FIX_64K_00000_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_64K_00000_MSR	/;"	d
MTRR_FIX_64K_40000	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_FIX_64K_40000	/;"	d
MTRR_FIX_TYPE	arch/x86/include/asm/mtrr.h	/^#define MTRR_FIX_TYPE(/;"	d
MTRR_PHYS_BASE_MSR	arch/x86/cpu/intel_common/car.S	/^#define MTRR_PHYS_BASE_MSR(/;"	d	file:
MTRR_PHYS_BASE_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_PHYS_BASE_MSR(/;"	d
MTRR_PHYS_MASK_MSR	arch/x86/cpu/intel_common/car.S	/^#define MTRR_PHYS_MASK_MSR(/;"	d	file:
MTRR_PHYS_MASK_MSR	arch/x86/include/asm/mtrr.h	/^#define MTRR_PHYS_MASK_MSR(/;"	d
MTRR_PHYS_MASK_VALID	arch/x86/include/asm/mtrr.h	/^#define MTRR_PHYS_MASK_VALID	/;"	d
MTRR_SMRR_PHYBASE	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_SMRR_PHYBASE	/;"	d
MTRR_SMRR_PHYMASK	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_SMRR_PHYMASK	/;"	d
MTRR_TYPE_COUNT	arch/x86/include/asm/mtrr.h	/^#define MTRR_TYPE_COUNT	/;"	d
MTRR_TYPE_UNCACHEABLE	arch/x86/include/asm/mtrr.h	/^#define MTRR_TYPE_UNCACHEABLE	/;"	d
MTRR_TYPE_WRBACK	arch/x86/include/asm/mtrr.h	/^#define MTRR_TYPE_WRBACK	/;"	d
MTRR_TYPE_WRCOMB	arch/x86/include/asm/mtrr.h	/^#define MTRR_TYPE_WRCOMB	/;"	d
MTRR_TYPE_WRPROT	arch/x86/include/asm/mtrr.h	/^#define MTRR_TYPE_WRPROT	/;"	d
MTRR_TYPE_WRTHROUGH	arch/x86/include/asm/mtrr.h	/^#define MTRR_TYPE_WRTHROUGH	/;"	d
MTRR_VAR_ESRAM	arch/x86/include/asm/arch-quark/quark.h	/^	MTRR_VAR_ESRAM,$/;"	e	enum:__anon142bd7a20103
MTRR_VAR_PHYBASE	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_VAR_PHYBASE(/;"	d
MTRR_VAR_PHYMASK	arch/x86/include/asm/arch-quark/quark.h	/^#define MTRR_VAR_PHYMASK(/;"	d
MTRR_VAR_RAM	arch/x86/include/asm/arch-quark/quark.h	/^	MTRR_VAR_RAM$/;"	e	enum:__anon142bd7a20103
MTRR_VAR_ROM	arch/x86/include/asm/arch-quark/quark.h	/^	MTRR_VAR_ROM,$/;"	e	enum:__anon142bd7a20103
MTS	arch/microblaze/include/asm/asm.h	/^#define MTS(/;"	d
MTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,$/;"	e	enum:__anona3077f190103	file:
MTSx_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MTSx_A_MARK,$/;"	e	enum:__anona307945e0103	file:
MTSx_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	MTSx_B_MARK,$/;"	e	enum:__anona307945e0103	file:
MTU	drivers/net/mvneta.c	/^#define MTU	/;"	d	file:
MTU	drivers/net/mvpp2.c	/^#define MTU	/;"	d	file:
MT_DEVICE_GRE	arch/arm/include/asm/armv8/mmu.h	/^#define MT_DEVICE_GRE	/;"	d
MT_DEVICE_MEM	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define MT_DEVICE_MEM	/;"	d	file:
MT_DEVICE_NGNRE	arch/arm/include/asm/armv8/mmu.h	/^#define MT_DEVICE_NGNRE	/;"	d
MT_DEVICE_NGNRNE	arch/arm/include/asm/armv8/mmu.h	/^#define MT_DEVICE_NGNRNE	/;"	d
MT_ID_28F400_B	include/flash.h	/^#define MT_ID_28F400_B	/;"	d
MT_ID_28F400_T	include/flash.h	/^#define MT_ID_28F400_T	/;"	d
MT_MAIR0	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define MT_MAIR0	/;"	d	file:
MT_MAIR1	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define MT_MAIR1	/;"	d	file:
MT_MANUFACT	include/flash.h	/^#define MT_MANUFACT	/;"	d
MT_NORMAL	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define MT_NORMAL	/;"	d	file:
MT_NORMAL	arch/arm/include/asm/armv8/mmu.h	/^#define MT_NORMAL	/;"	d
MT_NORMAL_NC	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define MT_NORMAL_NC	/;"	d	file:
MT_NORMAL_NC	arch/arm/include/asm/armv8/mmu.h	/^#define MT_NORMAL_NC	/;"	d
MT_STRONLY_ORDER	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define MT_STRONLY_ORDER	/;"	d	file:
MUCPU_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MUCPU_IPS_BASE_ADDR /;"	d
MUDSP_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MUDSP_IPS_BASE_ADDR /;"	d
MUIC_NUM_OF_REGS	include/power/max77693_muic.h	/^	MUIC_NUM_OF_REGS	= 0x0F,$/;"	e	enum:__anon0170642d0103
MUIC_NUM_OF_REGS	include/power/max8997_muic.h	/^	MUIC_NUM_OF_REGS = 0x0F,$/;"	e	enum:__anonc3f8b93e0103
MUIC_PATH_AP	include/power/max77693_muic.h	/^#define MUIC_PATH_AP	/;"	d
MUIC_PATH_CP	include/power/max77693_muic.h	/^#define MUIC_PATH_CP	/;"	d
MUIC_PATH_UART	include/power/max77693_muic.h	/^#define MUIC_PATH_UART	/;"	d
MUIC_PATH_UART_AP	include/power/max77693_muic.h	/^	MUIC_PATH_UART_AP,$/;"	e	enum:muic_path
MUIC_PATH_UART_CP	include/power/max77693_muic.h	/^	MUIC_PATH_UART_CP,$/;"	e	enum:muic_path
MUIC_PATH_USB	include/power/max77693_muic.h	/^#define MUIC_PATH_USB	/;"	d
MUIC_PATH_USB_AP	include/power/max77693_muic.h	/^	MUIC_PATH_USB_AP,$/;"	e	enum:muic_path
MUIC_PATH_USB_CP	include/power/max77693_muic.h	/^	MUIC_PATH_USB_CP,$/;"	e	enum:muic_path
MULDIV64	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define MULDIV64(/;"	d	file:
MULDIV64	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define MULDIV64(/;"	d	file:
MULTICAST_ID	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define MULTICAST_ID	/;"	d
MULTIPLANE_ADDRESS_RESTRICT	drivers/mtd/nand/denali.h	/^#define MULTIPLANE_ADDRESS_RESTRICT /;"	d
MULTIPLANE_ADDR_RESTRICT	drivers/mtd/nand/denali.h	/^#define MULTIPLANE_ADDR_RESTRICT	/;"	d
MULTIPLANE_ADDR_RESTRICT__FLAG	drivers/mtd/nand/denali.h	/^#define     MULTIPLANE_ADDR_RESTRICT__FLAG	/;"	d
MULTIPLANE_OPERATION	drivers/mtd/nand/denali.h	/^#define MULTIPLANE_OPERATION	/;"	d
MULTIPLANE_OPERATION_SUPPORT	drivers/mtd/nand/denali.h	/^#define MULTIPLANE_OPERATION_SUPPORT /;"	d
MULTIPLANE_OPERATION__FLAG	drivers/mtd/nand/denali.h	/^#define     MULTIPLANE_OPERATION__FLAG	/;"	d
MULTIPLANE_READ_ENABLE	drivers/mtd/nand/denali.h	/^#define MULTIPLANE_READ_ENABLE	/;"	d
MULTIPLANE_READ_ENABLE__FLAG	drivers/mtd/nand/denali.h	/^#define     MULTIPLANE_READ_ENABLE__FLAG	/;"	d
MULTIPLY_FACTOR_XS_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define MULTIPLY_FACTOR_XS_MASK	/;"	d
MULTIPLY_FACTOR_XS_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define MULTIPLY_FACTOR_XS_SHIFT	/;"	d
MULTI_DONE_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define            MULTI_DONE_INT /;"	d
MULTI_DONE_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define           MULTI_DONE_MASK /;"	d
MULTI_HASH	common/hash.c	/^#define MULTI_HASH$/;"	d	file:
MULTI_PURPOSE_SOCKET_ADDR	include/configs/MIP405.h	/^#define MULTI_PURPOSE_SOCKET_ADDR /;"	d
MULTI_PURPOSE_SOCKET_ADDR	include/configs/PIP405.h	/^#define MULTI_PURPOSE_SOCKET_ADDR /;"	d
MULTI_PURPOSE_SOCKET_ADDR	include/configs/VCMA9.h	/^#define MULTI_PURPOSE_SOCKET_ADDR	/;"	d
MULTI_START	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               MULTI_START /;"	d
MULTI_TERM_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define            MULTI_TERM_INT /;"	d
MULTI_TERM_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define           MULTI_TERM_MASK /;"	d
MULTI_XFER_ON	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define             MULTI_XFER_ON /;"	d
MULT_1	arch/arm/include/asm/arch-tegra/pmc.h	/^#define MULT_1	/;"	d
MULT_16	arch/arm/include/asm/arch-tegra/pmc.h	/^#define MULT_16	/;"	d
MULT_2	arch/arm/include/asm/arch-tegra/pmc.h	/^#define MULT_2	/;"	d
MULT_4	arch/arm/include/asm/arch-tegra/pmc.h	/^#define MULT_4	/;"	d
MULT_8	arch/arm/include/asm/arch-tegra/pmc.h	/^#define MULT_8	/;"	d
MUM	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MUM	/;"	d
MUSB_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define MUSB_BASE	/;"	d
MUSB_BASE	arch/arm/include/asm/arch-omap4/cpu.h	/^#define MUSB_BASE	/;"	d
MUSB_BASE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define MUSB_BASE	/;"	d
MUSB_BULK_EP	drivers/usb/musb/blackfin_usb.h	/^#define MUSB_BULK_EP /;"	d
MUSB_BULK_EP	drivers/usb/musb/musb_hcd.h	/^# define MUSB_BULK_EP /;"	d
MUSB_BUSCTL_OFFSET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_BUSCTL_OFFSET(/;"	d
MUSB_CONFIGDATA	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA	/;"	d
MUSB_CONFIGDATA_BIGENDIAN	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_BIGENDIAN	/;"	d
MUSB_CONFIGDATA_BIGENDIAN	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_BIGENDIAN	/;"	d
MUSB_CONFIGDATA_DYNFIFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_DYNFIFO	/;"	d
MUSB_CONFIGDATA_DYNFIFO	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_DYNFIFO	/;"	d
MUSB_CONFIGDATA_HBRXE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_HBRXE	/;"	d
MUSB_CONFIGDATA_HBRXE	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_HBRXE	/;"	d
MUSB_CONFIGDATA_HBTXE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_HBTXE	/;"	d
MUSB_CONFIGDATA_HBTXE	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_HBTXE	/;"	d
MUSB_CONFIGDATA_MPRXE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_MPRXE	/;"	d
MUSB_CONFIGDATA_MPRXE	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_MPRXE	/;"	d
MUSB_CONFIGDATA_MPTXE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_MPTXE	/;"	d
MUSB_CONFIGDATA_MPTXE	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_MPTXE	/;"	d
MUSB_CONFIGDATA_SOFTCONE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_SOFTCONE	/;"	d
MUSB_CONFIGDATA_SOFTCONE	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_SOFTCONE	/;"	d
MUSB_CONFIGDATA_UTMIDW	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CONFIGDATA_UTMIDW	/;"	d
MUSB_CONFIGDATA_UTMIDW	drivers/usb/musb/musb_core.h	/^#define MUSB_CONFIGDATA_UTMIDW	/;"	d
MUSB_CONFIG_PROC_FS	drivers/usb/musb-new/musb_core.h	/^#define MUSB_CONFIG_PROC_FS$/;"	d
MUSB_CONTROLLER_HDRC	drivers/usb/musb-new/musb_core.c	/^enum { MUSB_CONTROLLER_MHDRC, MUSB_CONTROLLER_HDRC, };$/;"	e	enum:__anon05a0f6b90103	file:
MUSB_CONTROLLER_MHDRC	drivers/usb/musb-new/musb_core.c	/^enum { MUSB_CONTROLLER_MHDRC, MUSB_CONTROLLER_HDRC, };$/;"	e	enum:__anon05a0f6b90103	file:
MUSB_CONTROL_EP	drivers/usb/musb/musb_hcd.h	/^#define MUSB_CONTROL_EP /;"	d
MUSB_COUNT0	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_COUNT0	/;"	d
MUSB_CSR0	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0	/;"	d
MUSB_CSR0_FLUSHFIFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_FLUSHFIFO	/;"	d
MUSB_CSR0_FLUSHFIFO	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_FLUSHFIFO	/;"	d
MUSB_CSR0_H_DATATOGGLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_DATATOGGLE	/;"	d
MUSB_CSR0_H_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_DATATOGGLE	/;"	d
MUSB_CSR0_H_DIS_PING	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_DIS_PING	/;"	d
MUSB_CSR0_H_DIS_PING	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_DIS_PING	/;"	d
MUSB_CSR0_H_ERROR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_ERROR	/;"	d
MUSB_CSR0_H_ERROR	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_ERROR	/;"	d
MUSB_CSR0_H_NAKTIMEOUT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_NAKTIMEOUT	/;"	d
MUSB_CSR0_H_NAKTIMEOUT	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_NAKTIMEOUT	/;"	d
MUSB_CSR0_H_REQPKT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_REQPKT	/;"	d
MUSB_CSR0_H_REQPKT	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_REQPKT	/;"	d
MUSB_CSR0_H_RXSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_RXSTALL	/;"	d
MUSB_CSR0_H_RXSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_RXSTALL	/;"	d
MUSB_CSR0_H_SETUPPKT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_SETUPPKT	/;"	d
MUSB_CSR0_H_SETUPPKT	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_SETUPPKT	/;"	d
MUSB_CSR0_H_STATUSPKT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_STATUSPKT	/;"	d
MUSB_CSR0_H_STATUSPKT	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_STATUSPKT	/;"	d
MUSB_CSR0_H_WR_DATATOGGLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_WR_DATATOGGLE	/;"	d
MUSB_CSR0_H_WR_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_WR_DATATOGGLE	/;"	d
MUSB_CSR0_H_WZC_BITS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_H_WZC_BITS	/;"	d
MUSB_CSR0_H_WZC_BITS	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_H_WZC_BITS	/;"	d
MUSB_CSR0_P_DATAEND	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_DATAEND	/;"	d
MUSB_CSR0_P_DATAEND	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_DATAEND	/;"	d
MUSB_CSR0_P_SENDSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_SENDSTALL	/;"	d
MUSB_CSR0_P_SENDSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_SENDSTALL	/;"	d
MUSB_CSR0_P_SENTSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_SENTSTALL	/;"	d
MUSB_CSR0_P_SENTSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_SENTSTALL	/;"	d
MUSB_CSR0_P_SETUPEND	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_SETUPEND	/;"	d
MUSB_CSR0_P_SETUPEND	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_SETUPEND	/;"	d
MUSB_CSR0_P_SVDRXPKTRDY	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_SVDRXPKTRDY	/;"	d
MUSB_CSR0_P_SVDRXPKTRDY	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_SVDRXPKTRDY	/;"	d
MUSB_CSR0_P_SVDSETUPEND	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_SVDSETUPEND	/;"	d
MUSB_CSR0_P_SVDSETUPEND	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_SVDSETUPEND	/;"	d
MUSB_CSR0_P_WZC_BITS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_P_WZC_BITS	/;"	d
MUSB_CSR0_P_WZC_BITS	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_P_WZC_BITS	/;"	d
MUSB_CSR0_RXPKTRDY	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_RXPKTRDY	/;"	d
MUSB_CSR0_RXPKTRDY	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_RXPKTRDY	/;"	d
MUSB_CSR0_TXPKTRDY	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_CSR0_TXPKTRDY	/;"	d
MUSB_CSR0_TXPKTRDY	drivers/usb/musb/musb_core.h	/^#define MUSB_CSR0_TXPKTRDY	/;"	d
MUSB_C_NUM_EPS	drivers/usb/musb-new/musb_core.h	/^#define MUSB_C_NUM_EPS /;"	d
MUSB_DEVCTL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL	/;"	d
MUSB_DEVCTL_BDEVICE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_BDEVICE	/;"	d
MUSB_DEVCTL_BDEVICE	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_BDEVICE	/;"	d
MUSB_DEVCTL_FSDEV	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_FSDEV	/;"	d
MUSB_DEVCTL_FSDEV	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_FSDEV	/;"	d
MUSB_DEVCTL_HM	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_HM	/;"	d
MUSB_DEVCTL_HM	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_HM	/;"	d
MUSB_DEVCTL_HR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_HR	/;"	d
MUSB_DEVCTL_HR	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_HR	/;"	d
MUSB_DEVCTL_LSDEV	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_LSDEV	/;"	d
MUSB_DEVCTL_LSDEV	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_LSDEV	/;"	d
MUSB_DEVCTL_SESSION	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_SESSION	/;"	d
MUSB_DEVCTL_SESSION	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_SESSION	/;"	d
MUSB_DEVCTL_VBUS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_VBUS	/;"	d
MUSB_DEVCTL_VBUS	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_VBUS	/;"	d
MUSB_DEVCTL_VBUS_SHIFT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_DEVCTL_VBUS_SHIFT	/;"	d
MUSB_DEVCTL_VBUS_SHIFT	drivers/usb/musb/musb_core.h	/^#define MUSB_DEVCTL_VBUS_SHIFT	/;"	d
MUSB_DEV_MODE	drivers/usb/musb-new/musb_core.h	/^#define MUSB_DEV_MODE(/;"	d
MUSB_DEV_PM_OPS	drivers/usb/musb-new/musb_core.c	/^#define	MUSB_DEV_PM_OPS	/;"	d	file:
MUSB_DEV_PM_OPS	drivers/usb/musb-new/musb_core.c	/^#define MUSB_DEV_PM_OPS /;"	d	file:
MUSB_DMA_STATUS_BUSY	drivers/usb/musb-new/musb_dma.h	/^	MUSB_DMA_STATUS_BUSY,$/;"	e	enum:dma_channel_status
MUSB_DMA_STATUS_BUS_ABORT	drivers/usb/musb-new/musb_dma.h	/^	MUSB_DMA_STATUS_BUS_ABORT,$/;"	e	enum:dma_channel_status
MUSB_DMA_STATUS_CORE_ABORT	drivers/usb/musb-new/musb_dma.h	/^	MUSB_DMA_STATUS_CORE_ABORT$/;"	e	enum:dma_channel_status
MUSB_DMA_STATUS_FREE	drivers/usb/musb-new/musb_dma.h	/^	MUSB_DMA_STATUS_FREE,$/;"	e	enum:dma_channel_status
MUSB_DMA_STATUS_UNKNOWN	drivers/usb/musb-new/musb_dma.h	/^	MUSB_DMA_STATUS_UNKNOWN,$/;"	e	enum:dma_channel_status
MUSB_DRIVER_NAME	drivers/usb/musb-new/musb_core.c	/^#define MUSB_DRIVER_NAME /;"	d	file:
MUSB_EP0_FIFOSIZE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_EP0_FIFOSIZE	/;"	d
MUSB_EP0_FIFOSIZE	drivers/usb/musb/musb_core.h	/^#define MUSB_EP0_FIFOSIZE	/;"	d
MUSB_EP0_IDLE	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_IDLE,$/;"	e	enum:musb_h_ep0_state
MUSB_EP0_IN	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_IN,			\/* expect IN DATA *\/$/;"	e	enum:musb_h_ep0_state
MUSB_EP0_OUT	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_OUT,			\/* expect ack of OUT DATA *\/$/;"	e	enum:musb_h_ep0_state
MUSB_EP0_STAGE_ACKWAIT	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_ACKWAIT,		\/* after zlp, before statusin *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_STAGE_IDLE	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_IDLE,		\/* idle, waiting for SETUP *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_STAGE_RX	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_RX,		\/* OUT data *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_STAGE_SETUP	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_SETUP,		\/* received SETUP *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_STAGE_STATUSIN	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_STATUSIN,	\/* (after OUT data) *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_STAGE_STATUSOUT	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_STATUSOUT,	\/* (after IN data) *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_STAGE_TX	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STAGE_TX,		\/* IN data *\/$/;"	e	enum:musb_g_ep0_state
MUSB_EP0_START	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_START,			\/* expect ack of setup *\/$/;"	e	enum:musb_h_ep0_state
MUSB_EP0_STATUS	drivers/usb/musb-new/musb_core.h	/^	MUSB_EP0_STATUS,		\/* expect ack of STATUS *\/$/;"	e	enum:musb_h_ep0_state
MUSB_EPINFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_EPINFO	/;"	d
MUSB_EP_FIFO	include/linux/usb/musb.h	/^#define MUSB_EP_FIFO(/;"	d
MUSB_EP_FIFO_DOUBLE	include/linux/usb/musb.h	/^#define MUSB_EP_FIFO_DOUBLE(/;"	d
MUSB_EP_FIFO_SINGLE	include/linux/usb/musb.h	/^#define MUSB_EP_FIFO_SINGLE(/;"	d
MUSB_EP_OFFSET	drivers/usb/musb-new/musb_core.h	/^#define	MUSB_EP_OFFSET	/;"	d
MUSB_FADDR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FADDR	/;"	d
MUSB_FIFOSIZE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FIFOSIZE	/;"	d
MUSB_FIFOSZ_DPB	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FIFOSZ_DPB	/;"	d
MUSB_FIFOSZ_DPB	drivers/usb/musb/musb_core.h	/^#define MUSB_FIFOSZ_DPB	/;"	d
MUSB_FIFOSZ_SIZE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FIFOSZ_SIZE	/;"	d
MUSB_FIFOSZ_SIZE	drivers/usb/musb/musb_core.h	/^#define MUSB_FIFOSZ_SIZE	/;"	d
MUSB_FIFO_OFFSET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FIFO_OFFSET(/;"	d
MUSB_FLAGS_PRINT	drivers/usb/musb/musb_debug.h	/^#define MUSB_FLAGS_PRINT(/;"	d
MUSB_FLAT_OFFSET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FLAT_OFFSET(/;"	d
MUSB_FLAT_REG	drivers/usb/musb-new/musb_core.h	/^#define	MUSB_FLAT_REG$/;"	d
MUSB_FRAME	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FRAME	/;"	d
MUSB_FS_EOF1	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_FS_EOF1	/;"	d
MUSB_HOST	include/linux/usb/musb.h	/^	MUSB_HOST,		\/* A or Mini-A connector *\/$/;"	e	enum:musb_mode
MUSB_HST_MODE	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HST_MODE(/;"	d
MUSB_HS_EOF1	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_HS_EOF1	/;"	d
MUSB_HUBADDR_MULTI_TT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_HUBADDR_MULTI_TT	/;"	d
MUSB_HUBADDR_MULTI_TT	drivers/usb/musb/musb_core.h	/^#define MUSB_HUBADDR_MULTI_TT	/;"	d
MUSB_HWVERS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_HWVERS	/;"	d
MUSB_HWVERS_1300	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_1300	/;"	d
MUSB_HWVERS_1400	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_1400	/;"	d
MUSB_HWVERS_1800	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_1800	/;"	d
MUSB_HWVERS_1900	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_1900	/;"	d
MUSB_HWVERS_2000	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_2000	/;"	d
MUSB_HWVERS_MAJOR	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_MAJOR(/;"	d
MUSB_HWVERS_MINOR	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_MINOR(/;"	d
MUSB_HWVERS_RC	drivers/usb/musb-new/musb_core.h	/^#define MUSB_HWVERS_RC	/;"	d
MUSB_INDEX	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INDEX	/;"	d
MUSB_INDEXED_OFFSET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INDEXED_OFFSET(/;"	d
MUSB_INTERFACE_ULPI	arch/arm/include/asm/omap_musb.h	/^enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};$/;"	e	enum:musb_interface
MUSB_INTERFACE_UTMI	arch/arm/include/asm/omap_musb.h	/^enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};$/;"	e	enum:musb_interface
MUSB_INTRRX	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTRRX	/;"	d
MUSB_INTRRXE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTRRXE	/;"	d
MUSB_INTRTX	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTRTX	/;"	d
MUSB_INTRTXE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTRTXE	/;"	d
MUSB_INTRUSB	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTRUSB	/;"	d
MUSB_INTRUSBE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTRUSBE	/;"	d
MUSB_INTR_BABBLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_BABBLE	/;"	d
MUSB_INTR_BABBLE	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_BABBLE	/;"	d
MUSB_INTR_CONNECT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_CONNECT	/;"	d
MUSB_INTR_CONNECT	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_CONNECT	/;"	d
MUSB_INTR_DISCONNECT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_DISCONNECT	/;"	d
MUSB_INTR_DISCONNECT	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_DISCONNECT	/;"	d
MUSB_INTR_EP	drivers/usb/musb/musb_hcd.h	/^#define MUSB_INTR_EP /;"	d
MUSB_INTR_RESET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_RESET	/;"	d
MUSB_INTR_RESET	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_RESET	/;"	d
MUSB_INTR_RESUME	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_RESUME	/;"	d
MUSB_INTR_RESUME	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_RESUME	/;"	d
MUSB_INTR_SESSREQ	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_SESSREQ	/;"	d
MUSB_INTR_SESSREQ	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_SESSREQ	/;"	d
MUSB_INTR_SOF	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_SOF	/;"	d
MUSB_INTR_SOF	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_SOF	/;"	d
MUSB_INTR_SUSPEND	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_SUSPEND	/;"	d
MUSB_INTR_SUSPEND	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_SUSPEND	/;"	d
MUSB_INTR_VBUSERROR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_INTR_VBUSERROR	/;"	d
MUSB_INTR_VBUSERROR	drivers/usb/musb/musb_core.h	/^#define MUSB_INTR_VBUSERROR	/;"	d
MUSB_LINKINFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_LINKINFO	/;"	d
MUSB_LS_EOF1	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_LS_EOF1	/;"	d
MUSB_MAPPED	drivers/usb/musb-new/musb_gadget.h	/^	MUSB_MAPPED$/;"	e	enum:buffer_map_state
MUSB_MAX_END0_PACKET	drivers/usb/musb-new/musb_core.h	/^#define MUSB_MAX_END0_PACKET /;"	d
MUSB_MODE	drivers/usb/musb-new/musb_core.h	/^#define MUSB_MODE(/;"	d
MUSB_NAKLIMIT0	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_NAKLIMIT0	/;"	d
MUSB_NO_DYNAMIC_FIFO	drivers/usb/musb/blackfin_usb.h	/^#define MUSB_NO_DYNAMIC_FIFO$/;"	d
MUSB_NO_MULTIPOINT	drivers/usb/musb/blackfin_usb.h	/^#define MUSB_NO_MULTIPOINT$/;"	d
MUSB_OTG	include/linux/usb/musb.h	/^	MUSB_OTG		\/* Mini-AB connector *\/$/;"	e	enum:musb_mode
MUSB_PERIPHERAL	include/linux/usb/musb.h	/^	MUSB_PERIPHERAL,	\/* B or Mini-B connector *\/$/;"	e	enum:musb_mode
MUSB_PORT_STAT_RESUME	drivers/usb/musb-new/musb_core.h	/^#define MUSB_PORT_STAT_RESUME	/;"	d
MUSB_POWER	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER	/;"	d
MUSB_POWER_ENSUSPEND	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_ENSUSPEND	/;"	d
MUSB_POWER_ENSUSPEND	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_ENSUSPEND	/;"	d
MUSB_POWER_HSENAB	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_HSENAB	/;"	d
MUSB_POWER_HSENAB	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_HSENAB	/;"	d
MUSB_POWER_HSMODE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_HSMODE	/;"	d
MUSB_POWER_HSMODE	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_HSMODE	/;"	d
MUSB_POWER_HSMODE_SHIFT	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_HSMODE_SHIFT	/;"	d
MUSB_POWER_ISOUPDATE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_ISOUPDATE	/;"	d
MUSB_POWER_ISOUPDATE	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_ISOUPDATE	/;"	d
MUSB_POWER_RESET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_RESET	/;"	d
MUSB_POWER_RESET	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_RESET	/;"	d
MUSB_POWER_RESUME	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_RESUME	/;"	d
MUSB_POWER_RESUME	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_RESUME	/;"	d
MUSB_POWER_SOFTCONN	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_SOFTCONN	/;"	d
MUSB_POWER_SOFTCONN	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_SOFTCONN	/;"	d
MUSB_POWER_SUSPENDM	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_POWER_SUSPENDM	/;"	d
MUSB_POWER_SUSPENDM	drivers/usb/musb/musb_core.h	/^#define MUSB_POWER_SUSPENDM	/;"	d
MUSB_RAMINFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RAMINFO	/;"	d
MUSB_RXCOUNT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCOUNT	/;"	d
MUSB_RXCSR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR	/;"	d
MUSB_RXCSR_AUTOCLEAR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_AUTOCLEAR	/;"	d
MUSB_RXCSR_AUTOCLEAR	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_AUTOCLEAR	/;"	d
MUSB_RXCSR_CLRDATATOG	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_CLRDATATOG	/;"	d
MUSB_RXCSR_CLRDATATOG	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_CLRDATATOG	/;"	d
MUSB_RXCSR_DATAERROR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_DATAERROR	/;"	d
MUSB_RXCSR_DATAERROR	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_DATAERROR	/;"	d
MUSB_RXCSR_DISNYET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_DISNYET	/;"	d
MUSB_RXCSR_DISNYET	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_DISNYET	/;"	d
MUSB_RXCSR_DMAENAB	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_DMAENAB	/;"	d
MUSB_RXCSR_DMAENAB	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_DMAENAB	/;"	d
MUSB_RXCSR_DMAMODE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_DMAMODE	/;"	d
MUSB_RXCSR_DMAMODE	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_DMAMODE	/;"	d
MUSB_RXCSR_FIFOFULL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_FIFOFULL	/;"	d
MUSB_RXCSR_FIFOFULL	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_FIFOFULL	/;"	d
MUSB_RXCSR_FLUSHFIFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_FLUSHFIFO	/;"	d
MUSB_RXCSR_FLUSHFIFO	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_FLUSHFIFO	/;"	d
MUSB_RXCSR_H_AUTOREQ	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_AUTOREQ	/;"	d
MUSB_RXCSR_H_AUTOREQ	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_AUTOREQ	/;"	d
MUSB_RXCSR_H_DATATOGGLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_DATATOGGLE	/;"	d
MUSB_RXCSR_H_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_DATATOGGLE	/;"	d
MUSB_RXCSR_H_ERROR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_ERROR	/;"	d
MUSB_RXCSR_H_ERROR	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_ERROR	/;"	d
MUSB_RXCSR_H_REQPKT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_REQPKT	/;"	d
MUSB_RXCSR_H_REQPKT	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_REQPKT	/;"	d
MUSB_RXCSR_H_RXSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_RXSTALL	/;"	d
MUSB_RXCSR_H_RXSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_RXSTALL	/;"	d
MUSB_RXCSR_H_WR_DATATOGGLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_WR_DATATOGGLE	/;"	d
MUSB_RXCSR_H_WR_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_WR_DATATOGGLE	/;"	d
MUSB_RXCSR_H_WZC_BITS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_H_WZC_BITS	/;"	d
MUSB_RXCSR_H_WZC_BITS	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_H_WZC_BITS	/;"	d
MUSB_RXCSR_INCOMPRX	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_INCOMPRX	/;"	d
MUSB_RXCSR_INCOMPRX	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_INCOMPRX	/;"	d
MUSB_RXCSR_PID_ERR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_PID_ERR	/;"	d
MUSB_RXCSR_PID_ERR	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_PID_ERR	/;"	d
MUSB_RXCSR_P_ISO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_P_ISO	/;"	d
MUSB_RXCSR_P_ISO	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_P_ISO	/;"	d
MUSB_RXCSR_P_OVERRUN	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_P_OVERRUN	/;"	d
MUSB_RXCSR_P_OVERRUN	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_P_OVERRUN	/;"	d
MUSB_RXCSR_P_SENDSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_P_SENDSTALL	/;"	d
MUSB_RXCSR_P_SENDSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_P_SENDSTALL	/;"	d
MUSB_RXCSR_P_SENTSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_P_SENTSTALL	/;"	d
MUSB_RXCSR_P_SENTSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_P_SENTSTALL	/;"	d
MUSB_RXCSR_P_WZC_BITS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_P_WZC_BITS	/;"	d
MUSB_RXCSR_P_WZC_BITS	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_P_WZC_BITS	/;"	d
MUSB_RXCSR_RXPKTRDY	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXCSR_RXPKTRDY	/;"	d
MUSB_RXCSR_RXPKTRDY	drivers/usb/musb/musb_core.h	/^#define MUSB_RXCSR_RXPKTRDY	/;"	d
MUSB_RXFIFOADD	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXFIFOADD	/;"	d
MUSB_RXFIFOSZ	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXFIFOSZ	/;"	d
MUSB_RXFUNCADDR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXFUNCADDR	/;"	d
MUSB_RXHUBADDR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXHUBADDR	/;"	d
MUSB_RXHUBPORT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXHUBPORT	/;"	d
MUSB_RXINTERVAL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXINTERVAL	/;"	d
MUSB_RXMAXP	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXMAXP	/;"	d
MUSB_RXTYPE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_RXTYPE	/;"	d
MUSB_SOFTRST	drivers/usb/musb-new/pic32.c	/^#define MUSB_SOFTRST	/;"	d	file:
MUSB_SOFTRST_NRST	drivers/usb/musb-new/pic32.c	/^#define  MUSB_SOFTRST_NRST	/;"	d	file:
MUSB_SOFTRST_NRSTX	drivers/usb/musb-new/pic32.c	/^#define  MUSB_SOFTRST_NRSTX	/;"	d	file:
MUSB_S_RXCSR_H_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_S_RXCSR_H_DATATOGGLE	/;"	d
MUSB_TESTMODE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TESTMODE	/;"	d
MUSB_TEST_FIFO_ACCESS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_FIFO_ACCESS	/;"	d
MUSB_TEST_FIFO_ACCESS	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_FIFO_ACCESS	/;"	d
MUSB_TEST_FORCE_FS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_FORCE_FS	/;"	d
MUSB_TEST_FORCE_FS	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_FORCE_FS	/;"	d
MUSB_TEST_FORCE_HOST	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_FORCE_HOST	/;"	d
MUSB_TEST_FORCE_HOST	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_FORCE_HOST	/;"	d
MUSB_TEST_FORCE_HS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_FORCE_HS	/;"	d
MUSB_TEST_FORCE_HS	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_FORCE_HS	/;"	d
MUSB_TEST_J	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_J	/;"	d
MUSB_TEST_J	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_J	/;"	d
MUSB_TEST_K	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_K	/;"	d
MUSB_TEST_K	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_K	/;"	d
MUSB_TEST_PACKET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_PACKET	/;"	d
MUSB_TEST_PACKET	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_PACKET	/;"	d
MUSB_TEST_SE0_NAK	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TEST_SE0_NAK	/;"	d
MUSB_TEST_SE0_NAK	drivers/usb/musb/musb_core.h	/^#define MUSB_TEST_SE0_NAK	/;"	d
MUSB_TUSB_OFFSET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TUSB_OFFSET(/;"	d
MUSB_TXCOUNT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCOUNT	/;"	d
MUSB_TXCSR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR	/;"	d
MUSB_TXCSR_AUTOSET	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_AUTOSET	/;"	d
MUSB_TXCSR_AUTOSET	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_AUTOSET	/;"	d
MUSB_TXCSR_CLRDATATOG	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_CLRDATATOG	/;"	d
MUSB_TXCSR_CLRDATATOG	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_CLRDATATOG	/;"	d
MUSB_TXCSR_DMAENAB	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_DMAENAB	/;"	d
MUSB_TXCSR_DMAENAB	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_DMAENAB	/;"	d
MUSB_TXCSR_DMAMODE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_DMAMODE	/;"	d
MUSB_TXCSR_DMAMODE	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_DMAMODE	/;"	d
MUSB_TXCSR_FIFONOTEMPTY	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_FIFONOTEMPTY	/;"	d
MUSB_TXCSR_FIFONOTEMPTY	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_FIFONOTEMPTY	/;"	d
MUSB_TXCSR_FLUSHFIFO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_FLUSHFIFO	/;"	d
MUSB_TXCSR_FLUSHFIFO	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_FLUSHFIFO	/;"	d
MUSB_TXCSR_FRCDATATOG	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_FRCDATATOG	/;"	d
MUSB_TXCSR_FRCDATATOG	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_FRCDATATOG	/;"	d
MUSB_TXCSR_H_DATATOGGLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_H_DATATOGGLE	/;"	d
MUSB_TXCSR_H_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_DATATOGGLE	/;"	d
MUSB_TXCSR_H_DATATOGGLE_SHIFT	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_DATATOGGLE_SHIFT	/;"	d
MUSB_TXCSR_H_ERROR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_H_ERROR	/;"	d
MUSB_TXCSR_H_ERROR	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_ERROR	/;"	d
MUSB_TXCSR_H_NAKTIMEOUT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_H_NAKTIMEOUT	/;"	d
MUSB_TXCSR_H_NAKTIMEOUT	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_NAKTIMEOUT	/;"	d
MUSB_TXCSR_H_RXSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_H_RXSTALL	/;"	d
MUSB_TXCSR_H_RXSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_RXSTALL	/;"	d
MUSB_TXCSR_H_WR_DATATOGGLE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_H_WR_DATATOGGLE	/;"	d
MUSB_TXCSR_H_WR_DATATOGGLE	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_WR_DATATOGGLE	/;"	d
MUSB_TXCSR_H_WZC_BITS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_H_WZC_BITS	/;"	d
MUSB_TXCSR_H_WZC_BITS	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_H_WZC_BITS	/;"	d
MUSB_TXCSR_MODE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_MODE	/;"	d
MUSB_TXCSR_MODE	drivers/usb/musb/musb_core.h	/^# define MUSB_TXCSR_MODE /;"	d
MUSB_TXCSR_MODE	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_MODE	/;"	d
MUSB_TXCSR_P_INCOMPTX	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_P_INCOMPTX	/;"	d
MUSB_TXCSR_P_INCOMPTX	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_P_INCOMPTX	/;"	d
MUSB_TXCSR_P_ISO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_P_ISO	/;"	d
MUSB_TXCSR_P_ISO	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_P_ISO	/;"	d
MUSB_TXCSR_P_SENDSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_P_SENDSTALL	/;"	d
MUSB_TXCSR_P_SENDSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_P_SENDSTALL	/;"	d
MUSB_TXCSR_P_SENTSTALL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_P_SENTSTALL	/;"	d
MUSB_TXCSR_P_SENTSTALL	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_P_SENTSTALL	/;"	d
MUSB_TXCSR_P_UNDERRUN	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_P_UNDERRUN	/;"	d
MUSB_TXCSR_P_UNDERRUN	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_P_UNDERRUN	/;"	d
MUSB_TXCSR_P_WZC_BITS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_P_WZC_BITS	/;"	d
MUSB_TXCSR_P_WZC_BITS	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_P_WZC_BITS	/;"	d
MUSB_TXCSR_TXPKTRDY	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXCSR_TXPKTRDY	/;"	d
MUSB_TXCSR_TXPKTRDY	drivers/usb/musb/musb_core.h	/^#define MUSB_TXCSR_TXPKTRDY	/;"	d
MUSB_TXFIFOADD	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXFIFOADD	/;"	d
MUSB_TXFIFOSZ	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXFIFOSZ	/;"	d
MUSB_TXFUNCADDR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXFUNCADDR	/;"	d
MUSB_TXHUBADDR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXHUBADDR	/;"	d
MUSB_TXHUBPORT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXHUBPORT	/;"	d
MUSB_TXINTERVAL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXINTERVAL	/;"	d
MUSB_TXMAXP	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXMAXP	/;"	d
MUSB_TXTYPE	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TXTYPE	/;"	d
MUSB_TYPE0	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TYPE0	/;"	d
MUSB_TYPE_PROTO	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TYPE_PROTO	/;"	d
MUSB_TYPE_PROTO	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_PROTO	/;"	d
MUSB_TYPE_PROTO_BULK	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_PROTO_BULK /;"	d
MUSB_TYPE_PROTO_INTR	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_PROTO_INTR /;"	d
MUSB_TYPE_PROTO_SHIFT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TYPE_PROTO_SHIFT	/;"	d
MUSB_TYPE_PROTO_SHIFT	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_PROTO_SHIFT	/;"	d
MUSB_TYPE_REMOTE_END	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TYPE_REMOTE_END	/;"	d
MUSB_TYPE_REMOTE_END	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_REMOTE_END	/;"	d
MUSB_TYPE_SPEED	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TYPE_SPEED	/;"	d
MUSB_TYPE_SPEED	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_SPEED	/;"	d
MUSB_TYPE_SPEED_FULL	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_SPEED_FULL /;"	d
MUSB_TYPE_SPEED_HIGH	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_SPEED_HIGH /;"	d
MUSB_TYPE_SPEED_LOW	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_SPEED_LOW	/;"	d
MUSB_TYPE_SPEED_SHIFT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_TYPE_SPEED_SHIFT	/;"	d
MUSB_TYPE_SPEED_SHIFT	drivers/usb/musb/musb_core.h	/^#define MUSB_TYPE_SPEED_SHIFT	/;"	d
MUSB_ULPI_BUSCONTROL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_BUSCONTROL	/;"	d
MUSB_ULPI_INT_MASK	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_INT_MASK	/;"	d
MUSB_ULPI_INT_SRC	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_INT_SRC	/;"	d
MUSB_ULPI_RAW_DATA	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_RAW_DATA	/;"	d
MUSB_ULPI_RDN_WR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_RDN_WR	/;"	d
MUSB_ULPI_REG_ADDR	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_REG_ADDR	/;"	d
MUSB_ULPI_REG_CMPLT	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_REG_CMPLT	/;"	d
MUSB_ULPI_REG_CONTROL	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_REG_CONTROL	/;"	d
MUSB_ULPI_REG_DATA	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_REG_DATA	/;"	d
MUSB_ULPI_REG_REQ	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_REG_REQ	/;"	d
MUSB_ULPI_USE_EXTVBUS	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_USE_EXTVBUS	/;"	d
MUSB_ULPI_USE_EXTVBUSIND	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_ULPI_USE_EXTVBUSIND /;"	d
MUSB_UNDEFINED	include/linux/usb/musb.h	/^	MUSB_UNDEFINED = 0,$/;"	e	enum:musb_mode
MUSB_VERSION	drivers/usb/musb-new/musb_core.c	/^#define MUSB_VERSION /;"	d	file:
MUSB_VPLEN	drivers/usb/musb-new/musb_regs.h	/^#define MUSB_VPLEN	/;"	d
MUX16_BYP	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MUX16_BYP	/;"	d
MUXADDDATA	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define MUXADDDATA /;"	d
MUXCTL_ATA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_ATA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_ATB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_ATB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_ATC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_ATC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_ATD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_ATD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_ATE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_ATE,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_CDEV1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_CDEV1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_CDEV2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_CDEV2,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_CRTP	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_CRTP,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_CSUS	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_CSUS,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DAP1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DAP1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DAP2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DAP2,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DAP3	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DAP3,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DAP4	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DAP4,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DDC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DDC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DTA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DTA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DTB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DTB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DTC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DTC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DTD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DTD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DTE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DTE,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_DTF	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_DTF,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GMA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GMA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GMB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GMB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GMC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GMC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GMD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GMD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GME	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GME,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GPU	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GPU,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GPU7	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GPU7,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_GPV	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_GPV,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_HDINT	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_HDINT,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_I2CP	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_I2CP,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_IRRX	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_IRRX,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_IRTX	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_IRTX,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_KBCA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_KBCA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_KBCB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_KBCB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_KBCC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_KBCC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_KBCD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_KBCD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_KBCE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_KBCE,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_KBCF	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_KBCF,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LCSN	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LCSN,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD0	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD0,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD10	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD10,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD11	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD11,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD12	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD12,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD13	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD13,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD14	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD14,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD15	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD15,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD16	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD16,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD17	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD17,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD2,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD3	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD3,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD4	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD4,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD5	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD5,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD6	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD6,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD7	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD7,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD8	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD8,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LD9	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LD9,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LDC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LDC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LDI	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LDI,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LHP0	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LHP0,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LHP1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LHP1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LHP2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LHP2,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LHS	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LHS,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LM0	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LM0,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LM1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LM1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LPP	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LPP,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LPW0	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LPW0,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LPW1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LPW1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LPW2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LPW2,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LSC0	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LSC0,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LSC1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LSC1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LSCK	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LSCK,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LSDA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LSDA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LSDI	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LSDI,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LSPI	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LSPI,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LVP0	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LVP0,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LVP1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LVP1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_LVS	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_LVS,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_NONE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_NONE = -1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_OWC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_OWC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_PMC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_PMC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_PTA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_PTA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_RESERVED102	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_RESERVED102,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_RESERVED108	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_RESERVED108,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_RESERVED28	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_RESERVED28,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_RESERVED5	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_RESERVED5,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_RESERVED9	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_RESERVED9,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_RM	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_RM,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SDB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SDB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SDC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SDC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SDD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SDD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SDMMC1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SDMMC1,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SLXA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SLXA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SLXC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SLXC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SLXD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SLXD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SLXK	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SLXK,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPDI	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPDI,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPDO	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPDO,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPID	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPID,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIE,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIF	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIF,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIG	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIG,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_SPIH	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_SPIH,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UAA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UAA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UAB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UAB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UAC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UAC,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UAD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UAD,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UCA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UCA,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UCB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UCB,$/;"	e	enum:pmux_ctlid	file:
MUXCTL_UDA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	MUXCTL_UDA,$/;"	e	enum:pmux_ctlid	file:
MUX_ACLK_100_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_100_SEL_SCLKAPLL	/;"	d
MUX_ACLK_100_SEL_SCLKAPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_100_SEL_SCLKAPLL	/;"	d
MUX_ACLK_100_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_100_SEL_SCLKMPLL	/;"	d
MUX_ACLK_100_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_100_SEL_SCLKMPLL	/;"	d
MUX_ACLK_133_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_133_SEL_SCLKAPLL	/;"	d
MUX_ACLK_133_SEL_SCLKAPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_133_SEL_SCLKAPLL	/;"	d
MUX_ACLK_133_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_133_SEL_SCLKMPLL	/;"	d
MUX_ACLK_133_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_133_SEL_SCLKMPLL	/;"	d
MUX_ACLK_160_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_160_SEL_SCLKAPLL	/;"	d
MUX_ACLK_160_SEL_SCLKAPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_160_SEL_SCLKAPLL	/;"	d
MUX_ACLK_160_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_160_SEL_SCLKMPLL	/;"	d
MUX_ACLK_160_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_160_SEL_SCLKMPLL	/;"	d
MUX_ACLK_166_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_166_SEL	/;"	d
MUX_ACLK_200_DISP1_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_200_DISP1_SUB_SEL /;"	d
MUX_ACLK_200_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_200_SEL	/;"	d
MUX_ACLK_200_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_200_SEL_SCLKAPLL	/;"	d
MUX_ACLK_200_SEL_SCLKAPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_200_SEL_SCLKAPLL	/;"	d
MUX_ACLK_200_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ACLK_200_SEL_SCLKMPLL	/;"	d
MUX_ACLK_200_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MUX_ACLK_200_SEL_SCLKMPLL	/;"	d
MUX_ACLK_266_GPS_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_266_GPS_SUB_SEL /;"	d
MUX_ACLK_266_GSCL_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_266_GSCL_SUB_SEL /;"	d
MUX_ACLK_266_ISP_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_266_ISP_SUB_SEL /;"	d
MUX_ACLK_300_DISP1_MID1_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_DISP1_MID1_SEL /;"	d
MUX_ACLK_300_DISP1_MID_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_DISP1_MID_SEL /;"	d
MUX_ACLK_300_DISP1_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_DISP1_SEL	/;"	d
MUX_ACLK_300_DISP1_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_DISP1_SUB_SEL /;"	d
MUX_ACLK_300_GSCL_MID1_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_GSCL_MID1_SEL /;"	d
MUX_ACLK_300_GSCL_MID_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_GSCL_MID_SEL /;"	d
MUX_ACLK_300_GSCL_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_GSCL_SEL /;"	d
MUX_ACLK_300_GSCL_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_300_GSCL_SUB_SEL /;"	d
MUX_ACLK_333_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_333_SEL	/;"	d
MUX_ACLK_333_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_333_SUB_SEL /;"	d
MUX_ACLK_400_G3D_MID_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_400_G3D_MID_SEL /;"	d
MUX_ACLK_400_G3D_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_400_G3D_SEL /;"	d
MUX_ACLK_400_IOP_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_400_IOP_SEL /;"	d
MUX_ACLK_400_ISP_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_400_ISP_SEL /;"	d
MUX_ACLK_400_SUB_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_400_SUB_SEL /;"	d
MUX_ACLK_MIPI_HSI_TXBASE_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_ACLK_MIPI_HSI_TXBASE_SEL /;"	d
MUX_ALTO35	board/overo/overo.h	/^#define MUX_ALTO35(/;"	d
MUX_AM3517CRANE	board/ti/am3517crane/am3517crane.h	/^#define MUX_AM3517CRANE(/;"	d
MUX_AM3517EVM	board/logicpd/am3517evm/am3517evm.h	/^#define MUX_AM3517EVM(/;"	d
MUX_APLL_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_APLL_SEL /;"	d
MUX_APLL_SEL	board/samsung/odroid/setup.h	/^#define MUX_APLL_SEL(/;"	d
MUX_APLL_SEL_FILPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_APLL_SEL_FILPLL	/;"	d
MUX_APLL_SEL_FILPLL	board/samsung/trats/setup.h	/^#define MUX_APLL_SEL_FILPLL	/;"	d
MUX_APLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_APLL_SEL_MASK	/;"	d
MUX_APLL_SEL_MOUTMPLLFOUT	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_APLL_SEL_MOUTMPLLFOUT	/;"	d
MUX_APLL_SEL_MOUTMPLLFOUT	board/samsung/trats/setup.h	/^#define MUX_APLL_SEL_MOUTMPLLFOUT	/;"	d
MUX_ARBOR43C	board/overo/overo.h	/^#define MUX_ARBOR43C(/;"	d
MUX_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define MUX_BASE	/;"	d
MUX_BBTOYS_WIFI	board/ti/beagle/beagle.h	/^#define MUX_BBTOYS_WIFI(/;"	d
MUX_BEAGLE	board/ti/beagle/beagle.h	/^#define MUX_BEAGLE(/;"	d
MUX_BEAGLE_C	board/ti/beagle/beagle.h	/^#define MUX_BEAGLE_C(/;"	d
MUX_BEAGLE_XM	board/ti/beagle/beagle.h	/^#define MUX_BEAGLE_XM(/;"	d
MUX_BPLL_SEL_FOUTBPLL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_BPLL_SEL_FOUTBPLL /;"	d
MUX_BPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_BPLL_SEL_MASK	/;"	d
MUX_BPLL_USER_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_BPLL_USER_SEL /;"	d
MUX_C2C_SEL	board/samsung/odroid/setup.h	/^#define MUX_C2C_SEL(/;"	d
MUX_CAIRO	board/quipos/cairo/cairo.h	/^#define MUX_CAIRO(/;"	d
MUX_CFG	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define MUX_CFG(/;"	d
MUX_CFG	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define MUX_CFG(/;"	d
MUX_CFG	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define MUX_CFG(/;"	d
MUX_CFG	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define MUX_CFG(/;"	d
MUX_CFG	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define MUX_CFG(/;"	d
MUX_CLKO_DDR_MODE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_CLKO_DDR_MODE		= 1 << 31,$/;"	e	enum:iomux_gp_func
MUX_CONFIG_BOOTMODE_PAD	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^#define	MUX_CONFIG_BOOTMODE_PAD	/;"	d	file:
MUX_CONFIG_EMI	board/bluegiga/apx4devkit/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/creative/xfi3/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/freescale/mx23evk/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/freescale/mx28evk/iomux.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/olimex/mx23_olinuxino/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/ppcag/bg0900/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/sandisk/sansa_fuze_plus/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_EMI	board/schulercontrol/sc_sps_1/spl_boot.c	/^#define	MUX_CONFIG_EMI	/;"	d	file:
MUX_CONFIG_ENET	board/bluegiga/apx4devkit/spl_boot.c	/^#define	MUX_CONFIG_ENET	/;"	d	file:
MUX_CONFIG_ENET	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_ENET	/;"	d	file:
MUX_CONFIG_ENET	board/freescale/mx28evk/iomux.c	/^#define	MUX_CONFIG_ENET	/;"	d	file:
MUX_CONFIG_ENET	board/ppcag/bg0900/spl_boot.c	/^#define	MUX_CONFIG_ENET	/;"	d	file:
MUX_CONFIG_ENET	board/schulercontrol/sc_sps_1/spl_boot.c	/^#define	MUX_CONFIG_ENET	/;"	d	file:
MUX_CONFIG_GPMI	board/bluegiga/apx4devkit/spl_boot.c	/^#define	MUX_CONFIG_GPMI	/;"	d	file:
MUX_CONFIG_GPMI	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_GPMI	/;"	d	file:
MUX_CONFIG_GPMI	board/freescale/mx28evk/iomux.c	/^#define	MUX_CONFIG_GPMI	/;"	d	file:
MUX_CONFIG_GPMI	board/ppcag/bg0900/spl_boot.c	/^#define	MUX_CONFIG_GPMI	/;"	d	file:
MUX_CONFIG_LCD	board/creative/xfi3/spl_boot.c	/^#define	MUX_CONFIG_LCD	/;"	d	file:
MUX_CONFIG_LCD	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_LCD	/;"	d	file:
MUX_CONFIG_LCD	board/freescale/mx23evk/spl_boot.c	/^#define	MUX_CONFIG_LCD	/;"	d	file:
MUX_CONFIG_LCD	board/freescale/mx28evk/iomux.c	/^#define	MUX_CONFIG_LCD	/;"	d	file:
MUX_CONFIG_LCD	board/sandisk/sansa_fuze_plus/sfp.c	/^#define	MUX_CONFIG_LCD	/;"	d	file:
MUX_CONFIG_LCD	board/sandisk/sansa_fuze_plus/spl_boot.c	/^#define	MUX_CONFIG_LCD	/;"	d	file:
MUX_CONFIG_LED	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_LED	/;"	d	file:
MUX_CONFIG_LED	board/schulercontrol/sc_sps_1/spl_boot.c	/^#define	MUX_CONFIG_LED	/;"	d	file:
MUX_CONFIG_SSP	board/creative/xfi3/spl_boot.c	/^#define	MUX_CONFIG_SSP	/;"	d	file:
MUX_CONFIG_SSP	board/olimex/mx23_olinuxino/spl_boot.c	/^#define	MUX_CONFIG_SSP	/;"	d	file:
MUX_CONFIG_SSP	board/sandisk/sansa_fuze_plus/spl_boot.c	/^#define	MUX_CONFIG_SSP	/;"	d	file:
MUX_CONFIG_SSP0	board/bluegiga/apx4devkit/spl_boot.c	/^#define	MUX_CONFIG_SSP0	/;"	d	file:
MUX_CONFIG_SSP0	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_SSP0	/;"	d	file:
MUX_CONFIG_SSP0	board/freescale/mx28evk/iomux.c	/^#define	MUX_CONFIG_SSP0	/;"	d	file:
MUX_CONFIG_SSP0	board/schulercontrol/sc_sps_1/spl_boot.c	/^#define	MUX_CONFIG_SSP0	/;"	d	file:
MUX_CONFIG_SSP1	board/freescale/mx23evk/spl_boot.c	/^#define	MUX_CONFIG_SSP1	/;"	d	file:
MUX_CONFIG_SSP2	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_SSP2	/;"	d	file:
MUX_CONFIG_SSP2	board/freescale/mx28evk/iomux.c	/^#define	MUX_CONFIG_SSP2	/;"	d	file:
MUX_CONFIG_SSP2	board/ppcag/bg0900/spl_boot.c	/^#define	MUX_CONFIG_SSP2	/;"	d	file:
MUX_CONFIG_SSP2	board/schulercontrol/sc_sps_1/spl_boot.c	/^#define	MUX_CONFIG_SSP2	/;"	d	file:
MUX_CONFIG_TSC	board/denx/m28evk/spl_boot.c	/^#define	MUX_CONFIG_TSC	/;"	d	file:
MUX_CORE_SEL	board/samsung/odroid/setup.h	/^#define MUX_CORE_SEL(/;"	d
MUX_CORE_SEL_MOUTAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_CORE_SEL_MOUTAPLL	/;"	d
MUX_CORE_SEL_MOUTAPLL	board/samsung/trats/setup.h	/^#define MUX_CORE_SEL_MOUTAPLL	/;"	d
MUX_CORE_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_CORE_SEL_SCLKMPLL	/;"	d
MUX_CORE_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MUX_CORE_SEL_SCLKMPLL	/;"	d
MUX_CPLD_CAN_UART	board/freescale/p1010rdb/p1010rdb.c	/^#define MUX_CPLD_CAN_UART	/;"	d	file:
MUX_CPLD_SPICS0_FLASH	board/freescale/p1010rdb/p1010rdb.c	/^#define MUX_CPLD_SPICS0_FLASH	/;"	d	file:
MUX_CPLD_SPICS0_SLIC	board/freescale/p1010rdb/p1010rdb.c	/^#define MUX_CPLD_SPICS0_SLIC	/;"	d	file:
MUX_CPLD_TDM	board/freescale/p1010rdb/p1010rdb.c	/^#define MUX_CPLD_TDM	/;"	d	file:
MUX_CPLL_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_CPLL_SEL /;"	d
MUX_CPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_CPLL_SEL_MASK	/;"	d
MUX_CPU_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_CPU_SEL /;"	d
MUX_CSPI1_MISO__CSPI1_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_MISO__CSPI1_MISO /;"	d
MUX_CSPI1_MOSI__CSPI1_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_MOSI__CSPI1_MOSI /;"	d
MUX_CSPI1_SCLK__CSPI1_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_SCLK__CSPI1_CLK /;"	d
MUX_CSPI1_SPI_RDY__CSPI1_DATAREADY_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_SPI_RDY__CSPI1_DATAREADY_B /;"	d
MUX_CSPI1_SS0__CSPI1_SS0_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_SS0__CSPI1_SS0_B /;"	d
MUX_CSPI1_SS1__CSPI1_SS1_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_SS1__CSPI1_SS1_B /;"	d
MUX_CSPI1_SS2__CSPI1_SS2_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI1_SS2__CSPI1_SS2_B /;"	d
MUX_CSPI1_UART3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_CSPI1_UART3			= 1 << 14,$/;"	e	enum:iomux_gp_func
MUX_CSPI2_MISO__CSPI2_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_MISO__CSPI2_MISO /;"	d
MUX_CSPI2_MISO__I2C2_SDA	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_MISO__I2C2_SDA /;"	d
MUX_CSPI2_MOSI__CSPI2_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_MOSI__CSPI2_MOSI /;"	d
MUX_CSPI2_MOSI__I2C2_SCL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_MOSI__I2C2_SCL /;"	d
MUX_CSPI2_SCLK__CSPI2_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_SCLK__CSPI2_CLK /;"	d
MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B /;"	d
MUX_CSPI2_SS0__CSPI2_SS0_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_SS0__CSPI2_SS0_B /;"	d
MUX_CSPI2_SS1__CSPI2_SS1_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_SS1__CSPI2_SS1_B /;"	d
MUX_CSPI2_SS2__CSPI2_SS2_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CSPI2_SS2__CSPI2_SS2_B /;"	d
MUX_CSPI3_UART5_SEL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_CSPI3_UART5_SEL		= 1 << 25,$/;"	e	enum:iomux_gp_func
MUX_CTL_ALT1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_ALT1	/;"	d
MUX_CTL_ALT2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_ALT2	/;"	d
MUX_CTL_CAPTURE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CAPTURE	/;"	d
MUX_CTL_COMPARE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_COMPARE	/;"	d
MUX_CTL_CSPI1_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_MISO	/;"	d
MUX_CTL_CSPI1_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_MOSI	/;"	d
MUX_CTL_CSPI1_SCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_SCLK	/;"	d
MUX_CTL_CSPI1_SPI_RDY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_SPI_RDY	/;"	d
MUX_CTL_CSPI1_SS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_SS0	/;"	d
MUX_CTL_CSPI1_SS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_SS1	/;"	d
MUX_CTL_CSPI1_SS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI1_SS2	/;"	d
MUX_CTL_CSPI2_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_MISO	/;"	d
MUX_CTL_CSPI2_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_MOSI	/;"	d
MUX_CTL_CSPI2_SCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_SCLK	/;"	d
MUX_CTL_CSPI2_SPI_RDY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_SPI_RDY	/;"	d
MUX_CTL_CSPI2_SS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_SS0	/;"	d
MUX_CTL_CSPI2_SS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_SS1	/;"	d
MUX_CTL_CSPI2_SS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI2_SS2	/;"	d
MUX_CTL_CSPI3_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI3_MISO	/;"	d
MUX_CTL_CSPI3_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI3_MOSI	/;"	d
MUX_CTL_CSPI3_SCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI3_SCLK	/;"	d
MUX_CTL_CSPI3_SPI_RDY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CSPI3_SPI_RDY	/;"	d
MUX_CTL_CTS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CTS1	/;"	d
MUX_CTL_CTS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_CTS2	/;"	d
MUX_CTL_DSR_DCE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_DSR_DCE1	/;"	d
MUX_CTL_DTR_DCE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_DTR_DCE1	/;"	d
MUX_CTL_FUNC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_FUNC	/;"	d
MUX_CTL_GPIO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_GPIO	/;"	d
MUX_CTL_IN_ALT1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_IN_ALT1	/;"	d
MUX_CTL_IN_ALT2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_IN_ALT2	/;"	d
MUX_CTL_IN_FUNC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_IN_FUNC	/;"	d
MUX_CTL_IN_GPIO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_IN_GPIO	/;"	d
MUX_CTL_IN_NONE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_IN_NONE	/;"	d
MUX_CTL_NFC_ALE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_ALE	/;"	d
MUX_CTL_NFC_CE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_CE	/;"	d
MUX_CTL_NFC_CLE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_CLE	/;"	d
MUX_CTL_NFC_RB	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_RB	/;"	d
MUX_CTL_NFC_RE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_RE	/;"	d
MUX_CTL_NFC_WE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_WE	/;"	d
MUX_CTL_NFC_WP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_NFC_WP	/;"	d
MUX_CTL_OUT_ALT1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_ALT1	/;"	d
MUX_CTL_OUT_ALT2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_ALT2	/;"	d
MUX_CTL_OUT_ALT3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_ALT3	/;"	d
MUX_CTL_OUT_ALT4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_ALT4	/;"	d
MUX_CTL_OUT_ALT5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_ALT5	/;"	d
MUX_CTL_OUT_ALT6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_ALT6	/;"	d
MUX_CTL_OUT_FUNC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_FUNC	/;"	d
MUX_CTL_OUT_GPIO_DR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_OUT_GPIO_DR	/;"	d
MUX_CTL_RTS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_RTS1	/;"	d
MUX_CTL_RTS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_RTS2	/;"	d
MUX_CTL_RXD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_RXD1	/;"	d
MUX_CTL_RXD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_RXD2	/;"	d
MUX_CTL_SCK3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SCK3	/;"	d
MUX_CTL_SCK6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SCK6	/;"	d
MUX_CTL_SD1_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SD1_CLK	/;"	d
MUX_CTL_SD1_CMD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SD1_CMD	/;"	d
MUX_CTL_SD1_DATA0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SD1_DATA0	/;"	d
MUX_CTL_SD1_DATA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SD1_DATA1	/;"	d
MUX_CTL_SD1_DATA2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SD1_DATA2	/;"	d
MUX_CTL_SD1_DATA3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SD1_DATA3	/;"	d
MUX_CTL_SFS3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SFS3	/;"	d
MUX_CTL_SFS6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SFS6	/;"	d
MUX_CTL_SRXD3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SRXD3	/;"	d
MUX_CTL_SRXD6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_SRXD6	/;"	d
MUX_CTL_STXD3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_STXD3	/;"	d
MUX_CTL_STXD6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_STXD6	/;"	d
MUX_CTL_TXD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_TXD1	/;"	d
MUX_CTL_TXD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_TXD2	/;"	d
MUX_CTL_USBH2_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_USBH2_CLK	/;"	d
MUX_CTL_USBH2_DATA0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_USBH2_DATA0	/;"	d
MUX_CTL_USBH2_DATA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_USBH2_DATA1	/;"	d
MUX_CTL_USBH2_DIR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_USBH2_DIR	/;"	d
MUX_CTL_USBH2_NXT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_USBH2_NXT	/;"	d
MUX_CTL_USBH2_STP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTL_USBH2_STP	/;"	d
MUX_CTRL_OFS_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_CTRL_OFS_MASK	/;"	d
MUX_CTRL_OFS_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_CTRL_OFS_SHIFT	/;"	d
MUX_CTS1__UART1_CTS_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTS1__UART1_CTS_B	/;"	d
MUX_CTS2__UART2_CTS_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_CTS2__UART2_CTS_B	/;"	d
MUX_DDR_MODE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_DDR_MODE			= 1 << 1,$/;"	e	enum:iomux_gp_func
MUX_DEFAULT	board/isee/igep00x0/igep00x0.h	/^#define MUX_DEFAULT(/;"	d
MUX_DEVKIT8000	board/timll/devkit8000/devkit8000.h	/^#define MUX_DEVKIT8000(/;"	d
MUX_DIV_1	arch/arm/mach-exynos/include/mach/pwm.h	/^#define MUX_DIV_1	/;"	d
MUX_DIV_1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define MUX_DIV_1	/;"	d
MUX_DIV_16	arch/arm/mach-exynos/include/mach/pwm.h	/^#define MUX_DIV_16	/;"	d
MUX_DIV_16	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define MUX_DIV_16	/;"	d
MUX_DIV_2	arch/arm/mach-exynos/include/mach/pwm.h	/^#define MUX_DIV_2	/;"	d
MUX_DIV_2	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define MUX_DIV_2	/;"	d
MUX_DIV_4	arch/arm/mach-exynos/include/mach/pwm.h	/^#define MUX_DIV_4	/;"	d
MUX_DIV_4	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define MUX_DIV_4	/;"	d
MUX_DIV_8	arch/arm/mach-exynos/include/mach/pwm.h	/^#define MUX_DIV_8	/;"	d
MUX_DIV_8	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define MUX_DIV_8	/;"	d
MUX_DIV_SHIFT	arch/arm/mach-exynos/include/mach/pwm.h	/^#define MUX_DIV_SHIFT(/;"	d
MUX_DIV_SHIFT	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define MUX_DIV_SHIFT(/;"	d
MUX_DMC_BUS_SEL	board/samsung/odroid/setup.h	/^#define MUX_DMC_BUS_SEL(/;"	d
MUX_DMC_BUS_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_DMC_BUS_SEL_SCLKAPLL	/;"	d
MUX_DMC_BUS_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_DMC_BUS_SEL_SCLKMPLL	/;"	d
MUX_DPHY_SEL	board/samsung/odroid/setup.h	/^#define MUX_DPHY_SEL(/;"	d
MUX_DPHY_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_DPHY_SEL_SCLKAPLL	/;"	d
MUX_DPHY_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_DPHY_SEL_SCLKMPLL	/;"	d
MUX_ECO5_PK	board/8dtech/eco5pk/eco5pk.h	/^#define MUX_ECO5_PK(/;"	d
MUX_EPLL_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_EPLL_SEL /;"	d
MUX_EPLL_SEL_FINPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_EPLL_SEL_FINPLL	/;"	d
MUX_EPLL_SEL_FINPLL	board/samsung/trats/setup.h	/^#define MUX_EPLL_SEL_FINPLL	/;"	d
MUX_EPLL_SEL_FOUTEPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_EPLL_SEL_FOUTEPLL	/;"	d
MUX_EPLL_SEL_FOUTEPLL	board/samsung/trats/setup.h	/^#define MUX_EPLL_SEL_FOUTEPLL	/;"	d
MUX_EPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_EPLL_SEL_MASK	/;"	d
MUX_EVM	board/ti/evm/evm.h	/^#define MUX_EVM(/;"	d
MUX_EXTDMAREQ2_MBX_SEL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_EXTDMAREQ2_MBX_SEL		= 1 << 15,$/;"	e	enum:iomux_gp_func
MUX_G2D_ACP0_SEL	board/samsung/odroid/setup.h	/^#define MUX_G2D_ACP0_SEL(/;"	d
MUX_G2D_ACP1_SEL	board/samsung/odroid/setup.h	/^#define MUX_G2D_ACP1_SEL(/;"	d
MUX_G2D_ACP_SEL	board/samsung/odroid/setup.h	/^#define MUX_G2D_ACP_SEL(/;"	d
MUX_GDL_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_GDL_SEL_SCLKAPLL	/;"	d
MUX_GDL_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_GDL_SEL_SCLKMPLL	/;"	d
MUX_GDR_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_GDR_SEL_SCLKAPLL	/;"	d
MUX_GDR_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_GDR_SEL_SCLKMPLL	/;"	d
MUX_GPLL_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_GPLL_SEL /;"	d
MUX_GPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_GPLL_SEL_MASK	/;"	d
MUX_GUMSTIX	board/overo/overo.h	/^#define MUX_GUMSTIX(/;"	d
MUX_HPM_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_HPM_SEL /;"	d
MUX_HPM_SEL	board/samsung/odroid/setup.h	/^#define MUX_HPM_SEL(/;"	d
MUX_HPM_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_HPM_SEL_MASK	/;"	d
MUX_HPM_SEL_MOUTAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_HPM_SEL_MOUTAPLL	/;"	d
MUX_HPM_SEL_MOUTAPLL	board/samsung/trats/setup.h	/^#define MUX_HPM_SEL_MOUTAPLL	/;"	d
MUX_HPM_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_HPM_SEL_SCLKMPLL	/;"	d
MUX_HPM_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define MUX_HPM_SEL_SCLKMPLL	/;"	d
MUX_IGEP0020	board/isee/igep00x0/igep00x0.h	/^#define MUX_IGEP0020(/;"	d
MUX_IGEP0030	board/isee/igep00x0/igep00x0.h	/^#define MUX_IGEP0030(/;"	d
MUX_KBADC_BEAGLEFPGA	board/ti/beagle/beagle.h	/^#define MUX_KBADC_BEAGLEFPGA(/;"	d
MUX_M0	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M0 /;"	d
MUX_M1	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M1 /;"	d
MUX_M2	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M2 /;"	d
MUX_M3	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M3 /;"	d
MUX_M4	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M4 /;"	d
MUX_M5	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M5 /;"	d
MUX_M6	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M6 /;"	d
MUX_M7	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define MUX_M7 /;"	d
MUX_MCLK_CDR_MSPLL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_MCLK_CDR_MSPLL	/;"	d
MUX_MCX	board/htkw/mcx/mcx.h	/^#define MUX_MCX(/;"	d
MUX_MODE0	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE0	/;"	d
MUX_MODE0	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE0	/;"	d
MUX_MODE1	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE1	/;"	d
MUX_MODE1	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE1	/;"	d
MUX_MODE10	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE10	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE10	/;"	d
MUX_MODE11	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE11	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE11	/;"	d
MUX_MODE12	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE12	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE12	/;"	d
MUX_MODE13	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE13	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE13	/;"	d
MUX_MODE14	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE14	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE14	/;"	d
MUX_MODE15	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE15	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE15	/;"	d
MUX_MODE2	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE2	/;"	d
MUX_MODE2	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE2	/;"	d
MUX_MODE3	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE3	/;"	d
MUX_MODE3	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE3	/;"	d
MUX_MODE4	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE4	/;"	d
MUX_MODE4	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE4	/;"	d
MUX_MODE5	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE5	/;"	d
MUX_MODE5	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE5	/;"	d
MUX_MODE6	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE6	/;"	d
MUX_MODE6	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE6	/;"	d
MUX_MODE7	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE7	/;"	d
MUX_MODE7	include/dt-bindings/pinctrl/omap.h	/^#define MUX_MODE7	/;"	d
MUX_MODE8	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	include/dt-bindings/pinctrl/am43xx.h	/^#define MUX_MODE8	/;"	d
MUX_MODE8	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE8	/;"	d
MUX_MODE9	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE9	include/dt-bindings/pinctrl/dra.h	/^#define MUX_MODE9	/;"	d
MUX_MODE_LPSR	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_MODE_LPSR /;"	d
MUX_MODE_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_MODE_MASK	/;"	d
MUX_MODE_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_MODE_SHIFT	/;"	d
MUX_MODE_SION	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_MODE_SION	/;"	d
MUX_MPLL_SEL	board/samsung/odroid/setup.h	/^#define MUX_MPLL_SEL(/;"	d
MUX_MPLL_SEL_FILPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_MPLL_SEL_FILPLL	/;"	d
MUX_MPLL_SEL_FILPLL	board/samsung/trats/setup.h	/^#define MUX_MPLL_SEL_FILPLL	/;"	d
MUX_MPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_MPLL_SEL_MASK	/;"	d
MUX_MPLL_SEL_MOUTMPLLFOUT	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_MPLL_SEL_MOUTMPLLFOUT	/;"	d
MUX_MPLL_SEL_MOUTMPLLFOUT	board/samsung/trats/setup.h	/^#define MUX_MPLL_SEL_MOUTMPLLFOUT	/;"	d
MUX_MPLL_USER_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_MPLL_USER_SEL /;"	d
MUX_MPLL_USER_SEL_C	board/samsung/odroid/setup.h	/^#define MUX_MPLL_USER_SEL_C(/;"	d
MUX_MSK_AVB	board/renesas/stout/cpld.h	/^#define MUX_MSK_AVB	/;"	d
MUX_MSK_ETH_COMEXPRESS	board/renesas/stout/cpld.h	/^#define MUX_MSK_ETH_COMEXPRESS	/;"	d
MUX_MSK_ETH_ONBOARD	board/renesas/stout/cpld.h	/^#define MUX_MSK_ETH_ONBOARD	/;"	d
MUX_MSK_I2C1	board/renesas/stout/cpld.h	/^#define MUX_MSK_I2C1	/;"	d
MUX_MSK_IRQ3	board/renesas/stout/cpld.h	/^#define MUX_MSK_IRQ3	/;"	d
MUX_MSK_PWM210	board/renesas/stout/cpld.h	/^#define MUX_MSK_PWM210	/;"	d
MUX_MSK_QSPI_COMEXPRESS	board/renesas/stout/cpld.h	/^#define MUX_MSK_QSPI_COMEXPRESS	/;"	d
MUX_MSK_QSPI_ONBOARD	board/renesas/stout/cpld.h	/^#define MUX_MSK_QSPI_ONBOARD	/;"	d
MUX_MSK_SCIFA0_COMEXPRESS	board/renesas/stout/cpld.h	/^#define MUX_MSK_SCIFA0_COMEXPRESS	/;"	d
MUX_MSK_SCIFA0_USB	board/renesas/stout/cpld.h	/^#define MUX_MSK_SCIFA0_USB	/;"	d
MUX_MSK_SCIFA2	board/renesas/stout/cpld.h	/^#define MUX_MSK_SCIFA2	/;"	d
MUX_MSK_SD0	board/renesas/stout/cpld.h	/^#define MUX_MSK_SD0	/;"	d
MUX_MSK_SD2	board/renesas/stout/cpld.h	/^#define MUX_MSK_SD2	/;"	d
MUX_MSK_VIN0_BT656	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN0_BT656	/;"	d
MUX_MSK_VIN0_full	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN0_full	/;"	d
MUX_MSK_VIN1_10bit	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN1_10bit	/;"	d
MUX_MSK_VIN1_12bit	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN1_12bit	/;"	d
MUX_MSK_VIN1_BT656	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN1_BT656	/;"	d
MUX_MSK_VIN2_BT656	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN2_BT656	/;"	d
MUX_MSK_VIN2_withFIELD	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN2_withFIELD	/;"	d
MUX_MSK_VIN2_withSYNC	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN2_withSYNC	/;"	d
MUX_MSK_VIN2_withSYNCandFIELD	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN2_withSYNCandFIELD	/;"	d
MUX_MSK_VIN3_BT656	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN3_BT656	/;"	d
MUX_MSK_VIN3_withFIELD	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN3_withFIELD	/;"	d
MUX_MSK_VIN3_withSYNCandFIELD	board/renesas/stout/cpld.h	/^#define MUX_MSK_VIN3_withSYNCandFIELD	/;"	d
MUX_MT_VENTOUX	board/teejet/mt_ventoux/mt_ventoux.h	/^#define MUX_MT_VENTOUX(/;"	d
MUX_OMAP3_HA	board/technexion/tao3530/tao3530.h	/^#define MUX_OMAP3_HA(/;"	d
MUX_ONENAND_1_SEL_MOUTONENAND	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ONENAND_1_SEL_MOUTONENAND	/;"	d
MUX_ONENAND_1_SEL_MOUTONENAND	board/samsung/trats/setup.h	/^#define MUX_ONENAND_1_SEL_MOUTONENAND	/;"	d
MUX_ONENAND_1_SEL_SCLKVPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ONENAND_1_SEL_SCLKVPLL	/;"	d
MUX_ONENAND_1_SEL_SCLKVPLL	board/samsung/trats/setup.h	/^#define MUX_ONENAND_1_SEL_SCLKVPLL	/;"	d
MUX_ONENAND_SEL_ACLK_133	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ONENAND_SEL_ACLK_133	/;"	d
MUX_ONENAND_SEL_ACLK_133	board/samsung/trats/setup.h	/^#define MUX_ONENAND_SEL_ACLK_133	/;"	d
MUX_ONENAND_SEL_ACLK_160	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_ONENAND_SEL_ACLK_160	/;"	d
MUX_ONENAND_SEL_ACLK_160	board/samsung/trats/setup.h	/^#define MUX_ONENAND_SEL_ACLK_160	/;"	d
MUX_OVERO	board/overo/common.c	/^#define MUX_OVERO(/;"	d	file:
MUX_OVERO_SDIO2_DIRECT	board/overo/overo.h	/^#define MUX_OVERO_SDIO2_DIRECT(/;"	d
MUX_OVERO_SDIO2_TRANSCEIVER	board/overo/overo.h	/^#define MUX_OVERO_SDIO2_TRANSCEIVER(/;"	d
MUX_PAD_CTRL	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_PAD_CTRL(/;"	d
MUX_PAD_CTRL_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_PAD_CTRL_MASK	/;"	d
MUX_PAD_CTRL_OFS_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_PAD_CTRL_OFS_MASK	/;"	d
MUX_PAD_CTRL_OFS_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_PAD_CTRL_OFS_SHIFT	/;"	d
MUX_PAD_CTRL_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_PAD_CTRL_SHIFT	/;"	d
MUX_PANDORA	board/pandora/pandora.h	/^#define MUX_PANDORA(/;"	d
MUX_PANDORA_3730	board/pandora/pandora.h	/^#define MUX_PANDORA_3730(/;"	d
MUX_PGP_ATA_1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_1			= 1 << 3,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_2			= 1 << 4,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_3			= 1 << 5,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_4			= 1 << 6,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_5			= 1 << 7,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_6			= 1 << 8,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_7			= 1 << 9,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_8			= 1 << 10,$/;"	e	enum:iomux_gp_func
MUX_PGP_ATA_9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_ATA_9			= 1 << 26,$/;"	e	enum:iomux_gp_func
MUX_PGP_CSPI_BB	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_CSPI_BB			= 1 << 2,$/;"	e	enum:iomux_gp_func
MUX_PGP_FIRI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_FIRI			= 1 << 0,$/;"	e	enum:iomux_gp_func
MUX_PGP_MSHC1_CLK_SEL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_MSHC1_CLK_SEL		= 1 << 23,$/;"	e	enum:iomux_gp_func
MUX_PGP_MSHC2_CLK_SEL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_MSHC2_CLK_SEL		= 1 << 24,$/;"	e	enum:iomux_gp_func
MUX_PGP_SPLL_BYP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_SPLL_BYP		= 1 << 21,$/;"	e	enum:iomux_gp_func
MUX_PGP_UH2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_UH2			= 1 << 11,$/;"	e	enum:iomux_gp_func
MUX_PGP_UPLL_BYP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_UPLL_BYP		= 1 << 22,$/;"	e	enum:iomux_gp_func
MUX_PGP_USB_4WIRE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_USB_4WIRE		= 1 << 17,$/;"	e	enum:iomux_gp_func
MUX_PGP_USB_COMMON	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_USB_COMMON		= 1 << 18,$/;"	e	enum:iomux_gp_func
MUX_PGP_USB_HS1_LOOPBACK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_USB_HS1_LOOPBACK	= 1 << 29,$/;"	e	enum:iomux_gp_func
MUX_PGP_USB_HS2_LOOPBACK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_USB_HS2_LOOPBACK	= 1 << 30,$/;"	e	enum:iomux_gp_func
MUX_PGP_USB_OTG_LOOPBACK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_USB_OTG_LOOPBACK	= 1 << 28,$/;"	e	enum:iomux_gp_func
MUX_PGP_USB_SUSPEND	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_PGP_USB_SUSPEND		= 1 << 27,$/;"	e	enum:iomux_gp_func
MUX_PWI_SEL	board/samsung/odroid/setup.h	/^#define MUX_PWI_SEL(/;"	d
MUX_PWI_SEL_SCLKEPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLKEPLL	/;"	d
MUX_PWI_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLKMPLL	/;"	d
MUX_PWI_SEL_SCLKVPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLKVPLL	/;"	d
MUX_PWI_SEL_SCLK_HDMI24M	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLK_HDMI24M	/;"	d
MUX_PWI_SEL_SCLK_HDMIPHY	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLK_HDMIPHY	/;"	d
MUX_PWI_SEL_SCLK_USBPHY0	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLK_USBPHY0	/;"	d
MUX_PWI_SEL_SCLK_USBPHY1	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_SCLK_USBPHY1	/;"	d
MUX_PWI_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_XUSBXTI	/;"	d
MUX_PWI_SEL_XXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_PWI_SEL_XXTI	/;"	d
MUX_REG	arch/arm/mach-tegra/pinmux-common.c	/^#define MUX_REG(/;"	d	file:
MUX_RTS1__UART1_RTS_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_RTS1__UART1_RTS_B	/;"	d
MUX_RTS2__UART2_RTS_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_RTS2__UART2_RTS_B	/;"	d
MUX_RX51	board/nokia/rx51/rx51.h	/^#define MUX_RX51(/;"	d
MUX_RX51_C	board/nokia/rx51/rx51.h	/^#define MUX_RX51_C(/;"	d
MUX_RXD1__UART1_RXD_MUX	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_RXD1__UART1_RXD_MUX	/;"	d
MUX_RXD2__UART2_RXD_MUX	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_RXD2__UART2_RXD_MUX	/;"	d
MUX_SDCTL_CSD0_SEL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_SDCTL_CSD0_SEL		= 1 << 12,$/;"	e	enum:iomux_gp_func
MUX_SDCTL_CSD1_SEL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_SDCTL_CSD1_SEL		= 1 << 13,$/;"	e	enum:iomux_gp_func
MUX_SDHC_MEMSTICK1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_SDHC_MEMSTICK1		= 1 << 19,$/;"	e	enum:iomux_gp_func
MUX_SDHC_MEMSTICK2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_SDHC_MEMSTICK2		= 1 << 20,$/;"	e	enum:iomux_gp_func
MUX_SEL_INPUT_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_SEL_INPUT_MASK	/;"	d
MUX_SEL_INPUT_OFS_MASK	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_SEL_INPUT_OFS_MASK	/;"	d
MUX_SEL_INPUT_OFS_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_SEL_INPUT_OFS_SHIFT	/;"	d
MUX_SEL_INPUT_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define MUX_SEL_INPUT_SHIFT	/;"	d
MUX_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define MUX_SHIFT(/;"	d	file:
MUX_SNIPER	board/lg/sniper/sniper.h	/^#define MUX_SNIPER(/;"	d
MUX_STAT_CHANGING	board/samsung/odroid/setup.h	/^#define MUX_STAT_CHANGING /;"	d
MUX_STAT_CPU_CHANGING	board/samsung/odroid/setup.h	/^#define MUX_STAT_CPU_CHANGING /;"	d
MUX_STAT_DMC_CHANGING	board/samsung/odroid/setup.h	/^#define MUX_STAT_DMC_CHANGING	/;"	d
MUX_TAMPER_DETECT_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MUX_TAMPER_DETECT_EN		= 1 << 16,$/;"	e	enum:iomux_gp_func
MUX_TAO3530	board/technexion/tao3530/tao3530.h	/^#define MUX_TAO3530(/;"	d
MUX_TINCANTOOLS_TRAINER	board/ti/beagle/beagle.h	/^#define MUX_TINCANTOOLS_TRAINER(/;"	d
MUX_TINCANTOOLS_ZIPPY	board/ti/beagle/beagle.h	/^#define MUX_TINCANTOOLS_ZIPPY(/;"	d
MUX_TRICORDER	board/corscience/tricorder/tricorder.h	/^#define MUX_TRICORDER(/;"	d
MUX_TWISTER	board/technexion/twister/twister.h	/^#define MUX_TWISTER(/;"	d
MUX_TXD1__UART1_TXD_MUX	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_TXD1__UART1_TXD_MUX	/;"	d
MUX_TXD2__UART2_TXD_MUX	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MUX_TXD2__UART2_TXD_MUX	/;"	d
MUX_TYPE_CAN	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_CAN,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_CAN	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_CAN,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_TYPE_CS0_NAND	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_CS0_NAND,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_TYPE_CS0_NOR	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_CS0_NOR,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_TYPE_DSPI	board/freescale/ls2080aqds/ls2080aqds.c	/^	MUX_TYPE_DSPI,$/;"	e	enum:__anonae692cb90103	file:
MUX_TYPE_DSPI	board/freescale/ls2080ardb/ls2080ardb.c	/^	MUX_TYPE_DSPI,$/;"	e	enum:__anoncb6c4f190103	file:
MUX_TYPE_GPIO	board/freescale/ls1043aqds/ls1043aqds.c	/^	MUX_TYPE_GPIO,$/;"	e	enum:__anon9611d1350103	file:
MUX_TYPE_GPIO	board/freescale/ls1046aqds/ls1046aqds.c	/^	MUX_TYPE_GPIO,$/;"	e	enum:__anon4742eddb0103	file:
MUX_TYPE_IFC	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_IFC,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_TYPE_IIC2	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_IIC2,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_RGMII	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_RGMII,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SAI	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_SAI,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SDHC	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_SDHC,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SDHC	board/freescale/ls2080aqds/ls2080aqds.c	/^	MUX_TYPE_SDHC,$/;"	e	enum:__anonae692cb90103	file:
MUX_TYPE_SDHC	board/freescale/ls2080ardb/ls2080ardb.c	/^	MUX_TYPE_SDHC,$/;"	e	enum:__anoncb6c4f190103	file:
MUX_TYPE_SDHC	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_SDHC,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_TYPE_SD_PCI4	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_SD_PCI4,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SD_PC_SA_PC_SG	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_SD_PC_SA_PC_SG,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SD_PC_SA_SG_SG	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_SD_PC_SA_SG_SG,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SD_PC_SG_SG	board/freescale/ls1021aqds/ls1021aqds.c	/^	MUX_TYPE_SD_PC_SG_SG,$/;"	e	enum:__anone5b89d2d0103	file:
MUX_TYPE_SPIFLASH	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_SPIFLASH,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_TYPE_TDM	board/freescale/p1010rdb/p1010rdb.c	/^	MUX_TYPE_TDM,$/;"	e	enum:__anon3b5aaee90103	file:
MUX_USRP_E	board/overo/overo.h	/^#define MUX_USRP_E(/;"	d
MUX_VAL	arch/arm/include/asm/arch-omap3/mux.h	/^#define MUX_VAL(/;"	d
MUX_VAL_AVB	board/renesas/stout/cpld.h	/^#define MUX_VAL_AVB	/;"	d
MUX_VAL_ETH_COMEXPRESS	board/renesas/stout/cpld.h	/^#define MUX_VAL_ETH_COMEXPRESS	/;"	d
MUX_VAL_ETH_ONBOARD	board/renesas/stout/cpld.h	/^#define MUX_VAL_ETH_ONBOARD	/;"	d
MUX_VAL_I2C1	board/renesas/stout/cpld.h	/^#define MUX_VAL_I2C1	/;"	d
MUX_VAL_IRQ3	board/renesas/stout/cpld.h	/^#define MUX_VAL_IRQ3	/;"	d
MUX_VAL_PWM210	board/renesas/stout/cpld.h	/^#define MUX_VAL_PWM210	/;"	d
MUX_VAL_QSPI_COMEXPRESS	board/renesas/stout/cpld.h	/^#define MUX_VAL_QSPI_COMEXPRESS	/;"	d
MUX_VAL_QSPI_ONBOARD	board/renesas/stout/cpld.h	/^#define MUX_VAL_QSPI_ONBOARD	/;"	d
MUX_VAL_SCIFA0_COMEXPRESS	board/renesas/stout/cpld.h	/^#define MUX_VAL_SCIFA0_COMEXPRESS	/;"	d
MUX_VAL_SCIFA0_USB	board/renesas/stout/cpld.h	/^#define MUX_VAL_SCIFA0_USB	/;"	d
MUX_VAL_SCIFA2	board/renesas/stout/cpld.h	/^#define MUX_VAL_SCIFA2	/;"	d
MUX_VAL_SD0	board/renesas/stout/cpld.h	/^#define MUX_VAL_SD0	/;"	d
MUX_VAL_SD2	board/renesas/stout/cpld.h	/^#define MUX_VAL_SD2	/;"	d
MUX_VAL_VIN0_BT656	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN0_BT656	/;"	d
MUX_VAL_VIN0_full	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN0_full	/;"	d
MUX_VAL_VIN1_10bit	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN1_10bit	/;"	d
MUX_VAL_VIN1_12bit	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN1_12bit	/;"	d
MUX_VAL_VIN1_BT656	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN1_BT656	/;"	d
MUX_VAL_VIN2_BT656	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN2_BT656	/;"	d
MUX_VAL_VIN2_withFIELD	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN2_withFIELD	/;"	d
MUX_VAL_VIN2_withSYNC	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN2_withSYNC	/;"	d
MUX_VAL_VIN2_withSYNCandFIELD	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN2_withSYNCandFIELD	/;"	d
MUX_VAL_VIN3_BT656	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN3_BT656	/;"	d
MUX_VAL_VIN3_withFIELD	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN3_withFIELD	/;"	d
MUX_VAL_VIN3_withSYNCandFIELD	board/renesas/stout/cpld.h	/^#define MUX_VAL_VIN3_withSYNCandFIELD	/;"	d
MUX_VPLL_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_VPLL_SEL /;"	d
MUX_VPLL_SEL_FINPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_VPLL_SEL_FINPLL	/;"	d
MUX_VPLL_SEL_FINPLL	board/samsung/trats/setup.h	/^#define MUX_VPLL_SEL_FINPLL	/;"	d
MUX_VPLL_SEL_FOUTVPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define MUX_VPLL_SEL_FOUTVPLL	/;"	d
MUX_VPLL_SEL_FOUTVPLL	board/samsung/trats/setup.h	/^#define MUX_VPLL_SEL_FOUTVPLL	/;"	d
MUX_VPLL_SEL_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define MUX_VPLL_SEL_MASK	/;"	d
MUX_ZOOM1_MDK	board/logicpd/zoom1/zoom1.h	/^#define MUX_ZOOM1_MDK(/;"	d
MU_DSP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MU_DSP_BASE_ADDR /;"	d
MU_MCU_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MU_MCU_BASE_ADDR /;"	d
MV1111_EXT_CTRL1_REG	drivers/net/tsi108_eth.c	/^#define MV1111_EXT_CTRL1_REG	/;"	d	file:
MV1111_EXT_CTRL2_REG	drivers/net/tsi108_eth.c	/^#define MV1111_EXT_CTRL2_REG	/;"	d	file:
MV1111_SPEC_STAT_REG	drivers/net/tsi108_eth.c	/^#define MV1111_SPEC_STAT_REG	/;"	d	file:
MV78230	arch/arm/mach-mvebu/Kconfig	/^config MV78230$/;"	c
MV78260	arch/arm/mach-mvebu/Kconfig	/^config MV78260$/;"	c
MV78460	arch/arm/mach-mvebu/Kconfig	/^config MV78460$/;"	c
MV88E1116_CPRSP_CR3_REG	board/LaCie/common/common.c	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d	file:
MV88E1116_CPRSP_CR3_REG	board/Marvell/openrd/openrd.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	board/Marvell/sheevaplug/sheevaplug.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	board/Seagate/dockstar/dockstar.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	board/Synology/ds109/ds109.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	board/cloudengines/pogo_e02/pogo_e02.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	board/iomega/iconnect/iconnect.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	board/raidsonic/ib62x0/ib62x0.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_CPRSP_CR3_REG	include/configs/goflexhome.h	/^#define MV88E1116_CPRSP_CR3_REG /;"	d
MV88E1116_CPRSP_CR3_REG	include/configs/nas220.h	/^#define MV88E1116_CPRSP_CR3_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/LaCie/common/common.c	/^#define MV88E1116_LED_FCTRL_REG	/;"	d	file:
MV88E1116_LED_FCTRL_REG	board/Marvell/openrd/openrd.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/Marvell/sheevaplug/sheevaplug.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/Seagate/dockstar/dockstar.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/Synology/ds109/ds109.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/cloudengines/pogo_e02/pogo_e02.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/iomega/iconnect/iconnect.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	board/raidsonic/ib62x0/ib62x0.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_LED_FCTRL_REG	include/configs/goflexhome.h	/^#define MV88E1116_LED_FCTRL_REG /;"	d
MV88E1116_LED_FCTRL_REG	include/configs/nas220.h	/^#define MV88E1116_LED_FCTRL_REG	/;"	d
MV88E1116_MAC_CTRL2_REG	board/Marvell/dreamplug/dreamplug.h	/^#define MV88E1116_MAC_CTRL2_REG	/;"	d
MV88E1116_MAC_CTRL2_REG	board/Synology/ds109/ds109.h	/^#define MV88E1116_MAC_CTRL2_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/LaCie/common/common.c	/^#define MV88E1116_MAC_CTRL_REG	/;"	d	file:
MV88E1116_MAC_CTRL_REG	board/Marvell/openrd/openrd.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/Marvell/sheevaplug/sheevaplug.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/Seagate/dockstar/dockstar.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/Synology/ds109/ds109.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/cloudengines/pogo_e02/pogo_e02.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/d-link/dns325/dns325.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/iomega/iconnect/iconnect.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	board/raidsonic/ib62x0/ib62x0.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_MAC_CTRL_REG	include/configs/goflexhome.h	/^#define MV88E1116_MAC_CTRL_REG /;"	d
MV88E1116_MAC_CTRL_REG	include/configs/nas220.h	/^#define MV88E1116_MAC_CTRL_REG	/;"	d
MV88E1116_PGADR_REG	board/Marvell/dreamplug/dreamplug.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/Marvell/openrd/openrd.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/Marvell/sheevaplug/sheevaplug.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/Seagate/dockstar/dockstar.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/Synology/ds109/ds109.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/cloudengines/pogo_e02/pogo_e02.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/d-link/dns325/dns325.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/iomega/iconnect/iconnect.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	board/raidsonic/ib62x0/ib62x0.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_PGADR_REG	include/configs/goflexhome.h	/^#define MV88E1116_PGADR_REG /;"	d
MV88E1116_PGADR_REG	include/configs/nas220.h	/^#define MV88E1116_PGADR_REG	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/LaCie/common/common.c	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d	file:
MV88E1116_RGMII_RXTM_CTRL	board/Marvell/dreamplug/dreamplug.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/Marvell/openrd/openrd.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/Marvell/sheevaplug/sheevaplug.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/Seagate/dockstar/dockstar.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/Synology/ds109/ds109.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/cloudengines/pogo_e02/pogo_e02.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/d-link/dns325/dns325.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/iomega/iconnect/iconnect.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	board/raidsonic/ib62x0/ib62x0.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_RXTM_CTRL	include/configs/goflexhome.h	/^#define MV88E1116_RGMII_RXTM_CTRL /;"	d
MV88E1116_RGMII_RXTM_CTRL	include/configs/nas220.h	/^#define MV88E1116_RGMII_RXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/LaCie/common/common.c	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d	file:
MV88E1116_RGMII_TXTM_CTRL	board/Marvell/dreamplug/dreamplug.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/Marvell/openrd/openrd.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/Marvell/sheevaplug/sheevaplug.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/Seagate/dockstar/dockstar.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/Synology/ds109/ds109.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/cloudengines/pogo_e02/pogo_e02.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/d-link/dns325/dns325.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/iomega/iconnect/iconnect.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	board/raidsonic/ib62x0/ib62x0.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1116_RGMII_TXTM_CTRL	include/configs/goflexhome.h	/^#define MV88E1116_RGMII_TXTM_CTRL /;"	d
MV88E1116_RGMII_TXTM_CTRL	include/configs/nas220.h	/^#define MV88E1116_RGMII_TXTM_CTRL	/;"	d
MV88E1121_MAC_CTRL2_REG	board/Marvell/guruplug/guruplug.h	/^#define MV88E1121_MAC_CTRL2_REG	/;"	d
MV88E1121_PGADR_REG	board/Marvell/guruplug/guruplug.h	/^#define MV88E1121_PGADR_REG	/;"	d
MV88E1121_RGMII_RXTM_CTRL	board/Marvell/guruplug/guruplug.h	/^#define MV88E1121_RGMII_RXTM_CTRL	/;"	d
MV88E1121_RGMII_TXTM_CTRL	board/Marvell/guruplug/guruplug.h	/^#define MV88E1121_RGMII_TXTM_CTRL	/;"	d
MV88E1318_LED2_4	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_LED2_4	/;"	d
MV88E1318_LED2_5	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_LED2_5	/;"	d
MV88E1318_LED_PG	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_LED_PG	/;"	d
MV88E1318_LED_POL_REG	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_LED_POL_REG	/;"	d
MV88E1318_MAC_CTRL_PG	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_MAC_CTRL_PG	/;"	d
MV88E1318_MAC_CTRL_REG	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_MAC_CTRL_REG	/;"	d
MV88E1318_PGADR_REG	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_PGADR_REG	/;"	d
MV88E1318_RGMII_RX_CTRL	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_RGMII_RX_CTRL	/;"	d
MV88E1318_RGMII_TX_CTRL	board/zyxel/nsa310s/nsa310s.h	/^#define MV88E1318_RGMII_TX_CTRL	/;"	d
MV88F5181L_REV_A0	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5181L_REV_A0 /;"	d
MV88F5181L_REV_A1	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5181L_REV_A1 /;"	d
MV88F5181_DEV_ID	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5181_DEV_ID /;"	d
MV88F5181_REV_B1	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5181_REV_B1 /;"	d
MV88F5182_DEV_ID	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5182_DEV_ID /;"	d
MV88F5182_REV_A2	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5182_REV_A2 /;"	d
MV88F5281_DEV_ID	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5281_DEV_ID /;"	d
MV88F5281_REV_D0	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5281_REV_D0 /;"	d
MV88F5281_REV_D1	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5281_REV_D1 /;"	d
MV88F5281_REV_D2	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F5281_REV_D2 /;"	d
MV88F6183_DEV_ID	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F6183_DEV_ID /;"	d
MV88F6183_REV_B0	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define MV88F6183_REV_B0 /;"	d
MV88F78X60	arch/arm/mach-mvebu/include/mach/config.h	/^#define MV88F78X60 /;"	d
MVAC_DET	include/twl6030.h	/^#define MVAC_DET	/;"	d
MVAC_FAULT	include/twl6030.h	/^#define MVAC_FAULT	/;"	d
MVBUS_DET	include/twl6030.h	/^#define MVBUS_DET	/;"	d
MVCPU_WIN_CTRL_DATA	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVCPU_WIN_CTRL_DATA	/;"	d
MVCPU_WIN_CTRL_DATA	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVCPU_WIN_CTRL_DATA	/;"	d
MVCPU_WIN_CTRL_DATA	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVCPU_WIN_CTRL_DATA	/;"	d
MVCPU_WIN_DISABLE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVCPU_WIN_DISABLE	/;"	d
MVCPU_WIN_DISABLE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVCPU_WIN_DISABLE	/;"	d
MVCPU_WIN_DISABLE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVCPU_WIN_DISABLE	/;"	d
MVCPU_WIN_ENABLE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVCPU_WIN_ENABLE	/;"	d
MVCPU_WIN_ENABLE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVCPU_WIN_ENABLE	/;"	d
MVCPU_WIN_ENABLE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVCPU_WIN_ENABLE	/;"	d
MVEBU_A3700_SPI	drivers/spi/Kconfig	/^config MVEBU_A3700_SPI$/;"	c	menu:SPI Support
MVEBU_A3700_UART	drivers/serial/Kconfig	/^config MVEBU_A3700_UART$/;"	c	menu:Serial drivers
MVEBU_AXP_SATA_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_AXP_SATA_BASE	/;"	d
MVEBU_AXP_USB_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_AXP_USB_BASE /;"	d
MVEBU_CLOCK_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_CLOCK_BASE	/;"	d
MVEBU_COMPHY_SUPPORT	drivers/phy/marvell/Kconfig	/^config MVEBU_COMPHY_SUPPORT$/;"	c
MVEBU_CORE_DIV_CLK_CTRL	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_CORE_DIV_CLK_CTRL(/;"	d
MVEBU_CP0_REGS_BASE	drivers/phy/marvell/comphy.h	/^#define MVEBU_CP0_REGS_BASE	/;"	d
MVEBU_CPU_WIN_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_CPU_WIN_BASE	/;"	d
MVEBU_DFX_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_DFX_BASE	/;"	d
MVEBU_DFX_DIV_CLK_CTRL	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_DFX_DIV_CLK_CTRL(/;"	d
MVEBU_GPIO	drivers/gpio/Kconfig	/^config MVEBU_GPIO$/;"	c	menu:GPIO Support
MVEBU_GPIO0_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVEBU_GPIO0_BASE	/;"	d
MVEBU_GPIO0_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_GPIO0_BASE	/;"	d
MVEBU_GPIO1_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVEBU_GPIO1_BASE	/;"	d
MVEBU_GPIO1_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_GPIO1_BASE	/;"	d
MVEBU_GPIO2_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_GPIO2_BASE	/;"	d
MVEBU_GPIOS_PER_BANK	drivers/gpio/mvebu_gpio.c	/^#define MVEBU_GPIOS_PER_BANK	/;"	d	file:
MVEBU_GPIO_NB_REG_BASE	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_GPIO_NB_REG_BASE	/;"	d	file:
MVEBU_L2_CACHE_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_L2_CACHE_BASE	/;"	d
MVEBU_LCD_ADLL_CTRL	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_ADLL_CTRL	/;"	d	file:
MVEBU_LCD_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_LCD_BASE	/;"	d
MVEBU_LCD_CFG_DMA_START_ADDR_0	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_DMA_START_ADDR_0	/;"	d	file:
MVEBU_LCD_CFG_DMA_START_ADDR_1	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_DMA_START_ADDR_1	/;"	d	file:
MVEBU_LCD_CFG_GRA_PITCH	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_GRA_PITCH	/;"	d	file:
MVEBU_LCD_CFG_GRA_START_ADDR0	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_GRA_START_ADDR0	/;"	d	file:
MVEBU_LCD_CFG_GRA_START_ADDR1	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_GRA_START_ADDR1	/;"	d	file:
MVEBU_LCD_CFG_RDREG4F	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_RDREG4F	/;"	d	file:
MVEBU_LCD_CFG_SCLK_DIV	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CFG_SCLK_DIV	/;"	d	file:
MVEBU_LCD_CLK_CFG_0	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CLK_CFG_0	/;"	d	file:
MVEBU_LCD_CLK_CFG_1	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CLK_CFG_1	/;"	d	file:
MVEBU_LCD_CLK_DIS	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_CLK_DIS	/;"	d	file:
MVEBU_LCD_FRAME_COUNT	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_FRAME_COUNT	/;"	d	file:
MVEBU_LCD_LVDS_CLK_CFG	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_LVDS_CLK_CFG	/;"	d	file:
MVEBU_LCD_SPUT_V_H_TOTAL	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPUT_V_H_TOTAL	/;"	d	file:
MVEBU_LCD_SPU_ALPHA_COLOR1	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_ALPHA_COLOR1	/;"	d	file:
MVEBU_LCD_SPU_ALPHA_COLOR2	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_ALPHA_COLOR2	/;"	d	file:
MVEBU_LCD_SPU_BLANKCOLOR	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_BLANKCOLOR	/;"	d	file:
MVEBU_LCD_SPU_CBSH_HUE	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_CBSH_HUE	/;"	d	file:
MVEBU_LCD_SPU_COLORKEY_U	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_COLORKEY_U	/;"	d	file:
MVEBU_LCD_SPU_COLORKEY_V	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_COLORKEY_V	/;"	d	file:
MVEBU_LCD_SPU_COLORKEY_Y	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_COLORKEY_Y	/;"	d	file:
MVEBU_LCD_SPU_CONTRAST	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_CONTRAST	/;"	d	file:
MVEBU_LCD_SPU_DBG_ISA	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_DBG_ISA	/;"	d	file:
MVEBU_LCD_SPU_DMA_CTRL0	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_DMA_CTRL0	/;"	d	file:
MVEBU_LCD_SPU_DMA_CTRL1	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_DMA_CTRL1	/;"	d	file:
MVEBU_LCD_SPU_DUMB_CTRL	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_DUMB_CTRL	/;"	d	file:
MVEBU_LCD_SPU_GAMMA_RDDAT	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_GAMMA_RDDAT	/;"	d	file:
MVEBU_LCD_SPU_GRA_HPXL_VLN	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_GRA_HPXL_VLN	/;"	d	file:
MVEBU_LCD_SPU_GRA_OVSA_HPXL_VLN	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_GRA_OVSA_HPXL_VLN	/;"	d	file:
MVEBU_LCD_SPU_GZM_HPXL_VLN	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_GZM_HPXL_VLN	/;"	d	file:
MVEBU_LCD_SPU_HWC_HPXL_VLN	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_HWC_HPXL_VLN	/;"	d	file:
MVEBU_LCD_SPU_HWC_OVSA_HPXL_VLN	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_HWC_OVSA_HPXL_VLN	/;"	d	file:
MVEBU_LCD_SPU_HWC_RDDAT	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_HWC_RDDAT	/;"	d	file:
MVEBU_LCD_SPU_H_PORCH	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_H_PORCH	/;"	d	file:
MVEBU_LCD_SPU_IOPAD_CONTROL	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_IOPAD_CONTROL	/;"	d	file:
MVEBU_LCD_SPU_IOPAD_IN	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_IOPAD_IN	/;"	d	file:
MVEBU_LCD_SPU_IRQ_ENA	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_IRQ_ENA	/;"	d	file:
MVEBU_LCD_SPU_IRQ_ENA_2	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_IRQ_ENA_2	/;"	d	file:
MVEBU_LCD_SPU_IRQ_ISR	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_IRQ_ISR	/;"	d	file:
MVEBU_LCD_SPU_IRQ_ISR_2	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_IRQ_ISR_2	/;"	d	file:
MVEBU_LCD_SPU_ISA_RXDATA	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_ISA_RXDATA	/;"	d	file:
MVEBU_LCD_SPU_PALETTE_RDDAT	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_PALETTE_RDDAT	/;"	d	file:
MVEBU_LCD_SPU_SATURATION	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_SATURATION	/;"	d	file:
MVEBU_LCD_SPU_SPI_RXDATA	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_SPI_RXDATA	/;"	d	file:
MVEBU_LCD_SPU_SRAM_CTRL	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_SRAM_CTRL	/;"	d	file:
MVEBU_LCD_SPU_SRAM_PARA0	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_SRAM_PARA0	/;"	d	file:
MVEBU_LCD_SPU_SRAM_PARA1	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_SRAM_PARA1	/;"	d	file:
MVEBU_LCD_SPU_SRAM_WRDAT	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_SRAM_WRDAT	/;"	d	file:
MVEBU_LCD_SPU_V_H_ACTIVE	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_V_H_ACTIVE	/;"	d	file:
MVEBU_LCD_SPU_V_PORCH	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_SPU_V_PORCH	/;"	d	file:
MVEBU_LCD_VGA_HVSYNC_DELAY	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_VGA_HVSYNC_DELAY	/;"	d	file:
MVEBU_LCD_WIN_BASE	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_WIN_BASE(/;"	d	file:
MVEBU_LCD_WIN_CONTROL	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_WIN_CONTROL(/;"	d	file:
MVEBU_LCD_WIN_REMAP	drivers/video/mvebu_lcd.c	/^#define MVEBU_LCD_WIN_REMAP(/;"	d	file:
MVEBU_LVDS_PADS_REG	drivers/video/mvebu_lcd.c	/^#define MVEBU_LVDS_PADS_REG	/;"	d	file:
MVEBU_MBUS_MAX_WINNAME_SZ	include/linux/mbus.h	/^#define MVEBU_MBUS_MAX_WINNAME_SZ /;"	d
MVEBU_MBUS_NO_REMAP	include/linux/mbus.h	/^#define MVEBU_MBUS_NO_REMAP /;"	d
MVEBU_MBUS_PCI_IO	include/linux/mbus.h	/^#define MVEBU_MBUS_PCI_IO /;"	d
MVEBU_MBUS_PCI_MEM	include/linux/mbus.h	/^#define MVEBU_MBUS_PCI_MEM /;"	d
MVEBU_MBUS_PCI_WA	include/linux/mbus.h	/^#define MVEBU_MBUS_PCI_WA /;"	d
MVEBU_MMC_BASE_DIV_MAX	include/mvebu_mmc.h	/^#define MVEBU_MMC_BASE_DIV_MAX	/;"	d
MVEBU_MMC_BASE_FAST_CLK_100	include/mvebu_mmc.h	/^#define MVEBU_MMC_BASE_FAST_CLK_100	/;"	d
MVEBU_MMC_BASE_FAST_CLK_200	include/mvebu_mmc.h	/^#define MVEBU_MMC_BASE_FAST_CLK_200	/;"	d
MVEBU_MMC_BASE_FAST_CLOCK	include/mvebu_mmc.h	/^#define MVEBU_MMC_BASE_FAST_CLOCK	/;"	d
MVEBU_MMC_CLOCKRATE_MAX	include/mvebu_mmc.h	/^#define MVEBU_MMC_CLOCKRATE_MAX	/;"	d
MVEBU_MPP_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_MPP_BASE	/;"	d
MVEBU_NAND_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_NAND_BASE	/;"	d
MVEBU_NB_WARM_RST_MAGIC_NUM	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_NB_WARM_RST_MAGIC_NUM	/;"	d	file:
MVEBU_NB_WARM_RST_REG	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_NB_WARM_RST_REG	/;"	d	file:
MVEBU_REG	drivers/phy/marvell/comphy_a3700.h	/^#define MVEBU_REG(/;"	d
MVEBU_REGISTER	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_REGISTER(/;"	d
MVEBU_REG_PCIE_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_REG_PCIE_BASE	/;"	d
MVEBU_REG_PCIE_DEVID	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MVEBU_REG_PCIE_DEVID	/;"	d
MVEBU_REG_PCIE_REVID	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define MVEBU_REG_PCIE_REVID	/;"	d
MVEBU_RFU_BASE	arch/arm/mach-mvebu/armada8k/cpu.c	/^#define MVEBU_RFU_BASE	/;"	d	file:
MVEBU_SATA0_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_SATA0_BASE	/;"	d
MVEBU_SDIO_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_SDIO_BASE	/;"	d
MVEBU_SDRAM_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVEBU_SDRAM_BASE	/;"	d
MVEBU_SDRAM_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_SDRAM_BASE	/;"	d
MVEBU_SDRAM_SCRATCH	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_SDRAM_SCRATCH	/;"	d
MVEBU_SOC_A375	arch/arm/mach-mvebu/include/mach/cpu.h	/^	MVEBU_SOC_A375,$/;"	e	enum:__anonf99cdc2e0103
MVEBU_SOC_A38X	arch/arm/mach-mvebu/include/mach/cpu.h	/^	MVEBU_SOC_A38X,$/;"	e	enum:__anonf99cdc2e0103
MVEBU_SOC_AXP	arch/arm/mach-mvebu/include/mach/cpu.h	/^	MVEBU_SOC_AXP,$/;"	e	enum:__anonf99cdc2e0103
MVEBU_SOC_DEV_MUX_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_SOC_DEV_MUX_REG	/;"	d
MVEBU_SOC_UNKNOWN	arch/arm/mach-mvebu/include/mach/cpu.h	/^	MVEBU_SOC_UNKNOWN,$/;"	e	enum:__anonf99cdc2e0103
MVEBU_SPI_A3700_BYTE_LEN	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_BYTE_LEN	/;"	d	file:
MVEBU_SPI_A3700_CLK_PHA	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_CLK_PHA	/;"	d	file:
MVEBU_SPI_A3700_CLK_POL	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_CLK_POL	/;"	d	file:
MVEBU_SPI_A3700_CLK_PRESCALE_BIT	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_CLK_PRESCALE_BIT	/;"	d	file:
MVEBU_SPI_A3700_CLK_PRESCALE_MASK	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_CLK_PRESCALE_MASK	/;"	d	file:
MVEBU_SPI_A3700_FIFO_EN	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_FIFO_EN	/;"	d	file:
MVEBU_SPI_A3700_FIFO_FLUSH	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_FIFO_FLUSH	/;"	d	file:
MVEBU_SPI_A3700_SPI_EN_0	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_SPI_EN_0	/;"	d	file:
MVEBU_SPI_A3700_XFER_RDY	drivers/spi/mvebu_a3700_spi.c	/^#define MVEBU_SPI_A3700_XFER_RDY	/;"	d	file:
MVEBU_SPI_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVEBU_SPI_BASE	/;"	d
MVEBU_SYSTEM_REG_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_SYSTEM_REG_BASE	/;"	d
MVEBU_TARGET_DRAM	drivers/mmc/mvebu_mmc.c	/^#define MVEBU_TARGET_DRAM /;"	d	file:
MVEBU_TEST_PIN_LATCH_N	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_TEST_PIN_LATCH_N	/;"	d	file:
MVEBU_TIMER_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVEBU_TIMER_BASE	/;"	d
MVEBU_TIMER_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_TIMER_BASE	/;"	d
MVEBU_TWSI1_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_TWSI1_BASE	/;"	d
MVEBU_TWSI_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_TWSI_BASE	/;"	d
MVEBU_USB20_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MVEBU_USB20_BASE	/;"	d
MVEBU_XTAL_CLOCK_25MHZ	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_XTAL_CLOCK_25MHZ	/;"	d	file:
MVEBU_XTAL_CLOCK_40MHZ	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_XTAL_CLOCK_40MHZ	/;"	d	file:
MVEBU_XTAL_MODE_MASK	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_XTAL_MODE_MASK	/;"	d	file:
MVEBU_XTAL_MODE_OFFS	arch/arm/mach-mvebu/armada3700/cpu.c	/^#define MVEBU_XTAL_MODE_OFFS	/;"	d	file:
MVETH_TXQ_TOKEN_CFG_REG	drivers/net/mvneta.c	/^#define MVETH_TXQ_TOKEN_CFG_REG(/;"	d	file:
MVETH_TXQ_TOKEN_COUNT_REG	drivers/net/mvneta.c	/^#define MVETH_TXQ_TOKEN_COUNT_REG(/;"	d	file:
MVGBE0_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVGBE0_BASE	/;"	d
MVGBE0_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVGBE0_BASE	/;"	d
MVGBE1_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVGBE1_BASE	/;"	d
MVGBE_ADV_NO_FLOW_CTRL	drivers/net/mvgbe.h	/^#define MVGBE_ADV_NO_FLOW_CTRL	/;"	d
MVGBE_ADV_SYMMETRIC_FLOW_CTRL	drivers/net/mvgbe.h	/^#define MVGBE_ADV_SYMMETRIC_FLOW_CTRL	/;"	d
MVGBE_AUTO_MODE	drivers/net/mvgbe.h	/^#define MVGBE_AUTO_MODE	/;"	d
MVGBE_AUTO_NEG_NO_CHANGE	drivers/net/mvgbe.h	/^#define MVGBE_AUTO_NEG_NO_CHANGE	/;"	d
MVGBE_BLM_RX_BYTE_SWAP	drivers/net/mvgbe.h	/^#define MVGBE_BLM_RX_BYTE_SWAP	/;"	d
MVGBE_BLM_RX_NO_SWAP	drivers/net/mvgbe.h	/^#define MVGBE_BLM_RX_NO_SWAP	/;"	d
MVGBE_BLM_TX_BYTE_SWAP	drivers/net/mvgbe.h	/^#define MVGBE_BLM_TX_BYTE_SWAP	/;"	d
MVGBE_BLM_TX_NO_SWAP	drivers/net/mvgbe.h	/^#define MVGBE_BLM_TX_NO_SWAP	/;"	d
MVGBE_BPDU_FRAME	drivers/net/mvgbe.h	/^#define MVGBE_BPDU_FRAME	/;"	d
MVGBE_BUFFER_OWNED_BY_DMA	drivers/net/mvgbe.h	/^#define MVGBE_BUFFER_OWNED_BY_DMA	/;"	d
MVGBE_BYPASS_ACTIVE	drivers/net/mvgbe.h	/^#define MVGBE_BYPASS_ACTIVE	/;"	d
MVGBE_BYPASS_NO_ACTIVE	drivers/net/mvgbe.h	/^#define MVGBE_BYPASS_NO_ACTIVE	/;"	d
MVGBE_CLASSIFY_EN	drivers/net/mvgbe.h	/^#define MVGBE_CLASSIFY_EN	/;"	d
MVGBE_CLR_EXT_LOOPBACK	drivers/net/mvgbe.h	/^#define MVGBE_CLR_EXT_LOOPBACK	/;"	d
MVGBE_CPTR_TCP_FRMS_DIS	drivers/net/mvgbe.h	/^#define MVGBE_CPTR_TCP_FRMS_DIS	/;"	d
MVGBE_CPTR_TCP_FRMS_EN	drivers/net/mvgbe.h	/^#define MVGBE_CPTR_TCP_FRMS_EN	/;"	d
MVGBE_CPTR_UDP_FRMS_DIS	drivers/net/mvgbe.h	/^#define MVGBE_CPTR_UDP_FRMS_DIS	/;"	d
MVGBE_CPTR_UDP_FRMS_EN	drivers/net/mvgbe.h	/^#define MVGBE_CPTR_UDP_FRMS_EN	/;"	d
MVGBE_CRC_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_CRC_ERROR	/;"	d
MVGBE_DESCRIPTORS_BYTE_SWAP	drivers/net/mvgbe.h	/^#define MVGBE_DESCRIPTORS_BYTE_SWAP	/;"	d
MVGBE_DESCRIPTORS_NO_SWAP	drivers/net/mvgbe.h	/^#define MVGBE_DESCRIPTORS_NO_SWAP	/;"	d
MVGBE_DFLT_RXQ	drivers/net/mvgbe.h	/^#define MVGBE_DFLT_RXQ(/;"	d
MVGBE_DFLT_RX_ARPQ	drivers/net/mvgbe.h	/^#define MVGBE_DFLT_RX_ARPQ(/;"	d
MVGBE_DFLT_RX_BPDUQ	drivers/net/mvgbe.h	/^#define MVGBE_DFLT_RX_BPDUQ(/;"	d
MVGBE_DFLT_RX_TCPQ	drivers/net/mvgbe.h	/^#define MVGBE_DFLT_RX_TCPQ(/;"	d
MVGBE_DFLT_RX_TCP_CHKSUM_MODE	drivers/net/mvgbe.h	/^#define MVGBE_DFLT_RX_TCP_CHKSUM_MODE	/;"	d
MVGBE_DFLT_RX_UDPQ	drivers/net/mvgbe.h	/^#define MVGBE_DFLT_RX_UDPQ(/;"	d
MVGBE_DIS_AUTO_NEG_FOR_DUPLX	drivers/net/mvgbe.h	/^#define MVGBE_DIS_AUTO_NEG_FOR_DUPLX	/;"	d
MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	drivers/net/mvgbe.h	/^#define MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	/;"	d
MVGBE_DIS_AUTO_NEG_SPEED_GMII	drivers/net/mvgbe.h	/^#define MVGBE_DIS_AUTO_NEG_SPEED_GMII	/;"	d
MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	drivers/net/mvgbe.h	/^#define MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX /;"	d
MVGBE_DO_NOT_FORCE_LINK_FAIL	drivers/net/mvgbe.h	/^#define MVGBE_DO_NOT_FORCE_LINK_FAIL	/;"	d
MVGBE_DO_NOT_FORCE_LINK_PASS	drivers/net/mvgbe.h	/^#define MVGBE_DO_NOT_FORCE_LINK_PASS	/;"	d
MVGBE_DTE_ADV_0	drivers/net/mvgbe.h	/^#define MVGBE_DTE_ADV_0	/;"	d
MVGBE_DTE_ADV_1	drivers/net/mvgbe.h	/^#define MVGBE_DTE_ADV_1	/;"	d
MVGBE_EN_AUTO_NEG_FOR_DUPLX	drivers/net/mvgbe.h	/^#define MVGBE_EN_AUTO_NEG_FOR_DUPLX	/;"	d
MVGBE_EN_AUTO_NEG_FOR_FLOW_CTRL	drivers/net/mvgbe.h	/^#define MVGBE_EN_AUTO_NEG_FOR_FLOW_CTRL	/;"	d
MVGBE_EN_AUTO_NEG_SPEED_GMII	drivers/net/mvgbe.h	/^#define MVGBE_EN_AUTO_NEG_SPEED_GMII	/;"	d
MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	drivers/net/mvgbe.h	/^#define MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	/;"	d
MVGBE_ERROR_SUMMARY	drivers/net/mvgbe.h	/^#define MVGBE_ERROR_SUMMARY	/;"	d
MVGBE_FORCE_BP_MODE_JAM_TX	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_BP_MODE_JAM_TX	/;"	d
MVGBE_FORCE_BP_MODE_JAM_TX_ON_RX_ERR	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_BP_MODE_JAM_TX_ON_RX_ERR	/;"	d
MVGBE_FORCE_BP_MODE_NO_JAM	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_BP_MODE_NO_JAM	/;"	d
MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	/;"	d
MVGBE_FORCE_FC_MODE_TX_PAUSE_DIS	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_FC_MODE_TX_PAUSE_DIS	/;"	d
MVGBE_FORCE_LINK_FAIL	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_LINK_FAIL	/;"	d
MVGBE_FORCE_LINK_PASS	drivers/net/mvgbe.h	/^#define MVGBE_FORCE_LINK_PASS	/;"	d
MVGBE_FRAME_FRAGMENTED	drivers/net/mvgbe.h	/^#define MVGBE_FRAME_FRAGMENTED	/;"	d
MVGBE_FRAME_HEADER_OK	drivers/net/mvgbe.h	/^#define MVGBE_FRAME_HEADER_OK	/;"	d
MVGBE_FRAME_SET_TO_VLAN	drivers/net/mvgbe.h	/^#define MVGBE_FRAME_SET_TO_VLAN	/;"	d
MVGBE_FRAME_TYPE_IP_V_4	drivers/net/mvgbe.h	/^#define MVGBE_FRAME_TYPE_IP_V_4	/;"	d
MVGBE_GEN_CRC	drivers/net/mvgbe.h	/^#define MVGBE_GEN_CRC	/;"	d
MVGBE_GEN_IP_V_4_CHECKSUM	drivers/net/mvgbe.h	/^#define MVGBE_GEN_IP_V_4_CHECKSUM	/;"	d
MVGBE_GEN_TCP_UDP_CHECKSUM	drivers/net/mvgbe.h	/^#define MVGBE_GEN_TCP_UDP_CHECKSUM	/;"	d
MVGBE_GMII_SPEED_1000	drivers/net/mvgbe.h	/^#define MVGBE_GMII_SPEED_1000	/;"	d
MVGBE_GMII_SPEED_100_10	drivers/net/mvgbe.h	/^#define MVGBE_GMII_SPEED_100_10	/;"	d
MVGBE_INTERFACE_GMII_MII	drivers/net/mvgbe.h	/^#define MVGBE_INTERFACE_GMII_MII	/;"	d
MVGBE_INTERFACE_PCM	drivers/net/mvgbe.h	/^#define MVGBE_INTERFACE_PCM	/;"	d
MVGBE_LAYER_2_IS_MVGBE_V_2	drivers/net/mvgbe.h	/^#define MVGBE_LAYER_2_IS_MVGBE_V_2	/;"	d
MVGBE_LAYER_4_CHECKSUM_FIRST_DESC	drivers/net/mvgbe.h	/^#define MVGBE_LAYER_4_CHECKSUM_FIRST_DESC	/;"	d
MVGBE_LAYER_4_CHECKSUM_OK	drivers/net/mvgbe.h	/^#define MVGBE_LAYER_4_CHECKSUM_OK	/;"	d
MVGBE_LC_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_LC_ERROR	/;"	d
MVGBE_LINK_IS_DOWN	drivers/net/mvgbe.h	/^#define MVGBE_LINK_IS_DOWN	/;"	d
MVGBE_LINK_IS_UP	drivers/net/mvgbe.h	/^#define MVGBE_LINK_IS_UP	/;"	d
MVGBE_LLC_SNAP_FORMAT	drivers/net/mvgbe.h	/^#define MVGBE_LLC_SNAP_FORMAT	/;"	d
MVGBE_MAX_FRAME_LENGTH_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_MAX_FRAME_LENGTH_ERROR	/;"	d
MVGBE_MAX_RX_PACKET_1518BYTE	drivers/net/mvgbe.h	/^#define MVGBE_MAX_RX_PACKET_1518BYTE	/;"	d
MVGBE_MAX_RX_PACKET_1522BYTE	drivers/net/mvgbe.h	/^#define MVGBE_MAX_RX_PACKET_1522BYTE	/;"	d
MVGBE_MAX_RX_PACKET_1552BYTE	drivers/net/mvgbe.h	/^#define MVGBE_MAX_RX_PACKET_1552BYTE	/;"	d
MVGBE_MAX_RX_PACKET_9022BYTE	drivers/net/mvgbe.h	/^#define MVGBE_MAX_RX_PACKET_9022BYTE	/;"	d
MVGBE_MAX_RX_PACKET_9192BYTE	drivers/net/mvgbe.h	/^#define MVGBE_MAX_RX_PACKET_9192BYTE	/;"	d
MVGBE_MAX_RX_PACKET_9700BYTE	drivers/net/mvgbe.h	/^#define MVGBE_MAX_RX_PACKET_9700BYTE	/;"	d
MVGBE_MIIPHY_MAC_MODE	drivers/net/mvgbe.h	/^#define MVGBE_MIIPHY_MAC_MODE	/;"	d
MVGBE_MIIPHY_PHY_MODE	drivers/net/mvgbe.h	/^#define MVGBE_MIIPHY_PHY_MODE	/;"	d
MVGBE_MII_SPEED_10	drivers/net/mvgbe.h	/^#define MVGBE_MII_SPEED_10	/;"	d
MVGBE_MII_SPEED_100	drivers/net/mvgbe.h	/^#define MVGBE_MII_SPEED_100	/;"	d
MVGBE_NO_TX	drivers/net/mvgbe.h	/^#define MVGBE_NO_TX	/;"	d
MVGBE_OTHER_FRAME_TYPE	drivers/net/mvgbe.h	/^#define MVGBE_OTHER_FRAME_TYPE	/;"	d
MVGBE_OVERRUN_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_OVERRUN_ERROR	/;"	d
MVGBE_PARTITION_DIS	drivers/net/mvgbe.h	/^#define MVGBE_PARTITION_DIS	/;"	d
MVGBE_PARTITION_EN	drivers/net/mvgbe.h	/^#define MVGBE_PARTITION_EN	/;"	d
MVGBE_PHY_SMI_BUSY_MASK	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_BUSY_MASK	/;"	d
MVGBE_PHY_SMI_DATA_MASK	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_DATA_MASK	/;"	d
MVGBE_PHY_SMI_DATA_OFFS	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_DATA_OFFS	/;"	d
MVGBE_PHY_SMI_DEV_ADDR_MASK	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_DEV_ADDR_MASK /;"	d
MVGBE_PHY_SMI_DEV_ADDR_OFFS	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_DEV_ADDR_OFFS	/;"	d
MVGBE_PHY_SMI_OPCODE_MASK	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_OPCODE_MASK	/;"	d
MVGBE_PHY_SMI_OPCODE_OFFS	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_OPCODE_OFFS	/;"	d
MVGBE_PHY_SMI_OPCODE_READ	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_OPCODE_READ	/;"	d
MVGBE_PHY_SMI_OPCODE_WRITE	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_OPCODE_WRITE	/;"	d
MVGBE_PHY_SMI_READ_VALID_MASK	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_READ_VALID_MASK	/;"	d
MVGBE_PHY_SMI_TIMEOUT	drivers/net/mvgbe.h	/^#define MVGBE_PHY_SMI_TIMEOUT	/;"	d
MVGBE_PORT_AT_FULL_DUPLEX	drivers/net/mvgbe.h	/^#define MVGBE_PORT_AT_FULL_DUPLEX	/;"	d
MVGBE_PORT_AT_HALF_DUPLEX	drivers/net/mvgbe.h	/^#define MVGBE_PORT_AT_HALF_DUPLEX	/;"	d
MVGBE_PORT_AT_PARTN_STT	drivers/net/mvgbe.h	/^#define MVGBE_PORT_AT_PARTN_STT	/;"	d
MVGBE_PORT_NOT_AT_PARTN_STT	drivers/net/mvgbe.h	/^#define MVGBE_PORT_NOT_AT_PARTN_STT	/;"	d
MVGBE_PORT_TX_FIFO_EMPTY	drivers/net/mvgbe.h	/^#define MVGBE_PORT_TX_FIFO_EMPTY	/;"	d
MVGBE_PORT_TX_FIFO_NOT_EMPTY	drivers/net/mvgbe.h	/^#define MVGBE_PORT_TX_FIFO_NOT_EMPTY	/;"	d
MVGBE_REG_BITS_RESET	drivers/net/mvgbe.h	/^#define MVGBE_REG_BITS_RESET(/;"	d
MVGBE_REG_BITS_SET	drivers/net/mvgbe.h	/^#define MVGBE_REG_BITS_SET(/;"	d
MVGBE_REG_RD	drivers/net/mvgbe.h	/^#define MVGBE_REG_RD(/;"	d
MVGBE_REG_WR	drivers/net/mvgbe.h	/^#define MVGBE_REG_WR(/;"	d
MVGBE_REJECT_BC_IF_ARP	drivers/net/mvgbe.h	/^#define MVGBE_REJECT_BC_IF_ARP	/;"	d
MVGBE_REJECT_BC_IF_IP	drivers/net/mvgbe.h	/^#define MVGBE_REJECT_BC_IF_IP	/;"	d
MVGBE_REJECT_BC_IF_NOT_IP_OR_ARP	drivers/net/mvgbe.h	/^#define MVGBE_REJECT_BC_IF_NOT_IP_OR_ARP /;"	d
MVGBE_RESOURCE_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_RESOURCE_ERROR	/;"	d
MVGBE_RESTART_AUTO_NEG	drivers/net/mvgbe.h	/^#define MVGBE_RESTART_AUTO_NEG	/;"	d
MVGBE_RIFB	drivers/net/mvgbe.h	/^#define MVGBE_RIFB	/;"	d
MVGBE_RL_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_RL_ERROR	/;"	d
MVGBE_RX_BC_IF_ARP	drivers/net/mvgbe.h	/^#define MVGBE_RX_BC_IF_ARP	/;"	d
MVGBE_RX_BC_IF_IP	drivers/net/mvgbe.h	/^#define MVGBE_RX_BC_IF_IP	/;"	d
MVGBE_RX_BC_IF_NOT_IP_OR_ARP	drivers/net/mvgbe.h	/^#define MVGBE_RX_BC_IF_NOT_IP_OR_ARP	/;"	d
MVGBE_RX_BURST_SIZE_16_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_RX_BURST_SIZE_16_64BIT	/;"	d
MVGBE_RX_BURST_SIZE_1_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_RX_BURST_SIZE_1_64BIT	/;"	d
MVGBE_RX_BURST_SIZE_2_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_RX_BURST_SIZE_2_64BIT	/;"	d
MVGBE_RX_BURST_SIZE_4_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_RX_BURST_SIZE_4_64BIT	/;"	d
MVGBE_RX_BURST_SIZE_8_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_RX_BURST_SIZE_8_64BIT	/;"	d
MVGBE_RX_EN_INTERRUPT	drivers/net/mvgbe.h	/^#define MVGBE_RX_EN_INTERRUPT	/;"	d
MVGBE_RX_FIRST_DESC	drivers/net/mvgbe.h	/^#define MVGBE_RX_FIRST_DESC	/;"	d
MVGBE_RX_FLOW_CTRL_DISD	drivers/net/mvgbe.h	/^#define MVGBE_RX_FLOW_CTRL_DISD	/;"	d
MVGBE_RX_FLOW_CTRL_ENBALED	drivers/net/mvgbe.h	/^#define MVGBE_RX_FLOW_CTRL_ENBALED	/;"	d
MVGBE_RX_LAST_DESC	drivers/net/mvgbe.h	/^#define MVGBE_RX_LAST_DESC	/;"	d
MVGBE_SERIAL_PORT_DIS	drivers/net/mvgbe.h	/^#define MVGBE_SERIAL_PORT_DIS	/;"	d
MVGBE_SERIAL_PORT_EN	drivers/net/mvgbe.h	/^#define MVGBE_SERIAL_PORT_EN	/;"	d
MVGBE_SET_EXT_LOOPBACK	drivers/net/mvgbe.h	/^#define MVGBE_SET_EXT_LOOPBACK	/;"	d
MVGBE_SET_FULL_DUPLEX_MODE	drivers/net/mvgbe.h	/^#define MVGBE_SET_FULL_DUPLEX_MODE	/;"	d
MVGBE_SET_GMII_SPEED_TO_1000	drivers/net/mvgbe.h	/^#define MVGBE_SET_GMII_SPEED_TO_1000	/;"	d
MVGBE_SET_GMII_SPEED_TO_10_100	drivers/net/mvgbe.h	/^#define MVGBE_SET_GMII_SPEED_TO_10_100	/;"	d
MVGBE_SET_HALF_DUPLEX_MODE	drivers/net/mvgbe.h	/^#define MVGBE_SET_HALF_DUPLEX_MODE	/;"	d
MVGBE_SET_MII_SPEED_TO_10	drivers/net/mvgbe.h	/^#define MVGBE_SET_MII_SPEED_TO_10	/;"	d
MVGBE_SET_MII_SPEED_TO_100	drivers/net/mvgbe.h	/^#define MVGBE_SET_MII_SPEED_TO_100	/;"	d
MVGBE_SMI_REG	drivers/net/mvgbe.c	/^#define MVGBE_SMI_REG /;"	d	file:
MVGBE_SMI_REG_ADDR_MASK	drivers/net/mvgbe.h	/^#define MVGBE_SMI_REG_ADDR_MASK /;"	d
MVGBE_SMI_REG_ADDR_OFFS	drivers/net/mvgbe.h	/^#define MVGBE_SMI_REG_ADDR_OFFS	/;"	d
MVGBE_SPAN_BPDU_PACKETS_AS_NORMAL	drivers/net/mvgbe.h	/^#define MVGBE_SPAN_BPDU_PACKETS_AS_NORMAL	/;"	d
MVGBE_SPAN_BPDU_PACKETS_TO_RX_Q7	drivers/net/mvgbe.h	/^#define MVGBE_SPAN_BPDU_PACKETS_TO_RX_Q7	/;"	d
MVGBE_TARGET_CBS	drivers/net/mvgbe.h	/^	MVGBE_TARGET_CBS,$/;"	e	enum:mvgbe_target
MVGBE_TARGET_DEV	drivers/net/mvgbe.h	/^	MVGBE_TARGET_DEV,$/;"	e	enum:mvgbe_target
MVGBE_TARGET_DRAM	drivers/net/mvgbe.h	/^	MVGBE_TARGET_DRAM,$/;"	e	enum:mvgbe_target
MVGBE_TARGET_PCI0	drivers/net/mvgbe.h	/^	MVGBE_TARGET_PCI0,$/;"	e	enum:mvgbe_target
MVGBE_TARGET_PCI1	drivers/net/mvgbe.h	/^	MVGBE_TARGET_PCI1$/;"	e	enum:mvgbe_target
MVGBE_TCP_FRAME	drivers/net/mvgbe.h	/^#define MVGBE_TCP_FRAME	/;"	d
MVGBE_TCP_FRAME_OVER_IP_V_4	drivers/net/mvgbe.h	/^#define MVGBE_TCP_FRAME_OVER_IP_V_4	/;"	d
MVGBE_TX_AM_NO_UPDATE_ERR_SMRY	drivers/net/mvgbe.h	/^#define MVGBE_TX_AM_NO_UPDATE_ERR_SMRY	/;"	d
MVGBE_TX_BURST_SIZE_16_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_TX_BURST_SIZE_16_64BIT	/;"	d
MVGBE_TX_BURST_SIZE_1_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_TX_BURST_SIZE_1_64BIT	/;"	d
MVGBE_TX_BURST_SIZE_2_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_TX_BURST_SIZE_2_64BIT	/;"	d
MVGBE_TX_BURST_SIZE_4_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_TX_BURST_SIZE_4_64BIT	/;"	d
MVGBE_TX_BURST_SIZE_8_64BIT	drivers/net/mvgbe.h	/^#define MVGBE_TX_BURST_SIZE_8_64BIT	/;"	d
MVGBE_TX_CRC_GENERATION_DIS	drivers/net/mvgbe.h	/^#define MVGBE_TX_CRC_GENERATION_DIS	/;"	d
MVGBE_TX_CRC_GENERATION_EN	drivers/net/mvgbe.h	/^#define MVGBE_TX_CRC_GENERATION_EN	/;"	d
MVGBE_TX_EN_INTERRUPT	drivers/net/mvgbe.h	/^#define MVGBE_TX_EN_INTERRUPT	/;"	d
MVGBE_TX_FIRST_DESC	drivers/net/mvgbe.h	/^#define MVGBE_TX_FIRST_DESC	/;"	d
MVGBE_TX_IN_PROGRESS	drivers/net/mvgbe.h	/^#define MVGBE_TX_IN_PROGRESS	/;"	d
MVGBE_TX_LAST_DESC	drivers/net/mvgbe.h	/^#define MVGBE_TX_LAST_DESC	/;"	d
MVGBE_TX_LAST_FRAME	drivers/net/mvgbe.h	/^#define MVGBE_TX_LAST_FRAME	/;"	d
MVGBE_UCAST_MOD_NRML	drivers/net/mvgbe.h	/^#define MVGBE_UCAST_MOD_NRML	/;"	d
MVGBE_UDP_FRAME	drivers/net/mvgbe.h	/^#define MVGBE_UDP_FRAME	/;"	d
MVGBE_UDP_FRAME_OVER_IP_V_4	drivers/net/mvgbe.h	/^#define MVGBE_UDP_FRAME_OVER_IP_V_4	/;"	d
MVGBE_UNICAST_PROMISCUOUS_MODE	drivers/net/mvgbe.h	/^#define MVGBE_UNICAST_PROMISCUOUS_MODE	/;"	d
MVGBE_UNKNOWN_DESTINATION_ADDR	drivers/net/mvgbe.h	/^#define MVGBE_UNKNOWN_DESTINATION_ADDR	/;"	d
MVGBE_UR_ERROR	drivers/net/mvgbe.h	/^#define MVGBE_UR_ERROR	/;"	d
MVGBE_VLAN_TAGGED	drivers/net/mvgbe.h	/^#define MVGBE_VLAN_TAGGED	/;"	d
MVGBE_WIN0	drivers/net/mvgbe.h	/^	MVGBE_WIN0,$/;"	e	enum:mvgbe_adrwin
MVGBE_WIN1	drivers/net/mvgbe.h	/^	MVGBE_WIN1,$/;"	e	enum:mvgbe_adrwin
MVGBE_WIN2	drivers/net/mvgbe.h	/^	MVGBE_WIN2,$/;"	e	enum:mvgbe_adrwin
MVGBE_WIN3	drivers/net/mvgbe.h	/^	MVGBE_WIN3,$/;"	e	enum:mvgbe_adrwin
MVGBE_WIN4	drivers/net/mvgbe.h	/^	MVGBE_WIN4,$/;"	e	enum:mvgbe_adrwin
MVGBE_WIN5	drivers/net/mvgbe.h	/^	MVGBE_WIN5$/;"	e	enum:mvgbe_adrwin
MVGBE_ZERO_PADDING	drivers/net/mvgbe.h	/^#define MVGBE_ZERO_PADDING	/;"	d
MVNETA_ACC_MODE	drivers/net/mvneta.c	/^#define MVNETA_ACC_MODE /;"	d	file:
MVNETA_ACC_MODE_EXT	drivers/net/mvneta.c	/^#define MVNETA_ACC_MODE_EXT	/;"	d	file:
MVNETA_BASE_ADDR_ENABLE	drivers/net/mvneta.c	/^#define MVNETA_BASE_ADDR_ENABLE /;"	d	file:
MVNETA_BASE_ADDR_ENABLE_BIT	drivers/net/mvneta.c	/^#define      MVNETA_BASE_ADDR_ENABLE_BIT	/;"	d	file:
MVNETA_CPU_D_CACHE_LINE_SIZE	drivers/net/mvneta.c	/^#define MVNETA_CPU_D_CACHE_LINE_SIZE /;"	d	file:
MVNETA_CPU_MAP	drivers/net/mvneta.c	/^#define MVNETA_CPU_MAP(/;"	d	file:
MVNETA_CPU_RXQ_ACCESS_ALL_MASK	drivers/net/mvneta.c	/^#define      MVNETA_CPU_RXQ_ACCESS_ALL_MASK /;"	d	file:
MVNETA_CPU_TXQ_ACCESS_ALL_MASK	drivers/net/mvneta.c	/^#define      MVNETA_CPU_TXQ_ACCESS_ALL_MASK /;"	d	file:
MVNETA_DA_FILT_OTH_MCAST	drivers/net/mvneta.c	/^#define MVNETA_DA_FILT_OTH_MCAST /;"	d	file:
MVNETA_DA_FILT_SPEC_MCAST	drivers/net/mvneta.c	/^#define MVNETA_DA_FILT_SPEC_MCAST /;"	d	file:
MVNETA_DA_FILT_UCAST_BASE	drivers/net/mvneta.c	/^#define MVNETA_DA_FILT_UCAST_BASE /;"	d	file:
MVNETA_DEF_RXQ	drivers/net/mvneta.c	/^#define      MVNETA_DEF_RXQ(/;"	d	file:
MVNETA_DEF_RXQ_ARP	drivers/net/mvneta.c	/^#define      MVNETA_DEF_RXQ_ARP(/;"	d	file:
MVNETA_DEF_RXQ_BPDU	drivers/net/mvneta.c	/^#define      MVNETA_DEF_RXQ_BPDU(/;"	d	file:
MVNETA_DEF_RXQ_TCP	drivers/net/mvneta.c	/^#define      MVNETA_DEF_RXQ_TCP(/;"	d	file:
MVNETA_DEF_RXQ_UDP	drivers/net/mvneta.c	/^#define      MVNETA_DEF_RXQ_UDP(/;"	d	file:
MVNETA_DESC_ALIGNED_SIZE	drivers/net/mvneta.c	/^#define MVNETA_DESC_ALIGNED_SIZE	/;"	d	file:
MVNETA_DESC_SWAP	drivers/net/mvneta.c	/^#define      MVNETA_DESC_SWAP /;"	d	file:
MVNETA_FORCE_UNI	drivers/net/mvneta.c	/^#define      MVNETA_FORCE_UNI /;"	d	file:
MVNETA_GMAC0_PORT_ENABLE	drivers/net/mvneta.c	/^#define      MVNETA_GMAC0_PORT_ENABLE /;"	d	file:
MVNETA_GMAC2_PCS_ENABLE	drivers/net/mvneta.c	/^#define      MVNETA_GMAC2_PCS_ENABLE /;"	d	file:
MVNETA_GMAC2_PORT_RESET	drivers/net/mvneta.c	/^#define      MVNETA_GMAC2_PORT_RESET /;"	d	file:
MVNETA_GMAC2_PORT_RGMII	drivers/net/mvneta.c	/^#define      MVNETA_GMAC2_PORT_RGMII /;"	d	file:
MVNETA_GMAC_AN_DUPLEX_EN	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_AN_DUPLEX_EN /;"	d	file:
MVNETA_GMAC_AN_SPEED_EN	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_AN_SPEED_EN /;"	d	file:
MVNETA_GMAC_AUTONEG_CONFIG	drivers/net/mvneta.c	/^#define MVNETA_GMAC_AUTONEG_CONFIG /;"	d	file:
MVNETA_GMAC_CONFIG_FULL_DUPLEX	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_CONFIG_FULL_DUPLEX /;"	d	file:
MVNETA_GMAC_CONFIG_GMII_SPEED	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_CONFIG_GMII_SPEED /;"	d	file:
MVNETA_GMAC_CONFIG_MII_SPEED	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_CONFIG_MII_SPEED /;"	d	file:
MVNETA_GMAC_CTRL_0	drivers/net/mvneta.c	/^#define MVNETA_GMAC_CTRL_0 /;"	d	file:
MVNETA_GMAC_CTRL_2	drivers/net/mvneta.c	/^#define MVNETA_GMAC_CTRL_2 /;"	d	file:
MVNETA_GMAC_FORCE_LINK_DOWN	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_FORCE_LINK_DOWN /;"	d	file:
MVNETA_GMAC_FORCE_LINK_PASS	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_FORCE_LINK_PASS /;"	d	file:
MVNETA_GMAC_FULL_DUPLEX	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_FULL_DUPLEX /;"	d	file:
MVNETA_GMAC_LINK_UP	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_LINK_UP /;"	d	file:
MVNETA_GMAC_MAX_RX_SIZE_MASK	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_MAX_RX_SIZE_MASK /;"	d	file:
MVNETA_GMAC_MAX_RX_SIZE_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_MAX_RX_SIZE_SHIFT /;"	d	file:
MVNETA_GMAC_RX_FLOW_CTRL_ACTIVE	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_RX_FLOW_CTRL_ACTIVE /;"	d	file:
MVNETA_GMAC_RX_FLOW_CTRL_ENABLE	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_RX_FLOW_CTRL_ENABLE /;"	d	file:
MVNETA_GMAC_SPEED_100	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_SPEED_100 /;"	d	file:
MVNETA_GMAC_SPEED_1000	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_SPEED_1000 /;"	d	file:
MVNETA_GMAC_STATUS	drivers/net/mvneta.c	/^#define MVNETA_GMAC_STATUS /;"	d	file:
MVNETA_GMAC_TX_FLOW_CTRL_ACTIVE	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_TX_FLOW_CTRL_ACTIVE /;"	d	file:
MVNETA_GMAC_TX_FLOW_CTRL_ENABLE	drivers/net/mvneta.c	/^#define      MVNETA_GMAC_TX_FLOW_CTRL_ENABLE /;"	d	file:
MVNETA_INTR_ENABLE	drivers/net/mvneta.c	/^#define MVNETA_INTR_ENABLE /;"	d	file:
MVNETA_INTR_MISC_CAUSE	drivers/net/mvneta.c	/^#define MVNETA_INTR_MISC_CAUSE /;"	d	file:
MVNETA_INTR_MISC_MASK	drivers/net/mvneta.c	/^#define MVNETA_INTR_MISC_MASK /;"	d	file:
MVNETA_INTR_NEW_CAUSE	drivers/net/mvneta.c	/^#define MVNETA_INTR_NEW_CAUSE /;"	d	file:
MVNETA_INTR_NEW_MASK	drivers/net/mvneta.c	/^#define MVNETA_INTR_NEW_MASK /;"	d	file:
MVNETA_INTR_OLD_CAUSE	drivers/net/mvneta.c	/^#define MVNETA_INTR_OLD_CAUSE /;"	d	file:
MVNETA_INTR_OLD_MASK	drivers/net/mvneta.c	/^#define MVNETA_INTR_OLD_MASK /;"	d	file:
MVNETA_MAC_ADDR_HIGH	drivers/net/mvneta.c	/^#define MVNETA_MAC_ADDR_HIGH /;"	d	file:
MVNETA_MAC_ADDR_LOW	drivers/net/mvneta.c	/^#define MVNETA_MAC_ADDR_LOW /;"	d	file:
MVNETA_MAX_RXD	drivers/net/mvneta.c	/^#define MVNETA_MAX_RXD /;"	d	file:
MVNETA_MAX_TXD	drivers/net/mvneta.c	/^#define MVNETA_MAX_TXD /;"	d	file:
MVNETA_MBUS_RETRY	drivers/net/mvneta.c	/^#define MVNETA_MBUS_RETRY /;"	d	file:
MVNETA_MH_SIZE	drivers/net/mvneta.c	/^#define MVNETA_MH_SIZE	/;"	d	file:
MVNETA_MIB_COUNTERS_BASE	drivers/net/mvneta.c	/^#define MVNETA_MIB_COUNTERS_BASE /;"	d	file:
MVNETA_MIB_LATE_COLLISION	drivers/net/mvneta.c	/^#define      MVNETA_MIB_LATE_COLLISION /;"	d	file:
MVNETA_PHY_ADDR	drivers/net/mvneta.c	/^#define MVNETA_PHY_ADDR /;"	d	file:
MVNETA_PHY_ADDR_MASK	drivers/net/mvneta.c	/^#define      MVNETA_PHY_ADDR_MASK /;"	d	file:
MVNETA_PHY_POLLING_ENABLE	drivers/net/mvneta.c	/^#define      MVNETA_PHY_POLLING_ENABLE /;"	d	file:
MVNETA_PHY_REG_MASK	drivers/net/mvneta.c	/^#define      MVNETA_PHY_REG_MASK /;"	d	file:
MVNETA_PORT_ACCESS_PROTECT	drivers/net/mvneta.c	/^#define MVNETA_PORT_ACCESS_PROTECT /;"	d	file:
MVNETA_PORT_ACCESS_PROTECT_WIN0_RW	drivers/net/mvneta.c	/^#define      MVNETA_PORT_ACCESS_PROTECT_WIN0_RW	/;"	d	file:
MVNETA_PORT_CONFIG	drivers/net/mvneta.c	/^#define MVNETA_PORT_CONFIG /;"	d	file:
MVNETA_PORT_CONFIG_DEFL_VALUE	drivers/net/mvneta.c	/^#define      MVNETA_PORT_CONFIG_DEFL_VALUE(/;"	d	file:
MVNETA_PORT_CONFIG_EXTEND	drivers/net/mvneta.c	/^#define MVNETA_PORT_CONFIG_EXTEND /;"	d	file:
MVNETA_PORT_RX_DMA_RESET	drivers/net/mvneta.c	/^#define      MVNETA_PORT_RX_DMA_RESET /;"	d	file:
MVNETA_PORT_RX_RESET	drivers/net/mvneta.c	/^#define MVNETA_PORT_RX_RESET /;"	d	file:
MVNETA_PORT_STATUS	drivers/net/mvneta.c	/^#define MVNETA_PORT_STATUS /;"	d	file:
MVNETA_PORT_TX_DMA_RESET	drivers/net/mvneta.c	/^#define      MVNETA_PORT_TX_DMA_RESET /;"	d	file:
MVNETA_PORT_TX_RESET	drivers/net/mvneta.c	/^#define MVNETA_PORT_TX_RESET /;"	d	file:
MVNETA_QSGMII_SERDES_PROTO	drivers/net/mvneta.c	/^#define      MVNETA_QSGMII_SERDES_PROTO	/;"	d	file:
MVNETA_QUEUE_NEXT_DESC	drivers/net/mvneta.c	/^#define MVNETA_QUEUE_NEXT_DESC(/;"	d	file:
MVNETA_RXD_ERR_CODE_MASK	drivers/net/mvneta.c	/^#define MVNETA_RXD_ERR_CODE_MASK	/;"	d	file:
MVNETA_RXD_ERR_CRC	drivers/net/mvneta.c	/^#define MVNETA_RXD_ERR_CRC	/;"	d	file:
MVNETA_RXD_ERR_LEN	drivers/net/mvneta.c	/^#define MVNETA_RXD_ERR_LEN	/;"	d	file:
MVNETA_RXD_ERR_OVERRUN	drivers/net/mvneta.c	/^#define MVNETA_RXD_ERR_OVERRUN	/;"	d	file:
MVNETA_RXD_ERR_RESOURCE	drivers/net/mvneta.c	/^#define MVNETA_RXD_ERR_RESOURCE	/;"	d	file:
MVNETA_RXD_ERR_SUMMARY	drivers/net/mvneta.c	/^#define MVNETA_RXD_ERR_SUMMARY	/;"	d	file:
MVNETA_RXD_FIRST_LAST_DESC	drivers/net/mvneta.c	/^#define MVNETA_RXD_FIRST_LAST_DESC	/;"	d	file:
MVNETA_RXD_L3_IP4	drivers/net/mvneta.c	/^#define MVNETA_RXD_L3_IP4	/;"	d	file:
MVNETA_RXD_L4_CSUM_OK	drivers/net/mvneta.c	/^#define MVNETA_RXD_L4_CSUM_OK	/;"	d	file:
MVNETA_RXQ_ADD_NON_OCCUPIED_MAX	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_ADD_NON_OCCUPIED_MAX /;"	d	file:
MVNETA_RXQ_ADD_NON_OCCUPIED_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_ADD_NON_OCCUPIED_SHIFT /;"	d	file:
MVNETA_RXQ_BASE_ADDR_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_BASE_ADDR_REG(/;"	d	file:
MVNETA_RXQ_BUF_SIZE_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_BUF_SIZE_MASK /;"	d	file:
MVNETA_RXQ_BUF_SIZE_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_BUF_SIZE_SHIFT /;"	d	file:
MVNETA_RXQ_CMD	drivers/net/mvneta.c	/^#define MVNETA_RXQ_CMD /;"	d	file:
MVNETA_RXQ_CONFIG_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_CONFIG_REG(/;"	d	file:
MVNETA_RXQ_DISABLE_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_DISABLE_SHIFT /;"	d	file:
MVNETA_RXQ_ENABLE_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_ENABLE_MASK /;"	d	file:
MVNETA_RXQ_HW_BUF_ALLOC	drivers/net/mvneta.c	/^#define	     MVNETA_RXQ_HW_BUF_ALLOC /;"	d	file:
MVNETA_RXQ_NON_OCCUPIED	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_NON_OCCUPIED(/;"	d	file:
MVNETA_RXQ_OCCUPIED_ALL_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_OCCUPIED_ALL_MASK /;"	d	file:
MVNETA_RXQ_PKT_OFFSET_ALL_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_PKT_OFFSET_ALL_MASK /;"	d	file:
MVNETA_RXQ_PKT_OFFSET_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RXQ_PKT_OFFSET_MASK(/;"	d	file:
MVNETA_RXQ_SIZE_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_SIZE_REG(/;"	d	file:
MVNETA_RXQ_STATUS_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_STATUS_REG(/;"	d	file:
MVNETA_RXQ_STATUS_UPDATE_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_STATUS_UPDATE_REG(/;"	d	file:
MVNETA_RXQ_THRESHOLD_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_THRESHOLD_REG(/;"	d	file:
MVNETA_RXQ_TIME_COAL_REG	drivers/net/mvneta.c	/^#define MVNETA_RXQ_TIME_COAL_REG(/;"	d	file:
MVNETA_RX_BRST_SZ_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RX_BRST_SZ_MASK(/;"	d	file:
MVNETA_RX_COAL_PKTS	drivers/net/mvneta.c	/^#define MVNETA_RX_COAL_PKTS	/;"	d	file:
MVNETA_RX_COAL_USEC	drivers/net/mvneta.c	/^#define MVNETA_RX_COAL_USEC	/;"	d	file:
MVNETA_RX_CSUM_WITH_PSEUDO_HDR	drivers/net/mvneta.c	/^#define      MVNETA_RX_CSUM_WITH_PSEUDO_HDR /;"	d	file:
MVNETA_RX_DISABLE_TIMEOUT_MSEC	drivers/net/mvneta.c	/^#define MVNETA_RX_DISABLE_TIMEOUT_MSEC	/;"	d	file:
MVNETA_RX_INTR_MASK	drivers/net/mvneta.c	/^#define      MVNETA_RX_INTR_MASK(/;"	d	file:
MVNETA_RX_INTR_MASK_ALL	drivers/net/mvneta.c	/^#define      MVNETA_RX_INTR_MASK_ALL /;"	d	file:
MVNETA_RX_MIN_FRAME_SIZE	drivers/net/mvneta.c	/^#define MVNETA_RX_MIN_FRAME_SIZE /;"	d	file:
MVNETA_RX_NO_DATA_SWAP	drivers/net/mvneta.c	/^#define      MVNETA_RX_NO_DATA_SWAP /;"	d	file:
MVNETA_SDMA_BRST_SIZE_16	drivers/net/mvneta.c	/^#define      MVNETA_SDMA_BRST_SIZE_16 /;"	d	file:
MVNETA_SDMA_CONFIG	drivers/net/mvneta.c	/^#define MVNETA_SDMA_CONFIG /;"	d	file:
MVNETA_SERDES_CFG	drivers/net/mvneta.c	/^#define MVNETA_SERDES_CFG	/;"	d	file:
MVNETA_SGMII_SERDES_PROTO	drivers/net/mvneta.c	/^#define      MVNETA_SGMII_SERDES_PROTO	/;"	d	file:
MVNETA_SMI	drivers/net/mvneta.c	/^#define MVNETA_SMI /;"	d	file:
MVNETA_SMI_BUSY	drivers/net/mvneta.c	/^#define     MVNETA_SMI_BUSY	/;"	d	file:
MVNETA_SMI_DATA_MASK	drivers/net/mvneta.c	/^#define     MVNETA_SMI_DATA_MASK	/;"	d	file:
MVNETA_SMI_DATA_OFFS	drivers/net/mvneta.c	/^#define     MVNETA_SMI_DATA_OFFS	/;"	d	file:
MVNETA_SMI_DEV_ADDR_OFFS	drivers/net/mvneta.c	/^#define     MVNETA_SMI_DEV_ADDR_OFFS	/;"	d	file:
MVNETA_SMI_OPCODE_OFFS	drivers/net/mvneta.c	/^#define     MVNETA_SMI_OPCODE_OFFS	/;"	d	file:
MVNETA_SMI_OPCODE_READ	drivers/net/mvneta.c	/^#define     MVNETA_SMI_OPCODE_READ	/;"	d	file:
MVNETA_SMI_READ_VALID	drivers/net/mvneta.c	/^#define     MVNETA_SMI_READ_VALID	/;"	d	file:
MVNETA_SMI_REG_ADDR_OFFS	drivers/net/mvneta.c	/^#define     MVNETA_SMI_REG_ADDR_OFFS	/;"	d	file:
MVNETA_SMI_TIMEOUT	drivers/net/mvneta.c	/^#define MVNETA_SMI_TIMEOUT	/;"	d	file:
MVNETA_TXDONE_COAL_PKTS	drivers/net/mvneta.c	/^#define MVNETA_TXDONE_COAL_PKTS	/;"	d	file:
MVNETA_TXD_FLZ_DESC	drivers/net/mvneta.c	/^#define MVNETA_TXD_FLZ_DESC	/;"	d	file:
MVNETA_TXD_F_DESC	drivers/net/mvneta.c	/^#define MVNETA_TXD_F_DESC	/;"	d	file:
MVNETA_TXD_IP_CSUM	drivers/net/mvneta.c	/^#define MVNETA_TXD_IP_CSUM	/;"	d	file:
MVNETA_TXD_L_DESC	drivers/net/mvneta.c	/^#define MVNETA_TXD_L_DESC	/;"	d	file:
MVNETA_TXD_Z_PAD	drivers/net/mvneta.c	/^#define MVNETA_TXD_Z_PAD	/;"	d	file:
MVNETA_TXQ_BASE_ADDR_REG	drivers/net/mvneta.c	/^#define MVNETA_TXQ_BASE_ADDR_REG(/;"	d	file:
MVNETA_TXQ_CMD	drivers/net/mvneta.c	/^#define MVNETA_TXQ_CMD /;"	d	file:
MVNETA_TXQ_CMD_1	drivers/net/mvneta.c	/^#define MVNETA_TXQ_CMD_1 /;"	d	file:
MVNETA_TXQ_DEC_SENT_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_DEC_SENT_SHIFT /;"	d	file:
MVNETA_TXQ_DISABLE_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_DISABLE_SHIFT /;"	d	file:
MVNETA_TXQ_ENABLE_MASK	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_ENABLE_MASK /;"	d	file:
MVNETA_TXQ_SENT_DESC_MASK	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_SENT_DESC_MASK /;"	d	file:
MVNETA_TXQ_SENT_DESC_SHIFT	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_SENT_DESC_SHIFT /;"	d	file:
MVNETA_TXQ_SENT_THRESH_ALL_MASK	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_SENT_THRESH_ALL_MASK /;"	d	file:
MVNETA_TXQ_SENT_THRESH_MASK	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_SENT_THRESH_MASK(/;"	d	file:
MVNETA_TXQ_SIZE_REG	drivers/net/mvneta.c	/^#define MVNETA_TXQ_SIZE_REG(/;"	d	file:
MVNETA_TXQ_STATUS_REG	drivers/net/mvneta.c	/^#define MVNETA_TXQ_STATUS_REG(/;"	d	file:
MVNETA_TXQ_TOKEN_SIZE_MAX	drivers/net/mvneta.c	/^#define      MVNETA_TXQ_TOKEN_SIZE_MAX /;"	d	file:
MVNETA_TXQ_TOKEN_SIZE_REG	drivers/net/mvneta.c	/^#define MVNETA_TXQ_TOKEN_SIZE_REG(/;"	d	file:
MVNETA_TXQ_UPDATE_REG	drivers/net/mvneta.c	/^#define MVNETA_TXQ_UPDATE_REG(/;"	d	file:
MVNETA_TX_BRST_SZ_MASK	drivers/net/mvneta.c	/^#define      MVNETA_TX_BRST_SZ_MASK(/;"	d	file:
MVNETA_TX_CSUM_MAX_SIZE	drivers/net/mvneta.c	/^#define MVNETA_TX_CSUM_MAX_SIZE	/;"	d	file:
MVNETA_TX_DISABLE_TIMEOUT_MSEC	drivers/net/mvneta.c	/^#define MVNETA_TX_DISABLE_TIMEOUT_MSEC	/;"	d	file:
MVNETA_TX_FIFO_EMPTY	drivers/net/mvneta.c	/^#define      MVNETA_TX_FIFO_EMPTY /;"	d	file:
MVNETA_TX_FIFO_EMPTY_TIMEOUT	drivers/net/mvneta.c	/^#define MVNETA_TX_FIFO_EMPTY_TIMEOUT	/;"	d	file:
MVNETA_TX_INTR_MASK	drivers/net/mvneta.c	/^#define      MVNETA_TX_INTR_MASK(/;"	d	file:
MVNETA_TX_INTR_MASK_ALL	drivers/net/mvneta.c	/^#define      MVNETA_TX_INTR_MASK_ALL /;"	d	file:
MVNETA_TX_IN_PRGRS	drivers/net/mvneta.c	/^#define      MVNETA_TX_IN_PRGRS /;"	d	file:
MVNETA_TX_IP_HLEN_SHIFT	drivers/net/mvneta.c	/^#define MVNETA_TX_IP_HLEN_SHIFT	/;"	d	file:
MVNETA_TX_L3_IP6	drivers/net/mvneta.c	/^#define MVNETA_TX_L3_IP6	/;"	d	file:
MVNETA_TX_L3_OFF_SHIFT	drivers/net/mvneta.c	/^#define MVNETA_TX_L3_OFF_SHIFT	/;"	d	file:
MVNETA_TX_L4_CSUM_FULL	drivers/net/mvneta.c	/^#define MVNETA_TX_L4_CSUM_FULL	/;"	d	file:
MVNETA_TX_L4_CSUM_NOT	drivers/net/mvneta.c	/^#define MVNETA_TX_L4_CSUM_NOT	/;"	d	file:
MVNETA_TX_L4_UDP	drivers/net/mvneta.c	/^#define MVNETA_TX_L4_UDP	/;"	d	file:
MVNETA_TX_MTU	drivers/net/mvneta.c	/^#define MVNETA_TX_MTU /;"	d	file:
MVNETA_TX_MTU_MAX	drivers/net/mvneta.c	/^#define MVNETA_TX_MTU_MAX	/;"	d	file:
MVNETA_TX_NO_DATA_SWAP	drivers/net/mvneta.c	/^#define      MVNETA_TX_NO_DATA_SWAP /;"	d	file:
MVNETA_TX_TOKEN_SIZE	drivers/net/mvneta.c	/^#define MVNETA_TX_TOKEN_SIZE /;"	d	file:
MVNETA_TX_TOKEN_SIZE_MAX	drivers/net/mvneta.c	/^#define      MVNETA_TX_TOKEN_SIZE_MAX /;"	d	file:
MVNETA_TX_UNSET_ERR_SUM	drivers/net/mvneta.c	/^#define      MVNETA_TX_UNSET_ERR_SUM /;"	d	file:
MVNETA_TYPE_PRIO	drivers/net/mvneta.c	/^#define MVNETA_TYPE_PRIO /;"	d	file:
MVNETA_UNIT_CONTROL	drivers/net/mvneta.c	/^#define MVNETA_UNIT_CONTROL /;"	d	file:
MVNETA_UNIT_INTR_CAUSE	drivers/net/mvneta.c	/^#define MVNETA_UNIT_INTR_CAUSE /;"	d	file:
MVNETA_UNI_PROMISC_MODE	drivers/net/mvneta.c	/^#define      MVNETA_UNI_PROMISC_MODE /;"	d	file:
MVNETA_VLAN_TAG_LEN	drivers/net/mvneta.c	/^#define MVNETA_VLAN_TAG_LEN /;"	d	file:
MVNETA_WIN_BASE	drivers/net/mvneta.c	/^#define MVNETA_WIN_BASE(/;"	d	file:
MVNETA_WIN_REMAP	drivers/net/mvneta.c	/^#define MVNETA_WIN_REMAP(/;"	d	file:
MVNETA_WIN_SIZE	drivers/net/mvneta.c	/^#define MVNETA_WIN_SIZE(/;"	d	file:
MVNETA_WIN_SIZE_MASK	drivers/net/mvneta.c	/^#define MVNETA_WIN_SIZE_MASK	/;"	d	file:
MVPP2	drivers/net/Kconfig	/^config MVPP2$/;"	c
MVPP2_AGGR_TXQ_DESC_ADDR_REG	drivers/net/mvpp2.c	/^#define MVPP2_AGGR_TXQ_DESC_ADDR_REG(/;"	d	file:
MVPP2_AGGR_TXQ_DESC_SIZE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_AGGR_TXQ_DESC_SIZE_MASK	/;"	d	file:
MVPP2_AGGR_TXQ_DESC_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_AGGR_TXQ_DESC_SIZE_REG(/;"	d	file:
MVPP2_AGGR_TXQ_INDEX_REG	drivers/net/mvpp2.c	/^#define MVPP2_AGGR_TXQ_INDEX_REG(/;"	d	file:
MVPP2_AGGR_TXQ_PENDING_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_AGGR_TXQ_PENDING_MASK	/;"	d	file:
MVPP2_AGGR_TXQ_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_AGGR_TXQ_SIZE	/;"	d	file:
MVPP2_AGGR_TXQ_STATUS_REG	drivers/net/mvpp2.c	/^#define MVPP2_AGGR_TXQ_STATUS_REG(/;"	d	file:
MVPP2_AGGR_TXQ_UPDATE_REG	drivers/net/mvpp2.c	/^#define MVPP2_AGGR_TXQ_UPDATE_REG	/;"	d	file:
MVPP2_BASE_ADDR_ENABLE	drivers/net/mvpp2.c	/^#define MVPP2_BASE_ADDR_ENABLE	/;"	d	file:
MVPP2_BIT_TO_BYTE	drivers/net/mvpp2.c	/^#define MVPP2_BIT_TO_BYTE(/;"	d	file:
MVPP2_BM_ALLOC_FAILED_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_ALLOC_FAILED_MASK	/;"	d	file:
MVPP2_BM_AVAILABLE_BP_LOW_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_AVAILABLE_BP_LOW_MASK	/;"	d	file:
MVPP2_BM_BPPE_EMPTY_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_BPPE_EMPTY_MASK	/;"	d	file:
MVPP2_BM_BPPE_FULL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_BPPE_FULL_MASK	/;"	d	file:
MVPP2_BM_BPPI_PREFETCH_FULL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_BPPI_PREFETCH_FULL_MASK	/;"	d	file:
MVPP2_BM_BPPI_PTRS_NUM_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_BPPI_PTRS_NUM_REG(/;"	d	file:
MVPP2_BM_BPPI_PTR_NUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_BPPI_PTR_NUM_MASK	/;"	d	file:
MVPP2_BM_BPPI_READ_PTR_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_BPPI_READ_PTR_REG(/;"	d	file:
MVPP2_BM_COOKIE_CPU_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_BM_COOKIE_CPU_OFFS	/;"	d	file:
MVPP2_BM_COOKIE_POOL_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_BM_COOKIE_POOL_OFFS	/;"	d	file:
MVPP2_BM_FORCE_RELEASE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_FORCE_RELEASE_MASK	/;"	d	file:
MVPP2_BM_FREE	drivers/net/mvpp2.c	/^	MVPP2_BM_FREE,$/;"	e	enum:mvpp2_bm_type	file:
MVPP2_BM_HIGH_THRESH_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_HIGH_THRESH_MASK	/;"	d	file:
MVPP2_BM_HIGH_THRESH_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_BM_HIGH_THRESH_OFFS	/;"	d	file:
MVPP2_BM_HIGH_THRESH_VALUE	drivers/net/mvpp2.c	/^#define     MVPP2_BM_HIGH_THRESH_VALUE(/;"	d	file:
MVPP2_BM_INTR_CAUSE_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_INTR_CAUSE_REG(/;"	d	file:
MVPP2_BM_INTR_MASK_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_INTR_MASK_REG(/;"	d	file:
MVPP2_BM_LONG_BUF_NUM	drivers/net/mvpp2.c	/^#define MVPP2_BM_LONG_BUF_NUM	/;"	d	file:
MVPP2_BM_LOW_THRESH_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_LOW_THRESH_MASK	/;"	d	file:
MVPP2_BM_LOW_THRESH_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_BM_LOW_THRESH_OFFS	/;"	d	file:
MVPP2_BM_LOW_THRESH_VALUE	drivers/net/mvpp2.c	/^#define     MVPP2_BM_LOW_THRESH_VALUE(/;"	d	file:
MVPP2_BM_MC_ID_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_MC_ID_MASK	/;"	d	file:
MVPP2_BM_MC_RLS_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_MC_RLS_REG	/;"	d	file:
MVPP2_BM_PHY_ALLOC_GRNTD_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_PHY_ALLOC_GRNTD_MASK	/;"	d	file:
MVPP2_BM_PHY_ALLOC_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_PHY_ALLOC_REG(/;"	d	file:
MVPP2_BM_PHY_RLS_GRNTD_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_PHY_RLS_GRNTD_MASK	/;"	d	file:
MVPP2_BM_PHY_RLS_MC_BUFF_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_PHY_RLS_MC_BUFF_MASK	/;"	d	file:
MVPP2_BM_PHY_RLS_PRIO_EN_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_PHY_RLS_PRIO_EN_MASK	/;"	d	file:
MVPP2_BM_PHY_RLS_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_PHY_RLS_REG(/;"	d	file:
MVPP2_BM_POOLS_NUM	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOLS_NUM	/;"	d	file:
MVPP2_BM_POOL_BASE_ADDR_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_POOL_BASE_ADDR_MASK	/;"	d	file:
MVPP2_BM_POOL_BASE_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_BASE_REG(/;"	d	file:
MVPP2_BM_POOL_CTRL_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_CTRL_REG(/;"	d	file:
MVPP2_BM_POOL_GET_READ_PTR_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_POOL_GET_READ_PTR_MASK	/;"	d	file:
MVPP2_BM_POOL_PTRS_NUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_POOL_PTRS_NUM_MASK	/;"	d	file:
MVPP2_BM_POOL_PTRS_NUM_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_PTRS_NUM_REG(/;"	d	file:
MVPP2_BM_POOL_PTR_ALIGN	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_PTR_ALIGN	/;"	d	file:
MVPP2_BM_POOL_READ_PTR_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_READ_PTR_REG(/;"	d	file:
MVPP2_BM_POOL_SIZE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_POOL_SIZE_MASK	/;"	d	file:
MVPP2_BM_POOL_SIZE_MAX	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_SIZE_MAX	/;"	d	file:
MVPP2_BM_POOL_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_POOL_SIZE_REG(/;"	d	file:
MVPP2_BM_RELEASED_DELAY_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_RELEASED_DELAY_MASK	/;"	d	file:
MVPP2_BM_SHORT_BUF_NUM	drivers/net/mvpp2.c	/^#define MVPP2_BM_SHORT_BUF_NUM	/;"	d	file:
MVPP2_BM_SHORT_PKT_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_BM_SHORT_PKT_SIZE	/;"	d	file:
MVPP2_BM_START_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_START_MASK	/;"	d	file:
MVPP2_BM_STATE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_STATE_MASK	/;"	d	file:
MVPP2_BM_STOP_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_BM_STOP_MASK	/;"	d	file:
MVPP2_BM_SWF_LONG	drivers/net/mvpp2.c	/^	MVPP2_BM_SWF_LONG,$/;"	e	enum:mvpp2_bm_type	file:
MVPP2_BM_SWF_LONG_POOL	drivers/net/mvpp2.c	/^#define MVPP2_BM_SWF_LONG_POOL(/;"	d	file:
MVPP2_BM_SWF_SHORT	drivers/net/mvpp2.c	/^	MVPP2_BM_SWF_SHORT$/;"	e	enum:mvpp2_bm_type	file:
MVPP2_BM_VIRT_ALLOC_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_VIRT_ALLOC_REG	/;"	d	file:
MVPP2_BM_VIRT_RLS_REG	drivers/net/mvpp2.c	/^#define MVPP2_BM_VIRT_RLS_REG	/;"	d	file:
MVPP2_B_HDR_INFO_IS_LAST	drivers/net/mvpp2.c	/^#define MVPP2_B_HDR_INFO_IS_LAST(/;"	d	file:
MVPP2_B_HDR_INFO_LAST_MASK	drivers/net/mvpp2.c	/^#define MVPP2_B_HDR_INFO_LAST_MASK	/;"	d	file:
MVPP2_B_HDR_INFO_LAST_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_B_HDR_INFO_LAST_OFFS	/;"	d	file:
MVPP2_B_HDR_INFO_MC_ID	drivers/net/mvpp2.c	/^#define MVPP2_B_HDR_INFO_MC_ID(/;"	d	file:
MVPP2_B_HDR_INFO_MC_ID_MASK	drivers/net/mvpp2.c	/^#define MVPP2_B_HDR_INFO_MC_ID_MASK	/;"	d	file:
MVPP2_CAUSE_FCS_ERR_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_FCS_ERR_MASK	/;"	d	file:
MVPP2_CAUSE_MISC_SUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_MISC_SUM_MASK	/;"	d	file:
MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK	/;"	d	file:
MVPP2_CAUSE_RX_EXCEPTION_SUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_RX_EXCEPTION_SUM_MASK	/;"	d	file:
MVPP2_CAUSE_RX_FIFO_OVERRUN_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_RX_FIFO_OVERRUN_MASK	/;"	d	file:
MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK	/;"	d	file:
MVPP2_CAUSE_TXQ_SENT_DESC_ALL_MASK	drivers/net/mvpp2.c	/^#define MVPP2_CAUSE_TXQ_SENT_DESC_ALL_MASK	/;"	d	file:
MVPP2_CAUSE_TX_EXCEPTION_SUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_TX_EXCEPTION_SUM_MASK	/;"	d	file:
MVPP2_CAUSE_TX_FIFO_UNDERRUN_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CAUSE_TX_FIFO_UNDERRUN_MASK	/;"	d	file:
MVPP2_CLS_FLOWS_TBL_DATA_WORDS	drivers/net/mvpp2.c	/^#define MVPP2_CLS_FLOWS_TBL_DATA_WORDS	/;"	d	file:
MVPP2_CLS_FLOWS_TBL_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_CLS_FLOWS_TBL_SIZE	/;"	d	file:
MVPP2_CLS_FLOW_INDEX_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_FLOW_INDEX_REG	/;"	d	file:
MVPP2_CLS_FLOW_TBL0_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_FLOW_TBL0_REG	/;"	d	file:
MVPP2_CLS_FLOW_TBL1_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_FLOW_TBL1_REG	/;"	d	file:
MVPP2_CLS_FLOW_TBL2_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_FLOW_TBL2_REG	/;"	d	file:
MVPP2_CLS_LKP_INDEX_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_LKP_INDEX_REG	/;"	d	file:
MVPP2_CLS_LKP_INDEX_WAY_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_LKP_INDEX_WAY_OFFS	/;"	d	file:
MVPP2_CLS_LKP_TBL_LOOKUP_EN_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_LKP_TBL_LOOKUP_EN_MASK	/;"	d	file:
MVPP2_CLS_LKP_TBL_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_LKP_TBL_REG	/;"	d	file:
MVPP2_CLS_LKP_TBL_RXQ_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_LKP_TBL_RXQ_MASK	/;"	d	file:
MVPP2_CLS_LKP_TBL_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_CLS_LKP_TBL_SIZE	/;"	d	file:
MVPP2_CLS_MODE_ACTIVE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_MODE_ACTIVE_MASK	/;"	d	file:
MVPP2_CLS_MODE_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_MODE_REG	/;"	d	file:
MVPP2_CLS_OVERSIZE_RXQ_LOW_BITS	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_OVERSIZE_RXQ_LOW_BITS	/;"	d	file:
MVPP2_CLS_OVERSIZE_RXQ_LOW_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_OVERSIZE_RXQ_LOW_MASK	/;"	d	file:
MVPP2_CLS_OVERSIZE_RXQ_LOW_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_OVERSIZE_RXQ_LOW_REG(/;"	d	file:
MVPP2_CLS_PORT_WAY_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_PORT_WAY_MASK(/;"	d	file:
MVPP2_CLS_PORT_WAY_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_PORT_WAY_REG	/;"	d	file:
MVPP2_CLS_SWFWD_P2HQ_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_SWFWD_P2HQ_REG(/;"	d	file:
MVPP2_CLS_SWFWD_PCTRL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_CLS_SWFWD_PCTRL_MASK(/;"	d	file:
MVPP2_CLS_SWFWD_PCTRL_REG	drivers/net/mvpp2.c	/^#define MVPP2_CLS_SWFWD_PCTRL_REG	/;"	d	file:
MVPP2_CPU_DESC_CHUNK	drivers/net/mvpp2.c	/^#define MVPP2_CPU_DESC_CHUNK	/;"	d	file:
MVPP2_CPU_D_CACHE_LINE_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_CPU_D_CACHE_LINE_SIZE	/;"	d	file:
MVPP2_DEFAULT_RXQ	drivers/net/mvpp2.c	/^#define MVPP2_DEFAULT_RXQ	/;"	d	file:
MVPP2_DEFAULT_TXQ	drivers/net/mvpp2.c	/^#define MVPP2_DEFAULT_TXQ	/;"	d	file:
MVPP2_DESC_ALIGNED_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_DESC_ALIGNED_SIZE	/;"	d	file:
MVPP2_DRIVER_NAME	drivers/net/mvpp2.c	/^#define MVPP2_DRIVER_NAME /;"	d	file:
MVPP2_DRIVER_VERSION	drivers/net/mvpp2.c	/^#define MVPP2_DRIVER_VERSION /;"	d	file:
MVPP2_ETH_TYPE_LEN	drivers/net/mvpp2.c	/^#define MVPP2_ETH_TYPE_LEN	/;"	d	file:
MVPP2_EXT_GLOBAL_CTRL_DEFAULT	drivers/net/mvpp2.c	/^#define MVPP2_EXT_GLOBAL_CTRL_DEFAULT	/;"	d	file:
MVPP2_F_LOOPBACK	drivers/net/mvpp2.c	/^#define MVPP2_F_LOOPBACK	/;"	d	file:
MVPP2_GMAC_AN_DUPLEX_EN	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_AN_DUPLEX_EN	/;"	d	file:
MVPP2_GMAC_AN_SPEED_EN	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_AN_SPEED_EN	/;"	d	file:
MVPP2_GMAC_AUTONEG_CONFIG	drivers/net/mvpp2.c	/^#define MVPP2_GMAC_AUTONEG_CONFIG	/;"	d	file:
MVPP2_GMAC_CONFIG_FULL_DUPLEX	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_CONFIG_FULL_DUPLEX	/;"	d	file:
MVPP2_GMAC_CONFIG_GMII_SPEED	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_CONFIG_GMII_SPEED	/;"	d	file:
MVPP2_GMAC_CONFIG_MII_SPEED	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_CONFIG_MII_SPEED	/;"	d	file:
MVPP2_GMAC_CTRL_0_REG	drivers/net/mvpp2.c	/^#define MVPP2_GMAC_CTRL_0_REG	/;"	d	file:
MVPP2_GMAC_CTRL_1_REG	drivers/net/mvpp2.c	/^#define MVPP2_GMAC_CTRL_1_REG	/;"	d	file:
MVPP2_GMAC_CTRL_2_REG	drivers/net/mvpp2.c	/^#define MVPP2_GMAC_CTRL_2_REG	/;"	d	file:
MVPP2_GMAC_FC_ADV_EN	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_FC_ADV_EN	/;"	d	file:
MVPP2_GMAC_FORCE_LINK_DOWN	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_FORCE_LINK_DOWN	/;"	d	file:
MVPP2_GMAC_FORCE_LINK_PASS	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_FORCE_LINK_PASS	/;"	d	file:
MVPP2_GMAC_GMII_LB_EN_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_GMII_LB_EN_MASK	/;"	d	file:
MVPP2_GMAC_INBAND_AN_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_INBAND_AN_MASK	/;"	d	file:
MVPP2_GMAC_MAX_RX_SIZE_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_MAX_RX_SIZE_MASK	/;"	d	file:
MVPP2_GMAC_MAX_RX_SIZE_OFFS	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_MAX_RX_SIZE_OFFS	/;"	d	file:
MVPP2_GMAC_MIB_CNTR_EN_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_MIB_CNTR_EN_MASK	/;"	d	file:
MVPP2_GMAC_PCS_ENABLE_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PCS_ENABLE_MASK	/;"	d	file:
MVPP2_GMAC_PCS_LB_EN_BIT	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PCS_LB_EN_BIT	/;"	d	file:
MVPP2_GMAC_PCS_LB_EN_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PCS_LB_EN_MASK	/;"	d	file:
MVPP2_GMAC_PERIODIC_XON_EN_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PERIODIC_XON_EN_MASK	/;"	d	file:
MVPP2_GMAC_PORT_EN_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PORT_EN_MASK	/;"	d	file:
MVPP2_GMAC_PORT_FIFO_CFG_1_REG	drivers/net/mvpp2.c	/^#define MVPP2_GMAC_PORT_FIFO_CFG_1_REG	/;"	d	file:
MVPP2_GMAC_PORT_RESET_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PORT_RESET_MASK	/;"	d	file:
MVPP2_GMAC_PORT_RGMII_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_PORT_RGMII_MASK	/;"	d	file:
MVPP2_GMAC_SA_LOW_OFFS	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_SA_LOW_OFFS	/;"	d	file:
MVPP2_GMAC_TX_FIFO_MIN_TH_ALL_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_TX_FIFO_MIN_TH_ALL_MASK	/;"	d	file:
MVPP2_GMAC_TX_FIFO_MIN_TH_MASK	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_TX_FIFO_MIN_TH_MASK(/;"	d	file:
MVPP2_GMAC_TX_FIFO_MIN_TH_OFFS	drivers/net/mvpp2.c	/^#define      MVPP2_GMAC_TX_FIFO_MIN_TH_OFFS	/;"	d	file:
MVPP2_IP_LBDT_TYPE	drivers/net/mvpp2.c	/^#define MVPP2_IP_LBDT_TYPE	/;"	d	file:
MVPP2_ISR_DISABLE_INTERRUPT	drivers/net/mvpp2.c	/^#define     MVPP2_ISR_DISABLE_INTERRUPT(/;"	d	file:
MVPP2_ISR_ENABLE_INTERRUPT	drivers/net/mvpp2.c	/^#define     MVPP2_ISR_ENABLE_INTERRUPT(/;"	d	file:
MVPP2_ISR_ENABLE_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_ENABLE_REG(/;"	d	file:
MVPP2_ISR_MISC_CAUSE_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_MISC_CAUSE_REG	/;"	d	file:
MVPP2_ISR_PON_RX_TX_MASK_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_PON_RX_TX_MASK_REG	/;"	d	file:
MVPP2_ISR_RXQ_GROUP_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_RXQ_GROUP_REG(/;"	d	file:
MVPP2_ISR_RX_THRESHOLD_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_RX_THRESHOLD_REG(/;"	d	file:
MVPP2_ISR_RX_TX_CAUSE_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_RX_TX_CAUSE_REG(/;"	d	file:
MVPP2_ISR_RX_TX_MASK_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_RX_TX_MASK_REG(/;"	d	file:
MVPP2_ISR_SUM_MASK_REG	drivers/net/mvpp2.c	/^#define MVPP2_ISR_SUM_MASK_REG	/;"	d	file:
MVPP2_MAX_L3_ADDR_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_MAX_L3_ADDR_SIZE	/;"	d	file:
MVPP2_MAX_PORTS	drivers/net/mvpp2.c	/^#define MVPP2_MAX_PORTS	/;"	d	file:
MVPP2_MAX_RXD	drivers/net/mvpp2.c	/^#define MVPP2_MAX_RXD	/;"	d	file:
MVPP2_MAX_RXQ	drivers/net/mvpp2.c	/^#define MVPP2_MAX_RXQ	/;"	d	file:
MVPP2_MAX_TCONT	drivers/net/mvpp2.c	/^#define MVPP2_MAX_TCONT	/;"	d	file:
MVPP2_MAX_TXD	drivers/net/mvpp2.c	/^#define MVPP2_MAX_TXD	/;"	d	file:
MVPP2_MAX_TXQ	drivers/net/mvpp2.c	/^#define MVPP2_MAX_TXQ	/;"	d	file:
MVPP2_MH_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_MH_SIZE	/;"	d	file:
MVPP2_MIB_COUNTERS_BASE	drivers/net/mvpp2.c	/^#define MVPP2_MIB_COUNTERS_BASE(/;"	d	file:
MVPP2_MIB_LATE_COLLISION	drivers/net/mvpp2.c	/^#define     MVPP2_MIB_LATE_COLLISION	/;"	d	file:
MVPP2_MNG_EXTENDED_GLOBAL_CTRL_REG	drivers/net/mvpp2.c	/^#define MVPP2_MNG_EXTENDED_GLOBAL_CTRL_REG	/;"	d	file:
MVPP2_OCCUPIED_THRESH_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_OCCUPIED_THRESH_MASK	/;"	d	file:
MVPP2_OCCUPIED_THRESH_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_OCCUPIED_THRESH_OFFSET	/;"	d	file:
MVPP2_PE_DROP_ALL	drivers/net/mvpp2.c	/^#define MVPP2_PE_DROP_ALL	/;"	d	file:
MVPP2_PE_DSA_DEFAULT	drivers/net/mvpp2.c	/^#define MVPP2_PE_DSA_DEFAULT	/;"	d	file:
MVPP2_PE_DSA_TAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_DSA_TAGGED	/;"	d	file:
MVPP2_PE_DSA_UNTAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_DSA_UNTAGGED	/;"	d	file:
MVPP2_PE_EDSA_TAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_EDSA_TAGGED	/;"	d	file:
MVPP2_PE_EDSA_UNTAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_EDSA_UNTAGGED	/;"	d	file:
MVPP2_PE_ETH_TYPE_UN	drivers/net/mvpp2.c	/^#define MVPP2_PE_ETH_TYPE_UN	/;"	d	file:
MVPP2_PE_ETYPE_DSA_TAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_ETYPE_DSA_TAGGED	/;"	d	file:
MVPP2_PE_ETYPE_DSA_UNTAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_ETYPE_DSA_UNTAGGED	/;"	d	file:
MVPP2_PE_ETYPE_EDSA_TAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_ETYPE_EDSA_TAGGED	/;"	d	file:
MVPP2_PE_ETYPE_EDSA_UNTAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PE_ETYPE_EDSA_UNTAGGED	/;"	d	file:
MVPP2_PE_FIRST_DEFAULT_FLOW	drivers/net/mvpp2.c	/^#define MVPP2_PE_FIRST_DEFAULT_FLOW	/;"	d	file:
MVPP2_PE_FIRST_FREE_TID	drivers/net/mvpp2.c	/^#define MVPP2_PE_FIRST_FREE_TID	/;"	d	file:
MVPP2_PE_IP4_ADDR_UN	drivers/net/mvpp2.c	/^#define MVPP2_PE_IP4_ADDR_UN	/;"	d	file:
MVPP2_PE_IP4_PROTO_UN	drivers/net/mvpp2.c	/^#define MVPP2_PE_IP4_PROTO_UN	/;"	d	file:
MVPP2_PE_IP6_ADDR_UN	drivers/net/mvpp2.c	/^#define MVPP2_PE_IP6_ADDR_UN	/;"	d	file:
MVPP2_PE_IP6_EXT_PROTO_UN	drivers/net/mvpp2.c	/^#define MVPP2_PE_IP6_EXT_PROTO_UN	/;"	d	file:
MVPP2_PE_IP6_PROTO_UN	drivers/net/mvpp2.c	/^#define MVPP2_PE_IP6_PROTO_UN	/;"	d	file:
MVPP2_PE_LAST_DEFAULT_FLOW	drivers/net/mvpp2.c	/^#define MVPP2_PE_LAST_DEFAULT_FLOW	/;"	d	file:
MVPP2_PE_LAST_FREE_TID	drivers/net/mvpp2.c	/^#define MVPP2_PE_LAST_FREE_TID	/;"	d	file:
MVPP2_PE_MAC_MC_ALL	drivers/net/mvpp2.c	/^#define MVPP2_PE_MAC_MC_ALL	/;"	d	file:
MVPP2_PE_MAC_MC_IP6	drivers/net/mvpp2.c	/^#define MVPP2_PE_MAC_MC_IP6	/;"	d	file:
MVPP2_PE_MAC_NON_PROMISCUOUS	drivers/net/mvpp2.c	/^#define MVPP2_PE_MAC_NON_PROMISCUOUS	/;"	d	file:
MVPP2_PE_MAC_PROMISCUOUS	drivers/net/mvpp2.c	/^#define MVPP2_PE_MAC_PROMISCUOUS	/;"	d	file:
MVPP2_PE_MH_DEFAULT	drivers/net/mvpp2.c	/^#define MVPP2_PE_MH_DEFAULT	/;"	d	file:
MVPP2_PE_VLAN_DBL	drivers/net/mvpp2.c	/^#define MVPP2_PE_VLAN_DBL	/;"	d	file:
MVPP2_PE_VLAN_NONE	drivers/net/mvpp2.c	/^#define MVPP2_PE_VLAN_NONE	/;"	d	file:
MVPP2_PHY_ADDR_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PHY_ADDR_MASK	/;"	d	file:
MVPP2_PHY_AN_CFG0_REG	drivers/net/mvpp2.c	/^#define MVPP2_PHY_AN_CFG0_REG	/;"	d	file:
MVPP2_PHY_AN_STOP_SMI0_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PHY_AN_STOP_SMI0_MASK	/;"	d	file:
MVPP2_PHY_REG_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PHY_REG_MASK	/;"	d	file:
MVPP2_PON_CAUSE_MISC_SUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PON_CAUSE_MISC_SUM_MASK	/;"	d	file:
MVPP2_PON_CAUSE_RXQ_OCCUP_DESC_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PON_CAUSE_RXQ_OCCUP_DESC_ALL_MASK	/;"	d	file:
MVPP2_PON_CAUSE_TXP_OCCUP_DESC_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PON_CAUSE_TXP_OCCUP_DESC_ALL_MASK	/;"	d	file:
MVPP2_POOL_BUF_SIZE_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_POOL_BUF_SIZE_OFFSET	/;"	d	file:
MVPP2_POOL_BUF_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_POOL_BUF_SIZE_REG(/;"	d	file:
MVPP2_PPPOE_HDR_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_PPPOE_HDR_SIZE	/;"	d	file:
MVPP2_PREF_BUF_PTR	drivers/net/mvpp2.c	/^#define     MVPP2_PREF_BUF_PTR(/;"	d	file:
MVPP2_PREF_BUF_SIZE_16	drivers/net/mvpp2.c	/^#define     MVPP2_PREF_BUF_SIZE_16	/;"	d	file:
MVPP2_PREF_BUF_SIZE_4	drivers/net/mvpp2.c	/^#define     MVPP2_PREF_BUF_SIZE_4	/;"	d	file:
MVPP2_PREF_BUF_THRESH	drivers/net/mvpp2.c	/^#define     MVPP2_PREF_BUF_THRESH(/;"	d	file:
MVPP2_PRS_AI_BITS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_AI_BITS	/;"	d	file:
MVPP2_PRS_DBL_VLANS_MAX	drivers/net/mvpp2.c	/^#define MVPP2_PRS_DBL_VLANS_MAX	/;"	d	file:
MVPP2_PRS_DBL_VLAN_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_DBL_VLAN_AI_BIT	/;"	d	file:
MVPP2_PRS_DSA	drivers/net/mvpp2.c	/^#define MVPP2_PRS_DSA	/;"	d	file:
MVPP2_PRS_EDSA	drivers/net/mvpp2.c	/^#define MVPP2_PRS_EDSA	/;"	d	file:
MVPP2_PRS_FLOW_ID_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_FLOW_ID_MASK	/;"	d	file:
MVPP2_PRS_FLOW_ID_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_FLOW_ID_SIZE	/;"	d	file:
MVPP2_PRS_INIT_LOOKUP_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_INIT_LOOKUP_REG	/;"	d	file:
MVPP2_PRS_INIT_OFFS_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_INIT_OFFS_REG(/;"	d	file:
MVPP2_PRS_INIT_OFF_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_INIT_OFF_MASK(/;"	d	file:
MVPP2_PRS_INIT_OFF_VAL	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_INIT_OFF_VAL(/;"	d	file:
MVPP2_PRS_IPV4_BC_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_BC_MASK	/;"	d	file:
MVPP2_PRS_IPV4_DIP_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_DIP_AI_BIT	/;"	d	file:
MVPP2_PRS_IPV4_HEAD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_HEAD	/;"	d	file:
MVPP2_PRS_IPV4_HEAD_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_HEAD_MASK	/;"	d	file:
MVPP2_PRS_IPV4_IHL	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_IHL	/;"	d	file:
MVPP2_PRS_IPV4_IHL_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_IHL_MASK	/;"	d	file:
MVPP2_PRS_IPV4_MC	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_MC	/;"	d	file:
MVPP2_PRS_IPV4_MC_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV4_MC_MASK	/;"	d	file:
MVPP2_PRS_IPV6_EXT_AH_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_EXT_AH_AI_BIT	/;"	d	file:
MVPP2_PRS_IPV6_EXT_AH_L4_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_EXT_AH_L4_AI_BIT	/;"	d	file:
MVPP2_PRS_IPV6_EXT_AH_LEN_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_EXT_AH_LEN_AI_BIT	/;"	d	file:
MVPP2_PRS_IPV6_EXT_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_EXT_AI_BIT	/;"	d	file:
MVPP2_PRS_IPV6_HOP_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_HOP_MASK	/;"	d	file:
MVPP2_PRS_IPV6_MC	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_MC	/;"	d	file:
MVPP2_PRS_IPV6_MC_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_MC_MASK	/;"	d	file:
MVPP2_PRS_IPV6_NO_EXT_AI_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_IPV6_NO_EXT_AI_BIT	/;"	d	file:
MVPP2_PRS_L3_BROAD_CAST	drivers/net/mvpp2.c	/^	MVPP2_PRS_L3_BROAD_CAST$/;"	e	enum:mvpp2_prs_l3_cast	file:
MVPP2_PRS_L3_MULTI_CAST	drivers/net/mvpp2.c	/^	MVPP2_PRS_L3_MULTI_CAST,$/;"	e	enum:mvpp2_prs_l3_cast	file:
MVPP2_PRS_L3_UNI_CAST	drivers/net/mvpp2.c	/^	MVPP2_PRS_L3_UNI_CAST,$/;"	e	enum:mvpp2_prs_l3_cast	file:
MVPP2_PRS_LU_DSA	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_DSA,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_FLOWS	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_FLOWS,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_IP4	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_IP4,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_IP6	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_IP6,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_L2	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_L2,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_LAST	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_LAST,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_MAC	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_MAC,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_LU_MASK	/;"	d	file:
MVPP2_PRS_LU_MH	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_MH,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_PPPOE	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_PPPOE,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_LU_VLAN	drivers/net/mvpp2.c	/^	MVPP2_PRS_LU_VLAN,$/;"	e	enum:mvpp2_prs_lookup	file:
MVPP2_PRS_MAX_LOOP_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_MAX_LOOP_MASK(/;"	d	file:
MVPP2_PRS_MAX_LOOP_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_MAX_LOOP_REG(/;"	d	file:
MVPP2_PRS_MAX_LOOP_VAL	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_MAX_LOOP_VAL(/;"	d	file:
MVPP2_PRS_PORT_LU_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_PORT_LU_MASK(/;"	d	file:
MVPP2_PRS_PORT_LU_MAX	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_PORT_LU_MAX	/;"	d	file:
MVPP2_PRS_PORT_LU_VAL	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_PORT_LU_VAL(/;"	d	file:
MVPP2_PRS_PORT_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_PORT_MASK	/;"	d	file:
MVPP2_PRS_RI_CPU_CODE_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_CPU_CODE_MASK	/;"	d	file:
MVPP2_PRS_RI_CPU_CODE_RX_SPEC	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_CPU_CODE_RX_SPEC	/;"	d	file:
MVPP2_PRS_RI_DROP_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_DROP_MASK	/;"	d	file:
MVPP2_PRS_RI_DSA_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_DSA_MASK	/;"	d	file:
MVPP2_PRS_RI_IP_FRAG_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_IP_FRAG_MASK	/;"	d	file:
MVPP2_PRS_RI_L2_BCAST	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L2_BCAST	/;"	d	file:
MVPP2_PRS_RI_L2_CAST_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L2_CAST_MASK	/;"	d	file:
MVPP2_PRS_RI_L2_MCAST	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L2_MCAST	/;"	d	file:
MVPP2_PRS_RI_L2_UCAST	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L2_UCAST	/;"	d	file:
MVPP2_PRS_RI_L3_ADDR_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_ADDR_MASK	/;"	d	file:
MVPP2_PRS_RI_L3_ARP	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_ARP	/;"	d	file:
MVPP2_PRS_RI_L3_BCAST	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_BCAST	/;"	d	file:
MVPP2_PRS_RI_L3_IP4	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_IP4	/;"	d	file:
MVPP2_PRS_RI_L3_IP4_OPT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_IP4_OPT	/;"	d	file:
MVPP2_PRS_RI_L3_IP4_OTHER	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_IP4_OTHER	/;"	d	file:
MVPP2_PRS_RI_L3_IP6	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_IP6	/;"	d	file:
MVPP2_PRS_RI_L3_IP6_EXT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_IP6_EXT	/;"	d	file:
MVPP2_PRS_RI_L3_MCAST	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_MCAST	/;"	d	file:
MVPP2_PRS_RI_L3_PROTO_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_PROTO_MASK	/;"	d	file:
MVPP2_PRS_RI_L3_UCAST	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_UCAST	/;"	d	file:
MVPP2_PRS_RI_L3_UN	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L3_UN	/;"	d	file:
MVPP2_PRS_RI_L4_OTHER	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L4_OTHER	/;"	d	file:
MVPP2_PRS_RI_L4_PROTO_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L4_PROTO_MASK	/;"	d	file:
MVPP2_PRS_RI_L4_TCP	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L4_TCP	/;"	d	file:
MVPP2_PRS_RI_L4_UDP	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_L4_UDP	/;"	d	file:
MVPP2_PRS_RI_MAC_ME_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_MAC_ME_MASK	/;"	d	file:
MVPP2_PRS_RI_PPPOE_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_PPPOE_MASK	/;"	d	file:
MVPP2_PRS_RI_UDF3_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_UDF3_MASK	/;"	d	file:
MVPP2_PRS_RI_UDF3_RX_SPECIAL	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_UDF3_RX_SPECIAL	/;"	d	file:
MVPP2_PRS_RI_UDF7_IP6_LITE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_UDF7_IP6_LITE	/;"	d	file:
MVPP2_PRS_RI_UDF7_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_UDF7_MASK	/;"	d	file:
MVPP2_PRS_RI_VLAN_DOUBLE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_VLAN_DOUBLE	/;"	d	file:
MVPP2_PRS_RI_VLAN_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_VLAN_MASK	/;"	d	file:
MVPP2_PRS_RI_VLAN_NONE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_VLAN_NONE	/;"	d	file:
MVPP2_PRS_RI_VLAN_SINGLE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_VLAN_SINGLE	/;"	d	file:
MVPP2_PRS_RI_VLAN_TRIPLE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_RI_VLAN_TRIPLE	/;"	d	file:
MVPP2_PRS_SINGLE_VLAN_AI	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SINGLE_VLAN_AI	/;"	d	file:
MVPP2_PRS_SRAM_AI_CTRL_BITS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_AI_CTRL_BITS	/;"	d	file:
MVPP2_PRS_SRAM_AI_CTRL_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_AI_CTRL_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_AI_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_AI_MASK	/;"	d	file:
MVPP2_PRS_SRAM_AI_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_AI_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_DATA_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_DATA_REG(/;"	d	file:
MVPP2_PRS_SRAM_IDX_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_IDX_REG	/;"	d	file:
MVPP2_PRS_SRAM_LU_DONE_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_LU_DONE_BIT	/;"	d	file:
MVPP2_PRS_SRAM_LU_GEN_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_LU_GEN_BIT	/;"	d	file:
MVPP2_PRS_SRAM_NEXT_LU_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_NEXT_LU_MASK	/;"	d	file:
MVPP2_PRS_SRAM_NEXT_LU_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_NEXT_LU_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_BASE_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_BASE_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_SHIFT_IP4_ADD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_SHIFT_IP4_ADD	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_SHIFT_IP6_ADD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_SHIFT_IP6_ADD	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_SHIFT_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_SHIFT_MASK	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_SHIFT_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_SHIFT_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_UDF_ADD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_UDF_ADD	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_UDF_BITS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_UDF_BITS	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_UDF_IP4_ADD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_UDF_IP4_ADD	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_UDF_IP6_ADD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_UDF_IP6_ADD	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_UDF_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_UDF_MASK	/;"	d	file:
MVPP2_PRS_SRAM_OP_SEL_UDF_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_OP_SEL_UDF_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_RI_CTRL_BITS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_RI_CTRL_BITS	/;"	d	file:
MVPP2_PRS_SRAM_RI_CTRL_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_RI_CTRL_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_RI_CTRL_WORD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_RI_CTRL_WORD	/;"	d	file:
MVPP2_PRS_SRAM_RI_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_RI_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_RI_WORD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_RI_WORD	/;"	d	file:
MVPP2_PRS_SRAM_SHIFT_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_SHIFT_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_SHIFT_SIGN_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_SHIFT_SIGN_BIT	/;"	d	file:
MVPP2_PRS_SRAM_UDF_BITS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_BITS	/;"	d	file:
MVPP2_PRS_SRAM_UDF_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_MASK	/;"	d	file:
MVPP2_PRS_SRAM_UDF_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_UDF_SIGN_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_SIGN_BIT	/;"	d	file:
MVPP2_PRS_SRAM_UDF_TYPE_L3	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_TYPE_L3	/;"	d	file:
MVPP2_PRS_SRAM_UDF_TYPE_L4	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_TYPE_L4	/;"	d	file:
MVPP2_PRS_SRAM_UDF_TYPE_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_TYPE_MASK	/;"	d	file:
MVPP2_PRS_SRAM_UDF_TYPE_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_UDF_TYPE_OFFS	/;"	d	file:
MVPP2_PRS_SRAM_WORDS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_SRAM_WORDS	/;"	d	file:
MVPP2_PRS_TAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TAGGED	/;"	d	file:
MVPP2_PRS_TCAM_AI_BYTE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_AI_BYTE	/;"	d	file:
MVPP2_PRS_TCAM_CTRL_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_CTRL_REG	/;"	d	file:
MVPP2_PRS_TCAM_DATA_BYTE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_DATA_BYTE(/;"	d	file:
MVPP2_PRS_TCAM_DATA_BYTE_EN	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_DATA_BYTE_EN(/;"	d	file:
MVPP2_PRS_TCAM_DATA_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_DATA_REG(/;"	d	file:
MVPP2_PRS_TCAM_DSA_TAGGED_BIT	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_DSA_TAGGED_BIT	/;"	d	file:
MVPP2_PRS_TCAM_ENTRY_INVALID	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_ENTRY_INVALID	/;"	d	file:
MVPP2_PRS_TCAM_EN_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_TCAM_EN_MASK	/;"	d	file:
MVPP2_PRS_TCAM_EN_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_EN_OFFS(/;"	d	file:
MVPP2_PRS_TCAM_IDX_REG	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_IDX_REG	/;"	d	file:
MVPP2_PRS_TCAM_INV_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_PRS_TCAM_INV_MASK	/;"	d	file:
MVPP2_PRS_TCAM_INV_WORD	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_INV_WORD	/;"	d	file:
MVPP2_PRS_TCAM_LU_BYTE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_LU_BYTE	/;"	d	file:
MVPP2_PRS_TCAM_PORT_BYTE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_PORT_BYTE	/;"	d	file:
MVPP2_PRS_TCAM_PROTO_MASK	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_PROTO_MASK	/;"	d	file:
MVPP2_PRS_TCAM_PROTO_MASK_L	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_PROTO_MASK_L	/;"	d	file:
MVPP2_PRS_TCAM_SRAM_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_SRAM_SIZE	/;"	d	file:
MVPP2_PRS_TCAM_WORDS	drivers/net/mvpp2.c	/^#define MVPP2_PRS_TCAM_WORDS	/;"	d	file:
MVPP2_PRS_UDF_L2_DEF	drivers/net/mvpp2.c	/^	MVPP2_PRS_UDF_L2_DEF,$/;"	e	enum:mvpp2_prs_udf	file:
MVPP2_PRS_UDF_L2_DEF_COPY	drivers/net/mvpp2.c	/^	MVPP2_PRS_UDF_L2_DEF_COPY,$/;"	e	enum:mvpp2_prs_udf	file:
MVPP2_PRS_UDF_L2_USER	drivers/net/mvpp2.c	/^	MVPP2_PRS_UDF_L2_USER,$/;"	e	enum:mvpp2_prs_udf	file:
MVPP2_PRS_UDF_MAC_DEF	drivers/net/mvpp2.c	/^	MVPP2_PRS_UDF_MAC_DEF,$/;"	e	enum:mvpp2_prs_udf	file:
MVPP2_PRS_UDF_MAC_RANGE	drivers/net/mvpp2.c	/^	MVPP2_PRS_UDF_MAC_RANGE,$/;"	e	enum:mvpp2_prs_udf	file:
MVPP2_PRS_UNTAGGED	drivers/net/mvpp2.c	/^#define MVPP2_PRS_UNTAGGED	/;"	d	file:
MVPP2_QUEUE_NEXT_DESC	drivers/net/mvpp2.c	/^#define MVPP2_QUEUE_NEXT_DESC(/;"	d	file:
MVPP2_RXD_BM_POOL_ID_MASK	drivers/net/mvpp2.c	/^#define MVPP2_RXD_BM_POOL_ID_MASK	/;"	d	file:
MVPP2_RXD_BM_POOL_ID_OFFS	drivers/net/mvpp2.c	/^#define MVPP2_RXD_BM_POOL_ID_OFFS	/;"	d	file:
MVPP2_RXD_BUF_HDR	drivers/net/mvpp2.c	/^#define MVPP2_RXD_BUF_HDR	/;"	d	file:
MVPP2_RXD_ERR_CODE_MASK	drivers/net/mvpp2.c	/^#define MVPP2_RXD_ERR_CODE_MASK	/;"	d	file:
MVPP2_RXD_ERR_CRC	drivers/net/mvpp2.c	/^#define MVPP2_RXD_ERR_CRC	/;"	d	file:
MVPP2_RXD_ERR_OVERRUN	drivers/net/mvpp2.c	/^#define MVPP2_RXD_ERR_OVERRUN	/;"	d	file:
MVPP2_RXD_ERR_RESOURCE	drivers/net/mvpp2.c	/^#define MVPP2_RXD_ERR_RESOURCE	/;"	d	file:
MVPP2_RXD_ERR_SUMMARY	drivers/net/mvpp2.c	/^#define MVPP2_RXD_ERR_SUMMARY	/;"	d	file:
MVPP2_RXD_HWF_SYNC	drivers/net/mvpp2.c	/^#define MVPP2_RXD_HWF_SYNC	/;"	d	file:
MVPP2_RXD_IP4_HEADER_ERR	drivers/net/mvpp2.c	/^#define MVPP2_RXD_IP4_HEADER_ERR	/;"	d	file:
MVPP2_RXD_L3_IP4	drivers/net/mvpp2.c	/^#define MVPP2_RXD_L3_IP4	/;"	d	file:
MVPP2_RXD_L3_IP6	drivers/net/mvpp2.c	/^#define MVPP2_RXD_L3_IP6	/;"	d	file:
MVPP2_RXD_L4_CSUM_OK	drivers/net/mvpp2.c	/^#define MVPP2_RXD_L4_CSUM_OK	/;"	d	file:
MVPP2_RXD_L4_TCP	drivers/net/mvpp2.c	/^#define MVPP2_RXD_L4_TCP	/;"	d	file:
MVPP2_RXD_L4_UDP	drivers/net/mvpp2.c	/^#define MVPP2_RXD_L4_UDP	/;"	d	file:
MVPP2_RXQ_CONFIG_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_CONFIG_REG(/;"	d	file:
MVPP2_RXQ_DESC_ADDR_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_DESC_ADDR_REG	/;"	d	file:
MVPP2_RXQ_DESC_SIZE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_DESC_SIZE_MASK	/;"	d	file:
MVPP2_RXQ_DESC_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_DESC_SIZE_REG	/;"	d	file:
MVPP2_RXQ_DISABLE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_DISABLE_MASK	/;"	d	file:
MVPP2_RXQ_INDEX_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_INDEX_REG	/;"	d	file:
MVPP2_RXQ_NON_OCCUPIED_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_NON_OCCUPIED_MASK	/;"	d	file:
MVPP2_RXQ_NON_OCCUPIED_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_NON_OCCUPIED_OFFSET	/;"	d	file:
MVPP2_RXQ_NUM_NEW_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_NUM_NEW_OFFSET	/;"	d	file:
MVPP2_RXQ_NUM_PROCESSED_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_NUM_PROCESSED_OFFSET	/;"	d	file:
MVPP2_RXQ_NUM_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_NUM_REG	/;"	d	file:
MVPP2_RXQ_OCCUPIED_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_OCCUPIED_MASK	/;"	d	file:
MVPP2_RXQ_PACKET_OFFSET_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_PACKET_OFFSET_MASK	/;"	d	file:
MVPP2_RXQ_PACKET_OFFSET_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_PACKET_OFFSET_OFFS	/;"	d	file:
MVPP2_RXQ_POOL_LONG_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_POOL_LONG_MASK	/;"	d	file:
MVPP2_RXQ_POOL_LONG_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_POOL_LONG_OFFS	/;"	d	file:
MVPP2_RXQ_POOL_SHORT_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_POOL_SHORT_MASK	/;"	d	file:
MVPP2_RXQ_POOL_SHORT_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_RXQ_POOL_SHORT_OFFS	/;"	d	file:
MVPP2_RXQ_STATUS_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_STATUS_REG(/;"	d	file:
MVPP2_RXQ_STATUS_UPDATE_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_STATUS_UPDATE_REG(/;"	d	file:
MVPP2_RXQ_THRESH_REG	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_THRESH_REG	/;"	d	file:
MVPP2_RXQ_TOTAL_NUM	drivers/net/mvpp2.c	/^#define MVPP2_RXQ_TOTAL_NUM	/;"	d	file:
MVPP2_RX_ATTR_FIFO_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_RX_ATTR_FIFO_SIZE_REG(/;"	d	file:
MVPP2_RX_BUF_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_RX_BUF_SIZE(/;"	d	file:
MVPP2_RX_COAL_PKTS	drivers/net/mvpp2.c	/^#define MVPP2_RX_COAL_PKTS	/;"	d	file:
MVPP2_RX_COAL_USEC	drivers/net/mvpp2.c	/^#define MVPP2_RX_COAL_USEC	/;"	d	file:
MVPP2_RX_CTRL_REG	drivers/net/mvpp2.c	/^#define MVPP2_RX_CTRL_REG(/;"	d	file:
MVPP2_RX_DATA_FIFO_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_RX_DATA_FIFO_SIZE_REG(/;"	d	file:
MVPP2_RX_FIFO_INIT_REG	drivers/net/mvpp2.c	/^#define MVPP2_RX_FIFO_INIT_REG	/;"	d	file:
MVPP2_RX_FIFO_PORT_ATTR_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_RX_FIFO_PORT_ATTR_SIZE	/;"	d	file:
MVPP2_RX_FIFO_PORT_DATA_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_RX_FIFO_PORT_DATA_SIZE	/;"	d	file:
MVPP2_RX_FIFO_PORT_MIN_PKT	drivers/net/mvpp2.c	/^#define MVPP2_RX_FIFO_PORT_MIN_PKT	/;"	d	file:
MVPP2_RX_LOW_LATENCY_PKT_SIZE	drivers/net/mvpp2.c	/^#define     MVPP2_RX_LOW_LATENCY_PKT_SIZE(/;"	d	file:
MVPP2_RX_MAX_PKT_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_RX_MAX_PKT_SIZE(/;"	d	file:
MVPP2_RX_MIN_PKT_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_RX_MIN_PKT_SIZE_REG	/;"	d	file:
MVPP2_RX_PKT_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_RX_PKT_SIZE(/;"	d	file:
MVPP2_RX_TOTAL_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_RX_TOTAL_SIZE(/;"	d	file:
MVPP2_RX_USE_PSEUDO_FOR_CSUM_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_RX_USE_PSEUDO_FOR_CSUM_MASK	/;"	d	file:
MVPP2_SKB_SHINFO_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_SKB_SHINFO_SIZE /;"	d	file:
MVPP2_SMI	drivers/net/mvpp2.c	/^#define MVPP2_SMI	/;"	d	file:
MVPP2_SMI_BUSY	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_BUSY	/;"	d	file:
MVPP2_SMI_DATA_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_DATA_MASK	/;"	d	file:
MVPP2_SMI_DATA_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_DATA_OFFS	/;"	d	file:
MVPP2_SMI_DEV_ADDR_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_DEV_ADDR_OFFS	/;"	d	file:
MVPP2_SMI_OPCODE_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_OPCODE_OFFS	/;"	d	file:
MVPP2_SMI_OPCODE_READ	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_OPCODE_READ	/;"	d	file:
MVPP2_SMI_READ_VALID	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_READ_VALID	/;"	d	file:
MVPP2_SMI_REG_ADDR_OFFS	drivers/net/mvpp2.c	/^#define     MVPP2_SMI_REG_ADDR_OFFS	/;"	d	file:
MVPP2_SMI_TIMEOUT	drivers/net/mvpp2.c	/^#define MVPP2_SMI_TIMEOUT	/;"	d	file:
MVPP2_SNOOP_BUF_HDR_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_SNOOP_BUF_HDR_MASK	/;"	d	file:
MVPP2_SNOOP_PKT_SIZE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_SNOOP_PKT_SIZE_MASK	/;"	d	file:
MVPP2_SRC_ADDR_HIGH	drivers/net/mvpp2.c	/^#define MVPP2_SRC_ADDR_HIGH	/;"	d	file:
MVPP2_SRC_ADDR_MIDDLE	drivers/net/mvpp2.c	/^#define MVPP2_SRC_ADDR_MIDDLE	/;"	d	file:
MVPP2_TAG_TYPE_DSA	drivers/net/mvpp2.c	/^	MVPP2_TAG_TYPE_DSA  = 2,$/;"	e	enum:mvpp2_tag_type	file:
MVPP2_TAG_TYPE_EDSA	drivers/net/mvpp2.c	/^	MVPP2_TAG_TYPE_EDSA = 3,$/;"	e	enum:mvpp2_tag_type	file:
MVPP2_TAG_TYPE_LAST	drivers/net/mvpp2.c	/^	MVPP2_TAG_TYPE_LAST = 5$/;"	e	enum:mvpp2_tag_type	file:
MVPP2_TAG_TYPE_MH	drivers/net/mvpp2.c	/^	MVPP2_TAG_TYPE_MH   = 1,$/;"	e	enum:mvpp2_tag_type	file:
MVPP2_TAG_TYPE_NONE	drivers/net/mvpp2.c	/^	MVPP2_TAG_TYPE_NONE = 0,$/;"	e	enum:mvpp2_tag_type	file:
MVPP2_TAG_TYPE_VLAN	drivers/net/mvpp2.c	/^	MVPP2_TAG_TYPE_VLAN = 4,$/;"	e	enum:mvpp2_tag_type	file:
MVPP2_TRANSMITTED_COUNT_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TRANSMITTED_COUNT_MASK	/;"	d	file:
MVPP2_TRANSMITTED_COUNT_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_TRANSMITTED_COUNT_OFFSET	/;"	d	file:
MVPP2_TRANSMITTED_THRESH_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TRANSMITTED_THRESH_MASK	/;"	d	file:
MVPP2_TRANSMITTED_THRESH_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_TRANSMITTED_THRESH_OFFSET	/;"	d	file:
MVPP2_TXDONE_COAL_PKTS_THRESH	drivers/net/mvpp2.c	/^#define MVPP2_TXDONE_COAL_PKTS_THRESH	/;"	d	file:
MVPP2_TXDONE_HRTIMER_PERIOD_NS	drivers/net/mvpp2.c	/^#define MVPP2_TXDONE_HRTIMER_PERIOD_NS	/;"	d	file:
MVPP2_TXD_F_DESC	drivers/net/mvpp2.c	/^#define MVPP2_TXD_F_DESC	/;"	d	file:
MVPP2_TXD_IP_CSUM_DISABLE	drivers/net/mvpp2.c	/^#define MVPP2_TXD_IP_CSUM_DISABLE	/;"	d	file:
MVPP2_TXD_IP_HLEN_SHIFT	drivers/net/mvpp2.c	/^#define MVPP2_TXD_IP_HLEN_SHIFT	/;"	d	file:
MVPP2_TXD_L3_IP6	drivers/net/mvpp2.c	/^#define MVPP2_TXD_L3_IP6	/;"	d	file:
MVPP2_TXD_L3_OFF_SHIFT	drivers/net/mvpp2.c	/^#define MVPP2_TXD_L3_OFF_SHIFT	/;"	d	file:
MVPP2_TXD_L4_CSUM_FRAG	drivers/net/mvpp2.c	/^#define MVPP2_TXD_L4_CSUM_FRAG	/;"	d	file:
MVPP2_TXD_L4_CSUM_NOT	drivers/net/mvpp2.c	/^#define MVPP2_TXD_L4_CSUM_NOT	/;"	d	file:
MVPP2_TXD_L4_UDP	drivers/net/mvpp2.c	/^#define MVPP2_TXD_L4_UDP	/;"	d	file:
MVPP2_TXD_L_DESC	drivers/net/mvpp2.c	/^#define MVPP2_TXD_L_DESC	/;"	d	file:
MVPP2_TXD_PADDING_DISABLE	drivers/net/mvpp2.c	/^#define MVPP2_TXD_PADDING_DISABLE	/;"	d	file:
MVPP2_TXP_MTU_MAX	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_MTU_MAX	/;"	d	file:
MVPP2_TXP_REFILL_PERIOD_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_REFILL_PERIOD_ALL_MASK	/;"	d	file:
MVPP2_TXP_REFILL_PERIOD_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_REFILL_PERIOD_MASK(/;"	d	file:
MVPP2_TXP_REFILL_TOKENS_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_REFILL_TOKENS_ALL_MASK	/;"	d	file:
MVPP2_TXP_SCHED_CMD_1_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_CMD_1_REG	/;"	d	file:
MVPP2_TXP_SCHED_DISQ_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_SCHED_DISQ_OFFSET	/;"	d	file:
MVPP2_TXP_SCHED_ENQ_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_SCHED_ENQ_MASK	/;"	d	file:
MVPP2_TXP_SCHED_MTU_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_MTU_REG	/;"	d	file:
MVPP2_TXP_SCHED_PERIOD_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_PERIOD_REG	/;"	d	file:
MVPP2_TXP_SCHED_PORT_INDEX_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_PORT_INDEX_REG	/;"	d	file:
MVPP2_TXP_SCHED_Q_CMD_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_Q_CMD_REG	/;"	d	file:
MVPP2_TXP_SCHED_REFILL_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_REFILL_REG	/;"	d	file:
MVPP2_TXP_SCHED_TOKEN_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXP_SCHED_TOKEN_SIZE_REG	/;"	d	file:
MVPP2_TXP_TOKEN_SIZE_MAX	drivers/net/mvpp2.c	/^#define     MVPP2_TXP_TOKEN_SIZE_MAX	/;"	d	file:
MVPP2_TXQ_DESC_ADDR_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_DESC_ADDR_REG	/;"	d	file:
MVPP2_TXQ_DESC_SIZE_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_DESC_SIZE_MASK	/;"	d	file:
MVPP2_TXQ_DESC_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_DESC_SIZE_REG	/;"	d	file:
MVPP2_TXQ_DRAIN_EN_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_DRAIN_EN_MASK	/;"	d	file:
MVPP2_TXQ_INDEX_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_INDEX_REG	/;"	d	file:
MVPP2_TXQ_INT_STATUS_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_INT_STATUS_REG	/;"	d	file:
MVPP2_TXQ_NUM_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_NUM_REG	/;"	d	file:
MVPP2_TXQ_PENDING_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_PENDING_MASK	/;"	d	file:
MVPP2_TXQ_PENDING_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_PENDING_REG	/;"	d	file:
MVPP2_TXQ_PREF_BUF_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_PREF_BUF_REG	/;"	d	file:
MVPP2_TXQ_REFILL_PERIOD_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_REFILL_PERIOD_ALL_MASK	/;"	d	file:
MVPP2_TXQ_REFILL_PERIOD_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_REFILL_PERIOD_MASK(/;"	d	file:
MVPP2_TXQ_REFILL_TOKENS_ALL_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_REFILL_TOKENS_ALL_MASK	/;"	d	file:
MVPP2_TXQ_RSVD_CLR_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_RSVD_CLR_OFFSET	/;"	d	file:
MVPP2_TXQ_RSVD_CLR_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_RSVD_CLR_REG	/;"	d	file:
MVPP2_TXQ_RSVD_REQ_Q_OFFSET	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_RSVD_REQ_Q_OFFSET	/;"	d	file:
MVPP2_TXQ_RSVD_REQ_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_RSVD_REQ_REG	/;"	d	file:
MVPP2_TXQ_RSVD_RSLT_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_RSVD_RSLT_MASK	/;"	d	file:
MVPP2_TXQ_RSVD_RSLT_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_RSVD_RSLT_REG	/;"	d	file:
MVPP2_TXQ_SCHED_REFILL_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_SCHED_REFILL_REG(/;"	d	file:
MVPP2_TXQ_SCHED_TOKEN_CNTR_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_SCHED_TOKEN_CNTR_REG(/;"	d	file:
MVPP2_TXQ_SCHED_TOKEN_SIZE_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_SCHED_TOKEN_SIZE_REG(/;"	d	file:
MVPP2_TXQ_SENT_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_SENT_REG(/;"	d	file:
MVPP2_TXQ_THRESH_REG	drivers/net/mvpp2.c	/^#define MVPP2_TXQ_THRESH_REG	/;"	d	file:
MVPP2_TXQ_TOKEN_CNTR_MAX	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_TOKEN_CNTR_MAX	/;"	d	file:
MVPP2_TXQ_TOKEN_SIZE_MAX	drivers/net/mvpp2.c	/^#define     MVPP2_TXQ_TOKEN_SIZE_MAX	/;"	d	file:
MVPP2_TX_CSUM_MAX_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_TX_CSUM_MAX_SIZE	/;"	d	file:
MVPP2_TX_DESC_ALIGN	drivers/net/mvpp2.c	/^#define MVPP2_TX_DESC_ALIGN	/;"	d	file:
MVPP2_TX_DISABLE_TIMEOUT_MSEC	drivers/net/mvpp2.c	/^#define MVPP2_TX_DISABLE_TIMEOUT_MSEC	/;"	d	file:
MVPP2_TX_MTU_MAX	drivers/net/mvpp2.c	/^#define MVPP2_TX_MTU_MAX	/;"	d	file:
MVPP2_TX_PENDING_TIMEOUT_MSEC	drivers/net/mvpp2.c	/^#define MVPP2_TX_PENDING_TIMEOUT_MSEC	/;"	d	file:
MVPP2_TX_PORT_FLUSH_MASK	drivers/net/mvpp2.c	/^#define     MVPP2_TX_PORT_FLUSH_MASK(/;"	d	file:
MVPP2_TX_PORT_FLUSH_REG	drivers/net/mvpp2.c	/^#define MVPP2_TX_PORT_FLUSH_REG	/;"	d	file:
MVPP2_TX_SNOOP_REG	drivers/net/mvpp2.c	/^#define MVPP2_TX_SNOOP_REG	/;"	d	file:
MVPP2_VLAN_TAG_LEN	drivers/net/mvpp2.c	/^#define MVPP2_VLAN_TAG_LEN	/;"	d	file:
MVPP2_WIN_BASE	drivers/net/mvpp2.c	/^#define MVPP2_WIN_BASE(/;"	d	file:
MVPP2_WIN_REMAP	drivers/net/mvpp2.c	/^#define MVPP2_WIN_REMAP(/;"	d	file:
MVPP2_WIN_SIZE	drivers/net/mvpp2.c	/^#define MVPP2_WIN_SIZE(/;"	d	file:
MVRTC_DATE_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_DATE_MSK	/;"	d
MVRTC_DATE_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_DATE_SFT	/;"	d
MVRTC_DAY_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_DAY_MSK	/;"	d
MVRTC_DAY_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_DAY_SFT	/;"	d
MVRTC_HOUR_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_HOUR_MSK	/;"	d
MVRTC_HOUR_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_HOUR_SFT	/;"	d
MVRTC_HRFMT_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_HRFMT_MSK	/;"	d
MVRTC_MIN_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_MIN_MSK	/;"	d
MVRTC_MIN_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_MIN_SFT	/;"	d
MVRTC_MON_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_MON_MSK	/;"	d
MVRTC_MON_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_MON_SFT	/;"	d
MVRTC_SEC_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_SEC_MSK	/;"	d
MVRTC_SEC_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_SEC_SFT	/;"	d
MVRTC_YEAR_MSK	drivers/rtc/mvrtc.h	/^#define MVRTC_YEAR_MSK	/;"	d
MVRTC_YEAR_SFT	drivers/rtc/mvrtc.h	/^#define MVRTC_YEAR_SFT	/;"	d
MVSATAHC_LED_CONF_REG	board/raidsonic/ib62x0/ib62x0.h	/^#define MVSATAHC_LED_CONF_REG /;"	d
MVSATAHC_LED_POLARITY_CTRL	board/raidsonic/ib62x0/ib62x0.h	/^#define MVSATAHC_LED_POLARITY_CTRL /;"	d
MVSATA_EDMA_CMD_ATA_RST	drivers/block/mvsata_ide.c	/^#define MVSATA_EDMA_CMD_ATA_RST	/;"	d	file:
MVSATA_PORT_INIT	drivers/block/mvsata_ide.c	/^#define MVSATA_PORT_INIT /;"	d	file:
MVSATA_PORT_USE	drivers/block/mvsata_ide.c	/^#define MVSATA_PORT_USE /;"	d	file:
MVSATA_SCONTROL_DET_INIT	drivers/block/mvsata_ide.c	/^#define MVSATA_SCONTROL_DET_INIT	/;"	d	file:
MVSATA_SCONTROL_DET_MASK	drivers/block/mvsata_ide.c	/^#define MVSATA_SCONTROL_DET_MASK	/;"	d	file:
MVSATA_SCONTROL_DET_NONE	drivers/block/mvsata_ide.c	/^#define MVSATA_SCONTROL_DET_NONE	/;"	d	file:
MVSATA_SCONTROL_IPM_MASK	drivers/block/mvsata_ide.c	/^#define MVSATA_SCONTROL_IPM_MASK	/;"	d	file:
MVSATA_SCONTROL_IPM_NO_LP_ALLOWED	drivers/block/mvsata_ide.c	/^#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED	/;"	d	file:
MVSATA_SCONTROL_MASK	drivers/block/mvsata_ide.c	/^#define MVSATA_SCONTROL_MASK /;"	d	file:
MVSATA_SSTATUS_DET_DEVCOMM	drivers/block/mvsata_ide.c	/^#define MVSATA_SSTATUS_DET_DEVCOMM	/;"	d	file:
MVSATA_SSTATUS_DET_MASK	drivers/block/mvsata_ide.c	/^#define MVSATA_SSTATUS_DET_MASK	/;"	d	file:
MVSATA_STATUS_OK	drivers/block/mvsata_ide.c	/^#define MVSATA_STATUS_OK	/;"	d	file:
MVSATA_STATUS_TIMEOUT	drivers/block/mvsata_ide.c	/^#define MVSATA_STATUS_TIMEOUT	/;"	d	file:
MVSATA_WIN_BASE	drivers/block/mvsata_ide.c	/^#define MVSATA_WIN_BASE(/;"	d	file:
MVSATA_WIN_BASE	drivers/block/sata_mv.c	/^#define MVSATA_WIN_BASE(/;"	d	file:
MVSATA_WIN_CONTROL	drivers/block/mvsata_ide.c	/^#define MVSATA_WIN_CONTROL(/;"	d	file:
MVSATA_WIN_CONTROL	drivers/block/sata_mv.c	/^#define MVSATA_WIN_CONTROL(/;"	d	file:
MVSDH_NAME	drivers/mmc/mv_sdhci.c	/^static char *MVSDH_NAME = "mv_sdh";$/;"	v	typeref:typename:char *	file:
MVTWSI_CONTROL_ACK	drivers/i2c/mvtwsi.c	/^	MVTWSI_CONTROL_ACK	= 0x00000004,$/;"	e	enum:mvtwsi_ctrl_register_fields	file:
MVTWSI_CONTROL_CLEAR_IFLG	drivers/i2c/mvtwsi.c	/^#define	MVTWSI_CONTROL_CLEAR_IFLG	/;"	d	file:
MVTWSI_CONTROL_IFLG	drivers/i2c/mvtwsi.c	/^	MVTWSI_CONTROL_IFLG	= 0x00000008,$/;"	e	enum:mvtwsi_ctrl_register_fields	file:
MVTWSI_CONTROL_INTEN	drivers/i2c/mvtwsi.c	/^	MVTWSI_CONTROL_INTEN	= 0x00000080,$/;"	e	enum:mvtwsi_ctrl_register_fields	file:
MVTWSI_CONTROL_START	drivers/i2c/mvtwsi.c	/^	MVTWSI_CONTROL_START	= 0x00000020,$/;"	e	enum:mvtwsi_ctrl_register_fields	file:
MVTWSI_CONTROL_STOP	drivers/i2c/mvtwsi.c	/^	MVTWSI_CONTROL_STOP	= 0x00000010,$/;"	e	enum:mvtwsi_ctrl_register_fields	file:
MVTWSI_CONTROL_TWSIEN	drivers/i2c/mvtwsi.c	/^	MVTWSI_CONTROL_TWSIEN	= 0x00000040,$/;"	e	enum:mvtwsi_ctrl_register_fields	file:
MVTWSI_ERROR_TIMEOUT	drivers/i2c/mvtwsi.c	/^	MVTWSI_ERROR_TIMEOUT            = 0x02,$/;"	e	enum:mvtwsi_error_class	file:
MVTWSI_ERROR_WRONG_STATUS	drivers/i2c/mvtwsi.c	/^	MVTWSI_ERROR_WRONG_STATUS       = 0x01,$/;"	e	enum:mvtwsi_error_class	file:
MVTWSI_READ_ACK	drivers/i2c/mvtwsi.c	/^	MVTWSI_READ_ACK = 1,$/;"	e	enum:mvtwsi_ack_flags	file:
MVTWSI_READ_NAK	drivers/i2c/mvtwsi.c	/^	MVTWSI_READ_NAK = 0,$/;"	e	enum:mvtwsi_ack_flags	file:
MVTWSI_STATUS_ADDR_R_ACK	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_ADDR_R_ACK	= 0x40,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_ADDR_R_NAK	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_ADDR_R_NAK	= 0x48,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_ADDR_W_ACK	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_ADDR_W_ACK	= 0x18,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_DATA_R_ACK	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_DATA_R_ACK	= 0x50,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_DATA_R_NAK	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_DATA_R_NAK	= 0x58,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_DATA_W_ACK	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_DATA_W_ACK	= 0x28,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_IDLE	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_IDLE		= 0xF8,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_REPEATED_START	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_REPEATED_START	= 0x10,$/;"	e	enum:mvstwsi_status_values	file:
MVTWSI_STATUS_START	drivers/i2c/mvtwsi.c	/^	MVTWSI_STATUS_START		= 0x08,$/;"	e	enum:mvstwsi_status_values	file:
MVUSB0_BASE	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVUSB0_BASE	/;"	d
MVUSB0_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVUSB0_BASE	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS0	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS0	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS0	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS0	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS1	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS1	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS1	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS1	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS2	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS2	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS2	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS2	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS3	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS3	/;"	d
MVUSB0_CPU_ATTR_DRAM_CS3	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define MVUSB0_CPU_ATTR_DRAM_CS3	/;"	d
MVUSB_BASE	drivers/usb/host/ehci-marvell.c	/^#define MVUSB_BASE(/;"	d	file:
MV_6710_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_6710_DEV_ID	/;"	d
MV_6710_Z1_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_6710_Z1_ID	/;"	d
MV_6710_Z1_NAME	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_6710_Z1_NAME	/;"	d
MV_6710_Z1_REV	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_6710_Z1_REV	/;"	d
MV_6810	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_6810,$/;"	e	enum:__anonb53ad2100103
MV_6810_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6810_DEV_ID	/;"	d
MV_6810_INDEX	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6810_INDEX	/;"	d
MV_6811	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_6811,$/;"	e	enum:__anonb53ad2100103
MV_6811_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6811_DEV_ID	/;"	d
MV_6811_INDEX	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6811_INDEX	/;"	d
MV_6820	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_6820,$/;"	e	enum:__anonb53ad2100103
MV_6820_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6820_DEV_ID	/;"	d
MV_6820_INDEX	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6820_INDEX	/;"	d
MV_6828	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_6828,$/;"	e	enum:__anonb53ad2100103
MV_6828_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6828_DEV_ID	/;"	d
MV_6828_INDEX	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6828_INDEX	/;"	d
MV_6920	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_6920,$/;"	e	enum:__anonb53ad2100103
MV_6920_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6920_DEV_ID	/;"	d
MV_6920_INDEX	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6920_INDEX	/;"	d
MV_6928	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_6928,$/;"	e	enum:__anonb53ad2100103
MV_6928_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6928_DEV_ID	/;"	d
MV_6928_INDEX	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_6928_INDEX	/;"	d
MV_78000_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78000_DEV_ID	/;"	d
MV_78130_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78130_DEV_ID	/;"	d
MV_78160_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78160_DEV_ID	/;"	d
MV_78230_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78230_DEV_ID	/;"	d
MV_78260_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78260_DEV_ID	/;"	d
MV_78460_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78460_DEV_ID	/;"	d
MV_78XX0_A0_REV	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_78XX0_A0_REV	/;"	d
MV_78XX0_B0_REV	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_78XX0_B0_REV	/;"	d
MV_78XX0_Z1_REV	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_78XX0_Z1_REV	/;"	d
MV_78XX0_Z1_REV	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_78XX0_Z1_REV	/;"	d
MV_88F67XX_A0_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MV_88F67XX_A0_ID	/;"	d
MV_88F68XX_A0_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MV_88F68XX_A0_ID	/;"	d
MV_88F68XX_A0_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_88F68XX_A0_ID	/;"	d
MV_88F68XX_A0_ID	drivers/ddr/marvell/a38x/ddr3_init.c	/^#define MV_88F68XX_A0_ID	/;"	d	file:
MV_88F68XX_Z1_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define MV_88F68XX_Z1_ID	/;"	d
MV_88F68XX_Z1_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_88F68XX_Z1_ID	/;"	d
MV_88F68XX_Z1_ID	drivers/ddr/marvell/a38x/ddr3_init.c	/^#define MV_88F68XX_Z1_ID	/;"	d	file:
MV_88F69XX_Z1_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_88F69XX_Z1_ID	/;"	d
MV_88F69XX_Z1_ID	drivers/ddr/marvell/a38x/ddr3_init.c	/^#define MV_88F69XX_Z1_ID	/;"	d	file:
MV_ACTIVE	drivers/ddr/marvell/a38x/xor.h	/^	MV_ACTIVE,$/;"	e	enum:mv_state
MV_ACTIVE	drivers/ddr/marvell/axp/xor.h	/^	MV_ACTIVE,$/;"	e	enum:mv_state
MV_ALREADY_EXIST	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_ALREADY_EXIST /;"	d
MV_ALREADY_EXIST	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_ALREADY_EXIST /;"	d
MV_ATA_MAX_SECTORS	drivers/block/sata_mv.c	/^#define MV_ATA_MAX_SECTORS	/;"	d	file:
MV_BAD_PARAM	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_BAD_PARAM	/;"	d
MV_BAD_PARAM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_BAD_PARAM	/;"	d
MV_BAD_PTR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_BAD_PTR	/;"	d
MV_BAD_PTR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_BAD_PTR	/;"	d
MV_BAD_SIZE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_BAD_SIZE	/;"	d
MV_BAD_SIZE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_BAD_SIZE	/;"	d
MV_BAD_STATE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_BAD_STATE	/;"	d
MV_BAD_STATE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_BAD_STATE	/;"	d
MV_BAD_VALUE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_BAD_VALUE	/;"	d
MV_BAD_VALUE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_BAD_VALUE	/;"	d
MV_BIN_SERDES_CFG	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^} MV_BIN_SERDES_CFG;$/;"	t	typeref:struct:board_serdes_conf
MV_BIN_SERDES_UNIT_INDX	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^} MV_BIN_SERDES_UNIT_INDX;$/;"	t	typeref:enum:__anon3796299a0103
MV_BOARD_ETM_MODULE_ID	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define MV_BOARD_ETM_MODULE_ID	/;"	d	file:
MV_BOARD_PEX_MODULE_ADDR	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define MV_BOARD_PEX_MODULE_ADDR	/;"	d	file:
MV_BOARD_PEX_MODULE_ID	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define MV_BOARD_PEX_MODULE_ID	/;"	d	file:
MV_BOARD_REFCLK	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define MV_BOARD_REFCLK	/;"	d
MV_BOARD_REFCLK_25MHZ	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MV_BOARD_REFCLK_25MHZ	/;"	d
MV_BOARD_TCLK_ERROR	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define MV_BOARD_TCLK_ERROR	/;"	d
MV_BOARD_WAKEUP_GPIO_INFO	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_BOARD_WAKEUP_GPIO_INFO /;"	d
MV_BUSY	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_BUSY	/;"	d
MV_BUSY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_BUSY	/;"	d
MV_CONFIG_TYPE	drivers/ddr/marvell/axp/ddr3_init.h	/^} MV_CONFIG_TYPE;$/;"	t	typeref:enum:config_type
MV_CRC32	drivers/ddr/marvell/a38x/xor.h	/^	MV_CRC32		\/* XOR channel functions as CRC 32 calculator *\/$/;"	e	enum:xor_type
MV_CRC32	drivers/ddr/marvell/axp/xor.h	/^	MV_CRC32	\/* XOR channel functions as CRC 32 calculator   *\/$/;"	e	enum:xor_type
MV_CREATE_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_CREATE_ERROR	/;"	d
MV_CREATE_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_CREATE_ERROR	/;"	d
MV_CUSTOMER_BOARD_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_CUSTOMER_BOARD_NUM	/;"	d
MV_DDR3_MODES_NUMBER	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MV_DDR3_MODES_NUMBER	/;"	d
MV_DDR3_MODES_NUMBER	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_DDR3_MODES_NUMBER	/;"	d
MV_DDR3_TRAINING_ERR_BAD_DIMM_SETUP	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_BAD_DIMM_SETUP	/;"	d
MV_DDR3_TRAINING_ERR_BAD_R_DIMM_SETUP	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_BAD_R_DIMM_SETUP	/;"	d
MV_DDR3_TRAINING_ERR_BAD_SAR	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_BAD_SAR	/;"	d
MV_DDR3_TRAINING_ERR_BUS_WIDTH_NOT_MATCH	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_BUS_WIDTH_NOT_MATCH	/;"	d
MV_DDR3_TRAINING_ERR_DFS_H2L	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DFS_H2L /;"	d
MV_DDR3_TRAINING_ERR_DIMM_TYPE_NO_MATCH	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_DIMM_TYPE_NO_MATCH	/;"	d
MV_DDR3_TRAINING_ERR_DQS_HIGH_LIMIT_SEARCH	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DQS_HIGH_LIMIT_SEARCH /;"	d
MV_DDR3_TRAINING_ERR_DQS_LOW_LIMIT_SEARCH	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DQS_LOW_LIMIT_SEARCH /;"	d
MV_DDR3_TRAINING_ERR_DQS_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DQS_PATTERN /;"	d
MV_DDR3_TRAINING_ERR_DQS_RX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DQS_RX /;"	d
MV_DDR3_TRAINING_ERR_DQS_TX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DQS_TX /;"	d
MV_DDR3_TRAINING_ERR_DRAM_COMPARE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_DRAM_COMPARE /;"	d
MV_DDR3_TRAINING_ERR_HW_FAIL_BASE	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_HW_FAIL_BASE	/;"	d
MV_DDR3_TRAINING_ERR_LOAD_PATTERNS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_LOAD_PATTERNS /;"	d
MV_DDR3_TRAINING_ERR_MAX_CS_LIMIT	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_MAX_CS_LIMIT	/;"	d
MV_DDR3_TRAINING_ERR_MAX_ENA_CS_LIMIT	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_MAX_ENA_CS_LIMIT	/;"	d
MV_DDR3_TRAINING_ERR_PBS_ADLL_SHR_1PHASE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_ADLL_SHR_1PHASE /;"	d
MV_DDR3_TRAINING_ERR_PBS_RX_MAX_VAL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_RX_MAX_VAL /;"	d
MV_DDR3_TRAINING_ERR_PBS_RX_PER_BIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_RX_PER_BIT /;"	d
MV_DDR3_TRAINING_ERR_PBS_SHIFT_QDS_MAX_VAL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_SHIFT_QDS_MAX_VAL /;"	d
MV_DDR3_TRAINING_ERR_PBS_SHIFT_QDS_SRAM_CMP	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_SHIFT_QDS_SRAM_CMP /;"	d
MV_DDR3_TRAINING_ERR_PBS_TX_MAX_VAL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_TX_MAX_VAL /;"	d
MV_DDR3_TRAINING_ERR_PBS_TX_PER_BIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PBS_TX_PER_BIT /;"	d
MV_DDR3_TRAINING_ERR_PRBS_RX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PRBS_RX /;"	d
MV_DDR3_TRAINING_ERR_PRBS_TX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PRBS_TX /;"	d
MV_DDR3_TRAINING_ERR_PUP_RANGE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_PUP_RANGE /;"	d
MV_DDR3_TRAINING_ERR_RD_LVL_PUP_UNLOCK	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_RD_LVL_PUP_UNLOCK /;"	d
MV_DDR3_TRAINING_ERR_RD_LVL_RL_PATTERN	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_RD_LVL_RL_PATTERN /;"	d
MV_DDR3_TRAINING_ERR_RD_LVL_RL_PUP_UNLOCK	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_RD_LVL_RL_PUP_UNLOCK /;"	d
MV_DDR3_TRAINING_ERR_TWSI_BAD_TYPE	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_TWSI_BAD_TYPE	/;"	d
MV_DDR3_TRAINING_ERR_TWSI_FAIL	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DDR3_TRAINING_ERR_TWSI_FAIL	/;"	d
MV_DDR3_TRAINING_ERR_WIN_LIMITS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_WIN_LIMITS /;"	d
MV_DDR3_TRAINING_ERR_WR_LVL_HI_FREQ	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_WR_LVL_HI_FREQ /;"	d
MV_DDR3_TRAINING_ERR_WR_LVL_HW	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_WR_LVL_HW /;"	d
MV_DDR3_TRAINING_ERR_WR_LVL_SW	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DDR3_TRAINING_ERR_WR_LVL_SW /;"	d
MV_DEBUG_DFS	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_DFS$/;"	d
MV_DEBUG_DFS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_DFS$/;"	d
MV_DEBUG_DFS_FULL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_DFS_FULL$/;"	d
MV_DEBUG_DFS_FULL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_DFS_FULL$/;"	d
MV_DEBUG_DQS	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_DQS$/;"	d
MV_DEBUG_DQS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_DQS$/;"	d
MV_DEBUG_DQS_FULL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_DQS_FULL$/;"	d
MV_DEBUG_DQS_FULL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_DQS_FULL$/;"	d
MV_DEBUG_DQS_RESULTS	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_DQS_RESULTS$/;"	d
MV_DEBUG_DQS_RESULTS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_DQS_RESULTS$/;"	d
MV_DEBUG_INIT	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_INIT$/;"	d
MV_DEBUG_INIT	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_DEBUG_INIT$/;"	d
MV_DEBUG_MAIN_FULL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_MAIN_FULL$/;"	d
MV_DEBUG_MAIN_FULL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_MAIN_FULL$/;"	d
MV_DEBUG_PBS	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_PBS$/;"	d
MV_DEBUG_PBS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_PBS$/;"	d
MV_DEBUG_RL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_RL$/;"	d
MV_DEBUG_RL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_RL$/;"	d
MV_DEBUG_RL_FULL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_RL_FULL$/;"	d
MV_DEBUG_RL_FULL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_RL_FULL$/;"	d
MV_DEBUG_WL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_WL$/;"	d
MV_DEBUG_WL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_WL$/;"	d
MV_DEBUG_WL_FULL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_DEBUG_WL_FULL$/;"	d
MV_DEBUG_WL_FULL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DEBUG_WL_FULL$/;"	d
MV_DEFAULT_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_DEFAULT_BOARD_ID	/;"	d
MV_DEFAULT_DEVICE_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_DEFAULT_DEVICE_ID	/;"	d
MV_DIMM_INFO	drivers/ddr/marvell/axp/ddr3_spd.c	/^} MV_DIMM_INFO;$/;"	t	typeref:struct:dimm_info	file:
MV_DMA	drivers/ddr/marvell/a38x/xor.h	/^	MV_DMA,			\/* XOR channel functions as IDMA channel      *\/$/;"	e	enum:xor_type
MV_DMA	drivers/ddr/marvell/axp/xor.h	/^	MV_DMA,		\/* XOR channel functions as IDMA channel        *\/$/;"	e	enum:xor_type
MV_DMA_0	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_DMA_0 /;"	d
MV_DRAM_INFO	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^} MV_DRAM_INFO;$/;"	t	typeref:struct:dram_info
MV_DRAM_MC_INIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^} MV_DRAM_MC_INIT;$/;"	t	typeref:struct:dram_mv_init
MV_DRAM_MODES	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^} MV_DRAM_MODES;$/;"	t	typeref:struct:dram_modes
MV_DRAM_TRAINING_INIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^} MV_DRAM_TRAINING_INIT;$/;"	t	typeref:struct:dram_training_init
MV_EMPTY	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_EMPTY	/;"	d
MV_EMPTY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_EMPTY	/;"	d
MV_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_ERROR	/;"	d
MV_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_ERROR	/;"	d
MV_ETH_BASE_ADDR	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_ETH_BASE_ADDR	/;"	d
MV_ETH_REGS_BASE	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_ETH_REGS_BASE(/;"	d
MV_ETH_REGS_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_ETH_REGS_OFFSET(/;"	d
MV_FAIL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_FAIL	/;"	d
MV_FAIL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_FAIL	/;"	d
MV_FPGA_DEV_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_FPGA_DEV_ID	/;"	d
MV_FULL	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_FULL	/;"	d
MV_FULL	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_FULL	/;"	d
MV_GET_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_GET_ERROR	/;"	d
MV_GET_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_GET_ERROR	/;"	d
MV_GPP66	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_GPP66	/;"	d
MV_GPP_REGS_BASE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_GPP_REGS_BASE(/;"	d
MV_GPP_REGS_BASE	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_GPP_REGS_BASE(/;"	d
MV_GPP_REGS_BASE_0	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_GPP_REGS_BASE_0	/;"	d
MV_GPP_REGS_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_GPP_REGS_OFFSET(/;"	d
MV_HW_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_HW_ERROR	/;"	d
MV_HW_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_HW_ERROR	/;"	d
MV_IDLE	drivers/ddr/marvell/a38x/xor.h	/^	MV_IDLE,$/;"	e	enum:mv_state
MV_IDLE	drivers/ddr/marvell/axp/xor.h	/^	MV_IDLE,$/;"	e	enum:mv_state
MV_INIT_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_INIT_ERROR	/;"	d
MV_INIT_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_INIT_ERROR	/;"	d
MV_INVALID	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_INVALID	/;"	d
MV_INVALID	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_INVALID	/;"	d
MV_INVALID_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_INVALID_BOARD_ID	/;"	d
MV_IS_POWER_OF_2	drivers/ddr/marvell/a38x/xor.h	/^#define MV_IS_POWER_OF_2(/;"	d
MV_LOG_LEVEL_0	drivers/ddr/marvell/a38x/ddr3_init.h	/^	MV_LOG_LEVEL_0,$/;"	e	enum:log_level
MV_LOG_LEVEL_0	drivers/ddr/marvell/axp/ddr3_init.h	/^	MV_LOG_LEVEL_0,$/;"	e	enum:log_level
MV_LOG_LEVEL_1	drivers/ddr/marvell/a38x/ddr3_init.h	/^	MV_LOG_LEVEL_1,$/;"	e	enum:log_level
MV_LOG_LEVEL_1	drivers/ddr/marvell/axp/ddr3_init.h	/^	MV_LOG_LEVEL_1,$/;"	e	enum:log_level
MV_LOG_LEVEL_2	drivers/ddr/marvell/a38x/ddr3_init.h	/^	MV_LOG_LEVEL_2,$/;"	e	enum:log_level
MV_LOG_LEVEL_2	drivers/ddr/marvell/axp/ddr3_init.h	/^	MV_LOG_LEVEL_2,$/;"	e	enum:log_level
MV_LOG_LEVEL_3	drivers/ddr/marvell/a38x/ddr3_init.h	/^	MV_LOG_LEVEL_3$/;"	e	enum:log_level
MV_LOG_LEVEL_3	drivers/ddr/marvell/axp/ddr3_init.h	/^	MV_LOG_LEVEL_3$/;"	e	enum:log_level
MV_MARVELL_BOARD_NUM	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_MARVELL_BOARD_NUM	/;"	d
MV_MAX_BOARD_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_MAX_BOARD_ID	/;"	d
MV_MAX_CUSTOMER_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_MAX_CUSTOMER_BOARD_ID	/;"	d
MV_MAX_DDR3_STATIC_SIZE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define MV_MAX_DDR3_STATIC_SIZE	/;"	d
MV_MAX_DDR3_STATIC_SIZE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_MAX_DDR3_STATIC_SIZE	/;"	d
MV_MAX_DEV_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_MAX_DEV_ID,$/;"	e	enum:__anonb53ad2100103
MV_MAX_GPIO	drivers/gpio/mvgpio.c	/^#define MV_MAX_GPIO	/;"	d	file:
MV_MAX_MARVELL_BOARD_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define MV_MAX_MARVELL_BOARD_ID	/;"	d
MV_MBUS_REGS_OFFSET	drivers/ddr/marvell/axp/ddr3_init.h	/^#define MV_MBUS_REGS_OFFSET /;"	d
MV_MFPR_BASE	arch/arm/include/asm/arch-armada100/config.h	/^#define MV_MFPR_BASE	/;"	d
MV_MISC_REGS_BASE	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define MV_MISC_REGS_BASE	/;"	d
MV_MISC_REGS_BASE	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_MISC_REGS_BASE	/;"	d
MV_MISC_REGS_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_MISC_REGS_OFFSET	/;"	d
MV_NONE	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	MV_NONE,$/;"	e	enum:__anonb53ad2100103
MV_NOT_ALIGNED	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_ALIGNED	/;"	d
MV_NOT_ALIGNED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_ALIGNED	/;"	d
MV_NOT_ALLOWED	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_ALLOWED	/;"	d
MV_NOT_ALLOWED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_ALLOWED	/;"	d
MV_NOT_FOUND	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_FOUND	/;"	d
MV_NOT_FOUND	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_FOUND	/;"	d
MV_NOT_IMPLEMENTED	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_IMPLEMENTED /;"	d
MV_NOT_IMPLEMENTED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_IMPLEMENTED /;"	d
MV_NOT_INITIALIZED	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_INITIALIZED /;"	d
MV_NOT_INITIALIZED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_INITIALIZED /;"	d
MV_NOT_READY	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_READY	/;"	d
MV_NOT_READY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_READY	/;"	d
MV_NOT_STARTED	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_STARTED	/;"	d
MV_NOT_STARTED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_STARTED	/;"	d
MV_NOT_SUPPORTED	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NOT_SUPPORTED /;"	d
MV_NOT_SUPPORTED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NOT_SUPPORTED /;"	d
MV_NO_CHANGE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NO_CHANGE	/;"	d
MV_NO_CHANGE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NO_CHANGE	/;"	d
MV_NO_MORE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NO_MORE	/;"	d
MV_NO_MORE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NO_MORE	/;"	d
MV_NO_RESOURCE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NO_RESOURCE	/;"	d
MV_NO_RESOURCE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NO_RESOURCE	/;"	d
MV_NO_SUCH	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_NO_SUCH	/;"	d
MV_NO_SUCH	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_NO_SUCH	/;"	d
MV_OK	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_OK	/;"	d
MV_OK	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_OK	/;"	d
MV_OUT_OF_CPU_MEM	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_OUT_OF_CPU_MEM /;"	d
MV_OUT_OF_CPU_MEM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_OUT_OF_CPU_MEM /;"	d
MV_OUT_OF_RANGE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_OUT_OF_RANGE	/;"	d
MV_OUT_OF_RANGE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_OUT_OF_RANGE	/;"	d
MV_PAUSE	drivers/ddr/marvell/a38x/xor.h	/^	MV_PAUSE,		\/* Pause    *\/$/;"	e	enum:mv_command
MV_PAUSE	drivers/ddr/marvell/axp/xor.h	/^	MV_PAUSE,		\/* Pause    *\/$/;"	e	enum:mv_command
MV_PAUSED	drivers/ddr/marvell/a38x/xor.h	/^	MV_PAUSED,$/;"	e	enum:mv_state
MV_PAUSED	drivers/ddr/marvell/axp/xor.h	/^	MV_PAUSED,$/;"	e	enum:mv_state
MV_PEX_END_POINT	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	MV_PEX_END_POINT	\/* end point device *\/$/;"	e	enum:pex_type
MV_PEX_IF_REGS_BASE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_PEX_IF_REGS_BASE(/;"	d
MV_PEX_IF_REGS_OFFSET	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define MV_PEX_IF_REGS_OFFSET(/;"	d
MV_PEX_MAX_IF	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_PEX_MAX_IF	/;"	d
MV_PEX_MAX_UNIT	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_PEX_MAX_UNIT	/;"	d
MV_PEX_ROOT_COMPLEX	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	MV_PEX_ROOT_COMPLEX,	\/* root complex device *\/$/;"	e	enum:pex_type
MV_PEX_TYPE	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^} MV_PEX_TYPE;$/;"	t	typeref:enum:pex_type
MV_PEX_UNIT_CFG	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^} MV_PEX_UNIT_CFG;$/;"	t	typeref:enum:__anon3796299a0203
MV_PEX_UNIT_TO_IF	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define MV_PEX_UNIT_TO_IF(/;"	d	file:
MV_PHY_ADR_REQUEST	drivers/net/mvgbe.c	/^#define MV_PHY_ADR_REQUEST /;"	d	file:
MV_RESTART	drivers/ddr/marvell/a38x/xor.h	/^	MV_RESTART		\/* Restart  *\/$/;"	e	enum:mv_command
MV_RESTART	drivers/ddr/marvell/axp/xor.h	/^	MV_RESTART		\/* Restart  *\/$/;"	e	enum:mv_command
MV_RXQ_DESC_ALIGNED_SIZE	drivers/net/mvgbe.h	/^#define MV_RXQ_DESC_ALIGNED_SIZE	/;"	d
MV_RX_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_RX_ERROR	/;"	d
MV_RX_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_RX_ERROR	/;"	d
MV_SATA_BASE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define MV_SATA_BASE	/;"	d
MV_SATA_PORT0_OFFSET	arch/arm/mach-kirkwood/include/mach/config.h	/^#define MV_SATA_PORT0_OFFSET	/;"	d
MV_SATA_PORT1_OFFSET	arch/arm/mach-kirkwood/include/mach/config.h	/^#define MV_SATA_PORT1_OFFSET	/;"	d
MV_SERDES_CHANGE_M_PHY	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^} MV_SERDES_CHANGE_M_PHY;$/;"	t	typeref:struct:serdes_change_m_phy
MV_SERDES_NUM_TO_PEX_NUM	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define MV_SERDES_NUM_TO_PEX_NUM(/;"	d
MV_SERDES_REV_1_2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define MV_SERDES_REV_1_2	/;"	d
MV_SERDES_REV_2_1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define MV_SERDES_REV_2_1	/;"	d
MV_SERDES_REV_NA	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define MV_SERDES_REV_NA	/;"	d
MV_SET_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_SET_ERROR	/;"	d
MV_SET_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_SET_ERROR	/;"	d
MV_START	drivers/ddr/marvell/a38x/xor.h	/^	MV_START,		\/* Start     *\/$/;"	e	enum:mv_command
MV_START	drivers/ddr/marvell/axp/xor.h	/^	MV_START,		\/* Start     *\/$/;"	e	enum:mv_command
MV_STOP	drivers/ddr/marvell/a38x/xor.h	/^	MV_STOP,		\/* Stop     *\/$/;"	e	enum:mv_command
MV_STOP	drivers/ddr/marvell/axp/xor.h	/^	MV_STOP,		\/* Stop     *\/$/;"	e	enum:mv_command
MV_TERMINATE	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_TERMINATE	/;"	d
MV_TERMINATE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_TERMINATE	/;"	d
MV_TIMEOUT	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_TIMEOUT	/;"	d
MV_TIMEOUT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_TIMEOUT	/;"	d
MV_TX_ERROR	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_TX_ERROR	/;"	d
MV_TX_ERROR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_TX_ERROR	/;"	d
MV_UART_CONSOLE_BASE	arch/arm/include/asm/arch-armada100/config.h	/^#define MV_UART_CONSOLE_BASE	/;"	d
MV_UART_CONSOLE_BASE	arch/arm/mach-kirkwood/include/mach/config.h	/^#define MV_UART_CONSOLE_BASE	/;"	d
MV_UART_CONSOLE_BASE	arch/arm/mach-mvebu/include/mach/config.h	/^#define MV_UART_CONSOLE_BASE	/;"	d
MV_UNDEFINED_STATE	drivers/ddr/marvell/a38x/xor.h	/^	MV_UNDEFINED_STATE$/;"	e	enum:mv_state
MV_UNDEFINED_STATE	drivers/ddr/marvell/axp/xor.h	/^	MV_UNDEFINED_STATE$/;"	e	enum:mv_state
MV_USB_PHY_BASE	arch/arm/mach-mvebu/cpu.c	/^#define MV_USB_PHY_BASE	/;"	d	file:
MV_USB_PHY_BASE	board/theadorable/theadorable.c	/^#define MV_USB_PHY_BASE	/;"	d	file:
MV_USB_PHY_PLL_REG	arch/arm/mach-mvebu/cpu.c	/^#define MV_USB_PHY_PLL_REG(/;"	d	file:
MV_USB_X3_BASE	arch/arm/mach-mvebu/cpu.c	/^#define MV_USB_X3_BASE(/;"	d	file:
MV_USB_X3_PHY_CHANNEL	arch/arm/mach-mvebu/cpu.c	/^#define MV_USB_X3_PHY_CHANNEL(/;"	d	file:
MV_WRITE_PROTECT	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define MV_WRITE_PROTECT /;"	d
MV_WRITE_PROTECT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define MV_WRITE_PROTECT /;"	d
MV_XOR	drivers/ddr/marvell/a38x/xor.h	/^	MV_XOR,			\/* XOR channel functions as XOR accelerator   *\/$/;"	e	enum:xor_type
MV_XOR	drivers/ddr/marvell/axp/xor.h	/^	MV_XOR,		\/* XOR channel functions as XOR accelerator     *\/$/;"	e	enum:xor_type
MV_XOR_MAX_CHAN	drivers/ddr/marvell/a38x/xor.h	/^#define MV_XOR_MAX_CHAN	/;"	d
MV_XOR_MAX_CHAN	drivers/ddr/marvell/axp/xor.h	/^#define MV_XOR_MAX_CHAN /;"	d
MV_XOR_MAX_CHAN_PER_UNIT	drivers/ddr/marvell/a38x/xor.h	/^#define MV_XOR_MAX_CHAN_PER_UNIT /;"	d
MV_XOR_MAX_UNIT	drivers/ddr/marvell/a38x/xor.h	/^#define MV_XOR_MAX_UNIT	/;"	d
MV_XOR_REGS_BASE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define MV_XOR_REGS_BASE(/;"	d
MV_XOR_REGS_BASE	drivers/ddr/marvell/axp/xor_regs.h	/^#define MV_XOR_REGS_BASE(/;"	d
MV_XOR_REGS_OFFSET	drivers/ddr/marvell/a38x/xor_regs.h	/^#define MV_XOR_REGS_OFFSET(/;"	d
MV_XOR_REGS_OFFSET	drivers/ddr/marvell/axp/xor_regs.h	/^#define MV_XOR_REGS_OFFSET(/;"	d
MWE	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                       MWE /;"	d
MWF_EN	drivers/usb/eth/r8152.h	/^#define MWF_EN	/;"	d
MX23_PAD_AUART1_CTS__AUART1_CTS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_CTS__AUART1_CTS	/;"	d
MX23_PAD_AUART1_CTS__GPIO_0_26	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_CTS__GPIO_0_26	/;"	d
MX23_PAD_AUART1_CTS__SSP1_DATA4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_CTS__SSP1_DATA4	/;"	d
MX23_PAD_AUART1_RTS__AUART1_RTS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RTS__AUART1_RTS	/;"	d
MX23_PAD_AUART1_RTS__GPIO_0_27	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RTS__GPIO_0_27	/;"	d
MX23_PAD_AUART1_RTS__IR_CLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RTS__IR_CLK	/;"	d
MX23_PAD_AUART1_RTS__SSP1_DATA5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RTS__SSP1_DATA5	/;"	d
MX23_PAD_AUART1_RX__AUART1_RX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RX__AUART1_RX	/;"	d
MX23_PAD_AUART1_RX__GPIO_0_28	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RX__GPIO_0_28	/;"	d
MX23_PAD_AUART1_RX__IR_RX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RX__IR_RX	/;"	d
MX23_PAD_AUART1_RX__SSP1_DATA6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_RX__SSP1_DATA6	/;"	d
MX23_PAD_AUART1_TX__AUART1_TX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_TX__AUART1_TX	/;"	d
MX23_PAD_AUART1_TX__GPIO_0_29	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_TX__GPIO_0_29	/;"	d
MX23_PAD_AUART1_TX__IR_TX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_TX__IR_TX	/;"	d
MX23_PAD_AUART1_TX__SSP1_DATA7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_AUART1_TX__SSP1_DATA7	/;"	d
MX23_PAD_EMI_A00__EMI_A00	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A00__EMI_A00	/;"	d
MX23_PAD_EMI_A00__GPIO_2_9	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A00__GPIO_2_9	/;"	d
MX23_PAD_EMI_A01__EMI_A01	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A01__EMI_A01	/;"	d
MX23_PAD_EMI_A01__GPIO_2_10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A01__GPIO_2_10	/;"	d
MX23_PAD_EMI_A02__EMI_A02	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A02__EMI_A02	/;"	d
MX23_PAD_EMI_A02__GPIO_2_11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A02__GPIO_2_11	/;"	d
MX23_PAD_EMI_A03__EMI_A03	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A03__EMI_A03	/;"	d
MX23_PAD_EMI_A03__GPIO_2_12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A03__GPIO_2_12	/;"	d
MX23_PAD_EMI_A04__EMI_A04	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A04__EMI_A04	/;"	d
MX23_PAD_EMI_A04__GPIO_2_13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A04__GPIO_2_13	/;"	d
MX23_PAD_EMI_A05__EMI_A05	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A05__EMI_A05	/;"	d
MX23_PAD_EMI_A05__GPIO_2_14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A05__GPIO_2_14	/;"	d
MX23_PAD_EMI_A06__EMI_A06	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A06__EMI_A06	/;"	d
MX23_PAD_EMI_A06__GPIO_2_15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A06__GPIO_2_15	/;"	d
MX23_PAD_EMI_A07__EMI_A07	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A07__EMI_A07	/;"	d
MX23_PAD_EMI_A07__GPIO_2_16	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A07__GPIO_2_16	/;"	d
MX23_PAD_EMI_A08__EMI_A08	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A08__EMI_A08	/;"	d
MX23_PAD_EMI_A08__GPIO_2_17	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A08__GPIO_2_17	/;"	d
MX23_PAD_EMI_A09__EMI_A09	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A09__EMI_A09	/;"	d
MX23_PAD_EMI_A09__GPIO_2_18	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A09__GPIO_2_18	/;"	d
MX23_PAD_EMI_A10__EMI_A10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A10__EMI_A10	/;"	d
MX23_PAD_EMI_A10__GPIO_2_19	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A10__GPIO_2_19	/;"	d
MX23_PAD_EMI_A11__EMI_A11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A11__EMI_A11	/;"	d
MX23_PAD_EMI_A11__GPIO_2_20	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A11__GPIO_2_20	/;"	d
MX23_PAD_EMI_A12__EMI_A12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A12__EMI_A12	/;"	d
MX23_PAD_EMI_A12__GPIO_2_21	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_A12__GPIO_2_21	/;"	d
MX23_PAD_EMI_BA0__EMI_BA0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_BA0__EMI_BA0	/;"	d
MX23_PAD_EMI_BA0__GPIO_2_22	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_BA0__GPIO_2_22	/;"	d
MX23_PAD_EMI_BA1__EMI_BA1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_BA1__EMI_BA1	/;"	d
MX23_PAD_EMI_BA1__GPIO_2_23	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_BA1__GPIO_2_23	/;"	d
MX23_PAD_EMI_CASN__EMI_CASN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CASN__EMI_CASN	/;"	d
MX23_PAD_EMI_CASN__GPIO_2_24	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CASN__GPIO_2_24	/;"	d
MX23_PAD_EMI_CE0N__EMI_CE0N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CE0N__EMI_CE0N	/;"	d
MX23_PAD_EMI_CE0N__GPIO_2_25	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CE0N__GPIO_2_25	/;"	d
MX23_PAD_EMI_CE1N__EMI_CE1N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CE1N__EMI_CE1N	/;"	d
MX23_PAD_EMI_CE1N__GPIO_2_26	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CE1N__GPIO_2_26	/;"	d
MX23_PAD_EMI_CKE__EMI_CKE	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CKE__EMI_CKE	/;"	d
MX23_PAD_EMI_CKE__GPIO_2_29	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CKE__GPIO_2_29	/;"	d
MX23_PAD_EMI_CLKN__EMI_CLKN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CLKN__EMI_CLKN	/;"	d
MX23_PAD_EMI_CLK__EMI_CLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_CLK__EMI_CLK	/;"	d
MX23_PAD_EMI_D00__EMI_D00	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D00__EMI_D00	/;"	d
MX23_PAD_EMI_D01__EMI_D01	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D01__EMI_D01	/;"	d
MX23_PAD_EMI_D02__EMI_D02	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D02__EMI_D02	/;"	d
MX23_PAD_EMI_D03__EMI_D03	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D03__EMI_D03	/;"	d
MX23_PAD_EMI_D04__EMI_D04	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D04__EMI_D04	/;"	d
MX23_PAD_EMI_D05__EMI_D05	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D05__EMI_D05	/;"	d
MX23_PAD_EMI_D06__EMI_D06	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D06__EMI_D06	/;"	d
MX23_PAD_EMI_D07__EMI_D07	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D07__EMI_D07	/;"	d
MX23_PAD_EMI_D08__EMI_D08	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D08__EMI_D08	/;"	d
MX23_PAD_EMI_D09__EMI_D09	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D09__EMI_D09	/;"	d
MX23_PAD_EMI_D10__EMI_D10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D10__EMI_D10	/;"	d
MX23_PAD_EMI_D11__EMI_D11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D11__EMI_D11	/;"	d
MX23_PAD_EMI_D12__EMI_D12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D12__EMI_D12	/;"	d
MX23_PAD_EMI_D13__EMI_D13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D13__EMI_D13	/;"	d
MX23_PAD_EMI_D14__EMI_D14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D14__EMI_D14	/;"	d
MX23_PAD_EMI_D15__EMI_D15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_D15__EMI_D15	/;"	d
MX23_PAD_EMI_DQM0__EMI_DQM0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_DQM0__EMI_DQM0	/;"	d
MX23_PAD_EMI_DQM1__EMI_DQM1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_DQM1__EMI_DQM1	/;"	d
MX23_PAD_EMI_DQS0__EMI_DQS0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_DQS0__EMI_DQS0	/;"	d
MX23_PAD_EMI_DQS1__EMI_DQS1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_DQS1__EMI_DQS1	/;"	d
MX23_PAD_EMI_RASN__EMI_RASN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_RASN__EMI_RASN	/;"	d
MX23_PAD_EMI_RASN__GPIO_2_30	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_RASN__GPIO_2_30	/;"	d
MX23_PAD_EMI_WEN__EMI_WEN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_WEN__EMI_WEN	/;"	d
MX23_PAD_EMI_WEN__GPIO_2_31	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_EMI_WEN__GPIO_2_31	/;"	d
MX23_PAD_GPMI_ALE__GPIO_0_17	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_ALE__GPIO_0_17	/;"	d
MX23_PAD_GPMI_ALE__GPMI_ALE	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_ALE__GPMI_ALE	/;"	d
MX23_PAD_GPMI_ALE__LCD_D17	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_ALE__LCD_D17	/;"	d
MX23_PAD_GPMI_CE0N__GPIO_2_28	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE0N__GPIO_2_28	/;"	d
MX23_PAD_GPMI_CE0N__GPMI_CE0N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE0N__GPMI_CE0N	/;"	d
MX23_PAD_GPMI_CE1N__GPIO_2_27	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE1N__GPIO_2_27	/;"	d
MX23_PAD_GPMI_CE1N__GPMI_CE1N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE1N__GPMI_CE1N	/;"	d
MX23_PAD_GPMI_CE2N__ATA_A2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE2N__ATA_A2	/;"	d
MX23_PAD_GPMI_CE2N__GPIO_0_18	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE2N__GPIO_0_18	/;"	d
MX23_PAD_GPMI_CE2N__GPMI_CE2N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CE2N__GPMI_CE2N	/;"	d
MX23_PAD_GPMI_CLE__GPIO_0_16	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CLE__GPIO_0_16	/;"	d
MX23_PAD_GPMI_CLE__GPMI_CLE	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CLE__GPMI_CLE	/;"	d
MX23_PAD_GPMI_CLE__LCD_D16	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_CLE__LCD_D16	/;"	d
MX23_PAD_GPMI_D00__GPIO_0_0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D00__GPIO_0_0	/;"	d
MX23_PAD_GPMI_D00__GPMI_D00	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D00__GPMI_D00	/;"	d
MX23_PAD_GPMI_D00__LCD_D8	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D00__LCD_D8	/;"	d
MX23_PAD_GPMI_D00__SSP2_DATA0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D00__SSP2_DATA0	/;"	d
MX23_PAD_GPMI_D01__GPIO_0_1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D01__GPIO_0_1	/;"	d
MX23_PAD_GPMI_D01__GPMI_D01	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D01__GPMI_D01	/;"	d
MX23_PAD_GPMI_D01__LCD_D9	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D01__LCD_D9	/;"	d
MX23_PAD_GPMI_D01__SSP2_DATA1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D01__SSP2_DATA1	/;"	d
MX23_PAD_GPMI_D02__GPIO_0_2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D02__GPIO_0_2	/;"	d
MX23_PAD_GPMI_D02__GPMI_D02	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D02__GPMI_D02	/;"	d
MX23_PAD_GPMI_D02__LCD_D10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D02__LCD_D10	/;"	d
MX23_PAD_GPMI_D02__SSP2_DATA2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D02__SSP2_DATA2	/;"	d
MX23_PAD_GPMI_D03__GPIO_0_3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D03__GPIO_0_3	/;"	d
MX23_PAD_GPMI_D03__GPMI_D03	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D03__GPMI_D03	/;"	d
MX23_PAD_GPMI_D03__LCD_D11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D03__LCD_D11	/;"	d
MX23_PAD_GPMI_D03__SSP2_DATA3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D03__SSP2_DATA3	/;"	d
MX23_PAD_GPMI_D04__GPIO_0_4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D04__GPIO_0_4	/;"	d
MX23_PAD_GPMI_D04__GPMI_D04	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D04__GPMI_D04	/;"	d
MX23_PAD_GPMI_D04__LCD_D12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D04__LCD_D12	/;"	d
MX23_PAD_GPMI_D04__SSP2_DATA4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D04__SSP2_DATA4	/;"	d
MX23_PAD_GPMI_D05__GPIO_0_5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D05__GPIO_0_5	/;"	d
MX23_PAD_GPMI_D05__GPMI_D05	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D05__GPMI_D05	/;"	d
MX23_PAD_GPMI_D05__LCD_D13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D05__LCD_D13	/;"	d
MX23_PAD_GPMI_D05__SSP2_DATA5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D05__SSP2_DATA5	/;"	d
MX23_PAD_GPMI_D06__GPIO_0_6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D06__GPIO_0_6	/;"	d
MX23_PAD_GPMI_D06__GPMI_D06	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D06__GPMI_D06	/;"	d
MX23_PAD_GPMI_D06__LCD_D14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D06__LCD_D14	/;"	d
MX23_PAD_GPMI_D06__SSP2_DATA6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D06__SSP2_DATA6	/;"	d
MX23_PAD_GPMI_D07__GPIO_0_7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D07__GPIO_0_7	/;"	d
MX23_PAD_GPMI_D07__GPMI_D07	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D07__GPMI_D07	/;"	d
MX23_PAD_GPMI_D07__LCD_D15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D07__LCD_D15	/;"	d
MX23_PAD_GPMI_D07__SSP2_DATA7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D07__SSP2_DATA7	/;"	d
MX23_PAD_GPMI_D08__GPIO_0_8	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D08__GPIO_0_8	/;"	d
MX23_PAD_GPMI_D08__GPMI_D08	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D08__GPMI_D08	/;"	d
MX23_PAD_GPMI_D08__LCD_D18	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D08__LCD_D18	/;"	d
MX23_PAD_GPMI_D08__SSP1_DATA4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D08__SSP1_DATA4	/;"	d
MX23_PAD_GPMI_D09__GPIO_0_9	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D09__GPIO_0_9	/;"	d
MX23_PAD_GPMI_D09__GPMI_D09	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D09__GPMI_D09	/;"	d
MX23_PAD_GPMI_D09__LCD_D19	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D09__LCD_D19	/;"	d
MX23_PAD_GPMI_D09__SSP1_DATA5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D09__SSP1_DATA5	/;"	d
MX23_PAD_GPMI_D10__GPIO_0_10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D10__GPIO_0_10	/;"	d
MX23_PAD_GPMI_D10__GPMI_D10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D10__GPMI_D10	/;"	d
MX23_PAD_GPMI_D10__LCD_D20	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D10__LCD_D20	/;"	d
MX23_PAD_GPMI_D10__SSP1_DATA6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D10__SSP1_DATA6	/;"	d
MX23_PAD_GPMI_D11__GPIO_0_11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D11__GPIO_0_11	/;"	d
MX23_PAD_GPMI_D11__GPMI_D11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D11__GPMI_D11	/;"	d
MX23_PAD_GPMI_D11__LCD_D21	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D11__LCD_D21	/;"	d
MX23_PAD_GPMI_D11__SSP1_DATA7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D11__SSP1_DATA7	/;"	d
MX23_PAD_GPMI_D12__GPIO_0_12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D12__GPIO_0_12	/;"	d
MX23_PAD_GPMI_D12__GPMI_D12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D12__GPMI_D12	/;"	d
MX23_PAD_GPMI_D12__LCD_D22	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D12__LCD_D22	/;"	d
MX23_PAD_GPMI_D13__GPIO_0_13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D13__GPIO_0_13	/;"	d
MX23_PAD_GPMI_D13__GPMI_D13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D13__GPMI_D13	/;"	d
MX23_PAD_GPMI_D13__LCD_D23	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D13__LCD_D23	/;"	d
MX23_PAD_GPMI_D14__AUART2_RX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D14__AUART2_RX	/;"	d
MX23_PAD_GPMI_D14__GPIO_0_14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D14__GPIO_0_14	/;"	d
MX23_PAD_GPMI_D14__GPMI_D14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D14__GPMI_D14	/;"	d
MX23_PAD_GPMI_D15__AUART2_TX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D15__AUART2_TX	/;"	d
MX23_PAD_GPMI_D15__GPIO_0_15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D15__GPIO_0_15	/;"	d
MX23_PAD_GPMI_D15__GPMI_CE3N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D15__GPMI_CE3N	/;"	d
MX23_PAD_GPMI_D15__GPMI_D15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_D15__GPMI_D15	/;"	d
MX23_PAD_GPMI_RDN__GPIO_0_25	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDN__GPIO_0_25	/;"	d
MX23_PAD_GPMI_RDN__GPMI_RDN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDN__GPMI_RDN	/;"	d
MX23_PAD_GPMI_RDY0__GPIO_0_19	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY0__GPIO_0_19	/;"	d
MX23_PAD_GPMI_RDY0__GPMI_RDY0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY0__GPMI_RDY0	/;"	d
MX23_PAD_GPMI_RDY0__SSP2_DETECT	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY0__SSP2_DETECT	/;"	d
MX23_PAD_GPMI_RDY1__GPIO_0_20	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY1__GPIO_0_20	/;"	d
MX23_PAD_GPMI_RDY1__GPMI_RDY1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY1__GPMI_RDY1	/;"	d
MX23_PAD_GPMI_RDY1__SSP2_CMD	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY1__SSP2_CMD	/;"	d
MX23_PAD_GPMI_RDY2__GPIO_0_21	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY2__GPIO_0_21	/;"	d
MX23_PAD_GPMI_RDY2__GPMI_RDY2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY2__GPMI_RDY2	/;"	d
MX23_PAD_GPMI_RDY3__GPIO_0_22	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY3__GPIO_0_22	/;"	d
MX23_PAD_GPMI_RDY3__GPMI_RDY3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_RDY3__GPMI_RDY3	/;"	d
MX23_PAD_GPMI_WPN__GPIO_0_23	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_WPN__GPIO_0_23	/;"	d
MX23_PAD_GPMI_WPN__GPMI_WPN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_WPN__GPMI_WPN	/;"	d
MX23_PAD_GPMI_WRN__GPIO_0_24	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_WRN__GPIO_0_24	/;"	d
MX23_PAD_GPMI_WRN__GPMI_WRN	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_WRN__GPMI_WRN	/;"	d
MX23_PAD_GPMI_WRN__SSP2_SCK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_GPMI_WRN__SSP2_SCK	/;"	d
MX23_PAD_I2C_SCL__AUART1_TX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SCL__AUART1_TX	/;"	d
MX23_PAD_I2C_SCL__GPIO_0_30	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SCL__GPIO_0_30	/;"	d
MX23_PAD_I2C_SCL__GPMI_RDY2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SCL__GPMI_RDY2	/;"	d
MX23_PAD_I2C_SCL__I2C_SCL	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SCL__I2C_SCL	/;"	d
MX23_PAD_I2C_SDA__AUART1_RX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SDA__AUART1_RX	/;"	d
MX23_PAD_I2C_SDA__GPIO_0_31	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SDA__GPIO_0_31	/;"	d
MX23_PAD_I2C_SDA__GPMI_CE2N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SDA__GPMI_CE2N	/;"	d
MX23_PAD_I2C_SDA__I2C_SDA	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_I2C_SDA__I2C_SDA	/;"	d
MX23_PAD_LCD_CS__GPIO_1_21	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_CS__GPIO_1_21	/;"	d
MX23_PAD_LCD_CS__LCD_CS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_CS__LCD_CS	/;"	d
MX23_PAD_LCD_D00__ETM_DA8	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D00__ETM_DA8	/;"	d
MX23_PAD_LCD_D00__GPIO_1_0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D00__GPIO_1_0	/;"	d
MX23_PAD_LCD_D00__LCD_D00	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D00__LCD_D00	/;"	d
MX23_PAD_LCD_D01__ETM_DA9	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D01__ETM_DA9	/;"	d
MX23_PAD_LCD_D01__GPIO_1_1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D01__GPIO_1_1	/;"	d
MX23_PAD_LCD_D01__LCD_D01	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D01__LCD_D01	/;"	d
MX23_PAD_LCD_D02__ETM_DA10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D02__ETM_DA10	/;"	d
MX23_PAD_LCD_D02__GPIO_1_2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D02__GPIO_1_2	/;"	d
MX23_PAD_LCD_D02__LCD_D02	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D02__LCD_D02	/;"	d
MX23_PAD_LCD_D03__ETM_DA11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D03__ETM_DA11	/;"	d
MX23_PAD_LCD_D03__GPIO_1_3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D03__GPIO_1_3	/;"	d
MX23_PAD_LCD_D03__LCD_D03	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D03__LCD_D03	/;"	d
MX23_PAD_LCD_D04__ETM_DA12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D04__ETM_DA12	/;"	d
MX23_PAD_LCD_D04__GPIO_1_4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D04__GPIO_1_4	/;"	d
MX23_PAD_LCD_D04__LCD_D04	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D04__LCD_D04	/;"	d
MX23_PAD_LCD_D05__ETM_DA13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D05__ETM_DA13	/;"	d
MX23_PAD_LCD_D05__GPIO_1_5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D05__GPIO_1_5	/;"	d
MX23_PAD_LCD_D05__LCD_D05	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D05__LCD_D05	/;"	d
MX23_PAD_LCD_D06__ETM_DA14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D06__ETM_DA14	/;"	d
MX23_PAD_LCD_D06__GPIO_1_6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D06__GPIO_1_6	/;"	d
MX23_PAD_LCD_D06__LCD_D06	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D06__LCD_D06	/;"	d
MX23_PAD_LCD_D07__ETM_DA15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D07__ETM_DA15	/;"	d
MX23_PAD_LCD_D07__GPIO_1_7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D07__GPIO_1_7	/;"	d
MX23_PAD_LCD_D07__LCD_D07	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D07__LCD_D07	/;"	d
MX23_PAD_LCD_D08__ETM_DA0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D08__ETM_DA0	/;"	d
MX23_PAD_LCD_D08__GPIO_1_8	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D08__GPIO_1_8	/;"	d
MX23_PAD_LCD_D08__LCD_D08	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D08__LCD_D08	/;"	d
MX23_PAD_LCD_D08__SAIF2_SDATA0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D08__SAIF2_SDATA0	/;"	d
MX23_PAD_LCD_D09__ETM_DA1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D09__ETM_DA1	/;"	d
MX23_PAD_LCD_D09__GPIO_1_9	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D09__GPIO_1_9	/;"	d
MX23_PAD_LCD_D09__LCD_D09	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D09__LCD_D09	/;"	d
MX23_PAD_LCD_D09__SAIF1_SDATA0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D09__SAIF1_SDATA0	/;"	d
MX23_PAD_LCD_D10__ETM_DA2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D10__ETM_DA2	/;"	d
MX23_PAD_LCD_D10__GPIO_1_10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D10__GPIO_1_10	/;"	d
MX23_PAD_LCD_D10__LCD_D10	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D10__LCD_D10	/;"	d
MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK	/;"	d
MX23_PAD_LCD_D11__ETM_DA3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D11__ETM_DA3	/;"	d
MX23_PAD_LCD_D11__GPIO_1_11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D11__GPIO_1_11	/;"	d
MX23_PAD_LCD_D11__LCD_D11	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D11__LCD_D11	/;"	d
MX23_PAD_LCD_D11__SAIF_LRCLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D11__SAIF_LRCLK	/;"	d
MX23_PAD_LCD_D12__ETM_DA4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D12__ETM_DA4	/;"	d
MX23_PAD_LCD_D12__GPIO_1_12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D12__GPIO_1_12	/;"	d
MX23_PAD_LCD_D12__LCD_D12	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D12__LCD_D12	/;"	d
MX23_PAD_LCD_D12__SAIF2_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D12__SAIF2_SDATA1	/;"	d
MX23_PAD_LCD_D13__ETM_DA5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D13__ETM_DA5	/;"	d
MX23_PAD_LCD_D13__GPIO_1_13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D13__GPIO_1_13	/;"	d
MX23_PAD_LCD_D13__LCD_D13	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D13__LCD_D13	/;"	d
MX23_PAD_LCD_D13__SAIF2_SDATA2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D13__SAIF2_SDATA2	/;"	d
MX23_PAD_LCD_D14__ETM_DA6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D14__ETM_DA6	/;"	d
MX23_PAD_LCD_D14__GPIO_1_14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D14__GPIO_1_14	/;"	d
MX23_PAD_LCD_D14__LCD_D14	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D14__LCD_D14	/;"	d
MX23_PAD_LCD_D14__SAIF1_SDATA2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D14__SAIF1_SDATA2	/;"	d
MX23_PAD_LCD_D15__ETM_DA7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D15__ETM_DA7	/;"	d
MX23_PAD_LCD_D15__GPIO_1_15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D15__GPIO_1_15	/;"	d
MX23_PAD_LCD_D15__LCD_D15	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D15__LCD_D15	/;"	d
MX23_PAD_LCD_D15__SAIF1_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D15__SAIF1_SDATA1	/;"	d
MX23_PAD_LCD_D16__GPIO_1_16	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D16__GPIO_1_16	/;"	d
MX23_PAD_LCD_D16__LCD_D16	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D16__LCD_D16	/;"	d
MX23_PAD_LCD_D16__SAIF_ALT_BITCLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D16__SAIF_ALT_BITCLK	/;"	d
MX23_PAD_LCD_D17__GPIO_1_17	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D17__GPIO_1_17	/;"	d
MX23_PAD_LCD_D17__LCD_D17	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_D17__LCD_D17	/;"	d
MX23_PAD_LCD_DOTCK__GPIO_1_22	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_DOTCK__GPIO_1_22	/;"	d
MX23_PAD_LCD_DOTCK__GPMI_RDY3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_DOTCK__GPMI_RDY3	/;"	d
MX23_PAD_LCD_DOTCK__LCD_DOTCK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_DOTCK__LCD_DOTCK	/;"	d
MX23_PAD_LCD_ENABLE__GPIO_1_23	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_ENABLE__GPIO_1_23	/;"	d
MX23_PAD_LCD_ENABLE__I2C_SCL	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_ENABLE__I2C_SCL	/;"	d
MX23_PAD_LCD_ENABLE__LCD_ENABLE	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_ENABLE__LCD_ENABLE	/;"	d
MX23_PAD_LCD_HSYNC__GPIO_1_24	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_HSYNC__GPIO_1_24	/;"	d
MX23_PAD_LCD_HSYNC__I2C_SDA	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_HSYNC__I2C_SDA	/;"	d
MX23_PAD_LCD_HSYNC__LCD_HSYNC	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_HSYNC__LCD_HSYNC	/;"	d
MX23_PAD_LCD_RESET__ETM_TCTL	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RESET__ETM_TCTL	/;"	d
MX23_PAD_LCD_RESET__GPIO_1_18	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RESET__GPIO_1_18	/;"	d
MX23_PAD_LCD_RESET__GPMI_CE3N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RESET__GPMI_CE3N	/;"	d
MX23_PAD_LCD_RESET__LCD_RESET	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RESET__LCD_RESET	/;"	d
MX23_PAD_LCD_RS__ETM_TCLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RS__ETM_TCLK	/;"	d
MX23_PAD_LCD_RS__GPIO_1_19	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RS__GPIO_1_19	/;"	d
MX23_PAD_LCD_RS__LCD_RS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_RS__LCD_RS	/;"	d
MX23_PAD_LCD_VSYNC__GPIO_1_25	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_VSYNC__GPIO_1_25	/;"	d
MX23_PAD_LCD_VSYNC__LCD_BUSY	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_VSYNC__LCD_BUSY	/;"	d
MX23_PAD_LCD_VSYNC__LCD_VSYNC	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_VSYNC__LCD_VSYNC	/;"	d
MX23_PAD_LCD_WR__GPIO_1_20	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_WR__GPIO_1_20	/;"	d
MX23_PAD_LCD_WR__LCD_WR	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_LCD_WR__LCD_WR	/;"	d
MX23_PAD_PWM0__DUART_RX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM0__DUART_RX	/;"	d
MX23_PAD_PWM0__GPIO_1_26	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM0__GPIO_1_26	/;"	d
MX23_PAD_PWM0__PWM0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM0__PWM0	/;"	d
MX23_PAD_PWM0__ROTARYA	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM0__ROTARYA	/;"	d
MX23_PAD_PWM1__DUART_TX	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM1__DUART_TX	/;"	d
MX23_PAD_PWM1__GPIO_1_27	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM1__GPIO_1_27	/;"	d
MX23_PAD_PWM1__PWM1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM1__PWM1	/;"	d
MX23_PAD_PWM1__ROTARYB	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM1__ROTARYB	/;"	d
MX23_PAD_PWM2__GPIO_1_28	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM2__GPIO_1_28	/;"	d
MX23_PAD_PWM2__GPMI_RDY3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM2__GPMI_RDY3	/;"	d
MX23_PAD_PWM2__PWM2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM2__PWM2	/;"	d
MX23_PAD_PWM3__AUART1_CTS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM3__AUART1_CTS	/;"	d
MX23_PAD_PWM3__ETM_TCTL	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM3__ETM_TCTL	/;"	d
MX23_PAD_PWM3__GPIO_1_29	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM3__GPIO_1_29	/;"	d
MX23_PAD_PWM3__PWM3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM3__PWM3	/;"	d
MX23_PAD_PWM4__AUART1_RTS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM4__AUART1_RTS	/;"	d
MX23_PAD_PWM4__ETM_TCLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM4__ETM_TCLK	/;"	d
MX23_PAD_PWM4__GPIO_1_30	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM4__GPIO_1_30	/;"	d
MX23_PAD_PWM4__PWM4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_PWM4__PWM4	/;"	d
MX23_PAD_ROTARYA__AUART2_RTS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYA__AUART2_RTS	/;"	d
MX23_PAD_ROTARYA__GPIO_2_7	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYA__GPIO_2_7	/;"	d
MX23_PAD_ROTARYA__ROTARYA	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYA__ROTARYA	/;"	d
MX23_PAD_ROTARYA__SPDIF	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYA__SPDIF	/;"	d
MX23_PAD_ROTARYB__AUART2_CTS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYB__AUART2_CTS	/;"	d
MX23_PAD_ROTARYB__GPIO_2_8	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYB__GPIO_2_8	/;"	d
MX23_PAD_ROTARYB__GPMI_CE3N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYB__GPMI_CE3N	/;"	d
MX23_PAD_ROTARYB__ROTARYB	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_ROTARYB__ROTARYB	/;"	d
MX23_PAD_SSP1_CMD__GPIO_2_0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_CMD__GPIO_2_0	/;"	d
MX23_PAD_SSP1_CMD__JTAG_TDO	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_CMD__JTAG_TDO	/;"	d
MX23_PAD_SSP1_CMD__SSP1_CMD	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_CMD__SSP1_CMD	/;"	d
MX23_PAD_SSP1_DATA0__GPIO_2_2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA0__GPIO_2_2	/;"	d
MX23_PAD_SSP1_DATA0__JTAG_TDI	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA0__JTAG_TDI	/;"	d
MX23_PAD_SSP1_DATA0__SSP1_DATA0	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA0__SSP1_DATA0	/;"	d
MX23_PAD_SSP1_DATA1__GPIO_2_3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA1__GPIO_2_3	/;"	d
MX23_PAD_SSP1_DATA1__I2C_SCL	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA1__I2C_SCL	/;"	d
MX23_PAD_SSP1_DATA1__JTAG_TCLK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA1__JTAG_TCLK	/;"	d
MX23_PAD_SSP1_DATA1__SSP1_DATA1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA1__SSP1_DATA1	/;"	d
MX23_PAD_SSP1_DATA2__GPIO_2_4	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA2__GPIO_2_4	/;"	d
MX23_PAD_SSP1_DATA2__I2C_SDA	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA2__I2C_SDA	/;"	d
MX23_PAD_SSP1_DATA2__JTAG_RTCK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA2__JTAG_RTCK	/;"	d
MX23_PAD_SSP1_DATA2__SSP1_DATA2	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA2__SSP1_DATA2	/;"	d
MX23_PAD_SSP1_DATA3__GPIO_2_5	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA3__GPIO_2_5	/;"	d
MX23_PAD_SSP1_DATA3__JTAG_TMS	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA3__JTAG_TMS	/;"	d
MX23_PAD_SSP1_DATA3__SSP1_DATA3	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DATA3__SSP1_DATA3	/;"	d
MX23_PAD_SSP1_DETECT__GPIO_2_1	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DETECT__GPIO_2_1	/;"	d
MX23_PAD_SSP1_DETECT__GPMI_CE3N	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DETECT__GPMI_CE3N	/;"	d
MX23_PAD_SSP1_DETECT__SSP1_DETECT	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DETECT__SSP1_DETECT	/;"	d
MX23_PAD_SSP1_DETECT__USB_OTG_ID	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_DETECT__USB_OTG_ID	/;"	d
MX23_PAD_SSP1_SCK__GPIO_2_6	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_SCK__GPIO_2_6	/;"	d
MX23_PAD_SSP1_SCK__JTAG_TRST	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_SCK__JTAG_TRST	/;"	d
MX23_PAD_SSP1_SCK__SSP1_SCK	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define MX23_PAD_SSP1_SCK__SSP1_SCK	/;"	d
MX25_H1_IPPUE_DOWN_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_IPPUE_DOWN_BIT	/;"	d	file:
MX25_H1_IPPUE_UP_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_IPPUE_UP_BIT	/;"	d	file:
MX25_H1_OCPOL_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_OCPOL_BIT	/;"	d	file:
MX25_H1_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_PM_BIT	/;"	d	file:
MX25_H1_PP_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_PP_BIT	/;"	d	file:
MX25_H1_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_SIC_MASK	/;"	d	file:
MX25_H1_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_SIC_SHIFT	/;"	d	file:
MX25_H1_TLL_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_TLL_BIT	/;"	d	file:
MX25_H1_USBTE_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_H1_USBTE_BIT	/;"	d	file:
MX25_KPP_COL_PAD_CTRL	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^#define MX25_KPP_COL_PAD_CTRL	/;"	d
MX25_KPP_ROW_PAD_CTRL	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^#define MX25_KPP_ROW_PAD_CTRL	/;"	d
MX25_OTG_OCPOL_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_OTG_OCPOL_BIT	/;"	d	file:
MX25_OTG_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_OTG_PM_BIT	/;"	d	file:
MX25_OTG_PP_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX25_OTG_PP_BIT	/;"	d	file:
MX25_OTG_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX25_OTG_SIC_MASK	/;"	d	file:
MX25_OTG_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX25_OTG_SIC_SHIFT	/;"	d	file:
MX25_PAD_A10__A10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A10__A10			= IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A10__GPIO_4_0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A10__GPIO_4_0			= IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A13__A13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A13__A13			= IOMUX_PAD(0x22C, 0x00c, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A13__GPIO_4_1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A13__GPIO_4_1			= IOMUX_PAD(0x22C, 0x00c, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A14__A14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A14__A14			= IOMUX_PAD(0x230, 0x010, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A14__GPIO_2_0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A14__GPIO_2_0			= IOMUX_PAD(0x230, 0x010, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A15__A15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A15__A15			= IOMUX_PAD(0x234, 0x014, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A15__GPIO_2_1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A15__GPIO_2_1			= IOMUX_PAD(0x234, 0x014, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A16__A16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A16__A16			= IOMUX_PAD(0x000, 0x018, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A16__GPIO_2_2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A16__GPIO_2_2			= IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A17__A17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A17__A17			= IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A17__GPIO_2_3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A17__GPIO_2_3			= IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A18__A18	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A18__A18			= IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A18__FEC_COL	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A18__FEC_COL			= IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A18__GPIO_2_4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A18__GPIO_2_4			= IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A19__A19	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A19__A19			= IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A19__FEC_RX_ER	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A19__FEC_RX_ER			= IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A19__GPIO_2_5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A19__GPIO_2_5			= IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A20__A20	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A20__A20			= IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A20__FEC_RDATA2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A20__FEC_RDATA2		= IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A20__GPIO_2_6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A20__GPIO_2_6			= IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A21__A21	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A21__A21			= IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A21__FEC_RDATA3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A21__FEC_RDATA3		= IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A21__GPIO_2_7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A21__GPIO_2_7			= IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A22__A22	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A22__A22			= IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A22__GPIO_2_8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A22__GPIO_2_8			= IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A23__A23	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A23__A23			= IOMUX_PAD(0x24c, 0x034, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A23__GPIO_2_9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A23__GPIO_2_9			= IOMUX_PAD(0x24c, 0x034, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A24__A24	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A24__A24			= IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A24__FEC_RX_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A24__FEC_RX_CLK		= IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A24__GPIO_2_10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A24__GPIO_2_10			= IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A25__A25	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A25__A25			= IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A25__FEC_CRS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A25__FEC_CRS			= IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_A25__GPIO_2_11	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_A25__GPIO_2_11			= IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_BCLK__BCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_BCLK__BCLK			= IOMUX_PAD(0x000, 0x068, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_BCLK__GPIO_4_4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_BCLK__GPIO_4_4			= IOMUX_PAD(0x000, 0x068, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_BOOT_MODE0__BOOT_MODE0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_BOOT_MODE0__BOOT_MODE0		= IOMUX_PAD(0x000, 0x224, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_BOOT_MODE0__GPIO_4_30	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_BOOT_MODE0__GPIO_4_30		= IOMUX_PAD(0x000, 0x224, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_BOOT_MODE1__BOOT_MODE1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_BOOT_MODE1__BOOT_MODE1		= IOMUX_PAD(0x000, 0x228, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_BOOT_MODE1__GPIO_4_31	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_BOOT_MODE1__GPIO_4_31		= IOMUX_PAD(0x000, 0x228, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CLKO__CLKO	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CLKO__CLKO			= IOMUX_PAD(0x414, 0x220, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CLKO__GPIO_2_21	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CLKO__GPIO_2_21		= IOMUX_PAD(0x414, 0x220, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CONTRAST__CONTRAST	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CONTRAST__CONTRAST		= IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CONTRAST__FEC_CRS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CONTRAST__FEC_CRS		= IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CONTRAST__PWM4_PWMO	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CONTRAST__PWM4_PWMO		= IOMUX_PAD(0x310, 0x118, 0x14, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS0__CS0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS0__CS0			= IOMUX_PAD(0x000, 0x04c, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS0__GPIO_4_2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS0__GPIO_4_2			= IOMUX_PAD(0x000, 0x04c, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS1__CS1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS1__CS1			= IOMUX_PAD(0x000, 0x050, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS1__GPIO_4_3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS1__GPIO_4_3			= IOMUX_PAD(0x000, 0x050, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS1__NF_CE3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS1__NF_CE3			= IOMUX_PAD(0x000, 0x050, 0x01, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS4__CS4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS4__CS4			= IOMUX_PAD(0x264, 0x054, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS4__GPIO_3_20	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS4__GPIO_3_20			= IOMUX_PAD(0x264, 0x054, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS4__NF_CE1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS4__NF_CE1			= IOMUX_PAD(0x264, 0x054, 0x01, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS4__UART5_CTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS4__UART5_CTS			= IOMUX_PAD(0x264, 0x054, 0x13, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS5__CS5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS5__CS5			= IOMUX_PAD(0x268, 0x058, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS5__GPIO_3_21	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS5__GPIO_3_21			= IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS5__NF_CE2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS5__NF_CE2			= IOMUX_PAD(0x268, 0x058, 0x01, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CS5__UART5_RTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CS5__UART5_RTS			= IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D2__CSI_D2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D2__CSI_D2			= IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D2__CSPI3_MOSI	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D2__CSPI3_MOSI		= IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D2__GPIO_1_27	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D2__GPIO_1_27		= IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D2__UART5_RXD_MUX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D2__UART5_RXD_MUX		= IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D3__CSI_D3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D3__CSI_D3			= IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D3__CSPI3_MISO	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D3__CSPI3_MISO		= IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D3__GPIO_1_28	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D3__GPIO_1_28		= IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D4__CSI_D4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D4__CSI_D4			= IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D4__CSPI3_SCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D4__CSPI3_SCLK		= IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D4__GPIO_1_29	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D4__GPIO_1_29		= IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D4__UART5_RTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D4__UART5_RTS		= IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D5__CSI_D5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D5__CSI_D5			= IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D5__CSPI3_RDY	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D5__CSPI3_RDY		= IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D5__GPIO_1_30	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D5__GPIO_1_30		= IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D6__CSI_D6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D6__CSI_D6			= IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D6__GPIO_1_31	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D6__GPIO_1_31		= IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D7__CSI_D7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D7__CSI_D7			= IOMUX_PAD(0x32c, 0x134, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D7__GPIO_1_6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D7__GPIO_1_6		= IOMUX_PAD(0x32c, 0x134, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D8__CSI_D8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D8__CSI_D8			= IOMUX_PAD(0x330, 0x138, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D8__GPIO_1_7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D8__GPIO_1_7		= IOMUX_PAD(0x330, 0x138, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D9__CSI_D9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D9__CSI_D9			= IOMUX_PAD(0x334, 0x13c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_D9__GPIO_4_21	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_D9__GPIO_4_21		= IOMUX_PAD(0x334, 0x13c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_HSYNC__CSI_HSYNC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_HSYNC__CSI_HSYNC		= IOMUX_PAD(0x340, 0x148, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_HSYNC__GPIO_1_10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_HSYNC__GPIO_1_10		= IOMUX_PAD(0x340, 0x148, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_MCLK__CSI_MCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_MCLK__CSI_MCLK		= IOMUX_PAD(0x338, 0x140, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_MCLK__GPIO_1_8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_MCLK__GPIO_1_8		= IOMUX_PAD(0x338, 0x140, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_PIXCLK__CSI_PIXCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_PIXCLK__CSI_PIXCLK		= IOMUX_PAD(0x344, 0x14c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_PIXCLK__GPIO_1_11	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_PIXCLK__GPIO_1_11		= IOMUX_PAD(0x344, 0x14c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_VSYNC__CSI_VSYNC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_VSYNC__CSI_VSYNC		= IOMUX_PAD(0x33c, 0x144, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSI_VSYNC__GPIO_1_9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSI_VSYNC__GPIO_1_9		= IOMUX_PAD(0x33c, 0x144, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_MISO__CSPI1_MISO	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_MISO__CSPI1_MISO		= IOMUX_PAD(0x354, 0x15c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_MISO__GPIO_1_15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_MISO__GPIO_1_15		= IOMUX_PAD(0x354, 0x15c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_MOSI__CSPI1_MOSI	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_MOSI__CSPI1_MOSI		= IOMUX_PAD(0x350, 0x158, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_MOSI__GPIO_1_14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_MOSI__GPIO_1_14		= IOMUX_PAD(0x350, 0x158, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_RDY__CSPI1_RDY	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_RDY__CSPI1_RDY		= IOMUX_PAD(0x364, 0x16c, 0x10, 0, 0, PAD_CTL_PKE),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_RDY__GPIO_2_22	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_RDY__GPIO_2_22		= IOMUX_PAD(0x364, 0x16c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SCLK__CSPI1_SCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SCLK__CSPI1_SCLK		= IOMUX_PAD(0x360, 0x168, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SCLK__GPIO_1_18	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SCLK__GPIO_1_18		= IOMUX_PAD(0x360, 0x168, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SS0__CSPI1_SS0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SS0__CSPI1_SS0		= IOMUX_PAD(0x358, 0x160, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SS0__GPIO_1_16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SS0__GPIO_1_16		= IOMUX_PAD(0x358, 0x160, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SS1__CSPI1_SS1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SS1__CSPI1_SS1		= IOMUX_PAD(0x35c, 0x164, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SS1__GPIO_1_17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SS1__GPIO_1_17		= IOMUX_PAD(0x35c, 0x164, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CSPI1_SS1__I2C3_DAT	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CSPI1_SS1__I2C3_DAT		= IOMUX_PAD(0x35c, 0x164, 0x11, 0x528, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DDRTYPE	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DDRTYPE		= IOMUX_PAD(0x454, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_CSI	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_CSI		= IOMUX_PAD(0x428, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_CSPI1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_CSPI1		= IOMUX_PAD(0x450, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_DDR	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_DDR		= IOMUX_PAD(0x430, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_FEC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_FEC		= IOMUX_PAD(0x41c, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_KPP	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_KPP		= IOMUX_PAD(0x438, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_LCD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_LCD		= IOMUX_PAD(0x440, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_NFC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_NFC		= IOMUX_PAD(0x424, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_SDHC1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_SDHC1		= IOMUX_PAD(0x43c, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_UART	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_UART		= IOMUX_PAD(0x444, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DSE_WEIM	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DSE_WEIM		= IOMUX_PAD(0x42c, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_CRM	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_CRM		= IOMUX_PAD(0x434, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_CSI	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_CSI		= IOMUX_PAD(0x44c, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_JTAG	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_JTAG		= IOMUX_PAD(0x420, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_LCD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_LCD		= IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_MISC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_MISC		= IOMUX_PAD(0x418, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_NFC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_NFC		= IOMUX_PAD(0x448, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_CTL_GRP_DVS_SDHC1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_CTL_GRP_DVS_SDHC1		= IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D0__D0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D0__D0				= IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D0__GPIO_4_20	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D0__GPIO_4_20			= IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D10__D10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D10__D10			= IOMUX_PAD(0x294, 0x09c, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D10__GPIO_4_10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D10__GPIO_4_10			= IOMUX_PAD(0x294, 0x09c, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D10__USBOTG_OC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D10__USBOTG_OC			= IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D11__D11	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D11__D11			= IOMUX_PAD(0x290, 0x098, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D11__GPIO_4_9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D11__GPIO_4_9			= IOMUX_PAD(0x290, 0x098, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D12__D12	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D12__D12			= IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D12__GPIO_4_8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D12__GPIO_4_8			= IOMUX_PAD(0x28c, 0x094, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D13__D13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D13__D13			= IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D13__GPIO_4_7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D13__GPIO_4_7			= IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D13__LD18	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D13__LD18			= IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D14__D14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D14__D14			= IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D14__GPIO_4_6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D14__GPIO_4_6			= IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D14__LD17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D14__LD17			= IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D15__D15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D15__D15			= IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D15__GPIO_4_5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D15__GPIO_4_5			= IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D15__LD16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D15__LD16			= IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D1__D1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D1__D1				= IOMUX_PAD(0x2b8, 0x0c0, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D1__GPIO_4_19	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D1__GPIO_4_19			= IOMUX_PAD(0x2b8, 0x0c0, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D2__D2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D2__D2				= IOMUX_PAD(0x2b4, 0x0bc, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D2__GPIO_4_18	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D2__GPIO_4_18			= IOMUX_PAD(0x2b4, 0x0bc, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D3__D3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D3__D3				= IOMUX_PAD(0x2b0, 0x0b8, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D3__GPIO_4_17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D3__GPIO_4_17			= IOMUX_PAD(0x2b0, 0x0b8, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D4__D4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D4__D4				= IOMUX_PAD(0x2ac, 0x0b4, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D4__GPIO_4_16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D4__GPIO_4_16			= IOMUX_PAD(0x2ac, 0x0b4, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D5__D5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D5__D5				= IOMUX_PAD(0x2a8, 0x0b0, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D5__GPIO_4_15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D5__GPIO_4_15			= IOMUX_PAD(0x2a8, 0x0b0, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D6__D6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D6__D6				= IOMUX_PAD(0x2a4, 0x0ac, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D6__GPIO_4_14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D6__GPIO_4_14			= IOMUX_PAD(0x2a4, 0x0ac, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D7__D7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D7__D7				= IOMUX_PAD(0x2a0, 0x0a8, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D7__GPIO_4_13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D7__GPIO_4_13			= IOMUX_PAD(0x2a0, 0x0a8, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D8__D8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D8__D8				= IOMUX_PAD(0x29c, 0x0a4, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D8__GPIO_4_12	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D8__GPIO_4_12			= IOMUX_PAD(0x29c, 0x0a4, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D8__USBH2_OC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D8__USBH2_OC			= IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D9__D9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D9__D9				= IOMUX_PAD(0x298, 0x0a0, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D9__GPIO_4_11	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D9__GPIO_4_11			= IOMUX_PAD(0x298, 0x0a0, 0x05, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_D9__USBH2_PWR	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_D9__USBH2_PWR			= IOMUX_PAD(0x298, 0x0a0, 0x06, 0, 0, PAD_CTL_PKE),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_DE_B__DE_B	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_DE_B__DE_B			= IOMUX_PAD(0x3ec, 0x1f0, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_DE_B__GPIO_2_20	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_DE_B__GPIO_2_20		= IOMUX_PAD(0x3ec, 0x1f0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EB0__AUD4_TXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EB0__AUD4_TXD			= IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EB0__EB0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EB0__EB0			= IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EB0__GPIO_2_12	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EB0__GPIO_2_12			= IOMUX_PAD(0x258, 0x040, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EB1__AUD4_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EB1__AUD4_RXD			= IOMUX_PAD(0x25c, 0x044, 0x14, 0x460, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EB1__EB1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EB1__EB1			= IOMUX_PAD(0x25c, 0x044, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EB1__GPIO_2_13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EB1__GPIO_2_13			= IOMUX_PAD(0x25c, 0x044, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_ECB__ECB	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_ECB__ECB			= IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_ECB__GPIO_3_23	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_ECB__GPIO_3_23			= IOMUX_PAD(0x270, 0x060, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_ECB__UART5_TXD_MUX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_ECB__UART5_TXD_MUX		= IOMUX_PAD(0x270, 0x060, 0x13, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EXT_ARMCLK__EXT_ARMCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EXT_ARMCLK__EXT_ARMCLK		= IOMUX_PAD(0x000, 0x20c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_EXT_ARMCLK__GPIO_3_15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_EXT_ARMCLK__GPIO_3_15		= IOMUX_PAD(0x000, 0x20c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_MDC__AUD4_TXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_MDC__AUD4_TXD		= IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_MDC__FEC_MDC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_MDC__FEC_MDC		= IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_MDC__GPIO_3_5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_MDC__GPIO_3_5		= IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_MDIO__AUD4_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_MDIO__AUD4_RXD		= IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_MDIO__FEC_MDIO	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_MDIO__FEC_MDIO		= IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_MDIO__GPIO_3_6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_MDIO__GPIO_3_6		= IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RDATA0__FEC_RDATA0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RDATA0__FEC_RDATA0		= IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PU/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RDATA0__GPIO_3_10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RDATA0__GPIO_3_10		= IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RDATA1__FEC_RDATA1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RDATA1__FEC_RDATA1		= IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PU/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RDATA1__GPIO_3_11	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RDATA1__GPIO_3_11		= IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RX_DV__CAN2_RX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RX_DV__CAN2_RX		= IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RX_DV__FEC_RX_DV	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RX_DV__FEC_RX_DV		= IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_RX_DV__GPIO_3_12	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_RX_DV__GPIO_3_12		= IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TDATA0__FEC_TDATA0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TDATA0__FEC_TDATA0		= IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TDATA0__GPIO_3_7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TDATA0__GPIO_3_7		= IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TDATA1__AUD4_TXFS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TDATA1__AUD4_TXFS		= IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TDATA1__FEC_TDATA1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TDATA1__FEC_TDATA1		= IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TDATA1__GPIO_3_8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TDATA1__GPIO_3_8		= IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		= IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PU/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TX_CLK__GPIO_3_13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TX_CLK__GPIO_3_13		= IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TX_EN__FEC_TX_EN	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TX_EN__FEC_TX_EN		= IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_FEC_TX_EN__GPIO_3_9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_FEC_TX_EN__GPIO_3_9		= IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_A__CAN1_TX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_A__CAN1_TX		= IOMUX_PAD(0x3f0, 0x1f4, 0x16, 0, 0, PAD_CTL_PUS_22K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_A__GPIO_A	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_A__GPIO_A			= IOMUX_PAD(0x3f0, 0x1f4, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_A__USBOTG_PWR	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_A__USBOTG_PWR		= IOMUX_PAD(0x3f0, 0x1f4, 0x12, 0, 0, PAD_CTL_PKE),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_B__CAN1_RX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_B__CAN1_RX		= IOMUX_PAD(0x3f4, 0x1f8, 0x16, 0x480, 1, PAD_CTL_PUS_22K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_B__GPIO_B	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_B__GPIO_B			= IOMUX_PAD(0x3f4, 0x1f8, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_B__USBOTG_OC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_B__USBOTG_OC		= IOMUX_PAD(0x3f4, 0x1f8, 0x12, 0x57c, 1, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_C__CAN2_TX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_C__CAN2_TX		= IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_C__GPIO_C	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_C__GPIO_C			= IOMUX_PAD(0x3f8, 0x1fc, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_D__CAN2_RX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_D__CAN2_RX		= IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_D__GPIO_D	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_D__GPIO_D			= IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_E__AUD7_TXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_E__AUD7_TXD		= IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_E__GPIO_E	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_E__GPIO_E			= IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_E__I2C3_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_E__I2C3_CLK		= IOMUX_PAD(0x400, 0x204, 0x11, 0x524, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_E__LD16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_E__LD16			= IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_F__AUD7_TXC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_F__AUD7_TXC		= IOMUX_PAD(0x404, 0x208, 0x14, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_F__GPIO_F	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_F__GPIO_F			= IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_GPIO_F__LD17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_GPIO_F__LD17			= IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_HSYNC__GPIO_1_22	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_HSYNC__GPIO_1_22		= IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_HSYNC__HSYNC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_HSYNC__HSYNC			= IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_I2C1_CLK__GPIO_1_12	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_I2C1_CLK__GPIO_1_12		= IOMUX_PAD(0x348, 0x150, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_I2C1_CLK__I2C1_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_I2C1_CLK__I2C1_CLK		= IOMUX_PAD(0x348, 0x150, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_I2C1_DAT__GPIO_1_13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_I2C1_DAT__GPIO_1_13		= IOMUX_PAD(0x34c, 0x154, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_I2C1_DAT__I2C1_DAT	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_I2C1_DAT__I2C1_DAT		= IOMUX_PAD(0x34c, 0x154, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL0__AUD5_TXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL0__AUD5_TXD		= IOMUX_PAD(0x3b0, 0x1b8, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL0__GPIO_3_1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL0__GPIO_3_1		= IOMUX_PAD(0x3b0, 0x1b8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL0__KPP_COL0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL0__KPP_COL0		= IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL0__UART4_RXD_MUX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL0__UART4_RXD_MUX	= IOMUX_PAD(0x3b0, 0x1b8, 0x11, 0x570, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL1__AUD5_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL1__AUD5_RXD		= IOMUX_PAD(0x3b4, 0x1bc, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL1__GPIO_3_2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL1__GPIO_3_2		= IOMUX_PAD(0x3b4, 0x1bc, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL1__KPP_COL1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL1__KPP_COL1		= IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL1__UART4_TXD_MUX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL1__UART4_TXD_MUX	= IOMUX_PAD(0x3b4, 0x1bc, 0x11, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL2__AUD5_TXC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL2__AUD5_TXC		= IOMUX_PAD(0x3b8, 0x1c0, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL2__GPIO_3_3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL2__GPIO_3_3		= IOMUX_PAD(0x3b8, 0x1c0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL2__KPP_COL2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL2__KPP_COL2		= IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL2__UART4_RTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL2__UART4_RTS		= IOMUX_PAD(0x3b8, 0x1c0, 0x11, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL3__AUD5_TXFS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL3__AUD5_TXFS		= IOMUX_PAD(0x3bc, 0x1c4, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL3__GPIO_3_4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL3__GPIO_3_4		= IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL3__KPP_COL3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL3__KPP_COL3		= IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_COL3__UART4_CTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_COL3__UART4_CTS		= IOMUX_PAD(0x3bc, 0x1c4, 0x11, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW0__GPIO_2_29	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW0__GPIO_2_29		= IOMUX_PAD(0x3a0, 0x1a8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW0__KPP_ROW0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW0__KPP_ROW0		= IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW1__GPIO_2_30	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW1__GPIO_2_30		= IOMUX_PAD(0x3a4, 0x1ac, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW1__KPP_ROW1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW1__KPP_ROW1		= IOMUX_PAD(0x3a4, 0x1ac, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW2__CSI_D0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW2__CSI_D0		= IOMUX_PAD(0x3a8, 0x1b0, 0x13, 0x488, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW2__GPIO_2_31	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW2__GPIO_2_31		= IOMUX_PAD(0x3a8, 0x1b0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW2__KPP_ROW2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW2__KPP_ROW2		= IOMUX_PAD(0x3a8, 0x1b0, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW3__CSI_LD1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW3__CSI_LD1		= IOMUX_PAD(0x3ac, 0x1b4, 0x13, 0x48c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW3__GPIO_3_0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW3__GPIO_3_0		= IOMUX_PAD(0x3ac, 0x1b4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_KPP_ROW3__KPP_ROW3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_KPP_ROW3__KPP_ROW3		= IOMUX_PAD(0x3ac, 0x1b4, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LBA__GPIO_3_24	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LBA__GPIO_3_24			= IOMUX_PAD(0x274, 0x064, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LBA__LBA	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LBA__LBA			= IOMUX_PAD(0x274, 0x064, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LBA__UART5_RXD_MUX	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LBA__UART5_RXD_MUX		= IOMUX_PAD(0x274, 0x064, 0x13, 0x578, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD0__CSI_D0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD0__CSI_D0			= IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD0__GPIO_2_15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD0__GPIO_2_15			= IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD0__LD0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD0__LD0			= IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD10__FEC_RX_ER	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD10__FEC_RX_ER		= IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD10__LD10	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD10__LD10			= IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD11__FEC_RDATA2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD11__FEC_RDATA2		= IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD11__LD11	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD11__LD11			= IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD12__FEC_RDATA3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD12__FEC_RDATA3		= IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD12__LD12	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD12__LD12			= IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD13__FEC_TDATA2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD13__FEC_TDATA2		= IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD13__LD13	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD13__LD13			= IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD14__FEC_TDATA3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD14__FEC_TDATA3		= IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD14__LD14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD14__LD14			= IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD15__FEC_RX_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD15__FEC_RX_CLK		= IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD15__LD15	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD15__LD15			= IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD1__CSI_D1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD1__CSI_D1			= IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD1__GPIO_2_16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD1__GPIO_2_16			= IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD1__LD1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD1__LD1			= IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD2__GPIO_2_17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD2__GPIO_2_17			= IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD2__LD2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD2__LD2			= IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD3__GPIO_2_18	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD3__GPIO_2_18			= IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD3__LD3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD3__LD3			= IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD4__GPIO_2_19	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD4__GPIO_2_19			= IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD4__LD4	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD4__LD4			= IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD5__GPIO_1_19	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD5__GPIO_1_19			= IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD5__LD5	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD5__LD5			= IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD6__GPIO_1_20	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD6__GPIO_1_20			= IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD6__LD6	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD6__LD6			= IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD7__GPIO_1_21	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD7__GPIO_1_21			= IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD7__LD7	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD7__LD7			= IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD8__FEC_TX_ERR	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD8__FEC_TX_ERR		= IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD8__LD8	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD8__LD8			= IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD9__FEC_COL	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD9__FEC_COL			= IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LD9__LD9	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LD9__LD9			= IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, PAD_CTL_SRE_FAST),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LSCLK__GPIO_1_24	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LSCLK__GPIO_1_24		= IOMUX_PAD(0x308, 0x110, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_LSCLK__LSCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_LSCLK__LSCLK			= IOMUX_PAD(0x308, 0x110, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFALE__GPIO_3_28	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFALE__GPIO_3_28		= IOMUX_PAD(0x000, 0x078, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFALE__NFALE	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFALE__NFALE			= IOMUX_PAD(0x000, 0x078, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFCLE__GPIO_3_29	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFCLE__GPIO_3_29		= IOMUX_PAD(0x000, 0x07c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFCLE__NFCLE	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFCLE__NFCLE			= IOMUX_PAD(0x000, 0x07c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFRB__GPIO_3_31	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFRB__GPIO_3_31		= IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFRB__NFRB	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFRB__NFRB			= IOMUX_PAD(0x27c, 0x084, 0x10, 0, 0, PAD_CTL_PKE),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFRE_B__GPIO_3_27	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFRE_B__GPIO_3_27		= IOMUX_PAD(0x000, 0x074, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFRE_B__NFRE_B	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFRE_B__NFRE_B			= IOMUX_PAD(0x000, 0x074, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFWE_B__GPIO_3_26	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFWE_B__GPIO_3_26		= IOMUX_PAD(0x000, 0x070, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFWE_B__NFWE_B	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFWE_B__NFWE_B			= IOMUX_PAD(0x000, 0x070, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFWP_B__GPIO_3_30	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFWP_B__GPIO_3_30		= IOMUX_PAD(0x000, 0x080, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NFWP_B__NFWP_B	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NFWP_B__NFWP_B			= IOMUX_PAD(0x000, 0x080, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NF_CE0__GPIO_3_22	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NF_CE0__GPIO_3_22		= IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_NF_CE0__NF_CE0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_NF_CE0__NF_CE0			= IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_OE_ACD__GPIO_1_25	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_OE_ACD__GPIO_1_25		= IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_OE_ACD__OE_ACD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_OE_ACD__OE_ACD			= IOMUX_PAD(0x30c, 0x114, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_OE__AUD4_TXC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_OE__AUD4_TXC			= IOMUX_PAD(0x260, 0x048, 0x14, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_OE__GPIO_2_14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_OE__GPIO_2_14			= IOMUX_PAD(0x260, 0x048, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_OE__OE	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_OE__OE				= IOMUX_PAD(0x260, 0x048, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_POWER_FAIL__AUD7_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_POWER_FAIL__AUD7_RXD		= IOMUX_PAD(0x410, 0x21c, 0x14, 0x478, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_POWER_FAIL__GPIO_3_19	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_POWER_FAIL__GPIO_3_19		= IOMUX_PAD(0x410, 0x21c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_POWER_FAIL__POWER_FAIL	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_POWER_FAIL__POWER_FAIL		= IOMUX_PAD(0x410, 0x21c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_PWM__GPIO_1_26	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_PWM__GPIO_1_26			= IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_PWM__PWM	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_PWM__PWM			= IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_PWM__USBH2_OC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_PWM__USBH2_OC			= IOMUX_PAD(0x314, 0x11c, 0x16, 0x580, 1, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_RTCK__GPIO_3_14	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_RTCK__GPIO_3_14		= IOMUX_PAD(0x3e4, 0x1ec, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_RTCK__OWIRE	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_RTCK__OWIRE			= IOMUX_PAD(0x3e4, 0x1ec, 0x11, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_RTCK__RTCK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_RTCK__RTCK			= IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_RW__AUD4_TXFS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_RW__AUD4_TXFS			= IOMUX_PAD(0x278, 0x06c, 0x14, 0x474, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_RW__GPIO_3_25	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_RW__GPIO_3_25			= IOMUX_PAD(0x278, 0x06c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_RW__RW	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_RW__RW				= IOMUX_PAD(0x278, 0x06c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_CLK__FEC_RDATA3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_CLK__FEC_RDATA3		= IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_CLK__GPIO_2_24	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_CLK__GPIO_2_24		= IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_CLK__SD1_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_CLK__SD1_CLK		= IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_CMD__FEC_RDATA2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_CMD__FEC_RDATA2		= IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_CMD__GPIO_2_23	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_CMD__GPIO_2_23		= IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_CMD__SD1_CMD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_CMD__SD1_CMD		= IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA0__GPIO_2_25	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA0__GPIO_2_25		= IOMUX_PAD(0x390, 0x198, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA0__SD1_DATA0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA0__SD1_DATA0		= IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA1__AUD7_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA1__AUD7_RXD		= IOMUX_PAD(0x394, 0x19c, 0x13, 0x478, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA1__GPIO_2_26	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA1__GPIO_2_26		= IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA1__SD1_DATA1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA1__SD1_DATA1		= IOMUX_PAD(0x394, 0x19c, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA2__FEC_RX_CLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA2__FEC_RX_CLK		= IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA2__GPIO_2_27	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA2__GPIO_2_27		= IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA2__SD1_DATA2	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA2__SD1_DATA2		= IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA3__FEC_CRS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA3__FEC_CRS		= IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA3__GPIO_2_28	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA3__GPIO_2_28		= IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_SD1_DATA3__SD1_DATA3	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_SD1_DATA3__SD1_DATA3		= IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_TDO__TDO	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_TDO__TDO			= IOMUX_PAD(0x3e8, 0x000, 0x00, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_CTS__CSI_D1	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_CTS__CSI_D1		= IOMUX_PAD(0x374, 0x17c, 0x11, 0x48c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_CTS__GPIO_4_25	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_CTS__GPIO_4_25		= IOMUX_PAD(0x374, 0x17c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_CTS__UART1_CTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_CTS__UART1_CTS		= IOMUX_PAD(0x374, 0x17c, 0x10, 0, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_RTS__CSI_D0	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_RTS__CSI_D0		= IOMUX_PAD(0x370, 0x178, 0x11, 0x488, 1, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_RTS__GPIO_4_24	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_RTS__GPIO_4_24		= IOMUX_PAD(0x370, 0x178, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_RTS__UART1_RTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_RTS__UART1_RTS		= IOMUX_PAD(0x370, 0x178, 0x10, 0, 0, PAD_CTL_PUS_100K_UP),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_RXD__GPIO_4_22	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_RXD__GPIO_4_22		= IOMUX_PAD(0x368, 0x170, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_RXD__UART1_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_RXD__UART1_RXD		= IOMUX_PAD(0x368, 0x170, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_TXD__GPIO_4_23	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_TXD__GPIO_4_23		= IOMUX_PAD(0x36c, 0x174, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART1_TXD__UART1_TXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART1_TXD__UART1_TXD		= IOMUX_PAD(0x36c, 0x174, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_CTS__FEC_RX_ER	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_CTS__FEC_RX_ER		= IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_CTS__GPIO_4_29	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_CTS__GPIO_4_29		= IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_CTS__UART2_CTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_CTS__UART2_CTS		= IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_RTS__FEC_COL	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_RTS__FEC_COL		= IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_RTS__GPIO_4_28	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_RTS__GPIO_4_28		= IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_RTS__UART2_RTS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_RTS__UART2_RTS		= IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_RXD__GPIO_4_26	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_RXD__GPIO_4_26		= IOMUX_PAD(0x378, 0x180, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_RXD__UART2_RXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_RXD__UART2_RXD		= IOMUX_PAD(0x378, 0x180, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_TXD__GPIO_4_27	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_TXD__GPIO_4_27		= IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UART2_TXD__UART2_TXD	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UART2_TXD__UART2_TXD		= IOMUX_PAD(0x37c, 0x184, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UPLL_BYPCLK__GPIO_3_16	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UPLL_BYPCLK__GPIO_3_16		= IOMUX_PAD(0x000, 0x210, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK	= IOMUX_PAD(0x000, 0x210, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSTBY_ACK__GPIO_3_18	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSTBY_ACK__GPIO_3_18		= IOMUX_PAD(0x40c, 0x218, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSTBY_ACK__VSTBY_ACK	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSTBY_ACK__VSTBY_ACK		= IOMUX_PAD(0x40c, 0x218, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSTBY_REQ__AUD7_TXFS	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSTBY_REQ__AUD7_TXFS		= IOMUX_PAD(0x408, 0x214, 0x14, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSTBY_REQ__GPIO_3_17	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSTBY_REQ__GPIO_3_17		= IOMUX_PAD(0x408, 0x214, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSTBY_REQ__VSTBY_REQ	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSTBY_REQ__VSTBY_REQ		= IOMUX_PAD(0x408, 0x214, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSYNC__GPIO_1_23	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSYNC__GPIO_1_23		= IOMUX_PAD(0x304, 0x10c, 0x15, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX25_PAD_VSYNC__VSYNC	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^	MX25_PAD_VSYNC__VSYNC			= IOMUX_PAD(0x304, 0x10c, 0x10, 0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon87c3c74b0103
MX28_PAD_AUART0_CTS__AUART0_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_CTS__AUART0_CTS	/;"	d
MX28_PAD_AUART0_CTS__AUART4_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_CTS__AUART4_RX	/;"	d
MX28_PAD_AUART0_CTS__DUART_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_CTS__DUART_RX	/;"	d
MX28_PAD_AUART0_CTS__GPIO_3_2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_CTS__GPIO_3_2	/;"	d
MX28_PAD_AUART0_RTS__AUART0_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RTS__AUART0_RTS	/;"	d
MX28_PAD_AUART0_RTS__AUART4_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RTS__AUART4_TX	/;"	d
MX28_PAD_AUART0_RTS__DUART_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RTS__DUART_TX	/;"	d
MX28_PAD_AUART0_RTS__GPIO_3_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RTS__GPIO_3_3	/;"	d
MX28_PAD_AUART0_RX__AUART0_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RX__AUART0_RX	/;"	d
MX28_PAD_AUART0_RX__DUART_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RX__DUART_CTS	/;"	d
MX28_PAD_AUART0_RX__GPIO_3_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RX__GPIO_3_0	/;"	d
MX28_PAD_AUART0_RX__I2C0_SCL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_RX__I2C0_SCL	/;"	d
MX28_PAD_AUART0_TX__AUART0_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_TX__AUART0_TX	/;"	d
MX28_PAD_AUART0_TX__DUART_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_TX__DUART_RTS	/;"	d
MX28_PAD_AUART0_TX__GPIO_3_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_TX__GPIO_3_1	/;"	d
MX28_PAD_AUART0_TX__I2C0_SDA	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART0_TX__I2C0_SDA	/;"	d
MX28_PAD_AUART1_CTS__AUART1_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_CTS__AUART1_CTS	/;"	d
MX28_PAD_AUART1_CTS__GPIO_3_6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_CTS__GPIO_3_6	/;"	d
MX28_PAD_AUART1_CTS__TIMROT_ROTARYA	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_CTS__TIMROT_ROTARYA	/;"	d
MX28_PAD_AUART1_CTS__USB0_OVERCURRENT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_CTS__USB0_OVERCURRENT	/;"	d
MX28_PAD_AUART1_RTS__AUART1_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RTS__AUART1_RTS	/;"	d
MX28_PAD_AUART1_RTS__GPIO_3_7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RTS__GPIO_3_7	/;"	d
MX28_PAD_AUART1_RTS__TIMROT_ROTARYB	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RTS__TIMROT_ROTARYB	/;"	d
MX28_PAD_AUART1_RTS__USB0_ID	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RTS__USB0_ID	/;"	d
MX28_PAD_AUART1_RX__AUART1_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RX__AUART1_RX	/;"	d
MX28_PAD_AUART1_RX__GPIO_3_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RX__GPIO_3_4	/;"	d
MX28_PAD_AUART1_RX__PWM_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RX__PWM_0	/;"	d
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_RX__SSP2_CARD_DETECT	/;"	d
MX28_PAD_AUART1_TX__AUART1_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_TX__AUART1_TX	/;"	d
MX28_PAD_AUART1_TX__GPIO_3_5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_TX__GPIO_3_5	/;"	d
MX28_PAD_AUART1_TX__PWM_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_TX__PWM_1	/;"	d
MX28_PAD_AUART1_TX__SSP3_CARD_DETECT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART1_TX__SSP3_CARD_DETECT	/;"	d
MX28_PAD_AUART2_CTS__AUART2_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_CTS__AUART2_CTS	/;"	d
MX28_PAD_AUART2_CTS__GPIO_3_10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_CTS__GPIO_3_10	/;"	d
MX28_PAD_AUART2_CTS__I2C1_SCL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_CTS__I2C1_SCL	/;"	d
MX28_PAD_AUART2_CTS__SAIF1_BITCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_CTS__SAIF1_BITCLK	/;"	d
MX28_PAD_AUART2_RTS__AUART2_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RTS__AUART2_RTS	/;"	d
MX28_PAD_AUART2_RTS__GPIO_3_11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RTS__GPIO_3_11	/;"	d
MX28_PAD_AUART2_RTS__I2C1_SDA	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RTS__I2C1_SDA	/;"	d
MX28_PAD_AUART2_RTS__SAIF1_LRCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RTS__SAIF1_LRCLK	/;"	d
MX28_PAD_AUART2_RX__AUART2_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RX__AUART2_RX	/;"	d
MX28_PAD_AUART2_RX__GPIO_3_8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RX__GPIO_3_8	/;"	d
MX28_PAD_AUART2_RX__SSP3_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RX__SSP3_D1	/;"	d
MX28_PAD_AUART2_RX__SSP3_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_RX__SSP3_D4	/;"	d
MX28_PAD_AUART2_TX__AUART2_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_TX__AUART2_TX	/;"	d
MX28_PAD_AUART2_TX__GPIO_3_9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_TX__GPIO_3_9	/;"	d
MX28_PAD_AUART2_TX__SSP3_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_TX__SSP3_D2	/;"	d
MX28_PAD_AUART2_TX__SSP3_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART2_TX__SSP3_D5	/;"	d
MX28_PAD_AUART3_CTS__AUART3_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_CTS__AUART3_CTS	/;"	d
MX28_PAD_AUART3_CTS__CAN1_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_CTS__CAN1_TX	/;"	d
MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT	/;"	d
MX28_PAD_AUART3_CTS__GPIO_3_14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_CTS__GPIO_3_14	/;"	d
MX28_PAD_AUART3_RTS__AUART3_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RTS__AUART3_RTS	/;"	d
MX28_PAD_AUART3_RTS__CAN1_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RTS__CAN1_RX	/;"	d
MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN	/;"	d
MX28_PAD_AUART3_RTS__GPIO_3_15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RTS__GPIO_3_15	/;"	d
MX28_PAD_AUART3_RX__AUART3_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RX__AUART3_RX	/;"	d
MX28_PAD_AUART3_RX__CAN0_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RX__CAN0_TX	/;"	d
MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT	/;"	d
MX28_PAD_AUART3_RX__GPIO_3_12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_RX__GPIO_3_12	/;"	d
MX28_PAD_AUART3_TX__AUART3_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_TX__AUART3_TX	/;"	d
MX28_PAD_AUART3_TX__CAN0_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_TX__CAN0_RX	/;"	d
MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN	/;"	d
MX28_PAD_AUART3_TX__GPIO_3_13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_AUART3_TX__GPIO_3_13	/;"	d
MX28_PAD_EMI_A00__EMI_ADDR0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A00__EMI_ADDR0	/;"	d
MX28_PAD_EMI_A01__EMI_ADDR1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A01__EMI_ADDR1	/;"	d
MX28_PAD_EMI_A02__EMI_ADDR2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A02__EMI_ADDR2	/;"	d
MX28_PAD_EMI_A03__EMI_ADDR3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A03__EMI_ADDR3	/;"	d
MX28_PAD_EMI_A04__EMI_ADDR4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A04__EMI_ADDR4	/;"	d
MX28_PAD_EMI_A05__EMI_ADDR5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A05__EMI_ADDR5	/;"	d
MX28_PAD_EMI_A06__EMI_ADDR6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A06__EMI_ADDR6	/;"	d
MX28_PAD_EMI_A07__EMI_ADDR7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A07__EMI_ADDR7	/;"	d
MX28_PAD_EMI_A08__EMI_ADDR8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A08__EMI_ADDR8	/;"	d
MX28_PAD_EMI_A09__EMI_ADDR9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A09__EMI_ADDR9	/;"	d
MX28_PAD_EMI_A10__EMI_ADDR10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A10__EMI_ADDR10	/;"	d
MX28_PAD_EMI_A11__EMI_ADDR11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A11__EMI_ADDR11	/;"	d
MX28_PAD_EMI_A12__EMI_ADDR12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A12__EMI_ADDR12	/;"	d
MX28_PAD_EMI_A13__EMI_ADDR13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A13__EMI_ADDR13	/;"	d
MX28_PAD_EMI_A14__EMI_ADDR14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_A14__EMI_ADDR14	/;"	d
MX28_PAD_EMI_BA0__EMI_BA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_BA0__EMI_BA0	/;"	d
MX28_PAD_EMI_BA1__EMI_BA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_BA1__EMI_BA1	/;"	d
MX28_PAD_EMI_BA2__EMI_BA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_BA2__EMI_BA2	/;"	d
MX28_PAD_EMI_CASN__EMI_CASN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_CASN__EMI_CASN	/;"	d
MX28_PAD_EMI_CE0N__EMI_CE0N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_CE0N__EMI_CE0N	/;"	d
MX28_PAD_EMI_CE1N__EMI_CE1N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_CE1N__EMI_CE1N	/;"	d
MX28_PAD_EMI_CKE__EMI_CKE	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_CKE__EMI_CKE	/;"	d
MX28_PAD_EMI_CLK__EMI_CLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_CLK__EMI_CLK	/;"	d
MX28_PAD_EMI_D00__EMI_DATA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D00__EMI_DATA0	/;"	d
MX28_PAD_EMI_D01__EMI_DATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D01__EMI_DATA1	/;"	d
MX28_PAD_EMI_D02__EMI_DATA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D02__EMI_DATA2	/;"	d
MX28_PAD_EMI_D03__EMI_DATA3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D03__EMI_DATA3	/;"	d
MX28_PAD_EMI_D04__EMI_DATA4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D04__EMI_DATA4	/;"	d
MX28_PAD_EMI_D05__EMI_DATA5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D05__EMI_DATA5	/;"	d
MX28_PAD_EMI_D06__EMI_DATA6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D06__EMI_DATA6	/;"	d
MX28_PAD_EMI_D07__EMI_DATA7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D07__EMI_DATA7	/;"	d
MX28_PAD_EMI_D08__EMI_DATA8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D08__EMI_DATA8	/;"	d
MX28_PAD_EMI_D09__EMI_DATA9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D09__EMI_DATA9	/;"	d
MX28_PAD_EMI_D10__EMI_DATA10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D10__EMI_DATA10	/;"	d
MX28_PAD_EMI_D11__EMI_DATA11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D11__EMI_DATA11	/;"	d
MX28_PAD_EMI_D12__EMI_DATA12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D12__EMI_DATA12	/;"	d
MX28_PAD_EMI_D13__EMI_DATA13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D13__EMI_DATA13	/;"	d
MX28_PAD_EMI_D14__EMI_DATA14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D14__EMI_DATA14	/;"	d
MX28_PAD_EMI_D15__EMI_DATA15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_D15__EMI_DATA15	/;"	d
MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK	/;"	d
MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN	/;"	d
MX28_PAD_EMI_DQM0__EMI_DQM0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_DQM0__EMI_DQM0	/;"	d
MX28_PAD_EMI_DQM1__EMI_DQM1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_DQM1__EMI_DQM1	/;"	d
MX28_PAD_EMI_DQS0__EMI_DQS0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_DQS0__EMI_DQS0	/;"	d
MX28_PAD_EMI_DQS1__EMI_DQS1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_DQS1__EMI_DQS1	/;"	d
MX28_PAD_EMI_ODT0__EMI_ODT0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_ODT0__EMI_ODT0	/;"	d
MX28_PAD_EMI_ODT1__EMI_ODT1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_ODT1__EMI_ODT1	/;"	d
MX28_PAD_EMI_RASN__EMI_RASN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_RASN__EMI_RASN	/;"	d
MX28_PAD_EMI_WEN__EMI_WEN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_EMI_WEN__EMI_WEN	/;"	d
MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT	/;"	d
MX28_PAD_ENET0_COL__ENET0_COL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_COL__ENET0_COL	/;"	d
MX28_PAD_ENET0_COL__ENET1_TX_EN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_COL__ENET1_TX_EN	/;"	d
MX28_PAD_ENET0_COL__GPIO_4_14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_COL__GPIO_4_14	/;"	d
MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN	/;"	d
MX28_PAD_ENET0_CRS__ENET0_CRS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_CRS__ENET0_CRS	/;"	d
MX28_PAD_ENET0_CRS__ENET1_RX_EN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_CRS__ENET1_RX_EN	/;"	d
MX28_PAD_ENET0_CRS__GPIO_4_15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_CRS__GPIO_4_15	/;"	d
MX28_PAD_ENET0_MDC__ENET0_MDC	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDC__ENET0_MDC	/;"	d
MX28_PAD_ENET0_MDC__GPIO_4_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDC__GPIO_4_0	/;"	d
MX28_PAD_ENET0_MDC__GPMI_CE4N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDC__GPMI_CE4N	/;"	d
MX28_PAD_ENET0_MDC__SAIF0_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDC__SAIF0_SDATA1	/;"	d
MX28_PAD_ENET0_MDIO__ENET0_MDIO	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDIO__ENET0_MDIO	/;"	d
MX28_PAD_ENET0_MDIO__GPIO_4_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDIO__GPIO_4_1	/;"	d
MX28_PAD_ENET0_MDIO__GPMI_CE5N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDIO__GPMI_CE5N	/;"	d
MX28_PAD_ENET0_MDIO__SAIF0_SDATA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_MDIO__SAIF0_SDATA2	/;"	d
MX28_PAD_ENET0_RXD0__ENET0_RXD0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD0__ENET0_RXD0	/;"	d
MX28_PAD_ENET0_RXD0__GPIO_4_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD0__GPIO_4_3	/;"	d
MX28_PAD_ENET0_RXD0__GPMI_CE7N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD0__GPMI_CE7N	/;"	d
MX28_PAD_ENET0_RXD0__SAIF1_SDATA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD0__SAIF1_SDATA2	/;"	d
MX28_PAD_ENET0_RXD1__ENET0_RXD1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD1__ENET0_RXD1	/;"	d
MX28_PAD_ENET0_RXD1__GPIO_4_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD1__GPIO_4_4	/;"	d
MX28_PAD_ENET0_RXD1__GPMI_READY4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD1__GPMI_READY4	/;"	d
MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT	/;"	d
MX28_PAD_ENET0_RXD2__ENET0_RXD2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD2__ENET0_RXD2	/;"	d
MX28_PAD_ENET0_RXD2__ENET1_RXD0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD2__ENET1_RXD0	/;"	d
MX28_PAD_ENET0_RXD2__GPIO_4_9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD2__GPIO_4_9	/;"	d
MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN	/;"	d
MX28_PAD_ENET0_RXD3__ENET0_RXD3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD3__ENET0_RXD3	/;"	d
MX28_PAD_ENET0_RXD3__ENET1_RXD1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD3__ENET1_RXD1	/;"	d
MX28_PAD_ENET0_RXD3__GPIO_4_10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RXD3__GPIO_4_10	/;"	d
MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN	/;"	d
MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK	/;"	d
MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER	/;"	d
MX28_PAD_ENET0_RX_CLK__GPIO_4_13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_CLK__GPIO_4_13	/;"	d
MX28_PAD_ENET0_RX_EN__ENET0_RX_EN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_EN__ENET0_RX_EN	/;"	d
MX28_PAD_ENET0_RX_EN__GPIO_4_2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_EN__GPIO_4_2	/;"	d
MX28_PAD_ENET0_RX_EN__GPMI_CE6N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_EN__GPMI_CE6N	/;"	d
MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1	/;"	d
MX28_PAD_ENET0_TXD0__ENET0_TXD0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD0__ENET0_TXD0	/;"	d
MX28_PAD_ENET0_TXD0__GPIO_4_7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD0__GPIO_4_7	/;"	d
MX28_PAD_ENET0_TXD0__GPMI_READY6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD0__GPMI_READY6	/;"	d
MX28_PAD_ENET0_TXD1__ENET0_TXD1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD1__ENET0_TXD1	/;"	d
MX28_PAD_ENET0_TXD1__GPIO_4_8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD1__GPIO_4_8	/;"	d
MX28_PAD_ENET0_TXD1__GPMI_READY7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD1__GPMI_READY7	/;"	d
MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT	/;"	d
MX28_PAD_ENET0_TXD2__ENET0_TXD2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD2__ENET0_TXD2	/;"	d
MX28_PAD_ENET0_TXD2__ENET1_TXD0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD2__ENET1_TXD0	/;"	d
MX28_PAD_ENET0_TXD2__GPIO_4_11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD2__GPIO_4_11	/;"	d
MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN	/;"	d
MX28_PAD_ENET0_TXD3__ENET0_TXD3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD3__ENET0_TXD3	/;"	d
MX28_PAD_ENET0_TXD3__ENET1_TXD1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD3__ENET1_TXD1	/;"	d
MX28_PAD_ENET0_TXD3__GPIO_4_12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TXD3__GPIO_4_12	/;"	d
MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT	/;"	d
MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK	/;"	d
MX28_PAD_ENET0_TX_CLK__GPIO_4_5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_CLK__GPIO_4_5	/;"	d
MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER	/;"	d
MX28_PAD_ENET0_TX_EN__ENET0_TX_EN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_EN__ENET0_TX_EN	/;"	d
MX28_PAD_ENET0_TX_EN__GPIO_4_6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_EN__GPIO_4_6	/;"	d
MX28_PAD_ENET0_TX_EN__GPMI_READY5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET0_TX_EN__GPMI_READY5	/;"	d
MX28_PAD_ENET_CLK__CLKCTRL_ENET	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET_CLK__CLKCTRL_ENET	/;"	d
MX28_PAD_ENET_CLK__GPIO_4_16	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_ENET_CLK__GPIO_4_16	/;"	d
MX28_PAD_GPMI_ALE__GPIO_0_26	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_ALE__GPIO_0_26	/;"	d
MX28_PAD_GPMI_ALE__GPMI_ALE	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_ALE__GPMI_ALE	/;"	d
MX28_PAD_GPMI_ALE__SSP3_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_ALE__SSP3_D1	/;"	d
MX28_PAD_GPMI_ALE__SSP3_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_ALE__SSP3_D4	/;"	d
MX28_PAD_GPMI_CE0N__GPIO_0_16	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE0N__GPIO_0_16	/;"	d
MX28_PAD_GPMI_CE0N__GPMI_CE0N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE0N__GPMI_CE0N	/;"	d
MX28_PAD_GPMI_CE0N__SSP3_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE0N__SSP3_D0	/;"	d
MX28_PAD_GPMI_CE1N__GPIO_0_17	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE1N__GPIO_0_17	/;"	d
MX28_PAD_GPMI_CE1N__GPMI_CE1N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE1N__GPMI_CE1N	/;"	d
MX28_PAD_GPMI_CE1N__SSP3_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE1N__SSP3_D3	/;"	d
MX28_PAD_GPMI_CE2N__CAN1_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE2N__CAN1_TX	/;"	d
MX28_PAD_GPMI_CE2N__ENET0_RX_ER	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE2N__ENET0_RX_ER	/;"	d
MX28_PAD_GPMI_CE2N__GPIO_0_18	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE2N__GPIO_0_18	/;"	d
MX28_PAD_GPMI_CE2N__GPMI_CE2N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE2N__GPMI_CE2N	/;"	d
MX28_PAD_GPMI_CE3N__CAN1_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE3N__CAN1_RX	/;"	d
MX28_PAD_GPMI_CE3N__GPIO_0_19	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE3N__GPIO_0_19	/;"	d
MX28_PAD_GPMI_CE3N__GPMI_CE3N	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE3N__GPMI_CE3N	/;"	d
MX28_PAD_GPMI_CE3N__SAIF1_MCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CE3N__SAIF1_MCLK	/;"	d
MX28_PAD_GPMI_CLE__GPIO_0_27	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CLE__GPIO_0_27	/;"	d
MX28_PAD_GPMI_CLE__GPMI_CLE	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CLE__GPMI_CLE	/;"	d
MX28_PAD_GPMI_CLE__SSP3_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CLE__SSP3_D2	/;"	d
MX28_PAD_GPMI_CLE__SSP3_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_CLE__SSP3_D5	/;"	d
MX28_PAD_GPMI_D00__GPIO_0_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D00__GPIO_0_0	/;"	d
MX28_PAD_GPMI_D00__GPMI_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D00__GPMI_D0	/;"	d
MX28_PAD_GPMI_D00__SSP1_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D00__SSP1_D0	/;"	d
MX28_PAD_GPMI_D01__GPIO_0_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D01__GPIO_0_1	/;"	d
MX28_PAD_GPMI_D01__GPMI_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D01__GPMI_D1	/;"	d
MX28_PAD_GPMI_D01__SSP1_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D01__SSP1_D1	/;"	d
MX28_PAD_GPMI_D02__GPIO_0_2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D02__GPIO_0_2	/;"	d
MX28_PAD_GPMI_D02__GPMI_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D02__GPMI_D2	/;"	d
MX28_PAD_GPMI_D02__SSP1_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D02__SSP1_D2	/;"	d
MX28_PAD_GPMI_D03__GPIO_0_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D03__GPIO_0_3	/;"	d
MX28_PAD_GPMI_D03__GPMI_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D03__GPMI_D3	/;"	d
MX28_PAD_GPMI_D03__SSP1_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D03__SSP1_D3	/;"	d
MX28_PAD_GPMI_D04__GPIO_0_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D04__GPIO_0_4	/;"	d
MX28_PAD_GPMI_D04__GPMI_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D04__GPMI_D4	/;"	d
MX28_PAD_GPMI_D04__SSP1_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D04__SSP1_D4	/;"	d
MX28_PAD_GPMI_D05__GPIO_0_5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D05__GPIO_0_5	/;"	d
MX28_PAD_GPMI_D05__GPMI_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D05__GPMI_D5	/;"	d
MX28_PAD_GPMI_D05__SSP1_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D05__SSP1_D5	/;"	d
MX28_PAD_GPMI_D06__GPIO_0_6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D06__GPIO_0_6	/;"	d
MX28_PAD_GPMI_D06__GPMI_D6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D06__GPMI_D6	/;"	d
MX28_PAD_GPMI_D06__SSP1_D6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D06__SSP1_D6	/;"	d
MX28_PAD_GPMI_D07__GPIO_0_7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D07__GPIO_0_7	/;"	d
MX28_PAD_GPMI_D07__GPMI_D7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D07__GPMI_D7	/;"	d
MX28_PAD_GPMI_D07__SSP1_D7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_D07__SSP1_D7	/;"	d
MX28_PAD_GPMI_RDN__GPIO_0_24	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDN__GPIO_0_24	/;"	d
MX28_PAD_GPMI_RDN__GPMI_RDN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDN__GPMI_RDN	/;"	d
MX28_PAD_GPMI_RDN__SSP3_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDN__SSP3_SCK	/;"	d
MX28_PAD_GPMI_RDY0__GPIO_0_20	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY0__GPIO_0_20	/;"	d
MX28_PAD_GPMI_RDY0__GPMI_READY0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY0__GPMI_READY0	/;"	d
MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT	/;"	d
MX28_PAD_GPMI_RDY0__USB0_ID	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY0__USB0_ID	/;"	d
MX28_PAD_GPMI_RDY1__GPIO_0_21	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY1__GPIO_0_21	/;"	d
MX28_PAD_GPMI_RDY1__GPMI_READY1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY1__GPMI_READY1	/;"	d
MX28_PAD_GPMI_RDY1__SSP1_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY1__SSP1_CMD	/;"	d
MX28_PAD_GPMI_RDY2__CAN0_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY2__CAN0_TX	/;"	d
MX28_PAD_GPMI_RDY2__ENET0_TX_ER	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY2__ENET0_TX_ER	/;"	d
MX28_PAD_GPMI_RDY2__GPIO_0_22	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY2__GPIO_0_22	/;"	d
MX28_PAD_GPMI_RDY2__GPMI_READY2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY2__GPMI_READY2	/;"	d
MX28_PAD_GPMI_RDY3__CAN0_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY3__CAN0_RX	/;"	d
MX28_PAD_GPMI_RDY3__GPIO_0_23	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY3__GPIO_0_23	/;"	d
MX28_PAD_GPMI_RDY3__GPMI_READY3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY3__GPMI_READY3	/;"	d
MX28_PAD_GPMI_RDY3__HSADC_TRIGGER	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RDY3__HSADC_TRIGGER	/;"	d
MX28_PAD_GPMI_RESETN__GPIO_0_28	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RESETN__GPIO_0_28	/;"	d
MX28_PAD_GPMI_RESETN__GPMI_RESETN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RESETN__GPMI_RESETN	/;"	d
MX28_PAD_GPMI_RESETN__SSP3_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_RESETN__SSP3_CMD	/;"	d
MX28_PAD_GPMI_WRN__GPIO_0_25	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_WRN__GPIO_0_25	/;"	d
MX28_PAD_GPMI_WRN__GPMI_WRN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_WRN__GPMI_WRN	/;"	d
MX28_PAD_GPMI_WRN__SSP1_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_GPMI_WRN__SSP1_SCK	/;"	d
MX28_PAD_I2C0_SCL__DUART_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SCL__DUART_RX	/;"	d
MX28_PAD_I2C0_SCL__GPIO_3_24	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SCL__GPIO_3_24	/;"	d
MX28_PAD_I2C0_SCL__I2C0_SCL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SCL__I2C0_SCL	/;"	d
MX28_PAD_I2C0_SCL__TIMROT_ROTARYA	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SCL__TIMROT_ROTARYA	/;"	d
MX28_PAD_I2C0_SDA__DUART_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SDA__DUART_TX	/;"	d
MX28_PAD_I2C0_SDA__GPIO_3_25	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SDA__GPIO_3_25	/;"	d
MX28_PAD_I2C0_SDA__I2C0_SDA	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SDA__I2C0_SDA	/;"	d
MX28_PAD_I2C0_SDA__TIMROT_ROTARYB	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_I2C0_SDA__TIMROT_ROTARYB	/;"	d
MX28_PAD_JTAG_RTCK__GPIO_4_20	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_JTAG_RTCK__GPIO_4_20	/;"	d
MX28_PAD_JTAG_RTCK__JTAG_RTCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_JTAG_RTCK__JTAG_RTCK	/;"	d
MX28_PAD_LCD_CS__GPIO_1_27	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_CS__GPIO_1_27	/;"	d
MX28_PAD_LCD_CS__LCD_CS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_CS__LCD_CS	/;"	d
MX28_PAD_LCD_CS__LCD_ENABLE	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_CS__LCD_ENABLE	/;"	d
MX28_PAD_LCD_D00__ETM_DA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D00__ETM_DA0	/;"	d
MX28_PAD_LCD_D00__GPIO_1_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D00__GPIO_1_0	/;"	d
MX28_PAD_LCD_D00__LCD_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D00__LCD_D0	/;"	d
MX28_PAD_LCD_D01__ETM_DA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D01__ETM_DA1	/;"	d
MX28_PAD_LCD_D01__GPIO_1_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D01__GPIO_1_1	/;"	d
MX28_PAD_LCD_D01__LCD_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D01__LCD_D1	/;"	d
MX28_PAD_LCD_D02__ETM_DA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D02__ETM_DA2	/;"	d
MX28_PAD_LCD_D02__GPIO_1_2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D02__GPIO_1_2	/;"	d
MX28_PAD_LCD_D02__LCD_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D02__LCD_D2	/;"	d
MX28_PAD_LCD_D03__ETM_DA3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D03__ETM_DA3	/;"	d
MX28_PAD_LCD_D03__ETM_DA8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D03__ETM_DA8	/;"	d
MX28_PAD_LCD_D03__GPIO_1_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D03__GPIO_1_3	/;"	d
MX28_PAD_LCD_D03__LCD_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D03__LCD_D3	/;"	d
MX28_PAD_LCD_D04__ETM_DA4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D04__ETM_DA4	/;"	d
MX28_PAD_LCD_D04__ETM_DA9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D04__ETM_DA9	/;"	d
MX28_PAD_LCD_D04__GPIO_1_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D04__GPIO_1_4	/;"	d
MX28_PAD_LCD_D04__LCD_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D04__LCD_D4	/;"	d
MX28_PAD_LCD_D05__ETM_DA5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D05__ETM_DA5	/;"	d
MX28_PAD_LCD_D05__GPIO_1_5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D05__GPIO_1_5	/;"	d
MX28_PAD_LCD_D05__LCD_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D05__LCD_D5	/;"	d
MX28_PAD_LCD_D06__ETM_DA6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D06__ETM_DA6	/;"	d
MX28_PAD_LCD_D06__GPIO_1_6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D06__GPIO_1_6	/;"	d
MX28_PAD_LCD_D06__LCD_D6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D06__LCD_D6	/;"	d
MX28_PAD_LCD_D07__ETM_DA7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D07__ETM_DA7	/;"	d
MX28_PAD_LCD_D07__GPIO_1_7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D07__GPIO_1_7	/;"	d
MX28_PAD_LCD_D07__LCD_D7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D07__LCD_D7	/;"	d
MX28_PAD_LCD_D08__ETM_DA3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D08__ETM_DA3	/;"	d
MX28_PAD_LCD_D08__ETM_DA8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D08__ETM_DA8	/;"	d
MX28_PAD_LCD_D08__GPIO_1_8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D08__GPIO_1_8	/;"	d
MX28_PAD_LCD_D08__LCD_D8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D08__LCD_D8	/;"	d
MX28_PAD_LCD_D09__ETM_DA4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D09__ETM_DA4	/;"	d
MX28_PAD_LCD_D09__ETM_DA9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D09__ETM_DA9	/;"	d
MX28_PAD_LCD_D09__GPIO_1_9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D09__GPIO_1_9	/;"	d
MX28_PAD_LCD_D09__LCD_D9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D09__LCD_D9	/;"	d
MX28_PAD_LCD_D10__ETM_DA10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D10__ETM_DA10	/;"	d
MX28_PAD_LCD_D10__GPIO_1_10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D10__GPIO_1_10	/;"	d
MX28_PAD_LCD_D10__LCD_D10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D10__LCD_D10	/;"	d
MX28_PAD_LCD_D11__ETM_DA11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D11__ETM_DA11	/;"	d
MX28_PAD_LCD_D11__GPIO_1_11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D11__GPIO_1_11	/;"	d
MX28_PAD_LCD_D11__LCD_D11	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D11__LCD_D11	/;"	d
MX28_PAD_LCD_D12__ETM_DA12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D12__ETM_DA12	/;"	d
MX28_PAD_LCD_D12__GPIO_1_12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D12__GPIO_1_12	/;"	d
MX28_PAD_LCD_D12__LCD_D12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D12__LCD_D12	/;"	d
MX28_PAD_LCD_D13__ETM_DA13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D13__ETM_DA13	/;"	d
MX28_PAD_LCD_D13__GPIO_1_13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D13__GPIO_1_13	/;"	d
MX28_PAD_LCD_D13__LCD_D13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D13__LCD_D13	/;"	d
MX28_PAD_LCD_D14__ETM_DA14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D14__ETM_DA14	/;"	d
MX28_PAD_LCD_D14__GPIO_1_14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D14__GPIO_1_14	/;"	d
MX28_PAD_LCD_D14__LCD_D14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D14__LCD_D14	/;"	d
MX28_PAD_LCD_D15__ETM_DA15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D15__ETM_DA15	/;"	d
MX28_PAD_LCD_D15__GPIO_1_15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D15__GPIO_1_15	/;"	d
MX28_PAD_LCD_D15__LCD_D15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D15__LCD_D15	/;"	d
MX28_PAD_LCD_D16__ETM_DA7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D16__ETM_DA7	/;"	d
MX28_PAD_LCD_D16__GPIO_1_16	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D16__GPIO_1_16	/;"	d
MX28_PAD_LCD_D16__LCD_D16	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D16__LCD_D16	/;"	d
MX28_PAD_LCD_D17__ETM_DA6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D17__ETM_DA6	/;"	d
MX28_PAD_LCD_D17__GPIO_1_17	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D17__GPIO_1_17	/;"	d
MX28_PAD_LCD_D17__LCD_D17	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D17__LCD_D17	/;"	d
MX28_PAD_LCD_D18__ETM_DA5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D18__ETM_DA5	/;"	d
MX28_PAD_LCD_D18__GPIO_1_18	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D18__GPIO_1_18	/;"	d
MX28_PAD_LCD_D18__LCD_D18	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D18__LCD_D18	/;"	d
MX28_PAD_LCD_D19__ETM_DA4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D19__ETM_DA4	/;"	d
MX28_PAD_LCD_D19__GPIO_1_19	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D19__GPIO_1_19	/;"	d
MX28_PAD_LCD_D19__LCD_D19	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D19__LCD_D19	/;"	d
MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT	/;"	d
MX28_PAD_LCD_D20__ETM_DA3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D20__ETM_DA3	/;"	d
MX28_PAD_LCD_D20__GPIO_1_20	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D20__GPIO_1_20	/;"	d
MX28_PAD_LCD_D20__LCD_D20	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D20__LCD_D20	/;"	d
MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN	/;"	d
MX28_PAD_LCD_D21__ETM_DA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D21__ETM_DA2	/;"	d
MX28_PAD_LCD_D21__GPIO_1_21	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D21__GPIO_1_21	/;"	d
MX28_PAD_LCD_D21__LCD_D21	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D21__LCD_D21	/;"	d
MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT	/;"	d
MX28_PAD_LCD_D22__ETM_DA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D22__ETM_DA1	/;"	d
MX28_PAD_LCD_D22__GPIO_1_22	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D22__GPIO_1_22	/;"	d
MX28_PAD_LCD_D22__LCD_D22	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D22__LCD_D22	/;"	d
MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN	/;"	d
MX28_PAD_LCD_D23__ETM_DA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D23__ETM_DA0	/;"	d
MX28_PAD_LCD_D23__GPIO_1_23	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D23__GPIO_1_23	/;"	d
MX28_PAD_LCD_D23__LCD_D23	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_D23__LCD_D23	/;"	d
MX28_PAD_LCD_DOTCLK__ETM_TCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_DOTCLK__ETM_TCLK	/;"	d
MX28_PAD_LCD_DOTCLK__GPIO_1_30	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_DOTCLK__GPIO_1_30	/;"	d
MX28_PAD_LCD_DOTCLK__LCD_DOTCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_DOTCLK__LCD_DOTCLK	/;"	d
MX28_PAD_LCD_DOTCLK__SAIF1_MCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_DOTCLK__SAIF1_MCLK	/;"	d
MX28_PAD_LCD_ENABLE__GPIO_1_31	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_ENABLE__GPIO_1_31	/;"	d
MX28_PAD_LCD_ENABLE__LCD_ENABLE	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_ENABLE__LCD_ENABLE	/;"	d
MX28_PAD_LCD_HSYNC__ETM_TCTL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_HSYNC__ETM_TCTL	/;"	d
MX28_PAD_LCD_HSYNC__GPIO_1_29	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_HSYNC__GPIO_1_29	/;"	d
MX28_PAD_LCD_HSYNC__LCD_HSYNC	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_HSYNC__LCD_HSYNC	/;"	d
MX28_PAD_LCD_HSYNC__SAIF1_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_HSYNC__SAIF1_SDATA1	/;"	d
MX28_PAD_LCD_RD_E__ETM_TCTL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RD_E__ETM_TCTL	/;"	d
MX28_PAD_LCD_RD_E__GPIO_1_24	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RD_E__GPIO_1_24	/;"	d
MX28_PAD_LCD_RD_E__LCD_RD_E	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RD_E__LCD_RD_E	/;"	d
MX28_PAD_LCD_RD_E__LCD_VSYNC	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RD_E__LCD_VSYNC	/;"	d
MX28_PAD_LCD_RESET__GPIO_3_30	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RESET__GPIO_3_30	/;"	d
MX28_PAD_LCD_RESET__LCD_RESET	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RESET__LCD_RESET	/;"	d
MX28_PAD_LCD_RESET__LCD_VSYNC	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RESET__LCD_VSYNC	/;"	d
MX28_PAD_LCD_RS__GPIO_1_26	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RS__GPIO_1_26	/;"	d
MX28_PAD_LCD_RS__LCD_DOTCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RS__LCD_DOTCLK	/;"	d
MX28_PAD_LCD_RS__LCD_RS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_RS__LCD_RS	/;"	d
MX28_PAD_LCD_VSYNC__GPIO_1_28	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_VSYNC__GPIO_1_28	/;"	d
MX28_PAD_LCD_VSYNC__LCD_VSYNC	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_VSYNC__LCD_VSYNC	/;"	d
MX28_PAD_LCD_VSYNC__SAIF1_SDATA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_VSYNC__SAIF1_SDATA0	/;"	d
MX28_PAD_LCD_WR_RWN__ETM_TCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_WR_RWN__ETM_TCLK	/;"	d
MX28_PAD_LCD_WR_RWN__GPIO_1_25	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_WR_RWN__GPIO_1_25	/;"	d
MX28_PAD_LCD_WR_RWN__LCD_HSYNC	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_WR_RWN__LCD_HSYNC	/;"	d
MX28_PAD_LCD_WR_RWN__LCD_WR_RWN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_LCD_WR_RWN__LCD_WR_RWN	/;"	d
MX28_PAD_PWM0__DUART_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM0__DUART_RX	/;"	d
MX28_PAD_PWM0__GPIO_3_16	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM0__GPIO_3_16	/;"	d
MX28_PAD_PWM0__I2C1_SCL	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM0__I2C1_SCL	/;"	d
MX28_PAD_PWM0__PWM_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM0__PWM_0	/;"	d
MX28_PAD_PWM1__DUART_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM1__DUART_TX	/;"	d
MX28_PAD_PWM1__GPIO_3_17	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM1__GPIO_3_17	/;"	d
MX28_PAD_PWM1__I2C1_SDA	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM1__I2C1_SDA	/;"	d
MX28_PAD_PWM1__PWM_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM1__PWM_1	/;"	d
MX28_PAD_PWM2__GPIO_3_18	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM2__GPIO_3_18	/;"	d
MX28_PAD_PWM2__PWM_2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM2__PWM_2	/;"	d
MX28_PAD_PWM2__USB0_ID	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM2__USB0_ID	/;"	d
MX28_PAD_PWM2__USB1_OVERCURRENT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM2__USB1_OVERCURRENT	/;"	d
MX28_PAD_PWM3__GPIO_3_28	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM3__GPIO_3_28	/;"	d
MX28_PAD_PWM3__PWM_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM3__PWM_3	/;"	d
MX28_PAD_PWM4__GPIO_3_29	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM4__GPIO_3_29	/;"	d
MX28_PAD_PWM4__PWM_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_PWM4__PWM_4	/;"	d
MX28_PAD_SAIF0_BITCLK__AUART4_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_BITCLK__AUART4_RX	/;"	d
MX28_PAD_SAIF0_BITCLK__GPIO_3_22	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_BITCLK__GPIO_3_22	/;"	d
MX28_PAD_SAIF0_BITCLK__PWM_5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_BITCLK__PWM_5	/;"	d
MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK	/;"	d
MX28_PAD_SAIF0_LRCLK__AUART4_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_LRCLK__AUART4_RTS	/;"	d
MX28_PAD_SAIF0_LRCLK__GPIO_3_21	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_LRCLK__GPIO_3_21	/;"	d
MX28_PAD_SAIF0_LRCLK__PWM_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_LRCLK__PWM_4	/;"	d
MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK	/;"	d
MX28_PAD_SAIF0_MCLK__AUART4_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_MCLK__AUART4_CTS	/;"	d
MX28_PAD_SAIF0_MCLK__GPIO_3_20	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_MCLK__GPIO_3_20	/;"	d
MX28_PAD_SAIF0_MCLK__PWM_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_MCLK__PWM_3	/;"	d
MX28_PAD_SAIF0_MCLK__SAIF0_MCLK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_MCLK__SAIF0_MCLK	/;"	d
MX28_PAD_SAIF0_SDATA0__AUART4_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_SDATA0__AUART4_TX	/;"	d
MX28_PAD_SAIF0_SDATA0__GPIO_3_23	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_SDATA0__GPIO_3_23	/;"	d
MX28_PAD_SAIF0_SDATA0__PWM_6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_SDATA0__PWM_6	/;"	d
MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0	/;"	d
MX28_PAD_SAIF1_SDATA0__GPIO_3_26	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF1_SDATA0__GPIO_3_26	/;"	d
MX28_PAD_SAIF1_SDATA0__PWM_7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF1_SDATA0__PWM_7	/;"	d
MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1	/;"	d
MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0	/;"	d
MX28_PAD_SPDIF__ENET1_RX_ER	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SPDIF__ENET1_RX_ER	/;"	d
MX28_PAD_SPDIF__GPIO_3_27	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SPDIF__GPIO_3_27	/;"	d
MX28_PAD_SPDIF__SPDIF_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SPDIF__SPDIF_TX	/;"	d
MX28_PAD_SSP0_CMD__GPIO_2_8	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_CMD__GPIO_2_8	/;"	d
MX28_PAD_SSP0_CMD__SSP0_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_CMD__SSP0_CMD	/;"	d
MX28_PAD_SSP0_DATA0__GPIO_2_0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA0__GPIO_2_0	/;"	d
MX28_PAD_SSP0_DATA0__SSP0_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA0__SSP0_D0	/;"	d
MX28_PAD_SSP0_DATA1__GPIO_2_1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA1__GPIO_2_1	/;"	d
MX28_PAD_SSP0_DATA1__SSP0_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA1__SSP0_D1	/;"	d
MX28_PAD_SSP0_DATA2__GPIO_2_2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA2__GPIO_2_2	/;"	d
MX28_PAD_SSP0_DATA2__SSP0_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA2__SSP0_D2	/;"	d
MX28_PAD_SSP0_DATA3__GPIO_2_3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA3__GPIO_2_3	/;"	d
MX28_PAD_SSP0_DATA3__SSP0_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA3__SSP0_D3	/;"	d
MX28_PAD_SSP0_DATA4__GPIO_2_4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA4__GPIO_2_4	/;"	d
MX28_PAD_SSP0_DATA4__SSP0_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA4__SSP0_D4	/;"	d
MX28_PAD_SSP0_DATA4__SSP2_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA4__SSP2_D0	/;"	d
MX28_PAD_SSP0_DATA5__GPIO_2_5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA5__GPIO_2_5	/;"	d
MX28_PAD_SSP0_DATA5__SSP0_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA5__SSP0_D5	/;"	d
MX28_PAD_SSP0_DATA5__SSP2_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA5__SSP2_D3	/;"	d
MX28_PAD_SSP0_DATA6__GPIO_2_6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA6__GPIO_2_6	/;"	d
MX28_PAD_SSP0_DATA6__SSP0_D6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA6__SSP0_D6	/;"	d
MX28_PAD_SSP0_DATA6__SSP2_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA6__SSP2_CMD	/;"	d
MX28_PAD_SSP0_DATA7__GPIO_2_7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA7__GPIO_2_7	/;"	d
MX28_PAD_SSP0_DATA7__SSP0_D7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA7__SSP0_D7	/;"	d
MX28_PAD_SSP0_DATA7__SSP2_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DATA7__SSP2_SCK	/;"	d
MX28_PAD_SSP0_DETECT__GPIO_2_9	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DETECT__GPIO_2_9	/;"	d
MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT	/;"	d
MX28_PAD_SSP0_SCK__GPIO_2_10	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_SCK__GPIO_2_10	/;"	d
MX28_PAD_SSP0_SCK__SSP0_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP0_SCK__SSP0_SCK	/;"	d
MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN	/;"	d
MX28_PAD_SSP1_CMD__GPIO_2_13	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_CMD__GPIO_2_13	/;"	d
MX28_PAD_SSP1_CMD__SSP1_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_CMD__SSP1_CMD	/;"	d
MX28_PAD_SSP1_CMD__SSP2_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_CMD__SSP2_D2	/;"	d
MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT	/;"	d
MX28_PAD_SSP1_DATA0__GPIO_2_14	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA0__GPIO_2_14	/;"	d
MX28_PAD_SSP1_DATA0__SSP1_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA0__SSP1_D0	/;"	d
MX28_PAD_SSP1_DATA0__SSP2_D6	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA0__SSP2_D6	/;"	d
MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN	/;"	d
MX28_PAD_SSP1_DATA3__GPIO_2_15	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA3__GPIO_2_15	/;"	d
MX28_PAD_SSP1_DATA3__SSP1_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA3__SSP1_D3	/;"	d
MX28_PAD_SSP1_DATA3__SSP2_D7	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_DATA3__SSP2_D7	/;"	d
MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT	/;"	d
MX28_PAD_SSP1_SCK__GPIO_2_12	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_SCK__GPIO_2_12	/;"	d
MX28_PAD_SSP1_SCK__SSP1_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_SCK__SSP1_SCK	/;"	d
MX28_PAD_SSP1_SCK__SSP2_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP1_SCK__SSP2_D1	/;"	d
MX28_PAD_SSP2_MISO__AUART3_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MISO__AUART3_RX	/;"	d
MX28_PAD_SSP2_MISO__GPIO_2_18	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MISO__GPIO_2_18	/;"	d
MX28_PAD_SSP2_MISO__SAIF1_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MISO__SAIF1_SDATA1	/;"	d
MX28_PAD_SSP2_MISO__SSP2_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MISO__SSP2_D0	/;"	d
MX28_PAD_SSP2_MOSI__AUART2_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MOSI__AUART2_TX	/;"	d
MX28_PAD_SSP2_MOSI__GPIO_2_17	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MOSI__GPIO_2_17	/;"	d
MX28_PAD_SSP2_MOSI__SAIF0_SDATA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MOSI__SAIF0_SDATA2	/;"	d
MX28_PAD_SSP2_MOSI__SSP2_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_MOSI__SSP2_CMD	/;"	d
MX28_PAD_SSP2_SCK__AUART2_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SCK__AUART2_RX	/;"	d
MX28_PAD_SSP2_SCK__GPIO_2_16	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SCK__GPIO_2_16	/;"	d
MX28_PAD_SSP2_SCK__SAIF0_SDATA1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SCK__SAIF0_SDATA1	/;"	d
MX28_PAD_SSP2_SCK__SSP2_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SCK__SSP2_SCK	/;"	d
MX28_PAD_SSP2_SS0__AUART3_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS0__AUART3_TX	/;"	d
MX28_PAD_SSP2_SS0__GPIO_2_19	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS0__GPIO_2_19	/;"	d
MX28_PAD_SSP2_SS0__SAIF1_SDATA2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS0__SAIF1_SDATA2	/;"	d
MX28_PAD_SSP2_SS0__SSP2_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS0__SSP2_D3	/;"	d
MX28_PAD_SSP2_SS1__GPIO_2_20	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS1__GPIO_2_20	/;"	d
MX28_PAD_SSP2_SS1__SSP2_D1	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS1__SSP2_D1	/;"	d
MX28_PAD_SSP2_SS1__SSP2_D4	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS1__SSP2_D4	/;"	d
MX28_PAD_SSP2_SS1__USB1_OVERCURRENT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS1__USB1_OVERCURRENT	/;"	d
MX28_PAD_SSP2_SS2__GPIO_2_21	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS2__GPIO_2_21	/;"	d
MX28_PAD_SSP2_SS2__SSP2_D2	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS2__SSP2_D2	/;"	d
MX28_PAD_SSP2_SS2__SSP2_D5	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS2__SSP2_D5	/;"	d
MX28_PAD_SSP2_SS2__USB0_OVERCURRENT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP2_SS2__USB0_OVERCURRENT	/;"	d
MX28_PAD_SSP3_MISO__AUART4_RTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MISO__AUART4_RTS	/;"	d
MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT	/;"	d
MX28_PAD_SSP3_MISO__GPIO_2_26	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MISO__GPIO_2_26	/;"	d
MX28_PAD_SSP3_MISO__SSP3_D0	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MISO__SSP3_D0	/;"	d
MX28_PAD_SSP3_MOSI__AUART4_RX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MOSI__AUART4_RX	/;"	d
MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN	/;"	d
MX28_PAD_SSP3_MOSI__GPIO_2_25	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MOSI__GPIO_2_25	/;"	d
MX28_PAD_SSP3_MOSI__SSP3_CMD	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_MOSI__SSP3_CMD	/;"	d
MX28_PAD_SSP3_SCK__AUART4_TX	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SCK__AUART4_TX	/;"	d
MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT	/;"	d
MX28_PAD_SSP3_SCK__GPIO_2_24	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SCK__GPIO_2_24	/;"	d
MX28_PAD_SSP3_SCK__SSP3_SCK	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SCK__SSP3_SCK	/;"	d
MX28_PAD_SSP3_SS0__AUART4_CTS	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SS0__AUART4_CTS	/;"	d
MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN	/;"	d
MX28_PAD_SSP3_SS0__GPIO_2_27	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SS0__GPIO_2_27	/;"	d
MX28_PAD_SSP3_SS0__SSP3_D3	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define MX28_PAD_SSP3_SS0__SSP3_D3	/;"	d
MX29LV040	drivers/mtd/jedec_flash.c	/^#define MX29LV040	/;"	d	file:
MX31_AIPS1_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MX31_AIPS1_BASE_ADDR	/;"	d
MX31_H1_DT_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX31_H1_DT_BIT	/;"	d	file:
MX31_H1_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX31_H1_PM_BIT	/;"	d	file:
MX31_H1_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX31_H1_SIC_MASK	/;"	d	file:
MX31_H1_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX31_H1_SIC_SHIFT	/;"	d	file:
MX31_H2_DT_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX31_H2_DT_BIT	/;"	d	file:
MX31_H2_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX31_H2_PM_BIT	/;"	d	file:
MX31_H2_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX31_H2_SIC_MASK	/;"	d	file:
MX31_H2_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX31_H2_SIC_SHIFT	/;"	d	file:
MX31_IIM_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MX31_IIM_BASE_ADDR	/;"	d
MX31_OTG_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX31_OTG_PM_BIT	/;"	d	file:
MX31_OTG_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX31_OTG_SIC_MASK	/;"	d	file:
MX31_OTG_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX31_OTG_SIC_SHIFT	/;"	d	file:
MX31_PIN_A0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A0		= IOMUX_PIN(0xff, 292),$/;"	e	enum:iomux_pins
MX31_PIN_A1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A1		= IOMUX_PIN(0xff, 291),$/;"	e	enum:iomux_pins
MX31_PIN_A10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A10		= IOMUX_PIN(0xff, 282),$/;"	e	enum:iomux_pins
MX31_PIN_A11	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A11		= IOMUX_PIN(0xff, 280),$/;"	e	enum:iomux_pins
MX31_PIN_A12	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A12		= IOMUX_PIN(0xff, 279),$/;"	e	enum:iomux_pins
MX31_PIN_A13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A13		= IOMUX_PIN(0xff, 278),$/;"	e	enum:iomux_pins
MX31_PIN_A14	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A14		= IOMUX_PIN(0xff, 276),$/;"	e	enum:iomux_pins
MX31_PIN_A15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A15		= IOMUX_PIN(0xff, 277),$/;"	e	enum:iomux_pins
MX31_PIN_A16	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A16		= IOMUX_PIN(0xff, 275),$/;"	e	enum:iomux_pins
MX31_PIN_A17	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A17		= IOMUX_PIN(0xff, 274),$/;"	e	enum:iomux_pins
MX31_PIN_A18	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A18		= IOMUX_PIN(0xff, 273),$/;"	e	enum:iomux_pins
MX31_PIN_A19	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A19		= IOMUX_PIN(0xff, 272),$/;"	e	enum:iomux_pins
MX31_PIN_A2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A2		= IOMUX_PIN(0xff, 290),$/;"	e	enum:iomux_pins
MX31_PIN_A20	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A20		= IOMUX_PIN(0xff, 271),$/;"	e	enum:iomux_pins
MX31_PIN_A21	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A21		= IOMUX_PIN(0xff, 270),$/;"	e	enum:iomux_pins
MX31_PIN_A22	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A22		= IOMUX_PIN(0xff, 269),$/;"	e	enum:iomux_pins
MX31_PIN_A23	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A23		= IOMUX_PIN(0xff, 268),$/;"	e	enum:iomux_pins
MX31_PIN_A24	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A24		= IOMUX_PIN(0xff, 267),$/;"	e	enum:iomux_pins
MX31_PIN_A25	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A25		= IOMUX_PIN(0xff, 266),$/;"	e	enum:iomux_pins
MX31_PIN_A3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A3		= IOMUX_PIN(0xff, 289),$/;"	e	enum:iomux_pins
MX31_PIN_A4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A4		= IOMUX_PIN(0xff, 288),$/;"	e	enum:iomux_pins
MX31_PIN_A5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A5		= IOMUX_PIN(0xff, 287),$/;"	e	enum:iomux_pins
MX31_PIN_A6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A6		= IOMUX_PIN(0xff, 286),$/;"	e	enum:iomux_pins
MX31_PIN_A7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A7		= IOMUX_PIN(0xff, 285),$/;"	e	enum:iomux_pins
MX31_PIN_A8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A8		= IOMUX_PIN(0xff, 284),$/;"	e	enum:iomux_pins
MX31_PIN_A9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_A9		= IOMUX_PIN(0xff, 283),$/;"	e	enum:iomux_pins
MX31_PIN_ATA_CS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ATA_CS0	= IOMUX_PIN(90,    12),$/;"	e	enum:iomux_pins
MX31_PIN_ATA_CS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ATA_CS1	= IOMUX_PIN(91,    11),$/;"	e	enum:iomux_pins
MX31_PIN_ATA_DIOR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ATA_DIOR	= IOMUX_PIN(92,    10),$/;"	e	enum:iomux_pins
MX31_PIN_ATA_DIOW	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ATA_DIOW	= IOMUX_PIN(93,     9),$/;"	e	enum:iomux_pins
MX31_PIN_ATA_DMACK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ATA_DMACK	= IOMUX_PIN(94,     8),$/;"	e	enum:iomux_pins
MX31_PIN_ATA_RESET_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ATA_RESET_B	= IOMUX_PIN(95,     7),$/;"	e	enum:iomux_pins
MX31_PIN_BATT_LINE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BATT_LINE	= IOMUX_PIN(49,   100),$/;"	e	enum:iomux_pins
MX31_PIN_BCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BCLK		= IOMUX_PIN(0xff, 216),$/;"	e	enum:iomux_pins
MX31_PIN_BOOT_MODE0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BOOT_MODE0	= IOMUX_PIN(0xff, 304),$/;"	e	enum:iomux_pins
MX31_PIN_BOOT_MODE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BOOT_MODE1	= IOMUX_PIN(0xff, 303),$/;"	e	enum:iomux_pins
MX31_PIN_BOOT_MODE2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BOOT_MODE2	= IOMUX_PIN(0xff, 302),$/;"	e	enum:iomux_pins
MX31_PIN_BOOT_MODE3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BOOT_MODE3	= IOMUX_PIN(0xff, 301),$/;"	e	enum:iomux_pins
MX31_PIN_BOOT_MODE4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_BOOT_MODE4	= IOMUX_PIN(0xff, 300),$/;"	e	enum:iomux_pins
MX31_PIN_CAPTURE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CAPTURE	= IOMUX_PIN(7,    327),$/;"	e	enum:iomux_pins
MX31_PIN_CAS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CAS		= IOMUX_PIN(0xff, 213),$/;"	e	enum:iomux_pins
MX31_PIN_CE_CONTROL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CE_CONTROL	= IOMUX_PIN(0xff,   6),$/;"	e	enum:iomux_pins
MX31_PIN_CKIH	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CKIH		= IOMUX_PIN(0xff, 308),$/;"	e	enum:iomux_pins
MX31_PIN_CKIL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CKIL		= IOMUX_PIN(0xff, 299),$/;"	e	enum:iomux_pins
MX31_PIN_CLKO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CLKO		= IOMUX_PIN(0xff, 305),$/;"	e	enum:iomux_pins
MX31_PIN_CLKSS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CLKSS		= IOMUX_PIN(0xff,   5),$/;"	e	enum:iomux_pins
MX31_PIN_COMPARE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_COMPARE	= IOMUX_PIN(8,    326),$/;"	e	enum:iomux_pins
MX31_PIN_CONTRAST	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CONTRAST	= IOMUX_PIN(0xff,  22),$/;"	e	enum:iomux_pins
MX31_PIN_CS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CS0		= IOMUX_PIN(0xff, 224),$/;"	e	enum:iomux_pins
MX31_PIN_CS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CS1		= IOMUX_PIN(0xff, 223),$/;"	e	enum:iomux_pins
MX31_PIN_CS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CS2		= IOMUX_PIN(0xff, 222),$/;"	e	enum:iomux_pins
MX31_PIN_CS3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CS3		= IOMUX_PIN(0xff, 221),$/;"	e	enum:iomux_pins
MX31_PIN_CS4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CS4		= IOMUX_PIN(0xff, 220),$/;"	e	enum:iomux_pins
MX31_PIN_CS5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CS5		= IOMUX_PIN(0xff, 219),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D10	= IOMUX_PIN(74,   159),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D11	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D11	= IOMUX_PIN(75,   158),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D12	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D12	= IOMUX_PIN(76,   157),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D13	= IOMUX_PIN(77,   156),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D14	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D14	= IOMUX_PIN(78,   155),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D15	= IOMUX_PIN(79,   154),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D4		= IOMUX_PIN(68,   165),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D5		= IOMUX_PIN(69,   164),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D6		= IOMUX_PIN(70,   163),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D7		= IOMUX_PIN(71,   162),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D8		= IOMUX_PIN(72,   161),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_D9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_D9		= IOMUX_PIN(73,   160),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_HSYNC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_HSYNC	= IOMUX_PIN(82,   151),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_MCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_MCLK	= IOMUX_PIN(80,   153),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_PIXCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_PIXCLK	= IOMUX_PIN(83,   150),$/;"	e	enum:iomux_pins
MX31_PIN_CSI_VSYNC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSI_VSYNC	= IOMUX_PIN(81,   152),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_MISO	= IOMUX_PIN(0xff, 130),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_MOSI	= IOMUX_PIN(0xff, 131),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_SCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_SCLK	= IOMUX_PIN(0xff, 126),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_SPI_RDY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_SPI_RDY	= IOMUX_PIN(0xff, 125),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_SS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_SS0	= IOMUX_PIN(0xff, 129),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_SS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_SS1	= IOMUX_PIN(0xff, 128),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI1_SS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI1_SS2	= IOMUX_PIN(0xff, 127),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_MISO	= IOMUX_PIN(0xff, 123),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_MOSI	= IOMUX_PIN(0xff, 124),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_SCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_SCLK	= IOMUX_PIN(0xff, 119),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_SPI_RDY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_SPI_RDY	= IOMUX_PIN(0xff, 118),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_SS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_SS0	= IOMUX_PIN(0xff, 122),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_SS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_SS1	= IOMUX_PIN(0xff, 121),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI2_SS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI2_SS2	= IOMUX_PIN(0xff, 120),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI3_MISO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI3_MISO	= IOMUX_PIN(0xff,   3),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI3_MOSI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI3_MOSI	= IOMUX_PIN(0xff,   4),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI3_SCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI3_SCLK	= IOMUX_PIN(0xff,   2),$/;"	e	enum:iomux_pins
MX31_PIN_CSPI3_SPI_RDY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CSPI3_SPI_RDY	= IOMUX_PIN(0xff,   1),$/;"	e	enum:iomux_pins
MX31_PIN_CTS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CTS1		= IOMUX_PIN(39,   114),$/;"	e	enum:iomux_pins
MX31_PIN_CTS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_CTS2		= IOMUX_PIN(0xff, 101),$/;"	e	enum:iomux_pins
MX31_PIN_D0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D0		= IOMUX_PIN(0xff, 181),$/;"	e	enum:iomux_pins
MX31_PIN_D1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D1		= IOMUX_PIN(0xff, 182),$/;"	e	enum:iomux_pins
MX31_PIN_D10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D10		= IOMUX_PIN(0xff, 191),$/;"	e	enum:iomux_pins
MX31_PIN_D11	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D11		= IOMUX_PIN(0xff, 192),$/;"	e	enum:iomux_pins
MX31_PIN_D12	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D12		= IOMUX_PIN(0xff, 193),$/;"	e	enum:iomux_pins
MX31_PIN_D13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D13		= IOMUX_PIN(0xff, 194),$/;"	e	enum:iomux_pins
MX31_PIN_D14	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D14		= IOMUX_PIN(0xff, 195),$/;"	e	enum:iomux_pins
MX31_PIN_D15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D15		= IOMUX_PIN(0xff, 196),$/;"	e	enum:iomux_pins
MX31_PIN_D2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D2		= IOMUX_PIN(0xff, 183),$/;"	e	enum:iomux_pins
MX31_PIN_D3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D3		= IOMUX_PIN(0xff, 184),$/;"	e	enum:iomux_pins
MX31_PIN_D3_CLS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D3_CLS		= IOMUX_PIN(0xff,  20),$/;"	e	enum:iomux_pins
MX31_PIN_D3_REV	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D3_REV		= IOMUX_PIN(0xff,  21),$/;"	e	enum:iomux_pins
MX31_PIN_D3_SPL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D3_SPL		= IOMUX_PIN(0xff,  19),$/;"	e	enum:iomux_pins
MX31_PIN_D4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D4		= IOMUX_PIN(0xff, 185),$/;"	e	enum:iomux_pins
MX31_PIN_D5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D5		= IOMUX_PIN(0xff, 186),$/;"	e	enum:iomux_pins
MX31_PIN_D6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D6		= IOMUX_PIN(0xff, 187),$/;"	e	enum:iomux_pins
MX31_PIN_D7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D7		= IOMUX_PIN(0xff, 188),$/;"	e	enum:iomux_pins
MX31_PIN_D8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D8		= IOMUX_PIN(0xff, 189),$/;"	e	enum:iomux_pins
MX31_PIN_D9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_D9		= IOMUX_PIN(0xff, 190),$/;"	e	enum:iomux_pins
MX31_PIN_DCD_DCE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DCD_DCE1	= IOMUX_PIN(43,   110),$/;"	e	enum:iomux_pins
MX31_PIN_DCD_DTE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DCD_DTE1	= IOMUX_PIN(47,   106),$/;"	e	enum:iomux_pins
MX31_PIN_DE_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DE_B		= IOMUX_PIN(0xff,  77),$/;"	e	enum:iomux_pins
MX31_PIN_DQM0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DQM0		= IOMUX_PIN(0xff, 231),$/;"	e	enum:iomux_pins
MX31_PIN_DQM1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DQM1		= IOMUX_PIN(0xff, 230),$/;"	e	enum:iomux_pins
MX31_PIN_DQM2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DQM2		= IOMUX_PIN(0xff, 229),$/;"	e	enum:iomux_pins
MX31_PIN_DQM3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DQM3		= IOMUX_PIN(0xff, 228),$/;"	e	enum:iomux_pins
MX31_PIN_DRDY0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DRDY0		= IOMUX_PIN(0xff,  33),$/;"	e	enum:iomux_pins
MX31_PIN_DSR_DCE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DSR_DCE1	= IOMUX_PIN(41,   112),$/;"	e	enum:iomux_pins
MX31_PIN_DSR_DTE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DSR_DTE1	= IOMUX_PIN(45,   108),$/;"	e	enum:iomux_pins
MX31_PIN_DTR_DCE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DTR_DCE1	= IOMUX_PIN(40,   113),$/;"	e	enum:iomux_pins
MX31_PIN_DTR_DCE2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DTR_DCE2	= IOMUX_PIN(48,   105),$/;"	e	enum:iomux_pins
MX31_PIN_DTR_DTE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DTR_DTE1	= IOMUX_PIN(44,   109),$/;"	e	enum:iomux_pins
MX31_PIN_DVFS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DVFS0		= IOMUX_PIN(0xff, 296),$/;"	e	enum:iomux_pins
MX31_PIN_DVFS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_DVFS1		= IOMUX_PIN(0xff, 295),$/;"	e	enum:iomux_pins
MX31_PIN_EB0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_EB0		= IOMUX_PIN(0xff, 227),$/;"	e	enum:iomux_pins
MX31_PIN_EB1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_EB1		= IOMUX_PIN(0xff, 226),$/;"	e	enum:iomux_pins
MX31_PIN_ECB	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_ECB		= IOMUX_PIN(0xff, 218),$/;"	e	enum:iomux_pins
MX31_PIN_FPSHIFT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_FPSHIFT	= IOMUX_PIN(0xff,  34),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_0	= IOMUX_PIN(0,    323),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_1	= IOMUX_PIN(1,    322),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_2	= IOMUX_PIN(2,    321),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_3	= IOMUX_PIN(3,    320),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_4	= IOMUX_PIN(4,    319),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_5	= IOMUX_PIN(5,    318),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO1_6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO1_6	= IOMUX_PIN(6,    317),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO3_0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO3_0	= IOMUX_PIN(64,   316),$/;"	e	enum:iomux_pins
MX31_PIN_GPIO3_1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_GPIO3_1	= IOMUX_PIN(65,   315),$/;"	e	enum:iomux_pins
MX31_PIN_HSYNC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_HSYNC		= IOMUX_PIN(0xff,  35),$/;"	e	enum:iomux_pins
MX31_PIN_I2C_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_I2C_CLK	= IOMUX_PIN(0xff, 149),$/;"	e	enum:iomux_pins
MX31_PIN_I2C_DAT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_I2C_DAT	= IOMUX_PIN(0xff, 148),$/;"	e	enum:iomux_pins
MX31_PIN_IOIS16	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_IOIS16		= IOMUX_PIN(0xff, 170),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL0	= IOMUX_PIN(0xff,  91),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL1	= IOMUX_PIN(0xff,  90),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL2	= IOMUX_PIN(0xff,  89),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL3	= IOMUX_PIN(0xff,  88),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL4	= IOMUX_PIN(54,    87),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL5	= IOMUX_PIN(55,    86),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL6	= IOMUX_PIN(56,    85),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_COL7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_COL7	= IOMUX_PIN(57,    84),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW0	= IOMUX_PIN(0xff,  99),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW1	= IOMUX_PIN(0xff,  98),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW2	= IOMUX_PIN(0xff,  97),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW3	= IOMUX_PIN(0xff,  96),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW4	= IOMUX_PIN(50,    95),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW5	= IOMUX_PIN(51,    94),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW6	= IOMUX_PIN(52,    93),$/;"	e	enum:iomux_pins
MX31_PIN_KEY_ROW7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_KEY_ROW7	= IOMUX_PIN(53,    92),$/;"	e	enum:iomux_pins
MX31_PIN_LBA	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LBA		= IOMUX_PIN(0xff, 217),$/;"	e	enum:iomux_pins
MX31_PIN_LCS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LCS0		= IOMUX_PIN(87,    29),$/;"	e	enum:iomux_pins
MX31_PIN_LCS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LCS1		= IOMUX_PIN(88,    28),$/;"	e	enum:iomux_pins
MX31_PIN_LD0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD0		= IOMUX_PIN(0xff,  54),$/;"	e	enum:iomux_pins
MX31_PIN_LD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD1		= IOMUX_PIN(0xff,  53),$/;"	e	enum:iomux_pins
MX31_PIN_LD10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD10		= IOMUX_PIN(0xff,  44),$/;"	e	enum:iomux_pins
MX31_PIN_LD11	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD11		= IOMUX_PIN(0xff,  43),$/;"	e	enum:iomux_pins
MX31_PIN_LD12	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD12		= IOMUX_PIN(0xff,  42),$/;"	e	enum:iomux_pins
MX31_PIN_LD13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD13		= IOMUX_PIN(0xff,  41),$/;"	e	enum:iomux_pins
MX31_PIN_LD14	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD14		= IOMUX_PIN(0xff,  40),$/;"	e	enum:iomux_pins
MX31_PIN_LD15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD15		= IOMUX_PIN(0xff,  39),$/;"	e	enum:iomux_pins
MX31_PIN_LD16	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD16		= IOMUX_PIN(0xff,  38),$/;"	e	enum:iomux_pins
MX31_PIN_LD17	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD17		= IOMUX_PIN(0xff,  37),$/;"	e	enum:iomux_pins
MX31_PIN_LD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD2		= IOMUX_PIN(0xff,  52),$/;"	e	enum:iomux_pins
MX31_PIN_LD3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD3		= IOMUX_PIN(0xff,  51),$/;"	e	enum:iomux_pins
MX31_PIN_LD4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD4		= IOMUX_PIN(0xff,  50),$/;"	e	enum:iomux_pins
MX31_PIN_LD5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD5		= IOMUX_PIN(0xff,  49),$/;"	e	enum:iomux_pins
MX31_PIN_LD6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD6		= IOMUX_PIN(0xff,  48),$/;"	e	enum:iomux_pins
MX31_PIN_LD7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD7		= IOMUX_PIN(0xff,  47),$/;"	e	enum:iomux_pins
MX31_PIN_LD8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD8		= IOMUX_PIN(0xff,  46),$/;"	e	enum:iomux_pins
MX31_PIN_LD9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_LD9		= IOMUX_PIN(0xff,  45),$/;"	e	enum:iomux_pins
MX31_PIN_MA10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_MA10		= IOMUX_PIN(0xff, 281),$/;"	e	enum:iomux_pins
MX31_PIN_M_GRANT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_M_GRANT	= IOMUX_PIN(0xff, 166),$/;"	e	enum:iomux_pins
MX31_PIN_M_REQUEST	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_M_REQUEST	= IOMUX_PIN(0xff, 167),$/;"	e	enum:iomux_pins
MX31_PIN_NFALE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFALE		= IOMUX_PIN(12,   201),$/;"	e	enum:iomux_pins
MX31_PIN_NFCE_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFCE_B		= IOMUX_PIN(15,   198),$/;"	e	enum:iomux_pins
MX31_PIN_NFCLE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFCLE		= IOMUX_PIN(13,   200),$/;"	e	enum:iomux_pins
MX31_PIN_NFRB	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFRB		= IOMUX_PIN(16,   197),$/;"	e	enum:iomux_pins
MX31_PIN_NFRE_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFRE_B		= IOMUX_PIN(11,   202),$/;"	e	enum:iomux_pins
MX31_PIN_NFWE_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFWE_B		= IOMUX_PIN(10,   203),$/;"	e	enum:iomux_pins
MX31_PIN_NFWP_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_NFWP_B		= IOMUX_PIN(14,   199),$/;"	e	enum:iomux_pins
MX31_PIN_OE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_OE		= IOMUX_PIN(0xff, 225),$/;"	e	enum:iomux_pins
MX31_PIN_PAR_RS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PAR_RS		= IOMUX_PIN(0xff,  26),$/;"	e	enum:iomux_pins
MX31_PIN_PC_BVD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_BVD1	= IOMUX_PIN(0xff, 173),$/;"	e	enum:iomux_pins
MX31_PIN_PC_BVD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_BVD2	= IOMUX_PIN(0xff, 172),$/;"	e	enum:iomux_pins
MX31_PIN_PC_CD1_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_CD1_B	= IOMUX_PIN(0xff, 180),$/;"	e	enum:iomux_pins
MX31_PIN_PC_CD2_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_CD2_B	= IOMUX_PIN(0xff, 179),$/;"	e	enum:iomux_pins
MX31_PIN_PC_POE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_POE		= IOMUX_PIN(0xff, 168),$/;"	e	enum:iomux_pins
MX31_PIN_PC_PWRON	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_PWRON	= IOMUX_PIN(0xff, 176),$/;"	e	enum:iomux_pins
MX31_PIN_PC_READY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_READY	= IOMUX_PIN(0xff, 177),$/;"	e	enum:iomux_pins
MX31_PIN_PC_RST	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_RST		= IOMUX_PIN(0xff, 171),$/;"	e	enum:iomux_pins
MX31_PIN_PC_RW_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_RW_B	= IOMUX_PIN(0xff, 169),$/;"	e	enum:iomux_pins
MX31_PIN_PC_VS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_VS1		= IOMUX_PIN(0xff, 175),$/;"	e	enum:iomux_pins
MX31_PIN_PC_VS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_VS2		= IOMUX_PIN(0xff, 174),$/;"	e	enum:iomux_pins
MX31_PIN_PC_WAIT_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PC_WAIT_B	= IOMUX_PIN(0xff, 178),$/;"	e	enum:iomux_pins
MX31_PIN_POR_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_POR_B		= IOMUX_PIN(0xff, 306),$/;"	e	enum:iomux_pins
MX31_PIN_POWER_FAIL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_POWER_FAIL	= IOMUX_PIN(0xff, 298),$/;"	e	enum:iomux_pins
MX31_PIN_PWMO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_PWMO		= IOMUX_PIN(9,    324),$/;"	e	enum:iomux_pins
MX31_PIN_RAS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RAS		= IOMUX_PIN(0xff, 214),$/;"	e	enum:iomux_pins
MX31_PIN_READ	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_READ		= IOMUX_PIN(0xff,  24),$/;"	e	enum:iomux_pins
MX31_PIN_RESET_IN_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RESET_IN_B	= IOMUX_PIN(0xff, 307),$/;"	e	enum:iomux_pins
MX31_PIN_RI_DCE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RI_DCE1	= IOMUX_PIN(42,   111),$/;"	e	enum:iomux_pins
MX31_PIN_RI_DTE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RI_DTE1	= IOMUX_PIN(46,   107),$/;"	e	enum:iomux_pins
MX31_PIN_RTCK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RTCK		= IOMUX_PIN(0xff,  83),$/;"	e	enum:iomux_pins
MX31_PIN_RTS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RTS1		= IOMUX_PIN(38,   115),$/;"	e	enum:iomux_pins
MX31_PIN_RTS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RTS2		= IOMUX_PIN(0xff, 102),$/;"	e	enum:iomux_pins
MX31_PIN_RW	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RW		= IOMUX_PIN(0xff, 215),$/;"	e	enum:iomux_pins
MX31_PIN_RXD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RXD1		= IOMUX_PIN(36,   117),$/;"	e	enum:iomux_pins
MX31_PIN_RXD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_RXD2		= IOMUX_PIN(27,   104),$/;"	e	enum:iomux_pins
MX31_PIN_SCK3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SCK3		= IOMUX_PIN(0xff, 145),$/;"	e	enum:iomux_pins
MX31_PIN_SCK4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SCK4		= IOMUX_PIN(0xff, 141),$/;"	e	enum:iomux_pins
MX31_PIN_SCK5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SCK5		= IOMUX_PIN(0xff, 137),$/;"	e	enum:iomux_pins
MX31_PIN_SCK6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SCK6		= IOMUX_PIN(25,   133),$/;"	e	enum:iomux_pins
MX31_PIN_SCLK0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SCLK0		= IOMUX_PIN(66,   314),$/;"	e	enum:iomux_pins
MX31_PIN_SD0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD0		= IOMUX_PIN(0xff, 263),$/;"	e	enum:iomux_pins
MX31_PIN_SD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1		= IOMUX_PIN(0xff, 262),$/;"	e	enum:iomux_pins
MX31_PIN_SD10	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD10		= IOMUX_PIN(0xff, 253),$/;"	e	enum:iomux_pins
MX31_PIN_SD11	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD11		= IOMUX_PIN(0xff, 252),$/;"	e	enum:iomux_pins
MX31_PIN_SD12	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD12		= IOMUX_PIN(0xff, 251),$/;"	e	enum:iomux_pins
MX31_PIN_SD13	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD13		= IOMUX_PIN(0xff, 250),$/;"	e	enum:iomux_pins
MX31_PIN_SD14	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD14		= IOMUX_PIN(0xff, 249),$/;"	e	enum:iomux_pins
MX31_PIN_SD15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD15		= IOMUX_PIN(0xff, 248),$/;"	e	enum:iomux_pins
MX31_PIN_SD16	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD16		= IOMUX_PIN(0xff, 247),$/;"	e	enum:iomux_pins
MX31_PIN_SD17	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD17		= IOMUX_PIN(0xff, 246),$/;"	e	enum:iomux_pins
MX31_PIN_SD18	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD18		= IOMUX_PIN(0xff, 245),$/;"	e	enum:iomux_pins
MX31_PIN_SD19	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD19		= IOMUX_PIN(0xff, 244),$/;"	e	enum:iomux_pins
MX31_PIN_SD1_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1_CLK	= IOMUX_PIN(59,    17),$/;"	e	enum:iomux_pins
MX31_PIN_SD1_CMD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1_CMD	= IOMUX_PIN(58,    18),$/;"	e	enum:iomux_pins
MX31_PIN_SD1_DATA0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1_DATA0	= IOMUX_PIN(60,    16),$/;"	e	enum:iomux_pins
MX31_PIN_SD1_DATA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1_DATA1	= IOMUX_PIN(61,    15),$/;"	e	enum:iomux_pins
MX31_PIN_SD1_DATA2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1_DATA2	= IOMUX_PIN(62,    14),$/;"	e	enum:iomux_pins
MX31_PIN_SD1_DATA3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD1_DATA3	= IOMUX_PIN(63,    13),$/;"	e	enum:iomux_pins
MX31_PIN_SD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD2		= IOMUX_PIN(0xff, 261),$/;"	e	enum:iomux_pins
MX31_PIN_SD20	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD20		= IOMUX_PIN(0xff, 243),$/;"	e	enum:iomux_pins
MX31_PIN_SD21	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD21		= IOMUX_PIN(0xff, 242),$/;"	e	enum:iomux_pins
MX31_PIN_SD22	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD22		= IOMUX_PIN(0xff, 241),$/;"	e	enum:iomux_pins
MX31_PIN_SD23	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD23		= IOMUX_PIN(0xff, 240),$/;"	e	enum:iomux_pins
MX31_PIN_SD24	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD24		= IOMUX_PIN(0xff, 239),$/;"	e	enum:iomux_pins
MX31_PIN_SD25	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD25		= IOMUX_PIN(0xff, 238),$/;"	e	enum:iomux_pins
MX31_PIN_SD26	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD26		= IOMUX_PIN(0xff, 237),$/;"	e	enum:iomux_pins
MX31_PIN_SD27	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD27		= IOMUX_PIN(0xff, 236),$/;"	e	enum:iomux_pins
MX31_PIN_SD28	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD28		= IOMUX_PIN(0xff, 235),$/;"	e	enum:iomux_pins
MX31_PIN_SD29	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD29		= IOMUX_PIN(0xff, 234),$/;"	e	enum:iomux_pins
MX31_PIN_SD3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD3		= IOMUX_PIN(0xff, 260),$/;"	e	enum:iomux_pins
MX31_PIN_SD30	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD30		= IOMUX_PIN(0xff, 233),$/;"	e	enum:iomux_pins
MX31_PIN_SD31	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD31		= IOMUX_PIN(0xff, 232),$/;"	e	enum:iomux_pins
MX31_PIN_SD4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD4		= IOMUX_PIN(0xff, 259),$/;"	e	enum:iomux_pins
MX31_PIN_SD5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD5		= IOMUX_PIN(0xff, 258),$/;"	e	enum:iomux_pins
MX31_PIN_SD6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD6		= IOMUX_PIN(0xff, 257),$/;"	e	enum:iomux_pins
MX31_PIN_SD7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD7		= IOMUX_PIN(0xff, 256),$/;"	e	enum:iomux_pins
MX31_PIN_SD8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD8		= IOMUX_PIN(0xff, 255),$/;"	e	enum:iomux_pins
MX31_PIN_SD9	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD9		= IOMUX_PIN(0xff, 254),$/;"	e	enum:iomux_pins
MX31_PIN_SDBA0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDBA0		= IOMUX_PIN(0xff, 264),$/;"	e	enum:iomux_pins
MX31_PIN_SDBA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDBA1		= IOMUX_PIN(0xff, 265),$/;"	e	enum:iomux_pins
MX31_PIN_SDCKE0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDCKE0		= IOMUX_PIN(0xff, 211),$/;"	e	enum:iomux_pins
MX31_PIN_SDCKE1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDCKE1		= IOMUX_PIN(0xff, 210),$/;"	e	enum:iomux_pins
MX31_PIN_SDCLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDCLK		= IOMUX_PIN(0xff, 209),$/;"	e	enum:iomux_pins
MX31_PIN_SDCLK_B	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDCLK_B	= IOMUX_PIN(0xff, 208),$/;"	e	enum:iomux_pins
MX31_PIN_SDQS0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDQS0		= IOMUX_PIN(0xff, 207),$/;"	e	enum:iomux_pins
MX31_PIN_SDQS1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDQS1		= IOMUX_PIN(0xff, 206),$/;"	e	enum:iomux_pins
MX31_PIN_SDQS2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDQS2		= IOMUX_PIN(0xff, 205),$/;"	e	enum:iomux_pins
MX31_PIN_SDQS3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDQS3		= IOMUX_PIN(0xff, 204),$/;"	e	enum:iomux_pins
MX31_PIN_SDWE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SDWE		= IOMUX_PIN(0xff, 212),$/;"	e	enum:iomux_pins
MX31_PIN_SD_D_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD_D_CLK	= IOMUX_PIN(86,    30),$/;"	e	enum:iomux_pins
MX31_PIN_SD_D_I	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD_D_I		= IOMUX_PIN(84,    32),$/;"	e	enum:iomux_pins
MX31_PIN_SD_D_IO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SD_D_IO	= IOMUX_PIN(85,    31),$/;"	e	enum:iomux_pins
MX31_PIN_SER_RS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SER_RS		= IOMUX_PIN(89,    27),$/;"	e	enum:iomux_pins
MX31_PIN_SFS3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SFS3		= IOMUX_PIN(0xff, 144),$/;"	e	enum:iomux_pins
MX31_PIN_SFS4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SFS4		= IOMUX_PIN(0xff, 140),$/;"	e	enum:iomux_pins
MX31_PIN_SFS5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SFS5		= IOMUX_PIN(0xff, 136),$/;"	e	enum:iomux_pins
MX31_PIN_SFS6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SFS6		= IOMUX_PIN(26,   132),$/;"	e	enum:iomux_pins
MX31_PIN_SIMPD0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SIMPD0		= IOMUX_PIN(35,   309),$/;"	e	enum:iomux_pins
MX31_PIN_SJC_MOD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SJC_MOD	= IOMUX_PIN(0xff,  76),$/;"	e	enum:iomux_pins
MX31_PIN_SRST0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SRST0		= IOMUX_PIN(67,   313),$/;"	e	enum:iomux_pins
MX31_PIN_SRX0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SRX0		= IOMUX_PIN(34,   310),$/;"	e	enum:iomux_pins
MX31_PIN_SRXD3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SRXD3		= IOMUX_PIN(18,   146),$/;"	e	enum:iomux_pins
MX31_PIN_SRXD4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SRXD4		= IOMUX_PIN(20,   142),$/;"	e	enum:iomux_pins
MX31_PIN_SRXD5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SRXD5		= IOMUX_PIN(22,   138),$/;"	e	enum:iomux_pins
MX31_PIN_SRXD6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SRXD6		= IOMUX_PIN(24,   134),$/;"	e	enum:iomux_pins
MX31_PIN_STX0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_STX0		= IOMUX_PIN(33,   311),$/;"	e	enum:iomux_pins
MX31_PIN_STXD3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_STXD3		= IOMUX_PIN(17,   147),$/;"	e	enum:iomux_pins
MX31_PIN_STXD4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_STXD4		= IOMUX_PIN(19,   143),$/;"	e	enum:iomux_pins
MX31_PIN_STXD5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_STXD5		= IOMUX_PIN(21,   139),$/;"	e	enum:iomux_pins
MX31_PIN_STXD6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_STXD6		= IOMUX_PIN(23,   135),$/;"	e	enum:iomux_pins
MX31_PIN_SVEN0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_SVEN0		= IOMUX_PIN(32,   312),$/;"	e	enum:iomux_pins
MX31_PIN_TCK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TCK		= IOMUX_PIN(0xff,  82),$/;"	e	enum:iomux_pins
MX31_PIN_TDI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TDI		= IOMUX_PIN(0xff,  80),$/;"	e	enum:iomux_pins
MX31_PIN_TDO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TDO		= IOMUX_PIN(0xff,  79),$/;"	e	enum:iomux_pins
MX31_PIN_TMS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TMS		= IOMUX_PIN(0xff,  81),$/;"	e	enum:iomux_pins
MX31_PIN_TRSTB	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TRSTB		= IOMUX_PIN(0xff,  78),$/;"	e	enum:iomux_pins
MX31_PIN_TTM_PAD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TTM_PAD	= IOMUX_PIN(0xff,   0),$/;"	e	enum:iomux_pins
MX31_PIN_TXD1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TXD1		= IOMUX_PIN(37,   116),$/;"	e	enum:iomux_pins
MX31_PIN_TXD2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_TXD2		= IOMUX_PIN(28,   103),$/;"	e	enum:iomux_pins
MX31_PIN_USBH2_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBH2_CLK	= IOMUX_PIN(0xff,  60),$/;"	e	enum:iomux_pins
MX31_PIN_USBH2_DATA0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBH2_DATA0	= IOMUX_PIN(0xff,  56),$/;"	e	enum:iomux_pins
MX31_PIN_USBH2_DATA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBH2_DATA1	= IOMUX_PIN(0xff,  55),$/;"	e	enum:iomux_pins
MX31_PIN_USBH2_DIR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBH2_DIR	= IOMUX_PIN(0xff,  59),$/;"	e	enum:iomux_pins
MX31_PIN_USBH2_NXT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBH2_NXT	= IOMUX_PIN(0xff,  57),$/;"	e	enum:iomux_pins
MX31_PIN_USBH2_STP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBH2_STP	= IOMUX_PIN(0xff,  58),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_CLK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_CLK	= IOMUX_PIN(0xff,  72),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA0	= IOMUX_PIN(0xff,  68),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA1	= IOMUX_PIN(0xff,  67),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA2	= IOMUX_PIN(0xff,  66),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA3	= IOMUX_PIN(0xff,  65),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA4	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA4	= IOMUX_PIN(0xff,  64),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA5	= IOMUX_PIN(0xff,  63),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA6	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA6	= IOMUX_PIN(0xff,  62),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DATA7	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DATA7	= IOMUX_PIN(0xff,  61),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_DIR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_DIR	= IOMUX_PIN(0xff,  71),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_NXT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_NXT	= IOMUX_PIN(0xff,  69),$/;"	e	enum:iomux_pins
MX31_PIN_USBOTG_STP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USBOTG_STP	= IOMUX_PIN(0xff,  70),$/;"	e	enum:iomux_pins
MX31_PIN_USB_BYP	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USB_BYP	= IOMUX_PIN(31,    73),$/;"	e	enum:iomux_pins
MX31_PIN_USB_OC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USB_OC		= IOMUX_PIN(30,    74),$/;"	e	enum:iomux_pins
MX31_PIN_USB_PWR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_USB_PWR	= IOMUX_PIN(29,    75),$/;"	e	enum:iomux_pins
MX31_PIN_VPG0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_VPG0		= IOMUX_PIN(0xff, 294),$/;"	e	enum:iomux_pins
MX31_PIN_VPG1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_VPG1		= IOMUX_PIN(0xff, 293),$/;"	e	enum:iomux_pins
MX31_PIN_VSTBY	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_VSTBY		= IOMUX_PIN(0xff, 297),$/;"	e	enum:iomux_pins
MX31_PIN_VSYNC0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_VSYNC0		= IOMUX_PIN(0xff,  36),$/;"	e	enum:iomux_pins
MX31_PIN_VSYNC3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_VSYNC3		= IOMUX_PIN(0xff,  23),$/;"	e	enum:iomux_pins
MX31_PIN_WATCHDOG_RST	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_WATCHDOG_RST	= IOMUX_PIN(0xff, 325),$/;"	e	enum:iomux_pins
MX31_PIN_WRITE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	MX31_PIN_WRITE		= IOMUX_PIN(0xff,  25),$/;"	e	enum:iomux_pins
MX35_H1_IPPUE_DOWN_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_IPPUE_DOWN_BIT	/;"	d	file:
MX35_H1_IPPUE_UP_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_IPPUE_UP_BIT	/;"	d	file:
MX35_H1_OCPOL_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_OCPOL_BIT	/;"	d	file:
MX35_H1_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_PM_BIT	/;"	d	file:
MX35_H1_PP_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_PP_BIT	/;"	d	file:
MX35_H1_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_SIC_MASK	/;"	d	file:
MX35_H1_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_SIC_SHIFT	/;"	d	file:
MX35_H1_TLL_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_TLL_BIT	/;"	d	file:
MX35_H1_USBTE_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_H1_USBTE_BIT	/;"	d	file:
MX35_OTG_OCPOL_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_OTG_OCPOL_BIT	/;"	d	file:
MX35_OTG_PM_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_OTG_PM_BIT	/;"	d	file:
MX35_OTG_PP_BIT	drivers/usb/host/ehci-mxc.c	/^#define MX35_OTG_PP_BIT	/;"	d	file:
MX35_OTG_SIC_MASK	drivers/usb/host/ehci-mxc.c	/^#define MX35_OTG_SIC_MASK	/;"	d	file:
MX35_OTG_SIC_SHIFT	drivers/usb/host/ehci-mxc.c	/^#define MX35_OTG_SIC_SHIFT	/;"	d	file:
MX35_PAD_A0__EMI_EIM_DA_L_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A0__EMI_EIM_DA_L_0				= IOMUX_PAD(0x368, 0x028, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A10__EMI_EIM_DA_H_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A10__EMI_EIM_DA_H_10				= IOMUX_PAD(0x390, 0x050, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A11__EMI_EIM_DA_H_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A11__EMI_EIM_DA_H_11				= IOMUX_PAD(0x398, 0x058, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A12__EMI_EIM_DA_H_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A12__EMI_EIM_DA_H_12				= IOMUX_PAD(0x39c, 0x05c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A13__EMI_EIM_DA_H_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A13__EMI_EIM_DA_H_13				= IOMUX_PAD(0x3a0, 0x060, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A14__EMI_EIM_DA_H2_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A14__EMI_EIM_DA_H2_14				= IOMUX_PAD(0x3a4, 0x064, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A15__EMI_EIM_DA_H2_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A15__EMI_EIM_DA_H2_15				= IOMUX_PAD(0x3a8, 0x068, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A16__EMI_EIM_A_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A16__EMI_EIM_A_16				= IOMUX_PAD(0x3ac, 0x06c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A17__EMI_EIM_A_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A17__EMI_EIM_A_17				= IOMUX_PAD(0x3b0, 0x070, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A18__EMI_EIM_A_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A18__EMI_EIM_A_18				= IOMUX_PAD(0x3b4, 0x074, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A19__EMI_EIM_A_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A19__EMI_EIM_A_19				= IOMUX_PAD(0x3b8, 0x078, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A1__EMI_EIM_DA_L_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A1__EMI_EIM_DA_L_1				= IOMUX_PAD(0x36c, 0x02c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A20__EMI_EIM_A_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A20__EMI_EIM_A_20				= IOMUX_PAD(0x3bc, 0x07c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A21__EMI_EIM_A_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A21__EMI_EIM_A_21				= IOMUX_PAD(0x3c0, 0x080, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A22__EMI_EIM_A_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A22__EMI_EIM_A_22				= IOMUX_PAD(0x3c4, 0x084, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A23__EMI_EIM_A_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A23__EMI_EIM_A_23				= IOMUX_PAD(0x3c8, 0x088, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A24__EMI_EIM_A_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A24__EMI_EIM_A_24				= IOMUX_PAD(0x3cc, 0x08c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A25__EMI_EIM_A_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A25__EMI_EIM_A_25				= IOMUX_PAD(0x3d0, 0x090, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A2__EMI_EIM_DA_L_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A2__EMI_EIM_DA_L_2				= IOMUX_PAD(0x370, 0x030, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A3__EMI_EIM_DA_L_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A3__EMI_EIM_DA_L_3				= IOMUX_PAD(0x374, 0x034, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A4__EMI_EIM_DA_L_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A4__EMI_EIM_DA_L_4				= IOMUX_PAD(0x378, 0x038, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A5__EMI_EIM_DA_L_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A5__EMI_EIM_DA_L_5				= IOMUX_PAD(0x37c, 0x03c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A6__EMI_EIM_DA_L_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A6__EMI_EIM_DA_L_6				= IOMUX_PAD(0x380, 0x040, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A7__EMI_EIM_DA_L_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A7__EMI_EIM_DA_L_7				= IOMUX_PAD(0x384, 0x044, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A8__EMI_EIM_DA_H_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A8__EMI_EIM_DA_H_8				= IOMUX_PAD(0x388, 0x048, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_A9__EMI_EIM_DA_H_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_A9__EMI_EIM_DA_H_9				= IOMUX_PAD(0x38c, 0x04c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_BUFF_EN__ATA_BUFFER_EN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_BUFF_EN__ATA_BUFFER_EN			= IOMUX_PAD(0x724, 0x2c0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_BUFF_EN__GPIO2_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_BUFF_EN__GPIO2_30				= IOMUX_PAD(0x724, 0x2c0, 5, 0x8c4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_BUFF_EN__IPU_CSI_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_BUFF_EN__IPU_CSI_D_3			= IOMUX_PAD(0x724, 0x2c0, 1, 0x93c, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_BUFF_EN__IPU_DIAGB_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_BUFF_EN__IPU_DIAGB_24			= IOMUX_PAD(0x724, 0x2c0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_BUFF_EN__KPP_ROW_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_BUFF_EN__KPP_ROW_3				= IOMUX_PAD(0x724, 0x2c0, 3, 0x97c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS0__ARM11P_TOP_MAX1_HMASTER_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS0__ARM11P_TOP_MAX1_HMASTER_0		= IOMUX_PAD(0x6c4, 0x260, 7, 0x0,   0, NO_PAD_CTRL/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS0__ATA_CS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS0__ATA_CS0				= IOMUX_PAD(0x6c4, 0x260, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS0__CSPI1_SS3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS0__CSPI1_SS3				= IOMUX_PAD(0x6c4, 0x260, 1, 0x7dc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS0__GPIO2_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS0__GPIO2_6				= IOMUX_PAD(0x6c4, 0x260, 5, 0x8d8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS0__IPU_DIAGB_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS0__IPU_DIAGB_0				= IOMUX_PAD(0x6c4, 0x260, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS0__IPU_DISPB_CS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS0__IPU_DISPB_CS1				= IOMUX_PAD(0x6c4, 0x260, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS1__ARM11P_TOP_MAX1_HMASTER_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS1__ARM11P_TOP_MAX1_HMASTER_1		= IOMUX_PAD(0x6c8, 0x264, 7, 0x0,   0, NO_PAD_CTRL/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS1__ATA_CS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS1__ATA_CS1				= IOMUX_PAD(0x6c8, 0x264, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS1__CSPI2_SS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS1__CSPI2_SS0				= IOMUX_PAD(0x6c8, 0x264, 4, 0x7f0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS1__GPIO2_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS1__GPIO2_7				= IOMUX_PAD(0x6c8, 0x264, 5, 0x8dc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS1__IPU_DIAGB_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS1__IPU_DIAGB_1				= IOMUX_PAD(0x6c8, 0x264, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_CS1__IPU_DISPB_CS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_CS1__IPU_DISPB_CS2				= IOMUX_PAD(0x6c8, 0x264, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA0__ATA_DA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA0__ATA_DA_0				= IOMUX_PAD(0x72c, 0x2c8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA0__ECT_CTI_TRIG_IN1_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA0__ECT_CTI_TRIG_IN1_5			= IOMUX_PAD(0x72c, 0x2c8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA0__GPIO3_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA0__GPIO3_0				= IOMUX_PAD(0x72c, 0x2c8, 5, 0x8e8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA0__IPU_CSI_D_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA0__IPU_CSI_D_5				= IOMUX_PAD(0x72c, 0x2c8, 1, 0x944, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA0__IPU_DIAGB_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA0__IPU_DIAGB_26				= IOMUX_PAD(0x72c, 0x2c8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA0__KPP_COL_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA0__KPP_COL_1				= IOMUX_PAD(0x72c, 0x2c8, 3, 0x954, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA1__ATA_DA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA1__ATA_DA_1				= IOMUX_PAD(0x730, 0x2cc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA1__ECT_CTI_TRIG_IN1_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA1__ECT_CTI_TRIG_IN1_6			= IOMUX_PAD(0x730, 0x2cc, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA1__GPIO3_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA1__GPIO3_1				= IOMUX_PAD(0x730, 0x2cc, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA1__IPU_CSI_D_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA1__IPU_CSI_D_6				= IOMUX_PAD(0x730, 0x2cc, 1, 0x948, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA1__IPU_DIAGB_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA1__IPU_DIAGB_27				= IOMUX_PAD(0x730, 0x2cc, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA1__KPP_COL_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA1__KPP_COL_2				= IOMUX_PAD(0x730, 0x2cc, 3, 0x958, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA2__ATA_DA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA2__ATA_DA_2				= IOMUX_PAD(0x734, 0x2d0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA2__ECT_CTI_TRIG_IN1_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA2__ECT_CTI_TRIG_IN1_7			= IOMUX_PAD(0x734, 0x2d0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA2__GPIO3_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA2__GPIO3_2				= IOMUX_PAD(0x734, 0x2d0, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA2__IPU_CSI_D_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA2__IPU_CSI_D_7				= IOMUX_PAD(0x734, 0x2d0, 1, 0x94c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA2__IPU_DIAGB_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA2__IPU_DIAGB_28				= IOMUX_PAD(0x734, 0x2d0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DA2__KPP_COL_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DA2__KPP_COL_3				= IOMUX_PAD(0x734, 0x2d0, 3, 0x95c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__ARM11P_TOP_MAX0_HMASTER_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__ARM11P_TOP_MAX0_HMASTER_3		= IOMUX_PAD(0x6e0, 0x27c, 7, 0x0,   0, NO_PAD_CT/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__ATA_DATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__ATA_DATA_0				= IOMUX_PAD(0x6e0, 0x27c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__ESDHC2_DAT5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__ESDHC2_DAT5				= IOMUX_PAD(0x6e0, 0x27c, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__ESDHC3_DAT5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__ESDHC3_DAT5				= IOMUX_PAD(0x6e0, 0x27c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__GPIO2_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__GPIO2_13				= IOMUX_PAD(0x6e0, 0x27c, 5, 0x878, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__IPU_DIAGB_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__IPU_DIAGB_7				= IOMUX_PAD(0x6e0, 0x27c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__IPU_DISPB_D12_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__IPU_DISPB_D12_VSYNC			= IOMUX_PAD(0x6e0, 0x27c, 3, 0x928, 4, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA0__USB_TOP_USBOTG_DATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA0__USB_TOP_USBOTG_DATA_2		= IOMUX_PAD(0x6e0, 0x27c, 2, 0x9ac, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA10__ATA_DATA_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA10__ATA_DATA_10			= IOMUX_PAD(0x708, 0x2a4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA10__AUDMUX_AUD6_RXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA10__AUDMUX_AUD6_RXC			= IOMUX_PAD(0x708, 0x2a4, 3, 0x7b8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA10__GPIO2_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA10__GPIO2_23				= IOMUX_PAD(0x708, 0x2a4, 5, 0x8a4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA10__IPU_DIAGB_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA10__IPU_DIAGB_17			= IOMUX_PAD(0x708, 0x2a4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA10__UART3_RXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA10__UART3_RXD_MUX			= IOMUX_PAD(0x708, 0x2a4, 1, 0x9a0, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA11__ATA_DATA_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA11__ATA_DATA_11			= IOMUX_PAD(0x70c, 0x2a8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA11__AUDMUX_AUD6_RXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA11__AUDMUX_AUD6_RXFS			= IOMUX_PAD(0x70c, 0x2a8, 3, 0x7bc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA11__GPIO2_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA11__GPIO2_24				= IOMUX_PAD(0x70c, 0x2a8, 5, 0x8a8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA11__IPU_DIAGB_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA11__IPU_DIAGB_18			= IOMUX_PAD(0x70c, 0x2a8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA11__UART3_TXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA11__UART3_TXD_MUX			= IOMUX_PAD(0x70c, 0x2a8, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA12__ATA_DATA_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA12__ATA_DATA_12			= IOMUX_PAD(0x710, 0x2ac, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA12__GPIO2_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA12__GPIO2_25				= IOMUX_PAD(0x710, 0x2ac, 5, 0x8ac, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA12__I2C3_SCL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA12__I2C3_SCL				= IOMUX_PAD(0x710, 0x2ac, 1, 0x91c, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA12__IPU_DIAGB_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA12__IPU_DIAGB_19			= IOMUX_PAD(0x710, 0x2ac, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA13__ATA_DATA_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA13__ATA_DATA_13			= IOMUX_PAD(0x714, 0x2b0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA13__GPIO2_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA13__GPIO2_26				= IOMUX_PAD(0x714, 0x2b0, 5, 0x8b0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA13__I2C3_SDA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA13__I2C3_SDA				= IOMUX_PAD(0x714, 0x2b0, 1, 0x920, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA13__IPU_DIAGB_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA13__IPU_DIAGB_20			= IOMUX_PAD(0x714, 0x2b0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA14__ATA_DATA_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA14__ATA_DATA_14			= IOMUX_PAD(0x718, 0x2b4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA14__GPIO2_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA14__GPIO2_27				= IOMUX_PAD(0x718, 0x2b4, 5, 0x8b4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA14__IPU_CSI_D_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA14__IPU_CSI_D_0			= IOMUX_PAD(0x718, 0x2b4, 1, 0x930, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA14__IPU_DIAGB_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA14__IPU_DIAGB_21			= IOMUX_PAD(0x718, 0x2b4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA14__KPP_ROW_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA14__KPP_ROW_0				= IOMUX_PAD(0x718, 0x2b4, 3, 0x970, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA15__ATA_DATA_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA15__ATA_DATA_15			= IOMUX_PAD(0x71c, 0x2b8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA15__GPIO2_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA15__GPIO2_28				= IOMUX_PAD(0x71c, 0x2b8, 5, 0x8b8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA15__IPU_CSI_D_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA15__IPU_CSI_D_1			= IOMUX_PAD(0x71c, 0x2b8, 1, 0x934, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA15__IPU_DIAGB_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA15__IPU_DIAGB_22			= IOMUX_PAD(0x71c, 0x2b8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA15__KPP_ROW_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA15__KPP_ROW_1				= IOMUX_PAD(0x71c, 0x2b8, 3, 0x974, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__ARM11P_TOP_TRACE_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__ARM11P_TOP_TRACE_27			= IOMUX_PAD(0x6e4, 0x280, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__ATA_DATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__ATA_DATA_1				= IOMUX_PAD(0x6e4, 0x280, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__ESDHC2_DAT6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__ESDHC2_DAT6				= IOMUX_PAD(0x6e4, 0x280, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__ESDHC3_DAT6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__ESDHC3_DAT6				= IOMUX_PAD(0x6e4, 0x280, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__GPIO2_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__GPIO2_14				= IOMUX_PAD(0x6e4, 0x280, 5, 0x87c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__IPU_DIAGB_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__IPU_DIAGB_8				= IOMUX_PAD(0x6e4, 0x280, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__IPU_DISPB_SD_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__IPU_DISPB_SD_CLK			= IOMUX_PAD(0x6e4, 0x280, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA1__USB_TOP_USBOTG_DATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA1__USB_TOP_USBOTG_DATA_3		= IOMUX_PAD(0x6e4, 0x280, 2, 0x9b0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__ARM11P_TOP_TRACE_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__ARM11P_TOP_TRACE_28			= IOMUX_PAD(0x6e8, 0x284, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__ATA_DATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__ATA_DATA_2				= IOMUX_PAD(0x6e8, 0x284, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__ESDHC2_DAT7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__ESDHC2_DAT7				= IOMUX_PAD(0x6e8, 0x284, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__ESDHC3_DAT7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__ESDHC3_DAT7				= IOMUX_PAD(0x6e8, 0x284, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__GPIO2_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__GPIO2_15				= IOMUX_PAD(0x6e8, 0x284, 5, 0x880, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__IPU_DIAGB_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__IPU_DIAGB_9				= IOMUX_PAD(0x6e8, 0x284, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__IPU_DISPB_SER_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__IPU_DISPB_SER_RS			= IOMUX_PAD(0x6e8, 0x284, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA2__USB_TOP_USBOTG_DATA_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA2__USB_TOP_USBOTG_DATA_4		= IOMUX_PAD(0x6e8, 0x284, 2, 0x9b4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__ARM11P_TOP_TRACE_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__ARM11P_TOP_TRACE_29			= IOMUX_PAD(0x6ec, 0x288, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__ATA_DATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__ATA_DATA_3				= IOMUX_PAD(0x6ec, 0x288, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__CSPI2_SCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__CSPI2_SCLK				= IOMUX_PAD(0x6ec, 0x288, 4, 0x7e0, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__ESDHC3_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__ESDHC3_CLK				= IOMUX_PAD(0x6ec, 0x288, 1, 0x814, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__GPIO2_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__GPIO2_16				= IOMUX_PAD(0x6ec, 0x288, 5, 0x884, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__IPU_DIAGB_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__IPU_DIAGB_10			= IOMUX_PAD(0x6ec, 0x288, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA3__USB_TOP_USBOTG_DATA_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA3__USB_TOP_USBOTG_DATA_5		= IOMUX_PAD(0x6ec, 0x288, 2, 0x9b8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA4__ARM11P_TOP_TRACE_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA4__ARM11P_TOP_TRACE_30			= IOMUX_PAD(0x6f0, 0x28c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA4__ATA_DATA_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA4__ATA_DATA_4				= IOMUX_PAD(0x6f0, 0x28c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA4__ESDHC3_CMD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA4__ESDHC3_CMD				= IOMUX_PAD(0x6f0, 0x28c, 1, 0x818, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA4__GPIO2_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA4__GPIO2_17				= IOMUX_PAD(0x6f0, 0x28c, 5, 0x888, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA4__IPU_DIAGB_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA4__IPU_DIAGB_11			= IOMUX_PAD(0x6f0, 0x28c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA4__USB_TOP_USBOTG_DATA_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA4__USB_TOP_USBOTG_DATA_6		= IOMUX_PAD(0x6f0, 0x28c, 2, 0x9bc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA5__ARM11P_TOP_TRACE_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA5__ARM11P_TOP_TRACE_31			= IOMUX_PAD(0x6f4, 0x290, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA5__ATA_DATA_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA5__ATA_DATA_5				= IOMUX_PAD(0x6f4, 0x290, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA5__GPIO2_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA5__GPIO2_18				= IOMUX_PAD(0x6f4, 0x290, 5, 0x88c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA5__IPU_DIAGB_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA5__IPU_DIAGB_12			= IOMUX_PAD(0x6f4, 0x290, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA5__USB_TOP_USBOTG_DATA_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA5__USB_TOP_USBOTG_DATA_7		= IOMUX_PAD(0x6f4, 0x290, 2, 0x9c0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA6__ATA_DATA_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA6__ATA_DATA_6				= IOMUX_PAD(0x6f8, 0x294, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA6__AUDMUX_AUD6_TXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA6__AUDMUX_AUD6_TXD			= IOMUX_PAD(0x6f8, 0x294, 3, 0x7b4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA6__CAN1_TXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA6__CAN1_TXCAN				= IOMUX_PAD(0x6f8, 0x294, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA6__GPIO2_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA6__GPIO2_19				= IOMUX_PAD(0x6f8, 0x294, 5, 0x890, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA6__IPU_DIAGB_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA6__IPU_DIAGB_13			= IOMUX_PAD(0x6f8, 0x294, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA6__UART1_DTR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA6__UART1_DTR				= IOMUX_PAD(0x6f8, 0x294, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA7__ATA_DATA_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA7__ATA_DATA_7				= IOMUX_PAD(0x6fc, 0x298, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA7__AUDMUX_AUD6_RXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA7__AUDMUX_AUD6_RXD			= IOMUX_PAD(0x6fc, 0x298, 3, 0x7b0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA7__CAN1_RXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA7__CAN1_RXCAN				= IOMUX_PAD(0x6fc, 0x298, 1, 0x7c8, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA7__GPIO2_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA7__GPIO2_20				= IOMUX_PAD(0x6fc, 0x298, 5, 0x898, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA7__IPU_DIAGB_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA7__IPU_DIAGB_14			= IOMUX_PAD(0x6fc, 0x298, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA7__UART1_DSR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA7__UART1_DSR				= IOMUX_PAD(0x6fc, 0x298, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA8__ATA_DATA_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA8__ATA_DATA_8				= IOMUX_PAD(0x700, 0x29c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA8__AUDMUX_AUD6_TXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA8__AUDMUX_AUD6_TXC			= IOMUX_PAD(0x700, 0x29c, 3, 0x7c0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA8__GPIO2_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA8__GPIO2_21				= IOMUX_PAD(0x700, 0x29c, 5, 0x89c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA8__IPU_DIAGB_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA8__IPU_DIAGB_15			= IOMUX_PAD(0x700, 0x29c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA8__UART1_RI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA8__UART1_RI				= IOMUX_PAD(0x700, 0x29c, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA8__UART3_RTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA8__UART3_RTS				= IOMUX_PAD(0x700, 0x29c, 1, 0x99c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA9__ATA_DATA_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA9__ATA_DATA_9				= IOMUX_PAD(0x704, 0x2a0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA9__AUDMUX_AUD6_TXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA9__AUDMUX_AUD6_TXFS			= IOMUX_PAD(0x704, 0x2a0, 3, 0x7c4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA9__GPIO2_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA9__GPIO2_22				= IOMUX_PAD(0x704, 0x2a0, 5, 0x8a0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA9__IPU_DIAGB_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA9__IPU_DIAGB_16			= IOMUX_PAD(0x704, 0x2a0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA9__UART1_DCD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA9__UART1_DCD				= IOMUX_PAD(0x704, 0x2a0, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DATA9__UART3_CTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DATA9__UART3_CTS				= IOMUX_PAD(0x704, 0x2a0, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__ARM11P_TOP_MAX1_HMASTER_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__ARM11P_TOP_MAX1_HMASTER_2		= IOMUX_PAD(0x6cc, 0x268, 7, 0x0,   0, NO_PAD_CTR/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__ATA_DIOR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__ATA_DIOR				= IOMUX_PAD(0x6cc, 0x268, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__CSPI2_SS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__CSPI2_SS1				= IOMUX_PAD(0x6cc, 0x268, 4, 0x7f4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__ESDHC3_DAT0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__ESDHC3_DAT0				= IOMUX_PAD(0x6cc, 0x268, 1, 0x81c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__GPIO2_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__GPIO2_8				= IOMUX_PAD(0x6cc, 0x268, 5, 0x8e0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__IPU_DIAGB_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__IPU_DIAGB_2				= IOMUX_PAD(0x6cc, 0x268, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__IPU_DISPB_BE0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__IPU_DISPB_BE0			= IOMUX_PAD(0x6cc, 0x268, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOR__USB_TOP_USBOTG_DIR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOR__USB_TOP_USBOTG_DIR			= IOMUX_PAD(0x6cc, 0x268, 2, 0x9c4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__ARM11P_TOP_MAX1_HMASTER_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__ARM11P_TOP_MAX1_HMASTER_3		= IOMUX_PAD(0x6d0, 0x26c, 7, 0x0,   0, NO_PAD_CTR/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__ATA_DIOW	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__ATA_DIOW				= IOMUX_PAD(0x6d0, 0x26c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__CSPI2_MOSI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__CSPI2_MOSI				= IOMUX_PAD(0x6d0, 0x26c, 4, 0x7ec, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__ESDHC3_DAT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__ESDHC3_DAT1				= IOMUX_PAD(0x6d0, 0x26c, 1, 0x820, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__GPIO2_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__GPIO2_9				= IOMUX_PAD(0x6d0, 0x26c, 5, 0x8e4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__IPU_DIAGB_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__IPU_DIAGB_3				= IOMUX_PAD(0x6d0, 0x26c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__IPU_DISPB_BE1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__IPU_DISPB_BE1			= IOMUX_PAD(0x6d0, 0x26c, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DIOW__USB_TOP_USBOTG_STP	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DIOW__USB_TOP_USBOTG_STP			= IOMUX_PAD(0x6d0, 0x26c, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__ARM11P_TOP_MAX0_HMASTER_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__ARM11P_TOP_MAX0_HMASTER_0		= IOMUX_PAD(0x6d4, 0x270, 7, 0x0,   0, NO_PAD_CT/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__ATA_DMACK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__ATA_DMACK				= IOMUX_PAD(0x6d4, 0x270, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__CSPI2_MISO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__CSPI2_MISO				= IOMUX_PAD(0x6d4, 0x270, 4, 0x7e8, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__ESDHC3_DAT2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__ESDHC3_DAT2				= IOMUX_PAD(0x6d4, 0x270, 1, 0x824, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__GPIO2_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__GPIO2_10				= IOMUX_PAD(0x6d4, 0x270, 5, 0x86c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__IPU_DIAGB_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__IPU_DIAGB_4				= IOMUX_PAD(0x6d4, 0x270, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMACK__USB_TOP_USBOTG_NXT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMACK__USB_TOP_USBOTG_NXT			= IOMUX_PAD(0x6d4, 0x270, 2, 0x9c8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMARQ__ATA_DMARQ	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMARQ__ATA_DMARQ				= IOMUX_PAD(0x728, 0x2c4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMARQ__ECT_CTI_TRIG_IN1_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMARQ__ECT_CTI_TRIG_IN1_4			= IOMUX_PAD(0x728, 0x2c4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMARQ__GPIO2_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMARQ__GPIO2_31				= IOMUX_PAD(0x728, 0x2c4, 5, 0x8c8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMARQ__IPU_CSI_D_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMARQ__IPU_CSI_D_4				= IOMUX_PAD(0x728, 0x2c4, 1, 0x940, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMARQ__IPU_DIAGB_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMARQ__IPU_DIAGB_25			= IOMUX_PAD(0x728, 0x2c4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_DMARQ__KPP_COL_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_DMARQ__KPP_COL_0				= IOMUX_PAD(0x728, 0x2c4, 3, 0x950, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_INTRQ__ATA_INTRQ	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_INTRQ__ATA_INTRQ				= IOMUX_PAD(0x720, 0x2bc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_INTRQ__GPIO2_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_INTRQ__GPIO2_29				= IOMUX_PAD(0x720, 0x2bc, 5, 0x8bc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_INTRQ__IPU_CSI_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_INTRQ__IPU_CSI_D_2				= IOMUX_PAD(0x720, 0x2bc, 1, 0x938, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_INTRQ__IPU_DIAGB_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_INTRQ__IPU_DIAGB_23			= IOMUX_PAD(0x720, 0x2bc, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_INTRQ__KPP_ROW_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_INTRQ__KPP_ROW_2				= IOMUX_PAD(0x720, 0x2bc, 3, 0x978, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__ARM11P_TOP_MAX0_HMASTER_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__ARM11P_TOP_MAX0_HMASTER_2		= IOMUX_PAD(0x6dc, 0x278, 7, 0x0,   0, NO_PAD_CT/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__ATA_IORDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__ATA_IORDY				= IOMUX_PAD(0x6dc, 0x278, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__ESDHC2_DAT4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__ESDHC2_DAT4				= IOMUX_PAD(0x6dc, 0x278, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__ESDHC3_DAT4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__ESDHC3_DAT4				= IOMUX_PAD(0x6dc, 0x278, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__GPIO2_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__GPIO2_12				= IOMUX_PAD(0x6dc, 0x278, 5, 0x874, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__IPU_DIAGB_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__IPU_DIAGB_6				= IOMUX_PAD(0x6dc, 0x278, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__IPU_DISPB_SD_D_IO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__IPU_DISPB_SD_D_IO			= IOMUX_PAD(0x6dc, 0x278, 3, 0x92c, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_IORDY__USB_TOP_USBOTG_DATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_IORDY__USB_TOP_USBOTG_DATA_1		= IOMUX_PAD(0x6dc, 0x278, 2, 0x9a8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__ARM11P_TOP_MAX0_HMASTER_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__ARM11P_TOP_MAX0_HMASTER_1		= IOMUX_PAD(0x6d8, 0x274, 7, 0x0,   0, NO_PAD_/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__ATA_RESET_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__ATA_RESET_B			= IOMUX_PAD(0x6d8, 0x274, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__CSPI2_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__CSPI2_RDY				= IOMUX_PAD(0x6d8, 0x274, 4, 0x7e4, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__ESDHC3_DAT3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__ESDHC3_DAT3			= IOMUX_PAD(0x6d8, 0x274, 1, 0x828, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__GPIO2_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__GPIO2_11				= IOMUX_PAD(0x6d8, 0x274, 5, 0x870, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__IPU_DIAGB_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__IPU_DIAGB_5			= IOMUX_PAD(0x6d8, 0x274, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__IPU_DISPB_SD_D_O	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__IPU_DISPB_SD_D_O			= IOMUX_PAD(0x6d8, 0x274, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ATA_RESET_B__USB_TOP_USBOTG_DATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ATA_RESET_B__USB_TOP_USBOTG_DATA_0		= IOMUX_PAD(0x6d8, 0x274, 2, 0x9a4, 1, NO_PAD_CTRL/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_BCLK__EMI_EIM_BCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_BCLK__EMI_EIM_BCLK				= IOMUX_PAD(0x49c, 0x0c0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_BOOT_MODE0__CCM_BOOT_MODE_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_BOOT_MODE0__CCM_BOOT_MODE_0			= IOMUX_PAD(0x350, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_BOOT_MODE1__CCM_BOOT_MODE_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_BOOT_MODE1__CCM_BOOT_MODE_1			= IOMUX_PAD(0x354, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAPTURE__CCM_CLK32K	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAPTURE__CCM_CLK32K				= IOMUX_PAD(0x328, 0x004, 4, 0x7d0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAPTURE__CSPI2_SS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAPTURE__CSPI2_SS1				= IOMUX_PAD(0x328, 0x004, 2, 0x7f4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAPTURE__EPIT1_EPITO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAPTURE__EPIT1_EPITO				= IOMUX_PAD(0x328, 0x004, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAPTURE__GPIO1_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAPTURE__GPIO1_4				= IOMUX_PAD(0x328, 0x004, 5, 0x850, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAPTURE__GPT_CAPIN1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAPTURE__GPT_CAPIN1				= IOMUX_PAD(0x328, 0x004, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAPTURE__GPT_CMPOUT2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAPTURE__GPT_CMPOUT2				= IOMUX_PAD(0x328, 0x004, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CAS__EMI_DRAM_CAS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CAS__EMI_DRAM_CAS				= IOMUX_PAD(0x4a8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CLKO__CCM_CLKO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CLKO__CCM_CLKO					= IOMUX_PAD(0x34c, 0x020, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CLKO__GPIO1_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CLKO__GPIO1_8					= IOMUX_PAD(0x34c, 0x020, 5, 0x860, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CLK_MODE0__CCM_CLK_MODE_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CLK_MODE0__CCM_CLK_MODE_0			= IOMUX_PAD(0x358, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CLK_MODE1__CCM_CLK_MODE_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CLK_MODE1__CCM_CLK_MODE_1			= IOMUX_PAD(0x35c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_COMPARE__EPIT2_EPITO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_COMPARE__EPIT2_EPITO				= IOMUX_PAD(0x32c, 0x008, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_COMPARE__GPIO1_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_COMPARE__GPIO1_5				= IOMUX_PAD(0x32c, 0x008, 5, 0x854, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_COMPARE__GPT_CAPIN2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_COMPARE__GPT_CAPIN2				= IOMUX_PAD(0x32c, 0x008, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_COMPARE__GPT_CMPOUT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_COMPARE__GPT_CMPOUT1				= IOMUX_PAD(0x32c, 0x008, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_COMPARE__GPT_CMPOUT3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_COMPARE__GPT_CMPOUT3				= IOMUX_PAD(0x32c, 0x008, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_COMPARE__SDMA_EXTDMA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_COMPARE__SDMA_EXTDMA_2				= IOMUX_PAD(0x32c, 0x008, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CONTRAST__ARM11P_TOP_TRACE_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CONTRAST__ARM11P_TOP_TRACE_18			= IOMUX_PAD(0x680, 0x21c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CONTRAST__GPIO1_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CONTRAST__GPIO1_1				= IOMUX_PAD(0x680, 0x21c, 5, 0x838, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CONTRAST__IPU_DISPB_CONTR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CONTRAST__IPU_DISPB_CONTR			= IOMUX_PAD(0x680, 0x21c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CONTRAST__SDMA_SDMA_DEBUG_CORE_STATUS_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CONTRAST__SDMA_SDMA_DEBUG_CORE_STATUS_2	= IOMUX_PAD(0x680, 0x21c, 6, 0x0,   0, NO_PAD_/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS0__EMI_EIM_CS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS0__EMI_EIM_CS0				= IOMUX_PAD(0x478, 0x0a0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS1__EMI_EIM_CS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS1__EMI_EIM_CS1				= IOMUX_PAD(0x47c, 0x0a4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS1__EMI_NANDF_CE3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS1__EMI_NANDF_CE3				= IOMUX_PAD(0x47c, 0x0a4, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS2__EMI_EIM_CS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS2__EMI_EIM_CS2				= IOMUX_PAD(0x480, 0x0a8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS3__EMI_EIM_CS3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS3__EMI_EIM_CS3				= IOMUX_PAD(0x484, 0x0ac, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS4__EMI_DTACK_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS4__EMI_DTACK_B				= IOMUX_PAD(0x488, 0x0b0, 1, 0x800, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS4__EMI_EIM_CS4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS4__EMI_EIM_CS4				= IOMUX_PAD(0x488, 0x0b0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS4__EMI_NANDF_CE1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS4__EMI_NANDF_CE1				= IOMUX_PAD(0x488, 0x0b0, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS4__GPIO1_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS4__GPIO1_20					= IOMUX_PAD(0x488, 0x0b0, 5, 0x83c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS5__CSPI1_SS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS5__CSPI1_SS2					= IOMUX_PAD(0x48c, 0x0b4, 2, 0x7d8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS5__CSPI2_SS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS5__CSPI2_SS2					= IOMUX_PAD(0x48c, 0x0b4, 1, 0x7f8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS5__EMI_EIM_CS5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS5__EMI_EIM_CS5				= IOMUX_PAD(0x48c, 0x0b4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS5__EMI_NANDF_CE2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS5__EMI_NANDF_CE2				= IOMUX_PAD(0x48c, 0x0b4, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CS5__GPIO1_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CS5__GPIO1_21					= IOMUX_PAD(0x48c, 0x0b4, 5, 0x840, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D10__ARM11P_TOP_EVNTBUS_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D10__ARM11P_TOP_EVNTBUS_15			= IOMUX_PAD(0x52c, 0x0e8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D10__GPIO1_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D10__GPIO1_22				= IOMUX_PAD(0x52c, 0x0e8, 5, 0x844, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D10__IPU_CSI_D_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D10__IPU_CSI_D_10				= IOMUX_PAD(0x52c, 0x0e8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D10__KPP_COL_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D10__KPP_COL_2				= IOMUX_PAD(0x52c, 0x0e8, 1, 0x958, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D11__GPIO1_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D11__GPIO1_23				= IOMUX_PAD(0x530, 0x0ec, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D11__IPU_CSI_D_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D11__IPU_CSI_D_11				= IOMUX_PAD(0x530, 0x0ec, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D11__KPP_COL_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D11__KPP_COL_3				= IOMUX_PAD(0x530, 0x0ec, 1, 0x95c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D12__GPIO1_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D12__GPIO1_24				= IOMUX_PAD(0x534, 0x0f0, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D12__IPU_CSI_D_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D12__IPU_CSI_D_12				= IOMUX_PAD(0x534, 0x0f0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D12__KPP_ROW_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D12__KPP_ROW_0				= IOMUX_PAD(0x534, 0x0f0, 1, 0x970, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D13__GPIO1_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D13__GPIO1_25				= IOMUX_PAD(0x538, 0x0f4, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D13__IPU_CSI_D_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D13__IPU_CSI_D_13				= IOMUX_PAD(0x538, 0x0f4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D13__KPP_ROW_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D13__KPP_ROW_1				= IOMUX_PAD(0x538, 0x0f4, 1, 0x974, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D14__GPIO1_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D14__GPIO1_26				= IOMUX_PAD(0x53c, 0x0f8, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D14__IPU_CSI_D_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D14__IPU_CSI_D_14				= IOMUX_PAD(0x53c, 0x0f8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D14__KPP_ROW_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D14__KPP_ROW_2				= IOMUX_PAD(0x53c, 0x0f8, 1, 0x978, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D15__GPIO1_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D15__GPIO1_27				= IOMUX_PAD(0x540, 0x0fc, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D15__IPU_CSI_D_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D15__IPU_CSI_D_15				= IOMUX_PAD(0x540, 0x0fc, 0, 0x97c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D15__KPP_ROW_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D15__KPP_ROW_3				= IOMUX_PAD(0x540, 0x0fc, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D8__ARM11P_TOP_EVNTBUS_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D8__ARM11P_TOP_EVNTBUS_13			= IOMUX_PAD(0x524, 0x0e0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D8__GPIO1_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D8__GPIO1_20				= IOMUX_PAD(0x524, 0x0e0, 5, 0x83c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D8__IPU_CSI_D_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D8__IPU_CSI_D_8				= IOMUX_PAD(0x524, 0x0e0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D8__KPP_COL_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D8__KPP_COL_0				= IOMUX_PAD(0x524, 0x0e0, 1, 0x950, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D9__ARM11P_TOP_EVNTBUS_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D9__ARM11P_TOP_EVNTBUS_14			= IOMUX_PAD(0x528, 0x0e4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D9__GPIO1_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D9__GPIO1_21				= IOMUX_PAD(0x528, 0x0e4, 5, 0x840, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D9__IPU_CSI_D_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D9__IPU_CSI_D_9				= IOMUX_PAD(0x528, 0x0e4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_D9__KPP_COL_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_D9__KPP_COL_1				= IOMUX_PAD(0x528, 0x0e4, 1, 0x954, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_HSYNC__GPIO1_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_HSYNC__GPIO1_30				= IOMUX_PAD(0x54c, 0x108, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC			= IOMUX_PAD(0x54c, 0x108, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_MCLK__GPIO1_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_MCLK__GPIO1_28				= IOMUX_PAD(0x544, 0x100, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_MCLK__IPU_CSI_MCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_MCLK__IPU_CSI_MCLK				= IOMUX_PAD(0x544, 0x100, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_PIXCLK__GPIO1_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_PIXCLK__GPIO1_31				= IOMUX_PAD(0x550, 0x10c, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK			= IOMUX_PAD(0x550, 0x10c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_VSYNC__GPIO1_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_VSYNC__GPIO1_29				= IOMUX_PAD(0x548, 0x104, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC			= IOMUX_PAD(0x548, 0x104, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_MISO__CSPI1_MISO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_MISO__CSPI1_MISO				= IOMUX_PAD(0x5b8, 0x174, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_MISO__ECT_CTI_TRIG_OUT1_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_MISO__ECT_CTI_TRIG_OUT1_3		= IOMUX_PAD(0x5b8, 0x174, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_MISO__GPIO1_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_MISO__GPIO1_17				= IOMUX_PAD(0x5b8, 0x174, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_MOSI__CSPI1_MOSI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_MOSI__CSPI1_MOSI				= IOMUX_PAD(0x5b4, 0x170, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_MOSI__ECT_CTI_TRIG_OUT1_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_MOSI__ECT_CTI_TRIG_OUT1_2		= IOMUX_PAD(0x5b4, 0x170, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_MOSI__GPIO1_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_MOSI__GPIO1_16				= IOMUX_PAD(0x5b4, 0x170, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SCLK__CSPI1_SCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SCLK__CSPI1_SCLK				= IOMUX_PAD(0x5c4, 0x180, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SCLK__EMI_M3IF_CHOSEN_MASTER_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SCLK__EMI_M3IF_CHOSEN_MASTER_1		= IOMUX_PAD(0x5c4, 0x180, 7, 0x0,   0, NO_PAD_CT/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SCLK__GPIO3_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SCLK__GPIO3_4				= IOMUX_PAD(0x5c4, 0x180, 5, 0x904, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SCLK__IPU_DIAGB_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SCLK__IPU_DIAGB_30			= IOMUX_PAD(0x5c4, 0x180, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY			= IOMUX_PAD(0x5c8, 0x184, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SPI_RDY__EMI_M3IF_CHOSEN_MASTER_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SPI_RDY__EMI_M3IF_CHOSEN_MASTER_2	= IOMUX_PAD(0x5c8, 0x184, 7, 0x0,   0, NO_PAD_/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SPI_RDY__GPIO3_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SPI_RDY__GPIO3_5				= IOMUX_PAD(0x5c8, 0x184, 5, 0x908, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SPI_RDY__IPU_DIAGB_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SPI_RDY__IPU_DIAGB_31			= IOMUX_PAD(0x5c8, 0x184, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS0__CSPI1_SS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS0__CSPI1_SS0				= IOMUX_PAD(0x5bc, 0x178, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS0__CSPI2_SS3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS0__CSPI2_SS3				= IOMUX_PAD(0x5bc, 0x178, 2, 0x7fc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS0__ECT_CTI_TRIG_OUT1_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS0__ECT_CTI_TRIG_OUT1_4			= IOMUX_PAD(0x5bc, 0x178, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS0__GPIO1_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS0__GPIO1_18				= IOMUX_PAD(0x5bc, 0x178, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS0__OWIRE_LINE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS0__OWIRE_LINE				= IOMUX_PAD(0x5bc, 0x178, 1, 0x990, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS1__CCM_CLK32K	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS1__CCM_CLK32K				= IOMUX_PAD(0x5c0, 0x17c, 2, 0x7d0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS1__CSPI1_SS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS1__CSPI1_SS1				= IOMUX_PAD(0x5c0, 0x17c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS1__ECT_CTI_TRIG_OUT1_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS1__ECT_CTI_TRIG_OUT1_5			= IOMUX_PAD(0x5c0, 0x17c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS1__GPIO1_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS1__GPIO1_19				= IOMUX_PAD(0x5c0, 0x17c, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS1__IPU_DIAGB_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS1__IPU_DIAGB_29			= IOMUX_PAD(0x5c0, 0x17c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CSPI1_SS1__PWM_PWMO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CSPI1_SS1__PWM_PWMO				= IOMUX_PAD(0x5c0, 0x17c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__ARM11P_TOP_EVNTBUS_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__ARM11P_TOP_EVNTBUS_19			= IOMUX_PAD(0x5d8, 0x194, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__CSPI2_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__CSPI2_RDY				= IOMUX_PAD(0x5d8, 0x194, 1, 0x7e4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__EMI_NANDF_CE2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__EMI_NANDF_CE2				= IOMUX_PAD(0x5d8, 0x194, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__GPIO3_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__GPIO3_9					= IOMUX_PAD(0x5d8, 0x194, 5, 0x918, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__I2C3_SDA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__I2C3_SDA					= IOMUX_PAD(0x5d8, 0x194, 2, 0x920, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__IPU_CSI_D_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__IPU_CSI_D_1				= IOMUX_PAD(0x5d8, 0x194, 3, 0x934, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__KPP_COL_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__KPP_COL_7				= IOMUX_PAD(0x5d8, 0x194, 4, 0x96c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS1__UART1_CTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS1__UART1_CTS				= IOMUX_PAD(0x5d8, 0x194, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__AUDMUX_AUD5_RXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__AUDMUX_AUD5_RXFS				= IOMUX_PAD(0x5e8, 0x1a4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__CAN2_TXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__CAN2_TXCAN				= IOMUX_PAD(0x5e8, 0x1a4, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__GPIO3_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__GPIO3_13					= IOMUX_PAD(0x5e8, 0x1a4, 5, 0x8f8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__IPU_CSI_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__IPU_CSI_D_3				= IOMUX_PAD(0x5e8, 0x1a4, 3, 0x93c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__KPP_ROW_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__KPP_ROW_7				= IOMUX_PAD(0x5e8, 0x1a4, 4, 0x98c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__SPDIF_SPDIF_OUT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__SPDIF_SPDIF_OUT1				= IOMUX_PAD(0x5e8, 0x1a4, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__UART2_CTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__UART2_CTS				= IOMUX_PAD(0x5e8, 0x1a4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_CTS2__UART3_TXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_CTS2__UART3_TXD_MUX				= IOMUX_PAD(0x5e8, 0x1a4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D0__EMI_EIM_D_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D0__EMI_EIM_D_0				= IOMUX_PAD(0x520, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D10__EMI_EIM_D_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D10__EMI_EIM_D_10				= IOMUX_PAD(0x4f8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D11__EMI_EIM_D_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D11__EMI_EIM_D_11				= IOMUX_PAD(0x4f4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D12__EMI_EIM_D_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D12__EMI_EIM_D_12				= IOMUX_PAD(0x4f0, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D13__EMI_EIM_D_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D13__EMI_EIM_D_13				= IOMUX_PAD(0x4ec, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D14__EMI_EIM_D_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D14__EMI_EIM_D_14				= IOMUX_PAD(0x4e8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D15__EMI_EIM_D_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D15__EMI_EIM_D_15				= IOMUX_PAD(0x4e4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D1__EMI_EIM_D_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D1__EMI_EIM_D_1				= IOMUX_PAD(0x51c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D2__EMI_EIM_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D2__EMI_EIM_D_2				= IOMUX_PAD(0x518, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_CLS__ARM11P_TOP_TRACE_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_CLS__ARM11P_TOP_TRACE_21			= IOMUX_PAD(0x68c, 0x228, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_CLS__GPIO1_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_CLS__GPIO1_4				= IOMUX_PAD(0x68c, 0x228, 5, 0x850, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_CLS__IPU_DISPB_CS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_CLS__IPU_DISPB_CS2				= IOMUX_PAD(0x68c, 0x228, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS			= IOMUX_PAD(0x68c, 0x228, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_CLS__SDMA_DEBUG_BUS_DEVICE_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_CLS__SDMA_DEBUG_BUS_DEVICE_0		= IOMUX_PAD(0x68c, 0x228, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_DRDY__ARM11P_TOP_TRACE_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_DRDY__ARM11P_TOP_TRACE_17			= IOMUX_PAD(0x67c, 0x218, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_DRDY__GPIO1_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_DRDY__GPIO1_0				= IOMUX_PAD(0x67c, 0x218, 5, 0x82c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY			= IOMUX_PAD(0x67c, 0x218, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_DRDY__IPU_DISPB_SD_D_O	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_DRDY__IPU_DISPB_SD_D_O			= IOMUX_PAD(0x67c, 0x218, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_DRDY__SDMA_SDMA_DEBUG_CORE_STATUS_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_DRDY__SDMA_SDMA_DEBUG_CORE_STATUS_1		= IOMUX_PAD(0x67c, 0x218, 6, 0x0,   0, NO_PAD_/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_FPSHIFT__ARM11P_TOP_TRACE_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_FPSHIFT__ARM11P_TOP_TRACE_16		= IOMUX_PAD(0x678, 0x214, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_FPSHIFT__GPIO3_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_FPSHIFT__GPIO3_31				= IOMUX_PAD(0x678, 0x214, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK			= IOMUX_PAD(0x678, 0x214, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_FPSHIFT__IPU_DISPB_SD_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_FPSHIFT__IPU_DISPB_SD_CLK			= IOMUX_PAD(0x678, 0x214, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_FPSHIFT__SDMA_SDMA_DEBUG_CORE_STATUS_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_FPSHIFT__SDMA_SDMA_DEBUG_CORE_STATUS_0	= IOMUX_PAD(0x678, 0x214, 6, 0x0,   0, NO_PA/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_HSYNC__ARM11P_TOP_TRACE_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_HSYNC__ARM11P_TOP_TRACE_15			= IOMUX_PAD(0x674, 0x210, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_HSYNC__GPIO3_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_HSYNC__GPIO3_30				= IOMUX_PAD(0x674, 0x210, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC			= IOMUX_PAD(0x674, 0x210, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_HSYNC__IPU_DISPB_SD_D_IO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_HSYNC__IPU_DISPB_SD_D_IO			= IOMUX_PAD(0x674, 0x210, 2, 0x92c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_HSYNC__SDMA_DEBUG_RTBUFFER_WRITE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_HSYNC__SDMA_DEBUG_RTBUFFER_WRITE		= IOMUX_PAD(0x674, 0x210, 6, 0x0,   0, NO_PAD_CTR/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_REV__ARM11P_TOP_TRACE_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_REV__ARM11P_TOP_TRACE_20			= IOMUX_PAD(0x688, 0x224, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_REV__GPIO1_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_REV__GPIO1_3				= IOMUX_PAD(0x688, 0x224, 5, 0x84c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_REV__IPU_DISPB_D3_REV	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_REV__IPU_DISPB_D3_REV			= IOMUX_PAD(0x688, 0x224, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_REV__IPU_DISPB_SER_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_REV__IPU_DISPB_SER_RS			= IOMUX_PAD(0x688, 0x224, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_REV__SDMA_DEBUG_BUS_RWB	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_REV__SDMA_DEBUG_BUS_RWB			= IOMUX_PAD(0x688, 0x224, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_SPL__ARM11P_TOP_TRACE_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_SPL__ARM11P_TOP_TRACE_22			= IOMUX_PAD(0x690, 0x22c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_SPL__GPIO1_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_SPL__GPIO1_5				= IOMUX_PAD(0x690, 0x22c, 5, 0x854, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_SPL__IPU_DISPB_D12_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_SPL__IPU_DISPB_D12_VSYNC			= IOMUX_PAD(0x690, 0x22c, 2, 0x928, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL			= IOMUX_PAD(0x690, 0x22c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_SPL__SDMA_DEBUG_BUS_DEVICE_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_SPL__SDMA_DEBUG_BUS_DEVICE_1		= IOMUX_PAD(0x690, 0x22c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_VSYNC__ARM11P_TOP_TRACE_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_VSYNC__ARM11P_TOP_TRACE_19			= IOMUX_PAD(0x684, 0x220, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_VSYNC__GPIO1_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_VSYNC__GPIO1_2				= IOMUX_PAD(0x684, 0x220, 5, 0x848, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_VSYNC__IPU_DISPB_CS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_VSYNC__IPU_DISPB_CS1			= IOMUX_PAD(0x684, 0x220, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC			= IOMUX_PAD(0x684, 0x220, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3_VSYNC__SDMA_DEBUG_YIELD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3_VSYNC__SDMA_DEBUG_YIELD			= IOMUX_PAD(0x684, 0x220, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D3__EMI_EIM_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D3__EMI_EIM_D_3				= IOMUX_PAD(0x514, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D4__EMI_EIM_D_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D4__EMI_EIM_D_4				= IOMUX_PAD(0x510, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D5__EMI_EIM_D_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D5__EMI_EIM_D_5				= IOMUX_PAD(0x50c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D6__EMI_EIM_D_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D6__EMI_EIM_D_6				= IOMUX_PAD(0x508, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D7__EMI_EIM_D_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D7__EMI_EIM_D_7				= IOMUX_PAD(0x504, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D8__EMI_EIM_D_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D8__EMI_EIM_D_8				= IOMUX_PAD(0x500, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_D9__EMI_EIM_D_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_D9__EMI_EIM_D_9				= IOMUX_PAD(0x4fc, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_DE_B__SJC_DE_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_DE_B__SJC_DE_B					= IOMUX_PAD(0x604, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_DQM0__EMI_DRAM_DQM_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_DQM0__EMI_DRAM_DQM_0				= IOMUX_PAD(0x45c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_DQM1__EMI_DRAM_DQM_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_DQM1__EMI_DRAM_DQM_1				= IOMUX_PAD(0x460, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_DQM2__EMI_DRAM_DQM_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_DQM2__EMI_DRAM_DQM_2				= IOMUX_PAD(0x464, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_DQM3__EMI_DRAM_DQM_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_DQM3__EMI_DRAM_DQM_3				= IOMUX_PAD(0x468, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_EB0__EMI_EIM_EB0_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_EB0__EMI_EIM_EB0_B				= IOMUX_PAD(0x46c, 0x094, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_EB1__EMI_EIM_EB1_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_EB1__EMI_EIM_EB1_B				= IOMUX_PAD(0x470, 0x098, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_ECB__EMI_EIM_ECB	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_ECB__EMI_EIM_ECB				= IOMUX_PAD(0x494, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_EXT_ARMCLK__CCM_EXT_ARMCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_EXT_ARMCLK__CCM_EXT_ARMCLK			= IOMUX_PAD(0x78c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__ARM11P_TOP_EVNTBUS_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__ARM11P_TOP_EVNTBUS_3			= IOMUX_PAD(0x750, 0x2ec, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__CSPI2_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__CSPI2_RDY				= IOMUX_PAD(0x750, 0x2ec, 4, 0x7e4, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__ESDHC1_DAT7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__ESDHC1_DAT7				= IOMUX_PAD(0x750, 0x2ec, 1, 0x810, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__FEC_COL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__FEC_COL				= IOMUX_PAD(0x750, 0x2ec, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__GPIO3_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__GPIO3_9				= IOMUX_PAD(0x750, 0x2ec, 5, 0x918, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__IPU_DISPB_SER_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__IPU_DISPB_SER_RS			= IOMUX_PAD(0x750, 0x2ec, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__UART3_CTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__UART3_CTS				= IOMUX_PAD(0x750, 0x2ec, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_COL__USB_TOP_USBH2_DATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_COL__USB_TOP_USBH2_DATA_0			= IOMUX_PAD(0x750, 0x2ec, 3, 0x9cc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_CRS__FEC_CRS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_CRS__FEC_CRS				= IOMUX_PAD(0x770, 0x30c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_CRS__GPIO3_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_CRS__GPIO3_17				= IOMUX_PAD(0x770, 0x30c, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_CRS__IPU_CSI_D_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_CRS__IPU_CSI_D_1				= IOMUX_PAD(0x770, 0x30c, 1, 0x934, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_CRS__IPU_FLASH_STROBE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_CRS__IPU_FLASH_STROBE			= IOMUX_PAD(0x770, 0x30c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_CRS__KPP_COL_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_CRS__KPP_COL_5				= IOMUX_PAD(0x770, 0x30c, 4, 0x964, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_CRS__USB_TOP_USBH2_PWR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_CRS__USB_TOP_USBH2_PWR			= IOMUX_PAD(0x770, 0x30c, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__ARM11P_TOP_EVNTBUS_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__ARM11P_TOP_EVNTBUS_7			= IOMUX_PAD(0x760, 0x2fc, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__CAN2_TXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__CAN2_TXCAN				= IOMUX_PAD(0x760, 0x2fc, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__FEC_MDC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__FEC_MDC				= IOMUX_PAD(0x760, 0x2fc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__GPIO3_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__GPIO3_13				= IOMUX_PAD(0x760, 0x2fc, 5, 0x8f8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__IPU_DISPB_WR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__IPU_DISPB_WR				= IOMUX_PAD(0x760, 0x2fc, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__UART3_DCD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__UART3_DCD				= IOMUX_PAD(0x760, 0x2fc, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDC__USB_TOP_USBH2_DATA_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDC__USB_TOP_USBH2_DATA_4			= IOMUX_PAD(0x760, 0x2fc, 3, 0x9dc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDIO__ARM11P_TOP_EVNTBUS_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDIO__ARM11P_TOP_EVNTBUS_8			= IOMUX_PAD(0x764, 0x300, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDIO__CAN2_RXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDIO__CAN2_RXCAN				= IOMUX_PAD(0x764, 0x300, 1, 0x7cc, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDIO__FEC_MDIO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDIO__FEC_MDIO				= IOMUX_PAD(0x764, 0x300, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDIO__GPIO3_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDIO__GPIO3_14				= IOMUX_PAD(0x764, 0x300, 5, 0x8fc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDIO__IPU_DISPB_RD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDIO__IPU_DISPB_RD				= IOMUX_PAD(0x764, 0x300, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_MDIO__USB_TOP_USBH2_DATA_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_MDIO__USB_TOP_USBH2_DATA_5			= IOMUX_PAD(0x764, 0x300, 3, 0x9e0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__ARM11P_TOP_EVNTBUS_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__ARM11P_TOP_EVNTBUS_4		= IOMUX_PAD(0x754, 0x2f0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__CSPI2_SS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__CSPI2_SS0				= IOMUX_PAD(0x754, 0x2f0, 4, 0x7f0, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__FEC_RDATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__FEC_RDATA_0			= IOMUX_PAD(0x754, 0x2f0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__GPIO3_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__GPIO3_10				= IOMUX_PAD(0x754, 0x2f0, 5, 0x8ec, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__IPU_DISPB_CS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__IPU_DISPB_CS1			= IOMUX_PAD(0x754, 0x2f0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__PWM_PWMO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__PWM_PWMO				= IOMUX_PAD(0x754, 0x2f0, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__UART3_DTR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__UART3_DTR				= IOMUX_PAD(0x754, 0x2f0, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA0__USB_TOP_USBH2_DATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA0__USB_TOP_USBH2_DATA_1		= IOMUX_PAD(0x754, 0x2f0, 3, 0x9d0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__AUDMUX_AUD6_RXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__AUDMUX_AUD6_RXC			= IOMUX_PAD(0x774, 0x310, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__FEC_RDATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__FEC_RDATA_1			= IOMUX_PAD(0x774, 0x310, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__GPIO3_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__GPIO3_18				= IOMUX_PAD(0x774, 0x310, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__IPU_CSI_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__IPU_CSI_D_2			= IOMUX_PAD(0x774, 0x310, 1, 0x938, 4, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__IPU_DISPB_BE0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__IPU_DISPB_BE0			= IOMUX_PAD(0x774, 0x310, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__KPP_COL_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__KPP_COL_6				= IOMUX_PAD(0x774, 0x310, 4, 0x968, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA1__USB_TOP_USBH2_OC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA1__USB_TOP_USBH2_OC			= IOMUX_PAD(0x774, 0x310, 3, 0x9f4, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA2__AUDMUX_AUD6_TXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA2__AUDMUX_AUD6_TXD			= IOMUX_PAD(0x77c, 0x318, 2, 0x7b4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA2__FEC_RDATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA2__FEC_RDATA_2			= IOMUX_PAD(0x77c, 0x318, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA2__GPIO3_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA2__GPIO3_20				= IOMUX_PAD(0x77c, 0x318, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA2__IPU_CSI_D_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA2__IPU_CSI_D_4			= IOMUX_PAD(0x77c, 0x318, 1, 0x940, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA2__KPP_ROW_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA2__KPP_ROW_4				= IOMUX_PAD(0x77c, 0x318, 4, 0x980, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA3__AUDMUX_AUD6_TXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA3__AUDMUX_AUD6_TXC			= IOMUX_PAD(0x784, 0x320, 2, 0x7c0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA3__FEC_RDATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA3__FEC_RDATA_3			= IOMUX_PAD(0x784, 0x320, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA3__GPIO3_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA3__GPIO3_22				= IOMUX_PAD(0x784, 0x320, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA3__IPU_CSI_D_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA3__IPU_CSI_D_6			= IOMUX_PAD(0x784, 0x320, 1, 0x948, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RDATA3__KPP_ROW_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RDATA3__KPP_ROW_6				= IOMUX_PAD(0x784, 0x320, 4, 0x988, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__ARM11P_TOP_EVNTBUS_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__ARM11P_TOP_EVNTBUS_1		= IOMUX_PAD(0x748, 0x2e4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__CSPI2_MISO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__CSPI2_MISO				= IOMUX_PAD(0x748, 0x2e4, 4, 0x7e8, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__ESDHC1_DAT5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__ESDHC1_DAT5			= IOMUX_PAD(0x748, 0x2e4, 1, 0x808, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK				= IOMUX_PAD(0x748, 0x2e4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__GPIO3_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__GPIO3_7				= IOMUX_PAD(0x748, 0x2e4, 5, 0x910, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__IPU_DISPB_SD_D_I	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__IPU_DISPB_SD_D_I			= IOMUX_PAD(0x748, 0x2e4, 6, 0x92c, 4, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__UART3_TXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__UART3_TXD_MUX			= IOMUX_PAD(0x748, 0x2e4, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_CLK__USB_TOP_USBH2_STP	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_CLK__USB_TOP_USBH2_STP			= IOMUX_PAD(0x748, 0x2e4, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__ARM11P_TOP_EVNTBUS_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__ARM11P_TOP_EVNTBUS_2		= IOMUX_PAD(0x74c, 0x2e8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__CSPI2_SCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__CSPI2_SCLK				= IOMUX_PAD(0x74c, 0x2e8, 4, 0x7e0, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__ESDHC1_DAT6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__ESDHC1_DAT6				= IOMUX_PAD(0x74c, 0x2e8, 1, 0x80c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__FEC_RX_DV	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__FEC_RX_DV				= IOMUX_PAD(0x74c, 0x2e8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__GPIO3_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__GPIO3_8				= IOMUX_PAD(0x74c, 0x2e8, 5, 0x914, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__IPU_DISPB_SD_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__IPU_DISPB_SD_CLK			= IOMUX_PAD(0x74c, 0x2e8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__UART3_RTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__UART3_RTS				= IOMUX_PAD(0x74c, 0x2e8, 2, 0x99c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_DV__USB_TOP_USBH2_NXT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_DV__USB_TOP_USBH2_NXT			= IOMUX_PAD(0x74c, 0x2e8, 3, 0x9f0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_ERR__FEC_RX_ERR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR				= IOMUX_PAD(0x76c, 0x308, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_ERR__GPIO3_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_ERR__GPIO3_16				= IOMUX_PAD(0x76c, 0x308, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_ERR__IPU_CSI_D_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_ERR__IPU_CSI_D_0			= IOMUX_PAD(0x76c, 0x308, 1, 0x930, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_ERR__IPU_DISPB_SD_D_IO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_ERR__IPU_DISPB_SD_D_IO			= IOMUX_PAD(0x76c, 0x308, 6, 0x92c, 5, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_ERR__KPP_COL_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_ERR__KPP_COL_4				= IOMUX_PAD(0x76c, 0x308, 4, 0x960, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_RX_ERR__USB_TOP_USBH2_DATA_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_RX_ERR__USB_TOP_USBH2_DATA_7		= IOMUX_PAD(0x76c, 0x308, 3, 0x9e8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__ARM11P_TOP_EVNTBUS_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__ARM11P_TOP_EVNTBUS_5		= IOMUX_PAD(0x758, 0x2f4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__CSPI2_SS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__CSPI2_SS1				= IOMUX_PAD(0x758, 0x2f4, 4, 0x7f4, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__FEC_TDATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__FEC_TDATA_0			= IOMUX_PAD(0x758, 0x2f4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__GPIO3_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__GPIO3_11				= IOMUX_PAD(0x758, 0x2f4, 5, 0x8f0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__IPU_DISPB_CS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__IPU_DISPB_CS0			= IOMUX_PAD(0x758, 0x2f4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__SPDIF_SPDIF_OUT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__SPDIF_SPDIF_OUT1			= IOMUX_PAD(0x758, 0x2f4, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__UART3_DSR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__UART3_DSR				= IOMUX_PAD(0x758, 0x2f4, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA0__USB_TOP_USBH2_DATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA0__USB_TOP_USBH2_DATA_2		= IOMUX_PAD(0x758, 0x2f4, 3, 0x9d4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA1__AUDMUX_AUD6_RXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA1__AUDMUX_AUD6_RXFS			= IOMUX_PAD(0x778, 0x314, 2, 0x7bc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA1__FEC_TDATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA1__FEC_TDATA_1			= IOMUX_PAD(0x778, 0x314, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA1__GPIO3_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA1__GPIO3_19				= IOMUX_PAD(0x778, 0x314, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA1__IPU_CSI_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA1__IPU_CSI_D_3			= IOMUX_PAD(0x778, 0x314, 1, 0x93c, 4, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA1__IPU_DISPB_BE1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA1__IPU_DISPB_BE1			= IOMUX_PAD(0x778, 0x314, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA1__KPP_COL_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA1__KPP_COL_7				= IOMUX_PAD(0x778, 0x314, 4, 0x96c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA2__AUDMUX_AUD6_RXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA2__AUDMUX_AUD6_RXD			= IOMUX_PAD(0x780, 0x31c, 2, 0x7b0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA2__FEC_TDATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA2__FEC_TDATA_2			= IOMUX_PAD(0x780, 0x31c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA2__GPIO3_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA2__GPIO3_21				= IOMUX_PAD(0x780, 0x31c, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA2__IPU_CSI_D_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA2__IPU_CSI_D_5			= IOMUX_PAD(0x780, 0x31c, 1, 0x944, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA2__KPP_ROW_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA2__KPP_ROW_5				= IOMUX_PAD(0x780, 0x31c, 4, 0x984, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA3__AUDMUX_AUD6_TXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA3__AUDMUX_AUD6_TXFS			= IOMUX_PAD(0x788, 0x324, 2, 0x7c4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA3__FEC_TDATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA3__FEC_TDATA_3			= IOMUX_PAD(0x788, 0x324, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA3__GPIO3_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA3__GPIO3_23				= IOMUX_PAD(0x788, 0x324, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA3__IPU_CSI_D_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA3__IPU_CSI_D_7			= IOMUX_PAD(0x788, 0x324, 1, 0x94c, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TDATA3__KPP_ROW_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TDATA3__KPP_ROW_7				= IOMUX_PAD(0x788, 0x324, 4, 0x98c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__ARM11P_TOP_EVNTBUS_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__ARM11P_TOP_EVNTBUS_0		= IOMUX_PAD(0x744, 0x2e0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__CSPI2_MOSI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__CSPI2_MOSI				= IOMUX_PAD(0x744, 0x2e0, 4, 0x7ec, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__ESDHC1_DAT4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__ESDHC1_DAT4			= IOMUX_PAD(0x744, 0x2e0, 1, 0x804, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK				= IOMUX_PAD(0x744, 0x2e0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__GPIO3_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__GPIO3_6				= IOMUX_PAD(0x744, 0x2e0, 5, 0x90c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__IPU_DISPB_D12_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__IPU_DISPB_D12_VSYNC		= IOMUX_PAD(0x744, 0x2e0, 6, 0x928, 5, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__UART3_RXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__UART3_RXD_MUX			= IOMUX_PAD(0x744, 0x2e0, 2, 0x9a0, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_CLK__USB_TOP_USBH2_DIR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_CLK__USB_TOP_USBH2_DIR			= IOMUX_PAD(0x744, 0x2e0, 3, 0x9ec, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__ARM11P_TOP_EVNTBUS_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__ARM11P_TOP_EVNTBUS_6		= IOMUX_PAD(0x75c, 0x2f8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__FEC_TX_EN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__FEC_TX_EN				= IOMUX_PAD(0x75c, 0x2f8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__GPIO3_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__GPIO3_12				= IOMUX_PAD(0x75c, 0x2f8, 5, 0x8f4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__IPU_DISPB_PAR_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__IPU_DISPB_PAR_RS			= IOMUX_PAD(0x75c, 0x2f8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__SPDIF_SPDIF_IN1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__SPDIF_SPDIF_IN1			= IOMUX_PAD(0x75c, 0x2f8, 1, 0x998, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__UART3_RI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__UART3_RI				= IOMUX_PAD(0x75c, 0x2f8, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_EN__USB_TOP_USBH2_DATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_EN__USB_TOP_USBH2_DATA_3		= IOMUX_PAD(0x75c, 0x2f8, 3, 0x9d8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__ARM11P_TOP_EVNTBUS_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__ARM11P_TOP_EVNTBUS_9		= IOMUX_PAD(0x768, 0x304, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__FEC_TX_ERR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR				= IOMUX_PAD(0x768, 0x304, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__GPIO3_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__GPIO3_15				= IOMUX_PAD(0x768, 0x304, 5, 0x900, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__IPU_DISPB_D0_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__IPU_DISPB_D0_VSYNC			= IOMUX_PAD(0x768, 0x304, 6, 0x924, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__OWIRE_LINE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__OWIRE_LINE				= IOMUX_PAD(0x768, 0x304, 1, 0x990, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__SPDIF_SPDIF_EXTCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__SPDIF_SPDIF_EXTCLK			= IOMUX_PAD(0x768, 0x304, 2, 0x994, 4, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FEC_TX_ERR__USB_TOP_USBH2_DATA_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FEC_TX_ERR__USB_TOP_USBH2_DATA_6		= IOMUX_PAD(0x768, 0x304, 3, 0x9e4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FSR__ARM11P_TOP_EVNTBUS_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FSR__ARM11P_TOP_EVNTBUS_11			= IOMUX_PAD(0x588, 0x144, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FSR__ESAI_FSR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FSR__ESAI_FSR					= IOMUX_PAD(0x588, 0x144, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FSR__GPIO1_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FSR__GPIO1_5					= IOMUX_PAD(0x588, 0x144, 5, 0x854, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FST__ESAI_FST	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FST__ESAI_FST					= IOMUX_PAD(0x594, 0x150, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FST__GPIO1_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FST__GPIO1_8					= IOMUX_PAD(0x594, 0x150, 5, 0x860, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FST__IPU_CSI_D_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FST__IPU_CSI_D_1				= IOMUX_PAD(0x594, 0x150, 6, 0x934, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_FST__KPP_ROW_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_FST__KPP_ROW_3					= IOMUX_PAD(0x594, 0x150, 7, 0x97c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_0__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_0__CCM_PMIC_RDY				= IOMUX_PAD(0x334, 0x010, 1, 0x7d4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_0__GPIO1_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_0__GPIO1_0				= IOMUX_PAD(0x334, 0x010, 0, 0x82c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_0__OWIRE_LINE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_0__OWIRE_LINE				= IOMUX_PAD(0x334, 0x010, 2, 0x990, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_0__SDMA_EXTDMA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_0__SDMA_EXTDMA_0				= IOMUX_PAD(0x334, 0x010, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_1__CSPI1_SS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_1__CSPI1_SS2				= IOMUX_PAD(0x338, 0x014, 3, 0x7d8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_1__GPIO1_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_1__GPIO1_1				= IOMUX_PAD(0x338, 0x014, 0, 0x838, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_1__PWM_PWMO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_1__PWM_PWMO				= IOMUX_PAD(0x338, 0x014, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_1__SCC_TAMPER_DETECT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_1__SCC_TAMPER_DETECT			= IOMUX_PAD(0x338, 0x014, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO1_1__SDMA_EXTDMA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO1_1__SDMA_EXTDMA_1				= IOMUX_PAD(0x338, 0x014, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO2_0__GPIO2_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO2_0__GPIO2_0				= IOMUX_PAD(0x33c, 0x018, 0, 0x868, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO2_0__USB_TOP_USBOTG_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO2_0__USB_TOP_USBOTG_CLK			= IOMUX_PAD(0x33c, 0x018, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO3_0__GPIO3_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO3_0__GPIO3_0				= IOMUX_PAD(0x340, 0x01c, 0, 0x8e8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_GPIO3_0__USB_TOP_USBH2_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_GPIO3_0__USB_TOP_USBH2_CLK			= IOMUX_PAD(0x340, 0x01c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKR__ARM11P_TOP_EVNTBUS_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKR__ARM11P_TOP_EVNTBUS_12			= IOMUX_PAD(0x58c, 0x148, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKR__AUDMUX_AUD5_RXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKR__AUDMUX_AUD5_RXFS				= IOMUX_PAD(0x58c, 0x148, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKR__CSPI2_SS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKR__CSPI2_SS0				= IOMUX_PAD(0x58c, 0x148, 2, 0x7f0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKR__ESAI_HCKR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKR__ESAI_HCKR				= IOMUX_PAD(0x58c, 0x148, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKR__GPIO1_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKR__GPIO1_6					= IOMUX_PAD(0x58c, 0x148, 5, 0x858, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKR__IPU_FLASH_STROBE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKR__IPU_FLASH_STROBE				= IOMUX_PAD(0x58c, 0x148, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKT__AUDMUX_AUD5_RXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKT__AUDMUX_AUD5_RXC				= IOMUX_PAD(0x598, 0x154, 1, 0x7a8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKT__ESAI_HCKT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKT__ESAI_HCKT				= IOMUX_PAD(0x598, 0x154, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKT__GPIO1_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKT__GPIO1_9					= IOMUX_PAD(0x598, 0x154, 5, 0x864, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKT__IPU_CSI_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKT__IPU_CSI_D_2				= IOMUX_PAD(0x598, 0x154, 6, 0x938, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_HCKT__KPP_COL_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_HCKT__KPP_COL_3				= IOMUX_PAD(0x598, 0x154, 7, 0x95c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C1_CLK__CCM_USB_BYP_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C1_CLK__CCM_USB_BYP_CLK			= IOMUX_PAD(0x554, 0x110, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C1_CLK__GPIO2_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C1_CLK__GPIO2_24				= IOMUX_PAD(0x554, 0x110, 5, 0x8a8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C1_CLK__I2C1_SCL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C1_CLK__I2C1_SCL				= IOMUX_PAD(0x554, 0x110, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C1_DAT__GPIO2_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C1_DAT__GPIO2_25				= IOMUX_PAD(0x558, 0x114, 5, 0x8ac, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C1_DAT__I2C1_SDA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C1_DAT__I2C1_SDA				= IOMUX_PAD(0x558, 0x114, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_CLK__CAN1_TXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_CLK__CAN1_TXCAN				= IOMUX_PAD(0x55c, 0x118, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_CLK__GPIO2_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_CLK__GPIO2_26				= IOMUX_PAD(0x55c, 0x118, 5, 0x8b0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_CLK__I2C2_SCL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_CLK__I2C2_SCL				= IOMUX_PAD(0x55c, 0x118, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_CLK__SDMA_DEBUG_BUS_DEVICE_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_CLK__SDMA_DEBUG_BUS_DEVICE_2		= IOMUX_PAD(0x55c, 0x118, 6, 0x0,   0, NO_PAD_CTRL)/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR			= IOMUX_PAD(0x55c, 0x118, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_DAT__CAN1_RXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_DAT__CAN1_RXCAN				= IOMUX_PAD(0x560, 0x11c, 1, 0x7c8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_DAT__GPIO2_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_DAT__GPIO2_27				= IOMUX_PAD(0x560, 0x11c, 5, 0x8b4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_DAT__I2C2_SDA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_DAT__I2C2_SDA				= IOMUX_PAD(0x560, 0x11c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_DAT__SDMA_DEBUG_BUS_DEVICE_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_DAT__SDMA_DEBUG_BUS_DEVICE_3		= IOMUX_PAD(0x560, 0x11c, 6, 0x0,   0, NO_PAD_CTRL)/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC			= IOMUX_PAD(0x560, 0x11c, 2, 0x9f4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LBA__EMI_EIM_LBA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LBA__EMI_EIM_LBA				= IOMUX_PAD(0x498, 0x0bc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD0__GPIO2_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD0__GPIO2_0					= IOMUX_PAD(0x614, 0x1b0, 5, 0x868, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD0__IPU_DISPB_DAT_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD0__IPU_DISPB_DAT_0				= IOMUX_PAD(0x614, 0x1b0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD0__SDMA_SDMA_DEBUG_PC_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD0__SDMA_SDMA_DEBUG_PC_0			= IOMUX_PAD(0x614, 0x1b0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD10__GPIO2_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD10__GPIO2_10					= IOMUX_PAD(0x63c, 0x1d8, 5, 0x86c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD10__IPU_DISPB_DAT_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD10__IPU_DISPB_DAT_10				= IOMUX_PAD(0x63c, 0x1d8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD10__SDMA_SDMA_DEBUG_PC_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD10__SDMA_SDMA_DEBUG_PC_10			= IOMUX_PAD(0x63c, 0x1d8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD11__ARM11P_TOP_TRACE_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD11__ARM11P_TOP_TRACE_4			= IOMUX_PAD(0x640, 0x1dc, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD11__GPIO2_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD11__GPIO2_11					= IOMUX_PAD(0x640, 0x1dc, 5, 0x870, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD11__IPU_DISPB_DAT_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD11__IPU_DISPB_DAT_11				= IOMUX_PAD(0x640, 0x1dc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD11__SDMA_SDMA_DEBUG_PC_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD11__SDMA_SDMA_DEBUG_PC_11			= IOMUX_PAD(0x640, 0x1dc, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD12__ARM11P_TOP_TRACE_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD12__ARM11P_TOP_TRACE_5			= IOMUX_PAD(0x644, 0x1e0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD12__GPIO2_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD12__GPIO2_12					= IOMUX_PAD(0x644, 0x1e0, 5, 0x874, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD12__IPU_DISPB_DAT_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD12__IPU_DISPB_DAT_12				= IOMUX_PAD(0x644, 0x1e0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD12__SDMA_SDMA_DEBUG_PC_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD12__SDMA_SDMA_DEBUG_PC_12			= IOMUX_PAD(0x644, 0x1e0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD13__ARM11P_TOP_TRACE_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD13__ARM11P_TOP_TRACE_6			= IOMUX_PAD(0x648, 0x1e4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD13__GPIO2_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD13__GPIO2_13					= IOMUX_PAD(0x648, 0x1e4, 5, 0x878, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD13__IPU_DISPB_DAT_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD13__IPU_DISPB_DAT_13				= IOMUX_PAD(0x648, 0x1e4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD13__SDMA_SDMA_DEBUG_PC_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD13__SDMA_SDMA_DEBUG_PC_13			= IOMUX_PAD(0x648, 0x1e4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD14__ARM11P_TOP_TRACE_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD14__ARM11P_TOP_TRACE_7			= IOMUX_PAD(0x64c, 0x1e8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD14__GPIO2_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD14__GPIO2_14					= IOMUX_PAD(0x64c, 0x1e8, 5, 0x87c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD14__IPU_DISPB_DAT_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD14__IPU_DISPB_DAT_14				= IOMUX_PAD(0x64c, 0x1e8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD14__SDMA_SDMA_DEBUG_EVENT_CHANNEL_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD14__SDMA_SDMA_DEBUG_EVENT_CHANNEL_0		= IOMUX_PAD(0x64c, 0x1e8, 6, 0x0,   0, NO_PAD_C/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD15__ARM11P_TOP_TRACE_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD15__ARM11P_TOP_TRACE_8			= IOMUX_PAD(0x650, 0x1ec, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD15__GPIO2_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD15__GPIO2_15					= IOMUX_PAD(0x650, 0x1ec, 5, 0x880, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD15__IPU_DISPB_DAT_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD15__IPU_DISPB_DAT_15				= IOMUX_PAD(0x650, 0x1ec, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD15__SDMA_SDMA_DEBUG_EVENT_CHANNEL_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD15__SDMA_SDMA_DEBUG_EVENT_CHANNEL_1		= IOMUX_PAD(0x650, 0x1ec, 6, 0x0,   0, NO_PAD_C/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD16__ARM11P_TOP_TRACE_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD16__ARM11P_TOP_TRACE_9			= IOMUX_PAD(0x654, 0x1f0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD16__GPIO2_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD16__GPIO2_16					= IOMUX_PAD(0x654, 0x1f0, 5, 0x884, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD16__IPU_DISPB_D12_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD16__IPU_DISPB_D12_VSYNC			= IOMUX_PAD(0x654, 0x1f0, 2, 0x928, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD16__IPU_DISPB_DAT_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD16__IPU_DISPB_DAT_16				= IOMUX_PAD(0x654, 0x1f0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD16__SDMA_SDMA_DEBUG_EVENT_CHANNEL_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD16__SDMA_SDMA_DEBUG_EVENT_CHANNEL_2		= IOMUX_PAD(0x654, 0x1f0, 6, 0x0,   0, NO_PAD_C/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD17__ARM11P_TOP_TRACE_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD17__ARM11P_TOP_TRACE_10			= IOMUX_PAD(0x658, 0x1f4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD17__GPIO2_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD17__GPIO2_17					= IOMUX_PAD(0x658, 0x1f4, 5, 0x888, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD17__IPU_DISPB_CS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD17__IPU_DISPB_CS2				= IOMUX_PAD(0x658, 0x1f4, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD17__IPU_DISPB_DAT_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD17__IPU_DISPB_DAT_17				= IOMUX_PAD(0x658, 0x1f4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD17__SDMA_SDMA_DEBUG_EVENT_CHANNEL_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD17__SDMA_SDMA_DEBUG_EVENT_CHANNEL_3		= IOMUX_PAD(0x658, 0x1f4, 6, 0x0,   0, NO_PAD_C/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__ARM11P_TOP_TRACE_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__ARM11P_TOP_TRACE_11			= IOMUX_PAD(0x65c, 0x1f8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__ESDHC3_CMD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__ESDHC3_CMD				= IOMUX_PAD(0x65c, 0x1f8, 3, 0x818, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__GPIO3_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__GPIO3_24					= IOMUX_PAD(0x65c, 0x1f8, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__IPU_DISPB_D0_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__IPU_DISPB_D0_VSYNC			= IOMUX_PAD(0x65c, 0x1f8, 1, 0x924, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__IPU_DISPB_D12_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__IPU_DISPB_D12_VSYNC			= IOMUX_PAD(0x65c, 0x1f8, 2, 0x928, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__IPU_DISPB_DAT_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__IPU_DISPB_DAT_18				= IOMUX_PAD(0x65c, 0x1f8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__SDMA_SDMA_DEBUG_EVENT_CHANNEL_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__SDMA_SDMA_DEBUG_EVENT_CHANNEL_4		= IOMUX_PAD(0x65c, 0x1f8, 6, 0x0,   0, NO_PAD_C/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD18__USB_TOP_USBOTG_DATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD18__USB_TOP_USBOTG_DATA_3			= IOMUX_PAD(0x65c, 0x1f8, 4, 0x9b0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__ARM11P_TOP_TRACE_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__ARM11P_TOP_TRACE_12			= IOMUX_PAD(0x660, 0x1fc, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__ESDHC3_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__ESDHC3_CLK				= IOMUX_PAD(0x660, 0x1fc, 3, 0x814, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__GPIO3_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__GPIO3_25					= IOMUX_PAD(0x660, 0x1fc, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__IPU_DISPB_BCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__IPU_DISPB_BCLK				= IOMUX_PAD(0x660, 0x1fc, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__IPU_DISPB_CS1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__IPU_DISPB_CS1				= IOMUX_PAD(0x660, 0x1fc, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__IPU_DISPB_DAT_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__IPU_DISPB_DAT_19				= IOMUX_PAD(0x660, 0x1fc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__SDMA_SDMA_DEBUG_EVENT_CHANNEL_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__SDMA_SDMA_DEBUG_EVENT_CHANNEL_5		= IOMUX_PAD(0x660, 0x1fc, 6, 0x0,   0, NO_PAD_C/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD19__USB_TOP_USBOTG_DIR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD19__USB_TOP_USBOTG_DIR			= IOMUX_PAD(0x660, 0x1fc, 4, 0x9c4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD1__GPIO2_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD1__GPIO2_1					= IOMUX_PAD(0x618, 0x1b4, 5, 0x894, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD1__IPU_DISPB_DAT_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD1__IPU_DISPB_DAT_1				= IOMUX_PAD(0x618, 0x1b4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD1__SDMA_SDMA_DEBUG_PC_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD1__SDMA_SDMA_DEBUG_PC_1			= IOMUX_PAD(0x618, 0x1b4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__ARM11P_TOP_TRACE_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__ARM11P_TOP_TRACE_13			= IOMUX_PAD(0x664, 0x200, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__ESDHC3_DAT0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__ESDHC3_DAT0				= IOMUX_PAD(0x664, 0x200, 3, 0x81c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__GPIO3_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__GPIO3_26					= IOMUX_PAD(0x664, 0x200, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__IPU_DISPB_CS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__IPU_DISPB_CS0				= IOMUX_PAD(0x664, 0x200, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__IPU_DISPB_DAT_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__IPU_DISPB_DAT_20				= IOMUX_PAD(0x664, 0x200, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__IPU_DISPB_SD_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__IPU_DISPB_SD_CLK				= IOMUX_PAD(0x664, 0x200, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD20__SDMA_SDMA_DEBUG_CORE_STATUS_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD20__SDMA_SDMA_DEBUG_CORE_STATUS_3		= IOMUX_PAD(0x664, 0x200, 6, 0x0,   0, NO_PAD_CTR/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__ARM11P_TOP_TRACE_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__ARM11P_TOP_TRACE_14			= IOMUX_PAD(0x668, 0x204, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__ESDHC3_DAT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__ESDHC3_DAT1				= IOMUX_PAD(0x668, 0x204, 3, 0x820, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__GPIO3_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__GPIO3_27					= IOMUX_PAD(0x668, 0x204, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__IPU_DISPB_DAT_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__IPU_DISPB_DAT_21				= IOMUX_PAD(0x668, 0x204, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__IPU_DISPB_PAR_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__IPU_DISPB_PAR_RS				= IOMUX_PAD(0x668, 0x204, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__IPU_DISPB_SER_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__IPU_DISPB_SER_RS				= IOMUX_PAD(0x668, 0x204, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__SDMA_DEBUG_EVENT_CHANNEL_SEL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__SDMA_DEBUG_EVENT_CHANNEL_SEL		= IOMUX_PAD(0x668, 0x204, 6, 0x0,   0, NO_PAD_CTRL/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD21__USB_TOP_USBOTG_STP	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD21__USB_TOP_USBOTG_STP			= IOMUX_PAD(0x668, 0x204, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__ARM11P_TOP_TRCTL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__ARM11P_TOP_TRCTL				= IOMUX_PAD(0x66c, 0x208, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__ESDHC3_DAT2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__ESDHC3_DAT2				= IOMUX_PAD(0x66c, 0x208, 3, 0x824, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__GPIO3_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__GPIO3_28					= IOMUX_PAD(0x66c, 0x208, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__IPU_DISPB_DAT_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__IPU_DISPB_DAT_22				= IOMUX_PAD(0x66c, 0x208, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__IPU_DISPB_SD_D_I	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__IPU_DISPB_SD_D_I				= IOMUX_PAD(0x66c, 0x208, 2, 0x92c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__IPU_DISPB_WR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__IPU_DISPB_WR				= IOMUX_PAD(0x66c, 0x208, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__SDMA_DEBUG_BUS_ERROR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__SDMA_DEBUG_BUS_ERROR			= IOMUX_PAD(0x66c, 0x208, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD22__USB_TOP_USBOTG_NXT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD22__USB_TOP_USBOTG_NXT			= IOMUX_PAD(0x66c, 0x208, 4, 0x9c8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__ARM11P_TOP_TRCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__ARM11P_TOP_TRCLK				= IOMUX_PAD(0x670, 0x20c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__ESDHC3_DAT3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__ESDHC3_DAT3				= IOMUX_PAD(0x670, 0x20c, 3, 0x828, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__GPIO3_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__GPIO3_29					= IOMUX_PAD(0x670, 0x20c, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__IPU_DISPB_DAT_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__IPU_DISPB_DAT_23				= IOMUX_PAD(0x670, 0x20c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__IPU_DISPB_RD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__IPU_DISPB_RD				= IOMUX_PAD(0x670, 0x20c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__IPU_DISPB_SD_D_IO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__IPU_DISPB_SD_D_IO			= IOMUX_PAD(0x670, 0x20c, 2, 0x92c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__SDMA_DEBUG_MATCHED_DMBUS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__SDMA_DEBUG_MATCHED_DMBUS			= IOMUX_PAD(0x670, 0x20c, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD23__USB_TOP_USBOTG_DATA_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD23__USB_TOP_USBOTG_DATA_7			= IOMUX_PAD(0x670, 0x20c, 4, 0x9c0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD2__GPIO2_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD2__GPIO2_2					= IOMUX_PAD(0x61c, 0x1b8, 5, 0x8c0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD2__IPU_DISPB_DAT_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD2__IPU_DISPB_DAT_2				= IOMUX_PAD(0x61c, 0x1b8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD2__SDMA_SDMA_DEBUG_PC_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD2__SDMA_SDMA_DEBUG_PC_2			= IOMUX_PAD(0x61c, 0x1b8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD3__GPIO2_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD3__GPIO2_3					= IOMUX_PAD(0x620, 0x1bc, 5, 0x8cc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD3__IPU_DISPB_DAT_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD3__IPU_DISPB_DAT_3				= IOMUX_PAD(0x620, 0x1bc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD3__SDMA_SDMA_DEBUG_PC_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD3__SDMA_SDMA_DEBUG_PC_3			= IOMUX_PAD(0x620, 0x1bc, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD4__GPIO2_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD4__GPIO2_4					= IOMUX_PAD(0x624, 0x1c0, 5, 0x8d0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD4__IPU_DISPB_DAT_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD4__IPU_DISPB_DAT_4				= IOMUX_PAD(0x624, 0x1c0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD4__SDMA_SDMA_DEBUG_PC_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD4__SDMA_SDMA_DEBUG_PC_4			= IOMUX_PAD(0x624, 0x1c0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD5__GPIO2_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD5__GPIO2_5					= IOMUX_PAD(0x628, 0x1c4, 5, 0x8d4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD5__IPU_DISPB_DAT_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD5__IPU_DISPB_DAT_5				= IOMUX_PAD(0x628, 0x1c4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD5__SDMA_SDMA_DEBUG_PC_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD5__SDMA_SDMA_DEBUG_PC_5			= IOMUX_PAD(0x628, 0x1c4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD6__GPIO2_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD6__GPIO2_6					= IOMUX_PAD(0x62c, 0x1c8, 5, 0x8d8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD6__IPU_DISPB_DAT_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD6__IPU_DISPB_DAT_6				= IOMUX_PAD(0x62c, 0x1c8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD6__SDMA_SDMA_DEBUG_PC_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD6__SDMA_SDMA_DEBUG_PC_6			= IOMUX_PAD(0x62c, 0x1c8, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD7__GPIO2_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD7__GPIO2_7					= IOMUX_PAD(0x630, 0x1cc, 5, 0x8dc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD7__IPU_DISPB_DAT_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD7__IPU_DISPB_DAT_7				= IOMUX_PAD(0x630, 0x1cc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD7__SDMA_SDMA_DEBUG_PC_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD7__SDMA_SDMA_DEBUG_PC_7			= IOMUX_PAD(0x630, 0x1cc, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD8__GPIO2_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD8__GPIO2_8					= IOMUX_PAD(0x634, 0x1d0, 5, 0x8e0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD8__IPU_DISPB_DAT_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD8__IPU_DISPB_DAT_8				= IOMUX_PAD(0x634, 0x1d0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8			= IOMUX_PAD(0x634, 0x1d0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD9__GPIO2_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD9__GPIO2_9					= IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD9__IPU_DISPB_DAT_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD9__IPU_DISPB_DAT_9				= IOMUX_PAD(0x638, 0x1d4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9			= IOMUX_PAD(0x638, 0x1d4, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MA10__EMI_MA10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MA10__EMI_MA10					= IOMUX_PAD(0x394, 0x054, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MLB_CLK__GPIO3_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MLB_CLK__GPIO3_3				= IOMUX_PAD(0x738, 0x2d4, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MLB_CLK__MLB_MLBCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MLB_CLK__MLB_MLBCLK				= IOMUX_PAD(0x738, 0x2d4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MLB_DAT__GPIO3_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MLB_DAT__GPIO3_4				= IOMUX_PAD(0x73c, 0x2d8, 5, 0x904, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MLB_DAT__MLB_MLBDAT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MLB_DAT__MLB_MLBDAT				= IOMUX_PAD(0x73c, 0x2d8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MLB_SIG__GPIO3_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MLB_SIG__GPIO3_5				= IOMUX_PAD(0x740, 0x2dc, 5, 0x908, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_MLB_SIG__MLB_MLBSIG	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_MLB_SIG__MLB_MLBSIG				= IOMUX_PAD(0x740, 0x2dc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFALE__ARM11P_TOP_TRACE_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFALE__ARM11P_TOP_TRACE_2			= IOMUX_PAD(0x4d4, 0x0d0, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFALE__EMI_NANDF_ALE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFALE__EMI_NANDF_ALE				= IOMUX_PAD(0x4d4, 0x0d0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFALE__GPIO2_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFALE__GPIO2_20				= IOMUX_PAD(0x4d4, 0x0d0, 5, 0x898, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFALE__IPU_DISPB_CS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFALE__IPU_DISPB_CS0				= IOMUX_PAD(0x4d4, 0x0d0, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFALE__USB_TOP_USBH2_STP	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFALE__USB_TOP_USBH2_STP			= IOMUX_PAD(0x4d4, 0x0d0, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFCLE__ARM11P_TOP_TRACE_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFCLE__ARM11P_TOP_TRACE_3			= IOMUX_PAD(0x4d8, 0x0d4, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFCLE__EMI_NANDF_CLE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFCLE__EMI_NANDF_CLE				= IOMUX_PAD(0x4d8, 0x0d4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFCLE__GPIO2_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFCLE__GPIO2_21				= IOMUX_PAD(0x4d8, 0x0d4, 5, 0x89c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFCLE__IPU_DISPB_PAR_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFCLE__IPU_DISPB_PAR_RS			= IOMUX_PAD(0x4d8, 0x0d4, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFCLE__USB_TOP_USBH2_NXT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFCLE__USB_TOP_USBH2_NXT			= IOMUX_PAD(0x4d8, 0x0d4, 1, 0x9f0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRB__ARM11P_TOP_TRCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRB__ARM11P_TOP_TRCLK				= IOMUX_PAD(0x4e0, 0x0dc, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRB__EMI_NANDF_RB	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRB__EMI_NANDF_RB				= IOMUX_PAD(0x4e0, 0x0dc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRB__GPIO2_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRB__GPIO2_23					= IOMUX_PAD(0x4e0, 0x0dc, 5, 0x8a4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRB__IPU_DISPB_RD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRB__IPU_DISPB_RD				= IOMUX_PAD(0x4e0, 0x0dc, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRE_B__ARM11P_TOP_TRACE_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRE_B__ARM11P_TOP_TRACE_1			= IOMUX_PAD(0x4d0, 0x0cc, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRE_B__EMI_NANDF_RE_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRE_B__EMI_NANDF_RE_B				= IOMUX_PAD(0x4d0, 0x0cc, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRE_B__GPIO2_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRE_B__GPIO2_19				= IOMUX_PAD(0x4d0, 0x0cc, 5, 0x890, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRE_B__IPU_DISPB_BCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRE_B__IPU_DISPB_BCLK				= IOMUX_PAD(0x4d0, 0x0cc, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFRE_B__USB_TOP_USBH2_DIR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFRE_B__USB_TOP_USBH2_DIR			= IOMUX_PAD(0x4d0, 0x0cc, 1, 0x9ec, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWE_B__ARM11P_TOP_TRACE_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWE_B__ARM11P_TOP_TRACE_0			= IOMUX_PAD(0x4cc, 0x0c8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWE_B__EMI_NANDF_WE_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWE_B__EMI_NANDF_WE_B				= IOMUX_PAD(0x4cc, 0x0c8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWE_B__GPIO2_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWE_B__GPIO2_18				= IOMUX_PAD(0x4cc, 0x0c8, 5, 0x88c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWE_B__IPU_DISPB_D0_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWE_B__IPU_DISPB_D0_VSYNC			= IOMUX_PAD(0x4cc, 0x0c8, 2, 0x924, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWE_B__USB_TOP_USBH2_DATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWE_B__USB_TOP_USBH2_DATA_3			= IOMUX_PAD(0x4cc, 0x0c8, 1, 0x9d8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWP_B__ARM11P_TOP_TRCTL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWP_B__ARM11P_TOP_TRCTL			= IOMUX_PAD(0x4dc, 0x0d8, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWP_B__EMI_NANDF_WP_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWP_B__EMI_NANDF_WP_B				= IOMUX_PAD(0x4dc, 0x0d8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWP_B__GPIO2_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWP_B__GPIO2_22				= IOMUX_PAD(0x4dc, 0x0d8, 5, 0x8a0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWP_B__IPU_DISPB_WR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWP_B__IPU_DISPB_WR				= IOMUX_PAD(0x4dc, 0x0d8, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NFWP_B__USB_TOP_USBH2_DATA_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NFWP_B__USB_TOP_USBH2_DATA_7			= IOMUX_PAD(0x4dc, 0x0d8, 1, 0x9e8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NF_CE0__EMI_NANDF_CE0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NF_CE0__EMI_NANDF_CE0				= IOMUX_PAD(0x490, 0x0b8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_NF_CE0__GPIO1_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_NF_CE0__GPIO1_22				= IOMUX_PAD(0x490, 0x0b8, 5, 0x844, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_OE__EMI_EIM_OE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_OE__EMI_EIM_OE					= IOMUX_PAD(0x474, 0x09c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_POR_B__CCM_POR_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_POR_B__CCM_POR_B				= IOMUX_PAD(0x348, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_POWER_FAIL__CCM_DSM_WAKEUP_INT_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_POWER_FAIL__CCM_DSM_WAKEUP_INT_26		= IOMUX_PAD(0x360, 0x0,   0, 0x0,   0, NO_PAD_CTRL)/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RAS__EMI_DRAM_RAS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RAS__EMI_DRAM_RAS				= IOMUX_PAD(0x4a4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RESET_IN_B__CCM_RESET_IN_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RESET_IN_B__CCM_RESET_IN_B			= IOMUX_PAD(0x344, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTCK__ARM11P_TOP_RTCK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTCK__ARM11P_TOP_RTCK				= IOMUX_PAD(0x5ec, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__ARM11P_TOP_EVNTBUS_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__ARM11P_TOP_EVNTBUS_18			= IOMUX_PAD(0x5d4, 0x190, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__CSPI2_SCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__CSPI2_SCLK				= IOMUX_PAD(0x5d4, 0x190, 1, 0x7e0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__EMI_NANDF_CE1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__EMI_NANDF_CE1				= IOMUX_PAD(0x5d4, 0x190, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__GPIO3_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__GPIO3_8					= IOMUX_PAD(0x5d4, 0x190, 5, 0x914, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__I2C3_SCL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__I2C3_SCL					= IOMUX_PAD(0x5d4, 0x190, 2, 0x91c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__IPU_CSI_D_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__IPU_CSI_D_0				= IOMUX_PAD(0x5d4, 0x190, 3, 0x930, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__KPP_COL_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__KPP_COL_6				= IOMUX_PAD(0x5d4, 0x190, 4, 0x968, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS1__UART1_RTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS1__UART1_RTS				= IOMUX_PAD(0x5d4, 0x190, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__AUDMUX_AUD5_RXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__AUDMUX_AUD5_RXC				= IOMUX_PAD(0x5e4, 0x1a0, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__CAN2_RXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__CAN2_RXCAN				= IOMUX_PAD(0x5e4, 0x1a0, 2, 0x7cc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__GPIO3_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__GPIO3_12					= IOMUX_PAD(0x5e4, 0x1a0, 5, 0x8f4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__IPU_CSI_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__IPU_CSI_D_2				= IOMUX_PAD(0x5e4, 0x1a0, 3, 0x938, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__KPP_ROW_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__KPP_ROW_6				= IOMUX_PAD(0x5e4, 0x1a0, 4, 0x988, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__SPDIF_SPDIF_IN1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__SPDIF_SPDIF_IN1				= IOMUX_PAD(0x5e4, 0x1a0, 1, 0x998, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__UART2_RTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__UART2_RTS				= IOMUX_PAD(0x5e4, 0x1a0, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RTS2__UART3_RXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RTS2__UART3_RXD_MUX				= IOMUX_PAD(0x5e4, 0x1a0, 7, 0x9a0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RW__EMI_EIM_RW	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RW__EMI_EIM_RW					= IOMUX_PAD(0x4a0, 0x0c4, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD1__ARM11P_TOP_EVNTBUS_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD1__ARM11P_TOP_EVNTBUS_16			= IOMUX_PAD(0x5cc, 0x188, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD1__CSPI2_MOSI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD1__CSPI2_MOSI				= IOMUX_PAD(0x5cc, 0x188, 1, 0x7ec, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD1__GPIO3_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD1__GPIO3_6					= IOMUX_PAD(0x5cc, 0x188, 5, 0x90c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD1__KPP_COL_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD1__KPP_COL_4				= IOMUX_PAD(0x5cc, 0x188, 4, 0x960, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD1__UART1_RXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD1__UART1_RXD_MUX				= IOMUX_PAD(0x5cc, 0x188, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD2__GPIO3_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD2__GPIO3_10					= IOMUX_PAD(0x5dc, 0x198, 5, 0x8ec, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD2__KPP_ROW_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD2__KPP_ROW_4				= IOMUX_PAD(0x5dc, 0x198, 4, 0x980, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_RXD2__UART2_RXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_RXD2__UART2_RXD_MUX				= IOMUX_PAD(0x5dc, 0x198, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK4__ARM11P_TOP_ARM_COREASID2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK4__ARM11P_TOP_ARM_COREASID2			= IOMUX_PAD(0x56c, 0x128, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK4__AUDMUX_AUD4_TXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK4__AUDMUX_AUD4_TXC				= IOMUX_PAD(0x56c, 0x128, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK4__GPIO2_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK4__GPIO2_30					= IOMUX_PAD(0x56c, 0x128, 5, 0x8c4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK5__ARM11P_TOP_ARM_COREASID6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK5__ARM11P_TOP_ARM_COREASID6			= IOMUX_PAD(0x57c, 0x138, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK5__AUDMUX_AUD5_TXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK5__AUDMUX_AUD5_TXC				= IOMUX_PAD(0x57c, 0x138, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK5__CSPI2_SCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK5__CSPI2_SCLK				= IOMUX_PAD(0x57c, 0x138, 2, 0x7e0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK5__GPIO1_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK5__GPIO1_2					= IOMUX_PAD(0x57c, 0x138, 5, 0x848, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCK5__SPDIF_SPDIF_EXTCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCK5__SPDIF_SPDIF_EXTCLK			= IOMUX_PAD(0x57c, 0x138, 1, 0x994, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKR__ARM11P_TOP_EVNTBUS_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKR__ARM11P_TOP_EVNTBUS_10			= IOMUX_PAD(0x584, 0x140, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKR__ESAI_SCKR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKR__ESAI_SCKR				= IOMUX_PAD(0x584, 0x140, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKR__GPIO1_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKR__GPIO1_4					= IOMUX_PAD(0x584, 0x140, 5, 0x850, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKT__ESAI_SCKT	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKT__ESAI_SCKT				= IOMUX_PAD(0x590, 0x14c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKT__GPIO1_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKT__GPIO1_7					= IOMUX_PAD(0x590, 0x14c, 5, 0x85c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKT__IPU_CSI_D_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKT__IPU_CSI_D_0				= IOMUX_PAD(0x590, 0x14c, 6, 0x930, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SCKT__KPP_ROW_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SCKT__KPP_ROW_2				= IOMUX_PAD(0x590, 0x14c, 7, 0x978, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD0__EMI_DRAM_D_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD0__EMI_DRAM_D_0				= IOMUX_PAD(0x3dc, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD10__EMI_DRAM_D_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD10__EMI_DRAM_D_10				= IOMUX_PAD(0x404, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD11__EMI_DRAM_D_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD11__EMI_DRAM_D_11				= IOMUX_PAD(0x408, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD12__EMI_DRAM_D_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD12__EMI_DRAM_D_12				= IOMUX_PAD(0x40c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD13__EMI_DRAM_D_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD13__EMI_DRAM_D_13				= IOMUX_PAD(0x410, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD14__EMI_DRAM_D_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD14__EMI_DRAM_D_14				= IOMUX_PAD(0x414, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD15__EMI_DRAM_D_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD15__EMI_DRAM_D_15				= IOMUX_PAD(0x418, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD16__EMI_DRAM_D_16	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD16__EMI_DRAM_D_16				= IOMUX_PAD(0x41c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD17__EMI_DRAM_D_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD17__EMI_DRAM_D_17				= IOMUX_PAD(0x420, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD18__EMI_DRAM_D_18	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD18__EMI_DRAM_D_18				= IOMUX_PAD(0x424, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD19__EMI_DRAM_D_19	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD19__EMI_DRAM_D_19				= IOMUX_PAD(0x428, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CLK__ARM11P_TOP_TRCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CLK__ARM11P_TOP_TRCLK			= IOMUX_PAD(0x698, 0x234, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CLK__ESDHC1_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CLK__ESDHC1_CLK				= IOMUX_PAD(0x698, 0x234, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CLK__GPIO1_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CLK__GPIO1_7				= IOMUX_PAD(0x698, 0x234, 5, 0x85c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CLK__IPU_DISPB_BCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CLK__IPU_DISPB_BCLK			= IOMUX_PAD(0x698, 0x234, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CLK__MSHC_BS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CLK__MSHC_BS				= IOMUX_PAD(0x698, 0x234, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CLK__USB_TOP_USBOTG_DATA_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CLK__USB_TOP_USBOTG_DATA_5			= IOMUX_PAD(0x698, 0x234, 4, 0x9b8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CMD__ARM11P_TOP_TRCTL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CMD__ARM11P_TOP_TRCTL			= IOMUX_PAD(0x694, 0x230, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CMD__ESDHC1_CMD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CMD__ESDHC1_CMD				= IOMUX_PAD(0x694, 0x230, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CMD__GPIO1_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CMD__GPIO1_6				= IOMUX_PAD(0x694, 0x230, 5, 0x858, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CMD__IPU_DISPB_D0_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CMD__IPU_DISPB_D0_VSYNC			= IOMUX_PAD(0x694, 0x230, 3, 0x924, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CMD__MSHC_SCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CMD__MSHC_SCLK				= IOMUX_PAD(0x694, 0x230, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_CMD__USB_TOP_USBOTG_DATA_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_CMD__USB_TOP_USBOTG_DATA_4			= IOMUX_PAD(0x694, 0x230, 4, 0x9b4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA0__ARM11P_TOP_TRACE_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA0__ARM11P_TOP_TRACE_23			= IOMUX_PAD(0x69c, 0x238, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA0__ESDHC1_DAT0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA0__ESDHC1_DAT0				= IOMUX_PAD(0x69c, 0x238, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA0__GPIO1_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA0__GPIO1_8				= IOMUX_PAD(0x69c, 0x238, 5, 0x860, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA0__IPU_DISPB_CS0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA0__IPU_DISPB_CS0			= IOMUX_PAD(0x69c, 0x238, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA0__MSHC_DATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA0__MSHC_DATA_0				= IOMUX_PAD(0x69c, 0x238, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA0__USB_TOP_USBOTG_DATA_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA0__USB_TOP_USBOTG_DATA_6		= IOMUX_PAD(0x69c, 0x238, 4, 0x9bc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA1__ARM11P_TOP_TRACE_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA1__ARM11P_TOP_TRACE_24			= IOMUX_PAD(0x6a0, 0x23c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA1__ESDHC1_DAT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA1__ESDHC1_DAT1				= IOMUX_PAD(0x6a0, 0x23c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA1__GPIO1_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA1__GPIO1_9				= IOMUX_PAD(0x6a0, 0x23c, 5, 0x864, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA1__IPU_DISPB_PAR_RS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA1__IPU_DISPB_PAR_RS			= IOMUX_PAD(0x6a0, 0x23c, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA1__MSHC_DATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA1__MSHC_DATA_1				= IOMUX_PAD(0x6a0, 0x23c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA1__USB_TOP_USBOTG_DATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA1__USB_TOP_USBOTG_DATA_0		= IOMUX_PAD(0x6a0, 0x23c, 4, 0x9a4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA2__ARM11P_TOP_TRACE_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA2__ARM11P_TOP_TRACE_25			= IOMUX_PAD(0x6a4, 0x240, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA2__ESDHC1_DAT2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA2__ESDHC1_DAT2				= IOMUX_PAD(0x6a4, 0x240, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA2__GPIO1_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA2__GPIO1_10				= IOMUX_PAD(0x6a4, 0x240, 5, 0x830, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA2__IPU_DISPB_WR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA2__IPU_DISPB_WR			= IOMUX_PAD(0x6a4, 0x240, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA2__MSHC_DATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA2__MSHC_DATA_2				= IOMUX_PAD(0x6a4, 0x240, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA2__USB_TOP_USBOTG_DATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA2__USB_TOP_USBOTG_DATA_1		= IOMUX_PAD(0x6a4, 0x240, 4, 0x9a8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA3__ARM11P_TOP_TRACE_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA3__ARM11P_TOP_TRACE_26			= IOMUX_PAD(0x6a8, 0x244, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA3__ESDHC1_DAT3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA3__ESDHC1_DAT3				= IOMUX_PAD(0x6a8, 0x244, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA3__GPIO1_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA3__GPIO1_11				= IOMUX_PAD(0x6a8, 0x244, 5, 0x834, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA3__IPU_DISPB_RD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA3__IPU_DISPB_RD			= IOMUX_PAD(0x6a8, 0x244, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA3__MSHC_DATA_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA3__MSHC_DATA_3				= IOMUX_PAD(0x6a8, 0x244, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1_DATA3__USB_TOP_USBOTG_DATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1_DATA3__USB_TOP_USBOTG_DATA_2		= IOMUX_PAD(0x6a8, 0x244, 4, 0x9ac, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD1__EMI_DRAM_D_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD1__EMI_DRAM_D_1				= IOMUX_PAD(0x3e0, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD20__EMI_DRAM_D_20	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD20__EMI_DRAM_D_20				= IOMUX_PAD(0x42c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD21__EMI_DRAM_D_21	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD21__EMI_DRAM_D_21				= IOMUX_PAD(0x430, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD22__EMI_DRAM_D_22	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD22__EMI_DRAM_D_22				= IOMUX_PAD(0x434, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD23__EMI_DRAM_D_23	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD23__EMI_DRAM_D_23				= IOMUX_PAD(0x438, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD24__EMI_DRAM_D_24	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD24__EMI_DRAM_D_24				= IOMUX_PAD(0x43c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD25__EMI_DRAM_D_25	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD25__EMI_DRAM_D_25				= IOMUX_PAD(0x440, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD26__EMI_DRAM_D_26	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD26__EMI_DRAM_D_26				= IOMUX_PAD(0x444, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD27__EMI_DRAM_D_27	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD27__EMI_DRAM_D_27				= IOMUX_PAD(0x448, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD28__EMI_DRAM_D_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD28__EMI_DRAM_D_28				= IOMUX_PAD(0x44c, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD29__EMI_DRAM_D_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD29__EMI_DRAM_D_29				= IOMUX_PAD(0x450, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__ESDHC1_DAT5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__ESDHC1_DAT5				= IOMUX_PAD(0x6b0, 0x24c, 2, 0x808, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__ESDHC2_CLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__ESDHC2_CLK				= IOMUX_PAD(0x6b0, 0x24c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__GPIO2_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__GPIO2_1				= IOMUX_PAD(0x6b0, 0x24c, 5, 0x894, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__I2C3_SDA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__I2C3_SDA				= IOMUX_PAD(0x6b0, 0x24c, 1, 0x920, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__IPU_CSI_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__IPU_CSI_D_3				= IOMUX_PAD(0x6b0, 0x24c, 3, 0x93c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__IPU_DISPB_CS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__IPU_DISPB_CS2				= IOMUX_PAD(0x6b0, 0x24c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__SPDIF_SPDIF_IN1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__SPDIF_SPDIF_IN1			= IOMUX_PAD(0x6b0, 0x24c, 6, 0x998, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CLK__USB_TOP_USBH2_DATA_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CLK__USB_TOP_USBH2_DATA_5			= IOMUX_PAD(0x6b0, 0x24c, 4, 0x9e0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__ESDHC1_DAT4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__ESDHC1_DAT4				= IOMUX_PAD(0x6ac, 0x248, 2, 0x804, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__ESDHC2_CMD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__ESDHC2_CMD				= IOMUX_PAD(0x6ac, 0x248, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__GPIO2_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__GPIO2_0				= IOMUX_PAD(0x6ac, 0x248, 5, 0x868, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__I2C3_SCL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__I2C3_SCL				= IOMUX_PAD(0x6ac, 0x248, 1, 0x91c, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__IPU_CSI_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__IPU_CSI_D_2				= IOMUX_PAD(0x6ac, 0x248, 3, 0x938, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__IPU_DISPB_D12_VSYNC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__IPU_DISPB_D12_VSYNC			= IOMUX_PAD(0x6ac, 0x248, 7, 0x928, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__SPDIF_SPDIF_OUT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__SPDIF_SPDIF_OUT1			= IOMUX_PAD(0x6ac, 0x248, 6, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_CMD__USB_TOP_USBH2_DATA_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_CMD__USB_TOP_USBH2_DATA_4			= IOMUX_PAD(0x6ac, 0x248, 4, 0x9dc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__ESDHC1_DAT6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__ESDHC1_DAT6				= IOMUX_PAD(0x6b4, 0x250, 2, 0x80c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__ESDHC2_DAT0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__ESDHC2_DAT0				= IOMUX_PAD(0x6b4, 0x250, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__GPIO2_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__GPIO2_2				= IOMUX_PAD(0x6b4, 0x250, 5, 0x8c0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__IPU_CSI_D_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__IPU_CSI_D_4				= IOMUX_PAD(0x6b4, 0x250, 3, 0x940, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__SPDIF_SPDIF_EXTCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__SPDIF_SPDIF_EXTCLK			= IOMUX_PAD(0x6b4, 0x250, 6, 0x994, 3, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__UART3_RXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__UART3_RXD_MUX			= IOMUX_PAD(0x6b4, 0x250, 1, 0x9a0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA0__USB_TOP_USBH2_DATA_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA0__USB_TOP_USBH2_DATA_6		= IOMUX_PAD(0x6b4, 0x250, 4, 0x9e4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA1__ESDHC1_DAT7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA1__ESDHC1_DAT7				= IOMUX_PAD(0x6b8, 0x254, 2, 0x810, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA1__ESDHC2_DAT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA1__ESDHC2_DAT1				= IOMUX_PAD(0x6b8, 0x254, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA1__GPIO2_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA1__GPIO2_3				= IOMUX_PAD(0x6b8, 0x254, 5, 0x8cc, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA1__IPU_CSI_D_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA1__IPU_CSI_D_5				= IOMUX_PAD(0x6b8, 0x254, 3, 0x944, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA1__UART3_TXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA1__UART3_TXD_MUX			= IOMUX_PAD(0x6b8, 0x254, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA1__USB_TOP_USBH2_DATA_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA1__USB_TOP_USBH2_DATA_0		= IOMUX_PAD(0x6b8, 0x254, 4, 0x9cc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA2__CAN1_RXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA2__CAN1_RXCAN				= IOMUX_PAD(0x6bc, 0x258, 2, 0x7c8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA2__ESDHC2_DAT2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA2__ESDHC2_DAT2				= IOMUX_PAD(0x6bc, 0x258, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA2__GPIO2_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA2__GPIO2_4				= IOMUX_PAD(0x6bc, 0x258, 5, 0x8d0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA2__IPU_CSI_D_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA2__IPU_CSI_D_6				= IOMUX_PAD(0x6bc, 0x258, 3, 0x948, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA2__UART3_RTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA2__UART3_RTS				= IOMUX_PAD(0x6bc, 0x258, 1, 0x99c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA2__USB_TOP_USBH2_DATA_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA2__USB_TOP_USBH2_DATA_1		= IOMUX_PAD(0x6bc, 0x258, 4, 0x9d0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA3__CAN1_TXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA3__CAN1_TXCAN				= IOMUX_PAD(0x6c0, 0x25c, 2, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA3__ESDHC2_DAT3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA3__ESDHC2_DAT3				= IOMUX_PAD(0x6c0, 0x25c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA3__GPIO2_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA3__GPIO2_5				= IOMUX_PAD(0x6c0, 0x25c, 5, 0x8d4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA3__IPU_CSI_D_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA3__IPU_CSI_D_7				= IOMUX_PAD(0x6c0, 0x25c, 3, 0x94c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA3__UART3_CTS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA3__UART3_CTS				= IOMUX_PAD(0x6c0, 0x25c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2_DATA3__USB_TOP_USBH2_DATA_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2_DATA3__USB_TOP_USBH2_DATA_2		= IOMUX_PAD(0x6c0, 0x25c, 4, 0x9d4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD2__EMI_DRAM_D_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD2__EMI_DRAM_D_2				= IOMUX_PAD(0x3e4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD30__EMI_DRAM_D_30	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD30__EMI_DRAM_D_30				= IOMUX_PAD(0x454, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD31__EMI_DRAM_D_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD31__EMI_DRAM_D_31				= IOMUX_PAD(0x458, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD3__EMI_DRAM_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD3__EMI_DRAM_D_3				= IOMUX_PAD(0x3e8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD4__EMI_DRAM_D_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD4__EMI_DRAM_D_4				= IOMUX_PAD(0x3ec, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD5__EMI_DRAM_D_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD5__EMI_DRAM_D_5				= IOMUX_PAD(0x3f0, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD6__EMI_DRAM_D_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD6__EMI_DRAM_D_6				= IOMUX_PAD(0x3f4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD7__EMI_DRAM_D_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD7__EMI_DRAM_D_7				= IOMUX_PAD(0x3f8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD8__EMI_DRAM_D_8	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD8__EMI_DRAM_D_8				= IOMUX_PAD(0x3fc, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SD9__EMI_DRAM_D_9	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SD9__EMI_DRAM_D_9				= IOMUX_PAD(0x400, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDBA0__EMI_EIM_SDBA0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDBA0__EMI_EIM_SDBA0				= IOMUX_PAD(0x3d8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDBA1__EMI_EIM_SDBA1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDBA1__EMI_EIM_SDBA1				= IOMUX_PAD(0x3d4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDCKE0__EMI_DRAM_SDCKE_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDCKE0__EMI_DRAM_SDCKE_0			= IOMUX_PAD(0x4b0, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDCKE1__EMI_DRAM_SDCKE_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDCKE1__EMI_DRAM_SDCKE_1			= IOMUX_PAD(0x4b4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDCLK__EMI_DRAM_SDCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDCLK__EMI_DRAM_SDCLK				= IOMUX_PAD(0x4b8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDQS0__EMI_DRAM_SDQS_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDQS0__EMI_DRAM_SDQS_0				= IOMUX_PAD(0x4bc, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDQS1__EMI_DRAM_SDQS_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDQS1__EMI_DRAM_SDQS_1				= IOMUX_PAD(0x4c0, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDQS2__EMI_DRAM_SDQS_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDQS2__EMI_DRAM_SDQS_2				= IOMUX_PAD(0x4c4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDQS3__EMI_DRAM_SDQS_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDQS3__EMI_DRAM_SDQS_3				= IOMUX_PAD(0x4c8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SDWE__EMI_DRAM_SDWE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SDWE__EMI_DRAM_SDWE				= IOMUX_PAD(0x4ac, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SJC_MOD__SJC_MOD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SJC_MOD__SJC_MOD				= IOMUX_PAD(0x608, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD4__ARM11P_TOP_ARM_COREASID1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD4__ARM11P_TOP_ARM_COREASID1		= IOMUX_PAD(0x568, 0x124, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD4__AUDMUX_AUD4_RXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD4__AUDMUX_AUD4_RXD				= IOMUX_PAD(0x568, 0x124, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD4__GPIO2_29	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD4__GPIO2_29				= IOMUX_PAD(0x568, 0x124, 5, 0x8bc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD5__ARM11P_TOP_ARM_COREASID5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD5__ARM11P_TOP_ARM_COREASID5		= IOMUX_PAD(0x578, 0x134, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD5__AUDMUX_AUD5_RXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD5__AUDMUX_AUD5_RXD				= IOMUX_PAD(0x578, 0x134, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD5__CSPI2_MISO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD5__CSPI2_MISO				= IOMUX_PAD(0x578, 0x134, 2, 0x7e8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD5__GPIO1_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD5__GPIO1_1					= IOMUX_PAD(0x578, 0x134, 5, 0x838, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_SRXD5__SPDIF_SPDIF_IN1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_SRXD5__SPDIF_SPDIF_IN1				= IOMUX_PAD(0x578, 0x134, 1, 0x998, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD4__ARM11P_TOP_ARM_COREASID0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD4__ARM11P_TOP_ARM_COREASID0		= IOMUX_PAD(0x564, 0x120, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD4__AUDMUX_AUD4_TXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD4__AUDMUX_AUD4_TXD				= IOMUX_PAD(0x564, 0x120, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD4__GPIO2_28	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD4__GPIO2_28				= IOMUX_PAD(0x564, 0x120, 5, 0x8b8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD5__ARM11P_TOP_ARM_COREASID4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD5__ARM11P_TOP_ARM_COREASID4		= IOMUX_PAD(0x574, 0x130, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD5__AUDMUX_AUD5_TXD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD5__AUDMUX_AUD5_TXD				= IOMUX_PAD(0x574, 0x130, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD5__CSPI2_MOSI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD5__CSPI2_MOSI				= IOMUX_PAD(0x574, 0x130, 2, 0x7ec, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD5__GPIO1_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD5__GPIO1_0					= IOMUX_PAD(0x574, 0x130, 5, 0x82c, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXD5__SPDIF_SPDIF_OUT1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXD5__SPDIF_SPDIF_OUT1			= IOMUX_PAD(0x574, 0x130, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS4__ARM11P_TOP_ARM_COREASID3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS4__ARM11P_TOP_ARM_COREASID3		= IOMUX_PAD(0x570, 0x12c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS			= IOMUX_PAD(0x570, 0x12c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS4__GPIO2_31	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS4__GPIO2_31				= IOMUX_PAD(0x570, 0x12c, 5, 0x8c8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS5__ARM11P_TOP_ARM_COREASID7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS5__ARM11P_TOP_ARM_COREASID7		= IOMUX_PAD(0x580, 0x13c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS5__AUDMUX_AUD5_TXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS5__AUDMUX_AUD5_TXFS			= IOMUX_PAD(0x580, 0x13c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS5__CSPI2_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS5__CSPI2_RDY				= IOMUX_PAD(0x580, 0x13c, 2, 0x7e4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_STXFS5__GPIO1_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_STXFS5__GPIO1_3				= IOMUX_PAD(0x580, 0x13c, 5, 0x84c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TCK__SJC_TCK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TCK__SJC_TCK					= IOMUX_PAD(0x5f0, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TDI__SJC_TDI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TDI__SJC_TDI					= IOMUX_PAD(0x5f8, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TDO__SJC_TDO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TDO__SJC_TDO					= IOMUX_PAD(0x5fc, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TEST_MODE__TCU_TEST_MODE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TEST_MODE__TCU_TEST_MODE			= IOMUX_PAD(0x790, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TMS__SJC_TMS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TMS__SJC_TMS					= IOMUX_PAD(0x5f4, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TRSTB__SJC_TRSTB	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TRSTB__SJC_TRSTB				= IOMUX_PAD(0x600, 0x0,   0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__CSPI1_SS3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__CSPI1_SS3					= IOMUX_PAD(0x5b0, 0x16c, 2, 0x7dc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__EMI_DTACK_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__EMI_DTACK_B				= IOMUX_PAD(0x5b0, 0x16c, 3, 0x800, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__ESAI_TX0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__ESAI_TX0					= IOMUX_PAD(0x5b0, 0x16c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__GPIO1_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__GPIO1_15					= IOMUX_PAD(0x5b0, 0x16c, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__IPU_CSI_D_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__IPU_CSI_D_7				= IOMUX_PAD(0x5b0, 0x16c, 6, 0x94c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__KPP_COL_2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__KPP_COL_2					= IOMUX_PAD(0x5b0, 0x16c, 7, 0x958, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__SPDIF_SPDIF_EXTCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__SPDIF_SPDIF_EXTCLK			= IOMUX_PAD(0x5b0, 0x16c, 1, 0x994, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX0__UART2_DCD	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX0__UART2_DCD					= IOMUX_PAD(0x5b0, 0x16c, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__CCM_PMIC_RDY				= IOMUX_PAD(0x5ac, 0x168, 1, 0x7d4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__CSPI1_SS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__CSPI1_SS2					= IOMUX_PAD(0x5ac, 0x168, 2, 0x7d8, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__EMI_NANDF_CE3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__EMI_NANDF_CE3				= IOMUX_PAD(0x5ac, 0x168, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__ESAI_TX1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__ESAI_TX1					= IOMUX_PAD(0x5ac, 0x168, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__GPIO1_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__GPIO1_14					= IOMUX_PAD(0x5ac, 0x168, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__IPU_CSI_D_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__IPU_CSI_D_6				= IOMUX_PAD(0x5ac, 0x168, 6, 0x948, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__KPP_COL_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__KPP_COL_1					= IOMUX_PAD(0x5ac, 0x168, 7, 0x954, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX1__UART2_RI	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX1__UART2_RI					= IOMUX_PAD(0x5ac, 0x168, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX2_RX3__EMI_NANDF_CE2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX2_RX3__EMI_NANDF_CE2				= IOMUX_PAD(0x5a8, 0x164, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX2_RX3__ESAI_TX2_RX3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX2_RX3__ESAI_TX2_RX3				= IOMUX_PAD(0x5a8, 0x164, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX2_RX3__GPIO1_13	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX2_RX3__GPIO1_13				= IOMUX_PAD(0x5a8, 0x164, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX2_RX3__I2C3_SDA	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX2_RX3__I2C3_SDA				= IOMUX_PAD(0x5a8, 0x164, 1, 0x920, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX2_RX3__IPU_CSI_D_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX2_RX3__IPU_CSI_D_5				= IOMUX_PAD(0x5a8, 0x164, 6, 0x944, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX2_RX3__KPP_COL_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX2_RX3__KPP_COL_0				= IOMUX_PAD(0x5a8, 0x164, 7, 0x950, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX3_RX2__EMI_NANDF_CE1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX3_RX2__EMI_NANDF_CE1				= IOMUX_PAD(0x5a4, 0x160, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX3_RX2__ESAI_TX3_RX2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX3_RX2__ESAI_TX3_RX2				= IOMUX_PAD(0x5a4, 0x160, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX3_RX2__GPIO1_12	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX3_RX2__GPIO1_12				= IOMUX_PAD(0x5a4, 0x160, 5, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX3_RX2__I2C3_SCL	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX3_RX2__I2C3_SCL				= IOMUX_PAD(0x5a4, 0x160, 1, 0x91c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX3_RX2__IPU_CSI_D_4	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX3_RX2__IPU_CSI_D_4				= IOMUX_PAD(0x5a4, 0x160, 6, 0x940, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX3_RX2__KPP_ROW_1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX3_RX2__KPP_ROW_1				= IOMUX_PAD(0x5a4, 0x160, 7, 0x974, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__AUDMUX_AUD4_RXFS	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__AUDMUX_AUD4_RXFS			= IOMUX_PAD(0x5a0, 0x15c, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__CAN2_RXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__CAN2_RXCAN				= IOMUX_PAD(0x5a0, 0x15c, 3, 0x7cc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__CSPI2_SS3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__CSPI2_SS3				= IOMUX_PAD(0x5a0, 0x15c, 2, 0x7fc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__ESAI_TX4_RX1	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__ESAI_TX4_RX1				= IOMUX_PAD(0x5a0, 0x15c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__GPIO1_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__GPIO1_11				= IOMUX_PAD(0x5a0, 0x15c, 5, 0x834, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__IPU_CSI_D_3	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__IPU_CSI_D_3				= IOMUX_PAD(0x5a0, 0x15c, 6, 0x93c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__KPP_ROW_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__KPP_ROW_0				= IOMUX_PAD(0x5a0, 0x15c, 7, 0x970, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX4_RX1__UART2_DSR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX4_RX1__UART2_DSR				= IOMUX_PAD(0x5a0, 0x15c, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__AUDMUX_AUD4_RXC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__AUDMUX_AUD4_RXC			= IOMUX_PAD(0x59c, 0x158, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__CAN2_TXCAN	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__CAN2_TXCAN				= IOMUX_PAD(0x59c, 0x158, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__CSPI2_SS2	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__CSPI2_SS2				= IOMUX_PAD(0x59c, 0x158, 2, 0x7f8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__EMI_M3IF_CHOSEN_MASTER_0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__EMI_M3IF_CHOSEN_MASTER_0		= IOMUX_PAD(0x59c, 0x158, 7, 0x0,   0, NO_PAD_CTRL)/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__ESAI_TX5_RX0	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__ESAI_TX5_RX0				= IOMUX_PAD(0x59c, 0x158, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__GPIO1_10	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__GPIO1_10				= IOMUX_PAD(0x59c, 0x158, 5, 0x830, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TX5_RX0__UART2_DTR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TX5_RX0__UART2_DTR				= IOMUX_PAD(0x59c, 0x158, 4, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD1__ARM11P_TOP_EVNTBUS_17	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD1__ARM11P_TOP_EVNTBUS_17			= IOMUX_PAD(0x5d0, 0x18c, 7, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD1__CSPI2_MISO	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD1__CSPI2_MISO				= IOMUX_PAD(0x5d0, 0x18c, 1, 0x7e8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD1__GPIO3_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD1__GPIO3_7					= IOMUX_PAD(0x5d0, 0x18c, 5, 0x910, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD1__KPP_COL_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD1__KPP_COL_5				= IOMUX_PAD(0x5d0, 0x18c, 4, 0x964, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD1__UART1_TXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD1__UART1_TXD_MUX				= IOMUX_PAD(0x5d0, 0x18c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD2__GPIO3_11	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD2__GPIO3_11					= IOMUX_PAD(0x5e0, 0x19c, 5, 0x8f0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD2__KPP_ROW_5	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD2__KPP_ROW_5				= IOMUX_PAD(0x5e0, 0x19c, 4, 0x984, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD2__SPDIF_SPDIF_EXTCLK	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD2__SPDIF_SPDIF_EXTCLK			= IOMUX_PAD(0x5e0, 0x19c, 1, 0x994, 2, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_TXD2__UART2_TXD_MUX	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_TXD2__UART2_TXD_MUX				= IOMUX_PAD(0x5e0, 0x19c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_USBOTG_OC__GPIO3_15	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_USBOTG_OC__GPIO3_15				= IOMUX_PAD(0x610, 0x1ac, 5, 0x900, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_USBOTG_OC__USB_TOP_USBH2_OC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_USBOTG_OC__USB_TOP_USBH2_OC			= IOMUX_PAD(0x610, 0x1ac, 1, 0x9f4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC			= IOMUX_PAD(0x610, 0x1ac, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_USBOTG_PWR__GPIO3_14	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_USBOTG_PWR__GPIO3_14				= IOMUX_PAD(0x60c, 0x1a8, 5, 0x8fc, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_USBOTG_PWR__USB_TOP_USBH2_PWR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_USBOTG_PWR__USB_TOP_USBH2_PWR			= IOMUX_PAD(0x60c, 0x1a8, 1, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR			= IOMUX_PAD(0x60c, 0x1a8, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_VSTBY__CCM_VSTBY	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_VSTBY__CCM_VSTBY				= IOMUX_PAD(0x364, 0x024, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_VSTBY__GPIO1_7	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_VSTBY__GPIO1_7					= IOMUX_PAD(0x364, 0x024, 5, 0x85c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_WDOG_RST__GPIO1_6	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_WDOG_RST__GPIO1_6				= IOMUX_PAD(0x330, 0x00c, 5, 0x858, 0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_WDOG_RST__IPU_FLASH_STROBE	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_WDOG_RST__IPU_FLASH_STROBE			= IOMUX_PAD(0x330, 0x00c, 3, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX35_PAD_WDOG_RST__WDOG_WDOG_B	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^	MX35_PAD_WDOG_RST__WDOG_WDOG_B				= IOMUX_PAD(0x330, 0x00c, 0, 0x0,   0, NO_PAD_CTRL),$/;"	e	enum:__anon2b0bc16d0103
MX5	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX5$/;"	c
MX51	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX51$/;"	c
MX51EVK_LCD_3V3	board/freescale/mx51evk/mx51evk_video.c	/^#define MX51EVK_LCD_3V3	/;"	d	file:
MX51EVK_LCD_5V	board/freescale/mx51evk/mx51evk_video.c	/^#define MX51EVK_LCD_5V	/;"	d	file:
MX51EVK_LCD_BACKLIGHT	board/freescale/mx51evk/mx51evk_video.c	/^#define MX51EVK_LCD_BACKLIGHT	/;"	d	file:
MX51EVK_USBH1_HUB_RST	board/freescale/mx51evk/mx51evk.c	/^#define MX51EVK_USBH1_HUB_RST	/;"	d	file:
MX51EVK_USBH1_STP	board/freescale/mx51evk/mx51evk.c	/^#define MX51EVK_USBH1_STP	/;"	d	file:
MX51EVK_USB_CLK_EN_B	board/freescale/mx51evk/mx51evk.c	/^#define MX51EVK_USB_CLK_EN_B	/;"	d	file:
MX51EVK_USB_PHY_RESET	board/freescale/mx51evk/mx51evk.c	/^#define MX51EVK_USB_PHY_RESET	/;"	d	file:
MX51_ECSPI_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_ECSPI_PAD_CTRL	/;"	d
MX51_ESDHC_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_ESDHC_PAD_CTRL	/;"	d
MX51_GPIO_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_GPIO_PAD_CTRL	/;"	d
MX51_GRP_DDRAPKS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDRAPKS			= IOMUX_PAD(0x87c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DDRAPUS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDRAPUS			= IOMUX_PAD(0x84c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DDRPKS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDRPKS				= IOMUX_PAD(0x820, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DDRPUS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDRPUS				= IOMUX_PAD(0x884, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DDR_A0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDR_A0				= IOMUX_PAD(0x83c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DDR_A1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDR_A1				= IOMUX_PAD(0x848, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DDR_SR_A1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DDR_SR_A1			= IOMUX_PAD(0x8bc, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_B0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_B0			= IOMUX_PAD(0x8a4, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_B1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_B1			= IOMUX_PAD(0x8ac, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_B2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_B2			= IOMUX_PAD(0x8b8, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_B4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_B4			= IOMUX_PAD(0x82c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_SR_B0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_SR_B0			= IOMUX_PAD(0x878, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_SR_B1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_SR_B1			= IOMUX_PAD(0x880, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_SR_B2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_SR_B2			= IOMUX_PAD(0x88c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_DRAM_SR_B4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_DRAM_SR_B4			= IOMUX_PAD(0x89c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_HYSDDR0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_HYSDDR0			= IOMUX_PAD(0x85c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_HYSDDR1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_HYSDDR1			= IOMUX_PAD(0x864, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_HYSDDR2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_HYSDDR2			= IOMUX_PAD(0x86c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_HYSDDR3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_HYSDDR3			= IOMUX_PAD(0x874, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_INMODE1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_INMODE1			= IOMUX_PAD(0x8a0, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_PKEADDR	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_PKEADDR			= IOMUX_PAD(0x890, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_GRP_PKEDDR	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_GRP_PKEDDR				= IOMUX_PAD(0x838, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_I2C_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_I2C_PAD_CTRL	/;"	d
MX51_PAD_CSI2_D12__GPIO4_9	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSI2_D12__GPIO4_9		= IOMUX_PAD(0x5bc, 0x1cc, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSI2_D13__GPIO4_10	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSI2_D13__GPIO4_10		= IOMUX_PAD(0x5c0, 0x1d0, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_MISO__ECSPI1_MISO	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_MISO__ECSPI1_MISO	= IOMUX_PAD(0x604, 0x214, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	= IOMUX_PAD(0x600, 0x210, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_RDY__ECSPI1_RDY	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_RDY__ECSPI1_RDY		= IOMUX_PAD(0x610, 0x220, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_RDY__GPIO4_26	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_RDY__GPIO4_26		= IOMUX_PAD(0x610, 0x220, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	= IOMUX_PAD(0x614, 0x224, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_SS0__ECSPI1_SS0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_SS0__ECSPI1_SS0		= IOMUX_PAD(0x608, 0x218, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_SS0__GPIO4_24	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_SS0__GPIO4_24		= IOMUX_PAD(0x608, 0x218, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_SS1__ECSPI1_SS1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_SS1__ECSPI1_SS1		= IOMUX_PAD(0x60c, 0x21c, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CSPI1_SS1__GPIO4_25	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_CSPI1_SS1__GPIO4_25		= IOMUX_PAD(0x60c, 0x21c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_CTRL_2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_PAD_CTRL_2	/;"	d
MX51_PAD_CTRL_4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_PAD_CTRL_4	/;"	d
MX51_PAD_CTRL_5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_PAD_CTRL_5	/;"	d
MX51_PAD_DI1_D0_CS__GPIO3_3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_D0_CS__GPIO3_3		= IOMUX_PAD(0x6b4, 0x2b4, 4, 0x980, 1, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI1_D1_CS__GPIO3_4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_D1_CS__GPIO3_4		= IOMUX_PAD(0x6b8, 0x2b8, 4, 0x984, 1, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI1_PIN11__ECSPI1_SS2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_PIN11__ECSPI1_SS2		= IOMUX_PAD(0x6a8, 0x2a8, 7, __NA_, 0, MX51_ECSPI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI1_PIN12__GPIO3_1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_PIN12__GPIO3_1		= IOMUX_PAD(0x6ac, 0x2ac, 4, 0x978, 1, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI1_PIN13__GPIO3_2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_PIN13__GPIO3_2		= IOMUX_PAD(0x6b0, 0x2b0, 4, 0x97c, 1, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI1_PIN2__DI1_PIN2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_PIN2__DI1_PIN2		= IOMUX_PAD(0x734, 0x330, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI1_PIN3__DI1_PIN3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI1_PIN3__DI1_PIN3		= IOMUX_PAD(0x72c, 0x32c, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	= IOMUX_PAD(0x754, 0x34c, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI2_PIN2__FEC_MDC	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI2_PIN2__FEC_MDC		= IOMUX_PAD(0x74C, 0x344, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT10__FEC_COL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT10__FEC_COL		= IOMUX_PAD(0x784, 0x37C, 2, 0x94c, 0x1, MX51_PAD_CTRL_2),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT11__FEC_RXCLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT11__FEC_RXCLK		= IOMUX_PAD(0x788, 0x380, 2, 0x968, 0x1, MX51_PAD_CTRL_2),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT12__FEC_RX_DV	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT12__FEC_RX_DV		= IOMUX_PAD(0x78C, 0x384, 2, 0x96c, 0x1, MX51_PAD_CTRL_4),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT13__FEC_TX_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT13__FEC_TX_CLK	= IOMUX_PAD(0x790, 0x388, 2, 0x974, 0x1, MX51_PAD_CTRL_4),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT14__FEC_RDAT0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT14__FEC_RDAT0		= IOMUX_PAD(0x794, 0x38C, 2, 0x958, 0x1, MX51_PAD_CTRL_4),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT15__FEC_TDAT0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT15__FEC_TDAT0		= IOMUX_PAD(0x798, 0x390, 2, 0x0, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT6__FEC_TDAT1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT6__FEC_TDAT1		= IOMUX_PAD(0x774, 0x36C, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT7__FEC_TDAT2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT7__FEC_TDAT2		= IOMUX_PAD(0x778, 0x370, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT8__FEC_TDAT3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT8__FEC_TDAT3		= IOMUX_PAD(0x77C, 0x374, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISP2_DAT9__FEC_TX_EN	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISP2_DAT9__FEC_TX_EN		= IOMUX_PAD(0x780, 0x378, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISPB2_SER_DIN__GPIO3_5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISPB2_SER_DIN__GPIO3_5	= IOMUX_PAD(0x6bc, 0x2bc, 4, 0x988, 1, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DISPB2_SER_DIO__GPIO3_6	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DISPB2_SER_DIO__GPIO3_6	= IOMUX_PAD(0x6c0, 0x2c0, 4, 0x98c, 1, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DI_GP4__DI2_PIN15	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DI_GP4__DI2_PIN15		= IOMUX_PAD(0x758, 0x350, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_CAS__DRAM_CAS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_CAS__DRAM_CAS		= IOMUX_PAD(0x4a8, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_CS0__DRAM_CS0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_CS0__DRAM_CS0		= IOMUX_PAD(0x4cc, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_CS1__DRAM_CS1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_CS1__DRAM_CS1		= IOMUX_PAD(0x4d0, 0x104, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_DQM0__DRAM_DQM0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_DQM0__DRAM_DQM0		= IOMUX_PAD(0x4d4, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_DQM1__DRAM_DQM1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_DQM1__DRAM_DQM1		= IOMUX_PAD(0x4d8, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_DQM2__DRAM_DQM2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_DQM2__DRAM_DQM2		= IOMUX_PAD(0x4dc, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_DQM3__DRAM_DQM3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_DQM3__DRAM_DQM3		= IOMUX_PAD(0x4e0, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_RAS__DRAM_RAS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_RAS__DRAM_RAS		= IOMUX_PAD(0x4a4, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDCKE0__DRAM_SDCKE0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDCKE0__DRAM_SDCKE0	= IOMUX_PAD(0x4b0, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDCKE1__DRAM_SDCKE1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDCKE1__DRAM_SDCKE1	= IOMUX_PAD(0x4b4, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDCLK__DRAM_SDCLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDCLK__DRAM_SDCLK		= IOMUX_PAD(0x4b8, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDQS0__DRAM_SDQS0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDQS0__DRAM_SDQS0		= IOMUX_PAD(0x4bc, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDQS1__DRAM_SDQS1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDQS1__DRAM_SDQS1		= IOMUX_PAD(0x4c0, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDQS2__DRAM_SDQS2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDQS2__DRAM_SDQS2		= IOMUX_PAD(0x4c4, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDQS3__DRAM_SDQS3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDQS3__DRAM_SDQS3		= IOMUX_PAD(0x4c8, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_DRAM_SDWE__DRAM_SDWE	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_DRAM_SDWE__DRAM_SDWE		= IOMUX_PAD(0x4ac, __NA_, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A16__GPIO2_10	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A16__GPIO2_10		= IOMUX_PAD(0x430, 0x09c, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A17__GPIO2_11	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A17__GPIO2_11		= IOMUX_PAD(0x434, 0x0a0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A20__GPIO2_14	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A20__GPIO2_14		= IOMUX_PAD(0x440, 0x0ac, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A22__GPIO2_16	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A22__GPIO2_16		= IOMUX_PAD(0x448, 0x0b4, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A24__USBH2_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A24__USBH2_CLK		= IOMUX_PAD(0x450, 0x0bc, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A25__USBH2_DIR	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A25__USBH2_DIR		= IOMUX_PAD(0x454, 0x0c0, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A26__GPIO2_20	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A26__GPIO2_20		= IOMUX_PAD(0x458, 0x0c4, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A26__USBH2_STP	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A26__USBH2_STP		= IOMUX_PAD(0x458, 0x0c4, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_A27__USBH2_NXT	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_A27__USBH2_NXT		= IOMUX_PAD(0x45c, 0x0c8, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS0__GPIO2_25	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS0__GPIO2_25		= IOMUX_PAD(0x474, 0x0e0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS2__FEC_RDATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS2__FEC_RDATA2		= IOMUX_PAD(0x47c, 0x0e8, 3, 0x960, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS2__GPIO2_27	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS2__GPIO2_27		= IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS3__FEC_RDATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS3__FEC_RDATA3		= IOMUX_PAD(0x480, 0x0ec, 3, 0x964, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS3__GPIO2_28	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS3__GPIO2_28		= IOMUX_PAD(0x480, 0x0ec, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS4__FEC_RX_ER	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS4__FEC_RX_ER		= IOMUX_PAD(0x484, 0x0f0, 3, 0x970, 0, MX51_PAD_CTRL_2),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS4__GPIO2_29	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS4__GPIO2_29		= IOMUX_PAD(0x484, 0x0f0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_CS5__FEC_CRS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_CS5__FEC_CRS		= IOMUX_PAD(0x488, 0x0f4, 3, 0x950, 0, MX51_PAD_CTRL_2),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D16__USBH2_DATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D16__USBH2_DATA0		= IOMUX_PAD(0x3f0, 0x05c, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D17__GPIO2_1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D17__GPIO2_1		= IOMUX_PAD(0x3f4, 0x060, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D17__USBH2_DATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D17__USBH2_DATA1		= IOMUX_PAD(0x3f4, 0x060, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D18__USBH2_DATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D18__USBH2_DATA2		= IOMUX_PAD(0x3f8, 0x064, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D19__USBH2_DATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D19__USBH2_DATA3		= IOMUX_PAD(0x3fc, 0x068, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D20__USBH2_DATA4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D20__USBH2_DATA4		= IOMUX_PAD(0x400, 0x06c, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D21__GPIO2_5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D21__GPIO2_5		= IOMUX_PAD(0x404, 0x070, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D21__USBH2_DATA5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D21__USBH2_DATA5		= IOMUX_PAD(0x404, 0x070, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D22__USBH2_DATA6	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D22__USBH2_DATA6		= IOMUX_PAD(0x408, 0x074, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D23__USBH2_DATA7	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D23__USBH2_DATA7		= IOMUX_PAD(0x40c, 0x078, 2, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D25__UART3_RXD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D25__UART3_RXD		= IOMUX_PAD(0x414, 0x080, 3, 0x9f4, 0, MX51_UART_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D26__UART3_TXD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D26__UART3_TXD		= IOMUX_PAD(0x418, 0x084, 3, __NA_, 0, MX51_UART_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_D27__GPIO2_9	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_D27__GPIO2_9		= IOMUX_PAD(0x41c, 0x088, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_EB2__FEC_MDIO	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_EB2__FEC_MDIO		= IOMUX_PAD(0x468, 0x0d4, 3, 0x954, 0, PAD_CTL_PUS_22K_UP | PAD_CTL/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_EB3__FEC_RDATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_EB3__FEC_RDATA1		= IOMUX_PAD(0x46c, 0x0d8, 3, 0x95c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_EIM_EB3__GPIO2_23	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_EIM_EB3__GPIO2_23		= IOMUX_PAD(0x46c, 0x0d8, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_0__GPIO1_0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_0__GPIO1_0		= IOMUX_PAD(0x7b4, 0x3ac, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_0__SD1_CD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_0__SD1_CD		= IOMUX_PAD(0x7b4, 0x3ac, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_1__SD1_WP	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_1__SD1_WP		= IOMUX_PAD(0x7b8, 0x3b0, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_2__GPIO1_2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_2__GPIO1_2		= IOMUX_PAD(0x7d4, 0x3cc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_2__PWM1_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_2__PWM1_PWMO		= IOMUX_PAD(0x7d4, 0x3cc, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_3__GPIO1_3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_3__GPIO1_3		= IOMUX_PAD(0x7d8, 0x3d0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_5__GPIO1_5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_5__GPIO1_5		= IOMUX_PAD(0x808, 0x3dc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_6__GPIO1_6	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_6__GPIO1_6		= IOMUX_PAD(0x80c, 0x3e0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_7__GPIO1_7	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_7__GPIO1_7		= IOMUX_PAD(0x810, 0x3e4, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_7__SD2_WP	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_7__SD2_WP		= IOMUX_PAD(0x810, 0x3e4, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO1_8__SD2_CD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO1_8__SD2_CD		= IOMUX_PAD(0x814, 0x3e8, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_GPIO_NAND__PATA_INTRQ	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_GPIO_NAND__PATA_INTRQ		= IOMUX_PAD(0x514, 0x12c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_ALE__PATA_BUFFER_EN	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_ALE__PATA_BUFFER_EN	= IOMUX_PAD(0x4ec, 0x110, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CLE__PATA_RESET_B	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CLE__PATA_RESET_B	= IOMUX_PAD(0x4f0, 0x114, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS2__FEC_TX_ER	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS2__FEC_TX_ER		= IOMUX_PAD(0x520, 0x138, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS2__PATA_CS_0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS2__PATA_CS_0		= IOMUX_PAD(0x520, 0x138, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS3__FEC_MDC	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS3__FEC_MDC		= IOMUX_PAD(0x524, 0x13c, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS3__PATA_CS_1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS3__PATA_CS_1		= IOMUX_PAD(0x524, 0x13c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS4__FEC_TDATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS4__FEC_TDATA1		= IOMUX_PAD(0x528, 0x140, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS4__PATA_DA_0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS4__PATA_DA_0		= IOMUX_PAD(0x528, 0x140, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS5__FEC_TDATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS5__FEC_TDATA2		= IOMUX_PAD(0x52c, 0x144, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS5__PATA_DA_1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS5__PATA_DA_1		= IOMUX_PAD(0x52c, 0x144, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS6__FEC_TDATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS6__FEC_TDATA3		= IOMUX_PAD(0x530, 0x148, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS6__PATA_DA_2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS6__PATA_DA_2		= IOMUX_PAD(0x530, 0x148, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_CS7__FEC_TX_EN	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_CS7__FEC_TX_EN		= IOMUX_PAD(0x534, 0x14c, 1, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D0__PATA_DATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D0__PATA_DATA0		= IOMUX_PAD(0x578, 0x190, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D10__GPIO3_30	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D10__GPIO3_30		= IOMUX_PAD(0x550, 0x168, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D10__PATA_DATA10	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D10__PATA_DATA10		= IOMUX_PAD(0x550, 0x168, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D11__FEC_RX_DV	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D11__FEC_RX_DV		= IOMUX_PAD(0x54c, 0x164, 2, 0x96c, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D11__PATA_DATA11	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D11__PATA_DATA11		= IOMUX_PAD(0x54c, 0x164, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D12__PATA_DATA12	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D12__PATA_DATA12		= IOMUX_PAD(0x548, 0x160, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D13__GPIO3_27	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D13__GPIO3_27		= IOMUX_PAD(0x544, 0x15c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D13__PATA_DATA13	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D13__PATA_DATA13		= IOMUX_PAD(0x544, 0x15c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D14__GPIO3_26	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D14__GPIO3_26		= IOMUX_PAD(0x540, 0x158, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D14__PATA_DATA14	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D14__PATA_DATA14		= IOMUX_PAD(0x540, 0x158, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D15__GPIO3_25	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D15__GPIO3_25		= IOMUX_PAD(0x53c, 0x154, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D15__PATA_DATA15	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D15__PATA_DATA15		= IOMUX_PAD(0x53c, 0x154, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D1__PATA_DATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D1__PATA_DATA1		= IOMUX_PAD(0x574, 0x18c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D2__PATA_DATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D2__PATA_DATA2		= IOMUX_PAD(0x570, 0x188, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D3__PATA_DATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D3__PATA_DATA3		= IOMUX_PAD(0x56c, 0x184, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D4__PATA_DATA4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D4__PATA_DATA4		= IOMUX_PAD(0x568, 0x180, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D5__PATA_DATA5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D5__PATA_DATA5		= IOMUX_PAD(0x564, 0x17c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D6__PATA_DATA6	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D6__PATA_DATA6		= IOMUX_PAD(0x560, 0x178, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D7__PATA_DATA7	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D7__PATA_DATA7		= IOMUX_PAD(0x55c, 0x174, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D8__FEC_TDATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D8__FEC_TDATA0		= IOMUX_PAD(0x558, 0x170, 2, __NA_, 0, MX51_PAD_CTRL_5),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D8__PATA_DATA8	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D8__PATA_DATA8		= IOMUX_PAD(0x558, 0x170, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D9__FEC_RDATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D9__FEC_RDATA0		= IOMUX_PAD(0x554, 0x16c, 0x12, 0x958, 0, MX51_PAD_CTRL_4),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D9__GPIO3_31	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D9__GPIO3_31		= IOMUX_PAD(0x554, 0x16c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_D9__PATA_DATA9	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_D9__PATA_DATA9		= IOMUX_PAD(0x554, 0x16c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RB0__PATA_DMARQ	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RB0__PATA_DMARQ		= IOMUX_PAD(0x4f8, 0x11c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RB1__PATA_IORDY	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RB1__PATA_IORDY		= IOMUX_PAD(0x4fc, 0x120, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RB2__FEC_COL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RB2__FEC_COL		= IOMUX_PAD(0x500, 0x124, 1, 0x94c, 0, MX51_PAD_CTRL_2),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RB2__GPIO3_10	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RB2__GPIO3_10		= IOMUX_PAD(0x500, 0x124, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RB3__FEC_RX_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RB3__FEC_RX_CLK		= IOMUX_PAD(0x504, 0x128, 1, 0x968, 0, MX51_PAD_CTRL_2),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RB3__GPIO3_11	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RB3__GPIO3_11		= IOMUX_PAD(0x504, 0x128, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	= IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_PAD_CTRL_4),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_RE_B__PATA_DIOR	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_RE_B__PATA_DIOR		= IOMUX_PAD(0x4e8, 0x10c, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_WE_B__PATA_DIOW	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_WE_B__PATA_DIOW		= IOMUX_PAD(0x4e4, 0x108, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_NANDF_WP_B__PATA_DMACK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_NANDF_WP_B__PATA_DMACK		= IOMUX_PAD(0x4f4, 0x118, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD1_CLK__SD1_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD1_CLK__SD1_CLK		= IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_/;"	e	enum:__anon992b5d380103
MX51_PAD_SD1_CMD__SD1_CMD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD1_CMD__SD1_CMD		= IOMUX_PAD(0x79c, 0x394, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD1_DATA0__SD1_DATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD1_DATA0__SD1_DATA0		= IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD1_DATA1__SD1_DATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD1_DATA1__SD1_DATA1		= IOMUX_PAD(0x7a8, 0x3a0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD1_DATA2__SD1_DATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD1_DATA2__SD1_DATA2		= IOMUX_PAD(0x7ac, 0x3a4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD1_DATA3__SD1_DATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD1_DATA3__SD1_DATA3		= IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD2_CLK__SD2_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD2_CLK__SD2_CLK		= IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_/;"	e	enum:__anon992b5d380103
MX51_PAD_SD2_CMD__SD2_CMD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD2_CMD__SD2_CMD		= IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD2_DATA0__SD2_DATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD2_DATA0__SD2_DATA0		= IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD2_DATA1__SD2_DATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD2_DATA1__SD2_DATA1		= IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD2_DATA2__SD2_DATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD2_DATA2__SD2_DATA2		= IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_SD2_DATA3__SD2_DATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_SD2_DATA3__SD2_DATA3		= IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_UART1_CTS__UART1_CTS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_UART1_CTS__UART1_CTS		= IOMUX_PAD(0x624, 0x234, 0, __NA_, 0, MX51_UART_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_UART1_RTS__UART1_RTS	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_UART1_RTS__UART1_RTS		= IOMUX_PAD(0x620, 0x230, 0, 0x9e0, 0, MX51_UART_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_UART1_RXD__UART1_RXD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_UART1_RXD__UART1_RXD		= IOMUX_PAD(0x618, 0x228, 0, 0x9e4, 0, MX51_UART_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_UART1_TXD__UART1_TXD	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_UART1_TXD__UART1_TXD		= IOMUX_PAD(0x61c, 0x22c, 0, __NA_, 0, MX51_UART_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_CLK__USBH1_CLK	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_CLK__USBH1_CLK		= IOMUX_PAD(0x678, 0x278, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA0__USBH1_DATA0	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA0__USBH1_DATA0	= IOMUX_PAD(0x688, 0x288, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA1__USBH1_DATA1	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA1__USBH1_DATA1	= IOMUX_PAD(0x68c, 0x28c, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA2__USBH1_DATA2	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA2__USBH1_DATA2	= IOMUX_PAD(0x690, 0x290, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA3__USBH1_DATA3	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA3__USBH1_DATA3	= IOMUX_PAD(0x694, 0x294, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA4__USBH1_DATA4	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA4__USBH1_DATA4	= IOMUX_PAD(0x698, 0x298, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA5__USBH1_DATA5	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA5__USBH1_DATA5	= IOMUX_PAD(0x69c, 0x29c, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA6__USBH1_DATA6	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA6__USBH1_DATA6	= IOMUX_PAD(0x6a0, 0x2a0, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DATA7__USBH1_DATA7	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DATA7__USBH1_DATA7	= IOMUX_PAD(0x6a4, 0x2a4, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_DIR__USBH1_DIR	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_DIR__USBH1_DIR		= IOMUX_PAD(0x67c, 0x27c, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_NXT__USBH1_NXT	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_NXT__USBH1_NXT		= IOMUX_PAD(0x684, 0x284, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_STP__GPIO1_27	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_STP__GPIO1_27		= IOMUX_PAD(0x680, 0x280, 2, __NA_, 0, MX51_GPIO_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_PAD_USBH1_STP__USBH1_STP	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^	MX51_PAD_USBH1_STP__USBH1_STP		= IOMUX_PAD(0x680, 0x280, 0, __NA_, 0, MX51_USBH_PAD_CTRL),$/;"	e	enum:__anon992b5d380103
MX51_SDHCI_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_SDHCI_PAD_CTRL	/;"	d
MX51_UART_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_UART_PAD_CTRL	/;"	d
MX51_USBH_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define MX51_USBH_PAD_CTRL	/;"	d
MX53	arch/arm/cpu/armv7/mx5/Kconfig	/^config MX53$/;"	c
MX53ARD_CS1GCR1	include/configs/mx53ard.h	/^#define MX53ARD_CS1GCR1	/;"	d
MX53ARD_CS1RCR1	include/configs/mx53ard.h	/^#define MX53ARD_CS1RCR1	/;"	d
MX53ARD_CS1RCR2	include/configs/mx53ard.h	/^#define MX53ARD_CS1RCR2	/;"	d
MX53ARD_CS1WCR1	include/configs/mx53ard.h	/^#define MX53ARD_CS1WCR1	/;"	d
MX53LOCO_LCD_POWER	board/freescale/mx53loco/mx53loco.c	/^#define MX53LOCO_LCD_POWER	/;"	d	file:
MX53LOCO_LCD_POWER	board/freescale/mx53loco/mx53loco_video.c	/^#define MX53LOCO_LCD_POWER	/;"	d	file:
MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC		= IOMUX_PAD(0x414, 0x0E8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__ECSPI2_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__ECSPI2_MISO		= IOMUX_PAD(0x414, 0x0E8, 3, 0x7BC, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39		= IOMUX_PAD(0x414, 0x0E8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__GPIO5_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__GPIO5_28			= IOMUX_PAD(0x414, 0x0E8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10		= IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4		= IOMUX_PAD(0x414, 0x0E8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__TPIU_TRACE_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__TPIU_TRACE_7		= IOMUX_PAD(0x414, 0x0E8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT10__UART1_TXD_MUX		= IOMUX_PAD(0x414, 0x0E8, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS		= IOMUX_PAD(0x418, 0x0EC, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__ECSPI2_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__ECSPI2_SS0			= IOMUX_PAD(0x418, 0x0EC, 3, 0x7C4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40		= IOMUX_PAD(0x418, 0x0EC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__GPIO5_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__GPIO5_29			= IOMUX_PAD(0x418, 0x0EC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11		= IOMUX_PAD(0x418, 0x0EC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5		= IOMUX_PAD(0x418, 0x0EC, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__TPIU_TRACE_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__TPIU_TRACE_8		= IOMUX_PAD(0x418, 0x0EC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT11__UART1_RXD_MUX		= IOMUX_PAD(0x418, 0x0EC, 2, 0x878, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41		= IOMUX_PAD(0x41C, 0x0F0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__GPIO5_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__GPIO5_30			= IOMUX_PAD(0x41C, 0x0F0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12		= IOMUX_PAD(0x41C, 0x0F0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6		= IOMUX_PAD(0x41C, 0x0F0, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__TPIU_TRACE_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__TPIU_TRACE_9		= IOMUX_PAD(0x41C, 0x0F0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__UART4_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__UART4_TXD_MUX		= IOMUX_PAD(0x41C, 0x0F0, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0	= IOMUX_PAD(0x41C, 0x0F0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42		= IOMUX_PAD(0x420, 0x0F4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__GPIO5_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__GPIO5_31			= IOMUX_PAD(0x420, 0x0F4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13		= IOMUX_PAD(0x420, 0x0F4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7		= IOMUX_PAD(0x420, 0x0F4, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__TPIU_TRACE_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__TPIU_TRACE_10		= IOMUX_PAD(0x420, 0x0F4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__UART4_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__UART4_RXD_MUX		= IOMUX_PAD(0x420, 0x0F4, 2, 0x890, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1	= IOMUX_PAD(0x420, 0x0F4, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43		= IOMUX_PAD(0x424, 0x0F8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__GPIO6_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__GPIO6_0			= IOMUX_PAD(0x424, 0x0F8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14		= IOMUX_PAD(0x424, 0x0F8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8		= IOMUX_PAD(0x424, 0x0F8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__TPIU_TRACE_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__TPIU_TRACE_11		= IOMUX_PAD(0x424, 0x0F8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__UART5_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__UART5_TXD_MUX		= IOMUX_PAD(0x424, 0x0F8, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2	= IOMUX_PAD(0x424, 0x0F8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44		= IOMUX_PAD(0x428, 0x0FC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__GPIO6_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__GPIO6_1			= IOMUX_PAD(0x428, 0x0FC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15		= IOMUX_PAD(0x428, 0x0FC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9		= IOMUX_PAD(0x428, 0x0FC, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__TPIU_TRACE_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__TPIU_TRACE_12		= IOMUX_PAD(0x428, 0x0FC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__UART5_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__UART5_RXD_MUX		= IOMUX_PAD(0x428, 0x0FC, 2, 0x898, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3	= IOMUX_PAD(0x428, 0x0FC, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45		= IOMUX_PAD(0x42C, 0x100, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__GPIO6_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__GPIO6_2			= IOMUX_PAD(0x42C, 0x100, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16		= IOMUX_PAD(0x42C, 0x100, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10		= IOMUX_PAD(0x42C, 0x100, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__TPIU_TRACE_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__TPIU_TRACE_13		= IOMUX_PAD(0x42C, 0x100, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__UART4_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__UART4_RTS			= IOMUX_PAD(0x42C, 0x100, 2, 0x88C, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4	= IOMUX_PAD(0x42C, 0x100, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46		= IOMUX_PAD(0x430, 0x104, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__GPIO6_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__GPIO6_3			= IOMUX_PAD(0x430, 0x104, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17		= IOMUX_PAD(0x430, 0x104, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11		= IOMUX_PAD(0x430, 0x104, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__TPIU_TRACE_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__TPIU_TRACE_14		= IOMUX_PAD(0x430, 0x104, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__UART4_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__UART4_CTS			= IOMUX_PAD(0x430, 0x104, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5	= IOMUX_PAD(0x430, 0x104, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47		= IOMUX_PAD(0x434, 0x108, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__GPIO6_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__GPIO6_4			= IOMUX_PAD(0x434, 0x108, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18		= IOMUX_PAD(0x434, 0x108, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12		= IOMUX_PAD(0x434, 0x108, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__TPIU_TRACE_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__TPIU_TRACE_15		= IOMUX_PAD(0x434, 0x108, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__UART5_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__UART5_RTS			= IOMUX_PAD(0x434, 0x108, 2, 0x894, 2, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6	= IOMUX_PAD(0x434, 0x108, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48		= IOMUX_PAD(0x438, 0x10C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__GPIO6_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__GPIO6_5			= IOMUX_PAD(0x438, 0x10C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19		= IOMUX_PAD(0x438, 0x10C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13		= IOMUX_PAD(0x438, 0x10C, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__UART5_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__UART5_CTS			= IOMUX_PAD(0x438, 0x10C, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7	= IOMUX_PAD(0x438, 0x10C, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK		= IOMUX_PAD(0x438, 0x10C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC		= IOMUX_PAD(0x3FC, 0x0D0, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__ECSPI1_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__ECSPI1_SCLK			= IOMUX_PAD(0x3FC, 0x0D0, 3, 0x79C, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33		= IOMUX_PAD(0x3FC, 0x0D0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__GPIO5_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__GPIO5_22			= IOMUX_PAD(0x3FC, 0x0D0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4		= IOMUX_PAD(0x3FC, 0x0D0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__KPP_COL_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__KPP_COL_5			= IOMUX_PAD(0x3FC, 0x0D0, 2, 0x840, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__TPIU_TRACE_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__TPIU_TRACE_1		= IOMUX_PAD(0x3FC, 0x0D0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP		= IOMUX_PAD(0x3FC, 0x0D0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD		= IOMUX_PAD(0x400, 0x0D4, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__ECSPI1_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__ECSPI1_MOSI			= IOMUX_PAD(0x400, 0x0D4, 3, 0x7A4, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34		= IOMUX_PAD(0x400, 0x0D4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__GPIO5_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__GPIO5_23			= IOMUX_PAD(0x400, 0x0D4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5		= IOMUX_PAD(0x400, 0x0D4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__KPP_ROW_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__KPP_ROW_5			= IOMUX_PAD(0x400, 0x0D4, 2, 0x84C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__TPIU_TRACE_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__TPIU_TRACE_2		= IOMUX_PAD(0x400, 0x0D4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT		= IOMUX_PAD(0x400, 0x0D4, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS		= IOMUX_PAD(0x404, 0x0D8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__ECSPI1_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__ECSPI1_MISO			= IOMUX_PAD(0x404, 0x0D8, 3, 0x7A0, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35		= IOMUX_PAD(0x404, 0x0D8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__GPIO5_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__GPIO5_24			= IOMUX_PAD(0x404, 0x0D8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6		= IOMUX_PAD(0x404, 0x0D8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__KPP_COL_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__KPP_COL_6			= IOMUX_PAD(0x404, 0x0D8, 2, 0x844, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__TPIU_TRACE_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__TPIU_TRACE_3		= IOMUX_PAD(0x404, 0x0D8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK		= IOMUX_PAD(0x404, 0x0D8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD		= IOMUX_PAD(0x408, 0x0DC, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__ECSPI1_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__ECSPI1_SS0			= IOMUX_PAD(0x408, 0x0DC, 3, 0x7A8, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36		= IOMUX_PAD(0x408, 0x0DC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__GPIO5_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__GPIO5_25			= IOMUX_PAD(0x408, 0x0DC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7		= IOMUX_PAD(0x408, 0x0DC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__KPP_ROW_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__KPP_ROW_6			= IOMUX_PAD(0x408, 0x0DC, 2, 0x850, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__TPIU_TRACE_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__TPIU_TRACE_4		= IOMUX_PAD(0x408, 0x0DC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR		= IOMUX_PAD(0x408, 0x0DC, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__ECSPI2_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__ECSPI2_SCLK			= IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37		= IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__GPIO5_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__GPIO5_26			= IOMUX_PAD(0x40C, 0x0E0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__I2C1_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__I2C1_SDA			= IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PA/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8		= IOMUX_PAD(0x40C, 0x0E0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__KPP_COL_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__KPP_COL_7			= IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__TPIU_TRACE_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__TPIU_TRACE_5		= IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC		= IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__ECSPI2_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__ECSPI2_MOSI			= IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38		= IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__GPIO5_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__GPIO5_27			= IOMUX_PAD(0x410, 0x0E4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__I2C1_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__I2C1_SCL			= IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PA/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9		= IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__KPP_ROW_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__KPP_ROW_7			= IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__TPIU_TRACE_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__TPIU_TRACE_6		= IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR		= IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31		= IOMUX_PAD(0x3F4, 0x0C8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DATA_EN__GPIO5_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DATA_EN__GPIO5_20			= IOMUX_PAD(0x3F4, 0x0C8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN		= IOMUX_PAD(0x3F4, 0x0C8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2		= IOMUX_PAD(0x3F4, 0x0C8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK		= IOMUX_PAD(0x3F4, 0x0C8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK		= IOMUX_PAD(0x3F0, 0x0C4, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30		= IOMUX_PAD(0x3F0, 0x0C4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_MCLK__GPIO5_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_MCLK__GPIO5_19			= IOMUX_PAD(0x3F0, 0x0C4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC		= IOMUX_PAD(0x3F0, 0x0C4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1		= IOMUX_PAD(0x3F0, 0x0C4, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_MCLK__TPIU_TRCTL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_MCLK__TPIU_TRCTL			= IOMUX_PAD(0x3F0, 0x0C4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29		= IOMUX_PAD(0x3EC, 0x0C0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_PIXCLK__GPIO5_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_PIXCLK__GPIO5_18			= IOMUX_PAD(0x3EC, 0x0C0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK		= IOMUX_PAD(0x3EC, 0x0C0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0		= IOMUX_PAD(0x3EC, 0x0C0, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32		= IOMUX_PAD(0x3F8, 0x0CC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_VSYNC__GPIO5_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_VSYNC__GPIO5_21			= IOMUX_PAD(0x3F8, 0x0CC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC		= IOMUX_PAD(0x3F8, 0x0CC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3		= IOMUX_PAD(0x3F8, 0x0CC, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0		= IOMUX_PAD(0x3F8, 0x0CC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0		= IOMUX_PAD(0x378, 0x04C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_DISP_CLK__GPIO4_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_DISP_CLK__GPIO4_16			= IOMUX_PAD(0x378, 0x04C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK		= IOMUX_PAD(0x378, 0x04C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0	= IOMUX_PAD(0x378, 0x04C, 5, __NA_, 0, NO_PAD_CT/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR		= IOMUX_PAD(0x378, 0x04C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID		= IOMUX_PAD(0x378, 0x04C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC		= IOMUX_PAD(0x37C, 0x050, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1		= IOMUX_PAD(0x37C, 0x050, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN15__GPIO4_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN15__GPIO4_17			= IOMUX_PAD(0x37C, 0x050, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN15__IPU_DI0_PIN15		= IOMUX_PAD(0x37C, 0x050, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1	= IOMUX_PAD(0x37C, 0x050, 5, __NA_, 0, NO_PAD_CTRL)/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN15__USBPHY1_BVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN15__USBPHY1_BVALID		= IOMUX_PAD(0x37C, 0x050, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD		= IOMUX_PAD(0x380, 0x054, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2		= IOMUX_PAD(0x380, 0x054, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN2__GPIO4_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN2__GPIO4_18			= IOMUX_PAD(0x380, 0x054, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN2__IPU_DI0_PIN2			= IOMUX_PAD(0x380, 0x054, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2	= IOMUX_PAD(0x380, 0x054, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION		= IOMUX_PAD(0x380, 0x054, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS		= IOMUX_PAD(0x384, 0x058, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3		= IOMUX_PAD(0x384, 0x058, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN3__GPIO4_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN3__GPIO4_19			= IOMUX_PAD(0x384, 0x058, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN3__IPU_DI0_PIN3			= IOMUX_PAD(0x384, 0x058, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3	= IOMUX_PAD(0x384, 0x058, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN3__USBPHY1_IDDIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN3__USBPHY1_IDDIG		= IOMUX_PAD(0x384, 0x058, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD		= IOMUX_PAD(0x388, 0x05C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4		= IOMUX_PAD(0x388, 0x05C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__ESDHC1_WP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__ESDHC1_WP			= IOMUX_PAD(0x388, 0x05C, 3, 0x7FC, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__GPIO4_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__GPIO4_20			= IOMUX_PAD(0x388, 0x05C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__IPU_DI0_PIN4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__IPU_DI0_PIN4			= IOMUX_PAD(0x388, 0x05C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD		= IOMUX_PAD(0x388, 0x05C, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT	= IOMUX_PAD(0x388, 0x05C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__CSPI_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__CSPI_SCLK			= IOMUX_PAD(0x38C, 0x060, 2, 0x780, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5		= IOMUX_PAD(0x38C, 0x060, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__GPIO4_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__GPIO4_21			= IOMUX_PAD(0x38C, 0x060, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0		= IOMUX_PAD(0x38C, 0x060, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN	= IOMUX_PAD(0x38C, 0x060, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0	= IOMUX_PAD(0x38C, 0x060, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY		= IOMUX_PAD(0x38C, 0x060, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15		= IOMUX_PAD(0x3B4, 0x088, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT10__GPIO4_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT10__GPIO4_31			= IOMUX_PAD(0x3B4, 0x088, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10		= IOMUX_PAD(0x3B4, 0x088, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP		= IOMUX_PAD(0x3B4, 0x088, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1		= IOMUX_PAD(0x3B4, 0x088, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16		= IOMUX_PAD(0x3B8, 0x08C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT11__GPIO5_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT11__GPIO5_5			= IOMUX_PAD(0x3B8, 0x08C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11		= IOMUX_PAD(0x3B8, 0x08C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT		= IOMUX_PAD(0x3B8, 0x08C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2		= IOMUX_PAD(0x3B8, 0x08C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17		= IOMUX_PAD(0x3BC, 0x090, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT12__GPIO5_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT12__GPIO5_6			= IOMUX_PAD(0x3BC, 0x090, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12		= IOMUX_PAD(0x3BC, 0x090, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK		= IOMUX_PAD(0x3BC, 0x090, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3		= IOMUX_PAD(0x3BC, 0x090, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS		= IOMUX_PAD(0x3C0, 0x094, 3, 0x754, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18		= IOMUX_PAD(0x3C0, 0x094, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT13__GPIO5_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT13__GPIO5_7			= IOMUX_PAD(0x3C0, 0x094, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13		= IOMUX_PAD(0x3C0, 0x094, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4		= IOMUX_PAD(0x3C0, 0x094, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC		= IOMUX_PAD(0x3C4, 0x098, 3, 0x750, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19		= IOMUX_PAD(0x3C4, 0x098, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT14__GPIO5_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT14__GPIO5_8			= IOMUX_PAD(0x3C4, 0x098, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14		= IOMUX_PAD(0x3C4, 0x098, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5		= IOMUX_PAD(0x3C4, 0x098, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__ECSPI1_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__ECSPI1_SS1		= IOMUX_PAD(0x3C8, 0x09C, 2, 0x7AC, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__ECSPI2_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__ECSPI2_SS1		= IOMUX_PAD(0x3C8, 0x09C, 3, 0x7C8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20		= IOMUX_PAD(0x3C8, 0x09C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__GPIO5_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__GPIO5_9			= IOMUX_PAD(0x3C8, 0x09C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15		= IOMUX_PAD(0x3C8, 0x09C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6		= IOMUX_PAD(0x3C8, 0x09C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC		= IOMUX_PAD(0x3CC, 0x0A0, 3, 0x758, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__ECSPI2_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__ECSPI2_MOSI		= IOMUX_PAD(0x3CC, 0x0A0, 2, 0x7C0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21		= IOMUX_PAD(0x3CC, 0x0A0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__GPIO5_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__GPIO5_10			= IOMUX_PAD(0x3CC, 0x0A0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16		= IOMUX_PAD(0x3CC, 0x0A0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0		= IOMUX_PAD(0x3CC, 0x0A0, 4, 0x868, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7		= IOMUX_PAD(0x3CC, 0x0A0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD		= IOMUX_PAD(0x3D0, 0x0A4, 3, 0x74C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__ECSPI2_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__ECSPI2_MISO		= IOMUX_PAD(0x3D0, 0x0A4, 2, 0x7BC, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22		= IOMUX_PAD(0x3D0, 0x0A4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__GPIO5_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__GPIO5_11			= IOMUX_PAD(0x3D0, 0x0A4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17		= IOMUX_PAD(0x3D0, 0x0A4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1		= IOMUX_PAD(0x3D0, 0x0A4, 4, 0x86C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS		= IOMUX_PAD(0x3D4, 0x0A8, 4, 0x73C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS		= IOMUX_PAD(0x3D4, 0x0A8, 3, 0x75C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__ECSPI2_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__ECSPI2_SS0		= IOMUX_PAD(0x3D4, 0x0A8, 2, 0x7C4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23		= IOMUX_PAD(0x3D4, 0x0A8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2		= IOMUX_PAD(0x3D4, 0x0A8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__GPIO5_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__GPIO5_12			= IOMUX_PAD(0x3D4, 0x0A8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18		= IOMUX_PAD(0x3D4, 0x0A8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC		= IOMUX_PAD(0x3D8, 0x0AC, 4, 0x738, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD		= IOMUX_PAD(0x3D8, 0x0AC, 3, 0x748, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__ECSPI2_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__ECSPI2_SCLK		= IOMUX_PAD(0x3D8, 0x0AC, 2, 0x7B8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24		= IOMUX_PAD(0x3D8, 0x0AC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3		= IOMUX_PAD(0x3D8, 0x0AC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__GPIO5_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__GPIO5_13			= IOMUX_PAD(0x3D8, 0x0AC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19		= IOMUX_PAD(0x3D8, 0x0AC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__CSPI_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__CSPI_MOSI			= IOMUX_PAD(0x390, 0x064, 2, 0x788, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6		= IOMUX_PAD(0x390, 0x064, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__GPIO4_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__GPIO4_22			= IOMUX_PAD(0x390, 0x064, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1		= IOMUX_PAD(0x390, 0x064, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1	= IOMUX_PAD(0x390, 0x064, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID		= IOMUX_PAD(0x390, 0x064, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC		= IOMUX_PAD(0x3DC, 0x0B0, 3, 0x740, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__ECSPI1_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__ECSPI1_SCLK		= IOMUX_PAD(0x3DC, 0x0B0, 2, 0x79C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25		= IOMUX_PAD(0x3DC, 0x0B0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__GPIO5_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__GPIO5_14			= IOMUX_PAD(0x3DC, 0x0B0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20		= IOMUX_PAD(0x3DC, 0x0B0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__SATA_PHY_TDI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__SATA_PHY_TDI		= IOMUX_PAD(0x3DC, 0x0B0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD		= IOMUX_PAD(0x3E0, 0x0B4, 3, 0x734, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__ECSPI1_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__ECSPI1_MOSI		= IOMUX_PAD(0x3E0, 0x0B4, 2, 0x7A4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26		= IOMUX_PAD(0x3E0, 0x0B4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__GPIO5_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__GPIO5_15			= IOMUX_PAD(0x3E0, 0x0B4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21		= IOMUX_PAD(0x3E0, 0x0B4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__SATA_PHY_TDO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__SATA_PHY_TDO		= IOMUX_PAD(0x3E0, 0x0B4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0	= IOMUX_PAD(0x3E0, 0x0B4, 5, __NA_, 0, NO_PAD_CTR/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS		= IOMUX_PAD(0x3E4, 0x0B8, 3, 0x744, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__ECSPI1_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__ECSPI1_MISO		= IOMUX_PAD(0x3E4, 0x0B8, 2, 0x7A0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27		= IOMUX_PAD(0x3E4, 0x0B8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__GPIO5_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__GPIO5_16			= IOMUX_PAD(0x3E4, 0x0B8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22		= IOMUX_PAD(0x3E4, 0x0B8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__SATA_PHY_TCK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__SATA_PHY_TCK		= IOMUX_PAD(0x3E4, 0x0B8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1	= IOMUX_PAD(0x3E4, 0x0B8, 5, __NA_, 0, NO_PAD_CTR/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD		= IOMUX_PAD(0x3E8, 0x0BC, 3, 0x730, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__ECSPI1_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__ECSPI1_SS0		= IOMUX_PAD(0x3E8, 0x0BC, 2, 0x7A8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28		= IOMUX_PAD(0x3E8, 0x0BC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__GPIO5_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__GPIO5_17			= IOMUX_PAD(0x3E8, 0x0BC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23		= IOMUX_PAD(0x3E8, 0x0BC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__SATA_PHY_TMS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__SATA_PHY_TMS		= IOMUX_PAD(0x3E8, 0x0BC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2	= IOMUX_PAD(0x3E8, 0x0BC, 5, __NA_, 0, NO_PAD_CTR/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__CSPI_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__CSPI_MISO			= IOMUX_PAD(0x394, 0x068, 2, 0x784, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7		= IOMUX_PAD(0x394, 0x068, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__GPIO4_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__GPIO4_23			= IOMUX_PAD(0x394, 0x068, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2		= IOMUX_PAD(0x394, 0x068, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE		= IOMUX_PAD(0x394, 0x068, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2	= IOMUX_PAD(0x394, 0x068, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE		= IOMUX_PAD(0x394, 0x068, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__CSPI_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__CSPI_SS0			= IOMUX_PAD(0x398, 0x06C, 2, 0x78C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8		= IOMUX_PAD(0x398, 0x06C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__GPIO4_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__GPIO4_24			= IOMUX_PAD(0x398, 0x06C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3		= IOMUX_PAD(0x398, 0x06C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR	= IOMUX_PAD(0x398, 0x06C, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3	= IOMUX_PAD(0x398, 0x06C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR		= IOMUX_PAD(0x398, 0x06C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__CSPI_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__CSPI_SS1			= IOMUX_PAD(0x39C, 0x070, 2, 0x790, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9		= IOMUX_PAD(0x39C, 0x070, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__GPIO4_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__GPIO4_25			= IOMUX_PAD(0x39C, 0x070, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4		= IOMUX_PAD(0x39C, 0x070, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB		= IOMUX_PAD(0x39C, 0x070, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4	= IOMUX_PAD(0x39C, 0x070, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK		= IOMUX_PAD(0x39C, 0x070, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__CSPI_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__CSPI_SS2			= IOMUX_PAD(0x3A0, 0x074, 2, 0x794, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10		= IOMUX_PAD(0x3A0, 0x074, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__GPIO4_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__GPIO4_26			= IOMUX_PAD(0x3A0, 0x074, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5		= IOMUX_PAD(0x3A0, 0x074, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS	= IOMUX_PAD(0x3A0, 0x074, 5, __NA_, 0, NO_PAD_CTR/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5	= IOMUX_PAD(0x3A0, 0x074, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0	= IOMUX_PAD(0x3A0, 0x074, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__CSPI_SS3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__CSPI_SS3			= IOMUX_PAD(0x3A4, 0x078, 2, 0x798, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11		= IOMUX_PAD(0x3A4, 0x078, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__GPIO4_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__GPIO4_27			= IOMUX_PAD(0x3A4, 0x078, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6		= IOMUX_PAD(0x3A4, 0x078, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE	= IOMUX_PAD(0x3A4, 0x078, 5, __NA_, 0, NO_PAD_CT/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6	= IOMUX_PAD(0x3A4, 0x078, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1	= IOMUX_PAD(0x3A4, 0x078, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__CSPI_RDY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__CSPI_RDY			= IOMUX_PAD(0x3A8, 0x07C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12		= IOMUX_PAD(0x3A8, 0x07C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__GPIO4_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__GPIO4_28			= IOMUX_PAD(0x3A8, 0x07C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7		= IOMUX_PAD(0x3A8, 0x07C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0	= IOMUX_PAD(0x3A8, 0x07C, 5, __NA_, 0, NO_PAD_C/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7	= IOMUX_PAD(0x3A8, 0x07C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID		= IOMUX_PAD(0x3A8, 0x07C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13		= IOMUX_PAD(0x3AC, 0x080, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__GPIO4_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__GPIO4_29			= IOMUX_PAD(0x3AC, 0x080, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8		= IOMUX_PAD(0x3AC, 0x080, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__PWM1_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__PWM1_PWMO			= IOMUX_PAD(0x3AC, 0x080, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1	= IOMUX_PAD(0x3AC, 0x080, 5, __NA_, 0, NO_PAD_C/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__USBPHY2_AVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__USBPHY2_AVALID		= IOMUX_PAD(0x3AC, 0x080, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B		= IOMUX_PAD(0x3AC, 0x080, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14		= IOMUX_PAD(0x3B0, 0x084, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__GPIO4_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__GPIO4_30			= IOMUX_PAD(0x3B0, 0x084, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9		= IOMUX_PAD(0x3B0, 0x084, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__PWM2_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__PWM2_PWMO			= IOMUX_PAD(0x3B0, 0x084, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2	= IOMUX_PAD(0x3B0, 0x084, 5, __NA_, 0, NO_PAD_C/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0		= IOMUX_PAD(0x3B0, 0x084, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B		= IOMUX_PAD(0x3B0, 0x084, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A16__EMI_WEIM_A_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A16__EMI_WEIM_A_16			= IOMUX_PAD(0x4C8, 0x17C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A16__GPIO2_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A16__GPIO2_22			= IOMUX_PAD(0x4C8, 0x17C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK		= IOMUX_PAD(0x4C8, 0x17C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK		= IOMUX_PAD(0x4C8, 0x17C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A16__SRC_BT_CFG1_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A16__SRC_BT_CFG1_1			= IOMUX_PAD(0x4C8, 0x17C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A17__EMI_WEIM_A_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A17__EMI_WEIM_A_17			= IOMUX_PAD(0x4C4, 0x178, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A17__GPIO2_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A17__GPIO2_21			= IOMUX_PAD(0x4C4, 0x178, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A17__IPU_CSI1_D_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A17__IPU_CSI1_D_12			= IOMUX_PAD(0x4C4, 0x178, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A17__IPU_DISP1_DAT_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A17__IPU_DISP1_DAT_12		= IOMUX_PAD(0x4C4, 0x178, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A17__SRC_BT_CFG1_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A17__SRC_BT_CFG1_2			= IOMUX_PAD(0x4C4, 0x178, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A18__EMI_WEIM_A_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A18__EMI_WEIM_A_18			= IOMUX_PAD(0x4C0, 0x174, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A18__GPIO2_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A18__GPIO2_20			= IOMUX_PAD(0x4C0, 0x174, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A18__IPU_CSI1_D_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A18__IPU_CSI1_D_13			= IOMUX_PAD(0x4C0, 0x174, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A18__IPU_DISP1_DAT_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A18__IPU_DISP1_DAT_13		= IOMUX_PAD(0x4C0, 0x174, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A18__SRC_BT_CFG1_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A18__SRC_BT_CFG1_3			= IOMUX_PAD(0x4C0, 0x174, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A19__EMI_WEIM_A_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A19__EMI_WEIM_A_19			= IOMUX_PAD(0x4BC, 0x170, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A19__GPIO2_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A19__GPIO2_19			= IOMUX_PAD(0x4BC, 0x170, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A19__IPU_CSI1_D_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A19__IPU_CSI1_D_14			= IOMUX_PAD(0x4BC, 0x170, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A19__IPU_DISP1_DAT_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A19__IPU_DISP1_DAT_14		= IOMUX_PAD(0x4BC, 0x170, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A19__SRC_BT_CFG1_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A19__SRC_BT_CFG1_4			= IOMUX_PAD(0x4BC, 0x170, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A20__EMI_WEIM_A_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A20__EMI_WEIM_A_20			= IOMUX_PAD(0x4B8, 0x16C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A20__GPIO2_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A20__GPIO2_18			= IOMUX_PAD(0x4B8, 0x16C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A20__IPU_CSI1_D_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A20__IPU_CSI1_D_15			= IOMUX_PAD(0x4B8, 0x16C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A20__IPU_DISP1_DAT_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A20__IPU_DISP1_DAT_15		= IOMUX_PAD(0x4B8, 0x16C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A20__SRC_BT_CFG1_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A20__SRC_BT_CFG1_5			= IOMUX_PAD(0x4B8, 0x16C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A21__EMI_WEIM_A_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A21__EMI_WEIM_A_21			= IOMUX_PAD(0x4B4, 0x168, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A21__GPIO2_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A21__GPIO2_17			= IOMUX_PAD(0x4B4, 0x168, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A21__IPU_CSI1_D_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A21__IPU_CSI1_D_16			= IOMUX_PAD(0x4B4, 0x168, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A21__IPU_DISP1_DAT_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A21__IPU_DISP1_DAT_16		= IOMUX_PAD(0x4B4, 0x168, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A21__SRC_BT_CFG1_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A21__SRC_BT_CFG1_6			= IOMUX_PAD(0x4B4, 0x168, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A22__EMI_WEIM_A_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A22__EMI_WEIM_A_22			= IOMUX_PAD(0x4B0, 0x164, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A22__GPIO2_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A22__GPIO2_16			= IOMUX_PAD(0x4B0, 0x164, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A22__IPU_CSI1_D_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A22__IPU_CSI1_D_17			= IOMUX_PAD(0x4B0, 0x164, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A22__IPU_DISP1_DAT_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A22__IPU_DISP1_DAT_17		= IOMUX_PAD(0x4B0, 0x164, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A22__SRC_BT_CFG1_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A22__SRC_BT_CFG1_7			= IOMUX_PAD(0x4B0, 0x164, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A23__EMI_WEIM_A_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A23__EMI_WEIM_A_23			= IOMUX_PAD(0x4AC, 0x160, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A23__GPIO6_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A23__GPIO6_6			= IOMUX_PAD(0x4AC, 0x160, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A23__IPU_CSI1_D_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A23__IPU_CSI1_D_18			= IOMUX_PAD(0x4AC, 0x160, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A23__IPU_DISP1_DAT_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A23__IPU_DISP1_DAT_18		= IOMUX_PAD(0x4AC, 0x160, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A23__IPU_SISG_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A23__IPU_SISG_3			= IOMUX_PAD(0x4AC, 0x160, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A23__USBPHY2_ENDSESSION	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A23__USBPHY2_ENDSESSION		= IOMUX_PAD(0x4AC, 0x160, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A24__EMI_WEIM_A_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A24__EMI_WEIM_A_24			= IOMUX_PAD(0x4A8, 0x15C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A24__GPIO5_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A24__GPIO5_4			= IOMUX_PAD(0x4A8, 0x15C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A24__IPU_CSI1_D_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A24__IPU_CSI1_D_19			= IOMUX_PAD(0x4A8, 0x15C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A24__IPU_DISP1_DAT_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A24__IPU_DISP1_DAT_19		= IOMUX_PAD(0x4A8, 0x15C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A24__IPU_SISG_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A24__IPU_SISG_2			= IOMUX_PAD(0x4A8, 0x15C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A24__USBPHY2_BVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A24__USBPHY2_BVALID		= IOMUX_PAD(0x4A8, 0x15C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__CSPI_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__CSPI_SS1			= IOMUX_PAD(0x458, 0x110, 4, 0x790, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__ECSPI2_RDY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__ECSPI2_RDY			= IOMUX_PAD(0x458, 0x110, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__EMI_WEIM_A_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__EMI_WEIM_A_25			= IOMUX_PAD(0x458, 0x110, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__GPIO5_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__GPIO5_2			= IOMUX_PAD(0x458, 0x110, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__IPU_DI0_D1_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__IPU_DI0_D1_CS			= IOMUX_PAD(0x458, 0x110, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__IPU_DI1_PIN12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__IPU_DI1_PIN12			= IOMUX_PAD(0x458, 0x110, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_A25__USBPHY1_BISTOK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_A25__USBPHY1_BISTOK		= IOMUX_PAD(0x458, 0x110, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS0__ECSPI2_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS0__ECSPI2_SCLK			= IOMUX_PAD(0x4CC, 0x180, 2, 0x7B8, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS0__EMI_WEIM_CS_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS0__EMI_WEIM_CS_0			= IOMUX_PAD(0x4CC, 0x180, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS0__GPIO2_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS0__GPIO2_23			= IOMUX_PAD(0x4CC, 0x180, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS0__IPU_DI1_PIN5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS0__IPU_DI1_PIN5			= IOMUX_PAD(0x4CC, 0x180, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS1__ECSPI2_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS1__ECSPI2_MOSI			= IOMUX_PAD(0x4D0, 0x184, 2, 0x7C0, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS1__EMI_WEIM_CS_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS1__EMI_WEIM_CS_1			= IOMUX_PAD(0x4D0, 0x184, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS1__GPIO2_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS1__GPIO2_24			= IOMUX_PAD(0x4D0, 0x184, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_CS1__IPU_DI1_PIN6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_CS1__IPU_DI1_PIN6			= IOMUX_PAD(0x4D0, 0x184, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D16__ECSPI1_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D16__ECSPI1_SCLK			= IOMUX_PAD(0x460, 0x118, 4, 0x79C, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D16__EMI_WEIM_D_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D16__EMI_WEIM_D_16			= IOMUX_PAD(0x460, 0x118, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D16__GPIO3_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D16__GPIO3_16			= IOMUX_PAD(0x460, 0x118, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D16__I2C2_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D16__I2C2_SDA			= IOMUX_PAD(0x460, 0x118, 5 | IOMUX_CONFIG_SION, 0x820, 1, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D16__IPU_DI0_PIN5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D16__IPU_DI0_PIN5			= IOMUX_PAD(0x460, 0x118, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK		= IOMUX_PAD(0x460, 0x118, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D17__ECSPI1_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D17__ECSPI1_MISO			= IOMUX_PAD(0x464, 0x11C, 4, 0x7A0, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D17__EMI_WEIM_D_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D17__EMI_WEIM_D_17			= IOMUX_PAD(0x464, 0x11C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D17__GPIO3_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D17__GPIO3_17			= IOMUX_PAD(0x464, 0x11C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D17__I2C3_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D17__I2C3_SCL			= IOMUX_PAD(0x464, 0x11C, 5 | IOMUX_CONFIG_SION, 0x824, 0, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D17__IPU_DI0_PIN6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D17__IPU_DI0_PIN6			= IOMUX_PAD(0x464, 0x11C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN		= IOMUX_PAD(0x464, 0x11C, 3, 0x830, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__ECSPI1_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__ECSPI1_MOSI			= IOMUX_PAD(0x468, 0x120, 4, 0x7A4, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__EMI_WEIM_D_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__EMI_WEIM_D_18			= IOMUX_PAD(0x468, 0x120, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__GPIO3_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__GPIO3_18			= IOMUX_PAD(0x468, 0x120, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__I2C3_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__I2C3_SDA			= IOMUX_PAD(0x468, 0x120, 5 | IOMUX_CONFIG_SION, 0x828, 0, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__IPU_DI0_PIN7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__IPU_DI0_PIN7			= IOMUX_PAD(0x468, 0x120, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__IPU_DI1_D0_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__IPU_DI1_D0_CS			= IOMUX_PAD(0x468, 0x120, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO		= IOMUX_PAD(0x468, 0x120, 3, 0x830, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__ECSPI1_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__ECSPI1_SS1			= IOMUX_PAD(0x46C, 0x124, 4, 0x7AC, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__EMI_WEIM_D_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__EMI_WEIM_D_19			= IOMUX_PAD(0x46C, 0x124, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__EPIT1_EPITO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__EPIT1_EPITO			= IOMUX_PAD(0x46C, 0x124, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__GPIO3_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__GPIO3_19			= IOMUX_PAD(0x46C, 0x124, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__IPU_DI0_PIN8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__IPU_DI0_PIN8			= IOMUX_PAD(0x46C, 0x124, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS		= IOMUX_PAD(0x46C, 0x124, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__UART1_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__UART1_CTS			= IOMUX_PAD(0x46C, 0x124, 6, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D19__USBOH3_USBH2_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D19__USBOH3_USBH2_OC		= IOMUX_PAD(0x46C, 0x124, 7, 0x8A4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__CSPI_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__CSPI_SS0			= IOMUX_PAD(0x470, 0x128, 4, 0x78C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__EMI_WEIM_D_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__EMI_WEIM_D_20			= IOMUX_PAD(0x470, 0x128, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__EPIT2_EPITO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__EPIT2_EPITO			= IOMUX_PAD(0x470, 0x128, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__GPIO3_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__GPIO3_20			= IOMUX_PAD(0x470, 0x128, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__IPU_DI0_PIN16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__IPU_DI0_PIN16			= IOMUX_PAD(0x470, 0x128, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__IPU_SER_DISP0_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__IPU_SER_DISP0_CS		= IOMUX_PAD(0x470, 0x128, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__UART1_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__UART1_RTS			= IOMUX_PAD(0x470, 0x128, 6, 0x874, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D20__USBOH3_USBH2_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D20__USBOH3_USBH2_PWR		= IOMUX_PAD(0x470, 0x128, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__CSPI_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__CSPI_SCLK			= IOMUX_PAD(0x474, 0x12C, 4, 0x780, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__EMI_WEIM_D_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__EMI_WEIM_D_21			= IOMUX_PAD(0x474, 0x12C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__GPIO3_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__GPIO3_21			= IOMUX_PAD(0x474, 0x12C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__I2C1_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__I2C1_SCL			= IOMUX_PAD(0x474, 0x12C, 5 | IOMUX_CONFIG_SION, 0x814, 1, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__IPU_DI0_PIN17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__IPU_DI0_PIN17			= IOMUX_PAD(0x474, 0x12C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK		= IOMUX_PAD(0x474, 0x12C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D21__USBOH3_USBOTG_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D21__USBOH3_USBOTG_OC		= IOMUX_PAD(0x474, 0x12C, 6, 0x89C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D22__CSPI_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D22__CSPI_MISO			= IOMUX_PAD(0x478, 0x130, 4, 0x784, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D22__EMI_WEIM_D_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D22__EMI_WEIM_D_22			= IOMUX_PAD(0x478, 0x130, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D22__GPIO3_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D22__GPIO3_22			= IOMUX_PAD(0x478, 0x130, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D22__IPU_DI0_PIN1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D22__IPU_DI0_PIN1			= IOMUX_PAD(0x478, 0x130, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN		= IOMUX_PAD(0x478, 0x130, 3, 0x82C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR		= IOMUX_PAD(0x478, 0x130, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__EMI_WEIM_D_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__EMI_WEIM_D_23			= IOMUX_PAD(0x47C, 0x134, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__GPIO3_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__GPIO3_23			= IOMUX_PAD(0x47C, 0x134, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN		= IOMUX_PAD(0x47C, 0x134, 6, 0x834, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__IPU_DI0_D0_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__IPU_DI0_D0_CS			= IOMUX_PAD(0x47C, 0x134, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__IPU_DI1_PIN14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__IPU_DI1_PIN14			= IOMUX_PAD(0x47C, 0x134, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__IPU_DI1_PIN2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__IPU_DI1_PIN2			= IOMUX_PAD(0x47C, 0x134, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__UART1_DCD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__UART1_DCD			= IOMUX_PAD(0x47C, 0x134, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D23__UART3_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D23__UART3_CTS			= IOMUX_PAD(0x47C, 0x134, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS		= IOMUX_PAD(0x484, 0x13C, 5, 0x754, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__CSPI_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__CSPI_SS2			= IOMUX_PAD(0x484, 0x13C, 4, 0x794, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__ECSPI1_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__ECSPI1_SS2			= IOMUX_PAD(0x484, 0x13C, 3, 0x7B0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__ECSPI2_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__ECSPI2_SS2			= IOMUX_PAD(0x484, 0x13C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__EMI_WEIM_D_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__EMI_WEIM_D_24			= IOMUX_PAD(0x484, 0x13C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__GPIO3_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__GPIO3_24			= IOMUX_PAD(0x484, 0x13C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__UART1_DTR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__UART1_DTR			= IOMUX_PAD(0x484, 0x13C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D24__UART3_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D24__UART3_TXD_MUX			= IOMUX_PAD(0x484, 0x13C, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC		= IOMUX_PAD(0x488, 0x140, 5, 0x750, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__CSPI_SS3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__CSPI_SS3			= IOMUX_PAD(0x488, 0x140, 4, 0x798, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__ECSPI1_SS3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__ECSPI1_SS3			= IOMUX_PAD(0x488, 0x140, 3, 0x7B4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__ECSPI2_SS3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__ECSPI2_SS3			= IOMUX_PAD(0x488, 0x140, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__EMI_WEIM_D_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__EMI_WEIM_D_25			= IOMUX_PAD(0x488, 0x140, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__GPIO3_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__GPIO3_25			= IOMUX_PAD(0x488, 0x140, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__UART1_DSR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__UART1_DSR			= IOMUX_PAD(0x488, 0x140, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D25__UART3_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D25__UART3_RXD_MUX			= IOMUX_PAD(0x488, 0x140, 2, 0x888, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__EMI_WEIM_D_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__EMI_WEIM_D_26			= IOMUX_PAD(0x48C, 0x144, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__FIRI_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__FIRI_RXD			= IOMUX_PAD(0x48C, 0x144, 3, 0x80C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__GPIO3_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__GPIO3_26			= IOMUX_PAD(0x48C, 0x144, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__IPU_CSI0_D_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__IPU_CSI0_D_1			= IOMUX_PAD(0x48C, 0x144, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__IPU_DI1_PIN11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__IPU_DI1_PIN11			= IOMUX_PAD(0x48C, 0x144, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__IPU_DISP1_DAT_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__IPU_DISP1_DAT_22		= IOMUX_PAD(0x48C, 0x144, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__IPU_SISG_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__IPU_SISG_2			= IOMUX_PAD(0x48C, 0x144, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D26__UART2_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D26__UART2_TXD_MUX			= IOMUX_PAD(0x48C, 0x144, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__EMI_WEIM_D_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__EMI_WEIM_D_27			= IOMUX_PAD(0x490, 0x148, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__FIRI_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__FIRI_TXD			= IOMUX_PAD(0x490, 0x148, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__GPIO3_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__GPIO3_27			= IOMUX_PAD(0x490, 0x148, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__IPU_CSI0_D_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__IPU_CSI0_D_0			= IOMUX_PAD(0x490, 0x148, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__IPU_DI1_PIN13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__IPU_DI1_PIN13			= IOMUX_PAD(0x490, 0x148, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__IPU_DISP1_DAT_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__IPU_DISP1_DAT_23		= IOMUX_PAD(0x490, 0x148, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__IPU_SISG_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__IPU_SISG_3			= IOMUX_PAD(0x490, 0x148, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D27__UART2_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D27__UART2_RXD_MUX			= IOMUX_PAD(0x490, 0x148, 2, 0x880, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__CSPI_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__CSPI_MOSI			= IOMUX_PAD(0x494, 0x14C, 4, 0x788, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__EMI_WEIM_D_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__EMI_WEIM_D_28			= IOMUX_PAD(0x494, 0x14C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__GPIO3_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__GPIO3_28			= IOMUX_PAD(0x494, 0x14C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__I2C1_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__I2C1_SDA			= IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__IPU_DI0_PIN13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__IPU_DI0_PIN13			= IOMUX_PAD(0x494, 0x14C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO		= IOMUX_PAD(0x494, 0x14C, 3, 0x82C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__IPU_EXT_TRIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__IPU_EXT_TRIG			= IOMUX_PAD(0x494, 0x14C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D28__UART2_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D28__UART2_CTS			= IOMUX_PAD(0x494, 0x14C, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__CSPI_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__CSPI_SS0			= IOMUX_PAD(0x498, 0x150, 4, 0x78C, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__EMI_WEIM_D_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__EMI_WEIM_D_29			= IOMUX_PAD(0x498, 0x150, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__GPIO3_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__GPIO3_29			= IOMUX_PAD(0x498, 0x150, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__IPU_CSI1_VSYNC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__IPU_CSI1_VSYNC		= IOMUX_PAD(0x498, 0x150, 6, 0x83C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__IPU_DI0_PIN14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__IPU_DI0_PIN14			= IOMUX_PAD(0x498, 0x150, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__IPU_DI1_PIN15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__IPU_DI1_PIN15			= IOMUX_PAD(0x498, 0x150, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS		= IOMUX_PAD(0x498, 0x150, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D29__UART2_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D29__UART2_RTS			= IOMUX_PAD(0x498, 0x150, 2, 0x87C, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__EMI_WEIM_D_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__EMI_WEIM_D_30			= IOMUX_PAD(0x49C, 0x154, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__GPIO3_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__GPIO3_30			= IOMUX_PAD(0x49C, 0x154, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__IPU_CSI0_D_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__IPU_CSI0_D_3			= IOMUX_PAD(0x49C, 0x154, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__IPU_DI0_PIN11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__IPU_DI0_PIN11			= IOMUX_PAD(0x49C, 0x154, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__IPU_DISP1_DAT_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__IPU_DISP1_DAT_21		= IOMUX_PAD(0x49C, 0x154, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__UART3_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__UART3_CTS			= IOMUX_PAD(0x49C, 0x154, 2, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__USBOH3_USBH1_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__USBOH3_USBH1_OC		= IOMUX_PAD(0x49C, 0x154, 6, 0x8A0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D30__USBOH3_USBH2_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D30__USBOH3_USBH2_OC		= IOMUX_PAD(0x49C, 0x154, 7, 0x8A4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__EMI_WEIM_D_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__EMI_WEIM_D_31			= IOMUX_PAD(0x4A0, 0x158, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__GPIO3_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__GPIO3_31			= IOMUX_PAD(0x4A0, 0x158, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__IPU_CSI0_D_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__IPU_CSI0_D_2			= IOMUX_PAD(0x4A0, 0x158, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__IPU_DI0_PIN12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__IPU_DI0_PIN12			= IOMUX_PAD(0x4A0, 0x158, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__IPU_DISP1_DAT_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__IPU_DISP1_DAT_20		= IOMUX_PAD(0x4A0, 0x158, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__UART3_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__UART3_RTS			= IOMUX_PAD(0x4A0, 0x158, 2, 0x884, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__USBOH3_USBH1_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__USBOH3_USBH1_PWR		= IOMUX_PAD(0x4A0, 0x158, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_D31__USBOH3_USBH2_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_D31__USBOH3_USBH2_PWR		= IOMUX_PAD(0x4A0, 0x158, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0		= IOMUX_PAD(0x4EC, 0x19C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA0__GPIO3_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA0__GPIO3_0			= IOMUX_PAD(0x4EC, 0x19C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA0__IPU_CSI1_D_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA0__IPU_CSI1_D_9			= IOMUX_PAD(0x4EC, 0x19C, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9		= IOMUX_PAD(0x4EC, 0x19C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA0__SRC_BT_CFG2_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA0__SRC_BT_CFG2_5			= IOMUX_PAD(0x4EC, 0x19C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10		= IOMUX_PAD(0x514, 0x1C4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA10__GPIO3_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA10__GPIO3_10			= IOMUX_PAD(0x514, 0x1C4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN		= IOMUX_PAD(0x514, 0x1C4, 4, 0x834, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA10__IPU_DI1_PIN15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA10__IPU_DI1_PIN15		= IOMUX_PAD(0x514, 0x1C4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA10__SRC_BT_CFG3_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA10__SRC_BT_CFG3_1		= IOMUX_PAD(0x514, 0x1C4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11		= IOMUX_PAD(0x518, 0x1C8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA11__GPIO3_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA11__GPIO3_11			= IOMUX_PAD(0x518, 0x1C8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC		= IOMUX_PAD(0x518, 0x1C8, 4, 0x838, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA11__IPU_DI1_PIN2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA11__IPU_DI1_PIN2			= IOMUX_PAD(0x518, 0x1C8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12		= IOMUX_PAD(0x51C, 0x1CC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA12__GPIO3_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA12__GPIO3_12			= IOMUX_PAD(0x51C, 0x1CC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC		= IOMUX_PAD(0x51C, 0x1CC, 4, 0x83C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA12__IPU_DI1_PIN3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA12__IPU_DI1_PIN3			= IOMUX_PAD(0x51C, 0x1CC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK		= IOMUX_PAD(0x520, 0x1D0, 4, 0x76C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13		= IOMUX_PAD(0x520, 0x1D0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA13__GPIO3_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA13__GPIO3_13			= IOMUX_PAD(0x520, 0x1D0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA13__IPU_DI1_D0_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA13__IPU_DI1_D0_CS		= IOMUX_PAD(0x520, 0x1D0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK		= IOMUX_PAD(0x524, 0x1D4, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14		= IOMUX_PAD(0x524, 0x1D4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA14__GPIO3_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA14__GPIO3_14			= IOMUX_PAD(0x524, 0x1D4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA14__IPU_DI1_D1_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA14__IPU_DI1_D1_CS		= IOMUX_PAD(0x524, 0x1D4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15		= IOMUX_PAD(0x528, 0x1D8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA15__GPIO3_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA15__GPIO3_15			= IOMUX_PAD(0x528, 0x1D8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA15__IPU_DI1_PIN1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA15__IPU_DI1_PIN1			= IOMUX_PAD(0x528, 0x1D8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA15__IPU_DI1_PIN4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA15__IPU_DI1_PIN4			= IOMUX_PAD(0x528, 0x1D8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1		= IOMUX_PAD(0x4F0, 0x1A0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA1__GPIO3_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA1__GPIO3_1			= IOMUX_PAD(0x4F0, 0x1A0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA1__IPU_CSI1_D_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA1__IPU_CSI1_D_8			= IOMUX_PAD(0x4F0, 0x1A0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8		= IOMUX_PAD(0x4F0, 0x1A0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA1__SRC_BT_CFG2_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA1__SRC_BT_CFG2_4			= IOMUX_PAD(0x4F0, 0x1A0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2		= IOMUX_PAD(0x4F4, 0x1A4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA2__GPIO3_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA2__GPIO3_2			= IOMUX_PAD(0x4F4, 0x1A4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA2__IPU_CSI1_D_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA2__IPU_CSI1_D_7			= IOMUX_PAD(0x4F4, 0x1A4, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7		= IOMUX_PAD(0x4F4, 0x1A4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA2__SRC_BT_CFG2_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA2__SRC_BT_CFG2_3			= IOMUX_PAD(0x4F4, 0x1A4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3		= IOMUX_PAD(0x4F8, 0x1A8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA3__GPIO3_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA3__GPIO3_3			= IOMUX_PAD(0x4F8, 0x1A8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA3__IPU_CSI1_D_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA3__IPU_CSI1_D_6			= IOMUX_PAD(0x4F8, 0x1A8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6		= IOMUX_PAD(0x4F8, 0x1A8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA3__SRC_BT_CFG2_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA3__SRC_BT_CFG2_2			= IOMUX_PAD(0x4F8, 0x1A8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4		= IOMUX_PAD(0x4FC, 0x1AC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA4__GPIO3_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA4__GPIO3_4			= IOMUX_PAD(0x4FC, 0x1AC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA4__IPU_CSI1_D_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA4__IPU_CSI1_D_5			= IOMUX_PAD(0x4FC, 0x1AC, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5		= IOMUX_PAD(0x4FC, 0x1AC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA4__SRC_BT_CFG3_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA4__SRC_BT_CFG3_7			= IOMUX_PAD(0x4FC, 0x1AC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5		= IOMUX_PAD(0x500, 0x1B0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA5__GPIO3_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA5__GPIO3_5			= IOMUX_PAD(0x500, 0x1B0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA5__IPU_CSI1_D_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA5__IPU_CSI1_D_4			= IOMUX_PAD(0x500, 0x1B0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4		= IOMUX_PAD(0x500, 0x1B0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA5__SRC_BT_CFG3_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA5__SRC_BT_CFG3_6			= IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, __NA_, 0, NO/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6		= IOMUX_PAD(0x504, 0x1B4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA6__GPIO3_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA6__GPIO3_6			= IOMUX_PAD(0x504, 0x1B4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA6__IPU_CSI1_D_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA6__IPU_CSI1_D_3			= IOMUX_PAD(0x504, 0x1B4, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3		= IOMUX_PAD(0x504, 0x1B4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA6__SRC_BT_CFG3_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA6__SRC_BT_CFG3_5			= IOMUX_PAD(0x504, 0x1B4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7		= IOMUX_PAD(0x508, 0x1B8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA7__GPIO3_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA7__GPIO3_7			= IOMUX_PAD(0x508, 0x1B8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA7__IPU_CSI1_D_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA7__IPU_CSI1_D_2			= IOMUX_PAD(0x508, 0x1B8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2		= IOMUX_PAD(0x508, 0x1B8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA7__SRC_BT_CFG3_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA7__SRC_BT_CFG3_4			= IOMUX_PAD(0x508, 0x1B8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8		= IOMUX_PAD(0x50C, 0x1BC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA8__GPIO3_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA8__GPIO3_8			= IOMUX_PAD(0x50C, 0x1BC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA8__IPU_CSI1_D_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA8__IPU_CSI1_D_1			= IOMUX_PAD(0x50C, 0x1BC, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1		= IOMUX_PAD(0x50C, 0x1BC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA8__SRC_BT_CFG3_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA8__SRC_BT_CFG3_3			= IOMUX_PAD(0x50C, 0x1BC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9		= IOMUX_PAD(0x510, 0x1C0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA9__GPIO3_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA9__GPIO3_9			= IOMUX_PAD(0x510, 0x1C0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA9__IPU_CSI1_D_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA9__IPU_CSI1_D_0			= IOMUX_PAD(0x510, 0x1C0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0		= IOMUX_PAD(0x510, 0x1C0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_DA9__SRC_BT_CFG3_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_DA9__SRC_BT_CFG3_2			= IOMUX_PAD(0x510, 0x1C0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB0__EMI_WEIM_EB_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB0__EMI_WEIM_EB_0			= IOMUX_PAD(0x4E4, 0x194, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB0__GPC_PMIC_RDY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB0__GPC_PMIC_RDY			= IOMUX_PAD(0x4E4, 0x194, 5, 0x810, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB0__GPIO2_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB0__GPIO2_28			= IOMUX_PAD(0x4E4, 0x194, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB0__IPU_CSI1_D_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB0__IPU_CSI1_D_11			= IOMUX_PAD(0x4E4, 0x194, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11		= IOMUX_PAD(0x4E4, 0x194, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB0__SRC_BT_CFG2_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB0__SRC_BT_CFG2_7			= IOMUX_PAD(0x4E4, 0x194, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB1__EMI_WEIM_EB_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB1__EMI_WEIM_EB_1			= IOMUX_PAD(0x4E8, 0x198, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB1__GPIO2_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB1__GPIO2_29			= IOMUX_PAD(0x4E8, 0x198, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB1__IPU_CSI1_D_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB1__IPU_CSI1_D_10			= IOMUX_PAD(0x4E8, 0x198, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10		= IOMUX_PAD(0x4E8, 0x198, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB1__SRC_BT_CFG2_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB1__SRC_BT_CFG2_6			= IOMUX_PAD(0x4E8, 0x198, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK		= IOMUX_PAD(0x45C, 0x114, 2, 0x76C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB2__ECSPI1_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB2__ECSPI1_SS0			= IOMUX_PAD(0x45C, 0x114, 4, 0x7A8, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB2__EMI_WEIM_EB_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB2__EMI_WEIM_EB_2			= IOMUX_PAD(0x45C, 0x114, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB2__GPIO2_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB2__GPIO2_30			= IOMUX_PAD(0x45C, 0x114, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB2__I2C2_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB2__I2C2_SCL			= IOMUX_PAD(0x45C, 0x114, 5 | IOMUX_CONFIG_SION, 0x81C, 1, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS		= IOMUX_PAD(0x45C, 0x114, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__EMI_WEIM_EB_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__EMI_WEIM_EB_3			= IOMUX_PAD(0x480, 0x138, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__GPIO2_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__GPIO2_31			= IOMUX_PAD(0x480, 0x138, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC		= IOMUX_PAD(0x480, 0x138, 6, 0x838, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__IPU_DI1_PIN16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__IPU_DI1_PIN16			= IOMUX_PAD(0x480, 0x138, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__IPU_DI1_PIN3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__IPU_DI1_PIN3			= IOMUX_PAD(0x480, 0x138, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__UART1_RI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__UART1_RI			= IOMUX_PAD(0x480, 0x138, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_EB3__UART3_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_EB3__UART3_RTS			= IOMUX_PAD(0x480, 0x138, 2, 0x884, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_LBA__ECSPI2_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_LBA__ECSPI2_SS1			= IOMUX_PAD(0x4DC, 0x190, 2, 0x7C8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_LBA__EMI_WEIM_LBA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_LBA__EMI_WEIM_LBA			= IOMUX_PAD(0x4DC, 0x190, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_LBA__GPIO2_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_LBA__GPIO2_27			= IOMUX_PAD(0x4DC, 0x190, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_LBA__IPU_DI1_PIN17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_LBA__IPU_DI1_PIN17			= IOMUX_PAD(0x4DC, 0x190, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_LBA__SRC_BT_CFG1_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_LBA__SRC_BT_CFG1_0			= IOMUX_PAD(0x4DC, 0x190, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_OE__ECSPI2_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_OE__ECSPI2_MISO			= IOMUX_PAD(0x4D4, 0x188, 2, 0x7BC, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_OE__EMI_WEIM_OE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_OE__EMI_WEIM_OE			= IOMUX_PAD(0x4D4, 0x188, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_OE__GPIO2_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_OE__GPIO2_25			= IOMUX_PAD(0x4D4, 0x188, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_OE__IPU_DI1_PIN7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_OE__IPU_DI1_PIN7			= IOMUX_PAD(0x4D4, 0x188, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_OE__USBPHY2_IDDIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_OE__USBPHY2_IDDIG			= IOMUX_PAD(0x4D4, 0x188, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_RW__ECSPI2_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_RW__ECSPI2_SS0			= IOMUX_PAD(0x4D8, 0x18C, 2, 0x7C4, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_RW__EMI_WEIM_RW	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_RW__EMI_WEIM_RW			= IOMUX_PAD(0x4D8, 0x18C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_RW__GPIO2_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_RW__GPIO2_26			= IOMUX_PAD(0x4D8, 0x18C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_RW__IPU_DI1_PIN8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_RW__IPU_DI1_PIN8			= IOMUX_PAD(0x4D8, 0x18C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT		= IOMUX_PAD(0x4D8, 0x18C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B		= IOMUX_PAD(0x534, 0x1E4, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT		= IOMUX_PAD(0x534, 0x1E4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_EIM_WAIT__GPIO5_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_EIM_WAIT__GPIO5_0			= IOMUX_PAD(0x534, 0x1E4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_CRS_DV__ESAI1_SCKT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_CRS_DV__ESAI1_SCKT			= IOMUX_PAD(0x5D0, 0x254, 2, 0x7E0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_CRS_DV__FEC_RX_DV	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_CRS_DV__FEC_RX_DV			= IOMUX_PAD(0x5D0, 0x254, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_CRS_DV__GPIO1_25	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_CRS_DV__GPIO1_25			= IOMUX_PAD(0x5D0, 0x254, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDC__ESAI1_TX5_RX0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDC__ESAI1_TX5_RX0			= IOMUX_PAD(0x5E8, 0x26C, 2, 0x7F8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDC__FEC_MDC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDC__FEC_MDC			= IOMUX_PAD(0x5E8, 0x26C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDC__GPIO1_31	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDC__GPIO1_31			= IOMUX_PAD(0x5E8, 0x26C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDC__MLB_MLBDAT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDC__MLB_MLBDAT			= IOMUX_PAD(0x5E8, 0x26C, 3, 0x85C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG	= IOMUX_PAD(0x5E8, 0x26C, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1		= IOMUX_PAD(0x5E8, 0x26C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49		= IOMUX_PAD(0x5C4, 0x248, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__ESAI1_SCKR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__ESAI1_SCKR			= IOMUX_PAD(0x5C4, 0x248, 2, 0x7DC, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__FEC_COL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__FEC_COL			= IOMUX_PAD(0x5C4, 0x248, 3, 0x800, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__FEC_MDIO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__FEC_MDIO			= IOMUX_PAD(0x5C4, 0x248, 0, 0x804, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__GPIO1_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__GPIO1_22			= IOMUX_PAD(0x5C4, 0x248, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2		= IOMUX_PAD(0x5C4, 0x248, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3	= IOMUX_PAD(0x5C4, 0x248, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50		= IOMUX_PAD(0x5C8, 0x24C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_REF_CLK__ESAI1_FSR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_REF_CLK__ESAI1_FSR			= IOMUX_PAD(0x5C8, 0x24C, 2, 0x7CC, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_REF_CLK__FEC_TX_CLK		= IOMUX_PAD(0x5C8, 0x24C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_REF_CLK__GPIO1_23	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_REF_CLK__GPIO1_23			= IOMUX_PAD(0x5C8, 0x24C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4	= IOMUX_PAD(0x5C8, 0x24C, 5, __NA_, 0, NO_PAD_CTR/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD0__ESAI1_HCKT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD0__ESAI1_HCKT			= IOMUX_PAD(0x5D8, 0x25C, 2, 0x7D8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD0__FEC_RDATA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD0__FEC_RDATA_0			= IOMUX_PAD(0x5D8, 0x25C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD0__GPIO1_27	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD0__GPIO1_27			= IOMUX_PAD(0x5D8, 0x25C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD0__OSC32k_32K_OUT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD0__OSC32k_32K_OUT		= IOMUX_PAD(0x5D8, 0x25C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD1__ESAI1_FST	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD1__ESAI1_FST			= IOMUX_PAD(0x5D4, 0x258, 2, 0x7D0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD1__FEC_RDATA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD1__FEC_RDATA_1			= IOMUX_PAD(0x5D4, 0x258, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD1__GPIO1_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD1__GPIO1_26			= IOMUX_PAD(0x5D4, 0x258, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD1__MLB_MLBSIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD1__MLB_MLBSIG			= IOMUX_PAD(0x5D4, 0x258, 3, 0x860, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1		= IOMUX_PAD(0x5D4, 0x258, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RX_ER__ESAI1_HCKR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RX_ER__ESAI1_HCKR			= IOMUX_PAD(0x5CC, 0x250, 2, 0x7D4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RX_ER__FEC_RX_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RX_ER__FEC_RX_CLK			= IOMUX_PAD(0x5CC, 0x250, 3, 0x808, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RX_ER__FEC_RX_ER	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RX_ER__FEC_RX_ER			= IOMUX_PAD(0x5CC, 0x250, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RX_ER__GPIO1_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RX_ER__GPIO1_24			= IOMUX_PAD(0x5CC, 0x250, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3		= IOMUX_PAD(0x5CC, 0x250, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1		= IOMUX_PAD(0x5E4, 0x268, 2, 0x7F4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD0__FEC_TDATA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD0__FEC_TDATA_0			= IOMUX_PAD(0x5E4, 0x268, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD0__GPIO1_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD0__GPIO1_30			= IOMUX_PAD(0x5E4, 0x268, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0		= IOMUX_PAD(0x5E4, 0x268, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3		= IOMUX_PAD(0x5E0, 0x264, 2, 0x7EC, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD1__FEC_TDATA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD1__FEC_TDATA_1			= IOMUX_PAD(0x5E0, 0x264, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD1__GPIO1_29	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD1__GPIO1_29			= IOMUX_PAD(0x5E0, 0x264, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD1__MLB_MLBCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD1__MLB_MLBCLK			= IOMUX_PAD(0x5E0, 0x264, 3, 0x858, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK		= IOMUX_PAD(0x5E0, 0x264, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2		= IOMUX_PAD(0x5DC, 0x260, 2, 0x7F0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TX_EN__FEC_TX_EN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TX_EN__FEC_TX_EN			= IOMUX_PAD(0x5DC, 0x260, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_FEC_TX_EN__GPIO1_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_FEC_TX_EN__GPIO1_28			= IOMUX_PAD(0x5DC, 0x260, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__CCM_CLKO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__CCM_CLKO			= IOMUX_PAD(0x6A4, 0x314, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK		= IOMUX_PAD(0x6A4, 0x314, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__CSU_TD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__CSU_TD				= IOMUX_PAD(0x6A4, 0x314, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__EPIT1_EPITO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__EPIT1_EPITO			= IOMUX_PAD(0x6A4, 0x314, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__GPIO1_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__GPIO1_0			= IOMUX_PAD(0x6A4, 0x314, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__KPP_COL_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__KPP_COL_5			= IOMUX_PAD(0x6A4, 0x314, 2, 0x840, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__SRTC_ALARM_DEB	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__SRTC_ALARM_DEB			= IOMUX_PAD(0x6A4, 0x314, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_0__USBOH3_USBH1_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_0__USBOH3_USBH1_PWR		= IOMUX_PAD(0x6A4, 0x314, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_10__GPIO4_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_10__GPIO4_0			= IOMUX_PAD(0x540, 0x214, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_10__OSC32k_32K_OUT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_10__OSC32k_32K_OUT		= IOMUX_PAD(0x540, 0x214, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_11__GPIO4_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_11__GPIO4_1			= IOMUX_PAD(0x544, 0x218, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_12__GPIO4_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_12__GPIO4_2			= IOMUX_PAD(0x548, 0x21C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_13__GPIO4_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_13__GPIO4_3			= IOMUX_PAD(0x54C, 0x220, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_14__GPIO4_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_14__GPIO4_4			= IOMUX_PAD(0x550, 0x224, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__ESAI1_TX3_RX2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__ESAI1_TX3_RX2			= IOMUX_PAD(0x6CC, 0x33C, 0, 0x7F0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__GPIO7_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__GPIO7_11			= IOMUX_PAD(0x6CC, 0x33C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__I2C3_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__I2C3_SDA			= IOMUX_PAD(0x6CC, 0x33C, 6 | IOMUX_CONFIG_SION, 0x828, 2, NO_PAD_/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1		= IOMUX_PAD(0x6CC, 0x33C, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__SJC_DE_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__SJC_DE_B			= IOMUX_PAD(0x6CC, 0x33C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__SPDIF_IN1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__SPDIF_IN1			= IOMUX_PAD(0x6CC, 0x33C, 5, 0x870, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT		= IOMUX_PAD(0x6CC, 0x33C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__ESAI1_TX0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__ESAI1_TX0			= IOMUX_PAD(0x6D0, 0x340, 0, 0x7E4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__GPC_PMIC_RDY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__GPC_PMIC_RDY			= IOMUX_PAD(0x6D0, 0x340, 3, 0x810, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__GPIO7_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__GPIO7_12			= IOMUX_PAD(0x6D0, 0x340, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__IPU_SNOOP2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__IPU_SNOOP2			= IOMUX_PAD(0x6D0, 0x340, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG		= IOMUX_PAD(0x6D0, 0x340, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0		= IOMUX_PAD(0x6D0, 0x340, 2, 0x868, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__SJC_JTAG_ACT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__SJC_JTAG_ACT			= IOMUX_PAD(0x6D0, 0x340, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_17__SPDIF_OUT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_17__SPDIF_OUT1			= IOMUX_PAD(0x6D0, 0x340, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK		= IOMUX_PAD(0x6D4, 0x344, 5, 0x768, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__ESAI1_TX1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__ESAI1_TX1			= IOMUX_PAD(0x6D4, 0x344, 0, 0x7E8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__ESDHC1_LCTL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__ESDHC1_LCTL			= IOMUX_PAD(0x6D4, 0x344, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__GPIO7_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__GPIO7_13			= IOMUX_PAD(0x6D4, 0x344, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__OWIRE_LINE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__OWIRE_LINE			= IOMUX_PAD(0x6D4, 0x344, 3, 0x864, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG	= IOMUX_PAD(0x6D4, 0x344, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1		= IOMUX_PAD(0x6D4, 0x344, 2, 0x86C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_18__SRC_SYSTEM_RST	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_18__SRC_SYSTEM_RST		= IOMUX_PAD(0x6D4, 0x344, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__CCM_CLKO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__CCM_CLKO			= IOMUX_PAD(0x348, 0x020, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__ECSPI1_RDY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__ECSPI1_RDY			= IOMUX_PAD(0x348, 0x020, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__FEC_TDATA_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__FEC_TDATA_3			= IOMUX_PAD(0x348, 0x020, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__GPIO4_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__GPIO4_5			= IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__KPP_COL_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__KPP_COL_5			= IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2		= IOMUX_PAD(0x348, 0x020, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__SPDIF_OUT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__SPDIF_OUT1			= IOMUX_PAD(0x348, 0x020, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_19__SRC_INT_BOOT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_19__SRC_INT_BOOT			= IOMUX_PAD(0x348, 0x020, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK		= IOMUX_PAD(0x6A8, 0x318, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__ESAI1_SCKR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__ESAI1_SCKR			= IOMUX_PAD(0x6A8, 0x318, 0, 0x7DC, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__ESDHC1_CD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__ESDHC1_CD			= IOMUX_PAD(0x6A8, 0x318, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__GPIO1_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__GPIO1_1			= IOMUX_PAD(0x6A8, 0x318, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__KPP_ROW_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__KPP_ROW_5			= IOMUX_PAD(0x6A8, 0x318, 2, 0x84C, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__PWM2_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__PWM2_PWMO			= IOMUX_PAD(0x6A8, 0x318, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__SRC_TESTER_ACK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__SRC_TESTER_ACK			= IOMUX_PAD(0x6A8, 0x318, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_1__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_1__WDOG2_WDOG_B			= IOMUX_PAD(0x6A8, 0x318, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__CCM_CCM_OUT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__CCM_CCM_OUT_1			= IOMUX_PAD(0x6B8, 0x328, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0		= IOMUX_PAD(0x6B8, 0x328, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__ESAI1_FST	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__ESAI1_FST			= IOMUX_PAD(0x6B8, 0x328, 0, 0x7D0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__ESDHC2_WP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__ESDHC2_WP			= IOMUX_PAD(0x6B8, 0x328, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__GPIO1_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__GPIO1_2			= IOMUX_PAD(0x6B8, 0x328, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__KPP_ROW_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__KPP_ROW_6			= IOMUX_PAD(0x6B8, 0x328, 2, 0x850, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__MLB_MLBDAT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__MLB_MLBDAT			= IOMUX_PAD(0x6B8, 0x328, 7, 0x85C, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2	= IOMUX_PAD(0x6B8, 0x328, 5, __NA_, 0, NO_PAD_CTRL)/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__CCM_CLKO2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__CCM_CLKO2			= IOMUX_PAD(0x6B0, 0x320, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__DPLLIP1_TOG_EN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__DPLLIP1_TOG_EN			= IOMUX_PAD(0x6B0, 0x320, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__ESAI1_HCKR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__ESAI1_HCKR			= IOMUX_PAD(0x6B0, 0x320, 0, 0x7D4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__GPIO1_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__GPIO1_3			= IOMUX_PAD(0x6B0, 0x320, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__I2C3_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__I2C3_SCL			= IOMUX_PAD(0x6B0, 0x320, 2 | IOMUX_CONFIG_SION, 0x824, 1, NO_PAD_C/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__MLB_MLBCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__MLB_MLBCLK			= IOMUX_PAD(0x6B0, 0x320, 7, 0x858, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0	= IOMUX_PAD(0x6B0, 0x320, 5, __NA_, 0, NO_PAD_CTRL)/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_3__USBOH3_USBH1_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_3__USBOH3_USBH1_OC		= IOMUX_PAD(0x6B0, 0x320, 6, 0x8A0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__CCM_CCM_OUT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__CCM_CCM_OUT_2			= IOMUX_PAD(0x6BC, 0x32C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1		= IOMUX_PAD(0x6BC, 0x32C, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__ESAI1_HCKT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__ESAI1_HCKT			= IOMUX_PAD(0x6BC, 0x32C, 0, 0x7D8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__ESDHC2_CD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__ESDHC2_CD			= IOMUX_PAD(0x6BC, 0x32C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__GPIO1_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__GPIO1_4			= IOMUX_PAD(0x6BC, 0x32C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__KPP_COL_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__KPP_COL_7			= IOMUX_PAD(0x6BC, 0x32C, 2, 0x848, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3	= IOMUX_PAD(0x6BC, 0x32C, 5, __NA_, 0, NO_PAD_CTRL)/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_4__SCC_SEC_STATE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_4__SCC_SEC_STATE			= IOMUX_PAD(0x6BC, 0x32C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__CCM_CLKO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__CCM_CLKO			= IOMUX_PAD(0x6C0, 0x330, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__CCM_PLL1_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__CCM_PLL1_BYP			= IOMUX_PAD(0x6C0, 0x330, 7, 0x770, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2		= IOMUX_PAD(0x6C0, 0x330, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__ESAI1_TX2_RX3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__ESAI1_TX2_RX3			= IOMUX_PAD(0x6C0, 0x330, 0, 0x7EC, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__GPIO1_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__GPIO1_5			= IOMUX_PAD(0x6C0, 0x330, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__I2C3_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__I2C3_SCL			= IOMUX_PAD(0x6C0, 0x330, 6 | IOMUX_CONFIG_SION, 0x824, 2, NO_PAD_C/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__KPP_ROW_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__KPP_ROW_7			= IOMUX_PAD(0x6C0, 0x330, 2, 0x854, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4	= IOMUX_PAD(0x6C0, 0x330, 5, __NA_, 0, NO_PAD_CTRL)/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__CCM_CCM_OUT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__CCM_CCM_OUT_0			= IOMUX_PAD(0x6B4, 0x324, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__CSU_CSU_INT_DEB	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__CSU_CSU_INT_DEB		= IOMUX_PAD(0x6B4, 0x324, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__ESAI1_SCKT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__ESAI1_SCKT			= IOMUX_PAD(0x6B4, 0x324, 0, 0x7E0, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__ESDHC2_LCTL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__ESDHC2_LCTL			= IOMUX_PAD(0x6B4, 0x324, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__GPIO1_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__GPIO1_6			= IOMUX_PAD(0x6B4, 0x324, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__I2C3_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__I2C3_SDA			= IOMUX_PAD(0x6B4, 0x324, 2 | IOMUX_CONFIG_SION, 0x828, 1, NO_PAD_C/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__MLB_MLBSIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__MLB_MLBSIG			= IOMUX_PAD(0x6B4, 0x324, 7, 0x860, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1	= IOMUX_PAD(0x6B4, 0x324, 5, __NA_, 0, NO_PAD_CTRL)/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__CAN1_TXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__CAN1_TXCAN			= IOMUX_PAD(0x6C4, 0x334, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__CCM_PLL2_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__CCM_PLL2_BYP			= IOMUX_PAD(0x6C4, 0x334, 7, 0x774, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__EPIT1_EPITO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__EPIT1_EPITO			= IOMUX_PAD(0x6C4, 0x334, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__ESAI1_TX4_RX1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__ESAI1_TX4_RX1			= IOMUX_PAD(0x6C4, 0x334, 0, 0x7F4, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__FIRI_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__FIRI_RXD			= IOMUX_PAD(0x6C4, 0x334, 5, 0x80C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__GPIO1_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__GPIO1_7			= IOMUX_PAD(0x6C4, 0x334, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__SPDIF_PLOCK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__SPDIF_PLOCK			= IOMUX_PAD(0x6C4, 0x334, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_7__UART2_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_7__UART2_TXD_MUX			= IOMUX_PAD(0x6C4, 0x334, 4, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__CAN1_RXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__CAN1_RXCAN			= IOMUX_PAD(0x6C8, 0x338, 3, 0x760, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__CCM_PLL3_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__CCM_PLL3_BYP			= IOMUX_PAD(0x6C8, 0x338, 7, 0x778, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__EPIT2_EPITO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__EPIT2_EPITO			= IOMUX_PAD(0x6C8, 0x338, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__ESAI1_TX5_RX0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__ESAI1_TX5_RX0			= IOMUX_PAD(0x6C8, 0x338, 0, 0x7F8, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__FIRI_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__FIRI_TXD			= IOMUX_PAD(0x6C8, 0x338, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__GPIO1_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__GPIO1_8			= IOMUX_PAD(0x6C8, 0x338, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__SPDIF_SRCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__SPDIF_SRCLK			= IOMUX_PAD(0x6C8, 0x338, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_8__UART2_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_8__UART2_RXD_MUX			= IOMUX_PAD(0x6C8, 0x338, 4, 0x880, 5, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__CCM_REF_EN_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__CCM_REF_EN_B			= IOMUX_PAD(0x6AC, 0x31C, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__ESAI1_FSR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__ESAI1_FSR			= IOMUX_PAD(0x6AC, 0x31C, 0, 0x7CC, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__ESDHC1_WP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__ESDHC1_WP			= IOMUX_PAD(0x6AC, 0x31C, 6, 0x7FC, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__GPIO1_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__GPIO1_9			= IOMUX_PAD(0x6AC, 0x31C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__KPP_COL_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__KPP_COL_6			= IOMUX_PAD(0x6AC, 0x31C, 2, 0x844, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__PWM1_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__PWM1_PWMO			= IOMUX_PAD(0x6AC, 0x31C, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__SCC_FAIL_STATE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__SCC_FAIL_STATE			= IOMUX_PAD(0x6AC, 0x31C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_GPIO_9__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_GPIO_9__WDOG1_WDOG_B			= IOMUX_PAD(0x6AC, 0x31C, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC		= IOMUX_PAD(0x34C, 0x024, 2, 0x758, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__ECSPI1_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__ECSPI1_SCLK			= IOMUX_PAD(0x34C, 0x024, 5, 0x79C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__FEC_RDATA_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__FEC_RDATA_3			= IOMUX_PAD(0x34C, 0x024, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__GPIO4_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__GPIO4_6			= IOMUX_PAD(0x34C, 0x024, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__KPP_COL_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__KPP_COL_0			= IOMUX_PAD(0x34C, 0x024, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__SRC_ANY_PU_RST	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__SRC_ANY_PU_RST		= IOMUX_PAD(0x34C, 0x024, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL0__UART4_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL0__UART4_TXD_MUX		= IOMUX_PAD(0x34C, 0x024, 4, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS		= IOMUX_PAD(0x354, 0x02C, 2, 0x75C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__ECSPI1_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__ECSPI1_MISO			= IOMUX_PAD(0x354, 0x02C, 5, 0x7A0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__FEC_RX_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__FEC_RX_CLK			= IOMUX_PAD(0x354, 0x02C, 6, 0x808, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__GPIO4_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__GPIO4_8			= IOMUX_PAD(0x354, 0x02C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__KPP_COL_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__KPP_COL_1			= IOMUX_PAD(0x354, 0x02C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__UART5_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__UART5_TXD_MUX		= IOMUX_PAD(0x354, 0x02C, 4, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL1__USBPHY1_TXREADY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL1__USBPHY1_TXREADY		= IOMUX_PAD(0x354, 0x02C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__CAN1_TXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__CAN1_TXCAN			= IOMUX_PAD(0x35C, 0x034, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__ECSPI1_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__ECSPI1_SS1			= IOMUX_PAD(0x35C, 0x034, 5, 0x7AC, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__FEC_MDIO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__FEC_MDIO			= IOMUX_PAD(0x35C, 0x034, 4, 0x804, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__FEC_RDATA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__FEC_RDATA_2			= IOMUX_PAD(0x35C, 0x034, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__GPIO4_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__GPIO4_10			= IOMUX_PAD(0x35C, 0x034, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__KPP_COL_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__KPP_COL_2			= IOMUX_PAD(0x35C, 0x034, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE		= IOMUX_PAD(0x35C, 0x034, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__ECSPI1_SS3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__ECSPI1_SS3			= IOMUX_PAD(0x364, 0x03C, 5, 0x7B4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__FEC_CRS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__FEC_CRS			= IOMUX_PAD(0x364, 0x03C, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__GPIO4_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__GPIO4_12			= IOMUX_PAD(0x364, 0x03C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__I2C2_SCL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__I2C2_SCL			= IOMUX_PAD(0x364, 0x03C, 4 | IOMUX_CONFIG_SION, 0x81C, 0, NO_PAD/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__KPP_COL_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__KPP_COL_3			= IOMUX_PAD(0x364, 0x03C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__SPDIF_IN1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__SPDIF_IN1			= IOMUX_PAD(0x364, 0x03C, 3, 0x870, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__USBOH3_H2_DP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__USBOH3_H2_DP			= IOMUX_PAD(0x364, 0x03C, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK		= IOMUX_PAD(0x364, 0x03C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__CAN2_TXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__CAN2_TXCAN			= IOMUX_PAD(0x36C, 0x044, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__GPIO4_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__GPIO4_14			= IOMUX_PAD(0x36C, 0x044, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__IPU_SISG_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__IPU_SISG_4			= IOMUX_PAD(0x36C, 0x044, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__KPP_COL_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__KPP_COL_4			= IOMUX_PAD(0x36C, 0x044, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__UART5_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__UART5_RTS			= IOMUX_PAD(0x36C, 0x044, 4, 0x894, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC		= IOMUX_PAD(0x36C, 0x044, 5, 0x89C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1		= IOMUX_PAD(0x36C, 0x044, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD		= IOMUX_PAD(0x350, 0x028, 2, 0x74C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW0__ECSPI1_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW0__ECSPI1_MOSI			= IOMUX_PAD(0x350, 0x028, 5, 0x7A4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW0__FEC_TX_ER	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW0__FEC_TX_ER			= IOMUX_PAD(0x350, 0x028, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW0__GPIO4_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW0__GPIO4_7			= IOMUX_PAD(0x350, 0x028, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW0__KPP_ROW_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW0__KPP_ROW_0			= IOMUX_PAD(0x350, 0x028, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW0__UART4_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW0__UART4_RXD_MUX		= IOMUX_PAD(0x350, 0x028, 4, 0x890, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD		= IOMUX_PAD(0x358, 0x030, 2, 0x748, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__ECSPI1_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__ECSPI1_SS0			= IOMUX_PAD(0x358, 0x030, 5, 0x7A8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__FEC_COL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__FEC_COL			= IOMUX_PAD(0x358, 0x030, 6, 0x800, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__GPIO4_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__GPIO4_9			= IOMUX_PAD(0x358, 0x030, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__KPP_ROW_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__KPP_ROW_1			= IOMUX_PAD(0x358, 0x030, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__UART5_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__UART5_RXD_MUX		= IOMUX_PAD(0x358, 0x030, 4, 0x898, 1, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW1__USBPHY1_RXVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW1__USBPHY1_RXVALID		= IOMUX_PAD(0x358, 0x030, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__CAN1_RXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__CAN1_RXCAN			= IOMUX_PAD(0x360, 0x038, 2, 0x760, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__ECSPI1_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__ECSPI1_SS2			= IOMUX_PAD(0x360, 0x038, 5, 0x7B0, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__FEC_MDC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__FEC_MDC			= IOMUX_PAD(0x360, 0x038, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__FEC_TDATA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__FEC_TDATA_2			= IOMUX_PAD(0x360, 0x038, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__GPIO4_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__GPIO4_11			= IOMUX_PAD(0x360, 0x038, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__KPP_ROW_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__KPP_ROW_2			= IOMUX_PAD(0x360, 0x038, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW2__USBPHY1_RXERROR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW2__USBPHY1_RXERROR		= IOMUX_PAD(0x360, 0x038, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK		= IOMUX_PAD(0x368, 0x040, 3, 0x768, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__CCM_PLL4_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__CCM_PLL4_BYP			= IOMUX_PAD(0x368, 0x040, 6, 0x77C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__GPIO4_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__GPIO4_13			= IOMUX_PAD(0x368, 0x040, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__I2C2_SDA	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__I2C2_SDA			= IOMUX_PAD(0x368, 0x040, 4 | IOMUX_CONFIG_SION, 0x820, 0, NO_PAD/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__KPP_ROW_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__KPP_ROW_3			= IOMUX_PAD(0x368, 0x040, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__OSC32K_32K_OUT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__OSC32K_32K_OUT		= IOMUX_PAD(0x368, 0x040, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__USBOH3_H2_DM	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__USBOH3_H2_DM			= IOMUX_PAD(0x368, 0x040, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0		= IOMUX_PAD(0x368, 0x040, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__CAN2_RXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__CAN2_RXCAN			= IOMUX_PAD(0x370, 0x048, 2, 0x764, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__GPIO4_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__GPIO4_15			= IOMUX_PAD(0x370, 0x048, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__IPU_SISG_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__IPU_SISG_5			= IOMUX_PAD(0x370, 0x048, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__KPP_ROW_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__KPP_ROW_4			= IOMUX_PAD(0x370, 0x048, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__UART5_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__UART5_CTS			= IOMUX_PAD(0x370, 0x048, 4, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR		= IOMUX_PAD(0x370, 0x048, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID		= IOMUX_PAD(0x370, 0x048, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_CLK_P__GPIO7_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_CLK_P__GPIO7_24			= IOMUX_PAD(__NA_, 0x204, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK		= IOMUX_PAD(__NA_, 0x204, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX0_P__GPIO7_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX0_P__GPIO7_30			= IOMUX_PAD(__NA_, 0x210, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0		= IOMUX_PAD(__NA_, 0x210, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX1_P__GPIO7_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX1_P__GPIO7_28			= IOMUX_PAD(__NA_, 0x20C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1		= IOMUX_PAD(__NA_, 0x20C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX2_P__GPIO7_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX2_P__GPIO7_26			= IOMUX_PAD(__NA_, 0x208, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2		= IOMUX_PAD(__NA_, 0x208, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX3_P__GPIO7_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX3_P__GPIO7_22			= IOMUX_PAD(__NA_, 0x200, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3		= IOMUX_PAD(__NA_, 0x200, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_CLK_P__GPIO6_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_CLK_P__GPIO6_26			= IOMUX_PAD(__NA_, 0x1F4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK		= IOMUX_PAD(__NA_, 0x1F4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX0_P__GPIO6_30	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX0_P__GPIO6_30			= IOMUX_PAD(__NA_, 0x1FC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0		= IOMUX_PAD(__NA_, 0x1FC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX1_P__GPIO6_28	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX1_P__GPIO6_28			= IOMUX_PAD(__NA_, 0x1F8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1		= IOMUX_PAD(__NA_, 0x1F8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX2_P__GPIO6_24	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX2_P__GPIO6_24			= IOMUX_PAD(__NA_, 0x1F0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2		= IOMUX_PAD(__NA_, 0x1F0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX3_P__GPIO6_22	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX3_P__GPIO6_22			= IOMUX_PAD(__NA_, 0x1EC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3		= IOMUX_PAD(__NA_, 0x1EC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_ALE__EMI_NANDF_ALE		= IOMUX_PAD(0x5A4, 0x22C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_ALE__GPIO6_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_ALE__GPIO6_8			= IOMUX_PAD(0x5A4, 0x22C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1		= IOMUX_PAD(0x5A4, 0x22C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CLE__EMI_NANDF_CLE		= IOMUX_PAD(0x5A0, 0x228, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CLE__GPIO6_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CLE__GPIO6_7			= IOMUX_PAD(0x5A0, 0x228, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0		= IOMUX_PAD(0x5A0, 0x228, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0		= IOMUX_PAD(0x5B0, 0x238, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS0__GPIO6_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS0__GPIO6_11			= IOMUX_PAD(0x5B0, 0x238, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4		= IOMUX_PAD(0x5B0, 0x238, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1		= IOMUX_PAD(0x5B4, 0x23C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS1__GPIO6_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS1__GPIO6_14			= IOMUX_PAD(0x5B4, 0x23C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS1__MLB_MLBCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS1__MLB_MLBCLK			= IOMUX_PAD(0x5B4, 0x23C, 6, 0x858, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5		= IOMUX_PAD(0x5B4, 0x23C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK		= IOMUX_PAD(0x5B8, 0x240, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2		= IOMUX_PAD(0x5B8, 0x240, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__EMI_WEIM_CRE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__EMI_WEIM_CRE		= IOMUX_PAD(0x5B8, 0x240, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__ESAI1_TX0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__ESAI1_TX0			= IOMUX_PAD(0x5B8, 0x240, 3, 0x7E4, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__GPIO6_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__GPIO6_15			= IOMUX_PAD(0x5B8, 0x240, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__IPU_SISG_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__IPU_SISG_0			= IOMUX_PAD(0x5B8, 0x240, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__MLB_MLBSIG	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__MLB_MLBSIG			= IOMUX_PAD(0x5B8, 0x240, 6, 0x860, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6		= IOMUX_PAD(0x5B8, 0x240, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3		= IOMUX_PAD(0x5BC, 0x244, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__EMI_WEIM_A_26	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__EMI_WEIM_A_26		= IOMUX_PAD(0x5BC, 0x244, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__ESAI1_TX1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__ESAI1_TX1			= IOMUX_PAD(0x5BC, 0x244, 3, 0x7E8, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__GPIO6_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__GPIO6_16			= IOMUX_PAD(0x5BC, 0x244, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__IPU_SISG_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__IPU_SISG_1			= IOMUX_PAD(0x5BC, 0x244, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__MLB_MLBDAT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__MLB_MLBDAT			= IOMUX_PAD(0x5BC, 0x244, 6, 0x85C, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7		= IOMUX_PAD(0x5BC, 0x244, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0		= IOMUX_PAD(0x5AC, 0x234, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_RB0__GPIO6_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_RB0__GPIO6_10			= IOMUX_PAD(0x5AC, 0x234, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3		= IOMUX_PAD(0x5AC, 0x234, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B		= IOMUX_PAD(0x530, 0x1E0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_RE_B__GPIO6_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_RE_B__GPIO6_13			= IOMUX_PAD(0x530, 0x1E0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B		= IOMUX_PAD(0x52C, 0x1DC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_WE_B__GPIO6_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_WE_B__GPIO6_12			= IOMUX_PAD(0x52C, 0x1DC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B		= IOMUX_PAD(0x5A8, 0x230, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_WP_B__GPIO6_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_WP_B__GPIO6_9			= IOMUX_PAD(0x5A8, 0x230, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2		= IOMUX_PAD(0x5A8, 0x230, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1		= IOMUX_PAD(0x5FC, 0x27C, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_BUFFER_EN__GPIO7_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_BUFFER_EN__GPIO7_1		= IOMUX_PAD(0x5FC, 0x27C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN		= IOMUX_PAD(0x5FC, 0x27C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX		= IOMUX_PAD(0x5FC, 0x27C, 3, 0x880, 3, MX53_UART_PAD_CT/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5	= IOMUX_PAD(0x5FC, 0x27C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_0__GPIO7_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_0__GPIO7_9			= IOMUX_PAD(0x61C, 0x29C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_0__PATA_CS_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_0__PATA_CS_0			= IOMUX_PAD(0x61C, 0x29C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_0__UART3_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_0__UART3_TXD_MUX		= IOMUX_PAD(0x61C, 0x29C, 4, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5		= IOMUX_PAD(0x61C, 0x29C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_1__GPIO7_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_1__GPIO7_10			= IOMUX_PAD(0x620, 0x2A0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_1__PATA_CS_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_1__PATA_CS_1			= IOMUX_PAD(0x620, 0x2A0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_1__UART3_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_1__UART3_RXD_MUX		= IOMUX_PAD(0x620, 0x2A0, 4, 0x888, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6		= IOMUX_PAD(0x620, 0x2A0, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__EMI_NANDF_D_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__EMI_NANDF_D_0		= IOMUX_PAD(0x628, 0x2A4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__ESDHC3_DAT4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__ESDHC3_DAT4		= IOMUX_PAD(0x628, 0x2A4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__GPIO2_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__GPIO2_0			= IOMUX_PAD(0x628, 0x2A4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0	= IOMUX_PAD(0x628, 0x2A4, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0		= IOMUX_PAD(0x628, 0x2A4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__PATA_DATA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__PATA_DATA_0		= IOMUX_PAD(0x628, 0x2A4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7		= IOMUX_PAD(0x628, 0x2A4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__EMI_NANDF_D_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__EMI_NANDF_D_10		= IOMUX_PAD(0x650, 0x2CC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__ESDHC1_DAT6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__ESDHC1_DAT6		= IOMUX_PAD(0x650, 0x2CC, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__ESDHC3_DAT2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__ESDHC3_DAT2		= IOMUX_PAD(0x650, 0x2CC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__GPIO2_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__GPIO2_10			= IOMUX_PAD(0x650, 0x2CC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10	= IOMUX_PAD(0x650, 0x2CC, 5, __NA_, 0, NO_PAD_CTRL/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10		= IOMUX_PAD(0x650, 0x2CC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA10__PATA_DATA_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA10__PATA_DATA_10		= IOMUX_PAD(0x650, 0x2CC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__EMI_NANDF_D_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__EMI_NANDF_D_11		= IOMUX_PAD(0x654, 0x2D0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__ESDHC1_DAT7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__ESDHC1_DAT7		= IOMUX_PAD(0x654, 0x2D0, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__ESDHC3_DAT3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__ESDHC3_DAT3		= IOMUX_PAD(0x654, 0x2D0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__GPIO2_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__GPIO2_11			= IOMUX_PAD(0x654, 0x2D0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11	= IOMUX_PAD(0x654, 0x2D0, 5, __NA_, 0, NO_PAD_CTRL/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11		= IOMUX_PAD(0x654, 0x2D0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA11__PATA_DATA_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA11__PATA_DATA_11		= IOMUX_PAD(0x654, 0x2D0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__EMI_NANDF_D_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__EMI_NANDF_D_12		= IOMUX_PAD(0x658, 0x2D4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__ESDHC2_DAT4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__ESDHC2_DAT4		= IOMUX_PAD(0x658, 0x2D4, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__ESDHC4_DAT0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__ESDHC4_DAT0		= IOMUX_PAD(0x658, 0x2D4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__GPIO2_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__GPIO2_12			= IOMUX_PAD(0x658, 0x2D4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12	= IOMUX_PAD(0x658, 0x2D4, 5, __NA_, 0, NO_PAD_CTRL/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12		= IOMUX_PAD(0x658, 0x2D4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA12__PATA_DATA_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA12__PATA_DATA_12		= IOMUX_PAD(0x658, 0x2D4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__EMI_NANDF_D_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__EMI_NANDF_D_13		= IOMUX_PAD(0x65C, 0x2D8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__ESDHC2_DAT5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__ESDHC2_DAT5		= IOMUX_PAD(0x65C, 0x2D8, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__ESDHC4_DAT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__ESDHC4_DAT1		= IOMUX_PAD(0x65C, 0x2D8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__GPIO2_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__GPIO2_13			= IOMUX_PAD(0x65C, 0x2D8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13	= IOMUX_PAD(0x65C, 0x2D8, 5, __NA_, 0, NO_PAD_CTRL/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13		= IOMUX_PAD(0x65C, 0x2D8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA13__PATA_DATA_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA13__PATA_DATA_13		= IOMUX_PAD(0x65C, 0x2D8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__EMI_NANDF_D_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__EMI_NANDF_D_14		= IOMUX_PAD(0x660, 0x2DC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__ESDHC2_DAT6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__ESDHC2_DAT6		= IOMUX_PAD(0x660, 0x2DC, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__ESDHC4_DAT2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__ESDHC4_DAT2		= IOMUX_PAD(0x660, 0x2DC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__GPIO2_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__GPIO2_14			= IOMUX_PAD(0x660, 0x2DC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14	= IOMUX_PAD(0x660, 0x2DC, 5, __NA_, 0, NO_PAD_CTRL/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14		= IOMUX_PAD(0x660, 0x2DC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA14__PATA_DATA_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA14__PATA_DATA_14		= IOMUX_PAD(0x660, 0x2DC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__EMI_NANDF_D_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__EMI_NANDF_D_15		= IOMUX_PAD(0x664, 0x2E0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__ESDHC2_DAT7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__ESDHC2_DAT7		= IOMUX_PAD(0x664, 0x2E0, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__ESDHC4_DAT3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__ESDHC4_DAT3		= IOMUX_PAD(0x664, 0x2E0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__GPIO2_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__GPIO2_15			= IOMUX_PAD(0x664, 0x2E0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15	= IOMUX_PAD(0x664, 0x2E0, 5, __NA_, 0, NO_PAD_CTRL/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15		= IOMUX_PAD(0x664, 0x2E0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA15__PATA_DATA_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA15__PATA_DATA_15		= IOMUX_PAD(0x664, 0x2E0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA1__EMI_NANDF_D_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA1__EMI_NANDF_D_1		= IOMUX_PAD(0x62C, 0x2A8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA1__ESDHC3_DAT5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA1__ESDHC3_DAT5		= IOMUX_PAD(0x62C, 0x2A8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA1__GPIO2_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA1__GPIO2_1			= IOMUX_PAD(0x62C, 0x2A8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1	= IOMUX_PAD(0x62C, 0x2A8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1		= IOMUX_PAD(0x62C, 0x2A8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA1__PATA_DATA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA1__PATA_DATA_1		= IOMUX_PAD(0x62C, 0x2A8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA2__EMI_NANDF_D_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA2__EMI_NANDF_D_2		= IOMUX_PAD(0x630, 0x2AC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA2__ESDHC3_DAT6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA2__ESDHC3_DAT6		= IOMUX_PAD(0x630, 0x2AC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA2__GPIO2_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA2__GPIO2_2			= IOMUX_PAD(0x630, 0x2AC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2	= IOMUX_PAD(0x630, 0x2AC, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2		= IOMUX_PAD(0x630, 0x2AC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA2__PATA_DATA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA2__PATA_DATA_2		= IOMUX_PAD(0x630, 0x2AC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA3__EMI_NANDF_D_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA3__EMI_NANDF_D_3		= IOMUX_PAD(0x634, 0x2B0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA3__ESDHC3_DAT7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA3__ESDHC3_DAT7		= IOMUX_PAD(0x634, 0x2B0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA3__GPIO2_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA3__GPIO2_3			= IOMUX_PAD(0x634, 0x2B0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3	= IOMUX_PAD(0x634, 0x2B0, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3		= IOMUX_PAD(0x634, 0x2B0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA3__PATA_DATA_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA3__PATA_DATA_3		= IOMUX_PAD(0x634, 0x2B0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA4__EMI_NANDF_D_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA4__EMI_NANDF_D_4		= IOMUX_PAD(0x638, 0x2B4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA4__ESDHC4_DAT4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA4__ESDHC4_DAT4		= IOMUX_PAD(0x638, 0x2B4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA4__GPIO2_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA4__GPIO2_4			= IOMUX_PAD(0x638, 0x2B4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4	= IOMUX_PAD(0x638, 0x2B4, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4		= IOMUX_PAD(0x638, 0x2B4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA4__PATA_DATA_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA4__PATA_DATA_4		= IOMUX_PAD(0x638, 0x2B4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA5__EMI_NANDF_D_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA5__EMI_NANDF_D_5		= IOMUX_PAD(0x63C, 0x2B8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA5__ESDHC4_DAT5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA5__ESDHC4_DAT5		= IOMUX_PAD(0x63C, 0x2B8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA5__GPIO2_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA5__GPIO2_5			= IOMUX_PAD(0x63C, 0x2B8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5	= IOMUX_PAD(0x63C, 0x2B8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5		= IOMUX_PAD(0x63C, 0x2B8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA5__PATA_DATA_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA5__PATA_DATA_5		= IOMUX_PAD(0x63C, 0x2B8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA6__EMI_NANDF_D_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA6__EMI_NANDF_D_6		= IOMUX_PAD(0x640, 0x2BC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA6__ESDHC4_DAT6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA6__ESDHC4_DAT6		= IOMUX_PAD(0x640, 0x2BC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA6__GPIO2_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA6__GPIO2_6			= IOMUX_PAD(0x640, 0x2BC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6	= IOMUX_PAD(0x640, 0x2BC, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6		= IOMUX_PAD(0x640, 0x2BC, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA6__PATA_DATA_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA6__PATA_DATA_6		= IOMUX_PAD(0x640, 0x2BC, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA7__EMI_NANDF_D_7		= IOMUX_PAD(0x644, 0x2C0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA7__ESDHC4_DAT7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA7__ESDHC4_DAT7		= IOMUX_PAD(0x644, 0x2C0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA7__GPIO2_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA7__GPIO2_7			= IOMUX_PAD(0x644, 0x2C0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7	= IOMUX_PAD(0x644, 0x2C0, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7		= IOMUX_PAD(0x644, 0x2C0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA7__PATA_DATA_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA7__PATA_DATA_7		= IOMUX_PAD(0x644, 0x2C0, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__EMI_NANDF_D_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__EMI_NANDF_D_8		= IOMUX_PAD(0x648, 0x2C4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__ESDHC1_DAT4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__ESDHC1_DAT4		= IOMUX_PAD(0x648, 0x2C4, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__ESDHC3_DAT0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__ESDHC3_DAT0		= IOMUX_PAD(0x648, 0x2C4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__GPIO2_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__GPIO2_8			= IOMUX_PAD(0x648, 0x2C4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8	= IOMUX_PAD(0x648, 0x2C4, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8		= IOMUX_PAD(0x648, 0x2C4, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA8__PATA_DATA_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA8__PATA_DATA_8		= IOMUX_PAD(0x648, 0x2C4, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__EMI_NANDF_D_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__EMI_NANDF_D_9		= IOMUX_PAD(0x64C, 0x2C8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__ESDHC1_DAT5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__ESDHC1_DAT5		= IOMUX_PAD(0x64C, 0x2C8, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__ESDHC3_DAT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__ESDHC3_DAT1		= IOMUX_PAD(0x64C, 0x2C8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__GPIO2_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__GPIO2_9			= IOMUX_PAD(0x64C, 0x2C8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9	= IOMUX_PAD(0x64C, 0x2C8, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9		= IOMUX_PAD(0x64C, 0x2C8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DATA9__PATA_DATA_9	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DATA9__PATA_DATA_9		= IOMUX_PAD(0x64C, 0x2C8, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_0__ESDHC3_RST	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_0__ESDHC3_RST			= IOMUX_PAD(0x610, 0x290, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_0__GPIO7_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_0__GPIO7_6			= IOMUX_PAD(0x610, 0x290, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_0__OWIRE_LINE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_0__OWIRE_LINE			= IOMUX_PAD(0x610, 0x290, 4, 0x864, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_0__PATA_DA_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_0__PATA_DA_0			= IOMUX_PAD(0x610, 0x290, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2		= IOMUX_PAD(0x610, 0x290, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_1__ESDHC4_CMD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_1__ESDHC4_CMD			= IOMUX_PAD(0x614, 0x294, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_1__GPIO7_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_1__GPIO7_7			= IOMUX_PAD(0x614, 0x294, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_1__PATA_DA_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_1__PATA_DA_1			= IOMUX_PAD(0x614, 0x294, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_1__UART3_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_1__UART3_CTS			= IOMUX_PAD(0x614, 0x294, 4, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3		= IOMUX_PAD(0x614, 0x294, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_2__ESDHC4_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_2__ESDHC4_CLK			= IOMUX_PAD(0x618, 0x298, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_2__GPIO7_8	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_2__GPIO7_8			= IOMUX_PAD(0x618, 0x298, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_2__PATA_DA_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_2__PATA_DA_2			= IOMUX_PAD(0x618, 0x298, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_2__UART3_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_2__UART3_RTS			= IOMUX_PAD(0x618, 0x298, 4, 0x884, 5, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4		= IOMUX_PAD(0x618, 0x298, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOR__CAN1_RXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOR__CAN1_RXCAN			= IOMUX_PAD(0x604, 0x284, 4, 0x760, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOR__GPIO7_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOR__GPIO7_3			= IOMUX_PAD(0x604, 0x284, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOR__PATA_DIOR	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOR__PATA_DIOR			= IOMUX_PAD(0x604, 0x284, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOR__UART2_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOR__UART2_RTS			= IOMUX_PAD(0x604, 0x284, 3, 0x87C, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7		= IOMUX_PAD(0x604, 0x284, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOW__GPIO6_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOW__GPIO6_17			= IOMUX_PAD(0x5F0, 0x270, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOW__PATA_DIOW	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOW__PATA_DIOW			= IOMUX_PAD(0x5F0, 0x270, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOW__UART1_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOW__UART1_TXD_MUX		= IOMUX_PAD(0x5F0, 0x270, 3, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2		= IOMUX_PAD(0x5F0, 0x270, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMACK__GPIO6_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMACK__GPIO6_18			= IOMUX_PAD(0x5F4, 0x274, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMACK__PATA_DMACK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMACK__PATA_DMACK			= IOMUX_PAD(0x5F4, 0x274, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMACK__UART1_RXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMACK__UART1_RXD_MUX		= IOMUX_PAD(0x5F4, 0x274, 3, 0x878, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3		= IOMUX_PAD(0x5F4, 0x274, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0		= IOMUX_PAD(0x5F8, 0x278, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMARQ__GPIO7_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMARQ__GPIO7_0			= IOMUX_PAD(0x5F8, 0x278, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMARQ__PATA_DMARQ	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMARQ__PATA_DMARQ			= IOMUX_PAD(0x5F8, 0x278, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMARQ__UART2_TXD_MUX		= IOMUX_PAD(0x5F8, 0x278, 3, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4		= IOMUX_PAD(0x5F8, 0x278, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_INTRQ__CAN1_TXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_INTRQ__CAN1_TXCAN			= IOMUX_PAD(0x600, 0x280, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2		= IOMUX_PAD(0x600, 0x280, 5, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_INTRQ__GPIO7_2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_INTRQ__GPIO7_2			= IOMUX_PAD(0x600, 0x280, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_INTRQ__PATA_INTRQ	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_INTRQ__PATA_INTRQ			= IOMUX_PAD(0x600, 0x280, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_INTRQ__UART2_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_INTRQ__UART2_CTS			= IOMUX_PAD(0x600, 0x280, 3, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6		= IOMUX_PAD(0x600, 0x280, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_IORDY__CAN2_RXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_IORDY__CAN2_RXCAN			= IOMUX_PAD(0x60C, 0x28C, 4, 0x764, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_IORDY__ESDHC3_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_IORDY__ESDHC3_CLK			= IOMUX_PAD(0x60C, 0x28C, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_IORDY__GPIO7_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_IORDY__GPIO7_5			= IOMUX_PAD(0x60C, 0x28C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_IORDY__PATA_IORDY	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_IORDY__PATA_IORDY			= IOMUX_PAD(0x60C, 0x28C, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_IORDY__UART1_RTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_IORDY__UART1_RTS			= IOMUX_PAD(0x60C, 0x28C, 3, 0x874, 3, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1		= IOMUX_PAD(0x60C, 0x28C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_RESET_B__CAN2_TXCAN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_RESET_B__CAN2_TXCAN		= IOMUX_PAD(0x608, 0x288, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_RESET_B__ESDHC3_CMD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_RESET_B__ESDHC3_CMD		= IOMUX_PAD(0x608, 0x288, 2, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_RESET_B__GPIO7_4	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_RESET_B__GPIO7_4			= IOMUX_PAD(0x608, 0x288, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B	= IOMUX_PAD(0x608, 0x288, 0, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_RESET_B__UART1_CTS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_RESET_B__UART1_CTS		= IOMUX_PAD(0x608, 0x288, 3, __NA_, 0, MX53_UART_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0	= IOMUX_PAD(0x608, 0x288, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CLK__CSPI_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CLK__CSPI_SCLK			= IOMUX_PAD(0x67C, 0x2F4, 5, 0x780, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CLK__ESDHC1_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CLK__ESDHC1_CLK			= IOMUX_PAD(0x67C, 0x2F4, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CLK__GPIO1_20	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CLK__GPIO1_20			= IOMUX_PAD(0x67C, 0x2F4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CLK__GPT_CLKIN	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CLK__GPT_CLKIN			= IOMUX_PAD(0x67C, 0x2F4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CLK__OSC32k_32K_OUT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CLK__OSC32k_32K_OUT		= IOMUX_PAD(0x67C, 0x2F4, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CLK__SATA_PHY_DTB_0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CLK__SATA_PHY_DTB_0		= IOMUX_PAD(0x67C, 0x2F4, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CMD__CCM_PLL1_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CMD__CCM_PLL1_BYP			= IOMUX_PAD(0x674, 0x2EC, 7, 0x770, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CMD__CSPI_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CMD__CSPI_MOSI			= IOMUX_PAD(0x674, 0x2EC, 5, 0x788, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CMD__ESDHC1_CMD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CMD__ESDHC1_CMD			= IOMUX_PAD(0x674, 0x2EC, 0 | IOMUX_CONFIG_SION, __NA_, 0, MX53_/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CMD__GPIO1_18	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CMD__GPIO1_18			= IOMUX_PAD(0x674, 0x2EC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_CMD__GPT_CMPOUT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_CMD__GPT_CMPOUT1			= IOMUX_PAD(0x674, 0x2EC, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA0__CCM_PLL3_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA0__CCM_PLL3_BYP		= IOMUX_PAD(0x66C, 0x2E4, 7, 0x778, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA0__CSPI_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA0__CSPI_MISO			= IOMUX_PAD(0x66C, 0x2E4, 5, 0x784, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA0__ESDHC1_DAT0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA0__ESDHC1_DAT0			= IOMUX_PAD(0x66C, 0x2E4, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA0__GPIO1_16	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA0__GPIO1_16			= IOMUX_PAD(0x66C, 0x2E4, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA0__GPT_CAPIN1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA0__GPT_CAPIN1			= IOMUX_PAD(0x66C, 0x2E4, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA1__CCM_PLL4_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA1__CCM_PLL4_BYP		= IOMUX_PAD(0x670, 0x2E8, 7, 0x77C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA1__CSPI_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA1__CSPI_SS0			= IOMUX_PAD(0x670, 0x2E8, 5, 0x78C, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA1__ESDHC1_DAT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA1__ESDHC1_DAT1			= IOMUX_PAD(0x670, 0x2E8, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA1__GPIO1_17	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA1__GPIO1_17			= IOMUX_PAD(0x670, 0x2E8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA1__GPT_CAPIN2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA1__GPT_CAPIN2			= IOMUX_PAD(0x670, 0x2E8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__CCM_PLL2_BYP	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__CCM_PLL2_BYP		= IOMUX_PAD(0x678, 0x2F0, 7, 0x774, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__CSPI_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__CSPI_SS1			= IOMUX_PAD(0x678, 0x2F0, 5, 0x790, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__ESDHC1_DAT2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__ESDHC1_DAT2			= IOMUX_PAD(0x678, 0x2F0, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__GPIO1_19	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__GPIO1_19			= IOMUX_PAD(0x678, 0x2F0, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__GPT_CMPOUT2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__GPT_CMPOUT2			= IOMUX_PAD(0x678, 0x2F0, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__PWM2_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__PWM2_PWMO			= IOMUX_PAD(0x678, 0x2F0, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__WDOG1_WDOG_B		= IOMUX_PAD(0x678, 0x2F0, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB	= IOMUX_PAD(0x678, 0x2F0, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__CSPI_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__CSPI_SS2			= IOMUX_PAD(0x680, 0x2F8, 5, 0x794, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__ESDHC1_DAT3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__ESDHC1_DAT3			= IOMUX_PAD(0x680, 0x2F8, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__GPIO1_21	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__GPIO1_21			= IOMUX_PAD(0x680, 0x2F8, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__GPT_CMPOUT3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__GPT_CMPOUT3			= IOMUX_PAD(0x680, 0x2F8, 2, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__PWM1_PWMO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__PWM1_PWMO			= IOMUX_PAD(0x680, 0x2F8, 3, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1		= IOMUX_PAD(0x680, 0x2F8, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__WDOG2_WDOG_B		= IOMUX_PAD(0x680, 0x2F8, 4, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB	= IOMUX_PAD(0x680, 0x2F8, 6, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS		= IOMUX_PAD(0x688, 0x2FC, 3, 0x73C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CLK__CSPI_SCLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CLK__CSPI_SCLK			= IOMUX_PAD(0x688, 0x2FC, 5, 0x780, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CLK__ESDHC2_CLK	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CLK__ESDHC2_CLK			= IOMUX_PAD(0x688, 0x2FC, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CLK__GPIO1_10	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CLK__GPIO1_10			= IOMUX_PAD(0x688, 0x2FC, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CLK__KPP_COL_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CLK__KPP_COL_5			= IOMUX_PAD(0x688, 0x2FC, 2, 0x840, 2, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CLK__SCC_RANDOM_V	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CLK__SCC_RANDOM_V			= IOMUX_PAD(0x688, 0x2FC, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC		= IOMUX_PAD(0x68C, 0x300, 3, 0x738, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CMD__CSPI_MOSI	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CMD__CSPI_MOSI			= IOMUX_PAD(0x68C, 0x300, 5, 0x788, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CMD__ESDHC2_CMD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CMD__ESDHC2_CMD			= IOMUX_PAD(0x68C, 0x300, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CMD__GPIO1_11	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CMD__GPIO1_11			= IOMUX_PAD(0x68C, 0x300, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CMD__KPP_ROW_5	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CMD__KPP_ROW_5			= IOMUX_PAD(0x68C, 0x300, 2, 0x84C, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_CMD__SCC_RANDOM	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_CMD__SCC_RANDOM			= IOMUX_PAD(0x68C, 0x300, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD		= IOMUX_PAD(0x69C, 0x310, 3, 0x730, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA0__CSPI_MISO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA0__CSPI_MISO			= IOMUX_PAD(0x69C, 0x310, 5, 0x784, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA0__ESDHC2_DAT0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA0__ESDHC2_DAT0			= IOMUX_PAD(0x69C, 0x310, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA0__GPIO1_15	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA0__GPIO1_15			= IOMUX_PAD(0x69C, 0x310, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA0__KPP_ROW_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA0__KPP_ROW_7			= IOMUX_PAD(0x69C, 0x310, 2, 0x854, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA0__RTIC_DONE_INT	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA0__RTIC_DONE_INT		= IOMUX_PAD(0x69C, 0x310, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS		= IOMUX_PAD(0x698, 0x30C, 3, 0x744, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA1__CSPI_SS0	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA1__CSPI_SS0			= IOMUX_PAD(0x698, 0x30C, 5, 0x78C, 4, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA1__ESDHC2_DAT1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA1__ESDHC2_DAT1			= IOMUX_PAD(0x698, 0x30C, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA1__GPIO1_14	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA1__GPIO1_14			= IOMUX_PAD(0x698, 0x30C, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA1__KPP_COL_7	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA1__KPP_COL_7			= IOMUX_PAD(0x698, 0x30C, 2, 0x848, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA1__RTIC_SEC_VIO	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA1__RTIC_SEC_VIO		= IOMUX_PAD(0x698, 0x30C, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD		= IOMUX_PAD(0x694, 0x308, 3, 0x734, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA2__CSPI_SS1	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA2__CSPI_SS1			= IOMUX_PAD(0x694, 0x308, 5, 0x790, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA2__ESDHC2_DAT2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA2__ESDHC2_DAT2			= IOMUX_PAD(0x694, 0x308, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA2__GPIO1_13	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA2__GPIO1_13			= IOMUX_PAD(0x694, 0x308, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA2__KPP_ROW_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA2__KPP_ROW_6			= IOMUX_PAD(0x694, 0x308, 2, 0x850, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA2__SJC_FAIL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA2__SJC_FAIL			= IOMUX_PAD(0x694, 0x308, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC		= IOMUX_PAD(0x690, 0x304, 3, 0x740, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA3__CSPI_SS2	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA3__CSPI_SS2			= IOMUX_PAD(0x690, 0x304, 5, 0x794, 3, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA3__ESDHC2_DAT3	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA3__ESDHC2_DAT3			= IOMUX_PAD(0x690, 0x304, 0, __NA_, 0, MX53_SDHC_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA3__GPIO1_12	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA3__GPIO1_12			= IOMUX_PAD(0x690, 0x304, 1, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA3__KPP_COL_6	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA3__KPP_COL_6			= IOMUX_PAD(0x690, 0x304, 2, 0x844, 1, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_PAD_SD2_DATA3__SJC_DONE	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^	MX53_PAD_SD2_DATA3__SJC_DONE			= IOMUX_PAD(0x690, 0x304, 7, __NA_, 0, NO_PAD_CTRL),$/;"	e	enum:__anon992b65ba0103
MX53_SDHC_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^#define MX53_SDHC_PAD_CTRL	/;"	d
MX53_UART_PAD_CTRL	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^#define MX53_UART_PAD_CTRL	/;"	d
MX5_CBCDR	arch/arm/cpu/armv7/mx5/clock.c	/^#define MX5_CBCDR	/;"	d	file:
MX5_CBCMR	arch/arm/cpu/armv7/mx5/clock.c	/^#define MX5_CBCMR	/;"	d	file:
MX5_USBOTHER_REGS_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MX5_USBOTHER_REGS_OFFSET /;"	d	file:
MX6	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6$/;"	c
MX6D	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6D$/;"	c
MX6DL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6DL$/;"	c
MX6DLS_PU_IROM_MMU_EN_VAR	arch/arm/imx-common/hab.c	/^#define MX6DLS_PU_IROM_MMU_EN_VAR	/;"	d	file:
MX6DQ_IOM_DDR_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6DQ_IOM_DDR_BASE /;"	d
MX6DQ_IOM_GRP_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6DQ_IOM_GRP_BASE /;"	d
MX6DQ_PU_IROM_MMU_EN_VAR	arch/arm/imx-common/hab.c	/^#define MX6DQ_PU_IROM_MMU_EN_VAR	/;"	d	file:
MX6Q	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6Q$/;"	c
MX6Q	board/tbs/tbs2910/Kconfig	/^config MX6Q$/;"	c
MX6QDL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6QDL$/;"	c
MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 /;"	d
MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 /;"	d
MX6QDL_PAD_CSI0_DAT10__AUD3_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC /;"	d
MX6QDL_PAD_CSI0_DAT10__AUD3_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC /;"	d
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO /;"	d
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO /;"	d
MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 /;"	d
MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 /;"	d
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 /;"	d
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 /;"	d
MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 /;"	d
MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 /;"	d
MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS /;"	d
MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS /;"	d
MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 /;"	d
MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 /;"	d
MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 /;"	d
MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 /;"	d
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 /;"	d
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 /;"	d
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 /;"	d
MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 /;"	d
MX6QDL_PAD_CSI0_DAT12__EIM_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 /;"	d
MX6QDL_PAD_CSI0_DAT12__EIM_DATA08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 /;"	d
MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 /;"	d
MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 /;"	d
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 /;"	d
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 /;"	d
MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 /;"	d
MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 /;"	d
MX6QDL_PAD_CSI0_DAT13__EIM_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 /;"	d
MX6QDL_PAD_CSI0_DAT13__EIM_DATA09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 /;"	d
MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 /;"	d
MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 /;"	d
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 /;"	d
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 /;"	d
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 /;"	d
MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 /;"	d
MX6QDL_PAD_CSI0_DAT14__EIM_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 /;"	d
MX6QDL_PAD_CSI0_DAT14__EIM_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 /;"	d
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 /;"	d
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 /;"	d
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 /;"	d
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 /;"	d
MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 /;"	d
MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 /;"	d
MX6QDL_PAD_CSI0_DAT15__EIM_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 /;"	d
MX6QDL_PAD_CSI0_DAT15__EIM_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 /;"	d
MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 /;"	d
MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 /;"	d
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 /;"	d
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 /;"	d
MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA /;"	d
MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 /;"	d
MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 /;"	d
MX6QDL_PAD_CSI0_DAT16__EIM_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 /;"	d
MX6QDL_PAD_CSI0_DAT16__EIM_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 /;"	d
MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 /;"	d
MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 /;"	d
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 /;"	d
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 /;"	d
MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 /;"	d
MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 /;"	d
MX6QDL_PAD_CSI0_DAT17__EIM_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 /;"	d
MX6QDL_PAD_CSI0_DAT17__EIM_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 /;"	d
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 /;"	d
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 /;"	d
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 /;"	d
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 /;"	d
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 /;"	d
MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 /;"	d
MX6QDL_PAD_CSI0_DAT18__EIM_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 /;"	d
MX6QDL_PAD_CSI0_DAT18__EIM_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 /;"	d
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 /;"	d
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 /;"	d
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 /;"	d
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 /;"	d
MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT19__EIM_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 /;"	d
MX6QDL_PAD_CSI0_DAT19__EIM_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 /;"	d
MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 /;"	d
MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 /;"	d
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 /;"	d
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 /;"	d
MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B /;"	d
MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B /;"	d
MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 /;"	d
MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 /;"	d
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__AUD3_TXC /;"	d
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__AUD3_TXC /;"	d
MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK /;"	d
MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK /;"	d
MX6QDL_PAD_CSI0_DAT4__EIM_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 /;"	d
MX6QDL_PAD_CSI0_DAT4__EIM_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 /;"	d
MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 /;"	d
MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 /;"	d
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 /;"	d
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 /;"	d
MX6QDL_PAD_CSI0_DAT4__KEY_COL5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__KEY_COL5 /;"	d
MX6QDL_PAD_CSI0_DAT4__KEY_COL5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT4__KEY_COL5 /;"	d
MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 /;"	d
MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 /;"	d
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__AUD3_TXD /;"	d
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__AUD3_TXD /;"	d
MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI /;"	d
MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI /;"	d
MX6QDL_PAD_CSI0_DAT5__EIM_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 /;"	d
MX6QDL_PAD_CSI0_DAT5__EIM_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 /;"	d
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 /;"	d
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 /;"	d
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 /;"	d
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 /;"	d
MX6QDL_PAD_CSI0_DAT5__KEY_ROW5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__KEY_ROW5 /;"	d
MX6QDL_PAD_CSI0_DAT5__KEY_ROW5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT5__KEY_ROW5 /;"	d
MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 /;"	d
MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 /;"	d
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS /;"	d
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS /;"	d
MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO /;"	d
MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO /;"	d
MX6QDL_PAD_CSI0_DAT6__EIM_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 /;"	d
MX6QDL_PAD_CSI0_DAT6__EIM_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 /;"	d
MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 /;"	d
MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 /;"	d
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 /;"	d
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 /;"	d
MX6QDL_PAD_CSI0_DAT6__KEY_COL6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__KEY_COL6 /;"	d
MX6QDL_PAD_CSI0_DAT6__KEY_COL6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT6__KEY_COL6 /;"	d
MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 /;"	d
MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 /;"	d
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__AUD3_RXD /;"	d
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__AUD3_RXD /;"	d
MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0 /;"	d
MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0 /;"	d
MX6QDL_PAD_CSI0_DAT7__EIM_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 /;"	d
MX6QDL_PAD_CSI0_DAT7__EIM_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 /;"	d
MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 /;"	d
MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 /;"	d
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 /;"	d
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 /;"	d
MX6QDL_PAD_CSI0_DAT7__KEY_ROW6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__KEY_ROW6 /;"	d
MX6QDL_PAD_CSI0_DAT7__KEY_ROW6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT7__KEY_ROW6 /;"	d
MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 /;"	d
MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 /;"	d
MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK /;"	d
MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK /;"	d
MX6QDL_PAD_CSI0_DAT8__EIM_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 /;"	d
MX6QDL_PAD_CSI0_DAT8__EIM_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 /;"	d
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 /;"	d
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 /;"	d
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__I2C1_SDA /;"	d
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__I2C1_SDA /;"	d
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 /;"	d
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 /;"	d
MX6QDL_PAD_CSI0_DAT8__KEY_COL7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__KEY_COL7 /;"	d
MX6QDL_PAD_CSI0_DAT8__KEY_COL7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT8__KEY_COL7 /;"	d
MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 /;"	d
MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 /;"	d
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI /;"	d
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI /;"	d
MX6QDL_PAD_CSI0_DAT9__EIM_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 /;"	d
MX6QDL_PAD_CSI0_DAT9__EIM_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 /;"	d
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 /;"	d
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 /;"	d
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__I2C1_SCL /;"	d
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__I2C1_SCL /;"	d
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 /;"	d
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 /;"	d
MX6QDL_PAD_CSI0_DAT9__KEY_ROW7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__KEY_ROW7 /;"	d
MX6QDL_PAD_CSI0_DAT9__KEY_ROW7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DAT9__KEY_ROW7 /;"	d
MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK /;"	d
MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK /;"	d
MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 /;"	d
MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 /;"	d
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 /;"	d
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 /;"	d
MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN /;"	d
MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN /;"	d
MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL /;"	d
MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL /;"	d
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 /;"	d
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 /;"	d
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 /;"	d
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 /;"	d
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC /;"	d
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC /;"	d
MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO /;"	d
MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO /;"	d
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 /;"	d
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 /;"	d
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK /;"	d
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK /;"	d
MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 /;"	d
MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 /;"	d
MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 /;"	d
MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 /;"	d
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 /;"	d
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 /;"	d
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC /;"	d
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC /;"	d
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 /;"	d
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 /;"	d
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK /;"	d
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK /;"	d
MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK /;"	d
MX6QDL_PAD_DI0_DISP_CLK__LCD_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__LCD_CLK /;"	d
MX6QDL_PAD_DI0_DISP_CLK__LCD_WR_RWN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_DISP_CLK__LCD_WR_RWN /;"	d
MX6QDL_PAD_DI0_PIN15__AUD6_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__AUD6_TXC /;"	d
MX6QDL_PAD_DI0_PIN15__AUD6_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__AUD6_TXC /;"	d
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 /;"	d
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 /;"	d
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 /;"	d
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 /;"	d
MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 /;"	d
MX6QDL_PAD_DI0_PIN15__LCD_ENABLE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__LCD_ENABLE /;"	d
MX6QDL_PAD_DI0_PIN15__LCD_RD_E	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN15__LCD_RD_E /;"	d
MX6QDL_PAD_DI0_PIN2__AUD6_TXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__AUD6_TXD /;"	d
MX6QDL_PAD_DI0_PIN2__AUD6_TXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__AUD6_TXD /;"	d
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 /;"	d
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 /;"	d
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 /;"	d
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 /;"	d
MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 /;"	d
MX6QDL_PAD_DI0_PIN2__LCD_HSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__LCD_HSYNC /;"	d
MX6QDL_PAD_DI0_PIN2__LCD_RS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN2__LCD_RS /;"	d
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__AUD6_TXFS /;"	d
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__AUD6_TXFS /;"	d
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 /;"	d
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 /;"	d
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 /;"	d
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 /;"	d
MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 /;"	d
MX6QDL_PAD_DI0_PIN3__LCD_CS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__LCD_CS /;"	d
MX6QDL_PAD_DI0_PIN3__LCD_VSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN3__LCD_VSYNC /;"	d
MX6QDL_PAD_DI0_PIN4__AUD6_RXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__AUD6_RXD /;"	d
MX6QDL_PAD_DI0_PIN4__AUD6_RXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__AUD6_RXD /;"	d
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 /;"	d
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 /;"	d
MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 /;"	d
MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 /;"	d
MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04 /;"	d
MX6QDL_PAD_DI0_PIN4__LCD_BUSY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__LCD_BUSY /;"	d
MX6QDL_PAD_DI0_PIN4__LCD_RESET	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__LCD_RESET /;"	d
MX6QDL_PAD_DI0_PIN4__SD1_WP	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__SD1_WP /;"	d
MX6QDL_PAD_DI0_PIN4__SD1_WP	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DI0_PIN4__SD1_WP /;"	d
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK /;"	d
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK /;"	d
MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 /;"	d
MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 /;"	d
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 /;"	d
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 /;"	d
MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 /;"	d
MX6QDL_PAD_DISP0_DAT0__LCD_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT0__LCD_DATA00 /;"	d
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 /;"	d
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 /;"	d
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 /;"	d
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 /;"	d
MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 /;"	d
MX6QDL_PAD_DISP0_DAT10__LCD_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT10__LCD_DATA10 /;"	d
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 /;"	d
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 /;"	d
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 /;"	d
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 /;"	d
MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 /;"	d
MX6QDL_PAD_DISP0_DAT11__LCD_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT11__LCD_DATA11 /;"	d
MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 /;"	d
MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 /;"	d
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 /;"	d
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 /;"	d
MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 /;"	d
MX6QDL_PAD_DISP0_DAT12__LCD_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT12__LCD_DATA12 /;"	d
MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS /;"	d
MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS /;"	d
MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 /;"	d
MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 /;"	d
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 /;"	d
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 /;"	d
MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 /;"	d
MX6QDL_PAD_DISP0_DAT13__LCD_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT13__LCD_DATA13 /;"	d
MX6QDL_PAD_DISP0_DAT14__AUD5_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__AUD5_RXC /;"	d
MX6QDL_PAD_DISP0_DAT14__AUD5_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__AUD5_RXC /;"	d
MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 /;"	d
MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 /;"	d
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 /;"	d
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 /;"	d
MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 /;"	d
MX6QDL_PAD_DISP0_DAT14__LCD_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT14__LCD_DATA14 /;"	d
MX6QDL_PAD_DISP0_DAT15__ECSPI1_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__ECSPI1_SS1 /;"	d
MX6QDL_PAD_DISP0_DAT15__ECSPI1_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__ECSPI1_SS1 /;"	d
MX6QDL_PAD_DISP0_DAT15__ECSPI2_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__ECSPI2_SS1 /;"	d
MX6QDL_PAD_DISP0_DAT15__ECSPI2_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__ECSPI2_SS1 /;"	d
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 /;"	d
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 /;"	d
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 /;"	d
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 /;"	d
MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 /;"	d
MX6QDL_PAD_DISP0_DAT15__LCD_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT15__LCD_DATA15 /;"	d
MX6QDL_PAD_DISP0_DAT16__AUD5_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__AUD5_TXC /;"	d
MX6QDL_PAD_DISP0_DAT16__AUD5_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__AUD5_TXC /;"	d
MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI /;"	d
MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI /;"	d
MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 /;"	d
MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 /;"	d
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 /;"	d
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 /;"	d
MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16 /;"	d
MX6QDL_PAD_DISP0_DAT16__LCD_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__LCD_DATA16 /;"	d
MX6QDL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0 /;"	d
MX6QDL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0 /;"	d
MX6QDL_PAD_DISP0_DAT17__AUD5_TXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__AUD5_TXD /;"	d
MX6QDL_PAD_DISP0_DAT17__AUD5_TXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__AUD5_TXD /;"	d
MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO /;"	d
MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO /;"	d
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 /;"	d
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 /;"	d
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 /;"	d
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 /;"	d
MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17 /;"	d
MX6QDL_PAD_DISP0_DAT17__LCD_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__LCD_DATA17 /;"	d
MX6QDL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1 /;"	d
MX6QDL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1 /;"	d
MX6QDL_PAD_DISP0_DAT18__AUD4_RXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__AUD4_RXFS /;"	d
MX6QDL_PAD_DISP0_DAT18__AUD4_RXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__AUD4_RXFS /;"	d
MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS /;"	d
MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS /;"	d
MX6QDL_PAD_DISP0_DAT18__ECSPI2_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__ECSPI2_SS0 /;"	d
MX6QDL_PAD_DISP0_DAT18__ECSPI2_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__ECSPI2_SS0 /;"	d
MX6QDL_PAD_DISP0_DAT18__EIM_CS2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__EIM_CS2_B /;"	d
MX6QDL_PAD_DISP0_DAT18__EIM_CS2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__EIM_CS2_B /;"	d
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 /;"	d
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 /;"	d
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 /;"	d
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 /;"	d
MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18 /;"	d
MX6QDL_PAD_DISP0_DAT18__LCD_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT18__LCD_DATA18 /;"	d
MX6QDL_PAD_DISP0_DAT19__AUD4_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__AUD4_RXC /;"	d
MX6QDL_PAD_DISP0_DAT19__AUD4_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__AUD4_RXC /;"	d
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__AUD5_RXD /;"	d
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__AUD5_RXD /;"	d
MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK /;"	d
MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK /;"	d
MX6QDL_PAD_DISP0_DAT19__EIM_CS3_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__EIM_CS3_B /;"	d
MX6QDL_PAD_DISP0_DAT19__EIM_CS3_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__EIM_CS3_B /;"	d
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 /;"	d
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 /;"	d
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 /;"	d
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 /;"	d
MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19 /;"	d
MX6QDL_PAD_DISP0_DAT19__LCD_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT19__LCD_DATA19 /;"	d
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI /;"	d
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI /;"	d
MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 /;"	d
MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 /;"	d
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 /;"	d
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 /;"	d
MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 /;"	d
MX6QDL_PAD_DISP0_DAT1__LCD_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT1__LCD_DATA01 /;"	d
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__AUD4_TXC /;"	d
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__AUD4_TXC /;"	d
MX6QDL_PAD_DISP0_DAT20__ECSPI1_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__ECSPI1_SCLK /;"	d
MX6QDL_PAD_DISP0_DAT20__ECSPI1_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__ECSPI1_SCLK /;"	d
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 /;"	d
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 /;"	d
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 /;"	d
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 /;"	d
MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20 /;"	d
MX6QDL_PAD_DISP0_DAT20__LCD_DATA20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT20__LCD_DATA20 /;"	d
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__AUD4_TXD /;"	d
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__AUD4_TXD /;"	d
MX6QDL_PAD_DISP0_DAT21__ECSPI1_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__ECSPI1_MOSI /;"	d
MX6QDL_PAD_DISP0_DAT21__ECSPI1_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__ECSPI1_MOSI /;"	d
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 /;"	d
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 /;"	d
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 /;"	d
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 /;"	d
MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21 /;"	d
MX6QDL_PAD_DISP0_DAT21__LCD_DATA21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT21__LCD_DATA21 /;"	d
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS /;"	d
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS /;"	d
MX6QDL_PAD_DISP0_DAT22__ECSPI1_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__ECSPI1_MISO /;"	d
MX6QDL_PAD_DISP0_DAT22__ECSPI1_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__ECSPI1_MISO /;"	d
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 /;"	d
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 /;"	d
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 /;"	d
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 /;"	d
MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22 /;"	d
MX6QDL_PAD_DISP0_DAT22__LCD_DATA22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT22__LCD_DATA22 /;"	d
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__AUD4_RXD /;"	d
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__AUD4_RXD /;"	d
MX6QDL_PAD_DISP0_DAT23__ECSPI1_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__ECSPI1_SS0 /;"	d
MX6QDL_PAD_DISP0_DAT23__ECSPI1_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__ECSPI1_SS0 /;"	d
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 /;"	d
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 /;"	d
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 /;"	d
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 /;"	d
MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23 /;"	d
MX6QDL_PAD_DISP0_DAT23__LCD_DATA23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT23__LCD_DATA23 /;"	d
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO /;"	d
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO /;"	d
MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 /;"	d
MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 /;"	d
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 /;"	d
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 /;"	d
MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 /;"	d
MX6QDL_PAD_DISP0_DAT2__LCD_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT2__LCD_DATA02 /;"	d
MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0 /;"	d
MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0 /;"	d
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 /;"	d
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 /;"	d
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 /;"	d
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 /;"	d
MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 /;"	d
MX6QDL_PAD_DISP0_DAT3__LCD_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT3__LCD_DATA03 /;"	d
MX6QDL_PAD_DISP0_DAT4__ECSPI3_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__ECSPI3_SS1 /;"	d
MX6QDL_PAD_DISP0_DAT4__ECSPI3_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__ECSPI3_SS1 /;"	d
MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 /;"	d
MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 /;"	d
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 /;"	d
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 /;"	d
MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 /;"	d
MX6QDL_PAD_DISP0_DAT4__LCD_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT4__LCD_DATA04 /;"	d
MX6QDL_PAD_DISP0_DAT5__AUD6_RXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__AUD6_RXFS /;"	d
MX6QDL_PAD_DISP0_DAT5__AUD6_RXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__AUD6_RXFS /;"	d
MX6QDL_PAD_DISP0_DAT5__ECSPI3_SS2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__ECSPI3_SS2 /;"	d
MX6QDL_PAD_DISP0_DAT5__ECSPI3_SS2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__ECSPI3_SS2 /;"	d
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 /;"	d
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 /;"	d
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 /;"	d
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 /;"	d
MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 /;"	d
MX6QDL_PAD_DISP0_DAT5__LCD_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT5__LCD_DATA05 /;"	d
MX6QDL_PAD_DISP0_DAT6__AUD6_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__AUD6_RXC /;"	d
MX6QDL_PAD_DISP0_DAT6__AUD6_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__AUD6_RXC /;"	d
MX6QDL_PAD_DISP0_DAT6__ECSPI3_SS3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__ECSPI3_SS3 /;"	d
MX6QDL_PAD_DISP0_DAT6__ECSPI3_SS3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__ECSPI3_SS3 /;"	d
MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 /;"	d
MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 /;"	d
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 /;"	d
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 /;"	d
MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 /;"	d
MX6QDL_PAD_DISP0_DAT6__LCD_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT6__LCD_DATA06 /;"	d
MX6QDL_PAD_DISP0_DAT7__ECSPI3_RDY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__ECSPI3_RDY /;"	d
MX6QDL_PAD_DISP0_DAT7__ECSPI3_RDY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__ECSPI3_RDY /;"	d
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 /;"	d
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 /;"	d
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 /;"	d
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 /;"	d
MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 /;"	d
MX6QDL_PAD_DISP0_DAT7__LCD_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT7__LCD_DATA07 /;"	d
MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 /;"	d
MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 /;"	d
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 /;"	d
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 /;"	d
MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 /;"	d
MX6QDL_PAD_DISP0_DAT8__LCD_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__LCD_DATA08 /;"	d
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__PWM1_OUT /;"	d
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__PWM1_OUT /;"	d
MX6QDL_PAD_DISP0_DAT8__WDOG1_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__WDOG1_B /;"	d
MX6QDL_PAD_DISP0_DAT8__WDOG1_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT8__WDOG1_B /;"	d
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 /;"	d
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 /;"	d
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 /;"	d
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 /;"	d
MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 /;"	d
MX6QDL_PAD_DISP0_DAT9__LCD_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__LCD_DATA09 /;"	d
MX6QDL_PAD_DISP0_DAT9__PWM2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__PWM2_OUT /;"	d
MX6QDL_PAD_DISP0_DAT9__PWM2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__PWM2_OUT /;"	d
MX6QDL_PAD_DISP0_DAT9__WDOG2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__WDOG2_B /;"	d
MX6QDL_PAD_DISP0_DAT9__WDOG2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_DISP0_DAT9__WDOG2_B /;"	d
MX6QDL_PAD_EIM_A16__EIM_ADDR16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__EIM_ADDR16 /;"	d
MX6QDL_PAD_EIM_A16__EIM_ADDR16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__EIM_ADDR16 /;"	d
MX6QDL_PAD_EIM_A16__EPDC_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__EPDC_DATA00 /;"	d
MX6QDL_PAD_EIM_A16__GPIO2_IO22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__GPIO2_IO22 /;"	d
MX6QDL_PAD_EIM_A16__GPIO2_IO22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__GPIO2_IO22 /;"	d
MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK /;"	d
MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK /;"	d
MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK /;"	d
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK /;"	d
MX6QDL_PAD_EIM_A16__SRC_BOOT_CFG16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__SRC_BOOT_CFG16 /;"	d
MX6QDL_PAD_EIM_A16__SRC_BOOT_CFG16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A16__SRC_BOOT_CFG16 /;"	d
MX6QDL_PAD_EIM_A17__EIM_ADDR17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__EIM_ADDR17 /;"	d
MX6QDL_PAD_EIM_A17__EIM_ADDR17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__EIM_ADDR17 /;"	d
MX6QDL_PAD_EIM_A17__EPDC_PWR_STAT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__EPDC_PWR_STAT /;"	d
MX6QDL_PAD_EIM_A17__GPIO2_IO21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__GPIO2_IO21 /;"	d
MX6QDL_PAD_EIM_A17__GPIO2_IO21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__GPIO2_IO21 /;"	d
MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 /;"	d
MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 /;"	d
MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 /;"	d
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 /;"	d
MX6QDL_PAD_EIM_A17__SRC_BOOT_CFG17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__SRC_BOOT_CFG17 /;"	d
MX6QDL_PAD_EIM_A17__SRC_BOOT_CFG17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A17__SRC_BOOT_CFG17 /;"	d
MX6QDL_PAD_EIM_A18__EIM_ADDR18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__EIM_ADDR18 /;"	d
MX6QDL_PAD_EIM_A18__EIM_ADDR18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__EIM_ADDR18 /;"	d
MX6QDL_PAD_EIM_A18__EPDC_PWR_CTRL0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__EPDC_PWR_CTRL0 /;"	d
MX6QDL_PAD_EIM_A18__GPIO2_IO20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__GPIO2_IO20 /;"	d
MX6QDL_PAD_EIM_A18__GPIO2_IO20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__GPIO2_IO20 /;"	d
MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13 /;"	d
MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 /;"	d
MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 /;"	d
MX6QDL_PAD_EIM_A18__IPU2_CSI1_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__IPU2_CSI1_DATA13 /;"	d
MX6QDL_PAD_EIM_A18__SRC_BOOT_CFG18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__SRC_BOOT_CFG18 /;"	d
MX6QDL_PAD_EIM_A18__SRC_BOOT_CFG18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A18__SRC_BOOT_CFG18 /;"	d
MX6QDL_PAD_EIM_A19__EIM_ADDR19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__EIM_ADDR19 /;"	d
MX6QDL_PAD_EIM_A19__EIM_ADDR19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__EIM_ADDR19 /;"	d
MX6QDL_PAD_EIM_A19__EPDC_PWR_CTRL1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__EPDC_PWR_CTRL1 /;"	d
MX6QDL_PAD_EIM_A19__GPIO2_IO19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__GPIO2_IO19 /;"	d
MX6QDL_PAD_EIM_A19__GPIO2_IO19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__GPIO2_IO19 /;"	d
MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14 /;"	d
MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 /;"	d
MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 /;"	d
MX6QDL_PAD_EIM_A19__IPU2_CSI1_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__IPU2_CSI1_DATA14 /;"	d
MX6QDL_PAD_EIM_A19__SRC_BOOT_CFG19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__SRC_BOOT_CFG19 /;"	d
MX6QDL_PAD_EIM_A19__SRC_BOOT_CFG19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A19__SRC_BOOT_CFG19 /;"	d
MX6QDL_PAD_EIM_A20__EIM_ADDR20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__EIM_ADDR20 /;"	d
MX6QDL_PAD_EIM_A20__EIM_ADDR20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__EIM_ADDR20 /;"	d
MX6QDL_PAD_EIM_A20__EPDC_PWR_CTRL2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__EPDC_PWR_CTRL2 /;"	d
MX6QDL_PAD_EIM_A20__GPIO2_IO18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__GPIO2_IO18 /;"	d
MX6QDL_PAD_EIM_A20__GPIO2_IO18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__GPIO2_IO18 /;"	d
MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15 /;"	d
MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 /;"	d
MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 /;"	d
MX6QDL_PAD_EIM_A20__IPU2_CSI1_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__IPU2_CSI1_DATA15 /;"	d
MX6QDL_PAD_EIM_A20__SRC_BOOT_CFG20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__SRC_BOOT_CFG20 /;"	d
MX6QDL_PAD_EIM_A20__SRC_BOOT_CFG20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A20__SRC_BOOT_CFG20 /;"	d
MX6QDL_PAD_EIM_A21__EIM_ADDR21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__EIM_ADDR21 /;"	d
MX6QDL_PAD_EIM_A21__EIM_ADDR21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__EIM_ADDR21 /;"	d
MX6QDL_PAD_EIM_A21__EPDC_GDCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__EPDC_GDCLK /;"	d
MX6QDL_PAD_EIM_A21__GPIO2_IO17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__GPIO2_IO17 /;"	d
MX6QDL_PAD_EIM_A21__GPIO2_IO17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__GPIO2_IO17 /;"	d
MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16 /;"	d
MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 /;"	d
MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 /;"	d
MX6QDL_PAD_EIM_A21__IPU2_CSI1_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__IPU2_CSI1_DATA16 /;"	d
MX6QDL_PAD_EIM_A21__SRC_BOOT_CFG21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__SRC_BOOT_CFG21 /;"	d
MX6QDL_PAD_EIM_A21__SRC_BOOT_CFG21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A21__SRC_BOOT_CFG21 /;"	d
MX6QDL_PAD_EIM_A22__EIM_ADDR22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__EIM_ADDR22 /;"	d
MX6QDL_PAD_EIM_A22__EIM_ADDR22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__EIM_ADDR22 /;"	d
MX6QDL_PAD_EIM_A22__EPDC_GDSP	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__EPDC_GDSP /;"	d
MX6QDL_PAD_EIM_A22__GPIO2_IO16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__GPIO2_IO16 /;"	d
MX6QDL_PAD_EIM_A22__GPIO2_IO16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__GPIO2_IO16 /;"	d
MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17 /;"	d
MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 /;"	d
MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 /;"	d
MX6QDL_PAD_EIM_A22__IPU2_CSI1_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__IPU2_CSI1_DATA17 /;"	d
MX6QDL_PAD_EIM_A22__SRC_BOOT_CFG22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__SRC_BOOT_CFG22 /;"	d
MX6QDL_PAD_EIM_A22__SRC_BOOT_CFG22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A22__SRC_BOOT_CFG22 /;"	d
MX6QDL_PAD_EIM_A23__EIM_ADDR23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__EIM_ADDR23 /;"	d
MX6QDL_PAD_EIM_A23__EIM_ADDR23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__EIM_ADDR23 /;"	d
MX6QDL_PAD_EIM_A23__EPDC_GDOE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__EPDC_GDOE /;"	d
MX6QDL_PAD_EIM_A23__GPIO6_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__GPIO6_IO06 /;"	d
MX6QDL_PAD_EIM_A23__GPIO6_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__GPIO6_IO06 /;"	d
MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18 /;"	d
MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 /;"	d
MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 /;"	d
MX6QDL_PAD_EIM_A23__IPU1_SISG3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU1_SISG3 /;"	d
MX6QDL_PAD_EIM_A23__IPU1_SISG3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU1_SISG3 /;"	d
MX6QDL_PAD_EIM_A23__IPU2_CSI1_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU2_CSI1_DATA18 /;"	d
MX6QDL_PAD_EIM_A23__IPU2_SISG3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__IPU2_SISG3 /;"	d
MX6QDL_PAD_EIM_A23__SRC_BOOT_CFG23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__SRC_BOOT_CFG23 /;"	d
MX6QDL_PAD_EIM_A23__SRC_BOOT_CFG23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A23__SRC_BOOT_CFG23 /;"	d
MX6QDL_PAD_EIM_A24__EIM_ADDR24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__EIM_ADDR24 /;"	d
MX6QDL_PAD_EIM_A24__EIM_ADDR24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__EIM_ADDR24 /;"	d
MX6QDL_PAD_EIM_A24__EPDC_GDRL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__EPDC_GDRL /;"	d
MX6QDL_PAD_EIM_A24__GPIO5_IO04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__GPIO5_IO04 /;"	d
MX6QDL_PAD_EIM_A24__GPIO5_IO04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__GPIO5_IO04 /;"	d
MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19 /;"	d
MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 /;"	d
MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 /;"	d
MX6QDL_PAD_EIM_A24__IPU1_SISG2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU1_SISG2 /;"	d
MX6QDL_PAD_EIM_A24__IPU1_SISG2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU1_SISG2 /;"	d
MX6QDL_PAD_EIM_A24__IPU2_CSI1_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU2_CSI1_DATA19 /;"	d
MX6QDL_PAD_EIM_A24__IPU2_SISG2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__IPU2_SISG2 /;"	d
MX6QDL_PAD_EIM_A24__SRC_BOOT_CFG24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__SRC_BOOT_CFG24 /;"	d
MX6QDL_PAD_EIM_A24__SRC_BOOT_CFG24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A24__SRC_BOOT_CFG24 /;"	d
MX6QDL_PAD_EIM_A25__ECSPI2_RDY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__ECSPI2_RDY /;"	d
MX6QDL_PAD_EIM_A25__ECSPI2_RDY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__ECSPI2_RDY /;"	d
MX6QDL_PAD_EIM_A25__ECSPI4_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__ECSPI4_SS1 /;"	d
MX6QDL_PAD_EIM_A25__ECSPI4_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__ECSPI4_SS1 /;"	d
MX6QDL_PAD_EIM_A25__EIM_ACLK_FREERUN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__EIM_ACLK_FREERUN /;"	d
MX6QDL_PAD_EIM_A25__EIM_ADDR25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__EIM_ADDR25 /;"	d
MX6QDL_PAD_EIM_A25__EIM_ADDR25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__EIM_ADDR25 /;"	d
MX6QDL_PAD_EIM_A25__EPDC_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__EPDC_DATA15 /;"	d
MX6QDL_PAD_EIM_A25__GPIO5_IO02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__GPIO5_IO02 /;"	d
MX6QDL_PAD_EIM_A25__GPIO5_IO02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__GPIO5_IO02 /;"	d
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE /;"	d
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE /;"	d
MX6QDL_PAD_EIM_A25__IPU1_DI0_D1_CS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__IPU1_DI0_D1_CS /;"	d
MX6QDL_PAD_EIM_A25__IPU1_DI0_D1_CS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__IPU1_DI0_D1_CS /;"	d
MX6QDL_PAD_EIM_A25__IPU1_DI1_PIN12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__IPU1_DI1_PIN12 /;"	d
MX6QDL_PAD_EIM_A25__IPU1_DI1_PIN12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_A25__IPU1_DI1_PIN12 /;"	d
MX6QDL_PAD_EIM_BCLK__EIM_BCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__EIM_BCLK /;"	d
MX6QDL_PAD_EIM_BCLK__EIM_BCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__EIM_BCLK /;"	d
MX6QDL_PAD_EIM_BCLK__EPDC_SDCE9	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__EPDC_SDCE9 /;"	d
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 /;"	d
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 /;"	d
MX6QDL_PAD_EIM_BCLK__IPU1_DI1_PIN16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__IPU1_DI1_PIN16 /;"	d
MX6QDL_PAD_EIM_BCLK__IPU1_DI1_PIN16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_BCLK__IPU1_DI1_PIN16 /;"	d
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK /;"	d
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK /;"	d
MX6QDL_PAD_EIM_CS0__EIM_CS0_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__EIM_CS0_B /;"	d
MX6QDL_PAD_EIM_CS0__EIM_CS0_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__EIM_CS0_B /;"	d
MX6QDL_PAD_EIM_CS0__EPDC_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__EPDC_DATA06 /;"	d
MX6QDL_PAD_EIM_CS0__GPIO2_IO23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__GPIO2_IO23 /;"	d
MX6QDL_PAD_EIM_CS0__GPIO2_IO23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__GPIO2_IO23 /;"	d
MX6QDL_PAD_EIM_CS0__IPU1_DI1_PIN05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__IPU1_DI1_PIN05 /;"	d
MX6QDL_PAD_EIM_CS0__IPU1_DI1_PIN05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS0__IPU1_DI1_PIN05 /;"	d
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI /;"	d
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI /;"	d
MX6QDL_PAD_EIM_CS1__EIM_CS1_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__EIM_CS1_B /;"	d
MX6QDL_PAD_EIM_CS1__EIM_CS1_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__EIM_CS1_B /;"	d
MX6QDL_PAD_EIM_CS1__EPDC_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__EPDC_DATA08 /;"	d
MX6QDL_PAD_EIM_CS1__GPIO2_IO24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__GPIO2_IO24 /;"	d
MX6QDL_PAD_EIM_CS1__GPIO2_IO24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__GPIO2_IO24 /;"	d
MX6QDL_PAD_EIM_CS1__IPU1_DI1_PIN06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__IPU1_DI1_PIN06 /;"	d
MX6QDL_PAD_EIM_CS1__IPU1_DI1_PIN06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_CS1__IPU1_DI1_PIN06 /;"	d
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__ECSPI1_SCLK /;"	d
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__ECSPI1_SCLK /;"	d
MX6QDL_PAD_EIM_D16__EIM_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__EIM_DATA16 /;"	d
MX6QDL_PAD_EIM_D16__EIM_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__EIM_DATA16 /;"	d
MX6QDL_PAD_EIM_D16__EPDC_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__EPDC_DATA10 /;"	d
MX6QDL_PAD_EIM_D16__GPIO3_IO16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__GPIO3_IO16 /;"	d
MX6QDL_PAD_EIM_D16__GPIO3_IO16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__GPIO3_IO16 /;"	d
MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA /;"	d
MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA /;"	d
MX6QDL_PAD_EIM_D16__I2C2_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__I2C2_SDA /;"	d
MX6QDL_PAD_EIM_D16__I2C2_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__I2C2_SDA /;"	d
MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 /;"	d
MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05 /;"	d
MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05 /;"	d
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 /;"	d
MX6QDL_PAD_EIM_D17__DCIC1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__DCIC1_OUT /;"	d
MX6QDL_PAD_EIM_D17__DCIC1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__DCIC1_OUT /;"	d
MX6QDL_PAD_EIM_D17__ECSPI1_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__ECSPI1_MISO /;"	d
MX6QDL_PAD_EIM_D17__ECSPI1_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__ECSPI1_MISO /;"	d
MX6QDL_PAD_EIM_D17__EIM_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__EIM_DATA17 /;"	d
MX6QDL_PAD_EIM_D17__EIM_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__EIM_DATA17 /;"	d
MX6QDL_PAD_EIM_D17__EPDC_VCOM0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__EPDC_VCOM0 /;"	d
MX6QDL_PAD_EIM_D17__GPIO3_IO17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__GPIO3_IO17 /;"	d
MX6QDL_PAD_EIM_D17__GPIO3_IO17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__GPIO3_IO17 /;"	d
MX6QDL_PAD_EIM_D17__I2C3_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__I2C3_SCL /;"	d
MX6QDL_PAD_EIM_D17__I2C3_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__I2C3_SCL /;"	d
MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK /;"	d
MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06 /;"	d
MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06 /;"	d
MX6QDL_PAD_EIM_D17__IPU2_CSI1_PIXCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D17__IPU2_CSI1_PIXCLK /;"	d
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__ECSPI1_MOSI /;"	d
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__ECSPI1_MOSI /;"	d
MX6QDL_PAD_EIM_D18__EIM_DATA18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__EIM_DATA18 /;"	d
MX6QDL_PAD_EIM_D18__EIM_DATA18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__EIM_DATA18 /;"	d
MX6QDL_PAD_EIM_D18__EPDC_VCOM1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__EPDC_VCOM1 /;"	d
MX6QDL_PAD_EIM_D18__GPIO3_IO18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__GPIO3_IO18 /;"	d
MX6QDL_PAD_EIM_D18__GPIO3_IO18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__GPIO3_IO18 /;"	d
MX6QDL_PAD_EIM_D18__I2C3_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__I2C3_SDA /;"	d
MX6QDL_PAD_EIM_D18__I2C3_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__I2C3_SDA /;"	d
MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 /;"	d
MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07 /;"	d
MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07 /;"	d
MX6QDL_PAD_EIM_D18__IPU1_DI1_D0_CS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__IPU1_DI1_D0_CS /;"	d
MX6QDL_PAD_EIM_D18__IPU1_DI1_D0_CS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__IPU1_DI1_D0_CS /;"	d
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 /;"	d
MX6QDL_PAD_EIM_D19__ECSPI1_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__ECSPI1_SS1 /;"	d
MX6QDL_PAD_EIM_D19__ECSPI1_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__ECSPI1_SS1 /;"	d
MX6QDL_PAD_EIM_D19__EIM_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__EIM_DATA19 /;"	d
MX6QDL_PAD_EIM_D19__EIM_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__EIM_DATA19 /;"	d
MX6QDL_PAD_EIM_D19__EPDC_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__EPDC_DATA12 /;"	d
MX6QDL_PAD_EIM_D19__EPIT1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__EPIT1_OUT /;"	d
MX6QDL_PAD_EIM_D19__EPIT1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__EPIT1_OUT /;"	d
MX6QDL_PAD_EIM_D19__GPIO3_IO19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__GPIO3_IO19 /;"	d
MX6QDL_PAD_EIM_D19__GPIO3_IO19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__GPIO3_IO19 /;"	d
MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 /;"	d
MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08 /;"	d
MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08 /;"	d
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 /;"	d
MX6QDL_PAD_EIM_D19__UART1_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__UART1_CTS_B /;"	d
MX6QDL_PAD_EIM_D19__UART1_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__UART1_CTS_B /;"	d
MX6QDL_PAD_EIM_D19__UART1_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__UART1_RTS_B /;"	d
MX6QDL_PAD_EIM_D19__UART1_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D19__UART1_RTS_B /;"	d
MX6QDL_PAD_EIM_D20__ECSPI4_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__ECSPI4_SS0 /;"	d
MX6QDL_PAD_EIM_D20__ECSPI4_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__ECSPI4_SS0 /;"	d
MX6QDL_PAD_EIM_D20__EIM_DATA20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__EIM_DATA20 /;"	d
MX6QDL_PAD_EIM_D20__EIM_DATA20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__EIM_DATA20 /;"	d
MX6QDL_PAD_EIM_D20__EPIT2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__EPIT2_OUT /;"	d
MX6QDL_PAD_EIM_D20__EPIT2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__EPIT2_OUT /;"	d
MX6QDL_PAD_EIM_D20__GPIO3_IO20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__GPIO3_IO20 /;"	d
MX6QDL_PAD_EIM_D20__GPIO3_IO20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__GPIO3_IO20 /;"	d
MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 /;"	d
MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16 /;"	d
MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16 /;"	d
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 /;"	d
MX6QDL_PAD_EIM_D20__UART1_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__UART1_CTS_B /;"	d
MX6QDL_PAD_EIM_D20__UART1_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__UART1_CTS_B /;"	d
MX6QDL_PAD_EIM_D20__UART1_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__UART1_RTS_B /;"	d
MX6QDL_PAD_EIM_D20__UART1_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D20__UART1_RTS_B /;"	d
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__ECSPI4_SCLK /;"	d
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__ECSPI4_SCLK /;"	d
MX6QDL_PAD_EIM_D21__EIM_DATA21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__EIM_DATA21 /;"	d
MX6QDL_PAD_EIM_D21__EIM_DATA21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__EIM_DATA21 /;"	d
MX6QDL_PAD_EIM_D21__GPIO3_IO21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__GPIO3_IO21 /;"	d
MX6QDL_PAD_EIM_D21__GPIO3_IO21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__GPIO3_IO21 /;"	d
MX6QDL_PAD_EIM_D21__I2C1_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__I2C1_SCL /;"	d
MX6QDL_PAD_EIM_D21__I2C1_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__I2C1_SCL /;"	d
MX6QDL_PAD_EIM_D21__IPU1_CSI1_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__IPU1_CSI1_DATA11 /;"	d
MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17 /;"	d
MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17 /;"	d
MX6QDL_PAD_EIM_D21__IPU2_CSI1_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__IPU2_CSI1_DATA11 /;"	d
MX6QDL_PAD_EIM_D21__SPDIF_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__SPDIF_IN /;"	d
MX6QDL_PAD_EIM_D21__SPDIF_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__SPDIF_IN /;"	d
MX6QDL_PAD_EIM_D21__USB_OTG_OC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__USB_OTG_OC /;"	d
MX6QDL_PAD_EIM_D21__USB_OTG_OC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D21__USB_OTG_OC /;"	d
MX6QDL_PAD_EIM_D22__ECSPI4_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__ECSPI4_MISO /;"	d
MX6QDL_PAD_EIM_D22__ECSPI4_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__ECSPI4_MISO /;"	d
MX6QDL_PAD_EIM_D22__EIM_DATA22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__EIM_DATA22 /;"	d
MX6QDL_PAD_EIM_D22__EIM_DATA22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__EIM_DATA22 /;"	d
MX6QDL_PAD_EIM_D22__EPDC_SDCE6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__EPDC_SDCE6 /;"	d
MX6QDL_PAD_EIM_D22__GPIO3_IO22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__GPIO3_IO22 /;"	d
MX6QDL_PAD_EIM_D22__GPIO3_IO22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__GPIO3_IO22 /;"	d
MX6QDL_PAD_EIM_D22__IPU1_CSI1_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__IPU1_CSI1_DATA10 /;"	d
MX6QDL_PAD_EIM_D22__IPU1_DI0_PIN01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__IPU1_DI0_PIN01 /;"	d
MX6QDL_PAD_EIM_D22__IPU1_DI0_PIN01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__IPU1_DI0_PIN01 /;"	d
MX6QDL_PAD_EIM_D22__IPU2_CSI1_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__IPU2_CSI1_DATA10 /;"	d
MX6QDL_PAD_EIM_D22__SPDIF_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__SPDIF_OUT /;"	d
MX6QDL_PAD_EIM_D22__SPDIF_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__SPDIF_OUT /;"	d
MX6QDL_PAD_EIM_D22__USB_OTG_PWR	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__USB_OTG_PWR /;"	d
MX6QDL_PAD_EIM_D22__USB_OTG_PWR	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D22__USB_OTG_PWR /;"	d
MX6QDL_PAD_EIM_D23__EIM_DATA23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__EIM_DATA23 /;"	d
MX6QDL_PAD_EIM_D23__EIM_DATA23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__EIM_DATA23 /;"	d
MX6QDL_PAD_EIM_D23__EPDC_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__EPDC_DATA11 /;"	d
MX6QDL_PAD_EIM_D23__GPIO3_IO23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__GPIO3_IO23 /;"	d
MX6QDL_PAD_EIM_D23__GPIO3_IO23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__GPIO3_IO23 /;"	d
MX6QDL_PAD_EIM_D23__IPU1_CSI1_DATA_EN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_CSI1_DATA_EN /;"	d
MX6QDL_PAD_EIM_D23__IPU1_DI0_D0_CS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_DI0_D0_CS /;"	d
MX6QDL_PAD_EIM_D23__IPU1_DI0_D0_CS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_DI0_D0_CS /;"	d
MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN02 /;"	d
MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN02 /;"	d
MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN14 /;"	d
MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN14 /;"	d
MX6QDL_PAD_EIM_D23__IPU2_CSI1_DATA_EN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__IPU2_CSI1_DATA_EN /;"	d
MX6QDL_PAD_EIM_D23__UART1_DCD_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__UART1_DCD_B /;"	d
MX6QDL_PAD_EIM_D23__UART1_DCD_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__UART1_DCD_B /;"	d
MX6QDL_PAD_EIM_D23__UART3_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_D23__UART3_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_D23__UART3_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_D23__UART3_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D23__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_D24__AUD5_RXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__AUD5_RXFS /;"	d
MX6QDL_PAD_EIM_D24__AUD5_RXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__AUD5_RXFS /;"	d
MX6QDL_PAD_EIM_D24__ECSPI1_SS2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__ECSPI1_SS2 /;"	d
MX6QDL_PAD_EIM_D24__ECSPI1_SS2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__ECSPI1_SS2 /;"	d
MX6QDL_PAD_EIM_D24__ECSPI2_SS2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__ECSPI2_SS2 /;"	d
MX6QDL_PAD_EIM_D24__ECSPI2_SS2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__ECSPI2_SS2 /;"	d
MX6QDL_PAD_EIM_D24__ECSPI4_SS2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__ECSPI4_SS2 /;"	d
MX6QDL_PAD_EIM_D24__ECSPI4_SS2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__ECSPI4_SS2 /;"	d
MX6QDL_PAD_EIM_D24__EIM_DATA24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__EIM_DATA24 /;"	d
MX6QDL_PAD_EIM_D24__EIM_DATA24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__EIM_DATA24 /;"	d
MX6QDL_PAD_EIM_D24__EPDC_SDCE7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__EPDC_SDCE7 /;"	d
MX6QDL_PAD_EIM_D24__GPIO3_IO24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__GPIO3_IO24 /;"	d
MX6QDL_PAD_EIM_D24__GPIO3_IO24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__GPIO3_IO24 /;"	d
MX6QDL_PAD_EIM_D24__UART1_DTR_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__UART1_DTR_B /;"	d
MX6QDL_PAD_EIM_D24__UART1_DTR_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__UART1_DTR_B /;"	d
MX6QDL_PAD_EIM_D24__UART3_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__UART3_RX_DATA /;"	d
MX6QDL_PAD_EIM_D24__UART3_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__UART3_RX_DATA /;"	d
MX6QDL_PAD_EIM_D24__UART3_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__UART3_TX_DATA /;"	d
MX6QDL_PAD_EIM_D24__UART3_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D24__UART3_TX_DATA /;"	d
MX6QDL_PAD_EIM_D25__AUD5_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__AUD5_RXC /;"	d
MX6QDL_PAD_EIM_D25__AUD5_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__AUD5_RXC /;"	d
MX6QDL_PAD_EIM_D25__ECSPI1_SS3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__ECSPI1_SS3 /;"	d
MX6QDL_PAD_EIM_D25__ECSPI1_SS3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__ECSPI1_SS3 /;"	d
MX6QDL_PAD_EIM_D25__ECSPI2_SS3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__ECSPI2_SS3 /;"	d
MX6QDL_PAD_EIM_D25__ECSPI2_SS3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__ECSPI2_SS3 /;"	d
MX6QDL_PAD_EIM_D25__ECSPI4_SS3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__ECSPI4_SS3 /;"	d
MX6QDL_PAD_EIM_D25__ECSPI4_SS3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__ECSPI4_SS3 /;"	d
MX6QDL_PAD_EIM_D25__EIM_DATA25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__EIM_DATA25 /;"	d
MX6QDL_PAD_EIM_D25__EIM_DATA25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__EIM_DATA25 /;"	d
MX6QDL_PAD_EIM_D25__EPDC_SDCE8	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__EPDC_SDCE8 /;"	d
MX6QDL_PAD_EIM_D25__GPIO3_IO25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__GPIO3_IO25 /;"	d
MX6QDL_PAD_EIM_D25__GPIO3_IO25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__GPIO3_IO25 /;"	d
MX6QDL_PAD_EIM_D25__UART1_DSR_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__UART1_DSR_B /;"	d
MX6QDL_PAD_EIM_D25__UART1_DSR_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__UART1_DSR_B /;"	d
MX6QDL_PAD_EIM_D25__UART3_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__UART3_RX_DATA /;"	d
MX6QDL_PAD_EIM_D25__UART3_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__UART3_RX_DATA /;"	d
MX6QDL_PAD_EIM_D25__UART3_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__UART3_TX_DATA /;"	d
MX6QDL_PAD_EIM_D25__UART3_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D25__UART3_TX_DATA /;"	d
MX6QDL_PAD_EIM_D26__EIM_DATA26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__EIM_DATA26 /;"	d
MX6QDL_PAD_EIM_D26__EIM_DATA26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__EIM_DATA26 /;"	d
MX6QDL_PAD_EIM_D26__EPDC_SDOED	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__EPDC_SDOED /;"	d
MX6QDL_PAD_EIM_D26__GPIO3_IO26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__GPIO3_IO26 /;"	d
MX6QDL_PAD_EIM_D26__GPIO3_IO26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__GPIO3_IO26 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_CSI0_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_CSI0_DATA01 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_CSI0_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_CSI0_DATA01 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_DI1_PIN11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_DI1_PIN11 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_DI1_PIN11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_DI1_PIN11 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_SISG2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_SISG2 /;"	d
MX6QDL_PAD_EIM_D26__IPU1_SISG2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU1_SISG2 /;"	d
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 /;"	d
MX6QDL_PAD_EIM_D26__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__UART2_RX_DATA /;"	d
MX6QDL_PAD_EIM_D26__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__UART2_RX_DATA /;"	d
MX6QDL_PAD_EIM_D26__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__UART2_TX_DATA /;"	d
MX6QDL_PAD_EIM_D26__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D26__UART2_TX_DATA /;"	d
MX6QDL_PAD_EIM_D27__EIM_DATA27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__EIM_DATA27 /;"	d
MX6QDL_PAD_EIM_D27__EIM_DATA27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__EIM_DATA27 /;"	d
MX6QDL_PAD_EIM_D27__EPDC_SDOE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__EPDC_SDOE /;"	d
MX6QDL_PAD_EIM_D27__GPIO3_IO27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__GPIO3_IO27 /;"	d
MX6QDL_PAD_EIM_D27__GPIO3_IO27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__GPIO3_IO27 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_CSI0_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_CSI0_DATA00 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_CSI0_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_CSI0_DATA00 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_DI1_PIN13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_DI1_PIN13 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_DI1_PIN13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_DI1_PIN13 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_SISG3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_SISG3 /;"	d
MX6QDL_PAD_EIM_D27__IPU1_SISG3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU1_SISG3 /;"	d
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 /;"	d
MX6QDL_PAD_EIM_D27__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__UART2_RX_DATA /;"	d
MX6QDL_PAD_EIM_D27__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__UART2_RX_DATA /;"	d
MX6QDL_PAD_EIM_D27__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__UART2_TX_DATA /;"	d
MX6QDL_PAD_EIM_D27__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D27__UART2_TX_DATA /;"	d
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__ECSPI4_MOSI /;"	d
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__ECSPI4_MOSI /;"	d
MX6QDL_PAD_EIM_D28__EIM_DATA28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__EIM_DATA28 /;"	d
MX6QDL_PAD_EIM_D28__EIM_DATA28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__EIM_DATA28 /;"	d
MX6QDL_PAD_EIM_D28__EPDC_PWR_CTRL3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__EPDC_PWR_CTRL3 /;"	d
MX6QDL_PAD_EIM_D28__GPIO3_IO28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__GPIO3_IO28 /;"	d
MX6QDL_PAD_EIM_D28__GPIO3_IO28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__GPIO3_IO28 /;"	d
MX6QDL_PAD_EIM_D28__I2C1_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__I2C1_SDA /;"	d
MX6QDL_PAD_EIM_D28__I2C1_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__I2C1_SDA /;"	d
MX6QDL_PAD_EIM_D28__IPU1_CSI1_DATA12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__IPU1_CSI1_DATA12 /;"	d
MX6QDL_PAD_EIM_D28__IPU1_DI0_PIN13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__IPU1_DI0_PIN13 /;"	d
MX6QDL_PAD_EIM_D28__IPU1_DI0_PIN13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__IPU1_DI0_PIN13 /;"	d
MX6QDL_PAD_EIM_D28__IPU1_EXT_TRIG	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__IPU1_EXT_TRIG /;"	d
MX6QDL_PAD_EIM_D28__IPU1_EXT_TRIG	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__IPU1_EXT_TRIG /;"	d
MX6QDL_PAD_EIM_D28__IPU2_CSI1_DATA12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__IPU2_CSI1_DATA12 /;"	d
MX6QDL_PAD_EIM_D28__UART2_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_CTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_CTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_DTE_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_DTE_RTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_DTE_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_DTE_RTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_RTS_B /;"	d
MX6QDL_PAD_EIM_D28__UART2_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D28__UART2_RTS_B /;"	d
MX6QDL_PAD_EIM_D29__ECSPI4_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 /;"	d
MX6QDL_PAD_EIM_D29__ECSPI4_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 /;"	d
MX6QDL_PAD_EIM_D29__EIM_DATA29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__EIM_DATA29 /;"	d
MX6QDL_PAD_EIM_D29__EIM_DATA29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__EIM_DATA29 /;"	d
MX6QDL_PAD_EIM_D29__EPDC_PWR_WAKE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__EPDC_PWR_WAKE /;"	d
MX6QDL_PAD_EIM_D29__GPIO3_IO29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 /;"	d
MX6QDL_PAD_EIM_D29__GPIO3_IO29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 /;"	d
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC /;"	d
MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 /;"	d
MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 /;"	d
MX6QDL_PAD_EIM_D29__IPU1_DI1_PIN15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__IPU1_DI1_PIN15 /;"	d
MX6QDL_PAD_EIM_D29__IPU1_DI1_PIN15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__IPU1_DI1_PIN15 /;"	d
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC /;"	d
MX6QDL_PAD_EIM_D29__UART2_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_CTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_CTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_RTS_B /;"	d
MX6QDL_PAD_EIM_D29__UART2_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D29__UART2_RTS_B /;"	d
MX6QDL_PAD_EIM_D30__EIM_DATA30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__EIM_DATA30 /;"	d
MX6QDL_PAD_EIM_D30__EIM_DATA30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__EIM_DATA30 /;"	d
MX6QDL_PAD_EIM_D30__EPDC_SDOEZ	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__EPDC_SDOEZ /;"	d
MX6QDL_PAD_EIM_D30__GPIO3_IO30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__GPIO3_IO30 /;"	d
MX6QDL_PAD_EIM_D30__GPIO3_IO30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__GPIO3_IO30 /;"	d
MX6QDL_PAD_EIM_D30__IPU1_CSI0_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__IPU1_CSI0_DATA03 /;"	d
MX6QDL_PAD_EIM_D30__IPU1_CSI0_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__IPU1_CSI0_DATA03 /;"	d
MX6QDL_PAD_EIM_D30__IPU1_DI0_PIN11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__IPU1_DI0_PIN11 /;"	d
MX6QDL_PAD_EIM_D30__IPU1_DI0_PIN11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__IPU1_DI0_PIN11 /;"	d
MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 /;"	d
MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 /;"	d
MX6QDL_PAD_EIM_D30__UART3_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_D30__UART3_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_D30__UART3_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_D30__UART3_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_D30__USB_H1_OC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__USB_H1_OC /;"	d
MX6QDL_PAD_EIM_D30__USB_H1_OC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D30__USB_H1_OC /;"	d
MX6QDL_PAD_EIM_D31__EIM_ACLK_FREERUN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__EIM_ACLK_FREERUN /;"	d
MX6QDL_PAD_EIM_D31__EIM_DATA31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__EIM_DATA31 /;"	d
MX6QDL_PAD_EIM_D31__EIM_DATA31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__EIM_DATA31 /;"	d
MX6QDL_PAD_EIM_D31__EPDC_SDCLK_P	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__EPDC_SDCLK_P /;"	d
MX6QDL_PAD_EIM_D31__GPIO3_IO31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__GPIO3_IO31 /;"	d
MX6QDL_PAD_EIM_D31__GPIO3_IO31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__GPIO3_IO31 /;"	d
MX6QDL_PAD_EIM_D31__IPU1_CSI0_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__IPU1_CSI0_DATA02 /;"	d
MX6QDL_PAD_EIM_D31__IPU1_CSI0_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__IPU1_CSI0_DATA02 /;"	d
MX6QDL_PAD_EIM_D31__IPU1_DI0_PIN12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__IPU1_DI0_PIN12 /;"	d
MX6QDL_PAD_EIM_D31__IPU1_DI0_PIN12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__IPU1_DI0_PIN12 /;"	d
MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 /;"	d
MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 /;"	d
MX6QDL_PAD_EIM_D31__UART3_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_D31__UART3_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_D31__UART3_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_D31__UART3_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_D31__USB_H1_PWR	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__USB_H1_PWR /;"	d
MX6QDL_PAD_EIM_D31__USB_H1_PWR	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_D31__USB_H1_PWR /;"	d
MX6QDL_PAD_EIM_DA0__EIM_AD00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__EIM_AD00 /;"	d
MX6QDL_PAD_EIM_DA0__EIM_AD00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__EIM_AD00 /;"	d
MX6QDL_PAD_EIM_DA0__EPDC_SDCLK_N	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__EPDC_SDCLK_N /;"	d
MX6QDL_PAD_EIM_DA0__GPIO3_IO00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__GPIO3_IO00 /;"	d
MX6QDL_PAD_EIM_DA0__GPIO3_IO00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__GPIO3_IO00 /;"	d
MX6QDL_PAD_EIM_DA0__IPU1_CSI1_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__IPU1_CSI1_DATA09 /;"	d
MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 /;"	d
MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 /;"	d
MX6QDL_PAD_EIM_DA0__IPU2_CSI1_DATA09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__IPU2_CSI1_DATA09 /;"	d
MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00 /;"	d
MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00 /;"	d
MX6QDL_PAD_EIM_DA10__EIM_AD10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__EIM_AD10 /;"	d
MX6QDL_PAD_EIM_DA10__EIM_AD10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__EIM_AD10 /;"	d
MX6QDL_PAD_EIM_DA10__EPDC_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__EPDC_DATA01 /;"	d
MX6QDL_PAD_EIM_DA10__GPIO3_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__GPIO3_IO10 /;"	d
MX6QDL_PAD_EIM_DA10__GPIO3_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__GPIO3_IO10 /;"	d
MX6QDL_PAD_EIM_DA10__IPU1_CSI1_DATA_EN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__IPU1_CSI1_DATA_EN /;"	d
MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 /;"	d
MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 /;"	d
MX6QDL_PAD_EIM_DA10__IPU2_CSI1_DATA_EN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__IPU2_CSI1_DATA_EN /;"	d
MX6QDL_PAD_EIM_DA10__SRC_BOOT_CFG10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__SRC_BOOT_CFG10 /;"	d
MX6QDL_PAD_EIM_DA10__SRC_BOOT_CFG10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA10__SRC_BOOT_CFG10 /;"	d
MX6QDL_PAD_EIM_DA11__EIM_AD11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__EIM_AD11 /;"	d
MX6QDL_PAD_EIM_DA11__EIM_AD11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__EIM_AD11 /;"	d
MX6QDL_PAD_EIM_DA11__EPDC_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__EPDC_DATA03 /;"	d
MX6QDL_PAD_EIM_DA11__GPIO3_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__GPIO3_IO11 /;"	d
MX6QDL_PAD_EIM_DA11__GPIO3_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__GPIO3_IO11 /;"	d
MX6QDL_PAD_EIM_DA11__IPU1_CSI1_HSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__IPU1_CSI1_HSYNC /;"	d
MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 /;"	d
MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 /;"	d
MX6QDL_PAD_EIM_DA11__IPU2_CSI1_HSYNC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__IPU2_CSI1_HSYNC /;"	d
MX6QDL_PAD_EIM_DA11__SRC_BOOT_CFG11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__SRC_BOOT_CFG11 /;"	d
MX6QDL_PAD_EIM_DA11__SRC_BOOT_CFG11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA11__SRC_BOOT_CFG11 /;"	d
MX6QDL_PAD_EIM_DA12__EIM_AD12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__EIM_AD12 /;"	d
MX6QDL_PAD_EIM_DA12__EIM_AD12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__EIM_AD12 /;"	d
MX6QDL_PAD_EIM_DA12__EPDC_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__EPDC_DATA02 /;"	d
MX6QDL_PAD_EIM_DA12__GPIO3_IO12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__GPIO3_IO12 /;"	d
MX6QDL_PAD_EIM_DA12__GPIO3_IO12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__GPIO3_IO12 /;"	d
MX6QDL_PAD_EIM_DA12__IPU1_CSI1_VSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__IPU1_CSI1_VSYNC /;"	d
MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 /;"	d
MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 /;"	d
MX6QDL_PAD_EIM_DA12__IPU2_CSI1_VSYNC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__IPU2_CSI1_VSYNC /;"	d
MX6QDL_PAD_EIM_DA12__SRC_BOOT_CFG12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__SRC_BOOT_CFG12 /;"	d
MX6QDL_PAD_EIM_DA12__SRC_BOOT_CFG12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA12__SRC_BOOT_CFG12 /;"	d
MX6QDL_PAD_EIM_DA13__EIM_AD13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__EIM_AD13 /;"	d
MX6QDL_PAD_EIM_DA13__EIM_AD13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__EIM_AD13 /;"	d
MX6QDL_PAD_EIM_DA13__EPDC_DATA13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__EPDC_DATA13 /;"	d
MX6QDL_PAD_EIM_DA13__GPIO3_IO13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__GPIO3_IO13 /;"	d
MX6QDL_PAD_EIM_DA13__GPIO3_IO13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__GPIO3_IO13 /;"	d
MX6QDL_PAD_EIM_DA13__IPU1_DI1_D0_CS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__IPU1_DI1_D0_CS /;"	d
MX6QDL_PAD_EIM_DA13__IPU1_DI1_D0_CS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__IPU1_DI1_D0_CS /;"	d
MX6QDL_PAD_EIM_DA13__SRC_BOOT_CFG13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__SRC_BOOT_CFG13 /;"	d
MX6QDL_PAD_EIM_DA13__SRC_BOOT_CFG13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA13__SRC_BOOT_CFG13 /;"	d
MX6QDL_PAD_EIM_DA14__EIM_AD14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__EIM_AD14 /;"	d
MX6QDL_PAD_EIM_DA14__EIM_AD14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__EIM_AD14 /;"	d
MX6QDL_PAD_EIM_DA14__EPDC_DATA14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__EPDC_DATA14 /;"	d
MX6QDL_PAD_EIM_DA14__GPIO3_IO14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__GPIO3_IO14 /;"	d
MX6QDL_PAD_EIM_DA14__GPIO3_IO14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__GPIO3_IO14 /;"	d
MX6QDL_PAD_EIM_DA14__IPU1_DI1_D1_CS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__IPU1_DI1_D1_CS /;"	d
MX6QDL_PAD_EIM_DA14__IPU1_DI1_D1_CS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__IPU1_DI1_D1_CS /;"	d
MX6QDL_PAD_EIM_DA14__SRC_BOOT_CFG14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__SRC_BOOT_CFG14 /;"	d
MX6QDL_PAD_EIM_DA14__SRC_BOOT_CFG14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA14__SRC_BOOT_CFG14 /;"	d
MX6QDL_PAD_EIM_DA15__EIM_AD15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__EIM_AD15 /;"	d
MX6QDL_PAD_EIM_DA15__EIM_AD15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__EIM_AD15 /;"	d
MX6QDL_PAD_EIM_DA15__EPDC_DATA09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__EPDC_DATA09 /;"	d
MX6QDL_PAD_EIM_DA15__GPIO3_IO15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__GPIO3_IO15 /;"	d
MX6QDL_PAD_EIM_DA15__GPIO3_IO15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__GPIO3_IO15 /;"	d
MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN01 /;"	d
MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN01 /;"	d
MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN04 /;"	d
MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN04 /;"	d
MX6QDL_PAD_EIM_DA15__SRC_BOOT_CFG15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__SRC_BOOT_CFG15 /;"	d
MX6QDL_PAD_EIM_DA15__SRC_BOOT_CFG15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA15__SRC_BOOT_CFG15 /;"	d
MX6QDL_PAD_EIM_DA1__EIM_AD01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__EIM_AD01 /;"	d
MX6QDL_PAD_EIM_DA1__EIM_AD01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__EIM_AD01 /;"	d
MX6QDL_PAD_EIM_DA1__EPDC_SDLE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__EPDC_SDLE /;"	d
MX6QDL_PAD_EIM_DA1__GPIO3_IO01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__GPIO3_IO01 /;"	d
MX6QDL_PAD_EIM_DA1__GPIO3_IO01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__GPIO3_IO01 /;"	d
MX6QDL_PAD_EIM_DA1__IPU1_CSI1_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__IPU1_CSI1_DATA08 /;"	d
MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 /;"	d
MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 /;"	d
MX6QDL_PAD_EIM_DA1__IPU2_CSI1_DATA08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__IPU2_CSI1_DATA08 /;"	d
MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01 /;"	d
MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01 /;"	d
MX6QDL_PAD_EIM_DA2__EIM_AD02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__EIM_AD02 /;"	d
MX6QDL_PAD_EIM_DA2__EIM_AD02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__EIM_AD02 /;"	d
MX6QDL_PAD_EIM_DA2__EPDC_BDR0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__EPDC_BDR0 /;"	d
MX6QDL_PAD_EIM_DA2__GPIO3_IO02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__GPIO3_IO02 /;"	d
MX6QDL_PAD_EIM_DA2__GPIO3_IO02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__GPIO3_IO02 /;"	d
MX6QDL_PAD_EIM_DA2__IPU1_CSI1_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__IPU1_CSI1_DATA07 /;"	d
MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 /;"	d
MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 /;"	d
MX6QDL_PAD_EIM_DA2__IPU2_CSI1_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__IPU2_CSI1_DATA07 /;"	d
MX6QDL_PAD_EIM_DA2__SRC_BOOT_CFG02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__SRC_BOOT_CFG02 /;"	d
MX6QDL_PAD_EIM_DA2__SRC_BOOT_CFG02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA2__SRC_BOOT_CFG02 /;"	d
MX6QDL_PAD_EIM_DA3__EIM_AD03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__EIM_AD03 /;"	d
MX6QDL_PAD_EIM_DA3__EIM_AD03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__EIM_AD03 /;"	d
MX6QDL_PAD_EIM_DA3__EPDC_BDR1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__EPDC_BDR1 /;"	d
MX6QDL_PAD_EIM_DA3__GPIO3_IO03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__GPIO3_IO03 /;"	d
MX6QDL_PAD_EIM_DA3__GPIO3_IO03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__GPIO3_IO03 /;"	d
MX6QDL_PAD_EIM_DA3__IPU1_CSI1_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__IPU1_CSI1_DATA06 /;"	d
MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 /;"	d
MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 /;"	d
MX6QDL_PAD_EIM_DA3__IPU2_CSI1_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__IPU2_CSI1_DATA06 /;"	d
MX6QDL_PAD_EIM_DA3__SRC_BOOT_CFG03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__SRC_BOOT_CFG03 /;"	d
MX6QDL_PAD_EIM_DA3__SRC_BOOT_CFG03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA3__SRC_BOOT_CFG03 /;"	d
MX6QDL_PAD_EIM_DA4__EIM_AD04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__EIM_AD04 /;"	d
MX6QDL_PAD_EIM_DA4__EIM_AD04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__EIM_AD04 /;"	d
MX6QDL_PAD_EIM_DA4__EPDC_SDCE0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__EPDC_SDCE0 /;"	d
MX6QDL_PAD_EIM_DA4__GPIO3_IO04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__GPIO3_IO04 /;"	d
MX6QDL_PAD_EIM_DA4__GPIO3_IO04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__GPIO3_IO04 /;"	d
MX6QDL_PAD_EIM_DA4__IPU1_CSI1_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__IPU1_CSI1_DATA05 /;"	d
MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 /;"	d
MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 /;"	d
MX6QDL_PAD_EIM_DA4__IPU2_CSI1_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__IPU2_CSI1_DATA05 /;"	d
MX6QDL_PAD_EIM_DA4__SRC_BOOT_CFG04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__SRC_BOOT_CFG04 /;"	d
MX6QDL_PAD_EIM_DA4__SRC_BOOT_CFG04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA4__SRC_BOOT_CFG04 /;"	d
MX6QDL_PAD_EIM_DA5__EIM_AD05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__EIM_AD05 /;"	d
MX6QDL_PAD_EIM_DA5__EIM_AD05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__EIM_AD05 /;"	d
MX6QDL_PAD_EIM_DA5__EPDC_SDCE1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__EPDC_SDCE1 /;"	d
MX6QDL_PAD_EIM_DA5__GPIO3_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__GPIO3_IO05 /;"	d
MX6QDL_PAD_EIM_DA5__GPIO3_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__GPIO3_IO05 /;"	d
MX6QDL_PAD_EIM_DA5__IPU1_CSI1_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__IPU1_CSI1_DATA04 /;"	d
MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 /;"	d
MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 /;"	d
MX6QDL_PAD_EIM_DA5__IPU2_CSI1_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__IPU2_CSI1_DATA04 /;"	d
MX6QDL_PAD_EIM_DA5__SRC_BOOT_CFG05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__SRC_BOOT_CFG05 /;"	d
MX6QDL_PAD_EIM_DA5__SRC_BOOT_CFG05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA5__SRC_BOOT_CFG05 /;"	d
MX6QDL_PAD_EIM_DA6__EIM_AD06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__EIM_AD06 /;"	d
MX6QDL_PAD_EIM_DA6__EIM_AD06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__EIM_AD06 /;"	d
MX6QDL_PAD_EIM_DA6__EPDC_SDCE2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__EPDC_SDCE2 /;"	d
MX6QDL_PAD_EIM_DA6__GPIO3_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__GPIO3_IO06 /;"	d
MX6QDL_PAD_EIM_DA6__GPIO3_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__GPIO3_IO06 /;"	d
MX6QDL_PAD_EIM_DA6__IPU1_CSI1_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__IPU1_CSI1_DATA03 /;"	d
MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 /;"	d
MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 /;"	d
MX6QDL_PAD_EIM_DA6__IPU2_CSI1_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__IPU2_CSI1_DATA03 /;"	d
MX6QDL_PAD_EIM_DA6__SRC_BOOT_CFG06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__SRC_BOOT_CFG06 /;"	d
MX6QDL_PAD_EIM_DA6__SRC_BOOT_CFG06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA6__SRC_BOOT_CFG06 /;"	d
MX6QDL_PAD_EIM_DA7__EIM_AD07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__EIM_AD07 /;"	d
MX6QDL_PAD_EIM_DA7__EIM_AD07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__EIM_AD07 /;"	d
MX6QDL_PAD_EIM_DA7__EPDC_SDCE3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__EPDC_SDCE3 /;"	d
MX6QDL_PAD_EIM_DA7__GPIO3_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__GPIO3_IO07 /;"	d
MX6QDL_PAD_EIM_DA7__GPIO3_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__GPIO3_IO07 /;"	d
MX6QDL_PAD_EIM_DA7__IPU1_CSI1_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__IPU1_CSI1_DATA02 /;"	d
MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 /;"	d
MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 /;"	d
MX6QDL_PAD_EIM_DA7__IPU2_CSI1_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__IPU2_CSI1_DATA02 /;"	d
MX6QDL_PAD_EIM_DA7__SRC_BOOT_CFG07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__SRC_BOOT_CFG07 /;"	d
MX6QDL_PAD_EIM_DA7__SRC_BOOT_CFG07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA7__SRC_BOOT_CFG07 /;"	d
MX6QDL_PAD_EIM_DA8__EIM_AD08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__EIM_AD08 /;"	d
MX6QDL_PAD_EIM_DA8__EIM_AD08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__EIM_AD08 /;"	d
MX6QDL_PAD_EIM_DA8__EPDC_SDCE4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__EPDC_SDCE4 /;"	d
MX6QDL_PAD_EIM_DA8__GPIO3_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__GPIO3_IO08 /;"	d
MX6QDL_PAD_EIM_DA8__GPIO3_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__GPIO3_IO08 /;"	d
MX6QDL_PAD_EIM_DA8__IPU1_CSI1_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__IPU1_CSI1_DATA01 /;"	d
MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 /;"	d
MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 /;"	d
MX6QDL_PAD_EIM_DA8__IPU2_CSI1_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__IPU2_CSI1_DATA01 /;"	d
MX6QDL_PAD_EIM_DA8__SRC_BOOT_CFG08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__SRC_BOOT_CFG08 /;"	d
MX6QDL_PAD_EIM_DA8__SRC_BOOT_CFG08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA8__SRC_BOOT_CFG08 /;"	d
MX6QDL_PAD_EIM_DA9__EIM_AD09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__EIM_AD09 /;"	d
MX6QDL_PAD_EIM_DA9__EIM_AD09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__EIM_AD09 /;"	d
MX6QDL_PAD_EIM_DA9__EPDC_SDCE5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__EPDC_SDCE5 /;"	d
MX6QDL_PAD_EIM_DA9__GPIO3_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__GPIO3_IO09 /;"	d
MX6QDL_PAD_EIM_DA9__GPIO3_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__GPIO3_IO09 /;"	d
MX6QDL_PAD_EIM_DA9__IPU1_CSI1_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__IPU1_CSI1_DATA00 /;"	d
MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 /;"	d
MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 /;"	d
MX6QDL_PAD_EIM_DA9__IPU2_CSI1_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__IPU2_CSI1_DATA00 /;"	d
MX6QDL_PAD_EIM_DA9__SRC_BOOT_CFG09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__SRC_BOOT_CFG09 /;"	d
MX6QDL_PAD_EIM_DA9__SRC_BOOT_CFG09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_DA9__SRC_BOOT_CFG09 /;"	d
MX6QDL_PAD_EIM_EB0__CCM_PMIC_READY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__CCM_PMIC_READY /;"	d
MX6QDL_PAD_EIM_EB0__CCM_PMIC_READY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__CCM_PMIC_READY /;"	d
MX6QDL_PAD_EIM_EB0__EIM_EB0_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__EIM_EB0_B /;"	d
MX6QDL_PAD_EIM_EB0__EIM_EB0_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__EIM_EB0_B /;"	d
MX6QDL_PAD_EIM_EB0__EPDC_PWR_COM	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__EPDC_PWR_COM /;"	d
MX6QDL_PAD_EIM_EB0__GPIO2_IO28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__GPIO2_IO28 /;"	d
MX6QDL_PAD_EIM_EB0__GPIO2_IO28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__GPIO2_IO28 /;"	d
MX6QDL_PAD_EIM_EB0__IPU1_CSI1_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__IPU1_CSI1_DATA11 /;"	d
MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 /;"	d
MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 /;"	d
MX6QDL_PAD_EIM_EB0__IPU2_CSI1_DATA11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__IPU2_CSI1_DATA11 /;"	d
MX6QDL_PAD_EIM_EB0__SRC_BOOT_CFG27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__SRC_BOOT_CFG27 /;"	d
MX6QDL_PAD_EIM_EB0__SRC_BOOT_CFG27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB0__SRC_BOOT_CFG27 /;"	d
MX6QDL_PAD_EIM_EB1__EIM_EB1_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__EIM_EB1_B /;"	d
MX6QDL_PAD_EIM_EB1__EIM_EB1_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__EIM_EB1_B /;"	d
MX6QDL_PAD_EIM_EB1__EPDC_SDSHR	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__EPDC_SDSHR /;"	d
MX6QDL_PAD_EIM_EB1__GPIO2_IO29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__GPIO2_IO29 /;"	d
MX6QDL_PAD_EIM_EB1__GPIO2_IO29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__GPIO2_IO29 /;"	d
MX6QDL_PAD_EIM_EB1__IPU1_CSI1_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__IPU1_CSI1_DATA10 /;"	d
MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 /;"	d
MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 /;"	d
MX6QDL_PAD_EIM_EB1__IPU2_CSI1_DATA10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__IPU2_CSI1_DATA10 /;"	d
MX6QDL_PAD_EIM_EB1__SRC_BOOT_CFG28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__SRC_BOOT_CFG28 /;"	d
MX6QDL_PAD_EIM_EB1__SRC_BOOT_CFG28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB1__SRC_BOOT_CFG28 /;"	d
MX6QDL_PAD_EIM_EB2__ECSPI1_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__ECSPI1_SS0 /;"	d
MX6QDL_PAD_EIM_EB2__ECSPI1_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__ECSPI1_SS0 /;"	d
MX6QDL_PAD_EIM_EB2__EIM_EB2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__EIM_EB2_B /;"	d
MX6QDL_PAD_EIM_EB2__EIM_EB2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__EIM_EB2_B /;"	d
MX6QDL_PAD_EIM_EB2__EPDC_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__EPDC_DATA05 /;"	d
MX6QDL_PAD_EIM_EB2__GPIO2_IO30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__GPIO2_IO30 /;"	d
MX6QDL_PAD_EIM_EB2__GPIO2_IO30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__GPIO2_IO30 /;"	d
MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL /;"	d
MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL /;"	d
MX6QDL_PAD_EIM_EB2__I2C2_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__I2C2_SCL /;"	d
MX6QDL_PAD_EIM_EB2__I2C2_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__I2C2_SCL /;"	d
MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 /;"	d
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 /;"	d
MX6QDL_PAD_EIM_EB2__SRC_BOOT_CFG30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__SRC_BOOT_CFG30 /;"	d
MX6QDL_PAD_EIM_EB2__SRC_BOOT_CFG30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB2__SRC_BOOT_CFG30 /;"	d
MX6QDL_PAD_EIM_EB3__ECSPI4_RDY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__ECSPI4_RDY /;"	d
MX6QDL_PAD_EIM_EB3__ECSPI4_RDY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__ECSPI4_RDY /;"	d
MX6QDL_PAD_EIM_EB3__EIM_ACLK_FREERUN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__EIM_ACLK_FREERUN /;"	d
MX6QDL_PAD_EIM_EB3__EIM_EB3_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__EIM_EB3_B /;"	d
MX6QDL_PAD_EIM_EB3__EIM_EB3_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__EIM_EB3_B /;"	d
MX6QDL_PAD_EIM_EB3__EPDC_SDCE0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__EPDC_SDCE0 /;"	d
MX6QDL_PAD_EIM_EB3__GPIO2_IO31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__GPIO2_IO31 /;"	d
MX6QDL_PAD_EIM_EB3__GPIO2_IO31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__GPIO2_IO31 /;"	d
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC /;"	d
MX6QDL_PAD_EIM_EB3__IPU1_DI1_PIN03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__IPU1_DI1_PIN03 /;"	d
MX6QDL_PAD_EIM_EB3__IPU1_DI1_PIN03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__IPU1_DI1_PIN03 /;"	d
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC /;"	d
MX6QDL_PAD_EIM_EB3__SRC_BOOT_CFG31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__SRC_BOOT_CFG31 /;"	d
MX6QDL_PAD_EIM_EB3__SRC_BOOT_CFG31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__SRC_BOOT_CFG31 /;"	d
MX6QDL_PAD_EIM_EB3__UART1_RI_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__UART1_RI_B /;"	d
MX6QDL_PAD_EIM_EB3__UART1_RI_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__UART1_RI_B /;"	d
MX6QDL_PAD_EIM_EB3__UART3_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_EB3__UART3_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__UART3_CTS_B /;"	d
MX6QDL_PAD_EIM_EB3__UART3_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_EB3__UART3_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_EB3__UART3_RTS_B /;"	d
MX6QDL_PAD_EIM_LBA__ECSPI2_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 /;"	d
MX6QDL_PAD_EIM_LBA__ECSPI2_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 /;"	d
MX6QDL_PAD_EIM_LBA__EIM_LBA_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__EIM_LBA_B /;"	d
MX6QDL_PAD_EIM_LBA__EIM_LBA_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__EIM_LBA_B /;"	d
MX6QDL_PAD_EIM_LBA__EPDC_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__EPDC_DATA04 /;"	d
MX6QDL_PAD_EIM_LBA__GPIO2_IO27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__GPIO2_IO27 /;"	d
MX6QDL_PAD_EIM_LBA__GPIO2_IO27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__GPIO2_IO27 /;"	d
MX6QDL_PAD_EIM_LBA__IPU1_DI1_PIN17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__IPU1_DI1_PIN17 /;"	d
MX6QDL_PAD_EIM_LBA__IPU1_DI1_PIN17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__IPU1_DI1_PIN17 /;"	d
MX6QDL_PAD_EIM_LBA__SRC_BOOT_CFG26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__SRC_BOOT_CFG26 /;"	d
MX6QDL_PAD_EIM_LBA__SRC_BOOT_CFG26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_LBA__SRC_BOOT_CFG26 /;"	d
MX6QDL_PAD_EIM_OE__ECSPI2_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__ECSPI2_MISO /;"	d
MX6QDL_PAD_EIM_OE__ECSPI2_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__ECSPI2_MISO /;"	d
MX6QDL_PAD_EIM_OE__EIM_OE_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__EIM_OE_B /;"	d
MX6QDL_PAD_EIM_OE__EIM_OE_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__EIM_OE_B /;"	d
MX6QDL_PAD_EIM_OE__EPDC_PWR_IRQ	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__EPDC_PWR_IRQ /;"	d
MX6QDL_PAD_EIM_OE__GPIO2_IO25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__GPIO2_IO25 /;"	d
MX6QDL_PAD_EIM_OE__GPIO2_IO25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__GPIO2_IO25 /;"	d
MX6QDL_PAD_EIM_OE__IPU1_DI1_PIN07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__IPU1_DI1_PIN07 /;"	d
MX6QDL_PAD_EIM_OE__IPU1_DI1_PIN07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_OE__IPU1_DI1_PIN07 /;"	d
MX6QDL_PAD_EIM_RW__ECSPI2_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__ECSPI2_SS0 /;"	d
MX6QDL_PAD_EIM_RW__ECSPI2_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__ECSPI2_SS0 /;"	d
MX6QDL_PAD_EIM_RW__EIM_RW	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__EIM_RW /;"	d
MX6QDL_PAD_EIM_RW__EIM_RW	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__EIM_RW /;"	d
MX6QDL_PAD_EIM_RW__EPDC_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__EPDC_DATA07 /;"	d
MX6QDL_PAD_EIM_RW__GPIO2_IO26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__GPIO2_IO26 /;"	d
MX6QDL_PAD_EIM_RW__GPIO2_IO26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__GPIO2_IO26 /;"	d
MX6QDL_PAD_EIM_RW__IPU1_DI1_PIN08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__IPU1_DI1_PIN08 /;"	d
MX6QDL_PAD_EIM_RW__IPU1_DI1_PIN08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__IPU1_DI1_PIN08 /;"	d
MX6QDL_PAD_EIM_RW__SRC_BOOT_CFG29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__SRC_BOOT_CFG29 /;"	d
MX6QDL_PAD_EIM_RW__SRC_BOOT_CFG29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_RW__SRC_BOOT_CFG29 /;"	d
MX6QDL_PAD_EIM_WAIT__EIM_DTACK_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__EIM_DTACK_B /;"	d
MX6QDL_PAD_EIM_WAIT__EIM_DTACK_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__EIM_DTACK_B /;"	d
MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B /;"	d
MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B /;"	d
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 /;"	d
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 /;"	d
MX6QDL_PAD_EIM_WAIT__SRC_BOOT_CFG25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__SRC_BOOT_CFG25 /;"	d
MX6QDL_PAD_EIM_WAIT__SRC_BOOT_CFG25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_EIM_WAIT__SRC_BOOT_CFG25 /;"	d
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN /;"	d
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN /;"	d
MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK /;"	d
MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK /;"	d
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 /;"	d
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 /;"	d
MX6QDL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK /;"	d
MX6QDL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK /;"	d
MX6QDL_PAD_ENET_MDC__ENET_1588_EVENT1_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__ENET_1588_EVENT1_IN /;"	d
MX6QDL_PAD_ENET_MDC__ENET_1588_EVENT1_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__ENET_1588_EVENT1_IN /;"	d
MX6QDL_PAD_ENET_MDC__ENET_MDC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__ENET_MDC /;"	d
MX6QDL_PAD_ENET_MDC__ENET_MDC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__ENET_MDC /;"	d
MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 /;"	d
MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 /;"	d
MX6QDL_PAD_ENET_MDC__GPIO1_IO31	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__GPIO1_IO31 /;"	d
MX6QDL_PAD_ENET_MDC__GPIO1_IO31	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__GPIO1_IO31 /;"	d
MX6QDL_PAD_ENET_MDC__MLB_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__MLB_DATA /;"	d
MX6QDL_PAD_ENET_MDC__MLB_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDC__MLB_DATA /;"	d
MX6QDL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT /;"	d
MX6QDL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT /;"	d
MX6QDL_PAD_ENET_MDIO__ENET_MDIO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__ENET_MDIO /;"	d
MX6QDL_PAD_ENET_MDIO__ENET_MDIO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__ENET_MDIO /;"	d
MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK /;"	d
MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK /;"	d
MX6QDL_PAD_ENET_MDIO__GPIO1_IO22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 /;"	d
MX6QDL_PAD_ENET_MDIO__GPIO1_IO22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 /;"	d
MX6QDL_PAD_ENET_MDIO__SPDIF_LOCK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__SPDIF_LOCK /;"	d
MX6QDL_PAD_ENET_MDIO__SPDIF_LOCK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_MDIO__SPDIF_LOCK /;"	d
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK /;"	d
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK /;"	d
MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS /;"	d
MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS /;"	d
MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 /;"	d
MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 /;"	d
MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK /;"	d
MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK /;"	d
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 /;"	d
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 /;"	d
MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK /;"	d
MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK /;"	d
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 /;"	d
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 /;"	d
MX6QDL_PAD_ENET_RXD0__SPDIF_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT /;"	d
MX6QDL_PAD_ENET_RXD0__SPDIF_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT /;"	d
MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT /;"	d
MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT /;"	d
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 /;"	d
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 /;"	d
MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS /;"	d
MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS /;"	d
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 /;"	d
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 /;"	d
MX6QDL_PAD_ENET_RXD1__MLB_SIG	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__MLB_SIG /;"	d
MX6QDL_PAD_ENET_RXD1__MLB_SIG	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RXD1__MLB_SIG /;"	d
MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT /;"	d
MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT /;"	d
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER /;"	d
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER /;"	d
MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK /;"	d
MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK /;"	d
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 /;"	d
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 /;"	d
MX6QDL_PAD_ENET_RX_ER__SPDIF_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN /;"	d
MX6QDL_PAD_ENET_RX_ER__SPDIF_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN /;"	d
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID /;"	d
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID /;"	d
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 /;"	d
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 /;"	d
MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 /;"	d
MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 /;"	d
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 /;"	d
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 /;"	d
MX6QDL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN /;"	d
MX6QDL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN /;"	d
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 /;"	d
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 /;"	d
MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 /;"	d
MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 /;"	d
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 /;"	d
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 /;"	d
MX6QDL_PAD_ENET_TXD1__I2C4_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__I2C4_SDA /;"	d
MX6QDL_PAD_ENET_TXD1__MLB_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__MLB_CLK /;"	d
MX6QDL_PAD_ENET_TXD1__MLB_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TXD1__MLB_CLK /;"	d
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN /;"	d
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN /;"	d
MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 /;"	d
MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 /;"	d
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 /;"	d
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 /;"	d
MX6QDL_PAD_ENET_TX_EN__I2C4_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_ENET_TX_EN__I2C4_SCL /;"	d
MX6QDL_PAD_GPIO_0__ASRC_EXT_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__ASRC_EXT_CLK /;"	d
MX6QDL_PAD_GPIO_0__ASRC_EXT_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__ASRC_EXT_CLK /;"	d
MX6QDL_PAD_GPIO_0__CCM_CLKO1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__CCM_CLKO1 /;"	d
MX6QDL_PAD_GPIO_0__CCM_CLKO1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__CCM_CLKO1 /;"	d
MX6QDL_PAD_GPIO_0__EPIT1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__EPIT1_OUT /;"	d
MX6QDL_PAD_GPIO_0__EPIT1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__EPIT1_OUT /;"	d
MX6QDL_PAD_GPIO_0__GPIO1_IO00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__GPIO1_IO00 /;"	d
MX6QDL_PAD_GPIO_0__GPIO1_IO00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__GPIO1_IO00 /;"	d
MX6QDL_PAD_GPIO_0__KEY_COL5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__KEY_COL5 /;"	d
MX6QDL_PAD_GPIO_0__KEY_COL5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__KEY_COL5 /;"	d
MX6QDL_PAD_GPIO_0__SNVS_VIO_5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__SNVS_VIO_5 /;"	d
MX6QDL_PAD_GPIO_0__SNVS_VIO_5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__SNVS_VIO_5 /;"	d
MX6QDL_PAD_GPIO_0__USB_H1_PWR	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__USB_H1_PWR /;"	d
MX6QDL_PAD_GPIO_0__USB_H1_PWR	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_0__USB_H1_PWR /;"	d
MX6QDL_PAD_GPIO_16__ENET_1588_EVENT2_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__ENET_1588_EVENT2_IN /;"	d
MX6QDL_PAD_GPIO_16__ENET_1588_EVENT2_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__ENET_1588_EVENT2_IN /;"	d
MX6QDL_PAD_GPIO_16__ENET_REF_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__ENET_REF_CLK /;"	d
MX6QDL_PAD_GPIO_16__ENET_REF_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__ENET_REF_CLK /;"	d
MX6QDL_PAD_GPIO_16__ESAI_TX3_RX2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__ESAI_TX3_RX2 /;"	d
MX6QDL_PAD_GPIO_16__ESAI_TX3_RX2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__ESAI_TX3_RX2 /;"	d
MX6QDL_PAD_GPIO_16__GPIO7_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__GPIO7_IO11 /;"	d
MX6QDL_PAD_GPIO_16__GPIO7_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__GPIO7_IO11 /;"	d
MX6QDL_PAD_GPIO_16__I2C3_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__I2C3_SDA /;"	d
MX6QDL_PAD_GPIO_16__I2C3_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__I2C3_SDA /;"	d
MX6QDL_PAD_GPIO_16__JTAG_DE_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__JTAG_DE_B /;"	d
MX6QDL_PAD_GPIO_16__JTAG_DE_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__JTAG_DE_B /;"	d
MX6QDL_PAD_GPIO_16__SD1_LCTL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__SD1_LCTL /;"	d
MX6QDL_PAD_GPIO_16__SD1_LCTL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__SD1_LCTL /;"	d
MX6QDL_PAD_GPIO_16__SPDIF_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__SPDIF_IN /;"	d
MX6QDL_PAD_GPIO_16__SPDIF_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_16__SPDIF_IN /;"	d
MX6QDL_PAD_GPIO_17__CCM_PMIC_READY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__CCM_PMIC_READY /;"	d
MX6QDL_PAD_GPIO_17__CCM_PMIC_READY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__CCM_PMIC_READY /;"	d
MX6QDL_PAD_GPIO_17__ENET_1588_EVENT3_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__ENET_1588_EVENT3_IN /;"	d
MX6QDL_PAD_GPIO_17__ENET_1588_EVENT3_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__ENET_1588_EVENT3_IN /;"	d
MX6QDL_PAD_GPIO_17__ESAI_TX0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__ESAI_TX0 /;"	d
MX6QDL_PAD_GPIO_17__ESAI_TX0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__ESAI_TX0 /;"	d
MX6QDL_PAD_GPIO_17__GPIO7_IO12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__GPIO7_IO12 /;"	d
MX6QDL_PAD_GPIO_17__GPIO7_IO12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__GPIO7_IO12 /;"	d
MX6QDL_PAD_GPIO_17__SDMA_EXT_EVENT0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__SDMA_EXT_EVENT0 /;"	d
MX6QDL_PAD_GPIO_17__SDMA_EXT_EVENT0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__SDMA_EXT_EVENT0 /;"	d
MX6QDL_PAD_GPIO_17__SPDIF_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__SPDIF_OUT /;"	d
MX6QDL_PAD_GPIO_17__SPDIF_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_17__SPDIF_OUT /;"	d
MX6QDL_PAD_GPIO_18__ASRC_EXT_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__ASRC_EXT_CLK /;"	d
MX6QDL_PAD_GPIO_18__ASRC_EXT_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__ASRC_EXT_CLK /;"	d
MX6QDL_PAD_GPIO_18__ENET_RX_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__ENET_RX_CLK /;"	d
MX6QDL_PAD_GPIO_18__ENET_RX_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__ENET_RX_CLK /;"	d
MX6QDL_PAD_GPIO_18__ESAI_TX1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__ESAI_TX1 /;"	d
MX6QDL_PAD_GPIO_18__ESAI_TX1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__ESAI_TX1 /;"	d
MX6QDL_PAD_GPIO_18__GPIO7_IO13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__GPIO7_IO13 /;"	d
MX6QDL_PAD_GPIO_18__GPIO7_IO13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__GPIO7_IO13 /;"	d
MX6QDL_PAD_GPIO_18__SD3_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__SD3_VSELECT /;"	d
MX6QDL_PAD_GPIO_18__SD3_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__SD3_VSELECT /;"	d
MX6QDL_PAD_GPIO_18__SDMA_EXT_EVENT1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__SDMA_EXT_EVENT1 /;"	d
MX6QDL_PAD_GPIO_18__SDMA_EXT_EVENT1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__SDMA_EXT_EVENT1 /;"	d
MX6QDL_PAD_GPIO_18__SNVS_VIO_5_CTL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__SNVS_VIO_5_CTL /;"	d
MX6QDL_PAD_GPIO_18__SNVS_VIO_5_CTL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_18__SNVS_VIO_5_CTL /;"	d
MX6QDL_PAD_GPIO_19__CCM_CLKO1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__CCM_CLKO1 /;"	d
MX6QDL_PAD_GPIO_19__CCM_CLKO1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__CCM_CLKO1 /;"	d
MX6QDL_PAD_GPIO_19__ECSPI1_RDY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__ECSPI1_RDY /;"	d
MX6QDL_PAD_GPIO_19__ECSPI1_RDY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__ECSPI1_RDY /;"	d
MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT /;"	d
MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT /;"	d
MX6QDL_PAD_GPIO_19__ENET_TX_ER	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__ENET_TX_ER /;"	d
MX6QDL_PAD_GPIO_19__ENET_TX_ER	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__ENET_TX_ER /;"	d
MX6QDL_PAD_GPIO_19__GPIO4_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__GPIO4_IO05 /;"	d
MX6QDL_PAD_GPIO_19__GPIO4_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__GPIO4_IO05 /;"	d
MX6QDL_PAD_GPIO_19__KEY_COL5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__KEY_COL5 /;"	d
MX6QDL_PAD_GPIO_19__KEY_COL5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__KEY_COL5 /;"	d
MX6QDL_PAD_GPIO_19__SPDIF_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__SPDIF_OUT /;"	d
MX6QDL_PAD_GPIO_19__SPDIF_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_19__SPDIF_OUT /;"	d
MX6QDL_PAD_GPIO_1__ESAI_RX_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK /;"	d
MX6QDL_PAD_GPIO_1__ESAI_RX_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK /;"	d
MX6QDL_PAD_GPIO_1__GPIO1_IO01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__GPIO1_IO01 /;"	d
MX6QDL_PAD_GPIO_1__GPIO1_IO01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__GPIO1_IO01 /;"	d
MX6QDL_PAD_GPIO_1__KEY_ROW5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__KEY_ROW5 /;"	d
MX6QDL_PAD_GPIO_1__KEY_ROW5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__KEY_ROW5 /;"	d
MX6QDL_PAD_GPIO_1__PWM2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__PWM2_OUT /;"	d
MX6QDL_PAD_GPIO_1__PWM2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__PWM2_OUT /;"	d
MX6QDL_PAD_GPIO_1__SD1_CD_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__SD1_CD_B /;"	d
MX6QDL_PAD_GPIO_1__SD1_CD_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__SD1_CD_B /;"	d
MX6QDL_PAD_GPIO_1__USB_OTG_ID	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__USB_OTG_ID /;"	d
MX6QDL_PAD_GPIO_1__USB_OTG_ID	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__USB_OTG_ID /;"	d
MX6QDL_PAD_GPIO_1__WDOG2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__WDOG2_B /;"	d
MX6QDL_PAD_GPIO_1__WDOG2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_1__WDOG2_B /;"	d
MX6QDL_PAD_GPIO_2__ESAI_TX_FS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__ESAI_TX_FS /;"	d
MX6QDL_PAD_GPIO_2__ESAI_TX_FS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__ESAI_TX_FS /;"	d
MX6QDL_PAD_GPIO_2__GPIO1_IO02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__GPIO1_IO02 /;"	d
MX6QDL_PAD_GPIO_2__GPIO1_IO02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__GPIO1_IO02 /;"	d
MX6QDL_PAD_GPIO_2__KEY_ROW6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__KEY_ROW6 /;"	d
MX6QDL_PAD_GPIO_2__KEY_ROW6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__KEY_ROW6 /;"	d
MX6QDL_PAD_GPIO_2__MLB_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__MLB_DATA /;"	d
MX6QDL_PAD_GPIO_2__MLB_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__MLB_DATA /;"	d
MX6QDL_PAD_GPIO_2__SD2_WP	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__SD2_WP /;"	d
MX6QDL_PAD_GPIO_2__SD2_WP	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_2__SD2_WP /;"	d
MX6QDL_PAD_GPIO_3__CCM_CLKO2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__CCM_CLKO2 /;"	d
MX6QDL_PAD_GPIO_3__CCM_CLKO2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__CCM_CLKO2 /;"	d
MX6QDL_PAD_GPIO_3__ESAI_RX_HF_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__ESAI_RX_HF_CLK /;"	d
MX6QDL_PAD_GPIO_3__ESAI_RX_HF_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__ESAI_RX_HF_CLK /;"	d
MX6QDL_PAD_GPIO_3__GPIO1_IO03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__GPIO1_IO03 /;"	d
MX6QDL_PAD_GPIO_3__GPIO1_IO03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__GPIO1_IO03 /;"	d
MX6QDL_PAD_GPIO_3__I2C3_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__I2C3_SCL /;"	d
MX6QDL_PAD_GPIO_3__I2C3_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__I2C3_SCL /;"	d
MX6QDL_PAD_GPIO_3__MLB_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__MLB_CLK /;"	d
MX6QDL_PAD_GPIO_3__MLB_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__MLB_CLK /;"	d
MX6QDL_PAD_GPIO_3__USB_H1_OC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__USB_H1_OC /;"	d
MX6QDL_PAD_GPIO_3__USB_H1_OC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__USB_H1_OC /;"	d
MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M /;"	d
MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M /;"	d
MX6QDL_PAD_GPIO_4__ESAI_TX_HF_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__ESAI_TX_HF_CLK /;"	d
MX6QDL_PAD_GPIO_4__ESAI_TX_HF_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__ESAI_TX_HF_CLK /;"	d
MX6QDL_PAD_GPIO_4__GPIO1_IO04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__GPIO1_IO04 /;"	d
MX6QDL_PAD_GPIO_4__GPIO1_IO04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__GPIO1_IO04 /;"	d
MX6QDL_PAD_GPIO_4__KEY_COL7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__KEY_COL7 /;"	d
MX6QDL_PAD_GPIO_4__KEY_COL7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__KEY_COL7 /;"	d
MX6QDL_PAD_GPIO_4__SD2_CD_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__SD2_CD_B /;"	d
MX6QDL_PAD_GPIO_4__SD2_CD_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_4__SD2_CD_B /;"	d
MX6QDL_PAD_GPIO_5__ARM_EVENTI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__ARM_EVENTI /;"	d
MX6QDL_PAD_GPIO_5__ARM_EVENTI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__ARM_EVENTI /;"	d
MX6QDL_PAD_GPIO_5__CCM_CLKO1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__CCM_CLKO1 /;"	d
MX6QDL_PAD_GPIO_5__CCM_CLKO1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__CCM_CLKO1 /;"	d
MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 /;"	d
MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 /;"	d
MX6QDL_PAD_GPIO_5__GPIO1_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__GPIO1_IO05 /;"	d
MX6QDL_PAD_GPIO_5__GPIO1_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__GPIO1_IO05 /;"	d
MX6QDL_PAD_GPIO_5__I2C3_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__I2C3_SCL /;"	d
MX6QDL_PAD_GPIO_5__I2C3_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__I2C3_SCL /;"	d
MX6QDL_PAD_GPIO_5__KEY_ROW7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__KEY_ROW7 /;"	d
MX6QDL_PAD_GPIO_5__KEY_ROW7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_5__KEY_ROW7 /;"	d
MX6QDL_PAD_GPIO_6__ENET_IRQ	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__ENET_IRQ	/;"	d
MX6QDL_PAD_GPIO_6__ENET_IRQ	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__ENET_IRQ	/;"	d
MX6QDL_PAD_GPIO_6__ESAI_TX_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK /;"	d
MX6QDL_PAD_GPIO_6__ESAI_TX_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK /;"	d
MX6QDL_PAD_GPIO_6__GPIO1_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__GPIO1_IO06 /;"	d
MX6QDL_PAD_GPIO_6__GPIO1_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__GPIO1_IO06 /;"	d
MX6QDL_PAD_GPIO_6__I2C3_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__I2C3_SDA /;"	d
MX6QDL_PAD_GPIO_6__I2C3_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__I2C3_SDA /;"	d
MX6QDL_PAD_GPIO_6__MLB_SIG	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__MLB_SIG /;"	d
MX6QDL_PAD_GPIO_6__MLB_SIG	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__MLB_SIG /;"	d
MX6QDL_PAD_GPIO_6__SD2_LCTL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__SD2_LCTL /;"	d
MX6QDL_PAD_GPIO_6__SD2_LCTL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_6__SD2_LCTL /;"	d
MX6QDL_PAD_GPIO_7__ECSPI5_RDY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__ECSPI5_RDY /;"	d
MX6QDL_PAD_GPIO_7__EPIT1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__EPIT1_OUT /;"	d
MX6QDL_PAD_GPIO_7__EPIT1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__EPIT1_OUT /;"	d
MX6QDL_PAD_GPIO_7__ESAI_TX4_RX1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__ESAI_TX4_RX1 /;"	d
MX6QDL_PAD_GPIO_7__ESAI_TX4_RX1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__ESAI_TX4_RX1 /;"	d
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__FLEXCAN1_TX /;"	d
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__FLEXCAN1_TX /;"	d
MX6QDL_PAD_GPIO_7__GPIO1_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__GPIO1_IO07 /;"	d
MX6QDL_PAD_GPIO_7__GPIO1_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__GPIO1_IO07 /;"	d
MX6QDL_PAD_GPIO_7__I2C4_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__I2C4_SCL /;"	d
MX6QDL_PAD_GPIO_7__SPDIF_LOCK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__SPDIF_LOCK /;"	d
MX6QDL_PAD_GPIO_7__SPDIF_LOCK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__SPDIF_LOCK /;"	d
MX6QDL_PAD_GPIO_7__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__UART2_RX_DATA /;"	d
MX6QDL_PAD_GPIO_7__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__UART2_RX_DATA /;"	d
MX6QDL_PAD_GPIO_7__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__UART2_TX_DATA /;"	d
MX6QDL_PAD_GPIO_7__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__UART2_TX_DATA /;"	d
MX6QDL_PAD_GPIO_7__USB_OTG_HOST_MODE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__USB_OTG_HOST_MODE /;"	d
MX6QDL_PAD_GPIO_7__USB_OTG_HOST_MODE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_7__USB_OTG_HOST_MODE /;"	d
MX6QDL_PAD_GPIO_8__EPIT2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__EPIT2_OUT /;"	d
MX6QDL_PAD_GPIO_8__EPIT2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__EPIT2_OUT /;"	d
MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0 /;"	d
MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0 /;"	d
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__FLEXCAN1_RX /;"	d
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__FLEXCAN1_RX /;"	d
MX6QDL_PAD_GPIO_8__GPIO1_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__GPIO1_IO08 /;"	d
MX6QDL_PAD_GPIO_8__GPIO1_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__GPIO1_IO08 /;"	d
MX6QDL_PAD_GPIO_8__I2C4_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__I2C4_SDA /;"	d
MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK /;"	d
MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK /;"	d
MX6QDL_PAD_GPIO_8__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__UART2_RX_DATA /;"	d
MX6QDL_PAD_GPIO_8__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__UART2_RX_DATA /;"	d
MX6QDL_PAD_GPIO_8__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__UART2_TX_DATA /;"	d
MX6QDL_PAD_GPIO_8__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__UART2_TX_DATA /;"	d
MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE /;"	d
MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE /;"	d
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K /;"	d
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K /;"	d
MX6QDL_PAD_GPIO_9__CCM_REF_EN_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__CCM_REF_EN_B /;"	d
MX6QDL_PAD_GPIO_9__CCM_REF_EN_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__CCM_REF_EN_B /;"	d
MX6QDL_PAD_GPIO_9__ESAI_RX_FS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__ESAI_RX_FS /;"	d
MX6QDL_PAD_GPIO_9__ESAI_RX_FS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__ESAI_RX_FS /;"	d
MX6QDL_PAD_GPIO_9__GPIO1_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__GPIO1_IO09 /;"	d
MX6QDL_PAD_GPIO_9__GPIO1_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__GPIO1_IO09 /;"	d
MX6QDL_PAD_GPIO_9__KEY_COL6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__KEY_COL6 /;"	d
MX6QDL_PAD_GPIO_9__KEY_COL6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__KEY_COL6 /;"	d
MX6QDL_PAD_GPIO_9__PWM1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__PWM1_OUT /;"	d
MX6QDL_PAD_GPIO_9__PWM1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__PWM1_OUT /;"	d
MX6QDL_PAD_GPIO_9__SD1_WP	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__SD1_WP /;"	d
MX6QDL_PAD_GPIO_9__SD1_WP	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__SD1_WP /;"	d
MX6QDL_PAD_GPIO_9__WDOG1_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__WDOG1_B /;"	d
MX6QDL_PAD_GPIO_9__WDOG1_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_GPIO_9__WDOG1_B /;"	d
MX6QDL_PAD_KEY_COL0__AUD5_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__AUD5_TXC /;"	d
MX6QDL_PAD_KEY_COL0__AUD5_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__AUD5_TXC /;"	d
MX6QDL_PAD_KEY_COL0__DCIC1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__DCIC1_OUT /;"	d
MX6QDL_PAD_KEY_COL0__DCIC1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__DCIC1_OUT /;"	d
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK /;"	d
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK /;"	d
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 /;"	d
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 /;"	d
MX6QDL_PAD_KEY_COL0__GPIO4_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__GPIO4_IO06 /;"	d
MX6QDL_PAD_KEY_COL0__GPIO4_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__GPIO4_IO06 /;"	d
MX6QDL_PAD_KEY_COL0__KEY_COL0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__KEY_COL0 /;"	d
MX6QDL_PAD_KEY_COL0__KEY_COL0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__KEY_COL0 /;"	d
MX6QDL_PAD_KEY_COL0__UART4_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__UART4_RX_DATA /;"	d
MX6QDL_PAD_KEY_COL0__UART4_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__UART4_RX_DATA /;"	d
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__UART4_TX_DATA /;"	d
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL0__UART4_TX_DATA /;"	d
MX6QDL_PAD_KEY_COL1__AUD5_TXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__AUD5_TXFS /;"	d
MX6QDL_PAD_KEY_COL1__AUD5_TXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__AUD5_TXFS /;"	d
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__ECSPI1_MISO /;"	d
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__ECSPI1_MISO /;"	d
MX6QDL_PAD_KEY_COL1__ENET_MDIO	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__ENET_MDIO /;"	d
MX6QDL_PAD_KEY_COL1__ENET_MDIO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__ENET_MDIO /;"	d
MX6QDL_PAD_KEY_COL1__GPIO4_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__GPIO4_IO08 /;"	d
MX6QDL_PAD_KEY_COL1__GPIO4_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__GPIO4_IO08 /;"	d
MX6QDL_PAD_KEY_COL1__KEY_COL1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__KEY_COL1 /;"	d
MX6QDL_PAD_KEY_COL1__KEY_COL1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__KEY_COL1 /;"	d
MX6QDL_PAD_KEY_COL1__SD1_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__SD1_VSELECT /;"	d
MX6QDL_PAD_KEY_COL1__SD1_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__SD1_VSELECT /;"	d
MX6QDL_PAD_KEY_COL1__UART5_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__UART5_RX_DATA /;"	d
MX6QDL_PAD_KEY_COL1__UART5_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__UART5_RX_DATA /;"	d
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__UART5_TX_DATA /;"	d
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL1__UART5_TX_DATA /;"	d
MX6QDL_PAD_KEY_COL2__ECSPI1_SS1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 /;"	d
MX6QDL_PAD_KEY_COL2__ECSPI1_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 /;"	d
MX6QDL_PAD_KEY_COL2__ENET_MDC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__ENET_MDC /;"	d
MX6QDL_PAD_KEY_COL2__ENET_MDC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__ENET_MDC /;"	d
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 /;"	d
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 /;"	d
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX /;"	d
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX /;"	d
MX6QDL_PAD_KEY_COL2__GPIO4_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__GPIO4_IO10 /;"	d
MX6QDL_PAD_KEY_COL2__GPIO4_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__GPIO4_IO10 /;"	d
MX6QDL_PAD_KEY_COL2__KEY_COL2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__KEY_COL2 /;"	d
MX6QDL_PAD_KEY_COL2__KEY_COL2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__KEY_COL2 /;"	d
MX6QDL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE /;"	d
MX6QDL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE /;"	d
MX6QDL_PAD_KEY_COL3__ECSPI1_SS3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__ECSPI1_SS3 /;"	d
MX6QDL_PAD_KEY_COL3__ECSPI1_SS3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__ECSPI1_SS3 /;"	d
MX6QDL_PAD_KEY_COL3__ENET_CRS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__ENET_CRS /;"	d
MX6QDL_PAD_KEY_COL3__ENET_CRS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__ENET_CRS /;"	d
MX6QDL_PAD_KEY_COL3__GPIO4_IO12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__GPIO4_IO12 /;"	d
MX6QDL_PAD_KEY_COL3__GPIO4_IO12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__GPIO4_IO12 /;"	d
MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL /;"	d
MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL /;"	d
MX6QDL_PAD_KEY_COL3__I2C2_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__I2C2_SCL /;"	d
MX6QDL_PAD_KEY_COL3__I2C2_SCL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__I2C2_SCL /;"	d
MX6QDL_PAD_KEY_COL3__KEY_COL3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__KEY_COL3 /;"	d
MX6QDL_PAD_KEY_COL3__KEY_COL3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__KEY_COL3 /;"	d
MX6QDL_PAD_KEY_COL3__SPDIF_IN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__SPDIF_IN /;"	d
MX6QDL_PAD_KEY_COL3__SPDIF_IN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL3__SPDIF_IN /;"	d
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX /;"	d
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX /;"	d
MX6QDL_PAD_KEY_COL4__GPIO4_IO14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__GPIO4_IO14 /;"	d
MX6QDL_PAD_KEY_COL4__GPIO4_IO14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__GPIO4_IO14 /;"	d
MX6QDL_PAD_KEY_COL4__IPU1_SISG4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__IPU1_SISG4 /;"	d
MX6QDL_PAD_KEY_COL4__IPU1_SISG4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__IPU1_SISG4 /;"	d
MX6QDL_PAD_KEY_COL4__KEY_COL4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__KEY_COL4 /;"	d
MX6QDL_PAD_KEY_COL4__KEY_COL4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__KEY_COL4 /;"	d
MX6QDL_PAD_KEY_COL4__UART5_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__UART5_CTS_B /;"	d
MX6QDL_PAD_KEY_COL4__UART5_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__UART5_CTS_B /;"	d
MX6QDL_PAD_KEY_COL4__UART5_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__UART5_RTS_B /;"	d
MX6QDL_PAD_KEY_COL4__UART5_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__UART5_RTS_B /;"	d
MX6QDL_PAD_KEY_COL4__USB_OTG_OC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__USB_OTG_OC /;"	d
MX6QDL_PAD_KEY_COL4__USB_OTG_OC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_COL4__USB_OTG_OC /;"	d
MX6QDL_PAD_KEY_ROW0__AUD5_TXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__AUD5_TXD /;"	d
MX6QDL_PAD_KEY_ROW0__AUD5_TXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__AUD5_TXD /;"	d
MX6QDL_PAD_KEY_ROW0__DCIC2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__DCIC2_OUT /;"	d
MX6QDL_PAD_KEY_ROW0__DCIC2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__DCIC2_OUT /;"	d
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI /;"	d
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI /;"	d
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 /;"	d
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 /;"	d
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 /;"	d
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 /;"	d
MX6QDL_PAD_KEY_ROW0__KEY_ROW0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__KEY_ROW0 /;"	d
MX6QDL_PAD_KEY_ROW0__KEY_ROW0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__KEY_ROW0 /;"	d
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA /;"	d
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA /;"	d
MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA /;"	d
MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA /;"	d
MX6QDL_PAD_KEY_ROW1__AUD5_RXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__AUD5_RXD /;"	d
MX6QDL_PAD_KEY_ROW1__AUD5_RXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__AUD5_RXD /;"	d
MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 /;"	d
MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 /;"	d
MX6QDL_PAD_KEY_ROW1__ENET_COL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__ENET_COL /;"	d
MX6QDL_PAD_KEY_ROW1__ENET_COL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__ENET_COL /;"	d
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 /;"	d
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 /;"	d
MX6QDL_PAD_KEY_ROW1__KEY_ROW1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__KEY_ROW1 /;"	d
MX6QDL_PAD_KEY_ROW1__KEY_ROW1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__KEY_ROW1 /;"	d
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__SD2_VSELECT /;"	d
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__SD2_VSELECT /;"	d
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA /;"	d
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA /;"	d
MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA /;"	d
MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA /;"	d
MX6QDL_PAD_KEY_ROW2__ECSPI1_SS2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__ECSPI1_SS2 /;"	d
MX6QDL_PAD_KEY_ROW2__ECSPI1_SS2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__ECSPI1_SS2 /;"	d
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 /;"	d
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 /;"	d
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX /;"	d
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX /;"	d
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 /;"	d
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 /;"	d
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE /;"	d
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE /;"	d
MX6QDL_PAD_KEY_ROW2__KEY_ROW2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__KEY_ROW2 /;"	d
MX6QDL_PAD_KEY_ROW2__KEY_ROW2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__KEY_ROW2 /;"	d
MX6QDL_PAD_KEY_ROW2__SD2_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__SD2_VSELECT /;"	d
MX6QDL_PAD_KEY_ROW2__SD2_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW2__SD2_VSELECT /;"	d
MX6QDL_PAD_KEY_ROW3__ASRC_EXT_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__ASRC_EXT_CLK /;"	d
MX6QDL_PAD_KEY_ROW3__ASRC_EXT_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__ASRC_EXT_CLK /;"	d
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 /;"	d
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 /;"	d
MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA /;"	d
MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA /;"	d
MX6QDL_PAD_KEY_ROW3__I2C2_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__I2C2_SDA /;"	d
MX6QDL_PAD_KEY_ROW3__I2C2_SDA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__I2C2_SDA /;"	d
MX6QDL_PAD_KEY_ROW3__KEY_ROW3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__KEY_ROW3 /;"	d
MX6QDL_PAD_KEY_ROW3__KEY_ROW3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__KEY_ROW3 /;"	d
MX6QDL_PAD_KEY_ROW3__SD1_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__SD1_VSELECT /;"	d
MX6QDL_PAD_KEY_ROW3__SD1_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW3__SD1_VSELECT /;"	d
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX /;"	d
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX /;"	d
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 /;"	d
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 /;"	d
MX6QDL_PAD_KEY_ROW4__IPU1_SISG5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__IPU1_SISG5 /;"	d
MX6QDL_PAD_KEY_ROW4__IPU1_SISG5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__IPU1_SISG5 /;"	d
MX6QDL_PAD_KEY_ROW4__KEY_ROW4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__KEY_ROW4 /;"	d
MX6QDL_PAD_KEY_ROW4__KEY_ROW4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__KEY_ROW4 /;"	d
MX6QDL_PAD_KEY_ROW4__UART5_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__UART5_CTS_B /;"	d
MX6QDL_PAD_KEY_ROW4__UART5_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__UART5_CTS_B /;"	d
MX6QDL_PAD_KEY_ROW4__UART5_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__UART5_RTS_B /;"	d
MX6QDL_PAD_KEY_ROW4__UART5_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__UART5_RTS_B /;"	d
MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR /;"	d
MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR /;"	d
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 /;"	d
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 /;"	d
MX6QDL_PAD_NANDF_ALE__NAND_ALE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_ALE__NAND_ALE /;"	d
MX6QDL_PAD_NANDF_ALE__NAND_ALE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_ALE__NAND_ALE /;"	d
MX6QDL_PAD_NANDF_ALE__SD4_RESET	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_ALE__SD4_RESET /;"	d
MX6QDL_PAD_NANDF_ALE__SD4_RESET	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_ALE__SD4_RESET /;"	d
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 /;"	d
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 /;"	d
MX6QDL_PAD_NANDF_CLE__IPU2_SISG4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CLE__IPU2_SISG4 /;"	d
MX6QDL_PAD_NANDF_CLE__NAND_CLE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CLE__NAND_CLE /;"	d
MX6QDL_PAD_NANDF_CLE__NAND_CLE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CLE__NAND_CLE /;"	d
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 /;"	d
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 /;"	d
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS0__NAND_CE0_B /;"	d
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS0__NAND_CE0_B /;"	d
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 /;"	d
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 /;"	d
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__NAND_CE1_B /;"	d
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__NAND_CE1_B /;"	d
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__SD3_VSELECT /;"	d
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__SD3_VSELECT /;"	d
MX6QDL_PAD_NANDF_CS1__SD4_VSELECT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__SD4_VSELECT /;"	d
MX6QDL_PAD_NANDF_CS1__SD4_VSELECT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS1__SD4_VSELECT /;"	d
MX6QDL_PAD_NANDF_CS2__CCM_CLKO2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 /;"	d
MX6QDL_PAD_NANDF_CS2__CCM_CLKO2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 /;"	d
MX6QDL_PAD_NANDF_CS2__EIM_CRE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__EIM_CRE /;"	d
MX6QDL_PAD_NANDF_CS2__EIM_CRE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__EIM_CRE /;"	d
MX6QDL_PAD_NANDF_CS2__ESAI_TX0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__ESAI_TX0 /;"	d
MX6QDL_PAD_NANDF_CS2__ESAI_TX0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__ESAI_TX0 /;"	d
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 /;"	d
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 /;"	d
MX6QDL_PAD_NANDF_CS2__IPU1_SISG0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__IPU1_SISG0 /;"	d
MX6QDL_PAD_NANDF_CS2__IPU1_SISG0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__IPU1_SISG0 /;"	d
MX6QDL_PAD_NANDF_CS2__IPU2_SISG0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__IPU2_SISG0 /;"	d
MX6QDL_PAD_NANDF_CS2__NAND_CE2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__NAND_CE2_B /;"	d
MX6QDL_PAD_NANDF_CS2__NAND_CE2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS2__NAND_CE2_B /;"	d
MX6QDL_PAD_NANDF_CS3__EIM_ADDR26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__EIM_ADDR26 /;"	d
MX6QDL_PAD_NANDF_CS3__EIM_ADDR26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__EIM_ADDR26 /;"	d
MX6QDL_PAD_NANDF_CS3__ESAI_TX1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__ESAI_TX1 /;"	d
MX6QDL_PAD_NANDF_CS3__ESAI_TX1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__ESAI_TX1 /;"	d
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 /;"	d
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 /;"	d
MX6QDL_PAD_NANDF_CS3__I2C4_SDA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__I2C4_SDA /;"	d
MX6QDL_PAD_NANDF_CS3__IPU1_SISG1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__IPU1_SISG1 /;"	d
MX6QDL_PAD_NANDF_CS3__IPU1_SISG1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__IPU1_SISG1 /;"	d
MX6QDL_PAD_NANDF_CS3__IPU2_SISG1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__IPU2_SISG1 /;"	d
MX6QDL_PAD_NANDF_CS3__NAND_CE3_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__NAND_CE3_B /;"	d
MX6QDL_PAD_NANDF_CS3__NAND_CE3_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_CS3__NAND_CE3_B /;"	d
MX6QDL_PAD_NANDF_D0__GPIO2_IO00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D0__GPIO2_IO00 /;"	d
MX6QDL_PAD_NANDF_D0__GPIO2_IO00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D0__GPIO2_IO00 /;"	d
MX6QDL_PAD_NANDF_D0__NAND_DATA00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D0__NAND_DATA00 /;"	d
MX6QDL_PAD_NANDF_D0__NAND_DATA00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D0__NAND_DATA00 /;"	d
MX6QDL_PAD_NANDF_D0__SD1_DATA4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D0__SD1_DATA4 /;"	d
MX6QDL_PAD_NANDF_D0__SD1_DATA4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D0__SD1_DATA4 /;"	d
MX6QDL_PAD_NANDF_D1__GPIO2_IO01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D1__GPIO2_IO01 /;"	d
MX6QDL_PAD_NANDF_D1__GPIO2_IO01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D1__GPIO2_IO01 /;"	d
MX6QDL_PAD_NANDF_D1__NAND_DATA01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D1__NAND_DATA01 /;"	d
MX6QDL_PAD_NANDF_D1__NAND_DATA01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D1__NAND_DATA01 /;"	d
MX6QDL_PAD_NANDF_D1__SD1_DATA5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D1__SD1_DATA5 /;"	d
MX6QDL_PAD_NANDF_D1__SD1_DATA5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D1__SD1_DATA5 /;"	d
MX6QDL_PAD_NANDF_D2__GPIO2_IO02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D2__GPIO2_IO02 /;"	d
MX6QDL_PAD_NANDF_D2__GPIO2_IO02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D2__GPIO2_IO02 /;"	d
MX6QDL_PAD_NANDF_D2__NAND_DATA02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D2__NAND_DATA02 /;"	d
MX6QDL_PAD_NANDF_D2__NAND_DATA02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D2__NAND_DATA02 /;"	d
MX6QDL_PAD_NANDF_D2__SD1_DATA6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D2__SD1_DATA6 /;"	d
MX6QDL_PAD_NANDF_D2__SD1_DATA6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D2__SD1_DATA6 /;"	d
MX6QDL_PAD_NANDF_D3__GPIO2_IO03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D3__GPIO2_IO03 /;"	d
MX6QDL_PAD_NANDF_D3__GPIO2_IO03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D3__GPIO2_IO03 /;"	d
MX6QDL_PAD_NANDF_D3__NAND_DATA03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D3__NAND_DATA03 /;"	d
MX6QDL_PAD_NANDF_D3__NAND_DATA03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D3__NAND_DATA03 /;"	d
MX6QDL_PAD_NANDF_D3__SD1_DATA7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D3__SD1_DATA7 /;"	d
MX6QDL_PAD_NANDF_D3__SD1_DATA7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D3__SD1_DATA7 /;"	d
MX6QDL_PAD_NANDF_D4__GPIO2_IO04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D4__GPIO2_IO04 /;"	d
MX6QDL_PAD_NANDF_D4__GPIO2_IO04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D4__GPIO2_IO04 /;"	d
MX6QDL_PAD_NANDF_D4__NAND_DATA04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D4__NAND_DATA04 /;"	d
MX6QDL_PAD_NANDF_D4__NAND_DATA04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D4__NAND_DATA04 /;"	d
MX6QDL_PAD_NANDF_D4__SD2_DATA4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D4__SD2_DATA4 /;"	d
MX6QDL_PAD_NANDF_D4__SD2_DATA4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D4__SD2_DATA4 /;"	d
MX6QDL_PAD_NANDF_D5__GPIO2_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D5__GPIO2_IO05 /;"	d
MX6QDL_PAD_NANDF_D5__GPIO2_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D5__GPIO2_IO05 /;"	d
MX6QDL_PAD_NANDF_D5__NAND_DATA05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D5__NAND_DATA05 /;"	d
MX6QDL_PAD_NANDF_D5__NAND_DATA05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D5__NAND_DATA05 /;"	d
MX6QDL_PAD_NANDF_D5__SD2_DATA5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D5__SD2_DATA5 /;"	d
MX6QDL_PAD_NANDF_D5__SD2_DATA5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D5__SD2_DATA5 /;"	d
MX6QDL_PAD_NANDF_D6__GPIO2_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D6__GPIO2_IO06 /;"	d
MX6QDL_PAD_NANDF_D6__GPIO2_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D6__GPIO2_IO06 /;"	d
MX6QDL_PAD_NANDF_D6__NAND_DATA06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D6__NAND_DATA06 /;"	d
MX6QDL_PAD_NANDF_D6__NAND_DATA06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D6__NAND_DATA06 /;"	d
MX6QDL_PAD_NANDF_D6__SD2_DATA6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D6__SD2_DATA6 /;"	d
MX6QDL_PAD_NANDF_D6__SD2_DATA6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D6__SD2_DATA6 /;"	d
MX6QDL_PAD_NANDF_D7__GPIO2_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D7__GPIO2_IO07 /;"	d
MX6QDL_PAD_NANDF_D7__GPIO2_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D7__GPIO2_IO07 /;"	d
MX6QDL_PAD_NANDF_D7__NAND_DATA07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D7__NAND_DATA07 /;"	d
MX6QDL_PAD_NANDF_D7__NAND_DATA07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D7__NAND_DATA07 /;"	d
MX6QDL_PAD_NANDF_D7__SD2_DATA7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D7__SD2_DATA7 /;"	d
MX6QDL_PAD_NANDF_D7__SD2_DATA7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_D7__SD2_DATA7 /;"	d
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 /;"	d
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 /;"	d
MX6QDL_PAD_NANDF_RB0__IPU2_DI0_PIN01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_RB0__IPU2_DI0_PIN01 /;"	d
MX6QDL_PAD_NANDF_RB0__NAND_READY_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_RB0__NAND_READY_B /;"	d
MX6QDL_PAD_NANDF_RB0__NAND_READY_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_RB0__NAND_READY_B /;"	d
MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 /;"	d
MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 /;"	d
MX6QDL_PAD_NANDF_WP_B__I2C4_SCL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_WP_B__I2C4_SCL /;"	d
MX6QDL_PAD_NANDF_WP_B__IPU2_SISG5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_WP_B__IPU2_SISG5 /;"	d
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_NANDF_WP_B__NAND_WP_B /;"	d
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_NANDF_WP_B__NAND_WP_B /;"	d
MX6QDL_PAD_RGMII_RD0__GPIO6_IO25	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 /;"	d
MX6QDL_PAD_RGMII_RD0__GPIO6_IO25	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 /;"	d
MX6QDL_PAD_RGMII_RD0__HSI_RX_READY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY /;"	d
MX6QDL_PAD_RGMII_RD0__HSI_RX_READY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY /;"	d
MX6QDL_PAD_RGMII_RD0__RGMII_RD0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 /;"	d
MX6QDL_PAD_RGMII_RD0__RGMII_RD0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 /;"	d
MX6QDL_PAD_RGMII_RD1__GPIO6_IO27	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 /;"	d
MX6QDL_PAD_RGMII_RD1__GPIO6_IO27	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 /;"	d
MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG /;"	d
MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG /;"	d
MX6QDL_PAD_RGMII_RD1__RGMII_RD1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 /;"	d
MX6QDL_PAD_RGMII_RD1__RGMII_RD1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 /;"	d
MX6QDL_PAD_RGMII_RD2__GPIO6_IO28	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 /;"	d
MX6QDL_PAD_RGMII_RD2__GPIO6_IO28	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 /;"	d
MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA /;"	d
MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA /;"	d
MX6QDL_PAD_RGMII_RD2__RGMII_RD2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD2__RGMII_RD2 /;"	d
MX6QDL_PAD_RGMII_RD2__RGMII_RD2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD2__RGMII_RD2 /;"	d
MX6QDL_PAD_RGMII_RD3__GPIO6_IO29	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 /;"	d
MX6QDL_PAD_RGMII_RD3__GPIO6_IO29	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 /;"	d
MX6QDL_PAD_RGMII_RD3__HSI_TX_WAKE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD3__HSI_TX_WAKE /;"	d
MX6QDL_PAD_RGMII_RD3__HSI_TX_WAKE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD3__HSI_TX_WAKE /;"	d
MX6QDL_PAD_RGMII_RD3__RGMII_RD3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD3__RGMII_RD3 /;"	d
MX6QDL_PAD_RGMII_RD3__RGMII_RD3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RD3__RGMII_RD3 /;"	d
MX6QDL_PAD_RGMII_RXC__GPIO6_IO30	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 /;"	d
MX6QDL_PAD_RGMII_RXC__GPIO6_IO30	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 /;"	d
MX6QDL_PAD_RGMII_RXC__RGMII_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RXC__RGMII_RXC /;"	d
MX6QDL_PAD_RGMII_RXC__RGMII_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RXC__RGMII_RXC /;"	d
MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE /;"	d
MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE /;"	d
MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 /;"	d
MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 /;"	d
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL /;"	d
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL /;"	d
MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA /;"	d
MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA /;"	d
MX6QDL_PAD_RGMII_TD0__GPIO6_IO20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 /;"	d
MX6QDL_PAD_RGMII_TD0__GPIO6_IO20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 /;"	d
MX6QDL_PAD_RGMII_TD0__HSI_TX_READY	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY /;"	d
MX6QDL_PAD_RGMII_TD0__HSI_TX_READY	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY /;"	d
MX6QDL_PAD_RGMII_TD0__RGMII_TD0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 /;"	d
MX6QDL_PAD_RGMII_TD0__RGMII_TD0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 /;"	d
MX6QDL_PAD_RGMII_TD1__GPIO6_IO21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 /;"	d
MX6QDL_PAD_RGMII_TD1__GPIO6_IO21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 /;"	d
MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG /;"	d
MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG /;"	d
MX6QDL_PAD_RGMII_TD1__RGMII_TD1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 /;"	d
MX6QDL_PAD_RGMII_TD1__RGMII_TD1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 /;"	d
MX6QDL_PAD_RGMII_TD2__GPIO6_IO22	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 /;"	d
MX6QDL_PAD_RGMII_TD2__GPIO6_IO22	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 /;"	d
MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA /;"	d
MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA /;"	d
MX6QDL_PAD_RGMII_TD2__RGMII_TD2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 /;"	d
MX6QDL_PAD_RGMII_TD2__RGMII_TD2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 /;"	d
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 /;"	d
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 /;"	d
MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE /;"	d
MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE /;"	d
MX6QDL_PAD_RGMII_TD3__RGMII_TD3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 /;"	d
MX6QDL_PAD_RGMII_TD3__RGMII_TD3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 /;"	d
MX6QDL_PAD_RGMII_TXC__GPIO6_IO19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO19 /;"	d
MX6QDL_PAD_RGMII_TXC__GPIO6_IO19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO19 /;"	d
MX6QDL_PAD_RGMII_TXC__RGMII_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC /;"	d
MX6QDL_PAD_RGMII_TXC__RGMII_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC /;"	d
MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK /;"	d
MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK /;"	d
MX6QDL_PAD_RGMII_TXC__USB_H2_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA /;"	d
MX6QDL_PAD_RGMII_TXC__USB_H2_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA /;"	d
MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M /;"	d
MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M /;"	d
MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK /;"	d
MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK /;"	d
MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 /;"	d
MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 /;"	d
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL /;"	d
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL /;"	d
MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE /;"	d
MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE /;"	d
MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK /;"	d
MX6QDL_PAD_SD1_CLK__GPIO1_IO20	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__GPIO1_IO20 /;"	d
MX6QDL_PAD_SD1_CLK__GPIO1_IO20	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__GPIO1_IO20 /;"	d
MX6QDL_PAD_SD1_CLK__GPT_CLKIN	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__GPT_CLKIN /;"	d
MX6QDL_PAD_SD1_CLK__GPT_CLKIN	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__GPT_CLKIN /;"	d
MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT /;"	d
MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT /;"	d
MX6QDL_PAD_SD1_CLK__SD1_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__SD1_CLK /;"	d
MX6QDL_PAD_SD1_CLK__SD1_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CLK__SD1_CLK /;"	d
MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI /;"	d
MX6QDL_PAD_SD1_CMD__GPIO1_IO18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__GPIO1_IO18 /;"	d
MX6QDL_PAD_SD1_CMD__GPIO1_IO18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__GPIO1_IO18 /;"	d
MX6QDL_PAD_SD1_CMD__GPT_COMPARE1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__GPT_COMPARE1 /;"	d
MX6QDL_PAD_SD1_CMD__GPT_COMPARE1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__GPT_COMPARE1 /;"	d
MX6QDL_PAD_SD1_CMD__PWM4_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__PWM4_OUT /;"	d
MX6QDL_PAD_SD1_CMD__PWM4_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__PWM4_OUT /;"	d
MX6QDL_PAD_SD1_CMD__SD1_CMD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__SD1_CMD /;"	d
MX6QDL_PAD_SD1_CMD__SD1_CMD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_CMD__SD1_CMD /;"	d
MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO /;"	d
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 /;"	d
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 /;"	d
MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 /;"	d
MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 /;"	d
MX6QDL_PAD_SD1_DAT0__SD1_DATA0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__SD1_DATA0 /;"	d
MX6QDL_PAD_SD1_DAT0__SD1_DATA0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT0__SD1_DATA0 /;"	d
MX6QDL_PAD_SD1_DAT1__ECSPI5_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__ECSPI5_SS0 /;"	d
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 /;"	d
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 /;"	d
MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 /;"	d
MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 /;"	d
MX6QDL_PAD_SD1_DAT1__PWM3_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__PWM3_OUT /;"	d
MX6QDL_PAD_SD1_DAT1__PWM3_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__PWM3_OUT /;"	d
MX6QDL_PAD_SD1_DAT1__SD1_DATA1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__SD1_DATA1 /;"	d
MX6QDL_PAD_SD1_DAT1__SD1_DATA1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT1__SD1_DATA1 /;"	d
MX6QDL_PAD_SD1_DAT2__ECSPI5_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__ECSPI5_SS1 /;"	d
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 /;"	d
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 /;"	d
MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2 /;"	d
MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2 /;"	d
MX6QDL_PAD_SD1_DAT2__PWM2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__PWM2_OUT /;"	d
MX6QDL_PAD_SD1_DAT2__PWM2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__PWM2_OUT /;"	d
MX6QDL_PAD_SD1_DAT2__SD1_DATA2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__SD1_DATA2 /;"	d
MX6QDL_PAD_SD1_DAT2__SD1_DATA2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__SD1_DATA2 /;"	d
MX6QDL_PAD_SD1_DAT2__WDOG1_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__WDOG1_B /;"	d
MX6QDL_PAD_SD1_DAT2__WDOG1_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__WDOG1_B /;"	d
MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB /;"	d
MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB /;"	d
MX6QDL_PAD_SD1_DAT3__ECSPI5_SS2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__ECSPI5_SS2 /;"	d
MX6QDL_PAD_SD1_DAT3__GPIO1_IO21	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 /;"	d
MX6QDL_PAD_SD1_DAT3__GPIO1_IO21	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 /;"	d
MX6QDL_PAD_SD1_DAT3__GPT_COMPARE3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__GPT_COMPARE3 /;"	d
MX6QDL_PAD_SD1_DAT3__GPT_COMPARE3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__GPT_COMPARE3 /;"	d
MX6QDL_PAD_SD1_DAT3__PWM1_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__PWM1_OUT /;"	d
MX6QDL_PAD_SD1_DAT3__PWM1_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__PWM1_OUT /;"	d
MX6QDL_PAD_SD1_DAT3__SD1_DATA3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__SD1_DATA3 /;"	d
MX6QDL_PAD_SD1_DAT3__SD1_DATA3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__SD1_DATA3 /;"	d
MX6QDL_PAD_SD1_DAT3__WDOG2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__WDOG2_B /;"	d
MX6QDL_PAD_SD1_DAT3__WDOG2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__WDOG2_B /;"	d
MX6QDL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB /;"	d
MX6QDL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB /;"	d
MX6QDL_PAD_SD2_CLK__AUD4_RXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__AUD4_RXFS /;"	d
MX6QDL_PAD_SD2_CLK__AUD4_RXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__AUD4_RXFS /;"	d
MX6QDL_PAD_SD2_CLK__ECSPI5_SCLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__ECSPI5_SCLK /;"	d
MX6QDL_PAD_SD2_CLK__GPIO1_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__GPIO1_IO10 /;"	d
MX6QDL_PAD_SD2_CLK__GPIO1_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__GPIO1_IO10 /;"	d
MX6QDL_PAD_SD2_CLK__KEY_COL5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__KEY_COL5 /;"	d
MX6QDL_PAD_SD2_CLK__KEY_COL5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__KEY_COL5 /;"	d
MX6QDL_PAD_SD2_CLK__SD2_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__SD2_CLK /;"	d
MX6QDL_PAD_SD2_CLK__SD2_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CLK__SD2_CLK /;"	d
MX6QDL_PAD_SD2_CMD__AUD4_RXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__AUD4_RXC /;"	d
MX6QDL_PAD_SD2_CMD__AUD4_RXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__AUD4_RXC /;"	d
MX6QDL_PAD_SD2_CMD__ECSPI5_MOSI	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__ECSPI5_MOSI /;"	d
MX6QDL_PAD_SD2_CMD__GPIO1_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__GPIO1_IO11 /;"	d
MX6QDL_PAD_SD2_CMD__GPIO1_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__GPIO1_IO11 /;"	d
MX6QDL_PAD_SD2_CMD__KEY_ROW5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__KEY_ROW5 /;"	d
MX6QDL_PAD_SD2_CMD__KEY_ROW5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__KEY_ROW5 /;"	d
MX6QDL_PAD_SD2_CMD__SD2_CMD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__SD2_CMD /;"	d
MX6QDL_PAD_SD2_CMD__SD2_CMD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_CMD__SD2_CMD /;"	d
MX6QDL_PAD_SD2_DAT0__AUD4_RXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD /;"	d
MX6QDL_PAD_SD2_DAT0__AUD4_RXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD /;"	d
MX6QDL_PAD_SD2_DAT0__DCIC2_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT /;"	d
MX6QDL_PAD_SD2_DAT0__DCIC2_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT /;"	d
MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO /;"	d
MX6QDL_PAD_SD2_DAT0__GPIO1_IO15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 /;"	d
MX6QDL_PAD_SD2_DAT0__GPIO1_IO15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 /;"	d
MX6QDL_PAD_SD2_DAT0__KEY_ROW7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7 /;"	d
MX6QDL_PAD_SD2_DAT0__KEY_ROW7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7 /;"	d
MX6QDL_PAD_SD2_DAT0__SD2_DATA0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0 /;"	d
MX6QDL_PAD_SD2_DAT0__SD2_DATA0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0 /;"	d
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS /;"	d
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS /;"	d
MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 /;"	d
MX6QDL_PAD_SD2_DAT1__EIM_CS2_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B /;"	d
MX6QDL_PAD_SD2_DAT1__EIM_CS2_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B /;"	d
MX6QDL_PAD_SD2_DAT1__GPIO1_IO14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 /;"	d
MX6QDL_PAD_SD2_DAT1__GPIO1_IO14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 /;"	d
MX6QDL_PAD_SD2_DAT1__KEY_COL7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__KEY_COL7 /;"	d
MX6QDL_PAD_SD2_DAT1__KEY_COL7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__KEY_COL7 /;"	d
MX6QDL_PAD_SD2_DAT1__SD2_DATA1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 /;"	d
MX6QDL_PAD_SD2_DAT1__SD2_DATA1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 /;"	d
MX6QDL_PAD_SD2_DAT2__AUD4_TXD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD /;"	d
MX6QDL_PAD_SD2_DAT2__AUD4_TXD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD /;"	d
MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 /;"	d
MX6QDL_PAD_SD2_DAT2__EIM_CS3_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B /;"	d
MX6QDL_PAD_SD2_DAT2__EIM_CS3_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B /;"	d
MX6QDL_PAD_SD2_DAT2__GPIO1_IO13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 /;"	d
MX6QDL_PAD_SD2_DAT2__GPIO1_IO13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 /;"	d
MX6QDL_PAD_SD2_DAT2__KEY_ROW6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6 /;"	d
MX6QDL_PAD_SD2_DAT2__KEY_ROW6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6 /;"	d
MX6QDL_PAD_SD2_DAT2__SD2_DATA2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 /;"	d
MX6QDL_PAD_SD2_DAT2__SD2_DATA2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 /;"	d
MX6QDL_PAD_SD2_DAT3__AUD4_TXC	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__AUD4_TXC /;"	d
MX6QDL_PAD_SD2_DAT3__AUD4_TXC	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__AUD4_TXC /;"	d
MX6QDL_PAD_SD2_DAT3__ECSPI5_SS3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__ECSPI5_SS3 /;"	d
MX6QDL_PAD_SD2_DAT3__GPIO1_IO12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 /;"	d
MX6QDL_PAD_SD2_DAT3__GPIO1_IO12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 /;"	d
MX6QDL_PAD_SD2_DAT3__KEY_COL6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__KEY_COL6 /;"	d
MX6QDL_PAD_SD2_DAT3__KEY_COL6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__KEY_COL6 /;"	d
MX6QDL_PAD_SD2_DAT3__SD2_DATA3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__SD2_DATA3 /;"	d
MX6QDL_PAD_SD2_DAT3__SD2_DATA3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD2_DAT3__SD2_DATA3 /;"	d
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX /;"	d
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX /;"	d
MX6QDL_PAD_SD3_CLK__GPIO7_IO03	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__GPIO7_IO03 /;"	d
MX6QDL_PAD_SD3_CLK__GPIO7_IO03	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__GPIO7_IO03 /;"	d
MX6QDL_PAD_SD3_CLK__SD3_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__SD3_CLK /;"	d
MX6QDL_PAD_SD3_CLK__SD3_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__SD3_CLK /;"	d
MX6QDL_PAD_SD3_CLK__UART2_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__UART2_CTS_B /;"	d
MX6QDL_PAD_SD3_CLK__UART2_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__UART2_CTS_B /;"	d
MX6QDL_PAD_SD3_CLK__UART2_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__UART2_RTS_B /;"	d
MX6QDL_PAD_SD3_CLK__UART2_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CLK__UART2_RTS_B /;"	d
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX /;"	d
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX /;"	d
MX6QDL_PAD_SD3_CMD__GPIO7_IO02	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__GPIO7_IO02 /;"	d
MX6QDL_PAD_SD3_CMD__GPIO7_IO02	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__GPIO7_IO02 /;"	d
MX6QDL_PAD_SD3_CMD__SD3_CMD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__SD3_CMD /;"	d
MX6QDL_PAD_SD3_CMD__SD3_CMD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__SD3_CMD /;"	d
MX6QDL_PAD_SD3_CMD__UART2_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__UART2_CTS_B /;"	d
MX6QDL_PAD_SD3_CMD__UART2_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__UART2_CTS_B /;"	d
MX6QDL_PAD_SD3_CMD__UART2_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__UART2_RTS_B /;"	d
MX6QDL_PAD_SD3_CMD__UART2_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_CMD__UART2_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX /;"	d
MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX /;"	d
MX6QDL_PAD_SD3_DAT0__GPIO7_IO04	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04 /;"	d
MX6QDL_PAD_SD3_DAT0__GPIO7_IO04	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04 /;"	d
MX6QDL_PAD_SD3_DAT0__SD3_DATA0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0 /;"	d
MX6QDL_PAD_SD3_DAT0__SD3_DATA0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0 /;"	d
MX6QDL_PAD_SD3_DAT0__UART1_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B /;"	d
MX6QDL_PAD_SD3_DAT0__UART1_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B /;"	d
MX6QDL_PAD_SD3_DAT0__UART1_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT0__UART1_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX /;"	d
MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX /;"	d
MX6QDL_PAD_SD3_DAT1__GPIO7_IO05	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__GPIO7_IO05 /;"	d
MX6QDL_PAD_SD3_DAT1__GPIO7_IO05	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__GPIO7_IO05 /;"	d
MX6QDL_PAD_SD3_DAT1__SD3_DATA1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__SD3_DATA1 /;"	d
MX6QDL_PAD_SD3_DAT1__SD3_DATA1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__SD3_DATA1 /;"	d
MX6QDL_PAD_SD3_DAT1__UART1_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__UART1_CTS_B /;"	d
MX6QDL_PAD_SD3_DAT1__UART1_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__UART1_CTS_B /;"	d
MX6QDL_PAD_SD3_DAT1__UART1_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__UART1_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT1__UART1_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT1__UART1_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT2__GPIO7_IO06	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 /;"	d
MX6QDL_PAD_SD3_DAT2__GPIO7_IO06	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 /;"	d
MX6QDL_PAD_SD3_DAT2__SD3_DATA2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT2__SD3_DATA2 /;"	d
MX6QDL_PAD_SD3_DAT2__SD3_DATA2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT2__SD3_DATA2 /;"	d
MX6QDL_PAD_SD3_DAT3__GPIO7_IO07	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__GPIO7_IO07 /;"	d
MX6QDL_PAD_SD3_DAT3__GPIO7_IO07	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__GPIO7_IO07 /;"	d
MX6QDL_PAD_SD3_DAT3__SD3_DATA3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__SD3_DATA3 /;"	d
MX6QDL_PAD_SD3_DAT3__SD3_DATA3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__SD3_DATA3 /;"	d
MX6QDL_PAD_SD3_DAT3__UART3_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__UART3_CTS_B /;"	d
MX6QDL_PAD_SD3_DAT3__UART3_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__UART3_CTS_B /;"	d
MX6QDL_PAD_SD3_DAT3__UART3_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__UART3_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT3__UART3_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT3__UART3_RTS_B /;"	d
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 /;"	d
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 /;"	d
MX6QDL_PAD_SD3_DAT4__SD3_DATA4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__SD3_DATA4 /;"	d
MX6QDL_PAD_SD3_DAT4__SD3_DATA4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__SD3_DATA4 /;"	d
MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT4__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT4__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT4__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 /;"	d
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 /;"	d
MX6QDL_PAD_SD3_DAT5__SD3_DATA5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__SD3_DATA5 /;"	d
MX6QDL_PAD_SD3_DAT5__SD3_DATA5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__SD3_DATA5 /;"	d
MX6QDL_PAD_SD3_DAT5__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT5__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 /;"	d
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 /;"	d
MX6QDL_PAD_SD3_DAT6__SD3_DATA6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__SD3_DATA6 /;"	d
MX6QDL_PAD_SD3_DAT6__SD3_DATA6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__SD3_DATA6 /;"	d
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT6__UART1_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__UART1_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT6__UART1_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT6__UART1_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT7__GPIO6_IO17	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 /;"	d
MX6QDL_PAD_SD3_DAT7__GPIO6_IO17	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 /;"	d
MX6QDL_PAD_SD3_DAT7__SD3_DATA7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__SD3_DATA7 /;"	d
MX6QDL_PAD_SD3_DAT7__SD3_DATA7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__SD3_DATA7 /;"	d
MX6QDL_PAD_SD3_DAT7__UART1_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__UART1_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT7__UART1_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__UART1_RX_DATA /;"	d
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA /;"	d
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA /;"	d
MX6QDL_PAD_SD3_RST__GPIO7_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__GPIO7_IO08 /;"	d
MX6QDL_PAD_SD3_RST__GPIO7_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__GPIO7_IO08 /;"	d
MX6QDL_PAD_SD3_RST__SD3_RESET	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__SD3_RESET /;"	d
MX6QDL_PAD_SD3_RST__SD3_RESET	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__SD3_RESET /;"	d
MX6QDL_PAD_SD3_RST__UART3_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__UART3_CTS_B /;"	d
MX6QDL_PAD_SD3_RST__UART3_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__UART3_CTS_B /;"	d
MX6QDL_PAD_SD3_RST__UART3_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__UART3_RTS_B /;"	d
MX6QDL_PAD_SD3_RST__UART3_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD3_RST__UART3_RTS_B /;"	d
MX6QDL_PAD_SD4_CLK__GPIO7_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__GPIO7_IO10 /;"	d
MX6QDL_PAD_SD4_CLK__GPIO7_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__GPIO7_IO10 /;"	d
MX6QDL_PAD_SD4_CLK__NAND_WE_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__NAND_WE_B /;"	d
MX6QDL_PAD_SD4_CLK__NAND_WE_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__NAND_WE_B /;"	d
MX6QDL_PAD_SD4_CLK__SD4_CLK	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__SD4_CLK /;"	d
MX6QDL_PAD_SD4_CLK__SD4_CLK	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__SD4_CLK /;"	d
MX6QDL_PAD_SD4_CLK__UART3_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__UART3_RX_DATA /;"	d
MX6QDL_PAD_SD4_CLK__UART3_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__UART3_RX_DATA /;"	d
MX6QDL_PAD_SD4_CLK__UART3_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__UART3_TX_DATA /;"	d
MX6QDL_PAD_SD4_CLK__UART3_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CLK__UART3_TX_DATA /;"	d
MX6QDL_PAD_SD4_CMD__GPIO7_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__GPIO7_IO09 /;"	d
MX6QDL_PAD_SD4_CMD__GPIO7_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__GPIO7_IO09 /;"	d
MX6QDL_PAD_SD4_CMD__NAND_RE_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__NAND_RE_B /;"	d
MX6QDL_PAD_SD4_CMD__NAND_RE_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__NAND_RE_B /;"	d
MX6QDL_PAD_SD4_CMD__SD4_CMD	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__SD4_CMD /;"	d
MX6QDL_PAD_SD4_CMD__SD4_CMD	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__SD4_CMD /;"	d
MX6QDL_PAD_SD4_CMD__UART3_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__UART3_RX_DATA /;"	d
MX6QDL_PAD_SD4_CMD__UART3_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__UART3_RX_DATA /;"	d
MX6QDL_PAD_SD4_CMD__UART3_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__UART3_TX_DATA /;"	d
MX6QDL_PAD_SD4_CMD__UART3_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_CMD__UART3_TX_DATA /;"	d
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 /;"	d
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 /;"	d
MX6QDL_PAD_SD4_DAT0__NAND_DQS	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT0__NAND_DQS /;"	d
MX6QDL_PAD_SD4_DAT0__NAND_DQS	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT0__NAND_DQS /;"	d
MX6QDL_PAD_SD4_DAT0__SD4_DATA0	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT0__SD4_DATA0 /;"	d
MX6QDL_PAD_SD4_DAT0__SD4_DATA0	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT0__SD4_DATA0 /;"	d
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 /;"	d
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 /;"	d
MX6QDL_PAD_SD4_DAT1__PWM3_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT1__PWM3_OUT /;"	d
MX6QDL_PAD_SD4_DAT1__PWM3_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT1__PWM3_OUT /;"	d
MX6QDL_PAD_SD4_DAT1__SD4_DATA1	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT1__SD4_DATA1 /;"	d
MX6QDL_PAD_SD4_DAT1__SD4_DATA1	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT1__SD4_DATA1 /;"	d
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 /;"	d
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 /;"	d
MX6QDL_PAD_SD4_DAT2__PWM4_OUT	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT2__PWM4_OUT /;"	d
MX6QDL_PAD_SD4_DAT2__PWM4_OUT	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT2__PWM4_OUT /;"	d
MX6QDL_PAD_SD4_DAT2__SD4_DATA2	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT2__SD4_DATA2 /;"	d
MX6QDL_PAD_SD4_DAT2__SD4_DATA2	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT2__SD4_DATA2 /;"	d
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 /;"	d
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 /;"	d
MX6QDL_PAD_SD4_DAT3__SD4_DATA3	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT3__SD4_DATA3 /;"	d
MX6QDL_PAD_SD4_DAT3__SD4_DATA3	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT3__SD4_DATA3 /;"	d
MX6QDL_PAD_SD4_DAT4__GPIO2_IO12	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 /;"	d
MX6QDL_PAD_SD4_DAT4__GPIO2_IO12	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 /;"	d
MX6QDL_PAD_SD4_DAT4__SD4_DATA4	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__SD4_DATA4 /;"	d
MX6QDL_PAD_SD4_DAT4__SD4_DATA4	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__SD4_DATA4 /;"	d
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD4_DAT5__GPIO2_IO13	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 /;"	d
MX6QDL_PAD_SD4_DAT5__GPIO2_IO13	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 /;"	d
MX6QDL_PAD_SD4_DAT5__SD4_DATA5	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__SD4_DATA5 /;"	d
MX6QDL_PAD_SD4_DAT5__SD4_DATA5	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__SD4_DATA5 /;"	d
MX6QDL_PAD_SD4_DAT5__UART2_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__UART2_CTS_B /;"	d
MX6QDL_PAD_SD4_DAT5__UART2_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__UART2_CTS_B /;"	d
MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__UART2_RTS_B /;"	d
MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT5__UART2_RTS_B /;"	d
MX6QDL_PAD_SD4_DAT6__GPIO2_IO14	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__GPIO2_IO14 /;"	d
MX6QDL_PAD_SD4_DAT6__GPIO2_IO14	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__GPIO2_IO14 /;"	d
MX6QDL_PAD_SD4_DAT6__SD4_DATA6	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__SD4_DATA6 /;"	d
MX6QDL_PAD_SD4_DAT6__SD4_DATA6	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__SD4_DATA6 /;"	d
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__UART2_CTS_B /;"	d
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__UART2_CTS_B /;"	d
MX6QDL_PAD_SD4_DAT6__UART2_RTS_B	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__UART2_RTS_B /;"	d
MX6QDL_PAD_SD4_DAT6__UART2_RTS_B	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT6__UART2_RTS_B /;"	d
MX6QDL_PAD_SD4_DAT7__GPIO2_IO15	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 /;"	d
MX6QDL_PAD_SD4_DAT7__GPIO2_IO15	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 /;"	d
MX6QDL_PAD_SD4_DAT7__SD4_DATA7	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__SD4_DATA7 /;"	d
MX6QDL_PAD_SD4_DAT7__SD4_DATA7	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__SD4_DATA7 /;"	d
MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA /;"	d
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	arch/arm/dts/imx6dl-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA /;"	d
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	arch/arm/dts/imx6q-pinfunc.h	/^#define MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA /;"	d
MX6Q_QMX6_PFUZE_MUX	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define MX6Q_QMX6_PFUZE_MUX	/;"	d	file:
MX6S	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6S$/;"	c
MX6SDL_IOM_DDR_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6SDL_IOM_DDR_BASE /;"	d
MX6SDL_IOM_GRP_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6SDL_IOM_GRP_BASE /;"	d
MX6SL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6SL$/;"	c
MX6SL_IOM_DDR_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6SL_IOM_DDR_BASE /;"	d
MX6SL_IOM_GRP_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6SL_IOM_GRP_BASE /;"	d
MX6SL_PU_IROM_MMU_EN_VAR	arch/arm/imx-common/hab.c	/^#define MX6SL_PU_IROM_MMU_EN_VAR	/;"	d	file:
MX6SX	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6SX$/;"	c
MX6SX_IOM_DDR_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6SX_IOM_DDR_BASE	/;"	d
MX6SX_IOM_GRP_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6SX_IOM_GRP_BASE	/;"	d
MX6SX_LCDIF1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MX6SX_LCDIF1_BASE_ADDR /;"	d
MX6SX_WDOG3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MX6SX_WDOG3_BASE_ADDR /;"	d
MX6UL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6UL$/;"	c
MX6ULL	arch/arm/cpu/armv7/mx6/Kconfig	/^config MX6ULL$/;"	c
MX6ULL_LCDIF1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MX6ULL_LCDIF1_BASE_ADDR /;"	d
MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 /;"	d
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 /;"	d
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 /;"	d
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 /;"	d
MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 /;"	d
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 /;"	d
MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 /;"	d
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 /;"	d
MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 /;"	d
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 /;"	d
MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 /;"	d
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 /;"	d
MX6UL_IOM_DDR_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6UL_IOM_DDR_BASE	/;"	d
MX6UL_IOM_GRP_BASE	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6UL_IOM_GRP_BASE	/;"	d
MX6UL_LCDIF1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MX6UL_LCDIF1_BASE_ADDR /;"	d
MX6UL_PAD_BOOT_MODE0__GPIO5_IO10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10	/;"	d
MX6UL_PAD_BOOT_MODE1__GPIO5_IO11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11	/;"	d
MX6UL_PAD_CSI_DATA00__CSI_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__CSI_DATA02	/;"	d
MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK	/;"	d
MX6UL_PAD_CSI_DATA00__EIM_AD00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__EIM_AD00	/;"	d
MX6UL_PAD_CSI_DATA00__ESAI_TX_HF_CLK	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__ESAI_TX_HF_CLK /;"	d
MX6UL_PAD_CSI_DATA00__GPIO4_IO21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__GPIO4_IO21	/;"	d
MX6UL_PAD_CSI_DATA00__SIM1_PORT1_RST_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__SIM1_PORT1_RST_B	/;"	d
MX6UL_PAD_CSI_DATA00__SRC_INT_BOOT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__SRC_INT_BOOT	/;"	d
MX6UL_PAD_CSI_DATA00__UART5_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__UART5_DCE_TX	/;"	d
MX6UL_PAD_CSI_DATA00__UART5_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__UART5_DTE_RX	/;"	d
MX6UL_PAD_CSI_DATA00__USDHC2_DATA0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA00__USDHC2_DATA0	/;"	d
MX6UL_PAD_CSI_DATA01__CSI_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__CSI_DATA03	/;"	d
MX6UL_PAD_CSI_DATA01__ECSPI2_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__ECSPI2_SS0	/;"	d
MX6UL_PAD_CSI_DATA01__EIM_AD01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__EIM_AD01	/;"	d
MX6UL_PAD_CSI_DATA01__ESAI_RX_HF_CLK	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__ESAI_RX_HF_CLK /;"	d
MX6UL_PAD_CSI_DATA01__GPIO4_IO22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__GPIO4_IO22	/;"	d
MX6UL_PAD_CSI_DATA01__SAI1_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__SAI1_MCLK	/;"	d
MX6UL_PAD_CSI_DATA01__SIM1_PORT1_SVEN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__SIM1_PORT1_SVEN	/;"	d
MX6UL_PAD_CSI_DATA01__UART5_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__UART5_DCE_RX	/;"	d
MX6UL_PAD_CSI_DATA01__UART5_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__UART5_DTE_TX	/;"	d
MX6UL_PAD_CSI_DATA01__USDHC2_DATA1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA01__USDHC2_DATA1	/;"	d
MX6UL_PAD_CSI_DATA02__CSI_DATA04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__CSI_DATA04	/;"	d
MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI	/;"	d
MX6UL_PAD_CSI_DATA02__EIM_AD02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__EIM_AD02	/;"	d
MX6UL_PAD_CSI_DATA02__ESAI_RX_FS	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__ESAI_RX_FS /;"	d
MX6UL_PAD_CSI_DATA02__GPIO4_IO23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__GPIO4_IO23	/;"	d
MX6UL_PAD_CSI_DATA02__SAI1_RX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__SAI1_RX_SYNC	/;"	d
MX6UL_PAD_CSI_DATA02__SIM1_PORT1_TRXD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__SIM1_PORT1_TRXD	/;"	d
MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS	/;"	d
MX6UL_PAD_CSI_DATA02__UART5_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__UART5_DTE_CTS	/;"	d
MX6UL_PAD_CSI_DATA02__USDHC2_DATA2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA02__USDHC2_DATA2	/;"	d
MX6UL_PAD_CSI_DATA03__CSI_DATA05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__CSI_DATA05	/;"	d
MX6UL_PAD_CSI_DATA03__ECSPI2_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__ECSPI2_MISO	/;"	d
MX6UL_PAD_CSI_DATA03__EIM_AD03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__EIM_AD03	/;"	d
MX6UL_PAD_CSI_DATA03__ESAI_RX_CLK	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__ESAI_RX_CLK /;"	d
MX6UL_PAD_CSI_DATA03__GPIO4_IO24	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__GPIO4_IO24	/;"	d
MX6UL_PAD_CSI_DATA03__SAI1_RX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__SAI1_RX_BCLK	/;"	d
MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD	/;"	d
MX6UL_PAD_CSI_DATA03__UART5_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__UART5_DCE_CTS	/;"	d
MX6UL_PAD_CSI_DATA03__UART5_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__UART5_DTE_RTS	/;"	d
MX6UL_PAD_CSI_DATA03__USDHC2_DATA3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA03__USDHC2_DATA3	/;"	d
MX6UL_PAD_CSI_DATA04__CSI_DATA06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__CSI_DATA06	/;"	d
MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK	/;"	d
MX6UL_PAD_CSI_DATA04__EIM_AD04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__EIM_AD04	/;"	d
MX6UL_PAD_CSI_DATA04__ESAI_TX_FS	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__ESAI_TX_FS /;"	d
MX6UL_PAD_CSI_DATA04__GPIO4_IO25	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__GPIO4_IO25	/;"	d
MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC	/;"	d
MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK	/;"	d
MX6UL_PAD_CSI_DATA04__USDHC1_WP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__USDHC1_WP	/;"	d
MX6UL_PAD_CSI_DATA04__USDHC2_DATA4	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA04__USDHC2_DATA4	/;"	d
MX6UL_PAD_CSI_DATA05__CSI_DATA07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__CSI_DATA07	/;"	d
MX6UL_PAD_CSI_DATA05__ECSPI1_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__ECSPI1_SS0	/;"	d
MX6UL_PAD_CSI_DATA05__EIM_AD05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__EIM_AD05	/;"	d
MX6UL_PAD_CSI_DATA05__ESAI_TX_CLK	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__ESAI_TX_CLK /;"	d
MX6UL_PAD_CSI_DATA05__GPIO4_IO26	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__GPIO4_IO26	/;"	d
MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK	/;"	d
MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B	/;"	d
MX6UL_PAD_CSI_DATA05__USDHC1_CD_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__USDHC1_CD_B	/;"	d
MX6UL_PAD_CSI_DATA05__USDHC2_DATA5	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA05__USDHC2_DATA5	/;"	d
MX6UL_PAD_CSI_DATA06__CSI_DATA08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__CSI_DATA08	/;"	d
MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI	/;"	d
MX6UL_PAD_CSI_DATA06__EIM_AD06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__EIM_AD06	/;"	d
MX6UL_PAD_CSI_DATA06__ESAI_TX5_RX0	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__ESAI_TX5_RX0 /;"	d
MX6UL_PAD_CSI_DATA06__GPIO4_IO27	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__GPIO4_IO27	/;"	d
MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA	/;"	d
MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN	/;"	d
MX6UL_PAD_CSI_DATA06__USDHC1_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__USDHC1_RESET_B	/;"	d
MX6UL_PAD_CSI_DATA06__USDHC2_DATA6	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA06__USDHC2_DATA6	/;"	d
MX6UL_PAD_CSI_DATA07__CSI_DATA09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__CSI_DATA09	/;"	d
MX6UL_PAD_CSI_DATA07__ECSPI1_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__ECSPI1_MISO	/;"	d
MX6UL_PAD_CSI_DATA07__EIM_AD07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__EIM_AD07	/;"	d
MX6UL_PAD_CSI_DATA07__ESAI_T0	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__ESAI_T0 /;"	d
MX6UL_PAD_CSI_DATA07__GPIO4_IO28	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__GPIO4_IO28	/;"	d
MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA	/;"	d
MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD	/;"	d
MX6UL_PAD_CSI_DATA07__USDHC1_VSELECT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__USDHC1_VSELECT	/;"	d
MX6UL_PAD_CSI_DATA07__USDHC2_DATA7	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_DATA07__USDHC2_DATA7	/;"	d
MX6UL_PAD_CSI_HSYNC__CSI_HSYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__CSI_HSYNC	/;"	d
MX6UL_PAD_CSI_HSYNC__EIM_LBA_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__EIM_LBA_B	/;"	d
MX6UL_PAD_CSI_HSYNC__ESAI_TX1	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__ESAI_TX1 /;"	d
MX6UL_PAD_CSI_HSYNC__GPIO4_IO20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__GPIO4_IO20	/;"	d
MX6UL_PAD_CSI_HSYNC__I2C2_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__I2C2_SCL	/;"	d
MX6UL_PAD_CSI_HSYNC__PWM8_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__PWM8_OUT	/;"	d
MX6UL_PAD_CSI_HSYNC__SIM1_PORT1_PD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__SIM1_PORT1_PD	/;"	d
MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS	/;"	d
MX6UL_PAD_CSI_HSYNC__UART6_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__UART6_DTE_RTS	/;"	d
MX6UL_PAD_CSI_HSYNC__USDHC2_CMD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_HSYNC__USDHC2_CMD	/;"	d
MX6UL_PAD_CSI_MCLK__CSI_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__CSI_MCLK	/;"	d
MX6UL_PAD_CSI_MCLK__EIM_CS0_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__EIM_CS0_B	/;"	d
MX6UL_PAD_CSI_MCLK__ESAI_TX3_RX2	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__ESAI_TX3_RX2 /;"	d
MX6UL_PAD_CSI_MCLK__GPIO4_IO17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__GPIO4_IO17	/;"	d
MX6UL_PAD_CSI_MCLK__I2C1_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__I2C1_SDA	/;"	d
MX6UL_PAD_CSI_MCLK__RAWNAND_CE2_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__RAWNAND_CE2_B	/;"	d
MX6UL_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL	/;"	d
MX6UL_PAD_CSI_MCLK__UART6_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__UART6_DCE_TX	/;"	d
MX6UL_PAD_CSI_MCLK__UART6_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__UART6_DTE_RX	/;"	d
MX6UL_PAD_CSI_MCLK__USDHC2_CD_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_MCLK__USDHC2_CD_B	/;"	d
MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK	/;"	d
MX6UL_PAD_CSI_PIXCLK__EIM_OE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__EIM_OE	/;"	d
MX6UL_PAD_CSI_PIXCLK__ESAI_TX2_RX3	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__ESAI_TX2_RX3 /;"	d
MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18	/;"	d
MX6UL_PAD_CSI_PIXCLK__I2C1_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__I2C1_SCL	/;"	d
MX6UL_PAD_CSI_PIXCLK__RAWNAND_CE3_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__RAWNAND_CE3_B	/;"	d
MX6UL_PAD_CSI_PIXCLK__SNVS_HP_VIO_5	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__SNVS_HP_VIO_5	/;"	d
MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX	/;"	d
MX6UL_PAD_CSI_PIXCLK__UART6_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__UART6_DTE_TX	/;"	d
MX6UL_PAD_CSI_PIXCLK__USDHC2_WP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_PIXCLK__USDHC2_WP	/;"	d
MX6UL_PAD_CSI_VSYNC__CSI_VSYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__CSI_VSYNC	/;"	d
MX6UL_PAD_CSI_VSYNC__EIM_RW	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__EIM_RW	/;"	d
MX6UL_PAD_CSI_VSYNC__ESAI_TX4_RX1	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__ESAI_TX4_RX1 /;"	d
MX6UL_PAD_CSI_VSYNC__GPIO4_IO19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__GPIO4_IO19	/;"	d
MX6UL_PAD_CSI_VSYNC__I2C2_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__I2C2_SDA	/;"	d
MX6UL_PAD_CSI_VSYNC__PWM7_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__PWM7_OUT	/;"	d
MX6UL_PAD_CSI_VSYNC__SIM1_PORT1_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__SIM1_PORT1_CLK	/;"	d
MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS	/;"	d
MX6UL_PAD_CSI_VSYNC__UART6_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__UART6_DTE_CTS	/;"	d
MX6UL_PAD_CSI_VSYNC__USDHC2_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_CSI_VSYNC__USDHC2_CLK	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__CSI_DATA16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__CSI_DATA16	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__KPP_ROW00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__KPP_ROW00	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__PWM1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__PWM1_OUT	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__UART4_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__UART4_DCE_RTS	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__UART4_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__UART4_DTE_CTS	/;"	d
MX6UL_PAD_ENET1_RX_DATA0__USDHC1_LCTL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA0__USDHC1_LCTL	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__CSI_DATA17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__CSI_DATA17	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__KPP_COL00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__KPP_COL00	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__PWM2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__PWM2_OUT	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__UART4_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__UART4_DCE_CTS	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__UART4_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__UART4_DTE_RTS	/;"	d
MX6UL_PAD_ENET1_RX_DATA1__USDHC2_LCTL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_DATA1__USDHC2_LCTL	/;"	d
MX6UL_PAD_ENET1_RX_EN__CSI_DATA18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__CSI_DATA18	/;"	d
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	/;"	d
MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX	/;"	d
MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02	/;"	d
MX6UL_PAD_ENET1_RX_EN__KPP_ROW01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__KPP_ROW01	/;"	d
MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS	/;"	d
MX6UL_PAD_ENET1_RX_EN__UART5_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__UART5_DTE_CTS	/;"	d
MX6UL_PAD_ENET1_RX_EN__USDHC1_VSELECT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_EN__USDHC1_VSELECT	/;"	d
MX6UL_PAD_ENET1_RX_ER__CSI_DATA23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__CSI_DATA23	/;"	d
MX6UL_PAD_ENET1_RX_ER__EIM_CRE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__EIM_CRE	/;"	d
MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	/;"	d
MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07	/;"	d
MX6UL_PAD_ENET1_RX_ER__GPT1_CAPTURE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__GPT1_CAPTURE2	/;"	d
MX6UL_PAD_ENET1_RX_ER__KPP_COL03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__KPP_COL03	/;"	d
MX6UL_PAD_ENET1_RX_ER__PWM8_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__PWM8_OUT	/;"	d
MX6UL_PAD_ENET1_RX_ER__UART7_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__UART7_DCE_RTS	/;"	d
MX6UL_PAD_ENET1_RX_ER__UART7_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_RX_ER__UART7_DTE_CTS	/;"	d
MX6UL_PAD_ENET1_TX_CLK__CSI_DATA22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__CSI_DATA22	/;"	d
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	/;"	d
MX6UL_PAD_ENET1_TX_CLK__ENET1_TX_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__ENET1_TX_CLK	/;"	d
MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06	/;"	d
MX6UL_PAD_ENET1_TX_CLK__GPT1_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__GPT1_CLK	/;"	d
MX6UL_PAD_ENET1_TX_CLK__KPP_ROW03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__KPP_ROW03	/;"	d
MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT	/;"	d
MX6UL_PAD_ENET1_TX_CLK__UART7_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__UART7_DCE_CTS	/;"	d
MX6UL_PAD_ENET1_TX_CLK__UART7_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_CLK__UART7_DTE_RTS	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__CSI_DATA19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__CSI_DATA19	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__KPP_COL01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__KPP_COL01	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__UART5_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__UART5_DCE_CTS	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS	/;"	d
MX6UL_PAD_ENET1_TX_DATA0__USDHC2_VSELECT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA0__USDHC2_VSELECT	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__CSI_DATA20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__CSI_DATA20	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__KPP_ROW02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__KPP_ROW02	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__PWM5_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__PWM5_OUT	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__UART6_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__UART6_DCE_CTS	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__UART6_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__UART6_DTE_RTS	/;"	d
MX6UL_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB	/;"	d
MX6UL_PAD_ENET1_TX_EN__CSI_DATA21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__CSI_DATA21	/;"	d
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	/;"	d
MX6UL_PAD_ENET1_TX_EN__ENET2_MDC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__ENET2_MDC	/;"	d
MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05	/;"	d
MX6UL_PAD_ENET1_TX_EN__KPP_COL02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__KPP_COL02	/;"	d
MX6UL_PAD_ENET1_TX_EN__PWM6_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__PWM6_OUT	/;"	d
MX6UL_PAD_ENET1_TX_EN__UART6_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__UART6_DCE_RTS	/;"	d
MX6UL_PAD_ENET1_TX_EN__UART6_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__UART6_DTE_CTS	/;"	d
MX6UL_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__EPDC_SDDO08	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 /;"	d
MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__I2C3_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__I2C3_SCL	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__KPP_ROW04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__KPP_ROW04	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__UART6_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__UART6_DCE_TX	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__UART6_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__UART6_DTE_RX	/;"	d
MX6UL_PAD_ENET2_RX_DATA0__USB_OTG1_PWR	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA0__USB_OTG1_PWR	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__EPDC_SDDO09	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 /;"	d
MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__I2C3_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__I2C3_SDA	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__KPP_COL04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__KPP_COL04	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__SIM1_PORT0_cLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__SIM1_PORT0_cLK	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__UART6_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__UART6_DCE_RX	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__UART6_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__UART6_DTE_TX	/;"	d
MX6UL_PAD_ENET2_RX_DATA1__USB_OTG1_OC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_DATA1__USB_OTG1_OC	/;"	d
MX6UL_PAD_ENET2_RX_EN__EIM_ADDR26	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__EIM_ADDR26	/;"	d
MX6UL_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M	/;"	d
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	/;"	d
MX6UL_PAD_ENET2_RX_EN__EPDC_SDDO10	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__EPDC_SDDO10 /;"	d
MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	/;"	d
MX6UL_PAD_ENET2_RX_EN__I2C4_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__I2C4_SCL	/;"	d
MX6UL_PAD_ENET2_RX_EN__KPP_ROW05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__KPP_ROW05	/;"	d
MX6UL_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B	/;"	d
MX6UL_PAD_ENET2_RX_EN__UART7_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__UART7_DCE_TX	/;"	d
MX6UL_PAD_ENET2_RX_EN__UART7_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_EN__UART7_DTE_RX	/;"	d
MX6UL_PAD_ENET2_RX_ER__ECSPI4_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__ECSPI4_SS0	/;"	d
MX6UL_PAD_ENET2_RX_ER__EIM_ADDR25	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__EIM_ADDR25	/;"	d
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	/;"	d
MX6UL_PAD_ENET2_RX_ER__EPDC_SDDO15	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__EPDC_SDDO15 /;"	d
MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	/;"	d
MX6UL_PAD_ENET2_RX_ER__KPP_COL07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__KPP_COL07	/;"	d
MX6UL_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN	/;"	d
MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS	/;"	d
MX6UL_PAD_ENET2_RX_ER__UART8_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__UART8_DTE_CTS	/;"	d
MX6UL_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY	/;"	d
MX6UL_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID	/;"	d
MX6UL_PAD_ENET2_TX_CLK__ECSPI4_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__ECSPI4_MISO	/;"	d
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	/;"	d
MX6UL_PAD_ENET2_TX_CLK__ENET2_TX_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__ENET2_TX_CLK	/;"	d
MX6UL_PAD_ENET2_TX_CLK__EPDC_SDDO14	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__EPDC_SDDO14 /;"	d
MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14	/;"	d
MX6UL_PAD_ENET2_TX_CLK__KPP_ROW07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__KPP_ROW07	/;"	d
MX6UL_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B	/;"	d
MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS	/;"	d
MX6UL_PAD_ENET2_TX_CLK__UART8_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_CLK__UART8_DTE_RTS	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__EIM_EB_B02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__EIM_EB_B02	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__EPDC_SDDO11	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__EPDC_SDDO11 /;"	d
MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__I2C4_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__I2C4_SDA	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__KPP_COL05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__KPP_COL05	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__UART7_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__UART7_DCE_RX	/;"	d
MX6UL_PAD_ENET2_TX_DATA0__UART7_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA0__UART7_DTE_TX	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__ECSPI4_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__ECSPI4_SCLK	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__EIM_EB_B03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__EIM_EB_B03	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__EPDC_SDDO12	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__EPDC_SDDO12 /;"	d
MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__KPP_ROW06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__KPP_ROW06	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__UART8_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__UART8_DTE_RX	/;"	d
MX6UL_PAD_ENET2_TX_DATA1__USB_OTG2_PWR	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_DATA1__USB_OTG2_PWR	/;"	d
MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI	/;"	d
MX6UL_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN	/;"	d
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	/;"	d
MX6UL_PAD_ENET2_TX_EN__EPDC_SDDO13	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__EPDC_SDDO13 /;"	d
MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	/;"	d
MX6UL_PAD_ENET2_TX_EN__KPP_COL06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__KPP_COL06	/;"	d
MX6UL_PAD_ENET2_TX_EN__SIM2_PORT0_cLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__SIM2_PORT0_cLK	/;"	d
MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX	/;"	d
MX6UL_PAD_ENET2_TX_EN__UART8_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__UART8_DTE_TX	/;"	d
MX6UL_PAD_ENET2_TX_EN__USB_OTG2_OC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_ENET2_TX_EN__USB_OTG2_OC	/;"	d
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	/;"	d
MX6UL_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN	/;"	d
MX6UL_PAD_GPIO1_IO00__ENET1_REF_CLK1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__ENET1_REF_CLK1	/;"	d
MX6UL_PAD_GPIO1_IO00__GPIO1_IO00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__GPIO1_IO00	/;"	d
MX6UL_PAD_GPIO1_IO00__GPT1_CAPTURE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__GPT1_CAPTURE1	/;"	d
MX6UL_PAD_GPIO1_IO00__I2C2_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__I2C2_SCL	/;"	d
MX6UL_PAD_GPIO1_IO00__MQS_RIGHT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__MQS_RIGHT	/;"	d
MX6UL_PAD_GPIO1_IO00__SRC_SYSTEM_RESET	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__SRC_SYSTEM_RESET	/;"	d
MX6UL_PAD_GPIO1_IO00__WDOG3_WDOG_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO00__WDOG3_WDOG_B	/;"	d
MX6UL_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT	/;"	d
MX6UL_PAD_GPIO1_IO01__ENET2_REF_CLK2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__ENET2_REF_CLK2	/;"	d
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	/;"	d
MX6UL_PAD_GPIO1_IO01__GPT1_COMPARE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__GPT1_COMPARE1	/;"	d
MX6UL_PAD_GPIO1_IO01__I2C2_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__I2C2_SDA	/;"	d
MX6UL_PAD_GPIO1_IO01__MQS_LEFT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__MQS_LEFT	/;"	d
MX6UL_PAD_GPIO1_IO01__SRC_EARLY_RESET	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__SRC_EARLY_RESET	/;"	d
MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC	/;"	d
MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B	/;"	d
MX6UL_PAD_GPIO1_IO02__ENET1_REF_CLK_25M	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__ENET1_REF_CLK_25M	/;"	d
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	/;"	d
MX6UL_PAD_GPIO1_IO02__GPT1_COMPARE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__GPT1_COMPARE2	/;"	d
MX6UL_PAD_GPIO1_IO02__I2C1_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__I2C1_SCL	/;"	d
MX6UL_PAD_GPIO1_IO02__SDMA_EXT_EVENT00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__SDMA_EXT_EVENT00	/;"	d
MX6UL_PAD_GPIO1_IO02__SRC_ANY_PU_RESET	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__SRC_ANY_PU_RESET	/;"	d
MX6UL_PAD_GPIO1_IO02__UART1_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__UART1_DCE_TX	/;"	d
MX6UL_PAD_GPIO1_IO02__UART1_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__UART1_DTE_RX	/;"	d
MX6UL_PAD_GPIO1_IO02__USB_OTG2_PWR	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__USB_OTG2_PWR	/;"	d
MX6UL_PAD_GPIO1_IO02__USDHC1_WP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO02__USDHC1_WP	/;"	d
MX6UL_PAD_GPIO1_IO03__CCM_DI0_eXT_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__CCM_DI0_eXT_CLK	/;"	d
MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	/;"	d
MX6UL_PAD_GPIO1_IO03__GPT1_COMPARE3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__GPT1_COMPARE3	/;"	d
MX6UL_PAD_GPIO1_IO03__I2C1_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__I2C1_SDA	/;"	d
MX6UL_PAD_GPIO1_IO03__SRC_TESTER_ACK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__SRC_TESTER_ACK	/;"	d
MX6UL_PAD_GPIO1_IO03__UART1_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__UART1_DCE_RX	/;"	d
MX6UL_PAD_GPIO1_IO03__UART1_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__UART1_DTE_TX	/;"	d
MX6UL_PAD_GPIO1_IO03__USB_OTG2_OC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__USB_OTG2_OC	/;"	d
MX6UL_PAD_GPIO1_IO03__USDHC1_CD_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO03__USDHC1_CD_B	/;"	d
MX6UL_PAD_GPIO1_IO04__ENET1_REF_CLK1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__ENET1_REF_CLK1	/;"	d
MX6UL_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN	/;"	d
MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	/;"	d
MX6UL_PAD_GPIO1_IO04__PWM3_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__PWM3_OUT	/;"	d
MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX	/;"	d
MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX	/;"	d
MX6UL_PAD_GPIO1_IO04__USB_OTG1_PWR	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__USB_OTG1_PWR	/;"	d
MX6UL_PAD_GPIO1_IO04__USDHC1_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO04__USDHC1_RESET_B	/;"	d
MX6UL_PAD_GPIO1_IO05__ANATOP_OTG2_ID	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__ANATOP_OTG2_ID	/;"	d
MX6UL_PAD_GPIO1_IO05__CSI_FIELD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__CSI_FIELD	/;"	d
MX6UL_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT	/;"	d
MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2	/;"	d
MX6UL_PAD_GPIO1_IO05__GPIO1_IO05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__GPIO1_IO05	/;"	d
MX6UL_PAD_GPIO1_IO05__PWM4_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__PWM4_OUT	/;"	d
MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX	/;"	d
MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX	/;"	d
MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT	/;"	d
MX6UL_PAD_GPIO1_IO06__CCM_REF_EN_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__CCM_REF_EN_B	/;"	d
MX6UL_PAD_GPIO1_IO06__CCM_WAIT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__CCM_WAIT	/;"	d
MX6UL_PAD_GPIO1_IO06__CSI_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__CSI_MCLK	/;"	d
MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	/;"	d
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	/;"	d
MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	/;"	d
MX6UL_PAD_GPIO1_IO06__UART1_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__UART1_DCE_CTS	/;"	d
MX6UL_PAD_GPIO1_IO06__UART1_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__UART1_DTE_RTS	/;"	d
MX6UL_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE	/;"	d
MX6UL_PAD_GPIO1_IO06__USDHC2_WP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO06__USDHC2_WP	/;"	d
MX6UL_PAD_GPIO1_IO07__CCM_STOP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__CCM_STOP	/;"	d
MX6UL_PAD_GPIO1_IO07__CSI_PIXCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__CSI_PIXCLK	/;"	d
MX6UL_PAD_GPIO1_IO07__ENET1_MDC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__ENET1_MDC	/;"	d
MX6UL_PAD_GPIO1_IO07__ENET2_MDC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__ENET2_MDC	/;"	d
MX6UL_PAD_GPIO1_IO07__GPIO1_IO07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__GPIO1_IO07	/;"	d
MX6UL_PAD_GPIO1_IO07__UART1_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__UART1_DCE_RTS	/;"	d
MX6UL_PAD_GPIO1_IO07__UART1_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__UART1_DTE_CTS	/;"	d
MX6UL_PAD_GPIO1_IO07__USB_OTG_HOST_MODE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__USB_OTG_HOST_MODE	/;"	d
MX6UL_PAD_GPIO1_IO07__USDHC2_CD_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO07__USDHC2_CD_B	/;"	d
MX6UL_PAD_GPIO1_IO08__CCM_PMIC_RDY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__CCM_PMIC_RDY	/;"	d
MX6UL_PAD_GPIO1_IO08__CSI_VSYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__CSI_VSYNC	/;"	d
MX6UL_PAD_GPIO1_IO08__GPIO1_IO08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__GPIO1_IO08	/;"	d
MX6UL_PAD_GPIO1_IO08__PWM1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__PWM1_OUT	/;"	d
MX6UL_PAD_GPIO1_IO08__SPDIF_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__SPDIF_OUT	/;"	d
MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS	/;"	d
MX6UL_PAD_GPIO1_IO08__UART5_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__UART5_DTE_CTS	/;"	d
MX6UL_PAD_GPIO1_IO08__USDHC2_VSELECT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__USDHC2_VSELECT	/;"	d
MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B	/;"	d
MX6UL_PAD_GPIO1_IO09__CSI_HSYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__CSI_HSYNC	/;"	d
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__GPIO1_IO09	/;"	d
MX6UL_PAD_GPIO1_IO09__PWM2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__PWM2_OUT	/;"	d
MX6UL_PAD_GPIO1_IO09__SPDIF_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__SPDIF_IN	/;"	d
MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS	/;"	d
MX6UL_PAD_GPIO1_IO09__UART5_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__UART5_DTE_RTS	/;"	d
MX6UL_PAD_GPIO1_IO09__USDHC1_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__USDHC1_RESET_B	/;"	d
MX6UL_PAD_GPIO1_IO09__USDHC2_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__USDHC2_RESET_B	/;"	d
MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY	/;"	d
MX6UL_PAD_JTAG_MOD__CCM_PMIC_RDY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__CCM_PMIC_RDY	/;"	d
MX6UL_PAD_JTAG_MOD__ENET1_REF_CLK_25M	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__ENET1_REF_CLK_25M	/;"	d
MX6UL_PAD_JTAG_MOD__GPIO1_IO10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__GPIO1_IO10	/;"	d
MX6UL_PAD_JTAG_MOD__GPT2_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__GPT2_CLK	/;"	d
MX6UL_PAD_JTAG_MOD__SDMA_EXT_EVENT00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__SDMA_EXT_EVENT00	/;"	d
MX6UL_PAD_JTAG_MOD__SJC_MOD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__SJC_MOD	/;"	d
MX6UL_PAD_JTAG_MOD__SPDIF_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_MOD__SPDIF_OUT	/;"	d
MX6UL_PAD_JTAG_TCK__GPIO1_IO14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TCK__GPIO1_IO14	/;"	d
MX6UL_PAD_JTAG_TCK__GPT2_COMPARE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TCK__GPT2_COMPARE2	/;"	d
MX6UL_PAD_JTAG_TCK__PWM7_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TCK__PWM7_OUT	/;"	d
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	/;"	d
MX6UL_PAD_JTAG_TCK__SIM2_POWER_FAIL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TCK__SIM2_POWER_FAIL	/;"	d
MX6UL_PAD_JTAG_TCK__SJC_TCK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TCK__SJC_TCK	/;"	d
MX6UL_PAD_JTAG_TDI__GPIO1_IO13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__GPIO1_IO13	/;"	d
MX6UL_PAD_JTAG_TDI__GPT2_COMPARE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__GPT2_COMPARE1	/;"	d
MX6UL_PAD_JTAG_TDI__MQS_LEFT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__MQS_LEFT	/;"	d
MX6UL_PAD_JTAG_TDI__PWM6_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__PWM6_OUT	/;"	d
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	/;"	d
MX6UL_PAD_JTAG_TDI__SIM1_POWER_FAIL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__SIM1_POWER_FAIL	/;"	d
MX6UL_PAD_JTAG_TDI__SJC_TDI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDI__SJC_TDI	/;"	d
MX6UL_PAD_JTAG_TDO__CCM_CLKO2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__CCM_CLKO2	/;"	d
MX6UL_PAD_JTAG_TDO__CCM_STOP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__CCM_STOP	/;"	d
MX6UL_PAD_JTAG_TDO__EPIT2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__EPIT2_OUT	/;"	d
MX6UL_PAD_JTAG_TDO__GPIO1_IO12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__GPIO1_IO12	/;"	d
MX6UL_PAD_JTAG_TDO__GPT2_CAPTURE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__GPT2_CAPTURE2	/;"	d
MX6UL_PAD_JTAG_TDO__MQS_RIGHT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__MQS_RIGHT	/;"	d
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	/;"	d
MX6UL_PAD_JTAG_TDO__SJC_TDO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TDO__SJC_TDO	/;"	d
MX6UL_PAD_JTAG_TMS__CCM_CLKO1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__CCM_CLKO1	/;"	d
MX6UL_PAD_JTAG_TMS__CCM_WAIT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__CCM_WAIT	/;"	d
MX6UL_PAD_JTAG_TMS__EPIT1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__EPIT1_OUT	/;"	d
MX6UL_PAD_JTAG_TMS__GPIO1_IO11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__GPIO1_IO11	/;"	d
MX6UL_PAD_JTAG_TMS__GPT2_CAPTURE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__GPT2_CAPTURE1	/;"	d
MX6UL_PAD_JTAG_TMS__SAI2_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__SAI2_MCLK	/;"	d
MX6UL_PAD_JTAG_TMS__SDMA_EXT_EVENT01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__SDMA_EXT_EVENT01	/;"	d
MX6UL_PAD_JTAG_TMS__SJC_TMS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TMS__SJC_TMS	/;"	d
MX6UL_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS	/;"	d
MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15	/;"	d
MX6UL_PAD_JTAG_TRST_B__GPT2_COMPARE3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TRST_B__GPT2_COMPARE3	/;"	d
MX6UL_PAD_JTAG_TRST_B__PWM8_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TRST_B__PWM8_OUT	/;"	d
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	/;"	d
MX6UL_PAD_JTAG_TRST_B__SJC_TRSTB	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_JTAG_TRST_B__SJC_TRSTB	/;"	d
MX6UL_PAD_LCD_CLK__EIM_CS2_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__EIM_CS2_B	/;"	d
MX6UL_PAD_LCD_CLK__EPDC_SDCLK	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__EPDC_SDCLK /;"	d
MX6UL_PAD_LCD_CLK__GPIO3_IO00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__GPIO3_IO00	/;"	d
MX6UL_PAD_LCD_CLK__LCDIF_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__LCDIF_CLK	/;"	d
MX6UL_PAD_LCD_CLK__LCDIF_WR_RWN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__LCDIF_WR_RWN	/;"	d
MX6UL_PAD_LCD_CLK__SAI3_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__SAI3_MCLK	/;"	d
MX6UL_PAD_LCD_CLK__UART4_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__UART4_DCE_TX	/;"	d
MX6UL_PAD_LCD_CLK__UART4_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__UART4_DTE_RX	/;"	d
MX6UL_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB	/;"	d
MX6UL_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN	/;"	d
MX6UL_PAD_LCD_DATA00__EPDC_SDDO00	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__EPDC_SDDO00 /;"	d
MX6UL_PAD_LCD_DATA00__GPIO3_IO05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__GPIO3_IO05	/;"	d
MX6UL_PAD_LCD_DATA00__I2C3_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__I2C3_SDA	/;"	d
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	/;"	d
MX6UL_PAD_LCD_DATA00__PWM1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__PWM1_OUT	/;"	d
MX6UL_PAD_LCD_DATA00__SAI1_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__SAI1_MCLK	/;"	d
MX6UL_PAD_LCD_DATA00__SRC_BT_CFG00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA00__SRC_BT_CFG00	/;"	d
MX6UL_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT	/;"	d
MX6UL_PAD_LCD_DATA01__EPDC_SDDO01	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__EPDC_SDDO01 /;"	d
MX6UL_PAD_LCD_DATA01__GPIO3_IO06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__GPIO3_IO06	/;"	d
MX6UL_PAD_LCD_DATA01__I2C3_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__I2C3_SCL	/;"	d
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	/;"	d
MX6UL_PAD_LCD_DATA01__PWM2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__PWM2_OUT	/;"	d
MX6UL_PAD_LCD_DATA01__SAI1_TX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__SAI1_TX_SYNC	/;"	d
MX6UL_PAD_LCD_DATA01__SRC_BT_CFG01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA01__SRC_BT_CFG01	/;"	d
MX6UL_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN	/;"	d
MX6UL_PAD_LCD_DATA02__EPDC_SDDO02	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__EPDC_SDDO02 /;"	d
MX6UL_PAD_LCD_DATA02__GPIO3_IO07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__GPIO3_IO07	/;"	d
MX6UL_PAD_LCD_DATA02__I2C4_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__I2C4_SDA	/;"	d
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	/;"	d
MX6UL_PAD_LCD_DATA02__PWM3_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__PWM3_OUT	/;"	d
MX6UL_PAD_LCD_DATA02__SAI1_TX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__SAI1_TX_BCLK	/;"	d
MX6UL_PAD_LCD_DATA02__SRC_BT_CFG02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA02__SRC_BT_CFG02	/;"	d
MX6UL_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT	/;"	d
MX6UL_PAD_LCD_DATA03__EPDC_SDDO03	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__EPDC_SDDO03 /;"	d
MX6UL_PAD_LCD_DATA03__GPIO3_IO08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__GPIO3_IO08	/;"	d
MX6UL_PAD_LCD_DATA03__I2C4_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__I2C4_SCL	/;"	d
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	/;"	d
MX6UL_PAD_LCD_DATA03__PWM4_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__PWM4_OUT	/;"	d
MX6UL_PAD_LCD_DATA03__SAI1_RX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__SAI1_RX_DATA	/;"	d
MX6UL_PAD_LCD_DATA03__SRC_BT_CFG03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA03__SRC_BT_CFG03	/;"	d
MX6UL_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN	/;"	d
MX6UL_PAD_LCD_DATA04__EPDC_SDDO04	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__EPDC_SDDO04 /;"	d
MX6UL_PAD_LCD_DATA04__GPIO3_IO09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__GPIO3_IO09	/;"	d
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	/;"	d
MX6UL_PAD_LCD_DATA04__SAI1_TX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__SAI1_TX_DATA	/;"	d
MX6UL_PAD_LCD_DATA04__SPDIF_SR_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__SPDIF_SR_CLK	/;"	d
MX6UL_PAD_LCD_DATA04__SRC_BT_CFG04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__SRC_BT_CFG04	/;"	d
MX6UL_PAD_LCD_DATA04__UART8_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__UART8_DCE_CTS	/;"	d
MX6UL_PAD_LCD_DATA04__UART8_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA04__UART8_DTE_RTS	/;"	d
MX6UL_PAD_LCD_DATA05__ECSPI1_SS1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__ECSPI1_SS1	/;"	d
MX6UL_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT	/;"	d
MX6UL_PAD_LCD_DATA05__EPDC_SDDO05	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__EPDC_SDDO05 /;"	d
MX6UL_PAD_LCD_DATA05__GPIO3_IO10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__GPIO3_IO10	/;"	d
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	/;"	d
MX6UL_PAD_LCD_DATA05__SPDIF_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__SPDIF_OUT	/;"	d
MX6UL_PAD_LCD_DATA05__SRC_BT_CFG05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__SRC_BT_CFG05	/;"	d
MX6UL_PAD_LCD_DATA05__UART8_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__UART8_DCE_RTS	/;"	d
MX6UL_PAD_LCD_DATA05__UART8_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA05__UART8_DTE_CTS	/;"	d
MX6UL_PAD_LCD_DATA06__ECSPI1_SS2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__ECSPI1_SS2	/;"	d
MX6UL_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN	/;"	d
MX6UL_PAD_LCD_DATA06__EPDC_SDDO06	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__EPDC_SDDO06 /;"	d
MX6UL_PAD_LCD_DATA06__GPIO3_IO11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__GPIO3_IO11	/;"	d
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	/;"	d
MX6UL_PAD_LCD_DATA06__SPDIF_LOCK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__SPDIF_LOCK	/;"	d
MX6UL_PAD_LCD_DATA06__SRC_BT_CFG06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__SRC_BT_CFG06	/;"	d
MX6UL_PAD_LCD_DATA06__UART7_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__UART7_DCE_CTS	/;"	d
MX6UL_PAD_LCD_DATA06__UART7_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA06__UART7_DTE_RTS	/;"	d
MX6UL_PAD_LCD_DATA07__ECSPI1_SS3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__ECSPI1_SS3	/;"	d
MX6UL_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT	/;"	d
MX6UL_PAD_LCD_DATA07__EPDC_SDDO07	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__EPDC_SDDO07 /;"	d
MX6UL_PAD_LCD_DATA07__GPIO3_IO12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__GPIO3_IO12	/;"	d
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	/;"	d
MX6UL_PAD_LCD_DATA07__SPDIF_EXT_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__SPDIF_EXT_CLK	/;"	d
MX6UL_PAD_LCD_DATA07__SRC_BT_CFG07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__SRC_BT_CFG07	/;"	d
MX6UL_PAD_LCD_DATA07__UART7_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__UART7_DCE_RTS	/;"	d
MX6UL_PAD_LCD_DATA07__UART7_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA07__UART7_DTE_CTS	/;"	d
MX6UL_PAD_LCD_DATA08__CSI_DATA16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__CSI_DATA16	/;"	d
MX6UL_PAD_LCD_DATA08__EIM_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__EIM_DATA00	/;"	d
MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX	/;"	d
MX6UL_PAD_LCD_DATA08__GPIO3_IO13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__GPIO3_IO13	/;"	d
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	/;"	d
MX6UL_PAD_LCD_DATA08__SPDIF_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__SPDIF_IN	/;"	d
MX6UL_PAD_LCD_DATA08__SRC_BT_CFG08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA08__SRC_BT_CFG08	/;"	d
MX6UL_PAD_LCD_DATA09__CSI_DATA17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__CSI_DATA17	/;"	d
MX6UL_PAD_LCD_DATA09__EIM_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__EIM_DATA01	/;"	d
MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX	/;"	d
MX6UL_PAD_LCD_DATA09__GPIO3_IO14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__GPIO3_IO14	/;"	d
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	/;"	d
MX6UL_PAD_LCD_DATA09__SAI3_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__SAI3_MCLK	/;"	d
MX6UL_PAD_LCD_DATA09__SRC_BT_CFG09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA09__SRC_BT_CFG09	/;"	d
MX6UL_PAD_LCD_DATA10__CSI_DATA18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__CSI_DATA18	/;"	d
MX6UL_PAD_LCD_DATA10__EIM_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__EIM_DATA02	/;"	d
MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX	/;"	d
MX6UL_PAD_LCD_DATA10__GPIO3_IO15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__GPIO3_IO15	/;"	d
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	/;"	d
MX6UL_PAD_LCD_DATA10__SAI3_RX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__SAI3_RX_SYNC	/;"	d
MX6UL_PAD_LCD_DATA10__SRC_BT_CFG10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA10__SRC_BT_CFG10	/;"	d
MX6UL_PAD_LCD_DATA11__CSI_DATA19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__CSI_DATA19	/;"	d
MX6UL_PAD_LCD_DATA11__EIM_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__EIM_DATA03	/;"	d
MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX	/;"	d
MX6UL_PAD_LCD_DATA11__GPIO3_IO16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__GPIO3_IO16	/;"	d
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	/;"	d
MX6UL_PAD_LCD_DATA11__SAI3_RX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__SAI3_RX_BCLK	/;"	d
MX6UL_PAD_LCD_DATA11__SRC_BT_CFG11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA11__SRC_BT_CFG11	/;"	d
MX6UL_PAD_LCD_DATA12__CSI_DATA20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__CSI_DATA20	/;"	d
MX6UL_PAD_LCD_DATA12__ECSPI1_RDY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__ECSPI1_RDY	/;"	d
MX6UL_PAD_LCD_DATA12__EIM_DATA04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__EIM_DATA04	/;"	d
MX6UL_PAD_LCD_DATA12__GPIO3_IO17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__GPIO3_IO17	/;"	d
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	/;"	d
MX6UL_PAD_LCD_DATA12__SAI3_TX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__SAI3_TX_SYNC	/;"	d
MX6UL_PAD_LCD_DATA12__SRC_BT_CFG12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA12__SRC_BT_CFG12	/;"	d
MX6UL_PAD_LCD_DATA13__CSI_DATA21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__CSI_DATA21	/;"	d
MX6UL_PAD_LCD_DATA13__EIM_DATA05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__EIM_DATA05	/;"	d
MX6UL_PAD_LCD_DATA13__GPIO3_IO18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__GPIO3_IO18	/;"	d
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	/;"	d
MX6UL_PAD_LCD_DATA13__SAI3_TX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__SAI3_TX_BCLK	/;"	d
MX6UL_PAD_LCD_DATA13__SRC_BT_CFG13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__SRC_BT_CFG13	/;"	d
MX6UL_PAD_LCD_DATA13__USDHC2_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA13__USDHC2_RESET_B	/;"	d
MX6UL_PAD_LCD_DATA14__CSI_DATA22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__CSI_DATA22	/;"	d
MX6UL_PAD_LCD_DATA14__EIM_DATA06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__EIM_DATA06	/;"	d
MX6UL_PAD_LCD_DATA14__EPDC_SDSHR	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__EPDC_SDSHR /;"	d
MX6UL_PAD_LCD_DATA14__GPIO3_IO19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__GPIO3_IO19	/;"	d
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	/;"	d
MX6UL_PAD_LCD_DATA14__SAI3_RX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__SAI3_RX_DATA	/;"	d
MX6UL_PAD_LCD_DATA14__SRC_BT_CFG14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__SRC_BT_CFG14	/;"	d
MX6UL_PAD_LCD_DATA14__USDHC2_DATA4	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA14__USDHC2_DATA4	/;"	d
MX6UL_PAD_LCD_DATA15__CSI_DATA23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__CSI_DATA23	/;"	d
MX6UL_PAD_LCD_DATA15__EIM_DATA07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__EIM_DATA07	/;"	d
MX6UL_PAD_LCD_DATA15__EPDC_GDRL	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__EPDC_GDRL /;"	d
MX6UL_PAD_LCD_DATA15__GPIO3_IO20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__GPIO3_IO20	/;"	d
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	/;"	d
MX6UL_PAD_LCD_DATA15__SAI3_TX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__SAI3_TX_DATA	/;"	d
MX6UL_PAD_LCD_DATA15__SRC_BT_CFG15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__SRC_BT_CFG15	/;"	d
MX6UL_PAD_LCD_DATA15__USDHC2_DATA5	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA15__USDHC2_DATA5	/;"	d
MX6UL_PAD_LCD_DATA16__CSI_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__CSI_DATA01	/;"	d
MX6UL_PAD_LCD_DATA16__EIM_DATA08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__EIM_DATA08	/;"	d
MX6UL_PAD_LCD_DATA16__EPDC_GDCLK	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__EPDC_GDCLK /;"	d
MX6UL_PAD_LCD_DATA16__GPIO3_IO21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__GPIO3_IO21	/;"	d
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__LCDIF_DATA16	/;"	d
MX6UL_PAD_LCD_DATA16__SRC_BT_CFG24	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__SRC_BT_CFG24	/;"	d
MX6UL_PAD_LCD_DATA16__UART7_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__UART7_DCE_TX	/;"	d
MX6UL_PAD_LCD_DATA16__UART7_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__UART7_DTE_RX	/;"	d
MX6UL_PAD_LCD_DATA16__USDHC2_DATA6	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA16__USDHC2_DATA6	/;"	d
MX6UL_PAD_LCD_DATA17__CSI_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__CSI_DATA00	/;"	d
MX6UL_PAD_LCD_DATA17__EIM_DATA09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__EIM_DATA09	/;"	d
MX6UL_PAD_LCD_DATA17__EPDC_GDSP	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__EPDC_GDSP /;"	d
MX6UL_PAD_LCD_DATA17__GPIO3_IO22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__GPIO3_IO22	/;"	d
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__LCDIF_DATA17	/;"	d
MX6UL_PAD_LCD_DATA17__SRC_BT_CFG25	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__SRC_BT_CFG25	/;"	d
MX6UL_PAD_LCD_DATA17__UART7_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__UART7_DCE_RX	/;"	d
MX6UL_PAD_LCD_DATA17__UART7_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__UART7_DTE_TX	/;"	d
MX6UL_PAD_LCD_DATA17__USDHC2_DATA7	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA17__USDHC2_DATA7	/;"	d
MX6UL_PAD_LCD_DATA18__CA7_MX6UL_EVENTO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__CA7_MX6UL_EVENTO	/;"	d
MX6UL_PAD_LCD_DATA18__CSI_DATA10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__CSI_DATA10	/;"	d
MX6UL_PAD_LCD_DATA18__EIM_DATA10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__EIM_DATA10	/;"	d
MX6UL_PAD_LCD_DATA18__GPIO3_IO23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__GPIO3_IO23	/;"	d
MX6UL_PAD_LCD_DATA18__LCDIF_DATA18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__LCDIF_DATA18	/;"	d
MX6UL_PAD_LCD_DATA18__PWM5_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__PWM5_OUT	/;"	d
MX6UL_PAD_LCD_DATA18__SRC_BT_CFG26	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__SRC_BT_CFG26	/;"	d
MX6UL_PAD_LCD_DATA18__USDHC2_CMD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA18__USDHC2_CMD	/;"	d
MX6UL_PAD_LCD_DATA19__CSI_DATA11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__CSI_DATA11	/;"	d
MX6UL_PAD_LCD_DATA19__EIM_DATA11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__EIM_DATA11	/;"	d
MX6UL_PAD_LCD_DATA19__GPIO3_IO24	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__GPIO3_IO24	/;"	d
MX6UL_PAD_LCD_DATA19__LCDIF_DATA19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__LCDIF_DATA19	/;"	d
MX6UL_PAD_LCD_DATA19__PWM6_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__PWM6_OUT	/;"	d
MX6UL_PAD_LCD_DATA19__SRC_BT_CFG27	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__SRC_BT_CFG27	/;"	d
MX6UL_PAD_LCD_DATA19__USDHC2_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__USDHC2_CLK	/;"	d
MX6UL_PAD_LCD_DATA19__WDOG1_WDOG_ANY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA19__WDOG1_WDOG_ANY	/;"	d
MX6UL_PAD_LCD_DATA20__CSI_DATA12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__CSI_DATA12	/;"	d
MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	/;"	d
MX6UL_PAD_LCD_DATA20__EIM_DATA12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__EIM_DATA12	/;"	d
MX6UL_PAD_LCD_DATA20__GPIO3_IO25	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__GPIO3_IO25	/;"	d
MX6UL_PAD_LCD_DATA20__LCDIF_DATA20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__LCDIF_DATA20	/;"	d
MX6UL_PAD_LCD_DATA20__SRC_BT_CFG28	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__SRC_BT_CFG28	/;"	d
MX6UL_PAD_LCD_DATA20__UART8_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__UART8_DCE_TX	/;"	d
MX6UL_PAD_LCD_DATA20__UART8_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__UART8_DTE_RX	/;"	d
MX6UL_PAD_LCD_DATA20__USDHC2_DATA0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA20__USDHC2_DATA0	/;"	d
MX6UL_PAD_LCD_DATA21__CSI_DATA13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__CSI_DATA13	/;"	d
MX6UL_PAD_LCD_DATA21__ECSPI1_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__ECSPI1_SS0	/;"	d
MX6UL_PAD_LCD_DATA21__EIM_DATA13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__EIM_DATA13	/;"	d
MX6UL_PAD_LCD_DATA21__EPDC_SDCE1	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__EPDC_SDCE1 /;"	d
MX6UL_PAD_LCD_DATA21__GPIO3_IO26	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__GPIO3_IO26	/;"	d
MX6UL_PAD_LCD_DATA21__LCDIF_DATA21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__LCDIF_DATA21	/;"	d
MX6UL_PAD_LCD_DATA21__SRC_BT_CFG29	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__SRC_BT_CFG29	/;"	d
MX6UL_PAD_LCD_DATA21__UART8_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__UART8_DCE_RX	/;"	d
MX6UL_PAD_LCD_DATA21__UART8_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__UART8_DTE_TX	/;"	d
MX6UL_PAD_LCD_DATA21__USDHC2_DATA1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA21__USDHC2_DATA1	/;"	d
MX6UL_PAD_LCD_DATA22__CSI_DATA14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__CSI_DATA14	/;"	d
MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	/;"	d
MX6UL_PAD_LCD_DATA22__EIM_DATA14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__EIM_DATA14	/;"	d
MX6UL_PAD_LCD_DATA22__GPIO3_IO27	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__GPIO3_IO27	/;"	d
MX6UL_PAD_LCD_DATA22__LCDIF_DATA22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__LCDIF_DATA22	/;"	d
MX6UL_PAD_LCD_DATA22__MQS_RIGHT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__MQS_RIGHT	/;"	d
MX6UL_PAD_LCD_DATA22__SRC_BT_CFG30	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__SRC_BT_CFG30	/;"	d
MX6UL_PAD_LCD_DATA22__USDHC2_DATA2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA22__USDHC2_DATA2	/;"	d
MX6UL_PAD_LCD_DATA23__CSI_DATA15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__CSI_DATA15	/;"	d
MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	/;"	d
MX6UL_PAD_LCD_DATA23__EIM_DATA15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__EIM_DATA15	/;"	d
MX6UL_PAD_LCD_DATA23__GPIO3_IO28	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__GPIO3_IO28	/;"	d
MX6UL_PAD_LCD_DATA23__LCDIF_DATA23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__LCDIF_DATA23	/;"	d
MX6UL_PAD_LCD_DATA23__MQS_LEFT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__MQS_LEFT	/;"	d
MX6UL_PAD_LCD_DATA23__SRC_BT_CFG31	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__SRC_BT_CFG31	/;"	d
MX6UL_PAD_LCD_DATA23__USDHC2_DATA3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_DATA23__USDHC2_DATA3	/;"	d
MX6UL_PAD_LCD_ENABLE__ECSPI2_RDY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__ECSPI2_RDY	/;"	d
MX6UL_PAD_LCD_ENABLE__EIM_CS3_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__EIM_CS3_B	/;"	d
MX6UL_PAD_LCD_ENABLE__EPDC_SDLE	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__EPDC_SDLE /;"	d
MX6UL_PAD_LCD_ENABLE__GPIO3_IO01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__GPIO3_IO01	/;"	d
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	/;"	d
MX6UL_PAD_LCD_ENABLE__LCDIF_RD_E	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__LCDIF_RD_E	/;"	d
MX6UL_PAD_LCD_ENABLE__SAI3_TX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__SAI3_TX_SYNC	/;"	d
MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX	/;"	d
MX6UL_PAD_LCD_ENABLE__UART4_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_ENABLE__UART4_DTE_TX	/;"	d
MX6UL_PAD_LCD_HSYNC__ECSPI2_SS1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__ECSPI2_SS1	/;"	d
MX6UL_PAD_LCD_HSYNC__EPDC_SDOE	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__EPDC_SDOE /;"	d
MX6UL_PAD_LCD_HSYNC__GPIO3_IO02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__GPIO3_IO02	/;"	d
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	/;"	d
MX6UL_PAD_LCD_HSYNC__LCDIF_RS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__LCDIF_RS	/;"	d
MX6UL_PAD_LCD_HSYNC__SAI3_TX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__SAI3_TX_BCLK	/;"	d
MX6UL_PAD_LCD_HSYNC__UART4_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__UART4_DCE_CTS	/;"	d
MX6UL_PAD_LCD_HSYNC__UART4_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__UART4_DTE_RTS	/;"	d
MX6UL_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB	/;"	d
MX6UL_PAD_LCD_RESET__CA7_MX6UL_EVENTI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__CA7_MX6UL_EVENTI	/;"	d
MX6UL_PAD_LCD_RESET__ECSPI2_SS3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__ECSPI2_SS3	/;"	d
MX6UL_PAD_LCD_RESET__EPDC_GDOE	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__EPDC_GDOE /;"	d
MX6UL_PAD_LCD_RESET__GPIO3_IO04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__GPIO3_IO04	/;"	d
MX6UL_PAD_LCD_RESET__LCDIF_CS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__LCDIF_CS	/;"	d
MX6UL_PAD_LCD_RESET__LCDIF_RESET	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__LCDIF_RESET	/;"	d
MX6UL_PAD_LCD_RESET__SAI3_TX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__SAI3_TX_DATA	/;"	d
MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY	/;"	d
MX6UL_PAD_LCD_VSYNC__ECSPI2_SS2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__ECSPI2_SS2	/;"	d
MX6UL_PAD_LCD_VSYNC__EPDC_SDCE0	arch/arm/dts/imx6ull-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__EPDC_SDCE0 /;"	d
MX6UL_PAD_LCD_VSYNC__GPIO3_IO03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__GPIO3_IO03	/;"	d
MX6UL_PAD_LCD_VSYNC__LCDIF_BUSY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__LCDIF_BUSY	/;"	d
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	/;"	d
MX6UL_PAD_LCD_VSYNC__SAI3_RX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__SAI3_RX_DATA	/;"	d
MX6UL_PAD_LCD_VSYNC__UART4_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__UART4_DCE_RTS	/;"	d
MX6UL_PAD_LCD_VSYNC__UART4_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__UART4_DTE_CTS	/;"	d
MX6UL_PAD_LCD_VSYNC__WDOG2_WDOG_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_LCD_VSYNC__WDOG2_WDOG_B	/;"	d
MX6UL_PAD_NAND_ALE__ECSPI3_SS1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__ECSPI3_SS1	/;"	d
MX6UL_PAD_NAND_ALE__EIM_ADDR17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__EIM_ADDR17	/;"	d
MX6UL_PAD_NAND_ALE__GPIO4_IO10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__GPIO4_IO10	/;"	d
MX6UL_PAD_NAND_ALE__PWM3_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__PWM3_OUT	/;"	d
MX6UL_PAD_NAND_ALE__QSPI_A_DQS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__QSPI_A_DQS	/;"	d
MX6UL_PAD_NAND_ALE__RAWNAND_ALE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__RAWNAND_ALE	/;"	d
MX6UL_PAD_NAND_ALE__USDHC2_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_ALE__USDHC2_RESET_B	/;"	d
MX6UL_PAD_NAND_CE0_B__ECSPI3_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__ECSPI3_SCLK	/;"	d
MX6UL_PAD_NAND_CE0_B__EIM_DTACK_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__EIM_DTACK_B	/;"	d
MX6UL_PAD_NAND_CE0_B__GPIO4_IO13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__GPIO4_IO13	/;"	d
MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01	/;"	d
MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B	/;"	d
MX6UL_PAD_NAND_CE0_B__UART3_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__UART3_DCE_RX	/;"	d
MX6UL_PAD_NAND_CE0_B__UART3_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__UART3_DTE_TX	/;"	d
MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5	/;"	d
MX6UL_PAD_NAND_CE1_B__ECSPI3_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__ECSPI3_MOSI	/;"	d
MX6UL_PAD_NAND_CE1_B__EIM_ADDR18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__EIM_ADDR18	/;"	d
MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	/;"	d
MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02	/;"	d
MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B	/;"	d
MX6UL_PAD_NAND_CE1_B__UART3_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__UART3_DCE_CTS	/;"	d
MX6UL_PAD_NAND_CE1_B__UART3_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__UART3_DTE_RTS	/;"	d
MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6	/;"	d
MX6UL_PAD_NAND_CLE__ECSPI3_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__ECSPI3_MISO	/;"	d
MX6UL_PAD_NAND_CLE__EIM_ADDR16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__EIM_ADDR16	/;"	d
MX6UL_PAD_NAND_CLE__GPIO4_IO15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__GPIO4_IO15	/;"	d
MX6UL_PAD_NAND_CLE__QSPI_A_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__QSPI_A_DATA03	/;"	d
MX6UL_PAD_NAND_CLE__RAWNAND_CLE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__RAWNAND_CLE	/;"	d
MX6UL_PAD_NAND_CLE__UART3_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__UART3_DCE_RTS	/;"	d
MX6UL_PAD_NAND_CLE__UART3_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__UART3_DTE_CTS	/;"	d
MX6UL_PAD_NAND_CLE__USDHC1_DATA7	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_CLE__USDHC1_DATA7	/;"	d
MX6UL_PAD_NAND_DATA00__ECSPI4_RDY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__ECSPI4_RDY	/;"	d
MX6UL_PAD_NAND_DATA00__EIM_AD08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__EIM_AD08	/;"	d
MX6UL_PAD_NAND_DATA00__GPIO4_IO02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__GPIO4_IO02	/;"	d
MX6UL_PAD_NAND_DATA00__KPP_ROW01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__KPP_ROW01	/;"	d
MX6UL_PAD_NAND_DATA00__QSPI_B_SS1_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__QSPI_B_SS1_B	/;"	d
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00	/;"	d
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	/;"	d
MX6UL_PAD_NAND_DATA01__ECSPI4_SS1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__ECSPI4_SS1	/;"	d
MX6UL_PAD_NAND_DATA01__EIM_AD09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__EIM_AD09	/;"	d
MX6UL_PAD_NAND_DATA01__GPIO4_IO03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__GPIO4_IO03	/;"	d
MX6UL_PAD_NAND_DATA01__KPP_COL01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__KPP_COL01	/;"	d
MX6UL_PAD_NAND_DATA01__QSPI_B_DQS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__QSPI_B_DQS	/;"	d
MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01	/;"	d
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	/;"	d
MX6UL_PAD_NAND_DATA02__ECSPI4_SS2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__ECSPI4_SS2	/;"	d
MX6UL_PAD_NAND_DATA02__EIM_AD10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__EIM_AD10	/;"	d
MX6UL_PAD_NAND_DATA02__GPIO4_IO04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__GPIO4_IO04	/;"	d
MX6UL_PAD_NAND_DATA02__KPP_ROW02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__KPP_ROW02	/;"	d
MX6UL_PAD_NAND_DATA02__QSPI_B_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__QSPI_B_DATA00	/;"	d
MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02	/;"	d
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	/;"	d
MX6UL_PAD_NAND_DATA03__ECSPI4_SS3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__ECSPI4_SS3	/;"	d
MX6UL_PAD_NAND_DATA03__EIM_AD11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__EIM_AD11	/;"	d
MX6UL_PAD_NAND_DATA03__GPIO4_IO05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__GPIO4_IO05	/;"	d
MX6UL_PAD_NAND_DATA03__KPP_COL02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__KPP_COL02	/;"	d
MX6UL_PAD_NAND_DATA03__QSPI_B_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__QSPI_B_DATA01	/;"	d
MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03	/;"	d
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	/;"	d
MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK	/;"	d
MX6UL_PAD_NAND_DATA04__EIM_AD12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__EIM_AD12	/;"	d
MX6UL_PAD_NAND_DATA04__GPIO4_IO06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__GPIO4_IO06	/;"	d
MX6UL_PAD_NAND_DATA04__QSPI_B_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__QSPI_B_DATA02	/;"	d
MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04	/;"	d
MX6UL_PAD_NAND_DATA04__UART2_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__UART2_DCE_TX	/;"	d
MX6UL_PAD_NAND_DATA04__UART2_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__UART2_DTE_RX	/;"	d
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	/;"	d
MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI	/;"	d
MX6UL_PAD_NAND_DATA05__EIM_AD13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__EIM_AD13	/;"	d
MX6UL_PAD_NAND_DATA05__GPIO4_IO07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__GPIO4_IO07	/;"	d
MX6UL_PAD_NAND_DATA05__QSPI_B_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__QSPI_B_DATA03	/;"	d
MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05	/;"	d
MX6UL_PAD_NAND_DATA05__UART2_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__UART2_DCE_RX	/;"	d
MX6UL_PAD_NAND_DATA05__UART2_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__UART2_DTE_TX	/;"	d
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	/;"	d
MX6UL_PAD_NAND_DATA06__ECSPI4_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__ECSPI4_MISO	/;"	d
MX6UL_PAD_NAND_DATA06__EIM_AD14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__EIM_AD14	/;"	d
MX6UL_PAD_NAND_DATA06__GPIO4_IO08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__GPIO4_IO08	/;"	d
MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06	/;"	d
MX6UL_PAD_NAND_DATA06__SAI2_RX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__SAI2_RX_BCLK	/;"	d
MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS	/;"	d
MX6UL_PAD_NAND_DATA06__UART2_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__UART2_DTE_RTS	/;"	d
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	/;"	d
MX6UL_PAD_NAND_DATA07__ECSPI4_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__ECSPI4_SS0	/;"	d
MX6UL_PAD_NAND_DATA07__EIM_AD15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__EIM_AD15	/;"	d
MX6UL_PAD_NAND_DATA07__GPIO4_IO09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__GPIO4_IO09	/;"	d
MX6UL_PAD_NAND_DATA07__QSPI_A_SS1_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__QSPI_A_SS1_B	/;"	d
MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07	/;"	d
MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS	/;"	d
MX6UL_PAD_NAND_DATA07__UART2_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__UART2_DTE_CTS	/;"	d
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	/;"	d
MX6UL_PAD_NAND_DQS__CSI_FIELD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__CSI_FIELD	/;"	d
MX6UL_PAD_NAND_DQS__EIM_WAIT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__EIM_WAIT	/;"	d
MX6UL_PAD_NAND_DQS__GPIO4_IO16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__GPIO4_IO16	/;"	d
MX6UL_PAD_NAND_DQS__PWM5_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__PWM5_OUT	/;"	d
MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B	/;"	d
MX6UL_PAD_NAND_DQS__RAWNAND_DQS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__RAWNAND_DQS	/;"	d
MX6UL_PAD_NAND_DQS__SDMA_EXT_EVENT01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__SDMA_EXT_EVENT01	/;"	d
MX6UL_PAD_NAND_DQS__SPDIF_EXT_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_DQS__SPDIF_EXT_CLK	/;"	d
MX6UL_PAD_NAND_READY_B__ECSPI3_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__ECSPI3_SS0	/;"	d
MX6UL_PAD_NAND_READY_B__EIM_CS1_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__EIM_CS1_B	/;"	d
MX6UL_PAD_NAND_READY_B__GPIO4_IO12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__GPIO4_IO12	/;"	d
MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00	/;"	d
MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B	/;"	d
MX6UL_PAD_NAND_READY_B__UART3_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__UART3_DCE_TX	/;"	d
MX6UL_PAD_NAND_READY_B__UART3_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__UART3_DTE_RX	/;"	d
MX6UL_PAD_NAND_READY_B__USDHC1_DATA4	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_READY_B__USDHC1_DATA4	/;"	d
MX6UL_PAD_NAND_RE_B__ECSPI3_SS2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__ECSPI3_SS2	/;"	d
MX6UL_PAD_NAND_RE_B__EIM_EB_B00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__EIM_EB_B00	/;"	d
MX6UL_PAD_NAND_RE_B__GPIO4_IO00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__GPIO4_IO00	/;"	d
MX6UL_PAD_NAND_RE_B__KPP_ROW00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__KPP_ROW00	/;"	d
MX6UL_PAD_NAND_RE_B__QSPI_B_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__QSPI_B_SCLK	/;"	d
MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B	/;"	d
MX6UL_PAD_NAND_RE_B__USDHC2_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_RE_B__USDHC2_CLK	/;"	d
MX6UL_PAD_NAND_WE_B__ECSPI3_SS3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__ECSPI3_SS3	/;"	d
MX6UL_PAD_NAND_WE_B__EIM_EB_B01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__EIM_EB_B01	/;"	d
MX6UL_PAD_NAND_WE_B__GPIO4_IO01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__GPIO4_IO01	/;"	d
MX6UL_PAD_NAND_WE_B__KPP_COL00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__KPP_COL00	/;"	d
MX6UL_PAD_NAND_WE_B__QSPI_B_SS0_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__QSPI_B_SS0_B	/;"	d
MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B	/;"	d
MX6UL_PAD_NAND_WE_B__USDHC2_CMD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WE_B__USDHC2_CMD	/;"	d
MX6UL_PAD_NAND_WP_B__ECSPI3_RDY	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__ECSPI3_RDY	/;"	d
MX6UL_PAD_NAND_WP_B__EIM_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__EIM_BCLK	/;"	d
MX6UL_PAD_NAND_WP_B__GPIO4_IO11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__GPIO4_IO11	/;"	d
MX6UL_PAD_NAND_WP_B__PWM4_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__PWM4_OUT	/;"	d
MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK	/;"	d
MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B	/;"	d
MX6UL_PAD_NAND_WP_B__USDHC1_RESET_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_NAND_WP_B__USDHC1_RESET_B	/;"	d
MX6UL_PAD_SD1_CLK__EIM_ADDR20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__EIM_ADDR20	/;"	d
MX6UL_PAD_SD1_CLK__GPIO2_IO17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__GPIO2_IO17	/;"	d
MX6UL_PAD_SD1_CLK__GPT2_COMPARE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__GPT2_COMPARE2	/;"	d
MX6UL_PAD_SD1_CLK__SAI2_MCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__SAI2_MCLK	/;"	d
MX6UL_PAD_SD1_CLK__SPDIF_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__SPDIF_IN	/;"	d
MX6UL_PAD_SD1_CLK__USB_OTG1_OC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__USB_OTG1_OC	/;"	d
MX6UL_PAD_SD1_CLK__USDHC1_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CLK__USDHC1_CLK	/;"	d
MX6UL_PAD_SD1_CMD__EIM_ADDR19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__EIM_ADDR19	/;"	d
MX6UL_PAD_SD1_CMD__GPIO2_IO16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__GPIO2_IO16	/;"	d
MX6UL_PAD_SD1_CMD__GPT2_COMPARE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__GPT2_COMPARE1	/;"	d
MX6UL_PAD_SD1_CMD__SAI2_RX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__SAI2_RX_SYNC	/;"	d
MX6UL_PAD_SD1_CMD__SDMA_EXT_EVENT00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__SDMA_EXT_EVENT00	/;"	d
MX6UL_PAD_SD1_CMD__SPDIF_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__SPDIF_OUT	/;"	d
MX6UL_PAD_SD1_CMD__USB_OTG1_PWR	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__USB_OTG1_PWR	/;"	d
MX6UL_PAD_SD1_CMD__USDHC1_CMD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_CMD__USDHC1_CMD	/;"	d
MX6UL_PAD_SD1_DATA0__ANATOP_OTG1_ID	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__ANATOP_OTG1_ID	/;"	d
MX6UL_PAD_SD1_DATA0__EIM_ADDR21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__EIM_ADDR21	/;"	d
MX6UL_PAD_SD1_DATA0__FLEXCAN1_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__FLEXCAN1_TX	/;"	d
MX6UL_PAD_SD1_DATA0__GPIO2_IO18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__GPIO2_IO18	/;"	d
MX6UL_PAD_SD1_DATA0__GPT2_COMPARE3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__GPT2_COMPARE3	/;"	d
MX6UL_PAD_SD1_DATA0__SAI2_TX_SYNC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__SAI2_TX_SYNC	/;"	d
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	/;"	d
MX6UL_PAD_SD1_DATA1__EIM_ADDR22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__EIM_ADDR22	/;"	d
MX6UL_PAD_SD1_DATA1__FLEXCAN1_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__FLEXCAN1_RX	/;"	d
MX6UL_PAD_SD1_DATA1__GPIO2_IO19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__GPIO2_IO19	/;"	d
MX6UL_PAD_SD1_DATA1__GPT2_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__GPT2_CLK	/;"	d
MX6UL_PAD_SD1_DATA1__SAI2_TX_BCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__SAI2_TX_BCLK	/;"	d
MX6UL_PAD_SD1_DATA1__USB_OTG2_PWR	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__USB_OTG2_PWR	/;"	d
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	/;"	d
MX6UL_PAD_SD1_DATA2__CCM_CLKO1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__CCM_CLKO1	/;"	d
MX6UL_PAD_SD1_DATA2__EIM_ADDR23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__EIM_ADDR23	/;"	d
MX6UL_PAD_SD1_DATA2__FLEXCAN2_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__FLEXCAN2_TX	/;"	d
MX6UL_PAD_SD1_DATA2__GPIO2_IO20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__GPIO2_IO20	/;"	d
MX6UL_PAD_SD1_DATA2__GPT2_CAPTURE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__GPT2_CAPTURE1	/;"	d
MX6UL_PAD_SD1_DATA2__SAI2_RX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__SAI2_RX_DATA	/;"	d
MX6UL_PAD_SD1_DATA2__USB_OTG2_OC	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__USB_OTG2_OC	/;"	d
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	/;"	d
MX6UL_PAD_SD1_DATA3__ANATOP_OTG2_ID	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__ANATOP_OTG2_ID	/;"	d
MX6UL_PAD_SD1_DATA3__CCM_CLKO2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__CCM_CLKO2	/;"	d
MX6UL_PAD_SD1_DATA3__EIM_ADDR24	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__EIM_ADDR24	/;"	d
MX6UL_PAD_SD1_DATA3__FLEXCAN2_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__FLEXCAN2_RX	/;"	d
MX6UL_PAD_SD1_DATA3__GPIO2_IO21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__GPIO2_IO21	/;"	d
MX6UL_PAD_SD1_DATA3__GPT2_CAPTURE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__GPT2_CAPTURE2	/;"	d
MX6UL_PAD_SD1_DATA3__SAI2_TX_DATA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__SAI2_TX_DATA	/;"	d
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	/;"	d
MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00	/;"	d
MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01	/;"	d
MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02	/;"	d
MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03	/;"	d
MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04	/;"	d
MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05	/;"	d
MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06	/;"	d
MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07	/;"	d
MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	/;"	d
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09	/;"	d
MX6UL_PAD_UART1_CTS_B__CSI_DATA04	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__CSI_DATA04	/;"	d
MX6UL_PAD_UART1_CTS_B__ENET1_RX_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__ENET1_RX_CLK	/;"	d
MX6UL_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN	/;"	d
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	/;"	d
MX6UL_PAD_UART1_CTS_B__UART1_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__UART1_DCE_CTS	/;"	d
MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS	/;"	d
MX6UL_PAD_UART1_CTS_B__USDHC1_WP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__USDHC1_WP	/;"	d
MX6UL_PAD_UART1_CTS_B__USDHC2_WP	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_CTS_B__USDHC2_WP	/;"	d
MX6UL_PAD_UART1_RTS_B__CSI_DATA05	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__CSI_DATA05	/;"	d
MX6UL_PAD_UART1_RTS_B__ENET1_TX_ER	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__ENET1_TX_ER	/;"	d
MX6UL_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT	/;"	d
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	/;"	d
MX6UL_PAD_UART1_RTS_B__UART1_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__UART1_DCE_RTS	/;"	d
MX6UL_PAD_UART1_RTS_B__UART1_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__UART1_DTE_CTS	/;"	d
MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B	/;"	d
MX6UL_PAD_UART1_RTS_B__USDHC2_CD_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RTS_B__USDHC2_CD_B	/;"	d
MX6UL_PAD_UART1_RX_DATA__CSI_DATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__CSI_DATA03	/;"	d
MX6UL_PAD_UART1_RX_DATA__ENET1_RDATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__ENET1_RDATA03	/;"	d
MX6UL_PAD_UART1_RX_DATA__GPIO1_IO17	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__GPIO1_IO17	/;"	d
MX6UL_PAD_UART1_RX_DATA__GPT1_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__GPT1_CLK	/;"	d
MX6UL_PAD_UART1_RX_DATA__I2C3_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__I2C3_SDA	/;"	d
MX6UL_PAD_UART1_RX_DATA__SPDIF_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__SPDIF_IN	/;"	d
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	/;"	d
MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX	/;"	d
MX6UL_PAD_UART1_TX_DATA__CSI_DATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__CSI_DATA02	/;"	d
MX6UL_PAD_UART1_TX_DATA__ENET1_RDATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__ENET1_RDATA02	/;"	d
MX6UL_PAD_UART1_TX_DATA__GPIO1_IO16	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__GPIO1_IO16	/;"	d
MX6UL_PAD_UART1_TX_DATA__GPT1_COMPARE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__GPT1_COMPARE1	/;"	d
MX6UL_PAD_UART1_TX_DATA__I2C3_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__I2C3_SCL	/;"	d
MX6UL_PAD_UART1_TX_DATA__SPDIF_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__SPDIF_OUT	/;"	d
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	/;"	d
MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX	/;"	d
MX6UL_PAD_UART2_CTS_B__CSI_DATA08	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__CSI_DATA08	/;"	d
MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI	/;"	d
MX6UL_PAD_UART2_CTS_B__ENET1_CRS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__ENET1_CRS	/;"	d
MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX	/;"	d
MX6UL_PAD_UART2_CTS_B__GPIO1_IO22	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__GPIO1_IO22	/;"	d
MX6UL_PAD_UART2_CTS_B__GPT1_COMPARE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__GPT1_COMPARE2	/;"	d
MX6UL_PAD_UART2_CTS_B__SJC_DE_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__SJC_DE_B	/;"	d
MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS	/;"	d
MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS	/;"	d
MX6UL_PAD_UART2_RTS_B__CSI_DATA09	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__CSI_DATA09	/;"	d
MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO	/;"	d
MX6UL_PAD_UART2_RTS_B__ENET1_COL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__ENET1_COL	/;"	d
MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX	/;"	d
MX6UL_PAD_UART2_RTS_B__GPIO1_IO23	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__GPIO1_IO23	/;"	d
MX6UL_PAD_UART2_RTS_B__GPT1_COMPARE3	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__GPT1_COMPARE3	/;"	d
MX6UL_PAD_UART2_RTS_B__SJC_FAIL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__SJC_FAIL	/;"	d
MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS	/;"	d
MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS	/;"	d
MX6UL_PAD_UART2_RX_DATA__CSI_DATA07	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__CSI_DATA07	/;"	d
MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK	/;"	d
MX6UL_PAD_UART2_RX_DATA__ENET1_TDATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__ENET1_TDATA03	/;"	d
MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21	/;"	d
MX6UL_PAD_UART2_RX_DATA__GPT1_CAPTURE2	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__GPT1_CAPTURE2	/;"	d
MX6UL_PAD_UART2_RX_DATA__I2C4_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__I2C4_SDA	/;"	d
MX6UL_PAD_UART2_RX_DATA__SJC_DONE	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__SJC_DONE	/;"	d
MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	/;"	d
MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX	/;"	d
MX6UL_PAD_UART2_TX_DATA__CSI_DATA06	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__CSI_DATA06	/;"	d
MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0	/;"	d
MX6UL_PAD_UART2_TX_DATA__ENET1_TDATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__ENET1_TDATA02	/;"	d
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	/;"	d
MX6UL_PAD_UART2_TX_DATA__GPT1_CAPTURE1	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__GPT1_CAPTURE1	/;"	d
MX6UL_PAD_UART2_TX_DATA__I2C4_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__I2C4_SCL	/;"	d
MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	/;"	d
MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX	/;"	d
MX6UL_PAD_UART3_CTS_B__CSI_DATA10	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__CSI_DATA10	/;"	d
MX6UL_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN	/;"	d
MX6UL_PAD_UART3_CTS_B__ENET2_RX_CLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__ENET2_RX_CLK	/;"	d
MX6UL_PAD_UART3_CTS_B__EPIT2_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__EPIT2_OUT	/;"	d
MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	/;"	d
MX6UL_PAD_UART3_CTS_B__GPIO1_IO26	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__GPIO1_IO26	/;"	d
MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS	/;"	d
MX6UL_PAD_UART3_CTS_B__UART3_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_CTS_B__UART3_DTE_RTS	/;"	d
MX6UL_PAD_UART3_RTS_B__CSI_DATA11	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__CSI_DATA11	/;"	d
MX6UL_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT	/;"	d
MX6UL_PAD_UART3_RTS_B__ENET2_TX_ER	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__ENET2_TX_ER	/;"	d
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	/;"	d
MX6UL_PAD_UART3_RTS_B__GPIO1_IO27	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__GPIO1_IO27	/;"	d
MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS	/;"	d
MX6UL_PAD_UART3_RTS_B__UART3_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__UART3_DTE_CTS	/;"	d
MX6UL_PAD_UART3_RTS_B__WDOG1_WDOG_B	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RTS_B__WDOG1_WDOG_B	/;"	d
MX6UL_PAD_UART3_RX_DATA__CSI_DATA00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__CSI_DATA00	/;"	d
MX6UL_PAD_UART3_RX_DATA__ENET2_RDATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__ENET2_RDATA03	/;"	d
MX6UL_PAD_UART3_RX_DATA__EPIT1_OUT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__EPIT1_OUT	/;"	d
MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	/;"	d
MX6UL_PAD_UART3_RX_DATA__SIM2_PORT0_PD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__SIM2_PORT0_PD	/;"	d
MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS	/;"	d
MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS	/;"	d
MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	/;"	d
MX6UL_PAD_UART3_RX_DATA__UART3_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_RX_DATA__UART3_DTE_TX	/;"	d
MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	/;"	d
MX6UL_PAD_UART3_TX_DATA__CSI_DATA01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__CSI_DATA01	/;"	d
MX6UL_PAD_UART3_TX_DATA__ENET2_RDATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__ENET2_RDATA02	/;"	d
MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24	/;"	d
MX6UL_PAD_UART3_TX_DATA__SIM1_PORT0_PD	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__SIM1_PORT0_PD	/;"	d
MX6UL_PAD_UART3_TX_DATA__SJC_JTAG_ACT	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__SJC_JTAG_ACT	/;"	d
MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS	/;"	d
MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS	/;"	d
MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	/;"	d
MX6UL_PAD_UART3_TX_DATA__UART3_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART3_TX_DATA__UART3_DTE_RX	/;"	d
MX6UL_PAD_UART4_RX_DATA__CSI_DATA13	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__CSI_DATA13	/;"	d
MX6UL_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01	/;"	d
MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0	/;"	d
MX6UL_PAD_UART4_RX_DATA__ENET2_TDATA03	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__ENET2_TDATA03	/;"	d
MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29	/;"	d
MX6UL_PAD_UART4_RX_DATA__I2C1_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__I2C1_SDA	/;"	d
MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	/;"	d
MX6UL_PAD_UART4_RX_DATA__UART4_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_RX_DATA__UART4_DTE_TX	/;"	d
MX6UL_PAD_UART4_TX_DATA__CSI_DATA12	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__CSI_DATA12	/;"	d
MX6UL_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02	/;"	d
MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK	/;"	d
MX6UL_PAD_UART4_TX_DATA__ENET2_TDATA02	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__ENET2_TDATA02	/;"	d
MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28	/;"	d
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__I2C1_SCL	/;"	d
MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	/;"	d
MX6UL_PAD_UART4_TX_DATA__UART4_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART4_TX_DATA__UART4_DTE_RX	/;"	d
MX6UL_PAD_UART5_RX_DATA__CSI_DATA15	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__CSI_DATA15	/;"	d
MX6UL_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB	/;"	d
MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO	/;"	d
MX6UL_PAD_UART5_RX_DATA__ENET2_COL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__ENET2_COL	/;"	d
MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31	/;"	d
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	/;"	d
MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX	/;"	d
MX6UL_PAD_UART5_RX_DATA__UART5_DTE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_RX_DATA__UART5_DTE_TX	/;"	d
MX6UL_PAD_UART5_TX_DATA__CSI_DATA14	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__CSI_DATA14	/;"	d
MX6UL_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00	/;"	d
MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI	/;"	d
MX6UL_PAD_UART5_TX_DATA__ENET2_CRS	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__ENET2_CRS	/;"	d
MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30	/;"	d
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__I2C2_SCL	/;"	d
MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX	/;"	d
MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX	arch/arm/dts/imx6ul-pinfunc.h	/^#define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX	/;"	d
MX6UL_SNVS_LP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MX6UL_SNVS_LP_BASE_ADDR /;"	d
MX6UL_WDOG3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MX6UL_WDOG3_BASE_ADDR /;"	d
MX6_DBI_ADDR	drivers/pci/pcie_imx.c	/^#define MX6_DBI_ADDR	/;"	d	file:
MX6_DBI_SIZE	drivers/pci/pcie_imx.c	/^#define MX6_DBI_SIZE	/;"	d	file:
MX6_IOMUXC_GPR4	arch/arm/include/asm/arch-mx6/iomux.h	/^#define MX6_IOMUXC_GPR4	/;"	d
MX6_IOMUXC_GPR6	arch/arm/include/asm/arch-mx6/iomux.h	/^#define MX6_IOMUXC_GPR6	/;"	d
MX6_IOMUXC_GPR7	arch/arm/include/asm/arch-mx6/iomux.h	/^#define MX6_IOMUXC_GPR7	/;"	d
MX6_IOM_DDRMODE_CTL	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DDRMODE_CTL	/;"	d
MX6_IOM_DDRMODE_CTL	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DDRMODE_CTL	/;"	d
MX6_IOM_DDRMODE_CTL	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DDRMODE_CTL	/;"	d
MX6_IOM_DDRMODE_CTL	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DDRMODE_CTL	/;"	d
MX6_IOM_DRAM_CAS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_CAS	/;"	d
MX6_IOM_DRAM_CAS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_CAS	/;"	d
MX6_IOM_DRAM_CAS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_CAS	/;"	d
MX6_IOM_DRAM_CAS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_CAS	/;"	d
MX6_IOM_DRAM_CAS_B	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_CAS_B	/;"	d
MX6_IOM_DRAM_CS0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_CS0	/;"	d
MX6_IOM_DRAM_CS0_B	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_CS0_B	/;"	d
MX6_IOM_DRAM_CS1	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_CS1	/;"	d
MX6_IOM_DRAM_CS1_B	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_CS1_B	/;"	d
MX6_IOM_DRAM_DQM0	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM0	/;"	d
MX6_IOM_DRAM_DQM0	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM0	/;"	d
MX6_IOM_DRAM_DQM0	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_DQM0	/;"	d
MX6_IOM_DRAM_DQM0	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_DQM0	/;"	d
MX6_IOM_DRAM_DQM0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_DQM0	/;"	d
MX6_IOM_DRAM_DQM1	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM1	/;"	d
MX6_IOM_DRAM_DQM1	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM1	/;"	d
MX6_IOM_DRAM_DQM1	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_DQM1	/;"	d
MX6_IOM_DRAM_DQM1	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_DQM1	/;"	d
MX6_IOM_DRAM_DQM1	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_DQM1	/;"	d
MX6_IOM_DRAM_DQM2	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM2	/;"	d
MX6_IOM_DRAM_DQM2	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM2	/;"	d
MX6_IOM_DRAM_DQM2	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_DQM2	/;"	d
MX6_IOM_DRAM_DQM2	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_DQM2	/;"	d
MX6_IOM_DRAM_DQM3	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM3	/;"	d
MX6_IOM_DRAM_DQM3	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM3	/;"	d
MX6_IOM_DRAM_DQM3	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_DQM3	/;"	d
MX6_IOM_DRAM_DQM3	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_DQM3	/;"	d
MX6_IOM_DRAM_DQM4	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM4	/;"	d
MX6_IOM_DRAM_DQM4	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM4	/;"	d
MX6_IOM_DRAM_DQM5	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM5	/;"	d
MX6_IOM_DRAM_DQM5	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM5	/;"	d
MX6_IOM_DRAM_DQM6	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM6	/;"	d
MX6_IOM_DRAM_DQM6	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM6	/;"	d
MX6_IOM_DRAM_DQM7	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_DQM7	/;"	d
MX6_IOM_DRAM_DQM7	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_DQM7	/;"	d
MX6_IOM_DRAM_ODT0	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_ODT0	/;"	d
MX6_IOM_DRAM_ODT1	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_ODT1	/;"	d
MX6_IOM_DRAM_RAS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_RAS	/;"	d
MX6_IOM_DRAM_RAS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_RAS	/;"	d
MX6_IOM_DRAM_RAS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_RAS	/;"	d
MX6_IOM_DRAM_RAS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_RAS	/;"	d
MX6_IOM_DRAM_RAS_B	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_RAS_B	/;"	d
MX6_IOM_DRAM_RESET	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_RESET	/;"	d
MX6_IOM_DRAM_RESET	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_RESET	/;"	d
MX6_IOM_DRAM_RESET	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_RESET	/;"	d
MX6_IOM_DRAM_RESET	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_RESET	/;"	d
MX6_IOM_DRAM_RESET	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_RESET	/;"	d
MX6_IOM_DRAM_SDBA0	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDBA0	/;"	d
MX6_IOM_DRAM_SDBA0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDBA0	/;"	d
MX6_IOM_DRAM_SDBA1	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDBA1	/;"	d
MX6_IOM_DRAM_SDBA1	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDBA1	/;"	d
MX6_IOM_DRAM_SDBA2	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDBA2	/;"	d
MX6_IOM_DRAM_SDBA2	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDBA2	/;"	d
MX6_IOM_DRAM_SDBA2	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDBA2	/;"	d
MX6_IOM_DRAM_SDBA2	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDBA2	/;"	d
MX6_IOM_DRAM_SDBA2	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDBA2	/;"	d
MX6_IOM_DRAM_SDCKE0	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDCKE0	/;"	d
MX6_IOM_DRAM_SDCKE0	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDCKE0	/;"	d
MX6_IOM_DRAM_SDCKE0	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDCKE0	/;"	d
MX6_IOM_DRAM_SDCKE0	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDCKE0	/;"	d
MX6_IOM_DRAM_SDCKE0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDCKE0	/;"	d
MX6_IOM_DRAM_SDCKE1	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDCKE1	/;"	d
MX6_IOM_DRAM_SDCKE1	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDCKE1	/;"	d
MX6_IOM_DRAM_SDCKE1	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDCKE1	/;"	d
MX6_IOM_DRAM_SDCKE1	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDCKE1	/;"	d
MX6_IOM_DRAM_SDCKE1	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDCKE1	/;"	d
MX6_IOM_DRAM_SDCLK0_P	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDCLK0_P	/;"	d
MX6_IOM_DRAM_SDCLK_0	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDCLK_0	/;"	d
MX6_IOM_DRAM_SDCLK_0	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDCLK_0	/;"	d
MX6_IOM_DRAM_SDCLK_0	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDCLK_0	/;"	d
MX6_IOM_DRAM_SDCLK_0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDCLK_0	/;"	d
MX6_IOM_DRAM_SDCLK_1	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDCLK_1	/;"	d
MX6_IOM_DRAM_SDCLK_1	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDCLK_1	/;"	d
MX6_IOM_DRAM_SDODT0	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDODT0	/;"	d
MX6_IOM_DRAM_SDODT0	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDODT0	/;"	d
MX6_IOM_DRAM_SDODT0	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDODT0	/;"	d
MX6_IOM_DRAM_SDODT0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDODT0	/;"	d
MX6_IOM_DRAM_SDODT1	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDODT1	/;"	d
MX6_IOM_DRAM_SDODT1	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDODT1	/;"	d
MX6_IOM_DRAM_SDODT1	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDODT1	/;"	d
MX6_IOM_DRAM_SDODT1	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDODT1	/;"	d
MX6_IOM_DRAM_SDQS0	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS0	/;"	d
MX6_IOM_DRAM_SDQS0	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS0	/;"	d
MX6_IOM_DRAM_SDQS0	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDQS0	/;"	d
MX6_IOM_DRAM_SDQS0	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDQS0	/;"	d
MX6_IOM_DRAM_SDQS0_P	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDQS0_P	/;"	d
MX6_IOM_DRAM_SDQS1	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS1	/;"	d
MX6_IOM_DRAM_SDQS1	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS1	/;"	d
MX6_IOM_DRAM_SDQS1	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDQS1	/;"	d
MX6_IOM_DRAM_SDQS1	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDQS1	/;"	d
MX6_IOM_DRAM_SDQS1_P	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDQS1_P	/;"	d
MX6_IOM_DRAM_SDQS2	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS2	/;"	d
MX6_IOM_DRAM_SDQS2	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS2	/;"	d
MX6_IOM_DRAM_SDQS2	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDQS2	/;"	d
MX6_IOM_DRAM_SDQS2_P	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDQS2_P	/;"	d
MX6_IOM_DRAM_SDQS3	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS3	/;"	d
MX6_IOM_DRAM_SDQS3	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS3	/;"	d
MX6_IOM_DRAM_SDQS3	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_DRAM_SDQS3	/;"	d
MX6_IOM_DRAM_SDQS3_P	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDQS3_P	/;"	d
MX6_IOM_DRAM_SDQS4	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS4	/;"	d
MX6_IOM_DRAM_SDQS4	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS4	/;"	d
MX6_IOM_DRAM_SDQS5	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS5	/;"	d
MX6_IOM_DRAM_SDQS5	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS5	/;"	d
MX6_IOM_DRAM_SDQS6	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS6	/;"	d
MX6_IOM_DRAM_SDQS6	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS6	/;"	d
MX6_IOM_DRAM_SDQS7	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_DRAM_SDQS7	/;"	d
MX6_IOM_DRAM_SDQS7	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_DRAM_SDQS7	/;"	d
MX6_IOM_DRAM_SDWE_B	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define MX6_IOM_DRAM_SDWE_B	/;"	d
MX6_IOM_DRAM_SDWE_B	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_DRAM_SDWE_B	/;"	d
MX6_IOM_GRP_ADDDS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_ADDDS	/;"	d
MX6_IOM_GRP_ADDDS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_ADDDS	/;"	d
MX6_IOM_GRP_ADDDS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_ADDDS	/;"	d
MX6_IOM_GRP_ADDDS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_ADDDS	/;"	d
MX6_IOM_GRP_B0DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B0DS	/;"	d
MX6_IOM_GRP_B0DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B0DS	/;"	d
MX6_IOM_GRP_B0DS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_B0DS	/;"	d
MX6_IOM_GRP_B0DS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_B0DS	/;"	d
MX6_IOM_GRP_B1DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B1DS	/;"	d
MX6_IOM_GRP_B1DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B1DS	/;"	d
MX6_IOM_GRP_B1DS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_B1DS	/;"	d
MX6_IOM_GRP_B1DS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_B1DS	/;"	d
MX6_IOM_GRP_B2DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B2DS	/;"	d
MX6_IOM_GRP_B2DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B2DS	/;"	d
MX6_IOM_GRP_B2DS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_B2DS	/;"	d
MX6_IOM_GRP_B3DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B3DS	/;"	d
MX6_IOM_GRP_B3DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B3DS	/;"	d
MX6_IOM_GRP_B3DS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_B3DS	/;"	d
MX6_IOM_GRP_B4DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B4DS	/;"	d
MX6_IOM_GRP_B4DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B4DS	/;"	d
MX6_IOM_GRP_B5DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B5DS	/;"	d
MX6_IOM_GRP_B5DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B5DS	/;"	d
MX6_IOM_GRP_B6DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B6DS	/;"	d
MX6_IOM_GRP_B6DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B6DS	/;"	d
MX6_IOM_GRP_B7DS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_B7DS	/;"	d
MX6_IOM_GRP_B7DS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_B7DS	/;"	d
MX6_IOM_GRP_CTLDS	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_CTLDS	/;"	d
MX6_IOM_GRP_CTLDS	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_CTLDS	/;"	d
MX6_IOM_GRP_CTLDS	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_CTLDS	/;"	d
MX6_IOM_GRP_CTLDS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_CTLDS	/;"	d
MX6_IOM_GRP_DDRHYS	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_DDRHYS	/;"	d
MX6_IOM_GRP_DDRMODE	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_DDRMODE	/;"	d
MX6_IOM_GRP_DDRMODE	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_DDRMODE	/;"	d
MX6_IOM_GRP_DDRMODE	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_DDRMODE	/;"	d
MX6_IOM_GRP_DDRMODE	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_DDRMODE	/;"	d
MX6_IOM_GRP_DDRPK	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_DDRPK	/;"	d
MX6_IOM_GRP_DDRPKE	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_DDRPKE	/;"	d
MX6_IOM_GRP_DDRPKE	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_DDRPKE	/;"	d
MX6_IOM_GRP_DDRPKE	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_DDRPKE	/;"	d
MX6_IOM_GRP_DDRPKE	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_DDRPKE	/;"	d
MX6_IOM_GRP_DDR_TYPE	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define MX6_IOM_GRP_DDR_TYPE	/;"	d
MX6_IOM_GRP_DDR_TYPE	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define MX6_IOM_GRP_DDR_TYPE	/;"	d
MX6_IOM_GRP_DDR_TYPE	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define MX6_IOM_GRP_DDR_TYPE	/;"	d
MX6_IOM_GRP_DDR_TYPE	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define MX6_IOM_GRP_DDR_TYPE	/;"	d
MX6_IO_ADDR	drivers/pci/pcie_imx.c	/^#define MX6_IO_ADDR	/;"	d	file:
MX6_IO_SIZE	drivers/pci/pcie_imx.c	/^#define MX6_IO_SIZE	/;"	d	file:
MX6_MEM_ADDR	drivers/pci/pcie_imx.c	/^#define MX6_MEM_ADDR	/;"	d	file:
MX6_MEM_SIZE	drivers/pci/pcie_imx.c	/^#define MX6_MEM_SIZE	/;"	d	file:
MX6_MMDC_P0_MAPSR	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MAPSR	/;"	d
MX6_MMDC_P0_MDASP	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDASP	/;"	d
MX6_MMDC_P0_MDCFG0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDCFG0	/;"	d
MX6_MMDC_P0_MDCFG1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDCFG1	/;"	d
MX6_MMDC_P0_MDCFG2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDCFG2	/;"	d
MX6_MMDC_P0_MDCTL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDCTL	/;"	d
MX6_MMDC_P0_MDMISC	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDMISC	/;"	d
MX6_MMDC_P0_MDOR	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDOR	/;"	d
MX6_MMDC_P0_MDOTC	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDOTC	/;"	d
MX6_MMDC_P0_MDPDC	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDPDC	/;"	d
MX6_MMDC_P0_MDREF	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDREF	/;"	d
MX6_MMDC_P0_MDRWD	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDRWD	/;"	d
MX6_MMDC_P0_MDSCR	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MDSCR	/;"	d
MX6_MMDC_P0_MPDGCTRL0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPDGCTRL0	/;"	d
MX6_MMDC_P0_MPDGCTRL1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPDGCTRL1	/;"	d
MX6_MMDC_P0_MPMUR0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPMUR0	/;"	d
MX6_MMDC_P0_MPODTCTRL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPODTCTRL	/;"	d
MX6_MMDC_P0_MPRDDLCTL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPRDDLCTL	/;"	d
MX6_MMDC_P0_MPRDDQBY0DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPRDDQBY0DL	/;"	d
MX6_MMDC_P0_MPRDDQBY1DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPRDDQBY1DL	/;"	d
MX6_MMDC_P0_MPRDDQBY2DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPRDDQBY2DL	/;"	d
MX6_MMDC_P0_MPRDDQBY3DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPRDDQBY3DL	/;"	d
MX6_MMDC_P0_MPWLDECTRL0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPWLDECTRL0	/;"	d
MX6_MMDC_P0_MPWLDECTRL1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPWLDECTRL1	/;"	d
MX6_MMDC_P0_MPWRDLCTL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPWRDLCTL	/;"	d
MX6_MMDC_P0_MPZQHWCTRL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P0_MPZQHWCTRL	/;"	d
MX6_MMDC_P1_MAPSR	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MAPSR	/;"	d
MX6_MMDC_P1_MDASP	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDASP	/;"	d
MX6_MMDC_P1_MDCFG0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDCFG0	/;"	d
MX6_MMDC_P1_MDCFG1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDCFG1	/;"	d
MX6_MMDC_P1_MDCFG2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDCFG2	/;"	d
MX6_MMDC_P1_MDCTL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDCTL	/;"	d
MX6_MMDC_P1_MDMISC	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDMISC	/;"	d
MX6_MMDC_P1_MDOR	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDOR	/;"	d
MX6_MMDC_P1_MDOTC	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDOTC	/;"	d
MX6_MMDC_P1_MDPDC	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDPDC	/;"	d
MX6_MMDC_P1_MDREF	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDREF	/;"	d
MX6_MMDC_P1_MDRWD	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDRWD	/;"	d
MX6_MMDC_P1_MDSCR	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MDSCR	/;"	d
MX6_MMDC_P1_MPDGCTRL0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPDGCTRL0	/;"	d
MX6_MMDC_P1_MPDGCTRL1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPDGCTRL1	/;"	d
MX6_MMDC_P1_MPMUR0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPMUR0	/;"	d
MX6_MMDC_P1_MPODTCTRL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPODTCTRL	/;"	d
MX6_MMDC_P1_MPRDDLCTL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPRDDLCTL	/;"	d
MX6_MMDC_P1_MPRDDQBY0DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPRDDQBY0DL	/;"	d
MX6_MMDC_P1_MPRDDQBY1DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPRDDQBY1DL	/;"	d
MX6_MMDC_P1_MPRDDQBY2DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPRDDQBY2DL	/;"	d
MX6_MMDC_P1_MPRDDQBY3DL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPRDDQBY3DL	/;"	d
MX6_MMDC_P1_MPWLDECTRL0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPWLDECTRL0	/;"	d
MX6_MMDC_P1_MPWLDECTRL1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPWLDECTRL1	/;"	d
MX6_MMDC_P1_MPWRDLCTL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPWRDLCTL	/;"	d
MX6_MMDC_P1_MPZQHWCTRL	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define MX6_MMDC_P1_MPZQHWCTRL	/;"	d
MX6_PAD_BOOT_MODE0__GPIO5_IO10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_BOOT_MODE0__GPIO5_IO10	                        = IOMUX_PAD(0x02A0, 0x0014, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_BOOT_MODE0__GPIO5_IO10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_BOOT_MODE0__GPIO5_IO10	                       = IOMUX_PAD(0x0044, 0x0000, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_BOOT_MODE1__GPIO5_IO11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_BOOT_MODE1__GPIO5_IO11	                        = IOMUX_PAD(0x02A4, 0x0018, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_BOOT_MODE1__GPIO5_IO11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_BOOT_MODE1__GPIO5_IO11	                       = IOMUX_PAD(0x0048, 0x0004, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__AUDMUX_AUD6_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__AUDMUX_AUD6_TXC                    = IOMUX_PAD(0x0394, 0x004C, 2, 0x0684, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__CSI1_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__CSI1_DATA_2                        = IOMUX_PAD(0x0394, 0x004C, 0, 0x06A8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__CSI_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__CSI_DATA02                         = IOMUX_PAD(0x0470, 0x01E4, 0, 0x04C4, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__CSI_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__CSI_DATA02                        = IOMUX_PAD(0x0470, 0x01E4, 0, 0x04C4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__ECSPI2_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__ECSPI2_SCLK                        = IOMUX_PAD(0x0470, 0x01E4, 3, 0x0544, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__ECSPI2_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__ECSPI2_SCLK                       = IOMUX_PAD(0x0470, 0x01E4, 3, 0x0544, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__EIM_AD00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__EIM_AD00                           = IOMUX_PAD(0x0470, 0x01E4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__EIM_AD00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__EIM_AD00                          = IOMUX_PAD(0x0470, 0x01E4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__ESAI_TX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__ESAI_TX_CLK                        = IOMUX_PAD(0x0394, 0x004C, 1, 0x078C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__GPIO1_IO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__GPIO1_IO_14                        = IOMUX_PAD(0x0394, 0x004C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__GPIO4_IO21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__GPIO4_IO21                         = IOMUX_PAD(0x0470, 0x01E4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__GPIO4_IO21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__GPIO4_IO21                        = IOMUX_PAD(0x0470, 0x01E4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__I2C1_SCL                           = IOMUX_PAD(0x0394, 0x004C, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__MMDC_DEBUG_37	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__MMDC_DEBUG_37                      = IOMUX_PAD(0x0394, 0x004C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__SAI1_TX_BCLK                       = IOMUX_PAD(0x0394, 0x004C, 7, 0x0800, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__SIM1_PORT1_RST_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__SIM1_PORT1_RST_B                   = IOMUX_PAD(0x0470, 0x01E4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__SIM1_PORT1_RST_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__SIM1_PORT1_RST_B                  = IOMUX_PAD(0x0470, 0x01E4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__SRC_INT_BOOT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__SRC_INT_BOOT                       = IOMUX_PAD(0x0470, 0x01E4, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__SRC_INT_BOOT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__SRC_INT_BOOT                      = IOMUX_PAD(0x0470, 0x01E4, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__UART5_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__UART5_DCE_TX                       = IOMUX_PAD(0x0470, 0x01E4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__UART5_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__UART5_DCE_TX                      = IOMUX_PAD(0x0470, 0x01E4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__UART5_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__UART5_DTE_RX                       = IOMUX_PAD(0x0470, 0x01E4, 8, 0x0644, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__UART5_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__UART5_DTE_RX                      = IOMUX_PAD(0x0470, 0x01E4, 8, 0x0644, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__UART6_RI_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__UART6_RI_B                         = IOMUX_PAD(0x0394, 0x004C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA00__USDHC2_DATA0                       = IOMUX_PAD(0x0470, 0x01E4, 1, 0x067C, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA00__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA00__USDHC2_DATA0                      = IOMUX_PAD(0x0470, 0x01E4, 1, 0x067C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA00__VADC_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__VADC_DATA_4                        = IOMUX_PAD(0x0394, 0x004C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA00__WEIM_DATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA00__WEIM_DATA_23                       = IOMUX_PAD(0x0394, 0x004C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS                   = IOMUX_PAD(0x0398, 0x0050, 2, 0x0688, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__CSI1_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__CSI1_DATA_3                        = IOMUX_PAD(0x0398, 0x0050, 0, 0x06AC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__CSI_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__CSI_DATA03                         = IOMUX_PAD(0x0474, 0x01E8, 0, 0x04C8, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__CSI_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__CSI_DATA03                        = IOMUX_PAD(0x0474, 0x01E8, 0, 0x04C8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__ECSPI2_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__ECSPI2_SS0                         = IOMUX_PAD(0x0474, 0x01E8, 3, 0x0550, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__ECSPI2_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__ECSPI2_SS0                        = IOMUX_PAD(0x0474, 0x01E8, 3, 0x0550, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__EIM_AD01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__EIM_AD01                           = IOMUX_PAD(0x0474, 0x01E8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__EIM_AD01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__EIM_AD01                          = IOMUX_PAD(0x0474, 0x01E8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__ESAI_TX_FS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__ESAI_TX_FS                         = IOMUX_PAD(0x0398, 0x0050, 1, 0x077C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__GPIO1_IO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__GPIO1_IO_15                        = IOMUX_PAD(0x0398, 0x0050, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__GPIO4_IO22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__GPIO4_IO22                         = IOMUX_PAD(0x0474, 0x01E8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__GPIO4_IO22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__GPIO4_IO22                        = IOMUX_PAD(0x0474, 0x01E8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__I2C1_SDA                           = IOMUX_PAD(0x0398, 0x0050, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__MMDC_DEBUG_38	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__MMDC_DEBUG_38                      = IOMUX_PAD(0x0398, 0x0050, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__SAI1_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__SAI1_MCLK                          = IOMUX_PAD(0x0474, 0x01E8, 6, 0x05E0, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__SAI1_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__SAI1_MCLK                         = IOMUX_PAD(0x0474, 0x01E8, 6, 0x05E0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__SAI1_TX_SYNC                       = IOMUX_PAD(0x0398, 0x0050, 7, 0x0804, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__SIM1_PORT1_SVEN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__SIM1_PORT1_SVEN                    = IOMUX_PAD(0x0474, 0x01E8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__SIM1_PORT1_SVEN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__SIM1_PORT1_SVEN                   = IOMUX_PAD(0x0474, 0x01E8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__UART5_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__UART5_DCE_RX                       = IOMUX_PAD(0x0474, 0x01E8, 8, 0x0644, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__UART5_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__UART5_DCE_RX                      = IOMUX_PAD(0x0474, 0x01E8, 8, 0x0644, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__UART5_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__UART5_DTE_TX                       = IOMUX_PAD(0x0474, 0x01E8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__UART5_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__UART5_DTE_TX                      = IOMUX_PAD(0x0474, 0x01E8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__UART6_DSR_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__UART6_DSR_B                        = IOMUX_PAD(0x0398, 0x0050, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA01__USDHC2_DATA1                       = IOMUX_PAD(0x0474, 0x01E8, 1, 0x0680, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA01__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA01__USDHC2_DATA1                      = IOMUX_PAD(0x0474, 0x01E8, 1, 0x0680, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA01__VADC_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__VADC_DATA_5                        = IOMUX_PAD(0x0398, 0x0050, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA01__WEIM_DATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA01__WEIM_DATA_22                       = IOMUX_PAD(0x0398, 0x0050, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__AUDMUX_AUD6_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__AUDMUX_AUD6_RXC                    = IOMUX_PAD(0x039C, 0x0054, 2, 0x067C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__CSI1_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__CSI1_DATA_4                        = IOMUX_PAD(0x039C, 0x0054, 0, 0x06B0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__CSI_DATA04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__CSI_DATA04                         = IOMUX_PAD(0x0478, 0x01EC, 0, 0x04D8, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__CSI_DATA04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__CSI_DATA04                        = IOMUX_PAD(0x0478, 0x01EC, 0, 0x04D8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__ECSPI2_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__ECSPI2_MOSI                        = IOMUX_PAD(0x0478, 0x01EC, 3, 0x054C, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__ECSPI2_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__ECSPI2_MOSI                       = IOMUX_PAD(0x0478, 0x01EC, 3, 0x054C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__EIM_AD02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__EIM_AD02                           = IOMUX_PAD(0x0478, 0x01EC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__EIM_AD02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__EIM_AD02                          = IOMUX_PAD(0x0478, 0x01EC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__ESAI_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__ESAI_RX_CLK                        = IOMUX_PAD(0x039C, 0x0054, 1, 0x0788, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__GPIO1_IO_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__GPIO1_IO_16                        = IOMUX_PAD(0x039C, 0x0054, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__GPIO4_IO23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__GPIO4_IO23                         = IOMUX_PAD(0x0478, 0x01EC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__GPIO4_IO23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__GPIO4_IO23                        = IOMUX_PAD(0x0478, 0x01EC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__KPP_COL_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__KPP_COL_5                          = IOMUX_PAD(0x039C, 0x0054, 3, 0x07C8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__MMDC_DEBUG_39	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__MMDC_DEBUG_39                      = IOMUX_PAD(0x039C, 0x0054, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__SAI1_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__SAI1_RX_BCLK                       = IOMUX_PAD(0x039C, 0x0054, 7, 0x07F4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__SAI1_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__SAI1_RX_SYNC                       = IOMUX_PAD(0x0478, 0x01EC, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__SAI1_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__SAI1_RX_SYNC                      = IOMUX_PAD(0x0478, 0x01EC, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__SIM1_PORT1_TRXD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__SIM1_PORT1_TRXD                    = IOMUX_PAD(0x0478, 0x01EC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__SIM1_PORT1_TRXD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__SIM1_PORT1_TRXD                   = IOMUX_PAD(0x0478, 0x01EC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__UART5_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__UART5_DCE_RTS                      = IOMUX_PAD(0x0478, 0x01EC, 8, 0x0640, 5/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__UART5_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__UART5_DCE_RTS                     = IOMUX_PAD(0x0478, 0x01EC, 8, 0x0640, 5,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__UART5_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__UART5_DTE_CTS                      = IOMUX_PAD(0x0478, 0x01EC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__UART5_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__UART5_DTE_CTS                     = IOMUX_PAD(0x0478, 0x01EC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__UART6_DTR_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__UART6_DTR_B                        = IOMUX_PAD(0x039C, 0x0054, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA02__USDHC2_DATA2                       = IOMUX_PAD(0x0478, 0x01EC, 1, 0x0684, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA02__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA02__USDHC2_DATA2                      = IOMUX_PAD(0x0478, 0x01EC, 1, 0x0684, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA02__VADC_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__VADC_DATA_6                        = IOMUX_PAD(0x039C, 0x0054, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA02__WEIM_DATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA02__WEIM_DATA_21                       = IOMUX_PAD(0x039C, 0x0054, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__AUDMUX_AUD6_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__AUDMUX_AUD6_RXFS                   = IOMUX_PAD(0x03A0, 0x0058, 2, 0x0680, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__CSI1_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__CSI1_DATA_5                        = IOMUX_PAD(0x03A0, 0x0058, 0, 0x06B4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__CSI_DATA05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__CSI_DATA05                         = IOMUX_PAD(0x047C, 0x01F0, 0, 0x04CC, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__CSI_DATA05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__CSI_DATA05                        = IOMUX_PAD(0x047C, 0x01F0, 0, 0x04CC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__ECSPI2_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__ECSPI2_MISO                        = IOMUX_PAD(0x047C, 0x01F0, 3, 0x0548, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__ECSPI2_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__ECSPI2_MISO                       = IOMUX_PAD(0x047C, 0x01F0, 3, 0x0548, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__EIM_AD03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__EIM_AD03                           = IOMUX_PAD(0x047C, 0x01F0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__EIM_AD03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__EIM_AD03                          = IOMUX_PAD(0x047C, 0x01F0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__ESAI_RX_FS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__ESAI_RX_FS                         = IOMUX_PAD(0x03A0, 0x0058, 1, 0x0778, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__GPIO1_IO_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__GPIO1_IO_17                        = IOMUX_PAD(0x03A0, 0x0058, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__GPIO4_IO24	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__GPIO4_IO24                         = IOMUX_PAD(0x047C, 0x01F0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__GPIO4_IO24	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__GPIO4_IO24                        = IOMUX_PAD(0x047C, 0x01F0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__KPP_ROW_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__KPP_ROW_5                          = IOMUX_PAD(0x03A0, 0x0058, 3, 0x07D4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__MMDC_DEBUG_40	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__MMDC_DEBUG_40                      = IOMUX_PAD(0x03A0, 0x0058, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__SAI1_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__SAI1_RX_BCLK                       = IOMUX_PAD(0x047C, 0x01F0, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__SAI1_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__SAI1_RX_BCLK                      = IOMUX_PAD(0x047C, 0x01F0, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__SAI1_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__SAI1_RX_SYNC                       = IOMUX_PAD(0x03A0, 0x0058, 7, 0x07FC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__SIM2_PORT1_PD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__SIM2_PORT1_PD                      = IOMUX_PAD(0x047C, 0x01F0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__SIM2_PORT1_PD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__SIM2_PORT1_PD                     = IOMUX_PAD(0x047C, 0x01F0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__UART5_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__UART5_DCE_CTS                      = IOMUX_PAD(0x047C, 0x01F0, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__UART5_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__UART5_DCE_CTS                     = IOMUX_PAD(0x047C, 0x01F0, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__UART5_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__UART5_DTE_RTS                      = IOMUX_PAD(0x047C, 0x01F0, 8, 0x0640, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__UART5_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__UART5_DTE_RTS                     = IOMUX_PAD(0x047C, 0x01F0, 8, 0x0640, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__UART6_DCD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__UART6_DCD_B                        = IOMUX_PAD(0x03A0, 0x0058, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA03__USDHC2_DATA3                       = IOMUX_PAD(0x047C, 0x01F0, 1, 0x0688, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA03__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA03__USDHC2_DATA3                      = IOMUX_PAD(0x047C, 0x01F0, 1, 0x0688, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA03__VADC_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__VADC_DATA_7                        = IOMUX_PAD(0x03A0, 0x0058, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA03__WEIM_DATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA03__WEIM_DATA_20                       = IOMUX_PAD(0x03A0, 0x0058, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__CSI1_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__CSI1_DATA_6                        = IOMUX_PAD(0x03A4, 0x005C, 0, 0x06B8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__CSI_DATA06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__CSI_DATA06                         = IOMUX_PAD(0x0480, 0x01F4, 0, 0x04DC, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__CSI_DATA06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__CSI_DATA06                        = IOMUX_PAD(0x0480, 0x01F4, 0, 0x04DC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__ECSPI1_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__ECSPI1_SCLK                        = IOMUX_PAD(0x0480, 0x01F4, 3, 0x0534, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__ECSPI1_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__ECSPI1_SCLK                       = IOMUX_PAD(0x0480, 0x01F4, 3, 0x0534, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__EIM_AD04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__EIM_AD04                           = IOMUX_PAD(0x0480, 0x01F4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__EIM_AD04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__EIM_AD04                          = IOMUX_PAD(0x0480, 0x01F4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__ESAI_TX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__ESAI_TX1                           = IOMUX_PAD(0x03A4, 0x005C, 1, 0x0794, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__GPIO1_IO_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__GPIO1_IO_18                        = IOMUX_PAD(0x03A4, 0x005C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__GPIO4_IO25	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__GPIO4_IO25                         = IOMUX_PAD(0x0480, 0x01F4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__GPIO4_IO25	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__GPIO4_IO25                        = IOMUX_PAD(0x0480, 0x01F4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__KPP_COL_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__KPP_COL_6                          = IOMUX_PAD(0x03A4, 0x005C, 3, 0x07CC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__MMDC_DEBUG_41	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__MMDC_DEBUG_41                      = IOMUX_PAD(0x03A4, 0x005C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__PWM5_OUT                           = IOMUX_PAD(0x03A4, 0x005C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__SAI1_TX_SYNC                       = IOMUX_PAD(0x0480, 0x01F4, 6, 0x05EC, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__SAI1_TX_SYNC                      = IOMUX_PAD(0x0480, 0x01F4, 6, 0x05EC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__SIM2_PORT1_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__SIM2_PORT1_CLK                     = IOMUX_PAD(0x0480, 0x01F4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__SIM2_PORT1_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__SIM2_PORT1_CLK                    = IOMUX_PAD(0x0480, 0x01F4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__SPDIF_OUT                          = IOMUX_PAD(0x03A4, 0x005C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__UART6_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__UART6_RX                           = IOMUX_PAD(0x03A4, 0x005C, 4, 0x0858, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__USDHC1_WP                          = IOMUX_PAD(0x0480, 0x01F4, 8, 0x066C, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__USDHC1_WP                         = IOMUX_PAD(0x0480, 0x01F4, 8, 0x066C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA04__USDHC2_DATA4                       = IOMUX_PAD(0x0480, 0x01F4, 1, 0x068C, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA04__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA04__USDHC2_DATA4                      = IOMUX_PAD(0x0480, 0x01F4, 1, 0x068C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA04__VADC_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__VADC_DATA_8                        = IOMUX_PAD(0x03A4, 0x005C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA04__WEIM_DATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA04__WEIM_DATA_19                       = IOMUX_PAD(0x03A4, 0x005C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__CSI1_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__CSI1_DATA_7                        = IOMUX_PAD(0x03A8, 0x0060, 0, 0x06BC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__CSI_DATA07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__CSI_DATA07                         = IOMUX_PAD(0x0484, 0x01F8, 0, 0x04E0, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__CSI_DATA07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__CSI_DATA07                        = IOMUX_PAD(0x0484, 0x01F8, 0, 0x04E0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__ECSPI1_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__ECSPI1_SS0                         = IOMUX_PAD(0x0484, 0x01F8, 3, 0x0540, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__ECSPI1_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__ECSPI1_SS0                        = IOMUX_PAD(0x0484, 0x01F8, 3, 0x0540, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__EIM_AD05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__EIM_AD05                           = IOMUX_PAD(0x0484, 0x01F8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__EIM_AD05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__EIM_AD05                          = IOMUX_PAD(0x0484, 0x01F8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__ESAI_TX4_RX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__ESAI_TX4_RX1                       = IOMUX_PAD(0x03A8, 0x0060, 1, 0x07A0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__GPIO1_IO_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__GPIO1_IO_19                        = IOMUX_PAD(0x03A8, 0x0060, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__GPIO4_IO26	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__GPIO4_IO26                         = IOMUX_PAD(0x0484, 0x01F8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__GPIO4_IO26	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__GPIO4_IO26                        = IOMUX_PAD(0x0484, 0x01F8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__KPP_ROW_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__KPP_ROW_6                          = IOMUX_PAD(0x03A8, 0x0060, 3, 0x07D8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__MMDC_DEBUG_42	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__MMDC_DEBUG_42                      = IOMUX_PAD(0x03A8, 0x0060, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__PWM6_OUT                           = IOMUX_PAD(0x03A8, 0x0060, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__SAI1_TX_BCLK                       = IOMUX_PAD(0x0484, 0x01F8, 6, 0x05E8, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__SAI1_TX_BCLK                      = IOMUX_PAD(0x0484, 0x01F8, 6, 0x05E8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__SIM2_PORT1_RST_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__SIM2_PORT1_RST_B                   = IOMUX_PAD(0x0484, 0x01F8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__SIM2_PORT1_RST_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__SIM2_PORT1_RST_B                  = IOMUX_PAD(0x0484, 0x01F8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__SPDIF_IN                           = IOMUX_PAD(0x03A8, 0x0060, 2, 0x0824, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__UART6_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__UART6_TX                           = IOMUX_PAD(0x03A8, 0x0060, 4, 0x0858, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__USDHC1_CD_B                        = IOMUX_PAD(0x0484, 0x01F8, 8, 0x0668, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__USDHC1_CD_B                       = IOMUX_PAD(0x0484, 0x01F8, 8, 0x0668, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA05__USDHC2_DATA5                       = IOMUX_PAD(0x0484, 0x01F8, 1, 0x0690, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA05__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA05__USDHC2_DATA5                      = IOMUX_PAD(0x0484, 0x01F8, 1, 0x0690, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA05__VADC_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__VADC_DATA_9                        = IOMUX_PAD(0x03A8, 0x0060, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA05__WEIM_DATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA05__WEIM_DATA_18                       = IOMUX_PAD(0x03A8, 0x0060, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__CSI1_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__CSI1_DATA_8                        = IOMUX_PAD(0x03AC, 0x0064, 0, 0x06C0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__CSI_DATA08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__CSI_DATA08                         = IOMUX_PAD(0x0488, 0x01FC, 0, 0x04E4, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__CSI_DATA08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__CSI_DATA08                        = IOMUX_PAD(0x0488, 0x01FC, 0, 0x04E4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__DCIC2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__DCIC2_OUT                          = IOMUX_PAD(0x03AC, 0x0064, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__ECSPI1_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__ECSPI1_MOSI                        = IOMUX_PAD(0x0488, 0x01FC, 3, 0x053C, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__ECSPI1_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__ECSPI1_MOSI                       = IOMUX_PAD(0x0488, 0x01FC, 3, 0x053C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__EIM_AD06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__EIM_AD06                           = IOMUX_PAD(0x0488, 0x01FC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__EIM_AD06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__EIM_AD06                          = IOMUX_PAD(0x0488, 0x01FC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__ESAI_TX2_RX3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__ESAI_TX2_RX3                       = IOMUX_PAD(0x03AC, 0x0064, 1, 0x0798, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__GPIO1_IO_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__GPIO1_IO_20                        = IOMUX_PAD(0x03AC, 0x0064, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__GPIO4_IO27	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__GPIO4_IO27                         = IOMUX_PAD(0x0488, 0x01FC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__GPIO4_IO27	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__GPIO4_IO27                        = IOMUX_PAD(0x0488, 0x01FC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__I2C4_SCL                           = IOMUX_PAD(0x03AC, 0x0064, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__KPP_COL_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__KPP_COL_7                          = IOMUX_PAD(0x03AC, 0x0064, 3, 0x07D0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__MMDC_DEBUG_43	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__MMDC_DEBUG_43                      = IOMUX_PAD(0x03AC, 0x0064, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__SAI1_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__SAI1_RX_DATA                       = IOMUX_PAD(0x0488, 0x01FC, 6, 0x05E4, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__SAI1_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__SAI1_RX_DATA                      = IOMUX_PAD(0x0488, 0x01FC, 6, 0x05E4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__SIM2_PORT1_SVEN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__SIM2_PORT1_SVEN                    = IOMUX_PAD(0x0488, 0x01FC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__SIM2_PORT1_SVEN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__SIM2_PORT1_SVEN                   = IOMUX_PAD(0x0488, 0x01FC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__UART6_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__UART6_RTS_B                        = IOMUX_PAD(0x03AC, 0x0064, 4, 0x0854, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__USDHC1_RESET_B                     = IOMUX_PAD(0x0488, 0x01FC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__USDHC1_RESET_B                    = IOMUX_PAD(0x0488, 0x01FC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA06__USDHC2_DATA6                       = IOMUX_PAD(0x0488, 0x01FC, 1, 0x0694, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA06__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA06__USDHC2_DATA6                      = IOMUX_PAD(0x0488, 0x01FC, 1, 0x0694, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA06__VADC_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__VADC_DATA_10                       = IOMUX_PAD(0x03AC, 0x0064, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA06__WEIM_DATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA06__WEIM_DATA_17                       = IOMUX_PAD(0x03AC, 0x0064, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__CSI1_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__CSI1_DATA_9                        = IOMUX_PAD(0x03B0, 0x0068, 0, 0x06C4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__CSI_DATA09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__CSI_DATA09                         = IOMUX_PAD(0x048C, 0x0200, 0, 0x04E8, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__CSI_DATA09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__CSI_DATA09                        = IOMUX_PAD(0x048C, 0x0200, 0, 0x04E8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__DCIC1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__DCIC1_OUT                          = IOMUX_PAD(0x03B0, 0x0068, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__ECSPI1_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__ECSPI1_MISO                        = IOMUX_PAD(0x048C, 0x0200, 3, 0x0538, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__ECSPI1_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__ECSPI1_MISO                       = IOMUX_PAD(0x048C, 0x0200, 3, 0x0538, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__EIM_AD07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__EIM_AD07                           = IOMUX_PAD(0x048C, 0x0200, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__EIM_AD07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__EIM_AD07                          = IOMUX_PAD(0x048C, 0x0200, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__ESAI_TX3_RX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__ESAI_TX3_RX2                       = IOMUX_PAD(0x03B0, 0x0068, 1, 0x079C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__GPIO1_IO_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__GPIO1_IO_21                        = IOMUX_PAD(0x03B0, 0x0068, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__GPIO4_IO28	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__GPIO4_IO28                         = IOMUX_PAD(0x048C, 0x0200, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__GPIO4_IO28	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__GPIO4_IO28                        = IOMUX_PAD(0x048C, 0x0200, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__I2C4_SDA                           = IOMUX_PAD(0x03B0, 0x0068, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__KPP_ROW_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__KPP_ROW_7                          = IOMUX_PAD(0x03B0, 0x0068, 3, 0x07DC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__MMDC_DEBUG_44	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__MMDC_DEBUG_44                      = IOMUX_PAD(0x03B0, 0x0068, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__SAI1_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__SAI1_TX_DATA                       = IOMUX_PAD(0x048C, 0x0200, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__SAI1_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__SAI1_TX_DATA                      = IOMUX_PAD(0x048C, 0x0200, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__SIM2_PORT1_TRXD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__SIM2_PORT1_TRXD                    = IOMUX_PAD(0x048C, 0x0200, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__SIM2_PORT1_TRXD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__SIM2_PORT1_TRXD                   = IOMUX_PAD(0x048C, 0x0200, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__UART6_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__UART6_CTS_B                        = IOMUX_PAD(0x03B0, 0x0068, 4, 0x0854, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__USDHC1_VSELECT                     = IOMUX_PAD(0x048C, 0x0200, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__USDHC1_VSELECT                    = IOMUX_PAD(0x048C, 0x0200, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_DATA07__USDHC2_DATA7                       = IOMUX_PAD(0x048C, 0x0200, 1, 0x0698, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_DATA07__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_DATA07__USDHC2_DATA7                      = IOMUX_PAD(0x048C, 0x0200, 1, 0x0698, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_DATA07__VADC_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__VADC_DATA_11                       = IOMUX_PAD(0x03B0, 0x0068, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_DATA07__WEIM_DATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_DATA07__WEIM_DATA_16                       = IOMUX_PAD(0x03B0, 0x0068, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD                     = IOMUX_PAD(0x03B4, 0x006C, 2, 0x0678, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__CSI1_HSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__CSI1_HSYNC                          = IOMUX_PAD(0x03B4, 0x006C, 0, 0x0700, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__CSI_HSYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__CSI_HSYNC                           = IOMUX_PAD(0x046C, 0x01E0, 0, 0x0524, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__CSI_HSYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__CSI_HSYNC                          = IOMUX_PAD(0x046C, 0x01E0, 0, 0x0524, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__EIM_LBA_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__EIM_LBA_B                           = IOMUX_PAD(0x046C, 0x01E0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__EIM_LBA_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__EIM_LBA_B                          = IOMUX_PAD(0x046C, 0x01E0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__ESAI_TX0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__ESAI_TX0                            = IOMUX_PAD(0x03B4, 0x006C, 1, 0x0790, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__GPIO1_IO_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__GPIO1_IO_22                         = IOMUX_PAD(0x03B4, 0x006C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__GPIO4_IO20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__GPIO4_IO20                          = IOMUX_PAD(0x046C, 0x01E0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__GPIO4_IO20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__GPIO4_IO20                         = IOMUX_PAD(0x046C, 0x01E0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__I2C2_SCL                            = IOMUX_PAD(0x046C, 0x01E0, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__I2C2_SCL                           = IOMUX_PAD(0x046C, 0x01E0, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__MMDC_DEBUG_35	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__MMDC_DEBUG_35                       = IOMUX_PAD(0x03B4, 0x006C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__MQS_LEFT                            = IOMUX_PAD(0x03B4, 0x006C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__PWM8_OUT                            = IOMUX_PAD(0x046C, 0x01E0, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__PWM8_OUT                           = IOMUX_PAD(0x046C, 0x01E0, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__SAI1_TX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__SAI1_TX_DATA_0                      = IOMUX_PAD(0x03B4, 0x006C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__SIM1_PORT1_PD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__SIM1_PORT1_PD                       = IOMUX_PAD(0x046C, 0x01E0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__SIM1_PORT1_PD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__SIM1_PORT1_PD                      = IOMUX_PAD(0x046C, 0x01E0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__UART4_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__UART4_RTS_B                         = IOMUX_PAD(0x03B4, 0x006C, 3, 0x0844, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__UART6_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__UART6_DCE_CTS                       = IOMUX_PAD(0x046C, 0x01E0, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__UART6_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__UART6_DCE_CTS                      = IOMUX_PAD(0x046C, 0x01E0, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__UART6_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__UART6_DTE_RTS                       = IOMUX_PAD(0x046C, 0x01E0, 8, 0x0648, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__UART6_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__UART6_DTE_RTS                      = IOMUX_PAD(0x046C, 0x01E0, 8, 0x0648, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_HSYNC__USDHC2_CMD                          = IOMUX_PAD(0x046C, 0x01E0, 1, 0x0678, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_HSYNC__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_HSYNC__USDHC2_CMD                         = IOMUX_PAD(0x046C, 0x01E0, 1, 0x0678, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_HSYNC__VADC_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__VADC_DATA_2                         = IOMUX_PAD(0x03B4, 0x006C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_HSYNC__WEIM_DATA_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_HSYNC__WEIM_DATA_25                        = IOMUX_PAD(0x03B4, 0x006C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__ANATOP_32K_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__ANATOP_32K_OUT                       = IOMUX_PAD(0x03B8, 0x0070, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__CSI1_FIELD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__CSI1_FIELD                           = IOMUX_PAD(0x03B8, 0x0070, 7, 0x070C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__CSI1_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__CSI1_MCLK                            = IOMUX_PAD(0x03B8, 0x0070, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__CSI_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__CSI_MCLK                             = IOMUX_PAD(0x0460, 0x01D4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__CSI_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__CSI_MCLK                            = IOMUX_PAD(0x0460, 0x01D4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__EIM_CS0_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__EIM_CS0_B                            = IOMUX_PAD(0x0460, 0x01D4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__EIM_CS0_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__EIM_CS0_B                           = IOMUX_PAD(0x0460, 0x01D4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__ESAI_TX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__ESAI_TX_HF_CLK                       = IOMUX_PAD(0x03B8, 0x0070, 1, 0x0784, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__GPIO1_IO_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__GPIO1_IO_23                          = IOMUX_PAD(0x03B8, 0x0070, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__GPIO4_IO17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__GPIO4_IO17                           = IOMUX_PAD(0x0460, 0x01D4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__GPIO4_IO17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__GPIO4_IO17                          = IOMUX_PAD(0x0460, 0x01D4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__I2C1_SDA                             = IOMUX_PAD(0x0460, 0x01D4, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__I2C1_SDA                            = IOMUX_PAD(0x0460, 0x01D4, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__MMDC_DEBUG_34	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__MMDC_DEBUG_34                        = IOMUX_PAD(0x03B8, 0x0070, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__OSC32K_32K_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__OSC32K_32K_OUT                       = IOMUX_PAD(0x03B8, 0x0070, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__RAWNAND_CE2_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__RAWNAND_CE2_B                        = IOMUX_PAD(0x0460, 0x01D4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__RAWNAND_CE2_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__RAWNAND_CE2_B                       = IOMUX_PAD(0x0460, 0x01D4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL                    = IOMUX_PAD(0x0460, 0x01D4, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL                   = IOMUX_PAD(0x0460, 0x01D4, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__UART4_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__UART4_RX                             = IOMUX_PAD(0x03B8, 0x0070, 3, 0x0848, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__UART6_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__UART6_DCE_TX                         = IOMUX_PAD(0x0460, 0x01D4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__UART6_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__UART6_DCE_TX                        = IOMUX_PAD(0x0460, 0x01D4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__UART6_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__UART6_DTE_RX                         = IOMUX_PAD(0x0460, 0x01D4, 8, 0x064C, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__UART6_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__UART6_DTE_RX                        = IOMUX_PAD(0x0460, 0x01D4, 8, 0x064C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_MCLK__USDHC2_CD_B                          = IOMUX_PAD(0x0460, 0x01D4, 1, 0x0674, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_MCLK__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_MCLK__USDHC2_CD_B                         = IOMUX_PAD(0x0460, 0x01D4, 1, 0x0674, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_MCLK__VADC_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__VADC_DATA_1                          = IOMUX_PAD(0x03B8, 0x0070, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_MCLK__WEIM_DATA_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_MCLK__WEIM_DATA_26                         = IOMUX_PAD(0x03B8, 0x0070, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__ANATOP_24M_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__ANATOP_24M_OUT                     = IOMUX_PAD(0x03BC, 0x0074, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__AUDMUX_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__AUDMUX_MCLK                        = IOMUX_PAD(0x03BC, 0x0074, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__CSI1_PIXCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__CSI1_PIXCLK                        = IOMUX_PAD(0x03BC, 0x0074, 0, 0x0704, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__CSI_PIXCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__CSI_PIXCLK                         = IOMUX_PAD(0x0464, 0x01D8, 0, 0x0528, 1/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__CSI_PIXCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__CSI_PIXCLK                        = IOMUX_PAD(0x0464, 0x01D8, 0, 0x0528, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__EIM_OE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__EIM_OE                             = IOMUX_PAD(0x0464, 0x01D8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__EIM_OE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__EIM_OE                            = IOMUX_PAD(0x0464, 0x01D8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__ESAI_RX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__ESAI_RX_HF_CLK                     = IOMUX_PAD(0x03BC, 0x0074, 1, 0x0780, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__ESAI_TX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__ESAI_TX_HF_CLK                     = IOMUX_PAD(0x03BC, 0x0074, 7, 0x0784, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__GPIO1_IO_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__GPIO1_IO_24                        = IOMUX_PAD(0x03BC, 0x0074, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__GPIO4_IO18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__GPIO4_IO18                         = IOMUX_PAD(0x0464, 0x01D8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__GPIO4_IO18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__GPIO4_IO18                        = IOMUX_PAD(0x0464, 0x01D8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__I2C1_SCL                           = IOMUX_PAD(0x0464, 0x01D8, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__I2C1_SCL                          = IOMUX_PAD(0x0464, 0x01D8, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__MMDC_DEBUG_33	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__MMDC_DEBUG_33                      = IOMUX_PAD(0x03BC, 0x0074, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__RAWNAND_CE3_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__RAWNAND_CE3_B                      = IOMUX_PAD(0x0464, 0x01D8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__RAWNAND_CE3_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__RAWNAND_CE3_B                     = IOMUX_PAD(0x0464, 0x01D8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__SNVS_HP_VIO_5	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__SNVS_HP_VIO_5                      = IOMUX_PAD(0x0464, 0x01D8, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__SNVS_HP_VIO_5	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__SNVS_HP_VIO_5                     = IOMUX_PAD(0x0464, 0x01D8, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__UART4_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__UART4_TX                           = IOMUX_PAD(0x03BC, 0x0074, 3, 0x0848, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__UART6_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__UART6_DCE_RX                       = IOMUX_PAD(0x0464, 0x01D8, 8, 0x064C, 3/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__UART6_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__UART6_DCE_RX                      = IOMUX_PAD(0x0464, 0x01D8, 8, 0x064C, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__UART6_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__UART6_DTE_TX                       = IOMUX_PAD(0x0464, 0x01D8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__UART6_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__UART6_DTE_TX                      = IOMUX_PAD(0x0464, 0x01D8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_PIXCLK__USDHC2_WP                          = IOMUX_PAD(0x0464, 0x01D8, 1, 0x069C, 2/;"	e	enum:__anon661085640103
MX6_PAD_CSI_PIXCLK__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_PIXCLK__USDHC2_WP                         = IOMUX_PAD(0x0464, 0x01D8, 1, 0x069C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_PIXCLK__VADC_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__VADC_CLK                           = IOMUX_PAD(0x03BC, 0x0074, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_PIXCLK__WEIM_DATA_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_PIXCLK__WEIM_DATA_27                       = IOMUX_PAD(0x03BC, 0x0074, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD                     = IOMUX_PAD(0x03C0, 0x0078, 2, 0x0674, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__CSI1_VSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__CSI1_VSYNC                          = IOMUX_PAD(0x03C0, 0x0078, 0, 0x0708, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__CSI_VSYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__CSI_VSYNC                           = IOMUX_PAD(0x0468, 0x01DC, 0, 0x052C, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__CSI_VSYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__CSI_VSYNC                          = IOMUX_PAD(0x0468, 0x01DC, 0, 0x052C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__EIM_RW	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__EIM_RW                              = IOMUX_PAD(0x0468, 0x01DC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__EIM_RW	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__EIM_RW                             = IOMUX_PAD(0x0468, 0x01DC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__ESAI_TX5_RX0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__ESAI_TX5_RX0                        = IOMUX_PAD(0x03C0, 0x0078, 1, 0x07A4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__GPIO1_IO_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__GPIO1_IO_25                         = IOMUX_PAD(0x03C0, 0x0078, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__GPIO4_IO19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__GPIO4_IO19                          = IOMUX_PAD(0x0468, 0x01DC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__GPIO4_IO19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__GPIO4_IO19                         = IOMUX_PAD(0x0468, 0x01DC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__I2C2_SDA                            = IOMUX_PAD(0x0468, 0x01DC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__I2C2_SDA                           = IOMUX_PAD(0x0468, 0x01DC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__MMDC_DEBUG_36	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__MMDC_DEBUG_36                       = IOMUX_PAD(0x03C0, 0x0078, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__MQS_RIGHT                           = IOMUX_PAD(0x03C0, 0x0078, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__PWM7_OUT                            = IOMUX_PAD(0x0468, 0x01DC, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__PWM7_OUT                           = IOMUX_PAD(0x0468, 0x01DC, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__SAI1_RX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__SAI1_RX_DATA_0                      = IOMUX_PAD(0x03C0, 0x0078, 7, 0x07F8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__SIM1_PORT1_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__SIM1_PORT1_CLK                      = IOMUX_PAD(0x0468, 0x01DC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__SIM1_PORT1_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__SIM1_PORT1_CLK                     = IOMUX_PAD(0x0468, 0x01DC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__UART4_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__UART4_CTS_B                         = IOMUX_PAD(0x03C0, 0x0078, 3, 0x0844, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__UART6_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__UART6_DCE_RTS                       = IOMUX_PAD(0x0468, 0x01DC, 8, 0x0648, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__UART6_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__UART6_DCE_RTS                      = IOMUX_PAD(0x0468, 0x01DC, 8, 0x0648, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__UART6_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__UART6_DTE_CTS                       = IOMUX_PAD(0x0468, 0x01DC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__UART6_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__UART6_DTE_CTS                      = IOMUX_PAD(0x0468, 0x01DC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_CSI_VSYNC__USDHC2_CLK                          = IOMUX_PAD(0x0468, 0x01DC, 1, 0x0670, 0/;"	e	enum:__anon661085640103
MX6_PAD_CSI_VSYNC__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_CSI_VSYNC__USDHC2_CLK                         = IOMUX_PAD(0x0468, 0x01DC, 1, 0x0670, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_CSI_VSYNC__VADC_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__VADC_DATA_3                         = IOMUX_PAD(0x03C0, 0x0078, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_CSI_VSYNC__WEIM_DATA_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_CSI_VSYNC__WEIM_DATA_24                        = IOMUX_PAD(0x03C0, 0x0078, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_DECL	arch/arm/include/asm/arch-mx6/mx6-pins.h	/^#define MX6_PAD_DECL(/;"	d
MX6_PAD_DECLARE	arch/arm/include/asm/arch-mx6/mx6-pins.h	/^#define MX6_PAD_DECLARE(/;"	d
MX6_PAD_ECSPI1_MISO__ECSPI_MISO	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_ECSPI1_MISO__ECSPI_MISO				= IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI				= IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK				= IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_ECSPI1_SS0__GPIO4_IO11	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_ECSPI1_SS0__GPIO4_IO11				= IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_ENET1_COL__AUDMUX_AUD4_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__AUDMUX_AUD4_TXC                     = IOMUX_PAD(0x03C4, 0x007C, 2, 0x0654, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__CSI2_DATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__CSI2_DATA_23                        = IOMUX_PAD(0x03C4, 0x007C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__ENET1_COL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__ENET1_COL                           = IOMUX_PAD(0x03C4, 0x007C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__ENET2_MDC                           = IOMUX_PAD(0x03C4, 0x007C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__GPIO2_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__GPIO2_IO_0                          = IOMUX_PAD(0x03C4, 0x007C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__LCDIF2_DATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__LCDIF2_DATA_16                      = IOMUX_PAD(0x03C4, 0x007C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__PCIE_CTRL_DEBUG_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__PCIE_CTRL_DEBUG_31                  = IOMUX_PAD(0x03C4, 0x007C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__SPDIF_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__SPDIF_EXT_CLK                       = IOMUX_PAD(0x03C4, 0x007C, 4, 0x0828, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__UART1_RI_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__UART1_RI_B                          = IOMUX_PAD(0x03C4, 0x007C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_COL__VDEC_DEBUG_37	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_COL__VDEC_DEBUG_37                       = IOMUX_PAD(0x03C4, 0x007C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__AUDMUX_AUD4_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__AUDMUX_AUD4_TXD                     = IOMUX_PAD(0x03C8, 0x0080, 2, 0x0648, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__CSI2_DATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__CSI2_DATA_22                        = IOMUX_PAD(0x03C8, 0x0080, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__ENET1_CRS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__ENET1_CRS                           = IOMUX_PAD(0x03C8, 0x0080, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__ENET2_MDIO                          = IOMUX_PAD(0x03C8, 0x0080, 1, 0x0770, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__GPIO2_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__GPIO2_IO_1                          = IOMUX_PAD(0x03C8, 0x0080, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__LCDIF2_DATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__LCDIF2_DATA_17                      = IOMUX_PAD(0x03C8, 0x0080, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__PCIE_CTRL_DEBUG_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__PCIE_CTRL_DEBUG_30                  = IOMUX_PAD(0x03C8, 0x0080, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__SPDIF_LOCK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__SPDIF_LOCK                          = IOMUX_PAD(0x03C8, 0x0080, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__UART1_DCD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__UART1_DCD_B                         = IOMUX_PAD(0x03C8, 0x0080, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_CRS__VDEC_DEBUG_36	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_CRS__VDEC_DEBUG_36                       = IOMUX_PAD(0x03C8, 0x0080, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__ANATOP_24M_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__ANATOP_24M_OUT                      = IOMUX_PAD(0x03CC, 0x0084, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__AUDMUX_AUD3_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__AUDMUX_AUD3_RXFS                    = IOMUX_PAD(0x03CC, 0x0084, 2, 0x0638, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__ENET1_MDC                           = IOMUX_PAD(0x03CC, 0x0084, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__ENET2_MDC                           = IOMUX_PAD(0x03CC, 0x0084, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__EPIT2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__EPIT2_OUT                           = IOMUX_PAD(0x03CC, 0x0084, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__GPIO2_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__GPIO2_IO_2                          = IOMUX_PAD(0x03CC, 0x0084, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__PWM7_OUT                            = IOMUX_PAD(0x03CC, 0x0084, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDC__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDC__USB_OTG1_PWR                        = IOMUX_PAD(0x03CC, 0x0084, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__AUDMUX_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__AUDMUX_MCLK                        = IOMUX_PAD(0x03D0, 0x0088, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__ENET1_MDIO                         = IOMUX_PAD(0x03D0, 0x0088, 0, 0x0764, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__ENET2_MDIO                         = IOMUX_PAD(0x03D0, 0x0088, 1, 0x0770, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__EPIT1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__EPIT1_OUT                          = IOMUX_PAD(0x03D0, 0x0088, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__GPIO2_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__GPIO2_IO_3                         = IOMUX_PAD(0x03D0, 0x0088, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__OSC32K_32K_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__OSC32K_32K_OUT                     = IOMUX_PAD(0x03D0, 0x0088, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__PWM8_OUT                           = IOMUX_PAD(0x03D0, 0x0088, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_MDIO__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_MDIO__USB_OTG1_OC                        = IOMUX_PAD(0x03D0, 0x0088, 6, 0x0860, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__AUDMUX_AUD4_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__AUDMUX_AUD4_TXFS                 = IOMUX_PAD(0x03D4, 0x008C, 2, 0x0658, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__CSI2_DATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__CSI2_DATA_21                     = IOMUX_PAD(0x03D4, 0x008C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__ENET1_REF_CLK_25M                = IOMUX_PAD(0x03D4, 0x008C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__ENET1_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__ENET1_RX_CLK                     = IOMUX_PAD(0x03D4, 0x008C, 0, 0x0768, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__GPIO2_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__GPIO2_IO_4                       = IOMUX_PAD(0x03D4, 0x008C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__LCDIF2_DATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__LCDIF2_DATA_18                   = IOMUX_PAD(0x03D4, 0x008C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__PCIE_CTRL_DEBUG_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__PCIE_CTRL_DEBUG_29               = IOMUX_PAD(0x03D4, 0x008C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__SPDIF_OUT                        = IOMUX_PAD(0x03D4, 0x008C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__UART1_DSR_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__UART1_DSR_B                      = IOMUX_PAD(0x03D4, 0x008C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_CLK__VDEC_DEBUG_35	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_RX_CLK__VDEC_DEBUG_35                    = IOMUX_PAD(0x03D4, 0x008C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_RX_DATA0__CSI_DATA16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__CSI_DATA16                     = IOMUX_PAD(0x0350, 0x00C4, 3, 0x0504, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__CSI_DATA16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__CSI_DATA16                    = IOMUX_PAD(0x0350, 0x00C4, 3, 0x0504, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00                  = IOMUX_PAD(0x0350, 0x00C4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00                 = IOMUX_PAD(0x0350, 0x00C4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__FLEXCAN1_TX                    = IOMUX_PAD(0x0350, 0x00C4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__FLEXCAN1_TX                   = IOMUX_PAD(0x0350, 0x00C4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__GPIO2_IO00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__GPIO2_IO00                     = IOMUX_PAD(0x0350, 0x00C4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__GPIO2_IO00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__GPIO2_IO00                    = IOMUX_PAD(0x0350, 0x00C4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__KPP_ROW00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__KPP_ROW00                      = IOMUX_PAD(0x0350, 0x00C4, 6, 0x05D0, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__KPP_ROW00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__KPP_ROW00                     = IOMUX_PAD(0x0350, 0x00C4, 6, 0x05D0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__PWM1_OUT                       = IOMUX_PAD(0x0350, 0x00C4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__PWM1_OUT                      = IOMUX_PAD(0x0350, 0x00C4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__UART4_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__UART4_DCE_RTS                  = IOMUX_PAD(0x0350, 0x00C4, 1, 0x0638, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__UART4_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__UART4_DCE_RTS                 = IOMUX_PAD(0x0350, 0x00C4, 1, 0x0638, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__UART4_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__UART4_DTE_CTS                  = IOMUX_PAD(0x0350, 0x00C4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__UART4_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__UART4_DTE_CTS                 = IOMUX_PAD(0x0350, 0x00C4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA0__USDHC1_LCTL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__USDHC1_LCTL                    = IOMUX_PAD(0x0350, 0x00C4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA0__USDHC1_LCTL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA0__USDHC1_LCTL                   = IOMUX_PAD(0x0350, 0x00C4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__CSI_DATA17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__CSI_DATA17                     = IOMUX_PAD(0x0354, 0x00C8, 3, 0x0508, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__CSI_DATA17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__CSI_DATA17                    = IOMUX_PAD(0x0354, 0x00C8, 3, 0x0508, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01                  = IOMUX_PAD(0x0354, 0x00C8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01                 = IOMUX_PAD(0x0354, 0x00C8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__FLEXCAN1_RX                    = IOMUX_PAD(0x0354, 0x00C8, 4, 0x0584, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__FLEXCAN1_RX                   = IOMUX_PAD(0x0354, 0x00C8, 4, 0x0584, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__GPIO2_IO01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__GPIO2_IO01                     = IOMUX_PAD(0x0354, 0x00C8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__GPIO2_IO01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__GPIO2_IO01                    = IOMUX_PAD(0x0354, 0x00C8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__KPP_COL00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__KPP_COL00                      = IOMUX_PAD(0x0354, 0x00C8, 6, 0x05C4, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__KPP_COL00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__KPP_COL00                     = IOMUX_PAD(0x0354, 0x00C8, 6, 0x05C4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__PWM2_OUT                       = IOMUX_PAD(0x0354, 0x00C8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__PWM2_OUT                      = IOMUX_PAD(0x0354, 0x00C8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__UART4_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__UART4_DCE_CTS                  = IOMUX_PAD(0x0354, 0x00C8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__UART4_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__UART4_DCE_CTS                 = IOMUX_PAD(0x0354, 0x00C8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__UART4_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__UART4_DTE_RTS                  = IOMUX_PAD(0x0354, 0x00C8, 1, 0x0638, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__UART4_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__UART4_DTE_RTS                 = IOMUX_PAD(0x0354, 0x00C8, 1, 0x0638, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_DATA1__USDHC2_LCTL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__USDHC2_LCTL                    = IOMUX_PAD(0x0354, 0x00C8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_DATA1__USDHC2_LCTL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_DATA1__USDHC2_LCTL                   = IOMUX_PAD(0x0354, 0x00C8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__CSI_DATA18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__CSI_DATA18                        = IOMUX_PAD(0x0358, 0x00CC, 3, 0x050C, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__CSI_DATA18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__CSI_DATA18                       = IOMUX_PAD(0x0358, 0x00CC, 3, 0x050C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__ENET1_RX_EN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__ENET1_RX_EN                       = IOMUX_PAD(0x0358, 0x00CC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__ENET1_RX_EN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__ENET1_RX_EN                      = IOMUX_PAD(0x0358, 0x00CC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__FLEXCAN2_TX                       = IOMUX_PAD(0x0358, 0x00CC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__FLEXCAN2_TX                      = IOMUX_PAD(0x0358, 0x00CC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__GPIO2_IO02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__GPIO2_IO02                        = IOMUX_PAD(0x0358, 0x00CC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__GPIO2_IO02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__GPIO2_IO02                       = IOMUX_PAD(0x0358, 0x00CC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__KPP_ROW01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__KPP_ROW01                         = IOMUX_PAD(0x0358, 0x00CC, 6, 0x05D4, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__KPP_ROW01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__KPP_ROW01                        = IOMUX_PAD(0x0358, 0x00CC, 6, 0x05D4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS                     = IOMUX_PAD(0x0358, 0x00CC, 1, 0x0640, 3/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS                    = IOMUX_PAD(0x0358, 0x00CC, 1, 0x0640, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__UART5_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__UART5_DTE_CTS                     = IOMUX_PAD(0x0358, 0x00CC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__UART5_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__UART5_DTE_CTS                    = IOMUX_PAD(0x0358, 0x00CC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_EN__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_EN__USDHC1_VSELECT                    = IOMUX_PAD(0x0358, 0x00CC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_EN__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_EN__USDHC1_VSELECT                   = IOMUX_PAD(0x0358, 0x00CC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__CSI_DATA23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__CSI_DATA23                        = IOMUX_PAD(0x036C, 0x00E0, 3, 0x0520, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__CSI_DATA23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__CSI_DATA23                       = IOMUX_PAD(0x036C, 0x00E0, 3, 0x0520, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__EIM_CRE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__EIM_CRE                           = IOMUX_PAD(0x036C, 0x00E0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__EIM_CRE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__EIM_CRE                          = IOMUX_PAD(0x036C, 0x00E0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__ENET1_RX_ER	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__ENET1_RX_ER                       = IOMUX_PAD(0x036C, 0x00E0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__ENET1_RX_ER	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__ENET1_RX_ER                      = IOMUX_PAD(0x036C, 0x00E0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__GPIO2_IO07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__GPIO2_IO07                        = IOMUX_PAD(0x036C, 0x00E0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__GPIO2_IO07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__GPIO2_IO07                       = IOMUX_PAD(0x036C, 0x00E0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__GPT1_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__GPT1_CAPTURE2                     = IOMUX_PAD(0x036C, 0x00E0, 8, 0x0590, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__GPT1_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__GPT1_CAPTURE2                    = IOMUX_PAD(0x036C, 0x00E0, 8, 0x0590, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__KPP_COL03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__KPP_COL03                         = IOMUX_PAD(0x036C, 0x00E0, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__KPP_COL03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__KPP_COL03                        = IOMUX_PAD(0x036C, 0x00E0, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__PWM8_OUT                          = IOMUX_PAD(0x036C, 0x00E0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__PWM8_OUT                         = IOMUX_PAD(0x036C, 0x00E0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__UART7_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__UART7_DCE_RTS                     = IOMUX_PAD(0x036C, 0x00E0, 1, 0x0650, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__UART7_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__UART7_DCE_RTS                    = IOMUX_PAD(0x036C, 0x00E0, 1, 0x0650, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_RX_ER__UART7_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_RX_ER__UART7_DTE_CTS                     = IOMUX_PAD(0x036C, 0x00E0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_RX_ER__UART7_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_RX_ER__UART7_DTE_CTS                    = IOMUX_PAD(0x036C, 0x00E0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__AUDMUX_AUD4_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__AUDMUX_AUD4_RXD                  = IOMUX_PAD(0x03D8, 0x0090, 2, 0x0644, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__CSI2_DATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__CSI2_DATA_20                     = IOMUX_PAD(0x03D8, 0x0090, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__CSI_DATA22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__CSI_DATA22                       = IOMUX_PAD(0x0368, 0x00DC, 3, 0x051C, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__CSI_DATA22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__CSI_DATA22                      = IOMUX_PAD(0x0368, 0x00DC, 3, 0x051C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1                   = IOMUX_PAD(0x03D8, 0x0090, 1, 0x0760, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1                   = IOMUX_PAD(0x0368, 0x00DC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1                  = IOMUX_PAD(0x0368, 0x00DC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK                     = IOMUX_PAD(0x03D8, 0x0090, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK                     = IOMUX_PAD(0x0368, 0x00DC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK                    = IOMUX_PAD(0x0368, 0x00DC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__GPIO2_IO06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__GPIO2_IO06                       = IOMUX_PAD(0x0368, 0x00DC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__GPIO2_IO06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__GPIO2_IO06                      = IOMUX_PAD(0x0368, 0x00DC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__GPIO2_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__GPIO2_IO_5                       = IOMUX_PAD(0x03D8, 0x0090, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__GPT1_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__GPT1_CLK                         = IOMUX_PAD(0x0368, 0x00DC, 8, 0x0594, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__GPT1_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__GPT1_CLK                        = IOMUX_PAD(0x0368, 0x00DC, 8, 0x0594, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__KPP_ROW03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__KPP_ROW03                        = IOMUX_PAD(0x0368, 0x00DC, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__KPP_ROW03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__KPP_ROW03                       = IOMUX_PAD(0x0368, 0x00DC, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__LCDIF2_DATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__LCDIF2_DATA_19                   = IOMUX_PAD(0x03D8, 0x0090, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__PCIE_CTRL_DEBUG_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__PCIE_CTRL_DEBUG_28               = IOMUX_PAD(0x03D8, 0x0090, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__PWM7_OUT                         = IOMUX_PAD(0x0368, 0x00DC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__PWM7_OUT                        = IOMUX_PAD(0x0368, 0x00DC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__SPDIF_SR_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__SPDIF_SR_CLK                     = IOMUX_PAD(0x03D8, 0x0090, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__UART1_DTR_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__UART1_DTR_B                      = IOMUX_PAD(0x03D8, 0x0090, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_CLK__UART7_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__UART7_DCE_CTS                    = IOMUX_PAD(0x0368, 0x00DC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__UART7_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__UART7_DCE_CTS                   = IOMUX_PAD(0x0368, 0x00DC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__UART7_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_CLK__UART7_DTE_RTS                    = IOMUX_PAD(0x0368, 0x00DC, 1, 0x0650, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_CLK__UART7_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_CLK__UART7_DTE_RTS                   = IOMUX_PAD(0x0368, 0x00DC, 1, 0x0650, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_CLK__VDEC_DEBUG_34	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET1_TX_CLK__VDEC_DEBUG_34                    = IOMUX_PAD(0x03D8, 0x0090, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET1_TX_DATA0__CSI_DATA19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__CSI_DATA19                     = IOMUX_PAD(0x035C, 0x00D0, 3, 0x0510, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__CSI_DATA19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__CSI_DATA19                    = IOMUX_PAD(0x035C, 0x00D0, 3, 0x0510, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00                  = IOMUX_PAD(0x035C, 0x00D0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00                 = IOMUX_PAD(0x035C, 0x00D0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__FLEXCAN2_RX                    = IOMUX_PAD(0x035C, 0x00D0, 4, 0x0588, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__FLEXCAN2_RX                   = IOMUX_PAD(0x035C, 0x00D0, 4, 0x0588, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__GPIO2_IO03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__GPIO2_IO03                     = IOMUX_PAD(0x035C, 0x00D0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__GPIO2_IO03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__GPIO2_IO03                    = IOMUX_PAD(0x035C, 0x00D0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__KPP_COL01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__KPP_COL01                      = IOMUX_PAD(0x035C, 0x00D0, 6, 0x05C8, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__KPP_COL01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__KPP_COL01                     = IOMUX_PAD(0x035C, 0x00D0, 6, 0x05C8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__UART5_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__UART5_DCE_CTS                  = IOMUX_PAD(0x035C, 0x00D0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__UART5_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__UART5_DCE_CTS                 = IOMUX_PAD(0x035C, 0x00D0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS                  = IOMUX_PAD(0x035C, 0x00D0, 1, 0x0640, 4/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS                 = IOMUX_PAD(0x035C, 0x00D0, 1, 0x0640, 4,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA0__USDHC2_VSELECT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__USDHC2_VSELECT                 = IOMUX_PAD(0x035C, 0x00D0, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA0__USDHC2_VSELECT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA0__USDHC2_VSELECT                = IOMUX_PAD(0x035C, 0x00D0, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__CSI_DATA20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__CSI_DATA20                     = IOMUX_PAD(0x0360, 0x00D4, 3, 0x0514, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__CSI_DATA20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__CSI_DATA20                    = IOMUX_PAD(0x0360, 0x00D4, 3, 0x0514, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01                  = IOMUX_PAD(0x0360, 0x00D4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01                 = IOMUX_PAD(0x0360, 0x00D4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO                     = IOMUX_PAD(0x0360, 0x00D4, 4, 0x0580, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO                    = IOMUX_PAD(0x0360, 0x00D4, 4, 0x0580, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__GPIO2_IO04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__GPIO2_IO04                     = IOMUX_PAD(0x0360, 0x00D4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__GPIO2_IO04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__GPIO2_IO04                    = IOMUX_PAD(0x0360, 0x00D4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__KPP_ROW02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__KPP_ROW02                      = IOMUX_PAD(0x0360, 0x00D4, 6, 0x05D8, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__KPP_ROW02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__KPP_ROW02                     = IOMUX_PAD(0x0360, 0x00D4, 6, 0x05D8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__PWM5_OUT                       = IOMUX_PAD(0x0360, 0x00D4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__PWM5_OUT                      = IOMUX_PAD(0x0360, 0x00D4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__UART6_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__UART6_DCE_CTS                  = IOMUX_PAD(0x0360, 0x00D4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__UART6_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__UART6_DCE_CTS                 = IOMUX_PAD(0x0360, 0x00D4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__UART6_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__UART6_DTE_RTS                  = IOMUX_PAD(0x0360, 0x00D4, 1, 0x0648, 2/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__UART6_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__UART6_DTE_RTS                 = IOMUX_PAD(0x0360, 0x00D4, 1, 0x0648, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB           = IOMUX_PAD(0x0360, 0x00D4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB          = IOMUX_PAD(0x0360, 0x00D4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__CSI_DATA21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__CSI_DATA21                        = IOMUX_PAD(0x0364, 0x00D8, 3, 0x0518, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__CSI_DATA21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__CSI_DATA21                       = IOMUX_PAD(0x0364, 0x00D8, 3, 0x0518, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__ENET1_TX_EN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__ENET1_TX_EN                       = IOMUX_PAD(0x0364, 0x00D8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__ENET1_TX_EN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__ENET1_TX_EN                      = IOMUX_PAD(0x0364, 0x00D8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__ENET2_MDC                         = IOMUX_PAD(0x0364, 0x00D8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__ENET2_MDC                        = IOMUX_PAD(0x0364, 0x00D8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__GPIO2_IO05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__GPIO2_IO05                        = IOMUX_PAD(0x0364, 0x00D8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__GPIO2_IO05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__GPIO2_IO05                       = IOMUX_PAD(0x0364, 0x00D8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__KPP_COL02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__KPP_COL02                         = IOMUX_PAD(0x0364, 0x00D8, 6, 0x05CC, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__KPP_COL02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__KPP_COL02                        = IOMUX_PAD(0x0364, 0x00D8, 6, 0x05CC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__PWM6_OUT                          = IOMUX_PAD(0x0364, 0x00D8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__PWM6_OUT                         = IOMUX_PAD(0x0364, 0x00D8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__UART6_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__UART6_DCE_RTS                     = IOMUX_PAD(0x0364, 0x00D8, 1, 0x0648, 3/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__UART6_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__UART6_DCE_RTS                    = IOMUX_PAD(0x0364, 0x00D8, 1, 0x0648, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__UART6_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__UART6_DTE_CTS                     = IOMUX_PAD(0x0364, 0x00D8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__UART6_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__UART6_DTE_CTS                    = IOMUX_PAD(0x0364, 0x00D8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB              = IOMUX_PAD(0x0364, 0x00D8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB             = IOMUX_PAD(0x0364, 0x00D8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_COL__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__ANATOP_OTG1_ID                      = IOMUX_PAD(0x03DC, 0x0094, 6, 0x0624, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__AUDMUX_AUD4_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__AUDMUX_AUD4_RXC                     = IOMUX_PAD(0x03DC, 0x0094, 2, 0x064C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__ENET1_MDC                           = IOMUX_PAD(0x03DC, 0x0094, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__ENET2_COL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__ENET2_COL                           = IOMUX_PAD(0x03DC, 0x0094, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__GPIO2_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__GPIO2_IO_6                          = IOMUX_PAD(0x03DC, 0x0094, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__LCDIF2_DATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__LCDIF2_DATA_20                      = IOMUX_PAD(0x03DC, 0x0094, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__PCIE_CTRL_DEBUG_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__PCIE_CTRL_DEBUG_27                  = IOMUX_PAD(0x03DC, 0x0094, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__SPDIF_IN                            = IOMUX_PAD(0x03DC, 0x0094, 4, 0x0824, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__UART1_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__UART1_RX                            = IOMUX_PAD(0x03DC, 0x0094, 3, 0x0830, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_COL__VDEC_DEBUG_33	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_COL__VDEC_DEBUG_33                       = IOMUX_PAD(0x03DC, 0x0094, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__ANATOP_OTG2_ID                      = IOMUX_PAD(0x03E0, 0x0098, 6, 0x0628, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__AUDMUX_AUD4_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__AUDMUX_AUD4_RXFS                    = IOMUX_PAD(0x03E0, 0x0098, 2, 0x0650, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__ENET1_MDIO                          = IOMUX_PAD(0x03E0, 0x0098, 1, 0x0764, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__ENET2_CRS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__ENET2_CRS                           = IOMUX_PAD(0x03E0, 0x0098, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__GPIO2_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__GPIO2_IO_7                          = IOMUX_PAD(0x03E0, 0x0098, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__LCDIF2_DATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__LCDIF2_DATA_21                      = IOMUX_PAD(0x03E0, 0x0098, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__MLB_SIG	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__MLB_SIG                             = IOMUX_PAD(0x03E0, 0x0098, 4, 0x07F0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__PCIE_CTRL_DEBUG_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__PCIE_CTRL_DEBUG_26                  = IOMUX_PAD(0x03E0, 0x0098, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__UART1_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__UART1_TX                            = IOMUX_PAD(0x03E0, 0x0098, 3, 0x0830, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_CRS__VDEC_DEBUG_32	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_CRS__VDEC_DEBUG_32                       = IOMUX_PAD(0x03E0, 0x0098, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M                = IOMUX_PAD(0x03E4, 0x009C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__ENET2_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__ENET2_RX_CLK                     = IOMUX_PAD(0x03E4, 0x009C, 0, 0x0774, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__GPIO2_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__GPIO2_IO_8                       = IOMUX_PAD(0x03E4, 0x009C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__I2C3_SCL                         = IOMUX_PAD(0x03E4, 0x009C, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__LCDIF2_DATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__LCDIF2_DATA_22                   = IOMUX_PAD(0x03E4, 0x009C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__MLB_DATA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__MLB_DATA                         = IOMUX_PAD(0x03E4, 0x009C, 4, 0x07EC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__PCIE_CTRL_DEBUG_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__PCIE_CTRL_DEBUG_25               = IOMUX_PAD(0x03E4, 0x009C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__UART1_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__UART1_RTS_B                      = IOMUX_PAD(0x03E4, 0x009C, 3, 0x082C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__USB_OTG2_OC                      = IOMUX_PAD(0x03E4, 0x009C, 6, 0x085C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_CLK__VDEC_DEBUG_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_RX_CLK__VDEC_DEBUG_31                    = IOMUX_PAD(0x03E4, 0x009C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_RX_DATA0__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__ENET1_MDIO                     = IOMUX_PAD(0x0370, 0x00E4, 4, 0x0578, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__ENET1_MDIO                    = IOMUX_PAD(0x0370, 0x00E4, 4, 0x0578, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00                  = IOMUX_PAD(0x0370, 0x00E4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00                 = IOMUX_PAD(0x0370, 0x00E4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__GPIO2_IO08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__GPIO2_IO08                     = IOMUX_PAD(0x0370, 0x00E4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__GPIO2_IO08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__GPIO2_IO08                    = IOMUX_PAD(0x0370, 0x00E4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__I2C3_SCL                       = IOMUX_PAD(0x0370, 0x00E4, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__I2C3_SCL                      = IOMUX_PAD(0x0370, 0x00E4, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__KPP_ROW04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__KPP_ROW04                      = IOMUX_PAD(0x0370, 0x00E4, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__KPP_ROW04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__KPP_ROW04                     = IOMUX_PAD(0x0370, 0x00E4, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD                = IOMUX_PAD(0x0370, 0x00E4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD               = IOMUX_PAD(0x0370, 0x00E4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__UART6_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__UART6_DCE_TX                   = IOMUX_PAD(0x0370, 0x00E4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__UART6_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__UART6_DCE_TX                  = IOMUX_PAD(0x0370, 0x00E4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__UART6_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__UART6_DTE_RX                   = IOMUX_PAD(0x0370, 0x00E4, 1, 0x064C, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__UART6_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__UART6_DTE_RX                  = IOMUX_PAD(0x0370, 0x00E4, 1, 0x064C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA0__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__USB_OTG1_PWR                   = IOMUX_PAD(0x0370, 0x00E4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA0__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA0__USB_OTG1_PWR                  = IOMUX_PAD(0x0370, 0x00E4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__ENET1_MDC                      = IOMUX_PAD(0x0374, 0x00E8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__ENET1_MDC                     = IOMUX_PAD(0x0374, 0x00E8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01                  = IOMUX_PAD(0x0374, 0x00E8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01                 = IOMUX_PAD(0x0374, 0x00E8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__GPIO2_IO09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__GPIO2_IO09                     = IOMUX_PAD(0x0374, 0x00E8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__GPIO2_IO09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__GPIO2_IO09                    = IOMUX_PAD(0x0374, 0x00E8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__I2C3_SDA                       = IOMUX_PAD(0x0374, 0x00E8, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__I2C3_SDA                      = IOMUX_PAD(0x0374, 0x00E8, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__KPP_COL04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__KPP_COL04                      = IOMUX_PAD(0x0374, 0x00E8, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__KPP_COL04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__KPP_COL04                     = IOMUX_PAD(0x0374, 0x00E8, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__SIM1_PORT0_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__SIM1_PORT0_CLK                 = IOMUX_PAD(0x0374, 0x00E8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__SIM1_PORT0_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__SIM1_PORT0_CLK                = IOMUX_PAD(0x0374, 0x00E8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__UART6_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__UART6_DCE_RX                   = IOMUX_PAD(0x0374, 0x00E8, 1, 0x064C, 2/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__UART6_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__UART6_DCE_RX                  = IOMUX_PAD(0x0374, 0x00E8, 1, 0x064C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__UART6_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__UART6_DTE_TX                   = IOMUX_PAD(0x0374, 0x00E8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__UART6_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__UART6_DTE_TX                  = IOMUX_PAD(0x0374, 0x00E8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_DATA1__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__USB_OTG1_OC                    = IOMUX_PAD(0x0374, 0x00E8, 8, 0x0664, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_DATA1__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_DATA1__USB_OTG1_OC                   = IOMUX_PAD(0x0374, 0x00E8, 8, 0x0664, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__EIM_ADDR26	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__EIM_ADDR26                        = IOMUX_PAD(0x0378, 0x00EC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__EIM_ADDR26	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__EIM_ADDR26                       = IOMUX_PAD(0x0378, 0x00EC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M                 = IOMUX_PAD(0x0378, 0x00EC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M                = IOMUX_PAD(0x0378, 0x00EC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__ENET2_RX_EN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__ENET2_RX_EN                       = IOMUX_PAD(0x0378, 0x00EC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__ENET2_RX_EN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__ENET2_RX_EN                      = IOMUX_PAD(0x0378, 0x00EC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__GPIO2_IO10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__GPIO2_IO10                        = IOMUX_PAD(0x0378, 0x00EC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__GPIO2_IO10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__GPIO2_IO10                       = IOMUX_PAD(0x0378, 0x00EC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__I2C4_SCL                          = IOMUX_PAD(0x0378, 0x00EC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__I2C4_SCL                         = IOMUX_PAD(0x0378, 0x00EC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__KPP_ROW05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__KPP_ROW05                         = IOMUX_PAD(0x0378, 0x00EC, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__KPP_ROW05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__KPP_ROW05                        = IOMUX_PAD(0x0378, 0x00EC, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B                  = IOMUX_PAD(0x0378, 0x00EC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B                 = IOMUX_PAD(0x0378, 0x00EC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__UART7_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__UART7_DCE_TX                      = IOMUX_PAD(0x0378, 0x00EC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__UART7_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__UART7_DCE_TX                     = IOMUX_PAD(0x0378, 0x00EC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_EN__UART7_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_EN__UART7_DTE_RX                      = IOMUX_PAD(0x0378, 0x00EC, 1, 0x0654, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_EN__UART7_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_EN__UART7_DTE_RX                     = IOMUX_PAD(0x0378, 0x00EC, 1, 0x0654, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__ECSPI4_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__ECSPI4_SS0                        = IOMUX_PAD(0x038C, 0x0100, 3, 0x0570, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__ECSPI4_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__ECSPI4_SS0                       = IOMUX_PAD(0x038C, 0x0100, 3, 0x0570, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__EIM_ADDR25	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__EIM_ADDR25                        = IOMUX_PAD(0x038C, 0x0100, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__EIM_ADDR25	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__EIM_ADDR25                       = IOMUX_PAD(0x038C, 0x0100, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__ENET2_RX_ER	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__ENET2_RX_ER                       = IOMUX_PAD(0x038C, 0x0100, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__ENET2_RX_ER	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__ENET2_RX_ER                      = IOMUX_PAD(0x038C, 0x0100, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__GPIO2_IO15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__GPIO2_IO15                        = IOMUX_PAD(0x038C, 0x0100, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__GPIO2_IO15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__GPIO2_IO15                       = IOMUX_PAD(0x038C, 0x0100, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__KPP_COL07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__KPP_COL07                         = IOMUX_PAD(0x038C, 0x0100, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__KPP_COL07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__KPP_COL07                        = IOMUX_PAD(0x038C, 0x0100, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN                   = IOMUX_PAD(0x038C, 0x0100, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN                  = IOMUX_PAD(0x038C, 0x0100, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__UART8_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__UART8_DCE_RTS                     = IOMUX_PAD(0x038C, 0x0100, 1, 0x0658, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__UART8_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__UART8_DCE_RTS                    = IOMUX_PAD(0x038C, 0x0100, 1, 0x0658, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__UART8_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__UART8_DTE_CTS                     = IOMUX_PAD(0x038C, 0x0100, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__UART8_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__UART8_DTE_CTS                    = IOMUX_PAD(0x038C, 0x0100, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY                    = IOMUX_PAD(0x038C, 0x0100, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY                   = IOMUX_PAD(0x038C, 0x0100, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID                   = IOMUX_PAD(0x0388, 0x00FC, 8, 0x04BC, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID                  = IOMUX_PAD(0x0388, 0x00FC, 8, 0x04BC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__ECSPI4_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ECSPI4_MISO                      = IOMUX_PAD(0x0388, 0x00FC, 3, 0x0568, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__ECSPI4_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ECSPI4_MISO                     = IOMUX_PAD(0x0388, 0x00FC, 3, 0x0568, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2                   = IOMUX_PAD(0x03E8, 0x00A0, 1, 0x076C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2                   = IOMUX_PAD(0x0388, 0x00FC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2                  = IOMUX_PAD(0x0388, 0x00FC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK                     = IOMUX_PAD(0x03E8, 0x00A0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK                     = IOMUX_PAD(0x0388, 0x00FC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK                    = IOMUX_PAD(0x0388, 0x00FC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__GPIO2_IO14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__GPIO2_IO14                       = IOMUX_PAD(0x0388, 0x00FC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__GPIO2_IO14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__GPIO2_IO14                      = IOMUX_PAD(0x0388, 0x00FC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__GPIO2_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__GPIO2_IO_9                       = IOMUX_PAD(0x03E8, 0x00A0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__I2C3_SDA                         = IOMUX_PAD(0x03E8, 0x00A0, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__KPP_ROW07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__KPP_ROW07                        = IOMUX_PAD(0x0388, 0x00FC, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__KPP_ROW07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__KPP_ROW07                       = IOMUX_PAD(0x0388, 0x00FC, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__LCDIF2_DATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__LCDIF2_DATA_23                   = IOMUX_PAD(0x03E8, 0x00A0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__MLB_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__MLB_CLK                          = IOMUX_PAD(0x03E8, 0x00A0, 4, 0x07E8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__PCIE_CTRL_DEBUG_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__PCIE_CTRL_DEBUG_24               = IOMUX_PAD(0x03E8, 0x00A0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B                 = IOMUX_PAD(0x0388, 0x00FC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B                = IOMUX_PAD(0x0388, 0x00FC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__UART1_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__UART1_CTS_B                      = IOMUX_PAD(0x03E8, 0x00A0, 3, 0x082C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__UART8_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__UART8_DCE_CTS                    = IOMUX_PAD(0x0388, 0x00FC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__UART8_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__UART8_DCE_CTS                   = IOMUX_PAD(0x0388, 0x00FC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__UART8_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_CLK__UART8_DTE_RTS                    = IOMUX_PAD(0x0388, 0x00FC, 1, 0x0658, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_CLK__UART8_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_CLK__UART8_DTE_RTS                   = IOMUX_PAD(0x0388, 0x00FC, 1, 0x0658, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_CLK__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__USB_OTG2_PWR                     = IOMUX_PAD(0x03E8, 0x00A0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_CLK__VDEC_DEBUG_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_ENET2_TX_CLK__VDEC_DEBUG_30                    = IOMUX_PAD(0x03E8, 0x00A0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_ENET2_TX_DATA0__EIM_EB_B02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__EIM_EB_B02                     = IOMUX_PAD(0x037C, 0x00F0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__EIM_EB_B02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__EIM_EB_B02                    = IOMUX_PAD(0x037C, 0x00F0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00                  = IOMUX_PAD(0x037C, 0x00F0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00                 = IOMUX_PAD(0x037C, 0x00F0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__GPIO2_IO11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__GPIO2_IO11                     = IOMUX_PAD(0x037C, 0x00F0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__GPIO2_IO11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__GPIO2_IO11                    = IOMUX_PAD(0x037C, 0x00F0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__I2C4_SDA                       = IOMUX_PAD(0x037C, 0x00F0, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__I2C4_SDA                      = IOMUX_PAD(0x037C, 0x00F0, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__KPP_COL05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__KPP_COL05                      = IOMUX_PAD(0x037C, 0x00F0, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__KPP_COL05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__KPP_COL05                     = IOMUX_PAD(0x037C, 0x00F0, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN                = IOMUX_PAD(0x037C, 0x00F0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN               = IOMUX_PAD(0x037C, 0x00F0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__UART7_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__UART7_DCE_RX                   = IOMUX_PAD(0x037C, 0x00F0, 1, 0x0654, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__UART7_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__UART7_DCE_RX                  = IOMUX_PAD(0x037C, 0x00F0, 1, 0x0654, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA0__UART7_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__UART7_DTE_TX                   = IOMUX_PAD(0x037C, 0x00F0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA0__UART7_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA0__UART7_DTE_TX                  = IOMUX_PAD(0x037C, 0x00F0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__ECSPI4_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__ECSPI4_SCLK                    = IOMUX_PAD(0x0380, 0x00F4, 3, 0x0564, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__ECSPI4_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__ECSPI4_SCLK                   = IOMUX_PAD(0x0380, 0x00F4, 3, 0x0564, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__EIM_EB_B03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__EIM_EB_B03                     = IOMUX_PAD(0x0380, 0x00F4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__EIM_EB_B03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__EIM_EB_B03                    = IOMUX_PAD(0x0380, 0x00F4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01                  = IOMUX_PAD(0x0380, 0x00F4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01                 = IOMUX_PAD(0x0380, 0x00F4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__GPIO2_IO12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__GPIO2_IO12                     = IOMUX_PAD(0x0380, 0x00F4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__GPIO2_IO12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__GPIO2_IO12                    = IOMUX_PAD(0x0380, 0x00F4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__KPP_ROW06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__KPP_ROW06                      = IOMUX_PAD(0x0380, 0x00F4, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__KPP_ROW06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__KPP_ROW06                     = IOMUX_PAD(0x0380, 0x00F4, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD                = IOMUX_PAD(0x0380, 0x00F4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD               = IOMUX_PAD(0x0380, 0x00F4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__UART8_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__UART8_DCE_TX                   = IOMUX_PAD(0x0380, 0x00F4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__UART8_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__UART8_DCE_TX                  = IOMUX_PAD(0x0380, 0x00F4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__UART8_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__UART8_DTE_RX                   = IOMUX_PAD(0x0380, 0x00F4, 1, 0x065C, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__UART8_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__UART8_DTE_RX                  = IOMUX_PAD(0x0380, 0x00F4, 1, 0x065C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_DATA1__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__USB_OTG2_PWR                   = IOMUX_PAD(0x0380, 0x00F4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_DATA1__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_DATA1__USB_OTG2_PWR                  = IOMUX_PAD(0x0380, 0x00F4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__ECSPI4_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__ECSPI4_MOSI                       = IOMUX_PAD(0x0384, 0x00F8, 3, 0x056C, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__ECSPI4_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__ECSPI4_MOSI                      = IOMUX_PAD(0x0384, 0x00F8, 3, 0x056C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN                  = IOMUX_PAD(0x0384, 0x00F8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN                 = IOMUX_PAD(0x0384, 0x00F8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__ENET2_TX_EN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__ENET2_TX_EN                       = IOMUX_PAD(0x0384, 0x00F8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__ENET2_TX_EN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__ENET2_TX_EN                      = IOMUX_PAD(0x0384, 0x00F8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__GPIO2_IO13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__GPIO2_IO13                        = IOMUX_PAD(0x0384, 0x00F8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__GPIO2_IO13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__GPIO2_IO13                       = IOMUX_PAD(0x0384, 0x00F8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__KPP_COL06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__KPP_COL06                         = IOMUX_PAD(0x0384, 0x00F8, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__KPP_COL06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__KPP_COL06                        = IOMUX_PAD(0x0384, 0x00F8, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__SIM2_PORT0_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__SIM2_PORT0_CLK                    = IOMUX_PAD(0x0384, 0x00F8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__SIM2_PORT0_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__SIM2_PORT0_CLK                   = IOMUX_PAD(0x0384, 0x00F8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__UART8_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__UART8_DCE_RX                      = IOMUX_PAD(0x0384, 0x00F8, 1, 0x065C, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__UART8_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__UART8_DCE_RX                     = IOMUX_PAD(0x0384, 0x00F8, 1, 0x065C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__UART8_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__UART8_DTE_TX                      = IOMUX_PAD(0x0384, 0x00F8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__UART8_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__UART8_DTE_TX                     = IOMUX_PAD(0x0384, 0x00F8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_ENET2_TX_EN__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_ENET2_TX_EN__USB_OTG2_OC                       = IOMUX_PAD(0x0384, 0x00F8, 8, 0x0660, 1/;"	e	enum:__anon661085640103
MX6_PAD_ENET2_TX_EN__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_ENET2_TX_EN__USB_OTG2_OC                      = IOMUX_PAD(0x0384, 0x00F8, 8, 0x0660, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID			= IOMUX_PAD(0x03D0, 0x00E0, 4, 0x05DC, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_CRS_DV__FEC_RX_DV	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_CRS_DV__FEC_RX_DV				= IOMUX_PAD(0x418, 0x128, 0, 0x704, 1, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_MDC__FEC_MDC	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_MDC__FEC_MDC				= IOMUX_PAD(0x41c, 0x12c, 0, 0x000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_MDIO__FEC_MDIO	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_MDIO__FEC_MDIO				= IOMUX_PAD(0x420, 0x130, 0, 0x6f4, 1, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_REF_CLK__FEC_REF_OUT	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_REF_CLK__FEC_REF_OUT			= IOMUX_PAD(0x424, 0x134, 0x10, 0x000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_RXD0__FEC_RX_DATA0	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_RXD0__FEC_RX_DATA0				= IOMUX_PAD(0x42c, 0x13c, 0, 0x6f8, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_RXD1__FEC_RX_DATA1	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_RXD1__FEC_RX_DATA1				= IOMUX_PAD(0x430, 0x140, 0, 0x6fc, 1, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_RX_ER__GPIO_4_19	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_RX_ER__GPIO_4_19				= IOMUX_PAD(0x0428, 0x0138, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_TXD0__FEC_TX_DATA0	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_TXD0__FEC_TX_DATA0				= IOMUX_PAD(0x43c, 0x14c, 0, 0x000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_TXD1__FEC_TX_DATA1	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_TXD1__FEC_TX_DATA1				= IOMUX_PAD(0x440, 0x150, 0, 0x000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_TX_CLK__GPIO_4_21	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_TX_CLK__GPIO_4_21				= IOMUX_PAD(0x0434, 0x0144, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_FEC_TX_EN__FEC_TX_EN	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_FEC_TX_EN__FEC_TX_EN				= IOMUX_PAD(0x438, 0x148, 0, 0x000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID                     = IOMUX_PAD(0x02E8, 0x005C, 2, 0x04B8, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID                    = IOMUX_PAD(0x02E8, 0x005C, 2, 0x04B8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__CCM_WAIT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__CCM_WAIT                           = IOMUX_PAD(0x035C, 0x0014, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN               = IOMUX_PAD(0x02E8, 0x005C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN              = IOMUX_PAD(0x02E8, 0x005C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__ENET1_REF_CLK1                     = IOMUX_PAD(0x02E8, 0x005C, 3, 0x0574, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__ENET1_REF_CLK1                    = IOMUX_PAD(0x02E8, 0x005C, 3, 0x0574, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__GPIO1_IO00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__GPIO1_IO00                         = IOMUX_PAD(0x02E8, 0x005C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__GPIO1_IO00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__GPIO1_IO00                        = IOMUX_PAD(0x02E8, 0x005C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__GPIO1_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__GPIO1_IO_0                         = IOMUX_PAD(0x035C, 0x0014, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__GPT1_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__GPT1_CAPTURE1                      = IOMUX_PAD(0x02E8, 0x005C, 1, 0x058C, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__GPT1_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__GPT1_CAPTURE1                     = IOMUX_PAD(0x02E8, 0x005C, 1, 0x058C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__I2C1_SCL                           = IOMUX_PAD(0x035C, 0x0014, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__I2C2_SCL                           = IOMUX_PAD(0x02E8, 0x005C, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__I2C2_SCL                          = IOMUX_PAD(0x02E8, 0x005C, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__MQS_RIGHT                          = IOMUX_PAD(0x02E8, 0x005C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__MQS_RIGHT                         = IOMUX_PAD(0x02E8, 0x005C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__PHY_DTB_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__PHY_DTB_1                          = IOMUX_PAD(0x035C, 0x0014, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5              = IOMUX_PAD(0x035C, 0x0014, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__SPDIF_LOCK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__SPDIF_LOCK                         = IOMUX_PAD(0x035C, 0x0014, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__SRC_SYSTEM_RESET	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__SRC_SYSTEM_RESET                   = IOMUX_PAD(0x02E8, 0x005C, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__SRC_SYSTEM_RESET	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__SRC_SYSTEM_RESET                  = IOMUX_PAD(0x02E8, 0x005C, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO00__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__USDHC1_VSELECT                     = IOMUX_PAD(0x035C, 0x0014, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO00__WDOG1_WDOG_ANY                     = IOMUX_PAD(0x035C, 0x0014, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO00__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO00__WDOG3_WDOG_B                       = IOMUX_PAD(0x02E8, 0x005C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO00__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO00__WDOG3_WDOG_B                      = IOMUX_PAD(0x02E8, 0x005C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__CCM_STOP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__CCM_STOP                           = IOMUX_PAD(0x0360, 0x0018, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT              = IOMUX_PAD(0x02EC, 0x0060, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT             = IOMUX_PAD(0x02EC, 0x0060, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__ENET2_REF_CLK2                     = IOMUX_PAD(0x02EC, 0x0060, 3, 0x057C, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__ENET2_REF_CLK2                    = IOMUX_PAD(0x02EC, 0x0060, 3, 0x057C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__GPIO1_IO01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__GPIO1_IO01                         = IOMUX_PAD(0x02EC, 0x0060, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__GPIO1_IO01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__GPIO1_IO01                        = IOMUX_PAD(0x02EC, 0x0060, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__GPIO1_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__GPIO1_IO_1                         = IOMUX_PAD(0x0360, 0x0018, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__GPT1_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__GPT1_COMPARE1                      = IOMUX_PAD(0x02EC, 0x0060, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__GPT1_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__GPT1_COMPARE1                     = IOMUX_PAD(0x02EC, 0x0060, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__I2C1_SDA                           = IOMUX_PAD(0x0360, 0x0018, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__I2C2_SDA                           = IOMUX_PAD(0x02EC, 0x0060, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__I2C2_SDA                          = IOMUX_PAD(0x02EC, 0x0060, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__MQS_LEFT                           = IOMUX_PAD(0x02EC, 0x0060, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__MQS_LEFT                          = IOMUX_PAD(0x02EC, 0x0060, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__PHY_DTB_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__PHY_DTB_0                          = IOMUX_PAD(0x0360, 0x0018, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__SNVS_HP_WRAPPER_VIO_5_CTL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__SNVS_HP_WRAPPER_VIO_5_CTL          = IOMUX_PAD(0x0360, 0x0018, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__SPDIF_SR_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__SPDIF_SR_CLK                       = IOMUX_PAD(0x0360, 0x0018, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__SRC_EARLY_RESET	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__SRC_EARLY_RESET                    = IOMUX_PAD(0x02EC, 0x0060, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__SRC_EARLY_RESET	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__SRC_EARLY_RESET                   = IOMUX_PAD(0x02EC, 0x0060, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__USB_OTG1_OC                        = IOMUX_PAD(0x02EC, 0x0060, 2, 0x0664, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__USB_OTG1_OC                       = IOMUX_PAD(0x02EC, 0x0060, 2, 0x0664, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__USDHC1_RESET_B                     = IOMUX_PAD(0x0360, 0x0018, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO01__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO01__WDOG1_WDOG_B                       = IOMUX_PAD(0x02EC, 0x0060, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO01__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO01__WDOG1_WDOG_B                      = IOMUX_PAD(0x02EC, 0x0060, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO01__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO01__WDOG3_WDOG_B                       = IOMUX_PAD(0x0360, 0x0018, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__CCM_DI0_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__CCM_DI0_EXT_CLK                    = IOMUX_PAD(0x0364, 0x001C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__CCM_REF_EN_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__CCM_REF_EN_B                       = IOMUX_PAD(0x0364, 0x001C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__CSI2_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__CSI2_MCLK                          = IOMUX_PAD(0x0364, 0x001C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__ENET1_REF_CLK_25M                  = IOMUX_PAD(0x02F0, 0x0064, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__ENET1_REF_CLK_25M                 = IOMUX_PAD(0x02F0, 0x0064, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__GPIO1_IO02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__GPIO1_IO02                         = IOMUX_PAD(0x02F0, 0x0064, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__GPIO1_IO02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__GPIO1_IO02                        = IOMUX_PAD(0x02F0, 0x0064, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__GPIO1_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__GPIO1_IO_2                         = IOMUX_PAD(0x0364, 0x001C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__GPT1_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__GPT1_COMPARE2                      = IOMUX_PAD(0x02F0, 0x0064, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__GPT1_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__GPT1_COMPARE2                     = IOMUX_PAD(0x02F0, 0x0064, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__I2C1_SCL                           = IOMUX_PAD(0x02F0, 0x0064, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__I2C1_SCL                          = IOMUX_PAD(0x02F0, 0x0064, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__I2C2_SCL                           = IOMUX_PAD(0x0364, 0x001C, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__PHY_TDI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__PHY_TDI                            = IOMUX_PAD(0x0364, 0x001C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__SDMA_EXT_EVENT00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__SDMA_EXT_EVENT00                   = IOMUX_PAD(0x02F0, 0x0064, 6, 0x0610, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__SDMA_EXT_EVENT00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__SDMA_EXT_EVENT00                  = IOMUX_PAD(0x02F0, 0x0064, 6, 0x0610, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__SRC_ANY_PU_RESET	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__SRC_ANY_PU_RESET                   = IOMUX_PAD(0x02F0, 0x0064, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__SRC_ANY_PU_RESET	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__SRC_ANY_PU_RESET                  = IOMUX_PAD(0x02F0, 0x0064, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__UART1_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__UART1_DCE_TX                       = IOMUX_PAD(0x02F0, 0x0064, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__UART1_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__UART1_DCE_TX                      = IOMUX_PAD(0x02F0, 0x0064, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__UART1_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__UART1_DTE_RX                       = IOMUX_PAD(0x02F0, 0x0064, 8, 0x0624, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__UART1_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__UART1_DTE_RX                      = IOMUX_PAD(0x02F0, 0x0064, 8, 0x0624, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__USB_OTG2_PWR                       = IOMUX_PAD(0x02F0, 0x0064, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__USB_OTG2_PWR                      = IOMUX_PAD(0x02F0, 0x0064, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__USDHC1_CD_B                        = IOMUX_PAD(0x0364, 0x001C, 1, 0x0864, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO02__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO02__USDHC1_WP                          = IOMUX_PAD(0x02F0, 0x0064, 4, 0x066C, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO02__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO02__USDHC1_WP                         = IOMUX_PAD(0x02F0, 0x0064, 4, 0x066C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO02__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO02__WDOG1_WDOG_B                       = IOMUX_PAD(0x0364, 0x001C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__CCM_DI0_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__CCM_DI0_EXT_CLK                    = IOMUX_PAD(0x02F4, 0x0068, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__CCM_DI0_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__CCM_DI0_EXT_CLK                   = IOMUX_PAD(0x02F4, 0x0068, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__CCM_DI1_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__CCM_DI1_EXT_CLK                    = IOMUX_PAD(0x0368, 0x0020, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__CCM_PLL3_BYP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__CCM_PLL3_BYP                       = IOMUX_PAD(0x0368, 0x0020, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__ENET1_REF_CLK_25M                  = IOMUX_PAD(0x0368, 0x0020, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__GPIO1_IO03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__GPIO1_IO03                         = IOMUX_PAD(0x02F4, 0x0068, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__GPIO1_IO03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__GPIO1_IO03                        = IOMUX_PAD(0x02F4, 0x0068, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__GPIO1_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__GPIO1_IO_3                         = IOMUX_PAD(0x0368, 0x0020, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__GPT1_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__GPT1_COMPARE3                      = IOMUX_PAD(0x02F4, 0x0068, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__GPT1_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__GPT1_COMPARE3                     = IOMUX_PAD(0x02F4, 0x0068, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__I2C1_SDA                           = IOMUX_PAD(0x02F4, 0x0068, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__I2C1_SDA                          = IOMUX_PAD(0x02F4, 0x0068, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__I2C2_SDA                           = IOMUX_PAD(0x0368, 0x0020, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__PHY_TCK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__PHY_TCK                            = IOMUX_PAD(0x0368, 0x0020, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__SRC_TESTER_ACK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__SRC_TESTER_ACK                     = IOMUX_PAD(0x02F4, 0x0068, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__SRC_TESTER_ACK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__SRC_TESTER_ACK                    = IOMUX_PAD(0x02F4, 0x0068, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__UART1_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__UART1_DCE_RX                       = IOMUX_PAD(0x02F4, 0x0068, 8, 0x0624, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__UART1_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__UART1_DCE_RX                      = IOMUX_PAD(0x02F4, 0x0068, 8, 0x0624, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__UART1_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__UART1_DTE_TX                       = IOMUX_PAD(0x02F4, 0x0068, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__UART1_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__UART1_DTE_TX                      = IOMUX_PAD(0x02F4, 0x0068, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__USB_OTG2_OC                        = IOMUX_PAD(0x02F4, 0x0068, 2, 0x0660, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__USB_OTG2_OC                       = IOMUX_PAD(0x02F4, 0x0068, 2, 0x0660, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO03__USDHC1_CD_B                        = IOMUX_PAD(0x02F4, 0x0068, 4, 0x0668, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO03__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO03__USDHC1_CD_B                       = IOMUX_PAD(0x02F4, 0x0068, 4, 0x0668, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO03__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__USDHC1_WP                          = IOMUX_PAD(0x0368, 0x0020, 1, 0x0868, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO03__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO03__WDOG2_WDOG_B                       = IOMUX_PAD(0x0368, 0x0020, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__CCM_PLL2_BYP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__CCM_PLL2_BYP                       = IOMUX_PAD(0x036C, 0x0024, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__ENET1_MDC                          = IOMUX_PAD(0x036C, 0x0024, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__ENET1_REF_CLK1                     = IOMUX_PAD(0x02F8, 0x006C, 0, 0x0574, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__ENET1_REF_CLK1                    = IOMUX_PAD(0x02F8, 0x006C, 0, 0x0574, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN               = IOMUX_PAD(0x02F8, 0x006C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN              = IOMUX_PAD(0x02F8, 0x006C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__ENET2_REF_CLK2                     = IOMUX_PAD(0x036C, 0x0024, 4, 0x076C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__GPIO1_IO04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__GPIO1_IO04                         = IOMUX_PAD(0x02F8, 0x006C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__GPIO1_IO04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__GPIO1_IO04                        = IOMUX_PAD(0x02F8, 0x006C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__GPIO1_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__GPIO1_IO_4                         = IOMUX_PAD(0x036C, 0x0024, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__OSC32K_32K_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__OSC32K_32K_OUT                     = IOMUX_PAD(0x036C, 0x0024, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__PHY_TMS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__PHY_TMS                            = IOMUX_PAD(0x036C, 0x0024, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__PWM3_OUT                           = IOMUX_PAD(0x02F8, 0x006C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__PWM3_OUT                          = IOMUX_PAD(0x02F8, 0x006C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__UART1_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__UART1_TX                           = IOMUX_PAD(0x036C, 0x0024, 0, 0x0830, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO04__UART5_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__UART5_DCE_TX                       = IOMUX_PAD(0x02F8, 0x006C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__UART5_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__UART5_DCE_TX                      = IOMUX_PAD(0x02F8, 0x006C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__UART5_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__UART5_DTE_RX                       = IOMUX_PAD(0x02F8, 0x006C, 8, 0x0644, 2/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__UART5_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__UART5_DTE_RX                      = IOMUX_PAD(0x02F8, 0x006C, 8, 0x0644, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__USB_OTG1_PWR                       = IOMUX_PAD(0x02F8, 0x006C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__USB_OTG1_PWR                      = IOMUX_PAD(0x02F8, 0x006C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO04__USDHC1_RESET_B                     = IOMUX_PAD(0x02F8, 0x006C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO04__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO04__USDHC1_RESET_B                    = IOMUX_PAD(0x02F8, 0x006C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO04__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO04__USDHC2_RESET_B                     = IOMUX_PAD(0x036C, 0x0024, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__ANATOP_OTG2_ID                     = IOMUX_PAD(0x02FC, 0x0070, 2, 0x04BC, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__ANATOP_OTG2_ID                    = IOMUX_PAD(0x02FC, 0x0070, 2, 0x04BC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__ASRC_ASRC_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__ASRC_ASRC_EXT_CLK                  = IOMUX_PAD(0x0370, 0x0028, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__CSI_FIELD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__CSI_FIELD                          = IOMUX_PAD(0x02FC, 0x0070, 3, 0x0530, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__CSI_FIELD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__CSI_FIELD                         = IOMUX_PAD(0x02FC, 0x0070, 3, 0x0530, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__ENET1_MDIO                         = IOMUX_PAD(0x0370, 0x0028, 2, 0x0764, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__ENET1_REF_CLK1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__ENET1_REF_CLK1                     = IOMUX_PAD(0x0370, 0x0028, 4, 0x0760, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT              = IOMUX_PAD(0x02FC, 0x0070, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT             = IOMUX_PAD(0x02FC, 0x0070, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__ENET2_REF_CLK2                     = IOMUX_PAD(0x02FC, 0x0070, 0, 0x057C, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__ENET2_REF_CLK2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__ENET2_REF_CLK2                    = IOMUX_PAD(0x02FC, 0x0070, 0, 0x057C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__GPIO1_IO05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__GPIO1_IO05                         = IOMUX_PAD(0x02FC, 0x0070, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__GPIO1_IO05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__GPIO1_IO05                        = IOMUX_PAD(0x02FC, 0x0070, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__GPIO1_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__GPIO1_IO_5                         = IOMUX_PAD(0x0370, 0x0028, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__PHY_TDO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__PHY_TDO                            = IOMUX_PAD(0x0370, 0x0028, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__PWM4_OUT                           = IOMUX_PAD(0x02FC, 0x0070, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__PWM4_OUT                          = IOMUX_PAD(0x02FC, 0x0070, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__SRC_TESTER_ACK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__SRC_TESTER_ACK                     = IOMUX_PAD(0x0370, 0x0028, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__UART1_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__UART1_RX                           = IOMUX_PAD(0x0370, 0x0028, 0, 0x0830, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO05__UART5_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__UART5_DCE_RX                       = IOMUX_PAD(0x02FC, 0x0070, 8, 0x0644, 3/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__UART5_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__UART5_DCE_RX                      = IOMUX_PAD(0x02FC, 0x0070, 8, 0x0644, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__UART5_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__UART5_DTE_TX                       = IOMUX_PAD(0x02FC, 0x0070, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__UART5_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__UART5_DTE_TX                      = IOMUX_PAD(0x02FC, 0x0070, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO05__USDHC1_VSELECT                     = IOMUX_PAD(0x02FC, 0x0070, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO05__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO05__USDHC1_VSELECT                    = IOMUX_PAD(0x02FC, 0x0070, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO05__USDHC2_VSELECT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO05__USDHC2_VSELECT                     = IOMUX_PAD(0x0370, 0x0028, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__CCM_REF_EN_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__CCM_REF_EN_B                       = IOMUX_PAD(0x0300, 0x0074, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__CCM_REF_EN_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__CCM_REF_EN_B                      = IOMUX_PAD(0x0300, 0x0074, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__CCM_WAIT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__CCM_WAIT                           = IOMUX_PAD(0x0300, 0x0074, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__CCM_WAIT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__CCM_WAIT                          = IOMUX_PAD(0x0300, 0x0074, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__CSI1_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__CSI1_MCLK                          = IOMUX_PAD(0x0374, 0x002C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__CSI_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__CSI_MCLK                           = IOMUX_PAD(0x0300, 0x0074, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__CSI_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__CSI_MCLK                          = IOMUX_PAD(0x0300, 0x0074, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__ENET1_MDIO                         = IOMUX_PAD(0x0300, 0x0074, 0, 0x0578, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__ENET1_MDIO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__ENET1_MDIO                        = IOMUX_PAD(0x0300, 0x0074, 0, 0x0578, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__ENET2_MDC                          = IOMUX_PAD(0x0374, 0x002C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__ENET2_MDIO                         = IOMUX_PAD(0x0300, 0x0074, 1, 0x0580, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__ENET2_MDIO                        = IOMUX_PAD(0x0300, 0x0074, 1, 0x0580, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__GPIO1_IO06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__GPIO1_IO06                         = IOMUX_PAD(0x0300, 0x0074, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__GPIO1_IO06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__GPIO1_IO06                        = IOMUX_PAD(0x0300, 0x0074, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__GPIO1_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__GPIO1_IO_6                         = IOMUX_PAD(0x0374, 0x002C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__OCOTP_CTRL_WRAPPER_FUSE_LATCHED	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__OCOTP_CTRL_WRAPPER_FUSE_LATCHED    = IOMUX_PAD(0x0374, 0x002C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__SRC_ANY_PU_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__SRC_ANY_PU_RESET                   = IOMUX_PAD(0x0374, 0x002C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__UART1_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__UART1_DCE_CTS                      = IOMUX_PAD(0x0300, 0x0074, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__UART1_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__UART1_DCE_CTS                     = IOMUX_PAD(0x0300, 0x0074, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__UART1_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__UART1_DTE_RTS                      = IOMUX_PAD(0x0300, 0x0074, 8, 0x0620, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__UART1_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__UART1_DTE_RTS                     = IOMUX_PAD(0x0300, 0x0074, 8, 0x0620, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__UART1_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__UART1_RTS_B                        = IOMUX_PAD(0x0374, 0x002C, 4, 0x082C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__UART2_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__UART2_TX                           = IOMUX_PAD(0x0374, 0x002C, 0, 0x0838, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE                   = IOMUX_PAD(0x0300, 0x0074, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE                  = IOMUX_PAD(0x0300, 0x0074, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO06__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO06__USDHC2_CD_B                        = IOMUX_PAD(0x0374, 0x002C, 1, 0x086C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO06__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO06__USDHC2_WP                          = IOMUX_PAD(0x0300, 0x0074, 4, 0x069C, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO06__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO06__USDHC2_WP                         = IOMUX_PAD(0x0300, 0x0074, 4, 0x069C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__AUDMUX_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__AUDMUX_MCLK                        = IOMUX_PAD(0x0378, 0x0030, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__CCM_STOP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__CCM_STOP                           = IOMUX_PAD(0x0304, 0x0078, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__CCM_STOP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__CCM_STOP                          = IOMUX_PAD(0x0304, 0x0078, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__CSI_PIXCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__CSI_PIXCLK                         = IOMUX_PAD(0x0304, 0x0078, 3, 0x0528, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__CSI_PIXCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__CSI_PIXCLK                        = IOMUX_PAD(0x0304, 0x0078, 3, 0x0528, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__DCIC2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__DCIC2_OUT                          = IOMUX_PAD(0x0378, 0x0030, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__ENET1_MDC                          = IOMUX_PAD(0x0304, 0x0078, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__ENET1_MDC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__ENET1_MDC                         = IOMUX_PAD(0x0304, 0x0078, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__ENET2_MDC                          = IOMUX_PAD(0x0304, 0x0078, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__ENET2_MDC                         = IOMUX_PAD(0x0304, 0x0078, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__ENET2_MDIO                         = IOMUX_PAD(0x0378, 0x0030, 2, 0x0770, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__GPIO1_IO07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__GPIO1_IO07                         = IOMUX_PAD(0x0304, 0x0078, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__GPIO1_IO07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__GPIO1_IO07                        = IOMUX_PAD(0x0304, 0x0078, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__GPIO1_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__GPIO1_IO_7                         = IOMUX_PAD(0x0378, 0x0030, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__SRC_EARLY_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__SRC_EARLY_RESET                    = IOMUX_PAD(0x0378, 0x0030, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__UART1_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__UART1_CTS_B                        = IOMUX_PAD(0x0378, 0x0030, 4, 0x082C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__UART1_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__UART1_DCE_RTS                      = IOMUX_PAD(0x0304, 0x0078, 8, 0x0620, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__UART1_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__UART1_DCE_RTS                     = IOMUX_PAD(0x0304, 0x0078, 8, 0x0620, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__UART1_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__UART1_DTE_CTS                      = IOMUX_PAD(0x0304, 0x0078, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__UART1_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__UART1_DTE_CTS                     = IOMUX_PAD(0x0304, 0x0078, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__UART2_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__UART2_RX                           = IOMUX_PAD(0x0378, 0x0030, 0, 0x0838, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__USB_OTG_HOST_MODE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__USB_OTG_HOST_MODE                  = IOMUX_PAD(0x0304, 0x0078, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__USB_OTG_HOST_MODE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__USB_OTG_HOST_MODE                 = IOMUX_PAD(0x0304, 0x0078, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO07__USDHC2_CD_B                        = IOMUX_PAD(0x0304, 0x0078, 4, 0x0674, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO07__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO07__USDHC2_CD_B                       = IOMUX_PAD(0x0304, 0x0078, 4, 0x0674, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO07__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__USDHC2_WP                          = IOMUX_PAD(0x0378, 0x0030, 1, 0x0870, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO07__VDEC_DEBUG_44	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO07__VDEC_DEBUG_44                      = IOMUX_PAD(0x0378, 0x0030, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY                       = IOMUX_PAD(0x037C, 0x0034, 3, 0x069C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY                       = IOMUX_PAD(0x0308, 0x007C, 6, 0x04C0, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY                      = IOMUX_PAD(0x0308, 0x007C, 6, 0x04C0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__CSI_VSYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__CSI_VSYNC                          = IOMUX_PAD(0x0308, 0x007C, 3, 0x052C, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__CSI_VSYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__CSI_VSYNC                         = IOMUX_PAD(0x0308, 0x007C, 3, 0x052C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__DCIC1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__DCIC1_OUT                          = IOMUX_PAD(0x037C, 0x0034, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__GPIO1_IO08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__GPIO1_IO08                         = IOMUX_PAD(0x0308, 0x007C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__GPIO1_IO08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__GPIO1_IO08                        = IOMUX_PAD(0x0308, 0x007C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__GPIO1_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__GPIO1_IO_8                         = IOMUX_PAD(0x037C, 0x0034, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__PWM1_OUT                           = IOMUX_PAD(0x0308, 0x007C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__PWM1_OUT                          = IOMUX_PAD(0x0308, 0x007C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__SDMA_EXT_EVENT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__SDMA_EXT_EVENT_0                   = IOMUX_PAD(0x037C, 0x0034, 2, 0x081C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__SPDIF_OUT                          = IOMUX_PAD(0x0308, 0x007C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__SPDIF_OUT                         = IOMUX_PAD(0x0308, 0x007C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__SRC_SYSTEM_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__SRC_SYSTEM_RESET                   = IOMUX_PAD(0x037C, 0x0034, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__UART2_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__UART2_RTS_B                        = IOMUX_PAD(0x037C, 0x0034, 4, 0x0834, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__UART5_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__UART5_DCE_RTS                      = IOMUX_PAD(0x0308, 0x007C, 8, 0x0640, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__UART5_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__UART5_DCE_RTS                     = IOMUX_PAD(0x0308, 0x007C, 8, 0x0640, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__UART5_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__UART5_DTE_CTS                      = IOMUX_PAD(0x0308, 0x007C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__UART5_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__UART5_DTE_CTS                     = IOMUX_PAD(0x0308, 0x007C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__USB_OTG1_OC                        = IOMUX_PAD(0x037C, 0x0034, 0, 0x0860, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__USDHC2_VSELECT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__USDHC2_VSELECT                     = IOMUX_PAD(0x0308, 0x007C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__USDHC2_VSELECT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__USDHC2_VSELECT                    = IOMUX_PAD(0x0308, 0x007C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO08__VDEC_DEBUG_43	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__VDEC_DEBUG_43                      = IOMUX_PAD(0x037C, 0x0034, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B                       = IOMUX_PAD(0x037C, 0x0034, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B                       = IOMUX_PAD(0x0308, 0x007C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B                      = IOMUX_PAD(0x0308, 0x007C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__CCM_OUT0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__CCM_OUT0                           = IOMUX_PAD(0x0380, 0x0038, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__CSI_HSYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__CSI_HSYNC                          = IOMUX_PAD(0x030C, 0x0080, 3, 0x0524, 1/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__CSI_HSYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__CSI_HSYNC                         = IOMUX_PAD(0x030C, 0x0080, 3, 0x0524, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__GPIO1_IO09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__GPIO1_IO09                         = IOMUX_PAD(0x030C, 0x0080, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__GPIO1_IO09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__GPIO1_IO09                        = IOMUX_PAD(0x030C, 0x0080, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__GPIO1_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__GPIO1_IO_9                         = IOMUX_PAD(0x0380, 0x0038, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4                  = IOMUX_PAD(0x0380, 0x0038, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__PWM2_OUT                           = IOMUX_PAD(0x030C, 0x0080, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__PWM2_OUT                          = IOMUX_PAD(0x030C, 0x0080, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1                   = IOMUX_PAD(0x0380, 0x0038, 2, 0x0820, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__SPDIF_IN                           = IOMUX_PAD(0x030C, 0x0080, 2, 0x0618, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__SPDIF_IN                          = IOMUX_PAD(0x030C, 0x0080, 2, 0x0618, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__SRC_INT_BOOT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__SRC_INT_BOOT                       = IOMUX_PAD(0x0380, 0x0038, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__UART2_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__UART2_CTS_B                        = IOMUX_PAD(0x0380, 0x0038, 4, 0x0834, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__UART5_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__UART5_DCE_CTS                      = IOMUX_PAD(0x030C, 0x0080, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__UART5_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__UART5_DCE_CTS                     = IOMUX_PAD(0x030C, 0x0080, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__UART5_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__UART5_DTE_RTS                      = IOMUX_PAD(0x030C, 0x0080, 8, 0x0640, 2/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__UART5_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__UART5_DTE_RTS                     = IOMUX_PAD(0x030C, 0x0080, 8, 0x0640, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__USB_OTG1_PWR                       = IOMUX_PAD(0x0380, 0x0038, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__USDHC1_RESET_B                     = IOMUX_PAD(0x030C, 0x0080, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__USDHC1_RESET_B                    = IOMUX_PAD(0x030C, 0x0080, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__USDHC2_RESET_B                     = IOMUX_PAD(0x030C, 0x0080, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__USDHC2_RESET_B                    = IOMUX_PAD(0x030C, 0x0080, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__VDEC_DEBUG_42	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__VDEC_DEBUG_42                      = IOMUX_PAD(0x0380, 0x0038, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO09__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_GPIO1_IO09__WDOG1_WDOG_ANY                     = IOMUX_PAD(0x030C, 0x0080, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_GPIO1_IO09__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_GPIO1_IO09__WDOG1_WDOG_ANY                    = IOMUX_PAD(0x030C, 0x0080, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_GPIO1_IO09__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO09__WDOG2_WDOG_B                       = IOMUX_PAD(0x0380, 0x0038, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__ANATOP_OTG1_ID                     = IOMUX_PAD(0x0384, 0x003C, 0, 0x0624, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__CCM_OUT1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__CCM_OUT1                           = IOMUX_PAD(0x0384, 0x003C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__CSI1_FIELD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__CSI1_FIELD                         = IOMUX_PAD(0x0384, 0x003C, 4, 0x070C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__CSU_CSU_INT_DEB	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__CSU_CSU_INT_DEB                    = IOMUX_PAD(0x0384, 0x003C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__GPIO1_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__GPIO1_IO_10                        = IOMUX_PAD(0x0384, 0x003C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__OBSERVE_MUX_OUT_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__OBSERVE_MUX_OUT_3                  = IOMUX_PAD(0x0384, 0x003C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__PWM1_OUT                           = IOMUX_PAD(0x0384, 0x003C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__SPDIF_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__SPDIF_EXT_CLK                      = IOMUX_PAD(0x0384, 0x003C, 1, 0x0828, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO10__VDEC_DEBUG_41	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO10__VDEC_DEBUG_41                      = IOMUX_PAD(0x0384, 0x003C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__CCM_CLKO1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__CCM_CLKO1                          = IOMUX_PAD(0x0388, 0x0040, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__CSU_CSU_ALARM_AUT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__CSU_CSU_ALARM_AUT_0                = IOMUX_PAD(0x0388, 0x0040, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__GPIO1_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__GPIO1_IO_11                        = IOMUX_PAD(0x0388, 0x0040, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__MLB_DATA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__MLB_DATA                           = IOMUX_PAD(0x0388, 0x0040, 4, 0x07EC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__OBSERVE_MUX_OUT_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__OBSERVE_MUX_OUT_2                  = IOMUX_PAD(0x0388, 0x0040, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__PWM2_OUT                           = IOMUX_PAD(0x0388, 0x0040, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__SPDIF_IN                           = IOMUX_PAD(0x0388, 0x0040, 1, 0x0824, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__USB_OTG2_OC                        = IOMUX_PAD(0x0388, 0x0040, 0, 0x085C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO11__VDEC_DEBUG_40	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO11__VDEC_DEBUG_40                      = IOMUX_PAD(0x0388, 0x0040, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__CCM_CLKO2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__CCM_CLKO2                          = IOMUX_PAD(0x038C, 0x0044, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__CSU_CSU_ALARM_AUT_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__CSU_CSU_ALARM_AUT_1                = IOMUX_PAD(0x038C, 0x0044, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__GPIO1_IO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__GPIO1_IO_12                        = IOMUX_PAD(0x038C, 0x0044, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__MLB_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__MLB_CLK                            = IOMUX_PAD(0x038C, 0x0044, 4, 0x07E8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__OBSERVE_MUX_OUT_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__OBSERVE_MUX_OUT_1                  = IOMUX_PAD(0x038C, 0x0044, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__PWM3_OUT                           = IOMUX_PAD(0x038C, 0x0044, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__SPDIF_OUT                          = IOMUX_PAD(0x038C, 0x0044, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__USB_OTG2_PWR                       = IOMUX_PAD(0x038C, 0x0044, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO12__VDEC_DEBUG_39	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO12__VDEC_DEBUG_39                      = IOMUX_PAD(0x038C, 0x0044, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__ANATOP_OTG2_ID                     = IOMUX_PAD(0x0390, 0x0048, 1, 0x0628, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__CCM_OUT2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__CCM_OUT2                           = IOMUX_PAD(0x0390, 0x0048, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__CSU_CSU_ALARM_AUT_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__CSU_CSU_ALARM_AUT_2                = IOMUX_PAD(0x0390, 0x0048, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__GPIO1_IO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__GPIO1_IO_13                        = IOMUX_PAD(0x0390, 0x0048, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__MLB_SIG	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__MLB_SIG                            = IOMUX_PAD(0x0390, 0x0048, 4, 0x07F0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__OBSERVE_MUX_OUT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__OBSERVE_MUX_OUT_0                  = IOMUX_PAD(0x0390, 0x0048, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__PWM4_OUT                           = IOMUX_PAD(0x0390, 0x0048, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__VDEC_DEBUG_38	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__VDEC_DEBUG_38                      = IOMUX_PAD(0x0390, 0x0048, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_GPIO1_IO13__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_GPIO1_IO13__WDOG1_WDOG_ANY                     = IOMUX_PAD(0x0390, 0x0048, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_I2C1_SCL__GPIO_3_12	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_I2C1_SCL__GPIO_3_12				= IOMUX_PAD(0x044C, 0x015C, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_I2C1_SCL__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_I2C1_SCL__I2C1_SCL				= IOMUX_PAD(0x044C, 0x015C, 0x10, 0x071C, 2, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_I2C1_SDA__GPIO_3_13	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_I2C1_SDA__GPIO_3_13				= IOMUX_PAD(0x0450, 0x0160, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_I2C1_SDA__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_I2C1_SDA__I2C1_SDA				= IOMUX_PAD(0x0450, 0x0160, 0x10, 0x0720, 2, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_JTAG_MOD__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__CCM_PMIC_RDY                         = IOMUX_PAD(0x02D0, 0x0044, 4, 0x04C0, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__CCM_PMIC_RDY                        = IOMUX_PAD(0x02D0, 0x0044, 4, 0x04C0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_MOD__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__ENET1_REF_CLK_25M                    = IOMUX_PAD(0x02D0, 0x0044, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__ENET1_REF_CLK_25M	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__ENET1_REF_CLK_25M                   = IOMUX_PAD(0x02D0, 0x0044, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_MOD__GPIO1_IO10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__GPIO1_IO10                           = IOMUX_PAD(0x02D0, 0x0044, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__GPIO1_IO10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__GPIO1_IO10                          = IOMUX_PAD(0x02D0, 0x0044, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_MOD__GPT2_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__GPT2_CLK                             = IOMUX_PAD(0x02D0, 0x0044, 1, 0x05A0, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__GPT2_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__GPT2_CLK                            = IOMUX_PAD(0x02D0, 0x0044, 1, 0x05A0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_MOD__SDMA_EXT_EVENT00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__SDMA_EXT_EVENT00                     = IOMUX_PAD(0x02D0, 0x0044, 6, 0x0610, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__SDMA_EXT_EVENT00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__SDMA_EXT_EVENT00                    = IOMUX_PAD(0x02D0, 0x0044, 6, 0x0610, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_MOD__SJC_MOD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__SJC_MOD                              = IOMUX_PAD(0x02D0, 0x0044, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__SJC_MOD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__SJC_MOD                             = IOMUX_PAD(0x02D0, 0x0044, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_MOD__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_MOD__SPDIF_OUT                            = IOMUX_PAD(0x02D0, 0x0044, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_MOD__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_MOD__SPDIF_OUT                           = IOMUX_PAD(0x02D0, 0x0044, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TCK__GPIO1_IO14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TCK__GPIO1_IO14                           = IOMUX_PAD(0x02E0, 0x0054, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TCK__GPIO1_IO14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TCK__GPIO1_IO14                          = IOMUX_PAD(0x02E0, 0x0054, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TCK__GPT2_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TCK__GPT2_COMPARE2                        = IOMUX_PAD(0x02E0, 0x0054, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TCK__GPT2_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TCK__GPT2_COMPARE2                       = IOMUX_PAD(0x02E0, 0x0054, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TCK__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TCK__PWM7_OUT                             = IOMUX_PAD(0x02E0, 0x0054, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TCK__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TCK__PWM7_OUT                            = IOMUX_PAD(0x02E0, 0x0054, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TCK__SAI2_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TCK__SAI2_RX_DATA                         = IOMUX_PAD(0x02E0, 0x0054, 2, 0x05F4, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TCK__SAI2_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TCK__SAI2_RX_DATA                        = IOMUX_PAD(0x02E0, 0x0054, 2, 0x05F4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TCK__SIM2_POWER_FAIL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TCK__SIM2_POWER_FAIL                      = IOMUX_PAD(0x02E0, 0x0054, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TCK__SIM2_POWER_FAIL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TCK__SIM2_POWER_FAIL                     = IOMUX_PAD(0x02E0, 0x0054, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TCK__SJC_TCK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TCK__SJC_TCK                              = IOMUX_PAD(0x02E0, 0x0054, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TCK__SJC_TCK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TCK__SJC_TCK                             = IOMUX_PAD(0x02E0, 0x0054, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__GPIO1_IO13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__GPIO1_IO13                           = IOMUX_PAD(0x02DC, 0x0050, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__GPIO1_IO13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__GPIO1_IO13                          = IOMUX_PAD(0x02DC, 0x0050, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__GPT2_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__GPT2_COMPARE1                        = IOMUX_PAD(0x02DC, 0x0050, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__GPT2_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__GPT2_COMPARE1                       = IOMUX_PAD(0x02DC, 0x0050, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__MQS_LEFT                             = IOMUX_PAD(0x02DC, 0x0050, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__MQS_LEFT                            = IOMUX_PAD(0x02DC, 0x0050, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__PWM6_OUT                             = IOMUX_PAD(0x02DC, 0x0050, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__PWM6_OUT                            = IOMUX_PAD(0x02DC, 0x0050, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__SAI2_TX_BCLK                         = IOMUX_PAD(0x02DC, 0x0050, 2, 0x05F8, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__SAI2_TX_BCLK                        = IOMUX_PAD(0x02DC, 0x0050, 2, 0x05F8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__SIM1_POWER_FAIL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__SIM1_POWER_FAIL                      = IOMUX_PAD(0x02DC, 0x0050, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__SIM1_POWER_FAIL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__SIM1_POWER_FAIL                     = IOMUX_PAD(0x02DC, 0x0050, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDI__SJC_TDI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDI__SJC_TDI                              = IOMUX_PAD(0x02DC, 0x0050, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDI__SJC_TDI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDI__SJC_TDI                             = IOMUX_PAD(0x02DC, 0x0050, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__CCM_CLKO2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__CCM_CLKO2                            = IOMUX_PAD(0x02D8, 0x004C, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__CCM_CLKO2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__CCM_CLKO2                           = IOMUX_PAD(0x02D8, 0x004C, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__CCM_STOP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__CCM_STOP                             = IOMUX_PAD(0x02D8, 0x004C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__CCM_STOP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__CCM_STOP                            = IOMUX_PAD(0x02D8, 0x004C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__EPIT2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__EPIT2_OUT                            = IOMUX_PAD(0x02D8, 0x004C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__EPIT2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__EPIT2_OUT                           = IOMUX_PAD(0x02D8, 0x004C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__GPIO1_IO12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__GPIO1_IO12                           = IOMUX_PAD(0x02D8, 0x004C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__GPIO1_IO12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__GPIO1_IO12                          = IOMUX_PAD(0x02D8, 0x004C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__GPT2_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__GPT2_CAPTURE2                        = IOMUX_PAD(0x02D8, 0x004C, 1, 0x059C, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__GPT2_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__GPT2_CAPTURE2                       = IOMUX_PAD(0x02D8, 0x004C, 1, 0x059C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__MQS_RIGHT                            = IOMUX_PAD(0x02D8, 0x004C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__MQS_RIGHT                           = IOMUX_PAD(0x02D8, 0x004C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__SAI2_TX_SYNC                         = IOMUX_PAD(0x02D8, 0x004C, 2, 0x05FC, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__SAI2_TX_SYNC                        = IOMUX_PAD(0x02D8, 0x004C, 2, 0x05FC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TDO__SJC_TDO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TDO__SJC_TDO                              = IOMUX_PAD(0x02D8, 0x004C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TDO__SJC_TDO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TDO__SJC_TDO                             = IOMUX_PAD(0x02D8, 0x004C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__CCM_CLKO1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__CCM_CLKO1                            = IOMUX_PAD(0x02D4, 0x0048, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__CCM_CLKO1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__CCM_CLKO1                           = IOMUX_PAD(0x02D4, 0x0048, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__CCM_WAIT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__CCM_WAIT                             = IOMUX_PAD(0x02D4, 0x0048, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__CCM_WAIT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__CCM_WAIT                            = IOMUX_PAD(0x02D4, 0x0048, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__EPIT1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__EPIT1_OUT                            = IOMUX_PAD(0x02D4, 0x0048, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__EPIT1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__EPIT1_OUT                           = IOMUX_PAD(0x02D4, 0x0048, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__GPIO1_IO11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__GPIO1_IO11                           = IOMUX_PAD(0x02D4, 0x0048, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__GPIO1_IO11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__GPIO1_IO11                          = IOMUX_PAD(0x02D4, 0x0048, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__GPT2_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__GPT2_CAPTURE1                        = IOMUX_PAD(0x02D4, 0x0048, 1, 0x0598, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__GPT2_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__GPT2_CAPTURE1                       = IOMUX_PAD(0x02D4, 0x0048, 1, 0x0598, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__SAI2_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__SAI2_MCLK                            = IOMUX_PAD(0x02D4, 0x0048, 2, 0x05F0, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__SAI2_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__SAI2_MCLK                           = IOMUX_PAD(0x02D4, 0x0048, 2, 0x05F0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__SDMA_EXT_EVENT01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__SDMA_EXT_EVENT01                     = IOMUX_PAD(0x02D4, 0x0048, 6, 0x0614, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__SDMA_EXT_EVENT01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__SDMA_EXT_EVENT01                    = IOMUX_PAD(0x02D4, 0x0048, 6, 0x0614, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TMS__SJC_TMS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TMS__SJC_TMS                              = IOMUX_PAD(0x02D4, 0x0048, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TMS__SJC_TMS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TMS__SJC_TMS                             = IOMUX_PAD(0x02D4, 0x0048, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS                  = IOMUX_PAD(0x02E4, 0x0058, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS                 = IOMUX_PAD(0x02E4, 0x0058, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TRST_B__GPIO1_IO15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TRST_B__GPIO1_IO15                        = IOMUX_PAD(0x02E4, 0x0058, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TRST_B__GPIO1_IO15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TRST_B__GPIO1_IO15                       = IOMUX_PAD(0x02E4, 0x0058, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TRST_B__GPT2_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TRST_B__GPT2_COMPARE3                     = IOMUX_PAD(0x02E4, 0x0058, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TRST_B__GPT2_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TRST_B__GPT2_COMPARE3                    = IOMUX_PAD(0x02E4, 0x0058, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TRST_B__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TRST_B__PWM8_OUT                          = IOMUX_PAD(0x02E4, 0x0058, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TRST_B__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TRST_B__PWM8_OUT                         = IOMUX_PAD(0x02E4, 0x0058, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TRST_B__SAI2_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TRST_B__SAI2_TX_DATA                      = IOMUX_PAD(0x02E4, 0x0058, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TRST_B__SAI2_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TRST_B__SAI2_TX_DATA                     = IOMUX_PAD(0x02E4, 0x0058, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_JTAG_TRST_B__SJC_TRSTB	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_JTAG_TRST_B__SJC_TRSTB                         = IOMUX_PAD(0x02E4, 0x0058, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_JTAG_TRST_B__SJC_TRSTB	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_JTAG_TRST_B__SJC_TRSTB                        = IOMUX_PAD(0x02E4, 0x0058, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_KEY_COL0__AUDMUX_AUD5_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__AUDMUX_AUD5_TXC                      = IOMUX_PAD(0x03EC, 0x00A4, 4, 0x066C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__ECSPI1_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__ECSPI1_SCLK                          = IOMUX_PAD(0x03EC, 0x00A4, 3, 0x0710, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__GPIO2_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__GPIO2_IO_10                          = IOMUX_PAD(0x03EC, 0x00A4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__KPP_COL_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__KPP_COL_0                            = IOMUX_PAD(0x03EC, 0x00A4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__SAI2_TX_BCLK                         = IOMUX_PAD(0x03EC, 0x00A4, 7, 0x0814, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__SDMA_EXT_EVENT_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__SDMA_EXT_EVENT_1                     = IOMUX_PAD(0x03EC, 0x00A4, 6, 0x0820, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__UART6_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__UART6_RTS_B                          = IOMUX_PAD(0x03EC, 0x00A4, 2, 0x0854, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__USDHC3_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__USDHC3_CD_B                          = IOMUX_PAD(0x03EC, 0x00A4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL0__VADC_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL0__VADC_DATA_0                          = IOMUX_PAD(0x03EC, 0x00A4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__AUDMUX_AUD5_TXFS                     = IOMUX_PAD(0x03F0, 0x00A8, 4, 0x0670, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__ECSPI1_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__ECSPI1_MISO                          = IOMUX_PAD(0x03F0, 0x00A8, 3, 0x0714, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__GPIO2_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__GPIO2_IO_11                          = IOMUX_PAD(0x03F0, 0x00A8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__KPP_COL_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__KPP_COL_1                            = IOMUX_PAD(0x03F0, 0x00A8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__SAI2_TX_SYNC                         = IOMUX_PAD(0x03F0, 0x00A8, 7, 0x0818, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__UART6_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__UART6_TX                             = IOMUX_PAD(0x03F0, 0x00A8, 2, 0x0858, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__USDHC3_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__USDHC3_RESET                         = IOMUX_PAD(0x03F0, 0x00A8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL1__USDHC3_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL1__USDHC3_RESET_B                       = IOMUX_PAD(0x03F0, 0x00A8, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__CAN1_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__CAN1_TX                              = IOMUX_PAD(0x03F4, 0x00AC, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__CANFD_TX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__CANFD_TX1                            = IOMUX_PAD(0x03F4, 0x00AC, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__ECSPI1_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__ECSPI1_RDY                           = IOMUX_PAD(0x03F4, 0x00AC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__GPIO2_IO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__GPIO2_IO_12                          = IOMUX_PAD(0x03F4, 0x00AC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__KPP_COL_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__KPP_COL_2                            = IOMUX_PAD(0x03F4, 0x00AC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__UART5_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__UART5_RTS_B                          = IOMUX_PAD(0x03F4, 0x00AC, 2, 0x084C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__USDHC4_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__USDHC4_CD_B                          = IOMUX_PAD(0x03F4, 0x00AC, 1, 0x0874, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL2__WEIM_DATA_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL2__WEIM_DATA_30                         = IOMUX_PAD(0x03F4, 0x00AC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__CAN2_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__CAN2_TX                              = IOMUX_PAD(0x03F8, 0x00B0, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__CANFD_TX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__CANFD_TX2                            = IOMUX_PAD(0x03F8, 0x00B0, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__ECSPI1_SS2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__ECSPI1_SS2                           = IOMUX_PAD(0x03F8, 0x00B0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__GPIO2_IO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__GPIO2_IO_13                          = IOMUX_PAD(0x03F8, 0x00B0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__KPP_COL_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__KPP_COL_3                            = IOMUX_PAD(0x03F8, 0x00B0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__UART5_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__UART5_TX                             = IOMUX_PAD(0x03F8, 0x00B0, 2, 0x0850, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__USDHC4_LCTL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__USDHC4_LCTL                          = IOMUX_PAD(0x03F8, 0x00B0, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL3__WEIM_DATA_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL3__WEIM_DATA_28                         = IOMUX_PAD(0x03F8, 0x00B0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__AUDMUX_AUD5_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__AUDMUX_AUD5_RXC                      = IOMUX_PAD(0x03FC, 0x00B4, 4, 0x0664, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__ENET2_MDC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__ENET2_MDC                            = IOMUX_PAD(0x03FC, 0x00B4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__GPIO2_IO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__GPIO2_IO_14                          = IOMUX_PAD(0x03FC, 0x00B4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__I2C3_SCL                             = IOMUX_PAD(0x03FC, 0x00B4, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__KPP_COL_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__KPP_COL_4                            = IOMUX_PAD(0x03FC, 0x00B4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__SAI2_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__SAI2_RX_BCLK                         = IOMUX_PAD(0x03FC, 0x00B4, 7, 0x0808, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__USB_USBOTG1_PWR	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_KEY_COL4__USB_USBOTG1_PWR			= IOMUX_PAD(0x0484, 0x017C, 6, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_KEY_COL4__USDHC2_LCTL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__USDHC2_LCTL                          = IOMUX_PAD(0x03FC, 0x00B4, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL4__WEIM_CRE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_COL4__WEIM_CRE                             = IOMUX_PAD(0x03FC, 0x00B4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_COL5__USB_USBOTG2_PWR	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_KEY_COL5__USB_USBOTG2_PWR			= IOMUX_PAD(0x0488, 0x0180, 6, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__AUDMUX_AUD5_TXD                      = IOMUX_PAD(0x0400, 0x00B8, 4, 0x0660, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__ECSPI1_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__ECSPI1_MOSI                          = IOMUX_PAD(0x0400, 0x00B8, 3, 0x0718, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__GPIO2_IO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__GPIO2_IO_15                          = IOMUX_PAD(0x0400, 0x00B8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__GPU_IDLE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__GPU_IDLE                             = IOMUX_PAD(0x0400, 0x00B8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__KPP_ROW_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__KPP_ROW_0                            = IOMUX_PAD(0x0400, 0x00B8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__SAI2_TX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__SAI2_TX_DATA_0                       = IOMUX_PAD(0x0400, 0x00B8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__SDMA_EXT_EVENT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__SDMA_EXT_EVENT_0                     = IOMUX_PAD(0x0400, 0x00B8, 6, 0x081C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__UART6_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__UART6_CTS_B                          = IOMUX_PAD(0x0400, 0x00B8, 2, 0x0854, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW0__USDHC3_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW0__USDHC3_WP                            = IOMUX_PAD(0x0400, 0x00B8, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__AUDMUX_AUD5_RXD                      = IOMUX_PAD(0x0404, 0x00BC, 4, 0x065C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__ECSPI1_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__ECSPI1_SS0                           = IOMUX_PAD(0x0404, 0x00BC, 3, 0x071C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__GPIO2_IO_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__GPIO2_IO_16                          = IOMUX_PAD(0x0404, 0x00BC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__KPP_ROW_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__KPP_ROW_1                            = IOMUX_PAD(0x0404, 0x00BC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__M4_NMI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__M4_NMI                               = IOMUX_PAD(0x0404, 0x00BC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__SAI2_RX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__SAI2_RX_DATA_0                       = IOMUX_PAD(0x0404, 0x00BC, 7, 0x080C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__UART6_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__UART6_RX                             = IOMUX_PAD(0x0404, 0x00BC, 2, 0x0858, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__USDHC4_VSELECT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__USDHC4_VSELECT                       = IOMUX_PAD(0x0404, 0x00BC, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW1__WEIM_DATA_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW1__WEIM_DATA_31                         = IOMUX_PAD(0x0404, 0x00BC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__CAN1_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__CAN1_RX                              = IOMUX_PAD(0x0408, 0x00C0, 3, 0x068C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__CANFD_RX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__CANFD_RX1                            = IOMUX_PAD(0x0408, 0x00C0, 4, 0x0694, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__ECSPI1_SS3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__ECSPI1_SS3                           = IOMUX_PAD(0x0408, 0x00C0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__GPIO2_IO_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__GPIO2_IO_17                          = IOMUX_PAD(0x0408, 0x00C0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__KPP_ROW_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__KPP_ROW_2                            = IOMUX_PAD(0x0408, 0x00C0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__UART5_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__UART5_CTS_B                          = IOMUX_PAD(0x0408, 0x00C0, 2, 0x084C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__USDHC4_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__USDHC4_WP                            = IOMUX_PAD(0x0408, 0x00C0, 1, 0x0878, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW2__WEIM_DATA_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW2__WEIM_DATA_29                         = IOMUX_PAD(0x0408, 0x00C0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__CAN2_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__CAN2_RX                              = IOMUX_PAD(0x040C, 0x00C4, 3, 0x0690, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__CANFD_RX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__CANFD_RX2                            = IOMUX_PAD(0x040C, 0x00C4, 4, 0x0698, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__ECSPI1_SS1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__ECSPI1_SS1                           = IOMUX_PAD(0x040C, 0x00C4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__GPIO2_IO_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__GPIO2_IO_18                          = IOMUX_PAD(0x040C, 0x00C4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__KPP_ROW_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__KPP_ROW_3                            = IOMUX_PAD(0x040C, 0x00C4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__UART5_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__UART5_RX                             = IOMUX_PAD(0x040C, 0x00C4, 2, 0x0850, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__USDHC3_LCTL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__USDHC3_LCTL                          = IOMUX_PAD(0x040C, 0x00C4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW3__WEIM_DTACK_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW3__WEIM_DTACK_B                         = IOMUX_PAD(0x040C, 0x00C4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__AUDMUX_AUD5_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__AUDMUX_AUD5_RXFS                     = IOMUX_PAD(0x0410, 0x00C8, 4, 0x0668, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__ENET2_MDIO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__ENET2_MDIO                           = IOMUX_PAD(0x0410, 0x00C8, 1, 0x0770, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__GPIO2_IO_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__GPIO2_IO_19                          = IOMUX_PAD(0x0410, 0x00C8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__I2C3_SDA                             = IOMUX_PAD(0x0410, 0x00C8, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__KPP_ROW_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__KPP_ROW_4                            = IOMUX_PAD(0x0410, 0x00C8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__SAI2_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__SAI2_RX_SYNC                         = IOMUX_PAD(0x0410, 0x00C8, 7, 0x0810, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__USDHC1_LCTL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__USDHC1_LCTL                          = IOMUX_PAD(0x0410, 0x00C8, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW4__WEIM_ACLK_FREERUN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_KEY_ROW4__WEIM_ACLK_FREERUN                    = IOMUX_PAD(0x0410, 0x00C8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_KEY_ROW7__GPIO_4_7	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_KEY_ROW7__GPIO_4_7					= IOMUX_PAD(0x04B0, 0x01A8, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_LCD1_CLK__AUDMUX_AUD3_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__AUDMUX_AUD3_RXC                      = IOMUX_PAD(0x0414, 0x00CC, 2, 0x0634, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__CSI1_DATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__CSI1_DATA_16                         = IOMUX_PAD(0x0414, 0x00CC, 4, 0x06DC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__ENET1_1588_EVENT2_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__ENET1_1588_EVENT2_IN                 = IOMUX_PAD(0x0414, 0x00CC, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__GPIO3_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__GPIO3_IO_0                           = IOMUX_PAD(0x0414, 0x00CC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__LCDIF1_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__LCDIF1_CLK                           = IOMUX_PAD(0x0414, 0x00CC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__LCDIF1_WR_RWN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__LCDIF1_WR_RWN                        = IOMUX_PAD(0x0414, 0x00CC, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__MMDC_DEBUG_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__MMDC_DEBUG_0                         = IOMUX_PAD(0x0414, 0x00CC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__SIM_M_HADDR_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__SIM_M_HADDR_16                       = IOMUX_PAD(0x0414, 0x00CC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__USDHC1_WP                            = IOMUX_PAD(0x0414, 0x00CC, 6, 0x0868, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_CLK__VADC_TEST_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_CLK__VADC_TEST_0                          = IOMUX_PAD(0x0414, 0x00CC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__CSI1_DATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__CSI1_DATA_20                      = IOMUX_PAD(0x0418, 0x00D0, 4, 0x06EC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__GPIO3_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__GPIO3_IO_1                        = IOMUX_PAD(0x0418, 0x00D0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__KITTEN_TRACE_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__KITTEN_TRACE_0                    = IOMUX_PAD(0x0418, 0x00D0, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__LCDIF1_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__LCDIF1_DATA_0                     = IOMUX_PAD(0x0418, 0x00D0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__M4_TRACE_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__M4_TRACE_0                        = IOMUX_PAD(0x0418, 0x00D0, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__MMDC_DEBUG_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__MMDC_DEBUG_5                      = IOMUX_PAD(0x0418, 0x00D0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__SIM_M_HADDR_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__SIM_M_HADDR_21                    = IOMUX_PAD(0x0418, 0x00D0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__SRC_BT_CFG_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__SRC_BT_CFG_0                      = IOMUX_PAD(0x0418, 0x00D0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__VADC_TEST_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__VADC_TEST_5                       = IOMUX_PAD(0x0418, 0x00D0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA00__WEIM_CS1_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA00__WEIM_CS1_B                        = IOMUX_PAD(0x0418, 0x00D0, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__CSI1_DATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__CSI1_DATA_21                      = IOMUX_PAD(0x041C, 0x00D4, 4, 0x06F0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__GPIO3_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__GPIO3_IO_2                        = IOMUX_PAD(0x041C, 0x00D4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__KITTEN_TRACE_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__KITTEN_TRACE_1                    = IOMUX_PAD(0x041C, 0x00D4, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__LCDIF1_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__LCDIF1_DATA_1                     = IOMUX_PAD(0x041C, 0x00D4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__M4_TRACE_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__M4_TRACE_1                        = IOMUX_PAD(0x041C, 0x00D4, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__MMDC_DEBUG_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__MMDC_DEBUG_6                      = IOMUX_PAD(0x041C, 0x00D4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__SIM_M_HADDR_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__SIM_M_HADDR_22                    = IOMUX_PAD(0x041C, 0x00D4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__SRC_BT_CFG_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__SRC_BT_CFG_1                      = IOMUX_PAD(0x041C, 0x00D4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__VADC_TEST_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__VADC_TEST_6                       = IOMUX_PAD(0x041C, 0x00D4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA01__WEIM_CS2_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA01__WEIM_CS2_B                        = IOMUX_PAD(0x041C, 0x00D4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__CSI1_DATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__CSI1_DATA_22                      = IOMUX_PAD(0x0420, 0x00D8, 4, 0x06F4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__GPIO3_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__GPIO3_IO_3                        = IOMUX_PAD(0x0420, 0x00D8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__KITTEN_TRACE_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__KITTEN_TRACE_2                    = IOMUX_PAD(0x0420, 0x00D8, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__LCDIF1_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__LCDIF1_DATA_2                     = IOMUX_PAD(0x0420, 0x00D8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__M4_TRACE_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__M4_TRACE_2                        = IOMUX_PAD(0x0420, 0x00D8, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__MMDC_DEBUG_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__MMDC_DEBUG_7                      = IOMUX_PAD(0x0420, 0x00D8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__SIM_M_HADDR_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__SIM_M_HADDR_23                    = IOMUX_PAD(0x0420, 0x00D8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__SRC_BT_CFG_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__SRC_BT_CFG_2                      = IOMUX_PAD(0x0420, 0x00D8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__VADC_TEST_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__VADC_TEST_7                       = IOMUX_PAD(0x0420, 0x00D8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA02__WEIM_CS3_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA02__WEIM_CS3_B                        = IOMUX_PAD(0x0420, 0x00D8, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__CSI1_DATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__CSI1_DATA_23                      = IOMUX_PAD(0x0424, 0x00DC, 4, 0x06F8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__GPIO3_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__GPIO3_IO_4                        = IOMUX_PAD(0x0424, 0x00DC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__KITTEN_TRACE_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__KITTEN_TRACE_3                    = IOMUX_PAD(0x0424, 0x00DC, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__LCDIF1_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__LCDIF1_DATA_3                     = IOMUX_PAD(0x0424, 0x00DC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__M4_TRACE_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__M4_TRACE_3                        = IOMUX_PAD(0x0424, 0x00DC, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__MMDC_DEBUG_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__MMDC_DEBUG_8                      = IOMUX_PAD(0x0424, 0x00DC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__SIM_M_HADDR_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__SIM_M_HADDR_24                    = IOMUX_PAD(0x0424, 0x00DC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__SRC_BT_CFG_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__SRC_BT_CFG_3                      = IOMUX_PAD(0x0424, 0x00DC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__VADC_TEST_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__VADC_TEST_8                       = IOMUX_PAD(0x0424, 0x00DC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA03__WEIM_ADDR_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA03__WEIM_ADDR_24                      = IOMUX_PAD(0x0424, 0x00DC, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__CSI1_VSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__CSI1_VSYNC                        = IOMUX_PAD(0x0428, 0x00E0, 4, 0x0708, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__GPIO3_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__GPIO3_IO_5                        = IOMUX_PAD(0x0428, 0x00E0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__KITTEN_TRACE_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__KITTEN_TRACE_4                    = IOMUX_PAD(0x0428, 0x00E0, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__LCDIF1_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__LCDIF1_DATA_4                     = IOMUX_PAD(0x0428, 0x00E0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__MMDC_DEBUG_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__MMDC_DEBUG_9                      = IOMUX_PAD(0x0428, 0x00E0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__SIM_M_HADDR_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__SIM_M_HADDR_25                    = IOMUX_PAD(0x0428, 0x00E0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__SRC_BT_CFG_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__SRC_BT_CFG_4                      = IOMUX_PAD(0x0428, 0x00E0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__VADC_TEST_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__VADC_TEST_9                       = IOMUX_PAD(0x0428, 0x00E0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA04__WEIM_ADDR_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA04__WEIM_ADDR_25                      = IOMUX_PAD(0x0428, 0x00E0, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__CSI1_HSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__CSI1_HSYNC                        = IOMUX_PAD(0x042C, 0x00E4, 4, 0x0700, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__GPIO3_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__GPIO3_IO_6                        = IOMUX_PAD(0x042C, 0x00E4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__KITTEN_TRACE_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__KITTEN_TRACE_5                    = IOMUX_PAD(0x042C, 0x00E4, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__LCDIF1_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__LCDIF1_DATA_5                     = IOMUX_PAD(0x042C, 0x00E4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__MMDC_DEBUG_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__MMDC_DEBUG_10                     = IOMUX_PAD(0x042C, 0x00E4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__SIM_M_HADDR_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__SIM_M_HADDR_26                    = IOMUX_PAD(0x042C, 0x00E4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__SRC_BT_CFG_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__SRC_BT_CFG_5                      = IOMUX_PAD(0x042C, 0x00E4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__VADC_TEST_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__VADC_TEST_10                      = IOMUX_PAD(0x042C, 0x00E4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA05__WEIM_ADDR_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA05__WEIM_ADDR_26                      = IOMUX_PAD(0x042C, 0x00E4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__CSI1_PIXCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__CSI1_PIXCLK                       = IOMUX_PAD(0x0430, 0x00E8, 4, 0x0704, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__GPIO3_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__GPIO3_IO_7                        = IOMUX_PAD(0x0430, 0x00E8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__KITTEN_TRACE_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__KITTEN_TRACE_6                    = IOMUX_PAD(0x0430, 0x00E8, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__LCDIF1_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__LCDIF1_DATA_6                     = IOMUX_PAD(0x0430, 0x00E8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__MMDC_DEBUG_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__MMDC_DEBUG_11                     = IOMUX_PAD(0x0430, 0x00E8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__SIM_M_HADDR_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__SIM_M_HADDR_27                    = IOMUX_PAD(0x0430, 0x00E8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__SRC_BT_CFG_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__SRC_BT_CFG_6                      = IOMUX_PAD(0x0430, 0x00E8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__VADC_TEST_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__VADC_TEST_11                      = IOMUX_PAD(0x0430, 0x00E8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA06__WEIM_EB_B_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA06__WEIM_EB_B_2                       = IOMUX_PAD(0x0430, 0x00E8, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__CSI1_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__CSI1_MCLK                         = IOMUX_PAD(0x0434, 0x00EC, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__GPIO3_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__GPIO3_IO_8                        = IOMUX_PAD(0x0434, 0x00EC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__KITTEN_TRACE_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__KITTEN_TRACE_7                    = IOMUX_PAD(0x0434, 0x00EC, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__LCDIF1_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__LCDIF1_DATA_7                     = IOMUX_PAD(0x0434, 0x00EC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__MMDC_DEBUG_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__MMDC_DEBUG_12                     = IOMUX_PAD(0x0434, 0x00EC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__SIM_M_HADDR_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__SIM_M_HADDR_28                    = IOMUX_PAD(0x0434, 0x00EC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__SRC_BT_CFG_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__SRC_BT_CFG_7                      = IOMUX_PAD(0x0434, 0x00EC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__VADC_TEST_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__VADC_TEST_12                      = IOMUX_PAD(0x0434, 0x00EC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA07__WEIM_EB_B_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA07__WEIM_EB_B_3                       = IOMUX_PAD(0x0434, 0x00EC, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__CSI1_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__CSI1_DATA_9                       = IOMUX_PAD(0x0438, 0x00F0, 4, 0x06C4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__GPIO3_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__GPIO3_IO_9                        = IOMUX_PAD(0x0438, 0x00F0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__KITTEN_TRACE_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__KITTEN_TRACE_8                    = IOMUX_PAD(0x0438, 0x00F0, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__LCDIF1_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__LCDIF1_DATA_8                     = IOMUX_PAD(0x0438, 0x00F0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__MMDC_DEBUG_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__MMDC_DEBUG_13                     = IOMUX_PAD(0x0438, 0x00F0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__SIM_M_HADDR_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__SIM_M_HADDR_29                    = IOMUX_PAD(0x0438, 0x00F0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__SRC_BT_CFG_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__SRC_BT_CFG_8                      = IOMUX_PAD(0x0438, 0x00F0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__VADC_TEST_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__VADC_TEST_13                      = IOMUX_PAD(0x0438, 0x00F0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA08__WEIM_AD_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA08__WEIM_AD_8                         = IOMUX_PAD(0x0438, 0x00F0, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__CSI1_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__CSI1_DATA_8                       = IOMUX_PAD(0x043C, 0x00F4, 4, 0x06C0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__GPIO3_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__GPIO3_IO_10                       = IOMUX_PAD(0x043C, 0x00F4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__KITTEN_TRACE_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__KITTEN_TRACE_9                    = IOMUX_PAD(0x043C, 0x00F4, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__LCDIF1_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__LCDIF1_DATA_9                     = IOMUX_PAD(0x043C, 0x00F4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__MMDC_DEBUG_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__MMDC_DEBUG_14                     = IOMUX_PAD(0x043C, 0x00F4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__SIM_M_HADDR_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__SIM_M_HADDR_30                    = IOMUX_PAD(0x043C, 0x00F4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__SRC_BT_CFG_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__SRC_BT_CFG_9                      = IOMUX_PAD(0x043C, 0x00F4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__VADC_TEST_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__VADC_TEST_14                      = IOMUX_PAD(0x043C, 0x00F4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA09__WEIM_AD_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA09__WEIM_AD_9                         = IOMUX_PAD(0x043C, 0x00F4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__CSI1_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__CSI1_DATA_7                       = IOMUX_PAD(0x0440, 0x00F8, 4, 0x06BC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__GPIO3_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__GPIO3_IO_11                       = IOMUX_PAD(0x0440, 0x00F8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__KITTEN_TRACE_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__KITTEN_TRACE_10                   = IOMUX_PAD(0x0440, 0x00F8, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__LCDIF1_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__LCDIF1_DATA_10                    = IOMUX_PAD(0x0440, 0x00F8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__MMDC_DEBUG_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__MMDC_DEBUG_15                     = IOMUX_PAD(0x0440, 0x00F8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__SIM_M_HADDR_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__SIM_M_HADDR_31                    = IOMUX_PAD(0x0440, 0x00F8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__SRC_BT_CFG_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__SRC_BT_CFG_10                     = IOMUX_PAD(0x0440, 0x00F8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__VADC_TEST_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__VADC_TEST_15                      = IOMUX_PAD(0x0440, 0x00F8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA10__WEIM_AD_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA10__WEIM_AD_10                        = IOMUX_PAD(0x0440, 0x00F8, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__CSI1_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__CSI1_DATA_6                       = IOMUX_PAD(0x0444, 0x00FC, 4, 0x06B8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__GPIO3_IO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__GPIO3_IO_12                       = IOMUX_PAD(0x0444, 0x00FC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__KITTEN_TRACE_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__KITTEN_TRACE_11                   = IOMUX_PAD(0x0444, 0x00FC, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__LCDIF1_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__LCDIF1_DATA_11                    = IOMUX_PAD(0x0444, 0x00FC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__MMDC_DEBUG_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__MMDC_DEBUG_16                     = IOMUX_PAD(0x0444, 0x00FC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__SIM_M_HBURST_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__SIM_M_HBURST_0                    = IOMUX_PAD(0x0444, 0x00FC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__SRC_BT_CFG_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__SRC_BT_CFG_11                     = IOMUX_PAD(0x0444, 0x00FC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__VADC_TEST_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__VADC_TEST_16                      = IOMUX_PAD(0x0444, 0x00FC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA11__WEIM_AD_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA11__WEIM_AD_11                        = IOMUX_PAD(0x0444, 0x00FC, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__CSI1_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__CSI1_DATA_5                       = IOMUX_PAD(0x0448, 0x0100, 4, 0x06B4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__GPIO3_IO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__GPIO3_IO_13                       = IOMUX_PAD(0x0448, 0x0100, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__KITTEN_TRACE_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__KITTEN_TRACE_12                   = IOMUX_PAD(0x0448, 0x0100, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__LCDIF1_DATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__LCDIF1_DATA_12                    = IOMUX_PAD(0x0448, 0x0100, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__MMDC_DEBUG_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__MMDC_DEBUG_17                     = IOMUX_PAD(0x0448, 0x0100, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__SIM_M_HBURST_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__SIM_M_HBURST_1                    = IOMUX_PAD(0x0448, 0x0100, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__SRC_BT_CFG_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__SRC_BT_CFG_12                     = IOMUX_PAD(0x0448, 0x0100, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__VADC_TEST_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__VADC_TEST_17                      = IOMUX_PAD(0x0448, 0x0100, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA12__WEIM_AD_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA12__WEIM_AD_12                        = IOMUX_PAD(0x0448, 0x0100, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__CSI1_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__CSI1_DATA_4                       = IOMUX_PAD(0x044C, 0x0104, 4, 0x06B0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__GPIO3_IO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__GPIO3_IO_14                       = IOMUX_PAD(0x044C, 0x0104, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__KITTEN_TRACE_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__KITTEN_TRACE_13                   = IOMUX_PAD(0x044C, 0x0104, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__LCDIF1_DATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__LCDIF1_DATA_13                    = IOMUX_PAD(0x044C, 0x0104, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__MMDC_DEBUG_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__MMDC_DEBUG_18                     = IOMUX_PAD(0x044C, 0x0104, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__SIM_M_HBURST_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__SIM_M_HBURST_2                    = IOMUX_PAD(0x044C, 0x0104, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__SRC_BT_CFG_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__SRC_BT_CFG_13                     = IOMUX_PAD(0x044C, 0x0104, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__VADC_TEST_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__VADC_TEST_18                      = IOMUX_PAD(0x044C, 0x0104, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA13__WEIM_AD_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA13__WEIM_AD_13                        = IOMUX_PAD(0x044C, 0x0104, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__CSI1_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__CSI1_DATA_3                       = IOMUX_PAD(0x0450, 0x0108, 4, 0x06AC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__GPIO3_IO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__GPIO3_IO_15                       = IOMUX_PAD(0x0450, 0x0108, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__KITTEN_TRACE_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__KITTEN_TRACE_14                   = IOMUX_PAD(0x0450, 0x0108, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__LCDIF1_DATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__LCDIF1_DATA_14                    = IOMUX_PAD(0x0450, 0x0108, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__MMDC_DEBUG_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__MMDC_DEBUG_19                     = IOMUX_PAD(0x0450, 0x0108, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__SIM_M_HMASTLOCK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__SIM_M_HMASTLOCK                   = IOMUX_PAD(0x0450, 0x0108, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__SRC_BT_CFG_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__SRC_BT_CFG_14                     = IOMUX_PAD(0x0450, 0x0108, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__VADC_TEST_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__VADC_TEST_19                      = IOMUX_PAD(0x0450, 0x0108, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA14__WEIM_AD_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA14__WEIM_AD_14                        = IOMUX_PAD(0x0450, 0x0108, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__CSI1_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__CSI1_DATA_2                       = IOMUX_PAD(0x0454, 0x010C, 4, 0x06A8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__GPIO3_IO_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__GPIO3_IO_16                       = IOMUX_PAD(0x0454, 0x010C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__KITTEN_TRACE_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__KITTEN_TRACE_15                   = IOMUX_PAD(0x0454, 0x010C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__LCDIF1_DATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__LCDIF1_DATA_15                    = IOMUX_PAD(0x0454, 0x010C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__MMDC_DEBUG_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__MMDC_DEBUG_20                     = IOMUX_PAD(0x0454, 0x010C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__SIM_M_HPROT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__SIM_M_HPROT_0                     = IOMUX_PAD(0x0454, 0x010C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__SRC_BT_CFG_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__SRC_BT_CFG_15                     = IOMUX_PAD(0x0454, 0x010C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__VDEC_DEBUG_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__VDEC_DEBUG_0                      = IOMUX_PAD(0x0454, 0x010C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA15__WEIM_AD_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA15__WEIM_AD_15                        = IOMUX_PAD(0x0454, 0x010C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__CSI1_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__CSI1_DATA_1                       = IOMUX_PAD(0x0458, 0x0110, 4, 0x06A4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__GPIO3_IO_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__GPIO3_IO_17                       = IOMUX_PAD(0x0458, 0x0110, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__KITTEN_TRACE_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__KITTEN_TRACE_CLK                  = IOMUX_PAD(0x0458, 0x0110, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__LCDIF1_DATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__LCDIF1_DATA_16                    = IOMUX_PAD(0x0458, 0x0110, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__M4_TRACE_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__M4_TRACE_CLK                      = IOMUX_PAD(0x0458, 0x0110, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__MMDC_DEBUG_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__MMDC_DEBUG_21                     = IOMUX_PAD(0x0458, 0x0110, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__SIM_M_HPROT_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__SIM_M_HPROT_1                     = IOMUX_PAD(0x0458, 0x0110, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__SRC_BT_CFG_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__SRC_BT_CFG_24                     = IOMUX_PAD(0x0458, 0x0110, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__VDEC_DEBUG_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__VDEC_DEBUG_1                      = IOMUX_PAD(0x0458, 0x0110, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA16__WEIM_ADDR_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA16__WEIM_ADDR_16                      = IOMUX_PAD(0x0458, 0x0110, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__CSI1_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__CSI1_DATA_0                       = IOMUX_PAD(0x045C, 0x0114, 4, 0x06A0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__GPIO3_IO_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__GPIO3_IO_18                       = IOMUX_PAD(0x045C, 0x0114, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__KITTEN_TRACE_CTL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__KITTEN_TRACE_CTL                  = IOMUX_PAD(0x045C, 0x0114, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__LCDIF1_DATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__LCDIF1_DATA_17                    = IOMUX_PAD(0x045C, 0x0114, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__MMDC_DEBUG_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__MMDC_DEBUG_22                     = IOMUX_PAD(0x045C, 0x0114, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__SIM_M_HPROT_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__SIM_M_HPROT_2                     = IOMUX_PAD(0x045C, 0x0114, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__SRC_BT_CFG_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__SRC_BT_CFG_25                     = IOMUX_PAD(0x045C, 0x0114, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__VDEC_DEBUG_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__VDEC_DEBUG_2                      = IOMUX_PAD(0x045C, 0x0114, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA17__WEIM_ADDR_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA17__WEIM_ADDR_17                      = IOMUX_PAD(0x045C, 0x0114, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__CSI1_DATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__CSI1_DATA_15                      = IOMUX_PAD(0x0460, 0x0118, 4, 0x06D8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__GPIO3_IO_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__GPIO3_IO_19                       = IOMUX_PAD(0x0460, 0x0118, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__KITTEN_EVENTO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__KITTEN_EVENTO                     = IOMUX_PAD(0x0460, 0x0118, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__LCDIF1_DATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__LCDIF1_DATA_18                    = IOMUX_PAD(0x0460, 0x0118, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__M4_EVENTO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__M4_EVENTO                         = IOMUX_PAD(0x0460, 0x0118, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__MMDC_DEBUG_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__MMDC_DEBUG_23                     = IOMUX_PAD(0x0460, 0x0118, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__SIM_M_HPROT_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__SIM_M_HPROT_3                     = IOMUX_PAD(0x0460, 0x0118, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__SRC_BT_CFG_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__SRC_BT_CFG_26                     = IOMUX_PAD(0x0460, 0x0118, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__VDEC_DEBUG_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__VDEC_DEBUG_3                      = IOMUX_PAD(0x0460, 0x0118, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA18__WEIM_ADDR_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA18__WEIM_ADDR_18                      = IOMUX_PAD(0x0460, 0x0118, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__CSI1_DATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__CSI1_DATA_14                      = IOMUX_PAD(0x0464, 0x011C, 4, 0x06D4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__GPIO3_IO_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__GPIO3_IO_20                       = IOMUX_PAD(0x0464, 0x011C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__LCDIF1_DATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__LCDIF1_DATA_19                    = IOMUX_PAD(0x0464, 0x011C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__M4_TRACE_SWO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__M4_TRACE_SWO                      = IOMUX_PAD(0x0464, 0x011C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__MMDC_DEBUG_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__MMDC_DEBUG_24                     = IOMUX_PAD(0x0464, 0x011C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__SIM_M_HREADYOUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__SIM_M_HREADYOUT                   = IOMUX_PAD(0x0464, 0x011C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__SRC_BT_CFG_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__SRC_BT_CFG_27                     = IOMUX_PAD(0x0464, 0x011C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__VDEC_DEBUG_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__VDEC_DEBUG_4                      = IOMUX_PAD(0x0464, 0x011C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA19__WEIM_ADDR_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA19__WEIM_ADDR_19                      = IOMUX_PAD(0x0464, 0x011C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__CSI1_DATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__CSI1_DATA_13                      = IOMUX_PAD(0x0468, 0x0120, 4, 0x06D0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__ENET1_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__ENET1_1588_EVENT2_OUT             = IOMUX_PAD(0x0468, 0x0120, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__GPIO3_IO_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__GPIO3_IO_21                       = IOMUX_PAD(0x0468, 0x0120, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__LCDIF1_DATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__LCDIF1_DATA_20                    = IOMUX_PAD(0x0468, 0x0120, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__MMDC_DEBUG_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__MMDC_DEBUG_25                     = IOMUX_PAD(0x0468, 0x0120, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__PWM8_OUT                          = IOMUX_PAD(0x0468, 0x0120, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__SIM_M_HRESP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__SIM_M_HRESP                       = IOMUX_PAD(0x0468, 0x0120, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__SRC_BT_CFG_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__SRC_BT_CFG_28                     = IOMUX_PAD(0x0468, 0x0120, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__VDEC_DEBUG_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__VDEC_DEBUG_5                      = IOMUX_PAD(0x0468, 0x0120, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA20__WEIM_ADDR_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA20__WEIM_ADDR_20                      = IOMUX_PAD(0x0468, 0x0120, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__CSI1_DATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__CSI1_DATA_12                      = IOMUX_PAD(0x046C, 0x0124, 4, 0x06CC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__ENET1_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__ENET1_1588_EVENT3_OUT             = IOMUX_PAD(0x046C, 0x0124, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__GPIO3_IO_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__GPIO3_IO_22                       = IOMUX_PAD(0x046C, 0x0124, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__LCDIF1_DATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__LCDIF1_DATA_21                    = IOMUX_PAD(0x046C, 0x0124, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__MMDC_DEBUG_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__MMDC_DEBUG_26                     = IOMUX_PAD(0x046C, 0x0124, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__PWM7_OUT                          = IOMUX_PAD(0x046C, 0x0124, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__SIM_M_HSIZE_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__SIM_M_HSIZE_0                     = IOMUX_PAD(0x046C, 0x0124, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__SRC_BT_CFG_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__SRC_BT_CFG_29                     = IOMUX_PAD(0x046C, 0x0124, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__VDEC_DEBUG_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__VDEC_DEBUG_6                      = IOMUX_PAD(0x046C, 0x0124, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA21__WEIM_ADDR_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA21__WEIM_ADDR_21                      = IOMUX_PAD(0x046C, 0x0124, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__CSI1_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__CSI1_DATA_11                      = IOMUX_PAD(0x0470, 0x0128, 4, 0x06C8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__ENET2_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__ENET2_1588_EVENT2_OUT             = IOMUX_PAD(0x0470, 0x0128, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__GPIO3_IO_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__GPIO3_IO_23                       = IOMUX_PAD(0x0470, 0x0128, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__LCDIF1_DATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__LCDIF1_DATA_22                    = IOMUX_PAD(0x0470, 0x0128, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__MMDC_DEBUG_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__MMDC_DEBUG_27                     = IOMUX_PAD(0x0470, 0x0128, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__PWM6_OUT                          = IOMUX_PAD(0x0470, 0x0128, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__SIM_M_HSIZE_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__SIM_M_HSIZE_1                     = IOMUX_PAD(0x0470, 0x0128, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__SRC_BT_CFG_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__SRC_BT_CFG_30                     = IOMUX_PAD(0x0470, 0x0128, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__VDEC_DEBUG_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__VDEC_DEBUG_7                      = IOMUX_PAD(0x0470, 0x0128, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA22__WEIM_ADDR_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA22__WEIM_ADDR_22                      = IOMUX_PAD(0x0470, 0x0128, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__CSI1_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__CSI1_DATA_10                      = IOMUX_PAD(0x0474, 0x012C, 4, 0x06FC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__ENET2_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__ENET2_1588_EVENT3_OUT             = IOMUX_PAD(0x0474, 0x012C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__GPIO3_IO_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__GPIO3_IO_24                       = IOMUX_PAD(0x0474, 0x012C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__LCDIF1_DATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__LCDIF1_DATA_23                    = IOMUX_PAD(0x0474, 0x012C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__MMDC_DEBUG_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__MMDC_DEBUG_28                     = IOMUX_PAD(0x0474, 0x012C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__PWM5_OUT                          = IOMUX_PAD(0x0474, 0x012C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__SIM_M_HSIZE_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__SIM_M_HSIZE_2                     = IOMUX_PAD(0x0474, 0x012C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__SRC_BT_CFG_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__SRC_BT_CFG_31                     = IOMUX_PAD(0x0474, 0x012C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__VDEC_DEBUG_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__VDEC_DEBUG_8                      = IOMUX_PAD(0x0474, 0x012C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_DATA23__WEIM_ADDR_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_DATA23__WEIM_ADDR_23                      = IOMUX_PAD(0x0474, 0x012C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__AUDMUX_AUD3_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__AUDMUX_AUD3_TXC                   = IOMUX_PAD(0x0478, 0x0130, 2, 0x063C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__CSI1_DATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__CSI1_DATA_17                      = IOMUX_PAD(0x0478, 0x0130, 4, 0x06E0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__ENET1_1588_EVENT3_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__ENET1_1588_EVENT3_IN              = IOMUX_PAD(0x0478, 0x0130, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__GPIO3_IO_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__GPIO3_IO_25                       = IOMUX_PAD(0x0478, 0x0130, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__LCDIF1_ENABLE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__LCDIF1_ENABLE                     = IOMUX_PAD(0x0478, 0x0130, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__LCDIF1_RD_E	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__LCDIF1_RD_E                       = IOMUX_PAD(0x0478, 0x0130, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__MMDC_DEBUG_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__MMDC_DEBUG_1                      = IOMUX_PAD(0x0478, 0x0130, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__SIM_M_HADDR_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__SIM_M_HADDR_17                    = IOMUX_PAD(0x0478, 0x0130, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__USDHC1_CD_B                       = IOMUX_PAD(0x0478, 0x0130, 6, 0x0864, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_ENABLE__VADC_TEST_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_ENABLE__VADC_TEST_1                       = IOMUX_PAD(0x0478, 0x0130, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__AUDMUX_AUD3_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__AUDMUX_AUD3_TXD                    = IOMUX_PAD(0x047C, 0x0134, 2, 0x0630, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__CSI1_DATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__CSI1_DATA_18                       = IOMUX_PAD(0x047C, 0x0134, 4, 0x06E4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__ENET2_1588_EVENT2_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__ENET2_1588_EVENT2_IN               = IOMUX_PAD(0x047C, 0x0134, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__GPIO3_IO_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__GPIO3_IO_26                        = IOMUX_PAD(0x047C, 0x0134, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__LCDIF1_HSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__LCDIF1_HSYNC                       = IOMUX_PAD(0x047C, 0x0134, 0, 0x07E0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__LCDIF1_RS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__LCDIF1_RS                          = IOMUX_PAD(0x047C, 0x0134, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__MMDC_DEBUG_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__MMDC_DEBUG_2                       = IOMUX_PAD(0x047C, 0x0134, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__SIM_M_HADDR_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__SIM_M_HADDR_18                     = IOMUX_PAD(0x047C, 0x0134, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__USDHC2_WP                          = IOMUX_PAD(0x047C, 0x0134, 6, 0x0870, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_HSYNC__VADC_TEST_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_HSYNC__VADC_TEST_2                        = IOMUX_PAD(0x047C, 0x0134, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__AUDMUX_AUD3_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__AUDMUX_AUD3_RXD                    = IOMUX_PAD(0x0480, 0x0138, 2, 0x062C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__CCM_PMIC_RDY                       = IOMUX_PAD(0x0480, 0x0138, 6, 0x069C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__GPIO3_IO_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__GPIO3_IO_27                        = IOMUX_PAD(0x0480, 0x0138, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__KITTEN_EVENTI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__KITTEN_EVENTI                      = IOMUX_PAD(0x0480, 0x0138, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__LCDIF1_CS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__LCDIF1_CS                          = IOMUX_PAD(0x0480, 0x0138, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__LCDIF1_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__LCDIF1_RESET                       = IOMUX_PAD(0x0480, 0x0138, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__M4_EVENTI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__M4_EVENTI                          = IOMUX_PAD(0x0480, 0x0138, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__MMDC_DEBUG_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__MMDC_DEBUG_4                       = IOMUX_PAD(0x0480, 0x0138, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__SIM_M_HADDR_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__SIM_M_HADDR_20                     = IOMUX_PAD(0x0480, 0x0138, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_RESET__VADC_TEST_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_RESET__VADC_TEST_4                        = IOMUX_PAD(0x0480, 0x0138, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__AUDMUX_AUD3_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__AUDMUX_AUD3_TXFS                   = IOMUX_PAD(0x0484, 0x013C, 2, 0x0640, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__CSI1_DATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__CSI1_DATA_19                       = IOMUX_PAD(0x0484, 0x013C, 4, 0x06E8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__ENET2_1588_EVENT3_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__ENET2_1588_EVENT3_IN               = IOMUX_PAD(0x0484, 0x013C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__GPIO3_IO_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__GPIO3_IO_28                        = IOMUX_PAD(0x0484, 0x013C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__LCDIF1_BUSY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__LCDIF1_BUSY                        = IOMUX_PAD(0x0484, 0x013C, 1, 0x07E0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__LCDIF1_VSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__LCDIF1_VSYNC                       = IOMUX_PAD(0x0484, 0x013C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__MMDC_DEBUG_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__MMDC_DEBUG_3                       = IOMUX_PAD(0x0484, 0x013C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__SIM_M_HADDR_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__SIM_M_HADDR_19                     = IOMUX_PAD(0x0484, 0x013C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__USDHC2_CD_B                        = IOMUX_PAD(0x0484, 0x013C, 6, 0x086C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD1_VSYNC__VADC_TEST_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_LCD1_VSYNC__VADC_TEST_3                        = IOMUX_PAD(0x0484, 0x013C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_LCD_CLK__EIM_CS2_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__EIM_CS2_B                             = IOMUX_PAD(0x0390, 0x0104, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__EIM_CS2_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__EIM_CS2_B                            = IOMUX_PAD(0x0390, 0x0104, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__GPIO3_IO00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__GPIO3_IO00                            = IOMUX_PAD(0x0390, 0x0104, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__GPIO3_IO00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__GPIO3_IO00                           = IOMUX_PAD(0x0390, 0x0104, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__LCDIF_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__LCDIF_CLK                             = IOMUX_PAD(0x0390, 0x0104, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__LCDIF_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__LCDIF_CLK                            = IOMUX_PAD(0x0390, 0x0104, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__LCDIF_WR_RWN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__LCDIF_WR_RWN                          = IOMUX_PAD(0x0390, 0x0104, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__LCDIF_WR_RWN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__LCDIF_WR_RWN                         = IOMUX_PAD(0x0390, 0x0104, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__SAI3_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__SAI3_MCLK                             = IOMUX_PAD(0x0390, 0x0104, 3, 0x0600, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__SAI3_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__SAI3_MCLK                            = IOMUX_PAD(0x0390, 0x0104, 3, 0x0600, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__UART4_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__UART4_DCE_TX                          = IOMUX_PAD(0x0390, 0x0104, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__UART4_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__UART4_DCE_TX                         = IOMUX_PAD(0x0390, 0x0104, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__UART4_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__UART4_DTE_RX                          = IOMUX_PAD(0x0390, 0x0104, 2, 0x063C, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__UART4_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__UART4_DTE_RX                         = IOMUX_PAD(0x0390, 0x0104, 2, 0x063C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB                  = IOMUX_PAD(0x0390, 0x0104, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB                 = IOMUX_PAD(0x0390, 0x0104, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN               = IOMUX_PAD(0x03A4, 0x0118, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN              = IOMUX_PAD(0x03A4, 0x0118, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__GPIO3_IO05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__GPIO3_IO05                         = IOMUX_PAD(0x03A4, 0x0118, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__GPIO3_IO05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__GPIO3_IO05                        = IOMUX_PAD(0x03A4, 0x0118, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__I2C3_SDA                           = IOMUX_PAD(0x03A4, 0x0118, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__I2C3_SDA                          = IOMUX_PAD(0x03A4, 0x0118, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__LCDIF_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__LCDIF_DATA00                       = IOMUX_PAD(0x03A4, 0x0118, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__LCDIF_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__LCDIF_DATA00                      = IOMUX_PAD(0x03A4, 0x0118, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__PWM1_OUT                           = IOMUX_PAD(0x03A4, 0x0118, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__PWM1_OUT                          = IOMUX_PAD(0x03A4, 0x0118, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__SAI1_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__SAI1_MCLK                          = IOMUX_PAD(0x03A4, 0x0118, 8, 0x05E0, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__SAI1_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__SAI1_MCLK                         = IOMUX_PAD(0x03A4, 0x0118, 8, 0x05E0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA00__SRC_BT_CFG00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA00__SRC_BT_CFG00                       = IOMUX_PAD(0x03A4, 0x0118, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA00__SRC_BT_CFG00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA00__SRC_BT_CFG00                      = IOMUX_PAD(0x03A4, 0x0118, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT              = IOMUX_PAD(0x03A8, 0x011C, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT             = IOMUX_PAD(0x03A8, 0x011C, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__GPIO3_IO06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__GPIO3_IO06                         = IOMUX_PAD(0x03A8, 0x011C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__GPIO3_IO06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__GPIO3_IO06                        = IOMUX_PAD(0x03A8, 0x011C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__I2C3_SCL                           = IOMUX_PAD(0x03A8, 0x011C, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__I2C3_SCL                          = IOMUX_PAD(0x03A8, 0x011C, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__LCDIF_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__LCDIF_DATA01                       = IOMUX_PAD(0x03A8, 0x011C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__LCDIF_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__LCDIF_DATA01                      = IOMUX_PAD(0x03A8, 0x011C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__PWM2_OUT                           = IOMUX_PAD(0x03A8, 0x011C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__PWM2_OUT                          = IOMUX_PAD(0x03A8, 0x011C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__SAI1_TX_SYNC                       = IOMUX_PAD(0x03A8, 0x011C, 8, 0x05EC, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__SAI1_TX_SYNC                      = IOMUX_PAD(0x03A8, 0x011C, 8, 0x05EC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA01__SRC_BT_CFG01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA01__SRC_BT_CFG01                       = IOMUX_PAD(0x03A8, 0x011C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA01__SRC_BT_CFG01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA01__SRC_BT_CFG01                      = IOMUX_PAD(0x03A8, 0x011C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN               = IOMUX_PAD(0x03AC, 0x0120, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN              = IOMUX_PAD(0x03AC, 0x0120, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__GPIO3_IO07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__GPIO3_IO07                         = IOMUX_PAD(0x03AC, 0x0120, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__GPIO3_IO07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__GPIO3_IO07                        = IOMUX_PAD(0x03AC, 0x0120, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__I2C4_SDA                           = IOMUX_PAD(0x03AC, 0x0120, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__I2C4_SDA                          = IOMUX_PAD(0x03AC, 0x0120, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__LCDIF_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__LCDIF_DATA02                       = IOMUX_PAD(0x03AC, 0x0120, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__LCDIF_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__LCDIF_DATA02                      = IOMUX_PAD(0x03AC, 0x0120, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__PWM3_OUT                           = IOMUX_PAD(0x03AC, 0x0120, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__PWM3_OUT                          = IOMUX_PAD(0x03AC, 0x0120, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__SAI1_TX_BCLK                       = IOMUX_PAD(0x03AC, 0x0120, 8, 0x05E8, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__SAI1_TX_BCLK                      = IOMUX_PAD(0x03AC, 0x0120, 8, 0x05E8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA02__SRC_BT_CFG02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA02__SRC_BT_CFG02                       = IOMUX_PAD(0x03AC, 0x0120, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA02__SRC_BT_CFG02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA02__SRC_BT_CFG02                      = IOMUX_PAD(0x03AC, 0x0120, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT              = IOMUX_PAD(0x03B0, 0x0124, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT             = IOMUX_PAD(0x03B0, 0x0124, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__GPIO3_IO08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__GPIO3_IO08                         = IOMUX_PAD(0x03B0, 0x0124, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__GPIO3_IO08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__GPIO3_IO08                        = IOMUX_PAD(0x03B0, 0x0124, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__I2C4_SCL                           = IOMUX_PAD(0x03B0, 0x0124, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__I2C4_SCL                          = IOMUX_PAD(0x03B0, 0x0124, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__LCDIF_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__LCDIF_DATA03                       = IOMUX_PAD(0x03B0, 0x0124, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__LCDIF_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__LCDIF_DATA03                      = IOMUX_PAD(0x03B0, 0x0124, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__PWM4_OUT                           = IOMUX_PAD(0x03B0, 0x0124, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__PWM4_OUT                          = IOMUX_PAD(0x03B0, 0x0124, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__SAI1_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__SAI1_RX_DATA                       = IOMUX_PAD(0x03B0, 0x0124, 8, 0x05E4, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__SAI1_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__SAI1_RX_DATA                      = IOMUX_PAD(0x03B0, 0x0124, 8, 0x05E4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA03__SRC_BT_CFG03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA03__SRC_BT_CFG03                       = IOMUX_PAD(0x03B0, 0x0124, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA03__SRC_BT_CFG03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA03__SRC_BT_CFG03                      = IOMUX_PAD(0x03B0, 0x0124, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN               = IOMUX_PAD(0x03B4, 0x0128, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN              = IOMUX_PAD(0x03B4, 0x0128, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__GPIO3_IO09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__GPIO3_IO09                         = IOMUX_PAD(0x03B4, 0x0128, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__GPIO3_IO09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__GPIO3_IO09                        = IOMUX_PAD(0x03B4, 0x0128, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__LCDIF_DATA04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__LCDIF_DATA04                       = IOMUX_PAD(0x03B4, 0x0128, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__LCDIF_DATA04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__LCDIF_DATA04                      = IOMUX_PAD(0x03B4, 0x0128, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__SAI1_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__SAI1_TX_DATA                       = IOMUX_PAD(0x03B4, 0x0128, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__SAI1_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__SAI1_TX_DATA                      = IOMUX_PAD(0x03B4, 0x0128, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__SPDIF_SR_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__SPDIF_SR_CLK                       = IOMUX_PAD(0x03B4, 0x0128, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__SPDIF_SR_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__SPDIF_SR_CLK                      = IOMUX_PAD(0x03B4, 0x0128, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__SRC_BT_CFG04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__SRC_BT_CFG04                       = IOMUX_PAD(0x03B4, 0x0128, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__SRC_BT_CFG04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__SRC_BT_CFG04                      = IOMUX_PAD(0x03B4, 0x0128, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__UART8_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__UART8_DCE_CTS                      = IOMUX_PAD(0x03B4, 0x0128, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__UART8_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__UART8_DCE_CTS                     = IOMUX_PAD(0x03B4, 0x0128, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA04__UART8_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA04__UART8_DTE_RTS                      = IOMUX_PAD(0x03B4, 0x0128, 1, 0x0658, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA04__UART8_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA04__UART8_DTE_RTS                     = IOMUX_PAD(0x03B4, 0x0128, 1, 0x0658, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__ECSPI1_SS1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__ECSPI1_SS1                         = IOMUX_PAD(0x03B8, 0x012C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__ECSPI1_SS1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__ECSPI1_SS1                        = IOMUX_PAD(0x03B8, 0x012C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT              = IOMUX_PAD(0x03B8, 0x012C, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT             = IOMUX_PAD(0x03B8, 0x012C, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__GPIO3_IO10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__GPIO3_IO10                         = IOMUX_PAD(0x03B8, 0x012C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__GPIO3_IO10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__GPIO3_IO10                        = IOMUX_PAD(0x03B8, 0x012C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__LCDIF_DATA05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__LCDIF_DATA05                       = IOMUX_PAD(0x03B8, 0x012C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__LCDIF_DATA05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__LCDIF_DATA05                      = IOMUX_PAD(0x03B8, 0x012C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__SPDIF_OUT                          = IOMUX_PAD(0x03B8, 0x012C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__SPDIF_OUT                         = IOMUX_PAD(0x03B8, 0x012C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__SRC_BT_CFG05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__SRC_BT_CFG05                       = IOMUX_PAD(0x03B8, 0x012C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__SRC_BT_CFG05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__SRC_BT_CFG05                      = IOMUX_PAD(0x03B8, 0x012C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__UART8_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__UART8_DCE_RTS                      = IOMUX_PAD(0x03B8, 0x012C, 1, 0x0658, 3/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__UART8_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__UART8_DCE_RTS                     = IOMUX_PAD(0x03B8, 0x012C, 1, 0x0658, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA05__UART8_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA05__UART8_DTE_CTS                      = IOMUX_PAD(0x03B8, 0x012C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA05__UART8_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA05__UART8_DTE_CTS                     = IOMUX_PAD(0x03B8, 0x012C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__ECSPI1_SS2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__ECSPI1_SS2                         = IOMUX_PAD(0x03BC, 0x0130, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__ECSPI1_SS2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__ECSPI1_SS2                        = IOMUX_PAD(0x03BC, 0x0130, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN               = IOMUX_PAD(0x03BC, 0x0130, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN              = IOMUX_PAD(0x03BC, 0x0130, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__GPIO3_IO11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__GPIO3_IO11                         = IOMUX_PAD(0x03BC, 0x0130, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__GPIO3_IO11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__GPIO3_IO11                        = IOMUX_PAD(0x03BC, 0x0130, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__LCDIF_DATA06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__LCDIF_DATA06                       = IOMUX_PAD(0x03BC, 0x0130, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__LCDIF_DATA06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__LCDIF_DATA06                      = IOMUX_PAD(0x03BC, 0x0130, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__SPDIF_LOCK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__SPDIF_LOCK                         = IOMUX_PAD(0x03BC, 0x0130, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__SPDIF_LOCK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__SPDIF_LOCK                        = IOMUX_PAD(0x03BC, 0x0130, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__SRC_BT_CFG06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__SRC_BT_CFG06                       = IOMUX_PAD(0x03BC, 0x0130, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__SRC_BT_CFG06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__SRC_BT_CFG06                      = IOMUX_PAD(0x03BC, 0x0130, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__UART7_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__UART7_DCE_CTS                      = IOMUX_PAD(0x03BC, 0x0130, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__UART7_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__UART7_DCE_CTS                     = IOMUX_PAD(0x03BC, 0x0130, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA06__UART7_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA06__UART7_DTE_RTS                      = IOMUX_PAD(0x03BC, 0x0130, 1, 0x0650, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA06__UART7_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA06__UART7_DTE_RTS                     = IOMUX_PAD(0x03BC, 0x0130, 1, 0x0650, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__ECSPI1_SS3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__ECSPI1_SS3                         = IOMUX_PAD(0x03C0, 0x0134, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__ECSPI1_SS3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__ECSPI1_SS3                        = IOMUX_PAD(0x03C0, 0x0134, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT              = IOMUX_PAD(0x03C0, 0x0134, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT             = IOMUX_PAD(0x03C0, 0x0134, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__GPIO3_IO12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__GPIO3_IO12                         = IOMUX_PAD(0x03C0, 0x0134, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__GPIO3_IO12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__GPIO3_IO12                        = IOMUX_PAD(0x03C0, 0x0134, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__LCDIF_DATA07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__LCDIF_DATA07                       = IOMUX_PAD(0x03C0, 0x0134, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__LCDIF_DATA07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__LCDIF_DATA07                      = IOMUX_PAD(0x03C0, 0x0134, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__SPDIF_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__SPDIF_EXT_CLK                      = IOMUX_PAD(0x03C0, 0x0134, 4, 0x061C, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__SPDIF_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__SPDIF_EXT_CLK                     = IOMUX_PAD(0x03C0, 0x0134, 4, 0x061C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__SRC_BT_CFG07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__SRC_BT_CFG07                       = IOMUX_PAD(0x03C0, 0x0134, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__SRC_BT_CFG07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__SRC_BT_CFG07                      = IOMUX_PAD(0x03C0, 0x0134, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__UART7_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__UART7_DCE_RTS                      = IOMUX_PAD(0x03C0, 0x0134, 1, 0x0650, 3/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__UART7_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__UART7_DCE_RTS                     = IOMUX_PAD(0x03C0, 0x0134, 1, 0x0650, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA07__UART7_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA07__UART7_DTE_CTS                      = IOMUX_PAD(0x03C0, 0x0134, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA07__UART7_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA07__UART7_DTE_CTS                     = IOMUX_PAD(0x03C0, 0x0134, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__CSI_DATA16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__CSI_DATA16                         = IOMUX_PAD(0x03C4, 0x0138, 3, 0x0504, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__CSI_DATA16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__CSI_DATA16                        = IOMUX_PAD(0x03C4, 0x0138, 3, 0x0504, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__EIM_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__EIM_DATA00                         = IOMUX_PAD(0x03C4, 0x0138, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__EIM_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__EIM_DATA00                        = IOMUX_PAD(0x03C4, 0x0138, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__FLEXCAN1_TX                        = IOMUX_PAD(0x03C4, 0x0138, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__FLEXCAN1_TX                       = IOMUX_PAD(0x03C4, 0x0138, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__GPIO3_IO13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__GPIO3_IO13                         = IOMUX_PAD(0x03C4, 0x0138, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__GPIO3_IO13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__GPIO3_IO13                        = IOMUX_PAD(0x03C4, 0x0138, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__LCDIF_DATA08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__LCDIF_DATA08                       = IOMUX_PAD(0x03C4, 0x0138, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__LCDIF_DATA08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__LCDIF_DATA08                      = IOMUX_PAD(0x03C4, 0x0138, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__SPDIF_IN                           = IOMUX_PAD(0x03C4, 0x0138, 1, 0x0618, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__SPDIF_IN                          = IOMUX_PAD(0x03C4, 0x0138, 1, 0x0618, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA08__SRC_BT_CFG08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA08__SRC_BT_CFG08                       = IOMUX_PAD(0x03C4, 0x0138, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA08__SRC_BT_CFG08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA08__SRC_BT_CFG08                      = IOMUX_PAD(0x03C4, 0x0138, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__CSI_DATA17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__CSI_DATA17                         = IOMUX_PAD(0x03C8, 0x013C, 3, 0x0508, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__CSI_DATA17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__CSI_DATA17                        = IOMUX_PAD(0x03C8, 0x013C, 3, 0x0508, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__EIM_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__EIM_DATA01                         = IOMUX_PAD(0x03C8, 0x013C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__EIM_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__EIM_DATA01                        = IOMUX_PAD(0x03C8, 0x013C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__FLEXCAN1_RX                        = IOMUX_PAD(0x03C8, 0x013C, 8, 0x0584, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__FLEXCAN1_RX                       = IOMUX_PAD(0x03C8, 0x013C, 8, 0x0584, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__GPIO3_IO14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__GPIO3_IO14                         = IOMUX_PAD(0x03C8, 0x013C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__GPIO3_IO14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__GPIO3_IO14                        = IOMUX_PAD(0x03C8, 0x013C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__LCDIF_DATA09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__LCDIF_DATA09                       = IOMUX_PAD(0x03C8, 0x013C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__LCDIF_DATA09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__LCDIF_DATA09                      = IOMUX_PAD(0x03C8, 0x013C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__SAI3_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__SAI3_MCLK                          = IOMUX_PAD(0x03C8, 0x013C, 1, 0x0600, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__SAI3_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__SAI3_MCLK                         = IOMUX_PAD(0x03C8, 0x013C, 1, 0x0600, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA09__SRC_BT_CFG09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA09__SRC_BT_CFG09                       = IOMUX_PAD(0x03C8, 0x013C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA09__SRC_BT_CFG09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA09__SRC_BT_CFG09                      = IOMUX_PAD(0x03C8, 0x013C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__CSI_DATA18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__CSI_DATA18                         = IOMUX_PAD(0x03CC, 0x0140, 3, 0x050C, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__CSI_DATA18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__CSI_DATA18                        = IOMUX_PAD(0x03CC, 0x0140, 3, 0x050C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__EIM_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__EIM_DATA02                         = IOMUX_PAD(0x03CC, 0x0140, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__EIM_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__EIM_DATA02                        = IOMUX_PAD(0x03CC, 0x0140, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__FLEXCAN2_TX                        = IOMUX_PAD(0x03CC, 0x0140, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__FLEXCAN2_TX                       = IOMUX_PAD(0x03CC, 0x0140, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__GPIO3_IO15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__GPIO3_IO15                         = IOMUX_PAD(0x03CC, 0x0140, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__GPIO3_IO15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__GPIO3_IO15                        = IOMUX_PAD(0x03CC, 0x0140, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__LCDIF_DATA10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__LCDIF_DATA10                       = IOMUX_PAD(0x03CC, 0x0140, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__LCDIF_DATA10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__LCDIF_DATA10                      = IOMUX_PAD(0x03CC, 0x0140, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__SAI3_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__SAI3_RX_SYNC                       = IOMUX_PAD(0x03CC, 0x0140, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__SAI3_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__SAI3_RX_SYNC                      = IOMUX_PAD(0x03CC, 0x0140, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA10__SRC_BT_CFG10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA10__SRC_BT_CFG10                       = IOMUX_PAD(0x03CC, 0x0140, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA10__SRC_BT_CFG10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA10__SRC_BT_CFG10                      = IOMUX_PAD(0x03CC, 0x0140, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__CSI_DATA19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__CSI_DATA19                         = IOMUX_PAD(0x03D0, 0x0144, 3, 0x0510, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__CSI_DATA19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__CSI_DATA19                        = IOMUX_PAD(0x03D0, 0x0144, 3, 0x0510, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__EIM_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__EIM_DATA03                         = IOMUX_PAD(0x03D0, 0x0144, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__EIM_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__EIM_DATA03                        = IOMUX_PAD(0x03D0, 0x0144, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__FLEXCAN2_RX                        = IOMUX_PAD(0x03D0, 0x0144, 8, 0x0588, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__FLEXCAN2_RX                       = IOMUX_PAD(0x03D0, 0x0144, 8, 0x0588, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__GPIO3_IO16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__GPIO3_IO16                         = IOMUX_PAD(0x03D0, 0x0144, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__GPIO3_IO16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__GPIO3_IO16                        = IOMUX_PAD(0x03D0, 0x0144, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__LCDIF_DATA11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__LCDIF_DATA11                       = IOMUX_PAD(0x03D0, 0x0144, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__LCDIF_DATA11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__LCDIF_DATA11                      = IOMUX_PAD(0x03D0, 0x0144, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__SAI3_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__SAI3_RX_BCLK                       = IOMUX_PAD(0x03D0, 0x0144, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__SAI3_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__SAI3_RX_BCLK                      = IOMUX_PAD(0x03D0, 0x0144, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA11__SRC_BT_CFG11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA11__SRC_BT_CFG11                       = IOMUX_PAD(0x03D0, 0x0144, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA11__SRC_BT_CFG11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA11__SRC_BT_CFG11                      = IOMUX_PAD(0x03D0, 0x0144, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__CSI_DATA20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__CSI_DATA20                         = IOMUX_PAD(0x03D4, 0x0148, 3, 0x0514, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__CSI_DATA20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__CSI_DATA20                        = IOMUX_PAD(0x03D4, 0x0148, 3, 0x0514, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__ECSPI1_RDY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__ECSPI1_RDY                         = IOMUX_PAD(0x03D4, 0x0148, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__ECSPI1_RDY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__ECSPI1_RDY                        = IOMUX_PAD(0x03D4, 0x0148, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__EIM_DATA04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__EIM_DATA04                         = IOMUX_PAD(0x03D4, 0x0148, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__EIM_DATA04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__EIM_DATA04                        = IOMUX_PAD(0x03D4, 0x0148, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__GPIO3_IO17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__GPIO3_IO17                         = IOMUX_PAD(0x03D4, 0x0148, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__GPIO3_IO17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__GPIO3_IO17                        = IOMUX_PAD(0x03D4, 0x0148, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__LCDIF_DATA12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__LCDIF_DATA12                       = IOMUX_PAD(0x03D4, 0x0148, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__LCDIF_DATA12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__LCDIF_DATA12                      = IOMUX_PAD(0x03D4, 0x0148, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__SAI3_TX_SYNC                       = IOMUX_PAD(0x03D4, 0x0148, 1, 0x060C, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__SAI3_TX_SYNC                      = IOMUX_PAD(0x03D4, 0x0148, 1, 0x060C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA12__SRC_BT_CFG12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA12__SRC_BT_CFG12                       = IOMUX_PAD(0x03D4, 0x0148, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA12__SRC_BT_CFG12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA12__SRC_BT_CFG12                      = IOMUX_PAD(0x03D4, 0x0148, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__CSI_DATA21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__CSI_DATA21                         = IOMUX_PAD(0x03D8, 0x014C, 3, 0x0518, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__CSI_DATA21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__CSI_DATA21                        = IOMUX_PAD(0x03D8, 0x014C, 3, 0x0518, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__EIM_DATA05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__EIM_DATA05                         = IOMUX_PAD(0x03D8, 0x014C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__EIM_DATA05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__EIM_DATA05                        = IOMUX_PAD(0x03D8, 0x014C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__GPIO3_IO18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__GPIO3_IO18                         = IOMUX_PAD(0x03D8, 0x014C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__GPIO3_IO18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__GPIO3_IO18                        = IOMUX_PAD(0x03D8, 0x014C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__LCDIF_DATA13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__LCDIF_DATA13                       = IOMUX_PAD(0x03D8, 0x014C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__LCDIF_DATA13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__LCDIF_DATA13                      = IOMUX_PAD(0x03D8, 0x014C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__SAI3_TX_BCLK                       = IOMUX_PAD(0x03D8, 0x014C, 1, 0x0608, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__SAI3_TX_BCLK                      = IOMUX_PAD(0x03D8, 0x014C, 1, 0x0608, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__SRC_BT_CFG13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__SRC_BT_CFG13                       = IOMUX_PAD(0x03D8, 0x014C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__SRC_BT_CFG13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__SRC_BT_CFG13                      = IOMUX_PAD(0x03D8, 0x014C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA13__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA13__USDHC2_RESET_B                     = IOMUX_PAD(0x03D8, 0x014C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA13__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA13__USDHC2_RESET_B                    = IOMUX_PAD(0x03D8, 0x014C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__CSI_DATA22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__CSI_DATA22                         = IOMUX_PAD(0x03DC, 0x0150, 3, 0x051C, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__CSI_DATA22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__CSI_DATA22                        = IOMUX_PAD(0x03DC, 0x0150, 3, 0x051C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__EIM_DATA06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__EIM_DATA06                         = IOMUX_PAD(0x03DC, 0x0150, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__EIM_DATA06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__EIM_DATA06                        = IOMUX_PAD(0x03DC, 0x0150, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__GPIO3_IO19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__GPIO3_IO19                         = IOMUX_PAD(0x03DC, 0x0150, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__GPIO3_IO19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__GPIO3_IO19                        = IOMUX_PAD(0x03DC, 0x0150, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__LCDIF_DATA14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__LCDIF_DATA14                       = IOMUX_PAD(0x03DC, 0x0150, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__LCDIF_DATA14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__LCDIF_DATA14                      = IOMUX_PAD(0x03DC, 0x0150, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__SAI3_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__SAI3_RX_DATA                       = IOMUX_PAD(0x03DC, 0x0150, 1, 0x0604, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__SAI3_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__SAI3_RX_DATA                      = IOMUX_PAD(0x03DC, 0x0150, 1, 0x0604, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__SRC_BT_CFG14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__SRC_BT_CFG14                       = IOMUX_PAD(0x03DC, 0x0150, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__SRC_BT_CFG14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__SRC_BT_CFG14                      = IOMUX_PAD(0x03DC, 0x0150, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA14__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA14__USDHC2_DATA4                       = IOMUX_PAD(0x03DC, 0x0150, 8, 0x068C, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA14__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA14__USDHC2_DATA4                      = IOMUX_PAD(0x03DC, 0x0150, 8, 0x068C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__CSI_DATA23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__CSI_DATA23                         = IOMUX_PAD(0x03E0, 0x0154, 3, 0x0520, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__CSI_DATA23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__CSI_DATA23                        = IOMUX_PAD(0x03E0, 0x0154, 3, 0x0520, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__EIM_DATA07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__EIM_DATA07                         = IOMUX_PAD(0x03E0, 0x0154, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__EIM_DATA07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__EIM_DATA07                        = IOMUX_PAD(0x03E0, 0x0154, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__GPIO3_IO20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__GPIO3_IO20                         = IOMUX_PAD(0x03E0, 0x0154, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__GPIO3_IO20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__GPIO3_IO20                        = IOMUX_PAD(0x03E0, 0x0154, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__LCDIF_DATA15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__LCDIF_DATA15                       = IOMUX_PAD(0x03E0, 0x0154, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__LCDIF_DATA15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__LCDIF_DATA15                      = IOMUX_PAD(0x03E0, 0x0154, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__SAI3_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__SAI3_TX_DATA                       = IOMUX_PAD(0x03E0, 0x0154, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__SAI3_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__SAI3_TX_DATA                      = IOMUX_PAD(0x03E0, 0x0154, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__SRC_BT_CFG15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__SRC_BT_CFG15                       = IOMUX_PAD(0x03E0, 0x0154, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__SRC_BT_CFG15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__SRC_BT_CFG15                      = IOMUX_PAD(0x03E0, 0x0154, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA15__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA15__USDHC2_DATA5                       = IOMUX_PAD(0x03E0, 0x0154, 8, 0x0690, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA15__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA15__USDHC2_DATA5                      = IOMUX_PAD(0x03E0, 0x0154, 8, 0x0690, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__CSI_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__CSI_DATA01                         = IOMUX_PAD(0x03E4, 0x0158, 3, 0x04D4, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__CSI_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__CSI_DATA01                        = IOMUX_PAD(0x03E4, 0x0158, 3, 0x04D4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__EIM_DATA08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__EIM_DATA08                         = IOMUX_PAD(0x03E4, 0x0158, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__EIM_DATA08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__EIM_DATA08                        = IOMUX_PAD(0x03E4, 0x0158, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__GPIO3_IO21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__GPIO3_IO21                         = IOMUX_PAD(0x03E4, 0x0158, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__GPIO3_IO21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__GPIO3_IO21                        = IOMUX_PAD(0x03E4, 0x0158, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__LCDIF_DATA16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__LCDIF_DATA16                       = IOMUX_PAD(0x03E4, 0x0158, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__LCDIF_DATA16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__LCDIF_DATA16                      = IOMUX_PAD(0x03E4, 0x0158, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__SRC_BT_CFG24	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__SRC_BT_CFG24                       = IOMUX_PAD(0x03E4, 0x0158, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__SRC_BT_CFG24	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__SRC_BT_CFG24                      = IOMUX_PAD(0x03E4, 0x0158, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__UART7_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__UART7_DCE_TX                       = IOMUX_PAD(0x03E4, 0x0158, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__UART7_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__UART7_DCE_TX                      = IOMUX_PAD(0x03E4, 0x0158, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__UART7_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__UART7_DTE_RX                       = IOMUX_PAD(0x03E4, 0x0158, 1, 0x0654, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__UART7_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__UART7_DTE_RX                      = IOMUX_PAD(0x03E4, 0x0158, 1, 0x0654, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA16__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA16__USDHC2_DATA6                       = IOMUX_PAD(0x03E4, 0x0158, 8, 0x0694, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA16__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA16__USDHC2_DATA6                      = IOMUX_PAD(0x03E4, 0x0158, 8, 0x0694, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__CSI_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__CSI_DATA00                         = IOMUX_PAD(0x03E8, 0x015C, 3, 0x04D0, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__CSI_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__CSI_DATA00                        = IOMUX_PAD(0x03E8, 0x015C, 3, 0x04D0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__EIM_DATA09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__EIM_DATA09                         = IOMUX_PAD(0x03E8, 0x015C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__EIM_DATA09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__EIM_DATA09                        = IOMUX_PAD(0x03E8, 0x015C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__GPIO3_IO22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__GPIO3_IO22                         = IOMUX_PAD(0x03E8, 0x015C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__GPIO3_IO22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__GPIO3_IO22                        = IOMUX_PAD(0x03E8, 0x015C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__LCDIF_DATA17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__LCDIF_DATA17                       = IOMUX_PAD(0x03E8, 0x015C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__LCDIF_DATA17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__LCDIF_DATA17                      = IOMUX_PAD(0x03E8, 0x015C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__SRC_BT_CFG25	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__SRC_BT_CFG25                       = IOMUX_PAD(0x03E8, 0x015C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__SRC_BT_CFG25	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__SRC_BT_CFG25                      = IOMUX_PAD(0x03E8, 0x015C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__UART7_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__UART7_DCE_RX                       = IOMUX_PAD(0x03E8, 0x015C, 1, 0x0654, 3/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__UART7_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__UART7_DCE_RX                      = IOMUX_PAD(0x03E8, 0x015C, 1, 0x0654, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__UART7_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__UART7_DTE_TX                       = IOMUX_PAD(0x03E8, 0x015C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__UART7_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__UART7_DTE_TX                      = IOMUX_PAD(0x03E8, 0x015C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA17__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA17__USDHC2_DATA7                       = IOMUX_PAD(0x03E8, 0x015C, 8, 0x0698, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA17__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA17__USDHC2_DATA7                      = IOMUX_PAD(0x03E8, 0x015C, 8, 0x0698, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__CA7_MX6ULL_EVENTO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__CA7_MX6ULL_EVENTO                 = IOMUX_PAD(0x03EC, 0x0160, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__CA7_MX6UL_EVENTO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__CA7_MX6UL_EVENTO                   = IOMUX_PAD(0x03EC, 0x0160, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__CSI_DATA10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__CSI_DATA10                         = IOMUX_PAD(0x03EC, 0x0160, 3, 0x04EC, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__CSI_DATA10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__CSI_DATA10                        = IOMUX_PAD(0x03EC, 0x0160, 3, 0x04EC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__EIM_DATA10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__EIM_DATA10                         = IOMUX_PAD(0x03EC, 0x0160, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__EIM_DATA10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__EIM_DATA10                        = IOMUX_PAD(0x03EC, 0x0160, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__GPIO3_IO23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__GPIO3_IO23                         = IOMUX_PAD(0x03EC, 0x0160, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__GPIO3_IO23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__GPIO3_IO23                        = IOMUX_PAD(0x03EC, 0x0160, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__LCDIF_DATA18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__LCDIF_DATA18                       = IOMUX_PAD(0x03EC, 0x0160, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__LCDIF_DATA18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__LCDIF_DATA18                      = IOMUX_PAD(0x03EC, 0x0160, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__PWM5_OUT                           = IOMUX_PAD(0x03EC, 0x0160, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__PWM5_OUT                          = IOMUX_PAD(0x03EC, 0x0160, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__SRC_BT_CFG26	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__SRC_BT_CFG26                       = IOMUX_PAD(0x03EC, 0x0160, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__SRC_BT_CFG26	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__SRC_BT_CFG26                      = IOMUX_PAD(0x03EC, 0x0160, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA18__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA18__USDHC2_CMD                         = IOMUX_PAD(0x03EC, 0x0160, 8, 0x0678, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA18__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA18__USDHC2_CMD                        = IOMUX_PAD(0x03EC, 0x0160, 8, 0x0678, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__CSI_DATA11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__CSI_DATA11                         = IOMUX_PAD(0x03F0, 0x0164, 3, 0x04F0, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__CSI_DATA11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__CSI_DATA11                        = IOMUX_PAD(0x03F0, 0x0164, 3, 0x04F0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__EIM_DATA11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__EIM_DATA11                         = IOMUX_PAD(0x03F0, 0x0164, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__EIM_DATA11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__EIM_DATA11                        = IOMUX_PAD(0x03F0, 0x0164, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__GPIO3_IO24	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__GPIO3_IO24                         = IOMUX_PAD(0x03F0, 0x0164, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__GPIO3_IO24	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__GPIO3_IO24                        = IOMUX_PAD(0x03F0, 0x0164, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__LCDIF_DATA19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__LCDIF_DATA19                       = IOMUX_PAD(0x03F0, 0x0164, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__LCDIF_DATA19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__LCDIF_DATA19                      = IOMUX_PAD(0x03F0, 0x0164, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__PWM6_OUT                           = IOMUX_PAD(0x03F0, 0x0164, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__PWM6_OUT                          = IOMUX_PAD(0x03F0, 0x0164, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__SRC_BT_CFG27	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__SRC_BT_CFG27                       = IOMUX_PAD(0x03F0, 0x0164, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__SRC_BT_CFG27	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__SRC_BT_CFG27                      = IOMUX_PAD(0x03F0, 0x0164, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__USDHC2_CLK                         = IOMUX_PAD(0x03F0, 0x0164, 8, 0x0670, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__USDHC2_CLK                        = IOMUX_PAD(0x03F0, 0x0164, 8, 0x0670, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA19__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA19__WDOG1_WDOG_ANY                     = IOMUX_PAD(0x03F0, 0x0164, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA19__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA19__WDOG1_WDOG_ANY                    = IOMUX_PAD(0x03F0, 0x0164, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__CSI_DATA12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__CSI_DATA12                         = IOMUX_PAD(0x03F4, 0x0168, 3, 0x04F4, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__CSI_DATA12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__CSI_DATA12                        = IOMUX_PAD(0x03F4, 0x0168, 3, 0x04F4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__ECSPI1_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__ECSPI1_SCLK                        = IOMUX_PAD(0x03F4, 0x0168, 2, 0x0534, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__ECSPI1_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__ECSPI1_SCLK                       = IOMUX_PAD(0x03F4, 0x0168, 2, 0x0534, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__EIM_DATA12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__EIM_DATA12                         = IOMUX_PAD(0x03F4, 0x0168, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__EIM_DATA12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__EIM_DATA12                        = IOMUX_PAD(0x03F4, 0x0168, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__GPIO3_IO25	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__GPIO3_IO25                         = IOMUX_PAD(0x03F4, 0x0168, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__GPIO3_IO25	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__GPIO3_IO25                        = IOMUX_PAD(0x03F4, 0x0168, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__LCDIF_DATA20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__LCDIF_DATA20                       = IOMUX_PAD(0x03F4, 0x0168, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__LCDIF_DATA20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__LCDIF_DATA20                      = IOMUX_PAD(0x03F4, 0x0168, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__SRC_BT_CFG28	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__SRC_BT_CFG28                       = IOMUX_PAD(0x03F4, 0x0168, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__SRC_BT_CFG28	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__SRC_BT_CFG28                      = IOMUX_PAD(0x03F4, 0x0168, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__UART8_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__UART8_DCE_TX                       = IOMUX_PAD(0x03F4, 0x0168, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__UART8_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__UART8_DCE_TX                      = IOMUX_PAD(0x03F4, 0x0168, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__UART8_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__UART8_DTE_RX                       = IOMUX_PAD(0x03F4, 0x0168, 1, 0x065C, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__UART8_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__UART8_DTE_RX                      = IOMUX_PAD(0x03F4, 0x0168, 1, 0x065C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA20__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA20__USDHC2_DATA0                       = IOMUX_PAD(0x03F4, 0x0168, 8, 0x067C, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA20__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA20__USDHC2_DATA0                      = IOMUX_PAD(0x03F4, 0x0168, 8, 0x067C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__CSI_DATA13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__CSI_DATA13                         = IOMUX_PAD(0x03F8, 0x016C, 3, 0x04F8, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__CSI_DATA13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__CSI_DATA13                        = IOMUX_PAD(0x03F8, 0x016C, 3, 0x04F8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__ECSPI1_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__ECSPI1_SS0                         = IOMUX_PAD(0x03F8, 0x016C, 2, 0x0540, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__ECSPI1_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__ECSPI1_SS0                        = IOMUX_PAD(0x03F8, 0x016C, 2, 0x0540, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__EIM_DATA13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__EIM_DATA13                         = IOMUX_PAD(0x03F8, 0x016C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__EIM_DATA13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__EIM_DATA13                        = IOMUX_PAD(0x03F8, 0x016C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__GPIO3_IO26	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__GPIO3_IO26                         = IOMUX_PAD(0x03F8, 0x016C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__GPIO3_IO26	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__GPIO3_IO26                        = IOMUX_PAD(0x03F8, 0x016C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__LCDIF_DATA21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__LCDIF_DATA21                       = IOMUX_PAD(0x03F8, 0x016C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__LCDIF_DATA21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__LCDIF_DATA21                      = IOMUX_PAD(0x03F8, 0x016C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__SRC_BT_CFG29	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__SRC_BT_CFG29                       = IOMUX_PAD(0x03F8, 0x016C, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__SRC_BT_CFG29	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__SRC_BT_CFG29                      = IOMUX_PAD(0x03F8, 0x016C, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__UART8_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__UART8_DCE_RX                       = IOMUX_PAD(0x03F8, 0x016C, 1, 0x065C, 3/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__UART8_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__UART8_DCE_RX                      = IOMUX_PAD(0x03F8, 0x016C, 1, 0x065C, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__UART8_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__UART8_DTE_TX                       = IOMUX_PAD(0x03F8, 0x016C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__UART8_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__UART8_DTE_TX                      = IOMUX_PAD(0x03F8, 0x016C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA21__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA21__USDHC2_DATA1                       = IOMUX_PAD(0x03F8, 0x016C, 8, 0x0680, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA21__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA21__USDHC2_DATA1                      = IOMUX_PAD(0x03F8, 0x016C, 8, 0x0680, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__CSI_DATA14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__CSI_DATA14                         = IOMUX_PAD(0x03FC, 0x0170, 3, 0x04FC, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__CSI_DATA14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__CSI_DATA14                        = IOMUX_PAD(0x03FC, 0x0170, 3, 0x04FC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__ECSPI1_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__ECSPI1_MOSI                        = IOMUX_PAD(0x03FC, 0x0170, 2, 0x053C, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__ECSPI1_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__ECSPI1_MOSI                       = IOMUX_PAD(0x03FC, 0x0170, 2, 0x053C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__EIM_DATA14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__EIM_DATA14                         = IOMUX_PAD(0x03FC, 0x0170, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__EIM_DATA14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__EIM_DATA14                        = IOMUX_PAD(0x03FC, 0x0170, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__GPIO3_IO27	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__GPIO3_IO27                         = IOMUX_PAD(0x03FC, 0x0170, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__GPIO3_IO27	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__GPIO3_IO27                        = IOMUX_PAD(0x03FC, 0x0170, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__LCDIF_DATA22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__LCDIF_DATA22                       = IOMUX_PAD(0x03FC, 0x0170, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__LCDIF_DATA22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__LCDIF_DATA22                      = IOMUX_PAD(0x03FC, 0x0170, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__MQS_RIGHT                          = IOMUX_PAD(0x03FC, 0x0170, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__MQS_RIGHT                         = IOMUX_PAD(0x03FC, 0x0170, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__SRC_BT_CFG30	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__SRC_BT_CFG30                       = IOMUX_PAD(0x03FC, 0x0170, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__SRC_BT_CFG30	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__SRC_BT_CFG30                      = IOMUX_PAD(0x03FC, 0x0170, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA22__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA22__USDHC2_DATA2                       = IOMUX_PAD(0x03FC, 0x0170, 8, 0x0684, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA22__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA22__USDHC2_DATA2                      = IOMUX_PAD(0x03FC, 0x0170, 8, 0x0684, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__CSI_DATA15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__CSI_DATA15                         = IOMUX_PAD(0x0400, 0x0174, 3, 0x0500, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__CSI_DATA15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__CSI_DATA15                        = IOMUX_PAD(0x0400, 0x0174, 3, 0x0500, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__ECSPI1_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__ECSPI1_MISO                        = IOMUX_PAD(0x0400, 0x0174, 2, 0x0538, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__ECSPI1_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__ECSPI1_MISO                       = IOMUX_PAD(0x0400, 0x0174, 2, 0x0538, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__EIM_DATA15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__EIM_DATA15                         = IOMUX_PAD(0x0400, 0x0174, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__EIM_DATA15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__EIM_DATA15                        = IOMUX_PAD(0x0400, 0x0174, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__GPIO3_IO28	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__GPIO3_IO28                         = IOMUX_PAD(0x0400, 0x0174, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__GPIO3_IO28	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__GPIO3_IO28                        = IOMUX_PAD(0x0400, 0x0174, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__LCDIF_DATA23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__LCDIF_DATA23                       = IOMUX_PAD(0x0400, 0x0174, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__LCDIF_DATA23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__LCDIF_DATA23                      = IOMUX_PAD(0x0400, 0x0174, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__MQS_LEFT                           = IOMUX_PAD(0x0400, 0x0174, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__MQS_LEFT                          = IOMUX_PAD(0x0400, 0x0174, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__SRC_BT_CFG31	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__SRC_BT_CFG31                       = IOMUX_PAD(0x0400, 0x0174, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__SRC_BT_CFG31	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__SRC_BT_CFG31                      = IOMUX_PAD(0x0400, 0x0174, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_DATA23__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_DATA23__USDHC2_DATA3                       = IOMUX_PAD(0x0400, 0x0174, 8, 0x0688, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_DATA23__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_DATA23__USDHC2_DATA3                      = IOMUX_PAD(0x0400, 0x0174, 8, 0x0688, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__ECSPI2_RDY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__ECSPI2_RDY                         = IOMUX_PAD(0x0394, 0x0108, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__ECSPI2_RDY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__ECSPI2_RDY                        = IOMUX_PAD(0x0394, 0x0108, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__EIM_CS3_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__EIM_CS3_B                          = IOMUX_PAD(0x0394, 0x0108, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__EIM_CS3_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__EIM_CS3_B                         = IOMUX_PAD(0x0394, 0x0108, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__GPIO3_IO01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__GPIO3_IO01                         = IOMUX_PAD(0x0394, 0x0108, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__GPIO3_IO01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__GPIO3_IO01                        = IOMUX_PAD(0x0394, 0x0108, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__LCDIF_ENABLE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__LCDIF_ENABLE                       = IOMUX_PAD(0x0394, 0x0108, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__LCDIF_ENABLE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__LCDIF_ENABLE                      = IOMUX_PAD(0x0394, 0x0108, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__LCDIF_RD_E	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__LCDIF_RD_E                         = IOMUX_PAD(0x0394, 0x0108, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__LCDIF_RD_E	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__LCDIF_RD_E                        = IOMUX_PAD(0x0394, 0x0108, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__SAI3_TX_SYNC                       = IOMUX_PAD(0x0394, 0x0108, 3, 0x060C, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__SAI3_TX_SYNC                      = IOMUX_PAD(0x0394, 0x0108, 3, 0x060C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__UART4_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__UART4_DCE_RX                       = IOMUX_PAD(0x0394, 0x0108, 2, 0x063C, 3/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__UART4_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__UART4_DCE_RX                      = IOMUX_PAD(0x0394, 0x0108, 2, 0x063C, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_ENABLE__UART4_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_ENABLE__UART4_DTE_TX                       = IOMUX_PAD(0x0394, 0x0108, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_ENABLE__UART4_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_ENABLE__UART4_DTE_TX                      = IOMUX_PAD(0x0394, 0x0108, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__ECSPI2_SS1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__ECSPI2_SS1                          = IOMUX_PAD(0x0398, 0x010C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__ECSPI2_SS1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__ECSPI2_SS1                         = IOMUX_PAD(0x0398, 0x010C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__GPIO3_IO02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__GPIO3_IO02                          = IOMUX_PAD(0x0398, 0x010C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__GPIO3_IO02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__GPIO3_IO02                         = IOMUX_PAD(0x0398, 0x010C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__LCDIF_HSYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__LCDIF_HSYNC                         = IOMUX_PAD(0x0398, 0x010C, 0, 0x05DC, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__LCDIF_HSYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__LCDIF_HSYNC                        = IOMUX_PAD(0x0398, 0x010C, 0, 0x05DC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__LCDIF_RS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__LCDIF_RS                            = IOMUX_PAD(0x0398, 0x010C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__LCDIF_RS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__LCDIF_RS                           = IOMUX_PAD(0x0398, 0x010C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__SAI3_TX_BCLK                        = IOMUX_PAD(0x0398, 0x010C, 3, 0x0608, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__SAI3_TX_BCLK                       = IOMUX_PAD(0x0398, 0x010C, 3, 0x0608, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__UART4_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__UART4_DCE_CTS                       = IOMUX_PAD(0x0398, 0x010C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__UART4_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__UART4_DCE_CTS                      = IOMUX_PAD(0x0398, 0x010C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__UART4_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__UART4_DTE_RTS                       = IOMUX_PAD(0x0398, 0x010C, 2, 0x0638, 2/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__UART4_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__UART4_DTE_RTS                      = IOMUX_PAD(0x0398, 0x010C, 2, 0x0638, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB                = IOMUX_PAD(0x0398, 0x010C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB               = IOMUX_PAD(0x0398, 0x010C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__CA7_MX6ULL_EVENTI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__CA7_MX6ULL_EVENTI                  = IOMUX_PAD(0x03A0, 0x0114, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__CA7_MX6UL_EVENTI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__CA7_MX6UL_EVENTI                    = IOMUX_PAD(0x03A0, 0x0114, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__ECSPI2_SS3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__ECSPI2_SS3                          = IOMUX_PAD(0x03A0, 0x0114, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__ECSPI2_SS3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__ECSPI2_SS3                         = IOMUX_PAD(0x03A0, 0x0114, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__GPIO3_IO04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__GPIO3_IO04                          = IOMUX_PAD(0x03A0, 0x0114, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__GPIO3_IO04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__GPIO3_IO04                         = IOMUX_PAD(0x03A0, 0x0114, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__LCDIF_CS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__LCDIF_CS                            = IOMUX_PAD(0x03A0, 0x0114, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__LCDIF_CS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__LCDIF_CS                           = IOMUX_PAD(0x03A0, 0x0114, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__LCDIF_RESET	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__LCDIF_RESET                         = IOMUX_PAD(0x03A0, 0x0114, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__LCDIF_RESET	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__LCDIF_RESET                        = IOMUX_PAD(0x03A0, 0x0114, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__SAI3_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__SAI3_TX_DATA                        = IOMUX_PAD(0x03A0, 0x0114, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__SAI3_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__SAI3_TX_DATA                       = IOMUX_PAD(0x03A0, 0x0114, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_RESET__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_RESET__WDOG1_WDOG_ANY                      = IOMUX_PAD(0x03A0, 0x0114, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_RESET__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_RESET__WDOG1_WDOG_ANY                     = IOMUX_PAD(0x03A0, 0x0114, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__ECSPI2_SS2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__ECSPI2_SS2                          = IOMUX_PAD(0x039C, 0x0110, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__ECSPI2_SS2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__ECSPI2_SS2                         = IOMUX_PAD(0x039C, 0x0110, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__GPIO3_IO03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__GPIO3_IO03                          = IOMUX_PAD(0x039C, 0x0110, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__GPIO3_IO03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__GPIO3_IO03                         = IOMUX_PAD(0x039C, 0x0110, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__LCDIF_BUSY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__LCDIF_BUSY                          = IOMUX_PAD(0x039C, 0x0110, 1, 0x05DC, 1/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__LCDIF_BUSY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__LCDIF_BUSY                         = IOMUX_PAD(0x039C, 0x0110, 1, 0x05DC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__LCDIF_VSYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__LCDIF_VSYNC                         = IOMUX_PAD(0x039C, 0x0110, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__LCDIF_VSYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__LCDIF_VSYNC                        = IOMUX_PAD(0x039C, 0x0110, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__SAI3_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__SAI3_RX_DATA                        = IOMUX_PAD(0x039C, 0x0110, 3, 0x0604, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__SAI3_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__SAI3_RX_DATA                       = IOMUX_PAD(0x039C, 0x0110, 3, 0x0604, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__UART4_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__UART4_DCE_RTS                       = IOMUX_PAD(0x039C, 0x0110, 2, 0x0638, 3/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__UART4_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__UART4_DCE_RTS                      = IOMUX_PAD(0x039C, 0x0110, 2, 0x0638, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__UART4_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__UART4_DTE_CTS                       = IOMUX_PAD(0x039C, 0x0110, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__UART4_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__UART4_DTE_CTS                      = IOMUX_PAD(0x039C, 0x0110, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_LCD_VSYNC__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_LCD_VSYNC__WDOG2_WDOG_B                        = IOMUX_PAD(0x039C, 0x0110, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_LCD_VSYNC__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_LCD_VSYNC__WDOG2_WDOG_B                       = IOMUX_PAD(0x039C, 0x0110, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__ANATOP_USBPHY1_TSTI_TX_EN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__ANATOP_USBPHY1_TSTI_TX_EN            = IOMUX_PAD(0x0488, 0x0140, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__ECSPI2_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__ECSPI2_SS0                           = IOMUX_PAD(0x0488, 0x0140, 3, 0x072C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__ECSPI3_SS1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__ECSPI3_SS1                           = IOMUX_PAD(0x042C, 0x01A0, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__ECSPI3_SS1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__ECSPI3_SS1                          = IOMUX_PAD(0x042C, 0x01A0, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__EIM_ADDR17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__EIM_ADDR17                           = IOMUX_PAD(0x042C, 0x01A0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__EIM_ADDR17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__EIM_ADDR17                          = IOMUX_PAD(0x042C, 0x01A0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__ESAI_TX3_RX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__ESAI_TX3_RX2                         = IOMUX_PAD(0x0488, 0x0140, 4, 0x079C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__GPIO4_IO10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__GPIO4_IO10                           = IOMUX_PAD(0x042C, 0x01A0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__GPIO4_IO10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__GPIO4_IO10                          = IOMUX_PAD(0x042C, 0x01A0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__GPIO4_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__GPIO4_IO_0                           = IOMUX_PAD(0x0488, 0x0140, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__I2C3_SDA                             = IOMUX_PAD(0x0488, 0x0140, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__PWM3_OUT                             = IOMUX_PAD(0x042C, 0x01A0, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__PWM3_OUT                            = IOMUX_PAD(0x042C, 0x01A0, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__QSPI2_A_SS0_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__QSPI2_A_SS0_B                        = IOMUX_PAD(0x0488, 0x0140, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__QSPI_A_DQS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__QSPI_A_DQS                           = IOMUX_PAD(0x042C, 0x01A0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__QSPI_A_DQS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__QSPI_A_DQS                          = IOMUX_PAD(0x042C, 0x01A0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__RAWNAND_ALE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__RAWNAND_ALE                          = IOMUX_PAD(0x0488, 0x0140, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__RAWNAND_ALE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__RAWNAND_ALE                          = IOMUX_PAD(0x042C, 0x01A0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__RAWNAND_ALE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__RAWNAND_ALE                         = IOMUX_PAD(0x042C, 0x01A0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__SDMA_DEBUG_PC_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__SDMA_DEBUG_PC_12                     = IOMUX_PAD(0x0488, 0x0140, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__TPSMP_HDATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__TPSMP_HDATA_0                        = IOMUX_PAD(0x0488, 0x0140, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_ALE__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_ALE__USDHC2_RESET_B                       = IOMUX_PAD(0x042C, 0x01A0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_ALE__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_ALE__USDHC2_RESET_B                      = IOMUX_PAD(0x042C, 0x01A0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_ALE__WEIM_CS0_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_ALE__WEIM_CS0_B                           = IOMUX_PAD(0x0488, 0x0140, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__ANATOP_USBPHY1_TSTI_TX_HIZ	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__ANATOP_USBPHY1_TSTI_TX_HIZ         = IOMUX_PAD(0x048C, 0x0144, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__AUDMUX_AUD4_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__AUDMUX_AUD4_TXC                    = IOMUX_PAD(0x048C, 0x0144, 3, 0x0654, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__ECSPI3_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__ECSPI3_SCLK                        = IOMUX_PAD(0x0438, 0x01AC, 3, 0x0554, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__ECSPI3_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__ECSPI3_SCLK                       = IOMUX_PAD(0x0438, 0x01AC, 3, 0x0554, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__EIM_DTACK_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__EIM_DTACK_B                        = IOMUX_PAD(0x0438, 0x01AC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__EIM_DTACK_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__EIM_DTACK_B                       = IOMUX_PAD(0x0438, 0x01AC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__ESAI_TX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__ESAI_TX_CLK                        = IOMUX_PAD(0x048C, 0x0144, 4, 0x078C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__GPIO4_IO13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__GPIO4_IO13                         = IOMUX_PAD(0x0438, 0x01AC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__GPIO4_IO13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__GPIO4_IO13                        = IOMUX_PAD(0x0438, 0x01AC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__GPIO4_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__GPIO4_IO_1                         = IOMUX_PAD(0x048C, 0x0144, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__QSPI2_A_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__QSPI2_A_DATA_2                     = IOMUX_PAD(0x048C, 0x0144, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__QSPI_A_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__QSPI_A_DATA01                      = IOMUX_PAD(0x0438, 0x01AC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__QSPI_A_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__QSPI_A_DATA01                     = IOMUX_PAD(0x0438, 0x01AC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B                      = IOMUX_PAD(0x048C, 0x0144, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B                      = IOMUX_PAD(0x0438, 0x01AC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B                     = IOMUX_PAD(0x0438, 0x01AC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__SDMA_DEBUG_PC_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__SDMA_DEBUG_PC_9                    = IOMUX_PAD(0x048C, 0x0144, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__TPSMP_HDATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__TPSMP_HDATA_3                      = IOMUX_PAD(0x048C, 0x0144, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__UART3_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__UART3_DCE_RX                       = IOMUX_PAD(0x0438, 0x01AC, 8, 0x0634, 3/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__UART3_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__UART3_DCE_RX                      = IOMUX_PAD(0x0438, 0x01AC, 8, 0x0634, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__UART3_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__UART3_DTE_TX                       = IOMUX_PAD(0x0438, 0x01AC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__UART3_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__UART3_DTE_TX                      = IOMUX_PAD(0x0438, 0x01AC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__USDHC1_DATA5	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE0_B__USDHC1_DATA5                       = IOMUX_PAD(0x0438, 0x01AC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE0_B__USDHC1_DATA5	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE0_B__USDHC1_DATA5                      = IOMUX_PAD(0x0438, 0x01AC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE0_B__USDHC2_VSELECT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__USDHC2_VSELECT                     = IOMUX_PAD(0x048C, 0x0144, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE0_B__WEIM_LBA_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE0_B__WEIM_LBA_B                         = IOMUX_PAD(0x048C, 0x0144, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__ANATOP_USBPHY1_TSTI_TX_LS_MODE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__ANATOP_USBPHY1_TSTI_TX_LS_MODE     = IOMUX_PAD(0x0490, 0x0148, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__AUDMUX_AUD4_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__AUDMUX_AUD4_TXD                    = IOMUX_PAD(0x0490, 0x0148, 3, 0x0648, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__ECSPI3_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__ECSPI3_MOSI                        = IOMUX_PAD(0x043C, 0x01B0, 3, 0x055C, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__ECSPI3_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__ECSPI3_MOSI                       = IOMUX_PAD(0x043C, 0x01B0, 3, 0x055C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__EIM_ADDR18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__EIM_ADDR18                         = IOMUX_PAD(0x043C, 0x01B0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__EIM_ADDR18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__EIM_ADDR18                        = IOMUX_PAD(0x043C, 0x01B0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__ESAI_TX0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__ESAI_TX0                           = IOMUX_PAD(0x0490, 0x0148, 4, 0x0790, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__GPIO4_IO14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__GPIO4_IO14                         = IOMUX_PAD(0x043C, 0x01B0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__GPIO4_IO14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__GPIO4_IO14                        = IOMUX_PAD(0x043C, 0x01B0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__GPIO4_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__GPIO4_IO_2                         = IOMUX_PAD(0x0490, 0x0148, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__QSPI2_A_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__QSPI2_A_DATA_3                     = IOMUX_PAD(0x0490, 0x0148, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__QSPI_A_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__QSPI_A_DATA02                      = IOMUX_PAD(0x043C, 0x01B0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__QSPI_A_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__QSPI_A_DATA02                     = IOMUX_PAD(0x043C, 0x01B0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B                      = IOMUX_PAD(0x0490, 0x0148, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B                      = IOMUX_PAD(0x043C, 0x01B0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B                     = IOMUX_PAD(0x043C, 0x01B0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__SDMA_DEBUG_PC_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__SDMA_DEBUG_PC_8                    = IOMUX_PAD(0x0490, 0x0148, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__TPSMP_HDATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__TPSMP_HDATA_4                      = IOMUX_PAD(0x0490, 0x0148, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__UART3_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__UART3_DCE_CTS                      = IOMUX_PAD(0x043C, 0x01B0, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__UART3_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__UART3_DCE_CTS                     = IOMUX_PAD(0x043C, 0x01B0, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__UART3_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__UART3_DTE_RTS                      = IOMUX_PAD(0x043C, 0x01B0, 8, 0x0630, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__UART3_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__UART3_DTE_RTS                     = IOMUX_PAD(0x043C, 0x01B0, 8, 0x0630, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__USDHC1_DATA6	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CE1_B__USDHC1_DATA6                       = IOMUX_PAD(0x043C, 0x01B0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CE1_B__USDHC1_DATA6	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CE1_B__USDHC1_DATA6                      = IOMUX_PAD(0x043C, 0x01B0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CE1_B__USDHC3_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__USDHC3_RESET_B                     = IOMUX_PAD(0x0490, 0x0148, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CE1_B__WEIM_OE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CE1_B__WEIM_OE                            = IOMUX_PAD(0x0490, 0x0148, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__ANATOP_USBPHY1_TSTI_TX_DP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__ANATOP_USBPHY1_TSTI_TX_DP            = IOMUX_PAD(0x0494, 0x014C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__ECSPI2_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__ECSPI2_SCLK                          = IOMUX_PAD(0x0494, 0x014C, 3, 0x0720, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__ECSPI3_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__ECSPI3_MISO                          = IOMUX_PAD(0x0440, 0x01B4, 3, 0x0558, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__ECSPI3_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__ECSPI3_MISO                         = IOMUX_PAD(0x0440, 0x01B4, 3, 0x0558, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__EIM_ADDR16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__EIM_ADDR16                           = IOMUX_PAD(0x0440, 0x01B4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__EIM_ADDR16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__EIM_ADDR16                          = IOMUX_PAD(0x0440, 0x01B4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__ESAI_TX2_RX3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__ESAI_TX2_RX3                         = IOMUX_PAD(0x0494, 0x014C, 4, 0x0798, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__GPIO4_IO15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__GPIO4_IO15                           = IOMUX_PAD(0x0440, 0x01B4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__GPIO4_IO15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__GPIO4_IO15                          = IOMUX_PAD(0x0440, 0x01B4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__GPIO4_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__GPIO4_IO_3                           = IOMUX_PAD(0x0494, 0x014C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__I2C3_SCL                             = IOMUX_PAD(0x0494, 0x014C, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__QSPI2_A_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__QSPI2_A_SCLK                         = IOMUX_PAD(0x0494, 0x014C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__QSPI_A_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__QSPI_A_DATA03                        = IOMUX_PAD(0x0440, 0x01B4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__QSPI_A_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__QSPI_A_DATA03                       = IOMUX_PAD(0x0440, 0x01B4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__RAWNAND_CLE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__RAWNAND_CLE                          = IOMUX_PAD(0x0494, 0x014C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__RAWNAND_CLE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__RAWNAND_CLE                          = IOMUX_PAD(0x0440, 0x01B4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__RAWNAND_CLE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__RAWNAND_CLE                         = IOMUX_PAD(0x0440, 0x01B4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__SDMA_DEBUG_PC_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__SDMA_DEBUG_PC_13                     = IOMUX_PAD(0x0494, 0x014C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__TPSMP_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__TPSMP_CLK                            = IOMUX_PAD(0x0494, 0x014C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_CLE__UART3_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__UART3_DCE_RTS                        = IOMUX_PAD(0x0440, 0x01B4, 8, 0x0630, 3/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__UART3_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__UART3_DCE_RTS                       = IOMUX_PAD(0x0440, 0x01B4, 8, 0x0630, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__UART3_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__UART3_DTE_CTS                        = IOMUX_PAD(0x0440, 0x01B4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__UART3_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__UART3_DTE_CTS                       = IOMUX_PAD(0x0440, 0x01B4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__USDHC1_DATA7	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_CLE__USDHC1_DATA7                         = IOMUX_PAD(0x0440, 0x01B4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_CLE__USDHC1_DATA7	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_CLE__USDHC1_DATA7                        = IOMUX_PAD(0x0440, 0x01B4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_CLE__WEIM_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_CLE__WEIM_BCLK                            = IOMUX_PAD(0x0494, 0x014C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__ANATOP_USBPHY1_TSTO_RX_DISCON_DET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__ANATOP_USBPHY1_TSTO_RX_DISCON_DET = IOMUX_PAD(0x0498, 0x0150, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__ECSPI4_RDY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__ECSPI4_RDY                        = IOMUX_PAD(0x040C, 0x0180, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__ECSPI4_RDY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__ECSPI4_RDY                       = IOMUX_PAD(0x040C, 0x0180, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__ECSPI5_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__ECSPI5_MISO                       = IOMUX_PAD(0x0498, 0x0150, 3, 0x0754, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__EIM_AD08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__EIM_AD08                          = IOMUX_PAD(0x040C, 0x0180, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__EIM_AD08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__EIM_AD08                         = IOMUX_PAD(0x040C, 0x0180, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__ESAI_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__ESAI_RX_CLK                       = IOMUX_PAD(0x0498, 0x0150, 4, 0x0788, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__GPIO4_IO02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__GPIO4_IO02                        = IOMUX_PAD(0x040C, 0x0180, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__GPIO4_IO02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__GPIO4_IO02                       = IOMUX_PAD(0x040C, 0x0180, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__GPIO4_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__GPIO4_IO_4                        = IOMUX_PAD(0x0498, 0x0150, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__KPP_ROW01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__KPP_ROW01                         = IOMUX_PAD(0x040C, 0x0180, 3, 0x05D4, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__KPP_ROW01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__KPP_ROW01                        = IOMUX_PAD(0x040C, 0x0180, 3, 0x05D4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__QSPI2_B_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__QSPI2_B_DATA_1                    = IOMUX_PAD(0x0498, 0x0150, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__QSPI_B_SS1_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__QSPI_B_SS1_B                      = IOMUX_PAD(0x040C, 0x0180, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__QSPI_B_SS1_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__QSPI_B_SS1_B                     = IOMUX_PAD(0x040C, 0x0180, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__RAWNAND_DATA00	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__RAWNAND_DATA00                    = IOMUX_PAD(0x0498, 0x0150, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__RAWNAND_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__RAWNAND_DATA00                    = IOMUX_PAD(0x040C, 0x0180, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__RAWNAND_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__RAWNAND_DATA00                   = IOMUX_PAD(0x040C, 0x0180, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__SDMA_DEBUG_EVT_CHN_LINES_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__SDMA_DEBUG_EVT_CHN_LINES_5        = IOMUX_PAD(0x0498, 0x0150, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__TPSMP_HDATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__TPSMP_HDATA_7                     = IOMUX_PAD(0x0498, 0x0150, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__USDHC1_DATA4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__USDHC1_DATA4                      = IOMUX_PAD(0x0498, 0x0150, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA00__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA00__USDHC2_DATA0                      = IOMUX_PAD(0x040C, 0x0180, 1, 0x067C, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA00__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA00__USDHC2_DATA0                     = IOMUX_PAD(0x040C, 0x0180, 1, 0x067C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA00__WEIM_AD_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA00__WEIM_AD_0                         = IOMUX_PAD(0x0498, 0x0150, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__ANATOP_USBPHY1_TSTO_RX_HS_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__ANATOP_USBPHY1_TSTO_RX_HS_RXD     = IOMUX_PAD(0x049C, 0x0154, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__ECSPI4_SS1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__ECSPI4_SS1                        = IOMUX_PAD(0x0410, 0x0184, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__ECSPI4_SS1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__ECSPI4_SS1                       = IOMUX_PAD(0x0410, 0x0184, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__ECSPI5_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__ECSPI5_MOSI                       = IOMUX_PAD(0x049C, 0x0154, 3, 0x0758, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__EIM_AD09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__EIM_AD09                          = IOMUX_PAD(0x0410, 0x0184, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__EIM_AD09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__EIM_AD09                         = IOMUX_PAD(0x0410, 0x0184, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__ESAI_RX_FS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__ESAI_RX_FS                        = IOMUX_PAD(0x049C, 0x0154, 4, 0x0778, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__GPIO4_IO03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__GPIO4_IO03                        = IOMUX_PAD(0x0410, 0x0184, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__GPIO4_IO03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__GPIO4_IO03                       = IOMUX_PAD(0x0410, 0x0184, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__GPIO4_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__GPIO4_IO_5                        = IOMUX_PAD(0x049C, 0x0154, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__KPP_COL01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__KPP_COL01                         = IOMUX_PAD(0x0410, 0x0184, 3, 0x05C8, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__KPP_COL01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__KPP_COL01                        = IOMUX_PAD(0x0410, 0x0184, 3, 0x05C8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__QSPI2_B_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__QSPI2_B_DATA_0                    = IOMUX_PAD(0x049C, 0x0154, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__QSPI_B_DQS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__QSPI_B_DQS                        = IOMUX_PAD(0x0410, 0x0184, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__QSPI_B_DQS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__QSPI_B_DQS                       = IOMUX_PAD(0x0410, 0x0184, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__RAWNAND_DATA01	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__RAWNAND_DATA01                    = IOMUX_PAD(0x049C, 0x0154, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__RAWNAND_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__RAWNAND_DATA01                    = IOMUX_PAD(0x0410, 0x0184, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__RAWNAND_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__RAWNAND_DATA01                   = IOMUX_PAD(0x0410, 0x0184, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__SDMA_DEBUG_EVT_CHN_LINES_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__SDMA_DEBUG_EVT_CHN_LINES_4        = IOMUX_PAD(0x049C, 0x0154, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__TPSMP_HDATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__TPSMP_HDATA_8                     = IOMUX_PAD(0x049C, 0x0154, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__USDHC1_DATA5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__USDHC1_DATA5                      = IOMUX_PAD(0x049C, 0x0154, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA01__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA01__USDHC2_DATA1                      = IOMUX_PAD(0x0410, 0x0184, 1, 0x0680, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA01__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA01__USDHC2_DATA1                     = IOMUX_PAD(0x0410, 0x0184, 1, 0x0680, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA01__WEIM_AD_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA01__WEIM_AD_1                         = IOMUX_PAD(0x049C, 0x0154, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__ANATOP_USBPHY2_TSTO_PLL_CLK20DIV	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__ANATOP_USBPHY2_TSTO_PLL_CLK20DIV  = IOMUX_PAD(0x04A0, 0x0158, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__ECSPI4_SS2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__ECSPI4_SS2                        = IOMUX_PAD(0x0414, 0x0188, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__ECSPI4_SS2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__ECSPI4_SS2                       = IOMUX_PAD(0x0414, 0x0188, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__ECSPI5_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__ECSPI5_SCLK                       = IOMUX_PAD(0x04A0, 0x0158, 3, 0x0750, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__EIM_AD10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__EIM_AD10                          = IOMUX_PAD(0x0414, 0x0188, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__EIM_AD10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__EIM_AD10                         = IOMUX_PAD(0x0414, 0x0188, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__ESAI_TX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__ESAI_TX_HF_CLK                    = IOMUX_PAD(0x04A0, 0x0158, 4, 0x0784, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__GPIO4_IO04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__GPIO4_IO04                        = IOMUX_PAD(0x0414, 0x0188, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__GPIO4_IO04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__GPIO4_IO04                       = IOMUX_PAD(0x0414, 0x0188, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__GPIO4_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__GPIO4_IO_6                        = IOMUX_PAD(0x04A0, 0x0158, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__KPP_ROW02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__KPP_ROW02                         = IOMUX_PAD(0x0414, 0x0188, 3, 0x05D8, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__KPP_ROW02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__KPP_ROW02                        = IOMUX_PAD(0x0414, 0x0188, 3, 0x05D8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__QSPI2_B_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__QSPI2_B_SCLK                      = IOMUX_PAD(0x04A0, 0x0158, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__QSPI_B_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__QSPI_B_DATA00                     = IOMUX_PAD(0x0414, 0x0188, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__QSPI_B_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__QSPI_B_DATA00                    = IOMUX_PAD(0x0414, 0x0188, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__RAWNAND_DATA02	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__RAWNAND_DATA02                    = IOMUX_PAD(0x04A0, 0x0158, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__RAWNAND_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__RAWNAND_DATA02                    = IOMUX_PAD(0x0414, 0x0188, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__RAWNAND_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__RAWNAND_DATA02                   = IOMUX_PAD(0x0414, 0x0188, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__SDMA_DEBUG_EVT_CHN_LINES_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__SDMA_DEBUG_EVT_CHN_LINES_3        = IOMUX_PAD(0x04A0, 0x0158, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__TPSMP_HDATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__TPSMP_HDATA_9                     = IOMUX_PAD(0x04A0, 0x0158, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__USDHC1_DATA6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__USDHC1_DATA6                      = IOMUX_PAD(0x04A0, 0x0158, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA02__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA02__USDHC2_DATA2                      = IOMUX_PAD(0x0414, 0x0188, 1, 0x0684, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA02__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA02__USDHC2_DATA2                     = IOMUX_PAD(0x0414, 0x0188, 1, 0x0684, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA02__WEIM_AD_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA02__WEIM_AD_2                         = IOMUX_PAD(0x04A0, 0x0158, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__ANATOP_USBPHY1_TSTO_RX_SQUELCH	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__ANATOP_USBPHY1_TSTO_RX_SQUELCH    = IOMUX_PAD(0x04A4, 0x015C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__ECSPI4_SS3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__ECSPI4_SS3                        = IOMUX_PAD(0x0418, 0x018C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__ECSPI4_SS3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__ECSPI4_SS3                       = IOMUX_PAD(0x0418, 0x018C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__ECSPI5_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__ECSPI5_SS0                        = IOMUX_PAD(0x04A4, 0x015C, 3, 0x075C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__EIM_AD11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__EIM_AD11                          = IOMUX_PAD(0x0418, 0x018C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__EIM_AD11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__EIM_AD11                         = IOMUX_PAD(0x0418, 0x018C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__ESAI_RX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__ESAI_RX_HF_CLK                    = IOMUX_PAD(0x04A4, 0x015C, 4, 0x0780, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__GPIO4_IO05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__GPIO4_IO05                        = IOMUX_PAD(0x0418, 0x018C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__GPIO4_IO05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__GPIO4_IO05                       = IOMUX_PAD(0x0418, 0x018C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__GPIO4_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__GPIO4_IO_7                        = IOMUX_PAD(0x04A4, 0x015C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__KPP_COL02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__KPP_COL02                         = IOMUX_PAD(0x0418, 0x018C, 3, 0x05CC, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__KPP_COL02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__KPP_COL02                        = IOMUX_PAD(0x0418, 0x018C, 3, 0x05CC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__QSPI2_B_SS0_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__QSPI2_B_SS0_B                     = IOMUX_PAD(0x04A4, 0x015C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__QSPI_B_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__QSPI_B_DATA01                     = IOMUX_PAD(0x0418, 0x018C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__QSPI_B_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__QSPI_B_DATA01                    = IOMUX_PAD(0x0418, 0x018C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__RAWNAND_DATA03	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__RAWNAND_DATA03                    = IOMUX_PAD(0x04A4, 0x015C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__RAWNAND_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__RAWNAND_DATA03                    = IOMUX_PAD(0x0418, 0x018C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__RAWNAND_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__RAWNAND_DATA03                   = IOMUX_PAD(0x0418, 0x018C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__SDMA_DEBUG_EVT_CHN_LINES_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__SDMA_DEBUG_EVT_CHN_LINES_6        = IOMUX_PAD(0x04A4, 0x015C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__TPSMP_HDATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__TPSMP_HDATA_10                    = IOMUX_PAD(0x04A4, 0x015C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__USDHC1_DATA7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__USDHC1_DATA7                      = IOMUX_PAD(0x04A4, 0x015C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA03__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA03__USDHC2_DATA3                      = IOMUX_PAD(0x0418, 0x018C, 1, 0x0688, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA03__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA03__USDHC2_DATA3                     = IOMUX_PAD(0x0418, 0x018C, 1, 0x0688, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA03__WEIM_AD_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA03__WEIM_AD_3                         = IOMUX_PAD(0x04A4, 0x015C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__ANATOP_USBPHY2_TSTO_RX_SQUELCH	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__ANATOP_USBPHY2_TSTO_RX_SQUELCH    = IOMUX_PAD(0x04A8, 0x0160, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__AUDMUX_AUD4_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__AUDMUX_AUD4_RXFS                  = IOMUX_PAD(0x04A8, 0x0160, 4, 0x0650, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__ECSPI4_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__ECSPI4_SCLK                       = IOMUX_PAD(0x041C, 0x0190, 3, 0x0564, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__ECSPI4_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__ECSPI4_SCLK                      = IOMUX_PAD(0x041C, 0x0190, 3, 0x0564, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__EIM_AD12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__EIM_AD12                          = IOMUX_PAD(0x041C, 0x0190, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__EIM_AD12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__EIM_AD12                         = IOMUX_PAD(0x041C, 0x0190, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__GPIO4_IO06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__GPIO4_IO06                        = IOMUX_PAD(0x041C, 0x0190, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__GPIO4_IO06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__GPIO4_IO06                       = IOMUX_PAD(0x041C, 0x0190, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__GPIO4_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__GPIO4_IO_8                        = IOMUX_PAD(0x04A8, 0x0160, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__QSPI2_B_SS1_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__QSPI2_B_SS1_B                     = IOMUX_PAD(0x04A8, 0x0160, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__QSPI_B_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__QSPI_B_DATA02                     = IOMUX_PAD(0x041C, 0x0190, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__QSPI_B_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__QSPI_B_DATA02                    = IOMUX_PAD(0x041C, 0x0190, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__RAWNAND_DATA04	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__RAWNAND_DATA04                    = IOMUX_PAD(0x04A8, 0x0160, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__RAWNAND_DATA04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__RAWNAND_DATA04                    = IOMUX_PAD(0x041C, 0x0190, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__RAWNAND_DATA04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__RAWNAND_DATA04                   = IOMUX_PAD(0x041C, 0x0190, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__SDMA_DEBUG_CORE_STATE_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__SDMA_DEBUG_CORE_STATE_0           = IOMUX_PAD(0x04A8, 0x0160, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__TPSMP_HDATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__TPSMP_HDATA_11                    = IOMUX_PAD(0x04A8, 0x0160, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__UART2_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__UART2_DCE_TX                      = IOMUX_PAD(0x041C, 0x0190, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__UART2_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__UART2_DCE_TX                     = IOMUX_PAD(0x041C, 0x0190, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__UART2_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__UART2_DTE_RX                      = IOMUX_PAD(0x041C, 0x0190, 8, 0x062C, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__UART2_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__UART2_DTE_RX                     = IOMUX_PAD(0x041C, 0x0190, 8, 0x062C, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__UART3_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__UART3_RTS_B                       = IOMUX_PAD(0x04A8, 0x0160, 3, 0x083C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__USDHC2_DATA4                      = IOMUX_PAD(0x04A8, 0x0160, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA04__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA04__USDHC2_DATA4                      = IOMUX_PAD(0x041C, 0x0190, 1, 0x068C, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA04__USDHC2_DATA4	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA04__USDHC2_DATA4                     = IOMUX_PAD(0x041C, 0x0190, 1, 0x068C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA04__WEIM_AD_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA04__WEIM_AD_4                         = IOMUX_PAD(0x04A8, 0x0160, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__ANATOP_USBPHY2_TSTO_RX_DISCON_DET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__ANATOP_USBPHY2_TSTO_RX_DISCON_DET = IOMUX_PAD(0x04AC, 0x0164, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__AUDMUX_AUD4_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__AUDMUX_AUD4_RXC                   = IOMUX_PAD(0x04AC, 0x0164, 4, 0x064C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__ECSPI4_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__ECSPI4_MOSI                       = IOMUX_PAD(0x0420, 0x0194, 3, 0x056C, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__ECSPI4_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__ECSPI4_MOSI                      = IOMUX_PAD(0x0420, 0x0194, 3, 0x056C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__EIM_AD13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__EIM_AD13                          = IOMUX_PAD(0x0420, 0x0194, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__EIM_AD13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__EIM_AD13                         = IOMUX_PAD(0x0420, 0x0194, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__GPIO4_IO07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__GPIO4_IO07                        = IOMUX_PAD(0x0420, 0x0194, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__GPIO4_IO07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__GPIO4_IO07                       = IOMUX_PAD(0x0420, 0x0194, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__GPIO4_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__GPIO4_IO_9                        = IOMUX_PAD(0x04AC, 0x0164, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__QSPI2_B_DQS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__QSPI2_B_DQS                       = IOMUX_PAD(0x04AC, 0x0164, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__QSPI_B_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__QSPI_B_DATA03                     = IOMUX_PAD(0x0420, 0x0194, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__QSPI_B_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__QSPI_B_DATA03                    = IOMUX_PAD(0x0420, 0x0194, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__RAWNAND_DATA05	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__RAWNAND_DATA05                    = IOMUX_PAD(0x04AC, 0x0164, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__RAWNAND_DATA05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__RAWNAND_DATA05                    = IOMUX_PAD(0x0420, 0x0194, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__RAWNAND_DATA05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__RAWNAND_DATA05                   = IOMUX_PAD(0x0420, 0x0194, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__SDMA_DEBUG_CORE_STATE_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__SDMA_DEBUG_CORE_STATE_1           = IOMUX_PAD(0x04AC, 0x0164, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__TPSMP_HDATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__TPSMP_HDATA_12                    = IOMUX_PAD(0x04AC, 0x0164, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__UART2_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__UART2_DCE_RX                      = IOMUX_PAD(0x0420, 0x0194, 8, 0x062C, 3/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__UART2_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__UART2_DCE_RX                     = IOMUX_PAD(0x0420, 0x0194, 8, 0x062C, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__UART2_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__UART2_DTE_TX                      = IOMUX_PAD(0x0420, 0x0194, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__UART2_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__UART2_DTE_TX                     = IOMUX_PAD(0x0420, 0x0194, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__UART3_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__UART3_CTS_B                       = IOMUX_PAD(0x04AC, 0x0164, 3, 0x083C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__USDHC2_DATA5                      = IOMUX_PAD(0x04AC, 0x0164, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA05__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA05__USDHC2_DATA5                      = IOMUX_PAD(0x0420, 0x0194, 1, 0x0690, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA05__USDHC2_DATA5	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA05__USDHC2_DATA5                     = IOMUX_PAD(0x0420, 0x0194, 1, 0x0690, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA05__WEIM_AD_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA05__WEIM_AD_5                         = IOMUX_PAD(0x04AC, 0x0164, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__ANATOP_USBPHY2_TSTO_RX_FS_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__ANATOP_USBPHY2_TSTO_RX_FS_RXD     = IOMUX_PAD(0x04B0, 0x0168, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__ECSPI4_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__ECSPI4_MISO                       = IOMUX_PAD(0x0424, 0x0198, 3, 0x0568, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__ECSPI4_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__ECSPI4_MISO                      = IOMUX_PAD(0x0424, 0x0198, 3, 0x0568, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__EIM_AD14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__EIM_AD14                          = IOMUX_PAD(0x0424, 0x0198, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__EIM_AD14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__EIM_AD14                         = IOMUX_PAD(0x0424, 0x0198, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__GPIO4_IO08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__GPIO4_IO08                        = IOMUX_PAD(0x0424, 0x0198, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__GPIO4_IO08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__GPIO4_IO08                       = IOMUX_PAD(0x0424, 0x0198, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__GPIO4_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__GPIO4_IO_10                       = IOMUX_PAD(0x04B0, 0x0168, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__PWM3_OUT                          = IOMUX_PAD(0x04B0, 0x0168, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__QSPI2_A_SS1_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__QSPI2_A_SS1_B                     = IOMUX_PAD(0x04B0, 0x0168, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__RAWNAND_DATA06	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__RAWNAND_DATA06                    = IOMUX_PAD(0x04B0, 0x0168, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__RAWNAND_DATA06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__RAWNAND_DATA06                    = IOMUX_PAD(0x0424, 0x0198, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__RAWNAND_DATA06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__RAWNAND_DATA06                   = IOMUX_PAD(0x0424, 0x0198, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__SAI2_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__SAI2_RX_BCLK                      = IOMUX_PAD(0x0424, 0x0198, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__SAI2_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__SAI2_RX_BCLK                     = IOMUX_PAD(0x0424, 0x0198, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__SDMA_DEBUG_CORE_STATE_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__SDMA_DEBUG_CORE_STATE_2           = IOMUX_PAD(0x04B0, 0x0168, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__TPSMP_HDATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__TPSMP_HDATA_13                    = IOMUX_PAD(0x04B0, 0x0168, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__UART2_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__UART2_DCE_CTS                     = IOMUX_PAD(0x0424, 0x0198, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__UART2_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__UART2_DCE_CTS                    = IOMUX_PAD(0x0424, 0x0198, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__UART2_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__UART2_DTE_RTS                     = IOMUX_PAD(0x0424, 0x0198, 8, 0x0628, 4/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__UART2_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__UART2_DTE_RTS                    = IOMUX_PAD(0x0424, 0x0198, 8, 0x0628, 4,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__UART3_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__UART3_RX                          = IOMUX_PAD(0x04B0, 0x0168, 3, 0x0840, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__USDHC2_DATA6                      = IOMUX_PAD(0x04B0, 0x0168, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA06__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA06__USDHC2_DATA6                      = IOMUX_PAD(0x0424, 0x0198, 1, 0x0694, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA06__USDHC2_DATA6	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA06__USDHC2_DATA6                     = IOMUX_PAD(0x0424, 0x0198, 1, 0x0694, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA06__WEIM_AD_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA06__WEIM_AD_6                         = IOMUX_PAD(0x04B0, 0x0168, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__ANATOP_USBPHY1_TSTO_RX_FS_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__ANATOP_USBPHY1_TSTO_RX_FS_RXD     = IOMUX_PAD(0x04B4, 0x016C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__ECSPI4_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__ECSPI4_SS0                        = IOMUX_PAD(0x0428, 0x019C, 3, 0x0570, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__ECSPI4_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__ECSPI4_SS0                       = IOMUX_PAD(0x0428, 0x019C, 3, 0x0570, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__EIM_AD15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__EIM_AD15                          = IOMUX_PAD(0x0428, 0x019C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__EIM_AD15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__EIM_AD15                         = IOMUX_PAD(0x0428, 0x019C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__GPIO4_IO09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__GPIO4_IO09                        = IOMUX_PAD(0x0428, 0x019C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__GPIO4_IO09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__GPIO4_IO09                       = IOMUX_PAD(0x0428, 0x019C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__GPIO4_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__GPIO4_IO_11                       = IOMUX_PAD(0x04B4, 0x016C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__PWM4_OUT                          = IOMUX_PAD(0x04B4, 0x016C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__QSPI2_A_DQS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__QSPI2_A_DQS                       = IOMUX_PAD(0x04B4, 0x016C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__QSPI_A_SS1_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__QSPI_A_SS1_B                      = IOMUX_PAD(0x0428, 0x019C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__QSPI_A_SS1_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__QSPI_A_SS1_B                     = IOMUX_PAD(0x0428, 0x019C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__RAWNAND_DATA07	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__RAWNAND_DATA07                    = IOMUX_PAD(0x04B4, 0x016C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__RAWNAND_DATA07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__RAWNAND_DATA07                    = IOMUX_PAD(0x0428, 0x019C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__RAWNAND_DATA07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__RAWNAND_DATA07                   = IOMUX_PAD(0x0428, 0x019C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__SDMA_DEBUG_CORE_STATE_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__SDMA_DEBUG_CORE_STATE_3           = IOMUX_PAD(0x04B4, 0x016C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__TPSMP_HDATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__TPSMP_HDATA_14                    = IOMUX_PAD(0x04B4, 0x016C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__UART2_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__UART2_DCE_RTS                     = IOMUX_PAD(0x0428, 0x019C, 8, 0x0628, 5/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__UART2_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__UART2_DCE_RTS                    = IOMUX_PAD(0x0428, 0x019C, 8, 0x0628, 5,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__UART2_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__UART2_DTE_CTS                     = IOMUX_PAD(0x0428, 0x019C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__UART2_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__UART2_DTE_CTS                    = IOMUX_PAD(0x0428, 0x019C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__UART3_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__UART3_TX                          = IOMUX_PAD(0x04B4, 0x016C, 3, 0x0840, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__USDHC2_DATA7                      = IOMUX_PAD(0x04B4, 0x016C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DATA07__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DATA07__USDHC2_DATA7                      = IOMUX_PAD(0x0428, 0x019C, 1, 0x0698, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DATA07__USDHC2_DATA7	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DATA07__USDHC2_DATA7                     = IOMUX_PAD(0x0428, 0x019C, 1, 0x0698, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DATA07__WEIM_AD_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_DATA07__WEIM_AD_7                         = IOMUX_PAD(0x04B4, 0x016C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_DQS__CSI_FIELD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__CSI_FIELD                            = IOMUX_PAD(0x0444, 0x01B8, 1, 0x0530, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__CSI_FIELD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__CSI_FIELD                           = IOMUX_PAD(0x0444, 0x01B8, 1, 0x0530, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__EIM_WAIT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__EIM_WAIT                             = IOMUX_PAD(0x0444, 0x01B8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__EIM_WAIT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__EIM_WAIT                            = IOMUX_PAD(0x0444, 0x01B8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__GPIO4_IO16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__GPIO4_IO16                           = IOMUX_PAD(0x0444, 0x01B8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__GPIO4_IO16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__GPIO4_IO16                          = IOMUX_PAD(0x0444, 0x01B8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__PWM5_OUT                             = IOMUX_PAD(0x0444, 0x01B8, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__PWM5_OUT                            = IOMUX_PAD(0x0444, 0x01B8, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__QSPI_A_SS0_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__QSPI_A_SS0_B                         = IOMUX_PAD(0x0444, 0x01B8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__QSPI_A_SS0_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__QSPI_A_SS0_B                        = IOMUX_PAD(0x0444, 0x01B8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__RAWNAND_DQS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__RAWNAND_DQS                          = IOMUX_PAD(0x0444, 0x01B8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__RAWNAND_DQS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__RAWNAND_DQS                         = IOMUX_PAD(0x0444, 0x01B8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__SDMA_EXT_EVENT01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__SDMA_EXT_EVENT01                     = IOMUX_PAD(0x0444, 0x01B8, 6, 0x0614, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__SDMA_EXT_EVENT01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__SDMA_EXT_EVENT01                    = IOMUX_PAD(0x0444, 0x01B8, 6, 0x0614, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_DQS__SPDIF_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_DQS__SPDIF_EXT_CLK                        = IOMUX_PAD(0x0444, 0x01B8, 8, 0x061C, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_DQS__SPDIF_EXT_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_DQS__SPDIF_EXT_CLK                       = IOMUX_PAD(0x0444, 0x01B8, 8, 0x061C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__ANATOP_USBPHY1_TSTI_TX_DN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__ANATOP_USBPHY1_TSTI_TX_DN        = IOMUX_PAD(0x04BC, 0x0174, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__ECSPI2_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__ECSPI2_MISO                      = IOMUX_PAD(0x04BC, 0x0174, 3, 0x0724, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__ECSPI3_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__ECSPI3_SS0                       = IOMUX_PAD(0x0434, 0x01A8, 3, 0x0560, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__ECSPI3_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__ECSPI3_SS0                      = IOMUX_PAD(0x0434, 0x01A8, 3, 0x0560, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__EIM_CS1_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__EIM_CS1_B                        = IOMUX_PAD(0x0434, 0x01A8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__EIM_CS1_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__EIM_CS1_B                       = IOMUX_PAD(0x0434, 0x01A8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__ESAI_TX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__ESAI_TX1                         = IOMUX_PAD(0x04BC, 0x0174, 4, 0x0794, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__GPIO4_IO12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__GPIO4_IO12                       = IOMUX_PAD(0x0434, 0x01A8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__GPIO4_IO12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__GPIO4_IO12                      = IOMUX_PAD(0x0434, 0x01A8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__GPIO4_IO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__GPIO4_IO_13                      = IOMUX_PAD(0x04BC, 0x0174, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__QSPI2_A_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__QSPI2_A_DATA_1                   = IOMUX_PAD(0x04BC, 0x0174, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__QSPI_A_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__QSPI_A_DATA00                    = IOMUX_PAD(0x0434, 0x01A8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__QSPI_A_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__QSPI_A_DATA00                   = IOMUX_PAD(0x0434, 0x01A8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__RAWNAND_READY_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__RAWNAND_READY_B                  = IOMUX_PAD(0x04BC, 0x0174, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__RAWNAND_READY_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__RAWNAND_READY_B                  = IOMUX_PAD(0x0434, 0x01A8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__RAWNAND_READY_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__RAWNAND_READY_B                 = IOMUX_PAD(0x0434, 0x01A8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__SDMA_DEBUG_PC_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__SDMA_DEBUG_PC_10                 = IOMUX_PAD(0x04BC, 0x0174, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__TPSMP_HDATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__TPSMP_HDATA_2                    = IOMUX_PAD(0x04BC, 0x0174, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__UART3_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__UART3_DCE_TX                     = IOMUX_PAD(0x0434, 0x01A8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__UART3_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__UART3_DCE_TX                    = IOMUX_PAD(0x0434, 0x01A8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__UART3_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__UART3_DTE_RX                     = IOMUX_PAD(0x0434, 0x01A8, 8, 0x0634, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__UART3_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__UART3_DTE_RX                    = IOMUX_PAD(0x0434, 0x01A8, 8, 0x0634, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__USDHC1_DATA4	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_READY_B__USDHC1_DATA4                     = IOMUX_PAD(0x0434, 0x01A8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_READY_B__USDHC1_DATA4	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_READY_B__USDHC1_DATA4                    = IOMUX_PAD(0x0434, 0x01A8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_READY_B__USDHC1_VSELECT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__USDHC1_VSELECT                   = IOMUX_PAD(0x04BC, 0x0174, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_READY_B__WEIM_EB_B_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_READY_B__WEIM_EB_B_1                      = IOMUX_PAD(0x04BC, 0x0174, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__ANATOP_USBPHY2_TSTO_RX_HS_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__ANATOP_USBPHY2_TSTO_RX_HS_RXD       = IOMUX_PAD(0x04B8, 0x0170, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__AUDMUX_AUD4_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__AUDMUX_AUD4_TXFS                    = IOMUX_PAD(0x04B8, 0x0170, 3, 0x0658, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__ECSPI3_SS2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__ECSPI3_SS2                          = IOMUX_PAD(0x0404, 0x0178, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__ECSPI3_SS2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__ECSPI3_SS2                         = IOMUX_PAD(0x0404, 0x0178, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__EIM_EB_B00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__EIM_EB_B00                          = IOMUX_PAD(0x0404, 0x0178, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__EIM_EB_B00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__EIM_EB_B00                         = IOMUX_PAD(0x0404, 0x0178, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__ESAI_TX_FS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__ESAI_TX_FS                          = IOMUX_PAD(0x04B8, 0x0170, 4, 0x077C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__GPIO4_IO00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__GPIO4_IO00                          = IOMUX_PAD(0x0404, 0x0178, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__GPIO4_IO00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__GPIO4_IO00                         = IOMUX_PAD(0x0404, 0x0178, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__GPIO4_IO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__GPIO4_IO_12                         = IOMUX_PAD(0x04B8, 0x0170, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__KPP_ROW00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__KPP_ROW00                           = IOMUX_PAD(0x0404, 0x0178, 3, 0x05D0, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__KPP_ROW00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__KPP_ROW00                          = IOMUX_PAD(0x0404, 0x0178, 3, 0x05D0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__QSPI2_B_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__QSPI2_B_DATA_3                      = IOMUX_PAD(0x04B8, 0x0170, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__QSPI_B_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__QSPI_B_SCLK                         = IOMUX_PAD(0x0404, 0x0178, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__QSPI_B_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__QSPI_B_SCLK                        = IOMUX_PAD(0x0404, 0x0178, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__RAWNAND_RE_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__RAWNAND_RE_B                        = IOMUX_PAD(0x04B8, 0x0170, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__RAWNAND_RE_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__RAWNAND_RE_B                        = IOMUX_PAD(0x0404, 0x0178, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__RAWNAND_RE_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__RAWNAND_RE_B                       = IOMUX_PAD(0x0404, 0x0178, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__SDMA_DEBUG_PC_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__SDMA_DEBUG_PC_7                     = IOMUX_PAD(0x04B8, 0x0170, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__TPSMP_HDATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__TPSMP_HDATA_5                       = IOMUX_PAD(0x04B8, 0x0170, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_RE_B__USDHC2_CLK                          = IOMUX_PAD(0x0404, 0x0178, 1, 0x0670, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_RE_B__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_RE_B__USDHC2_CLK                         = IOMUX_PAD(0x0404, 0x0178, 1, 0x0670, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_RE_B__USDHC2_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__USDHC2_RESET_B                      = IOMUX_PAD(0x04B8, 0x0170, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_RE_B__WEIM_RW	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_RE_B__WEIM_RW                             = IOMUX_PAD(0x04B8, 0x0170, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__ANATOP_USBPHY1_TSTO_PLL_CLK20DIV	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__ANATOP_USBPHY1_TSTO_PLL_CLK20DIV    = IOMUX_PAD(0x04C0, 0x0178, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__AUDMUX_AUD4_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__AUDMUX_AUD4_RXD                     = IOMUX_PAD(0x04C0, 0x0178, 3, 0x0644, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__ECSPI3_SS3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__ECSPI3_SS3                          = IOMUX_PAD(0x0408, 0x017C, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__ECSPI3_SS3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__ECSPI3_SS3                         = IOMUX_PAD(0x0408, 0x017C, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__EIM_EB_B01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__EIM_EB_B01                          = IOMUX_PAD(0x0408, 0x017C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__EIM_EB_B01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__EIM_EB_B01                         = IOMUX_PAD(0x0408, 0x017C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__ESAI_TX5_RX0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__ESAI_TX5_RX0                        = IOMUX_PAD(0x04C0, 0x0178, 4, 0x07A4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__GPIO4_IO01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__GPIO4_IO01                          = IOMUX_PAD(0x0408, 0x017C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__GPIO4_IO01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__GPIO4_IO01                         = IOMUX_PAD(0x0408, 0x017C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__GPIO4_IO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__GPIO4_IO_14                         = IOMUX_PAD(0x04C0, 0x0178, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__KPP_COL00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__KPP_COL00                           = IOMUX_PAD(0x0408, 0x017C, 3, 0x05C4, 1/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__KPP_COL00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__KPP_COL00                          = IOMUX_PAD(0x0408, 0x017C, 3, 0x05C4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__QSPI2_B_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__QSPI2_B_DATA_2                      = IOMUX_PAD(0x04C0, 0x0178, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__QSPI_B_SS0_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__QSPI_B_SS0_B                        = IOMUX_PAD(0x0408, 0x017C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__QSPI_B_SS0_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__QSPI_B_SS0_B                       = IOMUX_PAD(0x0408, 0x017C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__RAWNAND_WE_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__RAWNAND_WE_B                        = IOMUX_PAD(0x04C0, 0x0178, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__RAWNAND_WE_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__RAWNAND_WE_B                        = IOMUX_PAD(0x0408, 0x017C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__RAWNAND_WE_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__RAWNAND_WE_B                       = IOMUX_PAD(0x0408, 0x017C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__SDMA_DEBUG_PC_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__SDMA_DEBUG_PC_6                     = IOMUX_PAD(0x04C0, 0x0178, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__TPSMP_HDATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__TPSMP_HDATA_6                       = IOMUX_PAD(0x04C0, 0x0178, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WE_B__USDHC2_CMD                          = IOMUX_PAD(0x0408, 0x017C, 1, 0x0678, 2/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WE_B__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WE_B__USDHC2_CMD                         = IOMUX_PAD(0x0408, 0x017C, 1, 0x0678, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WE_B__USDHC4_VSELECT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__USDHC4_VSELECT                      = IOMUX_PAD(0x04C0, 0x0178, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WE_B__WEIM_WAIT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WE_B__WEIM_WAIT                           = IOMUX_PAD(0x04C0, 0x0178, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__ANATOP_USBPHY1_TSTI_TX_HS_MODE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__ANATOP_USBPHY1_TSTI_TX_HS_MODE      = IOMUX_PAD(0x04C4, 0x017C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__ECSPI2_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__ECSPI2_MOSI                         = IOMUX_PAD(0x04C4, 0x017C, 3, 0x0728, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__ECSPI3_RDY	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__ECSPI3_RDY                          = IOMUX_PAD(0x0430, 0x01A4, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__ECSPI3_RDY	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__ECSPI3_RDY                         = IOMUX_PAD(0x0430, 0x01A4, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__EIM_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__EIM_BCLK                            = IOMUX_PAD(0x0430, 0x01A4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__EIM_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__EIM_BCLK                           = IOMUX_PAD(0x0430, 0x01A4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__ESAI_TX4_RX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__ESAI_TX4_RX1                        = IOMUX_PAD(0x04C4, 0x017C, 4, 0x07A0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__GPIO4_IO11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__GPIO4_IO11                          = IOMUX_PAD(0x0430, 0x01A4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__GPIO4_IO11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__GPIO4_IO11                         = IOMUX_PAD(0x0430, 0x01A4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__GPIO4_IO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__GPIO4_IO_15                         = IOMUX_PAD(0x04C4, 0x017C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__PWM4_OUT                            = IOMUX_PAD(0x0430, 0x01A4, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__PWM4_OUT                           = IOMUX_PAD(0x0430, 0x01A4, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__QSPI2_A_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__QSPI2_A_DATA_0                      = IOMUX_PAD(0x04C4, 0x017C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__QSPI_A_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__QSPI_A_SCLK                         = IOMUX_PAD(0x0430, 0x01A4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__QSPI_A_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__QSPI_A_SCLK                        = IOMUX_PAD(0x0430, 0x01A4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__RAWNAND_WP_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__RAWNAND_WP_B                        = IOMUX_PAD(0x04C4, 0x017C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__RAWNAND_WP_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__RAWNAND_WP_B                        = IOMUX_PAD(0x0430, 0x01A4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__RAWNAND_WP_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__RAWNAND_WP_B                       = IOMUX_PAD(0x0430, 0x01A4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__SDMA_DEBUG_PC_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__SDMA_DEBUG_PC_11                    = IOMUX_PAD(0x04C4, 0x017C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__TPSMP_HDATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__TPSMP_HDATA_1                       = IOMUX_PAD(0x04C4, 0x017C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__USDHC1_RESET_B                      = IOMUX_PAD(0x04C4, 0x017C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_NAND_WP_B__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_NAND_WP_B__USDHC1_RESET_B                      = IOMUX_PAD(0x0430, 0x01A4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_NAND_WP_B__USDHC1_RESET_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_NAND_WP_B__USDHC1_RESET_B                     = IOMUX_PAD(0x0430, 0x01A4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_NAND_WP_B__WEIM_EB_B_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_NAND_WP_B__WEIM_EB_B_0                         = IOMUX_PAD(0x04C4, 0x017C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__CSI1_DATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__CSI1_DATA_14                     = IOMUX_PAD(0x04C8, 0x0180, 4, 0x06D4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__ECSPI1_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__ECSPI1_MOSI                      = IOMUX_PAD(0x04C8, 0x0180, 2, 0x0718, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__ESAI_TX4_RX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__ESAI_TX4_RX1                     = IOMUX_PAD(0x04C8, 0x0180, 3, 0x07A0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__GPIO4_IO_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__GPIO4_IO_16                      = IOMUX_PAD(0x04C8, 0x0180, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__QSPI1_A_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__QSPI1_A_DATA_0                   = IOMUX_PAD(0x04C8, 0x0180, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__SDMA_DEBUG_BUS_DEVICE_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__SDMA_DEBUG_BUS_DEVICE_3          = IOMUX_PAD(0x04C8, 0x0180, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__SIM_M_HADDR_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__SIM_M_HADDR_3                    = IOMUX_PAD(0x04C8, 0x0180, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__USB_OTG2_OC                      = IOMUX_PAD(0x04C8, 0x0180, 1, 0x085C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA0__WEIM_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA0__WEIM_DATA_6                      = IOMUX_PAD(0x04C8, 0x0180, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__ANATOP_OTG1_ID                   = IOMUX_PAD(0x04CC, 0x0184, 1, 0x0624, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__CSI1_DATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__CSI1_DATA_13                     = IOMUX_PAD(0x04CC, 0x0184, 4, 0x06D0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__ECSPI1_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__ECSPI1_MISO                      = IOMUX_PAD(0x04CC, 0x0184, 2, 0x0714, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__ESAI_TX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__ESAI_TX1                         = IOMUX_PAD(0x04CC, 0x0184, 3, 0x0794, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__GPIO4_IO_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__GPIO4_IO_17                      = IOMUX_PAD(0x04CC, 0x0184, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__QSPI1_A_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__QSPI1_A_DATA_1                   = IOMUX_PAD(0x04CC, 0x0184, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__SDMA_DEBUG_PC_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__SDMA_DEBUG_PC_0                  = IOMUX_PAD(0x04CC, 0x0184, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__SIM_M_HADDR_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__SIM_M_HADDR_4                    = IOMUX_PAD(0x04CC, 0x0184, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA1__WEIM_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA1__WEIM_DATA_5                      = IOMUX_PAD(0x04CC, 0x0184, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__CSI1_DATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__CSI1_DATA_12                     = IOMUX_PAD(0x04D0, 0x0188, 4, 0x06CC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__ECSPI5_SS1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__ECSPI5_SS1                       = IOMUX_PAD(0x04D0, 0x0188, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__ESAI_TX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__ESAI_TX_CLK                      = IOMUX_PAD(0x04D0, 0x0188, 3, 0x078C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__GPIO4_IO_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__GPIO4_IO_18                      = IOMUX_PAD(0x04D0, 0x0188, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__QSPI1_A_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__QSPI1_A_DATA_2                   = IOMUX_PAD(0x04D0, 0x0188, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__SDMA_DEBUG_PC_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__SDMA_DEBUG_PC_1                  = IOMUX_PAD(0x04D0, 0x0188, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__SIM_M_HADDR_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__SIM_M_HADDR_6                    = IOMUX_PAD(0x04D0, 0x0188, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__USB_OTG1_PWR                     = IOMUX_PAD(0x04D0, 0x0188, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA2__WEIM_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA2__WEIM_DATA_4                      = IOMUX_PAD(0x04D0, 0x0188, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__CSI1_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__CSI1_DATA_11                     = IOMUX_PAD(0x04D4, 0x018C, 4, 0x06C8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__ECSPI5_SS2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__ECSPI5_SS2                       = IOMUX_PAD(0x04D4, 0x018C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__ESAI_TX0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__ESAI_TX0                         = IOMUX_PAD(0x04D4, 0x018C, 3, 0x0790, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__GPIO4_IO_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__GPIO4_IO_19                      = IOMUX_PAD(0x04D4, 0x018C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__QSPI1_A_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__QSPI1_A_DATA_3                   = IOMUX_PAD(0x04D4, 0x018C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__SDMA_DEBUG_PC_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__SDMA_DEBUG_PC_2                  = IOMUX_PAD(0x04D4, 0x018C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__SIM_M_HADDR_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__SIM_M_HADDR_7                    = IOMUX_PAD(0x04D4, 0x018C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__USB_OTG1_OC                      = IOMUX_PAD(0x04D4, 0x018C, 1, 0x0860, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DATA3__WEIM_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DATA3__WEIM_DATA_3                      = IOMUX_PAD(0x04D4, 0x018C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__CAN2_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__CAN2_TX                            = IOMUX_PAD(0x04D8, 0x0190, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__CANFD_TX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__CANFD_TX2                          = IOMUX_PAD(0x04D8, 0x0190, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__CSI1_DATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__CSI1_DATA_15                       = IOMUX_PAD(0x04D8, 0x0190, 4, 0x06D8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__ECSPI5_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__ECSPI5_MOSI                        = IOMUX_PAD(0x04D8, 0x0190, 3, 0x0758, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__GPIO4_IO_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__GPIO4_IO_20                        = IOMUX_PAD(0x04D8, 0x0190, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__QSPI1_A_DQS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__QSPI1_A_DQS                        = IOMUX_PAD(0x04D8, 0x0190, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__SDMA_DEBUG_BUS_DEVICE_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__SDMA_DEBUG_BUS_DEVICE_4            = IOMUX_PAD(0x04D8, 0x0190, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__SIM_M_HADDR_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__SIM_M_HADDR_13                     = IOMUX_PAD(0x04D8, 0x0190, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_DQS__WEIM_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_DQS__WEIM_DATA_7                        = IOMUX_PAD(0x04D8, 0x0190, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__ANATOP_OTG2_ID                    = IOMUX_PAD(0x04DC, 0x0194, 1, 0x0628, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__CSI1_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__CSI1_DATA_1                       = IOMUX_PAD(0x04DC, 0x0194, 4, 0x06A4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__ECSPI1_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__ECSPI1_SCLK                       = IOMUX_PAD(0x04DC, 0x0194, 2, 0x0710, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__ESAI_TX2_RX3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__ESAI_TX2_RX3                      = IOMUX_PAD(0x04DC, 0x0194, 3, 0x0798, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__GPIO4_IO_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__GPIO4_IO_21                       = IOMUX_PAD(0x04DC, 0x0194, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__QSPI1_A_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__QSPI1_A_SCLK                      = IOMUX_PAD(0x04DC, 0x0194, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__SDMA_DEBUG_PC_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__SDMA_DEBUG_PC_5                   = IOMUX_PAD(0x04DC, 0x0194, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__SIM_M_HADDR_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__SIM_M_HADDR_0                     = IOMUX_PAD(0x04DC, 0x0194, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SCLK__WEIM_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SCLK__WEIM_DATA_0                       = IOMUX_PAD(0x04DC, 0x0194, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__CSI1_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__CSI1_DATA_0                      = IOMUX_PAD(0x04E0, 0x0198, 4, 0x06A0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__ECSPI1_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__ECSPI1_SS0                       = IOMUX_PAD(0x04E0, 0x0198, 2, 0x071C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__ESAI_TX3_RX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__ESAI_TX3_RX2                     = IOMUX_PAD(0x04E0, 0x0198, 3, 0x079C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__GPIO4_IO_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__GPIO4_IO_22                      = IOMUX_PAD(0x04E0, 0x0198, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__QSPI1_A_SS0_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__QSPI1_A_SS0_B                    = IOMUX_PAD(0x04E0, 0x0198, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__SDMA_DEBUG_PC_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__SDMA_DEBUG_PC_4                  = IOMUX_PAD(0x04E0, 0x0198, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__SIM_M_HADDR_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__SIM_M_HADDR_1                    = IOMUX_PAD(0x04E0, 0x0198, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__USB_OTG2_PWR                     = IOMUX_PAD(0x04E0, 0x0198, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS0_B__WEIM_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS0_B__WEIM_DATA_1                      = IOMUX_PAD(0x04E0, 0x0198, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__CAN1_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__CAN1_RX                          = IOMUX_PAD(0x04E4, 0x019C, 1, 0x068C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__CANFD_RX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__CANFD_RX1                        = IOMUX_PAD(0x04E4, 0x019C, 2, 0x0694, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__CSI1_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__CSI1_DATA_10                     = IOMUX_PAD(0x04E4, 0x019C, 4, 0x06FC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__ECSPI5_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__ECSPI5_MISO                      = IOMUX_PAD(0x04E4, 0x019C, 3, 0x0754, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__GPIO4_IO_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__GPIO4_IO_23                      = IOMUX_PAD(0x04E4, 0x019C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__QSPI1_A_SS1_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__QSPI1_A_SS1_B                    = IOMUX_PAD(0x04E4, 0x019C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3                  = IOMUX_PAD(0x04E4, 0x019C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12                   = IOMUX_PAD(0x04E4, 0x019C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1A_SS1_B__WEIM_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1A_SS1_B__WEIM_DATA_2                      = IOMUX_PAD(0x04E4, 0x019C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__CSI1_DATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__CSI1_DATA_22                     = IOMUX_PAD(0x04E8, 0x01A0, 4, 0x06F4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__ECSPI3_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__ECSPI3_MOSI                      = IOMUX_PAD(0x04E8, 0x01A0, 2, 0x0738, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__ESAI_RX_FS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__ESAI_RX_FS                       = IOMUX_PAD(0x04E8, 0x01A0, 3, 0x0778, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__GPIO4_IO_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__GPIO4_IO_24                      = IOMUX_PAD(0x04E8, 0x01A0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0                   = IOMUX_PAD(0x04E8, 0x01A0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__SIM_M_HADDR_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__SIM_M_HADDR_9                    = IOMUX_PAD(0x04E8, 0x01A0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__UART3_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__UART3_CTS_B                      = IOMUX_PAD(0x04E8, 0x01A0, 1, 0x083C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA0__WEIM_DATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA0__WEIM_DATA_14                     = IOMUX_PAD(0x04E8, 0x01A0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__CSI1_DATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__CSI1_DATA_21                     = IOMUX_PAD(0x04EC, 0x01A4, 4, 0x06F0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__ECSPI3_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__ECSPI3_MISO                      = IOMUX_PAD(0x04EC, 0x01A4, 2, 0x0734, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__ESAI_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__ESAI_RX_CLK                      = IOMUX_PAD(0x04EC, 0x01A4, 3, 0x0788, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__GPIO4_IO_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__GPIO4_IO_25                      = IOMUX_PAD(0x04EC, 0x01A4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__QSPI1_B_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__QSPI1_B_DATA_1                   = IOMUX_PAD(0x04EC, 0x01A4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__SIM_M_HADDR_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__SIM_M_HADDR_8                    = IOMUX_PAD(0x04EC, 0x01A4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__UART3_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__UART3_RTS_B                      = IOMUX_PAD(0x04EC, 0x01A4, 1, 0x083C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA1__WEIM_DATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA1__WEIM_DATA_13                     = IOMUX_PAD(0x04EC, 0x01A4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__CSI1_DATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__CSI1_DATA_20                     = IOMUX_PAD(0x04F0, 0x01A8, 4, 0x06EC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__ECSPI5_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__ECSPI5_RDY                       = IOMUX_PAD(0x04F0, 0x01A8, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__ESAI_TX5_RX0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__ESAI_TX5_RX0                     = IOMUX_PAD(0x04F0, 0x01A8, 3, 0x07A4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__GPIO4_IO_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__GPIO4_IO_26                      = IOMUX_PAD(0x04F0, 0x01A8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__I2C2_SDA                         = IOMUX_PAD(0x04F0, 0x01A8, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2                   = IOMUX_PAD(0x04F0, 0x01A8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__SIM_M_HADDR_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__SIM_M_HADDR_5                    = IOMUX_PAD(0x04F0, 0x01A8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA2__WEIM_DATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA2__WEIM_DATA_12                     = IOMUX_PAD(0x04F0, 0x01A8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__CSI1_DATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__CSI1_DATA_19                     = IOMUX_PAD(0x04F4, 0x01AC, 4, 0x06E8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__ECSPI5_SS3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__ECSPI5_SS3                       = IOMUX_PAD(0x04F4, 0x01AC, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__ESAI_TX_FS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__ESAI_TX_FS                       = IOMUX_PAD(0x04F4, 0x01AC, 3, 0x077C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__GPIO4_IO_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__GPIO4_IO_27                      = IOMUX_PAD(0x04F4, 0x01AC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__I2C2_SCL                         = IOMUX_PAD(0x04F4, 0x01AC, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3                   = IOMUX_PAD(0x04F4, 0x01AC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__SIM_M_HADDR_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__SIM_M_HADDR_2                    = IOMUX_PAD(0x04F4, 0x01AC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DATA3__WEIM_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DATA3__WEIM_DATA_11                     = IOMUX_PAD(0x04F4, 0x01AC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__CAN1_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__CAN1_TX                            = IOMUX_PAD(0x04F8, 0x01B0, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__CANFD_TX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__CANFD_TX1                          = IOMUX_PAD(0x04F8, 0x01B0, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__CSI1_DATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__CSI1_DATA_23                       = IOMUX_PAD(0x04F8, 0x01B0, 4, 0x06F8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__ECSPI5_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__ECSPI5_SS0                         = IOMUX_PAD(0x04F8, 0x01B0, 3, 0x075C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__GPIO4_IO_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__GPIO4_IO_28                        = IOMUX_PAD(0x04F8, 0x01B0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__QSPI1_B_DQS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__QSPI1_B_DQS                        = IOMUX_PAD(0x04F8, 0x01B0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__SIM_M_HADDR_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__SIM_M_HADDR_15                     = IOMUX_PAD(0x04F8, 0x01B0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_DQS__WEIM_DATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_DQS__WEIM_DATA_15                       = IOMUX_PAD(0x04F8, 0x01B0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__CSI1_DATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__CSI1_DATA_16                      = IOMUX_PAD(0x04FC, 0x01B4, 4, 0x06DC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__ECSPI3_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__ECSPI3_SCLK                       = IOMUX_PAD(0x04FC, 0x01B4, 2, 0x0730, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__ESAI_RX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__ESAI_RX_HF_CLK                    = IOMUX_PAD(0x04FC, 0x01B4, 3, 0x0780, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__GPIO4_IO_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__GPIO4_IO_29                       = IOMUX_PAD(0x04FC, 0x01B4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__QSPI1_B_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__QSPI1_B_SCLK                      = IOMUX_PAD(0x04FC, 0x01B4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__SIM_M_HADDR_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__SIM_M_HADDR_11                    = IOMUX_PAD(0x04FC, 0x01B4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__UART3_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__UART3_RX                          = IOMUX_PAD(0x04FC, 0x01B4, 1, 0x0840, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SCLK__WEIM_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SCLK__WEIM_DATA_8                       = IOMUX_PAD(0x04FC, 0x01B4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__CSI1_DATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__CSI1_DATA_17                     = IOMUX_PAD(0x0500, 0x01B8, 4, 0x06E0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__ECSPI3_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__ECSPI3_SS0                       = IOMUX_PAD(0x0500, 0x01B8, 2, 0x073C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__ESAI_TX_HF_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__ESAI_TX_HF_CLK                   = IOMUX_PAD(0x0500, 0x01B8, 3, 0x0784, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__GPIO4_IO_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__GPIO4_IO_30                      = IOMUX_PAD(0x0500, 0x01B8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__QSPI1_B_SS0_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__QSPI1_B_SS0_B                    = IOMUX_PAD(0x0500, 0x01B8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__SIM_M_HADDR_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__SIM_M_HADDR_10                   = IOMUX_PAD(0x0500, 0x01B8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__UART3_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__UART3_TX                         = IOMUX_PAD(0x0500, 0x01B8, 1, 0x0840, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS0_B__WEIM_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS0_B__WEIM_DATA_9                      = IOMUX_PAD(0x0500, 0x01B8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__CAN2_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__CAN2_RX                          = IOMUX_PAD(0x0504, 0x01BC, 1, 0x0690, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__CANFD_RX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__CANFD_RX2                        = IOMUX_PAD(0x0504, 0x01BC, 2, 0x0698, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__CSI1_DATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__CSI1_DATA_18                     = IOMUX_PAD(0x0504, 0x01BC, 4, 0x06E4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__ECSPI5_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__ECSPI5_SCLK                      = IOMUX_PAD(0x0504, 0x01BC, 3, 0x0750, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__GPIO4_IO_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__GPIO4_IO_31                      = IOMUX_PAD(0x0504, 0x01BC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__QSPI1_B_SS1_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__QSPI1_B_SS1_B                    = IOMUX_PAD(0x0504, 0x01BC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__SIM_M_HADDR_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__SIM_M_HADDR_14                   = IOMUX_PAD(0x0504, 0x01BC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_QSPI1B_SS1_B__WEIM_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_QSPI1B_SS1_B__WEIM_DATA_10                     = IOMUX_PAD(0x0504, 0x01BC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_REF_CLK_32K__GPIO_3_22	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_REF_CLK_32K__GPIO_3_22				= IOMUX_PAD(0x0530, 0x0228, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_RGMII1_RD0__ANATOP_TESTI_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD0__ANATOP_TESTI_0                     = IOMUX_PAD(0x0508, 0x01C0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD0__CSI2_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD0__CSI2_DATA_10                       = IOMUX_PAD(0x0508, 0x01C0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0                    = IOMUX_PAD(0x0508, 0x01C0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD0__GPIO5_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD0__GPIO5_IO_0                         = IOMUX_PAD(0x0508, 0x01C0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD0__PCIE_CTRL_DEBUG_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD0__PCIE_CTRL_DEBUG_0                  = IOMUX_PAD(0x0508, 0x01C0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD0__RAWNAND_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD0__RAWNAND_TESTER_TRIGGER             = IOMUX_PAD(0x0508, 0x01C0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD1__ANATOP_TESTI_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD1__ANATOP_TESTI_1                     = IOMUX_PAD(0x050C, 0x01C4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD1__CSI2_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD1__CSI2_DATA_11                       = IOMUX_PAD(0x050C, 0x01C4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1                    = IOMUX_PAD(0x050C, 0x01C4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD1__GPIO5_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD1__GPIO5_IO_1                         = IOMUX_PAD(0x050C, 0x01C4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD1__PCIE_CTRL_DEBUG_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD1__PCIE_CTRL_DEBUG_1                  = IOMUX_PAD(0x050C, 0x01C4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD1__USDHC1_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD1__USDHC1_TESTER_TRIGGER              = IOMUX_PAD(0x050C, 0x01C4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD2__ANATOP_TESTI_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD2__ANATOP_TESTI_2                     = IOMUX_PAD(0x0510, 0x01C8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD2__CSI2_DATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD2__CSI2_DATA_12                       = IOMUX_PAD(0x0510, 0x01C8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD2__ENET1_RX_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD2__ENET1_RX_DATA_2                    = IOMUX_PAD(0x0510, 0x01C8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD2__GPIO5_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD2__GPIO5_IO_2                         = IOMUX_PAD(0x0510, 0x01C8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD2__PCIE_CTRL_DEBUG_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD2__PCIE_CTRL_DEBUG_2                  = IOMUX_PAD(0x0510, 0x01C8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD2__USDHC2_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD2__USDHC2_TESTER_TRIGGER              = IOMUX_PAD(0x0510, 0x01C8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD3__ANATOP_TESTI_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD3__ANATOP_TESTI_3                     = IOMUX_PAD(0x0514, 0x01CC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD3__CSI2_DATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD3__CSI2_DATA_13                       = IOMUX_PAD(0x0514, 0x01CC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD3__ENET1_RX_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD3__ENET1_RX_DATA_3                    = IOMUX_PAD(0x0514, 0x01CC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD3__GPIO5_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD3__GPIO5_IO_3                         = IOMUX_PAD(0x0514, 0x01CC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD3__PCIE_CTRL_DEBUG_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD3__PCIE_CTRL_DEBUG_3                  = IOMUX_PAD(0x0514, 0x01CC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RD3__USDHC3_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RD3__USDHC3_TESTER_TRIGGER              = IOMUX_PAD(0x0514, 0x01CC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__ANATOP_TESTO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__ANATOP_TESTO_1                     = IOMUX_PAD(0x051C, 0x01D4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__CSI2_DATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__CSI2_DATA_15                       = IOMUX_PAD(0x051C, 0x01D4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__ECSPI1_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__ECSPI1_TESTER_TRIGGER              = IOMUX_PAD(0x051C, 0x01D4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__ENET1_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__ENET1_RX_CLK                       = IOMUX_PAD(0x051C, 0x01D4, 0, 0x0768, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__ENET1_RX_ER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__ENET1_RX_ER                        = IOMUX_PAD(0x051C, 0x01D4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__GPIO5_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__GPIO5_IO_5                         = IOMUX_PAD(0x051C, 0x01D4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RXC__PCIE_CTRL_DEBUG_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RXC__PCIE_CTRL_DEBUG_5                  = IOMUX_PAD(0x051C, 0x01D4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RX_CTL__ANATOP_TESTO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RX_CTL__ANATOP_TESTO_0                  = IOMUX_PAD(0x0518, 0x01D0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RX_CTL__CSI2_DATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RX_CTL__CSI2_DATA_14                    = IOMUX_PAD(0x0518, 0x01D0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN                     = IOMUX_PAD(0x0518, 0x01D0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RX_CTL__GPIO5_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RX_CTL__GPIO5_IO_4                      = IOMUX_PAD(0x0518, 0x01D0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RX_CTL__PCIE_CTRL_DEBUG_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RX_CTL__PCIE_CTRL_DEBUG_4               = IOMUX_PAD(0x0518, 0x01D0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_RX_CTL__USDHC4_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_RX_CTL__USDHC4_TESTER_TRIGGER           = IOMUX_PAD(0x0518, 0x01D0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__ANATOP_TESTO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__ANATOP_TESTO_2                     = IOMUX_PAD(0x0520, 0x01D8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__CSI2_DATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__CSI2_DATA_16                       = IOMUX_PAD(0x0520, 0x01D8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__ECSPI2_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__ECSPI2_TESTER_TRIGGER              = IOMUX_PAD(0x0520, 0x01D8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0                    = IOMUX_PAD(0x0520, 0x01D8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__GPIO5_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__GPIO5_IO_6                         = IOMUX_PAD(0x0520, 0x01D8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__PCIE_CTRL_DEBUG_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__PCIE_CTRL_DEBUG_6                  = IOMUX_PAD(0x0520, 0x01D8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD0__SAI2_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD0__SAI2_RX_SYNC                       = IOMUX_PAD(0x0520, 0x01D8, 2, 0x0810, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__ANATOP_TESTO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__ANATOP_TESTO_3                     = IOMUX_PAD(0x0524, 0x01DC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__CSI2_DATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__CSI2_DATA_17                       = IOMUX_PAD(0x0524, 0x01DC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__ECSPI3_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__ECSPI3_TESTER_TRIGGER              = IOMUX_PAD(0x0524, 0x01DC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1                    = IOMUX_PAD(0x0524, 0x01DC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__GPIO5_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__GPIO5_IO_7                         = IOMUX_PAD(0x0524, 0x01DC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__PCIE_CTRL_DEBUG_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__PCIE_CTRL_DEBUG_7                  = IOMUX_PAD(0x0524, 0x01DC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD1__SAI2_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD1__SAI2_RX_BCLK                       = IOMUX_PAD(0x0524, 0x01DC, 2, 0x0808, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__ANATOP_TESTO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__ANATOP_TESTO_4                     = IOMUX_PAD(0x0528, 0x01E0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__CSI2_DATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__CSI2_DATA_18                       = IOMUX_PAD(0x0528, 0x01E0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__ECSPI4_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__ECSPI4_TESTER_TRIGGER              = IOMUX_PAD(0x0528, 0x01E0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__ENET1_TX_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__ENET1_TX_DATA_2                    = IOMUX_PAD(0x0528, 0x01E0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__GPIO5_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__GPIO5_IO_8                         = IOMUX_PAD(0x0528, 0x01E0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__PCIE_CTRL_DEBUG_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__PCIE_CTRL_DEBUG_8                  = IOMUX_PAD(0x0528, 0x01E0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD2__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD2__SAI2_TX_SYNC                       = IOMUX_PAD(0x0528, 0x01E0, 2, 0x0818, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__ANATOP_TESTO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__ANATOP_TESTO_5                     = IOMUX_PAD(0x052C, 0x01E4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__CSI2_DATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__CSI2_DATA_19                       = IOMUX_PAD(0x052C, 0x01E4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__ECSPI5_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__ECSPI5_TESTER_TRIGGER              = IOMUX_PAD(0x052C, 0x01E4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__ENET1_TX_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__ENET1_TX_DATA_3                    = IOMUX_PAD(0x052C, 0x01E4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__GPIO5_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__GPIO5_IO_9                         = IOMUX_PAD(0x052C, 0x01E4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__PCIE_CTRL_DEBUG_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__PCIE_CTRL_DEBUG_9                  = IOMUX_PAD(0x052C, 0x01E4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TD3__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TD3__SAI2_TX_BCLK                       = IOMUX_PAD(0x052C, 0x01E4, 2, 0x0814, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__ANATOP_TESTO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__ANATOP_TESTO_7                     = IOMUX_PAD(0x0534, 0x01EC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__CSI2_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__CSI2_DATA_1                        = IOMUX_PAD(0x0534, 0x01EC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__ENET1_RGMII_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__ENET1_RGMII_TXC                    = IOMUX_PAD(0x0534, 0x01EC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__ENET1_TX_ER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__ENET1_TX_ER                        = IOMUX_PAD(0x0534, 0x01EC, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__GPIO5_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__GPIO5_IO_11                        = IOMUX_PAD(0x0534, 0x01EC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__PCIE_CTRL_DEBUG_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__PCIE_CTRL_DEBUG_11                 = IOMUX_PAD(0x0534, 0x01EC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__QSPI2_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__QSPI2_TESTER_TRIGGER               = IOMUX_PAD(0x0534, 0x01EC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TXC__SAI2_TX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TXC__SAI2_TX_DATA_0                     = IOMUX_PAD(0x0534, 0x01EC, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__ANATOP_TESTO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__ANATOP_TESTO_6                  = IOMUX_PAD(0x0530, 0x01E8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__CSI2_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__CSI2_DATA_0                     = IOMUX_PAD(0x0530, 0x01E8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN                     = IOMUX_PAD(0x0530, 0x01E8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__GPIO5_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__GPIO5_IO_10                     = IOMUX_PAD(0x0530, 0x01E8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__PCIE_CTRL_DEBUG_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__PCIE_CTRL_DEBUG_10              = IOMUX_PAD(0x0530, 0x01E8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__QSPI1_TESTER_TRIGGER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__QSPI1_TESTER_TRIGGER            = IOMUX_PAD(0x0530, 0x01E8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII1_TX_CTL__SAI2_RX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII1_TX_CTL__SAI2_RX_DATA_0                  = IOMUX_PAD(0x0530, 0x01E8, 2, 0x080C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__ANATOP_TESTO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__ANATOP_TESTO_8                     = IOMUX_PAD(0x0538, 0x01F0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__CSI2_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__CSI2_DATA_2                        = IOMUX_PAD(0x0538, 0x01F0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__ENET2_RX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__ENET2_RX_DATA_0                    = IOMUX_PAD(0x0538, 0x01F0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__GPIO5_IO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__GPIO5_IO_12                        = IOMUX_PAD(0x0538, 0x01F0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__PCIE_CTRL_DEBUG_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__PCIE_CTRL_DEBUG_12                 = IOMUX_PAD(0x0538, 0x01F0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__PWM4_OUT                           = IOMUX_PAD(0x0538, 0x01F0, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD0__VDEC_DEBUG_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD0__VDEC_DEBUG_18                      = IOMUX_PAD(0x0538, 0x01F0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__ANATOP_TESTO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__ANATOP_TESTO_9                     = IOMUX_PAD(0x053C, 0x01F4, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__CSI2_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__CSI2_DATA_3                        = IOMUX_PAD(0x053C, 0x01F4, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__ENET2_RX_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__ENET2_RX_DATA_1                    = IOMUX_PAD(0x053C, 0x01F4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__GPIO5_IO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__GPIO5_IO_13                        = IOMUX_PAD(0x053C, 0x01F4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__PCIE_CTRL_DEBUG_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__PCIE_CTRL_DEBUG_13                 = IOMUX_PAD(0x053C, 0x01F4, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__PWM3_OUT                           = IOMUX_PAD(0x053C, 0x01F4, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD1__VDEC_DEBUG_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD1__VDEC_DEBUG_19                      = IOMUX_PAD(0x053C, 0x01F4, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__ANATOP_TESTO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__ANATOP_TESTO_10                    = IOMUX_PAD(0x0540, 0x01F8, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__CSI2_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__CSI2_DATA_4                        = IOMUX_PAD(0x0540, 0x01F8, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__ENET2_RX_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__ENET2_RX_DATA_2                    = IOMUX_PAD(0x0540, 0x01F8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__GPIO5_IO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__GPIO5_IO_14                        = IOMUX_PAD(0x0540, 0x01F8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__PCIE_CTRL_DEBUG_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__PCIE_CTRL_DEBUG_14                 = IOMUX_PAD(0x0540, 0x01F8, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__PWM2_OUT                           = IOMUX_PAD(0x0540, 0x01F8, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD2__VDEC_DEBUG_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD2__VDEC_DEBUG_20                      = IOMUX_PAD(0x0540, 0x01F8, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__ANATOP_TESTO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__ANATOP_TESTO_11                    = IOMUX_PAD(0x0544, 0x01FC, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__CSI2_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__CSI2_DATA_5                        = IOMUX_PAD(0x0544, 0x01FC, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__ENET2_RX_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__ENET2_RX_DATA_3                    = IOMUX_PAD(0x0544, 0x01FC, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__GPIO5_IO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__GPIO5_IO_15                        = IOMUX_PAD(0x0544, 0x01FC, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__PCIE_CTRL_DEBUG_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__PCIE_CTRL_DEBUG_15                 = IOMUX_PAD(0x0544, 0x01FC, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__PWM1_OUT                           = IOMUX_PAD(0x0544, 0x01FC, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RD3__VDEC_DEBUG_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RD3__VDEC_DEBUG_21                      = IOMUX_PAD(0x0544, 0x01FC, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__ANATOP_TESTO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__ANATOP_TESTO_13                    = IOMUX_PAD(0x054C, 0x0204, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__CSI2_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__CSI2_DATA_7                        = IOMUX_PAD(0x054C, 0x0204, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__ENET2_RX_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__ENET2_RX_CLK                       = IOMUX_PAD(0x054C, 0x0204, 0, 0x0774, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__ENET2_RX_ER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__ENET2_RX_ER                        = IOMUX_PAD(0x054C, 0x0204, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__GPIO5_IO_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__GPIO5_IO_17                        = IOMUX_PAD(0x054C, 0x0204, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__PCIE_CTRL_DEBUG_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__PCIE_CTRL_DEBUG_17                 = IOMUX_PAD(0x054C, 0x0204, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RXC__VDEC_DEBUG_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RXC__VDEC_DEBUG_23                      = IOMUX_PAD(0x054C, 0x0204, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RX_CTL__ANATOP_TESTO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RX_CTL__ANATOP_TESTO_12                 = IOMUX_PAD(0x0548, 0x0200, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RX_CTL__CSI2_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RX_CTL__CSI2_DATA_6                     = IOMUX_PAD(0x0548, 0x0200, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RX_CTL__ENET2_RX_EN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RX_CTL__ENET2_RX_EN                     = IOMUX_PAD(0x0548, 0x0200, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RX_CTL__GPIO5_IO_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RX_CTL__GPIO5_IO_16                     = IOMUX_PAD(0x0548, 0x0200, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RX_CTL__PCIE_CTRL_DEBUG_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RX_CTL__PCIE_CTRL_DEBUG_16              = IOMUX_PAD(0x0548, 0x0200, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_RX_CTL__VDEC_DEBUG_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_RX_CTL__VDEC_DEBUG_22                   = IOMUX_PAD(0x0548, 0x0200, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__ANATOP_TESTO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__ANATOP_TESTO_14                    = IOMUX_PAD(0x0550, 0x0208, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__CSI2_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__CSI2_DATA_8                        = IOMUX_PAD(0x0550, 0x0208, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__ENET2_TX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__ENET2_TX_DATA_0                    = IOMUX_PAD(0x0550, 0x0208, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__GPIO5_IO_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__GPIO5_IO_18                        = IOMUX_PAD(0x0550, 0x0208, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__PCIE_CTRL_DEBUG_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__PCIE_CTRL_DEBUG_18                 = IOMUX_PAD(0x0550, 0x0208, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__PWM8_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__PWM8_OUT                           = IOMUX_PAD(0x0550, 0x0208, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__SAI1_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__SAI1_RX_SYNC                       = IOMUX_PAD(0x0550, 0x0208, 2, 0x07FC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD0__VDEC_DEBUG_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD0__VDEC_DEBUG_24                      = IOMUX_PAD(0x0550, 0x0208, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__ANATOP_TESTO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__ANATOP_TESTO_15                    = IOMUX_PAD(0x0554, 0x020C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__CSI2_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__CSI2_DATA_9                        = IOMUX_PAD(0x0554, 0x020C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__ENET2_TX_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__ENET2_TX_DATA_1                    = IOMUX_PAD(0x0554, 0x020C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__GPIO5_IO_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__GPIO5_IO_19                        = IOMUX_PAD(0x0554, 0x020C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__PCIE_CTRL_DEBUG_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__PCIE_CTRL_DEBUG_19                 = IOMUX_PAD(0x0554, 0x020C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__PWM7_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__PWM7_OUT                           = IOMUX_PAD(0x0554, 0x020C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__SAI1_RX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__SAI1_RX_BCLK                       = IOMUX_PAD(0x0554, 0x020C, 2, 0x07F4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD1__VDEC_DEBUG_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD1__VDEC_DEBUG_25                      = IOMUX_PAD(0x0554, 0x020C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__CSI2_VSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__CSI2_VSYNC                         = IOMUX_PAD(0x0558, 0x0210, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__ENET2_TX_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__ENET2_TX_DATA_2                    = IOMUX_PAD(0x0558, 0x0210, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__GPIO5_IO_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__GPIO5_IO_20                        = IOMUX_PAD(0x0558, 0x0210, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__PCIE_CTRL_DEBUG_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__PCIE_CTRL_DEBUG_20                 = IOMUX_PAD(0x0558, 0x0210, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__PWM6_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__PWM6_OUT                           = IOMUX_PAD(0x0558, 0x0210, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__SAI1_TX_SYNC                       = IOMUX_PAD(0x0558, 0x0210, 2, 0x0804, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__SJC_FAIL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__SJC_FAIL                           = IOMUX_PAD(0x0558, 0x0210, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD2__VDEC_DEBUG_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD2__VDEC_DEBUG_26                      = IOMUX_PAD(0x0558, 0x0210, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__CSI2_HSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__CSI2_HSYNC                         = IOMUX_PAD(0x055C, 0x0214, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__ENET2_TX_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__ENET2_TX_DATA_3                    = IOMUX_PAD(0x055C, 0x0214, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__GPIO5_IO_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__GPIO5_IO_21                        = IOMUX_PAD(0x055C, 0x0214, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__PCIE_CTRL_DEBUG_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__PCIE_CTRL_DEBUG_21                 = IOMUX_PAD(0x055C, 0x0214, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__PWM5_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__PWM5_OUT                           = IOMUX_PAD(0x055C, 0x0214, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__SAI1_TX_BCLK                       = IOMUX_PAD(0x055C, 0x0214, 2, 0x0800, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__SJC_JTAG_ACT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__SJC_JTAG_ACT                       = IOMUX_PAD(0x055C, 0x0214, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TD3__VDEC_DEBUG_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TD3__VDEC_DEBUG_27                      = IOMUX_PAD(0x055C, 0x0214, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__CSI2_PIXCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__CSI2_PIXCLK                        = IOMUX_PAD(0x0564, 0x021C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__ENET2_RGMII_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__ENET2_RGMII_TXC                    = IOMUX_PAD(0x0564, 0x021C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__ENET2_TX_ER	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__ENET2_TX_ER                        = IOMUX_PAD(0x0564, 0x021C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__GPIO5_IO_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__GPIO5_IO_23                        = IOMUX_PAD(0x0564, 0x021C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__PCIE_CTRL_DEBUG_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__PCIE_CTRL_DEBUG_23                 = IOMUX_PAD(0x0564, 0x021C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__SAI1_TX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__SAI1_TX_DATA_0                     = IOMUX_PAD(0x0564, 0x021C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__SJC_DONE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__SJC_DONE                           = IOMUX_PAD(0x0564, 0x021C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TXC__VDEC_DEBUG_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TXC__VDEC_DEBUG_29                      = IOMUX_PAD(0x0564, 0x021C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__CSI2_FIELD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__CSI2_FIELD                      = IOMUX_PAD(0x0560, 0x0218, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__ENET2_TX_EN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__ENET2_TX_EN                     = IOMUX_PAD(0x0560, 0x0218, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__GPIO5_IO_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__GPIO5_IO_22                     = IOMUX_PAD(0x0560, 0x0218, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__PCIE_CTRL_DEBUG_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__PCIE_CTRL_DEBUG_22              = IOMUX_PAD(0x0560, 0x0218, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__SAI1_RX_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__SAI1_RX_DATA_0                  = IOMUX_PAD(0x0560, 0x0218, 2, 0x07F8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__SJC_DE_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__SJC_DE_B                        = IOMUX_PAD(0x0560, 0x0218, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_RGMII2_TX_CTL__VDEC_DEBUG_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_RGMII2_TX_CTL__VDEC_DEBUG_28                   = IOMUX_PAD(0x0560, 0x0218, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__AUDMUX_AUD5_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__AUDMUX_AUD5_RXFS                      = IOMUX_PAD(0x0568, 0x0220, 1, 0x0668, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__CCM_OUT1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__CCM_OUT1                              = IOMUX_PAD(0x0568, 0x0220, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__EIM_ADDR20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__EIM_ADDR20                            = IOMUX_PAD(0x044C, 0x01C0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__EIM_ADDR20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__EIM_ADDR20                           = IOMUX_PAD(0x044C, 0x01C0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__ENET2_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__ENET2_1588_EVENT1_OUT                 = IOMUX_PAD(0x0568, 0x0220, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__GPIO2_IO17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__GPIO2_IO17                            = IOMUX_PAD(0x044C, 0x01C0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__GPIO2_IO17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__GPIO2_IO17                           = IOMUX_PAD(0x044C, 0x01C0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__GPIO6_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__GPIO6_IO_0                            = IOMUX_PAD(0x0568, 0x0220, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__GPT2_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__GPT2_COMPARE2                         = IOMUX_PAD(0x044C, 0x01C0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__GPT2_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__GPT2_COMPARE2                        = IOMUX_PAD(0x044C, 0x01C0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__GPT_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__GPT_CLK                               = IOMUX_PAD(0x0568, 0x0220, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__MMDC_DEBUG_45	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__MMDC_DEBUG_45                         = IOMUX_PAD(0x0568, 0x0220, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__SAI2_MCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__SAI2_MCLK                             = IOMUX_PAD(0x044C, 0x01C0, 2, 0x05F0, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__SAI2_MCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__SAI2_MCLK                            = IOMUX_PAD(0x044C, 0x01C0, 2, 0x05F0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__SPDIF_IN                              = IOMUX_PAD(0x044C, 0x01C0, 3, 0x0618, 3/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__SPDIF_IN                             = IOMUX_PAD(0x044C, 0x01C0, 3, 0x0618, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__USB_OTG1_OC                           = IOMUX_PAD(0x044C, 0x01C0, 8, 0x0664, 2/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__USB_OTG1_OC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__USB_OTG1_OC                          = IOMUX_PAD(0x044C, 0x01C0, 8, 0x0664, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__USDHC1_CLK	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_CLK__USDHC1_CLK					= IOMUX_PAD(0x0534, 0x022C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_CLK__USDHC1_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__USDHC1_CLK                            = IOMUX_PAD(0x0568, 0x0220, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__USDHC1_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CLK__USDHC1_CLK                            = IOMUX_PAD(0x044C, 0x01C0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CLK__USDHC1_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CLK__USDHC1_CLK                           = IOMUX_PAD(0x044C, 0x01C0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CLK__VADC_ADC_PROC_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__VADC_ADC_PROC_CLK                     = IOMUX_PAD(0x0568, 0x0220, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__WDOG2_WDOG_B                          = IOMUX_PAD(0x0568, 0x0220, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CLK__WDOG2_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CLK__WDOG2_WDOG_RST_B_DEB                  = IOMUX_PAD(0x0568, 0x0220, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__AUDMUX_AUD5_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__AUDMUX_AUD5_RXC                       = IOMUX_PAD(0x056C, 0x0224, 1, 0x0664, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__CCM_CLKO1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__CCM_CLKO1                             = IOMUX_PAD(0x056C, 0x0224, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__EIM_ADDR19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__EIM_ADDR19                            = IOMUX_PAD(0x0448, 0x01BC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__EIM_ADDR19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__EIM_ADDR19                           = IOMUX_PAD(0x0448, 0x01BC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__ENET2_1588_EVENT1_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__ENET2_1588_EVENT1_IN                  = IOMUX_PAD(0x056C, 0x0224, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__GPIO2_IO16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__GPIO2_IO16                            = IOMUX_PAD(0x0448, 0x01BC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__GPIO2_IO16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__GPIO2_IO16                           = IOMUX_PAD(0x0448, 0x01BC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__GPIO6_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__GPIO6_IO_1                            = IOMUX_PAD(0x056C, 0x0224, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__GPT2_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__GPT2_COMPARE1                         = IOMUX_PAD(0x0448, 0x01BC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__GPT2_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__GPT2_COMPARE1                        = IOMUX_PAD(0x0448, 0x01BC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__GPT_COMPARE1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__GPT_COMPARE1                          = IOMUX_PAD(0x056C, 0x0224, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__MMDC_DEBUG_46	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__MMDC_DEBUG_46                         = IOMUX_PAD(0x056C, 0x0224, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__SAI2_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__SAI2_RX_SYNC                          = IOMUX_PAD(0x0448, 0x01BC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__SAI2_RX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__SAI2_RX_SYNC                         = IOMUX_PAD(0x0448, 0x01BC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__SDMA_EXT_EVENT00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__SDMA_EXT_EVENT00                      = IOMUX_PAD(0x0448, 0x01BC, 6, 0x0610, 2/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__SDMA_EXT_EVENT00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__SDMA_EXT_EVENT00                     = IOMUX_PAD(0x0448, 0x01BC, 6, 0x0610, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__SPDIF_OUT                             = IOMUX_PAD(0x0448, 0x01BC, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__SPDIF_OUT                            = IOMUX_PAD(0x0448, 0x01BC, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__USB_OTG1_PWR                          = IOMUX_PAD(0x0448, 0x01BC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__USB_OTG1_PWR	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__USB_OTG1_PWR                         = IOMUX_PAD(0x0448, 0x01BC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__USDHC1_CMD	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_CMD__USDHC1_CMD					= IOMUX_PAD(0x0538, 0x0230, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_CMD__USDHC1_CMD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__USDHC1_CMD                            = IOMUX_PAD(0x056C, 0x0224, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__USDHC1_CMD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_CMD__USDHC1_CMD                            = IOMUX_PAD(0x0448, 0x01BC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_CMD__USDHC1_CMD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_CMD__USDHC1_CMD                           = IOMUX_PAD(0x0448, 0x01BC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_CMD__VADC_EXT_SYSCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__VADC_EXT_SYSCLK                       = IOMUX_PAD(0x056C, 0x0224, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__WDOG1_WDOG_B                          = IOMUX_PAD(0x056C, 0x0224, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_CMD__WDOG1_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_CMD__WDOG1_WDOG_RST_B_DEB                  = IOMUX_PAD(0x056C, 0x0224, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DAT0__USDHC1_DAT0	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT0__USDHC1_DAT0				= IOMUX_PAD(0x053C, 0x0234, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT1__USDHC1_DAT1	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT1__USDHC1_DAT1				= IOMUX_PAD(0x0540, 0x0238, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT2__USDHC1_DAT2	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT2__USDHC1_DAT2				= IOMUX_PAD(0x0544, 0x023C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT3__USDHC1_DAT3	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT3__USDHC1_DAT3				= IOMUX_PAD(0x0548, 0x0240, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT4__USDHC1_DAT4	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT4__USDHC1_DAT4				= IOMUX_PAD(0x054C, 0x0244, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT5__GPIO_5_9	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT5__GPIO_5_9				= IOMUX_PAD(0x0550, 0x0248, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT5__USDHC1_DAT5	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT5__USDHC1_DAT5				= IOMUX_PAD(0x0550, 0x0248, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT6__USDHC1_DAT6	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT6__USDHC1_DAT6				= IOMUX_PAD(0x0554, 0x024C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DAT7__USDHC1_DAT7	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD1_DAT7__USDHC1_DAT7				= IOMUX_PAD(0x0558, 0x0250, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD1_DATA0__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__ANATOP_OTG1_ID                      = IOMUX_PAD(0x0450, 0x01C4, 8, 0x04B8, 2/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__ANATOP_OTG1_ID                     = IOMUX_PAD(0x0450, 0x01C4, 8, 0x04B8, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__AUDMUX_AUD5_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__AUDMUX_AUD5_RXD                     = IOMUX_PAD(0x0570, 0x0228, 1, 0x065C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__CAAM_WRAPPER_RNG_OSC_OBS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__CAAM_WRAPPER_RNG_OSC_OBS            = IOMUX_PAD(0x0570, 0x0228, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__CCM_OUT2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__CCM_OUT2                            = IOMUX_PAD(0x0570, 0x0228, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__EIM_ADDR21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__EIM_ADDR21                          = IOMUX_PAD(0x0450, 0x01C4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__EIM_ADDR21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__EIM_ADDR21                         = IOMUX_PAD(0x0450, 0x01C4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__ENET1_1588_EVENT1_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__ENET1_1588_EVENT1_IN                = IOMUX_PAD(0x0570, 0x0228, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__FLEXCAN1_TX                         = IOMUX_PAD(0x0450, 0x01C4, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__FLEXCAN1_TX                        = IOMUX_PAD(0x0450, 0x01C4, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__GPIO2_IO18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__GPIO2_IO18                          = IOMUX_PAD(0x0450, 0x01C4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__GPIO2_IO18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__GPIO2_IO18                         = IOMUX_PAD(0x0450, 0x01C4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__GPIO6_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__GPIO6_IO_2                          = IOMUX_PAD(0x0570, 0x0228, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__GPT2_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__GPT2_COMPARE3                       = IOMUX_PAD(0x0450, 0x01C4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__GPT2_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__GPT2_COMPARE3                      = IOMUX_PAD(0x0450, 0x01C4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__GPT_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__GPT_CAPTURE1                        = IOMUX_PAD(0x0570, 0x0228, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__MMDC_DEBUG_48	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__MMDC_DEBUG_48                       = IOMUX_PAD(0x0570, 0x0228, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__SAI2_TX_SYNC                        = IOMUX_PAD(0x0450, 0x01C4, 2, 0x05FC, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__SAI2_TX_SYNC                       = IOMUX_PAD(0x0450, 0x01C4, 2, 0x05FC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__UART2_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__UART2_RX                            = IOMUX_PAD(0x0570, 0x0228, 4, 0x0838, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__USDHC1_DATA0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__USDHC1_DATA0                        = IOMUX_PAD(0x0570, 0x0228, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA0__USDHC1_DATA0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA0__USDHC1_DATA0                        = IOMUX_PAD(0x0450, 0x01C4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA0__USDHC1_DATA0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA0__USDHC1_DATA0                       = IOMUX_PAD(0x0450, 0x01C4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA0__VADC_CLAMP_UP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA0__VADC_CLAMP_UP                       = IOMUX_PAD(0x0570, 0x0228, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__AUDMUX_AUD5_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__AUDMUX_AUD5_TXC                     = IOMUX_PAD(0x0574, 0x022C, 1, 0x066C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__CCM_CLKO2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__CCM_CLKO2                           = IOMUX_PAD(0x0574, 0x022C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__EIM_ADDR22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__EIM_ADDR22                          = IOMUX_PAD(0x0454, 0x01C8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__EIM_ADDR22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__EIM_ADDR22                         = IOMUX_PAD(0x0454, 0x01C8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__ENET1_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__ENET1_1588_EVENT1_OUT               = IOMUX_PAD(0x0574, 0x022C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__FLEXCAN1_RX                         = IOMUX_PAD(0x0454, 0x01C8, 3, 0x0584, 3/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__FLEXCAN1_RX                        = IOMUX_PAD(0x0454, 0x01C8, 3, 0x0584, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__GPIO2_IO19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__GPIO2_IO19                          = IOMUX_PAD(0x0454, 0x01C8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__GPIO2_IO19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__GPIO2_IO19                         = IOMUX_PAD(0x0454, 0x01C8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__GPIO6_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__GPIO6_IO_3                          = IOMUX_PAD(0x0574, 0x022C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__GPT2_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__GPT2_CLK                            = IOMUX_PAD(0x0454, 0x01C8, 1, 0x05A0, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__GPT2_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__GPT2_CLK                           = IOMUX_PAD(0x0454, 0x01C8, 1, 0x05A0, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__GPT_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__GPT_CAPTURE2                        = IOMUX_PAD(0x0574, 0x022C, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__MMDC_DEBUG_47	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__MMDC_DEBUG_47                       = IOMUX_PAD(0x0574, 0x022C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__PWM4_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__PWM4_OUT                            = IOMUX_PAD(0x0574, 0x022C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__SAI2_TX_BCLK                        = IOMUX_PAD(0x0454, 0x01C8, 2, 0x05F8, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__SAI2_TX_BCLK                       = IOMUX_PAD(0x0454, 0x01C8, 2, 0x05F8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__UART2_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__UART2_TX                            = IOMUX_PAD(0x0574, 0x022C, 4, 0x0838, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__USB_OTG2_PWR                        = IOMUX_PAD(0x0454, 0x01C8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__USB_OTG2_PWR	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__USB_OTG2_PWR                       = IOMUX_PAD(0x0454, 0x01C8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__USDHC1_DATA1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__USDHC1_DATA1                        = IOMUX_PAD(0x0574, 0x022C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA1__USDHC1_DATA1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA1__USDHC1_DATA1                        = IOMUX_PAD(0x0454, 0x01C8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA1__USDHC1_DATA1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA1__USDHC1_DATA1                       = IOMUX_PAD(0x0454, 0x01C8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA1__VADC_CLAMP_DOWN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA1__VADC_CLAMP_DOWN                     = IOMUX_PAD(0x0574, 0x022C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS                    = IOMUX_PAD(0x0578, 0x0230, 1, 0x0670, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__CCM_CLKO1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__CCM_CLKO1                           = IOMUX_PAD(0x0458, 0x01CC, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__CCM_CLKO1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__CCM_CLKO1                          = IOMUX_PAD(0x0458, 0x01CC, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__CCM_OUT0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__CCM_OUT0                            = IOMUX_PAD(0x0578, 0x0230, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__ECSPI4_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__ECSPI4_RDY                          = IOMUX_PAD(0x0578, 0x0230, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__EIM_ADDR23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__EIM_ADDR23                          = IOMUX_PAD(0x0458, 0x01CC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__EIM_ADDR23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__EIM_ADDR23                         = IOMUX_PAD(0x0458, 0x01CC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__FLEXCAN2_TX                         = IOMUX_PAD(0x0458, 0x01CC, 3, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__FLEXCAN2_TX                        = IOMUX_PAD(0x0458, 0x01CC, 3, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__GPIO2_IO20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__GPIO2_IO20                          = IOMUX_PAD(0x0458, 0x01CC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__GPIO2_IO20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__GPIO2_IO20                         = IOMUX_PAD(0x0458, 0x01CC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__GPIO6_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__GPIO6_IO_4                          = IOMUX_PAD(0x0578, 0x0230, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__GPT2_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__GPT2_CAPTURE1                       = IOMUX_PAD(0x0458, 0x01CC, 1, 0x0598, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__GPT2_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__GPT2_CAPTURE1                      = IOMUX_PAD(0x0458, 0x01CC, 1, 0x0598, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__GPT_COMPARE2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__GPT_COMPARE2                        = IOMUX_PAD(0x0578, 0x0230, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__PWM3_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__PWM3_OUT                            = IOMUX_PAD(0x0578, 0x0230, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__SAI2_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__SAI2_RX_DATA                        = IOMUX_PAD(0x0458, 0x01CC, 2, 0x05F4, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__SAI2_RX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__SAI2_RX_DATA                       = IOMUX_PAD(0x0458, 0x01CC, 2, 0x05F4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__UART2_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__UART2_CTS_B                         = IOMUX_PAD(0x0578, 0x0230, 4, 0x0834, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__USB_OTG2_OC                         = IOMUX_PAD(0x0458, 0x01CC, 8, 0x0660, 2/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__USB_OTG2_OC	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__USB_OTG2_OC                        = IOMUX_PAD(0x0458, 0x01CC, 8, 0x0660, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__USDHC1_DATA2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__USDHC1_DATA2                        = IOMUX_PAD(0x0578, 0x0230, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA2__USDHC1_DATA2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA2__USDHC1_DATA2                        = IOMUX_PAD(0x0458, 0x01CC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA2__USDHC1_DATA2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA2__USDHC1_DATA2                       = IOMUX_PAD(0x0458, 0x01CC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA2__VADC_EXT_PD_N	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA2__VADC_EXT_PD_N                       = IOMUX_PAD(0x0578, 0x0230, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__ANATOP_OTG2_ID                      = IOMUX_PAD(0x045C, 0x01D0, 8, 0x04BC, 2/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__ANATOP_OTG2_ID	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__ANATOP_OTG2_ID                     = IOMUX_PAD(0x045C, 0x01D0, 8, 0x04BC, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__AUDMUX_AUD5_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__AUDMUX_AUD5_RXD                     = IOMUX_PAD(0x057C, 0x0234, 2, 0x065C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__AUDMUX_AUD5_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__AUDMUX_AUD5_TXD                     = IOMUX_PAD(0x057C, 0x0234, 1, 0x0660, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__CCM_CLKO2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__CCM_CLKO2                           = IOMUX_PAD(0x045C, 0x01D0, 6, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__CCM_CLKO2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__CCM_CLKO2                          = IOMUX_PAD(0x045C, 0x01D0, 6, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__CCM_PMIC_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__CCM_PMIC_RDY                        = IOMUX_PAD(0x057C, 0x0234, 7, 0x069C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__ECSPI4_SS1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__ECSPI4_SS1                          = IOMUX_PAD(0x057C, 0x0234, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__EIM_ADDR24	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__EIM_ADDR24                          = IOMUX_PAD(0x045C, 0x01D0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__EIM_ADDR24	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__EIM_ADDR24                         = IOMUX_PAD(0x045C, 0x01D0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__FLEXCAN2_RX                         = IOMUX_PAD(0x045C, 0x01D0, 3, 0x0588, 3/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__FLEXCAN2_RX                        = IOMUX_PAD(0x045C, 0x01D0, 3, 0x0588, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__GPIO2_IO21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__GPIO2_IO21                          = IOMUX_PAD(0x045C, 0x01D0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__GPIO2_IO21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__GPIO2_IO21                         = IOMUX_PAD(0x045C, 0x01D0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__GPIO6_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__GPIO6_IO_5                          = IOMUX_PAD(0x057C, 0x0234, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__GPT2_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__GPT2_CAPTURE2                       = IOMUX_PAD(0x045C, 0x01D0, 1, 0x059C, 1/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__GPT2_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__GPT2_CAPTURE2                      = IOMUX_PAD(0x045C, 0x01D0, 1, 0x059C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__GPT_COMPARE3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__GPT_COMPARE3                        = IOMUX_PAD(0x057C, 0x0234, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__SAI2_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__SAI2_TX_DATA                        = IOMUX_PAD(0x045C, 0x01D0, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__SAI2_TX_DATA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__SAI2_TX_DATA                       = IOMUX_PAD(0x045C, 0x01D0, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__UART2_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__UART2_RTS_B                         = IOMUX_PAD(0x057C, 0x0234, 4, 0x0834, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__USDHC1_DATA3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__USDHC1_DATA3                        = IOMUX_PAD(0x057C, 0x0234, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD1_DATA3__USDHC1_DATA3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SD1_DATA3__USDHC1_DATA3                        = IOMUX_PAD(0x045C, 0x01D0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SD1_DATA3__USDHC1_DATA3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SD1_DATA3__USDHC1_DATA3                       = IOMUX_PAD(0x045C, 0x01D0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SD1_DATA3__VADC_RST_N	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD1_DATA3__VADC_RST_N                          = IOMUX_PAD(0x057C, 0x0234, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__AUDMUX_AUD6_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__AUDMUX_AUD6_RXFS                      = IOMUX_PAD(0x0580, 0x0238, 1, 0x0680, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__ECSPI4_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__ECSPI4_SCLK                           = IOMUX_PAD(0x0580, 0x0238, 3, 0x0740, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__GPIO6_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__GPIO6_IO_6                            = IOMUX_PAD(0x0580, 0x0238, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__KPP_COL_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__KPP_COL_5                             = IOMUX_PAD(0x0580, 0x0238, 2, 0x07C8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__MLB_SIG	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__MLB_SIG                               = IOMUX_PAD(0x0580, 0x0238, 4, 0x07F0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__MMDC_DEBUG_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__MMDC_DEBUG_29                         = IOMUX_PAD(0x0580, 0x0238, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__MQS_RIGHT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__MQS_RIGHT                             = IOMUX_PAD(0x0580, 0x0238, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_CLK__USDHC2_CLK				= IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_CLK__USDHC2_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__USDHC2_CLK                            = IOMUX_PAD(0x0580, 0x0238, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__VADC_CLAMP_CURRENT_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__VADC_CLAMP_CURRENT_5                  = IOMUX_PAD(0x0580, 0x0238, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CLK__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CLK__WDOG1_WDOG_ANY                        = IOMUX_PAD(0x0580, 0x0238, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__AUDMUX_AUD6_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__AUDMUX_AUD6_RXC                       = IOMUX_PAD(0x0584, 0x023C, 1, 0x067C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__ECSPI4_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__ECSPI4_MOSI                           = IOMUX_PAD(0x0584, 0x023C, 3, 0x0748, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__GPIO6_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__GPIO6_IO_7                            = IOMUX_PAD(0x0584, 0x023C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__KPP_ROW_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__KPP_ROW_5                             = IOMUX_PAD(0x0584, 0x023C, 2, 0x07D4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__MLB_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__MLB_CLK                               = IOMUX_PAD(0x0584, 0x023C, 4, 0x07E8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__MMDC_DEBUG_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__MMDC_DEBUG_30                         = IOMUX_PAD(0x0584, 0x023C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__MQS_LEFT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__MQS_LEFT                              = IOMUX_PAD(0x0584, 0x023C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_CMD__USDHC2_CMD				= IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_CMD__USDHC2_CMD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__USDHC2_CMD                            = IOMUX_PAD(0x0584, 0x023C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__VADC_CLAMP_CURRENT_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__VADC_CLAMP_CURRENT_4                  = IOMUX_PAD(0x0584, 0x023C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_CMD__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_CMD__WDOG3_WDOG_B                          = IOMUX_PAD(0x0584, 0x023C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DAT0__USDHC2_DAT0	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT0__USDHC2_DAT0				= IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT1__USDHC2_DAT1	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT1__USDHC2_DAT1				= IOMUX_PAD(0x0568, 0x0260, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT2__USDHC2_DAT2	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT2__USDHC2_DAT2				= IOMUX_PAD(0x056C, 0x0264, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT3__USDHC2_DAT3	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT3__USDHC2_DAT3				= IOMUX_PAD(0x0570, 0x0268, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT4__USDHC2_DAT4	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT4__USDHC2_DAT4				= IOMUX_PAD(0X0574, 0X026C, 0, 0X0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT5__USDHC2_DAT5	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT5__USDHC2_DAT5				= IOMUX_PAD(0X0578, 0X0270, 0, 0X0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT6__USDHC2_DAT6	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT6__USDHC2_DAT6				= IOMUX_PAD(0X057C, 0X0274, 0, 0X0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT7__GPIO_5_0	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT7__GPIO_5_0					= IOMUX_PAD(0x0580, 0x0278, 5, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DAT7__USDHC2_DAT7	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_DAT7__USDHC2_DAT7				= IOMUX_PAD(0X0580, 0X0278, 0, 0X0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD2_DATA0__AUDMUX_AUD6_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__AUDMUX_AUD6_RXD                     = IOMUX_PAD(0x0588, 0x0240, 1, 0x0674, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__ECSPI4_SS3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__ECSPI4_SS3                          = IOMUX_PAD(0x0588, 0x0240, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__GPIO6_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__GPIO6_IO_8                          = IOMUX_PAD(0x0588, 0x0240, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__I2C4_SDA                            = IOMUX_PAD(0x0588, 0x0240, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__KPP_ROW_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__KPP_ROW_7                           = IOMUX_PAD(0x0588, 0x0240, 2, 0x07DC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__MMDC_DEBUG_50	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__MMDC_DEBUG_50                       = IOMUX_PAD(0x0588, 0x0240, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__PWM1_OUT                            = IOMUX_PAD(0x0588, 0x0240, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__UART4_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__UART4_RX                            = IOMUX_PAD(0x0588, 0x0240, 7, 0x0848, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__USDHC2_DATA0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__USDHC2_DATA0                        = IOMUX_PAD(0x0588, 0x0240, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA0__VADC_CLAMP_CURRENT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA0__VADC_CLAMP_CURRENT_0                = IOMUX_PAD(0x0588, 0x0240, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__AUDMUX_AUD6_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__AUDMUX_AUD6_TXC                     = IOMUX_PAD(0x058C, 0x0244, 1, 0x0684, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__ECSPI4_SS2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__ECSPI4_SS2                          = IOMUX_PAD(0x058C, 0x0244, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__GPIO6_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__GPIO6_IO_9                          = IOMUX_PAD(0x058C, 0x0244, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__I2C4_SCL                            = IOMUX_PAD(0x058C, 0x0244, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__KPP_COL_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__KPP_COL_7                           = IOMUX_PAD(0x058C, 0x0244, 2, 0x07D0, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__MMDC_DEBUG_49	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__MMDC_DEBUG_49                       = IOMUX_PAD(0x058C, 0x0244, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__PWM2_OUT                            = IOMUX_PAD(0x058C, 0x0244, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__UART4_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__UART4_TX                            = IOMUX_PAD(0x058C, 0x0244, 7, 0x0848, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__USDHC2_DATA1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__USDHC2_DATA1                        = IOMUX_PAD(0x058C, 0x0244, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA1__VADC_CLAMP_CURRENT_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA1__VADC_CLAMP_CURRENT_1                = IOMUX_PAD(0x058C, 0x0244, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__AUDMUX_AUD6_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__AUDMUX_AUD6_TXFS                    = IOMUX_PAD(0x0590, 0x0248, 1, 0x0688, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__ECSPI4_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__ECSPI4_SS0                          = IOMUX_PAD(0x0590, 0x0248, 3, 0x074C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__GPIO6_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__GPIO6_IO_10                         = IOMUX_PAD(0x0590, 0x0248, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__KPP_ROW_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__KPP_ROW_6                           = IOMUX_PAD(0x0590, 0x0248, 2, 0x07D8, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__MMDC_DEBUG_32	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__MMDC_DEBUG_32                       = IOMUX_PAD(0x0590, 0x0248, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__SDMA_EXT_EVENT_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__SDMA_EXT_EVENT_0                    = IOMUX_PAD(0x0590, 0x0248, 4, 0x081C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__SPDIF_OUT                           = IOMUX_PAD(0x0590, 0x0248, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__UART6_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__UART6_RX                            = IOMUX_PAD(0x0590, 0x0248, 7, 0x0858, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__USDHC2_DATA2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__USDHC2_DATA2                        = IOMUX_PAD(0x0590, 0x0248, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA2__VADC_CLAMP_CURRENT_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA2__VADC_CLAMP_CURRENT_2                = IOMUX_PAD(0x0590, 0x0248, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__AUDMUX_AUD6_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__AUDMUX_AUD6_TXD                     = IOMUX_PAD(0x0594, 0x024C, 1, 0x0678, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__ECSPI4_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__ECSPI4_MISO                         = IOMUX_PAD(0x0594, 0x024C, 3, 0x0744, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__GPIO6_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__GPIO6_IO_11                         = IOMUX_PAD(0x0594, 0x024C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__KPP_COL_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__KPP_COL_6                           = IOMUX_PAD(0x0594, 0x024C, 2, 0x07CC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__MLB_DATA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__MLB_DATA                            = IOMUX_PAD(0x0594, 0x024C, 4, 0x07EC, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__MMDC_DEBUG_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__MMDC_DEBUG_31                       = IOMUX_PAD(0x0594, 0x024C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__SPDIF_IN                            = IOMUX_PAD(0x0594, 0x024C, 6, 0x0824, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__UART6_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__UART6_TX                            = IOMUX_PAD(0x0594, 0x024C, 7, 0x0858, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__USDHC2_DATA3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__USDHC2_DATA3                        = IOMUX_PAD(0x0594, 0x024C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3                = IOMUX_PAD(0x0594, 0x024C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD2_RST__USDHC2_RST	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD2_RST__USDHC2_RST				= IOMUX_PAD(0x0584, 0x027C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_CLK__AUDMUX_AUD6_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__AUDMUX_AUD6_RXFS                      = IOMUX_PAD(0x0598, 0x0250, 3, 0x0680, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__ECSPI4_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__ECSPI4_SCLK                           = IOMUX_PAD(0x0598, 0x0250, 2, 0x0740, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__GPIO7_IO_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__GPIO7_IO_0                            = IOMUX_PAD(0x0598, 0x0250, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__LCDIF2_BUSY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__LCDIF2_BUSY                           = IOMUX_PAD(0x0598, 0x0250, 6, 0x07E4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__LCDIF2_VSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__LCDIF2_VSYNC                          = IOMUX_PAD(0x0598, 0x0250, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__SDMA_DEBUG_EVENT_CHANNEL_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__SDMA_DEBUG_EVENT_CHANNEL_5            = IOMUX_PAD(0x0598, 0x0250, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__TPSMP_HDATA_29	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__TPSMP_HDATA_29                        = IOMUX_PAD(0x0598, 0x0250, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__UART4_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__UART4_CTS_B                           = IOMUX_PAD(0x0598, 0x0250, 1, 0x0844, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CLK__USDHC3_CLK	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD3_CLK__USDHC3_CLK					= IOMUX_PAD(0x0588, 0x0280, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_CLK__USDHC3_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CLK__USDHC3_CLK                            = IOMUX_PAD(0x0598, 0x0250, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__AUDMUX_AUD6_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__AUDMUX_AUD6_RXC                       = IOMUX_PAD(0x059C, 0x0254, 3, 0x067C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__ECSPI4_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__ECSPI4_MOSI                           = IOMUX_PAD(0x059C, 0x0254, 2, 0x0748, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__GPIO7_IO_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__GPIO7_IO_1                            = IOMUX_PAD(0x059C, 0x0254, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__LCDIF2_HSYNC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__LCDIF2_HSYNC                          = IOMUX_PAD(0x059C, 0x0254, 4, 0x07E4, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__LCDIF2_RS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__LCDIF2_RS                             = IOMUX_PAD(0x059C, 0x0254, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__SDMA_DEBUG_EVENT_CHANNEL_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__SDMA_DEBUG_EVENT_CHANNEL_4            = IOMUX_PAD(0x059C, 0x0254, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__TPSMP_HDATA_28	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__TPSMP_HDATA_28                        = IOMUX_PAD(0x059C, 0x0254, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__UART4_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__UART4_TX                              = IOMUX_PAD(0x059C, 0x0254, 1, 0x0848, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_CMD__USDHC3_CMD	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD3_CMD__USDHC3_CMD					= IOMUX_PAD(0x058C, 0x0284, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_CMD__USDHC3_CMD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_CMD__USDHC3_CMD                            = IOMUX_PAD(0x059C, 0x0254, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DAT0__USDHC3_DAT0	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD3_DAT0__USDHC3_DAT0				= IOMUX_PAD(0x0590, 0x0288, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_DAT1__USDHC3_DAT1	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD3_DAT1__USDHC3_DAT1				= IOMUX_PAD(0x0594, 0x028C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_DAT2__USDHC3_DAT2	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD3_DAT2__USDHC3_DAT2				= IOMUX_PAD(0x0598, 0x0290, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_DAT3__USDHC3_DAT3	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_SD3_DAT3__USDHC3_DAT3				= IOMUX_PAD(0x059C, 0x0294, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_SD3_DATA0__AUDMUX_AUD6_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__AUDMUX_AUD6_RXD                     = IOMUX_PAD(0x05A0, 0x0258, 3, 0x0674, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__DCIC1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__DCIC1_OUT                           = IOMUX_PAD(0x05A0, 0x0258, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__ECSPI2_SS1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__ECSPI2_SS1                          = IOMUX_PAD(0x05A0, 0x0258, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__GPIO7_IO_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__GPIO7_IO_2                          = IOMUX_PAD(0x05A0, 0x0258, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__GPU_DEBUG_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__GPU_DEBUG_0                         = IOMUX_PAD(0x05A0, 0x0258, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__I2C4_SCL                            = IOMUX_PAD(0x05A0, 0x0258, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__LCDIF2_DATA_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__LCDIF2_DATA_1                       = IOMUX_PAD(0x05A0, 0x0258, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__SDMA_DEBUG_EVT_CHN_LINES_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__SDMA_DEBUG_EVT_CHN_LINES_0          = IOMUX_PAD(0x05A0, 0x0258, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__TPSMP_HDATA_30	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__TPSMP_HDATA_30                      = IOMUX_PAD(0x05A0, 0x0258, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA0__USDHC3_DATA0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA0__USDHC3_DATA0                        = IOMUX_PAD(0x05A0, 0x0258, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__AUDMUX_AUD6_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__AUDMUX_AUD6_TXC                     = IOMUX_PAD(0x05A4, 0x025C, 3, 0x0684, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__DCIC2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__DCIC2_OUT                           = IOMUX_PAD(0x05A4, 0x025C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__ECSPI2_SS2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__ECSPI2_SS2                          = IOMUX_PAD(0x05A4, 0x025C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__GPIO7_IO_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__GPIO7_IO_3                          = IOMUX_PAD(0x05A4, 0x025C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__GPU_DEBUG_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__GPU_DEBUG_1                         = IOMUX_PAD(0x05A4, 0x025C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__I2C4_SDA                            = IOMUX_PAD(0x05A4, 0x025C, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__LCDIF2_DATA_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__LCDIF2_DATA_0                       = IOMUX_PAD(0x05A4, 0x025C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__SDMA_DEBUG_EVT_CHN_LINES_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__SDMA_DEBUG_EVT_CHN_LINES_1          = IOMUX_PAD(0x05A4, 0x025C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__TPSMP_HDATA_31	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__TPSMP_HDATA_31                      = IOMUX_PAD(0x05A4, 0x025C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA1__USDHC3_DATA1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA1__USDHC3_DATA1                        = IOMUX_PAD(0x05A4, 0x025C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__AUDMUX_AUD6_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__AUDMUX_AUD6_TXFS                    = IOMUX_PAD(0x05A8, 0x0260, 3, 0x0688, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__ECSPI4_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__ECSPI4_SS0                          = IOMUX_PAD(0x05A8, 0x0260, 2, 0x074C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__GPIO7_IO_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__GPIO7_IO_4                          = IOMUX_PAD(0x05A8, 0x0260, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__GPU_DEBUG_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__GPU_DEBUG_2                         = IOMUX_PAD(0x05A8, 0x0260, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__LCDIF2_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__LCDIF2_CLK                          = IOMUX_PAD(0x05A8, 0x0260, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__LCDIF2_WR_RWN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__LCDIF2_WR_RWN                       = IOMUX_PAD(0x05A8, 0x0260, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__SDMA_DEBUG_EVENT_CHANNEL_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__SDMA_DEBUG_EVENT_CHANNEL_2          = IOMUX_PAD(0x05A8, 0x0260, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__TPSMP_HDATA_26	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__TPSMP_HDATA_26                      = IOMUX_PAD(0x05A8, 0x0260, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__UART4_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__UART4_RTS_B                         = IOMUX_PAD(0x05A8, 0x0260, 1, 0x0844, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA2__USDHC3_DATA2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA2__USDHC3_DATA2                        = IOMUX_PAD(0x05A8, 0x0260, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__AUDMUX_AUD6_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__AUDMUX_AUD6_TXD                     = IOMUX_PAD(0x05AC, 0x0264, 3, 0x0678, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__ECSPI4_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__ECSPI4_MISO                         = IOMUX_PAD(0x05AC, 0x0264, 2, 0x0744, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__GPIO7_IO_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__GPIO7_IO_5                          = IOMUX_PAD(0x05AC, 0x0264, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__GPU_DEBUG_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__GPU_DEBUG_3                         = IOMUX_PAD(0x05AC, 0x0264, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__LCDIF2_ENABLE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__LCDIF2_ENABLE                       = IOMUX_PAD(0x05AC, 0x0264, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__LCDIF2_RD_E	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__LCDIF2_RD_E                         = IOMUX_PAD(0x05AC, 0x0264, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__SDMA_DEBUG_EVENT_CHANNEL_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__SDMA_DEBUG_EVENT_CHANNEL_3          = IOMUX_PAD(0x05AC, 0x0264, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__TPSMP_HDATA_27	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__TPSMP_HDATA_27                      = IOMUX_PAD(0x05AC, 0x0264, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__UART4_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__UART4_RX                            = IOMUX_PAD(0x05AC, 0x0264, 1, 0x0848, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA3__USDHC3_DATA3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA3__USDHC3_DATA3                        = IOMUX_PAD(0x05AC, 0x0264, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__CAN2_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__CAN2_RX                             = IOMUX_PAD(0x05B0, 0x0268, 1, 0x0690, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__CANFD_RX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__CANFD_RX2                           = IOMUX_PAD(0x05B0, 0x0268, 2, 0x0698, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__ENET2_1588_EVENT0_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__ENET2_1588_EVENT0_IN                = IOMUX_PAD(0x05B0, 0x0268, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__GPIO7_IO_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__GPIO7_IO_6                          = IOMUX_PAD(0x05B0, 0x0268, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__GPU_DEBUG_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__GPU_DEBUG_4                         = IOMUX_PAD(0x05B0, 0x0268, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__LCDIF2_DATA_3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__LCDIF2_DATA_3                       = IOMUX_PAD(0x05B0, 0x0268, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__SDMA_DEBUG_BUS_DEVICE_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__SDMA_DEBUG_BUS_DEVICE_0             = IOMUX_PAD(0x05B0, 0x0268, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__TPSMP_HTRANS_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__TPSMP_HTRANS_1                      = IOMUX_PAD(0x05B0, 0x0268, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__UART3_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__UART3_RX                            = IOMUX_PAD(0x05B0, 0x0268, 3, 0x0840, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA4__USDHC3_DATA4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA4__USDHC3_DATA4                        = IOMUX_PAD(0x05B0, 0x0268, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__CAN1_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__CAN1_TX                             = IOMUX_PAD(0x05B4, 0x026C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__CANFD_TX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__CANFD_TX1                           = IOMUX_PAD(0x05B4, 0x026C, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__ENET2_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__ENET2_1588_EVENT0_OUT               = IOMUX_PAD(0x05B4, 0x026C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__GPIO7_IO_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__GPIO7_IO_7                          = IOMUX_PAD(0x05B4, 0x026C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__GPU_DEBUG_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__GPU_DEBUG_5                         = IOMUX_PAD(0x05B4, 0x026C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__LCDIF2_DATA_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__LCDIF2_DATA_2                       = IOMUX_PAD(0x05B4, 0x026C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__SDMA_DEBUG_BUS_DEVICE_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__SDMA_DEBUG_BUS_DEVICE_1             = IOMUX_PAD(0x05B4, 0x026C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__SIM_M_HWRITE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__SIM_M_HWRITE                        = IOMUX_PAD(0x05B4, 0x026C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__UART3_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__UART3_TX                            = IOMUX_PAD(0x05B4, 0x026C, 3, 0x0840, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA5__USDHC3_DATA5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA5__USDHC3_DATA5                        = IOMUX_PAD(0x05B4, 0x026C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__CAN2_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__CAN2_TX                             = IOMUX_PAD(0x05B8, 0x0270, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__CANFD_TX2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__CANFD_TX2                           = IOMUX_PAD(0x05B8, 0x0270, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__ENET1_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__ENET1_1588_EVENT0_OUT               = IOMUX_PAD(0x05B8, 0x0270, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__GPIO7_IO_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__GPIO7_IO_8                          = IOMUX_PAD(0x05B8, 0x0270, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__GPU_DEBUG_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__GPU_DEBUG_7                         = IOMUX_PAD(0x05B8, 0x0270, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__LCDIF2_DATA_4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__LCDIF2_DATA_4                       = IOMUX_PAD(0x05B8, 0x0270, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__SDMA_DEBUG_EVT_CHN_LINES_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__SDMA_DEBUG_EVT_CHN_LINES_7          = IOMUX_PAD(0x05B8, 0x0270, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__TPSMP_HTRANS_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__TPSMP_HTRANS_0                      = IOMUX_PAD(0x05B8, 0x0270, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__UART3_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__UART3_RTS_B                         = IOMUX_PAD(0x05B8, 0x0270, 3, 0x083C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA6__USDHC3_DATA6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA6__USDHC3_DATA6                        = IOMUX_PAD(0x05B8, 0x0270, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__CAN1_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__CAN1_RX                             = IOMUX_PAD(0x05BC, 0x0274, 1, 0x068C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__CANFD_RX1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__CANFD_RX1                           = IOMUX_PAD(0x05BC, 0x0274, 2, 0x0694, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN                = IOMUX_PAD(0x05BC, 0x0274, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__GPIO7_IO_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__GPIO7_IO_9                          = IOMUX_PAD(0x05BC, 0x0274, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__GPU_DEBUG_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__GPU_DEBUG_6                         = IOMUX_PAD(0x05BC, 0x0274, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__LCDIF2_DATA_5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__LCDIF2_DATA_5                       = IOMUX_PAD(0x05BC, 0x0274, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__SDMA_DEBUG_EVT_CHN_LINES_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__SDMA_DEBUG_EVT_CHN_LINES_2          = IOMUX_PAD(0x05BC, 0x0274, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__TPSMP_HDATA_DIR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__TPSMP_HDATA_DIR                     = IOMUX_PAD(0x05BC, 0x0274, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__UART3_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__UART3_CTS_B                         = IOMUX_PAD(0x05BC, 0x0274, 3, 0x083C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD3_DATA7__USDHC3_DATA7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD3_DATA7__USDHC3_DATA7                        = IOMUX_PAD(0x05BC, 0x0274, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__AUDMUX_AUD3_RXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__AUDMUX_AUD3_RXFS                      = IOMUX_PAD(0x05C0, 0x0278, 3, 0x0638, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__ECSPI2_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__ECSPI2_MISO                           = IOMUX_PAD(0x05C0, 0x0278, 2, 0x0724, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__ECSPI3_SS2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__ECSPI3_SS2                            = IOMUX_PAD(0x05C0, 0x0278, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__GPIO6_IO_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__GPIO6_IO_12                           = IOMUX_PAD(0x05C0, 0x0278, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__LCDIF2_DATA_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__LCDIF2_DATA_13                        = IOMUX_PAD(0x05C0, 0x0278, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__RAWNAND_DATA15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__RAWNAND_DATA15                        = IOMUX_PAD(0x05C0, 0x0278, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__SDMA_DEBUG_EVENT_CHANNEL_SEL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__SDMA_DEBUG_EVENT_CHANNEL_SEL          = IOMUX_PAD(0x05C0, 0x0278, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__TPSMP_HDATA_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__TPSMP_HDATA_20                        = IOMUX_PAD(0x05C0, 0x0278, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__USDHC4_CLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__USDHC4_CLK                            = IOMUX_PAD(0x05C0, 0x0278, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CLK__VDEC_DEBUG_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CLK__VDEC_DEBUG_12                         = IOMUX_PAD(0x05C0, 0x0278, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__AUDMUX_AUD3_RXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__AUDMUX_AUD3_RXC                       = IOMUX_PAD(0x05C4, 0x027C, 3, 0x0634, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__ECSPI2_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__ECSPI2_MOSI                           = IOMUX_PAD(0x05C4, 0x027C, 2, 0x0728, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__ECSPI3_SS1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__ECSPI3_SS1                            = IOMUX_PAD(0x05C4, 0x027C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__GPIO6_IO_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__GPIO6_IO_13                           = IOMUX_PAD(0x05C4, 0x027C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__LCDIF2_DATA_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__LCDIF2_DATA_14                        = IOMUX_PAD(0x05C4, 0x027C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__RAWNAND_DATA14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__RAWNAND_DATA14                        = IOMUX_PAD(0x05C4, 0x027C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__SDMA_DEBUG_CORE_RUN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__SDMA_DEBUG_CORE_RUN                   = IOMUX_PAD(0x05C4, 0x027C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__TPSMP_HDATA_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__TPSMP_HDATA_19                        = IOMUX_PAD(0x05C4, 0x027C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__USDHC4_CMD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__USDHC4_CMD                            = IOMUX_PAD(0x05C4, 0x027C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_CMD__VDEC_DEBUG_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_CMD__VDEC_DEBUG_11                         = IOMUX_PAD(0x05C4, 0x027C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__AUDMUX_AUD3_RXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__AUDMUX_AUD3_RXD                     = IOMUX_PAD(0x05C8, 0x0280, 3, 0x062C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__ECSPI2_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__ECSPI2_SS0                          = IOMUX_PAD(0x05C8, 0x0280, 2, 0x072C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__ECSPI3_SS3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__ECSPI3_SS3                          = IOMUX_PAD(0x05C8, 0x0280, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__GPIO6_IO_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__GPIO6_IO_14                         = IOMUX_PAD(0x05C8, 0x0280, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__LCDIF2_DATA_12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__LCDIF2_DATA_12                      = IOMUX_PAD(0x05C8, 0x0280, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__RAWNAND_DATA10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__RAWNAND_DATA10                      = IOMUX_PAD(0x05C8, 0x0280, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__SDMA_DEBUG_MODE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__SDMA_DEBUG_MODE                     = IOMUX_PAD(0x05C8, 0x0280, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__TPSMP_HDATA_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__TPSMP_HDATA_21                      = IOMUX_PAD(0x05C8, 0x0280, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__USDHC4_DATA0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__USDHC4_DATA0                        = IOMUX_PAD(0x05C8, 0x0280, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA0__VDEC_DEBUG_13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA0__VDEC_DEBUG_13                       = IOMUX_PAD(0x05C8, 0x0280, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__AUDMUX_AUD3_TXC	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__AUDMUX_AUD3_TXC                     = IOMUX_PAD(0x05CC, 0x0284, 3, 0x063C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__ECSPI2_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__ECSPI2_SCLK                         = IOMUX_PAD(0x05CC, 0x0284, 2, 0x0720, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__ECSPI3_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__ECSPI3_RDY                          = IOMUX_PAD(0x05CC, 0x0284, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__GPIO6_IO_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__GPIO6_IO_15                         = IOMUX_PAD(0x05CC, 0x0284, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__LCDIF2_DATA_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__LCDIF2_DATA_11                      = IOMUX_PAD(0x05CC, 0x0284, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__RAWNAND_DATA11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__RAWNAND_DATA11                      = IOMUX_PAD(0x05CC, 0x0284, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__SDMA_DEBUG_BUS_ERROR	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__SDMA_DEBUG_BUS_ERROR                = IOMUX_PAD(0x05CC, 0x0284, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__TPSMP_HDATA_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__TPSMP_HDATA_22                      = IOMUX_PAD(0x05CC, 0x0284, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__USDHC4_DATA1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__USDHC4_DATA1                        = IOMUX_PAD(0x05CC, 0x0284, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA1__VDEC_DEBUG_14	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA1__VDEC_DEBUG_14                       = IOMUX_PAD(0x05CC, 0x0284, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__AUDMUX_AUD3_TXFS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__AUDMUX_AUD3_TXFS                    = IOMUX_PAD(0x05D0, 0x0288, 3, 0x0640, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__ECSPI2_SS3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__ECSPI2_SS3                          = IOMUX_PAD(0x05D0, 0x0288, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__GPIO6_IO_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__GPIO6_IO_16                         = IOMUX_PAD(0x05D0, 0x0288, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__I2C2_SDA                            = IOMUX_PAD(0x05D0, 0x0288, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__LCDIF2_DATA_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__LCDIF2_DATA_10                      = IOMUX_PAD(0x05D0, 0x0288, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__RAWNAND_DATA12	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__RAWNAND_DATA12                      = IOMUX_PAD(0x05D0, 0x0288, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__SDMA_DEBUG_BUS_RWB	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__SDMA_DEBUG_BUS_RWB                  = IOMUX_PAD(0x05D0, 0x0288, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__TPSMP_HDATA_23	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__TPSMP_HDATA_23                      = IOMUX_PAD(0x05D0, 0x0288, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__USDHC4_DATA2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__USDHC4_DATA2                        = IOMUX_PAD(0x05D0, 0x0288, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA2__VDEC_DEBUG_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA2__VDEC_DEBUG_15                       = IOMUX_PAD(0x05D0, 0x0288, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__AUDMUX_AUD3_TXD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__AUDMUX_AUD3_TXD                     = IOMUX_PAD(0x05D4, 0x028C, 3, 0x0630, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__ECSPI2_RDY	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__ECSPI2_RDY                          = IOMUX_PAD(0x05D4, 0x028C, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__GPIO6_IO_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__GPIO6_IO_17                         = IOMUX_PAD(0x05D4, 0x028C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__I2C2_SCL                            = IOMUX_PAD(0x05D4, 0x028C, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__LCDIF2_DATA_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__LCDIF2_DATA_9                       = IOMUX_PAD(0x05D4, 0x028C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__RAWNAND_DATA13	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__RAWNAND_DATA13                      = IOMUX_PAD(0x05D4, 0x028C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__SDMA_DEBUG_MATCHED_DMBUS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__SDMA_DEBUG_MATCHED_DMBUS            = IOMUX_PAD(0x05D4, 0x028C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__TPSMP_HDATA_24	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__TPSMP_HDATA_24                      = IOMUX_PAD(0x05D4, 0x028C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__USDHC4_DATA3	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__USDHC4_DATA3                        = IOMUX_PAD(0x05D4, 0x028C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA3__VDEC_DEBUG_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA3__VDEC_DEBUG_16                       = IOMUX_PAD(0x05D4, 0x028C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__ECSPI3_SCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__ECSPI3_SCLK                         = IOMUX_PAD(0x05D8, 0x0290, 3, 0x0730, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__GPIO6_IO_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__GPIO6_IO_18                         = IOMUX_PAD(0x05D8, 0x0290, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__LCDIF2_DATA_8	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__LCDIF2_DATA_8                       = IOMUX_PAD(0x05D8, 0x0290, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__RAWNAND_DATA09	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__RAWNAND_DATA09                      = IOMUX_PAD(0x05D8, 0x0290, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__SDMA_DEBUG_RTBUFFER_WRITE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__SDMA_DEBUG_RTBUFFER_WRITE           = IOMUX_PAD(0x05D8, 0x0290, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__SPDIF_OUT                           = IOMUX_PAD(0x05D8, 0x0290, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__TPSMP_HDATA_16	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__TPSMP_HDATA_16                      = IOMUX_PAD(0x05D8, 0x0290, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__UART5_RX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__UART5_RX                            = IOMUX_PAD(0x05D8, 0x0290, 2, 0x0850, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__USB_OTG_HOST_MODE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__USB_OTG_HOST_MODE                   = IOMUX_PAD(0x05D8, 0x0290, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA4__USDHC4_DATA4	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA4__USDHC4_DATA4                        = IOMUX_PAD(0x05D8, 0x0290, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__ECSPI3_MOSI	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__ECSPI3_MOSI                         = IOMUX_PAD(0x05DC, 0x0294, 3, 0x0738, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__GPIO6_IO_19	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__GPIO6_IO_19                         = IOMUX_PAD(0x05DC, 0x0294, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__LCDIF2_DATA_7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__LCDIF2_DATA_7                       = IOMUX_PAD(0x05DC, 0x0294, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__RAWNAND_CE2_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__RAWNAND_CE2_B                       = IOMUX_PAD(0x05DC, 0x0294, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__SDMA_DEBUG_EVENT_CHANNEL_0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__SDMA_DEBUG_EVENT_CHANNEL_0          = IOMUX_PAD(0x05DC, 0x0294, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__SPDIF_IN                            = IOMUX_PAD(0x05DC, 0x0294, 6, 0x0824, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__TPSMP_HDATA_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__TPSMP_HDATA_17                      = IOMUX_PAD(0x05DC, 0x0294, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__UART5_TX	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__UART5_TX                            = IOMUX_PAD(0x05DC, 0x0294, 2, 0x0850, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__USDHC4_DATA5	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__USDHC4_DATA5                        = IOMUX_PAD(0x05DC, 0x0294, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA5__VDEC_DEBUG_9	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA5__VDEC_DEBUG_9                        = IOMUX_PAD(0x05DC, 0x0294, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__ECSPI3_MISO	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__ECSPI3_MISO                         = IOMUX_PAD(0x05E0, 0x0298, 3, 0x0734, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__GPIO6_IO_20	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__GPIO6_IO_20                         = IOMUX_PAD(0x05E0, 0x0298, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__LCDIF2_DATA_6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__LCDIF2_DATA_6                       = IOMUX_PAD(0x05E0, 0x0298, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__RAWNAND_CE3_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__RAWNAND_CE3_B                       = IOMUX_PAD(0x05E0, 0x0298, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1          = IOMUX_PAD(0x05E0, 0x0298, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__TPSMP_HDATA_18	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__TPSMP_HDATA_18                      = IOMUX_PAD(0x05E0, 0x0298, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__UART5_RTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__UART5_RTS_B                         = IOMUX_PAD(0x05E0, 0x0298, 2, 0x084C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__USDHC4_DATA6	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__USDHC4_DATA6                        = IOMUX_PAD(0x05E0, 0x0298, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__USDHC4_WP	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__USDHC4_WP                           = IOMUX_PAD(0x05E0, 0x0298, 6, 0x0878, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA6__VDEC_DEBUG_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA6__VDEC_DEBUG_10                       = IOMUX_PAD(0x05E0, 0x0298, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__ECSPI3_SS0	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__ECSPI3_SS0                          = IOMUX_PAD(0x05E4, 0x029C, 3, 0x073C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__GPIO6_IO_21	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__GPIO6_IO_21                         = IOMUX_PAD(0x05E4, 0x029C, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__LCDIF2_DATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__LCDIF2_DATA_15                      = IOMUX_PAD(0x05E4, 0x029C, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__RAWNAND_DATA08	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__RAWNAND_DATA08                      = IOMUX_PAD(0x05E4, 0x029C, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__SDMA_DEBUG_YIELD	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__SDMA_DEBUG_YIELD                    = IOMUX_PAD(0x05E4, 0x029C, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__TPSMP_HDATA_15	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__TPSMP_HDATA_15                      = IOMUX_PAD(0x05E4, 0x029C, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__UART5_CTS_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__UART5_CTS_B                         = IOMUX_PAD(0x05E4, 0x029C, 2, 0x084C, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__USB_OTG_PWR_WAKE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__USB_OTG_PWR_WAKE                    = IOMUX_PAD(0x05E4, 0x029C, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__USDHC4_CD_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__USDHC4_CD_B                         = IOMUX_PAD(0x05E4, 0x029C, 6, 0x0874, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_DATA7__USDHC4_DATA7	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_DATA7__USDHC4_DATA7                        = IOMUX_PAD(0x05E4, 0x029C, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__AUDMUX_MCLK	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__AUDMUX_MCLK                       = IOMUX_PAD(0x05E8, 0x02A0, 3, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__GPIO6_IO_22	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__GPIO6_IO_22                       = IOMUX_PAD(0x05E8, 0x02A0, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__LCDIF2_CS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__LCDIF2_CS                         = IOMUX_PAD(0x05E8, 0x02A0, 6, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__LCDIF2_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__LCDIF2_RESET                      = IOMUX_PAD(0x05E8, 0x02A0, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__RAWNAND_DQS	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__RAWNAND_DQS                       = IOMUX_PAD(0x05E8, 0x02A0, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__SDMA_DEBUG_BUS_DEVICE_2	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__SDMA_DEBUG_BUS_DEVICE_2           = IOMUX_PAD(0x05E8, 0x02A0, 9, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__TPSMP_HDATA_25	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__TPSMP_HDATA_25                    = IOMUX_PAD(0x05E8, 0x02A0, 7, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__USDHC4_RESET	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__USDHC4_RESET                      = IOMUX_PAD(0x05E8, 0x02A0, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__USDHC4_RESET_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__USDHC4_RESET_B                    = IOMUX_PAD(0x05E8, 0x02A0, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SD4_RESET_B__VDEC_DEBUG_17	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_SD4_RESET_B__VDEC_DEBUG_17                     = IOMUX_PAD(0x05E8, 0x02A0, 8, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_SNVS_TAMPER0__GPIO5_IO00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER0__GPIO5_IO00                       = IOMUX_PAD(0x02A8, 0x001C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER0__GPIO5_IO00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER0__GPIO5_IO00                       = IOMUX_PAD(0x004C, 0x0008, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER1__GPIO5_IO01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER1__GPIO5_IO01                       = IOMUX_PAD(0x02AC, 0x0020, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER1__GPIO5_IO01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER1__GPIO5_IO01                       = IOMUX_PAD(0x0050, 0x000C, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER2__GPIO5_IO02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER2__GPIO5_IO02                       = IOMUX_PAD(0x02B0, 0x0024, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER2__GPIO5_IO02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER2__GPIO5_IO02                       = IOMUX_PAD(0x0054, 0x0010, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER3__GPIO5_IO03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER3__GPIO5_IO03                       = IOMUX_PAD(0x02B4, 0x0028, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER3__GPIO5_IO03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER3__GPIO5_IO03                       = IOMUX_PAD(0x0058, 0x0014, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER4__GPIO5_IO04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER4__GPIO5_IO04                       = IOMUX_PAD(0x02B8, 0x002C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER4__GPIO5_IO04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER4__GPIO5_IO04                       = IOMUX_PAD(0x005C, 0x0018, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER5__GPIO5_IO05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER5__GPIO5_IO05                       = IOMUX_PAD(0x02BC, 0x0030, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER5__GPIO5_IO05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER5__GPIO5_IO05                       = IOMUX_PAD(0x0060, 0x001C, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER6__GPIO5_IO06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER6__GPIO5_IO06                       = IOMUX_PAD(0x02C0, 0x0034, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER6__GPIO5_IO06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER6__GPIO5_IO06                       = IOMUX_PAD(0x0064, 0x0020, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER7__GPIO5_IO07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER7__GPIO5_IO07                       = IOMUX_PAD(0x02C4, 0x0038, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER7__GPIO5_IO07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER7__GPIO5_IO07                       = IOMUX_PAD(0x0068, 0x0024, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER8__GPIO5_IO08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER8__GPIO5_IO08                       = IOMUX_PAD(0x02C8, 0x003C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER8__GPIO5_IO08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER8__GPIO5_IO08                       = IOMUX_PAD(0x006C, 0x0028, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_SNVS_TAMPER9__GPIO5_IO09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_SNVS_TAMPER9__GPIO5_IO09                       = IOMUX_PAD(0x02CC, 0x0040, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_SNVS_TAMPER9__GPIO5_IO09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_SNVS_TAMPER9__GPIO5_IO09                       = IOMUX_PAD(0x0070, 0x002C, IOMUX_CONFIG/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__CSI_DATA04	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__CSI_DATA04                        = IOMUX_PAD(0x0318, 0x008C, 3, 0x04D8, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__CSI_DATA04	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__CSI_DATA04                       = IOMUX_PAD(0x0318, 0x008C, 3, 0x04D8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__ENET1_RX_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__ENET1_RX_CLK                      = IOMUX_PAD(0x0318, 0x008C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__ENET1_RX_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__ENET1_RX_CLK                     = IOMUX_PAD(0x0318, 0x008C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN              = IOMUX_PAD(0x0318, 0x008C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN             = IOMUX_PAD(0x0318, 0x008C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__GPIO1_IO18	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__GPIO1_IO18                        = IOMUX_PAD(0x0318, 0x008C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__GPIO1_IO18	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__GPIO1_IO18                       = IOMUX_PAD(0x0318, 0x008C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__UART1_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__UART1_DCE_CTS                     = IOMUX_PAD(0x0318, 0x008C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__UART1_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__UART1_DCE_CTS                    = IOMUX_PAD(0x0318, 0x008C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__UART1_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__UART1_DTE_RTS                     = IOMUX_PAD(0x0318, 0x008C, 0, 0x0620, 2/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__UART1_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__UART1_DTE_RTS                    = IOMUX_PAD(0x0318, 0x008C, 0, 0x0620, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__USDHC1_WP                         = IOMUX_PAD(0x0318, 0x008C, 2, 0x066C, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__USDHC1_WP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__USDHC1_WP                        = IOMUX_PAD(0x0318, 0x008C, 2, 0x066C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_CTS_B__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_CTS_B__USDHC2_WP                         = IOMUX_PAD(0x0318, 0x008C, 8, 0x069C, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_CTS_B__USDHC2_WP	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_CTS_B__USDHC2_WP                        = IOMUX_PAD(0x0318, 0x008C, 8, 0x069C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__CSI_DATA05	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__CSI_DATA05                        = IOMUX_PAD(0x031C, 0x0090, 3, 0x04CC, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__CSI_DATA05	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__CSI_DATA05                       = IOMUX_PAD(0x031C, 0x0090, 3, 0x04CC, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__ENET1_TX_ER	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__ENET1_TX_ER                       = IOMUX_PAD(0x031C, 0x0090, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__ENET1_TX_ER	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__ENET1_TX_ER                      = IOMUX_PAD(0x031C, 0x0090, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT             = IOMUX_PAD(0x031C, 0x0090, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT            = IOMUX_PAD(0x031C, 0x0090, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__GPIO1_IO19	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__GPIO1_IO19                        = IOMUX_PAD(0x031C, 0x0090, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__GPIO1_IO19	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__GPIO1_IO19                       = IOMUX_PAD(0x031C, 0x0090, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__UART1_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__UART1_DCE_RTS                     = IOMUX_PAD(0x031C, 0x0090, 0, 0x0620, 3/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__UART1_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__UART1_DCE_RTS                    = IOMUX_PAD(0x031C, 0x0090, 0, 0x0620, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__UART1_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__UART1_DTE_CTS                     = IOMUX_PAD(0x031C, 0x0090, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__UART1_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__UART1_DTE_CTS                    = IOMUX_PAD(0x031C, 0x0090, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__USDHC1_CD_B                       = IOMUX_PAD(0x031C, 0x0090, 2, 0x0668, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__USDHC1_CD_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__USDHC1_CD_B                      = IOMUX_PAD(0x031C, 0x0090, 2, 0x0668, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RTS_B__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RTS_B__USDHC2_CD_B                       = IOMUX_PAD(0x031C, 0x0090, 8, 0x0674, 2/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RTS_B__USDHC2_CD_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RTS_B__USDHC2_CD_B                      = IOMUX_PAD(0x031C, 0x0090, 8, 0x0674, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RXD__UART1_RXD	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_UART1_RXD__UART1_RXD				= IOMUX_PAD(0x05A0, 0x0298, 0, 0x07FC, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_UART1_RX_DATA__CSI_DATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__CSI_DATA03                      = IOMUX_PAD(0x0314, 0x0088, 3, 0x04C8, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__CSI_DATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__CSI_DATA03                     = IOMUX_PAD(0x0314, 0x0088, 3, 0x04C8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__ENET1_RDATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__ENET1_RDATA03                   = IOMUX_PAD(0x0314, 0x0088, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__ENET1_RDATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__ENET1_RDATA03                  = IOMUX_PAD(0x0314, 0x0088, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__GPIO1_IO17	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__GPIO1_IO17                      = IOMUX_PAD(0x0314, 0x0088, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__GPIO1_IO17	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__GPIO1_IO17                     = IOMUX_PAD(0x0314, 0x0088, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__GPT1_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__GPT1_CLK                        = IOMUX_PAD(0x0314, 0x0088, 4, 0x0594, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__GPT1_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__GPT1_CLK                       = IOMUX_PAD(0x0314, 0x0088, 4, 0x0594, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__I2C3_SDA                        = IOMUX_PAD(0x0314, 0x0088, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__I2C3_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__I2C3_SDA                       = IOMUX_PAD(0x0314, 0x0088, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__SPDIF_IN                        = IOMUX_PAD(0x0314, 0x0088, 8, 0x0618, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__SPDIF_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__SPDIF_IN                       = IOMUX_PAD(0x0314, 0x0088, 8, 0x0618, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__UART1_DCE_RX                    = IOMUX_PAD(0x0314, 0x0088, 0, 0x0624, 3/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__UART1_DCE_RX                   = IOMUX_PAD(0x0314, 0x0088, 0, 0x0624, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_RX_DATA__UART1_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_RX_DATA__UART1_DTE_TX                    = IOMUX_PAD(0x0314, 0x0088, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_RX_DATA__UART1_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_RX_DATA__UART1_DTE_TX                   = IOMUX_PAD(0x0314, 0x0088, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TXD__UART1_TXD	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^	MX6_PAD_UART1_TXD__UART1_TXD				= IOMUX_PAD(0x05A4, 0x029C, 0, 0x0000, 0, 0),$/;"	e	enum:__anon7d17a3620103
MX6_PAD_UART1_TX_DATA__CSI_DATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__CSI_DATA02                      = IOMUX_PAD(0x0310, 0x0084, 3, 0x04C4, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__CSI_DATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__CSI_DATA02                     = IOMUX_PAD(0x0310, 0x0084, 3, 0x04C4, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__ENET1_RDATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__ENET1_RDATA02                   = IOMUX_PAD(0x0310, 0x0084, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__ENET1_RDATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__ENET1_RDATA02                  = IOMUX_PAD(0x0310, 0x0084, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__GPIO1_IO16	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__GPIO1_IO16                      = IOMUX_PAD(0x0310, 0x0084, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__GPIO1_IO16	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__GPIO1_IO16                     = IOMUX_PAD(0x0310, 0x0084, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__GPT1_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__GPT1_COMPARE1                   = IOMUX_PAD(0x0310, 0x0084, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__GPT1_COMPARE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__GPT1_COMPARE1                  = IOMUX_PAD(0x0310, 0x0084, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__I2C3_SCL                        = IOMUX_PAD(0x0310, 0x0084, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__I2C3_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__I2C3_SCL                       = IOMUX_PAD(0x0310, 0x0084, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__SPDIF_OUT                       = IOMUX_PAD(0x0310, 0x0084, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__SPDIF_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__SPDIF_OUT                      = IOMUX_PAD(0x0310, 0x0084, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__UART1_DCE_TX                    = IOMUX_PAD(0x0310, 0x0084, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__UART1_DCE_TX                   = IOMUX_PAD(0x0310, 0x0084, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART1_TX_DATA__UART1_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART1_TX_DATA__UART1_DTE_RX                    = IOMUX_PAD(0x0310, 0x0084, 0, 0x0624, 2/;"	e	enum:__anon661085640103
MX6_PAD_UART1_TX_DATA__UART1_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART1_TX_DATA__UART1_DTE_RX                   = IOMUX_PAD(0x0310, 0x0084, 0, 0x0624, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__CSI_DATA08	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__CSI_DATA08                        = IOMUX_PAD(0x0328, 0x009C, 3, 0x04E4, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__CSI_DATA08	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__CSI_DATA08                       = IOMUX_PAD(0x0328, 0x009C, 3, 0x04E4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__ECSPI3_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__ECSPI3_MOSI                       = IOMUX_PAD(0x0328, 0x009C, 8, 0x055C, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__ECSPI3_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__ECSPI3_MOSI                      = IOMUX_PAD(0x0328, 0x009C, 8, 0x055C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__ENET1_CRS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__ENET1_CRS                         = IOMUX_PAD(0x0328, 0x009C, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__ENET1_CRS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__ENET1_CRS                        = IOMUX_PAD(0x0328, 0x009C, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__FLEXCAN2_TX                       = IOMUX_PAD(0x0328, 0x009C, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__FLEXCAN2_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__FLEXCAN2_TX                      = IOMUX_PAD(0x0328, 0x009C, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__GPIO1_IO22	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__GPIO1_IO22                        = IOMUX_PAD(0x0328, 0x009C, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__GPIO1_IO22	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__GPIO1_IO22                       = IOMUX_PAD(0x0328, 0x009C, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__GPT1_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__GPT1_COMPARE2                     = IOMUX_PAD(0x0328, 0x009C, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__GPT1_COMPARE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__GPT1_COMPARE2                    = IOMUX_PAD(0x0328, 0x009C, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__SJC_DE_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__SJC_DE_B                          = IOMUX_PAD(0x0328, 0x009C, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__SJC_DE_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__SJC_DE_B                         = IOMUX_PAD(0x0328, 0x009C, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__UART2_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__UART2_DCE_CTS                     = IOMUX_PAD(0x0328, 0x009C, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__UART2_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__UART2_DCE_CTS                    = IOMUX_PAD(0x0328, 0x009C, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_CTS_B__UART2_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_CTS_B__UART2_DTE_RTS                     = IOMUX_PAD(0x0328, 0x009C, 0, 0x0628, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_CTS_B__UART2_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_CTS_B__UART2_DTE_RTS                    = IOMUX_PAD(0x0328, 0x009C, 0, 0x0628, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__CSI_DATA09	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__CSI_DATA09                        = IOMUX_PAD(0x032C, 0x00A0, 3, 0x04E8, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__CSI_DATA09	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__CSI_DATA09                       = IOMUX_PAD(0x032C, 0x00A0, 3, 0x04E8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__ECSPI3_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__ECSPI3_MISO                       = IOMUX_PAD(0x032C, 0x00A0, 8, 0x0558, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__ECSPI3_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__ECSPI3_MISO                      = IOMUX_PAD(0x032C, 0x00A0, 8, 0x0558, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__ENET1_COL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__ENET1_COL                         = IOMUX_PAD(0x032C, 0x00A0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__ENET1_COL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__ENET1_COL                        = IOMUX_PAD(0x032C, 0x00A0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__FLEXCAN2_RX                       = IOMUX_PAD(0x032C, 0x00A0, 2, 0x0588, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__FLEXCAN2_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__FLEXCAN2_RX                      = IOMUX_PAD(0x032C, 0x00A0, 2, 0x0588, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__GPIO1_IO23	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__GPIO1_IO23                        = IOMUX_PAD(0x032C, 0x00A0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__GPIO1_IO23	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__GPIO1_IO23                       = IOMUX_PAD(0x032C, 0x00A0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__GPT1_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__GPT1_COMPARE3                     = IOMUX_PAD(0x032C, 0x00A0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__GPT1_COMPARE3	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__GPT1_COMPARE3                    = IOMUX_PAD(0x032C, 0x00A0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__SJC_FAIL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__SJC_FAIL                          = IOMUX_PAD(0x032C, 0x00A0, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__SJC_FAIL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__SJC_FAIL                         = IOMUX_PAD(0x032C, 0x00A0, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__UART2_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__UART2_DCE_RTS                     = IOMUX_PAD(0x032C, 0x00A0, 0, 0x0628, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__UART2_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__UART2_DCE_RTS                    = IOMUX_PAD(0x032C, 0x00A0, 0, 0x0628, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RTS_B__UART2_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RTS_B__UART2_DTE_CTS                     = IOMUX_PAD(0x032C, 0x00A0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RTS_B__UART2_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RTS_B__UART2_DTE_CTS                    = IOMUX_PAD(0x032C, 0x00A0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__CSI_DATA07	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__CSI_DATA07                      = IOMUX_PAD(0x0324, 0x0098, 3, 0x04E0, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__CSI_DATA07	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__CSI_DATA07                     = IOMUX_PAD(0x0324, 0x0098, 3, 0x04E0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__ECSPI3_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__ECSPI3_SCLK                     = IOMUX_PAD(0x0324, 0x0098, 8, 0x0554, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__ECSPI3_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__ECSPI3_SCLK                    = IOMUX_PAD(0x0324, 0x0098, 8, 0x0554, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__ENET1_TDATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__ENET1_TDATA03                   = IOMUX_PAD(0x0324, 0x0098, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__ENET1_TDATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__ENET1_TDATA03                  = IOMUX_PAD(0x0324, 0x0098, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__GPIO1_IO21	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__GPIO1_IO21                      = IOMUX_PAD(0x0324, 0x0098, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__GPIO1_IO21	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__GPIO1_IO21                     = IOMUX_PAD(0x0324, 0x0098, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__GPT1_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__GPT1_CAPTURE2                   = IOMUX_PAD(0x0324, 0x0098, 4, 0x0590, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__GPT1_CAPTURE2	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__GPT1_CAPTURE2                  = IOMUX_PAD(0x0324, 0x0098, 4, 0x0590, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__I2C4_SDA                        = IOMUX_PAD(0x0324, 0x0098, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__I2C4_SDA                       = IOMUX_PAD(0x0324, 0x0098, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__SJC_DONE	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__SJC_DONE                        = IOMUX_PAD(0x0324, 0x0098, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__SJC_DONE	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__SJC_DONE                       = IOMUX_PAD(0x0324, 0x0098, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__UART2_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__UART2_DCE_RX                    = IOMUX_PAD(0x0324, 0x0098, 0, 0x062C, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__UART2_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__UART2_DCE_RX                   = IOMUX_PAD(0x0324, 0x0098, 0, 0x062C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_RX_DATA__UART2_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_RX_DATA__UART2_DTE_TX                    = IOMUX_PAD(0x0324, 0x0098, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_RX_DATA__UART2_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_RX_DATA__UART2_DTE_TX                   = IOMUX_PAD(0x0324, 0x0098, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__CSI_DATA06	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__CSI_DATA06                      = IOMUX_PAD(0x0320, 0x0094, 3, 0x04DC, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__CSI_DATA06	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__CSI_DATA06                     = IOMUX_PAD(0x0320, 0x0094, 3, 0x04DC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__ECSPI3_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__ECSPI3_SS0                      = IOMUX_PAD(0x0320, 0x0094, 8, 0x0560, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__ECSPI3_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__ECSPI3_SS0                     = IOMUX_PAD(0x0320, 0x0094, 8, 0x0560, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__ENET1_TDATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__ENET1_TDATA02                   = IOMUX_PAD(0x0320, 0x0094, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__ENET1_TDATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__ENET1_TDATA02                  = IOMUX_PAD(0x0320, 0x0094, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__GPIO1_IO20	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__GPIO1_IO20                      = IOMUX_PAD(0x0320, 0x0094, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__GPIO1_IO20	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__GPIO1_IO20                     = IOMUX_PAD(0x0320, 0x0094, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__GPT1_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__GPT1_CAPTURE1                   = IOMUX_PAD(0x0320, 0x0094, 4, 0x058C, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__GPT1_CAPTURE1	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__GPT1_CAPTURE1                  = IOMUX_PAD(0x0320, 0x0094, 4, 0x058C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__I2C4_SCL                        = IOMUX_PAD(0x0320, 0x0094, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__I2C4_SCL                       = IOMUX_PAD(0x0320, 0x0094, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__UART2_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__UART2_DCE_TX                    = IOMUX_PAD(0x0320, 0x0094, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__UART2_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__UART2_DCE_TX                   = IOMUX_PAD(0x0320, 0x0094, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART2_TX_DATA__UART2_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART2_TX_DATA__UART2_DTE_RX                    = IOMUX_PAD(0x0320, 0x0094, 0, 0x062C, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART2_TX_DATA__UART2_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART2_TX_DATA__UART2_DTE_RX                   = IOMUX_PAD(0x0320, 0x0094, 0, 0x062C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__CSI_DATA10	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__CSI_DATA10                        = IOMUX_PAD(0x0338, 0x00AC, 3, 0x04EC, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__CSI_DATA10	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__CSI_DATA10                       = IOMUX_PAD(0x0338, 0x00AC, 3, 0x04EC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN              = IOMUX_PAD(0x0338, 0x00AC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN             = IOMUX_PAD(0x0338, 0x00AC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__ENET2_RX_CLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__ENET2_RX_CLK                      = IOMUX_PAD(0x0338, 0x00AC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__ENET2_RX_CLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__ENET2_RX_CLK                     = IOMUX_PAD(0x0338, 0x00AC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__EPIT2_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__EPIT2_OUT                         = IOMUX_PAD(0x0338, 0x00AC, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__EPIT2_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__EPIT2_OUT                        = IOMUX_PAD(0x0338, 0x00AC, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__FLEXCAN1_TX                       = IOMUX_PAD(0x0338, 0x00AC, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__FLEXCAN1_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__FLEXCAN1_TX                      = IOMUX_PAD(0x0338, 0x00AC, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__GPIO1_IO26	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__GPIO1_IO26                        = IOMUX_PAD(0x0338, 0x00AC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__GPIO1_IO26	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__GPIO1_IO26                       = IOMUX_PAD(0x0338, 0x00AC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__UART3_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__UART3_DCE_CTS                     = IOMUX_PAD(0x0338, 0x00AC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__UART3_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__UART3_DCE_CTS                    = IOMUX_PAD(0x0338, 0x00AC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_CTS_B__UART3_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_CTS_B__UART3_DTE_RTS                     = IOMUX_PAD(0x0338, 0x00AC, 0, 0x0630, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_CTS_B__UART3_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_CTS_B__UART3_DTE_RTS                    = IOMUX_PAD(0x0338, 0x00AC, 0, 0x0630, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__CSI_DATA11	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__CSI_DATA11                        = IOMUX_PAD(0x033C, 0x00B0, 3, 0x04F0, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__CSI_DATA11	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__CSI_DATA11                       = IOMUX_PAD(0x033C, 0x00B0, 3, 0x04F0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT             = IOMUX_PAD(0x033C, 0x00B0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT            = IOMUX_PAD(0x033C, 0x00B0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__ENET2_TX_ER	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__ENET2_TX_ER                       = IOMUX_PAD(0x033C, 0x00B0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__ENET2_TX_ER	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__ENET2_TX_ER                      = IOMUX_PAD(0x033C, 0x00B0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__FLEXCAN1_RX                       = IOMUX_PAD(0x033C, 0x00B0, 2, 0x0584, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__FLEXCAN1_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__FLEXCAN1_RX                      = IOMUX_PAD(0x033C, 0x00B0, 2, 0x0584, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__GPIO1_IO27	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__GPIO1_IO27                        = IOMUX_PAD(0x033C, 0x00B0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__GPIO1_IO27	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__GPIO1_IO27                       = IOMUX_PAD(0x033C, 0x00B0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__UART3_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__UART3_DCE_RTS                     = IOMUX_PAD(0x033C, 0x00B0, 0, 0x0630, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__UART3_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__UART3_DCE_RTS                    = IOMUX_PAD(0x033C, 0x00B0, 0, 0x0630, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__UART3_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__UART3_DTE_CTS                     = IOMUX_PAD(0x033C, 0x00B0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__UART3_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__UART3_DTE_CTS                    = IOMUX_PAD(0x033C, 0x00B0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RTS_B__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RTS_B__WDOG1_WDOG_B                      = IOMUX_PAD(0x033C, 0x00B0, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RTS_B__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RTS_B__WDOG1_WDOG_B                     = IOMUX_PAD(0x033C, 0x00B0, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__CSI_DATA00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__CSI_DATA00                      = IOMUX_PAD(0x0334, 0x00A8, 3, 0x04D0, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__CSI_DATA00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__CSI_DATA00                     = IOMUX_PAD(0x0334, 0x00A8, 3, 0x04D0, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__ENET2_RDATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__ENET2_RDATA03                   = IOMUX_PAD(0x0334, 0x00A8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__ENET2_RDATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__ENET2_RDATA03                  = IOMUX_PAD(0x0334, 0x00A8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__EPIT1_OUT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__EPIT1_OUT                       = IOMUX_PAD(0x0334, 0x00A8, 8, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__EPIT1_OUT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__EPIT1_OUT                      = IOMUX_PAD(0x0334, 0x00A8, 8, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__GPIO1_IO25	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__GPIO1_IO25                      = IOMUX_PAD(0x0334, 0x00A8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__GPIO1_IO25	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__GPIO1_IO25                     = IOMUX_PAD(0x0334, 0x00A8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__SIM2_PORT0_PD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__SIM2_PORT0_PD                   = IOMUX_PAD(0x0334, 0x00A8, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__SIM2_PORT0_PD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__SIM2_PORT0_PD                  = IOMUX_PAD(0x0334, 0x00A8, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__UART2_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART2_DCE_RTS                   = IOMUX_PAD(0x0334, 0x00A8, 4, 0x0628, 3/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__UART2_DCE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART2_DCE_RTS                  = IOMUX_PAD(0x0334, 0x00A8, 4, 0x0628, 3,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__UART2_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART2_DTE_CTS                   = IOMUX_PAD(0x0334, 0x00A8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__UART2_DTE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART2_DTE_CTS                  = IOMUX_PAD(0x0334, 0x00A8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__UART3_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART3_DCE_RX                    = IOMUX_PAD(0x0334, 0x00A8, 0, 0x0634, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__UART3_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART3_DCE_RX                   = IOMUX_PAD(0x0334, 0x00A8, 0, 0x0634, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_RX_DATA__UART3_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART3_DTE_TX                    = IOMUX_PAD(0x0334, 0x00A8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_RX_DATA__UART3_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_RX_DATA__UART3_DTE_TX                   = IOMUX_PAD(0x0334, 0x00A8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__ANATOP_OTG1_ID                  = IOMUX_PAD(0x0330, 0x00A4, 8, 0x04B8, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__ANATOP_OTG1_ID                 = IOMUX_PAD(0x0330, 0x00A4, 8, 0x04B8, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__CSI_DATA01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__CSI_DATA01                      = IOMUX_PAD(0x0330, 0x00A4, 3, 0x04D4, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__CSI_DATA01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__CSI_DATA01                     = IOMUX_PAD(0x0330, 0x00A4, 3, 0x04D4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__ENET2_RDATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__ENET2_RDATA02                   = IOMUX_PAD(0x0330, 0x00A4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__ENET2_RDATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__ENET2_RDATA02                  = IOMUX_PAD(0x0330, 0x00A4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__GPIO1_IO24	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__GPIO1_IO24                      = IOMUX_PAD(0x0330, 0x00A4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__GPIO1_IO24	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__GPIO1_IO24                     = IOMUX_PAD(0x0330, 0x00A4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__SIM1_PORT0_PD	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__SIM1_PORT0_PD                   = IOMUX_PAD(0x0330, 0x00A4, 2, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__SIM1_PORT0_PD	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__SIM1_PORT0_PD                  = IOMUX_PAD(0x0330, 0x00A4, 2, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__SJC_JTAG_ACT	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__SJC_JTAG_ACT                    = IOMUX_PAD(0x0330, 0x00A4, 7, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__SJC_JTAG_ACT	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__SJC_JTAG_ACT                   = IOMUX_PAD(0x0330, 0x00A4, 7, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__UART2_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART2_DCE_CTS                   = IOMUX_PAD(0x0330, 0x00A4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__UART2_DCE_CTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART2_DCE_CTS                  = IOMUX_PAD(0x0330, 0x00A4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__UART2_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART2_DTE_RTS                   = IOMUX_PAD(0x0330, 0x00A4, 4, 0x0628, 2/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__UART2_DTE_RTS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART2_DTE_RTS                  = IOMUX_PAD(0x0330, 0x00A4, 4, 0x0628, 2,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__UART3_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART3_DCE_TX                    = IOMUX_PAD(0x0330, 0x00A4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__UART3_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART3_DCE_TX                   = IOMUX_PAD(0x0330, 0x00A4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART3_TX_DATA__UART3_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART3_DTE_RX                    = IOMUX_PAD(0x0330, 0x00A4, 0, 0x0634, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART3_TX_DATA__UART3_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART3_TX_DATA__UART3_DTE_RX                   = IOMUX_PAD(0x0330, 0x00A4, 0, 0x0634, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__CSI_DATA13	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__CSI_DATA13                      = IOMUX_PAD(0x0344, 0x00B8, 3, 0x04F8, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__CSI_DATA13	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__CSI_DATA13                     = IOMUX_PAD(0x0344, 0x00B8, 3, 0x04F8, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01             = IOMUX_PAD(0x0344, 0x00B8, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01            = IOMUX_PAD(0x0344, 0x00B8, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__ECSPI2_SS0	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__ECSPI2_SS0                      = IOMUX_PAD(0x0344, 0x00B8, 8, 0x0550, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__ECSPI2_SS0	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__ECSPI2_SS0                     = IOMUX_PAD(0x0344, 0x00B8, 8, 0x0550, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__ENET2_TDATA03	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__ENET2_TDATA03                   = IOMUX_PAD(0x0344, 0x00B8, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__ENET2_TDATA03	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__ENET2_TDATA03                  = IOMUX_PAD(0x0344, 0x00B8, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__GPIO1_IO29	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__GPIO1_IO29                      = IOMUX_PAD(0x0344, 0x00B8, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__GPIO1_IO29	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__GPIO1_IO29                     = IOMUX_PAD(0x0344, 0x00B8, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__I2C1_SDA                        = IOMUX_PAD(0x0344, 0x00B8, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__I2C1_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__I2C1_SDA                       = IOMUX_PAD(0x0344, 0x00B8, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__UART4_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__UART4_DCE_RX                    = IOMUX_PAD(0x0344, 0x00B8, 0, 0x063C, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__UART4_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__UART4_DCE_RX                   = IOMUX_PAD(0x0344, 0x00B8, 0, 0x063C, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_RX_DATA__UART4_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_RX_DATA__UART4_DTE_TX                    = IOMUX_PAD(0x0344, 0x00B8, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_RX_DATA__UART4_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_RX_DATA__UART4_DTE_TX                   = IOMUX_PAD(0x0344, 0x00B8, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__CSI_DATA12	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__CSI_DATA12                      = IOMUX_PAD(0x0340, 0x00B4, 3, 0x04F4, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__CSI_DATA12	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__CSI_DATA12                     = IOMUX_PAD(0x0340, 0x00B4, 3, 0x04F4, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02             = IOMUX_PAD(0x0340, 0x00B4, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02            = IOMUX_PAD(0x0340, 0x00B4, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__ECSPI2_SCLK	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__ECSPI2_SCLK                     = IOMUX_PAD(0x0340, 0x00B4, 8, 0x0544, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__ECSPI2_SCLK	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__ECSPI2_SCLK                    = IOMUX_PAD(0x0340, 0x00B4, 8, 0x0544, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__ENET2_TDATA02	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__ENET2_TDATA02                   = IOMUX_PAD(0x0340, 0x00B4, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__ENET2_TDATA02	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__ENET2_TDATA02                  = IOMUX_PAD(0x0340, 0x00B4, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__GPIO1_IO28	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__GPIO1_IO28                      = IOMUX_PAD(0x0340, 0x00B4, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__GPIO1_IO28	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__GPIO1_IO28                     = IOMUX_PAD(0x0340, 0x00B4, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__I2C1_SCL                        = IOMUX_PAD(0x0340, 0x00B4, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__I2C1_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__I2C1_SCL                       = IOMUX_PAD(0x0340, 0x00B4, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__UART4_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__UART4_DCE_TX                    = IOMUX_PAD(0x0340, 0x00B4, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__UART4_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__UART4_DCE_TX                   = IOMUX_PAD(0x0340, 0x00B4, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART4_TX_DATA__UART4_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART4_TX_DATA__UART4_DTE_RX                    = IOMUX_PAD(0x0340, 0x00B4, 0, 0x063C, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART4_TX_DATA__UART4_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART4_TX_DATA__UART4_DTE_RX                   = IOMUX_PAD(0x0340, 0x00B4, 0, 0x063C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__CSI_DATA15	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__CSI_DATA15                      = IOMUX_PAD(0x034C, 0x00C0, 3, 0x0500, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__CSI_DATA15	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__CSI_DATA15                     = IOMUX_PAD(0x034C, 0x00C0, 3, 0x0500, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB                 = IOMUX_PAD(0x034C, 0x00C0, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB                = IOMUX_PAD(0x034C, 0x00C0, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__ECSPI2_MISO	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__ECSPI2_MISO                     = IOMUX_PAD(0x034C, 0x00C0, 8, 0x0548, 1/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__ECSPI2_MISO	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__ECSPI2_MISO                    = IOMUX_PAD(0x034C, 0x00C0, 8, 0x0548, 1,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__ENET2_COL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__ENET2_COL                       = IOMUX_PAD(0x034C, 0x00C0, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__ENET2_COL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__ENET2_COL                      = IOMUX_PAD(0x034C, 0x00C0, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__GPIO1_IO31	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__GPIO1_IO31                      = IOMUX_PAD(0x034C, 0x00C0, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__GPIO1_IO31	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__GPIO1_IO31                     = IOMUX_PAD(0x034C, 0x00C0, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__I2C2_SDA                        = IOMUX_PAD(0x034C, 0x00C0, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__I2C2_SDA	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__I2C2_SDA                       = IOMUX_PAD(0x034C, 0x00C0, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__UART5_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__UART5_DCE_RX                    = IOMUX_PAD(0x034C, 0x00C0, 0, 0x0644, 5/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__UART5_DCE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__UART5_DCE_RX                   = IOMUX_PAD(0x034C, 0x00C0, 0, 0x0644, 5,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_RX_DATA__UART5_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_RX_DATA__UART5_DTE_TX                    = IOMUX_PAD(0x034C, 0x00C0, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_RX_DATA__UART5_DTE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_RX_DATA__UART5_DTE_TX                   = IOMUX_PAD(0x034C, 0x00C0, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__CSI_DATA14	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__CSI_DATA14                      = IOMUX_PAD(0x0348, 0x00BC, 3, 0x04FC, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__CSI_DATA14	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__CSI_DATA14                     = IOMUX_PAD(0x0348, 0x00BC, 3, 0x04FC, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00             = IOMUX_PAD(0x0348, 0x00BC, 4, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00            = IOMUX_PAD(0x0348, 0x00BC, 4, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__ECSPI2_MOSI	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__ECSPI2_MOSI                     = IOMUX_PAD(0x0348, 0x00BC, 8, 0x054C, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__ECSPI2_MOSI	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__ECSPI2_MOSI                    = IOMUX_PAD(0x0348, 0x00BC, 8, 0x054C, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__ENET2_CRS	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__ENET2_CRS                       = IOMUX_PAD(0x0348, 0x00BC, 1, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__ENET2_CRS	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__ENET2_CRS                      = IOMUX_PAD(0x0348, 0x00BC, 1, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__GPIO1_IO30	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__GPIO1_IO30                      = IOMUX_PAD(0x0348, 0x00BC, 5, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__GPIO1_IO30	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__GPIO1_IO30                     = IOMUX_PAD(0x0348, 0x00BC, 5, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__I2C2_SCL                        = IOMUX_PAD(0x0348, 0x00BC, IOMUX_CONFIG/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__I2C2_SCL	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__I2C2_SCL                       = IOMUX_PAD(0x0348, 0x00BC, IOMUX_CONFIG_/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__UART5_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__UART5_DCE_TX                    = IOMUX_PAD(0x0348, 0x00BC, 0, 0x0000, 0/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__UART5_DCE_TX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__UART5_DCE_TX                   = IOMUX_PAD(0x0348, 0x00BC, 0, 0x0000, 0,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_UART5_TX_DATA__UART5_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^	MX6_PAD_UART5_TX_DATA__UART5_DTE_RX                    = IOMUX_PAD(0x0348, 0x00BC, 0, 0x0644, 4/;"	e	enum:__anon661085640103
MX6_PAD_UART5_TX_DATA__UART5_DTE_RX	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^	MX6_PAD_UART5_TX_DATA__UART5_DTE_RX                   = IOMUX_PAD(0x0348, 0x00BC, 0, 0x0644, 4,/;"	e	enum:__anon1ad2faf00103
MX6_PAD_USB_H_DATA__ANATOP_24M_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_DATA__ANATOP_24M_OUT                     = IOMUX_PAD(0x05EC, 0x02A4, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_DATA__GPIO7_IO_10	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_DATA__GPIO7_IO_10                        = IOMUX_PAD(0x05EC, 0x02A4, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_DATA__I2C4_SDA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_DATA__I2C4_SDA                           = IOMUX_PAD(0x05EC, 0x02A4, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_DATA__PWM2_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_DATA__PWM2_OUT                           = IOMUX_PAD(0x05EC, 0x02A4, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_DATA__USB_H_DATA	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_DATA__USB_H_DATA                         = IOMUX_PAD(0x05EC, 0x02A4, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_DATA__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_DATA__WDOG3_WDOG_B                       = IOMUX_PAD(0x05EC, 0x02A4, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_STROBE__ANATOP_32K_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_STROBE__ANATOP_32K_OUT                   = IOMUX_PAD(0x05F0, 0x02A8, 2, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_STROBE__GPIO7_IO_11	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_STROBE__GPIO7_IO_11                      = IOMUX_PAD(0x05F0, 0x02A8, 5, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_STROBE__I2C4_SCL	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_STROBE__I2C4_SCL                         = IOMUX_PAD(0x05F0, 0x02A8, IOMUX_CONFI/;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_STROBE__PWM1_OUT	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_STROBE__PWM1_OUT                         = IOMUX_PAD(0x05F0, 0x02A8, 1, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_STROBE__USB_H_STROBE	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_STROBE__USB_H_STROBE                     = IOMUX_PAD(0x05F0, 0x02A8, 0, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_PAD_USB_H_STROBE__WDOG3_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^	 MX6_PAD_USB_H_STROBE__WDOG3_WDOG_RST_B_DEB             = IOMUX_PAD(0x05F0, 0x02A8, 4, 0x0000, /;"	e	enum:__anon902d9dee0103
MX6_ROOT_ADDR	drivers/pci/pcie_imx.c	/^#define MX6_ROOT_ADDR	/;"	d	file:
MX6_ROOT_SIZE	drivers/pci/pcie_imx.c	/^#define MX6_ROOT_SIZE	/;"	d	file:
MX6_USBNC_BASEADDR	board/compulab/cm_fx6/cm_fx6.c	/^#define MX6_USBNC_BASEADDR	/;"	d	file:
MX7	arch/arm/cpu/armv7/mx7/Kconfig	/^config MX7$/;"	c
MX7D	arch/arm/cpu/armv7/mx7/Kconfig	/^config MX7D$/;"	c
MX7D_PAD_ECSPI1_MISO__CSI_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__CSI_DATA4 /;"	d
MX7D_PAD_ECSPI1_MISO__CSI_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__CSI_DATA4                          = IOMUX_PAD(0x03E0, 0x0170, 3, 0x0500,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO /;"	d
MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO                        = IOMUX_PAD(0x03E0, 0x0170, 0, 0x0528,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ /;"	d
MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ                       = IOMUX_PAD(0x03E0, 0x0170, 6, 0x057C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MISO__GPIO4_IO18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 /;"	d
MX7D_PAD_ECSPI1_MISO__GPIO4_IO18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__GPIO4_IO18                         = IOMUX_PAD(0x03E0, 0x0170, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MISO__SD2_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__SD2_DATA6 /;"	d
MX7D_PAD_ECSPI1_MISO__SD2_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__SD2_DATA6                          = IOMUX_PAD(0x03E0, 0x0170, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS /;"	d
MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS                      = IOMUX_PAD(0x03E0, 0x0170, 1, 0x0718,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS /;"	d
MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS                      = IOMUX_PAD(0x03E0, 0x0170, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__CSI_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__CSI_DATA3 /;"	d
MX7D_PAD_ECSPI1_MOSI__CSI_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__CSI_DATA3                          = IOMUX_PAD(0x03DC, 0x016C, 3, 0x04FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI /;"	d
MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI                        = IOMUX_PAD(0x03DC, 0x016C, 0, 0x052C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT /;"	d
MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT                      = IOMUX_PAD(0x03DC, 0x016C, 6, 0x0580,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 /;"	d
MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17                         = IOMUX_PAD(0x03DC, 0x016C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__SD2_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__SD2_DATA5 /;"	d
MX7D_PAD_ECSPI1_MOSI__SD2_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__SD2_DATA5                          = IOMUX_PAD(0x03DC, 0x016C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX /;"	d
MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX                       = IOMUX_PAD(0x03DC, 0x016C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX /;"	d
MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX                       = IOMUX_PAD(0x03DC, 0x016C, 1, 0x071C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__CSI_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__CSI_DATA2 /;"	d
MX7D_PAD_ECSPI1_SCLK__CSI_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__CSI_DATA2                          = IOMUX_PAD(0x03D8, 0x0168, 3, 0x04F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK /;"	d
MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK                        = IOMUX_PAD(0x03D8, 0x0168, 0, 0x0524,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM /;"	d
MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM                       = IOMUX_PAD(0x03D8, 0x0168, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 /;"	d
MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16                         = IOMUX_PAD(0x03D8, 0x0168, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__SD2_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__SD2_DATA4 /;"	d
MX7D_PAD_ECSPI1_SCLK__SD2_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__SD2_DATA4                          = IOMUX_PAD(0x03D8, 0x0168, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX /;"	d
MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX                       = IOMUX_PAD(0x03D8, 0x0168, 1, 0x071C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX /;"	d
MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX                       = IOMUX_PAD(0x03D8, 0x0168, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__CSI_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__CSI_DATA5 /;"	d
MX7D_PAD_ECSPI1_SS0__CSI_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__CSI_DATA5                           = IOMUX_PAD(0x03E4, 0x0174, 3, 0x0504,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0 /;"	d
MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0                          = IOMUX_PAD(0x03E4, 0x0174, 0, 0x0530,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3 /;"	d
MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3                      = IOMUX_PAD(0x03E4, 0x0174, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__GPIO4_IO19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 /;"	d
MX7D_PAD_ECSPI1_SS0__GPIO4_IO19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__GPIO4_IO19                          = IOMUX_PAD(0x03E4, 0x0174, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__SD2_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__SD2_DATA7 /;"	d
MX7D_PAD_ECSPI1_SS0__SD2_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__SD2_DATA7                           = IOMUX_PAD(0x03E4, 0x0174, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS /;"	d
MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS                       = IOMUX_PAD(0x03E4, 0x0174, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS /;"	d
MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS                       = IOMUX_PAD(0x03E4, 0x0174, 1, 0x0718,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__CSI_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__CSI_DATA8 /;"	d
MX7D_PAD_ECSPI2_MISO__CSI_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__CSI_DATA8                          = IOMUX_PAD(0x03F0, 0x0180, 3, 0x0510,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO /;"	d
MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO                        = IOMUX_PAD(0x03F0, 0x0180, 0, 0x0538,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2 /;"	d
MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2                     = IOMUX_PAD(0x03F0, 0x0180, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__GPIO4_IO22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 /;"	d
MX7D_PAD_ECSPI2_MISO__GPIO4_IO22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__GPIO4_IO22                         = IOMUX_PAD(0x03F0, 0x0180, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__LCD_DATA15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__LCD_DATA15 /;"	d
MX7D_PAD_ECSPI2_MISO__LCD_DATA15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__LCD_DATA15                         = IOMUX_PAD(0x03F0, 0x0180, 4, 0x0674,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__SD1_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__SD1_DATA6 /;"	d
MX7D_PAD_ECSPI2_MISO__SD1_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__SD1_DATA6                          = IOMUX_PAD(0x03F0, 0x0180, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS /;"	d
MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS                      = IOMUX_PAD(0x03F0, 0x0180, 1, 0x0720,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS /;"	d
MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS                      = IOMUX_PAD(0x03F0, 0x0180, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__CSI_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__CSI_DATA7 /;"	d
MX7D_PAD_ECSPI2_MOSI__CSI_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__CSI_DATA7                          = IOMUX_PAD(0x03EC, 0x017C, 3, 0x050C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI /;"	d
MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI                        = IOMUX_PAD(0x03EC, 0x017C, 0, 0x053C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1 /;"	d
MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1                     = IOMUX_PAD(0x03EC, 0x017C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 /;"	d
MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21                         = IOMUX_PAD(0x03EC, 0x017C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__LCD_DATA14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__LCD_DATA14 /;"	d
MX7D_PAD_ECSPI2_MOSI__LCD_DATA14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__LCD_DATA14                         = IOMUX_PAD(0x03EC, 0x017C, 4, 0x0670,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__SD1_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__SD1_DATA5 /;"	d
MX7D_PAD_ECSPI2_MOSI__SD1_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__SD1_DATA5                          = IOMUX_PAD(0x03EC, 0x017C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX /;"	d
MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX                       = IOMUX_PAD(0x03EC, 0x017C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX /;"	d
MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX                       = IOMUX_PAD(0x03EC, 0x017C, 1, 0x0724,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__CSI_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__CSI_DATA6 /;"	d
MX7D_PAD_ECSPI2_SCLK__CSI_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__CSI_DATA6                          = IOMUX_PAD(0x03E8, 0x0178, 3, 0x0508,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK /;"	d
MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK                        = IOMUX_PAD(0x03E8, 0x0178, 0, 0x0534,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0 /;"	d
MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0                     = IOMUX_PAD(0x03E8, 0x0178, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 /;"	d
MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20                         = IOMUX_PAD(0x03E8, 0x0178, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__LCD_DATA13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__LCD_DATA13 /;"	d
MX7D_PAD_ECSPI2_SCLK__LCD_DATA13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__LCD_DATA13                         = IOMUX_PAD(0x03E8, 0x0178, 4, 0x066C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__SD1_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__SD1_DATA4 /;"	d
MX7D_PAD_ECSPI2_SCLK__SD1_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__SD1_DATA4                          = IOMUX_PAD(0x03E8, 0x0178, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX /;"	d
MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX                       = IOMUX_PAD(0x03E8, 0x0178, 1, 0x0724,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX /;"	d
MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX                       = IOMUX_PAD(0x03E8, 0x0178, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__CSI_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__CSI_DATA9 /;"	d
MX7D_PAD_ECSPI2_SS0__CSI_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__CSI_DATA9                           = IOMUX_PAD(0x03F4, 0x0184, 3, 0x0514,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 /;"	d
MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0                          = IOMUX_PAD(0x03F4, 0x0184, 0, 0x0540,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE /;"	d
MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE                       = IOMUX_PAD(0x03F4, 0x0184, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 /;"	d
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__GPIO4_IO23                          = IOMUX_PAD(0x03F4, 0x0184, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__LCD_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__LCD_RESET /;"	d
MX7D_PAD_ECSPI2_SS0__LCD_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__LCD_RESET                           = IOMUX_PAD(0x03F4, 0x0184, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__SD1_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__SD1_DATA7 /;"	d
MX7D_PAD_ECSPI2_SS0__SD1_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__SD1_DATA7                           = IOMUX_PAD(0x03F4, 0x0184, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS /;"	d
MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS                       = IOMUX_PAD(0x03F4, 0x0184, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS /;"	d
MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS                       = IOMUX_PAD(0x03F4, 0x0184, 1, 0x0720,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__CCM_EXT_CLK4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__CCM_EXT_CLK4 /;"	d
MX7D_PAD_ENET1_COL__CCM_EXT_CLK4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__CCM_EXT_CLK4                         = IOMUX_PAD(0x04D8, 0x0268, 6, 0x04F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__CSU_INT_DEB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__CSU_INT_DEB /;"	d
MX7D_PAD_ENET1_COL__CSU_INT_DEB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__CSU_INT_DEB                          = IOMUX_PAD(0x04D8, 0x0268, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__ENET1_COL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__ENET1_COL /;"	d
MX7D_PAD_ENET1_COL__ENET1_COL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__ENET1_COL                            = IOMUX_PAD(0x04D8, 0x0268, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1 /;"	d
MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1                       = IOMUX_PAD(0x04D8, 0x0268, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__GPIO7_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__GPIO7_IO15 /;"	d
MX7D_PAD_ENET1_COL__GPIO7_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__GPIO7_IO15                           = IOMUX_PAD(0x04D8, 0x0268, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__GPT2_CAPTURE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__GPT2_CAPTURE2 /;"	d
MX7D_PAD_ENET1_COL__GPT2_CAPTURE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__GPT2_CAPTURE2                        = IOMUX_PAD(0x04D8, 0x0268, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__SAI1_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 /;"	d
MX7D_PAD_ENET1_COL__SAI1_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__SAI1_TX_DATA0                        = IOMUX_PAD(0x04D8, 0x0268, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY /;"	d
MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY                       = IOMUX_PAD(0x04D8, 0x0268, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3 /;"	d
MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3                         = IOMUX_PAD(0x04D4, 0x0264, 6, 0x04EC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2 /;"	d
MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2                       = IOMUX_PAD(0x04D4, 0x0264, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__ENET1_CRS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__ENET1_CRS /;"	d
MX7D_PAD_ENET1_CRS__ENET1_CRS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__ENET1_CRS                            = IOMUX_PAD(0x04D4, 0x0264, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0 /;"	d
MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0                       = IOMUX_PAD(0x04D4, 0x0264, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__GPIO7_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__GPIO7_IO14 /;"	d
MX7D_PAD_ENET1_CRS__GPIO7_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__GPIO7_IO14                           = IOMUX_PAD(0x04D4, 0x0264, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1 /;"	d
MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1                        = IOMUX_PAD(0x04D4, 0x0264, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC /;"	d
MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC                         = IOMUX_PAD(0x04D4, 0x0264, 2, 0x06AC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB /;"	d
MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB                 = IOMUX_PAD(0x04D4, 0x0264, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 /;"	d
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0                = IOMUX_PAD(0x049C, 0x022C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0 /;"	d
MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0                     = IOMUX_PAD(0x049C, 0x022C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 /;"	d
MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0                      = IOMUX_PAD(0x049C, 0x022C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL /;"	d
MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL                       = IOMUX_PAD(0x049C, 0x022C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3 /;"	d
MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3                       = IOMUX_PAD(0x049C, 0x022C, 6, 0x0620,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT /;"	d
MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT                       = IOMUX_PAD(0x049C, 0x022C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS /;"	d
MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS                  = IOMUX_PAD(0x049C, 0x022C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS /;"	d
MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS                  = IOMUX_PAD(0x049C, 0x022C, 3, 0x06F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 /;"	d
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1                = IOMUX_PAD(0x04A0, 0x0230, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1 /;"	d
MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1                     = IOMUX_PAD(0x04A0, 0x0230, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 /;"	d
MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1                      = IOMUX_PAD(0x04A0, 0x0230, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA /;"	d
MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA                       = IOMUX_PAD(0x04A0, 0x0230, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3 /;"	d
MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3                       = IOMUX_PAD(0x04A0, 0x0230, 6, 0x0600,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT /;"	d
MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT                       = IOMUX_PAD(0x04A0, 0x0230, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS /;"	d
MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS                  = IOMUX_PAD(0x04A0, 0x0230, 3, 0x06F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS /;"	d
MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS                  = IOMUX_PAD(0x04A0, 0x0230, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK /;"	d
MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK                    = IOMUX_PAD(0x04A4, 0x0234, 2, 0x0534,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 /;"	d
MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2                = IOMUX_PAD(0x04A4, 0x0234, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4 /;"	d
MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4                     = IOMUX_PAD(0x04A4, 0x0234, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX /;"	d
MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX                    = IOMUX_PAD(0x04A4, 0x0234, 1, 0x04DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 /;"	d
MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2                      = IOMUX_PAD(0x04A4, 0x0234, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2 /;"	d
MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2                       = IOMUX_PAD(0x04A4, 0x0234, 6, 0x061C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX /;"	d
MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX                   = IOMUX_PAD(0x04A4, 0x0234, 3, 0x06F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX /;"	d
MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX                   = IOMUX_PAD(0x04A4, 0x0234, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI /;"	d
MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI                    = IOMUX_PAD(0x04A8, 0x0238, 2, 0x053C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 /;"	d
MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3                = IOMUX_PAD(0x04A8, 0x0238, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5 /;"	d
MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5                     = IOMUX_PAD(0x04A8, 0x0238, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX /;"	d
MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX                    = IOMUX_PAD(0x04A8, 0x0238, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 /;"	d
MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3                      = IOMUX_PAD(0x04A8, 0x0238, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2 /;"	d
MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2                       = IOMUX_PAD(0x04A8, 0x0238, 6, 0x05FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX /;"	d
MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX                   = IOMUX_PAD(0x04A8, 0x0238, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX /;"	d
MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX                   = IOMUX_PAD(0x04A8, 0x0238, 3, 0x06F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2 /;"	d
MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2                     = IOMUX_PAD(0x04B0, 0x0240, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC /;"	d
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC                = IOMUX_PAD(0x04B0, 0x0240, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER /;"	d
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER                    = IOMUX_PAD(0x04B0, 0x0240, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7 /;"	d
MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7                     = IOMUX_PAD(0x04B0, 0x0240, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 /;"	d
MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5                      = IOMUX_PAD(0x04B0, 0x0240, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1 /;"	d
MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1                       = IOMUX_PAD(0x04B0, 0x0240, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1 /;"	d
MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1                  = IOMUX_PAD(0x04AC, 0x023C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL /;"	d
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL          = IOMUX_PAD(0x04AC, 0x023C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6 /;"	d
MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6                  = IOMUX_PAD(0x04AC, 0x023C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 /;"	d
MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4                   = IOMUX_PAD(0x04AC, 0x023C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1 /;"	d
MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1                    = IOMUX_PAD(0x04AC, 0x023C, 6, 0x0618,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3 /;"	d
MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3                     = IOMUX_PAD(0x04B4, 0x0244, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 /;"	d
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0                = IOMUX_PAD(0x04B4, 0x0244, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8 /;"	d
MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8                     = IOMUX_PAD(0x04B4, 0x0244, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 /;"	d
MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6                      = IOMUX_PAD(0x04B4, 0x0244, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0 /;"	d
MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0                       = IOMUX_PAD(0x04B4, 0x0244, 6, 0x0614,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT /;"	d
MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT                       = IOMUX_PAD(0x04B4, 0x0244, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY /;"	d
MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY                     = IOMUX_PAD(0x04B8, 0x0248, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 /;"	d
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1                = IOMUX_PAD(0x04B8, 0x0248, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9 /;"	d
MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9                     = IOMUX_PAD(0x04B8, 0x0248, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 /;"	d
MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7                      = IOMUX_PAD(0x04B8, 0x0248, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0 /;"	d
MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0                       = IOMUX_PAD(0x04B8, 0x0248, 6, 0x05F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT /;"	d
MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT                       = IOMUX_PAD(0x04B8, 0x0248, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO /;"	d
MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO                    = IOMUX_PAD(0x04BC, 0x024C, 2, 0x0538,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 /;"	d
MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2                = IOMUX_PAD(0x04BC, 0x024C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED /;"	d
MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED                     = IOMUX_PAD(0x04BC, 0x024C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX /;"	d
MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX                    = IOMUX_PAD(0x04BC, 0x024C, 1, 0x04E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 /;"	d
MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8                      = IOMUX_PAD(0x04BC, 0x024C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL /;"	d
MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL                       = IOMUX_PAD(0x04BC, 0x024C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS /;"	d
MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS               = IOMUX_PAD(0x04C0, 0x0250, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0 /;"	d
MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0                     = IOMUX_PAD(0x04C0, 0x0250, 2, 0x0540,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 /;"	d
MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3                = IOMUX_PAD(0x04C0, 0x0250, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ /;"	d
MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ                     = IOMUX_PAD(0x04C0, 0x0250, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX /;"	d
MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX                    = IOMUX_PAD(0x04C0, 0x0250, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 /;"	d
MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9                      = IOMUX_PAD(0x04C0, 0x0250, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA /;"	d
MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA                       = IOMUX_PAD(0x04C0, 0x0250, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC /;"	d
MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC                = IOMUX_PAD(0x04C8, 0x0258, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER /;"	d
MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER                    = IOMUX_PAD(0x04C8, 0x0258, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3 /;"	d
MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3                 = IOMUX_PAD(0x04C8, 0x0258, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 /;"	d
MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11                     = IOMUX_PAD(0x04C8, 0x0258, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2 /;"	d
MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2                  = IOMUX_PAD(0x04C8, 0x0258, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK /;"	d
MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK                   = IOMUX_PAD(0x04C8, 0x0258, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL /;"	d
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL          = IOMUX_PAD(0x04C4, 0x0254, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2 /;"	d
MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2              = IOMUX_PAD(0x04C4, 0x0254, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 /;"	d
MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10                  = IOMUX_PAD(0x04C4, 0x0254, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1 /;"	d
MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1               = IOMUX_PAD(0x04C4, 0x0254, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC /;"	d
MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC                = IOMUX_PAD(0x04C4, 0x0254, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2 /;"	d
MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2                      = IOMUX_PAD(0x04D0, 0x0260, 6, 0x04E8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1 /;"	d
MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1                    = IOMUX_PAD(0x04D0, 0x0260, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK /;"	d
MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK                      = IOMUX_PAD(0x04D0, 0x0260, 0, 0x056C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE /;"	d
MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE                     = IOMUX_PAD(0x04D0, 0x0260, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 /;"	d
MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13                        = IOMUX_PAD(0x04D0, 0x0260, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__GPT2_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__GPT2_CLK /;"	d
MX7D_PAD_ENET1_RX_CLK__GPT2_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__GPT2_CLK                          = IOMUX_PAD(0x04D0, 0x0260, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK /;"	d
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK                      = IOMUX_PAD(0x04D0, 0x0260, 2, 0x06A8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B /;"	d
MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B                      = IOMUX_PAD(0x04D0, 0x0260, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1 /;"	d
MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1                 = IOMUX_PAD(0x04CC, 0x025C, 1, 0x0564,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1 /;"	d
MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1                      = IOMUX_PAD(0x04CC, 0x025C, 6, 0x04E4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0 /;"	d
MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0                    = IOMUX_PAD(0x04CC, 0x025C, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK /;"	d
MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK                      = IOMUX_PAD(0x04CC, 0x025C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ /;"	d
MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ                      = IOMUX_PAD(0x04CC, 0x025C, 4, 0x057C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 /;"	d
MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12                        = IOMUX_PAD(0x04CC, 0x025C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3 /;"	d
MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3                     = IOMUX_PAD(0x04CC, 0x025C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 /;"	d
MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0                     = IOMUX_PAD(0x04CC, 0x025C, 2, 0x06A0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2 /;"	d
MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2                    = IOMUX_PAD(0x0314, 0x00A4, 3, 0x0570,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__EIM_ADDR22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__EIM_ADDR22 /;"	d
MX7D_PAD_EPDC_BDR0__EIM_ADDR22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__EIM_ADDR22                           = IOMUX_PAD(0x0314, 0x00A4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK /;"	d
MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK                         = IOMUX_PAD(0x0314, 0x00A4, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__EPDC_BDR0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__EPDC_BDR0 /;"	d
MX7D_PAD_EPDC_BDR0__EPDC_BDR0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__EPDC_BDR0                            = IOMUX_PAD(0x0314, 0x00A4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__GPIO2_IO28	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__GPIO2_IO28 /;"	d
MX7D_PAD_EPDC_BDR0__GPIO2_IO28	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__GPIO2_IO28                           = IOMUX_PAD(0x0314, 0x00A4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__LCD_CS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__LCD_CS /;"	d
MX7D_PAD_EPDC_BDR0__LCD_CS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__LCD_CS                               = IOMUX_PAD(0x0314, 0x00A4, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR0__LCD_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR0__LCD_DATA7 /;"	d
MX7D_PAD_EPDC_BDR0__LCD_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR0__LCD_DATA7                            = IOMUX_PAD(0x0314, 0x00A4, 7, 0x0654,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__EIM_AD8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__EIM_AD8 /;"	d
MX7D_PAD_EPDC_BDR1__EIM_AD8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__EIM_AD8                              = IOMUX_PAD(0x0318, 0x00A8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK /;"	d
MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK                         = IOMUX_PAD(0x0318, 0x00A8, 2, 0x0578,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__EPDC_BDR1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__EPDC_BDR1 /;"	d
MX7D_PAD_EPDC_BDR1__EPDC_BDR1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__EPDC_BDR1                            = IOMUX_PAD(0x0318, 0x00A8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN /;"	d
MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN                          = IOMUX_PAD(0x0318, 0x00A8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__GPIO2_IO29	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__GPIO2_IO29 /;"	d
MX7D_PAD_EPDC_BDR1__GPIO2_IO29	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__GPIO2_IO29                           = IOMUX_PAD(0x0318, 0x00A8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__LCD_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__LCD_DATA6 /;"	d
MX7D_PAD_EPDC_BDR1__LCD_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__LCD_DATA6                            = IOMUX_PAD(0x0318, 0x00A8, 7, 0x0650,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_BDR1__LCD_ENABLE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_BDR1__LCD_ENABLE /;"	d
MX7D_PAD_EPDC_BDR1__LCD_ENABLE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_BDR1__LCD_ENABLE                           = IOMUX_PAD(0x0318, 0x00A8, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__EIM_AD0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__EIM_AD0 /;"	d
MX7D_PAD_EPDC_DATA00__EIM_AD0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__EIM_AD0                            = IOMUX_PAD(0x02A4, 0x0034, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__EPDC_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__EPDC_DATA0 /;"	d
MX7D_PAD_EPDC_DATA00__EPDC_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__EPDC_DATA0                         = IOMUX_PAD(0x02A4, 0x0034, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__GPIO2_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__GPIO2_IO0 /;"	d
MX7D_PAD_EPDC_DATA00__GPIO2_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__GPIO2_IO0                          = IOMUX_PAD(0x02A4, 0x0034, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__KPP_ROW3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__KPP_ROW3 /;"	d
MX7D_PAD_EPDC_DATA00__KPP_ROW3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__KPP_ROW3                           = IOMUX_PAD(0x02A4, 0x0034, 3, 0x0620,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__LCD_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__LCD_CLK /;"	d
MX7D_PAD_EPDC_DATA00__LCD_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__LCD_CLK                            = IOMUX_PAD(0x02A4, 0x0034, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__LCD_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__LCD_DATA0 /;"	d
MX7D_PAD_EPDC_DATA00__LCD_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__LCD_DATA0                          = IOMUX_PAD(0x02A4, 0x0034, 6, 0x0638,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 /;"	d
MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0                       = IOMUX_PAD(0x02A4, 0x0034, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD /;"	d
MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD                    = IOMUX_PAD(0x02A4, 0x0034, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__EIM_AD1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__EIM_AD1 /;"	d
MX7D_PAD_EPDC_DATA01__EIM_AD1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__EIM_AD1                            = IOMUX_PAD(0x02A8, 0x0038, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__EPDC_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__EPDC_DATA1 /;"	d
MX7D_PAD_EPDC_DATA01__EPDC_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__EPDC_DATA1                         = IOMUX_PAD(0x02A8, 0x0038, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__GPIO2_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__GPIO2_IO1 /;"	d
MX7D_PAD_EPDC_DATA01__GPIO2_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__GPIO2_IO1                          = IOMUX_PAD(0x02A8, 0x0038, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__KPP_COL3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__KPP_COL3 /;"	d
MX7D_PAD_EPDC_DATA01__KPP_COL3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__KPP_COL3                           = IOMUX_PAD(0x02A8, 0x0038, 3, 0x0600,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__LCD_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__LCD_DATA1 /;"	d
MX7D_PAD_EPDC_DATA01__LCD_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__LCD_DATA1                          = IOMUX_PAD(0x02A8, 0x0038, 6, 0x063C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__LCD_ENABLE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__LCD_ENABLE /;"	d
MX7D_PAD_EPDC_DATA01__LCD_ENABLE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__LCD_ENABLE                         = IOMUX_PAD(0x02A8, 0x0038, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 /;"	d
MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1                       = IOMUX_PAD(0x02A8, 0x0038, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK /;"	d
MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK                     = IOMUX_PAD(0x02A8, 0x0038, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__EIM_AD2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__EIM_AD2 /;"	d
MX7D_PAD_EPDC_DATA02__EIM_AD2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__EIM_AD2                            = IOMUX_PAD(0x02AC, 0x003C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__EPDC_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__EPDC_DATA2 /;"	d
MX7D_PAD_EPDC_DATA02__EPDC_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__EPDC_DATA2                         = IOMUX_PAD(0x02AC, 0x003C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__GPIO2_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__GPIO2_IO2 /;"	d
MX7D_PAD_EPDC_DATA02__GPIO2_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__GPIO2_IO2                          = IOMUX_PAD(0x02AC, 0x003C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__KPP_ROW2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__KPP_ROW2 /;"	d
MX7D_PAD_EPDC_DATA02__KPP_ROW2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__KPP_ROW2                           = IOMUX_PAD(0x02AC, 0x003C, 3, 0x061C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__LCD_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__LCD_DATA2 /;"	d
MX7D_PAD_EPDC_DATA02__LCD_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__LCD_DATA2                          = IOMUX_PAD(0x02AC, 0x003C, 6, 0x0640,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__LCD_VSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__LCD_VSYNC /;"	d
MX7D_PAD_EPDC_DATA02__LCD_VSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__LCD_VSYNC                          = IOMUX_PAD(0x02AC, 0x003C, 7, 0x0698,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 /;"	d
MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2                       = IOMUX_PAD(0x02AC, 0x003C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B /;"	d
MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B                   = IOMUX_PAD(0x02AC, 0x003C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__EIM_AD3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__EIM_AD3 /;"	d
MX7D_PAD_EPDC_DATA03__EIM_AD3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__EIM_AD3                            = IOMUX_PAD(0x02B0, 0x0040, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__EPDC_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__EPDC_DATA3 /;"	d
MX7D_PAD_EPDC_DATA03__EPDC_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__EPDC_DATA3                         = IOMUX_PAD(0x02B0, 0x0040, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__GPIO2_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__GPIO2_IO3 /;"	d
MX7D_PAD_EPDC_DATA03__GPIO2_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__GPIO2_IO3                          = IOMUX_PAD(0x02B0, 0x0040, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__KPP_COL2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__KPP_COL2 /;"	d
MX7D_PAD_EPDC_DATA03__KPP_COL2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__KPP_COL2                           = IOMUX_PAD(0x02B0, 0x0040, 3, 0x05FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__LCD_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__LCD_DATA3 /;"	d
MX7D_PAD_EPDC_DATA03__LCD_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__LCD_DATA3                          = IOMUX_PAD(0x02B0, 0x0040, 6, 0x0644,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__LCD_HSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__LCD_HSYNC /;"	d
MX7D_PAD_EPDC_DATA03__LCD_HSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__LCD_HSYNC                          = IOMUX_PAD(0x02B0, 0x0040, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 /;"	d
MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3                       = IOMUX_PAD(0x02B0, 0x0040, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN /;"	d
MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN                    = IOMUX_PAD(0x02B0, 0x0040, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__EIM_AD4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__EIM_AD4 /;"	d
MX7D_PAD_EPDC_DATA04__EIM_AD4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__EIM_AD4                            = IOMUX_PAD(0x02B4, 0x0044, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__EPDC_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__EPDC_DATA4 /;"	d
MX7D_PAD_EPDC_DATA04__EPDC_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__EPDC_DATA4                         = IOMUX_PAD(0x02B4, 0x0044, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__GPIO2_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__GPIO2_IO4 /;"	d
MX7D_PAD_EPDC_DATA04__GPIO2_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__GPIO2_IO4                          = IOMUX_PAD(0x02B4, 0x0044, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__JTAG_FAIL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__JTAG_FAIL /;"	d
MX7D_PAD_EPDC_DATA04__JTAG_FAIL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__JTAG_FAIL                          = IOMUX_PAD(0x02B4, 0x0044, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__KPP_ROW1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__KPP_ROW1 /;"	d
MX7D_PAD_EPDC_DATA04__KPP_ROW1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__KPP_ROW1                           = IOMUX_PAD(0x02B4, 0x0044, 3, 0x0618,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__LCD_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__LCD_DATA4 /;"	d
MX7D_PAD_EPDC_DATA04__LCD_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__LCD_DATA4                          = IOMUX_PAD(0x02B4, 0x0044, 6, 0x0648,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__QSPI_A_DQS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__QSPI_A_DQS /;"	d
MX7D_PAD_EPDC_DATA04__QSPI_A_DQS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__QSPI_A_DQS                         = IOMUX_PAD(0x02B4, 0x0044, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD /;"	d
MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD                      = IOMUX_PAD(0x02B4, 0x0044, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__EIM_AD5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__EIM_AD5 /;"	d
MX7D_PAD_EPDC_DATA05__EIM_AD5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__EIM_AD5                            = IOMUX_PAD(0x02B8, 0x0048, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__EPDC_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__EPDC_DATA5 /;"	d
MX7D_PAD_EPDC_DATA05__EPDC_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__EPDC_DATA5                         = IOMUX_PAD(0x02B8, 0x0048, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__GPIO2_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__GPIO2_IO5 /;"	d
MX7D_PAD_EPDC_DATA05__GPIO2_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__GPIO2_IO5                          = IOMUX_PAD(0x02B8, 0x0048, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE /;"	d
MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE                        = IOMUX_PAD(0x02B8, 0x0048, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__KPP_COL1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__KPP_COL1 /;"	d
MX7D_PAD_EPDC_DATA05__KPP_COL1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__KPP_COL1                           = IOMUX_PAD(0x02B8, 0x0048, 3, 0x05F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__LCD_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__LCD_DATA5 /;"	d
MX7D_PAD_EPDC_DATA05__LCD_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__LCD_DATA5                          = IOMUX_PAD(0x02B8, 0x0048, 6, 0x064C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK /;"	d
MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK                        = IOMUX_PAD(0x02B8, 0x0048, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD /;"	d
MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD                    = IOMUX_PAD(0x02B8, 0x0048, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__EIM_AD6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__EIM_AD6 /;"	d
MX7D_PAD_EPDC_DATA06__EIM_AD6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__EIM_AD6                            = IOMUX_PAD(0x02BC, 0x004C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__EPDC_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__EPDC_DATA6 /;"	d
MX7D_PAD_EPDC_DATA06__EPDC_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__EPDC_DATA6                         = IOMUX_PAD(0x02BC, 0x004C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__GPIO2_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__GPIO2_IO6 /;"	d
MX7D_PAD_EPDC_DATA06__GPIO2_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__GPIO2_IO6                          = IOMUX_PAD(0x02BC, 0x004C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__JTAG_DE_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__JTAG_DE_B /;"	d
MX7D_PAD_EPDC_DATA06__JTAG_DE_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__JTAG_DE_B                          = IOMUX_PAD(0x02BC, 0x004C, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__KPP_ROW0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__KPP_ROW0 /;"	d
MX7D_PAD_EPDC_DATA06__KPP_ROW0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__KPP_ROW0                           = IOMUX_PAD(0x02BC, 0x004C, 3, 0x0614,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__LCD_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__LCD_DATA6 /;"	d
MX7D_PAD_EPDC_DATA06__LCD_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__LCD_DATA6                          = IOMUX_PAD(0x02BC, 0x004C, 6, 0x0650,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B /;"	d
MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B                       = IOMUX_PAD(0x02BC, 0x004C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK /;"	d
MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK                     = IOMUX_PAD(0x02BC, 0x004C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__EIM_AD7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__EIM_AD7 /;"	d
MX7D_PAD_EPDC_DATA07__EIM_AD7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__EIM_AD7                            = IOMUX_PAD(0x02C0, 0x0050, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__EPDC_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__EPDC_DATA7 /;"	d
MX7D_PAD_EPDC_DATA07__EPDC_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__EPDC_DATA7                         = IOMUX_PAD(0x02C0, 0x0050, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__GPIO2_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__GPIO2_IO7 /;"	d
MX7D_PAD_EPDC_DATA07__GPIO2_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__GPIO2_IO7                          = IOMUX_PAD(0x02C0, 0x0050, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__JTAG_DONE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__JTAG_DONE /;"	d
MX7D_PAD_EPDC_DATA07__JTAG_DONE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__JTAG_DONE                          = IOMUX_PAD(0x02C0, 0x0050, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__KPP_COL0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__KPP_COL0 /;"	d
MX7D_PAD_EPDC_DATA07__KPP_COL0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__KPP_COL0                           = IOMUX_PAD(0x02C0, 0x0050, 3, 0x05F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__LCD_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__LCD_DATA7 /;"	d
MX7D_PAD_EPDC_DATA07__LCD_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__LCD_DATA7                          = IOMUX_PAD(0x02C0, 0x0050, 6, 0x0654,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B /;"	d
MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B                       = IOMUX_PAD(0x02C0, 0x0050, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B /;"	d
MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B                   = IOMUX_PAD(0x02C0, 0x0050, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__EIM_OE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__EIM_OE /;"	d
MX7D_PAD_EPDC_DATA08__EIM_OE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__EIM_OE                             = IOMUX_PAD(0x02C4, 0x0054, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__EPDC_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__EPDC_DATA8 /;"	d
MX7D_PAD_EPDC_DATA08__EPDC_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__EPDC_DATA8                         = IOMUX_PAD(0x02C4, 0x0054, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__EPDC_SDCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__EPDC_SDCLK /;"	d
MX7D_PAD_EPDC_DATA08__EPDC_SDCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__EPDC_SDCLK                         = IOMUX_PAD(0x02C4, 0x0054, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__GPIO2_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__GPIO2_IO8 /;"	d
MX7D_PAD_EPDC_DATA08__GPIO2_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__GPIO2_IO8                          = IOMUX_PAD(0x02C4, 0x0054, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__LCD_BUSY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__LCD_BUSY /;"	d
MX7D_PAD_EPDC_DATA08__LCD_BUSY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__LCD_BUSY                           = IOMUX_PAD(0x02C4, 0x0054, 7, 0x0634,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__LCD_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__LCD_DATA8 /;"	d
MX7D_PAD_EPDC_DATA08__LCD_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__LCD_DATA8                          = IOMUX_PAD(0x02C4, 0x0054, 6, 0x0658,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0 /;"	d
MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0                       = IOMUX_PAD(0x02C4, 0x0054, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD /;"	d
MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD                    = IOMUX_PAD(0x02C4, 0x0054, 1, 0x06E4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__UART6_DCE_RX /;"	d
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__UART6_DCE_RX                       = IOMUX_PAD(0x02C4, 0x0054, 3, 0x071C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA08__UART6_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA08__UART6_DTE_TX /;"	d
MX7D_PAD_EPDC_DATA08__UART6_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA08__UART6_DTE_TX                       = IOMUX_PAD(0x02C4, 0x0054, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__EIM_RW	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__EIM_RW /;"	d
MX7D_PAD_EPDC_DATA09__EIM_RW	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__EIM_RW                             = IOMUX_PAD(0x02C8, 0x0058, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__EPDC_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__EPDC_DATA9 /;"	d
MX7D_PAD_EPDC_DATA09__EPDC_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__EPDC_DATA9                         = IOMUX_PAD(0x02C8, 0x0058, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__EPDC_SDLE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__EPDC_SDLE /;"	d
MX7D_PAD_EPDC_DATA09__EPDC_SDLE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__EPDC_SDLE                          = IOMUX_PAD(0x02C8, 0x0058, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__GPIO2_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__GPIO2_IO9 /;"	d
MX7D_PAD_EPDC_DATA09__GPIO2_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__GPIO2_IO9                          = IOMUX_PAD(0x02C8, 0x0058, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__LCD_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__LCD_DATA0 /;"	d
MX7D_PAD_EPDC_DATA09__LCD_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__LCD_DATA0                          = IOMUX_PAD(0x02C8, 0x0058, 7, 0x0638,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__LCD_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__LCD_DATA9 /;"	d
MX7D_PAD_EPDC_DATA09__LCD_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__LCD_DATA9                          = IOMUX_PAD(0x02C8, 0x0058, 6, 0x065C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1 /;"	d
MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1                       = IOMUX_PAD(0x02C8, 0x0058, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK /;"	d
MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK                     = IOMUX_PAD(0x02C8, 0x0058, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__UART6_DCE_TX /;"	d
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__UART6_DCE_TX                       = IOMUX_PAD(0x02C8, 0x0058, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA09__UART6_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA09__UART6_DTE_RX /;"	d
MX7D_PAD_EPDC_DATA09__UART6_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA09__UART6_DTE_RX                       = IOMUX_PAD(0x02C8, 0x0058, 3, 0x071C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__EIM_CS0_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__EIM_CS0_B /;"	d
MX7D_PAD_EPDC_DATA10__EIM_CS0_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__EIM_CS0_B                          = IOMUX_PAD(0x02CC, 0x005C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__EPDC_DATA10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__EPDC_DATA10 /;"	d
MX7D_PAD_EPDC_DATA10__EPDC_DATA10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__EPDC_DATA10                        = IOMUX_PAD(0x02CC, 0x005C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__EPDC_SDOE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__EPDC_SDOE /;"	d
MX7D_PAD_EPDC_DATA10__EPDC_SDOE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__EPDC_SDOE                          = IOMUX_PAD(0x02CC, 0x005C, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__GPIO2_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__GPIO2_IO10 /;"	d
MX7D_PAD_EPDC_DATA10__GPIO2_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__GPIO2_IO10                         = IOMUX_PAD(0x02CC, 0x005C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__LCD_DATA10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__LCD_DATA10 /;"	d
MX7D_PAD_EPDC_DATA10__LCD_DATA10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__LCD_DATA10                         = IOMUX_PAD(0x02CC, 0x005C, 6, 0x0660,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__LCD_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__LCD_DATA9 /;"	d
MX7D_PAD_EPDC_DATA10__LCD_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__LCD_DATA9                          = IOMUX_PAD(0x02CC, 0x005C, 7, 0x065C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2 /;"	d
MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2                       = IOMUX_PAD(0x02CC, 0x005C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B /;"	d
MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B                   = IOMUX_PAD(0x02CC, 0x005C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS /;"	d
MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS                      = IOMUX_PAD(0x02CC, 0x005C, 3, 0x0718,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS /;"	d
MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS                      = IOMUX_PAD(0x02CC, 0x005C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__EIM_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__EIM_BCLK /;"	d
MX7D_PAD_EPDC_DATA11__EIM_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__EIM_BCLK                           = IOMUX_PAD(0x02D0, 0x0060, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__EPDC_DATA11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__EPDC_DATA11 /;"	d
MX7D_PAD_EPDC_DATA11__EPDC_DATA11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__EPDC_DATA11                        = IOMUX_PAD(0x02D0, 0x0060, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__EPDC_SDCE0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__EPDC_SDCE0 /;"	d
MX7D_PAD_EPDC_DATA11__EPDC_SDCE0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__EPDC_SDCE0                         = IOMUX_PAD(0x02D0, 0x0060, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__GPIO2_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__GPIO2_IO11 /;"	d
MX7D_PAD_EPDC_DATA11__GPIO2_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__GPIO2_IO11                         = IOMUX_PAD(0x02D0, 0x0060, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__LCD_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__LCD_DATA1 /;"	d
MX7D_PAD_EPDC_DATA11__LCD_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__LCD_DATA1                          = IOMUX_PAD(0x02D0, 0x0060, 7, 0x063C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__LCD_DATA11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__LCD_DATA11 /;"	d
MX7D_PAD_EPDC_DATA11__LCD_DATA11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__LCD_DATA11                         = IOMUX_PAD(0x02D0, 0x0060, 6, 0x0664,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3 /;"	d
MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3                       = IOMUX_PAD(0x02D0, 0x0060, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN /;"	d
MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN                    = IOMUX_PAD(0x02D0, 0x0060, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS /;"	d
MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS                      = IOMUX_PAD(0x02D0, 0x0060, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS /;"	d
MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS                      = IOMUX_PAD(0x02D0, 0x0060, 3, 0x0718,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__EIM_LBA_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__EIM_LBA_B /;"	d
MX7D_PAD_EPDC_DATA12__EIM_LBA_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__EIM_LBA_B                          = IOMUX_PAD(0x02D4, 0x0064, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__EPDC_DATA12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__EPDC_DATA12 /;"	d
MX7D_PAD_EPDC_DATA12__EPDC_DATA12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__EPDC_DATA12                        = IOMUX_PAD(0x02D4, 0x0064, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__EPDC_GDCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__EPDC_GDCLK /;"	d
MX7D_PAD_EPDC_DATA12__EPDC_GDCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__EPDC_GDCLK                         = IOMUX_PAD(0x02D4, 0x0064, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__GPIO2_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__GPIO2_IO12 /;"	d
MX7D_PAD_EPDC_DATA12__GPIO2_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__GPIO2_IO12                         = IOMUX_PAD(0x02D4, 0x0064, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__LCD_DATA12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__LCD_DATA12 /;"	d
MX7D_PAD_EPDC_DATA12__LCD_DATA12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__LCD_DATA12                         = IOMUX_PAD(0x02D4, 0x0064, 6, 0x0668,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__LCD_DATA21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__LCD_DATA21 /;"	d
MX7D_PAD_EPDC_DATA12__LCD_DATA21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__LCD_DATA21                         = IOMUX_PAD(0x02D4, 0x0064, 7, 0x068C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__QSPI_B_DQS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__QSPI_B_DQS /;"	d
MX7D_PAD_EPDC_DATA12__QSPI_B_DQS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__QSPI_B_DQS                         = IOMUX_PAD(0x02D4, 0x0064, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD /;"	d
MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD                      = IOMUX_PAD(0x02D4, 0x0064, 1, 0x06E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__UART7_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__UART7_DCE_RX /;"	d
MX7D_PAD_EPDC_DATA12__UART7_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__UART7_DCE_RX                       = IOMUX_PAD(0x02D4, 0x0064, 3, 0x0724,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA12__UART7_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA12__UART7_DTE_TX /;"	d
MX7D_PAD_EPDC_DATA12__UART7_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA12__UART7_DTE_TX                       = IOMUX_PAD(0x02D4, 0x0064, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__EIM_WAIT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__EIM_WAIT /;"	d
MX7D_PAD_EPDC_DATA13__EIM_WAIT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__EIM_WAIT                           = IOMUX_PAD(0x02D8, 0x0068, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__EPDC_DATA13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__EPDC_DATA13 /;"	d
MX7D_PAD_EPDC_DATA13__EPDC_DATA13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__EPDC_DATA13                        = IOMUX_PAD(0x02D8, 0x0068, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__EPDC_GDOE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__EPDC_GDOE /;"	d
MX7D_PAD_EPDC_DATA13__EPDC_GDOE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__EPDC_GDOE                          = IOMUX_PAD(0x02D8, 0x0068, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__GPIO2_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__GPIO2_IO13 /;"	d
MX7D_PAD_EPDC_DATA13__GPIO2_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__GPIO2_IO13                         = IOMUX_PAD(0x02D8, 0x0068, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__LCD_CS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__LCD_CS /;"	d
MX7D_PAD_EPDC_DATA13__LCD_CS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__LCD_CS                             = IOMUX_PAD(0x02D8, 0x0068, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__LCD_DATA13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__LCD_DATA13 /;"	d
MX7D_PAD_EPDC_DATA13__LCD_DATA13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__LCD_DATA13                         = IOMUX_PAD(0x02D8, 0x0068, 6, 0x066C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK /;"	d
MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK                        = IOMUX_PAD(0x02D8, 0x0068, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD /;"	d
MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD                    = IOMUX_PAD(0x02D8, 0x0068, 1, 0x06EC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__UART7_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__UART7_DCE_TX /;"	d
MX7D_PAD_EPDC_DATA13__UART7_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__UART7_DCE_TX                       = IOMUX_PAD(0x02D8, 0x0068, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA13__UART7_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA13__UART7_DTE_RX /;"	d
MX7D_PAD_EPDC_DATA13__UART7_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA13__UART7_DTE_RX                       = IOMUX_PAD(0x02D8, 0x0068, 3, 0x0724,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__EIM_EB_B0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__EIM_EB_B0 /;"	d
MX7D_PAD_EPDC_DATA14__EIM_EB_B0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__EIM_EB_B0                          = IOMUX_PAD(0x02DC, 0x006C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__EPDC_DATA14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__EPDC_DATA14 /;"	d
MX7D_PAD_EPDC_DATA14__EPDC_DATA14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__EPDC_DATA14                        = IOMUX_PAD(0x02DC, 0x006C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__EPDC_GDSP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__EPDC_GDSP /;"	d
MX7D_PAD_EPDC_DATA14__EPDC_GDSP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__EPDC_GDSP                          = IOMUX_PAD(0x02DC, 0x006C, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__GPIO2_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__GPIO2_IO14 /;"	d
MX7D_PAD_EPDC_DATA14__GPIO2_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__GPIO2_IO14                         = IOMUX_PAD(0x02DC, 0x006C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__LCD_DATA14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__LCD_DATA14 /;"	d
MX7D_PAD_EPDC_DATA14__LCD_DATA14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__LCD_DATA14                         = IOMUX_PAD(0x02DC, 0x006C, 6, 0x0670,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__LCD_DATA22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__LCD_DATA22 /;"	d
MX7D_PAD_EPDC_DATA14__LCD_DATA22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__LCD_DATA22                         = IOMUX_PAD(0x02DC, 0x006C, 7, 0x0690,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B /;"	d
MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B                       = IOMUX_PAD(0x02DC, 0x006C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK /;"	d
MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK                     = IOMUX_PAD(0x02DC, 0x006C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS /;"	d
MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS                      = IOMUX_PAD(0x02DC, 0x006C, 3, 0x0720,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS /;"	d
MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS                      = IOMUX_PAD(0x02DC, 0x006C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__EIM_CS1_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__EIM_CS1_B /;"	d
MX7D_PAD_EPDC_DATA15__EIM_CS1_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__EIM_CS1_B                          = IOMUX_PAD(0x02E0, 0x0070, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__EPDC_DATA15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__EPDC_DATA15 /;"	d
MX7D_PAD_EPDC_DATA15__EPDC_DATA15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__EPDC_DATA15                        = IOMUX_PAD(0x02E0, 0x0070, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM /;"	d
MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM                       = IOMUX_PAD(0x02E0, 0x0070, 8, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__GPIO2_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__GPIO2_IO15 /;"	d
MX7D_PAD_EPDC_DATA15__GPIO2_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__GPIO2_IO15                         = IOMUX_PAD(0x02E0, 0x0070, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__LCD_DATA15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__LCD_DATA15 /;"	d
MX7D_PAD_EPDC_DATA15__LCD_DATA15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__LCD_DATA15                         = IOMUX_PAD(0x02E0, 0x0070, 6, 0x0674,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__LCD_WR_RWN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__LCD_WR_RWN /;"	d
MX7D_PAD_EPDC_DATA15__LCD_WR_RWN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__LCD_WR_RWN                         = IOMUX_PAD(0x02E0, 0x0070, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B /;"	d
MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B                       = IOMUX_PAD(0x02E0, 0x0070, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B /;"	d
MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B                   = IOMUX_PAD(0x02E0, 0x0070, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS /;"	d
MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS                      = IOMUX_PAD(0x02E0, 0x0070, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS /;"	d
MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS                      = IOMUX_PAD(0x02E0, 0x0070, 3, 0x0720,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__EIM_ADDR18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__EIM_ADDR18 /;"	d
MX7D_PAD_EPDC_GDCLK__EIM_ADDR18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__EIM_ADDR18                          = IOMUX_PAD(0x0304, 0x0094, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 /;"	d
MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2                     = IOMUX_PAD(0x0304, 0x0094, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK /;"	d
MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK                          = IOMUX_PAD(0x0304, 0x0094, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0 /;"	d
MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0                      = IOMUX_PAD(0x0304, 0x0094, 1, 0x05AC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__GPIO2_IO24	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 /;"	d
MX7D_PAD_EPDC_GDCLK__GPIO2_IO24	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__GPIO2_IO24                          = IOMUX_PAD(0x0304, 0x0094, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__KPP_COL7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__KPP_COL7 /;"	d
MX7D_PAD_EPDC_GDCLK__KPP_COL7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__KPP_COL7                            = IOMUX_PAD(0x0304, 0x0094, 3, 0x0610,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__LCD_DATA16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__LCD_DATA16 /;"	d
MX7D_PAD_EPDC_GDCLK__LCD_DATA16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__LCD_DATA16                          = IOMUX_PAD(0x0304, 0x0094, 7, 0x0678,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDCLK__LCD_DATA23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDCLK__LCD_DATA23 /;"	d
MX7D_PAD_EPDC_GDCLK__LCD_DATA23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDCLK__LCD_DATA23                          = IOMUX_PAD(0x0304, 0x0094, 6, 0x0694,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__EIM_ADDR19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__EIM_ADDR19 /;"	d
MX7D_PAD_EPDC_GDOE__EIM_ADDR19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__EIM_ADDR19                           = IOMUX_PAD(0x0308, 0x0098, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 /;"	d
MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3                      = IOMUX_PAD(0x0308, 0x0098, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__EPDC_GDOE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__EPDC_GDOE /;"	d
MX7D_PAD_EPDC_GDOE__EPDC_GDOE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__EPDC_GDOE                            = IOMUX_PAD(0x0308, 0x0098, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1 /;"	d
MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1                       = IOMUX_PAD(0x0308, 0x0098, 1, 0x05B0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__GPIO2_IO25	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__GPIO2_IO25 /;"	d
MX7D_PAD_EPDC_GDOE__GPIO2_IO25	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__GPIO2_IO25                           = IOMUX_PAD(0x0308, 0x0098, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__KPP_ROW7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__KPP_ROW7 /;"	d
MX7D_PAD_EPDC_GDOE__KPP_ROW7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__KPP_ROW7                             = IOMUX_PAD(0x0308, 0x0098, 3, 0x0630,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__LCD_DATA18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__LCD_DATA18 /;"	d
MX7D_PAD_EPDC_GDOE__LCD_DATA18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__LCD_DATA18                           = IOMUX_PAD(0x0308, 0x0098, 7, 0x0680,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDOE__LCD_WR_RWN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDOE__LCD_WR_RWN /;"	d
MX7D_PAD_EPDC_GDOE__LCD_WR_RWN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDOE__LCD_WR_RWN                           = IOMUX_PAD(0x0308, 0x0098, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__EIM_ADDR20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__EIM_ADDR20 /;"	d
MX7D_PAD_EPDC_GDRL__EIM_ADDR20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__EIM_ADDR20                           = IOMUX_PAD(0x030C, 0x009C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL /;"	d
MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL                   = IOMUX_PAD(0x030C, 0x009C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__EPDC_GDRL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__EPDC_GDRL /;"	d
MX7D_PAD_EPDC_GDRL__EPDC_GDRL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__EPDC_GDRL                            = IOMUX_PAD(0x030C, 0x009C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2 /;"	d
MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2                       = IOMUX_PAD(0x030C, 0x009C, 1, 0x05B4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__GPIO2_IO26	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__GPIO2_IO26 /;"	d
MX7D_PAD_EPDC_GDRL__GPIO2_IO26	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__GPIO2_IO26                           = IOMUX_PAD(0x030C, 0x009C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__LCD_DATA19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__LCD_DATA19 /;"	d
MX7D_PAD_EPDC_GDRL__LCD_DATA19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__LCD_DATA19                           = IOMUX_PAD(0x030C, 0x009C, 7, 0x0684,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDRL__LCD_RD_E	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDRL__LCD_RD_E /;"	d
MX7D_PAD_EPDC_GDRL__LCD_RD_E	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDRL__LCD_RD_E                             = IOMUX_PAD(0x030C, 0x009C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__EIM_ADDR21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__EIM_ADDR21 /;"	d
MX7D_PAD_EPDC_GDSP__EIM_ADDR21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__EIM_ADDR21                           = IOMUX_PAD(0x0310, 0x00A0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC /;"	d
MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC                      = IOMUX_PAD(0x0310, 0x00A0, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__ENET2_TX_ER	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__ENET2_TX_ER /;"	d
MX7D_PAD_EPDC_GDSP__ENET2_TX_ER	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__ENET2_TX_ER                          = IOMUX_PAD(0x0310, 0x00A0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__EPDC_GDSP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__EPDC_GDSP /;"	d
MX7D_PAD_EPDC_GDSP__EPDC_GDSP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__EPDC_GDSP                            = IOMUX_PAD(0x0310, 0x00A0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3 /;"	d
MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3                       = IOMUX_PAD(0x0310, 0x00A0, 1, 0x05B8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__GPIO2_IO27	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__GPIO2_IO27 /;"	d
MX7D_PAD_EPDC_GDSP__GPIO2_IO27	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__GPIO2_IO27                           = IOMUX_PAD(0x0310, 0x00A0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__LCD_BUSY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__LCD_BUSY /;"	d
MX7D_PAD_EPDC_GDSP__LCD_BUSY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__LCD_BUSY                             = IOMUX_PAD(0x0310, 0x00A0, 6, 0x0634,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_GDSP__LCD_DATA17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_GDSP__LCD_DATA17 /;"	d
MX7D_PAD_EPDC_GDSP__LCD_DATA17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_GDSP__LCD_DATA17                           = IOMUX_PAD(0x0310, 0x00A0, 7, 0x067C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__EIM_AD9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__EIM_AD9 /;"	d
MX7D_PAD_EPDC_PWR_COM__EIM_AD9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__EIM_AD9                           = IOMUX_PAD(0x031C, 0x00AC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__ENET2_CRS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__ENET2_CRS /;"	d
MX7D_PAD_EPDC_PWR_COM__ENET2_CRS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__ENET2_CRS                         = IOMUX_PAD(0x031C, 0x00AC, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM /;"	d
MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM                      = IOMUX_PAD(0x031C, 0x00AC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA /;"	d
MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA                    = IOMUX_PAD(0x031C, 0x00AC, 1, 0x05CC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 /;"	d
MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30                        = IOMUX_PAD(0x031C, 0x00AC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__LCD_DATA11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__LCD_DATA11 /;"	d
MX7D_PAD_EPDC_PWR_COM__LCD_DATA11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__LCD_DATA11                        = IOMUX_PAD(0x031C, 0x00AC, 7, 0x0664,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC /;"	d
MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC                         = IOMUX_PAD(0x031C, 0x00AC, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1 /;"	d
MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1                        = IOMUX_PAD(0x0320, 0x00B0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__ENET2_COL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__ENET2_COL /;"	d
MX7D_PAD_EPDC_PWR_STAT__ENET2_COL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__ENET2_COL                        = IOMUX_PAD(0x0320, 0x00B0, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT /;"	d
MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT                    = IOMUX_PAD(0x0320, 0x00B0, 0, 0x0580,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB /;"	d
MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB                   = IOMUX_PAD(0x0320, 0x00B0, 1, 0x05D0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 /;"	d
MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31                       = IOMUX_PAD(0x0320, 0x00B0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12 /;"	d
MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12                       = IOMUX_PAD(0x0320, 0x00B0, 7, 0x0668,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC /;"	d
MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC                        = IOMUX_PAD(0x0320, 0x00B0, 6, 0x0698,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__EIM_AD14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__EIM_AD14 /;"	d
MX7D_PAD_EPDC_SDCE0__EIM_AD14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__EIM_AD14                            = IOMUX_PAD(0x02F4, 0x0084, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL /;"	d
MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL                  = IOMUX_PAD(0x02F4, 0x0084, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0 /;"	d
MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0                          = IOMUX_PAD(0x02F4, 0x0084, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2 /;"	d
MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2                      = IOMUX_PAD(0x02F4, 0x0084, 1, 0x058C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__GPIO2_IO20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 /;"	d
MX7D_PAD_EPDC_SDCE0__GPIO2_IO20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__GPIO2_IO20                          = IOMUX_PAD(0x02F4, 0x0084, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__LCD_DATA19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__LCD_DATA19 /;"	d
MX7D_PAD_EPDC_SDCE0__LCD_DATA19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__LCD_DATA19                          = IOMUX_PAD(0x02F4, 0x0084, 6, 0x0684,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE0__LCD_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE0__LCD_DATA5 /;"	d
MX7D_PAD_EPDC_SDCE0__LCD_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE0__LCD_DATA5                           = IOMUX_PAD(0x02F4, 0x0084, 7, 0x064C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__EIM_AD15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__EIM_AD15 /;"	d
MX7D_PAD_EPDC_SDCE1__EIM_AD15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__EIM_AD15                            = IOMUX_PAD(0x02F8, 0x0088, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC /;"	d
MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC                     = IOMUX_PAD(0x02F8, 0x0088, 2, 0x0578,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER /;"	d
MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER                         = IOMUX_PAD(0x02F8, 0x0088, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1 /;"	d
MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1                          = IOMUX_PAD(0x02F8, 0x0088, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3 /;"	d
MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3                      = IOMUX_PAD(0x02F8, 0x0088, 1, 0x0590,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__GPIO2_IO21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 /;"	d
MX7D_PAD_EPDC_SDCE1__GPIO2_IO21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__GPIO2_IO21                          = IOMUX_PAD(0x02F8, 0x0088, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__LCD_DATA20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__LCD_DATA20 /;"	d
MX7D_PAD_EPDC_SDCE1__LCD_DATA20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__LCD_DATA20                          = IOMUX_PAD(0x02F8, 0x0088, 6, 0x0688,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE1__LCD_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE1__LCD_DATA4 /;"	d
MX7D_PAD_EPDC_SDCE1__LCD_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE1__LCD_DATA4                           = IOMUX_PAD(0x02F8, 0x0088, 7, 0x0648,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__EIM_ADDR16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__EIM_ADDR16 /;"	d
MX7D_PAD_EPDC_SDCE2__EIM_ADDR16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__EIM_ADDR16                          = IOMUX_PAD(0x02FC, 0x008C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 /;"	d
MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0                     = IOMUX_PAD(0x02FC, 0x008C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2 /;"	d
MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2                          = IOMUX_PAD(0x02FC, 0x008C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__GPIO2_IO22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 /;"	d
MX7D_PAD_EPDC_SDCE2__GPIO2_IO22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__GPIO2_IO22                          = IOMUX_PAD(0x02FC, 0x008C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__KPP_COL6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__KPP_COL6 /;"	d
MX7D_PAD_EPDC_SDCE2__KPP_COL6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__KPP_COL6                            = IOMUX_PAD(0x02FC, 0x008C, 3, 0x060C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__LCD_DATA21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__LCD_DATA21 /;"	d
MX7D_PAD_EPDC_SDCE2__LCD_DATA21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__LCD_DATA21                          = IOMUX_PAD(0x02FC, 0x008C, 6, 0x068C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__LCD_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__LCD_DATA3 /;"	d
MX7D_PAD_EPDC_SDCE2__LCD_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__LCD_DATA3                           = IOMUX_PAD(0x02FC, 0x008C, 7, 0x0644,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN /;"	d
MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN                     = IOMUX_PAD(0x02FC, 0x008C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__EIM_ADDR17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__EIM_ADDR17 /;"	d
MX7D_PAD_EPDC_SDCE3__EIM_ADDR17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__EIM_ADDR17                          = IOMUX_PAD(0x0300, 0x0090, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 /;"	d
MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1                     = IOMUX_PAD(0x0300, 0x0090, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3 /;"	d
MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3                          = IOMUX_PAD(0x0300, 0x0090, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__GPIO2_IO23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 /;"	d
MX7D_PAD_EPDC_SDCE3__GPIO2_IO23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__GPIO2_IO23                          = IOMUX_PAD(0x0300, 0x0090, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__KPP_ROW6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__KPP_ROW6 /;"	d
MX7D_PAD_EPDC_SDCE3__KPP_ROW6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__KPP_ROW6                            = IOMUX_PAD(0x0300, 0x0090, 3, 0x062C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__LCD_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__LCD_DATA2 /;"	d
MX7D_PAD_EPDC_SDCE3__LCD_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__LCD_DATA2                           = IOMUX_PAD(0x0300, 0x0090, 7, 0x0640,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__LCD_DATA22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__LCD_DATA22 /;"	d
MX7D_PAD_EPDC_SDCE3__LCD_DATA22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__LCD_DATA22                          = IOMUX_PAD(0x0300, 0x0090, 6, 0x0690,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD /;"	d
MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD                       = IOMUX_PAD(0x0300, 0x0090, 1, 0x06E8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__EIM_AD10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__EIM_AD10 /;"	d
MX7D_PAD_EPDC_SDCLK__EIM_AD10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__EIM_AD10                            = IOMUX_PAD(0x02E4, 0x0074, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 /;"	d
MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0                     = IOMUX_PAD(0x02E4, 0x0074, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK /;"	d
MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK                          = IOMUX_PAD(0x02E4, 0x0074, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__GPIO2_IO16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 /;"	d
MX7D_PAD_EPDC_SDCLK__GPIO2_IO16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__GPIO2_IO16                          = IOMUX_PAD(0x02E4, 0x0074, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__KPP_ROW4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__KPP_ROW4 /;"	d
MX7D_PAD_EPDC_SDCLK__KPP_ROW4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__KPP_ROW4                            = IOMUX_PAD(0x02E4, 0x0074, 3, 0x0624,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__LCD_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__LCD_CLK /;"	d
MX7D_PAD_EPDC_SDCLK__LCD_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__LCD_CLK                             = IOMUX_PAD(0x02E4, 0x0074, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__LCD_DATA20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__LCD_DATA20 /;"	d
MX7D_PAD_EPDC_SDCLK__LCD_DATA20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__LCD_DATA20                          = IOMUX_PAD(0x02E4, 0x0074, 7, 0x0688,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN /;"	d
MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN                     = IOMUX_PAD(0x02E4, 0x0074, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__EIM_AD11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__EIM_AD11 /;"	d
MX7D_PAD_EPDC_SDLE__EIM_AD11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__EIM_AD11                             = IOMUX_PAD(0x02E8, 0x0078, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 /;"	d
MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1                      = IOMUX_PAD(0x02E8, 0x0078, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__EPDC_SDLE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__EPDC_SDLE /;"	d
MX7D_PAD_EPDC_SDLE__EPDC_SDLE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__EPDC_SDLE                            = IOMUX_PAD(0x02E8, 0x0078, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__GPIO2_IO17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__GPIO2_IO17 /;"	d
MX7D_PAD_EPDC_SDLE__GPIO2_IO17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__GPIO2_IO17                           = IOMUX_PAD(0x02E8, 0x0078, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__KPP_COL4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__KPP_COL4 /;"	d
MX7D_PAD_EPDC_SDLE__KPP_COL4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__KPP_COL4                             = IOMUX_PAD(0x02E8, 0x0078, 3, 0x0604,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__LCD_DATA16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__LCD_DATA16 /;"	d
MX7D_PAD_EPDC_SDLE__LCD_DATA16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__LCD_DATA16                           = IOMUX_PAD(0x02E8, 0x0078, 6, 0x0678,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__LCD_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__LCD_DATA8 /;"	d
MX7D_PAD_EPDC_SDLE__LCD_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__LCD_DATA8                            = IOMUX_PAD(0x02E8, 0x0078, 7, 0x0658,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD /;"	d
MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD                        = IOMUX_PAD(0x02E8, 0x0078, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__EIM_AD12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__EIM_AD12 /;"	d
MX7D_PAD_EPDC_SDOE__EIM_AD12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__EIM_AD12                             = IOMUX_PAD(0x02EC, 0x007C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 /;"	d
MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2                      = IOMUX_PAD(0x02EC, 0x007C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__EPDC_SDOE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__EPDC_SDOE /;"	d
MX7D_PAD_EPDC_SDOE__EPDC_SDOE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__EPDC_SDOE                            = IOMUX_PAD(0x02EC, 0x007C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0 /;"	d
MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0                       = IOMUX_PAD(0x02EC, 0x007C, 1, 0x0584,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__GPIO2_IO18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__GPIO2_IO18 /;"	d
MX7D_PAD_EPDC_SDOE__GPIO2_IO18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__GPIO2_IO18                           = IOMUX_PAD(0x02EC, 0x007C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__KPP_COL5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__KPP_COL5 /;"	d
MX7D_PAD_EPDC_SDOE__KPP_COL5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__KPP_COL5                             = IOMUX_PAD(0x02EC, 0x007C, 3, 0x0608,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__LCD_DATA17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__LCD_DATA17 /;"	d
MX7D_PAD_EPDC_SDOE__LCD_DATA17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__LCD_DATA17                           = IOMUX_PAD(0x02EC, 0x007C, 6, 0x067C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDOE__LCD_DATA23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDOE__LCD_DATA23 /;"	d
MX7D_PAD_EPDC_SDOE__LCD_DATA23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDOE__LCD_DATA23                           = IOMUX_PAD(0x02EC, 0x007C, 7, 0x0694,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__EIM_AD13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__EIM_AD13 /;"	d
MX7D_PAD_EPDC_SDSHR__EIM_AD13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__EIM_AD13                            = IOMUX_PAD(0x02F0, 0x0080, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 /;"	d
MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3                     = IOMUX_PAD(0x02F0, 0x0080, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR /;"	d
MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR                          = IOMUX_PAD(0x02F0, 0x0080, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1 /;"	d
MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1                      = IOMUX_PAD(0x02F0, 0x0080, 1, 0x0588,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__GPIO2_IO19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 /;"	d
MX7D_PAD_EPDC_SDSHR__GPIO2_IO19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__GPIO2_IO19                          = IOMUX_PAD(0x02F0, 0x0080, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__KPP_ROW5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__KPP_ROW5 /;"	d
MX7D_PAD_EPDC_SDSHR__KPP_ROW5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__KPP_ROW5                            = IOMUX_PAD(0x02F0, 0x0080, 3, 0x0628,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__LCD_DATA10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__LCD_DATA10 /;"	d
MX7D_PAD_EPDC_SDSHR__LCD_DATA10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__LCD_DATA10                          = IOMUX_PAD(0x02F0, 0x0080, 7, 0x0660,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_EPDC_SDSHR__LCD_DATA18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_EPDC_SDSHR__LCD_DATA18 /;"	d
MX7D_PAD_EPDC_SDSHR__LCD_DATA18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_EPDC_SDSHR__LCD_DATA18                          = IOMUX_PAD(0x02F0, 0x0080, 6, 0x0680,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO00__GPIO1_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO00__GPIO1_IO0 /;"	d
MX7D_PAD_GPIO1_IO00__GPIO1_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO00__GPIO1_IO0                           = IOMUX_PAD(0x0030, 0x0000, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO00__PWM4_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO00__PWM4_OUT /;"	d
MX7D_PAD_GPIO1_IO00__PWM4_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO00__PWM4_OUT				 = IOMUX_PAD(0x0030, 0x0000, IOMUX_CONFIG_LPSR | 1, 0x0000, 0,/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_ANY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_ANY /;"	d
MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B /;"	d
MX7D_PAD_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB /;"	d
MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B                        = IOMUX_PAD(0x0030, 0x0000, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO01__ANATOP_24M_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO01__ANATOP_24M_OUT /;"	d
MX7D_PAD_GPIO1_IO01__CCM_ENET_REF_CLK3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO01__CCM_ENET_REF_CLK3 /;"	d
MX7D_PAD_GPIO1_IO01__CCM_ENET_REF_CLK3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO01__CCM_ENET_REF_CLK3                   = IOMUX_PAD(0x0034, 0x0004, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO01__GPIO1_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO01__GPIO1_IO1 /;"	d
MX7D_PAD_GPIO1_IO01__GPIO1_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO01__GPIO1_IO1                           = IOMUX_PAD(0x0034, 0x0004, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO01__OBSERVE0_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO01__OBSERVE0_OUT /;"	d
MX7D_PAD_GPIO1_IO01__PWM1_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO01__PWM1_OUT /;"	d
MX7D_PAD_GPIO1_IO01__PWM1_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO01__PWM1_OUT                            = IOMUX_PAD(0x0034, 0x0004, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO01__SAI1_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO01__SAI1_MCLK /;"	d
MX7D_PAD_GPIO1_IO01__SAI1_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO01__SAI1_MCLK				 = IOMUX_PAD(0x0034, 0x0004, IOMUX_CONFIG_LPSR | 3, 0x0000, 0/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO02__CCM_CLKO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__CCM_CLKO1 /;"	d
MX7D_PAD_GPIO1_IO02__CCM_CLKO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO02__CCM_CLKO1                           = IOMUX_PAD(0x0038, 0x0008, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO02__CCM_ENET_REF_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__CCM_ENET_REF_CLK1 /;"	d
MX7D_PAD_GPIO1_IO02__CCM_ENET_REF_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO02__CCM_ENET_REF_CLK1                   = IOMUX_PAD(0x0038, 0x0008, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO02__GPIO1_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__GPIO1_IO2 /;"	d
MX7D_PAD_GPIO1_IO02__GPIO1_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO02__GPIO1_IO2                           = IOMUX_PAD(0x0038, 0x0008, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO02__OBSERVE1_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__OBSERVE1_OUT /;"	d
MX7D_PAD_GPIO1_IO02__PWM2_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__PWM2_OUT /;"	d
MX7D_PAD_GPIO1_IO02__PWM2_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO02__PWM2_OUT                            = IOMUX_PAD(0x0038, 0x0008, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO02__SAI2_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__SAI2_MCLK /;"	d
MX7D_PAD_GPIO1_IO02__SAI2_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO02__SAI2_MCLK                           = IOMUX_PAD(0x0038, 0x0008, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO02__USB_OTG1_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO02__USB_OTG1_ID /;"	d
MX7D_PAD_GPIO1_IO02__USB_OTG1_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO02__USB_OTG1_ID                         = IOMUX_PAD(0x0038, 0x0008, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO03__CCM_CLKO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__CCM_CLKO2 /;"	d
MX7D_PAD_GPIO1_IO03__CCM_CLKO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO03__CCM_CLKO2                           = IOMUX_PAD(0x003c, 0x000C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO03__CCM_ENET_REF_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__CCM_ENET_REF_CLK2 /;"	d
MX7D_PAD_GPIO1_IO03__CCM_ENET_REF_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO03__CCM_ENET_REF_CLK2                   = IOMUX_PAD(0x003c, 0x000C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO03__GPIO1_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__GPIO1_IO3 /;"	d
MX7D_PAD_GPIO1_IO03__GPIO1_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO03__GPIO1_IO3                           = IOMUX_PAD(0x003c, 0x000C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO03__OBSERVE2_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__OBSERVE2_OUT /;"	d
MX7D_PAD_GPIO1_IO03__PWM3_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__PWM3_OUT /;"	d
MX7D_PAD_GPIO1_IO03__PWM3_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO03__PWM3_OUT                            = IOMUX_PAD(0x003c, 0x000C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO03__SAI3_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__SAI3_MCLK /;"	d
MX7D_PAD_GPIO1_IO03__SAI3_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO03__SAI3_MCLK                           = IOMUX_PAD(0x003c, 0x000C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO03__USB_OTG2_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO03__USB_OTG2_ID /;"	d
MX7D_PAD_GPIO1_IO03__USB_OTG2_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO03__USB_OTG2_ID                         = IOMUX_PAD(0x003c, 0x000C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4 /;"	d
MX7D_PAD_GPIO1_IO04__FLEXTIMER_CH4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO04__FLEXTIMER_CH4                       = IOMUX_PAD(0x0040, 0x0010, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO04__GPIO1_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO04__GPIO1_IO4 /;"	d
MX7D_PAD_GPIO1_IO04__GPIO1_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO04__GPIO1_IO4                           = IOMUX_PAD(0x0040, 0x0010, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO04__I2C1_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO04__I2C1_SCL /;"	d
MX7D_PAD_GPIO1_IO04__I2C1_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO04__I2C1_SCL                            = IOMUX_PAD(0x0040, 0x0010, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT /;"	d
MX7D_PAD_GPIO1_IO04__UART5_CTS_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO04__UART5_CTS_B /;"	d
MX7D_PAD_GPIO1_IO04__UART5_CTS_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO04__UART5_CTS_B                         = IOMUX_PAD(0x0040, 0x0010, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO04__USB_OTG1_OC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC /;"	d
MX7D_PAD_GPIO1_IO04__USB_OTG1_OC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO04__USB_OTG1_OC                         = IOMUX_PAD(0x0040, 0x0010, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5 /;"	d
MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5                      = IOMUX_PAD(0x0044, 0x0014, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO05__GPIO1_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO05__GPIO1_IO5 /;"	d
MX7D_PAD_GPIO1_IO05__GPIO1_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO05__GPIO1_IO5                           = IOMUX_PAD(0x0044, 0x0014, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO05__I2C1_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO05__I2C1_SDA /;"	d
MX7D_PAD_GPIO1_IO05__I2C1_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO05__I2C1_SDA                            = IOMUX_PAD(0x0044, 0x0014, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT /;"	d
MX7D_PAD_GPIO1_IO05__UART5_RTS_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO05__UART5_RTS_B /;"	d
MX7D_PAD_GPIO1_IO05__UART5_RTS_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO05__UART5_RTS_B                         = IOMUX_PAD(0x0044, 0x0014, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR /;"	d
MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR                        = IOMUX_PAD(0x0044, 0x0014, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__CCM_WAIT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__CCM_WAIT /;"	d
MX7D_PAD_GPIO1_IO06__CCM_WAIT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__CCM_WAIT				 = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONFIG_LPSR | 5, 0x0000, 0,/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6 /;"	d
MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6                      = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__GPIO1_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__GPIO1_IO6 /;"	d
MX7D_PAD_GPIO1_IO06__GPIO1_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__GPIO1_IO6                           = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__I2C2_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__I2C2_SCL /;"	d
MX7D_PAD_GPIO1_IO06__I2C2_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__I2C2_SCL                            = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__KPP_ROW4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__KPP_ROW4 /;"	d
MX7D_PAD_GPIO1_IO06__KPP_ROW4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__KPP_ROW4				 = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONFIG_LPSR | 6, 0x0624, 1,/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__UART5_RX_DATA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__UART5_RX_DATA /;"	d
MX7D_PAD_GPIO1_IO06__UART5_RX_DATA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__UART5_RX_DATA                       = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO06__USB_OTG2_OC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC /;"	d
MX7D_PAD_GPIO1_IO06__USB_OTG2_OC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO06__USB_OTG2_OC                         = IOMUX_PAD(0x0048, 0x0018, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__CCM_STOP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__CCM_STOP /;"	d
MX7D_PAD_GPIO1_IO07__CCM_STOP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__CCM_STOP				 = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONFIG_LPSR | 5, 0x0000, 0,/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7 /;"	d
MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7                      = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__GPIO1_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__GPIO1_IO7 /;"	d
MX7D_PAD_GPIO1_IO07__GPIO1_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__GPIO1_IO7                           = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__I2C2_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__I2C2_SDA /;"	d
MX7D_PAD_GPIO1_IO07__I2C2_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__I2C2_SDA                            = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__KPP_COL4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__KPP_COL4 /;"	d
MX7D_PAD_GPIO1_IO07__KPP_COL4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__KPP_COL4				 = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONFIG_LPSR | 6, 0x0604, 1,/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__UART5_TX_DATA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__UART5_TX_DATA /;"	d
MX7D_PAD_GPIO1_IO07__UART5_TX_DATA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__UART5_TX_DATA                       = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR /;"	d
MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR                        = IOMUX_PAD(0x004c, 0x001c, IOMUX_CONF/;"	e	enum:__anon4d48e8e90103
MX7D_PAD_GPIO1_IO08__GPIO1_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__GPIO1_IO8 /;"	d
MX7D_PAD_GPIO1_IO08__GPIO1_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__GPIO1_IO8                           = IOMUX_PAD(0x026C, 0x0014, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__I2C3_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__I2C3_SCL /;"	d
MX7D_PAD_GPIO1_IO08__I2C3_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__I2C3_SCL                            = IOMUX_PAD(0x026C, 0x0014, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__KPP_COL5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__KPP_COL5 /;"	d
MX7D_PAD_GPIO1_IO08__KPP_COL5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__KPP_COL5                            = IOMUX_PAD(0x026C, 0x0014, 6, 0x0608,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__PWM1_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__PWM1_OUT /;"	d
MX7D_PAD_GPIO1_IO08__PWM1_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__PWM1_OUT                            = IOMUX_PAD(0x026C, 0x0014, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__SD1_VSELECT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__SD1_VSELECT /;"	d
MX7D_PAD_GPIO1_IO08__SD1_VSELECT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__SD1_VSELECT                         = IOMUX_PAD(0x026C, 0x0014, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__UART3_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__UART3_DCE_RX /;"	d
MX7D_PAD_GPIO1_IO08__UART3_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__UART3_DCE_RX                        = IOMUX_PAD(0x026C, 0x0014, 3, 0x0704,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__UART3_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__UART3_DTE_TX /;"	d
MX7D_PAD_GPIO1_IO08__UART3_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__UART3_DTE_TX                        = IOMUX_PAD(0x026C, 0x0014, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B /;"	d
MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B                        = IOMUX_PAD(0x026C, 0x0014, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__CCM_ENET_REF_CLK3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__CCM_ENET_REF_CLK3 /;"	d
MX7D_PAD_GPIO1_IO09__CCM_ENET_REF_CLK3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__CCM_ENET_REF_CLK3                   = IOMUX_PAD(0x0270, 0x0018, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY /;"	d
MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY                      = IOMUX_PAD(0x0270, 0x0018, 5, 0x04F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__GPIO1_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__GPIO1_IO9 /;"	d
MX7D_PAD_GPIO1_IO09__GPIO1_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__GPIO1_IO9                           = IOMUX_PAD(0x0270, 0x0018, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__I2C3_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__I2C3_SDA /;"	d
MX7D_PAD_GPIO1_IO09__I2C3_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__I2C3_SDA                            = IOMUX_PAD(0x0270, 0x0018, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__KPP_ROW5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__KPP_ROW5 /;"	d
MX7D_PAD_GPIO1_IO09__KPP_ROW5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__KPP_ROW5                            = IOMUX_PAD(0x0270, 0x0018, 6, 0x0628,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__PWM2_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__PWM2_OUT /;"	d
MX7D_PAD_GPIO1_IO09__PWM2_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__PWM2_OUT                            = IOMUX_PAD(0x0270, 0x0018, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__SD1_LCTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__SD1_LCTL /;"	d
MX7D_PAD_GPIO1_IO09__SD1_LCTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__SD1_LCTL                            = IOMUX_PAD(0x0270, 0x0018, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__UART3_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__UART3_DCE_TX /;"	d
MX7D_PAD_GPIO1_IO09__UART3_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__UART3_DCE_TX                        = IOMUX_PAD(0x0270, 0x0018, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO09__UART3_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO09__UART3_DTE_RX /;"	d
MX7D_PAD_GPIO1_IO09__UART3_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO09__UART3_DTE_RX                        = IOMUX_PAD(0x0270, 0x0018, 3, 0x0704,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__ENET1_MDIO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__ENET1_MDIO /;"	d
MX7D_PAD_GPIO1_IO10__ENET1_MDIO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__ENET1_MDIO                          = IOMUX_PAD(0x0274, 0x001C, 2, 0x0568,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA /;"	d
MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA                      = IOMUX_PAD(0x0274, 0x001C, 5, 0x05A4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__GPIO1_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__GPIO1_IO10 /;"	d
MX7D_PAD_GPIO1_IO10__GPIO1_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__GPIO1_IO10                          = IOMUX_PAD(0x0274, 0x001C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__I2C4_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__I2C4_SCL /;"	d
MX7D_PAD_GPIO1_IO10__I2C4_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__I2C4_SCL                            = IOMUX_PAD(0x0274, 0x001C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__KPP_COL6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__KPP_COL6 /;"	d
MX7D_PAD_GPIO1_IO10__KPP_COL6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__KPP_COL6                            = IOMUX_PAD(0x0274, 0x001C, 6, 0x060C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__PWM3_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__PWM3_OUT /;"	d
MX7D_PAD_GPIO1_IO10__PWM3_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__PWM3_OUT                            = IOMUX_PAD(0x0274, 0x001C, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__SD2_LCTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__SD2_LCTL /;"	d
MX7D_PAD_GPIO1_IO10__SD2_LCTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__SD2_LCTL                            = IOMUX_PAD(0x0274, 0x001C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS /;"	d
MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS                       = IOMUX_PAD(0x0274, 0x001C, 3, 0x0700,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS /;"	d
MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS                       = IOMUX_PAD(0x0274, 0x001C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__ENET1_MDC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__ENET1_MDC /;"	d
MX7D_PAD_GPIO1_IO11__ENET1_MDC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__ENET1_MDC                           = IOMUX_PAD(0x0278, 0x0020, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB /;"	d
MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB                      = IOMUX_PAD(0x0278, 0x0020, 5, 0x05A8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__GPIO1_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__GPIO1_IO11 /;"	d
MX7D_PAD_GPIO1_IO11__GPIO1_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__GPIO1_IO11                          = IOMUX_PAD(0x0278, 0x0020, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__I2C4_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__I2C4_SDA /;"	d
MX7D_PAD_GPIO1_IO11__I2C4_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__I2C4_SDA                            = IOMUX_PAD(0x0278, 0x0020, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__KPP_ROW6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__KPP_ROW6 /;"	d
MX7D_PAD_GPIO1_IO11__KPP_ROW6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__KPP_ROW6                            = IOMUX_PAD(0x0278, 0x0020, 6, 0x062C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__PWM4_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__PWM4_OUT /;"	d
MX7D_PAD_GPIO1_IO11__PWM4_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__PWM4_OUT                            = IOMUX_PAD(0x0278, 0x0020, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__SD3_LCTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__SD3_LCTL /;"	d
MX7D_PAD_GPIO1_IO11__SD3_LCTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__SD3_LCTL                            = IOMUX_PAD(0x0278, 0x0020, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS /;"	d
MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS                       = IOMUX_PAD(0x0278, 0x0020, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS /;"	d
MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS                       = IOMUX_PAD(0x0278, 0x0020, 3, 0x0700,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 /;"	d
MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1                   = IOMUX_PAD(0x027C, 0x0024, 2, 0x0564,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1 /;"	d
MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1                        = IOMUX_PAD(0x027C, 0x0024, 5, 0x04E4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__CM4_NMI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__CM4_NMI /;"	d
MX7D_PAD_GPIO1_IO12__CM4_NMI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__CM4_NMI                             = IOMUX_PAD(0x027C, 0x0024, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX /;"	d
MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX                         = IOMUX_PAD(0x027C, 0x0024, 3, 0x04DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__GPIO1_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__GPIO1_IO12 /;"	d
MX7D_PAD_GPIO1_IO12__GPIO1_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__GPIO1_IO12                          = IOMUX_PAD(0x027C, 0x0024, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__SD2_VSELECT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__SD2_VSELECT /;"	d
MX7D_PAD_GPIO1_IO12__SD2_VSELECT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__SD2_VSELECT                         = IOMUX_PAD(0x027C, 0x0024, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__SNVS_VIO_5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__SNVS_VIO_5 /;"	d
MX7D_PAD_GPIO1_IO12__SNVS_VIO_5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__SNVS_VIO_5                          = IOMUX_PAD(0x027C, 0x0024, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO12__USB_OTG1_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO12__USB_OTG1_ID /;"	d
MX7D_PAD_GPIO1_IO12__USB_OTG1_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO12__USB_OTG1_ID                         = IOMUX_PAD(0x027C, 0x0024, 7, 0x0734,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__CCM_ENET_REF_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__CCM_ENET_REF_CLK2 /;"	d
MX7D_PAD_GPIO1_IO13__CCM_ENET_REF_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__CCM_ENET_REF_CLK2                   = IOMUX_PAD(0x0280, 0x0028, 2, 0x0570,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2 /;"	d
MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2                        = IOMUX_PAD(0x0280, 0x0028, 5, 0x04E8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY /;"	d
MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY                      = IOMUX_PAD(0x0280, 0x0028, 4, 0x04F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX /;"	d
MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX                         = IOMUX_PAD(0x0280, 0x0028, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__GPIO1_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__GPIO1_IO13 /;"	d
MX7D_PAD_GPIO1_IO13__GPIO1_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__GPIO1_IO13                          = IOMUX_PAD(0x0280, 0x0028, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__SD3_VSELECT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__SD3_VSELECT /;"	d
MX7D_PAD_GPIO1_IO13__SD3_VSELECT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__SD3_VSELECT                         = IOMUX_PAD(0x0280, 0x0028, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL /;"	d
MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL                      = IOMUX_PAD(0x0280, 0x0028, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO13__USB_OTG2_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO13__USB_OTG2_ID /;"	d
MX7D_PAD_GPIO1_IO13__USB_OTG2_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO13__USB_OTG2_ID                         = IOMUX_PAD(0x0280, 0x0028, 7, 0x0730,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3 /;"	d
MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3                        = IOMUX_PAD(0x0284, 0x002C, 5, 0x04EC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__ENET2_MDIO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__ENET2_MDIO /;"	d
MX7D_PAD_GPIO1_IO14__ENET2_MDIO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__ENET2_MDIO                          = IOMUX_PAD(0x0284, 0x002C, 2, 0x0574,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX /;"	d
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX                         = IOMUX_PAD(0x0284, 0x002C, 3, 0x04E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__GPIO1_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__GPIO1_IO14 /;"	d
MX7D_PAD_GPIO1_IO14__GPIO1_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__GPIO1_IO14                          = IOMUX_PAD(0x0284, 0x002C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__SD3_CD_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__SD3_CD_B /;"	d
MX7D_PAD_GPIO1_IO14__SD3_CD_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__SD3_CD_B                            = IOMUX_PAD(0x0284, 0x002C, 1, 0x0738,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0 /;"	d
MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0                     = IOMUX_PAD(0x0284, 0x002C, 6, 0x06D8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B /;"	d
MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B                        = IOMUX_PAD(0x0284, 0x002C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4 /;"	d
MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4                        = IOMUX_PAD(0x0288, 0x0030, 5, 0x04F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__ENET2_MDC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__ENET2_MDC /;"	d
MX7D_PAD_GPIO1_IO15__ENET2_MDC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__ENET2_MDC                           = IOMUX_PAD(0x0288, 0x0030, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX /;"	d
MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX                         = IOMUX_PAD(0x0288, 0x0030, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__GPIO1_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__GPIO1_IO15 /;"	d
MX7D_PAD_GPIO1_IO15__GPIO1_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__GPIO1_IO15                          = IOMUX_PAD(0x0288, 0x0030, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__SD3_WP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__SD3_WP /;"	d
MX7D_PAD_GPIO1_IO15__SD3_WP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__SD3_WP                              = IOMUX_PAD(0x0288, 0x0030, 1, 0x073C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1 /;"	d
MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1                     = IOMUX_PAD(0x0288, 0x0030, 6, 0x06DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B /;"	d
MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B                        = IOMUX_PAD(0x0288, 0x0030, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__ECSPI3_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__ECSPI3_MISO /;"	d
MX7D_PAD_I2C1_SCL__ECSPI3_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__ECSPI3_MISO                           = IOMUX_PAD(0x03B8, 0x0148, 3, 0x0548,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__FLEXCAN1_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__FLEXCAN1_RX /;"	d
MX7D_PAD_I2C1_SCL__FLEXCAN1_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__FLEXCAN1_RX                           = IOMUX_PAD(0x03B8, 0x0148, 2, 0x04DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__GPIO4_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__GPIO4_IO8 /;"	d
MX7D_PAD_I2C1_SCL__GPIO4_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__GPIO4_IO8                             = IOMUX_PAD(0x03B8, 0x0148, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__I2C1_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__I2C1_SCL /;"	d
MX7D_PAD_I2C1_SCL__I2C1_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__I2C1_SCL                              = IOMUX_PAD(0x03B8, 0x0148, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__SD2_VSELECT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__SD2_VSELECT /;"	d
MX7D_PAD_I2C1_SCL__SD2_VSELECT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__SD2_VSELECT                           = IOMUX_PAD(0x03B8, 0x0148, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__UART4_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__UART4_DCE_CTS /;"	d
MX7D_PAD_I2C1_SCL__UART4_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__UART4_DCE_CTS                         = IOMUX_PAD(0x03B8, 0x0148, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SCL__UART4_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SCL__UART4_DTE_RTS /;"	d
MX7D_PAD_I2C1_SCL__UART4_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SCL__UART4_DTE_RTS                         = IOMUX_PAD(0x03B8, 0x0148, 1, 0x0708,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1 /;"	d
MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1                     = IOMUX_PAD(0x03BC, 0x014C, 4, 0x0564,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__ECSPI3_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__ECSPI3_MOSI /;"	d
MX7D_PAD_I2C1_SDA__ECSPI3_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__ECSPI3_MOSI                           = IOMUX_PAD(0x03BC, 0x014C, 3, 0x054C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__FLEXCAN1_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__FLEXCAN1_TX /;"	d
MX7D_PAD_I2C1_SDA__FLEXCAN1_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__FLEXCAN1_TX                           = IOMUX_PAD(0x03BC, 0x014C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__GPIO4_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__GPIO4_IO9 /;"	d
MX7D_PAD_I2C1_SDA__GPIO4_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__GPIO4_IO9                             = IOMUX_PAD(0x03BC, 0x014C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__I2C1_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__I2C1_SDA /;"	d
MX7D_PAD_I2C1_SDA__I2C1_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__I2C1_SDA                              = IOMUX_PAD(0x03BC, 0x014C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__SD3_VSELECT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__SD3_VSELECT /;"	d
MX7D_PAD_I2C1_SDA__SD3_VSELECT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__SD3_VSELECT                           = IOMUX_PAD(0x03BC, 0x014C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__UART4_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__UART4_DCE_RTS /;"	d
MX7D_PAD_I2C1_SDA__UART4_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__UART4_DCE_RTS                         = IOMUX_PAD(0x03BC, 0x014C, 1, 0x0708,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C1_SDA__UART4_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C1_SDA__UART4_DTE_CTS /;"	d
MX7D_PAD_I2C1_SDA__UART4_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C1_SDA__UART4_DTE_CTS                         = IOMUX_PAD(0x03BC, 0x014C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__CCM_ENET_REF_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__CCM_ENET_REF_CLK2 /;"	d
MX7D_PAD_I2C2_SCL__CCM_ENET_REF_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__CCM_ENET_REF_CLK2                     = IOMUX_PAD(0x03C0, 0x0150, 4, 0x0570,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__ECSPI3_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__ECSPI3_SCLK /;"	d
MX7D_PAD_I2C2_SCL__ECSPI3_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__ECSPI3_SCLK                           = IOMUX_PAD(0x03C0, 0x0150, 3, 0x0544,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__GPIO4_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__GPIO4_IO10 /;"	d
MX7D_PAD_I2C2_SCL__GPIO4_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__GPIO4_IO10                            = IOMUX_PAD(0x03C0, 0x0150, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__I2C2_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__I2C2_SCL /;"	d
MX7D_PAD_I2C2_SCL__I2C2_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__I2C2_SCL                              = IOMUX_PAD(0x03C0, 0x0150, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__SD3_CD_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__SD3_CD_B /;"	d
MX7D_PAD_I2C2_SCL__SD3_CD_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__SD3_CD_B                              = IOMUX_PAD(0x03C0, 0x0150, 6, 0x0738,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__UART4_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__UART4_DCE_RX /;"	d
MX7D_PAD_I2C2_SCL__UART4_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__UART4_DCE_RX                          = IOMUX_PAD(0x03C0, 0x0150, 1, 0x070C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__UART4_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__UART4_DTE_TX /;"	d
MX7D_PAD_I2C2_SCL__UART4_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__UART4_DTE_TX                          = IOMUX_PAD(0x03C0, 0x0150, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B /;"	d
MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B                          = IOMUX_PAD(0x03C0, 0x0150, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__CCM_ENET_REF_CLK3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__CCM_ENET_REF_CLK3 /;"	d
MX7D_PAD_I2C2_SDA__CCM_ENET_REF_CLK3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__CCM_ENET_REF_CLK3                     = IOMUX_PAD(0x03C4, 0x0154, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__ECSPI3_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__ECSPI3_SS0 /;"	d
MX7D_PAD_I2C2_SDA__ECSPI3_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__ECSPI3_SS0                            = IOMUX_PAD(0x03C4, 0x0154, 3, 0x0550,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__GPIO4_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__GPIO4_IO11 /;"	d
MX7D_PAD_I2C2_SDA__GPIO4_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__GPIO4_IO11                            = IOMUX_PAD(0x03C4, 0x0154, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__I2C2_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__I2C2_SDA /;"	d
MX7D_PAD_I2C2_SDA__I2C2_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__I2C2_SDA                              = IOMUX_PAD(0x03C4, 0x0154, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__SD3_WP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__SD3_WP /;"	d
MX7D_PAD_I2C2_SDA__SD3_WP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__SD3_WP                                = IOMUX_PAD(0x03C4, 0x0154, 6, 0x073C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__UART4_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__UART4_DCE_TX /;"	d
MX7D_PAD_I2C2_SDA__UART4_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__UART4_DCE_TX                          = IOMUX_PAD(0x03C4, 0x0154, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__UART4_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__UART4_DTE_RX /;"	d
MX7D_PAD_I2C2_SDA__UART4_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__UART4_DTE_RX                          = IOMUX_PAD(0x03C4, 0x0154, 1, 0x070C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB /;"	d
MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB                  = IOMUX_PAD(0x03C4, 0x0154, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__CSI_VSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__CSI_VSYNC /;"	d
MX7D_PAD_I2C3_SCL__CSI_VSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__CSI_VSYNC                             = IOMUX_PAD(0x03C8, 0x0158, 3, 0x0520,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__EPDC_BDR0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__EPDC_BDR0 /;"	d
MX7D_PAD_I2C3_SCL__EPDC_BDR0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__EPDC_BDR0                             = IOMUX_PAD(0x03C8, 0x0158, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__FLEXCAN2_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__FLEXCAN2_RX /;"	d
MX7D_PAD_I2C3_SCL__FLEXCAN2_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__FLEXCAN2_RX                           = IOMUX_PAD(0x03C8, 0x0158, 2, 0x04E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__GPIO4_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__GPIO4_IO12 /;"	d
MX7D_PAD_I2C3_SCL__GPIO4_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__GPIO4_IO12                            = IOMUX_PAD(0x03C8, 0x0158, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__I2C3_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__I2C3_SCL /;"	d
MX7D_PAD_I2C3_SCL__I2C3_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__I2C3_SCL                              = IOMUX_PAD(0x03C8, 0x0158, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0 /;"	d
MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0                       = IOMUX_PAD(0x03C8, 0x0158, 4, 0x06D8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__UART5_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__UART5_DCE_CTS /;"	d
MX7D_PAD_I2C3_SCL__UART5_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__UART5_DCE_CTS                         = IOMUX_PAD(0x03C8, 0x0158, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SCL__UART5_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SCL__UART5_DTE_RTS /;"	d
MX7D_PAD_I2C3_SCL__UART5_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SCL__UART5_DTE_RTS                         = IOMUX_PAD(0x03C8, 0x0158, 1, 0x0710,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__CSI_HSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__CSI_HSYNC /;"	d
MX7D_PAD_I2C3_SDA__CSI_HSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__CSI_HSYNC                             = IOMUX_PAD(0x03CC, 0x015C, 3, 0x0518,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__EPDC_BDR1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__EPDC_BDR1 /;"	d
MX7D_PAD_I2C3_SDA__EPDC_BDR1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__EPDC_BDR1                             = IOMUX_PAD(0x03CC, 0x015C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__FLEXCAN2_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__FLEXCAN2_TX /;"	d
MX7D_PAD_I2C3_SDA__FLEXCAN2_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__FLEXCAN2_TX                           = IOMUX_PAD(0x03CC, 0x015C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__GPIO4_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__GPIO4_IO13 /;"	d
MX7D_PAD_I2C3_SDA__GPIO4_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__GPIO4_IO13                            = IOMUX_PAD(0x03CC, 0x015C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__I2C3_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__I2C3_SDA /;"	d
MX7D_PAD_I2C3_SDA__I2C3_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__I2C3_SDA                              = IOMUX_PAD(0x03CC, 0x015C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1 /;"	d
MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1                       = IOMUX_PAD(0x03CC, 0x015C, 4, 0x06DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__UART5_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__UART5_DCE_RTS /;"	d
MX7D_PAD_I2C3_SDA__UART5_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__UART5_DCE_RTS                         = IOMUX_PAD(0x03CC, 0x015C, 1, 0x0710,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C3_SDA__UART5_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C3_SDA__UART5_DTE_CTS /;"	d
MX7D_PAD_I2C3_SDA__UART5_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C3_SDA__UART5_DTE_CTS                         = IOMUX_PAD(0x03CC, 0x015C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__CSI_PIXCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__CSI_PIXCLK /;"	d
MX7D_PAD_I2C4_SCL__CSI_PIXCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__CSI_PIXCLK                            = IOMUX_PAD(0x03D0, 0x0160, 3, 0x051C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__EPDC_VCOM0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__EPDC_VCOM0 /;"	d
MX7D_PAD_I2C4_SCL__EPDC_VCOM0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__EPDC_VCOM0                            = IOMUX_PAD(0x03D0, 0x0160, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__GPIO4_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__GPIO4_IO14 /;"	d
MX7D_PAD_I2C4_SCL__GPIO4_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__GPIO4_IO14                            = IOMUX_PAD(0x03D0, 0x0160, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__I2C4_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__I2C4_SCL /;"	d
MX7D_PAD_I2C4_SCL__I2C4_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__I2C4_SCL                              = IOMUX_PAD(0x03D0, 0x0160, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__UART5_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__UART5_DCE_RX /;"	d
MX7D_PAD_I2C4_SCL__UART5_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__UART5_DCE_RX                          = IOMUX_PAD(0x03D0, 0x0160, 1, 0x0714,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__UART5_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__UART5_DTE_TX /;"	d
MX7D_PAD_I2C4_SCL__UART5_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__UART5_DTE_TX                          = IOMUX_PAD(0x03D0, 0x0160, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__USB_OTG1_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__USB_OTG1_ID /;"	d
MX7D_PAD_I2C4_SCL__USB_OTG1_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__USB_OTG1_ID                           = IOMUX_PAD(0x03D0, 0x0160, 4, 0x0734,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B /;"	d
MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B                          = IOMUX_PAD(0x03D0, 0x0160, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__CSI_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__CSI_MCLK /;"	d
MX7D_PAD_I2C4_SDA__CSI_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__CSI_MCLK                              = IOMUX_PAD(0x03D4, 0x0164, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__EPDC_VCOM1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__EPDC_VCOM1 /;"	d
MX7D_PAD_I2C4_SDA__EPDC_VCOM1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__EPDC_VCOM1                            = IOMUX_PAD(0x03D4, 0x0164, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__GPIO4_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__GPIO4_IO15 /;"	d
MX7D_PAD_I2C4_SDA__GPIO4_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__GPIO4_IO15                            = IOMUX_PAD(0x03D4, 0x0164, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__I2C4_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__I2C4_SDA /;"	d
MX7D_PAD_I2C4_SDA__I2C4_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__I2C4_SDA                              = IOMUX_PAD(0x03D4, 0x0164, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__UART5_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__UART5_DCE_TX /;"	d
MX7D_PAD_I2C4_SDA__UART5_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__UART5_DCE_TX                          = IOMUX_PAD(0x03D4, 0x0164, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__UART5_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__UART5_DTE_RX /;"	d
MX7D_PAD_I2C4_SDA__UART5_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__UART5_DTE_RX                          = IOMUX_PAD(0x03D4, 0x0164, 1, 0x0714,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__USB_OTG2_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__USB_OTG2_ID /;"	d
MX7D_PAD_I2C4_SDA__USB_OTG2_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__USB_OTG2_ID                           = IOMUX_PAD(0x03D4, 0x0164, 4, 0x0730,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB /;"	d
MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB                  = IOMUX_PAD(0x03D4, 0x0164, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__CSI_DATA16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__CSI_DATA16 /;"	d
MX7D_PAD_LCD_CLK__CSI_DATA16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__CSI_DATA16                             = IOMUX_PAD(0x0324, 0x00B4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__ECSPI4_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__ECSPI4_MISO /;"	d
MX7D_PAD_LCD_CLK__ECSPI4_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__ECSPI4_MISO                            = IOMUX_PAD(0x0324, 0x00B4, 1, 0x0558,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN /;"	d
MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN                   = IOMUX_PAD(0x0324, 0x00B4, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__GPIO3_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__GPIO3_IO0 /;"	d
MX7D_PAD_LCD_CLK__GPIO3_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__GPIO3_IO0                              = IOMUX_PAD(0x0324, 0x00B4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__LCD_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__LCD_CLK /;"	d
MX7D_PAD_LCD_CLK__LCD_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__LCD_CLK                                = IOMUX_PAD(0x0324, 0x00B4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__UART2_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__UART2_DCE_RX /;"	d
MX7D_PAD_LCD_CLK__UART2_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__UART2_DCE_RX                           = IOMUX_PAD(0x0324, 0x00B4, 4, 0x06FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_CLK__UART2_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_CLK__UART2_DTE_TX /;"	d
MX7D_PAD_LCD_CLK__UART2_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_CLK__UART2_DTE_TX                           = IOMUX_PAD(0x0324, 0x00B4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA00__CSI_DATA20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA00__CSI_DATA20 /;"	d
MX7D_PAD_LCD_DATA00__CSI_DATA20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA00__CSI_DATA20                          = IOMUX_PAD(0x0338, 0x00C8, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA00__EIM_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA00__EIM_DATA0 /;"	d
MX7D_PAD_LCD_DATA00__EIM_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA00__EIM_DATA0                           = IOMUX_PAD(0x0338, 0x00C8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA00__GPIO3_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA00__GPIO3_IO5 /;"	d
MX7D_PAD_LCD_DATA00__GPIO3_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA00__GPIO3_IO5                           = IOMUX_PAD(0x0338, 0x00C8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA00__GPT1_COMPARE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA00__GPT1_COMPARE2 /;"	d
MX7D_PAD_LCD_DATA00__GPT1_COMPARE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA00__GPT1_COMPARE2                       = IOMUX_PAD(0x0338, 0x00C8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA00__LCD_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA00__LCD_DATA0 /;"	d
MX7D_PAD_LCD_DATA00__LCD_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA00__LCD_DATA0                           = IOMUX_PAD(0x0338, 0x00C8, 0, 0x0638,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0 /;"	d
MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0                       = IOMUX_PAD(0x0338, 0x00C8, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA01__CSI_DATA21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA01__CSI_DATA21 /;"	d
MX7D_PAD_LCD_DATA01__CSI_DATA21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA01__CSI_DATA21                          = IOMUX_PAD(0x033C, 0x00CC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA01__EIM_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA01__EIM_DATA1 /;"	d
MX7D_PAD_LCD_DATA01__EIM_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA01__EIM_DATA1                           = IOMUX_PAD(0x033C, 0x00CC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA01__GPIO3_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA01__GPIO3_IO6 /;"	d
MX7D_PAD_LCD_DATA01__GPIO3_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA01__GPIO3_IO6                           = IOMUX_PAD(0x033C, 0x00CC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA01__GPT1_COMPARE3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA01__GPT1_COMPARE3 /;"	d
MX7D_PAD_LCD_DATA01__GPT1_COMPARE3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA01__GPT1_COMPARE3                       = IOMUX_PAD(0x033C, 0x00CC, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA01__LCD_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA01__LCD_DATA1 /;"	d
MX7D_PAD_LCD_DATA01__LCD_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA01__LCD_DATA1                           = IOMUX_PAD(0x033C, 0x00CC, 0, 0x063C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1 /;"	d
MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1                       = IOMUX_PAD(0x033C, 0x00CC, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA02__CSI_DATA22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA02__CSI_DATA22 /;"	d
MX7D_PAD_LCD_DATA02__CSI_DATA22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA02__CSI_DATA22                          = IOMUX_PAD(0x0340, 0x00D0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA02__EIM_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA02__EIM_DATA2 /;"	d
MX7D_PAD_LCD_DATA02__EIM_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA02__EIM_DATA2                           = IOMUX_PAD(0x0340, 0x00D0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA02__GPIO3_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA02__GPIO3_IO7 /;"	d
MX7D_PAD_LCD_DATA02__GPIO3_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA02__GPIO3_IO7                           = IOMUX_PAD(0x0340, 0x00D0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA02__GPT1_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA02__GPT1_CLK /;"	d
MX7D_PAD_LCD_DATA02__GPT1_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA02__GPT1_CLK                            = IOMUX_PAD(0x0340, 0x00D0, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA02__LCD_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA02__LCD_DATA2 /;"	d
MX7D_PAD_LCD_DATA02__LCD_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA02__LCD_DATA2                           = IOMUX_PAD(0x0340, 0x00D0, 0, 0x0640,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2 /;"	d
MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2                       = IOMUX_PAD(0x0340, 0x00D0, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA03__CSI_DATA23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA03__CSI_DATA23 /;"	d
MX7D_PAD_LCD_DATA03__CSI_DATA23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA03__CSI_DATA23                          = IOMUX_PAD(0x0344, 0x00D4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA03__EIM_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA03__EIM_DATA3 /;"	d
MX7D_PAD_LCD_DATA03__EIM_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA03__EIM_DATA3                           = IOMUX_PAD(0x0344, 0x00D4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA03__GPIO3_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA03__GPIO3_IO8 /;"	d
MX7D_PAD_LCD_DATA03__GPIO3_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA03__GPIO3_IO8                           = IOMUX_PAD(0x0344, 0x00D4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1 /;"	d
MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1                       = IOMUX_PAD(0x0344, 0x00D4, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA03__LCD_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA03__LCD_DATA3 /;"	d
MX7D_PAD_LCD_DATA03__LCD_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA03__LCD_DATA3                           = IOMUX_PAD(0x0344, 0x00D4, 0, 0x0644,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3 /;"	d
MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3                       = IOMUX_PAD(0x0344, 0x00D4, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA04__CSI_VSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA04__CSI_VSYNC /;"	d
MX7D_PAD_LCD_DATA04__CSI_VSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA04__CSI_VSYNC                           = IOMUX_PAD(0x0348, 0x00D8, 3, 0x0520,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA04__EIM_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA04__EIM_DATA4 /;"	d
MX7D_PAD_LCD_DATA04__EIM_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA04__EIM_DATA4                           = IOMUX_PAD(0x0348, 0x00D8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA04__GPIO3_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA04__GPIO3_IO9 /;"	d
MX7D_PAD_LCD_DATA04__GPIO3_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA04__GPIO3_IO9                           = IOMUX_PAD(0x0348, 0x00D8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2 /;"	d
MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2                       = IOMUX_PAD(0x0348, 0x00D8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA04__LCD_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA04__LCD_DATA4 /;"	d
MX7D_PAD_LCD_DATA04__LCD_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA04__LCD_DATA4                           = IOMUX_PAD(0x0348, 0x00D8, 0, 0x0648,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4 /;"	d
MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4                       = IOMUX_PAD(0x0348, 0x00D8, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA05__CSI_HSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA05__CSI_HSYNC /;"	d
MX7D_PAD_LCD_DATA05__CSI_HSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA05__CSI_HSYNC                           = IOMUX_PAD(0x034C, 0x00DC, 3, 0x0518,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA05__EIM_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA05__EIM_DATA5 /;"	d
MX7D_PAD_LCD_DATA05__EIM_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA05__EIM_DATA5                           = IOMUX_PAD(0x034C, 0x00DC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA05__GPIO3_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA05__GPIO3_IO10 /;"	d
MX7D_PAD_LCD_DATA05__GPIO3_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA05__GPIO3_IO10                          = IOMUX_PAD(0x034C, 0x00DC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA05__LCD_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA05__LCD_DATA5 /;"	d
MX7D_PAD_LCD_DATA05__LCD_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA05__LCD_DATA5                           = IOMUX_PAD(0x034C, 0x00DC, 0, 0x064C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5 /;"	d
MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5                       = IOMUX_PAD(0x034C, 0x00DC, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA06__CSI_PIXCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA06__CSI_PIXCLK /;"	d
MX7D_PAD_LCD_DATA06__CSI_PIXCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA06__CSI_PIXCLK                          = IOMUX_PAD(0x0350, 0x00E0, 3, 0x051C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA06__EIM_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA06__EIM_DATA6 /;"	d
MX7D_PAD_LCD_DATA06__EIM_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA06__EIM_DATA6                           = IOMUX_PAD(0x0350, 0x00E0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA06__GPIO3_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA06__GPIO3_IO11 /;"	d
MX7D_PAD_LCD_DATA06__GPIO3_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA06__GPIO3_IO11                          = IOMUX_PAD(0x0350, 0x00E0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA06__LCD_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA06__LCD_DATA6 /;"	d
MX7D_PAD_LCD_DATA06__LCD_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA06__LCD_DATA6                           = IOMUX_PAD(0x0350, 0x00E0, 0, 0x0650,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6 /;"	d
MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6                       = IOMUX_PAD(0x0350, 0x00E0, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA07__CSI_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA07__CSI_MCLK /;"	d
MX7D_PAD_LCD_DATA07__CSI_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA07__CSI_MCLK                            = IOMUX_PAD(0x0354, 0x00E4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA07__EIM_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA07__EIM_DATA7 /;"	d
MX7D_PAD_LCD_DATA07__EIM_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA07__EIM_DATA7                           = IOMUX_PAD(0x0354, 0x00E4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA07__GPIO3_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA07__GPIO3_IO12 /;"	d
MX7D_PAD_LCD_DATA07__GPIO3_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA07__GPIO3_IO12                          = IOMUX_PAD(0x0354, 0x00E4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA07__LCD_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA07__LCD_DATA7 /;"	d
MX7D_PAD_LCD_DATA07__LCD_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA07__LCD_DATA7                           = IOMUX_PAD(0x0354, 0x00E4, 0, 0x0654,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7 /;"	d
MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7                       = IOMUX_PAD(0x0354, 0x00E4, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA08__CSI_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA08__CSI_DATA9 /;"	d
MX7D_PAD_LCD_DATA08__CSI_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA08__CSI_DATA9                           = IOMUX_PAD(0x0358, 0x00E8, 3, 0x0514,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA08__EIM_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA08__EIM_DATA8 /;"	d
MX7D_PAD_LCD_DATA08__EIM_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA08__EIM_DATA8                           = IOMUX_PAD(0x0358, 0x00E8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA08__GPIO3_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA08__GPIO3_IO13 /;"	d
MX7D_PAD_LCD_DATA08__GPIO3_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA08__GPIO3_IO13                          = IOMUX_PAD(0x0358, 0x00E8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA08__LCD_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA08__LCD_DATA8 /;"	d
MX7D_PAD_LCD_DATA08__LCD_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA08__LCD_DATA8                           = IOMUX_PAD(0x0358, 0x00E8, 0, 0x0658,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8 /;"	d
MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8                       = IOMUX_PAD(0x0358, 0x00E8, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA09__CSI_DATA8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA09__CSI_DATA8 /;"	d
MX7D_PAD_LCD_DATA09__CSI_DATA8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA09__CSI_DATA8                           = IOMUX_PAD(0x035C, 0x00EC, 3, 0x0510,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA09__EIM_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA09__EIM_DATA9 /;"	d
MX7D_PAD_LCD_DATA09__EIM_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA09__EIM_DATA9                           = IOMUX_PAD(0x035C, 0x00EC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA09__GPIO3_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA09__GPIO3_IO14 /;"	d
MX7D_PAD_LCD_DATA09__GPIO3_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA09__GPIO3_IO14                          = IOMUX_PAD(0x035C, 0x00EC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA09__LCD_DATA9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA09__LCD_DATA9 /;"	d
MX7D_PAD_LCD_DATA09__LCD_DATA9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA09__LCD_DATA9                           = IOMUX_PAD(0x035C, 0x00EC, 0, 0x065C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9 /;"	d
MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9                       = IOMUX_PAD(0x035C, 0x00EC, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA10__CSI_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA10__CSI_DATA7 /;"	d
MX7D_PAD_LCD_DATA10__CSI_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA10__CSI_DATA7                           = IOMUX_PAD(0x0360, 0x00F0, 3, 0x050C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA10__EIM_DATA10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA10__EIM_DATA10 /;"	d
MX7D_PAD_LCD_DATA10__EIM_DATA10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA10__EIM_DATA10                          = IOMUX_PAD(0x0360, 0x00F0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA10__GPIO3_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA10__GPIO3_IO15 /;"	d
MX7D_PAD_LCD_DATA10__GPIO3_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA10__GPIO3_IO15                          = IOMUX_PAD(0x0360, 0x00F0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA10__LCD_DATA10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA10__LCD_DATA10 /;"	d
MX7D_PAD_LCD_DATA10__LCD_DATA10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA10__LCD_DATA10                          = IOMUX_PAD(0x0360, 0x00F0, 0, 0x0660,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10 /;"	d
MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10                      = IOMUX_PAD(0x0360, 0x00F0, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA11__CSI_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA11__CSI_DATA6 /;"	d
MX7D_PAD_LCD_DATA11__CSI_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA11__CSI_DATA6                           = IOMUX_PAD(0x0364, 0x00F4, 3, 0x0508,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA11__EIM_DATA11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA11__EIM_DATA11 /;"	d
MX7D_PAD_LCD_DATA11__EIM_DATA11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA11__EIM_DATA11                          = IOMUX_PAD(0x0364, 0x00F4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA11__GPIO3_IO16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA11__GPIO3_IO16 /;"	d
MX7D_PAD_LCD_DATA11__GPIO3_IO16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA11__GPIO3_IO16                          = IOMUX_PAD(0x0364, 0x00F4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA11__LCD_DATA11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA11__LCD_DATA11 /;"	d
MX7D_PAD_LCD_DATA11__LCD_DATA11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA11__LCD_DATA11                          = IOMUX_PAD(0x0364, 0x00F4, 0, 0x0664,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11 /;"	d
MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11                      = IOMUX_PAD(0x0364, 0x00F4, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA12__CSI_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA12__CSI_DATA5 /;"	d
MX7D_PAD_LCD_DATA12__CSI_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA12__CSI_DATA5                           = IOMUX_PAD(0x0368, 0x00F8, 3, 0x0504,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA12__EIM_DATA12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA12__EIM_DATA12 /;"	d
MX7D_PAD_LCD_DATA12__EIM_DATA12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA12__EIM_DATA12                          = IOMUX_PAD(0x0368, 0x00F8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA12__GPIO3_IO17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA12__GPIO3_IO17 /;"	d
MX7D_PAD_LCD_DATA12__GPIO3_IO17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA12__GPIO3_IO17                          = IOMUX_PAD(0x0368, 0x00F8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA12__LCD_DATA12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA12__LCD_DATA12 /;"	d
MX7D_PAD_LCD_DATA12__LCD_DATA12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA12__LCD_DATA12                          = IOMUX_PAD(0x0368, 0x00F8, 0, 0x0668,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12 /;"	d
MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12                      = IOMUX_PAD(0x0368, 0x00F8, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA13__CSI_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA13__CSI_DATA4 /;"	d
MX7D_PAD_LCD_DATA13__CSI_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA13__CSI_DATA4                           = IOMUX_PAD(0x036C, 0x00FC, 3, 0x0500,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA13__EIM_DATA13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA13__EIM_DATA13 /;"	d
MX7D_PAD_LCD_DATA13__EIM_DATA13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA13__EIM_DATA13                          = IOMUX_PAD(0x036C, 0x00FC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA13__GPIO3_IO18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA13__GPIO3_IO18 /;"	d
MX7D_PAD_LCD_DATA13__GPIO3_IO18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA13__GPIO3_IO18                          = IOMUX_PAD(0x036C, 0x00FC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA13__LCD_DATA13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA13__LCD_DATA13 /;"	d
MX7D_PAD_LCD_DATA13__LCD_DATA13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA13__LCD_DATA13                          = IOMUX_PAD(0x036C, 0x00FC, 0, 0x066C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13 /;"	d
MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13                      = IOMUX_PAD(0x036C, 0x00FC, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA14__CSI_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA14__CSI_DATA3 /;"	d
MX7D_PAD_LCD_DATA14__CSI_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA14__CSI_DATA3                           = IOMUX_PAD(0x0370, 0x0100, 3, 0x04FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA14__EIM_DATA14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA14__EIM_DATA14 /;"	d
MX7D_PAD_LCD_DATA14__EIM_DATA14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA14__EIM_DATA14                          = IOMUX_PAD(0x0370, 0x0100, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA14__GPIO3_IO19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA14__GPIO3_IO19 /;"	d
MX7D_PAD_LCD_DATA14__GPIO3_IO19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA14__GPIO3_IO19                          = IOMUX_PAD(0x0370, 0x0100, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA14__LCD_DATA14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA14__LCD_DATA14 /;"	d
MX7D_PAD_LCD_DATA14__LCD_DATA14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA14__LCD_DATA14                          = IOMUX_PAD(0x0370, 0x0100, 0, 0x0670,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14 /;"	d
MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14                      = IOMUX_PAD(0x0370, 0x0100, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA15__CSI_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA15__CSI_DATA2 /;"	d
MX7D_PAD_LCD_DATA15__CSI_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA15__CSI_DATA2                           = IOMUX_PAD(0x0374, 0x0104, 3, 0x04F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA15__EIM_DATA15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA15__EIM_DATA15 /;"	d
MX7D_PAD_LCD_DATA15__EIM_DATA15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA15__EIM_DATA15                          = IOMUX_PAD(0x0374, 0x0104, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA15__GPIO3_IO20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA15__GPIO3_IO20 /;"	d
MX7D_PAD_LCD_DATA15__GPIO3_IO20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA15__GPIO3_IO20                          = IOMUX_PAD(0x0374, 0x0104, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA15__LCD_DATA15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA15__LCD_DATA15 /;"	d
MX7D_PAD_LCD_DATA15__LCD_DATA15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA15__LCD_DATA15                          = IOMUX_PAD(0x0374, 0x0104, 0, 0x0674,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15 /;"	d
MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15                      = IOMUX_PAD(0x0374, 0x0104, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA16__CSI_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA16__CSI_DATA1 /;"	d
MX7D_PAD_LCD_DATA16__CSI_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA16__CSI_DATA1                           = IOMUX_PAD(0x0378, 0x0108, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA16__EIM_CRE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA16__EIM_CRE /;"	d
MX7D_PAD_LCD_DATA16__EIM_CRE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA16__EIM_CRE                             = IOMUX_PAD(0x0378, 0x0108, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4 /;"	d
MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4                      = IOMUX_PAD(0x0378, 0x0108, 1, 0x0594,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA16__GPIO3_IO21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA16__GPIO3_IO21 /;"	d
MX7D_PAD_LCD_DATA16__GPIO3_IO21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA16__GPIO3_IO21                          = IOMUX_PAD(0x0378, 0x0108, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA16__LCD_DATA16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA16__LCD_DATA16 /;"	d
MX7D_PAD_LCD_DATA16__LCD_DATA16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA16__LCD_DATA16                          = IOMUX_PAD(0x0378, 0x0108, 0, 0x0678,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16 /;"	d
MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16                      = IOMUX_PAD(0x0378, 0x0108, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA17__CSI_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA17__CSI_DATA0 /;"	d
MX7D_PAD_LCD_DATA17__CSI_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA17__CSI_DATA0                           = IOMUX_PAD(0x037C, 0x010C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN /;"	d
MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN                    = IOMUX_PAD(0x037C, 0x010C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5 /;"	d
MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5                      = IOMUX_PAD(0x037C, 0x010C, 1, 0x0598,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA17__GPIO3_IO22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA17__GPIO3_IO22 /;"	d
MX7D_PAD_LCD_DATA17__GPIO3_IO22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA17__GPIO3_IO22                          = IOMUX_PAD(0x037C, 0x010C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA17__LCD_DATA17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA17__LCD_DATA17 /;"	d
MX7D_PAD_LCD_DATA17__LCD_DATA17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA17__LCD_DATA17                          = IOMUX_PAD(0x037C, 0x010C, 0, 0x067C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17 /;"	d
MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17                      = IOMUX_PAD(0x037C, 0x010C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO /;"	d
MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO                 = IOMUX_PAD(0x0380, 0x0110, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__CSI_DATA15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__CSI_DATA15 /;"	d
MX7D_PAD_LCD_DATA18__CSI_DATA15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__CSI_DATA15                          = IOMUX_PAD(0x0380, 0x0110, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__EIM_CS2_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__EIM_CS2_B /;"	d
MX7D_PAD_LCD_DATA18__EIM_CS2_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__EIM_CS2_B                           = IOMUX_PAD(0x0380, 0x0110, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6 /;"	d
MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6                      = IOMUX_PAD(0x0380, 0x0110, 1, 0x059C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__GPIO3_IO23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__GPIO3_IO23 /;"	d
MX7D_PAD_LCD_DATA18__GPIO3_IO23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__GPIO3_IO23                          = IOMUX_PAD(0x0380, 0x0110, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__LCD_DATA18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__LCD_DATA18 /;"	d
MX7D_PAD_LCD_DATA18__LCD_DATA18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__LCD_DATA18                          = IOMUX_PAD(0x0380, 0x0110, 0, 0x0680,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18 /;"	d
MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18                      = IOMUX_PAD(0x0380, 0x0110, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA19__CSI_DATA14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA19__CSI_DATA14 /;"	d
MX7D_PAD_LCD_DATA19__CSI_DATA14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA19__CSI_DATA14                          = IOMUX_PAD(0x0384, 0x0114, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA19__EIM_CS3_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA19__EIM_CS3_B /;"	d
MX7D_PAD_LCD_DATA19__EIM_CS3_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA19__EIM_CS3_B                           = IOMUX_PAD(0x0384, 0x0114, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7 /;"	d
MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7                      = IOMUX_PAD(0x0384, 0x0114, 1, 0x05A0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA19__GPIO3_IO24	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA19__GPIO3_IO24 /;"	d
MX7D_PAD_LCD_DATA19__GPIO3_IO24	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA19__GPIO3_IO24                          = IOMUX_PAD(0x0384, 0x0114, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA19__LCD_DATA19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA19__LCD_DATA19 /;"	d
MX7D_PAD_LCD_DATA19__LCD_DATA19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA19__LCD_DATA19                          = IOMUX_PAD(0x0384, 0x0114, 0, 0x0684,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19 /;"	d
MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19                      = IOMUX_PAD(0x0384, 0x0114, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__CSI_DATA13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__CSI_DATA13 /;"	d
MX7D_PAD_LCD_DATA20__CSI_DATA13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__CSI_DATA13                          = IOMUX_PAD(0x0388, 0x0118, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__EIM_ADDR23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__EIM_ADDR23 /;"	d
MX7D_PAD_LCD_DATA20__EIM_ADDR23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__EIM_ADDR23                          = IOMUX_PAD(0x0388, 0x0118, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT /;"	d
MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT               = IOMUX_PAD(0x0388, 0x0118, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4 /;"	d
MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4                      = IOMUX_PAD(0x0388, 0x0118, 1, 0x05BC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__GPIO3_IO25	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__GPIO3_IO25 /;"	d
MX7D_PAD_LCD_DATA20__GPIO3_IO25	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__GPIO3_IO25                          = IOMUX_PAD(0x0388, 0x0118, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__I2C3_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__I2C3_SCL /;"	d
MX7D_PAD_LCD_DATA20__I2C3_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__I2C3_SCL                            = IOMUX_PAD(0x0388, 0x0118, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA20__LCD_DATA20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA20__LCD_DATA20 /;"	d
MX7D_PAD_LCD_DATA20__LCD_DATA20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA20__LCD_DATA20                          = IOMUX_PAD(0x0388, 0x0118, 0, 0x0688,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__CSI_DATA12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__CSI_DATA12 /;"	d
MX7D_PAD_LCD_DATA21__CSI_DATA12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__CSI_DATA12                          = IOMUX_PAD(0x038C, 0x011C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__EIM_ADDR24	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__EIM_ADDR24 /;"	d
MX7D_PAD_LCD_DATA21__EIM_ADDR24	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__EIM_ADDR24                          = IOMUX_PAD(0x038C, 0x011C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT /;"	d
MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT               = IOMUX_PAD(0x038C, 0x011C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5 /;"	d
MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5                      = IOMUX_PAD(0x038C, 0x011C, 1, 0x05C0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__GPIO3_IO26	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__GPIO3_IO26 /;"	d
MX7D_PAD_LCD_DATA21__GPIO3_IO26	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__GPIO3_IO26                          = IOMUX_PAD(0x038C, 0x011C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__I2C3_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__I2C3_SDA /;"	d
MX7D_PAD_LCD_DATA21__I2C3_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__I2C3_SDA                            = IOMUX_PAD(0x038C, 0x011C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA21__LCD_DATA21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA21__LCD_DATA21 /;"	d
MX7D_PAD_LCD_DATA21__LCD_DATA21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA21__LCD_DATA21                          = IOMUX_PAD(0x038C, 0x011C, 0, 0x068C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__CSI_DATA11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__CSI_DATA11 /;"	d
MX7D_PAD_LCD_DATA22__CSI_DATA11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__CSI_DATA11                          = IOMUX_PAD(0x0390, 0x0120, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__EIM_ADDR25	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__EIM_ADDR25 /;"	d
MX7D_PAD_LCD_DATA22__EIM_ADDR25	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__EIM_ADDR25                          = IOMUX_PAD(0x0390, 0x0120, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT /;"	d
MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT               = IOMUX_PAD(0x0390, 0x0120, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6 /;"	d
MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6                      = IOMUX_PAD(0x0390, 0x0120, 1, 0x05C4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__GPIO3_IO27	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__GPIO3_IO27 /;"	d
MX7D_PAD_LCD_DATA22__GPIO3_IO27	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__GPIO3_IO27                          = IOMUX_PAD(0x0390, 0x0120, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__I2C4_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__I2C4_SCL /;"	d
MX7D_PAD_LCD_DATA22__I2C4_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__I2C4_SCL                            = IOMUX_PAD(0x0390, 0x0120, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA22__LCD_DATA22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA22__LCD_DATA22 /;"	d
MX7D_PAD_LCD_DATA22__LCD_DATA22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA22__LCD_DATA22                          = IOMUX_PAD(0x0390, 0x0120, 0, 0x0690,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__CSI_DATA10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__CSI_DATA10 /;"	d
MX7D_PAD_LCD_DATA23__CSI_DATA10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__CSI_DATA10                          = IOMUX_PAD(0x0394, 0x0124, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__EIM_ADDR26	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__EIM_ADDR26 /;"	d
MX7D_PAD_LCD_DATA23__EIM_ADDR26	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__EIM_ADDR26                          = IOMUX_PAD(0x0394, 0x0124, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT /;"	d
MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT               = IOMUX_PAD(0x0394, 0x0124, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7 /;"	d
MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7                      = IOMUX_PAD(0x0394, 0x0124, 1, 0x05C8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__GPIO3_IO28	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__GPIO3_IO28 /;"	d
MX7D_PAD_LCD_DATA23__GPIO3_IO28	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__GPIO3_IO28                          = IOMUX_PAD(0x0394, 0x0124, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__I2C4_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__I2C4_SDA /;"	d
MX7D_PAD_LCD_DATA23__I2C4_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__I2C4_SDA                            = IOMUX_PAD(0x0394, 0x0124, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_DATA23__LCD_DATA23	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_DATA23__LCD_DATA23 /;"	d
MX7D_PAD_LCD_DATA23__LCD_DATA23	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_DATA23__LCD_DATA23                          = IOMUX_PAD(0x0394, 0x0124, 0, 0x0694,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__CSI_DATA17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__CSI_DATA17 /;"	d
MX7D_PAD_LCD_ENABLE__CSI_DATA17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__CSI_DATA17                          = IOMUX_PAD(0x0328, 0x00B8, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI /;"	d
MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI                         = IOMUX_PAD(0x0328, 0x00B8, 1, 0x055C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN /;"	d
MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN                = IOMUX_PAD(0x0328, 0x00B8, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__GPIO3_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__GPIO3_IO1 /;"	d
MX7D_PAD_LCD_ENABLE__GPIO3_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__GPIO3_IO1                           = IOMUX_PAD(0x0328, 0x00B8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__LCD_ENABLE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__LCD_ENABLE /;"	d
MX7D_PAD_LCD_ENABLE__LCD_ENABLE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__LCD_ENABLE                          = IOMUX_PAD(0x0328, 0x00B8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__UART2_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__UART2_DCE_TX /;"	d
MX7D_PAD_LCD_ENABLE__UART2_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__UART2_DCE_TX                        = IOMUX_PAD(0x0328, 0x00B8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_ENABLE__UART2_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_ENABLE__UART2_DTE_RX /;"	d
MX7D_PAD_LCD_ENABLE__UART2_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_ENABLE__UART2_DTE_RX                        = IOMUX_PAD(0x0328, 0x00B8, 4, 0x06FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__CSI_DATA18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__CSI_DATA18 /;"	d
MX7D_PAD_LCD_HSYNC__CSI_DATA18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__CSI_DATA18                           = IOMUX_PAD(0x032C, 0x00BC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK /;"	d
MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK                          = IOMUX_PAD(0x032C, 0x00BC, 1, 0x0554,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN /;"	d
MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN                 = IOMUX_PAD(0x032C, 0x00BC, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__GPIO3_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__GPIO3_IO2 /;"	d
MX7D_PAD_LCD_HSYNC__GPIO3_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__GPIO3_IO2                            = IOMUX_PAD(0x032C, 0x00BC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__LCD_HSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__LCD_HSYNC /;"	d
MX7D_PAD_LCD_HSYNC__LCD_HSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__LCD_HSYNC                            = IOMUX_PAD(0x032C, 0x00BC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS /;"	d
MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS                        = IOMUX_PAD(0x032C, 0x00BC, 4, 0x06F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS /;"	d
MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS                        = IOMUX_PAD(0x032C, 0x00BC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI /;"	d
MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI                  = IOMUX_PAD(0x0334, 0x00C4, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_RESET__CSI_FIELD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_RESET__CSI_FIELD /;"	d
MX7D_PAD_LCD_RESET__CSI_FIELD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_RESET__CSI_FIELD                            = IOMUX_PAD(0x0334, 0x00C4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_RESET__EIM_DTACK_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_RESET__EIM_DTACK_B /;"	d
MX7D_PAD_LCD_RESET__EIM_DTACK_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_RESET__EIM_DTACK_B                          = IOMUX_PAD(0x0334, 0x00C4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_RESET__GPIO3_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_RESET__GPIO3_IO4 /;"	d
MX7D_PAD_LCD_RESET__GPIO3_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_RESET__GPIO3_IO4                            = IOMUX_PAD(0x0334, 0x00C4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_RESET__GPT1_COMPARE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_RESET__GPT1_COMPARE1 /;"	d
MX7D_PAD_LCD_RESET__GPT1_COMPARE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_RESET__GPT1_COMPARE1                        = IOMUX_PAD(0x0334, 0x00C4, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_RESET__LCD_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_RESET__LCD_RESET /;"	d
MX7D_PAD_LCD_RESET__LCD_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_RESET__LCD_RESET                            = IOMUX_PAD(0x0334, 0x00C4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__CSI_DATA19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__CSI_DATA19 /;"	d
MX7D_PAD_LCD_VSYNC__CSI_DATA19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__CSI_DATA19                           = IOMUX_PAD(0x0330, 0x00C0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__ECSPI4_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__ECSPI4_SS0 /;"	d
MX7D_PAD_LCD_VSYNC__ECSPI4_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__ECSPI4_SS0                           = IOMUX_PAD(0x0330, 0x00C0, 1, 0x0560,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN /;"	d
MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN                 = IOMUX_PAD(0x0330, 0x00C0, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__GPIO3_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__GPIO3_IO3 /;"	d
MX7D_PAD_LCD_VSYNC__GPIO3_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__GPIO3_IO3                            = IOMUX_PAD(0x0330, 0x00C0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__LCD_VSYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__LCD_VSYNC /;"	d
MX7D_PAD_LCD_VSYNC__LCD_VSYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__LCD_VSYNC                            = IOMUX_PAD(0x0330, 0x00C0, 0, 0x0698,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS /;"	d
MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS                        = IOMUX_PAD(0x0330, 0x00C0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS /;"	d
MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS                        = IOMUX_PAD(0x0330, 0x00C0, 4, 0x06F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY /;"	d
MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY                       = IOMUX_PAD(0x0488, 0x0218, 3, 0x04F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB /;"	d
MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB                       = IOMUX_PAD(0x0488, 0x0218, 4, 0x05D0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__GPIO6_IO18	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__GPIO6_IO18 /;"	d
MX7D_PAD_SAI1_MCLK__GPIO6_IO18	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__GPIO6_IO18                           = IOMUX_PAD(0x0488, 0x0218, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__NAND_WP_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__NAND_WP_B /;"	d
MX7D_PAD_SAI1_MCLK__NAND_WP_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__NAND_WP_B                            = IOMUX_PAD(0x0488, 0x0218, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__SAI1_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__SAI1_MCLK /;"	d
MX7D_PAD_SAI1_MCLK__SAI1_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__SAI1_MCLK                            = IOMUX_PAD(0x0488, 0x0218, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__SAI2_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__SAI2_MCLK /;"	d
MX7D_PAD_SAI1_MCLK__SAI2_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__SAI2_MCLK                            = IOMUX_PAD(0x0488, 0x0218, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK /;"	d
MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK                       = IOMUX_PAD(0x0488, 0x0218, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA /;"	d
MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA                    = IOMUX_PAD(0x0484, 0x0214, 4, 0x05CC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 /;"	d
MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17                        = IOMUX_PAD(0x0484, 0x0214, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA /;"	d
MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA                          = IOMUX_PAD(0x0484, 0x0214, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT /;"	d
MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT                          = IOMUX_PAD(0x0484, 0x0214, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B /;"	d
MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B                        = IOMUX_PAD(0x0484, 0x0214, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK /;"	d
MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK                      = IOMUX_PAD(0x0484, 0x0214, 0, 0x069C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK /;"	d
MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK                      = IOMUX_PAD(0x0484, 0x0214, 2, 0x06B0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1 /;"	d
MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1                  = IOMUX_PAD(0x0484, 0x0214, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX /;"	d
MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX                       = IOMUX_PAD(0x0470, 0x0200, 3, 0x04DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 /;"	d
MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12                        = IOMUX_PAD(0x0470, 0x0200, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B /;"	d
MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B                        = IOMUX_PAD(0x0470, 0x0200, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 /;"	d
MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0                     = IOMUX_PAD(0x0470, 0x0200, 0, 0x06A0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD /;"	d
MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD                   = IOMUX_PAD(0x0470, 0x0200, 4, 0x06E4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET /;"	d
MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET                  = IOMUX_PAD(0x0470, 0x0200, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX /;"	d
MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX                      = IOMUX_PAD(0x0470, 0x0200, 2, 0x0714,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX /;"	d
MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX                      = IOMUX_PAD(0x0470, 0x0200, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 /;"	d
MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16                        = IOMUX_PAD(0x0480, 0x0210, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL /;"	d
MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL                          = IOMUX_PAD(0x0480, 0x0210, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT /;"	d
MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT                         = IOMUX_PAD(0x0480, 0x0210, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B /;"	d
MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B                        = IOMUX_PAD(0x0480, 0x0210, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC /;"	d
MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC                      = IOMUX_PAD(0x0480, 0x0210, 0, 0x06A4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC /;"	d
MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC                      = IOMUX_PAD(0x0480, 0x0210, 2, 0x06B8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD /;"	d
MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD                     = IOMUX_PAD(0x0480, 0x0210, 4, 0x06E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0 /;"	d
MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0                  = IOMUX_PAD(0x0480, 0x0210, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX /;"	d
MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX                       = IOMUX_PAD(0x0474, 0x0204, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 /;"	d
MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13                        = IOMUX_PAD(0x0474, 0x0204, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B /;"	d
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B                        = IOMUX_PAD(0x0474, 0x0204, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK /;"	d
MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK                      = IOMUX_PAD(0x0474, 0x0204, 0, 0x06A8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK /;"	d
MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK                    = IOMUX_PAD(0x0474, 0x0204, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET /;"	d
MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET                   = IOMUX_PAD(0x0474, 0x0204, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX /;"	d
MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX                      = IOMUX_PAD(0x0474, 0x0204, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX /;"	d
MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX                      = IOMUX_PAD(0x0474, 0x0204, 2, 0x0714,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX /;"	d
MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX                       = IOMUX_PAD(0x047C, 0x020C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 /;"	d
MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15                        = IOMUX_PAD(0x047C, 0x020C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__NAND_READY_B /;"	d
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__NAND_READY_B                      = IOMUX_PAD(0x047C, 0x020C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 /;"	d
MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0                     = IOMUX_PAD(0x047C, 0x020C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN /;"	d
MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN                   = IOMUX_PAD(0x047C, 0x020C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET /;"	d
MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET                  = IOMUX_PAD(0x047C, 0x020C, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS /;"	d
MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS                     = IOMUX_PAD(0x047C, 0x020C, 2, 0x0710,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS /;"	d
MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS                     = IOMUX_PAD(0x047C, 0x020C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX /;"	d
MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX                       = IOMUX_PAD(0x0478, 0x0208, 3, 0x04E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 /;"	d
MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14                        = IOMUX_PAD(0x0478, 0x0208, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__NAND_DQS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__NAND_DQS /;"	d
MX7D_PAD_SAI1_TX_SYNC__NAND_DQS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__NAND_DQS                          = IOMUX_PAD(0x0478, 0x0208, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC /;"	d
MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC                      = IOMUX_PAD(0x0478, 0x0208, 0, 0x06AC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B /;"	d
MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B                  = IOMUX_PAD(0x0478, 0x0208, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT /;"	d
MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT                      = IOMUX_PAD(0x0478, 0x0208, 7, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS /;"	d
MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS                     = IOMUX_PAD(0x0478, 0x0208, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS /;"	d
MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS                     = IOMUX_PAD(0x0478, 0x0208, 2, 0x0710,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK /;"	d
MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK                       = IOMUX_PAD(0x0494, 0x0224, 1, 0x0544,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6 /;"	d
MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6                    = IOMUX_PAD(0x0494, 0x0224, 4, 0x05C4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21 /;"	d
MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21                        = IOMUX_PAD(0x0494, 0x0224, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__KPP_COL7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__KPP_COL7 /;"	d
MX7D_PAD_SAI2_RX_DATA__KPP_COL7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__KPP_COL7                          = IOMUX_PAD(0x0494, 0x0224, 6, 0x0610,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0 /;"	d
MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0                     = IOMUX_PAD(0x0494, 0x0224, 0, 0x06B4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS /;"	d
MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS                     = IOMUX_PAD(0x0494, 0x0224, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS /;"	d
MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS                     = IOMUX_PAD(0x0494, 0x0224, 3, 0x06F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS /;"	d
MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS                     = IOMUX_PAD(0x0494, 0x0224, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS /;"	d
MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS                     = IOMUX_PAD(0x0494, 0x0224, 2, 0x0708,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI /;"	d
MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI                       = IOMUX_PAD(0x0490, 0x0220, 1, 0x054C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5 /;"	d
MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5                    = IOMUX_PAD(0x0490, 0x0220, 4, 0x05C0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20 /;"	d
MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20                        = IOMUX_PAD(0x0490, 0x0220, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK /;"	d
MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK                      = IOMUX_PAD(0x0490, 0x0220, 0, 0x06BC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS /;"	d
MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS                     = IOMUX_PAD(0x0490, 0x0220, 3, 0x06F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS /;"	d
MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS                     = IOMUX_PAD(0x0490, 0x0220, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX /;"	d
MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX                      = IOMUX_PAD(0x0490, 0x0220, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX /;"	d
MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX                      = IOMUX_PAD(0x0490, 0x0220, 2, 0x070C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0 /;"	d
MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0                        = IOMUX_PAD(0x0498, 0x0228, 1, 0x0550,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7 /;"	d
MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7                    = IOMUX_PAD(0x0498, 0x0228, 4, 0x05C8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 /;"	d
MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22                        = IOMUX_PAD(0x0498, 0x0228, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__KPP_ROW7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__KPP_ROW7 /;"	d
MX7D_PAD_SAI2_TX_DATA__KPP_ROW7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__KPP_ROW7                          = IOMUX_PAD(0x0498, 0x0228, 6, 0x0630,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0 /;"	d
MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0                     = IOMUX_PAD(0x0498, 0x0228, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS /;"	d
MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS                     = IOMUX_PAD(0x0498, 0x0228, 3, 0x06F8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS /;"	d
MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS                     = IOMUX_PAD(0x0498, 0x0228, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS /;"	d
MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS                     = IOMUX_PAD(0x0498, 0x0228, 2, 0x0708,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS /;"	d
MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS                     = IOMUX_PAD(0x0498, 0x0228, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO /;"	d
MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO                       = IOMUX_PAD(0x048C, 0x021C, 1, 0x0548,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4 /;"	d
MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4                    = IOMUX_PAD(0x048C, 0x021C, 4, 0x05BC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19 /;"	d
MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19                        = IOMUX_PAD(0x048C, 0x021C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC /;"	d
MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC                      = IOMUX_PAD(0x048C, 0x021C, 0, 0x06C0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS /;"	d
MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS                     = IOMUX_PAD(0x048C, 0x021C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS /;"	d
MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS                     = IOMUX_PAD(0x048C, 0x021C, 3, 0x06F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX /;"	d
MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX                      = IOMUX_PAD(0x048C, 0x021C, 2, 0x070C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX /;"	d
MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX                      = IOMUX_PAD(0x048C, 0x021C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__CCM_CLKO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__CCM_CLKO1 /;"	d
MX7D_PAD_SD1_CD_B__CCM_CLKO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__CCM_CLKO1                             = IOMUX_PAD(0x03F8, 0x0188, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__ECSPI4_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__ECSPI4_MISO /;"	d
MX7D_PAD_SD1_CD_B__ECSPI4_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__ECSPI4_MISO                           = IOMUX_PAD(0x03F8, 0x0188, 3, 0x0558,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0 /;"	d
MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0                        = IOMUX_PAD(0x03F8, 0x0188, 4, 0x0584,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__GPIO5_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__GPIO5_IO0 /;"	d
MX7D_PAD_SD1_CD_B__GPIO5_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__GPIO5_IO0                             = IOMUX_PAD(0x03F8, 0x0188, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__SD1_CD_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__SD1_CD_B /;"	d
MX7D_PAD_SD1_CD_B__SD1_CD_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__SD1_CD_B                              = IOMUX_PAD(0x03F8, 0x0188, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__UART6_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__UART6_DCE_RX /;"	d
MX7D_PAD_SD1_CD_B__UART6_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__UART6_DCE_RX                          = IOMUX_PAD(0x03F8, 0x0188, 2, 0x071C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CD_B__UART6_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CD_B__UART6_DTE_TX /;"	d
MX7D_PAD_SD1_CD_B__UART6_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CD_B__UART6_DTE_TX                          = IOMUX_PAD(0x03F8, 0x0188, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__ECSPI4_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__ECSPI4_SS0 /;"	d
MX7D_PAD_SD1_CLK__ECSPI4_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__ECSPI4_SS0                             = IOMUX_PAD(0x0404, 0x0194, 3, 0x0560,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3 /;"	d
MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3                         = IOMUX_PAD(0x0404, 0x0194, 4, 0x0590,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__GPIO5_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__GPIO5_IO3 /;"	d
MX7D_PAD_SD1_CLK__GPIO5_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__GPIO5_IO3                              = IOMUX_PAD(0x0404, 0x0194, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__SAI3_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__SAI3_RX_SYNC /;"	d
MX7D_PAD_SD1_CLK__SAI3_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__SAI3_RX_SYNC                           = IOMUX_PAD(0x0404, 0x0194, 1, 0x06CC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__SD1_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__SD1_CLK /;"	d
MX7D_PAD_SD1_CLK__SD1_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__SD1_CLK                                = IOMUX_PAD(0x0404, 0x0194, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__UART6_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__UART6_DCE_CTS /;"	d
MX7D_PAD_SD1_CLK__UART6_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__UART6_DCE_CTS                          = IOMUX_PAD(0x0404, 0x0194, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CLK__UART6_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CLK__UART6_DTE_RTS /;"	d
MX7D_PAD_SD1_CLK__UART6_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CLK__UART6_DTE_RTS                          = IOMUX_PAD(0x0404, 0x0194, 2, 0x0718,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CMD__ECSPI4_SS1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CMD__ECSPI4_SS1 /;"	d
MX7D_PAD_SD1_CMD__ECSPI4_SS1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CMD__ECSPI4_SS1                             = IOMUX_PAD(0x0408, 0x0198, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0 /;"	d
MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0                         = IOMUX_PAD(0x0408, 0x0198, 4, 0x05AC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CMD__GPIO5_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CMD__GPIO5_IO4 /;"	d
MX7D_PAD_SD1_CMD__GPIO5_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CMD__GPIO5_IO4                              = IOMUX_PAD(0x0408, 0x0198, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CMD__SAI3_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CMD__SAI3_RX_BCLK /;"	d
MX7D_PAD_SD1_CMD__SAI3_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CMD__SAI3_RX_BCLK                           = IOMUX_PAD(0x0408, 0x0198, 1, 0x06C4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_CMD__SD1_CMD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_CMD__SD1_CMD /;"	d
MX7D_PAD_SD1_CMD__SD1_CMD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_CMD__SD1_CMD                                = IOMUX_PAD(0x0408, 0x0198, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1 /;"	d
MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1                         = IOMUX_PAD(0x040C, 0x019C, 6, 0x04E4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__ECSPI4_SS2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__ECSPI4_SS2 /;"	d
MX7D_PAD_SD1_DATA0__ECSPI4_SS2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__ECSPI4_SS2                           = IOMUX_PAD(0x040C, 0x019C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1 /;"	d
MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1                       = IOMUX_PAD(0x040C, 0x019C, 4, 0x05B0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__GPIO5_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__GPIO5_IO5 /;"	d
MX7D_PAD_SD1_DATA0__GPIO5_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__GPIO5_IO5                            = IOMUX_PAD(0x040C, 0x019C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0 /;"	d
MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0                        = IOMUX_PAD(0x040C, 0x019C, 1, 0x06C8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__SD1_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__SD1_DATA0 /;"	d
MX7D_PAD_SD1_DATA0__SD1_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__SD1_DATA0                            = IOMUX_PAD(0x040C, 0x019C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__UART7_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__UART7_DCE_RX /;"	d
MX7D_PAD_SD1_DATA0__UART7_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__UART7_DCE_RX                         = IOMUX_PAD(0x040C, 0x019C, 2, 0x0724,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA0__UART7_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA0__UART7_DTE_TX /;"	d
MX7D_PAD_SD1_DATA0__UART7_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA0__UART7_DTE_TX                         = IOMUX_PAD(0x040C, 0x019C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2 /;"	d
MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2                         = IOMUX_PAD(0x0410, 0x01A0, 6, 0x04E8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__ECSPI4_SS3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__ECSPI4_SS3 /;"	d
MX7D_PAD_SD1_DATA1__ECSPI4_SS3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__ECSPI4_SS3                           = IOMUX_PAD(0x0410, 0x01A0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2 /;"	d
MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2                       = IOMUX_PAD(0x0410, 0x01A0, 4, 0x05B4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__GPIO5_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__GPIO5_IO6 /;"	d
MX7D_PAD_SD1_DATA1__GPIO5_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__GPIO5_IO6                            = IOMUX_PAD(0x0410, 0x01A0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK /;"	d
MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK                         = IOMUX_PAD(0x0410, 0x01A0, 1, 0x06D0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__SD1_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__SD1_DATA1 /;"	d
MX7D_PAD_SD1_DATA1__SD1_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__SD1_DATA1                            = IOMUX_PAD(0x0410, 0x01A0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__UART7_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__UART7_DCE_TX /;"	d
MX7D_PAD_SD1_DATA1__UART7_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__UART7_DCE_TX                         = IOMUX_PAD(0x0410, 0x01A0, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA1__UART7_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA1__UART7_DTE_RX /;"	d
MX7D_PAD_SD1_DATA1__UART7_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA1__UART7_DTE_RX                         = IOMUX_PAD(0x0410, 0x01A0, 2, 0x0724,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3 /;"	d
MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3                         = IOMUX_PAD(0x0414, 0x01A4, 6, 0x04EC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__ECSPI4_RDY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__ECSPI4_RDY /;"	d
MX7D_PAD_SD1_DATA2__ECSPI4_RDY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__ECSPI4_RDY                           = IOMUX_PAD(0x0414, 0x01A4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3 /;"	d
MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3                       = IOMUX_PAD(0x0414, 0x01A4, 4, 0x05B8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__GPIO5_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__GPIO5_IO7 /;"	d
MX7D_PAD_SD1_DATA2__GPIO5_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__GPIO5_IO7                            = IOMUX_PAD(0x0414, 0x01A4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC /;"	d
MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC                         = IOMUX_PAD(0x0414, 0x01A4, 1, 0x06D4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__SD1_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__SD1_DATA2 /;"	d
MX7D_PAD_SD1_DATA2__SD1_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__SD1_DATA2                            = IOMUX_PAD(0x0414, 0x01A4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__UART7_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__UART7_DCE_CTS /;"	d
MX7D_PAD_SD1_DATA2__UART7_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__UART7_DCE_CTS                        = IOMUX_PAD(0x0414, 0x01A4, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA2__UART7_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA2__UART7_DTE_RTS /;"	d
MX7D_PAD_SD1_DATA2__UART7_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA2__UART7_DTE_RTS                        = IOMUX_PAD(0x0414, 0x01A4, 2, 0x0720,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4 /;"	d
MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4                         = IOMUX_PAD(0x0418, 0x01A8, 6, 0x04F0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__ECSPI3_SS1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__ECSPI3_SS1 /;"	d
MX7D_PAD_SD1_DATA3__ECSPI3_SS1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__ECSPI3_SS1                           = IOMUX_PAD(0x0418, 0x01A8, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA /;"	d
MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA                       = IOMUX_PAD(0x0418, 0x01A8, 4, 0x05A4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__GPIO5_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__GPIO5_IO8 /;"	d
MX7D_PAD_SD1_DATA3__GPIO5_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__GPIO5_IO8                            = IOMUX_PAD(0x0418, 0x01A8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0 /;"	d
MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0                        = IOMUX_PAD(0x0418, 0x01A8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__SD1_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__SD1_DATA3 /;"	d
MX7D_PAD_SD1_DATA3__SD1_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__SD1_DATA3                            = IOMUX_PAD(0x0418, 0x01A8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__UART7_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__UART7_DCE_RTS /;"	d
MX7D_PAD_SD1_DATA3__UART7_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__UART7_DCE_RTS                        = IOMUX_PAD(0x0418, 0x01A8, 2, 0x0720,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_DATA3__UART7_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_DATA3__UART7_DTE_CTS /;"	d
MX7D_PAD_SD1_DATA3__UART7_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_DATA3__UART7_DTE_CTS                        = IOMUX_PAD(0x0418, 0x01A8, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK /;"	d
MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK                        = IOMUX_PAD(0x0400, 0x0190, 3, 0x0554,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2 /;"	d
MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2                     = IOMUX_PAD(0x0400, 0x0190, 4, 0x058C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__GPIO5_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__GPIO5_IO2 /;"	d
MX7D_PAD_SD1_RESET_B__GPIO5_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__GPIO5_IO2                          = IOMUX_PAD(0x0400, 0x0190, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__SAI3_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__SAI3_MCLK /;"	d
MX7D_PAD_SD1_RESET_B__SAI3_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__SAI3_MCLK                          = IOMUX_PAD(0x0400, 0x0190, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__SD1_RESET_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__SD1_RESET_B /;"	d
MX7D_PAD_SD1_RESET_B__SD1_RESET_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__SD1_RESET_B                        = IOMUX_PAD(0x0400, 0x0190, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS /;"	d
MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS                      = IOMUX_PAD(0x0400, 0x0190, 2, 0x0718,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS /;"	d
MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS                      = IOMUX_PAD(0x0400, 0x0190, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__CCM_CLKO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__CCM_CLKO2 /;"	d
MX7D_PAD_SD1_WP__CCM_CLKO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__CCM_CLKO2                               = IOMUX_PAD(0x03FC, 0x018C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__ECSPI4_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__ECSPI4_MOSI /;"	d
MX7D_PAD_SD1_WP__ECSPI4_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__ECSPI4_MOSI                             = IOMUX_PAD(0x03FC, 0x018C, 3, 0x055C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__FLEXTIMER1_CH1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__FLEXTIMER1_CH1 /;"	d
MX7D_PAD_SD1_WP__FLEXTIMER1_CH1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__FLEXTIMER1_CH1                          = IOMUX_PAD(0x03FC, 0x018C, 4, 0x0588,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__GPIO5_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__GPIO5_IO1 /;"	d
MX7D_PAD_SD1_WP__GPIO5_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__GPIO5_IO1                               = IOMUX_PAD(0x03FC, 0x018C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__SD1_WP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__SD1_WP /;"	d
MX7D_PAD_SD1_WP__SD1_WP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__SD1_WP                                  = IOMUX_PAD(0x03FC, 0x018C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__UART6_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__UART6_DCE_TX /;"	d
MX7D_PAD_SD1_WP__UART6_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__UART6_DCE_TX                            = IOMUX_PAD(0x03FC, 0x018C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD1_WP__UART6_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD1_WP__UART6_DTE_RX /;"	d
MX7D_PAD_SD1_WP__UART6_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD1_WP__UART6_DTE_RX                            = IOMUX_PAD(0x03FC, 0x018C, 2, 0x071C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__ECSPI3_SS2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__ECSPI3_SS2 /;"	d
MX7D_PAD_SD2_CD_B__ECSPI3_SS2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__ECSPI3_SS2                            = IOMUX_PAD(0x041C, 0x01AC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__ENET1_MDIO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__ENET1_MDIO /;"	d
MX7D_PAD_SD2_CD_B__ENET1_MDIO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__ENET1_MDIO                            = IOMUX_PAD(0x041C, 0x01AC, 1, 0x0568,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__ENET2_MDIO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__ENET2_MDIO /;"	d
MX7D_PAD_SD2_CD_B__ENET2_MDIO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__ENET2_MDIO                            = IOMUX_PAD(0x041C, 0x01AC, 2, 0x0574,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB /;"	d
MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB                        = IOMUX_PAD(0x041C, 0x01AC, 4, 0x05A8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__GPIO5_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__GPIO5_IO9 /;"	d
MX7D_PAD_SD2_CD_B__GPIO5_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__GPIO5_IO9                             = IOMUX_PAD(0x041C, 0x01AC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__SD2_CD_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__SD2_CD_B /;"	d
MX7D_PAD_SD2_CD_B__SD2_CD_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__SD2_CD_B                              = IOMUX_PAD(0x041C, 0x01AC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0 /;"	d
MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0                       = IOMUX_PAD(0x041C, 0x01AC, 6, 0x06D8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CLK__GPIO5_IO12	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CLK__GPIO5_IO12 /;"	d
MX7D_PAD_SD2_CLK__GPIO5_IO12	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CLK__GPIO5_IO12                             = IOMUX_PAD(0x0428, 0x01B8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CLK__GPT4_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CLK__GPT4_CLK /;"	d
MX7D_PAD_SD2_CLK__GPT4_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CLK__GPT4_CLK                               = IOMUX_PAD(0x0428, 0x01B8, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CLK__MQS_RIGHT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CLK__MQS_RIGHT /;"	d
MX7D_PAD_SD2_CLK__MQS_RIGHT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CLK__MQS_RIGHT                              = IOMUX_PAD(0x0428, 0x01B8, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CLK__SAI2_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CLK__SAI2_RX_SYNC /;"	d
MX7D_PAD_SD2_CLK__SAI2_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CLK__SAI2_RX_SYNC                           = IOMUX_PAD(0x0428, 0x01B8, 1, 0x06B8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CLK__SD2_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CLK__SD2_CLK /;"	d
MX7D_PAD_SD2_CLK__SD2_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CLK__SD2_CLK                                = IOMUX_PAD(0x0428, 0x01B8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CMD__GPIO5_IO13	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CMD__GPIO5_IO13 /;"	d
MX7D_PAD_SD2_CMD__GPIO5_IO13	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CMD__GPIO5_IO13                             = IOMUX_PAD(0x042C, 0x01BC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CMD__GPT4_CAPTURE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CMD__GPT4_CAPTURE1 /;"	d
MX7D_PAD_SD2_CMD__GPT4_CAPTURE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CMD__GPT4_CAPTURE1                          = IOMUX_PAD(0x042C, 0x01BC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CMD__MQS_LEFT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CMD__MQS_LEFT /;"	d
MX7D_PAD_SD2_CMD__MQS_LEFT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CMD__MQS_LEFT                               = IOMUX_PAD(0x042C, 0x01BC, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CMD__SAI2_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CMD__SAI2_RX_BCLK /;"	d
MX7D_PAD_SD2_CMD__SAI2_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CMD__SAI2_RX_BCLK                           = IOMUX_PAD(0x042C, 0x01BC, 1, 0x06B0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CMD__SD2_CMD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CMD__SD2_CMD /;"	d
MX7D_PAD_SD2_CMD__SD2_CMD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CMD__SD2_CMD                                = IOMUX_PAD(0x042C, 0x01BC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD /;"	d
MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD                        = IOMUX_PAD(0x042C, 0x01BC, 4, 0x06EC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__GPIO5_IO14	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__GPIO5_IO14 /;"	d
MX7D_PAD_SD2_DATA0__GPIO5_IO14	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__GPIO5_IO14                           = IOMUX_PAD(0x0430, 0x01C0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2 /;"	d
MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2                        = IOMUX_PAD(0x0430, 0x01C0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0 /;"	d
MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0                        = IOMUX_PAD(0x0430, 0x01C0, 1, 0x06B4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__SD2_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__SD2_DATA0 /;"	d
MX7D_PAD_SD2_DATA0__SD2_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__SD2_DATA0                            = IOMUX_PAD(0x0430, 0x01C0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK /;"	d
MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK                       = IOMUX_PAD(0x0430, 0x01C0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__UART4_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__UART4_DCE_RX /;"	d
MX7D_PAD_SD2_DATA0__UART4_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__UART4_DCE_RX                         = IOMUX_PAD(0x0430, 0x01C0, 2, 0x070C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA0__UART4_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA0__UART4_DTE_TX /;"	d
MX7D_PAD_SD2_DATA0__UART4_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA0__UART4_DTE_TX                         = IOMUX_PAD(0x0430, 0x01C0, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__GPIO5_IO15	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__GPIO5_IO15 /;"	d
MX7D_PAD_SD2_DATA1__GPIO5_IO15	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__GPIO5_IO15                           = IOMUX_PAD(0x0434, 0x01C4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__GPT4_COMPARE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__GPT4_COMPARE1 /;"	d
MX7D_PAD_SD2_DATA1__GPT4_COMPARE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__GPT4_COMPARE1                        = IOMUX_PAD(0x0434, 0x01C4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK /;"	d
MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK                         = IOMUX_PAD(0x0434, 0x01C4, 1, 0x06BC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__SD2_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__SD2_DATA1 /;"	d
MX7D_PAD_SD2_DATA1__SD2_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__SD2_DATA1                            = IOMUX_PAD(0x0434, 0x01C4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B /;"	d
MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B                     = IOMUX_PAD(0x0434, 0x01C4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__UART4_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__UART4_DCE_TX /;"	d
MX7D_PAD_SD2_DATA1__UART4_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__UART4_DCE_TX                         = IOMUX_PAD(0x0434, 0x01C4, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA1__UART4_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA1__UART4_DTE_RX /;"	d
MX7D_PAD_SD2_DATA1__UART4_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA1__UART4_DTE_RX                         = IOMUX_PAD(0x0434, 0x01C4, 2, 0x070C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__GPIO5_IO16	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__GPIO5_IO16 /;"	d
MX7D_PAD_SD2_DATA2__GPIO5_IO16	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__GPIO5_IO16                           = IOMUX_PAD(0x0438, 0x01C8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__GPT4_COMPARE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__GPT4_COMPARE2 /;"	d
MX7D_PAD_SD2_DATA2__GPT4_COMPARE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__GPT4_COMPARE2                        = IOMUX_PAD(0x0438, 0x01C8, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC /;"	d
MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC                         = IOMUX_PAD(0x0438, 0x01C8, 1, 0x06C0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__SD2_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__SD2_DATA2 /;"	d
MX7D_PAD_SD2_DATA2__SD2_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__SD2_DATA2                            = IOMUX_PAD(0x0438, 0x01C8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN /;"	d
MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN                      = IOMUX_PAD(0x0438, 0x01C8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__UART4_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__UART4_DCE_CTS /;"	d
MX7D_PAD_SD2_DATA2__UART4_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__UART4_DCE_CTS                        = IOMUX_PAD(0x0438, 0x01C8, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA2__UART4_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA2__UART4_DTE_RTS /;"	d
MX7D_PAD_SD2_DATA2__UART4_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA2__UART4_DTE_RTS                        = IOMUX_PAD(0x0438, 0x01C8, 2, 0x0708,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__GPIO5_IO17	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__GPIO5_IO17 /;"	d
MX7D_PAD_SD2_DATA3__GPIO5_IO17	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__GPIO5_IO17                           = IOMUX_PAD(0x043C, 0x01CC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__GPT4_COMPARE3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__GPT4_COMPARE3 /;"	d
MX7D_PAD_SD2_DATA3__GPT4_COMPARE3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__GPT4_COMPARE3                        = IOMUX_PAD(0x043C, 0x01CC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0 /;"	d
MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0                        = IOMUX_PAD(0x043C, 0x01CC, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__SD2_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__SD2_DATA3 /;"	d
MX7D_PAD_SD2_DATA3__SD2_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__SD2_DATA3                            = IOMUX_PAD(0x043C, 0x01CC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD /;"	d
MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD                        = IOMUX_PAD(0x043C, 0x01CC, 4, 0x06E8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__UART4_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__UART4_DCE_RTS /;"	d
MX7D_PAD_SD2_DATA3__UART4_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__UART4_DCE_RTS                        = IOMUX_PAD(0x043C, 0x01CC, 2, 0x0708,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_DATA3__UART4_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_DATA3__UART4_DTE_CTS /;"	d
MX7D_PAD_SD2_DATA3__UART4_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_DATA3__UART4_DTE_CTS                        = IOMUX_PAD(0x043C, 0x01CC, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_RESET_B__ECSPI3_RDY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_RESET_B__ECSPI3_RDY /;"	d
MX7D_PAD_SD2_RESET_B__ECSPI3_RDY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_RESET_B__ECSPI3_RDY                         = IOMUX_PAD(0x0424, 0x01B4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_RESET_B__GPIO5_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_RESET_B__GPIO5_IO11 /;"	d
MX7D_PAD_SD2_RESET_B__GPIO5_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_RESET_B__GPIO5_IO11                         = IOMUX_PAD(0x0424, 0x01B4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_RESET_B__SAI2_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_RESET_B__SAI2_MCLK /;"	d
MX7D_PAD_SD2_RESET_B__SAI2_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_RESET_B__SAI2_MCLK                          = IOMUX_PAD(0x0424, 0x01B4, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_RESET_B__SD2_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_RESET_B__SD2_RESET /;"	d
MX7D_PAD_SD2_RESET_B__SD2_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_RESET_B__SD2_RESET                          = IOMUX_PAD(0x0424, 0x01B4, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_RESET_B__SD2_RESET_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_RESET_B__SD2_RESET_B /;"	d
MX7D_PAD_SD2_RESET_B__SD2_RESET_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_RESET_B__SD2_RESET_B                        = IOMUX_PAD(0x0424, 0x01B4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_RESET_B__USB_OTG2_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_RESET_B__USB_OTG2_ID /;"	d
MX7D_PAD_SD2_RESET_B__USB_OTG2_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_RESET_B__USB_OTG2_ID                        = IOMUX_PAD(0x0424, 0x01B4, 4, 0x0730,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__ECSPI3_SS3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__ECSPI3_SS3 /;"	d
MX7D_PAD_SD2_WP__ECSPI3_SS3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__ECSPI3_SS3                              = IOMUX_PAD(0x0420, 0x01B0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__ENET1_MDC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__ENET1_MDC /;"	d
MX7D_PAD_SD2_WP__ENET1_MDC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__ENET1_MDC                               = IOMUX_PAD(0x0420, 0x01B0, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__ENET2_MDC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__ENET2_MDC /;"	d
MX7D_PAD_SD2_WP__ENET2_MDC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__ENET2_MDC                               = IOMUX_PAD(0x0420, 0x01B0, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__GPIO5_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__GPIO5_IO10 /;"	d
MX7D_PAD_SD2_WP__GPIO5_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__GPIO5_IO10                              = IOMUX_PAD(0x0420, 0x01B0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__SD2_WP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__SD2_WP /;"	d
MX7D_PAD_SD2_WP__SD2_WP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__SD2_WP                                  = IOMUX_PAD(0x0420, 0x01B0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1 /;"	d
MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1                         = IOMUX_PAD(0x0420, 0x01B0, 6, 0x06DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD2_WP__USB_OTG1_ID	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD2_WP__USB_OTG1_ID /;"	d
MX7D_PAD_SD2_WP__USB_OTG1_ID	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD2_WP__USB_OTG1_ID                             = IOMUX_PAD(0x0420, 0x01B0, 4, 0x0734,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CLK__ECSPI4_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CLK__ECSPI4_MISO /;"	d
MX7D_PAD_SD3_CLK__ECSPI4_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CLK__ECSPI4_MISO                            = IOMUX_PAD(0x0440, 0x01D0, 2, 0x0558,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CLK__GPIO6_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CLK__GPIO6_IO0 /;"	d
MX7D_PAD_SD3_CLK__GPIO6_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CLK__GPIO6_IO0                              = IOMUX_PAD(0x0440, 0x01D0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CLK__GPT3_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CLK__GPT3_CLK /;"	d
MX7D_PAD_SD3_CLK__GPT3_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CLK__GPT3_CLK                               = IOMUX_PAD(0x0440, 0x01D0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CLK__NAND_CLE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CLK__NAND_CLE /;"	d
MX7D_PAD_SD3_CLK__NAND_CLE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CLK__NAND_CLE                               = IOMUX_PAD(0x0440, 0x01D0, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CLK__SAI3_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CLK__SAI3_RX_SYNC /;"	d
MX7D_PAD_SD3_CLK__SAI3_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CLK__SAI3_RX_SYNC                           = IOMUX_PAD(0x0440, 0x01D0, 3, 0x06CC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CLK__SD3_CLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CLK__SD3_CLK /;"	d
MX7D_PAD_SD3_CLK__SD3_CLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CLK__SD3_CLK                                = IOMUX_PAD(0x0440, 0x01D0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CMD__ECSPI4_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CMD__ECSPI4_MOSI /;"	d
MX7D_PAD_SD3_CMD__ECSPI4_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CMD__ECSPI4_MOSI                            = IOMUX_PAD(0x0444, 0x01D4, 2, 0x055C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CMD__GPIO6_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CMD__GPIO6_IO1 /;"	d
MX7D_PAD_SD3_CMD__GPIO6_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CMD__GPIO6_IO1                              = IOMUX_PAD(0x0444, 0x01D4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CMD__GPT3_CAPTURE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CMD__GPT3_CAPTURE1 /;"	d
MX7D_PAD_SD3_CMD__GPT3_CAPTURE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CMD__GPT3_CAPTURE1                          = IOMUX_PAD(0x0444, 0x01D4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CMD__NAND_ALE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CMD__NAND_ALE /;"	d
MX7D_PAD_SD3_CMD__NAND_ALE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CMD__NAND_ALE                               = IOMUX_PAD(0x0444, 0x01D4, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CMD__SAI3_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CMD__SAI3_RX_BCLK /;"	d
MX7D_PAD_SD3_CMD__SAI3_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CMD__SAI3_RX_BCLK                           = IOMUX_PAD(0x0444, 0x01D4, 3, 0x06C4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_CMD__SD3_CMD	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_CMD__SD3_CMD /;"	d
MX7D_PAD_SD3_CMD__SD3_CMD	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_CMD__SD3_CMD                                = IOMUX_PAD(0x0444, 0x01D4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA0__ECSPI4_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA0__ECSPI4_SS0 /;"	d
MX7D_PAD_SD3_DATA0__ECSPI4_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA0__ECSPI4_SS0                           = IOMUX_PAD(0x0448, 0x01D8, 2, 0x0560,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA0__GPIO6_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA0__GPIO6_IO2 /;"	d
MX7D_PAD_SD3_DATA0__GPIO6_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA0__GPIO6_IO2                            = IOMUX_PAD(0x0448, 0x01D8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2 /;"	d
MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2                        = IOMUX_PAD(0x0448, 0x01D8, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA0__NAND_DATA00	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA0__NAND_DATA00 /;"	d
MX7D_PAD_SD3_DATA0__NAND_DATA00	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA0__NAND_DATA00                          = IOMUX_PAD(0x0448, 0x01D8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0 /;"	d
MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0                        = IOMUX_PAD(0x0448, 0x01D8, 3, 0x06C8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA0__SD3_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA0__SD3_DATA0 /;"	d
MX7D_PAD_SD3_DATA0__SD3_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA0__SD3_DATA0                            = IOMUX_PAD(0x0448, 0x01D8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA1__ECSPI4_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA1__ECSPI4_SCLK /;"	d
MX7D_PAD_SD3_DATA1__ECSPI4_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA1__ECSPI4_SCLK                          = IOMUX_PAD(0x044C, 0x01DC, 2, 0x0554,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA1__GPIO6_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA1__GPIO6_IO3 /;"	d
MX7D_PAD_SD3_DATA1__GPIO6_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA1__GPIO6_IO3                            = IOMUX_PAD(0x044C, 0x01DC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA1__GPT3_COMPARE1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA1__GPT3_COMPARE1 /;"	d
MX7D_PAD_SD3_DATA1__GPT3_COMPARE1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA1__GPT3_COMPARE1                        = IOMUX_PAD(0x044C, 0x01DC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA1__NAND_DATA01	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA1__NAND_DATA01 /;"	d
MX7D_PAD_SD3_DATA1__NAND_DATA01	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA1__NAND_DATA01                          = IOMUX_PAD(0x044C, 0x01DC, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK /;"	d
MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK                         = IOMUX_PAD(0x044C, 0x01DC, 3, 0x06D0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA1__SD3_DATA1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA1__SD3_DATA1 /;"	d
MX7D_PAD_SD3_DATA1__SD3_DATA1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA1__SD3_DATA1                            = IOMUX_PAD(0x044C, 0x01DC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA2__GPIO6_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA2__GPIO6_IO4 /;"	d
MX7D_PAD_SD3_DATA2__GPIO6_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA2__GPIO6_IO4                            = IOMUX_PAD(0x0450, 0x01E0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA2__GPT3_COMPARE2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA2__GPT3_COMPARE2 /;"	d
MX7D_PAD_SD3_DATA2__GPT3_COMPARE2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA2__GPT3_COMPARE2                        = IOMUX_PAD(0x0450, 0x01E0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA2__I2C3_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA2__I2C3_SDA /;"	d
MX7D_PAD_SD3_DATA2__I2C3_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA2__I2C3_SDA                             = IOMUX_PAD(0x0450, 0x01E0, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA2__NAND_DATA02	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA2__NAND_DATA02 /;"	d
MX7D_PAD_SD3_DATA2__NAND_DATA02	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA2__NAND_DATA02                          = IOMUX_PAD(0x0450, 0x01E0, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC /;"	d
MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC                         = IOMUX_PAD(0x0450, 0x01E0, 3, 0x06D4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA2__SD3_DATA2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA2__SD3_DATA2 /;"	d
MX7D_PAD_SD3_DATA2__SD3_DATA2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA2__SD3_DATA2                            = IOMUX_PAD(0x0450, 0x01E0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA3__GPIO6_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA3__GPIO6_IO5 /;"	d
MX7D_PAD_SD3_DATA3__GPIO6_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA3__GPIO6_IO5                            = IOMUX_PAD(0x0454, 0x01E4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA3__GPT3_COMPARE3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA3__GPT3_COMPARE3 /;"	d
MX7D_PAD_SD3_DATA3__GPT3_COMPARE3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA3__GPT3_COMPARE3                        = IOMUX_PAD(0x0454, 0x01E4, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA3__I2C3_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA3__I2C3_SCL /;"	d
MX7D_PAD_SD3_DATA3__I2C3_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA3__I2C3_SCL                             = IOMUX_PAD(0x0454, 0x01E4, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA3__NAND_DATA03	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA3__NAND_DATA03 /;"	d
MX7D_PAD_SD3_DATA3__NAND_DATA03	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA3__NAND_DATA03                          = IOMUX_PAD(0x0454, 0x01E4, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0 /;"	d
MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0                        = IOMUX_PAD(0x0454, 0x01E4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA3__SD3_DATA3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA3__SD3_DATA3 /;"	d
MX7D_PAD_SD3_DATA3__SD3_DATA3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA3__SD3_DATA3                            = IOMUX_PAD(0x0454, 0x01E4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA4__FLEXCAN2_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA4__FLEXCAN2_RX /;"	d
MX7D_PAD_SD3_DATA4__FLEXCAN2_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA4__FLEXCAN2_RX                          = IOMUX_PAD(0x0458, 0x01E8, 4, 0x04E0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA4__GPIO6_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA4__GPIO6_IO6 /;"	d
MX7D_PAD_SD3_DATA4__GPIO6_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA4__GPIO6_IO6                            = IOMUX_PAD(0x0458, 0x01E8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA4__NAND_DATA04	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA4__NAND_DATA04 /;"	d
MX7D_PAD_SD3_DATA4__NAND_DATA04	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA4__NAND_DATA04                          = IOMUX_PAD(0x0458, 0x01E8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA4__SD3_DATA4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA4__SD3_DATA4 /;"	d
MX7D_PAD_SD3_DATA4__SD3_DATA4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA4__SD3_DATA4                            = IOMUX_PAD(0x0458, 0x01E8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA4__UART3_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA4__UART3_DCE_RX /;"	d
MX7D_PAD_SD3_DATA4__UART3_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA4__UART3_DCE_RX                         = IOMUX_PAD(0x0458, 0x01E8, 3, 0x0704,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA4__UART3_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA4__UART3_DTE_TX /;"	d
MX7D_PAD_SD3_DATA4__UART3_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA4__UART3_DTE_TX                         = IOMUX_PAD(0x0458, 0x01E8, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA5__FLEXCAN1_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA5__FLEXCAN1_TX /;"	d
MX7D_PAD_SD3_DATA5__FLEXCAN1_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA5__FLEXCAN1_TX                          = IOMUX_PAD(0x045C, 0x01EC, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA5__GPIO6_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA5__GPIO6_IO7 /;"	d
MX7D_PAD_SD3_DATA5__GPIO6_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA5__GPIO6_IO7                            = IOMUX_PAD(0x045C, 0x01EC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA5__NAND_DATA05	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA5__NAND_DATA05 /;"	d
MX7D_PAD_SD3_DATA5__NAND_DATA05	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA5__NAND_DATA05                          = IOMUX_PAD(0x045C, 0x01EC, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA5__SD3_DATA5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA5__SD3_DATA5 /;"	d
MX7D_PAD_SD3_DATA5__SD3_DATA5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA5__SD3_DATA5                            = IOMUX_PAD(0x045C, 0x01EC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA5__UART3_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA5__UART3_DCE_TX /;"	d
MX7D_PAD_SD3_DATA5__UART3_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA5__UART3_DCE_TX                         = IOMUX_PAD(0x045C, 0x01EC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA5__UART3_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA5__UART3_DTE_RX /;"	d
MX7D_PAD_SD3_DATA5__UART3_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA5__UART3_DTE_RX                         = IOMUX_PAD(0x045C, 0x01EC, 3, 0x0704,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__FLEXCAN2_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__FLEXCAN2_TX /;"	d
MX7D_PAD_SD3_DATA6__FLEXCAN2_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__FLEXCAN2_TX                          = IOMUX_PAD(0x0460, 0x01F0, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__GPIO6_IO8	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__GPIO6_IO8 /;"	d
MX7D_PAD_SD3_DATA6__GPIO6_IO8	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__GPIO6_IO8                            = IOMUX_PAD(0x0460, 0x01F0, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__NAND_DATA06	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__NAND_DATA06 /;"	d
MX7D_PAD_SD3_DATA6__NAND_DATA06	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__NAND_DATA06                          = IOMUX_PAD(0x0460, 0x01F0, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__SD3_DATA6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__SD3_DATA6 /;"	d
MX7D_PAD_SD3_DATA6__SD3_DATA6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__SD3_DATA6                            = IOMUX_PAD(0x0460, 0x01F0, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__SD3_WP	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__SD3_WP /;"	d
MX7D_PAD_SD3_DATA6__SD3_WP	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__SD3_WP                               = IOMUX_PAD(0x0460, 0x01F0, 2, 0x073C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__UART3_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__UART3_DCE_RTS /;"	d
MX7D_PAD_SD3_DATA6__UART3_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__UART3_DCE_RTS                        = IOMUX_PAD(0x0460, 0x01F0, 3, 0x0700,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA6__UART3_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA6__UART3_DTE_CTS /;"	d
MX7D_PAD_SD3_DATA6__UART3_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA6__UART3_DTE_CTS                        = IOMUX_PAD(0x0460, 0x01F0, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__FLEXCAN1_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__FLEXCAN1_RX /;"	d
MX7D_PAD_SD3_DATA7__FLEXCAN1_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__FLEXCAN1_RX                          = IOMUX_PAD(0x0464, 0x01F4, 4, 0x04DC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__GPIO6_IO9	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__GPIO6_IO9 /;"	d
MX7D_PAD_SD3_DATA7__GPIO6_IO9	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__GPIO6_IO9                            = IOMUX_PAD(0x0464, 0x01F4, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__NAND_DATA07	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__NAND_DATA07 /;"	d
MX7D_PAD_SD3_DATA7__NAND_DATA07	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__NAND_DATA07                          = IOMUX_PAD(0x0464, 0x01F4, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__SD3_CD_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__SD3_CD_B /;"	d
MX7D_PAD_SD3_DATA7__SD3_CD_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__SD3_CD_B                             = IOMUX_PAD(0x0464, 0x01F4, 2, 0x0738,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__SD3_DATA7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__SD3_DATA7 /;"	d
MX7D_PAD_SD3_DATA7__SD3_DATA7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__SD3_DATA7                            = IOMUX_PAD(0x0464, 0x01F4, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__UART3_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__UART3_DCE_CTS /;"	d
MX7D_PAD_SD3_DATA7__UART3_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__UART3_DCE_CTS                        = IOMUX_PAD(0x0464, 0x01F4, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_DATA7__UART3_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_DATA7__UART3_DTE_RTS /;"	d
MX7D_PAD_SD3_DATA7__UART3_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_DATA7__UART3_DTE_RTS                        = IOMUX_PAD(0x0464, 0x01F4, 3, 0x0700,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_RESET_B__GPIO6_IO11	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_RESET_B__GPIO6_IO11 /;"	d
MX7D_PAD_SD3_RESET_B__GPIO6_IO11	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_RESET_B__GPIO6_IO11                         = IOMUX_PAD(0x046C, 0x01FC, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_RESET_B__NAND_WE_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_RESET_B__NAND_WE_B /;"	d
MX7D_PAD_SD3_RESET_B__NAND_WE_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_RESET_B__NAND_WE_B                          = IOMUX_PAD(0x046C, 0x01FC, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_RESET_B__SAI3_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_RESET_B__SAI3_MCLK /;"	d
MX7D_PAD_SD3_RESET_B__SAI3_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_RESET_B__SAI3_MCLK                          = IOMUX_PAD(0x046C, 0x01FC, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_RESET_B__SD3_RESET	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_RESET_B__SD3_RESET /;"	d
MX7D_PAD_SD3_RESET_B__SD3_RESET	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_RESET_B__SD3_RESET                          = IOMUX_PAD(0x046C, 0x01FC, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_RESET_B__SD3_RESET_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_RESET_B__SD3_RESET_B /;"	d
MX7D_PAD_SD3_RESET_B__SD3_RESET_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_RESET_B__SD3_RESET_B                        = IOMUX_PAD(0x046C, 0x01FC, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_STROBE__GPIO6_IO10	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_STROBE__GPIO6_IO10 /;"	d
MX7D_PAD_SD3_STROBE__GPIO6_IO10	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_STROBE__GPIO6_IO10                          = IOMUX_PAD(0x0468, 0x01F8, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_STROBE__NAND_RE_B	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_STROBE__NAND_RE_B /;"	d
MX7D_PAD_SD3_STROBE__NAND_RE_B	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_STROBE__NAND_RE_B                           = IOMUX_PAD(0x0468, 0x01F8, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_SD3_STROBE__SD3_STROBE	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_SD3_STROBE__SD3_STROBE /;"	d
MX7D_PAD_SD3_STROBE__SD3_STROBE	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_SD3_STROBE__SD3_STROBE                          = IOMUX_PAD(0x0468, 0x01F8, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY /;"	d
MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY                   = IOMUX_PAD(0x0398, 0x0128, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1 /;"	d
MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1                       = IOMUX_PAD(0x0398, 0x0128, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__ENET1_MDIO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__ENET1_MDIO /;"	d
MX7D_PAD_UART1_RX_DATA__ENET1_MDIO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__ENET1_MDIO                       = IOMUX_PAD(0x0398, 0x0128, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN /;"	d
MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN             = IOMUX_PAD(0x0398, 0x0128, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__GPIO4_IO0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 /;"	d
MX7D_PAD_UART1_RX_DATA__GPIO4_IO0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__GPIO4_IO0                        = IOMUX_PAD(0x0398, 0x0128, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__I2C1_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__I2C1_SCL /;"	d
MX7D_PAD_UART1_RX_DATA__I2C1_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__I2C1_SCL                         = IOMUX_PAD(0x0398, 0x0128, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX /;"	d
MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX                     = IOMUX_PAD(0x0398, 0x0128, 0, 0x06F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX /;"	d
MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX                     = IOMUX_PAD(0x0398, 0x0128, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2 /;"	d
MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2                       = IOMUX_PAD(0x039C, 0x012C, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__ENET1_MDC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__ENET1_MDC /;"	d
MX7D_PAD_UART1_TX_DATA__ENET1_MDC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__ENET1_MDC                        = IOMUX_PAD(0x039C, 0x012C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT /;"	d
MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT            = IOMUX_PAD(0x039C, 0x012C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__GPIO4_IO1	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 /;"	d
MX7D_PAD_UART1_TX_DATA__GPIO4_IO1	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__GPIO4_IO1                        = IOMUX_PAD(0x039C, 0x012C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__I2C1_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__I2C1_SDA /;"	d
MX7D_PAD_UART1_TX_DATA__I2C1_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__I2C1_SDA                         = IOMUX_PAD(0x039C, 0x012C, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__SAI3_MCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__SAI3_MCLK /;"	d
MX7D_PAD_UART1_TX_DATA__SAI3_MCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__SAI3_MCLK                        = IOMUX_PAD(0x039C, 0x012C, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX /;"	d
MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX                     = IOMUX_PAD(0x039C, 0x012C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX /;"	d
MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX                     = IOMUX_PAD(0x039C, 0x012C, 0, 0x06F4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3 /;"	d
MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3                       = IOMUX_PAD(0x03A0, 0x0130, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN /;"	d
MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN             = IOMUX_PAD(0x03A0, 0x0130, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__ENET2_MDIO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__ENET2_MDIO /;"	d
MX7D_PAD_UART2_RX_DATA__ENET2_MDIO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__ENET2_MDIO                       = IOMUX_PAD(0x03A0, 0x0130, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__GPIO4_IO2	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 /;"	d
MX7D_PAD_UART2_RX_DATA__GPIO4_IO2	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__GPIO4_IO2                        = IOMUX_PAD(0x03A0, 0x0130, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__I2C2_SCL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__I2C2_SCL /;"	d
MX7D_PAD_UART2_RX_DATA__I2C2_SCL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__I2C2_SCL                         = IOMUX_PAD(0x03A0, 0x0130, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK /;"	d
MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK                     = IOMUX_PAD(0x03A0, 0x0130, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX /;"	d
MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX                     = IOMUX_PAD(0x03A0, 0x0130, 0, 0x06FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX /;"	d
MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX                     = IOMUX_PAD(0x03A0, 0x0130, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY /;"	d
MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY                       = IOMUX_PAD(0x03A4, 0x0134, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT /;"	d
MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT            = IOMUX_PAD(0x03A4, 0x0134, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__ENET2_MDC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__ENET2_MDC /;"	d
MX7D_PAD_UART2_TX_DATA__ENET2_MDC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__ENET2_MDC                        = IOMUX_PAD(0x03A4, 0x0134, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__GPIO4_IO3	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 /;"	d
MX7D_PAD_UART2_TX_DATA__GPIO4_IO3	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__GPIO4_IO3                        = IOMUX_PAD(0x03A4, 0x0134, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__I2C2_SDA	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__I2C2_SDA /;"	d
MX7D_PAD_UART2_TX_DATA__I2C2_SDA	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__I2C2_SDA                         = IOMUX_PAD(0x03A4, 0x0134, IOMUX_CONF/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0 /;"	d
MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0                    = IOMUX_PAD(0x03A4, 0x0134, 2, 0x06C8,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX /;"	d
MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX                     = IOMUX_PAD(0x03A4, 0x0134, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX /;"	d
MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX                     = IOMUX_PAD(0x03A4, 0x0134, 0, 0x06FC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__ECSPI1_SS0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__ECSPI1_SS0 /;"	d
MX7D_PAD_UART3_CTS_B__ECSPI1_SS0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__ECSPI1_SS0                         = IOMUX_PAD(0x03B4, 0x0144, 3, 0x0530,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT /;"	d
MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT              = IOMUX_PAD(0x03B4, 0x0144, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__GPIO4_IO7	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__GPIO4_IO7 /;"	d
MX7D_PAD_UART3_CTS_B__GPIO4_IO7	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__GPIO4_IO7                          = IOMUX_PAD(0x03B4, 0x0144, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC /;"	d
MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC                       = IOMUX_PAD(0x03B4, 0x0144, 2, 0x06D4,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__SD1_VSELECT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__SD1_VSELECT /;"	d
MX7D_PAD_UART3_CTS_B__SD1_VSELECT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__SD1_VSELECT                        = IOMUX_PAD(0x03B4, 0x0144, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS /;"	d
MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS                      = IOMUX_PAD(0x03B4, 0x0144, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS /;"	d
MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS                      = IOMUX_PAD(0x03B4, 0x0144, 0, 0x0700,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR /;"	d
MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR                       = IOMUX_PAD(0x03B4, 0x0144, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK /;"	d
MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK                        = IOMUX_PAD(0x03B0, 0x0140, 3, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN /;"	d
MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN               = IOMUX_PAD(0x03B0, 0x0140, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__GPIO4_IO6	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__GPIO4_IO6 /;"	d
MX7D_PAD_UART3_RTS_B__GPIO4_IO6	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__GPIO4_IO6                          = IOMUX_PAD(0x03B0, 0x0140, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 /;"	d
MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0                      = IOMUX_PAD(0x03B0, 0x0140, 2, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__SD3_LCTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__SD3_LCTL /;"	d
MX7D_PAD_UART3_RTS_B__SD3_LCTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__SD3_LCTL                           = IOMUX_PAD(0x03B0, 0x0140, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS /;"	d
MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS                      = IOMUX_PAD(0x03B0, 0x0140, 0, 0x0700,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS /;"	d
MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS                      = IOMUX_PAD(0x03B0, 0x0140, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RTS_B__USB_OTG2_OC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RTS_B__USB_OTG2_OC /;"	d
MX7D_PAD_UART3_RTS_B__USB_OTG2_OC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RTS_B__USB_OTG2_OC                        = IOMUX_PAD(0x03B0, 0x0140, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO /;"	d
MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO                      = IOMUX_PAD(0x03A8, 0x0138, 3, 0x0528,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN /;"	d
MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN             = IOMUX_PAD(0x03A8, 0x0138, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__GPIO4_IO4	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__GPIO4_IO4 /;"	d
MX7D_PAD_UART3_RX_DATA__GPIO4_IO4	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__GPIO4_IO4                        = IOMUX_PAD(0x03A8, 0x0138, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC /;"	d
MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC                     = IOMUX_PAD(0x03A8, 0x0138, 2, 0x06CC,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__SD1_LCTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__SD1_LCTL /;"	d
MX7D_PAD_UART3_RX_DATA__SD1_LCTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__SD1_LCTL                         = IOMUX_PAD(0x03A8, 0x0138, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX /;"	d
MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX                     = IOMUX_PAD(0x03A8, 0x0138, 0, 0x0704,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX /;"	d
MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX                     = IOMUX_PAD(0x03A8, 0x0138, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC /;"	d
MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC                      = IOMUX_PAD(0x03A8, 0x0138, 1, 0x072C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI /;"	d
MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI                      = IOMUX_PAD(0x03AC, 0x013C, 3, 0x052C,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT /;"	d
MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT            = IOMUX_PAD(0x03AC, 0x013C, 4, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__GPIO4_IO5	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 /;"	d
MX7D_PAD_UART3_TX_DATA__GPIO4_IO5	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__GPIO4_IO5                        = IOMUX_PAD(0x03AC, 0x013C, 5, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK /;"	d
MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK                     = IOMUX_PAD(0x03AC, 0x013C, 2, 0x06D0,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__SD2_LCTL	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__SD2_LCTL /;"	d
MX7D_PAD_UART3_TX_DATA__SD2_LCTL	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__SD2_LCTL                         = IOMUX_PAD(0x03AC, 0x013C, 6, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX /;"	d
MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX                     = IOMUX_PAD(0x03AC, 0x013C, 0, 0x0000,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX /;"	d
MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX                     = IOMUX_PAD(0x03AC, 0x013C, 0, 0x0704,/;"	e	enum:__anon4d48e8e90203
MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR	arch/arm/dts/imx7d-pinfunc.h	/^#define MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR /;"	d
MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^	MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR                     = IOMUX_PAD(0x03AC, 0x013C, 1, 0x0000,/;"	e	enum:__anon4d48e8e90203
MXC_AHB_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_AHB_CLK,$/;"	e	enum:mxc_clock
MXC_AHB_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_AHB_CLK,$/;"	e	enum:mxc_clock
MXC_AHB_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_AHB_CLK,$/;"	e	enum:mxc_clock
MXC_AHB_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_AHB_CLK,$/;"	e	enum:mxc_clock
MXC_AHB_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_AHB_CLK,$/;"	e	enum:mxc_clock
MXC_AHB_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_AHB_CLK,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-ls102xa/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_ARM_CLK,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx27/clock.h	/^	MXC_ARM_CLK,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_ARM_CLK,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_ARM_CLK,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_ARM_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_ARM_CLK = 0,$/;"	e	enum:mxc_clock
MXC_AXI_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_AXI_CLK,$/;"	e	enum:mxc_clock
MXC_AXI_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_AXI_CLK,$/;"	e	enum:mxc_clock
MXC_BUS_CLK	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^	MXC_BUS_CLK,$/;"	e	enum:mxc_clock
MXC_BUS_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_BUS_CLK,$/;"	e	enum:mxc_clock
MXC_BUS_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_BUS_CLK,$/;"	e	enum:mxc_clock
MXC_CCM_ACMR_ESAI_CLK_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_ESAI_CLK_SEL_MASK	/;"	d
MXC_CCM_ACMR_ESAI_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_ESAI_CLK_SEL_OFFSET	/;"	d
MXC_CCM_ACMR_SPDIF_CLK_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_SPDIF_CLK_SEL_MASK	/;"	d
MXC_CCM_ACMR_SPDIF_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_SPDIF_CLK_SEL_OFFSET	/;"	d
MXC_CCM_ACMR_SSI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_SSI1_CLK_SEL_MASK	/;"	d
MXC_CCM_ACMR_SSI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_SSI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_ACMR_SSI2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_SSI2_CLK_SEL_MASK	/;"	d
MXC_CCM_ACMR_SSI2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_ACMR_SSI2_CLK_SEL_OFFSET	/;"	d
MXC_CCM_BASE	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_BASE	/;"	d
MXC_CCM_CACRR_ARM_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CACRR_ARM_PODF(/;"	d
MXC_CCM_CACRR_ARM_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CACRR_ARM_PODF_MASK	/;"	d
MXC_CCM_CACRR_ARM_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CACRR_ARM_PODF_MASK	/;"	d
MXC_CCM_CACRR_ARM_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CACRR_ARM_PODF_OFFSET	/;"	d
MXC_CCM_CACRR_ARM_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CACRR_ARM_PODF_OFFSET	/;"	d
MXC_CCM_CACRR_ARM_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CACRR_ARM_PODF_RD(/;"	d
MXC_CCM_CBCDR_AHB_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AHB_PODF(/;"	d
MXC_CCM_CBCDR_AHB_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AHB_PODF_MASK	/;"	d
MXC_CCM_CBCDR_AHB_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_AHB_PODF_MASK	/;"	d
MXC_CCM_CBCDR_AHB_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AHB_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_AHB_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_AHB_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_AHB_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AHB_PODF_RD(/;"	d
MXC_CCM_CBCDR_AXI_ALT_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_ALT_SEL	/;"	d
MXC_CCM_CBCDR_AXI_A_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_A_PODF(/;"	d
MXC_CCM_CBCDR_AXI_A_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_A_PODF_MASK	/;"	d
MXC_CCM_CBCDR_AXI_A_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_A_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_AXI_A_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_A_PODF_RD(/;"	d
MXC_CCM_CBCDR_AXI_B_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_B_PODF(/;"	d
MXC_CCM_CBCDR_AXI_B_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_B_PODF_MASK	/;"	d
MXC_CCM_CBCDR_AXI_B_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_AXI_B_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_B_PODF_RD(/;"	d
MXC_CCM_CBCDR_AXI_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_PODF_MASK	/;"	d
MXC_CCM_CBCDR_AXI_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_AXI_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_AXI_SEL	/;"	d
MXC_CCM_CBCDR_DDR_HIFREQ_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_DDR_HIFREQ_SEL	/;"	d
MXC_CCM_CBCDR_DDR_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_DDR_PODF(/;"	d
MXC_CCM_CBCDR_DDR_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_DDR_PODF_MASK	/;"	d
MXC_CCM_CBCDR_DDR_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_DDR_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_DDR_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_DDR_PODF_RD(/;"	d
MXC_CCM_CBCDR_EMI_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_EMI_CLK_SEL	/;"	d
MXC_CCM_CBCDR_EMI_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_EMI_PODF(/;"	d
MXC_CCM_CBCDR_EMI_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_EMI_PODF_MASK	/;"	d
MXC_CCM_CBCDR_EMI_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_EMI_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_EMI_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_EMI_PODF_RD(/;"	d
MXC_CCM_CBCDR_IPG_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_IPG_PODF(/;"	d
MXC_CCM_CBCDR_IPG_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_IPG_PODF_MASK	/;"	d
MXC_CCM_CBCDR_IPG_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_IPG_PODF_MASK	/;"	d
MXC_CCM_CBCDR_IPG_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_IPG_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_IPG_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_IPG_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_IPG_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_IPG_PODF_RD(/;"	d
MXC_CCM_CBCDR_MMDC_CH0_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_MMDC_CH0_PODF_MASK	/;"	d
MXC_CCM_CBCDR_MMDC_CH0_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_MMDC_CH0_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_MMDC_CH1_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_MMDC_CH1_PODF_MASK	/;"	d
MXC_CCM_CBCDR_MMDC_CH1_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_MMDC_CH1_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_NFC_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_NFC_PODF(/;"	d
MXC_CCM_CBCDR_NFC_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_NFC_PODF_MASK	/;"	d
MXC_CCM_CBCDR_NFC_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_NFC_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_NFC_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_NFC_PODF_RD(/;"	d
MXC_CCM_CBCDR_PERCLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PODF(/;"	d
MXC_CCM_CBCDR_PERCLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PODF_MASK	/;"	d
MXC_CCM_CBCDR_PERCLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_PERCLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PODF_RD(/;"	d
MXC_CCM_CBCDR_PERCLK_PRED1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED1(/;"	d
MXC_CCM_CBCDR_PERCLK_PRED1_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED1_MASK	/;"	d
MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET	/;"	d
MXC_CCM_CBCDR_PERCLK_PRED1_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED1_RD(/;"	d
MXC_CCM_CBCDR_PERCLK_PRED2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED2(/;"	d
MXC_CCM_CBCDR_PERCLK_PRED2_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED2_MASK	/;"	d
MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET	/;"	d
MXC_CCM_CBCDR_PERCLK_PRED2_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERCLK_PRED2_RD(/;"	d
MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_MASK	/;"	d
MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_PERIPH2_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH2_CLK_SEL	/;"	d
MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK	/;"	d
MXC_CCM_CBCDR_PERIPH_CLK2_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH_CLK2_PODF_OFFSET	/;"	d
MXC_CCM_CBCDR_PERIPH_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH_CLK_SEL	/;"	d
MXC_CCM_CBCDR_PERIPH_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCDR_PERIPH_CLK_SEL	/;"	d
MXC_CCM_CBCMR_ARM_AXI_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL(/;"	d
MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_RD(/;"	d
MXC_CCM_CBCMR_DDR_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_DDR_CLK_SEL(/;"	d
MXC_CCM_CBCMR_DDR_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_DDR_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_DDR_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_DDR_CLK_SEL_RD(/;"	d
MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU2D_CORE_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU2D_CORE_PODF_MASK	/;"	d
MXC_CCM_CBCMR_GPU2D_CORE_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU2D_CORE_PODF_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU3D_CORE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_CORE_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_GPU3D_CORE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_CORE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU3D_CORE_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_CORE_PODF_MASK	/;"	d
MXC_CCM_CBCMR_GPU3D_CORE_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_CORE_PODF_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU3D_SHADER_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_SHADER_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_GPU3D_SHADER_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_SHADER_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU3D_SHADER_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_SHADER_PODF_MASK	/;"	d
MXC_CCM_CBCMR_GPU3D_SHADER_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU3D_SHADER_PODF_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU_CLK_SEL(/;"	d
MXC_CCM_CBCMR_GPU_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_GPU_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_GPU_CLK_SEL_RD(/;"	d
MXC_CCM_CBCMR_IPU_HSP_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL(/;"	d
MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_RD(/;"	d
MXC_CCM_CBCMR_LCDIF1_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_LCDIF1_PODF_MASK /;"	d
MXC_CCM_CBCMR_LCDIF1_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_LCDIF1_PODF_OFFSET /;"	d
MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL	/;"	d
MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL	/;"	d
MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL	/;"	d
MXC_CCM_CBCMR_PERIPH2_CLK2_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH2_CLK2_SEL	/;"	d
MXC_CCM_CBCMR_PERIPH_CLK2_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH_CLK2_SEL_MASK	/;"	d
MXC_CCM_CBCMR_PERIPH_CLK2_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH_CLK2_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_PERIPH_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH_CLK_SEL(/;"	d
MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_PERIPH_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_RD(/;"	d
MXC_CCM_CBCMR_PRE_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PRE_CLK_SEL	/;"	d
MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_PRE_PERIPH_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_PRE_PERIPH_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_VDOAXI_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_VDOAXI_CLK_SEL	/;"	d
MXC_CCM_CBCMR_VPU_AXI_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL(/;"	d
MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK	/;"	d
MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_RD(/;"	d
MXC_CCM_CCDR_IPU_HS_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCDR_IPU_HS_MASK	/;"	d
MXC_CCM_CCDR_MMDC_CH0_HS_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCDR_MMDC_CH0_HS_MASK	/;"	d
MXC_CCM_CCDR_MMDC_CH1_AXI_ROOT_CG	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCDR_MMDC_CH1_AXI_ROOT_CG	/;"	d
MXC_CCM_CCDR_MMDC_CH1_HS_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCDR_MMDC_CH1_HS_MASK	/;"	d
MXC_CCM_CCGR0_AHBMUX1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AHBMUX1(/;"	d
MXC_CCM_CCGR0_AHBMUX1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AHBMUX1_OFFSET	/;"	d
MXC_CCM_CCGR0_AHBMUX2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AHBMUX2(/;"	d
MXC_CCM_CCGR0_AHBMUX2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AHBMUX2_OFFSET	/;"	d
MXC_CCM_CCGR0_AHB_MAX	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AHB_MAX(/;"	d
MXC_CCM_CCGR0_AHB_MAX_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AHB_MAX_OFFSET	/;"	d
MXC_CCM_CCGR0_AIPS_TZ1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ1(/;"	d
MXC_CCM_CCGR0_AIPS_TZ1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ1_MASK	/;"	d
MXC_CCM_CCGR0_AIPS_TZ1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ1_OFFSET	/;"	d
MXC_CCM_CCGR0_AIPS_TZ1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ1_OFFSET	/;"	d
MXC_CCM_CCGR0_AIPS_TZ2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ2(/;"	d
MXC_CCM_CCGR0_AIPS_TZ2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ2_MASK	/;"	d
MXC_CCM_CCGR0_AIPS_TZ2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ2_OFFSET	/;"	d
MXC_CCM_CCGR0_AIPS_TZ2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ2_OFFSET	/;"	d
MXC_CCM_CCGR0_AIPS_TZ3_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ3_MASK	/;"	d
MXC_CCM_CCGR0_AIPS_TZ3_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_AIPS_TZ3_OFFSET	/;"	d
MXC_CCM_CCGR0_APBHDMA_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_APBHDMA_MASK	/;"	d
MXC_CCM_CCGR0_APBHDMA_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_APBHDMA_OFFSET	/;"	d
MXC_CCM_CCGR0_ARM_AXI	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ARM_AXI(/;"	d
MXC_CCM_CCGR0_ARM_AXI_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ARM_AXI_OFFSET	/;"	d
MXC_CCM_CCGR0_ARM_BUS	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ARM_BUS(/;"	d
MXC_CCM_CCGR0_ARM_BUS_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ARM_BUS_OFFSET	/;"	d
MXC_CCM_CCGR0_ARM_DEBUG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ARM_DEBUG(/;"	d
MXC_CCM_CCGR0_ARM_DEBUG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ARM_DEBUG_OFFSET	/;"	d
MXC_CCM_CCGR0_ASRC_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_ASRC_MASK	/;"	d
MXC_CCM_CCGR0_ASRC_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_ASRC_OFFSET	/;"	d
MXC_CCM_CCGR0_CAAM_SECURE_MEM_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAAM_SECURE_MEM_MASK	/;"	d
MXC_CCM_CCGR0_CAAM_SECURE_MEM_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAAM_SECURE_MEM_OFFSET	/;"	d
MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_MASK	/;"	d
MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_OFFSET	/;"	d
MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_MASK	/;"	d
MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_OFFSET	/;"	d
MXC_CCM_CCGR0_CAN1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN1_MASK	/;"	d
MXC_CCM_CCGR0_CAN1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN1_OFFSET	/;"	d
MXC_CCM_CCGR0_CAN1_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN1_SERIAL_MASK	/;"	d
MXC_CCM_CCGR0_CAN1_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN1_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR0_CAN2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN2_MASK	/;"	d
MXC_CCM_CCGR0_CAN2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN2_OFFSET	/;"	d
MXC_CCM_CCGR0_CAN2_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN2_SERIAL_MASK	/;"	d
MXC_CCM_CCGR0_CAN2_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CAN2_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR0_CHEETAH_DBG_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CHEETAH_DBG_CLK_MASK	/;"	d
MXC_CCM_CCGR0_CHEETAH_DBG_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_CHEETAH_DBG_CLK_OFFSET	/;"	d
MXC_CCM_CCGR0_CTI2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_CTI2(/;"	d
MXC_CCM_CCGR0_CTI2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_CTI2_OFFSET	/;"	d
MXC_CCM_CCGR0_CTI3	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_CTI3(/;"	d
MXC_CCM_CCGR0_CTI3_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_CTI3_OFFSET	/;"	d
MXC_CCM_CCGR0_DAP	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_DAP(/;"	d
MXC_CCM_CCGR0_DAP_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_DAP_OFFSET	/;"	d
MXC_CCM_CCGR0_DCIC1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DCIC1_MASK	/;"	d
MXC_CCM_CCGR0_DCIC1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DCIC1_OFFSET	/;"	d
MXC_CCM_CCGR0_DCIC2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DCIC2_MASK	/;"	d
MXC_CCM_CCGR0_DCIC2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DCIC2_OFFSET	/;"	d
MXC_CCM_CCGR0_DCP_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DCP_CLK_MASK	/;"	d
MXC_CCM_CCGR0_DCP_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DCP_CLK_OFFSET	/;"	d
MXC_CCM_CCGR0_DTCP_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DTCP_MASK	/;"	d
MXC_CCM_CCGR0_DTCP_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_DTCP_OFFSET	/;"	d
MXC_CCM_CCGR0_ENET_CLK_ENABLE_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_ENET_CLK_ENABLE_MASK	/;"	d
MXC_CCM_CCGR0_ENET_CLK_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR0_ENET_CLK_ENABLE_OFFSET	/;"	d
MXC_CCM_CCGR0_IIM	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_IIM(/;"	d
MXC_CCM_CCGR0_IIM_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_IIM_OFFSET	/;"	d
MXC_CCM_CCGR0_ROM	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ROM(/;"	d
MXC_CCM_CCGR0_ROMCP	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ROMCP(/;"	d
MXC_CCM_CCGR0_ROMCP_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ROMCP_OFFSET	/;"	d
MXC_CCM_CCGR0_ROM_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_ROM_OFFSET	/;"	d
MXC_CCM_CCGR0_TPIU	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_TPIU(/;"	d
MXC_CCM_CCGR0_TPIU_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_TPIU_OFFSET	/;"	d
MXC_CCM_CCGR0_TZIC	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_TZIC(/;"	d
MXC_CCM_CCGR0_TZIC_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR0_TZIC_OFFSET	/;"	d
MXC_CCM_CCGR1_CANFD_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_CANFD_MASK	/;"	d
MXC_CCM_CCGR1_CANFD_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_CANFD_OFFSET	/;"	d
MXC_CCM_CCGR1_ECSPI1S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI1S_MASK	/;"	d
MXC_CCM_CCGR1_ECSPI1S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI1S_OFFSET	/;"	d
MXC_CCM_CCGR1_ECSPI2S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI2S_MASK	/;"	d
MXC_CCM_CCGR1_ECSPI2S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI2S_OFFSET	/;"	d
MXC_CCM_CCGR1_ECSPI3S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI3S_MASK	/;"	d
MXC_CCM_CCGR1_ECSPI3S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI3S_OFFSET	/;"	d
MXC_CCM_CCGR1_ECSPI4S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI4S_MASK	/;"	d
MXC_CCM_CCGR1_ECSPI4S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI4S_OFFSET	/;"	d
MXC_CCM_CCGR1_ECSPI5S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI5S_MASK	/;"	d
MXC_CCM_CCGR1_ECSPI5S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ECSPI5S_OFFSET	/;"	d
MXC_CCM_CCGR1_ENET_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ENET_MASK	/;"	d
MXC_CCM_CCGR1_ENET_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ENET_OFFSET	/;"	d
MXC_CCM_CCGR1_EPIT1S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_EPIT1S_MASK	/;"	d
MXC_CCM_CCGR1_EPIT1S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_EPIT1S_OFFSET	/;"	d
MXC_CCM_CCGR1_EPIT2S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_EPIT2S_MASK	/;"	d
MXC_CCM_CCGR1_EPIT2S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_EPIT2S_OFFSET	/;"	d
MXC_CCM_CCGR1_ESAIS_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ESAIS_MASK	/;"	d
MXC_CCM_CCGR1_ESAIS_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_ESAIS_OFFSET	/;"	d
MXC_CCM_CCGR1_FIRI_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_FIRI_IPG(/;"	d
MXC_CCM_CCGR1_FIRI_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_FIRI_IPG_OFFSET	/;"	d
MXC_CCM_CCGR1_FIRI_SERIAL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_FIRI_SERIAL(/;"	d
MXC_CCM_CCGR1_FIRI_SERIAL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_FIRI_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR1_GPT_BUS_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPT_BUS_MASK	/;"	d
MXC_CCM_CCGR1_GPT_BUS_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPT_BUS_OFFSET	/;"	d
MXC_CCM_CCGR1_GPT_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPT_SERIAL_MASK	/;"	d
MXC_CCM_CCGR1_GPT_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPT_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR1_GPU2D_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPU2D_MASK	/;"	d
MXC_CCM_CCGR1_GPU2D_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPU2D_OFFSET	/;"	d
MXC_CCM_CCGR1_GPU3D_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPU3D_MASK	/;"	d
MXC_CCM_CCGR1_GPU3D_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_GPU3D_OFFSET	/;"	d
MXC_CCM_CCGR1_HSI2C_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_HSI2C_IPG(/;"	d
MXC_CCM_CCGR1_HSI2C_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_HSI2C_IPG_OFFSET	/;"	d
MXC_CCM_CCGR1_HSI2C_SERIAL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_HSI2C_SERIAL(/;"	d
MXC_CCM_CCGR1_HSI2C_SERIAL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_HSI2C_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR1_I2C1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C1(/;"	d
MXC_CCM_CCGR1_I2C1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C1_OFFSET	/;"	d
MXC_CCM_CCGR1_I2C2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C2(/;"	d
MXC_CCM_CCGR1_I2C2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C2_OFFSET	/;"	d
MXC_CCM_CCGR1_I2C3	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C3(/;"	d
MXC_CCM_CCGR1_I2C3_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C3_OFFSET	/;"	d
MXC_CCM_CCGR1_I2C4_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C4_SERIAL_MASK	/;"	d
MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR1_OCRAM_S_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_OCRAM_S_MASK	/;"	d
MXC_CCM_CCGR1_OCRAM_S_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_OCRAM_S_OFFSET	/;"	d
MXC_CCM_CCGR1_SCC	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_SCC(/;"	d
MXC_CCM_CCGR1_SCC_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_SCC_OFFSET	/;"	d
MXC_CCM_CCGR1_TMAX1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_TMAX1(/;"	d
MXC_CCM_CCGR1_TMAX1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_TMAX1_OFFSET	/;"	d
MXC_CCM_CCGR1_TMAX2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_TMAX2(/;"	d
MXC_CCM_CCGR1_TMAX2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_TMAX2_OFFSET	/;"	d
MXC_CCM_CCGR1_TMAX3	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_TMAX3(/;"	d
MXC_CCM_CCGR1_TMAX3_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_TMAX3_OFFSET	/;"	d
MXC_CCM_CCGR1_UART1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART1_IPG(/;"	d
MXC_CCM_CCGR1_UART1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR1_UART1_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART1_PER(/;"	d
MXC_CCM_CCGR1_UART1_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART1_PER_OFFSET	/;"	d
MXC_CCM_CCGR1_UART2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART2_IPG(/;"	d
MXC_CCM_CCGR1_UART2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR1_UART2_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART2_PER(/;"	d
MXC_CCM_CCGR1_UART2_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART2_PER_OFFSET	/;"	d
MXC_CCM_CCGR1_UART3_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART3_IPG(/;"	d
MXC_CCM_CCGR1_UART3_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART3_IPG_OFFSET	/;"	d
MXC_CCM_CCGR1_UART3_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART3_PER(/;"	d
MXC_CCM_CCGR1_UART3_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR1_UART3_PER_OFFSET	/;"	d
MXC_CCM_CCGR1_WAKEUP_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_WAKEUP_MASK	/;"	d
MXC_CCM_CCGR1_WAKEUP_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR1_WAKEUP_OFFSET	/;"	d
MXC_CCM_CCGR2_CSI_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_CSI_MASK	/;"	d
MXC_CCM_CCGR2_CSI_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_CSI_OFFSET	/;"	d
MXC_CCM_CCGR2_EPIT1_HF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT1_HF(/;"	d
MXC_CCM_CCGR2_EPIT1_HF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT1_HF_OFFSET	/;"	d
MXC_CCM_CCGR2_EPIT1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT1_IPG(/;"	d
MXC_CCM_CCGR2_EPIT1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR2_EPIT2_HF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT2_HF(/;"	d
MXC_CCM_CCGR2_EPIT2_HF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT2_HF_OFFSET	/;"	d
MXC_CCM_CCGR2_EPIT2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT2_IPG(/;"	d
MXC_CCM_CCGR2_EPIT2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_EPIT2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR2_ESAI_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_ESAI_CLK_MASK	/;"	d
MXC_CCM_CCGR2_ESAI_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_ESAI_CLK_OFFSET	/;"	d
MXC_CCM_CCGR2_FEC	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_FEC(/;"	d
MXC_CCM_CCGR2_FEC_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_FEC_OFFSET	/;"	d
MXC_CCM_CCGR2_GPT_HF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_GPT_HF(/;"	d
MXC_CCM_CCGR2_GPT_HF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_GPT_HF_OFFSET	/;"	d
MXC_CCM_CCGR2_GPT_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_GPT_IPG(/;"	d
MXC_CCM_CCGR2_GPT_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_GPT_IPG_OFFSET	/;"	d
MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_MASK	/;"	d
MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_OFFSET	/;"	d
MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_MASK	/;"	d
MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_OFFSET	/;"	d
MXC_CCM_CCGR2_I2C1_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_I2C1_SERIAL_MASK	/;"	d
MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR2_I2C2_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_I2C2_SERIAL_MASK	/;"	d
MXC_CCM_CCGR2_I2C2_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_I2C2_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR2_I2C3_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_I2C3_SERIAL_MASK	/;"	d
MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR2_IOMUXC_SNVS_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IOMUXC_SNVS_CLK_MASK	/;"	d
MXC_CCM_CCGR2_IOMUXC_SNVS_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IOMUXC_SNVS_CLK_OFFSET	/;"	d
MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK	/;"	d
MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_OFFSET	/;"	d
MXC_CCM_CCGR2_IPMUX1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPMUX1_MASK	/;"	d
MXC_CCM_CCGR2_IPMUX1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPMUX1_OFFSET	/;"	d
MXC_CCM_CCGR2_IPMUX2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPMUX2_MASK	/;"	d
MXC_CCM_CCGR2_IPMUX2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPMUX2_OFFSET	/;"	d
MXC_CCM_CCGR2_IPMUX3_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPMUX3_MASK	/;"	d
MXC_CCM_CCGR2_IPMUX3_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPMUX3_OFFSET	/;"	d
MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPGS_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPGS_MASK	/;"	d
MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPGS_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPGS_OFFSET	/;"	d
MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_MASK	/;"	d
MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR2_IPSYNC_VDOA_IPG_MASTER_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPSYNC_VDOA_IPG_MASTER_CLK_MASK	/;"	d
MXC_CCM_CCGR2_IPSYNC_VDOA_IPG_MASTER_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_IPSYNC_VDOA_IPG_MASTER_CLK_OFFSET	/;"	d
MXC_CCM_CCGR2_LCD_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_LCD_MASK	/;"	d
MXC_CCM_CCGR2_LCD_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_LCD_OFFSET	/;"	d
MXC_CCM_CCGR2_OCOTP_CTRL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_OCOTP_CTRL_MASK	/;"	d
MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET	/;"	d
MXC_CCM_CCGR2_OWIRE	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_OWIRE(/;"	d
MXC_CCM_CCGR2_OWIRE_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_OWIRE_OFFSET	/;"	d
MXC_CCM_CCGR2_PWM1_HF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM1_HF(/;"	d
MXC_CCM_CCGR2_PWM1_HF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM1_HF_OFFSET	/;"	d
MXC_CCM_CCGR2_PWM1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM1_IPG(/;"	d
MXC_CCM_CCGR2_PWM1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR2_PWM2_HF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM2_HF(/;"	d
MXC_CCM_CCGR2_PWM2_HF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM2_HF_OFFSET	/;"	d
MXC_CCM_CCGR2_PWM2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM2_IPG(/;"	d
MXC_CCM_CCGR2_PWM2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_PWM2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR2_PXP_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_PXP_MASK	/;"	d
MXC_CCM_CCGR2_PXP_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR2_PXP_OFFSET	/;"	d
MXC_CCM_CCGR2_TVE	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_TVE(/;"	d
MXC_CCM_CCGR2_TVE_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_TVE_OFFSET	/;"	d
MXC_CCM_CCGR2_USBOH3_60M	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_USBOH3_60M(/;"	d
MXC_CCM_CCGR2_USBOH3_60M_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_USBOH3_60M_OFFSET	/;"	d
MXC_CCM_CCGR2_USBOH3_IPG_AHB	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_USBOH3_IPG_AHB(/;"	d
MXC_CCM_CCGR2_USBOH3_IPG_AHB_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_USBOH3_IPG_AHB_OFFSET	/;"	d
MXC_CCM_CCGR2_USB_PHY	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_USB_PHY(/;"	d
MXC_CCM_CCGR2_USB_PHY_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR2_USB_PHY_OFFSET	/;"	d
MXC_CCM_CCGR3_A7_CLKDIV_PATCH_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_A7_CLKDIV_PATCH_MASK	/;"	d
MXC_CCM_CCGR3_A7_CLKDIV_PATCH_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_A7_CLKDIV_PATCH_OFFSET	/;"	d
MXC_CCM_CCGR3_AXI_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_AXI_CLK_MASK	/;"	d
MXC_CCM_CCGR3_AXI_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_AXI_CLK_OFFSET	/;"	d
MXC_CCM_CCGR3_DISP_AXI_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_DISP_AXI_MASK /;"	d
MXC_CCM_CCGR3_DISP_AXI_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_DISP_AXI_OFFSET /;"	d
MXC_CCM_CCGR3_ENET_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_ENET_MASK	/;"	d
MXC_CCM_CCGR3_ENET_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_ENET_OFFSET	/;"	d
MXC_CCM_CCGR3_EPDC_CLK_ENABLE_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_EPDC_CLK_ENABLE_MASK	/;"	d
MXC_CCM_CCGR3_EPDC_CLK_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_EPDC_CLK_ENABLE_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC1_IPG(/;"	d
MXC_CCM_CCGR3_ESDHC1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC1_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC1_PER(/;"	d
MXC_CCM_CCGR3_ESDHC1_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC1_PER_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC2_IPG(/;"	d
MXC_CCM_CCGR3_ESDHC2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC2_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC2_PER(/;"	d
MXC_CCM_CCGR3_ESDHC2_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC2_PER_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC3_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC3_IPG(/;"	d
MXC_CCM_CCGR3_ESDHC3_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC3_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC3_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC3_PER(/;"	d
MXC_CCM_CCGR3_ESDHC3_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC3_PER_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC4_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC4_IPG(/;"	d
MXC_CCM_CCGR3_ESDHC4_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC4_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_ESDHC4_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC4_PER(/;"	d
MXC_CCM_CCGR3_ESDHC4_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_ESDHC4_PER_OFFSET	/;"	d
MXC_CCM_CCGR3_GPIO4_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_GPIO4_CLK_MASK	/;"	d
MXC_CCM_CCGR3_GPIO4_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_GPIO4_CLK_OFFSET	/;"	d
MXC_CCM_CCGR3_IOMUXC_SNVS_GPR_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IOMUXC_SNVS_GPR_CLK_MASK	/;"	d
MXC_CCM_CCGR3_IOMUXC_SNVS_GPR_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IOMUXC_SNVS_GPR_CLK_OFFSET	/;"	d
MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK	/;"	d
MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET	/;"	d
MXC_CCM_CCGR3_IPU1_IPU_DI1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU1_IPU_DI1_MASK	/;"	d
MXC_CCM_CCGR3_IPU1_IPU_DI1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU1_IPU_DI1_OFFSET	/;"	d
MXC_CCM_CCGR3_IPU1_IPU_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU1_IPU_MASK	/;"	d
MXC_CCM_CCGR3_IPU1_IPU_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU1_IPU_OFFSET	/;"	d
MXC_CCM_CCGR3_IPU2_IPU_DI0_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU2_IPU_DI0_MASK	/;"	d
MXC_CCM_CCGR3_IPU2_IPU_DI0_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU2_IPU_DI0_OFFSET	/;"	d
MXC_CCM_CCGR3_IPU2_IPU_DI1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU2_IPU_DI1_MASK	/;"	d
MXC_CCM_CCGR3_IPU2_IPU_DI1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU2_IPU_DI1_OFFSET	/;"	d
MXC_CCM_CCGR3_IPU2_IPU_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU2_IPU_MASK	/;"	d
MXC_CCM_CCGR3_IPU2_IPU_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_IPU2_IPU_OFFSET	/;"	d
MXC_CCM_CCGR3_LCDIF1_PIX_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LCDIF1_PIX_MASK /;"	d
MXC_CCM_CCGR3_LCDIF1_PIX_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LCDIF1_PIX_OFFSET /;"	d
MXC_CCM_CCGR3_LCDIF2_PIX_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LCDIF2_PIX_MASK /;"	d
MXC_CCM_CCGR3_LCDIF2_PIX_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LCDIF2_PIX_OFFSET /;"	d
MXC_CCM_CCGR3_LDB_DI0_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LDB_DI0_MASK	/;"	d
MXC_CCM_CCGR3_LDB_DI0_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LDB_DI0_OFFSET	/;"	d
MXC_CCM_CCGR3_LDB_DI1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LDB_DI1_MASK	/;"	d
MXC_CCM_CCGR3_LDB_DI1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_LDB_DI1_OFFSET	/;"	d
MXC_CCM_CCGR3_M4_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_M4_MASK	/;"	d
MXC_CCM_CCGR3_M4_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_M4_OFFSET	/;"	d
MXC_CCM_CCGR3_MIPI_CORE_CFG_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MIPI_CORE_CFG_MASK	/;"	d
MXC_CCM_CCGR3_MIPI_CORE_CFG_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MIPI_CORE_CFG_OFFSET	/;"	d
MXC_CCM_CCGR3_MLB_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MLB_MASK	/;"	d
MXC_CCM_CCGR3_MLB_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MLB_OFFSET	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P0_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P0_MASK	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P0_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P0_OFFSET	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P1_MASK	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_ACLK_FAST_CORE_P1_OFFSET	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P0_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P0_MASK	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P0_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P0_OFFSET	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P1_MASK	/;"	d
MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_MMDC_CORE_IPG_CLK_P1_OFFSET	/;"	d
MXC_CCM_CCGR3_OCRAM_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_OCRAM_MASK	/;"	d
MXC_CCM_CCGR3_OCRAM_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_OCRAM_OFFSET	/;"	d
MXC_CCM_CCGR3_OPENVGAXICLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_OPENVGAXICLK_MASK	/;"	d
MXC_CCM_CCGR3_OPENVGAXICLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_OPENVGAXICLK_OFFSET	/;"	d
MXC_CCM_CCGR3_QSPI1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_QSPI1_MASK	/;"	d
MXC_CCM_CCGR3_QSPI1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_QSPI1_OFFSET	/;"	d
MXC_CCM_CCGR3_QSPI_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_QSPI_MASK	/;"	d
MXC_CCM_CCGR3_QSPI_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_QSPI_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI1_IPG(/;"	d
MXC_CCM_CCGR3_SSI1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI1_SSI	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI1_SSI(/;"	d
MXC_CCM_CCGR3_SSI1_SSI_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI1_SSI_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI2_IPG(/;"	d
MXC_CCM_CCGR3_SSI2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI2_SSI	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI2_SSI(/;"	d
MXC_CCM_CCGR3_SSI2_SSI_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI2_SSI_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI3_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI3_IPG(/;"	d
MXC_CCM_CCGR3_SSI3_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI3_IPG_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI3_SSI	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI3_SSI(/;"	d
MXC_CCM_CCGR3_SSI3_SSI_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI3_SSI_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI_EXT1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI_EXT1(/;"	d
MXC_CCM_CCGR3_SSI_EXT1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI_EXT1_OFFSET	/;"	d
MXC_CCM_CCGR3_SSI_EXT2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI_EXT2(/;"	d
MXC_CCM_CCGR3_SSI_EXT2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR3_SSI_EXT2_OFFSET	/;"	d
MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_MASK	/;"	d
MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_OFFSET	/;"	d
MXC_CCM_CCGR4_CAN2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_CAN2_IPG(/;"	d
MXC_CCM_CCGR4_CAN2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_CAN2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR4_CAN2_SERIAL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_CAN2_SERIAL(/;"	d
MXC_CCM_CCGR4_CAN2_SERIAL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_CAN2_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR4_CSPI_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_CSPI_IPG(/;"	d
MXC_CCM_CCGR4_CSPI_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_CSPI_IPG_OFFSET	/;"	d
MXC_CCM_CCGR4_ECSPI1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI1_IPG(/;"	d
MXC_CCM_CCGR4_ECSPI1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR4_ECSPI1_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI1_PER(/;"	d
MXC_CCM_CCGR4_ECSPI1_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI1_PER_OFFSET	/;"	d
MXC_CCM_CCGR4_ECSPI2_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI2_IPG(/;"	d
MXC_CCM_CCGR4_ECSPI2_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI2_IPG_OFFSET	/;"	d
MXC_CCM_CCGR4_ECSPI2_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI2_PER(/;"	d
MXC_CCM_CCGR4_ECSPI2_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_ECSPI2_PER_OFFSET	/;"	d
MXC_CCM_CCGR4_PATA	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_PATA(/;"	d
MXC_CCM_CCGR4_PATA_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_PATA_OFFSET	/;"	d
MXC_CCM_CCGR4_PCIE_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PCIE_MASK	/;"	d
MXC_CCM_CCGR4_PCIE_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PCIE_OFFSET	/;"	d
MXC_CCM_CCGR4_PL301_MX6QFAST1_S133_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PL301_MX6QFAST1_S133_MASK	/;"	d
MXC_CCM_CCGR4_PL301_MX6QFAST1_S133_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PL301_MX6QFAST1_S133_OFFSET	/;"	d
MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK	/;"	d
MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET	/;"	d
MXC_CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE_MASK	/;"	d
MXC_CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE_OFFSET	/;"	d
MXC_CCM_CCGR4_PWM1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM1_MASK	/;"	d
MXC_CCM_CCGR4_PWM1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM1_OFFSET	/;"	d
MXC_CCM_CCGR4_PWM2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM2_MASK	/;"	d
MXC_CCM_CCGR4_PWM2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM2_OFFSET	/;"	d
MXC_CCM_CCGR4_PWM3_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM3_MASK	/;"	d
MXC_CCM_CCGR4_PWM3_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM3_OFFSET	/;"	d
MXC_CCM_CCGR4_PWM4_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM4_MASK	/;"	d
MXC_CCM_CCGR4_PWM4_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_PWM4_OFFSET	/;"	d
MXC_CCM_CCGR4_QSPI2_ENFC_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_QSPI2_ENFC_MASK	/;"	d
MXC_CCM_CCGR4_QSPI2_ENFC_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_QSPI2_ENFC_OFFSET	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_OFFSET	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_OFFSET	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_OFFSET	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK	/;"	d
MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_OFFSET	/;"	d
MXC_CCM_CCGR4_RTIC	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_RTIC(/;"	d
MXC_CCM_CCGR4_RTIC_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_RTIC_OFFSET	/;"	d
MXC_CCM_CCGR4_SAHARA	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SAHARA(/;"	d
MXC_CCM_CCGR4_SAHARA_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SAHARA_OFFSET	/;"	d
MXC_CCM_CCGR4_SATA	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SATA(/;"	d
MXC_CCM_CCGR4_SATA_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SATA_OFFSET	/;"	d
MXC_CCM_CCGR4_SDMA	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SDMA(/;"	d
MXC_CCM_CCGR4_SDMA_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SDMA_OFFSET	/;"	d
MXC_CCM_CCGR4_SIM_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SIM_IPG(/;"	d
MXC_CCM_CCGR4_SIM_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SIM_IPG_OFFSET	/;"	d
MXC_CCM_CCGR4_SIM_SERIAL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SIM_SERIAL(/;"	d
MXC_CCM_CCGR4_SIM_SERIAL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SIM_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR4_SRTC	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SRTC(/;"	d
MXC_CCM_CCGR4_SRTC_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_SRTC_OFFSET	/;"	d
MXC_CCM_CCGR4_USB_PHY1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_USB_PHY1(/;"	d
MXC_CCM_CCGR4_USB_PHY1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_USB_PHY1_OFFSET	/;"	d
MXC_CCM_CCGR4_USB_PHY2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_USB_PHY2(/;"	d
MXC_CCM_CCGR4_USB_PHY2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR4_USB_PHY2_OFFSET	/;"	d
MXC_CCM_CCGR5_EMI_ENFC	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_ENFC(/;"	d
MXC_CCM_CCGR5_EMI_ENFC_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_ENFC_OFFSET	/;"	d
MXC_CCM_CCGR5_EMI_FAST	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_FAST(/;"	d
MXC_CCM_CCGR5_EMI_FAST_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_FAST_OFFSET	/;"	d
MXC_CCM_CCGR5_EMI_INT1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_INT1(/;"	d
MXC_CCM_CCGR5_EMI_INT1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_INT1_OFFSET	/;"	d
MXC_CCM_CCGR5_EMI_SLOW	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_SLOW(/;"	d
MXC_CCM_CCGR5_EMI_SLOW_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_SLOW_OFFSET	/;"	d
MXC_CCM_CCGR5_EMI_WRCK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_WRCK(/;"	d
MXC_CCM_CCGR5_EMI_WRCK_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_EMI_WRCK_OFFSET	/;"	d
MXC_CCM_CCGR5_GARB	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_GARB(/;"	d
MXC_CCM_CCGR5_GARB_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_GARB_OFFSET	/;"	d
MXC_CCM_CCGR5_GPC_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_GPC_IPG(/;"	d
MXC_CCM_CCGR5_GPC_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_GPC_IPG_OFFSET	/;"	d
MXC_CCM_CCGR5_GPU	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_GPU(/;"	d
MXC_CCM_CCGR5_GPU_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_GPU_OFFSET	/;"	d
MXC_CCM_CCGR5_IPU	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_IPU(/;"	d
MXC_CCM_CCGR5_IPUMUX1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_IPUMUX1(/;"	d
MXC_CCM_CCGR5_IPUMUX12	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_IPUMUX12(/;"	d
MXC_CCM_CCGR5_IPUMUX12_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_IPUMUX12_OFFSET	/;"	d
MXC_CCM_CCGR5_IPUMUX1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_IPUMUX1_OFFSET	/;"	d
MXC_CCM_CCGR5_IPU_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_IPU_OFFSET	/;"	d
MXC_CCM_CCGR5_ROM_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_ROM_MASK	/;"	d
MXC_CCM_CCGR5_ROM_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_ROM_OFFSET	/;"	d
MXC_CCM_CCGR5_SAI1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SAI1_MASK	/;"	d
MXC_CCM_CCGR5_SAI1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SAI1_OFFSET	/;"	d
MXC_CCM_CCGR5_SAI2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SAI2_MASK	/;"	d
MXC_CCM_CCGR5_SAI2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SAI2_OFFSET	/;"	d
MXC_CCM_CCGR5_SATA_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SATA_MASK	/;"	d
MXC_CCM_CCGR5_SATA_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SATA_OFFSET	/;"	d
MXC_CCM_CCGR5_SDMA_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SDMA_MASK	/;"	d
MXC_CCM_CCGR5_SDMA_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SDMA_OFFSET	/;"	d
MXC_CCM_CCGR5_SPBA	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPBA(/;"	d
MXC_CCM_CCGR5_SPBA_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SPBA_MASK	/;"	d
MXC_CCM_CCGR5_SPBA_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPBA_OFFSET	/;"	d
MXC_CCM_CCGR5_SPBA_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SPBA_OFFSET	/;"	d
MXC_CCM_CCGR5_SPDIF0	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF0(/;"	d
MXC_CCM_CCGR5_SPDIF0_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF0_OFFSET	/;"	d
MXC_CCM_CCGR5_SPDIF1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF1(/;"	d
MXC_CCM_CCGR5_SPDIF1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF1_OFFSET	/;"	d
MXC_CCM_CCGR5_SPDIF_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF_IPG(/;"	d
MXC_CCM_CCGR5_SPDIF_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF_IPG_OFFSET	/;"	d
MXC_CCM_CCGR5_SPDIF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF_MASK	/;"	d
MXC_CCM_CCGR5_SPDIF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SPDIF_OFFSET	/;"	d
MXC_CCM_CCGR5_SSI1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SSI1_MASK	/;"	d
MXC_CCM_CCGR5_SSI1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SSI1_OFFSET	/;"	d
MXC_CCM_CCGR5_SSI2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SSI2_MASK	/;"	d
MXC_CCM_CCGR5_SSI2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SSI2_OFFSET	/;"	d
MXC_CCM_CCGR5_SSI3_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SSI3_MASK	/;"	d
MXC_CCM_CCGR5_SSI3_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_SSI3_OFFSET	/;"	d
MXC_CCM_CCGR5_UART_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_UART_MASK	/;"	d
MXC_CCM_CCGR5_UART_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_UART_OFFSET	/;"	d
MXC_CCM_CCGR5_UART_SERIAL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_UART_SERIAL_MASK	/;"	d
MXC_CCM_CCGR5_UART_SERIAL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR5_UART_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR5_VPU	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_VPU(/;"	d
MXC_CCM_CCGR5_VPU_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_VPU_OFFSET	/;"	d
MXC_CCM_CCGR5_VPU_REF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_VPU_REF(/;"	d
MXC_CCM_CCGR5_VPU_REF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR5_VPU_REF_OFFSET	/;"	d
MXC_CCM_CCGR6_AIPS_TZ3_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_AIPS_TZ3_CLK_MASK	/;"	d
MXC_CCM_CCGR6_AIPS_TZ3_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_AIPS_TZ3_CLK_OFFSET	/;"	d
MXC_CCM_CCGR6_BCH_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_BCH_MASK	/;"	d
MXC_CCM_CCGR6_BCH_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_BCH_OFFSET	/;"	d
MXC_CCM_CCGR6_CAN1_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CAN1_IPG(/;"	d
MXC_CCM_CCGR6_CAN1_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CAN1_IPG_OFFSET	/;"	d
MXC_CCM_CCGR6_CAN1_SERIAL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CAN1_SERIAL(/;"	d
MXC_CCM_CCGR6_CAN1_SERIAL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CAN1_SERIAL_OFFSET	/;"	d
MXC_CCM_CCGR6_CSI_MCLK1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CSI_MCLK1(/;"	d
MXC_CCM_CCGR6_CSI_MCLK1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CSI_MCLK1_OFFSET	/;"	d
MXC_CCM_CCGR6_CSI_MCLK2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CSI_MCLK2(/;"	d
MXC_CCM_CCGR6_CSI_MCLK2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_CSI_MCLK2_OFFSET	/;"	d
MXC_CCM_CCGR6_EMI_GARB	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_EMI_GARB(/;"	d
MXC_CCM_CCGR6_EMI_GARB_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_EMI_GARB_OFFSET	/;"	d
MXC_CCM_CCGR6_EMI_INT2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_EMI_INT2(/;"	d
MXC_CCM_CCGR6_EMI_INT2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_EMI_INT2_OFFSET	/;"	d
MXC_CCM_CCGR6_EMI_SLOW_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_EMI_SLOW_MASK	/;"	d
MXC_CCM_CCGR6_EMI_SLOW_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_EMI_SLOW_OFFSET	/;"	d
MXC_CCM_CCGR6_ESAI_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_ESAI_IPG(/;"	d
MXC_CCM_CCGR6_ESAI_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_ESAI_IPG_OFFSET	/;"	d
MXC_CCM_CCGR6_ESAI_ROOT	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_ESAI_ROOT(/;"	d
MXC_CCM_CCGR6_ESAI_ROOT_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_ESAI_ROOT_OFFSET	/;"	d
MXC_CCM_CCGR6_GIS_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_GIS_MASK	/;"	d
MXC_CCM_CCGR6_GIS_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_GIS_OFFSET	/;"	d
MXC_CCM_CCGR6_GPMI_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_GPMI_MASK	/;"	d
MXC_CCM_CCGR6_GPMI_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_GPMI_OFFSET	/;"	d
MXC_CCM_CCGR6_GPU2D	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_GPU2D(/;"	d
MXC_CCM_CCGR6_GPU2D_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_GPU2D_OFFSET	/;"	d
MXC_CCM_CCGR6_I2C4_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_I2C4_MASK	/;"	d
MXC_CCM_CCGR6_I2C4_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_I2C4_OFFSET	/;"	d
MXC_CCM_CCGR6_IPMUX4_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_IPMUX4_CLK_MASK	/;"	d
MXC_CCM_CCGR6_IPMUX4_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_IPMUX4_CLK_OFFSET	/;"	d
MXC_CCM_CCGR6_IPUMUX2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_IPUMUX2(/;"	d
MXC_CCM_CCGR6_IPUMUX2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_IPUMUX2_OFFSET	/;"	d
MXC_CCM_CCGR6_IPU_DI0	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_IPU_DI0(/;"	d
MXC_CCM_CCGR6_IPU_DI0_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_IPU_DI0_OFFSET	/;"	d
MXC_CCM_CCGR6_IPU_DI1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_IPU_DI1(/;"	d
MXC_CCM_CCGR6_IPU_DI1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_IPU_DI1_OFFSET	/;"	d
MXC_CCM_CCGR6_LDB_DI0	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_LDB_DI0(/;"	d
MXC_CCM_CCGR6_LDB_DI0_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_LDB_DI0_OFFSET	/;"	d
MXC_CCM_CCGR6_LDB_DI1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_LDB_DI1(/;"	d
MXC_CCM_CCGR6_LDB_DI1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_LDB_DI1_OFFSET	/;"	d
MXC_CCM_CCGR6_OCRAM	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_OCRAM(/;"	d
MXC_CCM_CCGR6_OCRAM_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_OCRAM_OFFSET	/;"	d
MXC_CCM_CCGR6_PL301_2X2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_PL301_2X2(/;"	d
MXC_CCM_CCGR6_PL301_2X2_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_PL301_2X2_OFFSET	/;"	d
MXC_CCM_CCGR6_PL301_4X1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_PL301_4X1(/;"	d
MXC_CCM_CCGR6_PL301_4X1_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR6_PL301_4X1_OFFSET	/;"	d
MXC_CCM_CCGR6_PRG_CLK0_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PRG_CLK0_MASK	/;"	d
MXC_CCM_CCGR6_PWM5_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM5_MASK	/;"	d
MXC_CCM_CCGR6_PWM5_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM5_OFFSET	/;"	d
MXC_CCM_CCGR6_PWM6_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM6_MASK	/;"	d
MXC_CCM_CCGR6_PWM6_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM6_OFFSET	/;"	d
MXC_CCM_CCGR6_PWM7_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM7_MASK	/;"	d
MXC_CCM_CCGR6_PWM7_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM7_OFFSET	/;"	d
MXC_CCM_CCGR6_PWM8_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM8_MASK	/;"	d
MXC_CCM_CCGR6_PWM8_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_PWM8_OFFSET	/;"	d
MXC_CCM_CCGR6_SIM1_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_SIM1_CLK_MASK	/;"	d
MXC_CCM_CCGR6_SIM1_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_SIM1_CLK_OFFSET	/;"	d
MXC_CCM_CCGR6_SIM2_CLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_SIM2_CLK_MASK	/;"	d
MXC_CCM_CCGR6_SIM2_CLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_SIM2_CLK_OFFSET	/;"	d
MXC_CCM_CCGR6_USBOH3_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USBOH3_MASK	/;"	d
MXC_CCM_CCGR6_USBOH3_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USBOH3_OFFSET	/;"	d
MXC_CCM_CCGR6_USDHC1_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC1_MASK	/;"	d
MXC_CCM_CCGR6_USDHC1_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC1_OFFSET	/;"	d
MXC_CCM_CCGR6_USDHC2_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC2_MASK	/;"	d
MXC_CCM_CCGR6_USDHC2_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC2_OFFSET	/;"	d
MXC_CCM_CCGR6_USDHC3_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC3_MASK	/;"	d
MXC_CCM_CCGR6_USDHC3_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC3_OFFSET	/;"	d
MXC_CCM_CCGR6_USDHC4_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC4_MASK	/;"	d
MXC_CCM_CCGR6_USDHC4_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_USDHC4_OFFSET	/;"	d
MXC_CCM_CCGR6_VADC_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_VADC_MASK	/;"	d
MXC_CCM_CCGR6_VADC_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_VADC_OFFSET	/;"	d
MXC_CCM_CCGR6_VDOAXICLK_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_VDOAXICLK_MASK	/;"	d
MXC_CCM_CCGR6_VDOAXICLK_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR6_VDOAXICLK_OFFSET	/;"	d
MXC_CCM_CCGR7_ASRC_ASRCK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_ASRC_ASRCK(/;"	d
MXC_CCM_CCGR7_ASRC_ASRCK_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_ASRC_ASRCK_OFFSET	/;"	d
MXC_CCM_CCGR7_ASRC_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_ASRC_IPG(/;"	d
MXC_CCM_CCGR7_ASRC_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_ASRC_IPG_OFFSET	/;"	d
MXC_CCM_CCGR7_IEEE1588	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_IEEE1588(/;"	d
MXC_CCM_CCGR7_IEEE1588_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_IEEE1588_OFFSET	/;"	d
MXC_CCM_CCGR7_MLB	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_MLB(/;"	d
MXC_CCM_CCGR7_MLB_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_MLB_OFFSET	/;"	d
MXC_CCM_CCGR7_UART4_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART4_IPG(/;"	d
MXC_CCM_CCGR7_UART4_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART4_IPG_OFFSET	/;"	d
MXC_CCM_CCGR7_UART4_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART4_PER(/;"	d
MXC_CCM_CCGR7_UART4_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART4_PER_OFFSET	/;"	d
MXC_CCM_CCGR7_UART5_IPG	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART5_IPG(/;"	d
MXC_CCM_CCGR7_UART5_IPG_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART5_IPG_OFFSET	/;"	d
MXC_CCM_CCGR7_UART5_PER	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART5_PER(/;"	d
MXC_CCM_CCGR7_UART5_PER_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR7_UART5_PER_OFFSET	/;"	d
MXC_CCM_CCGR_CG_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR_CG_MASK	/;"	d
MXC_CCM_CCGR_CG_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCGR_CG_MASK	/;"	d
MXC_CCM_CCGR_CG_OFF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR_CG_OFF	/;"	d
MXC_CCM_CCGR_CG_ON	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR_CG_ON	/;"	d
MXC_CCM_CCGR_CG_RUN_ON	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCGR_CG_RUN_ON	/;"	d
MXC_CCM_CCMR_LPM_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_LPM_MASK /;"	d
MXC_CCM_CCMR_LPM_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_LPM_OFFSET /;"	d
MXC_CCM_CCMR_MPE	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_MPE /;"	d
MXC_CCM_CCMR_RAMW_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_RAMW_MASK /;"	d
MXC_CCM_CCMR_RAMW_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_RAMW_OFFSET /;"	d
MXC_CCM_CCMR_ROMW_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_ROMW_MASK /;"	d
MXC_CCM_CCMR_ROMW_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_ROMW_OFFSET /;"	d
MXC_CCM_CCMR_STBY_EXIT_SRC	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_STBY_EXIT_SRC /;"	d
MXC_CCM_CCMR_UPE	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_UPE /;"	d
MXC_CCM_CCMR_VOL_RDY_CNT_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_VOL_RDY_CNT_MASK /;"	d
MXC_CCM_CCMR_VOL_RDY_CNT_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_VOL_RDY_CNT_OFFSET /;"	d
MXC_CCM_CCMR_VSTBY	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_VSTBY /;"	d
MXC_CCM_CCMR_WBEN	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_WBEN /;"	d
MXC_CCM_CCMR_WFI	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CCMR_WFI /;"	d
MXC_CCM_CCOSR_CKO2_DIV_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKO2_DIV_MASK	/;"	d
MXC_CCM_CCOSR_CKO2_DIV_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKO2_DIV_OFFSET	/;"	d
MXC_CCM_CCOSR_CKO2_EN_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKO2_EN_OFFSET	/;"	d
MXC_CCM_CCOSR_CKO2_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKO2_SEL_MASK	/;"	d
MXC_CCM_CCOSR_CKO2_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKO2_SEL_OFFSET	/;"	d
MXC_CCM_CCOSR_CKOL_DIV_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKOL_DIV_MASK	/;"	d
MXC_CCM_CCOSR_CKOL_DIV_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKOL_DIV_OFFSET	/;"	d
MXC_CCM_CCOSR_CKOL_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKOL_EN	/;"	d
MXC_CCM_CCOSR_CKOL_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKOL_SEL_MASK	/;"	d
MXC_CCM_CCOSR_CKOL_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CKOL_SEL_OFFSET	/;"	d
MXC_CCM_CCOSR_CLK_OUT_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCOSR_CLK_OUT_SEL	/;"	d
MXC_CCM_CCR_CAMP1_EN	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_CAMP1_EN	/;"	d
MXC_CCM_CCR_CAMP2_EN	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_CAMP2_EN	/;"	d
MXC_CCM_CCR_COSC_EN	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_COSC_EN	/;"	d
MXC_CCM_CCR_COSC_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_COSC_EN	/;"	d
MXC_CCM_CCR_FPM_EN	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_FPM_EN	/;"	d
MXC_CCM_CCR_FPM_MULT	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_FPM_MULT	/;"	d
MXC_CCM_CCR_OSCNT	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_OSCNT(/;"	d
MXC_CCM_CCR_OSCNT_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_OSCNT_MASK	/;"	d
MXC_CCM_CCR_OSCNT_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_OSCNT_MASK	/;"	d
MXC_CCM_CCR_OSCNT_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_OSCNT_OFFSET	/;"	d
MXC_CCM_CCR_OSCNT_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_OSCNT_OFFSET	/;"	d
MXC_CCM_CCR_OSCNT_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCR_OSCNT_RD(/;"	d
MXC_CCM_CCR_RBC_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_RBC_EN	/;"	d
MXC_CCM_CCR_REG_BYPASS_CNT_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_REG_BYPASS_CNT_MASK	/;"	d
MXC_CCM_CCR_REG_BYPASS_CNT_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_REG_BYPASS_CNT_OFFSET	/;"	d
MXC_CCM_CCR_WB_COUNT_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_WB_COUNT_MASK	/;"	d
MXC_CCM_CCR_WB_COUNT_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCR_WB_COUNT_OFFSET	/;"	d
MXC_CCM_CCSR_LP_APM	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_LP_APM	/;"	d
MXC_CCM_CCSR_PDF_352M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_352M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PDF_400M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_400M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PDF_454M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_454M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PDF_508M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_508M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PDF_540M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_540M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PDF_594M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_594M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PDF_720M_AUTO_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PDF_720M_AUTO_DIS	/;"	d
MXC_CCM_CCSR_PLL1_SW_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_PLL1_SW_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_PLL2_DIV_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL2_DIV_PODF(/;"	d
MXC_CCM_CCSR_PLL2_DIV_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL2_DIV_PODF_MASK	/;"	d
MXC_CCM_CCSR_PLL2_DIV_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL2_DIV_PODF_OFFSET	/;"	d
MXC_CCM_CCSR_PLL2_DIV_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL2_DIV_PODF_RD(/;"	d
MXC_CCM_CCSR_PLL2_SW_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_PLL2_SW_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_PLL3_DIV_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL3_DIV_PODF(/;"	d
MXC_CCM_CCSR_PLL3_DIV_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL3_DIV_PODF_MASK	/;"	d
MXC_CCM_CCSR_PLL3_DIV_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL3_DIV_PODF_OFFSET	/;"	d
MXC_CCM_CCSR_PLL3_DIV_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL3_DIV_PODF_RD(/;"	d
MXC_CCM_CCSR_PLL3_SW_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_PLL3_SW_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_PLL4_SW_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_PLL4_SW_CLK_SEL	/;"	d
MXC_CCM_CCSR_STEP_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_STEP_SEL(/;"	d
MXC_CCM_CCSR_STEP_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CCSR_STEP_SEL	/;"	d
MXC_CCM_CCSR_STEP_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_STEP_SEL_MASK	/;"	d
MXC_CCM_CCSR_STEP_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_STEP_SEL_OFFSET	/;"	d
MXC_CCM_CCSR_STEP_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CCSR_STEP_SEL_RD(/;"	d
MXC_CCM_CDCDR_HSI_TX_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_HSI_TX_CLK_SEL	/;"	d
MXC_CCM_CDCDR_HSI_TX_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_HSI_TX_PODF_MASK	/;"	d
MXC_CCM_CDCDR_HSI_TX_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_HSI_TX_PODF_OFFSET	/;"	d
MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK	/;"	d
MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK	/;"	d
MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CDCDR_SPDIF0_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_MASK	/;"	d
MXC_CCM_CDCDR_SPDIF0_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK	/;"	d
MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK	/;"	d
MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CDCDR_SPDIF1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF1_CLK_SEL_MASK	/;"	d
MXC_CCM_CDCDR_SPDIF1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDCDR_SPDIF1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CDHIPR_AHB_PODF_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_AHB_PODF_BUSY	/;"	d
MXC_CCM_CDHIPR_ARM_PODF_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_ARM_PODF_BUSY	/;"	d
MXC_CCM_CDHIPR_AXI_PODF_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_AXI_PODF_BUSY	/;"	d
MXC_CCM_CDHIPR_MMDC_CH0_PODF_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_MMDC_CH0_PODF_BUSY	/;"	d
MXC_CCM_CDHIPR_MMDC_CH1_PODF_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_MMDC_CH1_PODF_BUSY	/;"	d
MXC_CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY	/;"	d
MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY	/;"	d
MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE	/;"	d
MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE	/;"	d
MXC_CCM_CGPR_FAST_PLL_EN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CGPR_FAST_PLL_EN	/;"	d
MXC_CCM_CGPR_MMDC_EXT_CLK_DIS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CGPR_MMDC_EXT_CLK_DIS	/;"	d
MXC_CCM_CGPR_PMIC_DELAY_SCALER	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CGPR_PMIC_DELAY_SCALER	/;"	d
MXC_CCM_CGR0_ASRC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ASRC_MASK	/;"	d
MXC_CCM_CGR0_ASRC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ASRC_OFFSET	/;"	d
MXC_CCM_CGR0_ATA_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ATA_MASK	/;"	d
MXC_CCM_CGR0_ATA_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ATA_OFFSET	/;"	d
MXC_CCM_CGR0_CAN1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CAN1_MASK	/;"	d
MXC_CCM_CGR0_CAN1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CAN1_OFFSET	/;"	d
MXC_CCM_CGR0_CAN2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CAN2_MASK	/;"	d
MXC_CCM_CGR0_CAN2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CAN2_OFFSET	/;"	d
MXC_CCM_CGR0_CSPI1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CSPI1_MASK	/;"	d
MXC_CCM_CGR0_CSPI1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CSPI1_OFFSET	/;"	d
MXC_CCM_CGR0_CSPI2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CSPI2_MASK	/;"	d
MXC_CCM_CGR0_CSPI2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_CSPI2_OFFSET	/;"	d
MXC_CCM_CGR0_ECT_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ECT_MASK	/;"	d
MXC_CCM_CGR0_ECT_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ECT_OFFSET	/;"	d
MXC_CCM_CGR0_EDIO_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EDIO_MASK	/;"	d
MXC_CCM_CGR0_EDIO_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EDIO_OFFSET	/;"	d
MXC_CCM_CGR0_EMI_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EMI_MASK	/;"	d
MXC_CCM_CGR0_EMI_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EMI_OFFSET	/;"	d
MXC_CCM_CGR0_EPIT1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EPIT1_MASK	/;"	d
MXC_CCM_CGR0_EPIT1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EPIT1_OFFSET	/;"	d
MXC_CCM_CGR0_EPIT2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EPIT2_MASK	/;"	d
MXC_CCM_CGR0_EPIT2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_EPIT2_OFFSET	/;"	d
MXC_CCM_CGR0_ESAI_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESAI_MASK	/;"	d
MXC_CCM_CGR0_ESAI_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESAI_OFFSET	/;"	d
MXC_CCM_CGR0_ESDHC1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESDHC1_MASK	/;"	d
MXC_CCM_CGR0_ESDHC1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESDHC1_OFFSET	/;"	d
MXC_CCM_CGR0_ESDHC2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESDHC2_MASK	/;"	d
MXC_CCM_CGR0_ESDHC2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESDHC2_OFFSET	/;"	d
MXC_CCM_CGR0_ESDHC3_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESDHC3_MASK	/;"	d
MXC_CCM_CGR0_ESDHC3_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR0_ESDHC3_OFFSET	/;"	d
MXC_CCM_CGR1_FEC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_FEC_MASK	/;"	d
MXC_CCM_CGR1_FEC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_FEC_OFFSET	/;"	d
MXC_CCM_CGR1_GPIO1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPIO1_MASK	/;"	d
MXC_CCM_CGR1_GPIO1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPIO1_OFFSET	/;"	d
MXC_CCM_CGR1_GPIO2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPIO2_MASK	/;"	d
MXC_CCM_CGR1_GPIO2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPIO2_OFFSET	/;"	d
MXC_CCM_CGR1_GPIO3_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPIO3_MASK	/;"	d
MXC_CCM_CGR1_GPIO3_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPIO3_OFFSET	/;"	d
MXC_CCM_CGR1_GPT_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPT_MASK	/;"	d
MXC_CCM_CGR1_GPT_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_GPT_OFFSET	/;"	d
MXC_CCM_CGR1_I2C1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_I2C1_MASK	/;"	d
MXC_CCM_CGR1_I2C1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_I2C1_OFFSET	/;"	d
MXC_CCM_CGR1_I2C2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_I2C2_MASK	/;"	d
MXC_CCM_CGR1_I2C2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_I2C2_OFFSET	/;"	d
MXC_CCM_CGR1_I2C3_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_I2C3_MASK	/;"	d
MXC_CCM_CGR1_I2C3_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_I2C3_OFFSET	/;"	d
MXC_CCM_CGR1_IOMUXC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_IOMUXC_MASK	/;"	d
MXC_CCM_CGR1_IOMUXC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_IOMUXC_OFFSET	/;"	d
MXC_CCM_CGR1_IPU_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_IPU_MASK	/;"	d
MXC_CCM_CGR1_IPU_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_IPU_OFFSET	/;"	d
MXC_CCM_CGR1_KPP_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_KPP_MASK	/;"	d
MXC_CCM_CGR1_KPP_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_KPP_OFFSET	/;"	d
MXC_CCM_CGR1_MLB_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_MLB_MASK	/;"	d
MXC_CCM_CGR1_MLB_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_MLB_OFFSET	/;"	d
MXC_CCM_CGR1_MSHC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_MSHC_MASK	/;"	d
MXC_CCM_CGR1_MSHC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_MSHC_OFFSET	/;"	d
MXC_CCM_CGR1_OWIRE_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_OWIRE_MASK	/;"	d
MXC_CCM_CGR1_OWIRE_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_OWIRE_OFFSET	/;"	d
MXC_CCM_CGR1_PWM_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_PWM_MASK	/;"	d
MXC_CCM_CGR1_PWM_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_PWM_OFFSET	/;"	d
MXC_CCM_CGR1_RNGC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_RNGC_MASK	/;"	d
MXC_CCM_CGR1_RNGC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR1_RNGC_OFFSET	/;"	d
MXC_CCM_CGR2_AUDMUX_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_AUDMUX_MASK	/;"	d
MXC_CCM_CGR2_AUDMUX_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_AUDMUX_OFFSET	/;"	d
MXC_CCM_CGR2_MAX_ENABLE	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_MAX_ENABLE	/;"	d
MXC_CCM_CGR2_MAX_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_MAX_MASK	/;"	d
MXC_CCM_CGR2_MAX_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_MAX_OFFSET	/;"	d
MXC_CCM_CGR2_RTC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_RTC_MASK	/;"	d
MXC_CCM_CGR2_RTC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_RTC_OFFSET	/;"	d
MXC_CCM_CGR2_RTIC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_RTIC_MASK	/;"	d
MXC_CCM_CGR2_RTIC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_RTIC_OFFSET	/;"	d
MXC_CCM_CGR2_SCC_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SCC_MASK	/;"	d
MXC_CCM_CGR2_SCC_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SCC_OFFSET	/;"	d
MXC_CCM_CGR2_SDMA_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SDMA_MASK	/;"	d
MXC_CCM_CGR2_SDMA_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SDMA_OFFSET	/;"	d
MXC_CCM_CGR2_SPBA_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SPBA_MASK	/;"	d
MXC_CCM_CGR2_SPBA_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SPBA_OFFSET	/;"	d
MXC_CCM_CGR2_SPDIF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SPDIF_MASK	/;"	d
MXC_CCM_CGR2_SPDIF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SPDIF_OFFSET	/;"	d
MXC_CCM_CGR2_SSI1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SSI1_MASK	/;"	d
MXC_CCM_CGR2_SSI1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SSI1_OFFSET	/;"	d
MXC_CCM_CGR2_SSI2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SSI2_MASK	/;"	d
MXC_CCM_CGR2_SSI2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_SSI2_OFFSET	/;"	d
MXC_CCM_CGR2_UART1_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_UART1_MASK	/;"	d
MXC_CCM_CGR2_UART1_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_UART1_OFFSET	/;"	d
MXC_CCM_CGR2_UART2_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_UART2_MASK	/;"	d
MXC_CCM_CGR2_UART2_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_UART2_OFFSET	/;"	d
MXC_CCM_CGR2_UART3_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_UART3_MASK	/;"	d
MXC_CCM_CGR2_UART3_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_UART3_OFFSET	/;"	d
MXC_CCM_CGR2_USBOTG_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_USBOTG_MASK	/;"	d
MXC_CCM_CGR2_USBOTG_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_USBOTG_OFFSET	/;"	d
MXC_CCM_CGR2_WDOG_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_WDOG_MASK	/;"	d
MXC_CCM_CGR2_WDOG_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR2_WDOG_OFFSET	/;"	d
MXC_CCM_CGR3_CSI_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR3_CSI_MASK	/;"	d
MXC_CCM_CGR3_CSI_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR3_CSI_OFFSET	/;"	d
MXC_CCM_CGR3_GPU2D_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR3_GPU2D_MASK	/;"	d
MXC_CCM_CGR3_GPU2D_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR3_GPU2D_OFFSET	/;"	d
MXC_CCM_CGR3_IIM_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR3_IIM_MASK	/;"	d
MXC_CCM_CGR3_IIM_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR3_IIM_OFFSET	/;"	d
MXC_CCM_CGR_CG_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR_CG_MASK	/;"	d
MXC_CCM_CGR_CG_OFF	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR_CG_OFF	/;"	d
MXC_CCM_CGR_CG_ON	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR_CG_ON	/;"	d
MXC_CCM_CGR_CG_RUN_ON	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR_CG_RUN_ON	/;"	d
MXC_CCM_CGR_CG_RUN_WAIT_ON	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_CGR_CG_RUN_WAIT_ON	/;"	d
MXC_CCM_CHSCCDR_ENET_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_ENET_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_ENET_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_ENET_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_ENET_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_ENET_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_ENET_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_ENET_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_ENET_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_ENET_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_ENET_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_ENET_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_EPDC_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_EPDC_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_EPDC_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_EPDC_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_EPDC_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_EPDC_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_EPDC_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_EPDC_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_EPDC_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_EPDC_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_EPDC_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_EPDC_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI1_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI1_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI1_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI1_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI1_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI1_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU1_DI1_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU1_DI1_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI0_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI0_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI0_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI0_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI0_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI0_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI0_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI0_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI0_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI0_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI0_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI0_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI1_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI1_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI1_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI1_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI1_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI1_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI1_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_IPU2_DI1_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_IPU2_DI1_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_M4_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_M4_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_M4_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_M4_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CHSCCDR_M4_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_M4_PODF_MASK	/;"	d
MXC_CCM_CHSCCDR_M4_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_M4_PODF_OFFSET	/;"	d
MXC_CCM_CHSCCDR_M4_PRE_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_M4_PRE_CLK_SEL_MASK	/;"	d
MXC_CCM_CHSCCDR_M4_PRE_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CHSCCDR_M4_PRE_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CIMR_MASK_AHB_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_AHB_PODF_LOADED	/;"	d
MXC_CCM_CIMR_MASK_ARM_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_ARM_PODF_LOADED	/;"	d
MXC_CCM_CIMR_MASK_AXI_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_AXI_PODF_LOADED	/;"	d
MXC_CCM_CIMR_MASK_COSC_READY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_COSC_READY	/;"	d
MXC_CCM_CIMR_MASK_LRF_PLL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_LRF_PLL	/;"	d
MXC_CCM_CIMR_MASK_MMDC_CH0_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_MMDC_CH0_PODF_LOADED	/;"	d
MXC_CCM_CIMR_MASK_MMDC_CH1_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_MMDC_CH1_PODF_LOADED	/;"	d
MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED	/;"	d
MXC_CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED	/;"	d
MXC_CCM_CISR_AHB_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_AHB_PODF_LOADED	/;"	d
MXC_CCM_CISR_ARM_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_ARM_PODF_LOADED	/;"	d
MXC_CCM_CISR_AXI_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_AXI_PODF_LOADED	/;"	d
MXC_CCM_CISR_COSC_READY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_COSC_READY	/;"	d
MXC_CCM_CISR_LRF_PLL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_LRF_PLL	/;"	d
MXC_CCM_CISR_MMDC_CH0_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_MMDC_CH0_PODF_LOADED	/;"	d
MXC_CCM_CISR_MMDC_CH1_PODF_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_MMDC_CH1_PODF_LOADED	/;"	d
MXC_CCM_CISR_PERIPH2_CLK_SEL_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_PERIPH2_CLK_SEL_LOADED	/;"	d
MXC_CCM_CISR_PERIPH_CLK_SEL_LOADED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CISR_PERIPH_CLK_SEL_LOADED	/;"	d
MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM	/;"	d
MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS /;"	d
MXC_CCM_CLPCR_BYPASS_PMIC_VFUNC_READY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_BYPASS_PMIC_VFUNC_READY	/;"	d
MXC_CCM_CLPCR_BYP_MMDC_CH0_LPM_HS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_BYP_MMDC_CH0_LPM_HS	/;"	d
MXC_CCM_CLPCR_BYP_MMDC_CH1_LPM_HS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_BYP_MMDC_CH1_LPM_HS	/;"	d
MXC_CCM_CLPCR_COSC_PWRDOWN	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_COSC_PWRDOWN	/;"	d
MXC_CCM_CLPCR_DIS_REF_OSC	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_DIS_REF_OSC	/;"	d
MXC_CCM_CLPCR_LPM_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_LPM_MASK	/;"	d
MXC_CCM_CLPCR_LPM_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_LPM_OFFSET	/;"	d
MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK	/;"	d
MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CLPCR_MASK_CORE0_WFI	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_MASK_CORE0_WFI	/;"	d
MXC_CCM_CLPCR_MASK_CORE1_WFI	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_MASK_CORE1_WFI	/;"	d
MXC_CCM_CLPCR_MASK_CORE2_WFI	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_MASK_CORE2_WFI	/;"	d
MXC_CCM_CLPCR_MASK_CORE3_WFI	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_MASK_CORE3_WFI	/;"	d
MXC_CCM_CLPCR_MASK_L2CC_IDLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_MASK_L2CC_IDLE	/;"	d
MXC_CCM_CLPCR_MASK_SCU_IDLE	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_MASK_SCU_IDLE	/;"	d
MXC_CCM_CLPCR_SBYOS	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_SBYOS	/;"	d
MXC_CCM_CLPCR_STBY_COUNT_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_STBY_COUNT_MASK	/;"	d
MXC_CCM_CLPCR_STBY_COUNT_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_STBY_COUNT_OFFSET	/;"	d
MXC_CCM_CLPCR_VSTBY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_VSTBY	/;"	d
MXC_CCM_CLPCR_WB_CORE_AT_LPM	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_WB_CORE_AT_LPM	/;"	d
MXC_CCM_CLPCR_WB_PER_AT_LPM	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CLPCR_WB_PER_AT_LPM	/;"	d
MXC_CCM_COSR_ASRC_AUDIO_EN	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_ASRC_AUDIO_EN	/;"	d
MXC_CCM_COSR_ASRC_AUDIO_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_ASRC_AUDIO_PODF_MASK	/;"	d
MXC_CCM_COSR_ASRC_AUDIO_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_ASRC_AUDIO_PODF_OFFSET	/;"	d
MXC_CCM_COSR_CLKOEN	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_CLKOEN	/;"	d
MXC_CCM_COSR_CLKOSEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_CLKOSEL_MASK	/;"	d
MXC_CCM_COSR_CLKOSEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_CLKOSEL_OFFSET	/;"	d
MXC_CCM_COSR_CLKOUTDIV_1	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_CLKOUTDIV_1	/;"	d
MXC_CCM_COSR_CLKOUT_DIV_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_CLKOUT_DIV_MASK	/;"	d
MXC_CCM_COSR_CLKOUT_DIV_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_CLKOUT_DIV_OFFSET	/;"	d
MXC_CCM_COSR_SSI1_RX_SRC_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI1_RX_SRC_SEL_MASK	/;"	d
MXC_CCM_COSR_SSI1_RX_SRC_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI1_RX_SRC_SEL_OFFSET	/;"	d
MXC_CCM_COSR_SSI1_TX_SRC_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI1_TX_SRC_SEL_MASK	/;"	d
MXC_CCM_COSR_SSI1_TX_SRC_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI1_TX_SRC_SEL_OFFSET	/;"	d
MXC_CCM_COSR_SSI2_RX_SRC_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI2_RX_SRC_SEL_MASK	/;"	d
MXC_CCM_COSR_SSI2_RX_SRC_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI2_RX_SRC_SEL_OFFSET	/;"	d
MXC_CCM_COSR_SSI2_TX_SRC_SEL_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI2_TX_SRC_SEL_MASK	/;"	d
MXC_CCM_COSR_SSI2_TX_SRC_SEL_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_COSR_SSI2_TX_SRC_SEL_OFFSET	/;"	d
MXC_CCM_CS1CDR_ESAI_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_ESAI_CLK_PODF_MASK	/;"	d
MXC_CCM_CS1CDR_ESAI_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_ESAI_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS1CDR_ESAI_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_ESAI_CLK_PRED_MASK	/;"	d
MXC_CCM_CS1CDR_ESAI_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_ESAI_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CS1CDR_SAI1_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI1_CLK_PODF_MASK	/;"	d
MXC_CCM_CS1CDR_SAI1_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI1_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS1CDR_SAI1_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI1_CLK_PRED_MASK	/;"	d
MXC_CCM_CS1CDR_SAI1_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI1_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CS1CDR_SAI3_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI3_CLK_PODF_MASK	/;"	d
MXC_CCM_CS1CDR_SAI3_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI3_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS1CDR_SAI3_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI3_CLK_PRED_MASK	/;"	d
MXC_CCM_CS1CDR_SAI3_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SAI3_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK	/;"	d
MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK	/;"	d
MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CS1CDR_SSI3_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI3_CLK_PODF_MASK	/;"	d
MXC_CCM_CS1CDR_SSI3_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI3_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS1CDR_SSI3_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI3_CLK_PRED_MASK	/;"	d
MXC_CCM_CS1CDR_SSI3_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS1CDR_SSI3_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_PODF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_PODF(/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_PRED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_PRED(/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL(/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQ	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQ(/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQP(/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK_DQ	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK_DQ	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK_DQP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK_DQP	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET_DQ	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET_DQ	/;"	d
MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET_DQP	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET_DQP	/;"	d
MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK	/;"	d
MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK	/;"	d
MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_PODF	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_PODF(/;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_PODF_MASK /;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_PODF_OFFSET /;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_PRED	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_PRED(/;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_PRED_MASK /;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_PRED_OFFSET /;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_SEL(/;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_SEL_MASK /;"	d
MXC_CCM_CS2CDR_QSPI2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_QSPI2_CLK_SEL_OFFSET /;"	d
MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK	/;"	d
MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK	/;"	d
MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR1_BCH_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_BCH_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_BCH_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_BCH_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF(/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED(/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF(/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED(/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR1_GPMI_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_GPMI_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_GPMI_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_GPMI_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_PGC_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_PGC_CLK_PODF(/;"	d
MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_PGC_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_PGC_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR1_UART_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PODF(/;"	d
MXC_CCM_CSCDR1_UART_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_UART_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_UART_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR1_UART_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PRED(/;"	d
MXC_CCM_CSCDR1_UART_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR1_UART_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR1_UART_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_UART_CLK_SEL	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF(/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED(/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR1_USBOH3_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR1_USDHC1_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC1_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_USDHC1_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC1_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_USDHC2_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC2_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_USDHC2_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC2_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_USDHC3_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC3_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_USDHC3_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC3_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_USDHC4_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC4_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_USDHC4_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_USDHC4_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR1_VPU_AXI_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_VPU_AXI_PODF_MASK	/;"	d
MXC_CCM_CSCDR1_VPU_AXI_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR1_VPU_AXI_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PODF(/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PRED(/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR2_CSPI_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR2_ECSPI_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_ECSPI_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_MASK /;"	d
MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_OFFSET /;"	d
MXC_CCM_CSCDR2_LCDIF1_PRED_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF1_PRED_SEL_MASK /;"	d
MXC_CCM_CSCDR2_LCDIF1_PRED_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF1_PRED_SEL_OFFSET /;"	d
MXC_CCM_CSCDR2_LCDIF1_PRE_DIV_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF1_PRE_DIV_MASK /;"	d
MXC_CCM_CSCDR2_LCDIF1_PRE_DIV_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF1_PRE_DIV_OFFSET /;"	d
MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_MASK /;"	d
MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_OFFSET /;"	d
MXC_CCM_CSCDR2_LCDIF2_PRED_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF2_PRED_SEL_MASK /;"	d
MXC_CCM_CSCDR2_LCDIF2_PRED_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF2_PRED_SEL_OFFSET /;"	d
MXC_CCM_CSCDR2_LCDIF2_PRE_DIV_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF2_PRE_DIV_MASK /;"	d
MXC_CCM_CSCDR2_LCDIF2_PRE_DIV_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR2_LCDIF2_PRE_DIV_OFFSET /;"	d
MXC_CCM_CSCDR2_SIM_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PODF(/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PRED(/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR2_SIM_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SIM_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF(/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PODF_RD(/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED(/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_MASK	/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET	/;"	d
MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_RD(/;"	d
MXC_CCM_CSCDR3_IPU1_HSP_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU1_HSP_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCDR3_IPU1_HSP_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU1_HSP_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCDR3_IPU1_HSP_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU1_HSP_PODF_MASK	/;"	d
MXC_CCM_CSCDR3_IPU1_HSP_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU1_HSP_PODF_OFFSET	/;"	d
MXC_CCM_CSCDR3_IPU2_HSP_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU2_HSP_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCDR3_IPU2_HSP_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU2_HSP_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCDR3_IPU2_HSP_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU2_HSP_PODF_MASK	/;"	d
MXC_CCM_CSCDR3_IPU2_HSP_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCDR3_IPU2_HSP_PODF_OFFSET	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_MASK	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_OFFSET	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_PODF_MASK	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK	/;"	d
MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET	/;"	d
MXC_CCM_CSCMR1_BCH_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_BCH_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_CSPI_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_CSPI_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_CSPI_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_ESDHC3_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_ESDHC4_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_ESDHC4_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_GPMI_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_GPMI_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_LCDIF2_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_LCDIF2_PODF_MASK	/;"	d
MXC_CCM_CSCMR1_LCDIF2_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_LCDIF2_PODF_OFFSET /;"	d
MXC_CCM_CSCMR1_PERCLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_PERCLK_PODF_MASK	/;"	d
MXC_CCM_CSCMR1_PER_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_PER_CLK_SEL_MASK /;"	d
MXC_CCM_CSCMR1_PER_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_PER_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_QSPI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_QSPI1_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_QSPI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_QSPI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_QSPI1_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_QSPI1_PODF_MASK	/;"	d
MXC_CCM_CSCMR1_QSPI1_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_QSPI1_PODF_OFFSET	/;"	d
MXC_CCM_CSCMR1_SPDIF_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SPDIF_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_SSI1_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI1_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI1_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_SSI2_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI2_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI2_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_SSI3_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI3_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_SSI3_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI3_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI3_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI3_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI_APM_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_TVE_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_TVE_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_UART_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_UART_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_UART_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_UART_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_UART_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_USBOH3_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL(/;"	d
MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR1_USBOH3_CLK_SEL_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_RD(/;"	d
MXC_CCM_CSCMR1_USB_PHY_CLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_USDHC1_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_USDHC1_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_USDHC2_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_USDHC2_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_USDHC3_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_USDHC3_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_USDHC4_CLK_SEL	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR1_USDHC4_CLK_SEL	/;"	d
MXC_CCM_CSCMR1_VPU_RCLK_SEL	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define MXC_CCM_CSCMR1_VPU_RCLK_SEL	/;"	d
MXC_CCM_CSCMR2_CAN_CLK_PODF_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_CAN_CLK_PODF_MASK	/;"	d
MXC_CCM_CSCMR2_CAN_CLK_PODF_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_CAN_CLK_PODF_OFFSET	/;"	d
MXC_CCM_CSCMR2_CAN_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_CAN_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR2_CAN_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_CAN_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR2_ESAI_PRE_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_ESAI_PRE_SEL_MASK	/;"	d
MXC_CCM_CSCMR2_ESAI_PRE_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_ESAI_PRE_SEL_OFFSET	/;"	d
MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV	/;"	d
MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV	/;"	d
MXC_CCM_CSCMR2_VID_CLK_SEL_MASK	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_VID_CLK_SEL_MASK	/;"	d
MXC_CCM_CSCMR2_VID_CLK_SEL_OFFSET	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSCMR2_VID_CLK_SEL_OFFSET	/;"	d
MXC_CCM_CSR_COSC_READY	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSR_COSC_READY	/;"	d
MXC_CCM_CSR_REF_EN_B	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define MXC_CCM_CSR_REF_EN_B	/;"	d
MXC_CCM_PCTL_BRM	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_BRM /;"	d
MXC_CCM_PCTL_MFD_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_MFD_MASK /;"	d
MXC_CCM_PCTL_MFD_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_MFD_OFFSET /;"	d
MXC_CCM_PCTL_MFI_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_MFI_MASK /;"	d
MXC_CCM_PCTL_MFI_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_MFI_OFFSET /;"	d
MXC_CCM_PCTL_MFN_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_MFN_MASK /;"	d
MXC_CCM_PCTL_MFN_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_MFN_OFFSET /;"	d
MXC_CCM_PCTL_PD_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_PD_MASK /;"	d
MXC_CCM_PCTL_PD_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PCTL_PD_OFFSET /;"	d
MXC_CCM_PDR0_AUTO_CON	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_AUTO_CON	/;"	d
MXC_CCM_PDR0_AUTO_MUX_DIV_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_AUTO_MUX_DIV_MASK /;"	d
MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET /;"	d
MXC_CCM_PDR0_CKIL_SEL	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_CKIL_SEL	/;"	d
MXC_CCM_PDR0_CON_MUX_DIV_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_CON_MUX_DIV_MASK /;"	d
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_CON_MUX_DIV_OFFSET	/;"	d
MXC_CCM_PDR0_HSP_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_HSP_PODF_MASK /;"	d
MXC_CCM_PDR0_HSP_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_HSP_PODF_OFFSET /;"	d
MXC_CCM_PDR0_IPU_HND_BYP	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_IPU_HND_BYP /;"	d
MXC_CCM_PDR0_PER_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_PER_PODF_MASK /;"	d
MXC_CCM_PDR0_PER_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_PER_PODF_OFFSET /;"	d
MXC_CCM_PDR0_PER_SEL	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR0_PER_SEL	/;"	d
MXC_CCM_PDR1_MSHC_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR1_MSHC_M_U	/;"	d
MXC_CCM_PDR1_MSHC_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR1_MSHC_PODF_MASK /;"	d
MXC_CCM_PDR1_MSHC_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR1_MSHC_PODF_OFFSET /;"	d
MXC_CCM_PDR1_MSHC_PRDF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR1_MSHC_PRDF_MASK /;"	d
MXC_CCM_PDR1_MSHC_PRDF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR1_MSHC_PRDF_OFFSET /;"	d
MXC_CCM_PDR2_CSI_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_CSI_M_U	/;"	d
MXC_CCM_PDR2_CSI_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_CSI_PODF_MASK /;"	d
MXC_CCM_PDR2_CSI_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_CSI_PODF_OFFSET /;"	d
MXC_CCM_PDR2_SSI1_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI1_PODF_MASK /;"	d
MXC_CCM_PDR2_SSI1_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI1_PODF_OFFSET /;"	d
MXC_CCM_PDR2_SSI1_PRDF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI1_PRDF_MASK /;"	d
MXC_CCM_PDR2_SSI1_PRDF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI1_PRDF_OFFSET /;"	d
MXC_CCM_PDR2_SSI2_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI2_PODF_MASK /;"	d
MXC_CCM_PDR2_SSI2_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI2_PODF_OFFSET /;"	d
MXC_CCM_PDR2_SSI2_PRDF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI2_PRDF_MASK /;"	d
MXC_CCM_PDR2_SSI2_PRDF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI2_PRDF_OFFSET /;"	d
MXC_CCM_PDR2_SSI_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR2_SSI_M_U	/;"	d
MXC_CCM_PDR3_ESDHC1_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC1_PODF_MASK /;"	d
MXC_CCM_PDR3_ESDHC1_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC1_PODF_OFFSET /;"	d
MXC_CCM_PDR3_ESDHC2_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC2_PODF_MASK /;"	d
MXC_CCM_PDR3_ESDHC2_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC2_PODF_OFFSET /;"	d
MXC_CCM_PDR3_ESDHC3_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC3_PODF_MASK /;"	d
MXC_CCM_PDR3_ESDHC3_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC3_PODF_OFFSET /;"	d
MXC_CCM_PDR3_ESDHC_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_ESDHC_M_U	/;"	d
MXC_CCM_PDR3_SPDIF_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_SPDIF_M_U	/;"	d
MXC_CCM_PDR3_SPDIF_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_SPDIF_PODF_MASK /;"	d
MXC_CCM_PDR3_SPDIF_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_SPDIF_PODF_OFFSET /;"	d
MXC_CCM_PDR3_SPDIF_PRDF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_SPDIF_PRDF_MASK /;"	d
MXC_CCM_PDR3_SPDIF_PRDF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_SPDIF_PRDF_OFFSET /;"	d
MXC_CCM_PDR3_UART_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR3_UART_M_U	/;"	d
MXC_CCM_PDR4_NFC_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_NFC_PODF_MASK	/;"	d
MXC_CCM_PDR4_NFC_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_NFC_PODF_OFFSET	/;"	d
MXC_CCM_PDR4_PER0_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_PER0_PODF_MASK	/;"	d
MXC_CCM_PDR4_PER0_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_PER0_PODF_OFFSET	/;"	d
MXC_CCM_PDR4_UART_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_UART_PODF_MASK	/;"	d
MXC_CCM_PDR4_UART_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_UART_PODF_OFFSET	/;"	d
MXC_CCM_PDR4_USB_M_U	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_USB_M_U	/;"	d
MXC_CCM_PDR4_USB_PODF_MASK	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_USB_PODF_MASK	/;"	d
MXC_CCM_PDR4_USB_PODF_OFFSET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_PDR4_USB_PODF_OFFSET	/;"	d
MXC_CCM_RCSR_BUS_16BIT	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_BUS_16BIT	/;"	d
MXC_CCM_RCSR_BUS_WIDTH	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_BUS_WIDTH	/;"	d
MXC_CCM_RCSR_NF16B	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_NF16B	/;"	d
MXC_CCM_RCSR_NFC_4K	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_NFC_4K	/;"	d
MXC_CCM_RCSR_NFC_FMS	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_NFC_FMS	/;"	d
MXC_CCM_RCSR_PAGE_2K	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_PAGE_2K	/;"	d
MXC_CCM_RCSR_PAGE_4K1	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_PAGE_4K1	/;"	d
MXC_CCM_RCSR_PAGE_4K2	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_PAGE_4K2	/;"	d
MXC_CCM_RCSR_PAGE_512	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_PAGE_512	/;"	d
MXC_CCM_RCSR_PAGE_SIZE	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_PAGE_SIZE	/;"	d
MXC_CCM_RCSR_SOFT_RESET	arch/arm/include/asm/arch-mx35/crm_regs.h	/^#define MXC_CCM_RCSR_SOFT_RESET	/;"	d
MXC_CLK32	arch/arm/include/asm/arch-mx25/clock.h	/^#define MXC_CLK32	/;"	d
MXC_CLK32	arch/arm/include/asm/arch-mx31/clock.h	/^#define MXC_CLK32	/;"	d
MXC_CLK32	arch/arm/include/asm/arch-mx35/clock.h	/^#define MXC_CLK32	/;"	d
MXC_CLK32	arch/arm/include/asm/arch-mx5/clock.h	/^#define MXC_CLK32	/;"	d
MXC_CLK32	arch/arm/include/asm/arch-mx6/clock.h	/^#define MXC_CLK32	/;"	d
MXC_CLK32	arch/arm/include/asm/arch-mx7/clock.h	/^#define MXC_CLK32	/;"	d
MXC_CLK_NUM	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_CLK_NUM$/;"	e	enum:mxc_clock
MXC_CPU_MX23	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX23	/;"	d
MXC_CPU_MX25	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX25	/;"	d
MXC_CPU_MX27	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX27	/;"	d
MXC_CPU_MX28	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX28	/;"	d
MXC_CPU_MX31	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX31	/;"	d
MXC_CPU_MX35	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX35	/;"	d
MXC_CPU_MX51	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX51	/;"	d
MXC_CPU_MX53	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX53	/;"	d
MXC_CPU_MX6D	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6D	/;"	d
MXC_CPU_MX6DL	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6DL	/;"	d
MXC_CPU_MX6DP	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6DP	/;"	d
MXC_CPU_MX6Q	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6Q	/;"	d
MXC_CPU_MX6QP	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6QP	/;"	d
MXC_CPU_MX6SL	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6SL	/;"	d
MXC_CPU_MX6SOLO	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6SOLO	/;"	d
MXC_CPU_MX6SX	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6SX	/;"	d
MXC_CPU_MX6UL	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6UL	/;"	d
MXC_CPU_MX6ULL	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX6ULL	/;"	d
MXC_CPU_MX7D	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX7D	/;"	d
MXC_CPU_MX7S	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_MX7S	/;"	d
MXC_CPU_VF610	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_CPU_VF610	/;"	d
MXC_CSI_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_CSI_CLK,$/;"	e	enum:mxc_clock
MXC_CSPI	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPI$/;"	d
MXC_CSPI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPI$/;"	d
MXC_CSPI	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPI$/;"	d
MXC_CSPICON_CTL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICON_CTL	/;"	d
MXC_CSPICON_CTL	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICON_CTL	/;"	d
MXC_CSPICON_CTL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICON_CTL	/;"	d
MXC_CSPICON_PHA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICON_PHA	/;"	d
MXC_CSPICON_PHA	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICON_PHA	/;"	d
MXC_CSPICON_PHA	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICON_PHA	/;"	d
MXC_CSPICON_POL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICON_POL	/;"	d
MXC_CSPICON_POL	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICON_POL	/;"	d
MXC_CSPICON_POL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICON_POL	/;"	d
MXC_CSPICON_SSPOL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICON_SSPOL	/;"	d
MXC_CSPICON_SSPOL	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICON_SSPOL	/;"	d
MXC_CSPICON_SSPOL	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICON_SSPOL	/;"	d
MXC_CSPICTRL_BITCOUNT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_BITCOUNT(/;"	d
MXC_CSPICTRL_BITCOUNT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_BITCOUNT(/;"	d
MXC_CSPICTRL_BITCOUNT	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_BITCOUNT(/;"	d
MXC_CSPICTRL_BITCOUNT	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_BITCOUNT(/;"	d
MXC_CSPICTRL_BITCOUNT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_BITCOUNT(/;"	d
MXC_CSPICTRL_BITCOUNT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_BITCOUNT(/;"	d
MXC_CSPICTRL_CHAN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_CHAN	/;"	d
MXC_CSPICTRL_CHAN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_CHAN	/;"	d
MXC_CSPICTRL_CHAN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_CHAN	/;"	d
MXC_CSPICTRL_CHIPSELECT	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_CHIPSELECT(/;"	d
MXC_CSPICTRL_CHIPSELECT	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_CHIPSELECT(/;"	d
MXC_CSPICTRL_CHIPSELECT	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_CHIPSELECT(/;"	d
MXC_CSPICTRL_CHIPSELECT	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_CHIPSELECT(/;"	d
MXC_CSPICTRL_CHIPSELECT	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_CHIPSELECT(/;"	d
MXC_CSPICTRL_CHIPSELECT	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_CHIPSELECT(/;"	d
MXC_CSPICTRL_DATARATE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_DATARATE(/;"	d
MXC_CSPICTRL_DATARATE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_DATARATE(/;"	d
MXC_CSPICTRL_DATARATE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_DATARATE(/;"	d
MXC_CSPICTRL_EN	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_EN	/;"	d
MXC_CSPICTRL_EN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_EN	/;"	d
MXC_CSPICTRL_EN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_EN	/;"	d
MXC_CSPICTRL_EN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_EN	/;"	d
MXC_CSPICTRL_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_EN	/;"	d
MXC_CSPICTRL_EN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_EN	/;"	d
MXC_CSPICTRL_MAXBITS	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_MAXBITS	/;"	d
MXC_CSPICTRL_MAXBITS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_MAXBITS	/;"	d
MXC_CSPICTRL_MAXBITS	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_MAXBITS	/;"	d
MXC_CSPICTRL_MAXBITS	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_MAXBITS	/;"	d
MXC_CSPICTRL_MAXBITS	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_MAXBITS	/;"	d
MXC_CSPICTRL_MAXBITS	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_MAXBITS	/;"	d
MXC_CSPICTRL_MODE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_MODE	/;"	d
MXC_CSPICTRL_MODE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_MODE	/;"	d
MXC_CSPICTRL_MODE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_MODE	/;"	d
MXC_CSPICTRL_MODE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_MODE	/;"	d
MXC_CSPICTRL_MODE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_MODE	/;"	d
MXC_CSPICTRL_MODE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_MODE	/;"	d
MXC_CSPICTRL_MODE_MASK	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_MODE_MASK	/;"	d
MXC_CSPICTRL_MODE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_MODE_MASK /;"	d
MXC_CSPICTRL_MODE_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_MODE_MASK /;"	d
MXC_CSPICTRL_PHA	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_PHA	/;"	d
MXC_CSPICTRL_PHA	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_PHA	/;"	d
MXC_CSPICTRL_PHA	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_PHA	/;"	d
MXC_CSPICTRL_POL	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_POL	/;"	d
MXC_CSPICTRL_POL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_POL	/;"	d
MXC_CSPICTRL_POL	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_POL	/;"	d
MXC_CSPICTRL_POSTDIV	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_POSTDIV(/;"	d
MXC_CSPICTRL_POSTDIV	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_POSTDIV(/;"	d
MXC_CSPICTRL_POSTDIV	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_POSTDIV(/;"	d
MXC_CSPICTRL_PREDIV	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_PREDIV(/;"	d
MXC_CSPICTRL_PREDIV	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_PREDIV(/;"	d
MXC_CSPICTRL_PREDIV	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_PREDIV(/;"	d
MXC_CSPICTRL_RXOVF	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_RXOVF	/;"	d
MXC_CSPICTRL_RXOVF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_RXOVF	/;"	d
MXC_CSPICTRL_RXOVF	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_RXOVF	/;"	d
MXC_CSPICTRL_RXOVF	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_RXOVF	/;"	d
MXC_CSPICTRL_RXOVF	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_RXOVF	/;"	d
MXC_CSPICTRL_RXOVF	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_RXOVF	/;"	d
MXC_CSPICTRL_SELCHAN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_SELCHAN(/;"	d
MXC_CSPICTRL_SELCHAN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_SELCHAN(/;"	d
MXC_CSPICTRL_SELCHAN	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_SELCHAN(/;"	d
MXC_CSPICTRL_SMC	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_SMC	/;"	d
MXC_CSPICTRL_SMC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_SMC	/;"	d
MXC_CSPICTRL_SMC	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_SMC	/;"	d
MXC_CSPICTRL_SSCTL	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_SSCTL	/;"	d
MXC_CSPICTRL_SSCTL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_SSCTL	/;"	d
MXC_CSPICTRL_SSCTL	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_SSCTL	/;"	d
MXC_CSPICTRL_SSPOL	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_SSPOL	/;"	d
MXC_CSPICTRL_SSPOL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_SSPOL	/;"	d
MXC_CSPICTRL_SSPOL	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_SSPOL	/;"	d
MXC_CSPICTRL_TC	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_TC	/;"	d
MXC_CSPICTRL_TC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_TC	/;"	d
MXC_CSPICTRL_TC	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_TC	/;"	d
MXC_CSPICTRL_TC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_TC	/;"	d
MXC_CSPICTRL_TC	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_TC	/;"	d
MXC_CSPICTRL_TC	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_TC	/;"	d
MXC_CSPICTRL_XCH	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPICTRL_XCH	/;"	d
MXC_CSPICTRL_XCH	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPICTRL_XCH	/;"	d
MXC_CSPICTRL_XCH	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPICTRL_XCH	/;"	d
MXC_CSPICTRL_XCH	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPICTRL_XCH	/;"	d
MXC_CSPICTRL_XCH	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPICTRL_XCH	/;"	d
MXC_CSPICTRL_XCH	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPICTRL_XCH	/;"	d
MXC_CSPIPERIOD_32KHZ	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_CSPIPERIOD_32KHZ	/;"	d
MXC_CSPIPERIOD_32KHZ	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_CSPIPERIOD_32KHZ	/;"	d
MXC_CSPIPERIOD_32KHZ	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_CSPIPERIOD_32KHZ	/;"	d
MXC_CSPIPERIOD_32KHZ	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_CSPIPERIOD_32KHZ	/;"	d
MXC_CSPIPERIOD_32KHZ	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_CSPIPERIOD_32KHZ	/;"	d
MXC_CSPIPERIOD_32KHZ	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_CSPIPERIOD_32KHZ	/;"	d
MXC_CSPI_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_CSPI_CLK,$/;"	e	enum:mxc_clock
MXC_CSPI_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_CSPI_CLK,$/;"	e	enum:mxc_clock
MXC_CSPI_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_CSPI_CLK,$/;"	e	enum:mxc_clock
MXC_CSPI_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_CSPI_CLK,$/;"	e	enum:mxc_clock
MXC_CSPI_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_CSPI_CLK,$/;"	e	enum:mxc_clock
MXC_CSPI_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_CSPI_CLK,$/;"	e	enum:mxc_clock
MXC_DDR_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_DDR_CLK,$/;"	e	enum:mxc_clock
MXC_DDR_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_DDR_CLK,$/;"	e	enum:mxc_clock
MXC_DDR_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_DDR_CLK,$/;"	e	enum:mxc_clock
MXC_DPLLC_CTL_DPDCK0_2_EN	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_CTL_DPDCK0_2_EN	/;"	d
MXC_DPLLC_CTL_HFSM	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_CTL_HFSM	/;"	d
MXC_DPLLC_MFD_MFD_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_MFD_MFD_MASK	/;"	d
MXC_DPLLC_MFN_MFN_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_MFN_MFN_MASK	/;"	d
MXC_DPLLC_OP_MFI	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_OP_MFI(/;"	d
MXC_DPLLC_OP_MFI_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_OP_MFI_MASK	/;"	d
MXC_DPLLC_OP_MFI_OFFSET	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_OP_MFI_OFFSET	/;"	d
MXC_DPLLC_OP_MFI_RD	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_OP_MFI_RD(/;"	d
MXC_DPLLC_OP_PDF_MASK	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define	MXC_DPLLC_OP_PDF_MASK	/;"	d
MXC_DSPI_CLK	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^	MXC_DSPI_CLK,$/;"	e	enum:mxc_clock
MXC_DSPI_CLK	arch/arm/include/asm/arch-ls102xa/clock.h	/^	MXC_DSPI_CLK,$/;"	e	enum:mxc_clock
MXC_DSPI_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_DSPI_CLK,$/;"	e	enum:mxc_clock
MXC_ECSPI	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_ECSPI$/;"	d
MXC_ECSPI	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_ECSPI$/;"	d
MXC_ECSPI	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_ECSPI$/;"	d
MXC_EHCI_FORCE_FS	include/usb/ehci-ci.h	/^#define MXC_EHCI_FORCE_FS	/;"	d
MXC_EHCI_INTERFACE_DIFF_BI	include/usb/ehci-ci.h	/^#define MXC_EHCI_INTERFACE_DIFF_BI	/;"	d
MXC_EHCI_INTERFACE_DIFF_UNI	include/usb/ehci-ci.h	/^#define MXC_EHCI_INTERFACE_DIFF_UNI	/;"	d
MXC_EHCI_INTERFACE_MASK	include/usb/ehci-ci.h	/^#define MXC_EHCI_INTERFACE_MASK	/;"	d
MXC_EHCI_INTERFACE_SINGLE_BI	include/usb/ehci-ci.h	/^#define MXC_EHCI_INTERFACE_SINGLE_BI	/;"	d
MXC_EHCI_INTERFACE_SINGLE_UNI	include/usb/ehci-ci.h	/^#define MXC_EHCI_INTERFACE_SINGLE_UNI	/;"	d
MXC_EHCI_INTERNAL_PHY	include/usb/ehci-ci.h	/^#define MXC_EHCI_INTERNAL_PHY	/;"	d
MXC_EHCI_IPPUE_DOWN	include/usb/ehci-ci.h	/^#define MXC_EHCI_IPPUE_DOWN	/;"	d
MXC_EHCI_IPPUE_UP	include/usb/ehci-ci.h	/^#define MXC_EHCI_IPPUE_UP	/;"	d
MXC_EHCI_MODE_PHILIPS	include/usb/ehci-ci.h	/^#define MXC_EHCI_MODE_PHILIPS	/;"	d
MXC_EHCI_MODE_SERIAL	include/usb/ehci-ci.h	/^#define MXC_EHCI_MODE_SERIAL	/;"	d
MXC_EHCI_MODE_ULPI	include/usb/ehci-ci.h	/^#define MXC_EHCI_MODE_ULPI	/;"	d
MXC_EHCI_MODE_UTMI	include/usb/ehci-ci.h	/^#define MXC_EHCI_MODE_UTMI	/;"	d
MXC_EHCI_OC_PIN_ACTIVE_LOW	include/usb/ehci-ci.h	/^#define MXC_EHCI_OC_PIN_ACTIVE_LOW	/;"	d
MXC_EHCI_PHY_LOW_POWER_SUSPEND	include/usb/ehci-ci.h	/^#define MXC_EHCI_PHY_LOW_POWER_SUSPEND	/;"	d
MXC_EHCI_POWER_PINS_ENABLED	include/usb/ehci-ci.h	/^#define MXC_EHCI_POWER_PINS_ENABLED	/;"	d
MXC_EHCI_PWR_PIN_ACTIVE_HIGH	include/usb/ehci-ci.h	/^#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH	/;"	d
MXC_EHCI_SERIAL	include/usb/ehci-ci.h	/^#define MXC_EHCI_SERIAL	/;"	d
MXC_EHCI_TTL_ENABLED	include/usb/ehci-ci.h	/^#define MXC_EHCI_TTL_ENABLED	/;"	d
MXC_EHCI_UTMI_16BIT	include/usb/ehci-ci.h	/^#define MXC_EHCI_UTMI_16BIT	/;"	d
MXC_EHCI_UTMI_8BIT	include/usb/ehci-ci.h	/^#define MXC_EHCI_UTMI_8BIT	/;"	d
MXC_EMI_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_EMI_CLK,$/;"	e	enum:mxc_clock
MXC_EMI_SLOW_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_EMI_SLOW_CLK,$/;"	e	enum:mxc_clock
MXC_EPIT_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_EPIT_CLK,$/;"	e	enum:mxc_clock
MXC_ESAI_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_ESAI_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC1_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_ESDHC1_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC1_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_ESDHC1_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC2_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_ESDHC2_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC2_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_ESDHC2_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC2_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_ESDHC2_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC2_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_ESDHC2_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC2_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_ESDHC2_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC2_CLK	board/compulab/cm_fx6/cm_fx6.c	/^	MXC_ESDHC2_CLK,$/;"	e	enum:usdhc_clk	file:
MXC_ESDHC3_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_ESDHC3_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC3_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_ESDHC3_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC3_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_ESDHC3_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC3_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_ESDHC3_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC3_CLK	board/compulab/cm_fx6/cm_fx6.c	/^	MXC_ESDHC3_CLK,$/;"	e	enum:usdhc_clk	file:
MXC_ESDHC4_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_ESDHC4_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC4_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_ESDHC4_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-ls102xa/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-mx27/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_ESDHC_CLK,$/;"	e	enum:mxc_clock
MXC_ESDHC_CLK	board/compulab/cm_fx6/cm_fx6.c	/^	MXC_ESDHC_CLK,$/;"	e	enum:usdhc_clk	file:
MXC_FEC_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_FEC_CLK,$/;"	e	enum:mxc_clock
MXC_FEC_CLK	arch/arm/include/asm/arch-mx27/clock.h	/^	MXC_FEC_CLK,$/;"	e	enum:mxc_clock
MXC_FEC_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_FEC_CLK,$/;"	e	enum:mxc_clock
MXC_FEC_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_FEC_CLK,$/;"	e	enum:mxc_clock
MXC_FEC_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_FEC_CLK,$/;"	e	enum:mxc_clock
MXC_FEC_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_FEC_CLK,$/;"	e	enum:mxc_clock
MXC_GPIO_DIRECTION_IN	drivers/gpio/mxc_gpio.c	/^	MXC_GPIO_DIRECTION_IN,$/;"	e	enum:mxc_gpio_direction	file:
MXC_GPIO_DIRECTION_OUT	drivers/gpio/mxc_gpio.c	/^	MXC_GPIO_DIRECTION_OUT,$/;"	e	enum:mxc_gpio_direction	file:
MXC_GPMI_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_GPMI_CLK,$/;"	e	enum:mxc_clock
MXC_GPT_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_GPT_CLK,$/;"	e	enum:mxc_clock
MXC_H1_OC_DIS_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_OC_DIS_BIT	/;"	d	file:
MXC_H1_OC_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_OC_POL_BIT	/;"	d	file:
MXC_H1_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_OFFSET	/;"	d	file:
MXC_H1_UCTRL_H1PM_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_UCTRL_H1PM_BIT	/;"	d	file:
MXC_H1_UCTRL_H1UIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_UCTRL_H1UIE_BIT	/;"	d	file:
MXC_H1_UCTRL_H1WIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_UCTRL_H1WIE_BIT	/;"	d	file:
MXC_H1_UCTRL_H1_PWR_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H1_UCTRL_H1_PWR_POL_BIT	/;"	d	file:
MXC_H2_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_OFFSET	/;"	d	file:
MXC_H2_UCTRL_H2PM_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_UCTRL_H2PM_BIT	/;"	d	file:
MXC_H2_UCTRL_H2UIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_UCTRL_H2UIE_BIT	/;"	d	file:
MXC_H2_UCTRL_H2WIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_UCTRL_H2WIE_BIT	/;"	d	file:
MXC_H2_UCTRL_H2_OC_DIS_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_UCTRL_H2_OC_DIS_BIT	/;"	d	file:
MXC_H2_UCTRL_H2_OC_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_UCTRL_H2_OC_POL_BIT	/;"	d	file:
MXC_H2_UCTRL_H2_PWR_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H2_UCTRL_H2_PWR_POL_BIT	/;"	d	file:
MXC_H3_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_H3_OFFSET	/;"	d	file:
MXC_H3_UCTRL_H3UIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H3_UCTRL_H3UIE_BIT	/;"	d	file:
MXC_H3_UCTRL_H3WIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H3_UCTRL_H3WIE_BIT	/;"	d	file:
MXC_H3_UCTRL_H3_OC_DIS_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H3_UCTRL_H3_OC_DIS_BIT	/;"	d	file:
MXC_H3_UCTRL_H3_OC_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H3_UCTRL_H3_OC_POL_BIT	/;"	d	file:
MXC_H3_UCTRL_H3_PWR_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_H3_UCTRL_H3_PWR_POL_BIT	/;"	d	file:
MXC_HCLK	arch/arm/include/asm/arch-mx25/clock.h	/^#define MXC_HCLK	/;"	d
MXC_HCLK	arch/arm/include/asm/arch-mx31/clock.h	/^#define MXC_HCLK	/;"	d
MXC_HCLK	arch/arm/include/asm/arch-mx35/clock.h	/^#define MXC_HCLK	/;"	d
MXC_HCLK	arch/arm/include/asm/arch-mx5/clock.h	/^#define MXC_HCLK	/;"	d
MXC_HCLK	arch/arm/include/asm/arch-mx6/clock.h	/^#define MXC_HCLK	/;"	d
MXC_HCLK	arch/arm/include/asm/arch-mx7/clock.h	/^#define MXC_HCLK	/;"	d
MXC_I2C_CLK	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-ls102xa/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx27/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_I2C_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_I2C_CLK,$/;"	e	enum:mxc_clock
MXC_IO0_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_IO0_CLK,$/;"	e	enum:mxc_clock
MXC_IO1_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_IO1_CLK,$/;"	e	enum:mxc_clock
MXC_IOCLK0	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_IOCLK0 = 0,$/;"	e	enum:mxs_ioclock
MXC_IOCLK1	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_IOCLK1,$/;"	e	enum:mxs_ioclock
MXC_IPG_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_IPG_CLK,$/;"	e	enum:mxc_clock
MXC_IPG_PERCLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_IPG_PERCLK,$/;"	e	enum:mxc_clock
MXC_IPG_PERCLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_IPG_PERCLK,$/;"	e	enum:mxc_clock
MXC_IPG_PERCLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_IPG_PERCLK,$/;"	e	enum:mxc_clock
MXC_IPG_PERCLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_IPG_PERCLK,$/;"	e	enum:mxc_clock
MXC_IPU_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_IPU_CLK,$/;"	e	enum:mxc_clock
MXC_LCDC_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_LCDC_CLK,$/;"	e	enum:mxc_clock
MXC_MMDC_CH1_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_MMDC_CH1_CLK,$/;"	e	enum:ldb_di_clock
MXC_NFC_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_NFC_CLK,$/;"	e	enum:mxc_clock
MXC_NFC_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_NFC_CLK,$/;"	e	enum:mxc_clock
MXC_NFC_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_NFC_CLK,$/;"	e	enum:mxc_clock
MXC_NFC_V1	drivers/mtd/nand/mxc_nand.h	/^#define MXC_NFC_V1$/;"	d
MXC_NFC_V2_1	drivers/mtd/nand/mxc_nand.h	/^#define MXC_NFC_V2_1$/;"	d
MXC_NFC_V3	drivers/mtd/nand/mxc_nand.h	/^#define MXC_NFC_V3$/;"	d
MXC_NFC_V3_2	drivers/mtd/nand/mxc_nand.h	/^#define MXC_NFC_V3_2$/;"	d
MXC_OCOTP	drivers/misc/Kconfig	/^config MXC_OCOTP$/;"	c	menu:Multifunction device drivers
MXC_OTG_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_OFFSET	/;"	d	file:
MXC_OTG_PHYCTRL_OC_DIS_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_PHYCTRL_OC_DIS_BIT	/;"	d	file:
MXC_OTG_PHYCTRL_OC_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_PHYCTRL_OC_POL_BIT	/;"	d	file:
MXC_OTG_PHYCTRL_PWR_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_PHYCTRL_PWR_POL_BIT	/;"	d	file:
MXC_OTG_UCTRL_OPM_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_UCTRL_OPM_BIT	/;"	d	file:
MXC_OTG_UCTRL_OWIE_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_UCTRL_OWIE_BIT	/;"	d	file:
MXC_OTG_UCTRL_O_PWR_POL_BIT	drivers/usb/host/ehci-mx5.c	/^#define MXC_OTG_UCTRL_O_PWR_POL_BIT	/;"	d	file:
MXC_OWIRE_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_OWIRE_CLK,$/;"	e	enum:mxc_clock
MXC_PERIPHERALS_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_PERIPHERALS_CLK,$/;"	e	enum:mxc_clock
MXC_PERIPH_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_PERIPH_CLK,$/;"	e	enum:mxc_clock
MXC_PER_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_PER_CLK,$/;"	e	enum:mxc_clock
MXC_PLL2_PFD0_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_PLL2_PFD0_CLK,$/;"	e	enum:ldb_di_clock
MXC_PLL2_PFD2_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_PLL2_PFD2_CLK,$/;"	e	enum:ldb_di_clock
MXC_PLL3_SW_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_PLL3_SW_CLK,$/;"	e	enum:ldb_di_clock
MXC_PLL5_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_PLL5_CLK = 0,$/;"	e	enum:ldb_di_clock
MXC_PWM_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_PWM_CLK,$/;"	e	enum:mxc_clock
MXC_SATA_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_SATA_CLK,$/;"	e	enum:mxc_clock
MXC_SATA_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_SATA_CLK,$/;"	e	enum:mxc_clock
MXC_SIM1_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_SIM1_CLK,$/;"	e	enum:mxc_clock
MXC_SIM2_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_SIM2_CLK,$/;"	e	enum:mxc_clock
MXC_SOC_MX6	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_SOC_MX6	/;"	d
MXC_SOC_MX7	arch/arm/include/asm/arch-imx/cpu.h	/^#define MXC_SOC_MX7	/;"	d
MXC_SPI_BASE_ADDRESSES	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define MXC_SPI_BASE_ADDRESSES /;"	d
MXC_SPI_BASE_ADDRESSES	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define MXC_SPI_BASE_ADDRESSES /;"	d
MXC_SPI_BASE_ADDRESSES	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define MXC_SPI_BASE_ADDRESSES /;"	d
MXC_SPI_BASE_ADDRESSES	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define MXC_SPI_BASE_ADDRESSES /;"	d
MXC_SPI_BASE_ADDRESSES	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXC_SPI_BASE_ADDRESSES /;"	d
MXC_SPI_BASE_ADDRESSES	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXC_SPI_BASE_ADDRESSES /;"	d
MXC_SSI1_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_SSI1_CLK,$/;"	e	enum:mxc_clock
MXC_SSI2_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_SSI2_CLK,$/;"	e	enum:mxc_clock
MXC_SSP0_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSP0_CLK,$/;"	e	enum:mxc_clock
MXC_SSP1_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSP1_CLK,$/;"	e	enum:mxc_clock
MXC_SSP2_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSP2_CLK,$/;"	e	enum:mxc_clock
MXC_SSP3_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSP3_CLK,$/;"	e	enum:mxc_clock
MXC_SSPCLK0	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSPCLK0 = 0,$/;"	e	enum:mxs_sspclock
MXC_SSPCLK1	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSPCLK1,$/;"	e	enum:mxs_sspclock
MXC_SSPCLK2	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSPCLK2,$/;"	e	enum:mxs_sspclock
MXC_SSPCLK3	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_SSPCLK3,$/;"	e	enum:mxs_sspclock
MXC_SSPCLK_MAX	arch/arm/cpu/arm926ejs/mxs/clock.c	/^#define MXC_SSPCLK_MAX /;"	d	file:
MXC_UART	drivers/serial/Kconfig	/^config MXC_UART$/;"	c	menu:Serial drivers
MXC_UART_CLK	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-ls102xa/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx25/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx27/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx31/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx5/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx6/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_UART_CLK	arch/arm/include/asm/arch-vf610/clock.h	/^	MXC_UART_CLK,$/;"	e	enum:mxc_clock
MXC_USBCTRL_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_USBCTRL_OFFSET	/;"	d	file:
MXC_USBH2CTRL_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_USBH2CTRL_OFFSET	/;"	d	file:
MXC_USBH3CTRL_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_USBH3CTRL_OFFSET	/;"	d	file:
MXC_USB_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	MXC_USB_CLK,$/;"	e	enum:mxc_clock
MXC_USB_CTRL_1_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_USB_CTRL_1_OFFSET	/;"	d	file:
MXC_USB_CTRL_UH1_EXT_CLK_EN	drivers/usb/host/ehci-mx5.c	/^#define MXC_USB_CTRL_UH1_EXT_CLK_EN	/;"	d	file:
MXC_USB_OTG_HACTIVE	drivers/usb/host/Kconfig	/^config MXC_USB_OTG_HACTIVE$/;"	c
MXC_USB_PHY_CTR_FUNC2_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_USB_PHY_CTR_FUNC2_OFFSET	/;"	d	file:
MXC_USB_PHY_CTR_FUNC_OFFSET	drivers/usb/host/ehci-mx5.c	/^#define MXC_USB_PHY_CTR_FUNC_OFFSET	/;"	d	file:
MXC_USDHC_CLK	arch/arm/include/asm/arch-s32v234/clock.h	/^	MXC_USDHC_CLK,$/;"	e	enum:mxc_clock
MXC_XTAL_CLK	arch/arm/include/asm/arch-mxs/clock.h	/^	MXC_XTAL_CLK,$/;"	e	enum:mxc_clock
MXI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_BASE	/;"	d
MXI_DU0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_DU0RDMSCR	/;"	d
MXI_DU0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_DU0WDMSCR	/;"	d
MXI_IMRRDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMRRDMSCR	/;"	d
MXI_IMRWDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMRWDMSCR	/;"	d
MXI_IMS01RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMS01RDMSCR	/;"	d
MXI_IMS01WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMS01WDMSCR	/;"	d
MXI_IMS23RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMS23RDMSCR	/;"	d
MXI_IMS23WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMS23WDMSCR	/;"	d
MXI_IMS45RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMS45RDMSCR	/;"	d
MXI_IMS45WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_IMS45WDMSCR	/;"	d
MXI_JPURDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_JPURDMSCR	/;"	d
MXI_JPUWDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_JPUWDMSCR	/;"	d
MXI_QOS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_QOS_BASE	/;"	d
MXI_RDRWDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_RDRWDMSCR	/;"	d
MXI_ROTCE0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE0RDMSCR	/;"	d
MXI_ROTCE0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE0WDMSCR	/;"	d
MXI_ROTCE1RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE1RDMSCR	/;"	d
MXI_ROTCE1WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE1WDMSCR	/;"	d
MXI_ROTCE2RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE2RDMSCR	/;"	d
MXI_ROTCE2WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE2WDMSCR	/;"	d
MXI_ROTCE3RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE3RDMSCR	/;"	d
MXI_ROTCE3WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE3WDMSCR	/;"	d
MXI_ROTCE4RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE4RDMSCR	/;"	d
MXI_ROTCE4WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTCE4WDMSCR	/;"	d
MXI_ROTVLC0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC0RDMSCR	/;"	d
MXI_ROTVLC0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC0WDMSCR	/;"	d
MXI_ROTVLC1RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC1RDMSCR	/;"	d
MXI_ROTVLC1WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC1WDMSCR	/;"	d
MXI_ROTVLC2RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC2RDMSCR	/;"	d
MXI_ROTVLC2WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC2WDMSCR	/;"	d
MXI_ROTVLC3RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC3RDMSCR	/;"	d
MXI_ROTVLC3WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC3WDMSCR	/;"	d
MXI_ROTVLC4RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC4RDMSCR	/;"	d
MXI_ROTVLC4WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_ROTVLC4WDMSCR	/;"	d
MXI_VCTU0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VCTU0RDMSCR	/;"	d
MXI_VCTU0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VCTU0WDMSCR	/;"	d
MXI_VDCTU0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VDCTU0RDMSCR	/;"	d
MXI_VDCTU0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VDCTU0WDMSCR	/;"	d
MXI_VDCTU1RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VDCTU1RDMSCR	/;"	d
MXI_VDCTU1WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VDCTU1WDMSCR	/;"	d
MXI_VIN0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VIN0WDMSCR	/;"	d
MXI_VIN1WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VIN1WDMSCR	/;"	d
MXI_VSP0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VSP0RDMSCR	/;"	d
MXI_VSP0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VSP0WDMSCR	/;"	d
MXI_VSPD0RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VSPD0RDMSCR	/;"	d
MXI_VSPD0WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VSPD0WDMSCR	/;"	d
MXI_VSPD1RDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VSPD1RDMSCR	/;"	d
MXI_VSPD1WDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXI_VSPD1WDMSCR	/;"	d
MXPS	drivers/usb/host/r8a66597.h	/^#define	MXPS	/;"	d
MXSMMC_MAX_TIMEOUT	drivers/mmc/mxsmmc.c	/^#define	MXSMMC_MAX_TIMEOUT	/;"	d	file:
MXSMMC_SMALL_TRANSFER	drivers/mmc/mxsmmc.c	/^#define MXSMMC_SMALL_TRANSFER	/;"	d	file:
MXSSSP_SMALL_TRANSFER	drivers/spi/mxs_spi.c	/^#define MXSSSP_SMALL_TRANSFER	/;"	d	file:
MXS_APBH_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXS_APBH_BASE	/;"	d
MXS_APBH_BASE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXS_APBH_BASE	/;"	d
MXS_APBH_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_APBH_BASE	/;"	d
MXS_APBX_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_APBX_BASE	/;"	d
MXS_ARMJTAG_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ARMJTAG_BASE	/;"	d
MXS_AUDIOIN_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_AUDIOIN_BASE	/;"	d
MXS_AUDIOOUT_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_AUDIOOUT_BASE	/;"	d
MXS_AXI_AHB0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_AXI_AHB0_BASE	/;"	d
MXS_AXI_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_AXI_BASE	/;"	d
MXS_BCH_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXS_BCH_BASE	/;"	d
MXS_BCH_BASE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXS_BCH_BASE	/;"	d
MXS_BCH_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_BCH_BASE	/;"	d
MXS_BLOCK_CLKGATE	arch/arm/imx-common/misc.c	/^#define	MXS_BLOCK_CLKGATE	/;"	d	file:
MXS_BLOCK_SFTRST	arch/arm/imx-common/misc.c	/^#define	MXS_BLOCK_SFTRST	/;"	d	file:
MXS_BM_I2C_MASTER_1V8	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_I2C_MASTER_1V8	/;"	d
MXS_BM_I2C_MASTER_3V3	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_I2C_MASTER_3V3	/;"	d
MXS_BM_JTAG	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_JTAG	/;"	d
MXS_BM_NAND_1V8	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_NAND_1V8	/;"	d
MXS_BM_NAND_3V3	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_NAND_3V3	/;"	d
MXS_BM_SDMMC0_1V8	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SDMMC0_1V8	/;"	d
MXS_BM_SDMMC0_3V3	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SDMMC0_3V3	/;"	d
MXS_BM_SDMMC1_1V8	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SDMMC1_1V8	/;"	d
MXS_BM_SDMMC1_3V3	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SDMMC1_3V3	/;"	d
MXS_BM_SPI2_MASTER_1V8_NOR	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SPI2_MASTER_1V8_NOR	/;"	d
MXS_BM_SPI2_MASTER_3V3_NOR	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SPI2_MASTER_3V3_NOR	/;"	d
MXS_BM_SPI3_MASTER_1V8_EEPROM	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SPI3_MASTER_1V8_EEPROM	/;"	d
MXS_BM_SPI3_MASTER_1V8_NOR	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SPI3_MASTER_1V8_NOR	/;"	d
MXS_BM_SPI3_MASTER_3V3_EEPROM	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SPI3_MASTER_3V3_EEPROM	/;"	d
MXS_BM_SPI3_MASTER_3V3_NOR	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_SPI3_MASTER_3V3_NOR	/;"	d
MXS_BM_USB	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define MXS_BM_USB	/;"	d
MXS_CAN0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_CAN0_BASE	/;"	d
MXS_CAN1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_CAN1_BASE	/;"	d
MXS_CLKCTRL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_CLKCTRL_BASE	/;"	d
MXS_DCP_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_DCP_BASE	/;"	d
MXS_DFLPT_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_DFLPT_BASE	/;"	d
MXS_DIGCTL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_DIGCTL_BASE	/;"	d
MXS_DMA_ALIGNMENT	arch/arm/include/asm/imx-common/dma.h	/^#define MXS_DMA_ALIGNMENT	/;"	d
MXS_DMA_CHANNEL_AHB_APBH_GPMI0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI0,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_GPMI0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI0,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI1	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI1,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_GPMI1	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI1,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI1	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI1,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI2	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI2,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_GPMI2	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI2,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI2	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI2,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI3	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI3,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_GPMI3	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI3,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI3	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI3,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI4	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI4,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI4	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI4,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI5	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI5,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI5	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI5,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI6	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI6,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI6	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI6,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_GPMI7	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI7,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_GPMI7	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_GPMI7,$/;"	e	enum:__anon172d065f0303
MXS_DMA_CHANNEL_AHB_APBH_HSADC	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_HSADC,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_LCDIF	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_LCDIF = 0,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_LCDIF	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_LCDIF,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_RESERVED0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_RESERVED0,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_RESERVED0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_RESERVED0,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_RESERVED1	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_RESERVED1,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_SSP0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_SSP0 = 0,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_SSP0	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_SSP0,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_SSP1	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_SSP1,$/;"	e	enum:__anon172d065f0103
MXS_DMA_CHANNEL_AHB_APBH_SSP1	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_SSP1,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_SSP2	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_SSP2,$/;"	e	enum:__anon172d065f0203
MXS_DMA_CHANNEL_AHB_APBH_SSP3	arch/arm/include/asm/imx-common/dma.h	/^	MXS_DMA_CHANNEL_AHB_APBH_SSP3,$/;"	e	enum:__anon172d065f0203
MXS_DMA_DESC_BYTES_MASK	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_BYTES_MASK	/;"	d
MXS_DMA_DESC_BYTES_OFFSET	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_BYTES_OFFSET	/;"	d
MXS_DMA_DESC_CHAIN	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_CHAIN	/;"	d
MXS_DMA_DESC_COMMAND_DMA_READ	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_COMMAND_DMA_READ	/;"	d
MXS_DMA_DESC_COMMAND_DMA_SENSE	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_COMMAND_DMA_SENSE	/;"	d
MXS_DMA_DESC_COMMAND_DMA_WRITE	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_COMMAND_DMA_WRITE	/;"	d
MXS_DMA_DESC_COMMAND_MASK	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_COMMAND_MASK	/;"	d
MXS_DMA_DESC_COMMAND_NO_DMAXFER	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_COMMAND_NO_DMAXFER	/;"	d
MXS_DMA_DESC_COMMAND_OFFSET	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_COMMAND_OFFSET	/;"	d
MXS_DMA_DESC_DEC_SEM	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_DEC_SEM	/;"	d
MXS_DMA_DESC_FIRST	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_FIRST	/;"	d
MXS_DMA_DESC_HALT_ON_TERMINATE	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_HALT_ON_TERMINATE	/;"	d
MXS_DMA_DESC_IRQ	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_IRQ	/;"	d
MXS_DMA_DESC_LAST	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_LAST	/;"	d
MXS_DMA_DESC_NAND_LOCK	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_NAND_LOCK	/;"	d
MXS_DMA_DESC_NAND_WAIT_4_READY	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_NAND_WAIT_4_READY	/;"	d
MXS_DMA_DESC_PIO_WORDS_MASK	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_PIO_WORDS_MASK	/;"	d
MXS_DMA_DESC_PIO_WORDS_OFFSET	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_PIO_WORDS_OFFSET	/;"	d
MXS_DMA_DESC_READY	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_READY	/;"	d
MXS_DMA_DESC_TERMINATE_FLUSH	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_TERMINATE_FLUSH	/;"	d
MXS_DMA_DESC_WAIT4END	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_DESC_WAIT4END	/;"	d
MXS_DMA_FLAGS_ALLOCATED	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_FLAGS_ALLOCATED	/;"	d
MXS_DMA_FLAGS_BUSY	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_FLAGS_BUSY	/;"	d
MXS_DMA_FLAGS_FREE	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_FLAGS_FREE	/;"	d
MXS_DMA_FLAGS_IDLE	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_FLAGS_IDLE	/;"	d
MXS_DMA_FLAGS_VALID	arch/arm/include/asm/imx-common/dma.h	/^#define	MXS_DMA_FLAGS_VALID	/;"	d
MXS_DRAM_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_DRAM_BASE	/;"	d
MXS_ECC8_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ECC8_BASE	/;"	d
MXS_EMI_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_EMI_BASE	/;"	d
MXS_ENET0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ENET0_BASE	/;"	d
MXS_ENET1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ENET1_BASE	/;"	d
MXS_ETM_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ETM_BASE	/;"	d
MXS_GPIOMON_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_GPIOMON_BASE	/;"	d
MXS_GPMI_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define MXS_GPMI_BASE	/;"	d
MXS_GPMI_BASE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXS_GPMI_BASE	/;"	d
MXS_GPMI_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_GPMI_BASE	/;"	d
MXS_HSADC_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_HSADC_BASE	/;"	d
MXS_HW_DIGCTL_MICROSECONDS	arch/arm/cpu/arm926ejs/mxs/timer.c	/^#define	MXS_HW_DIGCTL_MICROSECONDS	/;"	d	file:
MXS_I2C0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_I2C0_BASE	/;"	d
MXS_I2C1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_I2C1_BASE	/;"	d
MXS_I2C_MAX_TIMEOUT	drivers/i2c/mxs_i2c.c	/^#define	MXS_I2C_MAX_TIMEOUT	/;"	d	file:
MXS_ICOLL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ICOLL_BASE	/;"	d
MXS_ICOL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_ICOL_BASE	/;"	d
MXS_INCREMENTER_HZ	arch/arm/cpu/arm926ejs/mxs/timer.c	/^#define	MXS_INCREMENTER_HZ	/;"	d	file:
MXS_IOMUX_PAD	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_IOMUX_PAD(/;"	d
MXS_IOMUX_PAD_NAKED	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_IOMUX_PAD_NAKED(/;"	d
MXS_LCDIF_BASE	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define MXS_LCDIF_BASE /;"	d
MXS_LCDIF_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_LCDIF_BASE	/;"	d
MXS_LCDIF_BASE	include/configs/mx6sxsabresd.h	/^#define MXS_LCDIF_BASE /;"	d
MXS_LCDIF_BASE	include/configs/mx6ul_14x14_evk.h	/^#define MXS_LCDIF_BASE /;"	d
MXS_LRADC_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_LRADC_BASE	/;"	d
MXS_MAX_DMA_CHANNELS	arch/arm/include/asm/imx-common/dma.h	/^	MXS_MAX_DMA_CHANNELS,$/;"	e	enum:__anon172d065f0103
MXS_MAX_DMA_CHANNELS	arch/arm/include/asm/imx-common/dma.h	/^	MXS_MAX_DMA_CHANNELS,$/;"	e	enum:__anon172d065f0203
MXS_MAX_DMA_CHANNELS	arch/arm/include/asm/imx-common/dma.h	/^	MXS_MAX_DMA_CHANNELS,$/;"	e	enum:__anon172d065f0303
MXS_NAND_BCH_TIMEOUT	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_BCH_TIMEOUT	/;"	d	file:
MXS_NAND_BITS_PER_ECC_LEVEL	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_BITS_PER_ECC_LEVEL	/;"	d	file:
MXS_NAND_BITS_PER_ECC_LEVEL	tools/mxsboot.c	/^#define	MXS_NAND_BITS_PER_ECC_LEVEL	/;"	d	file:
MXS_NAND_CHUNK_DATA_CHUNK_SIZE	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE	/;"	d	file:
MXS_NAND_CHUNK_DATA_CHUNK_SIZE	tools/mxsboot.c	/^#define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE	/;"	d	file:
MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT	/;"	d	file:
MXS_NAND_COMMAND_BUFFER_SIZE	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_COMMAND_BUFFER_SIZE	/;"	d	file:
MXS_NAND_COMMAND_BUFFER_SIZE	tools/mxsboot.c	/^#define	MXS_NAND_COMMAND_BUFFER_SIZE	/;"	d	file:
MXS_NAND_DMA_DESCRIPTOR_COUNT	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_DMA_DESCRIPTOR_COUNT	/;"	d	file:
MXS_NAND_DMA_DESCRIPTOR_COUNT	tools/mxsboot.c	/^#define	MXS_NAND_DMA_DESCRIPTOR_COUNT	/;"	d	file:
MXS_NAND_METADATA_SIZE	drivers/mtd/nand/mxs_nand.c	/^#define	MXS_NAND_METADATA_SIZE	/;"	d	file:
MXS_NAND_METADATA_SIZE	tools/mxsboot.c	/^#define	MXS_NAND_METADATA_SIZE	/;"	d	file:
MXS_OCOTP_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_OCOTP_BASE	/;"	d
MXS_OCOTP_MAX_TIMEOUT	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^#define	MXS_OCOTP_MAX_TIMEOUT	/;"	d	file:
MXS_OCOTP_MAX_TIMEOUT	board/bluegiga/apx4devkit/apx4devkit.c	/^#define MXS_OCOTP_MAX_TIMEOUT /;"	d	file:
MXS_OCOTP_TIMEOUT	drivers/misc/mxs_ocotp.c	/^#define MXS_OCOTP_TIMEOUT	/;"	d	file:
MXS_PAD_12MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_12MA	/;"	d
MXS_PAD_16MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_16MA	/;"	d
MXS_PAD_1V8	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_1V8	/;"	d
MXS_PAD_3V3	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_3V3	/;"	d
MXS_PAD_4MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_4MA	/;"	d
MXS_PAD_8MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_8MA	/;"	d
MXS_PAD_BANK_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_BANK_MASK	/;"	d
MXS_PAD_BANK_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_BANK_SHIFT	/;"	d
MXS_PAD_CTRL	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_CTRL	/;"	d
MXS_PAD_MA_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_MA_MASK	/;"	d
MXS_PAD_MA_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_MA_SHIFT	/;"	d
MXS_PAD_MA_VALID_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_MA_VALID_MASK	/;"	d
MXS_PAD_MA_VALID_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_MA_VALID_SHIFT	/;"	d
MXS_PAD_MUXSEL_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_MUXSEL_MASK	/;"	d
MXS_PAD_MUXSEL_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_MUXSEL_SHIFT	/;"	d
MXS_PAD_NOPULL	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_NOPULL	/;"	d
MXS_PAD_PIN_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PIN_MASK	/;"	d
MXS_PAD_PIN_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PIN_SHIFT	/;"	d
MXS_PAD_PULLUP	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PULLUP	/;"	d
MXS_PAD_PULL_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PULL_MASK	/;"	d
MXS_PAD_PULL_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PULL_SHIFT	/;"	d
MXS_PAD_PULL_VALID_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PULL_VALID_MASK	/;"	d
MXS_PAD_PULL_VALID_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_PULL_VALID_SHIFT /;"	d
MXS_PAD_VOL_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_VOL_MASK	/;"	d
MXS_PAD_VOL_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_VOL_SHIFT	/;"	d
MXS_PAD_VOL_VALID_MASK	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_VOL_VALID_MASK	/;"	d
MXS_PAD_VOL_VALID_SHIFT	arch/arm/include/asm/arch-mxs/iomux.h	/^#define MXS_PAD_VOL_VALID_SHIFT	/;"	d
MXS_PERFMON_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_PERFMON_BASE	/;"	d
MXS_PINCTRL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_PINCTRL_BASE	/;"	d
MXS_POWER_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_POWER_BASE	/;"	d
MXS_PWM_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_PWM_BASE	/;"	d
MXS_PXP_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_PXP_BASE	/;"	d
MXS_RTC_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_RTC_BASE	/;"	d
MXS_RTC_MAX_TIMEOUT	drivers/rtc/mxsrtc.c	/^#define	MXS_RTC_MAX_TIMEOUT	/;"	d	file:
MXS_SAIF0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SAIF0_BASE	/;"	d
MXS_SAIF1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SAIF1_BASE	/;"	d
MXS_SIMDBG_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SIMDBG_BASE	/;"	d
MXS_SIMENET_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SIMENET_BASE	/;"	d
MXS_SIMGPMISEL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SIMGPMISEL_BASE	/;"	d
MXS_SIMMEMSEL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SIMMEMSEL_BASE	/;"	d
MXS_SIMSSPSEL_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SIMSSPSEL_BASE	/;"	d
MXS_SPDIF_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SPDIF_BASE	/;"	d
MXS_SPI_MAX_TIMEOUT	drivers/spi/mxs_spi.c	/^#define	MXS_SPI_MAX_TIMEOUT	/;"	d	file:
MXS_SPI_PORT_OFFSET	drivers/spi/mxs_spi.c	/^#define	MXS_SPI_PORT_OFFSET	/;"	d	file:
MXS_SSP0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SSP0_BASE	/;"	d
MXS_SSP1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SSP1_BASE	/;"	d
MXS_SSP2_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SSP2_BASE	/;"	d
MXS_SSP3_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_SSP3_BASE	/;"	d
MXS_SSP_CHIPSELECT_MASK	drivers/spi/mxs_spi.c	/^#define MXS_SSP_CHIPSELECT_MASK	/;"	d	file:
MXS_SSP_CHIPSELECT_SHIFT	drivers/spi/mxs_spi.c	/^#define MXS_SSP_CHIPSELECT_SHIFT	/;"	d	file:
MXS_TIMROT_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_TIMROT_BASE	/;"	d
MXS_TVENC_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_TVENC_BASE	/;"	d
MXS_UARTAPP0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_UARTAPP0_BASE	/;"	d
MXS_UARTAPP1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_UARTAPP1_BASE	/;"	d
MXS_UARTAPP2_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_UARTAPP2_BASE	/;"	d
MXS_UARTAPP3_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_UARTAPP3_BASE	/;"	d
MXS_UARTAPP4_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_UARTAPP4_BASE	/;"	d
MXS_UARTDBG_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_UARTDBG_BASE	/;"	d
MXS_USBCTRL0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_USBCTRL0_BASE	/;"	d
MXS_USBCTRL1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_USBCTRL1_BASE	/;"	d
MXS_USBPHY0_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_USBPHY0_BASE	/;"	d
MXS_USBPHY1_BASE	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define	MXS_USBPHY1_BASE	/;"	d
MXT_CMM0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_CMM0SLVDMSCR	/;"	d
MXT_CMM1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_CMM1SLVDMSCR	/;"	d
MXT_CMM2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_CMM2SLVDMSCR	/;"	d
MXT_FDPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_FDPSLVDMSCR	/;"	d
MXT_IMRSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_IMRSLVDMSCR	/;"	d
MXT_IMRSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_IMRSLVDMSCR	/;"	d
MXT_MAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_MAP1SLVDMSCR	/;"	d
MXT_MAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_MAP1SLVDMSCR	/;"	d
MXT_MAP2BSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_MAP2BSLVDMSCR	/;"	d
MXT_MAP2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_MAP2SLVDMSCR	/;"	d
MXT_MAP2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_MAP2SLVDMSCR	/;"	d
MXT_SYXDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_SYXDMSCR	/;"	d
MXT_VINSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_VINSLVDMSCR	/;"	d
MXT_VINSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VINSLVDMSCR	/;"	d
MXT_VPC0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VPC0SLVDMSCR	/;"	d
MXT_VPC1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VPC1SLVDMSCR	/;"	d
MXT_VSP0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VSP0SLVDMSCR	/;"	d
MXT_VSP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_VSP1SLVDMSCR	/;"	d
MXT_VSP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VSP1SLVDMSCR	/;"	d
MXT_VSPD0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_VSPD0SLVDMSCR	/;"	d
MXT_VSPD0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VSPD0SLVDMSCR	/;"	d
MXT_VSPD1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	MXT_VSPD1SLVDMSCR	/;"	d
MXT_VSPD1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define MXT_VSPD1SLVDMSCR	/;"	d
MXVRWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define MXVRWE	/;"	d
MXVR_AADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_AADDR /;"	d
MXVR_ALLOC_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_0 /;"	d
MXVR_ALLOC_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_1 /;"	d
MXVR_ALLOC_10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_10 /;"	d
MXVR_ALLOC_11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_11 /;"	d
MXVR_ALLOC_12	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_12 /;"	d
MXVR_ALLOC_13	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_13 /;"	d
MXVR_ALLOC_14	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_14 /;"	d
MXVR_ALLOC_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_2 /;"	d
MXVR_ALLOC_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_3 /;"	d
MXVR_ALLOC_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_4 /;"	d
MXVR_ALLOC_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_5 /;"	d
MXVR_ALLOC_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_6 /;"	d
MXVR_ALLOC_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_7 /;"	d
MXVR_ALLOC_8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_8 /;"	d
MXVR_ALLOC_9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ALLOC_9 /;"	d
MXVR_APRB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_APRB_CURR_ADDR /;"	d
MXVR_APRB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_APRB_START_ADDR /;"	d
MXVR_APTB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_APTB_CURR_ADDR /;"	d
MXVR_APTB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_APTB_START_ADDR /;"	d
MXVR_AP_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_AP_CTL /;"	d
MXVR_BLOCK_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_BLOCK_CNT /;"	d
MXVR_CDRPLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CDRPLL_CTL /;"	d
MXVR_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CLK_CTL /;"	d
MXVR_CMRB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CMRB_CURR_ADDR /;"	d
MXVR_CMRB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CMRB_START_ADDR /;"	d
MXVR_CMTB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CMTB_CURR_ADDR /;"	d
MXVR_CMTB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CMTB_START_ADDR /;"	d
MXVR_CM_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CM_CTL /;"	d
MXVR_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_CONFIG /;"	d
MXVR_DELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DELAY /;"	d
MXVR_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA0_CONFIG /;"	d
MXVR_DMA0_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA0_COUNT /;"	d
MXVR_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA0_CURR_ADDR /;"	d
MXVR_DMA0_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA0_CURR_COUNT /;"	d
MXVR_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA0_START_ADDR /;"	d
MXVR_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA1_CONFIG /;"	d
MXVR_DMA1_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA1_COUNT /;"	d
MXVR_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA1_CURR_ADDR /;"	d
MXVR_DMA1_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA1_CURR_COUNT /;"	d
MXVR_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA1_START_ADDR /;"	d
MXVR_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA2_CONFIG /;"	d
MXVR_DMA2_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA2_COUNT /;"	d
MXVR_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA2_CURR_ADDR /;"	d
MXVR_DMA2_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA2_CURR_COUNT /;"	d
MXVR_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA2_START_ADDR /;"	d
MXVR_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA3_CONFIG /;"	d
MXVR_DMA3_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA3_COUNT /;"	d
MXVR_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA3_CURR_ADDR /;"	d
MXVR_DMA3_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA3_CURR_COUNT /;"	d
MXVR_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA3_START_ADDR /;"	d
MXVR_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA4_CONFIG /;"	d
MXVR_DMA4_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA4_COUNT /;"	d
MXVR_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA4_CURR_ADDR /;"	d
MXVR_DMA4_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA4_CURR_COUNT /;"	d
MXVR_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA4_START_ADDR /;"	d
MXVR_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA5_CONFIG /;"	d
MXVR_DMA5_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA5_COUNT /;"	d
MXVR_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA5_CURR_ADDR /;"	d
MXVR_DMA5_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA5_CURR_COUNT /;"	d
MXVR_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA5_START_ADDR /;"	d
MXVR_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA6_CONFIG /;"	d
MXVR_DMA6_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA6_COUNT /;"	d
MXVR_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA6_CURR_ADDR /;"	d
MXVR_DMA6_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA6_CURR_COUNT /;"	d
MXVR_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA6_START_ADDR /;"	d
MXVR_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA7_CONFIG /;"	d
MXVR_DMA7_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA7_COUNT /;"	d
MXVR_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA7_CURR_ADDR /;"	d
MXVR_DMA7_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA7_CURR_COUNT /;"	d
MXVR_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_DMA7_START_ADDR /;"	d
MXVR_FMPLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_FMPLL_CTL /;"	d
MXVR_FRAME_CNT_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_FRAME_CNT_0 /;"	d
MXVR_FRAME_CNT_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_FRAME_CNT_1 /;"	d
MXVR_GADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_GADDR /;"	d
MXVR_INT_EN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_INT_EN_0 /;"	d
MXVR_INT_EN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_INT_EN_1 /;"	d
MXVR_INT_STAT_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_INT_STAT_0 /;"	d
MXVR_INT_STAT_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_INT_STAT_1 /;"	d
MXVR_LADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_LADDR /;"	d
MXVR_MAX_DELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_MAX_DELAY /;"	d
MXVR_MAX_POSITION	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_MAX_POSITION /;"	d
MXVR_PAT_DATA_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_PAT_DATA_0 /;"	d
MXVR_PAT_DATA_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_PAT_DATA_1 /;"	d
MXVR_PAT_EN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_PAT_EN_0 /;"	d
MXVR_PAT_EN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_PAT_EN_1 /;"	d
MXVR_PIN_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_PIN_CTL /;"	d
MXVR_POSITION	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_POSITION /;"	d
MXVR_ROUTING_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_0 /;"	d
MXVR_ROUTING_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_1 /;"	d
MXVR_ROUTING_10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_10 /;"	d
MXVR_ROUTING_11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_11 /;"	d
MXVR_ROUTING_12	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_12 /;"	d
MXVR_ROUTING_13	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_13 /;"	d
MXVR_ROUTING_14	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_14 /;"	d
MXVR_ROUTING_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_2 /;"	d
MXVR_ROUTING_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_3 /;"	d
MXVR_ROUTING_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_4 /;"	d
MXVR_ROUTING_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_5 /;"	d
MXVR_ROUTING_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_6 /;"	d
MXVR_ROUTING_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_7 /;"	d
MXVR_ROUTING_8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_8 /;"	d
MXVR_ROUTING_9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_ROUTING_9 /;"	d
MXVR_RRDB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_RRDB_CURR_ADDR /;"	d
MXVR_RRDB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_RRDB_START_ADDR /;"	d
MXVR_SCLK_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SCLK_CNT /;"	d
MXVR_STATE_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_STATE_0 /;"	d
MXVR_STATE_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_STATE_1 /;"	d
MXVR_SYNC_LCHAN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_0 /;"	d
MXVR_SYNC_LCHAN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_1 /;"	d
MXVR_SYNC_LCHAN_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_2 /;"	d
MXVR_SYNC_LCHAN_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_3 /;"	d
MXVR_SYNC_LCHAN_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_4 /;"	d
MXVR_SYNC_LCHAN_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_5 /;"	d
MXVR_SYNC_LCHAN_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_6 /;"	d
MXVR_SYNC_LCHAN_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define MXVR_SYNC_LCHAN_7 /;"	d
MX_ID_LV320B	include/flash.h	/^#define MX_ID_LV320B	/;"	d
MX_ID_LV320T	include/flash.h	/^#define MX_ID_LV320T	/;"	d
MX_MANUFACT	include/flash.h	/^#define MX_MANUFACT	/;"	d
MX_UPD0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MX_UPD0	/;"	d
MX_UPD0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MX_UPD0	/;"	d
MX_UPD2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define MX_UPD2	/;"	d
MX_UPD2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define MX_UPD2	/;"	d
MYMAX	lib/bzip2/bzlib_huffman.c	/^#define MYMAX(/;"	d	file:
MY_CDECL	lib/lzma/Types.h	/^#define MY_CDECL /;"	d
MY_CDECL	lib/lzma/Types.h	/^#define MY_CDECL$/;"	d
MY_FAST_CALL	lib/lzma/Types.h	/^#define MY_FAST_CALL /;"	d
MY_FAST_CALL	lib/lzma/Types.h	/^#define MY_FAST_CALL$/;"	d
MY_NO_INLINE	lib/lzma/Types.h	/^#define MY_NO_INLINE /;"	d
MY_NO_INLINE	lib/lzma/Types.h	/^#define MY_NO_INLINE$/;"	d
MY_TLB_WORD2_I_ENABLE	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define MY_TLB_WORD2_I_ENABLE	/;"	d	file:
MY_TLB_WORD2_I_ENABLE	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define MY_TLB_WORD2_I_ENABLE	/;"	d	file:
MY_TLB_WORD2_I_ENABLE	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define MY_TLB_WORD2_I_ENABLE	/;"	d	file:
MY_TLB_WORD2_I_ENABLE	board/liebherr/lwmon5/sdram.c	/^#define MY_TLB_WORD2_I_ENABLE	/;"	d	file:
MZAP_ENT_LEN	include/zfs/zap_impl.h	/^#define	MZAP_ENT_LEN	/;"	d
MZAP_MAX_BLKSHIFT	include/zfs/zap_impl.h	/^#define	MZAP_MAX_BLKSHIFT	/;"	d
MZAP_MAX_BLKSZ	include/zfs/zap_impl.h	/^#define	MZAP_MAX_BLKSZ	/;"	d
MZAP_NAME_LEN	include/zfs/zap_impl.h	/^#define	MZAP_NAME_LEN	/;"	d
M_ABORT	include/scsi.h	/^#define	M_ABORT	/;"	d
M_ABORT_TAG	include/scsi.h	/^#define	M_ABORT_TAG	/;"	d
M_ALL_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_ALL_OUT_EN	/;"	d
M_AUTO_GATING_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_AUTO_GATING_EN /;"	d
M_AXI_MAX_OUTSTANDING_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_AXI_MAX_OUTSTANDING_EN /;"	d
M_AXI_OUTSTANDING_MAX_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_AXI_OUTSTANDING_MAX_NUM /;"	d
M_CASID	arch/powerpc/include/asm/mmu.h	/^#define M_CASID	/;"	d
M_CLASS	arch/arm/include/asm/unified.h	/^#define M_CLASS(/;"	d
M_CLEAR_QUEUE	include/scsi.h	/^#define	M_CLEAR_QUEUE	/;"	d
M_COMPLETE	include/scsi.h	/^#define	M_COMPLETE	/;"	d
M_DAM_BURST_LENGTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DAM_BURST_LENGTH /;"	d
M_DIRECT_PATH_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DIRECT_PATH_EN /;"	d
M_DIRECT_PATH_LAYER_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DIRECT_PATH_LAYER_SEL /;"	d
M_DISCONNECT	include/scsi.h	/^#define	M_DISCONNECT	/;"	d
M_DITHER_DOWN_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DITHER_DOWN_EN /;"	d
M_DITHER_DOWN_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DITHER_DOWN_MODE /;"	d
M_DITHER_DOWN_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DITHER_DOWN_SEL /;"	d
M_DITHER_UP_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DITHER_UP_EN /;"	d
M_DIVIDER	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define M_DIVIDER	/;"	d
M_DMA_STOP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DMA_STOP /;"	d
M_DOUB_CHANNEL_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DOUB_CHANNEL_EN /;"	d
M_DOUB_CH_OVERLAP_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DOUB_CH_OVERLAP_NUM /;"	d
M_DSP_BG_BLUE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_BG_BLUE /;"	d
M_DSP_BG_GREEN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_BG_GREEN /;"	d
M_DSP_BG_RED	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_BG_RED /;"	d
M_DSP_BG_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_BG_SWAP /;"	d
M_DSP_BLACK_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_BLACK_EN /;"	d
M_DSP_BLANK_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_BLANK_EN /;"	d
M_DSP_CCIR656_AVG	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_CCIR656_AVG /;"	d
M_DSP_DCLK_DDR	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_DCLK_DDR /;"	d
M_DSP_DCLK_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_DCLK_POL /;"	d
M_DSP_DDR_PHASE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_DDR_PHASE /;"	d
M_DSP_DELTA_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_DELTA_SWAP /;"	d
M_DSP_DEN_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_DEN_POL /;"	d
M_DSP_DUMMY_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_DUMMY_SWAP /;"	d
M_DSP_FIELD_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_FIELD_POL /;"	d
M_DSP_HSYNC_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_HSYNC_POL /;"	d
M_DSP_INTERLACE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_INTERLACE /;"	d
M_DSP_LAYER0_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_LAYER0_SEL /;"	d
M_DSP_LAYER1_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_LAYER1_SEL /;"	d
M_DSP_LAYER2_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_LAYER2_SEL /;"	d
M_DSP_LAYER3_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_LAYER3_SEL /;"	d
M_DSP_LUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_LUT_EN /;"	d
M_DSP_OUT_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_OUT_MODE /;"	d
M_DSP_OUT_ZERO	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_OUT_ZERO /;"	d
M_DSP_RB_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_RB_SWAP /;"	d
M_DSP_RG_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_RG_SWAP /;"	d
M_DSP_VSYNC_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_VSYNC_POL /;"	d
M_DSP_X_MIR_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_X_MIR_EN /;"	d
M_DSP_YUV_CLIP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_YUV_CLIP /;"	d
M_DSP_Y_MIR_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_DSP_Y_MIR_EN /;"	d
M_EDPI_HALT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_EDPI_HALT_EN /;"	d
M_EDPI_WMS_FS	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_EDPI_WMS_FS /;"	d
M_EDPI_WMS_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_EDPI_WMS_MODE /;"	d
M_EDP_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_EDP_OUT_EN /;"	d
M_EVENT	scripts/kconfig/lxdialog/dialog.h	/^#define M_EVENT /;"	d
M_EXTENDED	include/scsi.h	/^#define	M_EXTENDED	/;"	d
M_FCOMPLETE	include/scsi.h	/^#define	M_FCOMPLETE	/;"	d
M_FPGA_VERSION	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_FPGA_VERSION /;"	d
M_GRAIN	include/malloc.h	/^#define M_GRAIN /;"	d
M_HDMI_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_HDMI_OUT_EN /;"	d
M_HEAD_TAG	include/scsi.h	/^#define	M_HEAD_TAG	/;"	d
M_IDENTIFY	include/scsi.h	/^#define	M_IDENTIFY	/;"	d
M_ID_ERROR	include/scsi.h	/^#define	M_ID_ERROR	/;"	d
M_IGN_RESIDUE	include/scsi.h	/^#define	M_IGN_RESIDUE	/;"	d
M_INIT_REC	include/scsi.h	/^#define	M_INIT_REC	/;"	d
M_KEEP	include/malloc.h	/^#define M_KEEP /;"	d
M_L1INDX	arch/powerpc/include/asm/mmu.h	/^#define M_L1INDX	/;"	d
M_L1TB	arch/powerpc/include/asm/mmu.h	/^#define	M_L1TB	/;"	d
M_LCOMPLETE	include/scsi.h	/^#define	M_LCOMPLETE	/;"	d
M_LEON2	arch/sparc/include/asm/machines.h	/^#define  M_LEON2 /;"	d
M_LEON2_SOC	arch/sparc/include/asm/machines.h	/^#define M_LEON2_SOC /;"	d
M_MASK	include/bedbug/ppc.h	/^#define M_MASK /;"	d
M_MDIV	board/samsung/smdk2410/smdk2410.c	/^#define M_MDIV	/;"	d	file:
M_MIPI_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_MIPI_OUT_EN	/;"	d
M_MMAP_MAX	include/malloc.h	/^#define M_MMAP_MAX /;"	d
M_MMAP_THRESHOLD	include/malloc.h	/^#define M_MMAP_THRESHOLD /;"	d
M_MMU_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_MMU_EN /;"	d
M_MXFAST	include/malloc.h	/^#define M_MXFAST /;"	d
M_NAND_GPMC_CONFIG1	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG1	/;"	d
M_NAND_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG1	/;"	d
M_NAND_GPMC_CONFIG1	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG1	/;"	d
M_NAND_GPMC_CONFIG1	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG1	/;"	d
M_NAND_GPMC_CONFIG2	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG2	/;"	d
M_NAND_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG2	/;"	d
M_NAND_GPMC_CONFIG2	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG2	/;"	d
M_NAND_GPMC_CONFIG2	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG2	/;"	d
M_NAND_GPMC_CONFIG3	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG3	/;"	d
M_NAND_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG3	/;"	d
M_NAND_GPMC_CONFIG3	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG3	/;"	d
M_NAND_GPMC_CONFIG3	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG3	/;"	d
M_NAND_GPMC_CONFIG4	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG4	/;"	d
M_NAND_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG4	/;"	d
M_NAND_GPMC_CONFIG4	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG4	/;"	d
M_NAND_GPMC_CONFIG4	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG4	/;"	d
M_NAND_GPMC_CONFIG5	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG5	/;"	d
M_NAND_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG5	/;"	d
M_NAND_GPMC_CONFIG5	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG5	/;"	d
M_NAND_GPMC_CONFIG5	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG5	/;"	d
M_NAND_GPMC_CONFIG6	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG6	/;"	d
M_NAND_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG6	/;"	d
M_NAND_GPMC_CONFIG6	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG6	/;"	d
M_NAND_GPMC_CONFIG6	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG6	/;"	d
M_NAND_GPMC_CONFIG7	arch/arm/include/asm/arch-am33xx/mem.h	/^#define M_NAND_GPMC_CONFIG7	/;"	d
M_NAND_GPMC_CONFIG7	arch/arm/include/asm/arch-omap3/mem.h	/^#define M_NAND_GPMC_CONFIG7	/;"	d
M_NAND_GPMC_CONFIG7	arch/arm/include/asm/arch-omap4/mem.h	/^#define M_NAND_GPMC_CONFIG7	/;"	d
M_NAND_GPMC_CONFIG7	arch/arm/include/asm/arch-omap5/mem.h	/^#define M_NAND_GPMC_CONFIG7	/;"	d
M_NLBLKS	include/malloc.h	/^#define M_NLBLKS /;"	d
M_NOC_HURRY_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_NOC_HURRY_EN /;"	d
M_NOC_HURRY_THRESHOLD	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_NOC_HURRY_THRESHOLD /;"	d
M_NOC_HURRY_VALUE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_NOC_HURRY_VALUE /;"	d
M_NOC_QOS_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_NOC_QOS_EN /;"	d
M_NOC_WIN_QOS	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_NOC_WIN_QOS /;"	d
M_NOOP	include/scsi.h	/^#define	M_NOOP	/;"	d
M_OPCODE	include/bedbug/ppc.h	/^#define M_OPCODE(/;"	d
M_ORDERED_TAG	include/scsi.h	/^#define	M_ORDERED_TAG	/;"	d
M_PARITY	include/scsi.h	/^#define	M_PARITY	/;"	d
M_PDIV	board/samsung/smdk2410/smdk2410.c	/^#define M_PDIV	/;"	d	file:
M_PRE_DITHER_DOWN_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_PRE_DITHER_DOWN_EN /;"	d
M_REJECT	include/scsi.h	/^#define	M_REJECT	/;"	d
M_REL_REC	include/scsi.h	/^#define	M_REL_REC	/;"	d
M_RESET	include/scsi.h	/^#define	M_RESET	/;"	d
M_RESTORE_DP	include/scsi.h	/^#define	M_RESTORE_DP	/;"	d
M_RGB_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_RGB_OUT_EN /;"	d
M_RTL_VERSION	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_RTL_VERSION /;"	d
M_SAVE_DP	include/scsi.h	/^#define	M_SAVE_DP	/;"	d
M_SDIV	board/samsung/smdk2410/smdk2410.c	/^#define M_SDIV	/;"	d	file:
M_SIMPLE_TAG	include/scsi.h	/^#define	M_SIMPLE_TAG	/;"	d
M_SPLL_REF_FB_DIV	include/radeon.h	/^#define M_SPLL_REF_FB_DIV	/;"	d
M_STANDBY_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_STANDBY_EN /;"	d
M_TERMINATE	include/scsi.h	/^#define	M_TERMINATE	/;"	d
M_TOP_PAD	include/malloc.h	/^#define M_TOP_PAD /;"	d
M_TRIM_THRESHOLD	include/malloc.h	/^#define M_TRIM_THRESHOLD /;"	d
M_TW	arch/powerpc/include/asm/mmu.h	/^#define M_TW	/;"	d
M_TWB	arch/powerpc/include/asm/mmu.h	/^#define M_TWB	/;"	d
M_VID0_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define M_VID0_CFG(/;"	d
M_VID1_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define M_VID1_CFG(/;"	d
M_VID2_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define M_VID2_CFG(/;"	d
M_VID_UPDATE_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define M_VID_UPDATE_CTRL	/;"	d
M_VID_UPDATE_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define M_VID_UPDATE_CTRL	/;"	d
M_WIN0_ALPHA_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_ALPHA_SWAP /;"	d
M_WIN0_BIC_COE_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_BIC_COE_SEL /;"	d
M_WIN0_CBR_AXI_GATHER_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_AXI_GATHER_EN /;"	d
M_WIN0_CBR_AXI_GATHER_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_AXI_GATHER_NUM /;"	d
M_WIN0_CBR_DEFLICK	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_DEFLICK /;"	d
M_WIN0_CBR_HOR_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_HOR_SCL_MODE /;"	d
M_WIN0_CBR_HSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_HSD_MODE /;"	d
M_WIN0_CBR_VER_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_VER_SCL_MODE /;"	d
M_WIN0_CBR_VSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_VSD_MODE /;"	d
M_WIN0_CBR_VSU_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CBR_VSU_MODE /;"	d
M_WIN0_CSC_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_CSC_MODE /;"	d
M_WIN0_DATA_FMT	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_DATA_FMT /;"	d
M_WIN0_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_EN /;"	d
M_WIN0_FMT_10	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_FMT_10 /;"	d
M_WIN0_INTERLACE_READ	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_INTERLACE_READ /;"	d
M_WIN0_KEY_COLOR	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_KEY_COLOR /;"	d
M_WIN0_KEY_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_KEY_EN /;"	d
M_WIN0_LB_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_LB_MODE /;"	d
M_WIN0_LINE_LOAD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_LINE_LOAD_MODE /;"	d
M_WIN0_MID_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_MID_SWAP /;"	d
M_WIN0_NO_OUTSTANDING	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_NO_OUTSTANDING /;"	d
M_WIN0_PPAS_ZERO_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_PPAS_ZERO_EN /;"	d
M_WIN0_RB_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_RB_SWAP /;"	d
M_WIN0_UV_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_UV_SWAP /;"	d
M_WIN0_VSD_CBR_GT2	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_VSD_CBR_GT2 /;"	d
M_WIN0_VSD_CBR_GT4	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_VSD_CBR_GT4 /;"	d
M_WIN0_VSD_YRGB_GT2	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_VSD_YRGB_GT2 /;"	d
M_WIN0_VSD_YRGB_GT4	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_VSD_YRGB_GT4 /;"	d
M_WIN0_YRGB_AXI_GATHER_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_AXI_GATHER_EN /;"	d
M_WIN0_YRGB_AXI_GATHER_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_AXI_GATHER_NUM /;"	d
M_WIN0_YRGB_DEFLICK	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_DEFLICK /;"	d
M_WIN0_YRGB_HOR_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_HOR_SCL_MODE /;"	d
M_WIN0_YRGB_HSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_HSD_MODE /;"	d
M_WIN0_YRGB_VER_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_VER_SCL_MODE /;"	d
M_WIN0_YRGB_VSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_VSD_MODE /;"	d
M_WIN0_YRGB_VSU_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YRGB_VSU_MODE /;"	d
M_WIN0_YUV_CLIP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define M_WIN0_YUV_CLIP /;"	d
M_X_MODIFY_DP	include/scsi.h	/^#define	M_X_MODIFY_DP	/;"	d
M_X_PPR_REQ	include/scsi.h	/^#define	M_X_PPR_REQ	/;"	d
M_X_SYNC_REQ	include/scsi.h	/^#define	M_X_SYNC_REQ	/;"	d
M_X_WIDE_REQ	include/scsi.h	/^#define	M_X_WIDE_REQ	/;"	d
Machine	include/pe.h	/^	uint16_t Machine;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint16_t
MachineCheckException	arch/powerpc/cpu/mpc512x/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc5xx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc5xxx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc8260/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc83xx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc85xx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc86xx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/mpc8xx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
MachineCheckException	arch/powerpc/cpu/ppc4xx/traps.c	/^void MachineCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
Magic	board/vscom/baltos/board.h	/^	uint32_t Magic;$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint32_t
Magic	include/pe.h	/^	uint16_t Magic; \/* 0x10b or 0x107 *\/     \/* 0x00 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
Magic	include/pe.h	/^	uint16_t Magic; \/* 0x20b *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
Mailbox Controller Support	drivers/mailbox/Kconfig	/^menu "Mailbox Controller Support"$/;"	m
MaintainersDatabase	tools/genboardscfg.py	/^class MaintainersDatabase:$/;"	c
Maj	fs/zfs/zfs_sha256.c	/^#define	Maj(/;"	d	file:
MajorImageVersion	include/pe.h	/^	uint16_t MajorImageVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
MajorImageVersion	include/pe.h	/^	uint16_t MajorImageVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
MajorLinkerVersion	include/pe.h	/^	uint8_t  MajorLinkerVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint8_t
MajorLinkerVersion	include/pe.h	/^	uint8_t  MajorLinkerVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint8_t
MajorOperatingSystemVersion	include/pe.h	/^	uint16_t MajorOperatingSystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
MajorOperatingSystemVersion	include/pe.h	/^	uint16_t MajorOperatingSystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
MajorSubsystemVersion	include/pe.h	/^	uint16_t MajorSubsystemVersion;          \/* 0x30 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
MajorSubsystemVersion	include/pe.h	/^	uint16_t MajorSubsystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
MajorVersion	drivers/usb/gadget/rndis.h	/^	__le32	MajorVersion;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MajorVersion	drivers/usb/gadget/rndis.h	/^	__le32	MajorVersion;$/;"	m	struct:rndis_init_msg_type	typeref:typename:__le32
Make	doc/README.x86	/^Make sure all these binary blobs are put in the board directory.$/;"	l
Make	tools/buildman/builder.py	/^    def Make(self, commit, brd, stage, cwd, *args, **kwargs):$/;"	m	class:Builder
Make	tools/buildman/builderthread.py	/^    def Make(self, commit, brd, stage, cwd, *args, **kwargs):$/;"	m	class:BuilderThread
Make	tools/buildman/test.py	/^    def Make(self, commit, brd, stage, *args, **kwargs):$/;"	m	class:TestBuild
MakeCcFile	tools/patman/series.py	/^    def MakeCcFile(self, process_tags, cover_fname, raise_on_error,$/;"	m	class:Series
MakeChangeLog	tools/patman/series.py	/^    def MakeChangeLog(self, commit):$/;"	m	class:Series
MakeEnvironment	tools/buildman/toolchain.py	/^    def MakeEnvironment(self, full_path):$/;"	m	class:Toolchain
Makefile	Makefile	/^$(CURDIR)\/Makefile Makefile: ;$/;"	t
MaskSize	drivers/usb/gadget/ndis.h	/^	__le32	MaskSize;$/;"	m	struct:NDIS_PM_PACKET_PATTERN	typeref:typename:__le32
Matches	tools/buildman/board.py	/^    def Matches(self, props):$/;"	m	class:Expr
Matches	tools/buildman/board.py	/^    def Matches(self, props):$/;"	m	class:Term
MaxPacketsPerTransfer	drivers/usb/gadget/rndis.h	/^	__le32	MaxPacketsPerTransfer;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MaxPower	drivers/usb/host/ehci.h	/^	unsigned char	MaxPower;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
MaxTransferSize	drivers/usb/gadget/rndis.h	/^	__le32	MaxTransferSize;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MaxTransferSize	drivers/usb/gadget/rndis.h	/^	__le32	MaxTransferSize;$/;"	m	struct:rndis_init_msg_type	typeref:typename:__le32
MediaStatus	drivers/net/rtl8139.c	/^	MediaStatus=0x58,$/;"	e	enum:RTL8139_registers	file:
MediaStatusBits	drivers/net/rtl8139.c	/^enum MediaStatusBits {$/;"	g	file:
Medium	drivers/usb/gadget/rndis.h	/^	__le32	Medium;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MemBnkSp	include/SA-1100.h	/^#define MemBnkSp	/;"	d
Memory Controller drivers	drivers/memory/Kconfig	/^menu "Memory Controller drivers"$/;"	m
Memory commands	cmd/Kconfig	/^menu "Memory commands"$/;"	m	menu:Command line interface
Memory_Config_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Memory_Config_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Memory_Config_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Memory_Config_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Memory_Status	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Memory_Status;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Menu	tools/buildman/kconfiglib.py	/^class Menu(Item):$/;"	c
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_halt_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_indicate_status_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_init_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_keepalive_cmplt_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_keepalive_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_query_cmplt_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_reset_cmplt_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_reset_msg_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_set_cmplt_type	typeref:typename:__le32
MessageLength	drivers/usb/gadget/rndis.h	/^	__le32	MessageLength;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_halt_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_indicate_status_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_init_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_keepalive_cmplt_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_keepalive_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_query_cmplt_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_reset_cmplt_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_reset_msg_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_set_cmplt_type	typeref:typename:__le32
MessageType	drivers/usb/gadget/rndis.h	/^	__le32	MessageType;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
Mic_secs_Per_Second	lib/dhry/dhry.h	/^#define Mic_secs_Per_Second /;"	d
MicroBlaze architecture	arch/microblaze/Kconfig	/^menu "MicroBlaze architecture"$/;"	m
Microchip PIC32 platforms	arch/mips/mach-pic32/Kconfig	/^menu "Microchip PIC32 platforms"$/;"	m
Microcode	tools/microcode-tool	/^class Microcode:$/;"	c
Microcode	tools/microcode-tool.py	/^class Microcode:$/;"	c
MicrocodeTool	tools/microcode-tool	/^def MicrocodeTool():$/;"	f
MicrocodeTool	tools/microcode-tool.py	/^def MicrocodeTool():$/;"	f
MinLinkChangeWakeUp	drivers/usb/gadget/ndis.h	/^	enum NDIS_DEVICE_POWER_STATE  MinLinkChangeWakeUp;$/;"	m	struct:NDIS_PM_WAKE_UP_CAPABILITIES	typeref:enum:NDIS_DEVICE_POWER_STATE
MinMagicPacketWakeUp	drivers/usb/gadget/ndis.h	/^	enum NDIS_DEVICE_POWER_STATE  MinMagicPacketWakeUp;$/;"	m	struct:NDIS_PM_WAKE_UP_CAPABILITIES	typeref:enum:NDIS_DEVICE_POWER_STATE
MinPatternWakeUp	drivers/usb/gadget/ndis.h	/^	enum NDIS_DEVICE_POWER_STATE  MinPatternWakeUp;$/;"	m	struct:NDIS_PM_WAKE_UP_CAPABILITIES	typeref:enum:NDIS_DEVICE_POWER_STATE
MinorImageVersion	include/pe.h	/^	uint16_t MinorImageVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
MinorImageVersion	include/pe.h	/^	uint16_t MinorImageVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
MinorLinkerVersion	include/pe.h	/^	uint8_t  MinorLinkerVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint8_t
MinorLinkerVersion	include/pe.h	/^	uint8_t  MinorLinkerVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint8_t
MinorOperatingSystemVersion	include/pe.h	/^	uint16_t MinorOperatingSystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
MinorOperatingSystemVersion	include/pe.h	/^	uint16_t MinorOperatingSystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
MinorSubsystemVersion	include/pe.h	/^	uint16_t MinorSubsystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
MinorSubsystemVersion	include/pe.h	/^	uint16_t MinorSubsystemVersion;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
MinorVersion	drivers/usb/gadget/rndis.h	/^	__le32	MinorVersion;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
MinorVersion	drivers/usb/gadget/rndis.h	/^	__le32	MinorVersion;$/;"	m	struct:rndis_init_msg_type	typeref:typename:__le32
Misc	include/pe.h	/^	} Misc;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:union:_IMAGE_SECTION_HEADER::__anon69e06b43010a
Misc commands	cmd/Kconfig	/^menu "Misc commands"$/;"	m	menu:Command line interface
Mkdir	tools/buildman/builderthread.py	/^def Mkdir(dirname, parents = False):$/;"	f
Mode1000	drivers/net/ns8382x.c	/^	Mode1000 = 0x00400000,$/;"	e	enum:ChipConfigBits	file:
MultiIntr	drivers/net/rtl8139.c	/^	MultiIntr=0x5C,$/;"	e	enum:RTL8139_registers	file:
MultiIntr	drivers/net/rtl8169.c	/^	MultiIntr = 0x5C,$/;"	e	enum:RTL8169_registers	file:
Multifunction device drivers	drivers/misc/Kconfig	/^menu "Multifunction device drivers"$/;"	m
MxMR_AMx_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_AMx_MSK	/;"	d
MxMR_AMx_MSK	include/mpc8260.h	/^#define MxMR_AMx_MSK	/;"	d
MxMR_AMx_TYPE_0	include/mpc8260.h	/^#define MxMR_AMx_TYPE_0 /;"	d
MxMR_AMx_TYPE_1	include/mpc8260.h	/^#define MxMR_AMx_TYPE_1 /;"	d
MxMR_AMx_TYPE_2	include/mpc8260.h	/^#define MxMR_AMx_TYPE_2 /;"	d
MxMR_AMx_TYPE_3	include/mpc8260.h	/^#define MxMR_AMx_TYPE_3 /;"	d
MxMR_AMx_TYPE_4	include/mpc8260.h	/^#define MxMR_AMx_TYPE_4 /;"	d
MxMR_AMx_TYPE_5	include/mpc8260.h	/^#define MxMR_AMx_TYPE_5 /;"	d
MxMR_BSEL	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_BSEL	/;"	d
MxMR_BSEL	include/mpc8260.h	/^#define MxMR_BSEL	/;"	d
MxMR_DSx_1_CYCL	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_DSx_1_CYCL	/;"	d
MxMR_DSx_1_CYCL	include/mpc8260.h	/^#define MxMR_DSx_1_CYCL /;"	d
MxMR_DSx_2_CYCL	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_DSx_2_CYCL	/;"	d
MxMR_DSx_2_CYCL	include/mpc8260.h	/^#define MxMR_DSx_2_CYCL /;"	d
MxMR_DSx_3_CYCL	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_DSx_3_CYCL	/;"	d
MxMR_DSx_3_CYCL	include/mpc8260.h	/^#define MxMR_DSx_3_CYCL /;"	d
MxMR_DSx_4_CYCL	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_DSx_4_CYCL	/;"	d
MxMR_DSx_4_CYCL	include/mpc8260.h	/^#define MxMR_DSx_4_CYCL /;"	d
MxMR_DSx_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_DSx_MSK	/;"	d
MxMR_DSx_MSK	include/mpc8260.h	/^#define MxMR_DSx_MSK	/;"	d
MxMR_G0CLx_A10	include/mpc8260.h	/^#define MxMR_G0CLx_A10	/;"	d
MxMR_G0CLx_A11	include/mpc8260.h	/^#define MxMR_G0CLx_A11	/;"	d
MxMR_G0CLx_A12	include/mpc8260.h	/^#define MxMR_G0CLx_A12	/;"	d
MxMR_G0CLx_A5	include/mpc8260.h	/^#define MxMR_G0CLx_A5	/;"	d
MxMR_G0CLx_A6	include/mpc8260.h	/^#define MxMR_G0CLx_A6	/;"	d
MxMR_G0CLx_A7	include/mpc8260.h	/^#define MxMR_G0CLx_A7	/;"	d
MxMR_G0CLx_A8	include/mpc8260.h	/^#define MxMR_G0CLx_A8	/;"	d
MxMR_G0CLx_A9	include/mpc8260.h	/^#define MxMR_G0CLx_A9	/;"	d
MxMR_G0CLx_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_G0CLx_MSK	/;"	d
MxMR_G0CLx_MSK	include/mpc8260.h	/^#define MxMR_G0CLx_MSK	/;"	d
MxMR_GPL_x4DIS	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_GPL_x4DIS	/;"	d
MxMR_GPL_x4DIS	include/mpc8260.h	/^#define MxMR_GPL_x4DIS	/;"	d
MxMR_MAD_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_MAD_MSK	/;"	d
MxMR_MAD_MSK	include/mpc8260.h	/^#define MxMR_MAD_MSK	/;"	d
MxMR_OP_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_OP_MSK	/;"	d
MxMR_OP_MSK	include/mpc8260.h	/^#define MxMR_OP_MSK	/;"	d
MxMR_OP_NORM	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_OP_NORM	/;"	d
MxMR_OP_NORM	include/mpc8260.h	/^#define MxMR_OP_NORM	/;"	d
MxMR_OP_RARR	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_OP_RARR	/;"	d
MxMR_OP_RARR	include/mpc8260.h	/^#define MxMR_OP_RARR	/;"	d
MxMR_OP_RUNP	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_OP_RUNP	/;"	d
MxMR_OP_RUNP	include/mpc8260.h	/^#define MxMR_OP_RUNP	/;"	d
MxMR_OP_WARR	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_OP_WARR	/;"	d
MxMR_OP_WARR	include/mpc8260.h	/^#define MxMR_OP_WARR	/;"	d
MxMR_RFEN	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_RFEN	/;"	d
MxMR_RFEN	include/mpc8260.h	/^#define MxMR_RFEN	/;"	d
MxMR_RLFx_10X	include/mpc8260.h	/^#define MxMR_RLFx_10X	/;"	d
MxMR_RLFx_11X	include/mpc8260.h	/^#define MxMR_RLFx_11X	/;"	d
MxMR_RLFx_12X	include/mpc8260.h	/^#define MxMR_RLFx_12X	/;"	d
MxMR_RLFx_13X	include/mpc8260.h	/^#define MxMR_RLFx_13X	/;"	d
MxMR_RLFx_14X	include/mpc8260.h	/^#define MxMR_RLFx_14X	/;"	d
MxMR_RLFx_15X	include/mpc8260.h	/^#define MxMR_RLFx_15X	/;"	d
MxMR_RLFx_16X	include/mpc8260.h	/^#define MxMR_RLFx_16X	/;"	d
MxMR_RLFx_1X	include/mpc8260.h	/^#define MxMR_RLFx_1X	/;"	d
MxMR_RLFx_2X	include/mpc8260.h	/^#define MxMR_RLFx_2X	/;"	d
MxMR_RLFx_3X	include/mpc8260.h	/^#define MxMR_RLFx_3X	/;"	d
MxMR_RLFx_4X	include/mpc8260.h	/^#define MxMR_RLFx_4X	/;"	d
MxMR_RLFx_5X	include/mpc8260.h	/^#define MxMR_RLFx_5X	/;"	d
MxMR_RLFx_6X	include/mpc8260.h	/^#define MxMR_RLFx_6X	/;"	d
MxMR_RLFx_7X	include/mpc8260.h	/^#define MxMR_RLFx_7X	/;"	d
MxMR_RLFx_8X	include/mpc8260.h	/^#define MxMR_RLFx_8X	/;"	d
MxMR_RLFx_9X	include/mpc8260.h	/^#define MxMR_RLFx_9X	/;"	d
MxMR_RLFx_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_RLFx_MSK	/;"	d
MxMR_RLFx_MSK	include/mpc8260.h	/^#define MxMR_RLFx_MSK	/;"	d
MxMR_TLFx_10X	include/mpc8260.h	/^#define MxMR_TLFx_10X	/;"	d
MxMR_TLFx_11X	include/mpc8260.h	/^#define MxMR_TLFx_11X	/;"	d
MxMR_TLFx_12X	include/mpc8260.h	/^#define MxMR_TLFx_12X	/;"	d
MxMR_TLFx_13X	include/mpc8260.h	/^#define MxMR_TLFx_13X	/;"	d
MxMR_TLFx_14X	include/mpc8260.h	/^#define MxMR_TLFx_14X	/;"	d
MxMR_TLFx_15X	include/mpc8260.h	/^#define MxMR_TLFx_15X	/;"	d
MxMR_TLFx_16X	include/mpc8260.h	/^#define MxMR_TLFx_16X	/;"	d
MxMR_TLFx_1X	include/mpc8260.h	/^#define MxMR_TLFx_1X	/;"	d
MxMR_TLFx_2X	include/mpc8260.h	/^#define MxMR_TLFx_2X	/;"	d
MxMR_TLFx_3X	include/mpc8260.h	/^#define MxMR_TLFx_3X	/;"	d
MxMR_TLFx_4X	include/mpc8260.h	/^#define MxMR_TLFx_4X	/;"	d
MxMR_TLFx_5X	include/mpc8260.h	/^#define MxMR_TLFx_5X	/;"	d
MxMR_TLFx_6X	include/mpc8260.h	/^#define MxMR_TLFx_6X	/;"	d
MxMR_TLFx_7X	include/mpc8260.h	/^#define MxMR_TLFx_7X	/;"	d
MxMR_TLFx_8X	include/mpc8260.h	/^#define MxMR_TLFx_8X	/;"	d
MxMR_TLFx_9X	include/mpc8260.h	/^#define MxMR_TLFx_9X	/;"	d
MxMR_TLFx_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_TLFx_MSK	/;"	d
MxMR_TLFx_MSK	include/mpc8260.h	/^#define MxMR_TLFx_MSK	/;"	d
MxMR_UWPL	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_UWPL	/;"	d
MxMR_WLFx_10X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_10X	/;"	d
MxMR_WLFx_10X	include/mpc8260.h	/^#define MxMR_WLFx_10X	/;"	d
MxMR_WLFx_11X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_11X	/;"	d
MxMR_WLFx_11X	include/mpc8260.h	/^#define MxMR_WLFx_11X	/;"	d
MxMR_WLFx_12X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_12X	/;"	d
MxMR_WLFx_12X	include/mpc8260.h	/^#define MxMR_WLFx_12X	/;"	d
MxMR_WLFx_13X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_13X	/;"	d
MxMR_WLFx_13X	include/mpc8260.h	/^#define MxMR_WLFx_13X	/;"	d
MxMR_WLFx_14X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_14X	/;"	d
MxMR_WLFx_14X	include/mpc8260.h	/^#define MxMR_WLFx_14X	/;"	d
MxMR_WLFx_15X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_15X	/;"	d
MxMR_WLFx_15X	include/mpc8260.h	/^#define MxMR_WLFx_15X	/;"	d
MxMR_WLFx_16X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_16X	/;"	d
MxMR_WLFx_16X	include/mpc8260.h	/^#define MxMR_WLFx_16X	/;"	d
MxMR_WLFx_1X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_1X	/;"	d
MxMR_WLFx_1X	include/mpc8260.h	/^#define MxMR_WLFx_1X	/;"	d
MxMR_WLFx_2X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_2X	/;"	d
MxMR_WLFx_2X	include/mpc8260.h	/^#define MxMR_WLFx_2X	/;"	d
MxMR_WLFx_3X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_3X	/;"	d
MxMR_WLFx_3X	include/mpc8260.h	/^#define MxMR_WLFx_3X	/;"	d
MxMR_WLFx_4X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_4X	/;"	d
MxMR_WLFx_4X	include/mpc8260.h	/^#define MxMR_WLFx_4X	/;"	d
MxMR_WLFx_5X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_5X	/;"	d
MxMR_WLFx_5X	include/mpc8260.h	/^#define MxMR_WLFx_5X	/;"	d
MxMR_WLFx_6X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_6X	/;"	d
MxMR_WLFx_6X	include/mpc8260.h	/^#define MxMR_WLFx_6X	/;"	d
MxMR_WLFx_7X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_7X	/;"	d
MxMR_WLFx_7X	include/mpc8260.h	/^#define MxMR_WLFx_7X	/;"	d
MxMR_WLFx_8X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_8X	/;"	d
MxMR_WLFx_8X	include/mpc8260.h	/^#define MxMR_WLFx_8X	/;"	d
MxMR_WLFx_9X	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_9X	/;"	d
MxMR_WLFx_9X	include/mpc8260.h	/^#define MxMR_WLFx_9X	/;"	d
MxMR_WLFx_MSK	arch/powerpc/include/asm/fsl_lbc.h	/^#define MxMR_WLFx_MSK	/;"	d
MxMR_WLFx_MSK	include/mpc8260.h	/^#define MxMR_WLFx_MSK	/;"	d
MyHTMLParser	tools/buildman/toolchain.py	/^class MyHTMLParser(HTMLParser):$/;"	c
MyOperation	tools/patman/cros_subprocess.py	/^    class MyOperation:$/;"	c	class:TestSubprocess
N	arch/arm/mach-snapdragon/clock-apq8016.c	/^	uintptr_t N;$/;"	m	struct:bcr_regs	typeref:typename:uintptr_t	file:
NA	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define NA	/;"	d
NACK_TYPE	cmd/load.c	/^#define NACK_TYPE /;"	d	file:
NAK	common/xyzModem.c	/^#define NAK /;"	d	file:
NAK	tools/kwboot.c	/^#define NAK	/;"	d	file:
NAK_BITMASK	include/usb/mpc8xx_udc.h	/^#define NAK_BITMASK /;"	d
NAK_TIMEOUT_H	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define NAK_TIMEOUT_H	/;"	d
NAK_TIMEOUT_TH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define NAK_TIMEOUT_TH	/;"	d
NAME	Makefile	/^NAME =$/;"	m
NAME	doc/kwboot.1	/^.SH NAME$/;"	s	title:KWBOOT
NAME	doc/mkimage.1	/^.SH NAME$/;"	s	title:MKIMAGE
NAME	lib/zlib/inflate.h	/^    NAME,       \/* i: waiting for end of file name (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
NAME_GREATER	fs/ubifs/tnc.c	/^	NAME_GREATER = 2,$/;"	e	enum:__anonbf88c1eb0103	file:
NAME_LESS	fs/ubifs/tnc.c	/^	NAME_LESS    = 0,$/;"	e	enum:__anonbf88c1eb0103	file:
NAME_MATCHES	fs/ubifs/tnc.c	/^	NAME_MATCHES = 1,$/;"	e	enum:__anonbf88c1eb0103	file:
NAME_MAX	fs/yaffs2/yaffsfs.h	/^#define NAME_MAX	/;"	d
NAME_STATE	lib/zlib/deflate.h	/^#define NAME_STATE /;"	d
NAND Device Support	drivers/mtd/nand/Kconfig	/^menu "NAND Device Support"$/;"	m
NANDARGS	include/configs/am335x_evm.h	/^#define NANDARGS /;"	d
NANDARGS	include/configs/am43xx_evm.h	/^#define NANDARGS /;"	d
NANDARGS	include/configs/am43xx_evm.h	/^#define NANDARGS$/;"	d
NANDARGS	include/configs/baltos.h	/^#define NANDARGS /;"	d
NANDARGS	include/configs/bav335x.h	/^#define NANDARGS /;"	d
NANDARGS	include/configs/brppt1.h	/^#define NANDARGS /;"	d
NANDARGS	include/configs/cm_t335.h	/^#define NANDARGS /;"	d
NANDBOOT	include/configs/am43xx_evm.h	/^#define NANDBOOT	/;"	d
NANDBOOT	include/configs/am43xx_evm.h	/^#define NANDBOOT$/;"	d
NAND_4BITECC_MASK	drivers/mtd/nand/davinci_nand.c	/^#define NAND_4BITECC_MASK	/;"	d	file:
NAND_ACTCEBOOT_BIT	drivers/mtd/nand/kirkwood_nand.c	/^#define NAND_ACTCEBOOT_BIT	/;"	d	file:
NAND_ADDR_CYCL_BOTH	drivers/mtd/nand/arasan_nfc.c	/^	NAND_ADDR_CYCL_BOTH,$/;"	e	enum:addr_cycles	file:
NAND_ADDR_CYCL_COL	drivers/mtd/nand/arasan_nfc.c	/^	NAND_ADDR_CYCL_COL,$/;"	e	enum:addr_cycles	file:
NAND_ADDR_CYCL_NONE	drivers/mtd/nand/arasan_nfc.c	/^	NAND_ADDR_CYCL_NONE,$/;"	e	enum:addr_cycles	file:
NAND_ADDR_CYCL_ONE	drivers/mtd/nand/arasan_nfc.c	/^	NAND_ADDR_CYCL_ONE,$/;"	e	enum:addr_cycles	file:
NAND_ADDR_CYCL_ROW	drivers/mtd/nand/arasan_nfc.c	/^	NAND_ADDR_CYCL_ROW,$/;"	e	enum:addr_cycles	file:
NAND_ALE	include/linux/mtd/nand.h	/^#define NAND_ALE	/;"	d
NAND_ALLOW_ERASE_ALL	arch/arm/mach-kirkwood/include/mach/config.h	/^#define NAND_ALLOW_ERASE_ALL	/;"	d
NAND_ALLOW_ERASE_ALL	include/configs/M5329EVB.h	/^#	define NAND_ALLOW_ERASE_ALL	/;"	d
NAND_ALLOW_ERASE_ALL	include/configs/M5373EVB.h	/^#	define NAND_ALLOW_ERASE_ALL	/;"	d
NAND_ARASAN	drivers/mtd/nand/Kconfig	/^config NAND_ARASAN$/;"	c	menu:NAND Device Support
NAND_ARBITER_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define NAND_ARBITER_EN	/;"	d
NAND_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define NAND_BASE	/;"	d
NAND_BBT_1BIT	include/linux/mtd/bbm.h	/^#define NAND_BBT_1BIT	/;"	d
NAND_BBT_2BIT	include/linux/mtd/bbm.h	/^#define NAND_BBT_2BIT	/;"	d
NAND_BBT_4BIT	include/linux/mtd/bbm.h	/^#define NAND_BBT_4BIT	/;"	d
NAND_BBT_8BIT	include/linux/mtd/bbm.h	/^#define NAND_BBT_8BIT	/;"	d
NAND_BBT_ABSPAGE	include/linux/mtd/bbm.h	/^#define NAND_BBT_ABSPAGE	/;"	d
NAND_BBT_CREATE	include/linux/mtd/bbm.h	/^#define NAND_BBT_CREATE	/;"	d
NAND_BBT_CREATE_EMPTY	include/linux/mtd/bbm.h	/^#define NAND_BBT_CREATE_EMPTY	/;"	d
NAND_BBT_DYNAMICSTRUCT	include/linux/mtd/bbm.h	/^#define NAND_BBT_DYNAMICSTRUCT	/;"	d
NAND_BBT_LASTBLOCK	include/linux/mtd/bbm.h	/^#define NAND_BBT_LASTBLOCK	/;"	d
NAND_BBT_NO_OOB	include/linux/mtd/bbm.h	/^#define NAND_BBT_NO_OOB	/;"	d
NAND_BBT_NO_OOB_BBM	include/linux/mtd/bbm.h	/^#define NAND_BBT_NO_OOB_BBM	/;"	d
NAND_BBT_NRBITS_MSK	include/linux/mtd/bbm.h	/^#define NAND_BBT_NRBITS_MSK	/;"	d
NAND_BBT_PERCHIP	include/linux/mtd/bbm.h	/^#define NAND_BBT_PERCHIP	/;"	d
NAND_BBT_SAVECONTENT	include/linux/mtd/bbm.h	/^#define NAND_BBT_SAVECONTENT	/;"	d
NAND_BBT_SCAN2NDPAGE	include/linux/mtd/bbm.h	/^#define NAND_BBT_SCAN2NDPAGE	/;"	d
NAND_BBT_SCANLASTPAGE	include/linux/mtd/bbm.h	/^#define NAND_BBT_SCANLASTPAGE	/;"	d
NAND_BBT_SCANNED	include/linux/mtd/nand.h	/^#define NAND_BBT_SCANNED	/;"	d
NAND_BBT_SCAN_MAXBLOCKS	include/linux/mtd/bbm.h	/^#define NAND_BBT_SCAN_MAXBLOCKS	/;"	d
NAND_BBT_USE_FLASH	include/linux/mtd/bbm.h	/^#define NAND_BBT_USE_FLASH	/;"	d
NAND_BBT_VERSION	include/linux/mtd/bbm.h	/^#define NAND_BBT_VERSION	/;"	d
NAND_BBT_WRITE	include/linux/mtd/bbm.h	/^#define NAND_BBT_WRITE	/;"	d
NAND_BIG_DELAY_US	include/configs/PLU405.h	/^#define NAND_BIG_DELAY_US	/;"	d
NAND_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	NAND_BOOT,$/;"	e	enum:boot_device
NAND_BOOT	common/Kconfig	/^config NAND_BOOT$/;"	c	menu:Boot media
NAND_BOOT_SUPPORTED	include/configs/x600.h	/^#define NAND_BOOT_SUPPORTED	/;"	d
NAND_BROKEN_XD	include/linux/mtd/nand.h	/^#define NAND_BROKEN_XD	/;"	d
NAND_BUSWIDTH_16	include/linux/mtd/nand.h	/^#define NAND_BUSWIDTH_16	/;"	d
NAND_BUSWIDTH_AUTO	include/linux/mtd/nand.h	/^#define NAND_BUSWIDTH_AUTO /;"	d
NAND_CACHEPRG	include/linux/mtd/nand.h	/^#define NAND_CACHEPRG	/;"	d
NAND_CACHE_PAGES	fs/jffs2/jffs2_1pass.c	/^#define NAND_CACHE_PAGES /;"	d	file:
NAND_CACHE_PAGES	include/configs/ids8313.h	/^#define NAND_CACHE_PAGES	/;"	d
NAND_CACHE_SIZE	fs/jffs2/jffs2_1pass.c	/^#define NAND_CACHE_SIZE /;"	d	file:
NAND_CI_CELLTYPE_MSK	include/linux/mtd/nand.h	/^#define NAND_CI_CELLTYPE_MSK	/;"	d
NAND_CI_CELLTYPE_SHIFT	include/linux/mtd/nand.h	/^#define NAND_CI_CELLTYPE_SHIFT	/;"	d
NAND_CI_CHIPNR_MSK	include/linux/mtd/nand.h	/^#define NAND_CI_CHIPNR_MSK	/;"	d
NAND_CLE	include/linux/mtd/nand.h	/^#define NAND_CLE	/;"	d
NAND_CLK_DIV_M	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define NAND_CLK_DIV_M	/;"	d
NAND_CLK_DIV_M	arch/arm/include/asm/arch/clock_sun4i.h	/^#define NAND_CLK_DIV_M	/;"	d
NAND_CLK_DIV_N	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define NAND_CLK_DIV_N	/;"	d
NAND_CLK_DIV_N	arch/arm/include/asm/arch/clock_sun4i.h	/^#define NAND_CLK_DIV_N	/;"	d
NAND_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	NAND_CLK_ROOT = 84,$/;"	e	enum:clk_root_index
NAND_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
NAND_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
NAND_CLK_SRC_OSC24	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define NAND_CLK_SRC_OSC24	/;"	d
NAND_CLK_SRC_OSC24	arch/arm/include/asm/arch/clock_sun4i.h	/^#define NAND_CLK_SRC_OSC24	/;"	d
NAND_CMD_CACHEDPROG	include/linux/mtd/nand.h	/^#define NAND_CMD_CACHEDPROG	/;"	d
NAND_CMD_DEPLETE1	include/linux/mtd/nand.h	/^#define NAND_CMD_DEPLETE1	/;"	d
NAND_CMD_DEPLETE2	include/linux/mtd/nand.h	/^#define NAND_CMD_DEPLETE2	/;"	d
NAND_CMD_ERASE1	include/linux/mtd/nand.h	/^#define NAND_CMD_ERASE1	/;"	d
NAND_CMD_ERASE2	include/linux/mtd/nand.h	/^#define NAND_CMD_ERASE2	/;"	d
NAND_CMD_GET_FEATURES	include/linux/mtd/nand.h	/^#define NAND_CMD_GET_FEATURES	/;"	d
NAND_CMD_LOCK	include/linux/mtd/nand.h	/^#define NAND_CMD_LOCK	/;"	d
NAND_CMD_LOCK_STATUS	drivers/mtd/nand/nand_util.c	/^#define NAND_CMD_LOCK_STATUS /;"	d	file:
NAND_CMD_LOCK_TIGHT	drivers/mtd/nand/nand_util.c	/^#define NAND_CMD_LOCK_TIGHT /;"	d	file:
NAND_CMD_NONE	include/linux/mtd/nand.h	/^#define NAND_CMD_NONE	/;"	d
NAND_CMD_PAGEPROG	include/linux/mtd/nand.h	/^#define NAND_CMD_PAGEPROG	/;"	d
NAND_CMD_PARAM	include/linux/mtd/nand.h	/^#define NAND_CMD_PARAM	/;"	d
NAND_CMD_READ0	include/linux/mtd/nand.h	/^#define NAND_CMD_READ0	/;"	d
NAND_CMD_READ1	include/linux/mtd/nand.h	/^#define NAND_CMD_READ1	/;"	d
NAND_CMD_READID	include/linux/mtd/nand.h	/^#define NAND_CMD_READID	/;"	d
NAND_CMD_READOOB	include/linux/mtd/nand.h	/^#define NAND_CMD_READOOB	/;"	d
NAND_CMD_READSTART	include/linux/mtd/nand.h	/^#define NAND_CMD_READSTART	/;"	d
NAND_CMD_RESET	include/linux/mtd/nand.h	/^#define NAND_CMD_RESET	/;"	d
NAND_CMD_RNDIN	include/linux/mtd/nand.h	/^#define NAND_CMD_RNDIN	/;"	d
NAND_CMD_RNDOUT	include/linux/mtd/nand.h	/^#define NAND_CMD_RNDOUT	/;"	d
NAND_CMD_RNDOUTSTART	include/linux/mtd/nand.h	/^#define NAND_CMD_RNDOUTSTART	/;"	d
NAND_CMD_SEQIN	include/linux/mtd/nand.h	/^#define NAND_CMD_SEQIN	/;"	d
NAND_CMD_SET_FEATURES	include/linux/mtd/nand.h	/^#define NAND_CMD_SET_FEATURES	/;"	d
NAND_CMD_STATUS	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS	/;"	d
NAND_CMD_STATUS_CLEAR	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_CLEAR	/;"	d
NAND_CMD_STATUS_ERROR	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_ERROR	/;"	d
NAND_CMD_STATUS_ERROR0	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_ERROR0	/;"	d
NAND_CMD_STATUS_ERROR1	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_ERROR1	/;"	d
NAND_CMD_STATUS_ERROR2	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_ERROR2	/;"	d
NAND_CMD_STATUS_ERROR3	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_ERROR3	/;"	d
NAND_CMD_STATUS_MULTI	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_MULTI	/;"	d
NAND_CMD_STATUS_RESET	include/linux/mtd/nand.h	/^#define NAND_CMD_STATUS_RESET	/;"	d
NAND_CMD_TIMEOUT_MS	drivers/mtd/nand/tegra_nand.c	/^#define NAND_CMD_TIMEOUT_MS	/;"	d	file:
NAND_CMD_UNLOCK1	include/linux/mtd/nand.h	/^#define NAND_CMD_UNLOCK1	/;"	d
NAND_CMD_UNLOCK2	include/linux/mtd/nand.h	/^#define NAND_CMD_UNLOCK2	/;"	d
NAND_CONTROLLER_ALLOC	include/linux/mtd/nand.h	/^#define NAND_CONTROLLER_ALLOC	/;"	d
NAND_COPYBACK	include/linux/mtd/nand.h	/^#define NAND_COPYBACK	/;"	d
NAND_CTRL_ALE	include/linux/mtd/nand.h	/^#define NAND_CTRL_ALE	/;"	d
NAND_CTRL_CHANGE	include/linux/mtd/nand.h	/^#define NAND_CTRL_CHANGE	/;"	d
NAND_CTRL_CLE	include/linux/mtd/nand.h	/^#define NAND_CTRL_CLE	/;"	d
NAND_DEFAULT_TIMINGS	drivers/mtd/nand/denali.c	/^#define NAND_DEFAULT_TIMINGS	/;"	d	file:
NAND_DENALI	drivers/mtd/nand/Kconfig	/^config NAND_DENALI$/;"	c	menu:NAND Device Support
NAND_DENALI_SPARE_AREA_SKIP_BYTES	drivers/mtd/nand/Kconfig	/^config NAND_DENALI_SPARE_AREA_SKIP_BYTES$/;"	c	menu:NAND Device Support
NAND_ECC_BUSY	drivers/mtd/nand/davinci_nand.c	/^#define NAND_ECC_BUSY	/;"	d	file:
NAND_ECC_DIVCKL_RATIO_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define NAND_ECC_DIVCKL_RATIO_MASK	/;"	d
NAND_ECC_DIVCKL_RATIO_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define NAND_ECC_DIVCKL_RATIO_OFFS	/;"	d
NAND_ECC_GENERIC_ERASED_CHECK	include/linux/mtd/nand.h	/^#define NAND_ECC_GENERIC_ERASED_CHECK	/;"	d
NAND_ECC_HW	include/linux/mtd/nand.h	/^	NAND_ECC_HW,$/;"	e	enum:__anon4f3885c20103
NAND_ECC_HW_OOB_FIRST	include/linux/mtd/nand.h	/^	NAND_ECC_HW_OOB_FIRST,$/;"	e	enum:__anon4f3885c20103
NAND_ECC_HW_SYNDROME	include/linux/mtd/nand.h	/^	NAND_ECC_HW_SYNDROME,$/;"	e	enum:__anon4f3885c20103
NAND_ECC_INFO	include/linux/mtd/nand.h	/^#define NAND_ECC_INFO(/;"	d
NAND_ECC_NONE	include/linux/mtd/nand.h	/^	NAND_ECC_NONE,$/;"	e	enum:__anon4f3885c20103
NAND_ECC_READ	include/linux/mtd/nand.h	/^#define NAND_ECC_READ	/;"	d
NAND_ECC_READSYN	include/linux/mtd/nand.h	/^#define NAND_ECC_READSYN	/;"	d
NAND_ECC_SOFT	include/linux/mtd/nand.h	/^	NAND_ECC_SOFT,$/;"	e	enum:__anon4f3885c20103
NAND_ECC_SOFT_BCH	include/linux/mtd/nand.h	/^	NAND_ECC_SOFT_BCH,$/;"	e	enum:__anon4f3885c20103
NAND_ECC_STEP	include/linux/mtd/nand.h	/^#define NAND_ECC_STEP(/;"	d
NAND_ECC_STRENGTH	include/linux/mtd/nand.h	/^#define NAND_ECC_STRENGTH(/;"	d
NAND_ECC_WRITE	include/linux/mtd/nand.h	/^#define NAND_ECC_WRITE	/;"	d
NAND_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define NAND_EN	/;"	d
NAND_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^# define NAND_ENV_SETTINGS /;"	d
NAND_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^# define NAND_ENV_SETTINGS$/;"	d
NAND_ENV_SETTINGS	include/configs/br4.h	/^#define NAND_ENV_SETTINGS /;"	d
NAND_ENV_SETTINGS	include/configs/pr1.h	/^#define NAND_ENV_SETTINGS /;"	d
NAND_FLASH	board/amcc/bamboo/bamboo.h	/^			    NAND_FLASH,$/;"	e	enum:config_list
NAND_GET_DEVICE	include/linux/mtd/nand.h	/^#define NAND_GET_DEVICE	/;"	d
NAND_HAS_CACHEPROG	include/linux/mtd/nand.h	/^#define NAND_HAS_CACHEPROG(/;"	d
NAND_HAS_SUBPAGE_READ	include/linux/mtd/nand.h	/^#define NAND_HAS_SUBPAGE_READ(/;"	d
NAND_ISR_CMDAVAILABLE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_CMDAVAILABLE,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_CMDDONE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_CMDDONE,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_CMDERROR	board/synopsys/axs10x/nand.c	/^	NAND_ISR_CMDERROR,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_DATAAVAILABLE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_DATAAVAILABLE,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_DATAREQUIRED	board/synopsys/axs10x/nand.c	/^	NAND_ISR_DATAREQUIRED = 0,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_DATATRANSFEROVER	board/synopsys/axs10x/nand.c	/^	NAND_ISR_DATATRANSFEROVER,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_DESCRIPTORUNAVAILABLE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_DESCRIPTORUNAVAILABLE,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_NONE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_NONE$/;"	e	enum:nand_isr_t	file:
NAND_ISR_RXDMACOMPLETE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_RXDMACOMPLETE,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_RXOVERFLOW	board/synopsys/axs10x/nand.c	/^	NAND_ISR_RXOVERFLOW,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_RXUNDERFLOW	board/synopsys/axs10x/nand.c	/^	NAND_ISR_RXUNDERFLOW,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_TXDMACOMPLETE	board/synopsys/axs10x/nand.c	/^	NAND_ISR_TXDMACOMPLETE,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_TXOVERFLOW	board/synopsys/axs10x/nand.c	/^	NAND_ISR_TXOVERFLOW,$/;"	e	enum:nand_isr_t	file:
NAND_ISR_TXUNDERFLOW	board/synopsys/axs10x/nand.c	/^	NAND_ISR_TXUNDERFLOW,$/;"	e	enum:nand_isr_t	file:
NAND_IS_512	drivers/mtd/nand/bfin_nand.c	/^#define NAND_IS_512(/;"	d	file:
NAND_LARGE_BADBLOCK_POS	include/linux/mtd/bbm.h	/^#define NAND_LARGE_BADBLOCK_POS	/;"	d
NAND_LARGE_BADBLOCK_POS	include/linux/mtd/nand.h	/^#define NAND_LARGE_BADBLOCK_POS	/;"	d
NAND_LARGE_BLOCK_PAGE_SIZE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define NAND_LARGE_BLOCK_PAGE_SIZE	/;"	d
NAND_LOCK_STATUS_TIGHT	include/nand.h	/^#define NAND_LOCK_STATUS_TIGHT	/;"	d
NAND_LOCK_STATUS_UNLOCK	include/nand.h	/^#define NAND_LOCK_STATUS_UNLOCK /;"	d
NAND_MAX_CHIPS	include/configs/M54418TWR.h	/^#define NAND_MAX_CHIPS	/;"	d
NAND_MAX_CHIPS	include/configs/apf27.h	/^#define NAND_MAX_CHIPS	/;"	d
NAND_MAX_CHIPS	include/configs/km8360.h	/^#define NAND_MAX_CHIPS	/;"	d
NAND_MAX_CHIPS	include/configs/omapl138_lcdk.h	/^#define NAND_MAX_CHIPS	/;"	d
NAND_MAX_CHIPS	include/configs/s32v234evb.h	/^#define NAND_MAX_CHIPS	/;"	d
NAND_MAX_CHIPS	include/configs/suvd3.h	/^#define NAND_MAX_CHIPS	/;"	d
NAND_MAX_ID_LEN	include/linux/mtd/nand.h	/^#define NAND_MAX_ID_LEN /;"	d
NAND_MAX_OOBSIZE	include/linux/mtd/nand.h	/^#define NAND_MAX_OOBSIZE /;"	d
NAND_MAX_PAGESIZE	include/linux/mtd/nand.h	/^#define NAND_MAX_PAGESIZE /;"	d
NAND_MFR_AMD	include/linux/mtd/nand.h	/^#define NAND_MFR_AMD	/;"	d
NAND_MFR_ATO	include/linux/mtd/nand.h	/^#define NAND_MFR_ATO	/;"	d
NAND_MFR_EON	include/linux/mtd/nand.h	/^#define NAND_MFR_EON	/;"	d
NAND_MFR_FUJITSU	include/linux/mtd/nand.h	/^#define NAND_MFR_FUJITSU	/;"	d
NAND_MFR_HYNIX	include/linux/mtd/nand.h	/^#define NAND_MFR_HYNIX	/;"	d
NAND_MFR_INTEL	include/linux/mtd/nand.h	/^#define NAND_MFR_INTEL	/;"	d
NAND_MFR_MACRONIX	include/linux/mtd/nand.h	/^#define NAND_MFR_MACRONIX	/;"	d
NAND_MFR_MICRON	include/linux/mtd/nand.h	/^#define NAND_MFR_MICRON	/;"	d
NAND_MFR_NATIONAL	include/linux/mtd/nand.h	/^#define NAND_MFR_NATIONAL	/;"	d
NAND_MFR_RENESAS	include/linux/mtd/nand.h	/^#define NAND_MFR_RENESAS	/;"	d
NAND_MFR_SAMSUNG	include/linux/mtd/doc2000.h	/^#define NAND_MFR_SAMSUNG /;"	d
NAND_MFR_SAMSUNG	include/linux/mtd/nand.h	/^#define NAND_MFR_SAMSUNG	/;"	d
NAND_MFR_SANDISK	include/linux/mtd/nand.h	/^#define NAND_MFR_SANDISK	/;"	d
NAND_MFR_STMICRO	include/linux/mtd/nand.h	/^#define NAND_MFR_STMICRO	/;"	d
NAND_MFR_TOSHIBA	include/linux/mtd/doc2000.h	/^#define NAND_MFR_TOSHIBA /;"	d
NAND_MFR_TOSHIBA	include/linux/mtd/nand.h	/^#define NAND_MFR_TOSHIBA	/;"	d
NAND_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config NAND_MODE$/;"	c	choice:choice5ba020940104
NAND_MODE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define NAND_MODE	/;"	d
NAND_MXC_2K_MULTI_CYCLE	drivers/mtd/nand/mxc_nand.h	/^#define NAND_MXC_2K_MULTI_CYCLE$/;"	d
NAND_MXC_NR_BUFS	drivers/mtd/nand/mxc_nand.h	/^#define NAND_MXC_NR_BUFS	/;"	d
NAND_MXC_REG_OFFSET	drivers/mtd/nand/mxc_nand.h	/^#define NAND_MXC_REG_OFFSET	/;"	d
NAND_MXC_SPARE_BUF_SIZE	drivers/mtd/nand/mxc_nand.h	/^#define NAND_MXC_SPARE_BUF_SIZE	/;"	d
NAND_MXS	drivers/mtd/nand/Kconfig	/^config NAND_MXS$/;"	c	menu:NAND Device Support
NAND_NCE	include/linux/mtd/nand.h	/^#define NAND_NCE	/;"	d
NAND_NEED_READRDY	include/linux/mtd/nand.h	/^#define NAND_NEED_READRDY	/;"	d
NAND_NEED_SCRAMBLING	include/linux/mtd/nand.h	/^#define NAND_NEED_SCRAMBLING	/;"	d
NAND_NO_PADDING	include/linux/mtd/nand.h	/^#define NAND_NO_PADDING	/;"	d
NAND_NO_SUBPAGE_WRITE	include/linux/mtd/nand.h	/^#define NAND_NO_SUBPAGE_WRITE	/;"	d
NAND_OWN_BUFFERS	include/linux/mtd/nand.h	/^#define NAND_OWN_BUFFERS	/;"	d
NAND_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define NAND_PAD_CTRL /;"	d	file:
NAND_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define NAND_PAD_CTRL /;"	d	file:
NAND_PAD_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define NAND_PAD_CTRL /;"	d	file:
NAND_PAD_READY0_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define NAND_PAD_READY0_CTRL /;"	d	file:
NAND_PAD_READY0_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define NAND_PAD_READY0_CTRL /;"	d	file:
NAND_PAGE_MASK	fs/jffs2/jffs2_1pass.c	/^#define NAND_PAGE_MASK /;"	d	file:
NAND_PAGE_SHIFT	fs/jffs2/jffs2_1pass.c	/^#define NAND_PAGE_SHIFT /;"	d	file:
NAND_PAGE_SIZE	fs/jffs2/jffs2_1pass.c	/^#define NAND_PAGE_SIZE /;"	d	file:
NAND_PLAT_DEV_READY	drivers/mtd/nand/nand_plat.c	/^# define NAND_PLAT_DEV_READY(/;"	d	file:
NAND_PLAT_GPIO_DEV_READY	include/configs/bf537-pnav.h	/^#define NAND_PLAT_GPIO_DEV_READY /;"	d
NAND_PLAT_GPIO_DEV_READY	include/configs/bf537-stamp.h	/^#define NAND_PLAT_GPIO_DEV_READY /;"	d
NAND_PLAT_GPIO_DEV_READY	include/configs/bf561-acvilon.h	/^#define NAND_PLAT_GPIO_DEV_READY /;"	d
NAND_PLAT_GPIO_DEV_READY	include/configs/br4.h	/^#define NAND_PLAT_GPIO_DEV_READY /;"	d
NAND_PLAT_GPIO_DEV_READY	include/configs/ip04.h	/^#define NAND_PLAT_GPIO_DEV_READY /;"	d
NAND_PLAT_GPIO_DEV_READY	include/configs/pr1.h	/^#define NAND_PLAT_GPIO_DEV_READY /;"	d
NAND_PLAT_WRITE_ADR	include/configs/bf537-pnav.h	/^#define NAND_PLAT_WRITE_ADR(/;"	d
NAND_PLAT_WRITE_ADR	include/configs/bf537-stamp.h	/^#define NAND_PLAT_WRITE_ADR(/;"	d
NAND_PLAT_WRITE_ADR	include/configs/bf561-acvilon.h	/^#define NAND_PLAT_WRITE_ADR(/;"	d
NAND_PLAT_WRITE_ADR	include/configs/br4.h	/^#define NAND_PLAT_WRITE_ADR(/;"	d
NAND_PLAT_WRITE_ADR	include/configs/ip04.h	/^#define NAND_PLAT_WRITE_ADR(/;"	d
NAND_PLAT_WRITE_ADR	include/configs/pr1.h	/^#define NAND_PLAT_WRITE_ADR(/;"	d
NAND_PLAT_WRITE_CMD	include/configs/bf537-pnav.h	/^#define NAND_PLAT_WRITE_CMD(/;"	d
NAND_PLAT_WRITE_CMD	include/configs/bf537-stamp.h	/^#define NAND_PLAT_WRITE_CMD(/;"	d
NAND_PLAT_WRITE_CMD	include/configs/bf561-acvilon.h	/^#define NAND_PLAT_WRITE_CMD(/;"	d
NAND_PLAT_WRITE_CMD	include/configs/br4.h	/^#define NAND_PLAT_WRITE_CMD(/;"	d
NAND_PLAT_WRITE_CMD	include/configs/ip04.h	/^#define NAND_PLAT_WRITE_CMD(/;"	d
NAND_PLAT_WRITE_CMD	include/configs/pr1.h	/^#define NAND_PLAT_WRITE_CMD(/;"	d
NAND_PUP_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define NAND_PUP_EN	/;"	d
NAND_PXA3XX	drivers/mtd/nand/Kconfig	/^config NAND_PXA3XX$/;"	c	menu:NAND Device Support
NAND_READ_END	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define NAND_READ_END /;"	d
NAND_READ_START	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define NAND_READ_START /;"	d
NAND_REG_READ	board/synopsys/axs10x/nand.c	/^#define NAND_REG_READ(/;"	d	file:
NAND_REG_WRITE	board/synopsys/axs10x/nand.c	/^#define NAND_REG_WRITE(/;"	d	file:
NAND_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define NAND_RESET	/;"	d
NAND_ROM	include/linux/mtd/nand.h	/^#define NAND_ROM	/;"	d
NAND_SAMSUNG_LP_OPTIONS	include/linux/mtd/nand.h	/^#define NAND_SAMSUNG_LP_OPTIONS /;"	d
NAND_SCAN_SILENT_NODEV	include/linux/mtd/nand.h	/^#define NAND_SCAN_SILENT_NODEV	/;"	d
NAND_SKIP_BBTSCAN	include/linux/mtd/nand.h	/^#define NAND_SKIP_BBTSCAN	/;"	d
NAND_SMALL_BADBLOCK_POS	include/linux/mtd/bbm.h	/^#define NAND_SMALL_BADBLOCK_POS	/;"	d
NAND_SMALL_BADBLOCK_POS	include/linux/mtd/nand.h	/^#define NAND_SMALL_BADBLOCK_POS	/;"	d
NAND_SMALL_BLOCK_PAGE_SIZE	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define NAND_SMALL_BLOCK_PAGE_SIZE	/;"	d
NAND_STATUS	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define NAND_STATUS /;"	d
NAND_STATUS_FAIL	include/linux/mtd/nand.h	/^#define NAND_STATUS_FAIL	/;"	d
NAND_STATUS_FAIL_N1	include/linux/mtd/nand.h	/^#define NAND_STATUS_FAIL_N1	/;"	d
NAND_STATUS_READY	include/linux/mtd/nand.h	/^#define NAND_STATUS_READY	/;"	d
NAND_STATUS_TRUE_READY	include/linux/mtd/nand.h	/^#define NAND_STATUS_TRUE_READY	/;"	d
NAND_STATUS_WP	include/linux/mtd/nand.h	/^#define NAND_STATUS_WP	/;"	d
NAND_STOP_DELAY	drivers/mtd/nand/pxa3xx_nand.c	/^#define NAND_STOP_DELAY	/;"	d	file:
NAND_SUBPAGE_READ	include/linux/mtd/nand.h	/^#define NAND_SUBPAGE_READ	/;"	d
NAND_SUNXI	drivers/mtd/nand/Kconfig	/^config NAND_SUNXI$/;"	c	menu:NAND Device Support
NAND_TIMEOUT	drivers/mtd/nand/davinci_nand.c	/^#define NAND_TIMEOUT	/;"	d	file:
NAND_USDHC_BUS_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	NAND_USDHC_BUS_CLK_ROOT = 19,$/;"	e	enum:clk_root_index
NAND_USDHC_BUS_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define NAND_USDHC_BUS_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
NAND_USE_BOUNCE_BUFFER	include/linux/mtd/nand.h	/^#define NAND_USE_BOUNCE_BUFFER	/;"	d
NAND_VF610_NFC	drivers/mtd/nand/Kconfig	/^config NAND_VF610_NFC$/;"	c	menu:NAND Device Support
NANO_TO_MICRO	drivers/i2c/designware_i2c.h	/^#define NANO_TO_MICRO	/;"	d
NAS220_GE_OE_HIGH	include/configs/nas220.h	/^#define NAS220_GE_OE_HIGH /;"	d
NAS220_GE_OE_LOW	include/configs/nas220.h	/^#define NAS220_GE_OE_LOW /;"	d
NAS220_GE_OE_VAL_HIGH	include/configs/nas220.h	/^#define NAS220_GE_OE_VAL_HIGH /;"	d
NAS220_GE_OE_VAL_LOW	include/configs/nas220.h	/^#define NAS220_GE_OE_VAL_LOW /;"	d
NASA_EP32	include/ambapp_ids.h	/^#define NASA_EP32 /;"	d
NASA_devices	cmd/ambapp.c	/^static ambapp_device_name NASA_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
NAV	common/dlmalloc.c	/^#define NAV /;"	d	file:
NA_OR_UNKNOWN_CPU	arch/powerpc/include/asm/ppc4xx.h	/^#define NA_OR_UNKNOWN_CPU	/;"	d
NBBY	fs/zfs/zfs.c	/^#define	NBBY	/;"	d	file:
NBBY	fs/zfs/zfs_lzjb.c	/^#define	NBBY	/;"	d	file:
NBITS	include/lcd.h	/^#define NBITS(/;"	d
NBLK_STPCNT	arch/arm/include/asm/omap_mmc.h	/^#define NBLK_STPCNT	/;"	d
NBRSTOUT__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	NBRSTOUT__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
NBRST__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	NBRST__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
NBR_OF_PATTERNS	drivers/bootcount/bootcount_ram.c	/^const ulong NBR_OF_PATTERNS = sizeof(patterns) \/ sizeof(*patterns);$/;"	v	typeref:typename:const ulong
NBUF	drivers/net/mpc5xxx_fec.c	/^} NBUF;$/;"	t	typeref:struct:__anone13c4dc40108	file:
NBUSY	drivers/mtd/nand/bfin_nand.c	/^#define                     NBUSY /;"	d	file:
NBUSYIRQ	drivers/mtd/nand/bfin_nand.c	/^#define                  NBUSYIRQ /;"	d	file:
NBYTES	board/v38b/ethaddr.c	/^#define NBYTES /;"	d	file:
NBYTES	include/lcd.h	/^#define NBYTES(/;"	d
NB_DATAFLASH_AREA	include/dataflash.h	/^#define NB_DATAFLASH_AREA	/;"	d
NB_TOM	include/radeon.h	/^#define NB_TOM	/;"	d
NCGET	arch/microblaze/include/asm/asm.h	/^#define NCGET(/;"	d
NCHANNELS	include/MCD_dma.h	/^#define NCHANNELS	/;"	d
NCOLORS	include/lcd.h	/^#define NCOLORS(/;"	d
NCPUT	arch/microblaze/include/asm/asm.h	/^#define NCPUT(/;"	d
NCR_EXT_PHY	drivers/net/dm9000x.h	/^#define NCR_EXT_PHY	/;"	d
NCR_FCOL	drivers/net/dm9000x.h	/^#define NCR_FCOL	/;"	d
NCR_FDX	drivers/net/dm9000x.h	/^#define NCR_FDX	/;"	d
NCR_LBK	drivers/net/dm9000x.h	/^#define NCR_LBK	/;"	d
NCR_LBK_INT_MAC	drivers/net/dm9000x.h	/^#define NCR_LBK_INT_MAC	/;"	d
NCR_LBK_INT_PHY	drivers/net/dm9000x.h	/^#define NCR_LBK_INT_PHY	/;"	d
NCR_RST	drivers/net/dm9000x.h	/^#define NCR_RST	/;"	d
NCR_WAKEEN	drivers/net/dm9000x.h	/^#define NCR_WAKEEN	/;"	d
NCT6102D_IO_PORT	include/nuvoton_nct6102d.h	/^#define NCT6102D_IO_PORT	/;"	d
NCT6102D_LD_UARTA	include/nuvoton_nct6102d.h	/^#define NCT6102D_LD_UARTA	/;"	d
NCT6102D_LD_WDT	include/nuvoton_nct6102d.h	/^#define NCT6102D_LD_WDT	/;"	d
NCT6102D_UARTA_ENABLE	include/nuvoton_nct6102d.h	/^#define NCT6102D_UARTA_ENABLE	/;"	d
NCT6102D_WDT_TIMEOUT	include/nuvoton_nct6102d.h	/^#define NCT6102D_WDT_TIMEOUT	/;"	d
NCT_EFDR	include/nuvoton_nct6102d.h	/^#define NCT_EFDR /;"	d
NCT_EFER	include/nuvoton_nct6102d.h	/^#define NCT_EFER /;"	d
NCT_EFIR	include/nuvoton_nct6102d.h	/^#define NCT_EFIR /;"	d
NCT_ENTRY_KEY	include/nuvoton_nct6102d.h	/^#define NCT_ENTRY_KEY	/;"	d
NCT_EXIT_KEY	include/nuvoton_nct6102d.h	/^#define NCT_EXIT_KEY	/;"	d
NCT_LD_SELECT_REG	include/nuvoton_nct6102d.h	/^#define NCT_LD_SELECT_REG	/;"	d
NC_HOST_TRIG	arch/arm/include/asm/arch-tegra/dc.h	/^#define NC_HOST_TRIG	/;"	d
NC_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define NC_PAD_CTRL /;"	d	file:
NC_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define NC_PAD_CTRL /;"	d	file:
NDBDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDBDR0	/;"	d
NDBDR0	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDBDR0	/;"	d	file:
NDBDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDBDR1	/;"	d
NDBDR1	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDBDR1	/;"	d	file:
NDCB0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0	/;"	d
NDCB0	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0	/;"	d	file:
NDCB0_ADDR_CYC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_ADDR_CYC	/;"	d
NDCB0_ADDR_CYC	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_ADDR_CYC(/;"	d	file:
NDCB0_ADDR_CYC_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_ADDR_CYC_MASK	/;"	d	file:
NDCB0_ADDR_CYC_SHIFT	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_ADDR_CYC_SHIFT	/;"	d	file:
NDCB0_AUTO_RS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_AUTO_RS	/;"	d
NDCB0_AUTO_RS	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_AUTO_RS	/;"	d	file:
NDCB0_CMD1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_CMD1	/;"	d
NDCB0_CMD1_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_CMD1_MASK	/;"	d	file:
NDCB0_CMD2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_CMD2	/;"	d
NDCB0_CMD2_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_CMD2_MASK	/;"	d	file:
NDCB0_CMD_TYPE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_CMD_TYPE	/;"	d
NDCB0_CMD_TYPE	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_CMD_TYPE(/;"	d	file:
NDCB0_CMD_TYPE_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_CMD_TYPE_MASK	/;"	d	file:
NDCB0_CSEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_CSEL	/;"	d
NDCB0_CSEL	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_CSEL	/;"	d	file:
NDCB0_DBC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_DBC	/;"	d
NDCB0_DBC	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_DBC	/;"	d	file:
NDCB0_EXT_CMD_TYPE	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_EXT_CMD_TYPE(/;"	d	file:
NDCB0_EXT_CMD_TYPE_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_EXT_CMD_TYPE_MASK	/;"	d	file:
NDCB0_LEN_OVRD	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_LEN_OVRD	/;"	d	file:
NDCB0_NC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB0_NC	/;"	d
NDCB0_NC	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_NC	/;"	d	file:
NDCB0_ST_ROW_EN	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB0_ST_ROW_EN /;"	d	file:
NDCB1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB1	/;"	d
NDCB1	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB1	/;"	d	file:
NDCB2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCB2	/;"	d
NDCB2	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCB2	/;"	d	file:
NDCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR	/;"	d
NDCR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR	/;"	d	file:
NDCR_CLR_ECC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CLR_ECC	/;"	d
NDCR_CLR_PG_CNT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CLR_PG_CNT	/;"	d
NDCR_CLR_PG_CNT	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_CLR_PG_CNT	/;"	d	file:
NDCR_CS0_BBDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CS0_BBDM	/;"	d
NDCR_CS0_CMDDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CS0_CMDDM	/;"	d
NDCR_CS0_PAGEDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CS0_PAGEDM	/;"	d
NDCR_CS1_BBDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CS1_BBDM	/;"	d
NDCR_CS1_CMDDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CS1_CMDDM	/;"	d
NDCR_CS1_PAGEDM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_CS1_PAGEDM	/;"	d
NDCR_DBERRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_DBERRM	/;"	d
NDCR_DMA_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_DMA_EN	/;"	d
NDCR_DMA_EN	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_DMA_EN	/;"	d	file:
NDCR_DWIDTH_C	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_DWIDTH_C	/;"	d
NDCR_DWIDTH_C	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_DWIDTH_C	/;"	d	file:
NDCR_DWIDTH_M	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_DWIDTH_M	/;"	d
NDCR_DWIDTH_M	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_DWIDTH_M	/;"	d	file:
NDCR_ECC_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_ECC_EN	/;"	d
NDCR_ECC_EN	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_ECC_EN	/;"	d	file:
NDCR_INT_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_INT_MASK /;"	d	file:
NDCR_NAND_MODE	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_NAND_MODE	/;"	d	file:
NDCR_NCSX	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_NCSX	/;"	d
NDCR_NCSX	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_NCSX	/;"	d	file:
NDCR_ND_ARB_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_ND_ARB_EN	/;"	d
NDCR_ND_ARB_EN	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_ND_ARB_EN	/;"	d	file:
NDCR_ND_MODE	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_ND_MODE	/;"	d	file:
NDCR_ND_RUN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_ND_RUN	/;"	d
NDCR_ND_RUN	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_ND_RUN	/;"	d	file:
NDCR_ND_STOP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_ND_STOP	/;"	d
NDCR_PAGE_SZ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_PAGE_SZ	/;"	d
NDCR_PAGE_SZ	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_PAGE_SZ	/;"	d	file:
NDCR_PG_PER_BLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_PG_PER_BLK	/;"	d
NDCR_PG_PER_BLK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_PG_PER_BLK	/;"	d	file:
NDCR_RA_START	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_RA_START	/;"	d
NDCR_RA_START	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_RA_START	/;"	d	file:
NDCR_RDDREQM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_RDDREQM	/;"	d
NDCR_RDYM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_RDYM	/;"	d
NDCR_RD_ID_CNT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_RD_ID_CNT	/;"	d
NDCR_RD_ID_CNT	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_RD_ID_CNT(/;"	d	file:
NDCR_RD_ID_CNT_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_RD_ID_CNT_MASK	/;"	d	file:
NDCR_SBERRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_SBERRM	/;"	d
NDCR_SPARE_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_SPARE_EN	/;"	d
NDCR_SPARE_EN	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_SPARE_EN	/;"	d	file:
NDCR_STOP_ON_UNCOR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDCR_STOP_ON_UNCOR	/;"	d	file:
NDCR_WRCMDREQM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_WRCMDREQM	/;"	d
NDCR_WRDREQM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDCR_WRDREQM	/;"	d
NDDB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDDB	/;"	d
NDDB	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDDB	/;"	d	file:
NDECCCTRL	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDECCCTRL	/;"	d	file:
NDFC_ALE	include/linux/mtd/ndfc.h	/^#define NDFC_ALE	/;"	d
NDFC_BCFG0	include/linux/mtd/ndfc.h	/^#define NDFC_BCFG0	/;"	d
NDFC_BCFG1	include/linux/mtd/ndfc.h	/^#define NDFC_BCFG1	/;"	d
NDFC_BCFG2	include/linux/mtd/ndfc.h	/^#define NDFC_BCFG2	/;"	d
NDFC_BCFG3	include/linux/mtd/ndfc.h	/^#define NDFC_BCFG3	/;"	d
NDFC_BxCFG_CED	include/linux/mtd/ndfc.h	/^#define NDFC_BxCFG_CED	/;"	d
NDFC_BxCFG_EN	include/linux/mtd/ndfc.h	/^#define NDFC_BxCFG_EN	/;"	d
NDFC_BxCFG_SZ_16BIT	include/linux/mtd/ndfc.h	/^#define NDFC_BxCFG_SZ_16BIT	/;"	d
NDFC_BxCFG_SZ_8BIT	include/linux/mtd/ndfc.h	/^#define NDFC_BxCFG_SZ_8BIT	/;"	d
NDFC_BxCFG_SZ_MASK	include/linux/mtd/ndfc.h	/^#define NDFC_BxCFG_SZ_MASK	/;"	d
NDFC_CCR	include/linux/mtd/ndfc.h	/^#define NDFC_CCR	/;"	d
NDFC_CCR_ARAC0	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ARAC0	/;"	d
NDFC_CCR_ARAC1	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ARAC1	/;"	d
NDFC_CCR_ARAC2	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ARAC2	/;"	d
NDFC_CCR_ARAC3	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ARAC3	/;"	d
NDFC_CCR_ARAC_MASK	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ARAC_MASK	/;"	d
NDFC_CCR_ARE	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ARE	/;"	d
NDFC_CCR_BS	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_BS(/;"	d
NDFC_CCR_BS_MASK	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_BS_MASK	/;"	d
NDFC_CCR_DHC	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_DHC	/;"	d
NDFC_CCR_EBCC	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_EBCC	/;"	d
NDFC_CCR_REN	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_REN	/;"	d
NDFC_CCR_RESET_CE	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_RESET_CE	/;"	d
NDFC_CCR_RESET_ECC	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_RESET_ECC	/;"	d
NDFC_CCR_RIE	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_RIE	/;"	d
NDFC_CCR_ROMEN	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_ROMEN	/;"	d
NDFC_CCR_RPG	include/linux/mtd/ndfc.h	/^#define NDFC_CCR_RPG	/;"	d
NDFC_CMD	include/linux/mtd/ndfc.h	/^#define NDFC_CMD	/;"	d
NDFC_DATA	include/linux/mtd/ndfc.h	/^#define NDFC_DATA	/;"	d
NDFC_ECC	include/linux/mtd/ndfc.h	/^#define NDFC_ECC	/;"	d
NDFC_HWCTL	include/linux/mtd/ndfc.h	/^#define NDFC_HWCTL	/;"	d
NDFC_MAX_BANKS	include/linux/mtd/ndfc.h	/^#define NDFC_MAX_BANKS	/;"	d
NDFC_REVID	include/linux/mtd/ndfc.h	/^#define NDFC_REVID	/;"	d
NDFC_STAT	include/linux/mtd/ndfc.h	/^#define NDFC_STAT	/;"	d
NDFC_STAT_IS_READY	include/linux/mtd/ndfc.h	/^#define NDFC_STAT_IS_READY	/;"	d
NDIS_802_3_MAC_OPTION_PRIORITY	drivers/usb/gadget/ndis.h	/^#define NDIS_802_3_MAC_OPTION_PRIORITY /;"	d
NDIS_DEVICE_POWER_STATE	drivers/usb/gadget/ndis.h	/^enum NDIS_DEVICE_POWER_STATE {$/;"	g
NDIS_DEVICE_WAKE_ON_MAGIC_PACKET_ENABLE	drivers/usb/gadget/ndis.h	/^#define NDIS_DEVICE_WAKE_ON_MAGIC_PACKET_ENABLE /;"	d
NDIS_DEVICE_WAKE_ON_PATTERN_MATCH_ENABLE	drivers/usb/gadget/ndis.h	/^#define NDIS_DEVICE_WAKE_ON_PATTERN_MATCH_ENABLE /;"	d
NDIS_DEVICE_WAKE_UP_ENABLE	drivers/usb/gadget/ndis.h	/^#define NDIS_DEVICE_WAKE_UP_ENABLE /;"	d
NDIS_MAC_OPTION_8021P_PRIORITY	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_8021P_PRIORITY /;"	d
NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA /;"	d
NDIS_MAC_OPTION_EOTX_INDICATION	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_EOTX_INDICATION /;"	d
NDIS_MAC_OPTION_FULL_DUPLEX	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_FULL_DUPLEX /;"	d
NDIS_MAC_OPTION_NO_LOOPBACK	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_NO_LOOPBACK /;"	d
NDIS_MAC_OPTION_RECEIVE_SERIALIZED	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_RECEIVE_SERIALIZED /;"	d
NDIS_MAC_OPTION_RESERVED	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_RESERVED /;"	d
NDIS_MAC_OPTION_TRANSFERS_NOT_PEND	drivers/usb/gadget/ndis.h	/^#define NDIS_MAC_OPTION_TRANSFERS_NOT_PEND /;"	d
NDIS_MEDIA_STATE_CONNECTED	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIA_STATE_CONNECTED	/;"	d
NDIS_MEDIA_STATE_DISCONNECTED	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIA_STATE_DISCONNECTED	/;"	d
NDIS_MEDIUM_1394	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_1394	/;"	d
NDIS_MEDIUM_802_3	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_802_3	/;"	d
NDIS_MEDIUM_802_5	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_802_5	/;"	d
NDIS_MEDIUM_ARCENT_878_2	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_ARCENT_878_2	/;"	d
NDIS_MEDIUM_ARCENT_RAW	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_ARCENT_RAW	/;"	d
NDIS_MEDIUM_ATM	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_ATM	/;"	d
NDIS_MEDIUM_BPC	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_BPC	/;"	d
NDIS_MEDIUM_CO_WAN	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_CO_WAN	/;"	d
NDIS_MEDIUM_DIX	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_DIX	/;"	d
NDIS_MEDIUM_FDDI	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_FDDI	/;"	d
NDIS_MEDIUM_IRDA	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_IRDA	/;"	d
NDIS_MEDIUM_LOCAL_TALK	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_LOCAL_TALK	/;"	d
NDIS_MEDIUM_WAN	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_WAN	/;"	d
NDIS_MEDIUM_WIRELESS_LAN	drivers/usb/gadget/ndis.h	/^#define NDIS_MEDIUM_WIRELESS_LAN	/;"	d
NDIS_MINIPORT_64BITS_DMA	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_64BITS_DMA /;"	d
NDIS_MINIPORT_BUS_MASTER	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_BUS_MASTER /;"	d
NDIS_MINIPORT_DESERIALIZE	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_DESERIALIZE /;"	d
NDIS_MINIPORT_HARDWARE_DEVICE	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_HARDWARE_DEVICE /;"	d
NDIS_MINIPORT_HIDDEN	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_HIDDEN /;"	d
NDIS_MINIPORT_IGNORE_PACKET_QUEUE	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_IGNORE_PACKET_QUEUE /;"	d
NDIS_MINIPORT_IGNORE_REQUEST_QUEUE	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_IGNORE_REQUEST_QUEUE /;"	d
NDIS_MINIPORT_IGNORE_TOKEN_RING_ERRORS	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_IGNORE_TOKEN_RING_ERRORS /;"	d
NDIS_MINIPORT_INDICATES_PACKETS	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_INDICATES_PACKETS /;"	d
NDIS_MINIPORT_INTERMEDIATE_DRIVER	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_INTERMEDIATE_DRIVER /;"	d
NDIS_MINIPORT_IS_CO	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_IS_CO /;"	d
NDIS_MINIPORT_IS_NDIS_5	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_IS_NDIS_5 /;"	d
NDIS_MINIPORT_NETBOOT_CARD	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_NETBOOT_CARD /;"	d
NDIS_MINIPORT_NO_HALT_ON_SUSPEND	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_NO_HALT_ON_SUSPEND /;"	d
NDIS_MINIPORT_PM_SUPPORTED	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_PM_SUPPORTED /;"	d
NDIS_MINIPORT_REQUIRES_MEDIA_POLLING	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_REQUIRES_MEDIA_POLLING /;"	d
NDIS_MINIPORT_SG_LIST	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SG_LIST /;"	d
NDIS_MINIPORT_SUPPORTS_CANCEL_SEND_PACKETS	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SUPPORTS_CANCEL_SEND_PACKETS /;"	d
NDIS_MINIPORT_SUPPORTS_MAC_ADDRESS_OVERWRITE	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SUPPORTS_MAC_ADDRESS_OVERWRITE /;"	d
NDIS_MINIPORT_SUPPORTS_MEDIA_QUERY	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SUPPORTS_MEDIA_QUERY /;"	d
NDIS_MINIPORT_SUPPORTS_MEDIA_SENSE	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SUPPORTS_MEDIA_SENSE /;"	d
NDIS_MINIPORT_SURPRISE_REMOVE_OK	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SURPRISE_REMOVE_OK /;"	d
NDIS_MINIPORT_SWENUM	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_SWENUM /;"	d
NDIS_MINIPORT_USES_SAFE_BUFFER_APIS	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_USES_SAFE_BUFFER_APIS /;"	d
NDIS_MINIPORT_WDM_DRIVER	drivers/usb/gadget/ndis.h	/^#define NDIS_MINIPORT_WDM_DRIVER /;"	d
NDIS_PACKET_TYPE_ALL_FUNCTIONAL	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_ALL_FUNCTIONAL	/;"	d
NDIS_PACKET_TYPE_ALL_LOCAL	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_ALL_LOCAL	/;"	d
NDIS_PACKET_TYPE_ALL_MULTICAST	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_ALL_MULTICAST	/;"	d
NDIS_PACKET_TYPE_BROADCAST	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_BROADCAST	/;"	d
NDIS_PACKET_TYPE_DIRECTED	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_DIRECTED	/;"	d
NDIS_PACKET_TYPE_FUNCTIONAL	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_FUNCTIONAL	/;"	d
NDIS_PACKET_TYPE_GROUP	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_GROUP	/;"	d
NDIS_PACKET_TYPE_MAC_FRAME	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_MAC_FRAME	/;"	d
NDIS_PACKET_TYPE_MULTICAST	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_MULTICAST	/;"	d
NDIS_PACKET_TYPE_PROMISCUOUS	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_PROMISCUOUS	/;"	d
NDIS_PACKET_TYPE_SMT	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_SMT	/;"	d
NDIS_PACKET_TYPE_SOURCE_ROUTING	drivers/usb/gadget/ndis.h	/^#define NDIS_PACKET_TYPE_SOURCE_ROUTING	/;"	d
NDIS_PM_PACKET_PATTERN	drivers/usb/gadget/ndis.h	/^struct NDIS_PM_PACKET_PATTERN {$/;"	s
NDIS_PM_WAKE_UP_CAPABILITIES	drivers/usb/gadget/ndis.h	/^struct NDIS_PM_WAKE_UP_CAPABILITIES {$/;"	s
NDIS_PNP_CAPABILITIES	drivers/usb/gadget/ndis.h	/^struct NDIS_PNP_CAPABILITIES {$/;"	s
NDIS_STATUS_MULTICAST_EXISTS	drivers/usb/gadget/ndis.h	/^#define NDIS_STATUS_MULTICAST_EXISTS /;"	d
NDIS_STATUS_MULTICAST_FULL	drivers/usb/gadget/ndis.h	/^#define NDIS_STATUS_MULTICAST_FULL /;"	d
NDIS_STATUS_MULTICAST_NOT_FOUND	drivers/usb/gadget/ndis.h	/^#define NDIS_STATUS_MULTICAST_NOT_FOUND /;"	d
NDPCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDPCR	/;"	d
NDPCR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDPCR	/;"	d	file:
NDS32	arch/Kconfig	/^config NDS32$/;"	c	choice:choice07312ef30104
NDS32 architecture	arch/nds32/Kconfig	/^menu "NDS32 architecture"$/;"	m
NDS32_REG	arch/nds32/include/asm/ptrace.h	/^#define NDS32_REG /;"	d
NDSIZE	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE	/;"	d
NDSIZE	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE	/;"	d
NDSIZE_0	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_0	/;"	d
NDSIZE_1	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_1	/;"	d
NDSIZE_1	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_1	/;"	d
NDSIZE_2	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_2	/;"	d
NDSIZE_2	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_2	/;"	d
NDSIZE_3	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_3	/;"	d
NDSIZE_3	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_3	/;"	d
NDSIZE_4	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_4	/;"	d
NDSIZE_4	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_4	/;"	d
NDSIZE_5	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_5	/;"	d
NDSIZE_5	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_5	/;"	d
NDSIZE_6	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_6	/;"	d
NDSIZE_6	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_6	/;"	d
NDSIZE_7	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_7	/;"	d
NDSIZE_7	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_7	/;"	d
NDSIZE_8	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_8	/;"	d
NDSIZE_9	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_9	/;"	d
NDSIZE_OFFSET	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define NDSIZE_OFFSET	/;"	d
NDSIZE_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define NDSIZE_P	/;"	d
NDSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR	/;"	d
NDSR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR	/;"	d	file:
NDSR_CORERR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CORERR	/;"	d	file:
NDSR_CS0_BBD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_CS0_BBD	/;"	d
NDSR_CS0_BBD	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CS0_BBD	/;"	d	file:
NDSR_CS0_CMDD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_CS0_CMDD	/;"	d
NDSR_CS0_CMDD	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CS0_CMDD	/;"	d	file:
NDSR_CS0_PAGED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_CS0_PAGED	/;"	d
NDSR_CS0_PAGED	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CS0_PAGED	/;"	d	file:
NDSR_CS1_BBD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_CS1_BBD	/;"	d
NDSR_CS1_BBD	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CS1_BBD	/;"	d	file:
NDSR_CS1_CMDD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_CS1_CMDD	/;"	d
NDSR_CS1_CMDD	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CS1_CMDD	/;"	d	file:
NDSR_CS1_PAGED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_CS1_PAGED	/;"	d
NDSR_CS1_PAGED	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_CS1_PAGED	/;"	d	file:
NDSR_DBERR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_DBERR	/;"	d
NDSR_ERR_CNT	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_ERR_CNT(/;"	d	file:
NDSR_ERR_CNT_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_ERR_CNT_MASK /;"	d	file:
NDSR_ERR_CNT_OFF	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_ERR_CNT_OFF	/;"	d	file:
NDSR_FLASH_RDY	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_FLASH_RDY /;"	d	file:
NDSR_MASK	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_MASK	/;"	d	file:
NDSR_RDDREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_RDDREQ	/;"	d
NDSR_RDDREQ	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_RDDREQ	/;"	d	file:
NDSR_RDY	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_RDY	/;"	d
NDSR_RDY	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_RDY /;"	d	file:
NDSR_SBERR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_SBERR	/;"	d
NDSR_UNCORERR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_UNCORERR	/;"	d	file:
NDSR_WRCMDREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_WRCMDREQ	/;"	d
NDSR_WRCMDREQ	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_WRCMDREQ	/;"	d	file:
NDSR_WRDREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDSR_WRDREQ	/;"	d
NDSR_WRDREQ	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDSR_WRDREQ	/;"	d	file:
NDTR0CS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDTR0CS0	/;"	d
NDTR0CS0	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0CS0	/;"	d	file:
NDTR0_tCH	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0_tCH(/;"	d	file:
NDTR0_tCS	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0_tCS(/;"	d	file:
NDTR0_tRH	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0_tRH(/;"	d	file:
NDTR0_tRP	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0_tRP(/;"	d	file:
NDTR0_tWH	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0_tWH(/;"	d	file:
NDTR0_tWP	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR0_tWP(/;"	d	file:
NDTR1CS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define NDTR1CS0	/;"	d
NDTR1CS0	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR1CS0	/;"	d	file:
NDTR1_tAR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR1_tAR(/;"	d	file:
NDTR1_tR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR1_tR(/;"	d	file:
NDTR1_tWHR	drivers/mtd/nand/pxa3xx_nand.c	/^#define NDTR1_tWHR(/;"	d	file:
NE	cmd/itest.c	/^#define NE	/;"	d	file:
NE2000_BASIC_INIT	drivers/net/ne2000.h	/^#define NE2000_BASIC_INIT$/;"	d
NEEDBITS	lib/zlib/inflate.c	/^#define NEEDBITS(/;"	d	file:
NEED_IP	fs/jffs2/compr_lzo.c	/^#define NEED_IP(/;"	d	file:
NEED_OP	fs/jffs2/compr_lzo.c	/^#define NEED_OP(/;"	d	file:
NEED_RESET	board/freescale/ls1021atwr/ls1021atwr.c	/^#define NEED_RESET	/;"	d	file:
NEITHER_LED	board/Seagate/dockstar/dockstar.c	/^#define NEITHER_LED	/;"	d	file:
NEITHER_LED	board/Seagate/goflexhome/goflexhome.c	/^#define NEITHER_LED	/;"	d	file:
NELEMS	arch/arm/cpu/armv7/iproc-common/armpll.c	/^#define NELEMS(/;"	d	file:
NESTED	arch/mips/include/asm/asm.h	/^#define NESTED(/;"	d
NET	net/Kconfig	/^menuconfig NET$/;"	c
NET2BIG_V2_GPIO_PUSH_BUTTON	board/LaCie/net2big_v2/net2big_v2.h	/^#define NET2BIG_V2_GPIO_PUSH_BUTTON	/;"	d
NET2BIG_V2_H	board/LaCie/net2big_v2/net2big_v2.h	/^#define NET2BIG_V2_H$/;"	d
NET2BIG_V2_OE_HIGH	board/LaCie/net2big_v2/net2big_v2.h	/^#define NET2BIG_V2_OE_HIGH	/;"	d
NET2BIG_V2_OE_LOW	board/LaCie/net2big_v2/net2big_v2.h	/^#define NET2BIG_V2_OE_LOW	/;"	d
NET2BIG_V2_OE_VAL_HIGH	board/LaCie/net2big_v2/net2big_v2.h	/^#define NET2BIG_V2_OE_VAL_HIGH	/;"	d
NET2BIG_V2_OE_VAL_LOW	board/LaCie/net2big_v2/net2big_v2.h	/^#define NET2BIG_V2_OE_VAL_LOW	/;"	d
NETARGS	include/configs/ti_armv7_common.h	/^#define NETARGS /;"	d
NETCONS	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
NETCONSOLE	net/Kconfig	/^config NETCONSOLE$/;"	c
NETCONSOLE_ENV	include/configs/bfin_adi_common.h	/^#  define NETCONSOLE_ENV /;"	d
NETCONSOLE_ENV	include/configs/bfin_adi_common.h	/^#  define NETCONSOLE_ENV$/;"	d
NETDEVICES	drivers/net/Kconfig	/^menuconfig NETDEVICES$/;"	c
NETLOOP_CONTINUE	include/net.h	/^	NETLOOP_CONTINUE,$/;"	e	enum:net_loop_state
NETLOOP_FAIL	include/net.h	/^	NETLOOP_FAIL$/;"	e	enum:net_loop_state
NETLOOP_RESTART	include/net.h	/^	NETLOOP_RESTART,$/;"	e	enum:net_loop_state
NETLOOP_SUCCESS	include/net.h	/^	NETLOOP_SUCCESS,$/;"	e	enum:net_loop_state
NETOCTETS	drivers/net/davinci_emac.h	/^	dv_reg		NETOCTETS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
NETSPACE_V2_GPIO_BUTTON	board/LaCie/netspace_v2/netspace_v2.h	/^#define NETSPACE_V2_GPIO_BUTTON /;"	d
NETSPACE_V2_H	board/LaCie/netspace_v2/netspace_v2.h	/^#define NETSPACE_V2_H$/;"	d
NETSPACE_V2_OE_HIGH	board/LaCie/netspace_v2/netspace_v2.h	/^#define NETSPACE_V2_OE_HIGH	/;"	d
NETSPACE_V2_OE_LOW	board/LaCie/netspace_v2/netspace_v2.h	/^#define NETSPACE_V2_OE_LOW	/;"	d
NETSPACE_V2_OE_VAL_HIGH	board/LaCie/netspace_v2/netspace_v2.h	/^#define NETSPACE_V2_OE_VAL_HIGH	/;"	d
NETSPACE_V2_OE_VAL_LOW	board/LaCie/netspace_v2/netspace_v2.h	/^#define NETSPACE_V2_OE_VAL_LOW	/;"	d
NETWORK_ENV_SETTINGS	include/configs/bf537-minotaur.h	/^# define NETWORK_ENV_SETTINGS /;"	d
NETWORK_ENV_SETTINGS	include/configs/bf537-minotaur.h	/^# define NETWORK_ENV_SETTINGS$/;"	d
NETWORK_ENV_SETTINGS	include/configs/bf537-srv1.h	/^# define NETWORK_ENV_SETTINGS /;"	d
NETWORK_ENV_SETTINGS	include/configs/bf537-srv1.h	/^# define NETWORK_ENV_SETTINGS$/;"	d
NETWORK_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^# define NETWORK_ENV_SETTINGS /;"	d
NETWORK_ENV_SETTINGS	include/configs/bfin_adi_common.h	/^# define NETWORK_ENV_SETTINGS$/;"	d
NETWORK_ENV_SETTINGS	include/configs/blackstamp.h	/^# define NETWORK_ENV_SETTINGS /;"	d
NETWORK_ENV_SETTINGS	include/configs/blackstamp.h	/^# define NETWORK_ENV_SETTINGS$/;"	d
NET_CALLBACKS	include/env_callback.h	/^#define NET_CALLBACKS /;"	d
NET_CALLBACKS	include/env_callback.h	/^#define NET_CALLBACKS$/;"	d
NET_FLAGS	include/env_flags.h	/^#define NET_FLAGS /;"	d
NET_FLAGS	include/env_flags.h	/^#define NET_FLAGS$/;"	d
NET_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG1	/;"	d
NET_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG2	/;"	d
NET_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG3	/;"	d
NET_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG4	/;"	d
NET_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG5	/;"	d
NET_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG6	/;"	d
NET_GPMC_CONFIG7	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_GPMC_CONFIG7	/;"	d
NET_IP_ALIGN	drivers/usb/eth/smsc95xx.c	/^#define NET_IP_ALIGN /;"	d	file:
NET_LAN9221_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG1 /;"	d
NET_LAN9221_GPMC_CONFIG1	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG1 /;"	d	file:
NET_LAN9221_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG2 /;"	d
NET_LAN9221_GPMC_CONFIG2	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG2 /;"	d	file:
NET_LAN9221_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG3 /;"	d
NET_LAN9221_GPMC_CONFIG3	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG3 /;"	d	file:
NET_LAN9221_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG4 /;"	d
NET_LAN9221_GPMC_CONFIG4	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG4 /;"	d	file:
NET_LAN9221_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG5 /;"	d
NET_LAN9221_GPMC_CONFIG5	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG5 /;"	d	file:
NET_LAN9221_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG6 /;"	d
NET_LAN9221_GPMC_CONFIG6	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG6 /;"	d	file:
NET_LAN9221_GPMC_CONFIG7	arch/arm/include/asm/arch-omap3/mem.h	/^#define NET_LAN9221_GPMC_CONFIG7 /;"	d
NET_LAN9221_GPMC_CONFIG7	board/gumstix/duovero/duovero.c	/^#define NET_LAN9221_GPMC_CONFIG7 /;"	d	file:
NET_LAN92XX_GPMC_CONFIG1	board/logicpd/omap3som/omap3logic.h	/^#define NET_LAN92XX_GPMC_CONFIG1	/;"	d
NET_LAN92XX_GPMC_CONFIG2	board/logicpd/omap3som/omap3logic.h	/^#define NET_LAN92XX_GPMC_CONFIG2	/;"	d
NET_LAN92XX_GPMC_CONFIG3	board/logicpd/omap3som/omap3logic.h	/^#define NET_LAN92XX_GPMC_CONFIG3	/;"	d
NET_LAN92XX_GPMC_CONFIG4	board/logicpd/omap3som/omap3logic.h	/^#define NET_LAN92XX_GPMC_CONFIG4	/;"	d
NET_LAN92XX_GPMC_CONFIG5	board/logicpd/omap3som/omap3logic.h	/^#define NET_LAN92XX_GPMC_CONFIG5	/;"	d
NET_LAN92XX_GPMC_CONFIG6	board/logicpd/omap3som/omap3logic.h	/^#define NET_LAN92XX_GPMC_CONFIG6	/;"	d
NET_PROT_ARP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_ARP,$/;"	e	enum:net_prot
NET_PROT_CAPWAP_CTRL	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_CAPWAP_CTRL,$/;"	e	enum:net_prot
NET_PROT_CAPWAP_DATA	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_CAPWAP_DATA,$/;"	e	enum:net_prot
NET_PROT_DCCP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_DCCP,$/;"	e	enum:net_prot
NET_PROT_DUMMY_LAST	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_DUMMY_LAST$/;"	e	enum:net_prot
NET_PROT_ETH	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_ETH,$/;"	e	enum:net_prot
NET_PROT_FCOE	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_FCOE,$/;"	e	enum:net_prot
NET_PROT_FIP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_FIP,$/;"	e	enum:net_prot
NET_PROT_GRE	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_GRE,$/;"	e	enum:net_prot
NET_PROT_GTP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_GTP,$/;"	e	enum:net_prot
NET_PROT_ICMP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_ICMP,$/;"	e	enum:net_prot
NET_PROT_ICMPV6	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_ICMPV6,$/;"	e	enum:net_prot
NET_PROT_IGMP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IGMP,$/;"	e	enum:net_prot
NET_PROT_IP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IP,$/;"	e	enum:net_prot
NET_PROT_IPHC	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IPHC,$/;"	e	enum:net_prot
NET_PROT_IPSEC_AH	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IPSEC_AH,$/;"	e	enum:net_prot
NET_PROT_IPSEC_ESP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IPSEC_ESP,$/;"	e	enum:net_prot
NET_PROT_IPV4	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IPV4,$/;"	e	enum:net_prot
NET_PROT_IPV6	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_IPV6,$/;"	e	enum:net_prot
NET_PROT_ISCSI	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_ISCSI,$/;"	e	enum:net_prot
NET_PROT_L2TPV2	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_L2TPV2,$/;"	e	enum:net_prot
NET_PROT_L2TPV3_CTRL	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_L2TPV3_CTRL,$/;"	e	enum:net_prot
NET_PROT_L2TPV3_SESS	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_L2TPV3_SESS,$/;"	e	enum:net_prot
NET_PROT_LLC	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_LLC,$/;"	e	enum:net_prot
NET_PROT_LLC_SNAP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_LLC_SNAP,$/;"	e	enum:net_prot
NET_PROT_MACSEC	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_MACSEC,$/;"	e	enum:net_prot
NET_PROT_MINENCAP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_MINENCAP,$/;"	e	enum:net_prot
NET_PROT_MPLS	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_MPLS,$/;"	e	enum:net_prot
NET_PROT_NLPID	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_NLPID,$/;"	e	enum:net_prot
NET_PROT_NONE	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_NONE = 0,$/;"	e	enum:net_prot
NET_PROT_PAYLOAD	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_PAYLOAD,$/;"	e	enum:net_prot
NET_PROT_PPP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_PPP,$/;"	e	enum:net_prot
NET_PROT_PPPMUX	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_PPPMUX,$/;"	e	enum:net_prot
NET_PROT_PPPMUX_SUBFRM	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_PPPMUX_SUBFRM,$/;"	e	enum:net_prot
NET_PROT_PPPOE	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_PPPOE,$/;"	e	enum:net_prot
NET_PROT_RFC2684	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_RFC2684,$/;"	e	enum:net_prot
NET_PROT_SCTP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_SCTP,$/;"	e	enum:net_prot
NET_PROT_SCTP_CHUNK_DATA	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_SCTP_CHUNK_DATA,$/;"	e	enum:net_prot
NET_PROT_SNAP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_SNAP,$/;"	e	enum:net_prot
NET_PROT_TCP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_TCP,$/;"	e	enum:net_prot
NET_PROT_UDP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_UDP,$/;"	e	enum:net_prot
NET_PROT_UDP_ENC_ESP	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_UDP_ENC_ESP, \/* RFC 3948 *\/$/;"	e	enum:net_prot
NET_PROT_UDP_LITE	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_UDP_LITE,$/;"	e	enum:net_prot
NET_PROT_USER_DEFINED_L2	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_USER_DEFINED_L2,$/;"	e	enum:net_prot
NET_PROT_USER_DEFINED_L3	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_USER_DEFINED_L3,$/;"	e	enum:net_prot
NET_PROT_USER_DEFINED_L4	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_USER_DEFINED_L4,$/;"	e	enum:net_prot
NET_PROT_USER_DEFINED_L5	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_USER_DEFINED_L5,$/;"	e	enum:net_prot
NET_PROT_USER_DEFINED_SHIM1	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_USER_DEFINED_SHIM1,$/;"	e	enum:net_prot
NET_PROT_USER_DEFINED_SHIM2	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_USER_DEFINED_SHIM2,$/;"	e	enum:net_prot
NET_PROT_VLAN	include/fsl-mc/fsl_dpni.h	/^	NET_PROT_VLAN,$/;"	e	enum:net_prot
NET_RANDOM_ETHADDR	net/Kconfig	/^config NET_RANDOM_ETHADDR$/;"	c
NET_SKB_PAD	drivers/net/mvpp2.c	/^#define NET_SKB_PAD	/;"	d	file:
NET_TFTP_VARS	net/Kconfig	/^config NET_TFTP_VARS$/;"	c
NEW_FABRIC_TWSI_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define NEW_FABRIC_TWSI_ADDR	/;"	d
NEW_FABRIC_TWSI_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define NEW_FABRIC_TWSI_ADDR	/;"	d
NEW_PAD_CTRL	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define NEW_PAD_CTRL(/;"	d
NEW_PS7_ERR_CODE	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define NEW_PS7_ERR_CODE /;"	d
NEW_PS7_ERR_CODE	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define NEW_PS7_ERR_CODE /;"	d
NEW_PS7_ERR_CODE	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define NEW_PS7_ERR_CODE /;"	d
NEW_PS7_ERR_CODE	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define NEW_PS7_ERR_CODE /;"	d
NEW_PS7_ERR_CODE	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define NEW_PS7_ERR_CODE /;"	d
NEXT_DESC_PTR	drivers/net/bfin_mac.h	/^	struct dma_descriptor *NEXT_DESC_PTR;$/;"	m	struct:dma_descriptor	typeref:struct:dma_descriptor *
NEXT_PARAM	cmd/eeprom.c	/^#define NEXT_PARAM(/;"	d	file:
NEXT_QH	drivers/usb/host/ehci-hcd.c	/^#define NEXT_QH(/;"	d	file:
NEXT_SIZE	common/dlmalloc.c	/^#define NEXT_SIZE /;"	d	file:
NEXT_TASK	include/ppc_defs.h	/^#define	NEXT_TASK	/;"	d
NFC_ACCESS_DIR	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ACCESS_DIR	/;"	d	file:
NFC_ACCESS_DIR	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ACCESS_DIR /;"	d	file:
NFC_ACTIVE_CS_MASK	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ACTIVE_CS_MASK	/;"	d	file:
NFC_ACTIVE_CS_SHIFT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ACTIVE_CS_SHIFT	/;"	d	file:
NFC_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_ADDR /;"	d
NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_ADDR /;"	d
NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_ADDR /;"	d
NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_ADDR /;"	d
NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_ADDR /;"	d
NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_ADDR /;"	d
NFC_ADDR	drivers/mtd/nand/mxc_nand.h	/^#define NFC_ADDR	/;"	d
NFC_ADDRESS	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ADDRESS	/;"	d	file:
NFC_ADDR_HIGH	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ADDR_HIGH /;"	d	file:
NFC_ADDR_LOW	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ADDR_LOW /;"	d	file:
NFC_ADDR_NUM_OFFSET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ADDR_NUM_OFFSET /;"	d	file:
NFC_ADR_NUM	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ADR_NUM(/;"	d	file:
NFC_ADR_NUM_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ADR_NUM_MSK	/;"	d	file:
NFC_B2R_INT_ENABLE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_B2R_INT_ENABLE	/;"	d	file:
NFC_BASE_ADDR	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define NFC_BASE_ADDR	/;"	d
NFC_BASE_ADDR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define NFC_BASE_ADDR	/;"	d
NFC_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define NFC_BASE_ADDR	/;"	d
NFC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define NFC_BASE_ADDR	/;"	d
NFC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define NFC_BASE_ADDR	/;"	d
NFC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NFC_BASE_ADDR	/;"	d
NFC_BASE_ADDR_AXI	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define NFC_BASE_ADDR_AXI /;"	d
NFC_BIG_ENDIAN	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_BIG_ENDIAN	/;"	d	file:
NFC_BLS_UNLOCKED	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_BLS_UNLOCKED	/;"	d	file:
NFC_BUF_ADDR	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_BUF_ADDR	/;"	d	file:
NFC_BUF_SIZE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define NFC_BUF_SIZE	/;"	d
NFC_BUS_WIDTH_16	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_BUS_WIDTH_16	/;"	d	file:
NFC_BUS_WIDTH_8	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_BUS_WIDTH_8	/;"	d	file:
NFC_BUS_WIDTH_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_BUS_WIDTH_MSK	/;"	d	file:
NFC_CACHE_SWAP	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_CACHE_SWAP	/;"	d	file:
NFC_CE	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_CE	/;"	d	file:
NFC_CE_CTL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CE_CTL	/;"	d	file:
NFC_CE_SEL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CE_SEL(/;"	d	file:
NFC_CE_SEL_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CE_SEL_MSK	/;"	d	file:
NFC_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	NFC_CLK,$/;"	e	enum:mxc_main_clock
NFC_CLK_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define NFC_CLK_MAX /;"	d	file:
NFC_CMD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_CMD /;"	d
NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_CMD /;"	d
NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_CMD /;"	d
NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_CMD /;"	d
NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_CMD /;"	d
NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_CMD /;"	d
NFC_CMD	drivers/mtd/nand/mxc_nand.h	/^#define NFC_CMD	/;"	d
NFC_CMD	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD(/;"	d	file:
NFC_CMD	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CMD /;"	d	file:
NFC_CMD_FAIL	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_CMD_FAIL	/;"	d	file:
NFC_CMD_FIFO_STATUS	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD_FIFO_STATUS	/;"	d	file:
NFC_CMD_HIGH_BYTE_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD_HIGH_BYTE_MSK	/;"	d	file:
NFC_CMD_INT_ENABLE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD_INT_ENABLE	/;"	d	file:
NFC_CMD_INT_FLAG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD_INT_FLAG	/;"	d	file:
NFC_CMD_LOW_BYTE_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD_LOW_BYTE_MSK	/;"	d	file:
NFC_CMD_READSTART	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CMD_READSTART /;"	d	file:
NFC_CMD_RNDOUT	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CMD_RNDOUT /;"	d	file:
NFC_CMD_RNDOUTSTART	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CMD_RNDOUTSTART /;"	d	file:
NFC_CMD_TYPE_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_CMD_TYPE_MSK	/;"	d	file:
NFC_CNT	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CNT /;"	d	file:
NFC_COL_ADDR	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_COL_ADDR	/;"	d	file:
NFC_COMMAND	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_COMMAND	/;"	d	file:
NFC_CONFIG	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_CONFIG	/;"	d	file:
NFC_CONFIG1	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_CONFIG1	/;"	d	file:
NFC_CONFIG1_CE	drivers/mtd/nand/mxc_nand.h	/^#define NFC_CONFIG1_CE	/;"	d
NFC_CONFIG1_RST	drivers/mtd/nand/mxc_nand.h	/^#define NFC_CONFIG1_RST	/;"	d
NFC_CONFIG1_SP_EN	drivers/mtd/nand/mxc_nand.h	/^#define NFC_CONFIG1_SP_EN	/;"	d
NFC_CONFIG2	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_CONFIG2	/;"	d	file:
NFC_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_COUNT /;"	d
NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_COUNT /;"	d
NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_COUNT /;"	d
NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_COUNT /;"	d
NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_COUNT /;"	d
NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_COUNT /;"	d
NFC_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_CTL /;"	d
NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_CTL /;"	d
NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_CTL /;"	d
NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_CTL /;"	d
NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_CTL /;"	d
NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_CTL /;"	d
NFC_CTL	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CTL /;"	d	file:
NFC_CTL_EN	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CTL_EN /;"	d	file:
NFC_CTL_PAGE_SIZE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CTL_PAGE_SIZE(/;"	d	file:
NFC_CTL_PAGE_SIZE_MASK	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CTL_PAGE_SIZE_MASK /;"	d	file:
NFC_CTL_RAM_METHOD	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CTL_RAM_METHOD /;"	d	file:
NFC_CTL_RESET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_CTL_RESET /;"	d	file:
NFC_DATA_RD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_DATA_RD /;"	d
NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_DATA_RD /;"	d
NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_DATA_RD /;"	d
NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_DATA_RD /;"	d
NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_DATA_RD /;"	d
NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_DATA_RD /;"	d
NFC_DATA_SWAP_METHOD	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_DATA_SWAP_METHOD	/;"	d	file:
NFC_DATA_SWAP_METHOD	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_DATA_SWAP_METHOD /;"	d	file:
NFC_DATA_TRANS	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_DATA_TRANS	/;"	d	file:
NFC_DATA_TRANS	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_DATA_TRANS /;"	d	file:
NFC_DATA_WR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_DATA_WR /;"	d
NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_DATA_WR /;"	d
NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_DATA_WR /;"	d
NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_DATA_WR /;"	d
NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_DATA_WR /;"	d
NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_DATA_WR /;"	d
NFC_DEBUG	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_DEBUG /;"	d	file:
NFC_DEBUG_CTL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_DEBUG_CTL	/;"	d	file:
NFC_DEFAULT_TIMEOUT_MS	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_DEFAULT_TIMEOUT_MS	/;"	d	file:
NFC_DIV_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define NFC_DIV_MAX /;"	d	file:
NFC_DMA_INT_ENABLE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_DMA_INT_ENABLE	/;"	d	file:
NFC_DMA_INT_FLAG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_DMA_INT_FLAG	/;"	d	file:
NFC_ECC0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_ECC0 /;"	d
NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_ECC0 /;"	d
NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_ECC0 /;"	d
NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_ECC0 /;"	d
NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_ECC0 /;"	d
NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_ECC0 /;"	d
NFC_ECC1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_ECC1 /;"	d
NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_ECC1 /;"	d
NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_ECC1 /;"	d
NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_ECC1 /;"	d
NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_ECC1 /;"	d
NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_ECC1 /;"	d
NFC_ECC2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_ECC2 /;"	d
NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_ECC2 /;"	d
NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_ECC2 /;"	d
NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_ECC2 /;"	d
NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_ECC2 /;"	d
NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_ECC2 /;"	d
NFC_ECC3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_ECC3 /;"	d
NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_ECC3 /;"	d
NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_ECC3 /;"	d
NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_ECC3 /;"	d
NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_ECC3 /;"	d
NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_ECC3 /;"	d
NFC_ECC_4BIT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ECC_4BIT	/;"	d	file:
NFC_ECC_BLOCK_512	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_BLOCK_512	/;"	d	file:
NFC_ECC_BLOCK_SIZE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_BLOCK_SIZE /;"	d	file:
NFC_ECC_BLOCK_SIZE_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_BLOCK_SIZE_MSK	/;"	d	file:
NFC_ECC_CNT0	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_CNT0 /;"	d	file:
NFC_ECC_CNT1	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_CNT1 /;"	d	file:
NFC_ECC_CNT2	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_CNT2 /;"	d	file:
NFC_ECC_CNT3	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_CNT3 /;"	d	file:
NFC_ECC_CTL	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_CTL /;"	d	file:
NFC_ECC_EN	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_EN	/;"	d	file:
NFC_ECC_EN	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_EN /;"	d	file:
NFC_ECC_ENABLE	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ECC_ENABLE	/;"	d	file:
NFC_ECC_ERR	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_ERR(/;"	d	file:
NFC_ECC_ERR_CNT	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_ERR_CNT(/;"	d	file:
NFC_ECC_EXCEPTION	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_EXCEPTION	/;"	d	file:
NFC_ECC_EXCEPTION	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_EXCEPTION /;"	d	file:
NFC_ECC_MODE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_MODE(/;"	d	file:
NFC_ECC_MODE_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_MODE_MSK	/;"	d	file:
NFC_ECC_OP	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_OP	/;"	d	file:
NFC_ECC_PAT_FOUND	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_PAT_FOUND(/;"	d	file:
NFC_ECC_PIPELINE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ECC_PIPELINE	/;"	d	file:
NFC_ECC_PIPELINE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_PIPELINE /;"	d	file:
NFC_ECC_RANDOM_DIRECTION	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_RANDOM_DIRECTION /;"	d	file:
NFC_ECC_RANDOM_EN	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_RANDOM_EN /;"	d	file:
NFC_ECC_ST	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ECC_ST /;"	d	file:
NFC_ECC_STATUS1	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ECC_STATUS1	/;"	d	file:
NFC_ECC_STATUS2	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ECC_STATUS2	/;"	d	file:
NFC_EFNAND_STATUS	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_EFNAND_STATUS /;"	d	file:
NFC_EN	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_EN	/;"	d	file:
NFC_FLASH_ADDR	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_FLASH_ADDR	/;"	d	file:
NFC_FLASH_CMD	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_FLASH_CMD	/;"	d	file:
NFC_FLASH_CMD1	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_FLASH_CMD1	/;"	d	file:
NFC_FLASH_CMD2	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_FLASH_CMD2	/;"	d	file:
NFC_FLASH_CONFIG	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_FLASH_CONFIG	/;"	d	file:
NFC_FLASH_STATUS1	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_FLASH_STATUS1	/;"	d	file:
NFC_FLASH_STATUS2	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_FLASH_STATUS2	/;"	d	file:
NFC_FULL_PAGE_DMA	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_FULL_PAGE_DMA	/;"	d	file:
NFC_FULL_PAGE_INT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_FULL_PAGE_INT	/;"	d	file:
NFC_ID	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ID	/;"	d	file:
NFC_ID	drivers/mtd/nand/mxc_nand.h	/^#define NFC_ID	/;"	d
NFC_INPUT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_INPUT	/;"	d	file:
NFC_INPUT	drivers/mtd/nand/mxc_nand.h	/^#define NFC_INPUT	/;"	d
NFC_INT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_INT	/;"	d	file:
NFC_INT	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_INT /;"	d	file:
NFC_INT_MASK	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_INT_MASK	/;"	d	file:
NFC_INT_MASK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_INT_MASK	/;"	d	file:
NFC_IO_DATA	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_IO_DATA /;"	d	file:
NFC_IRQMASK	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_IRQMASK /;"	d
NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_IRQMASK /;"	d
NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_IRQMASK /;"	d
NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_IRQMASK /;"	d
NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_IRQMASK /;"	d
NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_IRQMASK /;"	d
NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_IRQSTAT /;"	d
NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_IRQSTAT /;"	d
NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_IRQSTAT /;"	d
NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_IRQSTAT /;"	d
NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_IRQSTAT /;"	d
NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_IRQSTAT /;"	d
NFC_IRQ_STATUS	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_IRQ_STATUS	/;"	d	file:
NFC_MAIN_AREA	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_MAIN_AREA(/;"	d	file:
NFC_MAIN_AREA	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_MAIN_AREA(/;"	d	file:
NFC_MAX_CS	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_MAX_CS	/;"	d	file:
NFC_NATCH_INT_FLAG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_NATCH_INT_FLAG	/;"	d	file:
NFC_NF_WRPRST	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_NF_WRPRST	/;"	d	file:
NFC_NORMAL_OP	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_NORMAL_OP	/;"	d	file:
NFC_ONE_CYCLE	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_ONE_CYCLE	/;"	d	file:
NFC_OUTPUT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_OUTPUT	/;"	d	file:
NFC_OUTPUT	drivers/mtd/nand/mxc_nand.h	/^#define NFC_OUTPUT	/;"	d
NFC_PAGE_CMD	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_PAGE_CMD /;"	d	file:
NFC_PAGE_OP	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_PAGE_OP	/;"	d	file:
NFC_PAGE_SHIFT	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_PAGE_SHIFT(/;"	d	file:
NFC_PAGE_SHIFT_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_PAGE_SHIFT_MSK	/;"	d	file:
NFC_PATTERN_ID	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_PATTERN_ID /;"	d	file:
NFC_PGCTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_PGCTL /;"	d
NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_PGCTL /;"	d
NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_PGCTL /;"	d
NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_PGCTL /;"	d
NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_PGCTL /;"	d
NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_PGCTL /;"	d
NFC_PPB_128	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_PPB_128	/;"	d	file:
NFC_PPB_256	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_PPB_256	/;"	d	file:
NFC_PPB_32	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_PPB_32	/;"	d	file:
NFC_PPB_64	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_PPB_64	/;"	d	file:
NFC_PPB_MASK	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_PPB_MASK	/;"	d	file:
NFC_PROGRAM_CMD_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_PROGRAM_CMD_MSK	/;"	d	file:
NFC_RAM0_BASE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RAM0_BASE	/;"	d	file:
NFC_RAM0_BASE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_RAM0_BASE /;"	d	file:
NFC_RAM1_BASE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RAM1_BASE	/;"	d	file:
NFC_RAM1_BASE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_RAM1_BASE /;"	d	file:
NFC_RAM_METHOD	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RAM_METHOD	/;"	d	file:
NFC_RANDOM_DIRECTION	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RANDOM_DIRECTION	/;"	d	file:
NFC_RANDOM_EN	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RANDOM_EN	/;"	d	file:
NFC_RANDOM_READ_CMD0_OFFSET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_RANDOM_READ_CMD0_OFFSET /;"	d	file:
NFC_RANDOM_READ_CMD1_OFFSET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_RANDOM_READ_CMD1_OFFSET /;"	d	file:
NFC_RANDOM_SEED	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RANDOM_SEED(/;"	d	file:
NFC_RANDOM_SEED_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RANDOM_SEED_MSK	/;"	d	file:
NFC_RAW_CMD	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_RAW_CMD /;"	d	file:
NFC_RBA_MASK	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_RBA_MASK	/;"	d	file:
NFC_RB_B2R	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RB_B2R	/;"	d	file:
NFC_RB_SEL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RB_SEL(/;"	d	file:
NFC_RB_SEL_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RB_SEL_MSK	/;"	d	file:
NFC_RB_STATE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RB_STATE(/;"	d	file:
NFC_RCMD_SET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_RCMD_SET /;"	d	file:
NFC_READ	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_READ /;"	d
NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_READ /;"	d
NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_READ /;"	d
NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_READ /;"	d
NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_READ /;"	d
NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_READ /;"	d
NFC_READ_CMD0_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_READ_CMD0_MSK	/;"	d	file:
NFC_READ_CMD1_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_READ_CMD1_MSK	/;"	d	file:
NFC_READ_CMD_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_READ_CMD_MSK	/;"	d	file:
NFC_READ_CMD_OFFSET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_READ_CMD_OFFSET /;"	d	file:
NFC_REG_ADDR_HIGH	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_ADDR_HIGH	/;"	d	file:
NFC_REG_ADDR_LOW	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_ADDR_LOW	/;"	d	file:
NFC_REG_CMD	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_CMD	/;"	d	file:
NFC_REG_CNT	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_CNT	/;"	d	file:
NFC_REG_CTL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_CTL	/;"	d	file:
NFC_REG_DEBUG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_DEBUG	/;"	d	file:
NFC_REG_ECC_CTL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_ECC_CTL	/;"	d	file:
NFC_REG_ECC_ERR_CNT	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_ECC_ERR_CNT(/;"	d	file:
NFC_REG_ECC_ST	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_ECC_ST	/;"	d	file:
NFC_REG_INT	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_INT	/;"	d	file:
NFC_REG_IO_DATA	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_IO_DATA	/;"	d	file:
NFC_REG_PAT_ID	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_PAT_ID	/;"	d	file:
NFC_REG_RCMD_SET	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_RCMD_SET	/;"	d	file:
NFC_REG_SECTOR_NUM	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_SECTOR_NUM	/;"	d	file:
NFC_REG_SPARE_AREA	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_SPARE_AREA	/;"	d	file:
NFC_REG_ST	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_ST	/;"	d	file:
NFC_REG_TIMING_CFG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_TIMING_CFG	/;"	d	file:
NFC_REG_TIMING_CTL	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_TIMING_CTL	/;"	d	file:
NFC_REG_USER_DATA	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_USER_DATA(/;"	d	file:
NFC_REG_WCMD_SET	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_REG_WCMD_SET	/;"	d	file:
NFC_RESET	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_RESET	/;"	d	file:
NFC_RESET	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RESET	/;"	d	file:
NFC_RESET_TIMEOUT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_RESET_TIMEOUT	/;"	d	file:
NFC_RND_READ_CMD0_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RND_READ_CMD0_MSK	/;"	d	file:
NFC_RND_READ_CMD1_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RND_READ_CMD1_MSK	/;"	d	file:
NFC_RND_WRITE_CMD_MSK	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_RND_WRITE_CMD_MSK	/;"	d	file:
NFC_ROW_ADDR	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_ROW_ADDR	/;"	d	file:
NFC_ROW_ADDR_INC	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_ROW_ADDR_INC	/;"	d	file:
NFC_ROW_AUTO_INC	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_ROW_AUTO_INC	/;"	d	file:
NFC_ROW_AUTO_INC	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ROW_AUTO_INC /;"	d	file:
NFC_RST	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_RST /;"	d
NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_RST /;"	d
NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_RST /;"	d
NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_RST /;"	d
NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_RST /;"	d
NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_RST /;"	d
NFC_SAM	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SAM	/;"	d	file:
NFC_SECTOR_NUM	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SECTOR_NUM /;"	d	file:
NFC_SECTOR_SIZE	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_SECTOR_SIZE	/;"	d	file:
NFC_SEND_ADR	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SEND_ADR	/;"	d	file:
NFC_SEND_ADR	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SEND_ADR /;"	d	file:
NFC_SEND_CMD1	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SEND_CMD1	/;"	d	file:
NFC_SEND_CMD1	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SEND_CMD1 /;"	d	file:
NFC_SEND_CMD2	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SEND_CMD2	/;"	d	file:
NFC_SEND_CMD2	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SEND_CMD2 /;"	d	file:
NFC_SEND_CMD3	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SEND_CMD3	/;"	d	file:
NFC_SEND_CMD3	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SEND_CMD3 /;"	d	file:
NFC_SEND_CMD4	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SEND_CMD4	/;"	d	file:
NFC_SEND_CMD4	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SEND_CMD4 /;"	d	file:
NFC_SEQ	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SEQ	/;"	d	file:
NFC_SEQ	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SEQ /;"	d	file:
NFC_SPARE_AREA	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_SPARE_AREA(/;"	d	file:
NFC_SPARE_AREA	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_SPARE_AREA /;"	d	file:
NFC_SPARE_BUFFERS	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_SPARE_BUFFERS	/;"	d	file:
NFC_SPARE_LEN	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_SPARE_LEN	/;"	d	file:
NFC_SPARE_ONLY	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_SPARE_ONLY	/;"	d	file:
NFC_SPAS	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_SPAS	/;"	d	file:
NFC_SRAM_SIZE	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_SRAM_SIZE	/;"	d	file:
NFC_ST	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ST /;"	d	file:
NFC_STA	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_STA	/;"	d	file:
NFC_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NFC_STAT /;"	d
NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define NFC_STAT /;"	d
NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define NFC_STAT /;"	d
NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define NFC_STAT /;"	d
NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define NFC_STAT /;"	d
NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define NFC_STAT /;"	d
NFC_STATUS	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_STATUS	/;"	d	file:
NFC_STATUS	drivers/mtd/nand/mxc_nand.h	/^#define NFC_STATUS	/;"	d
NFC_ST_CMD_INT_FLAG	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ST_CMD_INT_FLAG /;"	d	file:
NFC_ST_DMA_INT_FLAG	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_ST_DMA_INT_FLAG /;"	d	file:
NFC_TIMEOUT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_TIMEOUT	/;"	d	file:
NFC_TIMEOUT	drivers/mtd/nand/vf610_nfc.c	/^#define NFC_TIMEOUT	/;"	d	file:
NFC_TIMING_CFG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_TIMING_CFG(/;"	d	file:
NFC_TIMING_CFG	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_TIMING_CFG /;"	d	file:
NFC_TIMING_CTL	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_TIMING_CTL /;"	d	file:
NFC_TIMING_CTL_EDO	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_TIMING_CTL_EDO	/;"	d	file:
NFC_UNLOCKEND_BLK0	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKEND_BLK0	/;"	d	file:
NFC_UNLOCKEND_BLK1	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKEND_BLK1	/;"	d	file:
NFC_UNLOCKEND_BLK2	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKEND_BLK2	/;"	d	file:
NFC_UNLOCKEND_BLK3	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKEND_BLK3	/;"	d	file:
NFC_UNLOCKSTART_BLK0	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKSTART_BLK0	/;"	d	file:
NFC_UNLOCKSTART_BLK1	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKSTART_BLK1	/;"	d	file:
NFC_UNLOCKSTART_BLK2	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKSTART_BLK2	/;"	d	file:
NFC_UNLOCKSTART_BLK3	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_UNLOCKSTART_BLK3	/;"	d	file:
NFC_USER_DATA_BASE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_USER_DATA_BASE /;"	d	file:
NFC_V1_V2_CONFIG1_BIG	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V1_V2_CONFIG1_BIG	/;"	d
NFC_V1_V2_CONFIG1_ECC_EN	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V1_V2_CONFIG1_ECC_EN	/;"	d
NFC_V1_V2_CONFIG1_INT_MSK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V1_V2_CONFIG1_INT_MSK	/;"	d
NFC_V1_V2_CONFIG2_INT	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V1_V2_CONFIG2_INT	/;"	d
NFC_V2_CONFIG1_ECC_MODE_4	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V2_CONFIG1_ECC_MODE_4	/;"	d
NFC_V2_CONFIG1_FP_INT	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V2_CONFIG1_FP_INT	/;"	d
NFC_V2_CONFIG1_ONE_CYCLE	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V2_CONFIG1_ONE_CYCLE	/;"	d
NFC_V3_CONFIG1_RBA	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG1_RBA(/;"	d
NFC_V3_CONFIG1_RBA_MASK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG1_RBA_MASK	/;"	d
NFC_V3_CONFIG2_2CMD_PHASES	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_2CMD_PHASES	/;"	d
NFC_V3_CONFIG2_ECC_EN	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_ECC_EN	/;"	d
NFC_V3_CONFIG2_ECC_MODE_8	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_ECC_MODE_8	/;"	d
NFC_V3_CONFIG2_EDC	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_EDC(/;"	d
NFC_V3_CONFIG2_EDC_MASK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_EDC_MASK	/;"	d
NFC_V3_CONFIG2_INT_MSK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_INT_MSK	/;"	d
NFC_V3_CONFIG2_NUM_ADDR_PH0	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_NUM_ADDR_PH0	/;"	d
NFC_V3_CONFIG2_NUM_ADDR_PH1	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_NUM_ADDR_PH1(/;"	d
NFC_V3_CONFIG2_ONE_CYCLE	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_ONE_CYCLE	/;"	d
NFC_V3_CONFIG2_PPB	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_PPB(/;"	d
NFC_V3_CONFIG2_PPB_MASK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_PPB_MASK	/;"	d
NFC_V3_CONFIG2_PS_2048	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_PS_2048	/;"	d
NFC_V3_CONFIG2_PS_4096	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_PS_4096	/;"	d
NFC_V3_CONFIG2_PS_512	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_PS_512	/;"	d
NFC_V3_CONFIG2_PS_MASK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_PS_MASK	/;"	d
NFC_V3_CONFIG2_SPAS	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_SPAS(/;"	d
NFC_V3_CONFIG2_SPAS_MASK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_SPAS_MASK	/;"	d
NFC_V3_CONFIG2_ST_CMD	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_ST_CMD(/;"	d
NFC_V3_CONFIG2_ST_CMD_MASK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG2_ST_CMD_MASK	/;"	d
NFC_V3_CONFIG3_ADD_OP	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG3_ADD_OP(/;"	d
NFC_V3_CONFIG3_FW8	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG3_FW8	/;"	d
NFC_V3_CONFIG3_NO_SDMA	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG3_NO_SDMA	/;"	d
NFC_V3_CONFIG3_NUM_OF_DEVS	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG3_NUM_OF_DEVS(/;"	d
NFC_V3_CONFIG3_RBB_MODE	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG3_RBB_MODE	/;"	d
NFC_V3_CONFIG3_SBB	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_CONFIG3_SBB(/;"	d
NFC_V3_IPC_CREQ	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_IPC_CREQ	/;"	d
NFC_V3_IPC_INT	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_IPC_INT	/;"	d
NFC_V3_WRPROT_BLS_UNLOCK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_WRPROT_BLS_UNLOCK	/;"	d
NFC_V3_WRPROT_UNLOCK	drivers/mtd/nand/mxc_nand.h	/^#define NFC_V3_WRPROT_UNLOCK	/;"	d
NFC_WAIT_FLAG	drivers/mtd/nand/sunxi_nand.c	/^#define NFC_WAIT_FLAG	/;"	d	file:
NFC_WAIT_FLAG	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_WAIT_FLAG /;"	d	file:
NFC_WCMD_SET	drivers/mtd/nand/sunxi_nand_spl.c	/^#define NFC_WCMD_SET /;"	d	file:
NFC_WPC_LOCK	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_WPC_LOCK	/;"	d	file:
NFC_WPC_LOCK_TIGHT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_WPC_LOCK_TIGHT	/;"	d	file:
NFC_WPC_UNLOCK	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_WPC_UNLOCK	/;"	d	file:
NFC_WRPROT	drivers/mtd/nand/mpc5121_nfc.c	/^#define NFC_WRPROT	/;"	d	file:
NFMS_BIT	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define NFMS_BIT	/;"	d
NFMS_NF_DWIDTH	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define NFMS_NF_DWIDTH	/;"	d
NFMS_NF_PG_SZ	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define NFMS_NF_PG_SZ	/;"	d
NFS	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
NFS3PROC_LOOKUP	net/nfs.h	/^#define NFS3PROC_LOOKUP /;"	d
NFS3_FHSIZE	net/nfs.h	/^#define NFS3_FHSIZE /;"	d
NFSERR_ACCES	net/nfs.h	/^#define NFSERR_ACCES /;"	d
NFSERR_INVAL	net/nfs.h	/^#define NFSERR_INVAL /;"	d
NFSERR_ISDIR	net/nfs.h	/^#define NFSERR_ISDIR /;"	d
NFSERR_NOENT	net/nfs.h	/^#define NFSERR_NOENT /;"	d
NFSERR_PERM	net/nfs.h	/^#define NFSERR_PERM /;"	d
NFSV2_FLAG	net/nfs.c	/^#define NFSV2_FLAG /;"	d	file:
NFSV3_FLAG	net/nfs.c	/^#define NFSV3_FLAG /;"	d	file:
NFS_BOOTCMD	include/configs/colibri_imx7.h	/^#define NFS_BOOTCMD /;"	d
NFS_BOOTCMD	include/configs/colibri_vf.h	/^#define NFS_BOOTCMD /;"	d
NFS_FHSIZE	net/nfs.h	/^#define NFS_FHSIZE /;"	d
NFS_LOOKUP	net/nfs.h	/^#define NFS_LOOKUP /;"	d
NFS_READ	net/nfs.h	/^#define NFS_READ /;"	d
NFS_READLINK	net/nfs.h	/^#define NFS_READLINK /;"	d
NFS_READ_SIZE	net/nfs.h	/^#define NFS_READ_SIZE /;"	d
NFS_RETRY_COUNT	net/nfs.c	/^#define NFS_RETRY_COUNT /;"	d	file:
NFS_RPC_DROP	net/nfs.c	/^#define NFS_RPC_DROP	/;"	d	file:
NFS_RPC_ERR	net/nfs.c	/^#define NFS_RPC_ERR	/;"	d	file:
NFS_RPC_GARBAGE_ARGS	net/nfs.h	/^	NFS_RPC_GARBAGE_ARGS = 4,	\/* procedure can't decode params *\/$/;"	e	enum:rpc_accept_stat
NFS_RPC_PROC_UNAVAIL	net/nfs.h	/^	NFS_RPC_PROC_UNAVAIL = 3,	\/* program can't support procedure *\/$/;"	e	enum:rpc_accept_stat
NFS_RPC_PROG_MISMATCH	net/nfs.h	/^	NFS_RPC_PROG_MISMATCH = 2,	\/* remote can't support version # *\/$/;"	e	enum:rpc_accept_stat
NFS_RPC_PROG_UNAVAIL	net/nfs.h	/^	NFS_RPC_PROG_UNAVAIL = 1,	\/* remote hasn't exported program *\/$/;"	e	enum:rpc_accept_stat
NFS_RPC_SUCCESS	net/nfs.h	/^	NFS_RPC_SUCCESS = 0,	\/* RPC executed successfully *\/$/;"	e	enum:rpc_accept_stat
NFS_RPC_SYSTEM_ERR	net/nfs.h	/^	NFS_RPC_SYSTEM_ERR = 5	\/* errors like memory allocation failure *\/$/;"	e	enum:rpc_accept_stat
NFS_TIMEOUT	net/nfs.c	/^# define NFS_TIMEOUT /;"	d	file:
NF_16BIT_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define NF_16BIT_SEL	/;"	d
NF_FMS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define NF_FMS	/;"	d
NGCC_CTRL_BASE	board/esd/pmc440/pmc440.h	/^#define NGCC_CTRL_BASE /;"	d
NGCC_CTRL_FPGARST_N	board/esd/pmc440/pmc440.h	/^#define NGCC_CTRL_FPGARST_N /;"	d
NGCC_FPGA_CLK	board/esd/pmc440/fpga.c	/^#define NGCC_FPGA_CLK /;"	d	file:
NGCC_FPGA_DATA	board/esd/pmc440/fpga.c	/^#define NGCC_FPGA_DATA /;"	d	file:
NGCC_FPGA_DONE	board/esd/pmc440/fpga.c	/^#define NGCC_FPGA_DONE /;"	d	file:
NGCC_FPGA_INIT	board/esd/pmc440/fpga.c	/^#define NGCC_FPGA_INIT /;"	d	file:
NGCC_FPGA_PRG	board/esd/pmc440/fpga.c	/^#define NGCC_FPGA_PRG /;"	d	file:
NGET	arch/microblaze/include/asm/asm.h	/^#define NGET(/;"	d
NHM_C1_AUTO_DEMOTE	arch/x86/include/asm/msr-index.h	/^#define NHM_C1_AUTO_DEMOTE	/;"	d
NHM_C3_AUTO_DEMOTE	arch/x86/include/asm/msr-index.h	/^#define NHM_C3_AUTO_DEMOTE	/;"	d
NH_MODE	arch/arc/lib/timer.c	/^#define NH_MODE	/;"	d	file:
NIA_ENG_MASK	include/fsl_fman.h	/^#define NIA_ENG_MASK	/;"	d
NIA_ENG_RISC	include/fsl_fman.h	/^#define NIA_ENG_RISC	/;"	d
NIA_RISC_AC_CC	include/fsl_fman.h	/^#define NIA_RISC_AC_CC	/;"	d
NIA_RISC_AC_HC	include/fsl_fman.h	/^#define NIA_RISC_AC_HC	/;"	d
NIA_RISC_AC_IM_RX	include/fsl_fman.h	/^#define NIA_RISC_AC_IM_RX	/;"	d
NIA_RISC_AC_IM_TX	include/fsl_fman.h	/^#define NIA_RISC_AC_IM_TX	/;"	d
NIC0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC0_BASE_ADDR	/;"	d
NIC1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC1_BASE_ADDR	/;"	d
NIC2_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC2_BASE_ADDR	/;"	d
NIC301_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define NIC301_BASE_ADDR	/;"	d
NIC3_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC3_BASE_ADDR	/;"	d
NIC4_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC4_BASE_ADDR	/;"	d
NIC5_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC5_BASE_ADDR	/;"	d
NIC6_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC6_BASE_ADDR	/;"	d
NIC7_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define NIC7_BASE_ADDR	/;"	d
NIC_RECEIVE_MONITOR_MODE	drivers/net/8390.h	/^#define NIC_RECEIVE_MONITOR_MODE /;"	d
NIL	lib/zlib/deflate.c	/^#define NIL /;"	d	file:
NINT	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define NINT	/;"	d
NINT_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define NINT_P	/;"	d
NIOS2	arch/Kconfig	/^config NIOS2$/;"	c	choice:choice07312ef30104
NIOS_MAGIC	arch/nios2/lib/bootm.c	/^#define NIOS_MAGIC /;"	d	file:
NM	Makefile	/^NM		= $(CROSS_COMPILE)nm$/;"	m
NM	include/i8042.h	/^#define NM	/;"	d
NMAX	lib/zlib/adler32.c	/^#define NMAX /;"	d	file:
NMIFCR	arch/sh/include/asm/cpu_sh7722.h	/^#define NMIFCR	/;"	d
NMIFCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	NMIFCR	/;"	d
NMIN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define NMIN	/;"	d
NMI_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
NMI_OFF	arch/x86/cpu/ivybridge/lpc.c	/^#define NMI_OFF	/;"	d	file:
NMSCNTRL	arch/x86/cpu/quark/smc.h	/^#define NMSCNTRL	/;"	d
NO	fs/ext4/ext4_common.h	/^#define NO	/;"	d
NOABORT	drivers/net/ax88180.h	/^  #define NOABORT	/;"	d
NOCACHE_OFFSET	board/renesas/sh7785lcr/selfcheck.c	/^#define NOCACHE_OFFSET	/;"	d	file:
NOCOM	include/sym53c8xx.h	/^	#define	  NOCOM /;"	d
NODE_ADDRESS_SIZE	drivers/net/e1000.h	/^#define NODE_ADDRESS_SIZE /;"	d
NODE_CHUNK	fs/jffs2/jffs2_1pass.c	/^#define	NODE_CHUNK	/;"	d	file:
NODE_CHUNK	fs/jffs2/jffs2_nand_1pass.c	/^#define	NODE_CHUNK	/;"	d	file:
NODE_COUNT	test/dm/core.c	/^#define NODE_COUNT	/;"	d	file:
NODOCSECTIONS	scripts/docproc.c	/^#define NODOCSECTIONS /;"	d	file:
NOEVICTMOD_MSR	arch/x86/cpu/intel_common/car.S	/^#define NOEVICTMOD_MSR	/;"	d	file:
NOEXT_DLL	drivers/ddr/microchip/ddr2_regs.h	/^#define NOEXT_DLL	/;"	d
NOFUNCTION	scripts/docproc.c	/^#define NOFUNCTION /;"	d	file:
NOIDLE	drivers/usb/musb-new/omap2430.h	/^#	define	NOIDLE	/;"	d
NOINT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define NOINT	/;"	d
NOISY	drivers/usb/gadget/pxa25x_udc.h	/^# define NOISY /;"	d
NONCACHE_AREA0_ENDOFFSET	board/amcc/yucca/yucca.h	/^#define NONCACHE_AREA0_ENDOFFSET /;"	d
NONCACHE_AREA1_ENDOFFSET	board/amcc/yucca/yucca.h	/^#define NONCACHE_AREA1_ENDOFFSET /;"	d
NONCACHE_MEMORY_SIZE	board/amcc/yucca/yucca.h	/^#define NONCACHE_MEMORY_SIZE /;"	d
NONDATA_JHEADS_CNT	fs/ubifs/ubifs.h	/^#define NONDATA_JHEADS_CNT /;"	d
NONE	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	NONE = 0,$/;"	e	enum:srds_prtcl
NONE	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	NONE = 0,$/;"	e	enum:srds_prtcl
NONE	arch/arm/mach-tegra/tegra114/clock.c	/^#define NONE(/;"	d	file:
NONE	arch/arm/mach-tegra/tegra124/clock.c	/^#define NONE(/;"	d	file:
NONE	arch/arm/mach-tegra/tegra20/clock.c	/^#define NONE(/;"	d	file:
NONE	arch/arm/mach-tegra/tegra210/clock.c	/^#define NONE(/;"	d	file:
NONE	arch/arm/mach-tegra/tegra30/clock.c	/^#define NONE(/;"	d	file:
NONE	arch/powerpc/include/asm/fsl_serdes.h	/^	NONE = 0,$/;"	e	enum:srds_prtcl
NONE	arch/sandbox/cpu/sdl.c	/^#define NONE /;"	d	file:
NONE	board/compulab/common/omap3_display.c	/^	NONE,$/;"	e	enum:display_type	file:
NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define NONGPIO_DRIVE /;"	d
NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define NONGPIO_DRIVE /;"	d
NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NONGPIO_DRIVE /;"	d
NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define NONGPIO_HYSTERESIS /;"	d
NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define NONGPIO_HYSTERESIS /;"	d
NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NONGPIO_HYSTERESIS /;"	d
NONGPIO_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define NONGPIO_SLEW /;"	d
NONSPACE	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
NONSURF_AP0_SWP_16BPP	include/radeon.h	/^#define NONSURF_AP0_SWP_16BPP	/;"	d
NONSURF_AP0_SWP_32BPP	include/radeon.h	/^#define NONSURF_AP0_SWP_32BPP	/;"	d
NONSURF_AP1_SWP_16BPP	include/radeon.h	/^#define NONSURF_AP1_SWP_16BPP	/;"	d
NONSURF_AP1_SWP_32BPP	include/radeon.h	/^#define NONSURF_AP1_SWP_32BPP	/;"	d
NON_ISO_IN_EP_TIMEOUT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define NON_ISO_IN_EP_TIMEOUT	/;"	d
NON_SECURE_SRAM_END	arch/arm/include/asm/arch-am33xx/omap.h	/^#define NON_SECURE_SRAM_END	/;"	d
NON_SECURE_SRAM_END	arch/arm/include/asm/arch-omap3/omap.h	/^#define NON_SECURE_SRAM_END	/;"	d
NON_SECURE_SRAM_END	arch/arm/include/asm/arch-omap4/omap.h	/^#define NON_SECURE_SRAM_END	/;"	d
NON_SECURE_SRAM_END	arch/arm/include/asm/arch-omap5/omap.h	/^#define NON_SECURE_SRAM_END	/;"	d
NON_SECURE_SRAM_IMG_END	arch/arm/include/asm/arch-am33xx/omap.h	/^#define NON_SECURE_SRAM_IMG_END	/;"	d
NON_SECURE_SRAM_IMG_END	arch/arm/include/asm/arch-omap3/omap.h	/^#define NON_SECURE_SRAM_IMG_END	/;"	d
NON_SECURE_SRAM_IMG_END	arch/arm/include/asm/arch-omap4/omap.h	/^#define NON_SECURE_SRAM_IMG_END	/;"	d
NON_SECURE_SRAM_IMG_END	arch/arm/include/asm/arch-omap5/omap.h	/^#define NON_SECURE_SRAM_IMG_END	/;"	d
NON_SECURE_SRAM_START	arch/arm/include/asm/arch-am33xx/omap.h	/^#define NON_SECURE_SRAM_START	/;"	d
NON_SECURE_SRAM_START	arch/arm/include/asm/arch-omap3/omap.h	/^#define NON_SECURE_SRAM_START	/;"	d
NON_SECURE_SRAM_START	arch/arm/include/asm/arch-omap4/omap.h	/^#define NON_SECURE_SRAM_START	/;"	d
NON_SECURE_SRAM_START	arch/arm/include/asm/arch-omap5/omap.h	/^#define NON_SECURE_SRAM_START	/;"	d
NOOPENDRAIN	arch/arm/include/asm/omap_mmc.h	/^#define NOOPENDRAIN	/;"	d
NOP	arch/microblaze/include/asm/asm.h	/^#define NOP	/;"	d
NOP_CNT_RESET	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_CNT_RESET	/;"	d
NOP_EXIT	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_EXIT	/;"	d
NOP_GET_PS	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_GET_PS	/;"	d
NOP_GET_TICKS	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_GET_TICKS	/;"	d
NOP_NOP	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_NOP	/;"	d
NOP_PAD_ANOMALY_05000198	arch/blackfin/include/asm/blackfin_local.h	/^# define NOP_PAD_ANOMALY_05000198 /;"	d
NOP_PAD_ANOMALY_05000198	arch/blackfin/include/asm/blackfin_local.h	/^# define NOP_PAD_ANOMALY_05000198$/;"	d
NOP_PUTC	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_PUTC	/;"	d
NOP_REPORT	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_REPORT	/;"	d
NOP_REPORT_FIRST	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_REPORT_FIRST	/;"	d
NOP_REPORT_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define NOP_REPORT_LAST	/;"	d
NOR	board/ti/am335x/Kconfig	/^config NOR$/;"	c
NORMAL	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define NORMAL /;"	d
NORMAL	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define NORMAL	/;"	d	file:
NORMAL	include/i8042.h	/^#define NORMAL	/;"	d
NORMAL	include/power/power_chrg.h	/^	NORMAL,$/;"	e	enum:__anond3b5e45a0203
NORMAL	scripts/kconfig/nconf.h	/^	NORMAL = 1,$/;"	e	enum:__anon6c8863760103
NORMALIZE	lib/lzma/LzmaDec.c	/^#define NORMALIZE /;"	d	file:
NORMALIZE_CHECK	lib/lzma/LzmaDec.c	/^#define NORMALIZE_CHECK /;"	d	file:
NORMAL_DRIVERS	drivers/mtd/nand/Makefile	/^NORMAL_DRIVERS=y$/;"	m
NORMAL_LIBGCC	arch/x86/lib/Makefile	/^NORMAL_LIBGCC = $(shell $(CC) $(PLATFORM_CPPFLAGS) -print-libgcc-file-name)$/;"	m
NORMAL_MTDPARTS_DEFAULT	include/configs/s5pc210_universal.h	/^#define NORMAL_MTDPARTS_DEFAULT /;"	d
NORMAL_MTDPARTS_DEFAULT	include/configs/smdkc100.h	/^#define NORMAL_MTDPARTS_DEFAULT /;"	d
NORMAL_OPERATION	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define NORMAL_OPERATION	/;"	d
NORMAL_RX_MODE	drivers/net/ax88180.h	/^#define NORMAL_RX_MODE	/;"	d
NORMAL_START	tools/patman/terminal.py	/^    NORMAL_START = '\\033[22;%dm'$/;"	v	class:Color
NORMAL_TEMP	arch/arm/mach-keystone/ddr3_spd.c	/^	NORMAL_TEMP,$/;"	e	enum:srt	file:
NORTHBRIDGE_INTEL_IVYBRIDGE	arch/x86/cpu/ivybridge/Kconfig	/^config NORTHBRIDGE_INTEL_IVYBRIDGE$/;"	c
NOR_BOOT	arch/powerpc/cpu/mpc85xx/start.S	/^#define NOR_BOOT$/;"	d	file:
NOR_BOOT	common/Kconfig	/^config NOR_BOOT$/;"	c	menu:Boot media
NOSRA_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define NOSRA_MASK /;"	d
NOSTDBY	drivers/usb/musb-new/omap2430.h	/^#	define	NOSTDBY	/;"	d
NOT	tools/buildman/kconfiglib.py	/^AND, OR, NOT, EQUAL, UNEQUAL = range(5)$/;"	v
NOTALIGNED	drivers/mtd/nand/nand_base.c	/^#define NOTALIGNED(/;"	d	file:
NOTALIGNED	drivers/mtd/onenand/onenand_base.c	/^#define NOTALIGNED(/;"	d	file:
NOTICE	tools/patman/tout.py	/^NOTICE = 2$/;"	v
NOT_AVAILABLE	arch/arm/mach-exynos/exynos5_setup.h	/^#define NOT_AVAILABLE	/;"	d
NOT_EARLY	arch/arm/include/asm/arch-omap3/cpu.h	/^#define NOT_EARLY	/;"	d
NOT_ON_MEDIA	fs/ubifs/tnc.c	/^	NOT_ON_MEDIA = 3,$/;"	e	enum:__anonbf88c1eb0103	file:
NOVENA_AUDIO_PWRON	board/kosagi/novena/novena.h	/^#define NOVENA_AUDIO_PWRON	/;"	d
NOVENA_BACKLIGHT_PWM_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_BACKLIGHT_PWM_GPIO	/;"	d
NOVENA_BACKLIGHT_PWR_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_BACKLIGHT_PWR_GPIO	/;"	d
NOVENA_BUTTON_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_BUTTON_GPIO	/;"	d
NOVENA_FPGA_RESET_N_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_FPGA_RESET_N_GPIO	/;"	d
NOVENA_HDMI_GHOST_HPD	board/kosagi/novena/novena.h	/^#define NOVENA_HDMI_GHOST_HPD	/;"	d
NOVENA_IT6251_CHIPADDR	board/kosagi/novena/novena.h	/^#define NOVENA_IT6251_CHIPADDR	/;"	d
NOVENA_IT6251_I2C_BUS	board/kosagi/novena/novena.h	/^#define NOVENA_IT6251_I2C_BUS	/;"	d
NOVENA_IT6251_LVDSADDR	board/kosagi/novena/novena.h	/^#define NOVENA_IT6251_LVDSADDR	/;"	d
NOVENA_ITE6251_PWR_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_ITE6251_PWR_GPIO	/;"	d
NOVENA_PCIE_DISABLE_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_PCIE_DISABLE_GPIO	/;"	d
NOVENA_PCIE_POWER_ON_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_PCIE_POWER_ON_GPIO	/;"	d
NOVENA_PCIE_RESET_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_PCIE_RESET_GPIO	/;"	d
NOVENA_PCIE_WAKE_UP_GPIO	board/kosagi/novena/novena.h	/^#define NOVENA_PCIE_WAKE_UP_GPIO	/;"	d
NOVENA_SD_CD	board/kosagi/novena/novena.h	/^#define NOVENA_SD_CD	/;"	d
NOVENA_SD_WP	board/kosagi/novena/novena.h	/^#define NOVENA_SD_WP	/;"	d
NOW_IS_OOB	drivers/usb/eth/r8152.h	/^#define NOW_IS_OOB	/;"	d
NO_ADV	include/mv88e6352.h	/^#define NO_ADV	/;"	d
NO_AUTOPROBE	drivers/net/smc91111.c	/^#define NO_AUTOPROBE$/;"	d	file:
NO_CLOCKS	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define NO_CLOCKS	/;"	d
NO_CLOCKS	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define NO_CLOCKS	/;"	d
NO_COMMAND	board/bf533-ezkit/flash-defines.h	/^#define NO_COMMAND	/;"	d
NO_COMP	include/jffs2/mini_inflate.h	/^#define NO_COMP /;"	d
NO_DATA	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define NO_DATA	/;"	d
NO_DMA	drivers/video/ipu.h	/^#define NO_DMA /;"	d
NO_DUMMY_DECL	include/u-boot/zlib.h	/^#  define NO_DUMMY_DECL$/;"	d
NO_DUMMY_DECL	lib/zlib/zlib.c	/^#define NO_DUMMY_DECL$/;"	d	file:
NO_ERROR	board/v38b/ethaddr.c	/^#define NO_ERROR	/;"	d	file:
NO_ERROR	include/jffs2/mini_inflate.h	/^#define NO_ERROR /;"	d
NO_GALOIS_TABLE_IN_ROM	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define NO_GALOIS_TABLE_IN_ROM$/;"	d
NO_GALOIS_TABLE_IN_ROM	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define NO_GALOIS_TABLE_IN_ROM$/;"	d
NO_LAYOUT_FIELDS	common/eeprom/eeprom_layout.c	/^#define NO_LAYOUT_FIELDS	/;"	d	file:
NO_MAC_ADDR	board/compulab/cm_fx6/cm_fx6.c	/^#define NO_MAC_ADDR	/;"	d	file:
NO_MUX_I	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define NO_MUX_I	/;"	d
NO_OF_FIFOS	arch/mips/mach-au1x00/au1x00_eth.c	/^#define NO_OF_FIFOS /;"	d	file:
NO_PAD_CTRL	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define NO_PAD_CTRL	/;"	d
NO_PAD_I	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define NO_PAD_I	/;"	d
NO_PATTERN	arch/arm/mach-exynos/include/mach/dp_info.h	/^	NO_PATTERN,$/;"	e	enum:pattern_type
NO_PHY_DETECT	include/mv88e6352.h	/^#define NO_PHY_DETECT	/;"	d
NO_PROBE_ADDR	cmd/i2c.c	/^#define NO_PROBE_ADDR(/;"	d	file:
NO_SELECTION	tools/buildman/kconfiglib.py	/^NO_SELECTION = 0$/;"	v
NO_SPEED_FOR	include/mv88e6352.h	/^#define NO_SPEED_FOR	/;"	d
NO_TEST_DONE	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	NO_TEST_DONE = 2$/;"	e	enum:hws_result
NO_WAIT_FOR_FRAME_DONE	drivers/video/da8xx-fb.c	/^#define NO_WAIT_FOR_FRAME_DONE	/;"	d	file:
NO_vsnprintf	include/u-boot/zlib.h	/^#  define NO_vsnprintf$/;"	d
NPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define NPLL_HZ	/;"	d
NPLL_MODE_DEEP	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	NPLL_MODE_DEEP,$/;"	e	enum:__anon3783c4e20703
NPLL_MODE_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	NPLL_MODE_MASK		= 3,$/;"	e	enum:__anon3783c4e20703
NPLL_MODE_NORMAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	NPLL_MODE_NORMAL,$/;"	e	enum:__anon3783c4e20703
NPLL_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	NPLL_MODE_SHIFT		= 0xe,$/;"	e	enum:__anon3783c4e20703
NPLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	NPLL_MODE_SLOW		= 0,$/;"	e	enum:__anon3783c4e20703
NPTXFE_HALF	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define NPTXFE_HALF	/;"	d
NPTXFE_ZERO	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define NPTXFE_ZERO	/;"	d
NPTX_ACKNOWLDGE2	drivers/net/e1000.h	/^#define NPTX_ACKNOWLDGE2	/;"	d
NPTX_FIFO_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define NPTX_FIFO_SIZE	/;"	d
NPTX_MSG_CODE_FIELD	drivers/net/e1000.h	/^#define NPTX_MSG_CODE_FIELD	/;"	d
NPTX_MSG_PAGE	drivers/net/e1000.h	/^#define NPTX_MSG_PAGE	/;"	d
NPTX_NEXT_PAGE	drivers/net/e1000.h	/^#define NPTX_NEXT_PAGE	/;"	d
NPTX_TOGGLE	drivers/net/e1000.h	/^#define NPTX_TOGGLE	/;"	d
NPUT	arch/microblaze/include/asm/asm.h	/^#define NPUT(/;"	d
NQWAIT_UNTIL	include/radeon.h	/^#define NQWAIT_UNTIL	/;"	d
NRDY	drivers/usb/host/r8a66597.h	/^#define	NRDY	/;"	d
NRDY0	drivers/usb/host/r8a66597.h	/^#define	NRDY0	/;"	d
NRDY1	drivers/usb/host/r8a66597.h	/^#define	NRDY1	/;"	d
NRDY2	drivers/usb/host/r8a66597.h	/^#define	NRDY2	/;"	d
NRDY3	drivers/usb/host/r8a66597.h	/^#define	NRDY3	/;"	d
NRDY4	drivers/usb/host/r8a66597.h	/^#define	NRDY4	/;"	d
NRDY5	drivers/usb/host/r8a66597.h	/^#define	NRDY5	/;"	d
NRDY6	drivers/usb/host/r8a66597.h	/^#define	NRDY6	/;"	d
NRDY7	drivers/usb/host/r8a66597.h	/^#define	NRDY7	/;"	d
NRDY8	drivers/usb/host/r8a66597.h	/^#define	NRDY8	/;"	d
NRDY9	drivers/usb/host/r8a66597.h	/^#define	NRDY9	/;"	d
NRDYE	drivers/usb/host/r8a66597.h	/^#define	NRDYE	/;"	d
NRDYENB	drivers/usb/host/r8a66597.h	/^#define NRDYENB	/;"	d
NRDYSTS	drivers/usb/host/r8a66597.h	/^#define NRDYSTS	/;"	d
NREGS_OFS	arch/sparc/cpu/leon3/memcfg.h	/^#define NREGS_OFS /;"	d
NRES	common/cli_hush.c	/^#define NRES /;"	d	file:
NRSTPIN_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NRSTPIN_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define NRSTPIN_RESET	/;"	d
NR_8259_INTS	include/mpc8xx_irq.h	/^#define	NR_8259_INTS	/;"	d
NR_BANKS	arch/arm/include/asm/setup.h	/^#define NR_BANKS /;"	d
NR_BANKS	arch/nds32/include/asm/setup.h	/^#define NR_BANKS /;"	d
NR_DATX8_PER_DDRPHY	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^#define NR_DATX8_PER_DDRPHY	/;"	d	file:
NR_GPIO_CONTROLLERS	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define NR_GPIO_CONTROLLERS	/;"	d
NR_INFO	drivers/net/ne2000.c	/^#define NR_INFO	/;"	d	file:
NR_IRQS	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define NR_IRQS /;"	d
NR_IRQS	arch/m68k/lib/interrupts.c	/^#define	NR_IRQS	/;"	d	file:
NR_IRQS	arch/powerpc/cpu/mpc5xx/interrupts.c	/^#define NR_IRQS /;"	d	file:
NR_IRQS	arch/sparc/cpu/leon2/interrupts.c	/^#define NR_IRQS /;"	d	file:
NR_IRQS	arch/sparc/cpu/leon3/interrupts.c	/^#define NR_IRQS /;"	d	file:
NR_IRQS	include/mpc5xx.h	/^#define NR_IRQS	/;"	d
NR_IRQS	include/mpc5xxx.h	/^#define NR_IRQS	/;"	d
NR_IRQS	include/mpc8260_irq.h	/^#define NR_IRQS	/;"	d
NR_IRQS	include/mpc8xx_irq.h	/^#define NR_IRQS	/;"	d
NR_MASK_WORDS	include/mpc8260_irq.h	/^#define NR_MASK_WORDS	/;"	d
NR_NODES	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define NR_NODES	/;"	d
NR_PIO_SPECS	drivers/block/mxc_ata.c	/^#define	NR_PIO_SPECS	/;"	d	file:
NR_PORTS	drivers/block/sata_ceva.c	/^#define NR_PORTS	/;"	d	file:
NR_SIU_INTS	include/mpc8260_irq.h	/^#define NR_SIU_INTS	/;"	d
NR_SIU_INTS	include/mpc8xx_irq.h	/^#define NR_SIU_INTS	/;"	d
NR_TO_WRITE	fs/ubifs/budget.c	/^#define NR_TO_WRITE /;"	d	file:
NS10to10PS	board/mpl/pip405/pip405.c	/^unsigned short NS10to10PS (unsigned char spd_byte, unsigned char spd_version)$/;"	f	typeref:typename:unsigned short
NS16550	include/ns16550.h	/^struct NS16550 {$/;"	s
NS16550A_BASE	arch/arm/mach-uniphier/micro-support-card.c	/^#define NS16550A_BASE	/;"	d	file:
NS16550_getc	drivers/serial/ns16550.c	/^char NS16550_getc(NS16550_t com_port)$/;"	f	typeref:typename:char
NS16550_init	drivers/serial/ns16550.c	/^void NS16550_init(NS16550_t com_port, int baud_divisor)$/;"	f	typeref:typename:void
NS16550_putc	drivers/serial/ns16550.c	/^void NS16550_putc(NS16550_t com_port, char c)$/;"	f	typeref:typename:void
NS16550_reinit	drivers/serial/ns16550.c	/^void NS16550_reinit(NS16550_t com_port, int baud_divisor)$/;"	f	typeref:typename:void
NS16550_setbrg	drivers/serial/ns16550.c	/^static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)$/;"	f	typeref:typename:void	file:
NS16550_t	include/ns16550.h	/^typedef struct NS16550 *NS16550_t;$/;"	t	typeref:struct:NS16550 *
NS16550_tstc	drivers/serial/ns16550.c	/^int NS16550_tstc(NS16550_t com_port)$/;"	f	typeref:typename:int
NS2CLK	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define NS2CLK(/;"	d	file:
NS2CLK	board/st/stm32f746-disco/stm32f746-disco.c	/^#define NS2CLK(/;"	d	file:
NS2CYCLES_FLOOR	arch/arm/mach-sunxi/dram_sun9i.c	/^#define NS2CYCLES_FLOOR(/;"	d	file:
NS2CYCLES_ROUNDUP	arch/arm/mach-sunxi/dram_sun9i.c	/^#define NS2CYCLES_ROUNDUP(/;"	d	file:
NS4to10PS	board/mpl/pip405/pip405.c	/^unsigned short NS4to10PS (unsigned char spd_byte, unsigned char spd_version)$/;"	f	typeref:typename:unsigned short
NSA310S_OE_HIGH	board/zyxel/nsa310s/nsa310s.h	/^#define NSA310S_OE_HIGH	/;"	d
NSA310S_OE_LOW	board/zyxel/nsa310s/nsa310s.h	/^#define NSA310S_OE_LOW	/;"	d
NSA310S_VAL_HIGH	board/zyxel/nsa310s/nsa310s.h	/^#define NSA310S_VAL_HIGH	/;"	d
NSA310S_VAL_LOW	board/zyxel/nsa310s/nsa310s.h	/^#define NSA310S_VAL_LOW	/;"	d
NSCU_GCRX_CXOE	drivers/pcmcia/tqm8xx_pcmcia.c	/^#define	NSCU_GCRX_CXOE	/;"	d	file:
NSEC_PER_SEC	fs/ubifs/ubifs.h	/^#define NSEC_PER_SEC	/;"	d
NSR_LINKST	drivers/net/dm9000x.h	/^#define NSR_LINKST	/;"	d
NSR_RXOV	drivers/net/dm9000x.h	/^#define NSR_RXOV	/;"	d
NSR_SPEED	drivers/net/dm9000x.h	/^#define NSR_SPEED	/;"	d
NSR_TX1END	drivers/net/dm9000x.h	/^#define NSR_TX1END	/;"	d
NSR_TX2END	drivers/net/dm9000x.h	/^#define NSR_TX2END	/;"	d
NSR_WAKEST	drivers/net/dm9000x.h	/^#define NSR_WAKEST	/;"	d
NSS_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^#define NSS_PLL /;"	d
NS_IN_SEC	arch/arm/cpu/armv7/s5p-common/pwm.c	/^#define NS_IN_SEC /;"	d	file:
NS_PER_REF_CLK_TICK	include/configs/thunderx_88xx.h	/^#define NS_PER_REF_CLK_TICK	/;"	d
NS_RST_VEC_WR_DIS	arch/arm/mach-tegra/psci.S	/^#define NS_RST_VEC_WR_DIS	/;"	d	file:
NSto10PS	board/mpl/pip405/pip405.c	/^unsigned short NSto10PS (unsigned char spd_byte)$/;"	f	typeref:typename:unsigned short
NTP_LI_59SECS	net/sntp.h	/^#define NTP_LI_59SECS	/;"	d
NTP_LI_61SECS	net/sntp.h	/^#define NTP_LI_61SECS	/;"	d
NTP_LI_ALARM	net/sntp.h	/^#define NTP_LI_ALARM	/;"	d
NTP_LI_NOLEAP	net/sntp.h	/^#define NTP_LI_NOLEAP	/;"	d
NTP_MODE_BROADCAST	net/sntp.h	/^#define NTP_MODE_BROADCAST	/;"	d
NTP_MODE_CLIENT	net/sntp.h	/^#define NTP_MODE_CLIENT	/;"	d
NTP_MODE_NTPCTRL	net/sntp.h	/^#define NTP_MODE_NTPCTRL	/;"	d
NTP_MODE_PRIVATE	net/sntp.h	/^#define NTP_MODE_PRIVATE	/;"	d
NTP_MODE_RESERVED	net/sntp.h	/^#define NTP_MODE_RESERVED	/;"	d
NTP_MODE_SERVER	net/sntp.h	/^#define NTP_MODE_SERVER	/;"	d
NTP_MODE_SYMACTIVE	net/sntp.h	/^#define NTP_MODE_SYMACTIVE	/;"	d
NTP_MODE_SYMPASSIVE	net/sntp.h	/^#define NTP_MODE_SYMPASSIVE	/;"	d
NTP_SERVICE_PORT	net/sntp.h	/^#define NTP_SERVICE_PORT	/;"	d
NTP_VERSION	net/sntp.h	/^#define NTP_VERSION	/;"	d
NTSC_FRAME_ADDR	board/bf533-stamp/video.c	/^#define NTSC_FRAME_ADDR /;"	d	file:
NTSC_framebuffer_init	board/bf533-stamp/video.c	/^int NTSC_framebuffer_init(char *base_address)$/;"	f	typeref:typename:int
NULL	fs/yaffs2/yaffsfs.c	/^#define NULL /;"	d	file:
NULL	include/bedbug/bedbug.h	/^#define NULL	/;"	d
NULL	include/command.h	/^#define NULL	/;"	d
NULL	include/linux/stddef.h	/^#define NULL /;"	d
NULL	lib/bzip2/bzlib_private.h	/^#define NULL /;"	d
NULL_GUID	include/efi_api.h	/^#define NULL_GUID /;"	d
NULL_O_STRING	common/cli_hush.c	/^#define NULL_O_STRING /;"	d	file:
NUM	include/i8042.h	/^#define NUM	/;"	d
NUMBER_OF_PLANES	drivers/mtd/nand/denali.h	/^#define NUMBER_OF_PLANES	/;"	d
NUMBER_OF_PLANES__VALUE	drivers/mtd/nand/denali.h	/^#define     NUMBER_OF_PLANES__VALUE	/;"	d
NUMHALFCYCLES	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define NUMHALFCYCLES	/;"	d	file:
NUMHOSTCMD	drivers/ddr/microchip/ddr2_regs.h	/^#define NUMHOSTCMD(/;"	d
NUMLOOPS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define NUMLOOPS	/;"	d	file:
NUMLOOPS	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^#define NUMLOOPS	/;"	d	file:
NUMMEMTESTS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define NUMMEMTESTS	/;"	d	file:
NUMMEMTESTS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define NUMMEMTESTS	/;"	d	file:
NUMMEMTESTS	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^#define NUMMEMTESTS	/;"	d	file:
NUMMEMWORDS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define NUMMEMWORDS	/;"	d	file:
NUMMEMWORDS	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define NUMMEMWORDS	/;"	d	file:
NUMMEMWORDS	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^#define NUMMEMWORDS	/;"	d	file:
NUMOFVARIANTS	include/MCD_dma.h	/^#define NUMOFVARIANTS	/;"	d
NUMONYX_256MBIT	include/flash.h	/^#define NUMONYX_256MBIT	/;"	d
NUMONYX_RASWIDTH_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_RASWIDTH_165	/;"	d
NUMONYX_RASWIDTH_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_RASWIDTH_200	/;"	d
NUMONYX_TCKE_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TCKE_165	/;"	d
NUMONYX_TCKE_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TCKE_200	/;"	d
NUMONYX_TDAL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TDAL_165	/;"	d
NUMONYX_TDAL_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TDAL_200	/;"	d
NUMONYX_TDPL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TDPL_165	/;"	d
NUMONYX_TDPL_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TDPL_200	/;"	d
NUMONYX_TRAS_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRAS_165	/;"	d
NUMONYX_TRAS_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRAS_200	/;"	d
NUMONYX_TRCD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRCD_165	/;"	d
NUMONYX_TRCD_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRCD_200	/;"	d
NUMONYX_TRC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRC_165	/;"	d
NUMONYX_TRC_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRC_200	/;"	d
NUMONYX_TRFC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRFC_165	/;"	d
NUMONYX_TRFC_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRFC_200 /;"	d
NUMONYX_TRP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRP_165	/;"	d
NUMONYX_TRP_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRP_200	/;"	d
NUMONYX_TRRD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRRD_165	/;"	d
NUMONYX_TRRD_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TRRD_200	/;"	d
NUMONYX_TWTR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TWTR_165	/;"	d
NUMONYX_TWTR_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TWTR_200	/;"	d
NUMONYX_TXP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TXP_165	/;"	d
NUMONYX_TXP_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_TXP_200	/;"	d
NUMONYX_V_ACTIMA_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_V_ACTIMA_165	/;"	d
NUMONYX_V_ACTIMA_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_V_ACTIMA_200	/;"	d
NUMONYX_V_ACTIMB_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_V_ACTIMB_165	/;"	d
NUMONYX_V_ACTIMB_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_V_ACTIMB_200	/;"	d
NUMONYX_V_MCFG_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_V_MCFG_165(/;"	d
NUMONYX_V_MCFG_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_V_MCFG_200(/;"	d
NUMONYX_XSR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_XSR_165	/;"	d
NUMONYX_XSR_200	arch/arm/include/asm/arch-omap3/mem.h	/^#define NUMONYX_XSR_200	/;"	d
NUMREGBYTES	arch/blackfin/lib/kgdb.h	/^#define NUMREGBYTES /;"	d
NUMRXDESC	drivers/net/ep93xx_eth.h	/^#define NUMRXDESC	/;"	d
NUMTHREADS	examples/standalone/sched.c	/^#define NUMTHREADS /;"	d	file:
NUMTXDESC	drivers/net/ep93xx_eth.h	/^#define NUMTXDESC	/;"	d
NUMTXQ	drivers/net/bcm-sf2-eth-gmac.h	/^#define NUMTXQ	/;"	d
NUM_ACM_INTERFACES	drivers/serial/usbtty.c	/^#define NUM_ACM_INTERFACES /;"	d	file:
NUM_AGENTS	arch/mips/mach-pic32/include/mach/ddr.h	/^#define NUM_AGENTS	/;"	d
NUM_BOOT_ENTRY	arch/powerpc/cpu/mpc85xx/mp.h	/^#define NUM_BOOT_ENTRY	/;"	d
NUM_BYTES_IN_BURST	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define NUM_BYTES_IN_BURST	/;"	d
NUM_BYTE_LANES	arch/arm/mach-exynos/dmc_init_ddr3.c	/^#define NUM_BYTE_LANES	/;"	d	file:
NUM_BYTE_LANES	arch/x86/include/asm/arch-quark/mrc.h	/^#define NUM_BYTE_LANES	/;"	d
NUM_CALIB_REPEAT	drivers/ddr/altera/sequencer.h	/^#define NUM_CALIB_REPEAT	/;"	d
NUM_CHANNELS	arch/x86/include/asm/arch-quark/mrc.h	/^#define NUM_CHANNELS	/;"	d
NUM_CHIP_2	arch/arm/mach-exynos/exynos4_setup.h	/^#define NUM_CHIP_2	/;"	d
NUM_CHIP_SELECT	drivers/mtd/nand/pxa3xx_nand.h	/^#define NUM_CHIP_SELECT	/;"	d
NUM_CONFIGS	drivers/serial/usbtty.c	/^#define NUM_CONFIGS /;"	d	file:
NUM_CON_VSC3308	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^#define NUM_CON_VSC3308	/;"	d
NUM_CON_VSC3316	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^#define NUM_CON_VSC3316	/;"	d
NUM_CPM_HOST_PAGES	arch/powerpc/include/asm/cpm_8260.h	/^#define NUM_CPM_HOST_PAGES	/;"	d
NUM_CPM_HOST_PAGES	arch/powerpc/include/asm/cpm_85xx.h	/^#define NUM_CPM_HOST_PAGES	/;"	d
NUM_CRYSTAL_FREQ	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define NUM_CRYSTAL_FREQ	/;"	d
NUM_DDR_CONTROLLERS	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config NUM_DDR_CONTROLLERS$/;"	c	menu:LS102xA architecture
NUM_DDR_CONTROLLERS	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config NUM_DDR_CONTROLLERS$/;"	c	menu:Layerscape architecture
NUM_DESCS	drivers/net/cpsw.c	/^#define NUM_DESCS	/;"	d	file:
NUM_DEV_IDS	drivers/net/e1000.h	/^#define NUM_DEV_IDS /;"	d
NUM_DSP_REGS	arch/mips/include/asm/processor.h	/^#define NUM_DSP_REGS /;"	d
NUM_EDS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define NUM_EDS /;"	d
NUM_EDS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define NUM_EDS /;"	d
NUM_EDS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define NUM_EDS /;"	d
NUM_EDS	drivers/usb/host/ohci-s3c24xx.h	/^#define NUM_EDS /;"	d
NUM_EDS	drivers/usb/host/ohci.h	/^#define NUM_EDS /;"	d
NUM_ENDPOINTS	drivers/serial/usbtty.c	/^#define NUM_ENDPOINTS /;"	d	file:
NUM_ENDPOINTS	drivers/usb/gadget/at91_udc.h	/^#define	NUM_ENDPOINTS	/;"	d
NUM_ENDPOINTS	drivers/usb/gadget/ci_udc.h	/^#define NUM_ENDPOINTS	/;"	d
NUM_ERASE_REGIONS	include/mtd/cfi_flash.h	/^#define NUM_ERASE_REGIONS	/;"	d
NUM_FILESYS	fs/fat/file.c	/^#define NUM_FILESYS	/;"	d	file:
NUM_FIXED_MTRRS	arch/x86/include/asm/mtrr.h	/^#define NUM_FIXED_MTRRS	/;"	d
NUM_FIXED_RANGES	arch/x86/include/asm/mtrr.h	/^#define NUM_FIXED_RANGES	/;"	d
NUM_FM_PORTS	include/fm_eth.h	/^	NUM_FM_PORTS,$/;"	e	enum:fm_port
NUM_FPU_REGS	arch/mips/include/asm/processor.h	/^#define NUM_FPU_REGS	/;"	d
NUM_FREE_BLOCKS_GATE	drivers/mtd/nand/denali.h	/^#define NUM_FREE_BLOCKS_GATE /;"	d
NUM_GPRS	arch/microblaze/include/asm/ptrace.h	/^#define NUM_GPRS	/;"	d
NUM_GSERIAL_INTERFACES	drivers/serial/usbtty.c	/^#define NUM_GSERIAL_INTERFACES /;"	d	file:
NUM_HEX_CHARS	board/freescale/common/fsl_validate.c	/^#define NUM_HEX_CHARS	/;"	d	file:
NUM_HOST_CMDS	drivers/ddr/microchip/ddr2_regs.h	/^#define NUM_HOST_CMDS	/;"	d
NUM_IDT_REGS	board/freescale/common/idt8t49n222a_serdes_clk.h	/^#define NUM_IDT_REGS	/;"	d
NUM_IDT_REGS_156_25	board/freescale/common/idt8t49n222a_serdes_clk.h	/^#define NUM_IDT_REGS_156_25	/;"	d
NUM_IDT_REGS_FEEDBACK	board/freescale/common/idt8t49n222a_serdes_clk.h	/^#define NUM_IDT_REGS_FEEDBACK	/;"	d
NUM_INTS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define NUM_INTS /;"	d
NUM_INTS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define NUM_INTS /;"	d
NUM_INTS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define NUM_INTS /;"	d
NUM_INTS	drivers/usb/host/ohci-s3c24xx.h	/^#define NUM_INTS /;"	d
NUM_INTS	drivers/usb/host/ohci.h	/^#define NUM_INTS /;"	d
NUM_INT_DEVS	drivers/usb/host/ohci.h	/^#define NUM_INT_DEVS /;"	d
NUM_LOCK	common/usb_kbd.c	/^#define NUM_LOCK	/;"	d	file:
NUM_OD_SETTING	board/freescale/common/ics307_clk.c	/^#define NUM_OD_SETTING	/;"	d	file:
NUM_OF_CENTRAL_TYPES	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^#define NUM_OF_CENTRAL_TYPES	/;"	d	file:
NUM_OF_CS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define NUM_OF_CS	/;"	d
NUM_OF_PBS_MODES	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	NUM_OF_PBS_MODES$/;"	e	enum:pbs_dir
NUM_OF_PINS	arch/powerpc/cpu/mpc83xx/qe_io.c	/^#define	NUM_OF_PINS	/;"	d	file:
NUM_OF_PINS	arch/powerpc/cpu/mpc85xx/qe_io.c	/^#define	NUM_OF_PINS	/;"	d	file:
NUM_OF_REGISTER_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define NUM_OF_REGISTER_ADDR	/;"	d
NUM_OF_REGISTER_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define NUM_OF_REGISTER_ADDR	/;"	d
NUM_OPPS	board/ti/am43xx/board.c	/^#define NUM_OPPS	/;"	d	file:
NUM_PAGES_IN_BLOCK	drivers/mtd/nand/denali.h	/^#define NUM_PAGES_IN_BLOCK /;"	d
NUM_PORTS	drivers/serial/serial_pl01x.c	/^#define NUM_PORTS /;"	d	file:
NUM_PPAACT_ENTRIES	arch/powerpc/include/asm/fsl_pamu.h	/^#define NUM_PPAACT_ENTRIES	/;"	d
NUM_RANKS	arch/x86/include/asm/arch-quark/mrc.h	/^#define NUM_RANKS	/;"	d
NUM_RANKS_PER_SHADOW_REG	drivers/ddr/altera/sequencer.h	/^#define NUM_RANKS_PER_SHADOW_REG /;"	d
NUM_READINGS	board/freescale/b4860qds/b4860qds.c	/^#define NUM_READINGS	/;"	d	file:
NUM_READINGS	board/freescale/common/vid.c	/^#define NUM_READINGS /;"	d	file:
NUM_READINGS	board/freescale/t4qds/t4240qds.c	/^#define NUM_READINGS	/;"	d	file:
NUM_READS	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^#define NUM_READS /;"	d	file:
NUM_READS	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define NUM_READS /;"	d	file:
NUM_READS	board/amcc/yosemite/yosemite.c	/^#define NUM_READS /;"	d	file:
NUM_READ_PB_TESTS	drivers/ddr/altera/sequencer.h	/^#define NUM_READ_PB_TESTS	/;"	d
NUM_READ_TESTS	drivers/ddr/altera/sequencer.h	/^#define NUM_READ_TESTS	/;"	d
NUM_RX_BDS	arch/powerpc/cpu/mpc8260/i2c.c	/^#define NUM_RX_BDS /;"	d	file:
NUM_RX_BDS	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define NUM_RX_BDS /;"	d	file:
NUM_RX_BUFF	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define NUM_RX_BUFF /;"	d
NUM_RX_DESC	drivers/net/dc2114x.c	/^#define NUM_RX_DESC /;"	d	file:
NUM_RX_DESC	drivers/net/eepro100.c	/^#define NUM_RX_DESC	/;"	d	file:
NUM_RX_DESC	drivers/net/natsemi.c	/^#define NUM_RX_DESC	/;"	d	file:
NUM_RX_DESC	drivers/net/ns8382x.c	/^#define NUM_RX_DESC /;"	d	file:
NUM_RX_DESC	drivers/net/rtl8169.c	/^  #define NUM_RX_DESC	/;"	d	file:
NUM_RX_DESC	drivers/net/sh_eth.h	/^#define NUM_RX_DESC	/;"	d
NUM_RX_DESC	drivers/net/tsi108_eth.c	/^#define NUM_RX_DESC	/;"	d	file:
NUM_SDL_CODES	arch/sandbox/cpu/sdl.c	/^#define NUM_SDL_CODES	/;"	d	file:
NUM_SECS_IN_DAY	drivers/rtc/bfin_rtc.c	/^#define NUM_SECS_IN_DAY /;"	d	file:
NUM_SECS_IN_HR	drivers/rtc/bfin_rtc.c	/^#define NUM_SECS_IN_HR /;"	d	file:
NUM_SECS_IN_MIN	drivers/rtc/bfin_rtc.c	/^#define NUM_SECS_IN_MIN /;"	d	file:
NUM_SHADOW_REGS	drivers/ddr/altera/sequencer.h	/^#define NUM_SHADOW_REGS	/;"	d
NUM_SPAACT_ENTRIES	arch/powerpc/include/asm/fsl_pamu.h	/^#define NUM_SPAACT_ENTRIES	/;"	d
NUM_SPDS	arch/arm/mach-keystone/include/mach/clock.h	/^	NUM_SPDS,$/;"	e	enum:__anonc27926650103
NUM_SPECIAL	arch/microblaze/include/asm/ptrace.h	/^#define NUM_SPECIAL	/;"	d
NUM_SRDS_BANKS	board/freescale/b4860qds/b4860qds.c	/^#define NUM_SRDS_BANKS	/;"	d	file:
NUM_SRDS_BANKS	board/freescale/corenet_ds/corenet_ds.c	/^#define NUM_SRDS_BANKS	/;"	d	file:
NUM_SRDS_BANKS	board/freescale/p2041rdb/p2041rdb.c	/^#define NUM_SRDS_BANKS	/;"	d	file:
NUM_SRDS_BANKS	board/freescale/t1040qds/t1040qds.c	/^#define NUM_SRDS_BANKS	/;"	d	file:
NUM_SRDS_BANKS	board/keymile/kmp204x/kmp204x.c	/^#define NUM_SRDS_BANKS	/;"	d	file:
NUM_SRDS_PLL	board/freescale/t102xqds/t102xqds.c	/^#define NUM_SRDS_PLL	/;"	d	file:
NUM_SRKH_REGS	include/fsl_sfp.h	/^#define NUM_SRKH_REGS	/;"	d
NUM_SUN_MACHINES	arch/sparc/include/asm/machines.h	/^#define NUM_SUN_MACHINES /;"	d
NUM_SWITCH	board/bf609-ezkit/soft_switch.h	/^#define NUM_SWITCH /;"	d
NUM_SYS_CLKS	arch/arm/include/asm/omap_common.h	/^#define NUM_SYS_CLKS	/;"	d
NUM_TD	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define NUM_TD /;"	d
NUM_TD	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define NUM_TD /;"	d
NUM_TD	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define NUM_TD /;"	d
NUM_TD	drivers/usb/host/ohci-s3c24xx.h	/^#define NUM_TD /;"	d
NUM_TD	drivers/usb/host/ohci.h	/^#define NUM_TD /;"	d
NUM_TLB_ENTRIES	board/amcc/yucca/yucca.h	/^#define NUM_TLB_ENTRIES /;"	d
NUM_TRIES	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^#define NUM_TRIES /;"	d	file:
NUM_TRIES	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define NUM_TRIES /;"	d	file:
NUM_TRIES	board/amcc/yosemite/yosemite.c	/^#define NUM_TRIES /;"	d	file:
NUM_TX_BDS	arch/powerpc/cpu/mpc8260/i2c.c	/^#define NUM_TX_BDS /;"	d	file:
NUM_TX_BDS	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define NUM_TX_BDS /;"	d	file:
NUM_TX_BUFF	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define NUM_TX_BUFF /;"	d
NUM_TX_DESC	drivers/net/dc2114x.c	/^	#define NUM_TX_DESC /;"	d	file:
NUM_TX_DESC	drivers/net/eepro100.c	/^#define NUM_TX_DESC	/;"	d	file:
NUM_TX_DESC	drivers/net/rtl8139.c	/^#define NUM_TX_DESC	/;"	d	file:
NUM_TX_DESC	drivers/net/rtl8169.c	/^#define NUM_TX_DESC	/;"	d	file:
NUM_TX_DESC	drivers/net/sh_eth.h	/^#define NUM_TX_DESC	/;"	d
NUM_WRIOP_PORTS	include/fsl-mc/ldpaa_wriop.h	/^	NUM_WRIOP_PORTS,$/;"	e	enum:wriop_port
NUM_WRITE_PB_TESTS	drivers/ddr/altera/sequencer.h	/^#define NUM_WRITE_PB_TESTS	/;"	d
NUM_WRITE_TESTS	drivers/ddr/altera/sequencer.h	/^#define NUM_WRITE_TESTS	/;"	d
NUVOTON_NCT6102D	drivers/misc/Kconfig	/^config NUVOTON_NCT6102D$/;"	c	menu:Multifunction device drivers
NVBL_PLLP_KHZ	arch/arm/mach-tegra/cpu.h	/^#define NVBL_PLLP_KHZ	/;"	d
NVBOOTINFOTABLE_BCTPTR	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NVBOOTINFOTABLE_BCTPTR	/;"	d
NVBOOTINFOTABLE_BCTPTR	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define NVBOOTINFOTABLE_BCTPTR /;"	d
NVBOOTINFOTABLE_BCTPTR	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define NVBOOTINFOTABLE_BCTPTR	/;"	d
NVBOOTINFOTABLE_BCTPTR	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define NVBOOTINFOTABLE_BCTPTR	/;"	d
NVBOOTINFOTABLE_BCTSIZE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NVBOOTINFOTABLE_BCTSIZE	/;"	d
NVBOOTINFOTABLE_BCTSIZE	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define NVBOOTINFOTABLE_BCTSIZE /;"	d
NVBOOTINFOTABLE_BCTSIZE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define NVBOOTINFOTABLE_BCTSIZE	/;"	d
NVBOOTINFOTABLE_BCTSIZE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define NVBOOTINFOTABLE_BCTSIZE	/;"	d
NVBOOTINFOTABLE_BOOTTYPE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NVBOOTINFOTABLE_BOOTTYPE /;"	d
NVBOOTTYPE_RECOVERY	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NVBOOTTYPE_RECOVERY	/;"	d
NVMOP_NOP	drivers/mtd/pic32_flash.c	/^#define NVMOP_NOP	/;"	d	file:
NVMOP_PAGE_ERASE	drivers/mtd/pic32_flash.c	/^#define NVMOP_PAGE_ERASE	/;"	d	file:
NVMOP_WORD_WRITE	drivers/mtd/pic32_flash.c	/^#define NVMOP_WORD_WRITE	/;"	d	file:
NVM_LVDERR	drivers/mtd/pic32_flash.c	/^#define NVM_LVDERR	/;"	d	file:
NVM_WR	drivers/mtd/pic32_flash.c	/^#define NVM_WR	/;"	d	file:
NVM_WREN	drivers/mtd/pic32_flash.c	/^#define NVM_WREN	/;"	d	file:
NVM_WRERR	drivers/mtd/pic32_flash.c	/^#define NVM_WRERR	/;"	d	file:
NVRAM_BASE	include/configs/bubinga.h	/^#define NVRAM_BASE /;"	d
NVRM_PLLP_FIXED_FREQ_KHZ	arch/arm/include/asm/arch-tegra/uart.h	/^#define NVRM_PLLP_FIXED_FREQ_KHZ	/;"	d
NVRVFY1	include/configs/bubinga.h	/^#define NVRVFY1 /;"	d
NVRVFY2	include/configs/bubinga.h	/^#define NVRVFY2 /;"	d
NV_BIG_ENDIAN	fs/zfs/zfs.c	/^#define	NV_BIG_ENDIAN	/;"	d	file:
NV_COMMON_DATA_INDEX	board/gdsys/p1022/controlcenterd-id.c	/^	NV_COMMON_DATA_INDEX	= 0x40000001,$/;"	e	enum:__anonaa5ecaea0203	file:
NV_COMMON_DATA_MIN_SIZE	board/gdsys/p1022/controlcenterd-id.c	/^	NV_COMMON_DATA_MIN_SIZE	= 3 * sizeof(uint64_t) + 2 * sizeof(uint16_t),$/;"	e	enum:__anonaa5ecaea0203	file:
NV_DATA_PUBLIC_PERMISSIONS_OFFSET	drivers/tpm/tpm_tis_sandbox.c	/^#define NV_DATA_PUBLIC_PERMISSIONS_OFFSET	/;"	d	file:
NV_DATA_SIZE	drivers/tpm/tpm_tis_sandbox.c	/^#define NV_DATA_SIZE	/;"	d	file:
NV_DEFAULT_DEBUG_BAUD	arch/arm/include/asm/arch-tegra/uart.h	/^#define NV_DEFAULT_DEBUG_BAUD	/;"	d
NV_DPCD_ADJUST_REQ_LANEXPLUS1_DC_MASK	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEXPLUS1_DC_MASK	/;"	d
NV_DPCD_ADJUST_REQ_LANEXPLUS1_DC_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEXPLUS1_DC_SHIFT	/;"	d
NV_DPCD_ADJUST_REQ_LANEXPLUS1_PE_MASK	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEXPLUS1_PE_MASK	/;"	d
NV_DPCD_ADJUST_REQ_LANEXPLUS1_PE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEXPLUS1_PE_SHIFT	/;"	d
NV_DPCD_ADJUST_REQ_LANEX_DC_MASK	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEX_DC_MASK	/;"	d
NV_DPCD_ADJUST_REQ_LANEX_DC_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEX_DC_SHIFT	/;"	d
NV_DPCD_ADJUST_REQ_LANEX_PE_MASK	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEX_PE_MASK	/;"	d
NV_DPCD_ADJUST_REQ_LANEX_PE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_LANEX_PE_SHIFT	/;"	d
NV_DPCD_ADJUST_REQ_POST_CURSOR2	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_POST_CURSOR2	/;"	d
NV_DPCD_ADJUST_REQ_POST_CURSOR2_LANE_MASK	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_POST_CURSOR2_LANE_MASK	/;"	d
NV_DPCD_ADJUST_REQ_POST_CURSOR2_LANE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_ADJUST_REQ_POST_CURSOR2_LANE_SHIFT(/;"	d
NV_DPCD_LANEXPLUS1_SET2_PC2_MAX_REACHED_F	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANEXPLUS1_SET2_PC2_MAX_REACHED_F	/;"	d
NV_DPCD_LANEXPLUS1_SET2_PC2_MAX_REACHED_T	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANEXPLUS1_SET2_PC2_MAX_REACHED_T	/;"	d
NV_DPCD_LANEXPLUS1_SET2_PC2_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANEXPLUS1_SET2_PC2_SHIFT	/;"	d
NV_DPCD_LANEX_SET2_PC2_MAX_REACHED_F	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANEX_SET2_PC2_MAX_REACHED_F	/;"	d
NV_DPCD_LANEX_SET2_PC2_MAX_REACHED_T	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANEX_SET2_PC2_MAX_REACHED_T	/;"	d
NV_DPCD_LANEX_SET2_PC2_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANEX_SET2_PC2_SHIFT	/;"	d
NV_DPCD_LANE_ALIGN_STATUS_UPDATED	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANE_ALIGN_STATUS_UPDATED	/;"	d
NV_DPCD_LANE_ALIGN_STATUS_UPDATED_DONE_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANE_ALIGN_STATUS_UPDATED_DONE_NO	/;"	d
NV_DPCD_LANE_ALIGN_STATUS_UPDATED_DONE_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_LANE_ALIGN_STATUS_UPDATED_DONE_YES	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_CHN_EQ_DONE_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_CHN_EQ_DONE_NO	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_CHN_EQ_DONE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_CHN_EQ_DONE_SHIFT	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_CHN_EQ_DONE_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_CHN_EQ_DONE_YES	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_CR_DONE_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_CR_DONE_NO	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_CR_DONE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_CR_DONE_SHIFT	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_CR_DONE_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_CR_DONE_YES	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_SYMBOL_LOCKED_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_SYMBOL_LOCKED_NO	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_SYMBOL_LOCKED_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_SYMBOL_LOCKED_SHIFT	/;"	d
NV_DPCD_STATUS_LANEXPLUS1_SYMBOL_LOCKED_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEXPLUS1_SYMBOL_LOCKED_YES	/;"	d
NV_DPCD_STATUS_LANEX_CHN_EQ_DONE_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_CHN_EQ_DONE_NO	/;"	d
NV_DPCD_STATUS_LANEX_CHN_EQ_DONE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_CHN_EQ_DONE_SHIFT	/;"	d
NV_DPCD_STATUS_LANEX_CHN_EQ_DONE_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_CHN_EQ_DONE_YES	/;"	d
NV_DPCD_STATUS_LANEX_CR_DONE_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_CR_DONE_NO	/;"	d
NV_DPCD_STATUS_LANEX_CR_DONE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_CR_DONE_SHIFT	/;"	d
NV_DPCD_STATUS_LANEX_CR_DONE_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_CR_DONE_YES	/;"	d
NV_DPCD_STATUS_LANEX_SYMBOL_LOCKED_NO	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_SYMBOL_LOCKED_NO	/;"	d
NV_DPCD_STATUS_LANEX_SYMBOL_LOCKED_SHFIT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_SYMBOL_LOCKED_SHFIT	/;"	d
NV_DPCD_STATUS_LANEX_SYMBOL_LOCKED_YES	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_STATUS_LANEX_SYMBOL_LOCKED_YES	/;"	d
NV_DPCD_TRAINING_AUX_RD_INTERVAL	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_AUX_RD_INTERVAL	/;"	d
NV_DPCD_TRAINING_LANE0_1_SET2	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANE0_1_SET2	/;"	d
NV_DPCD_TRAINING_LANE2_3_SET2	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANE2_3_SET2	/;"	d
NV_DPCD_TRAINING_LANEX_SET_DC_MAX_REACHED_F	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANEX_SET_DC_MAX_REACHED_F /;"	d
NV_DPCD_TRAINING_LANEX_SET_DC_MAX_REACHED_T	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANEX_SET_DC_MAX_REACHED_T	/;"	d
NV_DPCD_TRAINING_LANEX_SET_DC_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANEX_SET_DC_SHIFT	/;"	d
NV_DPCD_TRAINING_LANEX_SET_PE_MAX_REACHED_F	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANEX_SET_PE_MAX_REACHED_F	/;"	d
NV_DPCD_TRAINING_LANEX_SET_PE_MAX_REACHED_T	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANEX_SET_PE_MAX_REACHED_T	/;"	d
NV_DPCD_TRAINING_LANEX_SET_PE_SHIFT	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_LANEX_SET_PE_SHIFT	/;"	d
NV_DPCD_TRAINING_PATTERN_SET_SC_DISABLED_F	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_PATTERN_SET_SC_DISABLED_F	/;"	d
NV_DPCD_TRAINING_PATTERN_SET_SC_DISABLED_T	drivers/video/tegra124/displayport.h	/^#define NV_DPCD_TRAINING_PATTERN_SET_SC_DISABLED_T	/;"	d
NV_ENCODE_NATIVE	fs/zfs/zfs.c	/^#define	NV_ENCODE_NATIVE	/;"	d	file:
NV_ENCODE_XDR	fs/zfs/zfs.c	/^#define	NV_ENCODE_XDR	/;"	d	file:
NV_GLOBAL_LOCK	drivers/tpm/tpm_tis_sandbox.c	/^	NV_GLOBAL_LOCK,$/;"	e	enum:__anone162c6520103	file:
NV_HEAD_STATE0	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0(/;"	d
NV_HEAD_STATE0_COLORSPACE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_COLORSPACE_DEFAULT_MASK	/;"	d
NV_HEAD_STATE0_COLORSPACE_RGB	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_COLORSPACE_RGB	/;"	d
NV_HEAD_STATE0_COLORSPACE_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_COLORSPACE_SHIFT	/;"	d
NV_HEAD_STATE0_COLORSPACE_YUV_601	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_COLORSPACE_YUV_601	/;"	d
NV_HEAD_STATE0_COLORSPACE_YUV_709	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_COLORSPACE_YUV_709	/;"	d
NV_HEAD_STATE0_DYNRANGE_CEA	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_DYNRANGE_CEA	/;"	d
NV_HEAD_STATE0_DYNRANGE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_DYNRANGE_DEFAULT_MASK	/;"	d
NV_HEAD_STATE0_DYNRANGE_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_DYNRANGE_SHIFT	/;"	d
NV_HEAD_STATE0_DYNRANGE_VESA	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_DYNRANGE_VESA	/;"	d
NV_HEAD_STATE0_INTERLACED_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_INTERLACED_DEFAULT_MASK	/;"	d
NV_HEAD_STATE0_INTERLACED_INTERLACED	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_INTERLACED_INTERLACED	/;"	d
NV_HEAD_STATE0_INTERLACED_PROGRESSIVE	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_INTERLACED_PROGRESSIVE	/;"	d
NV_HEAD_STATE0_INTERLACED_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_INTERLACED_SHIFT	/;"	d
NV_HEAD_STATE0_RANGECOMPRESS_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_RANGECOMPRESS_DEFAULT_MASK	/;"	d
NV_HEAD_STATE0_RANGECOMPRESS_DISABLE	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_RANGECOMPRESS_DISABLE	/;"	d
NV_HEAD_STATE0_RANGECOMPRESS_ENABLE	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_RANGECOMPRESS_ENABLE	/;"	d
NV_HEAD_STATE0_RANGECOMPRESS_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE0_RANGECOMPRESS_SHIFT	/;"	d
NV_HEAD_STATE1	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE1(/;"	d
NV_HEAD_STATE1_HTOTAL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE1_HTOTAL_DEFAULT_MASK	/;"	d
NV_HEAD_STATE1_HTOTAL_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE1_HTOTAL_SHIFT	/;"	d
NV_HEAD_STATE1_VTOTAL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE1_VTOTAL_DEFAULT_MASK	/;"	d
NV_HEAD_STATE1_VTOTAL_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE1_VTOTAL_SHIFT	/;"	d
NV_HEAD_STATE2	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE2(/;"	d
NV_HEAD_STATE2_HSYNC_END_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE2_HSYNC_END_DEFAULT_MASK	/;"	d
NV_HEAD_STATE2_HSYNC_END_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE2_HSYNC_END_SHIFT	/;"	d
NV_HEAD_STATE2_VSYNC_END_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE2_VSYNC_END_DEFAULT_MASK	/;"	d
NV_HEAD_STATE2_VSYNC_END_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE2_VSYNC_END_SHIFT	/;"	d
NV_HEAD_STATE3	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE3(/;"	d
NV_HEAD_STATE3_HBLANK_END_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE3_HBLANK_END_DEFAULT_MASK	/;"	d
NV_HEAD_STATE3_HBLANK_END_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE3_HBLANK_END_SHIFT	/;"	d
NV_HEAD_STATE3_VBLANK_END_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE3_VBLANK_END_DEFAULT_MASK	/;"	d
NV_HEAD_STATE3_VBLANK_END_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE3_VBLANK_END_SHIFT	/;"	d
NV_HEAD_STATE4	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE4(/;"	d
NV_HEAD_STATE4_HBLANK_START_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE4_HBLANK_START_DEFAULT_MASK	/;"	d
NV_HEAD_STATE4_HBLANK_START_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE4_HBLANK_START_SHIFT	/;"	d
NV_HEAD_STATE4_VBLANK_START_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE4_VBLANK_START_DEFAULT_MASK	/;"	d
NV_HEAD_STATE4_VBLANK_START_SHIFT	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE4_VBLANK_START_SHIFT	/;"	d
NV_HEAD_STATE5	drivers/video/tegra124/sor.h	/^#define NV_HEAD_STATE5(/;"	d
NV_LITTLE_ENDIAN	fs/zfs/zfs.c	/^#define	NV_LITTLE_ENDIAN	/;"	d	file:
NV_PA_AHB_BASE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define NV_PA_AHB_BASE	/;"	d
NV_PA_AHB_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define NV_PA_AHB_BASE	/;"	d
NV_PA_APB_MISC_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_MISC_BASE	/;"	d
NV_PA_APB_MISC_GP_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_MISC_GP_BASE	/;"	d
NV_PA_APB_UARTA_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_UARTA_BASE	/;"	d
NV_PA_APB_UARTB_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_UARTB_BASE	/;"	d
NV_PA_APB_UARTC_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_UARTC_BASE	/;"	d
NV_PA_APB_UARTD_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_UARTD_BASE	/;"	d
NV_PA_APB_UARTE_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_APB_UARTE_BASE	/;"	d
NV_PA_ARM_PERIPHBASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_ARM_PERIPHBASE	/;"	d
NV_PA_BASE_SRAM	arch/arm/include/asm/arch-tegra/ap.h	/^#define NV_PA_BASE_SRAM	/;"	d
NV_PA_CLK_RST_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_CLK_RST_BASE	/;"	d
NV_PA_CSITE_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_CSITE_BASE	/;"	d
NV_PA_EMC_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_EMC_BASE	/;"	d
NV_PA_EVP_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_EVP_BASE	/;"	d
NV_PA_FLOW_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_FLOW_BASE	/;"	d
NV_PA_FUSE_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_FUSE_BASE	/;"	d
NV_PA_GPIO_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_GPIO_BASE	/;"	d
NV_PA_MC_BASE	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define NV_PA_MC_BASE	/;"	d
NV_PA_MC_BASE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define NV_PA_MC_BASE	/;"	d
NV_PA_MC_BASE	arch/arm/include/asm/arch-tegra20/tegra.h	/^#define NV_PA_MC_BASE	/;"	d
NV_PA_MC_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define NV_PA_MC_BASE	/;"	d
NV_PA_MC_BASE	arch/arm/include/asm/arch-tegra30/tegra.h	/^#define NV_PA_MC_BASE	/;"	d
NV_PA_NAND_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_NAND_BASE	/;"	d
NV_PA_PG_UP_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_PG_UP_BASE	/;"	d
NV_PA_PMC_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_PMC_BASE	/;"	d
NV_PA_SDRAM_BASE	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define NV_PA_SDRAM_BASE	/;"	d
NV_PA_SDRAM_BASE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define NV_PA_SDRAM_BASE	/;"	d
NV_PA_SDRAM_BASE	arch/arm/include/asm/arch-tegra186/tegra.h	/^#define NV_PA_SDRAM_BASE	/;"	d
NV_PA_SDRAM_BASE	arch/arm/include/asm/arch-tegra20/tegra.h	/^#define NV_PA_SDRAM_BASE	/;"	d
NV_PA_SDRAM_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define NV_PA_SDRAM_BASE	/;"	d
NV_PA_SDRAM_BASE	arch/arm/include/asm/arch-tegra30/tegra.h	/^#define NV_PA_SDRAM_BASE	/;"	d
NV_PA_SDRC_CS0	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SDRC_CS0	/;"	d
NV_PA_SLINK1_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SLINK1_BASE	/;"	d
NV_PA_SLINK2_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SLINK2_BASE	/;"	d
NV_PA_SLINK3_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SLINK3_BASE	/;"	d
NV_PA_SLINK4_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SLINK4_BASE	/;"	d
NV_PA_SLINK5_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SLINK5_BASE	/;"	d
NV_PA_SLINK6_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SLINK6_BASE	/;"	d
NV_PA_SPI_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_SPI_BASE	/;"	d
NV_PA_TMRUS_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_PA_TMRUS_BASE	/;"	d
NV_PA_TSC_BASE	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define NV_PA_TSC_BASE	/;"	d
NV_PA_TSC_BASE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define NV_PA_TSC_BASE	/;"	d
NV_PA_TSC_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define NV_PA_TSC_BASE	/;"	d
NV_SEQ_COUNT	drivers/tpm/tpm_tis_sandbox.c	/^	NV_SEQ_COUNT,$/;"	e	enum:__anone162c6520103	file:
NV_SEQ_FIRMWARE	drivers/tpm/tpm_tis_sandbox.c	/^	NV_SEQ_FIRMWARE,$/;"	e	enum:__anone162c6520103	file:
NV_SEQ_KERNEL	drivers/tpm/tpm_tis_sandbox.c	/^	NV_SEQ_KERNEL,$/;"	e	enum:__anone162c6520103	file:
NV_WB_RUN_ADDRESS	arch/arm/include/asm/arch-tegra/tegra.h	/^#define NV_WB_RUN_ADDRESS	/;"	d
NWAYTEST_LOOPBACK	include/linux/mii.h	/^#define NWAYTEST_LOOPBACK	/;"	d
NWAYTEST_RESV1	include/linux/mii.h	/^#define NWAYTEST_RESV1	/;"	d
NWAYTEST_RESV2	include/linux/mii.h	/^#define NWAYTEST_RESV2	/;"	d
NWAY_AR_100T4_CAPS	drivers/net/e1000.h	/^#define NWAY_AR_100T4_CAPS	/;"	d
NWAY_AR_100TX_FD_CAPS	drivers/net/e1000.h	/^#define NWAY_AR_100TX_FD_CAPS	/;"	d
NWAY_AR_100TX_HD_CAPS	drivers/net/e1000.h	/^#define NWAY_AR_100TX_HD_CAPS	/;"	d
NWAY_AR_10T_FD_CAPS	drivers/net/e1000.h	/^#define NWAY_AR_10T_FD_CAPS	/;"	d
NWAY_AR_10T_HD_CAPS	drivers/net/e1000.h	/^#define NWAY_AR_10T_HD_CAPS	/;"	d
NWAY_AR_ASM_DIR	drivers/net/e1000.h	/^#define NWAY_AR_ASM_DIR	/;"	d
NWAY_AR_NEXT_PAGE	drivers/net/e1000.h	/^#define NWAY_AR_NEXT_PAGE	/;"	d
NWAY_AR_PAUSE	drivers/net/e1000.h	/^#define NWAY_AR_PAUSE	/;"	d
NWAY_AR_REMOTE_FAULT	drivers/net/e1000.h	/^#define NWAY_AR_REMOTE_FAULT	/;"	d
NWAY_AR_SELECTOR_FIELD	drivers/net/e1000.h	/^#define NWAY_AR_SELECTOR_FIELD	/;"	d
NWAY_ER_LP_NEXT_PAGE_CAPS	drivers/net/e1000.h	/^#define NWAY_ER_LP_NEXT_PAGE_CAPS	/;"	d
NWAY_ER_LP_NWAY_CAPS	drivers/net/e1000.h	/^#define NWAY_ER_LP_NWAY_CAPS	/;"	d
NWAY_ER_NEXT_PAGE_CAPS	drivers/net/e1000.h	/^#define NWAY_ER_NEXT_PAGE_CAPS	/;"	d
NWAY_ER_PAGE_RXD	drivers/net/e1000.h	/^#define NWAY_ER_PAGE_RXD	/;"	d
NWAY_ER_PAR_DETECT_FAULT	drivers/net/e1000.h	/^#define NWAY_ER_PAR_DETECT_FAULT	/;"	d
NWAY_LPAR_100T4_CAPS	drivers/net/e1000.h	/^#define NWAY_LPAR_100T4_CAPS	/;"	d
NWAY_LPAR_100TX_FD_CAPS	drivers/net/e1000.h	/^#define NWAY_LPAR_100TX_FD_CAPS	/;"	d
NWAY_LPAR_100TX_HD_CAPS	drivers/net/e1000.h	/^#define NWAY_LPAR_100TX_HD_CAPS	/;"	d
NWAY_LPAR_10T_FD_CAPS	drivers/net/e1000.h	/^#define NWAY_LPAR_10T_FD_CAPS	/;"	d
NWAY_LPAR_10T_HD_CAPS	drivers/net/e1000.h	/^#define NWAY_LPAR_10T_HD_CAPS	/;"	d
NWAY_LPAR_ACKNOWLEDGE	drivers/net/e1000.h	/^#define NWAY_LPAR_ACKNOWLEDGE	/;"	d
NWAY_LPAR_ASM_DIR	drivers/net/e1000.h	/^#define NWAY_LPAR_ASM_DIR	/;"	d
NWAY_LPAR_NEXT_PAGE	drivers/net/e1000.h	/^#define NWAY_LPAR_NEXT_PAGE	/;"	d
NWAY_LPAR_PAUSE	drivers/net/e1000.h	/^#define NWAY_LPAR_PAUSE	/;"	d
NWAY_LPAR_REMOTE_FAULT	drivers/net/e1000.h	/^#define NWAY_LPAR_REMOTE_FAULT	/;"	d
NWAY_LPAR_SELECTOR_FIELD	drivers/net/e1000.h	/^#define NWAY_LPAR_SELECTOR_FIELD	/;"	d
NWIDTH	drivers/mtd/nand/bfin_nand.c	/^#define                    NWIDTH /;"	d	file:
NWayAdvert	drivers/net/rtl8139.c	/^	MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,$/;"	e	enum:RTL8139_registers	file:
NWayExpansion	drivers/net/rtl8139.c	/^	NWayExpansion=0x6A,$/;"	e	enum:RTL8139_registers	file:
NWayLPAR	drivers/net/rtl8139.c	/^	MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,$/;"	e	enum:RTL8139_registers	file:
NWayTestReg	drivers/net/rtl8139.c	/^	NWayTestReg=0x70,$/;"	e	enum:RTL8139_registers	file:
NXDATAVDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define NXDATAVDLY(/;"	d
NXID_VERSION	board/freescale/common/sys_eeprom.c	/^#define NXID_VERSION	/;"	d	file:
NXID_VERSION	board/varisys/common/sys_eeprom.c	/^#define NXID_VERSION	/;"	d	file:
NXTDATRQDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define NXTDATRQDLY(/;"	d
N_	scripts/kconfig/lkc.h	/^#define N_(/;"	d
N_BAUDRATES	board/inka4x0/inkadiag.c	/^#define	N_BAUDRATES /;"	d	file:
N_BLK_HOR	common/lcd.c	/^#define	N_BLK_HOR	/;"	d	file:
N_BLK_VERT	common/lcd.c	/^#define	N_BLK_VERT	/;"	d	file:
N_CAPS	lib/slre.c	/^#define N_CAPS	/;"	d	file:
N_DIVIDER	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define N_DIVIDER	/;"	d
N_ELTS	drivers/video/ct69000.c	/^#define N_ELTS(/;"	d	file:
N_MB0CF	arch/powerpc/cpu/ppc4xx/sdram.c	/^#define N_MB0CF /;"	d	file:
N_RESET	drivers/rtc/ds1302.c	/^#define N_RESET	/;"	d	file:
N_URB_TD	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define N_URB_TD /;"	d
N_URB_TD	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define N_URB_TD /;"	d
N_URB_TD	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define N_URB_TD /;"	d
N_URB_TD	drivers/usb/host/isp116x.h	/^#define N_URB_TD	/;"	d
N_URB_TD	drivers/usb/host/ohci-s3c24xx.h	/^#define N_URB_TD /;"	d
N_URB_TD	drivers/usb/host/ohci.h	/^#define N_URB_TD /;"	d
N_VID0_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define N_VID0_CFG(/;"	d
N_VID1_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define N_VID1_CFG(/;"	d
N_VID2_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define N_VID2_CFG(/;"	d
N_VIF_COUNT	include/radeon.h	/^#define N_VIF_COUNT	/;"	d
NaN	post/lib_powerpc/fpu/compare-fp-1.c	/^static float NaN;$/;"	v	typeref:typename:float	file:
Name	doc/README.x86	/^Name                           Offset     Type         Size$/;"	l
Name	include/pe.h	/^	uint8_t	Name[IMAGE_SIZEOF_SHORT_NAME];$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint8_t[]
NameRevision	tools/patman/gitutil.py	/^def NameRevision(commit_hash):$/;"	f
Nand	include/linux/mtd/doc2000.h	/^struct Nand {$/;"	s
NdisDeviceStateD0	drivers/usb/gadget/ndis.h	/^	NdisDeviceStateD0,$/;"	e	enum:NDIS_DEVICE_POWER_STATE
NdisDeviceStateD1	drivers/usb/gadget/ndis.h	/^	NdisDeviceStateD1,$/;"	e	enum:NDIS_DEVICE_POWER_STATE
NdisDeviceStateD2	drivers/usb/gadget/ndis.h	/^	NdisDeviceStateD2,$/;"	e	enum:NDIS_DEVICE_POWER_STATE
NdisDeviceStateD3	drivers/usb/gadget/ndis.h	/^	NdisDeviceStateD3,$/;"	e	enum:NDIS_DEVICE_POWER_STATE
NdisDeviceStateMaximum	drivers/usb/gadget/ndis.h	/^	NdisDeviceStateMaximum$/;"	e	enum:NDIS_DEVICE_POWER_STATE
NdisDeviceStateUnspecified	drivers/usb/gadget/ndis.h	/^	NdisDeviceStateUnspecified = 0,$/;"	e	enum:NDIS_DEVICE_POWER_STATE
Network commands	cmd/Kconfig	/^menu "Network commands"$/;"	m	menu:Command line interface
NextState	drivers/fpga/ivm_core.c	/^	 unsigned char  NextState; \/* Step to this state *\/$/;"	m	struct:__anon34a9f1e50108	typeref:typename:unsigned char	file:
NextTxDesc	drivers/net/ax88180.h	/^	unsigned short NextTxDesc;$/;"	m	struct:ax88180_private	typeref:typename:unsigned short
Next_Ptr_Glob	lib/dhry/dhry_1.c	/^                Next_Ptr_Glob;$/;"	v	typeref:typename:Rec_Pointer
Nios II architecture	arch/nios2/Kconfig	/^menu "Nios II architecture"$/;"	m
NoBytes	drivers/net/bfin_mac.h	/^	u16 NoBytes;		\/* the no. of following bytes	*\/$/;"	m	struct:adi_ether_frame_buffer	typeref:typename:u16
Node	tools/dtoc/fdt_fallback.py	/^    def Node(self, fdt, offset, name, path):$/;"	m	class:FdtFallback
Node	tools/dtoc/fdt_fallback.py	/^class Node(NodeBase):$/;"	c
Node	tools/dtoc/fdt_normal.py	/^    def Node(self, fdt, offset, name, path):$/;"	m	class:FdtNormal
Node	tools/dtoc/fdt_normal.py	/^class Node(NodeBase):$/;"	c
NodeBase	tools/dtoc/fdt.py	/^class NodeBase:$/;"	c
NotPowerOfTwo	tools/patman/tools.py	/^def NotPowerOfTwo(num):$/;"	f
Note	doc/README.x86	/^Note that the -U flag is only supported by the latest cbfstool. It unpacks$/;"	l
Note	doc/README.x86	/^Note the FSP release version 001 has a bug which could cause random endless$/;"	l
Note	doc/README.x86	/^Note this default configuration will build a U-Boot payload for the QEMU board.$/;"	l
Note	doc/README.x86	/^Note: below are examples\/information for Minnowboard MAX.$/;"	l
Notice	tools/patman/tout.py	/^def Notice(msg):$/;"	f
Now	doc/README.x86	/^Now build U-Boot and obtain u-boot.rom$/;"	l
Now	doc/README.x86	/^Now you can build U-Boot and obtain u-boot.rom$/;"	l
Now	doc/README.x86	/^Now you can build U-Boot and obtain u-boot.rom:$/;"	l
Null	lib/dhry/dhry.h	/^#define Null /;"	d
NumEraseRegions	drivers/mtd/jedec_flash.c	/^	const int NumEraseRegions;$/;"	m	struct:amd_flash_info	typeref:typename:const int	file:
NumOOBDataElements	drivers/usb/gadget/rndis.h	/^	__le32	NumOOBDataElements;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
NumberOfLinenumbers	include/pe.h	/^	uint16_t NumberOfLinenumbers;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint16_t
NumberOfRelocations	include/pe.h	/^	uint16_t NumberOfRelocations;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint16_t
NumberOfRvaAndSizes	include/pe.h	/^	uint32_t NumberOfRvaAndSizes;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
NumberOfRvaAndSizes	include/pe.h	/^	uint32_t NumberOfRvaAndSizes;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
NumberOfSections	include/pe.h	/^	uint16_t NumberOfSections;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint16_t
NumberOfSymbols	include/pe.h	/^	uint32_t NumberOfSymbols;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint32_t
O2DNT	board/ifm/o2dnt2/o2dnt2.c	/^	O2DNT		= 0x00,	\/* !< O2DNT 32MB *\/$/;"	e	enum:ifm_sensor_type	file:
O2DNT2	board/ifm/o2dnt2/o2dnt2.c	/^	O2DNT2		= 0x01,	\/* !< O2DNT2 64MB *\/$/;"	e	enum:ifm_sensor_type	file:
O3DNT	board/ifm/o2dnt2/o2dnt2.c	/^	O3DNT		= 0x02,	\/* !< O3DNT 32MB *\/$/;"	e	enum:ifm_sensor_type	file:
O3DNT_MIN	board/ifm/o2dnt2/o2dnt2.c	/^	O3DNT_MIN	= 0x40,	\/* !< O3DNT Minerva 32MB *\/$/;"	e	enum:ifm_sensor_type	file:
OBCR_ODS_16MA	drivers/net/ks8851_mll.h	/^#define OBCR_ODS_16MA	/;"	d
OBJCOPY	Makefile	/^OBJCOPY		= $(CROSS_COMPILE)objcopy$/;"	m
OBJCOPYFLAGS	arch/x86/lib/Makefile	/^OBJCOPYFLAGS := --prefix-symbols=__normal_$/;"	m
OBJCOPYFLAGS	config.mk	/^OBJCOPYFLAGS :=$/;"	m
OBJCOPYFLAGS	examples/standalone/Makefile	/^$(obj)\/%.bin: OBJCOPYFLAGS := -O binary$/;"	m
OBJCOPYFLAGS	examples/standalone/Makefile	/^$(obj)\/%.srec: OBJCOPYFLAGS := -O srec$/;"	m
OBJCOPYFLAGS	post/lib_powerpc/fpu/Makefile	/^OBJCOPYFLAGS := -R .gnu.attributes$/;"	m
OBJCOPYFLAGS_EFI	arch/x86/config.mk	/^OBJCOPYFLAGS_EFI := -j .text -j .sdata -j .data -j .dynamic -j .dynsym \\$/;"	m
OBJCOPYFLAGS_demo.bin	examples/api/Makefile	/^OBJCOPYFLAGS_demo.bin := -O binary$/;"	m
OBJCOPYFLAGS_lpc32xx-boot-0.bin	Makefile	/^OBJCOPYFLAGS_lpc32xx-boot-0.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)$/;"	m
OBJCOPYFLAGS_lpc32xx-boot-1.bin	Makefile	/^OBJCOPYFLAGS_lpc32xx-boot-1.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)$/;"	m
OBJCOPYFLAGS_u-boot-app.efi	Makefile	/^OBJCOPYFLAGS_u-boot-app.efi := $(OBJCOPYFLAGS_EFI)$/;"	m
OBJCOPYFLAGS_u-boot-img-spl-at-end.bin	Makefile	/^OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \\$/;"	m
OBJCOPYFLAGS_u-boot-nodtb-tegra.bin	Makefile	/^OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)$/;"	m
OBJCOPYFLAGS_u-boot-nodtb.bin	Makefile	/^OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \\$/;"	m
OBJCOPYFLAGS_u-boot-payload.efi	Makefile	/^OBJCOPYFLAGS_u-boot-payload.efi := $(OBJCOPYFLAGS_EFI)$/;"	m
OBJCOPYFLAGS_u-boot-spi.gph	arch/arm/mach-keystone/config.mk	/^OBJCOPYFLAGS_u-boot-spi.gph = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \\$/;"	m
OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin	Makefile	/^OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \\$/;"	m
OBJCOPYFLAGS_u-boot-tegra.bin	Makefile	/^OBJCOPYFLAGS_u-boot-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)$/;"	m
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin	Makefile	/^OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \\$/;"	m
OBJCOPYFLAGS_u-boot-with-spl.bin	Makefile	/^OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \\$/;"	m
OBJCOPYFLAGS_u-boot-with-tpl.bin	Makefile	/^OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \\$/;"	m
OBJCOPYFLAGS_u-boot-x86-16bit.bin	Makefile	/^OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec$/;"	m
OBJCOPYFLAGS_u-boot.ais	Makefile	/^OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)$/;"	m
OBJCOPYFLAGS_u-boot.hex	Makefile	/^OBJCOPYFLAGS_u-boot.hex := -O ihex$/;"	m
OBJCOPYFLAGS_u-boot.ldr.hex	Makefile	/^OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex$/;"	m
OBJCOPYFLAGS_u-boot.ldr.srec	Makefile	/^OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec$/;"	m
OBJCOPYFLAGS_u-boot.spr	Makefile	/^OBJCOPYFLAGS_u-boot.spr = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \\$/;"	m
OBJCOPYFLAGS_u-boot.srec	Makefile	/^OBJCOPYFLAGS_u-boot.srec := -O srec$/;"	m
OBJDUMP	Makefile	/^OBJDUMP		= $(CROSS_COMPILE)objdump$/;"	m
OBJS	examples/api/Makefile	/^OBJS := $(OBJ-y) $(notdir $(EXT_COBJ-y) $(EXT_SOBJ-y))$/;"	m
OBJS	examples/api/Makefile	/^OBJS := $(addprefix $(obj)\/,$(OBJS))$/;"	m
OBJSET_PHYS_SIZE	include/zfs/dmu_objset.h	/^#define OBJSET_PHYS_SIZE	/;"	d
OBJSET_PHYS_SIZE_V14	include/zfs/dmu_objset.h	/^#define OBJSET_PHYS_SIZE_V14	/;"	d
OBSOLETE_CNODE	fs/ubifs/ubifs.h	/^	OBSOLETE_CNODE = 1,$/;"	e	enum:__anonf648d0840903
OBSOLETE_FLAG	common/env_sf.c	/^#define OBSOLETE_FLAG	/;"	d	file:
OBSOLETE_FLAG	include/environment.h	/^# define OBSOLETE_FLAG /;"	d
OBSOLETE_ZNODE	fs/ubifs/ubifs.h	/^	OBSOLETE_ZNODE = 2,$/;"	e	enum:__anonf648d0840603
OBUS	drivers/usb/host/r8a66597.h	/^#define	OBUS	/;"	d
OCBFEN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define OCBFEN	/;"	d
OCCR_PCI1CR	include/mpc83xx.h	/^#define OCCR_PCI1CR	/;"	d
OCCR_PCI2CR	include/mpc83xx.h	/^#define OCCR_PCI2CR	/;"	d
OCCR_PCICD0	include/mpc83xx.h	/^#define OCCR_PCICD0	/;"	d
OCCR_PCICD1	include/mpc83xx.h	/^#define OCCR_PCICD1	/;"	d
OCCR_PCICD2	include/mpc83xx.h	/^#define OCCR_PCICD2	/;"	d
OCCR_PCICD3	include/mpc83xx.h	/^#define OCCR_PCICD3	/;"	d
OCCR_PCICD4	include/mpc83xx.h	/^#define OCCR_PCICD4	/;"	d
OCCR_PCICD5	include/mpc83xx.h	/^#define OCCR_PCICD5	/;"	d
OCCR_PCICD6	include/mpc83xx.h	/^#define OCCR_PCICD6	/;"	d
OCCR_PCICD7	include/mpc83xx.h	/^#define OCCR_PCICD7	/;"	d
OCCR_PCICOE0	include/mpc83xx.h	/^#define OCCR_PCICOE0	/;"	d
OCCR_PCICOE1	include/mpc83xx.h	/^#define OCCR_PCICOE1	/;"	d
OCCR_PCICOE2	include/mpc83xx.h	/^#define OCCR_PCICOE2	/;"	d
OCCR_PCICOE3	include/mpc83xx.h	/^#define OCCR_PCICOE3	/;"	d
OCCR_PCICOE4	include/mpc83xx.h	/^#define OCCR_PCICOE4	/;"	d
OCCR_PCICOE5	include/mpc83xx.h	/^#define OCCR_PCICOE5	/;"	d
OCCR_PCICOE6	include/mpc83xx.h	/^#define OCCR_PCICOE6	/;"	d
OCCR_PCICOE7	include/mpc83xx.h	/^#define OCCR_PCICOE7	/;"	d
OCCR_PCICR	include/mpc83xx.h	/^#define OCCR_PCICR	/;"	d
OCD_CALIB_DEF	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define OCD_CALIB_DEF	/;"	d	file:
OCM0_DISDPC	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_DISDPC	/;"	d
OCM0_DSARC	arch/powerpc/include/asm/ppc405ep.h	/^#define OCM0_DSARC	/;"	d
OCM0_DSARC	arch/powerpc/include/asm/ppc405gp.h	/^#define OCM0_DSARC	/;"	d
OCM0_DSCNTL	arch/powerpc/include/asm/ppc405ep.h	/^#define OCM0_DSCNTL	/;"	d
OCM0_DSCNTL	arch/powerpc/include/asm/ppc405gp.h	/^#define OCM0_DSCNTL	/;"	d
OCM0_DSRC1	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_DSRC1	/;"	d
OCM0_DSRC2	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_DSRC2	/;"	d
OCM0_ISCNTL	arch/powerpc/include/asm/ppc405ep.h	/^#define OCM0_ISCNTL	/;"	d
OCM0_ISCNTL	arch/powerpc/include/asm/ppc405gp.h	/^#define OCM0_ISCNTL	/;"	d
OCM0_ISRC1	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_ISRC1	/;"	d
OCM0_ISRC2	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_ISRC2	/;"	d
OCM0_PLBBEAR	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_PLBBEAR	/;"	d
OCM0_PLBCR1	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_PLBCR1	/;"	d
OCM0_PLBCR2	arch/powerpc/include/asm/ppc405ez.h	/^#define OCM0_PLBCR2	/;"	d
OCM_HIGH_ADDR	include/configs/zynq-common.h	/^#define OCM_HIGH_ADDR	/;"	d
OCM_TEST_PATTERN1	post/cpu/ppc4xx/ocm.c	/^#define OCM_TEST_PATTERN1	/;"	d	file:
OCM_TEST_PATTERN2	post/cpu/ppc4xx/ocm.c	/^#define OCM_TEST_PATTERN2	/;"	d	file:
OCN_PORT_DMA	drivers/net/tsi108_eth.c	/^#define OCN_PORT_DMA	/;"	d	file:
OCN_PORT_ETHERNET	drivers/net/tsi108_eth.c	/^#define OCN_PORT_ETHERNET	/;"	d	file:
OCN_PORT_HLP	drivers/net/tsi108_eth.c	/^#define OCN_PORT_HLP	/;"	d	file:
OCN_PORT_MEMORY	drivers/net/tsi108_eth.c	/^#define OCN_PORT_MEMORY	/;"	d	file:
OCN_PORT_PCI_X	drivers/net/tsi108_eth.c	/^#define OCN_PORT_PCI_X	/;"	d	file:
OCN_PORT_PRINT	drivers/net/tsi108_eth.c	/^#define OCN_PORT_PRINT	/;"	d	file:
OCN_PORT_PROCESSOR_MASTER	drivers/net/tsi108_eth.c	/^#define OCN_PORT_PROCESSOR_MASTER	/;"	d	file:
OCN_PORT_PROCESSOR_SLAVE	drivers/net/tsi108_eth.c	/^#define OCN_PORT_PROCESSOR_SLAVE	/;"	d	file:
OCOTP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define OCOTP_BASE_ADDR /;"	d
OCOTP_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCOTP_BASE_ADDR /;"	d
OCOTP_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define OCOTP_BASE_ADDR	/;"	d
OCOTP_CFG3_SPEED_1GHZ	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_1GHZ	/;"	d	file:
OCOTP_CFG3_SPEED_1P2GHZ	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_1P2GHZ	/;"	d	file:
OCOTP_CFG3_SPEED_528MHZ	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_528MHZ /;"	d	file:
OCOTP_CFG3_SPEED_696MHZ	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_696MHZ /;"	d	file:
OCOTP_CFG3_SPEED_800MHZ	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_800MHZ	/;"	d	file:
OCOTP_CFG3_SPEED_850MHZ	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_850MHZ	/;"	d	file:
OCOTP_CFG3_SPEED_SHIFT	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_CFG3_SPEED_SHIFT	/;"	d	file:
OCOTP_CONTROLLER_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define OCOTP_CONTROLLER_BASE_ADDR	/;"	d
OCOTP_CRYPTO_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CRYPTO_BITS_MASK	/;"	d
OCOTP_CRYPTO_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CRYPTO_BITS_OFFSET	/;"	d
OCOTP_CTRL_ADDR_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_ADDR_MASK	/;"	d
OCOTP_CTRL_ADDR_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_ADDR_OFFSET	/;"	d
OCOTP_CTRL_BUSY	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_BUSY	/;"	d
OCOTP_CTRL_ERROR	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_ERROR	/;"	d
OCOTP_CTRL_RD_BANK_OPEN	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_RD_BANK_OPEN	/;"	d
OCOTP_CTRL_RELOAD_SHADOWS	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_RELOAD_SHADOWS	/;"	d
OCOTP_CTRL_WR_UNLOCK_KEY	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_WR_UNLOCK_KEY	/;"	d
OCOTP_CTRL_WR_UNLOCK_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_WR_UNLOCK_MASK	/;"	d
OCOTP_CTRL_WR_UNLOCK_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CTRL_WR_UNLOCK_OFFSET	/;"	d
OCOTP_CUSTCAP_RTC_XTAL_32000_PRESENT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CUSTCAP_RTC_XTAL_32000_PRESENT	/;"	d
OCOTP_CUSTCAP_RTC_XTAL_32768_PRESENT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CUSTCAP_RTC_XTAL_32768_PRESENT	/;"	d
OCOTP_CUST_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CUST_BITS_MASK	/;"	d
OCOTP_CUST_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_CUST_BITS_OFFSET	/;"	d
OCOTP_DATA_DATA_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_DATA_DATA_MASK	/;"	d
OCOTP_DATA_DATA_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_DATA_DATA_OFFSET	/;"	d
OCOTP_HWCAP_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_HWCAP_BITS_MASK	/;"	d
OCOTP_HWCAP_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_HWCAP_BITS_OFFSET	/;"	d
OCOTP_LOCK_CRYPTODCP	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CRYPTODCP	/;"	d
OCOTP_LOCK_CRYPTODCP_ALT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CRYPTODCP_ALT	/;"	d
OCOTP_LOCK_CRYPTOKEY	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CRYPTOKEY	/;"	d
OCOTP_LOCK_CRYPTOKEY_ALT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CRYPTOKEY_ALT	/;"	d
OCOTP_LOCK_CUST0	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CUST0	/;"	d
OCOTP_LOCK_CUST1	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CUST1	/;"	d
OCOTP_LOCK_CUST2	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CUST2	/;"	d
OCOTP_LOCK_CUST3	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CUST3	/;"	d
OCOTP_LOCK_CUSTCAP	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CUSTCAP	/;"	d
OCOTP_LOCK_CUSTCAP_SHADOW	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_CUSTCAP_SHADOW	/;"	d
OCOTP_LOCK_HWSW	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_HWSW	/;"	d
OCOTP_LOCK_HWSW_SHADOW	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_HWSW_SHADOW	/;"	d
OCOTP_LOCK_HWSW_SHADOW_ALT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_HWSW_SHADOW_ALT	/;"	d
OCOTP_LOCK_OPS	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_OPS	/;"	d
OCOTP_LOCK_PIN	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_PIN	/;"	d
OCOTP_LOCK_ROM0	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM0	/;"	d
OCOTP_LOCK_ROM1	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM1	/;"	d
OCOTP_LOCK_ROM2	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM2	/;"	d
OCOTP_LOCK_ROM3	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM3	/;"	d
OCOTP_LOCK_ROM4	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM4	/;"	d
OCOTP_LOCK_ROM5	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM5	/;"	d
OCOTP_LOCK_ROM6	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM6	/;"	d
OCOTP_LOCK_ROM7	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM7	/;"	d
OCOTP_LOCK_ROM_SHADOW	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_ROM_SHADOW	/;"	d
OCOTP_LOCK_SRK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_SRK	/;"	d
OCOTP_LOCK_SRK_SHADOW	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_SRK_SHADOW	/;"	d
OCOTP_LOCK_UN0	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_UN0	/;"	d
OCOTP_LOCK_UN1	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_UN1	/;"	d
OCOTP_LOCK_UN2	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_UN2	/;"	d
OCOTP_LOCK_UNALLOCATED_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_UNALLOCATED_MASK	/;"	d
OCOTP_LOCK_UNALLOCATED_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_LOCK_UNALLOCATED_OFFSET	/;"	d
OCOTP_MEM0_TEMP_SHIFT	arch/arm/cpu/armv7/mx6/soc.c	/^#define OCOTP_MEM0_TEMP_SHIFT /;"	d	file:
OCOTP_OPS_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_OPS_BITS_MASK	/;"	d
OCOTP_OPS_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_OPS_BITS_OFFSET	/;"	d
OCOTP_ROM_BOOT_MODE_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_BOOT_MODE_MASK	/;"	d
OCOTP_ROM_BOOT_MODE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_BOOT_MODE_OFFSET	/;"	d
OCOTP_ROM_DISABLE_SPI_NOR_FAST_READ	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_DISABLE_SPI_NOR_FAST_READ	/;"	d
OCOTP_ROM_EMMC_USE_DDR	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_EMMC_USE_DDR	/;"	d
OCOTP_ROM_ENABLE_UNENCRYPTED_BOOT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_ENABLE_UNENCRYPTED_BOOT	/;"	d
OCOTP_ROM_ENABLE_USB_BOOT_SERIAL_NUM	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_ENABLE_USB_BOOT_SERIAL_NUM	/;"	d
OCOTP_ROM_SD_BUS_WIDTH_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_BUS_WIDTH_MASK	/;"	d
OCOTP_ROM_SD_BUS_WIDTH_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_BUS_WIDTH_OFFSET	/;"	d
OCOTP_ROM_SD_MBR_BOOT	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_MBR_BOOT	/;"	d
OCOTP_ROM_SD_MMC_MODE_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_MMC_MODE_MASK	/;"	d
OCOTP_ROM_SD_MMC_MODE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_MMC_MODE_OFFSET	/;"	d
OCOTP_ROM_SD_POWER_GATE_GPIO_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_POWER_GATE_GPIO_MASK	/;"	d
OCOTP_ROM_SD_POWER_GATE_GPIO_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_POWER_GATE_GPIO_OFFSET	/;"	d
OCOTP_ROM_SD_POWER_UP_DELAY_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_POWER_UP_DELAY_MASK	/;"	d
OCOTP_ROM_SD_POWER_UP_DELAY_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SD_POWER_UP_DELAY_OFFSET	/;"	d
OCOTP_ROM_SSP_SCK_INDEX_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SSP_SCK_INDEX_MASK	/;"	d
OCOTP_ROM_SSP_SCK_INDEX_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_ROM_SSP_SCK_INDEX_OFFSET	/;"	d
OCOTP_SRK_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_SRK_BITS_MASK	/;"	d
OCOTP_SRK_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_SRK_BITS_OFFSET	/;"	d
OCOTP_SWCAP_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_SWCAP_BITS_MASK	/;"	d
OCOTP_SWCAP_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_SWCAP_BITS_OFFSET	/;"	d
OCOTP_TESTER3_SPEED_1GHZ	arch/arm/cpu/armv7/mx7/soc.c	/^#define OCOTP_TESTER3_SPEED_1GHZ	/;"	d	file:
OCOTP_TESTER3_SPEED_800MHZ	arch/arm/cpu/armv7/mx7/soc.c	/^#define OCOTP_TESTER3_SPEED_800MHZ	/;"	d	file:
OCOTP_TESTER3_SPEED_850MHZ	arch/arm/cpu/armv7/mx7/soc.c	/^#define OCOTP_TESTER3_SPEED_850MHZ	/;"	d	file:
OCOTP_TESTER3_SPEED_SHIFT	arch/arm/cpu/armv7/mx7/soc.c	/^#define OCOTP_TESTER3_SPEED_SHIFT	/;"	d	file:
OCOTP_TESTER3_TEMP_SHIFT	arch/arm/cpu/armv7/mx7/soc.c	/^#define OCOTP_TESTER3_TEMP_SHIFT	/;"	d	file:
OCOTP_UN_BITS_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_UN_BITS_MASK	/;"	d
OCOTP_UN_BITS_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_UN_BITS_OFFSET	/;"	d
OCOTP_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_VERSION_MAJOR_MASK	/;"	d
OCOTP_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_VERSION_MAJOR_OFFSET	/;"	d
OCOTP_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_VERSION_MINOR_MASK	/;"	d
OCOTP_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_VERSION_MINOR_OFFSET	/;"	d
OCOTP_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_VERSION_STEP_MASK	/;"	d
OCOTP_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define	OCOTP_VERSION_STEP_OFFSET	/;"	d
OCP2SCP1_CLKCTRL_MODULEMODE_HW	arch/arm/include/asm/arch-omap5/clock.h	/^#define OCP2SCP1_CLKCTRL_MODULEMODE_HW	/;"	d
OCP_ADC_CFG	drivers/usb/eth/r8152.h	/^#define OCP_ADC_CFG	/;"	d
OCP_ALDPS_CONFIG	drivers/usb/eth/r8152.h	/^#define OCP_ALDPS_CONFIG	/;"	d
OCP_BASE_MII	drivers/usb/eth/r8152.h	/^#define OCP_BASE_MII	/;"	d
OCP_DOWN_SPEED	drivers/usb/eth/r8152.h	/^#define OCP_DOWN_SPEED	/;"	d
OCP_EEE_ABLE	drivers/usb/eth/r8152.h	/^#define OCP_EEE_ABLE	/;"	d
OCP_EEE_ADV	drivers/usb/eth/r8152.h	/^#define OCP_EEE_ADV	/;"	d
OCP_EEE_AR	drivers/usb/eth/r8152.h	/^#define OCP_EEE_AR	/;"	d
OCP_EEE_CFG	drivers/usb/eth/r8152.h	/^#define OCP_EEE_CFG	/;"	d
OCP_EEE_CONFIG1	drivers/usb/eth/r8152.h	/^#define OCP_EEE_CONFIG1	/;"	d
OCP_EEE_CONFIG2	drivers/usb/eth/r8152.h	/^#define OCP_EEE_CONFIG2	/;"	d
OCP_EEE_CONFIG3	drivers/usb/eth/r8152.h	/^#define OCP_EEE_CONFIG3	/;"	d
OCP_EEE_DATA	drivers/usb/eth/r8152.h	/^#define OCP_EEE_DATA	/;"	d
OCP_EEE_LPABLE	drivers/usb/eth/r8152.h	/^#define OCP_EEE_LPABLE	/;"	d
OCP_PHY_STATE	drivers/usb/eth/r8152.h	/^#define OCP_PHY_STATE	/;"	d
OCP_PHY_STATUS	drivers/usb/eth/r8152.h	/^#define OCP_PHY_STATUS	/;"	d
OCP_POWER_CFG	drivers/usb/eth/r8152.h	/^#define OCP_POWER_CFG	/;"	d
OCP_SRAM_ADDR	drivers/usb/eth/r8152.h	/^#define OCP_SRAM_ADDR	/;"	d
OCP_SRAM_DATA	drivers/usb/eth/r8152.h	/^#define OCP_SRAM_DATA	/;"	d
OCR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define OCR1(/;"	d
OCR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define OCR2(/;"	d
OCRAM_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCRAM_ARB_BASE_ADDR /;"	d
OCRAM_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCRAM_ARB_END_ADDR /;"	d
OCRAM_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define OCRAM_BASE_ADDR	/;"	d
OCRAM_BASE_S_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define OCRAM_BASE_S_ADDR	/;"	d
OCRAM_EPDC_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCRAM_EPDC_BASE_ADDR /;"	d
OCRAM_EPDC_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCRAM_EPDC_END_ADDR /;"	d
OCRAM_PXP_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCRAM_PXP_BASE_ADDR /;"	d
OCRAM_PXP_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define OCRAM_PXP_END_ADDR /;"	d
OCRAM_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define OCRAM_RESET	/;"	d
OCRAM_SIZE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define OCRAM_SIZE	/;"	d
OCRAM_S_SIZE	arch/arm/include/asm/arch-ls102xa/config.h	/^#define OCRAM_S_SIZE	/;"	d
OCR_ACCESS_MODE	include/mmc.h	/^#define OCR_ACCESS_MODE	/;"	d
OCR_BUSY	include/mmc.h	/^#define OCR_BUSY	/;"	d
OCR_HCS	include/mmc.h	/^#define OCR_HCS	/;"	d
OCR_VOLTAGE_MASK	include/mmc.h	/^#define OCR_VOLTAGE_MASK	/;"	d
OCW2	arch/x86/include/asm/i8259.h	/^#define OCW2	/;"	d
OCW2_NEOI	arch/x86/include/asm/i8259.h	/^#define OCW2_NEOI	/;"	d
OCW2_NOP	arch/x86/include/asm/i8259.h	/^#define OCW2_NOP	/;"	d
OCW2_PSET	arch/x86/include/asm/i8259.h	/^#define OCW2_PSET	/;"	d
OCW2_RCLR	arch/x86/include/asm/i8259.h	/^#define OCW2_RCLR	/;"	d
OCW2_REOI	arch/x86/include/asm/i8259.h	/^#define OCW2_REOI	/;"	d
OCW2_RSEOI	arch/x86/include/asm/i8259.h	/^#define OCW2_RSEOI	/;"	d
OCW2_RSET	arch/x86/include/asm/i8259.h	/^#define OCW2_RSET	/;"	d
OCW2_SEOI	arch/x86/include/asm/i8259.h	/^#define OCW2_SEOI	/;"	d
OCW3	arch/x86/include/asm/i8259.h	/^#define OCW3	/;"	d
OC_MODE0	include/sja1000.h	/^#define OC_MODE0	/;"	d
OC_MODE1	include/sja1000.h	/^#define OC_MODE1	/;"	d
OC_POL0	include/sja1000.h	/^#define OC_POL0	/;"	d
OC_POL1	include/sja1000.h	/^#define OC_POL1	/;"	d
OC_TN0	include/sja1000.h	/^#define OC_TN0	/;"	d
OC_TN1	include/sja1000.h	/^#define OC_TN1	/;"	d
OC_TP0	include/sja1000.h	/^#define OC_TP0	/;"	d
OC_TP1	include/sja1000.h	/^#define OC_TP1	/;"	d
OD	arch/arm/include/asm/omap_mmc.h	/^#define OD	/;"	d
ODPG_BIST_DATA_ERROR_COUNTER_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_DATA_ERROR_COUNTER_REG	/;"	d
ODPG_BIST_DONE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_DONE	/;"	d
ODPG_BIST_DONE_BIT_OFFS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_DONE_BIT_OFFS	/;"	d
ODPG_BIST_DONE_BIT_VALUE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_DONE_BIT_VALUE	/;"	d
ODPG_BIST_FAILED_DATA_HI_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_FAILED_DATA_HI_REG	/;"	d
ODPG_BIST_FAILED_DATA_LOW_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_FAILED_DATA_LOW_REG	/;"	d
ODPG_BIST_LAST_FAIL_ADDR_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_BIST_LAST_FAIL_ADDR_REG	/;"	d
ODPG_CTRL_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_CTRL_CONTROL_REG	/;"	d
ODPG_DATA_BUF_SIZE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_DATA_BUF_SIZE_REG	/;"	d
ODPG_DATA_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_DATA_CONTROL_REG	/;"	d
ODPG_DISABLE_OFFS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_DISABLE_OFFS	/;"	d
ODPG_ENABLE_OFFS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_ENABLE_OFFS	/;"	d
ODPG_ENABLE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_ENABLE_REG	/;"	d
ODPG_OBJ1_ITER_CNT_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_OBJ1_ITER_CNT_REG	/;"	d
ODPG_OBJ1_OPCODE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_OBJ1_OPCODE_REG	/;"	d
ODPG_PATTERN_ADDR_OFFSET_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_PATTERN_ADDR_OFFSET_REG	/;"	d
ODPG_PATTERN_ADDR_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_PATTERN_ADDR_REG	/;"	d
ODPG_PATTERN_DATA_HI_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_PATTERN_DATA_HI_REG	/;"	d
ODPG_PATTERN_DATA_LOW_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_PATTERN_DATA_LOW_REG	/;"	d
ODPG_STATUS_DONE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_STATUS_DONE_REG	/;"	d
ODPG_TRAINING_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_TRAINING_CONTROL_REG	/;"	d
ODPG_TRAINING_STATUS_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_TRAINING_STATUS_REG	/;"	d
ODPG_TRAINING_TRIGGER_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_TRAINING_TRIGGER_REG	/;"	d
ODPG_WRITE_DATA_ERROR_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_WRITE_DATA_ERROR_REG	/;"	d
ODPG_WRITE_LEVELING_DONE_CNTR_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_WRITE_LEVELING_DONE_CNTR_REG	/;"	d
ODPG_WRITE_READ_MODE_ENABLE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODPG_WRITE_READ_MODE_ENABLE_REG	/;"	d
ODR	cmd/immap.c	/^		ODR,$/;"	e	enum:do_iopset::__anonb0469eed0103	file:
ODROID_TYPES	board/samsung/odroid/odroid.c	/^	ODROID_TYPES,$/;"	e	enum:__anon92f9b24b0103	file:
ODROID_TYPE_U3	board/samsung/odroid/odroid.c	/^	ODROID_TYPE_U3,$/;"	e	enum:__anon92f9b24b0103	file:
ODROID_TYPE_X2	board/samsung/odroid/odroid.c	/^	ODROID_TYPE_X2,$/;"	e	enum:__anon92f9b24b0103	file:
ODS_FULL	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODS_FULL	/;"	d	file:
ODS_REDUCED	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODS_REDUCED	/;"	d	file:
ODT120	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ODT120	/;"	d
ODT120D	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ODT120D	/;"	d
ODT20	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ODT20	/;"	d
ODT30	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ODT30	/;"	d
ODT40	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ODT40	/;"	d
ODTRDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define ODTRDLY(/;"	d
ODTRLEN	drivers/ddr/microchip/ddr2_regs.h	/^#define ODTRLEN(/;"	d
ODTWDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define ODTWDLY(/;"	d
ODTWLEN	drivers/ddr/microchip/ddr2_regs.h	/^#define ODTWLEN(/;"	d
ODT_0_OHM	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODT_0_OHM	/;"	d	file:
ODT_150_OHM	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODT_150_OHM	/;"	d	file:
ODT_50_OHM	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODT_50_OHM	/;"	d	file:
ODT_75_OHM	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODT_75_OHM	/;"	d	file:
ODT_DISABLE	arch/arm/mach-keystone/ddr3_spd.c	/^	ODT_DISABLE = 0,$/;"	e	enum:die_term	file:
ODT_EB0R	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODT_EB0R	/;"	d	file:
ODT_EB0W	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ODT_EB0W	/;"	d	file:
ODT_EN	drivers/ddr/microchip/ddr2_regs.h	/^#define ODT_EN	/;"	d
ODT_LEN_BL8_W_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define ODT_LEN_BL8_W_SHIFT	/;"	d
ODT_LEN_BL8_W_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	ODT_LEN_BL8_W_SHIFT		= 16,$/;"	e	enum:__anon957231910203	file:
ODT_OPT	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define ODT_OPT	/;"	d
ODT_PULLDOWN	drivers/ddr/microchip/ddr2_regs.h	/^#define ODT_PULLDOWN(/;"	d
ODT_PULLUP	drivers/ddr/microchip/ddr2_regs.h	/^#define ODT_PULLUP(/;"	d
ODT_SEL	drivers/ddr/microchip/ddr2_regs.h	/^#define ODT_SEL	/;"	d
ODT_TIMING_HI_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODT_TIMING_HI_REG	/;"	d
ODT_TIMING_LOW	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define ODT_TIMING_LOW	/;"	d
OD_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define OD_SHIFT	/;"	d	file:
OE	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define OE	/;"	d
OE	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define OE	/;"	d
OEA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define OEA(/;"	d
OEEXTRADELAY	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define OEEXTRADELAY /;"	d
OEM_ID	arch/x86/include/asm/acpi_table.h	/^#define OEM_ID	/;"	d
OEM_TABLE_ID	arch/x86/include/asm/acpi_table.h	/^#define OEM_TABLE_ID	/;"	d
OEN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define OEN(/;"	d
OEOFFTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define OEOFFTIME(/;"	d
OEONTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define OEONTIME(/;"	d
OEP_MAXPS	include/usb/fotg210.h	/^#define OEP_MAXPS(/;"	d
OEP_RESET	include/usb/fotg210.h	/^#define OEP_RESET /;"	d
OEP_STALL	include/usb/fotg210.h	/^#define OEP_STALL /;"	d
OE_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define OE_P	/;"	d
OF	include/u-boot/zlib.h	/^#    define OF(/;"	d
OFF	drivers/bios_emulator/biosemu.c	/^#define OFF(/;"	d	file:
OFF	include/lattice.h	/^#define OFF	/;"	d
OFF	lib/zlib/inffast.c	/^#  define OFF /;"	d	file:
OFFOUT_EN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_EN	include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_EN	/;"	d
OFFOUT_VAL	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFOUT_VAL	include/dt-bindings/pinctrl/omap.h	/^#define OFFOUT_VAL	/;"	d
OFFSET	arch/arm/include/asm/arch-am33xx/mux.h	/^#define OFFSET(/;"	d
OFFSET	arch/arm/mach-tegra/tegra114/clock.c	/^#define OFFSET(/;"	d	file:
OFFSET	arch/arm/mach-tegra/tegra124/clock.c	/^#define OFFSET(/;"	d	file:
OFFSET	arch/arm/mach-tegra/tegra20/clock.c	/^#define OFFSET(/;"	d	file:
OFFSET	arch/arm/mach-tegra/tegra210/clock.c	/^#define OFFSET(/;"	d	file:
OFFSET	arch/arm/mach-tegra/tegra30/clock.c	/^#define OFFSET(/;"	d	file:
OFFSET	fs/cramfs/cramfs.c	/^#define OFFSET(/;"	d	file:
OFFSET	include/linux/kbuild.h	/^#define OFFSET(/;"	d
OFFSET_	arch/blackfin/include/asm/blackfin_local.h	/^#define OFFSET_(/;"	d
OFFSET_ADJUSTMENT	cmd/cramfs.c	/^# define OFFSET_ADJUSTMENT	/;"	d	file:
OFFSET_BITS_MASK	drivers/spi/fsl_qspi.c	/^#define OFFSET_BITS_MASK	/;"	d	file:
OFFSET_MASK	fs/zfs/zfs_lzjb.c	/^#define	OFFSET_MASK	/;"	d	file:
OFFSET_NOT_SPECIFIED	cmd/jffs2.c	/^#define OFFSET_NOT_SPECIFIED	/;"	d	file:
OFFSET_NOT_SPECIFIED	cmd/mtdparts.c	/^#define OFFSET_NOT_SPECIFIED	/;"	d	file:
OFFSET_TO_BIT	drivers/gpio/rk_gpio.c	/^#define OFFSET_TO_BIT(/;"	d	file:
OFFS_PATTERN	drivers/bootcount/bootcount_ram.c	/^const ulong OFFS_PATTERN    = 3;$/;"	v	typeref:typename:const ulong
OFF_EN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_EN /;"	d
OFF_EN	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_EN /;"	d
OFF_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_EN	include/dt-bindings/pinctrl/omap.h	/^#define OFF_EN	/;"	d
OFF_IN	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_IN /;"	d
OFF_IN	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_IN /;"	d
OFF_IN_PD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_IN_PD /;"	d
OFF_IN_PD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_IN_PD /;"	d
OFF_IN_PU	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_IN_PU /;"	d
OFF_IN_PU	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_IN_PU /;"	d
OFF_OFF	include/power/pfuze100_pmic.h	/^#define OFF_OFF	/;"	d
OFF_OUT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_OUT /;"	d
OFF_OUT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_OUT /;"	d
OFF_OUT_PD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_OUT_PD /;"	d
OFF_OUT_PD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_OUT_PD /;"	d
OFF_OUT_PTD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_OUT_PTD /;"	d
OFF_OUT_PTD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_OUT_PTD /;"	d
OFF_OUT_PTU	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_OUT_PTU /;"	d
OFF_OUT_PTU	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_OUT_PTU /;"	d
OFF_OUT_PU	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_OUT_PU /;"	d
OFF_OUT_PU	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_OUT_PU /;"	d
OFF_PD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_PD /;"	d
OFF_PD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_PD /;"	d
OFF_PG	board/siemens/common/factoryset.c	/^#define OFF_PG /;"	d	file:
OFF_PU	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define OFF_PU /;"	d
OFF_PU	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define OFF_PU /;"	d
OFF_PULL_EN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_EN	include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_EN	/;"	d
OFF_PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OFF_PULL_UP	include/dt-bindings/pinctrl/omap.h	/^#define OFF_PULL_UP	/;"	d
OF_953X	drivers/gpio/pca953x_gpio.c	/^#define OF_953X(/;"	d	file:
OF_957X	drivers/gpio/pca953x_gpio.c	/^#define OF_957X(/;"	d	file:
OF_BAD_ADDR	common/fdt_support.c	/^#define OF_BAD_ADDR	/;"	d	file:
OF_BOARD_SETUP	Kconfig	/^config OF_BOARD_SETUP$/;"	c	menu:Boot images
OF_CHECK_COUNTS	common/fdt_support.c	/^#define OF_CHECK_COUNTS(/;"	d	file:
OF_CONTROL	dts/Kconfig	/^config OF_CONTROL$/;"	c	menu:Device Tree Control
OF_CPU	include/configs/TQM5200.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/a3m071.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/a4m072.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/ac14xx.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/aria.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/cm5200.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/digsy_mtc.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/ipek01.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/manroland/mpc5200-common.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/mecp5123.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/motionpro.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/mpc5121ads.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/munices.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/o2dnt-common.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/pcm030.h	/^#define OF_CPU	/;"	d
OF_CPU	include/configs/pdm360ng.h	/^#define OF_CPU	/;"	d
OF_EMBED	dts/Kconfig	/^config OF_EMBED$/;"	c	choice:Device Tree Control""choice08bc65400104
OF_FLAT_TREE_MAX_SIZE	include/configs/MPC8610HPCD.h	/^#define OF_FLAT_TREE_MAX_SIZE	/;"	d
OF_FLAT_TREE_MAX_SIZE	include/configs/a3m071.h	/^#define OF_FLAT_TREE_MAX_SIZE	/;"	d
OF_HOSTFILE	dts/Kconfig	/^config OF_HOSTFILE$/;"	c	choice:Device Tree Control""choice08bc65400104
OF_ISA_BUS	drivers/core/Kconfig	/^config OF_ISA_BUS$/;"	c	menu:Generic Driver Options
OF_LIBFDT	lib/Kconfig	/^config OF_LIBFDT$/;"	c	menu:Library routines
OF_LIBFDT_OVERLAY	lib/Kconfig	/^config OF_LIBFDT_OVERLAY$/;"	c	menu:Library routines
OF_LIST	dts/Kconfig	/^config OF_LIST$/;"	c	menu:Device Tree Control
OF_LIST_TARGETS	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^OF_LIST_TARGETS = $(patsubst %,arch\/$(ARCH)\/dts\/%.dtb,$(subst ",,$(CONFIG_OF_LIST)))$/;"	m
OF_MAX_ADDR_CELLS	common/fdt_support.c	/^#define OF_MAX_ADDR_CELLS	/;"	d	file:
OF_PLATDATA_OUTPUT	test/py/tests/test_ofplatdata.py	/^OF_PLATDATA_OUTPUT = '''$/;"	v
OF_SEPARATE	dts/Kconfig	/^config OF_SEPARATE$/;"	c	choice:Device Tree Control""choice08bc65400104
OF_SOC	include/configs/TQM5200.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/a3m071.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/a4m072.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/cm5200.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/digsy_mtc.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/ipek01.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/manroland/mpc5200-common.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/motionpro.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/munices.h	/^#define OF_SOC /;"	d
OF_SOC	include/configs/o2dnt-common.h	/^#define OF_SOC	/;"	d
OF_SOC	include/configs/pcm030.h	/^#define OF_SOC	/;"	d
OF_SOC_COMPAT	include/configs/ac14xx.h	/^#define OF_SOC_COMPAT	/;"	d
OF_SOC_COMPAT	include/configs/aria.h	/^#define OF_SOC_COMPAT	/;"	d
OF_SOC_COMPAT	include/configs/mecp5123.h	/^#define OF_SOC_COMPAT	/;"	d
OF_SOC_COMPAT	include/configs/mpc5121ads.h	/^#define OF_SOC_COMPAT	/;"	d
OF_SOC_COMPAT	include/configs/pdm360ng.h	/^#define OF_SOC_COMPAT	/;"	d
OF_SPL_REMOVE_PROPS	dts/Kconfig	/^config OF_SPL_REMOVE_PROPS$/;"	c	menu:Device Tree Control
OF_STDOUT_PATH	include/configs/TQM5200.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/a3m071.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/a4m072.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/ac14xx.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/aria.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/cm5200.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/km82xx.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/manroland/mpc5200-common.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/mecp5123.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/motionpro.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/mpc5121ads.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/munices.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/pcm030.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/pdm360ng.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_PATH	include/configs/sunxi-common.h	/^#define OF_STDOUT_PATH	/;"	d
OF_STDOUT_VIA_ALIAS	Kconfig	/^config OF_STDOUT_VIA_ALIAS$/;"	c	menu:Boot images
OF_SYSTEM_SETUP	Kconfig	/^config OF_SYSTEM_SETUP$/;"	c	menu:Boot images
OF_TBCLK	include/configs/TQM5200.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/a3m071.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/a4m072.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/ac14xx.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/aria.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/cm5200.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/digsy_mtc.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/ipek01.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/km82xx.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/manroland/mpc5200-common.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/mecp5123.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/motionpro.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/mpc5121ads.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/munices.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/o2dnt-common.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/pcm030.h	/^#define OF_TBCLK	/;"	d
OF_TBCLK	include/configs/pdm360ng.h	/^#define OF_TBCLK	/;"	d
OF_TRANSLATE	drivers/core/Kconfig	/^config OF_TRANSLATE$/;"	c	menu:Generic Driver Options
OHCI_BLF	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_BLF	/;"	d
OHCI_BLF	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_BLF	/;"	d
OHCI_BLF	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_BLF	/;"	d
OHCI_BLF	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_BLF	/;"	d
OHCI_BLF	drivers/usb/host/ohci.h	/^#define OHCI_BLF	/;"	d
OHCI_CLF	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CLF	/;"	d
OHCI_CLF	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CLF	/;"	d
OHCI_CLF	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CLF	/;"	d
OHCI_CLF	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CLF	/;"	d
OHCI_CLF	drivers/usb/host/ohci.h	/^#define OHCI_CLF	/;"	d
OHCI_CONTROL_INIT	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define OHCI_CONTROL_INIT /;"	d	file:
OHCI_CONTROL_INIT	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define OHCI_CONTROL_INIT /;"	d	file:
OHCI_CONTROL_INIT	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define OHCI_CONTROL_INIT /;"	d	file:
OHCI_CONTROL_INIT	drivers/usb/host/ohci-hcd.c	/^#define OHCI_CONTROL_INIT /;"	d	file:
OHCI_CONTROL_INIT	drivers/usb/host/ohci-s3c24xx.c	/^#define	OHCI_CONTROL_INIT /;"	d	file:
OHCI_CTRL_BLE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_BLE	/;"	d
OHCI_CTRL_BLE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_BLE	/;"	d
OHCI_CTRL_BLE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_BLE	/;"	d
OHCI_CTRL_BLE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_BLE	/;"	d
OHCI_CTRL_BLE	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_BLE	/;"	d
OHCI_CTRL_CBSR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_CBSR	/;"	d
OHCI_CTRL_CBSR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_CBSR	/;"	d
OHCI_CTRL_CBSR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_CBSR	/;"	d
OHCI_CTRL_CBSR	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_CBSR	/;"	d
OHCI_CTRL_CBSR	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_CBSR	/;"	d
OHCI_CTRL_CLE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_CLE	/;"	d
OHCI_CTRL_CLE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_CLE	/;"	d
OHCI_CTRL_CLE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_CLE	/;"	d
OHCI_CTRL_CLE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_CLE	/;"	d
OHCI_CTRL_CLE	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_CLE	/;"	d
OHCI_CTRL_HCFS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_HCFS	/;"	d
OHCI_CTRL_HCFS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_HCFS	/;"	d
OHCI_CTRL_HCFS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_HCFS	/;"	d
OHCI_CTRL_HCFS	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_HCFS	/;"	d
OHCI_CTRL_HCFS	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_HCFS	/;"	d
OHCI_CTRL_IE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_IE	/;"	d
OHCI_CTRL_IE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_IE	/;"	d
OHCI_CTRL_IE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_IE	/;"	d
OHCI_CTRL_IE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_IE	/;"	d
OHCI_CTRL_IE	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_IE	/;"	d
OHCI_CTRL_IR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_IR	/;"	d
OHCI_CTRL_IR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_IR	/;"	d
OHCI_CTRL_IR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_IR	/;"	d
OHCI_CTRL_IR	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_IR	/;"	d
OHCI_CTRL_IR	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_IR	/;"	d
OHCI_CTRL_PLE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_PLE	/;"	d
OHCI_CTRL_PLE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_PLE	/;"	d
OHCI_CTRL_PLE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_PLE	/;"	d
OHCI_CTRL_PLE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_PLE	/;"	d
OHCI_CTRL_PLE	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_PLE	/;"	d
OHCI_CTRL_RWC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_RWC	/;"	d
OHCI_CTRL_RWC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_RWC	/;"	d
OHCI_CTRL_RWC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_RWC	/;"	d
OHCI_CTRL_RWC	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_RWC	/;"	d
OHCI_CTRL_RWC	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_RWC	/;"	d
OHCI_CTRL_RWE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_CTRL_RWE	/;"	d
OHCI_CTRL_RWE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_CTRL_RWE	/;"	d
OHCI_CTRL_RWE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_CTRL_RWE	/;"	d
OHCI_CTRL_RWE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_CTRL_RWE	/;"	d
OHCI_CTRL_RWE	drivers/usb/host/ohci.h	/^#define OHCI_CTRL_RWE	/;"	d
OHCI_ED_SKIP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_ED_SKIP	/;"	d
OHCI_ED_SKIP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_ED_SKIP	/;"	d
OHCI_ED_SKIP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_ED_SKIP	/;"	d
OHCI_ED_SKIP	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_ED_SKIP	/;"	d
OHCI_ED_SKIP	drivers/usb/host/ohci.h	/^#define OHCI_ED_SKIP	/;"	d
OHCI_FILL_TRACE	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define OHCI_FILL_TRACE$/;"	d	file:
OHCI_HCR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_HCR	/;"	d
OHCI_HCR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_HCR	/;"	d
OHCI_HCR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_HCR	/;"	d
OHCI_HCR	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_HCR	/;"	d
OHCI_HCR	drivers/usb/host/ohci.h	/^#define OHCI_HCR	/;"	d
OHCI_INTR_FNO	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_FNO	/;"	d
OHCI_INTR_FNO	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_FNO	/;"	d
OHCI_INTR_FNO	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_FNO	/;"	d
OHCI_INTR_FNO	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_FNO	/;"	d
OHCI_INTR_FNO	drivers/usb/host/ohci.h	/^#define OHCI_INTR_FNO	/;"	d
OHCI_INTR_MIE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_MIE	/;"	d
OHCI_INTR_MIE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_MIE	/;"	d
OHCI_INTR_MIE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_MIE	/;"	d
OHCI_INTR_MIE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_MIE	/;"	d
OHCI_INTR_MIE	drivers/usb/host/ohci.h	/^#define OHCI_INTR_MIE	/;"	d
OHCI_INTR_OC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_OC	/;"	d
OHCI_INTR_OC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_OC	/;"	d
OHCI_INTR_OC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_OC	/;"	d
OHCI_INTR_OC	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_OC	/;"	d
OHCI_INTR_OC	drivers/usb/host/ohci.h	/^#define OHCI_INTR_OC	/;"	d
OHCI_INTR_RD	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_RD	/;"	d
OHCI_INTR_RD	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_RD	/;"	d
OHCI_INTR_RD	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_RD	/;"	d
OHCI_INTR_RD	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_RD	/;"	d
OHCI_INTR_RD	drivers/usb/host/ohci.h	/^#define OHCI_INTR_RD	/;"	d
OHCI_INTR_RHSC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_RHSC	/;"	d
OHCI_INTR_RHSC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_RHSC	/;"	d
OHCI_INTR_RHSC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_RHSC	/;"	d
OHCI_INTR_RHSC	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_RHSC	/;"	d
OHCI_INTR_RHSC	drivers/usb/host/ohci.h	/^#define OHCI_INTR_RHSC	/;"	d
OHCI_INTR_SF	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_SF	/;"	d
OHCI_INTR_SF	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_SF	/;"	d
OHCI_INTR_SF	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_SF	/;"	d
OHCI_INTR_SF	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_SF	/;"	d
OHCI_INTR_SF	drivers/usb/host/ohci.h	/^#define OHCI_INTR_SF	/;"	d
OHCI_INTR_SO	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_SO	/;"	d
OHCI_INTR_SO	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_SO	/;"	d
OHCI_INTR_SO	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_SO	/;"	d
OHCI_INTR_SO	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_SO	/;"	d
OHCI_INTR_SO	drivers/usb/host/ohci.h	/^#define OHCI_INTR_SO	/;"	d
OHCI_INTR_UE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_UE	/;"	d
OHCI_INTR_UE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_UE	/;"	d
OHCI_INTR_UE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_UE	/;"	d
OHCI_INTR_UE	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_UE	/;"	d
OHCI_INTR_UE	drivers/usb/host/ohci.h	/^#define OHCI_INTR_UE	/;"	d
OHCI_INTR_WDH	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_INTR_WDH	/;"	d
OHCI_INTR_WDH	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_INTR_WDH	/;"	d
OHCI_INTR_WDH	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_INTR_WDH	/;"	d
OHCI_INTR_WDH	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_INTR_WDH	/;"	d
OHCI_INTR_WDH	drivers/usb/host/ohci.h	/^#define OHCI_INTR_WDH	/;"	d
OHCI_OCR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_OCR	/;"	d
OHCI_OCR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_OCR	/;"	d
OHCI_OCR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_OCR	/;"	d
OHCI_OCR	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_OCR	/;"	d
OHCI_OCR	drivers/usb/host/ohci.h	/^#define OHCI_OCR	/;"	d
OHCI_OFFSET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define OHCI_OFFSET	/;"	d
OHCI_QUIRK_AMD756	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define OHCI_QUIRK_AMD756 /;"	d	file:
OHCI_QUIRK_AMD756	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define OHCI_QUIRK_AMD756 /;"	d	file:
OHCI_QUIRK_AMD756	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define OHCI_QUIRK_AMD756 /;"	d	file:
OHCI_QUIRK_AMD756	drivers/usb/host/ohci-s3c24xx.c	/^#define OHCI_QUIRK_AMD756 /;"	d	file:
OHCI_REGS_BASE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OHCI_REGS_BASE	/;"	d
OHCI_SIZE	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define OHCI_SIZE	/;"	d
OHCI_SOC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define OHCI_SOC	/;"	d
OHCI_SOC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define OHCI_SOC	/;"	d
OHCI_SOC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define OHCI_SOC	/;"	d
OHCI_SOC	drivers/usb/host/ohci-s3c24xx.h	/^#define OHCI_SOC	/;"	d
OHCI_SOC	drivers/usb/host/ohci.h	/^#define OHCI_SOC	/;"	d
OHCI_USB_OPER	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#	define OHCI_USB_OPER	/;"	d
OHCI_USB_OPER	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#	define OHCI_USB_OPER	/;"	d
OHCI_USB_OPER	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#	define OHCI_USB_OPER	/;"	d
OHCI_USB_OPER	drivers/usb/host/ohci-s3c24xx.h	/^#	define OHCI_USB_OPER	/;"	d
OHCI_USB_OPER	drivers/usb/host/ohci.h	/^#	define OHCI_USB_OPER	/;"	d
OHCI_USB_RESET	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#	define OHCI_USB_RESET	/;"	d
OHCI_USB_RESET	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#	define OHCI_USB_RESET	/;"	d
OHCI_USB_RESET	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#	define OHCI_USB_RESET	/;"	d
OHCI_USB_RESET	drivers/usb/host/ohci-s3c24xx.h	/^#	define OHCI_USB_RESET	/;"	d
OHCI_USB_RESET	drivers/usb/host/ohci.h	/^#	define OHCI_USB_RESET	/;"	d
OHCI_USB_RESUME	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#	define OHCI_USB_RESUME	/;"	d
OHCI_USB_RESUME	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#	define OHCI_USB_RESUME	/;"	d
OHCI_USB_RESUME	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#	define OHCI_USB_RESUME	/;"	d
OHCI_USB_RESUME	drivers/usb/host/ohci-s3c24xx.h	/^#	define OHCI_USB_RESUME	/;"	d
OHCI_USB_RESUME	drivers/usb/host/ohci.h	/^#	define OHCI_USB_RESUME	/;"	d
OHCI_USB_SUSPEND	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#	define OHCI_USB_SUSPEND	/;"	d
OHCI_USB_SUSPEND	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#	define OHCI_USB_SUSPEND /;"	d
OHCI_USB_SUSPEND	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#	define OHCI_USB_SUSPEND /;"	d
OHCI_USB_SUSPEND	drivers/usb/host/ohci-s3c24xx.h	/^#	define OHCI_USB_SUSPEND	/;"	d
OHCI_USB_SUSPEND	drivers/usb/host/ohci.h	/^#	define OHCI_USB_SUSPEND /;"	d
OHCI_USE_NPS	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define OHCI_USE_NPS	/;"	d	file:
OHCI_USE_NPS	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define OHCI_USE_NPS	/;"	d	file:
OHCI_USE_NPS	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define OHCI_USE_NPS	/;"	d	file:
OHCI_USE_NPS	drivers/usb/host/ohci-hcd.c	/^# define OHCI_USE_NPS	/;"	d	file:
OHCI_USE_NPS	drivers/usb/host/ohci-s3c24xx.c	/^#define OHCI_USE_NPS	/;"	d	file:
OHCI_VERBOSE_DEBUG	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define OHCI_VERBOSE_DEBUG	/;"	d	file:
OH_ADDR	include/bedbug/ppc.h	/^#define OH_ADDR	/;"	d
OH_LITERAL	include/bedbug/ppc.h	/^#define OH_LITERAL /;"	d
OH_OFFSET	include/bedbug/ppc.h	/^#define OH_OFFSET	/;"	d
OH_PORT_ID_BASE	drivers/net/fm/fm.h	/^#define OH_PORT_ID_BASE	/;"	d
OH_REG	include/bedbug/ppc.h	/^#define OH_REG	/;"	d
OH_SILENT	include/bedbug/ppc.h	/^#define OH_SILENT	/;"	d
OH_SPR	include/bedbug/ppc.h	/^#define OH_SPR	/;"	d
OH_TBR	include/bedbug/ppc.h	/^#define OH_TBR	/;"	d
OIC	arch/x86/include/asm/arch-broadwell/pch.h	/^#define OIC	/;"	d
OIC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define OIC	/;"	d
OID	drivers/usb/gadget/rndis.h	/^	__le32	OID;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
OID	drivers/usb/gadget/rndis.h	/^	__le32	OID;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
OID_802_3_CURRENT_ADDRESS	drivers/usb/gadget/ndis.h	/^#define OID_802_3_CURRENT_ADDRESS /;"	d
OID_802_3_MAC_OPTIONS	drivers/usb/gadget/ndis.h	/^#define OID_802_3_MAC_OPTIONS /;"	d
OID_802_3_MAXIMUM_LIST_SIZE	drivers/usb/gadget/ndis.h	/^#define OID_802_3_MAXIMUM_LIST_SIZE /;"	d
OID_802_3_MULTICAST_LIST	drivers/usb/gadget/ndis.h	/^#define OID_802_3_MULTICAST_LIST /;"	d
OID_802_3_PERMANENT_ADDRESS	drivers/usb/gadget/ndis.h	/^#define OID_802_3_PERMANENT_ADDRESS /;"	d
OID_802_3_RCV_ERROR_ALIGNMENT	drivers/usb/gadget/ndis.h	/^#define OID_802_3_RCV_ERROR_ALIGNMENT /;"	d
OID_802_3_RCV_OVERRUN	drivers/usb/gadget/ndis.h	/^#define OID_802_3_RCV_OVERRUN /;"	d
OID_802_3_XMIT_DEFERRED	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_DEFERRED /;"	d
OID_802_3_XMIT_HEARTBEAT_FAILURE	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_HEARTBEAT_FAILURE /;"	d
OID_802_3_XMIT_LATE_COLLISIONS	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_LATE_COLLISIONS /;"	d
OID_802_3_XMIT_MAX_COLLISIONS	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_MAX_COLLISIONS /;"	d
OID_802_3_XMIT_MORE_COLLISIONS	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_MORE_COLLISIONS /;"	d
OID_802_3_XMIT_ONE_COLLISION	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_ONE_COLLISION /;"	d
OID_802_3_XMIT_TIMES_CRS_LOST	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_TIMES_CRS_LOST /;"	d
OID_802_3_XMIT_UNDERRUN	drivers/usb/gadget/ndis.h	/^#define OID_802_3_XMIT_UNDERRUN /;"	d
OID_GEN_BROADCAST_BYTES_RCV	drivers/usb/gadget/ndis.h	/^#define OID_GEN_BROADCAST_BYTES_RCV /;"	d
OID_GEN_BROADCAST_BYTES_XMIT	drivers/usb/gadget/ndis.h	/^#define OID_GEN_BROADCAST_BYTES_XMIT /;"	d
OID_GEN_BROADCAST_FRAMES_RCV	drivers/usb/gadget/ndis.h	/^#define OID_GEN_BROADCAST_FRAMES_RCV /;"	d
OID_GEN_BROADCAST_FRAMES_XMIT	drivers/usb/gadget/ndis.h	/^#define OID_GEN_BROADCAST_FRAMES_XMIT /;"	d
OID_GEN_CURRENT_LOOKAHEAD	drivers/usb/gadget/ndis.h	/^#define OID_GEN_CURRENT_LOOKAHEAD /;"	d
OID_GEN_CURRENT_PACKET_FILTER	drivers/usb/gadget/ndis.h	/^#define OID_GEN_CURRENT_PACKET_FILTER /;"	d
OID_GEN_DEVICE_PROFILE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_DEVICE_PROFILE /;"	d
OID_GEN_DIRECTED_BYTES_RCV	drivers/usb/gadget/ndis.h	/^#define OID_GEN_DIRECTED_BYTES_RCV /;"	d
OID_GEN_DIRECTED_BYTES_XMIT	drivers/usb/gadget/ndis.h	/^#define OID_GEN_DIRECTED_BYTES_XMIT /;"	d
OID_GEN_DIRECTED_FRAMES_RCV	drivers/usb/gadget/ndis.h	/^#define OID_GEN_DIRECTED_FRAMES_RCV /;"	d
OID_GEN_DIRECTED_FRAMES_XMIT	drivers/usb/gadget/ndis.h	/^#define OID_GEN_DIRECTED_FRAMES_XMIT /;"	d
OID_GEN_DRIVER_VERSION	drivers/usb/gadget/ndis.h	/^#define OID_GEN_DRIVER_VERSION /;"	d
OID_GEN_FRIENDLY_NAME	drivers/usb/gadget/ndis.h	/^#define OID_GEN_FRIENDLY_NAME /;"	d
OID_GEN_GET_NETCARD_TIME	drivers/usb/gadget/ndis.h	/^#define OID_GEN_GET_NETCARD_TIME /;"	d
OID_GEN_GET_TIME_CAPS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_GET_TIME_CAPS /;"	d
OID_GEN_HARDWARE_STATUS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_HARDWARE_STATUS /;"	d
OID_GEN_INIT_TIME_MS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_INIT_TIME_MS /;"	d
OID_GEN_LINK_SPEED	drivers/usb/gadget/ndis.h	/^#define OID_GEN_LINK_SPEED /;"	d
OID_GEN_MACHINE_NAME	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MACHINE_NAME /;"	d
OID_GEN_MAC_OPTIONS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MAC_OPTIONS /;"	d
OID_GEN_MAXIMUM_FRAME_SIZE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MAXIMUM_FRAME_SIZE /;"	d
OID_GEN_MAXIMUM_LOOKAHEAD	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MAXIMUM_LOOKAHEAD /;"	d
OID_GEN_MAXIMUM_SEND_PACKETS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MAXIMUM_SEND_PACKETS /;"	d
OID_GEN_MAXIMUM_TOTAL_SIZE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MAXIMUM_TOTAL_SIZE /;"	d
OID_GEN_MEDIA_CAPABILITIES	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MEDIA_CAPABILITIES /;"	d
OID_GEN_MEDIA_CONNECT_STATUS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MEDIA_CONNECT_STATUS /;"	d
OID_GEN_MEDIA_IN_USE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MEDIA_IN_USE /;"	d
OID_GEN_MEDIA_SENSE_COUNTS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MEDIA_SENSE_COUNTS /;"	d
OID_GEN_MEDIA_SUPPORTED	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MEDIA_SUPPORTED /;"	d
OID_GEN_MINIPORT_INFO	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MINIPORT_INFO /;"	d
OID_GEN_MULTICAST_BYTES_RCV	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MULTICAST_BYTES_RCV /;"	d
OID_GEN_MULTICAST_BYTES_XMIT	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MULTICAST_BYTES_XMIT /;"	d
OID_GEN_MULTICAST_FRAMES_RCV	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MULTICAST_FRAMES_RCV /;"	d
OID_GEN_MULTICAST_FRAMES_XMIT	drivers/usb/gadget/ndis.h	/^#define OID_GEN_MULTICAST_FRAMES_XMIT /;"	d
OID_GEN_NETCARD_LOAD	drivers/usb/gadget/ndis.h	/^#define OID_GEN_NETCARD_LOAD /;"	d
OID_GEN_NETWORK_LAYER_ADDRESSES	drivers/usb/gadget/ndis.h	/^#define OID_GEN_NETWORK_LAYER_ADDRESSES /;"	d
OID_GEN_PHYSICAL_MEDIUM	drivers/usb/gadget/ndis.h	/^#define OID_GEN_PHYSICAL_MEDIUM /;"	d
OID_GEN_PROTOCOL_OPTIONS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_PROTOCOL_OPTIONS /;"	d
OID_GEN_RCV_CRC_ERROR	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RCV_CRC_ERROR /;"	d
OID_GEN_RCV_ERROR	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RCV_ERROR /;"	d
OID_GEN_RCV_NO_BUFFER	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RCV_NO_BUFFER /;"	d
OID_GEN_RCV_OK	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RCV_OK /;"	d
OID_GEN_RECEIVE_BLOCK_SIZE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RECEIVE_BLOCK_SIZE /;"	d
OID_GEN_RECEIVE_BUFFER_SPACE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RECEIVE_BUFFER_SPACE /;"	d
OID_GEN_RESET_COUNTS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RESET_COUNTS /;"	d
OID_GEN_RESET_VERIFY_PARAMETERS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RESET_VERIFY_PARAMETERS /;"	d
OID_GEN_RNDIS_CONFIG_PARAMETER	drivers/usb/gadget/ndis.h	/^#define OID_GEN_RNDIS_CONFIG_PARAMETER /;"	d
OID_GEN_SUPPORTED_GUIDS	drivers/usb/gadget/ndis.h	/^#define OID_GEN_SUPPORTED_GUIDS /;"	d
OID_GEN_SUPPORTED_LIST	drivers/usb/gadget/ndis.h	/^#define OID_GEN_SUPPORTED_LIST /;"	d
OID_GEN_TRANSMIT_BLOCK_SIZE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_TRANSMIT_BLOCK_SIZE /;"	d
OID_GEN_TRANSMIT_BUFFER_SPACE	drivers/usb/gadget/ndis.h	/^#define OID_GEN_TRANSMIT_BUFFER_SPACE /;"	d
OID_GEN_TRANSMIT_QUEUE_LENGTH	drivers/usb/gadget/ndis.h	/^#define OID_GEN_TRANSMIT_QUEUE_LENGTH /;"	d
OID_GEN_TRANSPORT_HEADER_OFFSET	drivers/usb/gadget/ndis.h	/^#define OID_GEN_TRANSPORT_HEADER_OFFSET /;"	d
OID_GEN_VENDOR_DESCRIPTION	drivers/usb/gadget/ndis.h	/^#define OID_GEN_VENDOR_DESCRIPTION /;"	d
OID_GEN_VENDOR_DRIVER_VERSION	drivers/usb/gadget/ndis.h	/^#define OID_GEN_VENDOR_DRIVER_VERSION /;"	d
OID_GEN_VENDOR_ID	drivers/usb/gadget/ndis.h	/^#define OID_GEN_VENDOR_ID /;"	d
OID_GEN_VLAN_ID	drivers/usb/gadget/ndis.h	/^#define OID_GEN_VLAN_ID /;"	d
OID_GEN_XMIT_ERROR	drivers/usb/gadget/ndis.h	/^#define OID_GEN_XMIT_ERROR /;"	d
OID_GEN_XMIT_OK	drivers/usb/gadget/ndis.h	/^#define OID_GEN_XMIT_OK /;"	d
OID_PNP_ADD_WAKE_UP_PATTERN	drivers/usb/gadget/rndis.h	/^#define OID_PNP_ADD_WAKE_UP_PATTERN	/;"	d
OID_PNP_CAPABILITIES	drivers/usb/gadget/rndis.h	/^#define OID_PNP_CAPABILITIES	/;"	d
OID_PNP_ENABLE_WAKE_UP	drivers/usb/gadget/rndis.h	/^#define OID_PNP_ENABLE_WAKE_UP	/;"	d
OID_PNP_QUERY_POWER	drivers/usb/gadget/rndis.h	/^#define OID_PNP_QUERY_POWER	/;"	d
OID_PNP_REMOVE_WAKE_UP_PATTERN	drivers/usb/gadget/rndis.h	/^#define OID_PNP_REMOVE_WAKE_UP_PATTERN	/;"	d
OID_PNP_SET_POWER	drivers/usb/gadget/rndis.h	/^#define OID_PNP_SET_POWER	/;"	d
OIER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OIER	/;"	d
OIER	include/SA-1100.h	/^#define OIER	/;"	d
OIER_E	include/SA-1100.h	/^#define OIER_E(/;"	d
OIER_E0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OIER_E0	/;"	d
OIER_E0	include/SA-1100.h	/^#define OIER_E0	/;"	d
OIER_E1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OIER_E1	/;"	d
OIER_E1	include/SA-1100.h	/^#define OIER_E1	/;"	d
OIER_E2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OIER_E2	/;"	d
OIER_E2	include/SA-1100.h	/^#define OIER_E2	/;"	d
OIER_E3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OIER_E3	/;"	d
OIER_E3	include/SA-1100.h	/^#define OIER_E3	/;"	d
OIER_E4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OIER_E4	/;"	d
OK	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define OK(/;"	d	file:
OK	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define OK(/;"	d	file:
OK	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define OK(/;"	d	file:
OK	drivers/usb/host/ohci-hcd.c	/^#define OK(/;"	d	file:
OK	drivers/usb/host/ohci-s3c24xx.c	/^#define OK(/;"	d	file:
OK	drivers/usb/host/sl811-hcd.c	/^#define OK(/;"	d	file:
OLATA	board/bf609-ezkit/soft_switch.h	/^#define OLATA /;"	d
OLATB	board/bf609-ezkit/soft_switch.h	/^#define OLATB /;"	d
OLD_NCURSES	scripts/kconfig/lxdialog/dialog.h	/^#define OLD_NCURSES /;"	d
OLD_SUNXI_KERNEL_COMPAT	board/sunxi/Kconfig	/^config OLD_SUNXI_KERNEL_COMPAT$/;"	c
OLD_ZNODE_AGE	fs/ubifs/ubifs.h	/^#define OLD_ZNODE_AGE /;"	d
OLF	include/sym53c8xx.h	/^  #define   OLF /;"	d
OLF1	include/sym53c8xx.h	/^  #define   OLF1 /;"	d
OM2REG	include/power/sandbox_pmic.h	/^#define OM2REG(/;"	d
OMAP2420_CORE_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2420_CORE_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP2420_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP2430_CORE_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP2430_CORE_IOPAD(/;"	d
OMAP32_ID_0	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define OMAP32_ID_0	/;"	d	file:
OMAP32_ID_1	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define OMAP32_ID_1	/;"	d	file:
OMAP3430_CORE2_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP3430_CORE2_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3430_CORE2_IOPAD(/;"	d
OMAP34XX	arch/arm/Kconfig	/^config OMAP34XX$/;"	c	choice:ARM architecture""choice031ab9020104
OMAP34XX_CORE_L4_IO_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_CORE_L4_IO_BASE	/;"	d
OMAP34XX_CTRL_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_CTRL_BASE	/;"	d
OMAP34XX_CTRL_WKUP_CTRL	arch/arm/include/asm/arch-omap3/mux.h	/^#define OMAP34XX_CTRL_WKUP_CTRL	/;"	d
OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ	arch/arm/include/asm/arch-omap3/mux.h	/^#define OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ	/;"	d
OMAP34XX_DMA4_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_DMA4_BASE /;"	d
OMAP34XX_GPIO1_BASE	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP34XX_GPIO1_BASE	/;"	d
OMAP34XX_GPIO2_BASE	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP34XX_GPIO2_BASE	/;"	d
OMAP34XX_GPIO3_BASE	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP34XX_GPIO3_BASE	/;"	d
OMAP34XX_GPIO4_BASE	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP34XX_GPIO4_BASE	/;"	d
OMAP34XX_GPIO5_BASE	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP34XX_GPIO5_BASE	/;"	d
OMAP34XX_GPIO6_BASE	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP34XX_GPIO6_BASE	/;"	d
OMAP34XX_GPMC_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPMC_BASE	/;"	d
OMAP34XX_GPT1	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT1	/;"	d
OMAP34XX_GPT10	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT10	/;"	d
OMAP34XX_GPT11	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT11	/;"	d
OMAP34XX_GPT12	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT12	/;"	d
OMAP34XX_GPT2	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT2	/;"	d
OMAP34XX_GPT3	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT3	/;"	d
OMAP34XX_GPT4	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT4	/;"	d
OMAP34XX_GPT5	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT5	/;"	d
OMAP34XX_GPT6	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT6	/;"	d
OMAP34XX_GPT7	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT7	/;"	d
OMAP34XX_GPT8	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT8	/;"	d
OMAP34XX_GPT9	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_GPT9	/;"	d
OMAP34XX_ID_L4_IO_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_ID_L4_IO_BASE	/;"	d
OMAP34XX_L4_IO_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_L4_IO_BASE	/;"	d
OMAP34XX_L4_PER	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_L4_PER	/;"	d
OMAP34XX_SCRATCHPAD	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_SCRATCHPAD	/;"	d
OMAP34XX_SDRC_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_SDRC_BASE	/;"	d
OMAP34XX_SDRC_CS0	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP34XX_SDRC_CS0	/;"	d
OMAP34XX_SDRC_CS1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP34XX_SDRC_CS1	/;"	d
OMAP34XX_SMS_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_SMS_BASE	/;"	d
OMAP34XX_UART1	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_UART1	/;"	d
OMAP34XX_UART2	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_UART2	/;"	d
OMAP34XX_UART3	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_UART3	/;"	d
OMAP34XX_UART4	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_UART4	/;"	d
OMAP34XX_WAKEUP_L4_IO_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP34XX_WAKEUP_L4_IO_BASE	/;"	d
OMAP3503	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3503	/;"	d
OMAP3515	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3515	/;"	d
OMAP3525	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3525	/;"	d
OMAP3530	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3530	/;"	d
OMAP3630_CORE2_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3630_CORE2_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3630_CORE2_IOPAD(/;"	d
OMAP3730	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3730	/;"	d
OMAP3EVM_BOARD_GEN_1	board/ti/evm/evm.h	/^	OMAP3EVM_BOARD_GEN_1 = 0,	\/* EVM Rev between  A - D *\/$/;"	e	enum:__anonf3576a3d0103
OMAP3EVM_BOARD_GEN_2	board/ti/evm/evm.h	/^	OMAP3EVM_BOARD_GEN_2,		\/* EVM Rev >= Rev E *\/$/;"	e	enum:__anonf3576a3d0103
OMAP3EVM_GPIO_ETH_RST_GEN1	board/ti/evm/evm.c	/^#define OMAP3EVM_GPIO_ETH_RST_GEN1	/;"	d	file:
OMAP3EVM_GPIO_ETH_RST_GEN2	board/ti/evm/evm.c	/^#define OMAP3EVM_GPIO_ETH_RST_GEN2	/;"	d	file:
OMAP3_CAIRO_BOARD_GEN_1	board/quipos/cairo/cairo.h	/^	OMAP3_CAIRO_BOARD_GEN_1 = 0,	\/* Cairo handheld V01 *\/$/;"	e	enum:__anone0030c6d0103
OMAP3_CAIRO_BOARD_GEN_2	board/quipos/cairo/cairo.h	/^	OMAP3_CAIRO_BOARD_GEN_2,$/;"	e	enum:__anone0030c6d0103
OMAP3_CORE1_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_CORE1_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_CORE1_IOPAD(/;"	d
OMAP3_DISPC_BASE	arch/arm/include/asm/arch-omap3/dss.h	/^#define OMAP3_DISPC_BASE	/;"	d
OMAP3_DSS_BASE	arch/arm/include/asm/arch-omap3/dss.h	/^#define OMAP3_DSS_BASE	/;"	d
OMAP3_EMU_HAL_API_L2_INVAL	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3_EMU_HAL_API_L2_INVAL	/;"	d
OMAP3_EMU_HAL_API_WRITE_ACR	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3_EMU_HAL_API_WRITE_ACR	/;"	d
OMAP3_EMU_HAL_START_HAL_CRITICAL	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3_EMU_HAL_START_HAL_CRITICAL	/;"	d
OMAP3_GP_ROMCODE_API_L2_INVAL	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3_GP_ROMCODE_API_L2_INVAL	/;"	d
OMAP3_GP_ROMCODE_API_WRITE_ACR	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3_GP_ROMCODE_API_WRITE_ACR	/;"	d
OMAP3_MCSPI1_BASE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI1_BASE	/;"	d	file:
OMAP3_MCSPI2_BASE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI2_BASE	/;"	d	file:
OMAP3_MCSPI3_BASE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI3_BASE	/;"	d	file:
OMAP3_MCSPI4_BASE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI4_BASE	/;"	d	file:
OMAP3_MCSPI_CHCONF_CLKD_MASK	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_CLKD_MASK	/;"	d	file:
OMAP3_MCSPI_CHCONF_DMAR	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_DMAR	/;"	d	file:
OMAP3_MCSPI_CHCONF_DMAW	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_DMAW	/;"	d	file:
OMAP3_MCSPI_CHCONF_DPE0	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_DPE0	/;"	d	file:
OMAP3_MCSPI_CHCONF_DPE1	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_DPE1	/;"	d	file:
OMAP3_MCSPI_CHCONF_EPOL	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_EPOL	/;"	d	file:
OMAP3_MCSPI_CHCONF_FORCE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_FORCE	/;"	d	file:
OMAP3_MCSPI_CHCONF_IS	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_IS	/;"	d	file:
OMAP3_MCSPI_CHCONF_PHA	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_PHA	/;"	d	file:
OMAP3_MCSPI_CHCONF_POL	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_POL	/;"	d	file:
OMAP3_MCSPI_CHCONF_TRM_MASK	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_TRM_MASK	/;"	d	file:
OMAP3_MCSPI_CHCONF_TRM_RX_ONLY	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY	/;"	d	file:
OMAP3_MCSPI_CHCONF_TRM_TX_ONLY	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY	/;"	d	file:
OMAP3_MCSPI_CHCONF_TURBO	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_TURBO	/;"	d	file:
OMAP3_MCSPI_CHCONF_WL_MASK	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCONF_WL_MASK	/;"	d	file:
OMAP3_MCSPI_CHCTRL_DIS	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCTRL_DIS	/;"	d	file:
OMAP3_MCSPI_CHCTRL_EN	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHCTRL_EN	/;"	d	file:
OMAP3_MCSPI_CHSTAT_EOT	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHSTAT_EOT	/;"	d	file:
OMAP3_MCSPI_CHSTAT_RXS	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHSTAT_RXS	/;"	d	file:
OMAP3_MCSPI_CHSTAT_TXS	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_CHSTAT_TXS	/;"	d	file:
OMAP3_MCSPI_MAX_FREQ	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_MAX_FREQ	/;"	d	file:
OMAP3_MCSPI_MODULCTRL_MS	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_MODULCTRL_MS	/;"	d	file:
OMAP3_MCSPI_MODULCTRL_SINGLE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_MODULCTRL_SINGLE	/;"	d	file:
OMAP3_MCSPI_MODULCTRL_STEST	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_MODULCTRL_STEST	/;"	d	file:
OMAP3_MCSPI_SYSCONFIG_AUTOIDLE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE	/;"	d	file:
OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP /;"	d	file:
OMAP3_MCSPI_SYSCONFIG_SMARTIDLE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE /;"	d	file:
OMAP3_MCSPI_SYSCONFIG_SOFTRESET	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET /;"	d	file:
OMAP3_MCSPI_SYSSTATUS_RESETDONE	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_SYSSTATUS_RESETDONE /;"	d	file:
OMAP3_MCSPI_WAKEUPENABLE_WKEN	drivers/spi/omap3_spi.c	/^#define OMAP3_MCSPI_WAKEUPENABLE_WKEN	/;"	d	file:
OMAP3_OTG_BASE	drivers/usb/musb/omap3.h	/^#define OMAP3_OTG_BASE /;"	d
OMAP3_OTG_FORCESTDBY_STANDBY	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_FORCESTDBY_STANDBY	/;"	d	file:
OMAP3_OTG_INTERFSEL_OMAP	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_INTERFSEL_OMAP	/;"	d	file:
OMAP3_OTG_SYSCONFIG_AUTOIDLE	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_AUTOIDLE	/;"	d	file:
OMAP3_OTG_SYSCONFIG_ENABLEWAKEUP	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_ENABLEWAKEUP	/;"	d	file:
OMAP3_OTG_SYSCONFIG_NO_IDLE_MODE	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_NO_IDLE_MODE	/;"	d	file:
OMAP3_OTG_SYSCONFIG_NO_STANDBY_MODE	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_NO_STANDBY_MODE	/;"	d	file:
OMAP3_OTG_SYSCONFIG_SMART_IDLE_MODE	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_SMART_IDLE_MODE	/;"	d	file:
OMAP3_OTG_SYSCONFIG_SMART_STANDBY_MODE	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_SMART_STANDBY_MODE	/;"	d	file:
OMAP3_OTG_SYSCONFIG_SOFTRESET	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSCONFIG_SOFTRESET	/;"	d	file:
OMAP3_OTG_SYSSTATUS_RESETDONE	drivers/usb/musb/omap3.c	/^#define OMAP3_OTG_SYSSTATUS_RESETDONE	/;"	d	file:
OMAP3_PUBLIC_SRAM_SCRATCH_AREA	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP3_PUBLIC_SRAM_SCRATCH_AREA	/;"	d
OMAP3_SPI	drivers/spi/Kconfig	/^config OMAP3_SPI$/;"	c	menu:SPI Support
OMAP3_UART1_RX	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART1_RX	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART1_RX	/;"	d
OMAP3_UART2_RX	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART2_RX	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART2_RX	/;"	d
OMAP3_UART3_RX	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_UART3_RX	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_UART3_RX	/;"	d
OMAP3_USB_TIMEOUT	drivers/usb/musb/omap3.h	/^#define OMAP3_USB_TIMEOUT /;"	d
OMAP3_VENC_BASE	arch/arm/include/asm/arch-omap3/dss.h	/^#define OMAP3_VENC_BASE	/;"	d
OMAP3_WKUP_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP3_WKUP_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP3_WKUP_IOPAD(/;"	d
OMAP4430_ES1_0	arch/arm/include/asm/omap_common.h	/^#define OMAP4430_ES1_0	/;"	d
OMAP4430_ES2_0	arch/arm/include/asm/omap_common.h	/^#define OMAP4430_ES2_0	/;"	d
OMAP4430_ES2_1	arch/arm/include/asm/omap_common.h	/^#define OMAP4430_ES2_1	/;"	d
OMAP4430_ES2_2	arch/arm/include/asm/omap_common.h	/^#define OMAP4430_ES2_2	/;"	d
OMAP4430_ES2_3	arch/arm/include/asm/omap_common.h	/^#define OMAP4430_ES2_3	/;"	d
OMAP4430_SILICON_ID_INVALID	arch/arm/include/asm/omap_common.h	/^#define OMAP4430_SILICON_ID_INVALID	/;"	d
OMAP4460_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4460_CONTROL_ID_CODE_ES1_0	/;"	d
OMAP4460_CONTROL_ID_CODE_ES1_1	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4460_CONTROL_ID_CODE_ES1_1	/;"	d
OMAP4460_ES1_0	arch/arm/include/asm/omap_common.h	/^#define OMAP4460_ES1_0	/;"	d
OMAP4460_ES1_1	arch/arm/include/asm/omap_common.h	/^#define OMAP4460_ES1_1	/;"	d
OMAP4470_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4470_CONTROL_ID_CODE_ES1_0	/;"	d
OMAP4470_ES1_0	arch/arm/include/asm/omap_common.h	/^#define OMAP4470_ES1_0	/;"	d
OMAP44XX	arch/arm/Kconfig	/^config OMAP44XX$/;"	c	choice:ARM architecture""choice031ab9020104
OMAP44XX_DRAM_ADDR_SPACE_END	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP44XX_DRAM_ADDR_SPACE_END	/;"	d
OMAP44XX_DRAM_ADDR_SPACE_START	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP44XX_DRAM_ADDR_SPACE_START	/;"	d
OMAP44XX_GPIO1_BASE	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP44XX_GPIO1_BASE	/;"	d
OMAP44XX_GPIO2_BASE	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP44XX_GPIO2_BASE	/;"	d
OMAP44XX_GPIO3_BASE	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP44XX_GPIO3_BASE	/;"	d
OMAP44XX_GPIO4_BASE	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP44XX_GPIO4_BASE	/;"	d
OMAP44XX_GPIO5_BASE	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP44XX_GPIO5_BASE	/;"	d
OMAP44XX_GPIO6_BASE	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP44XX_GPIO6_BASE	/;"	d
OMAP44XX_L4_CORE_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP44XX_L4_CORE_BASE	/;"	d
OMAP44XX_L4_PER_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP44XX_L4_PER_BASE	/;"	d
OMAP44XX_L4_WKUP_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP44XX_L4_WKUP_BASE	/;"	d
OMAP44XX_SAR_RAM_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP44XX_SAR_RAM_BASE	/;"	d
OMAP44xx	arch/arm/include/asm/omap_common.h	/^#define OMAP44xx	/;"	d
OMAP4_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4_CONTROL_ID_CODE_ES1_0	/;"	d
OMAP4_CONTROL_ID_CODE_ES2_0	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4_CONTROL_ID_CODE_ES2_0	/;"	d
OMAP4_CONTROL_ID_CODE_ES2_1	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4_CONTROL_ID_CODE_ES2_1	/;"	d
OMAP4_CONTROL_ID_CODE_ES2_2	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4_CONTROL_ID_CODE_ES2_2	/;"	d
OMAP4_CONTROL_ID_CODE_ES2_3	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP4_CONTROL_ID_CODE_ES2_3	/;"	d
OMAP4_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_IOPAD(/;"	d
OMAP4_MCSPI_REG_OFFSET	drivers/spi/omap3_spi.c	/^#define OMAP4_MCSPI_REG_OFFSET	/;"	d	file:
OMAP4_SERVICE_PL310_CONTROL_REG_SET	arch/arm/include/asm/arch-omap4/sys_proto.h	/^#define OMAP4_SERVICE_PL310_CONTROL_REG_SET	/;"	d
OMAP4_UART2_RX	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART2_RX	include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART2_RX	/;"	d
OMAP4_UART3_RX	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART3_RX	include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART3_RX	/;"	d
OMAP4_UART4_RX	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UART4_RX	include/dt-bindings/pinctrl/omap.h	/^#define OMAP4_UART4_RX	/;"	d
OMAP4_UHH_HOSTCONFIG_APP_START_CLK	arch/arm/include/asm/ehci-omap.h	/^#define OMAP4_UHH_HOSTCONFIG_APP_START_CLK	/;"	d
OMAP5430_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5430_CONTROL_ID_CODE_ES1_0	/;"	d
OMAP5430_CONTROL_ID_CODE_ES2_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5430_CONTROL_ID_CODE_ES2_0 /;"	d
OMAP5430_ES1_0	arch/arm/include/asm/omap_common.h	/^#define OMAP5430_ES1_0	/;"	d
OMAP5430_ES2_0	arch/arm/include/asm/omap_common.h	/^#define OMAP5430_ES2_0 /;"	d
OMAP5430_SILICON_ID_INVALID	arch/arm/include/asm/omap_common.h	/^#define OMAP5430_SILICON_ID_INVALID	/;"	d
OMAP5432_CONTROL_ID_CODE_ES1_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5432_CONTROL_ID_CODE_ES1_0	/;"	d
OMAP5432_CONTROL_ID_CODE_ES2_0	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5432_CONTROL_ID_CODE_ES2_0 /;"	d
OMAP5432_ES1_0	arch/arm/include/asm/omap_common.h	/^#define OMAP5432_ES1_0	/;"	d
OMAP5432_ES2_0	arch/arm/include/asm/omap_common.h	/^#define OMAP5432_ES2_0 /;"	d
OMAP54XX	arch/arm/Kconfig	/^config OMAP54XX$/;"	c	choice:ARM architecture""choice031ab9020104
OMAP54XX_GPIO1_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO1_BASE	/;"	d
OMAP54XX_GPIO2_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO2_BASE	/;"	d
OMAP54XX_GPIO3_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO3_BASE	/;"	d
OMAP54XX_GPIO4_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO4_BASE	/;"	d
OMAP54XX_GPIO5_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO5_BASE	/;"	d
OMAP54XX_GPIO6_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO6_BASE	/;"	d
OMAP54XX_GPIO7_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO7_BASE	/;"	d
OMAP54XX_GPIO8_BASE	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP54XX_GPIO8_BASE	/;"	d
OMAP54XX_L4_CORE_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP54XX_L4_CORE_BASE	/;"	d
OMAP54XX_L4_PER_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP54XX_L4_PER_BASE	/;"	d
OMAP54XX_L4_WKUP_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP54XX_L4_WKUP_BASE	/;"	d
OMAP54xx	arch/arm/include/asm/omap_common.h	/^#define OMAP54xx	/;"	d
OMAP5XX_USB2_PHY_POWER	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5XX_USB2_PHY_POWER	/;"	d
OMAP5XX_USB3_PHY_PLL_CTRL	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5XX_USB3_PHY_PLL_CTRL	/;"	d
OMAP5XX_USB3_PHY_POWER	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5XX_USB3_PHY_POWER	/;"	d
OMAP5XX_USB_OTG_SS_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5XX_USB_OTG_SS_BASE	/;"	d
OMAP5XX_USB_OTG_SS_GLUE_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5XX_USB_OTG_SS_GLUE_BASE	/;"	d
OMAP5_ABB_FUSE_ENABLE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5_ABB_FUSE_ENABLE_MASK	/;"	d
OMAP5_ABB_FUSE_VSET_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5_ABB_FUSE_VSET_MASK	/;"	d
OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK	/;"	d
OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK	/;"	d
OMAP5_IOPAD	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_IOPAD	include/dt-bindings/pinctrl/omap.h	/^#define OMAP5_IOPAD(/;"	d
OMAP5_SERVICE_ACR_SET	arch/arm/include/asm/arch-omap5/sys_proto.h	/^#define OMAP5_SERVICE_ACR_SET /;"	d
OMAP5_SERVICE_L2ACTLR_SET	arch/arm/include/asm/arch-omap5/sys_proto.h	/^#define OMAP5_SERVICE_L2ACTLR_SET /;"	d
OMAP_ABB_CLOCK_CYCLES	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP_ABB_CLOCK_CYCLES	/;"	d
OMAP_ABB_CLOCK_CYCLES	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP_ABB_CLOCK_CYCLES	/;"	d
OMAP_ABB_CLOCK_CYCLES	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_CLOCK_CYCLES	/;"	d
OMAP_ABB_CONTROL_FAST_OPP_SEL_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_CONTROL_FAST_OPP_SEL_MASK	/;"	d
OMAP_ABB_CONTROL_OPP_CHANGE_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_CONTROL_OPP_CHANGE_MASK	/;"	d
OMAP_ABB_CONTROL_SLOW_OPP_SEL_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_CONTROL_SLOW_OPP_SEL_MASK	/;"	d
OMAP_ABB_CONTROL_SR2_IN_TRANSITION_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_CONTROL_SR2_IN_TRANSITION_MASK	/;"	d
OMAP_ABB_EVE_TXDONE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_EVE_TXDONE_MASK	/;"	d
OMAP_ABB_FAST_OPP	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_FAST_OPP	/;"	d
OMAP_ABB_GPU_TXDONE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_GPU_TXDONE_MASK	/;"	d
OMAP_ABB_IVA_TXDONE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_IVA_TXDONE_MASK	/;"	d
OMAP_ABB_MM_TXDONE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_MM_TXDONE_MASK	/;"	d
OMAP_ABB_MPU_TXDONE_MASK	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP_ABB_MPU_TXDONE_MASK	/;"	d
OMAP_ABB_MPU_TXDONE_MASK	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP_ABB_MPU_TXDONE_MASK	/;"	d
OMAP_ABB_MPU_TXDONE_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_MPU_TXDONE_MASK	/;"	d
OMAP_ABB_NOMINAL_OPP	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_NOMINAL_OPP	/;"	d
OMAP_ABB_SETTLING_TIME	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP_ABB_SETTLING_TIME	/;"	d
OMAP_ABB_SETTLING_TIME	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP_ABB_SETTLING_TIME	/;"	d
OMAP_ABB_SETTLING_TIME	arch/arm/include/asm/arch-omap5/omap.h	/^#define OMAP_ABB_SETTLING_TIME	/;"	d
OMAP_ABB_SETUP_ACTIVE_FBB_SEL_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_SETUP_ACTIVE_FBB_SEL_MASK	/;"	d
OMAP_ABB_SETUP_ACTIVE_RBB_SEL_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_SETUP_ACTIVE_RBB_SEL_MASK	/;"	d
OMAP_ABB_SETUP_SR2EN_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_SETUP_SR2EN_MASK	/;"	d
OMAP_ABB_SETUP_SR2_WTCNT_VALUE_MASK	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_SETUP_SR2_WTCNT_VALUE_MASK	/;"	d
OMAP_ABB_SLOW_OPP	arch/arm/include/asm/omap_common.h	/^#define OMAP_ABB_SLOW_OPP	/;"	d
OMAP_CH_HDR_SIZE	tools/omapimage.c	/^#define OMAP_CH_HDR_SIZE /;"	d	file:
OMAP_CTRL_DEV_PHY_PD	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_DEV_PHY_PD	/;"	d	file:
OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK /;"	d	file:
OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT /;"	d	file:
OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK /;"	d	file:
OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT /;"	d	file:
OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF /;"	d	file:
OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON /;"	d	file:
OMAP_CTRL_USB2_PHY_PD	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB2_PHY_PD	/;"	d	file:
OMAP_CTRL_USB3_PHY_PWRCTL_CLK_CMD_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB3_PHY_PWRCTL_CLK_CMD_MASK	/;"	d	file:
OMAP_CTRL_USB3_PHY_PWRCTL_CLK_CMD_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB3_PHY_PWRCTL_CLK_CMD_SHIFT	/;"	d	file:
OMAP_CTRL_USB3_PHY_PWRCTL_CLK_FREQ_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB3_PHY_PWRCTL_CLK_FREQ_MASK	/;"	d	file:
OMAP_CTRL_USB3_PHY_PWRCTL_CLK_FREQ_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB3_PHY_PWRCTL_CLK_FREQ_SHIFT	/;"	d	file:
OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF	/;"	d	file:
OMAP_CTRL_USB3_PHY_TX_RX_POWERON	drivers/usb/dwc3/ti_usb_phy.c	/^#define OMAP_CTRL_USB3_PHY_TX_RX_POWERON	/;"	d	file:
OMAP_DIE_ID_0	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define OMAP_DIE_ID_0	/;"	d	file:
OMAP_DIE_ID_1	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define OMAP_DIE_ID_1	/;"	d	file:
OMAP_DWC3_ID_FLOAT	include/dwc3-omap-uboot.h	/^	OMAP_DWC3_ID_FLOAT,$/;"	e	enum:omap_dwc3_vbus_id_status
OMAP_DWC3_ID_GROUND	include/dwc3-omap-uboot.h	/^	OMAP_DWC3_ID_GROUND,$/;"	e	enum:omap_dwc3_vbus_id_status
OMAP_DWC3_VBUS_OFF	include/dwc3-omap-uboot.h	/^	OMAP_DWC3_VBUS_OFF,$/;"	e	enum:omap_dwc3_vbus_id_status
OMAP_DWC3_VBUS_VALID	include/dwc3-omap-uboot.h	/^	OMAP_DWC3_VBUS_VALID,$/;"	e	enum:omap_dwc3_vbus_id_status
OMAP_ECC_BCH16_CODE_HW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_BCH16_CODE_HW,$/;"	e	enum:omap_ecc
OMAP_ECC_BCH4_CODE_HW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_BCH4_CODE_HW,$/;"	e	enum:omap_ecc
OMAP_ECC_BCH4_CODE_HW_DETECTION_SW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,$/;"	e	enum:omap_ecc
OMAP_ECC_BCH8_CODE_HW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_BCH8_CODE_HW,$/;"	e	enum:omap_ecc
OMAP_ECC_BCH8_CODE_HW_DETECTION_SW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,$/;"	e	enum:omap_ecc
OMAP_ECC_HAM1_CODE_HW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_HAM1_CODE_HW,$/;"	e	enum:omap_ecc
OMAP_ECC_HAM1_CODE_SW	include/linux/mtd/omap_gpmc.h	/^	OMAP_ECC_HAM1_CODE_SW = 1, \/* avoid un-initialized int can be 0x0 *\/$/;"	e	enum:omap_ecc
OMAP_EHCI_BASE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_EHCI_BASE	/;"	d
OMAP_EHCI_BASE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_EHCI_BASE	/;"	d
OMAP_EHCI_BASE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_EHCI_BASE	/;"	d
OMAP_EHCI_PORT_MODE_HSIC	arch/arm/include/asm/ehci-omap.h	/^	OMAP_EHCI_PORT_MODE_HSIC,$/;"	e	enum:usbhs_omap_port_mode
OMAP_EHCI_PORT_MODE_PHY	arch/arm/include/asm/ehci-omap.h	/^	OMAP_EHCI_PORT_MODE_PHY,$/;"	e	enum:usbhs_omap_port_mode
OMAP_EHCI_PORT_MODE_TLL	arch/arm/include/asm/ehci-omap.h	/^	OMAP_EHCI_PORT_MODE_TLL,$/;"	e	enum:usbhs_omap_port_mode
OMAP_FILE_HDR_SIZE	tools/omapimage.c	/^#define OMAP_FILE_HDR_SIZE /;"	d	file:
OMAP_GPIO_CLEARDATAOUT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_CLEARDATAOUT	/;"	d
OMAP_GPIO_CLEARDATAOUT	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_CLEARDATAOUT	/;"	d
OMAP_GPIO_CLEARDATAOUT	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_CLEARDATAOUT	/;"	d
OMAP_GPIO_CLEARDATAOUT	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_CLEARDATAOUT	/;"	d
OMAP_GPIO_CLEARIRQENABLE1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_CLEARIRQENABLE1	/;"	d
OMAP_GPIO_CLEARIRQENABLE1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_CLEARIRQENABLE1	/;"	d
OMAP_GPIO_CLEARIRQENABLE1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_CLEARIRQENABLE1	/;"	d
OMAP_GPIO_CLEARWKUENA	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_CLEARWKUENA	/;"	d
OMAP_GPIO_CLEARWKUENA	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_CLEARWKUENA	/;"	d
OMAP_GPIO_CLEARWKUENA	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_CLEARWKUENA	/;"	d
OMAP_GPIO_CTRL	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_CTRL	/;"	d
OMAP_GPIO_CTRL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_CTRL	/;"	d
OMAP_GPIO_CTRL	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_CTRL	/;"	d
OMAP_GPIO_CTRL	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_CTRL	/;"	d
OMAP_GPIO_DATAIN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_DATAIN	/;"	d
OMAP_GPIO_DATAIN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_DATAIN	/;"	d
OMAP_GPIO_DATAIN	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_DATAIN	/;"	d
OMAP_GPIO_DATAIN	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_DATAIN	/;"	d
OMAP_GPIO_DATAOUT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_DATAOUT	/;"	d
OMAP_GPIO_DATAOUT	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_DATAOUT	/;"	d
OMAP_GPIO_DATAOUT	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_DATAOUT	/;"	d
OMAP_GPIO_DATAOUT	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_DATAOUT	/;"	d
OMAP_GPIO_DEBOUNCE_EN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_EN	/;"	d
OMAP_GPIO_DEBOUNCE_EN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_EN	/;"	d
OMAP_GPIO_DEBOUNCE_EN	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_EN	/;"	d
OMAP_GPIO_DEBOUNCE_EN	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_EN	/;"	d
OMAP_GPIO_DEBOUNCE_VAL	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_VAL	/;"	d
OMAP_GPIO_DEBOUNCE_VAL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_VAL	/;"	d
OMAP_GPIO_DEBOUNCE_VAL	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_VAL	/;"	d
OMAP_GPIO_DEBOUNCE_VAL	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_DEBOUNCE_VAL	/;"	d
OMAP_GPIO_DIR_IN	drivers/gpio/omap_gpio.c	/^#define OMAP_GPIO_DIR_IN	/;"	d	file:
OMAP_GPIO_DIR_OUT	drivers/gpio/omap_gpio.c	/^#define OMAP_GPIO_DIR_OUT	/;"	d	file:
OMAP_GPIO_FALLINGDETECT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_FALLINGDETECT	/;"	d
OMAP_GPIO_FALLINGDETECT	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_FALLINGDETECT	/;"	d
OMAP_GPIO_FALLINGDETECT	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_FALLINGDETECT	/;"	d
OMAP_GPIO_FALLINGDETECT	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_FALLINGDETECT	/;"	d
OMAP_GPIO_IRQENABLE1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_IRQENABLE1	/;"	d
OMAP_GPIO_IRQENABLE1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_IRQENABLE1	/;"	d
OMAP_GPIO_IRQENABLE1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_IRQENABLE1	/;"	d
OMAP_GPIO_IRQENABLE2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_IRQENABLE2	/;"	d
OMAP_GPIO_IRQENABLE2	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_IRQENABLE2	/;"	d
OMAP_GPIO_IRQENABLE2	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_IRQENABLE2	/;"	d
OMAP_GPIO_IRQSTATUS1	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_IRQSTATUS1	/;"	d
OMAP_GPIO_IRQSTATUS1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_IRQSTATUS1	/;"	d
OMAP_GPIO_IRQSTATUS1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_IRQSTATUS1	/;"	d
OMAP_GPIO_IRQSTATUS1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_IRQSTATUS1	/;"	d
OMAP_GPIO_IRQSTATUS2	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_IRQSTATUS2	/;"	d
OMAP_GPIO_IRQSTATUS2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_IRQSTATUS2	/;"	d
OMAP_GPIO_IRQSTATUS2	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_IRQSTATUS2	/;"	d
OMAP_GPIO_IRQSTATUS2	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_IRQSTATUS2	/;"	d
OMAP_GPIO_IRQSTATUS_SET_0	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_IRQSTATUS_SET_0	/;"	d
OMAP_GPIO_IRQSTATUS_SET_1	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_IRQSTATUS_SET_1	/;"	d
OMAP_GPIO_LEVELDETECT0	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_LEVELDETECT0	/;"	d
OMAP_GPIO_LEVELDETECT0	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_LEVELDETECT0	/;"	d
OMAP_GPIO_LEVELDETECT0	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_LEVELDETECT0	/;"	d
OMAP_GPIO_LEVELDETECT0	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_LEVELDETECT0	/;"	d
OMAP_GPIO_LEVELDETECT1	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_LEVELDETECT1	/;"	d
OMAP_GPIO_LEVELDETECT1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_LEVELDETECT1	/;"	d
OMAP_GPIO_LEVELDETECT1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_LEVELDETECT1	/;"	d
OMAP_GPIO_LEVELDETECT1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_LEVELDETECT1	/;"	d
OMAP_GPIO_OE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_OE	/;"	d
OMAP_GPIO_OE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_OE	/;"	d
OMAP_GPIO_OE	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_OE	/;"	d
OMAP_GPIO_OE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_OE	/;"	d
OMAP_GPIO_REVISION	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_REVISION	/;"	d
OMAP_GPIO_REVISION	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_REVISION	/;"	d
OMAP_GPIO_REVISION	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_REVISION	/;"	d
OMAP_GPIO_REVISION	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_REVISION	/;"	d
OMAP_GPIO_RISINGDETECT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_RISINGDETECT	/;"	d
OMAP_GPIO_RISINGDETECT	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_RISINGDETECT	/;"	d
OMAP_GPIO_RISINGDETECT	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_RISINGDETECT	/;"	d
OMAP_GPIO_RISINGDETECT	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_RISINGDETECT	/;"	d
OMAP_GPIO_SETDATAOUT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_SETDATAOUT	/;"	d
OMAP_GPIO_SETDATAOUT	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_SETDATAOUT	/;"	d
OMAP_GPIO_SETDATAOUT	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_SETDATAOUT	/;"	d
OMAP_GPIO_SETDATAOUT	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_SETDATAOUT	/;"	d
OMAP_GPIO_SETIRQENABLE1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_SETIRQENABLE1	/;"	d
OMAP_GPIO_SETIRQENABLE1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_SETIRQENABLE1	/;"	d
OMAP_GPIO_SETIRQENABLE1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_SETIRQENABLE1	/;"	d
OMAP_GPIO_SETWKUENA	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_SETWKUENA	/;"	d
OMAP_GPIO_SETWKUENA	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_SETWKUENA	/;"	d
OMAP_GPIO_SETWKUENA	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_SETWKUENA	/;"	d
OMAP_GPIO_SYSCONFIG	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_SYSCONFIG	/;"	d
OMAP_GPIO_SYSCONFIG	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_SYSCONFIG	/;"	d
OMAP_GPIO_SYSCONFIG	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_SYSCONFIG	/;"	d
OMAP_GPIO_SYSCONFIG	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_SYSCONFIG	/;"	d
OMAP_GPIO_SYSSTATUS	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define OMAP_GPIO_SYSSTATUS	/;"	d
OMAP_GPIO_SYSSTATUS	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_SYSSTATUS	/;"	d
OMAP_GPIO_SYSSTATUS	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_SYSSTATUS	/;"	d
OMAP_GPIO_SYSSTATUS	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_SYSSTATUS	/;"	d
OMAP_GPIO_WAKE_EN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define OMAP_GPIO_WAKE_EN	/;"	d
OMAP_GPIO_WAKE_EN	arch/arm/include/asm/arch-omap4/cpu.h	/^#define OMAP_GPIO_WAKE_EN	/;"	d
OMAP_GPIO_WAKE_EN	arch/arm/include/asm/arch-omap5/cpu.h	/^#define OMAP_GPIO_WAKE_EN	/;"	d
OMAP_HSMMC1_BASE	arch/arm/include/asm/arch-am33xx/mmc_host_def.h	/^#define OMAP_HSMMC1_BASE	/;"	d
OMAP_HSMMC1_BASE	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define OMAP_HSMMC1_BASE	/;"	d
OMAP_HSMMC1_BASE	arch/arm/include/asm/arch-omap4/mmc_host_def.h	/^#define OMAP_HSMMC1_BASE	/;"	d
OMAP_HSMMC1_BASE	arch/arm/include/asm/arch-omap5/mmc_host_def.h	/^#define OMAP_HSMMC1_BASE	/;"	d
OMAP_HSMMC1_BASE	arch/arm/mach-keystone/include/mach/mmc_host_def.h	/^#define OMAP_HSMMC1_BASE	/;"	d
OMAP_HSMMC2_BASE	arch/arm/include/asm/arch-am33xx/mmc_host_def.h	/^#define OMAP_HSMMC2_BASE	/;"	d
OMAP_HSMMC2_BASE	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define OMAP_HSMMC2_BASE	/;"	d
OMAP_HSMMC2_BASE	arch/arm/include/asm/arch-omap4/mmc_host_def.h	/^#define OMAP_HSMMC2_BASE	/;"	d
OMAP_HSMMC2_BASE	arch/arm/include/asm/arch-omap5/mmc_host_def.h	/^#define OMAP_HSMMC2_BASE	/;"	d
OMAP_HSMMC2_BASE	arch/arm/mach-keystone/include/mach/mmc_host_def.h	/^#define OMAP_HSMMC2_BASE	/;"	d
OMAP_HSMMC3_BASE	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define OMAP_HSMMC3_BASE	/;"	d
OMAP_HSMMC3_BASE	arch/arm/include/asm/arch-omap4/mmc_host_def.h	/^#define OMAP_HSMMC3_BASE	/;"	d
OMAP_HSMMC3_BASE	arch/arm/include/asm/arch-omap5/mmc_host_def.h	/^#define OMAP_HSMMC3_BASE	/;"	d
OMAP_HSMMC_USE_GPIO	drivers/mmc/omap_hsmmc.c	/^#define OMAP_HSMMC_USE_GPIO$/;"	d	file:
OMAP_HSMMC_USE_GPIO	include/configs/cm_t54.h	/^#define OMAP_HSMMC_USE_GPIO$/;"	d
OMAP_HS_USB_PORTS	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_HS_USB_PORTS	/;"	d
OMAP_I2C_FAST_MODE	drivers/i2c/omap24xx_i2c.h	/^#define OMAP_I2C_FAST_MODE	/;"	d
OMAP_I2C_HIGH_SPEED	drivers/i2c/omap24xx_i2c.h	/^#define OMAP_I2C_HIGH_SPEED	/;"	d
OMAP_I2C_STANDARD	drivers/i2c/omap24xx_i2c.h	/^#define OMAP_I2C_STANDARD	/;"	d
OMAP_INIT_CONTEXT_SPL	arch/arm/include/asm/ti-common/sys_proto.h	/^#define OMAP_INIT_CONTEXT_SPL	/;"	d
OMAP_INIT_CONTEXT_UBOOT_AFTER_CH	arch/arm/include/asm/ti-common/sys_proto.h	/^#define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH	/;"	d
OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL	arch/arm/include/asm/ti-common/sys_proto.h	/^#define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL	/;"	d
OMAP_INIT_CONTEXT_UBOOT_FROM_NOR	arch/arm/include/asm/ti-common/sys_proto.h	/^#define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR	/;"	d
OMAP_IOPAD_OFFSET	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_IOPAD_OFFSET	include/dt-bindings/pinctrl/omap.h	/^#define OMAP_IOPAD_OFFSET(/;"	d
OMAP_MAX_GPIO	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define OMAP_MAX_GPIO	/;"	d
OMAP_MAX_GPIO	arch/arm/include/asm/arch-omap3/gpio.h	/^#define OMAP_MAX_GPIO	/;"	d
OMAP_MAX_GPIO	arch/arm/include/asm/arch-omap4/gpio.h	/^#define OMAP_MAX_GPIO	/;"	d
OMAP_MAX_GPIO	arch/arm/include/asm/arch-omap5/gpio.h	/^#define OMAP_MAX_GPIO	/;"	d
OMAP_MMC_H_	arch/arm/include/asm/omap_mmc.h	/^#define OMAP_MMC_H_$/;"	d
OMAP_OCP1_SCP_BASE	include/linux/usb/xhci-omap.h	/^#define OMAP_OCP1_SCP_BASE /;"	d
OMAP_OTG_WRAPPER_BASE	include/linux/usb/xhci-omap.h	/^#define OMAP_OTG_WRAPPER_BASE /;"	d
OMAP_P1_MODE_CLEAR	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P1_MODE_CLEAR	/;"	d
OMAP_P1_MODE_HSIC	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P1_MODE_HSIC	/;"	d
OMAP_P1_MODE_TLL	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P1_MODE_TLL	/;"	d
OMAP_P2_MODE_CLEAR	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P2_MODE_CLEAR	/;"	d
OMAP_P2_MODE_HSIC	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P2_MODE_HSIC	/;"	d
OMAP_P2_MODE_TLL	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P2_MODE_TLL	/;"	d
OMAP_P3_MODE_CLEAR	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P3_MODE_CLEAR	/;"	d
OMAP_P3_MODE_HSIC	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_P3_MODE_HSIC	/;"	d
OMAP_PADCONF_OFFSET	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PADCONF_OFFSET	include/dt-bindings/pinctrl/omap.h	/^#define OMAP_PADCONF_OFFSET(/;"	d
OMAP_PRODUCTION_ID_0	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define OMAP_PRODUCTION_ID_0	/;"	d	file:
OMAP_PRODUCTION_ID_1	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define OMAP_PRODUCTION_ID_1	/;"	d	file:
OMAP_REBOOT_REASON_OFFSET	arch/arm/include/asm/arch-omap3/omap.h	/^#define OMAP_REBOOT_REASON_OFFSET	/;"	d
OMAP_REBOOT_REASON_OFFSET	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP_REBOOT_REASON_OFFSET	/;"	d
OMAP_REBOOT_REASON_SIZE	arch/arm/include/asm/arch-omap4/omap.h	/^#define OMAP_REBOOT_REASON_SIZE	/;"	d
OMAP_REV1_TLL_CHANNEL_COUNT	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_REV1_TLL_CHANNEL_COUNT	/;"	d
OMAP_REV2_TLL_CHANNEL_COUNT	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_REV2_TLL_CHANNEL_COUNT	/;"	d
OMAP_SRAM_SCRATCH_BOARD_EEPROM_END	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_END /;"	d
OMAP_SRAM_SCRATCH_BOARD_EEPROM_START	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_START /;"	d
OMAP_SRAM_SCRATCH_BOOT_PARAMS	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_BOOT_PARAMS	/;"	d
OMAP_SRAM_SCRATCH_DPLLS_PTR	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_DPLLS_PTR /;"	d
OMAP_SRAM_SCRATCH_EMIF_SIZE	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_EMIF_SIZE	/;"	d
OMAP_SRAM_SCRATCH_EMIF_T_DEN	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_EMIF_T_DEN	/;"	d
OMAP_SRAM_SCRATCH_EMIF_T_NUM	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_EMIF_T_NUM	/;"	d
OMAP_SRAM_SCRATCH_OMAP_REV	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_OMAP_REV	/;"	d
OMAP_SRAM_SCRATCH_PRCM_PTR	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_PRCM_PTR /;"	d
OMAP_SRAM_SCRATCH_SPACE_END	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_SPACE_END	/;"	d
OMAP_SRAM_SCRATCH_SYS_CTRL	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_SYS_CTRL	/;"	d
OMAP_SRAM_SCRATCH_VCORES_PTR	arch/arm/include/asm/omap_common.h	/^#define OMAP_SRAM_SCRATCH_VCORES_PTR /;"	d
OMAP_SYS_CLK_IND_38_4_MHZ	arch/arm/include/asm/arch-omap4/clock.h	/^#define OMAP_SYS_CLK_IND_38_4_MHZ	/;"	d
OMAP_SYS_CLK_IND_38_4_MHZ	arch/arm/include/asm/arch-omap5/clock.h	/^#define OMAP_SYS_CLK_IND_38_4_MHZ	/;"	d
OMAP_TAG_BOOT_REASON	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_BOOT_REASON	/;"	d
OMAP_TAG_BOOT_REASON_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_BOOT_REASON_CONFIG(/;"	d
OMAP_TAG_CAMERA_SENSOR	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_CAMERA_SENSOR	/;"	d
OMAP_TAG_CBUS	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_CBUS	/;"	d
OMAP_TAG_CLOCK	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_CLOCK	/;"	d
OMAP_TAG_EM_ASIC_BB5	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_EM_ASIC_BB5	/;"	d
OMAP_TAG_FBMEM	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_FBMEM	/;"	d
OMAP_TAG_FLASH_PART_STR	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_FLASH_PART_STR	/;"	d
OMAP_TAG_GPIO_SWITCH	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_GPIO_SWITCH	/;"	d
OMAP_TAG_GPIO_SWITCH_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_GPIO_SWITCH_CONFIG(/;"	d
OMAP_TAG_HEADER_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_HEADER_CONFIG(/;"	d
OMAP_TAG_LCD	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_LCD	/;"	d
OMAP_TAG_LCD_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_LCD_CONFIG(/;"	d
OMAP_TAG_NOKIA_BT	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_NOKIA_BT	/;"	d
OMAP_TAG_PARTITION	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_PARTITION	/;"	d
OMAP_TAG_PARTITION_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_PARTITION_CONFIG(/;"	d
OMAP_TAG_SERIAL_CONSOLE	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_SERIAL_CONSOLE	/;"	d
OMAP_TAG_SERIAL_CONSOLE_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_SERIAL_CONSOLE_CONFIG(/;"	d
OMAP_TAG_STI_CONSOLE	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_STI_CONSOLE	/;"	d
OMAP_TAG_TEA5761	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_TEA5761	/;"	d
OMAP_TAG_TMP105	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_TMP105	/;"	d
OMAP_TAG_UART	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_UART	/;"	d
OMAP_TAG_UART_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_UART_CONFIG(/;"	d
OMAP_TAG_USB	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_USB	/;"	d
OMAP_TAG_VERSION_STR	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_VERSION_STR	/;"	d
OMAP_TAG_VERSION_STR_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_VERSION_STR_CONFIG(/;"	d
OMAP_TAG_WLAN_CX3110X	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_WLAN_CX3110X	/;"	d
OMAP_TAG_WLAN_CX3110X_CONFIG	board/nokia/rx51/tag_omap.h	/^#define OMAP_TAG_WLAN_CX3110X_CONFIG(/;"	d
OMAP_TIMER	drivers/timer/Kconfig	/^config OMAP_TIMER$/;"	c	menu:Timer Support
OMAP_TLL_CHANNEL_CONF	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_TLL_CHANNEL_CONF(/;"	d
OMAP_TLL_CHANNEL_CONF_CHANEN	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_TLL_CHANNEL_CONF_CHANEN	/;"	d
OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI	/;"	d
OMAP_TLL_CHANNEL_CONF_CHRGVBUS	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS	/;"	d
OMAP_TLL_CHANNEL_CONF_DRVVBUS	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_TLL_CHANNEL_CONF_DRVVBUS	/;"	d
OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF	/;"	d
OMAP_UHH_BASE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_BASE	/;"	d
OMAP_UHH_BASE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_UHH_BASE	/;"	d
OMAP_UHH_BASE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_UHH_BASE	/;"	d
OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN	/;"	d
OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN	/;"	d
OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN	/;"	d
OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN	/;"	d
OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS	/;"	d
OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS	/;"	d
OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS	/;"	d
OMAP_UHH_SYSCONFIG_CACTIVITY	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSCONFIG_CACTIVITY	/;"	d
OMAP_UHH_SYSCONFIG_ENAWAKEUP	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSCONFIG_ENAWAKEUP	/;"	d
OMAP_UHH_SYSCONFIG_MIDLEMODE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSCONFIG_MIDLEMODE	/;"	d
OMAP_UHH_SYSCONFIG_NOIDLE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_UHH_SYSCONFIG_NOIDLE	/;"	d
OMAP_UHH_SYSCONFIG_NOIDLE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_UHH_SYSCONFIG_NOIDLE	/;"	d
OMAP_UHH_SYSCONFIG_NOSTDBY	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_UHH_SYSCONFIG_NOSTDBY	/;"	d
OMAP_UHH_SYSCONFIG_NOSTDBY	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_UHH_SYSCONFIG_NOSTDBY	/;"	d
OMAP_UHH_SYSCONFIG_SIDLEMODE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSCONFIG_SIDLEMODE	/;"	d
OMAP_UHH_SYSCONFIG_SOFTRESET	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSCONFIG_SOFTRESET	/;"	d
OMAP_UHH_SYSCONFIG_SOFTRESET	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_UHH_SYSCONFIG_SOFTRESET	/;"	d
OMAP_UHH_SYSCONFIG_SOFTRESET	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_UHH_SYSCONFIG_SOFTRESET	/;"	d
OMAP_UHH_SYSCONFIG_VAL	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSCONFIG_VAL	/;"	d
OMAP_UHH_SYSCONFIG_VAL	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_UHH_SYSCONFIG_VAL	/;"	d
OMAP_UHH_SYSCONFIG_VAL	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_UHH_SYSCONFIG_VAL	/;"	d
OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	/;"	d
OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	/;"	d
OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	/;"	d
OMAP_ULPI_RD_OPSEL	drivers/usb/ulpi/omap-ulpi-viewport.c	/^#define OMAP_ULPI_RD_OPSEL	/;"	d	file:
OMAP_ULPI_START	drivers/usb/ulpi/omap-ulpi-viewport.c	/^#define OMAP_ULPI_START	/;"	d	file:
OMAP_ULPI_WR_OPSEL	drivers/usb/ulpi/omap-ulpi-viewport.c	/^#define OMAP_ULPI_WR_OPSEL	/;"	d	file:
OMAP_USBHS_PORT_MODE_UNUSED	arch/arm/include/asm/ehci-omap.h	/^	OMAP_USBHS_PORT_MODE_UNUSED,$/;"	e	enum:usbhs_omap_port_mode
OMAP_USBHS_REV1	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_USBHS_REV1	/;"	d
OMAP_USBHS_REV2	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_USBHS_REV2	/;"	d
OMAP_USBHS_REV2_1	arch/arm/include/asm/ehci-omap.h	/^#define OMAP_USBHS_REV2_1	/;"	d
OMAP_USBTLL_BASE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_USBTLL_BASE	/;"	d
OMAP_USBTLL_BASE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_USBTLL_BASE	/;"	d
OMAP_USBTLL_BASE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_USBTLL_BASE	/;"	d
OMAP_USBTLL_SYSCONFIG_CACTIVITY	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_CACTIVITY	/;"	d
OMAP_USBTLL_SYSCONFIG_CACTIVITY	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_CACTIVITY	/;"	d
OMAP_USBTLL_SYSCONFIG_CACTIVITY	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_CACTIVITY	/;"	d
OMAP_USBTLL_SYSCONFIG_ENAWAKEUP	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP	/;"	d
OMAP_USBTLL_SYSCONFIG_ENAWAKEUP	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP	/;"	d
OMAP_USBTLL_SYSCONFIG_ENAWAKEUP	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP	/;"	d
OMAP_USBTLL_SYSCONFIG_SIDLEMODE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE	/;"	d
OMAP_USBTLL_SYSCONFIG_SIDLEMODE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE	/;"	d
OMAP_USBTLL_SYSCONFIG_SIDLEMODE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE	/;"	d
OMAP_USBTLL_SYSCONFIG_SOFTRESET	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_SOFTRESET	/;"	d
OMAP_USBTLL_SYSCONFIG_SOFTRESET	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_SOFTRESET	/;"	d
OMAP_USBTLL_SYSCONFIG_SOFTRESET	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_USBTLL_SYSCONFIG_SOFTRESET	/;"	d
OMAP_USBTLL_SYSSTATUS_RESETDONE	arch/arm/include/asm/arch-omap3/ehci.h	/^#define OMAP_USBTLL_SYSSTATUS_RESETDONE	/;"	d
OMAP_USBTLL_SYSSTATUS_RESETDONE	arch/arm/include/asm/arch-omap4/ehci.h	/^#define OMAP_USBTLL_SYSSTATUS_RESETDONE	/;"	d
OMAP_USBTLL_SYSSTATUS_RESETDONE	arch/arm/include/asm/arch-omap5/ehci.h	/^#define OMAP_USBTLL_SYSSTATUS_RESETDONE	/;"	d
OMAP_XHCI_BASE	include/linux/usb/xhci-omap.h	/^#define OMAP_XHCI_BASE /;"	d
OMCR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR10	/;"	d
OMCR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR11	/;"	d
OMCR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR4	/;"	d
OMCR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR5	/;"	d
OMCR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR6	/;"	d
OMCR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR7	/;"	d
OMCR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR8	/;"	d
OMCR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OMCR9	/;"	d
OME_NUMBER_ENTRIES	arch/powerpc/include/asm/fsl_pamu.h	/^#define	OME_NUMBER_ENTRIES /;"	d
OMOD_MASK	drivers/spi/rk_spi.h	/^	OMOD_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
OMOD_MASTER	drivers/spi/rk_spi.h	/^	OMOD_MASTER	= 0,	\/* Master Mode *\/$/;"	e	enum:__anondde5bacc0103
OMOD_SHIFT	drivers/spi/rk_spi.h	/^	OMOD_SHIFT	= 20,	\/* Operation Mode *\/$/;"	e	enum:__anondde5bacc0103
OMOD_SLAVE	drivers/spi/rk_spi.h	/^	OMOD_SLAVE,		\/* Slave Mode *\/$/;"	e	enum:__anondde5bacc0103
OMR_PM	drivers/net/dc2114x.c	/^#define OMR_PM	/;"	d	file:
OMR_PS	drivers/net/dc2114x.c	/^#define OMR_PS	/;"	d	file:
OMR_SDP	drivers/net/dc2114x.c	/^#define OMR_SDP	/;"	d	file:
OMR_SR	drivers/net/dc2114x.c	/^#define OMR_SR	/;"	d	file:
OMR_ST	drivers/net/dc2114x.c	/^#define OMR_ST	/;"	d	file:
OM_PIN_BITS	arch/arm/mach-exynos/include/mach/power.h	/^#define OM_PIN_BITS	/;"	d
OM_PIN_MASK	arch/arm/mach-exynos/include/mach/power.h	/^#define OM_PIN_MASK	/;"	d
OM_PIN_SHIFT	arch/arm/mach-exynos/include/mach/power.h	/^#define OM_PIN_SHIFT	/;"	d
ON	drivers/power/domain/tegra186-power-domain.c	/^#define ON	/;"	d	file:
ON	include/lattice.h	/^#define ON	/;"	d
ONDIE_ECC_FEATURE_ADDR	drivers/mtd/nand/arasan_nfc.c	/^#define ONDIE_ECC_FEATURE_ADDR	/;"	d	file:
ONENAND_BADBLOCK_POS	include/linux/mtd/bbm.h	/^#define ONENAND_BADBLOCK_POS	/;"	d
ONENAND_BBT_READ_ECC_ERROR	include/linux/mtd/bbm.h	/^#define ONENAND_BBT_READ_ECC_ERROR	/;"	d
ONENAND_BBT_READ_ERROR	include/linux/mtd/bbm.h	/^#define ONENAND_BBT_READ_ERROR	/;"	d
ONENAND_BBT_READ_FATAL_ERROR	include/linux/mtd/bbm.h	/^#define ONENAND_BBT_READ_FATAL_ERROR	/;"	d
ONENAND_BOOT	common/Kconfig	/^config ONENAND_BOOT$/;"	c	menu:Boot media
ONENAND_BOOTRAM	include/linux/mtd/onenand_regs.h	/^#define	ONENAND_BOOTRAM	/;"	d
ONENAND_BSA_BOOTRAM	include/linux/mtd/onenand_regs.h	/^#define ONENAND_BSA_BOOTRAM	/;"	d
ONENAND_BSA_DATARAM0	include/linux/mtd/onenand_regs.h	/^#define ONENAND_BSA_DATARAM0	/;"	d
ONENAND_BSA_DATARAM1	include/linux/mtd/onenand_regs.h	/^#define ONENAND_BSA_DATARAM1	/;"	d
ONENAND_BSA_MASK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_BSA_MASK	/;"	d
ONENAND_BSA_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_BSA_SHIFT	/;"	d
ONENAND_BSC_MASK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_BSC_MASK	/;"	d
ONENAND_CACHE_PAGES	fs/jffs2/jffs2_1pass.c	/^#define ONENAND_CACHE_PAGES /;"	d	file:
ONENAND_CACHE_SIZE	fs/jffs2/jffs2_1pass.c	/^#define ONENAND_CACHE_SIZE /;"	d	file:
ONENAND_CMD_2X_CACHE_PROG	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_2X_CACHE_PROG	/;"	d
ONENAND_CMD_2X_PROG	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_2X_PROG	/;"	d
ONENAND_CMD_BUFFERRAM	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_BUFFERRAM	/;"	d
ONENAND_CMD_ERASE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_ERASE	/;"	d
ONENAND_CMD_ERASE_VERIFY	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_ERASE_VERIFY	/;"	d
ONENAND_CMD_LOCK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_LOCK	/;"	d
ONENAND_CMD_LOCK_TIGHT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_LOCK_TIGHT	/;"	d
ONENAND_CMD_MULTIBLOCK_ERASE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_MULTIBLOCK_ERASE	/;"	d
ONENAND_CMD_PROG	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_PROG	/;"	d
ONENAND_CMD_PROGOOB	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_PROGOOB	/;"	d
ONENAND_CMD_READ	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_READ	/;"	d
ONENAND_CMD_READID	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_READID	/;"	d
ONENAND_CMD_READOOB	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_READOOB	/;"	d
ONENAND_CMD_RESET	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_RESET	/;"	d
ONENAND_CMD_UNLOCK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_UNLOCK	/;"	d
ONENAND_CMD_UNLOCK_ALL	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CMD_UNLOCK_ALL	/;"	d
ONENAND_CTRL_ERASE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_ERASE	/;"	d
ONENAND_CTRL_ERROR	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_ERROR	/;"	d
ONENAND_CTRL_LOAD	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_LOAD	/;"	d
ONENAND_CTRL_LOCK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_LOCK	/;"	d
ONENAND_CTRL_ONGO	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_ONGO	/;"	d
ONENAND_CTRL_PROGRAM	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_PROGRAM	/;"	d
ONENAND_CTRL_RSTB	include/linux/mtd/onenand_regs.h	/^#define ONENAND_CTRL_RSTB	/;"	d
ONENAND_CURRENT_BUFFERRAM	include/linux/mtd/onenand.h	/^#define ONENAND_CURRENT_BUFFERRAM(/;"	d
ONENAND_DATARAM	include/linux/mtd/onenand_regs.h	/^#define	ONENAND_DATARAM	/;"	d
ONENAND_DDP_CHIP0	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DDP_CHIP0	/;"	d
ONENAND_DDP_CHIP1	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DDP_CHIP1	/;"	d
ONENAND_DDP_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DDP_SHIFT	/;"	d
ONENAND_DEVICE_DENSITY_1Gb	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_DENSITY_1Gb	/;"	d
ONENAND_DEVICE_DENSITY_2Gb	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_DENSITY_2Gb	/;"	d
ONENAND_DEVICE_DENSITY_4Gb	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_DENSITY_4Gb	/;"	d
ONENAND_DEVICE_DENSITY_512Mb	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_DENSITY_512Mb	/;"	d
ONENAND_DEVICE_DENSITY_MASK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_DENSITY_MASK	/;"	d
ONENAND_DEVICE_DENSITY_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_DENSITY_SHIFT	/;"	d
ONENAND_DEVICE_IS_DDP	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_IS_DDP	/;"	d
ONENAND_DEVICE_IS_DEMUX	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_IS_DEMUX	/;"	d
ONENAND_DEVICE_VCC_MASK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_DEVICE_VCC_MASK	/;"	d
ONENAND_ECC_1BIT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_ECC_1BIT	/;"	d
ONENAND_ECC_1BIT_ALL	include/linux/mtd/onenand_regs.h	/^#define ONENAND_ECC_1BIT_ALL	/;"	d
ONENAND_ECC_2BIT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_ECC_2BIT	/;"	d
ONENAND_ECC_2BIT_ALL	include/linux/mtd/onenand_regs.h	/^#define ONENAND_ECC_2BIT_ALL	/;"	d
ONENAND_ECC_4BIT_UNCORRECTABLE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_ECC_4BIT_UNCORRECTABLE	/;"	d
ONENAND_ENV_OFFSET	include/configs/omap3_beagle.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_OFFSET	include/configs/omap3_cairo.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_OFFSET	include/configs/omap3_evm.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_OFFSET	include/configs/omap3_logic.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_OFFSET	include/configs/omap3_overo.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_OFFSET	include/configs/omap3_zoom1.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_OFFSET	include/configs/tao3530.h	/^#define ONENAND_ENV_OFFSET	/;"	d
ONENAND_ENV_SIZE	common/env_onenand.c	/^#define ONENAND_ENV_SIZE(/;"	d	file:
ONENAND_ERASE_START	drivers/mtd/onenand/samsung.c	/^#define ONENAND_ERASE_START	/;"	d	file:
ONENAND_ERASE_STATUS	drivers/mtd/onenand/samsung.c	/^#define ONENAND_ERASE_STATUS	/;"	d	file:
ONENAND_ERASE_VERIFY	drivers/mtd/onenand/samsung.c	/^#define ONENAND_ERASE_VERIFY	/;"	d	file:
ONENAND_FPA_MASK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_FPA_MASK	/;"	d
ONENAND_FPA_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_FPA_SHIFT	/;"	d
ONENAND_FSA_MASK	include/linux/mtd/onenand_regs.h	/^#define ONENAND_FSA_MASK	/;"	d
ONENAND_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define ONENAND_GPMC_CONFIG1	/;"	d
ONENAND_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define ONENAND_GPMC_CONFIG2	/;"	d
ONENAND_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define ONENAND_GPMC_CONFIG3	/;"	d
ONENAND_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define ONENAND_GPMC_CONFIG4	/;"	d
ONENAND_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define ONENAND_GPMC_CONFIG5	/;"	d
ONENAND_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define ONENAND_GPMC_CONFIG6	/;"	d
ONENAND_HAS_2PLANE	include/linux/mtd/onenand.h	/^#define ONENAND_HAS_2PLANE	/;"	d
ONENAND_HAS_4KB_PAGE	include/linux/mtd/onenand.h	/^#define ONENAND_HAS_4KB_PAGE /;"	d
ONENAND_HAS_CONT_LOCK	include/linux/mtd/onenand.h	/^#define ONENAND_HAS_CONT_LOCK	/;"	d
ONENAND_HAS_UNLOCK_ALL	include/linux/mtd/onenand.h	/^#define ONENAND_HAS_UNLOCK_ALL	/;"	d
ONENAND_INT_CLEAR	include/linux/mtd/onenand_regs.h	/^#define ONENAND_INT_CLEAR	/;"	d
ONENAND_INT_ERASE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_INT_ERASE	/;"	d
ONENAND_INT_MASTER	include/linux/mtd/onenand_regs.h	/^#define ONENAND_INT_MASTER	/;"	d
ONENAND_INT_READ	include/linux/mtd/onenand_regs.h	/^#define ONENAND_INT_READ	/;"	d
ONENAND_INT_RESET	include/linux/mtd/onenand_regs.h	/^#define ONENAND_INT_RESET	/;"	d
ONENAND_INT_WRITE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_INT_WRITE	/;"	d
ONENAND_IS_2PLANE	include/linux/mtd/onenand.h	/^#define ONENAND_IS_2PLANE(/;"	d
ONENAND_IS_4KB_PAGE	include/linux/mtd/onenand.h	/^#define ONENAND_IS_4KB_PAGE(/;"	d
ONENAND_IS_DDP	include/linux/mtd/onenand.h	/^#define ONENAND_IS_DDP(/;"	d
ONENAND_IS_MLC	include/linux/mtd/onenand.h	/^#define ONENAND_IS_MLC(/;"	d
ONENAND_LOCK_END	drivers/mtd/onenand/samsung.c	/^#define ONENAND_LOCK_END	/;"	d	file:
ONENAND_LOCK_START	drivers/mtd/onenand/samsung.c	/^#define ONENAND_LOCK_START	/;"	d	file:
ONENAND_LOCK_TIGHT_END	drivers/mtd/onenand/samsung.c	/^#define ONENAND_LOCK_TIGHT_END	/;"	d	file:
ONENAND_LOCK_TIGHT_START	drivers/mtd/onenand/samsung.c	/^#define ONENAND_LOCK_TIGHT_START	/;"	d	file:
ONENAND_MAIN_ACCESS_ONLY	drivers/mtd/onenand/samsung.c	/^#define ONENAND_MAIN_ACCESS_ONLY	/;"	d	file:
ONENAND_MAIN_SPARE_ACCESS	drivers/mtd/onenand/samsung.c	/^#define ONENAND_MAIN_SPARE_ACCESS	/;"	d	file:
ONENAND_MAP	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ONENAND_MAP	/;"	d
ONENAND_MAX_ENV_SIZE	common/env_onenand.c	/^#define ONENAND_MAX_ENV_SIZE	/;"	d	file:
ONENAND_MEMORY_MAP	include/linux/mtd/onenand_regs.h	/^#define ONENAND_MEMORY_MAP(/;"	d
ONENAND_MEM_RESET_COLD	include/linux/mtd/samsung_onenand.h	/^#define ONENAND_MEM_RESET_COLD	/;"	d
ONENAND_MEM_RESET_HOT	include/linux/mtd/samsung_onenand.h	/^#define ONENAND_MEM_RESET_HOT	/;"	d
ONENAND_MEM_RESET_WARM	include/linux/mtd/samsung_onenand.h	/^#define ONENAND_MEM_RESET_WARM	/;"	d
ONENAND_MFR_NUMONYX	include/linux/mtd/onenand.h	/^#define ONENAND_MFR_NUMONYX	/;"	d
ONENAND_MFR_SAMSUNG	include/linux/mtd/onenand.h	/^#define ONENAND_MFR_SAMSUNG	/;"	d
ONENAND_MULTI_ERASE_SET	drivers/mtd/onenand/samsung.c	/^#define ONENAND_MULTI_ERASE_SET	/;"	d	file:
ONENAND_NEXT_BUFFERRAM	include/linux/mtd/onenand.h	/^#define ONENAND_NEXT_BUFFERRAM(/;"	d
ONENAND_OOBBUF_ALLOC	include/linux/mtd/onenand.h	/^#define ONENAND_OOBBUF_ALLOC	/;"	d
ONENAND_OTP_ACCESS	drivers/mtd/onenand/samsung.c	/^#define ONENAND_OTP_ACCESS	/;"	d	file:
ONENAND_PAGEBUF_ALLOC	include/linux/mtd/onenand.h	/^#define ONENAND_PAGEBUF_ALLOC	/;"	d
ONENAND_PAGES_PER_BLOCK	drivers/mtd/onenand/onenand_spl.c	/^#define ONENAND_PAGES_PER_BLOCK	/;"	d	file:
ONENAND_PAGE_MASK	fs/jffs2/jffs2_1pass.c	/^#define ONENAND_PAGE_MASK /;"	d	file:
ONENAND_PAGE_SHIFT	fs/jffs2/jffs2_1pass.c	/^#define ONENAND_PAGE_SHIFT /;"	d	file:
ONENAND_PAGE_SIZE	fs/jffs2/jffs2_1pass.c	/^#define ONENAND_PAGE_SIZE /;"	d	file:
ONENAND_PIPELINE_READ	drivers/mtd/onenand/samsung.c	/^#define ONENAND_PIPELINE_READ	/;"	d	file:
ONENAND_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define ONENAND_RATIO	/;"	d
ONENAND_RATIO	board/samsung/trats/setup.h	/^#define ONENAND_RATIO	/;"	d
ONENAND_REG_BOOT_BUFFER_SIZE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_BOOT_BUFFER_SIZE	/;"	d
ONENAND_REG_COMMAND	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_COMMAND	/;"	d
ONENAND_REG_CTRL_STATUS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_CTRL_STATUS	/;"	d
ONENAND_REG_DATA_BUFFER_SIZE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_DATA_BUFFER_SIZE	/;"	d
ONENAND_REG_DEVICE_ID	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_DEVICE_ID	/;"	d
ONENAND_REG_ECC_M0	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_M0	/;"	d
ONENAND_REG_ECC_M1	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_M1	/;"	d
ONENAND_REG_ECC_M2	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_M2	/;"	d
ONENAND_REG_ECC_M3	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_M3	/;"	d
ONENAND_REG_ECC_S0	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_S0	/;"	d
ONENAND_REG_ECC_S1	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_S1	/;"	d
ONENAND_REG_ECC_S2	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_S2	/;"	d
ONENAND_REG_ECC_S3	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_S3	/;"	d
ONENAND_REG_ECC_STATUS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_ECC_STATUS	/;"	d
ONENAND_REG_END_BLOCK_ADDRESS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_END_BLOCK_ADDRESS	/;"	d
ONENAND_REG_INTERRUPT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_INTERRUPT	/;"	d
ONENAND_REG_MANUFACTURER_ID	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_MANUFACTURER_ID	/;"	d
ONENAND_REG_NUM_BUFFERS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_NUM_BUFFERS	/;"	d
ONENAND_REG_START_ADDRESS1	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS1	/;"	d
ONENAND_REG_START_ADDRESS2	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS2	/;"	d
ONENAND_REG_START_ADDRESS3	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS3	/;"	d
ONENAND_REG_START_ADDRESS4	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS4	/;"	d
ONENAND_REG_START_ADDRESS5	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS5	/;"	d
ONENAND_REG_START_ADDRESS6	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS6	/;"	d
ONENAND_REG_START_ADDRESS7	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS7	/;"	d
ONENAND_REG_START_ADDRESS8	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_ADDRESS8	/;"	d
ONENAND_REG_START_BLOCK_ADDRESS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_BLOCK_ADDRESS	/;"	d
ONENAND_REG_START_BUFFER	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_START_BUFFER	/;"	d
ONENAND_REG_SYS_CFG1	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_SYS_CFG1	/;"	d
ONENAND_REG_SYS_CFG2	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_SYS_CFG2	/;"	d
ONENAND_REG_TECHNOLOGY	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_TECHNOLOGY	/;"	d
ONENAND_REG_VERSION_ID	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_VERSION_ID	/;"	d
ONENAND_REG_WP_STATUS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_REG_WP_STATUS	/;"	d
ONENAND_RUNTIME_BADBLOCK_CHECK	include/linux/mtd/onenand.h	/^#define ONENAND_RUNTIME_BADBLOCK_CHECK	/;"	d
ONENAND_SET_BUFFERRAM0	include/linux/mtd/onenand.h	/^#define ONENAND_SET_BUFFERRAM0(/;"	d
ONENAND_SET_BUFFERRAM1	include/linux/mtd/onenand.h	/^#define ONENAND_SET_BUFFERRAM1(/;"	d
ONENAND_SET_NEXT_BUFFERRAM	include/linux/mtd/onenand.h	/^#define ONENAND_SET_NEXT_BUFFERRAM(/;"	d
ONENAND_SET_PREV_BUFFERRAM	include/linux/mtd/onenand.h	/^#define ONENAND_SET_PREV_BUFFERRAM(/;"	d
ONENAND_SPARERAM	include/linux/mtd/onenand_regs.h	/^#define	ONENAND_SPARERAM	/;"	d
ONENAND_SPARE_ACCESS_ONLY	drivers/mtd/onenand/samsung.c	/^#define ONENAND_SPARE_ACCESS_ONLY	/;"	d	file:
ONENAND_SYS_CFG1_BL_16	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BL_16	/;"	d
ONENAND_SYS_CFG1_BL_32	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BL_32	/;"	d
ONENAND_SYS_CFG1_BL_4	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BL_4	/;"	d
ONENAND_SYS_CFG1_BL_8	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BL_8	/;"	d
ONENAND_SYS_CFG1_BL_CONT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BL_CONT	/;"	d
ONENAND_SYS_CFG1_BL_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BL_SHIFT	/;"	d
ONENAND_SYS_CFG1_BRL_10	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_10	/;"	d
ONENAND_SYS_CFG1_BRL_3	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_3	/;"	d
ONENAND_SYS_CFG1_BRL_4	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_4	/;"	d
ONENAND_SYS_CFG1_BRL_5	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_5	/;"	d
ONENAND_SYS_CFG1_BRL_6	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_6	/;"	d
ONENAND_SYS_CFG1_BRL_7	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_7	/;"	d
ONENAND_SYS_CFG1_BRL_8	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_8	/;"	d
ONENAND_SYS_CFG1_BRL_9	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_9	/;"	d
ONENAND_SYS_CFG1_BRL_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_BRL_SHIFT	/;"	d
ONENAND_SYS_CFG1_INT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_INT	/;"	d
ONENAND_SYS_CFG1_IOBE	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_IOBE	/;"	d
ONENAND_SYS_CFG1_NO_ECC	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_NO_ECC	/;"	d
ONENAND_SYS_CFG1_RDY	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_RDY	/;"	d
ONENAND_SYS_CFG1_RDY_CONF	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_RDY_CONF	/;"	d
ONENAND_SYS_CFG1_SYNC_READ	include/linux/mtd/onenand_regs.h	/^#define ONENAND_SYS_CFG1_SYNC_READ	/;"	d
ONENAND_TECHNOLOGY_IS_MLC	include/linux/mtd/onenand_regs.h	/^#define ONENAND_TECHNOLOGY_IS_MLC	/;"	d
ONENAND_UNLOCK_ALL	drivers/mtd/onenand/samsung.c	/^#define ONENAND_UNLOCK_ALL	/;"	d	file:
ONENAND_UNLOCK_END	drivers/mtd/onenand/samsung.c	/^#define ONENAND_UNLOCK_END	/;"	d	file:
ONENAND_UNLOCK_START	drivers/mtd/onenand/samsung.c	/^#define ONENAND_UNLOCK_START	/;"	d	file:
ONENAND_VERSION_PROCESS_SHIFT	include/linux/mtd/onenand_regs.h	/^#define ONENAND_VERSION_PROCESS_SHIFT	/;"	d
ONENAND_WP_LS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_WP_LS	/;"	d
ONENAND_WP_LTS	include/linux/mtd/onenand_regs.h	/^#define ONENAND_WP_LTS	/;"	d
ONENAND_WP_US	include/linux/mtd/onenand_regs.h	/^#define ONENAND_WP_US	/;"	d
ONE_BILLION	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define ONE_BILLION	/;"	d	file:
ONE_BILLION	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^#define ONE_BILLION	/;"	d	file:
ONE_BILLION	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define ONE_BILLION	/;"	d	file:
ONE_BILLION	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^#define ONE_BILLION	/;"	d	file:
ONE_BILLION	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define ONE_BILLION	/;"	d
ONE_BILLION	arch/powerpc/cpu/ppc4xx/speed.c	/^#define ONE_BILLION /;"	d	file:
ONE_BILLION	board/amcc/yucca/yucca.h	/^#define ONE_BILLION	/;"	d
ONE_CLOCK_ERROR_SHIFT	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^#define ONE_CLOCK_ERROR_SHIFT	/;"	d	file:
ONE_MILLION	board/amcc/yucca/yucca.h	/^#define ONE_MILLION	/;"	d
ONE_MS	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define	ONE_MS	/;"	d	file:
ONE_MS	arch/arm/cpu/armv7/sunxi/psci.c	/^#define ONE_MS /;"	d	file:
ONE_NAND_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	ONE_NAND_BOOT,$/;"	e	enum:boot_device
ONFI_CRC_BASE	include/linux/mtd/nand.h	/^#define ONFI_CRC_BASE	/;"	d
ONFI_DEVICE_FEATURES	drivers/mtd/nand/denali.h	/^#define ONFI_DEVICE_FEATURES	/;"	d
ONFI_DEVICE_FEATURES__VALUE	drivers/mtd/nand/denali.h	/^#define     ONFI_DEVICE_FEATURES__VALUE	/;"	d
ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L	drivers/mtd/nand/denali.h	/^#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L	/;"	d
ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE	drivers/mtd/nand/denali.h	/^#define     ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE	/;"	d
ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U	drivers/mtd/nand/denali.h	/^#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U	/;"	d
ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE	drivers/mtd/nand/denali.h	/^#define     ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE	/;"	d
ONFI_DEVICE_NO_OF_LUNS	drivers/mtd/nand/denali.h	/^#define ONFI_DEVICE_NO_OF_LUNS	/;"	d
ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS	drivers/mtd/nand/denali.h	/^#define     ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS	/;"	d
ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE	drivers/mtd/nand/denali.h	/^#define     ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE	/;"	d
ONFI_EXT_SECTION_MAX	include/linux/mtd/nand.h	/^#define ONFI_EXT_SECTION_MAX /;"	d
ONFI_FEATURE_16_BIT_BUS	include/linux/mtd/nand.h	/^#define ONFI_FEATURE_16_BIT_BUS	/;"	d
ONFI_FEATURE_ADDR_READ_RETRY	include/linux/mtd/nand.h	/^#define ONFI_FEATURE_ADDR_READ_RETRY	/;"	d
ONFI_FEATURE_ADDR_TIMING_MODE	include/linux/mtd/nand.h	/^#define ONFI_FEATURE_ADDR_TIMING_MODE	/;"	d
ONFI_FEATURE_EXT_PARAM_PAGE	include/linux/mtd/nand.h	/^#define ONFI_FEATURE_EXT_PARAM_PAGE	/;"	d
ONFI_OPTIONAL_COMMANDS	drivers/mtd/nand/denali.h	/^#define ONFI_OPTIONAL_COMMANDS	/;"	d
ONFI_OPTIONAL_COMMANDS__VALUE	drivers/mtd/nand/denali.h	/^#define     ONFI_OPTIONAL_COMMANDS__VALUE	/;"	d
ONFI_OPT_CMD_SET_GET_FEATURES	include/linux/mtd/nand.h	/^#define ONFI_OPT_CMD_SET_GET_FEATURES	/;"	d
ONFI_PGM_CACHE_TIMING_MODE	drivers/mtd/nand/denali.h	/^#define ONFI_PGM_CACHE_TIMING_MODE	/;"	d
ONFI_PGM_CACHE_TIMING_MODE__VALUE	drivers/mtd/nand/denali.h	/^#define     ONFI_PGM_CACHE_TIMING_MODE__VALUE	/;"	d
ONFI_SECTION_TYPE_0	include/linux/mtd/nand.h	/^#define ONFI_SECTION_TYPE_0	/;"	d
ONFI_SECTION_TYPE_1	include/linux/mtd/nand.h	/^#define ONFI_SECTION_TYPE_1	/;"	d
ONFI_SECTION_TYPE_2	include/linux/mtd/nand.h	/^#define ONFI_SECTION_TYPE_2	/;"	d
ONFI_SUBFEATURE_PARAM_LEN	include/linux/mtd/nand.h	/^#define ONFI_SUBFEATURE_PARAM_LEN	/;"	d
ONFI_TIMING_MODE	drivers/mtd/nand/denali.h	/^#define ONFI_TIMING_MODE	/;"	d
ONFI_TIMING_MODE_0	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_0	/;"	d
ONFI_TIMING_MODE_1	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_1	/;"	d
ONFI_TIMING_MODE_2	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_2	/;"	d
ONFI_TIMING_MODE_3	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_3	/;"	d
ONFI_TIMING_MODE_4	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_4	/;"	d
ONFI_TIMING_MODE_5	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_5	/;"	d
ONFI_TIMING_MODE_UNKNOWN	include/linux/mtd/nand.h	/^#define ONFI_TIMING_MODE_UNKNOWN	/;"	d
ONFI_TIMING_MODE__VALUE	drivers/mtd/nand/denali.h	/^#define     ONFI_TIMING_MODE__VALUE	/;"	d
ONOFFA	include/mc34704.h	/^#define ONOFFA	/;"	d
ONOFFD	include/mc34704.h	/^#define ONOFFD	/;"	d
ONOFFE	include/mc34704.h	/^#define ONOFFE	/;"	d
ON_OFF	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define ON_OFF	/;"	d
OOBDataLength	drivers/usb/gadget/rndis.h	/^	__le32	OOBDataLength;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
OOBDataOffset	drivers/usb/gadget/rndis.h	/^	__le32	OOBDataOffset;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
OOB_64	drivers/mtd/nand/vf610_nfc.c	/^#define OOB_64	/;"	d	file:
OOB_MAX	drivers/mtd/nand/vf610_nfc.c	/^#define OOB_MAX	/;"	d	file:
OOB_TEREDO_EN	drivers/usb/eth/r8152.h	/^#define OOB_TEREDO_EN	/;"	d
OPA_MODE	include/twl6030.h	/^#define OPA_MODE	/;"	d
OPB2PLB40_BCTRL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define OPB2PLB40_BCTRL	/;"	d
OPBDDV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define OPBDDV_MASK	/;"	d
OPBDDV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define OPBDDV_MASK	/;"	d
OPBDDV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define OPBDDV_MASK	/;"	d
OPBDDV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define OPBDDV_MASK	/;"	d
OPBDDV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define OPBDDV_MASK	/;"	d
OPCODE_ADD	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ADD	/;"	d
OPCODE_ADDI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ADDI	/;"	d
OPCODE_AND	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_AND	/;"	d
OPCODE_ANDHI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ANDHI	/;"	d
OPCODE_ANDI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ANDI	/;"	d
OPCODE_BEQ	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BEQ	/;"	d
OPCODE_BGE	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BGE	/;"	d
OPCODE_BGEU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BGEU	/;"	d
OPCODE_BLT	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BLT	/;"	d
OPCODE_BLTU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BLTU	/;"	d
OPCODE_BNE	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BNE	/;"	d
OPCODE_BR	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BR	/;"	d
OPCODE_BREAK	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BREAK	/;"	d
OPCODE_BRET	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_BRET	/;"	d
OPCODE_CALL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CALL	/;"	d
OPCODE_CALLR	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CALLR	/;"	d
OPCODE_CLEAR	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define OPCODE_CLEAR /;"	d
OPCODE_CLEAR	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define OPCODE_CLEAR /;"	d
OPCODE_CLEAR	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define OPCODE_CLEAR /;"	d
OPCODE_CLEAR	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define OPCODE_CLEAR /;"	d
OPCODE_CLEAR	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define OPCODE_CLEAR /;"	d
OPCODE_CMPEQ	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPEQ	/;"	d
OPCODE_CMPEQI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPEQI	/;"	d
OPCODE_CMPGE	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPGE	/;"	d
OPCODE_CMPGEI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPGEI	/;"	d
OPCODE_CMPGEU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPGEU	/;"	d
OPCODE_CMPGEUI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPGEUI	/;"	d
OPCODE_CMPLT	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPLT	/;"	d
OPCODE_CMPLTI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPLTI	/;"	d
OPCODE_CMPLTU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPLTU	/;"	d
OPCODE_CMPLTUI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPLTUI	/;"	d
OPCODE_CMPNE	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPNE	/;"	d
OPCODE_CMPNEI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CMPNEI	/;"	d
OPCODE_CUSTOM	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_CUSTOM	/;"	d
OPCODE_DIV	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_DIV	/;"	d
OPCODE_DIVU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_DIVU	/;"	d
OPCODE_ERET	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ERET	/;"	d
OPCODE_EXIT	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define OPCODE_EXIT /;"	d
OPCODE_EXIT	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define OPCODE_EXIT /;"	d
OPCODE_EXIT	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define OPCODE_EXIT /;"	d
OPCODE_EXIT	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define OPCODE_EXIT /;"	d
OPCODE_EXIT	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define OPCODE_EXIT /;"	d
OPCODE_FLUSHD	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_FLUSHD	/;"	d
OPCODE_FLUSHI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_FLUSHI	/;"	d
OPCODE_FLUSHP	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_FLUSHP	/;"	d
OPCODE_INITD	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_INITD	/;"	d
OPCODE_INITI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_INITI	/;"	d
OPCODE_JMP	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_JMP	/;"	d
OPCODE_LDB	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDB	/;"	d
OPCODE_LDBIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDBIO	/;"	d
OPCODE_LDBU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDBU	/;"	d
OPCODE_LDBUIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDBUIO	/;"	d
OPCODE_LDH	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDH	/;"	d
OPCODE_LDHIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDHIO	/;"	d
OPCODE_LDHU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDHU	/;"	d
OPCODE_LDHUIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDHUIO	/;"	d
OPCODE_LDW	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDW	/;"	d
OPCODE_LDWIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_LDWIO	/;"	d
OPCODE_MASKDELAY	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define OPCODE_MASKDELAY /;"	d
OPCODE_MASKDELAY	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define OPCODE_MASKDELAY /;"	d
OPCODE_MASKDELAY	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define OPCODE_MASKDELAY /;"	d
OPCODE_MASKDELAY	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define OPCODE_MASKDELAY /;"	d
OPCODE_MASKDELAY	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define OPCODE_MASKDELAY /;"	d
OPCODE_MASKPOLL	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define OPCODE_MASKPOLL /;"	d
OPCODE_MASKPOLL	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define OPCODE_MASKPOLL /;"	d
OPCODE_MASKPOLL	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define OPCODE_MASKPOLL /;"	d
OPCODE_MASKPOLL	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define OPCODE_MASKPOLL /;"	d
OPCODE_MASKPOLL	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define OPCODE_MASKPOLL /;"	d
OPCODE_MASKWRITE	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define OPCODE_MASKWRITE /;"	d
OPCODE_MASKWRITE	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define OPCODE_MASKWRITE /;"	d
OPCODE_MASKWRITE	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define OPCODE_MASKWRITE /;"	d
OPCODE_MASKWRITE	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define OPCODE_MASKWRITE /;"	d
OPCODE_MASKWRITE	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define OPCODE_MASKWRITE /;"	d
OPCODE_MUL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_MUL	/;"	d
OPCODE_MULI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_MULI	/;"	d
OPCODE_MULXSS	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_MULXSS	/;"	d
OPCODE_MULXSU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_MULXSU	/;"	d
OPCODE_MULXUU	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_MULXUU	/;"	d
OPCODE_NEXTPC	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_NEXTPC	/;"	d
OPCODE_NOR	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_NOR	/;"	d
OPCODE_OP	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_OP(/;"	d
OPCODE_OPX	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_OPX(/;"	d
OPCODE_OR	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_OR	/;"	d
OPCODE_ORHI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ORHI	/;"	d
OPCODE_ORI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ORI	/;"	d
OPCODE_RA	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_RA(/;"	d
OPCODE_RB	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_RB(/;"	d
OPCODE_RC	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_RC(/;"	d
OPCODE_RDCTL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_RDCTL	/;"	d
OPCODE_RET	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_RET	/;"	d
OPCODE_ROL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ROL	/;"	d
OPCODE_ROLI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ROLI	/;"	d
OPCODE_ROR	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_ROR	/;"	d
OPCODE_RTYPE	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_RTYPE	/;"	d
OPCODE_SLL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SLL	/;"	d
OPCODE_SLLI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SLLI	/;"	d
OPCODE_SRA	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SRA	/;"	d
OPCODE_SRAI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SRAI	/;"	d
OPCODE_SRL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SRL	/;"	d
OPCODE_SRLI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SRLI	/;"	d
OPCODE_STB	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_STB	/;"	d
OPCODE_STBIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_STBIO	/;"	d
OPCODE_STH	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_STH	/;"	d
OPCODE_STHIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_STHIO	/;"	d
OPCODE_STW	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_STW	/;"	d
OPCODE_STWIO	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_STWIO	/;"	d
OPCODE_SUB	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SUB	/;"	d
OPCODE_SYNC	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_SYNC	/;"	d
OPCODE_TRAP	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_TRAP	/;"	d
OPCODE_WRCTL	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_WRCTL	/;"	d
OPCODE_WRITE	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define OPCODE_WRITE /;"	d
OPCODE_WRITE	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define OPCODE_WRITE /;"	d
OPCODE_WRITE	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define OPCODE_WRITE /;"	d
OPCODE_WRITE	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define OPCODE_WRITE /;"	d
OPCODE_WRITE	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define OPCODE_WRITE /;"	d
OPCODE_XOR	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_XOR	/;"	d
OPCODE_XORHI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_XORHI	/;"	d
OPCODE_XORI	arch/nios2/include/asm/opcodes.h	/^#define OPCODE_XORI	/;"	d
OPCR	arch/sh/include/asm/cpu_sh7722.h	/^#define OPCR /;"	d
OPCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	OPCR	/;"	d
OPC_MOVE	include/sym53c8xx.h	/^#define OPC_MOVE /;"	d
OPC_TRAP	arch/nios2/include/asm/opcodes.h	/^#define OPC_TRAP	/;"	d
OPEN	lib/slre.c	/^enum {END, BRANCH, ANY, EXACT, ANYOF, ANYBUT, OPEN, CLOSE, BOL, EOL,$/;"	e	enum:__anon5875e6120103	file:
OPENCHIP_APB1WIRE	include/ambapp_ids.h	/^#define OPENCHIP_APB1WIRE /;"	d
OPENCHIP_APBCF	include/ambapp_ids.h	/^#define OPENCHIP_APBCF /;"	d
OPENCHIP_APBCHARLCD	include/ambapp_ids.h	/^#define OPENCHIP_APBCHARLCD /;"	d
OPENCHIP_APBGPIO	include/ambapp_ids.h	/^#define OPENCHIP_APBGPIO /;"	d
OPENCHIP_APBI2C	include/ambapp_ids.h	/^#define OPENCHIP_APBI2C /;"	d
OPENCHIP_APBJTAG	include/ambapp_ids.h	/^#define OPENCHIP_APBJTAG /;"	d
OPENCHIP_APBLPC	include/ambapp_ids.h	/^#define OPENCHIP_APBLPC /;"	d
OPENCHIP_APBMMCSD	include/ambapp_ids.h	/^#define OPENCHIP_APBMMCSD /;"	d
OPENCHIP_APBNAND	include/ambapp_ids.h	/^#define OPENCHIP_APBNAND /;"	d
OPENCHIP_APBPS2	include/ambapp_ids.h	/^#define OPENCHIP_APBPS2 /;"	d
OPENCHIP_APBPWM	include/ambapp_ids.h	/^#define OPENCHIP_APBPWM /;"	d
OPENCHIP_APBSPI	include/ambapp_ids.h	/^#define OPENCHIP_APBSPI /;"	d
OPENCHIP_APBSUI	include/ambapp_ids.h	/^#define OPENCHIP_APBSUI /;"	d
OPENCHIP_APBSYSACE	include/ambapp_ids.h	/^#define OPENCHIP_APBSYSACE /;"	d
OPENCHIP_devices	cmd/ambapp.c	/^static ambapp_device_name OPENCHIP_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
OPENCORES_ETHMAC	include/ambapp_ids.h	/^#define OPENCORES_ETHMAC /;"	d
OPENCORES_PCIBR	include/ambapp_ids.h	/^#define OPENCORES_PCIBR /;"	d
OPENCORES_devices	cmd/ambapp.c	/^static ambapp_device_name OPENCORES_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
OPENDRAIN	arch/arm/include/asm/omap_mmc.h	/^#define OPENDRAIN	/;"	d
OPENRD_OE_HIGH	board/Marvell/openrd/openrd.h	/^#define OPENRD_OE_HIGH	/;"	d
OPENRD_OE_LOW	board/Marvell/openrd/openrd.h	/^#define OPENRD_OE_LOW	/;"	d
OPENRD_OE_VAL_HIGH	board/Marvell/openrd/openrd.h	/^#define OPENRD_OE_VAL_HIGH	/;"	d
OPENRD_OE_VAL_LOW	board/Marvell/openrd/openrd.h	/^#define OPENRD_OE_VAL_LOW	/;"	d
OPENRISC	arch/Kconfig	/^config OPENRISC$/;"	c	choice:choice07312ef30104
OPENVG_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define OPENVG_ARB_BASE_ADDR /;"	d
OPENVG_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define OPENVG_ARB_END_ADDR /;"	d
OPEN_PAD_CTRL	board/el/el6x/el6x.c	/^#define OPEN_PAD_CTRL /;"	d	file:
OPERATION_READ	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	OPERATION_READ = 0,$/;"	e	enum:hws_operation
OPERATION_WRITE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	OPERATION_WRITE = 1$/;"	e	enum:hws_operation
OPER_READ	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	OPER_READ,$/;"	e	enum:hws_dir
OPER_WRITE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	OPER_WRITE,$/;"	e	enum:hws_dir
OPER_WRITE_AND_READ	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	OPER_WRITE_AND_READ$/;"	e	enum:hws_dir
OPMODE_LPM	include/power/max77686_pmic.h	/^	OPMODE_LPM,$/;"	e	enum:__anon582827aa0403
OPMODE_MASK	drivers/usb/phy/twl4030.c	/^#define OPMODE_MASK	/;"	d	file:
OPMODE_OFF	include/power/max77686_pmic.h	/^	OPMODE_OFF = 0,$/;"	e	enum:__anon582827aa0403
OPMODE_ON	include/power/max77686_pmic.h	/^	OPMODE_ON,$/;"	e	enum:__anon582827aa0403
OPMODE_STANDBY	include/power/max77686_pmic.h	/^	OPMODE_STANDBY,$/;"	e	enum:__anon582827aa0403
OPMODE_STANDBY_LPM	include/power/max77686_pmic.h	/^	OPMODE_STANDBY_LPM,$/;"	e	enum:__anon582827aa0403
OPRND0	drivers/spi/fsl_qspi.h	/^#define OPRND0(/;"	d
OPRND0_SHIFT	drivers/spi/fsl_qspi.h	/^#define OPRND0_SHIFT	/;"	d
OPRND1	drivers/spi/fsl_qspi.h	/^#define OPRND1(/;"	d
OPRND1_SHIFT	drivers/spi/fsl_qspi.h	/^#define OPRND1_SHIFT	/;"	d
OPRTL_XBUFENA	board/keymile/common/common.h	/^#define OPRTL_XBUFENA	/;"	d
OPSIZ	arch/x86/lib/string.c	/^#define OPSIZ	/;"	d	file:
OPTFCLKEN_FUNC48M_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_FUNC48M_CLK	/;"	d
OPTFCLKEN_HSIC480M_P1_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_HSIC480M_P1_CLK	/;"	d
OPTFCLKEN_HSIC480M_P2_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_HSIC480M_P2_CLK	/;"	d
OPTFCLKEN_HSIC480M_P3_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_HSIC480M_P3_CLK	/;"	d
OPTFCLKEN_HSIC60M_P1_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_HSIC60M_P1_CLK	/;"	d
OPTFCLKEN_HSIC60M_P2_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_HSIC60M_P2_CLK	/;"	d
OPTFCLKEN_HSIC60M_P3_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_HSIC60M_P3_CLK	/;"	d
OPTFCLKEN_REFCLK960M	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_REFCLK960M	/;"	d
OPTFCLKEN_SCRM_CORE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_SCRM_CORE_MASK	/;"	d
OPTFCLKEN_SCRM_CORE_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_SCRM_CORE_SHIFT	/;"	d
OPTFCLKEN_SCRM_PER_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_SCRM_PER_MASK	/;"	d
OPTFCLKEN_SCRM_PER_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_SCRM_PER_SHIFT	/;"	d
OPTFCLKEN_SRCOMP_FCLK_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_SRCOMP_FCLK_MASK	/;"	d
OPTFCLKEN_SRCOMP_FCLK_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_SRCOMP_FCLK_SHIFT	/;"	d
OPTFCLKEN_USB_CH0_CLK_ENABLE	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_USB_CH0_CLK_ENABLE	/;"	d
OPTFCLKEN_USB_CH1_CLK_ENABLE	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_USB_CH1_CLK_ENABLE	/;"	d
OPTFCLKEN_USB_CH2_CLK_ENABLE	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_USB_CH2_CLK_ENABLE	/;"	d
OPTFCLKEN_UTMI_P1_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_UTMI_P1_CLK	/;"	d
OPTFCLKEN_UTMI_P2_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_UTMI_P2_CLK	/;"	d
OPTFCLKEN_UTMI_P3_CLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define OPTFCLKEN_UTMI_P3_CLK	/;"	d
OPTIMIZER_HIDE_VAR	include/linux/compiler-gcc.h	/^#define OPTIMIZER_HIDE_VAR(/;"	d
OPTIMIZER_HIDE_VAR	include/linux/compiler-intel.h	/^#define OPTIMIZER_HIDE_VAR(/;"	d
OPTIMIZER_HIDE_VAR	include/linux/compiler.h	/^#define OPTIMIZER_HIDE_VAR(/;"	d
OPTIONS	doc/kwboot.1	/^.SH "OPTIONS"$/;"	s	title:KWBOOT
OPTIONS	doc/mkimage.1	/^.SH "OPTIONS"$/;"	s	title:MKIMAGE
OPTREX_BPP	drivers/video/mpc8xx_lcd.c	/^#define OPTREX_BPP	/;"	d	file:
OPT_ALL	scripts/kconfig/gconf.c	/^	OPT_NORMAL, OPT_ALL, OPT_PROMPT$/;"	e	enum:__anon51b0ba2a0203	file:
OPT_BUS_WIDTH_1	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define OPT_BUS_WIDTH_1	/;"	d
OPT_FIELD_SIZE	net/bootp.h	/^#define OPT_FIELD_SIZE /;"	d
OPT_HDR_V1_BINARY_TYPE	tools/kwbimage.h	/^#define OPT_HDR_V1_BINARY_TYPE /;"	d
OPT_HDR_V1_REGISTER_TYPE	tools/kwbimage.h	/^#define OPT_HDR_V1_REGISTER_TYPE /;"	d
OPT_HDR_V1_SECURE_TYPE	tools/kwbimage.h	/^#define OPT_HDR_V1_SECURE_TYPE /;"	d
OPT_NORMAL	scripts/kconfig/gconf.c	/^	OPT_NORMAL, OPT_ALL, OPT_PROMPT$/;"	e	enum:__anon51b0ba2a0203	file:
OPT_PROMPT	scripts/kconfig/gconf.c	/^	OPT_NORMAL, OPT_ALL, OPT_PROMPT$/;"	e	enum:__anon51b0ba2a0203	file:
OP_ADD	post/lib_powerpc/cpu_asm.h	/^#define OP_ADD	/;"	d
OP_ADDC	post/lib_powerpc/cpu_asm.h	/^#define OP_ADDC	/;"	d
OP_ADDE	post/lib_powerpc/cpu_asm.h	/^#define OP_ADDE	/;"	d
OP_ADDI	post/lib_powerpc/cpu_asm.h	/^#define OP_ADDI	/;"	d
OP_ADDME	post/lib_powerpc/cpu_asm.h	/^#define OP_ADDME	/;"	d
OP_ADDZE	post/lib_powerpc/cpu_asm.h	/^#define OP_ADDZE	/;"	d
OP_ALG_AAI_HASH	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_HASH	/;"	d
OP_ALG_AAI_HMAC	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_HMAC	/;"	d
OP_ALG_AAI_HMAC_PRECOMP	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_HMAC_PRECOMP	/;"	d
OP_ALG_AAI_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_MASK	/;"	d
OP_ALG_AAI_RNG	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG	/;"	d
OP_ALG_AAI_RNG4_AI	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG4_AI	/;"	d
OP_ALG_AAI_RNG4_PS	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG4_PS	/;"	d
OP_ALG_AAI_RNG4_SH_0	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG4_SH_0	/;"	d
OP_ALG_AAI_RNG4_SH_1	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG4_SH_1	/;"	d
OP_ALG_AAI_RNG4_SK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG4_SK	/;"	d
OP_ALG_AAI_RNG_NZB	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG_NZB	/;"	d
OP_ALG_AAI_RNG_OBP	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_RNG_OBP	/;"	d
OP_ALG_AAI_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_SHIFT	/;"	d
OP_ALG_AAI_SMAC	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AAI_SMAC	/;"	d
OP_ALG_ALGSEL_3DES	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_3DES	/;"	d
OP_ALG_ALGSEL_AES	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_AES	/;"	d
OP_ALG_ALGSEL_ARC4	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_ARC4	/;"	d
OP_ALG_ALGSEL_CRC	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_CRC	/;"	d
OP_ALG_ALGSEL_DES	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_DES	/;"	d
OP_ALG_ALGSEL_KASUMI	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_KASUMI	/;"	d
OP_ALG_ALGSEL_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_MASK	/;"	d
OP_ALG_ALGSEL_MD5	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_MD5	/;"	d
OP_ALG_ALGSEL_RNG	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_RNG	/;"	d
OP_ALG_ALGSEL_SHA1	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SHA1	/;"	d
OP_ALG_ALGSEL_SHA224	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SHA224	/;"	d
OP_ALG_ALGSEL_SHA256	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SHA256	/;"	d
OP_ALG_ALGSEL_SHA384	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SHA384	/;"	d
OP_ALG_ALGSEL_SHA512	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SHA512	/;"	d
OP_ALG_ALGSEL_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SHIFT	/;"	d
OP_ALG_ALGSEL_SNOW	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SNOW	/;"	d
OP_ALG_ALGSEL_SNOW_F8	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SNOW_F8	/;"	d
OP_ALG_ALGSEL_SNOW_F9	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SNOW_F9	/;"	d
OP_ALG_ALGSEL_SUBMASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ALGSEL_SUBMASK	/;"	d
OP_ALG_AS_FINALIZE	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AS_FINALIZE	/;"	d
OP_ALG_AS_INIT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AS_INIT	/;"	d
OP_ALG_AS_INITFINAL	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AS_INITFINAL	/;"	d
OP_ALG_AS_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AS_MASK	/;"	d
OP_ALG_AS_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AS_SHIFT	/;"	d
OP_ALG_AS_UPDATE	drivers/crypto/fsl/desc.h	/^#define OP_ALG_AS_UPDATE	/;"	d
OP_ALG_DECRYPT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_DECRYPT	/;"	d
OP_ALG_DIR_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_DIR_MASK	/;"	d
OP_ALG_DIR_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_DIR_SHIFT	/;"	d
OP_ALG_ENCRYPT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ENCRYPT	/;"	d
OP_ALG_ICV_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ICV_MASK	/;"	d
OP_ALG_ICV_OFF	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ICV_OFF	/;"	d
OP_ALG_ICV_ON	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ICV_ON	/;"	d
OP_ALG_ICV_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_ICV_SHIFT	/;"	d
OP_ALG_PK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_PK	/;"	d
OP_ALG_PKMODE_MOD_EXPO	drivers/crypto/fsl/desc.h	/^#define OP_ALG_PKMODE_MOD_EXPO	/;"	d
OP_ALG_PK_FUN_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_PK_FUN_MASK	/;"	d
OP_ALG_RNG4_MAS	drivers/crypto/fsl/desc.h	/^#define OP_ALG_RNG4_MAS /;"	d
OP_ALG_RNG4_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_RNG4_SHIFT /;"	d
OP_ALG_RNG4_SK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_RNG4_SK /;"	d
OP_ALG_TYPE_CLASS1	drivers/crypto/fsl/desc.h	/^#define OP_ALG_TYPE_CLASS1	/;"	d
OP_ALG_TYPE_CLASS2	drivers/crypto/fsl/desc.h	/^#define OP_ALG_TYPE_CLASS2	/;"	d
OP_ALG_TYPE_MASK	drivers/crypto/fsl/desc.h	/^#define OP_ALG_TYPE_MASK	/;"	d
OP_ALG_TYPE_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_ALG_TYPE_SHIFT	/;"	d
OP_AND	cmd/test.c	/^#define OP_AND	/;"	d	file:
OP_ANDIS_	post/lib_powerpc/cpu_asm.h	/^#define OP_ANDIS_	/;"	d
OP_ANDI_	post/lib_powerpc/cpu_asm.h	/^#define OP_ANDI_	/;"	d
OP_B	post/lib_powerpc/cpu_asm.h	/^#define OP_B	/;"	d
OP_BC	post/lib_powerpc/cpu_asm.h	/^#define OP_BC	/;"	d
OP_BCL	post/lib_powerpc/cpu_asm.h	/^#define OP_BCL	/;"	d
OP_BL	post/lib_powerpc/cpu_asm.h	/^#define OP_BL	/;"	d
OP_BLR	post/lib_powerpc/cpu_asm.h	/^#define OP_BLR	/;"	d
OP_BOOTREPLY	net/bootp.h	/^# define OP_BOOTREPLY	/;"	d
OP_BOOTREQUEST	net/bootp.h	/^# define OP_BOOTREQUEST	/;"	d
OP_CMPLW	post/lib_powerpc/cpu_asm.h	/^#define OP_CMPLW	/;"	d
OP_CMPLWI	post/lib_powerpc/cpu_asm.h	/^#define OP_CMPLWI	/;"	d
OP_CMPW	post/lib_powerpc/cpu_asm.h	/^#define OP_CMPW	/;"	d
OP_CMPWI	post/lib_powerpc/cpu_asm.h	/^#define OP_CMPWI	/;"	d
OP_CNTLZW	post/lib_powerpc/cpu_asm.h	/^#define OP_CNTLZW	/;"	d
OP_COMPARE_BUF1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_COMPARE_BUF1	/;"	d	file:
OP_COMPARE_BUF2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_COMPARE_BUF2	/;"	d	file:
OP_CRAND	post/lib_powerpc/cpu_asm.h	/^#define OP_CRAND	/;"	d
OP_CRANDC	post/lib_powerpc/cpu_asm.h	/^#define OP_CRANDC	/;"	d
OP_CREQV	post/lib_powerpc/cpu_asm.h	/^#define OP_CREQV	/;"	d
OP_CRNAND	post/lib_powerpc/cpu_asm.h	/^#define OP_CRNAND	/;"	d
OP_CRNOR	post/lib_powerpc/cpu_asm.h	/^#define OP_CRNOR	/;"	d
OP_CROR	post/lib_powerpc/cpu_asm.h	/^#define OP_CROR	/;"	d
OP_CRORC	post/lib_powerpc/cpu_asm.h	/^#define OP_CRORC	/;"	d
OP_CRXOR	post/lib_powerpc/cpu_asm.h	/^#define OP_CRXOR	/;"	d
OP_DIVW	post/lib_powerpc/cpu_asm.h	/^#define OP_DIVW	/;"	d
OP_DIVWU	post/lib_powerpc/cpu_asm.h	/^#define OP_DIVWU	/;"	d
OP_EQV	post/lib_powerpc/cpu_asm.h	/^#define OP_EQV	/;"	d
OP_ERASE_BLOCK	drivers/mtd/spi/sf_dataflash.c	/^#define OP_ERASE_BLOCK	/;"	d	file:
OP_ERASE_PAGE	drivers/mtd/spi/sf_dataflash.c	/^#define OP_ERASE_PAGE	/;"	d	file:
OP_EXTSB	post/lib_powerpc/cpu_asm.h	/^#define OP_EXTSB	/;"	d
OP_EXTSH	post/lib_powerpc/cpu_asm.h	/^#define OP_EXTSH	/;"	d
OP_FIELD	include/bedbug/ppc.h	/^enum OP_FIELD {$/;"	g
OP_FILE_EXISTS	cmd/test.c	/^#define OP_FILE_EXISTS	/;"	d	file:
OP_FLUSH	arch/arc/lib/cache.c	/^#define OP_FLUSH	/;"	d	file:
OP_INT_EQ	cmd/test.c	/^#define OP_INT_EQ	/;"	d	file:
OP_INT_GE	cmd/test.c	/^#define OP_INT_GE	/;"	d	file:
OP_INT_GT	cmd/test.c	/^#define OP_INT_GT	/;"	d	file:
OP_INT_LE	cmd/test.c	/^#define OP_INT_LE	/;"	d	file:
OP_INT_LT	cmd/test.c	/^#define OP_INT_LT	/;"	d	file:
OP_INT_NEQ	cmd/test.c	/^#define OP_INT_NEQ	/;"	d	file:
OP_INV	arch/arc/lib/cache.c	/^#define OP_INV	/;"	d	file:
OP_INVALID	cmd/test.c	/^#define OP_INVALID	/;"	d	file:
OP_INV_IC	arch/arc/lib/cache.c	/^#define OP_INV_IC	/;"	d	file:
OP_LBZ	post/lib_powerpc/cpu_asm.h	/^#define OP_LBZ	/;"	d
OP_LBZU	post/lib_powerpc/cpu_asm.h	/^#define OP_LBZU	/;"	d
OP_LBZUX	post/lib_powerpc/cpu_asm.h	/^#define OP_LBZUX	/;"	d
OP_LBZX	post/lib_powerpc/cpu_asm.h	/^#define OP_LBZX	/;"	d
OP_LHA	post/lib_powerpc/cpu_asm.h	/^#define OP_LHA	/;"	d
OP_LHAU	post/lib_powerpc/cpu_asm.h	/^#define OP_LHAU	/;"	d
OP_LHAUX	post/lib_powerpc/cpu_asm.h	/^#define OP_LHAUX	/;"	d
OP_LHAX	post/lib_powerpc/cpu_asm.h	/^#define OP_LHAX	/;"	d
OP_LHZ	post/lib_powerpc/cpu_asm.h	/^#define OP_LHZ	/;"	d
OP_LHZU	post/lib_powerpc/cpu_asm.h	/^#define OP_LHZU	/;"	d
OP_LHZUX	post/lib_powerpc/cpu_asm.h	/^#define OP_LHZUX	/;"	d
OP_LHZX	post/lib_powerpc/cpu_asm.h	/^#define OP_LHZX	/;"	d
OP_LMW	post/lib_powerpc/cpu_asm.h	/^#define OP_LMW	/;"	d
OP_LSWI	post/lib_powerpc/cpu_asm.h	/^#define OP_LSWI	/;"	d
OP_LSWX	post/lib_powerpc/cpu_asm.h	/^#define OP_LSWX	/;"	d
OP_LWZ	post/lib_powerpc/cpu_asm.h	/^#define OP_LWZ	/;"	d
OP_LWZU	post/lib_powerpc/cpu_asm.h	/^#define OP_LWZU	/;"	d
OP_LWZUX	post/lib_powerpc/cpu_asm.h	/^#define OP_LWZUX	/;"	d
OP_LWZX	post/lib_powerpc/cpu_asm.h	/^#define OP_LWZX	/;"	d
OP_MCRF	post/lib_powerpc/cpu_asm.h	/^#define OP_MCRF	/;"	d
OP_MCRXR	post/lib_powerpc/cpu_asm.h	/^#define OP_MCRXR	/;"	d
OP_MFCR	post/lib_powerpc/cpu_asm.h	/^#define OP_MFCR	/;"	d
OP_MFCTR	post/lib_powerpc/cpu_asm.h	/^#define OP_MFCTR	/;"	d
OP_MFLR	post/lib_powerpc/cpu_asm.h	/^#define OP_MFLR	/;"	d
OP_MFXER	post/lib_powerpc/cpu_asm.h	/^#define OP_MFXER	/;"	d
OP_MREAD_BUFFER1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_MREAD_BUFFER1	/;"	d	file:
OP_MREAD_BUFFER2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_MREAD_BUFFER2	/;"	d	file:
OP_MTCR	post/lib_powerpc/cpu_asm.h	/^#define OP_MTCR	/;"	d
OP_MTCTR	post/lib_powerpc/cpu_asm.h	/^#define OP_MTCTR	/;"	d
OP_MTLR	post/lib_powerpc/cpu_asm.h	/^#define OP_MTLR	/;"	d
OP_MTXER	post/lib_powerpc/cpu_asm.h	/^#define OP_MTXER	/;"	d
OP_MULHW	post/lib_powerpc/cpu_asm.h	/^#define OP_MULHW	/;"	d
OP_MULHWU	post/lib_powerpc/cpu_asm.h	/^#define OP_MULHWU	/;"	d
OP_MULLW	post/lib_powerpc/cpu_asm.h	/^#define OP_MULLW	/;"	d
OP_MWERASE_BUFFER1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_MWERASE_BUFFER1	/;"	d	file:
OP_MWERASE_BUFFER2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_MWERASE_BUFFER2	/;"	d	file:
OP_MWRITE_BUFFER1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_MWRITE_BUFFER1	/;"	d	file:
OP_MWRITE_BUFFER2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_MWRITE_BUFFER2	/;"	d	file:
OP_NAND	post/lib_powerpc/cpu_asm.h	/^#define OP_NAND	/;"	d
OP_NEG	post/lib_powerpc/cpu_asm.h	/^#define OP_NEG	/;"	d
OP_NOR	post/lib_powerpc/cpu_asm.h	/^#define OP_NOR	/;"	d
OP_NOT	cmd/test.c	/^#define OP_NOT	/;"	d	file:
OP_OR	cmd/test.c	/^#define OP_OR	/;"	d	file:
OP_OR	post/lib_powerpc/cpu_asm.h	/^#define OP_OR	/;"	d
OP_ORC	post/lib_powerpc/cpu_asm.h	/^#define OP_ORC	/;"	d
OP_ORI	post/lib_powerpc/cpu_asm.h	/^#define OP_ORI	/;"	d
OP_ORIS	post/lib_powerpc/cpu_asm.h	/^#define OP_ORIS	/;"	d
OP_PCLID_BLOB	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_BLOB	/;"	d
OP_PCLID_DSA_SIGN	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_DSA_SIGN	/;"	d
OP_PCLID_DSA_VERIFY	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_DSA_VERIFY	/;"	d
OP_PCLID_MASK	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_MASK	/;"	d
OP_PCLID_MP_PRIV_KEY	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_MP_PRIV_KEY	/;"	d
OP_PCLID_MP_PUB_KEY	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_MP_PUB_KEY	/;"	d
OP_PCLID_MP_SIGN	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_MP_SIGN	/;"	d
OP_PCLID_PUBLICKEYPAIR	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_PUBLICKEYPAIR	/;"	d
OP_PCLID_SECMEM	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_SECMEM	/;"	d
OP_PCLID_SECRETKEY	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_SECRETKEY	/;"	d
OP_PCLID_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_PCLID_SHIFT	/;"	d
OP_PROGRAM_VIA_BUF1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_PROGRAM_VIA_BUF1	/;"	d	file:
OP_PROGRAM_VIA_BUF2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_PROGRAM_VIA_BUF2	/;"	d	file:
OP_PROTINFO_ECC_DL	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_ECC_DL	/;"	d
OP_PROTINFO_EKT_Z	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_EKT_Z	/;"	d
OP_PROTINFO_ENC_PRI	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_ENC_PRI	/;"	d
OP_PROTINFO_ENC_Z	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_ENC_Z	/;"	d
OP_PROTINFO_EXT_PRI	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_EXT_PRI	/;"	d
OP_PROTINFO_F2M_FP	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_F2M_FP	/;"	d
OP_PROTINFO_HASH_MD5	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_HASH_MD5	/;"	d
OP_PROTINFO_HASH_SHA1	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_HASH_SHA1	/;"	d
OP_PROTINFO_HASH_SHA224	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_HASH_SHA224	/;"	d
OP_PROTINFO_HASH_SHA256	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_HASH_SHA256	/;"	d
OP_PROTINFO_HASH_SHA384	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_HASH_SHA384	/;"	d
OP_PROTINFO_HASH_SHA512	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_HASH_SHA512	/;"	d
OP_PROTINFO_MES_REP	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_MES_REP	/;"	d
OP_PROTINFO_TEST	drivers/crypto/fsl/desc.h	/^#define OP_PROTINFO_TEST	/;"	d
OP_READ_BUFFER1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_BUFFER1	/;"	d	file:
OP_READ_BUFFER2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_BUFFER2	/;"	d	file:
OP_READ_CONTINUOUS	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_CONTINUOUS	/;"	d	file:
OP_READ_ID	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_ID	/;"	d	file:
OP_READ_PAGE	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_PAGE	/;"	d	file:
OP_READ_SECURITY	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_SECURITY	/;"	d	file:
OP_READ_STATUS	drivers/mtd/spi/sf_dataflash.c	/^#define OP_READ_STATUS	/;"	d	file:
OP_REWRITE_VIA_BUF1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_REWRITE_VIA_BUF1	/;"	d	file:
OP_REWRITE_VIA_BUF2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_REWRITE_VIA_BUF2	/;"	d	file:
OP_RLWIMI	post/lib_powerpc/cpu_asm.h	/^#define OP_RLWIMI	/;"	d
OP_RLWINM	post/lib_powerpc/cpu_asm.h	/^#define OP_RLWINM	/;"	d
OP_RLWNM	post/lib_powerpc/cpu_asm.h	/^#define OP_RLWNM	/;"	d
OP_SLW	post/lib_powerpc/cpu_asm.h	/^#define OP_SLW	/;"	d
OP_SRAW	post/lib_powerpc/cpu_asm.h	/^#define OP_SRAW	/;"	d
OP_SRAWI	post/lib_powerpc/cpu_asm.h	/^#define OP_SRAWI	/;"	d
OP_SRW	post/lib_powerpc/cpu_asm.h	/^#define OP_SRW	/;"	d
OP_STB	post/lib_powerpc/cpu_asm.h	/^#define OP_STB	/;"	d
OP_STBU	post/lib_powerpc/cpu_asm.h	/^#define OP_STBU	/;"	d
OP_STBUX	post/lib_powerpc/cpu_asm.h	/^#define OP_STBUX	/;"	d
OP_STBX	post/lib_powerpc/cpu_asm.h	/^#define OP_STBX	/;"	d
OP_STH	post/lib_powerpc/cpu_asm.h	/^#define OP_STH	/;"	d
OP_STHU	post/lib_powerpc/cpu_asm.h	/^#define OP_STHU	/;"	d
OP_STHUX	post/lib_powerpc/cpu_asm.h	/^#define OP_STHUX	/;"	d
OP_STHX	post/lib_powerpc/cpu_asm.h	/^#define OP_STHX	/;"	d
OP_STMW	post/lib_powerpc/cpu_asm.h	/^#define OP_STMW	/;"	d
OP_STR_EMPTY	cmd/test.c	/^#define OP_STR_EMPTY	/;"	d	file:
OP_STR_EQ	cmd/test.c	/^#define OP_STR_EQ	/;"	d	file:
OP_STR_GT	cmd/test.c	/^#define OP_STR_GT	/;"	d	file:
OP_STR_LT	cmd/test.c	/^#define OP_STR_LT	/;"	d	file:
OP_STR_NEMPTY	cmd/test.c	/^#define OP_STR_NEMPTY	/;"	d	file:
OP_STR_NEQ	cmd/test.c	/^#define OP_STR_NEQ	/;"	d	file:
OP_STSWI	post/lib_powerpc/cpu_asm.h	/^#define OP_STSWI	/;"	d
OP_STSWX	post/lib_powerpc/cpu_asm.h	/^#define OP_STSWX	/;"	d
OP_STW	post/lib_powerpc/cpu_asm.h	/^#define OP_STW	/;"	d
OP_STWU	post/lib_powerpc/cpu_asm.h	/^#define OP_STWU	/;"	d
OP_STWUX	post/lib_powerpc/cpu_asm.h	/^#define OP_STWUX	/;"	d
OP_STWX	post/lib_powerpc/cpu_asm.h	/^#define OP_STWX	/;"	d
OP_SUBF	post/lib_powerpc/cpu_asm.h	/^#define OP_SUBF	/;"	d
OP_SUBFC	post/lib_powerpc/cpu_asm.h	/^#define OP_SUBFC	/;"	d
OP_SUBFE	post/lib_powerpc/cpu_asm.h	/^#define OP_SUBFE	/;"	d
OP_SUBFME	post/lib_powerpc/cpu_asm.h	/^#define OP_SUBFME	/;"	d
OP_SUBFZE	post/lib_powerpc/cpu_asm.h	/^#define OP_SUBFZE	/;"	d
OP_SWAP	drivers/misc/swap_case.c	/^	OP_SWAP,$/;"	e	enum:swap_case_op	file:
OP_TO_LOWER	drivers/misc/swap_case.c	/^	OP_TO_LOWER,$/;"	e	enum:swap_case_op	file:
OP_TO_STR	tools/buildman/kconfiglib.py	/^OP_TO_STR = {AND: " && ", OR: " || ", EQUAL: " = ", UNEQUAL: " != "}$/;"	v
OP_TO_UPPER	drivers/misc/swap_case.c	/^	OP_TO_UPPER,$/;"	e	enum:swap_case_op	file:
OP_TRANSFER_BUF1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_TRANSFER_BUF1	/;"	d	file:
OP_TRANSFER_BUF2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_TRANSFER_BUF2	/;"	d	file:
OP_TYPE_CLASS1_ALG	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_CLASS1_ALG	/;"	d
OP_TYPE_CLASS2_ALG	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_CLASS2_ALG	/;"	d
OP_TYPE_DECAP_PROTOCOL	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_DECAP_PROTOCOL	/;"	d
OP_TYPE_ENCAP_PROTOCOL	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_ENCAP_PROTOCOL	/;"	d
OP_TYPE_MASK	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_MASK	/;"	d
OP_TYPE_PK	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_PK	/;"	d
OP_TYPE_SHIFT	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_SHIFT	/;"	d
OP_TYPE_UNI_PROTOCOL	drivers/crypto/fsl/desc.h	/^#define OP_TYPE_UNI_PROTOCOL	/;"	d
OP_T_THRES	arch/x86/lib/string.c	/^#define	OP_T_THRES	/;"	d	file:
OP_WRITE_BUFFER1	drivers/mtd/spi/sf_dataflash.c	/^#define OP_WRITE_BUFFER1	/;"	d	file:
OP_WRITE_BUFFER2	drivers/mtd/spi/sf_dataflash.c	/^#define OP_WRITE_BUFFER2	/;"	d	file:
OP_WRITE_SECURITY	drivers/mtd/spi/sf_dataflash.c	/^#define OP_WRITE_SECURITY	/;"	d	file:
OP_WRITE_SECURITY_REVC	drivers/mtd/spi/sf_dataflash.c	/^#define OP_WRITE_SECURITY_REVC	/;"	d	file:
OP_XOR	post/lib_powerpc/cpu_asm.h	/^#define OP_XOR	/;"	d
OP_XORI	post/lib_powerpc/cpu_asm.h	/^#define OP_XORI	/;"	d
OP_XORIS	post/lib_powerpc/cpu_asm.h	/^#define OP_XORIS	/;"	d
OR	tools/buildman/kconfiglib.py	/^AND, OR, NOT, EQUAL, UNEQUAL = range(5)$/;"	v
OR0	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR0	/;"	d
OR1	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR1	/;"	d
OR12_ADDR32	board/renesas/sh7753evb/spi-boot.c	/^#define OR12_ADDR32	/;"	d	file:
OR2	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR2	/;"	d
OR3	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR3	/;"	d
OR4	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR4	/;"	d
OR5	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR5	/;"	d
OR6	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR6	/;"	d
OR7	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR7	/;"	d
ORANGE_LED	board/Seagate/dockstar/dockstar.c	/^#define ORANGE_LED	/;"	d	file:
ORANGE_LED	board/Seagate/goflexhome/goflexhome.c	/^#define ORANGE_LED	/;"	d	file:
ORBITA_1553B	include/ambapp_ids.h	/^#define ORBITA_1553B /;"	d
ORBITA_429	include/ambapp_ids.h	/^#define ORBITA_429 /;"	d
ORBITA_COLORLCD	include/ambapp_ids.h	/^#define ORBITA_COLORLCD /;"	d
ORBITA_CRYPTO	include/ambapp_ids.h	/^#define ORBITA_CRYPTO /;"	d
ORBITA_DSP	include/ambapp_ids.h	/^#define ORBITA_DSP /;"	d
ORBITA_I2C	include/ambapp_ids.h	/^#define ORBITA_I2C /;"	d
ORBITA_PCI	include/ambapp_ids.h	/^#define ORBITA_PCI /;"	d
ORBITA_PIO	include/ambapp_ids.h	/^#define ORBITA_PIO /;"	d
ORBITA_RTC	include/ambapp_ids.h	/^#define ORBITA_RTC /;"	d
ORBITA_SDCARD	include/ambapp_ids.h	/^#define ORBITA_SDCARD /;"	d
ORBITA_SMARTCARD	include/ambapp_ids.h	/^#define ORBITA_SMARTCARD /;"	d
ORBITA_SPI	include/ambapp_ids.h	/^#define ORBITA_SPI /;"	d
ORBITA_SYSIF	include/ambapp_ids.h	/^#define ORBITA_SYSIF /;"	d
ORBITA_UART16550	include/ambapp_ids.h	/^#define ORBITA_UART16550 /;"	d
ORBITA_USBDEV	include/ambapp_ids.h	/^#define ORBITA_USBDEV /;"	d
ORBITA_USBHOST	include/ambapp_ids.h	/^#define ORBITA_USBHOST /;"	d
ORBITA_devices	cmd/ambapp.c	/^static ambapp_device_name ORBITA_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
ORD	post/lib_powerpc/fpu/compare-fp-1.c	/^#define ORD(/;"	d	file:
ORF	include/sym53c8xx.h	/^  #define   ORF /;"	d
ORF1	include/sym53c8xx.h	/^  #define   ORF1 /;"	d
ORIGIN	arch/arm/cpu/arm1136/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds	/^MEMORY { .nor : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/arm/cpu/armv7/am33xx/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/arm/cpu/armv7/omap-common/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/arm/cpu/armv7/sunxi/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/arm/cpu/armv8/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,$/;"	s
ORIGIN	arch/arm/mach-at91/arm926ejs/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \\$/;"	s
ORIGIN	arch/arm/mach-at91/armv7/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \\$/;"	s
ORIGIN	arch/arm/mach-zynq/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	arch/blackfin/cpu/init.lds.S	/^	l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE$/;"	s
ORIGIN	arch/blackfin/cpu/u-boot.lds	/^	ram     : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN$/;"	s
ORIGIN	arch/mips/cpu/u-boot-spl.lds	/^MEMORY { .spl_mem : ORIGIN = CONFIG_SPL_TEXT_BASE, \\$/;"	s
ORIGIN	arch/openrisc/cpu/u-boot.lds	/^	vectors	: ORIGIN = 0, LENGTH = 0x2000$/;"	s
ORIGIN	arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds	/^	sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,$/;"	s
ORIGIN	arch/powerpc/cpu/ppc4xx/u-boot-spl.lds	/^	sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,$/;"	s
ORIGIN	board/Barix/ipam390/u-boot-spl-ipam390.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	board/davinci/da8xxevm/u-boot-spl-da850evm.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\\$/;"	s
ORIGIN	board/samsung/common/exynos-uboot-spl.lds	/^MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \\$/;"	s
ORIGIN	spl/u-boot-spl.lds	/^MEMORY { .sram : ORIGIN = 0x40, LENGTH = 0x5fc0 }$/;"	s
ORIG_EAX	arch/x86/include/asm/ptrace.h	/^#define ORIG_EAX /;"	d
ORIG_GPR3	include/ppc_defs.h	/^#define	ORIG_GPR3	/;"	d
ORIG_NAME	lib/gunzip.c	/^#define ORIG_NAME	/;"	d	file:
ORIG_ROOT_DEV	arch/sh/include/asm/zimage.h	/^#define ORIG_ROOT_DEV	/;"	d
ORIG_VIDEO_COLS	include/linux/screen_info.h	/^#define ORIG_VIDEO_COLS /;"	d
ORIG_VIDEO_EGA_BX	include/linux/screen_info.h	/^#define ORIG_VIDEO_EGA_BX	/;"	d
ORIG_VIDEO_ISVGA	include/linux/screen_info.h	/^#define ORIG_VIDEO_ISVGA	/;"	d
ORIG_VIDEO_LINES	include/linux/screen_info.h	/^#define ORIG_VIDEO_LINES	/;"	d
ORIG_VIDEO_MODE	include/linux/screen_info.h	/^#define ORIG_VIDEO_MODE	/;"	d
ORIG_VIDEO_POINTS	include/linux/screen_info.h	/^#define ORIG_VIDEO_POINTS /;"	d
ORIG_X	include/linux/screen_info.h	/^#define ORIG_X	/;"	d
ORIG_Y	include/linux/screen_info.h	/^#define ORIG_Y	/;"	d
ORION5X	arch/arm/Kconfig	/^config ORION5X$/;"	c	choice:ARM architecture""choice031ab9020104
ORION5XGBE_PORT_SERIAL_CONTROL1_REG	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5XGBE_PORT_SERIAL_CONTROL1_REG(/;"	d
ORION5X_ADR_BOOTROM	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_BOOTROM	/;"	d
ORION5X_ADR_DEV_CS0	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_DEV_CS0	/;"	d
ORION5X_ADR_DEV_CS1	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_DEV_CS1	/;"	d
ORION5X_ADR_DEV_CS2	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_DEV_CS2	/;"	d
ORION5X_ADR_PCIE_IO	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCIE_IO	/;"	d
ORION5X_ADR_PCIE_IO_REMAP_HI	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCIE_IO_REMAP_HI	/;"	d
ORION5X_ADR_PCIE_IO_REMAP_LO	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCIE_IO_REMAP_LO	/;"	d
ORION5X_ADR_PCIE_MEM	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCIE_MEM	/;"	d
ORION5X_ADR_PCIE_MEM_REMAP_HI	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCIE_MEM_REMAP_HI	/;"	d
ORION5X_ADR_PCIE_MEM_REMAP_LO	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCIE_MEM_REMAP_LO	/;"	d
ORION5X_ADR_PCI_IO	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCI_IO	/;"	d
ORION5X_ADR_PCI_MEM	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_ADR_PCI_MEM	/;"	d
ORION5X_ATTR_BOOTROM	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_BOOTROM = 0x0f$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DEV_CS0	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DEV_CS0 = 0x1e,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DEV_CS1	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DEV_CS1 = 0x1d,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DEV_CS2	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DEV_CS2 = 0x1b,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DRAM_CS0	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DRAM_CS0 = 0x0e,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DRAM_CS1	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DRAM_CS1 = 0x0d,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DRAM_CS2	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DRAM_CS2 = 0x0b,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_DRAM_CS3	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_DRAM_CS3 = 0x07,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_PCIE_IO	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_PCIE_IO = 0x51,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_PCIE_MEM	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_PCIE_MEM = 0x59,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_PCI_IO	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_PCI_IO = 0x51,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_PCI_MEM	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_PCI_MEM = 0x59,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_ATTR_SASRAM	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_ATTR_SASRAM = 0x00,$/;"	e	enum:orion5x_cpu_attrib
ORION5X_CPU_REG_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_CPU_REG_BASE	/;"	d
ORION5X_CPU_WIN_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_CPU_WIN_BASE	/;"	d
ORION5X_CPU_WIN_CTRL_DATA	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_CPU_WIN_CTRL_DATA(/;"	d
ORION5X_DRAM_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_DRAM_BASE	/;"	d
ORION5X_EGIGA_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_EGIGA_BASE	/;"	d
ORION5X_GPIO_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_GPIO_BASE	/;"	d
ORION5X_GPIO_IN_POLARITY	include/configs/edminiv2.h	/^#define ORION5X_GPIO_IN_POLARITY	/;"	d
ORION5X_GPIO_OUT_ENABLE	include/configs/edminiv2.h	/^#define ORION5X_GPIO_OUT_ENABLE	/;"	d
ORION5X_GPIO_OUT_VALUE	include/configs/edminiv2.h	/^#define ORION5X_GPIO_OUT_VALUE	/;"	d
ORION5X_MPP0_7	include/configs/edminiv2.h	/^#define ORION5X_MPP0_7	/;"	d
ORION5X_MPP16_23	include/configs/edminiv2.h	/^#define ORION5X_MPP16_23	/;"	d
ORION5X_MPP8_15	include/configs/edminiv2.h	/^#define ORION5X_MPP8_15	/;"	d
ORION5X_MPP_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_MPP_BASE	/;"	d
ORION5X_REGISTER	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_REGISTER(/;"	d
ORION5X_REGS_PHY_BASE	arch/arm/mach-orion5x/include/mach/mv88f5182.h	/^#define ORION5X_REGS_PHY_BASE	/;"	d
ORION5X_REG_PCIE_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_REG_PCIE_BASE	/;"	d
ORION5X_REG_PCI_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_REG_PCI_BASE	/;"	d
ORION5X_SATA_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_SATA_BASE	/;"	d
ORION5X_SATA_PORT0_OFFSET	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_SATA_PORT0_OFFSET	/;"	d
ORION5X_SATA_PORT1_OFFSET	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_SATA_PORT1_OFFSET	/;"	d
ORION5X_SZ_BOOTROM	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_BOOTROM	/;"	d
ORION5X_SZ_DEV_CS0	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_DEV_CS0	/;"	d
ORION5X_SZ_DEV_CS1	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_DEV_CS1	/;"	d
ORION5X_SZ_DEV_CS2	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_DEV_CS2	/;"	d
ORION5X_SZ_PCIE_IO	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_PCIE_IO	/;"	d
ORION5X_SZ_PCIE_MEM	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_PCIE_MEM	/;"	d
ORION5X_SZ_PCI_IO	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_PCI_IO	/;"	d
ORION5X_SZ_PCI_MEM	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define ORION5X_SZ_PCI_MEM	/;"	d
ORION5X_TARGET_DEVICE	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_TARGET_DEVICE = 1,$/;"	e	enum:orion5x_cpu_target
ORION5X_TARGET_DRAM	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_TARGET_DRAM = 0,$/;"	e	enum:orion5x_cpu_target
ORION5X_TARGET_PCI	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_TARGET_PCI = 3,$/;"	e	enum:orion5x_cpu_target
ORION5X_TARGET_PCIE	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_TARGET_PCIE = 4,$/;"	e	enum:orion5x_cpu_target
ORION5X_TARGET_SASRAM	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_TARGET_SASRAM = 9$/;"	e	enum:orion5x_cpu_target
ORION5X_TIMER_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_TIMER_BASE	/;"	d
ORION5X_TWSI_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_TWSI_BASE	/;"	d
ORION5X_UART0_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_UART0_BASE	/;"	d
ORION5X_UART1_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_UART1_BASE	/;"	d
ORION5X_USB20_HOST_PORT_BASE	include/configs/edminiv2.h	/^#define ORION5X_USB20_HOST_PORT_BASE /;"	d
ORION5X_USB20_PORT0_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_USB20_PORT0_BASE	/;"	d
ORION5X_USB20_PORT1_BASE	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define ORION5X_USB20_PORT1_BASE	/;"	d
ORION5X_WIN_DISABLE	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_WIN_DISABLE,$/;"	e	enum:orion5x_cpu_winen
ORION5X_WIN_ENABLE	arch/arm/mach-orion5x/include/mach/cpu.h	/^	ORION5X_WIN_ENABLE$/;"	e	enum:orion5x_cpu_winen
OR_ACS_10	include/mpc5xx.h	/^#define OR_ACS_10	/;"	d
OR_ACS_DIV1	include/mpc8xx.h	/^#define OR_ACS_DIV1	/;"	d
OR_ACS_DIV2	include/mpc8xx.h	/^#define OR_ACS_DIV2	/;"	d
OR_ACS_DIV4	include/mpc8xx.h	/^#define OR_ACS_DIV4	/;"	d
OR_ACS_MSK	include/mpc8xx.h	/^#define OR_ACS_MSK	/;"	d
OR_ADDR_MK_FF	include/mpc5xx.h	/^#define OR_ADDR_MK_FF	/;"	d
OR_ADDR_MK_FFFF	include/mpc5xx.h	/^#define OR_ADDR_MK_FFFF	/;"	d
OR_AM_128KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_128KB	/;"	d
OR_AM_128MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_128MB	/;"	d
OR_AM_16MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_16MB	/;"	d
OR_AM_1GB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_1GB	/;"	d
OR_AM_1MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_1MB	/;"	d
OR_AM_256KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_256KB	/;"	d
OR_AM_256MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_256MB	/;"	d
OR_AM_2GB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_2GB	/;"	d
OR_AM_2MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_2MB	/;"	d
OR_AM_32KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_32KB	/;"	d
OR_AM_32MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_32MB	/;"	d
OR_AM_4GB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_4GB	/;"	d
OR_AM_4MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_4MB	/;"	d
OR_AM_512KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_512KB	/;"	d
OR_AM_512MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_512MB	/;"	d
OR_AM_64KB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_64KB	/;"	d
OR_AM_64MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_64MB	/;"	d
OR_AM_8MB	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_AM_8MB	/;"	d
OR_AM_MSK	include/mpc8xx.h	/^#define OR_AM_MSK	/;"	d
OR_ATM_MSK	include/mpc8xx.h	/^#define OR_ATM_MSK	/;"	d
OR_BI	include/mpc8xx.h	/^#define OR_BI	/;"	d
OR_BSCY	include/mpc5xx.h	/^#define OR_BSCY	/;"	d
OR_CSNT	include/mpc5xx.h	/^#define OR_CSNT	/;"	d
OR_CSNT_SAM	include/mpc8xx.h	/^#define OR_CSNT_SAM	/;"	d
OR_EHTR	include/mpc8xx.h	/^#define OR_EHTR	/;"	d
OR_ETHR	include/mpc5xx.h	/^#define OR_ETHR	/;"	d
OR_FCM_AM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_AM	/;"	d
OR_FCM_AM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_AM_SHIFT	/;"	d
OR_FCM_BCTLD	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_BCTLD	/;"	d
OR_FCM_BCTLD_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_BCTLD_SHIFT	/;"	d
OR_FCM_CHT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_CHT	/;"	d
OR_FCM_CHT_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_CHT_SHIFT	/;"	d
OR_FCM_CSCT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_CSCT	/;"	d
OR_FCM_CSCT_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_CSCT_SHIFT	/;"	d
OR_FCM_CST	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_CST	/;"	d
OR_FCM_CST_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_CST_SHIFT	/;"	d
OR_FCM_EHTR	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_EHTR	/;"	d
OR_FCM_EHTR_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_EHTR_SHIFT	/;"	d
OR_FCM_PGS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_PGS	/;"	d
OR_FCM_PGS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_PGS_SHIFT	/;"	d
OR_FCM_RST	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_RST	/;"	d
OR_FCM_RST_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_RST_SHIFT	/;"	d
OR_FCM_SCY	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY	/;"	d
OR_FCM_SCY_1	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_1	/;"	d
OR_FCM_SCY_2	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_2	/;"	d
OR_FCM_SCY_3	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_3	/;"	d
OR_FCM_SCY_4	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_4	/;"	d
OR_FCM_SCY_5	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_5	/;"	d
OR_FCM_SCY_6	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_6	/;"	d
OR_FCM_SCY_7	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_7	/;"	d
OR_FCM_SCY_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_SCY_SHIFT	/;"	d
OR_FCM_TRLX	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_TRLX	/;"	d
OR_FCM_TRLX_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_TRLX_SHIFT	/;"	d
OR_FCM_XAM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_XAM	/;"	d
OR_FCM_XAM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_FCM_XAM_SHIFT	/;"	d
OR_G5LA	include/mpc8xx.h	/^#define OR_G5LA	/;"	d
OR_G5LS	include/mpc8xx.h	/^#define OR_G5LS	/;"	d
OR_GPCM_ACS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_ACS	/;"	d
OR_GPCM_ACS_DIV2	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_ACS_DIV2	/;"	d
OR_GPCM_ACS_DIV4	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_ACS_DIV4	/;"	d
OR_GPCM_ACS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_ACS_SHIFT	/;"	d
OR_GPCM_AM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_AM	/;"	d
OR_GPCM_AM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_AM_SHIFT	/;"	d
OR_GPCM_BCTLD	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_BCTLD	/;"	d
OR_GPCM_BCTLD_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_BCTLD_SHIFT	/;"	d
OR_GPCM_CSNT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_CSNT	/;"	d
OR_GPCM_CSNT_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_CSNT_SHIFT	/;"	d
OR_GPCM_EAD	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_EAD	/;"	d
OR_GPCM_EAD_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_EAD_SHIFT	/;"	d
OR_GPCM_EHTR	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_EHTR	/;"	d
OR_GPCM_EHTR_CLEAR	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_EHTR_CLEAR	/;"	d
OR_GPCM_EHTR_SET	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_EHTR_SET	/;"	d
OR_GPCM_EHTR_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_EHTR_SHIFT	/;"	d
OR_GPCM_SCY	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY	/;"	d
OR_GPCM_SCY_1	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_1	/;"	d
OR_GPCM_SCY_10	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_10	/;"	d
OR_GPCM_SCY_11	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_11	/;"	d
OR_GPCM_SCY_12	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_12	/;"	d
OR_GPCM_SCY_13	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_13	/;"	d
OR_GPCM_SCY_14	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_14	/;"	d
OR_GPCM_SCY_15	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_15	/;"	d
OR_GPCM_SCY_2	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_2	/;"	d
OR_GPCM_SCY_3	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_3	/;"	d
OR_GPCM_SCY_4	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_4	/;"	d
OR_GPCM_SCY_5	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_5	/;"	d
OR_GPCM_SCY_6	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_6	/;"	d
OR_GPCM_SCY_7	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_7	/;"	d
OR_GPCM_SCY_8	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_8	/;"	d
OR_GPCM_SCY_9	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_9	/;"	d
OR_GPCM_SCY_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SCY_SHIFT	/;"	d
OR_GPCM_SETA	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SETA	/;"	d
OR_GPCM_SETA_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_SETA_SHIFT	/;"	d
OR_GPCM_TRLX	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_TRLX	/;"	d
OR_GPCM_TRLX_CLEAR	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_TRLX_CLEAR	/;"	d
OR_GPCM_TRLX_SET	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_TRLX_SET	/;"	d
OR_GPCM_TRLX_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_TRLX_SHIFT	/;"	d
OR_GPCM_XACS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_XACS	/;"	d
OR_GPCM_XACS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_XACS_SHIFT	/;"	d
OR_GPCM_XAM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_XAM	/;"	d
OR_GPCM_XAM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_GPCM_XAM_SHIFT	/;"	d
OR_SCY_0_CLK	include/mpc8xx.h	/^#define OR_SCY_0_CLK	/;"	d
OR_SCY_1	include/mpc5xx.h	/^#define OR_SCY_1	/;"	d
OR_SCY_10_CLK	include/mpc8xx.h	/^#define OR_SCY_10_CLK	/;"	d
OR_SCY_11_CLK	include/mpc8xx.h	/^#define OR_SCY_11_CLK	/;"	d
OR_SCY_12_CLK	include/mpc8xx.h	/^#define OR_SCY_12_CLK	/;"	d
OR_SCY_13_CLK	include/mpc8xx.h	/^#define OR_SCY_13_CLK	/;"	d
OR_SCY_14_CLK	include/mpc8xx.h	/^#define OR_SCY_14_CLK	/;"	d
OR_SCY_15_CLK	include/mpc8xx.h	/^#define OR_SCY_15_CLK	/;"	d
OR_SCY_1_CLK	include/mpc8xx.h	/^#define OR_SCY_1_CLK	/;"	d
OR_SCY_2_CLK	include/mpc8xx.h	/^#define OR_SCY_2_CLK	/;"	d
OR_SCY_3	include/mpc5xx.h	/^#define OR_SCY_3	/;"	d
OR_SCY_3_CLK	include/mpc8xx.h	/^#define OR_SCY_3_CLK	/;"	d
OR_SCY_4_CLK	include/mpc8xx.h	/^#define OR_SCY_4_CLK	/;"	d
OR_SCY_5_CLK	include/mpc8xx.h	/^#define OR_SCY_5_CLK	/;"	d
OR_SCY_6_CLK	include/mpc8xx.h	/^#define OR_SCY_6_CLK	/;"	d
OR_SCY_7_CLK	include/mpc8xx.h	/^#define OR_SCY_7_CLK	/;"	d
OR_SCY_8	include/mpc5xx.h	/^#define OR_SCY_8	/;"	d
OR_SCY_8_CLK	include/mpc8xx.h	/^#define OR_SCY_8_CLK	/;"	d
OR_SCY_9_CLK	include/mpc8xx.h	/^#define OR_SCY_9_CLK	/;"	d
OR_SCY_MSK	include/mpc8xx.h	/^#define OR_SCY_MSK	/;"	d
OR_SDRAM_AM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_AM	/;"	d
OR_SDRAM_AM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_AM_SHIFT	/;"	d
OR_SDRAM_COLS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_COLS	/;"	d
OR_SDRAM_COLS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_COLS_SHIFT	/;"	d
OR_SDRAM_EAD	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_EAD	/;"	d
OR_SDRAM_EAD_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_EAD_SHIFT	/;"	d
OR_SDRAM_MIN_COLS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_MIN_COLS	/;"	d
OR_SDRAM_MIN_ROWS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_MIN_ROWS	/;"	d
OR_SDRAM_PMSEL	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_PMSEL	/;"	d
OR_SDRAM_PMSEL_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_PMSEL_SHIFT	/;"	d
OR_SDRAM_ROWS	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_ROWS	/;"	d
OR_SDRAM_ROWS_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_ROWS_SHIFT	/;"	d
OR_SDRAM_XAM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_XAM	/;"	d
OR_SDRAM_XAM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_SDRAM_XAM_SHIFT	/;"	d
OR_SETA	include/mpc8xx.h	/^#define OR_SETA	/;"	d
OR_TRLX	include/mpc5xx.h	/^#define OR_TRLX	/;"	d
OR_TRLX	include/mpc8xx.h	/^#define OR_TRLX	/;"	d
OR_UPM_AM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_AM	/;"	d
OR_UPM_AM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_AM_SHIFT	/;"	d
OR_UPM_BCTLD	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_BCTLD	/;"	d
OR_UPM_BCTLD_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_BCTLD_SHIFT	/;"	d
OR_UPM_BI	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_BI	/;"	d
OR_UPM_BI_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_BI_SHIFT	/;"	d
OR_UPM_EAD	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_EAD	/;"	d
OR_UPM_EAD_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_EAD_SHIFT	/;"	d
OR_UPM_EHTR	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_EHTR	/;"	d
OR_UPM_EHTR_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_EHTR_SHIFT	/;"	d
OR_UPM_TRLX	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_TRLX	/;"	d
OR_UPM_TRLX_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_TRLX_SHIFT	/;"	d
OR_UPM_XAM	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_XAM	/;"	d
OR_UPM_XAM_SHIFT	arch/powerpc/include/asm/fsl_lbc.h	/^#define OR_UPM_XAM_SHIFT	/;"	d
ORxG_ACS_DIV1	include/mpc8260.h	/^#define ORxG_ACS_DIV1	/;"	d
ORxG_ACS_DIV2	include/mpc8260.h	/^#define ORxG_ACS_DIV2	/;"	d
ORxG_ACS_DIV4	include/mpc8260.h	/^#define ORxG_ACS_DIV4	/;"	d
ORxG_ACS_MSK	include/mpc8260.h	/^#define ORxG_ACS_MSK	/;"	d
ORxG_AM_MSK	include/mpc8260.h	/^#define ORxG_AM_MSK	/;"	d
ORxG_BCTLD	include/mpc8260.h	/^#define ORxG_BCTLD	/;"	d
ORxG_CSNT	include/mpc8260.h	/^#define ORxG_CSNT	/;"	d
ORxG_EHTR	include/mpc8260.h	/^#define ORxG_EHTR	/;"	d
ORxG_SCY_0_CLK	include/mpc8260.h	/^#define ORxG_SCY_0_CLK	/;"	d
ORxG_SCY_10_CLK	include/mpc8260.h	/^#define ORxG_SCY_10_CLK	/;"	d
ORxG_SCY_11_CLK	include/mpc8260.h	/^#define ORxG_SCY_11_CLK	/;"	d
ORxG_SCY_12_CLK	include/mpc8260.h	/^#define ORxG_SCY_12_CLK	/;"	d
ORxG_SCY_13_CLK	include/mpc8260.h	/^#define ORxG_SCY_13_CLK	/;"	d
ORxG_SCY_14_CLK	include/mpc8260.h	/^#define ORxG_SCY_14_CLK	/;"	d
ORxG_SCY_15_CLK	include/mpc8260.h	/^#define ORxG_SCY_15_CLK	/;"	d
ORxG_SCY_1_CLK	include/mpc8260.h	/^#define ORxG_SCY_1_CLK	/;"	d
ORxG_SCY_2_CLK	include/mpc8260.h	/^#define ORxG_SCY_2_CLK	/;"	d
ORxG_SCY_3_CLK	include/mpc8260.h	/^#define ORxG_SCY_3_CLK	/;"	d
ORxG_SCY_4_CLK	include/mpc8260.h	/^#define ORxG_SCY_4_CLK	/;"	d
ORxG_SCY_5_CLK	include/mpc8260.h	/^#define ORxG_SCY_5_CLK	/;"	d
ORxG_SCY_6_CLK	include/mpc8260.h	/^#define ORxG_SCY_6_CLK	/;"	d
ORxG_SCY_7_CLK	include/mpc8260.h	/^#define ORxG_SCY_7_CLK	/;"	d
ORxG_SCY_8_CLK	include/mpc8260.h	/^#define ORxG_SCY_8_CLK	/;"	d
ORxG_SCY_9_CLK	include/mpc8260.h	/^#define ORxG_SCY_9_CLK	/;"	d
ORxG_SCY_MSK	include/mpc8260.h	/^#define ORxG_SCY_MSK	/;"	d
ORxG_SETA	include/mpc8260.h	/^#define ORxG_SETA	/;"	d
ORxG_TRLX	include/mpc8260.h	/^#define ORxG_TRLX	/;"	d
ORxS_BPD_2	include/mpc8260.h	/^#define ORxS_BPD_2	/;"	d
ORxS_BPD_4	include/mpc8260.h	/^#define ORxS_BPD_4	/;"	d
ORxS_BPD_8	include/mpc8260.h	/^#define ORxS_BPD_8	/;"	d
ORxS_BPD_MSK	include/mpc8260.h	/^#define ORxS_BPD_MSK	/;"	d
ORxS_IBID	include/mpc8260.h	/^#define ORxS_IBID	/;"	d
ORxS_LSDAM_MSK	include/mpc8260.h	/^#define ORxS_LSDAM_MSK	/;"	d
ORxS_NUMR_10	include/mpc8260.h	/^#define ORxS_NUMR_10	/;"	d
ORxS_NUMR_11	include/mpc8260.h	/^#define ORxS_NUMR_11	/;"	d
ORxS_NUMR_12	include/mpc8260.h	/^#define ORxS_NUMR_12	/;"	d
ORxS_NUMR_13	include/mpc8260.h	/^#define ORxS_NUMR_13	/;"	d
ORxS_NUMR_14	include/mpc8260.h	/^#define ORxS_NUMR_14	/;"	d
ORxS_NUMR_15	include/mpc8260.h	/^#define ORxS_NUMR_15	/;"	d
ORxS_NUMR_16	include/mpc8260.h	/^#define ORxS_NUMR_16	/;"	d
ORxS_NUMR_9	include/mpc8260.h	/^#define ORxS_NUMR_9	/;"	d
ORxS_NUMR_MSK	include/mpc8260.h	/^#define ORxS_NUMR_MSK	/;"	d
ORxS_PMSEL	include/mpc8260.h	/^#define ORxS_PMSEL	/;"	d
ORxS_ROWST_MSK	include/mpc8260.h	/^#define ORxS_ROWST_MSK	/;"	d
ORxS_ROWST_PBI0_A10	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A10 /;"	d
ORxS_ROWST_PBI0_A11	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A11 /;"	d
ORxS_ROWST_PBI0_A12	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A12 /;"	d
ORxS_ROWST_PBI0_A13	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A13 /;"	d
ORxS_ROWST_PBI0_A7	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A7 /;"	d
ORxS_ROWST_PBI0_A8	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A8 /;"	d
ORxS_ROWST_PBI0_A9	include/mpc8260.h	/^#define ORxS_ROWST_PBI0_A9 /;"	d
ORxS_ROWST_PBI1_A0	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A0 /;"	d
ORxS_ROWST_PBI1_A1	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A1 /;"	d
ORxS_ROWST_PBI1_A10	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A10 /;"	d
ORxS_ROWST_PBI1_A11	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A11 /;"	d
ORxS_ROWST_PBI1_A12	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A12 /;"	d
ORxS_ROWST_PBI1_A2	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A2 /;"	d
ORxS_ROWST_PBI1_A3	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A3 /;"	d
ORxS_ROWST_PBI1_A4	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A4 /;"	d
ORxS_ROWST_PBI1_A5	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A5 /;"	d
ORxS_ROWST_PBI1_A6	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A6 /;"	d
ORxS_ROWST_PBI1_A7	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A7 /;"	d
ORxS_ROWST_PBI1_A8	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A8 /;"	d
ORxS_ROWST_PBI1_A9	include/mpc8260.h	/^#define ORxS_ROWST_PBI1_A9 /;"	d
ORxS_SDAM_MSK	include/mpc8260.h	/^#define ORxS_SDAM_MSK	/;"	d
ORxS_SIZE_TO_AM	include/mpc8260.h	/^#define ORxS_SIZE_TO_AM(/;"	d
ORxU_AM_MSK	include/mpc8260.h	/^#define ORxU_AM_MSK	/;"	d
ORxU_BCTLD	include/mpc8260.h	/^#define ORxU_BCTLD	/;"	d
ORxU_BI	include/mpc8260.h	/^#define ORxU_BI	/;"	d
ORxU_EHTR_1IDLE	include/mpc8260.h	/^#define ORxU_EHTR_1IDLE	/;"	d
ORxU_EHTR_4IDLE	include/mpc8260.h	/^#define ORxU_EHTR_4IDLE	/;"	d
ORxU_EHTR_8IDLE	include/mpc8260.h	/^#define ORxU_EHTR_8IDLE	/;"	d
ORxU_EHTR_MSK	include/mpc8260.h	/^#define ORxU_EHTR_MSK	/;"	d
ORxU_EHTR_NORM	include/mpc8260.h	/^#define ORxU_EHTR_NORM	/;"	d
OS	lib/zlib/inflate.h	/^    OS,         \/* i: waiting for extra flags and operating system (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
OS boot interface	arch/mips/Kconfig	/^menu "OS boot interface"$/;"	m	menu:MIPS architecture
OS2	include/u-boot/zlib.h	/^#  define OS2$/;"	d
OSC	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^#define OSC	/;"	d	file:
OSC	board/BuR/brppt1/board.c	/^#define OSC	/;"	d	file:
OSC	board/BuR/brxre1/board.c	/^#define OSC	/;"	d	file:
OSC	board/birdland/bav335x/board.c	/^#define OSC	/;"	d	file:
OSC	board/bosch/shc/board.c	/^#define OSC	/;"	d	file:
OSC	board/gumstix/pepper/board.c	/^#define OSC	/;"	d	file:
OSC	board/isee/igep0033/board.c	/^#define OSC /;"	d	file:
OSC	board/phytec/pcm051/board.c	/^#define OSC	/;"	d	file:
OSC	board/siemens/common/board.c	/^#define OSC	/;"	d	file:
OSC	board/siemens/pxm2/board.c	/^#define OSC /;"	d	file:
OSC	board/silica/pengwyn/board.c	/^#define OSC	/;"	d	file:
OSC	board/tcl/sl50/board.c	/^#define OSC	/;"	d	file:
OSC	board/ti/am335x/board.c	/^#define OSC	/;"	d	file:
OSC	board/vscom/baltos/board.c	/^#define OSC	/;"	d	file:
OSC1TIMER0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER0_RESET	/;"	d
OSC1TIMER1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSC1TIMER1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define OSC1TIMER1_RESET	/;"	d
OSCC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCC	/;"	d
OSCC	include/faraday/ftpmu010.h	/^	unsigned int	OSCC;		\/* 0x08 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_EMBEDDED_COMBO_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCLK_PHY_CLKOUT_USB30_PHY	include/dt-bindings/clock/exynos7420-clk.h	/^#define OSCCLK_PHY_CLKOUT_USB30_PHY	/;"	d
OSCCON	drivers/clk/clk_pic32.c	/^#define OSCCON	/;"	d	file:
OSCC_OOK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCC_OOK	/;"	d
OSCC_OON	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCC_OON	/;"	d
OSCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR	/;"	d
OSCR	include/SA-1100.h	/^#define OSCR	/;"	d
OSCR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR10	/;"	d
OSCR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR11	/;"	d
OSCR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR4	/;"	d
OSCR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR5	/;"	d
OSCR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR6	/;"	d
OSCR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR7	/;"	d
OSCR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR8	/;"	d
OSCR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSCR9	/;"	d
OSCR_CLK_FREQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	OSCR_CLK_FREQ	/;"	d
OSCTUNE	drivers/clk/clk_pic32.c	/^#define OSCTUNE	/;"	d	file:
OSC_0_FREQ	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define OSC_0_FREQ	/;"	d	file:
OSC_24M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	OSC_24M_CLK,$/;"	e	enum:clk_root_src
OSC_32K_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	OSC_32K_CLK,$/;"	e	enum:clk_root_src
OSC_5MHZ	include/configs/adp-ag101p.h	/^#define OSC_5MHZ	/;"	d
OSC_CLK	include/configs/adp-ag101p.h	/^#define OSC_CLK	/;"	d
OSC_CLK_FREQUENCY	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define OSC_CLK_FREQUENCY	/;"	d
OSC_DRIVE_STRENGTH	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_DRIVE_STRENGTH	/;"	d
OSC_FREQ_MASK	arch/arm/include/asm/arch-tegra114/clock.h	/^#define OSC_FREQ_MASK /;"	d
OSC_FREQ_MASK	arch/arm/include/asm/arch-tegra124/clock.h	/^#define OSC_FREQ_MASK /;"	d
OSC_FREQ_MASK	arch/arm/include/asm/arch-tegra20/clock.h	/^#define OSC_FREQ_MASK /;"	d
OSC_FREQ_MASK	arch/arm/include/asm/arch-tegra210/clock.h	/^#define OSC_FREQ_MASK /;"	d
OSC_FREQ_MASK	arch/arm/include/asm/arch-tegra30/clock.h	/^#define OSC_FREQ_MASK /;"	d
OSC_FREQ_SHIFT	arch/arm/include/asm/arch-tegra114/clock.h	/^#define OSC_FREQ_SHIFT /;"	d
OSC_FREQ_SHIFT	arch/arm/include/asm/arch-tegra124/clock.h	/^#define OSC_FREQ_SHIFT /;"	d
OSC_FREQ_SHIFT	arch/arm/include/asm/arch-tegra20/clock.h	/^#define OSC_FREQ_SHIFT /;"	d
OSC_FREQ_SHIFT	arch/arm/include/asm/arch-tegra210/clock.h	/^#define OSC_FREQ_SHIFT /;"	d
OSC_FREQ_SHIFT	arch/arm/include/asm/arch-tegra30/clock.h	/^#define OSC_FREQ_SHIFT /;"	d
OSC_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define OSC_HZ	/;"	d
OSC_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define OSC_HZ	/;"	d
OSC_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define OSC_HZ	/;"	d
OSC_SRC0	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define OSC_SRC0	/;"	d	file:
OSC_SRC1	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define OSC_SRC1	/;"	d	file:
OSC_SRC_CTRL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define OSC_SRC_CTRL	/;"	d	file:
OSC_XOBP_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOBP_MASK	/;"	d
OSC_XOBP_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOBP_SHIFT	/;"	d
OSC_XOE_ENABLE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOE_ENABLE	/;"	d
OSC_XOE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOE_MASK	/;"	d
OSC_XOE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOE_SHIFT	/;"	d
OSC_XOFS_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOFS_MASK	/;"	d
OSC_XOFS_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OSC_XOFS_SHIFT	/;"	d
OSD_DH_BASE	board/gdsys/common/osd.c	/^#define OSD_DH_BASE /;"	d	file:
OSD_GET_REG	board/gdsys/common/osd.c	/^#define OSD_GET_REG(/;"	d	file:
OSD_SET_REG	board/gdsys/common/osd.c	/^#define OSD_SET_REG(/;"	d	file:
OSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define OSEL	/;"	d
OSEL_2S	arch/arm/mach-exynos/include/mach/adc.h	/^#define OSEL_2S	/;"	d
OSEL_BINARY	arch/arm/mach-exynos/include/mach/adc.h	/^#define OSEL_BINARY	/;"	d
OSEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define OSEL_P	/;"	d
OSMR	include/SA-1100.h	/^#define OSMR	/;"	d
OSMR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR0	/;"	d
OSMR0	include/SA-1100.h	/^#define OSMR0	/;"	d
OSMR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR1	/;"	d
OSMR1	include/SA-1100.h	/^#define OSMR1	/;"	d
OSMR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR10	/;"	d
OSMR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR11	/;"	d
OSMR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR2	/;"	d
OSMR2	include/SA-1100.h	/^#define OSMR2	/;"	d
OSMR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR3	/;"	d
OSMR3	include/SA-1100.h	/^#define OSMR3	/;"	d
OSMR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR4	/;"	d
OSMR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR5	/;"	d
OSMR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR6	/;"	d
OSMR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR7	/;"	d
OSMR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR8	/;"	d
OSMR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSMR9	/;"	d
OSPR_KEY_REVOC_MASK	include/fsl_sfp.h	/^#define OSPR_KEY_REVOC_MASK /;"	d
OSPR_KEY_REVOC_SHIFT	include/fsl_sfp.h	/^#define OSPR_KEY_REVOC_SHIFT /;"	d
OSSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSSR	/;"	d
OSSR	include/SA-1100.h	/^#define OSSR	/;"	d
OSSR_M	include/SA-1100.h	/^#define OSSR_M(/;"	d
OSSR_M0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSSR_M0	/;"	d
OSSR_M0	include/SA-1100.h	/^#define OSSR_M0	/;"	d
OSSR_M1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSSR_M1	/;"	d
OSSR_M1	include/SA-1100.h	/^#define OSSR_M1	/;"	d
OSSR_M2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSSR_M2	/;"	d
OSSR_M2	include/SA-1100.h	/^#define OSSR_M2	/;"	d
OSSR_M3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSSR_M3	/;"	d
OSSR_M3	include/SA-1100.h	/^#define OSSR_M3	/;"	d
OSSR_M4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OSSR_M4	/;"	d
OS_CODE	lib/zlib/zutil.h	/^#  define OS_CODE /;"	d
OS_CTRL	include/armcoremodule.h	/^#define OS_CTRL	/;"	d
OS_FILET_COUNT	include/os.h	/^	OS_FILET_COUNT,$/;"	e	enum:os_dirent_t
OS_FILET_DIR	include/os.h	/^	OS_FILET_DIR,		\/* Directory *\/$/;"	e	enum:os_dirent_t
OS_FILET_LNK	include/os.h	/^	OS_FILET_LNK,		\/* Symbolic link *\/$/;"	e	enum:os_dirent_t
OS_FILET_REG	include/os.h	/^	OS_FILET_REG,		\/* Regular file *\/$/;"	e	enum:os_dirent_t
OS_FILET_UNKNOWN	include/os.h	/^	OS_FILET_UNKNOWN,	\/* Something else *\/$/;"	e	enum:os_dirent_t
OS_INIT	include/armcoremodule.h	/^#define OS_INIT	/;"	d
OS_LOCK	include/armcoremodule.h	/^#define OS_LOCK	/;"	d
OS_LOG_MAGIC	arch/blackfin/cpu/os_log.c	/^#define OS_LOG_MAGIC /;"	d	file:
OS_LOG_MAGIC_ADDR	arch/blackfin/cpu/os_log.c	/^#define OS_LOG_MAGIC_ADDR /;"	d	file:
OS_LOG_PTR_ADDR	arch/blackfin/cpu/os_log.c	/^#define OS_LOG_PTR_ADDR /;"	d	file:
OS_O_CREAT	include/os.h	/^#define OS_O_CREAT	/;"	d
OS_O_MASK	include/os.h	/^#define OS_O_MASK	/;"	d
OS_O_RDONLY	include/os.h	/^#define OS_O_RDONLY	/;"	d
OS_O_RDWR	include/os.h	/^#define OS_O_RDWR	/;"	d
OS_O_WRONLY	include/os.h	/^#define OS_O_WRONLY	/;"	d
OS_SDRAM	include/armcoremodule.h	/^#define OS_SDRAM	/;"	d
OS_SEEK_CUR	include/os.h	/^#define OS_SEEK_CUR	/;"	d
OS_SEEK_END	include/os.h	/^#define OS_SEEK_END	/;"	d
OS_SEEK_SET	include/os.h	/^#define OS_SEEK_SET	/;"	d
OS_SPD	include/armcoremodule.h	/^#define OS_SPD	/;"	d
OTG1_DM_PULLDOWN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG1_DM_PULLDOWN	/;"	d	file:
OTG1_DM_PULLUP	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG1_DM_PULLUP	/;"	d	file:
OTG1_DP_PULLDOWN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG1_DP_PULLDOWN	/;"	d	file:
OTG1_DP_PULLUP	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG1_DP_PULLUP	/;"	d	file:
OTG1_VBUS_DRV	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG1_VBUS_DRV	/;"	d	file:
OTGCSR_A_BUSDROP	include/usb/fotg210.h	/^#define OTGCSR_A_BUSDROP /;"	d
OTGCSR_A_BUSREQ	include/usb/fotg210.h	/^#define OTGCSR_A_BUSREQ /;"	d
OTGCSR_A_HNP	include/usb/fotg210.h	/^#define OTGCSR_A_HNP /;"	d
OTGCSR_A_SESS_VLD	include/usb/fotg210.h	/^#define OTGCSR_A_SESS_VLD /;"	d
OTGCSR_A_SRPR_DATA	include/usb/fotg210.h	/^#define OTGCSR_A_SRPR_DATA /;"	d
OTGCSR_A_SRPR_VBUS	include/usb/fotg210.h	/^#define OTGCSR_A_SRPR_VBUS /;"	d
OTGCSR_A_SRP_EN	include/usb/fotg210.h	/^#define OTGCSR_A_SRP_EN /;"	d
OTGCSR_A_VBUS_VLD	include/usb/fotg210.h	/^#define OTGCSR_A_VBUS_VLD /;"	d
OTGCSR_B_BUSREQ	include/usb/fotg210.h	/^#define OTGCSR_B_BUSREQ /;"	d
OTGCSR_B_HNP	include/usb/fotg210.h	/^#define OTGCSR_B_HNP /;"	d
OTGCSR_B_SESS_END	include/usb/fotg210.h	/^#define OTGCSR_B_SESS_END /;"	d
OTGCSR_B_SESS_VLD	include/usb/fotg210.h	/^#define OTGCSR_B_SESS_VLD /;"	d
OTGCSR_B_VBUS_DISC	include/usb/fotg210.h	/^#define OTGCSR_B_VBUS_DISC /;"	d
OTGCSR_DEV_A	include/usb/fotg210.h	/^#define OTGCSR_DEV_A /;"	d
OTGCSR_DEV_B	include/usb/fotg210.h	/^#define OTGCSR_DEV_B /;"	d
OTGCSR_HFT	include/usb/fotg210.h	/^#define OTGCSR_HFT /;"	d
OTGCSR_HFT_LONG	include/usb/fotg210.h	/^#define OTGCSR_HFT_LONG /;"	d
OTGCSR_IDFT	include/usb/fotg210.h	/^#define OTGCSR_IDFT /;"	d
OTGCSR_IDFT_LONG	include/usb/fotg210.h	/^#define OTGCSR_IDFT_LONG /;"	d
OTGCSR_ROLE_D	include/usb/fotg210.h	/^#define OTGCSR_ROLE_D /;"	d
OTGCSR_ROLE_H	include/usb/fotg210.h	/^#define OTGCSR_ROLE_H /;"	d
OTGCSR_SPD	include/usb/fotg210.h	/^#define OTGCSR_SPD(/;"	d
OTGCSR_SPD_FULL	include/usb/fotg210.h	/^#define OTGCSR_SPD_FULL /;"	d
OTGCSR_SPD_HIGH	include/usb/fotg210.h	/^#define OTGCSR_SPD_HIGH /;"	d
OTGCSR_SPD_LOW	include/usb/fotg210.h	/^#define OTGCSR_SPD_LOW /;"	d
OTGCSR_SPD_MASK	include/usb/fotg210.h	/^#define OTGCSR_SPD_MASK /;"	d
OTGCSR_SPD_SHIFT	include/usb/fotg210.h	/^#define OTGCSR_SPD_SHIFT /;"	d
OTGCSR_VFT	include/usb/fotg210.h	/^#define OTGCSR_VFT /;"	d
OTGCSR_VFT_LONG	include/usb/fotg210.h	/^#define OTGCSR_VFT_LONG /;"	d
OTGID_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define OTGID_PAD_CTRL /;"	d	file:
OTGID_PAD_CTRL	board/freescale/mx6slevk/mx6slevk.c	/^#define OTGID_PAD_CTRL /;"	d	file:
OTGIER_APRM	include/usb/fotg210.h	/^#define OTGIER_APRM /;"	d
OTGIER_ASRP	include/usb/fotg210.h	/^#define OTGIER_ASRP /;"	d
OTGIER_AVBUSERR	include/usb/fotg210.h	/^#define OTGIER_AVBUSERR /;"	d
OTGIER_BPRM	include/usb/fotg210.h	/^#define OTGIER_BPRM /;"	d
OTGIER_BSESSEND	include/usb/fotg210.h	/^#define OTGIER_BSESSEND /;"	d
OTGIER_BSRP	include/usb/fotg210.h	/^#define OTGIER_BSRP /;"	d
OTGIER_IDCHG	include/usb/fotg210.h	/^#define OTGIER_IDCHG /;"	d
OTGIER_OVD	include/usb/fotg210.h	/^#define OTGIER_OVD /;"	d
OTGIER_RLCHG	include/usb/fotg210.h	/^#define OTGIER_RLCHG /;"	d
OTGISR_APRM	include/usb/fotg210.h	/^#define OTGISR_APRM /;"	d
OTGISR_ASRP	include/usb/fotg210.h	/^#define OTGISR_ASRP /;"	d
OTGISR_AVBUSERR	include/usb/fotg210.h	/^#define OTGISR_AVBUSERR /;"	d
OTGISR_BPRM	include/usb/fotg210.h	/^#define OTGISR_BPRM /;"	d
OTGISR_BSESSEND	include/usb/fotg210.h	/^#define OTGISR_BSESSEND /;"	d
OTGISR_BSRP	include/usb/fotg210.h	/^#define OTGISR_BSRP /;"	d
OTGISR_IDCHG	include/usb/fotg210.h	/^#define OTGISR_IDCHG /;"	d
OTGISR_OVD	include/usb/fotg210.h	/^#define OTGISR_OVD /;"	d
OTGISR_RLCHG	include/usb/fotg210.h	/^#define OTGISR_RLCHG /;"	d
OTGSESSENDEN	arch/arm/cpu/armv7/am33xx/board.c	/^#define OTGSESSENDEN	/;"	d	file:
OTGVDET_EN	arch/arm/cpu/armv7/am33xx/board.c	/^#define OTGVDET_EN	/;"	d	file:
OTG_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define OTG_BASE_ADDR	/;"	d
OTG_CLK_AHB_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG_CLK_AHB_EN	/;"	d	file:
OTG_CLK_HOST_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG_CLK_HOST_EN	/;"	d	file:
OTG_CLK_I2C_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG_CLK_I2C_EN	/;"	d	file:
OTG_CLK_OTG_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG_CLK_OTG_EN	/;"	d	file:
OTG_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define OTG_DEV	/;"	d
OTG_DISABLE_0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define OTG_DISABLE_0 /;"	d
OTG_DMA_MODE	drivers/usb/gadget/dwc2_udc_otg.c	/^#define OTG_DMA_MODE	/;"	d	file:
OTG_ENAB	drivers/usb/phy/twl4030.c	/^#define OTG_ENAB	/;"	d	file:
OTG_FORCESTDBY	drivers/usb/musb-new/omap2430.h	/^#define OTG_FORCESTDBY	/;"	d
OTG_HOST_EN	drivers/usb/host/ohci-lpc32xx.c	/^#define OTG_HOST_EN	/;"	d	file:
OTG_ID_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define OTG_ID_PAD_CTRL /;"	d	file:
OTG_INTERFSEL	drivers/usb/musb-new/omap2430.h	/^#define OTG_INTERFSEL	/;"	d
OTG_PORT	include/usb/ehci-ci.h	/^#define OTG_PORT	/;"	d
OTG_REVISION	drivers/usb/musb-new/omap2430.h	/^#define OTG_REVISION	/;"	d
OTG_SIMENABLE	drivers/usb/musb-new/omap2430.h	/^#define OTG_SIMENABLE	/;"	d
OTG_SS_CLKCTRL_MODULEMODE_HW	arch/arm/include/asm/arch-omap5/clock.h	/^#define OTG_SS_CLKCTRL_MODULEMODE_HW	/;"	d
OTG_SYSCONFIG	drivers/usb/musb-new/omap2430.h	/^#define OTG_SYSCONFIG	/;"	d
OTG_SYSSTATUS	drivers/usb/musb-new/omap2430.h	/^#define OTG_SYSSTATUS	/;"	d
OTG_TIME_A_AIDL_BDIS	drivers/usb/musb-new/musb_core.h	/^#define OTG_TIME_A_AIDL_BDIS	/;"	d
OTG_TIME_A_WAIT_BCON	drivers/usb/musb-new/musb_core.h	/^#define OTG_TIME_A_WAIT_BCON	/;"	d
OTG_TIME_A_WAIT_VRISE	drivers/usb/musb-new/musb_core.h	/^#define OTG_TIME_A_WAIT_VRISE	/;"	d
OTG_TIME_B_ASE0_BRST	drivers/usb/musb-new/musb_core.h	/^#define OTG_TIME_B_ASE0_BRST	/;"	d
OTPGETREGIONCOUNT	include/mtd/mtd-abi.h	/^#define OTPGETREGIONCOUNT	/;"	d
OTPGETREGIONINFO	include/mtd/mtd-abi.h	/^#define OTPGETREGIONINFO	/;"	d
OTPLOCK	include/mtd/mtd-abi.h	/^#define OTPLOCK	/;"	d
OTPSELECT	include/mtd/mtd-abi.h	/^#define OTPSELECT	/;"	d
OTP_ACC_VIO_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_ACC_VIO_ERROR /;"	d
OTP_BEN	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_BEN /;"	d
OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_BEN /;"	d
OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_BEN /;"	d
OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_BEN /;"	d
OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_BEN /;"	d
OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_BEN /;"	d
OTP_CHECK_FOR_PREV_WRITE	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_CHECK_FOR_PREV_WRITE /;"	d
OTP_CLOSE	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_CLOSE /;"	d
OTP_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_CONTROL /;"	d
OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_CONTROL /;"	d
OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_CONTROL /;"	d
OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_CONTROL /;"	d
OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_CONTROL /;"	d
OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_CONTROL /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_DATA0 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_DATA1 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_DATA2 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_DATA3 /;"	d
OTP_DATA_MULT_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_DATA_MULT_ERROR /;"	d
OTP_DATA_SB_WARN	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_DATA_SB_WARN /;"	d
OTP_ECC_MULT_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_ECC_MULT_ERROR /;"	d
OTP_ECC_SB_WARN	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_ECC_SB_WARN /;"	d
OTP_INIT	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_INIT /;"	d
OTP_LOCK	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_LOCK /;"	d
OTP_LOWER_HALF	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_LOWER_HALF /;"	d
OTP_MASTER_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_MASTER_ERROR /;"	d
OTP_NO_ECC	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_NO_ECC /;"	d
OTP_PREV_WR_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_PREV_WR_ERROR /;"	d
OTP_READ_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_READ_ERROR /;"	d
OTP_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_STATUS /;"	d
OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_STATUS /;"	d
OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_STATUS /;"	d
OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_STATUS /;"	d
OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_STATUS /;"	d
OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_STATUS /;"	d
OTP_SUCCESS	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_SUCCESS /;"	d
OTP_TIMING	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define OTP_TIMING /;"	d
OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define OTP_TIMING /;"	d
OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define OTP_TIMING /;"	d
OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define OTP_TIMING /;"	d
OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define OTP_TIMING /;"	d
OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define OTP_TIMING /;"	d
OTP_UPPER_HALF	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_UPPER_HALF /;"	d
OTP_WRITE_ERROR	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define OTP_WRITE_ERROR /;"	d
OUT	drivers/spi/mxc_spi.c	/^#define OUT	/;"	d	file:
OUT	include/usbdescriptors.h	/^#define OUT	/;"	d
OUTBOUND	include/tsi148.h	/^typedef struct _OUTBOUND OUTBOUND;$/;"	t	typeref:struct:_OUTBOUND
OUTBOUND_DOORBELL_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_DOORBELL_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE	/;"	d
OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE	/;"	d
OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE	/;"	d
OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE	/;"	d
OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE	/;"	d
OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	include/gt64120.h	/^#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE	/;"	d
OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	include/gt64120.h	/^#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE	/;"	d
OUTCOME_ERROR	tools/buildman/builder.py	/^OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = range(4)$/;"	v
OUTCOME_OK	tools/buildman/builder.py	/^OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = range(4)$/;"	v
OUTCOME_UNKNOWN	tools/buildman/builder.py	/^OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = range(4)$/;"	v
OUTCOME_WARNING	tools/buildman/builder.py	/^OUTCOME_OK, OUTCOME_WARNING, OUTCOME_ERROR, OUTCOME_UNKNOWN = range(4)$/;"	v
OUTL	drivers/net/dc2114x.c	/^static void OUTL(struct eth_device* dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUTL	drivers/net/eepro100.c	/^static inline void OUTL (struct eth_device *dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUTL	drivers/net/natsemi.c	/^OUTL(struct eth_device *dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUTL	drivers/net/ns8382x.c	/^OUTL(struct eth_device *dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUTPLL	drivers/video/ati_radeon_fb.h	/^#define OUTPLL(/;"	d
OUTPLLP	drivers/video/ati_radeon_fb.h	/^#define OUTPLLP(/;"	d
OUTPUT_40OHM	board/bachmann/ot1200/ot1200.c	/^#define OUTPUT_40OHM	/;"	d	file:
OUTPUT_40OHM	board/boundary/nitrogen6x/nitrogen6x.c	/^#define OUTPUT_40OHM /;"	d	file:
OUTPUT_COUNT	test/dm/regulator.c	/^	OUTPUT_COUNT,$/;"	e	enum:__anone475d93a0103	file:
OUTPUT_ENABLE_END	board/micronas/vct/ebi.h	/^#define OUTPUT_ENABLE_END	/;"	d
OUTPUT_ENABLE_START	board/micronas/vct/ebi.h	/^#define OUTPUT_ENABLE_START	/;"	d
OUTPUT_FILE	tools/genboardscfg.py	/^OUTPUT_FILE = 'boards.cfg'$/;"	v
OUTPUT_MAX_HZ	drivers/clk/rockchip/clk_rk3036.c	/^	OUTPUT_MAX_HZ	= 2400U * 1000000,$/;"	e	enum:__anon067f81910103	file:
OUTPUT_MAX_HZ	drivers/clk/rockchip/clk_rk3288.c	/^	OUTPUT_MAX_HZ	= 2200U * 1000000,$/;"	e	enum:__anon06a678fa0103	file:
OUTPUT_MAX_KHZ	drivers/clk/rockchip/clk_rk3399.c	/^#define OUTPUT_MAX_KHZ	/;"	d	file:
OUTPUT_MIN_HZ	drivers/clk/rockchip/clk_rk3036.c	/^	OUTPUT_MIN_HZ	= 24 * 1000000,$/;"	e	enum:__anon067f81910103	file:
OUTPUT_MIN_HZ	drivers/clk/rockchip/clk_rk3288.c	/^	OUTPUT_MIN_HZ	= 27500000,$/;"	e	enum:__anon06a678fa0103	file:
OUTPUT_MIN_KHZ	drivers/clk/rockchip/clk_rk3399.c	/^#define OUTPUT_MIN_KHZ	/;"	d	file:
OUTPUT_MODE_PAGE	board/freescale/common/vsc3316_3308.c	/^#define OUTPUT_MODE_PAGE	/;"	d	file:
OUTPUT_NAME_COUNT	test/dm/regulator.c	/^	OUTPUT_NAME_COUNT,$/;"	e	enum:__anone475d93a0203	file:
OUTREG	drivers/video/ati_radeon_fb.h	/^#define OUTREG(/;"	d
OUTREG16	drivers/video/ati_radeon_fb.h	/^#define OUTREG16(/;"	d
OUTREG8	drivers/video/ati_radeon_fb.h	/^#define OUTREG8(/;"	d
OUTREGP	drivers/video/ati_radeon_fb.h	/^#define OUTREGP(/;"	d
OUTW	drivers/net/ax88180.h	/^static inline void OUTW (struct eth_device *dev, unsigned short command, unsigned long addr)$/;"	f	typeref:typename:void
OUTW	drivers/net/eepro100.c	/^static inline void OUTW (struct eth_device *dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUTW	drivers/net/natsemi.c	/^OUTW(struct eth_device *dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUTW	drivers/net/ns8382x.c	/^OUTW(struct eth_device *dev, int command, u_long addr)$/;"	f	typeref:typename:void	file:
OUT_BIN	tools/fdtgrep.c	/^	OUT_BIN,		\/* Fragment of .dtb, for hashing *\/$/;"	e	enum:output_t	file:
OUT_BUCK1_UA_MAX	include/power/sandbox_pmic.h	/^#define OUT_BUCK1_UA_MAX	/;"	d
OUT_BUCK1_UA_MIN	include/power/sandbox_pmic.h	/^#define OUT_BUCK1_UA_MIN	/;"	d
OUT_BUCK1_UA_STEP	include/power/sandbox_pmic.h	/^#define OUT_BUCK1_UA_STEP	/;"	d
OUT_BUCK1_UV_MAX	include/power/sandbox_pmic.h	/^#define OUT_BUCK1_UV_MAX	/;"	d
OUT_BUCK1_UV_MIN	include/power/sandbox_pmic.h	/^#define OUT_BUCK1_UV_MIN	/;"	d
OUT_BUCK1_UV_STEP	include/power/sandbox_pmic.h	/^#define OUT_BUCK1_UV_STEP	/;"	d
OUT_BUCK2_UV_MAX	include/power/sandbox_pmic.h	/^#define OUT_BUCK2_UV_MAX	/;"	d
OUT_BUCK2_UV_MIN	include/power/sandbox_pmic.h	/^#define OUT_BUCK2_UV_MIN	/;"	d
OUT_BUCK2_UV_STEP	include/power/sandbox_pmic.h	/^#define OUT_BUCK2_UV_STEP	/;"	d
OUT_CLK_DIVISOR_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_DIVISOR_MASK	/;"	d
OUT_CLK_DIVISOR_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_DIVISOR_SHIFT	/;"	d
OUT_CLK_SOURCE_31_28_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_SOURCE_31_28_MASK	/;"	d
OUT_CLK_SOURCE_31_28_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_SOURCE_31_28_SHIFT	/;"	d
OUT_CLK_SOURCE_31_29_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_SOURCE_31_29_MASK	/;"	d
OUT_CLK_SOURCE_31_29_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_SOURCE_31_29_SHIFT	/;"	d
OUT_CLK_SOURCE_31_30_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_SOURCE_31_30_MASK	/;"	d
OUT_CLK_SOURCE_31_30_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define OUT_CLK_SOURCE_31_30_SHIFT	/;"	d
OUT_DELAY	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define OUT_DELAY	/;"	d
OUT_DIS	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define OUT_DIS	/;"	d
OUT_DTB	tools/fdtgrep.c	/^	OUT_DTB,		\/* Valid device tree binary *\/$/;"	e	enum:output_t	file:
OUT_DTS	tools/fdtgrep.c	/^	OUT_DTS,		\/* Device tree source *\/$/;"	e	enum:output_t	file:
OUT_LDO1_UA_MAX	include/power/sandbox_pmic.h	/^#define OUT_LDO1_UA_MAX	/;"	d
OUT_LDO1_UA_MIN	include/power/sandbox_pmic.h	/^#define OUT_LDO1_UA_MIN	/;"	d
OUT_LDO1_UA_STEP	include/power/sandbox_pmic.h	/^#define OUT_LDO1_UA_STEP	/;"	d
OUT_LDO1_UV_MAX	include/power/sandbox_pmic.h	/^#define OUT_LDO1_UV_MAX	/;"	d
OUT_LDO1_UV_MIN	include/power/sandbox_pmic.h	/^#define OUT_LDO1_UV_MIN	/;"	d
OUT_LDO1_UV_STEP	include/power/sandbox_pmic.h	/^#define OUT_LDO1_UV_STEP	/;"	d
OUT_LDO2_UV_MAX	include/power/sandbox_pmic.h	/^#define OUT_LDO2_UV_MAX	/;"	d
OUT_LDO2_UV_MIN	include/power/sandbox_pmic.h	/^#define OUT_LDO2_UV_MIN	/;"	d
OUT_LDO2_UV_STEP	include/power/sandbox_pmic.h	/^#define OUT_LDO2_UV_STEP	/;"	d
OUT_PKT_RECEIVED	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define OUT_PKT_RECEIVED	/;"	d
OUT_REG_COUNT	include/power/sandbox_pmic.h	/^	OUT_REG_COUNT,$/;"	e	enum:__anon64fe6be10203
OUT_REG_OM	include/power/sandbox_pmic.h	/^	OUT_REG_OM,$/;"	e	enum:__anon64fe6be10203
OUT_REG_UA	include/power/sandbox_pmic.h	/^	OUT_REG_UA,$/;"	e	enum:__anon64fe6be10203
OUT_REG_UV	include/power/sandbox_pmic.h	/^	OUT_REG_UV = 0,$/;"	e	enum:__anon64fe6be10203
OUT_TRANSFER_COMPLELTED	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define OUT_TRANSFER_COMPLELTED	/;"	d
OV0_AUTO_FLIP_CNTRL	include/radeon.h	/^#define OV0_AUTO_FLIP_CNTRL	/;"	d
OV0_BASE_ADDR	include/radeon.h	/^#define OV0_BASE_ADDR	/;"	d
OV0_DEINTERLACE_PATTERN	include/radeon.h	/^#define OV0_DEINTERLACE_PATTERN	/;"	d
OV0_FILTER_CNTL	include/radeon.h	/^#define OV0_FILTER_CNTL	/;"	d
OV0_FLAG_CNTRL	include/radeon.h	/^#define OV0_FLAG_CNTRL	/;"	d
OV0_FOUR_TAP_COEF_0	include/radeon.h	/^#define OV0_FOUR_TAP_COEF_0	/;"	d
OV0_FOUR_TAP_COEF_1	include/radeon.h	/^#define OV0_FOUR_TAP_COEF_1	/;"	d
OV0_FOUR_TAP_COEF_2	include/radeon.h	/^#define OV0_FOUR_TAP_COEF_2	/;"	d
OV0_FOUR_TAP_COEF_3	include/radeon.h	/^#define OV0_FOUR_TAP_COEF_3	/;"	d
OV0_FOUR_TAP_COEF_4	include/radeon.h	/^#define OV0_FOUR_TAP_COEF_4	/;"	d
OV0_GAMMA_0_F	include/radeon.h	/^#define OV0_GAMMA_0_F	/;"	d
OV0_GAMMA_10_1F	include/radeon.h	/^#define OV0_GAMMA_10_1F	/;"	d
OV0_GAMMA_20_3F	include/radeon.h	/^#define OV0_GAMMA_20_3F	/;"	d
OV0_GAMMA_380_3BF	include/radeon.h	/^#define OV0_GAMMA_380_3BF	/;"	d
OV0_GAMMA_3C0_3FF	include/radeon.h	/^#define OV0_GAMMA_3C0_3FF	/;"	d
OV0_GAMMA_40_7F	include/radeon.h	/^#define OV0_GAMMA_40_7F	/;"	d
OV0_GRPH_KEY_CLR_HIGH	include/radeon.h	/^#define OV0_GRPH_KEY_CLR_HIGH	/;"	d
OV0_GRPH_KEY_CLR_LOW	include/radeon.h	/^#define OV0_GRPH_KEY_CLR_LOW	/;"	d
OV0_H_INC	include/radeon.h	/^#define OV0_H_INC	/;"	d
OV0_KEY_CNTL	include/radeon.h	/^#define OV0_KEY_CNTL	/;"	d
OV0_LIN_TRANS_A	include/radeon.h	/^#define OV0_LIN_TRANS_A	/;"	d
OV0_LIN_TRANS_B	include/radeon.h	/^#define OV0_LIN_TRANS_B	/;"	d
OV0_LIN_TRANS_C	include/radeon.h	/^#define OV0_LIN_TRANS_C	/;"	d
OV0_LIN_TRANS_D	include/radeon.h	/^#define OV0_LIN_TRANS_D	/;"	d
OV0_LIN_TRANS_E	include/radeon.h	/^#define OV0_LIN_TRANS_E	/;"	d
OV0_LIN_TRANS_F	include/radeon.h	/^#define OV0_LIN_TRANS_F	/;"	d
OV0_P1_BLANK_LINES_AT_TOP	include/radeon.h	/^#define OV0_P1_BLANK_LINES_AT_TOP	/;"	d
OV0_P1_H_ACCUM_INIT	include/radeon.h	/^#define OV0_P1_H_ACCUM_INIT	/;"	d
OV0_P1_V_ACCUM_INIT	include/radeon.h	/^#define OV0_P1_V_ACCUM_INIT	/;"	d
OV0_P1_X_START_END	include/radeon.h	/^#define OV0_P1_X_START_END	/;"	d
OV0_P23_BLANK_LINES_AT_TOP	include/radeon.h	/^#define OV0_P23_BLANK_LINES_AT_TOP	/;"	d
OV0_P23_H_ACCUM_INIT	include/radeon.h	/^#define OV0_P23_H_ACCUM_INIT	/;"	d
OV0_P23_V_ACCUM_INIT	include/radeon.h	/^#define OV0_P23_V_ACCUM_INIT	/;"	d
OV0_P2_X_START_END	include/radeon.h	/^#define OV0_P2_X_START_END	/;"	d
OV0_P3_X_START_END	include/radeon.h	/^#define OV0_P3_X_START_END	/;"	d
OV0_PIPELINE_CNTL	include/radeon.h	/^#define OV0_PIPELINE_CNTL	/;"	d
OV0_REG_LOAD_CNTL	include/radeon.h	/^#define OV0_REG_LOAD_CNTL	/;"	d
OV0_SCALE_CNTL	include/radeon.h	/^#define OV0_SCALE_CNTL	/;"	d
OV0_SLICE_CNTL	include/radeon.h	/^#define OV0_SLICE_CNTL	/;"	d
OV0_STEP_BY	include/radeon.h	/^#define OV0_STEP_BY	/;"	d
OV0_SUBMIT_HISTORY	include/radeon.h	/^#define OV0_SUBMIT_HISTORY	/;"	d
OV0_TEST	include/radeon.h	/^#define OV0_TEST	/;"	d
OV0_VID_BUF0_BASE_ADRS	include/radeon.h	/^#define OV0_VID_BUF0_BASE_ADRS	/;"	d
OV0_VID_BUF1_BASE_ADRS	include/radeon.h	/^#define OV0_VID_BUF1_BASE_ADRS	/;"	d
OV0_VID_BUF2_BASE_ADRS	include/radeon.h	/^#define OV0_VID_BUF2_BASE_ADRS	/;"	d
OV0_VID_BUF3_BASE_ADRS	include/radeon.h	/^#define OV0_VID_BUF3_BASE_ADRS	/;"	d
OV0_VID_BUF4_BASE_ADRS	include/radeon.h	/^#define OV0_VID_BUF4_BASE_ADRS	/;"	d
OV0_VID_BUF5_BASE_ADRS	include/radeon.h	/^#define OV0_VID_BUF5_BASE_ADRS	/;"	d
OV0_VID_BUF_PITCH0_VALUE	include/radeon.h	/^#define OV0_VID_BUF_PITCH0_VALUE	/;"	d
OV0_VID_BUF_PITCH1_VALUE	include/radeon.h	/^#define OV0_VID_BUF_PITCH1_VALUE	/;"	d
OV0_VID_KEY_CLR_HIGH	include/radeon.h	/^#define OV0_VID_KEY_CLR_HIGH	/;"	d
OV0_VID_KEY_CLR_LOW	include/radeon.h	/^#define OV0_VID_KEY_CLR_LOW	/;"	d
OV0_V_INC	include/radeon.h	/^#define OV0_V_INC	/;"	d
OV0_Y_X_END	include/radeon.h	/^#define OV0_Y_X_END	/;"	d
OV0_Y_X_START	include/radeon.h	/^#define OV0_Y_X_START	/;"	d
OVCBIT	drivers/usb/host/r8a66597.h	/^#define	OVCBIT	/;"	d
OVCMON	drivers/usb/host/r8a66597.h	/^#define	OVCMON	/;"	d
OVCN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_TXD_MARK, OVCN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
OVCN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
OVERLAY_TEST	include/test/overlay.h	/^#define OVERLAY_TEST(/;"	d
OVERLOAD_FILE	net/bootp.c	/^#define OVERLOAD_FILE /;"	d	file:
OVERLOAD_SNAME	net/bootp.c	/^#define OVERLOAD_SNAME /;"	d	file:
OVERRIDE_SMC0_LP0_BOOT	board/bf609-ezkit/soft_switch.h	/^#define OVERRIDE_SMC0_LP0_BOOT /;"	d
OVERRIDE_XS_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define OVERRIDE_XS_MASK	/;"	d
OVERRIDE_XS_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define OVERRIDE_XS_SHIFT	/;"	d
OVERRUN_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define OVERRUN_R	/;"	d
OVERWRITE_CONSOLE	common/console.c	/^#define OVERWRITE_CONSOLE /;"	d	file:
OVERWRITE_CONSOLE	include/input.h	/^#define OVERWRITE_CONSOLE /;"	d
OVERWRITE_CONSOLE	include/tegra-kbc.h	/^#define OVERWRITE_CONSOLE /;"	d
OVL1C1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OVL1C1	/;"	d
OVL1C1_O1EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OVL1C1_O1EN	/;"	d
OVL1C2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OVL1C2	/;"	d
OVL2C1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OVL2C1	/;"	d
OVL2C1_O2EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OVL2C1_O2EN	/;"	d
OVL2C2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OVL2C2	/;"	d
OVR	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define OVR	/;"	d
OVRCR	drivers/usb/host/r8a66597.h	/^#define	OVRCR	/;"	d
OVRCRE	drivers/usb/host/r8a66597.h	/^#define	OVRCRE	/;"	d
OVRN	drivers/usb/host/r8a66597.h	/^#define	OVRN	/;"	d
OVR_CLR	include/radeon.h	/^#define OVR_CLR	/;"	d
OVR_WID_LEFT_RIGHT	include/radeon.h	/^#define OVR_WID_LEFT_RIGHT	/;"	d
OVR_WID_TOP_BOTTOM	include/radeon.h	/^#define OVR_WID_TOP_BOTTOM	/;"	d
OWER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OWER	/;"	d
OWER	include/SA-1100.h	/^#define OWER	/;"	d
OWER_WME	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define OWER_WME	/;"	d
OWER_WME	include/SA-1100.h	/^#define OWER_WME	/;"	d
OWIRE_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define OWIRE_BASE_ADDR /;"	d
OWNER_ACPI	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_ACPI	include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_ACPI	/;"	d
OWNER_GPIO	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNER_GPIO	include/dt-bindings/gpio/x86-gpio.h	/^#define OWNER_GPIO	/;"	d
OWNbit	drivers/net/rtl8169.c	/^	OWNbit = 0x80000000,$/;"	e	enum:_DescStatusBit	file:
O_AA	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_APPEND	fs/yaffs2/yportenv.h	/^#define O_APPEND	/;"	d
O_BD	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_BI	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_BINARY	include/compiler.h	/^#define O_BINARY	/;"	d
O_BO	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_CREAT	fs/yaffs2/yportenv.h	/^#define O_CREAT	/;"	d
O_CRM	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_EXCL	fs/yaffs2/yportenv.h	/^#define O_EXCL	/;"	d
O_IMM	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_L	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_LI	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_LK	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_MB	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_ME	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_NB	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_OE	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_RDONLY	fs/yaffs2/yportenv.h	/^#define O_RDONLY	/;"	d
O_RDWR	fs/yaffs2/yportenv.h	/^#define O_RDWR	/;"	d
O_Rc	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_SH	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_SIMM	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_SR	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_TO	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_TRUNC	fs/yaffs2/yportenv.h	/^#define O_TRUNC	/;"	d
O_UIMM	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_WRONLY	fs/yaffs2/yportenv.h	/^#define O_WRONLY	/;"	d
O_cr2	include/bedbug/ppc.h	/^  O_cr2 };$/;"	e	enum:OP_FIELD
O_crbA	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_crbB	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_crbD	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_crfD	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_crfS	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_d	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_frC	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_frD	include/bedbug/ppc.h	/^  O_AA = 1, O_BD, O_BI, O_BO, O_crbD, O_crbA, O_crbB, O_CRM, O_d, O_frC, O_frD,$/;"	e	enum:OP_FIELD
O_frS	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_rA	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_rB	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_rD	include/bedbug/ppc.h	/^  O_frS, O_IMM, O_LI, O_LK, O_MB, O_ME, O_NB, O_OE, O_rA, O_rB, O_Rc, O_rD,$/;"	e	enum:OP_FIELD
O_rS	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_spr	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
O_tbr	include/bedbug/ppc.h	/^  O_rS, O_SH, O_SIMM, O_SR, O_TO, O_UIMM, O_crfD, O_crfS, O_L, O_spr, O_tbr,$/;"	e	enum:OP_FIELD
Obtain	doc/README.x86	/^Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same$/;"	l
Offset	tools/dtoc/fdt_normal.py	/^    def Offset(self):$/;"	m	class:Node
One_Fifty	lib/dhry/dhry.h	/^typedef int     One_Fifty;$/;"	t	typeref:typename:int
One_Thirty	lib/dhry/dhry.h	/^typedef int     One_Thirty;$/;"	t	typeref:typename:int
OpenRISC architecture	arch/openrisc/Kconfig	/^menu "OpenRISC architecture"$/;"	m
Opt_bulk_read	fs/ubifs/super.c	/^	Opt_bulk_read,$/;"	e	enum:__anon892475d50103	file:
Opt_chk_data_crc	fs/ubifs/super.c	/^	Opt_chk_data_crc,$/;"	e	enum:__anon892475d50103	file:
Opt_err	fs/ubifs/super.c	/^	Opt_err,$/;"	e	enum:__anon892475d50103	file:
Opt_fast_unmount	fs/ubifs/super.c	/^	Opt_fast_unmount,$/;"	e	enum:__anon892475d50103	file:
Opt_no_bulk_read	fs/ubifs/super.c	/^	Opt_no_bulk_read,$/;"	e	enum:__anon892475d50103	file:
Opt_no_chk_data_crc	fs/ubifs/super.c	/^	Opt_no_chk_data_crc,$/;"	e	enum:__anon892475d50103	file:
Opt_norm_unmount	fs/ubifs/super.c	/^	Opt_norm_unmount,$/;"	e	enum:__anon892475d50103	file:
Opt_override_compr	fs/ubifs/super.c	/^	Opt_override_compr,$/;"	e	enum:__anon892475d50103	file:
OptionalHeader	include/pe.h	/^	IMAGE_OPTIONAL_HEADER32 OptionalHeader;       \/* 0x18 *\/$/;"	m	struct:_IMAGE_NT_HEADERS	typeref:typename:IMAGE_OPTIONAL_HEADER32
OptionalHeader	include/pe.h	/^	IMAGE_OPTIONAL_HEADER64 OptionalHeader;$/;"	m	struct:_IMAGE_NT_HEADERS64	typeref:typename:IMAGE_OPTIONAL_HEADER64
Options	tools/buildman/test.py	/^class Options:$/;"	c
Out	tools/dtoc/dtoc	/^    def Out(self, str):$/;"	m	class:DtbPlatdata
Out	tools/dtoc/dtoc.py	/^    def Out(self, str):$/;"	m	class:DtbPlatdata
Outcome	tools/buildman/builder.py	/^    class Outcome:$/;"	c	class:Builder
Output	tools/patman/command.py	/^def Output(*cmd, **kwargs):$/;"	f
Output	tools/patman/cros_subprocess.py	/^        def Output(self, stream, data):$/;"	m	class:TestSubprocess.MyOperation
OutputOneLine	tools/patman/command.py	/^def OutputOneLine(*cmd, **kwargs):$/;"	f
P	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define P /;"	d
P	lib/sha1.c	/^#define P(/;"	d	file:
P	lib/sha256.c	/^#define P(/;"	d	file:
P0	arch/blackfin/cpu/cache.S	/^	P0 = R0;$/;"	d
P0	arch/blackfin/lib/memcmp.S	/^	P0 = R0;			\/* P0 = s1 address *\/$/;"	d
P0	arch/blackfin/lib/memcpy.S	/^	P0 = P0 + P2;$/;"	d
P0	arch/blackfin/lib/memcpy.S	/^	P0 = R0 ;	\/* dst*\/$/;"	d
P0	arch/blackfin/lib/memmove.S	/^	P0 = P0 + P2;$/;"	d
P0	arch/blackfin/lib/memmove.S	/^	P0 = R0;                  \/* P0 = To address *\/$/;"	d
P0	arch/blackfin/lib/memset.S	/^	P0 = R0 ;              \/* P0 = address *\/$/;"	d
P0	arch/blackfin/lib/outs.S	/^	P0 = R0;	\/* P0 = port *\/$/;"	d
P0SEG	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P0SEG	/;"	d
P0_CMD_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define P0_CMD_EN	/;"	d
P1	arch/blackfin/cpu/cache.S	/^	P1 = R2;$/;"	d
P1	arch/blackfin/lib/memcmp.S	/^	P1 = P2 >> 2;		\/* count = n\/4 *\/$/;"	d
P1	arch/blackfin/lib/memcpy.S	/^	P1 = I1;	\/* in case there's something left, *\/$/;"	d
P1	arch/blackfin/lib/memcpy.S	/^	P1 = P1 + P2;$/;"	d
P1	arch/blackfin/lib/memcpy.S	/^	P1 = R1 ;	\/* src*\/$/;"	d
P1	arch/blackfin/lib/memmove.S	/^	P1 = P2 >> 2;             \/* count = n\/4 *\/$/;"	d
P1	arch/blackfin/lib/memset.S	/^	P1 = P2 >> 2;          \/* count = n\/4        *\/$/;"	d
P1	arch/blackfin/lib/memset.S	/^	P1 = R0;$/;"	d
P1	arch/blackfin/lib/outs.S	/^	P1 = R1;	\/* P1 = address *\/$/;"	d
P1394	arch/arm/mach-davinci/lowlevel_init.S	/^P1394:$/;"	l
P1C06_V	board/spear/common/spr_lowlevel_init.S	/^P1C06_V:$/;"	l
P1C0A_V	board/spear/common/spr_lowlevel_init.S	/^P1C0A_V:$/;"	l
P1C0E_V	board/spear/common/spr_lowlevel_init.S	/^P1C0E_V:$/;"	l
P1CR_AN_DONE	drivers/net/ks8851_mll.h	/^#define P1CR_AN_DONE	/;"	d
P1CR_HP_MDIX	drivers/net/ks8851_mll.h	/^#define P1CR_HP_MDIX	/;"	d
P1CR_LINK_GOOD	drivers/net/ks8851_mll.h	/^#define P1CR_LINK_GOOD	/;"	d
P1CR_OP_100M	drivers/net/ks8851_mll.h	/^#define P1CR_OP_100M	/;"	d
P1CR_OP_FDX	drivers/net/ks8851_mll.h	/^#define P1CR_OP_FDX	/;"	d
P1CR_OP_MDI	drivers/net/ks8851_mll.h	/^#define P1CR_OP_MDI	/;"	d
P1CR_PNTR_100BT_FDX	drivers/net/ks8851_mll.h	/^#define P1CR_PNTR_100BT_FDX	/;"	d
P1CR_PNTR_100BT_HDX	drivers/net/ks8851_mll.h	/^#define P1CR_PNTR_100BT_HDX	/;"	d
P1CR_PNTR_10BT_FDX	drivers/net/ks8851_mll.h	/^#define P1CR_PNTR_10BT_FDX	/;"	d
P1CR_PNTR_10BT_HDX	drivers/net/ks8851_mll.h	/^#define P1CR_PNTR_10BT_HDX	/;"	d
P1CR_PNTR_FLOW	drivers/net/ks8851_mll.h	/^#define P1CR_PNTR_FLOW	/;"	d
P1CR_REV_POL	drivers/net/ks8851_mll.h	/^#define P1CR_REV_POL	/;"	d
P1MBCR_FORCE_FDX	drivers/net/ks8851_mll.h	/^#define P1MBCR_FORCE_FDX	/;"	d
P1MBSR_AN_CAPABLE	drivers/net/ks8851_mll.h	/^#define P1MBSR_AN_CAPABLE	/;"	d
P1MBSR_AN_COMPLETE	drivers/net/ks8851_mll.h	/^#define P1MBSR_AN_COMPLETE	/;"	d
P1MBSR_LINK_UP	drivers/net/ks8851_mll.h	/^#define P1MBSR_LINK_UP	/;"	d
P1MSELR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^P1MSELR_A:	.long	GPIO_BASE + 0x80$/;"	l
P1MSELR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^P1MSELR_D:	.word	0x3780$/;"	l
P1SCLMD_ADV_100BT_FDX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_ADV_100BT_FDX	/;"	d
P1SCLMD_ADV_100BT_HDX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_ADV_100BT_HDX	/;"	d
P1SCLMD_ADV_10BT_FDX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_ADV_10BT_FDX	/;"	d
P1SCLMD_ADV_10BT_HDX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_ADV_10BT_HDX	/;"	d
P1SCLMD_ADV_FLOW	drivers/net/ks8851_mll.h	/^#define P1SCLMD_ADV_FLOW	/;"	d
P1SCLMD_AUTONEGEN	drivers/net/ks8851_mll.h	/^#define P1SCLMD_AUTONEGEN	/;"	d
P1SCLMD_DISAUTOMDIX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_DISAUTOMDIX	/;"	d
P1SCLMD_FORCE100	drivers/net/ks8851_mll.h	/^#define P1SCLMD_FORCE100	/;"	d
P1SCLMD_FORCEFDX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_FORCEFDX	/;"	d
P1SCLMD_FORCEMDIX	drivers/net/ks8851_mll.h	/^#define P1SCLMD_FORCEMDIX	/;"	d
P1SCLMD_LEDOFF	drivers/net/ks8851_mll.h	/^#define P1SCLMD_LEDOFF	/;"	d
P1SCLMD_RESTARTAN	drivers/net/ks8851_mll.h	/^#define P1SCLMD_RESTARTAN	/;"	d
P1SCLMD_TXIDS	drivers/net/ks8851_mll.h	/^#define P1SCLMD_TXIDS	/;"	d
P1SEG	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P1SEG	/;"	d
P1SEGADDR	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P1SEGADDR(/;"	d
P1SR_AN_DONE	drivers/net/ks8851_mll.h	/^#define P1SR_AN_DONE	/;"	d
P1SR_HP_MDIX	drivers/net/ks8851_mll.h	/^#define P1SR_HP_MDIX	/;"	d
P1SR_LINK_GOOD	drivers/net/ks8851_mll.h	/^#define P1SR_LINK_GOOD	/;"	d
P1SR_OP_100M	drivers/net/ks8851_mll.h	/^#define P1SR_OP_100M	/;"	d
P1SR_OP_FDX	drivers/net/ks8851_mll.h	/^#define P1SR_OP_FDX	/;"	d
P1SR_OP_MDI	drivers/net/ks8851_mll.h	/^#define P1SR_OP_MDI	/;"	d
P1SR_PNTR_100BT_FDX	drivers/net/ks8851_mll.h	/^#define P1SR_PNTR_100BT_FDX	/;"	d
P1SR_PNTR_100BT_HDX	drivers/net/ks8851_mll.h	/^#define P1SR_PNTR_100BT_HDX	/;"	d
P1SR_PNTR_10BT_FDX	drivers/net/ks8851_mll.h	/^#define P1SR_PNTR_10BT_FDX	/;"	d
P1SR_PNTR_10BT_HDX	drivers/net/ks8851_mll.h	/^#define P1SR_PNTR_10BT_HDX	/;"	d
P1SR_PNTR_FLOW	drivers/net/ks8851_mll.h	/^#define P1SR_PNTR_FLOW	/;"	d
P1SR_REV_POL	drivers/net/ks8851_mll.h	/^#define P1SR_REV_POL	/;"	d
P2	arch/blackfin/lib/memcmp.S	/^	P2 = R2 ;			\/* P2 = count *\/$/;"	d
P2	arch/blackfin/lib/memcmp.S	/^	P2 = R2;			\/* set remainder *\/$/;"	d
P2	arch/blackfin/lib/memcpy.S	/^	P2 = P2 >> 2;$/;"	d
P2	arch/blackfin/lib/memcpy.S	/^	P2 = R2 ;	\/* length *\/$/;"	d
P2	arch/blackfin/lib/memcpy.S	/^	P2 = R2;$/;"	d
P2	arch/blackfin/lib/memmove.S	/^	P2 = R2 ;                 \/* P2 = count *\/$/;"	d
P2	arch/blackfin/lib/memmove.S	/^	P2 = R2;                  \/* set remainder *\/$/;"	d
P2	arch/blackfin/lib/memset.S	/^	P2 = R2 ;              \/* P2 = count   *\/$/;"	d
P2	arch/blackfin/lib/memset.S	/^	P2 = R2;$/;"	d
P2	arch/blackfin/lib/memset.S	/^	P2 = R3;$/;"	d
P2	arch/blackfin/lib/outs.S	/^	P2 = R2;	\/* P2 = count *\/$/;"	d
P2ALIGN	fs/zfs/zfs.c	/^#define	P2ALIGN(/;"	d	file:
P2MSELR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^P2MSELR_A:	.long	GPIO_BASE + 0x82$/;"	l
P2MSELR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^P2MSELR_D:	.word	0x0000$/;"	l
P2PHASE	fs/zfs/zfs.c	/^#define	P2PHASE(/;"	d	file:
P2PLL_CNTL	include/radeon.h	/^#define P2PLL_CNTL	/;"	d
P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN	/;"	d
P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN_MASK	/;"	d
P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC	/;"	d
P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC_MASK	/;"	d
P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET	/;"	d
P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET_MASK	/;"	d
P2PLL_CNTL__P2PLL_FBCLK_SEL	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_FBCLK_SEL	/;"	d
P2PLL_CNTL__P2PLL_FBCLK_SEL_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_FBCLK_SEL_MASK	/;"	d
P2PLL_CNTL__P2PLL_PCP_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_PCP_MASK	/;"	d
P2PLL_CNTL__P2PLL_PDC_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_PDC_MASK	/;"	d
P2PLL_CNTL__P2PLL_PVG_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_PVG_MASK	/;"	d
P2PLL_CNTL__P2PLL_REFCLK_SEL	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_REFCLK_SEL	/;"	d
P2PLL_CNTL__P2PLL_REFCLK_SEL_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_REFCLK_SEL_MASK	/;"	d
P2PLL_CNTL__P2PLL_RESET	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_RESET	/;"	d
P2PLL_CNTL__P2PLL_RESET_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_RESET_MASK	/;"	d
P2PLL_CNTL__P2PLL_SLEEP	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_SLEEP	/;"	d
P2PLL_CNTL__P2PLL_SLEEP_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_SLEEP_MASK	/;"	d
P2PLL_CNTL__P2PLL_TCPOFF	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_TCPOFF	/;"	d
P2PLL_CNTL__P2PLL_TCPOFF_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_TCPOFF_MASK	/;"	d
P2PLL_CNTL__P2PLL_TST_EN	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_TST_EN	/;"	d
P2PLL_CNTL__P2PLL_TST_EN_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_TST_EN_MASK	/;"	d
P2PLL_CNTL__P2PLL_TVCOMAX	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_TVCOMAX	/;"	d
P2PLL_CNTL__P2PLL_TVCOMAX_MASK	include/radeon.h	/^#define P2PLL_CNTL__P2PLL_TVCOMAX_MASK	/;"	d
P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R	include/radeon.h	/^#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R	/;"	d
P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R_MASK	include/radeon.h	/^#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R_MASK	/;"	d
P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W	include/radeon.h	/^#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W	/;"	d
P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W_MASK	include/radeon.h	/^#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W_MASK	/;"	d
P2PLL_DIV_0__P2PLL_FB_DIV_MASK	include/radeon.h	/^#define P2PLL_DIV_0__P2PLL_FB_DIV_MASK	/;"	d
P2PLL_DIV_0__P2PLL_POST_DIV_MASK	include/radeon.h	/^#define P2PLL_DIV_0__P2PLL_POST_DIV_MASK	/;"	d
P2PLL_REF_DIV	include/radeon.h	/^#define P2PLL_REF_DIV	/;"	d
P2SEG	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P2SEG	/;"	d
P2SEGADDR	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P2SEGADDR(/;"	d
P2SZ_TO_AM	arch/powerpc/include/asm/fsl_lbc.h	/^#define P2SZ_TO_AM(/;"	d
P2SZ_TO_AM	include/mpc8260.h	/^#define P2SZ_TO_AM(/;"	d
P2WI_CC_CLK_DIV	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CC_CLK_DIV(/;"	d
P2WI_CC_CLK_DIV	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CC_CLK_DIV(/;"	d
P2WI_CC_CLK_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CC_CLK_MASK /;"	d
P2WI_CC_CLK_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CC_CLK_MASK /;"	d
P2WI_CC_SDA_OUT_DELAY	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CC_SDA_OUT_DELAY(/;"	d
P2WI_CC_SDA_OUT_DELAY	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CC_SDA_OUT_DELAY(/;"	d
P2WI_CC_SDA_OUT_DELAY_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CC_SDA_OUT_DELAY_MASK /;"	d
P2WI_CC_SDA_OUT_DELAY_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CC_SDA_OUT_DELAY_MASK /;"	d
P2WI_CTRL_IRQ_EN	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CTRL_IRQ_EN /;"	d
P2WI_CTRL_IRQ_EN	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CTRL_IRQ_EN /;"	d
P2WI_CTRL_RESET	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CTRL_RESET /;"	d
P2WI_CTRL_RESET	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CTRL_RESET /;"	d
P2WI_CTRL_TRANS_ABORT	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CTRL_TRANS_ABORT /;"	d
P2WI_CTRL_TRANS_ABORT	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CTRL_TRANS_ABORT /;"	d
P2WI_CTRL_TRANS_START	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_CTRL_TRANS_START /;"	d
P2WI_CTRL_TRANS_START	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_CTRL_TRANS_START /;"	d
P2WI_DATADDR_BYTE_1	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_1(/;"	d
P2WI_DATADDR_BYTE_1	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_1(/;"	d
P2WI_DATADDR_BYTE_1_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_1_MASK /;"	d
P2WI_DATADDR_BYTE_1_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_1_MASK /;"	d
P2WI_DATADDR_BYTE_2	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_2(/;"	d
P2WI_DATADDR_BYTE_2	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_2(/;"	d
P2WI_DATADDR_BYTE_2_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_2_MASK /;"	d
P2WI_DATADDR_BYTE_2_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_2_MASK /;"	d
P2WI_DATADDR_BYTE_3	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_3(/;"	d
P2WI_DATADDR_BYTE_3	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_3(/;"	d
P2WI_DATADDR_BYTE_3_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_3_MASK /;"	d
P2WI_DATADDR_BYTE_3_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_3_MASK /;"	d
P2WI_DATADDR_BYTE_4	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_4(/;"	d
P2WI_DATADDR_BYTE_4	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_4(/;"	d
P2WI_DATADDR_BYTE_4_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_4_MASK /;"	d
P2WI_DATADDR_BYTE_4_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_4_MASK /;"	d
P2WI_DATADDR_BYTE_5	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_5(/;"	d
P2WI_DATADDR_BYTE_5	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_5(/;"	d
P2WI_DATADDR_BYTE_5_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_5_MASK /;"	d
P2WI_DATADDR_BYTE_5_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_5_MASK /;"	d
P2WI_DATADDR_BYTE_6	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_6(/;"	d
P2WI_DATADDR_BYTE_6	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_6(/;"	d
P2WI_DATADDR_BYTE_6_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_6_MASK /;"	d
P2WI_DATADDR_BYTE_6_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_6_MASK /;"	d
P2WI_DATADDR_BYTE_7	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_7(/;"	d
P2WI_DATADDR_BYTE_7	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_7(/;"	d
P2WI_DATADDR_BYTE_7_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_7_MASK /;"	d
P2WI_DATADDR_BYTE_7_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_7_MASK /;"	d
P2WI_DATADDR_BYTE_8	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_8(/;"	d
P2WI_DATADDR_BYTE_8	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_8(/;"	d
P2WI_DATADDR_BYTE_8_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATADDR_BYTE_8_MASK /;"	d
P2WI_DATADDR_BYTE_8_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATADDR_BYTE_8_MASK /;"	d
P2WI_DATA_BYTE_1	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_1(/;"	d
P2WI_DATA_BYTE_1	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_1(/;"	d
P2WI_DATA_BYTE_1_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_1_MASK /;"	d
P2WI_DATA_BYTE_1_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_1_MASK /;"	d
P2WI_DATA_BYTE_2	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_2(/;"	d
P2WI_DATA_BYTE_2	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_2(/;"	d
P2WI_DATA_BYTE_2_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_2_MASK /;"	d
P2WI_DATA_BYTE_2_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_2_MASK /;"	d
P2WI_DATA_BYTE_3	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_3(/;"	d
P2WI_DATA_BYTE_3	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_3(/;"	d
P2WI_DATA_BYTE_3_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_3_MASK /;"	d
P2WI_DATA_BYTE_3_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_3_MASK /;"	d
P2WI_DATA_BYTE_4	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_4(/;"	d
P2WI_DATA_BYTE_4	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_4(/;"	d
P2WI_DATA_BYTE_4_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_4_MASK /;"	d
P2WI_DATA_BYTE_4_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_4_MASK /;"	d
P2WI_DATA_BYTE_5	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_5(/;"	d
P2WI_DATA_BYTE_5	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_5(/;"	d
P2WI_DATA_BYTE_5_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_5_MASK /;"	d
P2WI_DATA_BYTE_5_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_5_MASK /;"	d
P2WI_DATA_BYTE_6	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_6(/;"	d
P2WI_DATA_BYTE_6	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_6(/;"	d
P2WI_DATA_BYTE_6_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_6_MASK /;"	d
P2WI_DATA_BYTE_6_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_6_MASK /;"	d
P2WI_DATA_BYTE_7	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_7(/;"	d
P2WI_DATA_BYTE_7	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_7(/;"	d
P2WI_DATA_BYTE_7_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_7_MASK /;"	d
P2WI_DATA_BYTE_7_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_7_MASK /;"	d
P2WI_DATA_BYTE_8	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_8(/;"	d
P2WI_DATA_BYTE_8	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_8(/;"	d
P2WI_DATA_BYTE_8_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_BYTE_8_MASK /;"	d
P2WI_DATA_BYTE_8_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_BYTE_8_MASK /;"	d
P2WI_DATA_NUM_BYTES	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_NUM_BYTES(/;"	d
P2WI_DATA_NUM_BYTES	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_NUM_BYTES(/;"	d
P2WI_DATA_NUM_BYTES_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_NUM_BYTES_MASK /;"	d
P2WI_DATA_NUM_BYTES_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_NUM_BYTES_MASK /;"	d
P2WI_DATA_NUM_BYTES_READ	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_DATA_NUM_BYTES_READ /;"	d
P2WI_DATA_NUM_BYTES_READ	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_DATA_NUM_BYTES_READ /;"	d
P2WI_IRQ_LOAD_BUSY	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_IRQ_LOAD_BUSY /;"	d
P2WI_IRQ_LOAD_BUSY	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_IRQ_LOAD_BUSY /;"	d
P2WI_IRQ_TRANS_DONE	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_IRQ_TRANS_DONE /;"	d
P2WI_IRQ_TRANS_DONE	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_IRQ_TRANS_DONE /;"	d
P2WI_IRQ_TRANS_ERR	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_IRQ_TRANS_ERR /;"	d
P2WI_IRQ_TRANS_ERR	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_IRQ_TRANS_ERR /;"	d
P2WI_LINECTRL_SCL_CTRL_EN	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_LINECTRL_SCL_CTRL_EN /;"	d
P2WI_LINECTRL_SCL_CTRL_EN	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_LINECTRL_SCL_CTRL_EN /;"	d
P2WI_LINECTRL_SCL_OUT_HIGH	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_LINECTRL_SCL_OUT_HIGH /;"	d
P2WI_LINECTRL_SCL_OUT_HIGH	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_LINECTRL_SCL_OUT_HIGH /;"	d
P2WI_LINECTRL_SCL_STATE_HIGH	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_LINECTRL_SCL_STATE_HIGH /;"	d
P2WI_LINECTRL_SCL_STATE_HIGH	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_LINECTRL_SCL_STATE_HIGH /;"	d
P2WI_LINECTRL_SDA_CTRL_EN	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_LINECTRL_SDA_CTRL_EN /;"	d
P2WI_LINECTRL_SDA_CTRL_EN	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_LINECTRL_SDA_CTRL_EN /;"	d
P2WI_LINECTRL_SDA_OUT_HIGH	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_LINECTRL_SDA_OUT_HIGH /;"	d
P2WI_LINECTRL_SDA_OUT_HIGH	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_LINECTRL_SDA_OUT_HIGH /;"	d
P2WI_LINECTRL_SDA_STATE_HIGH	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_LINECTRL_SDA_STATE_HIGH /;"	d
P2WI_LINECTRL_SDA_STATE_HIGH	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_LINECTRL_SDA_STATE_HIGH /;"	d
P2WI_PM_CTRL_ADDR	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_CTRL_ADDR(/;"	d
P2WI_PM_CTRL_ADDR	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_CTRL_ADDR(/;"	d
P2WI_PM_CTRL_ADDR_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_CTRL_ADDR_MASK /;"	d
P2WI_PM_CTRL_ADDR_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_CTRL_ADDR_MASK /;"	d
P2WI_PM_DEV_ADDR	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_DEV_ADDR(/;"	d
P2WI_PM_DEV_ADDR	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_DEV_ADDR(/;"	d
P2WI_PM_DEV_ADDR_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_DEV_ADDR_MASK /;"	d
P2WI_PM_DEV_ADDR_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_DEV_ADDR_MASK /;"	d
P2WI_PM_INIT_DATA	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_INIT_DATA(/;"	d
P2WI_PM_INIT_DATA	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_INIT_DATA(/;"	d
P2WI_PM_INIT_DATA_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_INIT_DATA_MASK /;"	d
P2WI_PM_INIT_DATA_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_INIT_DATA_MASK /;"	d
P2WI_PM_INIT_SEND	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_PM_INIT_SEND /;"	d
P2WI_PM_INIT_SEND	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_PM_INIT_SEND /;"	d
P2WI_STAT_LOAD_BUSY	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_LOAD_BUSY /;"	d
P2WI_STAT_LOAD_BUSY	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_LOAD_BUSY /;"	d
P2WI_STAT_TRANS_DONE	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_DONE /;"	d
P2WI_STAT_TRANS_DONE	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_DONE /;"	d
P2WI_STAT_TRANS_ERR	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR /;"	d
P2WI_STAT_TRANS_ERR	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR /;"	d
P2WI_STAT_TRANS_ERR_BYTE_1	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_1 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_1	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_1 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_2	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_2 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_2	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_2 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_3	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_3 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_3	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_3 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_4	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_4 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_4	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_4 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_5	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_5 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_5	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_5 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_6	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_6 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_6	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_6 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_7	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_7 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_7	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_7 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_8	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_8 /;"	d
P2WI_STAT_TRANS_ERR_BYTE_8	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_BYTE_8 /;"	d
P2WI_STAT_TRANS_ERR_MASK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_MASK /;"	d
P2WI_STAT_TRANS_ERR_MASK	arch/arm/include/asm/arch/p2wi.h	/^#define P2WI_STAT_TRANS_ERR_MASK /;"	d
P2_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define P2_GPMC_CONFIG1	/;"	d
P2_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define P2_GPMC_CONFIG2	/;"	d
P2_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define P2_GPMC_CONFIG3	/;"	d
P2_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define P2_GPMC_CONFIG4	/;"	d
P2_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define P2_GPMC_CONFIG5	/;"	d
P2_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define P2_GPMC_CONFIG6	/;"	d
P3	arch/blackfin/lib/memcmp.S	/^	P3 = I0;			\/* s2 *\/$/;"	d
P3	arch/blackfin/lib/memcmp.S	/^	P3 = I0;		\/* quads, and increase the*\/$/;"	d
P3	arch/blackfin/lib/memcmp.S	/^	P3 = I1;$/;"	d
P3	arch/blackfin/lib/memcmp.S	/^	P3 = R1;			\/* P3 = s2 Address  *\/$/;"	d
P3	arch/blackfin/lib/memmove.S	/^	P3 = I0;                  \/* Ammend P3 to updated ptr. *\/$/;"	d
P3	arch/blackfin/lib/memmove.S	/^	P3 = I1;$/;"	d
P3	arch/blackfin/lib/memmove.S	/^	P3 = P3 + P2;$/;"	d
P3	arch/blackfin/lib/memmove.S	/^	P3 = R1;                  \/* P3 = From Address *\/$/;"	d
P3SEG	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P3SEG	/;"	d
P3SEGADDR	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P3SEGADDR(/;"	d
P4P3BO0_CFG	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define P4P3BO0_CFG	/;"	d
P4SEG	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P4SEG	/;"	d
P4SEGADDR	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define P4SEGADDR(/;"	d
P601_BAT	arch/powerpc/include/asm/mmu.h	/^} P601_BAT;$/;"	t	typeref:struct:_P601_BAT
P601_BATL	arch/powerpc/include/asm/mmu.h	/^} P601_BATL;$/;"	t	typeref:struct:_P601_BATL
P601_BATU	arch/powerpc/include/asm/mmu.h	/^} P601_BATU;$/;"	t	typeref:struct:_P601_BATU
PA0	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA0	/;"	d
PA0_AF_ETMTRACESYNC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA0_AF_ETMTRACESYNC /;"	d
PA0_AIN_SPI2_CLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA0_AIN_SPI2_CLK /;"	d
PA1	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA1	/;"	d
PA10	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA10	/;"	d
PA10_PF_CSI_D6	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA10_PF_CSI_D6 /;"	d
PA11	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA11	/;"	d
PA11_PF_CSI_D7	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA11_PF_CSI_D7 /;"	d
PA12	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA12	/;"	d
PA12_PF_CSI_VSYNC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA12_PF_CSI_VSYNC /;"	d
PA13	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA13	/;"	d
PA13_PF_CSI_HSYNC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA13_PF_CSI_HSYNC /;"	d
PA14	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA14	/;"	d
PA14_PF_CSI_PIXCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA14_PF_CSI_PIXCLK /;"	d
PA15	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA15	/;"	d
PA15_PF_I2C_SDA	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA15_PF_I2C_SDA /;"	d
PA16_PF_I2C_SCL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA16_PF_I2C_SCL /;"	d
PA17_AF_ETMTRACEPKT4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA17_AF_ETMTRACEPKT4 /;"	d
PA17_AIN_SPI2_SS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA17_AIN_SPI2_SS /;"	d
PA18_AF_ETMTRACEPKT5	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA18_AF_ETMTRACEPKT5 /;"	d
PA19_AF_ETMTRACEPKT6	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA19_AF_ETMTRACEPKT6 /;"	d
PA1_AOUT_SPI2_RXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA1_AOUT_SPI2_RXD /;"	d
PA1_PF_TIN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA1_PF_TIN /;"	d
PA2	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA2	/;"	d
PA20_AF_ETMTRACEPKT7	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA20_AF_ETMTRACEPKT7 /;"	d
PA21_PF_A0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA21_PF_A0 /;"	d
PA22_PF_CS4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA22_PF_CS4 /;"	d
PA23_PF_CS5	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA23_PF_CS5 /;"	d
PA24_AF_ETMTRACEPKT0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA24_AF_ETMTRACEPKT0 /;"	d
PA24_PF_A16	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA24_PF_A16 /;"	d
PA25_AF_ETMTRACEPKT1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA25_AF_ETMTRACEPKT1 /;"	d
PA25_PF_A17	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA25_PF_A17 /;"	d
PA26_AF_ETMTRACEPKT2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA26_AF_ETMTRACEPKT2 /;"	d
PA26_PF_A18	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA26_PF_A18 /;"	d
PA27_AF_ETMTRACEPKT3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA27_AF_ETMTRACEPKT3 /;"	d
PA27_PF_A19	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA27_PF_A19 /;"	d
PA28_AF_ETMPIPESTAT0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA28_AF_ETMPIPESTAT0 /;"	d
PA28_PF_A20	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA28_PF_A20 /;"	d
PA29_AF_ETMPIPESTAT1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA29_AF_ETMPIPESTAT1 /;"	d
PA29_PF_A21	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA29_PF_A21 /;"	d
PA2_PF_PWM0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA2_PF_PWM0 /;"	d
PA3	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA3	/;"	d
PA30_AF_ETMPIPESTAT2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA30_AF_ETMPIPESTAT2 /;"	d
PA30_PF_A22	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA30_PF_A22 /;"	d
PA31_AF_ETMTRACECLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA31_AF_ETMTRACECLK /;"	d
PA31_PF_A23	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA31_PF_A23 /;"	d
PA3_PF_CSI_MCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA3_PF_CSI_MCLK /;"	d
PA4	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA4	/;"	d
PA4_PF_CSI_D0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA4_PF_CSI_D0 /;"	d
PA5	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA5	/;"	d
PA5_PF_CSI_D1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA5_PF_CSI_D1 /;"	d
PA6	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA6	/;"	d
PA6_PF_CSI_D2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA6_PF_CSI_D2 /;"	d
PA7	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA7	/;"	d
PA7_PF_CSI_D3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA7_PF_CSI_D3 /;"	d
PA8	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA8	/;"	d
PA8_PF_CSI_D4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA8_PF_CSI_D4 /;"	d
PA9	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define PA9	/;"	d
PA9_PF_CSI_D5	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PA9_PF_CSI_D5 /;"	d
PAACE_AF_AP	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_AP	/;"	d
PAACE_AF_AP_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_AP_SHIFT	/;"	d
PAACE_AF_DD	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_DD	/;"	d
PAACE_AF_DD_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_DD_SHIFT	/;"	d
PAACE_AF_PT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_PT	/;"	d
PAACE_AF_PT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_PT /;"	d
PAACE_AF_PT_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_PT_SHIFT	/;"	d
PAACE_AF_PT_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_PT_SHIFT /;"	d
PAACE_AF_V	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_V	/;"	d
PAACE_AF_V_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AF_V_SHIFT	/;"	d
PAACE_AP_PERMS_ALL	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AP_PERMS_ALL /;"	d
PAACE_AP_PERMS_DENIED	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AP_PERMS_DENIED /;"	d
PAACE_AP_PERMS_QUERY	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AP_PERMS_QUERY /;"	d
PAACE_AP_PERMS_UPDATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_AP_PERMS_UPDATE /;"	d
PAACE_ATM_NO_XLATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_ATM_NO_XLATE /;"	d
PAACE_ATM_PAGE_XLATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_ATM_PAGE_XLATE /;"	d
PAACE_ATM_WINDOW_XLATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_ATM_WINDOW_XLATE /;"	d
PAACE_ATM_WIN_PG_XLATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_ATM_WIN_PG_XLATE /;"	d
PAACE_DA_HOST_CR	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_DA_HOST_CR /;"	d
PAACE_DA_HOST_CR_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_DA_HOST_CR_SHIFT /;"	d
PAACE_IA_ATM	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_ATM	/;"	d
PAACE_IA_ATM_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_ATM_SHIFT	/;"	d
PAACE_IA_CID	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_CID	/;"	d
PAACE_IA_CID_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_CID_SHIFT	/;"	d
PAACE_IA_OTM	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_OTM	/;"	d
PAACE_IA_OTM_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_OTM_SHIFT	/;"	d
PAACE_IA_WCE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_WCE	/;"	d
PAACE_IA_WCE_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_IA_WCE_SHIFT	/;"	d
PAACE_M_COHERENCE_REQ	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_M_COHERENCE_REQ /;"	d
PAACE_OTM_IMMEDIATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_OTM_IMMEDIATE /;"	d
PAACE_OTM_INDEXED	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_OTM_INDEXED /;"	d
PAACE_OTM_NO_XLATE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_OTM_NO_XLATE /;"	d
PAACE_OTM_RESERVED	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_OTM_RESERVED /;"	d
PAACE_PT_PRIMARY	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_PT_PRIMARY /;"	d
PAACE_PT_SECONDARY	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_PT_SECONDARY /;"	d
PAACE_V_VALID	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_V_VALID /;"	d
PAACE_WIN_SWSE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_WIN_SWSE	/;"	d
PAACE_WIN_SWSE_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_WIN_SWSE_SHIFT	/;"	d
PAACE_WIN_TWBAL	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_WIN_TWBAL	/;"	d
PAACE_WIN_TWBAL_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAACE_WIN_TWBAL_SHIFT	/;"	d
PACKAGE	scripts/kconfig/lkc.h	/^#define PACKAGE /;"	d
PACKAGE_THERM_INT_HIGH_ENABLE	arch/x86/include/asm/msr-index.h	/^#define PACKAGE_THERM_INT_HIGH_ENABLE	/;"	d
PACKAGE_THERM_INT_LOW_ENABLE	arch/x86/include/asm/msr-index.h	/^#define PACKAGE_THERM_INT_LOW_ENABLE	/;"	d
PACKAGE_THERM_INT_PLN_ENABLE	arch/x86/include/asm/msr-index.h	/^#define PACKAGE_THERM_INT_PLN_ENABLE	/;"	d
PACKAGE_THERM_STATUS_POWER_LIMIT	arch/x86/include/asm/msr-index.h	/^#define PACKAGE_THERM_STATUS_POWER_LIMIT	/;"	d
PACKAGE_THERM_STATUS_PROCHOT	arch/x86/include/asm/msr-index.h	/^#define PACKAGE_THERM_STATUS_PROCHOT	/;"	d
PACKED	tools/kwboot.c	/^#define PACKED /;"	d	file:
PACKED	tools/kwboot.c	/^#define PACKED$/;"	d	file:
PACKED	tools/kwboot.c	/^} PACKED;$/;"	v	typeref:struct:kwboot_block
PACKEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define PACKEN /;"	d
PACKET	drivers/usb/gadget/at91_udc.h	/^#    define PACKET	/;"	d
PACKET	drivers/usb/gadget/at91_udc.h	/^#    define PACKET(/;"	d
PACKETLEN	drivers/net/ethoc.c	/^#define	PACKETLEN	/;"	d	file:
PACKETLEN_MAX	drivers/net/ethoc.c	/^#define	PACKETLEN_MAX(/;"	d	file:
PACKETLEN_MIN	drivers/net/ethoc.c	/^#define	PACKETLEN_MIN(/;"	d	file:
PACKETLEN_MIN_MAX	drivers/net/ethoc.c	/^#define	PACKETLEN_MIN_MAX(/;"	d	file:
PACKET_INCR	post/cpu/ppc4xx/ether.c	/^#define PACKET_INCR	/;"	d	file:
PACKET_REJ_FUNC_AVAIL	board/amcc/bamboo/bamboo.h	/^			    PACKET_REJ_FUNC_AVAIL,$/;"	e	enum:config_list
PACKET_REJ_FUNC_EN	board/amcc/bamboo/bamboo.h	/^			    PACKET_REJ_FUNC_EN,$/;"	e	enum:config_list
PACKET_SIZE_16	include/usb.h	/^	PACKET_SIZE_16  = 1,$/;"	e	enum:__anona650d1980103
PACKET_SIZE_32	include/usb.h	/^	PACKET_SIZE_32  = 2,$/;"	e	enum:__anona650d1980103
PACKET_SIZE_64	include/usb.h	/^	PACKET_SIZE_64  = 3,$/;"	e	enum:__anona650d1980103
PACKET_SIZE_8	include/usb.h	/^	PACKET_SIZE_8   = 0,$/;"	e	enum:__anona650d1980103
PACK_EN	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define PACK_EN	/;"	d
PACR	arch/sh/include/asm/cpu_sh7203.h	/^#define PACR	/;"	d
PACR	arch/sh/include/asm/cpu_sh7264.h	/^#define PACR	/;"	d
PACR	arch/sh/include/asm/cpu_sh7706.h	/^#define PACR	/;"	d
PACR	arch/sh/include/asm/cpu_sh7710.h	/^#define PACR	/;"	d
PACR	arch/sh/include/asm/cpu_sh7720.h	/^#define PACR	/;"	d
PACR	arch/sh/include/asm/cpu_sh7722.h	/^#define PACR /;"	d
PACR	arch/sh/include/asm/cpu_sh7723.h	/^#define PACR /;"	d
PACR	arch/sh/include/asm/cpu_sh7724.h	/^#define PACR /;"	d
PACR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PACR	/;"	d
PACR	drivers/serial/serial_sh.h	/^# define PACR /;"	d
PACR0	arch/m68k/include/asm/m5329.h	/^#define PACR0(/;"	d
PACR1	arch/m68k/include/asm/m5329.h	/^#define PACR1(/;"	d
PACR12	arch/m68k/include/asm/m5329.h	/^#define PACR12(/;"	d
PACR16	arch/m68k/include/asm/m5329.h	/^#define PACR16(/;"	d
PACR17	arch/m68k/include/asm/m5329.h	/^#define PACR17(/;"	d
PACR18	arch/m68k/include/asm/m5329.h	/^#define PACR18(/;"	d
PACR19	arch/m68k/include/asm/m5329.h	/^#define PACR19(/;"	d
PACR2	arch/m68k/include/asm/m5329.h	/^#define PACR2(/;"	d
PACR21	arch/m68k/include/asm/m5329.h	/^#define PACR21(/;"	d
PACR22	arch/m68k/include/asm/m5329.h	/^#define PACR22(/;"	d
PACR23	arch/m68k/include/asm/m5329.h	/^#define PACR23(/;"	d
PACR24	arch/m68k/include/asm/m5329.h	/^#define PACR24(/;"	d
PACR25	arch/m68k/include/asm/m5329.h	/^#define PACR25(/;"	d
PACR26	arch/m68k/include/asm/m5329.h	/^#define PACR26(/;"	d
PACR28	arch/m68k/include/asm/m5329.h	/^#define PACR28(/;"	d
PACR29	arch/m68k/include/asm/m5329.h	/^#define PACR29(/;"	d
PACR30	arch/m68k/include/asm/m5329.h	/^#define PACR30(/;"	d
PACR31	arch/m68k/include/asm/m5329.h	/^#define PACR31(/;"	d
PACR32	arch/m68k/include/asm/m5329.h	/^#define PACR32(/;"	d
PACR33	arch/m68k/include/asm/m5329.h	/^#define PACR33(/;"	d
PACR34	arch/m68k/include/asm/m5329.h	/^#define PACR34(/;"	d
PACR35	arch/m68k/include/asm/m5329.h	/^#define PACR35(/;"	d
PACR36	arch/m68k/include/asm/m5329.h	/^#define PACR36(/;"	d
PACR37	arch/m68k/include/asm/m5329.h	/^#define PACR37(/;"	d
PACR38	arch/m68k/include/asm/m5329.h	/^#define PACR38(/;"	d
PACR40	arch/m68k/include/asm/m5329.h	/^#define PACR40(/;"	d
PACR41	arch/m68k/include/asm/m5329.h	/^#define PACR41(/;"	d
PACR42	arch/m68k/include/asm/m5329.h	/^#define PACR42(/;"	d
PACR43	arch/m68k/include/asm/m5329.h	/^#define PACR43(/;"	d
PACR44	arch/m68k/include/asm/m5329.h	/^#define PACR44(/;"	d
PACR45	arch/m68k/include/asm/m5329.h	/^#define PACR45(/;"	d
PACR46	arch/m68k/include/asm/m5329.h	/^#define PACR46(/;"	d
PACR47	arch/m68k/include/asm/m5329.h	/^#define PACR47(/;"	d
PACR48	arch/m68k/include/asm/m5329.h	/^#define PACR48(/;"	d
PACR56	arch/m68k/include/asm/m5329.h	/^#define PACR56(/;"	d
PACR57	arch/m68k/include/asm/m5329.h	/^#define PACR57(/;"	d
PACR58	arch/m68k/include/asm/m5329.h	/^#define PACR58(/;"	d
PACR8	arch/m68k/include/asm/m5329.h	/^#define PACR8(/;"	d
PACR_A	board/espt/lowlevel_init.S	/^PACR_A:	.long	0xFFEF0000$/;"	l
PACR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PACR_A:		.long	0xffec0000$/;"	l
PACR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PACR_A:		.long	GPIO_BASE + 0x00$/;"	l
PACR_D	board/espt/lowlevel_init.S	/^PACR_D:	.word 	0x1400$/;"	l
PACR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PACR_D	/;"	d	file:
PACR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PACR_D:		.long	0x0000$/;"	l
PACR_SP	arch/m68k/include/asm/m520x.h	/^#define PACR_SP	/;"	d
PACR_SP	arch/m68k/include/asm/m5301x.h	/^#define PACR_SP	/;"	d
PACR_SP	arch/m68k/include/asm/m5329.h	/^#define PACR_SP	/;"	d
PACR_TP	arch/m68k/include/asm/m520x.h	/^#define PACR_TP	/;"	d
PACR_TP	arch/m68k/include/asm/m5301x.h	/^#define PACR_TP	/;"	d
PACR_TP	arch/m68k/include/asm/m5329.h	/^#define PACR_TP	/;"	d
PACR_WP	arch/m68k/include/asm/m520x.h	/^#define PACR_WP	/;"	d
PACR_WP	arch/m68k/include/asm/m5301x.h	/^#define PACR_WP	/;"	d
PACR_WP	arch/m68k/include/asm/m5329.h	/^#define PACR_WP	/;"	d
PAC_REG_BASE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PAC_REG_BASE	/;"	d
PAD0	drivers/spi/fsl_qspi.h	/^#define PAD0(/;"	d
PAD0_FREF_CLK0_OUT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_FREF_CLK0_OUT	/;"	d
PAD0_FREF_CLK3_OUT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_FREF_CLK3_OUT	/;"	d
PAD0_FREF_CLK4_OUT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_FREF_CLK4_OUT	/;"	d
PAD0_FREF_SLICER_IN	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_FREF_SLICER_IN	/;"	d
PAD0_JTAG_NTRST	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_JTAG_NTRST	/;"	d
PAD0_JTAG_RTCK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_JTAG_RTCK	/;"	d
PAD0_JTAG_TDI	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_JTAG_TDI	/;"	d
PAD0_SHIFT	drivers/spi/fsl_qspi.h	/^#define PAD0_SHIFT	/;"	d
PAD0_SIM_IO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SIM_IO	/;"	d
PAD0_SIM_PWRCTRL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SIM_PWRCTRL	/;"	d
PAD0_SIM_RESET	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SIM_RESET	/;"	d
PAD0_SR_SDA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SR_SDA	/;"	d
PAD0_SYS_BOOT6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SYS_BOOT6	/;"	d
PAD0_SYS_NRESPWRON	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SYS_NRESPWRON	/;"	d
PAD0_SYS_PWR_REQ	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD0_SYS_PWR_REQ	/;"	d
PAD1	drivers/spi/fsl_qspi.h	/^#define PAD1(/;"	d
PAD1_FREF_CLK3_REQ	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_FREF_CLK3_REQ	/;"	d
PAD1_FREF_CLK4_REQ	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_FREF_CLK4_REQ	/;"	d
PAD1_FREF_CLK_IOREQ	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_FREF_CLK_IOREQ	/;"	d
PAD1_FREF_XTAL_IN	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_FREF_XTAL_IN	/;"	d
PAD1_JTAG_TCK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_JTAG_TCK	/;"	d
PAD1_JTAG_TDO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_JTAG_TDO	/;"	d
PAD1_JTAG_TMS_TMSC	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_JTAG_TMS_TMSC	/;"	d
PAD1_SHIFT	drivers/spi/fsl_qspi.h	/^#define PAD1_SHIFT	/;"	d
PAD1_SIM_CD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SIM_CD	/;"	d
PAD1_SIM_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SIM_CLK	/;"	d
PAD1_SR_SCL	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SR_SCL	/;"	d
PAD1_SYS_32K	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SYS_32K	/;"	d
PAD1_SYS_BOOT7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SYS_BOOT7	/;"	d
PAD1_SYS_NRESWARM	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SYS_NRESWARM	/;"	d
PAD1_SYS_PWRON_RESET	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PAD1_SYS_PWRON_RESET	/;"	d
PADCONF_MODE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PADCONF_MODE	/;"	d
PADCONF_WAKEUPEVENT_0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PADCONF_WAKEUPEVENT_0	/;"	d
PADCTL_OFFSET	drivers/i2c/kona_i2c.c	/^#define PADCTL_OFFSET	/;"	d	file:
PADCTL_PAD_OUT_EN_MASK	drivers/i2c/kona_i2c.c	/^#define PADCTL_PAD_OUT_EN_MASK	/;"	d	file:
PADDED_SIZE	tools/socfpgaimage.c	/^#define PADDED_SIZE	/;"	d	file:
PADDING	drivers/video/mxc_ipuv3_fb.c	/^#define PADDING /;"	d	file:
PADR	arch/sh/include/asm/cpu_sh7203.h	/^#define PADR	/;"	d
PADR	arch/sh/include/asm/cpu_sh7264.h	/^#define PADR	/;"	d
PADR	arch/sh/include/asm/cpu_sh7706.h	/^#define PADR	/;"	d
PADR	arch/sh/include/asm/cpu_sh7710.h	/^#define PADR	/;"	d
PADR	arch/sh/include/asm/cpu_sh7720.h	/^#define PADR	/;"	d
PADR	arch/sh/include/asm/cpu_sh7722.h	/^#define PADR /;"	d
PADR	arch/sh/include/asm/cpu_sh7723.h	/^#define PADR /;"	d
PADR	arch/sh/include/asm/cpu_sh7724.h	/^#define PADR /;"	d
PADR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PADR	/;"	d
PADR	drivers/serial/serial_sh.h	/^# define PADR	/;"	d
PADR_A	board/espt/lowlevel_init.S	/^PADR_A:	.long	0xFFEF0020$/;"	l
PADR_D	board/espt/lowlevel_init.S	/^PADR_D:	.long	0x00000000$/;"	l
PADS_CTL	drivers/pci/pci_tegra.c	/^#define PADS_CTL	/;"	d	file:
PADS_CTL_IDDQ_1L	drivers/pci/pci_tegra.c	/^#define  PADS_CTL_IDDQ_1L	/;"	d	file:
PADS_CTL_RX_DATA_EN_1L	drivers/pci/pci_tegra.c	/^#define  PADS_CTL_RX_DATA_EN_1L	/;"	d	file:
PADS_CTL_SEL	drivers/pci/pci_tegra.c	/^#define PADS_CTL_SEL	/;"	d	file:
PADS_CTL_TX_DATA_EN_1L	drivers/pci/pci_tegra.c	/^#define  PADS_CTL_TX_DATA_EN_1L	/;"	d	file:
PADS_PLL_CTL_LOCKDET	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_LOCKDET	/;"	d	file:
PADS_PLL_CTL_REFCLK_EXTERNAL	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_REFCLK_EXTERNAL	/;"	d	file:
PADS_PLL_CTL_REFCLK_INTERNAL_CML	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_REFCLK_INTERNAL_CML	/;"	d	file:
PADS_PLL_CTL_REFCLK_INTERNAL_CMOS	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_REFCLK_INTERNAL_CMOS	/;"	d	file:
PADS_PLL_CTL_REFCLK_MASK	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_REFCLK_MASK	/;"	d	file:
PADS_PLL_CTL_RST_B4SM	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_RST_B4SM	/;"	d	file:
PADS_PLL_CTL_TEGRA20	drivers/pci/pci_tegra.c	/^#define PADS_PLL_CTL_TEGRA20	/;"	d	file:
PADS_PLL_CTL_TEGRA30	drivers/pci/pci_tegra.c	/^#define PADS_PLL_CTL_TEGRA30	/;"	d	file:
PADS_PLL_CTL_TXCLKREF_BUF_EN	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_TXCLKREF_BUF_EN	/;"	d	file:
PADS_PLL_CTL_TXCLKREF_DIV10	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_TXCLKREF_DIV10	/;"	d	file:
PADS_PLL_CTL_TXCLKREF_DIV5	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_TXCLKREF_DIV5	/;"	d	file:
PADS_PLL_CTL_TXCLKREF_MASK	drivers/pci/pci_tegra.c	/^#define  PADS_PLL_CTL_TXCLKREF_MASK	/;"	d	file:
PADS_REFCLK_CFG0	drivers/pci/pci_tegra.c	/^#define PADS_REFCLK_CFG0	/;"	d	file:
PADS_REFCLK_CFG1	drivers/pci/pci_tegra.c	/^#define PADS_REFCLK_CFG1	/;"	d	file:
PADS_REFCLK_CFG_DRVI_SHIFT	drivers/pci/pci_tegra.c	/^#define PADS_REFCLK_CFG_DRVI_SHIFT	/;"	d	file:
PADS_REFCLK_CFG_E_TERM_SHIFT	drivers/pci/pci_tegra.c	/^#define PADS_REFCLK_CFG_E_TERM_SHIFT	/;"	d	file:
PADS_REFCLK_CFG_PREDI_SHIFT	drivers/pci/pci_tegra.c	/^#define PADS_REFCLK_CFG_PREDI_SHIFT	/;"	d	file:
PADS_REFCLK_CFG_TERM_SHIFT	drivers/pci/pci_tegra.c	/^#define PADS_REFCLK_CFG_TERM_SHIFT	/;"	d	file:
PAD_12MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_12MA	/;"	d
PAD_16MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_16MA	/;"	d
PAD_1V8	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_1V8	/;"	d
PAD_3V3	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_3V3	/;"	d
PAD_4MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_4MA	/;"	d
PAD_8MA	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_8MA	/;"	d
PAD_AGPINPUT_DELAY	include/radeon.h	/^#define PAD_AGPINPUT_DELAY	/;"	d
PAD_BANK	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_BANK(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_CONFIG_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PAD_CONFIG_PHY_REG	/;"	d
PAD_COUNT	include/memalign.h	/^#define PAD_COUNT(/;"	d
PAD_CTLR_MISC	include/radeon.h	/^#define PAD_CTLR_MISC	/;"	d
PAD_CTLR_STRENGTH	include/radeon.h	/^#define PAD_CTLR_STRENGTH	/;"	d
PAD_CTLR_UPDATE	include/radeon.h	/^#define PAD_CTLR_UPDATE	/;"	d
PAD_CTL_100K_PD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_100K_PD		= 0x0 << 5,$/;"	e	enum:iomux_pad_config
PAD_CTL_100K_PU	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_100K_PU		= 0x1 << 5,$/;"	e	enum:iomux_pad_config
PAD_CTL_22K_PU	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_22K_PU		= 0x3 << 5,$/;"	e	enum:iomux_pad_config
PAD_CTL_47K_PU	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_47K_PU		= 0x2 << 5,$/;"	e	enum:iomux_pad_config
PAD_CTL_DRV_HIGH	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_DRV_HIGH	= 0x1 << 1,$/;"	e	enum:iomux_pad_config
PAD_CTL_DRV_MAX	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_DRV_MAX		= 0x2 << 1,$/;"	e	enum:iomux_pad_config
PAD_CTL_DRV_NORMAL	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_DRV_NORMAL	= 0x0 << 1,$/;"	e	enum:iomux_pad_config
PAD_CTL_DSE_120ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_120ohm	/;"	d
PAD_CTL_DSE_150ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_150ohm	/;"	d
PAD_CTL_DSE_1P8V_140OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_1P8V_140OHM /;"	d
PAD_CTL_DSE_1P8V_23OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_1P8V_23OHM /;"	d
PAD_CTL_DSE_1P8V_35OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_1P8V_35OHM /;"	d
PAD_CTL_DSE_1P8V_70OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_1P8V_70OHM /;"	d
PAD_CTL_DSE_20ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_20ohm	/;"	d
PAD_CTL_DSE_240ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_240ohm	/;"	d
PAD_CTL_DSE_25ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_25ohm	/;"	d
PAD_CTL_DSE_34ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_34ohm	/;"	d
PAD_CTL_DSE_3P3V_196OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_3P3V_196OHM /;"	d
PAD_CTL_DSE_3P3V_32OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_3P3V_32OHM /;"	d
PAD_CTL_DSE_3P3V_49OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_3P3V_49OHM /;"	d
PAD_CTL_DSE_3P3V_98OHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_3P3V_98OHM /;"	d
PAD_CTL_DSE_40ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_40ohm	/;"	d
PAD_CTL_DSE_48ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_48ohm	/;"	d
PAD_CTL_DSE_50ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_50ohm	/;"	d
PAD_CTL_DSE_60ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_60ohm	/;"	d
PAD_CTL_DSE_80ohm	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_80ohm	/;"	d
PAD_CTL_DSE_DISABLE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_DISABLE	/;"	d
PAD_CTL_DSE_HIGH	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_HIGH	/;"	d
PAD_CTL_DSE_LOW	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_LOW	/;"	d
PAD_CTL_DSE_MAX	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_MAX	/;"	d
PAD_CTL_DSE_MED	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DSE_MED	/;"	d
PAD_CTL_DVS	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_DVS	/;"	d
PAD_CTL_HYS	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_HYS	/;"	d
PAD_CTL_HYS	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_HYS /;"	d
PAD_CTL_HYS_CMOS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_HYS_CMOS	= 0x0 << 4,$/;"	e	enum:iomux_pad_config
PAD_CTL_HYS_SCHMITZ	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_HYS_SCHMITZ	= 0x1 << 4,$/;"	e	enum:iomux_pad_config
PAD_CTL_IBE_ENABLE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_IBE_ENABLE	/;"	d
PAD_CTL_INPUT_DDR	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_INPUT_DDR	/;"	d
PAD_CTL_INPUT_DIFFERENTIAL	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_INPUT_DIFFERENTIAL /;"	d
PAD_CTL_LOOPBACK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_LOOPBACK	= 0x1 << 9,$/;"	e	enum:iomux_pad_config
PAD_CTL_LVE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_LVE	/;"	d
PAD_CTL_LVE_BIT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_LVE_BIT	/;"	d
PAD_CTL_NOLOOPBACK	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_NOLOOPBACK	= 0x0 << 9,$/;"	e	enum:iomux_pad_config
PAD_CTL_OBE_ENABLE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_OBE_ENABLE	/;"	d
PAD_CTL_OBE_IBE_ENABLE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_OBE_IBE_ENABLE	/;"	d
PAD_CTL_ODE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_ODE	/;"	d
PAD_CTL_ODE_CMOS	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_ODE_CMOS	= 0x0 << 3,$/;"	e	enum:iomux_pad_config
PAD_CTL_ODE_OpenDrain	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_ODE_OpenDrain	= 0x1 << 3,$/;"	e	enum:iomux_pad_config
PAD_CTL_PKE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PKE	/;"	d
PAD_CTL_PKE_ENABLE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_PKE_ENABLE	= 0x1 << 8,$/;"	e	enum:iomux_pad_config
PAD_CTL_PKE_NONE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_PKE_NONE	= 0x0 << 8,$/;"	e	enum:iomux_pad_config
PAD_CTL_PUE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUE	/;"	d
PAD_CTL_PUE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUE /;"	d
PAD_CTL_PUE_KEEPER	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_PUE_KEEPER	= 0x0 << 7,$/;"	e	enum:iomux_pad_config
PAD_CTL_PUE_PUD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_PUE_PUD		= 0x1 << 7,$/;"	e	enum:iomux_pad_config
PAD_CTL_PUS_100K_DOWN	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_100K_DOWN	/;"	d
PAD_CTL_PUS_100K_UP	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_100K_UP	/;"	d
PAD_CTL_PUS_22K_UP	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_22K_UP	/;"	d
PAD_CTL_PUS_47K_UP	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_47K_UP	/;"	d
PAD_CTL_PUS_PD100KOHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_PD100KOHM /;"	d
PAD_CTL_PUS_PU100KOHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_PU100KOHM /;"	d
PAD_CTL_PUS_PU47KOHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_PU47KOHM /;"	d
PAD_CTL_PUS_PU5KOHM	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_PUS_PU5KOHM /;"	d
PAD_CTL_SPEED_HIGH	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SPEED_HIGH	/;"	d
PAD_CTL_SPEED_LOW	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SPEED_LOW	/;"	d
PAD_CTL_SPEED_MED	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SPEED_MED	/;"	d
PAD_CTL_SRE	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SRE	/;"	d
PAD_CTL_SRE_FAST	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_SRE_FAST	= 0x1 << 0$/;"	e	enum:iomux_pad_config
PAD_CTL_SRE_FAST	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SRE_FAST	/;"	d
PAD_CTL_SRE_FAST	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SRE_FAST /;"	d
PAD_CTL_SRE_SLOW	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	PAD_CTL_SRE_SLOW	= 0x0 << 0,$/;"	e	enum:iomux_pad_config
PAD_CTL_SRE_SLOW	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SRE_SLOW	/;"	d
PAD_CTL_SRE_SLOW	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_CTL_SRE_SLOW /;"	d
PAD_CTRL_BASE	arch/arm/include/asm/arch-am33xx/mux.h	/^#define PAD_CTRL_BASE	/;"	d
PAD_CTRL_GND	board/inversepath/usbarmory/usbarmory.c	/^#define PAD_CTRL_GND	/;"	d	file:
PAD_CTRL_UP	board/inversepath/usbarmory/usbarmory.c	/^#define PAD_CTRL_UP	/;"	d	file:
PAD_DMEM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_DMEM	/;"	d
PAD_MA	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_MA(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_MA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_MA	/;"	d
PAD_MANUAL_OVERRIDE	include/radeon.h	/^#define PAD_MANUAL_OVERRIDE	/;"	d
PAD_MA_VALID	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_MDLSB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_MDLSB	/;"	d
PAD_MDMSB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_MDMSB	/;"	d
PAD_MUXSEL	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_MUXSEL_0	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_MUXSEL_0	/;"	d
PAD_MUXSEL_1	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_MUXSEL_1	/;"	d
PAD_MUXSEL_2	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_MUXSEL_2	/;"	d
PAD_MUXSEL_GPIO	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_MUXSEL_GPIO	/;"	d
PAD_MUX_MODE_SHIFT	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define PAD_MUX_MODE_SHIFT	/;"	d
PAD_NOPULL	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_NOPULL	/;"	d
PAD_ODT_CALIB_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PAD_ODT_CALIB_PHY_REG	/;"	d
PAD_PIN	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_PIN(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_PRE_DISABLE_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PAD_PRE_DISABLE_PHY_REG	/;"	d
PAD_PULL	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_PULL(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_PULLUP	arch/arm/include/asm/arch-mxs/iomux.h	/^#define PAD_PULLUP	/;"	d
PAD_PULL_VALID	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_RETENTION_DRAM_COREBLK_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PAD_RETENTION_DRAM_COREBLK_VAL	/;"	d
PAD_SCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_SCLK	/;"	d
PAD_SDCLK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_SDCLK	/;"	d
PAD_SDCS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_SDCS	/;"	d
PAD_SIZE	include/memalign.h	/^#define PAD_SIZE(/;"	d
PAD_SMEM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	PAD_SMEM	/;"	d
PAD_TO_BLOCKSIZE	include/blk.h	/^#define PAD_TO_BLOCKSIZE(/;"	d
PAD_VOL	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_VOL(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_VOL_VALID	arch/arm/include/asm/arch-mxs/iomux.h	/^static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)$/;"	f	typeref:typename:unsigned int
PAD_ZRI_CALIB_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PAD_ZRI_CALIB_PHY_REG	/;"	d
PAGE	include/fsl_sec.h	/^#define PAGE(/;"	d
PAGE0_SET	drivers/net/ax88796.h	/^#define PAGE0_SET	/;"	d
PAGE1_SET	drivers/net/ax88796.h	/^#define PAGE1_SET	/;"	d
PAGEBURSTACCESSTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define PAGEBURSTACCESSTIME(/;"	d
PAGEPOLICY_HIGH	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PAGEPOLICY_HIGH	/;"	d
PAGES_PER_BLOCK	drivers/mtd/nand/denali.h	/^#define PAGES_PER_BLOCK	/;"	d
PAGES_PER_BLOCK	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define PAGES_PER_BLOCK /;"	d	file:
PAGES_PER_BLOCK	include/dataflash.h	/^#define	PAGES_PER_BLOCK	/;"	d
PAGES_PER_BLOCK__VALUE	drivers/mtd/nand/denali.h	/^#define     PAGES_PER_BLOCK__VALUE	/;"	d
PAGES_PER_CHIP_MAX	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define PAGES_PER_CHIP_MAX /;"	d	file:
PAGETABLE_SIZE	arch/x86/cpu/cpu.c	/^#define PAGETABLE_SIZE	/;"	d	file:
PAGE_1	include/fsl_sec.h	/^#define PAGE_1	/;"	d
PAGE_2K	drivers/mtd/nand/vf610_nfc.c	/^#define PAGE_2K	/;"	d	file:
PAGE_2K	drivers/mtd/onenand/onenand_spl.c	/^	PAGE_2K = 2048,$/;"	e	enum:onenand_spl_pagesize	file:
PAGE_4K	drivers/mtd/onenand/onenand_spl.c	/^	PAGE_4K = 4096,$/;"	e	enum:onenand_spl_pagesize	file:
PAGE_AVAILABLE	include/fsl_sec.h	/^#define PAGE_AVAILABLE	/;"	d
PAGE_CACHE_SHIFT	drivers/usb/gadget/f_mass_storage.c	/^#define PAGE_CACHE_SHIFT	/;"	d	file:
PAGE_CACHE_SHIFT	fs/ubifs/ubifs.h	/^#define PAGE_CACHE_SHIFT	/;"	d
PAGE_CACHE_SIZE	drivers/usb/gadget/f_mass_storage.c	/^#define PAGE_CACHE_SIZE	/;"	d	file:
PAGE_CACHE_SIZE	fs/ubifs/ubifs.h	/^#define PAGE_CACHE_SIZE	/;"	d
PAGE_CHUNK_SIZE	drivers/mtd/nand/pxa3xx_nand.c	/^#define PAGE_CHUNK_SIZE	/;"	d	file:
PAGE_CNT	drivers/mtd/nand/denali.h	/^#define PAGE_CNT(/;"	d
PAGE_INTERLEAVING	include/configs/sbc8641d.h	/^#define PAGE_INTERLEAVING	/;"	d
PAGE_INVALIDATE_T	arch/mips/include/asm/cacheops.h	/^#define PAGE_INVALIDATE_T	/;"	d
PAGE_MASK	arch/arm/include/asm/armv8/mmu.h	/^#define PAGE_MASK	/;"	d
PAGE_MASK	arch/sparc/include/asm/page.h	/^#define PAGE_MASK /;"	d
PAGE_OFFSET	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define PAGE_OFFSET /;"	d
PAGE_OFFSET	arch/mips/include/asm/mach-generic/spaces.h	/^#define PAGE_OFFSET	/;"	d
PAGE_OFFSET	arch/sparc/cpu/leon2/prom.c	/^#define PAGE_OFFSET /;"	d	file:
PAGE_OFFSET	arch/sparc/cpu/leon3/prom.c	/^#define PAGE_OFFSET /;"	d	file:
PAGE_OWNED	include/fsl_sec.h	/^#define PAGE_OWNED	/;"	d
PAGE_SHIFT	arch/arm/include/asm/armv8/mmu.h	/^#define PAGE_SHIFT	/;"	d
PAGE_SHIFT	arch/sparc/include/asm/page.h	/^#define PAGE_SHIFT /;"	d
PAGE_SIZE	arch/arm/include/asm/armv8/mmu.h	/^#define PAGE_SIZE	/;"	d
PAGE_SIZE	arch/sparc/include/asm/page.h	/^#define PAGE_SIZE /;"	d
PAGE_SIZE	arch/sparc/lib/bootm.c	/^#define PAGE_SIZE /;"	d	file:
PAGE_SIZE	arch/xtensa/include/asm/cacheasm.h	/^#define PAGE_SIZE /;"	d
PAGE_SIZE	drivers/mmc/dw_mmc.c	/^#define PAGE_SIZE /;"	d	file:
PAGE_SIZE	include/lcd.h	/^#define PAGE_SIZE	/;"	d
PAGE_SIZE	include/linux/compat.h	/^#define PAGE_SIZE	/;"	d
PAGE_SIZE_16KB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_16KB	/;"	d
PAGE_SIZE_16MB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_16MB	/;"	d
PAGE_SIZE_1K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	PAGE_SIZE_1K,$/;"	e	enum:hws_page_size
PAGE_SIZE_1KB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_1KB	/;"	d
PAGE_SIZE_1MB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_1MB	/;"	d
PAGE_SIZE_2K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	PAGE_SIZE_2K$/;"	e	enum:hws_page_size
PAGE_SIZE_4KB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_4KB	/;"	d
PAGE_SIZE_4MB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_4MB	/;"	d
PAGE_SIZE_64KB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_64KB	/;"	d
PAGE_SIZE_64MB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_64MB	/;"	d
PAGE_SIZE_MASK	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_MASK	/;"	d
PAGE_SIZE_SHIFT	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PAGE_SIZE_SHIFT	/;"	d
PAIRED_PHYS_TO_PHYS	include/configs/MPC8641HPCN.h	/^#define PAIRED_PHYS_TO_PHYS(/;"	d
PALETTE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define PALETTE	/;"	d
PALETTE_30_DATA	include/radeon.h	/^#define PALETTE_30_DATA	/;"	d
PALETTE_AND_DATA	drivers/video/da8xx-fb.c	/^#define PALETTE_AND_DATA	/;"	d	file:
PALETTE_DATA	include/radeon.h	/^#define PALETTE_DATA	/;"	d
PALETTE_INDEX	include/radeon.h	/^#define PALETTE_INDEX	/;"	d
PALETTE_ONLY	drivers/video/da8xx-fb.c	/^#define PALETTE_ONLY	/;"	d	file:
PALETTE_SIZE	drivers/video/da8xx-fb.c	/^#define PALETTE_SIZE	/;"	d	file:
PALL_SSC_RESET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PALL_SSC_RESET	/;"	d
PALMAS	include/power/palmas.h	/^#define	PALMAS	/;"	d
PALMAS_H	include/palmas.h	/^#define PALMAS_H$/;"	d
PALMAS_I2C_ADDR	include/power/palmas.h	/^#define PALMAS_I2C_ADDR	/;"	d
PALMAS_LDO_DRIVER	include/power/palmas.h	/^#define PALMAS_LDO_DRIVER /;"	d
PALMAS_LDO_MODE_MASK	include/power/palmas.h	/^#define PALMAS_LDO_MODE_MASK	/;"	d
PALMAS_LDO_NUM	include/power/palmas.h	/^#define PALMAS_LDO_NUM	/;"	d
PALMAS_LDO_STATUS_MASK	include/power/palmas.h	/^#define PALMAS_LDO_STATUS_MASK	/;"	d
PALMAS_LDO_VOLT_MASK	include/power/palmas.h	/^#define PALMAS_LDO_VOLT_MASK /;"	d
PALMAS_LDO_VOLT_MAX	include/power/palmas.h	/^#define PALMAS_LDO_VOLT_MAX /;"	d
PALMAS_LDO_VOLT_MAX_HEX	include/power/palmas.h	/^#define PALMAS_LDO_VOLT_MAX_HEX /;"	d
PALMAS_SMPS_BASE_VOLT_UV	arch/arm/include/asm/arch-omap5/clock.h	/^#define PALMAS_SMPS_BASE_VOLT_UV /;"	d
PALMAS_SMPS_DRIVER	include/power/palmas.h	/^#define PALMAS_SMPS_DRIVER /;"	d
PALMAS_SMPS_MODE_MASK	include/power/palmas.h	/^#define PALMAS_SMPS_MODE_MASK	/;"	d
PALMAS_SMPS_NUM	include/power/palmas.h	/^#define PALMAS_SMPS_NUM	/;"	d
PALMAS_SMPS_RANGE_MASK	include/power/palmas.h	/^#define PALMAS_SMPS_RANGE_MASK	/;"	d
PALMAS_SMPS_STATUS_MASK	include/power/palmas.h	/^#define	PALMAS_SMPS_STATUS_MASK	/;"	d
PALMAS_SMPS_VOLT_MASK	include/power/palmas.h	/^#define PALMAS_SMPS_VOLT_MASK	/;"	d
PALMAS_SMPS_VOLT_MAX	include/power/palmas.h	/^#define PALMAS_SMPS_VOLT_MAX	/;"	d
PALMAS_SMPS_VOLT_MAX_HEX	include/power/palmas.h	/^#define PALMAS_SMPS_VOLT_MAX_HEX	/;"	d
PAL_BDC_CR	drivers/usb/eth/r8152.h	/^#define PAL_BDC_CR	/;"	d
PAL_C	drivers/bios_emulator/include/biosemu.h	/^#define PAL_C /;"	d
PAM	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PAM	/;"	d
PAM0	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM0	/;"	d
PAM0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM0	/;"	d
PAM1	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM1	/;"	d
PAM1	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM1	/;"	d
PAM2	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM2	/;"	d
PAM2	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM2	/;"	d
PAM3	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM3	/;"	d
PAM3	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM3	/;"	d
PAM4	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM4	/;"	d
PAM4	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM4	/;"	d
PAM5	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM5	/;"	d
PAM5	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM5	/;"	d
PAM6	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PAM6	/;"	d
PAM6	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PAM6	/;"	d
PAMAC0_DLY_CNTL	include/radeon.h	/^#define PAMAC0_DLY_CNTL	/;"	d
PAMAC1_DLY_CNTL	include/radeon.h	/^#define PAMAC1_DLY_CNTL	/;"	d
PAMAC2_DLY_CNTL	include/radeon.h	/^#define PAMAC2_DLY_CNTL	/;"	d
PAMU_OFFSET	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAMU_OFFSET /;"	d
PAMU_PAGE_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAMU_PAGE_SHIFT /;"	d
PAMU_PAGE_SIZE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAMU_PAGE_SIZE /;"	d
PAMU_PCR_OFFSET	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAMU_PCR_OFFSET /;"	d
PAMU_PCR_PE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAMU_PCR_PE	/;"	d
PAMU_TABLE_ALIGNMENT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PAMU_TABLE_ALIGNMENT /;"	d
PAM_NUM	arch/x86/include/asm/arch-qemu/qemu.h	/^#define PAM_NUM	/;"	d
PAM_RW	arch/x86/include/asm/arch-qemu/qemu.h	/^#define PAM_RW	/;"	d
PANDA_BOARD_ID_1_GPIO	board/ti/panda/panda.c	/^#define PANDA_BOARD_ID_1_GPIO /;"	d	file:
PANDA_BOARD_ID_2_GPIO	board/ti/panda/panda.c	/^#define PANDA_BOARD_ID_2_GPIO /;"	d	file:
PANDA_ES_BOARD_ID_1_GPIO	board/ti/panda/panda.c	/^#define PANDA_ES_BOARD_ID_1_GPIO /;"	d	file:
PANDA_ES_BOARD_ID_3_GPIO	board/ti/panda/panda.c	/^#define PANDA_ES_BOARD_ID_3_GPIO /;"	d	file:
PANDA_ES_BOARD_ID_4_GPIO	board/ti/panda/panda.c	/^#define PANDA_ES_BOARD_ID_4_GPIO /;"	d	file:
PANDA_ULPI_PHY_TYPE_GPIO	board/ti/panda/panda.c	/^#define PANDA_ULPI_PHY_TYPE_GPIO /;"	d	file:
PANEL_LCD_SIZE	arch/arm/include/asm/arch-omap3/dss.h	/^#define PANEL_LCD_SIZE(/;"	d
PANEL_LIGHT_OFF_DELAY_MASK	drivers/video/i915_reg.h	/^#define  PANEL_LIGHT_OFF_DELAY_MASK	/;"	d
PANEL_LIGHT_OFF_DELAY_SHIFT	drivers/video/i915_reg.h	/^#define  PANEL_LIGHT_OFF_DELAY_SHIFT	/;"	d
PANEL_LIGHT_ON_DELAY_MASK	drivers/video/i915_reg.h	/^#define  PANEL_LIGHT_ON_DELAY_MASK	/;"	d
PANEL_LIGHT_ON_DELAY_SHIFT	drivers/video/i915_reg.h	/^#define  PANEL_LIGHT_ON_DELAY_SHIFT	/;"	d
PANEL_NAME_SIZE	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^#define PANEL_NAME_SIZE	/;"	d
PANEL_PORT_SELECT_DPA	drivers/video/i915_reg.h	/^#define  PANEL_PORT_SELECT_DPA	/;"	d
PANEL_PORT_SELECT_DPC	drivers/video/i915_reg.h	/^#define  PANEL_PORT_SELECT_DPC	/;"	d
PANEL_PORT_SELECT_DPD	drivers/video/i915_reg.h	/^#define  PANEL_PORT_SELECT_DPD	/;"	d
PANEL_PORT_SELECT_LVDS	drivers/video/i915_reg.h	/^#define  PANEL_PORT_SELECT_LVDS	/;"	d
PANEL_PORT_SELECT_MASK	drivers/video/i915_reg.h	/^#define  PANEL_PORT_SELECT_MASK	/;"	d
PANEL_POWER_CYCLE_DELAY_MASK	drivers/video/i915_reg.h	/^#define  PANEL_POWER_CYCLE_DELAY_MASK	/;"	d
PANEL_POWER_CYCLE_DELAY_SHIFT	drivers/video/i915_reg.h	/^#define  PANEL_POWER_CYCLE_DELAY_SHIFT	/;"	d
PANEL_POWER_DOWN_DELAY_MASK	drivers/video/i915_reg.h	/^#define  PANEL_POWER_DOWN_DELAY_MASK	/;"	d
PANEL_POWER_DOWN_DELAY_SHIFT	drivers/video/i915_reg.h	/^#define  PANEL_POWER_DOWN_DELAY_SHIFT	/;"	d
PANEL_POWER_OFF	drivers/video/i915_reg.h	/^#define  PANEL_POWER_OFF	/;"	d
PANEL_POWER_ON	drivers/video/i915_reg.h	/^#define  PANEL_POWER_ON	/;"	d
PANEL_POWER_PORT_DP_A	drivers/video/i915_reg.h	/^#define  PANEL_POWER_PORT_DP_A	/;"	d
PANEL_POWER_PORT_DP_C	drivers/video/i915_reg.h	/^#define  PANEL_POWER_PORT_DP_C	/;"	d
PANEL_POWER_PORT_DP_D	drivers/video/i915_reg.h	/^#define  PANEL_POWER_PORT_DP_D	/;"	d
PANEL_POWER_PORT_LVDS	drivers/video/i915_reg.h	/^#define  PANEL_POWER_PORT_LVDS	/;"	d
PANEL_POWER_PORT_SELECT_MASK	drivers/video/i915_reg.h	/^#define  PANEL_POWER_PORT_SELECT_MASK	/;"	d
PANEL_POWER_RESET	drivers/video/i915_reg.h	/^#define  PANEL_POWER_RESET	/;"	d
PANEL_POWER_UP_DELAY_MASK	drivers/video/i915_reg.h	/^#define  PANEL_POWER_UP_DELAY_MASK	/;"	d
PANEL_POWER_UP_DELAY_SHIFT	drivers/video/i915_reg.h	/^#define  PANEL_POWER_UP_DELAY_SHIFT	/;"	d
PANEL_TIMING_H	arch/arm/include/asm/arch-omap3/dss.h	/^#define PANEL_TIMING_H(/;"	d
PANEL_TIMING_V	arch/arm/include/asm/arch-omap3/dss.h	/^#define PANEL_TIMING_V(/;"	d
PANEL_UNLOCK_MASK	drivers/video/i915_reg.h	/^#define  PANEL_UNLOCK_MASK	/;"	d
PANEL_UNLOCK_REGS	drivers/video/i915_reg.h	/^#define  PANEL_UNLOCK_REGS	/;"	d
PANIC	arch/mips/include/asm/asm.h	/^#define PANIC(/;"	d
PAR	cmd/immap.c	/^		PAR,$/;"	e	enum:do_iopset::__anonb0469eed0103	file:
PAR	include/sym53c8xx.h	/^  #define   PAR /;"	d
PARAM	scripts/kconfig/zconf.l	/^%x COMMAND HELP STRING PARAM$/;"	c
PARAM	scripts/kconfig/zconf.lex.c	/^#define PARAM /;"	d	file:
PARAM_ACTIVE_DELAY_COUNT	drivers/usb/host/ehci-tegra.c	/^	PARAM_ACTIVE_DELAY_COUNT,       \/* PLL-U Active delay count *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_BIAS_TIME	drivers/usb/host/ehci-tegra.c	/^	PARAM_BIAS_TIME,                \/* 20US DELAY AFter bias cell op *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_COUNT	drivers/usb/host/ehci-tegra.c	/^	PARAM_COUNT$/;"	e	enum:__anon321e96a30103	file:
PARAM_CPCON	drivers/usb/host/ehci-tegra.c	/^	PARAM_CPCON,                    \/* BASE PLLC CHARGE Pump setup ctrl *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_DEBOUNCE_A_TIME	drivers/usb/host/ehci-tegra.c	/^	PARAM_DEBOUNCE_A_TIME,          \/* 10MS DELAY for BIAS_DEBOUNCE_A *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_DIVM	drivers/usb/host/ehci-tegra.c	/^	PARAM_DIVM,                     \/* PLL INPUT DIVIDER *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_DIVN	drivers/usb/host/ehci-tegra.c	/^	PARAM_DIVN,                     \/* PLL FEEDBACK DIVIDer *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_DIVP	drivers/usb/host/ehci-tegra.c	/^	PARAM_DIVP,                     \/* POST DIVIDER (2^N) *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_ENABLE_DELAY_COUNT	drivers/usb/host/ehci-tegra.c	/^	PARAM_ENABLE_DELAY_COUNT,       \/* PLL-U Enable Delay Count *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_ERASE	tools/mxsboot.c	/^		PARAM_ERASE,$/;"	e	enum:parse_ops::param	file:
PARAM_LFCON	drivers/usb/host/ehci-tegra.c	/^	PARAM_LFCON,                    \/* BASE PLLC LOOP FILter setup ctrl *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_NAND	tools/mxsboot.c	/^		PARAM_NAND$/;"	e	enum:parse_ops::param	file:
PARAM_NOT_CARE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PARAM_NOT_CARE	/;"	d
PARAM_NOT_CARE	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^#define PARAM_NOT_CARE	/;"	d	file:
PARAM_OOB	tools/mxsboot.c	/^		PARAM_OOB,$/;"	e	enum:parse_ops::param	file:
PARAM_PART	tools/mxsboot.c	/^		PARAM_PART,$/;"	e	enum:parse_ops::param	file:
PARAM_SD	tools/mxsboot.c	/^		PARAM_SD,$/;"	e	enum:parse_ops::param	file:
PARAM_STABLE_COUNT	drivers/usb/host/ehci-tegra.c	/^	PARAM_STABLE_COUNT,             \/* PLL-U STABLE count *\/$/;"	e	enum:__anon321e96a30103	file:
PARAM_WRITE	tools/mxsboot.c	/^		PARAM_WRITE,$/;"	e	enum:parse_ops::param	file:
PARAM_XTAL_FREQ_COUNT	drivers/usb/host/ehci-tegra.c	/^	PARAM_XTAL_FREQ_COUNT,          \/* PLL-U XTAL frequency count *\/$/;"	e	enum:__anon321e96a30103	file:
PARENT_COUNT_MAX	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define PARENT_COUNT_MAX	/;"	d
PARENT_COUNT_MAX	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define PARENT_COUNT_MAX	/;"	d
PARGS	board/siemens/draco/board.h	/^#define PARGS(/;"	d
PARITY	drivers/bios_emulator/x86emu/prim_ops.c	/^#define PARITY(/;"	d	file:
PART	drivers/mtd/mtdpart.c	/^#define PART(/;"	d	file:
PART1_MASK	include/configs/nokia_rx51.h	/^#define PART1_MASK	/;"	d
PART1_MULL	include/configs/nokia_rx51.h	/^#define PART1_MULL	/;"	d
PART1_NAME	include/configs/nokia_rx51.h	/^#define PART1_NAME	/;"	d
PART1_OFFS	include/configs/nokia_rx51.h	/^#define PART1_OFFS	/;"	d
PART1_SIZE	include/configs/nokia_rx51.h	/^#define PART1_SIZE	/;"	d
PART1_SUFF	include/configs/nokia_rx51.h	/^#define PART1_SUFF	/;"	d
PART2_MASK	include/configs/nokia_rx51.h	/^#define PART2_MASK	/;"	d
PART2_MULL	include/configs/nokia_rx51.h	/^#define PART2_MULL	/;"	d
PART2_NAME	include/configs/nokia_rx51.h	/^#define PART2_NAME	/;"	d
PART2_OFFS	include/configs/nokia_rx51.h	/^#define PART2_OFFS	/;"	d
PART2_SIZE	include/configs/nokia_rx51.h	/^#define PART2_SIZE	/;"	d
PART2_SUFF	include/configs/nokia_rx51.h	/^#define PART2_SUFF	/;"	d
PART3_MASK	include/configs/nokia_rx51.h	/^#define PART3_MASK	/;"	d
PART3_MULL	include/configs/nokia_rx51.h	/^#define PART3_MULL	/;"	d
PART3_NAME	include/configs/nokia_rx51.h	/^#define PART3_NAME	/;"	d
PART3_OFFS	include/configs/nokia_rx51.h	/^#define PART3_OFFS	/;"	d
PART3_SIZE	include/configs/nokia_rx51.h	/^#define PART3_SIZE	/;"	d
PART3_SUFF	include/configs/nokia_rx51.h	/^#define PART3_SUFF	/;"	d
PART4_MASK	include/configs/nokia_rx51.h	/^#define PART4_MASK	/;"	d
PART4_MULL	include/configs/nokia_rx51.h	/^#define PART4_MULL	/;"	d
PART4_NAME	include/configs/nokia_rx51.h	/^#define PART4_NAME	/;"	d
PART4_OFFS	include/configs/nokia_rx51.h	/^#define PART4_OFFS	/;"	d
PART4_SIZE	include/configs/nokia_rx51.h	/^#define PART4_SIZE	/;"	d
PART4_SUFF	include/configs/nokia_rx51.h	/^#define PART4_SUFF	/;"	d
PART5_MASK	include/configs/nokia_rx51.h	/^#define PART5_MASK	/;"	d
PART5_MULL	include/configs/nokia_rx51.h	/^#define PART5_MULL	/;"	d
PART5_NAME	include/configs/nokia_rx51.h	/^#define PART5_NAME	/;"	d
PART5_OFFS	include/configs/nokia_rx51.h	/^#define PART5_OFFS	/;"	d
PART5_SIZE	include/configs/nokia_rx51.h	/^#define PART5_SIZE	/;"	d
PART5_SUFF	include/configs/nokia_rx51.h	/^#define PART5_SUFF	/;"	d
PART6_MASK	include/configs/nokia_rx51.h	/^#define PART6_MASK	/;"	d
PART6_MULL	include/configs/nokia_rx51.h	/^#define PART6_MULL	/;"	d
PART6_NAME	include/configs/nokia_rx51.h	/^#define PART6_NAME	/;"	d
PART6_OFFS	include/configs/nokia_rx51.h	/^#define PART6_OFFS	/;"	d
PART6_SIZE	include/configs/nokia_rx51.h	/^#define PART6_SIZE	/;"	d
PART6_SUFF	include/configs/nokia_rx51.h	/^#define PART6_SUFF	/;"	d
PARTID_CP	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PARTID_CP	/;"	d
PARTID_NO_E	include/mpc83xx.h	/^#define PARTID_NO_E(/;"	d
PARTITION	include/fsl_sec.h	/^#define PARTITION(/;"	d
PARTITION_1	include/fsl_sec.h	/^#define PARTITION_1	/;"	d
PARTITION_BASIC_DATA_GUID	include/part_efi.h	/^#define PARTITION_BASIC_DATA_GUID /;"	d
PARTITION_BL2_BL31	include/cavium/atf_part.h	/^	PARTITION_BL2_BL31 = 1,$/;"	e	enum:__anonfb23dd330103
PARTITION_DEVICE_TREE	include/cavium/atf_part.h	/^	PARTITION_DEVICE_TREE = 4,$/;"	e	enum:__anonfb23dd330103
PARTITION_KERNEL	include/cavium/atf_part.h	/^	PARTITION_KERNEL = 3,$/;"	e	enum:__anonfb23dd330103
PARTITION_LAST	include/cavium/atf_part.h	/^	PARTITION_LAST,$/;"	e	enum:__anonfb23dd330103
PARTITION_LINUX_FILE_SYSTEM_DATA_GUID	include/part_efi.h	/^#define PARTITION_LINUX_FILE_SYSTEM_DATA_GUID /;"	d
PARTITION_LINUX_LVM_GUID	include/part_efi.h	/^#define PARTITION_LINUX_LVM_GUID /;"	d
PARTITION_LINUX_RAID_GUID	include/part_efi.h	/^#define PARTITION_LINUX_RAID_GUID /;"	d
PARTITION_LINUX_SWAP_GUID	include/part_efi.h	/^#define PARTITION_LINUX_SWAP_GUID /;"	d
PARTITION_MAXLEN	cmd/mtdparts.c	/^#define PARTITION_MAXLEN	/;"	d	file:
PARTITION_MSFT_RESERVED_GUID	include/part_efi.h	/^#define PARTITION_MSFT_RESERVED_GUID /;"	d
PARTITION_NBL1FW_REST	include/cavium/atf_part.h	/^	PARTITION_NBL1FW_REST = 0,$/;"	e	enum:__anonfb23dd330103
PARTITION_OWNER	include/fsl_sec.h	/^#define PARTITION_OWNER(/;"	d
PARTITION_SYSTEM_GUID	include/part_efi.h	/^#define PARTITION_SYSTEM_GUID /;"	d
PARTITION_UBOOT	include/cavium/atf_part.h	/^	PARTITION_UBOOT = 2,$/;"	e	enum:__anonfb23dd330103
PARTITION_UEFI	include/cavium/atf_part.h	/^	PARTITION_UEFI = 2,$/;"	e	enum:__anonfb23dd330103
PARTNAME_SZ	include/part_efi.h	/^#define PARTNAME_SZ	/;"	d
PARTS_BOOT	include/configs/odroid.h	/^#define PARTS_BOOT	/;"	d
PARTS_BOOT	include/configs/s5p_goni.h	/^#define PARTS_BOOT	/;"	d
PARTS_BOOT	include/configs/trats.h	/^#define PARTS_BOOT	/;"	d
PARTS_BOOT	include/configs/trats2.h	/^#define PARTS_BOOT	/;"	d
PARTS_BOOTLOADER	include/configs/s5p_goni.h	/^#define PARTS_BOOTLOADER	/;"	d
PARTS_CSA	include/configs/s5p_goni.h	/^#define PARTS_CSA	/;"	d
PARTS_CSA	include/configs/trats.h	/^#define PARTS_CSA	/;"	d
PARTS_CSA	include/configs/trats2.h	/^#define PARTS_CSA	/;"	d
PARTS_CSC	include/configs/s5p_goni.h	/^#define PARTS_CSC	/;"	d
PARTS_CSC	include/configs/trats.h	/^#define PARTS_CSC	/;"	d
PARTS_CSC	include/configs/trats2.h	/^#define PARTS_CSC	/;"	d
PARTS_DATA	include/configs/s5p_goni.h	/^#define PARTS_DATA	/;"	d
PARTS_DATA	include/configs/trats.h	/^#define PARTS_DATA	/;"	d
PARTS_DATA	include/configs/trats2.h	/^#define PARTS_DATA	/;"	d
PARTS_DEFAULT	include/configs/am57xx_evm.h	/^#define PARTS_DEFAULT /;"	d
PARTS_DEFAULT	include/configs/dra7xx_evm.h	/^#define PARTS_DEFAULT /;"	d
PARTS_DEFAULT	include/configs/omap5_uevm.h	/^#define PARTS_DEFAULT /;"	d
PARTS_DEFAULT	include/configs/rockchip-common.h	/^#define PARTS_DEFAULT /;"	d
PARTS_DEFAULT	include/configs/s5p_goni.h	/^#define PARTS_DEFAULT /;"	d
PARTS_DEFAULT	include/configs/ti_omap5_common.h	/^#define PARTS_DEFAULT$/;"	d
PARTS_DEFAULT	include/configs/trats.h	/^#define PARTS_DEFAULT /;"	d
PARTS_DEFAULT	include/configs/trats2.h	/^#define PARTS_DEFAULT /;"	d
PARTS_QBOOT	include/configs/trats.h	/^#define PARTS_QBOOT	/;"	d
PARTS_QBOOT	include/configs/trats2.h	/^#define PARTS_QBOOT	/;"	d
PARTS_ROOT	include/configs/odroid.h	/^#define PARTS_ROOT	/;"	d
PARTS_ROOT	include/configs/s5p_goni.h	/^#define PARTS_ROOT	/;"	d
PARTS_ROOT	include/configs/trats.h	/^#define PARTS_ROOT	/;"	d
PARTS_ROOT	include/configs/trats2.h	/^#define PARTS_ROOT	/;"	d
PARTS_UMS	include/configs/s5p_goni.h	/^#define PARTS_UMS	/;"	d
PARTS_UMS	include/configs/trats.h	/^#define PARTS_UMS	/;"	d
PARTS_UMS	include/configs/trats2.h	/^#define PARTS_UMS	/;"	d
PART_ACCESS_MASK	include/mmc.h	/^#define PART_ACCESS_MASK	/;"	d
PART_ADD_DESC_MAXLEN	cmd/mtdparts.c	/^#define PART_ADD_DESC_MAXLEN /;"	d	file:
PART_AUTO	disk/part.c	/^#define PART_AUTO /;"	d	file:
PART_ENH_ATTRIB	include/mmc.h	/^#define PART_ENH_ATTRIB	/;"	d
PART_OFFSET	fs/cramfs/cramfs.c	/^#define PART_OFFSET(/;"	d	file:
PART_SUPPORT	include/mmc.h	/^#define PART_SUPPORT	/;"	d
PART_TYPE_AMIGA	include/part.h	/^#define PART_TYPE_AMIGA	/;"	d
PART_TYPE_DOS	include/part.h	/^#define PART_TYPE_DOS	/;"	d
PART_TYPE_EFI	include/part.h	/^#define PART_TYPE_EFI	/;"	d
PART_TYPE_ISO	include/part.h	/^#define PART_TYPE_ISO	/;"	d
PART_TYPE_MAC	include/part.h	/^#define PART_TYPE_MAC	/;"	d
PART_TYPE_UNKNOWN	include/part.h	/^#define PART_TYPE_UNKNOWN	/;"	d
PART_UNSPECIFIED	disk/part.c	/^#define PART_UNSPECIFIED /;"	d	file:
PAR_SCL_ENABLE_MASK	arch/m68k/include/asm/m5275.h	/^#define PAR_SCL_ENABLE_MASK	/;"	d
PAR_SDA_ENABLE_MASK	arch/m68k/include/asm/m5275.h	/^#define PAR_SDA_ENABLE_MASK	/;"	d
PASCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PASCR	/;"	d
PASCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PASCR	/;"	d
PASCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PASCR	/;"	d
PASCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PASCR	/;"	d
PASCR_29BIT_D	board/renesas/sh7752evb/lowlevel_init.S	/^PASCR_29BIT_D:		.long	0x00000000$/;"	l
PASCR_29BIT_D	board/renesas/sh7753evb/lowlevel_init.S	/^PASCR_29BIT_D:		.long	0x00000000$/;"	l
PASCR_29BIT_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PASCR_29BIT_D:		.long	0x00000000$/;"	l
PASCR_29BIT_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PASCR_29BIT_D:	.long	0x00000000$/;"	l
PASCR_32BIT_MODE	board/renesas/sh7785lcr/lowlevel_init.S	/^PASCR_32BIT_MODE:	.long	0x80000000	\/* check booting mode *\/$/;"	l
PASCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^PASCR_A:		.long	0xff000070$/;"	l
PASCR_A	board/renesas/sh7753evb/lowlevel_init.S	/^PASCR_A:		.long	0xff000070$/;"	l
PASCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PASCR_A:		.long	0xff000070$/;"	l
PASCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PASCR_A:		.long	0xff000070$/;"	l
PASCR_INIT	board/renesas/sh7752evb/lowlevel_init.S	/^PASCR_INIT:		.long	0x80000080$/;"	l
PASCR_INIT	board/renesas/sh7753evb/lowlevel_init.S	/^PASCR_INIT:		.long	0x80000080$/;"	l
PASCR_INIT	board/renesas/sh7757lcr/lowlevel_init.S	/^PASCR_INIT:		.long	0x80000080$/;"	l
PASCR_INIT	board/renesas/sh7785lcr/lowlevel_init.S	/^PASCR_INIT:	.long	0x80000080	\/* check booting mode *\/$/;"	l
PASR_ALL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PASR_ALL	/;"	d
PASR_B0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PASR_B0	/;"	d
PASR_B0_B1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PASR_B0_B1	/;"	d
PASSIVE_DISPLAY	arch/arm/include/asm/arch-omap3/dss.h	/^#define PASSIVE_DISPLAY	/;"	d
PASS_ALL_BITS	drivers/ddr/altera/sequencer.h	/^#define PASS_ALL_BITS	/;"	d
PASS_ONE_BIT	drivers/ddr/altera/sequencer.h	/^#define PASS_ONE_BIT	/;"	d
PASS_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^	PASS_PLL,$/;"	e	enum:__anonc27926650203
PASS_PLL_1000	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define PASS_PLL_1000	/;"	d
PASS_PLL_1050	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define PASS_PLL_1050 /;"	d
PASS_PLL_1050	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define PASS_PLL_1050	/;"	d
PASS_PLL_1228	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define PASS_PLL_1228 /;"	d
PASS_PLL_1228	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define PASS_PLL_1228	/;"	d
PASS_PLL_983	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define PASS_PLL_983 /;"	d
PASS_PLL_983	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define PASS_PLL_983	/;"	d
PAT	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PAT(/;"	d
PATA_BFIN_H	drivers/block/pata_bfin.h	/^#define PATA_BFIN_H$/;"	d
PATA_BFIN_WAIT_TIMEOUT	drivers/block/pata_bfin.h	/^#define PATA_BFIN_WAIT_TIMEOUT	/;"	d
PATA_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	PATA_BOOT,$/;"	e	enum:boot_device
PATA_DEV_NUM_PER_PORT	drivers/block/pata_bfin.h	/^#define PATA_DEV_NUM_PER_PORT	/;"	d
PATCHLEVEL	Makefile	/^PATCHLEVEL = 11$/;"	m
PATHINF	board/BuR/common/common.c	/^  #define PATHINF /;"	d	file:
PATHTIM	board/BuR/common/common.c	/^  #define PATHTIM /;"	d	file:
PATH_MAX	fs/reiserfs/reiserfs_private.h	/^#define PATH_MAX /;"	d
PATI_BUS_MASTER	board/mpl/pati/pati.h	/^#define PATI_BUS_MASTER /;"	d
PATI_BUS_SIZE_16	board/mpl/pati/pati.h	/^#define PATI_BUS_SIZE_16	/;"	d
PATI_BUS_SIZE_32	board/mpl/pati/pati.h	/^#define PATI_BUS_SIZE_32	/;"	d
PATI_BUS_SIZE_8	board/mpl/pati/pati.h	/^#define PATI_BUS_SIZE_8	/;"	d
PATI_DMASTER_ADDR	board/mpl/pati/pati.h	/^#define PATI_DMASTER_ADDR	/;"	d
PATI_DMASTER_ATTR	board/mpl/pati/pati.h	/^#define PATI_DMASTER_ATTR	/;"	d
PATI_DMASTER_DELAY_WR_0	board/mpl/pati/pati.h	/^#define PATI_DMASTER_DELAY_WR_0	/;"	d
PATI_DMASTER_DELAY_WR_16	board/mpl/pati/pati.h	/^#define PATI_DMASTER_DELAY_WR_16	/;"	d
PATI_DMASTER_DELAY_WR_4	board/mpl/pati/pati.h	/^#define PATI_DMASTER_DELAY_WR_4	/;"	d
PATI_DMASTER_DELAY_WR_8	board/mpl/pati/pati.h	/^#define PATI_DMASTER_DELAY_WR_8	/;"	d
PATI_DMASTER_MASK	board/mpl/pati/pati.h	/^#define PATI_DMASTER_MASK	/;"	d
PATI_DMASTER_MEMORY_EN	board/mpl/pati/pati.h	/^#define PATI_DMASTER_MEMORY_EN	/;"	d
PATI_DMASTER_NOT_REL_PCI	board/mpl/pati/pati.h	/^#define PATI_DMASTER_NOT_REL_PCI	/;"	d
PATI_DMASTER_NOT_WR_INVAL	board/mpl/pati/pati.h	/^#define PATI_DMASTER_NOT_WR_INVAL	/;"	d
PATI_DMASTER_PCI_ADDR	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PCI_ADDR	/;"	d
PATI_DMASTER_PCI_ADDR_MASK	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PCI_ADDR_MASK	/;"	d
PATI_DMASTER_PRE_CONT	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PRE_CONT	/;"	d
PATI_DMASTER_PRE_LIMIT	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PRE_LIMIT	/;"	d
PATI_DMASTER_PRE_SIZE_CNTRL_0	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PRE_SIZE_CNTRL_0	/;"	d
PATI_DMASTER_PRE_SIZE_CNTRL_16	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PRE_SIZE_CNTRL_16	/;"	d
PATI_DMASTER_PRE_SIZE_CNTRL_4	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PRE_SIZE_CNTRL_4	/;"	d
PATI_DMASTER_PRE_SIZE_CNTRL_8	board/mpl/pati/pati.h	/^#define PATI_DMASTER_PRE_SIZE_CNTRL_8	/;"	d
PATI_DMASTER_READ_AHEAD	board/mpl/pati/pati.h	/^#define PATI_DMASTER_READ_AHEAD	/;"	d
PATI_DMASTER_READ_NOT_AHEAD	board/mpl/pati/pati.h	/^#define PATI_DMASTER_READ_NOT_AHEAD	/;"	d
PATI_DMASTER_REL_PCI	board/mpl/pati/pati.h	/^#define PATI_DMASTER_REL_PCI	/;"	d
PATI_DMASTER_WR_INVAL	board/mpl/pati/pati.h	/^#define PATI_DMASTER_WR_INVAL	/;"	d
PATI_EEPROM_LAST_OFFSET	board/mpl/pati/pci_eeprom.h	/^#define PATI_EEPROM_LAST_OFFSET	/;"	d
PATI_ENDIAN_MODE	board/mpl/pati/pati.h	/^#define PATI_ENDIAN_MODE	/;"	d
PATI_EXTRA_LONG_EEPROM	board/mpl/pati/pati.h	/^#define PATI_EXTRA_LONG_EEPROM	/;"	d
PATI_FIRMWARE_START_OFFSET	board/mpl/pati/pati.h	/^#define PATI_FIRMWARE_START_OFFSET	/;"	d
PATI_HW_CPU_ACC	board/mpl/pati/pati.h	/^#define PATI_HW_CPU_ACC	/;"	d
PATI_HW_CPU_SLAVE	board/mpl/pati/pati.h	/^#define PATI_HW_CPU_SLAVE	/;"	d
PATI_HW_PCI_ONLY	board/mpl/pati/pati.h	/^#define PATI_HW_PCI_ONLY	/;"	d
PATI_HW_START	board/mpl/pati/pati.h	/^#define PATI_HW_START	/;"	d
PATI_LOC_CFG_ADDR	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_ADDR	/;"	d
PATI_LOC_CFG_BURST	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_BURST	/;"	d
PATI_LOC_CFG_BUS_SIZE	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_BUS_SIZE	/;"	d
PATI_LOC_CFG_MASK	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_MASK	/;"	d
PATI_LOC_CFG_NO_PREFETCH	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_NO_PREFETCH	/;"	d
PATI_LOC_CFG_SPACE0_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_SPACE0_ATTR /;"	d
PATI_LOC_CFG_SPACE1_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_SPACE1_ATTR /;"	d
PATI_LOC_CFG_TA_ENABLE	board/mpl/pati/pati.h	/^#define PATI_LOC_CFG_TA_ENABLE	/;"	d
PATI_LOC_CPU_ADDR	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_ADDR	/;"	d
PATI_LOC_CPU_BURST	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_BURST	/;"	d
PATI_LOC_CPU_BUS_SIZE	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_BUS_SIZE	/;"	d
PATI_LOC_CPU_MASK	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_MASK	/;"	d
PATI_LOC_CPU_NO_PREFETCH	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_NO_PREFETCH	/;"	d
PATI_LOC_CPU_SPACE0_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_SPACE0_ATTR /;"	d
PATI_LOC_CPU_SPACE1_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_SPACE1_ATTR /;"	d
PATI_LOC_CPU_TA_ENABLE	board/mpl/pati/pati.h	/^#define PATI_LOC_CPU_TA_ENABLE	/;"	d
PATI_LOC_FLASH_ADDR	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_ADDR	/;"	d
PATI_LOC_FLASH_BURST	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_BURST	/;"	d
PATI_LOC_FLASH_BUS_SIZE	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_BUS_SIZE	/;"	d
PATI_LOC_FLASH_MASK	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_MASK	/;"	d
PATI_LOC_FLASH_NO_PREFETCH	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_NO_PREFETCH	/;"	d
PATI_LOC_FLASH_SPACE0_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_SPACE0_ATTR /;"	d
PATI_LOC_FLASH_SPACE1_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_SPACE1_ATTR /;"	d
PATI_LOC_FLASH_TA_ENABLE	board/mpl/pati/pati.h	/^#define PATI_LOC_FLASH_TA_ENABLE	/;"	d
PATI_LOC_SDRAM_ADDR	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_ADDR	/;"	d
PATI_LOC_SDRAM_BURST	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_BURST	/;"	d
PATI_LOC_SDRAM_BUS_SIZE	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_BUS_SIZE	/;"	d
PATI_LOC_SDRAM_MASK	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_MASK	/;"	d
PATI_LOC_SDRAM_NO_PREFETCH	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_NO_PREFETCH	/;"	d
PATI_LOC_SDRAM_SPACE0_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_SPACE0_ATTR /;"	d
PATI_LOC_SDRAM_SPACE1_ATTR	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_SPACE1_ATTR /;"	d
PATI_LOC_SDRAM_TA_ENABLE	board/mpl/pati/pati.h	/^#define PATI_LOC_SDRAM_TA_ENABLE	/;"	d
PATI_SPACE0_MASK	board/mpl/pati/pati.h	/^#define PATI_SPACE0_MASK	/;"	d
PATI_SPACE1_MASK	board/mpl/pati/pati.h	/^#define PATI_SPACE1_MASK	/;"	d
PATTERN1	board/bf537-stamp/post-memory.c	/^#define PATTERN1 /;"	d	file:
PATTERN2	board/bf537-stamp/post-memory.c	/^#define PATTERN2 /;"	d	file:
PATTERN_00	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_00	/;"	d
PATTERN_0080	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_0080	/;"	d
PATTERN_00FF	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_00FF	/;"	d
PATTERN_01	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_01	/;"	d
PATTERN_1	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^#define PATTERN_1	/;"	d	file:
PATTERN_2	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^#define PATTERN_2	/;"	d	file:
PATTERN_20	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_20	/;"	d
PATTERN_55	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_55	/;"	d
PATTERN_55AA	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_55AA	/;"	d
PATTERN_80	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_80	/;"	d
PATTERN_AA	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_AA	/;"	d
PATTERN_ADR	drivers/video/ati_radeon_fb.c	/^#define PATTERN_ADR	/;"	d	file:
PATTERN_ADR	drivers/video/ct69000.c	/^#define PATTERN_ADR	/;"	d	file:
PATTERN_FF	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_FF	/;"	d
PATTERN_FULL_SSO0	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_FULL_SSO0,$/;"	e	enum:hws_pattern
PATTERN_FULL_SSO1	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_FULL_SSO1,$/;"	e	enum:hws_pattern
PATTERN_FULL_SSO2	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_FULL_SSO2,$/;"	e	enum:hws_pattern
PATTERN_FULL_SSO3	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_FULL_SSO3,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ0	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ0,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ1	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ1,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ2	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ2,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ3	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ3,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ4	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ4,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ5	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ5,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ6	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ6,$/;"	e	enum:hws_pattern
PATTERN_KILLER_DQ7	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_KILLER_DQ7,$/;"	e	enum:hws_pattern
PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^	PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR = 0,$/;"	e	enum:__anon07c1cd0f0103	file:
PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^	PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM$/;"	e	enum:__anon07c1cd0f0103	file:
PATTERN_LIMIT	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_LIMIT$/;"	e	enum:hws_pattern
PATTERN_MAXIMUM_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PATTERN_MAXIMUM_LENGTH	/;"	d
PATTERN_PBS1	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_PBS1,$/;"	e	enum:hws_pattern
PATTERN_PBS2	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_PBS2,$/;"	e	enum:hws_pattern
PATTERN_PBS3	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_PBS3,$/;"	e	enum:hws_pattern
PATTERN_PBS_TX_A	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PATTERN_PBS_TX_A /;"	d
PATTERN_PBS_TX_B	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PATTERN_PBS_TX_B /;"	d
PATTERN_RL	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_RL,$/;"	e	enum:hws_pattern
PATTERN_RL2	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_RL2,$/;"	e	enum:hws_pattern
PATTERN_SIZE	drivers/video/ati_radeon_fb.c	/^#define PATTERN_SIZE	/;"	d	file:
PATTERN_SIZE	drivers/video/ct69000.c	/^#define PATTERN_SIZE	/;"	d	file:
PATTERN_STATIC_PBS	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_STATIC_PBS,$/;"	e	enum:hws_pattern
PATTERN_TEST	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_TEST,$/;"	e	enum:hws_pattern
PATTERN_VREF	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^	PATTERN_VREF,$/;"	e	enum:hws_pattern
PAT_ID	test/py/u_boot_console_base.py	/^PAT_ID = 0$/;"	v
PAT_RE	test/py/u_boot_console_base.py	/^PAT_RE = 1$/;"	v
PAUSE_EMEM_PERI_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PAUSE_EMEM_PERI_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
PAUSE_EMEM_PERI_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PAUSE_EMEM_PERI_SHIFT	= 0xe,$/;"	e	enum:__anonbeb2b9771103
PAUSE_MMC_PERI_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PAUSE_MMC_PERI_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
PAUSE_MMC_PERI_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PAUSE_MMC_PERI_SHIFT	= 0xf,$/;"	e	enum:__anonbeb2b9771103
PAUSE_SHIFT	drivers/net/e1000.h	/^#define PAUSE_SHIFT /;"	d
PAUSE_THRESHOLD_DEFAULT	drivers/usb/eth/mcs7830.c	/^#define PAUSE_THRESHOLD_DEFAULT	/;"	d	file:
PAUSE_TMR	drivers/net/dnet.h	/^	u32 PAUSE_TMR;$/;"	m	struct:dnet_registers	typeref:typename:u32
PAUSE_USB_PERI_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PAUSE_USB_PERI_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
PAUSE_USB_PERI_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PAUSE_USB_PERI_SHIFT	= 0xd,$/;"	e	enum:__anonbeb2b9771103
PAXIC_ADBW_BW64	drivers/block/sata_ceva.c	/^#define PAXIC_ADBW_BW64 /;"	d	file:
PAXIC_MARIDD	drivers/block/sata_ceva.c	/^#define PAXIC_MARIDD	/;"	d	file:
PAXIC_MAWIDD	drivers/block/sata_ceva.c	/^#define PAXIC_MAWIDD	/;"	d	file:
PAXIC_OTL	drivers/block/sata_ceva.c	/^#define PAXIC_OTL	/;"	d	file:
PA_ENET_RCLK	include/commproc.h	/^#define PA_ENET_RCLK	/;"	d
PA_ENET_RXD	include/commproc.h	/^#define PA_ENET_RXD	/;"	d
PA_ENET_TCLK	include/commproc.h	/^#define PA_ENET_TCLK	/;"	d
PA_ENET_TXD	include/commproc.h	/^#define PA_ENET_TXD	/;"	d
PA_NBITS	cmd/immap.c	/^#define PA_NBITS	/;"	d	file:
PA_NB_ODR	cmd/immap.c	/^#define PA_NB_ODR	/;"	d	file:
PB0	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB0	/;"	d
PB0AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB0AP	/;"	d
PB0CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB0CR	/;"	d
PB1	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB1	/;"	d
PB10	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB10	/;"	d
PB10_AF_MS_SCLKI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB10_AF_MS_SCLKI /;"	d
PB10_PF_SD_DAT2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB10_PF_SD_DAT2 /;"	d
PB11	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB11	/;"	d
PB11_AF_MS_SDIO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB11_AF_MS_SDIO /;"	d
PB11_PF_SD_DAT3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB11_PF_SD_DAT3 /;"	d
PB12	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB12	/;"	d
PB12_AF_MS_SCLK0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB12_AF_MS_SCLK0 /;"	d
PB12_PF_SD_CLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB12_PF_SD_CLK /;"	d
PB13	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB13	/;"	d
PB13_AF_MS_BS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB13_AF_MS_BS /;"	d
PB13_PF_SD_CMD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB13_PF_SD_CMD /;"	d
PB14	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB14	/;"	d
PB14_AF_SSI_RXFS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB14_AF_SSI_RXFS /;"	d
PB15	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB15	/;"	d
PB15_AF_SSI_RXCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB15_AF_SSI_RXCLK /;"	d
PB16_AF_SSI_RXDAT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB16_AF_SSI_RXDAT /;"	d
PB17_AF_SSI_TXDAT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB17_AF_SSI_TXDAT /;"	d
PB18_AF_SSI_TXFS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB18_AF_SSI_TXFS /;"	d
PB19_AF_SSI_TXCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB19_AF_SSI_TXCLK /;"	d
PB1AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB1AP	/;"	d
PB1CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB1CLK	/;"	d
PB1CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB1CR	/;"	d
PB1DIV	drivers/clk/clk_pic32.c	/^#define PB1DIV	/;"	d	file:
PB2	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB2	/;"	d
PB20_PF_USBD_AFE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB20_PF_USBD_AFE /;"	d
PB21_PF_USBD_OE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB21_PF_USBD_OE /;"	d
PB22_PFUSBD_RCV	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB22_PFUSBD_RCV /;"	d
PB23_PF_USBD_SUSPND	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB23_PF_USBD_SUSPND /;"	d
PB24_PF_USBD_VP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB24_PF_USBD_VP /;"	d
PB25_PF_USBD_VM	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB25_PF_USBD_VM /;"	d
PB26_PF_USBD_VPO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB26_PF_USBD_VPO /;"	d
PB27_PF_USBD_VMO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB27_PF_USBD_VMO /;"	d
PB28_PF_UART2_CTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB28_PF_UART2_CTS /;"	d
PB29_PF_UART2_RTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB29_PF_UART2_RTS /;"	d
PB2AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB2AP	/;"	d
PB2CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB2CLK	/;"	d
PB2CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB2CR	/;"	d
PB3	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB3	/;"	d
PB30_PF_UART2_TXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB30_PF_UART2_TXD /;"	d
PB31_PF_UART2_RXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB31_PF_UART2_RXD /;"	d
PB3AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB3AP	/;"	d
PB3CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB3CLK	/;"	d
PB3CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB3CR	/;"	d
PB4	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB4	/;"	d
PB4AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB4AP	/;"	d
PB4CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB4CLK	/;"	d
PB4CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB4CR	/;"	d
PB4_PF_SD2_D0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PB4_PF_SD2_D0	/;"	d
PB5	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB5	/;"	d
PB5AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB5AP	/;"	d
PB5CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB5CLK	/;"	d
PB5CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB5CR	/;"	d
PB5_PF_SD2_D1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PB5_PF_SD2_D1	/;"	d
PB6	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB6	/;"	d
PB6AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB6AP	/;"	d
PB6CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB6CLK	/;"	d
PB6CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB6CR	/;"	d
PB6_PF_SD2_D2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PB6_PF_SD2_D2	/;"	d
PB7	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB7	/;"	d
PB7AP	arch/powerpc/include/asm/ppc4xx.h	/^#define PB7AP	/;"	d
PB7CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CLK	include/dt-bindings/clock/microchip,clock.h	/^#define PB7CLK	/;"	d
PB7CR	arch/powerpc/include/asm/ppc4xx.h	/^#define PB7CR	/;"	d
PB7_PF_SD2_D3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PB7_PF_SD2_D3	/;"	d
PB8	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB8	/;"	d
PB8_AF_MS_PIO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB8_AF_MS_PIO /;"	d
PB8_PF_SD2_CMD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PB8_PF_SD2_CMD	/;"	d
PB8_PF_SD_DAT0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB8_PF_SD_DAT0 /;"	d
PB9	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define PB9	/;"	d
PB9_AF_MS_PI1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB9_AF_MS_PI1 /;"	d
PB9_PF_SD2_CLK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PB9_PF_SD2_CLK	/;"	d
PB9_PF_SD_DAT1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PB9_PF_SD_DAT1 /;"	d
PBA_SIZE	drivers/net/e1000.h	/^#define PBA_SIZE /;"	d
PBCR	arch/sh/include/asm/cpu_sh7203.h	/^#define PBCR	/;"	d
PBCR	arch/sh/include/asm/cpu_sh7264.h	/^#define PBCR	/;"	d
PBCR	arch/sh/include/asm/cpu_sh7706.h	/^#define PBCR	/;"	d
PBCR	arch/sh/include/asm/cpu_sh7710.h	/^#define PBCR	/;"	d
PBCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PBCR	/;"	d
PBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PBCR /;"	d
PBCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PBCR /;"	d
PBCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PBCR /;"	d
PBCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PBCR	/;"	d
PBCR	drivers/serial/serial_sh.h	/^# define PBCR /;"	d
PBCR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PBCR0_A:	.long 0xFFFE382E$/;"	l
PBCR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PBCR0_D:	.word 0x1110$/;"	l
PBCR1_A	board/renesas/rsk7264/lowlevel_init.S	/^PBCR1_A:	.long 0xFFFE382C$/;"	l
PBCR1_D	board/renesas/rsk7264/lowlevel_init.S	/^PBCR1_D:	.word 0x1111$/;"	l
PBCR2_A	board/renesas/rsk7264/lowlevel_init.S	/^PBCR2_A:	.long 0xFFFE382A$/;"	l
PBCR2_D	board/renesas/rsk7264/lowlevel_init.S	/^PBCR2_D:	.word 0x1111$/;"	l
PBCR3_A	board/renesas/rsk7264/lowlevel_init.S	/^PBCR3_A:	.long 0xFFFE3828$/;"	l
PBCR3_D	board/renesas/rsk7264/lowlevel_init.S	/^PBCR3_D:	.word 0x1111$/;"	l
PBCR4_A	board/renesas/rsk7264/lowlevel_init.S	/^PBCR4_A:	.long 0xFFFE3826$/;"	l
PBCR4_D	board/renesas/rsk7264/lowlevel_init.S	/^PBCR4_D:	.word 0x1111$/;"	l
PBCR5_A	board/renesas/rsk7264/lowlevel_init.S	/^PBCR5_A:	.long 0xFFFE3824$/;"	l
PBCR5_A	board/renesas/rsk7269/lowlevel_init.S	/^PBCR5_A:	.long 0xFFFE3824$/;"	l
PBCR5_D	board/renesas/rsk7264/lowlevel_init.S	/^PBCR5_D:	.word 0x0111$/;"	l
PBCR5_D	board/renesas/rsk7269/lowlevel_init.S	/^PBCR5_D:	.word 0x0111$/;"	l
PBCR_A	board/espt/lowlevel_init.S	/^PBCR_A:	.long	0xFFEF0002$/;"	l
PBCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PBCR_A:		.long	0xffec0002$/;"	l
PBCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PBCR_A:		.long	GPIO_BASE + 0x02$/;"	l
PBCR_D	board/espt/lowlevel_init.S	/^PBCR_D:	.word	0x555A$/;"	l
PBCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PBCR_D	/;"	d	file:
PBCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PBCR_D:		.long	0x0001$/;"	l
PBDIV_MASK	drivers/clk/clk_pic32.c	/^#define PBDIV_MASK	/;"	d	file:
PBDR	arch/sh/include/asm/cpu_sh7203.h	/^#define PBDR	/;"	d
PBDR	arch/sh/include/asm/cpu_sh7264.h	/^#define PBDR	/;"	d
PBDR	arch/sh/include/asm/cpu_sh7706.h	/^#define PBDR	/;"	d
PBDR	arch/sh/include/asm/cpu_sh7710.h	/^#define PBDR	/;"	d
PBDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PBDR	/;"	d
PBDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PBDR /;"	d
PBDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PBDR /;"	d
PBDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PBDR /;"	d
PBDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PBDR	/;"	d
PBDR_A	board/espt/lowlevel_init.S	/^PBDR_A:	.long	0xFFEF0022$/;"	l
PBDR_D	board/espt/lowlevel_init.S	/^PBDR_D:	.long	0x00000000$/;"	l
PBEAR	arch/powerpc/include/asm/ppc4xx.h	/^#define PBEAR	/;"	d
PBESR0	arch/powerpc/include/asm/ppc4xx.h	/^#define PBESR0	/;"	d
PBESR1	arch/powerpc/include/asm/ppc4xx.h	/^#define PBESR1	/;"	d
PBF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PBF	/;"	d
PBIASLITEPWRDNZ0	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define PBIASLITEPWRDNZ0	/;"	d
PBIASLITEPWRDNZ1	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define PBIASLITEPWRDNZ1	/;"	d
PBIASLITEVMODE0	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define PBIASLITEVMODE0	/;"	d
PBIASLITEVMODE1	board/logicpd/omap3som/omap3logic.c	/^#define PBIASLITEVMODE1	/;"	d	file:
PBIASLITEVMODE1	board/pandora/pandora.c	/^#define PBIASLITEVMODE1	/;"	d	file:
PBIASSPEEDCTRL0	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define PBIASSPEEDCTRL0	/;"	d
PBLCRC32_H	tools/pbl_crc32.h	/^#define PBLCRC32_H$/;"	d
PBLIMAGE_H	tools/pblimage.h	/^#define PBLIMAGE_H$/;"	d
PBLK_BA	arch/x86/include/asm/arch-quark/quark.h	/^#define PBLK_BA	/;"	d
PBL_ACS_CONT_CMD	tools/pblimage.c	/^#define PBL_ACS_CONT_CMD	/;"	d	file:
PBL_ADDR_24BIT_MASK	tools/pblimage.c	/^#define PBL_ADDR_24BIT_MASK	/;"	d	file:
PBS00	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define PBS00 /;"	d
PBS01	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define PBS01 /;"	d
PBS02	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define PBS02 /;"	d
PBS03	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define PBS03 /;"	d
PBS_DIFF_LIMIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PBS_DIFF_LIMIT /;"	d
PBS_RX	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	PBS_RX,$/;"	e	enum:auto_tune_stage
PBS_RX_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define PBS_RX_MASK_BIT	/;"	d
PBS_RX_MODE	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	PBS_RX_MODE,$/;"	e	enum:pbs_dir
PBS_RX_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	PBS_RX_MODE,$/;"	e	enum:training_modes
PBS_RX_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PBS_RX_PHY_REG	/;"	d
PBS_TX	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	PBS_TX,$/;"	e	enum:auto_tune_stage
PBS_TX_DM_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	PBS_TX_DM_MODE,$/;"	e	enum:training_modes
PBS_TX_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define PBS_TX_MASK_BIT	/;"	d
PBS_TX_MODE	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	PBS_TX_MODE = 0,$/;"	e	enum:pbs_dir
PBS_TX_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	PBS_TX_MODE,$/;"	e	enum:training_modes
PBS_TX_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PBS_TX_PHY_REG	/;"	d
PBUFSIZ	tools/gdb/remote.c	/^#define	PBUFSIZ /;"	d	file:
PBUSY	drivers/usb/host/r8a66597.h	/^#define	PBUSY	/;"	d
PB_AERR	include/tsi108.h	/^#define PB_AERR	/;"	d
PB_ARB_CTRL	include/tsi108.h	/^#define PB_ARB_CTRL	/;"	d
PB_BSE_FDXDIS	include/commproc.h	/^#define PB_BSE_FDXDIS	/;"	d
PB_BSE_POWERUP	include/commproc.h	/^#define PB_BSE_POWERUP	/;"	d
PB_BUS_MS_SELECT	include/tsi108.h	/^#define PB_BUS_MS_SELECT	/;"	d
PB_ENET_TENA	include/commproc.h	/^#define PB_ENET_TENA	/;"	d
PB_ERRCS	include/tsi108.h	/^#define PB_ERRCS	/;"	d
PB_ERRCS_ES	include/tsi108.h	/^#define PB_ERRCS_ES	/;"	d
PB_ID	include/tsi108.h	/^#define PB_ID	/;"	d
PB_ISR	include/tsi108.h	/^#define PB_ISR	/;"	d
PB_ISR_PBS_RD_ERR	include/tsi108.h	/^#define PB_ISR_PBS_RD_ERR	/;"	d
PB_MCMD	include/tsi108.h	/^#define PB_MCMD	/;"	d
PB_MCR	include/tsi108.h	/^#define PB_MCR	/;"	d
PB_NBITS	cmd/immap.c	/^#define PB_NBITS	/;"	d	file:
PB_NB_ODR	cmd/immap.c	/^#define PB_NB_ODR	/;"	d	file:
PB_OCN_BAR1	include/tsi108.h	/^#define PB_OCN_BAR1	/;"	d
PB_OCN_BAR2	include/tsi108.h	/^#define PB_OCN_BAR2	/;"	d
PB_PVT_CTRL2	include/tsi108.h	/^#define PB_PVT_CTRL2	/;"	d
PB_REG_BAR	include/tsi108.h	/^#define PB_REG_BAR	/;"	d
PB_RSR	include/tsi108.h	/^#define PB_RSR	/;"	d
PB_SCL	include/configs/TQM855M.h	/^#define PB_SCL	/;"	d
PB_SCL	include/configs/TQM866M.h	/^#define PB_SCL	/;"	d
PB_SCL	include/configs/TQM885D.h	/^#define PB_SCL	/;"	d
PB_SCR	include/tsi108.h	/^#define PB_SCR	/;"	d
PB_SDA	include/configs/TQM855M.h	/^#define PB_SDA	/;"	d
PB_SDA	include/configs/TQM866M.h	/^#define PB_SDA	/;"	d
PB_SDA	include/configs/TQM885D.h	/^#define PB_SDA	/;"	d
PB_SDRAM_BAR1	include/tsi108.h	/^#define PB_SDRAM_BAR1	/;"	d
PB_SDRAM_BAR2	include/tsi108.h	/^#define PB_SDRAM_BAR2	/;"	d
PB_SPIMISO	drivers/rtc/ds1306.c	/^#define PB_SPIMISO	/;"	d	file:
PB_SPIMOSI	drivers/rtc/ds1306.c	/^#define PB_SPIMOSI	/;"	d	file:
PB_SPISCK	drivers/rtc/ds1306.c	/^#define	PB_SPISCK	/;"	d	file:
PB_SPI_CE	drivers/rtc/ds1306.c	/^#define PB_SPI_CE	/;"	d	file:
PBxAP	arch/powerpc/cpu/ppc4xx/start.S	/^#  define PBxAP /;"	d	file:
PBxAP_VAL	arch/powerpc/cpu/ppc4xx/start.S	/^#   define PBxAP_VAL /;"	d	file:
PBxAP_VAL	arch/powerpc/cpu/ppc4xx/start.S	/^#  define PBxAP_VAL	/;"	d	file:
PBxCR	arch/powerpc/cpu/ppc4xx/start.S	/^#  define PBxCR /;"	d	file:
PBxCR_VAL	arch/powerpc/cpu/ppc4xx/start.S	/^#   define PBxCR_VAL /;"	d	file:
PBxCR_VAL	arch/powerpc/cpu/ppc4xx/start.S	/^#  define PBxCR_VAL	/;"	d	file:
PC	board/aristainetos/aristainetos.c	/^#define PC /;"	d	file:
PC	board/bachmann/ot1200/ot1200.c	/^#define PC /;"	d	file:
PC	board/barco/platinum/platinum.h	/^#define PC	/;"	d
PC	board/barco/titanium/titanium.c	/^#define PC /;"	d	file:
PC	board/boundary/nitrogen6x/nitrogen6x.c	/^#define PC /;"	d	file:
PC	board/ccv/xpress/xpress.c	/^#define PC /;"	d	file:
PC	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define PC /;"	d	file:
PC	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define PC /;"	d	file:
PC	board/freescale/mx6slevk/mx6slevk.c	/^#define PC	/;"	d	file:
PC	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define PC /;"	d	file:
PC	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define PC /;"	d	file:
PC	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define PC /;"	d	file:
PC	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define PC /;"	d	file:
PC	board/gateworks/gw_ventana/common.h	/^#define PC /;"	d
PC	board/kosagi/novena/novena_spl.c	/^#define PC /;"	d	file:
PC	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define PC /;"	d	file:
PC	board/warp/warp.c	/^#define PC	/;"	d	file:
PC	board/warp7/warp7.c	/^#define PC /;"	d	file:
PC0	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC0	/;"	d
PC0CTRL	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define PC0CTRL	/;"	d
PC1	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC1	/;"	d
PC10	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC10	/;"	d
PC10_PF_UART1_RTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC10_PF_UART1_RTS /;"	d
PC10_PF_USBOTG_DATA2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC10_PF_USBOTG_DATA2	/;"	d
PC11	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC11	/;"	d
PC11_PF_UART1_TXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC11_PF_UART1_TXD /;"	d
PC11_PF_USBOTG_DATA1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC11_PF_USBOTG_DATA1	/;"	d
PC12	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC12	/;"	d
PC12_PF_UART1_RXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC12_PF_UART1_RXD /;"	d
PC12_PF_USBOTG_DATA4	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC12_PF_USBOTG_DATA4	/;"	d
PC13	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC13	/;"	d
PC13_PF_SPI1_SPI_RDY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC13_PF_SPI1_SPI_RDY /;"	d
PC13_PF_USBOTG_DATA3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC13_PF_USBOTG_DATA3	/;"	d
PC14	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC14	/;"	d
PC14_PF_SPI1_SCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC14_PF_SPI1_SCLK /;"	d
PC15	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC15	/;"	d
PC15_PF_SPI1_SS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC15_PF_SPI1_SS /;"	d
PC16_PF_SPI1_MISO	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC16_PF_SPI1_MISO /;"	d
PC17_PF_SPI1_MOSI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC17_PF_SPI1_MOSI /;"	d
PC2	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC2	/;"	d
PC24_BIN_UART3_RI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC24_BIN_UART3_RI /;"	d
PC25_BIN_UART3_DSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC25_BIN_UART3_DSR /;"	d
PC26_AOUT_UART3_DTR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC26_AOUT_UART3_DTR /;"	d
PC27_BIN_UART3_DCD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC27_BIN_UART3_DCD /;"	d
PC28_BIN_UART3_CTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC28_BIN_UART3_CTS /;"	d
PC29_AOUT_UART3_RTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC29_AOUT_UART3_RTS /;"	d
PC3	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC3	/;"	d
PC30_BIN_UART3_TX	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC30_BIN_UART3_TX /;"	d
PC31_AOUT_UART3_RX	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC31_AOUT_UART3_RX /;"	d
PC3_PF_SSI_RXFS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC3_PF_SSI_RXFS /;"	d
PC4	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC4	/;"	d
PC4_PF_SSI_RXCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC4_PF_SSI_RXCLK /;"	d
PC5	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC5	/;"	d
PC5_PF_I2C2_DATA	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC5_PF_I2C2_DATA	/;"	d
PC5_PF_SSI_RXDAT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC5_PF_SSI_RXDAT /;"	d
PC6	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC6	/;"	d
PC6_PF_I2C2_CLK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC6_PF_I2C2_CLK	/;"	d
PC6_PF_SSI_TXDAT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC6_PF_SSI_TXDAT /;"	d
PC7	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC7	/;"	d
PC7_PF_SSI_TXFS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC7_PF_SSI_TXFS /;"	d
PC7_PF_USBOTG_DATA5	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC7_PF_USBOTG_DATA5	/;"	d
PC8	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC8	/;"	d
PC8_PF_SSI_TXCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC8_PF_SSI_TXCLK /;"	d
PC8_PF_USBOTG_DATA6	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC8_PF_USBOTG_DATA6	/;"	d
PC9	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define PC9	/;"	d
PC9_PF_UART1_CTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PC9_PF_UART1_CTS /;"	d
PC9_PF_USBOTG_DATA0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC9_PF_USBOTG_DATA0	/;"	d
PCA953X_CMD_DEVICE	drivers/gpio/pca953x.c	/^	PCA953X_CMD_DEVICE,$/;"	e	enum:__anon798dd54f0103	file:
PCA953X_CMD_INFO	drivers/gpio/pca953x.c	/^	PCA953X_CMD_INFO,$/;"	e	enum:__anon798dd54f0103	file:
PCA953X_CMD_INPUT	drivers/gpio/pca953x.c	/^	PCA953X_CMD_INPUT,$/;"	e	enum:__anon798dd54f0103	file:
PCA953X_CMD_INVERT	drivers/gpio/pca953x.c	/^	PCA953X_CMD_INVERT,$/;"	e	enum:__anon798dd54f0103	file:
PCA953X_CMD_OUTPUT	drivers/gpio/pca953x.c	/^	PCA953X_CMD_OUTPUT,$/;"	e	enum:__anon798dd54f0103	file:
PCA953X_CONF	include/pca953x.h	/^#define PCA953X_CONF	/;"	d
PCA953X_DIRECTION	drivers/gpio/pca953x_gpio.c	/^#define PCA953X_DIRECTION /;"	d	file:
PCA953X_DIRECTION_IN	drivers/gpio/pca953x_gpio.c	/^	PCA953X_DIRECTION_IN,$/;"	e	enum:__anonda22ecdd0103	file:
PCA953X_DIRECTION_OUT	drivers/gpio/pca953x_gpio.c	/^	PCA953X_DIRECTION_OUT,$/;"	e	enum:__anonda22ecdd0103	file:
PCA953X_DIR_IN	include/pca953x.h	/^#define PCA953X_DIR_IN	/;"	d
PCA953X_DIR_OUT	include/pca953x.h	/^#define PCA953X_DIR_OUT	/;"	d
PCA953X_IN	include/pca953x.h	/^#define PCA953X_IN	/;"	d
PCA953X_INPUT	drivers/gpio/pca953x_gpio.c	/^#define PCA953X_INPUT /;"	d	file:
PCA953X_INVERT	drivers/gpio/pca953x_gpio.c	/^#define PCA953X_INVERT /;"	d	file:
PCA953X_OUT	include/pca953x.h	/^#define PCA953X_OUT	/;"	d
PCA953X_OUTPUT	drivers/gpio/pca953x_gpio.c	/^#define PCA953X_OUTPUT /;"	d	file:
PCA953X_OUT_HIGH	include/pca953x.h	/^#define PCA953X_OUT_HIGH	/;"	d
PCA953X_OUT_LOW	include/pca953x.h	/^#define PCA953X_OUT_LOW	/;"	d
PCA953X_POL	include/pca953x.h	/^#define PCA953X_POL	/;"	d
PCA953X_POL_INVERT	include/pca953x.h	/^#define PCA953X_POL_INVERT	/;"	d
PCA953X_POL_NORMAL	include/pca953x.h	/^#define PCA953X_POL_NORMAL	/;"	d
PCA953X_TYPE	drivers/gpio/pca953x_gpio.c	/^#define PCA953X_TYPE /;"	d	file:
PCA9551_CTRL_AI	drivers/misc/pca9551_led.c	/^#define PCA9551_CTRL_AI	/;"	d	file:
PCA9551_I2C_ADDR	drivers/misc/Kconfig	/^config PCA9551_I2C_ADDR$/;"	c	menu:Multifunction device drivers
PCA9551_LED	drivers/misc/Kconfig	/^config PCA9551_LED$/;"	c	menu:Multifunction device drivers
PCA9551_LED_STATE_BLINK0	drivers/misc/pca9551_led.c	/^#define PCA9551_LED_STATE_BLINK0	/;"	d	file:
PCA9551_LED_STATE_BLINK1	drivers/misc/pca9551_led.c	/^#define PCA9551_LED_STATE_BLINK1	/;"	d	file:
PCA9551_LED_STATE_OFF	drivers/misc/pca9551_led.c	/^#define PCA9551_LED_STATE_OFF	/;"	d	file:
PCA9551_LED_STATE_ON	drivers/misc/pca9551_led.c	/^#define PCA9551_LED_STATE_ON	/;"	d	file:
PCA9551_REG_INPUT	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_INPUT	/;"	d	file:
PCA9551_REG_LS0	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_LS0	/;"	d	file:
PCA9551_REG_LS1	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_LS1	/;"	d	file:
PCA9551_REG_PSC0	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_PSC0	/;"	d	file:
PCA9551_REG_PSC1	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_PSC1	/;"	d	file:
PCA9551_REG_PWM0	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_PWM0	/;"	d	file:
PCA9551_REG_PWM1	drivers/misc/pca9551_led.c	/^#define PCA9551_REG_PWM1	/;"	d	file:
PCA957X_TYPE	drivers/gpio/pca953x_gpio.c	/^#define PCA957X_TYPE /;"	d	file:
PCA9698_BUFFER_SIZE	drivers/gpio/pca9698.c	/^#define PCA9698_BUFFER_SIZE	/;"	d	file:
PCA9698_GPIO_COUNT	drivers/gpio/pca9698.c	/^#define PCA9698_GPIO_COUNT	/;"	d	file:
PCA9698_REG_CONFIG	drivers/gpio/pca9698.c	/^#define PCA9698_REG_CONFIG	/;"	d	file:
PCA9698_REG_INPUT	drivers/gpio/pca9698.c	/^#define PCA9698_REG_INPUT	/;"	d	file:
PCA9698_REG_OUTPUT	drivers/gpio/pca9698.c	/^#define PCA9698_REG_OUTPUT	/;"	d	file:
PCA9698_REG_POLARITY	drivers/gpio/pca9698.c	/^#define PCA9698_REG_POLARITY	/;"	d	file:
PCAP_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PCAP_FREQ /;"	d
PCAP_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PCAP_FREQ /;"	d
PCAP_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PCAP_FREQ /;"	d
PCAP_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PCAP_FREQ /;"	d
PCAP_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PCAP_FREQ /;"	d
PCA_ADR	drivers/i2c/pca9564_i2c.c	/^#define PCA_ADR	/;"	d	file:
PCA_CHIP_TYPE	drivers/gpio/pca953x_gpio.c	/^#define PCA_CHIP_TYPE(/;"	d	file:
PCA_CON	drivers/i2c/pca9564_i2c.c	/^#define PCA_CON	/;"	d	file:
PCA_CON_146kHz	include/pca9564.h	/^#define PCA_CON_146kHz /;"	d
PCA_CON_217kHz	include/pca9564.h	/^#define PCA_CON_217kHz /;"	d
PCA_CON_288kHz	include/pca9564.h	/^#define PCA_CON_288kHz /;"	d
PCA_CON_330kHz	include/pca9564.h	/^#define PCA_CON_330kHz /;"	d
PCA_CON_36kHz	include/pca9564.h	/^#define PCA_CON_36kHz /;"	d
PCA_CON_44kHz	include/pca9564.h	/^#define PCA_CON_44kHz /;"	d
PCA_CON_59kHz	include/pca9564.h	/^#define PCA_CON_59kHz /;"	d
PCA_CON_88kHz	include/pca9564.h	/^#define PCA_CON_88kHz /;"	d
PCA_CON_AA	include/pca9564.h	/^#define PCA_CON_AA /;"	d
PCA_CON_CR	include/pca9564.h	/^#define PCA_CON_CR /;"	d
PCA_CON_ENSIO	include/pca9564.h	/^#define PCA_CON_ENSIO /;"	d
PCA_CON_SI	include/pca9564.h	/^#define PCA_CON_SI /;"	d
PCA_CON_STA	include/pca9564.h	/^#define PCA_CON_STA /;"	d
PCA_CON_STO	include/pca9564.h	/^#define PCA_CON_STO /;"	d
PCA_DAT	drivers/i2c/pca9564_i2c.c	/^#define PCA_DAT	/;"	d	file:
PCA_GPIO_MASK	drivers/gpio/pca953x_gpio.c	/^#define PCA_GPIO_MASK /;"	d	file:
PCA_INT	drivers/gpio/pca953x_gpio.c	/^#define PCA_INT /;"	d	file:
PCA_IOPORT_CFG_CMD	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define PCA_IOPORT_CFG_CMD	/;"	d	file:
PCA_IOPORT_CFG_CMD	board/freescale/p1_twr/p1_twr.c	/^#define PCA_IOPORT_CFG_CMD	/;"	d	file:
PCA_IOPORT_I2C_ADDR	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define PCA_IOPORT_I2C_ADDR	/;"	d	file:
PCA_IOPORT_I2C_ADDR	board/freescale/p1_twr/p1_twr.c	/^#define PCA_IOPORT_I2C_ADDR	/;"	d	file:
PCA_IOPORT_OUTPUT_CMD	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define PCA_IOPORT_OUTPUT_CMD	/;"	d	file:
PCA_IOPORT_OUTPUT_CMD	board/freescale/p1_twr/p1_twr.c	/^#define PCA_IOPORT_OUTPUT_CMD	/;"	d	file:
PCA_IOPORT_QE_PIN_ENABLE	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define PCA_IOPORT_QE_PIN_ENABLE	/;"	d	file:
PCA_IOPORT_QE_TDM_ENABLE	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^#define PCA_IOPORT_QE_TDM_ENABLE	/;"	d	file:
PCA_STA	drivers/i2c/pca9564_i2c.c	/^#define PCA_STA	/;"	d	file:
PCA_TO	drivers/i2c/pca9564_i2c.c	/^#define PCA_TO	/;"	d	file:
PCA_TYPE_MASK	drivers/gpio/pca953x_gpio.c	/^#define PCA_TYPE_MASK /;"	d	file:
PCB0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PCB0	/;"	d
PCB1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PCB1	/;"	d
PCB_NAME	board/cm5200/cm5200.h	/^	PCB_NAME,		\/* 2 *\/$/;"	e	enum:__anonb595836f0103
PCB_NAME_LEN	board/cm5200/cm5200.h	/^#define PCB_NAME_LEN	/;"	d
PCB_NAME_OFFSET	board/cm5200/cm5200.h	/^#define PCB_NAME_OFFSET	/;"	d
PCCR	arch/sh/include/asm/cpu_sh7203.h	/^#define PCCR	/;"	d
PCCR	arch/sh/include/asm/cpu_sh7264.h	/^#define PCCR	/;"	d
PCCR	arch/sh/include/asm/cpu_sh7706.h	/^#define PCCR	/;"	d
PCCR	arch/sh/include/asm/cpu_sh7710.h	/^#define PCCR	/;"	d
PCCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PCCR	/;"	d
PCCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PCCR /;"	d
PCCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PCCR /;"	d
PCCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PCCR /;"	d
PCCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PCCR	/;"	d
PCCR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PCCR0_A:	.long 0xFFFE384E$/;"	l
PCCR0_A	board/renesas/rsk7269/lowlevel_init.S	/^PCCR0_A:	.long 0xFFFE384E$/;"	l
PCCR0_CSPI1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_CSPI1_EN	/;"	d
PCCR0_CSPI2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_CSPI2_EN	/;"	d
PCCR0_CSPI3_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_CSPI3_EN	/;"	d
PCCR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PCCR0_D:	.word 0x1111$/;"	l
PCCR0_D	board/renesas/rsk7269/lowlevel_init.S	/^PCCR0_D:	.word 0x1111$/;"	l
PCCR0_DMA_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_DMA_EN	/;"	d
PCCR0_EMMA_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_EMMA_EN	/;"	d
PCCR0_FEC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_FEC_EN	/;"	d
PCCR0_GPIO_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPIO_EN	/;"	d
PCCR0_GPT1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPT1_EN	/;"	d
PCCR0_GPT2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPT2_EN	/;"	d
PCCR0_GPT3_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPT3_EN	/;"	d
PCCR0_GPT4_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPT4_EN	/;"	d
PCCR0_GPT5_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPT5_EN	/;"	d
PCCR0_GPT6_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_GPT6_EN	/;"	d
PCCR0_I2C1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_I2C1_EN	/;"	d
PCCR0_I2C2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_I2C2_EN	/;"	d
PCCR0_IIM_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_IIM_EN	/;"	d
PCCR0_KPP_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_KPP_EN	/;"	d
PCCR0_LCDC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_LCDC_EN	/;"	d
PCCR0_MSHC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_MSHC_EN	/;"	d
PCCR0_OWIRE_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_OWIRE_EN	/;"	d
PCCR0_PWM_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_PWM_EN	/;"	d
PCCR0_RTC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_RTC_EN	/;"	d
PCCR0_RTIC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_RTIC_EN	/;"	d
PCCR0_SAHARA_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SAHARA_EN	/;"	d
PCCR0_SDC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SDC_EN	/;"	d
PCCR0_SDHC1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SDHC1_EN	/;"	d
PCCR0_SDHC2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SDHC2_EN	/;"	d
PCCR0_SDHC3_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SDHC3_EN	/;"	d
PCCR0_SLCDC_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SLCDC_EN	/;"	d
PCCR0_SSI1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SSI1_EN	/;"	d
PCCR0_SSI2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR0_SSI2_EN	/;"	d
PCCR0_VAL	include/configs/imx27lite-common.h	/^#define PCCR0_VAL	/;"	d
PCCR1_A	board/renesas/rsk7264/lowlevel_init.S	/^PCCR1_A:	.long 0xFFFE384C$/;"	l
PCCR1_A	board/renesas/rsk7269/lowlevel_init.S	/^PCCR1_A:	.long 0xFFFE384C$/;"	l
PCCR1_D	board/renesas/rsk7264/lowlevel_init.S	/^PCCR1_D:	.word 0x1111$/;"	l
PCCR1_D	board/renesas/rsk7269/lowlevel_init.S	/^PCCR1_D:	.word 0x1111$/;"	l
PCCR1_H264_BAUDEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_H264_BAUDEN	/;"	d
PCCR1_HCLK_ATA	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_ATA	/;"	d
PCCR1_HCLK_BROM	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_BROM	/;"	d
PCCR1_HCLK_CSI	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_CSI	/;"	d
PCCR1_HCLK_DMA	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_DMA	/;"	d
PCCR1_HCLK_EMI	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_EMI	/;"	d
PCCR1_HCLK_EMMA	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_EMMA	/;"	d
PCCR1_HCLK_FEC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_FEC	/;"	d
PCCR1_HCLK_H264	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_H264	/;"	d
PCCR1_HCLK_LCDC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_LCDC	/;"	d
PCCR1_HCLK_RTIC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_RTIC	/;"	d
PCCR1_HCLK_SAHARA	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_SAHARA	/;"	d
PCCR1_HCLK_SLCDC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_SLCDC	/;"	d
PCCR1_HCLK_USB	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_HCLK_USB	/;"	d
PCCR1_MSHC_BAUDEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_MSHC_BAUDEN	/;"	d
PCCR1_NFC_BAUDEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_NFC_BAUDEN	/;"	d
PCCR1_PERCLK1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_PERCLK1_EN	/;"	d
PCCR1_PERCLK2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_PERCLK2_EN	/;"	d
PCCR1_PERCLK3_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_PERCLK3_EN	/;"	d
PCCR1_PERCLK4_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_PERCLK4_EN	/;"	d
PCCR1_SGMIIA_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIA_KX_MASK	/;"	d	file:
PCCR1_SGMIIB_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIB_KX_MASK	/;"	d	file:
PCCR1_SGMIIC_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIC_KX_MASK	/;"	d	file:
PCCR1_SGMIID_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIID_KX_MASK	/;"	d	file:
PCCR1_SGMIIE_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIE_KX_MASK	/;"	d	file:
PCCR1_SGMIIF_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIF_KX_MASK	/;"	d	file:
PCCR1_SGMIIG_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIG_KX_MASK	/;"	d	file:
PCCR1_SGMIIH_KX_MASK	board/freescale/t208xqds/eth_t208xqds.c	/^#define PCCR1_SGMIIH_KX_MASK	/;"	d	file:
PCCR1_SSI1_BAUDEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_SSI1_BAUDEN	/;"	d
PCCR1_SSI2_BAUDEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_SSI2_BAUDEN	/;"	d
PCCR1_UART1_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_UART1_EN	/;"	d
PCCR1_UART2_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_UART2_EN	/;"	d
PCCR1_UART3_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_UART3_EN	/;"	d
PCCR1_UART4_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_UART4_EN	/;"	d
PCCR1_UART5_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_UART5_EN	/;"	d
PCCR1_UART6_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_UART6_EN	/;"	d
PCCR1_USB_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_USB_EN	/;"	d
PCCR1_VAL	include/configs/imx27lite-common.h	/^#define PCCR1_VAL	/;"	d
PCCR1_WDT_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PCCR1_WDT_EN	/;"	d
PCCR2_A	board/renesas/rsk7264/lowlevel_init.S	/^PCCR2_A:	.long 0xFFFE384A$/;"	l
PCCR2_A	board/renesas/rsk7269/lowlevel_init.S	/^PCCR2_A:	.long 0xFFFE384A$/;"	l
PCCR2_D	board/renesas/rsk7264/lowlevel_init.S	/^PCCR2_D:	.word 0x0001$/;"	l
PCCR2_D	board/renesas/rsk7269/lowlevel_init.S	/^PCCR2_D:	.word 0x0001$/;"	l
PCCRIR_REVID_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PCCRIR_REVID_MASK	/;"	d
PCCRIR_REVID_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PCCRIR_REVID_MASK	/;"	d
PCCRIR_REVID_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PCCRIR_REVID_OFFS	/;"	d
PCCRIR_REVID_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PCCRIR_REVID_OFFS	/;"	d
PCCRL1_A	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL1_A:	.long 0xFFFE3916$/;"	l
PCCRL1_D	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL1_D:	.word 0x1010$/;"	l
PCCRL2_A	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL2_A:	.long 0xFFFE3914$/;"	l
PCCRL2_D	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL2_D:	.word 0x1111$/;"	l
PCCRL3_A	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL3_A:	.long 0xFFFE3912$/;"	l
PCCRL3_D	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL3_D:	.word 0x0011$/;"	l
PCCRL4_A	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL4_A:	.long 0xFFFE3910$/;"	l
PCCRL4_D0	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL4_D0:	.word 0x0000$/;"	l
PCCRL4_D1	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL4_D1:	.word 0x0010$/;"	l
PCCRL4_D2	board/renesas/rsk7203/lowlevel_init.S	/^PCCRL4_D2:	.word 0x0011$/;"	l
PCCR_A	board/espt/lowlevel_init.S	/^PCCR_A:	.long	0xFFEF0004$/;"	l
PCCR_A	board/ms7720se/lowlevel_init.S	/^PCCR_A:		.long	PFC_BASE + 0x04$/;"	l
PCCR_A	board/ms7722se/lowlevel_init.S	/^PCCR_A:		.long	0xa4050104$/;"	l
PCCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PCCR_A:		.long	0xffec0004$/;"	l
PCCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PCCR_A:		.long	GPIO_BASE + 0x04$/;"	l
PCCR_D	board/espt/lowlevel_init.S	/^PCCR_D:	.word	0x5555$/;"	l
PCCR_D	board/ms7720se/lowlevel_init.S	/^PCCR_D:		.word	0x0000$/;"	l
PCCR_D	board/ms7722se/lowlevel_init.S	/^PCCR_D:		.word	0x8800$/;"	l
PCCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PCCR_D	/;"	d	file:
PCCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PCCR_D:		.long	0x0000$/;"	l
PCDR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCDR /;"	d
PCDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCDR	/;"	d
PCDR	arch/sh/include/asm/cpu_sh7203.h	/^#define PCDR	/;"	d
PCDR	arch/sh/include/asm/cpu_sh7264.h	/^#define PCDR	/;"	d
PCDR	arch/sh/include/asm/cpu_sh7706.h	/^#define PCDR	/;"	d
PCDR	arch/sh/include/asm/cpu_sh7710.h	/^#define PCDR	/;"	d
PCDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PCDR	/;"	d
PCDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PCDR /;"	d
PCDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PCDR /;"	d
PCDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PCDR /;"	d
PCDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PCDR	/;"	d
PCDR0_VAL	include/configs/imx27lite-common.h	/^#define PCDR0_VAL	/;"	d
PCDR1_VAL	include/configs/imx27lite-common.h	/^#define PCDR1_VAL	/;"	d
PCDR_A	board/espt/lowlevel_init.S	/^PCDR_A:	.long	0xFFEF0024$/;"	l
PCDR_D	board/espt/lowlevel_init.S	/^PCDR_D:	.long	0x00000000$/;"	l
PCF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PCF	/;"	d
PCF8575_GPIO	drivers/gpio/Kconfig	/^config PCF8575_GPIO$/;"	c	menu:GPIO Support
PCFG_PAD_VAL	drivers/block/sata_ceva.c	/^#define PCFG_PAD_VAL	/;"	d	file:
PCFG_TPRS_VAL	drivers/block/sata_ceva.c	/^#define PCFG_TPRS_VAL	/;"	d	file:
PCFG_TPSS_VAL	drivers/block/sata_ceva.c	/^#define PCFG_TPSS_VAL	/;"	d	file:
PCFR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR	/;"	d
PCFR	include/SA-1100.h	/^#define PCFR	/;"	d
PCFR_ClkRun	include/SA-1100.h	/^#define PCFR_ClkRun	/;"	d
PCFR_ClkStp	include/SA-1100.h	/^#define PCFR_ClkStp	/;"	d
PCFR_DS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR_DS	/;"	d
PCFR_FO	include/SA-1100.h	/^#define PCFR_FO	/;"	d
PCFR_FP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR_FP	/;"	d
PCFR_FP	include/SA-1100.h	/^#define PCFR_FP	/;"	d
PCFR_FS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR_FS	/;"	d
PCFR_FS	include/SA-1100.h	/^#define PCFR_FS	/;"	d
PCFR_FVC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR_FVC	/;"	d
PCFR_OPDE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR_OPDE	/;"	d
PCFR_OPDE	include/SA-1100.h	/^#define PCFR_OPDE	/;"	d
PCFR_PCMCIAFlt	include/SA-1100.h	/^#define PCFR_PCMCIAFlt	/;"	d
PCFR_PCMCIANeg	include/SA-1100.h	/^#define PCFR_PCMCIANeg	/;"	d
PCFR_PI2C_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCFR_PI2C_EN	/;"	d
PCFR_StMemFlt	include/SA-1100.h	/^#define PCFR_StMemFlt	/;"	d
PCFR_StMemNeg	include/SA-1100.h	/^#define PCFR_StMemNeg	/;"	d
PCH_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DEV	/;"	d
PCH_DEV_LPC	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  PCH_DEV_LPC	/;"	d
PCH_DISABLE_ADSPD	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_ADSPD	/;"	d
PCH_DISABLE_ALWAYS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_DISABLE_ALWAYS	/;"	d
PCH_DISABLE_ALWAYS	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_ALWAYS	/;"	d
PCH_DISABLE_ALWAYS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_ALWAYS	/;"	d
PCH_DISABLE_EHCI1	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_EHCI1	/;"	d
PCH_DISABLE_EHCI1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_EHCI1	/;"	d
PCH_DISABLE_EHCI2	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_EHCI2	/;"	d
PCH_DISABLE_EHCI2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_EHCI2	/;"	d
PCH_DISABLE_GBE	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_GBE	/;"	d
PCH_DISABLE_GBE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_GBE	/;"	d
PCH_DISABLE_HD_AUDIO	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_HD_AUDIO	/;"	d
PCH_DISABLE_HD_AUDIO	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_HD_AUDIO	/;"	d
PCH_DISABLE_IDER	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_IDER	/;"	d
PCH_DISABLE_IDER	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_IDER	/;"	d
PCH_DISABLE_KT	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_KT	/;"	d
PCH_DISABLE_KT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_KT	/;"	d
PCH_DISABLE_LPC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_LPC	/;"	d
PCH_DISABLE_LPC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_LPC	/;"	d
PCH_DISABLE_MEI1	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_MEI1	/;"	d
PCH_DISABLE_MEI1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_MEI1	/;"	d
PCH_DISABLE_MEI2	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_MEI2	/;"	d
PCH_DISABLE_MEI2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_MEI2	/;"	d
PCH_DISABLE_P2P	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_P2P	/;"	d
PCH_DISABLE_PCIE	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_PCIE(/;"	d
PCH_DISABLE_PCIE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_PCIE(/;"	d
PCH_DISABLE_SATA1	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_SATA1	/;"	d
PCH_DISABLE_SATA1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_SATA1	/;"	d
PCH_DISABLE_SATA2	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_SATA2	/;"	d
PCH_DISABLE_SATA2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_SATA2	/;"	d
PCH_DISABLE_SMBUS	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_SMBUS	/;"	d
PCH_DISABLE_SMBUS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_SMBUS	/;"	d
PCH_DISABLE_THERMAL	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_THERMAL	/;"	d
PCH_DISABLE_THERMAL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_THERMAL	/;"	d
PCH_DISABLE_XHCI	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_DISABLE_XHCI	/;"	d
PCH_DISABLE_XHCI	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_DISABLE_XHCI	/;"	d
PCH_DPB_AUX_CH_CTL	drivers/video/i915_reg.h	/^#define PCH_DPB_AUX_CH_CTL	/;"	d
PCH_DPB_AUX_CH_DATA1	drivers/video/i915_reg.h	/^#define PCH_DPB_AUX_CH_DATA1	/;"	d
PCH_DPB_AUX_CH_DATA2	drivers/video/i915_reg.h	/^#define PCH_DPB_AUX_CH_DATA2	/;"	d
PCH_DPB_AUX_CH_DATA3	drivers/video/i915_reg.h	/^#define PCH_DPB_AUX_CH_DATA3	/;"	d
PCH_DPB_AUX_CH_DATA4	drivers/video/i915_reg.h	/^#define PCH_DPB_AUX_CH_DATA4	/;"	d
PCH_DPB_AUX_CH_DATA5	drivers/video/i915_reg.h	/^#define PCH_DPB_AUX_CH_DATA5	/;"	d
PCH_DPC_AUX_CH_CTL	drivers/video/i915_reg.h	/^#define PCH_DPC_AUX_CH_CTL	/;"	d
PCH_DPC_AUX_CH_DATA1	drivers/video/i915_reg.h	/^#define PCH_DPC_AUX_CH_DATA1	/;"	d
PCH_DPC_AUX_CH_DATA2	drivers/video/i915_reg.h	/^#define PCH_DPC_AUX_CH_DATA2	/;"	d
PCH_DPC_AUX_CH_DATA3	drivers/video/i915_reg.h	/^#define PCH_DPC_AUX_CH_DATA3	/;"	d
PCH_DPC_AUX_CH_DATA4	drivers/video/i915_reg.h	/^#define PCH_DPC_AUX_CH_DATA4	/;"	d
PCH_DPC_AUX_CH_DATA5	drivers/video/i915_reg.h	/^#define PCH_DPC_AUX_CH_DATA5	/;"	d
PCH_DPD_AUX_CH_CTL	drivers/video/i915_reg.h	/^#define PCH_DPD_AUX_CH_CTL	/;"	d
PCH_DPD_AUX_CH_DATA1	drivers/video/i915_reg.h	/^#define PCH_DPD_AUX_CH_DATA1	/;"	d
PCH_DPD_AUX_CH_DATA2	drivers/video/i915_reg.h	/^#define PCH_DPD_AUX_CH_DATA2	/;"	d
PCH_DPD_AUX_CH_DATA3	drivers/video/i915_reg.h	/^#define PCH_DPD_AUX_CH_DATA3	/;"	d
PCH_DPD_AUX_CH_DATA4	drivers/video/i915_reg.h	/^#define PCH_DPD_AUX_CH_DATA4	/;"	d
PCH_DPD_AUX_CH_DATA5	drivers/video/i915_reg.h	/^#define PCH_DPD_AUX_CH_DATA5	/;"	d
PCH_DPLL_SEL	drivers/video/i915_reg.h	/^#define PCH_DPLL_SEL	/;"	d
PCH_DPLL_TEST	drivers/video/i915_reg.h	/^#define PCH_DPLL_TEST /;"	d
PCH_DPLL_TMR_CFG	drivers/video/i915_reg.h	/^#define PCH_DPLL_TMR_CFG /;"	d
PCH_DP_B	drivers/video/i915_reg.h	/^#define PCH_DP_B	/;"	d
PCH_DP_C	drivers/video/i915_reg.h	/^#define PCH_DP_C	/;"	d
PCH_DP_D	drivers/video/i915_reg.h	/^#define PCH_DP_D	/;"	d
PCH_DREF_CONTROL	drivers/video/i915_reg.h	/^#define PCH_DREF_CONTROL /;"	d
PCH_EHCI0_TEMP_BAR0	arch/x86/cpu/ivybridge/cpu.c	/^#define PCH_EHCI0_TEMP_BAR0 /;"	d	file:
PCH_EHCI1_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_EHCI1_DEV	/;"	d
PCH_EHCI1_TEMP_BAR0	arch/x86/cpu/ivybridge/cpu.c	/^#define PCH_EHCI1_TEMP_BAR0 /;"	d	file:
PCH_EHCI2_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_EHCI2_DEV	/;"	d
PCH_ENABLE_DBDF	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PCH_ENABLE_DBDF	/;"	d
PCH_ENABLE_DBDF	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_ENABLE_DBDF	/;"	d
PCH_GBE	drivers/net/Kconfig	/^config PCH_GBE$/;"	c
PCH_GBE_ADD_FIL_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_ADD_FIL_EN	/;"	d
PCH_GBE_ALIGN_SIZE	drivers/net/pch_gbe.h	/^#define PCH_GBE_ALIGN_SIZE	/;"	d
PCH_GBE_ALL_RST	drivers/net/pch_gbe.h	/^#define PCH_GBE_ALL_RST	/;"	d
PCH_GBE_BUSY	drivers/net/pch_gbe.h	/^#define PCH_GBE_BUSY	/;"	d
PCH_GBE_CHIP_TYPE_EXTERNAL	drivers/net/pch_gbe.h	/^#define PCH_GBE_CHIP_TYPE_EXTERNAL	/;"	d
PCH_GBE_CHIP_TYPE_INTERNAL	drivers/net/pch_gbe.h	/^#define PCH_GBE_CHIP_TYPE_INTERNAL	/;"	d
PCH_GBE_CRS_SEL	drivers/net/pch_gbe.h	/^#define PCH_GBE_CRS_SEL	/;"	d
PCH_GBE_DESC_NUM	drivers/net/pch_gbe.h	/^#define PCH_GBE_DESC_NUM	/;"	d
PCH_GBE_EX_LIST_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_EX_LIST_EN	/;"	d
PCH_GBE_FL_CTRL_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_FL_CTRL_EN	/;"	d
PCH_GBE_INT_MIIM_CMPLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_MIIM_CMPLT	/;"	d
PCH_GBE_INT_PAUSE_CMPLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_PAUSE_CMPLT	/;"	d
PCH_GBE_INT_PHY_INT	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_PHY_INT	/;"	d
PCH_GBE_INT_RX_DMA_CMPLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_RX_DMA_CMPLT	/;"	d
PCH_GBE_INT_RX_DMA_ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_RX_DMA_ERR	/;"	d
PCH_GBE_INT_RX_DSC_EMP	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_RX_DSC_EMP	/;"	d
PCH_GBE_INT_RX_FIFO_ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_RX_FIFO_ERR	/;"	d
PCH_GBE_INT_RX_FRAME_ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_RX_FRAME_ERR	/;"	d
PCH_GBE_INT_RX_VALID	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_RX_VALID	/;"	d
PCH_GBE_INT_TCPIP_ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_TCPIP_ERR	/;"	d
PCH_GBE_INT_TX_CMPLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_TX_CMPLT	/;"	d
PCH_GBE_INT_TX_DMA_CMPLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_TX_DMA_CMPLT	/;"	d
PCH_GBE_INT_TX_DMA_ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_TX_DMA_ERR	/;"	d
PCH_GBE_INT_TX_FIFO_ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_TX_FIFO_ERR	/;"	d
PCH_GBE_INT_WOL_DET	drivers/net/pch_gbe.h	/^#define PCH_GBE_INT_WOL_DET	/;"	d
PCH_GBE_MIIM_OPER_READ	drivers/net/pch_gbe.h	/^#define PCH_GBE_MIIM_OPER_READ	/;"	d
PCH_GBE_MIIM_OPER_READY	drivers/net/pch_gbe.h	/^#define PCH_GBE_MIIM_OPER_READY	/;"	d
PCH_GBE_MIIM_OPER_WRITE	drivers/net/pch_gbe.h	/^#define PCH_GBE_MIIM_OPER_WRITE	/;"	d
PCH_GBE_MIIM_PHY_ADDR_SHIFT	drivers/net/pch_gbe.h	/^#define PCH_GBE_MIIM_PHY_ADDR_SHIFT	/;"	d
PCH_GBE_MIIM_REG_ADDR_SHIFT	drivers/net/pch_gbe.h	/^#define PCH_GBE_MIIM_REG_ADDR_SHIFT	/;"	d
PCH_GBE_MLT_FIL_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_MLT_FIL_EN	/;"	d
PCH_GBE_MODE_FR_BST	drivers/net/pch_gbe.h	/^#define PCH_GBE_MODE_FR_BST	/;"	d
PCH_GBE_MODE_FULL_DUPLEX	drivers/net/pch_gbe.h	/^#define PCH_GBE_MODE_FULL_DUPLEX	/;"	d
PCH_GBE_MODE_GMII_ETHER	drivers/net/pch_gbe.h	/^#define PCH_GBE_MODE_GMII_ETHER	/;"	d
PCH_GBE_MODE_HALF_DUPLEX	drivers/net/pch_gbe.h	/^#define PCH_GBE_MODE_HALF_DUPLEX	/;"	d
PCH_GBE_MODE_MII_ETHER	drivers/net/pch_gbe.h	/^#define PCH_GBE_MODE_MII_ETHER	/;"	d
PCH_GBE_MRE_MAC_RX_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_MRE_MAC_RX_EN	/;"	d
PCH_GBE_RGMII_MODE_GMII	drivers/net/pch_gbe.h	/^#define PCH_GBE_RGMII_MODE_GMII	/;"	d
PCH_GBE_RGMII_MODE_RGMII	drivers/net/pch_gbe.h	/^#define PCH_GBE_RGMII_MODE_RGMII	/;"	d
PCH_GBE_RGMII_RATE_125M	drivers/net/pch_gbe.h	/^#define PCH_GBE_RGMII_RATE_125M	/;"	d
PCH_GBE_RGMII_RATE_25M	drivers/net/pch_gbe.h	/^#define PCH_GBE_RGMII_RATE_25M	/;"	d
PCH_GBE_RGMII_RATE_2_5M	drivers/net/pch_gbe.h	/^#define PCH_GBE_RGMII_RATE_2_5M	/;"	d
PCH_GBE_RH_ALM_EMP_16	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_EMP_16	/;"	d
PCH_GBE_RH_ALM_EMP_32	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_EMP_32	/;"	d
PCH_GBE_RH_ALM_EMP_4	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_EMP_4	/;"	d
PCH_GBE_RH_ALM_EMP_8	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_EMP_8	/;"	d
PCH_GBE_RH_ALM_FULL_16	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_FULL_16	/;"	d
PCH_GBE_RH_ALM_FULL_32	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_FULL_32	/;"	d
PCH_GBE_RH_ALM_FULL_4	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_FULL_4	/;"	d
PCH_GBE_RH_ALM_FULL_8	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_ALM_FULL_8	/;"	d
PCH_GBE_RH_RD_TRG_128	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_128	/;"	d
PCH_GBE_RH_RD_TRG_16	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_16	/;"	d
PCH_GBE_RH_RD_TRG_256	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_256	/;"	d
PCH_GBE_RH_RD_TRG_32	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_32	/;"	d
PCH_GBE_RH_RD_TRG_4	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_4	/;"	d
PCH_GBE_RH_RD_TRG_512	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_512	/;"	d
PCH_GBE_RH_RD_TRG_64	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_64	/;"	d
PCH_GBE_RH_RD_TRG_8	drivers/net/pch_gbe.h	/^#define PCH_GBE_RH_RD_TRG_8	/;"	d
PCH_GBE_RXD_ACC_STAT_BCAST	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_BCAST	/;"	d
PCH_GBE_RXD_ACC_STAT_IP6ERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_IP6ERR	/;"	d
PCH_GBE_RXD_ACC_STAT_IPOK	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_IPOK	/;"	d
PCH_GBE_RXD_ACC_STAT_MACL	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_MACL	/;"	d
PCH_GBE_RXD_ACC_STAT_MCAST	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_MCAST	/;"	d
PCH_GBE_RXD_ACC_STAT_OFLIST	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_OFLIST	/;"	d
PCH_GBE_RXD_ACC_STAT_PPPOE	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_PPPOE	/;"	d
PCH_GBE_RXD_ACC_STAT_TCPIPOK	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_TCPIPOK	/;"	d
PCH_GBE_RXD_ACC_STAT_TCPOK	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_TCPOK	/;"	d
PCH_GBE_RXD_ACC_STAT_TYPEIP	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_TYPEIP	/;"	d
PCH_GBE_RXD_ACC_STAT_UCAST	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_UCAST	/;"	d
PCH_GBE_RXD_ACC_STAT_VTAGT	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_ACC_STAT_VTAGT	/;"	d
PCH_GBE_RXD_GMAC_STAT_CRCERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_CRCERR	/;"	d
PCH_GBE_RXD_GMAC_STAT_MARBR	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_MARBR	/;"	d
PCH_GBE_RXD_GMAC_STAT_MARIND	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_MARIND	/;"	d
PCH_GBE_RXD_GMAC_STAT_MARMLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_MARMLT	/;"	d
PCH_GBE_RXD_GMAC_STAT_MARNOTMT	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_MARNOTMT	/;"	d
PCH_GBE_RXD_GMAC_STAT_NBLERR	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_NBLERR	/;"	d
PCH_GBE_RXD_GMAC_STAT_NOTOCTAL	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_NOTOCTAL	/;"	d
PCH_GBE_RXD_GMAC_STAT_PAUSE	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_PAUSE	/;"	d
PCH_GBE_RXD_GMAC_STAT_TLONG	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_TLONG	/;"	d
PCH_GBE_RXD_GMAC_STAT_TSHRT	drivers/net/pch_gbe.h	/^#define PCH_GBE_RXD_GMAC_STAT_TSHRT	/;"	d
PCH_GBE_RX_DMA_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_RX_DMA_EN	/;"	d
PCH_GBE_RX_FRAME_LEN	drivers/net/pch_gbe.h	/^#define PCH_GBE_RX_FRAME_LEN	/;"	d
PCH_GBE_RX_RST	drivers/net/pch_gbe.h	/^#define PCH_GBE_RX_RST	/;"	d
PCH_GBE_RX_TCPIPACC_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_RX_TCPIPACC_EN	/;"	d
PCH_GBE_RX_TCPIPACC_OFF	drivers/net/pch_gbe.h	/^#define PCH_GBE_RX_TCPIPACC_OFF	/;"	d
PCH_GBE_TIMEOUT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TIMEOUT	/;"	d
PCH_GBE_TM_LONG_PKT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_LONG_PKT	/;"	d
PCH_GBE_TM_LTCOL_RETX	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_LTCOL_RETX	/;"	d
PCH_GBE_TM_NO_RTRY	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_NO_RTRY	/;"	d
PCH_GBE_TM_SHORT_PKT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_SHORT_PKT	/;"	d
PCH_GBE_TM_ST_AND_FD	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_ST_AND_FD	/;"	d
PCH_GBE_TM_TH_ALM_EMP_128	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_128	/;"	d
PCH_GBE_TM_TH_ALM_EMP_16	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_16	/;"	d
PCH_GBE_TM_TH_ALM_EMP_256	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_256	/;"	d
PCH_GBE_TM_TH_ALM_EMP_32	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_32	/;"	d
PCH_GBE_TM_TH_ALM_EMP_4	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_4	/;"	d
PCH_GBE_TM_TH_ALM_EMP_512	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_512	/;"	d
PCH_GBE_TM_TH_ALM_EMP_64	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_64	/;"	d
PCH_GBE_TM_TH_ALM_EMP_8	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_EMP_8	/;"	d
PCH_GBE_TM_TH_ALM_FULL_16	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_FULL_16	/;"	d
PCH_GBE_TM_TH_ALM_FULL_32	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_FULL_32	/;"	d
PCH_GBE_TM_TH_ALM_FULL_4	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_FULL_4	/;"	d
PCH_GBE_TM_TH_ALM_FULL_8	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_ALM_FULL_8	/;"	d
PCH_GBE_TM_TH_TX_STRT_16	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_TX_STRT_16	/;"	d
PCH_GBE_TM_TH_TX_STRT_32	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_TX_STRT_32	/;"	d
PCH_GBE_TM_TH_TX_STRT_4	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_TX_STRT_4	/;"	d
PCH_GBE_TM_TH_TX_STRT_8	drivers/net/pch_gbe.h	/^#define PCH_GBE_TM_TH_TX_STRT_8	/;"	d
PCH_GBE_TXD_CTRL_APAD	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_CTRL_APAD	/;"	d
PCH_GBE_TXD_CTRL_ICRC	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_CTRL_ICRC	/;"	d
PCH_GBE_TXD_CTRL_ITAG	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_CTRL_ITAG	/;"	d
PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF	/;"	d
PCH_GBE_TXD_GMAC_STAT_ABT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_ABT	/;"	d
PCH_GBE_TXD_GMAC_STAT_CMPLT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_CMPLT	/;"	d
PCH_GBE_TXD_GMAC_STAT_CRSER	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_CRSER	/;"	d
PCH_GBE_TXD_GMAC_STAT_EXCOL	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_EXCOL	/;"	d
PCH_GBE_TXD_GMAC_STAT_LTCOL	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_LTCOL	/;"	d
PCH_GBE_TXD_GMAC_STAT_MLTCOL	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_MLTCOL	/;"	d
PCH_GBE_TXD_GMAC_STAT_SNGCOL	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_SNGCOL	/;"	d
PCH_GBE_TXD_GMAC_STAT_TFUNDFLW	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_TFUNDFLW	/;"	d
PCH_GBE_TXD_GMAC_STAT_TLNG	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_TLNG	/;"	d
PCH_GBE_TXD_GMAC_STAT_TSHRT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_GMAC_STAT_TSHRT	/;"	d
PCH_GBE_TXD_WORDS_SHIFT	drivers/net/pch_gbe.h	/^#define PCH_GBE_TXD_WORDS_SHIFT	/;"	d
PCH_GBE_TX_DMA_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_TX_DMA_EN	/;"	d
PCH_GBE_TX_RST	drivers/net/pch_gbe.h	/^#define PCH_GBE_TX_RST	/;"	d
PCH_GBE_TX_TCPIPACC_EN	drivers/net/pch_gbe.h	/^#define PCH_GBE_TX_TCPIPACC_EN	/;"	d
PCH_GMBUS0	drivers/video/i915_reg.h	/^#define PCH_GMBUS0	/;"	d
PCH_GMBUS1	drivers/video/i915_reg.h	/^#define PCH_GMBUS1	/;"	d
PCH_GMBUS2	drivers/video/i915_reg.h	/^#define PCH_GMBUS2	/;"	d
PCH_GMBUS3	drivers/video/i915_reg.h	/^#define PCH_GMBUS3	/;"	d
PCH_GMBUS4	drivers/video/i915_reg.h	/^#define PCH_GMBUS4	/;"	d
PCH_GMBUS5	drivers/video/i915_reg.h	/^#define PCH_GMBUS5	/;"	d
PCH_GPIOA	drivers/video/i915_reg.h	/^#define PCH_GPIOA /;"	d
PCH_GPIOB	drivers/video/i915_reg.h	/^#define PCH_GPIOB /;"	d
PCH_GPIOC	drivers/video/i915_reg.h	/^#define PCH_GPIOC /;"	d
PCH_GPIOD	drivers/video/i915_reg.h	/^#define PCH_GPIOD /;"	d
PCH_GPIOE	drivers/video/i915_reg.h	/^#define PCH_GPIOE /;"	d
PCH_GPIOF	drivers/video/i915_reg.h	/^#define PCH_GPIOF /;"	d
PCH_IDE_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_IDE_DEV	/;"	d
PCH_LPC_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_LPC_DEV	/;"	d
PCH_ME_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_ME_DEV	/;"	d
PCH_PCIE_DEV_SLOT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_PCIE_DEV_SLOT	/;"	d
PCH_PORT_HOTPLUG	drivers/video/i915_reg.h	/^#define PCH_PORT_HOTPLUG /;"	d
PCH_PP_CONTROL	drivers/video/i915_reg.h	/^#define PCH_PP_CONTROL	/;"	d
PCH_PP_DIVISOR	drivers/video/i915_reg.h	/^#define PCH_PP_DIVISOR	/;"	d
PCH_PP_OFF_DELAYS	drivers/video/i915_reg.h	/^#define PCH_PP_OFF_DELAYS	/;"	d
PCH_PP_ON_DELAYS	drivers/video/i915_reg.h	/^#define PCH_PP_ON_DELAYS	/;"	d
PCH_PP_STATUS	drivers/video/i915_reg.h	/^#define PCH_PP_STATUS	/;"	d
PCH_RAWCLK_FREQ	drivers/video/i915_reg.h	/^#define PCH_RAWCLK_FREQ /;"	d
PCH_RCBA	include/pch.h	/^#define PCH_RCBA	/;"	d
PCH_RCBA_BASE	arch/x86/include/asm/lpc_common.h	/^#define PCH_RCBA_BASE	/;"	d
PCH_SATA2_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_SATA2_DEV	/;"	d
PCH_SATA_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_SATA_DEV	/;"	d
PCH_SSC4_AUX_PARMS	drivers/video/i915_reg.h	/^#define PCH_SSC4_AUX_PARMS /;"	d
PCH_SSC4_PARMS	drivers/video/i915_reg.h	/^#define PCH_SSC4_PARMS /;"	d
PCH_STEP_A0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_STEP_A0	/;"	d
PCH_STEP_A1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_STEP_A1	/;"	d
PCH_STEP_B0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_STEP_B0	/;"	d
PCH_STEP_B1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_STEP_B1	/;"	d
PCH_STEP_B2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_STEP_B2	/;"	d
PCH_STEP_B3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_STEP_B3	/;"	d
PCH_TYPE_CPT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_TYPE_CPT	/;"	d
PCH_TYPE_PPT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_TYPE_PPT	/;"	d
PCH_VIDEO_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_VIDEO_DEV	/;"	d
PCH_WPT_BDW_H	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_H	/;"	d
PCH_WPT_BDW_U_BASE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_U_BASE	/;"	d
PCH_WPT_BDW_U_PREMIUM	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_U_PREMIUM	/;"	d
PCH_WPT_BDW_U_SAMPLE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_U_SAMPLE	/;"	d
PCH_WPT_BDW_Y_BASE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_Y_BASE	/;"	d
PCH_WPT_BDW_Y_PREMIUM	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_Y_PREMIUM	/;"	d
PCH_WPT_BDW_Y_SAMPLE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_BDW_Y_SAMPLE	/;"	d
PCH_WPT_HSW_U_SAMPLE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCH_WPT_HSW_U_SAMPLE	/;"	d
PCH_XHCI_DEV	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PCH_XHCI_DEV	/;"	d
PCH_XHCI_TEMP_BAR0	arch/x86/cpu/ivybridge/cpu.c	/^#define PCH_XHCI_TEMP_BAR0 /;"	d	file:
PCI	drivers/pci/Kconfig	/^menuconfig PCI$/;"	c
PCI9056_ABORT_ADDRESS	board/mpl/pati/plx9056.h	/^#define PCI9056_ABORT_ADDRESS /;"	d
PCI9056_ARBITER_CTRL	board/mpl/pati/plx9056.h	/^#define PCI9056_ARBITER_CTRL /;"	d
PCI9056_CACHE_SIZE	board/mpl/pati/plx9056.h	/^#define PCI9056_CACHE_SIZE /;"	d
PCI9056_CAP_PTR	board/mpl/pati/plx9056.h	/^#define PCI9056_CAP_PTR /;"	d
PCI9056_CIS_PTR	board/mpl/pati/plx9056.h	/^#define PCI9056_CIS_PTR /;"	d
PCI9056_COMMAND	board/mpl/pati/plx9056.h	/^#define PCI9056_COMMAND /;"	d
PCI9056_DM_DAC	board/mpl/pati/plx9056.h	/^#define PCI9056_DM_DAC /;"	d
PCI9056_DM_IO_BASE	board/mpl/pati/plx9056.h	/^#define PCI9056_DM_IO_BASE /;"	d
PCI9056_DM_MEM_BASE	board/mpl/pati/plx9056.h	/^#define PCI9056_DM_MEM_BASE /;"	d
PCI9056_DM_PCI_IO_CONFIG	board/mpl/pati/plx9056.h	/^#define PCI9056_DM_PCI_IO_CONFIG /;"	d
PCI9056_DM_PCI_MEM_REMAP	board/mpl/pati/plx9056.h	/^#define PCI9056_DM_PCI_MEM_REMAP /;"	d
PCI9056_DM_RANGE	board/mpl/pati/plx9056.h	/^#define PCI9056_DM_RANGE /;"	d
PCI9056_EEPROM_CTRL_STAT	board/mpl/pati/plx9056.h	/^#define PCI9056_EEPROM_CTRL_STAT	/;"	d
PCI9056_ENDIAN_DESC	board/mpl/pati/plx9056.h	/^#define PCI9056_ENDIAN_DESC /;"	d
PCI9056_EXP_ROM_BASE	board/mpl/pati/plx9056.h	/^#define PCI9056_EXP_ROM_BASE /;"	d
PCI9056_EXP_ROM_RANGE	board/mpl/pati/plx9056.h	/^#define PCI9056_EXP_ROM_RANGE /;"	d
PCI9056_EXP_ROM_REMAP	board/mpl/pati/plx9056.h	/^#define PCI9056_EXP_ROM_REMAP /;"	d
PCI9056_HS_CAP_ID	board/mpl/pati/plx9056.h	/^    #define PCI9056_HS_CAP_ID /;"	d
PCI9056_INT_CTRL_STAT	board/mpl/pati/plx9056.h	/^#define PCI9056_INT_CTRL_STAT	/;"	d
PCI9056_INT_LINE	board/mpl/pati/plx9056.h	/^#define PCI9056_INT_LINE /;"	d
PCI9056_LOCAL_BASE0	board/mpl/pati/plx9056.h	/^#define PCI9056_LOCAL_BASE0 /;"	d
PCI9056_LOCAL_BASE1	board/mpl/pati/plx9056.h	/^#define PCI9056_LOCAL_BASE1 /;"	d
PCI9056_LOCAL_DMA_ARBIT	board/mpl/pati/plx9056.h	/^#define PCI9056_LOCAL_DMA_ARBIT /;"	d
PCI9056_LOC_TO_PCI_DBELL	board/mpl/pati/plx9056.h	/^#define PCI9056_LOC_TO_PCI_DBELL	/;"	d
PCI9056_MAILBOX0	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX0	/;"	d
PCI9056_MAILBOX1	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX1	/;"	d
PCI9056_MAILBOX2	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX2	/;"	d
PCI9056_MAILBOX3	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX3	/;"	d
PCI9056_MAILBOX4	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX4	/;"	d
PCI9056_MAILBOX5	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX5	/;"	d
PCI9056_MAILBOX6	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX6	/;"	d
PCI9056_MAILBOX7	board/mpl/pati/plx9056.h	/^#define PCI9056_MAILBOX7	/;"	d
PCI9056_PCI_TO_LOC_DBELL	board/mpl/pati/plx9056.h	/^#define PCI9056_PCI_TO_LOC_DBELL	/;"	d
PCI9056_PERM_VENDOR_ID	board/mpl/pati/plx9056.h	/^#define PCI9056_PERM_VENDOR_ID	/;"	d
PCI9056_PM_CAP_ID	board/mpl/pati/plx9056.h	/^    #define PCI9056_PM_CAP_ID /;"	d
PCI9056_PM_CSR	board/mpl/pati/plx9056.h	/^    #define PCI9056_PM_CSR /;"	d
PCI9056_REVISION	board/mpl/pati/plx9056.h	/^#define PCI9056_REVISION /;"	d
PCI9056_REVISION_ID	board/mpl/pati/plx9056.h	/^#define PCI9056_REVISION_ID	/;"	d
PCI9056_RTR_BASE	board/mpl/pati/plx9056.h	/^#define PCI9056_RTR_BASE /;"	d
PCI9056_RTR_IO_BASE	board/mpl/pati/plx9056.h	/^#define PCI9056_RTR_IO_BASE /;"	d
PCI9056_SPACE0_RANGE	board/mpl/pati/plx9056.h	/^#define PCI9056_SPACE0_RANGE /;"	d
PCI9056_SPACE0_REMAP	board/mpl/pati/plx9056.h	/^#define PCI9056_SPACE0_REMAP /;"	d
PCI9056_SPACE0_ROM_DESC	board/mpl/pati/plx9056.h	/^#define PCI9056_SPACE0_ROM_DESC /;"	d
PCI9056_SPACE1_DESC	board/mpl/pati/plx9056.h	/^#define PCI9056_SPACE1_DESC /;"	d
PCI9056_SPACE1_RANGE	board/mpl/pati/plx9056.h	/^#define PCI9056_SPACE1_RANGE /;"	d
PCI9056_SPACE1_REMAP	board/mpl/pati/plx9056.h	/^#define PCI9056_SPACE1_REMAP /;"	d
PCI9056_SUB_ID	board/mpl/pati/plx9056.h	/^#define PCI9056_SUB_ID /;"	d
PCI9056_UNUSED_BASE1	board/mpl/pati/plx9056.h	/^#define PCI9056_UNUSED_BASE1 /;"	d
PCI9056_UNUSED_BASE2	board/mpl/pati/plx9056.h	/^#define PCI9056_UNUSED_BASE2 /;"	d
PCI9056_VENDOR_ID	board/mpl/pati/plx9056.h	/^#define PCI9056_VENDOR_ID /;"	d
PCI9056_VPD_CAP_ID	board/mpl/pati/plx9056.h	/^    #define PCI9056_VPD_CAP_ID /;"	d
PCI9056_VPD_DATA	board/mpl/pati/plx9056.h	/^    #define PCI9056_VPD_DATA /;"	d
PCIAHB_WIN_PREFETCH	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIAHB_WIN_PREFETCH	/;"	d
PCIARB_ACR_DS	arch/m68k/include/asm/m547x_8x.h	/^#define PCIARB_ACR_DS	/;"	d
PCIARB_ARC_EXTMINTEN	arch/m68k/include/asm/m547x_8x.h	/^#define PCIARB_ARC_EXTMINTEN(/;"	d
PCIARB_ARC_EXTMPRI	arch/m68k/include/asm/m547x_8x.h	/^#define PCIARB_ARC_EXTMPRI(/;"	d
PCIARB_ARC_INTMINTEN	arch/m68k/include/asm/m547x_8x.h	/^#define PCIARB_ARC_INTMINTEN	/;"	d
PCIARB_ARC_INTMPRI	arch/m68k/include/asm/m547x_8x.h	/^#define PCIARB_ARC_INTMPRI	/;"	d
PCIBIOS_BADREG	arch/x86/lib/bios_interrupts.c	/^	PCIBIOS_BADREG = 0x8700$/;"	e	enum:__anon2aa00f8a0103	file:
PCIBIOS_BADVENDOR	arch/x86/lib/bios_interrupts.c	/^	PCIBIOS_BADVENDOR = 0x8300,$/;"	e	enum:__anon2aa00f8a0103	file:
PCIBIOS_NODEV	arch/x86/lib/bios_interrupts.c	/^	PCIBIOS_NODEV = 0x8600,$/;"	e	enum:__anon2aa00f8a0103	file:
PCIBIOS_SUCCESSFUL	arch/x86/lib/bios_interrupts.c	/^	PCIBIOS_SUCCESSFUL = 0x0000,$/;"	e	enum:__anon2aa00f8a0103	file:
PCIBIOS_UNSUPPORTED	arch/x86/lib/bios_interrupts.c	/^	PCIBIOS_UNSUPPORTED = 0x8100,$/;"	e	enum:__anon2aa00f8a0103	file:
PCIBP_MODE	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIBP_MODE	/;"	d
PCIBRDGOPT1	arch/powerpc/include/asm/4xx_pci.h	/^#define PCIBRDGOPT1 /;"	d
PCIBRDGOPT2	arch/powerpc/include/asm/4xx_pci.h	/^#define PCIBRDGOPT2 /;"	d
PCIBR_ENABLE	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIBR_ENABLE /;"	d
PCIBR_ENABLE	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIBR_ENABLE /;"	d
PCIBUSNUM	arch/powerpc/include/asm/4xx_pci.h	/^#define PCIBUSNUM /;"	d
PCIBUS_PARK_TIMER	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIBUS_PARK_TIMER /;"	d
PCIBUS_PARK_TIMER_SET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIBUS_PARK_TIMER_SET /;"	d
PCICFGADR	arch/powerpc/include/asm/4xx_pci.h	/^#define PCICFGADR /;"	d
PCICFGDATA	arch/powerpc/include/asm/4xx_pci.h	/^#define PCICFGDATA /;"	d
PCICFG_GET_REG	board/mpl/pati/cmd_pati.c	/^#define PCICFG_GET_REG(/;"	d	file:
PCICFG_SET_REG	board/mpl/pati/cmd_pati.c	/^#define PCICFG_SET_REG(/;"	d	file:
PCICLK_MASK	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCICLK_MASK	/;"	d
PCICON_ACK_REG	board/mpl/pati/pati.c	/^#define PCICON_ACK_REG	/;"	d	file:
PCICON_DBELL_REG	board/mpl/pati/pati.c	/^#define PCICON_DBELL_REG	/;"	d	file:
PCICON_GET_REG	board/mpl/pati/pati.c	/^#define PCICON_GET_REG(/;"	d	file:
PCICON_RECEIVE_REG	board/mpl/pati/pati.c	/^#define PCICON_RECEIVE_REG	/;"	d	file:
PCICON_SET_REG	board/mpl/pati/pati.c	/^#define PCICON_SET_REG(/;"	d	file:
PCICON_TRANSMIT_REG	board/mpl/pati/pati.c	/^#define PCICON_TRANSMIT_REG	/;"	d	file:
PCICON_TX_FLAG	board/mpl/pati/pati.c	/^#define PCICON_TX_FLAG	/;"	d	file:
PCIDEVID_405GP	arch/powerpc/include/asm/4xx_pci.h	/^#define PCIDEVID_405GP	/;"	d
PCIDEVID_MPC106	include/mpc106.h	/^#define PCIDEVID_MPC106	/;"	d
PCIDISCOUNT	arch/powerpc/include/asm/4xx_pci.h	/^#define PCIDISCOUNT /;"	d
PCIE	drivers/phy/marvell/comphy_a3700.h	/^#define PCIE	/;"	d
PCIE0	arch/powerpc/dts/canyonlands.dts	/^		PCIE0: pciex@d00000000 {$/;"	l
PCIE0	arch/powerpc/dts/glacier.dts	/^		PCIE0: pciex@d00000000 {$/;"	l
PCIE0	arch/powerpc/include/asm/4xx_pcie.h	/^#define PCIE0	/;"	d
PCIE0_CLK_OUT_EN_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PCIE0_CLK_OUT_EN_MASK	/;"	d
PCIE0_CLK_OUT_EN_OFF	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PCIE0_CLK_OUT_EN_OFF	/;"	d
PCIE0_ENABLE_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE0_ENABLE_MASK	/;"	d
PCIE0_ENABLE_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE0_ENABLE_OFFS	/;"	d
PCIE0_QUADX1_EN	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PCIE0_QUADX1_EN	/;"	d
PCIE0_SDR	arch/powerpc/include/asm/4xx_pcie.h	/^#define PCIE0_SDR	/;"	d
PCIE1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	PCIE1,$/;"	e	enum:srds_prtcl
PCIE1	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	PCIE1,$/;"	e	enum:srds_prtcl
PCIE1	arch/powerpc/dts/canyonlands.dts	/^		PCIE1: pciex@d20000000 {$/;"	l
PCIE1	arch/powerpc/dts/glacier.dts	/^		PCIE1: pciex@d20000000 {$/;"	l
PCIE1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PCIE1	/;"	d
PCIE1	arch/powerpc/include/asm/fsl_serdes.h	/^	PCIE1,$/;"	e	enum:srds_prtcl
PCIE1_CLK_OUT_EN_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PCIE1_CLK_OUT_EN_MASK	/;"	d
PCIE1_CLK_OUT_EN_OFF	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PCIE1_CLK_OUT_EN_OFF	/;"	d
PCIE1_ENABLE_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE1_ENABLE_MASK	/;"	d
PCIE1_ENABLE_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE1_ENABLE_OFFS	/;"	d
PCIE1_QUADX1_EN	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PCIE1_QUADX1_EN	/;"	d
PCIE1_SDR	arch/powerpc/include/asm/4xx_pcie.h	/^#define PCIE1_SDR	/;"	d
PCIE2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	PCIE2,$/;"	e	enum:srds_prtcl
PCIE2	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	PCIE2,$/;"	e	enum:srds_prtcl
PCIE2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PCIE2	/;"	d
PCIE2	arch/powerpc/include/asm/fsl_serdes.h	/^	PCIE2,$/;"	e	enum:srds_prtcl
PCIE2_ENABLE_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE2_ENABLE_MASK	/;"	d
PCIE2_ENABLE_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE2_ENABLE_OFFS	/;"	d
PCIE2_SDR	arch/powerpc/include/asm/4xx_pcie.h	/^#define PCIE2_SDR	/;"	d
PCIE3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	PCIE3,$/;"	e	enum:srds_prtcl
PCIE3	arch/powerpc/include/asm/fsl_serdes.h	/^	PCIE3,$/;"	e	enum:srds_prtcl
PCIE3_ENABLE_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE3_ENABLE_OFFS	/;"	d
PCIE4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	PCIE4,$/;"	e	enum:srds_prtcl
PCIE4	arch/powerpc/include/asm/fsl_serdes.h	/^	PCIE4,$/;"	e	enum:srds_prtcl
PCIE4_ENABLE_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PCIE4_ENABLE_MASK	/;"	d
PCIEBRG_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define PCIEBRG_BASE	/;"	d
PCIEPHY_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define PCIEPHY_BASE	/;"	d
PCIEPHY_SHFT	drivers/phy/marvell/comphy_a3700.h	/^#define PCIEPHY_SHFT	/;"	d
PCIETOP_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define PCIETOP_BASE	/;"	d
PCIEXBAR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PCIEXBAR	/;"	d
PCIEXBAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define PCIEXBAR	/;"	d
PCIEXPWAK_DIS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  PCIEXPWAK_DIS	/;"	d
PCIEXPWAK_DIS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PCIEXPWAK_DIS	/;"	d
PCIEXPWAK_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  PCIEXPWAK_STS	/;"	d
PCIEXPWAK_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PCIEXPWAK_STS	/;"	d
PCIEX_BAR	arch/x86/include/asm/arch-qemu/qemu.h	/^#define PCIEX_BAR	/;"	d
PCIE_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PCIE_ARB_BASE_ADDR /;"	d
PCIE_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PCIE_ARB_BASE_ADDR /;"	d
PCIE_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PCIE_ARB_END_ADDR /;"	d
PCIE_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PCIE_ARB_END_ADDR /;"	d
PCIE_ATU_BAR_MODE_ENABLE	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_BAR_MODE_ENABLE	/;"	d	file:
PCIE_ATU_BAR_MODE_ENABLE	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_BAR_MODE_ENABLE	/;"	d	file:
PCIE_ATU_BAR_NUM	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_BAR_NUM(/;"	d	file:
PCIE_ATU_BUS	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_BUS(/;"	d	file:
PCIE_ATU_BUS	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_BUS(/;"	d	file:
PCIE_ATU_CR1	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_CR1	/;"	d	file:
PCIE_ATU_CR1	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_CR1	/;"	d	file:
PCIE_ATU_CR2	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_CR2	/;"	d	file:
PCIE_ATU_CR2	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_CR2	/;"	d	file:
PCIE_ATU_DEV	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_DEV(/;"	d	file:
PCIE_ATU_DEV	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_DEV(/;"	d	file:
PCIE_ATU_ENABLE	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_ENABLE	/;"	d	file:
PCIE_ATU_ENABLE	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_ENABLE	/;"	d	file:
PCIE_ATU_FUNC	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_FUNC(/;"	d	file:
PCIE_ATU_FUNC	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_FUNC(/;"	d	file:
PCIE_ATU_LIMIT	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_LIMIT	/;"	d	file:
PCIE_ATU_LIMIT	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_LIMIT	/;"	d	file:
PCIE_ATU_LOWER_BASE	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_LOWER_BASE	/;"	d	file:
PCIE_ATU_LOWER_BASE	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_LOWER_BASE	/;"	d	file:
PCIE_ATU_LOWER_TARGET	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_LOWER_TARGET	/;"	d	file:
PCIE_ATU_LOWER_TARGET	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_LOWER_TARGET	/;"	d	file:
PCIE_ATU_REGION_INBOUND	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_REGION_INBOUND	/;"	d	file:
PCIE_ATU_REGION_INBOUND	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_REGION_INBOUND	/;"	d	file:
PCIE_ATU_REGION_INDEX0	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_REGION_INDEX0	/;"	d	file:
PCIE_ATU_REGION_INDEX0	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_REGION_INDEX0	/;"	d	file:
PCIE_ATU_REGION_INDEX1	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_REGION_INDEX1	/;"	d	file:
PCIE_ATU_REGION_INDEX1	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_REGION_INDEX1	/;"	d	file:
PCIE_ATU_REGION_INDEX2	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_REGION_INDEX2	/;"	d	file:
PCIE_ATU_REGION_INDEX3	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_REGION_INDEX3	/;"	d	file:
PCIE_ATU_REGION_OUTBOUND	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_REGION_OUTBOUND	/;"	d	file:
PCIE_ATU_REGION_OUTBOUND	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_REGION_OUTBOUND	/;"	d	file:
PCIE_ATU_TYPE_CFG0	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_TYPE_CFG0	/;"	d	file:
PCIE_ATU_TYPE_CFG0	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_TYPE_CFG0	/;"	d	file:
PCIE_ATU_TYPE_CFG1	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_TYPE_CFG1	/;"	d	file:
PCIE_ATU_TYPE_CFG1	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_TYPE_CFG1	/;"	d	file:
PCIE_ATU_TYPE_IO	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_TYPE_IO	/;"	d	file:
PCIE_ATU_TYPE_IO	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_TYPE_IO	/;"	d	file:
PCIE_ATU_TYPE_MEM	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_TYPE_MEM	/;"	d	file:
PCIE_ATU_TYPE_MEM	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_TYPE_MEM	/;"	d	file:
PCIE_ATU_UPPER_BASE	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_UPPER_BASE	/;"	d	file:
PCIE_ATU_UPPER_BASE	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_UPPER_BASE	/;"	d	file:
PCIE_ATU_UPPER_TARGET	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_UPPER_TARGET	/;"	d	file:
PCIE_ATU_UPPER_TARGET	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_UPPER_TARGET	/;"	d	file:
PCIE_ATU_VIEWPORT	drivers/pci/pcie_imx.c	/^#define PCIE_ATU_VIEWPORT	/;"	d	file:
PCIE_ATU_VIEWPORT	drivers/pci/pcie_layerscape.c	/^#define PCIE_ATU_VIEWPORT	/;"	d	file:
PCIE_BAR0_SIZE	drivers/pci/pcie_layerscape.c	/^#define PCIE_BAR0_SIZE	/;"	d	file:
PCIE_BAR1_SIZE	drivers/pci/pcie_layerscape.c	/^#define PCIE_BAR1_SIZE	/;"	d	file:
PCIE_BAR2_SIZE	drivers/pci/pcie_layerscape.c	/^#define PCIE_BAR2_SIZE	/;"	d	file:
PCIE_BAR4_SIZE	drivers/pci/pcie_layerscape.c	/^#define PCIE_BAR4_SIZE	/;"	d	file:
PCIE_BAR_CTRL_OFF	drivers/pci/pci_mvebu.c	/^#define  PCIE_BAR_CTRL_OFF(/;"	d	file:
PCIE_BAR_HI_OFF	drivers/pci/pci_mvebu.c	/^#define  PCIE_BAR_HI_OFF(/;"	d	file:
PCIE_BAR_LO_OFF	drivers/pci/pci_mvebu.c	/^#define  PCIE_BAR_LO_OFF(/;"	d	file:
PCIE_BASE	drivers/pci/pci_mvebu.c	/^#define PCIE_BASE(/;"	d	file:
PCIE_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define PCIE_BASE	/;"	d
PCIE_BOOT_SUPPORTED	include/configs/x600.h	/^#define PCIE_BOOT_SUPPORTED	/;"	d
PCIE_BRIDGE_DEV	arch/x86/include/asm/acpi/irq_helper.h	/^#define PCIE_BRIDGE_DEV(/;"	d
PCIE_BRIDGE_IRQ_ROUTES	arch/x86/include/asm/arch-baytrail/acpi/irqroute.h	/^#define PCIE_BRIDGE_IRQ_ROUTES /;"	d
PCIE_BRIDGE_IRQ_ROUTES	arch/x86/include/asm/arch-quark/acpi/irqroute.h	/^#define PCIE_BRIDGE_IRQ_ROUTES /;"	d
PCIE_CAPAB_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_CAPAB_OFF	/;"	d	file:
PCIE_CFG	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_CFG	/;"	d
PCIE_CMD_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_CMD_OFF	/;"	d	file:
PCIE_CONFIG_OB_CK	arch/powerpc/include/asm/fsl_pci.h	/^#define PCIE_CONFIG_OB_CK	/;"	d
PCIE_CONFIG_PC	arch/powerpc/include/asm/fsl_pci.h	/^#define PCIE_CONFIG_PC	/;"	d
PCIE_CONFIG_SAC	arch/powerpc/include/asm/fsl_pci.h	/^#define PCIE_CONFIG_SAC	/;"	d
PCIE_CONFIG_SCC	arch/powerpc/include/asm/fsl_pci.h	/^#define PCIE_CONFIG_SCC	/;"	d
PCIE_CONFIG_SP	arch/powerpc/include/asm/fsl_pci.h	/^#define PCIE_CONFIG_SP	/;"	d
PCIE_CONF_ADDR	drivers/pci/pci_mvebu.c	/^#define  PCIE_CONF_ADDR(/;"	d	file:
PCIE_CONF_ADDR_EN	drivers/pci/pci_mvebu.c	/^#define  PCIE_CONF_ADDR_EN	/;"	d	file:
PCIE_CONF_ADDR_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_CONF_ADDR_OFF	/;"	d	file:
PCIE_CONF_BUS	drivers/pci/pci_mvebu.c	/^#define  PCIE_CONF_BUS(/;"	d	file:
PCIE_CONF_DATA_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_CONF_DATA_OFF	/;"	d	file:
PCIE_CONF_DEV	drivers/pci/pci_mvebu.c	/^#define  PCIE_CONF_DEV(/;"	d	file:
PCIE_CONF_FUNC	drivers/pci/pci_mvebu.c	/^#define  PCIE_CONF_FUNC(/;"	d	file:
PCIE_CONF_REG	drivers/pci/pci_mvebu.c	/^#define  PCIE_CONF_REG(/;"	d	file:
PCIE_CTLR_MAIN_RST	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_CTLR_MAIN_RST	/;"	d
PCIE_CTLR_PRI_RST	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_CTLR_PRI_RST	/;"	d
PCIE_CTLR_SB_RST	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_CTLR_SB_RST	/;"	d
PCIE_CTRL_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	PCIE_CTRL_CLK_ROOT = 67,$/;"	e	enum:clk_root_index
PCIE_CTRL_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_ENET_MAIN_250M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_PFD1_332M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_CTRL_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
PCIE_CTRL_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_CTRL_OFF	/;"	d	file:
PCIE_CTRL_STAT_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_CTRL_STAT_OFF	/;"	d	file:
PCIE_CTRL_X1_MODE	drivers/pci/pci_mvebu.c	/^#define  PCIE_CTRL_X1_MODE	/;"	d	file:
PCIE_DBI_RO_WR_EN	drivers/pci/pcie_layerscape.c	/^#define PCIE_DBI_RO_WR_EN	/;"	d	file:
PCIE_DBI_SIZE	drivers/pci/pcie_layerscape.c	/^#define PCIE_DBI_SIZE	/;"	d	file:
PCIE_DEBUG_CTRL	drivers/pci/pci_mvebu.c	/^#define PCIE_DEBUG_CTRL	/;"	d	file:
PCIE_DEBUG_SOFT_RESET	drivers/pci/pci_mvebu.c	/^#define  PCIE_DEBUG_SOFT_RESET	/;"	d	file:
PCIE_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define PCIE_DEV	/;"	d
PCIE_DEVICE_ID_NEO_4_IBM	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NEO_4_IBM /;"	d
PCIE_DEVICE_ID_NVIDIA_GEFORCE_6200_ALT1	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6200_ALT1 /;"	d
PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT1	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT1 /;"	d
PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT2	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT2 /;"	d
PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_ALT1	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_ALT1 /;"	d
PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_GT	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_GT /;"	d
PCIE_DEVICE_ID_NVIDIA_QUADRO_NVS280	include/pci_ids.h	/^#define PCIE_DEVICE_ID_NVIDIA_QUADRO_NVS280	/;"	d
PCIE_DEV_ID_OFF	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define PCIE_DEV_ID_OFF /;"	d
PCIE_DEV_ID_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_DEV_ID_OFF	/;"	d	file:
PCIE_DEV_REV_OFF	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define PCIE_DEV_REV_OFF /;"	d
PCIE_DEV_REV_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_DEV_REV_OFF	/;"	d	file:
PCIE_DIS_B	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	PCIE_DIS_B,$/;"	e	enum:qn	file:
PCIE_ECAM_BASE	arch/x86/Kconfig	/^config PCIE_ECAM_BASE$/;"	c	menu:x86 architecture
PCIE_ECAM_BASE	arch/x86/cpu/quark/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/advantech/som-db5800-som-6867/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/dfi/dfi-bt700/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/google/chromebook_link/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/google/chromebook_samus/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/intel/bayleybay/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_BASE	board/intel/minnowmax/Kconfig	/^config PCIE_ECAM_BASE$/;"	c
PCIE_ECAM_SIZE	arch/x86/Kconfig	/^config PCIE_ECAM_SIZE$/;"	c	menu:x86 architecture
PCIE_ENV	include/configs/MPC8610HPCD.h	/^#define	PCIE_ENV /;"	d
PCIE_ENV	include/configs/MPC8610HPCD.h	/^#define PCIE_ENV /;"	d
PCIE_HEADER_LOG_4_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_HEADER_LOG_4_OFF	/;"	d	file:
PCIE_LCTRL0_CFG2_ENABLE	drivers/pci/pcie_layerscape.c	/^#define PCIE_LCTRL0_CFG2_ENABLE	/;"	d	file:
PCIE_LCTRL0_PF	drivers/pci/pcie_layerscape.c	/^#define PCIE_LCTRL0_PF(/;"	d	file:
PCIE_LCTRL0_VAL	drivers/pci/pcie_layerscape.c	/^#define PCIE_LCTRL0_VAL(/;"	d	file:
PCIE_LCTRL0_VF	drivers/pci/pcie_layerscape.c	/^#define PCIE_LCTRL0_VF(/;"	d	file:
PCIE_LCTRL0_VF_ACTIVE	drivers/pci/pcie_layerscape.c	/^#define PCIE_LCTRL0_VF_ACTIVE	/;"	d	file:
PCIE_LINK_CAP	drivers/pci/pcie_layerscape.c	/^#define PCIE_LINK_CAP	/;"	d	file:
PCIE_LINK_SPEED_MASK	drivers/pci/pcie_layerscape.c	/^#define PCIE_LINK_SPEED_MASK	/;"	d	file:
PCIE_LINK_STA	drivers/pci/pcie_layerscape.c	/^#define PCIE_LINK_STA	/;"	d	file:
PCIE_LUT_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define PCIE_LUT_BASE	/;"	d
PCIE_LUT_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_BASE	/;"	d
PCIE_LUT_DBG	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define PCIE_LUT_DBG	/;"	d
PCIE_LUT_DBG	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_DBG	/;"	d
PCIE_LUT_ENABLE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_ENABLE /;"	d
PCIE_LUT_ENTRY_COUNT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_ENTRY_COUNT /;"	d
PCIE_LUT_LCTRL0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define PCIE_LUT_LCTRL0	/;"	d
PCIE_LUT_LCTRL0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_LCTRL0	/;"	d
PCIE_LUT_LDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_LDR(/;"	d
PCIE_LUT_UDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define PCIE_LUT_UDR(/;"	d
PCIE_MASK_ENABLE_INTS	drivers/pci/pci_mvebu.c	/^#define  PCIE_MASK_ENABLE_INTS /;"	d	file:
PCIE_MASK_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_MASK_OFF	/;"	d	file:
PCIE_MAX_BUSES	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define PCIE_MAX_BUSES /;"	d	file:
PCIE_MEM_SIZE	drivers/pci/pci_mvebu.c	/^#define PCIE_MEM_SIZE	/;"	d	file:
PCIE_NO_SRIOV_BAR_BASE	drivers/pci/pcie_layerscape.c	/^#define PCIE_NO_SRIOV_BAR_BASE	/;"	d	file:
PCIE_OP	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define PCIE_OP(/;"	d	file:
PCIE_OP	arch/powerpc/cpu/mpc83xx/pcie.c	/^PCIE_OP(read, byte, u8 *, in_8)$/;"	f	file:
PCIE_PATH	board/gateworks/gw_ventana/gw_ventana.c	/^#define PCIE_PATH	/;"	d	file:
PCIE_PF_NUM	drivers/pci/pcie_layerscape.c	/^#define PCIE_PF_NUM	/;"	d	file:
PCIE_PHY_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	PCIE_PHY_CLK_ROOT = 68,$/;"	e	enum:clk_root_index
PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
PCIE_PHY_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
PCIE_PHY_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
PCIE_PHY_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
PCIE_PHY_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PCIE_PHY_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
PCIE_PHY_CTRL	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_CTRL /;"	d	file:
PCIE_PHY_CTRL_CAP_ADR_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_CTRL_CAP_ADR_LOC /;"	d	file:
PCIE_PHY_CTRL_CAP_DAT_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_CTRL_CAP_DAT_LOC /;"	d	file:
PCIE_PHY_CTRL_DATA_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_CTRL_DATA_LOC /;"	d	file:
PCIE_PHY_CTRL_RD_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_CTRL_RD_LOC /;"	d	file:
PCIE_PHY_CTRL_WR_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_CTRL_WR_LOC /;"	d	file:
PCIE_PHY_DEBUG_R0	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_DEBUG_R0 /;"	d	file:
PCIE_PHY_DEBUG_R1	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_DEBUG_R1 /;"	d	file:
PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING	/;"	d	file:
PCIE_PHY_DEBUG_R1_LINK_UP	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_DEBUG_R1_LINK_UP	/;"	d	file:
PCIE_PHY_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PCIE_PHY_IPS_BASE_ADDR /;"	d
PCIE_PHY_LANE_RST	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_PHY_LANE_RST	/;"	d
PCIE_PHY_PUP_REQ	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_PUP_REQ	/;"	d	file:
PCIE_PHY_RX_ASIC_OUT	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_RX_ASIC_OUT /;"	d	file:
PCIE_PHY_SB_RST	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_PHY_SB_RST	/;"	d
PCIE_PHY_STAT	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_STAT /;"	d	file:
PCIE_PHY_STAT_ACK_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_STAT_ACK_LOC /;"	d	file:
PCIE_PHY_STAT_DATA_LOC	drivers/pci/pcie_imx.c	/^#define PCIE_PHY_STAT_DATA_LOC /;"	d	file:
PCIE_RAMBASE	drivers/phy/marvell/comphy_a3700.h	/^#define PCIE_RAMBASE	/;"	d
PCIE_REG0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define PCIE_REG0	/;"	d
PCIE_REG1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define PCIE_REG1	/;"	d
PCIE_REG3	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define PCIE_REG3	/;"	d
PCIE_REG_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PCIE_REG_BASE_ADDR /;"	d
PCIE_REG_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PCIE_REG_END_ADDR /;"	d
PCIE_RP_CCFG	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_RP_CCFG	/;"	d
PCIE_RP_MBC	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_RP_MBC	/;"	d
PCIE_RP_MPC2	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_RP_MPC2	/;"	d
PCIE_RST	board/keymile/km_arm/fpga_config.c	/^#define PCIE_RST	/;"	d	file:
PCIE_RST_B	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	PCIE_RST_B,$/;"	e	enum:qn	file:
PCIE_RXPICTRL0_L0	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_RXPICTRL0_L0	/;"	d
PCIE_RXPICTRL0_L1	arch/x86/include/asm/arch-quark/quark.h	/^#define PCIE_RXPICTRL0_L1	/;"	d
PCIE_SETUP_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define PCIE_SETUP_BASE	/;"	d
PCIE_STAT_BUS	drivers/pci/pci_mvebu.c	/^#define  PCIE_STAT_BUS /;"	d	file:
PCIE_STAT_DEV	drivers/pci/pci_mvebu.c	/^#define  PCIE_STAT_DEV /;"	d	file:
PCIE_STAT_LINK_DOWN	drivers/pci/pci_mvebu.c	/^#define  PCIE_STAT_LINK_DOWN	/;"	d	file:
PCIE_STAT_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_STAT_OFF	/;"	d	file:
PCIE_SW_RST	board/keymile/kmp204x/pci.c	/^#define PCIE_SW_RST	/;"	d	file:
PCIE_SYSTEM_BUS_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define PCIE_SYSTEM_BUS_BASE	/;"	d
PCIE_VF_NUM	drivers/pci/pcie_layerscape.c	/^#define PCIE_VF_NUM	/;"	d	file:
PCIE_WIN04_BASE_OFF	drivers/pci/pci_mvebu.c	/^#define  PCIE_WIN04_BASE_OFF(/;"	d	file:
PCIE_WIN04_CTRL_OFF	drivers/pci/pci_mvebu.c	/^#define  PCIE_WIN04_CTRL_OFF(/;"	d	file:
PCIE_WIN04_REMAP_OFF	drivers/pci/pci_mvebu.c	/^#define  PCIE_WIN04_REMAP_OFF(/;"	d	file:
PCIE_WIN5_BASE_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_WIN5_BASE_OFF	/;"	d	file:
PCIE_WIN5_CTRL_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_WIN5_CTRL_OFF	/;"	d	file:
PCIE_WIN5_REMAP_OFF	drivers/pci/pci_mvebu.c	/^#define PCIE_WIN5_REMAP_OFF	/;"	d	file:
PCIErr	drivers/net/rtl8139.c	/^	PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,$/;"	e	enum:IntrStatusBits	file:
PCIGCR_PCI_BUS_EN	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIGCR_PCI_BUS_EN /;"	d
PCIGCR_PCI_BUS_EN	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIGCR_PCI_BUS_EN /;"	d
PCIL0_BAR0	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BAR0	/;"	d
PCIL0_BAR1	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BAR1	/;"	d
PCIL0_BAR2	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BAR2	/;"	d
PCIL0_BAR3	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BAR3	/;"	d
PCIL0_BAR4	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BAR4	/;"	d
PCIL0_BAR5	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BAR5	/;"	d
PCIL0_BIST	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_BIST	/;"	d
PCIL0_BRDGOPT1	arch/powerpc/include/asm/ppc440gp.h	/^#define PCIL0_BRDGOPT1	/;"	d
PCIL0_BRDGOPT1	arch/powerpc/include/asm/ppc440gx.h	/^#define PCIL0_BRDGOPT1	/;"	d
PCIL0_BRDGOPT1	arch/powerpc/include/asm/ppc440sp.h	/^#define PCIL0_BRDGOPT1	/;"	d
PCIL0_BRDGOPT1	arch/powerpc/include/asm/ppc440spe.h	/^#define PCIL0_BRDGOPT1	/;"	d
PCIL0_BRDGOPT1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PCIL0_BRDGOPT1	/;"	d
PCIL0_BRDGOPT2	arch/powerpc/include/asm/ppc440gp.h	/^#define PCIL0_BRDGOPT2	/;"	d
PCIL0_BRDGOPT2	arch/powerpc/include/asm/ppc440gx.h	/^#define PCIL0_BRDGOPT2	/;"	d
PCIL0_BRDGOPT2	arch/powerpc/include/asm/ppc440sp.h	/^#define PCIL0_BRDGOPT2	/;"	d
PCIL0_BRDGOPT2	arch/powerpc/include/asm/ppc440spe.h	/^#define PCIL0_BRDGOPT2	/;"	d
PCIL0_BRDGOPT2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PCIL0_BRDGOPT2	/;"	d
PCIL0_CACHELS	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CACHELS	/;"	d
PCIL0_CAP	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CAP	/;"	d
PCIL0_CFGADR	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CFGADR	/;"	d
PCIL0_CFGBASE	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CFGBASE	/;"	d
PCIL0_CFGDATA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CFGDATA	/;"	d
PCIL0_CISPTR	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CISPTR	/;"	d
PCIL0_CLS	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CLS	/;"	d
PCIL0_CMD	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_CMD	/;"	d
PCIL0_DEVID	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_DEVID	/;"	d
PCIL0_EROMBA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_EROMBA	/;"	d
PCIL0_HDTYPE	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_HDTYPE	/;"	d
PCIL0_INTLN	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_INTLN	/;"	d
PCIL0_INTPN	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_INTPN	/;"	d
PCIL0_IOBASE	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_IOBASE	/;"	d
PCIL0_LATTIM	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_LATTIM	/;"	d
PCIL0_MAXLTNCY	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_MAXLTNCY	/;"	d
PCIL0_MINGNT	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_MINGNT	/;"	d
PCIL0_PIM0LAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM0LAH	/;"	d
PCIL0_PIM0LAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM0LAL	/;"	d
PCIL0_PIM0SA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM0SA	/;"	d
PCIL0_PIM1LAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM1LAH	/;"	d
PCIL0_PIM1LAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM1LAL	/;"	d
PCIL0_PIM1SA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM1SA	/;"	d
PCIL0_PIM2LAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM2LAH	/;"	d
PCIL0_PIM2LAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM2LAL	/;"	d
PCIL0_PIM2SA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_PIM2SA	/;"	d
PCIL0_PMM0LA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM0LA	/;"	d
PCIL0_PMM0LA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM0LA	/;"	d
PCIL0_PMM0MA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM0MA	/;"	d
PCIL0_PMM0MA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM0MA	/;"	d
PCIL0_PMM0PCIHA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM0PCIHA	/;"	d
PCIL0_PMM0PCIHA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM0PCIHA	/;"	d
PCIL0_PMM0PCILA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM0PCILA	/;"	d
PCIL0_PMM0PCILA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM0PCILA	/;"	d
PCIL0_PMM1LA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM1LA	/;"	d
PCIL0_PMM1LA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM1LA	/;"	d
PCIL0_PMM1MA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM1MA	/;"	d
PCIL0_PMM1MA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM1MA	/;"	d
PCIL0_PMM1PCIHA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM1PCIHA	/;"	d
PCIL0_PMM1PCIHA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM1PCIHA	/;"	d
PCIL0_PMM1PCILA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM1PCILA	/;"	d
PCIL0_PMM1PCILA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM1PCILA	/;"	d
PCIL0_PMM2LA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM2LA	/;"	d
PCIL0_PMM2LA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM2LA	/;"	d
PCIL0_PMM2MA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM2MA	/;"	d
PCIL0_PMM2MA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM2MA	/;"	d
PCIL0_PMM2PCIHA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM2PCIHA	/;"	d
PCIL0_PMM2PCIHA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM2PCIHA	/;"	d
PCIL0_PMM2PCILA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PMM2PCILA	/;"	d
PCIL0_PMM2PCILA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PMM2PCILA	/;"	d
PCIL0_POM0LAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM0LAH	/;"	d
PCIL0_POM0LAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM0LAL	/;"	d
PCIL0_POM0PCIAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM0PCIAH	/;"	d
PCIL0_POM0PCIAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM0PCIAL	/;"	d
PCIL0_POM0SA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM0SA	/;"	d
PCIL0_POM1LAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM1LAH	/;"	d
PCIL0_POM1LAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM1LAL	/;"	d
PCIL0_POM1PCIAH	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM1PCIAH	/;"	d
PCIL0_POM1PCIAL	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM1PCIAL	/;"	d
PCIL0_POM1SA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM1SA	/;"	d
PCIL0_POM2SA	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_POM2SA	/;"	d
PCIL0_PTM1LA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PTM1LA	/;"	d
PCIL0_PTM1LA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PTM1LA	/;"	d
PCIL0_PTM1MS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PTM1MS	/;"	d
PCIL0_PTM1MS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PTM1MS	/;"	d
PCIL0_PTM2LA	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PTM2LA	/;"	d
PCIL0_PTM2LA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PTM2LA	/;"	d
PCIL0_PTM2MS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCIL0_PTM2MS	/;"	d
PCIL0_PTM2MS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCIL0_PTM2MS	/;"	d
PCIL0_RES0	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_RES0	/;"	d
PCIL0_RES1	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_RES1	/;"	d
PCIL0_RES2	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_RES2	/;"	d
PCIL0_REVID	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_REVID	/;"	d
PCIL0_SBSYSID	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_SBSYSID	/;"	d
PCIL0_SBSYSVID	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_SBSYSVID	/;"	d
PCIL0_STATUS	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_STATUS	/;"	d
PCIL0_STS	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_STS	/;"	d
PCIL0_VENDID	arch/powerpc/include/asm/ppc440.h	/^#define PCIL0_VENDID	/;"	d
PCIMSG_ALIVE	board/mpl/pati/pati.c	/^#define PCIMSG_ALIVE	/;"	d	file:
PCIMSG_CONN	board/mpl/pati/pati.c	/^#define PCIMSG_CONN	/;"	d	file:
PCIMSG_CON_DATA	board/mpl/pati/pati.c	/^#define PCIMSG_CON_DATA	/;"	d	file:
PCIMSG_DISC	board/mpl/pati/pati.c	/^#define PCIMSG_DISC	/;"	d	file:
PCIMSK0_MASK	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCIMSK0_MASK	/;"	d	file:
PCIMSK1_MASK	arch/powerpc/cpu/mpc8260/pci.c	/^#define	 PCIMSK1_MASK	/;"	d	file:
PCIMSK_128KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_128KB /;"	d
PCIMSK_128KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_128KB /;"	d
PCIMSK_128MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_128MB /;"	d
PCIMSK_128MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_128MB /;"	d
PCIMSK_16MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_16MB /;"	d
PCIMSK_16MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_16MB /;"	d
PCIMSK_1GB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_1GB /;"	d
PCIMSK_1GB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_1GB /;"	d
PCIMSK_1MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_1MB /;"	d
PCIMSK_1MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_1MB /;"	d
PCIMSK_256KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_256KB /;"	d
PCIMSK_256KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_256KB /;"	d
PCIMSK_256MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_256MB /;"	d
PCIMSK_256MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_256MB /;"	d
PCIMSK_2MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_2MB /;"	d
PCIMSK_2MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_2MB /;"	d
PCIMSK_32KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_32KB /;"	d
PCIMSK_32KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_32KB /;"	d
PCIMSK_32MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_32MB /;"	d
PCIMSK_32MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_32MB /;"	d
PCIMSK_4MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_4MB /;"	d
PCIMSK_4MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_4MB /;"	d
PCIMSK_512KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_512KB /;"	d
PCIMSK_512KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_512KB /;"	d
PCIMSK_512MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_512MB /;"	d
PCIMSK_512MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_512MB /;"	d
PCIMSK_64KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_64KB /;"	d
PCIMSK_64KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_64KB /;"	d
PCIMSK_64MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_64MB /;"	d
PCIMSK_64MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_64MB /;"	d
PCIMSK_8MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PCIMSK_8MB /;"	d
PCIMSK_8MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCIMSK_8MB /;"	d
PCIORL_A	board/renesas/rsk7203/lowlevel_init.S	/^PCIORL_A:	.long 0xFFFE3906$/;"	l
PCIORL_D	board/renesas/rsk7203/lowlevel_init.S	/^PCIORL_D:	.word 0x4000$/;"	l
PCIO_BASE	arch/arm/include/asm/arch-pxa/hardware.h	/^#define PCIO_BASE	/;"	d
PCIPM	drivers/net/natsemi.c	/^	PCIPM		= 0x44,$/;"	e	enum:register_offsets	file:
PCIPM	drivers/net/ns8382x.c	/^	PCIPM = 0x44,$/;"	e	enum:register_offsets	file:
PCIREG_32	board/renesas/sh7785lcr/rtl8169.h	/^#define PCIREG_32(/;"	d
PCIREG_8	board/renesas/sh7785lcr/rtl8169.h	/^#define PCIREG_8(/;"	d
PCIREQ0	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ0 /;"	d
PCIREQ1	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ1 /;"	d
PCIREQ2	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ2 /;"	d
PCIREQ3	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ3 /;"	d
PCIREQ4	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ4 /;"	d
PCIREQ5	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ5 /;"	d
PCIREQ6	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ6 /;"	d
PCIREQ7	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIREQ7 /;"	d
PCISUBBUSNUM	arch/powerpc/include/asm/4xx_pci.h	/^#define PCISUBBUSNUM /;"	d
PCIWIN1_PCICMD	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIWIN1_PCICMD	/;"	d
PCIWIN2_PCICMD	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCIWIN2_PCICMD	/;"	d
PCIX0	arch/powerpc/dts/canyonlands.dts	/^		PCIX0: pci@c0ec00000 {$/;"	l
PCIX0	arch/powerpc/dts/glacier.dts	/^		PCIX0: pci@c0ec00000 {$/;"	l
PCIX_COMMAND	arch/powerpc/include/asm/immap_85xx.h	/^#define PCIX_COMMAND	/;"	d
PCIX_COMMAND_MMRBC_MASK	drivers/net/e1000.h	/^#define PCIX_COMMAND_MMRBC_MASK /;"	d
PCIX_COMMAND_MMRBC_SHIFT	drivers/net/e1000.h	/^#define PCIX_COMMAND_MMRBC_SHIFT /;"	d
PCIX_COMMAND_REGISTER	drivers/net/e1000.h	/^#define PCIX_COMMAND_REGISTER	/;"	d
PCIX_STATUS_HI_MMRBC_2K	drivers/net/e1000.h	/^#define PCIX_STATUS_HI_MMRBC_2K /;"	d
PCIX_STATUS_HI_MMRBC_4K	drivers/net/e1000.h	/^#define PCIX_STATUS_HI_MMRBC_4K /;"	d
PCIX_STATUS_HI_MMRBC_MASK	drivers/net/e1000.h	/^#define PCIX_STATUS_HI_MMRBC_MASK /;"	d
PCIX_STATUS_HI_MMRBC_SHIFT	drivers/net/e1000.h	/^#define PCIX_STATUS_HI_MMRBC_SHIFT /;"	d
PCIX_STATUS_REGISTER_HI	drivers/net/e1000.h	/^#define PCIX_STATUS_REGISTER_HI /;"	d
PCIX_STATUS_REGISTER_LO	drivers/net/e1000.h	/^#define PCIX_STATUS_REGISTER_LO /;"	d
PCI_64BIT	include/configs/sbc8349.h	/^#define PCI_64BIT$/;"	d
PCI_64BIT	include/configs/vme8349.h	/^#define PCI_64BIT$/;"	d
PCI_ACCESS_READ	drivers/pci/pci_gt64120.c	/^#define PCI_ACCESS_READ /;"	d	file:
PCI_ACCESS_READ	drivers/pci/pci_msc01.c	/^#define PCI_ACCESS_READ /;"	d	file:
PCI_ACCESS_READ	drivers/pci/pcie_imx.c	/^#define PCI_ACCESS_READ /;"	d	file:
PCI_ACCESS_WRITE	drivers/pci/pci_gt64120.c	/^#define PCI_ACCESS_WRITE /;"	d	file:
PCI_ACCESS_WRITE	drivers/pci/pci_msc01.c	/^#define PCI_ACCESS_WRITE /;"	d	file:
PCI_ACCESS_WRITE	drivers/pci/pcie_imx.c	/^#define PCI_ACCESS_WRITE /;"	d	file:
PCI_ADD_BUS	include/pci.h	/^#define PCI_ADD_BUS(/;"	d
PCI_AGP_COMMAND	include/pci.h	/^#define PCI_AGP_COMMAND	/;"	d
PCI_AGP_COMMAND_64BIT	include/pci.h	/^#define  PCI_AGP_COMMAND_64BIT	/;"	d
PCI_AGP_COMMAND_AGP	include/pci.h	/^#define  PCI_AGP_COMMAND_AGP	/;"	d
PCI_AGP_COMMAND_FW	include/pci.h	/^#define  PCI_AGP_COMMAND_FW	/;"	d
PCI_AGP_COMMAND_RATE1	include/pci.h	/^#define  PCI_AGP_COMMAND_RATE1	/;"	d
PCI_AGP_COMMAND_RATE2	include/pci.h	/^#define  PCI_AGP_COMMAND_RATE2	/;"	d
PCI_AGP_COMMAND_RATE4	include/pci.h	/^#define  PCI_AGP_COMMAND_RATE4	/;"	d
PCI_AGP_COMMAND_RQ_MASK	include/pci.h	/^#define  PCI_AGP_COMMAND_RQ_MASK /;"	d
PCI_AGP_COMMAND_SBA	include/pci.h	/^#define  PCI_AGP_COMMAND_SBA	/;"	d
PCI_AGP_RFU	include/pci.h	/^#define PCI_AGP_RFU	/;"	d
PCI_AGP_SIZEOF	include/pci.h	/^#define PCI_AGP_SIZEOF	/;"	d
PCI_AGP_STATUS	include/pci.h	/^#define PCI_AGP_STATUS	/;"	d
PCI_AGP_STATUS_64BIT	include/pci.h	/^#define  PCI_AGP_STATUS_64BIT	/;"	d
PCI_AGP_STATUS_FW	include/pci.h	/^#define  PCI_AGP_STATUS_FW	/;"	d
PCI_AGP_STATUS_RATE1	include/pci.h	/^#define  PCI_AGP_STATUS_RATE1	/;"	d
PCI_AGP_STATUS_RATE2	include/pci.h	/^#define  PCI_AGP_STATUS_RATE2	/;"	d
PCI_AGP_STATUS_RATE4	include/pci.h	/^#define  PCI_AGP_STATUS_RATE4	/;"	d
PCI_AGP_STATUS_RQ_MASK	include/pci.h	/^#define  PCI_AGP_STATUS_RQ_MASK /;"	d
PCI_AGP_STATUS_SBA	include/pci.h	/^#define  PCI_AGP_STATUS_SBA	/;"	d
PCI_AGP_VERSION	include/pci.h	/^#define PCI_AGP_VERSION	/;"	d
PCI_ANY_ID	include/pci.h	/^#define PCI_ANY_ID	/;"	d
PCI_ASYNC	arch/powerpc/cpu/ppc4xx/cpu.c	/^#define PCI_ASYNC$/;"	d	file:
PCI_BAR_BAR0	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_BAR0(/;"	d
PCI_BAR_BAR0	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_BAR_BAR0(/;"	d
PCI_BAR_BAR1	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_BAR1(/;"	d
PCI_BAR_BAR1	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_BAR_BAR1(/;"	d
PCI_BAR_BAR2	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_BAR2(/;"	d
PCI_BAR_BAR3	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_BAR3(/;"	d
PCI_BAR_BAR4	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_BAR4(/;"	d
PCI_BAR_BAR5	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_BAR5(/;"	d
PCI_BAR_IO_M	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_IO_M	/;"	d
PCI_BAR_IO_M	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_BAR_IO_M	/;"	d
PCI_BAR_PREF	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_PREF	/;"	d
PCI_BAR_PREF	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_BAR_PREF	/;"	d
PCI_BAR_RANGE	arch/m68k/include/asm/m5445x.h	/^#define PCI_BAR_RANGE	/;"	d
PCI_BAR_RANGE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_BAR_RANGE	/;"	d
PCI_BASE	include/configs/PATI.h	/^#define PCI_BASE	/;"	d
PCI_BASE_ADDRESS_0	include/pci.h	/^#define PCI_BASE_ADDRESS_0	/;"	d
PCI_BASE_ADDRESS_1	include/pci.h	/^#define PCI_BASE_ADDRESS_1	/;"	d
PCI_BASE_ADDRESS_2	include/pci.h	/^#define PCI_BASE_ADDRESS_2	/;"	d
PCI_BASE_ADDRESS_3	include/pci.h	/^#define PCI_BASE_ADDRESS_3	/;"	d
PCI_BASE_ADDRESS_4	include/pci.h	/^#define PCI_BASE_ADDRESS_4	/;"	d
PCI_BASE_ADDRESS_5	include/pci.h	/^#define PCI_BASE_ADDRESS_5	/;"	d
PCI_BASE_ADDRESS_IO_MASK	include/pci.h	/^#define  PCI_BASE_ADDRESS_IO_MASK	/;"	d
PCI_BASE_ADDRESS_MEM_MASK	include/pci.h	/^#define  PCI_BASE_ADDRESS_MEM_MASK	/;"	d
PCI_BASE_ADDRESS_MEM_PREFETCH	include/pci.h	/^#define  PCI_BASE_ADDRESS_MEM_PREFETCH	/;"	d
PCI_BASE_ADDRESS_MEM_TYPE_1M	include/pci.h	/^#define  PCI_BASE_ADDRESS_MEM_TYPE_1M	/;"	d
PCI_BASE_ADDRESS_MEM_TYPE_32	include/pci.h	/^#define  PCI_BASE_ADDRESS_MEM_TYPE_32	/;"	d
PCI_BASE_ADDRESS_MEM_TYPE_64	include/pci.h	/^#define  PCI_BASE_ADDRESS_MEM_TYPE_64	/;"	d
PCI_BASE_ADDRESS_MEM_TYPE_MASK	include/pci.h	/^#define  PCI_BASE_ADDRESS_MEM_TYPE_MASK /;"	d
PCI_BASE_ADDRESS_SPACE	include/pci.h	/^#define  PCI_BASE_ADDRESS_SPACE /;"	d
PCI_BASE_ADDRESS_SPACE_IO	include/pci.h	/^#define  PCI_BASE_ADDRESS_SPACE_IO /;"	d
PCI_BASE_ADDRESS_SPACE_MEMORY	include/pci.h	/^#define  PCI_BASE_ADDRESS_SPACE_MEMORY /;"	d
PCI_BASE_CLASS_BRIDGE	include/pci_ids.h	/^#define PCI_BASE_CLASS_BRIDGE	/;"	d
PCI_BASE_CLASS_COMMUNICATION	include/pci_ids.h	/^#define PCI_BASE_CLASS_COMMUNICATION	/;"	d
PCI_BASE_CLASS_CRYPT	include/pci_ids.h	/^#define PCI_BASE_CLASS_CRYPT	/;"	d
PCI_BASE_CLASS_DISPLAY	include/pci_ids.h	/^#define PCI_BASE_CLASS_DISPLAY	/;"	d
PCI_BASE_CLASS_DOCKING	include/pci_ids.h	/^#define PCI_BASE_CLASS_DOCKING	/;"	d
PCI_BASE_CLASS_INPUT	include/pci_ids.h	/^#define PCI_BASE_CLASS_INPUT	/;"	d
PCI_BASE_CLASS_INTELLIGENT	include/pci_ids.h	/^#define PCI_BASE_CLASS_INTELLIGENT	/;"	d
PCI_BASE_CLASS_MEMORY	include/pci_ids.h	/^#define PCI_BASE_CLASS_MEMORY	/;"	d
PCI_BASE_CLASS_MULTIMEDIA	include/pci_ids.h	/^#define PCI_BASE_CLASS_MULTIMEDIA	/;"	d
PCI_BASE_CLASS_NETWORK	include/pci_ids.h	/^#define PCI_BASE_CLASS_NETWORK	/;"	d
PCI_BASE_CLASS_PROCESSOR	include/pci_ids.h	/^#define PCI_BASE_CLASS_PROCESSOR	/;"	d
PCI_BASE_CLASS_SATELLITE	include/pci_ids.h	/^#define PCI_BASE_CLASS_SATELLITE	/;"	d
PCI_BASE_CLASS_SERIAL	include/pci_ids.h	/^#define PCI_BASE_CLASS_SERIAL	/;"	d
PCI_BASE_CLASS_SIGNAL_PROCESSING	include/pci_ids.h	/^#define PCI_BASE_CLASS_SIGNAL_PROCESSING /;"	d
PCI_BASE_CLASS_STORAGE	include/pci_ids.h	/^#define PCI_BASE_CLASS_STORAGE	/;"	d
PCI_BASE_CLASS_SYSTEM	include/pci_ids.h	/^#define PCI_BASE_CLASS_SYSTEM	/;"	d
PCI_BASE_CLASS_WIRELESS	include/pci_ids.h	/^#define PCI_BASE_CLASS_WIRELESS	/;"	d
PCI_BDF	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PCI_BDF(/;"	d
PCI_BDF	include/pci.h	/^#define PCI_BDF(/;"	d
PCI_BIST	include/pci.h	/^#define PCI_BIST	/;"	d
PCI_BIST_CAPABLE	include/pci.h	/^#define PCI_BIST_CAPABLE	/;"	d
PCI_BIST_CODE_MASK	include/pci.h	/^#define PCI_BIST_CODE_MASK	/;"	d
PCI_BIST_START	include/pci.h	/^#define PCI_BIST_START	/;"	d
PCI_BRDGOPT1	include/pci.h	/^#define PCI_BRDGOPT1 /;"	d
PCI_BRDGOPT2	include/pci.h	/^#define PCI_BRDGOPT2 /;"	d
PCI_BRIDGE_CONTROL	include/pci.h	/^#define PCI_BRIDGE_CONTROL	/;"	d
PCI_BRIDGE_CTL_BUS_RESET	include/pci.h	/^#define  PCI_BRIDGE_CTL_BUS_RESET /;"	d
PCI_BRIDGE_CTL_FAST_BACK	include/pci.h	/^#define  PCI_BRIDGE_CTL_FAST_BACK /;"	d
PCI_BRIDGE_CTL_MASTER_ABORT	include/pci.h	/^#define  PCI_BRIDGE_CTL_MASTER_ABORT /;"	d
PCI_BRIDGE_CTL_NO_ISA	include/pci.h	/^#define  PCI_BRIDGE_CTL_NO_ISA	/;"	d
PCI_BRIDGE_CTL_PARITY	include/pci.h	/^#define  PCI_BRIDGE_CTL_PARITY	/;"	d
PCI_BRIDGE_CTL_SERR	include/pci.h	/^#define  PCI_BRIDGE_CTL_SERR	/;"	d
PCI_BRIDGE_CTL_VGA	include/pci.h	/^#define  PCI_BRIDGE_CTL_VGA	/;"	d
PCI_BUS	include/pci.h	/^#define PCI_BUS(/;"	d
PCI_BUSNUM	include/mpc106.h	/^#define PCI_BUSNUM	/;"	d
PCI_BUS_NONMEM_SIZE	board/armltd/integrator/pci.c	/^#define PCI_BUS_NONMEM_SIZE	/;"	d	file:
PCI_BUS_NONMEM_START	board/armltd/integrator/pci.c	/^#define PCI_BUS_NONMEM_START	/;"	d	file:
PCI_BUS_PREMEM_SIZE	board/armltd/integrator/pci.c	/^#define PCI_BUS_PREMEM_SIZE	/;"	d	file:
PCI_BUS_PREMEM_START	board/armltd/integrator/pci.c	/^#define PCI_BUS_PREMEM_START	/;"	d	file:
PCI_CACHE_LINE_SIZE	include/pci.h	/^#define PCI_CACHE_LINE_SIZE	/;"	d
PCI_CAPABILITY_ID	include/pcmcia/yenta.h	/^#define PCI_CAPABILITY_ID	/;"	d
PCI_CAPABILITY_LIST	include/pci.h	/^#define PCI_CAPABILITY_LIST	/;"	d
PCI_CAPABILITY_PM	include/pcmcia/yenta.h	/^#define  PCI_CAPABILITY_PM	/;"	d
PCI_CAPID	include/pci.h	/^#define PCI_CAPID /;"	d
PCI_CAP_FLAGS	include/pci.h	/^#define PCI_CAP_FLAGS	/;"	d
PCI_CAP_ID_AGP	include/pci.h	/^#define  PCI_CAP_ID_AGP	/;"	d
PCI_CAP_ID_CHSWP	include/pci.h	/^#define  PCI_CAP_ID_CHSWP	/;"	d
PCI_CAP_ID_EXP	include/pci.h	/^#define  PCI_CAP_ID_EXP /;"	d
PCI_CAP_ID_MSI	include/pci.h	/^#define  PCI_CAP_ID_MSI	/;"	d
PCI_CAP_ID_PM	include/pci.h	/^#define  PCI_CAP_ID_PM	/;"	d
PCI_CAP_ID_SLOTID	include/pci.h	/^#define  PCI_CAP_ID_SLOTID	/;"	d
PCI_CAP_ID_VPD	include/pci.h	/^#define  PCI_CAP_ID_VPD	/;"	d
PCI_CAP_LIST_ID	include/pci.h	/^#define PCI_CAP_LIST_ID	/;"	d
PCI_CAP_LIST_NEXT	include/pci.h	/^#define PCI_CAP_LIST_NEXT	/;"	d
PCI_CAP_SIZEOF	include/pci.h	/^#define PCI_CAP_SIZEOF	/;"	d
PCI_CARDBUS_CIS	include/pci.h	/^#define PCI_CARDBUS_CIS	/;"	d
PCI_CB_BRIDGE_CONTROL	include/pci.h	/^#define PCI_CB_BRIDGE_CONTROL	/;"	d
PCI_CB_BRIDGE_CTL_16BIT_INT	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_16BIT_INT	/;"	d
PCI_CB_BRIDGE_CTL_CB_RESET	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_CB_RESET	/;"	d
PCI_CB_BRIDGE_CTL_ISA	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_ISA	/;"	d
PCI_CB_BRIDGE_CTL_MASTER_ABORT	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_MASTER_ABORT /;"	d
PCI_CB_BRIDGE_CTL_PARITY	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_PARITY	/;"	d
PCI_CB_BRIDGE_CTL_POST_WRITES	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_POST_WRITES	/;"	d
PCI_CB_BRIDGE_CTL_PREFETCH_MEM0	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 /;"	d
PCI_CB_BRIDGE_CTL_PREFETCH_MEM1	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 /;"	d
PCI_CB_BRIDGE_CTL_SERR	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_SERR	/;"	d
PCI_CB_BRIDGE_CTL_VGA	include/pci.h	/^#define  PCI_CB_BRIDGE_CTL_VGA	/;"	d
PCI_CB_CAPABILITY_LIST	include/pci.h	/^#define PCI_CB_CAPABILITY_LIST	/;"	d
PCI_CB_CAPABILITY_POINTER	include/pcmcia/yenta.h	/^#define PCI_CB_CAPABILITY_POINTER	/;"	d
PCI_CB_CARD_BUS	include/pci.h	/^#define PCI_CB_CARD_BUS	/;"	d
PCI_CB_IO_BASE_0	include/pci.h	/^#define PCI_CB_IO_BASE_0	/;"	d
PCI_CB_IO_BASE_0_HI	include/pci.h	/^#define PCI_CB_IO_BASE_0_HI	/;"	d
PCI_CB_IO_BASE_1	include/pci.h	/^#define PCI_CB_IO_BASE_1	/;"	d
PCI_CB_IO_BASE_1_HI	include/pci.h	/^#define PCI_CB_IO_BASE_1_HI	/;"	d
PCI_CB_IO_LIMIT_0	include/pci.h	/^#define PCI_CB_IO_LIMIT_0	/;"	d
PCI_CB_IO_LIMIT_0_HI	include/pci.h	/^#define PCI_CB_IO_LIMIT_0_HI	/;"	d
PCI_CB_IO_LIMIT_1	include/pci.h	/^#define PCI_CB_IO_LIMIT_1	/;"	d
PCI_CB_IO_LIMIT_1_HI	include/pci.h	/^#define PCI_CB_IO_LIMIT_1_HI	/;"	d
PCI_CB_IO_RANGE_MASK	include/pci.h	/^#define  PCI_CB_IO_RANGE_MASK	/;"	d
PCI_CB_LATENCY_TIMER	include/pci.h	/^#define PCI_CB_LATENCY_TIMER	/;"	d
PCI_CB_LEGACY_MODE_BASE	include/pci.h	/^#define PCI_CB_LEGACY_MODE_BASE /;"	d
PCI_CB_MEMORY_BASE_0	include/pci.h	/^#define PCI_CB_MEMORY_BASE_0	/;"	d
PCI_CB_MEMORY_BASE_1	include/pci.h	/^#define PCI_CB_MEMORY_BASE_1	/;"	d
PCI_CB_MEMORY_LIMIT_0	include/pci.h	/^#define PCI_CB_MEMORY_LIMIT_0	/;"	d
PCI_CB_MEMORY_LIMIT_1	include/pci.h	/^#define PCI_CB_MEMORY_LIMIT_1	/;"	d
PCI_CB_PRIMARY_BUS	include/pci.h	/^#define PCI_CB_PRIMARY_BUS	/;"	d
PCI_CB_SEC_STATUS	include/pci.h	/^#define PCI_CB_SEC_STATUS	/;"	d
PCI_CB_SUBORDINATE_BUS	include/pci.h	/^#define PCI_CB_SUBORDINATE_BUS	/;"	d
PCI_CB_SUBSYSTEM_ID	include/pci.h	/^#define PCI_CB_SUBSYSTEM_ID	/;"	d
PCI_CB_SUBSYSTEM_VENDOR_ID	include/pci.h	/^#define PCI_CB_SUBSYSTEM_VENDOR_ID /;"	d
PCI_CFDA_PSM	drivers/net/dc2114x.c	/^#define PCI_CFDA_PSM	/;"	d	file:
PCI_CFG_ADDR_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define PCI_CFG_ADDR_REG /;"	d
PCI_CFG_ADDR_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCI_CFG_ADDR_REG /;"	d
PCI_CFG_DATA_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define PCI_CFG_DATA_REG /;"	d
PCI_CFG_DATA_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCI_CFG_DATA_REG /;"	d
PCI_CFG_EN	arch/x86/include/asm/pci.h	/^#define PCI_CFG_EN	/;"	d
PCI_CFG_PIIX4_APICBS	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_APICBS	/;"	d
PCI_CFG_PIIX4_BMIBA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_BMIBA	/;"	d
PCI_CFG_PIIX4_CNTA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_CNTA	/;"	d
PCI_CFG_PIIX4_CNTB	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_CNTB	/;"	d
PCI_CFG_PIIX4_DDMABS	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DDMABS	/;"	d
PCI_CFG_PIIX4_DEVACTA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVACTA	/;"	d
PCI_CFG_PIIX4_DEVACTB	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVACTB	/;"	d
PCI_CFG_PIIX4_DEVRESA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESA	/;"	d
PCI_CFG_PIIX4_DEVRESB	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESB	/;"	d
PCI_CFG_PIIX4_DEVRESC	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESC	/;"	d
PCI_CFG_PIIX4_DEVRESD	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESD	/;"	d
PCI_CFG_PIIX4_DEVRESE	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESE	/;"	d
PCI_CFG_PIIX4_DEVRESF	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESF	/;"	d
PCI_CFG_PIIX4_DEVRESG	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESG	/;"	d
PCI_CFG_PIIX4_DEVRESH	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESH	/;"	d
PCI_CFG_PIIX4_DEVRESI	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DEVRESI	/;"	d
PCI_CFG_PIIX4_DLC	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_DLC	/;"	d
PCI_CFG_PIIX4_GENCFG	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_GENCFG	/;"	d
PCI_CFG_PIIX4_GENCFG	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_GENCFG	/;"	d
PCI_CFG_PIIX4_GENCFG_SERIRQ	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_GENCFG_SERIRQ	/;"	d
PCI_CFG_PIIX4_GPICTL	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_GPICTL	/;"	d
PCI_CFG_PIIX4_IDETIM	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_IDETIM	/;"	d
PCI_CFG_PIIX4_IDETIM_IDE	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_IDETIM_IDE	/;"	d
PCI_CFG_PIIX4_IDETIM_PRI	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_IDETIM_PRI	/;"	d
PCI_CFG_PIIX4_IDETIM_SEC	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_IDETIM_SEC	/;"	d
PCI_CFG_PIIX4_IORT	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_IORT	/;"	d
PCI_CFG_PIIX4_LEGSUP	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_LEGSUP	/;"	d
PCI_CFG_PIIX4_MBDMA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_MBDMA	/;"	d
PCI_CFG_PIIX4_MSTAT	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_MSTAT	/;"	d
PCI_CFG_PIIX4_PDMACFG	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_PDMACFG	/;"	d
PCI_CFG_PIIX4_PIRQC	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_PIRQC	/;"	d
PCI_CFG_PIIX4_PIRQRCA	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_PIRQRCA	/;"	d
PCI_CFG_PIIX4_PIRQRCB	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_PIRQRCB	/;"	d
PCI_CFG_PIIX4_PIRQRCC	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_PIRQRCC	/;"	d
PCI_CFG_PIIX4_PIRQRCD	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_PIRQRCD	/;"	d
PCI_CFG_PIIX4_PMBA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_PMBA	/;"	d
PCI_CFG_PIIX4_PMMISC	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_PMMISC	/;"	d
PCI_CFG_PIIX4_RTCCFG	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_RTCCFG	/;"	d
PCI_CFG_PIIX4_SBRNUM	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_SBRNUM	/;"	d
PCI_CFG_PIIX4_SERIRQ	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_SERIRQ	/;"	d
PCI_CFG_PIIX4_SERIRQC	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_SERIRQC	/;"	d
PCI_CFG_PIIX4_SERIRQC_CONT	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_SERIRQC_CONT	/;"	d
PCI_CFG_PIIX4_SERIRQC_EN	arch/mips/include/asm/malta.h	/^#define PCI_CFG_PIIX4_SERIRQC_EN	/;"	d
PCI_CFG_PIIX4_SIDETIM	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_SIDETIM	/;"	d
PCI_CFG_PIIX4_SMBBA	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_SMBBA	/;"	d
PCI_CFG_PIIX4_TOM	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_TOM	/;"	d
PCI_CFG_PIIX4_UDMACTL	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_UDMACTL	/;"	d
PCI_CFG_PIIX4_UDMATIM	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_UDMATIM /;"	d
PCI_CFG_PIIX4_XBCS	board/mpl/common/piix4_pci.h	/^#define	PCI_CFG_PIIX4_XBCS	/;"	d
PCI_CFG_SPACE_EXP_SIZE	include/pci.h	/^#define PCI_CFG_SPACE_EXP_SIZE	/;"	d
PCI_CFG_SPACE_SIZE	include/pci.h	/^#define PCI_CFG_SPACE_SIZE	/;"	d
PCI_CHIP_MACH32	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH32	/;"	d
PCI_CHIP_MACH64CT	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64CT	/;"	d
PCI_CHIP_MACH64CX	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64CX	/;"	d
PCI_CHIP_MACH64ET	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64ET	/;"	d
PCI_CHIP_MACH64GB	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GB	/;"	d
PCI_CHIP_MACH64GD	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GD	/;"	d
PCI_CHIP_MACH64GI	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GI	/;"	d
PCI_CHIP_MACH64GL	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GL	/;"	d
PCI_CHIP_MACH64GM	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GM	/;"	d
PCI_CHIP_MACH64GN	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GN	/;"	d
PCI_CHIP_MACH64GO	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GO	/;"	d
PCI_CHIP_MACH64GP	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GP	/;"	d
PCI_CHIP_MACH64GQ	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GQ	/;"	d
PCI_CHIP_MACH64GR	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GR	/;"	d
PCI_CHIP_MACH64GS	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GS	/;"	d
PCI_CHIP_MACH64GT	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GT	/;"	d
PCI_CHIP_MACH64GU	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GU	/;"	d
PCI_CHIP_MACH64GV	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GV	/;"	d
PCI_CHIP_MACH64GW	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GW	/;"	d
PCI_CHIP_MACH64GX	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GX	/;"	d
PCI_CHIP_MACH64GY	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GY	/;"	d
PCI_CHIP_MACH64GZ	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64GZ	/;"	d
PCI_CHIP_MACH64LB	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LB	/;"	d
PCI_CHIP_MACH64LD	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LD	/;"	d
PCI_CHIP_MACH64LG	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LG	/;"	d
PCI_CHIP_MACH64LI	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LI	/;"	d
PCI_CHIP_MACH64LM	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LM	/;"	d
PCI_CHIP_MACH64LN	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LN	/;"	d
PCI_CHIP_MACH64LP	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LP	/;"	d
PCI_CHIP_MACH64LQ	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LQ	/;"	d
PCI_CHIP_MACH64LR	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LR	/;"	d
PCI_CHIP_MACH64LS	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LS	/;"	d
PCI_CHIP_MACH64LT	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64LT	/;"	d
PCI_CHIP_MACH64VT	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64VT	/;"	d
PCI_CHIP_MACH64VU	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64VU	/;"	d
PCI_CHIP_MACH64VV	drivers/video/ati_ids.h	/^#define PCI_CHIP_MACH64VV	/;"	d
PCI_CHIP_R200_BB	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_BB	/;"	d
PCI_CHIP_R200_BC	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_BC	/;"	d
PCI_CHIP_R200_QH	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QH	/;"	d
PCI_CHIP_R200_QI	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QI	/;"	d
PCI_CHIP_R200_QJ	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QJ	/;"	d
PCI_CHIP_R200_QK	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QK	/;"	d
PCI_CHIP_R200_QL	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QL	/;"	d
PCI_CHIP_R200_QM	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QM	/;"	d
PCI_CHIP_R200_QN	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QN	/;"	d
PCI_CHIP_R200_QO	drivers/video/ati_ids.h	/^#define PCI_CHIP_R200_QO	/;"	d
PCI_CHIP_R300_AD	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_AD	/;"	d
PCI_CHIP_R300_AE	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_AE	/;"	d
PCI_CHIP_R300_AF	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_AF	/;"	d
PCI_CHIP_R300_AG	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_AG	/;"	d
PCI_CHIP_R300_ND	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_ND	/;"	d
PCI_CHIP_R300_NE	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_NE	/;"	d
PCI_CHIP_R300_NF	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_NF	/;"	d
PCI_CHIP_R300_NG	drivers/video/ati_ids.h	/^#define PCI_CHIP_R300_NG	/;"	d
PCI_CHIP_R350_AH	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_AH /;"	d
PCI_CHIP_R350_AI	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_AI /;"	d
PCI_CHIP_R350_AJ	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_AJ /;"	d
PCI_CHIP_R350_AK	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_AK /;"	d
PCI_CHIP_R350_NH	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_NH /;"	d
PCI_CHIP_R350_NI	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_NI /;"	d
PCI_CHIP_R350_NK	drivers/video/ati_ids.h	/^#define PCI_CHIP_R350_NK /;"	d
PCI_CHIP_R360_NJ	drivers/video/ati_ids.h	/^#define PCI_CHIP_R360_NJ /;"	d
PCI_CHIP_R420_554d	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_R420_554d	/;"	d	file:
PCI_CHIP_R420_JH	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JH /;"	d
PCI_CHIP_R420_JI	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JI /;"	d
PCI_CHIP_R420_JJ	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JJ /;"	d
PCI_CHIP_R420_JK	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JK /;"	d
PCI_CHIP_R420_JL	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JL /;"	d
PCI_CHIP_R420_JM	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JM /;"	d
PCI_CHIP_R420_JN	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JN /;"	d
PCI_CHIP_R420_JP	drivers/video/ati_ids.h	/^#define PCI_CHIP_R420_JP /;"	d
PCI_CHIP_R423_5D57	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_5D57 /;"	d
PCI_CHIP_R423_UH	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UH /;"	d
PCI_CHIP_R423_UI	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UI /;"	d
PCI_CHIP_R423_UJ	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UJ /;"	d
PCI_CHIP_R423_UK	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UK /;"	d
PCI_CHIP_R423_UQ	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UQ /;"	d
PCI_CHIP_R423_UR	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UR /;"	d
PCI_CHIP_R423_UT	drivers/video/ati_ids.h	/^#define PCI_CHIP_R423_UT /;"	d
PCI_CHIP_RADEON_LW	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_LW	/;"	d
PCI_CHIP_RADEON_LX	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_LX	/;"	d
PCI_CHIP_RADEON_LY	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_LY	/;"	d
PCI_CHIP_RADEON_LZ	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_LZ	/;"	d
PCI_CHIP_RADEON_QD	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_QD	/;"	d
PCI_CHIP_RADEON_QE	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_QE	/;"	d
PCI_CHIP_RADEON_QF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_QF	/;"	d
PCI_CHIP_RADEON_QG	drivers/video/ati_ids.h	/^#define PCI_CHIP_RADEON_QG	/;"	d
PCI_CHIP_RAGE128LE	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128LE	/;"	d
PCI_CHIP_RAGE128LF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128LF	/;"	d
PCI_CHIP_RAGE128MF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128MF	/;"	d
PCI_CHIP_RAGE128ML	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128ML	/;"	d
PCI_CHIP_RAGE128PA	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PA	/;"	d
PCI_CHIP_RAGE128PB	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PB	/;"	d
PCI_CHIP_RAGE128PC	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PC	/;"	d
PCI_CHIP_RAGE128PD	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PD	/;"	d
PCI_CHIP_RAGE128PE	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PE	/;"	d
PCI_CHIP_RAGE128PF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PF	/;"	d
PCI_CHIP_RAGE128PG	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PG	/;"	d
PCI_CHIP_RAGE128PH	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PH	/;"	d
PCI_CHIP_RAGE128PI	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PI	/;"	d
PCI_CHIP_RAGE128PJ	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PJ	/;"	d
PCI_CHIP_RAGE128PK	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PK	/;"	d
PCI_CHIP_RAGE128PL	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PL	/;"	d
PCI_CHIP_RAGE128PM	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PM	/;"	d
PCI_CHIP_RAGE128PN	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PN	/;"	d
PCI_CHIP_RAGE128PO	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PO	/;"	d
PCI_CHIP_RAGE128PP	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PP	/;"	d
PCI_CHIP_RAGE128PQ	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PQ	/;"	d
PCI_CHIP_RAGE128PR	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PR	/;"	d
PCI_CHIP_RAGE128PS	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PS	/;"	d
PCI_CHIP_RAGE128PT	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PT	/;"	d
PCI_CHIP_RAGE128PU	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PU	/;"	d
PCI_CHIP_RAGE128PV	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PV	/;"	d
PCI_CHIP_RAGE128PW	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PW	/;"	d
PCI_CHIP_RAGE128PX	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128PX	/;"	d
PCI_CHIP_RAGE128RE	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128RE	/;"	d
PCI_CHIP_RAGE128RF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128RF	/;"	d
PCI_CHIP_RAGE128RG	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128RG	/;"	d
PCI_CHIP_RAGE128RK	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128RK	/;"	d
PCI_CHIP_RAGE128RL	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128RL	/;"	d
PCI_CHIP_RAGE128SE	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SE	/;"	d
PCI_CHIP_RAGE128SF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SF	/;"	d
PCI_CHIP_RAGE128SG	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SG	/;"	d
PCI_CHIP_RAGE128SH	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SH	/;"	d
PCI_CHIP_RAGE128SK	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SK	/;"	d
PCI_CHIP_RAGE128SL	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SL	/;"	d
PCI_CHIP_RAGE128SM	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SM	/;"	d
PCI_CHIP_RAGE128SN	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128SN	/;"	d
PCI_CHIP_RAGE128TF	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128TF	/;"	d
PCI_CHIP_RAGE128TL	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128TL	/;"	d
PCI_CHIP_RAGE128TR	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128TR	/;"	d
PCI_CHIP_RAGE128TS	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128TS	/;"	d
PCI_CHIP_RAGE128TT	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128TT	/;"	d
PCI_CHIP_RAGE128TU	drivers/video/ati_ids.h	/^#define PCI_CHIP_RAGE128TU	/;"	d
PCI_CHIP_RN50	drivers/video/ati_ids.h	/^#define PCI_CHIP_RN50	/;"	d
PCI_CHIP_RS100_4136	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS100_4136	/;"	d
PCI_CHIP_RS100_4336	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS100_4336	/;"	d
PCI_CHIP_RS200_4137	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS200_4137	/;"	d
PCI_CHIP_RS200_4337	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS200_4337	/;"	d
PCI_CHIP_RS250_4237	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS250_4237	/;"	d
PCI_CHIP_RS250_4437	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS250_4437	/;"	d
PCI_CHIP_RS300_5834	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS300_5834	/;"	d
PCI_CHIP_RS300_5835	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS300_5835	/;"	d
PCI_CHIP_RS300_5836	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS300_5836	/;"	d
PCI_CHIP_RS300_5837	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS300_5837	/;"	d
PCI_CHIP_RS350_7834	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS350_7834 /;"	d
PCI_CHIP_RS350_7835	drivers/video/ati_ids.h	/^#define PCI_CHIP_RS350_7835 /;"	d
PCI_CHIP_RV100_QY	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV100_QY	/;"	d
PCI_CHIP_RV100_QZ	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV100_QZ	/;"	d
PCI_CHIP_RV200_QW	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV200_QW	/;"	d
PCI_CHIP_RV200_QX	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV200_QX	/;"	d
PCI_CHIP_RV250_Id	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Id	/;"	d
PCI_CHIP_RV250_Ie	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Ie	/;"	d
PCI_CHIP_RV250_If	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_If	/;"	d
PCI_CHIP_RV250_Ig	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Ig	/;"	d
PCI_CHIP_RV250_Ld	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Ld	/;"	d
PCI_CHIP_RV250_Le	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Le	/;"	d
PCI_CHIP_RV250_Lf	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Lf	/;"	d
PCI_CHIP_RV250_Lg	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Lg	/;"	d
PCI_CHIP_RV250_Ln	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV250_Ln	/;"	d
PCI_CHIP_RV280_5960	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV280_5960	/;"	d
PCI_CHIP_RV280_5960	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV280_5960	/;"	d	file:
PCI_CHIP_RV280_5961	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV280_5961	/;"	d
PCI_CHIP_RV280_5961	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV280_5961	/;"	d	file:
PCI_CHIP_RV280_5962	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV280_5962	/;"	d
PCI_CHIP_RV280_5962	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV280_5962	/;"	d	file:
PCI_CHIP_RV280_5964	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV280_5964	/;"	d
PCI_CHIP_RV280_5964	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV280_5964	/;"	d	file:
PCI_CHIP_RV280_5C61	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV280_5C61	/;"	d
PCI_CHIP_RV280_5C63	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV280_5C63	/;"	d
PCI_CHIP_RV280_5C63	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV280_5C63	/;"	d	file:
PCI_CHIP_RV350_AP	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_AP /;"	d
PCI_CHIP_RV350_AQ	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_AQ /;"	d
PCI_CHIP_RV350_AS	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_AS /;"	d
PCI_CHIP_RV350_AT	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_AT /;"	d
PCI_CHIP_RV350_AV	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_AV /;"	d
PCI_CHIP_RV350_NP	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_NP /;"	d
PCI_CHIP_RV350_NQ	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_NQ /;"	d
PCI_CHIP_RV350_NR	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_NR /;"	d
PCI_CHIP_RV350_NS	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_NS /;"	d
PCI_CHIP_RV350_NT	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_NT /;"	d
PCI_CHIP_RV350_NV	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV350_NV /;"	d
PCI_CHIP_RV360_AR	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV360_AR /;"	d
PCI_CHIP_RV370_5460	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5460 /;"	d
PCI_CHIP_RV370_5461	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5461 /;"	d
PCI_CHIP_RV370_5462	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5462 /;"	d
PCI_CHIP_RV370_5463	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5463 /;"	d
PCI_CHIP_RV370_5464	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5464 /;"	d
PCI_CHIP_RV370_5465	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5465 /;"	d
PCI_CHIP_RV370_5466	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5466 /;"	d
PCI_CHIP_RV370_5467	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5467 /;"	d
PCI_CHIP_RV370_5B60	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B60 /;"	d
PCI_CHIP_RV370_5B60	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV370_5B60	/;"	d	file:
PCI_CHIP_RV370_5B61	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B61 /;"	d
PCI_CHIP_RV370_5B62	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B62 /;"	d
PCI_CHIP_RV370_5B63	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B63 /;"	d
PCI_CHIP_RV370_5B64	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B64 /;"	d
PCI_CHIP_RV370_5B65	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B65 /;"	d
PCI_CHIP_RV370_5B66	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B66 /;"	d
PCI_CHIP_RV370_5B67	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV370_5B67 /;"	d
PCI_CHIP_RV380_3150	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3150 /;"	d
PCI_CHIP_RV380_3151	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3151 /;"	d
PCI_CHIP_RV380_3152	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3152 /;"	d
PCI_CHIP_RV380_3153	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3153 /;"	d
PCI_CHIP_RV380_3154	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3154 /;"	d
PCI_CHIP_RV380_3156	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3156 /;"	d
PCI_CHIP_RV380_3E50	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3E50 /;"	d
PCI_CHIP_RV380_3E51	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3E51 /;"	d
PCI_CHIP_RV380_3E52	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3E52 /;"	d
PCI_CHIP_RV380_3E53	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3E53 /;"	d
PCI_CHIP_RV380_3E54	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3E54 /;"	d
PCI_CHIP_RV380_3E56	drivers/video/ati_ids.h	/^#define PCI_CHIP_RV380_3E56 /;"	d
PCI_CHIP_RV380_5657	drivers/video/ati_radeon_fb.c	/^#define PCI_CHIP_RV380_5657	/;"	d	file:
PCI_CLASS_BRIDGE_CARDBUS	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_CARDBUS	/;"	d
PCI_CLASS_BRIDGE_CTLR	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_CLASS_BRIDGE_CTLR	/;"	d	file:
PCI_CLASS_BRIDGE_EISA	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_EISA	/;"	d
PCI_CLASS_BRIDGE_HOST	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_HOST	/;"	d
PCI_CLASS_BRIDGE_ISA	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_ISA	/;"	d
PCI_CLASS_BRIDGE_MC	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_MC	/;"	d
PCI_CLASS_BRIDGE_NUBUS	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_NUBUS	/;"	d
PCI_CLASS_BRIDGE_OTHER	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_OTHER	/;"	d
PCI_CLASS_BRIDGE_PCI	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_PCI	/;"	d
PCI_CLASS_BRIDGE_PCMCIA	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_PCMCIA	/;"	d
PCI_CLASS_BRIDGE_RACEWAY	include/pci_ids.h	/^#define PCI_CLASS_BRIDGE_RACEWAY	/;"	d
PCI_CLASS_CODE	include/pci.h	/^#define PCI_CLASS_CODE	/;"	d
PCI_CLASS_CODE_AND_REVISION_ID	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PCI_CLASS_CODE_AND_REVISION_ID	/;"	d
PCI_CLASS_CODE_AND_REVISION_ID	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PCI_CLASS_CODE_AND_REVISION_ID	/;"	d
PCI_CLASS_CODE_BRIDGE	include/pci.h	/^#define  PCI_CLASS_CODE_BRIDGE	/;"	d
PCI_CLASS_CODE_COMM	include/pci.h	/^#define  PCI_CLASS_CODE_COMM	/;"	d
PCI_CLASS_CODE_CRYPTO	include/pci.h	/^#define  PCI_CLASS_CODE_CRYPTO	/;"	d
PCI_CLASS_CODE_DATA	include/pci.h	/^#define  PCI_CLASS_CODE_DATA	/;"	d
PCI_CLASS_CODE_DISPLAY	include/pci.h	/^#define  PCI_CLASS_CODE_DISPLAY	/;"	d
PCI_CLASS_CODE_DOCKING	include/pci.h	/^#define  PCI_CLASS_CODE_DOCKING	/;"	d
PCI_CLASS_CODE_I2O	include/pci.h	/^#define  PCI_CLASS_CODE_I2O	/;"	d
PCI_CLASS_CODE_INPUT	include/pci.h	/^#define  PCI_CLASS_CODE_INPUT	/;"	d
PCI_CLASS_CODE_MEMORY	include/pci.h	/^#define  PCI_CLASS_CODE_MEMORY	/;"	d
PCI_CLASS_CODE_MULTIMEDIA	include/pci.h	/^#define  PCI_CLASS_CODE_MULTIMEDIA /;"	d
PCI_CLASS_CODE_NETWORK	include/pci.h	/^#define  PCI_CLASS_CODE_NETWORK /;"	d
PCI_CLASS_CODE_OTHER	include/pci.h	/^#define  PCI_CLASS_CODE_OTHER	/;"	d
PCI_CLASS_CODE_PERIPHERAL	include/pci.h	/^#define  PCI_CLASS_CODE_PERIPHERAL /;"	d
PCI_CLASS_CODE_PROCESSOR	include/pci.h	/^#define  PCI_CLASS_CODE_PROCESSOR /;"	d
PCI_CLASS_CODE_SATELLITE	include/pci.h	/^#define  PCI_CLASS_CODE_SATELLITE /;"	d
PCI_CLASS_CODE_SERIAL	include/pci.h	/^#define  PCI_CLASS_CODE_SERIAL	/;"	d
PCI_CLASS_CODE_STORAGE	include/pci.h	/^#define  PCI_CLASS_CODE_STORAGE /;"	d
PCI_CLASS_CODE_TOO_OLD	include/pci.h	/^#define  PCI_CLASS_CODE_TOO_OLD	/;"	d
PCI_CLASS_CODE_WIRELESS	include/pci.h	/^#define  PCI_CLASS_CODE_WIRELESS /;"	d
PCI_CLASS_COMMUNICATION_MODEM	include/pci_ids.h	/^#define PCI_CLASS_COMMUNICATION_MODEM	/;"	d
PCI_CLASS_COMMUNICATION_MULTISERIAL	include/pci_ids.h	/^#define PCI_CLASS_COMMUNICATION_MULTISERIAL /;"	d
PCI_CLASS_COMMUNICATION_OTHER	include/pci_ids.h	/^#define PCI_CLASS_COMMUNICATION_OTHER	/;"	d
PCI_CLASS_COMMUNICATION_PARALLEL	include/pci_ids.h	/^#define PCI_CLASS_COMMUNICATION_PARALLEL /;"	d
PCI_CLASS_COMMUNICATION_SERIAL	include/pci_ids.h	/^#define PCI_CLASS_COMMUNICATION_SERIAL	/;"	d
PCI_CLASS_CRYPT_ENTERTAINMENT	include/pci_ids.h	/^#define PCI_CLASS_CRYPT_ENTERTAINMENT	/;"	d
PCI_CLASS_CRYPT_NETWORK	include/pci_ids.h	/^#define PCI_CLASS_CRYPT_NETWORK	/;"	d
PCI_CLASS_CRYPT_OTHER	include/pci_ids.h	/^#define PCI_CLASS_CRYPT_OTHER	/;"	d
PCI_CLASS_DEVICE	include/pci.h	/^#define PCI_CLASS_DEVICE	/;"	d
PCI_CLASS_DISPLAY_3D	include/pci_ids.h	/^#define PCI_CLASS_DISPLAY_3D	/;"	d
PCI_CLASS_DISPLAY_OTHER	include/pci_ids.h	/^#define PCI_CLASS_DISPLAY_OTHER	/;"	d
PCI_CLASS_DISPLAY_VGA	include/pci_ids.h	/^#define PCI_CLASS_DISPLAY_VGA	/;"	d
PCI_CLASS_DISPLAY_XGA	include/pci_ids.h	/^#define PCI_CLASS_DISPLAY_XGA	/;"	d
PCI_CLASS_DOCKING_GENERIC	include/pci_ids.h	/^#define PCI_CLASS_DOCKING_GENERIC	/;"	d
PCI_CLASS_DOCKING_OTHER	include/pci_ids.h	/^#define PCI_CLASS_DOCKING_OTHER	/;"	d
PCI_CLASS_INPUT_GAMEPORT	include/pci_ids.h	/^#define PCI_CLASS_INPUT_GAMEPORT	/;"	d
PCI_CLASS_INPUT_KEYBOARD	include/pci_ids.h	/^#define PCI_CLASS_INPUT_KEYBOARD	/;"	d
PCI_CLASS_INPUT_MOUSE	include/pci_ids.h	/^#define PCI_CLASS_INPUT_MOUSE	/;"	d
PCI_CLASS_INPUT_OTHER	include/pci_ids.h	/^#define PCI_CLASS_INPUT_OTHER	/;"	d
PCI_CLASS_INPUT_PEN	include/pci_ids.h	/^#define PCI_CLASS_INPUT_PEN	/;"	d
PCI_CLASS_INPUT_SCANNER	include/pci_ids.h	/^#define PCI_CLASS_INPUT_SCANNER	/;"	d
PCI_CLASS_INTELLIGENT_I2O	include/pci_ids.h	/^#define PCI_CLASS_INTELLIGENT_I2O	/;"	d
PCI_CLASS_MEMORY_FLASH	include/pci_ids.h	/^#define PCI_CLASS_MEMORY_FLASH	/;"	d
PCI_CLASS_MEMORY_OTHER	include/pci_ids.h	/^#define PCI_CLASS_MEMORY_OTHER	/;"	d
PCI_CLASS_MEMORY_RAM	include/pci_ids.h	/^#define PCI_CLASS_MEMORY_RAM	/;"	d
PCI_CLASS_MULTIMEDIA_AUDIO	include/pci_ids.h	/^#define PCI_CLASS_MULTIMEDIA_AUDIO	/;"	d
PCI_CLASS_MULTIMEDIA_OTHER	include/pci_ids.h	/^#define PCI_CLASS_MULTIMEDIA_OTHER	/;"	d
PCI_CLASS_MULTIMEDIA_PHONE	include/pci_ids.h	/^#define PCI_CLASS_MULTIMEDIA_PHONE	/;"	d
PCI_CLASS_MULTIMEDIA_VIDEO	include/pci_ids.h	/^#define PCI_CLASS_MULTIMEDIA_VIDEO	/;"	d
PCI_CLASS_NETWORK_ATM	include/pci_ids.h	/^#define PCI_CLASS_NETWORK_ATM	/;"	d
PCI_CLASS_NETWORK_ETHERNET	include/pci_ids.h	/^#define PCI_CLASS_NETWORK_ETHERNET	/;"	d
PCI_CLASS_NETWORK_FDDI	include/pci_ids.h	/^#define PCI_CLASS_NETWORK_FDDI	/;"	d
PCI_CLASS_NETWORK_OTHER	include/pci_ids.h	/^#define PCI_CLASS_NETWORK_OTHER	/;"	d
PCI_CLASS_NETWORK_TOKEN_RING	include/pci_ids.h	/^#define PCI_CLASS_NETWORK_TOKEN_RING	/;"	d
PCI_CLASS_NOT_DEFINED	include/pci_ids.h	/^#define PCI_CLASS_NOT_DEFINED	/;"	d
PCI_CLASS_NOT_DEFINED_VGA	include/pci_ids.h	/^#define PCI_CLASS_NOT_DEFINED_VGA	/;"	d
PCI_CLASS_OTHERS	include/pci_ids.h	/^#define PCI_CLASS_OTHERS	/;"	d
PCI_CLASS_PROCESSOR_386	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_386	/;"	d
PCI_CLASS_PROCESSOR_486	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_486	/;"	d
PCI_CLASS_PROCESSOR_ALPHA	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_ALPHA	/;"	d
PCI_CLASS_PROCESSOR_CO	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_CO	/;"	d
PCI_CLASS_PROCESSOR_MIPS	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_MIPS	/;"	d
PCI_CLASS_PROCESSOR_PENTIUM	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_PENTIUM	/;"	d
PCI_CLASS_PROCESSOR_POWERPC	include/pci_ids.h	/^#define PCI_CLASS_PROCESSOR_POWERPC	/;"	d
PCI_CLASS_PROG	include/pci.h	/^#define PCI_CLASS_PROG	/;"	d
PCI_CLASS_REVISION	include/pci.h	/^#define PCI_CLASS_REVISION	/;"	d
PCI_CLASS_SATELLITE_AUDIO	include/pci_ids.h	/^#define PCI_CLASS_SATELLITE_AUDIO	/;"	d
PCI_CLASS_SATELLITE_DATA	include/pci_ids.h	/^#define PCI_CLASS_SATELLITE_DATA	/;"	d
PCI_CLASS_SATELLITE_TV	include/pci_ids.h	/^#define PCI_CLASS_SATELLITE_TV	/;"	d
PCI_CLASS_SATELLITE_VOICE	include/pci_ids.h	/^#define PCI_CLASS_SATELLITE_VOICE	/;"	d
PCI_CLASS_SERIAL_ACCESS	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_ACCESS	/;"	d
PCI_CLASS_SERIAL_FIBER	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_FIBER	/;"	d
PCI_CLASS_SERIAL_FIREWIRE	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_FIREWIRE	/;"	d
PCI_CLASS_SERIAL_FIREWIRE_OHCI	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_FIREWIRE_OHCI	/;"	d
PCI_CLASS_SERIAL_SMBUS	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_SMBUS	/;"	d
PCI_CLASS_SERIAL_SSA	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_SSA	/;"	d
PCI_CLASS_SERIAL_USB	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_USB	/;"	d
PCI_CLASS_SERIAL_USB_EHCI	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_USB_EHCI	/;"	d
PCI_CLASS_SERIAL_USB_OHCI	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_USB_OHCI	/;"	d
PCI_CLASS_SERIAL_USB_UHCI	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_USB_UHCI	/;"	d
PCI_CLASS_SERIAL_USB_XHCI	include/pci_ids.h	/^#define PCI_CLASS_SERIAL_USB_XHCI	/;"	d
PCI_CLASS_SP_DPIO	include/pci_ids.h	/^#define PCI_CLASS_SP_DPIO	/;"	d
PCI_CLASS_SP_OTHER	include/pci_ids.h	/^#define PCI_CLASS_SP_OTHER	/;"	d
PCI_CLASS_STORAGE_FLOPPY	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_FLOPPY	/;"	d
PCI_CLASS_STORAGE_IDE	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_IDE	/;"	d
PCI_CLASS_STORAGE_IPI	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_IPI	/;"	d
PCI_CLASS_STORAGE_OTHER	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_OTHER	/;"	d
PCI_CLASS_STORAGE_RAID	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_RAID	/;"	d
PCI_CLASS_STORAGE_SAS	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_SAS	/;"	d
PCI_CLASS_STORAGE_SATA	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_SATA	/;"	d
PCI_CLASS_STORAGE_SATA_AHCI	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_SATA_AHCI	/;"	d
PCI_CLASS_STORAGE_SCSI	include/pci_ids.h	/^#define PCI_CLASS_STORAGE_SCSI	/;"	d
PCI_CLASS_SUB_CODE	include/pci.h	/^#define PCI_CLASS_SUB_CODE	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_CARDBUS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_CARDBUS	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_EISA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_EISA	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_HOST	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_HOST	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_INFINIBAND	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_INFINIBAND	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_ISA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_ISA	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_MCA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_MCA	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_NUBUS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_NUBUS	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_OTHER	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_PCI	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_PCI	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_PCMCIA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_PCMCIA	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_RACEWAY	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_RACEWAY	/;"	d
PCI_CLASS_SUB_CODE_BRIDGE_SEMI_PCI	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_BRIDGE_SEMI_PCI	/;"	d
PCI_CLASS_SUB_CODE_COMM_GPIB	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_GPIB	/;"	d
PCI_CLASS_SUB_CODE_COMM_MODEM	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_MODEM	/;"	d
PCI_CLASS_SUB_CODE_COMM_MULTIPORT	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_MULTIPORT	/;"	d
PCI_CLASS_SUB_CODE_COMM_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_OTHER	/;"	d
PCI_CLASS_SUB_CODE_COMM_PARALLEL	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_PARALLEL	/;"	d
PCI_CLASS_SUB_CODE_COMM_SERIAL	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_SERIAL	/;"	d
PCI_CLASS_SUB_CODE_COMM_SMARTCARD	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_COMM_SMARTCARD	/;"	d
PCI_CLASS_SUB_CODE_CRYPTO_ENTERTAINMENT	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_CRYPTO_ENTERTAINMENT /;"	d
PCI_CLASS_SUB_CODE_CRYPTO_NETWORK	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_CRYPTO_NETWORK	/;"	d
PCI_CLASS_SUB_CODE_CRYPTO_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_CRYPTO_OTHER	/;"	d
PCI_CLASS_SUB_CODE_DATA_COMMSYNC	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DATA_COMMSYNC	/;"	d
PCI_CLASS_SUB_CODE_DATA_DPIO	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DATA_DPIO	/;"	d
PCI_CLASS_SUB_CODE_DATA_MGMT	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DATA_MGMT	/;"	d
PCI_CLASS_SUB_CODE_DATA_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DATA_OTHER	/;"	d
PCI_CLASS_SUB_CODE_DATA_PERFCNTR	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DATA_PERFCNTR	/;"	d
PCI_CLASS_SUB_CODE_DISPLAY_3D	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DISPLAY_3D	/;"	d
PCI_CLASS_SUB_CODE_DISPLAY_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DISPLAY_OTHER	/;"	d
PCI_CLASS_SUB_CODE_DISPLAY_VGA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DISPLAY_VGA	/;"	d
PCI_CLASS_SUB_CODE_DISPLAY_XGA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DISPLAY_XGA	/;"	d
PCI_CLASS_SUB_CODE_DOCKING_GENERIC	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DOCKING_GENERIC	/;"	d
PCI_CLASS_SUB_CODE_DOCKING_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_DOCKING_OTHER	/;"	d
PCI_CLASS_SUB_CODE_I2O_V1_0	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_I2O_V1_0	/;"	d
PCI_CLASS_SUB_CODE_INPUT_DIGITIZER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_INPUT_DIGITIZER	/;"	d
PCI_CLASS_SUB_CODE_INPUT_GAMEPORT	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_INPUT_GAMEPORT	/;"	d
PCI_CLASS_SUB_CODE_INPUT_KEYBOARD	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_INPUT_KEYBOARD	/;"	d
PCI_CLASS_SUB_CODE_INPUT_MOUSE	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_INPUT_MOUSE	/;"	d
PCI_CLASS_SUB_CODE_INPUT_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_INPUT_OTHER	/;"	d
PCI_CLASS_SUB_CODE_INPUT_SCANNER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_INPUT_SCANNER	/;"	d
PCI_CLASS_SUB_CODE_MEMORY_FLASH	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MEMORY_FLASH	/;"	d
PCI_CLASS_SUB_CODE_MEMORY_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MEMORY_OTHER	/;"	d
PCI_CLASS_SUB_CODE_MEMORY_RAM	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MEMORY_RAM	/;"	d
PCI_CLASS_SUB_CODE_MULTIMEDIA_AUDIO	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MULTIMEDIA_AUDIO	/;"	d
PCI_CLASS_SUB_CODE_MULTIMEDIA_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MULTIMEDIA_OTHER	/;"	d
PCI_CLASS_SUB_CODE_MULTIMEDIA_PHONE	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MULTIMEDIA_PHONE	/;"	d
PCI_CLASS_SUB_CODE_MULTIMEDIA_VIDEO	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_MULTIMEDIA_VIDEO	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_ATM	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_ATM	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_ETHERNET	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_ETHERNET	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_FDDI	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_FDDI	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_ISDN	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_ISDN	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_OTHER	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_PICMG	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_PICMG	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_TOKENRING	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_TOKENRING	/;"	d
PCI_CLASS_SUB_CODE_NETWORK_WORLDFIP	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_NETWORK_WORLDFIP	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_DMA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_DMA	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_HOTPLUG	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_HOTPLUG	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_OTHER	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_PIC	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_PIC	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_RTC	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_RTC	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_SD	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_SD	/;"	d
PCI_CLASS_SUB_CODE_PERIPHERAL_TIMER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PERIPHERAL_TIMER	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_386	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_386	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_486	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_486	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_ALPHA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_ALPHA	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_COPROC	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_COPROC	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_MIPS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_MIPS	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_PENTIUM	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_PENTIUM	/;"	d
PCI_CLASS_SUB_CODE_PROCESSOR_POWERPC	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_PROCESSOR_POWERPC	/;"	d
PCI_CLASS_SUB_CODE_SATELLITE_AUDIO	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SATELLITE_AUDIO	/;"	d
PCI_CLASS_SUB_CODE_SATELLITE_DATA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SATELLITE_DATA	/;"	d
PCI_CLASS_SUB_CODE_SATELLITE_TV	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SATELLITE_TV	/;"	d
PCI_CLASS_SUB_CODE_SATELLITE_VOICE	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SATELLITE_VOICE	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_1394	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_1394	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_ACCESSBUS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_ACCESSBUS	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_CANBUS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_CANBUS	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_FIBRECHAN	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_FIBRECHAN	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_INFINIBAND	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_INFINIBAND	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_IPMI	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_IPMI	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_SERCOS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_SERCOS	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_SMBUS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_SMBUS	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_SSA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_SSA	/;"	d
PCI_CLASS_SUB_CODE_SERIAL_USB	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_SERIAL_USB	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_ATA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_ATA	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_FLOPPY	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_FLOPPY	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_IDE	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_IDE	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_IPIBUS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_IPIBUS	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_OTHER	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_RAID	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_RAID	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_SAS	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_SAS	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_SATA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_SATA	/;"	d
PCI_CLASS_SUB_CODE_STORAGE_SCSI	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_STORAGE_SCSI	/;"	d
PCI_CLASS_SUB_CODE_TOO_OLD_NOTVGA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_TOO_OLD_NOTVGA	/;"	d
PCI_CLASS_SUB_CODE_TOO_OLD_VGA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_TOO_OLD_VGA	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_80211A	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_80211A	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_80211B	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_80211B	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_BLUETOOTH	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_BLUETOOTH	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_BROADBAND	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_BROADBAND	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_IR	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_IR	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_IRDA	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_IRDA	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_OTHER	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_OTHER	/;"	d
PCI_CLASS_SUB_CODE_WIRELESS_RF	include/pci.h	/^#define  PCI_CLASS_SUB_CODE_WIRELESS_RF	/;"	d
PCI_CLASS_SYSTEM_DMA	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_DMA	/;"	d
PCI_CLASS_SYSTEM_OTHER	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_OTHER	/;"	d
PCI_CLASS_SYSTEM_PCI_HOTPLUG	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_PCI_HOTPLUG	/;"	d
PCI_CLASS_SYSTEM_PIC	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_PIC	/;"	d
PCI_CLASS_SYSTEM_PIC_IOAPIC	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_PIC_IOAPIC	/;"	d
PCI_CLASS_SYSTEM_PIC_IOXAPIC	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_PIC_IOXAPIC	/;"	d
PCI_CLASS_SYSTEM_RTC	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_RTC	/;"	d
PCI_CLASS_SYSTEM_SDHCI	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_SDHCI	/;"	d
PCI_CLASS_SYSTEM_TIMER	include/pci_ids.h	/^#define PCI_CLASS_SYSTEM_TIMER	/;"	d
PCI_CLASS_WIRELESS_RF_CONTROLLER	include/pci_ids.h	/^#define PCI_CLASS_WIRELESS_RF_CONTROLLER	/;"	d
PCI_CLASS_WIRELESS_WHCI	include/pci_ids.h	/^#define PCI_CLASS_WIRELESS_WHCI	/;"	d
PCI_CMD_IOEN	include/mpc106.h	/^#define PCI_CMD_IOEN	/;"	d
PCI_CMD_MASTER	include/mpc106.h	/^#define PCI_CMD_MASTER	/;"	d
PCI_CMD_MEMEN	include/mpc106.h	/^#define PCI_CMD_MEMEN	/;"	d
PCI_COMMAND	include/pci.h	/^#define PCI_COMMAND	/;"	d
PCI_COMMAND_FAST_BACK	include/pci.h	/^#define  PCI_COMMAND_FAST_BACK	/;"	d
PCI_COMMAND_INVALIDATE	include/pci.h	/^#define  PCI_COMMAND_INVALIDATE /;"	d
PCI_COMMAND_IO	include/pci.h	/^#define  PCI_COMMAND_IO	/;"	d
PCI_COMMAND_MASTER	include/pci.h	/^#define  PCI_COMMAND_MASTER	/;"	d
PCI_COMMAND_MEMORY	include/pci.h	/^#define  PCI_COMMAND_MEMORY	/;"	d
PCI_COMMAND_PARITY	include/pci.h	/^#define  PCI_COMMAND_PARITY	/;"	d
PCI_COMMAND_SERR	include/pci.h	/^#define  PCI_COMMAND_SERR	/;"	d
PCI_COMMAND_SPECIAL	include/pci.h	/^#define  PCI_COMMAND_SPECIAL	/;"	d
PCI_COMMAND_VGA_PALETTE	include/pci.h	/^#define  PCI_COMMAND_VGA_PALETTE /;"	d
PCI_COMMAND_WAIT	include/pci.h	/^#define  PCI_COMMAND_WAIT	/;"	d
PCI_CONF1	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_CONF1	/;"	d
PCI_CONFIG_ADDRESS_BN_MASK	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_BN_MASK	/;"	d
PCI_CONFIG_ADDRESS_BN_SHIFT	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_BN_SHIFT	/;"	d
PCI_CONFIG_ADDRESS_DN_MASK	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_DN_MASK	/;"	d
PCI_CONFIG_ADDRESS_DN_SHIFT	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_DN_SHIFT	/;"	d
PCI_CONFIG_ADDRESS_EN	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_EN	/;"	d
PCI_CONFIG_ADDRESS_FN_MASK	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_FN_MASK	/;"	d
PCI_CONFIG_ADDRESS_FN_SHIFT	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_FN_SHIFT	/;"	d
PCI_CONFIG_ADDRESS_RN_MASK	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_RN_MASK	/;"	d
PCI_CONFIG_ADDRESS_RN_SHIFT	include/mpc83xx.h	/^#define PCI_CONFIG_ADDRESS_RN_SHIFT	/;"	d
PCI_CONFIG_BASE	include/configs/PATI.h	/^#define PCI_CONFIG_BASE	/;"	d
PCI_CONFIG_SPACE_TYPE1	arch/x86/lib/bios_interrupts.c	/^#define PCI_CONFIG_SPACE_TYPE1	/;"	d	file:
PCI_CONF_AHBPCI_OFFSET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCI_CONF_AHBPCI_OFFSET	/;"	d
PCI_CONF_EHCI_OFFSET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCI_CONF_EHCI_OFFSET	/;"	d
PCI_CONF_OHCI_OFFSET	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PCI_CONF_OHCI_OFFSET	/;"	d
PCI_CON_PRINTF	board/mpl/pati/pati.c	/^#define	PCI_CON_PRINTF(/;"	d	file:
PCI_CON_PRINTF	board/mpl/pati/pati.c	/^#define PCI_CON_PRINTF(/;"	d	file:
PCI_CPU_MEBASE_H	arch/x86/include/asm/me_common.h	/^#define PCI_CPU_MEBASE_H	/;"	d
PCI_CPU_MEBASE_L	arch/x86/include/asm/me_common.h	/^#define PCI_CPU_MEBASE_L	/;"	d
PCI_CR	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_CR	/;"	d
PCI_CR1_BIST	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR1_BIST(/;"	d
PCI_CR1_BIST	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR1_BIST(/;"	d
PCI_CR1_CLS	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR1_CLS(/;"	d
PCI_CR1_CLS	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR1_CLS(/;"	d
PCI_CR1_HDR	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR1_HDR(/;"	d
PCI_CR1_HDR	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR1_HDR(/;"	d
PCI_CR1_LTMR	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR1_LTMR(/;"	d
PCI_CR1_LTMR	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR1_LTMR(/;"	d
PCI_CR2_INTLIN	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR2_INTLIN(/;"	d
PCI_CR2_INTLIN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR2_INTLIN(/;"	d
PCI_CR2_INTPIN	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR2_INTPIN(/;"	d
PCI_CR2_INTPIN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR2_INTPIN(/;"	d
PCI_CR2_MAXLAT	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR2_MAXLAT(/;"	d
PCI_CR2_MAXLAT	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR2_MAXLAT(/;"	d
PCI_CR2_MINGNT	arch/m68k/include/asm/m5445x.h	/^#define PCI_CR2_MINGNT(/;"	d
PCI_CR2_MINGNT	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_CR2_MINGNT(/;"	d
PCI_CSR	include/tsi108.h	/^#define PCI_CSR	/;"	d
PCI_DEV	include/pci.h	/^#define PCI_DEV(/;"	d
PCI_DEVFN	include/pci.h	/^#define PCI_DEVFN(/;"	d
PCI_DEVICE	cmd/universe.c	/^#define PCI_DEVICE /;"	d	file:
PCI_DEVICE	include/pci.h	/^#define PCI_DEVICE(/;"	d
PCI_DEVICE_CLASS	include/pci.h	/^#define PCI_DEVICE_CLASS(/;"	d
PCI_DEVICE_ID	include/pci.h	/^#define PCI_DEVICE_ID	/;"	d
PCI_DEVICE_ID_3COM_3C339	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3C339	/;"	d
PCI_DEVICE_ID_3COM_3C359	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3C359	/;"	d
PCI_DEVICE_ID_3COM_3C940	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3C940	/;"	d
PCI_DEVICE_ID_3COM_3C940B	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3C940B	/;"	d
PCI_DEVICE_ID_3COM_3C985	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3C985	/;"	d
PCI_DEVICE_ID_3COM_3CR990	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990	/;"	d
PCI_DEVICE_ID_3COM_3CR990B	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990B	/;"	d
PCI_DEVICE_ID_3COM_3CR990SVR	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990SVR	/;"	d
PCI_DEVICE_ID_3COM_3CR990SVR95	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990SVR95	/;"	d
PCI_DEVICE_ID_3COM_3CR990SVR97	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990SVR97	/;"	d
PCI_DEVICE_ID_3COM_3CR990_FX	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990_FX	/;"	d
PCI_DEVICE_ID_3COM_3CR990_TX_95	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990_TX_95	/;"	d
PCI_DEVICE_ID_3COM_3CR990_TX_97	include/pci_ids.h	/^#define PCI_DEVICE_ID_3COM_3CR990_TX_97	/;"	d
PCI_DEVICE_ID_3DFX_BANSHEE	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DFX_BANSHEE	/;"	d
PCI_DEVICE_ID_3DFX_VOODOO	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DFX_VOODOO	/;"	d
PCI_DEVICE_ID_3DFX_VOODOO2	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DFX_VOODOO2	/;"	d
PCI_DEVICE_ID_3DFX_VOODOO3	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DFX_VOODOO3	/;"	d
PCI_DEVICE_ID_3DFX_VOODOO5	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DFX_VOODOO5	/;"	d
PCI_DEVICE_ID_3DLABS_PERMEDIA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DLABS_PERMEDIA2	/;"	d
PCI_DEVICE_ID_3DLABS_PERMEDIA2V	include/pci_ids.h	/^#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V	/;"	d
PCI_DEVICE_ID_3WARE_1000	include/pci_ids.h	/^#define PCI_DEVICE_ID_3WARE_1000	/;"	d
PCI_DEVICE_ID_3WARE_7000	include/pci_ids.h	/^#define PCI_DEVICE_ID_3WARE_7000	/;"	d
PCI_DEVICE_ID_3WARE_9000	include/pci_ids.h	/^#define PCI_DEVICE_ID_3WARE_9000	/;"	d
PCI_DEVICE_ID_ABOCOM_2BD1	include/pci_ids.h	/^#define PCI_DEVICE_ID_ABOCOM_2BD1 /;"	d
PCI_DEVICE_ID_ACCESSIO_WDG_CSM	include/pci_ids.h	/^#define PCI_DEVICE_ID_ACCESSIO_WDG_CSM	/;"	d
PCI_DEVICE_ID_AD1889JS	include/pci_ids.h	/^#define PCI_DEVICE_ID_AD1889JS	/;"	d
PCI_DEVICE_ID_ADAPTEC2_2930U2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_2930U2	/;"	d
PCI_DEVICE_ID_ADAPTEC2_2940U2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_2940U2	/;"	d
PCI_DEVICE_ID_ADAPTEC2_3940U2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_3940U2	/;"	d
PCI_DEVICE_ID_ADAPTEC2_3950U2D	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_3950U2D	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7890	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7890	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7890B	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7890B	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7892A	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7892A	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7892B	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7892B	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7892D	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7892D	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7892P	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7892P	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7896	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7896	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7899A	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7899A	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7899B	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7899B	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7899D	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7899D	/;"	d
PCI_DEVICE_ID_ADAPTEC2_7899P	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_7899P	/;"	d
PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN /;"	d
PCI_DEVICE_ID_ADAPTEC2_SCAMP	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC2_SCAMP	/;"	d
PCI_DEVICE_ID_ADAPTEC_1480A	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_1480A	/;"	d
PCI_DEVICE_ID_ADAPTEC_3860	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_3860	/;"	d
PCI_DEVICE_ID_ADAPTEC_38602	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_38602	/;"	d
PCI_DEVICE_ID_ADAPTEC_7810	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7810	/;"	d
PCI_DEVICE_ID_ADAPTEC_7821	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7821	/;"	d
PCI_DEVICE_ID_ADAPTEC_7850	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7850	/;"	d
PCI_DEVICE_ID_ADAPTEC_7855	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7855	/;"	d
PCI_DEVICE_ID_ADAPTEC_7860	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7860	/;"	d
PCI_DEVICE_ID_ADAPTEC_7861	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7861	/;"	d
PCI_DEVICE_ID_ADAPTEC_7870	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7870	/;"	d
PCI_DEVICE_ID_ADAPTEC_7871	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7871	/;"	d
PCI_DEVICE_ID_ADAPTEC_7872	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7872	/;"	d
PCI_DEVICE_ID_ADAPTEC_7873	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7873	/;"	d
PCI_DEVICE_ID_ADAPTEC_7874	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7874	/;"	d
PCI_DEVICE_ID_ADAPTEC_7880	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7880	/;"	d
PCI_DEVICE_ID_ADAPTEC_7881	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7881	/;"	d
PCI_DEVICE_ID_ADAPTEC_7882	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7882	/;"	d
PCI_DEVICE_ID_ADAPTEC_7883	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7883	/;"	d
PCI_DEVICE_ID_ADAPTEC_7884	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7884	/;"	d
PCI_DEVICE_ID_ADAPTEC_7885	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7885	/;"	d
PCI_DEVICE_ID_ADAPTEC_7886	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7886	/;"	d
PCI_DEVICE_ID_ADAPTEC_7887	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7887	/;"	d
PCI_DEVICE_ID_ADAPTEC_7888	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7888	/;"	d
PCI_DEVICE_ID_ADAPTEC_7895	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADAPTEC_7895	/;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7300	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7300 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7300_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7300_2 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7300_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7300_3 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7420	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7420 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7420_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7420_2 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7420_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7420_3 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7500	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7500 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7500_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7500_2 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7500_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7500_3 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7800	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7800 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCI7800_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCI7800_3 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCIe7300	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCIe7300 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCIe7420	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCIe7420 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCIe7500	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCIe7500 /;"	d
PCI_DEVICE_ID_ADDIDATA_APCIe7800	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADDIDATA_APCIe7800 /;"	d
PCI_DEVICE_ID_ADL_2301	include/pci_ids.h	/^#define PCI_DEVICE_ID_ADL_2301	/;"	d
PCI_DEVICE_ID_AFAVLAB_P028	include/pci_ids.h	/^#define PCI_DEVICE_ID_AFAVLAB_P028	/;"	d
PCI_DEVICE_ID_AFAVLAB_P030	include/pci_ids.h	/^#define PCI_DEVICE_ID_AFAVLAB_P030	/;"	d
PCI_DEVICE_ID_AI_M1435	include/pci_ids.h	/^#define PCI_DEVICE_ID_AI_M1435	/;"	d
PCI_DEVICE_ID_AKS_ALADDINCARD	include/pci_ids.h	/^#define PCI_DEVICE_ID_AKS_ALADDINCARD	/;"	d
PCI_DEVICE_ID_ALTIMA_AC1000	include/pci_ids.h	/^#define PCI_DEVICE_ID_ALTIMA_AC1000	/;"	d
PCI_DEVICE_ID_ALTIMA_AC1001	include/pci_ids.h	/^#define PCI_DEVICE_ID_ALTIMA_AC1001	/;"	d
PCI_DEVICE_ID_ALTIMA_AC1003	include/pci_ids.h	/^#define PCI_DEVICE_ID_ALTIMA_AC1003	/;"	d
PCI_DEVICE_ID_ALTIMA_AC9100	include/pci_ids.h	/^#define PCI_DEVICE_ID_ALTIMA_AC9100	/;"	d
PCI_DEVICE_ID_AL_M1533	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1533	/;"	d
PCI_DEVICE_ID_AL_M1535	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1535	/;"	d
PCI_DEVICE_ID_AL_M1541	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1541	/;"	d
PCI_DEVICE_ID_AL_M1563	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1563	/;"	d
PCI_DEVICE_ID_AL_M1621	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1621	/;"	d
PCI_DEVICE_ID_AL_M1631	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1631	/;"	d
PCI_DEVICE_ID_AL_M1632	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1632	/;"	d
PCI_DEVICE_ID_AL_M1641	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1641	/;"	d
PCI_DEVICE_ID_AL_M1644	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1644	/;"	d
PCI_DEVICE_ID_AL_M1647	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1647	/;"	d
PCI_DEVICE_ID_AL_M1651	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1651	/;"	d
PCI_DEVICE_ID_AL_M1671	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1671	/;"	d
PCI_DEVICE_ID_AL_M1681	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1681	/;"	d
PCI_DEVICE_ID_AL_M1683	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1683	/;"	d
PCI_DEVICE_ID_AL_M1689	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M1689	/;"	d
PCI_DEVICE_ID_AL_M5219	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M5219	/;"	d
PCI_DEVICE_ID_AL_M5228	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M5228	/;"	d
PCI_DEVICE_ID_AL_M5229	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M5229	/;"	d
PCI_DEVICE_ID_AL_M5451	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M5451	/;"	d
PCI_DEVICE_ID_AL_M7101	include/pci_ids.h	/^#define PCI_DEVICE_ID_AL_M7101	/;"	d
PCI_DEVICE_ID_AMD_10H_NB_DRAM	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_10H_NB_DRAM	/;"	d
PCI_DEVICE_ID_AMD_10H_NB_HT	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_10H_NB_HT	/;"	d
PCI_DEVICE_ID_AMD_10H_NB_LINK	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_10H_NB_LINK	/;"	d
PCI_DEVICE_ID_AMD_10H_NB_MAP	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_10H_NB_MAP	/;"	d
PCI_DEVICE_ID_AMD_10H_NB_MISC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_10H_NB_MISC	/;"	d
PCI_DEVICE_ID_AMD_11H_NB_DRAM	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_11H_NB_DRAM	/;"	d
PCI_DEVICE_ID_AMD_11H_NB_HT	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_11H_NB_HT	/;"	d
PCI_DEVICE_ID_AMD_11H_NB_LINK	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_11H_NB_LINK	/;"	d
PCI_DEVICE_ID_AMD_11H_NB_MAP	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_11H_NB_MAP	/;"	d
PCI_DEVICE_ID_AMD_11H_NB_MISC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_11H_NB_MISC	/;"	d
PCI_DEVICE_ID_AMD_15H_M10H_F3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_M10H_F3	/;"	d
PCI_DEVICE_ID_AMD_15H_M30H_NB_F3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_M30H_NB_F3 /;"	d
PCI_DEVICE_ID_AMD_15H_M30H_NB_F4	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_M30H_NB_F4 /;"	d
PCI_DEVICE_ID_AMD_15H_NB_F0	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_NB_F0	/;"	d
PCI_DEVICE_ID_AMD_15H_NB_F1	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_NB_F1	/;"	d
PCI_DEVICE_ID_AMD_15H_NB_F2	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_NB_F2	/;"	d
PCI_DEVICE_ID_AMD_15H_NB_F3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_NB_F3	/;"	d
PCI_DEVICE_ID_AMD_15H_NB_F4	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_NB_F4	/;"	d
PCI_DEVICE_ID_AMD_15H_NB_F5	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_15H_NB_F5	/;"	d
PCI_DEVICE_ID_AMD_16H_M30H_NB_F3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 /;"	d
PCI_DEVICE_ID_AMD_16H_M30H_NB_F4	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 /;"	d
PCI_DEVICE_ID_AMD_16H_NB_F3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_16H_NB_F3	/;"	d
PCI_DEVICE_ID_AMD_16H_NB_F4	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_16H_NB_F4	/;"	d
PCI_DEVICE_ID_AMD_8111_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8111_AUDIO	/;"	d
PCI_DEVICE_ID_AMD_8111_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8111_IDE	/;"	d
PCI_DEVICE_ID_AMD_8111_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8111_LPC	/;"	d
PCI_DEVICE_ID_AMD_8111_PCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8111_PCI	/;"	d
PCI_DEVICE_ID_AMD_8111_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8111_SMBUS	/;"	d
PCI_DEVICE_ID_AMD_8111_SMBUS2	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8111_SMBUS2	/;"	d
PCI_DEVICE_ID_AMD_8131_APIC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8131_APIC	/;"	d
PCI_DEVICE_ID_AMD_8131_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8131_BRIDGE	/;"	d
PCI_DEVICE_ID_AMD_8132_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8132_BRIDGE	/;"	d
PCI_DEVICE_ID_AMD_8151_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_8151_0	/;"	d
PCI_DEVICE_ID_AMD_CNB17H_F3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CNB17H_F3	/;"	d
PCI_DEVICE_ID_AMD_COBRA_7401	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_COBRA_7401	/;"	d
PCI_DEVICE_ID_AMD_CS5535_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5535_IDE /;"	d
PCI_DEVICE_ID_AMD_CS5536_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_AUDIO /;"	d
PCI_DEVICE_ID_AMD_CS5536_EHC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_EHC /;"	d
PCI_DEVICE_ID_AMD_CS5536_FLASH	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_FLASH /;"	d
PCI_DEVICE_ID_AMD_CS5536_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_IDE /;"	d
PCI_DEVICE_ID_AMD_CS5536_ISA	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_ISA /;"	d
PCI_DEVICE_ID_AMD_CS5536_OHC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_OHC /;"	d
PCI_DEVICE_ID_AMD_CS5536_UDC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_UDC /;"	d
PCI_DEVICE_ID_AMD_CS5536_UOC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_CS5536_UOC /;"	d
PCI_DEVICE_ID_AMD_FE_GATE_7006	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_FE_GATE_7006	/;"	d
PCI_DEVICE_ID_AMD_FE_GATE_7007	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_FE_GATE_7007	/;"	d
PCI_DEVICE_ID_AMD_FE_GATE_700C	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_FE_GATE_700C	/;"	d
PCI_DEVICE_ID_AMD_FE_GATE_700E	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_FE_GATE_700E	/;"	d
PCI_DEVICE_ID_AMD_HUDSON2_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_HUDSON2_IDE	/;"	d
PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE	/;"	d
PCI_DEVICE_ID_AMD_HUDSON2_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS	/;"	d
PCI_DEVICE_ID_AMD_K8_NB	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_K8_NB	/;"	d
PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP	/;"	d
PCI_DEVICE_ID_AMD_K8_NB_MEMCTL	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_K8_NB_MEMCTL	/;"	d
PCI_DEVICE_ID_AMD_K8_NB_MISC	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_K8_NB_MISC	/;"	d
PCI_DEVICE_ID_AMD_LANCE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_LANCE	/;"	d
PCI_DEVICE_ID_AMD_LANCE_HOME	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_LANCE_HOME	/;"	d
PCI_DEVICE_ID_AMD_LX_AES	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_LX_AES /;"	d
PCI_DEVICE_ID_AMD_LX_VIDEO	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_LX_VIDEO /;"	d
PCI_DEVICE_ID_AMD_OPUS_7441	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_OPUS_7441	/;"	d
PCI_DEVICE_ID_AMD_OPUS_7443	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_OPUS_7443	/;"	d
PCI_DEVICE_ID_AMD_OPUS_7445	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_OPUS_7445	/;"	d
PCI_DEVICE_ID_AMD_SCSI	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_SCSI	/;"	d
PCI_DEVICE_ID_AMD_SERENADE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_SERENADE	/;"	d
PCI_DEVICE_ID_AMD_VIPER_7409	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_7409	/;"	d
PCI_DEVICE_ID_AMD_VIPER_740B	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_740B	/;"	d
PCI_DEVICE_ID_AMD_VIPER_7410	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_7410	/;"	d
PCI_DEVICE_ID_AMD_VIPER_7411	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_7411	/;"	d
PCI_DEVICE_ID_AMD_VIPER_7413	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_7413	/;"	d
PCI_DEVICE_ID_AMD_VIPER_7440	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_7440	/;"	d
PCI_DEVICE_ID_AMD_VIPER_7443	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMD_VIPER_7443	/;"	d
PCI_DEVICE_ID_AMI_MEGARAID	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMI_MEGARAID	/;"	d
PCI_DEVICE_ID_AMI_MEGARAID2	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMI_MEGARAID2	/;"	d
PCI_DEVICE_ID_AMI_MEGARAID3	include/pci_ids.h	/^#define PCI_DEVICE_ID_AMI_MEGARAID3	/;"	d
PCI_DEVICE_ID_ANIGMA_MC145575	include/pci_ids.h	/^#define PCI_DEVICE_ID_ANIGMA_MC145575	/;"	d
PCI_DEVICE_ID_APPLE_BANDIT	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_BANDIT	/;"	d
PCI_DEVICE_ID_APPLE_HYDRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_HYDRA	/;"	d
PCI_DEVICE_ID_APPLE_IPID2_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_IPID2_AGP	/;"	d
PCI_DEVICE_ID_APPLE_IPID2_ATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_IPID2_ATA	/;"	d
PCI_DEVICE_ID_APPLE_IPID2_FW	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_IPID2_FW	/;"	d
PCI_DEVICE_ID_APPLE_IPID2_GMAC	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_IPID2_GMAC	/;"	d
PCI_DEVICE_ID_APPLE_IPID_ATA100	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_IPID_ATA100	/;"	d
PCI_DEVICE_ID_APPLE_K2_ATA100	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_K2_ATA100	/;"	d
PCI_DEVICE_ID_APPLE_K2_GMAC	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_K2_GMAC	/;"	d
PCI_DEVICE_ID_APPLE_SH_ATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_SH_ATA /;"	d
PCI_DEVICE_ID_APPLE_SH_SUNGEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_SH_SUNGEM /;"	d
PCI_DEVICE_ID_APPLE_TIGON3	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_TIGON3	/;"	d
PCI_DEVICE_ID_APPLE_U3H_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_U3H_AGP	/;"	d
PCI_DEVICE_ID_APPLE_U3L_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_U3L_AGP	/;"	d
PCI_DEVICE_ID_APPLE_U3_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_U3_AGP	/;"	d
PCI_DEVICE_ID_APPLE_U4_PCIE	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_U4_PCIE	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_AGP	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_AGP15	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_AGP2	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_AGP_P	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_ATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_ATA	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_FW	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_FW	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_GMAC	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_GMAC2	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_GMACP	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP	/;"	d
PCI_DEVICE_ID_APPLE_UNI_N_PCI15	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15	/;"	d
PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN /;"	d
PCI_DEVICE_ID_APPLICOM_PCI2000PFB	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLICOM_PCI2000PFB /;"	d
PCI_DEVICE_ID_APPLICOM_PCIGENERIC	include/pci_ids.h	/^#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC /;"	d
PCI_DEVICE_ID_ARECA_1110	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1110	/;"	d
PCI_DEVICE_ID_ARECA_1120	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1120	/;"	d
PCI_DEVICE_ID_ARECA_1130	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1130	/;"	d
PCI_DEVICE_ID_ARECA_1160	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1160	/;"	d
PCI_DEVICE_ID_ARECA_1170	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1170	/;"	d
PCI_DEVICE_ID_ARECA_1200	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1200	/;"	d
PCI_DEVICE_ID_ARECA_1201	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1201	/;"	d
PCI_DEVICE_ID_ARECA_1202	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1202	/;"	d
PCI_DEVICE_ID_ARECA_1210	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1210	/;"	d
PCI_DEVICE_ID_ARECA_1220	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1220	/;"	d
PCI_DEVICE_ID_ARECA_1230	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1230	/;"	d
PCI_DEVICE_ID_ARECA_1260	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1260	/;"	d
PCI_DEVICE_ID_ARECA_1270	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1270	/;"	d
PCI_DEVICE_ID_ARECA_1280	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1280	/;"	d
PCI_DEVICE_ID_ARECA_1380	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1380	/;"	d
PCI_DEVICE_ID_ARECA_1381	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1381	/;"	d
PCI_DEVICE_ID_ARECA_1680	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1680	/;"	d
PCI_DEVICE_ID_ARECA_1681	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARECA_1681	/;"	d
PCI_DEVICE_ID_ARTOP_8060	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_8060	/;"	d
PCI_DEVICE_ID_ARTOP_AEC7610	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_AEC7610	/;"	d
PCI_DEVICE_ID_ARTOP_AEC7612D	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_AEC7612D	/;"	d
PCI_DEVICE_ID_ARTOP_AEC7612S	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_AEC7612S	/;"	d
PCI_DEVICE_ID_ARTOP_AEC7612SUW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_AEC7612SUW	/;"	d
PCI_DEVICE_ID_ARTOP_AEC7612U	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_AEC7612U	/;"	d
PCI_DEVICE_ID_ARTOP_AEC7612UW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_AEC7612UW	/;"	d
PCI_DEVICE_ID_ARTOP_ATP850UF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP850UF	/;"	d
PCI_DEVICE_ID_ARTOP_ATP860	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP860	/;"	d
PCI_DEVICE_ID_ARTOP_ATP860R	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP860R	/;"	d
PCI_DEVICE_ID_ARTOP_ATP865	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP865	/;"	d
PCI_DEVICE_ID_ARTOP_ATP865R	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP865R	/;"	d
PCI_DEVICE_ID_ARTOP_ATP867A	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP867A	/;"	d
PCI_DEVICE_ID_ARTOP_ATP867B	include/pci_ids.h	/^#define PCI_DEVICE_ID_ARTOP_ATP867B	/;"	d
PCI_DEVICE_ID_ASUSTEK_0675	include/pci_ids.h	/^#define PCI_DEVICE_ID_ASUSTEK_0675	/;"	d
PCI_DEVICE_ID_ATI_210888CX	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_210888CX	/;"	d
PCI_DEVICE_ID_ATI_210888GX	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_210888GX	/;"	d
PCI_DEVICE_ID_ATI_215CT222	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215CT222	/;"	d
PCI_DEVICE_ID_ATI_215ET222	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215ET222	/;"	d
PCI_DEVICE_ID_ATI_215GB	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GB	/;"	d
PCI_DEVICE_ID_ATI_215GD	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GD	/;"	d
PCI_DEVICE_ID_ATI_215GI	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GI	/;"	d
PCI_DEVICE_ID_ATI_215GP	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GP	/;"	d
PCI_DEVICE_ID_ATI_215GQ	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GQ	/;"	d
PCI_DEVICE_ID_ATI_215GT	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GT	/;"	d
PCI_DEVICE_ID_ATI_215GTB	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215GTB	/;"	d
PCI_DEVICE_ID_ATI_215XL	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215XL	/;"	d
PCI_DEVICE_ID_ATI_215_IV	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_IV	/;"	d
PCI_DEVICE_ID_ATI_215_IW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_IW	/;"	d
PCI_DEVICE_ID_ATI_215_IZ	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_IZ	/;"	d
PCI_DEVICE_ID_ATI_215_LB	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LB	/;"	d
PCI_DEVICE_ID_ATI_215_LD	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LD	/;"	d
PCI_DEVICE_ID_ATI_215_LG	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LG	/;"	d
PCI_DEVICE_ID_ATI_215_LI	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LI	/;"	d
PCI_DEVICE_ID_ATI_215_LM	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LM	/;"	d
PCI_DEVICE_ID_ATI_215_LN	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LN	/;"	d
PCI_DEVICE_ID_ATI_215_LR	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LR	/;"	d
PCI_DEVICE_ID_ATI_215_LS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_215_LS	/;"	d
PCI_DEVICE_ID_ATI_264VT	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_264VT	/;"	d
PCI_DEVICE_ID_ATI_264VU	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_264VU	/;"	d
PCI_DEVICE_ID_ATI_264VV	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_264VV	/;"	d
PCI_DEVICE_ID_ATI_264_LT	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_264_LT	/;"	d
PCI_DEVICE_ID_ATI_68800	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_68800	/;"	d
PCI_DEVICE_ID_ATI_EVERGREEN	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_EVERGREEN /;"	d
PCI_DEVICE_ID_ATI_EVERGREEN2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_EVERGREEN2 /;"	d
PCI_DEVICE_ID_ATI_IXP200_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP200_IDE	/;"	d
PCI_DEVICE_ID_ATI_IXP200_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP200_SMBUS	/;"	d
PCI_DEVICE_ID_ATI_IXP300_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP300_IDE	/;"	d
PCI_DEVICE_ID_ATI_IXP300_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP300_SATA /;"	d
PCI_DEVICE_ID_ATI_IXP300_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP300_SMBUS	/;"	d
PCI_DEVICE_ID_ATI_IXP400_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP400_IDE	/;"	d
PCI_DEVICE_ID_ATI_IXP400_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP400_SATA /;"	d
PCI_DEVICE_ID_ATI_IXP400_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP400_SATA2	/;"	d
PCI_DEVICE_ID_ATI_IXP400_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP400_SMBUS	/;"	d
PCI_DEVICE_ID_ATI_IXP600_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP600_IDE	/;"	d
PCI_DEVICE_ID_ATI_IXP600_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP600_SATA	/;"	d
PCI_DEVICE_ID_ATI_IXP700_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP700_IDE	/;"	d
PCI_DEVICE_ID_ATI_IXP700_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_IXP700_SATA	/;"	d
PCI_DEVICE_ID_ATI_RADEON_BB	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_BB	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Id	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Id	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Ie	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Ie	/;"	d
PCI_DEVICE_ID_ATI_RADEON_If	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_If	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Ig	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Ig	/;"	d
PCI_DEVICE_ID_ATI_RADEON_LW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_LW	/;"	d
PCI_DEVICE_ID_ATI_RADEON_LX	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_LX	/;"	d
PCI_DEVICE_ID_ATI_RADEON_LY	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_LY	/;"	d
PCI_DEVICE_ID_ATI_RADEON_LZ	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_LZ	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Ld	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Ld	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Le	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Le	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Lf	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Lf	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Lg	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Lg	/;"	d
PCI_DEVICE_ID_ATI_RADEON_ND	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_ND	/;"	d
PCI_DEVICE_ID_ATI_RADEON_NE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_NE	/;"	d
PCI_DEVICE_ID_ATI_RADEON_NF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_NF	/;"	d
PCI_DEVICE_ID_ATI_RADEON_NG	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_NG	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QD	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QD	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QE	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QF	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QG	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QG	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QL	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QL	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QM	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QM	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QN	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QN	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QO	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QO	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QW	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QX	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QX	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QY	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QY	/;"	d
PCI_DEVICE_ID_ATI_RADEON_QZ	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_QZ	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Ql	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Ql	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Ya	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Ya	/;"	d
PCI_DEVICE_ID_ATI_RADEON_Yd	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RADEON_Yd	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_LE	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_LF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_LF	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_MF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_MF /;"	d
PCI_DEVICE_ID_ATI_RAGE128_ML	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_ML /;"	d
PCI_DEVICE_ID_ATI_RAGE128_PA	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PA	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PB	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PB	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PC	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PC	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PD	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PD	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PE	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PF	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PG	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PG	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PH	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PH	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PI	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PI	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PJ	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PJ	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PK	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PK	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PL	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PL	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PM	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PM	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PN	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PN	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PO	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PO	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PP	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PP	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PQ	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PQ	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PR	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PR	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PS	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PT	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PT	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PU	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PU	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PV	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PV	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PW	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_PX	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_PX	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_RE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_RE	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_RF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_RF	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_RG	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_RG	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_RK	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_RK	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_RL	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_RL	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SE	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SF	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SG	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SG	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SH	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SH	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SK	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SK	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SL	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SL	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SM	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SM	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_SN	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_SN	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_TF	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_TF	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_TL	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_TL	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_TR	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_TR	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_TS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_TS	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_TT	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_TT	/;"	d
PCI_DEVICE_ID_ATI_RAGE128_TU	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RAGE128_TU	/;"	d
PCI_DEVICE_ID_ATI_RS100	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS100	/;"	d
PCI_DEVICE_ID_ATI_RS200	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS200	/;"	d
PCI_DEVICE_ID_ATI_RS200_B	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS200_B	/;"	d
PCI_DEVICE_ID_ATI_RS250	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS250	/;"	d
PCI_DEVICE_ID_ATI_RS300_100	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS300_100	/;"	d
PCI_DEVICE_ID_ATI_RS300_133	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS300_133	/;"	d
PCI_DEVICE_ID_ATI_RS300_166	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS300_166	/;"	d
PCI_DEVICE_ID_ATI_RS300_200	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS300_200	/;"	d
PCI_DEVICE_ID_ATI_RS350_100	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS350_100 /;"	d
PCI_DEVICE_ID_ATI_RS350_133	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS350_133 /;"	d
PCI_DEVICE_ID_ATI_RS350_166	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS350_166 /;"	d
PCI_DEVICE_ID_ATI_RS350_200	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS350_200 /;"	d
PCI_DEVICE_ID_ATI_RS400_100	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS400_100 /;"	d
PCI_DEVICE_ID_ATI_RS400_133	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS400_133 /;"	d
PCI_DEVICE_ID_ATI_RS400_166	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS400_166 /;"	d
PCI_DEVICE_ID_ATI_RS400_200	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS400_200 /;"	d
PCI_DEVICE_ID_ATI_RS480	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_RS480 /;"	d
PCI_DEVICE_ID_ATI_SBX00_EHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_SBX00_EHCI	/;"	d
PCI_DEVICE_ID_ATI_SBX00_OHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_SBX00_OHCI	/;"	d
PCI_DEVICE_ID_ATI_SBX00_PCI_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_SBX00_PCI_BRIDGE	/;"	d
PCI_DEVICE_ID_ATI_SBX00_SATA_AHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_SBX00_SATA_AHCI	/;"	d
PCI_DEVICE_ID_ATI_SBX00_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_SBX00_SMBUS	/;"	d
PCI_DEVICE_ID_ATI_WRESTLER	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATI_WRESTLER /;"	d
PCI_DEVICE_ID_ATTANSIC_L1	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATTANSIC_L1	/;"	d
PCI_DEVICE_ID_ATTANSIC_L2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATTANSIC_L2	/;"	d
PCI_DEVICE_ID_ATT_VENUS_MODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_ATT_VENUS_MODEM	/;"	d
PCI_DEVICE_ID_AUREAL_ADVANTAGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_AUREAL_ADVANTAGE	/;"	d
PCI_DEVICE_ID_AUREAL_VORTEX_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_AUREAL_VORTEX_1	/;"	d
PCI_DEVICE_ID_AUREAL_VORTEX_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_AUREAL_VORTEX_2	/;"	d
PCI_DEVICE_ID_AVM_A1	include/pci_ids.h	/^#define PCI_DEVICE_ID_AVM_A1	/;"	d
PCI_DEVICE_ID_AVM_A1_V2	include/pci_ids.h	/^#define PCI_DEVICE_ID_AVM_A1_V2	/;"	d
PCI_DEVICE_ID_AVM_B1	include/pci_ids.h	/^#define PCI_DEVICE_ID_AVM_B1	/;"	d
PCI_DEVICE_ID_AVM_C2	include/pci_ids.h	/^#define PCI_DEVICE_ID_AVM_C2	/;"	d
PCI_DEVICE_ID_AVM_C4	include/pci_ids.h	/^#define PCI_DEVICE_ID_AVM_C4	/;"	d
PCI_DEVICE_ID_AVM_T1	include/pci_ids.h	/^#define PCI_DEVICE_ID_AVM_T1	/;"	d
PCI_DEVICE_ID_BCM1250_HT	include/pci_ids.h	/^#define PCI_DEVICE_ID_BCM1250_HT	/;"	d
PCI_DEVICE_ID_BCM1250_PCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_BCM1250_PCI	/;"	d
PCI_DEVICE_ID_BCM4401	include/pci_ids.h	/^#define PCI_DEVICE_ID_BCM4401	/;"	d
PCI_DEVICE_ID_BCM4401B0	include/pci_ids.h	/^#define PCI_DEVICE_ID_BCM4401B0	/;"	d
PCI_DEVICE_ID_BCM4401B1	include/pci_ids.h	/^#define PCI_DEVICE_ID_BCM4401B1	/;"	d
PCI_DEVICE_ID_BELKIN_F5D7010V7	include/pci_ids.h	/^#define PCI_DEVICE_ID_BELKIN_F5D7010V7	/;"	d
PCI_DEVICE_ID_BERKOM_A1T	include/pci_ids.h	/^#define PCI_DEVICE_ID_BERKOM_A1T	/;"	d
PCI_DEVICE_ID_BERKOM_A4T	include/pci_ids.h	/^#define PCI_DEVICE_ID_BERKOM_A4T	/;"	d
PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO	/;"	d
PCI_DEVICE_ID_BERKOM_T_CONCEPT	include/pci_ids.h	/^#define PCI_DEVICE_ID_BERKOM_T_CONCEPT	/;"	d
PCI_DEVICE_ID_BROCADE_CT	include/pci_ids.h	/^#define PCI_DEVICE_ID_BROCADE_CT	/;"	d
PCI_DEVICE_ID_BROCADE_CT_FC	include/pci_ids.h	/^#define PCI_DEVICE_ID_BROCADE_CT_FC	/;"	d
PCI_DEVICE_ID_BROCADE_FC_8G1P	include/pci_ids.h	/^#define PCI_DEVICE_ID_BROCADE_FC_8G1P	/;"	d
PCI_DEVICE_ID_BROOKTREE_878	include/pci_ids.h	/^#define PCI_DEVICE_ID_BROOKTREE_878	/;"	d
PCI_DEVICE_ID_BROOKTREE_879	include/pci_ids.h	/^#define PCI_DEVICE_ID_BROOKTREE_879	/;"	d
PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT	include/pci_ids.h	/^#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT /;"	d
PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER	include/pci_ids.h	/^#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER /;"	d
PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC	include/pci_ids.h	/^#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC /;"	d
PCI_DEVICE_ID_CCD_2BD0	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_2BD0	/;"	d
PCI_DEVICE_ID_CCD_B000	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B000	/;"	d
PCI_DEVICE_ID_CCD_B006	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B006	/;"	d
PCI_DEVICE_ID_CCD_B007	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B007	/;"	d
PCI_DEVICE_ID_CCD_B008	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B008	/;"	d
PCI_DEVICE_ID_CCD_B009	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B009	/;"	d
PCI_DEVICE_ID_CCD_B00A	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B00A	/;"	d
PCI_DEVICE_ID_CCD_B00B	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B00B	/;"	d
PCI_DEVICE_ID_CCD_B00C	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B00C	/;"	d
PCI_DEVICE_ID_CCD_B100	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B100	/;"	d
PCI_DEVICE_ID_CCD_B700	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B700	/;"	d
PCI_DEVICE_ID_CCD_B701	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_B701	/;"	d
PCI_DEVICE_ID_CCD_HFC4S	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_HFC4S	/;"	d
PCI_DEVICE_ID_CCD_HFC8S	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_HFC8S	/;"	d
PCI_DEVICE_ID_CCD_HFCE1	include/pci_ids.h	/^#define PCI_DEVICE_ID_CCD_HFCE1	/;"	d
PCI_DEVICE_ID_CENATEK_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_CENATEK_IDE	/;"	d
PCI_DEVICE_ID_CIRRUS_4610	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_4610	/;"	d
PCI_DEVICE_ID_CIRRUS_4612	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_4612	/;"	d
PCI_DEVICE_ID_CIRRUS_4615	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_4615	/;"	d
PCI_DEVICE_ID_CIRRUS_5430	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5430	/;"	d
PCI_DEVICE_ID_CIRRUS_5434_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5434_4	/;"	d
PCI_DEVICE_ID_CIRRUS_5434_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5434_8	/;"	d
PCI_DEVICE_ID_CIRRUS_5436	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5436	/;"	d
PCI_DEVICE_ID_CIRRUS_5446	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5446	/;"	d
PCI_DEVICE_ID_CIRRUS_5462	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5462	/;"	d
PCI_DEVICE_ID_CIRRUS_5464	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5464	/;"	d
PCI_DEVICE_ID_CIRRUS_5465	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5465	/;"	d
PCI_DEVICE_ID_CIRRUS_5480	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_5480	/;"	d
PCI_DEVICE_ID_CIRRUS_6729	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_6729	/;"	d
PCI_DEVICE_ID_CIRRUS_6832	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_6832	/;"	d
PCI_DEVICE_ID_CIRRUS_7543	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_7543	/;"	d
PCI_DEVICE_ID_CIRRUS_7548	include/pci_ids.h	/^#define PCI_DEVICE_ID_CIRRUS_7548	/;"	d
PCI_DEVICE_ID_CMD_643	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMD_643	/;"	d
PCI_DEVICE_ID_CMD_646	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMD_646	/;"	d
PCI_DEVICE_ID_CMD_648	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMD_648	/;"	d
PCI_DEVICE_ID_CMD_649	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMD_649	/;"	d
PCI_DEVICE_ID_CMEDIA_CM8338A	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMEDIA_CM8338A	/;"	d
PCI_DEVICE_ID_CMEDIA_CM8338B	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMEDIA_CM8338B	/;"	d
PCI_DEVICE_ID_CMEDIA_CM8738	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMEDIA_CM8738	/;"	d
PCI_DEVICE_ID_CMEDIA_CM8738B	include/pci_ids.h	/^#define PCI_DEVICE_ID_CMEDIA_CM8738B	/;"	d
PCI_DEVICE_ID_CNET_GIGACARD	include/pci_ids.h	/^#define PCI_DEVICE_ID_CNET_GIGACARD	/;"	d
PCI_DEVICE_ID_COMPAQ_42XX	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_42XX	/;"	d
PCI_DEVICE_ID_COMPAQ_CISS	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_CISS	/;"	d
PCI_DEVICE_ID_COMPAQ_CISSB	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_CISSB	/;"	d
PCI_DEVICE_ID_COMPAQ_CISSC	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_CISSC	/;"	d
PCI_DEVICE_ID_COMPAQ_NETEL10	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETEL10	/;"	d
PCI_DEVICE_ID_COMPAQ_NETEL100	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETEL100	/;"	d
PCI_DEVICE_ID_COMPAQ_NETEL100D	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETEL100D	/;"	d
PCI_DEVICE_ID_COMPAQ_NETEL100I	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETEL100I	/;"	d
PCI_DEVICE_ID_COMPAQ_NETEL100PI	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETEL100PI	/;"	d
PCI_DEVICE_ID_COMPAQ_NETFLEX3B	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETFLEX3B	/;"	d
PCI_DEVICE_ID_COMPAQ_NETFLEX3I	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_NETFLEX3I	/;"	d
PCI_DEVICE_ID_COMPAQ_SMART2P	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_SMART2P	/;"	d
PCI_DEVICE_ID_COMPAQ_TACHYON	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_TACHYON	/;"	d
PCI_DEVICE_ID_COMPAQ_THUNDER	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_THUNDER	/;"	d
PCI_DEVICE_ID_COMPAQ_TOKENRING	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_TOKENRING	/;"	d
PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE /;"	d
PCI_DEVICE_ID_COMPEX2_100VG	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPEX2_100VG	/;"	d
PCI_DEVICE_ID_COMPEX_ENET100VG4	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPEX_ENET100VG4	/;"	d
PCI_DEVICE_ID_COMPUTONE_IP2EX	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPUTONE_IP2EX	/;"	d
PCI_DEVICE_ID_COMPUTONE_PG	include/pci_ids.h	/^#define PCI_DEVICE_ID_COMPUTONE_PG	/;"	d
PCI_DEVICE_ID_CONTAQ_82C693	include/pci_ids.h	/^#define PCI_DEVICE_ID_CONTAQ_82C693	/;"	d
PCI_DEVICE_ID_CORAL_P	include/mb862xx.h	/^#define PCI_DEVICE_ID_CORAL_P	/;"	d
PCI_DEVICE_ID_CORAL_PA	include/mb862xx.h	/^#define PCI_DEVICE_ID_CORAL_PA	/;"	d
PCI_DEVICE_ID_CREATIVE_20K1	include/pci_ids.h	/^#define PCI_DEVICE_ID_CREATIVE_20K1	/;"	d
PCI_DEVICE_ID_CREATIVE_20K2	include/pci_ids.h	/^#define PCI_DEVICE_ID_CREATIVE_20K2	/;"	d
PCI_DEVICE_ID_CREATIVE_EMU10K1	include/pci_ids.h	/^#define PCI_DEVICE_ID_CREATIVE_EMU10K1	/;"	d
PCI_DEVICE_ID_CRP16INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_CRP16INTF	/;"	d
PCI_DEVICE_ID_CT_65545	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_65545	/;"	d
PCI_DEVICE_ID_CT_65548	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_65548	/;"	d
PCI_DEVICE_ID_CT_65550	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_65550	/;"	d
PCI_DEVICE_ID_CT_65554	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_65554	/;"	d
PCI_DEVICE_ID_CT_65555	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_65555	/;"	d
PCI_DEVICE_ID_CT_69000	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_69000	/;"	d
PCI_DEVICE_ID_CT_69030	include/pci_ids.h	/^#define PCI_DEVICE_ID_CT_69030	/;"	d
PCI_DEVICE_ID_CYCLOM_4Y_Hi	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_4Y_Hi	/;"	d
PCI_DEVICE_ID_CYCLOM_4Y_Lo	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_4Y_Lo	/;"	d
PCI_DEVICE_ID_CYCLOM_8Y_Hi	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_8Y_Hi	/;"	d
PCI_DEVICE_ID_CYCLOM_8Y_Lo	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_8Y_Lo	/;"	d
PCI_DEVICE_ID_CYCLOM_Y_Hi	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_Y_Hi	/;"	d
PCI_DEVICE_ID_CYCLOM_Y_Lo	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_Y_Lo	/;"	d
PCI_DEVICE_ID_CYCLOM_Z_Hi	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_Z_Hi	/;"	d
PCI_DEVICE_ID_CYCLOM_Z_Lo	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYCLOM_Z_Lo	/;"	d
PCI_DEVICE_ID_CYRIX_5510	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_5510	/;"	d
PCI_DEVICE_ID_CYRIX_5520	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_5520	/;"	d
PCI_DEVICE_ID_CYRIX_5530_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_5530_AUDIO	/;"	d
PCI_DEVICE_ID_CYRIX_5530_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_5530_IDE	/;"	d
PCI_DEVICE_ID_CYRIX_5530_LEGACY	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_5530_LEGACY	/;"	d
PCI_DEVICE_ID_CYRIX_5530_VIDEO	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_5530_VIDEO	/;"	d
PCI_DEVICE_ID_CYRIX_PCI_MASTER	include/pci_ids.h	/^#define PCI_DEVICE_ID_CYRIX_PCI_MASTER	/;"	d
PCI_DEVICE_ID_DAVICOM_DM9102A	include/pci_ids.h	/^#define PCI_DEVICE_ID_DAVICOM_DM9102A	/;"	d
PCI_DEVICE_ID_DCI_PCCOM2	include/pci_ids.h	/^#define PCI_DEVICE_ID_DCI_PCCOM2	/;"	d
PCI_DEVICE_ID_DCI_PCCOM4	include/pci_ids.h	/^#define PCI_DEVICE_ID_DCI_PCCOM4	/;"	d
PCI_DEVICE_ID_DCI_PCCOM8	include/pci_ids.h	/^#define PCI_DEVICE_ID_DCI_PCCOM8	/;"	d
PCI_DEVICE_ID_DEC_21052	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21052	/;"	d
PCI_DEVICE_ID_DEC_21142	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21142	/;"	d
PCI_DEVICE_ID_DEC_21150	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21150	/;"	d
PCI_DEVICE_ID_DEC_21152	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21152	/;"	d
PCI_DEVICE_ID_DEC_21153	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21153	/;"	d
PCI_DEVICE_ID_DEC_21154	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21154	/;"	d
PCI_DEVICE_ID_DEC_21285	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_21285	/;"	d
PCI_DEVICE_ID_DEC_BRD	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_BRD	/;"	d
PCI_DEVICE_ID_DEC_FDDI	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_FDDI	/;"	d
PCI_DEVICE_ID_DEC_TGA	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_TGA	/;"	d
PCI_DEVICE_ID_DEC_TGA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_TGA2	/;"	d
PCI_DEVICE_ID_DEC_TULIP	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_TULIP	/;"	d
PCI_DEVICE_ID_DEC_TULIP_FAST	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_TULIP_FAST	/;"	d
PCI_DEVICE_ID_DEC_TULIP_PLUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_DEC_TULIP_PLUS	/;"	d
PCI_DEVICE_ID_DELL_PERC5	include/pci_ids.h	/^#define PCI_DEVICE_ID_DELL_PERC5	/;"	d
PCI_DEVICE_ID_DELL_RAC4	include/pci_ids.h	/^#define PCI_DEVICE_ID_DELL_RAC4	/;"	d
PCI_DEVICE_ID_DELL_RACIII	include/pci_ids.h	/^#define PCI_DEVICE_ID_DELL_RACIII	/;"	d
PCI_DEVICE_ID_DIGIUM_HFC4S	include/pci_ids.h	/^#define PCI_DEVICE_ID_DIGIUM_HFC4S	/;"	d
PCI_DEVICE_ID_DIGI_DF_M_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_DIGI_DF_M_A	/;"	d
PCI_DEVICE_ID_DIGI_DF_M_E	include/pci_ids.h	/^#define PCI_DEVICE_ID_DIGI_DF_M_E	/;"	d
PCI_DEVICE_ID_DIGI_DF_M_IOM2_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A	/;"	d
PCI_DEVICE_ID_DIGI_DF_M_IOM2_E	include/pci_ids.h	/^#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E	/;"	d
PCI_DEVICE_ID_DIGI_NEO_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_DIGI_NEO_8	/;"	d
PCI_DEVICE_ID_DLINK_8139	include/pci_ids.h	/^#define PCI_DEVICE_ID_DLINK_8139	/;"	d
PCI_DEVICE_ID_DLINK_DGE510T	include/pci_ids.h	/^#define PCI_DEVICE_ID_DLINK_DGE510T	/;"	d
PCI_DEVICE_ID_DOMEX_DMX3191D	include/pci_ids.h	/^#define PCI_DEVICE_ID_DOMEX_DMX3191D	/;"	d
PCI_DEVICE_ID_DPT	include/pci_ids.h	/^#define PCI_DEVICE_ID_DPT	/;"	d
PCI_DEVICE_ID_DUNORD_I3000	include/pci_ids.h	/^#define PCI_DEVICE_ID_DUNORD_I3000	/;"	d
PCI_DEVICE_ID_DYNALINK_IS64PH	include/pci_ids.h	/^#define PCI_DEVICE_ID_DYNALINK_IS64PH	/;"	d
PCI_DEVICE_ID_ECTIVA_EV1938	include/pci_ids.h	/^#define PCI_DEVICE_ID_ECTIVA_EV1938	/;"	d
PCI_DEVICE_ID_EFAR_SLC90E66_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_EFAR_SLC90E66_1	/;"	d
PCI_DEVICE_ID_EFAR_SLC90E66_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_EFAR_SLC90E66_3	/;"	d
PCI_DEVICE_ID_EFFICEON	include/pci_ids.h	/^#define PCI_DEVICE_ID_EFFICEON	/;"	d
PCI_DEVICE_ID_EF_ATM_ASIC	include/pci_ids.h	/^#define PCI_DEVICE_ID_EF_ATM_ASIC	/;"	d
PCI_DEVICE_ID_EF_ATM_FPGA	include/pci_ids.h	/^#define PCI_DEVICE_ID_EF_ATM_FPGA	/;"	d
PCI_DEVICE_ID_EF_ATM_LANAI2	include/pci_ids.h	/^#define PCI_DEVICE_ID_EF_ATM_LANAI2	/;"	d
PCI_DEVICE_ID_EF_ATM_LANAIHB	include/pci_ids.h	/^#define PCI_DEVICE_ID_EF_ATM_LANAIHB	/;"	d
PCI_DEVICE_ID_EICON_DIVA20	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_DIVA20	/;"	d
PCI_DEVICE_ID_EICON_DIVA201	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_DIVA201	/;"	d
PCI_DEVICE_ID_EICON_DIVA202	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_DIVA202	/;"	d
PCI_DEVICE_ID_EICON_DIVA20_U	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_DIVA20_U	/;"	d
PCI_DEVICE_ID_EICON_MAESTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_MAESTRA	/;"	d
PCI_DEVICE_ID_EICON_MAESTRAP	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_MAESTRAP	/;"	d
PCI_DEVICE_ID_EICON_MAESTRAQ	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_MAESTRAQ	/;"	d
PCI_DEVICE_ID_EICON_MAESTRAQ_U	include/pci_ids.h	/^#define PCI_DEVICE_ID_EICON_MAESTRAQ_U	/;"	d
PCI_DEVICE_ID_ELSA_MICROLINK	include/pci_ids.h	/^#define PCI_DEVICE_ID_ELSA_MICROLINK	/;"	d
PCI_DEVICE_ID_ELSA_QS3000	include/pci_ids.h	/^#define PCI_DEVICE_ID_ELSA_QS3000	/;"	d
PCI_DEVICE_ID_ENE_1211	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_1211	/;"	d
PCI_DEVICE_ID_ENE_1225	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_1225	/;"	d
PCI_DEVICE_ID_ENE_1410	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_1410	/;"	d
PCI_DEVICE_ID_ENE_1420	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_1420	/;"	d
PCI_DEVICE_ID_ENE_710	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_710	/;"	d
PCI_DEVICE_ID_ENE_712	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_712	/;"	d
PCI_DEVICE_ID_ENE_720	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_720	/;"	d
PCI_DEVICE_ID_ENE_722	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_722	/;"	d
PCI_DEVICE_ID_ENE_CB710_FLASH	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_CB710_FLASH	/;"	d
PCI_DEVICE_ID_ENE_CB712_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_CB712_SD	/;"	d
PCI_DEVICE_ID_ENE_CB712_SD_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_CB712_SD_2	/;"	d
PCI_DEVICE_ID_ENE_CB714_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_CB714_SD	/;"	d
PCI_DEVICE_ID_ENE_CB714_SD_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENE_CB714_SD_2	/;"	d
PCI_DEVICE_ID_ENSONIQ_CT5880	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENSONIQ_CT5880	/;"	d
PCI_DEVICE_ID_ENSONIQ_ES1370	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENSONIQ_ES1370	/;"	d
PCI_DEVICE_ID_ENSONIQ_ES1371	include/pci_ids.h	/^#define PCI_DEVICE_ID_ENSONIQ_ES1371	/;"	d
PCI_DEVICE_ID_ESDGMBH_CPCIASIO4	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 /;"	d
PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER	/;"	d
PCI_DEVICE_ID_ESS_ALLEGRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_ALLEGRO	/;"	d
PCI_DEVICE_ID_ESS_ALLEGRO_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_ALLEGRO_1	/;"	d
PCI_DEVICE_ID_ESS_CANYON3D_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_CANYON3D_2	/;"	d
PCI_DEVICE_ID_ESS_CANYON3D_2LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_CANYON3D_2LE	/;"	d
PCI_DEVICE_ID_ESS_ESS0100	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_ESS0100	/;"	d
PCI_DEVICE_ID_ESS_ESS1968	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_ESS1968	/;"	d
PCI_DEVICE_ID_ESS_ESS1978	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_ESS1978	/;"	d
PCI_DEVICE_ID_ESS_MAESTRO3	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_MAESTRO3	/;"	d
PCI_DEVICE_ID_ESS_MAESTRO3_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_MAESTRO3_1	/;"	d
PCI_DEVICE_ID_ESS_MAESTRO3_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_MAESTRO3_2	/;"	d
PCI_DEVICE_ID_ESS_MAESTRO3_HW	include/pci_ids.h	/^#define PCI_DEVICE_ID_ESS_MAESTRO3_HW	/;"	d
PCI_DEVICE_ID_EXAR_XR17C152	include/pci_ids.h	/^#define PCI_DEVICE_ID_EXAR_XR17C152	/;"	d
PCI_DEVICE_ID_EXAR_XR17C154	include/pci_ids.h	/^#define PCI_DEVICE_ID_EXAR_XR17C154	/;"	d
PCI_DEVICE_ID_EXAR_XR17C158	include/pci_ids.h	/^#define PCI_DEVICE_ID_EXAR_XR17C158	/;"	d
PCI_DEVICE_ID_EXAR_XR17V352	include/pci_ids.h	/^#define PCI_DEVICE_ID_EXAR_XR17V352	/;"	d
PCI_DEVICE_ID_EXAR_XR17V354	include/pci_ids.h	/^#define PCI_DEVICE_ID_EXAR_XR17V354	/;"	d
PCI_DEVICE_ID_EXAR_XR17V358	include/pci_ids.h	/^#define PCI_DEVICE_ID_EXAR_XR17V358	/;"	d
PCI_DEVICE_ID_FARSITE_T1U	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_T1U /;"	d
PCI_DEVICE_ID_FARSITE_T2P	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_T2P /;"	d
PCI_DEVICE_ID_FARSITE_T2U	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_T2U /;"	d
PCI_DEVICE_ID_FARSITE_T4P	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_T4P /;"	d
PCI_DEVICE_ID_FARSITE_T4U	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_T4U /;"	d
PCI_DEVICE_ID_FARSITE_TE1	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_TE1 /;"	d
PCI_DEVICE_ID_FARSITE_TE1C	include/pci_ids.h	/^#define PCI_DEVICE_ID_FARSITE_TE1C /;"	d
PCI_DEVICE_ID_FD_36C70	include/pci_ids.h	/^#define PCI_DEVICE_ID_FD_36C70	/;"	d
PCI_DEVICE_ID_FORE_PCA200E	include/pci_ids.h	/^#define PCI_DEVICE_ID_FORE_PCA200E	/;"	d
PCI_DEVICE_ID_FUJITSU_FS155	include/pci_ids.h	/^#define PCI_DEVICE_ID_FUJITSU_FS155	/;"	d
PCI_DEVICE_ID_FUJITSU_FS50	include/pci_ids.h	/^#define PCI_DEVICE_ID_FUJITSU_FS50	/;"	d
PCI_DEVICE_ID_GEFORCE_6800A	include/pci_ids.h	/^#define PCI_DEVICE_ID_GEFORCE_6800A /;"	d
PCI_DEVICE_ID_GEFORCE_6800A_LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_GEFORCE_6800A_LE /;"	d
PCI_DEVICE_ID_GEFORCE_GO_6800	include/pci_ids.h	/^#define PCI_DEVICE_ID_GEFORCE_GO_6800 /;"	d
PCI_DEVICE_ID_GEFORCE_GO_6800_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_GEFORCE_GO_6800_ULTRA /;"	d
PCI_DEVICE_ID_HERC_UNI	include/pci_ids.h	/^#define PCI_DEVICE_ID_HERC_UNI	/;"	d
PCI_DEVICE_ID_HERC_WIN	include/pci_ids.h	/^#define PCI_DEVICE_ID_HERC_WIN	/;"	d
PCI_DEVICE_ID_HINT_VXPROII_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_HINT_VXPROII_IDE /;"	d
PCI_DEVICE_ID_HOLTEK_6565	include/pci_ids.h	/^#define PCI_DEVICE_ID_HOLTEK_6565	/;"	d
PCI_DEVICE_ID_HP_CISSA	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSA	/;"	d
PCI_DEVICE_ID_HP_CISSC	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSC	/;"	d
PCI_DEVICE_ID_HP_CISSD	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSD	/;"	d
PCI_DEVICE_ID_HP_CISSE	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSE	/;"	d
PCI_DEVICE_ID_HP_CISSF	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSF	/;"	d
PCI_DEVICE_ID_HP_CISSH	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSH	/;"	d
PCI_DEVICE_ID_HP_CISSI	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_CISSI	/;"	d
PCI_DEVICE_ID_HP_DIVA	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA	/;"	d
PCI_DEVICE_ID_HP_DIVA_AUX	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_AUX	/;"	d
PCI_DEVICE_ID_HP_DIVA_EVEREST	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_EVEREST	/;"	d
PCI_DEVICE_ID_HP_DIVA_HALFDOME	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_HALFDOME	/;"	d
PCI_DEVICE_ID_HP_DIVA_HURRICANE	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_HURRICANE	/;"	d
PCI_DEVICE_ID_HP_DIVA_KEYSTONE	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE	/;"	d
PCI_DEVICE_ID_HP_DIVA_MAESTRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_MAESTRO	/;"	d
PCI_DEVICE_ID_HP_DIVA_POWERBAR	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_POWERBAR	/;"	d
PCI_DEVICE_ID_HP_DIVA_RMP3	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_RMP3	/;"	d
PCI_DEVICE_ID_HP_DIVA_TOSCA1	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_TOSCA1	/;"	d
PCI_DEVICE_ID_HP_DIVA_TOSCA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_DIVA_TOSCA2	/;"	d
PCI_DEVICE_ID_HP_J2585A	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_J2585A	/;"	d
PCI_DEVICE_ID_HP_J2585B	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_J2585B	/;"	d
PCI_DEVICE_ID_HP_J2970A	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_J2970A	/;"	d
PCI_DEVICE_ID_HP_J2973A	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_J2973A	/;"	d
PCI_DEVICE_ID_HP_PCIX_LBA	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_PCIX_LBA	/;"	d
PCI_DEVICE_ID_HP_REO_IOC	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_REO_IOC	/;"	d
PCI_DEVICE_ID_HP_SX1000_IOC	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_SX1000_IOC	/;"	d
PCI_DEVICE_ID_HP_TACHLITE	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_TACHLITE	/;"	d
PCI_DEVICE_ID_HP_TACHYON	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_TACHYON	/;"	d
PCI_DEVICE_ID_HP_VISUALIZE_EG	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_VISUALIZE_EG	/;"	d
PCI_DEVICE_ID_HP_VISUALIZE_FX2	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_VISUALIZE_FX2	/;"	d
PCI_DEVICE_ID_HP_VISUALIZE_FX4	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_VISUALIZE_FX4	/;"	d
PCI_DEVICE_ID_HP_VISUALIZE_FX6	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_VISUALIZE_FX6	/;"	d
PCI_DEVICE_ID_HP_VISUALIZE_FXE	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_VISUALIZE_FXE	/;"	d
PCI_DEVICE_ID_HP_ZX1_IOC	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_ZX1_IOC	/;"	d
PCI_DEVICE_ID_HP_ZX2_IOC	include/pci_ids.h	/^#define PCI_DEVICE_ID_HP_ZX2_IOC	/;"	d
PCI_DEVICE_ID_HYPERCOPE_PLX	include/pci_ids.h	/^#define PCI_DEVICE_ID_HYPERCOPE_PLX	/;"	d
PCI_DEVICE_ID_IBM_405GP	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_405GP	/;"	d
PCI_DEVICE_ID_IBM_CITRINE	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_CITRINE	/;"	d
PCI_DEVICE_ID_IBM_CPC710_PCI64	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_CPC710_PCI64	/;"	d
PCI_DEVICE_ID_IBM_GEMSTONE	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_GEMSTONE	/;"	d
PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1	/;"	d
PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2	/;"	d
PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL	/;"	d
PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM	/;"	d
PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE /;"	d
PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX	/;"	d
PCI_DEVICE_ID_IBM_OBSIDIAN	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_OBSIDIAN	/;"	d
PCI_DEVICE_ID_IBM_SNIPE	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_SNIPE	/;"	d
PCI_DEVICE_ID_IBM_TR	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_TR	/;"	d
PCI_DEVICE_ID_IBM_TR_WAKE	include/pci_ids.h	/^#define PCI_DEVICE_ID_IBM_TR_WAKE	/;"	d
PCI_DEVICE_ID_ICE_1712	include/pci_ids.h	/^#define PCI_DEVICE_ID_ICE_1712	/;"	d
PCI_DEVICE_ID_IDT_IDT77201	include/pci_ids.h	/^#define PCI_DEVICE_ID_IDT_IDT77201	/;"	d
PCI_DEVICE_ID_IMS_TT128	include/pci_ids.h	/^#define PCI_DEVICE_ID_IMS_TT128	/;"	d
PCI_DEVICE_ID_IMS_TT3D	include/pci_ids.h	/^#define PCI_DEVICE_ID_IMS_TT3D	/;"	d
PCI_DEVICE_ID_INTASHIELD_IS200	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTASHIELD_IS200	/;"	d
PCI_DEVICE_ID_INTASHIELD_IS400	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTASHIELD_IS400	/;"	d
PCI_DEVICE_ID_INTEL_3000_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_3000_HB	/;"	d
PCI_DEVICE_ID_INTEL_440MX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_440MX	/;"	d
PCI_DEVICE_ID_INTEL_440MX_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_440MX_6	/;"	d
PCI_DEVICE_ID_INTEL_5000_ERR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5000_ERR	/;"	d
PCI_DEVICE_ID_INTEL_5000_FBD0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5000_FBD0	/;"	d
PCI_DEVICE_ID_INTEL_5000_FBD1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5000_FBD1	/;"	d
PCI_DEVICE_ID_INTEL_5100_16	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5100_16	/;"	d
PCI_DEVICE_ID_INTEL_5100_19	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5100_19	/;"	d
PCI_DEVICE_ID_INTEL_5100_21	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5100_21	/;"	d
PCI_DEVICE_ID_INTEL_5100_22	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5100_22	/;"	d
PCI_DEVICE_ID_INTEL_5400_ERR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5400_ERR	/;"	d
PCI_DEVICE_ID_INTEL_5400_FBD0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5400_FBD0	/;"	d
PCI_DEVICE_ID_INTEL_5400_FBD1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5400_FBD1	/;"	d
PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX	/;"	d
PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN	/;"	d
PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS	/;"	d
PCI_DEVICE_ID_INTEL_7205_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_7205_0	/;"	d
PCI_DEVICE_ID_INTEL_7505_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_7505_0	/;"	d
PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_DPT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_DPT /;"	d
PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_SPT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_SPT /;"	d
PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT /;"	d
PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_SPT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_SPT /;"	d
PCI_DEVICE_ID_INTEL_80332_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80332_0	/;"	d
PCI_DEVICE_ID_INTEL_80332_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80332_1	/;"	d
PCI_DEVICE_ID_INTEL_80333_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80333_0	/;"	d
PCI_DEVICE_ID_INTEL_80333_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80333_1	/;"	d
PCI_DEVICE_ID_INTEL_80960_RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_80960_RP	/;"	d
PCI_DEVICE_ID_INTEL_82092AA_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82092AA_0	/;"	d
PCI_DEVICE_ID_INTEL_82371AB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371AB	/;"	d
PCI_DEVICE_ID_INTEL_82371AB_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371AB_0	/;"	d
PCI_DEVICE_ID_INTEL_82371AB_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371AB_2	/;"	d
PCI_DEVICE_ID_INTEL_82371AB_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371AB_3	/;"	d
PCI_DEVICE_ID_INTEL_82371FB_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371FB_0	/;"	d
PCI_DEVICE_ID_INTEL_82371FB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371FB_1	/;"	d
PCI_DEVICE_ID_INTEL_82371MX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371MX	/;"	d
PCI_DEVICE_ID_INTEL_82371SB_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371SB_0	/;"	d
PCI_DEVICE_ID_INTEL_82371SB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371SB_1	/;"	d
PCI_DEVICE_ID_INTEL_82371SB_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82371SB_2	/;"	d
PCI_DEVICE_ID_INTEL_82372FB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82372FB_1	/;"	d
PCI_DEVICE_ID_INTEL_82375	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82375	/;"	d
PCI_DEVICE_ID_INTEL_82378	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82378	/;"	d
PCI_DEVICE_ID_INTEL_82380FB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82380FB	/;"	d
PCI_DEVICE_ID_INTEL_82424	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82424	/;"	d
PCI_DEVICE_ID_INTEL_82437	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82437	/;"	d
PCI_DEVICE_ID_INTEL_82437VX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82437VX	/;"	d
PCI_DEVICE_ID_INTEL_82439	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82439	/;"	d
PCI_DEVICE_ID_INTEL_82439TX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82439TX	/;"	d
PCI_DEVICE_ID_INTEL_82441	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82441	/;"	d
PCI_DEVICE_ID_INTEL_82443BX_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443BX_0	/;"	d
PCI_DEVICE_ID_INTEL_82443BX_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443BX_1	/;"	d
PCI_DEVICE_ID_INTEL_82443BX_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443BX_2	/;"	d
PCI_DEVICE_ID_INTEL_82443GX_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443GX_0	/;"	d
PCI_DEVICE_ID_INTEL_82443GX_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443GX_2	/;"	d
PCI_DEVICE_ID_INTEL_82443LX_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443LX_0	/;"	d
PCI_DEVICE_ID_INTEL_82443LX_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443LX_1	/;"	d
PCI_DEVICE_ID_INTEL_82443MX_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443MX_0	/;"	d
PCI_DEVICE_ID_INTEL_82443MX_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443MX_1	/;"	d
PCI_DEVICE_ID_INTEL_82443MX_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82443MX_3	/;"	d
PCI_DEVICE_ID_INTEL_82450GX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82450GX	/;"	d
PCI_DEVICE_ID_INTEL_82451NX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82451NX	/;"	d
PCI_DEVICE_ID_INTEL_82454GX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82454GX	/;"	d
PCI_DEVICE_ID_INTEL_82454NX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82454NX /;"	d
PCI_DEVICE_ID_INTEL_82540EM	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82540EM	/;"	d
PCI_DEVICE_ID_INTEL_82540EM_LOM	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82540EM_LOM	/;"	d
PCI_DEVICE_ID_INTEL_82541ER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82541ER	/;"	d
PCI_DEVICE_ID_INTEL_82541GI_LF	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82541GI_LF	/;"	d
PCI_DEVICE_ID_INTEL_82542	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82542	/;"	d
PCI_DEVICE_ID_INTEL_82543GC_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82543GC_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82543GC_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82543GC_FIBER	/;"	d
PCI_DEVICE_ID_INTEL_82544EI_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82544EI_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82544EI_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82544EI_FIBER	/;"	d
PCI_DEVICE_ID_INTEL_82544GC_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82544GC_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82544GC_LOM	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82544GC_LOM	/;"	d
PCI_DEVICE_ID_INTEL_82545EM_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82545EM_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82545EM_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82545EM_FIBER	/;"	d
PCI_DEVICE_ID_INTEL_82545GM_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82545GM_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82546EB_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82546EB_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82546EB_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82546EB_FIBER	/;"	d
PCI_DEVICE_ID_INTEL_82546GB_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82546GB_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_82546GB_QUAD_COPPER_KSP3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82546GB_QUAD_COPPER_KSP3 /;"	d
PCI_DEVICE_ID_INTEL_82557	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82557	/;"	d
PCI_DEVICE_ID_INTEL_82559	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82559	/;"	d
PCI_DEVICE_ID_INTEL_82559ER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82559ER	/;"	d
PCI_DEVICE_ID_INTEL_82562ET	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82562ET	/;"	d
PCI_DEVICE_ID_INTEL_82571EB_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_COPPER /;"	d
PCI_DEVICE_ID_INTEL_82571EB_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_FIBER /;"	d
PCI_DEVICE_ID_INTEL_82571EB_QUAD_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_QUAD_COPPER /;"	d
PCI_DEVICE_ID_INTEL_82571EB_QUAD_COPPER_LOWPROFILE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_QUAD_COPPER_LOWPROFILE /;"	d
PCI_DEVICE_ID_INTEL_82571EB_QUAD_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_QUAD_FIBER /;"	d
PCI_DEVICE_ID_INTEL_82571EB_SERDES	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_SERDES /;"	d
PCI_DEVICE_ID_INTEL_82571EB_SERDES_DUAL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_SERDES_DUAL /;"	d
PCI_DEVICE_ID_INTEL_82571EB_SERDES_QUAD	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571EB_SERDES_QUAD /;"	d
PCI_DEVICE_ID_INTEL_82571PT_QUAD_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82571PT_QUAD_COPPER /;"	d
PCI_DEVICE_ID_INTEL_82572EI	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82572EI /;"	d
PCI_DEVICE_ID_INTEL_82572EI_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82572EI_COPPER /;"	d
PCI_DEVICE_ID_INTEL_82572EI_FIBER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82572EI_FIBER /;"	d
PCI_DEVICE_ID_INTEL_82572EI_SERDES	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82572EI_SERDES /;"	d
PCI_DEVICE_ID_INTEL_82573E	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82573E /;"	d
PCI_DEVICE_ID_INTEL_82573E_IAMT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82573E_IAMT /;"	d
PCI_DEVICE_ID_INTEL_82573E_SOL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82573E_SOL	/;"	d
PCI_DEVICE_ID_INTEL_82573L	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82573L /;"	d
PCI_DEVICE_ID_INTEL_82573L_SOL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82573L_SOL	/;"	d
PCI_DEVICE_ID_INTEL_82574L	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82574L /;"	d
PCI_DEVICE_ID_INTEL_8257X_SOL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_8257X_SOL	/;"	d
PCI_DEVICE_ID_INTEL_82801AA_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AA_0	/;"	d
PCI_DEVICE_ID_INTEL_82801AA_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AA_1	/;"	d
PCI_DEVICE_ID_INTEL_82801AA_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AA_3	/;"	d
PCI_DEVICE_ID_INTEL_82801AA_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AA_5	/;"	d
PCI_DEVICE_ID_INTEL_82801AA_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AA_6	/;"	d
PCI_DEVICE_ID_INTEL_82801AA_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AA_8	/;"	d
PCI_DEVICE_ID_INTEL_82801AB_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AB_0	/;"	d
PCI_DEVICE_ID_INTEL_82801AB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AB_1	/;"	d
PCI_DEVICE_ID_INTEL_82801AB_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AB_3	/;"	d
PCI_DEVICE_ID_INTEL_82801AB_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AB_5	/;"	d
PCI_DEVICE_ID_INTEL_82801AB_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AB_6	/;"	d
PCI_DEVICE_ID_INTEL_82801AB_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801AB_8	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_0	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_10	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_10	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_11	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_11	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_2	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_4	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_6	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_8	/;"	d
PCI_DEVICE_ID_INTEL_82801BA_9	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801BA_9	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_0	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_10	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_10	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_11	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_11	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_12	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_12	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_3	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_5	/;"	d
PCI_DEVICE_ID_INTEL_82801CA_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801CA_6	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_0	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_1	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_10	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_10	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_11	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_11	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_12	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_12 /;"	d
PCI_DEVICE_ID_INTEL_82801DB_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_2	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_3	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_5	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_6	/;"	d
PCI_DEVICE_ID_INTEL_82801DB_9	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801DB_9	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_0	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_1	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_11	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_11	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_12	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_12	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_13	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_13	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_3	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_5	/;"	d
PCI_DEVICE_ID_INTEL_82801EB_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801EB_6	/;"	d
PCI_DEVICE_ID_INTEL_82801E_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801E_0	/;"	d
PCI_DEVICE_ID_INTEL_82801E_11	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82801E_11	/;"	d
PCI_DEVICE_ID_INTEL_82810E_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82810E_IG	/;"	d
PCI_DEVICE_ID_INTEL_82810E_MC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82810E_MC	/;"	d
PCI_DEVICE_ID_INTEL_82810_IG1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82810_IG1	/;"	d
PCI_DEVICE_ID_INTEL_82810_IG3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82810_IG3	/;"	d
PCI_DEVICE_ID_INTEL_82810_MC1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82810_MC1	/;"	d
PCI_DEVICE_ID_INTEL_82810_MC3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82810_MC3	/;"	d
PCI_DEVICE_ID_INTEL_82815_CGC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82815_CGC	/;"	d
PCI_DEVICE_ID_INTEL_82815_MC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82815_MC	/;"	d
PCI_DEVICE_ID_INTEL_82820_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82820_HB	/;"	d
PCI_DEVICE_ID_INTEL_82820_UP_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82820_UP_HB	/;"	d
PCI_DEVICE_ID_INTEL_82830_CGC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82830_CGC	/;"	d
PCI_DEVICE_ID_INTEL_82830_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82830_HB	/;"	d
PCI_DEVICE_ID_INTEL_82840_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82840_HB	/;"	d
PCI_DEVICE_ID_INTEL_82845G_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82845G_HB	/;"	d
PCI_DEVICE_ID_INTEL_82845G_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82845G_IG	/;"	d
PCI_DEVICE_ID_INTEL_82845_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82845_HB	/;"	d
PCI_DEVICE_ID_INTEL_82850_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82850_HB	/;"	d
PCI_DEVICE_ID_INTEL_82854_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82854_HB	/;"	d
PCI_DEVICE_ID_INTEL_82854_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82854_IG	/;"	d
PCI_DEVICE_ID_INTEL_82855GM_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82855GM_HB	/;"	d
PCI_DEVICE_ID_INTEL_82855GM_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82855GM_IG	/;"	d
PCI_DEVICE_ID_INTEL_82855PM_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82855PM_HB	/;"	d
PCI_DEVICE_ID_INTEL_82860_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82860_HB	/;"	d
PCI_DEVICE_ID_INTEL_82865_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82865_HB	/;"	d
PCI_DEVICE_ID_INTEL_82865_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82865_IG	/;"	d
PCI_DEVICE_ID_INTEL_82875_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82875_HB	/;"	d
PCI_DEVICE_ID_INTEL_82915GM_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82915GM_HB	/;"	d
PCI_DEVICE_ID_INTEL_82915GM_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82915GM_IG	/;"	d
PCI_DEVICE_ID_INTEL_82915G_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82915G_HB	/;"	d
PCI_DEVICE_ID_INTEL_82915G_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82915G_IG	/;"	d
PCI_DEVICE_ID_INTEL_82945GM_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82945GM_HB	/;"	d
PCI_DEVICE_ID_INTEL_82945GM_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82945GM_IG	/;"	d
PCI_DEVICE_ID_INTEL_82945G_HB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82945G_HB	/;"	d
PCI_DEVICE_ID_INTEL_82945G_IG	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_82945G_IG	/;"	d
PCI_DEVICE_ID_INTEL_84460GX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_84460GX	/;"	d
PCI_DEVICE_ID_INTEL_BYT_EMMC2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_BYT_EMMC2	/;"	d
PCI_DEVICE_ID_INTEL_BYT_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_BYT_SD	/;"	d
PCI_DEVICE_ID_INTEL_BYT_SDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_BYT_SDIO	/;"	d
PCI_DEVICE_ID_INTEL_CENTERTON_ILB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_CENTERTON_ILB	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_HDA	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_HDA	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_B65	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_B65	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_C202	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_C202	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_C204	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_C204	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_C206	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_C206	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_H61	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_H61	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_H67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_H67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_HM65	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_HM65	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_HM67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_HM67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_P67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_P67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_Q65	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_Q65	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_Q67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_Q67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_QM67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_QM67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_QS67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_QS67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_UM67	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_UM67	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_Z68	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_Z68	/;"	d
PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS	/;"	d
PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX	/;"	d
PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN	/;"	d
PCI_DEVICE_ID_INTEL_E7320_MCH	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_E7320_MCH	/;"	d
PCI_DEVICE_ID_INTEL_E7501_MCH	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_E7501_MCH	/;"	d
PCI_DEVICE_ID_INTEL_E7520_MCH	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_E7520_MCH	/;"	d
PCI_DEVICE_ID_INTEL_E7525_MCH	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_E7525_MCH	/;"	d
PCI_DEVICE_ID_INTEL_EESSC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_EESSC	/;"	d
PCI_DEVICE_ID_INTEL_EP80579_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_EP80579_0	/;"	d
PCI_DEVICE_ID_INTEL_EP80579_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_EP80579_1	/;"	d
PCI_DEVICE_ID_INTEL_ESB2_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB2_0	/;"	d
PCI_DEVICE_ID_INTEL_ESB2_14	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB2_14	/;"	d
PCI_DEVICE_ID_INTEL_ESB2_17	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB2_17	/;"	d
PCI_DEVICE_ID_INTEL_ESB2_18	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB2_18	/;"	d
PCI_DEVICE_ID_INTEL_ESB_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB_1	/;"	d
PCI_DEVICE_ID_INTEL_ESB_10	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB_10	/;"	d
PCI_DEVICE_ID_INTEL_ESB_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB_2	/;"	d
PCI_DEVICE_ID_INTEL_ESB_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB_4	/;"	d
PCI_DEVICE_ID_INTEL_ESB_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB_5	/;"	d
PCI_DEVICE_ID_INTEL_ESB_9	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ESB_9	/;"	d
PCI_DEVICE_ID_INTEL_FBD_CNB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_FBD_CNB	/;"	d
PCI_DEVICE_ID_INTEL_HSW_IMC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_HSW_IMC	/;"	d
PCI_DEVICE_ID_INTEL_I210_1000BASEKX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_1000BASEKX	/;"	d
PCI_DEVICE_ID_INTEL_I210_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_I210_COPPER_FLASHLESS	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_COPPER_FLASHLESS	/;"	d
PCI_DEVICE_ID_INTEL_I210_EXTPHY	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_EXTPHY	/;"	d
PCI_DEVICE_ID_INTEL_I210_SERDES	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_SERDES	/;"	d
PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS	/;"	d
PCI_DEVICE_ID_INTEL_I210_UNPROGRAMMED	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I210_UNPROGRAMMED	/;"	d
PCI_DEVICE_ID_INTEL_I211_COPPER	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I211_COPPER	/;"	d
PCI_DEVICE_ID_INTEL_I211_UNPROGRAMMED	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I211_UNPROGRAMMED	/;"	d
PCI_DEVICE_ID_INTEL_I7300_MCH_ERR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7300_MCH_ERR /;"	d
PCI_DEVICE_ID_INTEL_I7300_MCH_FB0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7300_MCH_FB0 /;"	d
PCI_DEVICE_ID_INTEL_I7300_MCH_FB1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7300_MCH_FB1 /;"	d
PCI_DEVICE_ID_INTEL_I7_MCR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MCR	/;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH0_ADDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_ADDR /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH0_CTRL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_CTRL /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH0_RANK	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_RANK /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH0_TC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_TC /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH1_ADDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_ADDR /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH1_CTRL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_CTRL /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH1_RANK	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_RANK /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH1_TC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_TC /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH2_CTRL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_CTRL /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC /;"	d
PCI_DEVICE_ID_INTEL_I7_MC_RAS	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_RAS	/;"	d
PCI_DEVICE_ID_INTEL_I7_MC_TAD	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_TAD	/;"	d
PCI_DEVICE_ID_INTEL_I7_MC_TEST	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_MC_TEST	/;"	d
PCI_DEVICE_ID_INTEL_I7_NONCORE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_NONCORE	/;"	d
PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT /;"	d
PCI_DEVICE_ID_INTEL_I960	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I960	/;"	d
PCI_DEVICE_ID_INTEL_I960RM	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_I960RM	/;"	d
PCI_DEVICE_ID_INTEL_ICH10_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH10_0	/;"	d
PCI_DEVICE_ID_INTEL_ICH10_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH10_1	/;"	d
PCI_DEVICE_ID_INTEL_ICH10_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH10_2	/;"	d
PCI_DEVICE_ID_INTEL_ICH10_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH10_3	/;"	d
PCI_DEVICE_ID_INTEL_ICH10_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH10_4	/;"	d
PCI_DEVICE_ID_INTEL_ICH10_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH10_5	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_0	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_1	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_16	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_16	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_17	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_17	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_18	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_18	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_19	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_19	/;"	d
PCI_DEVICE_ID_INTEL_ICH6_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH6_2	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_0	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_1	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_17	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_17	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_19	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_19	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_20	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_20	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_21	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_21	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_30	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_30	/;"	d
PCI_DEVICE_ID_INTEL_ICH7_31	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH7_31	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_0	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_1	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_2	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_3	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_4	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_5	/;"	d
PCI_DEVICE_ID_INTEL_ICH8_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH8_6	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_0	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_1	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_2	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_3	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_4	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_5	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_6	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_7	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_7	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_8	/;"	d
PCI_DEVICE_ID_INTEL_ICH9_AHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ICH9_AHCI	/;"	d
PCI_DEVICE_ID_INTEL_IOAT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_CNB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_CNB	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF0	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF1	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF2	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF3	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF4	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF5	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF6	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF7	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF7	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF8	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF8	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_JSF9	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_JSF9	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SCNB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SCNB	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB0	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB1	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB2	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB3	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB4	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB5	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB6	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB7	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB7	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB8	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB8	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_SNB9	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_SNB9	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG0	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG1	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG2	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG3	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG4	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG4	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG5	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG5	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG6	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG6	/;"	d
PCI_DEVICE_ID_INTEL_IOAT_TBG7	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IOAT_TBG7	/;"	d
PCI_DEVICE_ID_INTEL_ITC_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_ITC_LPC	/;"	d
PCI_DEVICE_ID_INTEL_IVB_IMC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IVB_IMC	/;"	d
PCI_DEVICE_ID_INTEL_IXP2800	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IXP2800	/;"	d
PCI_DEVICE_ID_INTEL_IXP4XX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_IXP4XX	/;"	d
PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX	/;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_PHY0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_PHY0 /;"	d
PCI_DEVICE_ID_INTEL_LYNNFIELD_SAD	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNNFIELD_SAD /;"	d
PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI	/;"	d
PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC	/;"	d
PCI_DEVICE_ID_INTEL_MCH_PA	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MCH_PA	/;"	d
PCI_DEVICE_ID_INTEL_MCH_PA1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MCH_PA1	/;"	d
PCI_DEVICE_ID_INTEL_MCH_PB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MCH_PB	/;"	d
PCI_DEVICE_ID_INTEL_MCH_PB1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MCH_PB1	/;"	d
PCI_DEVICE_ID_INTEL_MCH_PC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MCH_PC	/;"	d
PCI_DEVICE_ID_INTEL_MCH_PC1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MCH_PC1	/;"	d
PCI_DEVICE_ID_INTEL_MFD_EMMC0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MFD_EMMC0	/;"	d
PCI_DEVICE_ID_INTEL_MFD_EMMC1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MFD_EMMC1	/;"	d
PCI_DEVICE_ID_INTEL_MFD_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MFD_SD	/;"	d
PCI_DEVICE_ID_INTEL_MFD_SDIO1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MFD_SDIO1	/;"	d
PCI_DEVICE_ID_INTEL_MFD_SDIO2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MFD_SDIO2	/;"	d
PCI_DEVICE_ID_INTEL_MRST_SD0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MRST_SD0	/;"	d
PCI_DEVICE_ID_INTEL_MRST_SD1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MRST_SD1	/;"	d
PCI_DEVICE_ID_INTEL_MRST_SD2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_MRST_SD2	/;"	d
PCI_DEVICE_ID_INTEL_NM10_AHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_NM10_AHCI	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_HDA	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_HDA	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_B75	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_B75	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_C216	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_C216	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_H77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_H77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM70	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM70	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM75	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM75	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM76	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM76	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_HM77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MBL_SAMPLE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MBL_SAMPLE /;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_NM70	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_NM70	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Q75	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Q75	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Q77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Q77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_QM77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_QM77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_QS77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_QS77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_SFF_SAMPLE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_SFF_SAMPLE /;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_UM77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_UM77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Z75	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Z75	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Z77	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_Z77	/;"	d
PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI	/;"	d
PCI_DEVICE_ID_INTEL_PATSBURG_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC	/;"	d
PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0	/;"	d
PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1	/;"	d
PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS	/;"	d
PCI_DEVICE_ID_INTEL_PXHD_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PXHD_0	/;"	d
PCI_DEVICE_ID_INTEL_PXHD_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PXHD_1	/;"	d
PCI_DEVICE_ID_INTEL_PXHV	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PXHV	/;"	d
PCI_DEVICE_ID_INTEL_PXH_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PXH_0	/;"	d
PCI_DEVICE_ID_INTEL_PXH_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_PXH_1	/;"	d
PCI_DEVICE_ID_INTEL_QRK_EMAC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_QRK_EMAC	/;"	d
PCI_DEVICE_ID_INTEL_QRK_ILB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_QRK_ILB	/;"	d
PCI_DEVICE_ID_INTEL_QRK_SDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_QRK_SDIO	/;"	d
PCI_DEVICE_ID_INTEL_QRK_UART	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_QRK_UART	/;"	d
PCI_DEVICE_ID_INTEL_S21152BB	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_S21152BB	/;"	d
PCI_DEVICE_ID_INTEL_SCH_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_SCH_IDE	/;"	d
PCI_DEVICE_ID_INTEL_SCH_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_SCH_LPC	/;"	d
PCI_DEVICE_ID_INTEL_SNB_IMC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_SNB_IMC	/;"	d
PCI_DEVICE_ID_INTEL_TCF_GBE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_GBE	/;"	d
PCI_DEVICE_ID_INTEL_TCF_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_SATA	/;"	d
PCI_DEVICE_ID_INTEL_TCF_SDIO_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_SDIO_0	/;"	d
PCI_DEVICE_ID_INTEL_TCF_SDIO_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_SDIO_1	/;"	d
PCI_DEVICE_ID_INTEL_TCF_UART_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_UART_0	/;"	d
PCI_DEVICE_ID_INTEL_TCF_UART_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_UART_1	/;"	d
PCI_DEVICE_ID_INTEL_TCF_UART_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_UART_2	/;"	d
PCI_DEVICE_ID_INTEL_TCF_UART_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TCF_UART_3	/;"	d
PCI_DEVICE_ID_INTEL_TGP_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_TGP_LPC	/;"	d
PCI_DEVICE_ID_INTEL_UNC_HA	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_HA	/;"	d
PCI_DEVICE_ID_INTEL_UNC_IMC0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_IMC0	/;"	d
PCI_DEVICE_ID_INTEL_UNC_IMC1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_IMC1	/;"	d
PCI_DEVICE_ID_INTEL_UNC_IMC2	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_IMC2	/;"	d
PCI_DEVICE_ID_INTEL_UNC_IMC3	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_IMC3	/;"	d
PCI_DEVICE_ID_INTEL_UNC_QPI0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_QPI0	/;"	d
PCI_DEVICE_ID_INTEL_UNC_QPI1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_QPI1	/;"	d
PCI_DEVICE_ID_INTEL_UNC_R2PCIE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_R2PCIE	/;"	d
PCI_DEVICE_ID_INTEL_UNC_R3QPI0	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_R3QPI0	/;"	d
PCI_DEVICE_ID_INTEL_UNC_R3QPI1	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_UNC_R3QPI1	/;"	d
PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE	/;"	d
PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE_ALT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE_ALT	/;"	d
PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC	/;"	d
PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA	/;"	d
PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT	/;"	d
PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI	/;"	d
PCI_DEVICE_ID_INTEL_WILDCATPOINT_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LPC	/;"	d
PCI_DEVICE_ID_INTEL_X58_HUB_MGMT	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTEL_X58_HUB_MGMT /;"	d
PCI_DEVICE_ID_INTERG_1682	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTERG_1682	/;"	d
PCI_DEVICE_ID_INTERG_2000	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTERG_2000	/;"	d
PCI_DEVICE_ID_INTERG_2010	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTERG_2010	/;"	d
PCI_DEVICE_ID_INTERG_5000	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTERG_5000	/;"	d
PCI_DEVICE_ID_INTERG_5050	include/pci_ids.h	/^#define PCI_DEVICE_ID_INTERG_5050	/;"	d
PCI_DEVICE_ID_IOMEGA_BUZ	include/pci_ids.h	/^#define PCI_DEVICE_ID_IOMEGA_BUZ	/;"	d
PCI_DEVICE_ID_ITE_8152	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_8152	/;"	d
PCI_DEVICE_ID_ITE_8172	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_8172	/;"	d
PCI_DEVICE_ID_ITE_8211	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_8211	/;"	d
PCI_DEVICE_ID_ITE_8212	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_8212	/;"	d
PCI_DEVICE_ID_ITE_8213	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_8213	/;"	d
PCI_DEVICE_ID_ITE_8872	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_8872	/;"	d
PCI_DEVICE_ID_ITE_IT8330G_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_ITE_IT8330G_0	/;"	d
PCI_DEVICE_ID_JMICRON_JMB360	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB360	/;"	d
PCI_DEVICE_ID_JMICRON_JMB361	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB361	/;"	d
PCI_DEVICE_ID_JMICRON_JMB362	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB362	/;"	d
PCI_DEVICE_ID_JMICRON_JMB363	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB363	/;"	d
PCI_DEVICE_ID_JMICRON_JMB364	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB364	/;"	d
PCI_DEVICE_ID_JMICRON_JMB365	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB365	/;"	d
PCI_DEVICE_ID_JMICRON_JMB366	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB366	/;"	d
PCI_DEVICE_ID_JMICRON_JMB368	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB368	/;"	d
PCI_DEVICE_ID_JMICRON_JMB369	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB369	/;"	d
PCI_DEVICE_ID_JMICRON_JMB385_MS	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB385_MS	/;"	d
PCI_DEVICE_ID_JMICRON_JMB388_ESD	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB388_ESD /;"	d
PCI_DEVICE_ID_JMICRON_JMB388_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB388_SD	/;"	d
PCI_DEVICE_ID_JMICRON_JMB38X_MMC	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB38X_MMC /;"	d
PCI_DEVICE_ID_JMICRON_JMB38X_MS	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB38X_MS	/;"	d
PCI_DEVICE_ID_JMICRON_JMB38X_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB38X_SD	/;"	d
PCI_DEVICE_ID_JMICRON_JMB390_MS	include/pci_ids.h	/^#define PCI_DEVICE_ID_JMICRON_JMB390_MS	/;"	d
PCI_DEVICE_ID_KORENIX_JETCARDF0	include/pci_ids.h	/^#define PCI_DEVICE_ID_KORENIX_JETCARDF0	/;"	d
PCI_DEVICE_ID_KORENIX_JETCARDF1	include/pci_ids.h	/^#define PCI_DEVICE_ID_KORENIX_JETCARDF1	/;"	d
PCI_DEVICE_ID_KORENIX_JETCARDF2	include/pci_ids.h	/^#define PCI_DEVICE_ID_KORENIX_JETCARDF2	/;"	d
PCI_DEVICE_ID_KORENIX_JETCARDF3	include/pci_ids.h	/^#define PCI_DEVICE_ID_KORENIX_JETCARDF3	/;"	d
PCI_DEVICE_ID_LAVA_BOCA_IOPPAR	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_BOCA_IOPPAR	/;"	d
PCI_DEVICE_ID_LAVA_DSERIAL	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_DSERIAL	/;"	d
PCI_DEVICE_ID_LAVA_DUAL_PAR_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_DUAL_PAR_A	/;"	d
PCI_DEVICE_ID_LAVA_DUAL_PAR_B	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_DUAL_PAR_B	/;"	d
PCI_DEVICE_ID_LAVA_OCTO_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_OCTO_A	/;"	d
PCI_DEVICE_ID_LAVA_OCTO_B	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_OCTO_B	/;"	d
PCI_DEVICE_ID_LAVA_PARALLEL	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_PARALLEL	/;"	d
PCI_DEVICE_ID_LAVA_PORT_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_PORT_650	/;"	d
PCI_DEVICE_ID_LAVA_PORT_PLUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_PORT_PLUS	/;"	d
PCI_DEVICE_ID_LAVA_QUAD_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_QUAD_A	/;"	d
PCI_DEVICE_ID_LAVA_QUAD_B	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_QUAD_B	/;"	d
PCI_DEVICE_ID_LAVA_QUATRO_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_QUATRO_A	/;"	d
PCI_DEVICE_ID_LAVA_QUATRO_B	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_QUATRO_B	/;"	d
PCI_DEVICE_ID_LAVA_QUATTRO_A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_QUATTRO_A	/;"	d
PCI_DEVICE_ID_LAVA_QUATTRO_B	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_QUATTRO_B	/;"	d
PCI_DEVICE_ID_LAVA_SSERIAL	include/pci_ids.h	/^#define PCI_DEVICE_ID_LAVA_SSERIAL	/;"	d
PCI_DEVICE_ID_LINKSYS_EG1064	include/pci_ids.h	/^#define PCI_DEVICE_ID_LINKSYS_EG1064	/;"	d
PCI_DEVICE_ID_LMC_DS3	include/pci_ids.h	/^#define PCI_DEVICE_ID_LMC_DS3	/;"	d
PCI_DEVICE_ID_LMC_HSSI	include/pci_ids.h	/^#define PCI_DEVICE_ID_LMC_HSSI	/;"	d
PCI_DEVICE_ID_LMC_SSI	include/pci_ids.h	/^#define PCI_DEVICE_ID_LMC_SSI	/;"	d
PCI_DEVICE_ID_LMC_T1	include/pci_ids.h	/^#define PCI_DEVICE_ID_LMC_T1	/;"	d
PCI_DEVICE_ID_LML_33R10	include/pci_ids.h	/^#define PCI_DEVICE_ID_LML_33R10	/;"	d
PCI_DEVICE_ID_LSI_1030_53C1035	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_1030_53C1035	/;"	d
PCI_DEVICE_ID_LSI_53C1010_33	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C1010_33	/;"	d
PCI_DEVICE_ID_LSI_53C1010_66	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C1010_66	/;"	d
PCI_DEVICE_ID_LSI_53C1030	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C1030	/;"	d
PCI_DEVICE_ID_LSI_53C1035	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C1035	/;"	d
PCI_DEVICE_ID_LSI_53C1510	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C1510	/;"	d
PCI_DEVICE_ID_LSI_53C810AP	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C810AP	/;"	d
PCI_DEVICE_ID_LSI_53C875A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C875A	/;"	d
PCI_DEVICE_ID_LSI_53C895A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_53C895A	/;"	d
PCI_DEVICE_ID_LSI_61C102	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_61C102	/;"	d
PCI_DEVICE_ID_LSI_63C815	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_63C815	/;"	d
PCI_DEVICE_ID_LSI_FC909	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC909	/;"	d
PCI_DEVICE_ID_LSI_FC919	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC919	/;"	d
PCI_DEVICE_ID_LSI_FC919X	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC919X	/;"	d
PCI_DEVICE_ID_LSI_FC919_LAN	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC919_LAN	/;"	d
PCI_DEVICE_ID_LSI_FC929	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC929	/;"	d
PCI_DEVICE_ID_LSI_FC929X	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC929X	/;"	d
PCI_DEVICE_ID_LSI_FC929_LAN	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC929_LAN	/;"	d
PCI_DEVICE_ID_LSI_FC939X	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC939X	/;"	d
PCI_DEVICE_ID_LSI_FC949ES	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC949ES	/;"	d
PCI_DEVICE_ID_LSI_FC949X	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_FC949X	/;"	d
PCI_DEVICE_ID_LSI_SAS1064	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1064	/;"	d
PCI_DEVICE_ID_LSI_SAS1064A	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1064A	/;"	d
PCI_DEVICE_ID_LSI_SAS1064E	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1064E	/;"	d
PCI_DEVICE_ID_LSI_SAS1064R	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1064R	/;"	d
PCI_DEVICE_ID_LSI_SAS1066	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1066	/;"	d
PCI_DEVICE_ID_LSI_SAS1066E	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1066E	/;"	d
PCI_DEVICE_ID_LSI_SAS1068	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1068	/;"	d
PCI_DEVICE_ID_LSI_SAS1068E	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1068E	/;"	d
PCI_DEVICE_ID_LSI_SAS1078	include/pci_ids.h	/^#define PCI_DEVICE_ID_LSI_SAS1078	/;"	d
PCI_DEVICE_ID_MADGE_MK2	include/pci_ids.h	/^#define PCI_DEVICE_ID_MADGE_MK2	/;"	d
PCI_DEVICE_ID_MAINPINE_PBRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_MAINPINE_PBRIDGE	/;"	d
PCI_DEVICE_ID_MARVELL_88ALP01_CCIC	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_88ALP01_CCIC	/;"	d
PCI_DEVICE_ID_MARVELL_88ALP01_NAND	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_88ALP01_NAND	/;"	d
PCI_DEVICE_ID_MARVELL_88ALP01_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_88ALP01_SD	/;"	d
PCI_DEVICE_ID_MARVELL_GT64111	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_GT64111	/;"	d
PCI_DEVICE_ID_MARVELL_GT64260	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_GT64260	/;"	d
PCI_DEVICE_ID_MARVELL_MV64360	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_MV64360	/;"	d
PCI_DEVICE_ID_MARVELL_MV64460	include/pci_ids.h	/^#define PCI_DEVICE_ID_MARVELL_MV64460	/;"	d
PCI_DEVICE_ID_MATROX_G100_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_G100_AGP	/;"	d
PCI_DEVICE_ID_MATROX_G100_MM	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_G100_MM	/;"	d
PCI_DEVICE_ID_MATROX_G200EV_PCI	include/pci_ids.h	/^#define	PCI_DEVICE_ID_MATROX_G200EV_PCI	/;"	d
PCI_DEVICE_ID_MATROX_G200_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_G200_AGP	/;"	d
PCI_DEVICE_ID_MATROX_G200_PCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_G200_PCI	/;"	d
PCI_DEVICE_ID_MATROX_G400	include/pci_ids.h	/^#define	PCI_DEVICE_ID_MATROX_G400	/;"	d
PCI_DEVICE_ID_MATROX_G550	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_G550	/;"	d
PCI_DEVICE_ID_MATROX_MGA_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MGA_2	/;"	d
PCI_DEVICE_ID_MATROX_MGA_IMP	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MGA_IMP	/;"	d
PCI_DEVICE_ID_MATROX_MIL	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MIL	/;"	d
PCI_DEVICE_ID_MATROX_MIL_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MIL_2	/;"	d
PCI_DEVICE_ID_MATROX_MIL_2_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MIL_2_AGP	/;"	d
PCI_DEVICE_ID_MATROX_MYS	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MYS	/;"	d
PCI_DEVICE_ID_MATROX_MYS_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_MYS_AGP	/;"	d
PCI_DEVICE_ID_MATROX_VIA	include/pci_ids.h	/^#define PCI_DEVICE_ID_MATROX_VIA	/;"	d
PCI_DEVICE_ID_MCHIP_KL5A72002	include/pci_ids.h	/^#define PCI_DEVICE_ID_MCHIP_KL5A72002	/;"	d
PCI_DEVICE_ID_MELLANOX_ARBEL	include/pci_ids.h	/^#define PCI_DEVICE_ID_MELLANOX_ARBEL	/;"	d
PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT	include/pci_ids.h	/^#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT /;"	d
PCI_DEVICE_ID_MELLANOX_SINAI	include/pci_ids.h	/^#define PCI_DEVICE_ID_MELLANOX_SINAI	/;"	d
PCI_DEVICE_ID_MELLANOX_SINAI_OLD	include/pci_ids.h	/^#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD /;"	d
PCI_DEVICE_ID_MELLANOX_TAVOR	include/pci_ids.h	/^#define PCI_DEVICE_ID_MELLANOX_TAVOR	/;"	d
PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE	/;"	d
PCI_DEVICE_ID_MICROGATE_SCA	include/pci_ids.h	/^#define PCI_DEVICE_ID_MICROGATE_SCA	/;"	d
PCI_DEVICE_ID_MICROGATE_USC	include/pci_ids.h	/^#define PCI_DEVICE_ID_MICROGATE_USC	/;"	d
PCI_DEVICE_ID_MICRO_MEMORY_5415CN	include/pci_ids.h	/^#define PCI_DEVICE_ID_MICRO_MEMORY_5415CN	/;"	d
PCI_DEVICE_ID_MICRO_MEMORY_5425CN	include/pci_ids.h	/^#define PCI_DEVICE_ID_MICRO_MEMORY_5425CN	/;"	d
PCI_DEVICE_ID_MICRO_MEMORY_6155	include/pci_ids.h	/^#define PCI_DEVICE_ID_MICRO_MEMORY_6155	/;"	d
PCI_DEVICE_ID_MIPS_MSC01	include/pci_ids.h	/^#define PCI_DEVICE_ID_MIPS_MSC01	/;"	d
PCI_DEVICE_ID_MIRO_36050	include/pci_ids.h	/^#define PCI_DEVICE_ID_MIRO_36050	/;"	d
PCI_DEVICE_ID_MIRO_DC10PLUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_MIRO_DC10PLUS	/;"	d
PCI_DEVICE_ID_MIRO_DC30PLUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_MIRO_DC30PLUS	/;"	d
PCI_DEVICE_ID_MOTOROLA_FALCON	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_FALCON	/;"	d
PCI_DEVICE_ID_MOTOROLA_HARRIER	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_HARRIER	/;"	d
PCI_DEVICE_ID_MOTOROLA_HAWK	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_HAWK	/;"	d
PCI_DEVICE_ID_MOTOROLA_MPC105	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_MPC105	/;"	d
PCI_DEVICE_ID_MOTOROLA_MPC106	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_MPC106	/;"	d
PCI_DEVICE_ID_MOTOROLA_MPC107	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_MPC107	/;"	d
PCI_DEVICE_ID_MOTOROLA_MPC5200	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_MPC5200	/;"	d
PCI_DEVICE_ID_MOTOROLA_MPC5200B	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_MPC5200B	/;"	d
PCI_DEVICE_ID_MOTOROLA_RAVEN	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOTOROLA_RAVEN	/;"	d
PCI_DEVICE_ID_MOXA_C104	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_C104	/;"	d
PCI_DEVICE_ID_MOXA_C168	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_C168	/;"	d
PCI_DEVICE_ID_MOXA_C218	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_C218	/;"	d
PCI_DEVICE_ID_MOXA_C320	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_C320	/;"	d
PCI_DEVICE_ID_MOXA_CP102	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP102	/;"	d
PCI_DEVICE_ID_MOXA_CP102U	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP102U	/;"	d
PCI_DEVICE_ID_MOXA_CP102UL	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP102UL	/;"	d
PCI_DEVICE_ID_MOXA_CP104EL	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP104EL	/;"	d
PCI_DEVICE_ID_MOXA_CP104JU	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP104JU	/;"	d
PCI_DEVICE_ID_MOXA_CP104U	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP104U	/;"	d
PCI_DEVICE_ID_MOXA_CP114	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP114	/;"	d
PCI_DEVICE_ID_MOXA_CP118EL	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP118EL	/;"	d
PCI_DEVICE_ID_MOXA_CP118U	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP118U	/;"	d
PCI_DEVICE_ID_MOXA_CP132	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP132	/;"	d
PCI_DEVICE_ID_MOXA_CP132U	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP132U	/;"	d
PCI_DEVICE_ID_MOXA_CP134U	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP134U	/;"	d
PCI_DEVICE_ID_MOXA_CP168EL	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP168EL	/;"	d
PCI_DEVICE_ID_MOXA_CP168U	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP168U	/;"	d
PCI_DEVICE_ID_MOXA_CP204J	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CP204J	/;"	d
PCI_DEVICE_ID_MOXA_CT114	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_CT114	/;"	d
PCI_DEVICE_ID_MOXA_RC7000	include/pci_ids.h	/^#define PCI_DEVICE_ID_MOXA_RC7000	/;"	d
PCI_DEVICE_ID_MPC8308	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8308	/;"	d
PCI_DEVICE_ID_MPC8314	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8314	/;"	d
PCI_DEVICE_ID_MPC8314E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8314E	/;"	d
PCI_DEVICE_ID_MPC8315	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8315	/;"	d
PCI_DEVICE_ID_MPC8315E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8315E	/;"	d
PCI_DEVICE_ID_MPC8377	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8377	/;"	d
PCI_DEVICE_ID_MPC8377E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8377E	/;"	d
PCI_DEVICE_ID_MPC8378	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8378	/;"	d
PCI_DEVICE_ID_MPC8378E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8378E	/;"	d
PCI_DEVICE_ID_MPC8533	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8533	/;"	d
PCI_DEVICE_ID_MPC8533E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8533E	/;"	d
PCI_DEVICE_ID_MPC8536	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8536	/;"	d
PCI_DEVICE_ID_MPC8536E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8536E	/;"	d
PCI_DEVICE_ID_MPC8543	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8543	/;"	d
PCI_DEVICE_ID_MPC8543E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8543E	/;"	d
PCI_DEVICE_ID_MPC8544	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8544	/;"	d
PCI_DEVICE_ID_MPC8544E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8544E	/;"	d
PCI_DEVICE_ID_MPC8545	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8545	/;"	d
PCI_DEVICE_ID_MPC8545E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8545E	/;"	d
PCI_DEVICE_ID_MPC8547E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8547E	/;"	d
PCI_DEVICE_ID_MPC8548	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8548	/;"	d
PCI_DEVICE_ID_MPC8548E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8548E	/;"	d
PCI_DEVICE_ID_MPC8567	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8567	/;"	d
PCI_DEVICE_ID_MPC8567E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8567E	/;"	d
PCI_DEVICE_ID_MPC8568	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8568	/;"	d
PCI_DEVICE_ID_MPC8568E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8568E	/;"	d
PCI_DEVICE_ID_MPC8569	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8569	/;"	d
PCI_DEVICE_ID_MPC8569E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8569E	/;"	d
PCI_DEVICE_ID_MPC8572	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8572	/;"	d
PCI_DEVICE_ID_MPC8572E	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8572E	/;"	d
PCI_DEVICE_ID_MPC8610	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8610	/;"	d
PCI_DEVICE_ID_MPC8641	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8641	/;"	d
PCI_DEVICE_ID_MPC8641D	include/pci_ids.h	/^#define PCI_DEVICE_ID_MPC8641D	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_BA	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_BA	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_GEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_GEM	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_LA	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_LA	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_LP	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_LP	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_P	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_P	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_PD	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_PD	/;"	d
PCI_DEVICE_ID_MYLEX_DAC960_PG	include/pci_ids.h	/^#define PCI_DEVICE_ID_MYLEX_DAC960_PG	/;"	d
PCI_DEVICE_ID_NCR_53C1510	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C1510	/;"	d
PCI_DEVICE_ID_NCR_53C810	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C810	/;"	d
PCI_DEVICE_ID_NCR_53C815	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C815	/;"	d
PCI_DEVICE_ID_NCR_53C820	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C820	/;"	d
PCI_DEVICE_ID_NCR_53C825	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C825	/;"	d
PCI_DEVICE_ID_NCR_53C860	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C860	/;"	d
PCI_DEVICE_ID_NCR_53C875	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C875	/;"	d
PCI_DEVICE_ID_NCR_53C875J	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C875J	/;"	d
PCI_DEVICE_ID_NCR_53C885	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C885	/;"	d
PCI_DEVICE_ID_NCR_53C895	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C895	/;"	d
PCI_DEVICE_ID_NCR_53C896	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_53C896	/;"	d
PCI_DEVICE_ID_NCR_YELLOWFIN	include/pci_ids.h	/^#define PCI_DEVICE_ID_NCR_YELLOWFIN	/;"	d
PCI_DEVICE_ID_NEC_486	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_486	/;"	d
PCI_DEVICE_ID_NEC_ACCEL_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_ACCEL_1	/;"	d
PCI_DEVICE_ID_NEC_ACCEL_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_ACCEL_2	/;"	d
PCI_DEVICE_ID_NEC_ATM	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_ATM	/;"	d
PCI_DEVICE_ID_NEC_CBUS_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_CBUS_1	/;"	d
PCI_DEVICE_ID_NEC_CBUS_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_CBUS_2	/;"	d
PCI_DEVICE_ID_NEC_CBUS_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_CBUS_3	/;"	d
PCI_DEVICE_ID_NEC_GRAPH	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_GRAPH	/;"	d
PCI_DEVICE_ID_NEC_LOCAL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_LOCAL	/;"	d
PCI_DEVICE_ID_NEC_NAPCCARD	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_NAPCCARD	/;"	d
PCI_DEVICE_ID_NEC_PC9821CS01	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_PC9821CS01 /;"	d
PCI_DEVICE_ID_NEC_PC9821NRB06	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_PC9821NRB06 /;"	d
PCI_DEVICE_ID_NEC_PCX2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_PCX2	/;"	d
PCI_DEVICE_ID_NEC_R4000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_R4000	/;"	d
PCI_DEVICE_ID_NEC_STARALPHA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_STARALPHA2	/;"	d
PCI_DEVICE_ID_NEC_USB	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_USB	/;"	d
PCI_DEVICE_ID_NEC_UXBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_UXBUS	/;"	d
PCI_DEVICE_ID_NEC_VL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_VL	/;"	d
PCI_DEVICE_ID_NEC_VRC4173	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_VRC4173	/;"	d
PCI_DEVICE_ID_NEC_VRC5476	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_VRC5476 /;"	d
PCI_DEVICE_ID_NEC_VRC5477_AC97	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEC_VRC5477_AC97 /;"	d
PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO /;"	d
PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO /;"	d
PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO /;"	d
PCI_DEVICE_ID_NEO_2DB9	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEO_2DB9 /;"	d
PCI_DEVICE_ID_NEO_2DB9PRI	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEO_2DB9PRI /;"	d
PCI_DEVICE_ID_NEO_2RJ45	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEO_2RJ45 /;"	d
PCI_DEVICE_ID_NEO_2RJ45PRI	include/pci_ids.h	/^#define PCI_DEVICE_ID_NEO_2RJ45PRI /;"	d
PCI_DEVICE_ID_NETGEAR_GA620	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETGEAR_GA620	/;"	d
PCI_DEVICE_ID_NETMOS_9705	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9705	/;"	d
PCI_DEVICE_ID_NETMOS_9715	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9715	/;"	d
PCI_DEVICE_ID_NETMOS_9735	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9735	/;"	d
PCI_DEVICE_ID_NETMOS_9745	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9745	/;"	d
PCI_DEVICE_ID_NETMOS_9755	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9755	/;"	d
PCI_DEVICE_ID_NETMOS_9805	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9805	/;"	d
PCI_DEVICE_ID_NETMOS_9815	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9815	/;"	d
PCI_DEVICE_ID_NETMOS_9835	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9835	/;"	d
PCI_DEVICE_ID_NETMOS_9845	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9845	/;"	d
PCI_DEVICE_ID_NETMOS_9855	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9855	/;"	d
PCI_DEVICE_ID_NETMOS_9865	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9865	/;"	d
PCI_DEVICE_ID_NETMOS_9900	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9900	/;"	d
PCI_DEVICE_ID_NETMOS_9901	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9901	/;"	d
PCI_DEVICE_ID_NETMOS_9904	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9904	/;"	d
PCI_DEVICE_ID_NETMOS_9912	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9912	/;"	d
PCI_DEVICE_ID_NETMOS_9922	include/pci_ids.h	/^#define PCI_DEVICE_ID_NETMOS_9922	/;"	d
PCI_DEVICE_ID_NI_PCI23216	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI23216	/;"	d
PCI_DEVICE_ID_NI_PCI2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI2322	/;"	d
PCI_DEVICE_ID_NI_PCI2322I	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI2322I	/;"	d
PCI_DEVICE_ID_NI_PCI2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI2324	/;"	d
PCI_DEVICE_ID_NI_PCI2324I	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI2324I	/;"	d
PCI_DEVICE_ID_NI_PCI2328	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI2328	/;"	d
PCI_DEVICE_ID_NI_PCI8430_23216	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI8430_23216	/;"	d
PCI_DEVICE_ID_NI_PCI8430_2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI8430_2322	/;"	d
PCI_DEVICE_ID_NI_PCI8430_2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI8430_2324	/;"	d
PCI_DEVICE_ID_NI_PCI8430_2328	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI8430_2328	/;"	d
PCI_DEVICE_ID_NI_PCI8432_2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI8432_2322	/;"	d
PCI_DEVICE_ID_NI_PCI8432_2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PCI8432_2324	/;"	d
PCI_DEVICE_ID_NI_PXI8420_23216	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8420_23216	/;"	d
PCI_DEVICE_ID_NI_PXI8420_2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8420_2322	/;"	d
PCI_DEVICE_ID_NI_PXI8420_2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8420_2324	/;"	d
PCI_DEVICE_ID_NI_PXI8420_2328	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8420_2328	/;"	d
PCI_DEVICE_ID_NI_PXI8422_2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8422_2322	/;"	d
PCI_DEVICE_ID_NI_PXI8422_2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8422_2324	/;"	d
PCI_DEVICE_ID_NI_PXI8430_23216	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8430_23216	/;"	d
PCI_DEVICE_ID_NI_PXI8430_2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8430_2322	/;"	d
PCI_DEVICE_ID_NI_PXI8430_2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8430_2324	/;"	d
PCI_DEVICE_ID_NI_PXI8430_2328	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8430_2328	/;"	d
PCI_DEVICE_ID_NI_PXI8432_2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8432_2322	/;"	d
PCI_DEVICE_ID_NI_PXI8432_2324	include/pci_ids.h	/^#define PCI_DEVICE_ID_NI_PXI8432_2324	/;"	d
PCI_DEVICE_ID_NS_83815	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_83815	/;"	d
PCI_DEVICE_ID_NS_83820	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_83820	/;"	d
PCI_DEVICE_ID_NS_87410	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_87410	/;"	d
PCI_DEVICE_ID_NS_87415	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_87415	/;"	d
PCI_DEVICE_ID_NS_87560_LIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_87560_LIO	/;"	d
PCI_DEVICE_ID_NS_87560_USB	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_87560_USB	/;"	d
PCI_DEVICE_ID_NS_CS5535_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_CS5535_AUDIO	/;"	d
PCI_DEVICE_ID_NS_CS5535_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_CS5535_IDE	/;"	d
PCI_DEVICE_ID_NS_CS5535_ISA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_CS5535_ISA	/;"	d
PCI_DEVICE_ID_NS_CS5535_USB	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_CS5535_USB	/;"	d
PCI_DEVICE_ID_NS_GX_HOST_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_GX_HOST_BRIDGE /;"	d
PCI_DEVICE_ID_NS_GX_VIDEO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_GX_VIDEO	/;"	d
PCI_DEVICE_ID_NS_SATURN	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SATURN	/;"	d
PCI_DEVICE_ID_NS_SC1100_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SC1100_BRIDGE	/;"	d
PCI_DEVICE_ID_NS_SC1100_SMI	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SC1100_SMI	/;"	d
PCI_DEVICE_ID_NS_SC1100_XBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SC1100_XBUS	/;"	d
PCI_DEVICE_ID_NS_SCx200_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SCx200_AUDIO	/;"	d
PCI_DEVICE_ID_NS_SCx200_BRIDGE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SCx200_BRIDGE	/;"	d
PCI_DEVICE_ID_NS_SCx200_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SCx200_IDE	/;"	d
PCI_DEVICE_ID_NS_SCx200_SMI	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SCx200_SMI	/;"	d
PCI_DEVICE_ID_NS_SCx200_VIDEO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SCx200_VIDEO	/;"	d
PCI_DEVICE_ID_NS_SCx200_XBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NS_SCx200_XBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_CK804_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO	/;"	d
PCI_DEVICE_ID_NVIDIA_CK804_PCIE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_CK804_PCIE	/;"	d
PCI_DEVICE_ID_NVIDIA_CK8S_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_CK8S_AUDIO	/;"	d
PCI_DEVICE_ID_NVIDIA_CK8_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE3	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE3	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE3_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE3_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_410_GO_M16	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_410_GO_M16 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200_GO /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO_M32	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO_M32 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO_M64	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO_M64 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_448_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_448_GO /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_460_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460_GO /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_488_GO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_488_GO /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_4000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_4000 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420_8X	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420_8X /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440SE_8X	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440SE_8X /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_8X	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_8X /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_SE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_SE	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_460	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_460	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_MAC	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_MAC /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4200	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4400	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4400	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4600	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4600	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6200_TURBOCACHE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200_TURBOCACHE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6600	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6600_GT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600_GT	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6610_XL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6610_XL	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_GT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_GT /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_LE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_GT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_GT /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_LE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5100	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5100 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200SE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200SE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_1 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5500	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5500 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600SE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600SE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700LE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700VE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700VE /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900XT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900XT /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900ZT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900ZT /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5950_ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5950_ULTRA /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5100	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5100 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5200 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250_32	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250_32 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5300	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5300 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5600	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5600 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5650	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5650 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_1 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200	/;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200_1 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250_1 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800 /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX /;"	d
PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR	/;"	d
PCI_DEVICE_ID_NVIDIA_IGEFORCE2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_IGEFORCE2	/;"	d
PCI_DEVICE_ID_NVIDIA_ITNT2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_ITNT2	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP1_MODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP1_MODEM	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP2S_MODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP2S_MODEM	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP2_MODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP2_MODEM	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP3_MODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP3_MODEM	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V0	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V0	/;"	d
PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V4	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V4	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE2	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3S	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3S	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2 /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3 /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS /;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA	/;"	d
PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS	/;"	d
PCI_DEVICE_ID_NVIDIA_NVENET_15	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_NVENET_15 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_200	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_200	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_280_NVS	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_280_NVS /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_380_XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_380_XGL /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_500XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500XGL	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_580_XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_580_XGL /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_700_GOGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700_GOGL /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_780_XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_780_XGL /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO4_980_XGL	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO4_980_XGL /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_DDC	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1000 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_2000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_2000 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_3000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_3000 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_4000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_4000 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_500	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_500 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_540	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_540	/;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_700	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_700 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO700	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO700 /;"	d
PCI_DEVICE_ID_NVIDIA_QUADRO_NVS_280_PCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_QUADRO_NVS_280_PCI /;"	d
PCI_DEVICE_ID_NVIDIA_SGS_RIVA128	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 /;"	d
PCI_DEVICE_ID_NVIDIA_TNT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_TNT	/;"	d
PCI_DEVICE_ID_NVIDIA_TNT2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_TNT2	/;"	d
PCI_DEVICE_ID_NVIDIA_TNT_UNKNOWN	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_TNT_UNKNOWN /;"	d
PCI_DEVICE_ID_NVIDIA_UTNT2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_UTNT2	/;"	d
PCI_DEVICE_ID_NVIDIA_UVTNT2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_UVTNT2	/;"	d
PCI_DEVICE_ID_NVIDIA_VTNT2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NVIDIA_VTNT2	/;"	d
PCI_DEVICE_ID_NX2031_10GCX4	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_10GCX4	/;"	d
PCI_DEVICE_ID_NX2031_10GXSR	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_10GXSR	/;"	d
PCI_DEVICE_ID_NX2031_4GCU	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_4GCU	/;"	d
PCI_DEVICE_ID_NX2031_HMEZ	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_HMEZ	/;"	d
PCI_DEVICE_ID_NX2031_IMEZ	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_IMEZ	/;"	d
PCI_DEVICE_ID_NX2031_XG_MGMT	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_XG_MGMT	/;"	d
PCI_DEVICE_ID_NX2031_XG_MGMT2	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2031_XG_MGMT2	/;"	d
PCI_DEVICE_ID_NX2_5706	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_5706	/;"	d
PCI_DEVICE_ID_NX2_5706S	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_5706S	/;"	d
PCI_DEVICE_ID_NX2_5708	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_5708	/;"	d
PCI_DEVICE_ID_NX2_5708S	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_5708S	/;"	d
PCI_DEVICE_ID_NX2_5709	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_5709	/;"	d
PCI_DEVICE_ID_NX2_5709S	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_5709S	/;"	d
PCI_DEVICE_ID_NX2_57710	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57710	/;"	d
PCI_DEVICE_ID_NX2_57711	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57711	/;"	d
PCI_DEVICE_ID_NX2_57711E	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57711E	/;"	d
PCI_DEVICE_ID_NX2_57712	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57712	/;"	d
PCI_DEVICE_ID_NX2_57712E	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57712E	/;"	d
PCI_DEVICE_ID_NX2_57712_MF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57712_MF	/;"	d
PCI_DEVICE_ID_NX2_57712_VF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57712_VF	/;"	d
PCI_DEVICE_ID_NX2_57800	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57800	/;"	d
PCI_DEVICE_ID_NX2_57800_MF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57800_MF	/;"	d
PCI_DEVICE_ID_NX2_57800_VF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57800_VF	/;"	d
PCI_DEVICE_ID_NX2_57810	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57810	/;"	d
PCI_DEVICE_ID_NX2_57810_MF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57810_MF	/;"	d
PCI_DEVICE_ID_NX2_57810_VF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57810_VF	/;"	d
PCI_DEVICE_ID_NX2_57840	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57840	/;"	d
PCI_DEVICE_ID_NX2_57840_2_20	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57840_2_20	/;"	d
PCI_DEVICE_ID_NX2_57840_4_10	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57840_4_10	/;"	d
PCI_DEVICE_ID_NX2_57840_MF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57840_MF	/;"	d
PCI_DEVICE_ID_NX2_57840_VF	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX2_57840_VF	/;"	d
PCI_DEVICE_ID_NX3031	include/pci_ids.h	/^#define PCI_DEVICE_ID_NX3031	/;"	d
PCI_DEVICE_ID_O2_6729	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_6729	/;"	d
PCI_DEVICE_ID_O2_6730	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_6730	/;"	d
PCI_DEVICE_ID_O2_6812	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_6812	/;"	d
PCI_DEVICE_ID_O2_6832	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_6832	/;"	d
PCI_DEVICE_ID_O2_6836	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_6836	/;"	d
PCI_DEVICE_ID_O2_6933	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_6933	/;"	d
PCI_DEVICE_ID_O2_8120	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_8120	/;"	d
PCI_DEVICE_ID_O2_8220	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_8220	/;"	d
PCI_DEVICE_ID_O2_8221	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_8221	/;"	d
PCI_DEVICE_ID_O2_8320	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_8320	/;"	d
PCI_DEVICE_ID_O2_8321	include/pci_ids.h	/^#define PCI_DEVICE_ID_O2_8321	/;"	d
PCI_DEVICE_ID_OLICOM_OC2183	include/pci_ids.h	/^#define PCI_DEVICE_ID_OLICOM_OC2183	/;"	d
PCI_DEVICE_ID_OLICOM_OC2325	include/pci_ids.h	/^#define PCI_DEVICE_ID_OLICOM_OC2325	/;"	d
PCI_DEVICE_ID_OLICOM_OC2326	include/pci_ids.h	/^#define PCI_DEVICE_ID_OLICOM_OC2326	/;"	d
PCI_DEVICE_ID_OPTI_82C558	include/pci_ids.h	/^#define PCI_DEVICE_ID_OPTI_82C558	/;"	d
PCI_DEVICE_ID_OPTI_82C621	include/pci_ids.h	/^#define PCI_DEVICE_ID_OPTI_82C621	/;"	d
PCI_DEVICE_ID_OPTI_82C700	include/pci_ids.h	/^#define PCI_DEVICE_ID_OPTI_82C700	/;"	d
PCI_DEVICE_ID_OPTI_82C825	include/pci_ids.h	/^#define PCI_DEVICE_ID_OPTI_82C825	/;"	d
PCI_DEVICE_ID_OXSEMI_12PCI840	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_12PCI840	/;"	d
PCI_DEVICE_ID_OXSEMI_16PCI952	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_16PCI952	/;"	d
PCI_DEVICE_ID_OXSEMI_16PCI952PP	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_16PCI952PP	/;"	d
PCI_DEVICE_ID_OXSEMI_16PCI954	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_16PCI954	/;"	d
PCI_DEVICE_ID_OXSEMI_16PCI954PP	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_16PCI954PP	/;"	d
PCI_DEVICE_ID_OXSEMI_16PCI95N	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_16PCI95N	/;"	d
PCI_DEVICE_ID_OXSEMI_C950	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_C950	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe840	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe840	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe840_G	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe840_G	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe952_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe952_0	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe952_0_G	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe952_0_G	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe952_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe952_1	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe952_1_G	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_G	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU	/;"	d
PCI_DEVICE_ID_OXSEMI_PCIe952_1_U	include/pci_ids.h	/^#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_U	/;"	d
PCI_DEVICE_ID_P1011	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1011	/;"	d
PCI_DEVICE_ID_P1011E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1011E	/;"	d
PCI_DEVICE_ID_P1013	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1013	/;"	d
PCI_DEVICE_ID_P1013E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1013E	/;"	d
PCI_DEVICE_ID_P1020	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1020	/;"	d
PCI_DEVICE_ID_P1020E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1020E	/;"	d
PCI_DEVICE_ID_P1021	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1021	/;"	d
PCI_DEVICE_ID_P1021E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1021E	/;"	d
PCI_DEVICE_ID_P1022	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1022	/;"	d
PCI_DEVICE_ID_P1022E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P1022E	/;"	d
PCI_DEVICE_ID_P2010	include/pci_ids.h	/^#define PCI_DEVICE_ID_P2010	/;"	d
PCI_DEVICE_ID_P2010E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P2010E	/;"	d
PCI_DEVICE_ID_P2020	include/pci_ids.h	/^#define PCI_DEVICE_ID_P2020	/;"	d
PCI_DEVICE_ID_P2020E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P2020E	/;"	d
PCI_DEVICE_ID_P2040	include/pci_ids.h	/^#define PCI_DEVICE_ID_P2040	/;"	d
PCI_DEVICE_ID_P2040E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P2040E	/;"	d
PCI_DEVICE_ID_P3041	include/pci_ids.h	/^#define PCI_DEVICE_ID_P3041	/;"	d
PCI_DEVICE_ID_P3041E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P3041E	/;"	d
PCI_DEVICE_ID_P4040	include/pci_ids.h	/^#define PCI_DEVICE_ID_P4040	/;"	d
PCI_DEVICE_ID_P4040E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P4040E	/;"	d
PCI_DEVICE_ID_P4080	include/pci_ids.h	/^#define PCI_DEVICE_ID_P4080	/;"	d
PCI_DEVICE_ID_P4080E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P4080E	/;"	d
PCI_DEVICE_ID_P5010	include/pci_ids.h	/^#define PCI_DEVICE_ID_P5010	/;"	d
PCI_DEVICE_ID_P5010E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P5010E	/;"	d
PCI_DEVICE_ID_P5020	include/pci_ids.h	/^#define PCI_DEVICE_ID_P5020	/;"	d
PCI_DEVICE_ID_P5020E	include/pci_ids.h	/^#define PCI_DEVICE_ID_P5020E	/;"	d
PCI_DEVICE_ID_PANACOM_DUALMODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_PANACOM_DUALMODEM	/;"	d
PCI_DEVICE_ID_PANACOM_QUADMODEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_PANACOM_QUADMODEM	/;"	d
PCI_DEVICE_ID_PATI	board/mpl/pati/pati.h	/^#define PCI_DEVICE_ID_PATI	/;"	d
PCI_DEVICE_ID_PC300_RX_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_PC300_RX_1	/;"	d
PCI_DEVICE_ID_PC300_RX_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_PC300_RX_2	/;"	d
PCI_DEVICE_ID_PC300_TE_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_PC300_TE_1	/;"	d
PCI_DEVICE_ID_PC300_TE_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_PC300_TE_2	/;"	d
PCI_DEVICE_ID_PC300_TE_M_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_PC300_TE_M_1	/;"	d
PCI_DEVICE_ID_PC300_TE_M_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_PC300_TE_M_2	/;"	d
PCI_DEVICE_ID_PCTECH_RZ1000	include/pci_ids.h	/^#define PCI_DEVICE_ID_PCTECH_RZ1000	/;"	d
PCI_DEVICE_ID_PCTECH_RZ1001	include/pci_ids.h	/^#define PCI_DEVICE_ID_PCTECH_RZ1001	/;"	d
PCI_DEVICE_ID_PCTECH_SAMURAI_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE /;"	d
PCI_DEVICE_ID_PHILIPS_SAA7146	include/pci_ids.h	/^#define PCI_DEVICE_ID_PHILIPS_SAA7146	/;"	d
PCI_DEVICE_ID_PHILIPS_SAA9730	include/pci_ids.h	/^#define PCI_DEVICE_ID_PHILIPS_SAA9730	/;"	d
PCI_DEVICE_ID_PICOPOWER_PT86C523	include/pci_ids.h	/^#define PCI_DEVICE_ID_PICOPOWER_PT86C523	/;"	d
PCI_DEVICE_ID_PICOPOWER_PT86C523BBP	include/pci_ids.h	/^#define PCI_DEVICE_ID_PICOPOWER_PT86C523BBP	/;"	d
PCI_DEVICE_ID_PLX9056	board/mpl/pati/plx9056.h	/^#define PCI_DEVICE_ID_PLX9056	/;"	d
PCI_DEVICE_ID_PLX_1077	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_1077	/;"	d
PCI_DEVICE_ID_PLX_9030	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_9030 /;"	d
PCI_DEVICE_ID_PLX_9050	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_9050	/;"	d
PCI_DEVICE_ID_PLX_9056	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_9056	/;"	d
PCI_DEVICE_ID_PLX_9080	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_9080	/;"	d
PCI_DEVICE_ID_PLX_DJINN_ITOO	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_DJINN_ITOO	/;"	d
PCI_DEVICE_ID_PLX_GTEK_SERIAL2	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2	/;"	d
PCI_DEVICE_ID_PLX_OLITEC	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_OLITEC	/;"	d
PCI_DEVICE_ID_PLX_PCI200SYN	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_PCI200SYN	/;"	d
PCI_DEVICE_ID_PLX_R685	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_R685	/;"	d
PCI_DEVICE_ID_PLX_R753	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_R753	/;"	d
PCI_DEVICE_ID_PLX_ROMULUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_ROMULUS	/;"	d
PCI_DEVICE_ID_PLX_SPCOM200	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_SPCOM200	/;"	d
PCI_DEVICE_ID_PLX_SPCOM800	include/pci_ids.h	/^#define PCI_DEVICE_ID_PLX_SPCOM800	/;"	d
PCI_DEVICE_ID_PROMISE_20246	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20246	/;"	d
PCI_DEVICE_ID_PROMISE_20262	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20262	/;"	d
PCI_DEVICE_ID_PROMISE_20263	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20263	/;"	d
PCI_DEVICE_ID_PROMISE_20265	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20265	/;"	d
PCI_DEVICE_ID_PROMISE_20267	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20267	/;"	d
PCI_DEVICE_ID_PROMISE_20268	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20268	/;"	d
PCI_DEVICE_ID_PROMISE_20269	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20269	/;"	d
PCI_DEVICE_ID_PROMISE_20270	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20270	/;"	d
PCI_DEVICE_ID_PROMISE_20271	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20271	/;"	d
PCI_DEVICE_ID_PROMISE_20275	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20275	/;"	d
PCI_DEVICE_ID_PROMISE_20276	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20276	/;"	d
PCI_DEVICE_ID_PROMISE_20277	include/pci_ids.h	/^#define PCI_DEVICE_ID_PROMISE_20277	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP10160	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP10160	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP1020	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP1020	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP1080	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP1080	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP12160	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP12160	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP1240	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP1240	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP1280	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP1280	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2100	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2200	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2300	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2300	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2312	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2312	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2322	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2322	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2422	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2422	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2432	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2432	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2512	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2512	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP2522	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP2522	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP5422	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP5422	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP5432	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP5432	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP6312	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP6312	/;"	d
PCI_DEVICE_ID_QLOGIC_ISP6322	include/pci_ids.h	/^#define PCI_DEVICE_ID_QLOGIC_ISP6322	/;"	d
PCI_DEVICE_ID_QUADRO_FX_1400	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUADRO_FX_1400 /;"	d
PCI_DEVICE_ID_QUADRO_FX_GO1400	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUADRO_FX_GO1400 /;"	d
PCI_DEVICE_ID_QUATECH_DSC100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSC100	/;"	d
PCI_DEVICE_ID_QUATECH_DSC100E	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSC100E	/;"	d
PCI_DEVICE_ID_QUATECH_DSC200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSC200	/;"	d
PCI_DEVICE_ID_QUATECH_DSC200E	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSC200E	/;"	d
PCI_DEVICE_ID_QUATECH_DSCLP100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSCLP100	/;"	d
PCI_DEVICE_ID_QUATECH_DSCLP200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSCLP200	/;"	d
PCI_DEVICE_ID_QUATECH_DSCP100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSCP100	/;"	d
PCI_DEVICE_ID_QUATECH_DSCP200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_DSCP200	/;"	d
PCI_DEVICE_ID_QUATECH_ESC100D	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_ESC100D	/;"	d
PCI_DEVICE_ID_QUATECH_ESC100M	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_ESC100M	/;"	d
PCI_DEVICE_ID_QUATECH_ESCLP100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_ESCLP100	/;"	d
PCI_DEVICE_ID_QUATECH_QSC100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_QSC100	/;"	d
PCI_DEVICE_ID_QUATECH_QSC200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_QSC200	/;"	d
PCI_DEVICE_ID_QUATECH_QSCLP100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_QSCLP100	/;"	d
PCI_DEVICE_ID_QUATECH_QSCLP200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_QSCLP200	/;"	d
PCI_DEVICE_ID_QUATECH_QSCP100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_QSCP100	/;"	d
PCI_DEVICE_ID_QUATECH_QSCP200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_QSCP200	/;"	d
PCI_DEVICE_ID_QUATECH_SPPXP_100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_SPPXP_100 /;"	d
PCI_DEVICE_ID_QUATECH_SSCLP100	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_SSCLP100	/;"	d
PCI_DEVICE_ID_QUATECH_SSCLP200	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUATECH_SSCLP200	/;"	d
PCI_DEVICE_ID_QUICKNET_XJ	include/pci_ids.h	/^#define PCI_DEVICE_ID_QUICKNET_XJ	/;"	d
PCI_DEVICE_ID_RASTEL_2PORT	include/pci_ids.h	/^#define PCI_DEVICE_ID_RASTEL_2PORT	/;"	d
PCI_DEVICE_ID_RD890_IOMMU	include/pci_ids.h	/^#define PCI_DEVICE_ID_RD890_IOMMU	/;"	d
PCI_DEVICE_ID_RDC_D1010	include/pci_ids.h	/^#define PCI_DEVICE_ID_RDC_D1010	/;"	d
PCI_DEVICE_ID_RDC_R6020	include/pci_ids.h	/^#define PCI_DEVICE_ID_RDC_R6020	/;"	d
PCI_DEVICE_ID_RDC_R6030	include/pci_ids.h	/^#define PCI_DEVICE_ID_RDC_R6030	/;"	d
PCI_DEVICE_ID_RDC_R6040	include/pci_ids.h	/^#define PCI_DEVICE_ID_RDC_R6040	/;"	d
PCI_DEVICE_ID_RDC_R6060	include/pci_ids.h	/^#define PCI_DEVICE_ID_RDC_R6060	/;"	d
PCI_DEVICE_ID_RDC_R6061	include/pci_ids.h	/^#define PCI_DEVICE_ID_RDC_R6061	/;"	d
PCI_DEVICE_ID_REALTEK_8139	include/pci_ids.h	/^#define PCI_DEVICE_ID_REALTEK_8139	/;"	d
PCI_DEVICE_ID_REALTEK_8168	include/pci_ids.h	/^#define PCI_DEVICE_ID_REALTEK_8168	/;"	d
PCI_DEVICE_ID_RENESAS_SH7763	include/pci_ids.h	/^#define PCI_DEVICE_ID_RENESAS_SH7763	/;"	d
PCI_DEVICE_ID_RENESAS_SH7780	include/pci_ids.h	/^#define PCI_DEVICE_ID_RENESAS_SH7780	/;"	d
PCI_DEVICE_ID_RENESAS_SH7781	include/pci_ids.h	/^#define PCI_DEVICE_ID_RENESAS_SH7781	/;"	d
PCI_DEVICE_ID_RENESAS_SH7785	include/pci_ids.h	/^#define PCI_DEVICE_ID_RENESAS_SH7785	/;"	d
PCI_DEVICE_ID_RENESAS_SH7786	include/pci_ids.h	/^#define PCI_DEVICE_ID_RENESAS_SH7786	/;"	d
PCI_DEVICE_ID_REVOLUTION	include/pci_ids.h	/^#define PCI_DEVICE_ID_REVOLUTION	/;"	d
PCI_DEVICE_ID_RICOH_R5C822	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_R5C822	/;"	d
PCI_DEVICE_ID_RICOH_R5C832	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_R5C832	/;"	d
PCI_DEVICE_ID_RICOH_R5C843	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_R5C843	/;"	d
PCI_DEVICE_ID_RICOH_R5CE822	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_R5CE822	/;"	d
PCI_DEVICE_ID_RICOH_R5CE823	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_R5CE823	/;"	d
PCI_DEVICE_ID_RICOH_RL5C465	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_RL5C465	/;"	d
PCI_DEVICE_ID_RICOH_RL5C466	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_RL5C466	/;"	d
PCI_DEVICE_ID_RICOH_RL5C475	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_RL5C475	/;"	d
PCI_DEVICE_ID_RICOH_RL5C476	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_RL5C476	/;"	d
PCI_DEVICE_ID_RICOH_RL5C478	include/pci_ids.h	/^#define PCI_DEVICE_ID_RICOH_RL5C478	/;"	d
PCI_DEVICE_ID_RME_DIGI32	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI32	/;"	d
PCI_DEVICE_ID_RME_DIGI32_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI32_8	/;"	d
PCI_DEVICE_ID_RME_DIGI32_PRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI32_PRO	/;"	d
PCI_DEVICE_ID_RME_DIGI96	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI96	/;"	d
PCI_DEVICE_ID_RME_DIGI96_8	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI96_8	/;"	d
PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST /;"	d
PCI_DEVICE_ID_RME_DIGI96_8_PRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_RME_DIGI96_8_PRO	/;"	d
PCI_DEVICE_ID_RP16INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP16INTF	/;"	d
PCI_DEVICE_ID_RP16SNI	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP16SNI	/;"	d
PCI_DEVICE_ID_RP2_232	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP2_232	/;"	d
PCI_DEVICE_ID_RP2_422	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP2_422	/;"	d
PCI_DEVICE_ID_RP32INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP32INTF	/;"	d
PCI_DEVICE_ID_RP4J	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP4J	/;"	d
PCI_DEVICE_ID_RP4M	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP4M	/;"	d
PCI_DEVICE_ID_RP4QUAD	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP4QUAD	/;"	d
PCI_DEVICE_ID_RP8INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP8INTF	/;"	d
PCI_DEVICE_ID_RP8J	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP8J	/;"	d
PCI_DEVICE_ID_RP8OCTA	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP8OCTA	/;"	d
PCI_DEVICE_ID_RP8SNI	include/pci_ids.h	/^#define PCI_DEVICE_ID_RP8SNI	/;"	d
PCI_DEVICE_ID_RPP4	include/pci_ids.h	/^#define PCI_DEVICE_ID_RPP4	/;"	d
PCI_DEVICE_ID_RPP8	include/pci_ids.h	/^#define PCI_DEVICE_ID_RPP8	/;"	d
PCI_DEVICE_ID_S2IO_UNI	include/pci_ids.h	/^#define	PCI_DEVICE_ID_S2IO_UNI	/;"	d
PCI_DEVICE_ID_S2IO_WIN	include/pci_ids.h	/^#define	PCI_DEVICE_ID_S2IO_WIN	/;"	d
PCI_DEVICE_ID_S3_868	include/pci_ids.h	/^#define PCI_DEVICE_ID_S3_868	/;"	d
PCI_DEVICE_ID_S3_968	include/pci_ids.h	/^#define PCI_DEVICE_ID_S3_968	/;"	d
PCI_DEVICE_ID_S3_PROSAVAGE8	include/pci_ids.h	/^#define PCI_DEVICE_ID_S3_PROSAVAGE8	/;"	d
PCI_DEVICE_ID_S3_SAVAGE4	include/pci_ids.h	/^#define PCI_DEVICE_ID_S3_SAVAGE4	/;"	d
PCI_DEVICE_ID_S3_SONICVIBES	include/pci_ids.h	/^#define PCI_DEVICE_ID_S3_SONICVIBES	/;"	d
PCI_DEVICE_ID_S3_TRIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_S3_TRIO	/;"	d
PCI_DEVICE_ID_SATSAGEM_NICCY	include/pci_ids.h	/^#define PCI_DEVICE_ID_SATSAGEM_NICCY	/;"	d
PCI_DEVICE_ID_SBE_WANXL100	include/pci_ids.h	/^#define PCI_DEVICE_ID_SBE_WANXL100	/;"	d
PCI_DEVICE_ID_SBE_WANXL200	include/pci_ids.h	/^#define PCI_DEVICE_ID_SBE_WANXL200	/;"	d
PCI_DEVICE_ID_SBE_WANXL400	include/pci_ids.h	/^#define PCI_DEVICE_ID_SBE_WANXL400	/;"	d
PCI_DEVICE_ID_SCALEMP_VSMP_CTL	include/pci_ids.h	/^#define PCI_DEVICE_ID_SCALEMP_VSMP_CTL	/;"	d
PCI_DEVICE_ID_SEALEVEL_7803	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_7803	/;"	d
PCI_DEVICE_ID_SEALEVEL_COMM4	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_COMM4	/;"	d
PCI_DEVICE_ID_SEALEVEL_COMM8	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_COMM8	/;"	d
PCI_DEVICE_ID_SEALEVEL_U530	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_U530	/;"	d
PCI_DEVICE_ID_SEALEVEL_UCOMM2	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_UCOMM2	/;"	d
PCI_DEVICE_ID_SEALEVEL_UCOMM232	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_UCOMM232	/;"	d
PCI_DEVICE_ID_SEALEVEL_UCOMM422	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_UCOMM422	/;"	d
PCI_DEVICE_ID_SEALEVEL_UCOMM8	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEALEVEL_UCOMM8	/;"	d
PCI_DEVICE_ID_SEGA_BBA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SEGA_BBA	/;"	d
PCI_DEVICE_ID_SERVERWORKS_CSB5	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_CSB5	/;"	d
PCI_DEVICE_ID_SERVERWORKS_CSB5IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE /;"	d
PCI_DEVICE_ID_SERVERWORKS_CSB6	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_CSB6 /;"	d
PCI_DEVICE_ID_SERVERWORKS_CSB6IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE /;"	d
PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 /;"	d
PCI_DEVICE_ID_SERVERWORKS_CSB6LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC /;"	d
PCI_DEVICE_ID_SERVERWORKS_EPB	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_EPB	/;"	d
PCI_DEVICE_ID_SERVERWORKS_GCNB_LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE /;"	d
PCI_DEVICE_ID_SERVERWORKS_HE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_HE	/;"	d
PCI_DEVICE_ID_SERVERWORKS_HT1000IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE /;"	d
PCI_DEVICE_ID_SERVERWORKS_HT1000SB	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_HT1000SB /;"	d
PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB	/;"	d
PCI_DEVICE_ID_SERVERWORKS_HT1100LD	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_HT1100LD /;"	d
PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE	/;"	d
PCI_DEVICE_ID_SERVERWORKS_LE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_LE	/;"	d
PCI_DEVICE_ID_SERVERWORKS_OSB4	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_OSB4	/;"	d
PCI_DEVICE_ID_SERVERWORKS_OSB4IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE /;"	d
PCI_DEVICE_ID_SGI_IOC3	include/pci_ids.h	/^#define PCI_DEVICE_ID_SGI_IOC3	/;"	d
PCI_DEVICE_ID_SGI_IOC4	include/pci_ids.h	/^#define PCI_DEVICE_ID_SGI_IOC4	/;"	d
PCI_DEVICE_ID_SGI_LITHIUM	include/pci_ids.h	/^#define PCI_DEVICE_ID_SGI_LITHIUM	/;"	d
PCI_DEVICE_ID_SIEMENS_DSCC4	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIEMENS_DSCC4 /;"	d
PCI_DEVICE_ID_SIIG_1P_10x	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1P_10x	/;"	d
PCI_DEVICE_ID_SIIG_1P_20x	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1P_20x	/;"	d
PCI_DEVICE_ID_SIIG_1S1P_10x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S1P_10x_550	/;"	d
PCI_DEVICE_ID_SIIG_1S1P_10x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S1P_10x_650	/;"	d
PCI_DEVICE_ID_SIIG_1S1P_10x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S1P_10x_850	/;"	d
PCI_DEVICE_ID_SIIG_1S1P_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S1P_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_1S1P_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S1P_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_1S1P_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S1P_20x_850	/;"	d
PCI_DEVICE_ID_SIIG_1S_10x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S_10x_550	/;"	d
PCI_DEVICE_ID_SIIG_1S_10x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S_10x_650	/;"	d
PCI_DEVICE_ID_SIIG_1S_10x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S_10x_850	/;"	d
PCI_DEVICE_ID_SIIG_1S_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_1S_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_1S_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_1S_20x_850	/;"	d
PCI_DEVICE_ID_SIIG_2P1S_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2P1S_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_2P1S_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2P1S_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_2P1S_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2P1S_20x_850	/;"	d
PCI_DEVICE_ID_SIIG_2P_10x	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2P_10x	/;"	d
PCI_DEVICE_ID_SIIG_2P_20x	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2P_20x	/;"	d
PCI_DEVICE_ID_SIIG_2S1P_10x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S1P_10x_550	/;"	d
PCI_DEVICE_ID_SIIG_2S1P_10x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S1P_10x_650	/;"	d
PCI_DEVICE_ID_SIIG_2S1P_10x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S1P_10x_850	/;"	d
PCI_DEVICE_ID_SIIG_2S1P_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S1P_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_2S1P_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S1P_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_2S1P_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S1P_20x_850	/;"	d
PCI_DEVICE_ID_SIIG_2S_10x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S_10x_550	/;"	d
PCI_DEVICE_ID_SIIG_2S_10x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S_10x_650	/;"	d
PCI_DEVICE_ID_SIIG_2S_10x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S_10x_850	/;"	d
PCI_DEVICE_ID_SIIG_2S_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_2S_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_2S_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_2S_20x_850	/;"	d
PCI_DEVICE_ID_SIIG_4S_10x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_4S_10x_550	/;"	d
PCI_DEVICE_ID_SIIG_4S_10x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_4S_10x_650	/;"	d
PCI_DEVICE_ID_SIIG_4S_10x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_4S_10x_850	/;"	d
PCI_DEVICE_ID_SIIG_4S_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_4S_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_4S_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_4S_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_4S_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_4S_20x_850	/;"	d
PCI_DEVICE_ID_SIIG_8S_20x_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_8S_20x_550	/;"	d
PCI_DEVICE_ID_SIIG_8S_20x_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_8S_20x_650	/;"	d
PCI_DEVICE_ID_SIIG_8S_20x_850	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIIG_8S_20x_850	/;"	d
PCI_DEVICE_ID_SII_1210SA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SII_1210SA	/;"	d
PCI_DEVICE_ID_SII_3112	include/pci_ids.h	/^#define PCI_DEVICE_ID_SII_3112	/;"	d
PCI_DEVICE_ID_SII_680	include/pci_ids.h	/^#define PCI_DEVICE_ID_SII_680	/;"	d
PCI_DEVICE_ID_SIL3124	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIL3124	/;"	d
PCI_DEVICE_ID_SIL3131	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIL3131	/;"	d
PCI_DEVICE_ID_SIL3132	include/pci_ids.h	/^#define PCI_DEVICE_ID_SIL3132	/;"	d
PCI_DEVICE_ID_SITECOM_DC105V2	include/pci_ids.h	/^#define PCI_DEVICE_ID_SITECOM_DC105V2	/;"	d
PCI_DEVICE_ID_SI_1180	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_1180	/;"	d
PCI_DEVICE_ID_SI_300	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_300	/;"	d
PCI_DEVICE_ID_SI_315	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_315	/;"	d
PCI_DEVICE_ID_SI_315H	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_315H	/;"	d
PCI_DEVICE_ID_SI_315PRO	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_315PRO	/;"	d
PCI_DEVICE_ID_SI_496	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_496	/;"	d
PCI_DEVICE_ID_SI_501	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_501	/;"	d
PCI_DEVICE_ID_SI_503	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_503	/;"	d
PCI_DEVICE_ID_SI_530	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_530	/;"	d
PCI_DEVICE_ID_SI_540	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_540	/;"	d
PCI_DEVICE_ID_SI_540_VGA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_540_VGA	/;"	d
PCI_DEVICE_ID_SI_550	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_550	/;"	d
PCI_DEVICE_ID_SI_550_VGA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_550_VGA	/;"	d
PCI_DEVICE_ID_SI_5511	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5511	/;"	d
PCI_DEVICE_ID_SI_5513	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5513	/;"	d
PCI_DEVICE_ID_SI_5517	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5517	/;"	d
PCI_DEVICE_ID_SI_5518	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5518	/;"	d
PCI_DEVICE_ID_SI_5571	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5571	/;"	d
PCI_DEVICE_ID_SI_5581	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5581	/;"	d
PCI_DEVICE_ID_SI_5582	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5582	/;"	d
PCI_DEVICE_ID_SI_5591	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5591	/;"	d
PCI_DEVICE_ID_SI_5591_AGP	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5591_AGP	/;"	d
PCI_DEVICE_ID_SI_5596	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5596	/;"	d
PCI_DEVICE_ID_SI_5597	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5597	/;"	d
PCI_DEVICE_ID_SI_5597_VGA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5597_VGA	/;"	d
PCI_DEVICE_ID_SI_5598	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5598	/;"	d
PCI_DEVICE_ID_SI_5600	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_5600	/;"	d
PCI_DEVICE_ID_SI_620	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_620	/;"	d
PCI_DEVICE_ID_SI_6202	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_6202	/;"	d
PCI_DEVICE_ID_SI_6205	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_6205	/;"	d
PCI_DEVICE_ID_SI_630	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_630	/;"	d
PCI_DEVICE_ID_SI_630_VGA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_630_VGA	/;"	d
PCI_DEVICE_ID_SI_633	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_633	/;"	d
PCI_DEVICE_ID_SI_635	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_635	/;"	d
PCI_DEVICE_ID_SI_640	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_640	/;"	d
PCI_DEVICE_ID_SI_645	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_645	/;"	d
PCI_DEVICE_ID_SI_646	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_646	/;"	d
PCI_DEVICE_ID_SI_648	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_648	/;"	d
PCI_DEVICE_ID_SI_650	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_650	/;"	d
PCI_DEVICE_ID_SI_651	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_651	/;"	d
PCI_DEVICE_ID_SI_655	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_655	/;"	d
PCI_DEVICE_ID_SI_661	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_661	/;"	d
PCI_DEVICE_ID_SI_7012	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_7012	/;"	d
PCI_DEVICE_ID_SI_7013	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_7013	/;"	d
PCI_DEVICE_ID_SI_7016	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_7016	/;"	d
PCI_DEVICE_ID_SI_7018	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_7018	/;"	d
PCI_DEVICE_ID_SI_730	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_730	/;"	d
PCI_DEVICE_ID_SI_733	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_733	/;"	d
PCI_DEVICE_ID_SI_735	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_735	/;"	d
PCI_DEVICE_ID_SI_740	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_740	/;"	d
PCI_DEVICE_ID_SI_741	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_741	/;"	d
PCI_DEVICE_ID_SI_745	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_745	/;"	d
PCI_DEVICE_ID_SI_746	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_746	/;"	d
PCI_DEVICE_ID_SI_755	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_755	/;"	d
PCI_DEVICE_ID_SI_760	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_760	/;"	d
PCI_DEVICE_ID_SI_900	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_900	/;"	d
PCI_DEVICE_ID_SI_961	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_961	/;"	d
PCI_DEVICE_ID_SI_962	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_962	/;"	d
PCI_DEVICE_ID_SI_963	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_963	/;"	d
PCI_DEVICE_ID_SI_965	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_965	/;"	d
PCI_DEVICE_ID_SI_966	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_966	/;"	d
PCI_DEVICE_ID_SI_968	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_968	/;"	d
PCI_DEVICE_ID_SI_ACPI	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_ACPI	/;"	d
PCI_DEVICE_ID_SI_LPC	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_LPC	/;"	d
PCI_DEVICE_ID_SI_SMBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_SI_SMBUS	/;"	d
PCI_DEVICE_ID_SMI_501	include/pci_ids.h	/^#define PCI_DEVICE_ID_SMI_501	/;"	d
PCI_DEVICE_ID_SMI_710	include/pci_ids.h	/^#define PCI_DEVICE_ID_SMI_710	/;"	d
PCI_DEVICE_ID_SMI_712	include/pci_ids.h	/^#define PCI_DEVICE_ID_SMI_712	/;"	d
PCI_DEVICE_ID_SMI_810	include/pci_ids.h	/^#define PCI_DEVICE_ID_SMI_810	/;"	d
PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0	/;"	d
PCI_DEVICE_ID_SOLARFLARE_SFC4000A_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_SOLARFLARE_SFC4000A_1	/;"	d
PCI_DEVICE_ID_SOLARFLARE_SFC4000B	include/pci_ids.h	/^#define PCI_DEVICE_ID_SOLARFLARE_SFC4000B	/;"	d
PCI_DEVICE_ID_SP1011	include/pci_ids.h	/^#define PCI_DEVICE_ID_SP1011	/;"	d
PCI_DEVICE_ID_SPECIALIX_IO8	include/pci_ids.h	/^#define PCI_DEVICE_ID_SPECIALIX_IO8	/;"	d
PCI_DEVICE_ID_SPECIALIX_RIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_SPECIALIX_RIO	/;"	d
PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_DMA	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_DMA	/;"	d
PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_MSPS	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_MSPS /;"	d
PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_SRCS	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_SRCS /;"	d
PCI_DEVICE_ID_STMICRO_CAN	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_CAN	/;"	d
PCI_DEVICE_ID_STMICRO_DBP	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_DBP	/;"	d
PCI_DEVICE_ID_STMICRO_ESRAM	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_ESRAM	/;"	d
PCI_DEVICE_ID_STMICRO_GPIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_GPIO	/;"	d
PCI_DEVICE_ID_STMICRO_I2C	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_I2C	/;"	d
PCI_DEVICE_ID_STMICRO_MAC	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_MAC	/;"	d
PCI_DEVICE_ID_STMICRO_MLB	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_MLB	/;"	d
PCI_DEVICE_ID_STMICRO_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_SATA	/;"	d
PCI_DEVICE_ID_STMICRO_SATA_PHY	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_SATA_PHY	/;"	d
PCI_DEVICE_ID_STMICRO_SDIO	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_SDIO	/;"	d
PCI_DEVICE_ID_STMICRO_SDIO_EMMC	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_SDIO_EMMC /;"	d
PCI_DEVICE_ID_STMICRO_SOC_DMA	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_SOC_DMA	/;"	d
PCI_DEVICE_ID_STMICRO_SPI_HS	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_SPI_HS	/;"	d
PCI_DEVICE_ID_STMICRO_UART_HWFC	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_UART_HWFC /;"	d
PCI_DEVICE_ID_STMICRO_UART_NO_HWFC	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_UART_NO_HWFC	/;"	d
PCI_DEVICE_ID_STMICRO_USB_HOST	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_USB_HOST	/;"	d
PCI_DEVICE_ID_STMICRO_USB_OHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_USB_OHCI	/;"	d
PCI_DEVICE_ID_STMICRO_USB_OTG	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_USB_OTG	/;"	d
PCI_DEVICE_ID_STMICRO_VIC	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_VIC	/;"	d
PCI_DEVICE_ID_STMICRO_VIP	include/pci_ids.h	/^#define PCI_DEVICE_ID_STMICRO_VIP	/;"	d
PCI_DEVICE_ID_SUN_CASSINI	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_CASSINI	/;"	d
PCI_DEVICE_ID_SUN_EBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_EBUS	/;"	d
PCI_DEVICE_ID_SUN_GEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_GEM	/;"	d
PCI_DEVICE_ID_SUN_HAPPYMEAL	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_HAPPYMEAL	/;"	d
PCI_DEVICE_ID_SUN_HUMMINGBIRD	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_HUMMINGBIRD	/;"	d
PCI_DEVICE_ID_SUN_PBM	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_PBM	/;"	d
PCI_DEVICE_ID_SUN_RIO_1394	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_RIO_1394	/;"	d
PCI_DEVICE_ID_SUN_RIO_EBUS	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_RIO_EBUS	/;"	d
PCI_DEVICE_ID_SUN_RIO_GEM	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_RIO_GEM	/;"	d
PCI_DEVICE_ID_SUN_RIO_USB	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_RIO_USB	/;"	d
PCI_DEVICE_ID_SUN_SABRE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_SABRE	/;"	d
PCI_DEVICE_ID_SUN_SCHIZO	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_SCHIZO	/;"	d
PCI_DEVICE_ID_SUN_SIMBA	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_SIMBA	/;"	d
PCI_DEVICE_ID_SUN_TOMATILLO	include/pci_ids.h	/^#define PCI_DEVICE_ID_SUN_TOMATILLO	/;"	d
PCI_DEVICE_ID_SYBA_1P_ECP	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYBA_1P_ECP	/;"	d
PCI_DEVICE_ID_SYBA_2P_EPP	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYBA_2P_EPP	/;"	d
PCI_DEVICE_ID_SYSKONNECT_9DXX	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYSKONNECT_9DXX	/;"	d
PCI_DEVICE_ID_SYSKONNECT_9MXX	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYSKONNECT_9MXX	/;"	d
PCI_DEVICE_ID_SYSKONNECT_GE	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYSKONNECT_GE	/;"	d
PCI_DEVICE_ID_SYSKONNECT_TR	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYSKONNECT_TR	/;"	d
PCI_DEVICE_ID_SYSKONNECT_YU	include/pci_ids.h	/^#define PCI_DEVICE_ID_SYSKONNECT_YU	/;"	d
PCI_DEVICE_ID_TCONRAD_TOKENRING	include/pci_ids.h	/^#define PCI_DEVICE_ID_TCONRAD_TOKENRING	/;"	d
PCI_DEVICE_ID_TDI_EHCI	include/pci_ids.h	/^#define PCI_DEVICE_ID_TDI_EHCI /;"	d
PCI_DEVICE_ID_TEHUTI_3009	include/pci_ids.h	/^#define PCI_DEVICE_ID_TEHUTI_3009	/;"	d
PCI_DEVICE_ID_TEHUTI_3010	include/pci_ids.h	/^#define PCI_DEVICE_ID_TEHUTI_3010	/;"	d
PCI_DEVICE_ID_TEHUTI_3014	include/pci_ids.h	/^#define PCI_DEVICE_ID_TEHUTI_3014	/;"	d
PCI_DEVICE_ID_TEKRAM_DC290	include/pci_ids.h	/^#define PCI_DEVICE_ID_TEKRAM_DC290	/;"	d
PCI_DEVICE_ID_TIGERJET_100	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGERJET_100	/;"	d
PCI_DEVICE_ID_TIGERJET_300	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGERJET_300	/;"	d
PCI_DEVICE_ID_TIGON3_5700	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5700	/;"	d
PCI_DEVICE_ID_TIGON3_5701	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5701	/;"	d
PCI_DEVICE_ID_TIGON3_5702	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5702	/;"	d
PCI_DEVICE_ID_TIGON3_5702A3	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5702A3	/;"	d
PCI_DEVICE_ID_TIGON3_5702FE	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5702FE	/;"	d
PCI_DEVICE_ID_TIGON3_5702X	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5702X	/;"	d
PCI_DEVICE_ID_TIGON3_5703	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5703	/;"	d
PCI_DEVICE_ID_TIGON3_5703A3	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5703A3	/;"	d
PCI_DEVICE_ID_TIGON3_5703X	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5703X	/;"	d
PCI_DEVICE_ID_TIGON3_5704	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5704	/;"	d
PCI_DEVICE_ID_TIGON3_5704S	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5704S	/;"	d
PCI_DEVICE_ID_TIGON3_5704S_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5704S_2	/;"	d
PCI_DEVICE_ID_TIGON3_5705	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5705	/;"	d
PCI_DEVICE_ID_TIGON3_5705F	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5705F	/;"	d
PCI_DEVICE_ID_TIGON3_5705M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5705M	/;"	d
PCI_DEVICE_ID_TIGON3_5705M_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5705M_2	/;"	d
PCI_DEVICE_ID_TIGON3_5705_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5705_2	/;"	d
PCI_DEVICE_ID_TIGON3_5714	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5714	/;"	d
PCI_DEVICE_ID_TIGON3_5714S	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5714S	/;"	d
PCI_DEVICE_ID_TIGON3_5715	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5715	/;"	d
PCI_DEVICE_ID_TIGON3_5715S	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5715S	/;"	d
PCI_DEVICE_ID_TIGON3_5719	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5719	/;"	d
PCI_DEVICE_ID_TIGON3_5721	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5721	/;"	d
PCI_DEVICE_ID_TIGON3_5722	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5722	/;"	d
PCI_DEVICE_ID_TIGON3_5723	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5723	/;"	d
PCI_DEVICE_ID_TIGON3_5750	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5750	/;"	d
PCI_DEVICE_ID_TIGON3_5751	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5751	/;"	d
PCI_DEVICE_ID_TIGON3_5751F	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5751F	/;"	d
PCI_DEVICE_ID_TIGON3_5751M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5751M	/;"	d
PCI_DEVICE_ID_TIGON3_5752	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5752	/;"	d
PCI_DEVICE_ID_TIGON3_5752M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5752M	/;"	d
PCI_DEVICE_ID_TIGON3_5753	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5753	/;"	d
PCI_DEVICE_ID_TIGON3_5753F	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5753F	/;"	d
PCI_DEVICE_ID_TIGON3_5753M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5753M	/;"	d
PCI_DEVICE_ID_TIGON3_5754	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5754	/;"	d
PCI_DEVICE_ID_TIGON3_5754M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5754M	/;"	d
PCI_DEVICE_ID_TIGON3_5755	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5755	/;"	d
PCI_DEVICE_ID_TIGON3_5755M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5755M	/;"	d
PCI_DEVICE_ID_TIGON3_5756	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5756	/;"	d
PCI_DEVICE_ID_TIGON3_5761	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5761	/;"	d
PCI_DEVICE_ID_TIGON3_5761E	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5761E	/;"	d
PCI_DEVICE_ID_TIGON3_5764	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5764	/;"	d
PCI_DEVICE_ID_TIGON3_5780	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5780	/;"	d
PCI_DEVICE_ID_TIGON3_5780S	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5780S	/;"	d
PCI_DEVICE_ID_TIGON3_5781	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5781	/;"	d
PCI_DEVICE_ID_TIGON3_5782	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5782	/;"	d
PCI_DEVICE_ID_TIGON3_5784	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5784	/;"	d
PCI_DEVICE_ID_TIGON3_5786	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5786	/;"	d
PCI_DEVICE_ID_TIGON3_5787	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5787	/;"	d
PCI_DEVICE_ID_TIGON3_5787F	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5787F	/;"	d
PCI_DEVICE_ID_TIGON3_5787M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5787M	/;"	d
PCI_DEVICE_ID_TIGON3_5788	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5788	/;"	d
PCI_DEVICE_ID_TIGON3_5789	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5789	/;"	d
PCI_DEVICE_ID_TIGON3_5901	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5901	/;"	d
PCI_DEVICE_ID_TIGON3_5901_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5901_2	/;"	d
PCI_DEVICE_ID_TIGON3_5906	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5906	/;"	d
PCI_DEVICE_ID_TIGON3_5906M	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIGON3_5906M	/;"	d
PCI_DEVICE_ID_TIMEDIA_1889	include/pci_ids.h	/^#define PCI_DEVICE_ID_TIMEDIA_1889	/;"	d
PCI_DEVICE_ID_TITAN_010L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_010L	/;"	d
PCI_DEVICE_ID_TITAN_100	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_100	/;"	d
PCI_DEVICE_ID_TITAN_100L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_100L	/;"	d
PCI_DEVICE_ID_TITAN_110L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_110L	/;"	d
PCI_DEVICE_ID_TITAN_200	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_200	/;"	d
PCI_DEVICE_ID_TITAN_200L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_200L	/;"	d
PCI_DEVICE_ID_TITAN_210L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_210L	/;"	d
PCI_DEVICE_ID_TITAN_400	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_400	/;"	d
PCI_DEVICE_ID_TITAN_400L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_400L	/;"	d
PCI_DEVICE_ID_TITAN_800B	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_800B	/;"	d
PCI_DEVICE_ID_TITAN_800L	include/pci_ids.h	/^#define PCI_DEVICE_ID_TITAN_800L	/;"	d
PCI_DEVICE_ID_TI_1031	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1031	/;"	d
PCI_DEVICE_ID_TI_1130	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1130	/;"	d
PCI_DEVICE_ID_TI_1131	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1131	/;"	d
PCI_DEVICE_ID_TI_1210	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1210	/;"	d
PCI_DEVICE_ID_TI_1211	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1211	/;"	d
PCI_DEVICE_ID_TI_1220	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1220	/;"	d
PCI_DEVICE_ID_TI_1221	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1221	/;"	d
PCI_DEVICE_ID_TI_1225	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1225	/;"	d
PCI_DEVICE_ID_TI_1250	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1250	/;"	d
PCI_DEVICE_ID_TI_1251A	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1251A	/;"	d
PCI_DEVICE_ID_TI_1251B	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1251B	/;"	d
PCI_DEVICE_ID_TI_1410	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1410	/;"	d
PCI_DEVICE_ID_TI_1420	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1420	/;"	d
PCI_DEVICE_ID_TI_1450	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1450	/;"	d
PCI_DEVICE_ID_TI_1451A	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1451A	/;"	d
PCI_DEVICE_ID_TI_1510	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1510	/;"	d
PCI_DEVICE_ID_TI_1520	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1520	/;"	d
PCI_DEVICE_ID_TI_1620	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_1620	/;"	d
PCI_DEVICE_ID_TI_4410	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_4410	/;"	d
PCI_DEVICE_ID_TI_4450	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_4450	/;"	d
PCI_DEVICE_ID_TI_4451	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_4451	/;"	d
PCI_DEVICE_ID_TI_4510	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_4510	/;"	d
PCI_DEVICE_ID_TI_4520	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_4520	/;"	d
PCI_DEVICE_ID_TI_7410	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_7410	/;"	d
PCI_DEVICE_ID_TI_7510	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_7510	/;"	d
PCI_DEVICE_ID_TI_7610	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_7610	/;"	d
PCI_DEVICE_ID_TI_TVP4020	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_TVP4020	/;"	d
PCI_DEVICE_ID_TI_X420	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_X420	/;"	d
PCI_DEVICE_ID_TI_X515	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_X515	/;"	d
PCI_DEVICE_ID_TI_X620	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_X620	/;"	d
PCI_DEVICE_ID_TI_XIO2000A	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XIO2000A	/;"	d
PCI_DEVICE_ID_TI_XX12	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XX12	/;"	d
PCI_DEVICE_ID_TI_XX12_FM	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XX12_FM	/;"	d
PCI_DEVICE_ID_TI_XX20_FM	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XX20_FM	/;"	d
PCI_DEVICE_ID_TI_XX21_XX11	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XX21_XX11	/;"	d
PCI_DEVICE_ID_TI_XX21_XX11_FM	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XX21_XX11_FM	/;"	d
PCI_DEVICE_ID_TI_XX21_XX11_SD	include/pci_ids.h	/^#define PCI_DEVICE_ID_TI_XX21_XX11_SD	/;"	d
PCI_DEVICE_ID_TOPIC_TP560	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOPIC_TP560	/;"	d
PCI_DEVICE_ID_TOSHIBA_PICCOLO_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1	/;"	d
PCI_DEVICE_ID_TOSHIBA_PICCOLO_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2	/;"	d
PCI_DEVICE_ID_TOSHIBA_PICCOLO_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_3	/;"	d
PCI_DEVICE_ID_TOSHIBA_PICCOLO_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_5	/;"	d
PCI_DEVICE_ID_TOSHIBA_SPIDER_NET	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET /;"	d
PCI_DEVICE_ID_TOSHIBA_TC35815CF	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TC35815CF	/;"	d
PCI_DEVICE_ID_TOSHIBA_TC35815_NWU	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TC35815_NWU	/;"	d
PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939	/;"	d
PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE	/;"	d
PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC	/;"	d
PCI_DEVICE_ID_TOSHIBA_TOPIC100	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TOPIC100	/;"	d
PCI_DEVICE_ID_TOSHIBA_TOPIC95	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TOPIC95	/;"	d
PCI_DEVICE_ID_TOSHIBA_TOPIC97	include/pci_ids.h	/^#define PCI_DEVICE_ID_TOSHIBA_TOPIC97	/;"	d
PCI_DEVICE_ID_TRIDENT_4DWAVE_DX	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX	/;"	d
PCI_DEVICE_ID_TRIDENT_4DWAVE_NX	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX	/;"	d
PCI_DEVICE_ID_TRIDENT_8400	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_8400	/;"	d
PCI_DEVICE_ID_TRIDENT_8420	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_8420	/;"	d
PCI_DEVICE_ID_TRIDENT_8500	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_8500	/;"	d
PCI_DEVICE_ID_TRIDENT_9320	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9320	/;"	d
PCI_DEVICE_ID_TRIDENT_9388	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9388	/;"	d
PCI_DEVICE_ID_TRIDENT_9397	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9397	/;"	d
PCI_DEVICE_ID_TRIDENT_939A	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_939A	/;"	d
PCI_DEVICE_ID_TRIDENT_9420	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9420	/;"	d
PCI_DEVICE_ID_TRIDENT_9440	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9440	/;"	d
PCI_DEVICE_ID_TRIDENT_9520	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9520	/;"	d
PCI_DEVICE_ID_TRIDENT_9525	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9525	/;"	d
PCI_DEVICE_ID_TRIDENT_9660	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9660	/;"	d
PCI_DEVICE_ID_TRIDENT_9750	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9750	/;"	d
PCI_DEVICE_ID_TRIDENT_9850	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9850	/;"	d
PCI_DEVICE_ID_TRIDENT_9880	include/pci_ids.h	/^#define PCI_DEVICE_ID_TRIDENT_9880	/;"	d
PCI_DEVICE_ID_TSENG_ET6000	include/pci_ids.h	/^#define PCI_DEVICE_ID_TSENG_ET6000	/;"	d
PCI_DEVICE_ID_TSENG_W32P_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_TSENG_W32P_2	/;"	d
PCI_DEVICE_ID_TSENG_W32P_b	include/pci_ids.h	/^#define PCI_DEVICE_ID_TSENG_W32P_b	/;"	d
PCI_DEVICE_ID_TSENG_W32P_c	include/pci_ids.h	/^#define PCI_DEVICE_ID_TSENG_W32P_c	/;"	d
PCI_DEVICE_ID_TSENG_W32P_d	include/pci_ids.h	/^#define PCI_DEVICE_ID_TSENG_W32P_d	/;"	d
PCI_DEVICE_ID_TTI_HPT302	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT302	/;"	d
PCI_DEVICE_ID_TTI_HPT343	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT343	/;"	d
PCI_DEVICE_ID_TTI_HPT366	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT366	/;"	d
PCI_DEVICE_ID_TTI_HPT371	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT371	/;"	d
PCI_DEVICE_ID_TTI_HPT372	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT372	/;"	d
PCI_DEVICE_ID_TTI_HPT372N	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT372N	/;"	d
PCI_DEVICE_ID_TTI_HPT374	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTI_HPT374	/;"	d
PCI_DEVICE_ID_TTTECH_MC322	include/pci_ids.h	/^#define PCI_DEVICE_ID_TTTECH_MC322	/;"	d
PCI_DEVICE_ID_TUNDRA_CA91C042	include/pci_ids.h	/^#define PCI_DEVICE_ID_TUNDRA_CA91C042	/;"	d
PCI_DEVICE_ID_TUNDRA_TSI148	include/tsi148.h	/^#define PCI_DEVICE_ID_TUNDRA_TSI148 /;"	d
PCI_DEVICE_ID_UMC_UM8673F	include/pci_ids.h	/^#define PCI_DEVICE_ID_UMC_UM8673F	/;"	d
PCI_DEVICE_ID_UMC_UM8886A	include/pci_ids.h	/^#define PCI_DEVICE_ID_UMC_UM8886A	/;"	d
PCI_DEVICE_ID_UMC_UM8886BF	include/pci_ids.h	/^#define PCI_DEVICE_ID_UMC_UM8886BF	/;"	d
PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR	include/pci_ids.h	/^#define PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR /;"	d
PCI_DEVICE_ID_UPCI_RM3_4PORT	include/pci_ids.h	/^#define PCI_DEVICE_ID_UPCI_RM3_4PORT	/;"	d
PCI_DEVICE_ID_UPCI_RM3_8PORT	include/pci_ids.h	/^#define PCI_DEVICE_ID_UPCI_RM3_8PORT	/;"	d
PCI_DEVICE_ID_URP16INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_URP16INTF	/;"	d
PCI_DEVICE_ID_URP32INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_URP32INTF	/;"	d
PCI_DEVICE_ID_URP8INTF	include/pci_ids.h	/^#define PCI_DEVICE_ID_URP8INTF	/;"	d
PCI_DEVICE_ID_URP8OCTA	include/pci_ids.h	/^#define PCI_DEVICE_ID_URP8OCTA	/;"	d
PCI_DEVICE_ID_V3_V351	include/pci_ids.h	/^#define PCI_DEVICE_ID_V3_V351	/;"	d
PCI_DEVICE_ID_V3_V960	include/pci_ids.h	/^#define PCI_DEVICE_ID_V3_V960	/;"	d
PCI_DEVICE_ID_VIA_3238_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_3238_0	/;"	d
PCI_DEVICE_ID_VIA_3269_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_3269_0	/;"	d
PCI_DEVICE_ID_VIA_3296_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_3296_0	/;"	d
PCI_DEVICE_ID_VIA_612X	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_612X	/;"	d
PCI_DEVICE_ID_VIA_6410	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_6410	/;"	d
PCI_DEVICE_ID_VIA_6415	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_6415	/;"	d
PCI_DEVICE_ID_VIA_8231	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8231	/;"	d
PCI_DEVICE_ID_VIA_8231_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8231_4	/;"	d
PCI_DEVICE_ID_VIA_8233A	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8233A	/;"	d
PCI_DEVICE_ID_VIA_8233C_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8233C_0	/;"	d
PCI_DEVICE_ID_VIA_8233_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8233_0	/;"	d
PCI_DEVICE_ID_VIA_8233_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8233_5	/;"	d
PCI_DEVICE_ID_VIA_8235	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8235	/;"	d
PCI_DEVICE_ID_VIA_8235_USB_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8235_USB_2	/;"	d
PCI_DEVICE_ID_VIA_8237	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8237	/;"	d
PCI_DEVICE_ID_VIA_8237A	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8237A	/;"	d
PCI_DEVICE_ID_VIA_8237S	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8237S	/;"	d
PCI_DEVICE_ID_VIA_8237_SATA	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8237_SATA	/;"	d
PCI_DEVICE_ID_VIA_8251	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8251	/;"	d
PCI_DEVICE_ID_VIA_8261	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8261	/;"	d
PCI_DEVICE_ID_VIA_82C561	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C561	/;"	d
PCI_DEVICE_ID_VIA_82C576	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C576	/;"	d
PCI_DEVICE_ID_VIA_82C576_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C576_1	/;"	d
PCI_DEVICE_ID_VIA_82C586_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C586_0	/;"	d
PCI_DEVICE_ID_VIA_82C586_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C586_1	/;"	d
PCI_DEVICE_ID_VIA_82C586_2	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C586_2	/;"	d
PCI_DEVICE_ID_VIA_82C586_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C586_3	/;"	d
PCI_DEVICE_ID_VIA_82C596	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C596	/;"	d
PCI_DEVICE_ID_VIA_82C596B_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C596B_3	/;"	d
PCI_DEVICE_ID_VIA_82C596_3	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C596_3	/;"	d
PCI_DEVICE_ID_VIA_82C597_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C597_0	/;"	d
PCI_DEVICE_ID_VIA_82C598_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C598_0	/;"	d
PCI_DEVICE_ID_VIA_82C598_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C598_1	/;"	d
PCI_DEVICE_ID_VIA_82C686	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C686	/;"	d
PCI_DEVICE_ID_VIA_82C686_4	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C686_4	/;"	d
PCI_DEVICE_ID_VIA_82C686_5	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C686_5	/;"	d
PCI_DEVICE_ID_VIA_82C691_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_82C691_0	/;"	d
PCI_DEVICE_ID_VIA_8361	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8361	/;"	d
PCI_DEVICE_ID_VIA_8363_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8363_0	/;"	d
PCI_DEVICE_ID_VIA_8365_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8365_1	/;"	d
PCI_DEVICE_ID_VIA_8367_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8367_0	/;"	d
PCI_DEVICE_ID_VIA_8371_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8371_0	/;"	d
PCI_DEVICE_ID_VIA_8371_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8371_1	/;"	d
PCI_DEVICE_ID_VIA_8377_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8377_0	/;"	d
PCI_DEVICE_ID_VIA_8378_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8378_0	/;"	d
PCI_DEVICE_ID_VIA_8380_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8380_0	/;"	d
PCI_DEVICE_ID_VIA_8385_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8385_0	/;"	d
PCI_DEVICE_ID_VIA_838X_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_838X_1	/;"	d
PCI_DEVICE_ID_VIA_83_87XX_1	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_83_87XX_1	/;"	d
PCI_DEVICE_ID_VIA_8501_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8501_0	/;"	d
PCI_DEVICE_ID_VIA_8601_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8601_0	/;"	d
PCI_DEVICE_ID_VIA_8605_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8605_0	/;"	d
PCI_DEVICE_ID_VIA_8622	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8622	/;"	d
PCI_DEVICE_ID_VIA_862X_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_862X_0	/;"	d
PCI_DEVICE_ID_VIA_8633_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8633_0	/;"	d
PCI_DEVICE_ID_VIA_8653_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8653_0	/;"	d
PCI_DEVICE_ID_VIA_8703_51_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8703_51_0	/;"	d
PCI_DEVICE_ID_VIA_8753_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8753_0	/;"	d
PCI_DEVICE_ID_VIA_8754C_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8754C_0	/;"	d
PCI_DEVICE_ID_VIA_8763_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8763_0	/;"	d
PCI_DEVICE_ID_VIA_8783_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_8783_0	/;"	d
PCI_DEVICE_ID_VIA_ANON	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_ANON	/;"	d
PCI_DEVICE_ID_VIA_CX700	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_CX700	/;"	d
PCI_DEVICE_ID_VIA_CX700_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_CX700_IDE	/;"	d
PCI_DEVICE_ID_VIA_K8T800PRO_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_K8T800PRO_0	/;"	d
PCI_DEVICE_ID_VIA_P4M800CE	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_P4M800CE	/;"	d
PCI_DEVICE_ID_VIA_P4M890	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_P4M890	/;"	d
PCI_DEVICE_ID_VIA_PT880	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_PT880	/;"	d
PCI_DEVICE_ID_VIA_PT880ULTRA	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_PT880ULTRA	/;"	d
PCI_DEVICE_ID_VIA_PX8X0_0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_PX8X0_0	/;"	d
PCI_DEVICE_ID_VIA_SATA_EIDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_SATA_EIDE	/;"	d
PCI_DEVICE_ID_VIA_VT3324	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VT3324	/;"	d
PCI_DEVICE_ID_VIA_VT3336	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VT3336	/;"	d
PCI_DEVICE_ID_VIA_VT3351	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VT3351	/;"	d
PCI_DEVICE_ID_VIA_VT3364	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VT3364	/;"	d
PCI_DEVICE_ID_VIA_VX800	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VX800	/;"	d
PCI_DEVICE_ID_VIA_VX855	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VX855	/;"	d
PCI_DEVICE_ID_VIA_VX855_IDE	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VX855_IDE	/;"	d
PCI_DEVICE_ID_VIA_VX900	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_VX900	/;"	d
PCI_DEVICE_ID_VIA_XM266	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_XM266	/;"	d
PCI_DEVICE_ID_VIA_XN266	include/pci_ids.h	/^#define PCI_DEVICE_ID_VIA_XN266	/;"	d
PCI_DEVICE_ID_VITESSE_VSC7174	include/pci_ids.h	/^#define PCI_DEVICE_ID_VITESSE_VSC7174	/;"	d
PCI_DEVICE_ID_VLSI_82C147	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C147	/;"	d
PCI_DEVICE_ID_VLSI_82C532	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C532	/;"	d
PCI_DEVICE_ID_VLSI_82C534	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C534	/;"	d
PCI_DEVICE_ID_VLSI_82C535	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C535	/;"	d
PCI_DEVICE_ID_VLSI_82C541	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C541	/;"	d
PCI_DEVICE_ID_VLSI_82C543	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C543	/;"	d
PCI_DEVICE_ID_VLSI_82C592	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C592	/;"	d
PCI_DEVICE_ID_VLSI_82C593	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C593	/;"	d
PCI_DEVICE_ID_VLSI_82C594	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C594	/;"	d
PCI_DEVICE_ID_VLSI_82C597	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_82C597	/;"	d
PCI_DEVICE_ID_VLSI_VAS96011	include/pci_ids.h	/^#define PCI_DEVICE_ID_VLSI_VAS96011	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6000B	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6000B	/;"	d
PCI_DEVICE_ID_VORTEX_GDT60x0	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT60x0	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6530	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6530	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6535	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6535	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6537	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6537	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6537RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6537RP	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6550	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6550	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6555	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6555	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6557	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6557	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6557RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6557RP	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x10	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x10	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x11RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x11RP	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x15	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x15	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x17	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x17	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x17RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x17RP	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x20	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x20	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x21RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x21RP	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x25	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x25	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x27	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x27	/;"	d
PCI_DEVICE_ID_VORTEX_GDT6x27RP	include/pci_ids.h	/^#define PCI_DEVICE_ID_VORTEX_GDT6x27RP	/;"	d
PCI_DEVICE_ID_VT1724	include/pci_ids.h	/^#define PCI_DEVICE_ID_VT1724	/;"	d
PCI_DEVICE_ID_WD_90C	include/pci_ids.h	/^#define PCI_DEVICE_ID_WD_90C	/;"	d
PCI_DEVICE_ID_WEITEK_P9000	include/pci_ids.h	/^#define PCI_DEVICE_ID_WEITEK_P9000	/;"	d
PCI_DEVICE_ID_WEITEK_P9100	include/pci_ids.h	/^#define PCI_DEVICE_ID_WEITEK_P9100	/;"	d
PCI_DEVICE_ID_WINBOND2_6692	include/pci_ids.h	/^#define PCI_DEVICE_ID_WINBOND2_6692	/;"	d
PCI_DEVICE_ID_WINBOND2_89C940F	include/pci_ids.h	/^#define PCI_DEVICE_ID_WINBOND2_89C940F	/;"	d
PCI_DEVICE_ID_WINBOND_82C105	include/pci_ids.h	/^#define PCI_DEVICE_ID_WINBOND_82C105	/;"	d
PCI_DEVICE_ID_WINBOND_83C553	include/pci_ids.h	/^#define PCI_DEVICE_ID_WINBOND_83C553	/;"	d
PCI_DEVICE_ID_XEN_PLATFORM	include/pci_ids.h	/^#define PCI_DEVICE_ID_XEN_PLATFORM	/;"	d
PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP	include/pci_ids.h	/^#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP /;"	d
PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI	include/pci_ids.h	/^#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI /;"	d
PCI_DEVICE_ID_XIRCOM_RBM56G	include/pci_ids.h	/^#define PCI_DEVICE_ID_XIRCOM_RBM56G	/;"	d
PCI_DEVICE_ID_XIRCOM_X3201_MDM	include/pci_ids.h	/^#define PCI_DEVICE_ID_XIRCOM_X3201_MDM	/;"	d
PCI_DEVICE_ID_YAMAHA_724	include/pci_ids.h	/^#define PCI_DEVICE_ID_YAMAHA_724	/;"	d
PCI_DEVICE_ID_YAMAHA_724F	include/pci_ids.h	/^#define PCI_DEVICE_ID_YAMAHA_724F	/;"	d
PCI_DEVICE_ID_YAMAHA_740	include/pci_ids.h	/^#define PCI_DEVICE_ID_YAMAHA_740	/;"	d
PCI_DEVICE_ID_YAMAHA_740C	include/pci_ids.h	/^#define PCI_DEVICE_ID_YAMAHA_740C	/;"	d
PCI_DEVICE_ID_YAMAHA_744	include/pci_ids.h	/^#define PCI_DEVICE_ID_YAMAHA_744	/;"	d
PCI_DEVICE_ID_YAMAHA_754	include/pci_ids.h	/^#define PCI_DEVICE_ID_YAMAHA_754	/;"	d
PCI_DEVICE_ID_ZEITNET_1221	include/pci_ids.h	/^#define PCI_DEVICE_ID_ZEITNET_1221	/;"	d
PCI_DEVICE_ID_ZEITNET_1225	include/pci_ids.h	/^#define PCI_DEVICE_ID_ZEITNET_1225	/;"	d
PCI_DEVICE_ID_ZIATECH_5550_HC	include/pci_ids.h	/^#define PCI_DEVICE_ID_ZIATECH_5550_HC	/;"	d
PCI_DEVICE_ID_ZOLTRIX_2BD0	include/pci_ids.h	/^#define PCI_DEVICE_ID_ZOLTRIX_2BD0	/;"	d
PCI_DEVICE_ID_ZORAN_36057	include/pci_ids.h	/^#define PCI_DEVICE_ID_ZORAN_36057	/;"	d
PCI_DEVICE_ID_ZORAN_36120	include/pci_ids.h	/^#define PCI_DEVICE_ID_ZORAN_36120	/;"	d
PCI_DEVICE_SM501	include/sm501.h	/^#define PCI_DEVICE_SM501	/;"	d
PCI_DEVICE_SUB	include/pci.h	/^#define PCI_DEVICE_SUB(/;"	d
PCI_DEV_CONFIG	arch/x86/cpu/baytrail/early_uart.c	/^#define PCI_DEV_CONFIG(/;"	d	file:
PCI_DEV_PIRQ_ROUTE	arch/x86/include/asm/acpi/irq_helper.h	/^#define PCI_DEV_PIRQ_ROUTE(/;"	d
PCI_DEV_PIRQ_ROUTES	arch/x86/include/asm/arch-baytrail/acpi/irqroute.h	/^#define PCI_DEV_PIRQ_ROUTES /;"	d
PCI_DEV_PIRQ_ROUTES	arch/x86/include/asm/arch-quark/acpi/irqroute.h	/^#define PCI_DEV_PIRQ_ROUTES /;"	d
PCI_DISCOUNT	include/mpc106.h	/^#define PCI_DISCOUNT	/;"	d
PCI_EEP_ADDRESS	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_EEP_ADDRESS	/;"	d
PCI_ENET0_IOADDR	board/armltd/integrator/pci.c	/^#define PCI_ENET0_IOADDR	/;"	d	file:
PCI_ENET0_IOADDR	include/configs/MPC8349EMDS.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8349ITX.h	/^    #define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8536DS.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8540ADS.h	/^    #define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8544DS.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8560ADS.h	/^    #define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8572DS.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/MPC8610HPCD.h	/^#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/TQM834x.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/sbc8349.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/sbc8641d.h	/^    #define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_IOADDR	include/configs/vme8349.h	/^	#define PCI_ENET0_IOADDR	/;"	d
PCI_ENET0_MEMADDR	board/armltd/integrator/pci.c	/^#define PCI_ENET0_MEMADDR	/;"	d	file:
PCI_ENET0_MEMADDR	include/configs/MPC8349EMDS.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8349ITX.h	/^    #define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8536DS.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8540ADS.h	/^    #define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8544DS.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8560ADS.h	/^    #define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8572DS.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/MPC8610HPCD.h	/^#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/TQM834x.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/sbc8349.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/sbc8641d.h	/^    #define PCI_ENET0_MEMADDR	/;"	d
PCI_ENET0_MEMADDR	include/configs/vme8349.h	/^	#define PCI_ENET0_MEMADDR	/;"	d
PCI_ENV	include/configs/MPC8610HPCD.h	/^#define	PCI_ENV /;"	d
PCI_ENV	include/configs/MPC8610HPCD.h	/^#define PCI_ENV /;"	d
PCI_ERREN	include/pci.h	/^#define PCI_ERREN /;"	d
PCI_ERROR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_ERROR /;"	d
PCI_ERROR_ADRS_CAPTURE_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define PCI_ERROR_ADRS_CAPTURE_REG /;"	d
PCI_ERROR_ADRS_CAPTURE_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCI_ERROR_ADRS_CAPTURE_REG /;"	d
PCI_ERROR_CONTROL_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_CONTROL_REG	/;"	d
PCI_ERROR_CONTROL_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_CONTROL_REG	/;"	d
PCI_ERROR_CTRL_CAPTURE_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define PCI_ERROR_CTRL_CAPTURE_REG /;"	d
PCI_ERROR_CTRL_CAPTURE_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCI_ERROR_CTRL_CAPTURE_REG /;"	d
PCI_ERROR_DATA_CAPTURE_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define PCI_ERROR_DATA_CAPTURE_REG /;"	d
PCI_ERROR_DATA_CAPTURE_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCI_ERROR_DATA_CAPTURE_REG /;"	d
PCI_ERROR_I2O_DBMC	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_I2O_DBMC	/;"	d
PCI_ERROR_I2O_DBMC	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_I2O_DBMC	/;"	d
PCI_ERROR_I2O_IPQO	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_I2O_IPQO	/;"	d
PCI_ERROR_I2O_IPQO	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_I2O_IPQO	/;"	d
PCI_ERROR_I2O_OFQO	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_I2O_OFQO	/;"	d
PCI_ERROR_I2O_OFQO	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_I2O_OFQO	/;"	d
PCI_ERROR_IRA	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_IRA	/;"	d
PCI_ERROR_IRA	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_IRA	/;"	d
PCI_ERROR_MASK_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_MASK_REG	/;"	d
PCI_ERROR_MASK_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_MASK_REG	/;"	d
PCI_ERROR_NMI	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_NMI	/;"	d
PCI_ERROR_NMI	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_NMI	/;"	d
PCI_ERROR_PCI_ADDR_PAR	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_ADDR_PAR	/;"	d
PCI_ERROR_PCI_ADDR_PAR	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_ADDR_PAR	/;"	d
PCI_ERROR_PCI_DATA_PAR_RD	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_DATA_PAR_RD	/;"	d
PCI_ERROR_PCI_DATA_PAR_RD	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_DATA_PAR_RD	/;"	d
PCI_ERROR_PCI_DATA_PAR_WR	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_DATA_PAR_WR	/;"	d
PCI_ERROR_PCI_DATA_PAR_WR	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_DATA_PAR_WR	/;"	d
PCI_ERROR_PCI_NO_RSP	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_NO_RSP	/;"	d
PCI_ERROR_PCI_NO_RSP	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_NO_RSP	/;"	d
PCI_ERROR_PCI_PERR_RD	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_PERR_RD	/;"	d
PCI_ERROR_PCI_PERR_RD	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_PERR_RD	/;"	d
PCI_ERROR_PCI_PERR_WR	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_PERR_WR	/;"	d
PCI_ERROR_PCI_PERR_WR	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_PERR_WR	/;"	d
PCI_ERROR_PCI_SERR	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_SERR	/;"	d
PCI_ERROR_PCI_SERR	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_SERR	/;"	d
PCI_ERROR_PCI_TAR_ABT	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_PCI_TAR_ABT	/;"	d
PCI_ERROR_PCI_TAR_ABT	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_PCI_TAR_ABT	/;"	d
PCI_ERROR_STATUS_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define	PCI_ERROR_STATUS_REG	/;"	d
PCI_ERROR_STATUS_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define	PCI_ERROR_STATUS_REG	/;"	d
PCI_ERRSTS	include/pci.h	/^#define PCI_ERRSTS /;"	d
PCI_EXP_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   PCI_EXP_EN	/;"	d
PCI_EXP_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   PCI_EXP_STS	/;"	d
PCI_EXP_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PCI_EXP_STS	/;"	d
PCI_EXT_CAP_ID	include/pci.h	/^#define PCI_EXT_CAP_ID(/;"	d
PCI_EXT_CAP_ID_ACS	include/pci.h	/^#define PCI_EXT_CAP_ID_ACS	/;"	d
PCI_EXT_CAP_ID_AMD_XXX	include/pci.h	/^#define PCI_EXT_CAP_ID_AMD_XXX	/;"	d
PCI_EXT_CAP_ID_ARI	include/pci.h	/^#define PCI_EXT_CAP_ID_ARI	/;"	d
PCI_EXT_CAP_ID_ATS	include/pci.h	/^#define PCI_EXT_CAP_ID_ATS	/;"	d
PCI_EXT_CAP_ID_CAC	include/pci.h	/^#define PCI_EXT_CAP_ID_CAC	/;"	d
PCI_EXT_CAP_ID_DPA	include/pci.h	/^#define PCI_EXT_CAP_ID_DPA	/;"	d
PCI_EXT_CAP_ID_DSN	include/pci.h	/^#define PCI_EXT_CAP_ID_DSN	/;"	d
PCI_EXT_CAP_ID_ERR	include/pci.h	/^#define PCI_EXT_CAP_ID_ERR	/;"	d
PCI_EXT_CAP_ID_LTR	include/pci.h	/^#define PCI_EXT_CAP_ID_LTR	/;"	d
PCI_EXT_CAP_ID_MCAST	include/pci.h	/^#define PCI_EXT_CAP_ID_MCAST	/;"	d
PCI_EXT_CAP_ID_MFVC	include/pci.h	/^#define PCI_EXT_CAP_ID_MFVC	/;"	d
PCI_EXT_CAP_ID_MRIOV	include/pci.h	/^#define PCI_EXT_CAP_ID_MRIOV	/;"	d
PCI_EXT_CAP_ID_PASID	include/pci.h	/^#define PCI_EXT_CAP_ID_PASID	/;"	d
PCI_EXT_CAP_ID_PMUX	include/pci.h	/^#define PCI_EXT_CAP_ID_PMUX	/;"	d
PCI_EXT_CAP_ID_PRI	include/pci.h	/^#define PCI_EXT_CAP_ID_PRI	/;"	d
PCI_EXT_CAP_ID_PWR	include/pci.h	/^#define PCI_EXT_CAP_ID_PWR	/;"	d
PCI_EXT_CAP_ID_RCEC	include/pci.h	/^#define PCI_EXT_CAP_ID_RCEC	/;"	d
PCI_EXT_CAP_ID_RCILC	include/pci.h	/^#define PCI_EXT_CAP_ID_RCILC	/;"	d
PCI_EXT_CAP_ID_RCLD	include/pci.h	/^#define PCI_EXT_CAP_ID_RCLD	/;"	d
PCI_EXT_CAP_ID_RCRB	include/pci.h	/^#define PCI_EXT_CAP_ID_RCRB	/;"	d
PCI_EXT_CAP_ID_REBAR	include/pci.h	/^#define PCI_EXT_CAP_ID_REBAR	/;"	d
PCI_EXT_CAP_ID_SECPCI	include/pci.h	/^#define PCI_EXT_CAP_ID_SECPCI	/;"	d
PCI_EXT_CAP_ID_SRIOV	include/pci.h	/^#define PCI_EXT_CAP_ID_SRIOV	/;"	d
PCI_EXT_CAP_ID_TPH	include/pci.h	/^#define PCI_EXT_CAP_ID_TPH	/;"	d
PCI_EXT_CAP_ID_VC	include/pci.h	/^#define PCI_EXT_CAP_ID_VC	/;"	d
PCI_EXT_CAP_ID_VC9	include/pci.h	/^#define PCI_EXT_CAP_ID_VC9	/;"	d
PCI_EXT_CAP_ID_VNDR	include/pci.h	/^#define PCI_EXT_CAP_ID_VNDR	/;"	d
PCI_EXT_CAP_NEXT	include/pci.h	/^#define PCI_EXT_CAP_NEXT(/;"	d
PCI_EXT_CAP_VER	include/pci.h	/^#define PCI_EXT_CAP_VER(/;"	d
PCI_EX_82566_SNOOP_ALL	drivers/net/e1000.h	/^#define PCI_EX_82566_SNOOP_ALL /;"	d
PCI_FIND_CAP_TTL	include/pci.h	/^#define PCI_FIND_CAP_TTL /;"	d
PCI_FIRST_DEVFN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_FIRST_DEVFN /;"	d
PCI_FIX_ADDR	arch/powerpc/include/asm/io.h	/^#define PCI_FIX_ADDR(/;"	d
PCI_FUNC	include/pci.h	/^#define PCI_FUNC(/;"	d
PCI_FUNCTION_CFG_LOCK	arch/powerpc/cpu/mpc83xx/pci.c	/^#define PCI_FUNCTION_CFG_LOCK	/;"	d	file:
PCI_FUNCTION_CONFIG	arch/powerpc/cpu/mpc83xx/pci.c	/^#define PCI_FUNCTION_CONFIG	/;"	d	file:
PCI_GCR_REG	arch/powerpc/include/asm/m8260_pci.h	/^#define PCI_GCR_REG /;"	d
PCI_GCR_REG	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PCI_GCR_REG /;"	d
PCI_GSCR_DRD	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_DRD	/;"	d
PCI_GSCR_DRD	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_DRD	/;"	d
PCI_GSCR_DRDE	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_DRDE	/;"	d
PCI_GSCR_DRDE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_DRDE	/;"	d
PCI_GSCR_ER	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_ER	/;"	d
PCI_GSCR_ER	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_ER	/;"	d
PCI_GSCR_PE	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_PE	/;"	d
PCI_GSCR_PE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_PE	/;"	d
PCI_GSCR_PEE	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_PEE	/;"	d
PCI_GSCR_PEE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_PEE	/;"	d
PCI_GSCR_PR	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_PR	/;"	d
PCI_GSCR_PR	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_PR	/;"	d
PCI_GSCR_SE	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_SE	/;"	d
PCI_GSCR_SE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_SE	/;"	d
PCI_GSCR_SEE	arch/m68k/include/asm/m5445x.h	/^#define PCI_GSCR_SEE	/;"	d
PCI_GSCR_SEE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_GSCR_SEE	/;"	d
PCI_HEADER_TYPE	include/pci.h	/^#define PCI_HEADER_TYPE	/;"	d
PCI_HEADER_TYPE_BRIDGE	include/pci.h	/^#define  PCI_HEADER_TYPE_BRIDGE /;"	d
PCI_HEADER_TYPE_CARDBUS	include/pci.h	/^#define  PCI_HEADER_TYPE_CARDBUS /;"	d
PCI_HEADER_TYPE_NORMAL	include/pci.h	/^#define  PCI_HEADER_TYPE_NORMAL /;"	d
PCI_HIGHEST_ON_BOARD_ID	board/mpl/common/pci_parts.h	/^#define PCI_HIGHEST_ON_BOARD_ID	/;"	d
PCI_HOSE_OP	drivers/pci/pci.c	/^#define PCI_HOSE_OP(/;"	d	file:
PCI_HOSE_OP	drivers/pci/pci_compat.c	/^#define PCI_HOSE_OP(/;"	d	file:
PCI_HOST_ADAPTER	include/configs/CPCI2DP.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_ADAPTER	include/configs/CPCI4052.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_ADAPTER	include/configs/MIP405.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_ADAPTER	include/configs/PIP405.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_ADAPTER	include/configs/PLU405.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_ADAPTER	include/configs/PMC405DE.h	/^#define PCI_HOST_ADAPTER	/;"	d
PCI_HOST_ADAPTER	include/configs/bubinga.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_ADAPTER	include/configs/walnut.h	/^#define PCI_HOST_ADAPTER /;"	d
PCI_HOST_AUTO	include/configs/CPCI2DP.h	/^#define PCI_HOST_AUTO /;"	d
PCI_HOST_AUTO	include/configs/CPCI4052.h	/^#define PCI_HOST_AUTO /;"	d
PCI_HOST_AUTO	include/configs/MIP405.h	/^#define PCI_HOST_AUTO /;"	d
PCI_HOST_AUTO	include/configs/PIP405.h	/^#define PCI_HOST_AUTO /;"	d
PCI_HOST_AUTO	include/configs/PLU405.h	/^#define PCI_HOST_AUTO /;"	d
PCI_HOST_AUTO	include/configs/PMC405DE.h	/^#define PCI_HOST_AUTO	/;"	d
PCI_HOST_AUTO	include/configs/bubinga.h	/^#define PCI_HOST_AUTO /;"	d
PCI_HOST_AUTO	include/configs/walnut.h	/^#define PCI_HOST_AUTO	/;"	d
PCI_HOST_FORCE	include/configs/CPCI2DP.h	/^#define PCI_HOST_FORCE /;"	d
PCI_HOST_FORCE	include/configs/CPCI4052.h	/^#define PCI_HOST_FORCE /;"	d
PCI_HOST_FORCE	include/configs/MIP405.h	/^#define PCI_HOST_FORCE /;"	d
PCI_HOST_FORCE	include/configs/PIP405.h	/^#define PCI_HOST_FORCE /;"	d
PCI_HOST_FORCE	include/configs/PLU405.h	/^#define PCI_HOST_FORCE /;"	d
PCI_HOST_FORCE	include/configs/PMC405DE.h	/^#define PCI_HOST_FORCE	/;"	d
PCI_HOST_FORCE	include/configs/bubinga.h	/^#define PCI_HOST_FORCE /;"	d
PCI_HOST_FORCE	include/configs/walnut.h	/^#define PCI_HOST_FORCE	/;"	d
PCI_ICR_IAE	arch/m68k/include/asm/m5445x.h	/^#define PCI_ICR_IAE	/;"	d
PCI_ICR_IAE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_ICR_IAE	/;"	d
PCI_ICR_MAXRETRY	arch/m68k/include/asm/m5445x.h	/^#define PCI_ICR_MAXRETRY(/;"	d
PCI_ICR_MAXRETRY	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_ICR_MAXRETRY(/;"	d
PCI_ICR_REE	arch/m68k/include/asm/m5445x.h	/^#define PCI_ICR_REE	/;"	d
PCI_ICR_REE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_ICR_REE	/;"	d
PCI_ICR_TAE	arch/m68k/include/asm/m5445x.h	/^#define PCI_ICR_TAE	/;"	d
PCI_ICR_TAE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_ICR_TAE	/;"	d
PCI_ID	board/gateworks/gw_ventana/gw_ventana.c	/^#define PCI_ID(/;"	d	file:
PCI_IDSEL_NUMBER	include/configs/MPC8349EMDS.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8349ITX.h	/^    #define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8536DS.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8540ADS.h	/^    #define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8544DS.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8560ADS.h	/^    #define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8572DS.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/MPC8610HPCD.h	/^#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/TQM834x.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/sbc8349.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/sbc8641d.h	/^    #define PCI_IDSEL_NUMBER	/;"	d
PCI_IDSEL_NUMBER	include/configs/vme8349.h	/^	#define PCI_IDSEL_NUMBER	/;"	d
PCI_INTA_ENABLE	include/faraday/ftpci100.h	/^#define PCI_INTA_ENABLE	/;"	d
PCI_INTB_ENABLE	include/faraday/ftpci100.h	/^#define PCI_INTB_ENABLE	/;"	d
PCI_INTC_ENABLE	include/faraday/ftpci100.h	/^#define PCI_INTC_ENABLE	/;"	d
PCI_INTD_ENABLE	include/faraday/ftpci100.h	/^#define PCI_INTD_ENABLE	/;"	d
PCI_INTERRUPT_LINE	include/pci.h	/^#define PCI_INTERRUPT_LINE	/;"	d
PCI_INTERRUPT_LINE_DISABLE	include/pci.h	/^#define PCI_INTERRUPT_LINE_DISABLE	/;"	d
PCI_INTERRUPT_PIN	include/pci.h	/^#define PCI_INTERRUPT_PIN	/;"	d
PCI_INT_ACK_ADDR	board/mpl/common/isa.c	/^#define PCI_INT_ACK_ADDR /;"	d	file:
PCI_INT_MASK	include/faraday/ftpci100.h	/^#define PCI_INT_MASK	/;"	d
PCI_IO_BASE	include/pci.h	/^#define PCI_IO_BASE	/;"	d
PCI_IO_BASE_UPPER16	include/pci.h	/^#define PCI_IO_BASE_UPPER16	/;"	d
PCI_IO_END	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_IO_END /;"	d
PCI_IO_LIMIT	include/pci.h	/^#define PCI_IO_LIMIT	/;"	d
PCI_IO_LIMIT_UPPER16	include/pci.h	/^#define PCI_IO_LIMIT_UPPER16	/;"	d
PCI_IO_RANGE_MASK	include/pci.h	/^#define  PCI_IO_RANGE_MASK	/;"	d
PCI_IO_RANGE_TYPE_16	include/pci.h	/^#define  PCI_IO_RANGE_TYPE_16	/;"	d
PCI_IO_RANGE_TYPE_32	include/pci.h	/^#define  PCI_IO_RANGE_TYPE_32	/;"	d
PCI_IO_RANGE_TYPE_MASK	include/pci.h	/^#define  PCI_IO_RANGE_TYPE_MASK /;"	d
PCI_IO_START	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_IO_START /;"	d
PCI_IRP_STAT	include/tsi108.h	/^#define PCI_IRP_STAT	/;"	d
PCI_IRP_STAT_P_CSR	include/tsi108.h	/^#define PCI_IRP_STAT_P_CSR	/;"	d
PCI_IRQ_LINES	include/faraday/ftpci100.h	/^#define PCI_IRQ_LINES	/;"	d
PCI_IRQ_VECTOR	board/mpl/common/pci_parts.h	/^#define PCI_IRQ_VECTOR(/;"	d
PCI_IWCR_W0C_EN	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W0C_EN	/;"	d
PCI_IWCR_W0C_EN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W0C_EN	/;"	d
PCI_IWCR_W0C_IO	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W0C_IO	/;"	d
PCI_IWCR_W0C_IO	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W0C_IO	/;"	d
PCI_IWCR_W0C_PRC_RD	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W0C_PRC_RD	/;"	d
PCI_IWCR_W0C_PRC_RD	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W0C_PRC_RD	/;"	d
PCI_IWCR_W0C_PRC_RDLN	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W0C_PRC_RDLN	/;"	d
PCI_IWCR_W0C_PRC_RDLN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W0C_PRC_RDLN	/;"	d
PCI_IWCR_W0C_PRC_RDMUL	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W0C_PRC_RDMUL	/;"	d
PCI_IWCR_W0C_PRC_RDMUL	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W0C_PRC_RDMUL	/;"	d
PCI_IWCR_W1C_EN	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W1C_EN	/;"	d
PCI_IWCR_W1C_EN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W1C_EN	/;"	d
PCI_IWCR_W1C_IO	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W1C_IO	/;"	d
PCI_IWCR_W1C_IO	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W1C_IO	/;"	d
PCI_IWCR_W1C_PRC_RD	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W1C_PRC_RD	/;"	d
PCI_IWCR_W1C_PRC_RD	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W1C_PRC_RD	/;"	d
PCI_IWCR_W1C_PRC_RDLN	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W1C_PRC_RDLN	/;"	d
PCI_IWCR_W1C_PRC_RDLN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W1C_PRC_RDLN	/;"	d
PCI_IWCR_W1C_PRC_RDMUL	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W1C_PRC_RDMUL	/;"	d
PCI_IWCR_W1C_PRC_RDMUL	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W1C_PRC_RDMUL	/;"	d
PCI_IWCR_W2C_EN	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W2C_EN	/;"	d
PCI_IWCR_W2C_EN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W2C_EN	/;"	d
PCI_IWCR_W2C_IO	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W2C_IO	/;"	d
PCI_IWCR_W2C_IO	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W2C_IO	/;"	d
PCI_IWCR_W2C_PRC_RD	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W2C_PRC_RD	/;"	d
PCI_IWCR_W2C_PRC_RD	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W2C_PRC_RD	/;"	d
PCI_IWCR_W2C_PRC_RDLN	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W2C_PRC_RDLN	/;"	d
PCI_IWCR_W2C_PRC_RDLN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W2C_PRC_RDLN	/;"	d
PCI_IWCR_W2C_PRC_RDMUL	arch/m68k/include/asm/m5445x.h	/^#define PCI_IWCR_W2C_PRC_RDMUL	/;"	d
PCI_IWCR_W2C_PRC_RDMUL	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_IWCR_W2C_PRC_RDMUL	/;"	d
PCI_LAST_DEVFN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_LAST_DEVFN /;"	d
PCI_LATENCY_TIMER	include/pci.h	/^#define PCI_LATENCY_TIMER	/;"	d
PCI_LTSSM	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define PCI_LTSSM	/;"	d	file:
PCI_LTSSM	arch/powerpc/include/asm/fsl_pci.h	/^#define PCI_LTSSM	/;"	d
PCI_LTSSM_L0	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define PCI_LTSSM_L0	/;"	d	file:
PCI_LTSSM_L0	arch/powerpc/include/asm/fsl_pci.h	/^#define  PCI_LTSSM_L0	/;"	d
PCI_MAC_ADDRESS_SIZE	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_MAC_ADDRESS_SIZE	/;"	d
PCI_MASK_BUS	include/pci.h	/^#define PCI_MASK_BUS(/;"	d
PCI_MASTER_ONLY	board/mpl/pati/pati.h	/^#define PCI_MASTER_ONLY	/;"	d
PCI_MAX_BAR_PER_FUNC	include/faraday/ftpci100.h	/^#define PCI_MAX_BAR_PER_FUNC	/;"	d
PCI_MAX_LAT	include/pci.h	/^#define PCI_MAX_LAT	/;"	d
PCI_MAX_PCI_DEVICES	include/pci.h	/^#define PCI_MAX_PCI_DEVICES	/;"	d
PCI_MAX_PCI_FUNCTIONS	include/pci.h	/^#define PCI_MAX_PCI_FUNCTIONS	/;"	d
PCI_MEMORY_BASE	include/pci.h	/^#define PCI_MEMORY_BASE	/;"	d
PCI_MEMORY_LIMIT	include/pci.h	/^#define PCI_MEMORY_LIMIT	/;"	d
PCI_MEMORY_RANGE_MASK	include/pci.h	/^#define  PCI_MEMORY_RANGE_MASK	/;"	d
PCI_MEMORY_RANGE_TYPE_MASK	include/pci.h	/^#define  PCI_MEMORY_RANGE_TYPE_MASK /;"	d
PCI_MEMR	board/renesas/sh7785lcr/rtl8169_mac.c	/^static unsigned char *PCI_MEMR;$/;"	v	typeref:typename:unsigned char *	file:
PCI_MEM_BASE_SIZE1	include/faraday/ftpci100.h	/^#define PCI_MEM_BASE_SIZE1	/;"	d
PCI_MEM_BASE_SIZE2	include/faraday/ftpci100.h	/^#define PCI_MEM_BASE_SIZE2	/;"	d
PCI_MEM_BASE_SIZE3	include/faraday/ftpci100.h	/^#define PCI_MEM_BASE_SIZE3	/;"	d
PCI_MEM_END	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_MEM_END /;"	d
PCI_MEM_START	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define PCI_MEM_START /;"	d
PCI_ME_EXT_SHA1	arch/x86/include/asm/me_common.h	/^#define  PCI_ME_EXT_SHA1	/;"	d
PCI_ME_EXT_SHA256	arch/x86/include/asm/me_common.h	/^#define  PCI_ME_EXT_SHA256	/;"	d
PCI_ME_GMES	arch/x86/include/asm/me_common.h	/^#define PCI_ME_GMES	/;"	d
PCI_ME_HER	arch/x86/include/asm/me_common.h	/^#define PCI_ME_HER(/;"	d
PCI_ME_HERES	arch/x86/include/asm/me_common.h	/^#define PCI_ME_HERES	/;"	d
PCI_ME_HFS	arch/x86/include/asm/me_common.h	/^#define PCI_ME_HFS	/;"	d
PCI_ME_HFS2	arch/x86/include/asm/arch-broadwell/me.h	/^#define PCI_ME_HFS2	/;"	d
PCI_ME_HFS5	arch/x86/include/asm/arch-broadwell/me.h	/^#define PCI_ME_HFS5	/;"	d
PCI_ME_H_GS	arch/x86/include/asm/me_common.h	/^#define PCI_ME_H_GS	/;"	d
PCI_ME_H_GS2	arch/x86/include/asm/arch-broadwell/me.h	/^#define PCI_ME_H_GS2	/;"	d
PCI_ME_MBP_GIVE_UP	arch/x86/include/asm/arch-broadwell/me.h	/^#define   PCI_ME_MBP_GIVE_UP	/;"	d
PCI_ME_UMA	arch/x86/include/asm/me_common.h	/^#define PCI_ME_UMA	/;"	d
PCI_MIN_GNT	include/pci.h	/^#define PCI_MIN_GNT	/;"	d
PCI_MISC_CSR	include/tsi108.h	/^#define PCI_MISC_CSR	/;"	d
PCI_MMIO_LCR_BASE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PCI_MMIO_LCR_BASE	/;"	d
PCI_MMIO_LCR_BASE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PCI_MMIO_LCR_BASE	/;"	d
PCI_MSI_ADDRESS_HI	include/pci.h	/^#define PCI_MSI_ADDRESS_HI	/;"	d
PCI_MSI_ADDRESS_LO	include/pci.h	/^#define PCI_MSI_ADDRESS_LO	/;"	d
PCI_MSI_DATA_32	include/pci.h	/^#define PCI_MSI_DATA_32	/;"	d
PCI_MSI_DATA_64	include/pci.h	/^#define PCI_MSI_DATA_64	/;"	d
PCI_MSI_FLAGS	include/pci.h	/^#define PCI_MSI_FLAGS	/;"	d
PCI_MSI_FLAGS_64BIT	include/pci.h	/^#define  PCI_MSI_FLAGS_64BIT	/;"	d
PCI_MSI_FLAGS_ENABLE	include/pci.h	/^#define  PCI_MSI_FLAGS_ENABLE	/;"	d
PCI_MSI_FLAGS_QMASK	include/pci.h	/^#define  PCI_MSI_FLAGS_QMASK	/;"	d
PCI_MSI_FLAGS_QSIZE	include/pci.h	/^#define  PCI_MSI_FLAGS_QSIZE	/;"	d
PCI_MSI_RFU	include/pci.h	/^#define PCI_MSI_RFU	/;"	d
PCI_MSTR0_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR0_LOCAL	/;"	d	file:
PCI_MSTR0_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR0_LOCAL /;"	d	file:
PCI_MSTR1_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR1_LOCAL	/;"	d	file:
PCI_MSTR_IO_BUS	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_IO_BUS /;"	d	file:
PCI_MSTR_IO_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_IO_LOCAL /;"	d	file:
PCI_MSTR_IO_SIZE	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_IO_SIZE /;"	d	file:
PCI_MSTR_MEMIO_BUS	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_MEMIO_BUS /;"	d	file:
PCI_MSTR_MEMIO_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_MEMIO_LOCAL /;"	d	file:
PCI_MSTR_MEMIO_SIZE	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_MEMIO_SIZE /;"	d	file:
PCI_MSTR_MEM_BUS	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_MEM_BUS /;"	d	file:
PCI_MSTR_MEM_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_MEM_LOCAL /;"	d	file:
PCI_MSTR_MEM_SIZE	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_MSTR_MEM_SIZE /;"	d	file:
PCI_MS_CONFIG	include/universe.h	/^#define PCI_MS_CONFIG	/;"	d
PCI_MS_IO	include/universe.h	/^#define PCI_MS_IO	/;"	d
PCI_MS_MEM	include/universe.h	/^#define PCI_MS_MEM	/;"	d
PCI_MS_Mxx	include/universe.h	/^#define PCI_MS_Mxx	/;"	d
PCI_NEXTITEMPTR	include/pci.h	/^#define PCI_NEXTITEMPTR /;"	d
PCI_NEXT_CAPABILITY	include/pcmcia/yenta.h	/^#define PCI_NEXT_CAPABILITY	/;"	d
PCI_ONE_PCI1	include/configs/MPC8349EMDS.h	/^#define PCI_ONE_PCI1$/;"	d
PCI_ONE_PCI1	include/configs/sbc8349.h	/^#define PCI_ONE_PCI1$/;"	d
PCI_ONE_PCI1	include/configs/vme8349.h	/^#define PCI_ONE_PCI1$/;"	d
PCI_OP	arch/m68k/cpu/mcf5445x/pci.c	/^#define PCI_OP(/;"	d	file:
PCI_OP	arch/m68k/cpu/mcf547x_8x/pci.c	/^#define PCI_OP(/;"	d	file:
PCI_OP	drivers/pci/pci.c	/^#define PCI_OP(/;"	d	file:
PCI_P2O_BAR0	include/tsi108.h	/^#define PCI_P2O_BAR0	/;"	d
PCI_P2O_BAR0_UPPER	include/tsi108.h	/^#define PCI_P2O_BAR0_UPPER	/;"	d
PCI_P2O_BAR2	include/tsi108.h	/^#define PCI_P2O_BAR2	/;"	d
PCI_P2O_BAR2_UPPER	include/tsi108.h	/^#define PCI_P2O_BAR2_UPPER	/;"	d
PCI_P2O_BAR3	include/tsi108.h	/^#define PCI_P2O_BAR3	/;"	d
PCI_P2O_BAR3_UPPER	include/tsi108.h	/^#define PCI_P2O_BAR3_UPPER	/;"	d
PCI_P2O_PAGE_SIZES	include/tsi108.h	/^#define PCI_P2O_PAGE_SIZES	/;"	d
PCI_PAR	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_PAR	/;"	d
PCI_PATCH	board/amcc/bamboo/bamboo.h	/^			    PCI_PATCH,$/;"	e	enum:config_list
PCI_PCIX_STAT	include/tsi108.h	/^#define PCI_PCIX_STAT	/;"	d
PCI_PDR	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_PDR	/;"	d
PCI_PFAB_BAR0	include/tsi108.h	/^#define PCI_PFAB_BAR0	/;"	d
PCI_PFAB_BAR0_UPPER	include/tsi108.h	/^#define PCI_PFAB_BAR0_UPPER	/;"	d
PCI_PFAB_IO	include/tsi108.h	/^#define PCI_PFAB_IO	/;"	d
PCI_PFAB_IO_UPPER	include/tsi108.h	/^#define PCI_PFAB_IO_UPPER	/;"	d
PCI_PFAB_MEM32	include/tsi108.h	/^#define PCI_PFAB_MEM32	/;"	d
PCI_PFAB_MEM32_MASK	include/tsi108.h	/^#define PCI_PFAB_MEM32_MASK	/;"	d
PCI_PFAB_MEM32_REMAP	include/tsi108.h	/^#define PCI_PFAB_MEM32_REMAP	/;"	d
PCI_PICR1	include/mpc106.h	/^#define PCI_PICR1	/;"	d
PCI_PICR2	include/mpc106.h	/^#define PCI_PICR2	/;"	d
PCI_PLBSEAR	include/pci.h	/^#define PCI_PLBSEAR /;"	d
PCI_PLBSESR0	include/pci.h	/^#define PCI_PLBSESR0 /;"	d
PCI_PLBSESR1	include/pci.h	/^#define PCI_PLBSESR1 /;"	d
PCI_PMC	include/pci.h	/^#define PCI_PMC /;"	d
PCI_PMCAP_AUX_PWR	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_AUX_PWR	/;"	d
PCI_PMCAP_D1_CAP	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_D1_CAP	/;"	d
PCI_PMCAP_D2_CAP	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_D2_CAP	/;"	d
PCI_PMCAP_DSI	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_DSI	/;"	d
PCI_PMCAP_DYN_DATA	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_DYN_DATA	/;"	d
PCI_PMCAP_PMECLK	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_PMECLK	/;"	d
PCI_PMCAP_PME_D0	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_PME_D0	/;"	d
PCI_PMCAP_PME_D1	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_PME_D1	/;"	d
PCI_PMCAP_PME_D2	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_PME_D2	/;"	d
PCI_PMCAP_PME_D3COLD	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_PME_D3COLD	/;"	d
PCI_PMCAP_PME_D3HOT	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_PME_D3HOT	/;"	d
PCI_PMCAP_VERSION_MASK	include/pcmcia/yenta.h	/^#define  PCI_PMCAP_VERSION_MASK	/;"	d
PCI_PMCSR	include/pci.h	/^#define PCI_PMCSR /;"	d
PCI_PMCSRBSE	include/pci.h	/^#define PCI_PMCSRBSE /;"	d
PCI_PMCS_DATASCALE_MASK	include/pcmcia/yenta.h	/^#define  PCI_PMCS_DATASCALE_MASK	/;"	d
PCI_PMCS_DATASCALE_SHIFT	include/pcmcia/yenta.h	/^#define  PCI_PMCS_DATASCALE_SHIFT	/;"	d
PCI_PMCS_DATASEL_MASK	include/pcmcia/yenta.h	/^#define  PCI_PMCS_DATASEL_MASK	/;"	d
PCI_PMCS_DATASEL_SHIFT	include/pcmcia/yenta.h	/^#define  PCI_PMCS_DATASEL_SHIFT	/;"	d
PCI_PMCS_PME_ENABLE	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PME_ENABLE	/;"	d
PCI_PMCS_PME_STATUS	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PME_STATUS	/;"	d
PCI_PMCS_PWR_STATE_D0	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PWR_STATE_D0	/;"	d
PCI_PMCS_PWR_STATE_D1	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PWR_STATE_D1	/;"	d
PCI_PMCS_PWR_STATE_D2	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PWR_STATE_D2	/;"	d
PCI_PMCS_PWR_STATE_D3	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PWR_STATE_D3	/;"	d
PCI_PMCS_PWR_STATE_MASK	include/pcmcia/yenta.h	/^#define  PCI_PMCS_PWR_STATE_MASK	/;"	d
PCI_PMSCRR	include/pci.h	/^#define PCI_PMSCRR /;"	d
PCI_PM_BPCC_ENABLE	include/pci.h	/^#define  PCI_PM_BPCC_ENABLE	/;"	d
PCI_PM_BRIDGE_EXT	include/pcmcia/yenta.h	/^#define PCI_PM_BRIDGE_EXT	/;"	d
PCI_PM_CAPABILITIES	include/pcmcia/yenta.h	/^#define PCI_PM_CAPABILITIES	/;"	d
PCI_PM_CAP_AUX_POWER	include/pci.h	/^#define  PCI_PM_CAP_AUX_POWER	/;"	d
PCI_PM_CAP_D1	include/pci.h	/^#define  PCI_PM_CAP_D1	/;"	d
PCI_PM_CAP_D2	include/pci.h	/^#define  PCI_PM_CAP_D2	/;"	d
PCI_PM_CAP_DSI	include/pci.h	/^#define  PCI_PM_CAP_DSI	/;"	d
PCI_PM_CAP_PME	include/pci.h	/^#define  PCI_PM_CAP_PME	/;"	d
PCI_PM_CAP_PME_CLOCK	include/pci.h	/^#define  PCI_PM_CAP_PME_CLOCK	/;"	d
PCI_PM_CAP_VER_MASK	include/pci.h	/^#define  PCI_PM_CAP_VER_MASK	/;"	d
PCI_PM_CONTROL_STATUS	include/pcmcia/yenta.h	/^#define PCI_PM_CONTROL_STATUS	/;"	d
PCI_PM_CTRL	include/pci.h	/^#define PCI_PM_CTRL	/;"	d
PCI_PM_CTRL_DATA_SCALE_MASK	include/pci.h	/^#define  PCI_PM_CTRL_DATA_SCALE_MASK	/;"	d
PCI_PM_CTRL_DATA_SEL_MASK	include/pci.h	/^#define  PCI_PM_CTRL_DATA_SEL_MASK	/;"	d
PCI_PM_CTRL_PME_ENABLE	include/pci.h	/^#define  PCI_PM_CTRL_PME_ENABLE /;"	d
PCI_PM_CTRL_PME_STATUS	include/pci.h	/^#define  PCI_PM_CTRL_PME_STATUS /;"	d
PCI_PM_CTRL_STATE_MASK	include/pci.h	/^#define  PCI_PM_CTRL_STATE_MASK /;"	d
PCI_PM_DATA	include/pcmcia/yenta.h	/^#define PCI_PM_DATA	/;"	d
PCI_PM_DATA_REGISTER	include/pci.h	/^#define PCI_PM_DATA_REGISTER	/;"	d
PCI_PM_PPB_B2_B3	include/pci.h	/^#define  PCI_PM_PPB_B2_B3	/;"	d
PCI_PM_PPB_EXTENSIONS	include/pci.h	/^#define PCI_PM_PPB_EXTENSIONS	/;"	d
PCI_PM_SIZEOF	include/pci.h	/^#define PCI_PM_SIZEOF	/;"	d
PCI_PNP	drivers/pci/Kconfig	/^config PCI_PNP$/;"	c
PCI_PREF_BASE_UPPER32	include/pci.h	/^#define PCI_PREF_BASE_UPPER32	/;"	d
PCI_PREF_LIMIT_UPPER32	include/pci.h	/^#define PCI_PREF_LIMIT_UPPER32	/;"	d
PCI_PREF_MEMORY_BASE	include/pci.h	/^#define PCI_PREF_MEMORY_BASE	/;"	d
PCI_PREF_MEMORY_LIMIT	include/pci.h	/^#define PCI_PREF_MEMORY_LIMIT	/;"	d
PCI_PREF_RANGE_MASK	include/pci.h	/^#define  PCI_PREF_RANGE_MASK	/;"	d
PCI_PREF_RANGE_TYPE_32	include/pci.h	/^#define  PCI_PREF_RANGE_TYPE_32 /;"	d
PCI_PREF_RANGE_TYPE_64	include/pci.h	/^#define  PCI_PREF_RANGE_TYPE_64 /;"	d
PCI_PREF_RANGE_TYPE_MASK	include/pci.h	/^#define  PCI_PREF_RANGE_TYPE_MASK /;"	d
PCI_PRIMARY_BUS	include/pci.h	/^#define PCI_PRIMARY_BUS	/;"	d
PCI_PRIMARY_CAR	board/esd/common/pci.c	/^#define PCI_PRIMARY_CAR	/;"	d	file:
PCI_PRIMARY_CDR	board/esd/common/pci.c	/^#define PCI_PRIMARY_CDR	/;"	d	file:
PCI_PROG	board/renesas/sh7785lcr/rtl8169.h	/^#define PCI_PROG	/;"	d
PCI_READ_VIA_DWORD_OP	drivers/pci/pci.c	/^#define PCI_READ_VIA_DWORD_OP(/;"	d	file:
PCI_REGION_IO	include/pci.h	/^#define PCI_REGION_IO	/;"	d
PCI_REGION_MEM	include/pci.h	/^#define PCI_REGION_MEM	/;"	d
PCI_REGION_PREFETCH	include/pci.h	/^#define PCI_REGION_PREFETCH	/;"	d
PCI_REGION_RO	include/pci.h	/^#define PCI_REGION_RO	/;"	d
PCI_REGION_SYS_MEMORY	include/pci.h	/^#define PCI_REGION_SYS_MEMORY	/;"	d
PCI_REGION_TYPE	include/pci.h	/^#define PCI_REGION_TYPE	/;"	d
PCI_REG_ADDR	arch/x86/include/asm/pci.h	/^#define PCI_REG_ADDR	/;"	d
PCI_REG_DATA	arch/x86/include/asm/pci.h	/^#define PCI_REG_DATA	/;"	d
PCI_REVISION_ID	include/pci.h	/^#define PCI_REVISION_ID	/;"	d
PCI_ROM_ADDRESS	include/pci.h	/^#define PCI_ROM_ADDRESS	/;"	d
PCI_ROM_ADDRESS1	include/pci.h	/^#define PCI_ROM_ADDRESS1	/;"	d
PCI_ROM_ADDRESS_ENABLE	include/pci.h	/^#define  PCI_ROM_ADDRESS_ENABLE /;"	d
PCI_ROM_ADDRESS_MASK	include/pci.h	/^#define PCI_ROM_ADDRESS_MASK	/;"	d
PCI_ROM_ALLOW_FALLBACK	include/pci_rom.h	/^	PCI_ROM_ALLOW_FALLBACK	= 1 << 1,$/;"	e	enum:pci_rom_emul
PCI_ROM_EMULATE	include/pci_rom.h	/^	PCI_ROM_EMULATE		= 0 << 0,$/;"	e	enum:pci_rom_emul
PCI_ROM_HDR	include/pci_rom.h	/^#define PCI_ROM_HDR	/;"	d
PCI_ROM_USE_NATIVE	include/pci_rom.h	/^	PCI_ROM_USE_NATIVE	= 1 << 0,$/;"	e	enum:pci_rom_emul
PCI_SANDBOX	drivers/pci/Kconfig	/^config PCI_SANDBOX$/;"	c
PCI_SCR_66M	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_66M	/;"	d
PCI_SCR_66M	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_66M	/;"	d
PCI_SCR_B	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_B	/;"	d
PCI_SCR_B	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_B	/;"	d
PCI_SCR_C	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_C	/;"	d
PCI_SCR_C	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_C	/;"	d
PCI_SCR_DP	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_DP	/;"	d
PCI_SCR_DP	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_DP	/;"	d
PCI_SCR_DT	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_DT	/;"	d
PCI_SCR_DT	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_DT	/;"	d
PCI_SCR_F	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_F	/;"	d
PCI_SCR_F	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_F	/;"	d
PCI_SCR_FC	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_FC	/;"	d
PCI_SCR_FC	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_FC	/;"	d
PCI_SCR_IO	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_IO	/;"	d
PCI_SCR_IO	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_IO	/;"	d
PCI_SCR_M	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_M	/;"	d
PCI_SCR_M	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_M	/;"	d
PCI_SCR_MA	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_MA	/;"	d
PCI_SCR_MA	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_MA	/;"	d
PCI_SCR_MW	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_MW	/;"	d
PCI_SCR_MW	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_MW	/;"	d
PCI_SCR_PE	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_PE	/;"	d
PCI_SCR_PE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_PE	/;"	d
PCI_SCR_PER	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_PER	/;"	d
PCI_SCR_PER	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_PER	/;"	d
PCI_SCR_R	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_R	/;"	d
PCI_SCR_R	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_R	/;"	d
PCI_SCR_S	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_S	/;"	d
PCI_SCR_S	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_S	/;"	d
PCI_SCR_SE	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_SE	/;"	d
PCI_SCR_SE	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_SE	/;"	d
PCI_SCR_SP	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_SP	/;"	d
PCI_SCR_SP	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_SP	/;"	d
PCI_SCR_ST	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_ST	/;"	d
PCI_SCR_ST	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_ST	/;"	d
PCI_SCR_TR	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_TR	/;"	d
PCI_SCR_TR	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_TR	/;"	d
PCI_SCR_TS	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_TS	/;"	d
PCI_SCR_TS	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_TS	/;"	d
PCI_SCR_V	arch/m68k/include/asm/m5445x.h	/^#define PCI_SCR_V	/;"	d
PCI_SCR_V	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_SCR_V	/;"	d
PCI_SECONDARY_BUS	include/pci.h	/^#define PCI_SECONDARY_BUS	/;"	d
PCI_SEC_LATENCY_TIMER	include/pci.h	/^#define PCI_SEC_LATENCY_TIMER	/;"	d
PCI_SEC_STATUS	include/pci.h	/^#define PCI_SEC_STATUS	/;"	d
PCI_SH7751R_ID	drivers/pci/pci_sh7751.c	/^#define PCI_SH7751R_ID	/;"	d	file:
PCI_SH7751_ID	drivers/pci/pci_sh7751.c	/^#define PCI_SH7751_ID	/;"	d	file:
PCI_SID_CHASSIS_NR	include/pci.h	/^#define PCI_SID_CHASSIS_NR	/;"	d
PCI_SID_ESR	include/pci.h	/^#define PCI_SID_ESR	/;"	d
PCI_SID_ESR_FIC	include/pci.h	/^#define  PCI_SID_ESR_FIC	/;"	d
PCI_SID_ESR_NSLOTS	include/pci.h	/^#define  PCI_SID_ESR_NSLOTS	/;"	d
PCI_SIZE_16	include/pci.h	/^	PCI_SIZE_16,$/;"	e	enum:pci_size_t
PCI_SIZE_32	include/pci.h	/^	PCI_SIZE_32,$/;"	e	enum:pci_size_t
PCI_SIZE_8	include/pci.h	/^	PCI_SIZE_8,$/;"	e	enum:pci_size_t
PCI_SLV_MEM_BUS	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_SLV_MEM_BUS /;"	d	file:
PCI_SLV_MEM_LOCAL	arch/powerpc/cpu/mpc8260/pci.c	/^#define PCI_SLV_MEM_LOCAL /;"	d	file:
PCI_SPECIAL_CYCLE_TYPE1	arch/x86/lib/bios_interrupts.c	/^#define PCI_SPECIAL_CYCLE_TYPE1	/;"	d	file:
PCI_STATUS	include/pci.h	/^#define PCI_STATUS	/;"	d
PCI_STATUS_66MHZ	include/pci.h	/^#define  PCI_STATUS_66MHZ	/;"	d
PCI_STATUS_CAPLIST	include/pcmcia/yenta.h	/^#define PCI_STATUS_CAPLIST	/;"	d
PCI_STATUS_CAP_LIST	include/pci.h	/^#define  PCI_STATUS_CAP_LIST	/;"	d
PCI_STATUS_DETECTED_PARITY	include/pci.h	/^#define  PCI_STATUS_DETECTED_PARITY /;"	d
PCI_STATUS_DEVSEL_FAST	include/pci.h	/^#define  PCI_STATUS_DEVSEL_FAST /;"	d
PCI_STATUS_DEVSEL_MASK	include/pci.h	/^#define  PCI_STATUS_DEVSEL_MASK /;"	d
PCI_STATUS_DEVSEL_MEDIUM	include/pci.h	/^#define  PCI_STATUS_DEVSEL_MEDIUM /;"	d
PCI_STATUS_DEVSEL_SLOW	include/pci.h	/^#define  PCI_STATUS_DEVSEL_SLOW /;"	d
PCI_STATUS_FAST_BACK	include/pci.h	/^#define  PCI_STATUS_FAST_BACK	/;"	d
PCI_STATUS_PARITY	include/pci.h	/^#define  PCI_STATUS_PARITY	/;"	d
PCI_STATUS_REC_MASTER_ABORT	include/pci.h	/^#define  PCI_STATUS_REC_MASTER_ABORT /;"	d
PCI_STATUS_REC_TARGET_ABORT	include/pci.h	/^#define  PCI_STATUS_REC_TARGET_ABORT /;"	d
PCI_STATUS_SIG_SYSTEM_ERROR	include/pci.h	/^#define  PCI_STATUS_SIG_SYSTEM_ERROR /;"	d
PCI_STATUS_SIG_TARGET_ABORT	include/pci.h	/^#define  PCI_STATUS_SIG_TARGET_ABORT /;"	d
PCI_STATUS_UDF	include/pci.h	/^#define  PCI_STATUS_UDF	/;"	d
PCI_STAT_NO_RSV_BITS	include/mpc106.h	/^#define PCI_STAT_NO_RSV_BITS	/;"	d
PCI_SUBBUSNUM	include/mpc106.h	/^#define PCI_SUBBUSNUM	/;"	d
PCI_SUBDEVICE_ID_AFAVLAB_P061	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_AFAVLAB_P061	/;"	d
PCI_SUBDEVICE_ID_AT_2700FX	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_AT_2700FX	/;"	d
PCI_SUBDEVICE_ID_AT_2701FX	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_AT_2701FX	/;"	d
PCI_SUBDEVICE_ID_CCD_BN1SM	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN1SM	/;"	d
PCI_SUBDEVICE_ID_CCD_BN2S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN2S	/;"	d
PCI_SUBDEVICE_ID_CCD_BN2SM	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN2SM	/;"	d
PCI_SUBDEVICE_ID_CCD_BN4S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN4S	/;"	d
PCI_SUBDEVICE_ID_CCD_BN4SM	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN4SM	/;"	d
PCI_SUBDEVICE_ID_CCD_BN8S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN8S	/;"	d
PCI_SUBDEVICE_ID_CCD_BN8SP	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BN8SP	/;"	d
PCI_SUBDEVICE_ID_CCD_BNE1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BNE1	/;"	d
PCI_SUBDEVICE_ID_CCD_BNE1D	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BNE1D	/;"	d
PCI_SUBDEVICE_ID_CCD_BNE1DP	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BNE1DP	/;"	d
PCI_SUBDEVICE_ID_CCD_BNE1M	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_BNE1M	/;"	d
PCI_SUBDEVICE_ID_CCD_HFC4S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_HFC4S	/;"	d
PCI_SUBDEVICE_ID_CCD_HFC8S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_HFC8S	/;"	d
PCI_SUBDEVICE_ID_CCD_HFCE1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_HFCE1	/;"	d
PCI_SUBDEVICE_ID_CCD_IOB1E1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_IOB1E1	/;"	d
PCI_SUBDEVICE_ID_CCD_IOB4ST	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_IOB4ST	/;"	d
PCI_SUBDEVICE_ID_CCD_IOB8ST	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_IOB8ST	/;"	d
PCI_SUBDEVICE_ID_CCD_IOB8STR	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_IOB8STR	/;"	d
PCI_SUBDEVICE_ID_CCD_IOB8ST_1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_IOB8ST_1	/;"	d
PCI_SUBDEVICE_ID_CCD_JH4S20	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_JH4S20	/;"	d
PCI_SUBDEVICE_ID_CCD_JH8S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_JH8S	/;"	d
PCI_SUBDEVICE_ID_CCD_JHSE1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_JHSE1	/;"	d
PCI_SUBDEVICE_ID_CCD_OV2S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_OV2S	/;"	d
PCI_SUBDEVICE_ID_CCD_OV4S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_OV4S	/;"	d
PCI_SUBDEVICE_ID_CCD_OV8S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_OV8S	/;"	d
PCI_SUBDEVICE_ID_CCD_PMX2S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_PMX2S	/;"	d
PCI_SUBDEVICE_ID_CCD_SPD4S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_SPD4S	/;"	d
PCI_SUBDEVICE_ID_CCD_SPDE1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_SPDE1	/;"	d
PCI_SUBDEVICE_ID_CCD_SWYX4S	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CCD_SWYX4S	/;"	d
PCI_SUBDEVICE_ID_CHASE_PCIFAST16	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CHASE_PCIFAST16	/;"	d
PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC	/;"	d
PCI_SUBDEVICE_ID_CHASE_PCIFAST4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CHASE_PCIFAST4	/;"	d
PCI_SUBDEVICE_ID_CHASE_PCIFAST8	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CHASE_PCIFAST8	/;"	d
PCI_SUBDEVICE_ID_CHASE_PCIRAS4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CHASE_PCIRAS4	/;"	d
PCI_SUBDEVICE_ID_CHASE_PCIRAS8	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CHASE_PCIRAS8	/;"	d
PCI_SUBDEVICE_ID_COMPUTONE_PG4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_COMPUTONE_PG4	/;"	d
PCI_SUBDEVICE_ID_COMPUTONE_PG6	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_COMPUTONE_PG6	/;"	d
PCI_SUBDEVICE_ID_COMPUTONE_PG8	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_COMPUTONE_PG8	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_PTM	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_PTM	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_NT960PCI	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_NT960PCI	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2	/;"	d
PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4	/;"	d
PCI_SUBDEVICE_ID_CREATIVE_HENDRIX	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CREATIVE_HENDRIX	/;"	d
PCI_SUBDEVICE_ID_CREATIVE_SB0760	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CREATIVE_SB0760	/;"	d
PCI_SUBDEVICE_ID_CREATIVE_SB08801	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CREATIVE_SB08801	/;"	d
PCI_SUBDEVICE_ID_CREATIVE_SB08802	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CREATIVE_SB08802	/;"	d
PCI_SUBDEVICE_ID_CREATIVE_SB08803	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CREATIVE_SB08803	/;"	d
PCI_SUBDEVICE_ID_CREATIVE_SB1270	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_CREATIVE_SB1270	/;"	d
PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_CAE_SERIAL_SUBSYSTEM	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_CAE_SERIAL_SUBSYSTEM	/;"	d
PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_SERIAL_SUBSYSTEM	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_SERIAL_SUBSYSTEM	/;"	d
PCI_SUBDEVICE_ID_EXSYS_4014	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_EXSYS_4014	/;"	d
PCI_SUBDEVICE_ID_EXSYS_4055	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_EXSYS_4055	/;"	d
PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2	/;"	d
PCI_SUBDEVICE_ID_HYPERCOPE_ERGO	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO	/;"	d
PCI_SUBDEVICE_ID_HYPERCOPE_METRO	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO	/;"	d
PCI_SUBDEVICE_ID_HYPERCOPE_OLD_ERGO	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_HYPERCOPE_OLD_ERGO	/;"	d
PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT	/;"	d
PCI_SUBDEVICE_ID_KEYSPAN_SX2	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_KEYSPAN_SX2	/;"	d
PCI_SUBDEVICE_ID_OXSEMI_C950	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_OXSEMI_C950	/;"	d
PCI_SUBDEVICE_ID_PCI_RAS4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_PCI_RAS4 /;"	d
PCI_SUBDEVICE_ID_PCI_RAS8	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_PCI_RAS8 /;"	d
PCI_SUBDEVICE_ID_SBE_2T3E3_P0	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_SBE_2T3E3_P0	/;"	d
PCI_SUBDEVICE_ID_SBE_2T3E3_P1	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_SBE_2T3E3_P1	/;"	d
PCI_SUBDEVICE_ID_SBE_T3E3	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_SBE_T3E3	/;"	d
PCI_SUBDEVICE_ID_SIIG_DUAL_SERIAL	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_SIIG_DUAL_SERIAL	/;"	d
PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL	/;"	d
PCI_SUBDEVICE_ID_SPECIALIX_SPEED4	include/pci_ids.h	/^#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 /;"	d
PCI_SUBORDINATE_BUS	include/pci.h	/^#define PCI_SUBORDINATE_BUS	/;"	d
PCI_SUBSYSTEM_ID	include/pci.h	/^#define PCI_SUBSYSTEM_ID	/;"	d
PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD	include/pci_ids.h	/^#define PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD	/;"	d
PCI_SUBSYSTEM_VENDOR_ID	include/pci.h	/^#define PCI_SUBSYSTEM_VENDOR_ID /;"	d
PCI_SUBVENDOR_ID_CHASE_PCIFAST	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_CHASE_PCIFAST	/;"	d
PCI_SUBVENDOR_ID_CHASE_PCIRAS	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_CHASE_PCIRAS	/;"	d
PCI_SUBVENDOR_ID_COMPUTONE	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_COMPUTONE	/;"	d
PCI_SUBVENDOR_ID_CONNECT_TECH	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_CONNECT_TECH	/;"	d
PCI_SUBVENDOR_ID_EXSYS	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_EXSYS	/;"	d
PCI_SUBVENDOR_ID_IBM	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_IBM	/;"	d
PCI_SUBVENDOR_ID_KEYSPAN	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_KEYSPAN	/;"	d
PCI_SUBVENDOR_ID_PERLE	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_PERLE /;"	d
PCI_SUBVENDOR_ID_SIIG	include/pci_ids.h	/^#define PCI_SUBVENDOR_ID_SIIG	/;"	d
PCI_TBATR_BAT	arch/m68k/include/asm/m5445x.h	/^#define PCI_TBATR_BAT(/;"	d
PCI_TBATR_BAT0	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TBATR_BAT0(/;"	d
PCI_TBATR_BAT1	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TBATR_BAT1(/;"	d
PCI_TBATR_EN	arch/m68k/include/asm/m5445x.h	/^#define PCI_TBATR_EN	/;"	d
PCI_TBATR_EN	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TBATR_EN	/;"	d
PCI_TCR1_B0E	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_B0E	/;"	d
PCI_TCR1_B1E	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_B1E	/;"	d
PCI_TCR1_B2E	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_B2E	/;"	d
PCI_TCR1_B3E	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_B3E	/;"	d
PCI_TCR1_B4E	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_B4E	/;"	d
PCI_TCR1_B5E	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_B5E	/;"	d
PCI_TCR1_CR	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_CR	/;"	d
PCI_TCR1_LD	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR1_LD	/;"	d
PCI_TCR1_LD	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_LD	/;"	d
PCI_TCR1_P	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR1_P	/;"	d
PCI_TCR1_P	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_P	/;"	d
PCI_TCR1_PID	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR1_PID	/;"	d
PCI_TCR1_PID	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_PID	/;"	d
PCI_TCR1_WCD	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR1_WCD	/;"	d
PCI_TCR1_WCD	arch/m68k/include/asm/m547x_8x.h	/^#define PCI_TCR1_WCD	/;"	d
PCI_TCR2_B0E	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_B0E	/;"	d
PCI_TCR2_B1E	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_B1E	/;"	d
PCI_TCR2_B2E	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_B2E	/;"	d
PCI_TCR2_B3E	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_B3E	/;"	d
PCI_TCR2_B4E	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_B4E	/;"	d
PCI_TCR2_B5E	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_B5E	/;"	d
PCI_TCR2_CR	arch/m68k/include/asm/m5445x.h	/^#define PCI_TCR2_CR	/;"	d
PCI_TEGRA	drivers/pci/Kconfig	/^config PCI_TEGRA$/;"	c
PCI_ULI5261_ID	drivers/net/uli526x.c	/^#define PCI_ULI5261_ID	/;"	d	file:
PCI_ULI5263_ID	drivers/net/uli526x.c	/^#define PCI_ULI5263_ID	/;"	d	file:
PCI_VDEVICE	include/pci.h	/^#define PCI_VDEVICE(/;"	d
PCI_VENDEV	include/pci.h	/^#define PCI_VENDEV(/;"	d
PCI_VENDOR	cmd/universe.c	/^#define PCI_VENDOR /;"	d	file:
PCI_VENDOR_ID	include/pci.h	/^#define PCI_VENDOR_ID	/;"	d
PCI_VENDOR_ID_3COM	include/pci_ids.h	/^#define PCI_VENDOR_ID_3COM	/;"	d
PCI_VENDOR_ID_3COM_2	include/pci_ids.h	/^#define PCI_VENDOR_ID_3COM_2	/;"	d
PCI_VENDOR_ID_3DFX	include/pci_ids.h	/^#define PCI_VENDOR_ID_3DFX	/;"	d
PCI_VENDOR_ID_3DLABS	include/pci_ids.h	/^#define PCI_VENDOR_ID_3DLABS	/;"	d
PCI_VENDOR_ID_3WARE	include/pci_ids.h	/^#define PCI_VENDOR_ID_3WARE	/;"	d
PCI_VENDOR_ID_ABOCOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_ABOCOM	/;"	d
PCI_VENDOR_ID_ACCESSIO	include/pci_ids.h	/^#define PCI_VENDOR_ID_ACCESSIO	/;"	d
PCI_VENDOR_ID_ADAPTEC	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADAPTEC	/;"	d
PCI_VENDOR_ID_ADAPTEC2	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADAPTEC2	/;"	d
PCI_VENDOR_ID_ADDIDATA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADDIDATA /;"	d
PCI_VENDOR_ID_ADDIDATA_OLD	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADDIDATA_OLD /;"	d
PCI_VENDOR_ID_ADL	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADL	/;"	d
PCI_VENDOR_ID_ADLINK	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADLINK	/;"	d
PCI_VENDOR_ID_ADVANTECH	include/pci_ids.h	/^#define PCI_VENDOR_ID_ADVANTECH	/;"	d
PCI_VENDOR_ID_AFAVLAB	include/pci_ids.h	/^#define PCI_VENDOR_ID_AFAVLAB	/;"	d
PCI_VENDOR_ID_AI	include/pci_ids.h	/^#define PCI_VENDOR_ID_AI	/;"	d
PCI_VENDOR_ID_AKS	include/pci_ids.h	/^#define PCI_VENDOR_ID_AKS	/;"	d
PCI_VENDOR_ID_AL	include/pci_ids.h	/^#define PCI_VENDOR_ID_AL	/;"	d
PCI_VENDOR_ID_ALTEON	include/pci_ids.h	/^#define PCI_VENDOR_ID_ALTEON	/;"	d
PCI_VENDOR_ID_ALTIMA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ALTIMA	/;"	d
PCI_VENDOR_ID_AMBIT	include/pci_ids.h	/^#define PCI_VENDOR_ID_AMBIT	/;"	d
PCI_VENDOR_ID_AMCC	include/pci_ids.h	/^#define PCI_VENDOR_ID_AMCC	/;"	d
PCI_VENDOR_ID_AMD	include/pci_ids.h	/^#define PCI_VENDOR_ID_AMD	/;"	d
PCI_VENDOR_ID_AMI	include/pci_ids.h	/^#define PCI_VENDOR_ID_AMI	/;"	d
PCI_VENDOR_ID_AMPLICON	include/pci_ids.h	/^#define PCI_VENDOR_ID_AMPLICON	/;"	d
PCI_VENDOR_ID_ANALOG_DEVICES	include/pci_ids.h	/^#define PCI_VENDOR_ID_ANALOG_DEVICES	/;"	d
PCI_VENDOR_ID_ANIGMA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ANIGMA	/;"	d
PCI_VENDOR_ID_APPLE	include/pci_ids.h	/^#define PCI_VENDOR_ID_APPLE	/;"	d
PCI_VENDOR_ID_APPLICOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_APPLICOM	/;"	d
PCI_VENDOR_ID_ARECA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ARECA	/;"	d
PCI_VENDOR_ID_ARIMA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ARIMA	/;"	d
PCI_VENDOR_ID_ARTOP	include/pci_ids.h	/^#define PCI_VENDOR_ID_ARTOP	/;"	d
PCI_VENDOR_ID_ASMEDIA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ASMEDIA	/;"	d
PCI_VENDOR_ID_ASUSTEK	include/pci_ids.h	/^#define PCI_VENDOR_ID_ASUSTEK	/;"	d
PCI_VENDOR_ID_AT	include/pci_ids.h	/^#define PCI_VENDOR_ID_AT	/;"	d
PCI_VENDOR_ID_ATHEROS	include/pci_ids.h	/^#define PCI_VENDOR_ID_ATHEROS	/;"	d
PCI_VENDOR_ID_ATI	include/pci_ids.h	/^#define PCI_VENDOR_ID_ATI	/;"	d
PCI_VENDOR_ID_ATT	include/pci_ids.h	/^#define PCI_VENDOR_ID_ATT	/;"	d
PCI_VENDOR_ID_ATTANSIC	include/pci_ids.h	/^#define PCI_VENDOR_ID_ATTANSIC	/;"	d
PCI_VENDOR_ID_ATTO	include/pci_ids.h	/^#define PCI_VENDOR_ID_ATTO	/;"	d
PCI_VENDOR_ID_AUREAL	include/pci_ids.h	/^#define PCI_VENDOR_ID_AUREAL	/;"	d
PCI_VENDOR_ID_AVM	include/pci_ids.h	/^#define PCI_VENDOR_ID_AVM	/;"	d
PCI_VENDOR_ID_AZWAVE	include/pci_ids.h	/^#define PCI_VENDOR_ID_AZWAVE	/;"	d
PCI_VENDOR_ID_BCM_GVC	include/pci_ids.h	/^#define PCI_VENDOR_ID_BCM_GVC /;"	d
PCI_VENDOR_ID_BELKIN	include/pci_ids.h	/^#define PCI_VENDOR_ID_BELKIN	/;"	d
PCI_VENDOR_ID_BERKOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_BERKOM	/;"	d
PCI_VENDOR_ID_BROADCOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_BROADCOM	/;"	d
PCI_VENDOR_ID_BROCADE	include/pci_ids.h	/^#define PCI_VENDOR_ID_BROCADE	/;"	d
PCI_VENDOR_ID_BROOKTREE	include/pci_ids.h	/^#define PCI_VENDOR_ID_BROOKTREE	/;"	d
PCI_VENDOR_ID_BUSLOGIC	include/pci_ids.h	/^#define PCI_VENDOR_ID_BUSLOGIC	/;"	d
PCI_VENDOR_ID_CB	include/pci_ids.h	/^#define PCI_VENDOR_ID_CB	/;"	d
PCI_VENDOR_ID_CCD	include/pci_ids.h	/^#define PCI_VENDOR_ID_CCD	/;"	d
PCI_VENDOR_ID_CENATEK	include/pci_ids.h	/^#define PCI_VENDOR_ID_CENATEK	/;"	d
PCI_VENDOR_ID_CHELSIO	include/pci_ids.h	/^#define PCI_VENDOR_ID_CHELSIO	/;"	d
PCI_VENDOR_ID_CIRCUITCO	include/pci_ids.h	/^#define PCI_VENDOR_ID_CIRCUITCO	/;"	d
PCI_VENDOR_ID_CIRRUS	include/pci_ids.h	/^#define PCI_VENDOR_ID_CIRRUS	/;"	d
PCI_VENDOR_ID_CISCO	include/pci_ids.h	/^#define PCI_VENDOR_ID_CISCO	/;"	d
PCI_VENDOR_ID_CMD	include/pci_ids.h	/^#define PCI_VENDOR_ID_CMD	/;"	d
PCI_VENDOR_ID_CMEDIA	include/pci_ids.h	/^#define PCI_VENDOR_ID_CMEDIA	/;"	d
PCI_VENDOR_ID_CNET	include/pci_ids.h	/^#define PCI_VENDOR_ID_CNET	/;"	d
PCI_VENDOR_ID_COMMTECH	include/pci_ids.h	/^#define PCI_VENDOR_ID_COMMTECH	/;"	d
PCI_VENDOR_ID_COMPAQ	include/pci_ids.h	/^#define PCI_VENDOR_ID_COMPAQ	/;"	d
PCI_VENDOR_ID_COMPEX	include/pci_ids.h	/^#define PCI_VENDOR_ID_COMPEX	/;"	d
PCI_VENDOR_ID_COMPEX2	include/pci_ids.h	/^#define PCI_VENDOR_ID_COMPEX2	/;"	d
PCI_VENDOR_ID_COMPUTONE	include/pci_ids.h	/^#define PCI_VENDOR_ID_COMPUTONE	/;"	d
PCI_VENDOR_ID_CONTAQ	include/pci_ids.h	/^#define PCI_VENDOR_ID_CONTAQ	/;"	d
PCI_VENDOR_ID_CREATIVE	include/pci_ids.h	/^#define PCI_VENDOR_ID_CREATIVE	/;"	d
PCI_VENDOR_ID_CT	include/pci_ids.h	/^#define PCI_VENDOR_ID_CT	/;"	d
PCI_VENDOR_ID_CYCLADES	include/pci_ids.h	/^#define PCI_VENDOR_ID_CYCLADES	/;"	d
PCI_VENDOR_ID_CYRIX	include/pci_ids.h	/^#define PCI_VENDOR_ID_CYRIX	/;"	d
PCI_VENDOR_ID_DAVICOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_DAVICOM	/;"	d
PCI_VENDOR_ID_DCI	include/pci_ids.h	/^#define PCI_VENDOR_ID_DCI	/;"	d
PCI_VENDOR_ID_DEC	include/pci_ids.h	/^#define PCI_VENDOR_ID_DEC	/;"	d
PCI_VENDOR_ID_DELL	include/pci_ids.h	/^#define PCI_VENDOR_ID_DELL	/;"	d
PCI_VENDOR_ID_DFI	include/pci_ids.h	/^#define PCI_VENDOR_ID_DFI	/;"	d
PCI_VENDOR_ID_DIGI	include/pci_ids.h	/^#define PCI_VENDOR_ID_DIGI	/;"	d
PCI_VENDOR_ID_DIGIGRAM	include/pci_ids.h	/^#define PCI_VENDOR_ID_DIGIGRAM	/;"	d
PCI_VENDOR_ID_DIGIUM	include/pci_ids.h	/^#define PCI_VENDOR_ID_DIGIUM	/;"	d
PCI_VENDOR_ID_DLINK	include/pci_ids.h	/^#define PCI_VENDOR_ID_DLINK	/;"	d
PCI_VENDOR_ID_DOMEX	include/pci_ids.h	/^#define PCI_VENDOR_ID_DOMEX	/;"	d
PCI_VENDOR_ID_DPT	include/pci_ids.h	/^#define PCI_VENDOR_ID_DPT	/;"	d
PCI_VENDOR_ID_DUNORD	include/pci_ids.h	/^#define PCI_VENDOR_ID_DUNORD	/;"	d
PCI_VENDOR_ID_DYNALINK	include/pci_ids.h	/^#define PCI_VENDOR_ID_DYNALINK	/;"	d
PCI_VENDOR_ID_ECTIVA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ECTIVA	/;"	d
PCI_VENDOR_ID_EF	include/pci_ids.h	/^#define PCI_VENDOR_ID_EF	/;"	d
PCI_VENDOR_ID_EFAR	include/pci_ids.h	/^#define PCI_VENDOR_ID_EFAR	/;"	d
PCI_VENDOR_ID_EICON	include/pci_ids.h	/^#define PCI_VENDOR_ID_EICON	/;"	d
PCI_VENDOR_ID_ELECTRONICDESIGNGMBH	include/pci_ids.h	/^#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH /;"	d
PCI_VENDOR_ID_ELSA	include/pci_ids.h	/^#define PCI_VENDOR_ID_ELSA	/;"	d
PCI_VENDOR_ID_ENE	include/pci_ids.h	/^#define PCI_VENDOR_ID_ENE	/;"	d
PCI_VENDOR_ID_ENSONIQ	include/pci_ids.h	/^#define PCI_VENDOR_ID_ENSONIQ	/;"	d
PCI_VENDOR_ID_ESDGMBH	include/pci_ids.h	/^#define PCI_VENDOR_ID_ESDGMBH	/;"	d
PCI_VENDOR_ID_ESS	include/pci_ids.h	/^#define PCI_VENDOR_ID_ESS	/;"	d
PCI_VENDOR_ID_ESSENTIAL	include/pci_ids.h	/^#define PCI_VENDOR_ID_ESSENTIAL	/;"	d
PCI_VENDOR_ID_EXAR	include/pci_ids.h	/^#define PCI_VENDOR_ID_EXAR	/;"	d
PCI_VENDOR_ID_FARSITE	include/pci_ids.h	/^#define PCI_VENDOR_ID_FARSITE /;"	d
PCI_VENDOR_ID_FD	include/pci_ids.h	/^#define PCI_VENDOR_ID_FD	/;"	d
PCI_VENDOR_ID_FORE	include/pci_ids.h	/^#define PCI_VENDOR_ID_FORE	/;"	d
PCI_VENDOR_ID_FOXCONN	include/pci_ids.h	/^#define PCI_VENDOR_ID_FOXCONN	/;"	d
PCI_VENDOR_ID_FREESCALE	include/pci_ids.h	/^#define PCI_VENDOR_ID_FREESCALE	/;"	d
PCI_VENDOR_ID_FUJITSU	include/mb862xx.h	/^#define PCI_VENDOR_ID_FUJITSU	/;"	d
PCI_VENDOR_ID_FUJITSU_ME	include/pci_ids.h	/^#define PCI_VENDOR_ID_FUJITSU_ME	/;"	d
PCI_VENDOR_ID_GIGABYTE	include/pci_ids.h	/^#define PCI_VENDOR_ID_GIGABYTE	/;"	d
PCI_VENDOR_ID_HINT	include/pci_ids.h	/^#define PCI_VENDOR_ID_HINT /;"	d
PCI_VENDOR_ID_HOLTEK	include/pci_ids.h	/^#define PCI_VENDOR_ID_HOLTEK	/;"	d
PCI_VENDOR_ID_HP	include/pci_ids.h	/^#define PCI_VENDOR_ID_HP	/;"	d
PCI_VENDOR_ID_HP_3PAR	include/pci_ids.h	/^#define PCI_VENDOR_ID_HP_3PAR	/;"	d
PCI_VENDOR_ID_HYPERCOPE	include/pci_ids.h	/^#define PCI_VENDOR_ID_HYPERCOPE	/;"	d
PCI_VENDOR_ID_IBM	include/pci_ids.h	/^#define PCI_VENDOR_ID_IBM	/;"	d
PCI_VENDOR_ID_ICE	include/pci_ids.h	/^#define PCI_VENDOR_ID_ICE	/;"	d
PCI_VENDOR_ID_IDT	include/pci_ids.h	/^#define PCI_VENDOR_ID_IDT	/;"	d
PCI_VENDOR_ID_IMS	include/pci_ids.h	/^#define PCI_VENDOR_ID_IMS	/;"	d
PCI_VENDOR_ID_INIT	include/pci_ids.h	/^#define PCI_VENDOR_ID_INIT	/;"	d
PCI_VENDOR_ID_INTASHIELD	include/pci_ids.h	/^#define PCI_VENDOR_ID_INTASHIELD	/;"	d
PCI_VENDOR_ID_INTEL	include/pci_ids.h	/^#define PCI_VENDOR_ID_INTEL	/;"	d
PCI_VENDOR_ID_INTERG	include/pci_ids.h	/^#define PCI_VENDOR_ID_INTERG	/;"	d
PCI_VENDOR_ID_IOMEGA	include/pci_ids.h	/^#define PCI_VENDOR_ID_IOMEGA	/;"	d
PCI_VENDOR_ID_ITE	include/pci_ids.h	/^#define PCI_VENDOR_ID_ITE	/;"	d
PCI_VENDOR_ID_JMICRON	include/pci_ids.h	/^#define PCI_VENDOR_ID_JMICRON	/;"	d
PCI_VENDOR_ID_KAWASAKI	include/pci_ids.h	/^#define PCI_VENDOR_ID_KAWASAKI	/;"	d
PCI_VENDOR_ID_KORENIX	include/pci_ids.h	/^#define PCI_VENDOR_ID_KORENIX	/;"	d
PCI_VENDOR_ID_KTI	include/pci_ids.h	/^#define PCI_VENDOR_ID_KTI	/;"	d
PCI_VENDOR_ID_LAVA	include/pci_ids.h	/^#define PCI_VENDOR_ID_LAVA	/;"	d
PCI_VENDOR_ID_LENOVO	include/pci_ids.h	/^#define PCI_VENDOR_ID_LENOVO	/;"	d
PCI_VENDOR_ID_LINKSYS	include/pci_ids.h	/^#define PCI_VENDOR_ID_LINKSYS	/;"	d
PCI_VENDOR_ID_LMC	include/pci_ids.h	/^#define PCI_VENDOR_ID_LMC	/;"	d
PCI_VENDOR_ID_LSI_LOGIC	include/pci_ids.h	/^#define PCI_VENDOR_ID_LSI_LOGIC	/;"	d
PCI_VENDOR_ID_MADGE	include/pci_ids.h	/^#define PCI_VENDOR_ID_MADGE	/;"	d
PCI_VENDOR_ID_MAINPINE	include/pci_ids.h	/^#define PCI_VENDOR_ID_MAINPINE	/;"	d
PCI_VENDOR_ID_MARVELL	include/pci_ids.h	/^#define PCI_VENDOR_ID_MARVELL	/;"	d
PCI_VENDOR_ID_MARVELL_EXT	include/pci_ids.h	/^#define PCI_VENDOR_ID_MARVELL_EXT	/;"	d
PCI_VENDOR_ID_MATROX	include/pci_ids.h	/^#define PCI_VENDOR_ID_MATROX	/;"	d
PCI_VENDOR_ID_MEILHAUS	include/pci_ids.h	/^#define PCI_VENDOR_ID_MEILHAUS	/;"	d
PCI_VENDOR_ID_MELLANOX	include/pci_ids.h	/^#define PCI_VENDOR_ID_MELLANOX	/;"	d
PCI_VENDOR_ID_MICROGATE	include/pci_ids.h	/^#define PCI_VENDOR_ID_MICROGATE	/;"	d
PCI_VENDOR_ID_MICRO_MEMORY	include/pci_ids.h	/^#define PCI_VENDOR_ID_MICRO_MEMORY	/;"	d
PCI_VENDOR_ID_MIPS	include/pci_ids.h	/^#define PCI_VENDOR_ID_MIPS	/;"	d
PCI_VENDOR_ID_MIRO	include/pci_ids.h	/^#define PCI_VENDOR_ID_MIRO	/;"	d
PCI_VENDOR_ID_MOBILITY_ELECTRONICS	include/pci_ids.h	/^#define PCI_VENDOR_ID_MOBILITY_ELECTRONICS	/;"	d
PCI_VENDOR_ID_MORETON	include/pci_ids.h	/^#define PCI_VENDOR_ID_MORETON	/;"	d
PCI_VENDOR_ID_MOTOROLA	include/pci_ids.h	/^#define PCI_VENDOR_ID_MOTOROLA	/;"	d
PCI_VENDOR_ID_MOXA	include/pci_ids.h	/^#define PCI_VENDOR_ID_MOXA	/;"	d
PCI_VENDOR_ID_MPL	board/mpl/pati/pati.h	/^#define PCI_VENDOR_ID_MPL	/;"	d
PCI_VENDOR_ID_MYLEX	include/pci_ids.h	/^#define PCI_VENDOR_ID_MYLEX	/;"	d
PCI_VENDOR_ID_MYRICOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_MYRICOM	/;"	d
PCI_VENDOR_ID_NCR	include/pci_ids.h	/^#define PCI_VENDOR_ID_NCR	/;"	d
PCI_VENDOR_ID_NEC	include/pci_ids.h	/^#define PCI_VENDOR_ID_NEC	/;"	d
PCI_VENDOR_ID_NEOMAGIC	include/pci_ids.h	/^#define PCI_VENDOR_ID_NEOMAGIC	/;"	d
PCI_VENDOR_ID_NETCELL	include/pci_ids.h	/^#define PCI_VENDOR_ID_NETCELL	/;"	d
PCI_VENDOR_ID_NETGEAR	include/pci_ids.h	/^#define PCI_VENDOR_ID_NETGEAR	/;"	d
PCI_VENDOR_ID_NETMOS	include/pci_ids.h	/^#define PCI_VENDOR_ID_NETMOS	/;"	d
PCI_VENDOR_ID_NETXEN	include/pci_ids.h	/^#define PCI_VENDOR_ID_NETXEN	/;"	d
PCI_VENDOR_ID_NI	include/pci_ids.h	/^#define PCI_VENDOR_ID_NI	/;"	d
PCI_VENDOR_ID_NS	include/pci_ids.h	/^#define PCI_VENDOR_ID_NS	/;"	d
PCI_VENDOR_ID_NVIDIA	include/pci_ids.h	/^#define PCI_VENDOR_ID_NVIDIA	/;"	d
PCI_VENDOR_ID_NVIDIA_SGS	include/pci_ids.h	/^#define PCI_VENDOR_ID_NVIDIA_SGS	/;"	d
PCI_VENDOR_ID_O2	include/pci_ids.h	/^#define PCI_VENDOR_ID_O2	/;"	d
PCI_VENDOR_ID_OCZ	include/pci_ids.h	/^#define PCI_VENDOR_ID_OCZ	/;"	d
PCI_VENDOR_ID_OLICOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_OLICOM	/;"	d
PCI_VENDOR_ID_OPTI	include/pci_ids.h	/^#define PCI_VENDOR_ID_OPTI	/;"	d
PCI_VENDOR_ID_OXSEMI	include/pci_ids.h	/^#define PCI_VENDOR_ID_OXSEMI	/;"	d
PCI_VENDOR_ID_PANACOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_PANACOM	/;"	d
PCI_VENDOR_ID_PASEMI	include/pci_ids.h	/^#define PCI_VENDOR_ID_PASEMI	/;"	d
PCI_VENDOR_ID_PCTECH	include/pci_ids.h	/^#define PCI_VENDOR_ID_PCTECH	/;"	d
PCI_VENDOR_ID_PDC	include/pci_ids.h	/^#define PCI_VENDOR_ID_PDC	/;"	d
PCI_VENDOR_ID_PHILIPS	include/pci_ids.h	/^#define PCI_VENDOR_ID_PHILIPS	/;"	d
PCI_VENDOR_ID_PICOPOWER	include/pci_ids.h	/^#define PCI_VENDOR_ID_PICOPOWER	/;"	d
PCI_VENDOR_ID_PLX	include/pci_ids.h	/^#define PCI_VENDOR_ID_PLX	/;"	d
PCI_VENDOR_ID_PMC_Sierra	include/pci_ids.h	/^#define PCI_VENDOR_ID_PMC_Sierra	/;"	d
PCI_VENDOR_ID_PROMISE	include/pci_ids.h	/^#define PCI_VENDOR_ID_PROMISE	/;"	d
PCI_VENDOR_ID_QLOGIC	include/pci_ids.h	/^#define PCI_VENDOR_ID_QLOGIC	/;"	d
PCI_VENDOR_ID_QMI	include/pci_ids.h	/^#define PCI_VENDOR_ID_QMI	/;"	d
PCI_VENDOR_ID_QUATECH	include/pci_ids.h	/^#define PCI_VENDOR_ID_QUATECH	/;"	d
PCI_VENDOR_ID_QUICKNET	include/pci_ids.h	/^#define PCI_VENDOR_ID_QUICKNET	/;"	d
PCI_VENDOR_ID_RADISYS	include/pci_ids.h	/^#define PCI_VENDOR_ID_RADISYS	/;"	d
PCI_VENDOR_ID_RDC	include/pci_ids.h	/^#define PCI_VENDOR_ID_RDC	/;"	d
PCI_VENDOR_ID_REALTEK	include/pci_ids.h	/^#define PCI_VENDOR_ID_REALTEK	/;"	d
PCI_VENDOR_ID_RENESAS	include/pci_ids.h	/^#define PCI_VENDOR_ID_RENESAS	/;"	d
PCI_VENDOR_ID_RICOH	include/pci_ids.h	/^#define PCI_VENDOR_ID_RICOH	/;"	d
PCI_VENDOR_ID_ROCKWELL	include/pci_ids.h	/^#define PCI_VENDOR_ID_ROCKWELL	/;"	d
PCI_VENDOR_ID_RP	include/pci_ids.h	/^#define PCI_VENDOR_ID_RP	/;"	d
PCI_VENDOR_ID_S2IO	include/pci_ids.h	/^#define PCI_VENDOR_ID_S2IO	/;"	d
PCI_VENDOR_ID_S3	include/pci_ids.h	/^#define PCI_VENDOR_ID_S3	/;"	d
PCI_VENDOR_ID_SAMSUNG	include/pci_ids.h	/^#define PCI_VENDOR_ID_SAMSUNG	/;"	d
PCI_VENDOR_ID_SATSAGEM	include/pci_ids.h	/^#define PCI_VENDOR_ID_SATSAGEM	/;"	d
PCI_VENDOR_ID_SBE	include/pci_ids.h	/^#define PCI_VENDOR_ID_SBE	/;"	d
PCI_VENDOR_ID_SCALEMP	include/pci_ids.h	/^#define PCI_VENDOR_ID_SCALEMP	/;"	d
PCI_VENDOR_ID_SEALEVEL	include/pci_ids.h	/^#define PCI_VENDOR_ID_SEALEVEL	/;"	d
PCI_VENDOR_ID_SERVERWORKS	include/pci_ids.h	/^#define PCI_VENDOR_ID_SERVERWORKS	/;"	d
PCI_VENDOR_ID_SGI	include/pci_ids.h	/^#define PCI_VENDOR_ID_SGI	/;"	d
PCI_VENDOR_ID_SI	include/pci_ids.h	/^#define PCI_VENDOR_ID_SI	/;"	d
PCI_VENDOR_ID_SIBYTE	include/pci_ids.h	/^#define PCI_VENDOR_ID_SIBYTE	/;"	d
PCI_VENDOR_ID_SIEMENS	include/pci_ids.h	/^#define PCI_VENDOR_ID_SIEMENS /;"	d
PCI_VENDOR_ID_SIIG	include/pci_ids.h	/^#define PCI_VENDOR_ID_SIIG	/;"	d
PCI_VENDOR_ID_SILAN	include/pci_ids.h	/^#define PCI_VENDOR_ID_SILAN	/;"	d
PCI_VENDOR_ID_SILICONIMAGE	include/pci_ids.h	/^#define PCI_VENDOR_ID_SILICONIMAGE	/;"	d
PCI_VENDOR_ID_SIPACKETS	include/pci_ids.h	/^#define PCI_VENDOR_ID_SIPACKETS	/;"	d
PCI_VENDOR_ID_SITECOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_SITECOM	/;"	d
PCI_VENDOR_ID_SMI	include/pci_ids.h	/^#define PCI_VENDOR_ID_SMI	/;"	d
PCI_VENDOR_ID_SOLARFLARE	include/pci_ids.h	/^#define PCI_VENDOR_ID_SOLARFLARE	/;"	d
PCI_VENDOR_ID_SONY	include/pci_ids.h	/^#define PCI_VENDOR_ID_SONY	/;"	d
PCI_VENDOR_ID_SPECIALIX	include/pci_ids.h	/^#define PCI_VENDOR_ID_SPECIALIX	/;"	d
PCI_VENDOR_ID_STALLION	include/pci_ids.h	/^#define PCI_VENDOR_ID_STALLION	/;"	d
PCI_VENDOR_ID_STMICRO	include/pci_ids.h	/^#define PCI_VENDOR_ID_STMICRO	/;"	d
PCI_VENDOR_ID_SUN	include/pci_ids.h	/^#define PCI_VENDOR_ID_SUN	/;"	d
PCI_VENDOR_ID_SUNDANCE	include/pci_ids.h	/^#define PCI_VENDOR_ID_SUNDANCE	/;"	d
PCI_VENDOR_ID_SYBA	include/pci_ids.h	/^#define PCI_VENDOR_ID_SYBA	/;"	d
PCI_VENDOR_ID_SYSKONNECT	include/pci_ids.h	/^#define PCI_VENDOR_ID_SYSKONNECT	/;"	d
PCI_VENDOR_ID_TCONRAD	include/pci_ids.h	/^#define PCI_VENDOR_ID_TCONRAD	/;"	d
PCI_VENDOR_ID_TDI	include/pci_ids.h	/^#define PCI_VENDOR_ID_TDI /;"	d
PCI_VENDOR_ID_TEHUTI	include/pci_ids.h	/^#define PCI_VENDOR_ID_TEHUTI	/;"	d
PCI_VENDOR_ID_TEKRAM	include/pci_ids.h	/^#define PCI_VENDOR_ID_TEKRAM	/;"	d
PCI_VENDOR_ID_TI	include/pci_ids.h	/^#define PCI_VENDOR_ID_TI	/;"	d
PCI_VENDOR_ID_TIGERJET	include/pci_ids.h	/^#define PCI_VENDOR_ID_TIGERJET	/;"	d
PCI_VENDOR_ID_TIMEDIA	include/pci_ids.h	/^#define PCI_VENDOR_ID_TIMEDIA	/;"	d
PCI_VENDOR_ID_TITAN	include/pci_ids.h	/^#define PCI_VENDOR_ID_TITAN	/;"	d
PCI_VENDOR_ID_TOPIC	include/pci_ids.h	/^#define PCI_VENDOR_ID_TOPIC	/;"	d
PCI_VENDOR_ID_TOPSPIN	include/pci_ids.h	/^#define PCI_VENDOR_ID_TOPSPIN	/;"	d
PCI_VENDOR_ID_TOSHIBA	include/pci_ids.h	/^#define PCI_VENDOR_ID_TOSHIBA	/;"	d
PCI_VENDOR_ID_TOSHIBA_2	include/pci_ids.h	/^#define PCI_VENDOR_ID_TOSHIBA_2	/;"	d
PCI_VENDOR_ID_TRANSMETA	include/pci_ids.h	/^#define PCI_VENDOR_ID_TRANSMETA	/;"	d
PCI_VENDOR_ID_TRIDENT	include/pci_ids.h	/^#define PCI_VENDOR_ID_TRIDENT	/;"	d
PCI_VENDOR_ID_TSENG	include/pci_ids.h	/^#define PCI_VENDOR_ID_TSENG	/;"	d
PCI_VENDOR_ID_TTI	include/pci_ids.h	/^#define PCI_VENDOR_ID_TTI	/;"	d
PCI_VENDOR_ID_TTTECH	include/pci_ids.h	/^#define PCI_VENDOR_ID_TTTECH	/;"	d
PCI_VENDOR_ID_TUNDRA	include/pci_ids.h	/^#define PCI_VENDOR_ID_TUNDRA	/;"	d
PCI_VENDOR_ID_UMC	include/pci_ids.h	/^#define PCI_VENDOR_ID_UMC	/;"	d
PCI_VENDOR_ID_UNISYS	include/pci_ids.h	/^#define PCI_VENDOR_ID_UNISYS	/;"	d
PCI_VENDOR_ID_V3	include/pci_ids.h	/^#define PCI_VENDOR_ID_V3	/;"	d
PCI_VENDOR_ID_VIA	include/pci_ids.h	/^#define PCI_VENDOR_ID_VIA	/;"	d
PCI_VENDOR_ID_VITESSE	include/pci_ids.h	/^#define PCI_VENDOR_ID_VITESSE	/;"	d
PCI_VENDOR_ID_VLSI	include/pci_ids.h	/^#define PCI_VENDOR_ID_VLSI	/;"	d
PCI_VENDOR_ID_VORTEX	include/pci_ids.h	/^#define PCI_VENDOR_ID_VORTEX	/;"	d
PCI_VENDOR_ID_WD	include/pci_ids.h	/^#define PCI_VENDOR_ID_WD	/;"	d
PCI_VENDOR_ID_WEITEK	include/pci_ids.h	/^#define PCI_VENDOR_ID_WEITEK	/;"	d
PCI_VENDOR_ID_WINBOND	include/pci_ids.h	/^#define PCI_VENDOR_ID_WINBOND	/;"	d
PCI_VENDOR_ID_WINBOND2	include/pci_ids.h	/^#define PCI_VENDOR_ID_WINBOND2	/;"	d
PCI_VENDOR_ID_XEN	include/pci_ids.h	/^#define PCI_VENDOR_ID_XEN	/;"	d
PCI_VENDOR_ID_XILINX	include/pci_ids.h	/^#define PCI_VENDOR_ID_XILINX	/;"	d
PCI_VENDOR_ID_XILINX_RME	include/pci_ids.h	/^#define PCI_VENDOR_ID_XILINX_RME	/;"	d
PCI_VENDOR_ID_XIRCOM	include/pci_ids.h	/^#define PCI_VENDOR_ID_XIRCOM	/;"	d
PCI_VENDOR_ID_YAMAHA	include/pci_ids.h	/^#define PCI_VENDOR_ID_YAMAHA	/;"	d
PCI_VENDOR_ID_ZEITNET	include/pci_ids.h	/^#define PCI_VENDOR_ID_ZEITNET	/;"	d
PCI_VENDOR_ID_ZIATECH	include/pci_ids.h	/^#define PCI_VENDOR_ID_ZIATECH	/;"	d
PCI_VENDOR_ID_ZOLTRIX	include/pci_ids.h	/^#define PCI_VENDOR_ID_ZOLTRIX	/;"	d
PCI_VENDOR_ID_ZORAN	include/pci_ids.h	/^#define PCI_VENDOR_ID_ZORAN	/;"	d
PCI_VENDOR_SM	include/sm501.h	/^#define PCI_VENDOR_SM	/;"	d
PCI_VGA_RAM_IMAGE_START	arch/x86/include/asm/u-boot-x86.h	/^#define PCI_VGA_RAM_IMAGE_START	/;"	d
PCI_WRITE_VIA_DWORD_OP	drivers/pci/pci.c	/^#define PCI_WRITE_VIA_DWORD_OP(/;"	d	file:
PCI_XILINX	drivers/pci/Kconfig	/^config PCI_XILINX$/;"	c
PCI_X_CMD_DPERR_E	include/pci.h	/^#define  PCI_X_CMD_DPERR_E /;"	d
PCI_X_CMD_ERO	include/pci.h	/^#define  PCI_X_CMD_ERO /;"	d
PCI_X_CMD_MAX_READ	include/pci.h	/^#define  PCI_X_CMD_MAX_READ /;"	d
PCI_X_CMD_MAX_SPLIT	include/pci.h	/^#define  PCI_X_CMD_MAX_SPLIT /;"	d
PCI_X_CMD_VERSION	include/pci.h	/^#define  PCI_X_CMD_VERSION(/;"	d
PCI_doBIOSPOST	drivers/bios_emulator/atibios.c	/^static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,$/;"	f	typeref:typename:void	file:
PCI_findBIOSAddr	drivers/bios_emulator/atibios.c	/^static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)$/;"	f	typeref:typename:u32	file:
PCI_fixupIObase	drivers/bios_emulator/atibios.c	/^static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)$/;"	f	typeref:typename:void	file:
PCI_inp	drivers/bios_emulator/besys.c	/^static u32 PCI_inp(int port, int type)$/;"	f	typeref:typename:u32	file:
PCI_mapBIOSImage	drivers/bios_emulator/atibios.c	/^void *PCI_mapBIOSImage(struct udevice *pcidev)$/;"	f	typeref:typename:void *
PCI_outp	drivers/bios_emulator/besys.c	/^static void PCI_outp(int port, u32 val, int type)$/;"	f	typeref:typename:void	file:
PCI_postController	drivers/bios_emulator/atibios.c	/^static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,$/;"	f	typeref:typename:int	file:
PCI_unmapBIOSImage	drivers/bios_emulator/atibios.c	/^void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)$/;"	f	typeref:typename:void
PCI_unmapBIOSImage	drivers/bios_emulator/atibios.c	/^void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)$/;"	f	typeref:typename:void
PCLKCR	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define PCLKCR	/;"	d
PCLK_ADCIF	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ADCIF	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_ADCIF	/;"	d
PCLK_ALIVE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_ALIVE	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ALIVE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_AXI2ACEL_BRIDGE	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_AXI2ACEL_BRIDGE	/;"	d
PCLK_CDREX_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define PCLK_CDREX_RATIO	/;"	d
PCLK_CENTER_MAIN_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CENTER_MAIN_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CENTER_MAIN_NOC	/;"	d
PCLK_CHIPID	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CHIPID	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_CHIPID	/;"	d
PCLK_CIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_CIC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_CIC	/;"	d
PCLK_COREDBG_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_B	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_B	/;"	d
PCLK_COREDBG_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_COREDBG_L	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_COREDBG_L	/;"	d
PCLK_CORE_DBG_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	PCLK_CORE_DBG_DIV_MASK	= 0x1f,$/;"	e	enum:__anon3783c4e20503
PCLK_CORE_DBG_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	PCLK_CORE_DBG_DIV_SHIFT	= 9,$/;"	e	enum:__anon3783c4e20503
PCLK_CPU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_CPU	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_CPU	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_CXCS_PD_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DBG_CXCS_PD_CORE_B	/;"	d
PCLK_DBG_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PCLK_DBG_HZ	/;"	d
PCLK_DBG_L_DIV_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_DBG_L_DIV_MASK		= 0x1f << PCLK_DBG_L_DIV_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_DBG_L_DIV_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_DBG_L_DIV_SHIFT		= 0x8,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_DBG_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define PCLK_DBG_RATIO	/;"	d
PCLK_DBG_RATIO	board/samsung/odroid/setup.h	/^#define PCLK_DBG_RATIO(/;"	d
PCLK_DBG_RATIO	board/samsung/trats/setup.h	/^#define PCLK_DBG_RATIO	/;"	d
PCLK_DCF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DCF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DCF	/;"	d
PCLK_DDR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDR	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR	/;"	d
PCLK_DDRUPCTL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_DDRUPCTL	/;"	d
PCLK_DDRUPCTL0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL0	/;"	d
PCLK_DDRUPCTL1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDRUPCTL1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_DDRUPCTL1	/;"	d
PCLK_DDR_MON	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_MON	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_MON	/;"	d
PCLK_DDR_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DDR_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DDR_SGRF	/;"	d
PCLK_DP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_DP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_DP_CTRL	/;"	d
PCLK_EDP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP	/;"	d
PCLK_EDP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_CTRL	/;"	d
PCLK_EDP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EDP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EDP_NOC	/;"	d
PCLK_EFUSE1024NS	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024NS	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024NS	/;"	d
PCLK_EFUSE1024S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_EFUSE1024S	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_EFUSE1024S	/;"	d
PCLK_G2D	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_G2D	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_G2D	/;"	d
PCLK_GASKET	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GASKET	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GASKET	/;"	d
PCLK_GMAC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC	/;"	d
PCLK_GMAC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GMAC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GMAC_NOC	/;"	d
PCLK_GPIO0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO0	/;"	d
PCLK_GPIO0_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO0_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO0_PMU	/;"	d
PCLK_GPIO1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO1	/;"	d
PCLK_GPIO1_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO1_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO1_PMU	/;"	d
PCLK_GPIO2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO2	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO2	/;"	d
PCLK_GPIO3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO3	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO3	/;"	d
PCLK_GPIO4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO4	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GPIO4	/;"	d
PCLK_GPIO5	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO5	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO5	/;"	d
PCLK_GPIO6	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO6	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO6	/;"	d
PCLK_GPIO7	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO7	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO7	/;"	d
PCLK_GPIO8	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO8	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GPIO8	/;"	d
PCLK_GPIO_FSYS1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GPIO_FSYS1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_GPIO_FSYS1	/;"	d
PCLK_GRF	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_GRF	/;"	d
PCLK_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP	/;"	d
PCLK_HDCP22	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP22	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP22	/;"	d
PCLK_HDCP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDCP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDCP_NOC	/;"	d
PCLK_HDMI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_HDMI	/;"	d
PCLK_HDMI_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HDMI_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HDMI_CTRL	/;"	d
PCLK_HSI2C0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C0	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C0	/;"	d
PCLK_HSI2C1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C1	/;"	d
PCLK_HSI2C10	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C10	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C10	/;"	d
PCLK_HSI2C11	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C11	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C11	/;"	d
PCLK_HSI2C2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C2	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C2	/;"	d
PCLK_HSI2C3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C3	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C3	/;"	d
PCLK_HSI2C4	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C4	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C4	/;"	d
PCLK_HSI2C5	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C5	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C5	/;"	d
PCLK_HSI2C6	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C6	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C6	/;"	d
PCLK_HSI2C7	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C7	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C7	/;"	d
PCLK_HSI2C8	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C8	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C8	/;"	d
PCLK_HSI2C9	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSI2C9	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_HSI2C9	/;"	d
PCLK_HSICPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_HSICPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_HSICPHY	/;"	d
PCLK_I2C0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C0	/;"	d
PCLK_I2C0_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C0_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C0_PMU	/;"	d
PCLK_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C1	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C1	/;"	d
PCLK_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C2	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C2	/;"	d
PCLK_I2C3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C3	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C3	/;"	d
PCLK_I2C4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C4	/;"	d
PCLK_I2C4_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C4_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C4_PMU	/;"	d
PCLK_I2C5	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C5	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C5	/;"	d
PCLK_I2C6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C6	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C6	/;"	d
PCLK_I2C7	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C7	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C7	/;"	d
PCLK_I2C8_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2C8_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_I2C8_PMU	/;"	d
PCLK_I2S	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S	/;"	d
PCLK_I2S1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_I2S1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_I2S1	/;"	d
PCLK_INTMEM1_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTMEM1_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTMEM1_PMU	/;"	d
PCLK_INTR_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB	/;"	d
PCLK_INTR_ARB_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_INTR_ARB_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_INTR_ARB_PMU	/;"	d
PCLK_ISP1_WRAPPER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_ISP1_WRAPPER	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_ISP1_WRAPPER	/;"	d
PCLK_JPEG	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_JPEG	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_JPEG	/;"	d
PCLK_LVDS_PHY	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_LVDS_PHY	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_LVDS_PHY	/;"	d
PCLK_MAILBOX0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX0	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX0	/;"	d
PCLK_MAILBOX_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MAILBOX_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MAILBOX_PMU	/;"	d
PCLK_MIPI_CSI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_CSI	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_CSI	/;"	d
PCLK_MIPI_DSI0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI0	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI0	/;"	d
PCLK_MIPI_DSI1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MIPI_DSI1	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_MIPI_DSI1	/;"	d
PCLK_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_0	/;"	d
PCLK_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_MSCL_1	/;"	d
PCLK_NOC_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_NOC_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_NOC_PMU	/;"	d
PCLK_PCIE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCIE	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PCIE	/;"	d
PCLK_PCM	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM	/;"	d
PCLK_PCM1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PCM1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PCM1	/;"	d
PCLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERI	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PERI	/;"	d
PCLK_PERIHP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP	/;"	d
PCLK_PERIHP_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_PERIHP_DIV_CON_MASK	= 0x7 << PCLK_PERIHP_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_PERIHP_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_PERIHP_DIV_CON_SHIFT	= 12,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_PERIHP_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_GRF	/;"	d
PCLK_PERIHP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERIHP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERIHP_NOC	/;"	d
PCLK_PERILP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP0	/;"	d
PCLK_PERILP0_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_PERILP0_DIV_CON_MASK	= 0x7 << PCLK_PERILP0_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_PERILP0_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_PERILP0_DIV_CON_SHIFT	= 12,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_PERILP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1	/;"	d
PCLK_PERILP1_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_PERILP1_DIV_CON_MASK	= 0x7 << PCLK_PERILP1_DIV_CON_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_PERILP1_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PCLK_PERILP1_DIV_CON_SHIFT	= 8,$/;"	e	enum:__anon06b9221d0103	file:
PCLK_PERILP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP1_NOC	/;"	d
PCLK_PERILP_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PERILP_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PERILP_SGRF	/;"	d
PCLK_PMU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMUGRF_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMUGRF_PMU	/;"	d
PCLK_PMU_INTR_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_INTR_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_PMU_INTR_ARB	/;"	d
PCLK_PMU_MSCL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PMU_MSCL	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PMU_MSCL	/;"	d
PCLK_PPMU_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_0	/;"	d
PCLK_PPMU_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PPMU_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PPMU_MSCL_1	/;"	d
PCLK_PS2C	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PS2C	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PS2C	/;"	d
PCLK_PUBL0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL0	/;"	d
PCLK_PUBL1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PUBL1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PUBL1	/;"	d
PCLK_PWM	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_PWM	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_PWM	/;"	d
PCLK_QE_G2D	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_G2D	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_G2D	/;"	d
PCLK_QE_JPEG	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_JPEG	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_JPEG	/;"	d
PCLK_QE_MSCL_0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_0	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_0	/;"	d
PCLK_QE_MSCL_1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_QE_MSCL_1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_QE_MSCL_1	/;"	d
PCLK_RKPWM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_RKPWM	/;"	d
PCLK_RKPWM_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RKPWM_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_RKPWM_PMU	/;"	d
PCLK_RTC	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_RTC	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_RTC	/;"	d
PCLK_SARADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SARADC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SARADC	/;"	d
PCLK_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF	/;"	d
PCLK_SGRF_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SGRF_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SGRF_PMU	/;"	d
PCLK_SIM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SIM	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SIM	/;"	d
PCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPDIF	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPDIF	/;"	d
PCLK_SPI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_SPI	/;"	d
PCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI0	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI0	/;"	d
PCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI1	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI1	/;"	d
PCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI2	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI2	/;"	d
PCLK_SPI3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI3	/;"	d
PCLK_SPI3_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI3_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI3_PMU	/;"	d
PCLK_SPI4	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI4	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI4	/;"	d
PCLK_SPI5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SPI5	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SPI5	/;"	d
PCLK_SRC_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_SRC_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_SRC_PMU	/;"	d
PCLK_TIMER	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TIMER	/;"	d
PCLK_TIMER0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER0	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER0	/;"	d
PCLK_TIMER1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER1	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER1	/;"	d
PCLK_TIMER_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TIMER_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TIMER_PMU	/;"	d
PCLK_TMU	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TMU	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_TMU	/;"	d
PCLK_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TSADC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_TSADC	/;"	d
PCLK_TZPC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_TZPC	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_TZPC	/;"	d
PCLK_UART0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART0	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART0	/;"	d
PCLK_UART1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART1	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART1	/;"	d
PCLK_UART2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART2	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART2	/;"	d
PCLK_UART3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART3	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART3	/;"	d
PCLK_UART4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_UART4	/;"	d
PCLK_UART4_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UART4_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UART4_PMU	/;"	d
PCLK_UPHY0_TCPD_G	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPD_G	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPD_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY0_TCPHY_G	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY0_TCPHY_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPD_G	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPD_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_UPHY1_TCPHY_G	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_UPHY1_TCPHY_G	/;"	d
PCLK_USBPHY_MUX_G	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_USBPHY_MUX_G	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_USBPHY_MUX_G	/;"	d
PCLK_VIO	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO	/;"	d
PCLK_VIO2_H2P	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO2_H2P	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_VIO2_H2P	/;"	d
PCLK_VIO_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_GRF	/;"	d
PCLK_VIO_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_VIO_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_VIO_NOC	/;"	d
PCLK_WDT	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	include/dt-bindings/clock/exynos7420-clk.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	include/dt-bindings/clock/rk3036-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	include/dt-bindings/clock/rk3288-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT	/;"	d
PCLK_WDT_M0_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCLK_WDT_M0_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define PCLK_WDT_M0_PMU	/;"	d
PCM052_BOOTCOMMAND	include/configs/bk4r1.h	/^#define PCM052_BOOTCOMMAND /;"	d
PCM052_BOOTCOMMAND	include/configs/pcm052.h	/^#define PCM052_BOOTCOMMAND$/;"	d
PCM052_DDRMC_PHY_CTRL	board/phytec/pcm052/pcm052.c	/^#define PCM052_DDRMC_PHY_CTRL	/;"	d	file:
PCM052_DDRMC_PHY_DQ_TIMING	board/phytec/pcm052/pcm052.c	/^#define PCM052_DDRMC_PHY_DQ_TIMING	/;"	d	file:
PCM052_DDRMC_PHY_PROC_PAD_ODT	board/phytec/pcm052/pcm052.c	/^#define PCM052_DDRMC_PHY_PROC_PAD_ODT	/;"	d	file:
PCM052_DDRMC_PHY_SLAVE_CTRL	board/phytec/pcm052/pcm052.c	/^#define PCM052_DDRMC_PHY_SLAVE_CTRL	/;"	d	file:
PCM052_DDR_SIZE	board/phytec/pcm052/Kconfig	/^config PCM052_DDR_SIZE$/;"	c
PCM052_EXTRA_ENV_SETTINGS	include/configs/bk4r1.h	/^#define PCM052_EXTRA_ENV_SETTINGS /;"	d
PCM052_EXTRA_ENV_SETTINGS	include/configs/pcm052.h	/^#define PCM052_EXTRA_ENV_SETTINGS$/;"	d
PCM052_NET_INIT	include/configs/bk4r1.h	/^#define PCM052_NET_INIT /;"	d
PCM052_NET_INIT	include/configs/pcm052.h	/^#define PCM052_NET_INIT$/;"	d
PCM052_VF610_DDR_PAD_CTRL	board/phytec/pcm052/pcm052.c	/^#define PCM052_VF610_DDR_PAD_CTRL	/;"	d	file:
PCM052_VF610_DDR_PAD_CTRL_1	board/phytec/pcm052/pcm052.c	/^#define PCM052_VF610_DDR_PAD_CTRL_1	/;"	d	file:
PCM052_VF610_DDR_RESET_PAD_CTL	board/phytec/pcm052/pcm052.c	/^#define PCM052_VF610_DDR_RESET_PAD_CTL	/;"	d	file:
PCM052_VF610_PAD_DDR_A0__DDR_A_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A0__DDR_A_0		= IOMUX_PAD(0x025c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A10__DDR_A_10	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A10__DDR_A_10		= IOMUX_PAD(0x0234, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A11__DDR_A_11	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A11__DDR_A_11		= IOMUX_PAD(0x0230, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A12__DDR_A_12	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A12__DDR_A_12		= IOMUX_PAD(0x022c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A13__DDR_A_13	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A13__DDR_A_13		= IOMUX_PAD(0x0228, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A14__DDR_A_14	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A14__DDR_A_14		= IOMUX_PAD(0x0224, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A15__DDR_A_15	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A15__DDR_A_15		= IOMUX_PAD(0x0220, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A1__DDR_A_1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A1__DDR_A_1		= IOMUX_PAD(0x0258, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A2__DDR_A_2	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A2__DDR_A_2		= IOMUX_PAD(0x0254, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A3__DDR_A_3	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A3__DDR_A_3		= IOMUX_PAD(0x0250, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A4__DDR_A_4	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A4__DDR_A_4		= IOMUX_PAD(0x024c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A5__DDR_A_5	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A5__DDR_A_5		= IOMUX_PAD(0x0248, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A6__DDR_A_6	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A6__DDR_A_6		= IOMUX_PAD(0x0244, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A7__DDR_A_7	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A7__DDR_A_7		= IOMUX_PAD(0x0240, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A8__DDR_A_8	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A8__DDR_A_8		= IOMUX_PAD(0x023c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_A9__DDR_A_9	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_A9__DDR_A_9		= IOMUX_PAD(0x0238, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_BA0__DDR_BA_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_BA0__DDR_BA_0		= IOMUX_PAD(0x0268, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_BA1__DDR_BA_1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_BA1__DDR_BA_1		= IOMUX_PAD(0x0264, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_BA2__DDR_BA_2	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_BA2__DDR_BA_2		= IOMUX_PAD(0x0260, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_CAS__DDR_CAS_B	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_CAS__DDR_CAS_B		= IOMUX_PAD(0x026c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_P/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_CKE__DDR_CKE_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_CKE__DDR_CKE_0		= IOMUX_PAD(0x0270, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_P/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_CLK__DDR_CLK_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_CLK__DDR_CLK_0		= IOMUX_PAD(0x0274, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_P/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_CS__DDR_CS_B_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_CS__DDR_CS_B_0		= IOMUX_PAD(0x0278, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_P/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D0__DDR_D_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D0__DDR_D_0		= IOMUX_PAD(0x02b8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D10__DDR_D_10	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D10__DDR_D_10		= IOMUX_PAD(0x0290, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D11__DDR_D_11	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D11__DDR_D_11		= IOMUX_PAD(0x028c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D12__DDR_D_12	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D12__DDR_D_12		= IOMUX_PAD(0x0288, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D13__DDR_D_13	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D13__DDR_D_13		= IOMUX_PAD(0x0284, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D14__DDR_D_14	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D14__DDR_D_14		= IOMUX_PAD(0x0280, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D15__DDR_D_15	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D15__DDR_D_15		= IOMUX_PAD(0x027c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D1__DDR_D_1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D1__DDR_D_1		= IOMUX_PAD(0x02b4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D2__DDR_D_2	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D2__DDR_D_2		= IOMUX_PAD(0x02b0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D3__DDR_D_3	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D3__DDR_D_3		= IOMUX_PAD(0x02ac, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D4__DDR_D_4	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D4__DDR_D_4		= IOMUX_PAD(0x02a8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D5__DDR_D_5	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D5__DDR_D_5		= IOMUX_PAD(0x02a4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D6__DDR_D_6	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D6__DDR_D_6		= IOMUX_PAD(0x02a0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D7__DDR_D_7	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D7__DDR_D_7		= IOMUX_PAD(0x029c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D8__DDR_D_8	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D8__DDR_D_8		= IOMUX_PAD(0x0298, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_D9__DDR_D_9	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_D9__DDR_D_9		= IOMUX_PAD(0x0294, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_DDRBYTE0__DDR_DDRBYTE0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_DDRBYTE0__DDR_DDRBYTE0	= IOMUX_PAD(0x02e0, __NA_, 0, __NA_, 0, PCM052_VF61/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1	= IOMUX_PAD(0x02dc, __NA_, 0, __NA_, 0, PCM052_VF61/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_DQM0__DDR_DQM_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_DQM0__DDR_DQM_0		= IOMUX_PAD(0x02c0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_DQM1__DDR_DQM_1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_DQM1__DDR_DQM_1		= IOMUX_PAD(0x02bc, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_DQS0__DDR_DQS_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_DQS0__DDR_DQS_0		= IOMUX_PAD(0x02c8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_DQS1__DDR_DQS_1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_DQS1__DDR_DQS_1		= IOMUX_PAD(0x02c4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_ODT0__DDR_ODT_1	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_ODT0__DDR_ODT_1		= IOMUX_PAD(0x02d8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_ODT1__DDR_ODT_0	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_ODT1__DDR_ODT_0		= IOMUX_PAD(0x02d4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_RAS__DDR_RAS_B	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_RAS__DDR_RAS_B		= IOMUX_PAD(0x02cc, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_P/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_RESETB	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_RESETB			= IOMUX_PAD(0x021c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_RESET_PA/;"	e	enum:__anoned9ddac60103	file:
PCM052_VF610_PAD_DDR_WE__DDR_WE_B	board/phytec/pcm052/pcm052.c	/^	PCM052_VF610_PAD_DDR_WE__DDR_WE_B		= IOMUX_PAD(0x02d0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD/;"	e	enum:__anoned9ddac60103	file:
PCM0_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define PCM0_RATIO	/;"	d
PCM1_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define PCM1_RATIO	/;"	d
PCM2_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define PCM2_RATIO	/;"	d
PCMASK	arch/arm/include/asm/proc-armv/ptrace.h	/^#define PCMASK	/;"	d
PCMCIA0	include/SA-1100.h	/^#define PCMCIA0	/;"	d
PCMCIA0Attr	include/SA-1100.h	/^#define PCMCIA0Attr	/;"	d
PCMCIA0AttrSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA0AttrSp	/;"	d
PCMCIA0AttrSp	include/SA-1100.h	/^#define PCMCIA0AttrSp	/;"	d
PCMCIA0IO	include/SA-1100.h	/^#define PCMCIA0IO	/;"	d
PCMCIA0IOSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA0IOSp	/;"	d
PCMCIA0IOSp	include/SA-1100.h	/^#define PCMCIA0IOSp	/;"	d
PCMCIA0Mem	include/SA-1100.h	/^#define PCMCIA0Mem	/;"	d
PCMCIA0MemSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA0MemSp	/;"	d
PCMCIA0MemSp	include/SA-1100.h	/^#define PCMCIA0MemSp	/;"	d
PCMCIA0Sp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA0Sp	/;"	d
PCMCIA0Sp	include/SA-1100.h	/^#define PCMCIA0Sp	/;"	d
PCMCIA1	include/SA-1100.h	/^#define PCMCIA1	/;"	d
PCMCIA1Attr	include/SA-1100.h	/^#define PCMCIA1Attr	/;"	d
PCMCIA1AttrSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA1AttrSp	/;"	d
PCMCIA1AttrSp	include/SA-1100.h	/^#define PCMCIA1AttrSp	/;"	d
PCMCIA1IO	include/SA-1100.h	/^#define PCMCIA1IO	/;"	d
PCMCIA1IOSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA1IOSp	/;"	d
PCMCIA1IOSp	include/SA-1100.h	/^#define PCMCIA1IOSp	/;"	d
PCMCIA1Mem	include/SA-1100.h	/^#define PCMCIA1Mem	/;"	d
PCMCIA1MemSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA1MemSp	/;"	d
PCMCIA1MemSp	include/SA-1100.h	/^#define PCMCIA1MemSp	/;"	d
PCMCIA1Sp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIA1Sp	/;"	d
PCMCIA1Sp	include/SA-1100.h	/^#define PCMCIA1Sp	/;"	d
PCMCIAAttrSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIAAttrSp	/;"	d
PCMCIAAttrSp	include/SA-1100.h	/^#define PCMCIAAttrSp	/;"	d
PCMCIAIOSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIAIOSp	/;"	d
PCMCIAIOSp	include/SA-1100.h	/^#define PCMCIAIOSp	/;"	d
PCMCIAMemSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIAMemSp	/;"	d
PCMCIAMemSp	include/SA-1100.h	/^#define PCMCIAMemSp	/;"	d
PCMCIAPrtSp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIAPrtSp	/;"	d
PCMCIAPrtSp	include/SA-1100.h	/^#define PCMCIAPrtSp	/;"	d
PCMCIAPrtType	include/SA-1100.h	/^typedef Quad		PCMCIAPrtType [PCMCIAPrtSp\/sizeof (Quad)] ;$/;"	t	typeref:typename:Quad[PCMCIAPrtSp/sizeof (Quad)]
PCMCIASp	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PCMCIASp	/;"	d
PCMCIASp	include/SA-1100.h	/^#define PCMCIASp	/;"	d
PCMCIAType	include/SA-1100.h	/^typedef PCMCIAPrtType	PCMCIAType [PCMCIASp\/PCMCIAPrtSp] ;$/;"	t	typeref:typename:PCMCIAPrtType[PCMCIASp/PCMCIAPrtSp]
PCMCIA_BOARD_MSG	drivers/pcmcia/tqm8xx_pcmcia.c	/^#define	PCMCIA_BOARD_MSG	/;"	d	file:
PCMCIA_BSIZE_1	include/mpc8xx.h	/^#define PCMCIA_BSIZE_1	/;"	d
PCMCIA_BSIZE_128	include/mpc8xx.h	/^#define PCMCIA_BSIZE_128	/;"	d
PCMCIA_BSIZE_128K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_128K	/;"	d
PCMCIA_BSIZE_16	include/mpc8xx.h	/^#define PCMCIA_BSIZE_16	/;"	d
PCMCIA_BSIZE_16K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_16K	/;"	d
PCMCIA_BSIZE_16M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_16M	/;"	d
PCMCIA_BSIZE_1K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_1K	/;"	d
PCMCIA_BSIZE_1M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_1M	/;"	d
PCMCIA_BSIZE_2	include/mpc8xx.h	/^#define PCMCIA_BSIZE_2	/;"	d
PCMCIA_BSIZE_256	include/mpc8xx.h	/^#define PCMCIA_BSIZE_256	/;"	d
PCMCIA_BSIZE_256K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_256K	/;"	d
PCMCIA_BSIZE_2K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_2K	/;"	d
PCMCIA_BSIZE_2M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_2M	/;"	d
PCMCIA_BSIZE_32	include/mpc8xx.h	/^#define PCMCIA_BSIZE_32	/;"	d
PCMCIA_BSIZE_32K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_32K	/;"	d
PCMCIA_BSIZE_32M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_32M	/;"	d
PCMCIA_BSIZE_4	include/mpc8xx.h	/^#define PCMCIA_BSIZE_4	/;"	d
PCMCIA_BSIZE_4K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_4K	/;"	d
PCMCIA_BSIZE_4M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_4M	/;"	d
PCMCIA_BSIZE_512	include/mpc8xx.h	/^#define PCMCIA_BSIZE_512	/;"	d
PCMCIA_BSIZE_512K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_512K	/;"	d
PCMCIA_BSIZE_64	include/mpc8xx.h	/^#define PCMCIA_BSIZE_64	/;"	d
PCMCIA_BSIZE_64K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_64K	/;"	d
PCMCIA_BSIZE_64M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_64M	/;"	d
PCMCIA_BSIZE_8	include/mpc8xx.h	/^#define PCMCIA_BSIZE_8	/;"	d
PCMCIA_BSIZE_8K	include/mpc8xx.h	/^#define PCMCIA_BSIZE_8K	/;"	d
PCMCIA_BSIZE_8M	include/mpc8xx.h	/^#define PCMCIA_BSIZE_8M	/;"	d
PCMCIA_BVD1	include/mpc8xx.h	/^#define PCMCIA_BVD1(/;"	d
PCMCIA_BVD2	include/mpc8xx.h	/^#define PCMCIA_BVD2(/;"	d
PCMCIA_CD1	include/mpc8xx.h	/^#define PCMCIA_CD1(/;"	d
PCMCIA_CD2	include/mpc8xx.h	/^#define PCMCIA_CD2(/;"	d
PCMCIA_GCRX_CXOE	include/mpc8xx.h	/^#define PCMCIA_GCRX_CXOE	/;"	d
PCMCIA_GCRX_CXRESET	include/mpc8xx.h	/^#define PCMCIA_GCRX_CXRESET	/;"	d
PCMCIA_IO_0_BASE	arch/arm/include/asm/arch-pxa/hardware.h	/^#define PCMCIA_IO_0_BASE	/;"	d
PCMCIA_IO_1_BASE	arch/arm/include/asm/arch-pxa/hardware.h	/^#define PCMCIA_IO_1_BASE	/;"	d
PCMCIA_IO_WIN_NO	include/pcmcia.h	/^#define PCMCIA_IO_WIN_NO	/;"	d
PCMCIA_MASK	include/mpc8xx.h	/^#define PCMCIA_MASK(/;"	d
PCMCIA_MEM_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PCMCIA_MEM_BASE	/;"	d
PCMCIA_MEM_WIN_NO	include/pcmcia.h	/^#define PCMCIA_MEM_WIN_NO	/;"	d
PCMCIA_MK_CLKS	arch/powerpc/lib/ide.c	/^#define PCMCIA_MK_CLKS(/;"	d	file:
PCMCIA_PGCRX	include/pcmcia.h	/^#define	PCMCIA_PGCRX(/;"	d
PCMCIA_PPS_16	include/mpc8xx.h	/^#define PCMCIA_PPS_16	/;"	d
PCMCIA_PPS_8	include/mpc8xx.h	/^#define PCMCIA_PPS_8	/;"	d
PCMCIA_PRS_ATTR	include/mpc8xx.h	/^#define PCMCIA_PRS_ATTR	/;"	d
PCMCIA_PRS_CEx	include/mpc8xx.h	/^#define PCMCIA_PRS_CEx	/;"	d
PCMCIA_PRS_DMA	include/mpc8xx.h	/^#define PCMCIA_PRS_DMA	/;"	d
PCMCIA_PRS_DMA_LAST	include/mpc8xx.h	/^#define PCMCIA_PRS_DMA_LAST	/;"	d
PCMCIA_PRS_IO	include/mpc8xx.h	/^#define PCMCIA_PRS_IO	/;"	d
PCMCIA_PRS_MEM	include/mpc8xx.h	/^#define PCMCIA_PRS_MEM	/;"	d
PCMCIA_PSLOT_A	include/mpc8xx.h	/^#define PCMCIA_PSLOT_A	/;"	d
PCMCIA_PSLOT_B	include/mpc8xx.h	/^#define PCMCIA_PSLOT_B	/;"	d
PCMCIA_PV	include/mpc8xx.h	/^#define PCMCIA_PV	/;"	d
PCMCIA_RDY	include/mpc8xx.h	/^#define PCMCIA_RDY(/;"	d
PCMCIA_RDY_F	include/mpc8xx.h	/^#define PCMCIA_RDY_F(/;"	d
PCMCIA_RDY_H	include/mpc8xx.h	/^#define PCMCIA_RDY_H(/;"	d
PCMCIA_RDY_L	include/mpc8xx.h	/^#define PCMCIA_RDY_L(/;"	d
PCMCIA_RDY_R	include/mpc8xx.h	/^#define PCMCIA_RDY_R(/;"	d
PCMCIA_SHT	include/mpc8xx.h	/^#define PCMCIA_SHT(/;"	d
PCMCIA_SL	include/mpc8xx.h	/^#define PCMCIA_SL(/;"	d
PCMCIA_SLOT_MSG	include/pcmcia.h	/^# define PCMCIA_SLOT_MSG	/;"	d
PCMCIA_SLOT_x	include/pcmcia.h	/^# define PCMCIA_SLOT_x	/;"	d
PCMCIA_SOCKETS_NO	include/pcmcia.h	/^#define PCMCIA_SOCKETS_NO	/;"	d
PCMCIA_SST	include/mpc8xx.h	/^#define PCMCIA_SST(/;"	d
PCMCIA_VS1	include/mpc8xx.h	/^#define PCMCIA_VS1(/;"	d
PCMCIA_VS2	include/mpc8xx.h	/^#define PCMCIA_VS2(/;"	d
PCMCIA_VS_MASK	include/mpc8xx.h	/^#define PCMCIA_VS_MASK(/;"	d
PCMCIA_VS_SHIFT	include/mpc8xx.h	/^#define PCMCIA_VS_SHIFT(/;"	d
PCMCIA_WP	include/mpc8xx.h	/^#define PCMCIA_WP(/;"	d
PCMCIA_WPROT	include/mpc8xx.h	/^#define PCMCIA_WPROT	/;"	d
PCMD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD(/;"	d
PCMD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD(/;"	d
PCMD0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD0 /;"	d
PCMD0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD0 /;"	d
PCMD1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD1 /;"	d
PCMD1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD1 /;"	d
PCMD10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD10 /;"	d
PCMD10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD10 /;"	d
PCMD11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD11 /;"	d
PCMD11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD11 /;"	d
PCMD12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD12 /;"	d
PCMD12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD12 /;"	d
PCMD13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD13 /;"	d
PCMD13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD13 /;"	d
PCMD14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD14 /;"	d
PCMD14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD14 /;"	d
PCMD15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD15 /;"	d
PCMD15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD15 /;"	d
PCMD16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD16 /;"	d
PCMD16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD16 /;"	d
PCMD17	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD17 /;"	d
PCMD17	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD17 /;"	d
PCMD18	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD18 /;"	d
PCMD18	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD18 /;"	d
PCMD19	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD19 /;"	d
PCMD19	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD19 /;"	d
PCMD2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD2 /;"	d
PCMD2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD2 /;"	d
PCMD20	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD20 /;"	d
PCMD20	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD20 /;"	d
PCMD21	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD21 /;"	d
PCMD21	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD21 /;"	d
PCMD22	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD22 /;"	d
PCMD22	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD22 /;"	d
PCMD23	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD23 /;"	d
PCMD23	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD23 /;"	d
PCMD24	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD24 /;"	d
PCMD24	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD24 /;"	d
PCMD25	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD25 /;"	d
PCMD25	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD25 /;"	d
PCMD26	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD26 /;"	d
PCMD26	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD26 /;"	d
PCMD27	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD27 /;"	d
PCMD27	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD27 /;"	d
PCMD28	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD28 /;"	d
PCMD28	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD28 /;"	d
PCMD29	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD29 /;"	d
PCMD29	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD29 /;"	d
PCMD3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD3 /;"	d
PCMD3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD3 /;"	d
PCMD30	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD30 /;"	d
PCMD30	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD30 /;"	d
PCMD31	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD31 /;"	d
PCMD31	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD31 /;"	d
PCMD4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD4 /;"	d
PCMD4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD4 /;"	d
PCMD5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD5 /;"	d
PCMD5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD5 /;"	d
PCMD6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD6 /;"	d
PCMD6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD6 /;"	d
PCMD7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD7 /;"	d
PCMD7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD7 /;"	d
PCMD8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD8 /;"	d
PCMD8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD8 /;"	d
PCMD9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD9 /;"	d
PCMD9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD9 /;"	d
PCMD_DCE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD_DCE /;"	d
PCMD_DCE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD_DCE /;"	d
PCMD_LC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD_LC /;"	d
PCMD_LC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD_LC /;"	d
PCMD_MBC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD_MBC /;"	d
PCMD_MBC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD_MBC /;"	d
PCMD_SQC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PCMD_SQC /;"	d
PCMD_SQC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define    PCMD_SQC /;"	d
PCMOE_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
PCMOE_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, PCMOE_N_MARK, SSI_SCK0129_MARK,$/;"	e	enum:__anona307901d0103	file:
PCMWE_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,$/;"	e	enum:__anona3077f190103	file:
PCMWE_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PCMWE_N_MARK, SSI_WS0129_MARK, MSIOF1_TXD_B_MARK, SCIF5_TXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
PCNET_BDP	drivers/net/pcnet.c	/^#define PCNET_BDP	/;"	d	file:
PCNET_CMD	drivers/net/ne2000.c	/^#define PCNET_CMD	/;"	d	file:
PCNET_DATAPORT	drivers/net/ne2000.c	/^#define PCNET_DATAPORT	/;"	d	file:
PCNET_DEBUG1	drivers/net/pcnet.c	/^#define PCNET_DEBUG1(/;"	d	file:
PCNET_DEBUG2	drivers/net/pcnet.c	/^#define PCNET_DEBUG2(/;"	d	file:
PCNET_DEBUG_LEVEL	drivers/net/pcnet.c	/^#define	PCNET_DEBUG_LEVEL	/;"	d	file:
PCNET_HAS_PROM	include/configs/malta.h	/^#define PCNET_HAS_PROM$/;"	d
PCNET_LOG_RX_BUFFERS	drivers/net/pcnet.c	/^#define PCNET_LOG_RX_BUFFERS	/;"	d	file:
PCNET_LOG_TX_BUFFERS	drivers/net/pcnet.c	/^#define PCNET_LOG_TX_BUFFERS	/;"	d	file:
PCNET_MISC	drivers/net/ne2000.c	/^#define PCNET_MISC	/;"	d	file:
PCNET_RAP	drivers/net/pcnet.c	/^#define PCNET_RAP	/;"	d	file:
PCNET_RDP	drivers/net/pcnet.c	/^#define PCNET_RDP	/;"	d	file:
PCNET_RESET	drivers/net/ne2000.c	/^#define PCNET_RESET	/;"	d	file:
PCNET_RESET	drivers/net/pcnet.c	/^#define PCNET_RESET	/;"	d	file:
PCR	arch/sh/include/asm/cpu_sh7750.h	/^#define PCR	/;"	d
PCR_A	board/renesas/r2dplus/lowlevel_init.S	/^PCR_A:		.long	PCR		\/* PCR Address *\/$/;"	l
PCR_ACD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_ACD(/;"	d
PCR_ACD_SEL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_ACD_SEL /;"	d
PCR_BPIX_1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_BPIX_1 /;"	d
PCR_BPIX_12	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_BPIX_12 /;"	d
PCR_BPIX_16	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_BPIX_16 /;"	d
PCR_BPIX_2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_BPIX_2 /;"	d
PCR_BPIX_4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_BPIX_4 /;"	d
PCR_BPIX_8	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_BPIX_8 /;"	d
PCR_CLKPOL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_CLKPOL /;"	d
PCR_COLOR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_COLOR /;"	d
PCR_D	board/renesas/r2dplus/lowlevel_init.S	/^PCR_D:		.long	0x0000$/;"	l
PCR_DIGEST_LENGTH	lib/tpm.c	/^	PCR_DIGEST_LENGTH		= 20,$/;"	e	enum:__anoneb7c99ad0103	file:
PCR_EN	drivers/net/armada100_fec.h	/^#define PCR_EN /;"	d
PCR_END_BYTE_SWAP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_END_BYTE_SWAP /;"	d
PCR_END_SEL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_END_SEL /;"	d
PCR_FLMPOL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_FLMPOL /;"	d
PCR_HS	drivers/net/armada100_fec.h	/^#define PCR_HS /;"	d
PCR_LPPOL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_LPPOL /;"	d
PCR_OEPOL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_OEPOL /;"	d
PCR_PBSIZ_1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_PBSIZ_1 /;"	d
PCR_PBSIZ_2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_PBSIZ_2 /;"	d
PCR_PBSIZ_4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_PBSIZ_4 /;"	d
PCR_PBSIZ_8	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_PBSIZ_8 /;"	d
PCR_PCD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_PCD(/;"	d
PCR_PIXPOL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_PIXPOL /;"	d
PCR_PM	drivers/net/armada100_fec.h	/^#define PCR_PM /;"	d
PCR_REV_VS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_REV_VS /;"	d
PCR_SCLKIDLE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_SCLKIDLE /;"	d
PCR_SCLK_SEL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_SCLK_SEL /;"	d
PCR_SHARP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_SHARP /;"	d
PCR_TFT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PCR_TFT /;"	d
PCSDIS	drivers/usb/host/r8a66597.h	/^#define	PCSDIS	/;"	d
PCSTimeout	drivers/net/rtl8139.c	/^	PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,$/;"	e	enum:IntrStatusBits	file:
PCSTimeout	drivers/net/rtl8169.c	/^	PCSTimeout = 0x4000,$/;"	e	enum:RTL8169_register_content	file:
PCTL_STAT_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PCTL_STAT_MASK			= 7,$/;"	e	enum:__anon957231910203	file:
PCTL_STAT_MSK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PCTL_STAT_MSK	/;"	d
PCTRA	arch/sh/include/asm/cpu_sh7750.h	/^#define PCTRA	/;"	d
PCTRB	arch/sh/include/asm/cpu_sh7750.h	/^#define PCTRB	/;"	d
PCUT_STATUS	drivers/usb/eth/r8152.h	/^#define PCUT_STATUS	/;"	d
PCU_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define PCU_DEV	/;"	d
PCW_SILICON_VERSION_1	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_1 /;"	d
PCW_SILICON_VERSION_1	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_1 /;"	d
PCW_SILICON_VERSION_1	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_1 /;"	d
PCW_SILICON_VERSION_1	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_1 /;"	d
PCW_SILICON_VERSION_1	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_1 /;"	d
PCW_SILICON_VERSION_2	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_2 /;"	d
PCW_SILICON_VERSION_2	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_2 /;"	d
PCW_SILICON_VERSION_2	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_2 /;"	d
PCW_SILICON_VERSION_2	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_2 /;"	d
PCW_SILICON_VERSION_2	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_2 /;"	d
PCW_SILICON_VERSION_3	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_3 /;"	d
PCW_SILICON_VERSION_3	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_3 /;"	d
PCW_SILICON_VERSION_3	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_3 /;"	d
PCW_SILICON_VERSION_3	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_3 /;"	d
PCW_SILICON_VERSION_3	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PCW_SILICON_VERSION_3 /;"	d
PCXR_2BSM	drivers/net/armada100_fec.h	/^#define PCXR_2BSM /;"	d
PCXR_DSCP_EN	drivers/net/armada100_fec.h	/^#define PCXR_DSCP_EN /;"	d
PCXR_FLP	drivers/net/armada100_fec.h	/^#define PCXR_FLP /;"	d
PCXR_MFL_1518	drivers/net/armada100_fec.h	/^#define PCXR_MFL_1518 /;"	d
PCXR_MFL_1536	drivers/net/armada100_fec.h	/^#define PCXR_MFL_1536 /;"	d
PCXR_MFL_2048	drivers/net/armada100_fec.h	/^#define PCXR_MFL_2048 /;"	d
PCXR_MFL_64K	drivers/net/armada100_fec.h	/^#define PCXR_MFL_64K /;"	d
PCXR_PRIO_TX_OFF	drivers/net/armada100_fec.h	/^#define PCXR_PRIO_TX_OFF /;"	d
PCXR_TX_HIGH_PRI	drivers/net/armada100_fec.h	/^#define PCXR_TX_HIGH_PRI /;"	d
PC_BSE_LOOPBACK	include/commproc.h	/^#define PC_BSE_LOOPBACK	/;"	d
PC_BVD1_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC_BVD1_CTL	/;"	d
PC_BVD2_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC_BVD2_CTL	/;"	d
PC_ENET_CLSN	include/commproc.h	/^#define PC_ENET_CLSN	/;"	d
PC_ENET_RENA	include/commproc.h	/^#define PC_ENET_RENA	/;"	d
PC_ENET_TENA	include/commproc.h	/^#define PC_ENET_TENA	/;"	d
PC_MASK	board/renesas/sh7752evb/lowlevel_init.S	/^PC_MASK:	.long	0x20000000$/;"	l
PC_MASK	board/renesas/sh7753evb/lowlevel_init.S	/^PC_MASK:	.long	0x20000000$/;"	l
PC_MASK	board/renesas/sh7757lcr/lowlevel_init.S	/^PC_MASK:	.long	0x20000000$/;"	l
PC_MTE	drivers/net/bcm-sf2-eth-gmac.h	/^#define PC_MTE	/;"	d
PC_NBITS	cmd/immap.c	/^#define PC_NBITS	/;"	d	file:
PC_PWRON	board/armadeus/apf27/apf27.h	/^#define PC_PWRON	/;"	d
PC_READY_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC_READY_CTL	/;"	d
PC_REGNUM	arch/powerpc/lib/kgdb.c	/^#define PC_REGNUM /;"	d	file:
PC_SCL	board/barco/platinum/platinum.h	/^#define PC_SCL	/;"	d
PC_VS1_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC_VS1_CTL	/;"	d
PC_VS2_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC_VS2_CTL	/;"	d
PC_WAIT_B_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PC_WAIT_B_CTL	/;"	d
PD0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PD0	/;"	d
PD0	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD0	/;"	d
PD0_AIN_FEC_TXD0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD0_AIN_FEC_TXD0	/;"	d
PD0_SPI0D2_EN	board/bf609-ezkit/soft_switch.h	/^#define PD0_SPI0D2_EN /;"	d
PD1	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD1	/;"	d
PD10	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD10	/;"	d
PD10_AF_UART2_DSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD10_AF_UART2_DSR /;"	d
PD10_AIN_SPI2_TXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD10_AIN_SPI2_TXD /;"	d
PD10_AOUT_FEC_CRS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD10_AOUT_FEC_CRS	/;"	d
PD10_PF_SPL_SPR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD10_PF_SPL_SPR /;"	d
PD11	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD11	/;"	d
PD11_AOUT_FEC_TX_CLK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD11_AOUT_FEC_TX_CLK	/;"	d
PD11_PF_CONTRAST	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD11_PF_CONTRAST /;"	d
PD12	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD12	/;"	d
PD12_AOUT_FEC_RXD0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD12_AOUT_FEC_RXD0	/;"	d
PD12_PF_ACD_OE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD12_PF_ACD_OE /;"	d
PD13	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD13	/;"	d
PD13_AOUT_FEC_RX_DV	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD13_AOUT_FEC_RX_DV	/;"	d
PD13_PF_LP_HSYNC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD13_PF_LP_HSYNC /;"	d
PD14	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD14	/;"	d
PD14_AOUT_FEC_CLR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD14_AOUT_FEC_CLR	/;"	d
PD14_PF_FLM_VSYNC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD14_PF_FLM_VSYNC /;"	d
PD15	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD15	/;"	d
PD15_AOUT_FEC_COL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD15_AOUT_FEC_COL	/;"	d
PD15_PF_LD0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD15_PF_LD0 /;"	d
PD16_AIN_FEC_TX_ER	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD16_AIN_FEC_TX_ER	/;"	d
PD16_PF_LD1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD16_PF_LD1 /;"	d
PD17_PF_I2C_DATA	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD17_PF_I2C_DATA	/;"	d
PD17_PF_LD2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD17_PF_LD2 /;"	d
PD18_PF_I2C_CLK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD18_PF_I2C_CLK	/;"	d
PD18_PF_LD3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD18_PF_LD3 /;"	d
PD19_PF_LD4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD19_PF_LD4 /;"	d
PD1_AIN_FEC_TXD1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD1_AIN_FEC_TXD1	/;"	d
PD1_SPI0D3_EN	board/bf609-ezkit/soft_switch.h	/^#define PD1_SPI0D3_EN /;"	d
PD2	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD2	/;"	d
PD20_PF_LD5	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD20_PF_LD5 /;"	d
PD21_PF_LD6	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD21_PF_LD6 /;"	d
PD22_PF_LD7	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD22_PF_LD7 /;"	d
PD23_PF_LD8	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD23_PF_LD8 /;"	d
PD24_PF_LD9	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD24_PF_LD9 /;"	d
PD25_PF_LD10	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD25_PF_LD10 /;"	d
PD26_PF_LD11	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD26_PF_LD11 /;"	d
PD27_PF_LD12	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD27_PF_LD12 /;"	d
PD28_PF_LD13	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD28_PF_LD13 /;"	d
PD29_PF_LD14	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD29_PF_LD14 /;"	d
PD2_AIN_FEC_TXD2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD2_AIN_FEC_TXD2	/;"	d
PD2_SPI0MISO_EN	board/bf609-ezkit/soft_switch.h	/^#define PD2_SPI0MISO_EN /;"	d
PD3	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD3	/;"	d
PD30_PF_LD15	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD30_PF_LD15 /;"	d
PD31_BIN_SPI2_TXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD31_BIN_SPI2_TXD /;"	d
PD31_PF_TMR2OUT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD31_PF_TMR2OUT /;"	d
PD3_AIN_FEC_TXD3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD3_AIN_FEC_TXD3	/;"	d
PD3_SPI0MOSI_EN	board/bf609-ezkit/soft_switch.h	/^#define PD3_SPI0MOSI_EN /;"	d
PD4	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD4	/;"	d
PD4_AOUT_FEC_RX_ER	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD4_AOUT_FEC_RX_ER	/;"	d
PD4_SPI0CK_EN	board/bf609-ezkit/soft_switch.h	/^#define PD4_SPI0CK_EN /;"	d
PD5	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD5	/;"	d
PD5_AOUT_FEC_RXD1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD5_AOUT_FEC_RXD1	/;"	d
PD6	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD6	/;"	d
PD6_AOUT_FEC_RXD2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD6_AOUT_FEC_RXD2	/;"	d
PD6_PF_LSCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD6_PF_LSCLK /;"	d
PD7	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD7	/;"	d
PD7_AF_UART2_DTR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD7_AF_UART2_DTR /;"	d
PD7_AIN_SPI2_SCLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD7_AIN_SPI2_SCLK /;"	d
PD7_AOUT_FEC_RXD3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD7_AOUT_FEC_RXD3	/;"	d
PD7_PF_REV	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD7_PF_REV /;"	d
PD8	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD8	/;"	d
PD8_AF_FEC_MDIO	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD8_AF_FEC_MDIO	/;"	d
PD8_AF_UART2_DCD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD8_AF_UART2_DCD /;"	d
PD8_AIN_SPI2_SS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD8_AIN_SPI2_SS /;"	d
PD8_PF_CLS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD8_PF_CLS /;"	d
PD9	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define PD9	/;"	d
PD9_AF_UART2_RI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD9_AF_UART2_RI /;"	d
PD9_AIN_FEC_MDC	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PD9_AIN_FEC_MDC	/;"	d
PD9_AOUT_SPI2_RXD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD9_AOUT_SPI2_RXD /;"	d
PD9_PF_PS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PD9_PF_PS /;"	d
PDACK	arch/blackfin/cpu/initcode.c	/^#define PDACK /;"	d	file:
PDB_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define PDB_BASE_ADDR	/;"	d
PDB_ECDSA_L_SHIFT	drivers/crypto/fsl/desc.h	/^#define PDB_ECDSA_L_SHIFT	/;"	d
PDB_ECDSA_N_SHIFT	drivers/crypto/fsl/desc.h	/^#define PDB_ECDSA_N_SHIFT	/;"	d
PDB_ECDSA_SGF_SHIFT	drivers/crypto/fsl/desc.h	/^#define PDB_ECDSA_SGF_SHIFT	/;"	d
PDB_MP_CSEL_P256	drivers/crypto/fsl/desc.h	/^#define PDB_MP_CSEL_P256	/;"	d
PDB_MP_CSEL_P384	drivers/crypto/fsl/desc.h	/^#define PDB_MP_CSEL_P384	/;"	d
PDB_MP_CSEL_P521	drivers/crypto/fsl/desc.h	/^#define PDB_MP_CSEL_P521	/;"	d
PDB_MP_CSEL_SHIFT	drivers/crypto/fsl/desc.h	/^#define PDB_MP_CSEL_SHIFT	/;"	d
PDB_MP_PUB_K_SGF_SHIFT	drivers/crypto/fsl/desc.h	/^	#define PDB_MP_PUB_K_SGF_SHIFT	/;"	d
PDB_MP_SIGN_SGF_SHIFT	drivers/crypto/fsl/desc.h	/^	#define PDB_MP_SIGN_SGF_SHIFT	/;"	d
PDCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PDCR	/;"	d
PDCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PDCR /;"	d
PDCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PDCR /;"	d
PDCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PDCR /;"	d
PDCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PDCR	/;"	d
PDCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PDCR /;"	d	file:
PDCR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PDCR0_A:	.long 0xFFFE386E$/;"	l
PDCR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PDCR0_D:	.word 0x1111$/;"	l
PDCR1_A	board/renesas/rsk7264/lowlevel_init.S	/^PDCR1_A:	.long 0xFFFE386C$/;"	l
PDCR1_D	board/renesas/rsk7264/lowlevel_init.S	/^PDCR1_D:	.word 0x1111$/;"	l
PDCR2_A	board/renesas/rsk7264/lowlevel_init.S	/^PDCR2_A:	.long 0xFFFE386A$/;"	l
PDCR2_D	board/renesas/rsk7264/lowlevel_init.S	/^PDCR2_D:	.word 0x1111$/;"	l
PDCR3_A	board/renesas/rsk7264/lowlevel_init.S	/^PDCR3_A:	.long 0xFFFE3868$/;"	l
PDCR3_D	board/renesas/rsk7264/lowlevel_init.S	/^PDCR3_D:	.word 0x1111$/;"	l
PDCRL1_A	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL1_A:	.long 0xFFFE3996$/;"	l
PDCRL1_D	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL1_D:	.word 0x1000$/;"	l
PDCRL2_A	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL2_A:	.long 0xFFFE3994$/;"	l
PDCRL2_D	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL2_D:	.word 0x1111$/;"	l
PDCRL3_A	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL3_A:	.long 0xFFFE3992$/;"	l
PDCRL3_D	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL3_D:	.word 0x00011$/;"	l
PDCRL4_A	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL4_A:	.long 0xFFFE3990$/;"	l
PDCRL4_D	board/renesas/rsk7203/lowlevel_init.S	/^PDCRL4_D:	.word 0x0011$/;"	l
PDCR_A	board/espt/lowlevel_init.S	/^PDCR_A:	.long	0xFFEF0006$/;"	l
PDCR_A	board/ms7720se/lowlevel_init.S	/^PDCR_A:		.long	PFC_BASE + 0x06$/;"	l
PDCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^PDCR_A:		.long	0xffec0006$/;"	l
PDCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PDCR_A:		.long	0xffec0006$/;"	l
PDCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PDCR_A:		.long	GPIO_BASE + 0x06$/;"	l
PDCR_D	board/espt/lowlevel_init.S	/^PDCR_D:	.word	0x0155$/;"	l
PDCR_D	board/ms7720se/lowlevel_init.S	/^PDCR_D:		.word	0x0000$/;"	l
PDCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PDCR_D	/;"	d	file:
PDCR_D	board/renesas/sh7752evb/lowlevel_init.S	/^PDCR_D:		.long	0x0000$/;"	l
PDCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PDCR_D:		.long	0x0000$/;"	l
PDDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PDDR	/;"	d
PDDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PDDR /;"	d
PDDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PDDR /;"	d
PDDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PDDR /;"	d
PDDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PDDR	/;"	d
PDDR_A	board/espt/lowlevel_init.S	/^PDDR_A:	.long	0xFFEF0026$/;"	l
PDDR_D	board/espt/lowlevel_init.S	/^PDDR_D:	.long	0x00000000$/;"	l
PDEBUG	board/amcc/makalu/cmd_pll.c	/^#define PDEBUG$/;"	d	file:
PDEBUG	drivers/usb/host/sl811.h	/^	#define PDEBUG(/;"	d
PDEBUG	examples/standalone/sched.c	/^#define PDEBUG(/;"	d	file:
PDF	doc/DocBook/Makefile	/^PDF := $(patsubst %.xml, %.pdf, $(BOOKS))$/;"	m
PDF_METHOD	doc/DocBook/Makefile	/^PDF_METHOD	= $(prefer-db2x)$/;"	m
PDIS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PDIS	/;"	d
PDIV	board/samsung/odroid/setup.h	/^#define PDIV(/;"	d
PDLLCR0	include/faraday/ftpmu010.h	/^	unsigned int	PDLLCR0;	\/* 0x30 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PDLLCR1	include/faraday/ftpmu010.h	/^	unsigned int	PDLLCR1;	\/* 0x34 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PDQ_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PDQ_MASK	/;"	d
PDQ_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define PDQ_MASK /;"	d
PDQ_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PDQ_SHIFT	/;"	d
PDR0_CSI_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_CSI_PODF(/;"	d
PDR0_CSI_PRDF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_CSI_PRDF(/;"	d
PDR0_HSP_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_HSP_PODF(/;"	d
PDR0_IPG_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_IPG_PODF(/;"	d
PDR0_MAX_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_MAX_PODF(/;"	d
PDR0_MCU_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_MCU_PODF(/;"	d
PDR0_NFC_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_NFC_PODF(/;"	d
PDR0_PER_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR0_PER_PODF(/;"	d
PDR1_FIRI_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_FIRI_PODF(/;"	d
PDR1_FIRI_PRDF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_FIRI_PRDF(/;"	d
PDR1_SSI1_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_SSI1_PODF(/;"	d
PDR1_SSI1_PRDF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_SSI1_PRDF(/;"	d
PDR1_SSI2_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_SSI2_PODF(/;"	d
PDR1_SSI2_PRDF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_SSI2_PRDF(/;"	d
PDR1_USB_PODF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_USB_PODF(/;"	d
PDR1_USB_PRDF	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PDR1_USB_PRDF(/;"	d
PDRF	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PDRF	/;"	d
PDRF_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PDRF_P	/;"	d
PDTRA	arch/sh/include/asm/cpu_sh7750.h	/^#define PDTRA	/;"	d
PDTRB	arch/sh/include/asm/cpu_sh7750.h	/^#define PDTRB	/;"	d
PDWN	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define PDWN	/;"	d
PD_ACTIVE_POWER_DOWN	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PD_ACTIVE_POWER_DOWN		= 1 << 16,$/;"	e	enum:__anon957231910203	file:
PD_AUX	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_AUX	/;"	d
PD_AUX_IDLE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_AUX_IDLE	/;"	d
PD_BUS_ACLK_DIV0_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_ACLK_DIV0_MASK	= 0x1f,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_ACLK_DIV0_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_ACLK_DIV0_SHIFT	= 3,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_ACLK_DIV1_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_ACLK_DIV1_MASK	= 0x7,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_ACLK_DIV1_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_ACLK_DIV1_SHIFT	= 0,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define PD_BUS_ACLK_HZ	/;"	d
PD_BUS_HCLK_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_HCLK_DIV_MASK	= 3,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_HCLK_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_HCLK_DIV_SHIFT	= 8,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define PD_BUS_HCLK_HZ	/;"	d
PD_BUS_PCLK_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_PCLK_DIV_MASK	= 7,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_PCLK_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_PCLK_DIV_SHIFT	= 12,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define PD_BUS_PCLK_HZ	/;"	d
PD_BUS_SEL_CPLL	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_SEL_CPLL		= 0,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_SEL_GPLL	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_SEL_GPLL,$/;"	e	enum:__anon06a678fa0203	file:
PD_BUS_SEL_PLL_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PD_BUS_SEL_PLL_MASK	= 15,$/;"	e	enum:__anon06a678fa0203	file:
PD_CH0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_CH0	/;"	d
PD_CH1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_CH1	/;"	d
PD_CH2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_CH2	/;"	d
PD_CH3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_CH3	/;"	d
PD_EXIT_FAST	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PD_EXIT_FAST	/;"	d
PD_EXIT_SLOW	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PD_EXIT_SLOW	/;"	d
PD_EXIT_SLOW_MODE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PD_EXIT_SLOW_MODE		= 0 << 17,$/;"	e	enum:__anon957231910203	file:
PD_EXP_BG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_EXP_BG	/;"	d
PD_IDLE_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PD_IDLE_MASK			= 0xff,$/;"	e	enum:__anon957231910203	file:
PD_IDLE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PD_IDLE_SHIFT	/;"	d
PD_IDLE_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PD_IDLE_SHIFT			= 8,$/;"	e	enum:__anon957231910203	file:
PD_INC_BG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_INC_BG	/;"	d
PD_MASK	arch/powerpc/include/asm/mmu.h	/^#define PD_MASK /;"	d
PD_MII_MASK	include/commproc.h	/^#define PD_MII_MASK	/;"	d
PD_MII_MDC	include/commproc.h	/^#define PD_MII_MDC	/;"	d
PD_MII_RXD0	include/commproc.h	/^#define PD_MII_RXD0	/;"	d
PD_MII_RXD1	include/commproc.h	/^#define PD_MII_RXD1	/;"	d
PD_MII_RXD2	include/commproc.h	/^#define PD_MII_RXD2	/;"	d
PD_MII_RXD3	include/commproc.h	/^#define PD_MII_RXD3	/;"	d
PD_MII_RX_CLK	include/commproc.h	/^#define PD_MII_RX_CLK	/;"	d
PD_MII_RX_DV	include/commproc.h	/^#define PD_MII_RX_DV	/;"	d
PD_MII_RX_ERR	include/commproc.h	/^#define PD_MII_RX_ERR	/;"	d
PD_MII_TXD0	include/commproc.h	/^#define PD_MII_TXD0	/;"	d
PD_MII_TXD1	include/commproc.h	/^#define PD_MII_TXD1	/;"	d
PD_MII_TXD2	include/commproc.h	/^#define PD_MII_TXD2	/;"	d
PD_MII_TXD3	include/commproc.h	/^#define PD_MII_TXD3	/;"	d
PD_MII_TX_ERR	include/commproc.h	/^#define PD_MII_TX_ERR	/;"	d
PD_NBITS	cmd/immap.c	/^#define PD_NBITS	/;"	d	file:
PD_ONDIE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PD_ONDIE_SHIFT	/;"	d
PD_OUTPUT_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PD_OUTPUT_SHIFT	/;"	d
PD_PLL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_PLL	/;"	d
PD_RING_OSC	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PD_RING_OSC	/;"	d
PD_RING_OSC	arch/arm/mach-exynos/include/mach/dp.h	/^#define PD_RING_OSC	/;"	d
PD_SDDAT3	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 PD_SDDAT3 /;"	d
PD_SHIFT	arch/powerpc/include/asm/mmu.h	/^#define PD_SHIFT /;"	d
PD_TYPE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PD_TYPE_SHIFT	/;"	d
PE	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define PE	/;"	d
PE	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define PE	/;"	d
PE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PE /;"	d
PE0	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE0	/;"	d
PE0_PF_USBOTG_NXT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE0_PF_USBOTG_NXT	/;"	d
PE1	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE1	/;"	d
PE10	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE10	/;"	d
PE10_PF_UART3_CTS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE10_PF_UART3_CTS	/;"	d
PE11	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE11	/;"	d
PE11_PF_UART3_RTS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE11_PF_UART3_RTS	/;"	d
PE12	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE12	/;"	d
PE12_PF_UART1_TXD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE12_PF_UART1_TXD	/;"	d
PE13	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE13	/;"	d
PE13_PF_UART1_RXD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE13_PF_UART1_RXD	/;"	d
PE14	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE14	/;"	d
PE14_PF_UART1_CTS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE14_PF_UART1_CTS	/;"	d
PE15	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE15	/;"	d
PE15_PF_UART1_RTS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE15_PF_UART1_RTS	/;"	d
PE18_PF_SD1_D0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE18_PF_SD1_D0	/;"	d
PE19_PF_SD1_D1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE19_PF_SD1_D1	/;"	d
PE1_PF_USBOTG_STP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE1_PF_USBOTG_STP	/;"	d
PE2	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE2	/;"	d
PE20_PF_SD1_D2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE20_PF_SD1_D2	/;"	d
PE21_PF_SD1_D3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE21_PF_SD1_D3	/;"	d
PE22_PF_SD1_CMD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE22_PF_SD1_CMD	/;"	d
PE23_PF_SD1_CLK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE23_PF_SD1_CLK	/;"	d
PE24_PF_USBOTG_CLK	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE24_PF_USBOTG_CLK	/;"	d
PE25_PF_USBOTG_DATA7	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE25_PF_USBOTG_DATA7	/;"	d
PE2_PF_USBOTG_DIR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE2_PF_USBOTG_DIR	/;"	d
PE3	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE3	/;"	d
PE3_PF_UART2_CTS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE3_PF_UART2_CTS	/;"	d
PE4	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE4	/;"	d
PE4_PF_UART2_RTS	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE4_PF_UART2_RTS	/;"	d
PE5	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE5	/;"	d
PE6	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE6	/;"	d
PE6_PF_UART2_TXD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE6_PF_UART2_TXD	/;"	d
PE7	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE7	/;"	d
PE7_PF_UART2_RXD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE7_PF_UART2_RXD	/;"	d
PE8	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE8	/;"	d
PE8_PF_UART3_TXD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE8_PF_UART3_TXD	/;"	d
PE9	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define PE9	/;"	d
PE9_PF_UART3_RXD	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PE9_PF_UART3_RXD	/;"	d
PECFG_BAR0HMPA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_BAR0HMPA	/;"	d
PECFG_BAR0LMPA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_BAR0LMPA	/;"	d
PECFG_BAR1MPA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_BAR1MPA	/;"	d
PECFG_BAR2HMPA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_BAR2HMPA	/;"	d
PECFG_BAR2LMPA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_BAR2LMPA	/;"	d
PECFG_PIM01SAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIM01SAH	/;"	d
PECFG_PIM01SAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIM01SAL	/;"	d
PECFG_PIM0LAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIM0LAH	/;"	d
PECFG_PIM0LAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIM0LAL	/;"	d
PECFG_PIM1LAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIM1LAH	/;"	d
PECFG_PIM1LAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIM1LAL	/;"	d
PECFG_PIMEN	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_PIMEN	/;"	d
PECFG_POM0LAH	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_POM0LAH	/;"	d
PECFG_POM0LAL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PECFG_POM0LAL	/;"	d
PECR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PECR	/;"	d
PECR	arch/sh/include/asm/cpu_sh7720.h	/^#define PECR	/;"	d
PECR	arch/sh/include/asm/cpu_sh7722.h	/^#define PECR /;"	d
PECR	arch/sh/include/asm/cpu_sh7723.h	/^#define PECR /;"	d
PECR	arch/sh/include/asm/cpu_sh7724.h	/^#define PECR /;"	d
PECR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PECR	/;"	d
PECR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PECR /;"	d	file:
PECR1_A	board/renesas/rsk7269/lowlevel_init.S	/^PECR1_A:	.long 0xFFFE388C$/;"	l
PECR1_D	board/renesas/rsk7269/lowlevel_init.S	/^PECR1_D:	.word 0x2011$/;"	l
PECRL1_A	board/renesas/rsk7203/lowlevel_init.S	/^PECRL1_A:	.long 0xFFFE3A16$/;"	l
PECRL1_D0	board/renesas/rsk7203/lowlevel_init.S	/^PECRL1_D0:	.word 0x0033$/;"	l
PECRL1_D1	board/renesas/rsk7203/lowlevel_init.S	/^PECRL1_D1:	.word 0x0133$/;"	l
PECRL3_A	board/renesas/rsk7203/lowlevel_init.S	/^PECRL3_A:	.long 0xFFFE3A12$/;"	l
PECRL3_D	board/renesas/rsk7203/lowlevel_init.S	/^PECRL3_D:	.word 0x0000$/;"	l
PECRL4_A	board/renesas/rsk7203/lowlevel_init.S	/^PECRL4_A:	.long 0xFFFE3A10$/;"	l
PECRL4_D0	board/renesas/rsk7203/lowlevel_init.S	/^PECRL4_D0:	.word 0x0000$/;"	l
PECRL4_D1	board/renesas/rsk7203/lowlevel_init.S	/^PECRL4_D1:	.word 0x0100$/;"	l
PECR_A	board/espt/lowlevel_init.S	/^PECR_A:	.long	0xFFEF0008$/;"	l
PECR_A	board/ms7720se/lowlevel_init.S	/^PECR_A:		.long	PFC_BASE + 0x08$/;"	l
PECR_A	board/ms7722se/lowlevel_init.S	/^PECR_A:		.long	0xa4050108$/;"	l
PECR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PECR_A:		.long	0xffec0008$/;"	l
PECR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PECR_A:		.long	GPIO_BASE + 0x08$/;"	l
PECR_D	board/espt/lowlevel_init.S	/^PECR_D:	.word	0x0000$/;"	l
PECR_D	board/ms7720se/lowlevel_init.S	/^PECR_D:		.word	0x0000$/;"	l
PECR_D	board/ms7722se/lowlevel_init.S	/^PECR_D:		.word	0x0000$/;"	l
PECR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PECR_D	/;"	d	file:
PECR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PECR_D:		.long	0x0000$/;"	l
PEC_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define PEC_BASE_ADDR /;"	d
PED	include/faraday/ftpmu010.h	/^	unsigned int	PED;		\/* 0x14 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PEDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PEDR	/;"	d
PEDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PEDR	/;"	d
PEDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PEDR /;"	d
PEDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PEDR /;"	d
PEDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PEDR /;"	d
PEDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PEDR	/;"	d
PEDSR	include/faraday/ftpmu010.h	/^	unsigned int	PEDSR;		\/* 0x18 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PEIORL_A	board/renesas/rsk7203/lowlevel_init.S	/^PEIORL_A:	.long 0xFFFE3A06$/;"	l
PEIORL_D0	board/renesas/rsk7203/lowlevel_init.S	/^PEIORL_D0:	.word 0x1C00$/;"	l
PEIORL_D1	board/renesas/rsk7203/lowlevel_init.S	/^PEIORL_D1:	.word 0x1C02$/;"	l
PEI_BOOT_NONE	arch/x86/include/asm/global_data.h	/^	PEI_BOOT_NONE = 0,$/;"	e	enum:pei_boot_mode_t
PEI_BOOT_RESUME	arch/x86/include/asm/global_data.h	/^	PEI_BOOT_RESUME,$/;"	e	enum:pei_boot_mode_t
PEI_BOOT_SOFT_RESET	arch/x86/include/asm/global_data.h	/^	PEI_BOOT_SOFT_RESET,$/;"	e	enum:pei_boot_mode_t
PEI_VERSION	arch/x86/include/asm/arch-broadwell/pei_data.h	/^#define PEI_VERSION /;"	d
PEI_VERSION	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^#define PEI_VERSION /;"	d
PEN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PEN	/;"	d
PEN	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define PEN	/;"	d
PEN	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define PEN	/;"	d
PENDER_devices	cmd/ambapp.c	/^static ambapp_device_name PENDER_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
PENDREF	arch/blackfin/cpu/initcode.c	/^#define PENDREF /;"	d	file:
PEN_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define PEN_P	/;"	d
PEPUPR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PEPUPR	/;"	d
PEPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PEPUPR_A:	.long	GPIO_BASE + 0x48$/;"	l
PEPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PEPUPR_D:	.long	0xff$/;"	l
PER2_36XX_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M2_12	/;"	d
PER2_36XX_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M2_13	/;"	d
PER2_36XX_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M2_19P2	/;"	d
PER2_36XX_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M2_26	/;"	d
PER2_36XX_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M2_38P4	/;"	d
PER2_36XX_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M_12	/;"	d
PER2_36XX_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M_13	/;"	d
PER2_36XX_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M_19P2	/;"	d
PER2_36XX_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M_26	/;"	d
PER2_36XX_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_M_38P4	/;"	d
PER2_36XX_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_N_12	/;"	d
PER2_36XX_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_N_13	/;"	d
PER2_36XX_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_N_19P2	/;"	d
PER2_36XX_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_N_26	/;"	d
PER2_36XX_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_36XX_N_38P4	/;"	d
PER2_FSEL_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_FSEL_12	/;"	d
PER2_FSEL_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_FSEL_13	/;"	d
PER2_FSEL_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_FSEL_19P2	/;"	d
PER2_FSEL_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_FSEL_26	/;"	d
PER2_FSEL_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_FSEL_38P4	/;"	d
PER2_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M2_12	/;"	d
PER2_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M2_13	/;"	d
PER2_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M2_19P2	/;"	d
PER2_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M2_26	/;"	d
PER2_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M2_38P4	/;"	d
PER2_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M_12	/;"	d
PER2_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M_13	/;"	d
PER2_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M_19P2	/;"	d
PER2_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M_26	/;"	d
PER2_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_M_38P4	/;"	d
PER2_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_N_12	/;"	d
PER2_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_N_13	/;"	d
PER2_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_N_19P2	/;"	d
PER2_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_N_26	/;"	d
PER2_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER2_N_38P4	/;"	d
PERD0_PWMDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PERD0_PWMDV_MASK	/;"	d
PERD0_SPIDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PERD0_SPIDV_MASK	/;"	d
PERD0_U0DV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PERD0_U0DV_MASK	/;"	d
PERD0_U1DV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PERD0_U1DV_MASK	/;"	d
PERDV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PERDV_MASK	/;"	d
PERDV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PERDV_MASK	/;"	d
PERDV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PERDV_MASK	/;"	d
PERDV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PERDV_MASK	/;"	d
PERDV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PERDV_MASK	/;"	d
PERE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PERE	/;"	d
PERFHPR0_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PERFHPR0_CONFIG /;"	d	file:
PERFHPR1_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PERFHPR1_CONFIG /;"	d	file:
PERFLPR0_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PERFLPR0_CONFIG /;"	d	file:
PERFLPR1_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PERFLPR1_CONFIG /;"	d	file:
PERFWR0_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PERFWR0_CONFIG /;"	d	file:
PERFWR1_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PERFWR1_CONFIG /;"	d	file:
PERIC0_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC0_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC0_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIC1_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIC1_NR_CLK	/;"	d
PERIHP_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERIHP_ACLK_HZ	/;"	d
PERIHP_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERIHP_HCLK_HZ	/;"	d
PERIHP_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERIHP_PCLK_HZ	/;"	d
PERILP0_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERILP0_ACLK_HZ	/;"	d
PERILP0_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERILP0_HCLK_HZ	/;"	d
PERILP0_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERILP0_PCLK_HZ	/;"	d
PERILP1_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERILP1_HCLK_HZ	/;"	d
PERILP1_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PERILP1_PCLK_HZ	/;"	d
PERIOD	board/freescale/m5275evb/m5275evb.c	/^#define PERIOD	/;"	d	file:
PERIODIC_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  PERIODIC_EN	/;"	d
PERIODIC_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PERIODIC_EN	/;"	d
PERIODIC_SIZE	drivers/usb/host/isp116x.h	/^#define	PERIODIC_SIZE	/;"	d
PERIOD_100_00MHZ	include/configs/yucca.h	/^#define PERIOD_100_00MHZ	/;"	d
PERIOD_133_33MHZ	include/configs/yucca.h	/^#define PERIOD_133_33MHZ	/;"	d
PERIOD_25_00MHZ	include/configs/yucca.h	/^#define PERIOD_25_00MHZ	/;"	d
PERIOD_33_33MHZ	include/configs/yucca.h	/^#define PERIOD_33_33MHZ	/;"	d
PERIOD_50_00MHZ	include/configs/yucca.h	/^#define PERIOD_50_00MHZ	/;"	d
PERIOD_66_66MHZ	include/configs/yucca.h	/^#define PERIOD_66_66MHZ	/;"	d
PERIOD_75_00MHZ	include/configs/yucca.h	/^#define PERIOD_75_00MHZ	/;"	d
PERIOD_83_33MHZ	include/configs/yucca.h	/^#define PERIOD_83_33MHZ	/;"	d
PERIOD_CNT	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define PERIOD_CNT	/;"	d
PERIPHCLK	arch/arm/mach-uniphier/arm32/timer.c	/^#define PERIPHCLK /;"	d	file:
PERIPHC_05h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_05h,$/;"	e	enum:periphc_internal_id
PERIPHC_05h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_05h,$/;"	e	enum:periphc_internal_id
PERIPHC_05h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_05h,$/;"	e	enum:periphc_internal_id
PERIPHC_05h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_05h,$/;"	e	enum:periphc_internal_id
PERIPHC_08h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_08h,$/;"	e	enum:periphc_internal_id
PERIPHC_08h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_08h,$/;"	e	enum:periphc_internal_id
PERIPHC_08h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_08h,$/;"	e	enum:periphc_internal_id
PERIPHC_08h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_08h,$/;"	e	enum:periphc_internal_id
PERIPHC_0bh	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_0bh,$/;"	e	enum:periphc_internal_id
PERIPHC_0bh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_0bh,$/;"	e	enum:periphc_internal_id
PERIPHC_0bh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_0bh,$/;"	e	enum:periphc_internal_id
PERIPHC_0bh	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_0bh,$/;"	e	enum:periphc_internal_id
PERIPHC_0c	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_0c,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_0ch	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_0ch,$/;"	e	enum:periphc_internal_id
PERIPHC_0ch	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_0ch,$/;"	e	enum:periphc_internal_id
PERIPHC_0ch	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_0ch,$/;"	e	enum:periphc_internal_id
PERIPHC_0ch	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_0ch,$/;"	e	enum:periphc_internal_id
PERIPHC_10	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_10,	\/* PERIPHC_SPI1, what is this really? *\/$/;"	e	enum:periphc_internal_id	file:
PERIPHC_10h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_10h,$/;"	e	enum:periphc_internal_id
PERIPHC_10h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_10h,$/;"	e	enum:periphc_internal_id
PERIPHC_11h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_11h,$/;"	e	enum:periphc_internal_id
PERIPHC_11h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_11h,$/;"	e	enum:periphc_internal_id
PERIPHC_11h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_11h,$/;"	e	enum:periphc_internal_id
PERIPHC_11h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_11h,$/;"	e	enum:periphc_internal_id
PERIPHC_13h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_13h,$/;"	e	enum:periphc_internal_id
PERIPHC_13h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_13h,$/;"	e	enum:periphc_internal_id
PERIPHC_13h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_13h,$/;"	e	enum:periphc_internal_id
PERIPHC_13h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_13h,$/;"	e	enum:periphc_internal_id
PERIPHC_18h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_18h,$/;"	e	enum:periphc_internal_id
PERIPHC_18h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_18h,$/;"	e	enum:periphc_internal_id
PERIPHC_1Bh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_1Bh,$/;"	e	enum:periphc_internal_id
PERIPHC_1Bh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_1Bh,$/;"	e	enum:periphc_internal_id
PERIPHC_1Ch	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_1Ch,$/;"	e	enum:periphc_internal_id
PERIPHC_1Ch	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_1Ch,$/;"	e	enum:periphc_internal_id
PERIPHC_1c	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_1c,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_21	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_21,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_21h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_21h,$/;"	e	enum:periphc_internal_id
PERIPHC_21h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_21h,$/;"	e	enum:periphc_internal_id
PERIPHC_21h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_21h,$/;"	e	enum:periphc_internal_id
PERIPHC_21h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_21h,$/;"	e	enum:periphc_internal_id
PERIPHC_22h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_22h,$/;"	e	enum:periphc_internal_id
PERIPHC_22h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_22h,$/;"	e	enum:periphc_internal_id
PERIPHC_24	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_24,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_24h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_24h,$/;"	e	enum:periphc_internal_id
PERIPHC_24h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_24h,$/;"	e	enum:periphc_internal_id
PERIPHC_24h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_24h,$/;"	e	enum:periphc_internal_id
PERIPHC_24h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_24h,$/;"	e	enum:periphc_internal_id
PERIPHC_25h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_25h,$/;"	e	enum:periphc_internal_id
PERIPHC_25h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_25h,$/;"	e	enum:periphc_internal_id
PERIPHC_29	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_29,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_29h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_29h,$/;"	e	enum:periphc_internal_id
PERIPHC_29h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_29h,$/;"	e	enum:periphc_internal_id
PERIPHC_29h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_29h,$/;"	e	enum:periphc_internal_id
PERIPHC_29h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_29h,$/;"	e	enum:periphc_internal_id
PERIPHC_2b	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_2b,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_2bh	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_2bh,$/;"	e	enum:periphc_internal_id
PERIPHC_2bh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_2bh,$/;"	e	enum:periphc_internal_id
PERIPHC_2bh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_2bh,$/;"	e	enum:periphc_internal_id
PERIPHC_2bh	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_2bh,$/;"	e	enum:periphc_internal_id
PERIPHC_2c	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_2c,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_2ch	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_2ch,$/;"	e	enum:periphc_internal_id
PERIPHC_2ch	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_2ch,$/;"	e	enum:periphc_internal_id
PERIPHC_2ch	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_2ch,$/;"	e	enum:periphc_internal_id
PERIPHC_2ch	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_2ch,$/;"	e	enum:periphc_internal_id
PERIPHC_37h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_37h,$/;"	e	enum:periphc_internal_id
PERIPHC_37h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_37h,$/;"	e	enum:periphc_internal_id
PERIPHC_38h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_38h,$/;"	e	enum:periphc_internal_id
PERIPHC_38h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_38h,$/;"	e	enum:periphc_internal_id
PERIPHC_39h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_39h,$/;"	e	enum:periphc_internal_id
PERIPHC_39h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_39h,$/;"	e	enum:periphc_internal_id
PERIPHC_3ah	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_3ah,$/;"	e	enum:periphc_internal_id
PERIPHC_3ah	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_3ah,$/;"	e	enum:periphc_internal_id
PERIPHC_3bh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_3bh,$/;"	e	enum:periphc_internal_id
PERIPHC_3bh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_3bh,$/;"	e	enum:periphc_internal_id
PERIPHC_3eh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_3eh,$/;"	e	enum:periphc_internal_id
PERIPHC_3eh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_3eh,$/;"	e	enum:periphc_internal_id
PERIPHC_40h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_40h = PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_40h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_40h = PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_41h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_41h,$/;"	e	enum:periphc_internal_id
PERIPHC_41h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_41h,$/;"	e	enum:periphc_internal_id
PERIPHC_49h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_49h,$/;"	e	enum:periphc_internal_id
PERIPHC_49h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_49h,$/;"	e	enum:periphc_internal_id
PERIPHC_4ah	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_4ah,$/;"	e	enum:periphc_internal_id
PERIPHC_4bh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_4bh,$/;"	e	enum:periphc_internal_id
PERIPHC_4ch	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_4ch,$/;"	e	enum:periphc_internal_id
PERIPHC_4eh	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_4eh,$/;"	e	enum:periphc_internal_id
PERIPHC_4eh	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_4eh,$/;"	e	enum:periphc_internal_id
PERIPHC_4fh	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_4fh,$/;"	e	enum:periphc_internal_id
PERIPHC_4fh	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_4fh,$/;"	e	enum:periphc_internal_id
PERIPHC_50h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_50h,$/;"	e	enum:periphc_internal_id
PERIPHC_50h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_50h,$/;"	e	enum:periphc_internal_id
PERIPHC_51h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_51h,$/;"	e	enum:periphc_internal_id
PERIPHC_51h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_51h,$/;"	e	enum:periphc_internal_id
PERIPHC_52h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_52h,$/;"	e	enum:periphc_internal_id
PERIPHC_52h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_52h,$/;"	e	enum:periphc_internal_id
PERIPHC_52h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_52h,$/;"	e	enum:periphc_internal_id
PERIPHC_52h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_52h,$/;"	e	enum:periphc_internal_id
PERIPHC_53h	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_53h,$/;"	e	enum:periphc_internal_id
PERIPHC_53h	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_53h,$/;"	e	enum:periphc_internal_id
PERIPHC_55h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_55h,$/;"	e	enum:periphc_internal_id
PERIPHC_55h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_55h,$/;"	e	enum:periphc_internal_id
PERIPHC_56h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_56h,$/;"	e	enum:periphc_internal_id
PERIPHC_56h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_56h,$/;"	e	enum:periphc_internal_id
PERIPHC_57h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_57h,$/;"	e	enum:periphc_internal_id
PERIPHC_57h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_57h,$/;"	e	enum:periphc_internal_id
PERIPHC_58h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_58h,$/;"	e	enum:periphc_internal_id
PERIPHC_58h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_58h,$/;"	e	enum:periphc_internal_id
PERIPHC_59h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_59h,$/;"	e	enum:periphc_internal_id
PERIPHC_5ah	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_5ah,$/;"	e	enum:periphc_internal_id
PERIPHC_5ah	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_5ah,$/;"	e	enum:periphc_internal_id
PERIPHC_5bh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_5bh,$/;"	e	enum:periphc_internal_id
PERIPHC_5bh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_5bh,$/;"	e	enum:periphc_internal_id
PERIPHC_5fh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_5fh,$/;"	e	enum:periphc_internal_id
PERIPHC_5fh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_5fh,$/;"	e	enum:periphc_internal_id
PERIPHC_6Eh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_6Eh,$/;"	e	enum:periphc_internal_id
PERIPHC_6Fh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_6Fh,$/;"	e	enum:periphc_internal_id
PERIPHC_72h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_72h,$/;"	e	enum:periphc_internal_id
PERIPHC_72h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_72h,$/;"	e	enum:periphc_internal_id
PERIPHC_73h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_73h,$/;"	e	enum:periphc_internal_id
PERIPHC_73h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_73h,$/;"	e	enum:periphc_internal_id
PERIPHC_74h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_74h,$/;"	e	enum:periphc_internal_id
PERIPHC_74h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_74h,$/;"	e	enum:periphc_internal_id
PERIPHC_75h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_75h,$/;"	e	enum:periphc_internal_id
PERIPHC_75h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_75h,$/;"	e	enum:periphc_internal_id
PERIPHC_78h	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_78h,$/;"	e	enum:periphc_internal_id
PERIPHC_78h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_78h,$/;"	e	enum:periphc_internal_id
PERIPHC_7ah	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_7ah,$/;"	e	enum:periphc_internal_id
PERIPHC_7ch	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_7ch,$/;"	e	enum:periphc_internal_id
PERIPHC_7dh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_7dh,$/;"	e	enum:periphc_internal_id
PERIPHC_7fh	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_7fh,$/;"	e	enum:periphc_internal_id
PERIPHC_7fh	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_7fh,$/;"	e	enum:periphc_internal_id
PERIPHC_84h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_84h,$/;"	e	enum:periphc_internal_id
PERIPHC_85h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_85h,$/;"	e	enum:periphc_internal_id
PERIPHC_86h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_86h,$/;"	e	enum:periphc_internal_id
PERIPHC_87h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_87h,$/;"	e	enum:periphc_internal_id
PERIPHC_88h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_88h,$/;"	e	enum:periphc_internal_id
PERIPHC_89h	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_89h,$/;"	e	enum:periphc_internal_id
PERIPHC_ACTMON	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_ACTMON,$/;"	e	enum:periphc_internal_id
PERIPHC_ACTMON	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_ACTMON,$/;"	e	enum:periphc_internal_id
PERIPHC_ACTMON	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_ACTMON,$/;"	e	enum:periphc_internal_id
PERIPHC_ACTMON	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_ACTMON,$/;"	e	enum:periphc_internal_id
PERIPHC_ADX0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_ADX0,$/;"	e	enum:periphc_internal_id
PERIPHC_ADX1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_ADX1,$/;"	e	enum:periphc_internal_id
PERIPHC_AMX0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_AMX0,$/;"	e	enum:periphc_internal_id
PERIPHC_AMX1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_AMX1,$/;"	e	enum:periphc_internal_id
PERIPHC_APE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_APE,			\/* 0x6c0:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_AUDIO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_AUDIO,$/;"	e	enum:periphc_internal_id
PERIPHC_AUDIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_AUDIO,$/;"	e	enum:periphc_internal_id
PERIPHC_AUDIO	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_AUDIO,$/;"	e	enum:periphc_internal_id
PERIPHC_AUDIO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_AUDIO,$/;"	e	enum:periphc_internal_id
PERIPHC_CILAB	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_CILAB,$/;"	e	enum:periphc_internal_id
PERIPHC_CILAB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_CILAB,$/;"	e	enum:periphc_internal_id
PERIPHC_CILCD	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_CILCD,$/;"	e	enum:periphc_internal_id
PERIPHC_CILCD	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_CILCD,$/;"	e	enum:periphc_internal_id
PERIPHC_CILE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_CILE,$/;"	e	enum:periphc_internal_id
PERIPHC_CILE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_CILE,$/;"	e	enum:periphc_internal_id
PERIPHC_CLK72MHZ	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_CLK72MHZ,$/;"	e	enum:periphc_internal_id
PERIPHC_CLK72MHZ	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_CLK72MHZ,$/;"	e	enum:periphc_internal_id
PERIPHC_COUNT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_COUNT,$/;"	e	enum:periphc_internal_id
PERIPHC_COUNT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_COUNT,$/;"	e	enum:periphc_internal_id
PERIPHC_COUNT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_COUNT,$/;"	e	enum:periphc_internal_id
PERIPHC_COUNT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_COUNT,$/;"	e	enum:periphc_internal_id
PERIPHC_COUNT	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_COUNT,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_CSITE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_CSITE,$/;"	e	enum:periphc_internal_id
PERIPHC_CSITE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_CSITE,$/;"	e	enum:periphc_internal_id
PERIPHC_CSITE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_CSITE,$/;"	e	enum:periphc_internal_id
PERIPHC_CSITE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_CSITE,$/;"	e	enum:periphc_internal_id
PERIPHC_CSITE	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_CSITE,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_CVE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_CVE,$/;"	e	enum:periphc_internal_id
PERIPHC_CVE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_CVE,$/;"	e	enum:periphc_internal_id
PERIPHC_CVE	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_CVE,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_DAM0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_DAM0,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DAM0,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM0	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_DAM0,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_DAM1,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DAM1,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_DAM1,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_DAM2,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DAM2,$/;"	e	enum:periphc_internal_id
PERIPHC_DAM2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_DAM2,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_DISP1,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DISP1,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DISP1,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_DISP1,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP1	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_DISP1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_DISP2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_DISP2,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DISP2,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DISP2,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_DISP2,$/;"	e	enum:periphc_internal_id
PERIPHC_DISP2	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_DISP2,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_DMIC3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DMIC3,			\/* 0x6bc:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_DSIA_LP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DSIA_LP,$/;"	e	enum:periphc_internal_id
PERIPHC_DSIA_LP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DSIA_LP,$/;"	e	enum:periphc_internal_id
PERIPHC_DSIB_LP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DSIB_LP,$/;"	e	enum:periphc_internal_id
PERIPHC_DSIB_LP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DSIB_LP,$/;"	e	enum:periphc_internal_id
PERIPHC_DTV	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DTV,$/;"	e	enum:periphc_internal_id
PERIPHC_DTV	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DTV,$/;"	e	enum:periphc_internal_id
PERIPHC_DVC_I2C	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_DVC_I2C,$/;"	e	enum:periphc_internal_id
PERIPHC_DVC_I2C	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_DVC_I2C,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_DVFS_REF	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DVFS_REF,$/;"	e	enum:periphc_internal_id
PERIPHC_DVFS_REF	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DVFS_REF,$/;"	e	enum:periphc_internal_id
PERIPHC_DVFS_SOC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_DVFS_SOC,$/;"	e	enum:periphc_internal_id
PERIPHC_DVFS_SOC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_DVFS_SOC,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_EMC,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_EMC,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_EMC,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_EMC,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_EMC,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_EMC_DLL	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_EMC_DLL,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC_DLL	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_EMC_DLL,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC_LATENCY	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_EMC_LATENCY,$/;"	e	enum:periphc_internal_id
PERIPHC_EMC_LATENCY	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_EMC_LATENCY,$/;"	e	enum:periphc_internal_id
PERIPHC_ENTROPY	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_ENTROPY,$/;"	e	enum:periphc_internal_id
PERIPHC_ENTROPY	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_ENTROPY,$/;"	e	enum:periphc_internal_id
PERIPHC_EPP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_EPP,$/;"	e	enum:periphc_internal_id
PERIPHC_EPP	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_EPP,$/;"	e	enum:periphc_internal_id
PERIPHC_EPP	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_EPP,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_EXTPERIPH1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_EXTPERIPH1,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_EXTPERIPH1,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_EXTPERIPH1,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_EXTPERIPH1,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_EXTPERIPH2,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_EXTPERIPH2,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_EXTPERIPH2,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_EXTPERIPH2,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_EXTPERIPH3,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_EXTPERIPH3,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_EXTPERIPH3,$/;"	e	enum:periphc_internal_id
PERIPHC_EXTPERIPH3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_EXTPERIPH3,$/;"	e	enum:periphc_internal_id
PERIPHC_G2D	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_G2D,$/;"	e	enum:periphc_internal_id
PERIPHC_G2D	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_G2D,$/;"	e	enum:periphc_internal_id
PERIPHC_G2D	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_G2D,$/;"	e	enum:periphc_internal_id
PERIPHC_G2D	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_G2D,$/;"	e	enum:periphc_internal_id
PERIPHC_G2D	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_G2D,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_G3D	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_G3D,$/;"	e	enum:periphc_internal_id
PERIPHC_G3D	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_G3D,$/;"	e	enum:periphc_internal_id
PERIPHC_G3D	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_G3D,$/;"	e	enum:periphc_internal_id
PERIPHC_G3D	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_G3D,$/;"	e	enum:periphc_internal_id
PERIPHC_G3D	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_G3D,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_G3D2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_G3D2 = PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_G3D2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_G3D2 = PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_HDA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_HDA,$/;"	e	enum:periphc_internal_id
PERIPHC_HDA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_HDA,		\/* 0x428 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_HDA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_HDA,		\/* 0x428 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_HDA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_HDA,$/;"	e	enum:periphc_internal_id
PERIPHC_HDA2CODEC2X	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_HDA2CODEC2X,$/;"	e	enum:periphc_internal_id
PERIPHC_HDA2CODEC2X	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_HDA2CODEC2X,$/;"	e	enum:periphc_internal_id
PERIPHC_HDA2CODEC2X	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_HDA2CODEC2X,$/;"	e	enum:periphc_internal_id
PERIPHC_HDA2CODEC2X	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_HDA2CODEC2X,$/;"	e	enum:periphc_internal_id
PERIPHC_HDMI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_HDMI,$/;"	e	enum:periphc_internal_id
PERIPHC_HDMI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_HDMI,$/;"	e	enum:periphc_internal_id
PERIPHC_HDMI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_HDMI,$/;"	e	enum:periphc_internal_id
PERIPHC_HDMI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_HDMI,$/;"	e	enum:periphc_internal_id
PERIPHC_HDMI	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_HDMI,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_HDMI_AUDIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_HDMI_AUDIO,$/;"	e	enum:periphc_internal_id
PERIPHC_HOST1X	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_HOST1X,$/;"	e	enum:periphc_internal_id
PERIPHC_HOST1X	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_HOST1X,$/;"	e	enum:periphc_internal_id
PERIPHC_HOST1X	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_HOST1X,$/;"	e	enum:periphc_internal_id
PERIPHC_HOST1X	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_HOST1X,$/;"	e	enum:periphc_internal_id
PERIPHC_HOST1X	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_HOST1X,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_HSI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_HSI,$/;"	e	enum:periphc_internal_id
PERIPHC_HSI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_HSI,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2C1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2C1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2C1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2C1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C1	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_I2C1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_I2C2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2C2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2C2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2C2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2C2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C2	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_I2C2,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_I2C3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2C3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2C3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2C3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2C3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C3	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_I2C3,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_I2C4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2C4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2C4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2C4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2C4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2C5,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2C5,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2C5,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C6	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2C6,$/;"	e	enum:periphc_internal_id
PERIPHC_I2C6	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2C6,$/;"	e	enum:periphc_internal_id
PERIPHC_I2CSLOW	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2CSLOW,$/;"	e	enum:periphc_internal_id
PERIPHC_I2CSLOW	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2CSLOW,$/;"	e	enum:periphc_internal_id
PERIPHC_I2CSLOW	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2CSLOW,$/;"	e	enum:periphc_internal_id
PERIPHC_I2CSLOW	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2CSLOW,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2S0,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2S0,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S0	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2S0,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2S1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2S1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2S1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2S1,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S1	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_I2S1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_I2S2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2S2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2S2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2S2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2S2,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S2	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_I2S2,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_I2S3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2S3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2S3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2S3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2S3,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_I2S4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_I2S4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2S4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_I2S4,$/;"	e	enum:periphc_internal_id
PERIPHC_I2S5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_I2S5,$/;"	e	enum:periphc_internal_id
PERIPHC_IDE0	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_IDE0,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_MAUD	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_MAUD,			\/* 0x6d4:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_MIPI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_MIPI,$/;"	e	enum:periphc_internal_id
PERIPHC_MIPI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_MIPI,$/;"	e	enum:periphc_internal_id
PERIPHC_MIPI	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_MIPI,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_MPE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_MPE,$/;"	e	enum:periphc_internal_id
PERIPHC_MPE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_MPE,$/;"	e	enum:periphc_internal_id
PERIPHC_MPE	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_MPE,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_MSELECT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_MSELECT,$/;"	e	enum:periphc_internal_id
PERIPHC_MSELECT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_MSELECT,$/;"	e	enum:periphc_internal_id
PERIPHC_MSELECT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_MSELECT,$/;"	e	enum:periphc_internal_id
PERIPHC_MSELECT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_MSELECT,$/;"	e	enum:periphc_internal_id
PERIPHC_MSENC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_MSENC,$/;"	e	enum:periphc_internal_id
PERIPHC_MSENC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_MSENC,$/;"	e	enum:periphc_internal_id
PERIPHC_NANDSPEED	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_NANDSPEED,$/;"	e	enum:periphc_internal_id
PERIPHC_NANDSPEED	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_NANDSPEED,$/;"	e	enum:periphc_internal_id
PERIPHC_NDFLASH	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_NDFLASH,$/;"	e	enum:periphc_internal_id
PERIPHC_NDFLASH	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_NDFLASH,$/;"	e	enum:periphc_internal_id
PERIPHC_NDFLASH	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_NDFLASH,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_NONE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_NONE = -1,$/;"	e	enum:periphc_internal_id
PERIPHC_NONE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_NONE = -1,$/;"	e	enum:periphc_internal_id
PERIPHC_NONE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_NONE = -1,$/;"	e	enum:periphc_internal_id
PERIPHC_NONE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_NONE = -1,$/;"	e	enum:periphc_internal_id
PERIPHC_NONE	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_NONE = -1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_NOR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_NOR,$/;"	e	enum:periphc_internal_id
PERIPHC_NOR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_NOR,$/;"	e	enum:periphc_internal_id
PERIPHC_NOR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_NOR,$/;"	e	enum:periphc_internal_id
PERIPHC_NOR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_NOR,$/;"	e	enum:periphc_internal_id
PERIPHC_NOR	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_NOR,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_NVDEC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_NVDEC,			\/* 0x698 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_NVENC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_NVENC,			\/* 0x6a0 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_NVJPG	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_NVJPG,			\/* 0x69c *\/$/;"	e	enum:periphc_internal_id
PERIPHC_OSC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_OSC,$/;"	e	enum:periphc_internal_id
PERIPHC_OSC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_OSC,$/;"	e	enum:periphc_internal_id
PERIPHC_OWR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_OWR,$/;"	e	enum:periphc_internal_id
PERIPHC_OWR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_OWR,$/;"	e	enum:periphc_internal_id
PERIPHC_OWR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_OWR,$/;"	e	enum:periphc_internal_id
PERIPHC_OWR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_OWR,$/;"	e	enum:periphc_internal_id
PERIPHC_OWR	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_OWR,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_PEX_SATA_USB_RX_BYP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_PEX_SATA_USB_RX_BYP,	\/* 0x6d0:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_PWM	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_PWM,$/;"	e	enum:periphc_internal_id
PERIPHC_PWM	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_PWM,$/;"	e	enum:periphc_internal_id
PERIPHC_PWM	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_PWM,$/;"	e	enum:periphc_internal_id
PERIPHC_PWM	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_PWM,$/;"	e	enum:periphc_internal_id
PERIPHC_PWM	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_PWM,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_QSPI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_QSPI,			\/* 0x6c4:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_SATA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SATA,$/;"	e	enum:periphc_internal_id
PERIPHC_SATA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SATA,$/;"	e	enum:periphc_internal_id
PERIPHC_SATA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SATA,$/;"	e	enum:periphc_internal_id
PERIPHC_SATA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SATA,$/;"	e	enum:periphc_internal_id
PERIPHC_SATAOOB	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SATAOOB,$/;"	e	enum:periphc_internal_id
PERIPHC_SATAOOB	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SATAOOB,$/;"	e	enum:periphc_internal_id
PERIPHC_SATAOOB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SATAOOB,$/;"	e	enum:periphc_internal_id
PERIPHC_SATAOOB	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SATAOOB,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SBC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SBC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SBC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SBC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SBC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SBC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SBC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SBC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SBC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SBC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SBC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SBC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SBC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SBC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SBC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SBC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SBC5,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SBC5,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SBC5,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC5	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SBC5,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC6	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SBC6,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC6	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SBC6,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC6	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SBC6,$/;"	e	enum:periphc_internal_id
PERIPHC_SBC6	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SBC6,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SDMMC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SDMMC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SDMMC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SDMMC1,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC1	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SDMMC1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SDMMC2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SDMMC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SDMMC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SDMMC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SDMMC2,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC2	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SDMMC2,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SDMMC3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SDMMC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SDMMC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SDMMC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SDMMC3,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC3	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SDMMC3,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SDMMC4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SDMMC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SDMMC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SDMMC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SDMMC4,$/;"	e	enum:periphc_internal_id
PERIPHC_SDMMC4	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SDMMC4,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SDMMC_LEGACY_TM	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SDMMC_LEGACY_TM = PERIPHC_Y_FIRST,	\/* 0x694 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_SOC_THERM	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SOC_THERM,$/;"	e	enum:periphc_internal_id
PERIPHC_SOC_THERM	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SOC_THERM,$/;"	e	enum:periphc_internal_id
PERIPHC_SOR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SOR,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_IN	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SPDIF_IN,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_IN	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SPDIF_IN,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_IN	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SPDIF_IN,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_IN	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SPDIF_IN,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_IN	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SPDIF_IN,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SPDIF_OUT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SPDIF_OUT,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_OUT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SPDIF_OUT,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_OUT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SPDIF_OUT,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_OUT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SPDIF_OUT,$/;"	e	enum:periphc_internal_id
PERIPHC_SPDIF_OUT	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SPDIF_OUT,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SPEEDO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SPEEDO,$/;"	e	enum:periphc_internal_id
PERIPHC_SPEEDO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SPEEDO,$/;"	e	enum:periphc_internal_id
PERIPHC_SPI1	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SPI1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SPI2	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SPI2,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SPI3	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SPI3,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SPI4	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_SPI4,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_SYS	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_SYS,$/;"	e	enum:periphc_internal_id
PERIPHC_SYS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_SYS,$/;"	e	enum:periphc_internal_id
PERIPHC_SYS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_SYS,$/;"	e	enum:periphc_internal_id
PERIPHC_SYS	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_SYS,$/;"	e	enum:periphc_internal_id
PERIPHC_TRACECLKIN	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_TRACECLKIN,$/;"	e	enum:periphc_internal_id
PERIPHC_TRACECLKIN	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_TRACECLKIN,$/;"	e	enum:periphc_internal_id
PERIPHC_TSEC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_TSEC,$/;"	e	enum:periphc_internal_id
PERIPHC_TSEC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_TSEC,$/;"	e	enum:periphc_internal_id
PERIPHC_TSECB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_TSECB,			\/* 0x6d8:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_TSENSOR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_TSENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_TSENSOR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_TSENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_TSENSOR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_TSENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_TSENSOR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_TSENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_TVDAC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_TVDAC,$/;"	e	enum:periphc_internal_id
PERIPHC_TVDAC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_TVDAC,$/;"	e	enum:periphc_internal_id
PERIPHC_TVDAC	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_TVDAC,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_TVO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_TVO,$/;"	e	enum:periphc_internal_id
PERIPHC_TVO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_TVO,$/;"	e	enum:periphc_internal_id
PERIPHC_TVO	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_TVO,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_TWC	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_TWC,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_UART1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_UART1,$/;"	e	enum:periphc_internal_id
PERIPHC_UART1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_UART1,$/;"	e	enum:periphc_internal_id
PERIPHC_UART1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_UART1,$/;"	e	enum:periphc_internal_id
PERIPHC_UART1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_UART1,$/;"	e	enum:periphc_internal_id
PERIPHC_UART1	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_UART1,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_UART2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_UART2,$/;"	e	enum:periphc_internal_id
PERIPHC_UART2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_UART2,$/;"	e	enum:periphc_internal_id
PERIPHC_UART2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_UART2,$/;"	e	enum:periphc_internal_id
PERIPHC_UART2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_UART2,$/;"	e	enum:periphc_internal_id
PERIPHC_UART2	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_UART2,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_UART3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_UART3,$/;"	e	enum:periphc_internal_id
PERIPHC_UART3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_UART3,$/;"	e	enum:periphc_internal_id
PERIPHC_UART3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_UART3,$/;"	e	enum:periphc_internal_id
PERIPHC_UART3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_UART3,$/;"	e	enum:periphc_internal_id
PERIPHC_UART3	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_UART3,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_UART4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_UART4,$/;"	e	enum:periphc_internal_id
PERIPHC_UART4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_UART4,$/;"	e	enum:periphc_internal_id
PERIPHC_UART4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_UART4,$/;"	e	enum:periphc_internal_id
PERIPHC_UART4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_UART4,$/;"	e	enum:periphc_internal_id
PERIPHC_UART4	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_UART4,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_UART5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_UART5,$/;"	e	enum:periphc_internal_id
PERIPHC_UART5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_UART5,$/;"	e	enum:periphc_internal_id
PERIPHC_UART5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_UART5,$/;"	e	enum:periphc_internal_id
PERIPHC_UART5	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_UART5,$/;"	e	enum:periphc_internal_id
PERIPHC_UART5	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_UART5,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_USB2_HSIC_TRK	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_USB2_HSIC_TRK,		\/* 0x6cc:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_VDE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_VDE,$/;"	e	enum:periphc_internal_id
PERIPHC_VDE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VDE,$/;"	e	enum:periphc_internal_id
PERIPHC_VDE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VDE,$/;"	e	enum:periphc_internal_id
PERIPHC_VDE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_VDE,$/;"	e	enum:periphc_internal_id
PERIPHC_VDE	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_VDE,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_VFIR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_VFIR,$/;"	e	enum:periphc_internal_id
PERIPHC_VFIR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VFIR,$/;"	e	enum:periphc_internal_id
PERIPHC_VFIR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VFIR,$/;"	e	enum:periphc_internal_id
PERIPHC_VFIR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_VFIR,$/;"	e	enum:periphc_internal_id
PERIPHC_VFIR	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_VFIR,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_VI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_VI,$/;"	e	enum:periphc_internal_id
PERIPHC_VI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VI,$/;"	e	enum:periphc_internal_id
PERIPHC_VI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VI,$/;"	e	enum:periphc_internal_id
PERIPHC_VI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_VI,$/;"	e	enum:periphc_internal_id
PERIPHC_VI	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_VI,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_VIC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VIC,$/;"	e	enum:periphc_internal_id
PERIPHC_VIC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VIC,$/;"	e	enum:periphc_internal_id
PERIPHC_VI_I2C	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VI_I2C,			\/* 0x6c8:  *\/$/;"	e	enum:periphc_internal_id
PERIPHC_VI_SENSOR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_VI_SENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_VI_SENSOR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VI_SENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_VI_SENSOR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VI_SENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_VI_SENSOR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_VI_SENSOR,$/;"	e	enum:periphc_internal_id
PERIPHC_VI_SENSOR	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_VI_SENSOR,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_VI_SENSOR2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VI_SENSOR2,$/;"	e	enum:periphc_internal_id
PERIPHC_VI_SENSOR2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VI_SENSOR2,$/;"	e	enum:periphc_internal_id
PERIPHC_VW_FIRST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_VW_FIRST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_VW_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_VW_FIRST	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPHC_VW_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_XIO	arch/arm/mach-tegra/tegra20/clock.c	/^	PERIPHC_XIO,$/;"	e	enum:periphc_internal_id	file:
PERIPHC_XUSB_CORE_DEV	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_XUSB_CORE_DEV,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_CORE_DEV	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_XUSB_CORE_DEV,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_CORE_HOST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_XUSB_CORE_HOST = PERIPHC_X_FIRST,	\/* 0x600 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_CORE_HOST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_XUSB_CORE_HOST = PERIPHC_X_FIRST,	\/* 0x600 *\/$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_FALCON	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_XUSB_FALCON,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_FALCON	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_XUSB_FALCON,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_FS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_XUSB_FS,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_FS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_XUSB_FS,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_SS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_XUSB_SS,$/;"	e	enum:periphc_internal_id
PERIPHC_XUSB_SS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_XUSB_SS,$/;"	e	enum:periphc_internal_id
PERIPHC_X_FIRST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPHC_X_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_X_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_X_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHC_Y_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPHC_Y_FIRST,$/;"	e	enum:periphc_internal_id
PERIPHERAL_ID_MAX	drivers/clk/at91/clk-peripheral.c	/^#define PERIPHERAL_ID_MAX	/;"	d	file:
PERIPHERAL_ID_MIN	drivers/clk/at91/clk-peripheral.c	/^#define PERIPHERAL_ID_MIN	/;"	d	file:
PERIPHERAL_MASK	drivers/clk/at91/clk-peripheral.c	/^#define PERIPHERAL_MASK(/;"	d	file:
PERIPHERAL_USAGE	arch/blackfin/include/asm/gpio.h	/^#define PERIPHERAL_USAGE /;"	d
PERIPH_ADC	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_ADC	/;"	d
PERIPH_ARM1	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_ARM1	/;"	d
PERIPH_ARM1_WE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_ARM1_WE	/;"	d
PERIPH_ARM2	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_ARM2	/;"	d
PERIPH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define PERIPH_BASE	/;"	d
PERIPH_CLCD	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_CLCD	/;"	d
PERIPH_CLK_ALL	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_CLK_ALL	/;"	d
PERIPH_DMA	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_DMA	/;"	d
PERIPH_FIRDA	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_FIRDA	/;"	d
PERIPH_FSMC	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_FSMC	/;"	d
PERIPH_GMAC	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_GMAC	/;"	d
PERIPH_GPIO3	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_GPIO3	/;"	d
PERIPH_GPIO4	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_GPIO4	/;"	d
PERIPH_GPT3	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_GPT3	/;"	d
PERIPH_GPT4	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_GPT4	/;"	d
PERIPH_GPT5	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_GPT5	/;"	d
PERIPH_I2C	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_I2C	/;"	d
PERIPH_ID_2D	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_2D,$/;"	e	enum:periph_id
PERIPH_ID_2D	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_2D,$/;"	e	enum:periph_id
PERIPH_ID_2D	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_2D,$/;"	e	enum:periph_id
PERIPH_ID_3D	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_3D,$/;"	e	enum:periph_id
PERIPH_ID_3D	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_3D,$/;"	e	enum:periph_id
PERIPH_ID_3D	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_3D,$/;"	e	enum:periph_id
PERIPH_ID_3D2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_3D2,$/;"	e	enum:periph_id
PERIPH_ID_3D2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_3D2,$/;"	e	enum:periph_id
PERIPH_ID_AC97	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_AC97,$/;"	e	enum:periph_id
PERIPH_ID_ACTMON	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_ACTMON,$/;"	e	enum:periph_id
PERIPH_ID_ACTMON	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ACTMON,$/;"	e	enum:periph_id
PERIPH_ID_ACTMON	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_ACTMON,$/;"	e	enum:periph_id
PERIPH_ID_ACTMON	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_ACTMON,$/;"	e	enum:periph_id
PERIPH_ID_ADX0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_ADX0,$/;"	e	enum:periph_id
PERIPH_ID_ADX0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ADX0,$/;"	e	enum:periph_id
PERIPH_ID_ADX0	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_ADX0,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_ADX1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ADX1,$/;"	e	enum:periph_id
PERIPH_ID_ADX1	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_ADX1,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFC0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFC0,$/;"	e	enum:periph_id
PERIPH_ID_AFC0	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AFC0,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFC1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFC1,$/;"	e	enum:periph_id
PERIPH_ID_AFC1	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AFC1,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFC2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFC2,$/;"	e	enum:periph_id
PERIPH_ID_AFC2	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AFC2,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFC3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFC3,$/;"	e	enum:periph_id
PERIPH_ID_AFC3	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AFC3,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFC4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFC4,$/;"	e	enum:periph_id
PERIPH_ID_AFC4	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AFC4,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFC5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFC5,$/;"	e	enum:periph_id
PERIPH_ID_AFC5	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AFC5,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AFI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_AFI,$/;"	e	enum:periph_id
PERIPH_ID_AFI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AFI,$/;"	e	enum:periph_id
PERIPH_ID_AFI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_AFI,$/;"	e	enum:periph_id
PERIPH_ID_AFI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_AFI,$/;"	e	enum:periph_id
PERIPH_ID_AFI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_AFI,$/;"	e	enum:periph_id
PERIPH_ID_AHBDMA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_AHBDMA,$/;"	e	enum:periph_id
PERIPH_ID_AHBDMA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AHBDMA,$/;"	e	enum:periph_id
PERIPH_ID_AHBDMA	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_AHBDMA,$/;"	e	enum:periph_id
PERIPH_ID_AHBDMA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_AHBDMA,$/;"	e	enum:periph_id
PERIPH_ID_AHBDMA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_AHBDMA,$/;"	e	enum:periph_id
PERIPH_ID_AHUB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_AHUB,$/;"	e	enum:periph_id
PERIPH_ID_AMX0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_AMX0,$/;"	e	enum:periph_id
PERIPH_ID_AMX0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AMX0,$/;"	e	enum:periph_id
PERIPH_ID_AMX0	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AMX0,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AMX1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AMX1,$/;"	e	enum:periph_id
PERIPH_ID_AMX1	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AMX1,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_APB2APE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_APB2APE,$/;"	e	enum:periph_id
PERIPH_ID_APBDMA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_APBDMA,$/;"	e	enum:periph_id
PERIPH_ID_APBDMA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_APBDMA,$/;"	e	enum:periph_id
PERIPH_ID_APBDMA	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_APBDMA,$/;"	e	enum:periph_id
PERIPH_ID_APBDMA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_APBDMA,$/;"	e	enum:periph_id
PERIPH_ID_APBDMA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_APBDMA,$/;"	e	enum:periph_id
PERIPH_ID_APBIF	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_APBIF,$/;"	e	enum:periph_id
PERIPH_ID_APBIF	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_APBIF,$/;"	e	enum:periph_id
PERIPH_ID_APBIF	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_APBIF,$/;"	e	enum:periph_id
PERIPH_ID_APBIF	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_APBIF,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_APE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_APE,$/;"	e	enum:periph_id
PERIPH_ID_ATOMICS	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_ATOMICS,$/;"	e	enum:periph_id
PERIPH_ID_ATOMICS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ATOMICS,$/;"	e	enum:periph_id
PERIPH_ID_ATOMICS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_ATOMICS,$/;"	e	enum:periph_id
PERIPH_ID_ATOMICS	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_ATOMICS,$/;"	e	enum:periph_id
PERIPH_ID_AUDIO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_AUDIO,$/;"	e	enum:periph_id
PERIPH_ID_AUDIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AUDIO,$/;"	e	enum:periph_id
PERIPH_ID_AUDIO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_AUDIO,$/;"	e	enum:periph_id
PERIPH_ID_AUDIO	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_AUDIO,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_AVPUCQ	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_AVPUCQ,$/;"	e	enum:periph_id
PERIPH_ID_AVPUCQ	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_AVPUCQ,$/;"	e	enum:periph_id
PERIPH_ID_AVPUCQ	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_AVPUCQ,$/;"	e	enum:periph_id
PERIPH_ID_AVPUCQ	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_AVPUCQ,$/;"	e	enum:periph_id
PERIPH_ID_AVPUCQ	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_AVPUCQ,$/;"	e	enum:periph_id
PERIPH_ID_BSEA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_BSEA,$/;"	e	enum:periph_id
PERIPH_ID_BSEA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_BSEA,$/;"	e	enum:periph_id
PERIPH_ID_BSEA	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_BSEA,$/;"	e	enum:periph_id
PERIPH_ID_BSEA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_BSEA,$/;"	e	enum:periph_id
PERIPH_ID_BSEA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_BSEA,$/;"	e	enum:periph_id
PERIPH_ID_BSEV	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_BSEV,$/;"	e	enum:periph_id
PERIPH_ID_BSEV	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_BSEV,$/;"	e	enum:periph_id
PERIPH_ID_BSEV	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_BSEV,$/;"	e	enum:periph_id
PERIPH_ID_BSEV	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_BSEV,$/;"	e	enum:periph_id
PERIPH_ID_BSEV	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_BSEV,$/;"	e	enum:periph_id
PERIPH_ID_CACHE2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CACHE2,$/;"	e	enum:periph_id
PERIPH_ID_CACHE2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CACHE2,$/;"	e	enum:periph_id
PERIPH_ID_CACHE2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_CACHE2,$/;"	e	enum:periph_id
PERIPH_ID_CACHE2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CACHE2,$/;"	e	enum:periph_id
PERIPH_ID_CACHE2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CACHE2,$/;"	e	enum:periph_id
PERIPH_ID_CAM_MCLK	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CAM_MCLK,$/;"	e	enum:periph_id
PERIPH_ID_CAM_MCLK	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CAM_MCLK,$/;"	e	enum:periph_id
PERIPH_ID_CAM_MCLK2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CAM_MCLK2,$/;"	e	enum:periph_id
PERIPH_ID_CAM_MCLK2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CAM_MCLK2,$/;"	e	enum:periph_id
PERIPH_ID_CEC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CEC,$/;"	e	enum:periph_id
PERIPH_ID_CEC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CEC,$/;"	e	enum:periph_id
PERIPH_ID_CEC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CEC,$/;"	e	enum:periph_id
PERIPH_ID_CEC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CEC,$/;"	e	enum:periph_id
PERIPH_ID_CILAB	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CILAB,$/;"	e	enum:periph_id
PERIPH_ID_CILCD	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CILCD,$/;"	e	enum:periph_id
PERIPH_ID_CILE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CILE,$/;"	e	enum:periph_id
PERIPH_ID_CLK72MHZ	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CLK72MHZ,$/;"	e	enum:periph_id
PERIPH_ID_CLK72MHZ	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CLK72MHZ,$/;"	e	enum:periph_id
PERIPH_ID_CLK_M_DOUBLER	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_CLK_M_DOUBLER,$/;"	e	enum:periph_id
PERIPH_ID_COP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_COP,$/;"	e	enum:periph_id
PERIPH_ID_COP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_COP,$/;"	e	enum:periph_id
PERIPH_ID_COP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_COP,$/;"	e	enum:periph_id
PERIPH_ID_COP	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_COP,$/;"	e	enum:periph_id
PERIPH_ID_CORESIGHT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CORESIGHT,$/;"	e	enum:periph_id
PERIPH_ID_CORESIGHT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CORESIGHT,$/;"	e	enum:periph_id
PERIPH_ID_CORESIGHT	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_CORESIGHT,$/;"	e	enum:periph_id
PERIPH_ID_CORESIGHT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CORESIGHT,$/;"	e	enum:periph_id
PERIPH_ID_CORESIGHT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CORESIGHT,$/;"	e	enum:periph_id
PERIPH_ID_COUNT	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_COUNT,$/;"	e	enum:periph_id
PERIPH_ID_COUNT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_COUNT,$/;"	e	enum:periph_id
PERIPH_ID_COUNT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_COUNT,$/;"	e	enum:periph_id
PERIPH_ID_COUNT	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_COUNT,$/;"	e	enum:periph_id
PERIPH_ID_COUNT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_COUNT,$/;"	e	enum:periph_id
PERIPH_ID_COUNT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_COUNT,$/;"	e	enum:periph_id
PERIPH_ID_CPU	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CPU = PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPU	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CPU = PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPU	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_CPU = PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPU	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CPU = PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPU	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CPU = PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPUG	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPUG	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPUG	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPUG	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_CPULP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CPULP,$/;"	e	enum:periph_id
PERIPH_ID_CPULP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CPULP,$/;"	e	enum:periph_id
PERIPH_ID_CPULP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CPULP,$/;"	e	enum:periph_id
PERIPH_ID_CPULP	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CPULP,$/;"	e	enum:periph_id
PERIPH_ID_CRAM2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CRAM2,$/;"	e	enum:periph_id
PERIPH_ID_CRAM2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_CRAM2,$/;"	e	enum:periph_id
PERIPH_ID_CRAM2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CRAM2,$/;"	e	enum:periph_id
PERIPH_ID_CSI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_CSI,$/;"	e	enum:periph_id
PERIPH_ID_CSI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_CSI,$/;"	e	enum:periph_id
PERIPH_ID_CSI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_CSI,$/;"	e	enum:periph_id
PERIPH_ID_CSI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_CSI,$/;"	e	enum:periph_id
PERIPH_ID_CSI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_CSI,$/;"	e	enum:periph_id
PERIPH_ID_DAM0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DAM0,$/;"	e	enum:periph_id
PERIPH_ID_DAM0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DAM0,$/;"	e	enum:periph_id
PERIPH_ID_DAM0	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DAM0,$/;"	e	enum:periph_id
PERIPH_ID_DAM0	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_DAM0,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_DAM1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DAM1,$/;"	e	enum:periph_id
PERIPH_ID_DAM1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DAM1,$/;"	e	enum:periph_id
PERIPH_ID_DAM1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DAM1,$/;"	e	enum:periph_id
PERIPH_ID_DAM1	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_DAM1,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_DAM2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DAM2,$/;"	e	enum:periph_id
PERIPH_ID_DAM2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DAM2,$/;"	e	enum:periph_id
PERIPH_ID_DAM2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DAM2,$/;"	e	enum:periph_id
PERIPH_ID_DAM2	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_DAM2,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_DDS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DDS,$/;"	e	enum:periph_id
PERIPH_ID_DDS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DDS,$/;"	e	enum:periph_id
PERIPH_ID_DEV1_OUT	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_DEV1_OUT,$/;"	e	enum:periph_id
PERIPH_ID_DEV2_OUT	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_DEV2_OUT,$/;"	e	enum:periph_id
PERIPH_ID_DISP1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DISP1,$/;"	e	enum:periph_id
PERIPH_ID_DISP1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DISP1,$/;"	e	enum:periph_id
PERIPH_ID_DISP1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_DISP1,$/;"	e	enum:periph_id
PERIPH_ID_DISP1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DISP1,$/;"	e	enum:periph_id
PERIPH_ID_DISP1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DISP1,$/;"	e	enum:periph_id
PERIPH_ID_DISP2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DISP2,$/;"	e	enum:periph_id
PERIPH_ID_DISP2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DISP2,$/;"	e	enum:periph_id
PERIPH_ID_DISP2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_DISP2,$/;"	e	enum:periph_id
PERIPH_ID_DISP2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DISP2,$/;"	e	enum:periph_id
PERIPH_ID_DISP2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DISP2,$/;"	e	enum:periph_id
PERIPH_ID_DP2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DP2,$/;"	e	enum:periph_id
PERIPH_ID_DPAUX	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DPAUX,$/;"	e	enum:periph_id
PERIPH_ID_DPAUX	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DPAUX,$/;"	e	enum:periph_id
PERIPH_ID_DPHPD	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_DPHPD,$/;"	e	enum:periph_id
PERIPH_ID_DSI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DSI,$/;"	e	enum:periph_id
PERIPH_ID_DSI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DSI,$/;"	e	enum:periph_id
PERIPH_ID_DSI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_DSI,$/;"	e	enum:periph_id
PERIPH_ID_DSI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DSI,$/;"	e	enum:periph_id
PERIPH_ID_DSI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DSI,$/;"	e	enum:periph_id
PERIPH_ID_DSIA_LP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DSIA_LP,$/;"	e	enum:periph_id
PERIPH_ID_DSIB	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DSIB,$/;"	e	enum:periph_id
PERIPH_ID_DSIB	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DSIB,$/;"	e	enum:periph_id
PERIPH_ID_DSIB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DSIB,$/;"	e	enum:periph_id
PERIPH_ID_DSIB	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DSIB,$/;"	e	enum:periph_id
PERIPH_ID_DSIB_LP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DSIB_LP,$/;"	e	enum:periph_id
PERIPH_ID_DTV	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DTV,$/;"	e	enum:periph_id
PERIPH_ID_DTV	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DTV,$/;"	e	enum:periph_id
PERIPH_ID_DTV	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DTV,$/;"	e	enum:periph_id
PERIPH_ID_DTV	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DTV,$/;"	e	enum:periph_id
PERIPH_ID_DVC_I2C	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_DVC_I2C,$/;"	e	enum:periph_id
PERIPH_ID_DVC_I2C	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_DVC_I2C,$/;"	e	enum:periph_id
PERIPH_ID_DVFS	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_DVFS,$/;"	e	enum:periph_id
PERIPH_ID_DVFS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_DVFS,$/;"	e	enum:periph_id
PERIPH_ID_DVFS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_DVFS,$/;"	e	enum:periph_id
PERIPH_ID_EMC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EMC,$/;"	e	enum:periph_id
PERIPH_ID_EMC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_EMC,$/;"	e	enum:periph_id
PERIPH_ID_EMC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_EMC,$/;"	e	enum:periph_id
PERIPH_ID_EMC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_EMC,$/;"	e	enum:periph_id
PERIPH_ID_EMC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EMC,$/;"	e	enum:periph_id
PERIPH_ID_EMC1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EMC1,$/;"	e	enum:periph_id
PERIPH_ID_EMC1_IOBIST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EMC1_IOBIST,$/;"	e	enum:periph_id
PERIPH_ID_EMC_DLL	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EMC_DLL,$/;"	e	enum:periph_id
PERIPH_ID_EMC_DLL	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_EMC_DLL,$/;"	e	enum:periph_id
PERIPH_ID_EMC_DLL	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_EMC_DLL,$/;"	e	enum:periph_id
PERIPH_ID_EMC_IOBIST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EMC_IOBIST,$/;"	e	enum:periph_id
PERIPH_ID_EMMC	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_EMMC = PERIPH_ID_SDMMC0,$/;"	e	enum:periph_id
PERIPH_ID_EMUCIF	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_EMUCIF,$/;"	e	enum:periph_id
PERIPH_ID_EMUCIF	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_EMUCIF,$/;"	e	enum:periph_id
PERIPH_ID_ENTROPY	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ENTROPY,$/;"	e	enum:periph_id
PERIPH_ID_ENTROPY	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_ENTROPY,$/;"	e	enum:periph_id
PERIPH_ID_EPP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EPP,$/;"	e	enum:periph_id
PERIPH_ID_EPP	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_EPP,$/;"	e	enum:periph_id
PERIPH_ID_EPP	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EPP,$/;"	e	enum:periph_id
PERIPH_ID_ETH	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_ETH,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_EXTPERIPH1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_EXTPERIPH1,$/;"	e	enum:periph_id
PERIPH_ID_EXTPERIPH1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_EXTPERIPH1,$/;"	e	enum:periph_id
PERIPH_ID_EXTPERIPH1	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_EXTPERIPH1$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_EXTPERIPH2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_EXTPERIPH2,$/;"	e	enum:periph_id
PERIPH_ID_EXTPERIPH2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_EXTPERIPH2,$/;"	e	enum:periph_id
PERIPH_ID_EXTPERIPH3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_EXTPERIPH3,$/;"	e	enum:periph_id
PERIPH_ID_EXTPERIPH3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_EXTPERIPH3,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED17	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED17	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED18	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED18	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED19	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED19	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED20	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED20	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED21	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED21	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED22	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED22,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED22	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED22,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED24	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED24	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED25	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED25	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED26	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED26,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED26	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED26,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED27	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED27,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED27	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED27,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED30	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED30	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED31	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_EX_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED31	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED46	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED46,$/;"	e	enum:periph_id
PERIPH_ID_EX_RESERVED47	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_EX_RESERVED47,$/;"	e	enum:periph_id
PERIPH_ID_FIRST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_FIRST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_FIRST	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_FIRST	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_FUSE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_FUSE,$/;"	e	enum:periph_id
PERIPH_ID_FUSE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_FUSE,$/;"	e	enum:periph_id
PERIPH_ID_FUSE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_FUSE,$/;"	e	enum:periph_id
PERIPH_ID_FUSE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_FUSE,$/;"	e	enum:periph_id
PERIPH_ID_FUSE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_FUSE,$/;"	e	enum:periph_id
PERIPH_ID_GPIO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_GPIO,$/;"	e	enum:periph_id
PERIPH_ID_GPIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_GPIO,$/;"	e	enum:periph_id
PERIPH_ID_GPIO	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_GPIO,$/;"	e	enum:periph_id
PERIPH_ID_GPIO	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_GPIO,$/;"	e	enum:periph_id
PERIPH_ID_GPIO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_GPIO,$/;"	e	enum:periph_id
PERIPH_ID_GPU	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_GPU,$/;"	e	enum:periph_id
PERIPH_ID_GPU	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_GPU,$/;"	e	enum:periph_id
PERIPH_ID_HDA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_HDA,$/;"	e	enum:periph_id
PERIPH_ID_HDA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HDA,$/;"	e	enum:periph_id
PERIPH_ID_HDA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HDA,$/;"	e	enum:periph_id
PERIPH_ID_HDA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_HDA,$/;"	e	enum:periph_id
PERIPH_ID_HDA2CODEC2X	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_HDA2CODEC2X,$/;"	e	enum:periph_id
PERIPH_ID_HDA2CODEC2X	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HDA2CODEC2X,$/;"	e	enum:periph_id
PERIPH_ID_HDA2CODEC2X	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HDA2CODEC2X,$/;"	e	enum:periph_id
PERIPH_ID_HDA2CODEC2X	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_HDA2CODEC2X,$/;"	e	enum:periph_id
PERIPH_ID_HDA2HDMICODEC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_HDA2HDMICODEC,$/;"	e	enum:periph_id
PERIPH_ID_HDA2HDMICODEC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HDA2HDMICODEC,$/;"	e	enum:periph_id
PERIPH_ID_HDA2HDMICODEC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HDA2HDMICODEC,$/;"	e	enum:periph_id
PERIPH_ID_HDA2HDMICODEC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_HDA2HDMICODEC,$/;"	e	enum:periph_id
PERIPH_ID_HDMI	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_HDMI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_HDMI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_HDMI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_HDMI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_HDMI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_HDMI_AUDIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HDMI_AUDIO,$/;"	e	enum:periph_id
PERIPH_ID_HDMI_AUDIO	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HDMI_AUDIO,$/;"	e	enum:periph_id
PERIPH_ID_HDMI_IOBIST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_HDMI_IOBIST,$/;"	e	enum:periph_id
PERIPH_ID_HOST1X	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_HOST1X,$/;"	e	enum:periph_id
PERIPH_ID_HOST1X	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HOST1X,$/;"	e	enum:periph_id
PERIPH_ID_HOST1X	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_HOST1X,$/;"	e	enum:periph_id
PERIPH_ID_HOST1X	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HOST1X,$/;"	e	enum:periph_id
PERIPH_ID_HOST1X	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_HOST1X,$/;"	e	enum:periph_id
PERIPH_ID_HSI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_HSI,$/;"	e	enum:periph_id
PERIPH_ID_HSI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_HSI,$/;"	e	enum:periph_id
PERIPH_ID_I2C0	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_I2C0,$/;"	e	enum:periph_id
PERIPH_ID_I2C0	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C0,$/;"	e	enum:periph_id
PERIPH_ID_I2C0	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C0 = 56,$/;"	e	enum:periph_id
PERIPH_ID_I2C0	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C0 = 56,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C1,$/;"	e	enum:periph_id
PERIPH_ID_I2C1	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_I2C1,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_I2C10	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C10 = 203,$/;"	e	enum:periph_id
PERIPH_ID_I2C10	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C10 = 203,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C2,$/;"	e	enum:periph_id
PERIPH_ID_I2C2	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_I2C2,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_I2C3	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C3	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C3,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C4	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C4,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C5	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C5,$/;"	e	enum:periph_id
PERIPH_ID_I2C6	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C6,$/;"	e	enum:periph_id
PERIPH_ID_I2C6	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2C6,$/;"	e	enum:periph_id
PERIPH_ID_I2C6	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2C6,$/;"	e	enum:periph_id
PERIPH_ID_I2C6	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C6,$/;"	e	enum:periph_id
PERIPH_ID_I2C6	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C6,$/;"	e	enum:periph_id
PERIPH_ID_I2C7	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2C7,$/;"	e	enum:periph_id
PERIPH_ID_I2C7	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C7,$/;"	e	enum:periph_id
PERIPH_ID_I2C7	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C7,$/;"	e	enum:periph_id
PERIPH_ID_I2C8	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C8 = 87,$/;"	e	enum:periph_id
PERIPH_ID_I2C8	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C8 = 87,$/;"	e	enum:periph_id
PERIPH_ID_I2C9	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2C9,$/;"	e	enum:periph_id
PERIPH_ID_I2C9	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2C9,$/;"	e	enum:periph_id
PERIPH_ID_I2CSLOW	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2CSLOW,$/;"	e	enum:periph_id
PERIPH_ID_I2CSLOW	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2CSLOW,$/;"	e	enum:periph_id
PERIPH_ID_I2CSLOW	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2CSLOW,$/;"	e	enum:periph_id
PERIPH_ID_I2CSLOW	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2CSLOW,$/;"	e	enum:periph_id
PERIPH_ID_I2S0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2S0,$/;"	e	enum:periph_id
PERIPH_ID_I2S0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2S0,$/;"	e	enum:periph_id
PERIPH_ID_I2S0	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2S0,$/;"	e	enum:periph_id
PERIPH_ID_I2S0	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2S0 = 98,$/;"	e	enum:periph_id
PERIPH_ID_I2S0	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2S0 = 98,$/;"	e	enum:periph_id
PERIPH_ID_I2S0	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_I2S0,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_I2S1	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_I2S1,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2S1,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2S1,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_I2S1,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2S1,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2S1,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_I2S1 = 99,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_I2S1 = 99,$/;"	e	enum:periph_id
PERIPH_ID_I2S1	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_I2S1,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_I2S2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2S2,$/;"	e	enum:periph_id
PERIPH_ID_I2S2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2S2,$/;"	e	enum:periph_id
PERIPH_ID_I2S2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_I2S2,$/;"	e	enum:periph_id
PERIPH_ID_I2S2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2S2,$/;"	e	enum:periph_id
PERIPH_ID_I2S2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2S2,$/;"	e	enum:periph_id
PERIPH_ID_I2S2	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_I2S2,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_I2S3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2S3,$/;"	e	enum:periph_id
PERIPH_ID_I2S3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2S3,$/;"	e	enum:periph_id
PERIPH_ID_I2S3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2S3,$/;"	e	enum:periph_id
PERIPH_ID_I2S3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2S3,$/;"	e	enum:periph_id
PERIPH_ID_I2S3	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_I2S3,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_I2S4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_I2S4,$/;"	e	enum:periph_id
PERIPH_ID_I2S4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_I2S4,$/;"	e	enum:periph_id
PERIPH_ID_I2S4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2S4,$/;"	e	enum:periph_id
PERIPH_ID_I2S4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_I2S4,$/;"	e	enum:periph_id
PERIPH_ID_I2S4	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_I2S4,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_I2S5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_I2S5,$/;"	e	enum:periph_id
PERIPH_ID_IDE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_IDE,$/;"	e	enum:periph_id
PERIPH_ID_IRAMA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_IRAMA,$/;"	e	enum:periph_id
PERIPH_ID_IRAMA	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_IRAMA,$/;"	e	enum:periph_id
PERIPH_ID_IRAMA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_IRAMA,$/;"	e	enum:periph_id
PERIPH_ID_IRAMB	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_IRAMB,$/;"	e	enum:periph_id
PERIPH_ID_IRAMB	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_IRAMB,$/;"	e	enum:periph_id
PERIPH_ID_IRAMB	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_IRAMB,$/;"	e	enum:periph_id
PERIPH_ID_IRAMC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_IRAMC,$/;"	e	enum:periph_id
PERIPH_ID_IRAMC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_IRAMC,$/;"	e	enum:periph_id
PERIPH_ID_IRAMC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_IRAMC,$/;"	e	enum:periph_id
PERIPH_ID_IRAMD	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_IRAMD,$/;"	e	enum:periph_id
PERIPH_ID_IRAMD	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_IRAMD,$/;"	e	enum:periph_id
PERIPH_ID_IRAMD	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_IRAMD,$/;"	e	enum:periph_id
PERIPH_ID_ISP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_ISP,$/;"	e	enum:periph_id
PERIPH_ID_ISP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ISP,$/;"	e	enum:periph_id
PERIPH_ID_ISP	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_ISP,$/;"	e	enum:periph_id
PERIPH_ID_ISP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_ISP,$/;"	e	enum:periph_id
PERIPH_ID_ISP	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_ISP,$/;"	e	enum:periph_id
PERIPH_ID_ISPB	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_ISPB,$/;"	e	enum:periph_id
PERIPH_ID_ISPB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_ISPB,$/;"	e	enum:periph_id
PERIPH_ID_KBC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_KBC,$/;"	e	enum:periph_id
PERIPH_ID_KBC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_KBC,$/;"	e	enum:periph_id
PERIPH_ID_KBC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_KBC,$/;"	e	enum:periph_id
PERIPH_ID_KFUSE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_KFUSE,$/;"	e	enum:periph_id
PERIPH_ID_KFUSE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_KFUSE,$/;"	e	enum:periph_id
PERIPH_ID_KFUSE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_KFUSE,$/;"	e	enum:periph_id
PERIPH_ID_KFUSE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_KFUSE,$/;"	e	enum:periph_id
PERIPH_ID_KFUSE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_KFUSE,$/;"	e	enum:periph_id
PERIPH_ID_LA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_LA,$/;"	e	enum:periph_id
PERIPH_ID_LA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_LA,$/;"	e	enum:periph_id
PERIPH_ID_LCDC0	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_LCDC0,$/;"	e	enum:periph_id
PERIPH_ID_LCDC1	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_LCDC1,$/;"	e	enum:periph_id
PERIPH_ID_MC1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MC1,$/;"	e	enum:periph_id
PERIPH_ID_MC_CDPA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_MC_CDPA,$/;"	e	enum:periph_id
PERIPH_ID_MDOUBLER	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MDOUBLER,$/;"	e	enum:periph_id
PERIPH_ID_MDOUBLER	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_MDOUBLER,$/;"	e	enum:periph_id
PERIPH_ID_MEM	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MEM,$/;"	e	enum:periph_id
PERIPH_ID_MEM	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_MEM,$/;"	e	enum:periph_id
PERIPH_ID_MEM	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_MEM,$/;"	e	enum:periph_id
PERIPH_ID_MEM	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_MEM,$/;"	e	enum:periph_id
PERIPH_ID_MEM	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_MEM,$/;"	e	enum:periph_id
PERIPH_ID_MIPI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MIPI,$/;"	e	enum:periph_id
PERIPH_ID_MIPI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_MIPI,$/;"	e	enum:periph_id
PERIPH_ID_MIPI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_MIPI,$/;"	e	enum:periph_id
PERIPH_ID_MIPI_CAL	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_MIPI_CAL,$/;"	e	enum:periph_id
PERIPH_ID_MIPI_CAL	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_MIPI_CAL,$/;"	e	enum:periph_id
PERIPH_ID_MIPI_IOBIST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MIPI_IOBIST,$/;"	e	enum:periph_id
PERIPH_ID_MPE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MPE,$/;"	e	enum:periph_id
PERIPH_ID_MPE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_MPE,$/;"	e	enum:periph_id
PERIPH_ID_MPE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_MPE,$/;"	e	enum:periph_id
PERIPH_ID_MSELECT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_MSELECT,$/;"	e	enum:periph_id
PERIPH_ID_MSELECT	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_MSELECT,$/;"	e	enum:periph_id
PERIPH_ID_MSELECT	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_MSELECT,$/;"	e	enum:periph_id
PERIPH_ID_MSELECT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_MSELECT,$/;"	e	enum:periph_id
PERIPH_ID_MSENC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_MSENC,$/;"	e	enum:periph_id
PERIPH_ID_MSENC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_MSENC,$/;"	e	enum:periph_id
PERIPH_ID_NANDSPEED	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_NANDSPEED,$/;"	e	enum:periph_id
PERIPH_ID_NANDSPEED	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_NANDSPEED,$/;"	e	enum:periph_id
PERIPH_ID_NDFLASH	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_NDFLASH,$/;"	e	enum:periph_id
PERIPH_ID_NDFLASH	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_NDFLASH,$/;"	e	enum:periph_id
PERIPH_ID_NDFLASH	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_NDFLASH,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id
PERIPH_ID_NONE	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id	file:
PERIPH_ID_NONE	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^	PERIPH_ID_NONE = -1,$/;"	e	enum:periph_id	file:
PERIPH_ID_OOB	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_OOB,$/;"	e	enum:periph_id
PERIPH_ID_OOB	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_OOB,$/;"	e	enum:periph_id
PERIPH_ID_OWR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_OWR,$/;"	e	enum:periph_id
PERIPH_ID_OWR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_OWR,$/;"	e	enum:periph_id
PERIPH_ID_OWR	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_OWR,$/;"	e	enum:periph_id
PERIPH_ID_OWR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_OWR,$/;"	e	enum:periph_id
PERIPH_ID_OWR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_OWR,$/;"	e	enum:periph_id
PERIPH_ID_PCIE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_PCIE,$/;"	e	enum:periph_id
PERIPH_ID_PCIE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_PCIE,$/;"	e	enum:periph_id
PERIPH_ID_PCIE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_PCIE,$/;"	e	enum:periph_id
PERIPH_ID_PCIE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_PCIE,$/;"	e	enum:periph_id
PERIPH_ID_PCIE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_PCIE,$/;"	e	enum:periph_id
PERIPH_ID_PCIE2_IOBIST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_PCIE2_IOBIST,$/;"	e	enum:periph_id
PERIPH_ID_PCIEXCLK	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_PCIEXCLK,$/;"	e	enum:periph_id
PERIPH_ID_PCIEXCLK	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_PCIEXCLK,$/;"	e	enum:periph_id
PERIPH_ID_PCIEXCLK	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_PCIEXCLK,$/;"	e	enum:periph_id
PERIPH_ID_PCIEXCLK	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_PCIEXCLK,$/;"	e	enum:periph_id
PERIPH_ID_PCIEXCLK	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_PCIEXCLK,$/;"	e	enum:periph_id
PERIPH_ID_PEX_USB_UPHY	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_PEX_USB_UPHY,$/;"	e	enum:periph_id
PERIPH_ID_PMC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_PMC,$/;"	e	enum:periph_id
PERIPH_ID_PMC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_PMC,$/;"	e	enum:periph_id
PERIPH_ID_PMC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_PMC,$/;"	e	enum:periph_id
PERIPH_ID_PWM	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_PWM,$/;"	e	enum:periph_id
PERIPH_ID_PWM	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_PWM,$/;"	e	enum:periph_id
PERIPH_ID_PWM	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_PWM,$/;"	e	enum:periph_id
PERIPH_ID_PWM	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_PWM,$/;"	e	enum:periph_id
PERIPH_ID_PWM	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_PWM,$/;"	e	enum:periph_id
PERIPH_ID_PWM0	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_PWM0,$/;"	e	enum:periph_id
PERIPH_ID_PWM0	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_PWM0,$/;"	e	enum:periph_id
PERIPH_ID_PWM0	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_PWM0,$/;"	e	enum:periph_id
PERIPH_ID_PWM1	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_PWM1,$/;"	e	enum:periph_id
PERIPH_ID_PWM1	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_PWM1,$/;"	e	enum:periph_id
PERIPH_ID_PWM1	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_PWM1,$/;"	e	enum:periph_id
PERIPH_ID_PWM2	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_PWM2,$/;"	e	enum:periph_id
PERIPH_ID_PWM2	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_PWM2,$/;"	e	enum:periph_id
PERIPH_ID_PWM2	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_PWM2,$/;"	e	enum:periph_id
PERIPH_ID_PWM3	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_PWM3,$/;"	e	enum:periph_id
PERIPH_ID_PWM3	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_PWM3,$/;"	e	enum:periph_id
PERIPH_ID_PWM3	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_PWM3,$/;"	e	enum:periph_id
PERIPH_ID_PWM4	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_PWM4,$/;"	e	enum:periph_id
PERIPH_ID_PWM4	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_PWM4,$/;"	e	enum:periph_id
PERIPH_ID_PWM4	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_PWM4,$/;"	e	enum:periph_id
PERIPH_ID_QSPI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_QSPI,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED0_PCIERX0	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED0_PCIERX0,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED1,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED10_MIPI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED10_MIPI,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED13	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED13	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED16	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED16,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED16	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED16,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED19	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED19	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED1_PCIERX1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED1_PCIERX1,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED1_SATACOLD	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED1_SATACOLD,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED21	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED21	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED21_ENTROPY	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED21_ENTROPY,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED22_W	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED22_W,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED23_W	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED23_W,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED24	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED24	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED24	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED24	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED24_W	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED24_W,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED25	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED25	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED2_PCIERX0	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED2_PCIERX0,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED2_PCIERX2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED2_PCIERX2,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED30	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED35	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED35,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED35	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED35,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED35	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED35,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED35	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED35,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED35	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED35,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED36	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED36,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED36	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED36,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED38	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED38,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED38	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED38,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED3_PCIERX1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED3_PCIERX1,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED3_PCIERX3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED3_PCIERX3,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED43	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED43,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED43	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED43,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED43	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED43,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED43	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED43,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED45	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED45,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED45	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED45,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED49	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED49,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED49	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED49,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED4_PCIERX2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED4_PCIERX2,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED4_PCIERX4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED4_PCIERX4,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED53	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED53,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED53	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED53,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED56	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED56,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED56	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED56,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED56	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED56,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED5_PCIERX3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED5_PCIERX3,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED5_PCIERX5	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED5_PCIERX5,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED60	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED60,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED60	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED60,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED64	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED64,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED64	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED64,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED6_PCIE2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED6_PCIE2,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED6_PCIERX4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED6_PCIERX4,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED76	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED76,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED76	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED76,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED76	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED76,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED77	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED77,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED77	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED77,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED77	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED77,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED78	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED78,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED78	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED78,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED78	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED78,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED79	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED79,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED7_EMC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED7_EMC,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED7_PCIERX5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED7_PCIERX5,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED80	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED80,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED80	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED80,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED80	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED80,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED81	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED81,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED82	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED82,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED83	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED83,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED83	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED83,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED83	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED83,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED84	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED84,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED84	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED84,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED85	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED85,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED85	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED85,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED86	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED86,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED86	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED86,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED88	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED88,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED88	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED88,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED89	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED89,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED89	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED89,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED8_HDMI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED8_HDMI,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED90	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED90,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED90	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED90,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED91	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED91,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED91	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RESERVED91,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED91	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED91,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED92	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED92,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED92	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED92,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED93	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED93,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED93	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED93,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED93	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED93,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED93	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED93,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED94	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED94,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED94	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_RESERVED94,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED94	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_RESERVED94,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED94	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED94,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED95	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RESERVED95,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED95	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED95,$/;"	e	enum:periph_id
PERIPH_ID_RESERVED9_SATA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_RESERVED9_SATA,$/;"	e	enum:periph_id
PERIPH_ID_RTC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_RTC,$/;"	e	enum:periph_id
PERIPH_ID_RTC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_RTC,$/;"	e	enum:periph_id
PERIPH_ID_SATA	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SATA,$/;"	e	enum:periph_id
PERIPH_ID_SATA	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SATA,$/;"	e	enum:periph_id
PERIPH_ID_SATA	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SATA,$/;"	e	enum:periph_id
PERIPH_ID_SATA	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SATA,$/;"	e	enum:periph_id
PERIPH_ID_SATACOLD	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SATACOLD,$/;"	e	enum:periph_id
PERIPH_ID_SATACOLD	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SATACOLD,$/;"	e	enum:periph_id
PERIPH_ID_SATACOLD	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SATACOLD,$/;"	e	enum:periph_id
PERIPH_ID_SATA_IOBIST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SATA_IOBIST,$/;"	e	enum:periph_id
PERIPH_ID_SBC1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SBC1,$/;"	e	enum:periph_id
PERIPH_ID_SBC1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SBC1,$/;"	e	enum:periph_id
PERIPH_ID_SBC1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SBC1,$/;"	e	enum:periph_id
PERIPH_ID_SBC1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SBC1,$/;"	e	enum:periph_id
PERIPH_ID_SBC1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SBC1,$/;"	e	enum:periph_id
PERIPH_ID_SBC2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SBC2,$/;"	e	enum:periph_id
PERIPH_ID_SBC2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SBC2,$/;"	e	enum:periph_id
PERIPH_ID_SBC2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SBC2,$/;"	e	enum:periph_id
PERIPH_ID_SBC2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SBC2,$/;"	e	enum:periph_id
PERIPH_ID_SBC2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SBC2,$/;"	e	enum:periph_id
PERIPH_ID_SBC3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SBC3,$/;"	e	enum:periph_id
PERIPH_ID_SBC3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SBC3,$/;"	e	enum:periph_id
PERIPH_ID_SBC3	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SBC3,$/;"	e	enum:periph_id
PERIPH_ID_SBC3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SBC3,$/;"	e	enum:periph_id
PERIPH_ID_SBC3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SBC3,$/;"	e	enum:periph_id
PERIPH_ID_SBC4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SBC4,$/;"	e	enum:periph_id
PERIPH_ID_SBC4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SBC4,$/;"	e	enum:periph_id
PERIPH_ID_SBC4	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SBC4,$/;"	e	enum:periph_id
PERIPH_ID_SBC4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SBC4,$/;"	e	enum:periph_id
PERIPH_ID_SBC4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SBC4,$/;"	e	enum:periph_id
PERIPH_ID_SBC5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SBC5,$/;"	e	enum:periph_id
PERIPH_ID_SBC5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SBC5,$/;"	e	enum:periph_id
PERIPH_ID_SBC5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SBC5,$/;"	e	enum:periph_id
PERIPH_ID_SBC5	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SBC5,$/;"	e	enum:periph_id
PERIPH_ID_SBC6	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SBC6,$/;"	e	enum:periph_id
PERIPH_ID_SBC6	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SBC6,$/;"	e	enum:periph_id
PERIPH_ID_SBC6	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SBC6,$/;"	e	enum:periph_id
PERIPH_ID_SBC6	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SBC6,$/;"	e	enum:periph_id
PERIPH_ID_SDCARD	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SDCARD = PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDHCI	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_SDHCI,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_SDMMC0	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_SDMMC0 = 72,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC0	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SDMMC0,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC0	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SDMMC0,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC0	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SDMMC0 = 75,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC0	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SDMMC0 = 75,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC1	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SDMMC1,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC2	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SDMMC2,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC3	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SDMMC3,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SDMMC4	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SDMMC4,$/;"	e	enum:periph_id
PERIPH_ID_SNOR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SNOR,$/;"	e	enum:periph_id
PERIPH_ID_SNOR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SNOR,$/;"	e	enum:periph_id
PERIPH_ID_SNOR	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SNOR,$/;"	e	enum:periph_id
PERIPH_ID_SNOR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SNOR,$/;"	e	enum:periph_id
PERIPH_ID_SNOR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SNOR,$/;"	e	enum:periph_id
PERIPH_ID_SOC_THERM	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SOC_THERM,$/;"	e	enum:periph_id
PERIPH_ID_SOC_THERM	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SOC_THERM,$/;"	e	enum:periph_id
PERIPH_ID_SOR0	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SOR0,$/;"	e	enum:periph_id
PERIPH_ID_SOR0	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SOR0,$/;"	e	enum:periph_id
PERIPH_ID_SPARE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SPARE = PERIPH_ID_X_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_SPARE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SPARE = PERIPH_ID_X_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_SPARE1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SPARE1 = PERIPH_ID_Y_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_SPDIF	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SPDIF,$/;"	e	enum:periph_id
PERIPH_ID_SPDIF	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_SPDIF,$/;"	e	enum:periph_id
PERIPH_ID_SPDIF	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SPDIF,$/;"	e	enum:periph_id
PERIPH_ID_SPDIF	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_SPDIF,$/;"	e	enum:periph_id
PERIPH_ID_SPDIF	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SPDIF,$/;"	e	enum:periph_id
PERIPH_ID_SPDIF	board/nvidia/nyan-big/nyan-big.c	/^		PERIPH_ID_SPDIF,$/;"	e	enum:enable_required_clocks::ids	file:
PERIPH_ID_SPEEDO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SPEEDO,$/;"	e	enum:periph_id
PERIPH_ID_SPEEDO	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SPEEDO,$/;"	e	enum:periph_id
PERIPH_ID_SPEEDO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SPEEDO,$/;"	e	enum:periph_id
PERIPH_ID_SPI0	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SPI0,$/;"	e	enum:periph_id
PERIPH_ID_SPI0	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SPI0,$/;"	e	enum:periph_id
PERIPH_ID_SPI0	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SPI0 = 68,$/;"	e	enum:periph_id
PERIPH_ID_SPI0	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SPI0 = 68,$/;"	e	enum:periph_id
PERIPH_ID_SPI0	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^	PERIPH_ID_SPI0,$/;"	e	enum:periph_id	file:
PERIPH_ID_SPI0	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^	PERIPH_ID_SPI0,$/;"	e	enum:periph_id	file:
PERIPH_ID_SPI1	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SPI1,$/;"	e	enum:periph_id
PERIPH_ID_SPI1	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SPI1,$/;"	e	enum:periph_id
PERIPH_ID_SPI1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SPI1,$/;"	e	enum:periph_id
PERIPH_ID_SPI1	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SPI1,$/;"	e	enum:periph_id
PERIPH_ID_SPI1	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SPI1,$/;"	e	enum:periph_id
PERIPH_ID_SPI1	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_SPI1,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_SPI2	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_SPI2,$/;"	e	enum:periph_id
PERIPH_ID_SPI2	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	PERIPH_ID_SPI2,$/;"	e	enum:periph_id
PERIPH_ID_SPI2	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SPI2,$/;"	e	enum:periph_id
PERIPH_ID_SPI2	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SPI2,$/;"	e	enum:periph_id
PERIPH_ID_SPI2	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_SPI2,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_SPI3	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SPI3,$/;"	e	enum:periph_id
PERIPH_ID_SPI3	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SPI3,$/;"	e	enum:periph_id
PERIPH_ID_SPI4	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SPI4,$/;"	e	enum:periph_id
PERIPH_ID_SPI4	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SPI4,$/;"	e	enum:periph_id
PERIPH_ID_SQI	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_SQI,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_SROMC	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_SROMC = 128,$/;"	e	enum:periph_id
PERIPH_ID_SROMC	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_SROMC = 128,$/;"	e	enum:periph_id
PERIPH_ID_STAT_MON	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_STAT_MON,$/;"	e	enum:periph_id
PERIPH_ID_STAT_MON	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_STAT_MON,$/;"	e	enum:periph_id
PERIPH_ID_STAT_MON	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_STAT_MON,$/;"	e	enum:periph_id
PERIPH_ID_STAT_MON	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_STAT_MON,$/;"	e	enum:periph_id
PERIPH_ID_STAT_MON	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_STAT_MON,$/;"	e	enum:periph_id
PERIPH_ID_SUSOUT	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_SUSOUT,$/;"	e	enum:periph_id
PERIPH_ID_SUSOUT	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_SUSOUT,$/;"	e	enum:periph_id
PERIPH_ID_SUS_OUT	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SUS_OUT,$/;"	e	enum:periph_id
PERIPH_ID_SYNC_CLK_DOUBLER	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_SYNC_CLK_DOUBLER,$/;"	e	enum:periph_id
PERIPH_ID_TCW	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_TCW,$/;"	e	enum:periph_id
PERIPH_ID_TCW	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_TCW,$/;"	e	enum:periph_id
PERIPH_ID_TMR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_TMR,$/;"	e	enum:periph_id
PERIPH_ID_TMR	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_TMR,$/;"	e	enum:periph_id
PERIPH_ID_TMR	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_TMR,$/;"	e	enum:periph_id
PERIPH_ID_TMR	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_TMR,$/;"	e	enum:periph_id
PERIPH_ID_TMR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_TMR,$/;"	e	enum:periph_id
PERIPH_ID_TRACECLKIN	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_TRACECLKIN,$/;"	e	enum:periph_id
PERIPH_ID_TRACECLKIN	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_TRACECLKIN,$/;"	e	enum:periph_id
PERIPH_ID_TRIGSYS	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_TRIGSYS,$/;"	e	enum:periph_id
PERIPH_ID_TRIGSYS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_TRIGSYS,$/;"	e	enum:periph_id
PERIPH_ID_TRIGSYS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_TRIGSYS,$/;"	e	enum:periph_id
PERIPH_ID_TRIGSYS	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_TRIGSYS,$/;"	e	enum:periph_id
PERIPH_ID_TSEC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_TSEC,$/;"	e	enum:periph_id
PERIPH_ID_TSEC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_TSEC,$/;"	e	enum:periph_id
PERIPH_ID_TSENSOR	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_TSENSOR,$/;"	e	enum:periph_id
PERIPH_ID_TSENSOR	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_TSENSOR,$/;"	e	enum:periph_id
PERIPH_ID_TVDAC	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_TVDAC,$/;"	e	enum:periph_id
PERIPH_ID_TVDAC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_TVDAC,$/;"	e	enum:periph_id
PERIPH_ID_TVDAC	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_TVDAC,$/;"	e	enum:periph_id
PERIPH_ID_TVO	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_TVO,$/;"	e	enum:periph_id
PERIPH_ID_TVO	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_TVO,$/;"	e	enum:periph_id
PERIPH_ID_TVO	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_TVO,$/;"	e	enum:periph_id
PERIPH_ID_TWC	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_TWC,$/;"	e	enum:periph_id
PERIPH_ID_UART0	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_UART0 = 36,$/;"	e	enum:periph_id
PERIPH_ID_UART0	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART0,$/;"	e	enum:periph_id
PERIPH_ID_UART0	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_UART0 = 51,$/;"	e	enum:periph_id
PERIPH_ID_UART0	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_UART0 = 51,$/;"	e	enum:periph_id
PERIPH_ID_UART0	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^	PERIPH_ID_UART0,$/;"	e	enum:periph_id	file:
PERIPH_ID_UART0	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^	PERIPH_ID_UART0,$/;"	e	enum:periph_id	file:
PERIPH_ID_UART1	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART1	arch/arm/mach-tegra/board.c	/^		PERIPH_ID_UART1,$/;"	e	enum:setup_uarts::id_for_uart	file:
PERIPH_ID_UART1	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_UART1,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_UART2	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART2	arch/arm/mach-tegra/board.c	/^		PERIPH_ID_UART2,$/;"	e	enum:setup_uarts::id_for_uart	file:
PERIPH_ID_UART2	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_UART2,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_UART3	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/mach-exynos/include/mach/periph.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^	PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_UART3	arch/arm/mach-tegra/board.c	/^		PERIPH_ID_UART3,$/;"	e	enum:setup_uarts::id_for_uart	file:
PERIPH_ID_UART4	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART4	arch/arm/mach-tegra/board.c	/^		PERIPH_ID_UART4,$/;"	e	enum:setup_uarts::id_for_uart	file:
PERIPH_ID_UART5	arch/arm/include/asm/arch-hi6220/periph.h	/^	PERIPH_ID_UART5,$/;"	e	enum:periph_id
PERIPH_ID_UART5	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_UART5,$/;"	e	enum:periph_id
PERIPH_ID_UART5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_UART5,$/;"	e	enum:periph_id
PERIPH_ID_UART5	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_UART5,$/;"	e	enum:periph_id
PERIPH_ID_UART5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_UART5,$/;"	e	enum:periph_id
PERIPH_ID_UART5	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_UART5,$/;"	e	enum:periph_id
PERIPH_ID_UART5	arch/arm/mach-tegra/board.c	/^		PERIPH_ID_UART5,$/;"	e	enum:setup_uarts::id_for_uart	file:
PERIPH_ID_UART_BB	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART_BB = PERIPH_ID_UART1,$/;"	e	enum:periph_id
PERIPH_ID_UART_BT	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART_BT = PERIPH_ID_UART0,$/;"	e	enum:periph_id
PERIPH_ID_UART_DBG	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART_DBG = PERIPH_ID_UART2,$/;"	e	enum:periph_id
PERIPH_ID_UART_EXP	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART_EXP = PERIPH_ID_UART4,$/;"	e	enum:periph_id
PERIPH_ID_UART_GPS	arch/arm/include/asm/arch-rockchip/periph.h	/^	PERIPH_ID_UART_GPS = PERIPH_ID_UART3,$/;"	e	enum:periph_id
PERIPH_ID_USB	drivers/pinctrl/pinctrl_pic32.c	/^	PERIPH_ID_USB,$/;"	e	enum:__anon5dd7f8ab0203	file:
PERIPH_ID_USB2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_USB2,$/;"	e	enum:periph_id
PERIPH_ID_USB2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_USB2,$/;"	e	enum:periph_id
PERIPH_ID_USB2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_USB2,$/;"	e	enum:periph_id
PERIPH_ID_USB2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_USB2,$/;"	e	enum:periph_id
PERIPH_ID_USB2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_USB2,$/;"	e	enum:periph_id
PERIPH_ID_USB3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_USB3,$/;"	e	enum:periph_id
PERIPH_ID_USB3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_USB3,$/;"	e	enum:periph_id
PERIPH_ID_USB3	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_USB3,$/;"	e	enum:periph_id
PERIPH_ID_USB3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_USB3,$/;"	e	enum:periph_id
PERIPH_ID_USB3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_USB3,$/;"	e	enum:periph_id
PERIPH_ID_USBD	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_USBD,$/;"	e	enum:periph_id
PERIPH_ID_USBD	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_USBD,$/;"	e	enum:periph_id
PERIPH_ID_USBD	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_USBD,$/;"	e	enum:periph_id
PERIPH_ID_USBD	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_USBD,$/;"	e	enum:periph_id
PERIPH_ID_USBD	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_USBD,$/;"	e	enum:periph_id
PERIPH_ID_VCP	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_VCP,$/;"	e	enum:periph_id
PERIPH_ID_VCP	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_VCP,$/;"	e	enum:periph_id
PERIPH_ID_VCP	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_VCP,$/;"	e	enum:periph_id
PERIPH_ID_VCP	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VCP,$/;"	e	enum:periph_id
PERIPH_ID_VCP	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_VCP,$/;"	e	enum:periph_id
PERIPH_ID_VDE	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_VDE,$/;"	e	enum:periph_id
PERIPH_ID_VDE	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_VDE,$/;"	e	enum:periph_id
PERIPH_ID_VDE	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_VDE,$/;"	e	enum:periph_id
PERIPH_ID_VDE	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VDE,$/;"	e	enum:periph_id
PERIPH_ID_VDE	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_VDE,$/;"	e	enum:periph_id
PERIPH_ID_VI	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_VI,$/;"	e	enum:periph_id
PERIPH_ID_VI	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_VI,$/;"	e	enum:periph_id
PERIPH_ID_VI	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_VI,$/;"	e	enum:periph_id
PERIPH_ID_VI	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VI,$/;"	e	enum:periph_id
PERIPH_ID_VI	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_VI,$/;"	e	enum:periph_id
PERIPH_ID_VIC	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_VIC,$/;"	e	enum:periph_id
PERIPH_ID_VIC	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VIC,$/;"	e	enum:periph_id
PERIPH_ID_VIM2_CLK	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_VIM2_CLK,$/;"	e	enum:periph_id
PERIPH_ID_VIM2_CLK	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VIM2_CLK,$/;"	e	enum:periph_id
PERIPH_ID_VI_I2C	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VI_I2C,$/;"	e	enum:periph_id
PERIPH_ID_VW_FIRST	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_VW_FIRST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_VW_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_VW_FIRST	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PERIPH_ID_VW_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED12	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED12,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED13	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED14	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED14,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED17	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED17	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED18	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED18	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED19	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED19	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED20	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED20	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED21	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED21	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED22	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED22,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED22	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED22,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED30	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED30	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED31	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED31	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_V_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_V_RESERVED4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_V_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED10	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED10,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED10	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED10,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED11	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED11,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED11	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED11,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED12	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED12,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED12	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED12,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED13	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED13	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED15	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED15,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED15	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED15,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED16	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED16,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED16	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED16,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED17	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED17	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED18	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED18	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED19	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED19	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED20	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED20	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED23	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED23,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED23	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED23,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED24	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED25	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED26	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED26,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED29	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED29,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED29	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED29,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED30	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED30	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED31	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED31	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED5	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED5,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED5,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED6	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED6,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED6	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED6,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED7	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED7,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED7	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED7,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED9	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_W_RESERVED9,$/;"	e	enum:periph_id
PERIPH_ID_W_RESERVED9	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_W_RESERVED9,$/;"	e	enum:periph_id
PERIPH_ID_XIO	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_XIO,$/;"	e	enum:periph_id
PERIPH_ID_XIO	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PERIPH_ID_XIO,$/;"	e	enum:periph_id
PERIPH_ID_XIO	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_XIO,$/;"	e	enum:periph_id
PERIPH_ID_XUSB	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_XUSB,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_DEV	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_XUSB_DEV,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_DEV	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_XUSB_DEV,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_HOST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_XUSB_HOST,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_HOST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_XUSB_HOST,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_PADCTL	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_XUSB_PADCTL,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_PADCTL	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_XUSB_PADCTL,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_SS	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PERIPH_ID_XUSB_SS,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_SS	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_XUSB_SS,$/;"	e	enum:periph_id
PERIPH_ID_XUSB_SS	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_XUSB_SS,$/;"	e	enum:periph_id
PERIPH_ID_X_FIRST	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_X_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED1,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED1,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED10	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED10,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED10	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED10,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED12	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED12,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED12	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED12,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED13	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED13	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED13,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED15	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED15,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED15	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED15,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED19	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED19	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED19,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED20	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED23	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED23,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED23	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED23,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED25	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED26	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED26,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED27	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED27,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED28	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED28,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED29	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED29,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED30	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED31	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED7	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED7,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED7	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED7,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED8	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED8,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED8	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED8,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED9	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PERIPH_ID_X_RESERVED9,$/;"	e	enum:periph_id
PERIPH_ID_X_RESERVED9	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_X_RESERVED9,$/;"	e	enum:periph_id
PERIPH_ID_Y_FIRST	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_FIRST,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED1,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED10	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED10,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED11	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED11,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED12	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED12,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED14	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED14,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED15	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED15,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED17	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED17,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED18	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED18,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED2,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED20	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED20,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED21	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED21,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED22	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED22,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED23	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED23,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED24	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED24,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED25	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED25,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED26	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED26,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED27	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED27,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED28	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED28,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED29	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED29,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED3,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED30	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED30,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED31	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED31,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED4,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED5	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED5,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED7	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED7,$/;"	e	enum:periph_id
PERIPH_ID_Y_RESERVED9	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PERIPH_ID_Y_RESERVED9,$/;"	e	enum:periph_id
PERIPH_JPEG	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_JPEG	/;"	d
PERIPH_MASK	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^#define PERIPH_MASK(/;"	d
PERIPH_MASK	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^#define PERIPH_MASK(/;"	d
PERIPH_MASK	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^#define PERIPH_MASK(/;"	d
PERIPH_MASK	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^#define PERIPH_MASK(/;"	d
PERIPH_MASK	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^#define PERIPH_MASK(/;"	d
PERIPH_MPMC	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_MPMC	/;"	d
PERIPH_MPMCMSK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_MPMCMSK	/;"	d
PERIPH_MPMC_EN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_MPMC_EN	/;"	d
PERIPH_MPMC_WE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_MPMC_WE	/;"	d
PERIPH_PLL	arch/arm/include/asm/arch-s32v234/clock.h	/^	PERIPH_PLL,$/;"	e	enum:pll_type
PERIPH_PLL_PHI0_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PERIPH_PLL_PHI0_FREQ	/;"	d
PERIPH_PLL_PHI1_DFS_Nr	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PERIPH_PLL_PHI1_DFS_Nr	/;"	d
PERIPH_PLL_PHI1_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PERIPH_PLL_PHI1_FREQ	/;"	d
PERIPH_PLL_PLLDV_MFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PERIPH_PLL_PLLDV_MFD	/;"	d
PERIPH_PLL_PLLDV_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PERIPH_PLL_PLLDV_MFN	/;"	d
PERIPH_PLL_PLLDV_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PERIPH_PLL_PLLDV_PREDIV	/;"	d
PERIPH_RAMW	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_RAMW	/;"	d
PERIPH_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define PERIPH_RATIO	/;"	d
PERIPH_RATIO	board/samsung/odroid/setup.h	/^#define PERIPH_RATIO(/;"	d
PERIPH_RATIO	board/samsung/trats/setup.h	/^#define PERIPH_RATIO	/;"	d
PERIPH_REG	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^#define PERIPH_REG(/;"	d
PERIPH_REG	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^#define PERIPH_REG(/;"	d
PERIPH_REG	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^#define PERIPH_REG(/;"	d
PERIPH_REG	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^#define PERIPH_REG(/;"	d
PERIPH_REG	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^#define PERIPH_REG(/;"	d
PERIPH_ROM	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_ROM	/;"	d
PERIPH_RST_ALL	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_RST_ALL	/;"	d
PERIPH_RTC	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_RTC	/;"	d
PERIPH_SMI	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_SMI	/;"	d
PERIPH_SSP1	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_SSP1	/;"	d
PERIPH_SSP2	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_SSP2	/;"	d
PERIPH_SSP3	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_SSP3	/;"	d
PERIPH_UART1	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_UART1	/;"	d
PERIPH_UART2	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_UART2	/;"	d
PERIPH_USBD	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_USBD	/;"	d
PERIPH_USBH1	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_USBH1	/;"	d
PERIPH_USBH2	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PERIPH_USBH2	/;"	d
PERIS_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERIS_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define PERIS_NR_CLK	/;"	d
PERI_3V3_EN	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	PERI_3V3_EN,$/;"	e	enum:qn	file:
PERI_ACLK_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_ACLK_DIV_MASK	= 0x1f,$/;"	e	enum:__anon375ccd790103
PERI_ACLK_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_ACLK_DIV_MASK	= 0x1f,$/;"	e	enum:__anon06a678fa0203	file:
PERI_ACLK_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_ACLK_DIV_SHIFT	= 0,$/;"	e	enum:__anon375ccd790103
PERI_ACLK_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_ACLK_DIV_SHIFT	= 0,$/;"	e	enum:__anon06a678fa0203	file:
PERI_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define PERI_ACLK_HZ	/;"	d
PERI_ACLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define PERI_ACLK_HZ	/;"	d
PERI_CLK0_MMC0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_MMC0	/;"	d
PERI_CLK0_MMC1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_MMC1	/;"	d
PERI_CLK0_MMC2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_MMC2	/;"	d
PERI_CLK0_NANDC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_NANDC	/;"	d
PERI_CLK0_PICOPHY	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_PICOPHY	/;"	d
PERI_CLK0_PLL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_PLL	/;"	d
PERI_CLK0_USBOTG	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK0_USBOTG	/;"	d
PERI_CLK10_HARQ_CCPU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_HARQ_CCPU	/;"	d
PERI_CLK10_HARQ_MCU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_HARQ_MCU	/;"	d
PERI_CLK10_IPF_CCPU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_IPF_CCPU	/;"	d
PERI_CLK10_IPF_MCU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_IPF_MCU	/;"	d
PERI_CLK10_SECENG_CCPU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_SECENG_CCPU	/;"	d
PERI_CLK10_SECENG_MCU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_SECENG_MCU	/;"	d
PERI_CLK10_SOCP_CCPU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_SOCP_CCPU	/;"	d
PERI_CLK10_SOCP_MCU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK10_SOCP_MCU	/;"	d
PERI_CLK12_CODEC_SOC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_CODEC_SOC	/;"	d
PERI_CLK12_HIFI_SRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_HIFI_SRC	/;"	d
PERI_CLK12_MEDIA	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_MEDIA	/;"	d
PERI_CLK12_MMC0_HF	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_MMC0_HF	/;"	d
PERI_CLK12_MMC0_SRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_MMC0_SRC	/;"	d
PERI_CLK12_MMC1_HF	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_MMC1_HF	/;"	d
PERI_CLK12_MMC1_SRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_MMC1_SRC	/;"	d
PERI_CLK12_MMC2_SRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_MMC2_SRC	/;"	d
PERI_CLK12_PLL_TEST_SRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_PLL_TEST_SRC	/;"	d
PERI_CLK12_SYSPLL_DIV	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_SYSPLL_DIV	/;"	d
PERI_CLK12_TPIU_SRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK12_TPIU_SRC	/;"	d
PERI_CLK1_DIGACODEC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK1_DIGACODEC	/;"	d
PERI_CLK1_HIFI	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK1_HIFI	/;"	d
PERI_CLK2_DMAC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_DMAC	/;"	d
PERI_CLK2_HPM0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_HPM0	/;"	d
PERI_CLK2_HPM1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_HPM1	/;"	d
PERI_CLK2_HPM2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_HPM2	/;"	d
PERI_CLK2_HPM3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_HPM3	/;"	d
PERI_CLK2_IPF	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_IPF	/;"	d
PERI_CLK2_SECENG	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_SECENG	/;"	d
PERI_CLK2_SOCP	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK2_SOCP	/;"	d
PERI_CLK8_DDRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_DDRC	/;"	d
PERI_CLK8_DDRPACK_RS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_DDRPACK_RS	/;"	d
PERI_CLK8_DDRPHY	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_DDRPHY	/;"	d
PERI_CLK8_DDRPHY_REF	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_DDRPHY_REF	/;"	d
PERI_CLK8_DDRT	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_DDRT	/;"	d
PERI_CLK8_HARQ	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_HARQ	/;"	d
PERI_CLK8_MMU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_MMU	/;"	d
PERI_CLK8_MS0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_MS0	/;"	d
PERI_CLK8_MS2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_MS2	/;"	d
PERI_CLK8_ROM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_ROM	/;"	d
PERI_CLK8_RS0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_RS0	/;"	d
PERI_CLK8_RS2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_RS2	/;"	d
PERI_CLK8_RS3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_RS3	/;"	d
PERI_CLK8_SRAM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_SRAM	/;"	d
PERI_CLK8_X2SRAM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_X2SRAM	/;"	d
PERI_CLK8_X2X_CCPU	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_X2X_CCPU	/;"	d
PERI_CLK8_X2X_SYSNOC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_X2X_SYSNOC	/;"	d
PERI_CLK8_XG2RAM0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK8_XG2RAM0	/;"	d
PERI_CLK9_CARM_ATB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK9_CARM_ATB	/;"	d
PERI_CLK9_CARM_DAP	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK9_CARM_DAP	/;"	d
PERI_CLK9_CARM_KERNEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK9_CARM_KERNEL	/;"	d
PERI_CLK9_CARM_LBUS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CLK9_CARM_LBUS	/;"	d
PERI_CTRL1_ETR_AXI_CSYSREQ_N	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL1_ETR_AXI_CSYSREQ_N	/;"	d
PERI_CTRL1_ETR_AXI_CSYSREQ_N_MSK	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL1_ETR_AXI_CSYSREQ_N_MSK	/;"	d
PERI_CTRL1_HIFI_ALL_INT_MASK	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL1_HIFI_ALL_INT_MASK	/;"	d
PERI_CTRL1_HIFI_ALL_INT_MASK_MSK	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL1_HIFI_ALL_INT_MASK_MSK	/;"	d
PERI_CTRL1_HIFI_INT_MASK	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL1_HIFI_INT_MASK	/;"	d
PERI_CTRL1_HIFI_INT_MASK_MSK	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL1_HIFI_INT_MASK_MSK	/;"	d
PERI_CTRL2_CODEC_SSI_MASTER_CHECK	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_CODEC_SSI_MASTER_CHECK	/;"	d
PERI_CTRL2_CSSYS_TS_ENABLE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_CSSYS_TS_ENABLE	/;"	d
PERI_CTRL2_FUNC_TEST_SOFT	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_FUNC_TEST_SOFT	/;"	d
PERI_CTRL2_G3D_DDRT_AXI_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_G3D_DDRT_AXI_SEL	/;"	d
PERI_CTRL2_GU_MDM_BBP_TESTPIN_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_GU_MDM_BBP_TESTPIN_SEL	/;"	d
PERI_CTRL2_HIFI_RAMCTRL_S_EMA	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_HIFI_RAMCTRL_S_EMA	/;"	d
PERI_CTRL2_HIFI_RAMCTRL_S_EMAS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAS	/;"	d
PERI_CTRL2_HIFI_RAMCTRL_S_EMAW	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAW	/;"	d
PERI_CTRL2_HIFI_RAMCTRL_S_PGEN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_HIFI_RAMCTRL_S_PGEN	/;"	d
PERI_CTRL2_HIFI_RAMCTRL_S_RET1N	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_HIFI_RAMCTRL_S_RET1N	/;"	d
PERI_CTRL2_HIFI_RAMCTRL_S_RET2N	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_HIFI_RAMCTRL_S_RET2N	/;"	d
PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC0	/;"	d
PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC1	/;"	d
PERI_CTRL2_NAND_SYS_MEM_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL2_NAND_SYS_MEM_SEL	/;"	d
PERI_CTRL3_HARQMEM_SYS_MED_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_HARQMEM_SYS_MED_SEL	/;"	d
PERI_CTRL3_HIFI_DDR_HARQMEM_ADDR	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_HIFI_DDR_HARQMEM_ADDR	/;"	d
PERI_CTRL3_HIFI_HARQMEMRMP_EN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_HIFI_HARQMEMRMP_EN	/;"	d
PERI_CTRL3_SOC_AP_OCCUPY_GRP1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_SOC_AP_OCCUPY_GRP1	/;"	d
PERI_CTRL3_SOC_AP_OCCUPY_GRP2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_SOC_AP_OCCUPY_GRP2	/;"	d
PERI_CTRL3_SOC_AP_OCCUPY_GRP3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_SOC_AP_OCCUPY_GRP3	/;"	d
PERI_CTRL3_SOC_AP_OCCUPY_GRP4	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_SOC_AP_OCCUPY_GRP4	/;"	d
PERI_CTRL3_SOC_AP_OCCUPY_GRP5	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_SOC_AP_OCCUPY_GRP5	/;"	d
PERI_CTRL3_SOC_AP_OCCUPY_GRP6	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL3_SOC_AP_OCCUPY_GRP6	/;"	d
PERI_CTRL4_BC11_A	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_BC11_A	/;"	d
PERI_CTRL4_BC11_B	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_BC11_B	/;"	d
PERI_CTRL4_BC11_C	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_BC11_C	/;"	d
PERI_CTRL4_BC11_FLOAT	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_BC11_FLOAT	/;"	d
PERI_CTRL4_BC11_GND	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_BC11_GND	/;"	d
PERI_CTRL4_FPGA_EXT_PHY_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_FPGA_EXT_PHY_SEL	/;"	d
PERI_CTRL4_OTG_AVALID	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_AVALID	/;"	d
PERI_CTRL4_OTG_BVALID	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_BVALID	/;"	d
PERI_CTRL4_OTG_DM_PULLDOWN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_DM_PULLDOWN	/;"	d
PERI_CTRL4_OTG_DP_PULLDOWN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_DP_PULLDOWN	/;"	d
PERI_CTRL4_OTG_DRVBUS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_DRVBUS	/;"	d
PERI_CTRL4_OTG_IDPULLUP	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_IDPULLUP	/;"	d
PERI_CTRL4_OTG_PHY_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_PHY_SEL	/;"	d
PERI_CTRL4_OTG_SESSEND	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_SESSEND	/;"	d
PERI_CTRL4_OTG_VBUSVALID	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_OTG_VBUSVALID	/;"	d
PERI_CTRL4_PICO_COMMONONN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_COMMONONN	/;"	d
PERI_CTRL4_PICO_FSELV	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_FSELV	/;"	d
PERI_CTRL4_PICO_OGDISABLE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_OGDISABLE	/;"	d
PERI_CTRL4_PICO_REFCLKSEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_REFCLKSEL	/;"	d
PERI_CTRL4_PICO_SIDDQ	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_SIDDQ	/;"	d
PERI_CTRL4_PICO_SLEEPM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_SLEEPM	/;"	d
PERI_CTRL4_PICO_SUSPENDM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_SUSPENDM	/;"	d
PERI_CTRL4_PICO_SUSPENDM_SLEEPM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_SUSPENDM_SLEEPM	/;"	d
PERI_CTRL4_PICO_VATESTENB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_VATESTENB	/;"	d
PERI_CTRL4_PICO_VBUSVLDEXT	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_VBUSVLDEXT	/;"	d
PERI_CTRL4_PICO_VBUSVLDEXTSEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_PICO_VBUSVLDEXTSEL	/;"	d
PERI_CTRL4_USB_OTG_SS_SCALEDOWN_MODE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL4_USB_OTG_SS_SCALEDOWN_MODE	/;"	d
PERI_CTRL5_DBG_MUX	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_DBG_MUX	/;"	d
PERI_CTRL5_PICOPHY_ACAENB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_ACAENB	/;"	d
PERI_CTRL5_PICOPHY_BC_MODE	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_BC_MODE	/;"	d
PERI_CTRL5_PICOPHY_CHRGSEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_CHRGSEL	/;"	d
PERI_CTRL5_PICOPHY_DCDENB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_DCDENB	/;"	d
PERI_CTRL5_PICOPHY_IDDIG	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_IDDIG	/;"	d
PERI_CTRL5_PICOPHY_VDATDETENB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_VDATDETENB	/;"	d
PERI_CTRL5_PICOPHY_VDATSRCEND	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_PICOPHY_VDATSRCEND	/;"	d
PERI_CTRL5_USBOTG_RES_SEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL5_USBOTG_RES_SEL	/;"	d
PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMA	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMA	/;"	d
PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMAS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMAS	/;"	d
PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMAW	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMAW	/;"	d
PERI_CTRL6_CSSYSOFF_RAMCTRL_S_PGEN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_PGEN	/;"	d
PERI_CTRL6_CSSYSOFF_RAMCTRL_S_RET1N	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_RET1N	/;"	d
PERI_CTRL6_CSSYSOFF_RAMCTRL_S_RET2N	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_RET2N	/;"	d
PERI_CTRL8_PICOPHY_COMPDISTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_COMPDISTUNE0	/;"	d
PERI_CTRL8_PICOPHY_OTGTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_OTGTUNE0	/;"	d
PERI_CTRL8_PICOPHY_SQRXTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_SQRXTUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXFSLSTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXFSLSTUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXHSSVTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXHSSVTUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXPREEMPAMPTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXPREEMPAMPTUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXPREEMPPULSETUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXPREEMPPULSETUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXRESTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXRESTUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXRISETUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXRISETUNE0	/;"	d
PERI_CTRL8_PICOPHY_TXVREFTUNE0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL8_PICOPHY_TXVREFTUNE0	/;"	d
PERI_CTRL9_PICOPLY_TESTADDR	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL9_PICOPLY_TESTADDR	/;"	d
PERI_CTRL9_PICOPLY_TESTCLKEN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL9_PICOPLY_TESTCLKEN	/;"	d
PERI_CTRL9_PICOPLY_TESTDATAIN	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL9_PICOPLY_TESTDATAIN	/;"	d
PERI_CTRL9_PICOPLY_TESTDATAOUTSEL	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_CTRL9_PICOPLY_TESTDATAOUTSEL	/;"	d
PERI_HCLK_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_HCLK_DIV_MASK	= 3,$/;"	e	enum:__anon375ccd790103
PERI_HCLK_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_HCLK_DIV_MASK	= 3,$/;"	e	enum:__anon06a678fa0203	file:
PERI_HCLK_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_HCLK_DIV_SHIFT	= 8,$/;"	e	enum:__anon375ccd790103
PERI_HCLK_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_HCLK_DIV_SHIFT	= 8,$/;"	e	enum:__anon06a678fa0203	file:
PERI_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define PERI_HCLK_HZ	/;"	d
PERI_HCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define PERI_HCLK_HZ	/;"	d
PERI_PCLK_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PCLK_DIV_MASK	= 3,$/;"	e	enum:__anon375ccd790103
PERI_PCLK_DIV_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_PCLK_DIV_MASK	= 3,$/;"	e	enum:__anon06a678fa0203	file:
PERI_PCLK_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PCLK_DIV_SHIFT	= 12,$/;"	e	enum:__anon375ccd790103
PERI_PCLK_DIV_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_PCLK_DIV_SHIFT	= 12,$/;"	e	enum:__anon06a678fa0203	file:
PERI_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define PERI_PCLK_HZ	/;"	d
PERI_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define PERI_PCLK_HZ	/;"	d
PERI_PLL_APLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PLL_APLL		= 0,$/;"	e	enum:__anon375ccd790103
PERI_PLL_DPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PLL_DPLL,$/;"	e	enum:__anon375ccd790103
PERI_PLL_GPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PLL_GPLL,$/;"	e	enum:__anon375ccd790103
PERI_PLL_SEL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PLL_SEL_MASK	= 3,$/;"	e	enum:__anon375ccd790103
PERI_PLL_SEL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PERI_PLL_SEL_SHIFT	= 14,$/;"	e	enum:__anon375ccd790103
PERI_RST0_MMC0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_MMC0	/;"	d
PERI_RST0_MMC1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_MMC1	/;"	d
PERI_RST0_MMC2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_MMC2	/;"	d
PERI_RST0_NANDC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_NANDC	/;"	d
PERI_RST0_POR_PICOPHY	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_POR_PICOPHY	/;"	d
PERI_RST0_USBOTG	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_USBOTG	/;"	d
PERI_RST0_USBOTG_32K	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_USBOTG_32K	/;"	d
PERI_RST0_USBOTG_BUS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST0_USBOTG_BUS	/;"	d
PERI_RST1_DIGACODEC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST1_DIGACODEC	/;"	d
PERI_RST1_HIFI	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST1_HIFI	/;"	d
PERI_RST2_ABB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_ABB	/;"	d
PERI_RST2_DMAC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_DMAC	/;"	d
PERI_RST2_HPM0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_HPM0	/;"	d
PERI_RST2_HPM1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_HPM1	/;"	d
PERI_RST2_HPM2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_HPM2	/;"	d
PERI_RST2_HPM3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_HPM3	/;"	d
PERI_RST2_IPF	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_IPF	/;"	d
PERI_RST2_SECENG	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_SECENG	/;"	d
PERI_RST2_SOCP	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST2_SOCP	/;"	d
PERI_RST3_BLPWM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_BLPWM	/;"	d
PERI_RST3_CODEC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_CODEC	/;"	d
PERI_RST3_CSSYS	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_CSSYS	/;"	d
PERI_RST3_DAPB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_DAPB	/;"	d
PERI_RST3_HKADC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_HKADC	/;"	d
PERI_RST3_I2C0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_I2C0	/;"	d
PERI_RST3_I2C1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_I2C1	/;"	d
PERI_RST3_I2C2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_I2C2	/;"	d
PERI_RST3_I2C3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_I2C3	/;"	d
PERI_RST3_PWM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_PWM	/;"	d
PERI_RST3_SSP	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_SSP	/;"	d
PERI_RST3_TSENSOR	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_TSENSOR	/;"	d
PERI_RST3_UART1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_UART1	/;"	d
PERI_RST3_UART2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_UART2	/;"	d
PERI_RST3_UART3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_UART3	/;"	d
PERI_RST3_UART4	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST3_UART4	/;"	d
PERI_RST8_DDRC	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_DDRC	/;"	d
PERI_RST8_DDRC_APB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_DDRC_APB	/;"	d
PERI_RST8_DDRPACK_APB	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_DDRPACK_APB	/;"	d
PERI_RST8_DDRT	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_DDRT	/;"	d
PERI_RST8_HARQ	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_HARQ	/;"	d
PERI_RST8_MS0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_MS0	/;"	d
PERI_RST8_MS2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_MS2	/;"	d
PERI_RST8_RS0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_RS0	/;"	d
PERI_RST8_RS2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_RS2	/;"	d
PERI_RST8_RS3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_RS3	/;"	d
PERI_RST8_SRAM	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_SRAM	/;"	d
PERI_RST8_X2SRAM_TZMA	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_X2SRAM_TZMA	/;"	d
PERI_RST8_XG2RAM0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define PERI_RST8_XG2RAM0	/;"	d
PERI_RST_B	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	PERI_RST_B,$/;"	e	enum:qn	file:
PERI_SEL_CPLL	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_SEL_CPLL		= 0,$/;"	e	enum:__anon06a678fa0203	file:
PERI_SEL_GPLL	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_SEL_GPLL,$/;"	e	enum:__anon06a678fa0203	file:
PERI_SEL_PLL_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_SEL_PLL_MASK	 = 1,$/;"	e	enum:__anon06a678fa0203	file:
PERI_SEL_PLL_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PERI_SEL_PLL_SHIFT	 = 15,$/;"	e	enum:__anon06a678fa0203	file:
PERI_VCO_BASE	arch/arm/mach-socfpga/wrap_pll_config.c	/^#define PERI_VCO_BASE /;"	d	file:
PERL	Makefile	/^PERL		= perl$/;"	m
PERM	include/fsl_sec.h	/^#define PERM	/;"	d
PERMPP	cmd/tpm_test.c	/^#define PERMPP /;"	d	file:
PERMPPGL	cmd/tpm_test.c	/^#define PERMPPGL /;"	d	file:
PERM_SRC_ID	drivers/mtd/nand/denali.h	/^#define PERM_SRC_ID(/;"	d
PERM_SRC_ID__DIRECT_ACCESS_ACTIVE	drivers/mtd/nand/denali.h	/^#define     PERM_SRC_ID__DIRECT_ACCESS_ACTIVE	/;"	d
PERM_SRC_ID__PARTITION_VALID	drivers/mtd/nand/denali.h	/^#define     PERM_SRC_ID__PARTITION_VALID	/;"	d
PERM_SRC_ID__READ_ACTIVE	drivers/mtd/nand/denali.h	/^#define     PERM_SRC_ID__READ_ACTIVE	/;"	d
PERM_SRC_ID__SRCID	drivers/mtd/nand/denali.h	/^#define     PERM_SRC_ID__SRCID	/;"	d
PERM_SRC_ID__WRITE_ACTIVE	drivers/mtd/nand/denali.h	/^#define     PERM_SRC_ID__WRITE_ACTIVE	/;"	d
PERREN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PERREN	/;"	d
PERSLIMBUS2_CLOCK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define PERSLIMBUS2_CLOCK	/;"	d
PERSLIMBUS2_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define PERSLIMBUS2_DATA	/;"	d
PER_36XX_FSEL_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_FSEL_12	/;"	d
PER_36XX_FSEL_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_FSEL_13	/;"	d
PER_36XX_FSEL_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_FSEL_19P2	/;"	d
PER_36XX_FSEL_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_FSEL_26	/;"	d
PER_36XX_FSEL_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_FSEL_38P4	/;"	d
PER_36XX_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M2_12	/;"	d
PER_36XX_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M2_13	/;"	d
PER_36XX_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M2_19P2	/;"	d
PER_36XX_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M2_26	/;"	d
PER_36XX_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M2_38P4	/;"	d
PER_36XX_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M_12	/;"	d
PER_36XX_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M_13	/;"	d
PER_36XX_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M_19P2	/;"	d
PER_36XX_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M_26	/;"	d
PER_36XX_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_M_38P4	/;"	d
PER_36XX_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_N_12	/;"	d
PER_36XX_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_N_13	/;"	d
PER_36XX_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_N_19P2	/;"	d
PER_36XX_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_N_26	/;"	d
PER_36XX_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_36XX_N_38P4	/;"	d
PER_BIT_READ_LEVELING_TF	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	PER_BIT_READ_LEVELING_TF,$/;"	e	enum:auto_tune_stage
PER_BIT_READ_LEVELING_TF_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define PER_BIT_READ_LEVELING_TF_MASK_BIT	/;"	d
PER_BOARD_ADDR	board/mpl/mip405/mip405.h	/^#define PER_BOARD_ADDR /;"	d
PER_FSEL_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_FSEL_12	/;"	d
PER_FSEL_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_FSEL_13	/;"	d
PER_FSEL_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_FSEL_19P2	/;"	d
PER_FSEL_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_FSEL_26	/;"	d
PER_FSEL_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_FSEL_38P4	/;"	d
PER_M2_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M2_12	/;"	d
PER_M2_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M2_13	/;"	d
PER_M2_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M2_19P2	/;"	d
PER_M2_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M2_26	/;"	d
PER_M2_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M2_38P4	/;"	d
PER_M3X2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M3X2	/;"	d
PER_M4X2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M4X2	/;"	d
PER_M5X2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M5X2	/;"	d
PER_M6X2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M6X2	/;"	d
PER_M_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M_12	/;"	d
PER_M_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M_13	/;"	d
PER_M_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M_19P2	/;"	d
PER_M_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M_26	/;"	d
PER_M_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_M_38P4	/;"	d
PER_N_12	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_N_12	/;"	d
PER_N_13	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_N_13	/;"	d
PER_N_19P2	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_N_19P2	/;"	d
PER_N_26	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_N_26	/;"	d
PER_N_38P4	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PER_N_38P4	/;"	d
PER_PLD_ADDR	include/configs/MIP405.h	/^#define PER_PLD_ADDR	/;"	d
PER_UART0_ADDR	include/configs/MIP405.h	/^#define PER_UART0_ADDR	/;"	d
PER_UART1_ADDR	include/configs/MIP405.h	/^#define PER_UART1_ADDR	/;"	d
PESDR0_BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_BIST	/;"	d
PESDR0_DLPSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_DLPSET	/;"	d
PESDR0_HSSCTLSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSCTLSET	/;"	d
PESDR0_HSSL0SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL0SET1	/;"	d
PESDR0_HSSL0SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL0SET2	/;"	d
PESDR0_HSSL0STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL0STS	/;"	d
PESDR0_HSSL1SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL1SET1	/;"	d
PESDR0_HSSL1SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL1SET2	/;"	d
PESDR0_HSSL1STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL1STS	/;"	d
PESDR0_HSSL2SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL2SET1	/;"	d
PESDR0_HSSL2SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL2SET2	/;"	d
PESDR0_HSSL2STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL2STS	/;"	d
PESDR0_HSSL3SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL3SET1	/;"	d
PESDR0_HSSL3SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL3SET2	/;"	d
PESDR0_HSSL3STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL3STS	/;"	d
PESDR0_HSSL4SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL4SET1	/;"	d
PESDR0_HSSL4SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL4SET2	/;"	d
PESDR0_HSSL4STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL4STS	/;"	d
PESDR0_HSSL5SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL5SET1	/;"	d
PESDR0_HSSL5SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL5SET2	/;"	d
PESDR0_HSSL5STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL5STS	/;"	d
PESDR0_HSSL6SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL6SET1	/;"	d
PESDR0_HSSL6SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL6SET2	/;"	d
PESDR0_HSSL6STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL6STS	/;"	d
PESDR0_HSSL7SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL7SET1	/;"	d
PESDR0_HSSL7SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL7SET2	/;"	d
PESDR0_HSSL7STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_HSSL7STS	/;"	d
PESDR0_IHS1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_IHS1	/;"	d
PESDR0_IHS2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_IHS2	/;"	d
PESDR0_L0BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0BIST	/;"	d
PESDR0_L0BISTSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0BISTSTS	/;"	d
PESDR0_L0CDRCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0CDRCTL	/;"	d
PESDR0_L0CLK	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0CLK	/;"	d
PESDR0_L0DRV	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0DRV	/;"	d
PESDR0_L0ERRC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0ERRC	/;"	d
PESDR0_L0LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0LPB	/;"	d
PESDR0_L0REC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_L0REC	/;"	d
PESDR0_LANE_ABCD	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_LANE_ABCD	/;"	d
PESDR0_LANE_EFGH	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_LANE_EFGH	/;"	d
PESDR0_LOOP	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_LOOP	/;"	d
PESDR0_LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_LPB	/;"	d
PESDR0_OBS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_OBS	/;"	d
PESDR0_PHYSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PHYSET1	/;"	d
PESDR0_PHYSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PHYSET2	/;"	d
PESDR0_PHYSTA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PHYSTA	/;"	d
PESDR0_PHY_CTL_RST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PHY_CTL_RST	/;"	d
PESDR0_PLLLCT1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PLLLCT1	/;"	d
PESDR0_PLLLCT2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PLLLCT2	/;"	d
PESDR0_PLLLCT3	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_PLLLCT3	/;"	d
PESDR0_RCSSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_RCSSET	/;"	d
PESDR0_RCSSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_RCSSTS	/;"	d
PESDR0_RSTSTA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_RSTSTA	/;"	d
PESDR0_UTLSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_UTLSET1	/;"	d
PESDR0_UTLSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR0_UTLSET2	/;"	d
PESDR1_BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_BIST	/;"	d
PESDR1_DLPSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_DLPSET	/;"	d
PESDR1_HSSCTLSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSCTLSET	/;"	d
PESDR1_HSSL0SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL0SET1	/;"	d
PESDR1_HSSL0SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL0SET2	/;"	d
PESDR1_HSSL0STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL0STS	/;"	d
PESDR1_HSSL1SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL1SET1	/;"	d
PESDR1_HSSL1SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL1SET2	/;"	d
PESDR1_HSSL1STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL1STS	/;"	d
PESDR1_HSSL2SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL2SET1	/;"	d
PESDR1_HSSL2SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL2SET2	/;"	d
PESDR1_HSSL2STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL2STS	/;"	d
PESDR1_HSSL3SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL3SET1	/;"	d
PESDR1_HSSL3SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL3SET2	/;"	d
PESDR1_HSSL3STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_HSSL3STS	/;"	d
PESDR1_L0BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0BIST	/;"	d
PESDR1_L0BISTSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0BISTSTS	/;"	d
PESDR1_L0CDRCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0CDRCTL	/;"	d
PESDR1_L0CLK	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0CLK	/;"	d
PESDR1_L0DRV	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0DRV	/;"	d
PESDR1_L0ERRC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0ERRC	/;"	d
PESDR1_L0LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0LPB	/;"	d
PESDR1_L0REC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L0REC	/;"	d
PESDR1_L1BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1BIST	/;"	d
PESDR1_L1BISTSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1BISTSTS	/;"	d
PESDR1_L1CDRCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1CDRCTL	/;"	d
PESDR1_L1CLK	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1CLK	/;"	d
PESDR1_L1DRV	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1DRV	/;"	d
PESDR1_L1ERRC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1ERRC	/;"	d
PESDR1_L1LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1LPB	/;"	d
PESDR1_L1REC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L1REC	/;"	d
PESDR1_L2BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2BIST	/;"	d
PESDR1_L2BISTSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2BISTSTS	/;"	d
PESDR1_L2CDRCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2CDRCTL	/;"	d
PESDR1_L2CLK	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2CLK	/;"	d
PESDR1_L2DRV	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2DRV	/;"	d
PESDR1_L2ERRC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2ERRC	/;"	d
PESDR1_L2LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2LPB	/;"	d
PESDR1_L2REC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L2REC	/;"	d
PESDR1_L3BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3BIST	/;"	d
PESDR1_L3BISTSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3BISTSTS	/;"	d
PESDR1_L3CDRCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3CDRCTL	/;"	d
PESDR1_L3CLK	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3CLK	/;"	d
PESDR1_L3DRV	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3DRV	/;"	d
PESDR1_L3ERRC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3ERRC	/;"	d
PESDR1_L3LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3LPB	/;"	d
PESDR1_L3REC	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_L3REC	/;"	d
PESDR1_LANE_ABCD	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_LANE_ABCD	/;"	d
PESDR1_LOOP	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_LOOP	/;"	d
PESDR1_LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_LPB	/;"	d
PESDR1_OBS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_OBS	/;"	d
PESDR1_PHYSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_PHYSET1	/;"	d
PESDR1_PHYSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_PHYSET2	/;"	d
PESDR1_PHYSTA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_PHYSTA	/;"	d
PESDR1_PHY_CTL_RST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_PHY_CTL_RST	/;"	d
PESDR1_RCSSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_RCSSET	/;"	d
PESDR1_RCSSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_RCSSTS	/;"	d
PESDR1_RSTSTA	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_RSTSTA	/;"	d
PESDR1_UTLSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_UTLSET1	/;"	d
PESDR1_UTLSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR1_UTLSET2	/;"	d
PESDR2_DLPSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_DLPSET	/;"	d
PESDR2_HSSCTLSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSCTLSET	/;"	d
PESDR2_HSSL0SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL0SET1	/;"	d
PESDR2_HSSL0SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL0SET2	/;"	d
PESDR2_HSSL0STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL0STS	/;"	d
PESDR2_HSSL1SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL1SET1	/;"	d
PESDR2_HSSL1SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL1SET2	/;"	d
PESDR2_HSSL1STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL1STS	/;"	d
PESDR2_HSSL2SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL2SET1	/;"	d
PESDR2_HSSL2SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL2SET2	/;"	d
PESDR2_HSSL2STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL2STS	/;"	d
PESDR2_HSSL3SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL3SET1	/;"	d
PESDR2_HSSL3SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL3SET2	/;"	d
PESDR2_HSSL3STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_HSSL3STS	/;"	d
PESDR2_LANE_ABCD	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_LANE_ABCD	/;"	d
PESDR2_LOOP	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_LOOP	/;"	d
PESDR2_RCSSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_RCSSET	/;"	d
PESDR2_RCSSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_RCSSTS	/;"	d
PESDR2_UTLSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_UTLSET1	/;"	d
PESDR2_UTLSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDR2_UTLSET2	/;"	d
PESDRx_RCSSET_HLDPLB	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSET_HLDPLB	/;"	d
PESDRx_RCSSET_RDY	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSET_RDY /;"	d
PESDRx_RCSSET_RSTDL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSET_RSTDL /;"	d
PESDRx_RCSSET_RSTGU	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSET_RSTGU	/;"	d
PESDRx_RCSSET_RSTPYN	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSET_RSTPYN /;"	d
PESDRx_RCSSTS_BMEN	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSTS_BMEN	/;"	d
PESDRx_RCSSTS_HRSTRQ	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSTS_HRSTRQ	/;"	d
PESDRx_RCSSTS_PGRST	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSTS_PGRST	/;"	d
PESDRx_RCSSTS_PLBIDL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSTS_PLBIDL	/;"	d
PESDRx_RCSSTS_VC0ACT	arch/powerpc/include/asm/4xx_pcie.h	/^#define PESDRx_RCSSTS_VC0ACT	/;"	d
PETCR	arch/sh/include/asm/cpu_sh7203.h	/^#define PETCR	/;"	d
PETCR	arch/sh/include/asm/cpu_sh7264.h	/^#define PETCR	/;"	d
PETCR	arch/sh/include/asm/cpu_sh7706.h	/^#define PETCR	/;"	d
PETCR	arch/sh/include/asm/cpu_sh7710.h	/^#define PETCR	/;"	d
PEUTL_INTR	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_INTR	/;"	d
PEUTL_IPDBSZ	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_IPDBSZ	/;"	d
PEUTL_IPHBSZ	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_IPHBSZ	/;"	d
PEUTL_OPDBSZ	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_OPDBSZ	/;"	d
PEUTL_OUTTR	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_OUTTR	/;"	d
PEUTL_PBBSZ	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_PBBSZ	/;"	d
PEUTL_PBCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define	PEUTL_PBCTL	/;"	d
PEUTL_PCTL	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_PCTL	/;"	d
PEUTL_RCIRQEN	arch/powerpc/include/asm/4xx_pcie.h	/^#define PEUTL_RCIRQEN	/;"	d
PEUTL_RCSTA	arch/powerpc/include/asm/4xx_pcie.h	/^#define	PEUTL_RCSTA	/;"	d
PEX	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX,$/;"	e	enum:__anon525929f50103
PEX0	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX0,$/;"	e	enum:serdes_type
PEX1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX1,$/;"	e	enum:serdes_type
PEX2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX2,$/;"	e	enum:serdes_type
PEX3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX3,$/;"	e	enum:serdes_type
PEXHC_RST	board/keymile/kmp204x/pci.c	/^#define PEXHC_RST	/;"	d	file:
PEXSERDES_SPEED_2_5_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEXSERDES_SPEED_2_5_GBPS,$/;"	e	enum:__anon525929f50203
PEXSERDES_SPEED_5_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEXSERDES_SPEED_5_GBPS,$/;"	e	enum:__anon525929f50203
PEX_2_5_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_2_5_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
PEX_5_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_5_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
PEX_BUS_DISABLED	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	PEX_BUS_DISABLED	= 0,$/;"	e	enum:__anon3796299a0203
PEX_BUS_MODE_X1	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	PEX_BUS_MODE_X1		= 1,$/;"	e	enum:__anon3796299a0203
PEX_BUS_MODE_X4	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	PEX_BUS_MODE_X4		= 2,$/;"	e	enum:__anon3796299a0203
PEX_BUS_MODE_X8	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	PEX_BUS_MODE_X8		= 3$/;"	e	enum:__anon3796299a0203
PEX_BY_4_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_BY_4_CONFIG_SEQ,$/;"	e	enum:serdes_seq
PEX_CAPABILITIES_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_CAPABILITIES_REG(/;"	d
PEX_CAPABILITIES_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CAPABILITIES_REG(/;"	d
PEX_CAPABILITY_GET	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define PEX_CAPABILITY_GET(/;"	d	file:
PEX_CAPABILITY_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CAPABILITY_REG	/;"	d
PEX_CAUSE_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CAUSE_REG(/;"	d
PEX_CFG_ADDR_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_CFG_ADDR_REG(/;"	d
PEX_CFG_ADDR_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CFG_ADDR_REG(/;"	d
PEX_CFG_DATA_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_CFG_DATA_REG(/;"	d
PEX_CFG_DATA_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CFG_DATA_REG(/;"	d
PEX_CFG_DIRECT_ACCESS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PEX_CFG_DIRECT_ACCESS(/;"	d
PEX_CFG_DIRECT_ACCESS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PEX_CFG_DIRECT_ACCESS(/;"	d
PEX_CLK_100MHZ_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CLK_100MHZ_MASK	/;"	d
PEX_CLK_100MHZ_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CLK_100MHZ_OFFSET	/;"	d
PEX_COMPLT_TMEOUT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_COMPLT_TMEOUT_REG(/;"	d
PEX_CONFIG_REF_CLOCK_100MHZ_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_CONFIG_REF_CLOCK_100MHZ_SEQ,$/;"	e	enum:serdes_seq
PEX_CONFIG_REF_CLOCK_25MHZ_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_CONFIG_REF_CLOCK_25MHZ_SEQ,$/;"	e	enum:serdes_seq
PEX_CONFIG_REF_CLOCK_40MHZ_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_CONFIG_REF_CLOCK_40MHZ_SEQ,$/;"	e	enum:serdes_seq
PEX_CSB_CTRL_IBPIOE	include/mpc83xx.h	/^#define PEX_CSB_CTRL_IBPIOE	/;"	d
PEX_CSB_CTRL_OBPIOE	include/mpc83xx.h	/^#define PEX_CSB_CTRL_OBPIOE	/;"	d
PEX_CSB_CTRL_RDMAE	include/mpc83xx.h	/^#define PEX_CSB_CTRL_RDMAE	/;"	d
PEX_CSB_CTRL_WDMAE	include/mpc83xx.h	/^#define PEX_CSB_CTRL_WDMAE	/;"	d
PEX_CSB_IBCTRL_PIOE	include/mpc83xx.h	/^#define PEX_CSB_IBCTRL_PIOE	/;"	d
PEX_CSB_OBCTRL_CFGWE	include/mpc83xx.h	/^#define PEX_CSB_OBCTRL_CFGWE	/;"	d
PEX_CSB_OBCTRL_IOWE	include/mpc83xx.h	/^#define PEX_CSB_OBCTRL_IOWE	/;"	d
PEX_CSB_OBCTRL_MEMWE	include/mpc83xx.h	/^#define PEX_CSB_OBCTRL_MEMWE	/;"	d
PEX_CSB_OBCTRL_PIOE	include/mpc83xx.h	/^#define PEX_CSB_OBCTRL_PIOE	/;"	d
PEX_CSR0_LTSSM_MASK	drivers/pci/fsl_pci_init.c	/^#define PEX_CSR0_LTSSM_MASK	/;"	d	file:
PEX_CSR0_LTSSM_SHIFT	drivers/pci/fsl_pci_init.c	/^#define PEX_CSR0_LTSSM_SHIFT	/;"	d	file:
PEX_CTRL_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_CTRL_REG(/;"	d
PEX_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_CTRL_REG(/;"	d
PEX_DBG_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_DBG_CTRL_REG(/;"	d
PEX_DBG_STATUS_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_DBG_STATUS_REG(/;"	d
PEX_DBG_STATUS_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_DBG_STATUS_REG(/;"	d
PEX_DEVICE_AND_VENDOR_ID	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_DEVICE_AND_VENDOR_ID	/;"	d
PEX_DEVICE_AND_VENDOR_ID	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PEX_DEVICE_AND_VENDOR_ID	/;"	d
PEX_DEVICE_AND_VENDOR_ID	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PEX_DEVICE_AND_VENDOR_ID	/;"	d
PEX_DEV_CAPABILITY_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_DEV_CAPABILITY_REG	/;"	d
PEX_DEV_CTRL_STAT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_DEV_CTRL_STAT_REG	/;"	d
PEX_DYNMC_WIDTH_MNG_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_DYNMC_WIDTH_MNG_REG(/;"	d
PEX_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
PEX_END_POINT_X1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_END_POINT_X1,$/;"	e	enum:serdes_mode
PEX_END_POINT_X4	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_END_POINT_X4,$/;"	e	enum:serdes_mode
PEX_FLOW_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_FLOW_CTRL_REG(/;"	d
PEX_GCLK_RATIO	include/mpc83xx.h	/^#define PEX_GCLK_RATIO	/;"	d
PEX_IF_REGS_BASE	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_IF_REGS_BASE(/;"	d
PEX_IF_REGS_OFFSET	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_IF_REGS_OFFSET(/;"	d
PEX_IP_BLK_REV_2_2	arch/powerpc/include/asm/fsl_pci.h	/^#define PEX_IP_BLK_REV_2_2	/;"	d
PEX_IP_BLK_REV_2_3	arch/powerpc/include/asm/fsl_pci.h	/^#define PEX_IP_BLK_REV_2_3	/;"	d
PEX_IP_BLK_REV_3_0	arch/powerpc/include/asm/fsl_pci.h	/^#define PEX_IP_BLK_REV_3_0	/;"	d
PEX_IWAR_EN	include/mpc83xx.h	/^#define PEX_IWAR_EN	/;"	d
PEX_IWAR_NSNP	include/mpc83xx.h	/^#define PEX_IWAR_NSNP	/;"	d
PEX_IWAR_NSOV	include/mpc83xx.h	/^#define PEX_IWAR_NSOV	/;"	d
PEX_IWAR_SIZE	include/mpc83xx.h	/^#define PEX_IWAR_SIZE	/;"	d
PEX_IWAR_SIZE_128M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_128M	/;"	d
PEX_IWAR_SIZE_16M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_16M	/;"	d
PEX_IWAR_SIZE_1M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_1M	/;"	d
PEX_IWAR_SIZE_256M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_256M	/;"	d
PEX_IWAR_SIZE_2M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_2M	/;"	d
PEX_IWAR_SIZE_32M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_32M	/;"	d
PEX_IWAR_SIZE_4M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_4M	/;"	d
PEX_IWAR_SIZE_64M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_64M	/;"	d
PEX_IWAR_SIZE_8M	include/mpc83xx.h	/^#define PEX_IWAR_SIZE_8M	/;"	d
PEX_IWAR_TYPE_INT	include/mpc83xx.h	/^#define PEX_IWAR_TYPE_INT	/;"	d
PEX_IWAR_TYPE_NO_PF	include/mpc83xx.h	/^#define PEX_IWAR_TYPE_NO_PF	/;"	d
PEX_IWAR_TYPE_PF	include/mpc83xx.h	/^#define PEX_IWAR_TYPE_PF	/;"	d
PEX_LINK_CAPABILITIES_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_LINK_CAPABILITIES_REG(/;"	d
PEX_LINK_CAPABILITY_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_LINK_CAPABILITY_REG	/;"	d
PEX_LINK_CAPABILITY_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_LINK_CAPABILITY_REG	/;"	d
PEX_LINK_CTRL_STATUS2_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_LINK_CTRL_STATUS2_REG(/;"	d
PEX_LINK_CTRL_STATUS2_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_LINK_CTRL_STATUS2_REG(/;"	d
PEX_LINK_CTRL_STATUS_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_LINK_CTRL_STATUS_REG(/;"	d
PEX_LINK_CTRL_STAT_2_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_LINK_CTRL_STAT_2_REG	/;"	d
PEX_LINK_CTRL_STAT_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_LINK_CTRL_STAT_REG	/;"	d
PEX_LINK_CTRL_STAT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_LINK_CTRL_STAT_REG	/;"	d
PEX_MODE_GET	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define PEX_MODE_GET(/;"	d	file:
PEX_MODULE_DETECT	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define	PEX_MODULE_DETECT	/;"	d	file:
PEX_OWAR_EN	include/mpc83xx.h	/^#define PEX_OWAR_EN	/;"	d
PEX_OWAR_NANP	include/mpc83xx.h	/^#define PEX_OWAR_NANP	/;"	d
PEX_OWAR_RLXO	include/mpc83xx.h	/^#define PEX_OWAR_RLXO	/;"	d
PEX_OWAR_SIZE	include/mpc83xx.h	/^#define PEX_OWAR_SIZE	/;"	d
PEX_OWAR_TYPE_CFG	include/mpc83xx.h	/^#define PEX_OWAR_TYPE_CFG	/;"	d
PEX_OWAR_TYPE_IO	include/mpc83xx.h	/^#define PEX_OWAR_TYPE_IO	/;"	d
PEX_OWAR_TYPE_MEM	include/mpc83xx.h	/^#define PEX_OWAR_TYPE_MEM	/;"	d
PEX_PHY_ACCESS_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_PHY_ACCESS_REG(/;"	d
PEX_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
PEX_PWR_MNG_EXT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_PWR_MNG_EXT_REG(/;"	d
PEX_RAM_PARITY_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_RAM_PARITY_CTRL_REG(/;"	d
PEX_ROOT_CMPLX_SSPL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_ROOT_CMPLX_SSPL_REG(/;"	d
PEX_ROOT_COMPLEX_X1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_ROOT_COMPLEX_X1,$/;"	e	enum:serdes_mode
PEX_ROOT_COMPLEX_X4	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_ROOT_COMPLEX_X4,$/;"	e	enum:serdes_mode
PEX_STATUS_AND_COMMAND	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_STATUS_AND_COMMAND	/;"	d
PEX_STATUS_AND_COMMAND	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_STATUS_AND_COMMAND	/;"	d
PEX_STATUS_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PEX_STATUS_REG(/;"	d
PEX_STATUS_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PEX_STATUS_REG(/;"	d
PEX_SWITCH_NOT_FOUNT_LIMIT	board/theadorable/theadorable.c	/^#define PEX_SWITCH_NOT_FOUNT_LIMIT	/;"	d	file:
PEX_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
PEX_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
PEX_TX_CONFIG_SEQ3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	PEX_TX_CONFIG_SEQ3,$/;"	e	enum:serdes_seq
PEX_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	PEX_UNIT_ID,$/;"	e	enum:unit_id
PEX_X4_ENABLE_OFFS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define PEX_X4_ENABLE_OFFS	/;"	d
PE_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define PE_P	/;"	d
PF0	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF0	/;"	d
PF1	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF1	/;"	d
PF10	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF10	/;"	d
PF11	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF11	/;"	d
PF12	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF12	/;"	d
PF13	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF13	/;"	d
PF14	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF14	/;"	d
PF15	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF15	/;"	d
PF16	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF16	/;"	d
PF17	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF17	/;"	d
PF18	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF18	/;"	d
PF19	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF19	/;"	d
PF2	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF2	/;"	d
PF20	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF20	/;"	d
PF21	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF21	/;"	d
PF22	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF22	/;"	d
PF23	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF23	/;"	d
PF23_AIN_FEC_TX_EN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define PF23_AIN_FEC_TX_EN	/;"	d
PF24	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF24	/;"	d
PF25	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF25	/;"	d
PF26	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF26	/;"	d
PF27	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF27	/;"	d
PF28	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF28	/;"	d
PF29	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF29	/;"	d
PF3	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF3	/;"	d
PF30	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF30	/;"	d
PF31	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF31	/;"	d
PF32	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF32	/;"	d
PF33	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF33	/;"	d
PF34	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF34	/;"	d
PF35	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF35	/;"	d
PF36	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF36	/;"	d
PF37	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF37	/;"	d
PF38	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF38	/;"	d
PF39	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF39	/;"	d
PF4	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF4	/;"	d
PF40	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF40	/;"	d
PF41	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF41	/;"	d
PF42	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF42	/;"	d
PF43	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF43	/;"	d
PF44	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF44	/;"	d
PF45	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF45	/;"	d
PF46	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF46	/;"	d
PF47	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define PF47	/;"	d
PF5	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF5	/;"	d
PF6	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF6	/;"	d
PF7	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF7	/;"	d
PF8	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF8	/;"	d
PF9	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define PF9	/;"	d
PFCNTR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define PFCNTR0 /;"	d
PFCNTR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define PFCNTR1 /;"	d
PFCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PFCR	/;"	d
PFCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PFCR /;"	d
PFCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PFCR /;"	d
PFCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PFCR /;"	d
PFCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PFCR	/;"	d
PFCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PFCR /;"	d	file:
PFCR2_A	board/renesas/rsk7269/lowlevel_init.S	/^PFCR2_A:	.long 0xFFFE38AA$/;"	l
PFCR2_D	board/renesas/rsk7269/lowlevel_init.S	/^PFCR2_D:	.word 0x0101$/;"	l
PFCR3_A	board/renesas/rsk7269/lowlevel_init.S	/^PFCR3_A:	.long 0xFFFE38A8$/;"	l
PFCR3_D	board/renesas/rsk7269/lowlevel_init.S	/^PFCR3_D:	.word 0x0010$/;"	l
PFCRH1_A	board/renesas/rsk7203/lowlevel_init.S	/^PFCRH1_A:	.long 0xFFFE3A8E$/;"	l
PFCRH1_D	board/renesas/rsk7203/lowlevel_init.S	/^PFCRH1_D:	.word 0x0000$/;"	l
PFCRH2_A	board/renesas/rsk7203/lowlevel_init.S	/^PFCRH2_A:	.long 0xFFFE3A8C$/;"	l
PFCRH2_D	board/renesas/rsk7203/lowlevel_init.S	/^PFCRH2_D:	.word 0x0000$/;"	l
PFCRH3_A	board/renesas/rsk7203/lowlevel_init.S	/^PFCRH3_A:	.long 0xFFFE3A8A$/;"	l
PFCRH3_D	board/renesas/rsk7203/lowlevel_init.S	/^PFCRH3_D:	.word 0x0000$/;"	l
PFCR_A	board/espt/lowlevel_init.S	/^PFCR_A:	.long	0xFFEF000A$/;"	l
PFCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PFCR_A:		.long	0xffec000a$/;"	l
PFCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PFCR_A:		.long	GPIO_BASE + 0x0a$/;"	l
PFCR_D	board/espt/lowlevel_init.S	/^PFCR_D:	.word	0x0000$/;"	l
PFCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PFCR_D	/;"	d	file:
PFCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PFCR_D:		.long	0x0000$/;"	l
PFCTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define PFCTL /;"	d
PFC_BASE	arch/sh/include/asm/cpu_sh7720.h	/^#define PFC_BASE	/;"	d
PFC_BASE	board/ms7720se/lowlevel_init.S	/^#define PFC_BASE	/;"	d	file:
PFC_DRVCR_A	board/renesas/MigoR/lowlevel_init.S	/^PFC_DRVCR_A:	.long	DRVCR$/;"	l
PFC_DRVCR_D	board/renesas/MigoR/lowlevel_init.S	/^PFC_DRVCR_D:	.long	0x0464$/;"	l
PFC_GPSR0_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR0_A:	.long	0xFFFC0004$/;"	l
PFC_GPSR0_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR0_D:	.long	0xFFFFFFFF$/;"	l
PFC_GPSR1_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR1_A:	.long	0xFFFC0008$/;"	l
PFC_GPSR1_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR1_D:	.long	0x7FBF7FFF$/;"	l
PFC_GPSR2_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR2_A:	.long	0xFFFC000C$/;"	l
PFC_GPSR2_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR2_D:	.long	0xBFC07EDF$/;"	l
PFC_GPSR3_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR3_A:	.long	0xFFFC0010$/;"	l
PFC_GPSR3_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR3_D:	.long	0xFFFFFFFF$/;"	l
PFC_GPSR4_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR4_A:	.long	0xFFFC0014$/;"	l
PFC_GPSR4_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR4_D:	.long	0xFBFFFFFF$/;"	l
PFC_GPSR5_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR5_A:	.long	0xFFFC0018$/;"	l
PFC_GPSR5_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_GPSR5_D:	.long	0x00000C01$/;"	l
PFC_IPSR11_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_IPSR11_A:	.long	0xFFFC0048$/;"	l
PFC_IPSR11_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_IPSR11_D:	.long	0x002C89B0$/;"	l
PFC_IPSR3_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_IPSR3_A:	.long	0xFFFC0028$/;"	l
PFC_IPSR3_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_IPSR3_D:	.long	0x09209248$/;"	l
PFC_IPSR4_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_IPSR4_A:	.long	0xFFFC002C$/;"	l
PFC_IPSR4_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_IPSR4_D:	.long	0x0001B6DB$/;"	l
PFC_MODESEL1_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_MODESEL1_A:	.long	0xFFFC004C$/;"	l
PFC_MODESEL1_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_MODESEL1_D:	.long	0x10000000$/;"	l
PFC_MODESEL2_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_MODESEL2_A:	.long	0xFFFC0050$/;"	l
PFC_MODESEL2_D	board/renesas/r0p7734/lowlevel_init.S	/^PFC_MODESEL2_D:	.long	0x00000290$/;"	l
PFC_PMMR_A	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_A:		.long	0xFFFC0000$/;"	l
PFC_PMMR_GPSR0	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_GPSR0:	.long	0x00000000$/;"	l
PFC_PMMR_GPSR1	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_GPSR1:	.long	0x80408000$/;"	l
PFC_PMMR_GPSR2	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_GPSR2:	.long	0x403F8120$/;"	l
PFC_PMMR_GPSR3	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_GPSR3:	.long	0x00000000$/;"	l
PFC_PMMR_GPSR4	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_GPSR4:	.long	0x04000000$/;"	l
PFC_PMMR_GPSR5	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_GPSR5:	.long	0xFFFFF3FE$/;"	l
PFC_PMMR_IPSR3	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_IPSR3:	.long	0xF6DF6DB7$/;"	l
PFC_PMMR_IPSR4	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_IPSR4:	.long	0xFFFE4924$/;"	l
PFC_PMMR_MODESEL1	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_MODESEL1:	.long	0xEFFFFFFF$/;"	l
PFC_PMMR_MODESEL2	board/renesas/r0p7734/lowlevel_init.S	/^PFC_PMMR_MODESEL2:	.long	0xFFFFFD6F$/;"	l
PFC_PUEN6	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define PFC_PUEN6 /;"	d
PFC_PULCR_A	board/renesas/MigoR/lowlevel_init.S	/^PFC_PULCR_A:	.long	PULCR$/;"	l
PFC_PULCR_D	board/renesas/MigoR/lowlevel_init.S	/^PFC_PULCR_D:	.long	0x6000$/;"	l
PFDE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PFDE	/;"	d
PFDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PFDR	/;"	d
PFDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PFDR /;"	d
PFDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PFDR /;"	d
PFDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PFDR /;"	d
PFDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PFDR	/;"	d
PFEN	include/sym53c8xx.h	/^	#define   PFEN /;"	d
PFER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PFER	/;"	d
PFF	include/sym53c8xx.h	/^	#define   PFF /;"	d
PFFE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PFFE	/;"	d
PFIORH_A	board/renesas/rsk7203/lowlevel_init.S	/^PFIORH_A:	.long 0xFFFE3A84$/;"	l
PFIORH_D	board/renesas/rsk7203/lowlevel_init.S	/^PFIORH_D:	.word 0x0729$/;"	l
PFM_MODE	drivers/power/tps6586x.c	/^	PFM_MODE		= 0x47,$/;"	e	enum:__anone1ef2c880103	file:
PFM_OFF	include/power/pfuze100_pmic.h	/^#define PFM_OFF	/;"	d
PFM_PWM_SWITCH	drivers/usb/eth/r8152.h	/^#define PFM_PWM_SWITCH	/;"	d
PFRCR	drivers/net/sh_eth.h	/^	PFRCR,$/;"	e	enum:__anon5ef54f5a0103
PFS4E	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PFS4E	/;"	d
PFS5E	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PFS5E	/;"	d
PFS6E	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PFS6E	/;"	d
PFSC	drivers/usb/gadget/ci_udc.h	/^#define PFSC	/;"	d
PFTCR	drivers/net/sh_eth.h	/^	PFTCR,$/;"	e	enum:__anon5ef54f5a0103
PFTE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PFTE	/;"	d
PFUZE100	include/power/pfuze100_pmic.h	/^enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30};$/;"	e	enum:__anon00d91bad0103
PFUZE100_CONF_OFFSET	include/power/pfuze100_pmic.h	/^#define PFUZE100_CONF_OFFSET	/;"	d
PFUZE100_DEVICEID	include/power/pfuze100_pmic.h	/^	PFUZE100_DEVICEID	= 0x00,$/;"	e	enum:__anon00d91bad0203
PFUZE100_FABID	include/power/pfuze100_pmic.h	/^	PFUZE100_FABID		= 0x04,$/;"	e	enum:__anon00d91bad0203
PFUZE100_FIXED_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE100_FIXED_REG(/;"	d	file:
PFUZE100_MODE_OFFSET	include/power/pfuze100_pmic.h	/^#define PFUZE100_MODE_OFFSET	/;"	d
PFUZE100_NUM_OF_REGS	include/power/pfuze100_pmic.h	/^	PFUZE100_NUM_OF_REGS	= 0x7f,$/;"	e	enum:__anon00d91bad0203
PFUZE100_OFF_OFFSET	include/power/pfuze100_pmic.h	/^#define PFUZE100_OFF_OFFSET	/;"	d
PFUZE100_REGULATOR_DRIVER	include/power/pfuze100_pmic.h	/^#define PFUZE100_REGULATOR_DRIVER	/;"	d
PFUZE100_REVID	include/power/pfuze100_pmic.h	/^	PFUZE100_REVID		= 0x03,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SNVS_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE100_SNVS_REG(/;"	d	file:
PFUZE100_STBY_OFFSET	include/power/pfuze100_pmic.h	/^#define PFUZE100_STBY_OFFSET	/;"	d
PFUZE100_SW1ABCONF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1ABCONF	= 0x24,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1ABC_SETP	include/power/pfuze100_pmic.h	/^#define PFUZE100_SW1ABC_SETP(/;"	d
PFUZE100_SW1ABMODE	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1ABMODE	= 0x23,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1ABOFF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1ABOFF	= 0x22,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1ABSTBY	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1ABSTBY	= 0x21,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1ABVOL	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1ABVOL	= 0x20,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1CCONF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1CCONF	= 0x32,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1CMODE	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1CMODE	= 0x31,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1COFF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1COFF	= 0x30,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1CSTBY	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1CSTBY	= 0x2f,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW1CVOL	include/power/pfuze100_pmic.h	/^	PFUZE100_SW1CVOL	= 0x2e,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW2CONF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW2CONF	= 0x39,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW2MODE	include/power/pfuze100_pmic.h	/^	PFUZE100_SW2MODE	= 0x38,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW2OFF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW2OFF		= 0x37,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW2STBY	include/power/pfuze100_pmic.h	/^	PFUZE100_SW2STBY	= 0x36,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW2VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_SW2VOL		= 0x35,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3ACONF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3ACONF	= 0x40,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3AMODE	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3AMODE	= 0x3F,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3AOFF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3AOFF	= 0x3E,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3ASTBY	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3ASTBY	= 0x3D,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3AVOL	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3AVOL	= 0x3c,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3BCONF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3BCONF	= 0x47,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3BMODE	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3BMODE	= 0x46,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3BOFF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3BOFF	= 0x45,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3BSTBY	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3BSTBY	= 0x44,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW3BVOL	include/power/pfuze100_pmic.h	/^	PFUZE100_SW3BVOL	= 0x43,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW4CONF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW4CONF	= 0x4e,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW4MODE	include/power/pfuze100_pmic.h	/^	PFUZE100_SW4MODE	= 0x4d,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW4OFF	include/power/pfuze100_pmic.h	/^	PFUZE100_SW4OFF		= 0x4c,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW4STBY	include/power/pfuze100_pmic.h	/^	PFUZE100_SW4STBY	= 0x4b,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SW4VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_SW4VOL		= 0x4a,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SWBSTCON1	include/power/pfuze100_pmic.h	/^	PFUZE100_SWBSTCON1	= 0x66,$/;"	e	enum:__anon00d91bad0203
PFUZE100_SWB_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE100_SWB_REG(/;"	d	file:
PFUZE100_SW_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE100_SW_REG(/;"	d	file:
PFUZE100_VGEN1VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VGEN1VOL	= 0x6c,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VGEN2VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VGEN2VOL	= 0x6d,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VGEN3VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VGEN3VOL	= 0x6e,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VGEN4VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VGEN4VOL	= 0x6f,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VGEN5VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VGEN5VOL	= 0x70,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VGEN6VOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VGEN6VOL	= 0x71,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VGEN_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE100_VGEN_REG(/;"	d	file:
PFUZE100_VOL_OFFSET	include/power/pfuze100_pmic.h	/^#define PFUZE100_VOL_OFFSET	/;"	d
PFUZE100_VREFDDRCON	include/power/pfuze100_pmic.h	/^	PFUZE100_VREFDDRCON	= 0x6a,$/;"	e	enum:__anon00d91bad0203
PFUZE100_VSNVSVOL	include/power/pfuze100_pmic.h	/^	PFUZE100_VSNVSVOL	= 0x6b,$/;"	e	enum:__anon00d91bad0203
PFUZE200	include/power/pfuze100_pmic.h	/^enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30};$/;"	e	enum:__anon00d91bad0103
PFUZE3000	include/power/pfuze100_pmic.h	/^enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30};$/;"	e	enum:__anon00d91bad0103
PFUZE3000_COINCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_COINCTL	= 0x1A,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_DEVICEID	include/power/pfuze3000_pmic.h	/^	PFUZE3000_DEVICEID	= 0x00,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_FABID	include/power/pfuze3000_pmic.h	/^	PFUZE3000_FABID		= 0x04,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTMASK0	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTMASK0	= 0x06,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTMASK1	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTMASK1	= 0x09,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTMASK3	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTMASK3	= 0x0F,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTMASK4	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTMASK4	= 0x12,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSENSE0	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSENSE0	= 0x07,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSENSE1	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSENSE1	= 0x0A,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSENSE3	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSENSE3	= 0x10,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSENSE4	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSENSE4	= 0x13,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSTAT0	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSTAT0	= 0x05,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSTAT1	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSTAT1	= 0x08,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSTAT3	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSTAT3	= 0x0E,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_INTSTAT4	include/power/pfuze3000_pmic.h	/^	PFUZE3000_INTSTAT4	= 0x11,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_LDOGCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_LDOGCTL	= 0x69,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_MEMA	include/power/pfuze3000_pmic.h	/^	PFUZE3000_MEMA		= 0x1C,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_MEMB	include/power/pfuze3000_pmic.h	/^	PFUZE3000_MEMB		= 0x1D,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_MEMC	include/power/pfuze3000_pmic.h	/^	PFUZE3000_MEMC		= 0x1E,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_MEMD	include/power/pfuze3000_pmic.h	/^	PFUZE3000_MEMD		= 0x1F,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_PWRCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_PWRCTL	= 0x1B,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_REVID	include/power/pfuze3000_pmic.h	/^	PFUZE3000_REVID		= 0x03,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1ACONF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1ACONF	= 0x24,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1AMODE	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1AMODE	= 0x23,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1AOFF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1AOFF	= 0x22,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1ASTBY	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1ASTBY	= 0x21,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1AVOLT	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1AVOLT	= 0x20,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1BCONF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1BCONF	= 0x32,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1BMODE	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1BMODE	= 0x31,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1BOFF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1BOFF	= 0x30,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1BSTBY	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1BSTBY	= 0x2F,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1BVOLT	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW1BVOLT	= 0x2E,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW1_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE3000_SW1_REG(/;"	d	file:
PFUZE3000_SW2CONF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW2CONF	= 0x39,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW2MODE	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW2MODE	= 0x38,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW2OFF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW2OFF	= 0x37,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW2STBY	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW2STBY	= 0x36,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW2VOLT	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW2VOLT	= 0x35,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW2_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE3000_SW2_REG(/;"	d	file:
PFUZE3000_SW3CONF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW3CONF	= 0x40,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW3MODE	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW3MODE	= 0x3F,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW3OFF	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW3OFF	= 0x3E,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW3STBY	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW3STBY	= 0x3D,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW3VOLT	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SW3VOLT	= 0x3C,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_SW3_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE3000_SW3_REG(/;"	d	file:
PFUZE3000_SWBSTCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_SWBSTCTL	= 0x66,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_V33CTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_V33CTL	= 0x6F,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VCC_REG	drivers/power/regulator/pfuze100.c	/^#define PFUZE3000_VCC_REG(/;"	d	file:
PFUZE3000_VCC_SDCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VCC_SDCTL	= 0x6E,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VLD4CTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VLD4CTL	= 0x71,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VLDO1CTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VLDO1CTL	= 0x6C,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VLDO2CTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VLDO2CTL	= 0x6D,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VLDO3CTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VLDO3CTL	= 0x70,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VREFDDRCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VREFDDRCTL	= 0x6A,$/;"	e	enum:__anonb14dde3f0103
PFUZE3000_VSNVSCTL	include/power/pfuze3000_pmic.h	/^	PFUZE3000_VSNVSCTL	= 0x6B,$/;"	e	enum:__anonb14dde3f0103
PF_ABICALLS	arch/mips/config.mk	/^PF_ABICALLS			:= -mabicalls$/;"	m
PF_ABICALLS	arch/mips/config.mk	/^PF_ABICALLS			:= -mno-abicalls$/;"	m
PF_CONF	drivers/video/mx3fb.c	/^#define PF_CONF	/;"	d	file:
PF_CPPFLAGS_ABI	arch/arm/config.mk	/^PF_CPPFLAGS_ABI := $(call cc-option,\\$/;"	m
PF_CPPFLAGS_ARM	arch/arm/config.mk	/^PF_CPPFLAGS_ARM		:= $(AFLAGS_IMPLICIT_IT) \\$/;"	m
PF_CPPFLAGS_ARM	arch/arm/config.mk	/^PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \\$/;"	m
PF_CPPFLAGS_POWERPC	arch/powerpc/config.mk	/^PF_CPPFLAGS_POWERPC	:= $(call cc-option,-fno-ira-hoist-pressure,)$/;"	m
PF_CPPFLAGS_X86	arch/x86/config.mk	/^PF_CPPFLAGS_X86   := $(call cc-option, -fno-toplevel-reorder, \\$/;"	m
PF_MASKOS	include/elf.h	/^#define PF_MASKOS	/;"	d
PF_MASKPROC	include/elf.h	/^#define PF_MASKPROC	/;"	d
PF_NO_UNALIGNED	arch/arm/cpu/armv7/config.mk	/^PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)$/;"	m
PF_NO_UNALIGNED	arch/arm/cpu/armv8/config.mk	/^PF_NO_UNALIGNED := $(call cc-option, -mstrict-align)$/;"	m
PF_OBJCOPY	arch/mips/config.mk	/^PF_OBJCOPY			:= -j .got -j .rel.dyn -j .padding$/;"	m
PF_PIC	arch/mips/config.mk	/^PF_PIC				:= -fno-pic$/;"	m
PF_PIC	arch/mips/config.mk	/^PF_PIC				:= -fpic$/;"	m
PF_PIE	arch/mips/config.mk	/^PF_PIE				:= -pie$/;"	m
PF_PIE	arch/mips/config.mk	/^PF_PIE				:=$/;"	m
PF_R	include/elf.h	/^#define PF_R	/;"	d
PF_TRACESYS	include/ppc_defs.h	/^#define	PF_TRACESYS	/;"	d
PF_W	include/elf.h	/^#define PF_W	/;"	d
PF_X	include/elf.h	/^#define PF_X	/;"	d
PG0	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG0	/;"	d
PG1	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG1	/;"	d
PG10	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG10	/;"	d
PG11	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG11	/;"	d
PG12	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG12	/;"	d
PG13	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG13	/;"	d
PG14	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG14	/;"	d
PG15	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG15	/;"	d
PG2	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG2	/;"	d
PG3	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG3	/;"	d
PG4	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG4	/;"	d
PG5	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG5	/;"	d
PG6	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG6	/;"	d
PG7	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG7	/;"	d
PG8	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG8	/;"	d
PG9	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define PG9	/;"	d
PGCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PGCR	/;"	d
PGCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PGCR /;"	d
PGCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PGCR /;"	d
PGCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PGCR /;"	d
PGCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PGCR	/;"	d
PGCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PGCR /;"	d	file:
PGCR2_A	board/renesas/rsk7264/lowlevel_init.S	/^PGCR2_A:	.long 0xFFFE38CA$/;"	l
PGCR2_D	board/renesas/rsk7264/lowlevel_init.S	/^PGCR2_D:	.word 0x0000$/;"	l
PGCR_A	board/espt/lowlevel_init.S	/^PGCR_A:	.long	0xFFEF000C$/;"	l
PGCR_A	board/ms7720se/lowlevel_init.S	/^PGCR_A:		.long	PFC_BASE + 0x0C$/;"	l
PGCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^PGCR_A:		.long	0xffec000c$/;"	l
PGCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PGCR_A:		.long	0xffec000c$/;"	l
PGCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PGCR_A:		.long	GPIO_BASE + 0x0c$/;"	l
PGCR_D	board/espt/lowlevel_init.S	/^PGCR_D:	.word	0x0000$/;"	l
PGCR_D	board/ms7720se/lowlevel_init.S	/^PGCR_D:		.word	0x0000$/;"	l
PGCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PGCR_D	/;"	d	file:
PGCR_D	board/renesas/sh7752evb/lowlevel_init.S	/^PGCR_D:		.long	0x0004$/;"	l
PGCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PGCR_D:		.long	0x0000$/;"	l
PGCR_DFTCMP_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGCR_DFTCMP_SHIFT	/;"	d
PGCR_DFTLMT_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGCR_DFTLMT_SHIFT	/;"	d
PGCR_DQSCFG_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGCR_DQSCFG_SHIFT	/;"	d
PGCR_ITMDMD_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGCR_ITMDMD_SHIFT	/;"	d
PGCS_CS_ASSERT_ON_READ	include/ns87308.h	/^#define PGCS_CS_ASSERT_ON_READ /;"	d
PGCS_CS_ASSERT_ON_WRITE	include/ns87308.h	/^#define PGCS_CS_ASSERT_ON_WRITE /;"	d
PGCS_DATA	include/ns87308.h	/^#define PGCS_DATA /;"	d
PGCS_INDEX	include/ns87308.h	/^#define PGCS_INDEX /;"	d
PGD	include/ppc_defs.h	/^#define	PGD	/;"	d
PGDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PGDR	/;"	d
PGDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PGDR /;"	d
PGDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PGDR /;"	d
PGDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PGDR /;"	d
PGDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PGDR	/;"	d
PGDR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PGDR_A:		.long	0xffec0040$/;"	l
PGDR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PGDR_D:		.long	0x80$/;"	l
PGID_AGGR_START	include/vsc9953.h	/^#define PGID_AGGR_START	/;"	d
PGID_DST_START	include/vsc9953.h	/^#define PGID_DST_START	/;"	d
PGID_SRC_START	include/vsc9953.h	/^#define PGID_SRC_START	/;"	d
PGIOR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PGIOR0_A:	.long 0xFFFE38D2$/;"	l
PGIOR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PGIOR0_D:	.word 0x03F0$/;"	l
PGM_CMP	include/linux/mtd/samsung_onenand.h	/^#define PGM_CMP /;"	d
PGM_FAIL	include/linux/mtd/samsung_onenand.h	/^#define PGM_FAIL /;"	d
PGRDCMPL_EVT_STAT_LP_2K	include/fsl_ifc.h	/^#define PGRDCMPL_EVT_STAT_LP_2K(/;"	d
PGRDCMPL_EVT_STAT_LP_4K	include/fsl_ifc.h	/^#define PGRDCMPL_EVT_STAT_LP_4K(/;"	d
PGRDCMPL_EVT_STAT_MASK	include/fsl_ifc.h	/^#define PGRDCMPL_EVT_STAT_MASK	/;"	d
PGRDCMPL_EVT_STAT_SECTION_SP	include/fsl_ifc.h	/^#define PGRDCMPL_EVT_STAT_SECTION_SP(/;"	d
PGRE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PGRE	/;"	d
PGSE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PGSE	/;"	d
PGSEL	drivers/net/natsemi.c	/^	PGSEL		= 0xCC,$/;"	e	enum:register_offsets	file:
PGSR	include/SA-1100.h	/^#define PGSR	/;"	d
PGSR	include/faraday/ftpmu010.h	/^	unsigned int	PGSR;		\/* 0x24 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PGSR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PGSR0	/;"	d
PGSR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PGSR1	/;"	d
PGSR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PGSR2	/;"	d
PGSR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PGSR3	/;"	d
PGSR_DFTERR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_DFTERR	/;"	d
PGSR_DIDONE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_DIDONE	/;"	d
PGSR_DLDONE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_DLDONE	/;"	d
PGSR_DTDONE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_DTDONE	/;"	d
PGSR_DTERR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_DTERR	/;"	d
PGSR_DTIERR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_DTIERR	/;"	d
PGSR_IDONE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_IDONE	/;"	d
PGSR_INIT_DONE	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PGSR_INIT_DONE	/;"	d
PGSR_INIT_DONE	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PGSR_INIT_DONE	/;"	d
PGSR_RVEIRR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_RVEIRR	/;"	d
PGSR_RVERR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_RVERR	/;"	d
PGSR_ZCDONE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PGSR_ZCDONE	/;"	d
PGSZ	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGSZ	/;"	d
PGSZ_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGSZ_4	/;"	d
PGSZ_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGSZ_8	/;"	d
PGSZ_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGSZ_P	/;"	d
PGTABLE_SIZE	arch/arm/include/asm/system.h	/^#define PGTABLE_SIZE	/;"	d
PGTE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PGTE	/;"	d
PGWS_0	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_0	/;"	d
PGWS_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_1	/;"	d
PGWS_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_2	/;"	d
PGWS_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_3	/;"	d
PGWS_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_4	/;"	d
PGWS_MASK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_MASK	/;"	d
PGWS_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PGWS_P	/;"	d
PG_ELPA	arch/mips/include/asm/mipsregs.h	/^#define PG_ELPA	/;"	d
PG_ESP	arch/mips/include/asm/mipsregs.h	/^#define PG_ESP	/;"	d
PG_IEC	arch/mips/include/asm/mipsregs.h	/^#define PG_IEC	/;"	d
PG_RD_STAT	drivers/mtd/nand/bfin_nand.c	/^#define                PG_RD_STAT /;"	d	file:
PG_RIE	arch/mips/include/asm/mipsregs.h	/^#define PG_RIE	/;"	d
PG_SHIFT	arch/powerpc/include/asm/mmu.h	/^#define PG_SHIFT /;"	d
PG_SIZE	drivers/mtd/nand/bfin_nand.c	/^#define                   PG_SIZE /;"	d	file:
PG_TABLES	include/ppc_defs.h	/^#define	PG_TABLES	/;"	d
PG_UP_TAG_0	arch/arm/include/asm/arch-tegra/ap.h	/^#define PG_UP_TAG_0	/;"	d
PG_UP_TAG_0	arch/arm/mach-tegra/cpu.h	/^#define PG_UP_TAG_0 /;"	d
PG_UP_TAG_0_PID_CPU	arch/arm/include/asm/arch-tegra/ap.h	/^#define PG_UP_TAG_0_PID_CPU	/;"	d
PG_UP_TAG_0_PID_CPU	arch/arm/mach-tegra/cpu.h	/^#define PG_UP_TAG_0_PID_CPU	/;"	d
PG_UP_TAG_AVP	arch/arm/include/asm/arch-tegra/tegra.h	/^#define PG_UP_TAG_AVP	/;"	d
PG_WR_STAT	drivers/mtd/nand/bfin_nand.c	/^#define                PG_WR_STAT /;"	d	file:
PG_XIE	arch/mips/include/asm/mipsregs.h	/^#define PG_XIE	/;"	d
PH0	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH0	/;"	d
PH1	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH1	/;"	d
PH10	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH10	/;"	d
PH11	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH11	/;"	d
PH12	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH12	/;"	d
PH13	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH13	/;"	d
PH14	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH14	/;"	d
PH15	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH15	/;"	d
PH2	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH2	/;"	d
PH3	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH3	/;"	d
PH4	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH4	/;"	d
PH5	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH5	/;"	d
PH6	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH6	/;"	d
PH7	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH7	/;"	d
PH8	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH8	/;"	d
PH9	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define PH9	/;"	d
PHASE2_EN	drivers/usb/eth/r8152.h	/^#define PHASE2_EN	/;"	d
PHASE_DATA	drivers/usb/emul/sandbox_flash.c	/^	PHASE_DATA,$/;"	e	enum:cmd_phase	file:
PHASE_DATA	drivers/usb/emul/sandbox_keyb.c	/^	PHASE_DATA,$/;"	e	enum:cmd_phase	file:
PHASE_REG_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PHASE_REG_OFFSET	/;"	d
PHASE_SHIFT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	PHASE_SHIFT,$/;"	e	enum:hws_wl_supp
PHASE_START	drivers/usb/emul/sandbox_flash.c	/^	PHASE_START,$/;"	e	enum:cmd_phase	file:
PHASE_START	drivers/usb/emul/sandbox_keyb.c	/^	PHASE_START,$/;"	e	enum:cmd_phase	file:
PHASE_STATUS	drivers/usb/emul/sandbox_flash.c	/^	PHASE_STATUS,$/;"	e	enum:cmd_phase	file:
PHASE_STATUS	drivers/usb/emul/sandbox_keyb.c	/^	PHASE_STATUS,$/;"	e	enum:cmd_phase	file:
PHCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PHCR	/;"	d
PHCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PHCR /;"	d
PHCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PHCR /;"	d
PHCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PHCR /;"	d
PHCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PHCR	/;"	d
PHCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PHCR /;"	d	file:
PHCR0_A	board/renesas/rsk7269/lowlevel_init.S	/^PHCR0_A:	.long 0xFFFE38EE$/;"	l
PHCR0_D	board/renesas/rsk7269/lowlevel_init.S	/^PHCR0_D:	.word 0x2222$/;"	l
PHCR1_A	board/renesas/rsk7269/lowlevel_init.S	/^PHCR1_A:	.long 0xFFFE38EC$/;"	l
PHCR1_D	board/renesas/rsk7269/lowlevel_init.S	/^PHCR1_D:	.word 0x2222$/;"	l
PHCR_A	board/espt/lowlevel_init.S	/^PHCR_A:	.long	0xFFEF000E$/;"	l
PHCR_A	board/ms7720se/lowlevel_init.S	/^PHCR_A:		.long	PFC_BASE + 0x0E$/;"	l
PHCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PHCR_A:		.long	0xffec000e$/;"	l
PHCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PHCR_A:		.long	GPIO_BASE + 0x0e$/;"	l
PHCR_D	board/espt/lowlevel_init.S	/^PHCR_D:	.word	0x0000$/;"	l
PHCR_D	board/ms7720se/lowlevel_init.S	/^PHCR_D:		.word	0x0000$/;"	l
PHCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PHCR_D	/;"	d	file:
PHCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PHCR_D:		.long	0x0000$/;"	l
PHCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PHCR_D:		.word	0x00c0$/;"	l
PHDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PHDR	/;"	d
PHDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PHDR /;"	d
PHDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PHDR /;"	d
PHDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PHDR /;"	d
PHDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PHDR	/;"	d
PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV	arch/arm/include/asm/arch-omap4/clock.h	/^#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV	/;"	d
PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV	arch/arm/include/asm/arch-omap4/clock.h	/^#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV	/;"	d
PHONY	Makefile	/^PHONY := _all$/;"	m
PHPUPR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PHPUPR	/;"	d
PHPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PHPUPR_A:	.long	GPIO_BASE + 0x4e$/;"	l
PHPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PHPUPR_D:	.long	0x00$/;"	l
PHSEL_VAL	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PHSEL_VAL	/;"	d
PHY	include/mv88e6352.h	/^#define PHY(/;"	d
PHY Subsystem	drivers/usb/dwc3/Kconfig	/^menu "PHY Subsystem"$/;"	m
PHY0_SLEEP	include/usb/dwc2_udc.h	/^#define PHY0_SLEEP /;"	d
PHYAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PHYAD	/;"	d
PHYAD0	board/bf609-ezkit/soft_switch.h	/^#define PHYAD0 /;"	d
PHYADDR	board/renesas/sh7753evb/spi-boot.c	/^#define PHYADDR(/;"	d	file:
PHYADR_MASK	drivers/net/mvgbe.h	/^#define PHYADR_MASK	/;"	d
PHYAR	drivers/net/rtl8169.c	/^	PHYAR = 0x60,$/;"	e	enum:RTL8169_registers	file:
PHYAR_FLAG	drivers/usb/eth/r8152.h	/^#define PHYAR_FLAG	/;"	d
PHYBATCHG_UTMI_CLKSEL	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYBATCHG_UTMI_CLKSEL	/;"	d
PHYCLKRST_COMMONONN	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_COMMONONN	/;"	d
PHYCLKRST_FSEL	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_FSEL(/;"	d
PHYCLKRST_FSEL_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_FSEL_MASK	/;"	d
PHYCLKRST_FSEL_PAD_100MHZ	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_FSEL_PAD_100MHZ	/;"	d
PHYCLKRST_FSEL_PAD_19_2MHZ	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_FSEL_PAD_19_2MHZ	/;"	d
PHYCLKRST_FSEL_PAD_20MHZ	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_FSEL_PAD_20MHZ	/;"	d
PHYCLKRST_FSEL_PAD_24MHZ	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_FSEL_PAD_24MHZ	/;"	d
PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF	/;"	d
PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF	/;"	d
PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF	/;"	d
PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF	/;"	d
PHYCLKRST_MPLL_MULTIPLIER_50M_REF	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_MPLL_MULTIPLIER_50M_REF	/;"	d
PHYCLKRST_MPLL_MULTIPLIER_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_MPLL_MULTIPLIER_MASK	/;"	d
PHYCLKRST_PORTRESET	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_PORTRESET	/;"	d
PHYCLKRST_REFCLKSEL_EXT_REFCLK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_REFCLKSEL_EXT_REFCLK	/;"	d
PHYCLKRST_REFCLKSEL_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_REFCLKSEL_MASK	/;"	d
PHYCLKRST_REFCLKSEL_PAD_REFCLK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_REFCLKSEL_PAD_REFCLK	/;"	d
PHYCLKRST_REF_CLKDIV2	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_REF_CLKDIV2	/;"	d
PHYCLKRST_REF_SSP_EN	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_REF_SSP_EN	/;"	d
PHYCLKRST_RETENABLEN	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_RETENABLEN	/;"	d
PHYCLKRST_SSC_EN	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_SSC_EN	/;"	d
PHYCLKRST_SSC_RANGE	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_SSC_RANGE(/;"	d
PHYCLKRST_SSC_RANGE_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_SSC_RANGE_MASK	/;"	d
PHYCLKRST_SSC_REFCLKSEL	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_SSC_REFCLKSEL(/;"	d
PHYCLKRST_SSC_REFCLKSEL_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYCLKRST_SSC_REFCLKSEL_MASK	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX0_SYMBOL_USER	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_RX1_SYMBOL_USER	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_RX1_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_UFS20_TX0_SYMBOL_USER	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_UFS20_TX0_SYMBOL_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	include/dt-bindings/clock/exynos7420-clk.h	/^#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER	/;"	d
PHYCR_ADDR_SHIFT	drivers/net/ftmac110.h	/^#define PHYCR_ADDR_SHIFT /;"	d
PHYCR_READ	drivers/net/ftmac110.h	/^#define PHYCR_READ /;"	d
PHYCR_REG_SHIFT	drivers/net/ftmac110.h	/^#define PHYCR_REG_SHIFT /;"	d
PHYCR_WRITE	drivers/net/ftmac110.h	/^#define PHYCR_WRITE /;"	d
PHYCTRLCFG_FPRFTI_MASK	drivers/block/fsl_sata.h	/^#define PHYCTRLCFG_FPRFTI_MASK	/;"	d
PHYCTRLCFG_LOOPBACK_MASK	drivers/block/fsl_sata.h	/^#define PHYCTRLCFG_LOOPBACK_MASK	/;"	d
PHYCTRL_BSEN	include/usb/ehci-ci.h	/^#define PHYCTRL_BSEN	/;"	d
PHYCTRL_BSENH	include/usb/ehci-ci.h	/^#define PHYCTRL_BSENH	/;"	d
PHYCTRL_LSFE	include/usb/ehci-ci.h	/^#define PHYCTRL_LSFE	/;"	d
PHYCTRL_PHYE	include/usb/ehci-ci.h	/^#define PHYCTRL_PHYE	/;"	d
PHYCTRL_PXE	include/usb/ehci-ci.h	/^#define PHYCTRL_PXE	/;"	d
PHYC_RGMII_HD	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RGMII_HD	/;"	d
PHYC_RGMII_LINK	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RGMII_LINK	/;"	d
PHYC_RLSPD_10	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RLSPD_10	/;"	d
PHYC_RLSPD_100	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RLSPD_100	/;"	d
PHYC_RLSPD_1000	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RLSPD_1000	/;"	d
PHYC_RLSPD_MASK	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RLSPD_MASK	/;"	d
PHYC_RLSPD_POS	drivers/net/xilinx_ll_temac.h	/^#define PHYC_RLSPD_POS	/;"	d
PHYC_SLSPD_10	drivers/net/xilinx_ll_temac.h	/^#define PHYC_SLSPD_10	/;"	d
PHYC_SLSPD_100	drivers/net/xilinx_ll_temac.h	/^#define PHYC_SLSPD_100	/;"	d
PHYC_SLSPD_1000	drivers/net/xilinx_ll_temac.h	/^#define PHYC_SLSPD_1000	/;"	d
PHYC_SLSPD_MASK	drivers/net/xilinx_ll_temac.h	/^#define PHYC_SLSPD_MASK	/;"	d
PHYC_SLSPD_POS	drivers/net/xilinx_ll_temac.h	/^#define PHYC_SLSPD_POS	/;"	d
PHYIDR1	drivers/net/ns8382x.c	/^	PHYIDR1 = 0x02,$/;"	e	enum:phy_reg_offsets	file:
PHYIDR2	drivers/net/ns8382x.c	/^	PHYIDR2 = 0x03,$/;"	e	enum:phy_reg_offsets	file:
PHYIE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PHYIE	/;"	d
PHYINT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PHYINT	/;"	d
PHYINT_EN	board/bf609-ezkit/soft_switch.h	/^#define PHYINT_EN /;"	d
PHYLIB	drivers/net/Kconfig	/^config PHYLIB$/;"	c
PHYLNK_SW_RST	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PHYLNK_SW_RST /;"	d
PHYPARAM0_REF_LOSLEVEL	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYPARAM0_REF_LOSLEVEL	/;"	d
PHYPARAM0_REF_LOSLEVEL_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYPARAM0_REF_LOSLEVEL_MASK	/;"	d
PHYPARAM0_REF_USE_PAD	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYPARAM0_REF_USE_PAD	/;"	d
PHYPARAM1_PCS_TXDEEMPH	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYPARAM1_PCS_TXDEEMPH	/;"	d
PHYPARAM1_PCS_TXDEEMPH_MASK	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYPARAM1_PCS_TXDEEMPH_MASK	/;"	d
PHYPWD	drivers/usb/phy/twl4030.c	/^#define PHYPWD	/;"	d	file:
PHYPWR_NORMAL_MASK_HSIC0	arch/arm/mach-exynos/include/mach/ehci.h	/^#define PHYPWR_NORMAL_MASK_HSIC0 /;"	d
PHYPWR_NORMAL_MASK_HSIC1	arch/arm/mach-exynos/include/mach/ehci.h	/^#define PHYPWR_NORMAL_MASK_HSIC1 /;"	d
PHYPWR_NORMAL_MASK_PHY0	arch/arm/mach-exynos/include/mach/ehci.h	/^#define PHYPWR_NORMAL_MASK_PHY0 /;"	d
PHYPWR_NORMAL_MASK_PHY1	arch/arm/mach-exynos/include/mach/ehci.h	/^#define PHYPWR_NORMAL_MASK_PHY1 /;"	d
PHYRDPHASE	arch/blackfin/cpu/initcode.c	/^#define PHYRDPHASE /;"	d	file:
PHYRDPHASE_OFFSET	arch/blackfin/cpu/initcode.c	/^#define PHYRDPHASE_OFFSET /;"	d	file:
PHYREG_CONTROL	board/gdsys/405ep/io.c	/^#define PHYREG_CONTROL	/;"	d	file:
PHYREG_CONTROL	board/gdsys/405ex/io64.c	/^#define PHYREG_CONTROL	/;"	d	file:
PHYREG_MASK	drivers/net/mvgbe.h	/^#define PHYREG_MASK	/;"	d
PHYREG_PAGE_ADDRESS	board/gdsys/405ep/io.c	/^#define PHYREG_PAGE_ADDRESS	/;"	d	file:
PHYREG_PAGE_ADDRESS	board/gdsys/405ex/io64.c	/^#define PHYREG_PAGE_ADDRESS	/;"	d	file:
PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1	board/gdsys/405ep/io.c	/^#define PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1	/;"	d	file:
PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1	board/gdsys/405ex/io64.c	/^#define PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1	/;"	d	file:
PHYREG_PG2_COPPER_SPECIFIC_CONTROL_2	board/gdsys/405ep/io.c	/^#define PHYREG_PG2_COPPER_SPECIFIC_CONTROL_2	/;"	d	file:
PHYREG_PG2_COPPER_SPECIFIC_CONTROL_2	board/gdsys/405ex/io64.c	/^#define PHYREG_PG2_COPPER_SPECIFIC_CONTROL_2	/;"	d	file:
PHYREG_PG2_MAC_SPECIFIC_CONTROL	board/gdsys/405ex/io64.c	/^#define PHYREG_PG2_MAC_SPECIFIC_CONTROL	/;"	d	file:
PHYREG_PG2_MAC_SPECIFIC_STATUS_1	board/gdsys/405ex/io64.c	/^#define PHYREG_PG2_MAC_SPECIFIC_STATUS_1	/;"	d	file:
PHYRST_VAL	arch/arm/mach-keystone/ddr3_spd.c	/^#define PHYRST_VAL	/;"	d	file:
PHYSADDR	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define PHYSADDR(/;"	d
PHYSADDR	arch/m68k/lib/bootm.c	/^#define PHYSADDR(/;"	d	file:
PHYSADDR	arch/xtensa/include/asm/addrspace.h	/^#define PHYSADDR(/;"	d
PHYSEL	drivers/usb/musb-new/omap2430.h	/^#	define	PHYSEL	/;"	d
PHYSICAL_LINK_STATUS	drivers/usb/eth/asix88179.c	/^#define PHYSICAL_LINK_STATUS	/;"	d	file:
PHYS_64BIT	Kconfig	/^config PHYS_64BIT$/;"	c	menu:General setup
PHYS_DRAM_1	include/configs/siemens-am33x-common.h	/^#define PHYS_DRAM_1	/;"	d
PHYS_DRAM_1	include/configs/ti816x_evm.h	/^#define PHYS_DRAM_1	/;"	d
PHYS_DRAM_1_SIZE	include/configs/ti814x_evm.h	/^#define PHYS_DRAM_1_SIZE	/;"	d
PHYS_DRAM_1_SIZE	include/configs/ti816x_evm.h	/^#define PHYS_DRAM_1_SIZE /;"	d
PHYS_DRAM_2	include/configs/ti816x_evm.h	/^#define PHYS_DRAM_2	/;"	d
PHYS_DRAM_2_SIZE	include/configs/ti816x_evm.h	/^#define PHYS_DRAM_2_SIZE	/;"	d
PHYS_FLASH_1	board/cobra5272/flash.c	/^#define PHYS_FLASH_1 /;"	d	file:
PHYS_FLASH_1	include/configs/VCMA9.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/adp-ag101p.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/at91rm9200ek.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/at91sam9263ek.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/colibri_pxa270.h	/^#define	PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/dbau1x00.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/edb93xx.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/imx27lite-common.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/pb1x00.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/pm9261.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/pm9263.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/smdk2410.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_1	include/configs/zipitz2.h	/^#define PHYS_FLASH_1	/;"	d
PHYS_FLASH_2	include/configs/dbau1x00.h	/^#define PHYS_FLASH_2	/;"	d
PHYS_FLASH_2	include/configs/pb1x00.h	/^#define PHYS_FLASH_2	/;"	d
PHYS_FLASH_SECT_SIZE	include/configs/gr_cpci_ax2000.h	/^#define PHYS_FLASH_SECT_SIZE	/;"	d
PHYS_FLASH_SECT_SIZE	include/configs/gr_ep2s60.h	/^#define PHYS_FLASH_SECT_SIZE	/;"	d
PHYS_FLASH_SECT_SIZE	include/configs/gr_xc3s_1500.h	/^#define PHYS_FLASH_SECT_SIZE	/;"	d
PHYS_FLASH_SECT_SIZE	include/configs/grsim.h	/^#define PHYS_FLASH_SECT_SIZE	/;"	d
PHYS_FLASH_SECT_SIZE	include/configs/grsim_leon2.h	/^#define PHYS_FLASH_SECT_SIZE	/;"	d
PHYS_FLASH_SECT_SIZE	include/configs/zipitz2.h	/^#define PHYS_FLASH_SECT_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/at91rm9200ek.h	/^#define PHYS_FLASH_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/calimain.h	/^#define PHYS_FLASH_SIZE /;"	d
PHYS_FLASH_SIZE	include/configs/colibri_pxa270.h	/^#define	PHYS_FLASH_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/da850evm.h	/^#define PHYS_FLASH_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/integratorcp.h	/^#define PHYS_FLASH_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/omapl138_lcdk.h	/^#define PHYS_FLASH_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/vexpress_common.h	/^#define PHYS_FLASH_SIZE	/;"	d
PHYS_FLASH_SIZE	include/configs/zipitz2.h	/^#define PHYS_FLASH_SIZE	/;"	d
PHYS_HIGH_TO_BX	include/configs/MPC8641HPCN.h	/^#define PHYS_HIGH_TO_BX(/;"	d
PHYS_HIGH_TO_BXPN	include/configs/MPC8641HPCN.h	/^#define PHYS_HIGH_TO_BXPN(/;"	d
PHYS_OFFSET	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define PHYS_OFFSET	/;"	d
PHYS_OFFSET	arch/mips/include/asm/mach-generic/spaces.h	/^#define PHYS_OFFSET	/;"	d
PHYS_PCI_CONFIG_BASE	board/armltd/integrator/pci.c	/^#define PHYS_PCI_CONFIG_BASE	/;"	d	file:
PHYS_PCI_IO_BASE	board/armltd/integrator/pci.c	/^#define PHYS_PCI_IO_BASE	/;"	d	file:
PHYS_PCI_MEM_BASE	board/armltd/integrator/pci.c	/^#define PHYS_PCI_MEM_BASE	/;"	d	file:
PHYS_PCI_V3_BASE	board/armltd/integrator/pci.c	/^#define PHYS_PCI_V3_BASE	/;"	d	file:
PHYS_PRESENCE	cmd/tpm_test.c	/^#define PHYS_PRESENCE	/;"	d	file:
PHYS_PSRAM	include/configs/pm9263.h	/^#define	PHYS_PSRAM	/;"	d
PHYS_PSRAM_SIZE	include/configs/pm9263.h	/^#define	PHYS_PSRAM_SIZE	/;"	d
PHYS_SDRAM	include/configs/advantech_dms-ba16.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/aristainetos-common.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/cgtqmx6eval.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/colibri_imx7.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/colibri_vf.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/el6x_common.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/embestmx6boards.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/ge_bx50v3.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/gw_ventana.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/imx6qdl_icore.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/kzm9g.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/ls1021atwr.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/meesc.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx6qarm2.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx6sabre_common.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/mx6slevk.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx6sxsabreauto.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx6sxsabresd.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx6ul_14x14_evk.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx6ullevk.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/mx7dsabresd.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/nitrogen6x.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/novena.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/ot1200.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/pcm052.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/pcm058.h	/^#define PHYS_SDRAM /;"	d
PHYS_SDRAM	include/configs/pico-imx6ul.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/platinum.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/pm9261.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/pm9263.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/pm9g45.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/s32v234evb.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/secomx6quq7.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/titanium.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/tqma6.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/udoo.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/usbarmory.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/vf610twr.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/wandboard.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/warp.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/warp7.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/xpress.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM	include/configs/zmx25.h	/^#define PHYS_SDRAM	/;"	d
PHYS_SDRAM_0	include/configs/adp-ag101p.h	/^#define PHYS_SDRAM_0	/;"	d
PHYS_SDRAM_0	include/configs/sunxi-common.h	/^#define PHYS_SDRAM_0	/;"	d
PHYS_SDRAM_0_SIZE	include/configs/adp-ag101p.h	/^#define PHYS_SDRAM_0_SIZE	/;"	d
PHYS_SDRAM_0_SIZE	include/configs/sunxi-common.h	/^#define PHYS_SDRAM_0_SIZE	/;"	d
PHYS_SDRAM_1	include/configs/VCMA9.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/adp-ag101p.h	/^#define PHYS_SDRAM_1 /;"	d
PHYS_SDRAM_1	include/configs/am3517_crane.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/am3517_evm.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/apf27.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/apx4devkit.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/bg0900.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/calimain.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/cm_fx6.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/cm_t35.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/cm_t3517.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/colibri_pxa270.h	/^#define	PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/da850evm.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/dragonboard410c.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/ea20.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/edb93xx.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/flea3.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/h2200.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/hikey.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/imx27lite-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/imx31_phycore.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/integrator-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/ipam390.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/legoev3.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/m28evk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/m53evk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mcx.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx23_olinuxino.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx23evk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx25pdk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx28evk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx31ads.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx31pdk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx35pdk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx51evk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx53ard.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx53evk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx53loco.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/mx53smd.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/nokia_rx51.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/odroid.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/omap3_evm.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/omapl138_lcdk.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/origen.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/picosam9g45.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/s5p_goni.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/s5pc210_universal.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/sansa_fuze_plus.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/sc_sps_1.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/smdk2410.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/smdkc100.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/smdkv310.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/sniper.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/socfpga_common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/spear-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/stv0991.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/tam3517-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/tao3530.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/tegra-common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/thunderx_88xx.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/ti_omap3_common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/trats.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/trats2.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/tricorder.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/ts4800.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/vexpress_aemv8a.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/vexpress_common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/woodburn_common.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/x600.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/xfi3.h	/^#define PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1	include/configs/zipitz2.h	/^#define	PHYS_SDRAM_1	/;"	d
PHYS_SDRAM_1_MAXSIZE	include/configs/spear-common.h	/^#define PHYS_SDRAM_1_MAXSIZE	/;"	d
PHYS_SDRAM_1_MAXSIZE	include/configs/x600.h	/^#define PHYS_SDRAM_1_MAXSIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/adp-ag101p.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/apf27.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/apx4devkit.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/bg0900.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/calimain.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/colibri_pxa270.h	/^#define	PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/da850evm.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/dragonboard410c.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/ea20.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/flea3.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/h2200.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/highbank.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/hikey.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/imx27lite-common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/imx31_phycore.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/integrator-common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/ipam390.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/legoev3.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/m28evk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/m53evk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx23_olinuxino.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx23evk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx25pdk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx28evk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx31ads.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx31pdk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx35pdk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx51evk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx53ard.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx53evk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx53loco.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/mx53smd.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/omapl138_lcdk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/picosam9g45.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/s5p_goni.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/sansa_fuze_plus.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/sc_sps_1.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/smdk2410.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/smdkc100.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/smdkv310.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_arria5_socdk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_cyclone5_socdk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_de0_nano_soc.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_is1.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_mcvevk.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_sockit.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_socrates.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_sr1500.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/socfpga_vining_fpga.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/stv0991.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/tao3530.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/tegra-common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/thunderx_88xx.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/ts4800.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/vexpress_aemv8a.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/vexpress_common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/woodburn_common.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/xfi3.h	/^#define PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_1_SIZE	include/configs/zipitz2.h	/^#define	PHYS_SDRAM_1_SIZE	/;"	d
PHYS_SDRAM_2	include/configs/am3517_crane.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/am3517_evm.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/apf27.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/cm_fx6.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/m53evk.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/mcx.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/mx35pdk.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/mx53ard.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/mx53loco.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/mx53smd.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/omap3_evm.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/picosam9g45.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/s5p_goni.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/smdkv310.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/sniper.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/tam3517-common.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/tao3530.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/ti_omap3_common.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/tricorder.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/vexpress_aemv8a.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2	include/configs/vexpress_common.h	/^#define PHYS_SDRAM_2	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/apf27.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/m53evk.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/mx35pdk.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/mx53ard.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/mx53loco.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/mx53smd.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/picosam9g45.h	/^#define PHYS_SDRAM_2_SIZE /;"	d
PHYS_SDRAM_2_SIZE	include/configs/s5p_goni.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/smdkv310.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/vexpress_aemv8a.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_2_SIZE	include/configs/vexpress_common.h	/^#define PHYS_SDRAM_2_SIZE	/;"	d
PHYS_SDRAM_3	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_3	/;"	d
PHYS_SDRAM_3	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_3	/;"	d
PHYS_SDRAM_3	include/configs/s5p_goni.h	/^#define PHYS_SDRAM_3	/;"	d
PHYS_SDRAM_3	include/configs/smdkv310.h	/^#define PHYS_SDRAM_3	/;"	d
PHYS_SDRAM_3_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_3_SIZE	/;"	d
PHYS_SDRAM_3_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_3_SIZE	/;"	d
PHYS_SDRAM_3_SIZE	include/configs/s5p_goni.h	/^#define PHYS_SDRAM_3_SIZE	/;"	d
PHYS_SDRAM_3_SIZE	include/configs/smdkv310.h	/^#define PHYS_SDRAM_3_SIZE	/;"	d
PHYS_SDRAM_4	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_4	/;"	d
PHYS_SDRAM_4	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_4	/;"	d
PHYS_SDRAM_4	include/configs/smdkv310.h	/^#define PHYS_SDRAM_4	/;"	d
PHYS_SDRAM_4_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_4_SIZE	/;"	d
PHYS_SDRAM_4_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_4_SIZE	/;"	d
PHYS_SDRAM_4_SIZE	include/configs/smdkv310.h	/^#define PHYS_SDRAM_4_SIZE	/;"	d
PHYS_SDRAM_5	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_5	/;"	d
PHYS_SDRAM_5	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_5	/;"	d
PHYS_SDRAM_5_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_5_SIZE	/;"	d
PHYS_SDRAM_5_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_5_SIZE	/;"	d
PHYS_SDRAM_6	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_6	/;"	d
PHYS_SDRAM_6	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_6	/;"	d
PHYS_SDRAM_6_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_6_SIZE	/;"	d
PHYS_SDRAM_6_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_6_SIZE	/;"	d
PHYS_SDRAM_7	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_7	/;"	d
PHYS_SDRAM_7	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_7	/;"	d
PHYS_SDRAM_7_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_7_SIZE	/;"	d
PHYS_SDRAM_7_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_7_SIZE	/;"	d
PHYS_SDRAM_8	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_8	/;"	d
PHYS_SDRAM_8	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_8	/;"	d
PHYS_SDRAM_8_SIZE	include/configs/exynos5-common.h	/^#define PHYS_SDRAM_8_SIZE	/;"	d
PHYS_SDRAM_8_SIZE	include/configs/exynos7420-common.h	/^#define PHYS_SDRAM_8_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/colibri_imx7.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/colibri_vf.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/embestmx6boards.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/kzm9g.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/ls1021atwr.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/m53evk.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/meesc.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/mx53ard.h	/^#define PHYS_SDRAM_SIZE /;"	d
PHYS_SDRAM_SIZE	include/configs/mx53loco.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/mx53smd.h	/^#define PHYS_SDRAM_SIZE /;"	d
PHYS_SDRAM_SIZE	include/configs/mx6ullevk.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/mx7dsabresd.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/pcm052.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/pcm058.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/platinum.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/platinum_titanium.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/pm9261.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/pm9263.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/pm9g45.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/s32v234evb.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/secomx6quq7.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/titanium.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/tqma6.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/usbarmory.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/vf610twr.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/warp7.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/xpress.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SDRAM_SIZE	include/configs/zmx25.h	/^#define PHYS_SDRAM_SIZE	/;"	d
PHYS_SRAM	include/configs/zipitz2.h	/^#define	PHYS_SRAM	/;"	d
PHYS_SRAM_SIZE	include/configs/zipitz2.h	/^#define	PHYS_SRAM_SIZE	/;"	d
PHYS_TO_BUS	drivers/Kconfig	/^config PHYS_TO_BUS$/;"	c	menu:Device Drivers
PHYS_TO_COMPATK1	arch/mips/include/asm/addrspace.h	/^#define PHYS_TO_COMPATK1(/;"	d
PHYS_TO_K0	arch/mips/include/asm/addrspace.h	/^#define PHYS_TO_K0(/;"	d
PHYS_TO_NID	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define PHYS_TO_NID(/;"	d
PHYS_TO_XKPHYS	arch/mips/include/asm/addrspace.h	/^#define PHYS_TO_XKPHYS(/;"	d
PHYS_TO_XKSEG_CACHED	arch/mips/include/asm/addrspace.h	/^#define PHYS_TO_XKSEG_CACHED(/;"	d
PHYS_TO_XKSEG_UNCACHED	arch/mips/include/asm/addrspace.h	/^#define PHYS_TO_XKSEG_UNCACHED(/;"	d
PHYTEST_POWERDOWN_HSP	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYTEST_POWERDOWN_HSP	/;"	d
PHYTEST_POWERDOWN_SSP	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYTEST_POWERDOWN_SSP	/;"	d
PHYTMSR_TST_JSTA	include/usb/fotg210.h	/^#define PHYTMSR_TST_JSTA /;"	d
PHYTMSR_TST_KSTA	include/usb/fotg210.h	/^#define PHYTMSR_TST_KSTA /;"	d
PHYTMSR_TST_PKT	include/usb/fotg210.h	/^#define PHYTMSR_TST_PKT /;"	d
PHYTMSR_TST_SE0NAK	include/usb/fotg210.h	/^#define PHYTMSR_TST_SE0NAK /;"	d
PHYTMSR_UNPLUG	include/usb/fotg210.h	/^#define PHYTMSR_UNPLUG /;"	d
PHYUTMI_FORCESLEEP	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYUTMI_FORCESLEEP	/;"	d
PHYUTMI_FORCESUSPEND	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYUTMI_FORCESUSPEND	/;"	d
PHYUTMI_OTGDISABLE	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define PHYUTMI_OTGDISABLE	/;"	d
PHYWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define PHYWE	/;"	d
PHY_0_SLEEP	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PHY_0_SLEEP /;"	d
PHY_1000BTCR_1000FD	include/miiphy.h	/^#define PHY_1000BTCR_1000FD	/;"	d
PHY_1000BTCR_1000HD	include/miiphy.h	/^#define PHY_1000BTCR_1000HD	/;"	d
PHY_1000BTSR_1000FD	include/miiphy.h	/^#define PHY_1000BTSR_1000FD	/;"	d
PHY_1000BTSR_1000HD	include/miiphy.h	/^#define PHY_1000BTSR_1000HD	/;"	d
PHY_1000BTSR_LRS	include/miiphy.h	/^#define PHY_1000BTSR_LRS	/;"	d
PHY_1000BTSR_MSCF	include/miiphy.h	/^#define PHY_1000BTSR_MSCF	/;"	d
PHY_1000BTSR_MSCR	include/miiphy.h	/^#define PHY_1000BTSR_MSCR	/;"	d
PHY_1000BTSR_RRS	include/miiphy.h	/^#define PHY_1000BTSR_RRS	/;"	d
PHY_1000BT_FEATURES	include/phy.h	/^#define PHY_1000BT_FEATURES	/;"	d
PHY_1000T_CTRL	drivers/net/e1000.h	/^#define PHY_1000T_CTRL	/;"	d
PHY_1000T_CTRL_REG	drivers/net/tsi108_eth.c	/^#define PHY_1000T_CTRL_REG	/;"	d	file:
PHY_1000T_STATUS	drivers/net/e1000.h	/^#define PHY_1000T_STATUS	/;"	d
PHY_1000T_STATUS_REG	drivers/net/tsi108_eth.c	/^#define PHY_1000T_STATUS_REG	/;"	d	file:
PHY_1000_CTRL	include/mv88e6352.h	/^#define PHY_1000_CTRL	/;"	d
PHY_1000_CTRL_REG	drivers/net/rtl8169.c	/^	PHY_1000_CTRL_REG = 9,$/;"	e	enum:RTL8169_register_content	file:
PHY_100BT_FEATURES	include/phy.h	/^#define PHY_100BT_FEATURES	/;"	d
PHY_100_MBPS	include/mv88e6352.h	/^#define PHY_100_MBPS	/;"	d
PHY_10BT_FEATURES	include/phy.h	/^#define PHY_10BT_FEATURES	/;"	d
PHY_10G_FEATURES	include/phy.h	/^#define PHY_10G_FEATURES	/;"	d
PHY_1_GBPS	include/mv88e6352.h	/^#define PHY_1_GBPS	/;"	d
PHY_ACBDLR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ACBDLR	/;"	d
PHY_ACBD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_ACBD_MASK	/;"	d	file:
PHY_ACIOCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ACIOCR	/;"	d
PHY_ACMDLR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ACMDLR	/;"	d
PHY_ADDR_MASK	drivers/net/ax88180.h	/^  #define PHY_ADDR_MASK	/;"	d
PHY_ADR_REQ	drivers/net/armada100_fec.c	/^#define  PHY_ADR_REQ /;"	d	file:
PHY_AD_10_FDX	drivers/net/smc91111.h	/^#define PHY_AD_10_FDX	/;"	d
PHY_AD_10_HDX	drivers/net/smc91111.h	/^#define PHY_AD_10_HDX	/;"	d
PHY_AD_ACK	drivers/net/smc91111.h	/^#define PHY_AD_ACK	/;"	d
PHY_AD_CSMA	drivers/net/smc91111.h	/^#define PHY_AD_CSMA	/;"	d
PHY_AD_NP	drivers/net/smc91111.h	/^#define PHY_AD_NP	/;"	d
PHY_AD_REG	drivers/net/smc91111.h	/^#define PHY_AD_REG	/;"	d
PHY_AD_RF	drivers/net/smc91111.h	/^#define PHY_AD_RF	/;"	d
PHY_AD_T4	drivers/net/smc91111.h	/^#define PHY_AD_T4	/;"	d
PHY_AD_TX_FDX	drivers/net/smc91111.h	/^#define PHY_AD_TX_FDX	/;"	d
PHY_AD_TX_HDX	drivers/net/smc91111.h	/^#define PHY_AD_TX_HDX	/;"	d
PHY_ANEG_TIMEOUT	include/configs/am43xx_evm.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/am57xx_evm.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/clearfog.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/db-88f6720.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/db-88f6820-amc.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/db-88f6820-gp.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/db-mv784mp-gp.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/k2g_evm.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/maxbcm.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/socfpga_sr1500.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/theadorable.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANEG_TIMEOUT	include/configs/xilinx_zynqmp.h	/^# define PHY_ANEG_TIMEOUT /;"	d
PHY_ANEG_TIMEOUT	include/phy.h	/^#define PHY_ANEG_TIMEOUT	/;"	d
PHY_ANLPAR_PSB_802_3	include/miiphy.h	/^#define PHY_ANLPAR_PSB_802_3	/;"	d
PHY_ANLPAR_PSB_802_9	include/miiphy.h	/^#define PHY_ANLPAR_PSB_802_9	/;"	d
PHY_AN_ADV_REG	drivers/net/tsi108_eth.c	/^#define PHY_AN_ADV_REG	/;"	d	file:
PHY_AUTONEGOTIATE_TIMEOUT	drivers/net/4xx_enet.c	/^#define PHY_AUTONEGOTIATE_TIMEOUT /;"	d	file:
PHY_AUTONEGOTIATE_TIMEOUT	drivers/net/phy/marvell.c	/^#define PHY_AUTONEGOTIATE_TIMEOUT /;"	d	file:
PHY_AUTONEGOTIATE_TIMEOUT	drivers/net/phy/mv88e61xx.c	/^#define PHY_AUTONEGOTIATE_TIMEOUT	/;"	d	file:
PHY_AUTONEGOTIATE_TIMEOUT	drivers/net/phy/realtek.c	/^#define PHY_AUTONEGOTIATE_TIMEOUT /;"	d	file:
PHY_AUTONEG_ADV	drivers/net/e1000.h	/^#define PHY_AUTONEG_ADV	/;"	d
PHY_AUTONEG_EXP	drivers/net/e1000.h	/^#define PHY_AUTONEG_EXP	/;"	d
PHY_AUTONEG_EXP_REG	drivers/net/tsi108_eth.c	/^#define PHY_AUTONEG_EXP_REG	/;"	d	file:
PHY_AUTO_NEGO_REG	drivers/net/rtl8169.c	/^	PHY_AUTO_NEGO_REG = 4,$/;"	e	enum:RTL8169_register_content	file:
PHY_AUTO_NEG_TIME	drivers/net/e1000.h	/^#define PHY_AUTO_NEG_TIME	/;"	d
PHY_Auto_Nego_Comp	drivers/net/rtl8169.c	/^	PHY_Auto_Nego_Comp = 0x0020,$/;"	e	enum:RTL8169_register_content	file:
PHY_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_BASE(/;"	d
PHY_BASE_ADDR	board/freescale/b4860qds/b4860qds_qixis.h	/^#define PHY_BASE_ADDR	/;"	d
PHY_BASE_ADDR	board/freescale/corenet_ds/eth_hydra.c	/^#define PHY_BASE_ADDR	/;"	d	file:
PHY_BASE_ADDR	board/freescale/corenet_ds/eth_p4080.c	/^#define PHY_BASE_ADDR	/;"	d	file:
PHY_BASE_ADDR	board/freescale/corenet_ds/eth_superhydra.c	/^#define PHY_BASE_ADDR	/;"	d	file:
PHY_BASE_ADDR_SLOT5	board/freescale/corenet_ds/eth_p4080.c	/^#define PHY_BASE_ADDR_SLOT5	/;"	d	file:
PHY_BASE_ADR	drivers/net/mvgbe.h	/^#define PHY_BASE_ADR	/;"	d
PHY_BASIC_FEATURES	include/phy.h	/^#define PHY_BASIC_FEATURES	/;"	d
PHY_BITLVL_DLY_WIDTH	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_BITLVL_DLY_WIDTH	/;"	d
PHY_CFG1_BYPSCR	drivers/net/smc91111.h	/^#define PHY_CFG1_BYPSCR	/;"	d
PHY_CFG1_CABLE	drivers/net/smc91111.h	/^#define PHY_CFG1_CABLE	/;"	d
PHY_CFG1_EQLZR	drivers/net/smc91111.h	/^#define PHY_CFG1_EQLZR	/;"	d
PHY_CFG1_LNKDIS	drivers/net/smc91111.h	/^#define PHY_CFG1_LNKDIS	/;"	d
PHY_CFG1_REG	drivers/net/smc91111.h	/^#define PHY_CFG1_REG	/;"	d
PHY_CFG1_RLVL0	drivers/net/smc91111.h	/^#define PHY_CFG1_RLVL0	/;"	d
PHY_CFG1_TLVL_MASK	drivers/net/smc91111.h	/^#define PHY_CFG1_TLVL_MASK	/;"	d
PHY_CFG1_TLVL_SHIFT	drivers/net/smc91111.h	/^#define PHY_CFG1_TLVL_SHIFT	/;"	d
PHY_CFG1_TRF_MASK	drivers/net/smc91111.h	/^#define PHY_CFG1_TRF_MASK	/;"	d
PHY_CFG1_UNSCDS	drivers/net/smc91111.h	/^#define PHY_CFG1_UNSCDS	/;"	d
PHY_CFG1_XMTDIS	drivers/net/smc91111.h	/^#define PHY_CFG1_XMTDIS	/;"	d
PHY_CFG1_XMTPDN	drivers/net/smc91111.h	/^#define PHY_CFG1_XMTPDN	/;"	d
PHY_CFG2_APOLDIS	drivers/net/smc91111.h	/^#define PHY_CFG2_APOLDIS	/;"	d
PHY_CFG2_INTMDIO	drivers/net/smc91111.h	/^#define PHY_CFG2_INTMDIO	/;"	d
PHY_CFG2_JABDIS	drivers/net/smc91111.h	/^#define PHY_CFG2_JABDIS	/;"	d
PHY_CFG2_MREG	drivers/net/smc91111.h	/^#define PHY_CFG2_MREG	/;"	d
PHY_CFG2_REG	drivers/net/smc91111.h	/^#define PHY_CFG2_REG	/;"	d
PHY_CFG_TIMEOUT	drivers/net/e1000.h	/^#define PHY_CFG_TIMEOUT /;"	d
PHY_CHANNEL_RX_CTRL0_REG	board/theadorable/theadorable.c	/^#define PHY_CHANNEL_RX_CTRL0_REG(/;"	d	file:
PHY_CK0BD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_CK0BD_MASK	/;"	d	file:
PHY_CK1BD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_CK1BD_MASK	/;"	d	file:
PHY_CKCALCTRL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_CKCALCTRL = 0x05,$/;"	e	enum:__anonae42e8fa0203
PHY_CKSYMTXCTRL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_CKSYMTXCTRL = 0x09,$/;"	e	enum:__anonae42e8fa0203
PHY_CLK_SEL_ULPI	include/usb/ehci-ci.h	/^#define PHY_CLK_SEL_ULPI	/;"	d
PHY_CLK_SEL_UTMI	include/usb/ehci-ci.h	/^#define PHY_CLK_SEL_UTMI	/;"	d
PHY_CLK_VALID	include/usb/ehci-ci.h	/^#define PHY_CLK_VALID	/;"	d
PHY_CLSA	board/keymile/km_arm/km_arm.c	/^#define PHY_CLSA	/;"	d	file:
PHY_CMD1_PHYADDR	drivers/usb/eth/mcs7830.c	/^#define PHY_CMD1_PHYADDR	/;"	d	file:
PHY_CMD1_READ	drivers/usb/eth/mcs7830.c	/^#define PHY_CMD1_READ	/;"	d	file:
PHY_CMD1_WRITE	drivers/usb/eth/mcs7830.c	/^#define PHY_CMD1_WRITE	/;"	d	file:
PHY_CMD2_PEND	drivers/usb/eth/mcs7830.c	/^#define PHY_CMD2_PEND	/;"	d	file:
PHY_CMD2_READY	drivers/usb/eth/mcs7830.c	/^#define PHY_CMD2_READY	/;"	d	file:
PHY_CNTL_ANEG_EN	drivers/net/smc91111.h	/^#define PHY_CNTL_ANEG_EN	/;"	d
PHY_CNTL_ANEG_RST	drivers/net/smc91111.h	/^#define PHY_CNTL_ANEG_RST	/;"	d
PHY_CNTL_COLTST	drivers/net/smc91111.h	/^#define PHY_CNTL_COLTST	/;"	d
PHY_CNTL_DPLX	drivers/net/smc91111.h	/^#define PHY_CNTL_DPLX	/;"	d
PHY_CNTL_LPBK	drivers/net/smc91111.h	/^#define PHY_CNTL_LPBK	/;"	d
PHY_CNTL_MII_DIS	drivers/net/smc91111.h	/^#define PHY_CNTL_MII_DIS	/;"	d
PHY_CNTL_PDN	drivers/net/smc91111.h	/^#define PHY_CNTL_PDN	/;"	d
PHY_CNTL_REG	drivers/net/smc91111.h	/^#define PHY_CNTL_REG	/;"	d
PHY_CNTL_RST	drivers/net/smc91111.h	/^#define PHY_CNTL_RST	/;"	d
PHY_CNTL_SPEED	drivers/net/smc91111.h	/^#define PHY_CNTL_SPEED	/;"	d
PHY_CON0_CTRL_DDR_MODE_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON0_CTRL_DDR_MODE_MASK	/;"	d
PHY_CON0_CTRL_DDR_MODE_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON0_CTRL_DDR_MODE_SHIFT	/;"	d
PHY_CON0_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON0_RESET_VAL	/;"	d
PHY_CON0_T_WRRDCMD_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON0_T_WRRDCMD_MASK	/;"	d
PHY_CON0_T_WRRDCMD_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON0_T_WRRDCMD_SHIFT	/;"	d
PHY_CON0_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON0_VAL	/;"	d
PHY_CON10_CTRL_OFFSETR3	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON10_CTRL_OFFSETR3	/;"	d
PHY_CON12_CTRL_DLL_ON_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_DLL_ON_MASK	/;"	d
PHY_CON12_CTRL_DLL_ON_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_DLL_ON_SHIFT	/;"	d
PHY_CON12_CTRL_FORCE_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_FORCE_SHIFT	/;"	d
PHY_CON12_CTRL_INC_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_INC_SHIFT	/;"	d
PHY_CON12_CTRL_REF_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_REF_SHIFT	/;"	d
PHY_CON12_CTRL_START_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_START_MASK	/;"	d
PHY_CON12_CTRL_START_POINT_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_START_POINT_SHIFT	/;"	d
PHY_CON12_CTRL_START_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON12_CTRL_START_SHIFT	/;"	d
PHY_CON12_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON12_RESET_VAL	/;"	d
PHY_CON12_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON12_VAL	/;"	d
PHY_CON14_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON14_RESET_VAL	/;"	d
PHY_CON16_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON16_RESET_VAL	/;"	d
PHY_CON16_ZQ_MODE_DDS_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON16_ZQ_MODE_DDS_MASK	/;"	d
PHY_CON16_ZQ_MODE_DDS_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON16_ZQ_MODE_DDS_SHIFT	/;"	d
PHY_CON16_ZQ_MODE_NOTERM_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON16_ZQ_MODE_NOTERM_MASK	/;"	d
PHY_CON16_ZQ_MODE_TERM_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON16_ZQ_MODE_TERM_MASK	/;"	d
PHY_CON16_ZQ_MODE_TERM_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON16_ZQ_MODE_TERM_SHIFT /;"	d
PHY_CON1_RDLVL_RDDATA_ADJ_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON1_RDLVL_RDDATA_ADJ_SHIFT	/;"	d
PHY_CON1_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON1_RESET_VAL	/;"	d
PHY_CON2_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON2_RESET_VAL	/;"	d
PHY_CON31_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON31_RESET_VAL	/;"	d
PHY_CON31_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON31_VAL	/;"	d
PHY_CON32_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON32_RESET_VAL	/;"	d
PHY_CON32_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON32_VAL	/;"	d
PHY_CON33_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON33_RESET_VAL	/;"	d
PHY_CON33_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON33_VAL	/;"	d
PHY_CON39_VAL_30_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON39_VAL_30_OHM	/;"	d
PHY_CON39_VAL_34_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON39_VAL_34_OHM	/;"	d
PHY_CON39_VAL_40_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON39_VAL_40_OHM	/;"	d
PHY_CON39_VAL_48_OHM	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON39_VAL_48_OHM	/;"	d
PHY_CON42_CTRL_BSTLEN_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON42_CTRL_BSTLEN_MASK	/;"	d
PHY_CON42_CTRL_BSTLEN_SHIFT	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON42_CTRL_BSTLEN_SHIFT	/;"	d
PHY_CON42_CTRL_BSTLEN_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON42_CTRL_BSTLEN_SHIFT	/;"	d
PHY_CON42_CTRL_RDLAT_MASK	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON42_CTRL_RDLAT_MASK	/;"	d
PHY_CON42_CTRL_RDLAT_SHIFT	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON42_CTRL_RDLAT_SHIFT	/;"	d
PHY_CON42_CTRL_RDLAT_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PHY_CON42_CTRL_RDLAT_SHIFT	/;"	d
PHY_CON4_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON4_RESET_VAL	/;"	d
PHY_CON4_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON4_VAL	/;"	d
PHY_CON6_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON6_RESET_VAL	/;"	d
PHY_CON6_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CON6_VAL	/;"	d
PHY_CONNECT_TIMEOUT	drivers/usb/eth/asix.c	/^#define PHY_CONNECT_TIMEOUT /;"	d	file:
PHY_CONNECT_TIMEOUT	drivers/usb/eth/asix88179.c	/^#define PHY_CONNECT_TIMEOUT /;"	d	file:
PHY_CONNECT_TIMEOUT	drivers/usb/eth/r8152.h	/^#define PHY_CONNECT_TIMEOUT /;"	d
PHY_CONNECT_TIMEOUT	drivers/usb/eth/smsc95xx.c	/^#define PHY_CONNECT_TIMEOUT /;"	d	file:
PHY_CONTROL0_RESET_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_CONTROL0_RESET_VAL	/;"	d
PHY_CONTROL1	board/renesas/koelsch/koelsch.c	/^#define PHY_CONTROL1	/;"	d	file:
PHY_CONTROL1	board/renesas/lager/lager.c	/^#define PHY_CONTROL1	/;"	d	file:
PHY_CONTROL1	board/renesas/porter/porter.c	/^#define PHY_CONTROL1	/;"	d	file:
PHY_CONTROL1	board/renesas/stout/stout.c	/^#define PHY_CONTROL1	/;"	d	file:
PHY_CONTROL_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PHY_CONTROL_PHY_REG	/;"	d
PHY_CTRL	drivers/net/e1000.h	/^#define PHY_CTRL	/;"	d
PHY_CTRL	include/mv88e6352.h	/^#define PHY_CTRL	/;"	d
PHY_CTRL_AN_EN	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_AN_EN	/;"	d	file:
PHY_CTRL_CT_EN	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_CT_EN	/;"	d	file:
PHY_CTRL_FULL_DUPLEX	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_FULL_DUPLEX	/;"	d	file:
PHY_CTRL_ISOLATE	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_ISOLATE	/;"	d	file:
PHY_CTRL_LOOPBACK	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_LOOPBACK	/;"	d	file:
PHY_CTRL_PWR_DN	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_PWR_DN	/;"	d	file:
PHY_CTRL_REG	drivers/net/rtl8169.c	/^	PHY_CTRL_REG = 0,$/;"	e	enum:RTL8169_register_content	file:
PHY_CTRL_REG	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_REG	/;"	d	file:
PHY_CTRL_RESET	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_RESET	/;"	d	file:
PHY_CTRL_RESTART_AN	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_RESTART_AN	/;"	d	file:
PHY_CTRL_SPEED0	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_SPEED0	/;"	d	file:
PHY_CTRL_SPEED1	drivers/net/tsi108_eth.c	/^#define PHY_CTRL_SPEED1	/;"	d	file:
PHY_Cap_1000_Full	drivers/net/rtl8169.c	/^	PHY_Cap_1000_Full = 0x0200,$/;"	e	enum:RTL8169_register_content	file:
PHY_Cap_100_Full	drivers/net/rtl8169.c	/^	PHY_Cap_100_Full = 0x0100,$/;"	e	enum:RTL8169_register_content	file:
PHY_Cap_100_Half	drivers/net/rtl8169.c	/^	PHY_Cap_100_Half = 0x0080,$/;"	e	enum:RTL8169_register_content	file:
PHY_Cap_10_Full	drivers/net/rtl8169.c	/^	PHY_Cap_10_Full = 0x0040,$/;"	e	enum:RTL8169_register_content	file:
PHY_Cap_10_Half	drivers/net/rtl8169.c	/^	PHY_Cap_10_Half = 0x0020,$/;"	e	enum:RTL8169_register_content	file:
PHY_Cap_Null	drivers/net/rtl8169.c	/^	PHY_Cap_Null = 0x0,$/;"	e	enum:RTL8169_register_content	file:
PHY_DATA_0	drivers/net/uli526x.c	/^#define PHY_DATA_0	/;"	d	file:
PHY_DATA_1	drivers/net/uli526x.c	/^#define PHY_DATA_1	/;"	d	file:
PHY_DCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DCR	/;"	d
PHY_DEBUG_DISABLE_GUARANTEED_READ	drivers/ddr/altera/sequencer.h	/^#define PHY_DEBUG_DISABLE_GUARANTEED_READ /;"	d
PHY_DEBUG_ENABLE_CAL_RPT	drivers/ddr/altera/sequencer.h	/^#define PHY_DEBUG_ENABLE_CAL_RPT /;"	d
PHY_DEBUG_ENABLE_MARGIN_RPT	drivers/ddr/altera/sequencer.h	/^#define PHY_DEBUG_ENABLE_MARGIN_RPT /;"	d
PHY_DEBUG_ENABLE_NON_DESTRUCTIVE_CALIBRATION	drivers/ddr/altera/sequencer.h	/^#define PHY_DEBUG_ENABLE_NON_DESTRUCTIVE_CALIBRATION /;"	d
PHY_DEBUG_IN_DEBUG_MODE	drivers/ddr/altera/sequencer.h	/^#define PHY_DEBUG_IN_DEBUG_MODE /;"	d
PHY_DEBUG_SWEEP_ALL_GROUPS	drivers/ddr/altera/sequencer.h	/^#define PHY_DEBUG_SWEEP_ALL_GROUPS /;"	d
PHY_DEFAULT_FEATURES	include/phy.h	/^#define PHY_DEFAULT_FEATURES	/;"	d
PHY_DETECT_MASK	drivers/net/xilinx_axi_emac.c	/^#define PHY_DETECT_MASK /;"	d	file:
PHY_DETECT_MASK	drivers/net/xilinx_emaclite.c	/^#define PHY_DETECT_MASK /;"	d	file:
PHY_DETECT_MASK	drivers/net/xilinx_ll_temac_mdio.c	/^#define PHY_DETECT_MASK	/;"	d	file:
PHY_DETECT_MASK	drivers/net/zynq_gem.c	/^#define PHY_DETECT_MASK /;"	d	file:
PHY_DETECT_REG	drivers/net/xilinx_axi_emac.c	/^#define PHY_DETECT_REG /;"	d	file:
PHY_DETECT_REG	drivers/net/xilinx_emaclite.c	/^#define PHY_DETECT_REG /;"	d	file:
PHY_DETECT_REG	drivers/net/xilinx_ll_temac_mdio.c	/^#define PHY_DETECT_REG	/;"	d	file:
PHY_DETECT_REG	drivers/net/zynq_gem.c	/^#define PHY_DETECT_REG /;"	d	file:
PHY_DIG_LB_EN_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_DIG_LB_EN_ADDR	/;"	d
PHY_DISABLE_GATING_FOR_SCL	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DISABLE_GATING_FOR_SCL	/;"	d
PHY_DLL_ADRCTRL	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_ADRCTRL	/;"	d
PHY_DLL_ADRCTRL_INCR	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_ADRCTRL_INCR	/;"	d
PHY_DLL_ADRCTRL_MDL_MASK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_ADRCTRL_MDL_MASK	/;"	d
PHY_DLL_ADRCTRL_MDL_SHIFT	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_ADRCTRL_MDL_SHIFT	/;"	d
PHY_DLL_ADRCTRL_TRIM_MASK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_ADRCTRL_TRIM_MASK	/;"	d
PHY_DLL_INCR_TRIM_1	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_INCR_TRIM_1	/;"	d
PHY_DLL_INCR_TRIM_3	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_INCR_TRIM_3	/;"	d
PHY_DLL_RECALIB	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_RECALIB	/;"	d
PHY_DLL_RECALIB_INCR	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_RECALIB_INCR	/;"	d
PHY_DLL_RECALIB_TRIM_MASK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_RECALIB_TRIM_MASK	/;"	d
PHY_DLL_TRIM_1	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_TRIM_1	/;"	d
PHY_DLL_TRIM_2	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_TRIM_2	/;"	d
PHY_DLL_TRIM_3	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_TRIM_3	/;"	d
PHY_DLL_TRIM_CLK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DLL_TRIM_CLK	/;"	d
PHY_DLL_TRIM_CLK_INCR	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_TRIM_CLK_INCR	/;"	d
PHY_DLL_TRIM_CLK_MASK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_DLL_TRIM_CLK_MASK	/;"	d
PHY_DP83848	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define PHY_DP83848	/;"	d
PHY_DPLL_CLK	drivers/usb/phy/twl4030.c	/^#define PHY_DPLL_CLK	/;"	d	file:
PHY_DQSGD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DQSGD_MASK(/;"	d	file:
PHY_DQSGX_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DQSGX_MASK	/;"	d	file:
PHY_DRV_ODT_SET	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^#define PHY_DRV_ODT_SET(/;"	d	file:
PHY_DSCL_CNT	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DSCL_CNT	/;"	d
PHY_DSDQOE_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DSDQOE_MASK	/;"	d	file:
PHY_DSGCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DSGCR	/;"	d
PHY_DSWBD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DSWBD_MASK	/;"	d	file:
PHY_DTAR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTAR0	/;"	d
PHY_DTAR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTAR1	/;"	d
PHY_DTAR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTAR2	/;"	d
PHY_DTAR3	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTAR3	/;"	d
PHY_DTCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTCR	/;"	d
PHY_DTCR_DTMPR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DTCR_DTMPR	/;"	d
PHY_DTCR_DTRANK_MASK	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DTCR_DTRANK_MASK	/;"	d
PHY_DTCR_DTRANK_SHIFT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DTCR_DTRANK_SHIFT	/;"	d
PHY_DTCR_RANKEN_MASK	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DTCR_RANKEN_MASK	/;"	d
PHY_DTCR_RANKEN_SHIFT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DTCR_RANKEN_SHIFT	/;"	d
PHY_DTDR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTDR0	/;"	d
PHY_DTDR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTDR1	/;"	d
PHY_DTEDR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTEDR0	/;"	d
PHY_DTEDR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTEDR1	/;"	d
PHY_DTPR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTPR0	/;"	d
PHY_DTPR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTPR1	/;"	d
PHY_DTPR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DTPR2	/;"	d
PHY_DX0GCR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX0GCR	/;"	d	file:
PHY_DX0GTR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX0GTR	/;"	d	file:
PHY_DX1GCR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX1GCR	/;"	d	file:
PHY_DX1GTR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX1GTR	/;"	d	file:
PHY_DX2GCR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX2GCR	/;"	d	file:
PHY_DX2GTR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX2GTR	/;"	d	file:
PHY_DX3GCR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX3GCR	/;"	d	file:
PHY_DX3GTR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DX3GTR	/;"	d	file:
PHY_DXBDLR1	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DXBDLR1(/;"	d	file:
PHY_DXBDLR2	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DXBDLR2(/;"	d	file:
PHY_DXCCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DXCCR	/;"	d
PHY_DXCCR_DQSNRES_344_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_344_OHM	/;"	d
PHY_DXCCR_DQSNRES_393_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_393_OHM	/;"	d
PHY_DXCCR_DQSNRES_458_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_458_OHM	/;"	d
PHY_DXCCR_DQSNRES_500_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_500_OHM	/;"	d
PHY_DXCCR_DQSNRES_550_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_550_OHM	/;"	d
PHY_DXCCR_DQSNRES_611_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_611_OHM	/;"	d
PHY_DXCCR_DQSNRES_688_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_688_OHM	/;"	d
PHY_DXCCR_DQSNRES_OPEN	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSNRES_OPEN	/;"	d
PHY_DXCCR_DQSRES_344_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_344_OHM	/;"	d
PHY_DXCCR_DQSRES_393_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_393_OHM	/;"	d
PHY_DXCCR_DQSRES_458_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_458_OHM	/;"	d
PHY_DXCCR_DQSRES_500_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_500_OHM	/;"	d
PHY_DXCCR_DQSRES_550_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_550_OHM	/;"	d
PHY_DXCCR_DQSRES_611_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_611_OHM	/;"	d
PHY_DXCCR_DQSRES_688_OHM	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_688_OHM	/;"	d
PHY_DXCCR_DQSRES_OPEN	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DXCCR_DQSRES_OPEN	/;"	d
PHY_DXLCDLR0	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DXLCDLR0(/;"	d	file:
PHY_DXLCDLR1	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DXLCDLR1(/;"	d	file:
PHY_DXLCDLR2	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DXLCDLR2(/;"	d	file:
PHY_DXMDLR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_DXMDLR(/;"	d	file:
PHY_DX_BASE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_BASE	/;"	d
PHY_DX_BDLR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_BDLR0	/;"	d
PHY_DX_BDLR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_BDLR1	/;"	d
PHY_DX_BDLR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_BDLR2	/;"	d
PHY_DX_BDLR3	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_BDLR3	/;"	d
PHY_DX_BDLR4	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_BDLR4	/;"	d
PHY_DX_GCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_GCR	/;"	d
PHY_DX_GCR_WLRKEN_MASK	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DX_GCR_WLRKEN_MASK	/;"	d
PHY_DX_GCR_WLRKEN_SHIFT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_DX_GCR_WLRKEN_SHIFT	/;"	d
PHY_DX_GSR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_GSR0	/;"	d
PHY_DX_GSR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_GSR1	/;"	d
PHY_DX_GSR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_GSR2	/;"	d
PHY_DX_GTR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_GTR	/;"	d
PHY_DX_LCDLR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_LCDLR0	/;"	d
PHY_DX_LCDLR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_LCDLR1	/;"	d
PHY_DX_LCDLR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_LCDLR2	/;"	d
PHY_DX_MDLR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_MDLR	/;"	d
PHY_DX_STRIDE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_DX_STRIDE	/;"	d
PHY_DYNAMIC_BIT_LVL	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DYNAMIC_BIT_LVL	/;"	d
PHY_DYNAMIC_WRITE_BIT_LVL	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_DYNAMIC_WRITE_BIT_LVL	/;"	d
PHY_EN_DYN_PWRDN	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define PHY_EN_DYN_PWRDN	/;"	d
PHY_ET1011C	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define PHY_ET1011C	/;"	d
PHY_EXT_PAGE_ACCESS	drivers/net/phy/vitesse.c	/^#define PHY_EXT_PAGE_ACCESS /;"	d	file:
PHY_EXT_PAGE_ACCESS	include/fsl_mdio.h	/^#define PHY_EXT_PAGE_ACCESS	/;"	d
PHY_EXT_PAGE_ACCESS_EXTENDED	drivers/net/phy/vitesse.c	/^#define PHY_EXT_PAGE_ACCESS_EXTENDED	/;"	d	file:
PHY_EXT_PAGE_ACCESS_EXTENDED3	drivers/net/phy/vitesse.c	/^#define PHY_EXT_PAGE_ACCESS_EXTENDED3	/;"	d	file:
PHY_EXT_PAGE_ACCESS_GENERAL	drivers/net/phy/vitesse.c	/^#define PHY_EXT_PAGE_ACCESS_GENERAL	/;"	d	file:
PHY_EXT_STATUS	drivers/net/e1000.h	/^#define PHY_EXT_STATUS	/;"	d
PHY_EXT_STATUS_REG	drivers/net/tsi108_eth.c	/^#define PHY_EXT_STATUS_REG	/;"	d	file:
PHY_Enable_Auto_Nego	drivers/net/rtl8169.c	/^	PHY_Enable_Auto_Nego = 0x1000,$/;"	e	enum:RTL8169_register_content	file:
PHY_FIFO_WE_SLAVE_RATIO_REGS	arch/arm/include/asm/emif.h	/^#define PHY_FIFO_WE_SLAVE_RATIO_REGS	/;"	d
PHY_FLAG_BROKEN_RESET	include/phy.h	/^#define PHY_FLAG_BROKEN_RESET	/;"	d
PHY_FORCE_TIME	drivers/net/e1000.h	/^#define PHY_FORCE_TIME	/;"	d
PHY_GBIT_FEATURES	include/phy.h	/^#define PHY_GBIT_FEATURES	/;"	d
PHY_GPR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_GPR0	/;"	d
PHY_GPR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_GPR1	/;"	d
PHY_ID1	drivers/net/e1000.h	/^#define PHY_ID1	/;"	d
PHY_ID1_REG	drivers/net/smc91111.h	/^#define PHY_ID1_REG	/;"	d
PHY_ID1_REG	drivers/net/tsi108_eth.c	/^#define PHY_ID1_REG	/;"	d	file:
PHY_ID2	drivers/net/e1000.h	/^#define PHY_ID2	/;"	d
PHY_ID2_REG	drivers/net/smc91111.h	/^#define PHY_ID2_REG	/;"	d
PHY_ID2_REG	drivers/net/tsi108_eth.c	/^#define PHY_ID2_REG	/;"	d	file:
PHY_ID_82555	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_82555	/;"	d	file:
PHY_ID_AMD79C784	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_AMD79C784	/;"	d	file:
PHY_ID_DM9161	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_DM9161	/;"	d	file:
PHY_ID_KSM8995M	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_KSM8995M	/;"	d	file:
PHY_ID_LSI80225	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_LSI80225	/;"	d	file:
PHY_ID_LSI80225B	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_LSI80225B	/;"	d	file:
PHY_ID_LXT970	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_LXT970	/;"	d	file:
PHY_ID_LXT971	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_LXT971	/;"	d	file:
PHY_ID_MASK	drivers/net/cpsw.c	/^#define PHY_ID_MASK	/;"	d	file:
PHY_ID_QS6612	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PHY_ID_QS6612	/;"	d	file:
PHY_INTERFACE_MODE_COUNT	include/phy.h	/^	PHY_INTERFACE_MODE_COUNT,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_GMII	include/phy.h	/^	PHY_INTERFACE_MODE_GMII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_MII	include/phy.h	/^	PHY_INTERFACE_MODE_MII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_NONE	include/phy.h	/^	PHY_INTERFACE_MODE_NONE,	\/* Must be last *\/$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_QSGMII	include/phy.h	/^	PHY_INTERFACE_MODE_QSGMII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_RGMII	include/phy.h	/^	PHY_INTERFACE_MODE_RGMII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_RGMII_ID	include/phy.h	/^	PHY_INTERFACE_MODE_RGMII_ID,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_RGMII_RXID	include/phy.h	/^	PHY_INTERFACE_MODE_RGMII_RXID,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_RGMII_TXID	include/phy.h	/^	PHY_INTERFACE_MODE_RGMII_TXID,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_RMII	include/phy.h	/^	PHY_INTERFACE_MODE_RMII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_RTBI	include/phy.h	/^	PHY_INTERFACE_MODE_RTBI,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_SGMII	include/phy.h	/^	PHY_INTERFACE_MODE_SGMII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_SGMII_2500	include/phy.h	/^	PHY_INTERFACE_MODE_SGMII_2500,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_TBI	include/phy.h	/^	PHY_INTERFACE_MODE_TBI,$/;"	e	enum:__anona5f0b0bf0103
PHY_INTERFACE_MODE_XGMII	include/phy.h	/^	PHY_INTERFACE_MODE_XGMII,$/;"	e	enum:__anona5f0b0bf0103
PHY_INT_CWRD	drivers/net/smc91111.h	/^#define PHY_INT_CWRD	/;"	d
PHY_INT_DPLXDET	drivers/net/smc91111.h	/^#define PHY_INT_DPLXDET	/;"	d
PHY_INT_ESD	drivers/net/smc91111.h	/^#define PHY_INT_ESD	/;"	d
PHY_INT_INT	drivers/net/smc91111.h	/^#define PHY_INT_INT	/;"	d
PHY_INT_JAB	drivers/net/smc91111.h	/^#define PHY_INT_JAB	/;"	d
PHY_INT_LNKFAIL	drivers/net/smc91111.h	/^#define	PHY_INT_LNKFAIL	/;"	d
PHY_INT_LOSSSYNC	drivers/net/smc91111.h	/^#define PHY_INT_LOSSSYNC	/;"	d
PHY_INT_MASK	drivers/usb/eth/smsc95xx.c	/^#define PHY_INT_MASK	/;"	d	file:
PHY_INT_MASK_ANEG_COMP_	drivers/usb/eth/smsc95xx.c	/^#define PHY_INT_MASK_ANEG_COMP_	/;"	d	file:
PHY_INT_MASK_DEFAULT_	drivers/usb/eth/smsc95xx.c	/^#define PHY_INT_MASK_DEFAULT_	/;"	d	file:
PHY_INT_MASK_LINK_DOWN_	drivers/usb/eth/smsc95xx.c	/^#define PHY_INT_MASK_LINK_DOWN_	/;"	d	file:
PHY_INT_REG	drivers/net/smc91111.h	/^#define PHY_INT_REG	/;"	d
PHY_INT_RPOL	drivers/net/smc91111.h	/^#define PHY_INT_RPOL	/;"	d
PHY_INT_SPDDET	drivers/net/smc91111.h	/^#define PHY_INT_SPDDET	/;"	d
PHY_INT_SRC	drivers/usb/eth/smsc95xx.c	/^#define PHY_INT_SRC	/;"	d	file:
PHY_INT_SSD	drivers/net/smc91111.h	/^#define PHY_INT_SSD	/;"	d
PHY_IPRD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_IPRD_MASK	/;"	d	file:
PHY_IP_DQ_DQS_BITWISE_TRIM	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_IP_DQ_DQS_BITWISE_TRIM	/;"	d
PHY_IP_DQ_DQS_BITWISE_TRIM_INC	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_IP_DQ_DQS_BITWISE_TRIM_INC	/;"	d
PHY_IP_DQ_DQS_BITWISE_TRIM_MASK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_IP_DQ_DQS_BITWISE_TRIM_MASK	/;"	d
PHY_IP_DQ_DQS_BITWISE_TRIM_OVERRIDE	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_IP_DQ_DQS_BITWISE_TRIM_OVERRIDE	/;"	d
PHY_KSZ8873	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define PHY_KSZ8873	/;"	d
PHY_LAN83C180	drivers/net/smc91111.h	/^	PHY_LAN83C180$/;"	e	enum:__anon0dcd80df0103
PHY_LAN83C183	drivers/net/smc91111.h	/^	PHY_LAN83C183 = 1,	\/* LAN91C111 Internal PHY *\/$/;"	e	enum:__anon0dcd80df0103
PHY_LANE_SEL	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_LANE_SEL	/;"	d
PHY_LANE_SEL_BIT_SHIFT	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_LANE_SEL_BIT_SHIFT	/;"	d
PHY_LANE_SEL_BIT_WIDTH	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_LANE_SEL_BIT_WIDTH	/;"	d
PHY_LANE_SEL_LANE_SHIFT	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_LANE_SEL_LANE_SHIFT	/;"	d
PHY_LANE_SEL_LANE_WIDTH	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_LANE_SEL_LANE_WIDTH	/;"	d
PHY_LED0_LINK	board/keymile/km_arm/km_arm.c	/^#define PHY_LED0_LINK	/;"	d	file:
PHY_LED1_ACT	board/keymile/km_arm/km_arm.c	/^#define PHY_LED1_ACT	/;"	d	file:
PHY_LED2_INT	board/keymile/km_arm/km_arm.c	/^#define PHY_LED2_INT	/;"	d	file:
PHY_LED_MAN_REG	include/configs/gplugd.h	/^#define PHY_LED_MAN_REG	/;"	d
PHY_LED_MODE	board/renesas/koelsch/koelsch.c	/^#define PHY_LED_MODE	/;"	d	file:
PHY_LED_MODE	board/renesas/lager/lager.c	/^#define PHY_LED_MODE	/;"	d	file:
PHY_LED_MODE	board/renesas/porter/porter.c	/^#define PHY_LED_MODE	/;"	d	file:
PHY_LED_MODE	board/renesas/stout/stout.c	/^#define PHY_LED_MODE	/;"	d	file:
PHY_LED_MODE_ACK	board/renesas/koelsch/koelsch.c	/^#define PHY_LED_MODE_ACK	/;"	d	file:
PHY_LED_MODE_ACK	board/renesas/lager/lager.c	/^#define PHY_LED_MODE_ACK	/;"	d	file:
PHY_LED_MODE_ACK	board/renesas/porter/porter.c	/^#define PHY_LED_MODE_ACK	/;"	d	file:
PHY_LED_MODE_ACK	board/renesas/stout/stout.c	/^#define PHY_LED_MODE_ACK	/;"	d	file:
PHY_LED_PAR_SEL_REG	include/configs/gplugd.h	/^#define PHY_LED_PAR_SEL_REG	/;"	d
PHY_LED_SEL_REG	board/keymile/km_arm/km_arm.c	/^#define	PHY_LED_SEL_REG	/;"	d	file:
PHY_LED_VAL	include/configs/gplugd.h	/^#define PHY_LED_VAL	/;"	d
PHY_LOCK_STATUS_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PHY_LOCK_STATUS_REG	/;"	d
PHY_LP_ABILITY	drivers/net/e1000.h	/^#define PHY_LP_ABILITY	/;"	d
PHY_LP_ABILITY_REG	drivers/net/tsi108_eth.c	/^#define PHY_LP_ABILITY_REG	/;"	d	file:
PHY_LP_NEXT_PAGE	drivers/net/e1000.h	/^#define PHY_LP_NEXT_PAGE	/;"	d
PHY_LP_NEXT_PAGE_REG	drivers/net/tsi108_eth.c	/^#define PHY_LP_NEXT_PAGE_REG	/;"	d	file:
PHY_LXT971A	include/lxt971a.h	/^	PHY_LXT971A = 0x0013$/;"	e	enum:__anon23dfe2480103
PHY_LXT971_DIG_CFG	include/lxt971a.h	/^#define PHY_LXT971_DIG_CFG	/;"	d
PHY_LXT971_DIG_CFG_MII_DRIVE	include/lxt971a.h	/^#define PHY_LXT971_DIG_CFG_MII_DRIVE	/;"	d
PHY_LXT971_DIG_CFG_RES1	include/lxt971a.h	/^#define PHY_LXT971_DIG_CFG_RES1	/;"	d
PHY_LXT971_DIG_CFG_RES2	include/lxt971a.h	/^#define PHY_LXT971_DIG_CFG_RES2	/;"	d
PHY_LXT971_DIG_CFG_RES3	include/lxt971a.h	/^#define PHY_LXT971_DIG_CFG_RES3	/;"	d
PHY_LXT971_DIG_CFG_SHOW_SYMBOL	include/lxt971a.h	/^#define PHY_LXT971_DIG_CFG_SHOW_SYMBOL	/;"	d
PHY_LXT971_INT_ENABLE	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE	/;"	d
PHY_LXT971_INT_ENABLE_ANMSK	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_ANMSK /;"	d
PHY_LXT971_INT_ENABLE_DUPLEXMSK	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_DUPLEXMSK /;"	d
PHY_LXT971_INT_ENABLE_INTEN	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_INTEN /;"	d
PHY_LXT971_INT_ENABLE_LINKMSK	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_LINKMSK /;"	d
PHY_LXT971_INT_ENABLE_RES1	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_RES1 /;"	d
PHY_LXT971_INT_ENABLE_RES2	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_RES2 /;"	d
PHY_LXT971_INT_ENABLE_SPEEDMSK	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_SPEEDMSK /;"	d
PHY_LXT971_INT_ENABLE_TINT	include/lxt971a.h	/^#define PHY_LXT971_INT_ENABLE_TINT /;"	d
PHY_LXT971_INT_STATUS	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS	/;"	d
PHY_LXT971_INT_STATUS_ANDONE	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_ANDONE /;"	d
PHY_LXT971_INT_STATUS_DUPLEXCHG	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_DUPLEXCHG /;"	d
PHY_LXT971_INT_STATUS_LINKCHG	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_LINKCHG /;"	d
PHY_LXT971_INT_STATUS_MDINT	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_MDINT /;"	d
PHY_LXT971_INT_STATUS_RES1	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_RES1 /;"	d
PHY_LXT971_INT_STATUS_RES2	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_RES2 /;"	d
PHY_LXT971_INT_STATUS_RES3	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_RES3 /;"	d
PHY_LXT971_INT_STATUS_SPEEDCHG	include/lxt971a.h	/^#define PHY_LXT971_INT_STATUS_SPEEDCHG /;"	d
PHY_LXT971_LED_CFG	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG	/;"	d
PHY_LXT971_LED_CFG_COLLISION	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_COLLISION /;"	d
PHY_LXT971_LED_CFG_DUPLEX	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_DUPLEX /;"	d
PHY_LXT971_LED_CFG_DUPLEX_COL	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_DUPLEX_COL /;"	d
PHY_LXT971_LED_CFG_LEDFREQ_100	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LEDFREQ_100	/;"	d
PHY_LXT971_LED_CFG_LEDFREQ_30	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LEDFREQ_30	/;"	d
PHY_LXT971_LED_CFG_LEDFREQ_60	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LEDFREQ_60	/;"	d
PHY_LXT971_LED_CFG_LEDFREQ_MA	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LEDFREQ_MA	/;"	d
PHY_LXT971_LED_CFG_LEDFREQ_RES	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LEDFREQ_RES	/;"	d
PHY_LXT971_LED_CFG_LINK	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LINK	/;"	d
PHY_LXT971_LED_CFG_LINK_ACT	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LINK_ACT /;"	d
PHY_LXT971_LED_CFG_LINK_RX	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_LINK_RX /;"	d
PHY_LXT971_LED_CFG_PULSE_STR	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_PULSE_STR /;"	d
PHY_LXT971_LED_CFG_RECEIVE	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_RECEIVE /;"	d
PHY_LXT971_LED_CFG_RES1	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_RES1 /;"	d
PHY_LXT971_LED_CFG_RX_OR_TX	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_RX_OR_TX /;"	d
PHY_LXT971_LED_CFG_SHIFT_LED1	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_SHIFT_LED1 /;"	d
PHY_LXT971_LED_CFG_SHIFT_LED2	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_SHIFT_LED2 /;"	d
PHY_LXT971_LED_CFG_SHIFT_LED3	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_SHIFT_LED3 /;"	d
PHY_LXT971_LED_CFG_SPEED	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_SPEED /;"	d
PHY_LXT971_LED_CFG_TEST_BLK_FST	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_TEST_BLK_FST /;"	d
PHY_LXT971_LED_CFG_TEST_BLK_SLW	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_TEST_BLK_SLW /;"	d
PHY_LXT971_LED_CFG_TEST_OFF	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_TEST_OFF /;"	d
PHY_LXT971_LED_CFG_TEST_ON	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_TEST_ON /;"	d
PHY_LXT971_LED_CFG_TRANSMIT	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_TRANSMIT /;"	d
PHY_LXT971_LED_CFG_UNUSED1	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_UNUSED1 /;"	d
PHY_LXT971_LED_CFG_UNUSED2	include/lxt971a.h	/^#define PHY_LXT971_LED_CFG_UNUSED2 /;"	d
PHY_LXT971_MDIO_MAX_CLK	include/lxt971a.h	/^#define PHY_LXT971_MDIO_MAX_CLK	/;"	d
PHY_LXT971_PORT_CFG	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG	/;"	d
PHY_LXT971_PORT_CFG_ALT_NP	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_ALT_NP /;"	d
PHY_LXT971_PORT_CFG_BYPASS_SCR	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_BYPASS_SCR /;"	d
PHY_LXT971_PORT_CFG_CRS_SEL	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_CRS_SEL /;"	d
PHY_LXT971_PORT_CFG_FIBER_SEL	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_FIBER_SEL /;"	d
PHY_LXT971_PORT_CFG_FLT_CODE_EN	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_FLT_CODE_EN /;"	d
PHY_LXT971_PORT_CFG_FORCE_LNK	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_FORCE_LNK /;"	d
PHY_LXT971_PORT_CFG_JABBER	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_JABBER /;"	d
PHY_LXT971_PORT_CFG_PRE_EN	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_PRE_EN /;"	d
PHY_LXT971_PORT_CFG_RES1	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_RES1 /;"	d
PHY_LXT971_PORT_CFG_RES2	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_RES2 /;"	d
PHY_LXT971_PORT_CFG_SLEEP_MODE	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_SLEEP_MODE /;"	d
PHY_LXT971_PORT_CFG_SLEEP_T_104	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_SLEEP_T_104 /;"	d
PHY_LXT971_PORT_CFG_SLEEP_T_200	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_SLEEP_T_200 /;"	d
PHY_LXT971_PORT_CFG_SLEEP_T_304	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_SLEEP_T_304 /;"	d
PHY_LXT971_PORT_CFG_SLEEP_T_MA	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_SLEEP_T_MA /;"	d
PHY_LXT971_PORT_CFG_SQE	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_SQE	/;"	d
PHY_LXT971_PORT_CFG_TP_LOOPBACK	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_TP_LOOPBACK /;"	d
PHY_LXT971_PORT_CFG_TX_DISABLE	include/lxt971a.h	/^#define PHY_LXT971_PORT_CFG_TX_DISABLE /;"	d
PHY_LXT971_STAT2	include/lxt971a.h	/^#define PHY_LXT971_STAT2	/;"	d
PHY_LXT971_STAT2_100BTX	include/lxt971a.h	/^#define PHY_LXT971_STAT2_100BTX	/;"	d
PHY_LXT971_STAT2_AUTO_NEG	include/lxt971a.h	/^#define PHY_LXT971_STAT2_AUTO_NEG	/;"	d
PHY_LXT971_STAT2_AUTO_NEG_COMP	include/lxt971a.h	/^#define PHY_LXT971_STAT2_AUTO_NEG_COMP	/;"	d
PHY_LXT971_STAT2_COL_STATUS	include/lxt971a.h	/^#define PHY_LXT971_STAT2_COL_STATUS	/;"	d
PHY_LXT971_STAT2_DUPLEX_MODE	include/lxt971a.h	/^#define PHY_LXT971_STAT2_DUPLEX_MODE	/;"	d
PHY_LXT971_STAT2_ERROR	include/lxt971a.h	/^#define PHY_LXT971_STAT2_ERROR	/;"	d
PHY_LXT971_STAT2_LINK	include/lxt971a.h	/^#define PHY_LXT971_STAT2_LINK	/;"	d
PHY_LXT971_STAT2_PAUSE	include/lxt971a.h	/^#define PHY_LXT971_STAT2_PAUSE	/;"	d
PHY_LXT971_STAT2_POLARITY	include/lxt971a.h	/^#define PHY_LXT971_STAT2_POLARITY	/;"	d
PHY_LXT971_STAT2_RES1	include/lxt971a.h	/^#define PHY_LXT971_STAT2_RES1	/;"	d
PHY_LXT971_STAT2_RES2	include/lxt971a.h	/^#define PHY_LXT971_STAT2_RES2	/;"	d
PHY_LXT971_STAT2_RES3	include/lxt971a.h	/^#define PHY_LXT971_STAT2_RES3	/;"	d
PHY_LXT971_STAT2_RX_STATUS	include/lxt971a.h	/^#define PHY_LXT971_STAT2_RX_STATUS	/;"	d
PHY_LXT971_STAT2_TX_STATUS	include/lxt971a.h	/^#define PHY_LXT971_STAT2_TX_STATUS	/;"	d
PHY_LXT971_TX_CTRL	include/lxt971a.h	/^#define PHY_LXT971_TX_CTRL	/;"	d
PHY_LXT972	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define PHY_LXT972	/;"	d
PHY_MARVELL_88E1118R_LED_CTRL_LED0_1000MB	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_LED_CTRL_LED0_1000MB	/;"	d	file:
PHY_MARVELL_88E1118R_LED_CTRL_LED1_ACT	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_LED_CTRL_LED1_ACT	/;"	d	file:
PHY_MARVELL_88E1118R_LED_CTRL_LED2_LINK	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_LED_CTRL_LED2_LINK	/;"	d	file:
PHY_MARVELL_88E1118R_LED_CTRL_PAGE	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_LED_CTRL_PAGE	/;"	d	file:
PHY_MARVELL_88E1118R_LED_CTRL_REG	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_LED_CTRL_REG	/;"	d	file:
PHY_MARVELL_88E1118R_LED_CTRL_RESERVED	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_LED_CTRL_RESERVED	/;"	d	file:
PHY_MARVELL_88E1118R_MODEL	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118R_MODEL	/;"	d	file:
PHY_MARVELL_88E1118_MODEL	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_88E1118_MODEL	/;"	d	file:
PHY_MARVELL_DEFAULT_PAGE	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_DEFAULT_PAGE	/;"	d	file:
PHY_MARVELL_OUI	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_OUI	/;"	d	file:
PHY_MARVELL_PAGE_REG	board/keymile/km_arm/km_arm.c	/^#define PHY_MARVELL_PAGE_REG	/;"	d	file:
PHY_MASK	drivers/net/armada100_fec.h	/^#define PHY_MASK /;"	d
PHY_MASK_REG	drivers/net/smc91111.h	/^#define PHY_MASK_REG	/;"	d
PHY_MAS_DLY_WIDTH	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_MAS_DLY_WIDTH	/;"	d
PHY_MAX_ADDR	include/phy.h	/^#define PHY_MAX_ADDR /;"	d
PHY_MDIO_MAX_CLK	include/lxt971a.h	/^#define PHY_MDIO_MAX_CLK	/;"	d
PHY_MGR_CAL_FAIL	drivers/ddr/altera/sequencer.h	/^#define PHY_MGR_CAL_FAIL	/;"	d
PHY_MGR_CAL_RESET	drivers/ddr/altera/sequencer.h	/^#define PHY_MGR_CAL_RESET	/;"	d
PHY_MGR_CAL_SUCCESS	drivers/ddr/altera/sequencer.h	/^#define PHY_MGR_CAL_SUCCESS	/;"	d
PHY_MISC_REG0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_MISC_REG0_ADDR	/;"	d
PHY_MODE_SGMII	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_MODE_SGMII	/;"	d
PHY_MR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_MR0	/;"	d
PHY_MR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_MR1	/;"	d
PHY_MR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_MR2	/;"	d
PHY_MR3	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_MR3	/;"	d
PHY_NEXT_PAGE_TX	drivers/net/e1000.h	/^#define PHY_NEXT_PAGE_TX	/;"	d
PHY_NEXT_PAGE_TX_REG	drivers/net/tsi108_eth.c	/^#define PHY_NEXT_PAGE_TX_REG	/;"	d	file:
PHY_NO	include/configs/openrd.h	/^#  define PHY_NO	/;"	d
PHY_NONE	arch/arm/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	arch/microblaze/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	arch/mips/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	arch/nios2/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	arch/sandbox/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	arch/x86/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	arch/xtensa/dts/include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	include/dt-bindings/phy/phy.h	/^#define PHY_NONE	/;"	d
PHY_NONE	include/lxt971a.h	/^	PHY_NONE    = 0x0000, \/* no PHY detected yet *\/$/;"	e	enum:__anon23dfe2480103
PHY_ODTCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ODTCR	/;"	d
PHY_OPMODE_PLLCFG	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_OPMODE_PLLCFG = 0x06,$/;"	e	enum:__anonae42e8fa0203
PHY_OP_DQ_DM_DQS_BITWISE_TRIM	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_OP_DQ_DM_DQS_BITWISE_TRIM	/;"	d
PHY_OP_DQ_DM_DQS_BITWISE_TRIM_INC	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_OP_DQ_DM_DQS_BITWISE_TRIM_INC	/;"	d
PHY_OP_DQ_DM_DQS_BITWISE_TRIM_MASK	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_OP_DQ_DM_DQS_BITWISE_TRIM_MASK	/;"	d
PHY_OP_DQ_DM_DQS_BITWISE_TRIM_OVERRIDE	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_OP_DQ_DM_DQS_BITWISE_TRIM_OVERRIDE	/;"	d
PHY_OP_READ	drivers/net/e1000.h	/^#define PHY_OP_READ	/;"	d
PHY_OP_WRITE	drivers/net/e1000.h	/^#define PHY_OP_WRITE	/;"	d
PHY_PAD_CTRL	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_PAD_CTRL	/;"	d
PHY_PAGE	include/mv88e6352.h	/^#define PHY_PAGE	/;"	d
PHY_PAGE_COPPER	drivers/net/phy/mv88e61xx.c	/^#define PHY_PAGE_COPPER	/;"	d	file:
PHY_PAGE_SERDES	drivers/net/phy/mv88e61xx.c	/^#define PHY_PAGE_SERDES	/;"	d	file:
PHY_PD	arch/arm/mach-exynos/include/mach/dp.h	/^#define PHY_PD	/;"	d
PHY_PGCR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PGCR0	/;"	d
PHY_PGCR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PGCR1	/;"	d
PHY_PGCR1_INHVT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGCR1_INHVT	/;"	d
PHY_PGCR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PGCR2	/;"	d
PHY_PGSR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PGSR0	/;"	d
PHY_PGSR0_DCDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_DCDONE	/;"	d
PHY_PGSR0_DIDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_DIDONE	/;"	d
PHY_PGSR0_DIERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_DIERR	/;"	d
PHY_PGSR0_DTERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_DTERR	/;"	d
PHY_PGSR0_DTERR_SHIFT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_DTERR_SHIFT	/;"	d
PHY_PGSR0_IDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_IDONE	/;"	d
PHY_PGSR0_PLDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_PLDONE	/;"	d
PHY_PGSR0_QSGDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_QSGDONE	/;"	d
PHY_PGSR0_QSGERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_QSGERR	/;"	d
PHY_PGSR0_RDDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_RDDONE	/;"	d
PHY_PGSR0_RDERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_RDERR	/;"	d
PHY_PGSR0_REDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_REDONE	/;"	d
PHY_PGSR0_REERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_REERR	/;"	d
PHY_PGSR0_WDDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WDDONE	/;"	d
PHY_PGSR0_WDERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WDERR	/;"	d
PHY_PGSR0_WEDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WEDONE	/;"	d
PHY_PGSR0_WEERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WEERR	/;"	d
PHY_PGSR0_WLADONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WLADONE	/;"	d
PHY_PGSR0_WLAERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WLAERR	/;"	d
PHY_PGSR0_WLDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WLDONE	/;"	d
PHY_PGSR0_WLERR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_WLERR	/;"	d
PHY_PGSR0_ZCDONE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR0_ZCDONE	/;"	d
PHY_PGSR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PGSR1	/;"	d
PHY_PGSR1_VTSTOP	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PGSR1_VTSTOP	/;"	d
PHY_PIR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PIR	/;"	d
PHY_PIR_DCAL	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_DCAL	/;"	d
PHY_PIR_DCALBYP	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_DCALBYP	/;"	d
PHY_PIR_DRAMINIT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_DRAMINIT	/;"	d
PHY_PIR_DRAMRST	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_DRAMRST	/;"	d
PHY_PIR_INIT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_INIT	/;"	d
PHY_PIR_INITBYP	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_INITBYP	/;"	d
PHY_PIR_LOCKBYP	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_LOCKBYP	/;"	d
PHY_PIR_PHYRST	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_PHYRST	/;"	d
PHY_PIR_PLLINIT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_PLLINIT	/;"	d
PHY_PIR_QSGATE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_QSGATE	/;"	d
PHY_PIR_RDDSKW	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_RDDSKW	/;"	d
PHY_PIR_RDEYE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_RDEYE	/;"	d
PHY_PIR_WL	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_WL	/;"	d
PHY_PIR_WLADJ	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_WLADJ	/;"	d
PHY_PIR_WRDSKW	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_WRDSKW	/;"	d
PHY_PIR_WREYE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_WREYE	/;"	d
PHY_PIR_ZCAL	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_ZCAL	/;"	d
PHY_PIR_ZCALBYP	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define   PHY_PIR_ZCALBYP	/;"	d
PHY_PLLCLKBISTPHASE	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_PLLCLKBISTPHASE = 0x17,$/;"	e	enum:__anonae42e8fa0203
PHY_PLLCR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PLLCR	/;"	d
PHY_PLLCURRCTRL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_PLLCURRCTRL = 0x10,$/;"	e	enum:__anonae42e8fa0203
PHY_PLLGMPCTRL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_PLLGMPCTRL = 0x15,$/;"	e	enum:__anonae42e8fa0203
PHY_PLLPHBYCTRL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_PLLPHBYCTRL = 0x13,$/;"	e	enum:__anonae42e8fa0203
PHY_POLARITY_ALL_INVERT	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_ALL_INVERT	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_ALL_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_NO_INVERT	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_NO_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_RXD_INVERT	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_RXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POLARITY_TXD_INVERT	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_POLARITY_TXD_INVERT	/;"	d
PHY_POWER_DOWN	drivers/net/uli526x.c	/^#define PHY_POWER_DOWN	/;"	d	file:
PHY_PREAMBLE	drivers/net/e1000.h	/^#define PHY_PREAMBLE	/;"	d
PHY_PREAMBLE_SIZE	drivers/net/e1000.h	/^#define PHY_PREAMBLE_SIZE	/;"	d
PHY_PTR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PTR0	/;"	d
PHY_PTR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PTR1	/;"	d
PHY_PTR2	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PTR2	/;"	d
PHY_PTR3	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PTR3	/;"	d
PHY_PTR4	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_PTR4	/;"	d
PHY_PWR_DOWN	include/mv88e6352.h	/^#define PHY_PWR_DOWN	/;"	d
PHY_PWR_DWN_INT	board/bf609-ezkit/soft_switch.h	/^#define PHY_PWR_DWN_INT /;"	d
PHY_PWR_PLL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_PWR_PLL_CTRL_ADDR	/;"	d
PHY_PWR_UP	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PHY_PWR_UP	/;"	d
PHY_RDDQS_RATIO_REGS	arch/arm/include/asm/emif.h	/^#define PHY_RDDQS_RATIO_REGS	/;"	d
PHY_READ_DELAY	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PHY_READ_DELAY(/;"	d
PHY_REF_CLK_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REF_CLK_ADDR	/;"	d
PHY_REG_CTRL1	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_CTRL1	/;"	d	file:
PHY_REG_CTRL1_ENERGY_DET_OFF	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_CTRL1_ENERGY_DET_OFF	/;"	d	file:
PHY_REG_CTRL1_ENERGY_DET_SENSE_ONLY	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_CTRL1_ENERGY_DET_SENSE_ONLY	/;"	d	file:
PHY_REG_CTRL1_ENERGY_DET_SENSE_XMIT	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_CTRL1_ENERGY_DET_SENSE_XMIT	/;"	d	file:
PHY_REG_CTRL1_ENERGY_DET_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_CTRL1_ENERGY_DET_SHIFT	/;"	d	file:
PHY_REG_CTRL1_ENERGY_DET_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_CTRL1_ENERGY_DET_WIDTH	/;"	d	file:
PHY_REG_ERR_CNT_CONST_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REG_ERR_CNT_CONST_CTRL_ADDR	/;"	d
PHY_REG_FILE_ACCESS	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PHY_REG_FILE_ACCESS	/;"	d
PHY_REG_GEN2_SETTINGS_2	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REG_GEN2_SETTINGS_2	/;"	d
PHY_REG_GEN2_SETTINGS_3	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REG_GEN2_SETTINGS_3	/;"	d
PHY_REG_IFACE_REF_CLK_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REG_IFACE_REF_CLK_CTRL_ADDR	/;"	d
PHY_REG_KVCO_CAL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REG_KVCO_CAL_CTRL_ADDR	/;"	d
PHY_REG_MASK	drivers/net/cpsw.c	/^#define PHY_REG_MASK	/;"	d	file:
PHY_REG_PAGE	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_PAGE	/;"	d	file:
PHY_REG_PHCON1	drivers/net/enc28j60.h	/^#define PHY_REG_PHCON1	/;"	d
PHY_REG_PHCON2	drivers/net/enc28j60.h	/^#define PHY_REG_PHCON2	/;"	d
PHY_REG_PHID1	drivers/net/enc28j60.h	/^#define PHY_REG_PHID1	/;"	d
PHY_REG_PHID2	drivers/net/enc28j60.h	/^#define PHY_REG_PHID2	/;"	d
PHY_REG_PHLCON	drivers/net/enc28j60.h	/^#define PHY_REG_PHLCON	/;"	d
PHY_REG_PHSTAT1	drivers/net/enc28j60.h	/^#define PHY_REG_PHSTAT1	/;"	d
PHY_REG_PHSTAT2	drivers/net/enc28j60.h	/^#define PHY_REG_PHSTAT2	/;"	d
PHY_REG_SHIFT	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_REG_SHIFT	/;"	d
PHY_REG_SHIFT	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_REG_SHIFT	/;"	d
PHY_REG_STATUS1	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1	/;"	d	file:
PHY_REG_STATUS1_100	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_100	/;"	d	file:
PHY_REG_STATUS1_DUPLEX	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_DUPLEX	/;"	d	file:
PHY_REG_STATUS1_ENERGY	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_ENERGY	/;"	d	file:
PHY_REG_STATUS1_GBIT	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_GBIT	/;"	d	file:
PHY_REG_STATUS1_LINK	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_LINK	/;"	d	file:
PHY_REG_STATUS1_SPDDONE	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_SPDDONE	/;"	d	file:
PHY_REG_STATUS1_SPEED	drivers/net/phy/mv88e61xx.c	/^#define PHY_REG_STATUS1_SPEED	/;"	d	file:
PHY_REG_UNIT_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_REG_UNIT_CTRL_ADDR	/;"	d
PHY_REG_WR_DQ_SLAVE_RATIO_REGS	arch/arm/include/asm/emif.h	/^#define PHY_REG_WR_DQ_SLAVE_RATIO_REGS	/;"	d
PHY_REVISION_MASK	drivers/net/e1000.h	/^#define PHY_REVISION_MASK	/;"	d
PHY_RGMII_CLK_STABLE	board/keymile/km_arm/km_arm.c	/^#define PHY_RGMII_CLK_STABLE	/;"	d	file:
PHY_RIDR	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_RIDR	/;"	d
PHY_RMT_REG	drivers/net/smc91111.h	/^#define PHY_RMT_REG	/;"	d
PHY_RON_103OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_103OHM		= 3,$/;"	e	enum:__anon957231910303	file:
PHY_RON_155OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_155OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_28OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_28OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_309OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_309OHM		= 1,$/;"	e	enum:__anon957231910303	file:
PHY_RON_31OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_31OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_34OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_34OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_39OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_39OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_44OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_44OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_45OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_45OHM		= 7,$/;"	e	enum:__anon957231910303	file:
PHY_RON_52OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_52OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_62OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_62OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_63OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_63OHM		= 5,$/;"	e	enum:__anon957231910303	file:
PHY_RON_77OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_77OHM,$/;"	e	enum:__anon957231910303	file:
PHY_RON_DISABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RON_DISABLE		= 0,$/;"	e	enum:__anon957231910303	file:
PHY_RTT_108OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_108OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_123OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_123OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_124OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_124OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_144OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_144OHM		= 0xa,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_145OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_145OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_172OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_172OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_215OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_215OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_216OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_216OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_287OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_287OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_431OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_431OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_78OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_78OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_861OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_861OHM		= 1,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_86OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_86OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_96OHM	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_96OHM,$/;"	e	enum:__anon957231910403	file:
PHY_RTT_DISABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PHY_RTT_DISABLE		= 0,$/;"	e	enum:__anon957231910403	file:
PHY_RX_OVRD_IN_LO	drivers/pci/pcie_imx.c	/^#define PHY_RX_OVRD_IN_LO /;"	d	file:
PHY_RX_OVRD_IN_LO_RX_DATA_EN	drivers/pci/pcie_imx.c	/^#define PHY_RX_OVRD_IN_LO_RX_DATA_EN /;"	d	file:
PHY_RX_OVRD_IN_LO_RX_PLL_EN	drivers/pci/pcie_imx.c	/^#define PHY_RX_OVRD_IN_LO_RX_PLL_EN /;"	d	file:
PHY_Restart_Auto_Nego	drivers/net/rtl8169.c	/^	PHY_Restart_Auto_Nego = 0x0200,$/;"	e	enum:RTL8169_register_content	file:
PHY_SCL_CONFIG_1	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_CONFIG_1	/;"	d
PHY_SCL_CONFIG_2	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_CONFIG_2	/;"	d
PHY_SCL_CONFIG_3	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_CONFIG_3	/;"	d
PHY_SCL_CONFIG_4	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_CONFIG_4	/;"	d
PHY_SCL_DATA_0	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_DATA_0	/;"	d
PHY_SCL_DATA_1	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_DATA_1	/;"	d
PHY_SCL_GATE_TIMING	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_GATE_TIMING	/;"	d
PHY_SCL_LATENCY	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_LATENCY	/;"	d
PHY_SCL_MAIN_CLK_DELTA	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_MAIN_CLK_DELTA	/;"	d
PHY_SCL_START	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_START	/;"	d
PHY_SCL_START_ADDR	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_START_ADDR	/;"	d
PHY_SCL_START_GO_DONE	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define   PHY_SCL_START_GO_DONE	/;"	d
PHY_SCL_WINDOW_TRIM	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SCL_WINDOW_TRIM	/;"	d
PHY_SGMII_CR_DEF_VAL	include/fsl_memac.h	/^#define PHY_SGMII_CR_DEF_VAL /;"	d
PHY_SGMII_CR_PHY_RESET	include/fsl_memac.h	/^#define PHY_SGMII_CR_PHY_RESET /;"	d
PHY_SGMII_CR_RESET_AN	include/fsl_memac.h	/^#define PHY_SGMII_CR_RESET_AN /;"	d
PHY_SGMII_DEV_ABILITY_SGMII	include/fsl_memac.h	/^#define PHY_SGMII_DEV_ABILITY_SGMII /;"	d
PHY_SGMII_IF_MODE_AN	include/fsl_memac.h	/^#define PHY_SGMII_IF_MODE_AN /;"	d
PHY_SGMII_IF_MODE_SGMII	include/fsl_memac.h	/^#define PHY_SGMII_IF_MODE_SGMII /;"	d
PHY_SHFT	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_SHFT(/;"	d
PHY_SLV_DLY_WIDTH	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_SLV_DLY_WIDTH	/;"	d
PHY_SOF	drivers/net/e1000.h	/^#define PHY_SOF	/;"	d
PHY_SPEC_CTRL	include/mv88e6352.h	/^#define PHY_SPEC_CTRL	/;"	d
PHY_SPEC_CTRL_REG	board/keymile/km_arm/km_arm.c	/^#define	PHY_SPEC_CTRL_REG	/;"	d	file:
PHY_SPEED_10_3125G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_10_3125G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_10_3125G	/;"	d
PHY_SPEED_1_25G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_25G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_25G	/;"	d
PHY_SPEED_1_5G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_1_5G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_1_5G	/;"	d
PHY_SPEED_2_5G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_2_5G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_2_5G	/;"	d
PHY_SPEED_3G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3G	/;"	d
PHY_SPEED_3_125G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_3_125G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_3_125G	/;"	d
PHY_SPEED_5G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_5G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_5G	/;"	d
PHY_SPEED_6G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6G	/;"	d
PHY_SPEED_6_25G	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_6_25G	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_6_25G	/;"	d
PHY_SPEED_INVALID	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_INVALID	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_INVALID	/;"	d
PHY_SPEED_MAX	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_SPEED_MAX	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_SPEED_MAX	/;"	d
PHY_STATUS	drivers/net/e1000.h	/^#define PHY_STATUS	/;"	d
PHY_STATUS	include/mv88e6352.h	/^#define PHY_STATUS	/;"	d
PHY_STATUS_BIT	drivers/net/sh_eth.h	/^enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, };$/;"	g
PHY_STATUS_REG	drivers/net/tsi108_eth.c	/^#define PHY_STATUS_REG	/;"	d	file:
PHY_STAT_100BASE_T2_FD	drivers/net/tsi108_eth.c	/^#define PHY_STAT_100BASE_T2_FD	/;"	d	file:
PHY_STAT_100BASE_T2_HD	drivers/net/tsi108_eth.c	/^#define PHY_STAT_100BASE_T2_HD	/;"	d	file:
PHY_STAT_100BASE_T4	drivers/net/tsi108_eth.c	/^#define PHY_STAT_100BASE_T4	/;"	d	file:
PHY_STAT_100BASE_X_FD	drivers/net/tsi108_eth.c	/^#define PHY_STAT_100BASE_X_FD	/;"	d	file:
PHY_STAT_100BASE_X_HD	drivers/net/tsi108_eth.c	/^#define PHY_STAT_100BASE_X_HD	/;"	d	file:
PHY_STAT_10BASE_T_FD	drivers/net/tsi108_eth.c	/^#define PHY_STAT_10BASE_T_FD	/;"	d	file:
PHY_STAT_10BASE_T_HD	drivers/net/tsi108_eth.c	/^#define PHY_STAT_10BASE_T_HD	/;"	d	file:
PHY_STAT_ANEG_ACK	drivers/net/smc91111.h	/^#define PHY_STAT_ANEG_ACK	/;"	d
PHY_STAT_AN_CAP	drivers/net/tsi108_eth.c	/^#define PHY_STAT_AN_CAP	/;"	d	file:
PHY_STAT_AN_COMPLETE	drivers/net/tsi108_eth.c	/^#define PHY_STAT_AN_COMPLETE	/;"	d	file:
PHY_STAT_CAP_ANEG	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_ANEG	/;"	d
PHY_STAT_CAP_SUPR	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_SUPR	/;"	d
PHY_STAT_CAP_T4	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_T4	/;"	d
PHY_STAT_CAP_TF	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_TF	/;"	d
PHY_STAT_CAP_TH	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_TH	/;"	d
PHY_STAT_CAP_TXF	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_TXF	/;"	d
PHY_STAT_CAP_TXH	drivers/net/smc91111.h	/^#define PHY_STAT_CAP_TXH	/;"	d
PHY_STAT_EXREG	drivers/net/smc91111.h	/^#define PHY_STAT_EXREG	/;"	d
PHY_STAT_EXT_CAP	drivers/net/tsi108_eth.c	/^#define PHY_STAT_EXT_CAP	/;"	d	file:
PHY_STAT_EXT_STAT	drivers/net/tsi108_eth.c	/^#define PHY_STAT_EXT_STAT	/;"	d	file:
PHY_STAT_JAB	drivers/net/smc91111.h	/^#define PHY_STAT_JAB	/;"	d
PHY_STAT_JABBER	drivers/net/tsi108_eth.c	/^#define PHY_STAT_JABBER	/;"	d	file:
PHY_STAT_LAN_ON	drivers/usb/eth/r8152.h	/^#define PHY_STAT_LAN_ON	/;"	d
PHY_STAT_LINK	drivers/net/smc91111.h	/^#define PHY_STAT_LINK	/;"	d
PHY_STAT_LINK_UP	drivers/net/tsi108_eth.c	/^#define PHY_STAT_LINK_UP	/;"	d	file:
PHY_STAT_MASK	drivers/usb/eth/r8152.h	/^#define PHY_STAT_MASK	/;"	d
PHY_STAT_MFPS	drivers/net/tsi108_eth.c	/^#define PHY_STAT_MFPS	/;"	d	file:
PHY_STAT_PWRDN	drivers/usb/eth/r8152.h	/^#define PHY_STAT_PWRDN	/;"	d
PHY_STAT_REG	drivers/net/rtl8169.c	/^	PHY_STAT_REG = 1,$/;"	e	enum:RTL8169_register_content	file:
PHY_STAT_REG	drivers/net/smc91111.h	/^#define PHY_STAT_REG	/;"	d
PHY_STAT_REM_FAULT	drivers/net/tsi108_eth.c	/^#define PHY_STAT_REM_FAULT	/;"	d	file:
PHY_STAT_REM_FLT	drivers/net/smc91111.h	/^#define PHY_STAT_REM_FLT	/;"	d
PHY_STAT_RESERVED	drivers/net/tsi108_eth.c	/^#define PHY_STAT_RESERVED	/;"	d	file:
PHY_ST_LINK	drivers/net/sh_eth.h	/^enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, };$/;"	e	enum:PHY_STATUS_BIT
PHY_SW_RST0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PHY_SW_RST0 /;"	d
PHY_SW_RST1	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PHY_SW_RST1 /;"	d
PHY_SYNC_PATTERN_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PHY_SYNC_PATTERN_ADDR	/;"	d
PHY_SYS_CLK_EN	arch/arm/mach-davinci/et1011c.c	/^#define PHY_SYS_CLK_EN	/;"	d	file:
PHY_TERM_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define PHY_TERM_EN	/;"	d
PHY_TURNAROUND	drivers/net/e1000.h	/^#define PHY_TURNAROUND	/;"	d
PHY_TXTERM	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_TXTERM = 0x19,$/;"	e	enum:__anonae42e8fa0203
PHY_TX_NORMAL_POLARITY	drivers/net/e1000.h	/^#define PHY_TX_NORMAL_POLARITY	/;"	d
PHY_TX_POLARITY_MASK	drivers/net/e1000.h	/^#define PHY_TX_POLARITY_MASK	/;"	d
PHY_TYPE_INVALID	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_INVALID	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_INVALID	/;"	d
PHY_TYPE_KR	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_KR	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_KR	/;"	d
PHY_TYPE_MAX	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_MAX	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_MAX	/;"	d
PHY_TYPE_PCIE	arch/arm/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	arch/microblaze/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	arch/mips/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	arch/nios2/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	arch/sandbox/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	arch/x86/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	arch/xtensa/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PCIE	include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_PCIE	/;"	d
PHY_TYPE_PEX0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX0	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX0	/;"	d
PHY_TYPE_PEX1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX1	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX1	/;"	d
PHY_TYPE_PEX2	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX2	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX2	/;"	d
PHY_TYPE_PEX3	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_PEX3	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_PEX3	/;"	d
PHY_TYPE_QSGMII	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_QSGMII	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_QSGMII	/;"	d
PHY_TYPE_RXAUI0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI0	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI0	/;"	d
PHY_TYPE_RXAUI1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_RXAUI1	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_RXAUI1	/;"	d
PHY_TYPE_SATA	arch/arm/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	arch/microblaze/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	arch/mips/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	arch/nios2/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	arch/sandbox/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	arch/x86/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	arch/xtensa/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA	include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_SATA	/;"	d
PHY_TYPE_SATA0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA0	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA0	/;"	d
PHY_TYPE_SATA1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA1	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA1	/;"	d
PHY_TYPE_SATA2	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA2	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA2	/;"	d
PHY_TYPE_SATA3	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SATA3	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SATA3	/;"	d
PHY_TYPE_SGMII0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII0	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII0	/;"	d
PHY_TYPE_SGMII1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII1	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII1	/;"	d
PHY_TYPE_SGMII2	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII2	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII2	/;"	d
PHY_TYPE_SGMII3	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_SGMII3	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_SGMII3	/;"	d
PHY_TYPE_UNCONNECTED	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_UNCONNECTED	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_UNCONNECTED	/;"	d
PHY_TYPE_USB2	arch/arm/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	arch/microblaze/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	arch/mips/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	arch/nios2/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	arch/sandbox/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	arch/x86/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	arch/xtensa/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB2	include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB2	/;"	d
PHY_TYPE_USB3	arch/arm/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	arch/microblaze/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	arch/mips/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	arch/nios2/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	arch/sandbox/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	arch/x86/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	arch/xtensa/dts/include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3	include/dt-bindings/phy/phy.h	/^#define PHY_TYPE_USB3	/;"	d
PHY_TYPE_USB3_DEVICE	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_DEVICE	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_DEVICE	/;"	d
PHY_TYPE_USB3_HOST0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST0	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST0	/;"	d
PHY_TYPE_USB3_HOST1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_USB3_HOST1	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_USB3_HOST1	/;"	d
PHY_TYPE_XAUI0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI0	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI0	/;"	d
PHY_TYPE_XAUI1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI1	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI1	/;"	d
PHY_TYPE_XAUI2	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI2	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI2	/;"	d
PHY_TYPE_XAUI3	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_TYPE_XAUI3	include/dt-bindings/comphy/comphy_data.h	/^#define PHY_TYPE_XAUI3	/;"	d
PHY_UID_CS4340	include/phy.h	/^#define PHY_UID_CS4340 /;"	d
PHY_UID_TN2020	include/phy.h	/^#define PHY_UID_TN2020	/;"	d
PHY_UNIQUIFY_TSMC_IO_1	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_UNIQUIFY_TSMC_IO_1	/;"	d
PHY_UNQ_ANALOG_DLL_1	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_UNQ_ANALOG_DLL_1	/;"	d
PHY_UNQ_ANALOG_DLL_2	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_UNQ_ANALOG_DLL_2	/;"	d
PHY_VLEVCTRL	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	PHY_VLEVCTRL = 0x0e,$/;"	e	enum:__anonae42e8fa0203
PHY_VREF_TRAINING	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_VREF_TRAINING	/;"	d
PHY_WAIT_ITERATIONS	drivers/net/armada100_fec.h	/^#define PHY_WAIT_ITERATIONS /;"	d
PHY_WAIT_MICRO_SECONDS	drivers/net/armada100_fec.h	/^#define PHY_WAIT_MICRO_SECONDS /;"	d
PHY_WLD_MASK	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_WLD_MASK(/;"	d	file:
PHY_WRITE_DELAY	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define PHY_WRITE_DELAY(/;"	d
PHY_WRLVL_AUTOINC_TRIM	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_WRLVL_AUTOINC_TRIM	/;"	d
PHY_WRLVL_DYN_ODT	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_WRLVL_DYN_ODT	/;"	d
PHY_WRLVL_ON_OFF	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define PHY_WRLVL_ON_OFF	/;"	d
PHY_ZQ0CR1	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_ZQ0CR1	/;"	d	file:
PHY_ZQ1CR1	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_ZQ1CR1	/;"	d	file:
PHY_ZQ2CR1	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define PHY_ZQ2CR1	/;"	d	file:
PHY_ZQ_BASE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ZQ_BASE	/;"	d
PHY_ZQ_CR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ZQ_CR0	/;"	d
PHY_ZQ_CR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ZQ_CR1	/;"	d
PHY_ZQ_SR0	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ZQ_SR0	/;"	d
PHY_ZQ_SR1	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ZQ_SR1	/;"	d
PHY_ZQ_STRIDE	arch/arm/mach-uniphier/dram/ddrphy-regs.h	/^#define PHY_ZQ_STRIDE	/;"	d
PHY_reg4	drivers/net/uli526x.c	/^	u16 PHY_reg4;			\/* Saved Phyxcer register 4 value *\/$/;"	m	struct:uli526x_board_info	typeref:typename:u16	file:
PHYstatus	drivers/net/rtl8169.c	/^	PHYstatus = 0x6C,$/;"	e	enum:RTL8169_registers	file:
PI0	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI0	/;"	d
PI1	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI1	/;"	d
PI10	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI10	/;"	d
PI11	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI11	/;"	d
PI12	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI12	/;"	d
PI13	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI13	/;"	d
PI14	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI14	/;"	d
PI15	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI15	/;"	d
PI2	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI2	/;"	d
PI3	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI3	/;"	d
PI4	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI4	/;"	d
PI5	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI5	/;"	d
PI6	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI6	/;"	d
PI7	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI7	/;"	d
PI8	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI8	/;"	d
PI9	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define PI9	/;"	d
PIAR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PIAR	/;"	d
PIBAR_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define PIBAR_MASK	/;"	d
PIBAR_MASK	include/mpc83xx.h	/^#define PIBAR_MASK	/;"	d
PIBAR_REG0	arch/powerpc/include/asm/m8260_pci.h	/^#define PIBAR_REG0 /;"	d
PIBAR_REG0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PIBAR_REG0 /;"	d
PIBAR_REG1	arch/powerpc/include/asm/m8260_pci.h	/^#define PIBAR_REG1 /;"	d
PIBAR_REG1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PIBAR_REG1 /;"	d
PIC32_CFG_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_CFG_BASE	/;"	d
PIC32_DDR2C_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_DDR2C_BASE	/;"	d
PIC32_DDR2P_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_DDR2P_BASE	/;"	d
PIC32_EBI_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_EBI_BASE	/;"	d
PIC32_EMAC1CFG1	drivers/net/pic32_eth.h	/^#define PIC32_EMAC1CFG1	/;"	d
PIC32_ETH	drivers/net/Kconfig	/^config PIC32_ETH$/;"	c
PIC32_GPIO	drivers/gpio/Kconfig	/^config PIC32_GPIO$/;"	c	menu:GPIO Support
PIC32_MDIO_NAME	drivers/net/pic32_eth.h	/^#define PIC32_MDIO_NAME /;"	d
PIC32_NVM_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_NVM_BASE	/;"	d
PIC32_OSC_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_OSC_BASE	/;"	d
PIC32_PINCTRL	drivers/pinctrl/Kconfig	/^config PIC32_PINCTRL$/;"	c	menu:Pin controllers
PIC32_PINS_PER_PORT	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PINS_PER_PORT = 16,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_A	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_A = 0,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_B	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_B = 1,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_C	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_C = 2,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_D	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_D = 3,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_E	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_E = 4,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_F	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_F = 5,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_G	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_G = 6,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_H	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_H = 7,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_J	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_J = 8, \/* no PORT_I *\/$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_PORT_K	drivers/pinctrl/pinctrl_pic32.c	/^	PIC32_PORT_K = 9,$/;"	e	enum:__anon5dd7f8ab0103	file:
PIC32_RX_EP_MASK	drivers/usb/musb-new/pic32.c	/^#define PIC32_RX_EP_MASK	/;"	d	file:
PIC32_SDHCI	drivers/mmc/Kconfig	/^config PIC32_SDHCI$/;"	c	menu:MMC Host controller Support
PIC32_SERIAL	drivers/serial/Kconfig	/^config PIC32_SERIAL$/;"	c	menu:Serial drivers
PIC32_SPI	drivers/spi/Kconfig	/^config PIC32_SPI$/;"	c	menu:SPI Support
PIC32_SPI1_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_SPI1_BASE	/;"	d
PIC32_SPI_BAUD_MASK	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_BAUD_MASK	/;"	d	file:
PIC32_SPI_CTRL_BPW_16	drivers/spi/pic32_spi.c	/^#define  PIC32_SPI_CTRL_BPW_16	/;"	d	file:
PIC32_SPI_CTRL_BPW_32	drivers/spi/pic32_spi.c	/^#define  PIC32_SPI_CTRL_BPW_32	/;"	d	file:
PIC32_SPI_CTRL_BPW_8	drivers/spi/pic32_spi.c	/^#define  PIC32_SPI_CTRL_BPW_8	/;"	d	file:
PIC32_SPI_CTRL_BPW_MASK	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_BPW_MASK	/;"	d	file:
PIC32_SPI_CTRL_BPW_SHIFT	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_BPW_SHIFT	/;"	d	file:
PIC32_SPI_CTRL_CKE	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_CKE	/;"	d	file:
PIC32_SPI_CTRL_CKP	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_CKP	/;"	d	file:
PIC32_SPI_CTRL_ENHBUF	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_ENHBUF	/;"	d	file:
PIC32_SPI_CTRL_FRMEN	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_FRMEN	/;"	d	file:
PIC32_SPI_CTRL_MCLKSEL	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_MCLKSEL	/;"	d	file:
PIC32_SPI_CTRL_MSSEN	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_MSSEN	/;"	d	file:
PIC32_SPI_CTRL_MSTEN	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_MSTEN	/;"	d	file:
PIC32_SPI_CTRL_ON	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_ON	/;"	d	file:
PIC32_SPI_CTRL_SMP	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_CTRL_SMP	/;"	d	file:
PIC32_SPI_STAT_RF_LVL_MASK	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_STAT_RF_LVL_MASK	/;"	d	file:
PIC32_SPI_STAT_RF_LVL_SHIFT	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_STAT_RF_LVL_SHIFT	/;"	d	file:
PIC32_SPI_STAT_RX_OV	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_STAT_RX_OV	/;"	d	file:
PIC32_SPI_STAT_TF_LVL_MASK	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_STAT_TF_LVL_MASK	/;"	d	file:
PIC32_SPI_STAT_TF_LVL_SHIFT	drivers/spi/pic32_spi.c	/^#define PIC32_SPI_STAT_TF_LVL_SHIFT	/;"	d	file:
PIC32_SQI_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_SQI_BASE	/;"	d
PIC32_TX_EP_MASK	drivers/usb/musb-new/pic32.c	/^#define PIC32_TX_EP_MASK	/;"	d	file:
PIC32_USB_CORE_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_USB_CORE_BASE	/;"	d
PIC32_USB_CTRL_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PIC32_USB_CTRL_BASE	/;"	d
PICMR0_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define PICMR0_MASK_ATTRIB	/;"	d	file:
PICMR0_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define PICMR0_MASK_ATTRIB /;"	d	file:
PICMR_ENABLE	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_ENABLE /;"	d
PICMR_ENABLE	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_ENABLE /;"	d
PICMR_MASK_128KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_128KB /;"	d
PICMR_MASK_128KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_128KB /;"	d
PICMR_MASK_128MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_128MB /;"	d
PICMR_MASK_128MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_128MB /;"	d
PICMR_MASK_16KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_16KB /;"	d
PICMR_MASK_16KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_16KB /;"	d
PICMR_MASK_16MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_16MB /;"	d
PICMR_MASK_16MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_16MB /;"	d
PICMR_MASK_1GB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_1GB /;"	d
PICMR_MASK_1GB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_1GB /;"	d
PICMR_MASK_1MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_1MB /;"	d
PICMR_MASK_1MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_1MB /;"	d
PICMR_MASK_256KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_256KB /;"	d
PICMR_MASK_256KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_256KB /;"	d
PICMR_MASK_256MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_256MB /;"	d
PICMR_MASK_256MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_256MB /;"	d
PICMR_MASK_2MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_2MB /;"	d
PICMR_MASK_2MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_2MB /;"	d
PICMR_MASK_32KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_32KB /;"	d
PICMR_MASK_32KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_32KB /;"	d
PICMR_MASK_32MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_32MB /;"	d
PICMR_MASK_32MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_32MB /;"	d
PICMR_MASK_4KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_4KB /;"	d
PICMR_MASK_4KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_4KB /;"	d
PICMR_MASK_4MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_4MB /;"	d
PICMR_MASK_4MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_4MB /;"	d
PICMR_MASK_512KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_512KB /;"	d
PICMR_MASK_512KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_512KB /;"	d
PICMR_MASK_512MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_512MB /;"	d
PICMR_MASK_512MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_512MB /;"	d
PICMR_MASK_64KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_64KB /;"	d
PICMR_MASK_64KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_64KB /;"	d
PICMR_MASK_64MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_64MB /;"	d
PICMR_MASK_64MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_64MB /;"	d
PICMR_MASK_8KB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_8KB /;"	d
PICMR_MASK_8KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_8KB /;"	d
PICMR_MASK_8MB	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_MASK_8MB /;"	d
PICMR_MASK_8MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_MASK_8MB /;"	d
PICMR_NO_SNOOP_EN	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_NO_SNOOP_EN /;"	d
PICMR_NO_SNOOP_EN	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_NO_SNOOP_EN /;"	d
PICMR_PREFETCH_EN	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_PREFETCH_EN /;"	d
PICMR_PREFETCH_EN	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_PREFETCH_EN /;"	d
PICMR_REG0	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_REG0 /;"	d
PICMR_REG0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_REG0 /;"	d
PICMR_REG1	arch/powerpc/include/asm/m8260_pci.h	/^#define PICMR_REG1 /;"	d
PICMR_REG1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PICMR_REG1 /;"	d
PICOS2KHZ	include/linux/fb.h	/^#define PICOS2KHZ(/;"	d
PICR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PICR	/;"	d
PICR1_ADDRESS_MAP	include/mpc106.h	/^#define PICR1_ADDRESS_MAP	/;"	d
PICR1_CF_APARK	include/mpc106.h	/^#define PICR1_CF_APARK	/;"	d
PICR1_CF_BREAD_WS	include/mpc106.h	/^#define PICR1_CF_BREAD_WS(/;"	d
PICR1_CF_CACHE_1G	include/mpc106.h	/^#define PICR1_CF_CACHE_1G	/;"	d
PICR1_CF_CBA	include/mpc106.h	/^#define PICR1_CF_CBA(/;"	d
PICR1_CF_DPARK	include/mpc106.h	/^#define PICR1_CF_DPARK	/;"	d
PICR1_CF_L2_CACHE_MASK	include/mpc106.h	/^#define PICR1_CF_L2_CACHE_MASK	/;"	d
PICR1_CF_L2_COPY_BACK	include/mpc106.h	/^#define PICR1_CF_L2_COPY_BACK	/;"	d
PICR1_CF_LOOP_SNOOP	include/mpc106.h	/^#define PICR1_CF_LOOP_SNOOP	/;"	d
PICR1_MCP_EN	include/mpc106.h	/^#define PICR1_MCP_EN	/;"	d
PICR1_PROC_TYPE_603	include/mpc106.h	/^#define PICR1_PROC_TYPE_603	/;"	d
PICR1_PROC_TYPE_604	include/mpc106.h	/^#define PICR1_PROC_TYPE_604	/;"	d
PICR1_XIO_MODE	include/mpc106.h	/^#define PICR1_XIO_MODE	/;"	d
PICR2_CF_ADDR_ONLY_DISABLE	include/mpc106.h	/^#define PICR2_CF_ADDR_ONLY_DISABLE	/;"	d
PICR2_CF_APHASE_WS	include/mpc106.h	/^#define PICR2_CF_APHASE_WS(/;"	d
PICR2_CF_DATA_RAM_PBURST	include/mpc106.h	/^#define PICR2_CF_DATA_RAM_PBURST	/;"	d
PICR2_CF_FAST_CASTOUT	include/mpc106.h	/^#define PICR2_CF_FAST_CASTOUT	/;"	d
PICR2_CF_FLUSH_L2	include/mpc106.h	/^#define PICR2_CF_FLUSH_L2	/;"	d
PICR2_CF_HIT_HIGH	include/mpc106.h	/^#define PICR2_CF_HIT_HIGH	/;"	d
PICR2_CF_INV_MODE	include/mpc106.h	/^#define PICR2_CF_INV_MODE	/;"	d
PICR2_CF_L2_HIT_DELAY	include/mpc106.h	/^#define PICR2_CF_L2_HIT_DELAY(/;"	d
PICR2_CF_MOD_HIGH	include/mpc106.h	/^#define PICR2_CF_MOD_HIGH	/;"	d
PICR2_CF_SNOOP_WS	include/mpc106.h	/^#define PICR2_CF_SNOOP_WS(/;"	d
PICR2_CF_WDATA	include/mpc106.h	/^#define PICR2_CF_WDATA	/;"	d
PICR2_L2_EN	include/mpc106.h	/^#define PICR2_L2_EN	/;"	d
PICR2_L2_SIZE_1MB	include/mpc106.h	/^#define PICR2_L2_SIZE_1MB	/;"	d
PICR2_L2_SIZE_256K	include/mpc106.h	/^#define PICR2_L2_SIZE_256K	/;"	d
PICR2_L2_SIZE_512K	include/mpc106.h	/^#define PICR2_L2_SIZE_512K	/;"	d
PICR2_L2_UPDATE_EN	include/mpc106.h	/^#define PICR2_L2_UPDATE_EN	/;"	d
PICR_A	board/espt/lowlevel_init.S	/^PICR_A:	.long	0xFFEF0010$/;"	l
PICR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PICR_A:		.long	0xffec0010$/;"	l
PICR_D	board/espt/lowlevel_init.S	/^PICR_D:	.word	0x0800$/;"	l
PICR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PICR_D:		.long	0x0000$/;"	l
PICR_FEIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PICR_FEIE	/;"	d
PID	drivers/usb/host/r8a66597.h	/^#define	PID	/;"	d
PID0	arch/powerpc/include/asm/processor.h	/^#define PID0	/;"	d
PID1	arch/powerpc/include/asm/processor.h	/^#define PID1	/;"	d
PID2	arch/powerpc/include/asm/processor.h	/^#define PID2	/;"	d
PIDEP	drivers/usb/host/sl811.h	/^#define PIDEP(/;"	d
PID_BUF	drivers/usb/host/r8a66597.h	/^#define	  PID_BUF	/;"	d
PID_MASK	drivers/power/pmic/pm8916.c	/^#define PID_MASK /;"	d	file:
PID_NAK	drivers/usb/host/r8a66597.h	/^#define	  PID_NAK	/;"	d
PID_SHIFT	drivers/power/pmic/pm8916.c	/^#define PID_SHIFT /;"	d	file:
PID_STALL	drivers/usb/host/r8a66597.h	/^#define	  PID_STALL	/;"	d
PID_STALL11	drivers/usb/host/r8a66597.h	/^#define	  PID_STALL11	/;"	d
PIEBAR_EBA_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define PIEBAR_EBA_MASK	/;"	d
PIEBAR_EBA_MASK	include/mpc83xx.h	/^#define PIEBAR_EBA_MASK	/;"	d
PIGGY_PRESENT	board/keymile/common/common.h	/^#define PIGGY_PRESENT	/;"	d
PIIX4_IDE_DEV_ID	board/mpl/pip405/pip405.h	/^#define PIIX4_IDE_DEV_ID	/;"	d
PIIX4_ISA_APM_CONTRL	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_APM_CONTRL	/;"	d
PIIX4_ISA_APM_STATUS	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_APM_STATUS	/;"	d
PIIX4_ISA_COCPU_ERROR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_COCPU_ERROR	/;"	d
PIIX4_ISA_DMA1_CH0BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH0BA	/;"	d
PIIX4_ISA_DMA1_CH0CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH0CA	/;"	d
PIIX4_ISA_DMA1_CH0LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH0LPG	/;"	d
PIIX4_ISA_DMA1_CH1BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH1BA	/;"	d
PIIX4_ISA_DMA1_CH1CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH1CA	/;"	d
PIIX4_ISA_DMA1_CH1LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH1LPG	/;"	d
PIIX4_ISA_DMA1_CH2BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH2BA	/;"	d
PIIX4_ISA_DMA1_CH2CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH2CA	/;"	d
PIIX4_ISA_DMA1_CH2LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH2LPG	/;"	d
PIIX4_ISA_DMA1_CH3BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH3BA	/;"	d
PIIX4_ISA_DMA1_CH3CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH3CA	/;"	d
PIIX4_ISA_DMA1_CH3LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH3LPG	/;"	d
PIIX4_ISA_DMA1_CH_MOD	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CH_MOD	/;"	d
PIIX4_ISA_DMA1_CLR_M	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CLR_M	/;"	d
PIIX4_ISA_DMA1_CLR_PT	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CLR_PT	/;"	d
PIIX4_ISA_DMA1_CMDST	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_CMDST	/;"	d
PIIX4_ISA_DMA1_M_CLR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_M_CLR	/;"	d
PIIX4_ISA_DMA1_REQ	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_REQ	/;"	d
PIIX4_ISA_DMA1_RWAMB	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_RWAMB	/;"	d
PIIX4_ISA_DMA1_WSBM	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA1_WSBM	/;"	d
PIIX4_ISA_DMA2_CH0BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH0BA	/;"	d
PIIX4_ISA_DMA2_CH0CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH0CA	/;"	d
PIIX4_ISA_DMA2_CH1BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH1BA	/;"	d
PIIX4_ISA_DMA2_CH1CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH1CA	/;"	d
PIIX4_ISA_DMA2_CH1LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH1LPG	/;"	d
PIIX4_ISA_DMA2_CH2BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH2BA	/;"	d
PIIX4_ISA_DMA2_CH2CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH2CA	/;"	d
PIIX4_ISA_DMA2_CH2LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH2LPG	/;"	d
PIIX4_ISA_DMA2_CH3BA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH3BA	/;"	d
PIIX4_ISA_DMA2_CH3CA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH3CA	/;"	d
PIIX4_ISA_DMA2_CH3LPG	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH3LPG	/;"	d
PIIX4_ISA_DMA2_CH_MOD	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CH_MOD	/;"	d
PIIX4_ISA_DMA2_CLR_M	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CLR_M	/;"	d
PIIX4_ISA_DMA2_CLR_PT	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CLR_PT	/;"	d
PIIX4_ISA_DMA2_CMDST	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_CMDST	/;"	d
PIIX4_ISA_DMA2_LPGRFR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_LPGRFR	/;"	d
PIIX4_ISA_DMA2_M_CLR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_M_CLR	/;"	d
PIIX4_ISA_DMA2_REQ	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_REQ	/;"	d
PIIX4_ISA_DMA2_RWAMB	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_RWAMB	/;"	d
PIIX4_ISA_DMA2_WSBM	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_DMA2_WSBM	/;"	d
PIIX4_ISA_INT1_ELCR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_ELCR	/;"	d
PIIX4_ISA_INT1_ICW1	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_ICW1	/;"	d
PIIX4_ISA_INT1_ICW2	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_ICW2	/;"	d
PIIX4_ISA_INT1_ICW3	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_ICW3	/;"	d
PIIX4_ISA_INT1_ICW4	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_ICW4	/;"	d
PIIX4_ISA_INT1_OCW1	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_OCW1	/;"	d
PIIX4_ISA_INT1_OCW2	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_OCW2	/;"	d
PIIX4_ISA_INT1_OCW3	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT1_OCW3	/;"	d
PIIX4_ISA_INT2_ELCR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_ELCR	/;"	d
PIIX4_ISA_INT2_ICW1	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_ICW1	/;"	d
PIIX4_ISA_INT2_ICW2	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_ICW2	/;"	d
PIIX4_ISA_INT2_ICW3	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_ICW3	/;"	d
PIIX4_ISA_INT2_ICW4	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_ICW4	/;"	d
PIIX4_ISA_INT2_IMR	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_IMR	/;"	d
PIIX4_ISA_INT2_OCW1	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_OCW1	/;"	d
PIIX4_ISA_INT2_OCW2	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_OCW2	/;"	d
PIIX4_ISA_INT2_OCW3	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_INT2_OCW3	/;"	d
PIIX4_ISA_NMI_CNT_ST	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_NMI_CNT_ST	/;"	d
PIIX4_ISA_NMI_ENABLE	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_NMI_ENABLE	/;"	d
PIIX4_ISA_PORT_92	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_PORT_92	/;"	d
PIIX4_ISA_RST_XBUS	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_RST_XBUS	/;"	d
PIIX4_ISA_RTCEXT_DATA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_RTCEXT_DATA	/;"	d
PIIX4_ISA_RTCEXT_IND	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_RTCEXT_IND	/;"	d
PIIX4_ISA_RTC_DATA	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_RTC_DATA	/;"	d
PIIX4_ISA_RTC_INDEX	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_RTC_INDEX	/;"	d
PIIX4_ISA_TMR0_CNT_ST	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_TMR0_CNT_ST	/;"	d
PIIX4_ISA_TMR1_CNT_ST	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_TMR1_CNT_ST	/;"	d
PIIX4_ISA_TMR2_CNT_ST	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_TMR2_CNT_ST	/;"	d
PIIX4_ISA_TMR_TCW	board/mpl/common/piix4_pci.h	/^#define PIIX4_ISA_TMR_TCW	/;"	d
PIIX4_VENDOR_ID	board/mpl/pip405/pip405.h	/^#define PIIX4_VENDOR_ID	/;"	d
PIIX_IDE	arch/x86/include/asm/arch-qemu/device.h	/^#define PIIX_IDE	/;"	d
PIIX_ISA	arch/x86/include/asm/arch-qemu/device.h	/^#define PIIX_ISA	/;"	d
PIIX_PM	arch/x86/include/asm/arch-qemu/device.h	/^#define PIIX_PM	/;"	d
PIIX_USB	arch/x86/include/asm/arch-qemu/device.h	/^#define PIIX_USB	/;"	d
PIMAGE_BASE_RELOCATION	include/pe.h	/^} IMAGE_BASE_RELOCATION,*PIMAGE_BASE_RELOCATION;$/;"	t	typeref:struct:_IMAGE_BASE_RELOCATION *
PIMAGE_DATA_DIRECTORY	include/pe.h	/^} IMAGE_DATA_DIRECTORY, *PIMAGE_DATA_DIRECTORY;$/;"	t	typeref:struct:_IMAGE_DATA_DIRECTORY *
PIMAGE_DOS_HEADER	include/pe.h	/^} IMAGE_DOS_HEADER, *PIMAGE_DOS_HEADER;$/;"	t	typeref:struct:_IMAGE_DOS_HEADER *
PIMAGE_FILE_HEADER	include/pe.h	/^} IMAGE_FILE_HEADER, *PIMAGE_FILE_HEADER;$/;"	t	typeref:struct:_IMAGE_FILE_HEADER *
PIMAGE_NT_HEADERS32	include/pe.h	/^} IMAGE_NT_HEADERS32, *PIMAGE_NT_HEADERS32;$/;"	t	typeref:struct:_IMAGE_NT_HEADERS *
PIMAGE_NT_HEADERS64	include/pe.h	/^} IMAGE_NT_HEADERS64, *PIMAGE_NT_HEADERS64;$/;"	t	typeref:struct:_IMAGE_NT_HEADERS64 *
PIMAGE_OPTIONAL_HEADER32	include/pe.h	/^} IMAGE_OPTIONAL_HEADER32, *PIMAGE_OPTIONAL_HEADER32;$/;"	t	typeref:struct:_IMAGE_OPTIONAL_HEADER *
PIMAGE_OPTIONAL_HEADER64	include/pe.h	/^} IMAGE_OPTIONAL_HEADER64, *PIMAGE_OPTIONAL_HEADER64;$/;"	t	typeref:struct:_IMAGE_OPTIONAL_HEADER64 *
PIMAGE_RELOCATION	include/pe.h	/^} IMAGE_RELOCATION, *PIMAGE_RELOCATION;$/;"	t	typeref:struct:_IMAGE_RELOCATION *
PIMAGE_SECTION_HEADER	include/pe.h	/^} IMAGE_SECTION_HEADER, *PIMAGE_SECTION_HEADER;$/;"	t	typeref:struct:_IMAGE_SECTION_HEADER *
PIN	arch/arm/mach-tegra/tegra114/pinmux.c	/^#define PIN(/;"	d	file:
PIN	arch/arm/mach-tegra/tegra124/pinmux.c	/^#define PIN(/;"	d	file:
PIN	arch/arm/mach-tegra/tegra20/pinmux.c	/^#define PIN(/;"	d	file:
PIN	arch/arm/mach-tegra/tegra210/pinmux.c	/^#define PIN(/;"	d	file:
PIN	arch/arm/mach-tegra/tegra30/pinmux.c	/^#define PIN(/;"	d	file:
PIN	drivers/pinctrl/meson/pinctrl-meson.h	/^#define PIN(/;"	d
PINALL	arch/arm/mach-tegra/tegra20/pinmux.c	/^#define PINALL(/;"	d	file:
PINCFG	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/p2571/pinmux-config-p2571.h	/^#define PINCFG(/;"	d
PINCFG	board/nvidia/venice2/pinmux-config-venice2.h	/^#define PINCFG(/;"	d
PINCFG	drivers/usb/host/r8a66597.h	/^#define PINCFG	/;"	d
PINCNTL_RSV_MSK	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define PINCNTL_RSV_MSK	/;"	d
PINCONF	drivers/pinctrl/Kconfig	/^config PINCONF$/;"	c	menu:Pin controllers
PINCTRL	drivers/pinctrl/Kconfig	/^config PINCTRL$/;"	c	menu:Pin controllers
PINCTRL_AT91PIO4	drivers/pinctrl/Kconfig	/^config PINCTRL_AT91PIO4$/;"	c	menu:Pin controllers
PINCTRL_BANKS	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_BANKS	/;"	d	file:
PINCTRL_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PINCTRL_BASE	/;"	d
PINCTRL_CTRL_CLKGATE	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_CLKGATE	/;"	d
PINCTRL_CTRL_IRQOUT0	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_IRQOUT0	/;"	d
PINCTRL_CTRL_IRQOUT1	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_IRQOUT1	/;"	d
PINCTRL_CTRL_IRQOUT2	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_IRQOUT2	/;"	d
PINCTRL_CTRL_IRQOUT3	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_IRQOUT3	/;"	d
PINCTRL_CTRL_IRQOUT4	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_IRQOUT4	/;"	d
PINCTRL_CTRL_PRESENT0	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_PRESENT0	/;"	d
PINCTRL_CTRL_PRESENT1	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_PRESENT1	/;"	d
PINCTRL_CTRL_PRESENT2	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_PRESENT2	/;"	d
PINCTRL_CTRL_PRESENT3	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_PRESENT3	/;"	d
PINCTRL_CTRL_PRESENT4	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_PRESENT4	/;"	d
PINCTRL_CTRL_SFTRST	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_CTRL_SFTRST	/;"	d
PINCTRL_DIN	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_DIN(/;"	d	file:
PINCTRL_DIN0_DIN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN0_DIN_MASK	/;"	d
PINCTRL_DIN0_DIN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN0_DIN_OFFSET	/;"	d
PINCTRL_DIN1_DIN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN1_DIN_MASK	/;"	d
PINCTRL_DIN1_DIN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN1_DIN_OFFSET	/;"	d
PINCTRL_DIN2_DIN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN2_DIN_MASK	/;"	d
PINCTRL_DIN2_DIN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN2_DIN_OFFSET	/;"	d
PINCTRL_DIN3_DIN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN3_DIN_MASK	/;"	d
PINCTRL_DIN3_DIN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN3_DIN_OFFSET	/;"	d
PINCTRL_DIN4_DIN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN4_DIN_MASK	/;"	d
PINCTRL_DIN4_DIN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DIN4_DIN_OFFSET	/;"	d
PINCTRL_DOE	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_DOE(/;"	d	file:
PINCTRL_DOE0_DOE_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE0_DOE_MASK	/;"	d
PINCTRL_DOE0_DOE_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE0_DOE_OFFSET	/;"	d
PINCTRL_DOE1_DOE_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE1_DOE_MASK	/;"	d
PINCTRL_DOE1_DOE_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE1_DOE_OFFSET	/;"	d
PINCTRL_DOE2_DOE_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE2_DOE_MASK	/;"	d
PINCTRL_DOE2_DOE_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE2_DOE_OFFSET	/;"	d
PINCTRL_DOE3_DOE_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE3_DOE_MASK	/;"	d
PINCTRL_DOE3_DOE_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE3_DOE_OFFSET	/;"	d
PINCTRL_DOE4_DOE_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE4_DOE_MASK	/;"	d
PINCTRL_DOE4_DOE_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOE4_DOE_OFFSET	/;"	d
PINCTRL_DOUT	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_DOUT(/;"	d	file:
PINCTRL_DOUT0_DOUT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT0_DOUT_MASK	/;"	d
PINCTRL_DOUT0_DOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT0_DOUT_OFFSET	/;"	d
PINCTRL_DOUT1_DOUT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT1_DOUT_MASK	/;"	d
PINCTRL_DOUT1_DOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT1_DOUT_OFFSET	/;"	d
PINCTRL_DOUT2_DOUT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT2_DOUT_MASK	/;"	d
PINCTRL_DOUT2_DOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT2_DOUT_OFFSET	/;"	d
PINCTRL_DOUT3_DOUT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT3_DOUT_MASK	/;"	d
PINCTRL_DOUT3_DOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT3_DOUT_OFFSET	/;"	d
PINCTRL_DOUT4_DOUT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT4_DOUT_MASK	/;"	d
PINCTRL_DOUT4_DOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DOUT4_DOUT_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN00_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN00_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN00_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN00_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN00_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN00_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN01_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN01_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN01_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN01_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN01_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN01_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN02_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN02_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN02_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN02_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN02_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN02_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN03_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN03_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN03_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN03_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN03_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN03_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN04_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN04_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN04_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN04_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN04_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN04_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN05_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN05_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN05_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN05_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN05_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN05_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN06_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN06_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN06_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN06_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN06_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN06_V	/;"	d
PINCTRL_DRIVE0_BANK0_PIN07_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN07_MA_MASK	/;"	d
PINCTRL_DRIVE0_BANK0_PIN07_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN07_MA_OFFSET	/;"	d
PINCTRL_DRIVE0_BANK0_PIN07_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE0_BANK0_PIN07_V	/;"	d
PINCTRL_DRIVE10_BANK2_PIN16_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN16_MA_MASK	/;"	d
PINCTRL_DRIVE10_BANK2_PIN16_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN16_MA_OFFSET	/;"	d
PINCTRL_DRIVE10_BANK2_PIN16_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN16_V	/;"	d
PINCTRL_DRIVE10_BANK2_PIN17_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN17_MA_MASK	/;"	d
PINCTRL_DRIVE10_BANK2_PIN17_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN17_MA_OFFSET	/;"	d
PINCTRL_DRIVE10_BANK2_PIN17_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN17_V	/;"	d
PINCTRL_DRIVE10_BANK2_PIN18_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN18_MA_MASK	/;"	d
PINCTRL_DRIVE10_BANK2_PIN18_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN18_MA_OFFSET	/;"	d
PINCTRL_DRIVE10_BANK2_PIN18_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN18_V	/;"	d
PINCTRL_DRIVE10_BANK2_PIN19_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN19_MA_MASK	/;"	d
PINCTRL_DRIVE10_BANK2_PIN19_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN19_MA_OFFSET	/;"	d
PINCTRL_DRIVE10_BANK2_PIN19_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN19_V	/;"	d
PINCTRL_DRIVE10_BANK2_PIN20_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN20_MA_MASK	/;"	d
PINCTRL_DRIVE10_BANK2_PIN20_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN20_MA_OFFSET	/;"	d
PINCTRL_DRIVE10_BANK2_PIN20_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN20_V	/;"	d
PINCTRL_DRIVE10_BANK2_PIN21_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN21_MA_MASK	/;"	d
PINCTRL_DRIVE10_BANK2_PIN21_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN21_MA_OFFSET	/;"	d
PINCTRL_DRIVE10_BANK2_PIN21_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE10_BANK2_PIN21_V	/;"	d
PINCTRL_DRIVE11_BANK2_PIN24_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN24_MA_MASK	/;"	d
PINCTRL_DRIVE11_BANK2_PIN24_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN24_MA_OFFSET	/;"	d
PINCTRL_DRIVE11_BANK2_PIN24_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN24_V	/;"	d
PINCTRL_DRIVE11_BANK2_PIN25_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN25_MA_MASK	/;"	d
PINCTRL_DRIVE11_BANK2_PIN25_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN25_MA_OFFSET	/;"	d
PINCTRL_DRIVE11_BANK2_PIN25_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN25_V	/;"	d
PINCTRL_DRIVE11_BANK2_PIN26_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN26_MA_MASK	/;"	d
PINCTRL_DRIVE11_BANK2_PIN26_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN26_MA_OFFSET	/;"	d
PINCTRL_DRIVE11_BANK2_PIN26_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN26_V	/;"	d
PINCTRL_DRIVE11_BANK2_PIN27_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN27_MA_MASK	/;"	d
PINCTRL_DRIVE11_BANK2_PIN27_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN27_MA_OFFSET	/;"	d
PINCTRL_DRIVE11_BANK2_PIN27_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE11_BANK2_PIN27_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN00_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN00_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN00_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN00_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN00_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN00_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN01_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN01_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN01_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN01_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN01_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN01_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN02_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN02_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN02_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN02_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN02_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN02_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN03_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN03_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN03_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN03_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN03_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN03_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN04_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN04_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN04_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN04_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN04_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN04_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN05_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN05_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN05_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN05_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN05_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN05_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN06_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN06_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN06_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN06_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN06_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN06_V	/;"	d
PINCTRL_DRIVE12_BANK3_PIN07_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN07_MA_MASK	/;"	d
PINCTRL_DRIVE12_BANK3_PIN07_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN07_MA_OFFSET	/;"	d
PINCTRL_DRIVE12_BANK3_PIN07_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE12_BANK3_PIN07_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN08_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN08_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN08_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN08_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN08_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN08_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN09_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN09_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN09_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN09_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN09_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN09_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN10_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN10_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN10_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN10_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN10_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN10_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN11_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN11_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN11_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN11_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN11_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN11_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN12_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN12_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN12_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN12_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN12_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN12_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN13_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN13_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN13_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN13_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN13_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN13_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN14_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN14_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN14_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN14_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN14_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN14_V	/;"	d
PINCTRL_DRIVE13_BANK3_PIN15_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN15_MA_MASK	/;"	d
PINCTRL_DRIVE13_BANK3_PIN15_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN15_MA_OFFSET	/;"	d
PINCTRL_DRIVE13_BANK3_PIN15_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE13_BANK3_PIN15_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN16_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN16_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN16_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN16_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN16_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN16_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN17_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN17_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN17_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN17_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN17_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN17_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN18_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN18_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN18_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN18_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN18_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN18_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN20_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN20_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN20_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN20_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN20_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN20_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN21_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN21_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN21_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN21_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN21_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN21_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN22_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN22_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN22_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN22_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN22_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN22_V	/;"	d
PINCTRL_DRIVE14_BANK3_PIN23_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN23_MA_MASK	/;"	d
PINCTRL_DRIVE14_BANK3_PIN23_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN23_MA_OFFSET	/;"	d
PINCTRL_DRIVE14_BANK3_PIN23_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE14_BANK3_PIN23_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN24_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN24_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN24_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN24_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN24_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN24_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN25_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN25_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN25_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN25_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN25_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN25_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN26_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN26_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN26_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN26_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN26_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN26_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN27_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN27_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN27_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN27_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN27_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN27_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN28_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN28_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN28_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN28_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN28_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN28_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN29_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN29_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN29_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN29_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN29_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN29_V	/;"	d
PINCTRL_DRIVE15_BANK3_PIN30_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN30_MA_MASK	/;"	d
PINCTRL_DRIVE15_BANK3_PIN30_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN30_MA_OFFSET	/;"	d
PINCTRL_DRIVE15_BANK3_PIN30_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE15_BANK3_PIN30_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN00_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN00_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN00_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN00_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN00_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN00_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN01_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN01_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN01_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN01_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN01_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN01_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN02_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN02_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN02_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN02_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN02_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN02_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN03_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN03_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN03_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN03_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN03_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN03_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN04_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN04_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN04_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN04_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN04_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN04_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN05_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN05_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN05_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN05_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN05_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN05_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN06_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN06_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN06_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN06_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN06_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN06_V	/;"	d
PINCTRL_DRIVE16_BANK4_PIN07_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN07_MA_MASK	/;"	d
PINCTRL_DRIVE16_BANK4_PIN07_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN07_MA_OFFSET	/;"	d
PINCTRL_DRIVE16_BANK4_PIN07_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE16_BANK4_PIN07_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN08_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN08_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN08_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN08_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN08_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN08_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN09_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN09_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN09_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN09_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN09_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN09_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN10_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN10_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN10_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN10_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN10_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN10_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN11_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN11_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN11_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN11_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN11_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN11_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN12_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN12_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN12_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN12_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN12_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN12_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN13_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN13_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN13_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN13_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN13_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN13_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN14_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN14_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN14_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN14_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN14_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN14_V	/;"	d
PINCTRL_DRIVE17_BANK4_PIN15_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN15_MA_MASK	/;"	d
PINCTRL_DRIVE17_BANK4_PIN15_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN15_MA_OFFSET	/;"	d
PINCTRL_DRIVE17_BANK4_PIN15_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE17_BANK4_PIN15_V	/;"	d
PINCTRL_DRIVE18_BANK4_PIN16_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE18_BANK4_PIN16_MA_MASK	/;"	d
PINCTRL_DRIVE18_BANK4_PIN16_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE18_BANK4_PIN16_MA_OFFSET	/;"	d
PINCTRL_DRIVE18_BANK4_PIN16_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE18_BANK4_PIN16_V	/;"	d
PINCTRL_DRIVE18_BANK4_PIN20_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE18_BANK4_PIN20_MA_MASK	/;"	d
PINCTRL_DRIVE18_BANK4_PIN20_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE18_BANK4_PIN20_MA_OFFSET	/;"	d
PINCTRL_DRIVE18_BANK4_PIN20_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE18_BANK4_PIN20_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN16_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN16_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN16_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN16_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN16_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN16_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN17_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN17_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN17_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN17_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN17_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN17_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN18_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN18_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN18_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN18_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN18_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN18_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN19_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN19_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN19_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN19_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN19_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN19_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN20_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN20_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN20_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN20_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN20_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN20_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN21_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN21_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN21_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN21_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN21_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN21_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN22_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN22_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN22_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN22_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN22_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN22_V	/;"	d
PINCTRL_DRIVE2_BANK0_PIN23_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN23_MA_MASK	/;"	d
PINCTRL_DRIVE2_BANK0_PIN23_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN23_MA_OFFSET	/;"	d
PINCTRL_DRIVE2_BANK0_PIN23_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE2_BANK0_PIN23_V	/;"	d
PINCTRL_DRIVE3_BANK0_PIN24_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN24_MA_MASK	/;"	d
PINCTRL_DRIVE3_BANK0_PIN24_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN24_MA_OFFSET	/;"	d
PINCTRL_DRIVE3_BANK0_PIN24_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN24_V	/;"	d
PINCTRL_DRIVE3_BANK0_PIN25_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN25_MA_MASK	/;"	d
PINCTRL_DRIVE3_BANK0_PIN25_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN25_MA_OFFSET	/;"	d
PINCTRL_DRIVE3_BANK0_PIN25_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN25_V	/;"	d
PINCTRL_DRIVE3_BANK0_PIN26_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN26_MA_MASK	/;"	d
PINCTRL_DRIVE3_BANK0_PIN26_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN26_MA_OFFSET	/;"	d
PINCTRL_DRIVE3_BANK0_PIN26_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN26_V	/;"	d
PINCTRL_DRIVE3_BANK0_PIN27_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN27_MA_MASK	/;"	d
PINCTRL_DRIVE3_BANK0_PIN27_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN27_MA_OFFSET	/;"	d
PINCTRL_DRIVE3_BANK0_PIN27_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN27_V	/;"	d
PINCTRL_DRIVE3_BANK0_PIN28_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN28_MA_MASK	/;"	d
PINCTRL_DRIVE3_BANK0_PIN28_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN28_MA_OFFSET	/;"	d
PINCTRL_DRIVE3_BANK0_PIN28_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE3_BANK0_PIN28_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN00_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN00_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN00_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN00_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN00_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN00_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN01_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN01_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN01_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN01_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN01_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN01_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN02_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN02_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN02_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN02_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN02_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN02_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN03_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN03_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN03_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN03_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN03_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN03_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN04_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN04_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN04_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN04_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN04_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN04_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN05_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN05_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN05_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN05_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN05_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN05_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN06_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN06_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN06_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN06_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN06_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN06_V	/;"	d
PINCTRL_DRIVE4_BANK1_PIN07_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN07_MA_MASK	/;"	d
PINCTRL_DRIVE4_BANK1_PIN07_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN07_MA_OFFSET	/;"	d
PINCTRL_DRIVE4_BANK1_PIN07_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE4_BANK1_PIN07_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN08_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN08_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN08_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN08_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN08_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN08_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN09_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN09_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN09_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN09_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN09_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN09_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN10_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN10_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN10_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN10_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN10_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN10_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN11_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN11_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN11_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN11_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN11_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN11_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN12_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN12_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN12_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN12_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN12_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN12_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN13_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN13_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN13_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN13_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN13_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN13_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN14_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN14_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN14_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN14_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN14_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN14_V	/;"	d
PINCTRL_DRIVE5_BANK1_PIN15_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN15_MA_MASK	/;"	d
PINCTRL_DRIVE5_BANK1_PIN15_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN15_MA_OFFSET	/;"	d
PINCTRL_DRIVE5_BANK1_PIN15_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE5_BANK1_PIN15_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN16_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN16_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN16_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN16_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN16_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN16_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN17_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN17_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN17_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN17_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN17_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN17_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN18_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN18_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN18_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN18_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN18_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN18_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN19_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN19_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN19_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN19_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN19_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN19_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN20_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN20_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN20_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN20_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN20_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN20_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN21_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN21_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN21_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN21_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN21_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN21_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN22_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN22_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN22_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN22_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN22_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN22_V	/;"	d
PINCTRL_DRIVE6_BANK1_PIN23_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN23_MA_MASK	/;"	d
PINCTRL_DRIVE6_BANK1_PIN23_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN23_MA_OFFSET	/;"	d
PINCTRL_DRIVE6_BANK1_PIN23_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE6_BANK1_PIN23_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN24_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN24_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN24_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN24_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN24_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN24_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN25_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN25_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN25_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN25_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN25_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN25_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN26_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN26_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN26_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN26_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN26_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN26_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN27_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN27_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN27_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN27_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN27_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN27_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN28_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN28_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN28_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN28_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN28_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN28_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN29_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN29_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN29_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN29_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN29_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN29_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN30_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN30_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN30_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN30_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN30_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN30_V	/;"	d
PINCTRL_DRIVE7_BANK1_PIN31_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN31_MA_MASK	/;"	d
PINCTRL_DRIVE7_BANK1_PIN31_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN31_MA_OFFSET	/;"	d
PINCTRL_DRIVE7_BANK1_PIN31_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE7_BANK1_PIN31_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN00_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN00_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN00_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN00_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN00_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN00_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN01_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN01_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN01_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN01_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN01_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN01_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN02_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN02_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN02_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN02_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN02_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN02_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN03_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN03_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN03_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN03_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN03_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN03_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN04_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN04_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN04_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN04_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN04_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN04_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN05_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN05_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN05_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN05_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN05_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN05_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN06_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN06_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN06_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN06_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN06_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN06_V	/;"	d
PINCTRL_DRIVE8_BANK2_PIN07_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN07_MA_MASK	/;"	d
PINCTRL_DRIVE8_BANK2_PIN07_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN07_MA_OFFSET	/;"	d
PINCTRL_DRIVE8_BANK2_PIN07_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE8_BANK2_PIN07_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN08_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN08_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN08_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN08_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN08_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN08_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN09_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN09_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN09_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN09_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN09_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN09_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN10_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN10_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN10_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN10_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN10_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN10_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN12_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN12_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN12_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN12_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN12_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN12_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN13_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN13_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN13_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN13_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN13_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN13_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN14_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN14_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN14_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN14_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN14_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN14_V	/;"	d
PINCTRL_DRIVE9_BANK2_PIN15_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN15_MA_MASK	/;"	d
PINCTRL_DRIVE9_BANK2_PIN15_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN15_MA_OFFSET	/;"	d
PINCTRL_DRIVE9_BANK2_PIN15_V	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_DRIVE9_BANK2_PIN15_V	/;"	d
PINCTRL_EMI_DS_CTRL_ADDRESS_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_ADDRESS_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_ADDRESS_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_ADDRESS_MA_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_CONTROL_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_CONTROL_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_CONTROL_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_CONTROL_MA_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2	/;"	d
PINCTRL_EMI_DS_CTRL_DDR_MODE_GPIO	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DDR_MODE_GPIO	/;"	d
PINCTRL_EMI_DS_CTRL_DDR_MODE_LVDDR2	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DDR_MODE_LVDDR2	/;"	d
PINCTRL_EMI_DS_CTRL_DDR_MODE_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DDR_MODE_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_DDR_MODE_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DDR_MODE_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_DDR_MODE_mDDR	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DDR_MODE_mDDR	/;"	d
PINCTRL_EMI_DS_CTRL_DUALPAD_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DUALPAD_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_DUALPAD_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_DUALPAD_MA_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE0_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE0_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE0_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE0_MA_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE1_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE1_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE1_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE1_MA_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE2_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE2_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE2_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE2_MA_OFFSET	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE3_MA_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE3_MA_MASK	/;"	d
PINCTRL_EMI_DS_CTRL_SLICE3_MA_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_DS_CTRL_SLICE3_MA_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_ADDRESS_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_ADDRESS_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_ADDRESS_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_ADDRESS_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_ADDRESS_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_ADDRESS_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_ADDRESS_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_ADDRESS_TLOAD_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_CONTROL_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_CONTROL_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_CONTROL_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_CONTROL_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_CONTROL_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_CONTROL_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_CONTROL_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_CONTROL_TLOAD_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_DUALPAD_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_DUALPAD_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_DUALPAD_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_DUALPAD_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_DUALPAD_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_DUALPAD_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_DUALPAD_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_DUALPAD_TLOAD_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE0_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE0_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE0_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE0_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE0_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE0_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE0_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE0_TLOAD_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE1_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE1_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE1_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE1_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE1_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE1_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE1_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE1_TLOAD_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE2_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE2_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE2_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE2_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE2_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE2_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE2_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE2_TLOAD_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE3_CALIB_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE3_CALIB_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE3_CALIB_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE3_CALIB_OFFSET	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE3_TLOAD_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE3_TLOAD_MASK	/;"	d
PINCTRL_EMI_ODT_CTRL_SLICE3_TLOAD_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_EMI_ODT_CTRL_SLICE3_TLOAD_OFFSET	/;"	d
PINCTRL_EXYNOS	drivers/pinctrl/exynos/Kconfig	/^config PINCTRL_EXYNOS$/;"	c
PINCTRL_EXYNOS7420	drivers/pinctrl/exynos/Kconfig	/^config PINCTRL_EXYNOS7420$/;"	c
PINCTRL_FULL	drivers/pinctrl/Kconfig	/^config PINCTRL_FULL$/;"	c	menu:Pin controllers
PINCTRL_GENERIC	drivers/pinctrl/Kconfig	/^config PINCTRL_GENERIC$/;"	c	menu:Pin controllers
PINCTRL_IMX	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX$/;"	c
PINCTRL_IMX6	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX6$/;"	c
PINCTRL_IMX7	drivers/pinctrl/nxp/Kconfig	/^config PINCTRL_IMX7$/;"	c
PINCTRL_IRQEN	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_IRQEN(/;"	d	file:
PINCTRL_IRQEN0_IRQEN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN0_IRQEN_MASK	/;"	d
PINCTRL_IRQEN0_IRQEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN0_IRQEN_OFFSET	/;"	d
PINCTRL_IRQEN1_IRQEN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN1_IRQEN_MASK	/;"	d
PINCTRL_IRQEN1_IRQEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN1_IRQEN_OFFSET	/;"	d
PINCTRL_IRQEN2_IRQEN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN2_IRQEN_MASK	/;"	d
PINCTRL_IRQEN2_IRQEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN2_IRQEN_OFFSET	/;"	d
PINCTRL_IRQEN3_IRQEN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN3_IRQEN_MASK	/;"	d
PINCTRL_IRQEN3_IRQEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN3_IRQEN_OFFSET	/;"	d
PINCTRL_IRQEN4_IRQEN_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN4_IRQEN_MASK	/;"	d
PINCTRL_IRQEN4_IRQEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQEN4_IRQEN_OFFSET	/;"	d
PINCTRL_IRQLEVEL0_IRQLEVEL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL0_IRQLEVEL_MASK	/;"	d
PINCTRL_IRQLEVEL0_IRQLEVEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL0_IRQLEVEL_OFFSET	/;"	d
PINCTRL_IRQLEVEL1_IRQLEVEL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL1_IRQLEVEL_MASK	/;"	d
PINCTRL_IRQLEVEL1_IRQLEVEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL1_IRQLEVEL_OFFSET	/;"	d
PINCTRL_IRQLEVEL2_IRQLEVEL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL2_IRQLEVEL_MASK	/;"	d
PINCTRL_IRQLEVEL2_IRQLEVEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL2_IRQLEVEL_OFFSET	/;"	d
PINCTRL_IRQLEVEL3_IRQLEVEL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL3_IRQLEVEL_MASK	/;"	d
PINCTRL_IRQLEVEL3_IRQLEVEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL3_IRQLEVEL_OFFSET	/;"	d
PINCTRL_IRQLEVEL4_IRQLEVEL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL4_IRQLEVEL_MASK	/;"	d
PINCTRL_IRQLEVEL4_IRQLEVEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQLEVEL4_IRQLEVEL_OFFSET	/;"	d
PINCTRL_IRQPOL0_IRQPOL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL0_IRQPOL_MASK	/;"	d
PINCTRL_IRQPOL0_IRQPOL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL0_IRQPOL_OFFSET	/;"	d
PINCTRL_IRQPOL1_IRQPOL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL1_IRQPOL_MASK	/;"	d
PINCTRL_IRQPOL1_IRQPOL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL1_IRQPOL_OFFSET	/;"	d
PINCTRL_IRQPOL2_IRQPOL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL2_IRQPOL_MASK	/;"	d
PINCTRL_IRQPOL2_IRQPOL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL2_IRQPOL_OFFSET	/;"	d
PINCTRL_IRQPOL3_IRQPOL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL3_IRQPOL_MASK	/;"	d
PINCTRL_IRQPOL3_IRQPOL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL3_IRQPOL_OFFSET	/;"	d
PINCTRL_IRQPOL4_IRQPOL_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL4_IRQPOL_MASK	/;"	d
PINCTRL_IRQPOL4_IRQPOL_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQPOL4_IRQPOL_OFFSET	/;"	d
PINCTRL_IRQSTAT	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_IRQSTAT(/;"	d	file:
PINCTRL_IRQSTAT0_IRQSTAT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT0_IRQSTAT_MASK	/;"	d
PINCTRL_IRQSTAT0_IRQSTAT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT0_IRQSTAT_OFFSET	/;"	d
PINCTRL_IRQSTAT1_IRQSTAT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT1_IRQSTAT_MASK	/;"	d
PINCTRL_IRQSTAT1_IRQSTAT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT1_IRQSTAT_OFFSET	/;"	d
PINCTRL_IRQSTAT2_IRQSTAT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT2_IRQSTAT_MASK	/;"	d
PINCTRL_IRQSTAT2_IRQSTAT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT2_IRQSTAT_OFFSET	/;"	d
PINCTRL_IRQSTAT3_IRQSTAT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT3_IRQSTAT_MASK	/;"	d
PINCTRL_IRQSTAT3_IRQSTAT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT3_IRQSTAT_OFFSET	/;"	d
PINCTRL_IRQSTAT4_IRQSTAT_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT4_IRQSTAT_MASK	/;"	d
PINCTRL_IRQSTAT4_IRQSTAT_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_IRQSTAT4_IRQSTAT_OFFSET	/;"	d
PINCTRL_MESON	drivers/pinctrl/meson/Kconfig	/^config PINCTRL_MESON$/;"	c
PINCTRL_MESON_GXBB	drivers/pinctrl/meson/Kconfig	/^config PINCTRL_MESON_GXBB$/;"	c
PINCTRL_MUXSEL0_BANK0_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN00_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN01_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN02_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN03_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN04_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN05_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN06_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN07_MASK	/;"	d
PINCTRL_MUXSEL0_BANK0_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL0_BANK0_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN00_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN01_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN02_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN03_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN04_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN05_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN06_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN07_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN08_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN08_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN08_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN08_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN09_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN09_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN09_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN09_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN10_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN10_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN10_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN10_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN11_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN11_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN11_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN11_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN12_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN12_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN12_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN12_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN13_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN13_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN13_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN13_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN14_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN14_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN14_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN14_OFFSET	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN15_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN15_MASK	/;"	d
PINCTRL_MUXSEL10_BANK5_PIN15_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL10_BANK5_PIN15_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN16_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN17_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN17_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN17_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN17_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN18_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN18_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN18_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN18_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN19_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN19_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN19_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN19_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN20_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN20_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN21_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN21_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN21_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN21_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN22_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN22_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN22_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN22_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN23_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN23_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN23_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN23_OFFSET	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN26_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN26_MASK	/;"	d
PINCTRL_MUXSEL11_BANK5_PIN26_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL11_BANK5_PIN26_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN00_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN01_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN02_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN03_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN04_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN05_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN06_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN07_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN08_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN08_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN08_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN08_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN09_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN09_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN09_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN09_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN10_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN10_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN10_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN10_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN11_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN11_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN11_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN11_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN12_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN12_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN12_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN12_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN13_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN13_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN13_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN13_OFFSET	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN14_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN14_MASK	/;"	d
PINCTRL_MUXSEL12_BANK6_PIN14_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL12_BANK6_PIN14_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN16_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN17_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN17_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN17_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN17_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN18_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN18_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN18_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN18_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN19_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN19_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN19_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN19_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN20_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN20_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN21_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN21_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN21_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN21_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN22_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN22_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN22_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN22_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN23_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN23_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN23_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN23_OFFSET	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN24_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN24_MASK	/;"	d
PINCTRL_MUXSEL13_BANK6_PIN24_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL13_BANK6_PIN24_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN16_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN17_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN17_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN17_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN17_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN18_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN18_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN18_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN18_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN19_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN19_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN19_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN19_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN20_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN20_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN21_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN21_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN21_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN21_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN22_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN22_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN22_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN22_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN23_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN23_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN23_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN23_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN24_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN24_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN24_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN24_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN25_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN25_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN25_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN25_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN26_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN26_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN26_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN26_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN27_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN27_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN27_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN27_OFFSET	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN28_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN28_MASK	/;"	d
PINCTRL_MUXSEL1_BANK0_PIN28_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL1_BANK0_PIN28_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN00_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN01_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN02_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN03_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN04_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN05_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN06_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN07_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN08_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN08_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN08_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN08_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN09_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN09_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN09_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN09_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN10_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN10_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN10_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN10_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN11_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN11_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN11_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN11_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN12_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN12_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN12_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN12_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN13_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN13_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN13_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN13_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN14_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN14_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN14_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN14_OFFSET	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN15_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN15_MASK	/;"	d
PINCTRL_MUXSEL2_BANK1_PIN15_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL2_BANK1_PIN15_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN16_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN17_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN17_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN17_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN17_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN18_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN18_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN18_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN18_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN19_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN19_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN19_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN19_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN20_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN20_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN21_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN21_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN21_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN21_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN22_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN22_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN22_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN22_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN23_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN23_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN23_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN23_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN24_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN24_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN24_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN24_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN25_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN25_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN25_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN25_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN26_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN26_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN26_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN26_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN27_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN27_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN27_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN27_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN28_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN28_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN28_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN28_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN29_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN29_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN29_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN29_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN30_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN30_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN30_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN30_OFFSET	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN31_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN31_MASK	/;"	d
PINCTRL_MUXSEL3_BANK1_PIN31_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL3_BANK1_PIN31_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN00_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN01_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN02_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN03_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN04_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN05_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN06_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN07_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN08_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN08_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN08_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN08_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN09_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN09_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN09_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN09_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN10_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN10_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN10_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN10_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN12_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN12_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN12_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN12_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN13_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN13_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN13_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN13_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN14_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN14_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN14_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN14_OFFSET	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN15_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN15_MASK	/;"	d
PINCTRL_MUXSEL4_BANK2_PIN15_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL4_BANK2_PIN15_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN16_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN17_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN17_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN17_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN17_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN18_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN18_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN18_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN18_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN19_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN19_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN19_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN19_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN20_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN20_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN21_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN21_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN21_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN21_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN24_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN24_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN24_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN24_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN25_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN25_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN25_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN25_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN26_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN26_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN26_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN26_OFFSET	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN27_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN27_MASK	/;"	d
PINCTRL_MUXSEL5_BANK2_PIN27_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL5_BANK2_PIN27_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN00_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN01_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN02_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN03_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN04_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN05_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN06_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN07_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN08_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN08_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN08_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN08_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN09_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN09_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN09_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN09_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN10_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN10_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN10_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN10_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN11_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN11_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN11_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN11_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN12_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN12_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN12_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN12_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN13_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN13_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN13_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN13_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN14_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN14_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN14_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN14_OFFSET	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN15_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN15_MASK	/;"	d
PINCTRL_MUXSEL6_BANK3_PIN15_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL6_BANK3_PIN15_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN16_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN17_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN17_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN17_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN17_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN18_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN18_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN18_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN18_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN20_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN20_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN21_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN21_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN21_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN21_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN22_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN22_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN22_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN22_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN23_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN23_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN23_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN23_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN24_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN24_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN24_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN24_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN25_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN25_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN25_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN25_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN26_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN26_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN26_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN26_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN27_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN27_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN27_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN27_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN28_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN28_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN28_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN28_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN29_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN29_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN29_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN29_OFFSET	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN30_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN30_MASK	/;"	d
PINCTRL_MUXSEL7_BANK3_PIN30_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL7_BANK3_PIN30_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN00_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN00_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN00_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN00_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN01_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN01_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN01_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN01_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN02_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN02_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN02_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN02_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN03_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN03_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN03_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN03_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN04_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN04_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN04_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN04_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN05_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN05_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN05_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN05_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN06_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN06_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN06_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN06_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN07_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN07_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN07_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN07_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN08_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN08_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN08_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN08_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN09_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN09_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN09_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN09_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN10_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN10_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN10_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN10_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN11_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN11_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN11_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN11_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN12_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN12_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN12_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN12_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN13_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN13_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN13_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN13_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN14_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN14_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN14_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN14_OFFSET	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN15_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN15_MASK	/;"	d
PINCTRL_MUXSEL8_BANK4_PIN15_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL8_BANK4_PIN15_OFFSET	/;"	d
PINCTRL_MUXSEL9_BANK4_PIN16_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL9_BANK4_PIN16_MASK	/;"	d
PINCTRL_MUXSEL9_BANK4_PIN16_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL9_BANK4_PIN16_OFFSET	/;"	d
PINCTRL_MUXSEL9_BANK4_PIN20_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL9_BANK4_PIN20_MASK	/;"	d
PINCTRL_MUXSEL9_BANK4_PIN20_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_MUXSEL9_BANK4_PIN20_OFFSET	/;"	d
PINCTRL_PIN2IRQ	drivers/gpio/mxs_gpio.c	/^#define	PINCTRL_PIN2IRQ(/;"	d	file:
PINCTRL_PIN2IRQ0_PIN2IRQ_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ0_PIN2IRQ_MASK	/;"	d
PINCTRL_PIN2IRQ0_PIN2IRQ_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ0_PIN2IRQ_OFFSET	/;"	d
PINCTRL_PIN2IRQ1_PIN2IRQ_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ1_PIN2IRQ_MASK	/;"	d
PINCTRL_PIN2IRQ1_PIN2IRQ_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ1_PIN2IRQ_OFFSET	/;"	d
PINCTRL_PIN2IRQ2_PIN2IRQ_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ2_PIN2IRQ_MASK	/;"	d
PINCTRL_PIN2IRQ2_PIN2IRQ_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ2_PIN2IRQ_OFFSET	/;"	d
PINCTRL_PIN2IRQ3_PIN2IRQ_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ3_PIN2IRQ_MASK	/;"	d
PINCTRL_PIN2IRQ3_PIN2IRQ_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ3_PIN2IRQ_OFFSET	/;"	d
PINCTRL_PIN2IRQ4_PIN2IRQ_MASK	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ4_PIN2IRQ_MASK	/;"	d
PINCTRL_PIN2IRQ4_PIN2IRQ_OFFSET	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PIN2IRQ4_PIN2IRQ_OFFSET	/;"	d
PINCTRL_PULL0_BANK0_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN00	/;"	d
PINCTRL_PULL0_BANK0_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN01	/;"	d
PINCTRL_PULL0_BANK0_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN02	/;"	d
PINCTRL_PULL0_BANK0_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN03	/;"	d
PINCTRL_PULL0_BANK0_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN04	/;"	d
PINCTRL_PULL0_BANK0_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN05	/;"	d
PINCTRL_PULL0_BANK0_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN06	/;"	d
PINCTRL_PULL0_BANK0_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN07	/;"	d
PINCTRL_PULL0_BANK0_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN16	/;"	d
PINCTRL_PULL0_BANK0_PIN17	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN17	/;"	d
PINCTRL_PULL0_BANK0_PIN18	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN18	/;"	d
PINCTRL_PULL0_BANK0_PIN19	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN19	/;"	d
PINCTRL_PULL0_BANK0_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN20	/;"	d
PINCTRL_PULL0_BANK0_PIN21	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN21	/;"	d
PINCTRL_PULL0_BANK0_PIN22	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN22	/;"	d
PINCTRL_PULL0_BANK0_PIN23	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN23	/;"	d
PINCTRL_PULL0_BANK0_PIN24	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN24	/;"	d
PINCTRL_PULL0_BANK0_PIN25	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN25	/;"	d
PINCTRL_PULL0_BANK0_PIN26	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN26	/;"	d
PINCTRL_PULL0_BANK0_PIN27	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN27	/;"	d
PINCTRL_PULL0_BANK0_PIN28	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL0_BANK0_PIN28	/;"	d
PINCTRL_PULL1_BANK1_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN00	/;"	d
PINCTRL_PULL1_BANK1_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN01	/;"	d
PINCTRL_PULL1_BANK1_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN02	/;"	d
PINCTRL_PULL1_BANK1_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN03	/;"	d
PINCTRL_PULL1_BANK1_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN04	/;"	d
PINCTRL_PULL1_BANK1_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN05	/;"	d
PINCTRL_PULL1_BANK1_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN06	/;"	d
PINCTRL_PULL1_BANK1_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN07	/;"	d
PINCTRL_PULL1_BANK1_PIN08	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN08	/;"	d
PINCTRL_PULL1_BANK1_PIN09	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN09	/;"	d
PINCTRL_PULL1_BANK1_PIN10	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN10	/;"	d
PINCTRL_PULL1_BANK1_PIN11	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN11	/;"	d
PINCTRL_PULL1_BANK1_PIN12	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN12	/;"	d
PINCTRL_PULL1_BANK1_PIN13	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN13	/;"	d
PINCTRL_PULL1_BANK1_PIN14	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN14	/;"	d
PINCTRL_PULL1_BANK1_PIN15	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN15	/;"	d
PINCTRL_PULL1_BANK1_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN16	/;"	d
PINCTRL_PULL1_BANK1_PIN17	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN17	/;"	d
PINCTRL_PULL1_BANK1_PIN18	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN18	/;"	d
PINCTRL_PULL1_BANK1_PIN19	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN19	/;"	d
PINCTRL_PULL1_BANK1_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN20	/;"	d
PINCTRL_PULL1_BANK1_PIN21	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN21	/;"	d
PINCTRL_PULL1_BANK1_PIN22	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN22	/;"	d
PINCTRL_PULL1_BANK1_PIN23	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN23	/;"	d
PINCTRL_PULL1_BANK1_PIN24	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN24	/;"	d
PINCTRL_PULL1_BANK1_PIN25	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN25	/;"	d
PINCTRL_PULL1_BANK1_PIN26	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN26	/;"	d
PINCTRL_PULL1_BANK1_PIN27	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN27	/;"	d
PINCTRL_PULL1_BANK1_PIN28	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN28	/;"	d
PINCTRL_PULL1_BANK1_PIN29	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN29	/;"	d
PINCTRL_PULL1_BANK1_PIN30	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN30	/;"	d
PINCTRL_PULL1_BANK1_PIN31	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL1_BANK1_PIN31	/;"	d
PINCTRL_PULL2_BANK2_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN00	/;"	d
PINCTRL_PULL2_BANK2_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN01	/;"	d
PINCTRL_PULL2_BANK2_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN02	/;"	d
PINCTRL_PULL2_BANK2_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN03	/;"	d
PINCTRL_PULL2_BANK2_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN04	/;"	d
PINCTRL_PULL2_BANK2_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN05	/;"	d
PINCTRL_PULL2_BANK2_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN06	/;"	d
PINCTRL_PULL2_BANK2_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN07	/;"	d
PINCTRL_PULL2_BANK2_PIN08	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN08	/;"	d
PINCTRL_PULL2_BANK2_PIN09	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN09	/;"	d
PINCTRL_PULL2_BANK2_PIN10	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN10	/;"	d
PINCTRL_PULL2_BANK2_PIN12	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN12	/;"	d
PINCTRL_PULL2_BANK2_PIN13	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN13	/;"	d
PINCTRL_PULL2_BANK2_PIN14	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN14	/;"	d
PINCTRL_PULL2_BANK2_PIN15	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN15	/;"	d
PINCTRL_PULL2_BANK2_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN16	/;"	d
PINCTRL_PULL2_BANK2_PIN17	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN17	/;"	d
PINCTRL_PULL2_BANK2_PIN18	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN18	/;"	d
PINCTRL_PULL2_BANK2_PIN19	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN19	/;"	d
PINCTRL_PULL2_BANK2_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN20	/;"	d
PINCTRL_PULL2_BANK2_PIN21	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN21	/;"	d
PINCTRL_PULL2_BANK2_PIN24	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN24	/;"	d
PINCTRL_PULL2_BANK2_PIN25	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN25	/;"	d
PINCTRL_PULL2_BANK2_PIN26	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN26	/;"	d
PINCTRL_PULL2_BANK2_PIN27	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL2_BANK2_PIN27	/;"	d
PINCTRL_PULL3_BANK3_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN00	/;"	d
PINCTRL_PULL3_BANK3_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN01	/;"	d
PINCTRL_PULL3_BANK3_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN02	/;"	d
PINCTRL_PULL3_BANK3_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN03	/;"	d
PINCTRL_PULL3_BANK3_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN04	/;"	d
PINCTRL_PULL3_BANK3_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN05	/;"	d
PINCTRL_PULL3_BANK3_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN06	/;"	d
PINCTRL_PULL3_BANK3_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN07	/;"	d
PINCTRL_PULL3_BANK3_PIN08	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN08	/;"	d
PINCTRL_PULL3_BANK3_PIN09	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN09	/;"	d
PINCTRL_PULL3_BANK3_PIN10	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN10	/;"	d
PINCTRL_PULL3_BANK3_PIN11	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN11	/;"	d
PINCTRL_PULL3_BANK3_PIN12	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN12	/;"	d
PINCTRL_PULL3_BANK3_PIN13	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN13	/;"	d
PINCTRL_PULL3_BANK3_PIN14	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN14	/;"	d
PINCTRL_PULL3_BANK3_PIN15	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN15	/;"	d
PINCTRL_PULL3_BANK3_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN16	/;"	d
PINCTRL_PULL3_BANK3_PIN17	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN17	/;"	d
PINCTRL_PULL3_BANK3_PIN18	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN18	/;"	d
PINCTRL_PULL3_BANK3_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN20	/;"	d
PINCTRL_PULL3_BANK3_PIN21	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN21	/;"	d
PINCTRL_PULL3_BANK3_PIN22	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN22	/;"	d
PINCTRL_PULL3_BANK3_PIN23	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN23	/;"	d
PINCTRL_PULL3_BANK3_PIN24	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN24	/;"	d
PINCTRL_PULL3_BANK3_PIN25	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN25	/;"	d
PINCTRL_PULL3_BANK3_PIN26	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN26	/;"	d
PINCTRL_PULL3_BANK3_PIN27	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN27	/;"	d
PINCTRL_PULL3_BANK3_PIN28	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN28	/;"	d
PINCTRL_PULL3_BANK3_PIN29	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN29	/;"	d
PINCTRL_PULL3_BANK3_PIN30	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL3_BANK3_PIN30	/;"	d
PINCTRL_PULL4_BANK4_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN00	/;"	d
PINCTRL_PULL4_BANK4_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN01	/;"	d
PINCTRL_PULL4_BANK4_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN02	/;"	d
PINCTRL_PULL4_BANK4_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN03	/;"	d
PINCTRL_PULL4_BANK4_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN04	/;"	d
PINCTRL_PULL4_BANK4_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN05	/;"	d
PINCTRL_PULL4_BANK4_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN06	/;"	d
PINCTRL_PULL4_BANK4_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN07	/;"	d
PINCTRL_PULL4_BANK4_PIN08	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN08	/;"	d
PINCTRL_PULL4_BANK4_PIN09	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN09	/;"	d
PINCTRL_PULL4_BANK4_PIN10	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN10	/;"	d
PINCTRL_PULL4_BANK4_PIN11	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN11	/;"	d
PINCTRL_PULL4_BANK4_PIN12	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN12	/;"	d
PINCTRL_PULL4_BANK4_PIN13	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN13	/;"	d
PINCTRL_PULL4_BANK4_PIN14	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN14	/;"	d
PINCTRL_PULL4_BANK4_PIN15	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN15	/;"	d
PINCTRL_PULL4_BANK4_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN16	/;"	d
PINCTRL_PULL4_BANK4_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL4_BANK4_PIN20	/;"	d
PINCTRL_PULL5_BANK5_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN00	/;"	d
PINCTRL_PULL5_BANK5_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN01	/;"	d
PINCTRL_PULL5_BANK5_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN02	/;"	d
PINCTRL_PULL5_BANK5_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN03	/;"	d
PINCTRL_PULL5_BANK5_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN04	/;"	d
PINCTRL_PULL5_BANK5_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN05	/;"	d
PINCTRL_PULL5_BANK5_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN06	/;"	d
PINCTRL_PULL5_BANK5_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN07	/;"	d
PINCTRL_PULL5_BANK5_PIN08	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN08	/;"	d
PINCTRL_PULL5_BANK5_PIN09	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN09	/;"	d
PINCTRL_PULL5_BANK5_PIN10	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN10	/;"	d
PINCTRL_PULL5_BANK5_PIN11	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN11	/;"	d
PINCTRL_PULL5_BANK5_PIN12	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN12	/;"	d
PINCTRL_PULL5_BANK5_PIN13	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN13	/;"	d
PINCTRL_PULL5_BANK5_PIN14	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN14	/;"	d
PINCTRL_PULL5_BANK5_PIN15	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN15	/;"	d
PINCTRL_PULL5_BANK5_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN16	/;"	d
PINCTRL_PULL5_BANK5_PIN17	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN17	/;"	d
PINCTRL_PULL5_BANK5_PIN18	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN18	/;"	d
PINCTRL_PULL5_BANK5_PIN19	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN19	/;"	d
PINCTRL_PULL5_BANK5_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN20	/;"	d
PINCTRL_PULL5_BANK5_PIN21	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN21	/;"	d
PINCTRL_PULL5_BANK5_PIN22	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN22	/;"	d
PINCTRL_PULL5_BANK5_PIN23	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN23	/;"	d
PINCTRL_PULL5_BANK5_PIN26	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL5_BANK5_PIN26	/;"	d
PINCTRL_PULL6_BANK6_PIN00	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN00	/;"	d
PINCTRL_PULL6_BANK6_PIN01	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN01	/;"	d
PINCTRL_PULL6_BANK6_PIN02	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN02	/;"	d
PINCTRL_PULL6_BANK6_PIN03	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN03	/;"	d
PINCTRL_PULL6_BANK6_PIN04	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN04	/;"	d
PINCTRL_PULL6_BANK6_PIN05	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN05	/;"	d
PINCTRL_PULL6_BANK6_PIN06	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN06	/;"	d
PINCTRL_PULL6_BANK6_PIN07	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN07	/;"	d
PINCTRL_PULL6_BANK6_PIN08	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN08	/;"	d
PINCTRL_PULL6_BANK6_PIN09	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN09	/;"	d
PINCTRL_PULL6_BANK6_PIN10	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN10	/;"	d
PINCTRL_PULL6_BANK6_PIN11	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN11	/;"	d
PINCTRL_PULL6_BANK6_PIN12	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN12	/;"	d
PINCTRL_PULL6_BANK6_PIN13	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN13	/;"	d
PINCTRL_PULL6_BANK6_PIN14	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN14	/;"	d
PINCTRL_PULL6_BANK6_PIN16	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN16	/;"	d
PINCTRL_PULL6_BANK6_PIN17	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN17	/;"	d
PINCTRL_PULL6_BANK6_PIN18	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN18	/;"	d
PINCTRL_PULL6_BANK6_PIN19	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN19	/;"	d
PINCTRL_PULL6_BANK6_PIN20	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN20	/;"	d
PINCTRL_PULL6_BANK6_PIN21	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN21	/;"	d
PINCTRL_PULL6_BANK6_PIN22	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN22	/;"	d
PINCTRL_PULL6_BANK6_PIN23	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN23	/;"	d
PINCTRL_PULL6_BANK6_PIN24	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define	PINCTRL_PULL6_BANK6_PIN24	/;"	d
PINCTRL_SANDBOX	drivers/pinctrl/Kconfig	/^config PINCTRL_SANDBOX$/;"	c	menu:Pin controllers
PINCTRL_UNIPHIER	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER$/;"	c
PINCTRL_UNIPHIER_LD11	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD11$/;"	c
PINCTRL_UNIPHIER_LD20	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD20$/;"	c
PINCTRL_UNIPHIER_LD4	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD4$/;"	c
PINCTRL_UNIPHIER_LD6B	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_LD6B$/;"	c
PINCTRL_UNIPHIER_PRO4	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PRO4$/;"	c
PINCTRL_UNIPHIER_PRO5	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PRO5$/;"	c
PINCTRL_UNIPHIER_PXS2	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_PXS2$/;"	c
PINCTRL_UNIPHIER_SLD3	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_SLD3$/;"	c
PINCTRL_UNIPHIER_SLD8	drivers/pinctrl/uniphier/Kconfig	/^config PINCTRL_UNIPHIER_SLD8$/;"	c
PING	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
PINGE	drivers/usb/host/r8a66597.h	/^#define	PINGE	/;"	d
PINMUX	arch/arm/mach-tegra/tegra20/funcmux.c	/^#define PINMUX(/;"	d	file:
PINMUX	drivers/pinctrl/Kconfig	/^config PINMUX$/;"	c	menu:Pin controllers
PINMUX0	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PINMUX0	/;"	d
PINMUX0_AECS4	arch/arm/mach-davinci/dm644x.c	/^#define PINMUX0_AECS4 /;"	d	file:
PINMUX0_AECS5	arch/arm/mach-davinci/dm644x.c	/^#define PINMUX0_AECS5 /;"	d	file:
PINMUX0_EMACEN	arch/arm/mach-davinci/dm644x.c	/^#define PINMUX0_EMACEN /;"	d	file:
PINMUX1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PINMUX1	/;"	d
PINMUX1_I2C	arch/arm/mach-davinci/dm644x.c	/^#define PINMUX1_I2C /;"	d	file:
PINMUX1_UART0	arch/arm/mach-davinci/dm644x.c	/^#define PINMUX1_UART0 /;"	d	file:
PINMUX1_UART1	arch/arm/mach-davinci/dm644x.c	/^#define PINMUX1_UART1 /;"	d	file:
PINMUX2	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PINMUX2	/;"	d
PINMUX3	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PINMUX3	/;"	d
PINMUX4	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PINMUX4	/;"	d
PINMUX_CFG_REG	include/sh_pfc.h	/^#define PINMUX_CFG_REG(/;"	d
PINMUX_CFG_REG_VAR	include/sh_pfc.h	/^#define PINMUX_CFG_REG_VAR(/;"	d
PINMUX_DATA	include/sh_pfc.h	/^#define PINMUX_DATA(/;"	d
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona3077f190103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona307835a0103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona307879b0103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona307901d0103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anona307945e0103	file:
PINMUX_DATA_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_DATA_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona3077f190103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona307835a0103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona307879b0103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona307901d0103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anona307945e0103	file:
PINMUX_DATA_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_DATA_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_DATA_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define PINMUX_DATA_GP_ALL(/;"	d
PINMUX_DATA_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define PINMUX_DATA_GP_ALL(/;"	d	file:
PINMUX_DATA_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define PINMUX_DATA_GP_ALL(/;"	d	file:
PINMUX_DATA_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define PINMUX_DATA_GP_ALL(/;"	d	file:
PINMUX_DATA_REG	include/sh_pfc.h	/^#define PINMUX_DATA_REG(/;"	d
PINMUX_FLAG_16BIT	arch/arm/mach-exynos/include/mach/pinmux.h	/^	PINMUX_FLAG_16BIT	= 1 << 2,       \/* 16-bit width *\/$/;"	e	enum:__anon7c50aeee0103
PINMUX_FLAG_16BIT	arch/arm/mach-s5pc1xx/include/mach/pinmux.h	/^	PINMUX_FLAG_16BIT	= 1 << 2,       \/* 16-bit width *\/$/;"	e	enum:__anonbb3366240103
PINMUX_FLAG_8BIT_MODE	arch/arm/mach-exynos/include/mach/pinmux.h	/^	PINMUX_FLAG_8BIT_MODE	= 1 << 0,       \/* SDMMC 8-bit mode *\/$/;"	e	enum:__anon7c50aeee0103
PINMUX_FLAG_8BIT_MODE	arch/arm/mach-s5pc1xx/include/mach/pinmux.h	/^	PINMUX_FLAG_8BIT_MODE	= 1 << 0,       \/* SDMMC 8-bit mode *\/$/;"	e	enum:__anonbb3366240103
PINMUX_FLAG_BANK	arch/arm/mach-exynos/include/mach/pinmux.h	/^	PINMUX_FLAG_BANK	= 3 << 0,       \/* bank number (0-3) *\/$/;"	e	enum:__anon7c50aeee0103
PINMUX_FLAG_BANK	arch/arm/mach-s5pc1xx/include/mach/pinmux.h	/^	PINMUX_FLAG_BANK	= 3 << 0,       \/* bank number (0-3) *\/$/;"	e	enum:__anonbb3366240103
PINMUX_FLAG_DBIT	include/sh_pfc.h	/^#define PINMUX_FLAG_DBIT /;"	d
PINMUX_FLAG_DBIT_SHIFT	include/sh_pfc.h	/^#define PINMUX_FLAG_DBIT_SHIFT /;"	d
PINMUX_FLAG_DREG	include/sh_pfc.h	/^#define PINMUX_FLAG_DREG /;"	d
PINMUX_FLAG_DREG_SHIFT	include/sh_pfc.h	/^#define PINMUX_FLAG_DREG_SHIFT /;"	d
PINMUX_FLAG_HS_MODE	arch/arm/mach-exynos/include/mach/pinmux.h	/^	PINMUX_FLAG_HS_MODE	= 1 << 1,       \/* I2C High Speed Mode *\/$/;"	e	enum:__anon7c50aeee0103
PINMUX_FLAG_NONE	arch/arm/mach-exynos/include/mach/pinmux.h	/^	PINMUX_FLAG_NONE	= 0x00000000,$/;"	e	enum:__anon7c50aeee0103
PINMUX_FLAG_NONE	arch/arm/mach-s5pc1xx/include/mach/pinmux.h	/^	PINMUX_FLAG_NONE	= 0x00000000,$/;"	e	enum:__anonbb3366240103
PINMUX_FLAG_TYPE	include/sh_pfc.h	/^#define PINMUX_FLAG_TYPE /;"	d
PINMUX_FLAG_WANT_PULLDOWN	include/sh_pfc.h	/^#define PINMUX_FLAG_WANT_PULLDOWN /;"	d
PINMUX_FLAG_WANT_PULLUP	include/sh_pfc.h	/^#define PINMUX_FLAG_WANT_PULLUP /;"	d
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona3077f190103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona307835a0103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona307879b0103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona307901d0103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anona307945e0103	file:
PINMUX_FUNCTION_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_FUNCTION_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona3077f190103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona307835a0103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona307879b0103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona307901d0103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anona307945e0103	file:
PINMUX_FUNCTION_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_FUNCTION_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_GPIO	include/sh_pfc.h	/^#define PINMUX_GPIO(/;"	d
PINMUX_GPIO_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define PINMUX_GPIO_GP_ALL(/;"	d
PINMUX_GPIO_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define PINMUX_GPIO_GP_ALL(/;"	d	file:
PINMUX_GPIO_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define PINMUX_GPIO_GP_ALL(/;"	d	file:
PINMUX_GPIO_GP_ALL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define PINMUX_GPIO_GP_ALL(/;"	d	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona3077f190103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona307835a0103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona307879b0103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona307901d0103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anona307945e0103	file:
PINMUX_INPUT_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_INPUT_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona3077f190103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona307835a0103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona307879b0103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona307901d0103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anona307945e0103	file:
PINMUX_INPUT_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_INPUT_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_INPUT_PULLDOWN_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_INPUT_PULLDOWN_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_INPUT_PULLDOWN_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_INPUT_PULLDOWN_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_INPUT_PULLDOWN_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_INPUT_PULLDOWN_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_INPUT_PULLDOWN_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_INPUT_PULLDOWN_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_INPUT_PULLUP_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_INPUT_PULLUP_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_INPUT_PULLUP_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_INPUT_PULLUP_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_INPUT_PULLUP_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_INPUT_PULLUP_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_INPUT_PULLUP_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_INPUT_PULLUP_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_IPSR_DATA	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define PINMUX_IPSR_DATA(/;"	d
PINMUX_IPSR_DATA	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define PINMUX_IPSR_DATA(/;"	d	file:
PINMUX_IPSR_DATA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define PINMUX_IPSR_DATA(/;"	d	file:
PINMUX_IPSR_DATA	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define PINMUX_IPSR_DATA(/;"	d	file:
PINMUX_IPSR_MODSEL_DATA	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define PINMUX_IPSR_MODSEL_DATA(/;"	d
PINMUX_IPSR_MODSEL_DATA	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define PINMUX_IPSR_MODSEL_DATA(/;"	d	file:
PINMUX_IPSR_MODSEL_DATA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define PINMUX_IPSR_MODSEL_DATA(/;"	d	file:
PINMUX_IPSR_MODSEL_DATA	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define PINMUX_IPSR_MODSEL_DATA(/;"	d	file:
PINMUX_IRQ	include/sh_pfc.h	/^#define PINMUX_IRQ(/;"	d
PINMUX_ITEM	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^#define PINMUX_ITEM(/;"	d
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona3077f190103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona307835a0103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona307879b0103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona307901d0103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anona307945e0103	file:
PINMUX_MARK_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_MARK_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona3077f190103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona307835a0103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona307879b0103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona307901d0103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anona307945e0103	file:
PINMUX_MARK_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_MARK_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona304c1340103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona3077f190103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona307835a0103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona307879b0103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona307901d0103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anona307945e0103	file:
PINMUX_OUTPUT_BEGIN	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_OUTPUT_BEGIN,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona304c1340103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona3077f190103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona307835a0103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona307879b0103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona307901d0103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anona307945e0103	file:
PINMUX_OUTPUT_END	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_OUTPUT_END,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_PIN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PINMUX_PIN(/;"	d
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona304c1340103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona3077f190103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona307835a0103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona307879b0103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona3078bdc0103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona307901d0103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anona307945e0103	file:
PINMUX_RESERVED	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PINMUX_RESERVED = 0,$/;"	e	enum:__anon991a8e2d0103	file:
PINMUX_TYPE_FUNCTION	include/sh_pfc.h	/^#define PINMUX_TYPE_FUNCTION /;"	d
PINMUX_TYPE_GPIO	include/sh_pfc.h	/^#define PINMUX_TYPE_GPIO /;"	d
PINMUX_TYPE_INPUT	include/sh_pfc.h	/^#define PINMUX_TYPE_INPUT /;"	d
PINMUX_TYPE_INPUT_PULLDOWN	include/sh_pfc.h	/^#define PINMUX_TYPE_INPUT_PULLDOWN /;"	d
PINMUX_TYPE_INPUT_PULLUP	include/sh_pfc.h	/^#define PINMUX_TYPE_INPUT_PULLUP /;"	d
PINMUX_TYPE_NONE	include/sh_pfc.h	/^#define PINMUX_TYPE_NONE /;"	d
PINMUX_TYPE_OUTPUT	include/sh_pfc.h	/^#define PINMUX_TYPE_OUTPUT /;"	d
PINP	arch/arm/mach-tegra/tegra20/pinmux.c	/^#define PINP(/;"	d	file:
PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_ASSIGN /;"	d
PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_ASSIGN /;"	d
PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_ASSIGN /;"	d
PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_ASSIGN /;"	d
PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_ASSIGN /;"	d
PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_EDGE_CLEAR /;"	d
PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_EDGE_CLEAR /;"	d
PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_EDGE_CLEAR /;"	d
PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_EDGE_CLEAR /;"	d
PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_EDGE_CLEAR /;"	d
PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_EDGE_SET /;"	d
PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_EDGE_SET /;"	d
PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_EDGE_SET /;"	d
PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_EDGE_SET /;"	d
PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_EDGE_SET /;"	d
PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_INVERT_CLEAR /;"	d
PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_INVERT_CLEAR /;"	d
PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_INVERT_CLEAR /;"	d
PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_INVERT_CLEAR /;"	d
PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_INVERT_CLEAR /;"	d
PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_INVERT_SET /;"	d
PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_INVERT_SET /;"	d
PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_INVERT_SET /;"	d
PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_INVERT_SET /;"	d
PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_INVERT_SET /;"	d
PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_IRQ /;"	d
PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_IRQ /;"	d
PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_IRQ /;"	d
PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_IRQ /;"	d
PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_IRQ /;"	d
PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_LATCH /;"	d
PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_LATCH /;"	d
PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_LATCH /;"	d
PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_LATCH /;"	d
PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_LATCH /;"	d
PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_MASK_CLEAR /;"	d
PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_MASK_CLEAR /;"	d
PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_MASK_CLEAR /;"	d
PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_MASK_CLEAR /;"	d
PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_MASK_CLEAR /;"	d
PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_MASK_SET /;"	d
PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_MASK_SET /;"	d
PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_MASK_SET /;"	d
PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_MASK_SET /;"	d
PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_MASK_SET /;"	d
PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT0_PINSTATE /;"	d
PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT0_PINSTATE /;"	d
PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT0_PINSTATE /;"	d
PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT0_PINSTATE /;"	d
PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT0_PINSTATE /;"	d
PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_ASSIGN /;"	d
PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_ASSIGN /;"	d
PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_ASSIGN /;"	d
PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_ASSIGN /;"	d
PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_ASSIGN /;"	d
PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_EDGE_CLEAR /;"	d
PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_EDGE_CLEAR /;"	d
PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_EDGE_CLEAR /;"	d
PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_EDGE_CLEAR /;"	d
PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_EDGE_CLEAR /;"	d
PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_EDGE_SET /;"	d
PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_EDGE_SET /;"	d
PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_EDGE_SET /;"	d
PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_EDGE_SET /;"	d
PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_EDGE_SET /;"	d
PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_INVERT_CLEAR /;"	d
PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_INVERT_CLEAR /;"	d
PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_INVERT_CLEAR /;"	d
PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_INVERT_CLEAR /;"	d
PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_INVERT_CLEAR /;"	d
PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_INVERT_SET /;"	d
PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_INVERT_SET /;"	d
PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_INVERT_SET /;"	d
PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_INVERT_SET /;"	d
PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_INVERT_SET /;"	d
PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_IRQ /;"	d
PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_IRQ /;"	d
PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_IRQ /;"	d
PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_IRQ /;"	d
PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_IRQ /;"	d
PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_LATCH /;"	d
PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_LATCH /;"	d
PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_LATCH /;"	d
PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_LATCH /;"	d
PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_LATCH /;"	d
PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_MASK_CLEAR /;"	d
PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_MASK_CLEAR /;"	d
PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_MASK_CLEAR /;"	d
PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_MASK_CLEAR /;"	d
PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_MASK_CLEAR /;"	d
PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_MASK_SET /;"	d
PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_MASK_SET /;"	d
PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_MASK_SET /;"	d
PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_MASK_SET /;"	d
PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_MASK_SET /;"	d
PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT1_PINSTATE /;"	d
PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT1_PINSTATE /;"	d
PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT1_PINSTATE /;"	d
PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT1_PINSTATE /;"	d
PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT1_PINSTATE /;"	d
PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_ASSIGN /;"	d
PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_ASSIGN /;"	d
PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_ASSIGN /;"	d
PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_ASSIGN /;"	d
PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_ASSIGN /;"	d
PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_EDGE_CLEAR /;"	d
PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_EDGE_CLEAR /;"	d
PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_EDGE_CLEAR /;"	d
PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_EDGE_CLEAR /;"	d
PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_EDGE_CLEAR /;"	d
PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_EDGE_SET /;"	d
PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_EDGE_SET /;"	d
PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_EDGE_SET /;"	d
PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_EDGE_SET /;"	d
PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_EDGE_SET /;"	d
PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_INVERT_CLEAR /;"	d
PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_INVERT_CLEAR /;"	d
PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_INVERT_CLEAR /;"	d
PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_INVERT_CLEAR /;"	d
PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_INVERT_CLEAR /;"	d
PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_INVERT_SET /;"	d
PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_INVERT_SET /;"	d
PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_INVERT_SET /;"	d
PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_INVERT_SET /;"	d
PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_INVERT_SET /;"	d
PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_IRQ /;"	d
PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_IRQ /;"	d
PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_IRQ /;"	d
PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_IRQ /;"	d
PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_IRQ /;"	d
PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_LATCH /;"	d
PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_LATCH /;"	d
PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_LATCH /;"	d
PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_LATCH /;"	d
PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_LATCH /;"	d
PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_MASK_CLEAR /;"	d
PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_MASK_CLEAR /;"	d
PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_MASK_CLEAR /;"	d
PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_MASK_CLEAR /;"	d
PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_MASK_CLEAR /;"	d
PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_MASK_SET /;"	d
PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_MASK_SET /;"	d
PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_MASK_SET /;"	d
PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_MASK_SET /;"	d
PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_MASK_SET /;"	d
PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT2_PINSTATE /;"	d
PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT2_PINSTATE /;"	d
PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT2_PINSTATE /;"	d
PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT2_PINSTATE /;"	d
PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT2_PINSTATE /;"	d
PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_ASSIGN /;"	d
PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_ASSIGN /;"	d
PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_ASSIGN /;"	d
PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_ASSIGN /;"	d
PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_ASSIGN /;"	d
PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_EDGE_CLEAR /;"	d
PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_EDGE_CLEAR /;"	d
PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_EDGE_CLEAR /;"	d
PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_EDGE_CLEAR /;"	d
PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_EDGE_CLEAR /;"	d
PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_EDGE_SET /;"	d
PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_EDGE_SET /;"	d
PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_EDGE_SET /;"	d
PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_EDGE_SET /;"	d
PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_EDGE_SET /;"	d
PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_INVERT_CLEAR /;"	d
PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_INVERT_CLEAR /;"	d
PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_INVERT_CLEAR /;"	d
PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_INVERT_CLEAR /;"	d
PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_INVERT_CLEAR /;"	d
PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_INVERT_SET /;"	d
PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_INVERT_SET /;"	d
PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_INVERT_SET /;"	d
PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_INVERT_SET /;"	d
PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_INVERT_SET /;"	d
PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_IRQ /;"	d
PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_IRQ /;"	d
PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_IRQ /;"	d
PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_IRQ /;"	d
PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_IRQ /;"	d
PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_LATCH /;"	d
PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_LATCH /;"	d
PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_LATCH /;"	d
PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_LATCH /;"	d
PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_LATCH /;"	d
PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_MASK_CLEAR /;"	d
PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_MASK_CLEAR /;"	d
PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_MASK_CLEAR /;"	d
PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_MASK_CLEAR /;"	d
PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_MASK_CLEAR /;"	d
PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_MASK_SET /;"	d
PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_MASK_SET /;"	d
PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_MASK_SET /;"	d
PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_MASK_SET /;"	d
PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_MASK_SET /;"	d
PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PINT3_PINSTATE /;"	d
PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PINT3_PINSTATE /;"	d
PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PINT3_PINSTATE /;"	d
PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PINT3_PINSTATE /;"	d
PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PINT3_PINSTATE /;"	d
PINTER	arch/sh/include/asm/cpu_sh7720.h	/^#define PINTER	/;"	d
PIN_BANK	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^#define PIN_BANK(/;"	d	file:
PIN_BANK_IOMUX_FLAGS	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^#define PIN_BANK_IOMUX_FLAGS(/;"	d	file:
PIN_BASE	arch/arm/mach-at91/include/mach/gpio.h	/^#define PIN_BASE	/;"	d
PIN_CAN3_USB2_MUX_CAN3	board/freescale/ls1021atwr/ls1021atwr.c	/^#define PIN_CAN3_USB2_MUX_CAN3	/;"	d	file:
PIN_CAN3_USB2_MUX_USB2	board/freescale/ls1021atwr/ls1021atwr.c	/^#define PIN_CAN3_USB2_MUX_USB2	/;"	d	file:
PIN_CON	drivers/pinctrl/exynos/pinctrl-exynos.h	/^#define PIN_CON	/;"	d
PIN_CONFIG	drivers/pinctrl/pinctrl_pic32.c	/^#define PIN_CONFIG(/;"	d	file:
PIN_CONFIG_BIAS_BUS_HOLD	include/dm/pinctrl.h	/^#define PIN_CONFIG_BIAS_BUS_HOLD	/;"	d
PIN_CONFIG_BIAS_DISABLE	include/dm/pinctrl.h	/^#define PIN_CONFIG_BIAS_DISABLE	/;"	d
PIN_CONFIG_BIAS_HIGH_IMPEDANCE	include/dm/pinctrl.h	/^#define PIN_CONFIG_BIAS_HIGH_IMPEDANCE	/;"	d
PIN_CONFIG_BIAS_PULL_DOWN	include/dm/pinctrl.h	/^#define PIN_CONFIG_BIAS_PULL_DOWN	/;"	d
PIN_CONFIG_BIAS_PULL_PIN_DEFAULT	include/dm/pinctrl.h	/^#define PIN_CONFIG_BIAS_PULL_PIN_DEFAULT	/;"	d
PIN_CONFIG_BIAS_PULL_UP	include/dm/pinctrl.h	/^#define PIN_CONFIG_BIAS_PULL_UP	/;"	d
PIN_CONFIG_DRIVE_OPEN_DRAIN	include/dm/pinctrl.h	/^#define PIN_CONFIG_DRIVE_OPEN_DRAIN	/;"	d
PIN_CONFIG_DRIVE_OPEN_SOURCE	include/dm/pinctrl.h	/^#define PIN_CONFIG_DRIVE_OPEN_SOURCE	/;"	d
PIN_CONFIG_DRIVE_PUSH_PULL	include/dm/pinctrl.h	/^#define PIN_CONFIG_DRIVE_PUSH_PULL	/;"	d
PIN_CONFIG_DRIVE_STRENGTH	include/dm/pinctrl.h	/^#define PIN_CONFIG_DRIVE_STRENGTH	/;"	d
PIN_CONFIG_END	include/dm/pinctrl.h	/^#define PIN_CONFIG_END	/;"	d
PIN_CONFIG_INPUT_DEBOUNCE	include/dm/pinctrl.h	/^#define PIN_CONFIG_INPUT_DEBOUNCE	/;"	d
PIN_CONFIG_INPUT_ENABLE	include/dm/pinctrl.h	/^#define PIN_CONFIG_INPUT_ENABLE	/;"	d
PIN_CONFIG_INPUT_SCHMITT	include/dm/pinctrl.h	/^#define PIN_CONFIG_INPUT_SCHMITT	/;"	d
PIN_CONFIG_INPUT_SCHMITT_ENABLE	include/dm/pinctrl.h	/^#define PIN_CONFIG_INPUT_SCHMITT_ENABLE	/;"	d
PIN_CONFIG_LOW_POWER_MODE	include/dm/pinctrl.h	/^#define PIN_CONFIG_LOW_POWER_MODE	/;"	d
PIN_CONFIG_OUTPUT	include/dm/pinctrl.h	/^#define PIN_CONFIG_OUTPUT	/;"	d
PIN_CONFIG_PIC32_ANALOG	drivers/pinctrl/pinctrl_pic32.c	/^#define PIN_CONFIG_PIC32_ANALOG	/;"	d	file:
PIN_CONFIG_PIC32_DIGITAL	drivers/pinctrl/pinctrl_pic32.c	/^#define PIN_CONFIG_PIC32_DIGITAL	/;"	d	file:
PIN_CONFIG_POWER_SOURCE	include/dm/pinctrl.h	/^#define PIN_CONFIG_POWER_SOURCE	/;"	d
PIN_CONFIG_SLEW_RATE	include/dm/pinctrl.h	/^#define PIN_CONFIG_SLEW_RATE	/;"	d
PIN_COUNT	drivers/i2c/i2c-gpio.c	/^	PIN_COUNT,$/;"	e	enum:__anonbb2c0fab0103	file:
PIN_DAT	drivers/pinctrl/exynos/pinctrl-exynos.h	/^#define PIN_DAT	/;"	d
PIN_DRV	drivers/pinctrl/exynos/pinctrl-exynos.h	/^#define PIN_DRV	/;"	d
PIN_I2C3_IFC_MUX_I2C3	board/freescale/ls1021atwr/ls1021atwr.c	/^#define PIN_I2C3_IFC_MUX_I2C3	/;"	d	file:
PIN_I2C3_IFC_MUX_IFC	board/freescale/ls1021atwr/ls1021atwr.c	/^#define PIN_I2C3_IFC_MUX_IFC	/;"	d	file:
PIN_IEN	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define PIN_IEN	/;"	d
PIN_INPUT	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT	include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT	/;"	d
PIN_INPUT_NOPULL	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_NOPULL	include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_NOPULL	/;"	d
PIN_INPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLDOWN	include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLDOWN	/;"	d
PIN_INPUT_PULLUP	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_PULLUP	include/dt-bindings/pinctrl/omap.h	/^#define PIN_INPUT_PULLUP	/;"	d
PIN_INPUT_SLEW	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_INPUT_SLEW	include/dt-bindings/pinctrl/dra.h	/^#define PIN_INPUT_SLEW	/;"	d
PIN_MUX_FIELD_MASK	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^#define PIN_MUX_FIELD_MASK	/;"	d
PIN_MUX_FIELD_SIZE	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^#define PIN_MUX_FIELD_SIZE	/;"	d
PIN_MUX_NUM_FIELDS	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^#define PIN_MUX_NUM_FIELDS	/;"	d
PIN_MUX_SEL_CAN	board/freescale/ls1021aqds/ls1021aqds.c	/^#define PIN_MUX_SEL_CAN	/;"	d	file:
PIN_MUX_SEL_DSPI	board/freescale/ls2080aqds/ls2080aqds.c	/^#define PIN_MUX_SEL_DSPI	/;"	d	file:
PIN_MUX_SEL_DSPI	board/freescale/ls2080ardb/ls2080ardb.c	/^#define PIN_MUX_SEL_DSPI	/;"	d	file:
PIN_MUX_SEL_IIC2	board/freescale/ls1021aqds/ls1021aqds.c	/^#define PIN_MUX_SEL_IIC2	/;"	d	file:
PIN_MUX_SEL_RGMII	board/freescale/ls1021aqds/ls1021aqds.c	/^#define PIN_MUX_SEL_RGMII	/;"	d	file:
PIN_MUX_SEL_SAI	board/freescale/ls1021aqds/ls1021aqds.c	/^#define PIN_MUX_SEL_SAI	/;"	d	file:
PIN_MUX_SEL_SDHC	board/freescale/ls1021aqds/ls1021aqds.c	/^#define PIN_MUX_SEL_SDHC	/;"	d	file:
PIN_MUX_SEL_SDHC	board/freescale/ls2080aqds/ls2080aqds.c	/^#define PIN_MUX_SEL_SDHC	/;"	d	file:
PIN_MUX_SEL_SDHC	board/freescale/ls2080ardb/ls2080ardb.c	/^#define PIN_MUX_SEL_SDHC	/;"	d	file:
PIN_OFF_INPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLDOWN	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLDOWN	/;"	d
PIN_OFF_INPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_INPUT_PULLUP	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_INPUT_PULLUP	/;"	d
PIN_OFF_NONE	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_NONE	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_NONE	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_HIGH	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_HIGH	/;"	d
PIN_OFF_OUTPUT_LOW	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_OUTPUT_LOW	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_OUTPUT_LOW	/;"	d
PIN_OFF_WAKEUPENABLE	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OFF_WAKEUPENABLE	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OFF_WAKEUPENABLE	/;"	d
PIN_OUTPUT	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	include/dt-bindings/gpio/x86-gpio.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT	/;"	d
PIN_OUTPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLDOWN	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLDOWN	/;"	d
PIN_OUTPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	include/dt-bindings/pinctrl/am33xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	include/dt-bindings/pinctrl/am43xx.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	include/dt-bindings/pinctrl/dra.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_PULLUP	include/dt-bindings/pinctrl/omap.h	/^#define PIN_OUTPUT_PULLUP	/;"	d
PIN_OUTPUT_SEL_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	PIN_OUTPUT_SEL_COUNT	= 7,$/;"	e	enum:__anonf53c9cce0103
PIN_PA0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA0	/;"	d
PIN_PA0__D0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA0__D0	/;"	d
PIN_PA0__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA0__GPIO	/;"	d
PIN_PA0__QSPI0_SCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA0__QSPI0_SCK	/;"	d
PIN_PA0__SDMMC0_CK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA0__SDMMC0_CK	/;"	d
PIN_PA1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA1	/;"	d
PIN_PA10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10	/;"	d
PIN_PA10__A21_NANDALE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10__A21_NANDALE	/;"	d
PIN_PA10__FLEXCOM2_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10__FLEXCOM2_IO4	/;"	d
PIN_PA10__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10__GPIO	/;"	d
PIN_PA10__QSPI1_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10__QSPI1_IO3	/;"	d
PIN_PA10__SDMMC0_RSTN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10__SDMMC0_RSTN	/;"	d
PIN_PA10__TIOB4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA10__TIOB4	/;"	d
PIN_PA11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA11	/;"	d
PIN_PA11__A22_NANDCLE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA11__A22_NANDCLE	/;"	d
PIN_PA11__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA11__GPIO	/;"	d
PIN_PA11__QSPI1_CS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA11__QSPI1_CS	/;"	d
PIN_PA11__SDMMC0_VDDSEL	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA11__SDMMC0_VDDSEL	/;"	d
PIN_PA11__TCLK4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA11__TCLK4	/;"	d
PIN_PA12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA12	/;"	d
PIN_PA12__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA12__GPIO	/;"	d
PIN_PA12__IRQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA12__IRQ	/;"	d
PIN_PA12__NRD_NANDOE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA12__NRD_NANDOE	/;"	d
PIN_PA12__SDMMC0_WP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA12__SDMMC0_WP	/;"	d
PIN_PA13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA13	/;"	d
PIN_PA13__D8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA13__D8	/;"	d
PIN_PA13__FLEXCOM3_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA13__FLEXCOM3_IO1	/;"	d
PIN_PA13__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA13__GPIO	/;"	d
PIN_PA13__SDMMC0_CD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA13__SDMMC0_CD	/;"	d
PIN_PA14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14	/;"	d
PIN_PA14__D9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__D9	/;"	d
PIN_PA14__FLEXCOM3_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__FLEXCOM3_IO2	/;"	d
PIN_PA14__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__GPIO	/;"	d
PIN_PA14__I2SC1_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__I2SC1_MCK	/;"	d
PIN_PA14__QSPI0_SCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__QSPI0_SCK	/;"	d
PIN_PA14__SPI0_SPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__SPI0_SPCK	/;"	d
PIN_PA14__TK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA14__TK1	/;"	d
PIN_PA15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15	/;"	d
PIN_PA15__D10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__D10	/;"	d
PIN_PA15__FLEXCOM3_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__FLEXCOM3_IO0	/;"	d
PIN_PA15__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__GPIO	/;"	d
PIN_PA15__I2SC1_CK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__I2SC1_CK	/;"	d
PIN_PA15__QSPI0_CS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__QSPI0_CS	/;"	d
PIN_PA15__SPI0_MOSI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__SPI0_MOSI	/;"	d
PIN_PA15__TF1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA15__TF1	/;"	d
PIN_PA16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16	/;"	d
PIN_PA16__D11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__D11	/;"	d
PIN_PA16__FLEXCOM3_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__FLEXCOM3_IO3	/;"	d
PIN_PA16__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__GPIO	/;"	d
PIN_PA16__I2SC1_WS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__I2SC1_WS	/;"	d
PIN_PA16__QSPI0_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__QSPI0_IO0	/;"	d
PIN_PA16__SPI0_MISO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__SPI0_MISO	/;"	d
PIN_PA16__TD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA16__TD1	/;"	d
PIN_PA17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17	/;"	d
PIN_PA17__D12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__D12	/;"	d
PIN_PA17__FLEXCOM3_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__FLEXCOM3_IO4	/;"	d
PIN_PA17__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__GPIO	/;"	d
PIN_PA17__I2SC1_DI0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__I2SC1_DI0	/;"	d
PIN_PA17__QSPI0_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__QSPI0_IO1	/;"	d
PIN_PA17__RD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__RD1	/;"	d
PIN_PA17__SPI0_NPCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA17__SPI0_NPCS0	/;"	d
PIN_PA18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18	/;"	d
PIN_PA18__D13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__D13	/;"	d
PIN_PA18__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__GPIO	/;"	d
PIN_PA18__I2SC1_DO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__I2SC1_DO0	/;"	d
PIN_PA18__QSPI0_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__QSPI0_IO2	/;"	d
PIN_PA18__RK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__RK1	/;"	d
PIN_PA18__SDMMC1_DAT0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__SDMMC1_DAT0	/;"	d
PIN_PA18__SPI0_NPCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA18__SPI0_NPCS1	/;"	d
PIN_PA19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19	/;"	d
PIN_PA19__D14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__D14	/;"	d
PIN_PA19__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__GPIO	/;"	d
PIN_PA19__QSPI0_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__QSPI0_IO3	/;"	d
PIN_PA19__RF1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__RF1	/;"	d
PIN_PA19__SDMMC1_DAT1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__SDMMC1_DAT1	/;"	d
PIN_PA19__SPI0_NPCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__SPI0_NPCS2	/;"	d
PIN_PA19__TIOA0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA19__TIOA0	/;"	d
PIN_PA1__D1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA1__D1	/;"	d
PIN_PA1__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA1__GPIO	/;"	d
PIN_PA1__QSPI0_CS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA1__QSPI0_CS	/;"	d
PIN_PA1__SDMMC0_CMD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA1__SDMMC0_CMD	/;"	d
PIN_PA2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA2	/;"	d
PIN_PA20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA20	/;"	d
PIN_PA20__D15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA20__D15	/;"	d
PIN_PA20__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA20__GPIO	/;"	d
PIN_PA20__SDMMC1_DAT2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA20__SDMMC1_DAT2	/;"	d
PIN_PA20__SPI0_NPCS3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA20__SPI0_NPCS3	/;"	d
PIN_PA20__TIOB0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA20__TIOB0	/;"	d
PIN_PA21	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21	/;"	d
PIN_PA21__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21__GPIO	/;"	d
PIN_PA21__IRQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21__IRQ	/;"	d
PIN_PA21__NANDRDY	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21__NANDRDY	/;"	d
PIN_PA21__PCK2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21__PCK2	/;"	d
PIN_PA21__SDMMC1_DAT3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21__SDMMC1_DAT3	/;"	d
PIN_PA21__TCLK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA21__TCLK0	/;"	d
PIN_PA22	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22	/;"	d
PIN_PA22__D0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__D0	/;"	d
PIN_PA22__FLEXCOM1_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__FLEXCOM1_IO2	/;"	d
PIN_PA22__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__GPIO	/;"	d
PIN_PA22__QSPI0_SCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__QSPI0_SCK	/;"	d
PIN_PA22__SDMMC1_CK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__SDMMC1_CK	/;"	d
PIN_PA22__SPI1_SPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__SPI1_SPCK	/;"	d
PIN_PA22__TCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA22__TCK	/;"	d
PIN_PA23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23	/;"	d
PIN_PA23__D1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23__D1	/;"	d
PIN_PA23__FLEXCOM1_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23__FLEXCOM1_IO1	/;"	d
PIN_PA23__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23__GPIO	/;"	d
PIN_PA23__QSPI0_CS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23__QSPI0_CS	/;"	d
PIN_PA23__SPI1_MOSI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23__SPI1_MOSI	/;"	d
PIN_PA23__TDI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA23__TDI	/;"	d
PIN_PA24	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24	/;"	d
PIN_PA24__D2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24__D2	/;"	d
PIN_PA24__FLEXCOM1_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24__FLEXCOM1_IO0	/;"	d
PIN_PA24__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24__GPIO	/;"	d
PIN_PA24__QSPI0_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24__QSPI0_IO0	/;"	d
PIN_PA24__SPI1_MISO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24__SPI1_MISO	/;"	d
PIN_PA24__TDO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA24__TDO	/;"	d
PIN_PA25	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25	/;"	d
PIN_PA25__D3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25__D3	/;"	d
PIN_PA25__FLEXCOM1_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25__FLEXCOM1_IO3	/;"	d
PIN_PA25__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25__GPIO	/;"	d
PIN_PA25__QSPI0_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25__QSPI0_IO1	/;"	d
PIN_PA25__SPI1_NPCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25__SPI1_NPCS0	/;"	d
PIN_PA25__TMS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA25__TMS	/;"	d
PIN_PA26	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26	/;"	d
PIN_PA26__D4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26__D4	/;"	d
PIN_PA26__FLEXCOM1_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26__FLEXCOM1_IO4	/;"	d
PIN_PA26__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26__GPIO	/;"	d
PIN_PA26__NTRST	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26__NTRST	/;"	d
PIN_PA26__QSPI0_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26__QSPI0_IO2	/;"	d
PIN_PA26__SPI1_NPCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA26__SPI1_NPCS1	/;"	d
PIN_PA27	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27	/;"	d
PIN_PA27__D5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__D5	/;"	d
PIN_PA27__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__GPIO	/;"	d
PIN_PA27__QSPI0_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__QSPI0_IO3	/;"	d
PIN_PA27__SDMMC1_RSTN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__SDMMC1_RSTN	/;"	d
PIN_PA27__SPI0_NPCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__SPI0_NPCS2	/;"	d
PIN_PA27__SPI1_NPCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__SPI1_NPCS2	/;"	d
PIN_PA27__TIOA1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA27__TIOA1	/;"	d
PIN_PA28	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28	/;"	d
PIN_PA28__CLASSD_L0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__CLASSD_L0	/;"	d
PIN_PA28__D6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__D6	/;"	d
PIN_PA28__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__GPIO	/;"	d
PIN_PA28__SDMMC1_CMD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__SDMMC1_CMD	/;"	d
PIN_PA28__SPI0_NPCS3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__SPI0_NPCS3	/;"	d
PIN_PA28__SPI1_NPCS3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__SPI1_NPCS3	/;"	d
PIN_PA28__TIOB1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA28__TIOB1	/;"	d
PIN_PA29	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29	/;"	d
PIN_PA29__CLASSD_L1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29__CLASSD_L1	/;"	d
PIN_PA29__D7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29__D7	/;"	d
PIN_PA29__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29__GPIO	/;"	d
PIN_PA29__SDMMC1_WP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29__SDMMC1_WP	/;"	d
PIN_PA29__SPI0_NPCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29__SPI0_NPCS1	/;"	d
PIN_PA29__TCLK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA29__TCLK1	/;"	d
PIN_PA2__D2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA2__D2	/;"	d
PIN_PA2__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA2__GPIO	/;"	d
PIN_PA2__QSPI0_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA2__QSPI0_IO0	/;"	d
PIN_PA2__SDMMC0_DAT0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA2__SDMMC0_DAT0	/;"	d
PIN_PA3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA3	/;"	d
PIN_PA30	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30	/;"	d
PIN_PA30__CLASSD_L2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30__CLASSD_L2	/;"	d
PIN_PA30__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30__GPIO	/;"	d
PIN_PA30__NWE_NANDWE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30__NWE_NANDWE	/;"	d
PIN_PA30__PWMH0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30__PWMH0	/;"	d
PIN_PA30__SDMMC1_CD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30__SDMMC1_CD	/;"	d
PIN_PA30__SPI0_NPCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA30__SPI0_NPCS0	/;"	d
PIN_PA31	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA31	/;"	d
PIN_PA31__CLASSD_L3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA31__CLASSD_L3	/;"	d
PIN_PA31__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA31__GPIO	/;"	d
PIN_PA31__NCS3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA31__NCS3	/;"	d
PIN_PA31__PWML0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA31__PWML0	/;"	d
PIN_PA31__SPI0_MISO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA31__SPI0_MISO	/;"	d
PIN_PA3__D3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA3__D3	/;"	d
PIN_PA3__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA3__GPIO	/;"	d
PIN_PA3__QSPI0_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA3__QSPI0_IO1	/;"	d
PIN_PA3__SDMMC0_DAT1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA3__SDMMC0_DAT1	/;"	d
PIN_PA4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA4	/;"	d
PIN_PA4__D4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA4__D4	/;"	d
PIN_PA4__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA4__GPIO	/;"	d
PIN_PA4__QSPI0_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA4__QSPI0_IO2	/;"	d
PIN_PA4__SDMMC0_DAT2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA4__SDMMC0_DAT2	/;"	d
PIN_PA5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA5	/;"	d
PIN_PA5__D5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA5__D5	/;"	d
PIN_PA5__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA5__GPIO	/;"	d
PIN_PA5__QSPI0_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA5__QSPI0_IO3	/;"	d
PIN_PA5__SDMMC0_DAT3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA5__SDMMC0_DAT3	/;"	d
PIN_PA6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6	/;"	d
PIN_PA6__D6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6__D6	/;"	d
PIN_PA6__FLEXCOM2_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6__FLEXCOM2_IO0	/;"	d
PIN_PA6__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6__GPIO	/;"	d
PIN_PA6__QSPI1_SCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6__QSPI1_SCK	/;"	d
PIN_PA6__SDMMC0_DAT4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6__SDMMC0_DAT4	/;"	d
PIN_PA6__TIOA5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA6__TIOA5	/;"	d
PIN_PA7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7	/;"	d
PIN_PA7__D7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7__D7	/;"	d
PIN_PA7__FLEXCOM2_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7__FLEXCOM2_IO1	/;"	d
PIN_PA7__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7__GPIO	/;"	d
PIN_PA7__QSPI1_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7__QSPI1_IO0	/;"	d
PIN_PA7__SDMMC0_DAT5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7__SDMMC0_DAT5	/;"	d
PIN_PA7__TIOB5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA7__TIOB5	/;"	d
PIN_PA8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8	/;"	d
PIN_PA8__FLEXCOM2_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8__FLEXCOM2_IO2	/;"	d
PIN_PA8__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8__GPIO	/;"	d
PIN_PA8__NWE_NANDWE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8__NWE_NANDWE	/;"	d
PIN_PA8__QSPI1_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8__QSPI1_IO1	/;"	d
PIN_PA8__SDMMC0_DAT6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8__SDMMC0_DAT6	/;"	d
PIN_PA8__TCLK5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA8__TCLK5	/;"	d
PIN_PA9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9	/;"	d
PIN_PA9__FLEXCOM2_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9__FLEXCOM2_IO3	/;"	d
PIN_PA9__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9__GPIO	/;"	d
PIN_PA9__NCS3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9__NCS3	/;"	d
PIN_PA9__QSPI1_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9__QSPI1_IO2	/;"	d
PIN_PA9__SDMMC0_DAT7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9__SDMMC0_DAT7	/;"	d
PIN_PA9__TIOA4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PA9__TIOA4	/;"	d
PIN_PB0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB0	/;"	d
PIN_PB0__A21_NANDALE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB0__A21_NANDALE	/;"	d
PIN_PB0__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB0__GPIO	/;"	d
PIN_PB0__PWMH1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB0__PWMH1	/;"	d
PIN_PB0__SPI0_MOSI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB0__SPI0_MOSI	/;"	d
PIN_PB1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB1	/;"	d
PIN_PB10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10	/;"	d
PIN_PB10__D15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10__D15	/;"	d
PIN_PB10__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10__GPIO	/;"	d
PIN_PB10__GRX2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10__GRX2	/;"	d
PIN_PB10__PWMEXTRG1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10__PWMEXTRG1	/;"	d
PIN_PB10__QSPI1_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10__QSPI1_IO3	/;"	d
PIN_PB10__TIOB3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB10__TIOB3	/;"	d
PIN_PB11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11	/;"	d
PIN_PB11__A0_NBS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11__A0_NBS0	/;"	d
PIN_PB11__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11__GPIO	/;"	d
PIN_PB11__GRX3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11__GRX3	/;"	d
PIN_PB11__LCDDAT0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11__LCDDAT0	/;"	d
PIN_PB11__PDMIC_DAT	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11__PDMIC_DAT	/;"	d
PIN_PB11__URXD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB11__URXD3	/;"	d
PIN_PB12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12	/;"	d
PIN_PB12__A1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12__A1	/;"	d
PIN_PB12__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12__GPIO	/;"	d
PIN_PB12__GTX2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12__GTX2	/;"	d
PIN_PB12__LCDDAT1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12__LCDDAT1	/;"	d
PIN_PB12__PDMIC_CLK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12__PDMIC_CLK	/;"	d
PIN_PB12__UTXD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB12__UTXD3	/;"	d
PIN_PB13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB13	/;"	d
PIN_PB13__A2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB13__A2	/;"	d
PIN_PB13__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB13__GPIO	/;"	d
PIN_PB13__GTX3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB13__GTX3	/;"	d
PIN_PB13__LCDDAT2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB13__LCDDAT2	/;"	d
PIN_PB13__PCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB13__PCK1	/;"	d
PIN_PB14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14	/;"	d
PIN_PB14__A3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__A3	/;"	d
PIN_PB14__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__GPIO	/;"	d
PIN_PB14__GTXCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__GTXCK	/;"	d
PIN_PB14__I2SC1_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__I2SC1_MCK	/;"	d
PIN_PB14__LCDDAT3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__LCDDAT3	/;"	d
PIN_PB14__QSPI1_SCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__QSPI1_SCK	/;"	d
PIN_PB14__TK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB14__TK1	/;"	d
PIN_PB15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15	/;"	d
PIN_PB15__A4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__A4	/;"	d
PIN_PB15__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__GPIO	/;"	d
PIN_PB15__GTXEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__GTXEN	/;"	d
PIN_PB15__I2SC1_CK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__I2SC1_CK	/;"	d
PIN_PB15__LCDDAT4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__LCDDAT4	/;"	d
PIN_PB15__QSPI1_CS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__QSPI1_CS	/;"	d
PIN_PB15__TF1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB15__TF1	/;"	d
PIN_PB16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16	/;"	d
PIN_PB16__A5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__A5	/;"	d
PIN_PB16__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__GPIO	/;"	d
PIN_PB16__GRXDV	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__GRXDV	/;"	d
PIN_PB16__I2SC1_WS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__I2SC1_WS	/;"	d
PIN_PB16__LCDDAT5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__LCDDAT5	/;"	d
PIN_PB16__QSPI1_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__QSPI1_IO0	/;"	d
PIN_PB16__TD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB16__TD1	/;"	d
PIN_PB17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17	/;"	d
PIN_PB17__A6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__A6	/;"	d
PIN_PB17__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__GPIO	/;"	d
PIN_PB17__GRXER	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__GRXER	/;"	d
PIN_PB17__I2SC1_DI0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__I2SC1_DI0	/;"	d
PIN_PB17__LCDDAT6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__LCDDAT6	/;"	d
PIN_PB17__QSPI1_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__QSPI1_IO1	/;"	d
PIN_PB17__RD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB17__RD1	/;"	d
PIN_PB18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18	/;"	d
PIN_PB18__A7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__A7	/;"	d
PIN_PB18__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__GPIO	/;"	d
PIN_PB18__GRX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__GRX0	/;"	d
PIN_PB18__I2SC1_DO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__I2SC1_DO0	/;"	d
PIN_PB18__LCDDAT7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__LCDDAT7	/;"	d
PIN_PB18__QSPI1_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__QSPI1_IO2	/;"	d
PIN_PB18__RK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB18__RK1	/;"	d
PIN_PB19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19	/;"	d
PIN_PB19__A8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__A8	/;"	d
PIN_PB19__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__GPIO	/;"	d
PIN_PB19__GRX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__GRX1	/;"	d
PIN_PB19__LCDDAT8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__LCDDAT8	/;"	d
PIN_PB19__QSPI1_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__QSPI1_IO3	/;"	d
PIN_PB19__RF1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__RF1	/;"	d
PIN_PB19__TIOA3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB19__TIOA3	/;"	d
PIN_PB1__A22_NANDCLE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB1__A22_NANDCLE	/;"	d
PIN_PB1__CLASSD_R0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB1__CLASSD_R0	/;"	d
PIN_PB1__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB1__GPIO	/;"	d
PIN_PB1__PWML1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB1__PWML1	/;"	d
PIN_PB1__SPI0_SPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB1__SPI0_SPCK	/;"	d
PIN_PB2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB2	/;"	d
PIN_PB20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20	/;"	d
PIN_PB20__A9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__A9	/;"	d
PIN_PB20__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__GPIO	/;"	d
PIN_PB20__GTX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__GTX0	/;"	d
PIN_PB20__LCDDAT9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__LCDDAT9	/;"	d
PIN_PB20__PCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__PCK1	/;"	d
PIN_PB20__TIOB3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__TIOB3	/;"	d
PIN_PB20__TK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB20__TK0	/;"	d
PIN_PB21	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21	/;"	d
PIN_PB21__A10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__A10	/;"	d
PIN_PB21__FLEXCOM3_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__FLEXCOM3_IO2	/;"	d
PIN_PB21__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__GPIO	/;"	d
PIN_PB21__GTX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__GTX1	/;"	d
PIN_PB21__LCDDAT10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__LCDDAT10	/;"	d
PIN_PB21__TCLK3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__TCLK3	/;"	d
PIN_PB21__TF0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB21__TF0	/;"	d
PIN_PB22	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22	/;"	d
PIN_PB22__A11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__A11	/;"	d
PIN_PB22__FLEXCOM3_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__FLEXCOM3_IO1	/;"	d
PIN_PB22__GMDC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__GMDC	/;"	d
PIN_PB22__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__GPIO	/;"	d
PIN_PB22__LCDDAT11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__LCDDAT11	/;"	d
PIN_PB22__TDO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__TDO	/;"	d
PIN_PB22__TIOA2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB22__TIOA2	/;"	d
PIN_PB23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23	/;"	d
PIN_PB23__A12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__A12	/;"	d
PIN_PB23__FLEXCOM3_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__FLEXCOM3_IO0	/;"	d
PIN_PB23__GMDIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__GMDIO	/;"	d
PIN_PB23__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__GPIO	/;"	d
PIN_PB23__LCDDAT12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__LCDDAT12	/;"	d
PIN_PB23__RD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__RD0	/;"	d
PIN_PB23__TIOB2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB23__TIOB2	/;"	d
PIN_PB24	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24	/;"	d
PIN_PB24__A13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__A13	/;"	d
PIN_PB24__FLEXCOM3_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__FLEXCOM3_IO3	/;"	d
PIN_PB24__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__GPIO	/;"	d
PIN_PB24__ISC_D10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__ISC_D10	/;"	d
PIN_PB24__LCDDAT13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__LCDDAT13	/;"	d
PIN_PB24__RK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__RK0	/;"	d
PIN_PB24__TCLK2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB24__TCLK2	/;"	d
PIN_PB25	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25	/;"	d
PIN_PB25__A14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25__A14	/;"	d
PIN_PB25__FLEXCOM3_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25__FLEXCOM3_IO4	/;"	d
PIN_PB25__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25__GPIO	/;"	d
PIN_PB25__ISC_D11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25__ISC_D11	/;"	d
PIN_PB25__LCDDAT14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25__LCDDAT14	/;"	d
PIN_PB25__RF0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB25__RF0	/;"	d
PIN_PB26	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26	/;"	d
PIN_PB26__A15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26__A15	/;"	d
PIN_PB26__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26__GPIO	/;"	d
PIN_PB26__ISC_D0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26__ISC_D0	/;"	d
PIN_PB26__LCDDAT15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26__LCDDAT15	/;"	d
PIN_PB26__PDMIC_DAT	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26__PDMIC_DAT	/;"	d
PIN_PB26__URXD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB26__URXD0	/;"	d
PIN_PB27	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27	/;"	d
PIN_PB27__A16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27__A16	/;"	d
PIN_PB27__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27__GPIO	/;"	d
PIN_PB27__ISC_D1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27__ISC_D1	/;"	d
PIN_PB27__LCDDAT16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27__LCDDAT16	/;"	d
PIN_PB27__PDMIC_CLK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27__PDMIC_CLK	/;"	d
PIN_PB27__UTXD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB27__UTXD0	/;"	d
PIN_PB28	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28	/;"	d
PIN_PB28__A17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28__A17	/;"	d
PIN_PB28__FLEXCOM0_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28__FLEXCOM0_IO0	/;"	d
PIN_PB28__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28__GPIO	/;"	d
PIN_PB28__ISC_D2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28__ISC_D2	/;"	d
PIN_PB28__LCDDAT17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28__LCDDAT17	/;"	d
PIN_PB28__TIOA5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB28__TIOA5	/;"	d
PIN_PB29	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29	/;"	d
PIN_PB29__A18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29__A18	/;"	d
PIN_PB29__FLEXCOM0_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29__FLEXCOM0_IO1	/;"	d
PIN_PB29__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29__GPIO	/;"	d
PIN_PB29__ISC_D3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29__ISC_D3	/;"	d
PIN_PB29__LCDDAT18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29__LCDDAT18	/;"	d
PIN_PB29__TIOB5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB29__TIOB5	/;"	d
PIN_PB2__CLASSD_R1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB2__CLASSD_R1	/;"	d
PIN_PB2__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB2__GPIO	/;"	d
PIN_PB2__NRD_NANDOE	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB2__NRD_NANDOE	/;"	d
PIN_PB2__PWMFI0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB2__PWMFI0	/;"	d
PIN_PB3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3	/;"	d
PIN_PB30	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30	/;"	d
PIN_PB30__A19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30__A19	/;"	d
PIN_PB30__FLEXCOM0_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30__FLEXCOM0_IO2	/;"	d
PIN_PB30__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30__GPIO	/;"	d
PIN_PB30__ISC_D4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30__ISC_D4	/;"	d
PIN_PB30__LCDDAT19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30__LCDDAT19	/;"	d
PIN_PB30__TCLK5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB30__TCLK5	/;"	d
PIN_PB31	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31	/;"	d
PIN_PB31__A20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31__A20	/;"	d
PIN_PB31__FLEXCOM0_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31__FLEXCOM0_IO3	/;"	d
PIN_PB31__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31__GPIO	/;"	d
PIN_PB31__ISC_D5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31__ISC_D5	/;"	d
PIN_PB31__LCDDAT20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31__LCDDAT20	/;"	d
PIN_PB31__TWD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB31__TWD0	/;"	d
PIN_PB3__CLASSD_R2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3__CLASSD_R2	/;"	d
PIN_PB3__D8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3__D8	/;"	d
PIN_PB3__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3__GPIO	/;"	d
PIN_PB3__IRQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3__IRQ	/;"	d
PIN_PB3__PWMEXTRG0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3__PWMEXTRG0	/;"	d
PIN_PB3__URXD4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB3__URXD4	/;"	d
PIN_PB4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB4	/;"	d
PIN_PB4__CLASSD_R3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB4__CLASSD_R3	/;"	d
PIN_PB4__D9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB4__D9	/;"	d
PIN_PB4__FIQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB4__FIQ	/;"	d
PIN_PB4__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB4__GPIO	/;"	d
PIN_PB4__UTXD4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB4__UTXD4	/;"	d
PIN_PB5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5	/;"	d
PIN_PB5__D10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5__D10	/;"	d
PIN_PB5__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5__GPIO	/;"	d
PIN_PB5__GTSUCOMP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5__GTSUCOMP	/;"	d
PIN_PB5__PWMH2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5__PWMH2	/;"	d
PIN_PB5__QSPI1_SCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5__QSPI1_SCK	/;"	d
PIN_PB5__TCLK2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB5__TCLK2	/;"	d
PIN_PB6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6	/;"	d
PIN_PB6__D11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6__D11	/;"	d
PIN_PB6__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6__GPIO	/;"	d
PIN_PB6__GTXER	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6__GTXER	/;"	d
PIN_PB6__PWML2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6__PWML2	/;"	d
PIN_PB6__QSPI1_CS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6__QSPI1_CS	/;"	d
PIN_PB6__TIOA2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB6__TIOA2	/;"	d
PIN_PB7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7	/;"	d
PIN_PB7__D12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7__D12	/;"	d
PIN_PB7__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7__GPIO	/;"	d
PIN_PB7__GRXCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7__GRXCK	/;"	d
PIN_PB7__PWMH3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7__PWMH3	/;"	d
PIN_PB7__QSPI1_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7__QSPI1_IO0	/;"	d
PIN_PB7__TIOB2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB7__TIOB2	/;"	d
PIN_PB8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8	/;"	d
PIN_PB8__D13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8__D13	/;"	d
PIN_PB8__GCRS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8__GCRS	/;"	d
PIN_PB8__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8__GPIO	/;"	d
PIN_PB8__PWML3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8__PWML3	/;"	d
PIN_PB8__QSPI1_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8__QSPI1_IO1	/;"	d
PIN_PB8__TCLK3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB8__TCLK3	/;"	d
PIN_PB9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9	/;"	d
PIN_PB9__D14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9__D14	/;"	d
PIN_PB9__GCOL	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9__GCOL	/;"	d
PIN_PB9__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9__GPIO	/;"	d
PIN_PB9__PWMFI1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9__PWMFI1	/;"	d
PIN_PB9__QSPI1_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9__QSPI1_IO2	/;"	d
PIN_PB9__TIOA3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PB9__TIOA3	/;"	d
PIN_PC0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0	/;"	d
PIN_PC0__A23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0__A23	/;"	d
PIN_PC0__FLEXCOM0_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0__FLEXCOM0_IO4	/;"	d
PIN_PC0__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0__GPIO	/;"	d
PIN_PC0__ISC_D6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0__ISC_D6	/;"	d
PIN_PC0__LCDDAT21	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0__LCDDAT21	/;"	d
PIN_PC0__TWCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC0__TWCK0	/;"	d
PIN_PC1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1	/;"	d
PIN_PC10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10	/;"	d
PIN_PC10__CANTX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10__CANTX0	/;"	d
PIN_PC10__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10__GPIO	/;"	d
PIN_PC10__GTXCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10__GTXCK	/;"	d
PIN_PC10__ISC_D1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10__ISC_D1	/;"	d
PIN_PC10__LCDDAT2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10__LCDDAT2	/;"	d
PIN_PC10__TIOB4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC10__TIOB4	/;"	d
PIN_PC11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11	/;"	d
PIN_PC11__A0_NBS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__A0_NBS0	/;"	d
PIN_PC11__CANRX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__CANRX0	/;"	d
PIN_PC11__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__GPIO	/;"	d
PIN_PC11__GTXEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__GTXEN	/;"	d
PIN_PC11__ISC_D2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__ISC_D2	/;"	d
PIN_PC11__LCDDAT3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__LCDDAT3	/;"	d
PIN_PC11__TCLK4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC11__TCLK4	/;"	d
PIN_PC12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12	/;"	d
PIN_PC12__A1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__A1	/;"	d
PIN_PC12__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__GPIO	/;"	d
PIN_PC12__GRXDV	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__GRXDV	/;"	d
PIN_PC12__ISC_D3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__ISC_D3	/;"	d
PIN_PC12__LCDDAT4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__LCDDAT4	/;"	d
PIN_PC12__TK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__TK0	/;"	d
PIN_PC12__URXD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC12__URXD3	/;"	d
PIN_PC13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13	/;"	d
PIN_PC13__A2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__A2	/;"	d
PIN_PC13__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__GPIO	/;"	d
PIN_PC13__GRXER	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__GRXER	/;"	d
PIN_PC13__ISC_D4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__ISC_D4	/;"	d
PIN_PC13__LCDDAT5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__LCDDAT5	/;"	d
PIN_PC13__TF0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__TF0	/;"	d
PIN_PC13__UTXD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC13__UTXD3	/;"	d
PIN_PC14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14	/;"	d
PIN_PC14__A3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14__A3	/;"	d
PIN_PC14__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14__GPIO	/;"	d
PIN_PC14__GRX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14__GRX0	/;"	d
PIN_PC14__ISC_D5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14__ISC_D5	/;"	d
PIN_PC14__LCDDAT6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14__LCDDAT6	/;"	d
PIN_PC14__TDO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC14__TDO	/;"	d
PIN_PC15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15	/;"	d
PIN_PC15__A4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15__A4	/;"	d
PIN_PC15__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15__GPIO	/;"	d
PIN_PC15__GRX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15__GRX1	/;"	d
PIN_PC15__ISC_D6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15__ISC_D6	/;"	d
PIN_PC15__LCDDAT7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15__LCDDAT7	/;"	d
PIN_PC15__RD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC15__RD0	/;"	d
PIN_PC16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16	/;"	d
PIN_PC16__A5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16__A5	/;"	d
PIN_PC16__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16__GPIO	/;"	d
PIN_PC16__GTX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16__GTX0	/;"	d
PIN_PC16__ISC_D7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16__ISC_D7	/;"	d
PIN_PC16__LCDDAT10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16__LCDDAT10	/;"	d
PIN_PC16__RK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC16__RK0	/;"	d
PIN_PC17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17	/;"	d
PIN_PC17__A6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17__A6	/;"	d
PIN_PC17__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17__GPIO	/;"	d
PIN_PC17__GTX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17__GTX1	/;"	d
PIN_PC17__ISC_D8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17__ISC_D8	/;"	d
PIN_PC17__LCDDAT11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17__LCDDAT11	/;"	d
PIN_PC17__RF0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC17__RF0	/;"	d
PIN_PC18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18	/;"	d
PIN_PC18__A7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18__A7	/;"	d
PIN_PC18__FLEXCOM3_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18__FLEXCOM3_IO2	/;"	d
PIN_PC18__GMDC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18__GMDC	/;"	d
PIN_PC18__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18__GPIO	/;"	d
PIN_PC18__ISC_D9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18__ISC_D9	/;"	d
PIN_PC18__LCDDAT12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC18__LCDDAT12	/;"	d
PIN_PC19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19	/;"	d
PIN_PC19__A8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19__A8	/;"	d
PIN_PC19__FLEXCOM3_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19__FLEXCOM3_IO1	/;"	d
PIN_PC19__GMDIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19__GMDIO	/;"	d
PIN_PC19__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19__GPIO	/;"	d
PIN_PC19__ISC_D10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19__ISC_D10	/;"	d
PIN_PC19__LCDDAT13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC19__LCDDAT13	/;"	d
PIN_PC1__A24	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__A24	/;"	d
PIN_PC1__CANTX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__CANTX0	/;"	d
PIN_PC1__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__GPIO	/;"	d
PIN_PC1__I2SC0_CK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__I2SC0_CK	/;"	d
PIN_PC1__ISC_D7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__ISC_D7	/;"	d
PIN_PC1__LCDDAT22	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__LCDDAT22	/;"	d
PIN_PC1__SPI1_SPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC1__SPI1_SPCK	/;"	d
PIN_PC2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2	/;"	d
PIN_PC20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20	/;"	d
PIN_PC20__A9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20__A9	/;"	d
PIN_PC20__FLEXCOM3_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20__FLEXCOM3_IO0	/;"	d
PIN_PC20__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20__GPIO	/;"	d
PIN_PC20__GRXCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20__GRXCK	/;"	d
PIN_PC20__ISC_D11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20__ISC_D11	/;"	d
PIN_PC20__LCDDAT14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC20__LCDDAT14	/;"	d
PIN_PC21	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21	/;"	d
PIN_PC21__A10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21__A10	/;"	d
PIN_PC21__FLEXCOM3_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21__FLEXCOM3_IO3	/;"	d
PIN_PC21__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21__GPIO	/;"	d
PIN_PC21__GTXER	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21__GTXER	/;"	d
PIN_PC21__ISC_PCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21__ISC_PCK	/;"	d
PIN_PC21__LCDDAT15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC21__LCDDAT15	/;"	d
PIN_PC22	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22	/;"	d
PIN_PC22__A11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22__A11	/;"	d
PIN_PC22__FLEXCOM3_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22__FLEXCOM3_IO4	/;"	d
PIN_PC22__GCRS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22__GCRS	/;"	d
PIN_PC22__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22__GPIO	/;"	d
PIN_PC22__ISC_VSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22__ISC_VSYNC	/;"	d
PIN_PC22__LCDDAT18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC22__LCDDAT18	/;"	d
PIN_PC23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC23	/;"	d
PIN_PC23__A12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC23__A12	/;"	d
PIN_PC23__GCOL	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC23__GCOL	/;"	d
PIN_PC23__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC23__GPIO	/;"	d
PIN_PC23__ISC_HSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC23__ISC_HSYNC	/;"	d
PIN_PC23__LCDDAT19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC23__LCDDAT19	/;"	d
PIN_PC24	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC24	/;"	d
PIN_PC24__A13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC24__A13	/;"	d
PIN_PC24__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC24__GPIO	/;"	d
PIN_PC24__GRX2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC24__GRX2	/;"	d
PIN_PC24__ISC_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC24__ISC_MCK	/;"	d
PIN_PC24__LCDDAT20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC24__LCDDAT20	/;"	d
PIN_PC25	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC25	/;"	d
PIN_PC25__A14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC25__A14	/;"	d
PIN_PC25__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC25__GPIO	/;"	d
PIN_PC25__GRX3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC25__GRX3	/;"	d
PIN_PC25__ISC_FIELD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC25__ISC_FIELD	/;"	d
PIN_PC25__LCDDAT21	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC25__LCDDAT21	/;"	d
PIN_PC26	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC26	/;"	d
PIN_PC26__A15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC26__A15	/;"	d
PIN_PC26__CANTX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC26__CANTX1	/;"	d
PIN_PC26__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC26__GPIO	/;"	d
PIN_PC26__GTX2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC26__GTX2	/;"	d
PIN_PC26__LCDDAT22	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC26__LCDDAT22	/;"	d
PIN_PC27	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27	/;"	d
PIN_PC27__A16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__A16	/;"	d
PIN_PC27__CANRX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__CANRX1	/;"	d
PIN_PC27__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__GPIO	/;"	d
PIN_PC27__GTX3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__GTX3	/;"	d
PIN_PC27__LCDDAT23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__LCDDAT23	/;"	d
PIN_PC27__PCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__PCK1	/;"	d
PIN_PC27__TWD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC27__TWD0	/;"	d
PIN_PC28	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28	/;"	d
PIN_PC28__A17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28__A17	/;"	d
PIN_PC28__FLEXCOM4_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28__FLEXCOM4_IO0	/;"	d
PIN_PC28__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28__GPIO	/;"	d
PIN_PC28__LCDPWM	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28__LCDPWM	/;"	d
PIN_PC28__PCK2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28__PCK2	/;"	d
PIN_PC28__TWCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC28__TWCK0	/;"	d
PIN_PC29	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC29	/;"	d
PIN_PC29__A18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC29__A18	/;"	d
PIN_PC29__FLEXCOM4_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC29__FLEXCOM4_IO1	/;"	d
PIN_PC29__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC29__GPIO	/;"	d
PIN_PC29__LCDDISP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC29__LCDDISP	/;"	d
PIN_PC2__A25	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__A25	/;"	d
PIN_PC2__CANRX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__CANRX0	/;"	d
PIN_PC2__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__GPIO	/;"	d
PIN_PC2__I2SC0_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__I2SC0_MCK	/;"	d
PIN_PC2__ISC_D8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__ISC_D8	/;"	d
PIN_PC2__LCDDAT23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__LCDDAT23	/;"	d
PIN_PC2__SPI1_MOSI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC2__SPI1_MOSI	/;"	d
PIN_PC3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3	/;"	d
PIN_PC30	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC30	/;"	d
PIN_PC30__A19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC30__A19	/;"	d
PIN_PC30__FLEXCOM4_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC30__FLEXCOM4_IO2	/;"	d
PIN_PC30__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC30__GPIO	/;"	d
PIN_PC30__LCDVSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC30__LCDVSYNC	/;"	d
PIN_PC31	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC31	/;"	d
PIN_PC31__A20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC31__A20	/;"	d
PIN_PC31__FLEXCOM4_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC31__FLEXCOM4_IO3	/;"	d
PIN_PC31__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC31__GPIO	/;"	d
PIN_PC31__LCDHSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC31__LCDHSYNC	/;"	d
PIN_PC31__URXD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC31__URXD3	/;"	d
PIN_PC3__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__GPIO	/;"	d
PIN_PC3__I2SC0_WS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__I2SC0_WS	/;"	d
PIN_PC3__ISC_D9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__ISC_D9	/;"	d
PIN_PC3__LCDPWM	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__LCDPWM	/;"	d
PIN_PC3__NWAIT	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__NWAIT	/;"	d
PIN_PC3__SPI1_MISO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__SPI1_MISO	/;"	d
PIN_PC3__TIOA1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC3__TIOA1	/;"	d
PIN_PC4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4	/;"	d
PIN_PC4__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__GPIO	/;"	d
PIN_PC4__I2SC0_DI0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__I2SC0_DI0	/;"	d
PIN_PC4__ISC_PCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__ISC_PCK	/;"	d
PIN_PC4__LCDDISP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__LCDDISP	/;"	d
PIN_PC4__NWR1_NBS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__NWR1_NBS1	/;"	d
PIN_PC4__SPI1_NPCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__SPI1_NPCS0	/;"	d
PIN_PC4__TIOB1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC4__TIOB1	/;"	d
PIN_PC5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5	/;"	d
PIN_PC5__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__GPIO	/;"	d
PIN_PC5__I2SC0_DO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__I2SC0_DO0	/;"	d
PIN_PC5__ISC_VSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__ISC_VSYNC	/;"	d
PIN_PC5__LCDVSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__LCDVSYNC	/;"	d
PIN_PC5__NCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__NCS0	/;"	d
PIN_PC5__SPI1_NPCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__SPI1_NPCS1	/;"	d
PIN_PC5__TCLK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC5__TCLK1	/;"	d
PIN_PC6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6	/;"	d
PIN_PC6__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6__GPIO	/;"	d
PIN_PC6__ISC_HSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6__ISC_HSYNC	/;"	d
PIN_PC6__LCDHSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6__LCDHSYNC	/;"	d
PIN_PC6__NCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6__NCS1	/;"	d
PIN_PC6__SPI1_NPCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6__SPI1_NPCS2	/;"	d
PIN_PC6__TWD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC6__TWD1	/;"	d
PIN_PC7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7	/;"	d
PIN_PC7__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__GPIO	/;"	d
PIN_PC7__ISC_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__ISC_MCK	/;"	d
PIN_PC7__LCDPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__LCDPCK	/;"	d
PIN_PC7__NCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__NCS2	/;"	d
PIN_PC7__SPI1_NPCS3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__SPI1_NPCS3	/;"	d
PIN_PC7__TWCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__TWCK1	/;"	d
PIN_PC7__URXD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC7__URXD1	/;"	d
PIN_PC8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8	/;"	d
PIN_PC8__FIQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__FIQ	/;"	d
PIN_PC8__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__GPIO	/;"	d
PIN_PC8__ISC_FIELD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__ISC_FIELD	/;"	d
PIN_PC8__LCDDEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__LCDDEN	/;"	d
PIN_PC8__NANDRDY	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__NANDRDY	/;"	d
PIN_PC8__PCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__PCK0	/;"	d
PIN_PC8__UTXD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC8__UTXD1	/;"	d
PIN_PC9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC9	/;"	d
PIN_PC9__FIQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC9__FIQ	/;"	d
PIN_PC9__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC9__GPIO	/;"	d
PIN_PC9__GTSUCOMP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC9__GTSUCOMP	/;"	d
PIN_PC9__ISC_D0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC9__ISC_D0	/;"	d
PIN_PC9__TIOA4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PC9__TIOA4	/;"	d
PIN_PD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0	/;"	d
PIN_PD0__A23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0__A23	/;"	d
PIN_PD0__FLEXCOM4_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0__FLEXCOM4_IO4	/;"	d
PIN_PD0__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0__GPIO	/;"	d
PIN_PD0__GTSUCOMP	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0__GTSUCOMP	/;"	d
PIN_PD0__LCDPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0__LCDPCK	/;"	d
PIN_PD0__UTXD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD0__UTXD3	/;"	d
PIN_PD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD1	/;"	d
PIN_PD10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD10	/;"	d
PIN_PD10__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD10__GPIO	/;"	d
PIN_PD10__GTXEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD10__GTXEN	/;"	d
PIN_PD10__ISC_D3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD10__ISC_D3	/;"	d
PIN_PD10__NTRST	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD10__NTRST	/;"	d
PIN_PD10__UTMI_HDIS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD10__UTMI_HDIS	/;"	d
PIN_PD11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11	/;"	d
PIN_PD11__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__GPIO	/;"	d
PIN_PD11__GRXDV	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__GRXDV	/;"	d
PIN_PD11__ISC_D4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__ISC_D4	/;"	d
PIN_PD11__ISC_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__ISC_MCK	/;"	d
PIN_PD11__PCK2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__PCK2	/;"	d
PIN_PD11__TIOA1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__TIOA1	/;"	d
PIN_PD11__UTMI_LS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD11__UTMI_LS0	/;"	d
PIN_PD12	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12	/;"	d
PIN_PD12__FLEXCOM4_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__FLEXCOM4_IO0	/;"	d
PIN_PD12__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__GPIO	/;"	d
PIN_PD12__GRXER	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__GRXER	/;"	d
PIN_PD12__ISC_D4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__ISC_D4	/;"	d
PIN_PD12__ISC_D5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__ISC_D5	/;"	d
PIN_PD12__TIOB1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__TIOB1	/;"	d
PIN_PD12__UTMI_LS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD12__UTMI_LS1	/;"	d
PIN_PD13	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13	/;"	d
PIN_PD13__FLEXCOM4_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__FLEXCOM4_IO1	/;"	d
PIN_PD13__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__GPIO	/;"	d
PIN_PD13__GRX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__GRX0	/;"	d
PIN_PD13__ISC_D5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__ISC_D5	/;"	d
PIN_PD13__ISC_D6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__ISC_D6	/;"	d
PIN_PD13__TCLK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__TCLK1	/;"	d
PIN_PD13__UTMI_CDRPCSEL0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD13__UTMI_CDRPCSEL0	/;"	d
PIN_PD14	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14	/;"	d
PIN_PD14__FLEXCOM4_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__FLEXCOM4_IO2	/;"	d
PIN_PD14__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__GPIO	/;"	d
PIN_PD14__GRX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__GRX1	/;"	d
PIN_PD14__ISC_D6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__ISC_D6	/;"	d
PIN_PD14__ISC_D7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__ISC_D7	/;"	d
PIN_PD14__TCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__TCK	/;"	d
PIN_PD14__UTMI_CDRPCSEL1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD14__UTMI_CDRPCSEL1	/;"	d
PIN_PD15	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15	/;"	d
PIN_PD15__FLEXCOM4_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__FLEXCOM4_IO3	/;"	d
PIN_PD15__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__GPIO	/;"	d
PIN_PD15__GTX0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__GTX0	/;"	d
PIN_PD15__ISC_D7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__ISC_D7	/;"	d
PIN_PD15__ISC_PCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__ISC_PCK	/;"	d
PIN_PD15__TDI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__TDI	/;"	d
PIN_PD15__UTMI_CDRCPDIVEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD15__UTMI_CDRCPDIVEN	/;"	d
PIN_PD16	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16	/;"	d
PIN_PD16__FLEXCOM4_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__FLEXCOM4_IO4	/;"	d
PIN_PD16__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__GPIO	/;"	d
PIN_PD16__GTX1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__GTX1	/;"	d
PIN_PD16__ISC_D8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__ISC_D8	/;"	d
PIN_PD16__ISC_VSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__ISC_VSYNC	/;"	d
PIN_PD16__TDO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__TDO	/;"	d
PIN_PD16__UTMI_CDRBISTEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD16__UTMI_CDRBISTEN	/;"	d
PIN_PD17	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17	/;"	d
PIN_PD17__GMDC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17__GMDC	/;"	d
PIN_PD17__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17__GPIO	/;"	d
PIN_PD17__ISC_D9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17__ISC_D9	/;"	d
PIN_PD17__ISC_HSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17__ISC_HSYNC	/;"	d
PIN_PD17__TMS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17__TMS	/;"	d
PIN_PD17__UTMI_CDRCPSELDIV	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD17__UTMI_CDRCPSELDIV	/;"	d
PIN_PD18	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD18	/;"	d
PIN_PD18__GMDIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD18__GMDIO	/;"	d
PIN_PD18__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD18__GPIO	/;"	d
PIN_PD18__ISC_D10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD18__ISC_D10	/;"	d
PIN_PD18__ISC_FIELD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD18__ISC_FIELD	/;"	d
PIN_PD18__NTRST	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD18__NTRST	/;"	d
PIN_PD19	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19	/;"	d
PIN_PD19__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19__GPIO	/;"	d
PIN_PD19__I2SC0_CK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19__I2SC0_CK	/;"	d
PIN_PD19__ISC_D11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19__ISC_D11	/;"	d
PIN_PD19__PCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19__PCK0	/;"	d
PIN_PD19__TWD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19__TWD1	/;"	d
PIN_PD19__URXD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD19__URXD2	/;"	d
PIN_PD1__A24	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD1__A24	/;"	d
PIN_PD1__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD1__GPIO	/;"	d
PIN_PD1__GRXCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD1__GRXCK	/;"	d
PIN_PD1__LCDDEN	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD1__LCDDEN	/;"	d
PIN_PD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD2	/;"	d
PIN_PD20	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20	/;"	d
PIN_PD20__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20__GPIO	/;"	d
PIN_PD20__I2SC0_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20__I2SC0_MCK	/;"	d
PIN_PD20__ISC_PCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20__ISC_PCK	/;"	d
PIN_PD20__TIOA2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20__TIOA2	/;"	d
PIN_PD20__TWCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20__TWCK1	/;"	d
PIN_PD20__UTXD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD20__UTXD2	/;"	d
PIN_PD21	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21	/;"	d
PIN_PD21__FLEXCOM4_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21__FLEXCOM4_IO0	/;"	d
PIN_PD21__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21__GPIO	/;"	d
PIN_PD21__I2SC0_WS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21__I2SC0_WS	/;"	d
PIN_PD21__ISC_VSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21__ISC_VSYNC	/;"	d
PIN_PD21__TIOB2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21__TIOB2	/;"	d
PIN_PD21__TWD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD21__TWD0	/;"	d
PIN_PD22	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22	/;"	d
PIN_PD22__FLEXCOM4_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22__FLEXCOM4_IO1	/;"	d
PIN_PD22__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22__GPIO	/;"	d
PIN_PD22__I2SC0_DI0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22__I2SC0_DI0	/;"	d
PIN_PD22__ISC_HSYNC	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22__ISC_HSYNC	/;"	d
PIN_PD22__TCLK2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22__TCLK2	/;"	d
PIN_PD22__TWCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD22__TWCK0	/;"	d
PIN_PD23	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD23	/;"	d
PIN_PD23__FLEXCOM4_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD23__FLEXCOM4_IO2	/;"	d
PIN_PD23__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD23__GPIO	/;"	d
PIN_PD23__I2SC0_DO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD23__I2SC0_DO0	/;"	d
PIN_PD23__ISC_FIELD	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD23__ISC_FIELD	/;"	d
PIN_PD23__URXD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD23__URXD2	/;"	d
PIN_PD24	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD24	/;"	d
PIN_PD24__FLEXCOM4_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD24__FLEXCOM4_IO3	/;"	d
PIN_PD24__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD24__GPIO	/;"	d
PIN_PD24__UTXD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD24__UTXD2	/;"	d
PIN_PD25	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD25	/;"	d
PIN_PD25__FLEXCOM4_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD25__FLEXCOM4_IO4	/;"	d
PIN_PD25__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD25__GPIO	/;"	d
PIN_PD25__SPI1_SPCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD25__SPI1_SPCK	/;"	d
PIN_PD26	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD26	/;"	d
PIN_PD26__FLEXCOM2_IO0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD26__FLEXCOM2_IO0	/;"	d
PIN_PD26__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD26__GPIO	/;"	d
PIN_PD26__SPI1_MOSI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD26__SPI1_MOSI	/;"	d
PIN_PD27	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD27	/;"	d
PIN_PD27__FLEXCOM2_IO1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD27__FLEXCOM2_IO1	/;"	d
PIN_PD27__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD27__GPIO	/;"	d
PIN_PD27__SPI1_MISO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD27__SPI1_MISO	/;"	d
PIN_PD27__TCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD27__TCK	/;"	d
PIN_PD28	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD28	/;"	d
PIN_PD28__FLEXCOM2_IO2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD28__FLEXCOM2_IO2	/;"	d
PIN_PD28__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD28__GPIO	/;"	d
PIN_PD28__SPI1_NPCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD28__SPI1_NPCS0	/;"	d
PIN_PD28__TCI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD28__TCI	/;"	d
PIN_PD29	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29	/;"	d
PIN_PD29__FLEXCOM2_IO3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29__FLEXCOM2_IO3	/;"	d
PIN_PD29__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29__GPIO	/;"	d
PIN_PD29__SPI1_NPCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29__SPI1_NPCS1	/;"	d
PIN_PD29__TDO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29__TDO	/;"	d
PIN_PD29__TIOA3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29__TIOA3	/;"	d
PIN_PD29__TWD0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD29__TWD0	/;"	d
PIN_PD2__A25	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD2__A25	/;"	d
PIN_PD2__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD2__GPIO	/;"	d
PIN_PD2__GTXER	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD2__GTXER	/;"	d
PIN_PD2__ISC_MCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD2__ISC_MCK	/;"	d
PIN_PD2__URXD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD2__URXD1	/;"	d
PIN_PD3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3	/;"	d
PIN_PD30	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30	/;"	d
PIN_PD30__FLEXCOM2_IO4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30__FLEXCOM2_IO4	/;"	d
PIN_PD30__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30__GPIO	/;"	d
PIN_PD30__SPI1_NPCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30__SPI1_NPCS2	/;"	d
PIN_PD30__TIOB3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30__TIOB3	/;"	d
PIN_PD30__TMS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30__TMS	/;"	d
PIN_PD30__TWCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD30__TWCK0	/;"	d
PIN_PD31	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31	/;"	d
PIN_PD31__ADTRG	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31__ADTRG	/;"	d
PIN_PD31__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31__GPIO	/;"	d
PIN_PD31__IRQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31__IRQ	/;"	d
PIN_PD31__NTRST	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31__NTRST	/;"	d
PIN_PD31__PCK0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31__PCK0	/;"	d
PIN_PD31__TCLK3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD31__TCLK3	/;"	d
PIN_PD3__FIQ	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3__FIQ	/;"	d
PIN_PD3__GCRS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3__GCRS	/;"	d
PIN_PD3__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3__GPIO	/;"	d
PIN_PD3__ISC_D11	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3__ISC_D11	/;"	d
PIN_PD3__NWAIT	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3__NWAIT	/;"	d
PIN_PD3__UTXD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD3__UTXD1	/;"	d
PIN_PD4	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4	/;"	d
PIN_PD4__GCOL	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4__GCOL	/;"	d
PIN_PD4__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4__GPIO	/;"	d
PIN_PD4__ISC_D10	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4__ISC_D10	/;"	d
PIN_PD4__NCS0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4__NCS0	/;"	d
PIN_PD4__TWD1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4__TWD1	/;"	d
PIN_PD4__URXD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD4__URXD2	/;"	d
PIN_PD5	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5	/;"	d
PIN_PD5__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5__GPIO	/;"	d
PIN_PD5__GRX2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5__GRX2	/;"	d
PIN_PD5__ISC_D9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5__ISC_D9	/;"	d
PIN_PD5__NCS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5__NCS1	/;"	d
PIN_PD5__TWCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5__TWCK1	/;"	d
PIN_PD5__UTXD2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD5__UTXD2	/;"	d
PIN_PD6	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6	/;"	d
PIN_PD6__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6__GPIO	/;"	d
PIN_PD6__GRX3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6__GRX3	/;"	d
PIN_PD6__ISC_D8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6__ISC_D8	/;"	d
PIN_PD6__NCS2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6__NCS2	/;"	d
PIN_PD6__PCK1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6__PCK1	/;"	d
PIN_PD6__TCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD6__TCK	/;"	d
PIN_PD7	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7	/;"	d
PIN_PD7__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7__GPIO	/;"	d
PIN_PD7__GTX2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7__GTX2	/;"	d
PIN_PD7__ISC_D0	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7__ISC_D0	/;"	d
PIN_PD7__NWR1_NBS1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7__NWR1_NBS1	/;"	d
PIN_PD7__TDI	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7__TDI	/;"	d
PIN_PD7__UTMI_RXVAL	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD7__UTMI_RXVAL	/;"	d
PIN_PD8	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8	/;"	d
PIN_PD8__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8__GPIO	/;"	d
PIN_PD8__GTX3	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8__GTX3	/;"	d
PIN_PD8__ISC_D1	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8__ISC_D1	/;"	d
PIN_PD8__NANDRDY	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8__NANDRDY	/;"	d
PIN_PD8__TDO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8__TDO	/;"	d
PIN_PD8__UTMI_RXERR	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD8__UTMI_RXERR	/;"	d
PIN_PD9	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD9	/;"	d
PIN_PD9__GPIO	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD9__GPIO	/;"	d
PIN_PD9__GTXCK	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD9__GTXCK	/;"	d
PIN_PD9__ISC_D2	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD9__ISC_D2	/;"	d
PIN_PD9__TMS	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD9__TMS	/;"	d
PIN_PD9__UTMI_RXACT	arch/arm/dts/sama5d2-pinfunc.h	/^#define PIN_PD9__UTMI_RXACT	/;"	d
PIN_PDIS	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define PIN_PDIS	/;"	d
PIN_PTD	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define PIN_PTD	/;"	d
PIN_PTU	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define PIN_PTU	/;"	d
PIN_PUD	drivers/pinctrl/exynos/pinctrl-exynos.h	/^#define PIN_PUD	/;"	d
PIN_QE_LCD_MUX_LCD	board/freescale/ls1021atwr/ls1021atwr.c	/^#define PIN_QE_LCD_MUX_LCD	/;"	d	file:
PIN_QE_LCD_MUX_QE	board/freescale/ls1021atwr/ls1021atwr.c	/^#define PIN_QE_LCD_MUX_QE	/;"	d	file:
PIN_REG_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	PIN_REG_COUNT		= 4,$/;"	e	enum:__anonf53c9cce0103
PIN_RESERVED	arch/arm/mach-tegra/tegra114/pinmux.c	/^#define PIN_RESERVED /;"	d	file:
PIN_RESERVED	arch/arm/mach-tegra/tegra124/pinmux.c	/^#define PIN_RESERVED /;"	d	file:
PIN_RESERVED	arch/arm/mach-tegra/tegra20/pinmux.c	/^#define PIN_RESERVED /;"	d	file:
PIN_RESERVED	arch/arm/mach-tegra/tegra210/pinmux.c	/^#define PIN_RESERVED /;"	d	file:
PIN_RESERVED	arch/arm/mach-tegra/tegra30/pinmux.c	/^#define PIN_RESERVED /;"	d	file:
PIN_SCL	drivers/i2c/i2c-gpio.c	/^	PIN_SCL,$/;"	e	enum:__anonbb2c0fab0103	file:
PIN_SDA	drivers/i2c/i2c-gpio.c	/^	PIN_SDA = 0,$/;"	e	enum:__anonbb2c0fab0103	file:
PIN_USB_GREEN_LED	board/zyxel/nsa310s/nsa310s.h	/^#define PIN_USB_GREEN_LED	/;"	d
PIN_USB_POWER	board/zyxel/nsa310s/nsa310s.h	/^#define PIN_USB_POWER	/;"	d
PIO_ABSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_ABSR	/;"	d
PIO_ACCESS_TIMING	drivers/block/ftide020.h	/^unsigned int PIO_ACCESS_TIMING[PIO_PARAMETER][PIO_MODE] = {$/;"	v	typeref:typename:unsigned int[][]
PIO_ASR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_ASR	/;"	d
PIO_BSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_BSR	/;"	d
PIO_CMD_STATUS	drivers/block/sata_mv.c	/^#define PIO_CMD_STATUS	/;"	d	file:
PIO_CODR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_CODR	/;"	d
PIO_CSTATE	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                PIO_CSTATE /;"	d
PIO_CTRL_ALTSTAT	drivers/block/sata_mv.c	/^#define PIO_CTRL_ALTSTAT	/;"	d	file:
PIO_DATA	drivers/block/sata_mv.c	/^#define	PIO_DATA	/;"	d	file:
PIO_DEVICE	drivers/block/sata_mv.c	/^#define PIO_DEVICE	/;"	d	file:
PIO_DONE_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define              PIO_DONE_INT /;"	d
PIO_DONE_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define             PIO_DONE_MASK /;"	d
PIO_Data	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int PIO_Data;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
PIO_Direction	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int PIO_Direction;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
PIO_ERR_FEATURES	drivers/block/sata_mv.c	/^#define PIO_ERR_FEATURES	/;"	d	file:
PIO_IDR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_IDR	/;"	d
PIO_IER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_IER	/;"	d
PIO_IFDR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_IFDR	/;"	d
PIO_IFER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_IFER	/;"	d
PIO_IMR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_IMR	/;"	d
PIO_ISFR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_ISFR	/;"	d
PIO_ISR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_ISR	/;"	d
PIO_Interrupt	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int PIO_Interrupt;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
PIO_LBA_HI	drivers/block/sata_mv.c	/^#define PIO_LBA_HI	/;"	d	file:
PIO_LBA_LOW	drivers/block/sata_mv.c	/^#define PIO_LBA_LOW	/;"	d	file:
PIO_LBA_MID	drivers/block/sata_mv.c	/^#define PIO_LBA_MID	/;"	d	file:
PIO_MDDR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_MDDR	/;"	d
PIO_MDER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_MDER	/;"	d
PIO_MDSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_MDSR	/;"	d
PIO_MODE	drivers/block/ftide020.h	/^#define PIO_MODE	/;"	d
PIO_MODE0	drivers/block/ftide020.h	/^#define PIO_MODE0	/;"	d
PIO_MODE1	drivers/block/ftide020.h	/^#define PIO_MODE1	/;"	d
PIO_MODE2	drivers/block/ftide020.h	/^#define PIO_MODE2	/;"	d
PIO_MODE3	drivers/block/ftide020.h	/^#define PIO_MODE3	/;"	d
PIO_MODE4	drivers/block/ftide020.h	/^#define PIO_MODE4	/;"	d
PIO_ODR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_ODR	/;"	d
PIO_ODSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_ODSR	/;"	d
PIO_OER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_OER	/;"	d
PIO_OSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_OSR	/;"	d
PIO_OWDR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_OWDR	/;"	d
PIO_OWER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_OWER	/;"	d
PIO_OWSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_OWSR	/;"	d
PIO_PARAMETER	drivers/block/ftide020.h	/^#define PIO_PARAMETER	/;"	d
PIO_PDR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PDR	/;"	d
PIO_PDSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PDSR	/;"	d
PIO_PER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PER	/;"	d
PIO_PSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PSR	/;"	d
PIO_PUDR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PUDR	/;"	d
PIO_PUER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PUER	/;"	d
PIO_PUSR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_PUSR	/;"	d
PIO_SCDR_DIV	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define PIO_SCDR_DIV /;"	d
PIO_SCDR_DIV	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define PIO_SCDR_DIV	/;"	d
PIO_SCDR_DIV	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define PIO_SCDR_DIV	/;"	d
PIO_SECTOR_COUNT	drivers/block/sata_mv.c	/^#define PIO_SECTOR_COUNT	/;"	d	file:
PIO_SODR	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PIO_SODR	/;"	d
PIO_START	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                 PIO_START /;"	d
PIO_STATUS_BSY	drivers/block/sata_mv.c	/^#define PIO_STATUS_BSY	/;"	d	file:
PIO_STATUS_DF	drivers/block/sata_mv.c	/^#define PIO_STATUS_DF	/;"	d	file:
PIO_STATUS_DRDY	drivers/block/sata_mv.c	/^#define PIO_STATUS_DRDY	/;"	d	file:
PIO_STATUS_DRQ	drivers/block/sata_mv.c	/^#define PIO_STATUS_DRQ	/;"	d	file:
PIO_STATUS_ERR	drivers/block/sata_mv.c	/^#define PIO_STATUS_ERR	/;"	d	file:
PIO_T0	drivers/block/ftide020.h	/^#define PIO_T0	/;"	d
PIO_T1	drivers/block/ftide020.h	/^#define PIO_T1	/;"	d
PIO_T2	drivers/block/ftide020.h	/^#define PIO_T2	/;"	d
PIO_T4	drivers/block/ftide020.h	/^#define PIO_T4	/;"	d
PIO_TIMEOUT	include/fsl_esdhc.h	/^#define PIO_TIMEOUT	/;"	d
PIO_TIMING	drivers/block/ftide020.h	/^#define PIO_TIMING	/;"	d
PIO_USE_DMA	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               PIO_USE_DMA /;"	d
PIO_XFER_ON	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               PIO_XFER_ON /;"	d
PIPE	tools/patman/cros_subprocess.py	/^PIPE = subprocess.PIPE$/;"	v
PIPE0BUF	drivers/usb/host/r8a66597.h	/^#define	PIPE0BUF	/;"	d
PIPE1CTR	drivers/usb/host/r8a66597.h	/^#define PIPE1CTR	/;"	d
PIPE1TRE	drivers/usb/host/r8a66597.h	/^#define PIPE1TRE	/;"	d
PIPE1TRN	drivers/usb/host/r8a66597.h	/^#define PIPE1TRN	/;"	d
PIPE2CTR	drivers/usb/host/r8a66597.h	/^#define PIPE2CTR	/;"	d
PIPE2TRE	drivers/usb/host/r8a66597.h	/^#define PIPE2TRE	/;"	d
PIPE2TRN	drivers/usb/host/r8a66597.h	/^#define PIPE2TRN	/;"	d
PIPE3CTR	drivers/usb/host/r8a66597.h	/^#define PIPE3CTR	/;"	d
PIPE3TRE	drivers/usb/host/r8a66597.h	/^#define PIPE3TRE	/;"	d
PIPE3TRN	drivers/usb/host/r8a66597.h	/^#define PIPE3TRN	/;"	d
PIPE4CTR	drivers/usb/host/r8a66597.h	/^#define PIPE4CTR	/;"	d
PIPE4TRE	drivers/usb/host/r8a66597.h	/^#define PIPE4TRE	/;"	d
PIPE4TRN	drivers/usb/host/r8a66597.h	/^#define	PIPE4TRN	/;"	d
PIPE5CTR	drivers/usb/host/r8a66597.h	/^#define PIPE5CTR	/;"	d
PIPE5TRE	drivers/usb/host/r8a66597.h	/^#define	PIPE5TRE	/;"	d
PIPE5TRN	drivers/usb/host/r8a66597.h	/^#define	PIPE5TRN	/;"	d
PIPE6CTR	drivers/usb/host/r8a66597.h	/^#define PIPE6CTR	/;"	d
PIPE7CTR	drivers/usb/host/r8a66597.h	/^#define PIPE7CTR	/;"	d
PIPE8CTR	drivers/usb/host/r8a66597.h	/^#define PIPE8CTR	/;"	d
PIPE9CTR	drivers/usb/host/r8a66597.h	/^#define PIPE9CTR	/;"	d
PIPEA_PP_CONTROL	drivers/video/i915_reg.h	/^#define PIPEA_PP_CONTROL /;"	d
PIPEA_PP_DIVISOR	drivers/video/i915_reg.h	/^#define PIPEA_PP_DIVISOR /;"	d
PIPEA_PP_OFF_DELAYS	drivers/video/i915_reg.h	/^#define PIPEA_PP_OFF_DELAYS /;"	d
PIPEA_PP_ON_DELAYS	drivers/video/i915_reg.h	/^#define PIPEA_PP_ON_DELAYS /;"	d
PIPEA_PP_STATUS	drivers/video/i915_reg.h	/^#define PIPEA_PP_STATUS /;"	d
PIPEBUF	drivers/usb/host/r8a66597.h	/^#define PIPEBUF	/;"	d
PIPEB_PP_CONTROL	drivers/video/i915_reg.h	/^#define PIPEB_PP_CONTROL /;"	d
PIPEB_PP_DIVISOR	drivers/video/i915_reg.h	/^#define PIPEB_PP_DIVISOR /;"	d
PIPEB_PP_OFF_DELAYS	drivers/video/i915_reg.h	/^#define PIPEB_PP_OFF_DELAYS /;"	d
PIPEB_PP_ON_DELAYS	drivers/video/i915_reg.h	/^#define PIPEB_PP_ON_DELAYS /;"	d
PIPEB_PP_STATUS	drivers/video/i915_reg.h	/^#define PIPEB_PP_STATUS /;"	d
PIPECFG	drivers/usb/host/r8a66597.h	/^#define PIPECFG	/;"	d
PIPELINE_ACCESS	drivers/mtd/nand/denali.c	/^#define PIPELINE_ACCESS	/;"	d	file:
PIPELINE_ACCESS	drivers/mtd/nand/denali_spl.c	/^#define PIPELINE_ACCESS	/;"	d	file:
PIPELINE_PREFIX	drivers/video/sunxi_display.c	/^#define PIPELINE_PREFIX /;"	d	file:
PIPELINE_PREFIX	drivers/video/sunxi_display.c	/^#define PIPELINE_PREFIX$/;"	d	file:
PIPEMAXP	drivers/usb/host/r8a66597.h	/^#define PIPEMAXP	/;"	d
PIPENM	drivers/usb/host/r8a66597.h	/^#define	PIPENM	/;"	d
PIPEPERI	drivers/usb/host/r8a66597.h	/^#define PIPEPERI	/;"	d
PIPESEL	drivers/usb/host/r8a66597.h	/^#define PIPESEL	/;"	d
PIPE_AND	common/cli_hush.c	/^	PIPE_AND = 2,$/;"	e	enum:__anon62a9299d0303	file:
PIPE_BG	common/cli_hush.c	/^	PIPE_BG  = 4,$/;"	e	enum:__anon62a9299d0303	file:
PIPE_BULK	include/usb_defs.h	/^#define PIPE_BULK /;"	d
PIPE_CONTROL	include/usb_defs.h	/^#define PIPE_CONTROL /;"	d
PIPE_DEVEP_MASK	include/usb_defs.h	/^#define PIPE_DEVEP_MASK /;"	d
PIPE_ENABLE_ADDR	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define PIPE_ENABLE_ADDR	/;"	d
PIPE_INTERRUPT	include/usb_defs.h	/^#define PIPE_INTERRUPT /;"	d
PIPE_ISOCHRONOUS	include/usb_defs.h	/^#define PIPE_ISOCHRONOUS /;"	d
PIPE_OR	common/cli_hush.c	/^	PIPE_OR  = 3,$/;"	e	enum:__anon62a9299d0303	file:
PIPE_PTY	tools/patman/cros_subprocess.py	/^PIPE_PTY = -3     # Pipe output through a pty$/;"	v
PIPE_SEQ	common/cli_hush.c	/^	PIPE_SEQ = 1,$/;"	e	enum:__anon62a9299d0303	file:
PIPExBUF	drivers/usb/host/r8a66597.h	/^#define	PIPExBUF	/;"	d
PIPR	drivers/net/sh_eth.h	/^	PIPR,$/;"	e	enum:__anon5ef54f5a0103
PIR	arch/powerpc/include/asm/processor.h	/^#define PIR	/;"	d
PIR	drivers/net/sh_eth.h	/^	PIR,$/;"	e	enum:__anon5ef54f5a0103
PIRQA	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQA	/;"	d
PIRQA	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQA	/;"	d
PIRQA_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQA_APIC_IRQ	/;"	d
PIRQA_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQA_APIC_IRQ	/;"	d
PIRQA_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQA_ROUT	/;"	d
PIRQB	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQB	/;"	d
PIRQB	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQB	/;"	d
PIRQB_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQB_APIC_IRQ	/;"	d
PIRQB_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQB_APIC_IRQ	/;"	d
PIRQB_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQB_ROUT	/;"	d
PIRQC	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQC	/;"	d
PIRQC	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQC	/;"	d
PIRQC_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQC_APIC_IRQ	/;"	d
PIRQC_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQC_APIC_IRQ	/;"	d
PIRQC_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQC_ROUT	/;"	d
PIRQD	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQD	/;"	d
PIRQD	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQD	/;"	d
PIRQD_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQD_APIC_IRQ	/;"	d
PIRQD_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQD_APIC_IRQ	/;"	d
PIRQD_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQD_ROUT	/;"	d
PIRQE	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	arch/x86/dts/qemu-x86_q35.dts	/^#define PIRQE	/;"	d	file:
PIRQE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQE	/;"	d
PIRQE	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQE	/;"	d
PIRQE_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQE_APIC_IRQ	/;"	d
PIRQE_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQE_APIC_IRQ	/;"	d
PIRQE_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQE_ROUT	/;"	d
PIRQF	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	arch/x86/dts/qemu-x86_q35.dts	/^#define PIRQF	/;"	d	file:
PIRQF	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQF	/;"	d
PIRQF	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQF	/;"	d
PIRQF_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQF_APIC_IRQ	/;"	d
PIRQF_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQF_APIC_IRQ	/;"	d
PIRQF_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQF_ROUT	/;"	d
PIRQG	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	arch/x86/dts/qemu-x86_q35.dts	/^#define PIRQG	/;"	d	file:
PIRQG	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQG	/;"	d
PIRQG	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQG	/;"	d
PIRQG_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQG_APIC_IRQ	/;"	d
PIRQG_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQG_APIC_IRQ	/;"	d
PIRQG_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQG_ROUT	/;"	d
PIRQH	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	arch/x86/dts/qemu-x86_q35.dts	/^#define PIRQH	/;"	d	file:
PIRQH	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQH	/;"	d
PIRQH	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH	include/dt-bindings/interrupt-router/intel-irq.h	/^#define PIRQH	/;"	d
PIRQH_APIC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define PIRQH_APIC_IRQ	/;"	d
PIRQH_APIC_IRQ	arch/x86/include/asm/arch-quark/irq.h	/^#define PIRQH_APIC_IRQ	/;"	d
PIRQH_ROUT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PIRQH_ROUT	/;"	d
PIRQ_APIC_MASK	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_MASK	include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_MASK	/;"	d
PIRQ_APIC_ROUTE	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_APIC_ROUTE	include/dt-bindings/gpio/x86-gpio.h	/^#define PIRQ_APIC_ROUTE	/;"	d
PIRQ_BITMAP	arch/x86/include/asm/irq.h	/^#define PIRQ_BITMAP	/;"	d
PIRQ_SHIFT	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^#define PIRQ_SHIFT	/;"	d	file:
PIRQ_SIGNATURE	arch/x86/include/asm/pirq_routing.h	/^#define PIRQ_SIGNATURE	/;"	d
PIRQ_VERSION	arch/x86/include/asm/pirq_routing.h	/^#define PIRQ_VERSION	/;"	d
PIRQ_VIA_IBASE	arch/x86/include/asm/irq.h	/^	PIRQ_VIA_IBASE$/;"	e	enum:pirq_config
PIRQ_VIA_PCI	arch/x86/include/asm/irq.h	/^	PIRQ_VIA_PCI,$/;"	e	enum:pirq_config
PIR_BIT	drivers/net/sh_eth.h	/^enum PIR_BIT {$/;"	g
PIR_CLRSR	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_CLRSR	/;"	d
PIR_CLRSR	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_CLRSR	/;"	d
PIR_CLRSR	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_CLRSR	/;"	d
PIR_CTLDINIT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_CTLDINIT	/;"	d
PIR_DCAL	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_DCAL	/;"	d
PIR_DCAL	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_DCAL	/;"	d
PIR_DLLBYP	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_DLLBYP	/;"	d
PIR_DLLLOCK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_DLLLOCK	/;"	d
PIR_DLLSRST	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_DLLSRST	/;"	d
PIR_DRAMINIT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_DRAMINIT	/;"	d
PIR_DRAMINIT	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_DRAMINIT	/;"	d
PIR_DRAMINIT	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_DRAMINIT	/;"	d
PIR_DRAMRST	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_DRAMRST	/;"	d
PIR_DRAMRST	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_DRAMRST	/;"	d
PIR_DRAMRST	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_DRAMRST	/;"	d
PIR_ICPC	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_ICPC	/;"	d
PIR_INIT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_INIT	/;"	d
PIR_INIT	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_INIT	/;"	d
PIR_INIT	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_INIT	/;"	d
PIR_INITBYP	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_INITBYP	/;"	d
PIR_ITMSRST	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_ITMSRST	/;"	d
PIR_LOCKBYP	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_LOCKBYP	/;"	d
PIR_MDC	drivers/net/sh_eth.h	/^	PIR_MDI = 0x08, PIR_MDO = 0x04, PIR_MMD = 0x02, PIR_MDC = 0x01,$/;"	e	enum:PIR_BIT
PIR_MDI	drivers/net/sh_eth.h	/^	PIR_MDI = 0x08, PIR_MDO = 0x04, PIR_MMD = 0x02, PIR_MDC = 0x01,$/;"	e	enum:PIR_BIT
PIR_MDO	drivers/net/sh_eth.h	/^	PIR_MDI = 0x08, PIR_MDO = 0x04, PIR_MMD = 0x02, PIR_MDC = 0x01,$/;"	e	enum:PIR_BIT
PIR_MMD	drivers/net/sh_eth.h	/^	PIR_MDI = 0x08, PIR_MDO = 0x04, PIR_MMD = 0x02, PIR_MDC = 0x01,$/;"	e	enum:PIR_BIT
PIR_PHYRST	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_PHYRST	/;"	d
PIR_PHYRST	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_PHYRST	/;"	d
PIR_PLLINIT	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_PLLINIT	/;"	d
PIR_PLLINIT	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_PLLINIT	/;"	d
PIR_QSGATE	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_QSGATE	/;"	d
PIR_QSGATE	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_QSGATE	/;"	d
PIR_QSTRN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_QSTRN	/;"	d
PIR_RVTRN	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_RVTRN	/;"	d
PIR_ZCAL	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_ZCAL	/;"	d
PIR_ZCAL	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PIR_ZCAL	/;"	d
PIR_ZCAL	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PIR_ZCAL	/;"	d
PIR_ZCALBYP	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PIR_ZCALBYP	/;"	d
PISCR_PIE	arch/powerpc/include/asm/8xx_immap.h	/^#define PISCR_PIE	/;"	d
PISCR_PIE	arch/powerpc/include/asm/immap_8260.h	/^#define PISCR_PIE	/;"	d
PISCR_PIRQ_MASK	arch/powerpc/include/asm/8xx_immap.h	/^#define PISCR_PIRQ_MASK	/;"	d
PISCR_PIRQ_MASK	arch/powerpc/include/asm/immap_8260.h	/^#define PISCR_PIRQ_MASK	/;"	d
PISCR_PITF	include/mpc5xx.h	/^#define PISCR_PITF	/;"	d
PISCR_PITF	include/mpc8xx.h	/^#define PISCR_PITF	/;"	d
PISCR_PS	arch/powerpc/include/asm/8xx_immap.h	/^#define PISCR_PS	/;"	d
PISCR_PS	arch/powerpc/include/asm/immap_8260.h	/^#define PISCR_PS	/;"	d
PISCR_PS	include/mpc5xx.h	/^#define PISCR_PS	/;"	d
PISCR_PTE	arch/powerpc/include/asm/8xx_immap.h	/^#define PISCR_PTE	/;"	d
PISCR_PTE	arch/powerpc/include/asm/immap_8260.h	/^#define PISCR_PTE	/;"	d
PISCR_PTF	arch/powerpc/include/asm/8xx_immap.h	/^#define PISCR_PTF	/;"	d
PISCR_PTF	arch/powerpc/include/asm/immap_8260.h	/^#define PISCR_PTF	/;"	d
PISR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PISR	/;"	d
PISR_FIFOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PISR_FIFOE	/;"	d
PIT0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define PIT0_BASE_ADDR	/;"	d
PIT1	arch/powerpc/include/asm/fsl_pci.h	/^#define PIT1 /;"	d
PIT1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define PIT1_BASE_ADDR	/;"	d
PIT2	arch/powerpc/include/asm/fsl_pci.h	/^#define PIT2 /;"	d
PIT3	arch/powerpc/include/asm/fsl_pci.h	/^#define PIT3 /;"	d
PITAR_REG0	arch/powerpc/include/asm/m8260_pci.h	/^#define PITAR_REG0 /;"	d
PITAR_REG0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PITAR_REG0 /;"	d
PITAR_REG1	arch/powerpc/include/asm/m8260_pci.h	/^#define PITAR_REG1 /;"	d
PITAR_REG1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PITAR_REG1 /;"	d
PITAR_TA_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define PITAR_TA_MASK	/;"	d
PITAR_TA_MASK	include/mpc83xx.h	/^#define PITAR_TA_MASK	/;"	d
PITC_SHIFT	arch/powerpc/cpu/mpc8xx/speed.c	/^#define PITC_SHIFT /;"	d	file:
PITException	arch/powerpc/cpu/mpc85xx/traps.c	/^void PITException(struct pt_regs *regs)$/;"	f	typeref:typename:void
PITR_SHIFT	arch/powerpc/cpu/mpc8xx/speed.c	/^#define PITR_SHIFT /;"	d	file:
PIT_BASE	arch/x86/include/asm/ibmpc.h	/^#define PIT_BASE	/;"	d
PIT_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define PIT_BASE_ADDR	/;"	d
PIT_CMD_BOTH	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_BOTH	/;"	d
PIT_CMD_CTR0	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_CTR0	/;"	d
PIT_CMD_CTR1	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_CTR1	/;"	d
PIT_CMD_CTR2	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_CTR2	/;"	d
PIT_CMD_HIGH	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_HIGH	/;"	d
PIT_CMD_LATCH	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_LATCH	/;"	d
PIT_CMD_LOW	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_LOW	/;"	d
PIT_CMD_MODE0	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_MODE0	/;"	d
PIT_CMD_MODE1	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_MODE1	/;"	d
PIT_CMD_MODE2	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_MODE2	/;"	d
PIT_CMD_MODE3	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_MODE3	/;"	d
PIT_CMD_MODE4	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_MODE4	/;"	d
PIT_CMD_MODE5	arch/x86/include/asm/i8254.h	/^#define PIT_CMD_MODE5	/;"	d
PIT_COMMAND	arch/x86/include/asm/i8254.h	/^#define PIT_COMMAND	/;"	d
PIT_PCNTR_PC	arch/m68k/include/asm/timer.h	/^#define PIT_PCNTR_PC(/;"	d
PIT_PCSR_DOZE	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_DOZE	/;"	d
PIT_PCSR_EN	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_EN	/;"	d
PIT_PCSR_HALTED	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_HALTED	/;"	d
PIT_PCSR_OVW	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_OVW	/;"	d
PIT_PCSR_PIE	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_PIE	/;"	d
PIT_PCSR_PIF	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_PIF	/;"	d
PIT_PCSR_PRE	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_PRE(/;"	d
PIT_PCSR_RLD	arch/m68k/include/asm/timer.h	/^#define PIT_PCSR_RLD	/;"	d
PIT_PMR_PM	arch/m68k/include/asm/timer.h	/^#define PIT_PMR_PM(/;"	d
PIT_T0	arch/x86/include/asm/i8254.h	/^#define PIT_T0	/;"	d
PIT_T1	arch/x86/include/asm/i8254.h	/^#define PIT_T1	/;"	d
PIT_T2	arch/x86/include/asm/i8254.h	/^#define PIT_T2	/;"	d
PIT_TICK_RATE	arch/x86/include/asm/i8254.h	/^#define PIT_TICK_RATE	/;"	d
PIWAR_EN	arch/powerpc/include/asm/fsl_pci.h	/^#define PIWAR_EN	/;"	d
PIWAR_EN	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_EN	/;"	d
PIWAR_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define PIWAR_EN	/;"	d
PIWAR_EN	include/mpc83xx.h	/^#define PIWAR_EN	/;"	d
PIWAR_IWS_128K	include/mpc83xx.h	/^#define PIWAR_IWS_128K	/;"	d
PIWAR_IWS_128M	include/mpc83xx.h	/^#define PIWAR_IWS_128M	/;"	d
PIWAR_IWS_16K	include/mpc83xx.h	/^#define PIWAR_IWS_16K	/;"	d
PIWAR_IWS_16M	include/mpc83xx.h	/^#define PIWAR_IWS_16M	/;"	d
PIWAR_IWS_1G	include/mpc83xx.h	/^#define PIWAR_IWS_1G	/;"	d
PIWAR_IWS_1M	include/mpc83xx.h	/^#define PIWAR_IWS_1M	/;"	d
PIWAR_IWS_256K	include/mpc83xx.h	/^#define PIWAR_IWS_256K	/;"	d
PIWAR_IWS_256M	include/mpc83xx.h	/^#define PIWAR_IWS_256M	/;"	d
PIWAR_IWS_2G	include/mpc83xx.h	/^#define PIWAR_IWS_2G	/;"	d
PIWAR_IWS_2M	include/mpc83xx.h	/^#define PIWAR_IWS_2M	/;"	d
PIWAR_IWS_32K	include/mpc83xx.h	/^#define PIWAR_IWS_32K	/;"	d
PIWAR_IWS_32M	include/mpc83xx.h	/^#define PIWAR_IWS_32M	/;"	d
PIWAR_IWS_4K	include/mpc83xx.h	/^#define PIWAR_IWS_4K	/;"	d
PIWAR_IWS_4M	include/mpc83xx.h	/^#define PIWAR_IWS_4M	/;"	d
PIWAR_IWS_512K	include/mpc83xx.h	/^#define PIWAR_IWS_512K	/;"	d
PIWAR_IWS_512M	include/mpc83xx.h	/^#define PIWAR_IWS_512M	/;"	d
PIWAR_IWS_64K	include/mpc83xx.h	/^#define PIWAR_IWS_64K	/;"	d
PIWAR_IWS_64M	include/mpc83xx.h	/^#define PIWAR_IWS_64M	/;"	d
PIWAR_IWS_8K	include/mpc83xx.h	/^#define PIWAR_IWS_8K	/;"	d
PIWAR_IWS_8M	include/mpc83xx.h	/^#define PIWAR_IWS_8M	/;"	d
PIWAR_IWS_MASK	include/mpc83xx.h	/^#define PIWAR_IWS_MASK	/;"	d
PIWAR_LOCAL	arch/powerpc/include/asm/fsl_pci.h	/^#define PIWAR_LOCAL	/;"	d
PIWAR_LOCAL	arch/powerpc/include/asm/immap_85xx.h	/^#define PIWAR_LOCAL	/;"	d
PIWAR_MEM_2G	arch/powerpc/include/asm/immap_85xx.h	/^#define PIWAR_MEM_2G	/;"	d
PIWAR_PF	arch/powerpc/include/asm/fsl_pci.h	/^#define PIWAR_PF	/;"	d
PIWAR_PF	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_PF	/;"	d
PIWAR_PF	arch/powerpc/include/asm/immap_85xx.h	/^#define PIWAR_PF	/;"	d
PIWAR_PF	include/mpc83xx.h	/^#define PIWAR_PF	/;"	d
PIWAR_READ_SNOOP	arch/powerpc/include/asm/fsl_pci.h	/^#define PIWAR_READ_SNOOP	/;"	d
PIWAR_READ_SNOOP	arch/powerpc/include/asm/immap_85xx.h	/^#define PIWAR_READ_SNOOP	/;"	d
PIWAR_RTT_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_RTT_MASK	/;"	d
PIWAR_RTT_MASK	include/mpc83xx.h	/^#define PIWAR_RTT_MASK	/;"	d
PIWAR_RTT_NO_SNOOP	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_RTT_NO_SNOOP /;"	d
PIWAR_RTT_NO_SNOOP	include/mpc83xx.h	/^#define PIWAR_RTT_NO_SNOOP	/;"	d
PIWAR_RTT_SNOOP	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_RTT_SNOOP	/;"	d
PIWAR_RTT_SNOOP	include/mpc83xx.h	/^#define PIWAR_RTT_SNOOP	/;"	d
PIWAR_SBS	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_SBS	/;"	d
PIWAR_WRITE_SNOOP	arch/powerpc/include/asm/fsl_pci.h	/^#define PIWAR_WRITE_SNOOP	/;"	d
PIWAR_WRITE_SNOOP	arch/powerpc/include/asm/immap_85xx.h	/^#define PIWAR_WRITE_SNOOP	/;"	d
PIWAR_WTT_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_WTT_MASK	/;"	d
PIWAR_WTT_MASK	include/mpc83xx.h	/^#define PIWAR_WTT_MASK	/;"	d
PIWAR_WTT_NO_SNOOP	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_WTT_NO_SNOOP /;"	d
PIWAR_WTT_NO_SNOOP	include/mpc83xx.h	/^#define PIWAR_WTT_NO_SNOOP	/;"	d
PIWAR_WTT_SNOOP	arch/powerpc/include/asm/immap_512x.h	/^#define PIWAR_WTT_SNOOP	/;"	d
PIWAR_WTT_SNOOP	include/mpc83xx.h	/^#define PIWAR_WTT_SNOOP	/;"	d
PIX2CLK_ALWAYS_ONb	include/radeon.h	/^#define PIX2CLK_ALWAYS_ONb	/;"	d
PIX2CLK_DAC_ALWAYS_ONb	include/radeon.h	/^#define PIX2CLK_DAC_ALWAYS_ONb	/;"	d
PIX2CLK_SRC_SEL_BYTECLK	include/radeon.h	/^#define PIX2CLK_SRC_SEL_BYTECLK	/;"	d
PIX2CLK_SRC_SEL_CPUCLK	include/radeon.h	/^#define PIX2CLK_SRC_SEL_CPUCLK	/;"	d
PIX2CLK_SRC_SEL_MASK	include/radeon.h	/^#define PIX2CLK_SRC_SEL_MASK	/;"	d
PIX2CLK_SRC_SEL_P2PLLCLK	include/radeon.h	/^#define PIX2CLK_SRC_SEL_P2PLLCLK	/;"	d
PIX2CLK_SRC_SEL_PSCANCLK	include/radeon.h	/^#define PIX2CLK_SRC_SEL_PSCANCLK	/;"	d
PIXCLKS_CNTL	include/radeon.h	/^#define PIXCLKS_CNTL	/;"	d
PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIX2CLK_INVERT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_INVERT	/;"	d
PIXCLKS_CNTL__PIX2CLK_INVERT__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_INVERT__SHIFT	/;"	d
PIXCLKS_CNTL__PIX2CLK_SRC_INVERT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT	/;"	d
PIXCLKS_CNTL__PIX2CLK_SRC_INVERT__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT__SHIFT	/;"	d
PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK	/;"	d
PIXCLKS_CNTL__PIX2CLK_SRC_SEL__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL__SHIFT	/;"	d
PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb__SHIFT	/;"	d
PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL	/;"	d
PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL__SHIFT	include/radeon.h	/^#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL__SHIFT	/;"	d
PIXCLKS_CNTL__R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF	include/radeon.h	/^#define PIXCLKS_CNTL__R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF /;"	d
PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__R300_P2G2CLK_DAC_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__R300_P2G2CLK_DAC_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb	/;"	d
PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb	include/radeon.h	/^#define PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb	/;"	d
PIXCLK_640_480_60	board/gdsys/common/osd.c	/^#define PIXCLK_640_480_60 /;"	d	file:
PIXCLK_ALWAYS_ONb	include/radeon.h	/^#define PIXCLK_ALWAYS_ONb	/;"	d
PIXCLK_DAC_ALWAYS_ONb	include/radeon.h	/^#define PIXCLK_DAC_ALWAYS_ONb	/;"	d
PIXCLK_LVDS_ALWAYS_ONb	include/radeon.h	/^#define PIXCLK_LVDS_ALWAYS_ONb	/;"	d
PIXCLK_TMDS_ALWAYS_ONb	include/radeon.h	/^#define PIXCLK_TMDS_ALWAYS_ONb	/;"	d
PIXCLK_TV_SRC_SEL	include/radeon.h	/^#define PIXCLK_TV_SRC_SEL	/;"	d
PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_AHEND /;"	d
PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_AHEND /;"	d
PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_AHEND /;"	d
PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_AHEND /;"	d
PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_AHSTART /;"	d
PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_AHSTART /;"	d
PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_AHSTART /;"	d
PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_AHSTART /;"	d
PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_ATRANSP /;"	d
PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_ATRANSP /;"	d
PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_ATRANSP /;"	d
PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_ATRANSP /;"	d
PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_AVEND /;"	d
PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_AVEND /;"	d
PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_AVEND /;"	d
PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_AVEND /;"	d
PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_AVSTART /;"	d
PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_AVSTART /;"	d
PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_AVSTART /;"	d
PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_AVSTART /;"	d
PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_BHEND /;"	d
PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_BHEND /;"	d
PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_BHEND /;"	d
PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_BHEND /;"	d
PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_BHSTART /;"	d
PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_BHSTART /;"	d
PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_BHSTART /;"	d
PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_BHSTART /;"	d
PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_BTRANSP /;"	d
PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_BTRANSP /;"	d
PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_BTRANSP /;"	d
PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_BTRANSP /;"	d
PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_BVCON /;"	d
PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_BVCON /;"	d
PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_BVCON /;"	d
PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_BVCON /;"	d
PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_BVEND /;"	d
PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_BVEND /;"	d
PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_BVEND /;"	d
PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_BVEND /;"	d
PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_BVSTART /;"	d
PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_BVSTART /;"	d
PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_BVSTART /;"	d
PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_BVSTART /;"	d
PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_CCBIAS /;"	d
PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_CCBIAS /;"	d
PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_CCBIAS /;"	d
PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_CCBIAS /;"	d
PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_CTL /;"	d
PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_CTL /;"	d
PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_CTL /;"	d
PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_CTL /;"	d
PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_GUCON /;"	d
PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_GUCON /;"	d
PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_GUCON /;"	d
PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_GUCON /;"	d
PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_INTRSTAT /;"	d
PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_INTRSTAT /;"	d
PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_INTRSTAT /;"	d
PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_INTRSTAT /;"	d
PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_LPF /;"	d
PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_LPF /;"	d
PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_LPF /;"	d
PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_LPF /;"	d
PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_PPL /;"	d
PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_PPL /;"	d
PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_PPL /;"	d
PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_PPL /;"	d
PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_RYCON /;"	d
PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_RYCON /;"	d
PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_RYCON /;"	d
PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_RYCON /;"	d
PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PIXC_TC /;"	d
PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PIXC_TC /;"	d
PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PIXC_TC /;"	d
PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PIXC_TC /;"	d
PIXEL_CLK_DIVIDER_MSK	arch/arm/include/asm/arch-tegra/dc.h	/^#define	PIXEL_CLK_DIVIDER_MSK	/;"	d
PIXEL_CLK_DIVIDER_PCD1	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD1,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD12	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD12,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD13	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD13,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD16	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD16,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD18	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD18,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD1H	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD1H,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD2	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD2,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD24	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD24,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD3	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD3,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD4	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD4,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD6	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD6,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD8	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD8,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_PCD9	arch/arm/include/asm/arch-tegra/dc.h	/^	PIXEL_CLK_DIVIDER_PCD9,$/;"	e	enum:__anonf53c9cce0303
PIXEL_CLK_DIVIDER_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define	PIXEL_CLK_DIVIDER_SHIFT	/;"	d
PIXEL_CLK_LSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define PIXEL_CLK_LSB_REG	/;"	d	file:
PIXEL_CLK_MSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define PIXEL_CLK_MSB_REG	/;"	d	file:
PIXEL_CLK_NUMERATOR	board/compulab/common/omap3_display.c	/^#define PIXEL_CLK_NUMERATOR /;"	d	file:
PIXIS_AUX	include/configs/MPC8536DS.h	/^#define PIXIS_AUX	/;"	d
PIXIS_AUX	include/configs/MPC8544DS.h	/^#define PIXIS_AUX	/;"	d
PIXIS_AUX	include/configs/MPC8572DS.h	/^#define PIXIS_AUX	/;"	d
PIXIS_AUX	include/configs/MPC8610HPCD.h	/^#define PIXIS_AUX	/;"	d
PIXIS_AUX	include/configs/MPC8641HPCN.h	/^#define PIXIS_AUX	/;"	d
PIXIS_AUX2	include/configs/MPC8536DS.h	/^#define PIXIS_AUX2	/;"	d
PIXIS_AUX2	include/configs/MPC8572DS.h	/^#define PIXIS_AUX2	/;"	d
PIXIS_BASE	include/configs/MPC8536DS.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE	include/configs/MPC8544DS.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE	include/configs/MPC8572DS.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE	include/configs/MPC8610HPCD.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE	include/configs/MPC8641HPCN.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE	include/configs/P1022DS.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE	include/configs/corenet_ds.h	/^#define PIXIS_BASE	/;"	d
PIXIS_BASE_PHYS	include/configs/MPC8536DS.h	/^#define PIXIS_BASE_PHYS	/;"	d
PIXIS_BASE_PHYS	include/configs/MPC8572DS.h	/^#define PIXIS_BASE_PHYS	/;"	d
PIXIS_BASE_PHYS	include/configs/MPC8641HPCN.h	/^#define PIXIS_BASE_PHYS	/;"	d
PIXIS_BASE_PHYS	include/configs/P1022DS.h	/^#define PIXIS_BASE_PHYS	/;"	d
PIXIS_BASE_PHYS	include/configs/corenet_ds.h	/^#define PIXIS_BASE_PHYS	/;"	d
PIXIS_BASE_PHYS_LOW	include/configs/MPC8641HPCN.h	/^#define PIXIS_BASE_PHYS_LOW	/;"	d
PIXIS_BRDCFG0	include/configs/MPC8610HPCD.h	/^#define PIXIS_BRDCFG0	/;"	d
PIXIS_CSR	include/configs/MPC8536DS.h	/^#define PIXIS_CSR /;"	d
PIXIS_CSR	include/configs/MPC8572DS.h	/^#define PIXIS_CSR /;"	d
PIXIS_ELBC_SPI_MASK	include/configs/P1022DS.h	/^#define PIXIS_ELBC_SPI_MASK	/;"	d
PIXIS_EN	board/freescale/common/ngpixis.h	/^#define PIXIS_EN(/;"	d
PIXIS_ID	include/configs/MPC8536DS.h	/^#define PIXIS_ID	/;"	d
PIXIS_ID	include/configs/MPC8544DS.h	/^#define PIXIS_ID	/;"	d
PIXIS_ID	include/configs/MPC8572DS.h	/^#define PIXIS_ID	/;"	d
PIXIS_ID	include/configs/MPC8610HPCD.h	/^#define PIXIS_ID	/;"	d
PIXIS_ID	include/configs/MPC8641HPCN.h	/^#define PIXIS_ID	/;"	d
PIXIS_LBMAP_ALTBANK	include/configs/P1022DS.h	/^#define PIXIS_LBMAP_ALTBANK	/;"	d
PIXIS_LBMAP_ALTBANK	include/configs/P2041RDB.h	/^#define PIXIS_LBMAP_ALTBANK	/;"	d
PIXIS_LBMAP_ALTBANK	include/configs/corenet_ds.h	/^#define PIXIS_LBMAP_ALTBANK	/;"	d
PIXIS_LBMAP_MASK	include/configs/P1022DS.h	/^#define PIXIS_LBMAP_MASK	/;"	d
PIXIS_LBMAP_MASK	include/configs/P2041RDB.h	/^#define PIXIS_LBMAP_MASK	/;"	d
PIXIS_LBMAP_MASK	include/configs/corenet_ds.h	/^#define PIXIS_LBMAP_MASK	/;"	d
PIXIS_LBMAP_SHIFT	include/configs/P2041RDB.h	/^#define PIXIS_LBMAP_SHIFT	/;"	d
PIXIS_LBMAP_SHIFT	include/configs/corenet_ds.h	/^#define PIXIS_LBMAP_SHIFT	/;"	d
PIXIS_LBMAP_SWITCH	include/configs/P1022DS.h	/^#define PIXIS_LBMAP_SWITCH	/;"	d
PIXIS_LBMAP_SWITCH	include/configs/P2041RDB.h	/^#define PIXIS_LBMAP_SWITCH	/;"	d
PIXIS_LBMAP_SWITCH	include/configs/corenet_ds.h	/^#define PIXIS_LBMAP_SWITCH	/;"	d
PIXIS_LED	include/configs/MPC8536DS.h	/^#define PIXIS_LED	/;"	d
PIXIS_LED	include/configs/MPC8572DS.h	/^#define PIXIS_LED	/;"	d
PIXIS_PVER	include/configs/MPC8536DS.h	/^#define PIXIS_PVER	/;"	d
PIXIS_PVER	include/configs/MPC8544DS.h	/^#define PIXIS_PVER	/;"	d
PIXIS_PVER	include/configs/MPC8572DS.h	/^#define PIXIS_PVER	/;"	d
PIXIS_PVER	include/configs/MPC8610HPCD.h	/^#define PIXIS_PVER	/;"	d
PIXIS_PVER	include/configs/MPC8641HPCN.h	/^#define PIXIS_PVER	/;"	d
PIXIS_PWR	include/configs/MPC8536DS.h	/^#define PIXIS_PWR	/;"	d
PIXIS_PWR	include/configs/MPC8572DS.h	/^#define PIXIS_PWR	/;"	d
PIXIS_READ	board/freescale/common/ngpixis.h	/^#define PIXIS_READ(/;"	d
PIXIS_RST	include/configs/MPC8536DS.h	/^#define PIXIS_RST	/;"	d
PIXIS_RST	include/configs/MPC8544DS.h	/^#define PIXIS_RST	/;"	d
PIXIS_RST	include/configs/MPC8572DS.h	/^#define PIXIS_RST	/;"	d
PIXIS_RST	include/configs/MPC8610HPCD.h	/^#define PIXIS_RST	/;"	d
PIXIS_RST	include/configs/MPC8641HPCN.h	/^#define PIXIS_RST	/;"	d
PIXIS_SIZE	include/configs/MPC8641HPCN.h	/^#define PIXIS_SIZE	/;"	d
PIXIS_SPD	include/configs/MPC8536DS.h	/^#define PIXIS_SPD	/;"	d
PIXIS_SPD	include/configs/MPC8544DS.h	/^#define PIXIS_SPD	/;"	d
PIXIS_SPD	include/configs/MPC8572DS.h	/^#define PIXIS_SPD	/;"	d
PIXIS_SPD	include/configs/MPC8610HPCD.h	/^#define PIXIS_SPD	/;"	d
PIXIS_SPD	include/configs/MPC8641HPCN.h	/^#define PIXIS_SPD	/;"	d
PIXIS_SPD	include/configs/P1022DS.h	/^#define PIXIS_SPD	/;"	d
PIXIS_SPD_SYSCLK	include/configs/MPC8536DS.h	/^#define PIXIS_SPD_SYSCLK	/;"	d
PIXIS_SPD_SYSCLK_MASK	include/configs/MPC8572DS.h	/^#define PIXIS_SPD_SYSCLK_MASK	/;"	d
PIXIS_SPD_SYSCLK_MASK	include/configs/P1022DS.h	/^#define PIXIS_SPD_SYSCLK_MASK	/;"	d
PIXIS_SPI	include/configs/P1022DS.h	/^#define PIXIS_SPI	/;"	d
PIXIS_SW	board/freescale/common/ngpixis.h	/^#define PIXIS_SW(/;"	d
PIXIS_SW11_LANE_9_SEL	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW11_LANE_9_SEL	/;"	d	file:
PIXIS_SW2_LANE_1617_SEL	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_1617_SEL	/;"	d	file:
PIXIS_SW2_LANE_1617_SEL	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_1617_SEL	/;"	d	file:
PIXIS_SW2_LANE_23_SEL	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_23_SEL	/;"	d	file:
PIXIS_SW2_LANE_23_SEL	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_23_SEL	/;"	d	file:
PIXIS_SW2_LANE_45_SEL	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_45_SEL	/;"	d	file:
PIXIS_SW2_LANE_45_SEL	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_45_SEL	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_5	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_67_SEL_5	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_5	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_67_SEL_5	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_6	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_67_SEL_6	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_6	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_67_SEL_6	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_7	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_67_SEL_7	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_7	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_67_SEL_7	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_MASK	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_67_SEL_MASK	/;"	d	file:
PIXIS_SW2_LANE_67_SEL_MASK	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_67_SEL_MASK	/;"	d	file:
PIXIS_SW2_LANE_8_SEL	board/freescale/corenet_ds/eth_hydra.c	/^#define PIXIS_SW2_LANE_8_SEL	/;"	d	file:
PIXIS_SW2_LANE_8_SEL	board/freescale/corenet_ds/eth_superhydra.c	/^#define PIXIS_SW2_LANE_8_SEL	/;"	d	file:
PIXIS_VBOOT	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT	/;"	d
PIXIS_VBOOT	include/configs/MPC8544DS.h	/^#define PIXIS_VBOOT	/;"	d
PIXIS_VBOOT	include/configs/MPC8572DS.h	/^#define PIXIS_VBOOT	/;"	d
PIXIS_VBOOT	include/configs/MPC8610HPCD.h	/^#define PIXIS_VBOOT	/;"	d
PIXIS_VBOOT	include/configs/MPC8641HPCN.h	/^#define PIXIS_VBOOT	/;"	d
PIXIS_VBOOT_FBANK	include/configs/MPC8544DS.h	/^#define PIXIS_VBOOT_FBANK	/;"	d
PIXIS_VBOOT_FBANK	include/configs/MPC8641HPCN.h	/^#define PIXIS_VBOOT_FBANK	/;"	d
PIXIS_VBOOT_FMAP	include/configs/MPC8544DS.h	/^#define PIXIS_VBOOT_FMAP	/;"	d
PIXIS_VBOOT_FMAP	include/configs/MPC8641HPCN.h	/^#define PIXIS_VBOOT_FMAP	/;"	d
PIXIS_VBOOT_LBMAP	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP	/;"	d
PIXIS_VBOOT_LBMAP	include/configs/MPC8572DS.h	/^#define PIXIS_VBOOT_LBMAP	/;"	d
PIXIS_VBOOT_LBMAP_NAND	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP_NAND	/;"	d
PIXIS_VBOOT_LBMAP_NAND	include/configs/MPC8572DS.h	/^#define PIXIS_VBOOT_LBMAP_NAND	/;"	d
PIXIS_VBOOT_LBMAP_NOR0	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP_NOR0	/;"	d
PIXIS_VBOOT_LBMAP_NOR0	include/configs/MPC8572DS.h	/^#define PIXIS_VBOOT_LBMAP_NOR0	/;"	d
PIXIS_VBOOT_LBMAP_NOR1	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP_NOR1	/;"	d
PIXIS_VBOOT_LBMAP_NOR1	include/configs/MPC8572DS.h	/^#define PIXIS_VBOOT_LBMAP_NOR1	/;"	d
PIXIS_VBOOT_LBMAP_NOR2	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP_NOR2	/;"	d
PIXIS_VBOOT_LBMAP_NOR3	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP_NOR3	/;"	d
PIXIS_VBOOT_LBMAP_PJET	include/configs/MPC8536DS.h	/^#define PIXIS_VBOOT_LBMAP_PJET	/;"	d
PIXIS_VBOOT_LBMAP_PJET	include/configs/MPC8572DS.h	/^#define PIXIS_VBOOT_LBMAP_PJET	/;"	d
PIXIS_VCFGEN0	include/configs/MPC8536DS.h	/^#define PIXIS_VCFGEN0	/;"	d
PIXIS_VCFGEN0	include/configs/MPC8544DS.h	/^#define PIXIS_VCFGEN0	/;"	d
PIXIS_VCFGEN0	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN0	/;"	d
PIXIS_VCFGEN0	include/configs/MPC8610HPCD.h	/^#define PIXIS_VCFGEN0	/;"	d
PIXIS_VCFGEN0	include/configs/MPC8641HPCN.h	/^#define PIXIS_VCFGEN0	/;"	d
PIXIS_VCFGEN1	include/configs/MPC8536DS.h	/^#define PIXIS_VCFGEN1	/;"	d
PIXIS_VCFGEN1	include/configs/MPC8544DS.h	/^#define PIXIS_VCFGEN1	/;"	d
PIXIS_VCFGEN1	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN1	/;"	d
PIXIS_VCFGEN1	include/configs/MPC8610HPCD.h	/^#define PIXIS_VCFGEN1	/;"	d
PIXIS_VCFGEN1	include/configs/MPC8641HPCN.h	/^#define PIXIS_VCFGEN1	/;"	d
PIXIS_VCFGEN1_MASK	include/configs/MPC8544DS.h	/^#define PIXIS_VCFGEN1_MASK	/;"	d
PIXIS_VCFGEN1_MASK	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN1_MASK	/;"	d
PIXIS_VCFGEN1_TSEC1SER	include/configs/MPC8544DS.h	/^#define PIXIS_VCFGEN1_TSEC1SER	/;"	d
PIXIS_VCFGEN1_TSEC1SER	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN1_TSEC1SER	/;"	d
PIXIS_VCFGEN1_TSEC2SER	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN1_TSEC2SER	/;"	d
PIXIS_VCFGEN1_TSEC3SER	include/configs/MPC8544DS.h	/^#define PIXIS_VCFGEN1_TSEC3SER	/;"	d
PIXIS_VCFGEN1_TSEC3SER	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN1_TSEC3SER	/;"	d
PIXIS_VCFGEN1_TSEC4SER	include/configs/MPC8572DS.h	/^#define PIXIS_VCFGEN1_TSEC4SER	/;"	d
PIXIS_VCLKH	include/configs/MPC8536DS.h	/^#define PIXIS_VCLKH	/;"	d
PIXIS_VCLKH	include/configs/MPC8544DS.h	/^#define PIXIS_VCLKH	/;"	d
PIXIS_VCLKH	include/configs/MPC8572DS.h	/^#define PIXIS_VCLKH	/;"	d
PIXIS_VCLKH	include/configs/MPC8610HPCD.h	/^#define PIXIS_VCLKH	/;"	d
PIXIS_VCLKH	include/configs/MPC8641HPCN.h	/^#define PIXIS_VCLKH	/;"	d
PIXIS_VCLKL	include/configs/MPC8536DS.h	/^#define PIXIS_VCLKL	/;"	d
PIXIS_VCLKL	include/configs/MPC8544DS.h	/^#define PIXIS_VCLKL	/;"	d
PIXIS_VCLKL	include/configs/MPC8572DS.h	/^#define PIXIS_VCLKL	/;"	d
PIXIS_VCLKL	include/configs/MPC8610HPCD.h	/^#define PIXIS_VCLKL	/;"	d
PIXIS_VCLKL	include/configs/MPC8641HPCN.h	/^#define PIXIS_VCLKL	/;"	d
PIXIS_VCORE0	include/configs/MPC8536DS.h	/^#define PIXIS_VCORE0	/;"	d
PIXIS_VCORE0	include/configs/MPC8572DS.h	/^#define PIXIS_VCORE0	/;"	d
PIXIS_VCTL	include/configs/MPC8536DS.h	/^#define PIXIS_VCTL	/;"	d
PIXIS_VCTL	include/configs/MPC8544DS.h	/^#define PIXIS_VCTL	/;"	d
PIXIS_VCTL	include/configs/MPC8572DS.h	/^#define PIXIS_VCTL	/;"	d
PIXIS_VCTL	include/configs/MPC8610HPCD.h	/^#define PIXIS_VCTL	/;"	d
PIXIS_VCTL	include/configs/MPC8641HPCN.h	/^#define PIXIS_VCTL	/;"	d
PIXIS_VDDRCLK0	include/configs/MPC8536DS.h	/^#define PIXIS_VDDRCLK0	/;"	d
PIXIS_VDDRCLK0	include/configs/MPC8572DS.h	/^#define PIXIS_VDDRCLK0	/;"	d
PIXIS_VDDRCLK1	include/configs/MPC8536DS.h	/^#define PIXIS_VDDRCLK1	/;"	d
PIXIS_VDDRCLK1	include/configs/MPC8572DS.h	/^#define PIXIS_VDDRCLK1	/;"	d
PIXIS_VDDRCLK2	include/configs/MPC8536DS.h	/^#define PIXIS_VDDRCLK2	/;"	d
PIXIS_VDDRCLK2	include/configs/MPC8572DS.h	/^#define PIXIS_VDDRCLK2	/;"	d
PIXIS_VER	include/configs/MPC8536DS.h	/^#define PIXIS_VER	/;"	d
PIXIS_VER	include/configs/MPC8544DS.h	/^#define PIXIS_VER	/;"	d
PIXIS_VER	include/configs/MPC8572DS.h	/^#define PIXIS_VER	/;"	d
PIXIS_VER	include/configs/MPC8610HPCD.h	/^#define PIXIS_VER	/;"	d
PIXIS_VER	include/configs/MPC8641HPCN.h	/^#define PIXIS_VER	/;"	d
PIXIS_VSPEED0	include/configs/MPC8536DS.h	/^#define PIXIS_VSPEED0	/;"	d
PIXIS_VSPEED0	include/configs/MPC8544DS.h	/^#define PIXIS_VSPEED0	/;"	d
PIXIS_VSPEED0	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED0	/;"	d
PIXIS_VSPEED0	include/configs/MPC8610HPCD.h	/^#define PIXIS_VSPEED0	/;"	d
PIXIS_VSPEED0	include/configs/MPC8641HPCN.h	/^#define PIXIS_VSPEED0	/;"	d
PIXIS_VSPEED1	include/configs/MPC8536DS.h	/^#define PIXIS_VSPEED1	/;"	d
PIXIS_VSPEED1	include/configs/MPC8544DS.h	/^#define PIXIS_VSPEED1	/;"	d
PIXIS_VSPEED1	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED1	/;"	d
PIXIS_VSPEED1	include/configs/MPC8610HPCD.h	/^#define PIXIS_VSPEED1	/;"	d
PIXIS_VSPEED1	include/configs/MPC8641HPCN.h	/^#define PIXIS_VSPEED1	/;"	d
PIXIS_VSPEED2	include/configs/MPC8536DS.h	/^#define PIXIS_VSPEED2	/;"	d
PIXIS_VSPEED2	include/configs/MPC8544DS.h	/^#define PIXIS_VSPEED2	/;"	d
PIXIS_VSPEED2	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED2	/;"	d
PIXIS_VSPEED2_MASK	include/configs/MPC8544DS.h	/^#define PIXIS_VSPEED2_MASK	/;"	d
PIXIS_VSPEED2_MASK	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED2_MASK	/;"	d
PIXIS_VSPEED2_TSEC1SER	include/configs/MPC8544DS.h	/^#define PIXIS_VSPEED2_TSEC1SER	/;"	d
PIXIS_VSPEED2_TSEC1SER	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED2_TSEC1SER	/;"	d
PIXIS_VSPEED2_TSEC2SER	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED2_TSEC2SER	/;"	d
PIXIS_VSPEED2_TSEC3SER	include/configs/MPC8544DS.h	/^#define PIXIS_VSPEED2_TSEC3SER	/;"	d
PIXIS_VSPEED2_TSEC3SER	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED2_TSEC3SER	/;"	d
PIXIS_VSPEED2_TSEC4SER	include/configs/MPC8572DS.h	/^#define PIXIS_VSPEED2_TSEC4SER	/;"	d
PIXIS_VSTAT	include/configs/MPC8536DS.h	/^#define PIXIS_VSTAT	/;"	d
PIXIS_VSTAT	include/configs/MPC8572DS.h	/^#define PIXIS_VSTAT	/;"	d
PIXIS_VSYSCLK0	include/configs/MPC8536DS.h	/^#define PIXIS_VSYSCLK0	/;"	d
PIXIS_VSYSCLK0	include/configs/MPC8572DS.h	/^#define PIXIS_VSYSCLK0	/;"	d
PIXIS_VSYSCLK1	include/configs/MPC8536DS.h	/^#define PIXIS_VSYSCLK1	/;"	d
PIXIS_VSYSCLK1	include/configs/MPC8572DS.h	/^#define PIXIS_VSYSCLK1	/;"	d
PIXIS_VSYSCLK2	include/configs/MPC8536DS.h	/^#define PIXIS_VSYSCLK2	/;"	d
PIXIS_VSYSCLK2	include/configs/MPC8572DS.h	/^#define PIXIS_VSYSCLK2	/;"	d
PIXIS_VWATCH	include/configs/MPC8536DS.h	/^#define PIXIS_VWATCH	/;"	d
PIXIS_VWATCH	include/configs/MPC8572DS.h	/^#define PIXIS_VWATCH	/;"	d
PIXIS_WRITE	board/freescale/common/ngpixis.h	/^#define PIXIS_WRITE(/;"	d
PJ0	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ0	/;"	d
PJ1	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ1	/;"	d
PJ10	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ10	/;"	d
PJ11	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ11	/;"	d
PJ12	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ12	/;"	d
PJ13	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ13	/;"	d
PJ14	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ14	/;"	d
PJ15	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ15	/;"	d
PJ2	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ2	/;"	d
PJ3	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ3	/;"	d
PJ4	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ4	/;"	d
PJ5	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ5	/;"	d
PJ6	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ6	/;"	d
PJ7	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ7	/;"	d
PJ8	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ8	/;"	d
PJ9	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define PJ9	/;"	d
PJCE_CAN	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PJCE_CAN	/;"	d
PJCE_MASK	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PJCE_MASK	/;"	d
PJCE_SPI	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PJCE_SPI	/;"	d
PJCE_SPORT	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PJCE_SPORT	/;"	d
PJCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PJCR	/;"	d
PJCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PJCR /;"	d
PJCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PJCR /;"	d
PJCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PJCR /;"	d
PJCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PJCR	/;"	d
PJCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PJCR /;"	d	file:
PJCR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PJCR0_A:	.long 0xFFFE390E$/;"	l
PJCR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PJCR0_D:	.word 0x3300$/;"	l
PJCR1_A	board/renesas/rsk7264/lowlevel_init.S	/^PJCR1_A:	.long 0xFFFE390C$/;"	l
PJCR1_D1	board/renesas/rsk7264/lowlevel_init.S	/^PJCR1_D1:	.word 0x0000$/;"	l
PJCR1_D2	board/renesas/rsk7264/lowlevel_init.S	/^PJCR1_D2:	.word 0x0022$/;"	l
PJCR2_A	board/renesas/rsk7264/lowlevel_init.S	/^PJCR2_A:	.long 0xFFFE390A$/;"	l
PJCR2_D	board/renesas/rsk7264/lowlevel_init.S	/^PJCR2_D:	.word 0x0000$/;"	l
PJCR3_A	board/renesas/rsk7269/lowlevel_init.S	/^PJCR3_A:	.long 0xFFFE3908$/;"	l
PJCR3_D	board/renesas/rsk7269/lowlevel_init.S	/^PJCR3_D:	.word 0x5000$/;"	l
PJCR_A	board/espt/lowlevel_init.S	/^PJCR_A:	.long	0xFFEF0012$/;"	l
PJCR_A	board/ms7722se/lowlevel_init.S	/^PJCR_A:		.long	0xa4050110$/;"	l
PJCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^PJCR_A:		.long	0xffec0012$/;"	l
PJCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PJCR_A:		.long	0xffec0012$/;"	l
PJCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PJCR_A:		.long	GPIO_BASE + 0x10$/;"	l
PJCR_D	board/espt/lowlevel_init.S	/^PJCR_D:	.word	0x5A57$/;"	l
PJCR_D	board/ms7722se/lowlevel_init.S	/^PJCR_D:		.word	0x1000$/;"	l
PJCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PJCR_D	/;"	d	file:
PJCR_D	board/renesas/sh7752evb/lowlevel_init.S	/^PJCR_D:		.long	0x0000$/;"	l
PJCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PJCR_D:		.long	0x0000$/;"	l
PJCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PJCR_D:		.word	0xc3fc$/;"	l
PJDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PJDR	/;"	d
PJDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PJDR /;"	d
PJDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PJDR /;"	d
PJDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PJDR /;"	d
PJDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PJDR	/;"	d
PJDR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PJDR0_A:	.long 0xFFFE3916$/;"	l
PJDR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PJDR0_D:	.word 0x0FBF$/;"	l
PJDR1_A	board/renesas/rsk7269/lowlevel_init.S	/^PJDR1_A:	.long 0xFFFE3914$/;"	l
PJDR1_D	board/renesas/rsk7269/lowlevel_init.S	/^PJDR1_D:	.word 0x0000$/;"	l
PJDR_A	board/espt/lowlevel_init.S	/^PJDR_A:	.long	0xFFEF0032$/;"	l
PJDR_D	board/espt/lowlevel_init.S	/^PJDR_D:	.long	0x00000006$/;"	l
PJIOR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PJIOR0_A:	.long 0xFFFE3912$/;"	l
PJIOR0_D1	board/renesas/rsk7264/lowlevel_init.S	/^PJIOR0_D1:	.word 0x0FC0$/;"	l
PJIOR0_D2	board/renesas/rsk7264/lowlevel_init.S	/^PJIOR0_D2:	.word 0x0FE0$/;"	l
PJIOR1_A	board/renesas/rsk7269/lowlevel_init.S	/^PJIOR1_A:	.long 0xFFFE3910$/;"	l
PJIOR1_D	board/renesas/rsk7269/lowlevel_init.S	/^PJIOR1_D:	.word 0x8000$/;"	l
PJPR0_A	board/renesas/rsk7264/lowlevel_init.S	/^PJPR0_A:	.long 0xFFFE391A$/;"	l
PJPR0_D	board/renesas/rsk7264/lowlevel_init.S	/^PJPR0_D:	.long 0x00000FBF$/;"	l
PJPUPR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PJPUPR	/;"	d
PJPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PJPUPR_A:	.long	GPIO_BASE + 0x50$/;"	l
PJPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PJPUPR_D:	.long	0x00$/;"	l
PJSE	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define PJSE	/;"	d
PKCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PKCR	/;"	d
PKCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PKCR /;"	d
PKCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PKCR /;"	d
PKCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PKCR /;"	d
PKCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PKCR	/;"	d
PKCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PKCR /;"	d	file:
PKCR_A	board/espt/lowlevel_init.S	/^PKCR_A:	.long	0xFFEF0014$/;"	l
PKCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PKCR_A:		.long	0xffec0014$/;"	l
PKCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PKCR_A:		.long	GPIO_BASE + 0x12$/;"	l
PKCR_D	board/espt/lowlevel_init.S	/^PKCR_D:	.word	0xFFF9$/;"	l
PKCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PKCR_D	/;"	d	file:
PKCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PKCR_D:		.long	0x0003$/;"	l
PKCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PKCR_D:		.word	0x03ff$/;"	l
PKDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PKDR	/;"	d
PKDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PKDR /;"	d
PKDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PKDR /;"	d
PKDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PKDR /;"	d
PKDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PKDR	/;"	d
PKDR_A	board/espt/lowlevel_init.S	/^PKDR_A:	.long	0xFFEF0034$/;"	l
PKDR_D	board/espt/lowlevel_init.S	/^PKDR_D:	.long	0x00000000$/;"	l
PKG_POWER_LIMIT_CLAMP	arch/x86/include/asm/msr-index.h	/^#define  PKG_POWER_LIMIT_CLAMP	/;"	d
PKG_POWER_LIMIT_EN	arch/x86/include/asm/msr-index.h	/^#define  PKG_POWER_LIMIT_EN	/;"	d
PKG_POWER_LIMIT_MASK	arch/x86/include/asm/msr-index.h	/^#define  PKG_POWER_LIMIT_MASK	/;"	d
PKG_POWER_LIMIT_TIME_MASK	arch/x86/include/asm/msr-index.h	/^#define  PKG_POWER_LIMIT_TIME_MASK	/;"	d
PKG_POWER_LIMIT_TIME_SHIFT	arch/x86/include/asm/msr-index.h	/^#define  PKG_POWER_LIMIT_TIME_SHIFT	/;"	d
PKPUPR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PKPUPR	/;"	d
PKPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PKPUPR_A:	.long	GPIO_BASE + 0x52$/;"	l
PKPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PKPUPR_D:	.long	0x00$/;"	l
PKSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PKSR	/;"	d
PKSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PKSR	/;"	d
PKTALIGN	include/net.h	/^#define PKTALIGN	/;"	d
PKTBUFSRX	include/net.h	/^# define PKTBUFSRX	/;"	d
PKTBUFSTX	drivers/net/ftgmac100.c	/^#define PKTBUFSTX	/;"	d	file:
PKTM	drivers/usb/host/r8a66597.h	/^#define	PKTM	/;"	d
PKTSIZE	include/net.h	/^#define PKTSIZE	/;"	d
PKTSIZE_ALIGN	include/net.h	/^#define PKTSIZE_ALIGN	/;"	d
PKT_ALIGN	drivers/usb/host/ehci-hcd.c	/^#define PKT_ALIGN	/;"	d	file:
PKT_AVAIL_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define PKT_AVAIL_SPDWN_EN	/;"	d
PKT_BUF_SZ	drivers/net/pcnet.c	/^#define PKT_BUF_SZ	/;"	d	file:
PKT_HDR1_CTLR_ID_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR1_CTLR_ID_MASK	/;"	d
PKT_HDR1_CTLR_ID_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR1_CTLR_ID_SHIFT	/;"	d
PKT_HDR1_PKT_ID_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR1_PKT_ID_MASK	/;"	d
PKT_HDR1_PKT_ID_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR1_PKT_ID_SHIFT	/;"	d
PKT_HDR1_PROTOCOL_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR1_PROTOCOL_MASK	/;"	d
PKT_HDR1_PROTOCOL_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR1_PROTOCOL_SHIFT	/;"	d
PKT_HDR2_PAYLOAD_SIZE_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR2_PAYLOAD_SIZE_MASK	/;"	d
PKT_HDR2_PAYLOAD_SIZE_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR2_PAYLOAD_SIZE_SHIFT	/;"	d
PKT_HDR3_READ_MODE_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR3_READ_MODE_MASK	/;"	d
PKT_HDR3_READ_MODE_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR3_READ_MODE_SHIFT	/;"	d
PKT_HDR3_REPEAT_START_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR3_REPEAT_START_MASK	/;"	d
PKT_HDR3_REPEAT_START_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR3_REPEAT_START_SHIFT	/;"	d
PKT_HDR3_SLAVE_ADDR_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR3_SLAVE_ADDR_MASK	/;"	d
PKT_HDR3_SLAVE_ADDR_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PKT_HDR3_SLAVE_ADDR_SHIFT	/;"	d
PKT_MAX	drivers/net/cpsw.c	/^#define PKT_MAX	/;"	d	file:
PKT_MAXBLR_SIZE	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define PKT_MAXBLR_SIZE /;"	d	file:
PKT_MAXBLR_SIZE	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define PKT_MAXBLR_SIZE /;"	d	file:
PKT_MAXBLR_SIZE	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PKT_MAXBLR_SIZE	/;"	d	file:
PKT_MAXBLR_SIZE	drivers/net/fsl_mcdmafec.c	/^#define PKT_MAXBLR_SIZE	/;"	d	file:
PKT_MAXBLR_SIZE	drivers/net/mcffec.c	/^#define PKT_MAXBLR_SIZE	/;"	d	file:
PKT_MAXBUF_SIZE	arch/mips/mach-au1x00/au1x00_eth.c	/^#define PKT_MAXBUF_SIZE	/;"	d	file:
PKT_MAXBUF_SIZE	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define PKT_MAXBUF_SIZE /;"	d	file:
PKT_MAXBUF_SIZE	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define PKT_MAXBUF_SIZE /;"	d	file:
PKT_MAXBUF_SIZE	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PKT_MAXBUF_SIZE	/;"	d	file:
PKT_MAXBUF_SIZE	drivers/net/fsl_mcdmafec.c	/^#define PKT_MAXBUF_SIZE	/;"	d	file:
PKT_MAXBUF_SIZE	drivers/net/mcffec.c	/^#define PKT_MAXBUF_SIZE	/;"	d	file:
PKT_MAXDMA_SIZE	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define PKT_MAXDMA_SIZE /;"	d	file:
PKT_MAXDMA_SIZE	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define PKT_MAXDMA_SIZE /;"	d	file:
PKT_MIN	drivers/net/cpsw.c	/^#define PKT_MIN	/;"	d	file:
PKT_MINBUF_SIZE	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define PKT_MINBUF_SIZE /;"	d	file:
PKT_MINBUF_SIZE	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define PKT_MINBUF_SIZE /;"	d	file:
PKT_MINBUF_SIZE	arch/powerpc/cpu/mpc8xx/fec.c	/^#define PKT_MINBUF_SIZE	/;"	d	file:
PKT_MINBUF_SIZE	drivers/net/fsl_mcdmafec.c	/^#define PKT_MINBUF_SIZE	/;"	d	file:
PKT_MINBUF_SIZE	drivers/net/mcffec.c	/^#define PKT_MINBUF_SIZE	/;"	d	file:
PKWR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PKWR	/;"	d
PKWR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PKWR	/;"	d
PL310_AUX_CTRL_ASSOCIATIVITY_MASK	arch/arm/include/asm/pl310.h	/^#define PL310_AUX_CTRL_ASSOCIATIVITY_MASK	/;"	d
PL310_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define PL310_BASE_ADDR /;"	d
PLAIN_VERSION	include/generated/version_autogenerated.h	/^#define PLAIN_VERSION /;"	d
PLATFORM_CPPFLAGS	config.mk	/^PLATFORM_CPPFLAGS :=$/;"	m
PLATFORM_CPPFLAGS	examples/standalone/Makefile	/^PLATFORM_CPPFLAGS := $(filter-out $(RELFLAGS),$(PLATFORM_CPPFLAGS))$/;"	m
PLATFORM_CYCLE_ENV_VAR	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^#define PLATFORM_CYCLE_ENV_VAR	/;"	d	file:
PLATFORM_FFS	arch/openrisc/include/asm/bitops.h	/^#define PLATFORM_FFS$/;"	d
PLATFORM_FFS	arch/powerpc/include/asm/bitops.h	/^#define PLATFORM_FFS$/;"	d
PLATFORM_FFS	arch/sh/include/asm/bitops.h	/^#define PLATFORM_FFS$/;"	d
PLATFORM_FFS	arch/x86/include/asm/bitops.h	/^#define PLATFORM_FFS$/;"	d
PLATFORM_FLS	arch/openrisc/include/asm/bitops.h	/^#define PLATFORM_FLS$/;"	d
PLATFORM_FLS	arch/powerpc/include/asm/bitops.h	/^#define PLATFORM_FLS$/;"	d
PLATFORM_ID	arch/x86/cpu/quark/smc.h	/^#define PLATFORM_ID	/;"	d
PLATFORM_INFO_SET_TDP	arch/x86/include/asm/msr-index.h	/^#define  PLATFORM_INFO_SET_TDP	/;"	d
PLATFORM_LDFLAGS	config.mk	/^PLATFORM_LDFLAGS :=$/;"	m
PLATFORM_LIBGCC	Makefile	/^PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc$/;"	m
PLATFORM_LIBGCC	Makefile	/^PLATFORM_LIBGCC = arch\/$(ARCH)\/lib\/lib.a$/;"	m
PLATFORM_LIBS	arch/arm/config.mk	/^PLATFORM_LIBS := arch\/arm\/lib\/eabi_compat.o \\$/;"	m
PLATFORM_RELFLAGS	config.mk	/^PLATFORM_RELFLAGS :=$/;"	m
PLATFORM__CLEAR_BIT	arch/microblaze/include/asm/bitops.h	/^#define PLATFORM__CLEAR_BIT$/;"	d
PLATFORM__SET_BIT	arch/blackfin/include/asm/bitops.h	/^#define PLATFORM__SET_BIT$/;"	d
PLATFORM__SET_BIT	arch/microblaze/include/asm/bitops.h	/^#define PLATFORM__SET_BIT$/;"	d
PLATFORM__SET_BIT	arch/mips/include/asm/bitops.h	/^#define PLATFORM__SET_BIT$/;"	d
PLATNAME	test/dm/regulator.c	/^	PLATNAME,$/;"	e	enum:__anone475d93a0203	file:
PLA_BACKUP	drivers/usb/eth/r8152.h	/^#define PLA_BACKUP	/;"	d
PLA_BOOT_CTRL	drivers/usb/eth/r8152.h	/^#define PLA_BOOT_CTRL	/;"	d
PLA_BP_0	drivers/usb/eth/r8152.h	/^#define PLA_BP_0	/;"	d
PLA_BP_1	drivers/usb/eth/r8152.h	/^#define PLA_BP_1	/;"	d
PLA_BP_2	drivers/usb/eth/r8152.h	/^#define PLA_BP_2	/;"	d
PLA_BP_3	drivers/usb/eth/r8152.h	/^#define PLA_BP_3	/;"	d
PLA_BP_4	drivers/usb/eth/r8152.h	/^#define PLA_BP_4	/;"	d
PLA_BP_5	drivers/usb/eth/r8152.h	/^#define PLA_BP_5	/;"	d
PLA_BP_6	drivers/usb/eth/r8152.h	/^#define PLA_BP_6	/;"	d
PLA_BP_7	drivers/usb/eth/r8152.h	/^#define PLA_BP_7	/;"	d
PLA_BP_BA	drivers/usb/eth/r8152.h	/^#define PLA_BP_BA	/;"	d
PLA_BP_EN	drivers/usb/eth/r8152.h	/^#define PLA_BP_EN	/;"	d
PLA_CFG_WOL	drivers/usb/eth/r8152.h	/^#define PLA_CFG_WOL	/;"	d
PLA_CONFIG12	drivers/usb/eth/r8152.h	/^#define PLA_CONFIG12	/;"	d
PLA_CONFIG34	drivers/usb/eth/r8152.h	/^#define PLA_CONFIG34	/;"	d
PLA_CONFIG5	drivers/usb/eth/r8152.h	/^#define PLA_CONFIG5	/;"	d
PLA_CPCR	drivers/usb/eth/r8152.h	/^#define PLA_CPCR	/;"	d
PLA_CR	drivers/usb/eth/r8152.h	/^#define PLA_CR	/;"	d
PLA_CRWECR	drivers/usb/eth/r8152.h	/^#define PLA_CRWECR	/;"	d
PLA_CR_RE	drivers/usb/eth/r8152.h	/^#define PLA_CR_RE	/;"	d
PLA_CR_RST	drivers/usb/eth/r8152.h	/^#define PLA_CR_RST	/;"	d
PLA_CR_TE	drivers/usb/eth/r8152.h	/^#define PLA_CR_TE	/;"	d
PLA_DMY_REG0	drivers/usb/eth/r8152.h	/^#define PLA_DMY_REG0	/;"	d
PLA_EEEP_CR	drivers/usb/eth/r8152.h	/^#define PLA_EEEP_CR	/;"	d
PLA_EEE_CR	drivers/usb/eth/r8152.h	/^#define PLA_EEE_CR	/;"	d
PLA_FMC	drivers/usb/eth/r8152.h	/^#define PLA_FMC	/;"	d
PLA_GPHY_INTR_IMR	drivers/usb/eth/r8152.h	/^#define PLA_GPHY_INTR_IMR	/;"	d
PLA_IDR	drivers/usb/eth/r8152.h	/^#define PLA_IDR	/;"	d
PLA_LEDSEL	drivers/usb/eth/r8152.h	/^#define PLA_LEDSEL	/;"	d
PLA_LED_FEATURE	drivers/usb/eth/r8152.h	/^#define PLA_LED_FEATURE	/;"	d
PLA_MAC_PWR_CTRL	drivers/usb/eth/r8152.h	/^#define PLA_MAC_PWR_CTRL	/;"	d
PLA_MAC_PWR_CTRL2	drivers/usb/eth/r8152.h	/^#define PLA_MAC_PWR_CTRL2	/;"	d
PLA_MAC_PWR_CTRL3	drivers/usb/eth/r8152.h	/^#define PLA_MAC_PWR_CTRL3	/;"	d
PLA_MAC_PWR_CTRL4	drivers/usb/eth/r8152.h	/^#define PLA_MAC_PWR_CTRL4	/;"	d
PLA_MAR	drivers/usb/eth/r8152.h	/^#define PLA_MAR	/;"	d
PLA_MISC_0	drivers/usb/eth/r8152.h	/^#define PLA_MISC_0	/;"	d
PLA_MISC_1	drivers/usb/eth/r8152.h	/^#define PLA_MISC_1	/;"	d
PLA_MTPS	drivers/usb/eth/r8152.h	/^#define PLA_MTPS	/;"	d
PLA_OCP_GPHY_BASE	drivers/usb/eth/r8152.h	/^#define PLA_OCP_GPHY_BASE	/;"	d
PLA_OOB_CTRL	drivers/usb/eth/r8152.h	/^#define PLA_OOB_CTRL	/;"	d
PLA_PHYAR	drivers/usb/eth/r8152.h	/^#define PLA_PHYAR	/;"	d
PLA_PHYSTATUS	drivers/usb/eth/r8152.h	/^#define PLA_PHYSTATUS	/;"	d
PLA_PHY_PWR	drivers/usb/eth/r8152.h	/^#define PLA_PHY_PWR	/;"	d
PLA_PHY_PWR_LLR	drivers/usb/eth/r8152.h	/^#define PLA_PHY_PWR_LLR	/;"	d
PLA_PHY_PWR_TXEMP	drivers/usb/eth/r8152.h	/^#define PLA_PHY_PWR_TXEMP	/;"	d
PLA_RCR	drivers/usb/eth/r8152.h	/^#define PLA_RCR	/;"	d
PLA_REALWOW_TIMER	drivers/usb/eth/r8152.h	/^#define PLA_REALWOW_TIMER	/;"	d
PLA_RMS	drivers/usb/eth/r8152.h	/^#define PLA_RMS	/;"	d
PLA_RSTTALLY	drivers/usb/eth/r8152.h	/^#define PLA_RSTTALLY	/;"	d
PLA_RXFIFO_CTRL0	drivers/usb/eth/r8152.h	/^#define PLA_RXFIFO_CTRL0	/;"	d
PLA_RXFIFO_CTRL1	drivers/usb/eth/r8152.h	/^#define PLA_RXFIFO_CTRL1	/;"	d
PLA_RXFIFO_CTRL2	drivers/usb/eth/r8152.h	/^#define PLA_RXFIFO_CTRL2	/;"	d
PLA_SFF_STS_7	drivers/usb/eth/r8152.h	/^#define PLA_SFF_STS_7	/;"	d
PLA_TALLYCNT	drivers/usb/eth/r8152.h	/^#define PLA_TALLYCNT	/;"	d
PLA_TCR0	drivers/usb/eth/r8152.h	/^#define PLA_TCR0	/;"	d
PLA_TCR1	drivers/usb/eth/r8152.h	/^#define PLA_TCR1	/;"	d
PLA_TEREDO_CFG	drivers/usb/eth/r8152.h	/^#define PLA_TEREDO_CFG	/;"	d
PLA_TEREDO_TIMER	drivers/usb/eth/r8152.h	/^#define PLA_TEREDO_TIMER	/;"	d
PLA_TXFIFO_CTRL	drivers/usb/eth/r8152.h	/^#define PLA_TXFIFO_CTRL	/;"	d
PLA_WDT6_CTRL	drivers/usb/eth/r8152.h	/^#define PLA_WDT6_CTRL	/;"	d
PLB0_ACR	arch/powerpc/include/asm/ppc405.h	/^#define PLB0_ACR	/;"	d
PLB3A0_ACR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLB3A0_ACR	/;"	d
PLB3A0_ACR	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB3A0_ACR	/;"	d
PLB4A0_ACR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLB4A0_ACR	/;"	d
PLB4A0_ACR	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4A0_ACR	/;"	d
PLB4A1_ACR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLB4A1_ACR	/;"	d
PLB4A1_ACR	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4A1_ACR	/;"	d
PLB4Ax_ACR_HBU_DISABLED	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_HBU_DISABLED	/;"	d
PLB4Ax_ACR_HBU_ENABLED	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_HBU_ENABLED	/;"	d
PLB4Ax_ACR_HBU_MASK	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_HBU_MASK	/;"	d
PLB4Ax_ACR_PPM_FAIR	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_PPM_FAIR	/;"	d
PLB4Ax_ACR_PPM_FIXED	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_PPM_FIXED	/;"	d
PLB4Ax_ACR_PPM_MASK	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_PPM_MASK	/;"	d
PLB4Ax_ACR_RDP_2DEEP	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_RDP_2DEEP	/;"	d
PLB4Ax_ACR_RDP_3DEEP	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_RDP_3DEEP	/;"	d
PLB4Ax_ACR_RDP_4DEEP	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_RDP_4DEEP	/;"	d
PLB4Ax_ACR_RDP_DISABLED	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_RDP_DISABLED	/;"	d
PLB4Ax_ACR_RDP_MASK	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_RDP_MASK	/;"	d
PLB4Ax_ACR_WRP_2DEEP	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_WRP_2DEEP	/;"	d
PLB4Ax_ACR_WRP_DISABLED	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_WRP_DISABLED	/;"	d
PLB4Ax_ACR_WRP_MASK	arch/powerpc/include/asm/ppc4xx.h	/^#define PLB4Ax_ACR_WRP_MASK	/;"	d
PLCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PLCR	/;"	d
PLCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PLCR /;"	d
PLCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PLCR /;"	d
PLCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PLCR /;"	d
PLCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PLCR	/;"	d
PLCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PLCR /;"	d	file:
PLCR_A	board/espt/lowlevel_init.S	/^PLCR_A:	.long	0xFFEF0016$/;"	l
PLCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PLCR_A:		.long	0xffec0016$/;"	l
PLCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PLCR_A:		.long	GPIO_BASE + 0x14$/;"	l
PLCR_D	board/espt/lowlevel_init.S	/^PLCR_D:	.word 	0xC330$/;"	l
PLCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PLCR_D	/;"	d	file:
PLCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PLCR_D:		.long	0x0000$/;"	l
PLD	arch/arm/include/asm/assembler.h	/^#define PLD(/;"	d
PLDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PLDR	/;"	d
PLDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PLDR /;"	d
PLDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PLDR /;"	d
PLDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PLDR /;"	d
PLDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PLDR	/;"	d
PLD_AP	board/mpl/mip405/mip405.h	/^#define PLD_AP	/;"	d
PLD_BASE	board/mpl/vcma9/lowlevel_init.S	/^#define PLD_BASE	/;"	d	file:
PLD_BASE_ADDRESS	board/mpl/pip405/pip405.h	/^#define PLD_BASE_ADDRESS	/;"	d
PLD_BEM	board/mpl/mip405/mip405.h	/^#define PLD_BEM	/;"	d
PLD_BME	board/mpl/mip405/mip405.h	/^#define PLD_BME	/;"	d
PLD_BOARD_CFG_REG	board/mpl/mip405/mip405.c	/^#define PLD_BOARD_CFG_REG	/;"	d	file:
PLD_BOARD_CFG_REG	board/mpl/pip405/pip405.h	/^#define PLD_BOARD_CFG_REG	/;"	d
PLD_BOARD_TIMING	board/mpl/pati/pati.h	/^#define PLD_BOARD_TIMING	/;"	d
PLD_BS	board/mpl/mip405/mip405.h	/^#define PLD_BS	/;"	d
PLD_BU	board/mpl/mip405/mip405.h	/^#define PLD_BU	/;"	d
PLD_BW	board/mpl/mip405/mip405.h	/^#define PLD_BW	/;"	d
PLD_CAN_REG	board/mpl/pip405/pip405.h	/^#define PLD_CAN_REG	/;"	d
PLD_COM_MODE_REG	board/mpl/mip405/mip405.c	/^#define PLD_COM_MODE_REG	/;"	d	file:
PLD_COM_PWR_REG	board/mpl/pip405/pip405.h	/^#define PLD_COM_PWR_REG	/;"	d
PLD_CONFIG_BASE	include/configs/PATI.h	/^#define PLD_CONFIG_BASE	/;"	d
PLD_CONF_REG1	board/mpl/pati/pati.h	/^#define PLD_CONF_REG1	/;"	d
PLD_CONF_REG2	board/mpl/pati/pati.h	/^#define PLD_CONF_REG2	/;"	d
PLD_CONF_RES	board/mpl/pati/pati.h	/^#define PLD_CONF_RES	/;"	d
PLD_CR	board/mpl/mip405/mip405.h	/^#define PLD_CR	/;"	d
PLD_CSN	board/mpl/mip405/mip405.h	/^#define PLD_CSN	/;"	d
PLD_EXT_CONF_REG	board/mpl/mip405/mip405.c	/^#define PLD_EXT_CONF_REG	/;"	d	file:
PLD_FLASH_COM_REG	board/mpl/pip405/pip405.h	/^#define PLD_FLASH_COM_REG	/;"	d
PLD_IRQ_REG	board/mpl/mip405/mip405.c	/^#define PLD_IRQ_REG	/;"	d	file:
PLD_LEDCR	board/renesas/sh7785lcr/selfcheck.c	/^#define PLD_LEDCR	/;"	d	file:
PLD_LED_USER_REG	board/mpl/pip405/pip405.h	/^#define PLD_LED_USER_REG	/;"	d
PLD_NIC_VGA_REG	board/mpl/pip405/pip405.h	/^#define PLD_NIC_VGA_REG	/;"	d
PLD_OEN	board/mpl/mip405/mip405.h	/^#define PLD_OEN	/;"	d
PLD_PART_ID	board/mpl/pati/pati.h	/^#define PLD_PART_ID	/;"	d
PLD_PART_REG	board/mpl/mip405/mip405.c	/^#define PLD_PART_REG	/;"	d	file:
PLD_PART_REG	board/mpl/pip405/pip405.h	/^#define PLD_PART_REG	/;"	d
PLD_PEN	board/mpl/mip405/mip405.h	/^#define PLD_PEN	/;"	d
PLD_RE	board/mpl/mip405/mip405.h	/^#define PLD_RE	/;"	d
PLD_SCSI_RST_REG	board/mpl/pip405/pip405.h	/^#define PLD_SCSI_RST_REG	/;"	d
PLD_SER_PWR_REG	board/mpl/pip405/pip405.h	/^#define PLD_SER_PWR_REG	/;"	d
PLD_SOR	board/mpl/mip405/mip405.h	/^#define PLD_SOR	/;"	d
PLD_SWSR	board/renesas/sh7785lcr/selfcheck.c	/^#define PLD_SWSR	/;"	d	file:
PLD_SYS_MAN_REG	board/mpl/pip405/pip405.h	/^#define PLD_SYS_MAN_REG	/;"	d
PLD_TH	board/mpl/mip405/mip405.h	/^#define PLD_TH	/;"	d
PLD_TWE	board/mpl/mip405/mip405.h	/^#define PLD_TWE	/;"	d
PLD_VERSR	board/renesas/sh7785lcr/selfcheck.c	/^#define PLD_VERSR	/;"	d	file:
PLD_VERS_REG	board/mpl/mip405/mip405.c	/^#define PLD_VERS_REG	/;"	d	file:
PLD_VERS_REG	board/mpl/pip405/pip405.h	/^#define PLD_VERS_REG	/;"	d
PLD_WBF	board/mpl/mip405/mip405.h	/^#define PLD_WBF	/;"	d
PLD_WBN	board/mpl/mip405/mip405.h	/^#define PLD_WBN	/;"	d
PLGPIO_IO_36	board/spear/spear320/spear320.c	/^#define PLGPIO_IO_36	/;"	d	file:
PLGPIO_SEL_36	board/spear/spear320/spear320.c	/^#define PLGPIO_SEL_36	/;"	d	file:
PLIM0	include/mc13892.h	/^#define PLIM0	/;"	d
PLIM1	include/mc13892.h	/^#define PLIM1	/;"	d
PLIMDIS	include/mc13892.h	/^#define PLIMDIS	/;"	d
PLL0	drivers/video/tegra124/sor.h	/^#define PLL0	/;"	d
PLL0CR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define PLL0CR	/;"	d
PLL0ST	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define PLL0ST	/;"	d
PLL0_ICHPMP_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_ICHPMP_DEFAULT_MASK	/;"	d
PLL0_ICHPMP_SHFIT	drivers/video/tegra124/sor.h	/^#define PLL0_ICHPMP_SHFIT	/;"	d
PLL0_LOCK	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL0_LOCK	/;"	d
PLL0_PLLREG_LEVEL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_PLLREG_LEVEL_DEFAULT_MASK	/;"	d
PLL0_PLLREG_LEVEL_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL0_PLLREG_LEVEL_SHIFT	/;"	d
PLL0_PLLREG_LEVEL_V15	drivers/video/tegra124/sor.h	/^#define PLL0_PLLREG_LEVEL_V15	/;"	d
PLL0_PLLREG_LEVEL_V25	drivers/video/tegra124/sor.h	/^#define PLL0_PLLREG_LEVEL_V25	/;"	d
PLL0_PLLREG_LEVEL_V35	drivers/video/tegra124/sor.h	/^#define PLL0_PLLREG_LEVEL_V35	/;"	d
PLL0_PLLREG_LEVEL_V45	drivers/video/tegra124/sor.h	/^#define PLL0_PLLREG_LEVEL_V45	/;"	d
PLL0_PULLDOWN_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_PULLDOWN_DEFAULT_MASK	/;"	d
PLL0_PULLDOWN_DISABLE	drivers/video/tegra124/sor.h	/^#define PLL0_PULLDOWN_DISABLE	/;"	d
PLL0_PULLDOWN_ENABLE	drivers/video/tegra124/sor.h	/^#define PLL0_PULLDOWN_ENABLE	/;"	d
PLL0_PULLDOWN_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL0_PULLDOWN_SHIFT	/;"	d
PLL0_PWR_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_PWR_MASK	/;"	d
PLL0_PWR_OFF	drivers/video/tegra124/sor.h	/^#define PLL0_PWR_OFF	/;"	d
PLL0_PWR_ON	drivers/video/tegra124/sor.h	/^#define PLL0_PWR_ON	/;"	d
PLL0_PWR_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL0_PWR_SHIFT	/;"	d
PLL0_RATE	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^#define PLL0_RATE	/;"	d
PLL0_RESISTORSEL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_RESISTORSEL_DEFAULT_MASK	/;"	d
PLL0_RESISTORSEL_EXT	drivers/video/tegra124/sor.h	/^#define PLL0_RESISTORSEL_EXT	/;"	d
PLL0_RESISTORSEL_INT	drivers/video/tegra124/sor.h	/^#define PLL0_RESISTORSEL_INT	/;"	d
PLL0_RESISTORSEL_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL0_RESISTORSEL_SHIFT	/;"	d
PLL0_STC_BIT	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define PLL0_STC_BIT	/;"	d
PLL0_STC_MASK	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define PLL0_STC_MASK	/;"	d
PLL0_VCOCAP_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_VCOCAP_DEFAULT_MASK	/;"	d
PLL0_VCOCAP_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL0_VCOCAP_SHIFT	/;"	d
PLL0_VCOPD_ASSERT	drivers/video/tegra124/sor.h	/^#define PLL0_VCOPD_ASSERT	/;"	d
PLL0_VCOPD_MASK	drivers/video/tegra124/sor.h	/^#define PLL0_VCOPD_MASK	/;"	d
PLL0_VCOPD_RESCIND	drivers/video/tegra124/sor.h	/^#define PLL0_VCOPD_RESCIND	/;"	d
PLL0_VCOPD_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL0_VCOPD_SHIFT	/;"	d
PLL1	drivers/video/tegra124/sor.h	/^#define PLL1	/;"	d
PLL145X_MDIV_MASK	drivers/clk/exynos/clk-pll.c	/^#define PLL145X_MDIV_MASK	/;"	d	file:
PLL145X_MDIV_SHIFT	drivers/clk/exynos/clk-pll.c	/^#define PLL145X_MDIV_SHIFT	/;"	d	file:
PLL145X_PDIV_MASK	drivers/clk/exynos/clk-pll.c	/^#define PLL145X_PDIV_MASK	/;"	d	file:
PLL145X_PDIV_SHIFT	drivers/clk/exynos/clk-pll.c	/^#define PLL145X_PDIV_SHIFT	/;"	d	file:
PLL145X_SDIV_MASK	drivers/clk/exynos/clk-pll.c	/^#define PLL145X_SDIV_MASK	/;"	d	file:
PLL145X_SDIV_SHIFT	drivers/clk/exynos/clk-pll.c	/^#define PLL145X_SDIV_SHIFT	/;"	d	file:
PLL1Lock	arch/arm/mach-davinci/lowlevel_init.S	/^PLL1Lock:$/;"	l
PLL1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PLL1_BASE_ADDR	/;"	d
PLL1_CFG	arch/arm/mach-sunxi/clock_sun4i.c	/^#define PLL1_CFG(/;"	d	file:
PLL1_CFG_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define PLL1_CFG_DEFAULT	/;"	d
PLL1_CFG_DEFAULT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define PLL1_CFG_DEFAULT	/;"	d
PLL1_CLOCK	arch/arm/cpu/armv7/mx5/clock.c	/^	PLL1_CLOCK = 0,$/;"	e	enum:pll_clocks	file:
PLL1_CNTL_V	board/spear/common/spr_lowlevel_init.S	/^PLL1_CNTL_V:$/;"	l
PLL1_CTL	arch/arm/mach-davinci/lowlevel_init.S	/^PLL1_CTL:$/;"	l
PLL1_FREQ_V	board/spear/common/spr_lowlevel_init.S	/^PLL1_FREQ_V:$/;"	l
PLL1_LOCK	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL1_LOCK	/;"	d
PLL1_MAIN_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL1_MAIN_FREQ	/;"	d
PLL1_PFD1_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL1_PFD1_FREQ	/;"	d
PLL1_PFD2_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL1_PFD2_FREQ	/;"	d
PLL1_PFD3_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL1_PFD3_FREQ	/;"	d
PLL1_PFD4_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL1_PFD4_FREQ	/;"	d
PLL1_PLLM	arch/arm/mach-davinci/lowlevel_init.S	/^PLL1_PLLM:$/;"	l
PLL1_TERM_COMPOUT_HIGH	drivers/video/tegra124/sor.h	/^#define PLL1_TERM_COMPOUT_HIGH	/;"	d
PLL1_TERM_COMPOUT_LOW	drivers/video/tegra124/sor.h	/^#define PLL1_TERM_COMPOUT_LOW	/;"	d
PLL1_TERM_COMPOUT_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL1_TERM_COMPOUT_SHIFT	/;"	d
PLL1_TMDS_TERM_DISABLE	drivers/video/tegra124/sor.h	/^#define PLL1_TMDS_TERM_DISABLE	/;"	d
PLL1_TMDS_TERM_ENABLE	drivers/video/tegra124/sor.h	/^#define PLL1_TMDS_TERM_ENABLE	/;"	d
PLL1_TMDS_TERM_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL1_TMDS_TERM_SHIFT	/;"	d
PLL2	drivers/video/tegra124/sor.h	/^#define PLL2	/;"	d
PLL2Lock	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2Lock:$/;"	l
PLL2_AUX1_SEQ_MASK	drivers/video/tegra124/sor.h	/^#define PLL2_AUX1_SEQ_MASK	/;"	d
PLL2_AUX1_SEQ_PLLCAPPD_ALLOW	drivers/video/tegra124/sor.h	/^#define PLL2_AUX1_SEQ_PLLCAPPD_ALLOW	/;"	d
PLL2_AUX1_SEQ_PLLCAPPD_OVERRIDE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX1_SEQ_PLLCAPPD_OVERRIDE	/;"	d
PLL2_AUX1_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_AUX1_SHIFT	/;"	d
PLL2_AUX2_ALLOW_POWERDOWN	drivers/video/tegra124/sor.h	/^#define PLL2_AUX2_ALLOW_POWERDOWN	/;"	d
PLL2_AUX2_MASK	drivers/video/tegra124/sor.h	/^#define PLL2_AUX2_MASK	/;"	d
PLL2_AUX2_OVERRIDE_POWERDOWN	drivers/video/tegra124/sor.h	/^#define PLL2_AUX2_OVERRIDE_POWERDOWN	/;"	d
PLL2_AUX2_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_AUX2_SHIFT	/;"	d
PLL2_AUX6_BANDGAP_POWERDOWN_DISABLE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX6_BANDGAP_POWERDOWN_DISABLE	/;"	d
PLL2_AUX6_BANDGAP_POWERDOWN_ENABLE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX6_BANDGAP_POWERDOWN_ENABLE	/;"	d
PLL2_AUX6_BANDGAP_POWERDOWN_MASK	drivers/video/tegra124/sor.h	/^#define PLL2_AUX6_BANDGAP_POWERDOWN_MASK	/;"	d
PLL2_AUX6_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_AUX6_SHIFT	/;"	d
PLL2_AUX7_PORT_POWERDOWN_DISABLE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX7_PORT_POWERDOWN_DISABLE	/;"	d
PLL2_AUX7_PORT_POWERDOWN_ENABLE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX7_PORT_POWERDOWN_ENABLE	/;"	d
PLL2_AUX7_PORT_POWERDOWN_MASK	drivers/video/tegra124/sor.h	/^#define PLL2_AUX7_PORT_POWERDOWN_MASK	/;"	d
PLL2_AUX7_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_AUX7_SHIFT	/;"	d
PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_DISABLE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_DISABLE	/;"	d
PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_ENABLE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_ENABLE	/;"	d
PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_MASK	drivers/video/tegra124/sor.h	/^#define PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_MASK	/;"	d
PLL2_AUX8_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_AUX8_SHIFT	/;"	d
PLL2_AUX9_LVDSEN_ALLOW	drivers/video/tegra124/sor.h	/^#define PLL2_AUX9_LVDSEN_ALLOW	/;"	d
PLL2_AUX9_LVDSEN_OVERRIDE	drivers/video/tegra124/sor.h	/^#define PLL2_AUX9_LVDSEN_OVERRIDE	/;"	d
PLL2_AUX9_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_AUX9_SHIFT	/;"	d
PLL2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PLL2_BASE_ADDR	/;"	d
PLL2_CLOCK	arch/arm/cpu/armv7/mx5/clock.c	/^	PLL2_CLOCK,$/;"	e	enum:pll_clocks	file:
PLL2_CNTL_6UA	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PLL2_CNTL_6UA	/;"	d
PLL2_CNTL_ENABLE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PLL2_CNTL_ENABLE	/;"	d
PLL2_CNTL_LOCK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PLL2_CNTL_LOCK	/;"	d
PLL2_CNTL_RESETN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PLL2_CNTL_RESETN	/;"	d
PLL2_CNTL_SAMPLE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define PLL2_CNTL_SAMPLE	/;"	d
PLL2_CNTL_V	board/spear/common/spr_lowlevel_init.S	/^PLL2_CNTL_V:$/;"	l
PLL2_CTL	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_CTL:$/;"	l
PLL2_DCIR_PLL_RESET_ALLOW	drivers/video/tegra124/sor.h	/^#define PLL2_DCIR_PLL_RESET_ALLOW	/;"	d
PLL2_DCIR_PLL_RESET_OVERRIDE	drivers/video/tegra124/sor.h	/^#define PLL2_DCIR_PLL_RESET_OVERRIDE	/;"	d
PLL2_DCIR_PLL_RESET_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL2_DCIR_PLL_RESET_SHIFT	/;"	d
PLL2_DIV1	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_DIV1:$/;"	l
PLL2_DIV2	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_DIV2:$/;"	l
PLL2_DIV_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_DIV_MASK:$/;"	l
PLL2_FREQ_V	board/spear/common/spr_lowlevel_init.S	/^PLL2_FREQ_V:$/;"	l
PLL2_MAIN_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL2_MAIN_FREQ	/;"	d
PLL2_PFD1_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL2_PFD1_FREQ	/;"	d
PLL2_PFD2_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL2_PFD2_FREQ	/;"	d
PLL2_PFD3_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL2_PFD3_FREQ	/;"	d
PLL2_PFD4_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL2_PFD4_FREQ	/;"	d
PLL2_PLLCMD	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_PLLCMD:$/;"	l
PLL2_PLLM	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_PLLM:$/;"	l
PLL2_PLLSTAT	arch/arm/mach-davinci/lowlevel_init.S	/^PLL2_PLLSTAT:$/;"	l
PLL3	drivers/video/tegra124/sor.h	/^#define PLL3	/;"	d
PLL3_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PLL3_BASE_ADDR	/;"	d
PLL3_CLOCK	arch/arm/cpu/armv7/mx5/clock.c	/^	PLL3_CLOCK,$/;"	e	enum:pll_clocks	file:
PLL3_MAIN_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL3_MAIN_FREQ	/;"	d
PLL3_PFD3_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL3_PFD3_FREQ	/;"	d
PLL3_PLLVDD_MODE_MASK	drivers/video/tegra124/sor.h	/^#define PLL3_PLLVDD_MODE_MASK	/;"	d
PLL3_PLLVDD_MODE_SHIFT	drivers/video/tegra124/sor.h	/^#define PLL3_PLLVDD_MODE_SHIFT	/;"	d
PLL3_PLLVDD_MODE_V1_8	drivers/video/tegra124/sor.h	/^#define PLL3_PLLVDD_MODE_V1_8	/;"	d
PLL3_PLLVDD_MODE_V3_3	drivers/video/tegra124/sor.h	/^#define PLL3_PLLVDD_MODE_V3_3	/;"	d
PLL4_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PLL4_BASE_ADDR	/;"	d
PLL4_CLOCK	arch/arm/cpu/armv7/mx5/clock.c	/^	PLL4_CLOCK,$/;"	e	enum:pll_clocks	file:
PLL5_MAIN_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define PLL5_MAIN_FREQ	/;"	d
PLL6_CFG_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define PLL6_CFG_DEFAULT	/;"	d
PLL6_CFG_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define PLL6_CFG_DEFAULT	/;"	d
PLL6_CFG_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define PLL6_CFG_DEFAULT	/;"	d
PLL6_CFG_DEFAULT	arch/arm/include/asm/arch/clock_sun4i.h	/^#define PLL6_CFG_DEFAULT	/;"	d
PLL6_CFG_DEFAULT	arch/arm/include/asm/arch/clock_sun6i.h	/^#define PLL6_CFG_DEFAULT	/;"	d
PLL6_CFG_DEFAULT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define PLL6_CFG_DEFAULT	/;"	d
PLL8_CFG_DEFAULT	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define PLL8_CFG_DEFAULT	/;"	d
PLL8_CFG_DEFAULT	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define PLL8_CFG_DEFAULT	/;"	d
PLLBP	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define PLLBP	/;"	d
PLLC	drivers/usb/host/r8a66597.h	/^#define	PLLC	/;"	d
PLLCLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCLK	include/dt-bindings/clock/microchip,clock.h	/^#define PLLCLK	/;"	d
PLLCMD_GOSET	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCMD_GOSET	/;"	d
PLLCMD_GOSET_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCMD_GOSET_MASK	/;"	d
PLLCMD_GOSET_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCMD_GOSET_SHIFT	/;"	d
PLLCMD_GOSTAT	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCMD_GOSTAT	/;"	d
PLLCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PLLCR /;"	d
PLLCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PLLCR /;"	d
PLLCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PLLCR /;"	d
PLLCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PLLCR	/;"	d
PLLCR_A	board/renesas/MigoR/lowlevel_init.S	/^PLLCR_A:	.long	PLLCR$/;"	l
PLLCR_A	board/renesas/ecovec/lowlevel_init.S	/^PLLCR_A:	.long	PLLCR$/;"	l
PLLCR_D	board/renesas/MigoR/lowlevel_init.S	/^PLLCR_D:	.long	0x00005000$/;"	l
PLLCR_D	board/renesas/ecovec/lowlevel_init.S	/^PLLCR_D:	.long	0x00004000$/;"	l
PLLCTL_CLOCK_MODE_SHIFT	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_CLOCK_MODE_SHIFT	/;"	d
PLLCTL_EXTCLKSRC	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_EXTCLKSRC	/;"	d
PLLCTL_PLLDIS	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_PLLDIS	/;"	d
PLLCTL_PLLEN	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_PLLEN	/;"	d
PLLCTL_PLLENSRC	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_PLLENSRC	/;"	d
PLLCTL_PLLENSRC_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLENSRC_MASK	/;"	d
PLLCTL_PLLENSRC_SHIF	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLENSRC_SHIF	/;"	d
PLLCTL_PLLEN_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLEN_MASK	/;"	d
PLLCTL_PLLEN_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLEN_SHIFT	/;"	d
PLLCTL_PLLPWRDN	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_PLLPWRDN	/;"	d
PLLCTL_PLLPWRDN_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLPWRDN_MASK	/;"	d
PLLCTL_PLLPWRDN_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLPWRDN_SHIFT	/;"	d
PLLCTL_PLLRST	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_PLLRST	/;"	d
PLLCTL_PLLRST_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLRST_MASK	/;"	d
PLLCTL_PLLRST_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLCTL_PLLRST_SHIFT	/;"	d
PLLCTL_RES_9	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLCTL_RES_9	/;"	d
PLLCTRL_BPFORCE_MASK	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_BPFORCE_MASK	/;"	d	file:
PLLCTRL_FBDIV_MASK	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_FBDIV_MASK	/;"	d	file:
PLLCTRL_FBDIV_SHIFT	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_FBDIV_SHIFT	/;"	d	file:
PLLCTRL_PWRDWN_MASK	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_PWRDWN_MASK	/;"	d	file:
PLLCTRL_PWRDWN_SHIFT	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_PWRDWN_SHIFT	/;"	d	file:
PLLCTRL_RESET_MASK	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_RESET_MASK	/;"	d	file:
PLLCTRL_RESET_SHIFT	arch/arm/mach-zynq/clk.c	/^#define PLLCTRL_RESET_SHIFT	/;"	d	file:
PLLC_BPDIV	arch/arm/mach-davinci/cpu.c	/^#define PLLC_BPDIV	/;"	d	file:
PLLC_ENG_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLC_ENG_MASK	/;"	d
PLLC_ENG_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLC_ENG_MASK	/;"	d
PLLC_ENG_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLC_ENG_MASK	/;"	d
PLLC_ENG_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLC_ENG_MASK	/;"	d
PLLC_ENG_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLC_ENG_MASK	/;"	d
PLLC_IDDQ	arch/arm/include/asm/arch-tegra114/clock.h	/^#define PLLC_IDDQ	/;"	d
PLLC_IDDQ	arch/arm/include/asm/arch-tegra124/clock.h	/^#define PLLC_IDDQ	/;"	d
PLLC_IDDQ	arch/arm/include/asm/arch-tegra210/clock.h	/^#define PLLC_IDDQ	/;"	d
PLLC_PLLCTL	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLCTL	/;"	d	file:
PLLC_PLLDIV1	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV1	/;"	d	file:
PLLC_PLLDIV2	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV2	/;"	d	file:
PLLC_PLLDIV3	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV3	/;"	d	file:
PLLC_PLLDIV4	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV4	/;"	d	file:
PLLC_PLLDIV5	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV5	/;"	d	file:
PLLC_PLLDIV6	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV6	/;"	d	file:
PLLC_PLLDIV7	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV7	/;"	d	file:
PLLC_PLLDIV8	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV8	/;"	d	file:
PLLC_PLLDIV9	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLDIV9	/;"	d	file:
PLLC_PLLM	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PLLM	/;"	d	file:
PLLC_POSTDIV	arch/arm/mach-davinci/cpu.c	/^#define PLLC_POSTDIV	/;"	d	file:
PLLC_PREDIV	arch/arm/mach-davinci/cpu.c	/^#define PLLC_PREDIV	/;"	d	file:
PLLC_RESET	arch/arm/include/asm/arch-tegra210/clock.h	/^#define PLLC_RESET	/;"	d
PLLC_SRC_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PLLC_SRC_MASK	/;"	d
PLLC_SRC_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLC_SRC_MASK	/;"	d
PLLC_SRC_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLC_SRC_MASK	/;"	d
PLLC_SRC_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLC_SRC_MASK	/;"	d
PLLC_SRC_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLC_SRC_MASK	/;"	d
PLLC_SRC_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLC_SRC_MASK	/;"	d
PLLDIG_PLLCAL1	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLCAL1(/;"	d
PLLDIG_PLLCAL1_NDAC1_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLCAL1_NDAC1_MASK	/;"	d
PLLDIG_PLLCAL1_NDAC1_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLCAL1_NDAC1_OFFSET	/;"	d
PLLDIG_PLLCAL1_NDAC1_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLCAL1_NDAC1_SET(/;"	d
PLLDIG_PLLDV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV(/;"	d
PLLDIG_PLLDV_MFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_MFD(/;"	d
PLLDIG_PLLDV_MFD_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_MFD_MASK	/;"	d
PLLDIG_PLLDV_PREDIV_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_PREDIV_MASK	/;"	d
PLLDIG_PLLDV_PREDIV_MAXVALUE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_PREDIV_MAXVALUE	/;"	d
PLLDIG_PLLDV_PREDIV_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_PREDIV_OFFSET	/;"	d
PLLDIG_PLLDV_PREDIV_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_PREDIV_SET(/;"	d
PLLDIG_PLLDV_RFDPHI1_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI1_MASK	/;"	d
PLLDIG_PLLDV_RFDPHI1_MAXVALUE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI1_MAXVALUE	/;"	d
PLLDIG_PLLDV_RFDPHI1_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI1_OFFSET	/;"	d
PLLDIG_PLLDV_RFDPHI1_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI1_SET(/;"	d
PLLDIG_PLLDV_RFDPHI_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI_MASK	/;"	d
PLLDIG_PLLDV_RFDPHI_MAXVALUE	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI_MAXVALUE	/;"	d
PLLDIG_PLLDV_RFDPHI_OFFSET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI_OFFSET	/;"	d
PLLDIG_PLLDV_RFDPHI_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLDV_RFDPHI_SET(/;"	d
PLLDIG_PLLFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLFD(/;"	d
PLLDIG_PLLFD_MFN_MASK	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLFD_MFN_MASK	/;"	d
PLLDIG_PLLFD_MFN_SET	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLFD_MFN_SET(/;"	d
PLLDIG_PLLFD_SMDEN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLLDIG_PLLFD_SMDEN	/;"	d
PLLDIV_ENABLE_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLDIV_ENABLE_MASK	/;"	d
PLLDIV_ENABLE_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLDIV_ENABLE_SHIFT	/;"	d
PLLDIV_MAX	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLDIV_MAX	/;"	d
PLLDIV_RATIO_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLDIV_RATIO_MASK	/;"	d
PLLDIV_RATIO_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLDIV_RATIO_SHIFT	/;"	d
PLLDO_CTRL_TRIM_1_4V	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PLLDO_CTRL_TRIM_1_4V	/;"	d	file:
PLLDO_EN_BUF_CUR	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PLLDO_EN_BUF_CUR	/;"	d	file:
PLLDO_EN_LDO_STABLE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PLLDO_EN_LDO_STABLE	/;"	d	file:
PLLDO_EN_LP	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PLLDO_EN_LP	/;"	d	file:
PLLDP_SS_CFG_CLAMP	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLDP_SS_CFG_CLAMP	/;"	d
PLLDP_SS_CFG_DITHER	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLDP_SS_CFG_DITHER	/;"	d
PLLDP_SS_CFG_UNDOCUMENTED	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLDP_SS_CFG_UNDOCUMENTED	/;"	d
PLLD_CLKENABLE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLD_CLKENABLE	/;"	d
PLLD_ENABLE_CLK	arch/arm/include/asm/arch-tegra210/clock.h	/^#define PLLD_ENABLE_CLK	/;"	d
PLLD_EN_LCKDET	arch/arm/include/asm/arch-tegra210/clock.h	/^#define PLLD_EN_LCKDET	/;"	d
PLLD_FBDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PLLD_FBDV_MASK	/;"	d
PLLD_FBDV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLD_FBDV_MASK	/;"	d
PLLD_FBDV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLD_FBDV_MASK	/;"	d
PLLD_FBDV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLD_FBDV_MASK	/;"	d
PLLD_FBDV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLD_FBDV_MASK	/;"	d
PLLD_FBDV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLD_FBDV_MASK	/;"	d
PLLD_FWDVA_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PLLD_FWDVA_MASK	/;"	d
PLLD_FWDVA_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLD_FWDVA_MASK	/;"	d
PLLD_FWDVA_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLD_FWDVA_MASK	/;"	d
PLLD_FWDVA_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLD_FWDVA_MASK	/;"	d
PLLD_FWDVA_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLD_FWDVA_MASK	/;"	d
PLLD_FWDVA_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLD_FWDVA_MASK	/;"	d
PLLD_FWDVB_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PLLD_FWDVB_MASK	/;"	d
PLLD_FWDVB_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLD_FWDVB_MASK	/;"	d
PLLD_FWDVB_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLD_FWDVB_MASK	/;"	d
PLLD_FWDVB_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLD_FWDVB_MASK	/;"	d
PLLD_FWDVB_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLD_FWDVB_MASK	/;"	d
PLLD_FWDVB_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLD_FWDVB_MASK	/;"	d
PLLD_LFBDV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLD_LFBDV_MASK	/;"	d
PLLD_LFBDV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLD_LFBDV_MASK	/;"	d
PLLD_LFBDV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLD_LFBDV_MASK	/;"	d
PLLD_LFBDV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLD_LFBDV_MASK	/;"	d
PLLD_LFBDV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLD_LFBDV_MASK	/;"	d
PLLECR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define PLLECR	/;"	d
PLLEN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define PLLEN	/;"	d
PLLE_AUX	arch/arm/mach-tegra/tegra124/clock.c	/^#define PLLE_AUX /;"	d	file:
PLLE_AUX	arch/arm/mach-tegra/tegra210/clock.c	/^#define PLLE_AUX /;"	d	file:
PLLE_AUX_ENABLE_SWCTL	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_AUX_ENABLE_SWCTL /;"	d	file:
PLLE_AUX_ENABLE_SWCTL	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_AUX_ENABLE_SWCTL /;"	d	file:
PLLE_AUX_REF_SEL_PLLREFE	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_AUX_REF_SEL_PLLREFE /;"	d	file:
PLLE_AUX_SEQ_ENABLE	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_AUX_SEQ_ENABLE /;"	d	file:
PLLE_AUX_SEQ_ENABLE	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_AUX_SEQ_ENABLE /;"	d	file:
PLLE_AUX_SS_SEQ_INCLUDE	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_AUX_SS_SEQ_INCLUDE /;"	d	file:
PLLE_AUX_SS_SWCTL	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_AUX_SS_SWCTL /;"	d	file:
PLLE_AUX_USE_LOCKDET	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_AUX_USE_LOCKDET /;"	d	file:
PLLE_BASE	arch/arm/mach-tegra/tegra124/clock.c	/^#define PLLE_BASE /;"	d	file:
PLLE_BASE	arch/arm/mach-tegra/tegra20/clock.c	/^#define PLLE_BASE /;"	d	file:
PLLE_BASE	arch/arm/mach-tegra/tegra210/clock.c	/^#define PLLE_BASE /;"	d	file:
PLLE_BASE	arch/arm/mach-tegra/tegra30/clock.c	/^#define PLLE_BASE /;"	d	file:
PLLE_BASE_ENABLE	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_BASE_ENABLE /;"	d	file:
PLLE_BASE_ENABLE	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_BASE_ENABLE /;"	d	file:
PLLE_BASE_ENABLE	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_BASE_ENABLE /;"	d	file:
PLLE_BASE_ENABLE	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_BASE_ENABLE /;"	d	file:
PLLE_BASE_ENABLE_CML	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_BASE_ENABLE_CML /;"	d	file:
PLLE_BASE_ENABLE_CML	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_BASE_ENABLE_CML /;"	d	file:
PLLE_BASE_LOCK_OVERRIDE	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_BASE_LOCK_OVERRIDE /;"	d	file:
PLLE_BASE_MDIV	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_BASE_MDIV(/;"	d	file:
PLLE_BASE_MDIV	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_BASE_MDIV(/;"	d	file:
PLLE_BASE_MDIV	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_BASE_MDIV(/;"	d	file:
PLLE_BASE_MDIV	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_BASE_MDIV(/;"	d	file:
PLLE_BASE_NDIV	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_BASE_NDIV(/;"	d	file:
PLLE_BASE_NDIV	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_BASE_NDIV(/;"	d	file:
PLLE_BASE_NDIV	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_BASE_NDIV(/;"	d	file:
PLLE_BASE_NDIV	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_BASE_NDIV(/;"	d	file:
PLLE_BASE_PLDIV	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_BASE_PLDIV(/;"	d	file:
PLLE_BASE_PLDIV	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_BASE_PLDIV(/;"	d	file:
PLLE_BASE_PLDIV_CML	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_BASE_PLDIV_CML(/;"	d	file:
PLLE_BASE_PLDIV_CML	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_BASE_PLDIV_CML(/;"	d	file:
PLLE_BASE_PLDIV_CML	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_BASE_PLDIV_CML(/;"	d	file:
PLLE_BASE_PLDIV_CML	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_BASE_PLDIV_CML(/;"	d	file:
PLLE_MISC	arch/arm/mach-tegra/tegra124/clock.c	/^#define PLLE_MISC /;"	d	file:
PLLE_MISC	arch/arm/mach-tegra/tegra20/clock.c	/^#define PLLE_MISC /;"	d	file:
PLLE_MISC	arch/arm/mach-tegra/tegra210/clock.c	/^#define PLLE_MISC /;"	d	file:
PLLE_MISC	arch/arm/mach-tegra/tegra30/clock.c	/^#define PLLE_MISC /;"	d	file:
PLLE_MISC_IDDQ_OVERRIDE	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_MISC_IDDQ_OVERRIDE /;"	d	file:
PLLE_MISC_IDDQ_OVERRIDE_VALUE	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_MISC_IDDQ_OVERRIDE_VALUE /;"	d	file:
PLLE_MISC_IDDQ_SWCTL	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_MISC_IDDQ_SWCTL /;"	d	file:
PLLE_MISC_IDDQ_SWCTL	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_MISC_IDDQ_SWCTL /;"	d	file:
PLLE_MISC_KCP	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_MISC_KCP(/;"	d	file:
PLLE_MISC_KVCO	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_MISC_KVCO /;"	d	file:
PLLE_MISC_LOCK	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_MISC_LOCK /;"	d	file:
PLLE_MISC_LOCK	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_MISC_LOCK /;"	d	file:
PLLE_MISC_LOCK	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_MISC_LOCK /;"	d	file:
PLLE_MISC_LOCK_ENABLE	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_MISC_LOCK_ENABLE /;"	d	file:
PLLE_MISC_LOCK_ENABLE	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_MISC_LOCK_ENABLE /;"	d	file:
PLLE_MISC_LOCK_ENABLE	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_MISC_LOCK_ENABLE /;"	d	file:
PLLE_MISC_PLL_READY	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_MISC_PLL_READY /;"	d	file:
PLLE_MISC_PLL_READY	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_MISC_PLL_READY /;"	d	file:
PLLE_MISC_PTS	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_MISC_PTS /;"	d	file:
PLLE_MISC_SETUP_BASE	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_MISC_SETUP_BASE(/;"	d	file:
PLLE_MISC_SETUP_BASE	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_MISC_SETUP_BASE(/;"	d	file:
PLLE_MISC_SETUP_EXT	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_MISC_SETUP_EXT(/;"	d	file:
PLLE_MISC_SETUP_EXT	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_MISC_SETUP_EXT(/;"	d	file:
PLLE_MISC_VREG_BG_CTRL	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_MISC_VREG_BG_CTRL(/;"	d	file:
PLLE_MISC_VREG_CTRL	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_MISC_VREG_CTRL(/;"	d	file:
PLLE_MISC_VREG_CTRL	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_MISC_VREG_CTRL(/;"	d	file:
PLLE_POST_RESETB_ADDR	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLLE_POST_RESETB_ADDR	/;"	d	file:
PLLE_POST_RESETB_ADDR	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLLE_POST_RESETB_ADDR	/;"	d	file:
PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK	/;"	d	file:
PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK	/;"	d	file:
PLLE_PTS	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_PTS /;"	d	file:
PLLE_RESETB_ADDR	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLLE_RESETB_ADDR	/;"	d	file:
PLLE_RESETB_ADDR	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLLE_RESETB_ADDR	/;"	d	file:
PLLE_RESETB_I_PLL_RESETB_PLLE_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLLE_RESETB_I_PLL_RESETB_PLLE_MASK	/;"	d	file:
PLLE_RESETB_I_PLL_RESETB_PLLE_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLLE_RESETB_I_PLL_RESETB_PLLE_MASK	/;"	d	file:
PLLE_SS_CNTL	arch/arm/mach-tegra/tegra124/clock.c	/^#define PLLE_SS_CNTL /;"	d	file:
PLLE_SS_CNTL	arch/arm/mach-tegra/tegra20/clock.c	/^#define PLLE_SS_CNTL /;"	d	file:
PLLE_SS_CNTL	arch/arm/mach-tegra/tegra210/clock.c	/^#define PLLE_SS_CNTL /;"	d	file:
PLLE_SS_CNTL	arch/arm/mach-tegra/tegra30/clock.c	/^#define PLLE_SS_CNTL /;"	d	file:
PLLE_SS_CNTL_BYPASS_SS	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_BYPASS_SS /;"	d	file:
PLLE_SS_CNTL_BYPASS_SS	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_SS_CNTL_BYPASS_SS /;"	d	file:
PLLE_SS_CNTL_BYPASS_SS	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_BYPASS_SS /;"	d	file:
PLLE_SS_CNTL_BYPASS_SS	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_SS_CNTL_BYPASS_SS /;"	d	file:
PLLE_SS_CNTL_INTERP_RESET	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_INTERP_RESET /;"	d	file:
PLLE_SS_CNTL_INTERP_RESET	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_SS_CNTL_INTERP_RESET /;"	d	file:
PLLE_SS_CNTL_INTERP_RESET	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_INTERP_RESET /;"	d	file:
PLLE_SS_CNTL_INTERP_RESET	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_SS_CNTL_INTERP_RESET /;"	d	file:
PLLE_SS_CNTL_SSCBYP	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_SSCBYP /;"	d	file:
PLLE_SS_CNTL_SSCBYP	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_SS_CNTL_SSCBYP /;"	d	file:
PLLE_SS_CNTL_SSCBYP	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_SSCBYP /;"	d	file:
PLLE_SS_CNTL_SSCBYP	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_SS_CNTL_SSCBYP /;"	d	file:
PLLE_SS_CNTL_SSCCENTER	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_SSCCENTER /;"	d	file:
PLLE_SS_CNTL_SSCCENTER	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_SSCCENTER /;"	d	file:
PLLE_SS_CNTL_SSCINC	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_SSCINC(/;"	d	file:
PLLE_SS_CNTL_SSCINC	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_SS_CNTL_SSCINC(/;"	d	file:
PLLE_SS_CNTL_SSCINC	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_SSCINC(/;"	d	file:
PLLE_SS_CNTL_SSCINC	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_SS_CNTL_SSCINC(/;"	d	file:
PLLE_SS_CNTL_SSCINCINTR	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_SSCINCINTR(/;"	d	file:
PLLE_SS_CNTL_SSCINCINTR	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_SSCINCINTR(/;"	d	file:
PLLE_SS_CNTL_SSCINCINTRV	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_SS_CNTL_SSCINCINTRV(/;"	d	file:
PLLE_SS_CNTL_SSCINCINTRV	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_SS_CNTL_SSCINCINTRV(/;"	d	file:
PLLE_SS_CNTL_SSCINVERT	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_SSCINVERT /;"	d	file:
PLLE_SS_CNTL_SSCINVERT	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_SSCINVERT /;"	d	file:
PLLE_SS_CNTL_SSCMAX	arch/arm/mach-tegra/tegra124/clock.c	/^#define  PLLE_SS_CNTL_SSCMAX(/;"	d	file:
PLLE_SS_CNTL_SSCMAX	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PLLE_SS_CNTL_SSCMAX(/;"	d	file:
PLLE_SS_CNTL_SSCMAX	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLE_SS_CNTL_SSCMAX(/;"	d	file:
PLLE_SS_CNTL_SSCMAX	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PLLE_SS_CNTL_SSCMAX(/;"	d	file:
PLLFREQ_MASK_V	board/spear/common/spr_lowlevel_init.S	/^PLLFREQ_MASK_V:$/;"	l
PLLGS_VAL	arch/arm/mach-keystone/ddr3_spd.c	/^#define PLLGS_VAL	/;"	d	file:
PLLIDIV_MASK	drivers/clk/clk_pic32.c	/^#define PLLIDIV_MASK	/;"	d	file:
PLLLK	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define PLLLK	/;"	d
PLLLKERR	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define PLLLKERR	/;"	d
PLLLOCKDEL	arch/x86/cpu/quark/smc.h	/^#define PLLLOCKDEL	/;"	d
PLLLOCK_VAL	arch/arm/mach-keystone/ddr3_spd.c	/^#define PLLLOCK_VAL	/;"	d	file:
PLLMR0_133_66_66_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_133_66_66_33	/;"	d
PLLMR0_200_100_50_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_200_100_50_33	/;"	d
PLLMR0_200_133_66	include/configs/acadia.h	/^#define PLLMR0_200_133_66$/;"	d
PLLMR0_266_133_66	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_266_133_66	/;"	d
PLLMR0_266_133_66_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_266_133_66_33	/;"	d
PLLMR0_266_66_33_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_266_66_33_33	/;"	d
PLLMR0_333_111_55_111	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_333_111_55_111	/;"	d
PLLMR0_333_111_55_37	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_333_111_55_37	/;"	d
PLLMR0_CPU_DIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_DIV_2	/;"	d
PLLMR0_CPU_DIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_DIV_3	/;"	d
PLLMR0_CPU_DIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_DIV_4	/;"	d
PLLMR0_CPU_DIV_BYPASS	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_DIV_BYPASS	/;"	d
PLLMR0_CPU_DIV_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_DIV_MASK	/;"	d
PLLMR0_CPU_PLB_DIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_PLB_DIV_1	/;"	d
PLLMR0_CPU_PLB_DIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_PLB_DIV_2	/;"	d
PLLMR0_CPU_PLB_DIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_PLB_DIV_3	/;"	d
PLLMR0_CPU_PLB_DIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_PLB_DIV_4	/;"	d
PLLMR0_CPU_TO_PLB_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_CPU_TO_PLB_MASK	/;"	d
PLLMR0_DEFAULT	include/configs/PLU405.h	/^#define PLLMR0_DEFAULT	/;"	d
PLLMR0_DEFAULT	include/configs/PMC405DE.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_DEFAULT	include/configs/VOM405.h	/^#define PLLMR0_DEFAULT	/;"	d
PLLMR0_DEFAULT	include/configs/bubinga.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_DEFAULT	include/configs/dlvision-10g.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_DEFAULT	include/configs/dlvision.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_DEFAULT	include/configs/io.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_DEFAULT	include/configs/iocon.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_DEFAULT	include/configs/neo.h	/^#define PLLMR0_DEFAULT /;"	d
PLLMR0_EXB_PLB_DIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_EXB_PLB_DIV_2	/;"	d
PLLMR0_EXB_PLB_DIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_EXB_PLB_DIV_3	/;"	d
PLLMR0_EXB_PLB_DIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_EXB_PLB_DIV_4	/;"	d
PLLMR0_EXB_PLB_DIV_5	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_EXB_PLB_DIV_5	/;"	d
PLLMR0_EXB_TO_PLB_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_EXB_TO_PLB_MASK	/;"	d
PLLMR0_MAL_PLB_DIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_MAL_PLB_DIV_1	/;"	d
PLLMR0_MAL_PLB_DIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_MAL_PLB_DIV_2	/;"	d
PLLMR0_MAL_PLB_DIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_MAL_PLB_DIV_3	/;"	d
PLLMR0_MAL_PLB_DIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_MAL_PLB_DIV_4	/;"	d
PLLMR0_MAL_TO_PLB_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_MAL_TO_PLB_MASK	/;"	d
PLLMR0_OPB_PLB_DIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_OPB_PLB_DIV_1	/;"	d
PLLMR0_OPB_PLB_DIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_OPB_PLB_DIV_2	/;"	d
PLLMR0_OPB_PLB_DIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_OPB_PLB_DIV_3	/;"	d
PLLMR0_OPB_PLB_DIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_OPB_PLB_DIV_4	/;"	d
PLLMR0_OPB_TO_PLB_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_OPB_TO_PLB_MASK	/;"	d
PLLMR0_PCI_PLB_DIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_PCI_PLB_DIV_1	/;"	d
PLLMR0_PCI_PLB_DIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_PCI_PLB_DIV_2	/;"	d
PLLMR0_PCI_PLB_DIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_PCI_PLB_DIV_3	/;"	d
PLLMR0_PCI_PLB_DIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_PCI_PLB_DIV_4	/;"	d
PLLMR0_PCI_TO_PLB_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR0_PCI_TO_PLB_MASK	/;"	d
PLLMR1_133_66_66_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_133_66_66_33	/;"	d
PLLMR1_200_100_50_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_200_100_50_33	/;"	d
PLLMR1_266_133_66	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_266_133_66	/;"	d
PLLMR1_266_133_66_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_266_133_66_33	/;"	d
PLLMR1_266_66_33_33	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_266_66_33_33	/;"	d
PLLMR1_333_111_55_111	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_333_111_55_111	/;"	d
PLLMR1_333_111_55_37	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_333_111_55_37	/;"	d
PLLMR1_DEFAULT	include/configs/PLU405.h	/^#define PLLMR1_DEFAULT	/;"	d
PLLMR1_DEFAULT	include/configs/PMC405DE.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_DEFAULT	include/configs/VOM405.h	/^#define PLLMR1_DEFAULT	/;"	d
PLLMR1_DEFAULT	include/configs/bubinga.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_DEFAULT	include/configs/dlvision-10g.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_DEFAULT	include/configs/dlvision.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_DEFAULT	include/configs/io.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_DEFAULT	include/configs/iocon.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_DEFAULT	include/configs/neo.h	/^#define PLLMR1_DEFAULT /;"	d
PLLMR1_FBMUL_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_FBMUL_MASK	/;"	d
PLLMR1_FWDVA_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_FWDVA_MASK	/;"	d
PLLMR1_FWDVB_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_FWDVB_MASK	/;"	d
PLLMR1_PLLR_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_PLLR_MASK	/;"	d
PLLMR1_SSCS_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_SSCS_MASK	/;"	d
PLLMR1_TUNING_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLLMR1_TUNING_MASK	/;"	d
PLLMR_CPU_PLB_DIV_1	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_CPU_PLB_DIV_1	/;"	d
PLLMR_CPU_PLB_DIV_2	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_CPU_PLB_DIV_2	/;"	d
PLLMR_CPU_PLB_DIV_3	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_CPU_PLB_DIV_3	/;"	d
PLLMR_CPU_PLB_DIV_4	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_CPU_PLB_DIV_4	/;"	d
PLLMR_CPU_TO_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_CPU_TO_PLB_MASK	/;"	d
PLLMR_EXB_PLB_DIV_2	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_EXB_PLB_DIV_2	/;"	d
PLLMR_EXB_PLB_DIV_3	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_EXB_PLB_DIV_3	/;"	d
PLLMR_EXB_PLB_DIV_4	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_EXB_PLB_DIV_4	/;"	d
PLLMR_EXB_PLB_DIV_5	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_EXB_PLB_DIV_5	/;"	d
PLLMR_EXB_TO_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_EXB_TO_PLB_MASK	/;"	d
PLLMR_FB_DIV_1	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FB_DIV_1	/;"	d
PLLMR_FB_DIV_2	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FB_DIV_2	/;"	d
PLLMR_FB_DIV_3	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FB_DIV_3	/;"	d
PLLMR_FB_DIV_4	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FB_DIV_4	/;"	d
PLLMR_FB_DIV_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FB_DIV_MASK	/;"	d
PLLMR_FWDB_DIV_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FWDB_DIV_MASK	/;"	d
PLLMR_FWD_DIV_3	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FWD_DIV_3	/;"	d
PLLMR_FWD_DIV_4	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FWD_DIV_4	/;"	d
PLLMR_FWD_DIV_6	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FWD_DIV_6	/;"	d
PLLMR_FWD_DIV_BYPASS	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FWD_DIV_BYPASS	/;"	d
PLLMR_FWD_DIV_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_FWD_DIV_MASK	/;"	d
PLLMR_OPB_PLB_DIV_1	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_OPB_PLB_DIV_1	/;"	d
PLLMR_OPB_PLB_DIV_2	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_OPB_PLB_DIV_2	/;"	d
PLLMR_OPB_PLB_DIV_3	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_OPB_PLB_DIV_3	/;"	d
PLLMR_OPB_PLB_DIV_4	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_OPB_PLB_DIV_4	/;"	d
PLLMR_OPB_TO_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_OPB_TO_PLB_MASK	/;"	d
PLLMR_PCI_PLB_DIV_1	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_PCI_PLB_DIV_1	/;"	d
PLLMR_PCI_PLB_DIV_2	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_PCI_PLB_DIV_2	/;"	d
PLLMR_PCI_PLB_DIV_3	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_PCI_PLB_DIV_3	/;"	d
PLLMR_PCI_PLB_DIV_4	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_PCI_PLB_DIV_4	/;"	d
PLLMR_PCI_TO_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_PCI_TO_PLB_MASK	/;"	d
PLLMR_TUNING_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PLLMR_TUNING_MASK	/;"	d
PLLMUL_MASK	drivers/clk/clk_pic32.c	/^#define PLLMUL_MASK	/;"	d	file:
PLLM_MULT_LO_BITS	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLM_MULT_LO_BITS	/;"	d
PLLM_MULT_LO_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLM_MULT_LO_MASK	/;"	d
PLLM_MULT_LO_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLM_MULT_LO_SHIFT	/;"	d
PLLM_OUT1_CLKEN_ENABLE	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define PLLM_OUT1_CLKEN_ENABLE	/;"	d
PLLM_OUT1_RATIO_VAL_8	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define PLLM_OUT1_RATIO_VAL_8	/;"	d
PLLM_OUT1_RSTN_RESET_DISABLE	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define PLLM_OUT1_RSTN_RESET_DISABLE	/;"	d
PLLODIV_MASK	drivers/clk/clk_pic32.c	/^#define PLLODIV_MASK	/;"	d	file:
PLLPD_VAL	arch/arm/mach-keystone/ddr3_spd.c	/^#define PLLPD_VAL	/;"	d	file:
PLLP_OUT1_CLKEN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT1_CLKEN	/;"	d
PLLP_OUT1_OVR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT1_OVR	/;"	d
PLLP_OUT1_RATIO	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT1_RATIO	/;"	d
PLLP_OUT1_RSTN_DIS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT1_RSTN_DIS	/;"	d
PLLP_OUT1_RSTN_EN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT1_RSTN_EN	/;"	d
PLLP_OUT2_CLKEN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT2_CLKEN	/;"	d
PLLP_OUT2_OVR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT2_OVR	/;"	d
PLLP_OUT2_RATIO	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT2_RATIO	/;"	d
PLLP_OUT2_RSTN_DIS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT2_RSTN_DIS	/;"	d
PLLP_OUT2_RSTN_EN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT2_RSTN_EN	/;"	d
PLLP_OUT3_CLKEN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT3_CLKEN	/;"	d
PLLP_OUT3_OVR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT3_OVR	/;"	d
PLLP_OUT3_RATIO	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT3_RATIO	/;"	d
PLLP_OUT3_RSTN_DIS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT3_RSTN_DIS	/;"	d
PLLP_OUT3_RSTN_EN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT3_RSTN_EN	/;"	d
PLLP_OUT4_CLKEN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT4_CLKEN	/;"	d
PLLP_OUT4_OVR	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT4_OVR	/;"	d
PLLP_OUT4_RATIO	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT4_RATIO	/;"	d
PLLP_OUT4_RSTN_DIS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT4_RSTN_DIS	/;"	d
PLLP_OUT4_RSTN_EN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLP_OUT4_RSTN_EN	/;"	d
PLLREFE_BASE	arch/arm/mach-tegra/tegra210/clock.c	/^#define PLLREFE_BASE	/;"	d	file:
PLLREFE_BASE_BYPASS	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_BYPASS	/;"	d	file:
PLLREFE_BASE_DIVM	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_DIVM(/;"	d	file:
PLLREFE_BASE_DIVN	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_DIVN(/;"	d	file:
PLLREFE_BASE_DIVP	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_DIVP(/;"	d	file:
PLLREFE_BASE_ENABLE	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_ENABLE	/;"	d	file:
PLLREFE_BASE_KCP	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_KCP(/;"	d	file:
PLLREFE_BASE_KVCO	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_KVCO	/;"	d	file:
PLLREFE_BASE_REF_DIS	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_BASE_REF_DIS	/;"	d	file:
PLLREFE_MISC	arch/arm/mach-tegra/tegra210/clock.c	/^#define PLLREFE_MISC	/;"	d	file:
PLLREFE_MISC_IDDQ	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_MISC_IDDQ	/;"	d	file:
PLLREFE_MISC_LOCK	arch/arm/mach-tegra/tegra210/clock.c	/^#define  PLLREFE_MISC_LOCK	/;"	d	file:
PLLREFSEL	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PLLREFSEL	/;"	d	file:
PLLRST_VAL	arch/arm/mach-keystone/ddr3_spd.c	/^#define PLLRST_VAL	/;"	d	file:
PLLSECCTL_STOPMODE	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLSECCTL_STOPMODE	/;"	d
PLLSECCTL_TENABLE	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLSECCTL_TENABLE	/;"	d
PLLSECCTL_TENABLEDIV	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLSECCTL_TENABLEDIV	/;"	d
PLLSECCTL_TINITZ	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLLSECCTL_TINITZ	/;"	d
PLLSET_CMD_LIST	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define PLLSET_CMD_LIST	/;"	d
PLLSET_CMD_LIST	arch/arm/mach-keystone/include/mach/clock-k2g.h	/^#define PLLSET_CMD_LIST	/;"	d
PLLSET_CMD_LIST	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define PLLSET_CMD_LIST	/;"	d
PLLSET_CMD_LIST	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define PLLSET_CMD_LIST	/;"	d
PLLSTAT_GOSTAT_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLSTAT_GOSTAT_MASK	/;"	d
PLLSTAT_GOSTAT_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define PLLSTAT_GOSTAT_SHIFT	/;"	d
PLLSYS0_BYPASS_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_BYPASS_MASK	/;"	d
PLLSYS0_ENG_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_ENG_MASK	/;"	d
PLLSYS0_ENG_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_ENG_MASK	/;"	d
PLLSYS0_ENG_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_ENG_MASK	/;"	d
PLLSYS0_ENG_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_ENG_MASK	/;"	d
PLLSYS0_ENG_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_ENG_MASK	/;"	d
PLLSYS0_EPB_DIV_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_EPB_DIV_MASK	/;"	d
PLLSYS0_EXTSL_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_EXTSL_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FB_DIV_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_FB_DIV_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_A_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_FWD_DIV_A_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_FWD_DIV_B_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_FWD_DIV_B_MASK	/;"	d
PLLSYS0_NTO1_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_NTO1_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_OPB_DIV_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_OPB_DIV_MASK	/;"	d
PLLSYS0_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_PERCLK_DIV_MASK /;"	d
PLLSYS0_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_PERCLK_DIV_MASK /;"	d
PLLSYS0_PLBEDV0_DIV_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_PLBEDV0_DIV_MASK /;"	d
PLLSYS0_PLBEDV0_DIV_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_PLBEDV0_DIV_MASK /;"	d
PLLSYS0_PRI_DIV_B_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_PRI_DIV_B_MASK	/;"	d
PLLSYS0_PRI_DIV_B_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_PRI_DIV_B_MASK	/;"	d
PLLSYS0_PRI_DIV_B_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_PRI_DIV_B_MASK	/;"	d
PLLSYS0_PRI_DIV_B_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_PRI_DIV_B_MASK	/;"	d
PLLSYS0_PRI_DIV_B_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_PRI_DIV_B_MASK	/;"	d
PLLSYS0_RL_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_RL_MASK	/;"	d
PLLSYS0_RW_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_RW_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SEL_MASK	arch/powerpc/include/asm/ppc460sx.h	/^#define PLLSYS0_SEL_MASK	/;"	d
PLLSYS0_SRC_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_SRC_MASK	/;"	d
PLLSYS0_SRC_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_SRC_MASK	/;"	d
PLLSYS0_SRC_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_SRC_MASK	/;"	d
PLLSYS0_SRC_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_SRC_MASK	/;"	d
PLLSYS0_SRC_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_SRC_MASK	/;"	d
PLLSYS0_TUNE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS0_TUNE_MASK	/;"	d
PLLSYS0_TUNE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS0_TUNE_MASK	/;"	d
PLLSYS0_TUNE_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_TUNE_MASK	/;"	d
PLLSYS0_TUNE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS0_TUNE_MASK	/;"	d
PLLSYS0_TUNE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS0_TUNE_MASK	/;"	d
PLLSYS0_TUNE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS0_TUNE_MASK	/;"	d
PLLSYS0_ZMII_SEL_MASK	arch/powerpc/include/asm/ppc440gp.h	/^#define PLLSYS0_ZMII_SEL_MASK	/;"	d
PLLSYS1_EAR_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_EAR_MASK	/;"	d
PLLSYS1_EAR_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_EAR_MASK	/;"	d
PLLSYS1_EAR_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_EAR_MASK	/;"	d
PLLSYS1_EAR_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_EAR_MASK	/;"	d
PLLSYS1_EAR_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_EAR_MASK	/;"	d
PLLSYS1_EPS_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_EPS_MASK	/;"	d
PLLSYS1_EPS_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_EPS_MASK	/;"	d
PLLSYS1_EPS_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_EPS_MASK	/;"	d
PLLSYS1_EPS_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_EPS_MASK	/;"	d
PLLSYS1_EPS_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_EPS_MASK	/;"	d
PLLSYS1_LF_DIV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_LF_DIV_MASK	/;"	d
PLLSYS1_LF_DIV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_LF_DIV_MASK	/;"	d
PLLSYS1_LF_DIV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_LF_DIV_MASK	/;"	d
PLLSYS1_LF_DIV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_LF_DIV_MASK	/;"	d
PLLSYS1_LF_DIV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_LF_DIV_MASK	/;"	d
PLLSYS1_MAL_DIV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_MAL_DIV_MASK	/;"	d
PLLSYS1_MAL_DIV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_MAL_DIV_MASK	/;"	d
PLLSYS1_MAL_DIV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_MAL_DIV_MASK	/;"	d
PLLSYS1_MAL_DIV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_MAL_DIV_MASK	/;"	d
PLLSYS1_MAL_DIV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_MAL_DIV_MASK	/;"	d
PLLSYS1_NTO1_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_NTO1_MASK	/;"	d
PLLSYS1_NTO1_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_NTO1_MASK	/;"	d
PLLSYS1_NTO1_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_NTO1_MASK	/;"	d
PLLSYS1_NTO1_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_NTO1_MASK	/;"	d
PLLSYS1_NTO1_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_NTO1_MASK	/;"	d
PLLSYS1_PAE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PAE_MASK	/;"	d
PLLSYS1_PAE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PAE_MASK	/;"	d
PLLSYS1_PAE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PAE_MASK	/;"	d
PLLSYS1_PAE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PAE_MASK	/;"	d
PLLSYS1_PAE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PAE_MASK	/;"	d
PLLSYS1_PCHE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PCHE_MASK	/;"	d
PLLSYS1_PCHE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PCHE_MASK	/;"	d
PLLSYS1_PCHE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PCHE_MASK	/;"	d
PLLSYS1_PCHE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PCHE_MASK	/;"	d
PLLSYS1_PCHE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PCHE_MASK	/;"	d
PLLSYS1_PCWE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PCWE_MASK	/;"	d
PLLSYS1_PCWE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PCWE_MASK	/;"	d
PLLSYS1_PCWE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PCWE_MASK	/;"	d
PLLSYS1_PCWE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PCWE_MASK	/;"	d
PLLSYS1_PCWE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PCWE_MASK	/;"	d
PLLSYS1_PDM_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PDM_MASK	/;"	d
PLLSYS1_PDM_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PDM_MASK	/;"	d
PLLSYS1_PDM_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PDM_MASK	/;"	d
PLLSYS1_PDM_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PDM_MASK	/;"	d
PLLSYS1_PDM_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PDM_MASK	/;"	d
PLLSYS1_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PERCLK_DIV_MASK /;"	d
PLLSYS1_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PERCLK_DIV_MASK /;"	d
PLLSYS1_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PERCLK_DIV_MASK /;"	d
PLLSYS1_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PERCLK_DIV_MASK /;"	d
PLLSYS1_PERCLK_DIV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PERCLK_DIV_MASK /;"	d
PLLSYS1_PISE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PISE_MASK	/;"	d
PLLSYS1_PISE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PISE_MASK	/;"	d
PLLSYS1_PISE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PISE_MASK	/;"	d
PLLSYS1_PISE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PISE_MASK	/;"	d
PLLSYS1_PISE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PISE_MASK	/;"	d
PLLSYS1_PPIM_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PPIM_MASK	/;"	d
PLLSYS1_PPIM_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PPIM_MASK	/;"	d
PLLSYS1_PPIM_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PPIM_MASK	/;"	d
PLLSYS1_PPIM_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PPIM_MASK	/;"	d
PLLSYS1_PPIM_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PPIM_MASK	/;"	d
PLLSYS1_PR64E_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PR64E_MASK	/;"	d
PLLSYS1_PR64E_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PR64E_MASK	/;"	d
PLLSYS1_PR64E_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PR64E_MASK	/;"	d
PLLSYS1_PR64E_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PR64E_MASK	/;"	d
PLLSYS1_PR64E_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PR64E_MASK	/;"	d
PLLSYS1_PXFS_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_PXFS_MASK	/;"	d
PLLSYS1_PXFS_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_PXFS_MASK	/;"	d
PLLSYS1_PXFS_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_PXFS_MASK	/;"	d
PLLSYS1_PXFS_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_PXFS_MASK	/;"	d
PLLSYS1_PXFS_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_PXFS_MASK	/;"	d
PLLSYS1_RMII_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_RMII_MASK	/;"	d
PLLSYS1_RMII_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_RMII_MASK	/;"	d
PLLSYS1_RMII_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_RMII_MASK	/;"	d
PLLSYS1_RMII_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_RMII_MASK	/;"	d
PLLSYS1_RMII_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_RMII_MASK	/;"	d
PLLSYS1_RSVD_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_RSVD_MASK	/;"	d
PLLSYS1_RSVD_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_RSVD_MASK	/;"	d
PLLSYS1_RSVD_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_RSVD_MASK	/;"	d
PLLSYS1_RSVD_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_RSVD_MASK	/;"	d
PLLSYS1_RSVD_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_RSVD_MASK	/;"	d
PLLSYS1_RW_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_RW_MASK	/;"	d
PLLSYS1_RW_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_RW_MASK	/;"	d
PLLSYS1_RW_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_RW_MASK	/;"	d
PLLSYS1_RW_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_RW_MASK	/;"	d
PLLSYS1_RW_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_RW_MASK	/;"	d
PLLSYS1_TRE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PLLSYS1_TRE_MASK	/;"	d
PLLSYS1_TRE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PLLSYS1_TRE_MASK	/;"	d
PLLSYS1_TRE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PLLSYS1_TRE_MASK	/;"	d
PLLSYS1_TRE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PLLSYS1_TRE_MASK	/;"	d
PLLSYS1_TRE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PLLSYS1_TRE_MASK	/;"	d
PLLTIMEEN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  PLLTIMEEN	/;"	d
PLLU_POWERDOWN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLU_POWERDOWN	/;"	d
PLLX_ENABLED	arch/arm/include/asm/arch-tegra/ap.h	/^#define PLLX_ENABLED	/;"	d
PLLX_ENABLED	arch/arm/mach-tegra/cpu.h	/^#define PLLX_ENABLED	/;"	d
PLLX_IDDQ_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLX_IDDQ_MASK	/;"	d
PLLX_IDDQ_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLLX_IDDQ_SHIFT	/;"	d
PLL_333	board/amcc/makalu/cmd_pll.c	/^	PLL_333,$/;"	e	enum:__anonc3f6b6150103	file:
PLL_4001	board/amcc/makalu/cmd_pll.c	/^	PLL_4001,$/;"	e	enum:__anonc3f6b6150103	file:
PLL_4002	board/amcc/makalu/cmd_pll.c	/^	PLL_4002,$/;"	e	enum:__anonc3f6b6150103	file:
PLL_533	board/amcc/makalu/cmd_pll.c	/^	PLL_533,$/;"	e	enum:__anonc3f6b6150103	file:
PLL_600	board/amcc/makalu/cmd_pll.c	/^	PLL_600,$/;"	e	enum:__anonc3f6b6150103	file:
PLL_666	board/amcc/makalu/cmd_pll.c	/^	PLL_666,	\/* For now, kilauea can't support *\/$/;"	e	enum:__anonc3f6b6150103	file:
PLL_ACTIVE	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_ACTIVE	/;"	d
PLL_ACTIVE_POWERDOWN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_ACTIVE_POWERDOWN	/;"	d
PLL_APLL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLL	include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_APLL	/;"	d
PLL_APLLB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLB	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLB	/;"	d
PLL_APLLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_APLLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_APLLL	/;"	d
PLL_ARM_MAIN_800M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ARM_MAIN_800M_CLK,$/;"	e	enum:clk_root_src
PLL_AUDIO	arch/arm/cpu/armv7/mx6/clock.c	/^	PLL_AUDIO,	\/* AUDIO PLL *\/$/;"	e	enum:pll_clocks	file:
PLL_AUDIO	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_AUDIO,	\/* Audio PLL *\/$/;"	e	enum:pll_clocks
PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_AUDIO_MAIN_CLK,$/;"	e	enum:clk_root_src
PLL_AXI_CLK	arch/arm/include/asm/iproc-common/sysmap.h	/^#define PLL_AXI_CLK	/;"	d
PLL_BASE_OVRRIDE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_BASE_OVRRIDE_MASK	/;"	d
PLL_BRMO	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PLL_BRMO(/;"	d
PLL_BUS	arch/arm/cpu/armv7/mx6/clock.c	/^	PLL_BUS,	\/* System Bus PLL*\/$/;"	e	enum:pll_clocks	file:
PLL_BWADJ_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PLL_BWADJ_MASK		= 0x0fff,$/;"	e	enum:__anon06a678fa0203	file:
PLL_BYPASS	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define PLL_BYPASS(/;"	d	file:
PLL_BYPASS_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_BYPASS_MASK	/;"	d
PLL_BYPASS_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_BYPASS_MASK:$/;"	l
PLL_BYPASS_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_BYPASS_SHIFT	/;"	d
PLL_C0CPUX_STATUS	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define PLL_C0CPUX_STATUS /;"	d
PLL_C0CPUX_STATUS	arch/arm/include/asm/arch/clock_sun9i.h	/^#define PLL_C0CPUX_STATUS /;"	d
PLL_C1CPUX_STATUS	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define PLL_C1CPUX_STATUS /;"	d
PLL_C1CPUX_STATUS	arch/arm/include/asm/arch/clock_sun9i.h	/^#define PLL_C1CPUX_STATUS /;"	d
PLL_CLKSRC_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_CLKSRC_MASK:$/;"	l
PLL_CLK_CONTROL_VAL	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define PLL_CLK_CONTROL_VAL /;"	d	file:
PLL_CLK_CTRL_AHB_DIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CLK_CTRL_AHB_DIV(/;"	d	file:
PLL_CLK_CTRL_CPU_DIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CLK_CTRL_CPU_DIV(/;"	d	file:
PLL_CLK_CTRL_DDR_DIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CLK_CTRL_DDR_DIV(/;"	d	file:
PLL_CLK_CTRL_PLL_BYPASS	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CLK_CTRL_PLL_BYPASS /;"	d	file:
PLL_CLK_CTRL_VAL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CLK_CTRL_VAL /;"	d	file:
PLL_CLOCKS	arch/arm/cpu/armv7/mx5/clock.c	/^	PLL_CLOCKS,$/;"	e	enum:pll_clocks	file:
PLL_CONFIGURATION1	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_CONFIGURATION1 /;"	d	file:
PLL_CONFIGURATION1	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_CONFIGURATION1	/;"	d	file:
PLL_CONFIGURATION2	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_CONFIGURATION2 /;"	d	file:
PLL_CONFIGURATION2	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_CONFIGURATION2	/;"	d	file:
PLL_CONFIGURATION3	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_CONFIGURATION3 /;"	d	file:
PLL_CONFIGURATION3	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_CONFIGURATION3	/;"	d	file:
PLL_CONFIGURATION4	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_CONFIGURATION4 /;"	d	file:
PLL_CONFIGURATION4	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_CONFIGURATION4	/;"	d	file:
PLL_CORE	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_CORE,	\/* Core PLL *\/$/;"	e	enum:pll_clocks
PLL_CPLL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_CPLL	/;"	d
PLL_CPUDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_CPUDIV	/;"	d
PLL_CPUDIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_CPUDIV_1	/;"	d
PLL_CPUDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_CPUDIV_2	/;"	d
PLL_CPUDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_CPUDIV_3	/;"	d
PLL_CPUDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_CPUDIV_4	/;"	d
PLL_CPU_CONFIG_VAL_25M	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define PLL_CPU_CONFIG_VAL_25M /;"	d	file:
PLL_CPU_CONFIG_VAL_40M	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define PLL_CPU_CONFIG_VAL_40M /;"	d	file:
PLL_CPU_CONF_VAL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_CONF_VAL /;"	d	file:
PLL_CPU_DIT_FRAC_MAX	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_DIT_FRAC_MAX(/;"	d	file:
PLL_CPU_DIT_FRAC_MIN	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_DIT_FRAC_MIN(/;"	d	file:
PLL_CPU_DIT_FRAC_STEP	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_DIT_FRAC_STEP(/;"	d	file:
PLL_CPU_DIT_FRAC_VAL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_DIT_FRAC_VAL /;"	d	file:
PLL_CPU_DIT_UPD_CNT	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_DIT_UPD_CNT(/;"	d	file:
PLL_CPU_NFRAC	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_NFRAC(/;"	d	file:
PLL_CPU_NINT	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_NINT(/;"	d	file:
PLL_CPU_OUTDIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_OUTDIV(/;"	d	file:
PLL_CPU_REFDIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_CPU_REFDIV(/;"	d	file:
PLL_CR_FBKDIV	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_FBKDIV(/;"	d
PLL_CR_FBKDIV_BITS	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_FBKDIV_BITS	/;"	d
PLL_CR_FBKDIV_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_FBKDIV_MASK	/;"	d
PLL_CR_LOCEN	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_LOCEN	/;"	d
PLL_CR_LOCIRQ	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_LOCIRQ	/;"	d
PLL_CR_LOCRE	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_LOCRE	/;"	d
PLL_CR_LOLEN	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_LOLEN	/;"	d
PLL_CR_LOLIRQ	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_LOLIRQ	/;"	d
PLL_CR_LOLRE	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_LOLRE	/;"	d
PLL_CR_REFDIV	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_REFDIV(/;"	d
PLL_CR_REFDIV_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_CR_REFDIV_MASK	/;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PLL_CTL /;"	d
PLL_CTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PLL_CTL /;"	d
PLL_DCCON_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_DCCON_MASK	/;"	d
PLL_DCCON_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_DCCON_SHIFT	/;"	d
PLL_DDR	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_DDR,	\/* Dram PLL *\/$/;"	e	enum:pll_clocks
PLL_DDR_CONF_VAL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_CONF_VAL /;"	d	file:
PLL_DDR_DIT_FRAC_MAX	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_DIT_FRAC_MAX(/;"	d	file:
PLL_DDR_DIT_FRAC_MIN	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_DIT_FRAC_MIN(/;"	d	file:
PLL_DDR_DIT_FRAC_STEP	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_DIT_FRAC_STEP(/;"	d	file:
PLL_DDR_DIT_FRAC_VAL	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_DIT_FRAC_VAL /;"	d	file:
PLL_DDR_DIT_UPD_CNT	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_DIT_UPD_CNT(/;"	d	file:
PLL_DDR_NFRAC	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_NFRAC(/;"	d	file:
PLL_DDR_NINT	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_NINT(/;"	d	file:
PLL_DDR_OUTDIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_OUTDIV(/;"	d	file:
PLL_DDR_REFDIV	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define PLL_DDR_REFDIV(/;"	d	file:
PLL_DDR_STATUS	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define PLL_DDR_STATUS /;"	d
PLL_DDR_STATUS	arch/arm/include/asm/arch/clock_sun9i.h	/^#define PLL_DDR_STATUS /;"	d
PLL_DEBUG	board/amcc/makalu/cmd_pll.c	/^#define PLL_DEBUG	/;"	d	file:
PLL_DEBUG	board/amcc/makalu/cmd_pll.c	/^#define PLL_DEBUG$/;"	d	file:
PLL_DISABLE_ENABLE_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_DISABLE_ENABLE_MASK:$/;"	l
PLL_DIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PLL_DIV /;"	d
PLL_DIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PLL_DIV /;"	d
PLL_DIVEN	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_DIVEN	/;"	d
PLL_DIVISORS	drivers/clk/rockchip/clk_rk3036.c	/^#define PLL_DIVISORS(/;"	d	file:
PLL_DIVISORS	drivers/clk/rockchip/clk_rk3288.c	/^#define PLL_DIVISORS(/;"	d	file:
PLL_DIVISORS	drivers/clk/rockchip/clk_rk3399.c	/^#define PLL_DIVISORS(/;"	d	file:
PLL_DIV_1024	arch/arm/mach-exynos/clock.c	/^#define PLL_DIV_1024	/;"	d	file:
PLL_DIV_65535	arch/arm/mach-exynos/clock.c	/^#define PLL_DIV_65535	/;"	d	file:
PLL_DIV_65536	arch/arm/mach-exynos/clock.c	/^#define PLL_DIV_65536	/;"	d	file:
PLL_DIV_MAX	drivers/clk/rockchip/clk_rk3399.c	/^#define PLL_DIV_MAX	/;"	d	file:
PLL_DIV_MIN	drivers/clk/rockchip/clk_rk3399.c	/^#define PLL_DIV_MIN	/;"	d	file:
PLL_DPLL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DPLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_DPLL	/;"	d
PLL_DRAM_MAIN_1066M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_DRAM_MAIN_1066M_CLK,$/;"	e	enum:clk_root_src
PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_DRAM_MAIN_533M_CLK,$/;"	e	enum:clk_root_src
PLL_DR_OUTDIV1	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV1(/;"	d
PLL_DR_OUTDIV1_BITS	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV1_BITS	/;"	d
PLL_DR_OUTDIV1_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV1_MASK	/;"	d
PLL_DR_OUTDIV2	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV2(/;"	d
PLL_DR_OUTDIV2_BITS	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV2_BITS	/;"	d
PLL_DR_OUTDIV2_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV2_MASK	/;"	d
PLL_DR_OUTDIV3	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV3(/;"	d
PLL_DR_OUTDIV3_BITS	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV3_BITS	/;"	d
PLL_DR_OUTDIV3_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV3_MASK	/;"	d
PLL_DR_OUTDIV4	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV4(/;"	d
PLL_DR_OUTDIV4_BITS	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV4_BITS	/;"	d
PLL_DR_OUTDIV4_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV4_MASK	/;"	d
PLL_DR_OUTDIV5	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV5(/;"	d
PLL_DR_OUTDIV5_BITS	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV5_BITS	/;"	d
PLL_DR_OUTDIV5_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_DR_OUTDIV5_MASK	/;"	d
PLL_DSMPD_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_DSMPD_MASK		= 1,$/;"	e	enum:__anon375ccd790103
PLL_DSMPD_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_DSMPD_MASK			= 1 << PLL_DSMPD_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PLL_DSMPD_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_DSMPD_SHIFT		= 12,$/;"	e	enum:__anon375ccd790103
PLL_DSMPD_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_DSMPD_SHIFT			= 3,$/;"	e	enum:__anon06b9221d0103	file:
PLL_ENABLE	board/samsung/odroid/setup.h	/^#define PLL_ENABLE(/;"	d
PLL_ENABLE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_ENABLE_MASK	/;"	d
PLL_ENABLE_POWERDOWN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_ENABLE_POWERDOWN	/;"	d
PLL_ENABLE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_ENABLE_SHIFT	/;"	d
PLL_ENET	arch/arm/cpu/armv7/mx6/clock.c	/^	PLL_ENET,	\/* ENET PLL *\/$/;"	e	enum:pll_clocks	file:
PLL_ENET	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET,	\/* Enet PLL *\/$/;"	e	enum:pll_clocks
PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_100M_CLK,$/;"	e	enum:clk_root_src
PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_125M_CLK,$/;"	e	enum:clk_root_src
PLL_ENET_MAIN_250M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_250M_CLK,$/;"	e	enum:clk_root_src
PLL_ENET_MAIN_25M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_25M_CLK,$/;"	e	enum:clk_root_src
PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_40M_CLK,$/;"	e	enum:clk_root_src
PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_500M_CLK,$/;"	e	enum:clk_root_src
PLL_ENET_MAIN_50M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_ENET_MAIN_50M_CLK,$/;"	e	enum:clk_root_src
PLL_ENSRC_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_ENSRC_MASK:$/;"	l
PLL_EXTBUSDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_EXTBUSDIV	/;"	d
PLL_EXTBUSDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_EXTBUSDIV_2	/;"	d
PLL_EXTBUSDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_EXTBUSDIV_3	/;"	d
PLL_EXTBUSDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_EXTBUSDIV_4	/;"	d
PLL_EXTBUSDIV_5	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_EXTBUSDIV_5	/;"	d
PLL_FAST_RELOCK_BYPASS	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PLL_FAST_RELOCK_BYPASS	/;"	d
PLL_FBDIV	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PLL_FBDIV	/;"	d
PLL_FBDIV_MASK	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PLL_FBDIV_MASK	/;"	d
PLL_FBDIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_FBDIV_MASK		= 0xfff,$/;"	e	enum:__anon375ccd790103
PLL_FBDIV_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_FBDIV_MASK			= 0xfff,$/;"	e	enum:__anon06b9221d0103	file:
PLL_FBDIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_FBDIV_SHIFT		= 0,$/;"	e	enum:__anon375ccd790103
PLL_FBDIV_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_FBDIV_SHIFT			= 0,$/;"	e	enum:__anon06b9221d0103	file:
PLL_FBKDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV	/;"	d
PLL_FBKDIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_1	/;"	d
PLL_FBKDIV_10	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_10	/;"	d
PLL_FBKDIV_11	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_11	/;"	d
PLL_FBKDIV_12	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_12	/;"	d
PLL_FBKDIV_13	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_13	/;"	d
PLL_FBKDIV_14	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_14	/;"	d
PLL_FBKDIV_15	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_15	/;"	d
PLL_FBKDIV_16	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_16	/;"	d
PLL_FBKDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_2	/;"	d
PLL_FBKDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_3	/;"	d
PLL_FBKDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_4	/;"	d
PLL_FBKDIV_5	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_5	/;"	d
PLL_FBKDIV_6	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_6	/;"	d
PLL_FBKDIV_7	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_7	/;"	d
PLL_FBKDIV_8	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_8	/;"	d
PLL_FBKDIV_9	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FBKDIV_9	/;"	d
PLL_FBK_CPU	arch/powerpc/cpu/ppc4xx/speed.c	/^#define PLL_FBK_CPU	/;"	d	file:
PLL_FBK_PERCLK	arch/powerpc/cpu/ppc4xx/speed.c	/^#define PLL_FBK_PERCLK	/;"	d	file:
PLL_FBK_PLL_LOCAL	arch/powerpc/cpu/ppc4xx/speed.c	/^#define PLL_FBK_PLL_LOCAL	/;"	d	file:
PLL_FRACDIV_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_FRACDIV_MASK		= 0xffffff,$/;"	e	enum:__anon06b9221d0103	file:
PLL_FRACDIV_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_FRACDIV_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
PLL_FREQ_COEF	arch/arm/cpu/arm926ejs/mxs/clock.c	/^#define	PLL_FREQ_COEF	/;"	d	file:
PLL_FREQ_KHZ	arch/arm/cpu/arm926ejs/mxs/clock.c	/^#define	PLL_FREQ_KHZ	/;"	d	file:
PLL_FREQ_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define PLL_FREQ_MAX(/;"	d	file:
PLL_FREQ_MHZ	arch/arm/cpu/arm926ejs/mxs/clock.c	/^#define	PLL_FREQ_MHZ	/;"	d	file:
PLL_FREQ_MIN	arch/arm/cpu/armv7/mx5/clock.c	/^#define PLL_FREQ_MIN(/;"	d	file:
PLL_FWDDIVA	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA	/;"	d
PLL_FWDDIVA_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_1	/;"	d
PLL_FWDDIVA_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_2	/;"	d
PLL_FWDDIVA_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_3	/;"	d
PLL_FWDDIVA_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_4	/;"	d
PLL_FWDDIVA_5	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_5	/;"	d
PLL_FWDDIVA_6	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_6	/;"	d
PLL_FWDDIVA_7	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_7	/;"	d
PLL_FWDDIVA_8	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVA_8	/;"	d
PLL_FWDDIVB	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB	/;"	d
PLL_FWDDIVB_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_1	/;"	d
PLL_FWDDIVB_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_2	/;"	d
PLL_FWDDIVB_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_3	/;"	d
PLL_FWDDIVB_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_4	/;"	d
PLL_FWDDIVB_5	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_5	/;"	d
PLL_FWDDIVB_6	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_6	/;"	d
PLL_FWDDIVB_7	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_7	/;"	d
PLL_FWDDIVB_8	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_FWDDIVB_8	/;"	d
PLL_GET_M	board/siemens/pxm2/board.c	/^#define PLL_GET_M(/;"	d	file:
PLL_GET_M	board/siemens/rut/board.c	/^#define PLL_GET_M(/;"	d	file:
PLL_GET_N	board/siemens/pxm2/board.c	/^#define PLL_GET_N(/;"	d	file:
PLL_GET_N	board/siemens/rut/board.c	/^#define PLL_GET_N(/;"	d	file:
PLL_GO	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_GO /;"	d	file:
PLL_GO	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_GO	/;"	d	file:
PLL_GPLL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	include/dt-bindings/clock/rk3036-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_GPLL	/;"	d
PLL_GPLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_GPLL	/;"	d
PLL_IDLE	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_IDLE /;"	d	file:
PLL_IDLE	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_IDLE	/;"	d	file:
PLL_IDLE	include/linux/usb/xhci-omap.h	/^#define	PLL_IDLE	/;"	d
PLL_IDLE_TIME	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_IDLE_TIME /;"	d	file:
PLL_INTEGER_MODE	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_INTEGER_MODE		= 1,$/;"	e	enum:__anon06b9221d0103	file:
PLL_LDOPWDN	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_LDOPWDN /;"	d	file:
PLL_LDOPWDN	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_LDOPWDN	/;"	d	file:
PLL_LOCK	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PLL_LOCK	/;"	d	file:
PLL_LOCK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_LOCK /;"	d	file:
PLL_LOCK	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PLL_LOCK	/;"	d
PLL_LOCK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLL_LOCK	/;"	d
PLL_LOCK	arch/arm/mach-exynos/include/mach/dp.h	/^#define PLL_LOCK	/;"	d
PLL_LOCK	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_LOCK	/;"	d	file:
PLL_LOCK	include/linux/usb/xhci-omap.h	/^#define	PLL_LOCK	/;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PLL_LOCKCNT /;"	d
PLL_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define PLL_LOCKED	/;"	d
PLL_LOCKED	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PLL_LOCKED$/;"	e	enum:pll_status
PLL_LOCKED	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define PLL_LOCKED	/;"	d
PLL_LOCKED_BIT	board/samsung/odroid/setup.h	/^#define PLL_LOCKED_BIT /;"	d
PLL_LOCKTIME	arch/arm/mach-exynos/exynos4_setup.h	/^#define PLL_LOCKTIME	/;"	d
PLL_LOCKTIME	board/samsung/trats/setup.h	/^#define PLL_LOCKTIME	/;"	d
PLL_LOCK_ADDR	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLL_LOCK_ADDR	/;"	d	file:
PLL_LOCK_ADDR	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLL_LOCK_ADDR	/;"	d	file:
PLL_LOCK_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLL_LOCK_CHG	/;"	d
PLL_LOCK_CHG	arch/arm/mach-exynos/include/mach/dp.h	/^#define PLL_LOCK_CHG	/;"	d
PLL_LOCK_COUNT	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_LOCK_COUNT:$/;"	l
PLL_LOCK_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLL_LOCK_CTRL	/;"	d
PLL_LOCK_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define PLL_LOCK_CTRL	/;"	d
PLL_LOCK_DET_FORCE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLL_LOCK_DET_FORCE	/;"	d
PLL_LOCK_DET_MODE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLL_LOCK_DET_MODE	/;"	d
PLL_LOCK_FACTOR	arch/arm/mach-exynos/exynos5_setup.h	/^#define PLL_LOCK_FACTOR	/;"	d
PLL_LOCK_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_LOCK_MASK	/;"	d
PLL_LOCK_PLL_LOCK_PLLE_MASK	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLL_LOCK_PLL_LOCK_PLLE_MASK	/;"	d	file:
PLL_LOCK_PLL_LOCK_PLLE_MASK	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLL_LOCK_PLL_LOCK_PLLE_MASK	/;"	d	file:
PLL_LOCK_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_LOCK_SHIFT	/;"	d
PLL_LOCK_STATUS_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_LOCK_STATUS_MASK	= 1,$/;"	e	enum:__anon375ccd790103
PLL_LOCK_STATUS_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_LOCK_STATUS_MASK		= 1 << PLL_LOCK_STATUS_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PLL_LOCK_STATUS_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_LOCK_STATUS_SHIFT	= 10,$/;"	e	enum:__anon375ccd790103
PLL_LOCK_STATUS_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_LOCK_STATUS_SHIFT		= 31,$/;"	e	enum:__anon06b9221d0103	file:
PLL_LOCK_TIME	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_LOCK_TIME /;"	d	file:
PLL_LOCK_TIMEOUT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLL_LOCK_TIMEOUT /;"	d
PLL_LOCK_TIMEOUT	drivers/phy/marvell/comphy_a3700.h	/^#define PLL_LOCK_TIMEOUT	/;"	d
PLL_LOW_POWER_BYPASS	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PLL_LOW_POWER_BYPASS	/;"	d
PLL_MALDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_MALDIV	/;"	d
PLL_MALDIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_MALDIV_1	/;"	d
PLL_MALDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_MALDIV_2	/;"	d
PLL_MALDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_MALDIV_3	/;"	d
PLL_MALDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_MALDIV_4	/;"	d
PLL_MASTER_LOCK	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_MASTER_LOCK	/;"	d
PLL_MAX_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLL_MAX_FREQ	/;"	d
PLL_MAX_RETRY	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define PLL_MAX_RETRY	/;"	d	file:
PLL_MAX_RETRY	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define PLL_MAX_RETRY	/;"	d	file:
PLL_MFD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PLL_MFD(/;"	d
PLL_MFD	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define PLL_MFD(/;"	d
PLL_MFI	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PLL_MFI(/;"	d
PLL_MFI	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define PLL_MFI(/;"	d
PLL_MFI_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define PLL_MFI_MAX /;"	d	file:
PLL_MFI_MIN	arch/arm/cpu/armv7/mx5/clock.c	/^#define PLL_MFI_MIN /;"	d	file:
PLL_MFN	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PLL_MFN(/;"	d
PLL_MFN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define PLL_MFN(/;"	d
PLL_MIN_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define PLL_MIN_FREQ	/;"	d
PLL_MODE_DEEP	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_MODE_DEEP,$/;"	e	enum:__anon06b9221d0103	file:
PLL_MODE_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_MODE_MASK			= 3 << PLL_MODE_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PLL_MODE_NORM	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_MODE_NORM,$/;"	e	enum:__anon06b9221d0103	file:
PLL_MODE_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_MODE_SHIFT			= 8,$/;"	e	enum:__anon06b9221d0103	file:
PLL_MODE_SLOW	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_MODE_SLOW			= 0,$/;"	e	enum:__anon06b9221d0103	file:
PLL_NAME_MAX	board/amcc/makalu/cmd_pll.c	/^#define PLL_NAME_MAX	/;"	d	file:
PLL_NF_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PLL_NF_MASK		= 0x1fff,$/;"	e	enum:__anon06a678fa0203	file:
PLL_NPLL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	include/dt-bindings/clock/rk3288-cru.h	/^#define PLL_NPLL	/;"	d
PLL_NPLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_NPLL	/;"	d
PLL_OD_MASK	drivers/clk/rockchip/clk_rk3288.c	/^	PLL_OD_MASK		= 0x0f,$/;"	e	enum:__anon06a678fa0203	file:
PLL_OFF	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define PLL_OFF	/;"	d
PLL_OPBDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_OPBDIV	/;"	d
PLL_OPBDIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_OPBDIV_1	/;"	d
PLL_OPBDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_OPBDIV_2	/;"	d
PLL_OPBDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_OPBDIV_3	/;"	d
PLL_OPBDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_OPBDIV_4	/;"	d
PLL_OUT1	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PLL_OUT1,$/;"	e	enum:pll_out_id
PLL_OUT1	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PLL_OUT1,$/;"	e	enum:pll_out_id
PLL_OUT1	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PLL_OUT1,$/;"	e	enum:pll_out_id
PLL_OUT1	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PLL_OUT1,$/;"	e	enum:pll_out_id
PLL_OUT1	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PLL_OUT1,$/;"	e	enum:pll_out_id
PLL_OUT2	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PLL_OUT2,$/;"	e	enum:pll_out_id
PLL_OUT2	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PLL_OUT2,$/;"	e	enum:pll_out_id
PLL_OUT2	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PLL_OUT2,$/;"	e	enum:pll_out_id
PLL_OUT2	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PLL_OUT2,$/;"	e	enum:pll_out_id
PLL_OUT2	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PLL_OUT2,$/;"	e	enum:pll_out_id
PLL_OUT3	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PLL_OUT3,$/;"	e	enum:pll_out_id
PLL_OUT3	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PLL_OUT3,$/;"	e	enum:pll_out_id
PLL_OUT3	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PLL_OUT3,$/;"	e	enum:pll_out_id
PLL_OUT3	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PLL_OUT3,$/;"	e	enum:pll_out_id
PLL_OUT3	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PLL_OUT3,$/;"	e	enum:pll_out_id
PLL_OUT4	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^	PLL_OUT4$/;"	e	enum:pll_out_id
PLL_OUT4	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^	PLL_OUT4$/;"	e	enum:pll_out_id
PLL_OUT4	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^	PLL_OUT4$/;"	e	enum:pll_out_id
PLL_OUT4	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^	PLL_OUT4$/;"	e	enum:pll_out_id
PLL_OUT4	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^	PLL_OUT4$/;"	e	enum:pll_out_id
PLL_OUT_CLKEN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_OUT_CLKEN	/;"	d
PLL_OUT_OVRRIDE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_OUT_OVRRIDE	/;"	d
PLL_OUT_RATIO_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_OUT_RATIO_MASK	/;"	d
PLL_OUT_RATIO_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_OUT_RATIO_SHIFT	/;"	d
PLL_OUT_RSTN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define PLL_OUT_RSTN	/;"	d
PLL_PCIDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PCIDIV	/;"	d
PLL_PCIDIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PCIDIV_1	/;"	d
PLL_PCIDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PCIDIV_2	/;"	d
PLL_PCIDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PCIDIV_3	/;"	d
PLL_PCIDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PCIDIV_4	/;"	d
PLL_PCR_DITHDEV	arch/m68k/include/asm/m520x.h	/^#define PLL_PCR_DITHDEV(/;"	d
PLL_PCR_DITHDEV_UNMASK	arch/m68k/include/asm/m520x.h	/^#define PLL_PCR_DITHDEV_UNMASK	/;"	d
PLL_PCR_DITHEN	arch/m68k/include/asm/m520x.h	/^#define PLL_PCR_DITHEN	/;"	d
PLL_PCR_FBDIV	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_FBDIV(/;"	d
PLL_PCR_FBDIV_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_FBDIV_UNMASK	/;"	d
PLL_PCR_LOC_EN	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_LOC_EN	/;"	d
PLL_PCR_LOC_IRQ	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_LOC_IRQ	/;"	d
PLL_PCR_LOC_RE	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_LOC_RE	/;"	d
PLL_PCR_LOL_EN	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_LOL_EN	/;"	d
PLL_PCR_LOL_IRQ	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_LOL_IRQ	/;"	d
PLL_PCR_LOL_RE	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_LOL_RE	/;"	d
PLL_PCR_OUTDIV1	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV1(/;"	d
PLL_PCR_OUTDIV1	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV1(/;"	d
PLL_PCR_OUTDIV1_MASK	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV1_MASK	/;"	d
PLL_PCR_OUTDIV1_MASK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV1_MASK	/;"	d
PLL_PCR_OUTDIV2	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV2(/;"	d
PLL_PCR_OUTDIV2	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV2(/;"	d
PLL_PCR_OUTDIV2_MASK	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV2_MASK	/;"	d
PLL_PCR_OUTDIV2_MASK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV2_MASK	/;"	d
PLL_PCR_OUTDIV3	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV3(/;"	d
PLL_PCR_OUTDIV3	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV3(/;"	d
PLL_PCR_OUTDIV3_MASK	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV3_MASK	/;"	d
PLL_PCR_OUTDIV3_MASK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV3_MASK	/;"	d
PLL_PCR_OUTDIV4	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV4(/;"	d
PLL_PCR_OUTDIV4_MASK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV4_MASK	/;"	d
PLL_PCR_OUTDIV5	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV5(/;"	d
PLL_PCR_OUTDIV5	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV5(/;"	d
PLL_PCR_OUTDIV5_MASK	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_OUTDIV5_MASK	/;"	d
PLL_PCR_OUTDIV5_MASK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_OUTDIV5_MASK	/;"	d
PLL_PCR_PFDR	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_PFDR(/;"	d
PLL_PCR_PFDR	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_PFDR(/;"	d
PLL_PCR_PFDR_MASK	arch/m68k/include/asm/m5227x.h	/^#define PLL_PCR_PFDR_MASK	/;"	d
PLL_PCR_PFDR_MASK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PCR_PFDR_MASK	/;"	d
PLL_PCR_REFDIV	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_REFDIV(/;"	d
PLL_PCR_REFDIV_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PCR_REFDIV_UNMASK	/;"	d
PLL_PD	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define PLL_PD(/;"	d
PLL_PD	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define PLL_PD(/;"	d
PLL_PDR_CPU	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_CPU(/;"	d
PLL_PDR_FB	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_FB(/;"	d
PLL_PDR_OUTDIV1	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV1(/;"	d
PLL_PDR_OUTDIV1_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV1_UNMASK	/;"	d
PLL_PDR_OUTDIV2	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV2(/;"	d
PLL_PDR_OUTDIV2_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV2_UNMASK	/;"	d
PLL_PDR_OUTDIV3	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV3(/;"	d
PLL_PDR_OUTDIV3_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV3_UNMASK	/;"	d
PLL_PDR_OUTDIV4	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV4(/;"	d
PLL_PDR_OUTDIV4_UNMASK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_OUTDIV4_UNMASK	/;"	d
PLL_PDR_SDRAM	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_SDRAM(/;"	d
PLL_PDR_USB	arch/m68k/include/asm/m5301x.h	/^#define PLL_PDR_USB(/;"	d
PLL_PD_MAX	arch/arm/cpu/armv7/mx5/clock.c	/^#define PLL_PD_MAX /;"	d	file:
PLL_PERIPH1_STATUS	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define PLL_PERIPH1_STATUS /;"	d
PLL_PERIPH1_STATUS	arch/arm/include/asm/arch/clock_sun9i.h	/^#define PLL_PERIPH1_STATUS /;"	d
PLL_PLBDIV	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PLBDIV	/;"	d
PLL_PLBDIV_1	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PLBDIV_1	/;"	d
PLL_PLBDIV_2	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PLBDIV_2	/;"	d
PLL_PLBDIV_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PLBDIV_3	/;"	d
PLL_PLBDIV_4	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_PLBDIV_4	/;"	d
PLL_PLLCR	arch/m68k/include/asm/m5253.h	/^#define PLL_PLLCR	/;"	d
PLL_PLLCR_DITHDEV	arch/m68k/include/asm/m5329.h	/^#define PLL_PLLCR_DITHDEV(/;"	d
PLL_PLLCR_DITHEN	arch/m68k/include/asm/m5329.h	/^#define PLL_PLLCR_DITHEN	/;"	d
PLL_PODR_BUSDIV	arch/m68k/include/asm/m520x.h	/^#define PLL_PODR_BUSDIV(/;"	d
PLL_PODR_BUSDIV	arch/m68k/include/asm/m5329.h	/^#define PLL_PODR_BUSDIV(/;"	d
PLL_PODR_BUSDIV_UNMASK	arch/m68k/include/asm/m520x.h	/^#define PLL_PODR_BUSDIV_UNMASK	/;"	d
PLL_PODR_CPUDIV	arch/m68k/include/asm/m520x.h	/^#define PLL_PODR_CPUDIV(/;"	d
PLL_PODR_CPUDIV	arch/m68k/include/asm/m5329.h	/^#define PLL_PODR_CPUDIV(/;"	d
PLL_PODR_CPUDIV_UNMASK	arch/m68k/include/asm/m520x.h	/^#define PLL_PODR_CPUDIV_UNMASK	/;"	d
PLL_POSTDEN	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_POSTDEN	/;"	d
PLL_POSTDIV1_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_POSTDIV1_MASK	= 7,$/;"	e	enum:__anon375ccd790103
PLL_POSTDIV1_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_POSTDIV1_MASK		= 0x7 << PLL_POSTDIV1_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PLL_POSTDIV1_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_POSTDIV1_SHIFT	= 12,$/;"	e	enum:__anon375ccd790103
PLL_POSTDIV1_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_POSTDIV1_SHIFT		= 8,$/;"	e	enum:__anon06b9221d0103	file:
PLL_POSTDIV2_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_POSTDIV2_MASK	= 7,$/;"	e	enum:__anon375ccd790103
PLL_POSTDIV2_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_POSTDIV2_MASK		= 0x7 << PLL_POSTDIV2_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
PLL_POSTDIV2_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_POSTDIV2_SHIFT	= 6,$/;"	e	enum:__anon375ccd790103
PLL_POSTDIV2_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_POSTDIV2_SHIFT		= 12,$/;"	e	enum:__anon06b9221d0103	file:
PLL_PPLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PPLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_PPLL	/;"	d
PLL_PSR_LOC	arch/m68k/include/asm/m5301x.h	/^#define PLL_PSR_LOC	/;"	d
PLL_PSR_LOCF	arch/m68k/include/asm/m5301x.h	/^#define PLL_PSR_LOCF	/;"	d
PLL_PSR_LOCK	arch/m68k/include/asm/m5227x.h	/^#define PLL_PSR_LOCK	/;"	d
PLL_PSR_LOCK	arch/m68k/include/asm/m5301x.h	/^#define PLL_PSR_LOCK	/;"	d
PLL_PSR_LOCK	arch/m68k/include/asm/m5441x.h	/^#define PLL_PSR_LOCK	/;"	d
PLL_PSR_LOCK	arch/m68k/include/asm/m5445x.h	/^#define PLL_PSR_LOCK	/;"	d
PLL_PSR_LOCKS	arch/m68k/include/asm/m5227x.h	/^#define PLL_PSR_LOCKS	/;"	d
PLL_PSR_LOCKS	arch/m68k/include/asm/m5301x.h	/^#define PLL_PSR_LOCKS	/;"	d
PLL_PSR_LOCKS	arch/m68k/include/asm/m5445x.h	/^#define PLL_PSR_LOCKS	/;"	d
PLL_PSR_LOLF	arch/m68k/include/asm/m5301x.h	/^#define PLL_PSR_LOLF	/;"	d
PLL_PSR_LOLIRQ	arch/m68k/include/asm/m5227x.h	/^#define PLL_PSR_LOLIRQ	/;"	d
PLL_PSR_LOLIRQ	arch/m68k/include/asm/m5445x.h	/^#define PLL_PSR_LOLIRQ	/;"	d
PLL_PSR_LOLRE	arch/m68k/include/asm/m5227x.h	/^#define PLL_PSR_LOLRE	/;"	d
PLL_PSR_LOLRE	arch/m68k/include/asm/m5445x.h	/^#define PLL_PSR_LOLRE	/;"	d
PLL_PSR_MODE	arch/m68k/include/asm/m5301x.h	/^#define PLL_PSR_MODE(/;"	d
PLL_PWRMGT_CNTL	include/radeon.h	/^#define PLL_PWRMGT_CNTL	/;"	d
PLL_PWRMGT_CNTL_MOBILE_SU	include/radeon.h	/^#define PLL_PWRMGT_CNTL_MOBILE_SU	/;"	d
PLL_PWRMGT_CNTL_P2PLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL_P2PLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL_PPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL_PPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL_SPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL_SPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK	include/radeon.h	/^#define PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK	/;"	d
PLL_PWRMGT_CNTL_SU_SCLK_USE_BCLK	include/radeon.h	/^#define PLL_PWRMGT_CNTL_SU_SCLK_USE_BCLK	/;"	d
PLL_PWRMGT_CNTL_TVPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL_TVPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL__AGPCLK_DYN_STOP_LAT_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__AGPCLK_DYN_STOP_LAT_MASK	/;"	d
PLL_PWRMGT_CNTL__APM_POWER_STATE_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__APM_POWER_STATE_MASK	/;"	d
PLL_PWRMGT_CNTL__APM_PWRSTATE_RD_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__APM_PWRSTATE_RD_MASK	/;"	d
PLL_PWRMGT_CNTL__CG_NO2_DEBUG_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__CG_NO2_DEBUG_MASK	/;"	d
PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND	include/radeon.h	/^#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND	/;"	d
PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND_MASK	/;"	d
PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND	include/radeon.h	/^#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND	/;"	d
PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND_MASK	/;"	d
PLL_PWRMGT_CNTL__MOBILE_SU	include/radeon.h	/^#define PLL_PWRMGT_CNTL__MOBILE_SU	/;"	d
PLL_PWRMGT_CNTL__MOBILE_SU_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__MOBILE_SU_MASK	/;"	d
PLL_PWRMGT_CNTL__MPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL__MPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL__MPLL_TURNOFF_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__MPLL_TURNOFF_MASK	/;"	d
PLL_PWRMGT_CNTL__P2PLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL__P2PLL_TURNOFF_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF_MASK	/;"	d
PLL_PWRMGT_CNTL__PM_MODE_SEL	include/radeon.h	/^#define PLL_PWRMGT_CNTL__PM_MODE_SEL	/;"	d
PLL_PWRMGT_CNTL__PM_MODE_SEL_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__PM_MODE_SEL_MASK	/;"	d
PLL_PWRMGT_CNTL__PPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL__PPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL__PPLL_TURNOFF_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__PPLL_TURNOFF_MASK	/;"	d
PLL_PWRMGT_CNTL__SPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL__SPLL_TURNOFF_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SPLL_TURNOFF_MASK	/;"	d
PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK	/;"	d
PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK_MASK	/;"	d
PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK	/;"	d
PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK_MASK	/;"	d
PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE	/;"	d
PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE_MASK	/;"	d
PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE	include/radeon.h	/^#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE	/;"	d
PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE_MASK	/;"	d
PLL_PWRMGT_CNTL__TCL_CLOCK_ACTIVE_RD	include/radeon.h	/^#define PLL_PWRMGT_CNTL__TCL_CLOCK_ACTIVE_RD	/;"	d
PLL_PWRMGT_CNTL__TCL_CLOCK_CTIVE_RD_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__TCL_CLOCK_CTIVE_RD_MASK	/;"	d
PLL_PWRMGT_CNTL__TVPLL_TURNOFF	include/radeon.h	/^#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF	/;"	d
PLL_PWRMGT_CNTL__TVPLL_TURNOFF_MASK	include/radeon.h	/^#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF_MASK	/;"	d
PLL_PWRUP_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_PWRUP_MASK:$/;"	l
PLL_PWR_UP	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PLL_PWR_UP	/;"	d
PLL_READY	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PLL_READY	/;"	d
PLL_REFDIV	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PLL_REFDIV	/;"	d
PLL_REFDIV_MASK	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define PLL_REFDIV_MASK	/;"	d
PLL_REFDIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_REFDIV_MASK		= 0x3f,$/;"	e	enum:__anon375ccd790103
PLL_REFDIV_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_REFDIV_MASK			= 0x3f,$/;"	e	enum:__anon06b9221d0103	file:
PLL_REFDIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_REFDIV_SHIFT	= 0,$/;"	e	enum:__anon375ccd790103
PLL_REFDIV_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PLL_REFDIV_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
PLL_REF_CLK	include/configs/thunderx_88xx.h	/^#define PLL_REF_CLK	/;"	d
PLL_REGM_F_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_REGM_F_MASK /;"	d	file:
PLL_REGM_F_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_REGM_F_MASK	/;"	d	file:
PLL_REGM_F_MASK	include/linux/usb/xhci-omap.h	/^#define	PLL_REGM_F_MASK	/;"	d
PLL_REGM_F_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_REGM_F_SHIFT /;"	d	file:
PLL_REGM_F_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_REGM_F_SHIFT	/;"	d	file:
PLL_REGM_F_SHIFT	include/linux/usb/xhci-omap.h	/^#define	PLL_REGM_F_SHIFT	/;"	d
PLL_REGM_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_REGM_MASK /;"	d	file:
PLL_REGM_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_REGM_MASK	/;"	d	file:
PLL_REGM_MASK	include/linux/usb/xhci-omap.h	/^#define	PLL_REGM_MASK	/;"	d
PLL_REGM_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_REGM_SHIFT /;"	d	file:
PLL_REGM_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_REGM_SHIFT	/;"	d	file:
PLL_REGM_SHIFT	include/linux/usb/xhci-omap.h	/^#define	PLL_REGM_SHIFT	/;"	d
PLL_REGN_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_REGN_MASK /;"	d	file:
PLL_REGN_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_REGN_MASK	/;"	d	file:
PLL_REGN_MASK	include/linux/usb/xhci-omap.h	/^#define	PLL_REGN_MASK	/;"	d
PLL_REGN_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_REGN_SHIFT /;"	d	file:
PLL_REGN_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_REGN_SHIFT	/;"	d	file:
PLL_REGN_SHIFT	include/linux/usb/xhci-omap.h	/^#define	PLL_REGN_SHIFT	/;"	d
PLL_RESET	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_RESET	/;"	d
PLL_RESET	include/usb/ehci-ci.h	/^#define PLL_RESET	/;"	d
PLL_RESET_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^PLL_RESET_MASK:$/;"	l
PLL_RESET_SHIFT	drivers/clk/rockchip/clk_rk3288.c	/^	PLL_RESET_SHIFT		= 5,$/;"	e	enum:__anon06a678fa0203	file:
PLL_RST	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define PLL_RST	/;"	d
PLL_RSTYPE_POR	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_RSTYPE_POR	/;"	d
PLL_RSTYPE_XWRST	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_RSTYPE_XWRST	/;"	d
PLL_RST_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	PLL_RST_SHIFT		= 14,$/;"	e	enum:__anon375ccd790103
PLL_SCSCFG3_DIV45PENA	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_SCSCFG3_DIV45PENA	/;"	d
PLL_SCSCFG3_EMA_CLKSRC	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define PLL_SCSCFG3_EMA_CLKSRC	/;"	d
PLL_SD_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_SD_MASK /;"	d	file:
PLL_SD_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_SD_MASK	/;"	d	file:
PLL_SD_MASK	include/linux/usb/xhci-omap.h	/^#define	PLL_SD_MASK	/;"	d
PLL_SD_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_SD_SHIFT /;"	d	file:
PLL_SD_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_SD_SHIFT	/;"	d	file:
PLL_SD_SHIFT	include/linux/usb/xhci-omap.h	/^#define	PLL_SD_SHIFT	/;"	d
PLL_SELFREQDCO_MASK	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_SELFREQDCO_MASK /;"	d	file:
PLL_SELFREQDCO_MASK	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_SELFREQDCO_MASK	/;"	d	file:
PLL_SELFREQDCO_MASK	include/linux/usb/xhci-omap.h	/^#define	PLL_SELFREQDCO_MASK	/;"	d
PLL_SELFREQDCO_SHIFT	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_SELFREQDCO_SHIFT /;"	d	file:
PLL_SELFREQDCO_SHIFT	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_SELFREQDCO_SHIFT	/;"	d	file:
PLL_SELFREQDCO_SHIFT	include/linux/usb/xhci-omap.h	/^#define	PLL_SELFREQDCO_SHIFT	/;"	d
PLL_SET_DELAY_US	drivers/phy/marvell/comphy_a3700.h	/^#define PLL_SET_DELAY_US	/;"	d
PLL_SR_LOC	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_LOC	/;"	d
PLL_SR_LOCF	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_LOCF	/;"	d
PLL_SR_LOCK	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_LOCK	/;"	d
PLL_SR_LOCKS	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_LOCKS	/;"	d
PLL_SR_LOLF	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_LOLF	/;"	d
PLL_SR_MODE	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_MODE(/;"	d
PLL_SR_MODE_MASK	arch/m68k/include/asm/m5441x.h	/^#define PLL_SR_MODE_MASK	/;"	d
PLL_STABILIZATION_DELAY	arch/arm/include/asm/arch-tegra/ap.h	/^#define PLL_STABILIZATION_DELAY	/;"	d
PLL_STABILIZATION_DELAY	arch/arm/mach-tegra/cpu.h	/^#define PLL_STABILIZATION_DELAY /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PLL_STAT /;"	d
PLL_STAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PLL_STAT /;"	d
PLL_STATUS	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_STATUS /;"	d	file:
PLL_STATUS	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_STATUS	/;"	d	file:
PLL_STOP	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define PLL_STOP	/;"	d
PLL_SUBSYS_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define PLL_SUBSYS_BASE	/;"	d
PLL_SYNCR_DEPTH	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_DEPTH(/;"	d
PLL_SYNCR_DISCLK	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_DISCLK	/;"	d
PLL_SYNCR_DISCLK	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_DISCLK	/;"	d
PLL_SYNCR_EXP	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_EXP(/;"	d
PLL_SYNCR_FWKUP	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_FWKUP	/;"	d
PLL_SYNCR_LOCEN	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_LOCEN	/;"	d
PLL_SYNCR_LOCEN	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_LOCEN	/;"	d
PLL_SYNCR_LOCIRQ	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_LOCIRQ	/;"	d
PLL_SYNCR_LOCRE	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_LOCRE	/;"	d
PLL_SYNCR_LOCRE	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_LOCRE	/;"	d
PLL_SYNCR_LOLIRQ	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_LOLIRQ	/;"	d
PLL_SYNCR_LOLRE	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_LOLRE	/;"	d
PLL_SYNCR_LOLRE	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_LOLRE	/;"	d
PLL_SYNCR_MFD	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_MFD(/;"	d
PLL_SYNCR_MFD0	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_MFD0	/;"	d
PLL_SYNCR_MFD1	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_MFD1	/;"	d
PLL_SYNCR_MFD2	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_MFD2	/;"	d
PLL_SYNCR_MFD_MASK	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_MFD_MASK	/;"	d
PLL_SYNCR_RATE	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_RATE	/;"	d
PLL_SYNCR_RFC	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_RFC(/;"	d
PLL_SYNCR_RFC0	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_RFC0	/;"	d
PLL_SYNCR_RFC1	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_RFC1	/;"	d
PLL_SYNCR_RFC2	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_RFC2	/;"	d
PLL_SYNCR_RFC_MASK	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNCR_RFC_MASK	/;"	d
PLL_SYNCR_STPMD0	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_STPMD0	/;"	d
PLL_SYNCR_STPMD1	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNCR_STPMD1	/;"	d
PLL_SYNSR_CALDONE	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_CALDONE	/;"	d
PLL_SYNSR_CALPASS	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_CALPASS	/;"	d
PLL_SYNSR_LOC	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_LOC	/;"	d
PLL_SYNSR_LOCF	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_LOCF	/;"	d
PLL_SYNSR_LOCK	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_LOCK	/;"	d
PLL_SYNSR_LOCK	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNSR_LOCK	/;"	d
PLL_SYNSR_LOCKS	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_LOCKS	/;"	d
PLL_SYNSR_LOCKS	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNSR_LOCKS	/;"	d
PLL_SYNSR_LOCS	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNSR_LOCS	/;"	d
PLL_SYNSR_LOLF	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_LOLF	/;"	d
PLL_SYNSR_MODE	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_MODE	/;"	d
PLL_SYNSR_MODE	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNSR_MODE	/;"	d
PLL_SYNSR_PLLREF	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_PLLREF	/;"	d
PLL_SYNSR_PLLREF	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNSR_PLLREF	/;"	d
PLL_SYNSR_PLLSEL	arch/m68k/include/asm/m5235.h	/^#define PLL_SYNSR_PLLSEL	/;"	d
PLL_SYNSR_PLLSEL	arch/m68k/include/asm/m5282.h	/^#define PLL_SYNSR_PLLSEL	/;"	d
PLL_SYS	arch/arm/cpu/armv7/mx6/clock.c	/^	PLL_SYS,	\/* System PLL *\/$/;"	e	enum:pll_clocks	file:
PLL_SYS	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS,	\/* System PLL*\/$/;"	e	enum:pll_clocks
PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_MAIN_120M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_MAIN_240M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_MAIN_480M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD0_196M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD0_196M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD0_392M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD1_166M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD1_166M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD1_332M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD1_332M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD2_135M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD2_270M_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD3_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD4_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD5_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD6_CLK,$/;"	e	enum:clk_root_src
PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_SYS_PFD7_CLK,$/;"	e	enum:clk_root_src
PLL_TEST_CNTL	include/radeon.h	/^#define PLL_TEST_CNTL	/;"	d
PLL_TICOPWDN	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define PLL_TICOPWDN /;"	d	file:
PLL_TICOPWDN	drivers/usb/dwc3/ti_usb_phy.c	/^#define PLL_TICOPWDN	/;"	d	file:
PLL_TICOPWDN	include/linux/usb/xhci-omap.h	/^#define	PLL_TICOPWDN	/;"	d
PLL_TIM	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define PLL_TIM /;"	d
PLL_TOTAL	board/amcc/makalu/cmd_pll.c	/^	PLL_TOTAL$/;"	e	enum:__anonc3f6b6150103	file:
PLL_TUNE_11_M_14	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_11_M_14	/;"	d
PLL_TUNE_15_M_40	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_15_M_40	/;"	d
PLL_TUNE_2_M_3	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_2_M_3	/;"	d
PLL_TUNE_4_M_6	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_4_M_6	/;"	d
PLL_TUNE_7_M_10	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_7_M_10	/;"	d
PLL_TUNE_MASK	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_MASK	/;"	d
PLL_TUNE_VCO_HI	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_VCO_HI	/;"	d
PLL_TUNE_VCO_LOW	arch/powerpc/include/asm/ppc405ep.h	/^#define PLL_TUNE_VCO_LOW	/;"	d
PLL_UNLOCKED	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PLL_UNLOCKED = 0,$/;"	e	enum:pll_status
PLL_USB	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_USB,	\/* USB PLL, fixed at 480MHZ *\/$/;"	e	enum:pll_clocks
PLL_USBOTG	arch/arm/cpu/armv7/mx6/clock.c	/^	PLL_USBOTG,	\/* OTG USB PLL *\/$/;"	e	enum:pll_clocks	file:
PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_USB_MAIN_480M_CLK,		\/* fixed at 480MHZ *\/$/;"	e	enum:clk_root_src
PLL_VIDEO	arch/arm/cpu/armv7/mx6/clock.c	/^	PLL_VIDEO,	\/* AUDIO PLL *\/$/;"	e	enum:pll_clocks	file:
PLL_VIDEO	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_VIDEO,	\/* Video PLL*\/$/;"	e	enum:pll_clocks
PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	PLL_VIDEO_MAIN_CLK,$/;"	e	enum:clk_root_src
PLL_VPLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_VPLL	include/dt-bindings/clock/rk3399-cru.h	/^#define PLL_VPLL	/;"	d
PLL_WR_EN	include/radeon.h	/^#define PLL_WR_EN	/;"	d
PLL_X_LOCK_FACTOR	arch/arm/mach-exynos/exynos5_setup.h	/^#define PLL_X_LOCK_FACTOR	/;"	d
PLL_ebc20	board/amcc/makalu/cmd_pll.c	/^	PLL_ebc20,$/;"	e	enum:__anonc3f6b6150103	file:
PLL_setup_end	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^PLL_setup_end:$/;"	l
PLPDIR1_ESDHC_4BITS_VAL	include/configs/MPC8569MDS.h	/^#define PLPDIR1_ESDHC_4BITS_VAL	/;"	d
PLPDIR1_ESDHC_VAL	include/configs/MPC8569MDS.h	/^#define PLPDIR1_ESDHC_VAL	/;"	d
PLPDIR1_I2C2_VAL	include/configs/MPC8569MDS.h	/^#define PLPDIR1_I2C2_VAL	/;"	d
PLPDIR1_I2C_BIT_MASK	include/configs/MPC8569MDS.h	/^#define PLPDIR1_I2C_BIT_MASK	/;"	d
PLPDIR1_UART0_BIT_MASK	include/configs/MPC8569MDS.h	/^#define PLPDIR1_UART0_BIT_MASK	/;"	d
PLPPAR1_ESDHC_4BITS_VAL	include/configs/MPC8569MDS.h	/^#define PLPPAR1_ESDHC_4BITS_VAL	/;"	d
PLPPAR1_ESDHC_VAL	include/configs/MPC8569MDS.h	/^#define PLPPAR1_ESDHC_VAL	/;"	d
PLPPAR1_I2C2_VAL	include/configs/MPC8569MDS.h	/^#define PLPPAR1_I2C2_VAL	/;"	d
PLPPAR1_I2C_BIT_MASK	include/configs/MPC8569MDS.h	/^#define PLPPAR1_I2C_BIT_MASK	/;"	d
PLPPAR1_UART0_BIT_MASK	include/configs/MPC8569MDS.h	/^#define PLPPAR1_UART0_BIT_MASK	/;"	d
PLPRCR_CSR	include/mpc5xx.h	/^#define PLPRCR_CSR	/;"	d
PLPRCR_CSR	include/mpc8xx.h	/^#define PLPRCR_CSR	/;"	d
PLPRCR_CSRC	include/mpc8xx.h	/^#define PLPRCR_CSRC	/;"	d
PLPRCR_CSRC_MSK	include/mpc5xx.h	/^#define PLPRCR_CSRC_MSK /;"	d
PLPRCR_DBRMO	include/mpc8xx.h	/^#define PLPRCR_DBRMO	/;"	d
PLPRCR_DIVF_0	include/mpc5xx.h	/^#define PLPRCR_DIVF_0 /;"	d
PLPRCR_DIVF_MSK	include/mpc5xx.h	/^#define PLPRCR_DIVF_MSK	/;"	d
PLPRCR_FIOPD	include/mpc8xx.h	/^#define PLPRCR_FIOPD	/;"	d
PLPRCR_LOLRE	include/mpc8xx.h	/^#define PLPRCR_LOLRE	/;"	d
PLPRCR_LPM_DEEP_SLEEP	include/mpc8xx.h	/^#define PLPRCR_LPM_DEEP_SLEEP /;"	d
PLPRCR_LPM_DOWN	include/mpc8xx.h	/^#define PLPRCR_LPM_DOWN	/;"	d
PLPRCR_LPM_DOZE	include/mpc8xx.h	/^#define PLPRCR_LPM_DOZE	/;"	d
PLPRCR_LPM_MSK	include/mpc8xx.h	/^#define PLPRCR_LPM_MSK	/;"	d
PLPRCR_LPM_NORMAL	include/mpc8xx.h	/^#define PLPRCR_LPM_NORMAL /;"	d
PLPRCR_LPM_SLEEP	include/mpc8xx.h	/^#define PLPRCR_LPM_SLEEP /;"	d
PLPRCR_MFACT_MSK	include/mpc8xx.h	/^#define PLPRCR_MFACT_MSK /;"	d
PLPRCR_MFD_MSK	include/mpc8xx.h	/^#define PLPRCR_MFD_MSK	/;"	d
PLPRCR_MFD_SHIFT	include/mpc8xx.h	/^#define PLPRCR_MFD_SHIFT	/;"	d
PLPRCR_MFI_MSK	include/mpc8xx.h	/^#define PLPRCR_MFI_MSK	/;"	d
PLPRCR_MFI_SHIFT	include/mpc8xx.h	/^#define PLPRCR_MFI_SHIFT	/;"	d
PLPRCR_MFN_MSK	include/mpc8xx.h	/^#define PLPRCR_MFN_MSK	/;"	d
PLPRCR_MFN_SHIFT	include/mpc8xx.h	/^#define PLPRCR_MFN_SHIFT	/;"	d
PLPRCR_MF_9	include/mpc5xx.h	/^#define PLPRCR_MF_9 /;"	d
PLPRCR_MF_MSK	include/mpc5xx.h	/^#define PLPRCR_MF_MSK	/;"	d
PLPRCR_MF_MSK	include/mpc8xx.h	/^#define PLPRCR_MF_MSK	/;"	d
PLPRCR_MF_SHIFT	include/mpc5xx.h	/^#define PLPRCR_MF_SHIFT /;"	d
PLPRCR_MF_SHIFT	include/mpc8xx.h	/^#define PLPRCR_MF_SHIFT	/;"	d
PLPRCR_PDF_MSK	include/mpc8xx.h	/^#define PLPRCR_PDF_MSK	/;"	d
PLPRCR_PDF_SHIFT	include/mpc8xx.h	/^#define PLPRCR_PDF_SHIFT	/;"	d
PLPRCR_SPLSS	include/mpc5xx.h	/^#define PLPRCR_SPLSS	/;"	d
PLPRCR_SPLSS	include/mpc8xx.h	/^#define PLPRCR_SPLSS	/;"	d
PLPRCR_S_MSK	include/mpc8xx.h	/^#define PLPRCR_S_MSK	/;"	d
PLPRCR_S_SHIFT	include/mpc8xx.h	/^#define PLPRCR_S_SHIFT	/;"	d
PLPRCR_TEXPS	include/mpc5xx.h	/^#define PLPRCR_TEXPS	/;"	d
PLPRCR_TEXPS	include/mpc8xx.h	/^#define PLPRCR_TEXPS	/;"	d
PLPRCR_TMIST	include/mpc5xx.h	/^#define PLPRCR_TMIST	/;"	d
PLPRCR_TMIST	include/mpc8xx.h	/^#define PLPRCR_TMIST	/;"	d
PLPRCR_val	arch/powerpc/cpu/mpc8xx/cpu.c	/^#define PLPRCR_val(/;"	d	file:
PLPRCR_val	arch/powerpc/cpu/mpc8xx/speed.c	/^#define PLPRCR_val(/;"	d	file:
PLPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PLPUPR_A:	.long	GPIO_BASE + 0x54$/;"	l
PLPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PLPUPR_D:	.long	0x00$/;"	l
PLUG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PLUG	/;"	d
PLUG	arch/arm/mach-exynos/include/mach/dp.h	/^#define PLUG	/;"	d
PLUGIN	arch/arm/imx-common/Makefile	/^PLUGIN = board\/$(BOARDDIR)\/plugin$/;"	m
PLUG_STATUS_ATTACHED	include/usb/designware_udc.h	/^#define  PLUG_STATUS_ATTACHED	/;"	d
PLUG_STATUS_EN	include/usb/designware_udc.h	/^#define  PLUG_STATUS_EN	/;"	d
PLUG_STATUS_PHY_MODE	include/usb/designware_udc.h	/^#define  PLUG_STATUS_PHY_MODE	/;"	d
PLUG_STATUS_PHY_RESET	include/usb/designware_udc.h	/^#define  PLUG_STATUS_PHY_RESET	/;"	d
PLUS	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
PLUS	lib/vsprintf.c	/^#define PLUS	/;"	d	file:
PLUS1	include/MCD_dma.h	/^#define PLUS1	/;"	d
PLUSQ	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
PLX9056_LOC	board/mpl/pati/cmd_pati.c	/^#define PLX9056_LOC$/;"	d	file:
PLX9056_LOC	board/mpl/pati/pati.c	/^#define PLX9056_LOC$/;"	d	file:
PL_16K	arch/mips/include/asm/mipsregs.h	/^#define PL_16K	/;"	d
PL_16M	arch/mips/include/asm/mipsregs.h	/^#define PL_16M	/;"	d
PL_1M	arch/mips/include/asm/mipsregs.h	/^#define PL_1M	/;"	d
PL_256K	arch/mips/include/asm/mipsregs.h	/^#define PL_256K	/;"	d
PL_256M	arch/mips/include/asm/mipsregs.h	/^#define PL_256M	/;"	d
PL_4K	arch/mips/include/asm/mipsregs.h	/^#define PL_4K	/;"	d
PL_4M	arch/mips/include/asm/mipsregs.h	/^#define PL_4M	/;"	d
PL_64K	arch/mips/include/asm/mipsregs.h	/^#define PL_64K	/;"	d
PL_64M	arch/mips/include/asm/mipsregs.h	/^#define PL_64M	/;"	d
PL_OFFSET	drivers/pci/pcie_imx.c	/^#define PL_OFFSET /;"	d	file:
PM0_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PM0_ENABLE	/;"	d
PM1_CNT	arch/x86/include/asm/arch-broadwell/pm.h	/^#define PM1_CNT	/;"	d
PM1_CNT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PM1_CNT	/;"	d
PM1_CNT_SCI_EN	arch/x86/include/asm/acpi_table.h	/^#define PM1_CNT_SCI_EN	/;"	d
PM1_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define PM1_EN	/;"	d
PM1_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PM1_EN	/;"	d
PM1_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PM1_ENABLE	/;"	d
PM1_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define PM1_STS	/;"	d
PM1_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PM1_STS	/;"	d
PM1_TMR	arch/x86/include/asm/arch-broadwell/pm.h	/^#define PM1_TMR	/;"	d
PM1_TMR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PM1_TMR	/;"	d
PM2_CNT	arch/x86/include/asm/arch-broadwell/pm.h	/^#define PM2_CNT	/;"	d
PM2_CNT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PM2_CNT	/;"	d
PM8916_GPIO	drivers/gpio/Kconfig	/^config PM8916_GPIO$/;"	c	menu:GPIO Support
PMAP	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define PMAP	/;"	d
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	int (PMAPIP BE_int86) (int intno, RMREGS * in, RMREGS * out);$/;"	m	struct:__anon964d10140908	typeref:typename:int (BE_int86)(int intno,RMREGS * in,RMREGS * out)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	int (PMAPIP BE_int86x) (int intno, RMREGS * in, RMREGS * out,$/;"	m	struct:__anon964d10140908	typeref:typename:int (BE_int86x)(int intno,RMREGS * in,RMREGS * out,RMSREGS * sregs)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	void (PMAPIP BE_callRealMode) (uint seg, uint off, RMREGS * regs,$/;"	m	struct:__anon964d10140908	typeref:typename:void (BE_callRealMode)(uint seg,uint off,RMREGS * regs,RMSREGS * sregs)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	void (PMAPIP BE_exit) (void);$/;"	m	struct:__anon964d10140908	typeref:typename:void (BE_exit)(void)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	void (PMAPIP BE_getVGA) (BE_VGAInfo * info);$/;"	m	struct:__anon964d10140908	typeref:typename:void (BE_getVGA)(BE_VGAInfo * info)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	void (PMAPIP BE_setVGA) (BE_VGAInfo * info);$/;"	m	struct:__anon964d10140908	typeref:typename:void (BE_setVGA)(BE_VGAInfo * info)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	void *(PMAPIP BE_getVESABuf) (uint * len, uint * rseg, uint * roff);$/;"	m	struct:__anon964d10140908	typeref:typename:void * (BE_getVESABuf)(uint * len,uint * rseg,uint * roff)
PMAPIP	drivers/bios_emulator/include/biosemu.h	/^	void *(PMAPIP BE_mapRealPointer) (uint r_seg, uint r_off);$/;"	m	struct:__anon964d10140908	typeref:typename:void * (BE_mapRealPointer)(uint r_seg,uint r_off)
PMB0_BASE	arch/x86/include/asm/speedstep.h	/^#define PMB0_BASE /;"	d
PMB1_BASE	arch/x86/include/asm/speedstep.h	/^#define PMB1_BASE /;"	d
PMBA	arch/x86/include/asm/arch-qemu/qemu.h	/^#define PMBA	/;"	d
PMBASE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PMBASE	/;"	d
PMBASE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PMBASE	/;"	d
PMBASE	arch/x86/include/asm/lpc_common.h	/^#define PMBASE	/;"	d
PMB_ADDR_ARRAY	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_ADDR_ARRAY	/;"	d
PMB_ADDR_BASE	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_ADDR_BASE(/;"	d
PMB_ADDR_CPLD_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_CPLD_A:	.long	PMB_ADDR_BASE(1)$/;"	l
PMB_ADDR_CPLD_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_CPLD_D:	.long	mk_pmb_addr_val(0xa4)$/;"	l
PMB_ADDR_DDR_C1_A	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_DDR_C1_A:	.long	PMB_ADDR_BASE(5)$/;"	l
PMB_ADDR_DDR_C1_A	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_DDR_C1_A:	.long	PMB_ADDR_BASE(5)$/;"	l
PMB_ADDR_DDR_C1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C1_A:	.long	PMB_ADDR_BASE(5)$/;"	l
PMB_ADDR_DDR_C1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C1_A:	.long	PMB_ADDR_BASE(9)$/;"	l
PMB_ADDR_DDR_C1_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_DDR_C1_D:	.long	mk_pmb_addr_val(0x88)$/;"	l
PMB_ADDR_DDR_C1_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_DDR_C1_D:	.long	mk_pmb_addr_val(0x88)$/;"	l
PMB_ADDR_DDR_C1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C1_D:	.long	mk_pmb_addr_val(0x88)$/;"	l
PMB_ADDR_DDR_C1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C1_D:	.long	mk_pmb_addr_val(0x88)$/;"	l
PMB_ADDR_DDR_C2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C2_A:	.long	PMB_ADDR_BASE(10)$/;"	l
PMB_ADDR_DDR_C2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C2_D:	.long	mk_pmb_addr_val(0x90)$/;"	l
PMB_ADDR_DDR_C3_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C3_A:	.long	PMB_ADDR_BASE(11)$/;"	l
PMB_ADDR_DDR_C3_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_C3_D:	.long	mk_pmb_addr_val(0x98)$/;"	l
PMB_ADDR_DDR_N1_A	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_DDR_N1_A:	.long	PMB_ADDR_BASE(1)$/;"	l
PMB_ADDR_DDR_N1_A	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_DDR_N1_A:	.long	PMB_ADDR_BASE(1)$/;"	l
PMB_ADDR_DDR_N1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N1_A:	.long	PMB_ADDR_BASE(1)$/;"	l
PMB_ADDR_DDR_N1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N1_A:	.long	PMB_ADDR_BASE(13)$/;"	l
PMB_ADDR_DDR_N1_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_DDR_N1_D:	.long	mk_pmb_addr_val(0xa8)$/;"	l
PMB_ADDR_DDR_N1_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_DDR_N1_D:	.long	mk_pmb_addr_val(0xa8)$/;"	l
PMB_ADDR_DDR_N1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N1_D:	.long	mk_pmb_addr_val(0xa8)$/;"	l
PMB_ADDR_DDR_N1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N1_D:	.long	mk_pmb_addr_val(0xa8)$/;"	l
PMB_ADDR_DDR_N2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N2_A:	.long	PMB_ADDR_BASE(14)$/;"	l
PMB_ADDR_DDR_N2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N2_D:	.long	mk_pmb_addr_val(0xb0)$/;"	l
PMB_ADDR_DDR_N3_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N3_A:	.long	PMB_ADDR_BASE(15)$/;"	l
PMB_ADDR_DDR_N3_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_DDR_N3_D:	.long	mk_pmb_addr_val(0xb8)$/;"	l
PMB_ADDR_ENTRY	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_ADDR_ENTRY	/;"	d
PMB_ADDR_ENTRY10	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY10:	.long	PMB_ADDR_BASE(10)$/;"	l
PMB_ADDR_ENTRY10	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY10:	.long	PMB_ADDR_BASE(10)$/;"	l
PMB_ADDR_ENTRY10	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY10:	.long	PMB_ADDR_BASE(10)$/;"	l
PMB_ADDR_ENTRY11	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY11:	.long	PMB_ADDR_BASE(11)$/;"	l
PMB_ADDR_ENTRY11	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY11:	.long	PMB_ADDR_BASE(11)$/;"	l
PMB_ADDR_ENTRY11	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY11:	.long	PMB_ADDR_BASE(11)$/;"	l
PMB_ADDR_ENTRY12	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY12:	.long	PMB_ADDR_BASE(12)$/;"	l
PMB_ADDR_ENTRY12	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY12:	.long	PMB_ADDR_BASE(12)$/;"	l
PMB_ADDR_ENTRY12	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY12:	.long	PMB_ADDR_BASE(12)$/;"	l
PMB_ADDR_ENTRY13	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY13:	.long	PMB_ADDR_BASE(13)$/;"	l
PMB_ADDR_ENTRY13	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY13:	.long	PMB_ADDR_BASE(13)$/;"	l
PMB_ADDR_ENTRY13	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY13:	.long	PMB_ADDR_BASE(13)$/;"	l
PMB_ADDR_ENTRY14	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY14:	.long	PMB_ADDR_BASE(14)$/;"	l
PMB_ADDR_ENTRY14	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY14:	.long	PMB_ADDR_BASE(14)$/;"	l
PMB_ADDR_ENTRY14	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY14:	.long	PMB_ADDR_BASE(14)$/;"	l
PMB_ADDR_ENTRY15	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY15:	.long	PMB_ADDR_BASE(15)$/;"	l
PMB_ADDR_ENTRY15	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY15:	.long	PMB_ADDR_BASE(15)$/;"	l
PMB_ADDR_ENTRY15	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY15:	.long	PMB_ADDR_BASE(15)$/;"	l
PMB_ADDR_ENTRY2	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY2:	.long	PMB_ADDR_BASE(2)$/;"	l
PMB_ADDR_ENTRY2	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY2:	.long	PMB_ADDR_BASE(2)$/;"	l
PMB_ADDR_ENTRY2	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY2:	.long	PMB_ADDR_BASE(2)$/;"	l
PMB_ADDR_ENTRY3	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY3:	.long	PMB_ADDR_BASE(3)$/;"	l
PMB_ADDR_ENTRY3	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY3:	.long	PMB_ADDR_BASE(3)$/;"	l
PMB_ADDR_ENTRY3	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY3:	.long	PMB_ADDR_BASE(3)$/;"	l
PMB_ADDR_ENTRY4	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY4:	.long	PMB_ADDR_BASE(4)$/;"	l
PMB_ADDR_ENTRY4	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY4:	.long	PMB_ADDR_BASE(4)$/;"	l
PMB_ADDR_ENTRY4	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY4:	.long	PMB_ADDR_BASE(4)$/;"	l
PMB_ADDR_ENTRY6	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY6:	.long	PMB_ADDR_BASE(6)$/;"	l
PMB_ADDR_ENTRY6	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY6:	.long	PMB_ADDR_BASE(6)$/;"	l
PMB_ADDR_ENTRY6	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY6:	.long	PMB_ADDR_BASE(6)$/;"	l
PMB_ADDR_ENTRY7	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY7:	.long	PMB_ADDR_BASE(7)$/;"	l
PMB_ADDR_ENTRY7	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY7:	.long	PMB_ADDR_BASE(7)$/;"	l
PMB_ADDR_ENTRY7	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY7:	.long	PMB_ADDR_BASE(7)$/;"	l
PMB_ADDR_ENTRY8	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY8:	.long	PMB_ADDR_BASE(8)$/;"	l
PMB_ADDR_ENTRY8	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY8:	.long	PMB_ADDR_BASE(8)$/;"	l
PMB_ADDR_ENTRY8	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY8:	.long	PMB_ADDR_BASE(8)$/;"	l
PMB_ADDR_ENTRY9	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_ENTRY9:	.long	PMB_ADDR_BASE(9)$/;"	l
PMB_ADDR_ENTRY9	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_ENTRY9:	.long	PMB_ADDR_BASE(9)$/;"	l
PMB_ADDR_ENTRY9	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_ENTRY9:	.long	PMB_ADDR_BASE(9)$/;"	l
PMB_ADDR_FLASH_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_FLASH_A:	.long	PMB_ADDR_BASE(0)$/;"	l
PMB_ADDR_FLASH_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_FLASH_D:	.long	mk_pmb_addr_val(0xa0)$/;"	l
PMB_ADDR_NOT_USE_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_NOT_USE_D:	.long	0x00000000$/;"	l
PMB_ADDR_NOT_USE_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_NOT_USE_D:	.long	0x00000000$/;"	l
PMB_ADDR_NOT_USE_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_NOT_USE_D:	.long	0x00000000$/;"	l
PMB_ADDR_SPIBOOT_A	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_SPIBOOT_A:	.long	PMB_ADDR_BASE(0)$/;"	l
PMB_ADDR_SPIBOOT_A	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_SPIBOOT_A:	.long	PMB_ADDR_BASE(0)$/;"	l
PMB_ADDR_SPIBOOT_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_SPIBOOT_A:	.long	PMB_ADDR_BASE(0)$/;"	l
PMB_ADDR_SPIBOOT_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_ADDR_SPIBOOT_D:	.long	mk_pmb_addr_val(0xa0)$/;"	l
PMB_ADDR_SPIBOOT_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_ADDR_SPIBOOT_D:	.long	mk_pmb_addr_val(0xa0)$/;"	l
PMB_ADDR_SPIBOOT_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_ADDR_SPIBOOT_D:	.long	mk_pmb_addr_val(0xa0)$/;"	l
PMB_ADDR_USB_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_USB_A:		.long	PMB_ADDR_BASE(2)$/;"	l
PMB_ADDR_USB_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_ADDR_USB_D:		.long	mk_pmb_addr_val(0xa6)$/;"	l
PMB_C	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_C	/;"	d
PMB_DATA_ARRAY	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_DATA_ARRAY	/;"	d
PMB_DATA_BASE	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_DATA_BASE(/;"	d
PMB_DATA_CPLD_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_CPLD_A:	.long	PMB_DATA_BASE(1)$/;"	l
PMB_DATA_CPLD_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_CPLD_D:	.long	mk_pmb_data_val(0x04, 1, 1, 0, 0, 0, 1)$/;"	l
PMB_DATA_DDR_C1_A	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_DATA_DDR_C1_A:	.long	PMB_DATA_BASE(5)$/;"	l
PMB_DATA_DDR_C1_A	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_DATA_DDR_C1_A:	.long	PMB_DATA_BASE(5)$/;"	l
PMB_DATA_DDR_C1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_DATA_DDR_C1_A:	.long	PMB_DATA_BASE(5)$/;"	l
PMB_DATA_DDR_C1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_C1_A:	.long	PMB_DATA_BASE(9)$/;"	l
PMB_DATA_DDR_C1_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_DATA_DDR_C1_D:	.long	mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)$/;"	l
PMB_DATA_DDR_C1_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_DATA_DDR_C1_D:	.long	mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)$/;"	l
PMB_DATA_DDR_C1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_DATA_DDR_C1_D:	.long	mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)$/;"	l
PMB_DATA_DDR_C1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_C1_D:	.long	mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)$/;"	l
PMB_DATA_DDR_C2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_C2_A:	.long	PMB_DATA_BASE(10)$/;"	l
PMB_DATA_DDR_C2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_C2_D:	.long	mk_pmb_data_val(0x50, 0, 1, 1, 0, 1, 1)$/;"	l
PMB_DATA_DDR_C3_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_C3_A:	.long	PMB_DATA_BASE(11)$/;"	l
PMB_DATA_DDR_C3_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_C3_D:	.long	mk_pmb_data_val(0x58, 0, 1, 1, 0, 1, 1)$/;"	l
PMB_DATA_DDR_N1_A	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_DATA_DDR_N1_A:	.long	PMB_DATA_BASE(1)$/;"	l
PMB_DATA_DDR_N1_A	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_DATA_DDR_N1_A:	.long	PMB_DATA_BASE(1)$/;"	l
PMB_DATA_DDR_N1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_DATA_DDR_N1_A:	.long	PMB_DATA_BASE(1)$/;"	l
PMB_DATA_DDR_N1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_N1_A:	.long	PMB_DATA_BASE(13)$/;"	l
PMB_DATA_DDR_N1_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_DATA_DDR_N1_D:	.long	mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_DDR_N1_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_DATA_DDR_N1_D:	.long	mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_DDR_N1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_DATA_DDR_N1_D:	.long	mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_DDR_N1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_N1_D:	.long	mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_DDR_N2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_N2_A:	.long	PMB_DATA_BASE(14)$/;"	l
PMB_DATA_DDR_N2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_N2_D:	.long	mk_pmb_data_val(0x50, 1, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_DDR_N3_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_N3_A:	.long	PMB_DATA_BASE(15)$/;"	l
PMB_DATA_DDR_N3_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_DDR_N3_D:	.long	mk_pmb_data_val(0x58, 1, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_ENTRY	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_DATA_ENTRY	/;"	d
PMB_DATA_FLASH_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_FLASH_A:	.long	PMB_DATA_BASE(0)$/;"	l
PMB_DATA_FLASH_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_FLASH_D:	.long	mk_pmb_data_val(0x00, 1, 1, 0, 1, 0, 1)$/;"	l
PMB_DATA_SPIBOOT_A	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_DATA_SPIBOOT_A:	.long	PMB_DATA_BASE(0)$/;"	l
PMB_DATA_SPIBOOT_A	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_DATA_SPIBOOT_A:	.long	PMB_DATA_BASE(0)$/;"	l
PMB_DATA_SPIBOOT_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_DATA_SPIBOOT_A:	.long	PMB_DATA_BASE(0)$/;"	l
PMB_DATA_SPIBOOT_D	board/renesas/sh7752evb/lowlevel_init.S	/^PMB_DATA_SPIBOOT_D:	.long	mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_SPIBOOT_D	board/renesas/sh7753evb/lowlevel_init.S	/^PMB_DATA_SPIBOOT_D:	.long	mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_SPIBOOT_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMB_DATA_SPIBOOT_D:	.long	mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1)$/;"	l
PMB_DATA_USB_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_USB_A:		.long	PMB_DATA_BASE(2)$/;"	l
PMB_DATA_USB_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMB_DATA_USB_D:		.long	mk_pmb_data_val(0x08, 1, 1, 0, 0, 0, 1)$/;"	l
PMB_PPN	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_PPN	/;"	d
PMB_SZ0	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_SZ0	/;"	d
PMB_SZ1	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_SZ1	/;"	d
PMB_UB	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_UB	/;"	d
PMB_V	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_V	/;"	d
PMB_VPN	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_VPN	/;"	d
PMB_WT	arch/sh/include/asm/cpu_sh4.h	/^#define PMB_WT	/;"	d
PMCCR1_POWER_OFF	include/mpc83xx.h	/^#define PMCCR1_POWER_OFF	/;"	d
PMCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PMCR	/;"	d
PMCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PMCR	/;"	d
PMCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PMCR /;"	d
PMCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PMCR /;"	d
PMCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PMCR /;"	d
PMCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PMCR	/;"	d
PMCR	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PMCR /;"	d	file:
PMCR	include/SA-1100.h	/^#define PMCR	/;"	d
PMCR	include/faraday/ftpmu010.h	/^	unsigned int	PMCR;		\/* 0x10 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PMCR_A	board/espt/lowlevel_init.S	/^PMCR_A:	.long	0xFFEF0018$/;"	l
PMCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PMCR_A:		.long	0xffec0018$/;"	l
PMCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMCR_A:		.long	GPIO_BASE + 0x16$/;"	l
PMCR_D	board/espt/lowlevel_init.S	/^PMCR_D:	.word	0xFFFF$/;"	l
PMCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PMCR_D	/;"	d	file:
PMCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PMCR_D:		.long	0x0000$/;"	l
PMCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMCR_D:		.word	0xffff$/;"	l
PMCR_SF	include/SA-1100.h	/^#define PMCR_SF	/;"	d
PMCTRL_ISOCLK_NOT_OVERRIDE_CTRL	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define PMCTRL_ISOCLK_NOT_OVERRIDE_CTRL	/;"	d
PMCTRL_ISOCLK_OVERRIDE_CTRL	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define PMCTRL_ISOCLK_OVERRIDE_CTRL	/;"	d
PMCTRL_ISOCLK_OVERRIDE_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define PMCTRL_ISOCLK_OVERRIDE_MASK	/;"	d
PMCTRL_ISOCLK_OVERRIDE_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define PMCTRL_ISOCLK_OVERRIDE_SHIFT	/;"	d
PMCTRL_ISOCLK_STATUS_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define PMCTRL_ISOCLK_STATUS_MASK	/;"	d
PMCTRL_ISOCLK_STATUS_SHIFT	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define PMCTRL_ISOCLK_STATUS_SHIFT	/;"	d
PMC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define PMC_BASE_ADDR	/;"	d
PMC_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define PMC_BASE_ADDRESS	/;"	d
PMC_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define PMC_BASE_SIZE	/;"	d
PMC_PEXSTOPCLOCK_EN	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PMC_PEXSTOPCLOCK_EN(/;"	d
PMC_PEXSTOPCLOCK_EN	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PMC_PEXSTOPCLOCK_EN(/;"	d
PMC_PEXSTOPCLOCK_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PMC_PEXSTOPCLOCK_MASK(/;"	d
PMC_PEXSTOPCLOCK_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PMC_PEXSTOPCLOCK_MASK(/;"	d
PMC_PEXSTOPCLOCK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PMC_PEXSTOPCLOCK_OFFS(/;"	d
PMC_PEXSTOPCLOCK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PMC_PEXSTOPCLOCK_OFFS(/;"	d
PMC_PEXSTOPCLOCK_STOP	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PMC_PEXSTOPCLOCK_STOP(/;"	d
PMC_PEXSTOPCLOCK_STOP	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PMC_PEXSTOPCLOCK_STOP(/;"	d
PMC_REG_BASE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PMC_REG_BASE	/;"	d
PMC_SATA_PWRGT	arch/arm/mach-tegra/tegra20/clock.c	/^#define PMC_SATA_PWRGT /;"	d	file:
PMC_SATA_PWRGT	arch/arm/mach-tegra/tegra30/clock.c	/^#define PMC_SATA_PWRGT /;"	d	file:
PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE /;"	d	file:
PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE /;"	d	file:
PMC_SATA_PWRGT_PLLE_IDDQ_SWCTL	arch/arm/mach-tegra/tegra20/clock.c	/^#define  PMC_SATA_PWRGT_PLLE_IDDQ_SWCTL /;"	d	file:
PMC_SATA_PWRGT_PLLE_IDDQ_SWCTL	arch/arm/mach-tegra/tegra30/clock.c	/^#define  PMC_SATA_PWRGT_PLLE_IDDQ_SWCTL /;"	d	file:
PMC_XOFS_MASK	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PMC_XOFS_MASK	/;"	d
PMC_XOFS_SHIFT	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PMC_XOFS_SHIFT	/;"	d
PMD1	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PMD1	/;"	d
PMD7	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PMD7	/;"	d
PMDCSR	drivers/net/natsemi.c	/^	PMDCSR		= 0xE4,$/;"	e	enum:register_offsets	file:
PMDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PMDR	/;"	d
PMDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PMDR /;"	d
PMDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PMDR /;"	d
PMDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PMDR /;"	d
PMDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PMDR	/;"	d
PMD_ATTRINDX	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define PMD_ATTRINDX(/;"	d	file:
PMD_ATTRINDX	arch/arm/include/asm/armv8/mmu.h	/^#define PMD_ATTRINDX(/;"	d
PMD_ATTRINDX_MASK	arch/arm/include/asm/armv8/mmu.h	/^#define PMD_ATTRINDX_MASK	/;"	d
PMD_SECT_AF	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define PMD_SECT_AF	/;"	d	file:
PMD_TYPE_SECT	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define PMD_TYPE_SECT	/;"	d	file:
PMD_TYPE_TABLE	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define PMD_TYPE_TABLE	/;"	d	file:
PMECC_CFG_AUTO_DISABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_AUTO_DISABLE	/;"	d
PMECC_CFG_AUTO_ENABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_AUTO_ENABLE	/;"	d
PMECC_CFG_BCH_ERR12	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_BCH_ERR12	/;"	d
PMECC_CFG_BCH_ERR2	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_BCH_ERR2	/;"	d
PMECC_CFG_BCH_ERR24	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_BCH_ERR24	/;"	d
PMECC_CFG_BCH_ERR32	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_BCH_ERR32	/;"	d
PMECC_CFG_BCH_ERR4	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_BCH_ERR4	/;"	d
PMECC_CFG_BCH_ERR8	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_BCH_ERR8	/;"	d
PMECC_CFG_PAGE_1SECTOR	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_PAGE_1SECTOR	/;"	d
PMECC_CFG_PAGE_2SECTORS	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_PAGE_2SECTORS	/;"	d
PMECC_CFG_PAGE_4SECTORS	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_PAGE_4SECTORS	/;"	d
PMECC_CFG_PAGE_8SECTORS	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_PAGE_8SECTORS	/;"	d
PMECC_CFG_READ_OP	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_READ_OP	/;"	d
PMECC_CFG_SECTOR1024	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_SECTOR1024	/;"	d
PMECC_CFG_SECTOR512	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_SECTOR512	/;"	d
PMECC_CFG_SPARE_DISABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_SPARE_DISABLE	/;"	d
PMECC_CFG_SPARE_ENABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_SPARE_ENABLE	/;"	d
PMECC_CFG_WRITE_OP	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CFG_WRITE_OP	/;"	d
PMECC_CLK_133MHZ	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CLK_133MHZ	/;"	d
PMECC_CTRL_DATA	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CTRL_DATA	/;"	d
PMECC_CTRL_DISABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CTRL_DISABLE	/;"	d
PMECC_CTRL_ENABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CTRL_ENABLE	/;"	d
PMECC_CTRL_RST	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CTRL_RST	/;"	d
PMECC_CTRL_USER	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_CTRL_USER	/;"	d
PMECC_GF_13_PRIMITIVE_POLY	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_GF_13_PRIMITIVE_POLY	/;"	d
PMECC_GF_14_PRIMITIVE_POLY	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_GF_14_PRIMITIVE_POLY	/;"	d
PMECC_GF_DIMENSION_13	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_GF_DIMENSION_13	/;"	d
PMECC_GF_DIMENSION_14	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_GF_DIMENSION_14	/;"	d
PMECC_INDEX_TABLE_SIZE_1024	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_INDEX_TABLE_SIZE_1024	/;"	d
PMECC_INDEX_TABLE_SIZE_512	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_INDEX_TABLE_SIZE_512	/;"	d
PMECC_MAX_SECTOR_NUM	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_MAX_SECTOR_NUM	/;"	d
PMECC_MAX_TIMEOUT_US	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_MAX_TIMEOUT_US	/;"	d
PMECC_OOB_RESERVED_BYTES	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_OOB_RESERVED_BYTES	/;"	d
PMECC_SR_BUSY	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_SR_BUSY	/;"	d
PMECC_SR_ENABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMECC_SR_ENABLE	/;"	d
PMECC_VERSION_AT91SAM9N12	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_VERSION_AT91SAM9N12	/;"	d
PMECC_VERSION_AT91SAM9X5	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_VERSION_AT91SAM9X5	/;"	d
PMECC_VERSION_SAMA5D2	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_VERSION_SAMA5D2	/;"	d
PMECC_VERSION_SAMA5D3	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_VERSION_SAMA5D3	/;"	d
PMECC_VERSION_SAMA5D4	drivers/mtd/nand/atmel_nand_ecc.h	/^#define PMECC_VERSION_SAMA5D4	/;"	d
PMECR_AUTO_WAKE_EN	drivers/net/ks8851_mll.h	/^#define PMECR_AUTO_WAKE_EN	/;"	d
PMECR_PME_DELAY	drivers/net/ks8851_mll.h	/^#define PMECR_PME_DELAY	/;"	d
PMECR_PME_POL	drivers/net/ks8851_mll.h	/^#define PMECR_PME_POL	/;"	d
PMECR_PM_ENERGY	drivers/net/ks8851_mll.h	/^#define PMECR_PM_ENERGY	/;"	d
PMECR_PM_MASK	drivers/net/ks8851_mll.h	/^#define PMECR_PM_MASK	/;"	d
PMECR_PM_NORMAL	drivers/net/ks8851_mll.h	/^#define PMECR_PM_NORMAL	/;"	d
PMECR_PM_POWERSAVE	drivers/net/ks8851_mll.h	/^#define PMECR_PM_POWERSAVE	/;"	d
PMECR_PM_SHIFT	drivers/net/ks8851_mll.h	/^#define PMECR_PM_SHIFT	/;"	d
PMECR_PM_SOFTDOWN	drivers/net/ks8851_mll.h	/^#define PMECR_PM_SOFTDOWN	/;"	d
PMECR_WAKEUP_NORMAL	drivers/net/ks8851_mll.h	/^#define PMECR_WAKEUP_NORMAL	/;"	d
PMECR_WKEVT_ENERGY	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_ENERGY	/;"	d
PMECR_WKEVT_FRAME	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_FRAME	/;"	d
PMECR_WKEVT_GET	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_GET(/;"	d
PMECR_WKEVT_LINK	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_LINK	/;"	d
PMECR_WKEVT_MAGICPKT	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_MAGICPKT	/;"	d
PMECR_WKEVT_MASK	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_MASK	/;"	d
PMECR_WKEVT_SHIFT	drivers/net/ks8851_mll.h	/^#define PMECR_WKEVT_SHIFT	/;"	d
PMECR_WOL_ENERGY	drivers/net/ks8851_mll.h	/^#define PMECR_WOL_ENERGY	/;"	d
PMECR_WOL_LINKUP	drivers/net/ks8851_mll.h	/^#define PMECR_WOL_LINKUP	/;"	d
PMECR_WOL_MAGICPKT	drivers/net/ks8851_mll.h	/^#define PMECR_WOL_MAGICPKT	/;"	d
PMECR_WOL_WAKEUP	drivers/net/ks8851_mll.h	/^#define PMECR_WOL_WAKEUP	/;"	d
PMERRLOC_CALC_DONE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMERRLOC_CALC_DONE	/;"	d
PMERRLOC_DISABLE	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMERRLOC_DISABLE	/;"	d
PMERRLOC_ELCFG_NUM_ERRORS	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMERRLOC_ELCFG_NUM_ERRORS(/;"	d
PMERRLOC_ELCFG_SECTOR_1024	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMERRLOC_ELCFG_SECTOR_1024	/;"	d
PMERRLOC_ELCFG_SECTOR_512	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMERRLOC_ELCFG_SECTOR_512	/;"	d
PMERRLOC_ERR_NUM_MASK	drivers/mtd/nand/atmel_nand_ecc.h	/^#define		PMERRLOC_ERR_NUM_MASK	/;"	d
PME_B0_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   PME_B0_EN	/;"	d
PME_B0_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PME_B0_EN	/;"	d
PME_B0_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   PME_B0_STS	/;"	d
PME_B0_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PME_B0_STS	/;"	d
PME_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define PME_CLK_SEL	/;"	d	file:
PME_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define PME_CLK_SHIFT	/;"	d	file:
PME_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   PME_EN	/;"	d
PME_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PME_EN	/;"	d
PME_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   PME_STS	/;"	d
PME_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PME_STS	/;"	d
PMIC_ACT8846	drivers/power/pmic/Kconfig	/^config PMIC_ACT8846$/;"	c
PMIC_CHARGER_DISABLE	include/power/pmic.h	/^	PMIC_CHARGER_DISABLE,$/;"	e	enum:__anon2d4d8a730503
PMIC_CHARGER_ENABLE	include/power/pmic.h	/^	PMIC_CHARGER_ENABLE,$/;"	e	enum:__anon2d4d8a730503
PMIC_CHILDREN	drivers/power/pmic/Kconfig	/^config PMIC_CHILDREN$/;"	c
PMIC_CTRL_I2C_ADDR	board/siemens/pxm2/pmic.h	/^#define PMIC_CTRL_I2C_ADDR	/;"	d
PMIC_DEVCTRL_REG	board/siemens/pxm2/pmic.h	/^#define PMIC_DEVCTRL_REG	/;"	d
PMIC_DEVCTRL_REG_SR_CTL_I2C_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_DEVCTRL_REG_SR_CTL_I2C_MASK	/;"	d
PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C	board/siemens/pxm2/pmic.h	/^#define PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C	/;"	d
PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C	board/siemens/pxm2/pmic.h	/^#define PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C	/;"	d
PMIC_H	board/siemens/pxm2/pmic.h	/^#define PMIC_H$/;"	d
PMIC_I2C	include/power/pmic.h	/^enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};$/;"	e	enum:__anon2d4d8a730103
PMIC_ILMAX_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_ILMAX_MASK	/;"	d
PMIC_LP873X	drivers/power/pmic/Kconfig	/^config PMIC_LP873X$/;"	c
PMIC_NONE	include/power/pmic.h	/^enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};$/;"	e	enum:__anon2d4d8a730103
PMIC_NUM_OF_REGS	include/fsl_pmic.h	/^	PMIC_NUM_OF_REGS,$/;"	e	enum:__anond57df49b0103
PMIC_NUM_OF_REGS	include/power/max77693_pmic.h	/^#define PMIC_NUM_OF_REGS	/;"	d
PMIC_NUM_OF_REGS	include/power/max77696_pmic.h	/^	PMIC_NUM_OF_REGS,$/;"	e	enum:__anoncca498ab0103
PMIC_NUM_OF_REGS	include/power/max8997_pmic.h	/^	PMIC_NUM_OF_REGS = 0x9b,$/;"	e	enum:__anonca676f190103
PMIC_NUM_OF_REGS	include/power/max8998_pmic.h	/^	PMIC_NUM_OF_REGS,$/;"	e	enum:__anonb6a943fa0103
PMIC_NUM_OF_REGS	include/power/pfuze3000_pmic.h	/^	PMIC_NUM_OF_REGS	= 0x7F,$/;"	e	enum:__anonb14dde3f0103
PMIC_OP_GET	include/power/pmic.h	/^	PMIC_OP_GET,$/;"	e	enum:pmic_op_type
PMIC_OP_REG_CMD_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_CMD_MASK	/;"	d
PMIC_OP_REG_CMD_OP	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_CMD_OP	/;"	d
PMIC_OP_REG_CMD_SR	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_CMD_SR	/;"	d
PMIC_OP_REG_SEL	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_SEL	/;"	d
PMIC_OP_REG_SEL_1_1_3	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_SEL_1_1_3	/;"	d
PMIC_OP_REG_SEL_1_2_6	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_SEL_1_2_6	/;"	d
PMIC_OP_REG_SEL_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_OP_REG_SEL_MASK	/;"	d
PMIC_OP_SET	include/power/pmic.h	/^	PMIC_OP_SET,$/;"	e	enum:pmic_op_type
PMIC_PALMAS	drivers/power/pmic/Kconfig	/^config PMIC_PALMAS$/;"	c
PMIC_PM8916	drivers/power/pmic/Kconfig	/^config PMIC_PM8916$/;"	c
PMIC_READ	include/power/pmic.h	/^enum { PMIC_READ, PMIC_WRITE, };$/;"	e	enum:__anon2d4d8a730303
PMIC_REG_ILMAX_1_0_A	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_ILMAX_1_0_A	/;"	d
PMIC_REG_ILMAX_1_5_A	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_ILMAX_1_5_A	/;"	d
PMIC_REG_ST_OFF	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_ST_OFF	/;"	d
PMIC_REG_ST_OFF_1	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_ST_OFF_1	/;"	d
PMIC_REG_ST_ON_HI_POW	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_ST_ON_HI_POW	/;"	d
PMIC_REG_ST_ON_LOW_POW	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_ST_ON_LOW_POW	/;"	d
PMIC_REG_TSTEP_	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_	/;"	d
PMIC_REG_TSTEP_12_5	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_12_5	/;"	d
PMIC_REG_TSTEP_2_5	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_2_5	/;"	d
PMIC_REG_TSTEP_3_12	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_3_12	/;"	d
PMIC_REG_TSTEP_4_7	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_4_7	/;"	d
PMIC_REG_TSTEP_6_25	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_6_25	/;"	d
PMIC_REG_TSTEP_7_5	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_7_5	/;"	d
PMIC_REG_TSTEP_9_4	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_TSTEP_9_4	/;"	d
PMIC_REG_VGAIN_SEL_X1	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_VGAIN_SEL_X1	/;"	d
PMIC_REG_VGAIN_SEL_X1_0	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_VGAIN_SEL_X1_0	/;"	d
PMIC_REG_VGAIN_SEL_X3	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_VGAIN_SEL_X3	/;"	d
PMIC_REG_VGAIN_SEL_X4	board/siemens/pxm2/pmic.h	/^#define PMIC_REG_VGAIN_SEL_X4	/;"	d
PMIC_RK808	drivers/power/pmic/Kconfig	/^config PMIC_RK808$/;"	c
PMIC_RN5T567	drivers/power/pmic/Kconfig	/^config PMIC_RN5T567$/;"	c
PMIC_S2MPS11	drivers/power/pmic/Kconfig	/^config PMIC_S2MPS11$/;"	c
PMIC_S5M8767	drivers/power/pmic/Kconfig	/^config PMIC_S5M8767$/;"	c
PMIC_SENSOR_BYTE_ORDER_BIG	include/power/pmic.h	/^enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };$/;"	e	enum:__anon2d4d8a730403
PMIC_SENSOR_BYTE_ORDER_LITTLE	include/power/pmic.h	/^enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };$/;"	e	enum:__anon2d4d8a730403
PMIC_SPI	include/power/pmic.h	/^enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};$/;"	e	enum:__anon2d4d8a730103
PMIC_SR_I2C_ADDR	board/siemens/pxm2/pmic.h	/^#define PMIC_SR_I2C_ADDR	/;"	d
PMIC_ST_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_ST_MASK	/;"	d
PMIC_TPS65090	drivers/power/pmic/Kconfig	/^config PMIC_TPS65090$/;"	c
PMIC_TSTEP_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_TSTEP_MASK	/;"	d
PMIC_VDD1_OP_REG	board/siemens/pxm2/pmic.h	/^#define PMIC_VDD1_OP_REG	/;"	d
PMIC_VDD1_REG	board/siemens/pxm2/pmic.h	/^#define PMIC_VDD1_REG	/;"	d
PMIC_VDD2_OP_REG	board/siemens/pxm2/pmic.h	/^#define PMIC_VDD2_OP_REG	/;"	d
PMIC_VDD2_REG	board/siemens/pxm2/pmic.h	/^#define PMIC_VDD2_REG	/;"	d
PMIC_VGAIN_SEL_MASK	board/siemens/pxm2/pmic.h	/^#define PMIC_VGAIN_SEL_MASK	/;"	d
PMIC_WRITE	include/power/pmic.h	/^enum { PMIC_READ, PMIC_WRITE, };$/;"	e	enum:__anon2d4d8a730303
PMIOSE	arch/x86/include/asm/arch-qemu/qemu.h	/^#define PMIOSE	/;"	d
PMIR	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define PMIR	/;"	d
PMIR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define PMIR	/;"	d
PMIR_CF9GR	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  PMIR_CF9GR	/;"	d
PMIR_CF9GR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  PMIR_CF9GR	/;"	d
PMIR_CF9LOCK	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  PMIR_CF9LOCK	/;"	d
PMIR_CF9LOCK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  PMIR_CF9LOCK	/;"	d
PMI_CAP_ID	include/radeon.h	/^#define PMI_CAP_ID	/;"	d
PMI_DATA	include/radeon.h	/^#define PMI_DATA	/;"	d
PMI_I2C_ADDRESS	arch/arm/mach-tegra/tegra20/pmu.c	/^#define PMI_I2C_ADDRESS	/;"	d	file:
PMI_NXT_CAP_PTR	include/radeon.h	/^#define PMI_NXT_CAP_PTR	/;"	d
PMI_PMC_REG	include/radeon.h	/^#define PMI_PMC_REG	/;"	d
PMM0LA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM0LA /;"	d
PMM0MA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM0MA /;"	d
PMM0PCIHA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM0PCIHA /;"	d
PMM0PCILA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM0PCILA /;"	d
PMM1LA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM1LA /;"	d
PMM1MA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM1MA /;"	d
PMM1PCIHA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM1PCIHA /;"	d
PMM1PCILA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM1PCILA /;"	d
PMM2LA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM2LA /;"	d
PMM2MA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM2MA /;"	d
PMM2PCIHA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM2PCIHA /;"	d
PMM2PCILA	arch/powerpc/include/asm/4xx_pci.h	/^#define PMM2PCILA /;"	d
PMMR	arch/sh/include/asm/cpu_sh7734.h	/^#define PMMR /;"	d
PMMR	board/renesas/blanche/blanche.c	/^#define	PMMR	/;"	d	file:
PMODE	include/faraday/ftpmu010.h	/^	unsigned int	PMODE;		\/* 0x0C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PMPUPR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PMPUPR	/;"	d
PMPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PMPUPR_A:	.long	GPIO_BASE + 0x56$/;"	l
PMPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PMPUPR_D:	.long	0xfc$/;"	l
PMREGMISC	arch/x86/include/asm/arch-qemu/qemu.h	/^#define PMREGMISC	/;"	d
PMSELR	arch/sh/include/asm/cpu_sh7780.h	/^#define	PMSELR	/;"	d
PMSR	include/faraday/ftpmu010.h	/^	unsigned int	PMSR;		\/* 0x20 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PMSTS	arch/x86/cpu/quark/smc.h	/^#define PMSTS	/;"	d
PMSTS_DISR	arch/x86/cpu/quark/smc.h	/^#define PMSTS_DISR	/;"	d
PMSYNC_CONFIG	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PMSYNC_CONFIG	/;"	d
PMSYNC_CONFIG2	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define PMSYNC_CONFIG2	/;"	d
PMT_CTRL	drivers/net/smc911x.h	/^#define PMT_CTRL	/;"	d
PMT_CTRL_ED_EN	drivers/net/smc911x.h	/^#define	PMT_CTRL_ED_EN	/;"	d
PMT_CTRL_PHY_RST	drivers/net/smc911x.h	/^#define	PMT_CTRL_PHY_RST	/;"	d
PMT_CTRL_PME_EN	drivers/net/smc911x.h	/^#define	PMT_CTRL_PME_EN	/;"	d
PMT_CTRL_PME_IND	drivers/net/smc911x.h	/^#define	PMT_CTRL_PME_IND	/;"	d
PMT_CTRL_PME_POL	drivers/net/smc911x.h	/^#define	PMT_CTRL_PME_POL	/;"	d
PMT_CTRL_PME_TYPE	drivers/net/smc911x.h	/^#define	PMT_CTRL_PME_TYPE	/;"	d
PMT_CTRL_PM_MODE	drivers/net/smc911x.h	/^#define	PMT_CTRL_PM_MODE	/;"	d
PMT_CTRL_READY	drivers/net/smc911x.h	/^#define	PMT_CTRL_READY	/;"	d
PMT_CTRL_WOL_EN	drivers/net/smc911x.h	/^#define	PMT_CTRL_WOL_EN	/;"	d
PMT_CTRL_WUPS	drivers/net/smc911x.h	/^#define	PMT_CTRL_WUPS	/;"	d
PMT_CTRL_WUPS_ED	drivers/net/smc911x.h	/^#define	PMT_CTRL_WUPS_ED	/;"	d
PMT_CTRL_WUPS_MULTI	drivers/net/smc911x.h	/^#define	PMT_CTRL_WUPS_MULTI	/;"	d
PMT_CTRL_WUPS_NOWAKE	drivers/net/smc911x.h	/^#define	PMT_CTRL_WUPS_NOWAKE	/;"	d
PMT_CTRL_WUPS_WOL	drivers/net/smc911x.h	/^#define	PMT_CTRL_WUPS_WOL	/;"	d
PMUGRF_GPIO0A6_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO0A6_SEL_MASK	= 3 << PMUGRF_GPIO0A6_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO0A6_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO0A6_SEL_SHIFT	= 12,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1A7_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1A7_SEL_MASK	= 3 << PMUGRF_GPIO1A7_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1A7_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1A7_SEL_SHIFT	= 14,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B0_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B0_SEL_MASK = 3 << PMUGRF_GPIO1B0_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B0_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B0_SEL_SHIFT	= 0,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B1_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B1_SEL_MASK = 3 << PMUGRF_GPIO1B1_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B1_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B1_SEL_SHIFT	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B2_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B2_SEL_MASK = 3 << PMUGRF_GPIO1B2_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B2_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B2_SEL_SHIFT	= 4,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B6_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B6_SEL_MASK	= 3 << PMUGRF_GPIO1B6_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B6_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B6_SEL_SHIFT	= 12,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B7_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B7_SEL_MASK	= 3 << PMUGRF_GPIO1B7_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1B7_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1B7_SEL_SHIFT	= 14,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1C0_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1C0_SEL_MASK	= 3 << PMUGRF_GPIO1C0_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1C0_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1C0_SEL_SHIFT	= 0,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1C3_SEL_MASK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1C3_SEL_MASK	= 3 << PMUGRF_GPIO1C3_SEL_SHIFT,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_GPIO1C3_SEL_SHIFT	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_GPIO1C3_SEL_SHIFT	= 6,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_I2C0PMU_SCL	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_I2C0PMU_SCL	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_I2C0PMU_SDA	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_I2C0PMU_SDA	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_PWM_2	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_PWM_2		= 1,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_PWM_3A	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_PWM_3A		= 1,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_PWM_3B	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_PWM_3B		= 1,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_SPI1EC_CLK	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_SPI1EC_CLK	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_SPI1EC_CSN0	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_SPI1EC_CSN0	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_SPI1EC_RXD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_SPI1EC_RXD	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUGRF_SPI1EC_TXD	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	PMUGRF_SPI1EC_TXD	= 2,$/;"	e	enum:__anon0061a4610103	file:
PMUXCR1_IFC_MASK	board/freescale/p1010rdb/p1010rdb.c	/^#define PMUXCR1_IFC_MASK /;"	d	file:
PMUXCR1_SDHC_ENABLE	board/freescale/p1010rdb/p1010rdb.c	/^#define PMUXCR1_SDHC_ENABLE /;"	d	file:
PMUXCR1_SDHC_MASK	board/freescale/p1010rdb/p1010rdb.c	/^#define PMUXCR1_SDHC_MASK /;"	d	file:
PMUXCR_ELBCDIU_DIU	board/freescale/p1022ds/diu.c	/^#define PMUXCR_ELBCDIU_DIU	/;"	d	file:
PMUXCR_ELBCDIU_DIU	board/gdsys/p1022/diu.c	/^#define PMUXCR_ELBCDIU_DIU	/;"	d	file:
PMUXCR_ELBCDIU_MASK	board/freescale/p1022ds/diu.c	/^#define PMUXCR_ELBCDIU_MASK	/;"	d	file:
PMUXCR_ELBCDIU_MASK	board/gdsys/p1022/diu.c	/^#define PMUXCR_ELBCDIU_MASK	/;"	d	file:
PMUXCR_ELBCDIU_NOR16	board/freescale/p1022ds/diu.c	/^#define PMUXCR_ELBCDIU_NOR16	/;"	d	file:
PMUXCR_ELBCDIU_NOR16	board/gdsys/p1022/diu.c	/^#define PMUXCR_ELBCDIU_NOR16	/;"	d	file:
PMUX_DRVDN_MAX	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_DRVDN_MAX	/;"	d
PMUX_DRVDN_MIN	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_DRVDN_MIN	/;"	d
PMUX_DRVDN_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_DRVDN_NONE	/;"	d
PMUX_DRVGRP_ALS_PROX_INT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_ALS_PROX_INT = (0x10 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AO0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AO0 = (0x148 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AO1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AO1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AO1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AO2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AO2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AO2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AO3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AO3 = (0x140 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AO4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AO4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AP_READY	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_AP_READY,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AP_WAKE_BT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_AP_WAKE_BT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AP_WAKE_NFC	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_AP_WAKE_NFC,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AT1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AT1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AT1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AT2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AT2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AT2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AT3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AT3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AT3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AT4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AT4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AT4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AT5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AT5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_AT5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_AT6 = (0x12c \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AT6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_AT6 = (0x12c \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_AUD_MCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_AUD_MCLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BATT_BCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BATT_BCL,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BT_RST	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BT_RST,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BT_WAKE_AP	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BT_WAKE_AP,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BUTTON_HOME	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BUTTON_HOME,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BUTTON_POWER_ON	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BUTTON_POWER_ON,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BUTTON_SLIDE_SW	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BUTTON_SLIDE_SW,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BUTTON_VOL_DOWN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BUTTON_VOL_DOWN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_BUTTON_VOL_UP	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_BUTTON_VOL_UP,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM1_MCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM1_MCLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM1_PWDN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM1_PWDN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM1_STROBE	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM1_STROBE,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM2_MCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM2_MCLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM2_PWDN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM2_PWDN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM_AF_EN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM_AF_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM_FLASH_EN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM_FLASH_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM_I2C_SCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM_I2C_SCL,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM_I2C_SDA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM_I2C_SDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CAM_RST	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CAM_RST,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CDEV1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_CDEV1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CDEV1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_CDEV1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CDEV1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_CDEV1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CDEV2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_CDEV2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CDEV2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_CDEV2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CDEV2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_CDEV2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CEC	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_CEC = (0xd0 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CEC	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_CEC = (0xd0 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CEC	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_CEC = (0xd0 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CLK_32K_IN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CLK_32K_IN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CLK_32K_OUT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CLK_32K_OUT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CLK_REQ	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CLK_REQ,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CORE_PWR_REQ	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CORE_PWR_REQ,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_COUNT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_COUNT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_COUNT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_COUNT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_COUNT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_COUNT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_COUNT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_COUNT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CPU_PWR_REQ	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_CPU_PWR_REQ,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CRT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_CRT = (0x90 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_CSUS	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_CSUS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DAP1 = (0x28 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DAP1 = (0x28 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DAP1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1_DIN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP1_DIN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1_DOUT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP1_DOUT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1_FS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP1_FS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP1_SCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP1_SCLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DAP2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DAP2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DAP2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2_DIN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP2_DIN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2_DOUT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP2_DOUT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2_FS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP2_FS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP2_SCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP2_SCLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DAP3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DAP3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DAP3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DAP4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DAP4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DAP4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4_DIN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP4_DIN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4_DOUT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP4_DOUT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4_FS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP4_FS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP4_SCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DAP4_SCLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DAP5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DAP5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DAP5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DBG	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DBG,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DBG	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DBG,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DBG	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DBG,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DDC	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DDC = (0x94 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DDC	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DDC = (0x94 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DDC	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DDC,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DEV3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_DEV3 = (0xc4 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DEV3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_DEV3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DEV3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_DEV3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DMIC1_CLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DMIC1_CLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DMIC1_DAT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DMIC1_DAT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DMIC2_CLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DMIC2_CLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DMIC2_DAT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DMIC2_DAT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DMIC3_CLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DMIC3_CLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DMIC3_DAT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DMIC3_DAT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DP_HPD0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DP_HPD0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DVFS_CLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DVFS_CLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_DVFS_PWM	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_DVFS_PWM,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GEN1_I2C_SCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GEN1_I2C_SCL,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GEN1_I2C_SDA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GEN1_I2C_SDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GEN2_I2C_SCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GEN2_I2C_SCL,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GEN2_I2C_SDA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GEN2_I2C_SDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GEN3_I2C_SCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GEN3_I2C_SCL,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GEN3_I2C_SDA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GEN3_I2C_SDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_GMA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_GMA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMB	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMB,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMC	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMC,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMD	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMD,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GME	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_GME = (0xa8 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GME	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_GME = (0xa8 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GME	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GME,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMF	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_GMF,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMF	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_GMF,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMF	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMF,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMG	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_GMG,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMG	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_GMG,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMG	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMG,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMH	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_GMH,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMH	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_GMH,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GMH	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GMH,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GPIO_X1_AUD	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GPIO_X1_AUD,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GPIO_X3_AUD	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GPIO_X3_AUD,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GPS_EN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GPS_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GPS_RST	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_GPS_RST,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GPV	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_GPV,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_GPV	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_GPV,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_HDMI_CEC	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_HDMI_CEC,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_HDMI_INT_DP_HPD	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_HDMI_INT_DP_HPD,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_HV0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_HV0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_HV0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_HV0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_JTAG_RTCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_JTAG_RTCK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_LCD1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_LCD2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD_BL_EN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_LCD_BL_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD_BL_PWM	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_LCD_BL_PWM,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD_GPIO1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_LCD_GPIO1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD_GPIO2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_LCD_GPIO2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD_RST	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_LCD_RST,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_LCD_TE	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_LCD_TE,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_MODEM_WAKE_AP	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_MODEM_WAKE_AP,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_MOTION_INT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_MOTION_INT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_NFC_EN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_NFC_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_NFC_INT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_NFC_INT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_OWR	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_OWR,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_OWR	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_OWR,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_OWR	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_OWR,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PA6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PA6,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PCC7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PCC7,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PE6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PE6,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PE7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PE7,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PEX_L0_CLKREQ_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PEX_L0_CLKREQ_N,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PEX_L0_RST_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PEX_L0_RST_N,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PEX_L1_CLKREQ_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PEX_L1_CLKREQ_N,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PEX_L1_RST_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PEX_L1_RST_N,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PEX_WAKE_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PEX_WAKE_N,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PH6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PH6,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK6,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PK7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PK7,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PL0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PL0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PL1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PL1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PWR_I2C_SCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PWR_I2C_SCL,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PWR_I2C_SDA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PWR_I2C_SDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PWR_INT_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PWR_INT_N,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PZ0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PZ0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PZ1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PZ1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PZ2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PZ2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PZ3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PZ3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PZ4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PZ4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_PZ5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_PZ5,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_QSPI_SCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_QSPI_SCK = (0x1bc \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SATA_LED_ACTIVE	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SATA_LED_ACTIVE,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_SDIO1 = (0x84 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_SDIO1 = (0x84 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_SDIO1 = (0x84 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_SDIO2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_SDIO3 = (0x48 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_SDIO3 = (0x48 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_SDIO3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_SDIO4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDIO4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_SDIO4 = (0x15c \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDMMC1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SDMMC1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDMMC2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SDMMC2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDMMC3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SDMMC3 = (0x1dc \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SDMMC4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SDMMC4,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SHUTDOWN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SHUTDOWN = (0x1f4 \/ 4),$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPDIF_IN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPDIF_IN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPDIF_OUT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPDIF_OUT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_SPI,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_SPI,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_SPI,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI1_CS0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI1_CS0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI1_CS1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI1_CS1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI1_MISO	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI1_MISO,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI1_MOSI	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI1_MOSI,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI1_SCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI1_SCK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI2_CS0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI2_CS0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI2_CS1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI2_CS1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI2_MISO	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI2_MISO,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI2_MOSI	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI2_MOSI,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI2_SCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI2_SCK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI4_CS0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI4_CS0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI4_MISO	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI4_MISO,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI4_MOSI	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI4_MOSI,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_SPI4_SCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_SPI4_SCK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_TEMP_ALERT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_TEMP_ALERT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_TOUCH_CLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_TOUCH_CLK,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_TOUCH_INT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_TOUCH_INT,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_TOUCH_RST	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_TOUCH_RST,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UAA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_UAA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UAA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_UAA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UAA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_UAA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UAB	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_UAB,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UAB	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_UAB,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UAB	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_UAB,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART1_CTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART1_CTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART1_RTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART1_RTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART1_RX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART1_RX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART1_TX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART1_TX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_UART2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_UART2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_UART2,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2_CTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART2_CTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2_RTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART2_RTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2_RX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART2_RX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART2_TX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART2_TX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_UART3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_UART3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_UART3,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3_CTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART3_CTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3_RTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART3_RTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3_RX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART3_RX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART3_TX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART3_TX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART4_CTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART4_CTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART4_RTS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART4_RTS,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART4_RX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART4_RX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UART4_TX	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_UART4_TX,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UDA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_UDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UDA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_UDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_UDA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_UDA,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_USB_VBUS_EN	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_DRVGRP_USB_VBUS_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_USB_VBUS_EN	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_DRVGRP_USB_VBUS_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_USB_VBUS_EN0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_USB_VBUS_EN0,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_USB_VBUS_EN1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_USB_VBUS_EN1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_VI1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_DRVGRP_VI1,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_WIFI_EN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_WIFI_EN,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_WIFI_RST	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_WIFI_RST,$/;"	e	enum:pmux_drvgrp
PMUX_DRVGRP_WIFI_WAKE_AP	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_DRVGRP_WIFI_WAKE_AP,$/;"	e	enum:pmux_drvgrp
PMUX_DRVUP_MAX	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_DRVUP_MAX	/;"	d
PMUX_DRVUP_MIN	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_DRVUP_MIN	/;"	d
PMUX_DRVUP_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_DRVUP_NONE	/;"	d
PMUX_FUNC_AHB_CLK	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_AHB_CLK,$/;"	e	enum:pmux_func
PMUX_FUNC_APB_CLK	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_APB_CLK,$/;"	e	enum:pmux_func
PMUX_FUNC_AUD	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_AUD,$/;"	e	enum:pmux_func
PMUX_FUNC_AUDIO_SYNC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_AUDIO_SYNC,$/;"	e	enum:pmux_func
PMUX_FUNC_BCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_BCL,$/;"	e	enum:pmux_func
PMUX_FUNC_BLINK	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_BLINK,$/;"	e	enum:pmux_func
PMUX_FUNC_BLINK	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_BLINK,$/;"	e	enum:pmux_func
PMUX_FUNC_BLINK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_BLINK,$/;"	e	enum:pmux_func
PMUX_FUNC_BLINK	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_BLINK,$/;"	e	enum:pmux_func
PMUX_FUNC_CCLA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CCLA,$/;"	e	enum:pmux_func
PMUX_FUNC_CCLA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_CCLA,$/;"	e	enum:pmux_func
PMUX_FUNC_CEC	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_CEC,$/;"	e	enum:pmux_func
PMUX_FUNC_CEC	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CEC,$/;"	e	enum:pmux_func
PMUX_FUNC_CEC	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_CEC,$/;"	e	enum:pmux_func
PMUX_FUNC_CEC	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_CEC,$/;"	e	enum:pmux_func
PMUX_FUNC_CLDVFS	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_CLDVFS,$/;"	e	enum:pmux_func
PMUX_FUNC_CLDVFS	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CLDVFS,$/;"	e	enum:pmux_func
PMUX_FUNC_CLDVFS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_CLDVFS,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_CLK,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CLK,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_CLK,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK12	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_CLK12,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK12	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CLK12,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK_12M_OUT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_CLK_12M_OUT,$/;"	e	enum:pmux_func
PMUX_FUNC_CLK_32K_IN	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_CLK_32K_IN,$/;"	e	enum:pmux_func
PMUX_FUNC_CORE	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_CORE,$/;"	e	enum:pmux_func
PMUX_FUNC_CORE_PWR_REQ	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_CORE_PWR_REQ,$/;"	e	enum:pmux_func
PMUX_FUNC_COUNT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_COUNT,$/;"	e	enum:pmux_func
PMUX_FUNC_COUNT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_COUNT,$/;"	e	enum:pmux_func
PMUX_FUNC_COUNT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_COUNT,$/;"	e	enum:pmux_func
PMUX_FUNC_COUNT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_COUNT,$/;"	e	enum:pmux_func
PMUX_FUNC_COUNT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_COUNT,$/;"	e	enum:pmux_func
PMUX_FUNC_CPU	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_CPU,$/;"	e	enum:pmux_func
PMUX_FUNC_CPU	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CPU,$/;"	e	enum:pmux_func
PMUX_FUNC_CPU	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_CPU,$/;"	e	enum:pmux_func
PMUX_FUNC_CPU_PWR_REQ	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_CPU_PWR_REQ,$/;"	e	enum:pmux_func
PMUX_FUNC_CRT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_CRT,$/;"	e	enum:pmux_func
PMUX_FUNC_CRT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_CRT,$/;"	e	enum:pmux_func
PMUX_FUNC_CSI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_CSI,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DAP,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DAP,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DAP,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DAP1,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DAP1,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DAP1,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DAP2,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DAP2,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DAP2,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DAP3,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DAP4,$/;"	e	enum:pmux_func
PMUX_FUNC_DAP5	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DAP5,$/;"	e	enum:pmux_func
PMUX_FUNC_DDR	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DDR,$/;"	e	enum:pmux_func
PMUX_FUNC_DEFAULT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DEFAULT,$/;"	e	enum:pmux_func
PMUX_FUNC_DEFAULT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DEFAULT,$/;"	e	enum:pmux_func
PMUX_FUNC_DEFAULT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DEFAULT,$/;"	e	enum:pmux_func
PMUX_FUNC_DEFAULT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DEFAULT,$/;"	e	enum:pmux_func
PMUX_FUNC_DEFAULT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DEFAULT,$/;"	e	enum:pmux_func
PMUX_FUNC_DEV3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DEV3,$/;"	e	enum:pmux_func
PMUX_FUNC_DEV3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DEV3,$/;"	e	enum:pmux_func
PMUX_FUNC_DEV3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DEV3,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DISPA,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_DISPB,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DISPLAYA,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DISPLAYA,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DISPLAYA,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DISPLAYA,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYA_ALT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DISPLAYA_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYA_ALT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DISPLAYA_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYB	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DISPLAYB,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYB	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DISPLAYB,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYB	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DISPLAYB,$/;"	e	enum:pmux_func
PMUX_FUNC_DISPLAYB	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DISPLAYB,$/;"	e	enum:pmux_func
PMUX_FUNC_DMIC1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DMIC1,$/;"	e	enum:pmux_func
PMUX_FUNC_DMIC2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DMIC2,$/;"	e	enum:pmux_func
PMUX_FUNC_DMIC3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DMIC3,$/;"	e	enum:pmux_func
PMUX_FUNC_DP	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DP,$/;"	e	enum:pmux_func
PMUX_FUNC_DP	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DP,$/;"	e	enum:pmux_func
PMUX_FUNC_DSI_B	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DSI_B,$/;"	e	enum:pmux_func
PMUX_FUNC_DTV	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_DTV,$/;"	e	enum:pmux_func
PMUX_FUNC_DTV	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_DTV,$/;"	e	enum:pmux_func
PMUX_FUNC_DTV	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_DTV,$/;"	e	enum:pmux_func
PMUX_FUNC_DTV	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_DTV,$/;"	e	enum:pmux_func
PMUX_FUNC_EMC_DLL	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_EMC_DLL,$/;"	e	enum:pmux_func
PMUX_FUNC_EMC_TEST0_DLL	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_EMC_TEST0_DLL,$/;"	e	enum:pmux_func
PMUX_FUNC_EMC_TEST1_DLL	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_EMC_TEST1_DLL,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_EXTPERIPH1,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_EXTPERIPH1,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_EXTPERIPH1,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_EXTPERIPH2,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_EXTPERIPH2,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_EXTPERIPH2,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_EXTPERIPH3,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_EXTPERIPH3,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_EXTPERIPH3,$/;"	e	enum:pmux_func
PMUX_FUNC_EXTPERIPH3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_EXTPERIPH3,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_GMI,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_GMI,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_GMI,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_GMI,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI_ALT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_GMI_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI_ALT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_GMI_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI_ALT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_GMI_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_GMI_INT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_GMI_INT,$/;"	e	enum:pmux_func
PMUX_FUNC_HDA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_HDA,$/;"	e	enum:pmux_func
PMUX_FUNC_HDA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_HDA,$/;"	e	enum:pmux_func
PMUX_FUNC_HDA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_HDA,$/;"	e	enum:pmux_func
PMUX_FUNC_HDCP	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_HDCP,$/;"	e	enum:pmux_func
PMUX_FUNC_HDMI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_HDMI,$/;"	e	enum:pmux_func
PMUX_FUNC_HDMI	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_HDMI,$/;"	e	enum:pmux_func
PMUX_FUNC_HSI	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_HSI,$/;"	e	enum:pmux_func
PMUX_FUNC_HSI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_HSI,$/;"	e	enum:pmux_func
PMUX_FUNC_HSI	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_HSI,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_I2C,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2C1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2C1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2C1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2C1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2C2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2C2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_I2C2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2C2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2C2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2C3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2C3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_I2C3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2C3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2C3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2C4,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2C4,$/;"	e	enum:pmux_func
PMUX_FUNC_I2C4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2C4,$/;"	e	enum:pmux_func
PMUX_FUNC_I2CPMU	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2CPMU,$/;"	e	enum:pmux_func
PMUX_FUNC_I2CPWR	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2CPWR,$/;"	e	enum:pmux_func
PMUX_FUNC_I2CPWR	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2CPWR,$/;"	e	enum:pmux_func
PMUX_FUNC_I2CPWR	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2CPWR,$/;"	e	enum:pmux_func
PMUX_FUNC_I2CVI	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2CVI,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2S0,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2S0,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2S0,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2S1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2S1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2S1,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2S2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2S2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2S2,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2S3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2S3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2S3,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_I2S4,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_I2S4,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_I2S4,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S4A	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S4A,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S4B	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S4B,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S5A	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S5A,$/;"	e	enum:pmux_func
PMUX_FUNC_I2S5B	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_I2S5B,$/;"	e	enum:pmux_func
PMUX_FUNC_IDE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_IDE,$/;"	e	enum:pmux_func
PMUX_FUNC_INVALID	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_INVALID,$/;"	e	enum:pmux_func
PMUX_FUNC_IQC0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_IQC0,$/;"	e	enum:pmux_func
PMUX_FUNC_IQC1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_IQC1,$/;"	e	enum:pmux_func
PMUX_FUNC_IRDA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_IRDA,$/;"	e	enum:pmux_func
PMUX_FUNC_IRDA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_IRDA,$/;"	e	enum:pmux_func
PMUX_FUNC_JTAG	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_JTAG,$/;"	e	enum:pmux_func
PMUX_FUNC_KBC	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_KBC,$/;"	e	enum:pmux_func
PMUX_FUNC_KBC	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_KBC,$/;"	e	enum:pmux_func
PMUX_FUNC_KBC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_KBC,$/;"	e	enum:pmux_func
PMUX_FUNC_KBC	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_KBC,$/;"	e	enum:pmux_func
PMUX_FUNC_MIO	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_MIO,$/;"	e	enum:pmux_func
PMUX_FUNC_MIO	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_MIO,$/;"	e	enum:pmux_func
PMUX_FUNC_MIPI_HS	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_MIPI_HS,$/;"	e	enum:pmux_func
PMUX_FUNC_NAND	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_NAND,$/;"	e	enum:pmux_func
PMUX_FUNC_NAND	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_NAND,$/;"	e	enum:pmux_func
PMUX_FUNC_NAND	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_NAND,$/;"	e	enum:pmux_func
PMUX_FUNC_NAND_ALT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_NAND_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_NAND_ALT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_NAND_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_OSC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_OSC,$/;"	e	enum:pmux_func
PMUX_FUNC_OWR	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_OWR,$/;"	e	enum:pmux_func
PMUX_FUNC_OWR	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_OWR,$/;"	e	enum:pmux_func
PMUX_FUNC_OWR	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_OWR,$/;"	e	enum:pmux_func
PMUX_FUNC_OWR	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_OWR,$/;"	e	enum:pmux_func
PMUX_FUNC_PCIE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PCIE,$/;"	e	enum:pmux_func
PMUX_FUNC_PCIE	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_PCIE,$/;"	e	enum:pmux_func
PMUX_FUNC_PE	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PE,$/;"	e	enum:pmux_func
PMUX_FUNC_PE	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PE,$/;"	e	enum:pmux_func
PMUX_FUNC_PE0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PE0,$/;"	e	enum:pmux_func
PMUX_FUNC_PE0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PE0,$/;"	e	enum:pmux_func
PMUX_FUNC_PE1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PE1,$/;"	e	enum:pmux_func
PMUX_FUNC_PE1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PE1,$/;"	e	enum:pmux_func
PMUX_FUNC_PLLA_OUT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PLLA_OUT,$/;"	e	enum:pmux_func
PMUX_FUNC_PLLC_OUT1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PLLC_OUT1,$/;"	e	enum:pmux_func
PMUX_FUNC_PLLM_OUT1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PLLM_OUT1,$/;"	e	enum:pmux_func
PMUX_FUNC_PLLP_OUT2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PLLP_OUT2,$/;"	e	enum:pmux_func
PMUX_FUNC_PLLP_OUT3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PLLP_OUT3,$/;"	e	enum:pmux_func
PMUX_FUNC_PLLP_OUT4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PLLP_OUT4,$/;"	e	enum:pmux_func
PMUX_FUNC_PMI	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_PMI,$/;"	e	enum:pmux_func
PMUX_FUNC_PMI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PMI,$/;"	e	enum:pmux_func
PMUX_FUNC_PMI	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PMI,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PWM,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_PWM0,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PWM0,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PWM0,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_PWM0,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_PWM1,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PWM1,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PWM1,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_PWM1,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_PWM2,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PWM2,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PWM2,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_PWM2,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_PWM3,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PWM3,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_PWM3,$/;"	e	enum:pmux_func
PMUX_FUNC_PWM3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_PWM3,$/;"	e	enum:pmux_func
PMUX_FUNC_PWRON	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_PWRON,$/;"	e	enum:pmux_func
PMUX_FUNC_PWRON	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_PWRON,$/;"	e	enum:pmux_func
PMUX_FUNC_PWR_INTR	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PWR_INTR,$/;"	e	enum:pmux_func
PMUX_FUNC_PWR_INT_N	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_PWR_INT_N,$/;"	e	enum:pmux_func
PMUX_FUNC_PWR_ON	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_PWR_ON,$/;"	e	enum:pmux_func
PMUX_FUNC_QSPI	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_QSPI,$/;"	e	enum:pmux_func
PMUX_FUNC_RESET_OUT_N	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_RESET_OUT_N,$/;"	e	enum:pmux_func
PMUX_FUNC_RESET_OUT_N	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_RESET_OUT_N,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_RSVD0,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_RSVD1,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_RSVD1,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_RSVD1,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_RSVD1,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_RSVD1,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_RSVD2,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_RSVD2,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_RSVD2,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_RSVD2,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_RSVD2,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_RSVD3,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_RSVD3,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_RSVD3,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_RSVD3,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_RSVD3,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_RSVD4,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_RSVD4,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_RSVD4,$/;"	e	enum:pmux_func
PMUX_FUNC_RSVD4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_RSVD4,$/;"	e	enum:pmux_func
PMUX_FUNC_RTCK	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_RTCK,$/;"	e	enum:pmux_func
PMUX_FUNC_RTCK	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_RTCK,$/;"	e	enum:pmux_func
PMUX_FUNC_RTCK	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_RTCK,$/;"	e	enum:pmux_func
PMUX_FUNC_RTCK	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_RTCK,$/;"	e	enum:pmux_func
PMUX_FUNC_SATA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SATA,$/;"	e	enum:pmux_func
PMUX_FUNC_SATA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SATA,$/;"	e	enum:pmux_func
PMUX_FUNC_SATA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SATA,$/;"	e	enum:pmux_func
PMUX_FUNC_SDIO1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SDIO1,$/;"	e	enum:pmux_func
PMUX_FUNC_SDIO2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SDIO2,$/;"	e	enum:pmux_func
PMUX_FUNC_SDIO3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SDIO3,$/;"	e	enum:pmux_func
PMUX_FUNC_SDIO4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SDIO4,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SDMMC1,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SDMMC1,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SDMMC1,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SDMMC1,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SDMMC2,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SDMMC2,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SDMMC2,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SDMMC3,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SDMMC3,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SDMMC3,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SDMMC3,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SDMMC4,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SDMMC4,$/;"	e	enum:pmux_func
PMUX_FUNC_SDMMC4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SDMMC4,$/;"	e	enum:pmux_func
PMUX_FUNC_SFLASH	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SFLASH,$/;"	e	enum:pmux_func
PMUX_FUNC_SHUTDOWN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SHUTDOWN,$/;"	e	enum:pmux_func
PMUX_FUNC_SOC	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SOC,$/;"	e	enum:pmux_func
PMUX_FUNC_SOC	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SOC,$/;"	e	enum:pmux_func
PMUX_FUNC_SOC	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SOC,$/;"	e	enum:pmux_func
PMUX_FUNC_SOR0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SOR0,$/;"	e	enum:pmux_func
PMUX_FUNC_SOR1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SOR1,$/;"	e	enum:pmux_func
PMUX_FUNC_SPDIF	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPDIF,$/;"	e	enum:pmux_func
PMUX_FUNC_SPDIF	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPDIF,$/;"	e	enum:pmux_func
PMUX_FUNC_SPDIF	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SPDIF,$/;"	e	enum:pmux_func
PMUX_FUNC_SPDIF	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SPDIF,$/;"	e	enum:pmux_func
PMUX_FUNC_SPDIF	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPDIF,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPI1,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPI1,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SPI1,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SPI1,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI1,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPI2,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPI2,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SPI2,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SPI2,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI2,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2_ALT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SPI2_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI2_ALT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI2_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPI3,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPI3,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SPI3,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SPI3,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI3,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPI4,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPI4,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_SPI4,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SPI4,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI4,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPI5,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPI5,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI5,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SPI6,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SPI6,$/;"	e	enum:pmux_func
PMUX_FUNC_SPI6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SPI6,$/;"	e	enum:pmux_func
PMUX_FUNC_SYS	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_SYS,$/;"	e	enum:pmux_func
PMUX_FUNC_SYS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_SYS,$/;"	e	enum:pmux_func
PMUX_FUNC_SYSCLK	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_SYSCLK,$/;"	e	enum:pmux_func
PMUX_FUNC_SYSCLK	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_SYSCLK,$/;"	e	enum:pmux_func
PMUX_FUNC_TEST	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_TEST,$/;"	e	enum:pmux_func
PMUX_FUNC_TMDS	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_TMDS,$/;"	e	enum:pmux_func
PMUX_FUNC_TOUCH	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_TOUCH,$/;"	e	enum:pmux_func
PMUX_FUNC_TRACE	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_TRACE,$/;"	e	enum:pmux_func
PMUX_FUNC_TRACE	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_TRACE,$/;"	e	enum:pmux_func
PMUX_FUNC_TRACE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_TRACE,$/;"	e	enum:pmux_func
PMUX_FUNC_TRACE	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_TRACE,$/;"	e	enum:pmux_func
PMUX_FUNC_TWC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_TWC,$/;"	e	enum:pmux_func
PMUX_FUNC_UART	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_UART,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTA	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_UARTA,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTA	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_UARTA,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_UARTA,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTA	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_UARTA,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTA	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_UARTA,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTB	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_UARTB,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTB	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_UARTB,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_UARTB,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTB	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_UARTB,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTB	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_UARTB,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTC	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_UARTC,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTC	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_UARTC,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_UARTC,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTC	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_UARTC,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTC	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_UARTC,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTD	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_UARTD,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTD	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_UARTD,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_UARTD,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTD	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_UARTD,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTD	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_UARTD,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_UARTE,$/;"	e	enum:pmux_func
PMUX_FUNC_UARTE	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_UARTE,$/;"	e	enum:pmux_func
PMUX_FUNC_ULPI	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_ULPI,$/;"	e	enum:pmux_func
PMUX_FUNC_ULPI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_ULPI,$/;"	e	enum:pmux_func
PMUX_FUNC_ULPI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_ULPI,$/;"	e	enum:pmux_func
PMUX_FUNC_ULPI	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_ULPI,$/;"	e	enum:pmux_func
PMUX_FUNC_USB	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_USB,$/;"	e	enum:pmux_func
PMUX_FUNC_USB	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_USB,$/;"	e	enum:pmux_func
PMUX_FUNC_USB	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_USB,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VGP1,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VGP1,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VGP1,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VGP1,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VGP2,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VGP2,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VGP2,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VGP2,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VGP3,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VGP3,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VGP3,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VGP3,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VGP4,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VGP4,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VGP4,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VGP4,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VGP5,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VGP5,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VGP5,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VGP5,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VGP6,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VGP6,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VGP6,$/;"	e	enum:pmux_func
PMUX_FUNC_VGP6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VGP6,$/;"	e	enum:pmux_func
PMUX_FUNC_VI	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VI,$/;"	e	enum:pmux_func
PMUX_FUNC_VI	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VI,$/;"	e	enum:pmux_func
PMUX_FUNC_VI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_VI,$/;"	e	enum:pmux_func
PMUX_FUNC_VI	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VI,$/;"	e	enum:pmux_func
PMUX_FUNC_VIMCLK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VIMCLK,$/;"	e	enum:pmux_func
PMUX_FUNC_VIMCLK2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VIMCLK2,$/;"	e	enum:pmux_func
PMUX_FUNC_VIMCLK2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_FUNC_VIMCLK2,$/;"	e	enum:pmux_func
PMUX_FUNC_VIMCLK2_ALT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VIMCLK2_ALT,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VI_ALT1,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VI_ALT1,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VI_ALT1,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VI_ALT2,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_FUNC_VI_ALT3,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_FUNC_VI_ALT3,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_ALT3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_FUNC_VI_ALT3,$/;"	e	enum:pmux_func
PMUX_FUNC_VI_SENSOR_CLK	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_VI_SENSOR_CLK,$/;"	e	enum:pmux_func
PMUX_FUNC_XIO	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_FUNC_XIO,$/;"	e	enum:pmux_func
PMUX_HSM_DISABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_HSM_DISABLE = 0,$/;"	e	enum:pmux_hsm
PMUX_HSM_ENABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_HSM_ENABLE = 1,$/;"	e	enum:pmux_hsm
PMUX_HSM_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_HSM_NONE = -1,$/;"	e	enum:pmux_hsm
PMUX_LPMD_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_LPMD_NONE = -1,$/;"	e	enum:pmux_lpmd
PMUX_LPMD_X	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_LPMD_X,$/;"	e	enum:pmux_lpmd
PMUX_LPMD_X2	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_LPMD_X2,$/;"	e	enum:pmux_lpmd
PMUX_LPMD_X4	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_LPMD_X4,$/;"	e	enum:pmux_lpmd
PMUX_LPMD_X8	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_LPMD_X8 = 0,$/;"	e	enum:pmux_lpmd
PMUX_MIPIPADCTRLGRP_COUNT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_MIPIPADCTRLGRP_COUNT,$/;"	e	enum:pmux_mipipadctrlgrp
PMUX_MIPIPADCTRLGRP_DSI_B	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_MIPIPADCTRLGRP_DSI_B,$/;"	e	enum:pmux_mipipadctrlgrp
PMUX_PINGRP_ALS_PROX_INT_PX3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_ALS_PROX_INT_PX3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_AP_READY_PV5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_AP_READY_PV5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_AP_WAKE_BT_PH3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_AP_WAKE_BT_PH3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_AP_WAKE_NFC_PH7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_AP_WAKE_NFC_PH7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ATA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_ATA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ATB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_ATB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ATC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_ATC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ATD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_ATD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ATE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_ATE,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_AUD_MCLK_PBB0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_AUD_MCLK_PBB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BATT_BCL	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BATT_BCL,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BT_RST_PH4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BT_RST_PH4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BT_WAKE_AP_PH5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BT_WAKE_AP_PH5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BUTTON_HOME_PY1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BUTTON_HOME_PY1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BUTTON_POWER_ON_PX5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BUTTON_POWER_ON_PX5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BUTTON_SLIDE_SW_PY0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BUTTON_SLIDE_SW_PY0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BUTTON_VOL_DOWN_PX7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BUTTON_VOL_DOWN_PX7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_BUTTON_VOL_UP_PX6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_BUTTON_VOL_UP_PX6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM1_MCLK_PS0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM1_MCLK_PS0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM1_PWDN_PS7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM1_PWDN_PS7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM1_STROBE_PT1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM1_STROBE_PT1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM2_MCLK_PS1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM2_MCLK_PS1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM2_PWDN_PT0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM2_PWDN_PT0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_AF_EN_PS5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM_AF_EN_PS5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_FLASH_EN_PS6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM_FLASH_EN_PS6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SCL_PBB1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SCL_PBB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SCL_PBB1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SCL_PBB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SCL_PBB1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SCL_PBB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SCL_PS2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SCL_PS2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SDA_PBB2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SDA_PBB2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SDA_PBB2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SDA_PBB2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SDA_PBB2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SDA_PBB2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_I2C_SDA_PS3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM_I2C_SDA_PS3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_MCLK_PCC0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CAM_MCLK_PCC0 = (0x284 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_MCLK_PCC0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CAM_MCLK_PCC0 = (0x284 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_MCLK_PCC0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CAM_MCLK_PCC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CAM_RST_PS4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CAM_RST_PS4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CDEV1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_CDEV1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CDEV2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_CDEV2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CK32	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_CK32,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK1_OUT_PW4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK1_OUT_PW4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK1_OUT_PW4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK1_OUT_PW4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK1_REQ_PEE2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK1_REQ_PEE2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK1_REQ_PEE2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK1_REQ_PEE2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK2_OUT_PW5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK2_OUT_PW5 = (0x68 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK2_OUT_PW5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CLK2_OUT_PW5 = (0x68 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK2_OUT_PW5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK2_OUT_PW5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK2_REQ_PCC5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK2_REQ_PCC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK2_REQ_PCC5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CLK2_REQ_PCC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK2_REQ_PCC5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK2_REQ_PCC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK3_OUT_PEE0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK3_OUT_PEE0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK3_OUT_PEE0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CLK3_OUT_PEE0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK3_OUT_PEE0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK3_OUT_PEE0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK3_REQ_PEE1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK3_REQ_PEE1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK3_REQ_PEE1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CLK3_REQ_PEE1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK3_REQ_PEE1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK3_REQ_PEE1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_IN	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK_32K_IN,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_IN	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CLK_32K_IN,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_IN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CLK_32K_IN,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_IN	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK_32K_IN,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_OUT_PA0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CLK_32K_OUT_PA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_OUT_PA0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CLK_32K_OUT_PA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_OUT_PA0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CLK_32K_OUT_PA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_32K_OUT_PY5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CLK_32K_OUT_PY5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CLK_REQ	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CLK_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CORE_PWR_REQ	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CORE_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CORE_PWR_REQ	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CORE_PWR_REQ = (0x324 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CORE_PWR_REQ	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CORE_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CORE_PWR_REQ	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CORE_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_COUNT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_COUNT,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_COUNT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_COUNT,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_COUNT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_COUNT,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_COUNT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_COUNT,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_COUNT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_COUNT,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CPU_PWR_REQ	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_CPU_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CPU_PWR_REQ	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_CPU_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CPU_PWR_REQ	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_CPU_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CPU_PWR_REQ	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CPU_PWR_REQ,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CRTP	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_CRTP,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CRT_HSYNC_PV6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CRT_HSYNC_PV6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CRT_VSYNC_PV7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_CRT_VSYNC_PV7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_CSUS	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_CSUS,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DAP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DIN_PB1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP1_DIN_PB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DIN_PN1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP1_DIN_PN1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DIN_PN1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP1_DIN_PN1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DIN_PN1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP1_DIN_PN1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DOUT_PB2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP1_DOUT_PB2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DOUT_PN2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP1_DOUT_PN2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DOUT_PN2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP1_DOUT_PN2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_DOUT_PN2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP1_DOUT_PN2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_FS_PB0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP1_FS_PB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_FS_PN0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP1_FS_PN0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_FS_PN0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP1_FS_PN0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_FS_PN0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP1_FS_PN0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_SCLK_PB3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP1_SCLK_PB3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_SCLK_PN3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP1_SCLK_PN3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_SCLK_PN3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP1_SCLK_PN3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP1_SCLK_PN3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP1_SCLK_PN3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DAP2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DIN_PA4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP2_DIN_PA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DIN_PA4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP2_DIN_PA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DIN_PA4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP2_DIN_PA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DIN_PAA2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP2_DIN_PAA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DOUT_PA5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP2_DOUT_PA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DOUT_PA5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP2_DOUT_PA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DOUT_PA5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP2_DOUT_PA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_DOUT_PAA3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP2_DOUT_PAA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_FS_PA2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP2_FS_PA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_FS_PA2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP2_FS_PA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_FS_PA2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP2_FS_PA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_FS_PAA0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP2_FS_PAA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_SCLK_PA3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP2_SCLK_PA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_SCLK_PA3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP2_SCLK_PA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_SCLK_PA3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP2_SCLK_PA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP2_SCLK_PAA1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP2_SCLK_PAA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DAP3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_DIN_PP1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP3_DIN_PP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_DIN_PP1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP3_DIN_PP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_DIN_PP1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP3_DIN_PP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_DOUT_PP2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP3_DOUT_PP2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_DOUT_PP2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP3_DOUT_PP2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_DOUT_PP2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP3_DOUT_PP2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_FS_PP0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP3_FS_PP0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_FS_PP0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP3_FS_PP0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_FS_PP0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP3_FS_PP0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_SCLK_PP3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP3_SCLK_PP3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_SCLK_PP3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP3_SCLK_PP3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP3_SCLK_PP3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP3_SCLK_PP3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DAP4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DIN_PJ5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP4_DIN_PJ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DIN_PP5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP4_DIN_PP5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DIN_PP5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP4_DIN_PP5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DIN_PP5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP4_DIN_PP5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DOUT_PJ6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP4_DOUT_PJ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DOUT_PP6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP4_DOUT_PP6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DOUT_PP6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP4_DOUT_PP6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_DOUT_PP6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP4_DOUT_PP6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_FS_PJ4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP4_FS_PJ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_FS_PP4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP4_FS_PP4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_FS_PP4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP4_FS_PP4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_FS_PP4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP4_FS_PP4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_SCLK_PJ7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DAP4_SCLK_PJ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_SCLK_PP7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DAP4_SCLK_PP7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_SCLK_PP7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP4_SCLK_PP7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP4_SCLK_PP7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DAP4_SCLK_PP7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP_MCLK1_PW4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP_MCLK1_PW4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DAP_MCLK1_REQ_PEE2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DAP_MCLK1_REQ_PEE2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DDC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC_SCL_PV4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DDC_SCL_PV4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC_SCL_PV4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DDC_SCL_PV4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC_SCL_PV4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DDC_SCL_PV4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC_SDA_PV5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DDC_SDA_PV5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC_SDA_PV5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DDC_SDA_PV5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDC_SDA_PV5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_DDC_SDA_PV5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DDRC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DDRC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DMIC1_CLK_PE0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DMIC1_CLK_PE0 = (0xa4 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DMIC1_DAT_PE1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DMIC1_DAT_PE1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DMIC2_CLK_PE2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DMIC2_CLK_PE2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DMIC2_DAT_PE3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DMIC2_DAT_PE3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DMIC3_CLK_PE4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DMIC3_CLK_PE4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DMIC3_DAT_PE5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DMIC3_DAT_PE5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DP_HPD0_PCC6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DP_HPD0_PCC6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DP_HPD_PFF0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DP_HPD_PFF0 = (0x430 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DTA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DTA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DTB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DTB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DTC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DTC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DTD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DTD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DTE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DTE,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DTF	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_DTF,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DVFS_CLK_PBB2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DVFS_CLK_PBB2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DVFS_CLK_PX2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DVFS_CLK_PX2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DVFS_CLK_PX2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DVFS_CLK_PX2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DVFS_PWM_PBB1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_DVFS_PWM_PBB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DVFS_PWM_PX0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_DVFS_PWM_PX0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_DVFS_PWM_PX0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_DVFS_PWM_PX0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SCL_PC4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SCL_PC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SCL_PC4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SCL_PC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SCL_PC4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SCL_PC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SCL_PJ1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SCL_PJ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SDA_PC5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SDA_PC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SDA_PC5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SDA_PC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SDA_PC5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SDA_PC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN1_I2C_SDA_PJ0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GEN1_I2C_SDA_PJ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SCL_PJ2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SCL_PJ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SCL_PT5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SCL_PT5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SCL_PT5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SCL_PT5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SCL_PT5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SCL_PT5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SDA_PJ3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SDA_PJ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SDA_PT6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SDA_PT6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SDA_PT6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SDA_PT6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN2_I2C_SDA_PT6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GEN2_I2C_SDA_PT6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN3_I2C_SCL_PF0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GEN3_I2C_SCL_PF0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GEN3_I2C_SDA_PF1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GEN3_I2C_SDA_PF1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GMA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GMB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GMC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GMD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GME	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GME,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A16_PJ7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_A16_PJ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A16_PJ7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_A16_PJ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A17_PB0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_A17_PB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A17_PB0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_A17_PB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A18_PB1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_A18_PB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A18_PB1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_A18_PB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A19_PK7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_A19_PK7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_A19_PK7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_A19_PK7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD0_PG0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD0_PG0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD0_PG0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD0_PG0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD10_PH2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD10_PH2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD10_PH2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD10_PH2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD11_PH3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD11_PH3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD11_PH3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD11_PH3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD12_PH4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD12_PH4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD12_PH4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD12_PH4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD13_PH5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD13_PH5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD13_PH5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD13_PH5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD14_PH6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD14_PH6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD14_PH6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD14_PH6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD15_PH7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD15_PH7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD15_PH7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD15_PH7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD1_PG1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD1_PG1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD1_PG1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD1_PG1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD2_PG2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD2_PG2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD2_PG2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD2_PG2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD3_PG3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD3_PG3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD3_PG3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD3_PG3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD4_PG4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD4_PG4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD4_PG4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD4_PG4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD5_PG5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD5_PG5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD5_PG5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD5_PG5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD6_PG6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD6_PG6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD6_PG6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD6_PG6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD7_PG7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD7_PG7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD7_PG7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD7_PG7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD8_PH0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD8_PH0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD8_PH0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD8_PH0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD9_PH1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_AD9_PH1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_AD9_PH1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_AD9_PH1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_ADV_N_PK0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_ADV_N_PK0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_ADV_N_PK0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_ADV_N_PK0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CLK_LB	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CLK_LB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CLK_LB	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GMI_CLK_LB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CLK_PK1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CLK_PK1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CLK_PK1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CLK_PK1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS0_N_PJ0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS0_N_PJ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS0_N_PJ0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS0_N_PJ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS1_N_PJ2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS1_N_PJ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS1_N_PJ2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS1_N_PJ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS2_N_PK3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS2_N_PK3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS2_N_PK3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS2_N_PK3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS3_N_PK4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS3_N_PK4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS3_N_PK4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS3_N_PK4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS4_N_PK2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS4_N_PK2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS4_N_PK2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS4_N_PK2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS6_N_PI3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS6_N_PI3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS6_N_PI3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS6_N_PI3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS7_N_PI6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_CS7_N_PI6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_CS7_N_PI6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_CS7_N_PI6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_DQS_PI2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_DQS_PI2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_DQS_P_PJ3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_DQS_P_PJ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_IORDY_PI5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_IORDY_PI5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_IORDY_PI5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_IORDY_PI5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_OE_N_PI1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_OE_N_PI1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_OE_N_PI1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_OE_N_PI1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_RST_N_PI4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_RST_N_PI4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_RST_N_PI4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_RST_N_PI4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_WAIT_PI7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_WAIT_PI7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_WAIT_PI7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_WAIT_PI7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_WP_N_PC7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_WP_N_PC7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_WP_N_PC7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_WP_N_PC7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_WR_N_PI0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GMI_WR_N_PI0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GMI_WR_N_PI0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_GMI_WR_N_PI0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_W2_AUD_PW2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_W2_AUD_PW2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_W2_AUD_PW2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_W2_AUD_PW2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_W3_AUD_PW3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_W3_AUD_PW3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_W3_AUD_PW3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_W3_AUD_PW3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X1_AUD_PBB3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GPIO_X1_AUD_PBB3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X1_AUD_PX1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_X1_AUD_PX1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X1_AUD_PX1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_X1_AUD_PX1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X3_AUD_PBB4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GPIO_X3_AUD_PBB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X3_AUD_PX3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_X3_AUD_PX3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X3_AUD_PX3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_X3_AUD_PX3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X4_AUD_PX4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_X4_AUD_PX4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X4_AUD_PX4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_X4_AUD_PX4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X5_AUD_PX5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_X5_AUD_PX5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X5_AUD_PX5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_X5_AUD_PX5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X6_AUD_PX6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_X6_AUD_PX6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X6_AUD_PX6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_X6_AUD_PX6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X7_AUD_PX7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_GPIO_X7_AUD_PX7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPIO_X7_AUD_PX7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_GPIO_X7_AUD_PX7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPS_EN_PI2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GPS_EN_PI2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPS_RST_PI3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_GPS_RST_PI3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPU	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GPU,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPU7	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GPU7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_GPV	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_GPV,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDINT	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_HDINT,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_CEC_PCC0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_HDMI_CEC_PCC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_CEC_PEE3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_HDMI_CEC_PEE3 = (0x3e0 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_CEC_PEE3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_HDMI_CEC_PEE3 = (0x3e0 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_CEC_PEE3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_HDMI_CEC_PEE3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_INT_DP_HPD_PCC1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_HDMI_INT_DP_HPD_PCC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_INT_PN7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_HDMI_INT_PN7 = (0x110 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_INT_PN7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_HDMI_INT_PN7 = (0x110 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_HDMI_INT_PN7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_HDMI_INT_PN7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_I2CP	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_I2CP,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_IRRX	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_IRRX,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_IRTX	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_IRTX,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_JTAG_RTCK	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_JTAG_RTCK,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_JTAG_RTCK	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_JTAG_RTCK,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_JTAG_RTCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_JTAG_RTCK,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_JTAG_RTCK_PU7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_JTAG_RTCK_PU7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_KBCA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCA	arch/arm/mach-tegra/tegra20/funcmux.c	/^			enum pmux_pingrp grp[] = {PMUX_PINGRP_KBCA,$/;"	e	enum:funcmux_select::grp	file:
PMUX_PINGRP_KBCB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_KBCB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCB	arch/arm/mach-tegra/tegra20/funcmux.c	/^				PMUX_PINGRP_KBCB, PMUX_PINGRP_KBCC,$/;"	e	enum:funcmux_select::grp	file:
PMUX_PINGRP_KBCC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_KBCC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCC	arch/arm/mach-tegra/tegra20/funcmux.c	/^				PMUX_PINGRP_KBCB, PMUX_PINGRP_KBCC,$/;"	e	enum:funcmux_select::grp	file:
PMUX_PINGRP_KBCD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_KBCD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCD	arch/arm/mach-tegra/tegra20/funcmux.c	/^				PMUX_PINGRP_KBCD, PMUX_PINGRP_KBCE,$/;"	e	enum:funcmux_select::grp	file:
PMUX_PINGRP_KBCE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_KBCE,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCE	arch/arm/mach-tegra/tegra20/funcmux.c	/^				PMUX_PINGRP_KBCD, PMUX_PINGRP_KBCE,$/;"	e	enum:funcmux_select::grp	file:
PMUX_PINGRP_KBCF	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_KBCF,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KBCF	arch/arm/mach-tegra/tegra20/funcmux.c	/^				PMUX_PINGRP_KBCF};$/;"	e	enum:funcmux_select::grp	file:
PMUX_PINGRP_KB_COL0_PQ0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL0_PQ0 = (0x2fc \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL0_PQ0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL0_PQ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL0_PQ0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL0_PQ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL1_PQ1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL1_PQ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL1_PQ1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL1_PQ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL1_PQ1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL1_PQ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL2_PQ2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL2_PQ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL2_PQ2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL2_PQ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL2_PQ2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL2_PQ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL3_PQ3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL3_PQ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL3_PQ3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL3_PQ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL3_PQ3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL3_PQ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL4_PQ4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL4_PQ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL4_PQ4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL4_PQ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL4_PQ4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL4_PQ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL5_PQ5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL5_PQ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL5_PQ5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL5_PQ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL5_PQ5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL5_PQ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL6_PQ6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL6_PQ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL6_PQ6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL6_PQ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL6_PQ6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL6_PQ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL7_PQ7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_COL7_PQ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL7_PQ7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_COL7_PQ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_COL7_PQ7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_COL7_PQ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW0_PR0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW0_PR0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW0_PR0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW0_PR0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW0_PR0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW0_PR0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW10_PS2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW10_PS2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW10_PS2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW10_PS2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW10_PS2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW10_PS2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW11_PS3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW11_PS3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW11_PS3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW11_PS3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW12_PS4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW12_PS4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW12_PS4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW12_PS4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW13_PS5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW13_PS5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW13_PS5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW13_PS5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW14_PS6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW14_PS6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW14_PS6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW14_PS6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW15_PS7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW15_PS7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW15_PS7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW15_PS7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW16_PT0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW16_PT0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW17_PT1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW17_PT1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW1_PR1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW1_PR1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW1_PR1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW1_PR1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW1_PR1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW1_PR1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW2_PR2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW2_PR2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW2_PR2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW2_PR2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW2_PR2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW2_PR2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW3_PR3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW3_PR3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW3_PR3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW3_PR3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW3_PR3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW3_PR3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW4_PR4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW4_PR4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW4_PR4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW4_PR4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW4_PR4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW4_PR4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW5_PR5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW5_PR5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW5_PR5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW5_PR5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW5_PR5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW5_PR5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW6_PR6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW6_PR6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW6_PR6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW6_PR6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW6_PR6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW6_PR6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW7_PR7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW7_PR7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW7_PR7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW7_PR7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW7_PR7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW7_PR7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW8_PS0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW8_PS0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW8_PS0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW8_PS0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW8_PS0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW8_PS0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW9_PS1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_KB_ROW9_PS1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW9_PS1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_KB_ROW9_PS1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_KB_ROW9_PS1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_KB_ROW9_PS1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_BL_EN_PV1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_LCD_BL_EN_PV1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_BL_PWM_PV0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_LCD_BL_PWM_PV0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_CS0_N_PN4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_CS0_N_PN4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_CS1_N_PW0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_CS1_N_PW0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D0_PE0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D0_PE0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D10_PF2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D10_PF2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D11_PF3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D11_PF3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D12_PF4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D12_PF4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D13_PF5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D13_PF5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D14_PF6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D14_PF6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D15_PF7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D15_PF7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D16_PM0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D16_PM0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D17_PM1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D17_PM1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D18_PM2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D18_PM2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D19_PM3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D19_PM3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D1_PE1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D1_PE1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D20_PM4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D20_PM4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D21_PM5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D21_PM5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D22_PM6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D22_PM6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D23_PM7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D23_PM7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D2_PE2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D2_PE2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D3_PE3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D3_PE3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D4_PE4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D4_PE4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D5_PE5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D5_PE5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D6_PE6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D6_PE6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D7_PE7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D7_PE7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D8_PF0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D8_PF0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_D9_PF1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_D9_PF1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_DC0_PN6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_DC0_PN6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_DC1_PD2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_DC1_PD2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_DE_PJ1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_DE_PJ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_GPIO1_PV3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_LCD_GPIO1_PV3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_GPIO2_PV4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_LCD_GPIO2_PV4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_HSYNC_PJ3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_HSYNC_PJ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_M1_PW1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_M1_PW1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_PCLK_PB3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_PCLK_PB3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_PWR0_PB2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_PWR0_PB2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_PWR1_PC1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_PWR1_PC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_PWR2_PC6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_PWR2_PC6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_RST_PV2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_LCD_RST_PV2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_SCK_PZ4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_SCK_PZ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_SDIN_PZ2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_SDIN_PZ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_SDOUT_PN5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_SDOUT_PN5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_TE_PY2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_LCD_TE_PY2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_VSYNC_PJ4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_VSYNC_PJ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCD_WR_N_PZ3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_LCD_WR_N_PZ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LCSN	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LCSN,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD10	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD10,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD11	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD11,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD12	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD12,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD13	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD13,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD14	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD14,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD15	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD15,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD16	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD16,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD17	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD17,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD5	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD6	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD7	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD8	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD8,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LD9	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LD9,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LDC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LDC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LDI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LDI,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LHP0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LHP0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LHP1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LHP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LHP2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LHP2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LHS	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LHS,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LM0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LM0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LM1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LM1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LPP	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LPP,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LPW0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LPW0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LPW1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LPW1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LPW2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LPW2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LSC0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LSC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LSC1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LSC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LSCK	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LSCK,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LSDA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LSDA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LSDI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LSDI,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LSPI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LSPI,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LVP0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LVP0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LVP1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LVP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_LVS	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_LVS,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_MODEM_WAKE_AP_PX0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_MODEM_WAKE_AP_PX0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_MOTION_INT_PX2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_MOTION_INT_PX2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_NFC_EN_PI0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_NFC_EN_PI0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_NFC_INT_PI1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_NFC_INT_PI1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_OWC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_OWC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_OWR	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_OWR,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_OWR	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_OWR,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_OWR	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_OWR,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PA6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PA6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PB0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PB1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PB1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PBB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PBB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PBB0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PBB3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PBB3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PBB3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PBB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PBB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PBB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PBB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PBB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PBB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PBB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PBB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PBB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PBB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PBB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PBB7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PBB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PC7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PC7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PCC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PCC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PCC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PCC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PCC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PCC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PCC7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PCC7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PE6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PE6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PE7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PE7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_CLKREQ_N_PA1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PEX_L0_CLKREQ_N_PA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_PRSNT_N_PDD0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L0_PRSNT_N_PDD0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_RST_N_PA0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PEX_L0_RST_N_PA0 = (0x38 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_RST_N_PDD1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PEX_L0_RST_N_PDD1 = (0x3bc \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L0_RST_N_PDD1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L0_RST_N_PDD1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_CLKREQ_N_PA4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PEX_L1_CLKREQ_N_PA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_PRSNT_N_PDD4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L1_PRSNT_N_PDD4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_RST_N_PA3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PEX_L1_RST_N_PA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_RST_N_PDD5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PEX_L1_RST_N_PDD5 = (0x3cc \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L1_RST_N_PDD5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L1_RST_N_PDD5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L2_CLKREQ_N_PCC7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L2_CLKREQ_N_PCC7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L2_PRSNT_N_PDD7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L2_PRSNT_N_PDD7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_L2_RST_N_PCC6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_L2_RST_N_PCC6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_WAKE_N_PA2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PEX_WAKE_N_PA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_WAKE_N_PDD3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PEX_WAKE_N_PDD3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PEX_WAKE_N_PDD3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PEX_WAKE_N_PDD3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PFF2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PFF2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PG7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PG7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PH6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PH7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PH7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PI7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PI7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PJ0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PJ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PJ2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PJ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PJ7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PJ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PK0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PK1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PK2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PK3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PK4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PK7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PK7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PK7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PL0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PL0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PL1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PL1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PMC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PMC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PMCA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PMCA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PMCB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PMCB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PMCC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PMCC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PMCD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PMCD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PMCE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PMCE,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PTA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_PTA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PU6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PU6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PU6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PU6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PV0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PV0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PV0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PV1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PV1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PV1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PV2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PV3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PV3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SCL_PY3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SCL_PY3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SCL_PZ6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SCL_PZ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SCL_PZ6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SCL_PZ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SCL_PZ6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SCL_PZ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SDA_PY4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SDA_PY4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SDA_PZ7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SDA_PZ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SDA_PZ7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SDA_PZ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_I2C_SDA_PZ7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PWR_I2C_SDA_PZ7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_INT_N	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_PWR_INT_N,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_INT_N	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_PWR_INT_N,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_INT_N	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PWR_INT_N,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PWR_INT_N	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_PWR_INT_N,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PZ0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PZ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PZ1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PZ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PZ2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PZ2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PZ3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PZ3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PZ4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PZ4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_PZ5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_PZ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_QSPI_CS_N_PEE1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_QSPI_CS_N_PEE1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_QSPI_IO0_PEE2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_QSPI_IO0_PEE2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_QSPI_IO1_PEE3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_QSPI_IO1_PEE3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_QSPI_IO2_PEE4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_QSPI_IO2_PEE4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_QSPI_IO3_PEE5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_QSPI_IO3_PEE5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_QSPI_SCK_PEE0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_QSPI_SCK_PEE0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESERVED0	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_RESERVED0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESERVED1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_RESERVED1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESERVED2	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_RESERVED2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESERVED3	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_RESERVED3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESERVED4	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_RESERVED4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESET_OUT_N	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_RESET_OUT_N,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RESET_OUT_N	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_RESET_OUT_N,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_RM	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_RM,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SATA_LED_ACTIVE_PA5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SATA_LED_ACTIVE_PA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SDB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SDC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SDD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDIO1	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SDIO1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CLK_PM0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CLK_PM0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CLK_PZ0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CLK_PZ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CLK_PZ0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CLK_PZ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CLK_PZ0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CLK_PZ0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CMD_PM1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CMD_PM1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CMD_PZ1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CMD_PZ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CMD_PZ1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CMD_PZ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_CMD_PZ1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC1_CMD_PZ1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT0_PM5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT0_PM5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT0_PY7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT0_PY7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT0_PY7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT0_PY7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT0_PY7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT0_PY7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT1_PM4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT1_PM4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT1_PY6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT1_PY6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT1_PY6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT1_PY6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT1_PY6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT1_PY6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT2_PM3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT2_PM3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT2_PY5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT2_PY5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT2_PY5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT2_PY5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT2_PY5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT2_PY5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT3_PM2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT3_PM2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT3_PY4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT3_PY4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT3_PY4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT3_PY4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_DAT3_PY4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC1_DAT3_PY4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_WP_N_PV3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC1_WP_N_PV3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC1_WP_N_PV3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC1_WP_N_PV3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CD_N_PV2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CD_N_PV2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CD_N_PV2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CD_N_PV2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_PA6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_PA6 = (0x390 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_PA6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_PA6 = (0x390 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_PA6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_PA6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CLK_PP0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CLK_PP0 = (0x1c \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CMD_PA7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CMD_PA7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CMD_PA7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CMD_PA7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CMD_PA7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CMD_PA7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_CMD_PP1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC3_CMD_PP1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT0_PB7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT0_PB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT0_PB7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT0_PB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT0_PB7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT0_PB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT0_PP5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT0_PP5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT1_PB6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT1_PB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT1_PB6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT1_PB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT1_PB6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT1_PB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT1_PP4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT1_PP4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT2_PB5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT2_PB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT2_PB5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT2_PB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT2_PB5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT2_PB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT2_PP3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT2_PP3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT3_PB4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT3_PB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT3_PB4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT3_PB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT3_PB4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT3_PB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT3_PP2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT3_PP2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT4_PD1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT4_PD1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT5_PD0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT5_PD0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT6_PD3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT6_PD3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC3_DAT7_PD4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC3_DAT7_PD4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_CLK_PCC4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_CLK_PCC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_CLK_PCC4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_CLK_PCC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_CLK_PCC4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_CLK_PCC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_CMD_PT7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_CMD_PT7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_CMD_PT7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_CMD_PT7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_CMD_PT7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_CMD_PT7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT0_PAA0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT0_PAA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT0_PAA0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT0_PAA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT0_PAA0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT0_PAA0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT1_PAA1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT1_PAA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT1_PAA1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT1_PAA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT1_PAA1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT1_PAA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT2_PAA2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT2_PAA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT2_PAA2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT2_PAA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT2_PAA2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT2_PAA2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT3_PAA3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT3_PAA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT3_PAA3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT3_PAA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT3_PAA3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT3_PAA3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT4_PAA4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT4_PAA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT4_PAA4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT4_PAA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT4_PAA4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT4_PAA4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT5_PAA5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT5_PAA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT5_PAA5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT5_PAA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT5_PAA5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT5_PAA5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT6_PAA6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT6_PAA6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT6_PAA6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT6_PAA6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT6_PAA6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT6_PAA6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT7_PAA7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT7_PAA7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT7_PAA7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT7_PAA7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_DAT7_PAA7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_DAT7_PAA7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SDMMC4_RST_N_PCC3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SDMMC4_RST_N_PCC3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SHUTDOWN	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SHUTDOWN,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SLXA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SLXA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SLXC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SLXC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SLXD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SLXD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SLXK	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SLXK,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDI	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPDI,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_IN_PCC3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPDIF_IN_PCC3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_IN_PK6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SPDIF_IN_PK6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_IN_PK6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SPDIF_IN_PK6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_IN_PK6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPDIF_IN_PK6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_OUT_PCC2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPDIF_OUT_PCC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_OUT_PK5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SPDIF_OUT_PK5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_OUT_PK5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_SPDIF_OUT_PK5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDIF_OUT_PK5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPDIF_OUT_PK5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPDO	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPDO,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_CS0_N_PX6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI1_CS0_N_PX6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_CS0_PC3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI1_CS0_PC3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_CS1_PC4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI1_CS1_PC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_MISO_PC1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI1_MISO_PC1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_MISO_PX7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI1_MISO_PX7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_MOSI_PC0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI1_MOSI_PC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_MOSI_PX4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI1_MOSI_PX4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_SCK_PC2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI1_SCK_PC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI1_SCK_PX5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI1_SCK_PX5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_CS0_N_PX3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI2_CS0_N_PX3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_CS0_PB7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI2_CS0_PB7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_CS1_N_PW2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI2_CS1_N_PW2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_CS1_PDD0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI2_CS1_PDD0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_CS2_N_PW3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI2_CS2_N_PW3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_MISO_PB5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI2_MISO_PB5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_MISO_PX1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI2_MISO_PX1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_MOSI_PB4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI2_MOSI_PB4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_MOSI_PX0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI2_MOSI_PX0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_SCK_PB6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI2_SCK_PB6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI2_SCK_PX2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SPI2_SCK_PX2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI4_CS0_PC6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI4_CS0_PC6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI4_MISO_PD0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI4_MISO_PD0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI4_MOSI_PC7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI4_MOSI_PC7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPI4_SCK_PC5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_SPI4_SCK_PC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPID	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPID,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIE	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIE,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIF	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIF,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIG	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIG,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SPIH	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_SPIH,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SYS_CLK_REQ_PZ5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_SYS_CLK_REQ_PZ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_SYS_CLK_REQ_PZ5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_SYS_CLK_REQ_PZ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_TEMP_ALERT_PX4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_TEMP_ALERT_PX4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_TOUCH_CLK_PV7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_TOUCH_CLK_PV7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_TOUCH_INT_PX1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_TOUCH_INT_PX1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_TOUCH_RST_PV6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_TOUCH_RST_PV6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UAA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UAA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UAB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UAB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UAC	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UAC,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UAD	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UAD,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART1_CTS_PU3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART1_CTS_PU3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART1_RTS_PU2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART1_RTS_PU2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART1_RX_PU1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART1_RX_PU1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART1_TX_PU0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART1_TX_PU0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_CTS_N_PJ5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART2_CTS_N_PJ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_CTS_N_PJ5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART2_CTS_N_PJ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_CTS_N_PJ5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART2_CTS_N_PJ5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_CTS_PG3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART2_CTS_PG3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RTS_N_PJ6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART2_RTS_N_PJ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RTS_N_PJ6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART2_RTS_N_PJ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RTS_N_PJ6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART2_RTS_N_PJ6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RTS_PG2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART2_RTS_PG2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RXD_PC3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART2_RXD_PC3 = (0x164 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RXD_PC3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART2_RXD_PC3 = (0x164 \/ 4),$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RXD_PC3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART2_RXD_PC3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_RX_PG1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART2_RX_PG1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_TXD_PC2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART2_TXD_PC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_TXD_PC2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART2_TXD_PC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_TXD_PC2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART2_TXD_PC2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART2_TX_PG0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART2_TX_PG0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_CTS_N_PA1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART3_CTS_N_PA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_CTS_N_PA1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART3_CTS_N_PA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_CTS_N_PA1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART3_CTS_N_PA1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_CTS_PD4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART3_CTS_PD4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RTS_N_PC0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART3_RTS_N_PC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RTS_N_PC0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART3_RTS_N_PC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RTS_N_PC0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART3_RTS_N_PC0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RTS_PD3	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART3_RTS_PD3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RXD_PW7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART3_RXD_PW7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RXD_PW7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART3_RXD_PW7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RXD_PW7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART3_RXD_PW7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_RX_PD2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART3_RX_PD2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_TXD_PW6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_UART3_TXD_PW6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_TXD_PW6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_UART3_TXD_PW6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_TXD_PW6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_UART3_TXD_PW6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART3_TX_PD1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART3_TX_PD1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART4_CTS_PI7	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART4_CTS_PI7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART4_RTS_PI6	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART4_RTS_PI6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART4_RX_PI5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART4_RX_PI5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UART4_TX_PI4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_UART4_TX_PI4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UCA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UCA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UCB	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UCB,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_UDA	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_UDA,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_CLK_PY0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_CLK_PY0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_CLK_PY0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_CLK_PY0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_CLK_PY0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_CLK_PY0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA0_PO1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA0_PO1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA0_PO1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA0_PO1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA0_PO1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA0_PO1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA1_PO2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA1_PO2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA1_PO2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA1_PO2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA1_PO2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA1_PO2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA2_PO3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA2_PO3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA2_PO3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA2_PO3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA2_PO3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA2_PO3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA3_PO4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA3_PO4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA3_PO4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA3_PO4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA3_PO4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA3_PO4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA4_PO5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA4_PO5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA4_PO5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA4_PO5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA4_PO5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA4_PO5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA5_PO6	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA5_PO6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA5_PO6	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA5_PO6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA5_PO6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA5_PO6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA6_PO7	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA6_PO7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA6_PO7	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA6_PO7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA6_PO7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA6_PO7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA7_PO0	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA7_PO0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA7_PO0	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA7_PO0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DATA7_PO0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DATA7_PO0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DIR_PY1	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_DIR_PY1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DIR_PY1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_DIR_PY1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_DIR_PY1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_DIR_PY1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_NXT_PY2	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_NXT_PY2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_NXT_PY2	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_NXT_PY2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_NXT_PY2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_NXT_PY2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_STP_PY3	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_ULPI_STP_PY3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_STP_PY3	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_ULPI_STP_PY3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_ULPI_STP_PY3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_ULPI_STP_PY3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN0_PCC4	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN0_PCC4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN0_PN4	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN0_PN4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN0_PN4	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN0_PN4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN1_PCC5	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN1_PCC5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN1_PN5	arch/arm/include/asm/arch-tegra114/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN1_PN5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN1_PN5	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN1_PN5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_USB_VBUS_EN2_PFF1	arch/arm/include/asm/arch-tegra124/pinmux.h	/^	PMUX_PINGRP_USB_VBUS_EN2_PFF1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D0_PT4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D0_PT4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D10_PT2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D10_PT2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D11_PT3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D11_PT3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D1_PD5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D1_PD5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D2_PL0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D2_PL0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D3_PL1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D3_PL1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D4_PL2	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D4_PL2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D5_PL3	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D5_PL3,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D6_PL4	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D6_PL4,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D7_PL5	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D7_PL5,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D8_PL6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D8_PL6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_D9_PL7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_D9_PL7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_HSYNC_PD7	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_HSYNC_PD7,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_MCLK_PT1	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_MCLK_PT1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_PCLK_PT0	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_PCLK_PT0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_VI_VSYNC_PD6	arch/arm/include/asm/arch-tegra30/pinmux.h	/^	PMUX_PINGRP_VI_VSYNC_PD6,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_WIFI_EN_PH0	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_WIFI_EN_PH0,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_WIFI_RST_PH1	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_WIFI_RST_PH1,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_WIFI_WAKE_AP_PH2	arch/arm/include/asm/arch-tegra210/pinmux.h	/^	PMUX_PINGRP_WIFI_WAKE_AP_PH2,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_XM2C	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_XM2C,$/;"	e	enum:pmux_pingrp
PMUX_PINGRP_XM2D	arch/arm/include/asm/arch-tegra20/pinmux.h	/^	PMUX_PINGRP_XM2D,$/;"	e	enum:pmux_pingrp
PMUX_PIN_E_IO_HV_DEFAULT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_E_IO_HV_DEFAULT = 0,$/;"	e	enum:pmux_pin_e_io_hv
PMUX_PIN_E_IO_HV_HIGH	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_E_IO_HV_HIGH,$/;"	e	enum:pmux_pin_e_io_hv
PMUX_PIN_E_IO_HV_NORMAL	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_E_IO_HV_NORMAL,$/;"	e	enum:pmux_pin_e_io_hv
PMUX_PIN_INPUT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_INPUT = 1,$/;"	e	enum:pmux_pin_io
PMUX_PIN_IO_RESET_DEFAULT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_IO_RESET_DEFAULT = 0,$/;"	e	enum:pmux_pin_ioreset
PMUX_PIN_IO_RESET_DISABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_IO_RESET_DISABLE,$/;"	e	enum:pmux_pin_ioreset
PMUX_PIN_IO_RESET_ENABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_IO_RESET_ENABLE,$/;"	e	enum:pmux_pin_ioreset
PMUX_PIN_LOCK_DEFAULT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_LOCK_DEFAULT = 0,$/;"	e	enum:pmux_pin_lock
PMUX_PIN_LOCK_DISABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_LOCK_DISABLE,$/;"	e	enum:pmux_pin_lock
PMUX_PIN_LOCK_ENABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_LOCK_ENABLE,$/;"	e	enum:pmux_pin_lock
PMUX_PIN_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_NONE,$/;"	e	enum:pmux_pin_io
PMUX_PIN_OD_DEFAULT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_OD_DEFAULT = 0,$/;"	e	enum:pmux_pin_od
PMUX_PIN_OD_DISABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_OD_DISABLE,$/;"	e	enum:pmux_pin_od
PMUX_PIN_OD_ENABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_OD_ENABLE,$/;"	e	enum:pmux_pin_od
PMUX_PIN_OUTPUT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_OUTPUT = 0,$/;"	e	enum:pmux_pin_io
PMUX_PIN_RCV_SEL_DEFAULT	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_RCV_SEL_DEFAULT = 0,$/;"	e	enum:pmux_pin_rcv_sel
PMUX_PIN_RCV_SEL_HIGH	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_RCV_SEL_HIGH,$/;"	e	enum:pmux_pin_rcv_sel
PMUX_PIN_RCV_SEL_NORMAL	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PIN_RCV_SEL_NORMAL,$/;"	e	enum:pmux_pin_rcv_sel
PMUX_PULL_DOWN	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PULL_DOWN,$/;"	e	enum:pmux_pull
PMUX_PULL_NORMAL	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PULL_NORMAL = 0,$/;"	e	enum:pmux_pull
PMUX_PULL_UP	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_PULL_UP,$/;"	e	enum:pmux_pull
PMUX_SCHMT_DISABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_SCHMT_DISABLE = 0,$/;"	e	enum:pmux_schmt
PMUX_SCHMT_ENABLE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_SCHMT_ENABLE = 1,$/;"	e	enum:pmux_schmt
PMUX_SCHMT_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_SCHMT_NONE = -1,$/;"	e	enum:pmux_schmt
PMUX_SLWF_MAX	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_SLWF_MAX	/;"	d
PMUX_SLWF_MIN	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_SLWF_MIN	/;"	d
PMUX_SLWF_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_SLWF_NONE	/;"	d
PMUX_SLWR_MAX	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_SLWR_MAX	/;"	d
PMUX_SLWR_MIN	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_SLWR_MIN	/;"	d
PMUX_SLWR_NONE	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define PMUX_SLWR_NONE	/;"	d
PMUX_TRI_NORMAL	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_TRI_NORMAL = 0,$/;"	e	enum:pmux_tristate
PMUX_TRI_TRISTATE	arch/arm/include/asm/arch-tegra/pinmux.h	/^	PMUX_TRI_TRISTATE = 1,$/;"	e	enum:pmux_tristate
PMU_BASE	arch/arm/mach-rockchip/rk3288-board.c	/^#define PMU_BASE	/;"	d	file:
PMU_BSC_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define PMU_BSC_BASE_ADDR	/;"	d
PMU_BSC_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define PMU_BSC_BASE_ADDR	/;"	d
PMU_DEBUG_CLKOUT_SEL_MASK	arch/arm/mach-exynos/include/mach/power.h	/^#define PMU_DEBUG_CLKOUT_SEL_MASK /;"	d
PMU_DEBUG_XXTI	arch/arm/mach-exynos/include/mach/power.h	/^#define PMU_DEBUG_XXTI /;"	d
PMU_GPIO0_A	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	PMU_GPIO0_A	= 0,$/;"	e	enum:__anon190ff88a0103
PMU_GPIO0_B	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	PMU_GPIO0_B,$/;"	e	enum:__anon190ff88a0103
PMU_GPIO0_C	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	PMU_GPIO0_C,$/;"	e	enum:__anon190ff88a0103
PMU_GPIO0_D	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	PMU_GPIO0_D,$/;"	e	enum:__anon190ff88a0103
PMU_I2C_ADDRESS	board/avionic-design/common/tamonten-ng.c	/^#define PMU_I2C_ADDRESS	/;"	d	file:
PMU_I2C_ADDRESS	board/nvidia/cardhu/cardhu.c	/^#define PMU_I2C_ADDRESS	/;"	d	file:
PMU_I2C_ADDRESS	board/nvidia/dalmore/dalmore.c	/^#define PMU_I2C_ADDRESS	/;"	d	file:
PMU_I2C_ADDRESS	board/toradex/apalis_t30/apalis_t30.c	/^#define PMU_I2C_ADDRESS	/;"	d	file:
PMU_I2C_ADDRESS	board/toradex/colibri_t20/colibri_t20.c	/^#define PMU_I2C_ADDRESS	/;"	d	file:
PMU_LDO5	board/avionic-design/common/tamonten-ng.c	/^#define PMU_LDO5(/;"	d	file:
PMU_LOWPWR_CTRL_CLR_CONTROL0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CONTROL0(/;"	d
PMU_LOWPWR_CTRL_CLR_CONTROL0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CONTROL0_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_CONTROL0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CONTROL0_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_CONTROL1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CONTROL1(/;"	d
PMU_LOWPWR_CTRL_CLR_CONTROL1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CONTROL1_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_CONTROL1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CONTROL1_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_RSVD0(/;"	d
PMU_LOWPWR_CTRL_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_RSVD0_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_RSVD0_SHIFT /;"	d
PMU_LOWPWR_CTRL_CLR_STOP_MODE_CONFIG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_STOP_MODE_CONFIG(/;"	d
PMU_LOWPWR_CTRL_CLR_STOP_MODE_CONFIG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_STOP_MODE_CONFIG_MASK /;"	d
PMU_LOWPWR_CTRL_CLR_STOP_MODE_CONFIG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CLR_STOP_MODE_CONFIG_SHIFT /;"	d
PMU_LOWPWR_CTRL_CONTROL0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CONTROL0(/;"	d
PMU_LOWPWR_CTRL_CONTROL0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CONTROL0_MASK /;"	d
PMU_LOWPWR_CTRL_CONTROL0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CONTROL0_SHIFT /;"	d
PMU_LOWPWR_CTRL_CONTROL1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CONTROL1(/;"	d
PMU_LOWPWR_CTRL_CONTROL1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CONTROL1_MASK /;"	d
PMU_LOWPWR_CTRL_CONTROL1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CONTROL1_SHIFT /;"	d
PMU_LOWPWR_CTRL_CPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_CPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_CPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_GPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_GPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_GPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_GPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_L1_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_L1_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_L1_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_L1_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_L2_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_L2_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_L2_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_L2_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_MIX_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_MIX_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_MIX_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_MIX_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_RSVD0(/;"	d
PMU_LOWPWR_CTRL_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_RSVD0_MASK /;"	d
PMU_LOWPWR_CTRL_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_RSVD0_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_CONTROL0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CONTROL0(/;"	d
PMU_LOWPWR_CTRL_SET_CONTROL0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CONTROL0_MASK /;"	d
PMU_LOWPWR_CTRL_SET_CONTROL0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CONTROL0_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_CONTROL1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CONTROL1(/;"	d
PMU_LOWPWR_CTRL_SET_CONTROL1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CONTROL1_MASK /;"	d
PMU_LOWPWR_CTRL_SET_CONTROL1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CONTROL1_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_L1_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_L1_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_L2_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_L2_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_RSVD0(/;"	d
PMU_LOWPWR_CTRL_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_RSVD0_MASK /;"	d
PMU_LOWPWR_CTRL_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_RSVD0_SHIFT /;"	d
PMU_LOWPWR_CTRL_SET_STOP_MODE_CONFIG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_STOP_MODE_CONFIG(/;"	d
PMU_LOWPWR_CTRL_SET_STOP_MODE_CONFIG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_STOP_MODE_CONFIG_MASK /;"	d
PMU_LOWPWR_CTRL_SET_STOP_MODE_CONFIG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_SET_STOP_MODE_CONFIG_SHIFT /;"	d
PMU_LOWPWR_CTRL_STOP_MODE_CONFIG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_STOP_MODE_CONFIG(/;"	d
PMU_LOWPWR_CTRL_STOP_MODE_CONFIG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_STOP_MODE_CONFIG_MASK /;"	d
PMU_LOWPWR_CTRL_STOP_MODE_CONFIG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_STOP_MODE_CONFIG_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_CONTROL0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CONTROL0(/;"	d
PMU_LOWPWR_CTRL_TOG_CONTROL0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CONTROL0_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_CONTROL0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CONTROL0_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_CONTROL1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CONTROL1(/;"	d
PMU_LOWPWR_CTRL_TOG_CONTROL1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CONTROL1_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_CONTROL1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CONTROL1_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_RSVD0(/;"	d
PMU_LOWPWR_CTRL_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_RSVD0_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_RSVD0_SHIFT /;"	d
PMU_LOWPWR_CTRL_TOG_STOP_MODE_CONFIG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_STOP_MODE_CONFIG(/;"	d
PMU_LOWPWR_CTRL_TOG_STOP_MODE_CONFIG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_STOP_MODE_CONFIG_MASK /;"	d
PMU_LOWPWR_CTRL_TOG_STOP_MODE_CONFIG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_LOWPWR_CTRL_TOG_STOP_MODE_CONFIG_SHIFT /;"	d
PMU_MISC2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define PMU_MISC2	/;"	d
PMU_MISC2_AUDIO_DIV	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define PMU_MISC2_AUDIO_DIV(/;"	d
PMU_PCLK_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	PMU_PCLK_DIV_CON_MASK		= 0x1f,$/;"	e	enum:__anon06b9221d0103	file:
PMU_PCLK_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	PMU_PCLK_DIV_CON_SHIFT		= 0,$/;"	e	enum:__anon06b9221d0103	file:
PMU_PCLK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PMU_PCLK_HZ	/;"	d
PMU_PDLLCR0_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define PMU_PDLLCR0_A	/;"	d	file:
PMU_REF_CLR_LPBG_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_LPBG_SEL_MASK /;"	d
PMU_REF_CLR_LPBG_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_LPBG_SEL_SHIFT /;"	d
PMU_REF_CLR_LPBG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_LPBG_TEST_MASK /;"	d
PMU_REF_CLR_LPBG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_LPBG_TEST_SHIFT /;"	d
PMU_REF_CLR_REFTOP_BIAS_TST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_BIAS_TST(/;"	d
PMU_REF_CLR_REFTOP_BIAS_TST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_BIAS_TST_MASK /;"	d
PMU_REF_CLR_REFTOP_BIAS_TST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_BIAS_TST_SHIFT /;"	d
PMU_REF_CLR_REFTOP_IBIAS_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_IBIAS_OFF_MASK /;"	d
PMU_REF_CLR_REFTOP_IBIAS_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_IBIAS_OFF_SHIFT /;"	d
PMU_REF_CLR_REFTOP_LINREGREF_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_LINREGREF_EN_MASK /;"	d
PMU_REF_CLR_REFTOP_LINREGREF_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_LINREGREF_EN_SHIFT /;"	d
PMU_REF_CLR_REFTOP_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_LOWPOWER_MASK /;"	d
PMU_REF_CLR_REFTOP_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_LOWPOWER_SHIFT /;"	d
PMU_REF_CLR_REFTOP_PWDVBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_PWDVBGUP_MASK /;"	d
PMU_REF_CLR_REFTOP_PWDVBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_PWDVBGUP_SHIFT /;"	d
PMU_REF_CLR_REFTOP_PWD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_PWD_MASK /;"	d
PMU_REF_CLR_REFTOP_PWD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_PWD_SHIFT /;"	d
PMU_REF_CLR_REFTOP_SELFBIASOFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_SELFBIASOFF_MASK /;"	d
PMU_REF_CLR_REFTOP_SELFBIASOFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_SELFBIASOFF_SHIFT /;"	d
PMU_REF_CLR_REFTOP_VBGADJ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_VBGADJ(/;"	d
PMU_REF_CLR_REFTOP_VBGADJ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_VBGADJ_MASK /;"	d
PMU_REF_CLR_REFTOP_VBGADJ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_VBGADJ_SHIFT /;"	d
PMU_REF_CLR_REFTOP_VBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_VBGUP_MASK /;"	d
PMU_REF_CLR_REFTOP_VBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_REFTOP_VBGUP_SHIFT /;"	d
PMU_REF_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_RSVD1(/;"	d
PMU_REF_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_RSVD1_MASK /;"	d
PMU_REF_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_CLR_RSVD1_SHIFT /;"	d
PMU_REF_LPBG_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_LPBG_SEL_MASK /;"	d
PMU_REF_LPBG_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_LPBG_SEL_SHIFT /;"	d
PMU_REF_LPBG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_LPBG_TEST_MASK /;"	d
PMU_REF_LPBG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_LPBG_TEST_SHIFT /;"	d
PMU_REF_REFTOP_BIAS_TST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_BIAS_TST(/;"	d
PMU_REF_REFTOP_BIAS_TST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_BIAS_TST_MASK /;"	d
PMU_REF_REFTOP_BIAS_TST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_BIAS_TST_SHIFT /;"	d
PMU_REF_REFTOP_IBIAS_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_IBIAS_OFF_MASK /;"	d
PMU_REF_REFTOP_IBIAS_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_IBIAS_OFF_SHIFT /;"	d
PMU_REF_REFTOP_LINREGREF_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_LINREGREF_EN_MASK /;"	d
PMU_REF_REFTOP_LINREGREF_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_LINREGREF_EN_SHIFT /;"	d
PMU_REF_REFTOP_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_LOWPOWER_MASK /;"	d
PMU_REF_REFTOP_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_LOWPOWER_SHIFT /;"	d
PMU_REF_REFTOP_PWDVBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_PWDVBGUP_MASK /;"	d
PMU_REF_REFTOP_PWDVBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_PWDVBGUP_SHIFT /;"	d
PMU_REF_REFTOP_PWD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_PWD_MASK /;"	d
PMU_REF_REFTOP_PWD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_PWD_SHIFT /;"	d
PMU_REF_REFTOP_SELFBIASOFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_SELFBIASOFF_MASK /;"	d
PMU_REF_REFTOP_SELFBIASOFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_SELFBIASOFF_SHIFT /;"	d
PMU_REF_REFTOP_VBGADJ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_VBGADJ(/;"	d
PMU_REF_REFTOP_VBGADJ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_VBGADJ_MASK /;"	d
PMU_REF_REFTOP_VBGADJ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_VBGADJ_SHIFT /;"	d
PMU_REF_REFTOP_VBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_VBGUP_MASK /;"	d
PMU_REF_REFTOP_VBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_REFTOP_VBGUP_SHIFT /;"	d
PMU_REF_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_RSVD1(/;"	d
PMU_REF_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_RSVD1_MASK /;"	d
PMU_REF_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_RSVD1_SHIFT /;"	d
PMU_REF_SET_LPBG_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_LPBG_SEL_MASK /;"	d
PMU_REF_SET_LPBG_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_LPBG_SEL_SHIFT /;"	d
PMU_REF_SET_LPBG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_LPBG_TEST_MASK /;"	d
PMU_REF_SET_LPBG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_LPBG_TEST_SHIFT /;"	d
PMU_REF_SET_REFTOP_BIAS_TST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_BIAS_TST(/;"	d
PMU_REF_SET_REFTOP_BIAS_TST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_BIAS_TST_MASK /;"	d
PMU_REF_SET_REFTOP_BIAS_TST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_BIAS_TST_SHIFT /;"	d
PMU_REF_SET_REFTOP_IBIAS_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_IBIAS_OFF_MASK /;"	d
PMU_REF_SET_REFTOP_IBIAS_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_IBIAS_OFF_SHIFT /;"	d
PMU_REF_SET_REFTOP_LINREGREF_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_LINREGREF_EN_MASK /;"	d
PMU_REF_SET_REFTOP_LINREGREF_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_LINREGREF_EN_SHIFT /;"	d
PMU_REF_SET_REFTOP_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_LOWPOWER_MASK /;"	d
PMU_REF_SET_REFTOP_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_LOWPOWER_SHIFT /;"	d
PMU_REF_SET_REFTOP_PWDVBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_PWDVBGUP_MASK /;"	d
PMU_REF_SET_REFTOP_PWDVBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_PWDVBGUP_SHIFT /;"	d
PMU_REF_SET_REFTOP_PWD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_PWD_MASK /;"	d
PMU_REF_SET_REFTOP_PWD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_PWD_SHIFT /;"	d
PMU_REF_SET_REFTOP_SELFBIASOFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_SELFBIASOFF_MASK /;"	d
PMU_REF_SET_REFTOP_SELFBIASOFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_SELFBIASOFF_SHIFT /;"	d
PMU_REF_SET_REFTOP_VBGADJ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_VBGADJ(/;"	d
PMU_REF_SET_REFTOP_VBGADJ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_VBGADJ_MASK /;"	d
PMU_REF_SET_REFTOP_VBGADJ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_VBGADJ_SHIFT /;"	d
PMU_REF_SET_REFTOP_VBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_VBGUP_MASK /;"	d
PMU_REF_SET_REFTOP_VBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_REFTOP_VBGUP_SHIFT /;"	d
PMU_REF_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_RSVD1(/;"	d
PMU_REF_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_RSVD1_MASK /;"	d
PMU_REF_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_SET_RSVD1_SHIFT /;"	d
PMU_REF_TOG_LPBG_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_LPBG_SEL_MASK /;"	d
PMU_REF_TOG_LPBG_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_LPBG_SEL_SHIFT /;"	d
PMU_REF_TOG_LPBG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_LPBG_TEST_MASK /;"	d
PMU_REF_TOG_LPBG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_LPBG_TEST_SHIFT /;"	d
PMU_REF_TOG_REFTOP_BIAS_TST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_BIAS_TST(/;"	d
PMU_REF_TOG_REFTOP_BIAS_TST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_BIAS_TST_MASK /;"	d
PMU_REF_TOG_REFTOP_BIAS_TST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_BIAS_TST_SHIFT /;"	d
PMU_REF_TOG_REFTOP_IBIAS_OFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_IBIAS_OFF_MASK /;"	d
PMU_REF_TOG_REFTOP_IBIAS_OFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_IBIAS_OFF_SHIFT /;"	d
PMU_REF_TOG_REFTOP_LINREGREF_EN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_LINREGREF_EN_MASK /;"	d
PMU_REF_TOG_REFTOP_LINREGREF_EN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_LINREGREF_EN_SHIFT /;"	d
PMU_REF_TOG_REFTOP_LOWPOWER_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_LOWPOWER_MASK /;"	d
PMU_REF_TOG_REFTOP_LOWPOWER_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_LOWPOWER_SHIFT /;"	d
PMU_REF_TOG_REFTOP_PWDVBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_PWDVBGUP_MASK /;"	d
PMU_REF_TOG_REFTOP_PWDVBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_PWDVBGUP_SHIFT /;"	d
PMU_REF_TOG_REFTOP_PWD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_PWD_MASK /;"	d
PMU_REF_TOG_REFTOP_PWD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_PWD_SHIFT /;"	d
PMU_REF_TOG_REFTOP_SELFBIASOFF_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_SELFBIASOFF_MASK /;"	d
PMU_REF_TOG_REFTOP_SELFBIASOFF_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_SELFBIASOFF_SHIFT /;"	d
PMU_REF_TOG_REFTOP_VBGADJ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_VBGADJ(/;"	d
PMU_REF_TOG_REFTOP_VBGADJ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_VBGADJ_MASK /;"	d
PMU_REF_TOG_REFTOP_VBGADJ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_VBGADJ_SHIFT /;"	d
PMU_REF_TOG_REFTOP_VBGUP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_VBGUP_MASK /;"	d
PMU_REF_TOG_REFTOP_VBGUP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_REFTOP_VBGUP_SHIFT /;"	d
PMU_REF_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_RSVD1(/;"	d
PMU_REF_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_RSVD1_MASK /;"	d
PMU_REF_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REF_TOG_RSVD1_SHIFT /;"	d
PMU_REG_1P0A_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_BO_MASK /;"	d
PMU_REG_1P0A_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_BO_OFFSET(/;"	d
PMU_REG_1P0A_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_BO_OFFSET_MASK /;"	d
PMU_REG_1P0A_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0A_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_BO_SHIFT /;"	d
PMU_REG_1P0A_CLR_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_BO_MASK /;"	d
PMU_REG_1P0A_CLR_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_BO_OFFSET(/;"	d
PMU_REG_1P0A_CLR_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_BO_OFFSET_MASK /;"	d
PMU_REG_1P0A_CLR_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0A_CLR_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_BO_SHIFT /;"	d
PMU_REG_1P0A_CLR_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_BO_MASK /;"	d
PMU_REG_1P0A_CLR_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0A_CLR_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0A_CLR_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0A_CLR_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0A_CLR_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0A_CLR_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0A_CLR_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0A_CLR_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0A_CLR_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0A_CLR_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_CLR_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_CLR_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_OK_MASK /;"	d
PMU_REG_1P0A_CLR_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_OK_SHIFT /;"	d
PMU_REG_1P0A_CLR_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_OUTPUT_TRG(/;"	d
PMU_REG_1P0A_CLR_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0A_CLR_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0A_CLR_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_REG_TEST(/;"	d
PMU_REG_1P0A_CLR_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_REG_TEST_MASK /;"	d
PMU_REG_1P0A_CLR_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_REG_TEST_SHIFT /;"	d
PMU_REG_1P0A_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_RSVD0(/;"	d
PMU_REG_1P0A_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_RSVD0_MASK /;"	d
PMU_REG_1P0A_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_RSVD0_SHIFT /;"	d
PMU_REG_1P0A_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_RSVD1(/;"	d
PMU_REG_1P0A_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_RSVD1_MASK /;"	d
PMU_REG_1P0A_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_RSVD1_SHIFT /;"	d
PMU_REG_1P0A_CLR_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_CLR_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_CLR_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_BO_MASK /;"	d
PMU_REG_1P0A_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0A_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0A_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0A_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0A_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0A_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0A_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0A_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0A_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0A_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_OK_MASK /;"	d
PMU_REG_1P0A_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_OK_SHIFT /;"	d
PMU_REG_1P0A_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_OUTPUT_TRG(/;"	d
PMU_REG_1P0A_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0A_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0A_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_REG_TEST(/;"	d
PMU_REG_1P0A_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_REG_TEST_MASK /;"	d
PMU_REG_1P0A_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_REG_TEST_SHIFT /;"	d
PMU_REG_1P0A_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_RSVD0(/;"	d
PMU_REG_1P0A_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_RSVD0_MASK /;"	d
PMU_REG_1P0A_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_RSVD0_SHIFT /;"	d
PMU_REG_1P0A_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_RSVD1(/;"	d
PMU_REG_1P0A_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_RSVD1_MASK /;"	d
PMU_REG_1P0A_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_RSVD1_SHIFT /;"	d
PMU_REG_1P0A_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_SET_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_BO_MASK /;"	d
PMU_REG_1P0A_SET_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_BO_OFFSET(/;"	d
PMU_REG_1P0A_SET_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_BO_OFFSET_MASK /;"	d
PMU_REG_1P0A_SET_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0A_SET_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_BO_SHIFT /;"	d
PMU_REG_1P0A_SET_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_BO_MASK /;"	d
PMU_REG_1P0A_SET_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0A_SET_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0A_SET_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0A_SET_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0A_SET_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0A_SET_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0A_SET_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0A_SET_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0A_SET_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0A_SET_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_SET_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_SET_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_OK_MASK /;"	d
PMU_REG_1P0A_SET_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_OK_SHIFT /;"	d
PMU_REG_1P0A_SET_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_OUTPUT_TRG(/;"	d
PMU_REG_1P0A_SET_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0A_SET_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0A_SET_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_REG_TEST(/;"	d
PMU_REG_1P0A_SET_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_REG_TEST_MASK /;"	d
PMU_REG_1P0A_SET_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_REG_TEST_SHIFT /;"	d
PMU_REG_1P0A_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_RSVD0(/;"	d
PMU_REG_1P0A_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_RSVD0_MASK /;"	d
PMU_REG_1P0A_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_RSVD0_SHIFT /;"	d
PMU_REG_1P0A_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_RSVD1(/;"	d
PMU_REG_1P0A_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_RSVD1_MASK /;"	d
PMU_REG_1P0A_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_RSVD1_SHIFT /;"	d
PMU_REG_1P0A_SET_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_SET_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_SET_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_TOG_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_BO_MASK /;"	d
PMU_REG_1P0A_TOG_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_BO_OFFSET(/;"	d
PMU_REG_1P0A_TOG_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_BO_OFFSET_MASK /;"	d
PMU_REG_1P0A_TOG_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0A_TOG_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_BO_SHIFT /;"	d
PMU_REG_1P0A_TOG_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_BO_MASK /;"	d
PMU_REG_1P0A_TOG_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0A_TOG_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0A_TOG_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0A_TOG_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0A_TOG_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0A_TOG_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0A_TOG_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0A_TOG_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0A_TOG_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0A_TOG_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_TOG_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0A_TOG_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_OK_MASK /;"	d
PMU_REG_1P0A_TOG_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_OK_SHIFT /;"	d
PMU_REG_1P0A_TOG_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_OUTPUT_TRG(/;"	d
PMU_REG_1P0A_TOG_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0A_TOG_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0A_TOG_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_REG_TEST(/;"	d
PMU_REG_1P0A_TOG_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_REG_TEST_MASK /;"	d
PMU_REG_1P0A_TOG_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_REG_TEST_SHIFT /;"	d
PMU_REG_1P0A_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_RSVD0(/;"	d
PMU_REG_1P0A_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_RSVD0_MASK /;"	d
PMU_REG_1P0A_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_RSVD0_SHIFT /;"	d
PMU_REG_1P0A_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_RSVD1(/;"	d
PMU_REG_1P0A_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_RSVD1_MASK /;"	d
PMU_REG_1P0A_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_RSVD1_SHIFT /;"	d
PMU_REG_1P0A_TOG_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0A_TOG_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0A_TOG_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_BO_MASK /;"	d
PMU_REG_1P0D_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_BO_OFFSET(/;"	d
PMU_REG_1P0D_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_BO_OFFSET_MASK /;"	d
PMU_REG_1P0D_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0D_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_BO_SHIFT /;"	d
PMU_REG_1P0D_CLR_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_BO_MASK /;"	d
PMU_REG_1P0D_CLR_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_BO_OFFSET(/;"	d
PMU_REG_1P0D_CLR_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_BO_OFFSET_MASK /;"	d
PMU_REG_1P0D_CLR_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0D_CLR_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_BO_SHIFT /;"	d
PMU_REG_1P0D_CLR_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_BO_MASK /;"	d
PMU_REG_1P0D_CLR_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0D_CLR_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0D_CLR_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0D_CLR_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0D_CLR_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0D_CLR_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0D_CLR_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0D_CLR_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0D_CLR_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0D_CLR_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_CLR_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_CLR_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OK_MASK /;"	d
PMU_REG_1P0D_CLR_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OK_SHIFT /;"	d
PMU_REG_1P0D_CLR_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OUTPUT_TRG(/;"	d
PMU_REG_1P0D_CLR_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0D_CLR_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0D_CLR_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OVERRIDE_MASK /;"	d
PMU_REG_1P0D_CLR_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_OVERRIDE_SHIFT /;"	d
PMU_REG_1P0D_CLR_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_REG_TEST(/;"	d
PMU_REG_1P0D_CLR_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_REG_TEST_MASK /;"	d
PMU_REG_1P0D_CLR_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_REG_TEST_SHIFT /;"	d
PMU_REG_1P0D_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_RSVD0(/;"	d
PMU_REG_1P0D_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_RSVD0_MASK /;"	d
PMU_REG_1P0D_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_RSVD0_SHIFT /;"	d
PMU_REG_1P0D_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_RSVD1(/;"	d
PMU_REG_1P0D_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_RSVD1_MASK /;"	d
PMU_REG_1P0D_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_RSVD1_SHIFT /;"	d
PMU_REG_1P0D_CLR_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_CLR_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_CLR_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_BO_MASK /;"	d
PMU_REG_1P0D_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0D_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0D_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0D_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0D_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0D_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0D_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0D_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0D_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0D_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OK_MASK /;"	d
PMU_REG_1P0D_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OK_SHIFT /;"	d
PMU_REG_1P0D_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OUTPUT_TRG(/;"	d
PMU_REG_1P0D_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0D_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0D_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OVERRIDE_MASK /;"	d
PMU_REG_1P0D_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_OVERRIDE_SHIFT /;"	d
PMU_REG_1P0D_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_REG_TEST(/;"	d
PMU_REG_1P0D_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_REG_TEST_MASK /;"	d
PMU_REG_1P0D_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_REG_TEST_SHIFT /;"	d
PMU_REG_1P0D_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_RSVD0(/;"	d
PMU_REG_1P0D_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_RSVD0_MASK /;"	d
PMU_REG_1P0D_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_RSVD0_SHIFT /;"	d
PMU_REG_1P0D_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_RSVD1(/;"	d
PMU_REG_1P0D_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_RSVD1_MASK /;"	d
PMU_REG_1P0D_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_RSVD1_SHIFT /;"	d
PMU_REG_1P0D_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_SET_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_BO_MASK /;"	d
PMU_REG_1P0D_SET_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_BO_OFFSET(/;"	d
PMU_REG_1P0D_SET_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_BO_OFFSET_MASK /;"	d
PMU_REG_1P0D_SET_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0D_SET_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_BO_SHIFT /;"	d
PMU_REG_1P0D_SET_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_BO_MASK /;"	d
PMU_REG_1P0D_SET_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0D_SET_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0D_SET_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0D_SET_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0D_SET_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0D_SET_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0D_SET_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0D_SET_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0D_SET_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0D_SET_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_SET_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_SET_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OK_MASK /;"	d
PMU_REG_1P0D_SET_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OK_SHIFT /;"	d
PMU_REG_1P0D_SET_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OUTPUT_TRG(/;"	d
PMU_REG_1P0D_SET_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0D_SET_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0D_SET_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OVERRIDE_MASK /;"	d
PMU_REG_1P0D_SET_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_OVERRIDE_SHIFT /;"	d
PMU_REG_1P0D_SET_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_REG_TEST(/;"	d
PMU_REG_1P0D_SET_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_REG_TEST_MASK /;"	d
PMU_REG_1P0D_SET_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_REG_TEST_SHIFT /;"	d
PMU_REG_1P0D_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_RSVD0(/;"	d
PMU_REG_1P0D_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_RSVD0_MASK /;"	d
PMU_REG_1P0D_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_RSVD0_SHIFT /;"	d
PMU_REG_1P0D_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_RSVD1(/;"	d
PMU_REG_1P0D_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_RSVD1_MASK /;"	d
PMU_REG_1P0D_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_RSVD1_SHIFT /;"	d
PMU_REG_1P0D_SET_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_SET_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_SET_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_TOG_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_BO_MASK /;"	d
PMU_REG_1P0D_TOG_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_BO_OFFSET(/;"	d
PMU_REG_1P0D_TOG_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_BO_OFFSET_MASK /;"	d
PMU_REG_1P0D_TOG_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_BO_OFFSET_SHIFT /;"	d
PMU_REG_1P0D_TOG_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_BO_SHIFT /;"	d
PMU_REG_1P0D_TOG_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_BO_MASK /;"	d
PMU_REG_1P0D_TOG_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_BO_SHIFT /;"	d
PMU_REG_1P0D_TOG_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_1P0D_TOG_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_1P0D_TOG_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_LINREG_MASK /;"	d
PMU_REG_1P0D_TOG_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_1P0D_TOG_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_1P0D_TOG_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_1P0D_TOG_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_1P0D_TOG_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_1P0D_TOG_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_TOG_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_1P0D_TOG_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OK_MASK /;"	d
PMU_REG_1P0D_TOG_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OK_SHIFT /;"	d
PMU_REG_1P0D_TOG_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OUTPUT_TRG(/;"	d
PMU_REG_1P0D_TOG_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OUTPUT_TRG_MASK /;"	d
PMU_REG_1P0D_TOG_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_1P0D_TOG_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OVERRIDE_MASK /;"	d
PMU_REG_1P0D_TOG_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_OVERRIDE_SHIFT /;"	d
PMU_REG_1P0D_TOG_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_REG_TEST(/;"	d
PMU_REG_1P0D_TOG_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_REG_TEST_MASK /;"	d
PMU_REG_1P0D_TOG_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_REG_TEST_SHIFT /;"	d
PMU_REG_1P0D_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_RSVD0(/;"	d
PMU_REG_1P0D_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_RSVD0_MASK /;"	d
PMU_REG_1P0D_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_RSVD0_SHIFT /;"	d
PMU_REG_1P0D_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_RSVD1(/;"	d
PMU_REG_1P0D_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_RSVD1_MASK /;"	d
PMU_REG_1P0D_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_RSVD1_SHIFT /;"	d
PMU_REG_1P0D_TOG_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_1P0D_TOG_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_1P0D_TOG_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_3P0_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_BO_OFFSET(/;"	d
PMU_REG_3P0_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_BO_OFFSET_MASK /;"	d
PMU_REG_3P0_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_BO_OFFSET_SHIFT /;"	d
PMU_REG_3P0_BO_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_BO_VDD3P0_MASK /;"	d
PMU_REG_3P0_BO_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_BO_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_CLR_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_BO_OFFSET(/;"	d
PMU_REG_3P0_CLR_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_BO_OFFSET_MASK /;"	d
PMU_REG_3P0_CLR_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_BO_OFFSET_SHIFT /;"	d
PMU_REG_3P0_CLR_BO_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_BO_VDD3P0_MASK /;"	d
PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_CLR_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_ENABLE_BO_MASK /;"	d
PMU_REG_3P0_CLR_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_ENABLE_BO_SHIFT /;"	d
PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_3P0_CLR_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_ENABLE_LINREG_MASK /;"	d
PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_3P0_CLR_OK_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_OK_VDD3P0_MASK /;"	d
PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_CLR_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_OUTPUT_TRG(/;"	d
PMU_REG_3P0_CLR_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_OUTPUT_TRG_MASK /;"	d
PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_3P0_CLR_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_REG_TEST(/;"	d
PMU_REG_3P0_CLR_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_REG_TEST_MASK /;"	d
PMU_REG_3P0_CLR_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_REG_TEST_SHIFT /;"	d
PMU_REG_3P0_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD0_MASK /;"	d
PMU_REG_3P0_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD0_SHIFT /;"	d
PMU_REG_3P0_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD1(/;"	d
PMU_REG_3P0_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD1_MASK /;"	d
PMU_REG_3P0_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD1_SHIFT /;"	d
PMU_REG_3P0_CLR_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD2(/;"	d
PMU_REG_3P0_CLR_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD2_MASK /;"	d
PMU_REG_3P0_CLR_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_RSVD2_SHIFT /;"	d
PMU_REG_3P0_CLR_VBUS_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_VBUS_SEL_MASK /;"	d
PMU_REG_3P0_CLR_VBUS_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_CLR_VBUS_SEL_SHIFT /;"	d
PMU_REG_3P0_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_ENABLE_BO_MASK /;"	d
PMU_REG_3P0_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_ENABLE_BO_SHIFT /;"	d
PMU_REG_3P0_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_3P0_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_3P0_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_ENABLE_LINREG_MASK /;"	d
PMU_REG_3P0_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_3P0_OK_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_OK_VDD3P0_MASK /;"	d
PMU_REG_3P0_OK_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_OK_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_OUTPUT_TRG(/;"	d
PMU_REG_3P0_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_OUTPUT_TRG_MASK /;"	d
PMU_REG_3P0_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_3P0_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_REG_TEST(/;"	d
PMU_REG_3P0_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_REG_TEST_MASK /;"	d
PMU_REG_3P0_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_REG_TEST_SHIFT /;"	d
PMU_REG_3P0_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD0_MASK /;"	d
PMU_REG_3P0_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD0_SHIFT /;"	d
PMU_REG_3P0_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD1(/;"	d
PMU_REG_3P0_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD1_MASK /;"	d
PMU_REG_3P0_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD1_SHIFT /;"	d
PMU_REG_3P0_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD2(/;"	d
PMU_REG_3P0_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD2_MASK /;"	d
PMU_REG_3P0_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_RSVD2_SHIFT /;"	d
PMU_REG_3P0_SET_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_BO_OFFSET(/;"	d
PMU_REG_3P0_SET_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_BO_OFFSET_MASK /;"	d
PMU_REG_3P0_SET_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_BO_OFFSET_SHIFT /;"	d
PMU_REG_3P0_SET_BO_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_BO_VDD3P0_MASK /;"	d
PMU_REG_3P0_SET_BO_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_BO_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_SET_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_ENABLE_BO_MASK /;"	d
PMU_REG_3P0_SET_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_ENABLE_BO_SHIFT /;"	d
PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_3P0_SET_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_ENABLE_LINREG_MASK /;"	d
PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_3P0_SET_OK_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_OK_VDD3P0_MASK /;"	d
PMU_REG_3P0_SET_OK_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_OK_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_SET_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_OUTPUT_TRG(/;"	d
PMU_REG_3P0_SET_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_OUTPUT_TRG_MASK /;"	d
PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_3P0_SET_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_REG_TEST(/;"	d
PMU_REG_3P0_SET_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_REG_TEST_MASK /;"	d
PMU_REG_3P0_SET_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_REG_TEST_SHIFT /;"	d
PMU_REG_3P0_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD0_MASK /;"	d
PMU_REG_3P0_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD0_SHIFT /;"	d
PMU_REG_3P0_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD1(/;"	d
PMU_REG_3P0_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD1_MASK /;"	d
PMU_REG_3P0_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD1_SHIFT /;"	d
PMU_REG_3P0_SET_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD2(/;"	d
PMU_REG_3P0_SET_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD2_MASK /;"	d
PMU_REG_3P0_SET_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_RSVD2_SHIFT /;"	d
PMU_REG_3P0_SET_VBUS_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_VBUS_SEL_MASK /;"	d
PMU_REG_3P0_SET_VBUS_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_SET_VBUS_SEL_SHIFT /;"	d
PMU_REG_3P0_TOG_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_BO_OFFSET(/;"	d
PMU_REG_3P0_TOG_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_BO_OFFSET_MASK /;"	d
PMU_REG_3P0_TOG_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_BO_OFFSET_SHIFT /;"	d
PMU_REG_3P0_TOG_BO_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_BO_VDD3P0_MASK /;"	d
PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_TOG_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_ENABLE_BO_MASK /;"	d
PMU_REG_3P0_TOG_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_ENABLE_BO_SHIFT /;"	d
PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_3P0_TOG_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_ENABLE_LINREG_MASK /;"	d
PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_3P0_TOG_OK_VDD3P0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_OK_VDD3P0_MASK /;"	d
PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT /;"	d
PMU_REG_3P0_TOG_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_OUTPUT_TRG(/;"	d
PMU_REG_3P0_TOG_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_OUTPUT_TRG_MASK /;"	d
PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_3P0_TOG_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_REG_TEST(/;"	d
PMU_REG_3P0_TOG_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_REG_TEST_MASK /;"	d
PMU_REG_3P0_TOG_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_REG_TEST_SHIFT /;"	d
PMU_REG_3P0_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD0_MASK /;"	d
PMU_REG_3P0_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD0_SHIFT /;"	d
PMU_REG_3P0_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD1(/;"	d
PMU_REG_3P0_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD1_MASK /;"	d
PMU_REG_3P0_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD1_SHIFT /;"	d
PMU_REG_3P0_TOG_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD2(/;"	d
PMU_REG_3P0_TOG_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD2_MASK /;"	d
PMU_REG_3P0_TOG_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_RSVD2_SHIFT /;"	d
PMU_REG_3P0_TOG_VBUS_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_VBUS_SEL_MASK /;"	d
PMU_REG_3P0_TOG_VBUS_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_TOG_VBUS_SEL_SHIFT /;"	d
PMU_REG_3P0_VBUS_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_VBUS_SEL_MASK /;"	d
PMU_REG_3P0_VBUS_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_3P0_VBUS_SEL_SHIFT /;"	d
PMU_REG_HSIC_1P2_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_BO_MASK /;"	d
PMU_REG_HSIC_1P2_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_BO_OFFSET(/;"	d
PMU_REG_HSIC_1P2_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_BO_OFFSET_MASK /;"	d
PMU_REG_HSIC_1P2_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_BO_OFFSET_SHIFT /;"	d
PMU_REG_HSIC_1P2_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_BO_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_BO_OFFSET(/;"	d
PMU_REG_HSIC_1P2_CLR_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_BO_OFFSET_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_BO_OFFSET_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_BO_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OK_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OK_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OUTPUT_TRG(/;"	d
PMU_REG_HSIC_1P2_CLR_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OUTPUT_TRG_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OVERRIDE_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_OVERRIDE_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_REG_TEST(/;"	d
PMU_REG_HSIC_1P2_CLR_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_REG_TEST_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_REG_TEST_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_RSVD0(/;"	d
PMU_REG_HSIC_1P2_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_RSVD0_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_RSVD0_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_RSVD1(/;"	d
PMU_REG_HSIC_1P2_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_RSVD1_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_RSVD1_SHIFT /;"	d
PMU_REG_HSIC_1P2_CLR_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_CLR_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_CLR_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_BO_MASK /;"	d
PMU_REG_HSIC_1P2_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_HSIC_1P2_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_HSIC_1P2_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_HSIC_1P2_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_HSIC_1P2_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_HSIC_1P2_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_HSIC_1P2_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OK_MASK /;"	d
PMU_REG_HSIC_1P2_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OK_SHIFT /;"	d
PMU_REG_HSIC_1P2_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OUTPUT_TRG(/;"	d
PMU_REG_HSIC_1P2_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OUTPUT_TRG_MASK /;"	d
PMU_REG_HSIC_1P2_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_HSIC_1P2_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OVERRIDE_MASK /;"	d
PMU_REG_HSIC_1P2_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_OVERRIDE_SHIFT /;"	d
PMU_REG_HSIC_1P2_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_REG_TEST(/;"	d
PMU_REG_HSIC_1P2_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_REG_TEST_MASK /;"	d
PMU_REG_HSIC_1P2_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_REG_TEST_SHIFT /;"	d
PMU_REG_HSIC_1P2_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_RSVD0(/;"	d
PMU_REG_HSIC_1P2_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_RSVD0_MASK /;"	d
PMU_REG_HSIC_1P2_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_RSVD0_SHIFT /;"	d
PMU_REG_HSIC_1P2_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_RSVD1(/;"	d
PMU_REG_HSIC_1P2_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_RSVD1_MASK /;"	d
PMU_REG_HSIC_1P2_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_RSVD1_SHIFT /;"	d
PMU_REG_HSIC_1P2_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_BO_MASK /;"	d
PMU_REG_HSIC_1P2_SET_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_BO_OFFSET(/;"	d
PMU_REG_HSIC_1P2_SET_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_BO_OFFSET_MASK /;"	d
PMU_REG_HSIC_1P2_SET_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_BO_OFFSET_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_BO_MASK /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_SET_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OK_MASK /;"	d
PMU_REG_HSIC_1P2_SET_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OK_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OUTPUT_TRG(/;"	d
PMU_REG_HSIC_1P2_SET_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OUTPUT_TRG_MASK /;"	d
PMU_REG_HSIC_1P2_SET_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OVERRIDE_MASK /;"	d
PMU_REG_HSIC_1P2_SET_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_OVERRIDE_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_REG_TEST(/;"	d
PMU_REG_HSIC_1P2_SET_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_REG_TEST_MASK /;"	d
PMU_REG_HSIC_1P2_SET_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_REG_TEST_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_RSVD0(/;"	d
PMU_REG_HSIC_1P2_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_RSVD0_MASK /;"	d
PMU_REG_HSIC_1P2_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_RSVD0_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_RSVD1(/;"	d
PMU_REG_HSIC_1P2_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_RSVD1_MASK /;"	d
PMU_REG_HSIC_1P2_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_RSVD1_SHIFT /;"	d
PMU_REG_HSIC_1P2_SET_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_SET_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_SET_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_BO_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_BO_OFFSET(/;"	d
PMU_REG_HSIC_1P2_TOG_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_BO_OFFSET_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_BO_OFFSET_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_BO_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_BO_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OK_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OK_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OUTPUT_TRG(/;"	d
PMU_REG_HSIC_1P2_TOG_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OUTPUT_TRG_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_OVERRIDE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OVERRIDE_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_OVERRIDE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_OVERRIDE_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_REG_TEST(/;"	d
PMU_REG_HSIC_1P2_TOG_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_REG_TEST_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_REG_TEST_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_RSVD0(/;"	d
PMU_REG_HSIC_1P2_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_RSVD0_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_RSVD0_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_RSVD1(/;"	d
PMU_REG_HSIC_1P2_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_RSVD1_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_RSVD1_SHIFT /;"	d
PMU_REG_HSIC_1P2_TOG_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_HSIC_1P2_TOG_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_HSIC_1P2_TOG_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LDO5	board/avionic-design/common/tamonten-ng.c	/^#define PMU_REG_LDO5	/;"	d	file:
PMU_REG_LDO_100	board/avionic-design/common/tamonten-ng.c	/^#define PMU_REG_LDO_100(/;"	d	file:
PMU_REG_LDO_HIGH_POWER	board/avionic-design/common/tamonten-ng.c	/^#define PMU_REG_LDO_HIGH_POWER	/;"	d	file:
PMU_REG_LDO_SEL_100	board/avionic-design/common/tamonten-ng.c	/^#define PMU_REG_LDO_SEL_100(/;"	d	file:
PMU_REG_LPSR_1P0_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_BO_MASK /;"	d
PMU_REG_LPSR_1P0_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_BO_OFFSET(/;"	d
PMU_REG_LPSR_1P0_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_BO_OFFSET_MASK /;"	d
PMU_REG_LPSR_1P0_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_BO_OFFSET_SHIFT /;"	d
PMU_REG_LPSR_1P0_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_BO_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_BO_OFFSET(/;"	d
PMU_REG_LPSR_1P0_CLR_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_BO_OFFSET_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_BO_OFFSET_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_BO_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_OK_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_OK_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_OUTPUT_TRG(/;"	d
PMU_REG_LPSR_1P0_CLR_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_OUTPUT_TRG_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_REG_TEST(/;"	d
PMU_REG_LPSR_1P0_CLR_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_REG_TEST_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_REG_TEST_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_RSVD0(/;"	d
PMU_REG_LPSR_1P0_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_RSVD0_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_RSVD0_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_RSVD1(/;"	d
PMU_REG_LPSR_1P0_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_RSVD1_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_RSVD1_SHIFT /;"	d
PMU_REG_LPSR_1P0_CLR_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_CLR_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_CLR_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_BO_MASK /;"	d
PMU_REG_LPSR_1P0_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_LPSR_1P0_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_LPSR_1P0_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_LPSR_1P0_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_LPSR_1P0_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_LPSR_1P0_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_LPSR_1P0_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_OK_MASK /;"	d
PMU_REG_LPSR_1P0_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_OK_SHIFT /;"	d
PMU_REG_LPSR_1P0_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_OUTPUT_TRG(/;"	d
PMU_REG_LPSR_1P0_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_OUTPUT_TRG_MASK /;"	d
PMU_REG_LPSR_1P0_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_LPSR_1P0_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_REG_TEST(/;"	d
PMU_REG_LPSR_1P0_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_REG_TEST_MASK /;"	d
PMU_REG_LPSR_1P0_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_REG_TEST_SHIFT /;"	d
PMU_REG_LPSR_1P0_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_RSVD0(/;"	d
PMU_REG_LPSR_1P0_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_RSVD0_MASK /;"	d
PMU_REG_LPSR_1P0_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_RSVD0_SHIFT /;"	d
PMU_REG_LPSR_1P0_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_RSVD1(/;"	d
PMU_REG_LPSR_1P0_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_RSVD1_MASK /;"	d
PMU_REG_LPSR_1P0_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_RSVD1_SHIFT /;"	d
PMU_REG_LPSR_1P0_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_BO_MASK /;"	d
PMU_REG_LPSR_1P0_SET_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_BO_OFFSET(/;"	d
PMU_REG_LPSR_1P0_SET_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_BO_OFFSET_MASK /;"	d
PMU_REG_LPSR_1P0_SET_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_BO_OFFSET_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_BO_MASK /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_SET_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_OK_MASK /;"	d
PMU_REG_LPSR_1P0_SET_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_OK_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_OUTPUT_TRG(/;"	d
PMU_REG_LPSR_1P0_SET_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_OUTPUT_TRG_MASK /;"	d
PMU_REG_LPSR_1P0_SET_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_REG_TEST(/;"	d
PMU_REG_LPSR_1P0_SET_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_REG_TEST_MASK /;"	d
PMU_REG_LPSR_1P0_SET_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_REG_TEST_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_RSVD0(/;"	d
PMU_REG_LPSR_1P0_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_RSVD0_MASK /;"	d
PMU_REG_LPSR_1P0_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_RSVD0_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_RSVD1(/;"	d
PMU_REG_LPSR_1P0_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_RSVD1_MASK /;"	d
PMU_REG_LPSR_1P0_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_RSVD1_SHIFT /;"	d
PMU_REG_LPSR_1P0_SET_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_SET_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_SET_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_BO_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_BO_OFFSET	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_BO_OFFSET(/;"	d
PMU_REG_LPSR_1P0_TOG_BO_OFFSET_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_BO_OFFSET_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_BO_OFFSET_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_BO_OFFSET_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_BO_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_BO_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_BO_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_BO_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_ILIMIT_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_ILIMIT_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_ILIMIT_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_ILIMIT_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_PULLDOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_PULLDOWN_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_PULLDOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_PULLDOWN_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_PWRUPLOAD_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_PWRUPLOAD_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_PWRUPLOAD_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_PWRUPLOAD_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_ENABLE_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_ENABLE_WEAK_LINREG_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_OK_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_OK_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_OK_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_OK_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_OUTPUT_TRG	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_OUTPUT_TRG(/;"	d
PMU_REG_LPSR_1P0_TOG_OUTPUT_TRG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_OUTPUT_TRG_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_OUTPUT_TRG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_OUTPUT_TRG_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_REG_TEST	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_REG_TEST(/;"	d
PMU_REG_LPSR_1P0_TOG_REG_TEST_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_REG_TEST_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_REG_TEST_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_REG_TEST_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_RSVD0(/;"	d
PMU_REG_LPSR_1P0_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_RSVD0_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_RSVD0_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_RSVD1(/;"	d
PMU_REG_LPSR_1P0_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_RSVD1_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_RSVD1_SHIFT /;"	d
PMU_REG_LPSR_1P0_TOG_SELREF_WEAK_LINREG_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_SELREF_WEAK_LINREG_MASK /;"	d
PMU_REG_LPSR_1P0_TOG_SELREF_WEAK_LINREG_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PMU_REG_LPSR_1P0_TOG_SELREF_WEAK_LINREG_SHIFT /;"	d
PMU_SUPPLYENE	board/toradex/colibri_t20/colibri_t20.c	/^#define PMU_SUPPLYENE	/;"	d	file:
PMU_SUPPLYENE_EXITSLREQ	board/toradex/colibri_t20/colibri_t20.c	/^#define PMU_SUPPLYENE_EXITSLREQ	/;"	d	file:
PMU_SUPPLYENE_SYSINEN	board/toradex/colibri_t20/colibri_t20.c	/^#define PMU_SUPPLYENE_SYSINEN	/;"	d	file:
PM_128K	arch/mips/include/asm/mipsregs.h	/^#define PM_128K	/;"	d
PM_16K	arch/mips/include/asm/mipsregs.h	/^#define PM_16K	/;"	d
PM_16M	arch/mips/include/asm/mipsregs.h	/^#define PM_16M	/;"	d
PM_1G	arch/mips/include/asm/mipsregs.h	/^#define PM_1G	/;"	d
PM_1K	arch/mips/include/asm/mipsregs.h	/^#define PM_1K	/;"	d
PM_1M	arch/mips/include/asm/mipsregs.h	/^#define PM_1M	/;"	d
PM_256K	arch/mips/include/asm/mipsregs.h	/^#define PM_256K	/;"	d
PM_256M	arch/mips/include/asm/mipsregs.h	/^#define PM_256M	/;"	d
PM_2M	arch/mips/include/asm/mipsregs.h	/^#define PM_2M	/;"	d
PM_32K	arch/mips/include/asm/mipsregs.h	/^#define PM_32K	/;"	d
PM_32M	arch/mips/include/asm/mipsregs.h	/^#define PM_32M	/;"	d
PM_4K	arch/mips/include/asm/mipsregs.h	/^#define PM_4K	/;"	d
PM_4M	arch/mips/include/asm/mipsregs.h	/^#define PM_4M	/;"	d
PM_512K	arch/mips/include/asm/mipsregs.h	/^#define PM_512K	/;"	d
PM_64K	arch/mips/include/asm/mipsregs.h	/^#define PM_64K	/;"	d
PM_64M	arch/mips/include/asm/mipsregs.h	/^#define PM_64M	/;"	d
PM_8K	arch/mips/include/asm/mipsregs.h	/^#define PM_8K	/;"	d
PM_8M	arch/mips/include/asm/mipsregs.h	/^#define PM_8M	/;"	d
PM_CAP_TURBO_MODE	arch/x86/include/asm/turbo.h	/^#define PM_CAP_TURBO_MODE	/;"	d
PM_CTL_PHY_RST_	drivers/usb/eth/smsc95xx.c	/^#define PM_CTL_PHY_RST_	/;"	d	file:
PM_CTRL	drivers/usb/eth/smsc95xx.c	/^#define PM_CTRL	/;"	d	file:
PM_GPMC_BASE_ADDR_ARM	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PM_GPMC_BASE_ADDR_ARM	/;"	d
PM_IVA2_BASE_ADDR_ARM	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PM_IVA2_BASE_ADDR_ARM	/;"	d
PM_OCM_RAM_BASE_ADDR_ARM	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PM_OCM_RAM_BASE_ADDR_ARM	/;"	d
PM_RT_APE_BASE_ADDR_ARM	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PM_RT_APE_BASE_ADDR_ARM	/;"	d
PM_STATUS	include/radeon.h	/^#define PM_STATUS	/;"	d
PM_inpb	drivers/bios_emulator/biosemui.h	/^#define PM_inpb(/;"	d
PM_inpd	drivers/bios_emulator/biosemui.h	/^#define PM_inpd(/;"	d
PM_inpw	drivers/bios_emulator/biosemui.h	/^#define PM_inpw(/;"	d
PM_outpb	drivers/bios_emulator/biosemui.h	/^#define PM_outpb(/;"	d
PM_outpd	drivers/bios_emulator/biosemui.h	/^#define PM_outpd(/;"	d
PM_outpw	drivers/bios_emulator/biosemui.h	/^#define PM_outpw(/;"	d
PNCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PNCR /;"	d
PNCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PNCR /;"	d
PNCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PNCR /;"	d
PNCR_A	board/espt/lowlevel_init.S	/^PNCR_A:	.long	0xFFEF001A$/;"	l
PNCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PNCR_A:		.long	0xffec001a$/;"	l
PNCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PNCR_A:		.long	GPIO_BASE + 0x18$/;"	l
PNCR_D	board/espt/lowlevel_init.S	/^PNCR_D:	.word	0x0242$/;"	l
PNCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PNCR_D	/;"	d	file:
PNCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PNCR_D:		.long	0x0000$/;"	l
PNCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PNCR_D:		.word	0xf0c3$/;"	l
PNDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PNDR /;"	d
PNDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PNDR /;"	d
PNDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PNDR /;"	d
PNOR_BOOT_SUPPORTED	include/configs/x600.h	/^#define PNOR_BOOT_SUPPORTED	/;"	d
PNOR_WIDTH_16	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define	PNOR_WIDTH_16	/;"	d
PNOR_WIDTH_32	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define	PNOR_WIDTH_32	/;"	d
PNOR_WIDTH_8	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define PNOR_WIDTH_8	/;"	d
PNOR_WIDTH_NUM	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define PNOR_WIDTH_NUM	/;"	d
PNOR_WIDTH_SEARCH	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define PNOR_WIDTH_SEARCH	/;"	d
PNPUPR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PNPUPR_A:	.long	GPIO_BASE + 0x58$/;"	l
PNPUPR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PNPUPR_D:	.long	0x00$/;"	l
PNP_ACTIVATE_DEVICE	include/ns87308.h	/^#define PNP_ACTIVATE_DEVICE(/;"	d
PNP_DEACTIVATE_DEVICE	include/ns87308.h	/^#define PNP_DEACTIVATE_DEVICE(/;"	d
PNP_DEV	arch/x86/include/asm/pnp_def.h	/^#define PNP_DEV(/;"	d
PNP_IDX_DRQ0	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_DRQ0 /;"	d
PNP_IDX_DRQ1	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_DRQ1 /;"	d
PNP_IDX_EN	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_EN /;"	d
PNP_IDX_IO0	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_IO0 /;"	d
PNP_IDX_IO1	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_IO1 /;"	d
PNP_IDX_IO2	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_IO2 /;"	d
PNP_IDX_IO3	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_IO3 /;"	d
PNP_IDX_IRQ0	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_IRQ0 /;"	d
PNP_IDX_IRQ1	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_IRQ1 /;"	d
PNP_IDX_MSC0	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_MSC0 /;"	d
PNP_IDX_MSC1	arch/x86/include/asm/pnp_def.h	/^#define PNP_IDX_MSC1 /;"	d
PNP_PGCS_CSLINE_BASE	include/ns87308.h	/^#define PNP_PGCS_CSLINE_BASE(/;"	d
PNP_PGCS_CSLINE_CONF	include/ns87308.h	/^#define PNP_PGCS_CSLINE_CONF(/;"	d
PNP_SET_DEVICE_BASE	include/ns87308.h	/^#define PNP_SET_DEVICE_BASE(/;"	d
PN_INV	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PN_INV	/;"	d
PN_REG	drivers/net/smc91111.h	/^#define	PN_REG	/;"	d
POB0	arch/powerpc/dts/arches.dts	/^		POB0: opb {$/;"	l
POB0	arch/powerpc/dts/canyonlands.dts	/^		POB0: opb {$/;"	l
POB0	arch/powerpc/dts/glacier.dts	/^		POB0: opb {$/;"	l
POBAR_BA_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define POBAR_BA_MASK	/;"	d
POBAR_BA_MASK	include/mpc83xx.h	/^#define POBAR_BA_MASK	/;"	d
POBAR_REG0	arch/powerpc/include/asm/m8260_pci.h	/^#define POBAR_REG0 /;"	d
POBAR_REG0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POBAR_REG0 /;"	d
POBAR_REG1	arch/powerpc/include/asm/m8260_pci.h	/^#define POBAR_REG1 /;"	d
POBAR_REG1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POBAR_REG1 /;"	d
POBAR_REG2	arch/powerpc/include/asm/m8260_pci.h	/^#define POBAR_REG2 /;"	d
POBAR_REG2	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POBAR_REG2 /;"	d
POCMR0_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define POCMR0_MASK_ATTRIB	/;"	d	file:
POCMR0_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define POCMR0_MASK_ATTRIB /;"	d	file:
POCMR1_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define POCMR1_MASK_ATTRIB	/;"	d	file:
POCMR1_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define POCMR1_MASK_ATTRIB /;"	d	file:
POCMR2_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define POCMR2_MASK_ATTRIB	/;"	d	file:
POCMR2_MASK_ATTRIB	arch/powerpc/cpu/mpc8260/pci.c	/^#define POCMR2_MASK_ATTRIB /;"	d	file:
POCMR_CM_128K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_128K	/;"	d
POCMR_CM_128K	include/mpc83xx.h	/^#define POCMR_CM_128K	/;"	d
POCMR_CM_128M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_128M	/;"	d
POCMR_CM_128M	include/mpc83xx.h	/^#define POCMR_CM_128M	/;"	d
POCMR_CM_16K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_16K	/;"	d
POCMR_CM_16K	include/mpc83xx.h	/^#define POCMR_CM_16K	/;"	d
POCMR_CM_16M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_16M	/;"	d
POCMR_CM_16M	include/mpc83xx.h	/^#define POCMR_CM_16M	/;"	d
POCMR_CM_1G	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_1G	/;"	d
POCMR_CM_1G	include/mpc83xx.h	/^#define POCMR_CM_1G	/;"	d
POCMR_CM_1M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_1M	/;"	d
POCMR_CM_1M	include/mpc83xx.h	/^#define POCMR_CM_1M	/;"	d
POCMR_CM_256K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_256K	/;"	d
POCMR_CM_256K	include/mpc83xx.h	/^#define POCMR_CM_256K	/;"	d
POCMR_CM_256M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_256M	/;"	d
POCMR_CM_256M	include/mpc83xx.h	/^#define POCMR_CM_256M	/;"	d
POCMR_CM_2G	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_2G	/;"	d
POCMR_CM_2G	include/mpc83xx.h	/^#define POCMR_CM_2G	/;"	d
POCMR_CM_2M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_2M	/;"	d
POCMR_CM_2M	include/mpc83xx.h	/^#define POCMR_CM_2M	/;"	d
POCMR_CM_32K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_32K	/;"	d
POCMR_CM_32K	include/mpc83xx.h	/^#define POCMR_CM_32K	/;"	d
POCMR_CM_32M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_32M	/;"	d
POCMR_CM_32M	include/mpc83xx.h	/^#define POCMR_CM_32M	/;"	d
POCMR_CM_4G	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_4G	/;"	d
POCMR_CM_4G	include/mpc83xx.h	/^#define POCMR_CM_4G	/;"	d
POCMR_CM_4K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_4K	/;"	d
POCMR_CM_4K	include/mpc83xx.h	/^#define POCMR_CM_4K	/;"	d
POCMR_CM_4M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_4M	/;"	d
POCMR_CM_4M	include/mpc83xx.h	/^#define POCMR_CM_4M	/;"	d
POCMR_CM_512K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_512K	/;"	d
POCMR_CM_512K	include/mpc83xx.h	/^#define POCMR_CM_512K	/;"	d
POCMR_CM_512M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_512M	/;"	d
POCMR_CM_512M	include/mpc83xx.h	/^#define POCMR_CM_512M	/;"	d
POCMR_CM_64K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_64K	/;"	d
POCMR_CM_64K	include/mpc83xx.h	/^#define POCMR_CM_64K	/;"	d
POCMR_CM_64M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_64M	/;"	d
POCMR_CM_64M	include/mpc83xx.h	/^#define POCMR_CM_64M	/;"	d
POCMR_CM_8K	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_8K	/;"	d
POCMR_CM_8K	include/mpc83xx.h	/^#define POCMR_CM_8K	/;"	d
POCMR_CM_8M	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_8M	/;"	d
POCMR_CM_8M	include/mpc83xx.h	/^#define POCMR_CM_8M	/;"	d
POCMR_CM_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_CM_MASK	/;"	d
POCMR_CM_MASK	include/mpc83xx.h	/^#define POCMR_CM_MASK	/;"	d
POCMR_DST	include/mpc83xx.h	/^#define POCMR_DST	/;"	d
POCMR_EN	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_EN	/;"	d
POCMR_EN	include/mpc83xx.h	/^#define POCMR_EN	/;"	d
POCMR_ENABLE	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_ENABLE /;"	d
POCMR_ENABLE	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_ENABLE /;"	d
POCMR_IO	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_IO	/;"	d
POCMR_IO	include/mpc83xx.h	/^#define POCMR_IO	/;"	d
POCMR_MASK_128KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_128KB /;"	d
POCMR_MASK_128KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_128KB /;"	d
POCMR_MASK_128MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_128MB /;"	d
POCMR_MASK_128MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_128MB /;"	d
POCMR_MASK_16KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_16KB /;"	d
POCMR_MASK_16KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_16KB /;"	d
POCMR_MASK_16MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_16MB /;"	d
POCMR_MASK_16MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_16MB /;"	d
POCMR_MASK_1GB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_1GB /;"	d
POCMR_MASK_1GB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_1GB /;"	d
POCMR_MASK_1MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_1MB /;"	d
POCMR_MASK_1MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_1MB /;"	d
POCMR_MASK_256KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_256KB /;"	d
POCMR_MASK_256KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_256KB /;"	d
POCMR_MASK_256MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_256MB /;"	d
POCMR_MASK_256MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_256MB /;"	d
POCMR_MASK_2MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_2MB /;"	d
POCMR_MASK_2MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_2MB /;"	d
POCMR_MASK_32KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_32KB /;"	d
POCMR_MASK_32KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_32KB /;"	d
POCMR_MASK_32MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_32MB /;"	d
POCMR_MASK_32MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_32MB /;"	d
POCMR_MASK_4KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_4KB /;"	d
POCMR_MASK_4KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_4KB /;"	d
POCMR_MASK_4MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_4MB /;"	d
POCMR_MASK_4MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_4MB /;"	d
POCMR_MASK_512KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_512KB /;"	d
POCMR_MASK_512KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_512KB /;"	d
POCMR_MASK_512MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_512MB /;"	d
POCMR_MASK_512MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_512MB /;"	d
POCMR_MASK_64KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_64KB /;"	d
POCMR_MASK_64KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_64KB /;"	d
POCMR_MASK_64MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_64MB /;"	d
POCMR_MASK_64MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_64MB /;"	d
POCMR_MASK_8KB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_8KB /;"	d
POCMR_MASK_8KB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_8KB /;"	d
POCMR_MASK_8MB	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_MASK_8MB /;"	d
POCMR_MASK_8MB	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_MASK_8MB /;"	d
POCMR_PCI2	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_PCI2 /;"	d
POCMR_PCI_IO	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_PCI_IO /;"	d
POCMR_PCI_IO	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_PCI_IO /;"	d
POCMR_PRE	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_PRE	/;"	d
POCMR_PREFETCH_EN	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_PREFETCH_EN /;"	d
POCMR_PREFETCH_EN	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_PREFETCH_EN /;"	d
POCMR_REG0	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_REG0 /;"	d
POCMR_REG0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_REG0 /;"	d
POCMR_REG1	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_REG1 /;"	d
POCMR_REG1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_REG1 /;"	d
POCMR_REG2	arch/powerpc/include/asm/m8260_pci.h	/^#define POCMR_REG2 /;"	d
POCMR_REG2	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POCMR_REG2 /;"	d
POCMR_SBS	arch/powerpc/include/asm/immap_512x.h	/^#define POCMR_SBS	/;"	d
POCMR_SE	include/mpc83xx.h	/^#define POCMR_SE	/;"	d
POCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define POCR	/;"	d
POCR_A	board/espt/lowlevel_init.S	/^POCR_A:	.long	0xFFEF001C$/;"	l
POCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^POCR_A:		.long	0xffec001c$/;"	l
POCR_D	board/espt/lowlevel_init.S	/^POCR_D:	.word	0x0000$/;"	l
POCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^POCR_D:		.long	0x0000$/;"	l
POCR_FEIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define POCR_FEIE	/;"	d
POGO_E02_OE_HIGH	board/cloudengines/pogo_e02/pogo_e02.h	/^#define POGO_E02_OE_HIGH	/;"	d
POGO_E02_OE_LOW	board/cloudengines/pogo_e02/pogo_e02.h	/^#define POGO_E02_OE_LOW	/;"	d
POGO_E02_OE_VAL_HIGH	board/cloudengines/pogo_e02/pogo_e02.h	/^#define POGO_E02_OE_VAL_HIGH	/;"	d
POGO_E02_OE_VAL_LOW	board/cloudengines/pogo_e02/pogo_e02.h	/^#define POGO_E02_OE_VAL_LOW	/;"	d
POLC	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define POLC /;"	d
POLC	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define POLC	/;"	d
POLICY_CTL_GO	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^#define POLICY_CTL_GO	/;"	d	file:
POLICY_CTL_GO	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^#define POLICY_CTL_GO	/;"	d	file:
POLICY_CTL_GO_ATL	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^#define POLICY_CTL_GO_ATL	/;"	d	file:
POLICY_CTL_GO_ATL	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^#define POLICY_CTL_GO_ATL	/;"	d	file:
POLL_16B_REG	drivers/phy/marvell/comphy_a3700.h	/^#define POLL_16B_REG	/;"	d
POLL_32B_REG	drivers/phy/marvell/comphy_a3700.h	/^#define POLL_32B_REG	/;"	d
POLL_DATA	drivers/net/designware.h	/^#define POLL_DATA	/;"	d
POLL_DEMAND	drivers/net/dc2114x.c	/^#define POLL_DEMAND	/;"	d	file:
POLL_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define POLL_EN	/;"	d
POLL_IMS_ENABLE_MASK	drivers/net/e1000.h	/^#define POLL_IMS_ENABLE_MASK /;"	d
POLL_OP	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	POLL_OP,$/;"	e	enum:mv_op
POLL_SECONDS	drivers/usb/musb-new/am35x.c	/^#define	POLL_SECONDS	/;"	d	file:
POLL_TIMEOUT	drivers/usb/host/xhci.h	/^#define	POLL_TIMEOUT	/;"	d
POLS	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define POLS /;"	d
POLS	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define POLS	/;"	d
POLY	lib/crc8.c	/^#define POLY	/;"	d	file:
PON_INT_RT_STS	drivers/gpio/pm8916_gpio.c	/^#define PON_INT_RT_STS /;"	d	file:
POOL_STATE_ACTIVE	include/zfs/zfs.h	/^	POOL_STATE_ACTIVE = 0,		\/* In active use		*\/$/;"	e	enum:pool_state
POOL_STATE_DESTROYED	include/zfs/zfs.h	/^	POOL_STATE_DESTROYED,		\/* Explicitly destroyed		*\/$/;"	e	enum:pool_state
POOL_STATE_EXPORTED	include/zfs/zfs.h	/^	POOL_STATE_EXPORTED,		\/* Explicitly exported		*\/$/;"	e	enum:pool_state
POOL_STATE_L2CACHE	include/zfs/zfs.h	/^	POOL_STATE_L2CACHE,		\/* Level 2 ARC device		*\/$/;"	e	enum:pool_state
POOL_STATE_POTENTIALLY_ACTIVE	include/zfs/zfs.h	/^	POOL_STATE_POTENTIALLY_ACTIVE	\/* Internal libzfs state	*\/$/;"	e	enum:pool_state
POOL_STATE_SPARE	include/zfs/zfs.h	/^	POOL_STATE_SPARE,		\/* Reserved for hot spare use	*\/$/;"	e	enum:pool_state
POOL_STATE_UNAVAIL	include/zfs/zfs.h	/^	POOL_STATE_UNAVAIL,		\/* Internal libzfs state	*\/$/;"	e	enum:pool_state
POOL_STATE_UNINITIALIZED	include/zfs/zfs.h	/^	POOL_STATE_UNINITIALIZED,	\/* Internal spa_t state		*\/$/;"	e	enum:pool_state
PORBMSR_ROMLOC_NAND_2K	arch/powerpc/include/asm/immap_85xx.h	/^#define PORBMSR_ROMLOC_NAND_2K	/;"	d
PORBMSR_ROMLOC_NOR	arch/powerpc/include/asm/immap_85xx.h	/^#define PORBMSR_ROMLOC_NOR	/;"	d
PORBMSR_ROMLOC_SDHC	arch/powerpc/include/asm/immap_85xx.h	/^#define PORBMSR_ROMLOC_SDHC	/;"	d
PORBMSR_ROMLOC_SPI	arch/powerpc/include/asm/immap_85xx.h	/^#define PORBMSR_ROMLOC_SPI	/;"	d
PORT	drivers/serial/serial_ns16550.c	/^#define PORT	/;"	d	file:
PORT	include/mv88e6352.h	/^#define PORT(/;"	d
PORT0_BASE	drivers/block/sata_ceva.c	/^#define PORT0_BASE	/;"	d	file:
PORT115_I2C_SCL2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_READY_MARK, BBIF1_RSCK_MARK, PORT115_I2C_SCL2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT115_I2C_SCL3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT115_I2C_SCL3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT116_I2C_SDA2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	HSI_RX_WAKE_MARK, BBIF1_RSYNC_MARK, PORT116_I2C_SDA2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT116_I2C_SDA3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT116_I2C_SDA3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT128_LCD2VSYN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_VD_MARK, PORT128_LCD2VSYN_MARK, VIO2_VD_MARK, LCD2D0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT129_LCD2CS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_HD_MARK, PORT129_LCD2HSYN_MARK, PORT129_LCD2CS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT129_LCD2HSYN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_HD_MARK, PORT129_LCD2HSYN_MARK, PORT129_LCD2CS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT130_MSIOF2_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D0_MARK, PORT130_MSIOF2_RXD_MARK, LCD2D10_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT131_KEYOUT11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT131_KEYOUT11_MARK, LCD2D11_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT131_KEYOUT6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D1_MARK, PORT131_KEYOUT6_MARK, PORT131_MSIOF2_SS1_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT131_MSIOF2_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D1_MARK, PORT131_KEYOUT6_MARK, PORT131_MSIOF2_SS1_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT132_KEYOUT10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT132_KEYOUT10_MARK, LCD2D12_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT132_KEYOUT7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D2_MARK, PORT132_KEYOUT7_MARK, PORT132_MSIOF2_SS2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT132_MSIOF2_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D2_MARK, PORT132_KEYOUT7_MARK, PORT132_MSIOF2_SS2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT136_KEYOUT8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D6_MARK, PORT136_KEYOUT8_MARK, LCD2D16_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT137_KEYOUT9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D7_MARK, PORT137_KEYOUT9_MARK, LCD2D17_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT138_KEYOUT8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D8_MARK, PORT138_KEYOUT8_MARK, VIO2_D0_MARK, LCD2D6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT139_KEYOUT9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D9_MARK, PORT139_KEYOUT9_MARK, VIO2_D1_MARK, LCD2D7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT142_KEYOUT10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D12_MARK, PORT142_KEYOUT10_MARK, VIO2_D4_MARK, LCD2D2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT143_KEYOUT11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D13_MARK, PORT143_KEYOUT11_MARK, PORT143_KEYOUT6_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT143_KEYOUT6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D13_MARK, PORT143_KEYOUT11_MARK, PORT143_KEYOUT6_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT144_KEYOUT7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D14_MARK, PORT144_KEYOUT7_MARK, VIO2_D6_MARK, LCD2D4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT145_LCD2DISP_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D15_MARK, TPU1TO3_MARK, PORT145_LCD2DISP_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT145_LCD2RS_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT145_LCD2RS_MARK, VIO2_D7_MARK, LCD2D5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT146_LCD2WR__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_CLK_MARK, LCD2DCK_MARK, PORT146_LCD2WR__MARK, VIO2_CLK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT149_KEYOUT9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A27_MARK, PORT149_RDWR_MARK, MFG0_IN1_MARK, PORT149_KEYOUT9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT149_RDWR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A27_MARK, PORT149_RDWR_MARK, MFG0_IN1_MARK, PORT149_KEYOUT9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT153_MSIOF2_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT156_MSIOF2_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_RTS1__MARK, PORT156_MSIOF2_SS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT157_MSIOF2_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_CTS1__MARK, PORT157_MSIOF2_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT159_SCIFA5_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT159_SCIFB_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT160_SCIFA5_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT160_SCIFB_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT161_SCIFA5_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT161_SCIFB_CTS__MARK, PORT161_SCIFA5_CTS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT161_SCIFB_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT161_SCIFB_CTS__MARK, PORT161_SCIFA5_CTS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT162_SCIFA5_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT162_SCIFB_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT163_SCIFA5_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT163_SCIFB_RTS__MARK, PORT163_SCIFA5_RTS__MARK, TPU3TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT163_SCIFB_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT163_SCIFB_RTS__MARK, PORT163_SCIFA5_RTS__MARK, TPU3TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT16_VIO_CKOR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO5_MARK, SCIFA0_SCK_MARK, FSICOSLDT3_MARK, PORT16_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT193_SCIFA5_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD1_MARK, PORT193_SCIFA5_CTS__MARK, BBIF2_TSYNC1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT194_SCIFA5_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD2_MARK, PORT194_SCIFA5_RTS__MARK, BBIF2_TSCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT195_SCIFA5_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD3_MARK, PORT195_SCIFA5_RXD_MARK, BBIF2_TXD1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT196_SCIFA5_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD4_MARK, PORT196_SCIFA5_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT197_SCIFA5_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT19_VIO_CKO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA7_RTS__MARK, PORT19_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT1_BASE	drivers/block/sata_ceva.c	/^#define PORT1_BASE	/;"	d	file:
PORT207_MSIOF0L_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, D23_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT208_MSIOF0L_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, D24_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT210_MSIOF0L_SS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT211_MSIOF0L_SS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT217_LCD2DISP_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_FIELD3_MARK, PORT217_LCD2DISP_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT217_LCD2RS_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDRD__MARK, DACK2_MARK, PORT217_LCD2RS_MARK, MSIOF0L_TSYNC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT218_VIO_CKOR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT218_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT219_LCD2WR__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDDISP_MARK, LCDRS_MARK, PORT219_LCD2WR__MARK, DREQ3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT221_LCD2CS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDLCLK_MARK, DREQ1_MARK, PORT221_LCD2CS__MARK, PWEN_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT221_LCD2HSYN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF0L_RXD_MARK, VIO2_HD3_MARK, PORT221_LCD2HSYN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT222_LCD2VSYN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_VD3_MARK, PORT222_LCD2VSYN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT226_VIO_CKO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	EXTLP_MARK, SCIFA1_SCK_MARK, PORT226_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT236_I2C_SDA2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_MCK0_MARK, PORT236_I2C_SDA2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT237_I2C_SCL2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_MCK1_MARK, PORT237_I2C_SCL2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT241_IRDA_OUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, TPU4TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT241_IROUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, TPU4TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT242_IRDA_IN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT243_IRDA_FIRSEL_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT243_VIO_CKO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT244_SCIFA5_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT244_SCIFA5_CTS__MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT244_SCIFB_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT244_SCIFA5_CTS__MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT245_SCIFA5_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT245_SCIFA5_RTS__MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT245_SCIFB_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT245_SCIFA5_RTS__MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT246_SCIFA5_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT246_SCIFB_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT247_SCIFA5_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT247_SCIFB_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT248_I2C_SCL3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU2TO0_MARK, PORT248_I2C_SCL3_MARK, MSIOF2R_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT248_SCIFA5_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT248_SCIFB_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT249_I2C_SDA3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_I2C_SDA3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT249_IROUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_I2C_SDA3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT27_I2C_SCL2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XDVFS1_MARK, PORT27_I2C_SCL2_MARK, PORT27_I2C_SCL3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT27_I2C_SCL3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XDVFS1_MARK, PORT27_I2C_SCL2_MARK, PORT27_I2C_SCL3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT27_IROUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MFG0_OUT1_MARK, PORT27_IROUT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT28_I2C_SDA2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XDVFS2_MARK, PORT28_I2C_SDA2_MARK, PORT28_I2C_SDA3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT28_I2C_SDA3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XDVFS2_MARK, PORT28_I2C_SDA2_MARK, PORT28_I2C_SDA3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT28_TPU1TO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT28_TPU1TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT29_TPU1TO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SIM_RST_MARK, PORT29_TPU1TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT30_VIO_CKOR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SIM_CLK_MARK, PORT30_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT31_IROUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SIM_D_MARK, PORT31_IROUT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT32CR	board/kmc/kzm9g/kzm9g.c	/^#define PORT32CR /;"	d	file:
PORT33CR	board/kmc/kzm9g/kzm9g.c	/^#define PORT33CR /;"	d	file:
PORT34CR	board/kmc/kzm9g/kzm9g.c	/^#define PORT34CR /;"	d	file:
PORT35CR	board/kmc/kzm9g/kzm9g.c	/^#define PORT35CR /;"	d	file:
PORT47_FSICSPDIF_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSICOSLD_MARK, PORT47_FSICSPDIF_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT49_IRDA_OUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIACK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, FSIAOMC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT49_IROUT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIACK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, FSIAOMC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT53_FSICSPDIF_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT53_FSICSPDIF_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT53_IRDA_IN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIASPDIF_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, FSIBSPDIF_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT54_IRDA_FIRSEL_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBCK_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FSIBOMC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PORT58_KEYOUT7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A12_MARK, PORT58_KEYOUT7_MARK, TPU4TO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT59_KEYOUT6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A13_MARK, PORT59_KEYOUT6_MARK, TPU0TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORT91_RDWR_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	CS5A__MARK, PORT91_RDWR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
PORTA	arch/arm/include/asm/arch-mx27/gpio.h	/^#define PORTA /;"	d
PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA /;"	d
PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA /;"	d
PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA /;"	d
PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA /;"	d
PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA /;"	d
PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_CLEAR /;"	d
PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_CLEAR /;"	d
PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_CLEAR /;"	d
PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_CLEAR /;"	d
PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_CLEAR /;"	d
PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_DIR_CLEAR /;"	d
PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_DIR_CLEAR /;"	d
PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_DIR_CLEAR /;"	d
PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_DIR_CLEAR /;"	d
PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_DIR_CLEAR /;"	d
PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_DIR_SET /;"	d
PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_DIR_SET /;"	d
PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_DIR_SET /;"	d
PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_DIR_SET /;"	d
PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_DIR_SET /;"	d
PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_FER /;"	d
PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_FER /;"	d
PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_FER /;"	d
PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_FER /;"	d
PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_FER /;"	d
PORTA_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTA_FER /;"	d
PORTA_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTA_FER_CLR /;"	d
PORTA_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTA_FER_SET /;"	d
PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_INEN /;"	d
PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_INEN /;"	d
PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_INEN /;"	d
PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_INEN /;"	d
PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_INEN /;"	d
PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_MUX /;"	d
PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_MUX /;"	d
PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_MUX /;"	d
PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_MUX /;"	d
PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_MUX /;"	d
PORTA_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTA_MUX /;"	d
PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTA_SET /;"	d
PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTA_SET /;"	d
PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTA_SET /;"	d
PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTA_SET /;"	d
PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTA_SET /;"	d
PORTB	arch/arm/include/asm/arch-mx27/gpio.h	/^#define PORTB /;"	d
PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB /;"	d
PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB /;"	d
PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB /;"	d
PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB /;"	d
PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB /;"	d
PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_CLEAR /;"	d
PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_CLEAR /;"	d
PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_CLEAR /;"	d
PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_CLEAR /;"	d
PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_CLEAR /;"	d
PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_DIR_CLEAR /;"	d
PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_DIR_CLEAR /;"	d
PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_DIR_CLEAR /;"	d
PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_DIR_CLEAR /;"	d
PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_DIR_CLEAR /;"	d
PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_DIR_SET /;"	d
PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_DIR_SET /;"	d
PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_DIR_SET /;"	d
PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_DIR_SET /;"	d
PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_DIR_SET /;"	d
PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_FER /;"	d
PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_FER /;"	d
PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_FER /;"	d
PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_FER /;"	d
PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_FER /;"	d
PORTB_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTB_FER /;"	d
PORTB_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTB_FER_CLR /;"	d
PORTB_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTB_FER_SET /;"	d
PORTB_HOTPLUG_ENABLE	drivers/video/i915_reg.h	/^#define PORTB_HOTPLUG_ENABLE /;"	d
PORTB_HOTPLUG_LONG_DETECT	drivers/video/i915_reg.h	/^#define PORTB_HOTPLUG_LONG_DETECT /;"	d
PORTB_HOTPLUG_NO_DETECT	drivers/video/i915_reg.h	/^#define PORTB_HOTPLUG_NO_DETECT /;"	d
PORTB_HOTPLUG_SHORT_DETECT	drivers/video/i915_reg.h	/^#define PORTB_HOTPLUG_SHORT_DETECT /;"	d
PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_INEN /;"	d
PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_INEN /;"	d
PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_INEN /;"	d
PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_INEN /;"	d
PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_INEN /;"	d
PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_MUX /;"	d
PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_MUX /;"	d
PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_MUX /;"	d
PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_MUX /;"	d
PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_MUX /;"	d
PORTB_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTB_MUX /;"	d
PORTB_PULSE_DURATION_100ms	drivers/video/i915_reg.h	/^#define PORTB_PULSE_DURATION_100ms /;"	d
PORTB_PULSE_DURATION_2ms	drivers/video/i915_reg.h	/^#define PORTB_PULSE_DURATION_2ms /;"	d
PORTB_PULSE_DURATION_4_5ms	drivers/video/i915_reg.h	/^#define PORTB_PULSE_DURATION_4_5ms /;"	d
PORTB_PULSE_DURATION_6ms	drivers/video/i915_reg.h	/^#define PORTB_PULSE_DURATION_6ms /;"	d
PORTB_PULSE_DURATION_MASK	drivers/video/i915_reg.h	/^#define PORTB_PULSE_DURATION_MASK	/;"	d
PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTB_SET /;"	d
PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTB_SET /;"	d
PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTB_SET /;"	d
PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTB_SET /;"	d
PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTB_SET /;"	d
PORTC	arch/arm/include/asm/arch-mx27/gpio.h	/^#define PORTC /;"	d
PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC /;"	d
PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC /;"	d
PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC /;"	d
PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC /;"	d
PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC /;"	d
PORTCIO	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO /;"	d
PORTCIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO_CLEAR /;"	d
PORTCIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO_DIR /;"	d
PORTCIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO_FER /;"	d
PORTCIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO_INEN /;"	d
PORTCIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO_SET /;"	d
PORTCIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTCIO_TOGGLE /;"	d
PORTCR	include/sh_pfc.h	/^#define PORTCR(/;"	d
PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_CLEAR /;"	d
PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_CLEAR /;"	d
PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_CLEAR /;"	d
PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_CLEAR /;"	d
PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_CLEAR /;"	d
PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_DIR_CLEAR /;"	d
PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_DIR_CLEAR /;"	d
PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_DIR_CLEAR /;"	d
PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_DIR_CLEAR /;"	d
PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_DIR_CLEAR /;"	d
PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_DIR_SET /;"	d
PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_DIR_SET /;"	d
PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_DIR_SET /;"	d
PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_DIR_SET /;"	d
PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_DIR_SET /;"	d
PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_FER /;"	d
PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_FER /;"	d
PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_FER /;"	d
PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_FER /;"	d
PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_FER /;"	d
PORTC_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTC_FER /;"	d
PORTC_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTC_FER_CLR /;"	d
PORTC_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTC_FER_SET /;"	d
PORTC_HOTPLUG_ENABLE	drivers/video/i915_reg.h	/^#define PORTC_HOTPLUG_ENABLE /;"	d
PORTC_HOTPLUG_LONG_DETECT	drivers/video/i915_reg.h	/^#define PORTC_HOTPLUG_LONG_DETECT /;"	d
PORTC_HOTPLUG_NO_DETECT	drivers/video/i915_reg.h	/^#define PORTC_HOTPLUG_NO_DETECT /;"	d
PORTC_HOTPLUG_SHORT_DETECT	drivers/video/i915_reg.h	/^#define PORTC_HOTPLUG_SHORT_DETECT /;"	d
PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_INEN /;"	d
PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_INEN /;"	d
PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_INEN /;"	d
PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_INEN /;"	d
PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_INEN /;"	d
PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_MUX /;"	d
PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_MUX /;"	d
PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_MUX /;"	d
PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_MUX /;"	d
PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_MUX /;"	d
PORTC_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTC_MUX /;"	d
PORTC_PULSE_DURATION_100ms	drivers/video/i915_reg.h	/^#define PORTC_PULSE_DURATION_100ms /;"	d
PORTC_PULSE_DURATION_2ms	drivers/video/i915_reg.h	/^#define PORTC_PULSE_DURATION_2ms /;"	d
PORTC_PULSE_DURATION_4_5ms	drivers/video/i915_reg.h	/^#define PORTC_PULSE_DURATION_4_5ms /;"	d
PORTC_PULSE_DURATION_6ms	drivers/video/i915_reg.h	/^#define PORTC_PULSE_DURATION_6ms /;"	d
PORTC_PULSE_DURATION_MASK	drivers/video/i915_reg.h	/^#define PORTC_PULSE_DURATION_MASK	/;"	d
PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTC_SET /;"	d
PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTC_SET /;"	d
PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTC_SET /;"	d
PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTC_SET /;"	d
PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTC_SET /;"	d
PORTD	arch/arm/include/asm/arch-mx27/gpio.h	/^#define PORTD /;"	d
PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD /;"	d
PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD /;"	d
PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD /;"	d
PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD /;"	d
PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD /;"	d
PORTDIO	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO /;"	d
PORTDIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO_CLEAR /;"	d
PORTDIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO_DIR /;"	d
PORTDIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO_FER /;"	d
PORTDIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO_INEN /;"	d
PORTDIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO_SET /;"	d
PORTDIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTDIO_TOGGLE /;"	d
PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_CLEAR /;"	d
PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_CLEAR /;"	d
PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_CLEAR /;"	d
PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_CLEAR /;"	d
PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_CLEAR /;"	d
PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_DIR_CLEAR /;"	d
PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_DIR_CLEAR /;"	d
PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_DIR_CLEAR /;"	d
PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_DIR_CLEAR /;"	d
PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_DIR_CLEAR /;"	d
PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_DIR_SET /;"	d
PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_DIR_SET /;"	d
PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_DIR_SET /;"	d
PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_DIR_SET /;"	d
PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_DIR_SET /;"	d
PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_FER /;"	d
PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_FER /;"	d
PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_FER /;"	d
PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_FER /;"	d
PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_FER /;"	d
PORTD_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTD_FER /;"	d
PORTD_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTD_FER_CLR /;"	d
PORTD_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTD_FER_SET /;"	d
PORTD_HOTPLUG_ENABLE	drivers/video/i915_reg.h	/^#define PORTD_HOTPLUG_ENABLE /;"	d
PORTD_HOTPLUG_LONG_DETECT	drivers/video/i915_reg.h	/^#define PORTD_HOTPLUG_LONG_DETECT /;"	d
PORTD_HOTPLUG_NO_DETECT	drivers/video/i915_reg.h	/^#define PORTD_HOTPLUG_NO_DETECT /;"	d
PORTD_HOTPLUG_SHORT_DETECT	drivers/video/i915_reg.h	/^#define PORTD_HOTPLUG_SHORT_DETECT /;"	d
PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_INEN /;"	d
PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_INEN /;"	d
PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_INEN /;"	d
PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_INEN /;"	d
PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_INEN /;"	d
PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_MUX /;"	d
PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_MUX /;"	d
PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_MUX /;"	d
PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_MUX /;"	d
PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_MUX /;"	d
PORTD_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTD_MUX /;"	d
PORTD_PULSE_DURATION_100ms	drivers/video/i915_reg.h	/^#define PORTD_PULSE_DURATION_100ms /;"	d
PORTD_PULSE_DURATION_2ms	drivers/video/i915_reg.h	/^#define PORTD_PULSE_DURATION_2ms /;"	d
PORTD_PULSE_DURATION_4_5ms	drivers/video/i915_reg.h	/^#define PORTD_PULSE_DURATION_4_5ms /;"	d
PORTD_PULSE_DURATION_6ms	drivers/video/i915_reg.h	/^#define PORTD_PULSE_DURATION_6ms /;"	d
PORTD_PULSE_DURATION_MASK	drivers/video/i915_reg.h	/^#define PORTD_PULSE_DURATION_MASK	/;"	d
PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTD_SET /;"	d
PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTD_SET /;"	d
PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTD_SET /;"	d
PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTD_SET /;"	d
PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTD_SET /;"	d
PORTE	arch/arm/include/asm/arch-mx27/gpio.h	/^#define PORTE /;"	d
PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE /;"	d
PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE /;"	d
PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE /;"	d
PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE /;"	d
PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE /;"	d
PORTEIO	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO /;"	d
PORTEIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO_CLEAR /;"	d
PORTEIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO_DIR /;"	d
PORTEIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO_FER /;"	d
PORTEIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO_INEN /;"	d
PORTEIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO_SET /;"	d
PORTEIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTEIO_TOGGLE /;"	d
PORTEXP_IO_NR	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define PORTEXP_IO_NR(/;"	d	file:
PORTEXP_IO_NR	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define PORTEXP_IO_NR(/;"	d	file:
PORTEXP_IO_TO_CHIP	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define PORTEXP_IO_TO_CHIP(/;"	d	file:
PORTEXP_IO_TO_CHIP	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define PORTEXP_IO_TO_CHIP(/;"	d	file:
PORTEXP_IO_TO_PIN	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define PORTEXP_IO_TO_PIN(/;"	d	file:
PORTEXP_IO_TO_PIN	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define PORTEXP_IO_TO_PIN(/;"	d	file:
PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_CLEAR /;"	d
PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_CLEAR /;"	d
PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_CLEAR /;"	d
PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_CLEAR /;"	d
PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_CLEAR /;"	d
PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_DIR_CLEAR /;"	d
PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_DIR_CLEAR /;"	d
PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_DIR_CLEAR /;"	d
PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_DIR_CLEAR /;"	d
PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_DIR_CLEAR /;"	d
PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_DIR_SET /;"	d
PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_DIR_SET /;"	d
PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_DIR_SET /;"	d
PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_DIR_SET /;"	d
PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_DIR_SET /;"	d
PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_FER /;"	d
PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_FER /;"	d
PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_FER /;"	d
PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_FER /;"	d
PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_FER /;"	d
PORTE_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTE_FER /;"	d
PORTE_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTE_FER_CLR /;"	d
PORTE_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTE_FER_SET /;"	d
PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_INEN /;"	d
PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_INEN /;"	d
PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_INEN /;"	d
PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_INEN /;"	d
PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_INEN /;"	d
PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_MUX /;"	d
PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_MUX /;"	d
PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_MUX /;"	d
PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_MUX /;"	d
PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_MUX /;"	d
PORTE_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTE_MUX /;"	d
PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTE_SET /;"	d
PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTE_SET /;"	d
PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTE_SET /;"	d
PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTE_SET /;"	d
PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTE_SET /;"	d
PORTF	arch/arm/include/asm/arch-mx27/gpio.h	/^#define PORTF /;"	d
PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF /;"	d
PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF /;"	d
PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF /;"	d
PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF /;"	d
PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF /;"	d
PORTFIO	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO /;"	d
PORTFIO	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO /;"	d
PORTFIO	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO /;"	d
PORTFIO	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO /;"	d
PORTFIO	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO /;"	d
PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_BOTH /;"	d
PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_BOTH /;"	d
PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_BOTH /;"	d
PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_BOTH /;"	d
PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_BOTH /;"	d
PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_CLEAR /;"	d
PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_CLEAR /;"	d
PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_CLEAR /;"	d
PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_CLEAR /;"	d
PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_CLEAR /;"	d
PORTFIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_DIR /;"	d
PORTFIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_DIR /;"	d
PORTFIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_DIR /;"	d
PORTFIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_DIR /;"	d
PORTFIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_DIR /;"	d
PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_EDGE /;"	d
PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_EDGE /;"	d
PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_EDGE /;"	d
PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_EDGE /;"	d
PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_EDGE /;"	d
PORTFIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_INEN /;"	d
PORTFIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_INEN /;"	d
PORTFIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_INEN /;"	d
PORTFIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_INEN /;"	d
PORTFIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_INEN /;"	d
PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKA /;"	d
PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKA /;"	d
PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKA /;"	d
PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKA /;"	d
PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKA /;"	d
PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKA_CLEAR /;"	d
PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKA_CLEAR /;"	d
PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKA_CLEAR /;"	d
PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKA_CLEAR /;"	d
PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKA_CLEAR /;"	d
PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKA_SET /;"	d
PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKA_SET /;"	d
PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKA_SET /;"	d
PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKA_SET /;"	d
PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKA_SET /;"	d
PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKA_TOGGLE /;"	d
PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKA_TOGGLE /;"	d
PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKA_TOGGLE /;"	d
PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKA_TOGGLE /;"	d
PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKA_TOGGLE /;"	d
PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKB /;"	d
PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKB /;"	d
PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKB /;"	d
PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKB /;"	d
PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKB /;"	d
PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKB_CLEAR /;"	d
PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKB_CLEAR /;"	d
PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKB_CLEAR /;"	d
PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKB_CLEAR /;"	d
PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKB_CLEAR /;"	d
PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKB_SET /;"	d
PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKB_SET /;"	d
PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKB_SET /;"	d
PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKB_SET /;"	d
PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKB_SET /;"	d
PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_MASKB_TOGGLE /;"	d
PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_MASKB_TOGGLE /;"	d
PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_MASKB_TOGGLE /;"	d
PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_MASKB_TOGGLE /;"	d
PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_MASKB_TOGGLE /;"	d
PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_POLAR /;"	d
PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_POLAR /;"	d
PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_POLAR /;"	d
PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_POLAR /;"	d
PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_POLAR /;"	d
PORTFIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_SET /;"	d
PORTFIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_SET /;"	d
PORTFIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_SET /;"	d
PORTFIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_SET /;"	d
PORTFIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_SET /;"	d
PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTFIO_TOGGLE /;"	d
PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTFIO_TOGGLE /;"	d
PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTFIO_TOGGLE /;"	d
PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTFIO_TOGGLE /;"	d
PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PORTFIO_TOGGLE /;"	d
PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_CLEAR /;"	d
PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_CLEAR /;"	d
PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_CLEAR /;"	d
PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_CLEAR /;"	d
PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_CLEAR /;"	d
PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_DIR_CLEAR /;"	d
PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_DIR_CLEAR /;"	d
PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_DIR_CLEAR /;"	d
PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_DIR_CLEAR /;"	d
PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_DIR_CLEAR /;"	d
PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_DIR_SET /;"	d
PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_DIR_SET /;"	d
PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_DIR_SET /;"	d
PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_DIR_SET /;"	d
PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_DIR_SET /;"	d
PORTF_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTF_DRIVE /;"	d
PORTF_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTF_DRIVE /;"	d
PORTF_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTF_DRIVE /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_FER /;"	d
PORTF_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTF_FER /;"	d
PORTF_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTF_FER_CLR /;"	d
PORTF_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTF_FER_SET /;"	d
PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTF_HYSTERESIS /;"	d
PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTF_HYSTERESIS /;"	d
PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTF_HYSTERESIS /;"	d
PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_INEN /;"	d
PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_INEN /;"	d
PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_INEN /;"	d
PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_INEN /;"	d
PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_INEN /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_MUX /;"	d
PORTF_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTF_MUX /;"	d
PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTF_SET /;"	d
PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTF_SET /;"	d
PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTF_SET /;"	d
PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTF_SET /;"	d
PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTF_SET /;"	d
PORTF_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTF_SLEW /;"	d
PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG /;"	d
PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG /;"	d
PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG /;"	d
PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG /;"	d
PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG /;"	d
PORTGIO	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO /;"	d
PORTGIO	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO /;"	d
PORTGIO	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO /;"	d
PORTGIO	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO /;"	d
PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_BOTH /;"	d
PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_BOTH /;"	d
PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_BOTH /;"	d
PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_BOTH /;"	d
PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_CLEAR /;"	d
PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_CLEAR /;"	d
PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_CLEAR /;"	d
PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_CLEAR /;"	d
PORTGIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_DIR /;"	d
PORTGIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_DIR /;"	d
PORTGIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_DIR /;"	d
PORTGIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_DIR /;"	d
PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_EDGE /;"	d
PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_EDGE /;"	d
PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_EDGE /;"	d
PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_EDGE /;"	d
PORTGIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_INEN /;"	d
PORTGIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_INEN /;"	d
PORTGIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_INEN /;"	d
PORTGIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_INEN /;"	d
PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKA /;"	d
PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKA /;"	d
PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKA /;"	d
PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKA /;"	d
PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKA_CLEAR /;"	d
PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKA_CLEAR /;"	d
PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKA_CLEAR /;"	d
PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKA_CLEAR /;"	d
PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKA_SET /;"	d
PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKA_SET /;"	d
PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKA_SET /;"	d
PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKA_SET /;"	d
PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKA_TOGGLE /;"	d
PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKA_TOGGLE /;"	d
PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKA_TOGGLE /;"	d
PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKA_TOGGLE /;"	d
PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKB /;"	d
PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKB /;"	d
PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKB /;"	d
PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKB /;"	d
PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKB_CLEAR /;"	d
PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKB_CLEAR /;"	d
PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKB_CLEAR /;"	d
PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKB_CLEAR /;"	d
PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKB_SET /;"	d
PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKB_SET /;"	d
PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKB_SET /;"	d
PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKB_SET /;"	d
PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_MASKB_TOGGLE /;"	d
PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_MASKB_TOGGLE /;"	d
PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_MASKB_TOGGLE /;"	d
PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_MASKB_TOGGLE /;"	d
PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_POLAR /;"	d
PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_POLAR /;"	d
PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_POLAR /;"	d
PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_POLAR /;"	d
PORTGIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_SET /;"	d
PORTGIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_SET /;"	d
PORTGIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_SET /;"	d
PORTGIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_SET /;"	d
PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTGIO_TOGGLE /;"	d
PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTGIO_TOGGLE /;"	d
PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTGIO_TOGGLE /;"	d
PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTGIO_TOGGLE /;"	d
PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_CLEAR /;"	d
PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_CLEAR /;"	d
PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_CLEAR /;"	d
PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_CLEAR /;"	d
PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_CLEAR /;"	d
PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_DIR_CLEAR /;"	d
PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_DIR_CLEAR /;"	d
PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_DIR_CLEAR /;"	d
PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_DIR_CLEAR /;"	d
PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_DIR_CLEAR /;"	d
PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_DIR_SET /;"	d
PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_DIR_SET /;"	d
PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_DIR_SET /;"	d
PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_DIR_SET /;"	d
PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_DIR_SET /;"	d
PORTG_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTG_DRIVE /;"	d
PORTG_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTG_DRIVE /;"	d
PORTG_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTG_DRIVE /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_FER /;"	d
PORTG_FER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTG_FER /;"	d
PORTG_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTG_FER_CLR /;"	d
PORTG_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTG_FER_SET /;"	d
PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTG_HYSTERESIS /;"	d
PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTG_HYSTERESIS /;"	d
PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTG_HYSTERESIS /;"	d
PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_INEN /;"	d
PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_INEN /;"	d
PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_INEN /;"	d
PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_INEN /;"	d
PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_INEN /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_MUX /;"	d
PORTG_MUX	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define PORTG_MUX /;"	d
PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTG_SET /;"	d
PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTG_SET /;"	d
PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTG_SET /;"	d
PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTG_SET /;"	d
PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTG_SET /;"	d
PORTG_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTG_SLEW /;"	d
PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH /;"	d
PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH /;"	d
PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH /;"	d
PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH /;"	d
PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH /;"	d
PORTHIO	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO /;"	d
PORTHIO	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO /;"	d
PORTHIO	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO /;"	d
PORTHIO	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO /;"	d
PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_BOTH /;"	d
PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_BOTH /;"	d
PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_BOTH /;"	d
PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_BOTH /;"	d
PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_CLEAR /;"	d
PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_CLEAR /;"	d
PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_CLEAR /;"	d
PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_CLEAR /;"	d
PORTHIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_DIR /;"	d
PORTHIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_DIR /;"	d
PORTHIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_DIR /;"	d
PORTHIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_DIR /;"	d
PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_EDGE /;"	d
PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_EDGE /;"	d
PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_EDGE /;"	d
PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_EDGE /;"	d
PORTHIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_INEN /;"	d
PORTHIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_INEN /;"	d
PORTHIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_INEN /;"	d
PORTHIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_INEN /;"	d
PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKA /;"	d
PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKA /;"	d
PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKA /;"	d
PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKA /;"	d
PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKA_CLEAR /;"	d
PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKA_CLEAR /;"	d
PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKA_CLEAR /;"	d
PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKA_CLEAR /;"	d
PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKA_SET /;"	d
PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKA_SET /;"	d
PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKA_SET /;"	d
PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKA_SET /;"	d
PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKA_TOGGLE /;"	d
PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKA_TOGGLE /;"	d
PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKA_TOGGLE /;"	d
PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKA_TOGGLE /;"	d
PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKB /;"	d
PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKB /;"	d
PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKB /;"	d
PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKB /;"	d
PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKB_CLEAR /;"	d
PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKB_CLEAR /;"	d
PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKB_CLEAR /;"	d
PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKB_CLEAR /;"	d
PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKB_SET /;"	d
PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKB_SET /;"	d
PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKB_SET /;"	d
PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKB_SET /;"	d
PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_MASKB_TOGGLE /;"	d
PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_MASKB_TOGGLE /;"	d
PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_MASKB_TOGGLE /;"	d
PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_MASKB_TOGGLE /;"	d
PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_POLAR /;"	d
PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_POLAR /;"	d
PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_POLAR /;"	d
PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_POLAR /;"	d
PORTHIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_SET /;"	d
PORTHIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_SET /;"	d
PORTHIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_SET /;"	d
PORTHIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_SET /;"	d
PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTHIO_TOGGLE /;"	d
PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTHIO_TOGGLE /;"	d
PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTHIO_TOGGLE /;"	d
PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTHIO_TOGGLE /;"	d
PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_CLEAR /;"	d
PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_CLEAR /;"	d
PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_CLEAR /;"	d
PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_CLEAR /;"	d
PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_CLEAR /;"	d
PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_DIR_CLEAR /;"	d
PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_DIR_CLEAR /;"	d
PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_DIR_CLEAR /;"	d
PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_DIR_CLEAR /;"	d
PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_DIR_CLEAR /;"	d
PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_DIR_SET /;"	d
PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_DIR_SET /;"	d
PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_DIR_SET /;"	d
PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_DIR_SET /;"	d
PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_DIR_SET /;"	d
PORTH_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTH_DRIVE /;"	d
PORTH_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTH_DRIVE /;"	d
PORTH_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTH_DRIVE /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_FER /;"	d
PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_FER /;"	d
PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTH_HYSTERESIS /;"	d
PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTH_HYSTERESIS /;"	d
PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTH_HYSTERESIS /;"	d
PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_INEN /;"	d
PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_INEN /;"	d
PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_INEN /;"	d
PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_INEN /;"	d
PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_INEN /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_MUX /;"	d
PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_MUX /;"	d
PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTH_SET /;"	d
PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTH_SET /;"	d
PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTH_SET /;"	d
PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTH_SET /;"	d
PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTH_SET /;"	d
PORTH_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PORTH_SLEW /;"	d
PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI /;"	d
PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI /;"	d
PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI /;"	d
PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI /;"	d
PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI /;"	d
PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_CLEAR /;"	d
PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_CLEAR /;"	d
PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_CLEAR /;"	d
PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_CLEAR /;"	d
PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_CLEAR /;"	d
PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_DIR_CLEAR /;"	d
PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_DIR_CLEAR /;"	d
PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_DIR_CLEAR /;"	d
PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_DIR_CLEAR /;"	d
PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_DIR_CLEAR /;"	d
PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_DIR_SET /;"	d
PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_DIR_SET /;"	d
PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_DIR_SET /;"	d
PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_DIR_SET /;"	d
PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_DIR_SET /;"	d
PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_FER /;"	d
PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_FER /;"	d
PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_FER /;"	d
PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_FER /;"	d
PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_FER /;"	d
PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_INEN /;"	d
PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_INEN /;"	d
PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_INEN /;"	d
PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_INEN /;"	d
PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_INEN /;"	d
PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_MUX /;"	d
PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_MUX /;"	d
PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_MUX /;"	d
PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_MUX /;"	d
PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_MUX /;"	d
PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTI_SET /;"	d
PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTI_SET /;"	d
PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTI_SET /;"	d
PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTI_SET /;"	d
PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTI_SET /;"	d
PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ /;"	d
PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ /;"	d
PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ /;"	d
PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ /;"	d
PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ /;"	d
PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_CLEAR /;"	d
PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_CLEAR /;"	d
PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_CLEAR /;"	d
PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_CLEAR /;"	d
PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_CLEAR /;"	d
PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_DIR_CLEAR /;"	d
PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_DIR_CLEAR /;"	d
PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_DIR_CLEAR /;"	d
PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_DIR_CLEAR /;"	d
PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_DIR_CLEAR /;"	d
PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_DIR_SET /;"	d
PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_DIR_SET /;"	d
PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_DIR_SET /;"	d
PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_DIR_SET /;"	d
PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_DIR_SET /;"	d
PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_FER /;"	d
PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_FER /;"	d
PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_FER /;"	d
PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_FER /;"	d
PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_FER /;"	d
PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_INEN /;"	d
PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_INEN /;"	d
PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_INEN /;"	d
PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_INEN /;"	d
PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_INEN /;"	d
PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_MUX /;"	d
PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_MUX /;"	d
PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_MUX /;"	d
PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_MUX /;"	d
PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_MUX /;"	d
PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define PORTJ_SET /;"	d
PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define PORTJ_SET /;"	d
PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define PORTJ_SET /;"	d
PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define PORTJ_SET /;"	d
PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define PORTJ_SET /;"	d
PORTMAP_GETPORT	net/nfs.h	/^#define PORTMAP_GETPORT /;"	d
PORTMUX_BUSKEEPER	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_BUSKEEPER	/;"	d
PORTMUX_DIR_INPUT	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_DIR_INPUT	/;"	d
PORTMUX_DIR_OUTPUT	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_DIR_OUTPUT	/;"	d
PORTMUX_DRIVE_HIGH	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_DRIVE_HIGH	/;"	d
PORTMUX_DRIVE_LOW	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_DRIVE_LOW	/;"	d
PORTMUX_DRIVE_MAX	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_DRIVE_MAX	/;"	d
PORTMUX_DRIVE_MIN	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_DRIVE_MIN	/;"	d
PORTMUX_EBI_CF	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_EBI_CF(/;"	d
PORTMUX_EBI_CS	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_EBI_CS(/;"	d
PORTMUX_EBI_NAND	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_EBI_NAND	/;"	d
PORTMUX_EBI_NWAIT	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_EBI_NWAIT	/;"	d
PORTMUX_FUNC_A	arch/avr32/include/asm/arch-common/portmux-pio.h	/^	PORTMUX_FUNC_A,$/;"	e	enum:portmux_function
PORTMUX_FUNC_B	arch/avr32/include/asm/arch-common/portmux-pio.h	/^	PORTMUX_FUNC_B,$/;"	e	enum:portmux_function
PORTMUX_INIT_HIGH	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_INIT_HIGH	/;"	d
PORTMUX_INIT_LOW	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_INIT_LOW	/;"	d
PORTMUX_MACB_MII	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_MACB_MII	/;"	d
PORTMUX_MACB_RMII	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_MACB_RMII	/;"	d
PORTMUX_MACB_SPEED	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_MACB_SPEED	/;"	d
PORTMUX_MMCI_4BIT	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_MMCI_4BIT	/;"	d
PORTMUX_MMCI_8BIT	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_MMCI_8BIT	/;"	d
PORTMUX_MMCI_EXT_PULLUP	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_MMCI_EXT_PULLUP	/;"	d
PORTMUX_OPEN_DRAIN	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_OPEN_DRAIN	/;"	d
PORTMUX_PINS	drivers/mmc/bfin_sdh.c	/^# define PORTMUX_PINS /;"	d	file:
PORTMUX_PORT_A	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_PORT_A	/;"	d
PORTMUX_PORT_B	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_PORT_B	/;"	d
PORTMUX_PORT_C	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_PORT_C	/;"	d
PORTMUX_PORT_D	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_PORT_D	/;"	d
PORTMUX_PORT_E	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define PORTMUX_PORT_E	/;"	d
PORTMUX_PULL_DOWN	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_PULL_DOWN	/;"	d
PORTMUX_PULL_UP	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define PORTMUX_PULL_UP	/;"	d
PORTSC_PSPD	drivers/usb/host/ehci.h	/^#define PORTSC_PSPD(/;"	d
PORTSC_PSPD_FS	drivers/usb/host/ehci.h	/^#define PORTSC_PSPD_FS	/;"	d
PORTSC_PSPD_HS	drivers/usb/host/ehci.h	/^#define PORTSC_PSPD_HS	/;"	d
PORTSC_PSPD_LS	drivers/usb/host/ehci.h	/^#define PORTSC_PSPD_LS	/;"	d
PORT_1	include/sh_pfc.h	/^#define PORT_1(/;"	d
PORT_10	include/sh_pfc.h	/^#define PORT_10(/;"	d
PORT_10_REV	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define PORT_10_REV(/;"	d
PORT_10_REV	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define PORT_10_REV(/;"	d	file:
PORT_10_REV	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define PORT_10_REV(/;"	d	file:
PORT_10_REV	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define PORT_10_REV(/;"	d	file:
PORT_90	include/sh_pfc.h	/^#define PORT_90(/;"	d
PORT_ACTIVATE_UPPER_ADDR	drivers/block/sata_sil.h	/^	PORT_ACTIVATE_UPPER_ADDR = 0x101c,$/;"	e	enum:__anone6fe50d30103
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(DATA),$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN0),		\/* PORT0_FN0 -> PORT211_FN0 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN1),		\/* PORT0_FN1 -> PORT211_FN1 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN2),		\/* PORT0_FN2 -> PORT211_FN2 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN3),		\/* PORT0_FN3 -> PORT211_FN3 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN4),		\/* PORT0_FN4 -> PORT211_FN4 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN5),		\/* PORT0_FN5 -> PORT211_FN5 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN6),		\/* PORT0_FN6 -> PORT211_FN6 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN7),		\/* PORT0_FN7 -> PORT211_FN7 *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN_IN),	\/* PORT0_FN_IN -> PORT211_FN_IN *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(FN_OUT),	\/* PORT0_FN_OUT -> PORT211_FN_OUT *\/$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(IN),$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(IN_PD),$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(IN_PU),$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	PORT_ALL(OUT),$/;"	e	enum:__anona304c1340103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(DATA),			\/* PORT0_DATA -> PORT309_DATA *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN0),			\/* PORT0_FN0 -> PORT309_FN0 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN1),			\/* PORT0_FN1 -> PORT309_FN1 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN2),			\/* PORT0_FN2 -> PORT309_FN2 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN3),			\/* PORT0_FN3 -> PORT309_FN3 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN4),			\/* PORT0_FN4 -> PORT309_FN4 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN5),			\/* PORT0_FN5 -> PORT309_FN5 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN6),			\/* PORT0_FN6 -> PORT309_FN6 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN7),			\/* PORT0_FN7 -> PORT309_FN7 *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN_IN),		\/* PORT0_FN_IN -> PORT309_FN_IN *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(FN_OUT),		\/* PORT0_FN_OUT -> PORT309_FN_OUT *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(IN),			\/* PORT0_IN -> PORT309_IN *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(IN_PD),		\/* PORT0_IN_PD -> PORT309_IN_PD *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(IN_PU),		\/* PORT0_IN_PU -> PORT309_IN_PU *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT_ALL(OUT),			\/* PORT0_OUT -> PORT309_OUT *\/$/;"	e	enum:__anon991a8e2d0103	file:
PORT_ALL	include/sh_pfc.h	/^#define PORT_ALL(/;"	d
PORT_AUI	include/linux/ethtool.h	/^#define PORT_AUI	/;"	d
PORT_BASE	arch/sh/include/asm/cpu_sh7720.h	/^#define PORT_BASE	/;"	d
PORT_BASE	drivers/block/sata_ceva.c	/^#define PORT_BASE	/;"	d	file:
PORT_BNC	include/linux/ethtool.h	/^#define PORT_BNC	/;"	d
PORT_BOOTPC	net/bootp.c	/^#define PORT_BOOTPC	/;"	d	file:
PORT_BOOTPS	net/bootp.c	/^#define PORT_BOOTPS	/;"	d	file:
PORT_BYTE	drivers/bios_emulator/biosemui.h	/^	PORT_BYTE = 1,$/;"	e	enum:__anonb186e4ea0203
PORT_C	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define PORT_C /;"	d
PORT_CEC	drivers/usb/host/xhci.h	/^#define PORT_CEC	/;"	d
PORT_CERR_DATA	drivers/block/sata_sil.h	/^	PORT_CERR_DATA		= 3, \/* Error in data FIS not detected by dev *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_DEV	drivers/block/sata_sil.h	/^	PORT_CERR_DEV		= 1, \/* Error bit in D2H Register FIS *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_DIRECTION	drivers/block/sata_sil.h	/^	PORT_CERR_DIRECTION	= 6, \/* Data direction mismatch *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_INCONSISTENT	drivers/block/sata_sil.h	/^	PORT_CERR_INCONSISTENT	= 5, \/* Protocol mismatch *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_OVERRUN	drivers/block/sata_sil.h	/^	PORT_CERR_OVERRUN	= 8, \/* Ran out of SGEs while reading *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_SDB	drivers/block/sata_sil.h	/^	PORT_CERR_SDB		= 2, \/* Error bit in SDB FIS *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_SEND	drivers/block/sata_sil.h	/^	PORT_CERR_SEND		= 4, \/* Initial cmd FIS transmission failure *\/$/;"	e	enum:__anone6fe50d30103
PORT_CERR_UNDERRUN	drivers/block/sata_sil.h	/^	PORT_CERR_UNDERRUN	= 7, \/* Ran out of SGEs while writing *\/$/;"	e	enum:__anone6fe50d30103
PORT_CFG	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define PORT_CFG	/;"	d
PORT_CFG_EXTEND_VALUE	drivers/net/mvgbe.h	/^#define PORT_CFG_EXTEND_VALUE	/;"	d
PORT_CMD	include/ahci.h	/^#define PORT_CMD	/;"	d
PORT_CMD_ACTIVATE	drivers/block/sata_sil.h	/^	PORT_CMD_ACTIVATE	= 0x1c00, \/* 64 bit cmd activate * 31 *\/$/;"	e	enum:__anone6fe50d30103
PORT_CMD_ATAPI	include/ahci.h	/^#define PORT_CMD_ATAPI	/;"	d
PORT_CMD_CLO	include/ahci.h	/^#define PORT_CMD_CLO	/;"	d
PORT_CMD_ERR	drivers/block/sata_sil.h	/^	PORT_CMD_ERR		= 0x1024, \/* command error number *\/$/;"	e	enum:__anone6fe50d30103
PORT_CMD_FIS_ON	include/ahci.h	/^#define PORT_CMD_FIS_ON	/;"	d
PORT_CMD_FIS_RX	include/ahci.h	/^#define PORT_CMD_FIS_RX	/;"	d
PORT_CMD_ICC_ACTIVE	include/ahci.h	/^#define PORT_CMD_ICC_ACTIVE	/;"	d
PORT_CMD_ICC_PARTIAL	include/ahci.h	/^#define PORT_CMD_ICC_PARTIAL	/;"	d
PORT_CMD_ICC_SLUMBER	include/ahci.h	/^#define PORT_CMD_ICC_SLUMBER	/;"	d
PORT_CMD_ISSUE	include/ahci.h	/^#define PORT_CMD_ISSUE	/;"	d
PORT_CMD_LIST_ON	include/ahci.h	/^#define PORT_CMD_LIST_ON	/;"	d
PORT_CMD_POWER_ON	include/ahci.h	/^#define PORT_CMD_POWER_ON	/;"	d
PORT_CMD_SPIN_UP	include/ahci.h	/^#define PORT_CMD_SPIN_UP	/;"	d
PORT_CMD_START	include/ahci.h	/^#define PORT_CMD_START	/;"	d
PORT_CONNECT	drivers/usb/host/xhci.h	/^#define PORT_CONNECT	/;"	d
PORT_CONTEXT	drivers/block/sata_sil.h	/^	PORT_CONTEXT		= 0x1e04,$/;"	e	enum:__anone6fe50d30103
PORT_CONTROL_BPT	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_BPT	/;"	d	file:
PORT_CONTROL_CLR	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_CLR	/;"	d	file:
PORT_CONTROL_DIS	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_DIS	/;"	d	file:
PORT_CONTROL_PRB	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_PRB	/;"	d	file:
PORT_CONTROL_PRI	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_PRI	/;"	d	file:
PORT_CONTROL_RBC	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_RBC	/;"	d	file:
PORT_CONTROL_SPD	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_SPD	/;"	d	file:
PORT_CONTROL_SRT	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_SRT	/;"	d	file:
PORT_CONTROL_STE	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_STE	/;"	d	file:
PORT_CONTROL_TBI	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_TBI	/;"	d	file:
PORT_CONTROL_ZOR	drivers/net/tsi108_eth.c	/^#define PORT_CONTROL_ZOR	/;"	d	file:
PORT_COUNT	drivers/net/phy/mv88e61xx.c	/^#define PORT_COUNT	/;"	d	file:
PORT_CRC_ERR_CNT	drivers/block/sata_sil.h	/^	PORT_CRC_ERR_CNT	= 0x1044,$/;"	e	enum:__anone6fe50d30103
PORT_CRC_ERR_THRESH	drivers/block/sata_sil.h	/^	PORT_CRC_ERR_THRESH	= 0x1046,$/;"	e	enum:__anone6fe50d30103
PORT_CSC	drivers/usb/host/xhci.h	/^#define PORT_CSC	/;"	d
PORT_CS_32BIT_ACTV	drivers/block/sata_sil.h	/^	PORT_CS_32BIT_ACTV	= (1 << 10), \/* 32-bit activation *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_CDB16	drivers/block/sata_sil.h	/^	PORT_CS_CDB16		= (1 << 5), \/* 0=12b cdb, 1=16b cdb *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_DEV_RST	drivers/block/sata_sil.h	/^	PORT_CS_DEV_RST		= (1 << 1), \/* device reset *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_INIT	drivers/block/sata_sil.h	/^	PORT_CS_INIT		= (1 << 2), \/* port initialize *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_IRQ_WOC	drivers/block/sata_sil.h	/^	PORT_CS_IRQ_WOC		= (1 << 3), \/* interrupt write one to clear *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_PMP_EN	drivers/block/sata_sil.h	/^	PORT_CS_PMP_EN		= (1 << 13), \/* port multiplier enable *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_PMP_RESUME	drivers/block/sata_sil.h	/^	PORT_CS_PMP_RESUME	= (1 << 6), \/* PMP resume *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_PORT_RST	drivers/block/sata_sil.h	/^	PORT_CS_PORT_RST	= (1 << 0), \/* port reset *\/$/;"	e	enum:__anone6fe50d30103
PORT_CS_RDY	drivers/block/sata_sil.h	/^	PORT_CS_RDY		= (1 << 31), \/* port ready to accept commands *\/$/;"	e	enum:__anone6fe50d30103
PORT_CTRL	include/mv88e6352.h	/^#define PORT_CTRL	/;"	d
PORT_CTRL_CLR	drivers/block/sata_sil.h	/^	PORT_CTRL_CLR		= 0x1004, \/* write: ctrl-clear *\/$/;"	e	enum:__anone6fe50d30103
PORT_CTRL_STAT	drivers/block/sata_sil.h	/^	PORT_CTRL_STAT		= 0x1000, \/* write: ctrl-set, read: stat *\/$/;"	e	enum:__anone6fe50d30103
PORT_D	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define PORT_D /;"	d
PORT_DA	include/linux/ethtool.h	/^#define PORT_DA	/;"	d
PORT_DATA_I	include/sh_pfc.h	/^#define PORT_DATA_I(/;"	d
PORT_DATA_IO	include/sh_pfc.h	/^#define PORT_DATA_IO(/;"	d
PORT_DATA_IO_PD	include/sh_pfc.h	/^#define PORT_DATA_IO_PD(/;"	d
PORT_DATA_IO_PU	include/sh_pfc.h	/^#define PORT_DATA_IO_PU(/;"	d
PORT_DATA_IO_PU_PD	include/sh_pfc.h	/^#define PORT_DATA_IO_PU_PD(/;"	d
PORT_DATA_I_PD	include/sh_pfc.h	/^#define PORT_DATA_I_PD(/;"	d
PORT_DATA_I_PU	include/sh_pfc.h	/^#define PORT_DATA_I_PU(/;"	d
PORT_DATA_I_PU_PD	include/sh_pfc.h	/^#define PORT_DATA_I_PU_PD(/;"	d
PORT_DATA_O	include/sh_pfc.h	/^#define PORT_DATA_O(/;"	d
PORT_DECODE_ERR_CNT	drivers/block/sata_sil.h	/^	PORT_DECODE_ERR_CNT	= 0x1040,$/;"	e	enum:__anone6fe50d30103
PORT_DECODE_ERR_THRESH	drivers/block/sata_sil.h	/^	PORT_DECODE_ERR_THRESH	= 0x1042,$/;"	e	enum:__anone6fe50d30103
PORT_DEV_REMOVE	drivers/usb/host/xhci.h	/^#define PORT_DEV_REMOVE	/;"	d
PORT_DIR	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define PORT_DIR	/;"	d
PORT_DIS	include/mv88e6352.h	/^#define PORT_DIS	/;"	d
PORT_DISABLED	drivers/block/sata_dwc.h	/^	PORT_DISABLED		= 2,$/;"	e	enum:__anone5f668490203
PORT_DWORD	drivers/bios_emulator/biosemui.h	/^	PORT_DWORD = 3,$/;"	e	enum:__anonb186e4ea0203
PORT_E	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define PORT_E /;"	d
PORT_EN	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define PORT_EN	/;"	d
PORT_ENABLED	drivers/block/sata_dwc.h	/^	PORT_ENABLED		= 1,$/;"	e	enum:__anone5f668490203
PORT_EXEC_DIAG	drivers/block/sata_sil.h	/^	PORT_EXEC_DIAG		= 0x1e00, \/* 32bit exec diag * 16 *\/$/;"	e	enum:__anone6fe50d30103
PORT_EXEC_FIFO	drivers/block/sata_sil.h	/^	PORT_EXEC_FIFO		= 0x1020, \/* command execution fifo *\/$/;"	e	enum:__anone6fe50d30103
PORT_F	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define PORT_F /;"	d
PORT_F	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define PORT_F /;"	d
PORT_F	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define PORT_F /;"	d
PORT_F	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define PORT_F /;"	d
PORT_F	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define PORT_F /;"	d
PORT_F	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define PORT_F /;"	d
PORT_FIBRE	include/linux/ethtool.h	/^#define PORT_FIBRE	/;"	d
PORT_FIFO_THRES	drivers/block/sata_sil.h	/^	PORT_FIFO_THRES		= 0x102c,$/;"	e	enum:__anone6fe50d30103
PORT_FIO0	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define PORT_FIO0 /;"	d
PORT_FIO1	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define PORT_FIO1 /;"	d
PORT_FIO2	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define PORT_FIO2 /;"	d
PORT_FIS_ADDR	include/ahci.h	/^#define PORT_FIS_ADDR	/;"	d
PORT_FIS_ADDR_HI	include/ahci.h	/^#define PORT_FIS_ADDR_HI	/;"	d
PORT_FIS_CFG	drivers/block/sata_sil.h	/^	PORT_FIS_CFG		= 0x1028,$/;"	e	enum:__anone6fe50d30103
PORT_G	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define PORT_G /;"	d
PORT_G	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define PORT_G /;"	d
PORT_G	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define PORT_G /;"	d
PORT_G	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define PORT_G /;"	d
PORT_H	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define PORT_H /;"	d
PORT_H	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define PORT_H /;"	d
PORT_H	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define PORT_H /;"	d
PORT_H	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define PORT_H /;"	d
PORT_HIRD	drivers/usb/host/xhci.h	/^#define	PORT_HIRD(/;"	d
PORT_HIRD_MASK	drivers/usb/host/xhci.h	/^#define	PORT_HIRD_MASK	/;"	d
PORT_HLE	drivers/usb/host/xhci.h	/^#define	PORT_HLE	/;"	d
PORT_HOTPLUG_EN	drivers/video/i915_reg.h	/^#define PORT_HOTPLUG_EN	/;"	d
PORT_HSHK_ERR_CNT	drivers/block/sata_sil.h	/^	PORT_HSHK_ERR_CNT	= 0x1048,$/;"	e	enum:__anone6fe50d30103
PORT_HSHK_ERR_THRESH	drivers/block/sata_sil.h	/^	PORT_HSHK_ERR_THRESH	= 0x104a,$/;"	e	enum:__anone6fe50d30103
PORT_ID_MASK	drivers/usb/host/xhci.h	/^#define	PORT_ID_MASK	/;"	d
PORT_ID_SHIFT	drivers/usb/host/xhci.h	/^#define	PORT_ID_SHIFT	/;"	d
PORT_IRQ_8B10B	drivers/block/sata_sil.h	/^	PORT_IRQ_8B10B		= (1 << 8), \/* 8b\/10b decode error threshold *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_BAD_PMP	include/ahci.h	/^#define PORT_IRQ_BAD_PMP	/;"	d
PORT_IRQ_COLD_PRES	include/ahci.h	/^#define PORT_IRQ_COLD_PRES	/;"	d
PORT_IRQ_COMPLETE	drivers/block/sata_sil.h	/^	PORT_IRQ_COMPLETE	= (1 << 0), \/* command(s) completed *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_COMWAKE	drivers/block/sata_sil.h	/^	PORT_IRQ_COMWAKE	= (1 << 5), \/* COMWAKE received *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_CONNECT	include/ahci.h	/^#define PORT_IRQ_CONNECT	/;"	d
PORT_IRQ_CRC	drivers/block/sata_sil.h	/^	PORT_IRQ_CRC		= (1 << 9), \/* CRC error threshold *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_D2H_REG_FIS	include/ahci.h	/^#define PORT_IRQ_D2H_REG_FIS	/;"	d
PORT_IRQ_DEV_ILCK	include/ahci.h	/^#define PORT_IRQ_DEV_ILCK	/;"	d
PORT_IRQ_DEV_XCHG	drivers/block/sata_sil.h	/^	PORT_IRQ_DEV_XCHG	= (1 << 7), \/* device exchanged *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_DMAS_FIS	include/ahci.h	/^#define PORT_IRQ_DMAS_FIS	/;"	d
PORT_IRQ_ENABLE_CLR	drivers/block/sata_sil.h	/^	PORT_IRQ_ENABLE_CLR	= 0x1014, \/* write: enable-clear *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_ENABLE_SET	drivers/block/sata_sil.h	/^	PORT_IRQ_ENABLE_SET	= 0x1010, \/* write: enable-set *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_ERROR	drivers/block/sata_sil.h	/^	PORT_IRQ_ERROR		= (1 << 1), \/* command execution error *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_FATAL	include/ahci.h	/^#define PORT_IRQ_FATAL	/;"	d
PORT_IRQ_HANDSHAKE	drivers/block/sata_sil.h	/^	PORT_IRQ_HANDSHAKE	= (1 << 10), \/* handshake error threshold *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_HBUS_DATA_ERR	include/ahci.h	/^#define PORT_IRQ_HBUS_DATA_ERR	/;"	d
PORT_IRQ_HBUS_ERR	include/ahci.h	/^#define PORT_IRQ_HBUS_ERR	/;"	d
PORT_IRQ_IF_ERR	include/ahci.h	/^#define PORT_IRQ_IF_ERR	/;"	d
PORT_IRQ_IF_NONFATAL	include/ahci.h	/^#define PORT_IRQ_IF_NONFATAL	/;"	d
PORT_IRQ_MASK	include/ahci.h	/^#define PORT_IRQ_MASK	/;"	d
PORT_IRQ_MASKED_MASK	drivers/block/sata_sil.h	/^	PORT_IRQ_MASKED_MASK	= 0x7ff,$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_OVERFLOW	include/ahci.h	/^#define PORT_IRQ_OVERFLOW	/;"	d
PORT_IRQ_PHYRDY	include/ahci.h	/^#define PORT_IRQ_PHYRDY	/;"	d
PORT_IRQ_PHYRDY_CHG	drivers/block/sata_sil.h	/^	PORT_IRQ_PHYRDY_CHG	= (1 << 4), \/* PHY ready change *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_PIOS_FIS	include/ahci.h	/^#define PORT_IRQ_PIOS_FIS	/;"	d
PORT_IRQ_PORTRDY_CHG	drivers/block/sata_sil.h	/^	PORT_IRQ_PORTRDY_CHG	= (1 << 2), \/* port ready change *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_PWR_CHG	drivers/block/sata_sil.h	/^	PORT_IRQ_PWR_CHG	= (1 << 3), \/* power management change *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_RAW_MASK	drivers/block/sata_sil.h	/^	PORT_IRQ_RAW_MASK	= (0x7ff << PORT_IRQ_RAW_SHIFT),$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_RAW_SHIFT	drivers/block/sata_sil.h	/^	PORT_IRQ_RAW_SHIFT	= 16,$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_SDB_FIS	include/ahci.h	/^#define PORT_IRQ_SDB_FIS	/;"	d
PORT_IRQ_SDB_NOTIFY	drivers/block/sata_sil.h	/^	PORT_IRQ_SDB_NOTIFY	= (1 << 11), \/* SDB notify received *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_SG_DONE	include/ahci.h	/^#define PORT_IRQ_SG_DONE	/;"	d
PORT_IRQ_STAT	drivers/block/sata_sil.h	/^	PORT_IRQ_STAT		= 0x1008, \/* high: status, low: interrupt *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_STAT	include/ahci.h	/^#define PORT_IRQ_STAT	/;"	d
PORT_IRQ_STEER_MASK	drivers/block/sata_sil.h	/^	PORT_IRQ_STEER_MASK	= (3 << PORT_IRQ_STEER_SHIFT),$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_STEER_SHIFT	drivers/block/sata_sil.h	/^	PORT_IRQ_STEER_SHIFT	= 30,$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_TF_ERR	include/ahci.h	/^#define PORT_IRQ_TF_ERR	/;"	d
PORT_IRQ_UNK_FIS	drivers/block/sata_sil.h	/^	PORT_IRQ_UNK_FIS	= (1 << 6), \/* unknown FIS received *\/$/;"	e	enum:__anone6fe50d30103
PORT_IRQ_UNK_FIS	include/ahci.h	/^#define PORT_IRQ_UNK_FIS	/;"	d
PORT_IS_ENABLED	drivers/net/fm/fm.h	/^#define PORT_IS_ENABLED(/;"	d
PORT_L1DS	drivers/usb/host/xhci.h	/^#define	PORT_L1DS(/;"	d
PORT_L1S_MASK	drivers/usb/host/xhci.h	/^#define	PORT_L1S_MASK	/;"	d
PORT_L1S_SUCCESS	drivers/usb/host/xhci.h	/^#define	PORT_L1S_SUCCESS	/;"	d
PORT_LEARN_AUTO	drivers/net/vsc9953.c	/^	PORT_LEARN_AUTO$/;"	e	enum:port_learn_mode	file:
PORT_LEARN_NONE	drivers/net/vsc9953.c	/^	PORT_LEARN_NONE,$/;"	e	enum:port_learn_mode	file:
PORT_LED_AMBER	drivers/usb/host/xhci.h	/^#define PORT_LED_AMBER	/;"	d
PORT_LED_GREEN	drivers/usb/host/xhci.h	/^#define PORT_LED_GREEN	/;"	d
PORT_LED_MASK	drivers/usb/host/xhci.h	/^#define PORT_LED_MASK	/;"	d
PORT_LED_OFF	drivers/usb/host/xhci.h	/^#define PORT_LED_OFF	/;"	d
PORT_LINK_STROBE	drivers/usb/host/xhci.h	/^#define PORT_LINK_STROBE	/;"	d
PORT_LRAM	drivers/block/sata_sil.h	/^	PORT_LRAM		= 0x0000, \/* 31 LRAM slots and PMP regs *\/$/;"	e	enum:__anone6fe50d30103
PORT_LRAM_SLOT_SZ	drivers/block/sata_sil.h	/^	PORT_LRAM_SLOT_SZ	= 0x0080, \/* 32 bytes PRB + 2 SGE, ACT... *\/$/;"	e	enum:__anone6fe50d30103
PORT_LST_ADDR	include/ahci.h	/^#define PORT_LST_ADDR	/;"	d
PORT_LST_ADDR_HI	include/ahci.h	/^#define PORT_LST_ADDR_HI	/;"	d
PORT_MASK	drivers/net/phy/mv88e61xx.c	/^#define PORT_MASK	/;"	d	file:
PORT_MAX_TOKEN_BUCKET_SIZE	drivers/net/mvgbe.h	/^#define PORT_MAX_TOKEN_BUCKET_SIZE	/;"	d
PORT_MAX_TRAN_UNIT	drivers/net/mvgbe.h	/^#define PORT_MAX_TRAN_UNIT	/;"	d
PORT_MII	include/linux/ethtool.h	/^#define PORT_MII	/;"	d
PORT_MUX	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PORT_MUX /;"	d
PORT_NONE	include/linux/ethtool.h	/^#define PORT_NONE	/;"	d
PORT_NUM	board/freescale/b4860qds/b4860qds_qixis.h	/^#define PORT_NUM	/;"	d
PORT_NUM	drivers/net/armada100_fec.h	/^#define PORT_NUM	/;"	d
PORT_NUM_FM1	board/freescale/corenet_ds/eth_superhydra.c	/^#define PORT_NUM_FM1	/;"	d	file:
PORT_NUM_FM2	board/freescale/corenet_ds/eth_superhydra.c	/^#define PORT_NUM_FM2	/;"	d	file:
PORT_OC	drivers/usb/host/xhci.h	/^#define PORT_OC	/;"	d
PORT_OCC	drivers/usb/host/xhci.h	/^#define PORT_OCC	/;"	d
PORT_OFFSET	drivers/block/sata_ceva.c	/^#define PORT_OFFSET	/;"	d	file:
PORT_OTHER	include/linux/ethtool.h	/^#define PORT_OTHER	/;"	d
PORT_OVERCURRENT_MAX_SCAN_COUNT	common/usb_hub.c	/^#define PORT_OVERCURRENT_MAX_SCAN_COUNT	/;"	d	file:
PORT_P0DMACR	include/ahci.h	/^#define PORT_P0DMACR	/;"	d
PORT_PE	drivers/usb/host/xhci.h	/^#define PORT_PE	/;"	d
PORT_PEC	drivers/usb/host/xhci.h	/^#define PORT_PEC	/;"	d
PORT_PFSC	include/usb/ehci-ci.h	/^#define PORT_PFSC	/;"	d
PORT_PHY	include/mv88e6352.h	/^#define PORT_PHY	/;"	d
PORT_PHY_CFG	drivers/block/sata_sil.h	/^	PORT_PHY_CFG		= 0x1050,$/;"	e	enum:__anone6fe50d30103
PORT_PJ0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ0	/;"	d
PORT_PJ1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ1	/;"	d
PORT_PJ10	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ10	/;"	d
PORT_PJ11	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ11	/;"	d
PORT_PJ2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ2	/;"	d
PORT_PJ3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ3	/;"	d
PORT_PJ4	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ4	/;"	d
PORT_PJ5	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ5	/;"	d
PORT_PJ6	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ6	/;"	d
PORT_PJ7	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ7	/;"	d
PORT_PJ8	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ8	/;"	d
PORT_PJ9	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define PORT_PJ9	/;"	d
PORT_PLC	drivers/usb/host/xhci.h	/^#define PORT_PLC	/;"	d
PORT_PLS_MASK	drivers/usb/host/xhci.h	/^#define PORT_PLS_MASK	/;"	d
PORT_PMP	drivers/block/sata_sil.h	/^	PORT_PMP		= 0x0f80, \/* 8 bytes PMP * 16 (128 bytes) *\/$/;"	e	enum:__anone6fe50d30103
PORT_PMP_QACTIVE	drivers/block/sata_sil.h	/^	PORT_PMP_QACTIVE	= 0x0004, \/* port device QActive offset *\/$/;"	e	enum:__anone6fe50d30103
PORT_PMP_SIZE	drivers/block/sata_sil.h	/^	PORT_PMP_SIZE		= 0x0008, \/* 8 bytes per PMP *\/$/;"	e	enum:__anone6fe50d30103
PORT_PMP_STATUS	drivers/block/sata_sil.h	/^	PORT_PMP_STATUS		= 0x0000, \/* port device status offset *\/$/;"	e	enum:__anone6fe50d30103
PORT_POWER	drivers/usb/host/xhci.h	/^#define PORT_POWER	/;"	d
PORT_PP	include/usb/ehci-ci.h	/^#define PORT_PP	/;"	d
PORT_PR	include/usb/ehci-ci.h	/^#define PORT_PR	/;"	d
PORT_PREF0	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PORT_PREF0	/;"	d
PORT_PREF0_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PORT_PREF0_P	/;"	d
PORT_PREF1	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PORT_PREF1	/;"	d
PORT_PREF1_P	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define PORT_PREF1_P	/;"	d
PORT_PSD_DIAG	drivers/block/sata_sil.h	/^	PORT_PSD_DIAG		= 0x1e40, \/* 32bit psd diag * 16 *\/$/;"	e	enum:__anone6fe50d30103
PORT_PTCR	drivers/serial/serial_sh.h	/^# define PORT_PTCR	/;"	d
PORT_PTS_MSK	include/usb/ehci-ci.h	/^#define PORT_PTS_MSK	/;"	d
PORT_PTS_PHCD	include/usb/ehci-ci.h	/^#define PORT_PTS_PHCD	/;"	d
PORT_PTS_PTW	include/usb/ehci-ci.h	/^#define PORT_PTS_PTW	/;"	d
PORT_PTS_SERIAL	include/usb/ehci-ci.h	/^#define PORT_PTS_SERIAL	/;"	d
PORT_PTS_ULPI	include/usb/ehci-ci.h	/^#define PORT_PTS_ULPI	/;"	d
PORT_PTS_UTMI	include/usb/ehci-ci.h	/^#define PORT_PTS_UTMI	/;"	d
PORT_PVCR	drivers/serial/serial_sh.h	/^# define PORT_PVCR	/;"	d
PORT_RC	drivers/usb/host/xhci.h	/^#define PORT_RC	/;"	d
PORT_REGS_SIZE	drivers/block/sata_sil.h	/^	PORT_REGS_SIZE		= 0x2000,$/;"	e	enum:__anone6fe50d30103
PORT_REG_CTRL	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_CTRL	/;"	d	file:
PORT_REG_CTRL_PSTATE_DISABLED	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_CTRL_PSTATE_DISABLED	/;"	d	file:
PORT_REG_CTRL_PSTATE_FORWARD	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_CTRL_PSTATE_FORWARD	/;"	d	file:
PORT_REG_CTRL_PSTATE_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_CTRL_PSTATE_SHIFT	/;"	d	file:
PORT_REG_CTRL_PSTATE_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_CTRL_PSTATE_WIDTH	/;"	d	file:
PORT_REG_PHYS_CTRL	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL	/;"	d	file:
PORT_REG_PHYS_CTRL_DUPLEX_FORCE	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_DUPLEX_FORCE	/;"	d	file:
PORT_REG_PHYS_CTRL_DUPLEX_VALUE	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_DUPLEX_VALUE	/;"	d	file:
PORT_REG_PHYS_CTRL_FC_FORCE	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_FC_FORCE	/;"	d	file:
PORT_REG_PHYS_CTRL_FC_VALUE	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_FC_VALUE	/;"	d	file:
PORT_REG_PHYS_CTRL_LINK_FORCE	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_LINK_FORCE	/;"	d	file:
PORT_REG_PHYS_CTRL_LINK_VALUE	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_LINK_VALUE	/;"	d	file:
PORT_REG_PHYS_CTRL_PCS_AN_EN	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_PCS_AN_EN	/;"	d	file:
PORT_REG_PHYS_CTRL_PCS_AN_RST	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_PCS_AN_RST	/;"	d	file:
PORT_REG_PHYS_CTRL_SPD1000	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_SPD1000	/;"	d	file:
PORT_REG_PHYS_CTRL_SPD_MASK	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_PHYS_CTRL_SPD_MASK	/;"	d	file:
PORT_REG_STATUS	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS	/;"	d	file:
PORT_REG_STATUS_CMODE_1000BASE_X	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_CMODE_1000BASE_X	/;"	d	file:
PORT_REG_STATUS_CMODE_100BASE_X	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_CMODE_100BASE_X	/;"	d	file:
PORT_REG_STATUS_CMODE_MASK	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_CMODE_MASK	/;"	d	file:
PORT_REG_STATUS_CMODE_SGMII	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_CMODE_SGMII	/;"	d	file:
PORT_REG_STATUS_DUPLEX	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_DUPLEX	/;"	d	file:
PORT_REG_STATUS_LINK	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_LINK	/;"	d	file:
PORT_REG_STATUS_SPEED_10	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_SPEED_10	/;"	d	file:
PORT_REG_STATUS_SPEED_100	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_SPEED_100	/;"	d	file:
PORT_REG_STATUS_SPEED_1000	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_SPEED_1000	/;"	d	file:
PORT_REG_STATUS_SPEED_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_SPEED_SHIFT	/;"	d	file:
PORT_REG_STATUS_SPEED_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_STATUS_SPEED_WIDTH	/;"	d	file:
PORT_REG_SWITCH_ID	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_SWITCH_ID	/;"	d	file:
PORT_REG_VLAN_ID	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_VLAN_ID	/;"	d	file:
PORT_REG_VLAN_ID_DEF_VID_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_VLAN_ID_DEF_VID_SHIFT	/;"	d	file:
PORT_REG_VLAN_ID_DEF_VID_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_VLAN_ID_DEF_VID_WIDTH	/;"	d	file:
PORT_REG_VLAN_MAP	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_VLAN_MAP	/;"	d	file:
PORT_REG_VLAN_MAP_TABLE_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_VLAN_MAP_TABLE_SHIFT	/;"	d	file:
PORT_REG_VLAN_MAP_TABLE_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define PORT_REG_VLAN_MAP_TABLE_WIDTH	/;"	d	file:
PORT_RESET	drivers/usb/host/xhci.h	/^#define PORT_RESET	/;"	d
PORT_RWE	drivers/usb/host/xhci.h	/^#define	PORT_RWE	/;"	d
PORT_SACTIVE	drivers/block/sata_sil.h	/^	PORT_SACTIVE		= 0x1f0c,$/;"	e	enum:__anone6fe50d30103
PORT_SCI	include/dm/platform_data/serial_sh.h	/^	PORT_SCI,$/;"	e	enum:sh_serial_type
PORT_SCIF	include/dm/platform_data/serial_sh.h	/^	PORT_SCIF,$/;"	e	enum:sh_serial_type
PORT_SCIFA	include/dm/platform_data/serial_sh.h	/^	PORT_SCIFA,$/;"	e	enum:sh_serial_type
PORT_SCIFB	include/dm/platform_data/serial_sh.h	/^	PORT_SCIFB,$/;"	e	enum:sh_serial_type
PORT_SCONTROL	drivers/block/sata_sil.h	/^	PORT_SCONTROL		= 0x1f00,$/;"	e	enum:__anone6fe50d30103
PORT_SCR	include/ahci.h	/^#define PORT_SCR	/;"	d
PORT_SCR_ACT	include/ahci.h	/^#define PORT_SCR_ACT	/;"	d
PORT_SCR_CTL	include/ahci.h	/^#define PORT_SCR_CTL	/;"	d
PORT_SCR_ERR	include/ahci.h	/^#define PORT_SCR_ERR	/;"	d
PORT_SCR_STAT	include/ahci.h	/^#define PORT_SCR_STAT	/;"	d
PORT_SCR_STAT_DET_COMINIT	include/ahci.h	/^#define PORT_SCR_STAT_DET_COMINIT /;"	d
PORT_SCR_STAT_DET_MASK	include/ahci.h	/^#define PORT_SCR_STAT_DET_MASK	/;"	d
PORT_SCR_STAT_DET_PHYRDY	include/ahci.h	/^#define PORT_SCR_STAT_DET_PHYRDY /;"	d
PORT_SCTL_IPM	drivers/block/sata_ceva.c	/^#define PORT_SCTL_IPM	/;"	d	file:
PORT_SCTL_SPD_GEN1	drivers/block/sata_ceva.c	/^#define PORT_SCTL_SPD_GEN1	/;"	d	file:
PORT_SCTL_SPD_GEN2	drivers/block/sata_ceva.c	/^#define PORT_SCTL_SPD_GEN2	/;"	d	file:
PORT_SCTL_SPD_GEN3	drivers/block/sata_ceva.c	/^#define PORT_SCTL_SPD_GEN3	/;"	d	file:
PORT_SDMA_CFG_VALUE	drivers/net/mvgbe.h	/^#define PORT_SDMA_CFG_VALUE	/;"	d
PORT_SERIAL_CONTROL_VALUE	drivers/net/mvgbe.h	/^#define PORT_SERIAL_CONTROL_VALUE	/;"	d
PORT_SERIAL_CONTROL_VALUE	include/configs/km_kirkwood.h	/^#define PORT_SERIAL_CONTROL_VALUE	/;"	d
PORT_SERROR	drivers/block/sata_sil.h	/^	PORT_SERROR		= 0x1f08,$/;"	e	enum:__anone6fe50d30103
PORT_SHIFT	drivers/net/phy/mv88e6352.c	/^#define PORT_SHIFT	/;"	d	file:
PORT_SIG	include/ahci.h	/^#define PORT_SIG	/;"	d
PORT_SLOT_STAT	drivers/block/sata_sil.h	/^	PORT_SLOT_STAT		= 0x1800,$/;"	e	enum:__anone6fe50d30103
PORT_SSTATUS	drivers/block/sata_sil.h	/^	PORT_SSTATUS		= 0x1f04,$/;"	e	enum:__anone6fe50d30103
PORT_STATUS	include/mv88e6352.h	/^#define PORT_STATUS	/;"	d
PORT_SWITCH_ID_6096	drivers/net/phy/mv88e61xx.c	/^#define PORT_SWITCH_ID_6096	/;"	d	file:
PORT_SWITCH_ID_6097	drivers/net/phy/mv88e61xx.c	/^#define PORT_SWITCH_ID_6097	/;"	d	file:
PORT_SWITCH_ID_6172	drivers/net/phy/mv88e61xx.c	/^#define PORT_SWITCH_ID_6172	/;"	d	file:
PORT_SWITCH_ID_6176	drivers/net/phy/mv88e61xx.c	/^#define PORT_SWITCH_ID_6176	/;"	d	file:
PORT_SWITCH_ID_6240	drivers/net/phy/mv88e61xx.c	/^#define PORT_SWITCH_ID_6240	/;"	d	file:
PORT_SWITCH_ID_6352	drivers/net/phy/mv88e61xx.c	/^#define PORT_SWITCH_ID_6352	/;"	d	file:
PORT_TFDATA	include/ahci.h	/^#define PORT_TFDATA	/;"	d
PORT_TOKEN_RATE	drivers/net/mvgbe.h	/^#define PORT_TOKEN_RATE	/;"	d
PORT_TP	include/linux/ethtool.h	/^#define PORT_TP	/;"	d
PORT_U1_TIMEOUT	drivers/usb/host/xhci.h	/^#define PORT_U1_TIMEOUT(/;"	d
PORT_U2_TIMEOUT	drivers/usb/host/xhci.h	/^#define PORT_U2_TIMEOUT(/;"	d
PORT_UNKNOWN	drivers/block/sata_dwc.h	/^	PORT_UNKNOWN		= 0,$/;"	e	enum:__anone5f668490203
PORT_WKCONN_E	drivers/usb/host/xhci.h	/^#define PORT_WKCONN_E	/;"	d
PORT_WKDISC_E	drivers/usb/host/xhci.h	/^#define PORT_WKDISC_E	/;"	d
PORT_WKOC_E	drivers/usb/host/xhci.h	/^#define PORT_WKOC_E	/;"	d
PORT_WORD	drivers/bios_emulator/biosemui.h	/^	PORT_WORD = 2,$/;"	e	enum:__anonb186e4ea0203
PORT_WR	drivers/usb/host/xhci.h	/^#define PORT_WR	/;"	d
PORT_WRC	drivers/usb/host/xhci.h	/^#define PORT_WRC	/;"	d
PORT_x_MUX_0_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_0_FUNC_1	/;"	d
PORT_x_MUX_0_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_0_FUNC_1	/;"	d
PORT_x_MUX_0_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_0_FUNC_1	/;"	d
PORT_x_MUX_0_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_0_FUNC_1	/;"	d
PORT_x_MUX_0_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_0_FUNC_1	/;"	d
PORT_x_MUX_0_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_0_FUNC_2	/;"	d
PORT_x_MUX_0_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_0_FUNC_2	/;"	d
PORT_x_MUX_0_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_0_FUNC_2	/;"	d
PORT_x_MUX_0_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_0_FUNC_2	/;"	d
PORT_x_MUX_0_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_0_FUNC_2	/;"	d
PORT_x_MUX_0_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_0_FUNC_3	/;"	d
PORT_x_MUX_0_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_0_FUNC_3	/;"	d
PORT_x_MUX_0_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_0_FUNC_3	/;"	d
PORT_x_MUX_0_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_0_FUNC_3	/;"	d
PORT_x_MUX_0_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_0_FUNC_3	/;"	d
PORT_x_MUX_0_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_0_FUNC_4	/;"	d
PORT_x_MUX_0_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_0_FUNC_4	/;"	d
PORT_x_MUX_0_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_0_FUNC_4	/;"	d
PORT_x_MUX_0_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_0_FUNC_4	/;"	d
PORT_x_MUX_0_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_0_FUNC_4	/;"	d
PORT_x_MUX_0_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_0_MASK	/;"	d
PORT_x_MUX_0_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_0_MASK	/;"	d
PORT_x_MUX_0_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_0_MASK	/;"	d
PORT_x_MUX_0_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_0_MASK	/;"	d
PORT_x_MUX_0_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_0_MASK	/;"	d
PORT_x_MUX_10_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_10_FUNC_1	/;"	d
PORT_x_MUX_10_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_10_FUNC_1	/;"	d
PORT_x_MUX_10_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_10_FUNC_2	/;"	d
PORT_x_MUX_10_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_10_FUNC_2	/;"	d
PORT_x_MUX_10_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_10_FUNC_3	/;"	d
PORT_x_MUX_10_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_10_FUNC_3	/;"	d
PORT_x_MUX_10_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_10_FUNC_4	/;"	d
PORT_x_MUX_10_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_10_FUNC_4	/;"	d
PORT_x_MUX_10_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_10_MASK	/;"	d
PORT_x_MUX_10_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_10_MASK	/;"	d
PORT_x_MUX_11_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_11_FUNC_1	/;"	d
PORT_x_MUX_11_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_11_FUNC_1	/;"	d
PORT_x_MUX_11_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_11_FUNC_2	/;"	d
PORT_x_MUX_11_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_11_FUNC_2	/;"	d
PORT_x_MUX_11_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_11_FUNC_3	/;"	d
PORT_x_MUX_11_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_11_FUNC_3	/;"	d
PORT_x_MUX_11_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_11_FUNC_4	/;"	d
PORT_x_MUX_11_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_11_FUNC_4	/;"	d
PORT_x_MUX_11_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_11_MASK	/;"	d
PORT_x_MUX_11_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_11_MASK	/;"	d
PORT_x_MUX_12_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_12_FUNC_1	/;"	d
PORT_x_MUX_12_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_12_FUNC_1	/;"	d
PORT_x_MUX_12_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_12_FUNC_2	/;"	d
PORT_x_MUX_12_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_12_FUNC_2	/;"	d
PORT_x_MUX_12_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_12_FUNC_3	/;"	d
PORT_x_MUX_12_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_12_FUNC_3	/;"	d
PORT_x_MUX_12_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_12_FUNC_4	/;"	d
PORT_x_MUX_12_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_12_FUNC_4	/;"	d
PORT_x_MUX_12_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_12_MASK	/;"	d
PORT_x_MUX_12_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_12_MASK	/;"	d
PORT_x_MUX_13_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_13_FUNC_1	/;"	d
PORT_x_MUX_13_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_13_FUNC_1	/;"	d
PORT_x_MUX_13_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_13_FUNC_2	/;"	d
PORT_x_MUX_13_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_13_FUNC_2	/;"	d
PORT_x_MUX_13_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_13_FUNC_3	/;"	d
PORT_x_MUX_13_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_13_FUNC_3	/;"	d
PORT_x_MUX_13_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_13_FUNC_4	/;"	d
PORT_x_MUX_13_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_13_FUNC_4	/;"	d
PORT_x_MUX_13_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_13_MASK	/;"	d
PORT_x_MUX_13_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_13_MASK	/;"	d
PORT_x_MUX_14_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_14_FUNC_1	/;"	d
PORT_x_MUX_14_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_14_FUNC_1	/;"	d
PORT_x_MUX_14_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_14_FUNC_2	/;"	d
PORT_x_MUX_14_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_14_FUNC_2	/;"	d
PORT_x_MUX_14_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_14_FUNC_3	/;"	d
PORT_x_MUX_14_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_14_FUNC_3	/;"	d
PORT_x_MUX_14_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_14_FUNC_4	/;"	d
PORT_x_MUX_14_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_14_FUNC_4	/;"	d
PORT_x_MUX_14_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_14_MASK	/;"	d
PORT_x_MUX_14_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_14_MASK	/;"	d
PORT_x_MUX_15_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_15_FUNC_1	/;"	d
PORT_x_MUX_15_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_15_FUNC_1	/;"	d
PORT_x_MUX_15_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_15_FUNC_2	/;"	d
PORT_x_MUX_15_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_15_FUNC_2	/;"	d
PORT_x_MUX_15_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_15_FUNC_3	/;"	d
PORT_x_MUX_15_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_15_FUNC_3	/;"	d
PORT_x_MUX_15_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_15_FUNC_4	/;"	d
PORT_x_MUX_15_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_15_FUNC_4	/;"	d
PORT_x_MUX_15_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_15_MASK	/;"	d
PORT_x_MUX_15_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_15_MASK	/;"	d
PORT_x_MUX_1_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_1_FUNC_1	/;"	d
PORT_x_MUX_1_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_1_FUNC_1	/;"	d
PORT_x_MUX_1_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_1_FUNC_1	/;"	d
PORT_x_MUX_1_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_1_FUNC_1	/;"	d
PORT_x_MUX_1_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_1_FUNC_1	/;"	d
PORT_x_MUX_1_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_1_FUNC_2	/;"	d
PORT_x_MUX_1_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_1_FUNC_2	/;"	d
PORT_x_MUX_1_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_1_FUNC_2	/;"	d
PORT_x_MUX_1_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_1_FUNC_2	/;"	d
PORT_x_MUX_1_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_1_FUNC_2	/;"	d
PORT_x_MUX_1_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_1_FUNC_3	/;"	d
PORT_x_MUX_1_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_1_FUNC_3	/;"	d
PORT_x_MUX_1_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_1_FUNC_3	/;"	d
PORT_x_MUX_1_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_1_FUNC_3	/;"	d
PORT_x_MUX_1_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_1_FUNC_3	/;"	d
PORT_x_MUX_1_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_1_FUNC_4	/;"	d
PORT_x_MUX_1_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_1_FUNC_4	/;"	d
PORT_x_MUX_1_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_1_FUNC_4	/;"	d
PORT_x_MUX_1_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_1_FUNC_4	/;"	d
PORT_x_MUX_1_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_1_FUNC_4	/;"	d
PORT_x_MUX_1_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_1_MASK	/;"	d
PORT_x_MUX_1_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_1_MASK	/;"	d
PORT_x_MUX_1_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_1_MASK	/;"	d
PORT_x_MUX_1_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_1_MASK	/;"	d
PORT_x_MUX_1_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_1_MASK	/;"	d
PORT_x_MUX_2_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_2_FUNC_1	/;"	d
PORT_x_MUX_2_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_2_FUNC_1	/;"	d
PORT_x_MUX_2_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_2_FUNC_1	/;"	d
PORT_x_MUX_2_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_2_FUNC_1	/;"	d
PORT_x_MUX_2_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_2_FUNC_1	/;"	d
PORT_x_MUX_2_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_2_FUNC_2	/;"	d
PORT_x_MUX_2_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_2_FUNC_2	/;"	d
PORT_x_MUX_2_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_2_FUNC_2	/;"	d
PORT_x_MUX_2_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_2_FUNC_2	/;"	d
PORT_x_MUX_2_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_2_FUNC_2	/;"	d
PORT_x_MUX_2_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_2_FUNC_3	/;"	d
PORT_x_MUX_2_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_2_FUNC_3	/;"	d
PORT_x_MUX_2_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_2_FUNC_3	/;"	d
PORT_x_MUX_2_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_2_FUNC_3	/;"	d
PORT_x_MUX_2_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_2_FUNC_3	/;"	d
PORT_x_MUX_2_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_2_FUNC_4	/;"	d
PORT_x_MUX_2_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_2_FUNC_4	/;"	d
PORT_x_MUX_2_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_2_FUNC_4	/;"	d
PORT_x_MUX_2_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_2_FUNC_4	/;"	d
PORT_x_MUX_2_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_2_FUNC_4	/;"	d
PORT_x_MUX_2_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_2_MASK	/;"	d
PORT_x_MUX_2_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_2_MASK	/;"	d
PORT_x_MUX_2_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_2_MASK	/;"	d
PORT_x_MUX_2_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_2_MASK	/;"	d
PORT_x_MUX_2_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_2_MASK	/;"	d
PORT_x_MUX_3_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_3_FUNC_1	/;"	d
PORT_x_MUX_3_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_3_FUNC_1	/;"	d
PORT_x_MUX_3_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_3_FUNC_1	/;"	d
PORT_x_MUX_3_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_3_FUNC_1	/;"	d
PORT_x_MUX_3_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_3_FUNC_1	/;"	d
PORT_x_MUX_3_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_3_FUNC_2	/;"	d
PORT_x_MUX_3_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_3_FUNC_2	/;"	d
PORT_x_MUX_3_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_3_FUNC_2	/;"	d
PORT_x_MUX_3_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_3_FUNC_2	/;"	d
PORT_x_MUX_3_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_3_FUNC_2	/;"	d
PORT_x_MUX_3_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_3_FUNC_3	/;"	d
PORT_x_MUX_3_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_3_FUNC_3	/;"	d
PORT_x_MUX_3_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_3_FUNC_3	/;"	d
PORT_x_MUX_3_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_3_FUNC_3	/;"	d
PORT_x_MUX_3_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_3_FUNC_3	/;"	d
PORT_x_MUX_3_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_3_FUNC_4	/;"	d
PORT_x_MUX_3_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_3_FUNC_4	/;"	d
PORT_x_MUX_3_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_3_FUNC_4	/;"	d
PORT_x_MUX_3_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_3_FUNC_4	/;"	d
PORT_x_MUX_3_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_3_FUNC_4	/;"	d
PORT_x_MUX_3_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_3_MASK	/;"	d
PORT_x_MUX_3_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_3_MASK	/;"	d
PORT_x_MUX_3_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_3_MASK	/;"	d
PORT_x_MUX_3_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_3_MASK	/;"	d
PORT_x_MUX_3_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_3_MASK	/;"	d
PORT_x_MUX_4_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_4_FUNC_1	/;"	d
PORT_x_MUX_4_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_4_FUNC_1	/;"	d
PORT_x_MUX_4_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_4_FUNC_1	/;"	d
PORT_x_MUX_4_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_4_FUNC_1	/;"	d
PORT_x_MUX_4_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_4_FUNC_1	/;"	d
PORT_x_MUX_4_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_4_FUNC_2	/;"	d
PORT_x_MUX_4_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_4_FUNC_2	/;"	d
PORT_x_MUX_4_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_4_FUNC_2	/;"	d
PORT_x_MUX_4_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_4_FUNC_2	/;"	d
PORT_x_MUX_4_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_4_FUNC_2	/;"	d
PORT_x_MUX_4_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_4_FUNC_3	/;"	d
PORT_x_MUX_4_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_4_FUNC_3	/;"	d
PORT_x_MUX_4_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_4_FUNC_3	/;"	d
PORT_x_MUX_4_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_4_FUNC_3	/;"	d
PORT_x_MUX_4_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_4_FUNC_3	/;"	d
PORT_x_MUX_4_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_4_FUNC_4	/;"	d
PORT_x_MUX_4_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_4_FUNC_4	/;"	d
PORT_x_MUX_4_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_4_FUNC_4	/;"	d
PORT_x_MUX_4_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_4_FUNC_4	/;"	d
PORT_x_MUX_4_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_4_FUNC_4	/;"	d
PORT_x_MUX_4_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_4_MASK	/;"	d
PORT_x_MUX_4_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_4_MASK	/;"	d
PORT_x_MUX_4_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_4_MASK	/;"	d
PORT_x_MUX_4_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_4_MASK	/;"	d
PORT_x_MUX_4_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_4_MASK	/;"	d
PORT_x_MUX_5_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_5_FUNC_1	/;"	d
PORT_x_MUX_5_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_5_FUNC_1	/;"	d
PORT_x_MUX_5_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_5_FUNC_1	/;"	d
PORT_x_MUX_5_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_5_FUNC_1	/;"	d
PORT_x_MUX_5_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_5_FUNC_1	/;"	d
PORT_x_MUX_5_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_5_FUNC_2	/;"	d
PORT_x_MUX_5_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_5_FUNC_2	/;"	d
PORT_x_MUX_5_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_5_FUNC_2	/;"	d
PORT_x_MUX_5_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_5_FUNC_2	/;"	d
PORT_x_MUX_5_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_5_FUNC_2	/;"	d
PORT_x_MUX_5_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_5_FUNC_3	/;"	d
PORT_x_MUX_5_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_5_FUNC_3	/;"	d
PORT_x_MUX_5_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_5_FUNC_3	/;"	d
PORT_x_MUX_5_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_5_FUNC_3	/;"	d
PORT_x_MUX_5_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_5_FUNC_3	/;"	d
PORT_x_MUX_5_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_5_FUNC_4	/;"	d
PORT_x_MUX_5_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_5_FUNC_4	/;"	d
PORT_x_MUX_5_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_5_FUNC_4	/;"	d
PORT_x_MUX_5_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_5_FUNC_4	/;"	d
PORT_x_MUX_5_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_5_FUNC_4	/;"	d
PORT_x_MUX_5_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_5_MASK	/;"	d
PORT_x_MUX_5_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_5_MASK	/;"	d
PORT_x_MUX_5_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_5_MASK	/;"	d
PORT_x_MUX_5_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_5_MASK	/;"	d
PORT_x_MUX_5_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_5_MASK	/;"	d
PORT_x_MUX_6_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_6_FUNC_1	/;"	d
PORT_x_MUX_6_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_6_FUNC_1	/;"	d
PORT_x_MUX_6_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_6_FUNC_1	/;"	d
PORT_x_MUX_6_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_6_FUNC_1	/;"	d
PORT_x_MUX_6_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_6_FUNC_1	/;"	d
PORT_x_MUX_6_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_6_FUNC_2	/;"	d
PORT_x_MUX_6_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_6_FUNC_2	/;"	d
PORT_x_MUX_6_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_6_FUNC_2	/;"	d
PORT_x_MUX_6_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_6_FUNC_2	/;"	d
PORT_x_MUX_6_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_6_FUNC_2	/;"	d
PORT_x_MUX_6_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_6_FUNC_3	/;"	d
PORT_x_MUX_6_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_6_FUNC_3	/;"	d
PORT_x_MUX_6_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_6_FUNC_3	/;"	d
PORT_x_MUX_6_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_6_FUNC_3	/;"	d
PORT_x_MUX_6_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_6_FUNC_3	/;"	d
PORT_x_MUX_6_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_6_FUNC_4	/;"	d
PORT_x_MUX_6_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_6_FUNC_4	/;"	d
PORT_x_MUX_6_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_6_FUNC_4	/;"	d
PORT_x_MUX_6_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_6_FUNC_4	/;"	d
PORT_x_MUX_6_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_6_FUNC_4	/;"	d
PORT_x_MUX_6_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_6_MASK	/;"	d
PORT_x_MUX_6_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_6_MASK	/;"	d
PORT_x_MUX_6_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_6_MASK	/;"	d
PORT_x_MUX_6_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_6_MASK	/;"	d
PORT_x_MUX_6_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_6_MASK	/;"	d
PORT_x_MUX_7_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_7_FUNC_1	/;"	d
PORT_x_MUX_7_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_7_FUNC_1	/;"	d
PORT_x_MUX_7_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_7_FUNC_1	/;"	d
PORT_x_MUX_7_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_7_FUNC_1	/;"	d
PORT_x_MUX_7_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_7_FUNC_1	/;"	d
PORT_x_MUX_7_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_7_FUNC_2	/;"	d
PORT_x_MUX_7_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_7_FUNC_2	/;"	d
PORT_x_MUX_7_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_7_FUNC_2	/;"	d
PORT_x_MUX_7_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_7_FUNC_2	/;"	d
PORT_x_MUX_7_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_7_FUNC_2	/;"	d
PORT_x_MUX_7_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_7_FUNC_3	/;"	d
PORT_x_MUX_7_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_7_FUNC_3	/;"	d
PORT_x_MUX_7_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_7_FUNC_3	/;"	d
PORT_x_MUX_7_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_7_FUNC_3	/;"	d
PORT_x_MUX_7_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_7_FUNC_3	/;"	d
PORT_x_MUX_7_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_7_FUNC_4	/;"	d
PORT_x_MUX_7_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_7_FUNC_4	/;"	d
PORT_x_MUX_7_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_7_FUNC_4	/;"	d
PORT_x_MUX_7_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_7_FUNC_4	/;"	d
PORT_x_MUX_7_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_7_FUNC_4	/;"	d
PORT_x_MUX_7_MASK	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_7_MASK	/;"	d
PORT_x_MUX_7_MASK	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_7_MASK	/;"	d
PORT_x_MUX_7_MASK	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_7_MASK	/;"	d
PORT_x_MUX_7_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_7_MASK	/;"	d
PORT_x_MUX_7_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_7_MASK	/;"	d
PORT_x_MUX_8_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_8_FUNC_1	/;"	d
PORT_x_MUX_8_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_8_FUNC_1	/;"	d
PORT_x_MUX_8_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_8_FUNC_2	/;"	d
PORT_x_MUX_8_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_8_FUNC_2	/;"	d
PORT_x_MUX_8_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_8_FUNC_3	/;"	d
PORT_x_MUX_8_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_8_FUNC_3	/;"	d
PORT_x_MUX_8_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_8_FUNC_4	/;"	d
PORT_x_MUX_8_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_8_FUNC_4	/;"	d
PORT_x_MUX_8_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_8_MASK	/;"	d
PORT_x_MUX_8_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_8_MASK	/;"	d
PORT_x_MUX_9_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_9_FUNC_1	/;"	d
PORT_x_MUX_9_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_9_FUNC_1	/;"	d
PORT_x_MUX_9_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_9_FUNC_2	/;"	d
PORT_x_MUX_9_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_9_FUNC_2	/;"	d
PORT_x_MUX_9_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_9_FUNC_3	/;"	d
PORT_x_MUX_9_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_9_FUNC_3	/;"	d
PORT_x_MUX_9_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_9_FUNC_4	/;"	d
PORT_x_MUX_9_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_9_FUNC_4	/;"	d
PORT_x_MUX_9_MASK	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_9_MASK	/;"	d
PORT_x_MUX_9_MASK	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_9_MASK	/;"	d
PORT_x_MUX_FUNC_1	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_FUNC_1	/;"	d
PORT_x_MUX_FUNC_1	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_FUNC_1	/;"	d
PORT_x_MUX_FUNC_1	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_FUNC_1	/;"	d
PORT_x_MUX_FUNC_1	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_FUNC_1	/;"	d
PORT_x_MUX_FUNC_1	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_FUNC_1	/;"	d
PORT_x_MUX_FUNC_2	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_FUNC_2	/;"	d
PORT_x_MUX_FUNC_2	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_FUNC_2	/;"	d
PORT_x_MUX_FUNC_2	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_FUNC_2	/;"	d
PORT_x_MUX_FUNC_2	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_FUNC_2	/;"	d
PORT_x_MUX_FUNC_2	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_FUNC_2	/;"	d
PORT_x_MUX_FUNC_3	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_FUNC_3	/;"	d
PORT_x_MUX_FUNC_3	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_FUNC_3	/;"	d
PORT_x_MUX_FUNC_3	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_FUNC_3	/;"	d
PORT_x_MUX_FUNC_3	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_FUNC_3	/;"	d
PORT_x_MUX_FUNC_3	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_FUNC_3	/;"	d
PORT_x_MUX_FUNC_4	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define PORT_x_MUX_FUNC_4	/;"	d
PORT_x_MUX_FUNC_4	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define PORT_x_MUX_FUNC_4	/;"	d
PORT_x_MUX_FUNC_4	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define PORT_x_MUX_FUNC_4	/;"	d
PORT_x_MUX_FUNC_4	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define PORT_x_MUX_FUNC_4	/;"	d
PORT_x_MUX_FUNC_4	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define PORT_x_MUX_FUNC_4	/;"	d
POS1	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^POS1:$/;"	l
POSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define POSR	/;"	d
POSR	include/SA-1100.h	/^#define POSR	/;"	d
POSR_FIFOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define POSR_FIFOE	/;"	d
POSR_OOK	include/SA-1100.h	/^#define POSR_OOK	/;"	d
POSTCURSOR	drivers/video/tegra124/sor.h	/^#define POSTCURSOR(/;"	d
POSTCURSOR2_LEVEL0	drivers/video/tegra124/displayport.h	/^	POSTCURSOR2_LEVEL0 = 0,$/;"	e	enum:__anon91ae56030303
POSTCURSOR2_LEVEL1	drivers/video/tegra124/displayport.h	/^	POSTCURSOR2_LEVEL1 = 1,$/;"	e	enum:__anon91ae56030303
POSTCURSOR2_LEVEL2	drivers/video/tegra124/displayport.h	/^	POSTCURSOR2_LEVEL2 = 2,$/;"	e	enum:__anon91ae56030303
POSTCURSOR2_LEVEL3	drivers/video/tegra124/displayport.h	/^	POSTCURSOR2_LEVEL3 = 3,$/;"	e	enum:__anon91ae56030303
POSTCURSOR2_SUPPORTED	drivers/video/tegra124/displayport.h	/^	POSTCURSOR2_SUPPORTED$/;"	e	enum:__anon91ae56030303
POST_AFTER	include/post.h	/^#define POST_AFTER	/;"	d
POST_ALWAYS	include/post.h	/^#define POST_ALWAYS	/;"	d
POST_BEFORE	include/post.h	/^#define POST_BEFORE	/;"	d
POST_BIST_FAILURE	arch/x86/include/asm/post.h	/^#define POST_BIST_FAILURE	/;"	d
POST_CAR_BASE_ADDRESS	arch/x86/include/asm/post.h	/^#define POST_CAR_BASE_ADDRESS	/;"	d
POST_CAR_CPU_CACHE	arch/x86/include/asm/post.h	/^#define POST_CAR_CPU_CACHE	/;"	d
POST_CAR_FAILURE	arch/x86/include/asm/post.h	/^#define POST_CAR_FAILURE	/;"	d
POST_CAR_FILL	arch/x86/include/asm/post.h	/^#define POST_CAR_FILL	/;"	d
POST_CAR_MASK	arch/x86/include/asm/post.h	/^#define POST_CAR_MASK	/;"	d
POST_CAR_MRC_CACHE	arch/x86/include/asm/post.h	/^#define POST_CAR_MRC_CACHE	/;"	d
POST_CAR_MTRR	arch/x86/include/asm/post.h	/^#define POST_CAR_MTRR	/;"	d
POST_CAR_ROM_CACHE	arch/x86/include/asm/post.h	/^#define POST_CAR_ROM_CACHE	/;"	d
POST_CAR_SIPI	arch/x86/include/asm/post.h	/^#define POST_CAR_SIPI	/;"	d
POST_CAR_START	arch/x86/include/asm/post.h	/^#define POST_CAR_START	/;"	d
POST_CAR_UNCACHEABLE	arch/x86/include/asm/post.h	/^#define POST_CAR_UNCACHEABLE	/;"	d
POST_COLDBOOT	include/post.h	/^#define POST_COLDBOOT	/;"	d
POST_CPU_INFO	arch/x86/include/asm/post.h	/^#define POST_CPU_INFO	/;"	d
POST_CPU_INIT	arch/x86/include/asm/post.h	/^#define POST_CPU_INIT	/;"	d
POST_CRITICAL	include/post.h	/^#define POST_CRITICAL	/;"	d
POST_DRAM	arch/x86/include/asm/post.h	/^#define POST_DRAM	/;"	d
POST_EARLY_INIT	arch/x86/include/asm/post.h	/^#define POST_EARLY_INIT	/;"	d
POST_FAILED	include/post.h	/^#define POST_FAILED	/;"	d
POST_FAIL_SAVE	include/post.h	/^#define POST_FAIL_SAVE	/;"	d
POST_LAPIC	arch/x86/include/asm/post.h	/^#define POST_LAPIC	/;"	d
POST_MANUAL	include/post.h	/^#define POST_MANUAL	/;"	d
POST_MAX_NUMBER	post/post.c	/^#define POST_MAX_NUMBER	/;"	d	file:
POST_MEM	include/post.h	/^#define POST_MEM	/;"	d
POST_MRC	arch/x86/include/asm/post.h	/^#define POST_MRC	/;"	d
POST_NORMAL	include/post.h	/^#define POST_NORMAL	/;"	d
POST_PASSED	include/post.h	/^#define POST_PASSED	/;"	d
POST_PORT	arch/x86/include/asm/post.h	/^#define POST_PORT	/;"	d
POST_POWERON	include/post.h	/^#define POST_POWERON	/;"	d
POST_POWERTEST	include/post.h	/^#define POST_POWERTEST	/;"	d
POST_PREREL	include/post.h	/^#define POST_PREREL	/;"	d
POST_PRE_MRC	arch/x86/include/asm/post.h	/^#define POST_PRE_MRC	/;"	d
POST_RAM	include/post.h	/^#define POST_RAM	/;"	d
POST_RAM_FAILURE	arch/x86/include/asm/post.h	/^#define POST_RAM_FAILURE	/;"	d
POST_REBOOT	include/post.h	/^#define POST_REBOOT	/;"	d
POST_ROM	include/post.h	/^#define POST_ROM	/;"	d
POST_SLOWTEST	include/post.h	/^#define POST_SLOWTEST	/;"	d
POST_START	arch/x86/include/asm/post.h	/^#define POST_START	/;"	d
POST_START_DONE	arch/x86/include/asm/post.h	/^#define POST_START_DONE	/;"	d
POST_START_STACK	arch/x86/include/asm/post.h	/^#define POST_START_STACK	/;"	d
POST_STOP	include/post.h	/^#define POST_STOP	/;"	d
POST_WORD_OFF	board/keymile/km_arm/km_arm.c	/^#define POST_WORD_OFF	/;"	d	file:
POS_HISTORY_SIZE	drivers/video/console_truetype.c	/^#define POS_HISTORY_SIZE	/;"	d	file:
POS_POS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define POS_POS(/;"	d
POTAR_REG0	arch/powerpc/include/asm/m8260_pci.h	/^#define POTAR_REG0 /;"	d
POTAR_REG0	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POTAR_REG0 /;"	d
POTAR_REG1	arch/powerpc/include/asm/m8260_pci.h	/^#define POTAR_REG1 /;"	d
POTAR_REG1	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POTAR_REG1 /;"	d
POTAR_REG2	arch/powerpc/include/asm/m8260_pci.h	/^#define POTAR_REG2 /;"	d
POTAR_REG2	arch/powerpc/include/asm/mpc8349_pci.h	/^#define POTAR_REG2 /;"	d
POTAR_TA_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define POTAR_TA_MASK	/;"	d
POTAR_TA_MASK	include/mpc83xx.h	/^#define POTAR_TA_MASK	/;"	d
POWAR_EN	arch/powerpc/include/asm/fsl_pci.h	/^#define POWAR_EN	/;"	d
POWAR_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_EN	/;"	d
POWAR_IO_1M	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_IO_1M	/;"	d
POWAR_IO_READ	arch/powerpc/include/asm/fsl_pci.h	/^#define POWAR_IO_READ	/;"	d
POWAR_IO_READ	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_IO_READ	/;"	d
POWAR_IO_WRITE	arch/powerpc/include/asm/fsl_pci.h	/^#define POWAR_IO_WRITE	/;"	d
POWAR_IO_WRITE	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_IO_WRITE	/;"	d
POWAR_MEM_512M	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_MEM_512M	/;"	d
POWAR_MEM_READ	arch/powerpc/include/asm/fsl_pci.h	/^#define POWAR_MEM_READ	/;"	d
POWAR_MEM_READ	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_MEM_READ	/;"	d
POWAR_MEM_WRITE	arch/powerpc/include/asm/fsl_pci.h	/^#define POWAR_MEM_WRITE	/;"	d
POWAR_MEM_WRITE	arch/powerpc/include/asm/immap_85xx.h	/^#define POWAR_MEM_WRITE	/;"	d
POWERPC_ASM_MPC85XX_GPIO_H_	arch/powerpc/include/asm/mpc85xx_gpio.h	/^#define POWERPC_ASM_MPC85XX_GPIO_H_$/;"	d
POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK	/;"	d
POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK	/;"	d
POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET	/;"	d
POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET	/;"	d
POWER_5VCTRL_DCDC_XFER	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_DCDC_XFER	/;"	d
POWER_5VCTRL_DCDC_XFER	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_DCDC_XFER	/;"	d
POWER_5VCTRL_ENABLE_DCDC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_ENABLE_DCDC	/;"	d
POWER_5VCTRL_ENABLE_DCDC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_ENABLE_DCDC	/;"	d
POWER_5VCTRL_ENABLE_LINREG_ILIMIT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_ENABLE_LINREG_ILIMIT	/;"	d
POWER_5VCTRL_ENABLE_LINREG_ILIMIT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_ENABLE_LINREG_ILIMIT	/;"	d
POWER_5VCTRL_HEADROOM_ADJ_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_HEADROOM_ADJ_MASK	/;"	d
POWER_5VCTRL_HEADROOM_ADJ_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_HEADROOM_ADJ_MASK	/;"	d
POWER_5VCTRL_HEADROOM_ADJ_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_HEADROOM_ADJ_OFFSET	/;"	d
POWER_5VCTRL_HEADROOM_ADJ_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_HEADROOM_ADJ_OFFSET	/;"	d
POWER_5VCTRL_ILIMIT_EQ_ZERO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_ILIMIT_EQ_ZERO	/;"	d
POWER_5VCTRL_ILIMIT_EQ_ZERO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_ILIMIT_EQ_ZERO	/;"	d
POWER_5VCTRL_PWDN_5VBRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_PWDN_5VBRNOUT	/;"	d
POWER_5VCTRL_PWDN_5VBRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_PWDN_5VBRNOUT	/;"	d
POWER_5VCTRL_PWD_CHARGE_4P2_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_PWD_CHARGE_4P2_MASK	/;"	d
POWER_5VCTRL_PWD_CHARGE_4P2_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_PWD_CHARGE_4P2_MASK	/;"	d
POWER_5VCTRL_PWD_CHARGE_4P2_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_PWD_CHARGE_4P2_OFFSET	/;"	d
POWER_5VCTRL_PWD_CHARGE_4P2_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_PWD_CHARGE_4P2_OFFSET	/;"	d
POWER_5VCTRL_PWRUP_VBUS_CMPS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_PWRUP_VBUS_CMPS	/;"	d
POWER_5VCTRL_PWRUP_VBUS_CMPS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_PWRUP_VBUS_CMPS	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V3	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V3	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V3	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V3	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V4	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V4	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V4	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V4	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V5	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V5	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V5	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V5	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V7	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V7	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_4V7	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V7	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_MASK	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_MASK	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET	/;"	d
POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET	/;"	d
POWER_5VCTRL_VBUSVALID_5VDETECT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_5VDETECT	/;"	d
POWER_5VCTRL_VBUSVALID_5VDETECT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_5VDETECT	/;"	d
POWER_5VCTRL_VBUSVALID_TO_B	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TO_B	/;"	d
POWER_5VCTRL_VBUSVALID_TO_B	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TO_B	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_2V9	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_2V9	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_2V9	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_2V9	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V0	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V0	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V0	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V1	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V1	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V1	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V2	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V2	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V3	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V3	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V3	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V3	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V4	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V4	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V4	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V4	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V5	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V5	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V5	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V5	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V6	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V6	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_4V6	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_4V6	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_MASK	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_MASK	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_OFFSET	/;"	d
POWER_5VCTRL_VBUSVALID_TRSH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_5VCTRL_VBUSVALID_TRSH_OFFSET	/;"	d
POWER_ALL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	POWER_ALL$/;"	e	enum:analog_power_block
POWER_ALL	arch/arm/mach-exynos/include/mach/dp_info.h	/^	POWER_ALL$/;"	e	enum:analog_power_block
POWER_ANACLKCTRL_CLKGATE_0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_CLKGATE_0	/;"	d
POWER_ANACLKCTRL_CLKGATE_I	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_CLKGATE_I	/;"	d
POWER_ANACLKCTRL_DITHER_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_DITHER_OFF	/;"	d
POWER_ANACLKCTRL_INCLK_SHIFT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_INCLK_SHIFT_MASK	/;"	d
POWER_ANACLKCTRL_INCLK_SHIFT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_INCLK_SHIFT_OFFSET	/;"	d
POWER_ANACLKCTRL_INDIV_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_INDIV_MASK	/;"	d
POWER_ANACLKCTRL_INDIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_INDIV_OFFSET	/;"	d
POWER_ANACLKCTRL_INVERT_INCLK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_INVERT_INCLK	/;"	d
POWER_ANACLKCTRL_INVERT_OUTCLK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_INVERT_OUTCLK	/;"	d
POWER_ANACLKCTRL_OUTDIV_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_OUTDIV_MASK	/;"	d
POWER_ANACLKCTRL_OUTDIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_OUTDIV_OFFSET	/;"	d
POWER_ANACLKCTRL_SLOW_DITHER	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_ANACLKCTRL_SLOW_DITHER	/;"	d
POWER_AND_PLL_CTRL_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define POWER_AND_PLL_CTRL_REG	/;"	d
POWER_AND_PLL_CTRL_REG_100MHZ_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define POWER_AND_PLL_CTRL_REG_100MHZ_VAL	/;"	d
POWER_AND_PLL_CTRL_REG_25MHZ_VAL_1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define POWER_AND_PLL_CTRL_REG_25MHZ_VAL_1	/;"	d
POWER_AND_PLL_CTRL_REG_25MHZ_VAL_2	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define POWER_AND_PLL_CTRL_REG_25MHZ_VAL_2	/;"	d
POWER_AND_PLL_CTRL_REG_40MHZ_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define POWER_AND_PLL_CTRL_REG_40MHZ_VAL	/;"	d
POWER_AND_PLL_CTRL_REG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define POWER_AND_PLL_CTRL_REG_MASK	/;"	d
POWER_BATTMONITOR_BATT_VAL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_BATT_VAL_MASK	/;"	d
POWER_BATTMONITOR_BATT_VAL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_BATT_VAL_MASK	/;"	d
POWER_BATTMONITOR_BATT_VAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_BATT_VAL_OFFSET	/;"	d
POWER_BATTMONITOR_BATT_VAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_BATT_VAL_OFFSET	/;"	d
POWER_BATTMONITOR_BRWNOUT_LVL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_BRWNOUT_LVL_MASK	/;"	d
POWER_BATTMONITOR_BRWNOUT_LVL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_BRWNOUT_LVL_MASK	/;"	d
POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET	/;"	d
POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET	/;"	d
POWER_BATTMONITOR_BRWNOUT_PWD	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_BRWNOUT_PWD	/;"	d
POWER_BATTMONITOR_BRWNOUT_PWD	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_BRWNOUT_PWD	/;"	d
POWER_BATTMONITOR_EN_BATADJ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_EN_BATADJ	/;"	d
POWER_BATTMONITOR_EN_BATADJ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_EN_BATADJ	/;"	d
POWER_BATTMONITOR_PWDN_BATTBRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_BATTMONITOR_PWDN_BATTBRNOUT	/;"	d
POWER_BATTMONITOR_PWDN_BATTBRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_PWDN_BATTBRNOUT	/;"	d
POWER_BATTMONITOR_PWDN_BATTBRNOUT_5VDETECT_EN	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_BATTMONITOR_PWDN_BATTBRNOUT_5VDETECT_EN	/;"	d
POWER_CHARGE_ADJ_VOLT_M025P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_M025P	/;"	d
POWER_CHARGE_ADJ_VOLT_M025P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_M025P	/;"	d
POWER_CHARGE_ADJ_VOLT_M050P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_M050P	/;"	d
POWER_CHARGE_ADJ_VOLT_M050P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_M050P	/;"	d
POWER_CHARGE_ADJ_VOLT_M075P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_M075P	/;"	d
POWER_CHARGE_ADJ_VOLT_M075P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_M075P	/;"	d
POWER_CHARGE_ADJ_VOLT_M100P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_M100P	/;"	d
POWER_CHARGE_ADJ_VOLT_M100P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_M100P	/;"	d
POWER_CHARGE_ADJ_VOLT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_MASK	/;"	d
POWER_CHARGE_ADJ_VOLT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_MASK	/;"	d
POWER_CHARGE_ADJ_VOLT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_OFFSET	/;"	d
POWER_CHARGE_ADJ_VOLT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_OFFSET	/;"	d
POWER_CHARGE_ADJ_VOLT_P025P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_P025P	/;"	d
POWER_CHARGE_ADJ_VOLT_P025P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_P025P	/;"	d
POWER_CHARGE_ADJ_VOLT_P050P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_P050P	/;"	d
POWER_CHARGE_ADJ_VOLT_P050P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_P050P	/;"	d
POWER_CHARGE_ADJ_VOLT_P075P	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ADJ_VOLT_P075P	/;"	d
POWER_CHARGE_ADJ_VOLT_P075P	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ADJ_VOLT_P075P	/;"	d
POWER_CHARGE_BATTCHRG_I_100MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_100MA	/;"	d
POWER_CHARGE_BATTCHRG_I_100MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_100MA	/;"	d
POWER_CHARGE_BATTCHRG_I_10MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_10MA	/;"	d
POWER_CHARGE_BATTCHRG_I_10MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_10MA	/;"	d
POWER_CHARGE_BATTCHRG_I_200MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_200MA	/;"	d
POWER_CHARGE_BATTCHRG_I_200MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_200MA	/;"	d
POWER_CHARGE_BATTCHRG_I_20MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_20MA	/;"	d
POWER_CHARGE_BATTCHRG_I_20MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_20MA	/;"	d
POWER_CHARGE_BATTCHRG_I_400MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_400MA	/;"	d
POWER_CHARGE_BATTCHRG_I_400MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_400MA	/;"	d
POWER_CHARGE_BATTCHRG_I_50MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_50MA	/;"	d
POWER_CHARGE_BATTCHRG_I_50MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_50MA	/;"	d
POWER_CHARGE_BATTCHRG_I_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_MASK	/;"	d
POWER_CHARGE_BATTCHRG_I_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_MASK	/;"	d
POWER_CHARGE_BATTCHRG_I_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_BATTCHRG_I_OFFSET	/;"	d
POWER_CHARGE_BATTCHRG_I_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_BATTCHRG_I_OFFSET	/;"	d
POWER_CHARGE_CHRG_STS_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_CHRG_STS_OFF	/;"	d
POWER_CHARGE_CHRG_STS_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_CHRG_STS_OFF	/;"	d
POWER_CHARGE_ENABLE_CHARGER_RESISTORS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ENABLE_CHARGER_RESISTORS	/;"	d
POWER_CHARGE_ENABLE_CHARGER_USB0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ENABLE_CHARGER_USB0	/;"	d
POWER_CHARGE_ENABLE_CHARGER_USB1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ENABLE_CHARGER_USB1	/;"	d
POWER_CHARGE_ENABLE_FAULT_DETECT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ENABLE_FAULT_DETECT	/;"	d
POWER_CHARGE_ENABLE_FAULT_DETECT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ENABLE_FAULT_DETECT	/;"	d
POWER_CHARGE_ENABLE_LOAD	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_ENABLE_LOAD	/;"	d
POWER_CHARGE_ENABLE_LOAD	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_ENABLE_LOAD	/;"	d
POWER_CHARGE_LIION_4P1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_LIION_4P1	/;"	d
POWER_CHARGE_PWD_BATTCHRG	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_PWD_BATTCHRG	/;"	d
POWER_CHARGE_PWD_BATTCHRG	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_PWD_BATTCHRG	/;"	d
POWER_CHARGE_STOP_ILIMIT_100MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_STOP_ILIMIT_100MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_100MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_STOP_ILIMIT_100MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_10MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_STOP_ILIMIT_10MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_10MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_STOP_ILIMIT_10MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_20MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_STOP_ILIMIT_20MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_20MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_STOP_ILIMIT_20MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_50MA	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_STOP_ILIMIT_50MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_50MA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_STOP_ILIMIT_50MA	/;"	d
POWER_CHARGE_STOP_ILIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_STOP_ILIMIT_MASK	/;"	d
POWER_CHARGE_STOP_ILIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_STOP_ILIMIT_MASK	/;"	d
POWER_CHARGE_STOP_ILIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_STOP_ILIMIT_OFFSET	/;"	d
POWER_CHARGE_STOP_ILIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CHARGE_STOP_ILIMIT_OFFSET	/;"	d
POWER_CHARGE_USE_EXTERN_R	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CHARGE_USE_EXTERN_R	/;"	d
POWER_CTRL_BATT_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_BATT_BO_IRQ	/;"	d
POWER_CTRL_BATT_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_BATT_BO_IRQ	/;"	d
POWER_CTRL_CLKGATE	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_CLKGATE	/;"	d
POWER_CTRL_DCDC4P2_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_DCDC4P2_BO_IRQ	/;"	d
POWER_CTRL_DCDC4P2_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_DCDC4P2_BO_IRQ	/;"	d
POWER_CTRL_DC_OK_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_DC_OK_IRQ	/;"	d
POWER_CTRL_DC_OK_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_DC_OK_IRQ	/;"	d
POWER_CTRL_ENIRQ_BATT_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_BATT_BO	/;"	d
POWER_CTRL_ENIRQ_BATT_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_BATT_BO	/;"	d
POWER_CTRL_ENIRQ_DCDC4P2_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_DCDC4P2_BO	/;"	d
POWER_CTRL_ENIRQ_DCDC4P2_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_DCDC4P2_BO	/;"	d
POWER_CTRL_ENIRQ_DC_OK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_DC_OK	/;"	d
POWER_CTRL_ENIRQ_DC_OK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_DC_OK	/;"	d
POWER_CTRL_ENIRQ_PSWITCH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_PSWITCH	/;"	d
POWER_CTRL_ENIRQ_PSWITCH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_PSWITCH	/;"	d
POWER_CTRL_ENIRQ_VBUS_VALID	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_VBUS_VALID	/;"	d
POWER_CTRL_ENIRQ_VBUS_VALID	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_VBUS_VALID	/;"	d
POWER_CTRL_ENIRQ_VDD5V_DROOP	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_VDD5V_DROOP	/;"	d
POWER_CTRL_ENIRQ_VDD5V_DROOP	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_VDD5V_DROOP	/;"	d
POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO	/;"	d
POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO	/;"	d
POWER_CTRL_ENIRQ_VDDA_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_VDDA_BO	/;"	d
POWER_CTRL_ENIRQ_VDDA_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_VDDA_BO	/;"	d
POWER_CTRL_ENIRQ_VDDD_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_VDDD_BO	/;"	d
POWER_CTRL_ENIRQ_VDDD_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_VDDD_BO	/;"	d
POWER_CTRL_ENIRQ_VDDIO_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_ENIRQ_VDDIO_BO	/;"	d
POWER_CTRL_ENIRQ_VDDIO_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_ENIRQ_VDDIO_BO	/;"	d
POWER_CTRL_POLARITY_DC_OK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_POLARITY_DC_OK	/;"	d
POWER_CTRL_POLARITY_DC_OK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_POLARITY_DC_OK	/;"	d
POWER_CTRL_POLARITY_PSWITCH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_POLARITY_PSWITCH	/;"	d
POWER_CTRL_POLARITY_PSWITCH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_POLARITY_PSWITCH	/;"	d
POWER_CTRL_POLARITY_VBUSVALID	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_POLARITY_VBUSVALID	/;"	d
POWER_CTRL_POLARITY_VBUSVALID	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_POLARITY_VBUSVALID	/;"	d
POWER_CTRL_POLARITY_VDD5V_GT_VDDIO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_POLARITY_VDD5V_GT_VDDIO	/;"	d
POWER_CTRL_POLARITY_VDD5V_GT_VDDIO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_POLARITY_VDD5V_GT_VDDIO	/;"	d
POWER_CTRL_PSWITCH_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_PSWITCH_IRQ	/;"	d
POWER_CTRL_PSWITCH_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_PSWITCH_IRQ	/;"	d
POWER_CTRL_PSWITCH_IRQ_SRC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_PSWITCH_IRQ_SRC	/;"	d
POWER_CTRL_PSWITCH_IRQ_SRC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_PSWITCH_IRQ_SRC	/;"	d
POWER_CTRL_PSWITCH_MID_TRAN	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_PSWITCH_MID_TRAN	/;"	d
POWER_CTRL_PSWITCH_MID_TRAN	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_PSWITCH_MID_TRAN	/;"	d
POWER_CTRL_VBUS_VALID_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_VBUS_VALID_IRQ	/;"	d
POWER_CTRL_VBUS_VALID_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_VBUS_VALID_IRQ	/;"	d
POWER_CTRL_VDD5V_DROOP_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_VDD5V_DROOP_IRQ	/;"	d
POWER_CTRL_VDD5V_DROOP_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_VDD5V_DROOP_IRQ	/;"	d
POWER_CTRL_VDD5V_GT_VDDIO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_VDD5V_GT_VDDIO_IRQ	/;"	d
POWER_CTRL_VDD5V_GT_VDDIO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_VDD5V_GT_VDDIO_IRQ	/;"	d
POWER_CTRL_VDDA_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_VDDA_BO_IRQ	/;"	d
POWER_CTRL_VDDA_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_VDDA_BO_IRQ	/;"	d
POWER_CTRL_VDDD_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_VDDD_BO_IRQ	/;"	d
POWER_CTRL_VDDD_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_VDDD_BO_IRQ	/;"	d
POWER_CTRL_VDDIO_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_CTRL_VDDIO_BO_IRQ	/;"	d
POWER_CTRL_VDDIO_BO_IRQ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_CTRL_VDDIO_BO_IRQ	/;"	d
POWER_CUT	drivers/usb/eth/r8152.h	/^#define POWER_CUT	/;"	d
POWER_CUT_EC_WRITE	drivers/mtd/ubi/ubi.h	/^	POWER_CUT_EC_WRITE = 0x01,$/;"	e	enum:__anon5a04ca2c0403
POWER_CUT_VID_WRITE	drivers/mtd/ubi/ubi.h	/^	POWER_CUT_VID_WRITE = 0x02,$/;"	e	enum:__anon5a04ca2c0403
POWER_DCDC4P2_BO_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_BO_MASK	/;"	d
POWER_DCDC4P2_BO_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_BO_MASK	/;"	d
POWER_DCDC4P2_BO_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_BO_OFFSET	/;"	d
POWER_DCDC4P2_BO_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_BO_OFFSET	/;"	d
POWER_DCDC4P2_CMPTRIP_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_CMPTRIP_MASK	/;"	d
POWER_DCDC4P2_CMPTRIP_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_CMPTRIP_MASK	/;"	d
POWER_DCDC4P2_CMPTRIP_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_CMPTRIP_OFFSET	/;"	d
POWER_DCDC4P2_CMPTRIP_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_CMPTRIP_OFFSET	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_100MV	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_100MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_100MV	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_100MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_200MV	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_200MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_200MV	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_200MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_25MV	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_25MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_25MV	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_25MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_50MV	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_50MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_50MV	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_50MV	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_MASK	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_MASK	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_OFFSET	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_OFFSET	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2_LT_BATT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2_LT_BATT	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2_LT_BATT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2_LT_BATT	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL	/;"	d
POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL	/;"	d
POWER_DCDC4P2_ENABLE_4P2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_ENABLE_4P2	/;"	d
POWER_DCDC4P2_ENABLE_4P2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_ENABLE_4P2	/;"	d
POWER_DCDC4P2_ENABLE_DCDC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_ENABLE_DCDC	/;"	d
POWER_DCDC4P2_ENABLE_DCDC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_ENABLE_DCDC	/;"	d
POWER_DCDC4P2_HYST_DIR	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_HYST_DIR	/;"	d
POWER_DCDC4P2_HYST_DIR	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_HYST_DIR	/;"	d
POWER_DCDC4P2_HYST_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_HYST_THRESH	/;"	d
POWER_DCDC4P2_HYST_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_HYST_THRESH	/;"	d
POWER_DCDC4P2_ISTEAL_THRESH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_ISTEAL_THRESH_MASK	/;"	d
POWER_DCDC4P2_ISTEAL_THRESH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_ISTEAL_THRESH_MASK	/;"	d
POWER_DCDC4P2_ISTEAL_THRESH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_ISTEAL_THRESH_OFFSET	/;"	d
POWER_DCDC4P2_ISTEAL_THRESH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_ISTEAL_THRESH_OFFSET	/;"	d
POWER_DCDC4P2_TRG_3V9	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_3V9	/;"	d
POWER_DCDC4P2_TRG_3V9	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_3V9	/;"	d
POWER_DCDC4P2_TRG_4V0	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_4V0	/;"	d
POWER_DCDC4P2_TRG_4V0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_4V0	/;"	d
POWER_DCDC4P2_TRG_4V1	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_4V1	/;"	d
POWER_DCDC4P2_TRG_4V1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_4V1	/;"	d
POWER_DCDC4P2_TRG_4V2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_4V2	/;"	d
POWER_DCDC4P2_TRG_4V2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_4V2	/;"	d
POWER_DCDC4P2_TRG_BATT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_BATT	/;"	d
POWER_DCDC4P2_TRG_BATT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_BATT	/;"	d
POWER_DCDC4P2_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_MASK	/;"	d
POWER_DCDC4P2_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_MASK	/;"	d
POWER_DCDC4P2_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCDC4P2_TRG_OFFSET	/;"	d
POWER_DCDC4P2_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCDC4P2_TRG_OFFSET	/;"	d
POWER_DCLIMITS_NEGLIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCLIMITS_NEGLIMIT_MASK	/;"	d
POWER_DCLIMITS_NEGLIMIT_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCLIMITS_NEGLIMIT_MASK	/;"	d
POWER_DCLIMITS_NEGLIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCLIMITS_NEGLIMIT_OFFSET	/;"	d
POWER_DCLIMITS_NEGLIMIT_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCLIMITS_NEGLIMIT_OFFSET	/;"	d
POWER_DCLIMITS_POSLIMIT_BUCK_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCLIMITS_POSLIMIT_BUCK_MASK	/;"	d
POWER_DCLIMITS_POSLIMIT_BUCK_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCLIMITS_POSLIMIT_BUCK_MASK	/;"	d
POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET	/;"	d
POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET	/;"	d
POWER_DEBUG_AVALIDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DEBUG_AVALIDPIOLOCK	/;"	d
POWER_DEBUG_AVALIDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DEBUG_AVALIDPIOLOCK	/;"	d
POWER_DEBUG_BVALIDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DEBUG_BVALIDPIOLOCK	/;"	d
POWER_DEBUG_BVALIDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DEBUG_BVALIDPIOLOCK	/;"	d
POWER_DEBUG_SESSENDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DEBUG_SESSENDPIOLOCK	/;"	d
POWER_DEBUG_SESSENDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DEBUG_SESSENDPIOLOCK	/;"	d
POWER_DEBUG_VBUSVALIDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_DEBUG_VBUSVALIDPIOLOCK	/;"	d
POWER_DEBUG_VBUSVALIDPIOLOCK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_DEBUG_VBUSVALIDPIOLOCK	/;"	d
POWER_DOMAIN	drivers/power/domain/Kconfig	/^config POWER_DOMAIN$/;"	c	menu:Power Domain Support
POWER_DOWN	drivers/net/lan91c96.c	/^#define POWER_DOWN	/;"	d	file:
POWER_DOWN	drivers/net/smc91111.c	/^#define POWER_DOWN	/;"	d	file:
POWER_ENABLE_HW_TRIP	arch/arm/mach-exynos/include/mach/power.h	/^#define POWER_ENABLE_HW_TRIP	/;"	d
POWER_LOOPCTRL_CM_HYST_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_CM_HYST_THRESH	/;"	d
POWER_LOOPCTRL_CM_HYST_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_CM_HYST_THRESH	/;"	d
POWER_LOOPCTRL_DC_C_2X	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_C_2X	/;"	d
POWER_LOOPCTRL_DC_C_2X	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_C_2X	/;"	d
POWER_LOOPCTRL_DC_C_4X	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_C_4X	/;"	d
POWER_LOOPCTRL_DC_C_4X	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_C_4X	/;"	d
POWER_LOOPCTRL_DC_C_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_C_MASK	/;"	d
POWER_LOOPCTRL_DC_C_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_C_MASK	/;"	d
POWER_LOOPCTRL_DC_C_MAX	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_C_MAX	/;"	d
POWER_LOOPCTRL_DC_C_MAX	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_C_MAX	/;"	d
POWER_LOOPCTRL_DC_C_MIN	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_C_MIN	/;"	d
POWER_LOOPCTRL_DC_C_MIN	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_C_MIN	/;"	d
POWER_LOOPCTRL_DC_C_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_C_OFFSET	/;"	d
POWER_LOOPCTRL_DC_C_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_C_OFFSET	/;"	d
POWER_LOOPCTRL_DC_FF_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_FF_MASK	/;"	d
POWER_LOOPCTRL_DC_FF_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_FF_MASK	/;"	d
POWER_LOOPCTRL_DC_FF_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_FF_OFFSET	/;"	d
POWER_LOOPCTRL_DC_FF_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_FF_OFFSET	/;"	d
POWER_LOOPCTRL_DC_R_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_R_MASK	/;"	d
POWER_LOOPCTRL_DC_R_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_R_MASK	/;"	d
POWER_LOOPCTRL_DC_R_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DC_R_OFFSET	/;"	d
POWER_LOOPCTRL_DC_R_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DC_R_OFFSET	/;"	d
POWER_LOOPCTRL_DF_HYST_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_DF_HYST_THRESH	/;"	d
POWER_LOOPCTRL_DF_HYST_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_DF_HYST_THRESH	/;"	d
POWER_LOOPCTRL_EN_CM_HYST	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_CM_HYST	/;"	d
POWER_LOOPCTRL_EN_CM_HYST	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_CM_HYST	/;"	d
POWER_LOOPCTRL_EN_DF_HYST	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_DF_HYST	/;"	d
POWER_LOOPCTRL_EN_DF_HYST	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_DF_HYST	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_2X	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_2X	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_2X	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_2X	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_4X	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_4X	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_4X	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_4X	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_8X	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_8X	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_8X	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_8X	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_DIS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_DIS	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_DIS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_DIS	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_MASK	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_MASK	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_OFFSET	/;"	d
POWER_LOOPCTRL_EN_RCSCALE_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_EN_RCSCALE_OFFSET	/;"	d
POWER_LOOPCTRL_HYST_SIGN	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_HYST_SIGN	/;"	d
POWER_LOOPCTRL_HYST_SIGN	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_HYST_SIGN	/;"	d
POWER_LOOPCTRL_RCSCALE_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_RCSCALE_THRESH	/;"	d
POWER_LOOPCTRL_RCSCALE_THRESH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_RCSCALE_THRESH	/;"	d
POWER_LOOPCTRL_TOGGLE_DIF	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_LOOPCTRL_TOGGLE_DIF	/;"	d
POWER_LOOPCTRL_TOGGLE_DIF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_LOOPCTRL_TOGGLE_DIF	/;"	d
POWER_MINPWR_DC_HALFCLK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_DC_HALFCLK	/;"	d
POWER_MINPWR_DC_HALFCLK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_DC_HALFCLK	/;"	d
POWER_MINPWR_DC_STOPCLK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_DC_STOPCLK	/;"	d
POWER_MINPWR_DC_STOPCLK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_DC_STOPCLK	/;"	d
POWER_MINPWR_DOUBLE_FETS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_DOUBLE_FETS	/;"	d
POWER_MINPWR_DOUBLE_FETS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_DOUBLE_FETS	/;"	d
POWER_MINPWR_ENABLE_OSC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_ENABLE_OSC	/;"	d
POWER_MINPWR_ENABLE_OSC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_ENABLE_OSC	/;"	d
POWER_MINPWR_EN_DC_PFM	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_EN_DC_PFM	/;"	d
POWER_MINPWR_EN_DC_PFM	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_EN_DC_PFM	/;"	d
POWER_MINPWR_HALFFETS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_HALFFETS	/;"	d
POWER_MINPWR_HALFFETS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_HALFFETS	/;"	d
POWER_MINPWR_LESSANA_I	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_LESSANA_I	/;"	d
POWER_MINPWR_LESSANA_I	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_LESSANA_I	/;"	d
POWER_MINPWR_LOWPWR_4P2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_LOWPWR_4P2	/;"	d
POWER_MINPWR_LOWPWR_4P2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_LOWPWR_4P2	/;"	d
POWER_MINPWR_PWD_ANA_CMPS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_PWD_ANA_CMPS	/;"	d
POWER_MINPWR_PWD_ANA_CMPS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_PWD_ANA_CMPS	/;"	d
POWER_MINPWR_PWD_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_PWD_BO	/;"	d
POWER_MINPWR_PWD_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_PWD_BO	/;"	d
POWER_MINPWR_PWD_XTAL24	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_PWD_XTAL24	/;"	d
POWER_MINPWR_PWD_XTAL24	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_PWD_XTAL24	/;"	d
POWER_MINPWR_SELECT_OSC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_SELECT_OSC	/;"	d
POWER_MINPWR_SELECT_OSC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_SELECT_OSC	/;"	d
POWER_MINPWR_USE_VDDXTAL_VBG	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_USE_VDDXTAL_VBG	/;"	d
POWER_MINPWR_USE_VDDXTAL_VBG	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_USE_VDDXTAL_VBG	/;"	d
POWER_MINPWR_VBG_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_VBG_OFF	/;"	d
POWER_MINPWR_VBG_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MINPWR_VBG_OFF	/;"	d
POWER_MINPWR_VDAC_DUMP_CTRL	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MINPWR_VDAC_DUMP_CTRL	/;"	d
POWER_MISC_DELAY_TIMING	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_DELAY_TIMING	/;"	d
POWER_MISC_DELAY_TIMING	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_DELAY_TIMING	/;"	d
POWER_MISC_DISABLE_FET_BO_LOGIC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_DISABLE_FET_BO_LOGIC	/;"	d
POWER_MISC_DISABLE_FET_BO_LOGIC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_DISABLE_FET_BO_LOGIC	/;"	d
POWER_MISC_FREQSEL_14MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_14MHZ	/;"	d
POWER_MISC_FREQSEL_14MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_14MHZ	/;"	d
POWER_MISC_FREQSEL_17MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_17MHZ	/;"	d
POWER_MISC_FREQSEL_17MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_17MHZ	/;"	d
POWER_MISC_FREQSEL_18MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_18MHZ	/;"	d
POWER_MISC_FREQSEL_18MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_18MHZ	/;"	d
POWER_MISC_FREQSEL_19MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_19MHZ	/;"	d
POWER_MISC_FREQSEL_19MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_19MHZ	/;"	d
POWER_MISC_FREQSEL_20MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_20MHZ	/;"	d
POWER_MISC_FREQSEL_20MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_20MHZ	/;"	d
POWER_MISC_FREQSEL_21MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_21MHZ	/;"	d
POWER_MISC_FREQSEL_21MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_21MHZ	/;"	d
POWER_MISC_FREQSEL_24MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_24MHZ	/;"	d
POWER_MISC_FREQSEL_24MHZ	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_24MHZ	/;"	d
POWER_MISC_FREQSEL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_MASK	/;"	d
POWER_MISC_FREQSEL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_MASK	/;"	d
POWER_MISC_FREQSEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_FREQSEL_OFFSET	/;"	d
POWER_MISC_FREQSEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_FREQSEL_OFFSET	/;"	d
POWER_MISC_SEL_PLLCLK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_SEL_PLLCLK	/;"	d
POWER_MISC_SEL_PLLCLK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_SEL_PLLCLK	/;"	d
POWER_MISC_TEST	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_MISC_TEST	/;"	d
POWER_MISC_TEST	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_MISC_TEST	/;"	d
POWER_MNG_CTRL_REG	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define POWER_MNG_CTRL_REG	/;"	d
POWER_MNG_CTRL_REG	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define POWER_MNG_CTRL_REG	/;"	d
POWER_MODE_GATE_GPIO_PWM_I2C	board/tqc/tqm5200/cmd_stk52xx.c	/^#define POWER_MODE_GATE_GPIO_PWM_I2C	/;"	d	file:
POWER_MODE_GATE_GPIO_PWM_I2C	board/tqc/tqm5200/tqm5200.c	/^#define POWER_MODE_GATE_GPIO_PWM_I2C	/;"	d	file:
POWER_REFCTRL_ADJ_ANA	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_ADJ_ANA	/;"	d
POWER_REFCTRL_ADJ_VAG	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_ADJ_VAG	/;"	d
POWER_REFCTRL_ANA_REFVAL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_ANA_REFVAL_MASK	/;"	d
POWER_REFCTRL_ANA_REFVAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_ANA_REFVAL_OFFSET	/;"	d
POWER_REFCTRL_BIAS_CTRL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_BIAS_CTRL_MASK	/;"	d
POWER_REFCTRL_BIAS_CTRL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_BIAS_CTRL_OFFSET	/;"	d
POWER_REFCTRL_FASTSETTLING	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_FASTSETTLING	/;"	d
POWER_REFCTRL_LOW_PWR	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_LOW_PWR	/;"	d
POWER_REFCTRL_RAISE_REF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_RAISE_REF	/;"	d
POWER_REFCTRL_VAG_VAL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_VAG_VAL_MASK	/;"	d
POWER_REFCTRL_VAG_VAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_VAG_VAL_OFFSET	/;"	d
POWER_REFCTRL_VBG_ADJ_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_VBG_ADJ_MASK	/;"	d
POWER_REFCTRL_VBG_ADJ_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_VBG_ADJ_OFFSET	/;"	d
POWER_REFCTRL_VDDXTAL_TO_VDDD	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_VDDXTAL_TO_VDDD	/;"	d
POWER_REFCTRL_XTAL_BGR_BIAS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_REFCTRL_XTAL_BGR_BIAS	/;"	d
POWER_RESET_FASTFALL_PSWITCH_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_RESET_FASTFALL_PSWITCH_OFF	/;"	d
POWER_RESET_PWD	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_RESET_PWD	/;"	d
POWER_RESET_PWD	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_RESET_PWD	/;"	d
POWER_RESET_PWD_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_RESET_PWD_OFF	/;"	d
POWER_RESET_PWD_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_RESET_PWD_OFF	/;"	d
POWER_RESET_UNLOCK_KEY	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_RESET_UNLOCK_KEY	/;"	d
POWER_RESET_UNLOCK_KEY	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_RESET_UNLOCK_KEY	/;"	d
POWER_RESET_UNLOCK_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_RESET_UNLOCK_MASK	/;"	d
POWER_RESET_UNLOCK_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_RESET_UNLOCK_MASK	/;"	d
POWER_RESET_UNLOCK_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_RESET_UNLOCK_OFFSET	/;"	d
POWER_RESET_UNLOCK_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_RESET_UNLOCK_OFFSET	/;"	d
POWER_SPECIAL_TEST_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPECIAL_TEST_MASK	/;"	d
POWER_SPECIAL_TEST_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPECIAL_TEST_MASK	/;"	d
POWER_SPECIAL_TEST_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPECIAL_TEST_OFFSET	/;"	d
POWER_SPECIAL_TEST_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPECIAL_TEST_OFFSET	/;"	d
POWER_SPEED_CTRL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_CTRL_MASK	/;"	d
POWER_SPEED_CTRL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_CTRL_MASK	/;"	d
POWER_SPEED_CTRL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_CTRL_OFFSET	/;"	d
POWER_SPEED_CTRL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_CTRL_OFFSET	/;"	d
POWER_SPEED_CTRL_SS_ENABLE	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_CTRL_SS_ENABLE	/;"	d
POWER_SPEED_CTRL_SS_ENABLE	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_CTRL_SS_ENABLE	/;"	d
POWER_SPEED_CTRL_SS_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_CTRL_SS_OFF	/;"	d
POWER_SPEED_CTRL_SS_OFF	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_CTRL_SS_OFF	/;"	d
POWER_SPEED_CTRL_SS_ON	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_CTRL_SS_ON	/;"	d
POWER_SPEED_CTRL_SS_ON	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_CTRL_SS_ON	/;"	d
POWER_SPEED_STATUS_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_STATUS_MASK	/;"	d
POWER_SPEED_STATUS_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_MASK	/;"	d
POWER_SPEED_STATUS_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_SPEED_STATUS_OFFSET	/;"	d
POWER_SPEED_STATUS_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_OFFSET	/;"	d
POWER_SPEED_STATUS_SEL_ARM_STAT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_SEL_ARM_STAT	/;"	d
POWER_SPEED_STATUS_SEL_CORE_STAT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_SEL_CORE_STAT	/;"	d
POWER_SPEED_STATUS_SEL_DCDC_STAT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_SEL_DCDC_STAT	/;"	d
POWER_SPEED_STATUS_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_SEL_MASK	/;"	d
POWER_SPEED_STATUS_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_SPEED_STATUS_SEL_OFFSET	/;"	d
POWER_STS_AVALID0	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_AVALID0	/;"	d
POWER_STS_AVALID0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_AVALID0	/;"	d
POWER_STS_AVALID0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_AVALID0_STATUS	/;"	d
POWER_STS_AVALID0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_AVALID0_STATUS	/;"	d
POWER_STS_BATT_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_BATT_BO	/;"	d
POWER_STS_BATT_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_BATT_BO	/;"	d
POWER_STS_BVALID0	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_BVALID0	/;"	d
POWER_STS_BVALID0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_BVALID0	/;"	d
POWER_STS_BVALID0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_BVALID0_STATUS	/;"	d
POWER_STS_BVALID0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_BVALID0_STATUS	/;"	d
POWER_STS_CHRGSTS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_CHRGSTS	/;"	d
POWER_STS_CHRGSTS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_CHRGSTS	/;"	d
POWER_STS_DCDC_4P2_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_DCDC_4P2_BO	/;"	d
POWER_STS_DCDC_4P2_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_DCDC_4P2_BO	/;"	d
POWER_STS_DC_OK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_DC_OK	/;"	d
POWER_STS_DC_OK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_DC_OK	/;"	d
POWER_STS_PSWITCH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PSWITCH_MASK	/;"	d
POWER_STS_PSWITCH_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PSWITCH_MASK	/;"	d
POWER_STS_PSWITCH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PSWITCH_OFFSET	/;"	d
POWER_STS_PSWITCH_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PSWITCH_OFFSET	/;"	d
POWER_STS_PWRUP_SOURCE_5V	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PWRUP_SOURCE_5V	/;"	d
POWER_STS_PWRUP_SOURCE_5V	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PWRUP_SOURCE_5V	/;"	d
POWER_STS_PWRUP_SOURCE_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PWRUP_SOURCE_MASK	/;"	d
POWER_STS_PWRUP_SOURCE_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PWRUP_SOURCE_MASK	/;"	d
POWER_STS_PWRUP_SOURCE_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PWRUP_SOURCE_OFFSET	/;"	d
POWER_STS_PWRUP_SOURCE_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PWRUP_SOURCE_OFFSET	/;"	d
POWER_STS_PWRUP_SOURCE_PSWITCH_HIGH	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PWRUP_SOURCE_PSWITCH_HIGH	/;"	d
POWER_STS_PWRUP_SOURCE_PSWITCH_HIGH	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PWRUP_SOURCE_PSWITCH_HIGH	/;"	d
POWER_STS_PWRUP_SOURCE_PSWITCH_MID	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PWRUP_SOURCE_PSWITCH_MID	/;"	d
POWER_STS_PWRUP_SOURCE_PSWITCH_MID	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PWRUP_SOURCE_PSWITCH_MID	/;"	d
POWER_STS_PWRUP_SOURCE_RTC	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_PWRUP_SOURCE_RTC	/;"	d
POWER_STS_PWRUP_SOURCE_RTC	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_PWRUP_SOURCE_RTC	/;"	d
POWER_STS_SESSEND0	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_SESSEND0	/;"	d
POWER_STS_SESSEND0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_SESSEND0	/;"	d
POWER_STS_SESSEND0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_SESSEND0_STATUS	/;"	d
POWER_STS_SESSEND0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_SESSEND0_STATUS	/;"	d
POWER_STS_THERMAL_WARNING	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_THERMAL_WARNING	/;"	d
POWER_STS_VBUSVALID0	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VBUSVALID0	/;"	d
POWER_STS_VBUSVALID0	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VBUSVALID0	/;"	d
POWER_STS_VBUSVALID0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VBUSVALID0_STATUS	/;"	d
POWER_STS_VBUSVALID0_STATUS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VBUSVALID0_STATUS	/;"	d
POWER_STS_VDD5V_DROOP	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VDD5V_DROOP	/;"	d
POWER_STS_VDD5V_DROOP	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDD5V_DROOP	/;"	d
POWER_STS_VDD5V_FAULT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VDD5V_FAULT	/;"	d
POWER_STS_VDD5V_FAULT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDD5V_FAULT	/;"	d
POWER_STS_VDD5V_GT_VDDIO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VDD5V_GT_VDDIO	/;"	d
POWER_STS_VDD5V_GT_VDDIO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDD5V_GT_VDDIO	/;"	d
POWER_STS_VDDA_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VDDA_BO	/;"	d
POWER_STS_VDDA_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDDA_BO	/;"	d
POWER_STS_VDDD_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VDDD_BO	/;"	d
POWER_STS_VDDD_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDDD_BO	/;"	d
POWER_STS_VDDIO_BO	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_STS_VDDIO_BO	/;"	d
POWER_STS_VDDIO_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDDIO_BO	/;"	d
POWER_STS_VDDMEM_BO	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_STS_VDDMEM_BO	/;"	d
POWER_THERMAL_LOW_POWER	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_LOW_POWER	/;"	d
POWER_THERMAL_OFFSET_ADJ_ENABLE	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_OFFSET_ADJ_ENABLE	/;"	d
POWER_THERMAL_OFFSET_ADJ_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_OFFSET_ADJ_MASK	/;"	d
POWER_THERMAL_OFFSET_ADJ_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_OFFSET_ADJ_OFFSET	/;"	d
POWER_THERMAL_PWD	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_PWD	/;"	d
POWER_THERMAL_TEMP_THRESHOLD_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_TEMP_THRESHOLD_MASK	/;"	d
POWER_THERMAL_TEMP_THRESHOLD_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_TEMP_THRESHOLD_OFFSET	/;"	d
POWER_THERMAL_TEST	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_THERMAL_TEST	/;"	d
POWER_UP_DONE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define POWER_UP_DONE	/;"	d
POWER_UP_DONE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	POWER_UP_DONE			= 1 << 0,$/;"	e	enum:__anon957231910203	file:
POWER_UP_START	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define POWER_UP_START	/;"	d
POWER_UP_START	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	POWER_UP_START			= 1 << 0,$/;"	e	enum:__anon957231910203	file:
POWER_USB1CTRL_AVALID1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_USB1CTRL_AVALID1	/;"	d
POWER_USB1CTRL_BVALID1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_USB1CTRL_BVALID1	/;"	d
POWER_USB1CTRL_SESSEND1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_USB1CTRL_SESSEND1	/;"	d
POWER_USB1CTRL_VBUSVALID1	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_USB1CTRL_VBUSVALID1	/;"	d
POWER_USB_DRD_PHY_CTRL_DISABLE	arch/arm/mach-exynos/include/mach/power.h	/^#define POWER_USB_DRD_PHY_CTRL_DISABLE	/;"	d
POWER_USB_DRD_PHY_CTRL_EN	arch/arm/mach-exynos/include/mach/power.h	/^#define POWER_USB_DRD_PHY_CTRL_EN	/;"	d
POWER_USB_HOST_PHY_CTRL_DISABLE	arch/arm/mach-exynos/include/mach/power.h	/^#define POWER_USB_HOST_PHY_CTRL_DISABLE	/;"	d
POWER_USB_HOST_PHY_CTRL_EN	arch/arm/mach-exynos/include/mach/power.h	/^#define POWER_USB_HOST_PHY_CTRL_EN	/;"	d
POWER_VDDACTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDACTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDACTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDACTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDACTRL_DISABLE_FET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_DISABLE_FET	/;"	d
POWER_VDDACTRL_DISABLE_FET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_DISABLE_FET	/;"	d
POWER_VDDACTRL_DISABLE_STEPPING	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_DISABLE_STEPPING	/;"	d
POWER_VDDACTRL_DISABLE_STEPPING	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_DISABLE_STEPPING	/;"	d
POWER_VDDACTRL_ENABLE_LINREG	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_ENABLE_LINREG	/;"	d
POWER_VDDACTRL_ENABLE_LINREG	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_ENABLE_LINREG	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_0STEPS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_0STEPS	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_0STEPS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_0STEPS	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_1STEPS_ABOVE	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_1STEPS_ABOVE	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_1STEPS_ABOVE	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_1STEPS_ABOVE	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_2STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_2STEPS_BELOW	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_2STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_2STEPS_BELOW	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_MASK	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_MASK	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_OFFSET	/;"	d
POWER_VDDACTRL_LINREG_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_LINREG_OFFSET_OFFSET	/;"	d
POWER_VDDACTRL_PWDN_BRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_PWDN_BRNOUT	/;"	d
POWER_VDDACTRL_PWDN_BRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_PWDN_BRNOUT	/;"	d
POWER_VDDACTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_TRG_MASK	/;"	d
POWER_VDDACTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_TRG_MASK	/;"	d
POWER_VDDACTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDACTRL_TRG_OFFSET	/;"	d
POWER_VDDACTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDACTRL_TRG_OFFSET	/;"	d
POWER_VDDDCTRL_ADJTN_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_ADJTN_MASK	/;"	d
POWER_VDDDCTRL_ADJTN_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_ADJTN_MASK	/;"	d
POWER_VDDDCTRL_ADJTN_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_ADJTN_OFFSET	/;"	d
POWER_VDDDCTRL_ADJTN_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_ADJTN_OFFSET	/;"	d
POWER_VDDDCTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDDCTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDDCTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDDCTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDDCTRL_DISABLE_FET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_DISABLE_FET	/;"	d
POWER_VDDDCTRL_DISABLE_FET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_DISABLE_FET	/;"	d
POWER_VDDDCTRL_DISABLE_STEPPING	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_DISABLE_STEPPING	/;"	d
POWER_VDDDCTRL_DISABLE_STEPPING	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_DISABLE_STEPPING	/;"	d
POWER_VDDDCTRL_ENABLE_LINREG	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_ENABLE_LINREG	/;"	d
POWER_VDDDCTRL_ENABLE_LINREG	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_ENABLE_LINREG	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_0STEPS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_0STEPS	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_0STEPS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_0STEPS	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_ABOVE	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_ABOVE	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_ABOVE	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_ABOVE	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_2STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_2STEPS_BELOW	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_2STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_2STEPS_BELOW	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_MASK	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_MASK	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_OFFSET	/;"	d
POWER_VDDDCTRL_LINREG_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_LINREG_OFFSET_OFFSET	/;"	d
POWER_VDDDCTRL_PWDN_BRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_PWDN_BRNOUT	/;"	d
POWER_VDDDCTRL_PWDN_BRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_PWDN_BRNOUT	/;"	d
POWER_VDDDCTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_TRG_MASK	/;"	d
POWER_VDDDCTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_TRG_MASK	/;"	d
POWER_VDDDCTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDDCTRL_TRG_OFFSET	/;"	d
POWER_VDDDCTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDDCTRL_TRG_OFFSET	/;"	d
POWER_VDDIOCTRL_ADJTN_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_ADJTN_MASK	/;"	d
POWER_VDDIOCTRL_ADJTN_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_ADJTN_MASK	/;"	d
POWER_VDDIOCTRL_ADJTN_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_ADJTN_OFFSET	/;"	d
POWER_VDDIOCTRL_ADJTN_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_ADJTN_OFFSET	/;"	d
POWER_VDDIOCTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDIOCTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDIOCTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDIOCTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDIOCTRL_DISABLE_FET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_DISABLE_FET	/;"	d
POWER_VDDIOCTRL_DISABLE_FET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_DISABLE_FET	/;"	d
POWER_VDDIOCTRL_DISABLE_STEPPING	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_DISABLE_STEPPING	/;"	d
POWER_VDDIOCTRL_DISABLE_STEPPING	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_DISABLE_STEPPING	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_ABOVE	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_ABOVE	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_ABOVE	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_ABOVE	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_2STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_2STEPS_BELOW	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_2STEPS_BELOW	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_2STEPS_BELOW	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_MASK	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_MASK	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_OFFSET	/;"	d
POWER_VDDIOCTRL_LINREG_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_LINREG_OFFSET_OFFSET	/;"	d
POWER_VDDIOCTRL_PWDN_BRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_PWDN_BRNOUT	/;"	d
POWER_VDDIOCTRL_PWDN_BRNOUT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_PWDN_BRNOUT	/;"	d
POWER_VDDIOCTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_TRG_MASK	/;"	d
POWER_VDDIOCTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_TRG_MASK	/;"	d
POWER_VDDIOCTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDIOCTRL_TRG_OFFSET	/;"	d
POWER_VDDIOCTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDIOCTRL_TRG_OFFSET	/;"	d
POWER_VDDMEMCTRL_BO_OFFSET_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_BO_OFFSET_MASK	/;"	d
POWER_VDDMEMCTRL_BO_OFFSET_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_BO_OFFSET_OFFSET	/;"	d
POWER_VDDMEMCTRL_ENABLE_ILIMIT	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDMEMCTRL_ENABLE_ILIMIT	/;"	d
POWER_VDDMEMCTRL_ENABLE_ILIMIT	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_ENABLE_ILIMIT	/;"	d
POWER_VDDMEMCTRL_ENABLE_LINREG	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDMEMCTRL_ENABLE_LINREG	/;"	d
POWER_VDDMEMCTRL_ENABLE_LINREG	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_ENABLE_LINREG	/;"	d
POWER_VDDMEMCTRL_PULLDOWN_ACTIVE	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDMEMCTRL_PULLDOWN_ACTIVE	/;"	d
POWER_VDDMEMCTRL_PULLDOWN_ACTIVE	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_PULLDOWN_ACTIVE	/;"	d
POWER_VDDMEMCTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDMEMCTRL_TRG_MASK	/;"	d
POWER_VDDMEMCTRL_TRG_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_TRG_MASK	/;"	d
POWER_VDDMEMCTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VDDMEMCTRL_TRG_OFFSET	/;"	d
POWER_VDDMEMCTRL_TRG_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VDDMEMCTRL_TRG_OFFSET	/;"	d
POWER_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VERSION_MAJOR_MASK	/;"	d
POWER_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VERSION_MAJOR_MASK	/;"	d
POWER_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VERSION_MAJOR_OFFSET	/;"	d
POWER_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VERSION_MAJOR_OFFSET	/;"	d
POWER_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VERSION_MINOR_MASK	/;"	d
POWER_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VERSION_MINOR_MASK	/;"	d
POWER_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VERSION_MINOR_OFFSET	/;"	d
POWER_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VERSION_MINOR_OFFSET	/;"	d
POWER_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VERSION_STEP_MASK	/;"	d
POWER_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VERSION_STEP_MASK	/;"	d
POWER_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define	POWER_VERSION_STEP_OFFSET	/;"	d
POWER_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define	POWER_VERSION_STEP_OFFSET	/;"	d
PP0_CURRENT_LIMIT	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  PP0_CURRENT_LIMIT	/;"	d
PP1_CURRENT_LIMIT_IVB	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  PP1_CURRENT_LIMIT_IVB	/;"	d
PP1_CURRENT_LIMIT_SNB	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define  PP1_CURRENT_LIMIT_SNB	/;"	d
PP2C_CIBGMN	drivers/block/sata_ceva.c	/^#define PP2C_CIBGMN	/;"	d	file:
PP2C_CIBGMX	drivers/block/sata_ceva.c	/^#define PP2C_CIBGMX	/;"	d	file:
PP2C_CIBGN	drivers/block/sata_ceva.c	/^#define PP2C_CIBGN	/;"	d	file:
PP2C_CINMP	drivers/block/sata_ceva.c	/^#define PP2C_CINMP	/;"	d	file:
PP3C_CWBGMN	drivers/block/sata_ceva.c	/^#define PP3C_CWBGMN	/;"	d	file:
PP3C_CWBGMX	drivers/block/sata_ceva.c	/^#define PP3C_CWBGMX	/;"	d	file:
PP3C_CWBGN	drivers/block/sata_ceva.c	/^#define PP3C_CWBGN	/;"	d	file:
PP3C_CWNMP	drivers/block/sata_ceva.c	/^#define PP3C_CWNMP	/;"	d	file:
PP4C_BMX	drivers/block/sata_ceva.c	/^#define PP4C_BMX	/;"	d	file:
PP4C_BNM	drivers/block/sata_ceva.c	/^#define PP4C_BNM	/;"	d	file:
PP4C_PTST	drivers/block/sata_ceva.c	/^#define PP4C_PTST	/;"	d	file:
PP4C_SFD	drivers/block/sata_ceva.c	/^#define PP4C_SFD	/;"	d	file:
PP5C_RCT	drivers/block/sata_ceva.c	/^#define PP5C_RCT	/;"	d	file:
PP5C_RIT	drivers/block/sata_ceva.c	/^#define PP5C_RIT	/;"	d	file:
PPAACE_AF_MW	arch/powerpc/include/asm/fsl_pamu.h	/^#define PPAACE_AF_MW	/;"	d
PPAACE_AF_MW_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PPAACE_AF_MW_SHIFT	/;"	d
PPAACE_AF_WBAL	arch/powerpc/include/asm/fsl_pamu.h	/^#define PPAACE_AF_WBAL	/;"	d
PPAACE_AF_WBAL_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PPAACE_AF_WBAL_SHIFT	/;"	d
PPAACE_AF_WSE	arch/powerpc/include/asm/fsl_pamu.h	/^#define PPAACE_AF_WSE	/;"	d
PPAACE_AF_WSE_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define PPAACE_AF_WSE_SHIFT	/;"	d
PPAR	include/SA-1100.h	/^#define PPAR	/;"	d
PPAR_SPR	include/SA-1100.h	/^#define PPAR_SPR	/;"	d
PPAR_SSPGPIO	include/SA-1100.h	/^#define PPAR_SSPGPIO	/;"	d
PPAR_SSPTRSS	include/SA-1100.h	/^#define PPAR_SSPTRSS	/;"	d
PPAR_UARTGPIO	include/SA-1100.h	/^#define PPAR_UARTGPIO	/;"	d
PPAR_UARTTR	include/SA-1100.h	/^#define PPAR_UARTTR	/;"	d
PPAR_UPR	include/SA-1100.h	/^#define PPAR_UPR	/;"	d
PPA_HAL_SERVICES_START_INDEX	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^#define PPA_HAL_SERVICES_START_INDEX /;"	d	file:
PPA_SERV_HAL_LOCK_EMIF_FW	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^#define PPA_SERV_HAL_LOCK_EMIF_FW /;"	d	file:
PPA_SERV_HAL_SETUP_EMIF_FW_REGION	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^#define PPA_SERV_HAL_SETUP_EMIF_FW_REGION /;"	d	file:
PPA_SERV_HAL_SETUP_SEC_RESVD_REGION	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^#define PPA_SERV_HAL_SETUP_SEC_RESVD_REGION /;"	d	file:
PPC	arch/Kconfig	/^config PPC$/;"	c	choice:choice07312ef30104
PPC440SPE_DISPLAY	include/configs/yucca.h	/^#define PPC440SPE_DISPLAY	/;"	d
PPC440SPE_DISPLAY_D1	include/configs/yucca.h	/^#define PPC440SPE_DISPLAY_D1	/;"	d
PPC440SPE_DISPLAY_D2	include/configs/yucca.h	/^#define PPC440SPE_DISPLAY_D2	/;"	d
PPC440SPE_DISPLAY_D4	include/configs/yucca.h	/^#define PPC440SPE_DISPLAY_D4	/;"	d
PPC440SPE_DISPLAY_D8	include/configs/yucca.h	/^#define PPC440SPE_DISPLAY_D8	/;"	d
PPC4XX_TLB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define        PPC4XX_TLB_SIZE /;"	d
PPC4xx_IBM_DDR2_DUMP_MQ_REGISTER	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define PPC4xx_IBM_DDR2_DUMP_MQ_REGISTER(/;"	d	file:
PPC4xx_IBM_DDR2_DUMP_REGISTER	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define PPC4xx_IBM_DDR2_DUMP_REGISTER(/;"	d	file:
PPC4xx_SYS_INFO	arch/powerpc/include/asm/ppc4xx.h	/^} PPC4xx_SYS_INFO;$/;"	t	typeref:struct:__anon8d0ced010108
PPCFG_ESDF_EN	drivers/block/sata_ceva.c	/^#define PPCFG_ESDF_EN	/;"	d	file:
PPCFG_PSSO_EN	drivers/block/sata_ceva.c	/^#define PPCFG_PSSO_EN	/;"	d	file:
PPCFG_PSS_EN	drivers/block/sata_ceva.c	/^#define PPCFG_PSS_EN	/;"	d	file:
PPCFG_TTA	drivers/block/sata_ceva.c	/^#define PPCFG_TTA	/;"	d	file:
PPCR	arch/arm/cpu/sa1100/start.S	/^#define PPCR /;"	d	file:
PPCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PPCR	/;"	d
PPCR	include/SA-1100.h	/^#define PPCR	/;"	d
PPCR_A	board/ms7720se/lowlevel_init.S	/^PPCR_A:		.long	PFC_BASE + 0x18$/;"	l
PPCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PPCR_A:		.long	GPIO_BASE + 0x1a$/;"	l
PPCR_CCF	include/SA-1100.h	/^#define PPCR_CCF	/;"	d
PPCR_D	board/ms7720se/lowlevel_init.S	/^PPCR_D:		.word	0x00AA$/;"	l
PPCR_F100_2MHz	include/SA-1100.h	/^#define PPCR_F100_2MHz	/;"	d
PPCR_F103_2MHz	include/SA-1100.h	/^#define PPCR_F103_2MHz	/;"	d
PPCR_F114_5MHz	include/SA-1100.h	/^#define PPCR_F114_5MHz	/;"	d
PPCR_F118_0MHz	include/SA-1100.h	/^#define PPCR_F118_0MHz	/;"	d
PPCR_F128_9MHz	include/SA-1100.h	/^#define PPCR_F128_9MHz	/;"	d
PPCR_F132_7MHz	include/SA-1100.h	/^#define PPCR_F132_7MHz	/;"	d
PPCR_F143_2MHz	include/SA-1100.h	/^#define PPCR_F143_2MHz	/;"	d
PPCR_F147_5MHz	include/SA-1100.h	/^#define PPCR_F147_5MHz	/;"	d
PPCR_F157_5MHz	include/SA-1100.h	/^#define PPCR_F157_5MHz	/;"	d
PPCR_F162_2MHz	include/SA-1100.h	/^#define PPCR_F162_2MHz	/;"	d
PPCR_F171_8MHz	include/SA-1100.h	/^#define PPCR_F171_8MHz	/;"	d
PPCR_F176_9MHz	include/SA-1100.h	/^#define PPCR_F176_9MHz	/;"	d
PPCR_F186_1MHz	include/SA-1100.h	/^#define PPCR_F186_1MHz	/;"	d
PPCR_F191_7MHz	include/SA-1100.h	/^#define PPCR_F191_7MHz	/;"	d
PPCR_F200_5MHz	include/SA-1100.h	/^#define PPCR_F200_5MHz	/;"	d
PPCR_F206_4MHz	include/SA-1100.h	/^#define PPCR_F206_4MHz	/;"	d
PPCR_F214_8MHz	include/SA-1100.h	/^#define PPCR_F214_8MHz	/;"	d
PPCR_F221_2MHz	include/SA-1100.h	/^#define PPCR_F221_2MHz	/;"	d
PPCR_F229_1MHz	include/SA-1100.h	/^#define PPCR_F229_1MHz	/;"	d
PPCR_F239_6MHz	include/SA-1100.h	/^#define PPCR_F239_6MHz	/;"	d
PPCR_F243_4MHz	include/SA-1100.h	/^#define PPCR_F243_4MHz	/;"	d
PPCR_F250_7MHz	include/SA-1100.h	/^#define PPCR_F250_7MHz	/;"	d
PPCR_F257_7MHz	include/SA-1100.h	/^#define PPCR_F257_7MHz	/;"	d
PPCR_F265_4MHz	include/SA-1100.h	/^#define PPCR_F265_4MHz	/;"	d
PPCR_F272_0MHz	include/SA-1100.h	/^#define PPCR_F272_0MHz	/;"	d
PPCR_F280_2MHz	include/SA-1100.h	/^#define PPCR_F280_2MHz	/;"	d
PPCR_F57_3MHz	include/SA-1100.h	/^#define PPCR_F57_3MHz	/;"	d
PPCR_F59_0MHz	include/SA-1100.h	/^#define PPCR_F59_0MHz	/;"	d
PPCR_F71_6MHz	include/SA-1100.h	/^#define PPCR_F71_6MHz	/;"	d
PPCR_F73_7MHz	include/SA-1100.h	/^#define PPCR_F73_7MHz	/;"	d
PPCR_F85_9MHz	include/SA-1100.h	/^#define PPCR_F85_9MHz	/;"	d
PPCR_F88_5MHz	include/SA-1100.h	/^#define PPCR_F88_5MHz	/;"	d
PPCR_Fx16	include/SA-1100.h	/^#define PPCR_Fx16	/;"	d
PPCR_Fx20	include/SA-1100.h	/^#define PPCR_Fx20	/;"	d
PPCR_Fx24	include/SA-1100.h	/^#define PPCR_Fx24	/;"	d
PPCR_Fx28	include/SA-1100.h	/^#define PPCR_Fx28	/;"	d
PPCR_Fx32	include/SA-1100.h	/^#define PPCR_Fx32	/;"	d
PPCR_Fx36	include/SA-1100.h	/^#define PPCR_Fx36	/;"	d
PPCR_Fx40	include/SA-1100.h	/^#define PPCR_Fx40	/;"	d
PPCR_Fx44	include/SA-1100.h	/^#define PPCR_Fx44	/;"	d
PPCR_Fx48	include/SA-1100.h	/^#define PPCR_Fx48	/;"	d
PPCR_Fx52	include/SA-1100.h	/^#define PPCR_Fx52	/;"	d
PPCR_Fx56	include/SA-1100.h	/^#define PPCR_Fx56	/;"	d
PPCR_Fx60	include/SA-1100.h	/^#define PPCR_Fx60	/;"	d
PPCR_Fx64	include/SA-1100.h	/^#define PPCR_Fx64	/;"	d
PPCR_Fx68	include/SA-1100.h	/^#define PPCR_Fx68	/;"	d
PPCR_Fx72	include/SA-1100.h	/^#define PPCR_Fx72	/;"	d
PPCR_Fx76	include/SA-1100.h	/^#define PPCR_Fx76	/;"	d
PPC_128MB_SACR_BIT	arch/powerpc/include/asm/ppc405.h	/^#define PPC_128MB_SACR_BIT(/;"	d
PPC_128MB_SACR_VALUE	arch/powerpc/include/asm/ppc405.h	/^#define PPC_128MB_SACR_VALUE(/;"	d
PPC_ACR_BUS_PARK_CORE	arch/powerpc/include/asm/m8260_pci.h	/^#define PPC_ACR_BUS_PARK_CORE /;"	d
PPC_ACR_BUS_PARK_CORE	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PPC_ACR_BUS_PARK_CORE /;"	d
PPC_ACR_BUS_PARK_PCI	arch/powerpc/include/asm/m8260_pci.h	/^#define PPC_ACR_BUS_PARK_PCI /;"	d
PPC_ACR_BUS_PARK_PCI	arch/powerpc/include/asm/mpc8349_pci.h	/^#define PPC_ACR_BUS_PARK_PCI /;"	d
PPC_ACR_DBGD	include/mpc8260.h	/^#define PPC_ACR_DBGD	/;"	d
PPC_ACR_EARB	include/mpc8260.h	/^#define PPC_ACR_EARB	/;"	d
PPC_ACR_PRKM_CORE	include/mpc8260.h	/^#define PPC_ACR_PRKM_CORE /;"	d
PPC_ACR_PRKM_CPMH	include/mpc8260.h	/^#define PPC_ACR_PRKM_CPMH /;"	d
PPC_ACR_PRKM_CPML	include/mpc8260.h	/^#define PPC_ACR_PRKM_CPML /;"	d
PPC_ACR_PRKM_CPMM	include/mpc8260.h	/^#define PPC_ACR_PRKM_CPMM /;"	d
PPC_ACR_PRKM_EXT1	include/mpc8260.h	/^#define PPC_ACR_PRKM_EXT1 /;"	d
PPC_ACR_PRKM_EXT2	include/mpc8260.h	/^#define PPC_ACR_PRKM_EXT2 /;"	d
PPC_ACR_PRKM_EXT3	include/mpc8260.h	/^#define PPC_ACR_PRKM_EXT3 /;"	d
PPC_ACR_PRKM_MSK	include/mpc8260.h	/^#define PPC_ACR_PRKM_MSK /;"	d
PPC_ALRH_PF0_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF0_MSK /;"	d
PPC_ALRH_PF1_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF1_MSK /;"	d
PPC_ALRH_PF2_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF2_MSK /;"	d
PPC_ALRH_PF3_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF3_MSK /;"	d
PPC_ALRH_PF4_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF4_MSK /;"	d
PPC_ALRH_PF5_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF5_MSK /;"	d
PPC_ALRH_PF6_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF6_MSK /;"	d
PPC_ALRH_PF7_MSK	include/mpc8260.h	/^#define PPC_ALRH_PF7_MSK /;"	d
PPC_ALRL_PF10_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF10_MSK /;"	d
PPC_ALRL_PF11_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF11_MSK /;"	d
PPC_ALRL_PF12_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF12_MSK /;"	d
PPC_ALRL_PF13_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF13_MSK /;"	d
PPC_ALRL_PF14_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF14_MSK /;"	d
PPC_ALRL_PF15_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF15_MSK /;"	d
PPC_ALRL_PF8_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF8_MSK /;"	d
PPC_ALRL_PF9_MSK	include/mpc8260.h	/^#define PPC_ALRL_PF9_MSK /;"	d
PPC_LDD	include/SA-1100.h	/^#define PPC_LDD(/;"	d
PPC_LDD0	include/SA-1100.h	/^#define PPC_LDD0	/;"	d
PPC_LDD1	include/SA-1100.h	/^#define PPC_LDD1	/;"	d
PPC_LDD2	include/SA-1100.h	/^#define PPC_LDD2	/;"	d
PPC_LDD3	include/SA-1100.h	/^#define PPC_LDD3	/;"	d
PPC_LDD4	include/SA-1100.h	/^#define PPC_LDD4	/;"	d
PPC_LDD5	include/SA-1100.h	/^#define PPC_LDD5	/;"	d
PPC_LDD6	include/SA-1100.h	/^#define PPC_LDD6	/;"	d
PPC_LDD7	include/SA-1100.h	/^#define PPC_LDD7	/;"	d
PPC_L_BIAS	include/SA-1100.h	/^#define PPC_L_BIAS	/;"	d
PPC_L_FCLK	include/SA-1100.h	/^#define PPC_L_FCLK	/;"	d
PPC_L_LCLK	include/SA-1100.h	/^#define PPC_L_LCLK	/;"	d
PPC_L_PCLK	include/SA-1100.h	/^#define PPC_L_PCLK	/;"	d
PPC_REG	arch/powerpc/include/asm/ptrace.h	/^#define PPC_REG /;"	d
PPC_REG_BITS	arch/powerpc/include/asm/ppc4xx.h	/^#define	PPC_REG_BITS	/;"	d
PPC_REG_VAL	arch/powerpc/include/asm/ppc4xx.h	/^#define	PPC_REG_VAL(/;"	d
PPC_RXD1	include/SA-1100.h	/^#define PPC_RXD1	/;"	d
PPC_RXD2	include/SA-1100.h	/^#define PPC_RXD2	/;"	d
PPC_RXD3	include/SA-1100.h	/^#define PPC_RXD3	/;"	d
PPC_RXD4	include/SA-1100.h	/^#define PPC_RXD4	/;"	d
PPC_SCLK	include/SA-1100.h	/^#define PPC_SCLK	/;"	d
PPC_SFRM	include/SA-1100.h	/^#define PPC_SFRM	/;"	d
PPC_TXD1	include/SA-1100.h	/^#define PPC_TXD1	/;"	d
PPC_TXD2	include/SA-1100.h	/^#define PPC_TXD2	/;"	d
PPC_TXD3	include/SA-1100.h	/^#define PPC_TXD3	/;"	d
PPC_TXD4	include/SA-1100.h	/^#define PPC_TXD4	/;"	d
PPDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PPDR	/;"	d
PPDR	include/SA-1100.h	/^#define PPDR	/;"	d
PPDR_In	include/SA-1100.h	/^#define PPDR_In	/;"	d
PPDR_Out	include/SA-1100.h	/^#define PPDR_Out	/;"	d
PPFR	include/SA-1100.h	/^#define PPFR	/;"	d
PPFR_LCD	include/SA-1100.h	/^#define PPFR_LCD	/;"	d
PPFR_PPCEn	include/SA-1100.h	/^#define PPFR_PPCEn	/;"	d
PPFR_PerEn	include/SA-1100.h	/^#define PPFR_PerEn	/;"	d
PPFR_SP1RX	include/SA-1100.h	/^#define PPFR_SP1RX	/;"	d
PPFR_SP1TX	include/SA-1100.h	/^#define PPFR_SP1TX	/;"	d
PPFR_SP2RX	include/SA-1100.h	/^#define PPFR_SP2RX	/;"	d
PPFR_SP2TX	include/SA-1100.h	/^#define PPFR_SP2TX	/;"	d
PPFR_SP3RX	include/SA-1100.h	/^#define PPFR_SP3RX	/;"	d
PPFR_SP3TX	include/SA-1100.h	/^#define PPFR_SP3TX	/;"	d
PPFR_SP4	include/SA-1100.h	/^#define PPFR_SP4	/;"	d
PPI0_CONTROL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI0_CONTROL /;"	d
PPI0_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI0_COUNT /;"	d
PPI0_DELAY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI0_DELAY /;"	d
PPI0_FRAME	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI0_FRAME /;"	d
PPI0_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI0_STATUS /;"	d
PPI1_CONTROL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI1_CONTROL /;"	d
PPI1_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI1_COUNT /;"	d
PPI1_DELAY	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI1_DELAY /;"	d
PPI1_FRAME	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI1_FRAME /;"	d
PPI1_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define PPI1_STATUS /;"	d
PPI_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PPI_CONTROL /;"	d
PPI_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PPI_CONTROL /;"	d
PPI_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PPI_CONTROL /;"	d
PPI_CONTROL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PPI_CONTROL /;"	d
PPI_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PPI_CONTROL /;"	d
PPI_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PPI_CONTROL /;"	d
PPI_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PPI_COUNT /;"	d
PPI_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PPI_COUNT /;"	d
PPI_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PPI_COUNT /;"	d
PPI_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PPI_COUNT /;"	d
PPI_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PPI_COUNT /;"	d
PPI_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PPI_COUNT /;"	d
PPI_DELAY	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PPI_DELAY /;"	d
PPI_DELAY	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PPI_DELAY /;"	d
PPI_DELAY	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PPI_DELAY /;"	d
PPI_DELAY	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PPI_DELAY /;"	d
PPI_DELAY	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PPI_DELAY /;"	d
PPI_DELAY	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PPI_DELAY /;"	d
PPI_FRAME	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PPI_FRAME /;"	d
PPI_FRAME	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PPI_FRAME /;"	d
PPI_FRAME	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PPI_FRAME /;"	d
PPI_FRAME	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PPI_FRAME /;"	d
PPI_FRAME	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PPI_FRAME /;"	d
PPI_FRAME	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PPI_FRAME /;"	d
PPI_PACK_EN	board/bf527-ezkit/video.c	/^#define PPI_PACK_EN	/;"	d	file:
PPI_POLS_1	board/bf527-ezkit/video.c	/^#define PPI_POLS_1	/;"	d	file:
PPI_PORT_CFG_01	board/bf527-ezkit/video.c	/^#define PPI_PORT_CFG_01	/;"	d	file:
PPI_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PPI_STATUS /;"	d
PPI_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PPI_STATUS /;"	d
PPI_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define PPI_STATUS /;"	d
PPI_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define PPI_STATUS /;"	d
PPI_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define PPI_STATUS /;"	d
PPI_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define PPI_STATUS /;"	d
PPI_TX_MODE	board/bf527-ezkit/video.c	/^#define PPI_TX_MODE	/;"	d	file:
PPI_XFER_TYPE_11	board/bf527-ezkit/video.c	/^#define PPI_XFER_TYPE_11	/;"	d	file:
PPLL_ATOMIC_UPDATE_EN	include/radeon.h	/^#define PPLL_ATOMIC_UPDATE_EN	/;"	d
PPLL_ATOMIC_UPDATE_R	include/radeon.h	/^#define PPLL_ATOMIC_UPDATE_R	/;"	d
PPLL_ATOMIC_UPDATE_W	include/radeon.h	/^#define PPLL_ATOMIC_UPDATE_W	/;"	d
PPLL_CNTL	include/radeon.h	/^#define PPLL_CNTL	/;"	d
PPLL_DIV_0	include/radeon.h	/^#define PPLL_DIV_0	/;"	d
PPLL_DIV_1	include/radeon.h	/^#define PPLL_DIV_1	/;"	d
PPLL_DIV_2	include/radeon.h	/^#define PPLL_DIV_2	/;"	d
PPLL_DIV_3	include/radeon.h	/^#define PPLL_DIV_3	/;"	d
PPLL_DIV_SEL_MASK	include/radeon.h	/^#define PPLL_DIV_SEL_MASK	/;"	d
PPLL_FB3_DIV_MASK	include/radeon.h	/^#define PPLL_FB3_DIV_MASK	/;"	d
PPLL_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PPLL_HZ	/;"	d
PPLL_POST3_DIV_MASK	include/radeon.h	/^#define PPLL_POST3_DIV_MASK	/;"	d
PPLL_REF_DIV	include/radeon.h	/^#define PPLL_REF_DIV	/;"	d
PPLL_REF_DIV_MASK	include/radeon.h	/^#define PPLL_REF_DIV_MASK	/;"	d
PPLL_RESET	include/radeon.h	/^#define PPLL_RESET	/;"	d
PPLL_SLEEP	include/radeon.h	/^#define PPLL_SLEEP	/;"	d
PPLL_VGA_ATOMIC_UPDATE_EN	include/radeon.h	/^#define PPLL_VGA_ATOMIC_UPDATE_EN	/;"	d
PPSB_STOPCLK_ENABLE	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define PPSB_STOPCLK_ENABLE	/;"	d
PPSB_STOPCLK_ENABLE	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define PPSB_STOPCLK_ENABLE	/;"	d
PPSR	include/SA-1100.h	/^#define PPSR	/;"	d
PPS_IN_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PPS_IN_BASE	/;"	d
PPS_OUT	drivers/pinctrl/pinctrl_pic32.c	/^#define PPS_OUT(/;"	d	file:
PPS_OUT_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PPS_OUT_BASE	/;"	d
PPUPR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	PPUPR1	/;"	d
PPUPR1_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PPUPR1_A:	.long	GPIO_BASE + 0x60$/;"	l
PPUPR1_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PPUPR1_D:	.word	0xffbf$/;"	l
PPUPR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	PPUPR2	/;"	d
PPUPR2_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PPUPR2_A:	.long	GPIO_BASE + 0x62$/;"	l
PPUPR2_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PPUPR2_D:	.word	0xff00$/;"	l
PPU_ENABLE	drivers/net/phy/mv88e6352.c	/^#define PPU_ENABLE	/;"	d	file:
PPU_STATE	drivers/net/phy/mv88e6352.c	/^#define PPU_STATE	/;"	d	file:
PP_BER	drivers/net/cs8900.h	/^#define PP_BER /;"	d
PP_BER_Rdy4Tx	drivers/net/cs8900.h	/^#define PP_BER_Rdy4Tx /;"	d
PP_BER_Rx128	drivers/net/cs8900.h	/^#define PP_BER_Rx128 /;"	d
PP_BER_RxDMAFrame	drivers/net/cs8900.h	/^#define PP_BER_RxDMAFrame /;"	d
PP_BER_RxDest	drivers/net/cs8900.h	/^#define PP_BER_RxDest /;"	d
PP_BER_RxMiss	drivers/net/cs8900.h	/^#define PP_BER_RxMiss /;"	d
PP_BER_SWint	drivers/net/cs8900.h	/^#define PP_BER_SWint /;"	d
PP_BER_TxUnderrun	drivers/net/cs8900.h	/^#define PP_BER_TxUnderrun /;"	d
PP_BufCFG	drivers/net/cs8900.h	/^#define PP_BufCFG /;"	d
PP_BufCFG_Miss	drivers/net/cs8900.h	/^#define PP_BufCFG_Miss /;"	d
PP_BufCFG_Rx128	drivers/net/cs8900.h	/^#define PP_BufCFG_Rx128 /;"	d
PP_BufCFG_RxDMA	drivers/net/cs8900.h	/^#define PP_BufCFG_RxDMA /;"	d
PP_BufCFG_RxDest	drivers/net/cs8900.h	/^#define PP_BufCFG_RxDest /;"	d
PP_BufCFG_RxMiss	drivers/net/cs8900.h	/^#define PP_BufCFG_RxMiss /;"	d
PP_BufCFG_SWI	drivers/net/cs8900.h	/^#define PP_BufCFG_SWI /;"	d
PP_BufCFG_TxCol	drivers/net/cs8900.h	/^#define PP_BufCFG_TxCol /;"	d
PP_BufCFG_TxRDY	drivers/net/cs8900.h	/^#define PP_BufCFG_TxRDY /;"	d
PP_BufCFG_TxUE	drivers/net/cs8900.h	/^#define PP_BufCFG_TxUE /;"	d
PP_BusCTL	drivers/net/cs8900.h	/^#define PP_BusCTL /;"	d
PP_BusCTL_DMAburst	drivers/net/cs8900.h	/^#define PP_BusCTL_DMAburst /;"	d
PP_BusCTL_DMAextend	drivers/net/cs8900.h	/^#define PP_BusCTL_DMAextend /;"	d
PP_BusCTL_EnableIRQ	drivers/net/cs8900.h	/^#define PP_BusCTL_EnableIRQ /;"	d
PP_BusCTL_IOCHRDYE	drivers/net/cs8900.h	/^#define PP_BusCTL_IOCHRDYE /;"	d
PP_BusCTL_MemoryE	drivers/net/cs8900.h	/^#define PP_BusCTL_MemoryE /;"	d
PP_BusCTL_ResetRxDMA	drivers/net/cs8900.h	/^#define PP_BusCTL_ResetRxDMA /;"	d
PP_BusCTL_RxDMAsize	drivers/net/cs8900.h	/^#define PP_BusCTL_RxDMAsize /;"	d
PP_BusCTL_UseSA	drivers/net/cs8900.h	/^#define PP_BusCTL_UseSA /;"	d
PP_BusSTAT	drivers/net/cs8900.h	/^#define PP_BusSTAT /;"	d
PP_BusSTAT_TxBid	drivers/net/cs8900.h	/^#define PP_BusSTAT_TxBid /;"	d
PP_BusSTAT_TxRDY	drivers/net/cs8900.h	/^#define PP_BusSTAT_TxRDY /;"	d
PP_ChipID	drivers/net/cs8900.h	/^#define PP_ChipID /;"	d
PP_ChipRev	drivers/net/cs8900.h	/^#define PP_ChipRev /;"	d
PP_EECMD	drivers/net/cs8900.h	/^#define PP_EECMD /;"	d
PP_EEData	drivers/net/cs8900.h	/^#define PP_EEData /;"	d
PP_IA	drivers/net/cs8900.h	/^#define PP_IA /;"	d
PP_ISQ	drivers/net/cs8900.h	/^#define PP_ISQ /;"	d
PP_IntReg	drivers/net/cs8900.h	/^#define PP_IntReg /;"	d
PP_IntReg_IRQ0	drivers/net/cs8900.h	/^#define PP_IntReg_IRQ0 /;"	d
PP_IntReg_IRQ1	drivers/net/cs8900.h	/^#define PP_IntReg_IRQ1 /;"	d
PP_IntReg_IRQ2	drivers/net/cs8900.h	/^#define PP_IntReg_IRQ2 /;"	d
PP_IntReg_IRQ3	drivers/net/cs8900.h	/^#define PP_IntReg_IRQ3 /;"	d
PP_LAF	drivers/net/cs8900.h	/^#define PP_LAF /;"	d
PP_LineCTL	drivers/net/cs8900.h	/^#define PP_LineCTL /;"	d
PP_LineCTL_2partDefDis	drivers/net/cs8900.h	/^#define PP_LineCTL_2partDefDis /;"	d
PP_LineCTL_AUIonly	drivers/net/cs8900.h	/^#define PP_LineCTL_AUIonly /;"	d
PP_LineCTL_AutoAUI10BT	drivers/net/cs8900.h	/^#define PP_LineCTL_AutoAUI10BT /;"	d
PP_LineCTL_LoRxSquelch	drivers/net/cs8900.h	/^#define PP_LineCTL_LoRxSquelch /;"	d
PP_LineCTL_ModBackoffE	drivers/net/cs8900.h	/^#define PP_LineCTL_ModBackoffE /;"	d
PP_LineCTL_PolarityDis	drivers/net/cs8900.h	/^#define PP_LineCTL_PolarityDis /;"	d
PP_LineCTL_Rx	drivers/net/cs8900.h	/^#define PP_LineCTL_Rx /;"	d
PP_LineCTL_Tx	drivers/net/cs8900.h	/^#define PP_LineCTL_Tx /;"	d
PP_LineSTAT	drivers/net/cs8900.h	/^#define PP_LineSTAT /;"	d
PP_LineSTAT_10BT	drivers/net/cs8900.h	/^#define PP_LineSTAT_10BT /;"	d
PP_LineSTAT_AUI	drivers/net/cs8900.h	/^#define PP_LineSTAT_AUI /;"	d
PP_LineSTAT_CRS	drivers/net/cs8900.h	/^#define PP_LineSTAT_CRS /;"	d
PP_LineSTAT_LinkOK	drivers/net/cs8900.h	/^#define PP_LineSTAT_LinkOK /;"	d
PP_LineSTAT_Polarity	drivers/net/cs8900.h	/^#define PP_LineSTAT_Polarity /;"	d
PP_REFERENCE_DIVIDER_MASK	drivers/video/i915_reg.h	/^#define  PP_REFERENCE_DIVIDER_MASK	/;"	d
PP_REFERENCE_DIVIDER_SHIFT	drivers/video/i915_reg.h	/^#define  PP_REFERENCE_DIVIDER_SHIFT	/;"	d
PP_RER	drivers/net/cs8900.h	/^#define PP_RER /;"	d
PP_RER_Broadcast	drivers/net/cs8900.h	/^#define PP_RER_Broadcast /;"	d
PP_RER_CRC	drivers/net/cs8900.h	/^#define PP_RER_CRC /;"	d
PP_RER_Dribble	drivers/net/cs8900.h	/^#define PP_RER_Dribble /;"	d
PP_RER_EXTRA	drivers/net/cs8900.h	/^#define PP_RER_EXTRA /;"	d
PP_RER_Hashed	drivers/net/cs8900.h	/^#define PP_RER_Hashed /;"	d
PP_RER_IA	drivers/net/cs8900.h	/^#define PP_RER_IA /;"	d
PP_RER_IAHash	drivers/net/cs8900.h	/^#define PP_RER_IAHash /;"	d
PP_RER_RUNT	drivers/net/cs8900.h	/^#define PP_RER_RUNT /;"	d
PP_RER_RxOK	drivers/net/cs8900.h	/^#define PP_RER_RxOK /;"	d
PP_RWRW	arch/powerpc/include/asm/mmu.h	/^#define PP_RWRW /;"	d
PP_RWRX	arch/powerpc/include/asm/mmu.h	/^#define PP_RWRX /;"	d
PP_RWXX	arch/powerpc/include/asm/mmu.h	/^#define PP_RWXX	/;"	d
PP_RXRX	arch/powerpc/include/asm/mmu.h	/^#define PP_RXRX /;"	d
PP_RxCFG	drivers/net/cs8900.h	/^#define PP_RxCFG /;"	d
PP_RxCFG_AutoRxDMA	drivers/net/cs8900.h	/^#define PP_RxCFG_AutoRxDMA /;"	d
PP_RxCFG_BufferCRC	drivers/net/cs8900.h	/^#define PP_RxCFG_BufferCRC /;"	d
PP_RxCFG_CRC	drivers/net/cs8900.h	/^#define PP_RxCFG_CRC /;"	d
PP_RxCFG_EXTRA	drivers/net/cs8900.h	/^#define PP_RxCFG_EXTRA /;"	d
PP_RxCFG_RUNT	drivers/net/cs8900.h	/^#define PP_RxCFG_RUNT /;"	d
PP_RxCFG_RxDMAonly	drivers/net/cs8900.h	/^#define PP_RxCFG_RxDMAonly /;"	d
PP_RxCFG_RxOK	drivers/net/cs8900.h	/^#define PP_RxCFG_RxOK /;"	d
PP_RxCFG_Skip1	drivers/net/cs8900.h	/^#define PP_RxCFG_Skip1 /;"	d
PP_RxCFG_Stream	drivers/net/cs8900.h	/^#define PP_RxCFG_Stream /;"	d
PP_RxCTL	drivers/net/cs8900.h	/^#define PP_RxCTL /;"	d
PP_RxCTL_Broadcast	drivers/net/cs8900.h	/^#define PP_RxCTL_Broadcast /;"	d
PP_RxCTL_CRC	drivers/net/cs8900.h	/^#define PP_RxCTL_CRC /;"	d
PP_RxCTL_EXTRA	drivers/net/cs8900.h	/^#define PP_RxCTL_EXTRA /;"	d
PP_RxCTL_IA	drivers/net/cs8900.h	/^#define PP_RxCTL_IA /;"	d
PP_RxCTL_IAHash	drivers/net/cs8900.h	/^#define PP_RxCTL_IAHash /;"	d
PP_RxCTL_Multicast	drivers/net/cs8900.h	/^#define PP_RxCTL_Multicast /;"	d
PP_RxCTL_Promiscuous	drivers/net/cs8900.h	/^#define PP_RxCTL_Promiscuous /;"	d
PP_RxCTL_RUNT	drivers/net/cs8900.h	/^#define PP_RxCTL_RUNT /;"	d
PP_RxCTL_RxOK	drivers/net/cs8900.h	/^#define PP_RxCTL_RxOK /;"	d
PP_RxMiss	drivers/net/cs8900.h	/^#define PP_RxMiss /;"	d
PP_SELECT_A	arch/arm/include/asm/arch-tegra/dc.h	/^	PP_SELECT_A,$/;"	e	enum:dc_disp_pp_select
PP_SELECT_B	arch/arm/include/asm/arch-tegra/dc.h	/^	PP_SELECT_B,$/;"	e	enum:dc_disp_pp_select
PP_SELECT_C	arch/arm/include/asm/arch-tegra/dc.h	/^	PP_SELECT_C,$/;"	e	enum:dc_disp_pp_select
PP_SELECT_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	PP_SELECT_COUNT,$/;"	e	enum:dc_disp_pp_select
PP_SELECT_D	arch/arm/include/asm/arch-tegra/dc.h	/^	PP_SELECT_D,$/;"	e	enum:dc_disp_pp_select
PP_SelfCTL	drivers/net/cs8900.h	/^#define PP_SelfCTL /;"	d
PP_SelfCTL_HC0E	drivers/net/cs8900.h	/^#define PP_SelfCTL_HC0E /;"	d
PP_SelfCTL_HC1E	drivers/net/cs8900.h	/^#define PP_SelfCTL_HC1E /;"	d
PP_SelfCTL_HCB0	drivers/net/cs8900.h	/^#define PP_SelfCTL_HCB0 /;"	d
PP_SelfCTL_HCB1	drivers/net/cs8900.h	/^#define PP_SelfCTL_HCB1 /;"	d
PP_SelfCTL_HWSleepE	drivers/net/cs8900.h	/^#define PP_SelfCTL_HWSleepE /;"	d
PP_SelfCTL_HWStandbyE	drivers/net/cs8900.h	/^#define PP_SelfCTL_HWStandbyE /;"	d
PP_SelfCTL_Reset	drivers/net/cs8900.h	/^#define PP_SelfCTL_Reset /;"	d
PP_SelfCTL_SWSuspend	drivers/net/cs8900.h	/^#define PP_SelfCTL_SWSuspend /;"	d
PP_SelfSTAT	drivers/net/cs8900.h	/^#define PP_SelfSTAT /;"	d
PP_SelfSTAT_33VActive	drivers/net/cs8900.h	/^#define PP_SelfSTAT_33VActive /;"	d
PP_SelfSTAT_EEPROM	drivers/net/cs8900.h	/^#define PP_SelfSTAT_EEPROM /;"	d
PP_SelfSTAT_EEPROM_OK	drivers/net/cs8900.h	/^#define PP_SelfSTAT_EEPROM_OK /;"	d
PP_SelfSTAT_EEsize	drivers/net/cs8900.h	/^#define PP_SelfSTAT_EEsize /;"	d
PP_SelfSTAT_ELPresent	drivers/net/cs8900.h	/^#define PP_SelfSTAT_ELPresent /;"	d
PP_SelfSTAT_InitD	drivers/net/cs8900.h	/^#define PP_SelfSTAT_InitD /;"	d
PP_SelfSTAT_SIBSY	drivers/net/cs8900.h	/^#define PP_SelfSTAT_SIBSY /;"	d
PP_TDR	drivers/net/cs8900.h	/^#define PP_TDR /;"	d
PP_TER	drivers/net/cs8900.h	/^#define PP_TER /;"	d
PP_TER_16Collisions	drivers/net/cs8900.h	/^#define PP_TER_16Collisions /;"	d
PP_TER_CRS	drivers/net/cs8900.h	/^#define PP_TER_CRS /;"	d
PP_TER_Jabber	drivers/net/cs8900.h	/^#define PP_TER_Jabber /;"	d
PP_TER_Late	drivers/net/cs8900.h	/^#define PP_TER_Late /;"	d
PP_TER_NumCollisions	drivers/net/cs8900.h	/^#define PP_TER_NumCollisions /;"	d
PP_TER_SQE	drivers/net/cs8900.h	/^#define PP_TER_SQE /;"	d
PP_TER_TxOK	drivers/net/cs8900.h	/^#define PP_TER_TxOK /;"	d
PP_TestCTL	drivers/net/cs8900.h	/^#define PP_TestCTL /;"	d
PP_TestCTL_AUIloop	drivers/net/cs8900.h	/^#define PP_TestCTL_AUIloop /;"	d
PP_TestCTL_DisBackoff	drivers/net/cs8900.h	/^#define PP_TestCTL_DisBackoff /;"	d
PP_TestCTL_DisableLT	drivers/net/cs8900.h	/^#define PP_TestCTL_DisableLT /;"	d
PP_TestCTL_ENDECloop	drivers/net/cs8900.h	/^#define PP_TestCTL_ENDECloop /;"	d
PP_TestCTL_FDX	drivers/net/cs8900.h	/^#define PP_TestCTL_FDX /;"	d
PP_TxCFG	drivers/net/cs8900.h	/^#define PP_TxCFG /;"	d
PP_TxCFG_16Collisions	drivers/net/cs8900.h	/^#define PP_TxCFG_16Collisions /;"	d
PP_TxCFG_CRS	drivers/net/cs8900.h	/^#define PP_TxCFG_CRS /;"	d
PP_TxCFG_Collision	drivers/net/cs8900.h	/^#define PP_TxCFG_Collision /;"	d
PP_TxCFG_Jabber	drivers/net/cs8900.h	/^#define PP_TxCFG_Jabber /;"	d
PP_TxCFG_Late	drivers/net/cs8900.h	/^#define PP_TxCFG_Late /;"	d
PP_TxCFG_SQE	drivers/net/cs8900.h	/^#define PP_TxCFG_SQE /;"	d
PP_TxCFG_TxOK	drivers/net/cs8900.h	/^#define PP_TxCFG_TxOK /;"	d
PP_TxCmd	drivers/net/cs8900.h	/^#define PP_TxCmd /;"	d
PP_TxCmd_Force	drivers/net/cs8900.h	/^#define PP_TxCmd_Force /;"	d
PP_TxCmd_NoCRC	drivers/net/cs8900.h	/^#define PP_TxCmd_NoCRC /;"	d
PP_TxCmd_NoPad	drivers/net/cs8900.h	/^#define PP_TxCmd_NoPad /;"	d
PP_TxCmd_OneCollision	drivers/net/cs8900.h	/^#define PP_TxCmd_OneCollision /;"	d
PP_TxCmd_TxStart_1021	drivers/net/cs8900.h	/^#define PP_TxCmd_TxStart_1021 /;"	d
PP_TxCmd_TxStart_381	drivers/net/cs8900.h	/^#define PP_TxCmd_TxStart_381 /;"	d
PP_TxCmd_TxStart_5	drivers/net/cs8900.h	/^#define PP_TxCmd_TxStart_5 /;"	d
PP_TxCmd_TxStart_Full	drivers/net/cs8900.h	/^#define PP_TxCmd_TxStart_Full /;"	d
PP_TxCol	drivers/net/cs8900.h	/^#define PP_TxCol /;"	d
PP_TxCommand	drivers/net/cs8900.h	/^#define PP_TxCommand /;"	d
PP_TxLength	drivers/net/cs8900.h	/^#define PP_TxLength /;"	d
PQCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PQCR /;"	d
PQCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PQCR /;"	d
PQCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PQCR /;"	d
PQCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PQCR_A:		.long	0xffec0020$/;"	l
PQCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PQCR_A:		.long	GPIO_BASE + 0x1c$/;"	l
PQCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PQCR_D	/;"	d	file:
PQCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PQCR_D:		.long	0xc000$/;"	l
PQDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PQDR /;"	d
PQDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PQDR /;"	d
PQDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PQDR /;"	d
PR	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PR	/;"	d
PR	drivers/video/tegra124/sor.h	/^#define PR(/;"	d
PRADV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PRADV_MASK	/;"	d
PRADV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PRADV_MASK	/;"	d
PRADV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PRADV_MASK	/;"	d
PRADV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PRADV_MASK	/;"	d
PRADV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PRADV_MASK	/;"	d
PRAM_MODE_GLOBAL	drivers/net/fm/fm.h	/^#define PRAM_MODE_GLOBAL	/;"	d
PRAM_MODE_GRACEFUL_STOP	drivers/net/fm/fm.h	/^#define PRAM_MODE_GRACEFUL_STOP	/;"	d
PRBDV_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define PRBDV_MASK	/;"	d
PRBDV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define PRBDV_MASK	/;"	d
PRBDV_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define PRBDV_MASK	/;"	d
PRBDV_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define PRBDV_MASK	/;"	d
PRBDV_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define PRBDV_MASK	/;"	d
PRBS7	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	PRBS7,$/;"	e	enum:pattern_set
PRBS7	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PRBS7,$/;"	e	enum:__anon79d8640c0b03
PRBTNOR_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  PRBTNOR_STS	/;"	d
PRBTNOR_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PRBTNOR_STS	/;"	d
PRB_CTRL_NIEN	drivers/block/sata_sil.h	/^	PRB_CTRL_NIEN		= (1 << 6), \/* Mask completion irq *\/$/;"	e	enum:__anone6fe50d30103
PRB_CTRL_PACKET_READ	drivers/block/sata_sil.h	/^	PRB_CTRL_PACKET_READ	= (1 << 4), \/* PACKET cmd read *\/$/;"	e	enum:__anone6fe50d30103
PRB_CTRL_PACKET_WRITE	drivers/block/sata_sil.h	/^	PRB_CTRL_PACKET_WRITE	= (1 << 5), \/* PACKET cmd write *\/$/;"	e	enum:__anone6fe50d30103
PRB_CTRL_PROTOCOL	drivers/block/sata_sil.h	/^	PRB_CTRL_PROTOCOL	= (1 << 0), \/* override def. ATA protocol *\/$/;"	e	enum:__anone6fe50d30103
PRB_CTRL_SRST	drivers/block/sata_sil.h	/^	PRB_CTRL_SRST		= (1 << 7), \/* Soft reset request (ign BSY?) *\/$/;"	e	enum:__anone6fe50d30103
PRB_PROT_NCQ	drivers/block/sata_sil.h	/^	PRB_PROT_NCQ		= (1 << 2),$/;"	e	enum:__anone6fe50d30103
PRB_PROT_PACKET	drivers/block/sata_sil.h	/^	PRB_PROT_PACKET		= (1 << 0),$/;"	e	enum:__anone6fe50d30103
PRB_PROT_READ	drivers/block/sata_sil.h	/^	PRB_PROT_READ		= (1 << 3),$/;"	e	enum:__anone6fe50d30103
PRB_PROT_TCQ	drivers/block/sata_sil.h	/^	PRB_PROT_TCQ		= (1 << 1),$/;"	e	enum:__anone6fe50d30103
PRB_PROT_TRANSPARENT	drivers/block/sata_sil.h	/^	PRB_PROT_TRANSPARENT	= (1 << 5),$/;"	e	enum:__anone6fe50d30103
PRB_PROT_WRITE	drivers/block/sata_sil.h	/^	PRB_PROT_WRITE		= (1 << 4),$/;"	e	enum:__anone6fe50d30103
PRCM_APB0_GATE_1WIRE	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_1WIRE /;"	d
PRCM_APB0_GATE_1WIRE	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_1WIRE /;"	d
PRCM_APB0_GATE_I2C	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_I2C /;"	d
PRCM_APB0_GATE_I2C	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_I2C /;"	d
PRCM_APB0_GATE_IR	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_IR /;"	d
PRCM_APB0_GATE_IR	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_IR /;"	d
PRCM_APB0_GATE_P2WI	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_P2WI /;"	d
PRCM_APB0_GATE_P2WI	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_P2WI /;"	d
PRCM_APB0_GATE_PIO	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_PIO /;"	d
PRCM_APB0_GATE_PIO	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_PIO /;"	d
PRCM_APB0_GATE_RSB	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_RSB /;"	d
PRCM_APB0_GATE_RSB	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_RSB /;"	d
PRCM_APB0_GATE_TIMER01	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_TIMER01 /;"	d
PRCM_APB0_GATE_TIMER01	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_TIMER01 /;"	d
PRCM_APB0_GATE_UART	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_GATE_UART /;"	d
PRCM_APB0_GATE_UART	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_GATE_UART /;"	d
PRCM_APB0_RATIO_DIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RATIO_DIV(/;"	d
PRCM_APB0_RATIO_DIV	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RATIO_DIV(/;"	d
PRCM_APB0_RATIO_DIV_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RATIO_DIV_MASK /;"	d
PRCM_APB0_RATIO_DIV_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RATIO_DIV_MASK /;"	d
PRCM_APB0_RESET_1WIRE	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_1WIRE /;"	d
PRCM_APB0_RESET_1WIRE	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_1WIRE /;"	d
PRCM_APB0_RESET_I2C	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_I2C /;"	d
PRCM_APB0_RESET_I2C	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_I2C /;"	d
PRCM_APB0_RESET_IR	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_IR /;"	d
PRCM_APB0_RESET_IR	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_IR /;"	d
PRCM_APB0_RESET_P2WI	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_P2WI /;"	d
PRCM_APB0_RESET_P2WI	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_P2WI /;"	d
PRCM_APB0_RESET_PIO	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_PIO /;"	d
PRCM_APB0_RESET_PIO	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_PIO /;"	d
PRCM_APB0_RESET_TIMER01	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_TIMER01 /;"	d
PRCM_APB0_RESET_TIMER01	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_TIMER01 /;"	d
PRCM_APB0_RESET_UART	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_APB0_RESET_UART /;"	d
PRCM_APB0_RESET_UART	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_APB0_RESET_UART /;"	d
PRCM_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define PRCM_BASE	/;"	d
PRCM_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRCM_BASE	/;"	d
PRCM_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define PRCM_BASE	/;"	d
PRCM_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define PRCM_BASE	/;"	d
PRCM_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PRCM_BASE	/;"	d
PRCM_CLK_1WIRE_GATE	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_1WIRE_GATE /;"	d
PRCM_CLK_1WIRE_GATE	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_1WIRE_GATE /;"	d
PRCM_CLK_MOD0_GATE_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_GATE_EN /;"	d
PRCM_CLK_MOD0_GATE_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_GATE_EN /;"	d
PRCM_CLK_MOD0_M	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_M(/;"	d
PRCM_CLK_MOD0_M	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_M(/;"	d
PRCM_CLK_MOD0_M_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_M_MASK /;"	d
PRCM_CLK_MOD0_M_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_M_MASK /;"	d
PRCM_CLK_MOD0_N	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_N(/;"	d
PRCM_CLK_MOD0_N	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_N(/;"	d
PRCM_CLK_MOD0_N_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_N_MASK /;"	d
PRCM_CLK_MOD0_N_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_N_MASK /;"	d
PRCM_CLK_MOD0_OUT_PHASE	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_OUT_PHASE(/;"	d
PRCM_CLK_MOD0_OUT_PHASE	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_OUT_PHASE(/;"	d
PRCM_CLK_MOD0_OUT_PHASE_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_OUT_PHASE_MASK(/;"	d
PRCM_CLK_MOD0_OUT_PHASE_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_OUT_PHASE_MASK(/;"	d
PRCM_CLK_MOD0_SMPL_PHASE	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_SMPL_PHASE(/;"	d
PRCM_CLK_MOD0_SMPL_PHASE	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_SMPL_PHASE(/;"	d
PRCM_CLK_MOD0_SMPL_PHASE_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_SMPL_PHASE_MASK /;"	d
PRCM_CLK_MOD0_SMPL_PHASE_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_SMPL_PHASE_MASK /;"	d
PRCM_CLK_MOD0_SRC_SEL	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_SRC_SEL(/;"	d
PRCM_CLK_MOD0_SRC_SEL	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_SRC_SEL(/;"	d
PRCM_CLK_MOD0_SRC_SEL_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_MOD0_SRC_SEL_MASK /;"	d
PRCM_CLK_MOD0_SRC_SEL_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_MOD0_SRC_SEL_MASK /;"	d
PRCM_CLK_OUTD_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_EN /;"	d
PRCM_CLK_OUTD_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_EN /;"	d
PRCM_CLK_OUTD_M	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_M(/;"	d
PRCM_CLK_OUTD_M	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_M(/;"	d
PRCM_CLK_OUTD_M_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_M_MASK /;"	d
PRCM_CLK_OUTD_M_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_M_MASK /;"	d
PRCM_CLK_OUTD_N	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_N(/;"	d
PRCM_CLK_OUTD_N	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_N(/;"	d
PRCM_CLK_OUTD_N_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_N_MASK /;"	d
PRCM_CLK_OUTD_N_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_N_MASK /;"	d
PRCM_CLK_OUTD_SRC_ERR	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_SRC_ERR /;"	d
PRCM_CLK_OUTD_SRC_ERR	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_SRC_ERR /;"	d
PRCM_CLK_OUTD_SRC_HOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_SRC_HOSC /;"	d
PRCM_CLK_OUTD_SRC_HOSC	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_SRC_HOSC /;"	d
PRCM_CLK_OUTD_SRC_LOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_SRC_LOSC /;"	d
PRCM_CLK_OUTD_SRC_LOSC	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_SRC_LOSC /;"	d
PRCM_CLK_OUTD_SRC_LOSC2	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_SRC_LOSC2 /;"	d
PRCM_CLK_OUTD_SRC_LOSC2	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_SRC_LOSC2 /;"	d
PRCM_CLK_OUTD_SRC_SEL_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CLK_OUTD_SRC_SEL_MASK /;"	d
PRCM_CLK_OUTD_SRC_SEL_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CLK_OUTD_SRC_SEL_MASK /;"	d
PRCM_CPU0_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU0_PWROFF /;"	d
PRCM_CPU0_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU0_PWROFF /;"	d
PRCM_CPU1_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU1_PWROFF /;"	d
PRCM_CPU1_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU1_PWROFF /;"	d
PRCM_CPU1_PWR_CLAMP	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU1_PWR_CLAMP(/;"	d
PRCM_CPU1_PWR_CLAMP	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU1_PWR_CLAMP(/;"	d
PRCM_CPU1_PWR_CLAMP_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU1_PWR_CLAMP_MASK /;"	d
PRCM_CPU1_PWR_CLAMP_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU1_PWR_CLAMP_MASK /;"	d
PRCM_CPU2_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU2_PWROFF /;"	d
PRCM_CPU2_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU2_PWROFF /;"	d
PRCM_CPU2_PWR_CLAMP	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU2_PWR_CLAMP(/;"	d
PRCM_CPU2_PWR_CLAMP	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU2_PWR_CLAMP(/;"	d
PRCM_CPU2_PWR_CLAMP_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU2_PWR_CLAMP_MASK /;"	d
PRCM_CPU2_PWR_CLAMP_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU2_PWR_CLAMP_MASK /;"	d
PRCM_CPU3_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU3_PWROFF /;"	d
PRCM_CPU3_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU3_PWROFF /;"	d
PRCM_CPU3_PWR_CLAMP	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU3_PWR_CLAMP(/;"	d
PRCM_CPU3_PWR_CLAMP	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU3_PWR_CLAMP(/;"	d
PRCM_CPU3_PWR_CLAMP_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU3_PWR_CLAMP_MASK /;"	d
PRCM_CPU3_PWR_CLAMP_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU3_PWR_CLAMP_MASK /;"	d
PRCM_CPUS_CFG_CLK_SRC_HOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_HOSC /;"	d
PRCM_CPUS_CFG_CLK_SRC_HOSC	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_HOSC /;"	d
PRCM_CPUS_CFG_CLK_SRC_LOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_LOSC /;"	d
PRCM_CPUS_CFG_CLK_SRC_LOSC	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_LOSC /;"	d
PRCM_CPUS_CFG_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_MASK /;"	d
PRCM_CPUS_CFG_CLK_SRC_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_MASK /;"	d
PRCM_CPUS_CFG_CLK_SRC_PDIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_PDIV /;"	d
PRCM_CPUS_CFG_CLK_SRC_PDIV	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_PDIV /;"	d
PRCM_CPUS_CFG_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_PLL6 /;"	d
PRCM_CPUS_CFG_CLK_SRC_PLL6	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_CLK_SRC_PLL6 /;"	d
PRCM_CPUS_CFG_POST_DIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_POST_DIV(/;"	d
PRCM_CPUS_CFG_POST_DIV	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_POST_DIV(/;"	d
PRCM_CPUS_CFG_POST_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_POST_MASK /;"	d
PRCM_CPUS_CFG_POST_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_POST_MASK /;"	d
PRCM_CPUS_CFG_PRE_DIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_PRE_DIV(/;"	d
PRCM_CPUS_CFG_PRE_DIV	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_PRE_DIV(/;"	d
PRCM_CPUS_CFG_PRE_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPUS_CFG_PRE_MASK /;"	d
PRCM_CPUS_CFG_PRE_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPUS_CFG_PRE_MASK /;"	d
PRCM_CPU_ALL_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU_ALL_PWROFF /;"	d
PRCM_CPU_ALL_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU_ALL_PWROFF /;"	d
PRCM_CPU_CFG_CPU_CLK_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU_CFG_CPU_CLK_EN /;"	d
PRCM_CPU_CFG_CPU_CLK_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU_CFG_CPU_CLK_EN /;"	d
PRCM_CPU_CFG_NEON_CLK_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_CPU_CFG_NEON_CLK_EN /;"	d
PRCM_CPU_CFG_NEON_CLK_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_CPU_CFG_NEON_CLK_EN /;"	d
PRCM_MOD_EN	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define PRCM_MOD_EN	/;"	d	file:
PRCM_MOD_EN	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^#define PRCM_MOD_EN /;"	d
PRCM_PLL_CTRL_CLK_TST_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_CLK_TST_EN /;"	d
PRCM_PLL_CTRL_CLK_TST_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_CLK_TST_EN /;"	d
PRCM_PLL_CTRL_EXT_OSC_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_EXT_OSC_EN /;"	d
PRCM_PLL_CTRL_EXT_OSC_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_EXT_OSC_EN /;"	d
PRCM_PLL_CTRL_HOSC_CLK_0	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_0 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_0	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_0 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_1	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_1 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_1	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_1 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_2	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_2 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_2	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_2 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_3	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_3 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_3	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_3 /;"	d
PRCM_PLL_CTRL_HOSC_CLK_SEL_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_SEL_MASK /;"	d
PRCM_PLL_CTRL_HOSC_CLK_SEL_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_CLK_SEL_MASK /;"	d
PRCM_PLL_CTRL_HOSC_GAIN_ENH	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_GAIN_ENH /;"	d
PRCM_PLL_CTRL_HOSC_GAIN_ENH	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_HOSC_GAIN_ENH /;"	d
PRCM_PLL_CTRL_INT_PLL_IN_SEL	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_INT_PLL_IN_SEL(/;"	d
PRCM_PLL_CTRL_INT_PLL_IN_SEL	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_INT_PLL_IN_SEL(/;"	d
PRCM_PLL_CTRL_INT_PLL_IN_SEL_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_INT_PLL_IN_SEL_MASK /;"	d
PRCM_PLL_CTRL_INT_PLL_IN_SEL_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_INT_PLL_IN_SEL_MASK /;"	d
PRCM_PLL_CTRL_IN_PWR_HIGH	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_IN_PWR_HIGH /;"	d
PRCM_PLL_CTRL_IN_PWR_HIGH	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_IN_PWR_HIGH /;"	d
PRCM_PLL_CTRL_LDO_ANALOG_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_ANALOG_EN /;"	d
PRCM_PLL_CTRL_LDO_ANALOG_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_ANALOG_EN /;"	d
PRCM_PLL_CTRL_LDO_DIGITAL_EN	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_DIGITAL_EN /;"	d
PRCM_PLL_CTRL_LDO_DIGITAL_EN	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_DIGITAL_EN /;"	d
PRCM_PLL_CTRL_LDO_KEY	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_KEY /;"	d
PRCM_PLL_CTRL_LDO_KEY	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_KEY /;"	d
PRCM_PLL_CTRL_LDO_KEY_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_KEY_MASK /;"	d
PRCM_PLL_CTRL_LDO_KEY_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_KEY_MASK /;"	d
PRCM_PLL_CTRL_LDO_OUT_H	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_H(/;"	d
PRCM_PLL_CTRL_LDO_OUT_H	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_H(/;"	d
PRCM_PLL_CTRL_LDO_OUT_HV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_HV(/;"	d
PRCM_PLL_CTRL_LDO_OUT_HV	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_HV(/;"	d
PRCM_PLL_CTRL_LDO_OUT_L	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_L(/;"	d
PRCM_PLL_CTRL_LDO_OUT_L	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_L(/;"	d
PRCM_PLL_CTRL_LDO_OUT_LV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_LV(/;"	d
PRCM_PLL_CTRL_LDO_OUT_LV	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_LV(/;"	d
PRCM_PLL_CTRL_LDO_OUT_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_MASK /;"	d
PRCM_PLL_CTRL_LDO_OUT_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_LDO_OUT_MASK /;"	d
PRCM_PLL_CTRL_PLL_BIAS	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_PLL_BIAS /;"	d
PRCM_PLL_CTRL_PLL_BIAS	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_PLL_BIAS /;"	d
PRCM_PLL_CTRL_PLL_TST_SRC_EXT	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_PLL_TST_SRC_EXT /;"	d
PRCM_PLL_CTRL_PLL_TST_SRC_EXT	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_PLL_TST_SRC_EXT /;"	d
PRCM_PLL_CTRL_USB_CLK_0	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_0 /;"	d
PRCM_PLL_CTRL_USB_CLK_0	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_0 /;"	d
PRCM_PLL_CTRL_USB_CLK_1	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_1 /;"	d
PRCM_PLL_CTRL_USB_CLK_1	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_1 /;"	d
PRCM_PLL_CTRL_USB_CLK_2	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_2 /;"	d
PRCM_PLL_CTRL_USB_CLK_2	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_2 /;"	d
PRCM_PLL_CTRL_USB_CLK_3	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_3 /;"	d
PRCM_PLL_CTRL_USB_CLK_3	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_3 /;"	d
PRCM_PLL_CTRL_USB_CLK_SRC_MASK	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_SRC_MASK /;"	d
PRCM_PLL_CTRL_USB_CLK_SRC_MASK	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_PLL_CTRL_USB_CLK_SRC_MASK /;"	d
PRCM_VDD_GPU_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_VDD_GPU_PWROFF /;"	d
PRCM_VDD_GPU_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_VDD_GPU_PWROFF /;"	d
PRCM_VDD_SYS_AVCC_A_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_VDD_SYS_AVCC_A_PWROFF /;"	d
PRCM_VDD_SYS_AVCC_A_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_VDD_SYS_AVCC_A_PWROFF /;"	d
PRCM_VDD_SYS_CPU0_VDD_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_VDD_SYS_CPU0_VDD_PWROFF /;"	d
PRCM_VDD_SYS_CPU0_VDD_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_VDD_SYS_CPU0_VDD_PWROFF /;"	d
PRCM_VDD_SYS_DRAM_CH0_PAD_HOLD_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_VDD_SYS_DRAM_CH0_PAD_HOLD_PWROFF /;"	d
PRCM_VDD_SYS_DRAM_CH0_PAD_HOLD_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_VDD_SYS_DRAM_CH0_PAD_HOLD_PWROFF /;"	d
PRCM_VDD_SYS_DRAM_CH1_PAD_HOLD_PWROFF	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_VDD_SYS_DRAM_CH1_PAD_HOLD_PWROFF /;"	d
PRCM_VDD_SYS_DRAM_CH1_PAD_HOLD_PWROFF	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_VDD_SYS_DRAM_CH1_PAD_HOLD_PWROFF /;"	d
PRCM_VDD_SYS_RESET	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define PRCM_VDD_SYS_RESET /;"	d
PRCM_VDD_SYS_RESET	arch/arm/include/asm/arch/prcm.h	/^#define PRCM_VDD_SYS_RESET /;"	d
PRCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PRCR	/;"	d
PRCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PRCR /;"	d
PRCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PRCR /;"	d
PRCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PRCR /;"	d
PRCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PRCR_A:		.long	0xffec0022$/;"	l
PRCR_A	board/renesas/sh7785lcr/lowlevel_init.S	/^PRCR_A:		.long	GPIO_BASE + 0x1e$/;"	l
PRCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PRCR_D	/;"	d	file:
PRCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PRCR_D:		.long	0x0000$/;"	l
PRDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PRDR	/;"	d
PRDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PRDR /;"	d
PRDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PRDR /;"	d
PRDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PRDR /;"	d
PRD_ENTRY_DATA_SNOOP	drivers/block/fsl_sata.h	/^#define PRD_ENTRY_DATA_SNOOP	/;"	d
PRD_ENTRY_DBA_ALIGN	drivers/block/fsl_sata.h	/^#define PRD_ENTRY_DBA_ALIGN	/;"	d
PRD_ENTRY_EXT	drivers/block/fsl_sata.h	/^#define PRD_ENTRY_EXT	/;"	d
PRD_ENTRY_LEN_MASK	drivers/block/fsl_sata.h	/^#define PRD_ENTRY_LEN_MASK	/;"	d
PRD_ENTRY_MAX_XFER_SZ	drivers/block/fsl_sata.h	/^#define PRD_ENTRY_MAX_XFER_SZ	/;"	d
PREAMBLE_DLY	drivers/ddr/microchip/ddr2_regs.h	/^#define PREAMBLE_DLY(/;"	d
PREA_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	PREA_CMD,$/;"	e	enum:__anon114585520103
PREA_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	PREA_CMD,$/;"	e	enum:__anon957231910203	file:
PRECEDENCE	tools/buildman/kconfiglib.py	/^PRECEDENCE = {OR: 0, AND: 1, NOT: 2}$/;"	v
PRECHCONFIG	arch/arm/mach-exynos/exynos4_setup.h	/^#define PRECHCONFIG	/;"	d
PRECHCONFIG_DEFAULT_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PRECHCONFIG_DEFAULT_VAL	/;"	d
PRECHCONFIG_TP_CNT_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PRECHCONFIG_TP_CNT_SHIFT	/;"	d
PRECH_ALL_CMD	drivers/ddr/microchip/ddr2_regs.h	/^#define PRECH_ALL_CMD	/;"	d
PRECH_PWR_DN_ONLY	drivers/ddr/microchip/ddr2_regs.h	/^#define PRECH_PWR_DN_ONLY(/;"	d
PRECON	arch/mips/mach-pic32/cpu.c	/^#define PRECON /;"	d	file:
PREDICATE_ALWAYS	arch/arm/include/asm/ptrace.h	/^#define PREDICATE_ALWAYS	/;"	d
PREEMPHASIS_DISABLED	drivers/video/tegra124/displayport.h	/^	PREEMPHASIS_DISABLED = 0,$/;"	e	enum:__anon91ae56030203
PREEMPHASIS_LEVEL1	drivers/video/tegra124/displayport.h	/^	PREEMPHASIS_LEVEL1   = 1,$/;"	e	enum:__anon91ae56030203
PREEMPHASIS_LEVEL2	drivers/video/tegra124/displayport.h	/^	PREEMPHASIS_LEVEL2   = 2,$/;"	e	enum:__anon91ae56030203
PREEMPHASIS_LEVEL3	drivers/video/tegra124/displayport.h	/^	PREEMPHASIS_LEVEL3   = 3,$/;"	e	enum:__anon91ae56030203
PREF	arch/mips/include/asm/asm.h	/^#define PREF(/;"	d
PREFE	arch/mips/include/asm/asm.h	/^#define PREFE(/;"	d
PREFETCH_BASE	arch/mips/mach-pic32/include/mach/pic32.h	/^#define PREFETCH_BASE	/;"	d
PREFETCH_BLOCKS	include/fat.h	/^#define PREFETCH_BLOCKS	/;"	d
PREFETCH_CONFIG1_CS_SHIFT	drivers/mtd/nand/omap_gpmc.c	/^#define PREFETCH_CONFIG1_CS_SHIFT	/;"	d	file:
PREFETCH_FIFOTHRESHOLD	drivers/mtd/nand/omap_gpmc.c	/^#define PREFETCH_FIFOTHRESHOLD(/;"	d	file:
PREFETCH_FIFOTHRESHOLD_MAX	drivers/mtd/nand/omap_gpmc.c	/^#define PREFETCH_FIFOTHRESHOLD_MAX	/;"	d	file:
PREFETCH_MODE	drivers/mtd/nand/denali.h	/^#define PREFETCH_MODE	/;"	d
PREFETCH_MODE__PREFETCH_BURST_LENGTH	drivers/mtd/nand/denali.h	/^#define     PREFETCH_MODE__PREFETCH_BURST_LENGTH	/;"	d
PREFETCH_MODE__PREFETCH_EN	drivers/mtd/nand/denali.h	/^#define     PREFETCH_MODE__PREFETCH_EN	/;"	d
PREFETCH_NLNSZTR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define PREFETCH_NLNSZTR	/;"	d
PREFETCH_N_LN_SZ_TR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define PREFETCH_N_LN_SZ_TR	/;"	d
PREFETCH_STATUS_COUNT	drivers/mtd/nand/omap_gpmc.c	/^#define PREFETCH_STATUS_COUNT(/;"	d	file:
PREFETCH_STATUS_FIFO_CNT	drivers/mtd/nand/omap_gpmc.c	/^#define PREFETCH_STATUS_FIFO_CNT(/;"	d	file:
PREFIX	drivers/tpm/tpm_tis_lpc.c	/^#define PREFIX /;"	d	file:
PREFX	arch/mips/include/asm/asm.h	/^#define PREFX(/;"	d
PREN	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define PREN	/;"	d
PRER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PRER	/;"	d
PRESCAL3	include/linux/mtd/st_smi.h	/^#define PRESCAL3	/;"	d
PRESCAL4	include/linux/mtd/st_smi.h	/^#define PRESCAL4	/;"	d
PRESCAL5	include/linux/mtd/st_smi.h	/^#define PRESCAL5	/;"	d
PRESCALA	include/linux/mtd/st_smi.h	/^#define PRESCALA	/;"	d
PRESCALE	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	PRESCALE	/;"	d
PRESCALER	arch/arm/mach-uniphier/arm32/timer.c	/^#define PRESCALER /;"	d	file:
PRESCALER_0	arch/arm/mach-exynos/include/mach/pwm.h	/^#define PRESCALER_0	/;"	d
PRESCALER_0	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define PRESCALER_0	/;"	d
PRESCALER_1	arch/arm/mach-exynos/include/mach/pwm.h	/^#define PRESCALER_1	/;"	d
PRESCALER_1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define PRESCALER_1	/;"	d
PRESCALER_VAL	drivers/watchdog/s5p_wdt.c	/^#define PRESCALER_VAL /;"	d	file:
PRESENCE	cmd/tpm_test.c	/^#define PRESENCE	/;"	d	file:
PRESET_DICT	lib/zlib/zutil.h	/^#define PRESET_DICT /;"	d
PREV_INUSE	common/dlmalloc.c	/^#define PREV_INUSE /;"	d	file:
PREV_PROD_REV_MASK	drivers/misc/fsl_iim.c	/^#define PREV_PROD_REV_MASK	/;"	d	file:
PREV_PROD_VT_MASK	drivers/misc/fsl_iim.c	/^#define PREV_PROD_VT_MASK	/;"	d	file:
PRE_CONSOLE_BUFFER	board/sunxi/Kconfig	/^config PRE_CONSOLE_BUFFER$/;"	c
PRE_CONSOLE_BUFFER	common/Kconfig	/^config PRE_CONSOLE_BUFFER$/;"	c	menu:Console
PRE_CONSOLE_FLUSHPOINT1_SERIAL	common/console.c	/^#define PRE_CONSOLE_FLUSHPOINT1_SERIAL	/;"	d	file:
PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL	common/console.c	/^#define PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL	/;"	d	file:
PRE_CON_BUF_ADDR	common/Kconfig	/^config PRE_CON_BUF_ADDR$/;"	c	menu:Console
PRE_CON_BUF_SZ	common/Kconfig	/^config PRE_CON_BUF_SZ$/;"	c	menu:Console
PRE_DRIVER_PW_CTRL1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PRE_DRIVER_PW_CTRL1	/;"	d
PRE_EMPHASIS_LEVEL_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	PRE_EMPHASIS_LEVEL_0,$/;"	e	enum:pre_emphasis_level
PRE_EMPHASIS_LEVEL_0	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PRE_EMPHASIS_LEVEL_0,$/;"	e	enum:__anon79d8640c0a03
PRE_EMPHASIS_LEVEL_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	PRE_EMPHASIS_LEVEL_1,$/;"	e	enum:pre_emphasis_level
PRE_EMPHASIS_LEVEL_1	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PRE_EMPHASIS_LEVEL_1,$/;"	e	enum:__anon79d8640c0a03
PRE_EMPHASIS_LEVEL_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	PRE_EMPHASIS_LEVEL_2,$/;"	e	enum:pre_emphasis_level
PRE_EMPHASIS_LEVEL_2	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PRE_EMPHASIS_LEVEL_2,$/;"	e	enum:__anon79d8640c0a03
PRE_EMPHASIS_LEVEL_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	PRE_EMPHASIS_LEVEL_3,$/;"	e	enum:pre_emphasis_level
PRE_EMPHASIS_LEVEL_3	arch/arm/mach-exynos/include/mach/dp_info.h	/^	PRE_EMPHASIS_LEVEL_3,$/;"	e	enum:__anon79d8640c0a03
PRE_EMPHASIS_SET_0_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_GET(/;"	d
PRE_EMPHASIS_SET_0_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_LEVEL_0	/;"	d
PRE_EMPHASIS_SET_0_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_LEVEL_1	/;"	d
PRE_EMPHASIS_SET_0_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_LEVEL_2	/;"	d
PRE_EMPHASIS_SET_0_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_LEVEL_3	/;"	d
PRE_EMPHASIS_SET_0_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_MASK	/;"	d
PRE_EMPHASIS_SET_0_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_SET(/;"	d
PRE_EMPHASIS_SET_0_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_0_SHIFT	/;"	d
PRE_EMPHASIS_SET_1_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_GET(/;"	d
PRE_EMPHASIS_SET_1_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_LEVEL_0	/;"	d
PRE_EMPHASIS_SET_1_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_LEVEL_1	/;"	d
PRE_EMPHASIS_SET_1_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_LEVEL_2	/;"	d
PRE_EMPHASIS_SET_1_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_LEVEL_3	/;"	d
PRE_EMPHASIS_SET_1_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_MASK	/;"	d
PRE_EMPHASIS_SET_1_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_SET(/;"	d
PRE_EMPHASIS_SET_1_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_1_SHIFT	/;"	d
PRE_EMPHASIS_SET_2_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_GET(/;"	d
PRE_EMPHASIS_SET_2_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_LEVEL_0	/;"	d
PRE_EMPHASIS_SET_2_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_LEVEL_1	/;"	d
PRE_EMPHASIS_SET_2_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_LEVEL_2	/;"	d
PRE_EMPHASIS_SET_2_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_LEVEL_3	/;"	d
PRE_EMPHASIS_SET_2_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_MASK	/;"	d
PRE_EMPHASIS_SET_2_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_SET(/;"	d
PRE_EMPHASIS_SET_2_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_2_SHIFT	/;"	d
PRE_EMPHASIS_SET_3_GET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_GET(/;"	d
PRE_EMPHASIS_SET_3_LEVEL_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_LEVEL_0	/;"	d
PRE_EMPHASIS_SET_3_LEVEL_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_LEVEL_1	/;"	d
PRE_EMPHASIS_SET_3_LEVEL_2	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_LEVEL_2	/;"	d
PRE_EMPHASIS_SET_3_LEVEL_3	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_LEVEL_3	/;"	d
PRE_EMPHASIS_SET_3_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_MASK	/;"	d
PRE_EMPHASIS_SET_3_SET	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_SET(/;"	d
PRE_EMPHASIS_SET_3_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define PRE_EMPHASIS_SET_3_SHIFT	/;"	d
PRE_FETCH_MODE	drivers/mtd/nand/denali.h	/^#define PRE_FETCH_MODE /;"	d
PRE_MAPPED	drivers/usb/musb-new/musb_gadget.h	/^	PRE_MAPPED,$/;"	e	enum:buffer_map_state
PRG_I2C2_PULLUPRESX	arch/arm/include/asm/arch-omap3/omap.h	/^#define PRG_I2C2_PULLUPRESX	/;"	d
PRID_COMP_LEGACY	board/micronas/vct/vct.h	/^#define PRID_COMP_LEGACY	/;"	d
PRID_COMP_MIPS	board/micronas/vct/vct.h	/^#define PRID_COMP_MIPS	/;"	d
PRID_IMP_LX4280	board/micronas/vct/vct.h	/^#define PRID_IMP_LX4280	/;"	d
PRID_IMP_VGC	board/micronas/vct/vct.h	/^#define PRID_IMP_VGC	/;"	d
PRIMAD_CPUDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PRIMAD_CPUDV_MASK	/;"	d
PRIMAD_EBCDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PRIMAD_EBCDV_MASK	/;"	d
PRIMAD_OPBDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PRIMAD_OPBDV_MASK	/;"	d
PRIMAD_PLBDV_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define PRIMAD_PLBDV_MASK	/;"	d
PRIM_OPS_NO_REDEFINE_ASM	drivers/bios_emulator/x86emu/prim_ops.c	/^#define PRIM_OPS_NO_REDEFINE_ASM$/;"	d	file:
PRINT	arch/mips/include/asm/asm.h	/^#define PRINT(/;"	d
PRINTARGS	board/siemens/draco/board.h	/^#define PRINTARGS(/;"	d
PRINTD	drivers/i2c/soft_i2c.c	/^#define PRINTD(/;"	d	file:
PRINTD	drivers/spi/soft_spi_legacy.c	/^#define PRINTD(/;"	d	file:
PRINTD	scripts/kconfig/zconf.tab.c	/^#define PRINTD	/;"	d	file:
PRINTF	board/mpl/common/isa.c	/^#define	PRINTF(/;"	d	file:
PRINTF	board/mpl/common/isa.c	/^#define PRINTF(/;"	d	file:
PRINTF	board/mpl/common/kbd.c	/^#define	PRINTF(/;"	d	file:
PRINTF	board/mpl/common/kbd.c	/^#define PRINTF(/;"	d	file:
PRINTF	cmd/fdc.c	/^#define	PRINTF(/;"	d	file:
PRINTF	cmd/fdc.c	/^#define PRINTF(/;"	d	file:
PRINTF	cmd/reiser.c	/^#define	PRINTF(/;"	d	file:
PRINTF	cmd/reiser.c	/^#define PRINTF(/;"	d	file:
PRINTF	cmd/yaffs2.c	/^#define PRINTF(/;"	d	file:
PRINTF	disk/part.c	/^#define	PRINTF(/;"	d	file:
PRINTF	disk/part.c	/^#define PRINTF(/;"	d	file:
PRINTF	disk/part_amiga.c	/^#define PRINTF(/;"	d	file:
PRINTF	disk/part_iso.c	/^#define	PRINTF(/;"	d	file:
PRINTF	disk/part_iso.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/block/sym53c8xx.c	/^#define	PRINTF(/;"	d	file:
PRINTF	drivers/block/sym53c8xx.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/fpga/ACEX1K.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/fpga/cyclon2.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/fpga/spartan2.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/fpga/spartan3.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/fpga/virtex2.c	/^#define	PRINTF(/;"	d	file:
PRINTF	drivers/fpga/virtex2.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/input/pc_keyb.c	/^#define	PRINTF(/;"	d	file:
PRINTF	drivers/input/pc_keyb.c	/^#define PRINTF(/;"	d	file:
PRINTF	drivers/input/ps2mult.c	/^#define PRINTF(/;"	d	file:
PRINTF_FORMAT	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^#define PRINTF_FORMAT /;"	d	file:
PRINTF_FORMAT	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^#define PRINTF_FORMAT /;"	d	file:
PRINTF_KEYB	drivers/input/ps2mult.c	/^#define PRINTF_KEYB(/;"	d	file:
PRINTF_MULT	drivers/input/ps2mult.c	/^#define PRINTF_MULT(/;"	d	file:
PRINTK	drivers/net/lan91c96.c	/^#define PRINTK(/;"	d	file:
PRINTK	drivers/net/ne2000_base.h	/^#define PRINTK(/;"	d
PRINTK	drivers/net/smc91111.c	/^#define PRINTK(/;"	d	file:
PRINTK2	drivers/net/lan91c96.c	/^#define PRINTK2(/;"	d	file:
PRINTK2	drivers/net/smc91111.c	/^#define PRINTK2(/;"	d	file:
PRINTK3	drivers/net/lan91c96.c	/^#define PRINTK3(/;"	d	file:
PRINTK3	drivers/net/smc91111.c	/^#define PRINTK3(/;"	d	file:
PRINT_DCR	arch/powerpc/cpu/ppc4xx/reginfo.c	/^#define PRINT_DCR(/;"	d	file:
PRINT_FIELD_SEGMENT	include/eeprom_field.h	/^#define PRINT_FIELD_SEGMENT	/;"	d
PRINT_KERNEL_HEADER	arch/sparc/lib/bootm.c	/^#define PRINT_KERNEL_HEADER$/;"	d	file:
PRINT_NNXXS	drivers/ddr/fsl/interactive.c	/^#define PRINT_NNXXS(/;"	d	file:
PRINT_NXS	drivers/ddr/fsl/interactive.c	/^#define PRINT_NXS(/;"	d	file:
PRINT_POS	drivers/crypto/fsl/desc_constr.h	/^#define PRINT_POS /;"	d
PRINT_POS	drivers/crypto/fsl/desc_constr.h	/^#define PRINT_POS$/;"	d
PRIORITY_HLD	include/MCD_dma.h	/^#define PRIORITY_HLD	/;"	d
PRIORITY_PRI_MASK	include/MCD_dma.h	/^#define PRIORITY_PRI_MASK	/;"	d
PRIORXTX_11	drivers/net/designware.h	/^#define PRIORXTX_11	/;"	d
PRIORXTX_21	drivers/net/designware.h	/^#define PRIORXTX_21	/;"	d
PRIORXTX_31	drivers/net/designware.h	/^#define PRIORXTX_31	/;"	d
PRIORXTX_41	drivers/net/designware.h	/^#define PRIORXTX_41	/;"	d
PRIVATE_TIMERS_WD_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PRIVATE_TIMERS_WD_BASE_ADDR /;"	d
PRIVATE_TIMERS_WD_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PRIVATE_TIMERS_WD_BASE_ADDR /;"	d
PRIVATE_VLAN_LEARNING	drivers/net/vsc9953.c	/^	PRIVATE_VLAN_LEARNING,$/;"	e	enum:vlan_learning_mode	file:
PRIX16	include/inttypes.h	/^# define PRIX16	/;"	d
PRIX32	include/inttypes.h	/^# define PRIX32	/;"	d
PRIX64	include/inttypes.h	/^# define PRIX64	/;"	d
PRIX8	include/inttypes.h	/^# define PRIX8	/;"	d
PRIXFAST16	include/inttypes.h	/^# define PRIXFAST16	/;"	d
PRIXFAST32	include/inttypes.h	/^# define PRIXFAST32	/;"	d
PRIXFAST64	include/inttypes.h	/^# define PRIXFAST64	/;"	d
PRIXFAST8	include/inttypes.h	/^# define PRIXFAST8	/;"	d
PRIXLEAST16	include/inttypes.h	/^# define PRIXLEAST16	/;"	d
PRIXLEAST32	include/inttypes.h	/^# define PRIXLEAST32	/;"	d
PRIXLEAST64	include/inttypes.h	/^# define PRIXLEAST64	/;"	d
PRIXLEAST8	include/inttypes.h	/^# define PRIXLEAST8	/;"	d
PRIXMAX	include/inttypes.h	/^# define PRIXMAX	/;"	d
PRIXPTR	include/inttypes.h	/^# define PRIXPTR	/;"	d
PRId16	include/inttypes.h	/^# define PRId16	/;"	d
PRId32	include/inttypes.h	/^# define PRId32	/;"	d
PRId64	include/inttypes.h	/^# define PRId64	/;"	d
PRId8	include/inttypes.h	/^# define PRId8	/;"	d
PRIdFAST16	include/inttypes.h	/^# define PRIdFAST16	/;"	d
PRIdFAST32	include/inttypes.h	/^# define PRIdFAST32	/;"	d
PRIdFAST64	include/inttypes.h	/^# define PRIdFAST64	/;"	d
PRIdFAST8	include/inttypes.h	/^# define PRIdFAST8	/;"	d
PRIdLEAST16	include/inttypes.h	/^# define PRIdLEAST16	/;"	d
PRIdLEAST32	include/inttypes.h	/^# define PRIdLEAST32	/;"	d
PRIdLEAST64	include/inttypes.h	/^# define PRIdLEAST64	/;"	d
PRIdLEAST8	include/inttypes.h	/^# define PRIdLEAST8	/;"	d
PRIdMAX	include/inttypes.h	/^# define PRIdMAX	/;"	d
PRIdPTR	include/inttypes.h	/^# define PRIdPTR	/;"	d
PRIi16	include/inttypes.h	/^# define PRIi16	/;"	d
PRIi32	include/inttypes.h	/^# define PRIi32	/;"	d
PRIi64	include/inttypes.h	/^# define PRIi64	/;"	d
PRIi8	include/inttypes.h	/^# define PRIi8	/;"	d
PRIiFAST16	include/inttypes.h	/^# define PRIiFAST16	/;"	d
PRIiFAST32	include/inttypes.h	/^# define PRIiFAST32	/;"	d
PRIiFAST64	include/inttypes.h	/^# define PRIiFAST64	/;"	d
PRIiFAST8	include/inttypes.h	/^# define PRIiFAST8	/;"	d
PRIiLEAST16	include/inttypes.h	/^# define PRIiLEAST16	/;"	d
PRIiLEAST32	include/inttypes.h	/^# define PRIiLEAST32	/;"	d
PRIiLEAST64	include/inttypes.h	/^# define PRIiLEAST64	/;"	d
PRIiLEAST8	include/inttypes.h	/^# define PRIiLEAST8	/;"	d
PRIiMAX	include/inttypes.h	/^# define PRIiMAX	/;"	d
PRIiPTR	include/inttypes.h	/^# define PRIiPTR	/;"	d
PRIo16	include/inttypes.h	/^# define PRIo16	/;"	d
PRIo32	include/inttypes.h	/^# define PRIo32	/;"	d
PRIo64	include/inttypes.h	/^# define PRIo64	/;"	d
PRIo8	include/inttypes.h	/^# define PRIo8	/;"	d
PRIoFAST16	include/inttypes.h	/^# define PRIoFAST16	/;"	d
PRIoFAST32	include/inttypes.h	/^# define PRIoFAST32	/;"	d
PRIoFAST64	include/inttypes.h	/^# define PRIoFAST64	/;"	d
PRIoFAST8	include/inttypes.h	/^# define PRIoFAST8	/;"	d
PRIoLEAST16	include/inttypes.h	/^# define PRIoLEAST16	/;"	d
PRIoLEAST32	include/inttypes.h	/^# define PRIoLEAST32	/;"	d
PRIoLEAST64	include/inttypes.h	/^# define PRIoLEAST64	/;"	d
PRIoLEAST8	include/inttypes.h	/^# define PRIoLEAST8	/;"	d
PRIoMAX	include/inttypes.h	/^# define PRIoMAX	/;"	d
PRIoPTR	include/inttypes.h	/^# define PRIoPTR	/;"	d
PRIu16	include/inttypes.h	/^# define PRIu16	/;"	d
PRIu32	include/inttypes.h	/^# define PRIu32	/;"	d
PRIu64	include/inttypes.h	/^# define PRIu64	/;"	d
PRIu8	include/inttypes.h	/^# define PRIu8	/;"	d
PRIuFAST16	include/inttypes.h	/^# define PRIuFAST16	/;"	d
PRIuFAST32	include/inttypes.h	/^# define PRIuFAST32	/;"	d
PRIuFAST64	include/inttypes.h	/^# define PRIuFAST64	/;"	d
PRIuFAST8	include/inttypes.h	/^# define PRIuFAST8	/;"	d
PRIuLEAST16	include/inttypes.h	/^# define PRIuLEAST16	/;"	d
PRIuLEAST32	include/inttypes.h	/^# define PRIuLEAST32	/;"	d
PRIuLEAST64	include/inttypes.h	/^# define PRIuLEAST64	/;"	d
PRIuLEAST8	include/inttypes.h	/^# define PRIuLEAST8	/;"	d
PRIuMAX	include/inttypes.h	/^# define PRIuMAX	/;"	d
PRIuPTR	include/inttypes.h	/^# define PRIuPTR	/;"	d
PRIx16	include/inttypes.h	/^# define PRIx16	/;"	d
PRIx32	include/inttypes.h	/^# define PRIx32	/;"	d
PRIx64	include/inttypes.h	/^# define PRIx64	/;"	d
PRIx8	include/inttypes.h	/^# define PRIx8	/;"	d
PRIxFAST16	include/inttypes.h	/^# define PRIxFAST16	/;"	d
PRIxFAST32	include/inttypes.h	/^# define PRIxFAST32	/;"	d
PRIxFAST64	include/inttypes.h	/^# define PRIxFAST64	/;"	d
PRIxFAST8	include/inttypes.h	/^# define PRIxFAST8	/;"	d
PRIxLEAST16	include/inttypes.h	/^# define PRIxLEAST16	/;"	d
PRIxLEAST32	include/inttypes.h	/^# define PRIxLEAST32	/;"	d
PRIxLEAST64	include/inttypes.h	/^# define PRIxLEAST64	/;"	d
PRIxLEAST8	include/inttypes.h	/^# define PRIxLEAST8	/;"	d
PRIxMAX	include/inttypes.h	/^# define PRIxMAX	/;"	d
PRIxPTR	include/inttypes.h	/^# define PRIxPTR	/;"	d
PRM_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PRM_BASE	/;"	d
PRM_BASE	arch/arm/include/asm/arch-omap4/cpu.h	/^#define PRM_BASE	/;"	d
PRM_BASE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define PRM_BASE	/;"	d
PRM_DEVICE_BASE	arch/arm/include/asm/arch-omap4/cpu.h	/^#define PRM_DEVICE_BASE	/;"	d
PRM_DEVICE_BASE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define PRM_DEVICE_BASE	/;"	d
PRM_DEVICE_INST	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define PRM_DEVICE_INST	/;"	d
PRM_DEVICE_INST	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_DEVICE_INST	/;"	d
PRM_PER_USBPHYOCP2SCP0_CLKCTRL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_PER_USBPHYOCP2SCP0_CLKCTRL /;"	d
PRM_PER_USBPHYOCP2SCP1_CLKCTRL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_PER_USBPHYOCP2SCP1_CLKCTRL /;"	d
PRM_PER_USB_OTG_SS0_CLKCTRL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_PER_USB_OTG_SS0_CLKCTRL /;"	d
PRM_PER_USB_OTG_SS1_CLKCTRL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_PER_USB_OTG_SS1_CLKCTRL /;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-omap4/cpu.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-omap5/cpu.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL	arch/arm/include/asm/arch-tegra/tegra.h	/^#define PRM_RSTCTRL	/;"	d
PRM_RSTCTRL_RESET	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define PRM_RSTCTRL_RESET	/;"	d
PRM_RSTCTRL_RESET	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PRM_RSTCTRL_RESET	/;"	d
PRM_RSTCTRL_RESET	arch/arm/include/asm/arch-omap4/cpu.h	/^#define PRM_RSTCTRL_RESET	/;"	d
PRM_RSTCTRL_RESET	arch/arm/include/asm/arch-omap5/cpu.h	/^#define PRM_RSTCTRL_RESET	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-omap4/cpu.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST	arch/arm/include/asm/arch-omap5/cpu.h	/^#define PRM_RSTST	/;"	d
PRM_RSTST_WARM_RESET_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define PRM_RSTST_WARM_RESET_MASK	/;"	d
PRM_RSTST_WARM_RESET_MASK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PRM_RSTST_WARM_RESET_MASK	/;"	d
PRM_RSTST_WARM_RESET_MASK	arch/arm/include/asm/arch-omap4/cpu.h	/^#define PRM_RSTST_WARM_RESET_MASK	/;"	d
PRM_RSTST_WARM_RESET_MASK	arch/arm/include/asm/arch-omap5/cpu.h	/^#define PRM_RSTST_WARM_RESET_MASK	/;"	d
PRM_VC_CFG_I2C_CLK_HSCLH_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_HSCLH_MASK	/;"	d	file:
PRM_VC_CFG_I2C_CLK_HSCLH_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_HSCLH_SHIFT	/;"	d	file:
PRM_VC_CFG_I2C_CLK_HSCLL_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_HSCLL_MASK	/;"	d	file:
PRM_VC_CFG_I2C_CLK_HSCLL_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_HSCLL_SHIFT	/;"	d	file:
PRM_VC_CFG_I2C_CLK_SCLH_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_SCLH_MASK	/;"	d	file:
PRM_VC_CFG_I2C_CLK_SCLH_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_SCLH_SHIFT	/;"	d	file:
PRM_VC_CFG_I2C_CLK_SCLL_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_SCLL_MASK	/;"	d	file:
PRM_VC_CFG_I2C_CLK_SCLL_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_CLK_SCLL_SHIFT	/;"	d	file:
PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT	/;"	d	file:
PRM_VC_CFG_I2C_MODE_HSMCODE_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_MODE_HSMCODE_MASK	/;"	d	file:
PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT	/;"	d	file:
PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT	/;"	d	file:
PRM_VC_CFG_I2C_MODE_SRMODEEN_BIT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_CFG_I2C_MODE_SRMODEEN_BIT	/;"	d	file:
PRM_VC_I2C_CHANNEL_FREQ_KHZ	arch/arm/include/asm/arch-omap4/clock.h	/^#define PRM_VC_I2C_CHANNEL_FREQ_KHZ	/;"	d
PRM_VC_I2C_CHANNEL_FREQ_KHZ	arch/arm/include/asm/arch-omap5/clock.h	/^#define PRM_VC_I2C_CHANNEL_FREQ_KHZ	/;"	d
PRM_VC_VAL_BYPASS_DATA_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_DATA_MASK	/;"	d	file:
PRM_VC_VAL_BYPASS_DATA_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_DATA_SHIFT	/;"	d	file:
PRM_VC_VAL_BYPASS_REGADDR_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_REGADDR_MASK	/;"	d	file:
PRM_VC_VAL_BYPASS_REGADDR_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_REGADDR_SHIFT	/;"	d	file:
PRM_VC_VAL_BYPASS_SLAVEADDR_MASK	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_SLAVEADDR_MASK	/;"	d	file:
PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT	/;"	d	file:
PRM_VC_VAL_BYPASS_VALID_BIT	arch/arm/cpu/armv7/omap-common/vc.c	/^#define PRM_VC_VAL_BYPASS_VALID_BIT	/;"	d	file:
PROBE	net/link_local.c	/^	PROBE = 0,$/;"	e	enum:ll_state_t	file:
PROBE_MAX	net/link_local.c	/^	PROBE_MAX = 2,$/;"	e	enum:__anonc9befdc40103	file:
PROBE_MIN	net/link_local.c	/^	PROBE_MIN = 1,$/;"	e	enum:__anonc9befdc40103	file:
PROBE_NUM	net/link_local.c	/^	PROBE_NUM = 3,$/;"	e	enum:__anonc9befdc40103	file:
PROBE_WAIT	net/link_local.c	/^	PROBE_WAIT = 1,$/;"	e	enum:__anonc9befdc40103	file:
PROCESSOR	include/ppc_defs.h	/^#define	PROCESSOR	/;"	d
PROCTL	include/fsl_esdhc.h	/^#define PROCTL	/;"	d
PROCTL_DTW_4	include/fsl_esdhc.h	/^#define PROCTL_DTW_4	/;"	d
PROCTL_DTW_8	include/fsl_esdhc.h	/^#define PROCTL_DTW_8	/;"	d
PROCTL_INIT	include/fsl_esdhc.h	/^#define PROCTL_INIT	/;"	d
PROC_CNT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PROC_CNT	/;"	d
PRODUCT_NAME_OFFSET	board/compulab/common/eeprom.c	/^#define PRODUCT_NAME_OFFSET	/;"	d	file:
PRODUCT_NAME_SIZE	board/compulab/common/eeprom.c	/^#define PRODUCT_NAME_SIZE	/;"	d	file:
PROFF_ENET	arch/powerpc/cpu/mpc8260/ether_scc.c	/^#  define PROFF_ENET /;"	d	file:
PROFF_ENET	include/commproc.h	/^#define	PROFF_ENET	/;"	d
PROFF_ENET	include/commproc.h	/^#define PROFF_ENET	/;"	d
PROFF_FCC1	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_FCC1	/;"	d
PROFF_FCC1	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_FCC1	/;"	d
PROFF_FCC2	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_FCC2	/;"	d
PROFF_FCC2	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_FCC2	/;"	d
PROFF_FCC3	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_FCC3	/;"	d
PROFF_FCC3	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_FCC3	/;"	d
PROFF_I2C_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_I2C_BASE	/;"	d
PROFF_I2C_BASE	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_I2C_BASE	/;"	d
PROFF_IDMA1_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_IDMA1_BASE	/;"	d
PROFF_IDMA1_BASE	examples/standalone/mem_to_mem_idma2intr.c	/^#define PROFF_IDMA1_BASE /;"	d	file:
PROFF_IDMA2_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_IDMA2_BASE	/;"	d
PROFF_IDMA2_BASE	examples/standalone/mem_to_mem_idma2intr.c	/^#define PROFF_IDMA2_BASE /;"	d	file:
PROFF_IDMA3_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_IDMA3_BASE	/;"	d
PROFF_IDMA3_BASE	examples/standalone/mem_to_mem_idma2intr.c	/^#define PROFF_IDMA3_BASE /;"	d	file:
PROFF_IDMA4_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_IDMA4_BASE	/;"	d
PROFF_IDMA4_BASE	examples/standalone/mem_to_mem_idma2intr.c	/^#define PROFF_IDMA4_BASE /;"	d	file:
PROFF_IIC	include/commproc.h	/^#define PROFF_IIC	/;"	d
PROFF_MCC1	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_MCC1	/;"	d
PROFF_MCC1	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_MCC1	/;"	d
PROFF_MCC2	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_MCC2	/;"	d
PROFF_MCC2	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_MCC2	/;"	d
PROFF_RAND	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_RAND	/;"	d
PROFF_RAND	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_RAND	/;"	d
PROFF_REVNUM	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_REVNUM	/;"	d
PROFF_REVNUM	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_REVNUM	/;"	d
PROFF_REVNUM	include/commproc.h	/^#define PROFF_REVNUM	/;"	d
PROFF_SCC	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define PROFF_SCC	/;"	d	file:
PROFF_SCC	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^#define PROFF_SCC	/;"	d	file:
PROFF_SCC	arch/powerpc/cpu/mpc8xx/serial.c	/^#define PROFF_SCC	/;"	d	file:
PROFF_SCC1	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SCC1	/;"	d
PROFF_SCC1	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_SCC1	/;"	d
PROFF_SCC1	include/commproc.h	/^#define PROFF_SCC1	/;"	d
PROFF_SCC2	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SCC2	/;"	d
PROFF_SCC2	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_SCC2	/;"	d
PROFF_SCC2	include/commproc.h	/^#define PROFF_SCC2	/;"	d
PROFF_SCC3	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SCC3	/;"	d
PROFF_SCC3	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_SCC3	/;"	d
PROFF_SCC3	include/commproc.h	/^#define PROFF_SCC3	/;"	d
PROFF_SCC4	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SCC4	/;"	d
PROFF_SCC4	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_SCC4	/;"	d
PROFF_SCC4	include/commproc.h	/^#define PROFF_SCC4	/;"	d
PROFF_SMC	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define PROFF_SMC	/;"	d	file:
PROFF_SMC	arch/powerpc/cpu/mpc8xx/serial.c	/^#define PROFF_SMC	/;"	d	file:
PROFF_SMC1	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SMC1	/;"	d
PROFF_SMC1	include/commproc.h	/^#define PROFF_SMC1	/;"	d
PROFF_SMC1_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SMC1_BASE	/;"	d
PROFF_SMC2	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SMC2	/;"	d
PROFF_SMC2	include/commproc.h	/^#define PROFF_SMC2	/;"	d
PROFF_SMC2_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SMC2_BASE	/;"	d
PROFF_SMC_BASE	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define PROFF_SMC_BASE	/;"	d	file:
PROFF_SPI	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SPI	/;"	d
PROFF_SPI	include/commproc.h	/^#define PROFF_SPI	/;"	d
PROFF_SPI_BASE	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_SPI_BASE	/;"	d
PROFF_SPI_BASE	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_SPI_BASE	/;"	d
PROFF_TIMERS	arch/powerpc/include/asm/cpm_8260.h	/^#define PROFF_TIMERS	/;"	d
PROFF_TIMERS	arch/powerpc/include/asm/cpm_85xx.h	/^#define PROFF_TIMERS	/;"	d
PROFF_USB	include/usb/mpc8xx_udc.h	/^#define PROFF_USB	/;"	d
PROFF_USB	post/cpu/mpc8xx/usb.c	/^#define	PROFF_USB	/;"	d	file:
PROFILE_0	board/ti/am335x/mux.c	/^#define PROFILE_0	/;"	d	file:
PROFILE_1	board/ti/am335x/mux.c	/^#define PROFILE_1	/;"	d	file:
PROFILE_2	board/ti/am335x/mux.c	/^#define PROFILE_2	/;"	d	file:
PROFILE_3	board/ti/am335x/mux.c	/^#define PROFILE_3	/;"	d	file:
PROFILE_4	board/ti/am335x/mux.c	/^#define PROFILE_4	/;"	d	file:
PROFILE_5	board/ti/am335x/mux.c	/^#define PROFILE_5	/;"	d	file:
PROFILE_6	board/ti/am335x/mux.c	/^#define PROFILE_6	/;"	d	file:
PROFILE_7	board/ti/am335x/mux.c	/^#define PROFILE_7	/;"	d	file:
PROFILE_ALL	board/ti/am335x/mux.c	/^#define PROFILE_ALL	/;"	d	file:
PROFILE_MASK	board/ti/am335x/mux.c	/^#define PROFILE_MASK	/;"	d	file:
PROFILE_NONE	board/ti/am335x/mux.c	/^#define PROFILE_NONE	/;"	d	file:
PROGRAM_PAGE_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define PROGRAM_PAGE_CMD_CODE	/;"	d	file:
PROGRAM_WAIT_CNT	drivers/mtd/nand/denali.h	/^#define PROGRAM_WAIT_CNT	/;"	d
PROGRAM_WAIT_CNT__VALUE	drivers/mtd/nand/denali.h	/^#define     PROGRAM_WAIT_CNT__VALUE	/;"	d
PROGRAM_WAIT_COUNT	drivers/mtd/nand/denali.h	/^#define PROGRAM_WAIT_COUNT /;"	d
PROG_MOUNT	net/nfs.h	/^#define PROG_MOUNT /;"	d
PROG_NFS	net/nfs.h	/^#define PROG_NFS /;"	d
PROG_PORTMAP	net/nfs.h	/^#define PROG_PORTMAP /;"	d
PROMCTRL	drivers/net/ax88180.h	/^#define PROMCTRL	/;"	d
PROMDEV_KBD	arch/sparc/include/asm/prom.h	/^#define	PROMDEV_KBD	/;"	d
PROMDEV_SCREEN	arch/sparc/include/asm/prom.h	/^#define	PROMDEV_SCREEN	/;"	d
PROMDEV_TTYA	arch/sparc/include/asm/prom.h	/^#define	PROMDEV_TTYA	/;"	d
PROMDEV_TTYB	arch/sparc/include/asm/prom.h	/^#define	PROMDEV_TTYB	/;"	d
PROMDP	drivers/net/ax88180.h	/^#define PROMDP	/;"	d
PROMINTR_MAX	arch/sparc/include/asm/prom.h	/^#define PROMINTR_MAX /;"	d
PROMREG_MAX	arch/sparc/include/asm/prom.h	/^#define PROMREG_MAX /;"	d
PROMVADDR_MAX	arch/sparc/include/asm/prom.h	/^#define PROMVADDR_MAX /;"	d
PROM_DATA	arch/sparc/cpu/leon2/prom.c	/^#define PROM_DATA /;"	d	file:
PROM_DATA	arch/sparc/cpu/leon3/prom.c	/^#define PROM_DATA /;"	d	file:
PROM_OFFS	arch/sparc/cpu/leon2/prom.c	/^#define PROM_OFFS /;"	d	file:
PROM_OFFS	arch/sparc/cpu/leon3/prom.c	/^#define PROM_OFFS /;"	d	file:
PROM_PGT	arch/sparc/cpu/leon2/prom.c	/^#define PROM_PGT /;"	d	file:
PROM_PGT	arch/sparc/cpu/leon2/prom.c	/^sparc_srmmu_setup srmmu_tables PROM_PGT = {$/;"	v	typeref:typename:sparc_srmmu_setup srmmu_tables
PROM_PGT	arch/sparc/cpu/leon3/prom.c	/^#define PROM_PGT /;"	d	file:
PROM_PGT	arch/sparc/cpu/leon3/prom.c	/^sparc_srmmu_setup srmmu_tables PROM_PGT = {$/;"	v	typeref:typename:sparc_srmmu_setup srmmu_tables
PROM_SEL_L	board/keymile/kmp204x/pci.c	/^#define PROM_SEL_L	/;"	d	file:
PROM_SIZE_MASK	arch/sparc/cpu/leon2/prom.c	/^#define PROM_SIZE_MASK /;"	d	file:
PROM_SIZE_MASK	arch/sparc/cpu/leon3/prom.c	/^#define PROM_SIZE_MASK /;"	d	file:
PROM_TEXT	arch/sparc/cpu/leon2/prom.c	/^#define PROM_TEXT /;"	d	file:
PROM_TEXT	arch/sparc/cpu/leon3/prom.c	/^#define PROM_TEXT /;"	d	file:
PROP_IGNORE_LIST	tools/dtoc/dtoc	/^PROP_IGNORE_LIST = [$/;"	v
PROP_IGNORE_LIST	tools/dtoc/dtoc.py	/^PROP_IGNORE_LIST = [$/;"	v
PROTECTION_PER_BLOCK	drivers/mtd/nand/denali.h	/^#define PROTECTION_PER_BLOCK /;"	d
PROTECT_MAGIC	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PROTECT_MAGIC	/;"	d
PROTECT_MAGIC	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PROTECT_MAGIC	/;"	d
PROTOCOL_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define PROTOCOL_R	/;"	d
PROTOCOL_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define PROTOCOL_T	/;"	d
PROTOCOL_TYPE_I2C	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define PROTOCOL_TYPE_I2C	/;"	d
PROT_ARP	include/net.h	/^#define PROT_ARP	/;"	d
PROT_EXEC	tools/mingw_support.h	/^#define PROT_EXEC	/;"	d
PROT_IP	include/net.h	/^#define PROT_IP	/;"	d
PROT_IPV6	include/net.h	/^#define PROT_IPV6	/;"	d
PROT_NONE	tools/mingw_support.h	/^#define PROT_NONE	/;"	d
PROT_PPP_SES	include/net.h	/^#define PROT_PPP_SES	/;"	d
PROT_RARP	include/net.h	/^#define PROT_RARP	/;"	d
PROT_READ	tools/mingw_support.h	/^#define PROT_READ	/;"	d
PROT_VLAN	include/net.h	/^#define PROT_VLAN	/;"	d
PROT_WRITE	tools/mingw_support.h	/^#define PROT_WRITE	/;"	d
PRPRICR5	board/renesas/ap325rxa/ap325rxa.c	/^#define PRPRICR5	/;"	d	file:
PRPRICR5_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PRPRICR5_D	/;"	d	file:
PRR	arch/arm/mach-rmobile/cpu_info-rcar.c	/^#define PRR /;"	d	file:
PRR_SH7757_B0	arch/sh/include/asm/cpu_sh7757.h	/^#define PRR_SH7757_B0	/;"	d
PRR_SH7757_C0	arch/sh/include/asm/cpu_sh7757.h	/^#define PRR_SH7757_C0	/;"	d
PRS	arch/avr32/include/asm/hmatrix-common.h	/^	} PRS[16];$/;"	m	struct:hmatrix_regs	typeref:struct:hmatrix_regs::__anonb63485bb0108[16]
PRSSTAT	include/fsl_esdhc.h	/^#define PRSSTAT	/;"	d
PRSSTAT_BREN	include/fsl_esdhc.h	/^#define PRSSTAT_BREN	/;"	d
PRSSTAT_BWEN	include/fsl_esdhc.h	/^#define PRSSTAT_BWEN	/;"	d
PRSSTAT_CDPL	include/fsl_esdhc.h	/^#define PRSSTAT_CDPL	/;"	d
PRSSTAT_CICHB	include/fsl_esdhc.h	/^#define PRSSTAT_CICHB	/;"	d
PRSSTAT_CIDHB	include/fsl_esdhc.h	/^#define PRSSTAT_CIDHB	/;"	d
PRSSTAT_CINS	include/fsl_esdhc.h	/^#define PRSSTAT_CINS	/;"	d
PRSSTAT_CLSL	include/fsl_esdhc.h	/^#define PRSSTAT_CLSL	/;"	d
PRSSTAT_DAT0	include/fsl_esdhc.h	/^#define PRSSTAT_DAT0	/;"	d
PRSSTAT_DLA	include/fsl_esdhc.h	/^#define PRSSTAT_DLA	/;"	d
PRSSTAT_SDSTB	include/fsl_esdhc.h	/^#define PRSSTAT_SDSTB	/;"	d
PRSSTAT_WPSPL	include/fsl_esdhc.h	/^#define PRSSTAT_WPSPL	/;"	d
PRST1	board/keymile/km_arm/fpga_config.c	/^#define PRST1	/;"	d	file:
PRSTCFG_OFF	board/keymile/kmp204x/qrio.c	/^#define PRSTCFG_OFF	/;"	d	file:
PRSTCFG_POWUP_RST	board/keymile/kmp204x/kmp204x.h	/^#define PRSTCFG_POWUP_RST	/;"	d
PRSTCFG_POWUP_UNIT_CORE_RST	board/keymile/kmp204x/kmp204x.h	/^#define PRSTCFG_POWUP_UNIT_CORE_RST	/;"	d
PRSTCFG_POWUP_UNIT_RST	board/keymile/kmp204x/kmp204x.h	/^#define PRSTCFG_POWUP_UNIT_RST	/;"	d
PRST_OFF	board/keymile/kmp204x/qrio.c	/^#define PRST_OFF	/;"	d	file:
PRT_CFG_VAL	drivers/net/mvgbe.h	/^#define PRT_CFG_VAL	/;"	d
PRT_DINIT0_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_DINIT0_SHIFT	/;"	d
PRT_DINIT1_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_DINIT1_SHIFT	/;"	d
PRT_DINIT2_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_DINIT2_SHIFT	/;"	d
PRT_DINIT3_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_DINIT3_SHIFT	/;"	d
PRT_DLLLOCK_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_DLLLOCK_SHIFT	/;"	d
PRT_DLLSRST_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_DLLSRST_SHIFT	/;"	d
PRT_ITMSRST_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PRT_ITMSRST_SHIFT	/;"	d
PR_LANE0_DP_LANE2_D0_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D0_LEVEL0	/;"	d
PR_LANE0_DP_LANE2_D0_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D0_LEVEL1	/;"	d
PR_LANE0_DP_LANE2_D0_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D0_LEVEL2	/;"	d
PR_LANE0_DP_LANE2_D0_LEVEL3	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D0_LEVEL3	/;"	d
PR_LANE0_DP_LANE2_D1_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D1_LEVEL0	/;"	d
PR_LANE0_DP_LANE2_D1_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D1_LEVEL1	/;"	d
PR_LANE0_DP_LANE2_D1_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D1_LEVEL2	/;"	d
PR_LANE0_DP_LANE2_D2_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D2_LEVEL0	/;"	d
PR_LANE0_DP_LANE2_D2_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D2_LEVEL1	/;"	d
PR_LANE0_DP_LANE2_D3_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_D3_LEVEL0	/;"	d
PR_LANE0_DP_LANE2_MASK	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_MASK	/;"	d
PR_LANE0_DP_LANE2_SHIFT	drivers/video/tegra124/sor.h	/^#define PR_LANE0_DP_LANE2_SHIFT	/;"	d
PR_LANE1_DP_LANE1_D0_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D0_LEVEL0	/;"	d
PR_LANE1_DP_LANE1_D0_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D0_LEVEL1	/;"	d
PR_LANE1_DP_LANE1_D0_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D0_LEVEL2	/;"	d
PR_LANE1_DP_LANE1_D0_LEVEL3	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D0_LEVEL3	/;"	d
PR_LANE1_DP_LANE1_D1_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D1_LEVEL0	/;"	d
PR_LANE1_DP_LANE1_D1_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D1_LEVEL1	/;"	d
PR_LANE1_DP_LANE1_D1_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D1_LEVEL2	/;"	d
PR_LANE1_DP_LANE1_D2_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D2_LEVEL0	/;"	d
PR_LANE1_DP_LANE1_D2_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D2_LEVEL1	/;"	d
PR_LANE1_DP_LANE1_D3_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_D3_LEVEL0	/;"	d
PR_LANE1_DP_LANE1_MASK	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_MASK	/;"	d
PR_LANE1_DP_LANE1_SHIFT	drivers/video/tegra124/sor.h	/^#define PR_LANE1_DP_LANE1_SHIFT	/;"	d
PR_LANE2_DP_LANE0_D0_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D0_LEVEL0	/;"	d
PR_LANE2_DP_LANE0_D0_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D0_LEVEL1	/;"	d
PR_LANE2_DP_LANE0_D0_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D0_LEVEL2	/;"	d
PR_LANE2_DP_LANE0_D0_LEVEL3	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D0_LEVEL3	/;"	d
PR_LANE2_DP_LANE0_D1_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D1_LEVEL0	/;"	d
PR_LANE2_DP_LANE0_D1_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D1_LEVEL1	/;"	d
PR_LANE2_DP_LANE0_D1_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D1_LEVEL2	/;"	d
PR_LANE2_DP_LANE0_D2_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D2_LEVEL0	/;"	d
PR_LANE2_DP_LANE0_D2_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D2_LEVEL1	/;"	d
PR_LANE2_DP_LANE0_D3_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_D3_LEVEL0	/;"	d
PR_LANE2_DP_LANE0_MASK	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_MASK	/;"	d
PR_LANE2_DP_LANE0_SHIFT	drivers/video/tegra124/sor.h	/^#define PR_LANE2_DP_LANE0_SHIFT	/;"	d
PR_LANE3_DP_LANE3_D0_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D0_LEVEL0	/;"	d
PR_LANE3_DP_LANE3_D0_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D0_LEVEL1	/;"	d
PR_LANE3_DP_LANE3_D0_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D0_LEVEL2	/;"	d
PR_LANE3_DP_LANE3_D0_LEVEL3	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D0_LEVEL3	/;"	d
PR_LANE3_DP_LANE3_D1_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D1_LEVEL0	/;"	d
PR_LANE3_DP_LANE3_D1_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D1_LEVEL1	/;"	d
PR_LANE3_DP_LANE3_D1_LEVEL2	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D1_LEVEL2	/;"	d
PR_LANE3_DP_LANE3_D2_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D2_LEVEL0	/;"	d
PR_LANE3_DP_LANE3_D2_LEVEL1	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D2_LEVEL1	/;"	d
PR_LANE3_DP_LANE3_D3_LEVEL0	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_D3_LEVEL0	/;"	d
PR_LANE3_DP_LANE3_MASK	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_MASK	/;"	d
PR_LANE3_DP_LANE3_SHIFT	drivers/video/tegra124/sor.h	/^#define PR_LANE3_DP_LANE3_SHIFT	/;"	d
PS	doc/DocBook/Makefile	/^PS := $(patsubst %.xml, %.ps, $(BOOKS))$/;"	m
PS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PS /;"	d
PS1	common/cli_hush.c	/^static char *PS1;$/;"	v	typeref:typename:char *	file:
PS2	common/cli_hush.c	/^static char *PS2;$/;"	v	typeref:typename:char *	file:
PS2BUF_SIZE	include/ps2mult.h	/^#define	PS2BUF_SIZE	/;"	d
PS2CYCLES_FLOOR	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PS2CYCLES_FLOOR(/;"	d	file:
PS2CYCLES_ROUNDUP	arch/arm/mach-sunxi/dram_sun9i.c	/^#define PS2CYCLES_ROUNDUP(/;"	d	file:
PS2KHZ	drivers/video/mxsfb.c	/^#define	PS2KHZ(/;"	d	file:
PS2MULT_BSYNC	include/ps2mult.h	/^#define PS2MULT_BSYNC	/;"	d
PS2MULT_ESCAPE	include/ps2mult.h	/^#define PS2MULT_ESCAPE	/;"	d
PS2MULT_KB_SELECTOR	include/ps2mult.h	/^#define PS2MULT_KB_SELECTOR	/;"	d
PS2MULT_MS_SELECTOR	include/ps2mult.h	/^#define PS2MULT_MS_SELECTOR	/;"	d
PS2MULT_SESSION_END	include/ps2mult.h	/^#define PS2MULT_SESSION_END	/;"	d
PS2MULT_SESSION_START	include/ps2mult.h	/^#define PS2MULT_SESSION_START	/;"	d
PS2SER_BAUD	drivers/input/ps2ser.c	/^#define PS2SER_BAUD	/;"	d	file:
PS7_INIT_CORRUPT	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_INIT_CORRUPT /;"	d
PS7_INIT_CORRUPT	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_INIT_CORRUPT /;"	d
PS7_INIT_CORRUPT	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_INIT_CORRUPT /;"	d
PS7_INIT_CORRUPT	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_INIT_CORRUPT /;"	d
PS7_INIT_CORRUPT	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_INIT_CORRUPT /;"	d
PS7_INIT_SUCCESS	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_INIT_SUCCESS /;"	d
PS7_INIT_SUCCESS	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_INIT_SUCCESS /;"	d
PS7_INIT_SUCCESS	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_INIT_SUCCESS /;"	d
PS7_INIT_SUCCESS	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_INIT_SUCCESS /;"	d
PS7_INIT_SUCCESS	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_INIT_SUCCESS /;"	d
PS7_INIT_TIMEOUT	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_INIT_TIMEOUT /;"	d
PS7_INIT_TIMEOUT	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_INIT_TIMEOUT /;"	d
PS7_INIT_TIMEOUT	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_INIT_TIMEOUT /;"	d
PS7_INIT_TIMEOUT	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_INIT_TIMEOUT /;"	d
PS7_INIT_TIMEOUT	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_INIT_TIMEOUT /;"	d
PS7_MASK_POLL_TIME	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^#define PS7_MASK_POLL_TIME /;"	d	file:
PS7_MASK_POLL_TIME	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^#define PS7_MASK_POLL_TIME /;"	d	file:
PS7_MASK_POLL_TIME	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^#define PS7_MASK_POLL_TIME /;"	d	file:
PS7_MASK_POLL_TIME	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^#define PS7_MASK_POLL_TIME /;"	d	file:
PS7_MASK_POLL_TIME	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^#define PS7_MASK_POLL_TIME /;"	d	file:
PS7_POLL_FAILED_DDR_INIT	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DDR_INIT /;"	d
PS7_POLL_FAILED_DDR_INIT	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DDR_INIT /;"	d
PS7_POLL_FAILED_DDR_INIT	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DDR_INIT /;"	d
PS7_POLL_FAILED_DDR_INIT	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DDR_INIT /;"	d
PS7_POLL_FAILED_DDR_INIT	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DDR_INIT /;"	d
PS7_POLL_FAILED_DMA	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DMA /;"	d
PS7_POLL_FAILED_DMA	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DMA /;"	d
PS7_POLL_FAILED_DMA	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DMA /;"	d
PS7_POLL_FAILED_DMA	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DMA /;"	d
PS7_POLL_FAILED_DMA	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_DMA /;"	d
PS7_POLL_FAILED_PLL	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_PLL /;"	d
PS7_POLL_FAILED_PLL	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_PLL /;"	d
PS7_POLL_FAILED_PLL	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_PLL /;"	d
PS7_POLL_FAILED_PLL	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_PLL /;"	d
PS7_POLL_FAILED_PLL	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_POLL_FAILED_PLL /;"	d
PS7_POST_CONFIG	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define PS7_POST_CONFIG$/;"	d
PS7_POST_CONFIG	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define PS7_POST_CONFIG$/;"	d
PS7_POST_CONFIG	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define PS7_POST_CONFIG$/;"	d
PS7_POST_CONFIG	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define PS7_POST_CONFIG$/;"	d
PS7_POST_CONFIG	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define PS7_POST_CONFIG$/;"	d
PSC0_MDCTL	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC0_MDCTL	/;"	d
PSCI_0_2_64BIT	include/linux/psci.h	/^#define PSCI_0_2_64BIT	/;"	d
PSCI_0_2_AFFINITY_LEVEL_OFF	include/linux/psci.h	/^#define PSCI_0_2_AFFINITY_LEVEL_OFF	/;"	d
PSCI_0_2_AFFINITY_LEVEL_ON	include/linux/psci.h	/^#define PSCI_0_2_AFFINITY_LEVEL_ON	/;"	d
PSCI_0_2_AFFINITY_LEVEL_ON_PENDING	include/linux/psci.h	/^#define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING	/;"	d
PSCI_0_2_FN	include/linux/psci.h	/^#define PSCI_0_2_FN(/;"	d
PSCI_0_2_FN64	include/linux/psci.h	/^#define PSCI_0_2_FN64(/;"	d
PSCI_0_2_FN64_AFFINITY_INFO	include/linux/psci.h	/^#define PSCI_0_2_FN64_AFFINITY_INFO	/;"	d
PSCI_0_2_FN64_BASE	include/linux/psci.h	/^#define PSCI_0_2_FN64_BASE	/;"	d
PSCI_0_2_FN64_CPU_ON	include/linux/psci.h	/^#define PSCI_0_2_FN64_CPU_ON	/;"	d
PSCI_0_2_FN64_CPU_SUSPEND	include/linux/psci.h	/^#define PSCI_0_2_FN64_CPU_SUSPEND	/;"	d
PSCI_0_2_FN64_MIGRATE	include/linux/psci.h	/^#define PSCI_0_2_FN64_MIGRATE	/;"	d
PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	include/linux/psci.h	/^#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	/;"	d
PSCI_0_2_FN_AFFINITY_INFO	include/linux/psci.h	/^#define PSCI_0_2_FN_AFFINITY_INFO	/;"	d
PSCI_0_2_FN_BASE	include/linux/psci.h	/^#define PSCI_0_2_FN_BASE	/;"	d
PSCI_0_2_FN_CPU_OFF	include/linux/psci.h	/^#define PSCI_0_2_FN_CPU_OFF	/;"	d
PSCI_0_2_FN_CPU_ON	include/linux/psci.h	/^#define PSCI_0_2_FN_CPU_ON	/;"	d
PSCI_0_2_FN_CPU_SUSPEND	include/linux/psci.h	/^#define PSCI_0_2_FN_CPU_SUSPEND	/;"	d
PSCI_0_2_FN_MIGRATE	include/linux/psci.h	/^#define PSCI_0_2_FN_MIGRATE	/;"	d
PSCI_0_2_FN_MIGRATE_INFO_TYPE	include/linux/psci.h	/^#define PSCI_0_2_FN_MIGRATE_INFO_TYPE	/;"	d
PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	include/linux/psci.h	/^#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	/;"	d
PSCI_0_2_FN_PSCI_VERSION	include/linux/psci.h	/^#define PSCI_0_2_FN_PSCI_VERSION	/;"	d
PSCI_0_2_FN_SYSTEM_OFF	include/linux/psci.h	/^#define PSCI_0_2_FN_SYSTEM_OFF	/;"	d
PSCI_0_2_FN_SYSTEM_RESET	include/linux/psci.h	/^#define PSCI_0_2_FN_SYSTEM_RESET	/;"	d
PSCI_0_2_POWER_STATE_AFFL_MASK	include/linux/psci.h	/^#define PSCI_0_2_POWER_STATE_AFFL_MASK	/;"	d
PSCI_0_2_POWER_STATE_AFFL_SHIFT	include/linux/psci.h	/^#define PSCI_0_2_POWER_STATE_AFFL_SHIFT	/;"	d
PSCI_0_2_POWER_STATE_ID_MASK	include/linux/psci.h	/^#define PSCI_0_2_POWER_STATE_ID_MASK	/;"	d
PSCI_0_2_POWER_STATE_ID_SHIFT	include/linux/psci.h	/^#define PSCI_0_2_POWER_STATE_ID_SHIFT	/;"	d
PSCI_0_2_POWER_STATE_TYPE_MASK	include/linux/psci.h	/^#define PSCI_0_2_POWER_STATE_TYPE_MASK	/;"	d
PSCI_0_2_POWER_STATE_TYPE_SHIFT	include/linux/psci.h	/^#define PSCI_0_2_POWER_STATE_TYPE_SHIFT	/;"	d
PSCI_0_2_TOS_MP	include/linux/psci.h	/^#define PSCI_0_2_TOS_MP	/;"	d
PSCI_0_2_TOS_UP_MIGRATE	include/linux/psci.h	/^#define PSCI_0_2_TOS_UP_MIGRATE	/;"	d
PSCI_0_2_TOS_UP_NO_MIGRATE	include/linux/psci.h	/^#define PSCI_0_2_TOS_UP_NO_MIGRATE	/;"	d
PSCI_AFFINITY_LEVEL_OFF	arch/arm/include/asm/psci.h	/^#define PSCI_AFFINITY_LEVEL_OFF	/;"	d
PSCI_AFFINITY_LEVEL_ON	arch/arm/include/asm/psci.h	/^#define PSCI_AFFINITY_LEVEL_ON	/;"	d
PSCI_AFFINITY_LEVEL_ON_PENDING	arch/arm/include/asm/psci.h	/^#define PSCI_AFFINITY_LEVEL_ON_PENDING	/;"	d
PSCI_FN_AFFINITY_INFO_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_AFFINITY_INFO_FEATURE_MASK	/;"	d	file:
PSCI_FN_CPU_OFF_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_CPU_OFF_FEATURE_MASK	/;"	d	file:
PSCI_FN_CPU_ON_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_CPU_ON_FEATURE_MASK	/;"	d	file:
PSCI_FN_CPU_SUSPEND_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_CPU_SUSPEND_FEATURE_MASK	/;"	d	file:
PSCI_FN_PSCI_VERSION_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_PSCI_VERSION_FEATURE_MASK	/;"	d	file:
PSCI_FN_SYSTEM_OFF_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_SYSTEM_OFF_FEATURE_MASK	/;"	d	file:
PSCI_FN_SYSTEM_RESET_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_SYSTEM_RESET_FEATURE_MASK	/;"	d	file:
PSCI_FN_SYSTEM_SUSPEND_FEATURE_MASK	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define PSCI_FN_SYSTEM_SUSPEND_FEATURE_MASK	/;"	d	file:
PSCI_RESET	arch/arm/cpu/armv8/Kconfig	/^config PSCI_RESET$/;"	c
PSCI_RET_ALREADY_ON	include/linux/psci.h	/^#define PSCI_RET_ALREADY_ON	/;"	d
PSCI_RET_DENIED	include/linux/psci.h	/^#define PSCI_RET_DENIED	/;"	d
PSCI_RET_DISABLED	include/linux/psci.h	/^#define PSCI_RET_DISABLED	/;"	d
PSCI_RET_INTERNAL_FAILURE	include/linux/psci.h	/^#define PSCI_RET_INTERNAL_FAILURE	/;"	d
PSCI_RET_INVALID_PARAMS	include/linux/psci.h	/^#define PSCI_RET_INVALID_PARAMS	/;"	d
PSCI_RET_NOT_PRESENT	include/linux/psci.h	/^#define PSCI_RET_NOT_PRESENT	/;"	d
PSCI_RET_NOT_SUPPORTED	include/linux/psci.h	/^#define PSCI_RET_NOT_SUPPORTED	/;"	d
PSCI_RET_ON_PENDING	include/linux/psci.h	/^#define PSCI_RET_ON_PENDING	/;"	d
PSCI_RET_SUCCESS	include/linux/psci.h	/^#define PSCI_RET_SUCCESS	/;"	d
PSCI_VERSION_MAJOR	include/linux/psci.h	/^#define PSCI_VERSION_MAJOR(/;"	d
PSCI_VERSION_MAJOR_MASK	include/linux/psci.h	/^#define PSCI_VERSION_MAJOR_MASK	/;"	d
PSCI_VERSION_MAJOR_SHIFT	include/linux/psci.h	/^#define PSCI_VERSION_MAJOR_SHIFT	/;"	d
PSCI_VERSION_MINOR	include/linux/psci.h	/^#define PSCI_VERSION_MINOR(/;"	d
PSCI_VERSION_MINOR_MASK	include/linux/psci.h	/^#define PSCI_VERSION_MINOR_MASK	/;"	d
PSCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PSCR	/;"	d
PSCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PSCR /;"	d
PSCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PSCR /;"	d
PSCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PSCR /;"	d
PSCR	drivers/serial/serial_sh.h	/^# define PSCR	/;"	d
PSCR_A	board/ms7722se/lowlevel_init.S	/^PSCR_A:		.long	PSCR$/;"	l
PSCR_A	board/renesas/MigoR/lowlevel_init.S	/^PSCR_A:		.long	PSCR$/;"	l
PSCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSCR_A:		.long	0xffec0024$/;"	l
PSCR_D	board/ms7722se/lowlevel_init.S	/^PSCR_D:		.word	0x0000$/;"	l
PSCR_D	board/renesas/MigoR/lowlevel_init.S	/^PSCR_D:		.word	0x0000$/;"	l
PSCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PSCR_D	/;"	d	file:
PSCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSCR_D:		.long	0x0000$/;"	l
PSC_BASE	arch/powerpc/cpu/mpc5xxx/serial.c	/^#define PSC_BASE /;"	d	file:
PSC_BASE	drivers/input/ps2ser.c	/^#define PSC_BASE /;"	d	file:
PSC_BASE2	arch/powerpc/cpu/mpc5xxx/serial.c	/^#define PSC_BASE2 /;"	d	file:
PSC_CHP_SHRTSW	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_CHP_SHRTSW	/;"	d
PSC_CMD_GO	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_CMD_GO	/;"	d
PSC_DISABLE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define	PSC_DISABLE	/;"	d
PSC_DISABLE	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_DISABLE	/;"	d
PSC_ENABLE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define	PSC_ENABLE	/;"	d
PSC_ENABLE	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_ENABLE	/;"	d
PSC_EPCCR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_EPCCR	/;"	d
PSC_EPCPR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_EPCPR	/;"	d
PSC_FIFO_EMPTY	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_FIFO_EMPTY	/;"	d
PSC_FIFO_ENABLE_SLICE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_FIFO_ENABLE_SLICE	/;"	d
PSC_FIFO_RESET_SLICE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_FIFO_RESET_SLICE	/;"	d
PSC_FLAG_CLEAR	arch/arm/mach-davinci/lowlevel_init.S	/^PSC_FLAG_CLEAR:$/;"	l
PSC_GBLCTL	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_GBLCTL	/;"	d
PSC_GEM_FLAG_CLEAR	arch/arm/mach-davinci/lowlevel_init.S	/^PSC_GEM_FLAG_CLEAR:$/;"	l
PSC_GOSTAT	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_GOSTAT	/;"	d
PSC_IMR_DB	include/mpc5xxx.h	/^#define PSC_IMR_DB	/;"	d
PSC_IMR_IPC	include/mpc5xxx.h	/^#define PSC_IMR_IPC	/;"	d
PSC_IMR_RXRDY	include/mpc5xxx.h	/^#define PSC_IMR_RXRDY	/;"	d
PSC_IMR_TXRDY	include/mpc5xxx.h	/^#define PSC_IMR_TXRDY	/;"	d
PSC_IPCR_CTS	include/mpc5xxx.h	/^#define PSC_IPCR_CTS	/;"	d
PSC_IPCR_DCD	include/mpc5xxx.h	/^#define PSC_IPCR_DCD	/;"	d
PSC_MDCTL_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_MDCTL_BASE	/;"	d
PSC_MDCTL_NEXT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_MDCTL_NEXT	/;"	d
PSC_MDSTAT_BASE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_MDSTAT_BASE	/;"	d
PSC_MDSTAT_STATE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_MDSTAT_STATE	/;"	d
PSC_MD_STATE_MSK	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_MD_STATE_MSK	/;"	d
PSC_MODE_1_STOPBIT	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_1_STOPBIT	/;"	d
PSC_MODE_5_BITS	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_5_BITS	/;"	d
PSC_MODE_5_BITS	include/mpc5xxx.h	/^#define PSC_MODE_5_BITS	/;"	d
PSC_MODE_6_BITS	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_6_BITS	/;"	d
PSC_MODE_6_BITS	include/mpc5xxx.h	/^#define PSC_MODE_6_BITS	/;"	d
PSC_MODE_7_BITS	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_7_BITS	/;"	d
PSC_MODE_7_BITS	include/mpc5xxx.h	/^#define PSC_MODE_7_BITS	/;"	d
PSC_MODE_8_BITS	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_8_BITS	/;"	d
PSC_MODE_8_BITS	include/mpc5xxx.h	/^#define PSC_MODE_8_BITS	/;"	d
PSC_MODE_ENTIMEOUT	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_ENTIMEOUT	/;"	d
PSC_MODE_ERR	include/mpc5xxx.h	/^#define PSC_MODE_ERR	/;"	d
PSC_MODE_FFULL	include/mpc5xxx.h	/^#define PSC_MODE_FFULL	/;"	d
PSC_MODE_ONE_STOP	include/mpc5xxx.h	/^#define PSC_MODE_ONE_STOP	/;"	d
PSC_MODE_ONE_STOP_5_BITS	include/mpc5xxx.h	/^#define PSC_MODE_ONE_STOP_5_BITS	/;"	d
PSC_MODE_PAREVEN	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_PAREVEN	/;"	d
PSC_MODE_PAREVEN	include/mpc5xxx.h	/^#define PSC_MODE_PAREVEN	/;"	d
PSC_MODE_PARFORCE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_PARFORCE	/;"	d
PSC_MODE_PARFORCE	include/mpc5xxx.h	/^#define PSC_MODE_PARFORCE	/;"	d
PSC_MODE_PARNONE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_PARNONE	/;"	d
PSC_MODE_PARNONE	include/mpc5xxx.h	/^#define PSC_MODE_PARNONE	/;"	d
PSC_MODE_PARODD	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_PARODD	/;"	d
PSC_MODE_PARODD	include/mpc5xxx.h	/^#define PSC_MODE_PARODD	/;"	d
PSC_MODE_RXRTS	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_MODE_RXRTS	/;"	d
PSC_MODE_RXRTS	include/mpc5xxx.h	/^#define PSC_MODE_RXRTS	/;"	d
PSC_MODE_TWO_STOP	include/mpc5xxx.h	/^#define PSC_MODE_TWO_STOP	/;"	d
PSC_OP0_RTS	board/inka4x0/inkadiag.c	/^#define PSC_OP0_RTS	/;"	d	file:
PSC_OP1_RTS	board/inka4x0/inkadiag.c	/^#define PSC_OP1_RTS	/;"	d	file:
PSC_PDCTL	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PDCTL	/;"	d
PSC_PDCTL1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PDCTL1	/;"	d
PSC_PDSTAT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PDSTAT	/;"	d
PSC_PDSTAT1	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PDSTAT1	/;"	d
PSC_PSC0_MODULE_ID_CNT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PSC0_MODULE_ID_CNT	/;"	d
PSC_PSC1_MODULE_ID_CNT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PSC1_MODULE_ID_CNT	/;"	d
PSC_PTCMD	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PTCMD	/;"	d
PSC_PTSTAT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_PTSTAT	/;"	d
PSC_PTSTAT_TIMEOUT_LIMIT	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_PTSTAT_TIMEOUT_LIMIT /;"	d
PSC_REG_MDCFG	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCFG(/;"	d
PSC_REG_MDCFG_GET_PD	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCFG_GET_PD(/;"	d
PSC_REG_MDCFG_GET_RESET_ISO	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCFG_GET_RESET_ISO(/;"	d
PSC_REG_MDCTL	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCTL(/;"	d
PSC_REG_MDCTL_GET_LRSTZ	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCTL_GET_LRSTZ(/;"	d
PSC_REG_MDCTL_SET_LRSTZ	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCTL_SET_LRSTZ(/;"	d
PSC_REG_MDCTL_SET_NEXT	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCTL_SET_NEXT(/;"	d
PSC_REG_MDCTL_SET_RESET_ISO	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDCTL_SET_RESET_ISO(/;"	d
PSC_REG_MDSTAT	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDSTAT(/;"	d
PSC_REG_MDSTAT_GET_LRSTDONE	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDSTAT_GET_LRSTDONE(/;"	d
PSC_REG_MDSTAT_GET_LRSTZ	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDSTAT_GET_LRSTZ(/;"	d
PSC_REG_MDSTAT_GET_MRSTDONE	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDSTAT_GET_MRSTDONE(/;"	d
PSC_REG_MDSTAT_GET_MRSTZ	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDSTAT_GET_MRSTZ(/;"	d
PSC_REG_MDSTAT_GET_STATUS	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_MDSTAT_GET_STATUS(/;"	d
PSC_REG_PDCTL	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PDCTL(/;"	d
PSC_REG_PDCTL_SET_NEXT	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PDCTL_SET_NEXT(/;"	d
PSC_REG_PDCTL_SET_PDMODE	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PDCTL_SET_PDMODE(/;"	d
PSC_REG_PDSTAT	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PDSTAT(/;"	d
PSC_REG_PDSTAT_GET_STATE	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PDSTAT_GET_STATE(/;"	d
PSC_REG_PSTAT	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PSTAT	/;"	d
PSC_REG_PTCMD	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_PTCMD /;"	d
PSC_REG_VAL_MDCTL_NEXT_OFF	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDCTL_NEXT_OFF /;"	d
PSC_REG_VAL_MDCTL_NEXT_ON	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDCTL_NEXT_ON /;"	d
PSC_REG_VAL_MDCTL_NEXT_SWRSTDISABLE	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDCTL_NEXT_SWRSTDISABLE /;"	d
PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG1	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG1 /;"	d
PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG2	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG2 /;"	d
PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG3	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG3 /;"	d
PSC_REG_VAL_MDSTAT_STATE_ENABLE_IN_PROG	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDSTAT_STATE_ENABLE_IN_PROG /;"	d
PSC_REG_VAL_MDSTAT_STATE_OFF	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDSTAT_STATE_OFF /;"	d
PSC_REG_VAL_MDSTAT_STATE_ON	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_MDSTAT_STATE_ON /;"	d
PSC_REG_VAL_PDCTL_NEXT_OFF	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_PDCTL_NEXT_OFF /;"	d
PSC_REG_VAL_PDCTL_NEXT_ON	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_PDCTL_NEXT_ON /;"	d
PSC_REG_VAL_PDCTL_PDMODE_SLEEP	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define PSC_REG_VAL_PDCTL_PDMODE_SLEEP /;"	d
PSC_RST_BRK_CHG_INT	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_RST_BRK_CHG_INT	/;"	d
PSC_RST_BRK_CHG_INT	include/mpc5xxx.h	/^#define PSC_RST_BRK_CHG_INT	/;"	d
PSC_RST_ERR_STAT	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_RST_ERR_STAT	/;"	d
PSC_RST_ERR_STAT	include/mpc5xxx.h	/^#define PSC_RST_ERR_STAT	/;"	d
PSC_RST_RX	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_RST_RX	/;"	d
PSC_RST_RX	include/mpc5xxx.h	/^#define PSC_RST_RX	/;"	d
PSC_RST_TX	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_RST_TX	/;"	d
PSC_RST_TX	include/mpc5xxx.h	/^#define PSC_RST_TX	/;"	d
PSC_RX_DISABLE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_RX_DISABLE	/;"	d
PSC_RX_DISABLE	include/mpc5xxx.h	/^#define PSC_RX_DISABLE	/;"	d
PSC_RX_ENABLE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_RX_ENABLE	/;"	d
PSC_RX_ENABLE	include/mpc5xxx.h	/^#define PSC_RX_ENABLE	/;"	d
PSC_RX_FIFO_ALARM	include/mpc5xxx.h	/^#define PSC_RX_FIFO_ALARM	/;"	d
PSC_RX_FIFO_EMPTY	include/mpc5xxx.h	/^#define PSC_RX_FIFO_EMPTY	/;"	d
PSC_RX_FIFO_ERR	include/mpc5xxx.h	/^#define PSC_RX_FIFO_ERR	/;"	d
PSC_RX_FIFO_FR	include/mpc5xxx.h	/^#define PSC_RX_FIFO_FR	/;"	d
PSC_RX_FIFO_FULL	include/mpc5xxx.h	/^#define PSC_RX_FIFO_FULL	/;"	d
PSC_RX_FIFO_OF	include/mpc5xxx.h	/^#define PSC_RX_FIFO_OF	/;"	d
PSC_RX_FIFO_UF	include/mpc5xxx.h	/^#define PSC_RX_FIFO_UF	/;"	d
PSC_SEL_MODE_REG_1	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SEL_MODE_REG_1	/;"	d
PSC_SEL_MODE_REG_1	include/mpc5xxx.h	/^#define PSC_SEL_MODE_REG_1	/;"	d
PSC_SILVER_BULLET	arch/arm/mach-davinci/include/mach/hardware.h	/^#define PSC_SILVER_BULLET	/;"	d
PSC_SR_CDE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SR_CDE	/;"	d
PSC_SR_CDE	include/mpc5xxx.h	/^#define PSC_SR_CDE	/;"	d
PSC_SR_FE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SR_FE	/;"	d
PSC_SR_FE	include/mpc5xxx.h	/^#define PSC_SR_FE	/;"	d
PSC_SR_OE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SR_OE	/;"	d
PSC_SR_OE	include/mpc5xxx.h	/^#define PSC_SR_OE	/;"	d
PSC_SR_PE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SR_PE	/;"	d
PSC_SR_PE	include/mpc5xxx.h	/^#define PSC_SR_PE	/;"	d
PSC_SR_RB	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SR_RB	/;"	d
PSC_SR_RB	include/mpc5xxx.h	/^#define PSC_SR_RB	/;"	d
PSC_SR_RXFULL	include/mpc5xxx.h	/^#define PSC_SR_RXFULL	/;"	d
PSC_SR_RXRDY	include/mpc5xxx.h	/^#define PSC_SR_RXRDY	/;"	d
PSC_SR_TXEMP	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_SR_TXEMP	/;"	d
PSC_SR_TXEMP	include/mpc5xxx.h	/^#define PSC_SR_TXEMP	/;"	d
PSC_SR_TXRDY	include/mpc5xxx.h	/^#define PSC_SR_TXRDY	/;"	d
PSC_START_BRK	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_START_BRK	/;"	d
PSC_START_BRK	include/mpc5xxx.h	/^#define PSC_START_BRK	/;"	d
PSC_STOP_BRK	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_STOP_BRK	/;"	d
PSC_STOP_BRK	include/mpc5xxx.h	/^#define PSC_STOP_BRK	/;"	d
PSC_SWRSTDISABLE	arch/arm/mach-davinci/include/mach/hardware.h	/^#define	PSC_SWRSTDISABLE	/;"	d
PSC_SWRSTDISABLE	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_SWRSTDISABLE	/;"	d
PSC_SYNCRESET	arch/arm/mach-davinci/include/mach/hardware.h	/^#define	PSC_SYNCRESET	/;"	d
PSC_SYNCRESET	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define PSC_SYNCRESET	/;"	d
PSC_TX_DISABLE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_TX_DISABLE	/;"	d
PSC_TX_DISABLE	include/mpc5xxx.h	/^#define PSC_TX_DISABLE	/;"	d
PSC_TX_ENABLE	arch/powerpc/include/asm/immap_512x.h	/^#define PSC_TX_ENABLE	/;"	d
PSC_TX_ENABLE	include/mpc5xxx.h	/^#define PSC_TX_ENABLE	/;"	d
PSDA_CODEC_RST	board/bf533-ezkit/psd4256.h	/^#define	PSDA_CODEC_RST	/;"	d
PSDA_LED4	board/bf533-ezkit/psd4256.h	/^#define	PSDA_LED4	/;"	d
PSDA_LED5	board/bf533-ezkit/psd4256.h	/^#define	PSDA_LED5	/;"	d
PSDA_LED6	board/bf533-ezkit/psd4256.h	/^#define	PSDA_LED6	/;"	d
PSDA_LED7	board/bf533-ezkit/psd4256.h	/^#define	PSDA_LED7	/;"	d
PSDA_LED8	board/bf533-ezkit/psd4256.h	/^#define	PSDA_LED8	/;"	d
PSDA_LED9	board/bf533-ezkit/psd4256.h	/^#define	PSDA_LED9	/;"	d
PSDA_PPICLK0	board/bf533-ezkit/psd4256.h	/^#define	PSDA_PPICLK0	/;"	d
PSDA_PPICLK1	board/bf533-ezkit/psd4256.h	/^#define	PSDA_PPICLK1	/;"	d
PSDA_VDEC_RST	board/bf533-ezkit/psd4256.h	/^#define	PSDA_VDEC_RST	/;"	d
PSDA_VENC_RST	board/bf533-ezkit/psd4256.h	/^#define	PSDA_VENC_RST	/;"	d
PSDMR_ACTTORW_1W	include/mpc8260.h	/^#define PSDMR_ACTTORW_1W /;"	d
PSDMR_ACTTORW_2W	include/mpc8260.h	/^#define PSDMR_ACTTORW_2W /;"	d
PSDMR_ACTTORW_3W	include/mpc8260.h	/^#define PSDMR_ACTTORW_3W /;"	d
PSDMR_ACTTORW_4W	include/mpc8260.h	/^#define PSDMR_ACTTORW_4W /;"	d
PSDMR_ACTTORW_5W	include/mpc8260.h	/^#define PSDMR_ACTTORW_5W /;"	d
PSDMR_ACTTORW_6W	include/mpc8260.h	/^#define PSDMR_ACTTORW_6W /;"	d
PSDMR_ACTTORW_7W	include/mpc8260.h	/^#define PSDMR_ACTTORW_7W /;"	d
PSDMR_ACTTORW_8W	include/mpc8260.h	/^#define PSDMR_ACTTORW_8W /;"	d
PSDMR_ACTTORW_MSK	include/mpc8260.h	/^#define PSDMR_ACTTORW_MSK /;"	d
PSDMR_BL	include/mpc8260.h	/^#define PSDMR_BL	/;"	d
PSDMR_BSMA_A12_A14	include/mpc8260.h	/^#define PSDMR_BSMA_A12_A14 /;"	d
PSDMR_BSMA_A13_A15	include/mpc8260.h	/^#define PSDMR_BSMA_A13_A15 /;"	d
PSDMR_BSMA_A14_A16	include/mpc8260.h	/^#define PSDMR_BSMA_A14_A16 /;"	d
PSDMR_BSMA_A15_A17	include/mpc8260.h	/^#define PSDMR_BSMA_A15_A17 /;"	d
PSDMR_BSMA_A16_A18	include/mpc8260.h	/^#define PSDMR_BSMA_A16_A18 /;"	d
PSDMR_BSMA_A17_A19	include/mpc8260.h	/^#define PSDMR_BSMA_A17_A19 /;"	d
PSDMR_BSMA_A18_A20	include/mpc8260.h	/^#define PSDMR_BSMA_A18_A20 /;"	d
PSDMR_BSMA_A19_A21	include/mpc8260.h	/^#define PSDMR_BSMA_A19_A21 /;"	d
PSDMR_BSMA_MSK	include/mpc8260.h	/^#define PSDMR_BSMA_MSK	/;"	d
PSDMR_BUFCMD	include/mpc8260.h	/^#define PSDMR_BUFCMD	/;"	d
PSDMR_CL_1	include/mpc8260.h	/^#define PSDMR_CL_1	/;"	d
PSDMR_CL_2	include/mpc8260.h	/^#define PSDMR_CL_2	/;"	d
PSDMR_CL_3	include/mpc8260.h	/^#define PSDMR_CL_3	/;"	d
PSDMR_CL_MSK	include/mpc8260.h	/^#define PSDMR_CL_MSK	/;"	d
PSDMR_EAMUX	include/mpc8260.h	/^#define PSDMR_EAMUX	/;"	d
PSDMR_LDOTOPRE_0C	include/mpc8260.h	/^#define PSDMR_LDOTOPRE_0C /;"	d
PSDMR_LDOTOPRE_1C	include/mpc8260.h	/^#define PSDMR_LDOTOPRE_1C /;"	d
PSDMR_LDOTOPRE_2C	include/mpc8260.h	/^#define PSDMR_LDOTOPRE_2C /;"	d
PSDMR_LDOTOPRE_MSK	include/mpc8260.h	/^#define PSDMR_LDOTOPRE_MSK /;"	d
PSDMR_OP_ACTB	include/mpc8260.h	/^#define PSDMR_OP_ACTB	/;"	d
PSDMR_OP_CBRR	include/mpc8260.h	/^#define PSDMR_OP_CBRR	/;"	d
PSDMR_OP_MRW	include/mpc8260.h	/^#define PSDMR_OP_MRW	/;"	d
PSDMR_OP_MSK	include/mpc8260.h	/^#define PSDMR_OP_MSK	/;"	d
PSDMR_OP_NORM	include/mpc8260.h	/^#define PSDMR_OP_NORM	/;"	d
PSDMR_OP_PREA	include/mpc8260.h	/^#define PSDMR_OP_PREA	/;"	d
PSDMR_OP_PREB	include/mpc8260.h	/^#define PSDMR_OP_PREB	/;"	d
PSDMR_OP_RW	include/mpc8260.h	/^#define PSDMR_OP_RW	/;"	d
PSDMR_OP_SELFR	include/mpc8260.h	/^#define PSDMR_OP_SELFR	/;"	d
PSDMR_PBI	include/mpc8260.h	/^#define PSDMR_PBI	/;"	d
PSDMR_PRETOACT_1W	include/mpc8260.h	/^#define PSDMR_PRETOACT_1W /;"	d
PSDMR_PRETOACT_2W	include/mpc8260.h	/^#define PSDMR_PRETOACT_2W /;"	d
PSDMR_PRETOACT_3W	include/mpc8260.h	/^#define PSDMR_PRETOACT_3W /;"	d
PSDMR_PRETOACT_4W	include/mpc8260.h	/^#define PSDMR_PRETOACT_4W /;"	d
PSDMR_PRETOACT_5W	include/mpc8260.h	/^#define PSDMR_PRETOACT_5W /;"	d
PSDMR_PRETOACT_6W	include/mpc8260.h	/^#define PSDMR_PRETOACT_6W /;"	d
PSDMR_PRETOACT_7W	include/mpc8260.h	/^#define PSDMR_PRETOACT_7W /;"	d
PSDMR_PRETOACT_8W	include/mpc8260.h	/^#define PSDMR_PRETOACT_8W /;"	d
PSDMR_PRETOACT_MSK	include/mpc8260.h	/^#define PSDMR_PRETOACT_MSK /;"	d
PSDMR_RFEN	include/mpc8260.h	/^#define PSDMR_RFEN	/;"	d
PSDMR_RFRC_16_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_16_CLK /;"	d
PSDMR_RFRC_3_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_3_CLK /;"	d
PSDMR_RFRC_4_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_4_CLK /;"	d
PSDMR_RFRC_5_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_5_CLK /;"	d
PSDMR_RFRC_6_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_6_CLK /;"	d
PSDMR_RFRC_7_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_7_CLK /;"	d
PSDMR_RFRC_8_CLK	include/mpc8260.h	/^#define PSDMR_RFRC_8_CLK /;"	d
PSDMR_RFRC_MSK	include/mpc8260.h	/^#define PSDMR_RFRC_MSK	/;"	d
PSDMR_SDA10_MSK	include/mpc8260.h	/^#define PSDMR_SDA10_MSK	/;"	d
PSDMR_SDA10_PBI0_A10	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A10 /;"	d
PSDMR_SDA10_PBI0_A11	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A11 /;"	d
PSDMR_SDA10_PBI0_A12	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A12 /;"	d
PSDMR_SDA10_PBI0_A5	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A5 /;"	d
PSDMR_SDA10_PBI0_A6	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A6 /;"	d
PSDMR_SDA10_PBI0_A7	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A7 /;"	d
PSDMR_SDA10_PBI0_A8	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A8 /;"	d
PSDMR_SDA10_PBI0_A9	include/mpc8260.h	/^#define PSDMR_SDA10_PBI0_A9 /;"	d
PSDMR_SDA10_PBI1_A10	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A10 /;"	d
PSDMR_SDA10_PBI1_A3	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A3 /;"	d
PSDMR_SDA10_PBI1_A4	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A4 /;"	d
PSDMR_SDA10_PBI1_A5	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A5 /;"	d
PSDMR_SDA10_PBI1_A6	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A6 /;"	d
PSDMR_SDA10_PBI1_A7	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A7 /;"	d
PSDMR_SDA10_PBI1_A8	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A8 /;"	d
PSDMR_SDA10_PBI1_A9	include/mpc8260.h	/^#define PSDMR_SDA10_PBI1_A9 /;"	d
PSDMR_SDAM_A13_IS_A5	include/mpc8260.h	/^#define PSDMR_SDAM_A13_IS_A5 /;"	d
PSDMR_SDAM_A14_IS_A5	include/mpc8260.h	/^#define PSDMR_SDAM_A14_IS_A5 /;"	d
PSDMR_SDAM_A15_IS_A5	include/mpc8260.h	/^#define PSDMR_SDAM_A15_IS_A5 /;"	d
PSDMR_SDAM_A16_IS_A5	include/mpc8260.h	/^#define PSDMR_SDAM_A16_IS_A5 /;"	d
PSDMR_SDAM_A17_IS_A5	include/mpc8260.h	/^#define PSDMR_SDAM_A17_IS_A5 /;"	d
PSDMR_SDAM_A18_IS_A5	include/mpc8260.h	/^#define PSDMR_SDAM_A18_IS_A5 /;"	d
PSDMR_SDAM_MSK	include/mpc8260.h	/^#define PSDMR_SDAM_MSK	/;"	d
PSDMR_WRC_1C	include/mpc8260.h	/^#define PSDMR_WRC_1C	/;"	d
PSDMR_WRC_2C	include/mpc8260.h	/^#define PSDMR_WRC_2C	/;"	d
PSDMR_WRC_3C	include/mpc8260.h	/^#define PSDMR_WRC_3C	/;"	d
PSDMR_WRC_4C	include/mpc8260.h	/^#define PSDMR_WRC_4C	/;"	d
PSDMR_WRC_MSK	include/mpc8260.h	/^#define PSDMR_WRC_MSK	/;"	d
PSDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PSDR	/;"	d
PSDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PSDR /;"	d
PSDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PSDR /;"	d
PSDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PSDR /;"	d
PSDR	drivers/serial/serial_sh.h	/^# define PSDR	/;"	d
PSDR	include/SA-1100.h	/^#define PSDR	/;"	d
PSDR_Flt	include/SA-1100.h	/^#define PSDR_Flt	/;"	d
PSDR_OutL	include/SA-1100.h	/^#define PSDR_OutL	/;"	d
PSD_PORTA_DIN	board/bf533-ezkit/psd4256.h	/^#define	PSD_PORTA_DIN	/;"	d
PSD_PORTA_DIR	board/bf533-ezkit/psd4256.h	/^#define	PSD_PORTA_DIR	/;"	d
PSD_PORTA_DOUT	board/bf533-ezkit/psd4256.h	/^#define	PSD_PORTA_DOUT	/;"	d
PSD_PORTB_DIN	board/bf533-ezkit/psd4256.h	/^#define	PSD_PORTB_DIN	/;"	d
PSD_PORTB_DIR	board/bf533-ezkit/psd4256.h	/^#define	PSD_PORTB_DIR	/;"	d
PSD_PORTB_DOUT	board/bf533-ezkit/psd4256.h	/^#define	PSD_PORTB_DOUT	/;"	d
PSEL0_A	board/espt/lowlevel_init.S	/^PSEL0_A:	.long	0xFFEF0070$/;"	l
PSEL0_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL0_A:	.long	0xffec0070$/;"	l
PSEL0_A	board/renesas/sh7763rdp/lowlevel_init.S	/^PSEL0_A:	.long	0xFFEF0070$/;"	l
PSEL0_D	board/espt/lowlevel_init.S	/^PSEL0_D:	.word	0x0001$/;"	l
PSEL0_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL0_D:	.long	0xfe00$/;"	l
PSEL0_D	board/renesas/sh7763rdp/lowlevel_init.S	/^PSEL0_D:	.word	0x00000001$/;"	l
PSEL1	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PSEL1 /;"	d	file:
PSEL1_A	board/espt/lowlevel_init.S	/^PSEL1_A:	.long	0xFFEF0072$/;"	l
PSEL1_A	board/renesas/sh7752evb/lowlevel_init.S	/^PSEL1_A:	.long	0xffec0072$/;"	l
PSEL1_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL1_A:	.long	0xffec0072$/;"	l
PSEL1_A	board/renesas/sh7763rdp/lowlevel_init.S	/^PSEL1_A:	.long	0xFFEF0072$/;"	l
PSEL1_D	board/espt/lowlevel_init.S	/^PSEL1_D:	.word	0x2400$/;"	l
PSEL1_D	board/renesas/sh7752evb/lowlevel_init.S	/^PSEL1_D:	.long	0x0000$/;"	l
PSEL1_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL1_D:	.long	0x0000$/;"	l
PSEL1_D	board/renesas/sh7763rdp/lowlevel_init.S	/^PSEL1_D:	.word	0x00000244$/;"	l
PSEL2	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PSEL2 /;"	d	file:
PSEL2_A	board/espt/lowlevel_init.S	/^PSEL2_A:	.long	0xFFEF0074$/;"	l
PSEL2_A	board/renesas/sh7752evb/lowlevel_init.S	/^PSEL2_A:	.long	0xffec0074$/;"	l
PSEL2_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL2_A:	.long	0xffec0074$/;"	l
PSEL2_D	board/espt/lowlevel_init.S	/^PSEL2_D:	.word	0x0000$/;"	l
PSEL2_D	board/renesas/sh7752evb/lowlevel_init.S	/^PSEL2_D:	.long	0x3000$/;"	l
PSEL2_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL2_D:	.long	0x3000$/;"	l
PSEL3	board/renesas/sh7763rdp/sh7763rdp.c	/^#define PSEL3 /;"	d	file:
PSEL3_A	board/espt/lowlevel_init.S	/^PSEL3_A:	.long	0xFFEF0076$/;"	l
PSEL3_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL3_A:	.long	0xffec0076$/;"	l
PSEL3_D	board/espt/lowlevel_init.S	/^PSEL3_D:	.word	0x2421$/;"	l
PSEL3_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL3_D:	.long	0xff00$/;"	l
PSEL4_A	board/espt/lowlevel_init.S	/^PSEL4_A:	.long	0xFFEF0078$/;"	l
PSEL4_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL4_A:	.long	0xffec0078$/;"	l
PSEL4_D	board/espt/lowlevel_init.S	/^PSEL4_D:	.word	0x0000$/;"	l
PSEL4_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL4_D:	.long	0x771f$/;"	l
PSEL5_A	board/renesas/sh7752evb/lowlevel_init.S	/^PSEL5_A:	.long	0xffec007a$/;"	l
PSEL5_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL5_A:	.long	0xffec007a$/;"	l
PSEL5_D	board/renesas/sh7752evb/lowlevel_init.S	/^PSEL5_D:	.long	0x0ffc$/;"	l
PSEL5_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL5_D:	.long	0x0ffc$/;"	l
PSEL6_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL6_A:	.long	0xffec007c$/;"	l
PSEL6_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL6_D:	.long	0x00ff$/;"	l
PSEL7_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL7_A:	.long	0xffec0082$/;"	l
PSEL7_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL7_D:	.long	0xfc00$/;"	l
PSEL8_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL8_A:	.long	0xffec0084$/;"	l
PSEL8_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PSEL8_D:	.long	0x0000$/;"	l
PSELA	arch/sh/include/asm/cpu_sh7720.h	/^#define PSELA	/;"	d
PSELA	arch/sh/include/asm/cpu_sh7722.h	/^#define PSELA /;"	d
PSELA	arch/sh/include/asm/cpu_sh7723.h	/^#define PSELA /;"	d
PSELA	arch/sh/include/asm/cpu_sh7724.h	/^#define PSELA /;"	d
PSELA_A	board/ms7720se/lowlevel_init.S	/^PSELA_A:	.long	PFC_BASE + 0x24$/;"	l
PSELA_A	board/ms7722se/lowlevel_init.S	/^PSELA_A:	.long	0xa405014E$/;"	l
PSELA_D	board/ms7720se/lowlevel_init.S	/^PSELA_D:	.word	0x0000$/;"	l
PSELA_D	board/ms7722se/lowlevel_init.S	/^PSELA_D:	.word	0x0A10$/;"	l
PSELA_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PSELA_D	/;"	d	file:
PSELB	arch/sh/include/asm/cpu_sh7720.h	/^#define PSELB	/;"	d
PSELB	arch/sh/include/asm/cpu_sh7722.h	/^#define PSELB /;"	d
PSELB	arch/sh/include/asm/cpu_sh7723.h	/^#define PSELB /;"	d
PSELB	arch/sh/include/asm/cpu_sh7724.h	/^#define PSELB /;"	d
PSELB_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PSELB_D	/;"	d	file:
PSELC	arch/sh/include/asm/cpu_sh7720.h	/^#define PSELC	/;"	d
PSELC	arch/sh/include/asm/cpu_sh7722.h	/^#define PSELC /;"	d
PSELC	arch/sh/include/asm/cpu_sh7723.h	/^#define PSELC /;"	d
PSELC	arch/sh/include/asm/cpu_sh7724.h	/^#define PSELC /;"	d
PSELC_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PSELC_D	/;"	d	file:
PSELD	arch/sh/include/asm/cpu_sh7720.h	/^#define PSELD	/;"	d
PSELD	arch/sh/include/asm/cpu_sh7722.h	/^#define PSELD /;"	d
PSELD	arch/sh/include/asm/cpu_sh7723.h	/^#define PSELD /;"	d
PSELD	arch/sh/include/asm/cpu_sh7724.h	/^#define PSELD /;"	d
PSELD_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PSELD_D	/;"	d	file:
PSELE	arch/sh/include/asm/cpu_sh7722.h	/^#define PSELE /;"	d
PSELE	arch/sh/include/asm/cpu_sh7724.h	/^#define PSELE /;"	d
PSF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	PSF	/;"	d
PSIZE	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PSIZE	/;"	d
PSIZE_1	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PSIZE_1	/;"	d
PSIZE_16	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define PSIZE_16	/;"	d
PSIZE_2	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PSIZE_2	/;"	d
PSIZE_32	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define PSIZE_32	/;"	d
PSIZE_4	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PSIZE_4	/;"	d
PSIZE_64	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define PSIZE_64	/;"	d
PSIZE_8	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PSIZE_8	/;"	d
PSIZE_8	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define PSIZE_8	/;"	d
PSIZE_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define PSIZE_P	/;"	d
PSLR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PSLR	/;"	d
PSLR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSLR	/;"	d
PSM	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PSM	/;"	d
PSNR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PSNR	/;"	d
PSNR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSNR	/;"	d
PSPR	arch/arm/cpu/sa1100/start.S	/^#define PSPR /;"	d	file:
PSPR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSPR	/;"	d
PSPR	include/SA-1100.h	/^#define PSPR	/;"	d
PSPR0	include/faraday/ftpmu010.h	/^	unsigned int	PSPR0;		\/* 0x50 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR1	include/faraday/ftpmu010.h	/^	unsigned int	PSPR1;		\/* 0x54 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR10	include/faraday/ftpmu010.h	/^	unsigned int	PSPR10;		\/* 0x78 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR11	include/faraday/ftpmu010.h	/^	unsigned int	PSPR11;		\/* 0x7C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR12	include/faraday/ftpmu010.h	/^	unsigned int	PSPR12;		\/* 0x80 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR13	include/faraday/ftpmu010.h	/^	unsigned int	PSPR13;		\/* 0x84 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR14	include/faraday/ftpmu010.h	/^	unsigned int	PSPR14;		\/* 0x88 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR15	include/faraday/ftpmu010.h	/^	unsigned int	PSPR15;		\/* 0x8C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR2	include/faraday/ftpmu010.h	/^	unsigned int	PSPR2;		\/* 0x58 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR3	include/faraday/ftpmu010.h	/^	unsigned int	PSPR3;		\/* 0x5C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR4	include/faraday/ftpmu010.h	/^	unsigned int	PSPR4;		\/* 0x60 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR5	include/faraday/ftpmu010.h	/^	unsigned int	PSPR5;		\/* 0x64 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR6	include/faraday/ftpmu010.h	/^	unsigned int	PSPR6;		\/* 0x68 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR7	include/faraday/ftpmu010.h	/^	unsigned int	PSPR7;		\/* 0x6C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR8	include/faraday/ftpmu010.h	/^	unsigned int	PSPR8;		\/* 0x70 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSPR9	include/faraday/ftpmu010.h	/^	unsigned int	PSPR9;		\/* 0x74 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
PSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSR	/;"	d
PSR	drivers/net/sh_eth.h	/^	PSR,$/;"	e	enum:__anon5ef54f5a0103
PSRAM_CRE_PIN	board/ronetix/pm9263/pm9263.c	/^#define PSRAM_CRE_PIN	/;"	d	file:
PSRAM_CTRL_REG	board/ronetix/pm9263/pm9263.c	/^#define PSRAM_CTRL_REG	/;"	d	file:
PSREN	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define PSREN	/;"	d
PSR_ACTIVE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PSR_ACTIVE	/;"	d
PSR_ACTIVE	arch/arm/mach-exynos/include/mach/dp.h	/^#define PSR_ACTIVE	/;"	d
PSR_C	arch/sparc/include/asm/psr.h	/^#define PSR_C /;"	d
PSR_CWP	arch/sparc/include/asm/psr.h	/^#define PSR_CWP /;"	d
PSR_EB_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_EB_PLB_MASK	/;"	d
PSR_EC	arch/sparc/include/asm/psr.h	/^#define PSR_EC /;"	d
PSR_EF	arch/sparc/include/asm/psr.h	/^#define PSR_EF /;"	d
PSR_ET	arch/sparc/include/asm/psr.h	/^#define PSR_ET /;"	d
PSR_ICC	arch/sparc/include/asm/psr.h	/^#define PSR_ICC /;"	d
PSR_IMPL	arch/sparc/include/asm/psr.h	/^#define PSR_IMPL /;"	d
PSR_INACTIVE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define PSR_INACTIVE	/;"	d
PSR_INACTIVE	arch/arm/mach-exynos/include/mach/dp.h	/^#define PSR_INACTIVE	/;"	d
PSR_INIT	arch/sparc/cpu/leon2/start.S	/^#define PSR_INIT /;"	d	file:
PSR_INIT	arch/sparc/cpu/leon3/start.S	/^#define PSR_INIT /;"	d	file:
PSR_ISETSTATE	arch/arm/include/asm/unified.h	/^#define PSR_ISETSTATE	/;"	d
PSR_LE	arch/sparc/include/asm/psr.h	/^#define PSR_LE /;"	d
PSR_N	arch/sparc/include/asm/psr.h	/^#define PSR_N /;"	d
PSR_NEW_MODE_EN	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_NEW_MODE_EN	/;"	d
PSR_OPB_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_OPB_PLB_MASK	/;"	d
PSR_PCI_ARBIT_EN	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PCI_ARBIT_EN	/;"	d
PSR_PCI_ASYNC_EN	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PCI_ASYNC_EN	/;"	d
PSR_PCI_PLB_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PCI_PLB_MASK	/;"	d
PSR_PERCLK_SYNC_MODE_EN	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PERCLK_SYNC_MODE_EN /;"	d
PSR_PIL	arch/sparc/include/asm/psr.h	/^#define PSR_PIL /;"	d
PSR_PIL_OFS	arch/sparc/include/asm/psr.h	/^#define PSR_PIL_OFS /;"	d
PSR_PLB_CPU_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PLB_CPU_MASK	/;"	d
PSR_PLL_FDBACK_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PLL_FDBACK_MASK	/;"	d
PSR_PLL_FWD_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PLL_FWD_MASK	/;"	d
PSR_PLL_TUNING_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_PLL_TUNING_MASK	/;"	d
PSR_PS	arch/sparc/include/asm/psr.h	/^#define PSR_PS /;"	d
PSR_ROM_LOC	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_ROM_LOC	/;"	d
PSR_ROM_WIDTH_MASK	arch/powerpc/include/asm/ppc405gp.h	/^#define PSR_ROM_WIDTH_MASK	/;"	d
PSR_S	arch/sparc/include/asm/psr.h	/^#define PSR_S /;"	d
PSR_V	arch/sparc/include/asm/psr.h	/^#define PSR_V /;"	d
PSR_VERS	arch/sparc/include/asm/psr.h	/^#define PSR_VERS /;"	d
PSR_Z	arch/sparc/include/asm/psr.h	/^#define PSR_Z /;"	d
PSS	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PSS	/;"	d
PSSE	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define PSSE	/;"	d
PSSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR	/;"	d
PSSR	include/SA-1100.h	/^#define PSSR	/;"	d
PSSR_BFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR_BFS	/;"	d
PSSR_BFS	include/SA-1100.h	/^#define PSSR_BFS	/;"	d
PSSR_DH	include/SA-1100.h	/^#define PSSR_DH	/;"	d
PSSR_OTGPH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR_OTGPH	/;"	d
PSSR_PH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR_PH	/;"	d
PSSR_PH	include/SA-1100.h	/^#define PSSR_PH	/;"	d
PSSR_RDH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR_RDH	/;"	d
PSSR_SS	include/SA-1100.h	/^#define PSSR_SS	/;"	d
PSSR_SSS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR_SSS	/;"	d
PSSR_VFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSSR_VFS	/;"	d
PSSR_VFS	include/SA-1100.h	/^#define PSSR_VFS	/;"	d
PSS_LATENCY_BUSMASTER	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define PSS_LATENCY_BUSMASTER	/;"	d
PSS_LATENCY_TRANSITION	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define PSS_LATENCY_TRANSITION	/;"	d
PSS_MAX_ENTRIES	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define PSS_MAX_ENTRIES	/;"	d
PSS_RATIO_STEP	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define PSS_RATIO_STEP	/;"	d
PSTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PSTR	/;"	d
PSTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PSTR	/;"	d
PSTS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PSTS	/;"	d
PSVAL	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define PSVAL	/;"	d
PSW	arch/nds32/cpu/n1213/start.S	/^#define PSW	/;"	d	file:
PSZ	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PSZ(/;"	d
PS_CALLINC_MASK	arch/xtensa/include/asm/regs.h	/^#define PS_CALLINC_MASK	/;"	d
PS_CALLINC_SHIFT	arch/xtensa/include/asm/regs.h	/^#define PS_CALLINC_SHIFT	/;"	d
PS_EXCM_BIT	arch/xtensa/include/asm/regs.h	/^#define PS_EXCM_BIT	/;"	d
PS_INTLEVEL_MASK	arch/xtensa/include/asm/regs.h	/^#define PS_INTLEVEL_MASK	/;"	d
PS_INTLEVEL_SHIFT	arch/xtensa/include/asm/regs.h	/^#define PS_INTLEVEL_SHIFT	/;"	d
PS_METHOD	doc/DocBook/Makefile	/^PS_METHOD	= $(prefer-db2x)$/;"	m
PS_MODE0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define PS_MODE0	/;"	d
PS_MODE1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define PS_MODE1	/;"	d
PS_MODE2	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define PS_MODE2	/;"	d
PS_MODE3	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define PS_MODE3	/;"	d
PS_OWB_MASK	arch/xtensa/include/asm/regs.h	/^#define PS_OWB_MASK	/;"	d
PS_OWB_SHIFT	arch/xtensa/include/asm/regs.h	/^#define PS_OWB_SHIFT	/;"	d
PS_RING_MASK	arch/xtensa/include/asm/regs.h	/^#define PS_RING_MASK	/;"	d
PS_RING_SHIFT	arch/xtensa/include/asm/regs.h	/^#define PS_RING_SHIFT	/;"	d
PS_S	arch/blackfin/include/asm/ptrace.h	/^#define PS_S /;"	d
PS_UM_BIT	arch/xtensa/include/asm/regs.h	/^#define PS_UM_BIT	/;"	d
PS_WOE_BIT	arch/xtensa/include/asm/regs.h	/^#define PS_WOE_BIT	/;"	d
PTCMD	arch/arm/mach-davinci/lowlevel_init.S	/^PTCMD:$/;"	l
PTCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PTCR	/;"	d
PTCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PTCR /;"	d
PTCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PTCR /;"	d
PTCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PTCR /;"	d
PTCR_A	board/ms7720se/lowlevel_init.S	/^PTCR_A:		.long	PFC_BASE + 0x1E$/;"	l
PTCR_A	board/renesas/sh7752evb/lowlevel_init.S	/^PTCR_A:		.long	0xffec0026$/;"	l
PTCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PTCR_A:		.long	0xffec0026$/;"	l
PTCR_D	board/ms7720se/lowlevel_init.S	/^PTCR_D:		.word	0x0280$/;"	l
PTCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PTCR_D	/;"	d	file:
PTCR_D	board/renesas/sh7752evb/lowlevel_init.S	/^PTCR_D:		.long	0x0000$/;"	l
PTCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PTCR_D:		.long	0x0000$/;"	l
PTC_RSVD	drivers/block/sata_ceva.c	/^#define PTC_RSVD	/;"	d	file:
PTC_RX_WM_VAL	drivers/block/sata_ceva.c	/^#define PTC_RX_WM_VAL	/;"	d	file:
PTD	arch/arm/include/asm/arch-omap3/mux.h	/^#define PTD	/;"	d
PTD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PTD /;"	d
PTD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PTD	/;"	d
PTD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define PTD /;"	d
PTD	arch/sparc/cpu/leon2/prom.c	/^#define PTD /;"	d	file:
PTD	arch/sparc/cpu/leon3/prom.c	/^#define PTD /;"	d	file:
PTDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PTDR	/;"	d
PTDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PTDR /;"	d
PTDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PTDR /;"	d
PTDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PTDR /;"	d
PTD_ACTIVE	drivers/usb/host/isp116x.h	/^#define PTD_ACTIVE(/;"	d
PTD_ACTIVE_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_ACTIVE_MSK	/;"	d
PTD_B5_5	drivers/usb/host/isp116x.h	/^#define PTD_B5_5(/;"	d
PTD_B5_5_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_B5_5_MSK	/;"	d
PTD_CC	drivers/usb/host/isp116x.h	/^#define PTD_CC(/;"	d
PTD_CC_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_CC_MSK	/;"	d
PTD_COUNT	drivers/usb/host/isp116x.h	/^#define PTD_COUNT(/;"	d
PTD_COUNT_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_COUNT_MSK	/;"	d
PTD_CTL_COMM_PREFETCH	include/MCD_dma.h	/^#define PTD_CTL_COMM_PREFETCH	/;"	d
PTD_CTL_TSK_PRI	include/MCD_dma.h	/^#define PTD_CTL_TSK_PRI	/;"	d
PTD_DBG_REQ	include/MCD_dma.h	/^#define PTD_DBG_REQ	/;"	d
PTD_DBG_TSK_VLD_INIT	include/MCD_dma.h	/^#define PTD_DBG_TSK_VLD_INIT	/;"	d
PTD_DIR	drivers/usb/host/isp116x.h	/^#define PTD_DIR(/;"	d
PTD_DIR_IN	drivers/usb/host/isp116x.h	/^#define	PTD_DIR_IN	/;"	d
PTD_DIR_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_DIR_MSK	/;"	d
PTD_DIR_OUT	drivers/usb/host/isp116x.h	/^#define	PTD_DIR_OUT	/;"	d
PTD_DIR_SETUP	drivers/usb/host/isp116x.h	/^#define	PTD_DIR_SETUP	/;"	d
PTD_DIR_STR	drivers/usb/host/isp116x-hcd.c	/^#define PTD_DIR_STR(/;"	d	file:
PTD_EP	drivers/usb/host/isp116x.h	/^#define PTD_EP(/;"	d
PTD_EP_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_EP_MSK	/;"	d
PTD_FA	drivers/usb/host/isp116x.h	/^#define PTD_FA(/;"	d
PTD_FA_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_FA_MSK	/;"	d
PTD_FMT	drivers/usb/host/isp116x.h	/^#define PTD_FMT(/;"	d
PTD_FMT_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_FMT_MSK	/;"	d
PTD_GET_ACTIVE	drivers/usb/host/isp116x.h	/^#define PTD_GET_ACTIVE(/;"	d
PTD_GET_B5_5	drivers/usb/host/isp116x.h	/^#define PTD_GET_B5_5(/;"	d
PTD_GET_CC	drivers/usb/host/isp116x.h	/^#define PTD_GET_CC(/;"	d
PTD_GET_COUNT	drivers/usb/host/isp116x.h	/^#define PTD_GET_COUNT(/;"	d
PTD_GET_DIR	drivers/usb/host/isp116x.h	/^#define PTD_GET_DIR(/;"	d
PTD_GET_EP	drivers/usb/host/isp116x.h	/^#define PTD_GET_EP(/;"	d
PTD_GET_FA	drivers/usb/host/isp116x.h	/^#define PTD_GET_FA(/;"	d
PTD_GET_FMT	drivers/usb/host/isp116x.h	/^#define PTD_GET_FMT(/;"	d
PTD_GET_LAST	drivers/usb/host/isp116x.h	/^#define PTD_GET_LAST(/;"	d
PTD_GET_LEN	drivers/usb/host/isp116x.h	/^#define PTD_GET_LEN(/;"	d
PTD_GET_MPS	drivers/usb/host/isp116x.h	/^#define PTD_GET_MPS(/;"	d
PTD_GET_SPD	drivers/usb/host/isp116x.h	/^#define PTD_GET_SPD(/;"	d
PTD_GET_TOGGLE	drivers/usb/host/isp116x.h	/^#define PTD_GET_TOGGLE(/;"	d
PTD_LAST	drivers/usb/host/isp116x.h	/^#define PTD_LAST(/;"	d
PTD_LAST_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_LAST_MSK	/;"	d
PTD_LEN	drivers/usb/host/isp116x.h	/^#define PTD_LEN(/;"	d
PTD_LEN_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_LEN_MSK	/;"	d
PTD_MPS	drivers/usb/host/isp116x.h	/^#define PTD_MPS(/;"	d
PTD_MPS_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_MPS_MSK	/;"	d
PTD_SPD	drivers/usb/host/isp116x.h	/^#define PTD_SPD(/;"	d
PTD_SPD_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_SPD_MSK	/;"	d
PTD_TOGGLE	drivers/usb/host/isp116x.h	/^#define PTD_TOGGLE(/;"	d
PTD_TOGGLE_MSK	drivers/usb/host/isp116x.h	/^#define	PTD_TOGGLE_MSK	/;"	d
PTE	arch/powerpc/include/asm/mmu.h	/^} PTE;$/;"	t	typeref:struct:_PTE
PTE	arch/sparc/cpu/leon2/prom.c	/^#define PTE /;"	d	file:
PTE	arch/sparc/cpu/leon3/prom.c	/^#define PTE /;"	d	file:
PTEA	arch/sh/include/asm/cpu_sh7750.h	/^#define PTEA	/;"	d
PTEH	arch/sh/include/asm/cpu_sh7720.h	/^#define PTEH	/;"	d
PTEH	arch/sh/include/asm/cpu_sh7722.h	/^#define PTEH	/;"	d
PTEH	arch/sh/include/asm/cpu_sh7723.h	/^#define PTEH	/;"	d
PTEH	arch/sh/include/asm/cpu_sh7724.h	/^#define PTEH	/;"	d
PTEH	arch/sh/include/asm/cpu_sh7750.h	/^#define PTEH	/;"	d
PTEH	arch/sh/include/asm/cpu_sh7780.h	/^#define	PTEH	/;"	d
PTEL	arch/sh/include/asm/cpu_sh7720.h	/^#define PTEL	/;"	d
PTEL	arch/sh/include/asm/cpu_sh7722.h	/^#define PTEL	/;"	d
PTEL	arch/sh/include/asm/cpu_sh7723.h	/^#define PTEL	/;"	d
PTEL	arch/sh/include/asm/cpu_sh7724.h	/^#define PTEL	/;"	d
PTEL	arch/sh/include/asm/cpu_sh7750.h	/^#define PTEL	/;"	d
PTEL	arch/sh/include/asm/cpu_sh7780.h	/^#define	PTEL	/;"	d
PTE_BLOCK	arch/arm/cpu/armv8/cache_v8.c	/^	PTE_BLOCK,$/;"	e	enum:pte_type	file:
PTE_BLOCK_AF	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_AF	/;"	d
PTE_BLOCK_BITS	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_BITS	/;"	d
PTE_BLOCK_INNER_SHARE	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_INNER_SHARE	/;"	d
PTE_BLOCK_MEMTYPE	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_MEMTYPE(/;"	d
PTE_BLOCK_NG	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_NG	/;"	d
PTE_BLOCK_NON_SHARE	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_NON_SHARE	/;"	d
PTE_BLOCK_NS	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_NS /;"	d
PTE_BLOCK_OUTER_SHARE	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_OUTER_SHARE	/;"	d
PTE_BLOCK_PXN	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_PXN	/;"	d
PTE_BLOCK_UXN	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_BLOCK_UXN	/;"	d
PTE_INVAL	arch/arm/cpu/armv8/cache_v8.c	/^	PTE_INVAL,$/;"	e	enum:pte_type	file:
PTE_LEVEL	arch/arm/cpu/armv8/cache_v8.c	/^	PTE_LEVEL,$/;"	e	enum:pte_type	file:
PTE_TABLE_AP	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TABLE_AP	/;"	d
PTE_TABLE_NS	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TABLE_NS	/;"	d
PTE_TABLE_PXN	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TABLE_PXN	/;"	d
PTE_TABLE_XN	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TABLE_XN	/;"	d
PTE_TYPE_BLOCK	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TYPE_BLOCK	/;"	d
PTE_TYPE_FAULT	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TYPE_FAULT	/;"	d
PTE_TYPE_MASK	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TYPE_MASK	/;"	d
PTE_TYPE_TABLE	arch/arm/include/asm/armv8/mmu.h	/^#define PTE_TYPE_TABLE	/;"	d
PTM1LA	arch/powerpc/include/asm/4xx_pci.h	/^#define PTM1LA /;"	d
PTM1MS	arch/powerpc/include/asm/4xx_pci.h	/^#define PTM1MS /;"	d
PTM2LA	arch/powerpc/include/asm/4xx_pci.h	/^#define PTM2LA /;"	d
PTM2MS	arch/powerpc/include/asm/4xx_pci.h	/^#define PTM2MS /;"	d
PTN_INTR	drivers/mtd/nand/denali.h	/^#define PTN_INTR	/;"	d
PTN_INTR_EN	drivers/mtd/nand/denali.h	/^#define PTN_INTR_EN	/;"	d
PTN_INTR_EN__ACCESS_ERROR_BANK0	drivers/mtd/nand/denali.h	/^#define     PTN_INTR_EN__ACCESS_ERROR_BANK0	/;"	d
PTN_INTR_EN__ACCESS_ERROR_BANK1	drivers/mtd/nand/denali.h	/^#define     PTN_INTR_EN__ACCESS_ERROR_BANK1	/;"	d
PTN_INTR_EN__ACCESS_ERROR_BANK2	drivers/mtd/nand/denali.h	/^#define     PTN_INTR_EN__ACCESS_ERROR_BANK2	/;"	d
PTN_INTR_EN__ACCESS_ERROR_BANK3	drivers/mtd/nand/denali.h	/^#define     PTN_INTR_EN__ACCESS_ERROR_BANK3	/;"	d
PTN_INTR_EN__CONFIG_ERROR	drivers/mtd/nand/denali.h	/^#define     PTN_INTR_EN__CONFIG_ERROR	/;"	d
PTN_INTR_EN__REG_ACCESS_ERROR	drivers/mtd/nand/denali.h	/^#define     PTN_INTR_EN__REG_ACCESS_ERROR	/;"	d
PTN_INTR__ACCESS_ERROR_BANK0	drivers/mtd/nand/denali.h	/^#define     PTN_INTR__ACCESS_ERROR_BANK0	/;"	d
PTN_INTR__ACCESS_ERROR_BANK1	drivers/mtd/nand/denali.h	/^#define     PTN_INTR__ACCESS_ERROR_BANK1	/;"	d
PTN_INTR__ACCESS_ERROR_BANK2	drivers/mtd/nand/denali.h	/^#define     PTN_INTR__ACCESS_ERROR_BANK2	/;"	d
PTN_INTR__ACCESS_ERROR_BANK3	drivers/mtd/nand/denali.h	/^#define     PTN_INTR__ACCESS_ERROR_BANK3	/;"	d
PTN_INTR__CONFIG_ERROR	drivers/mtd/nand/denali.h	/^#define     PTN_INTR__CONFIG_ERROR	/;"	d
PTN_INTR__REG_ACCESS_ERROR	drivers/mtd/nand/denali.h	/^#define     PTN_INTR__REG_ACCESS_ERROR	/;"	d
PTR	arch/mips/include/asm/asm.h	/^#define PTR	/;"	d
PTR	fs/jffs2/compr_lzo.c	/^#define PTR(/;"	d	file:
PTR3_TDINIT0	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PTR3_TDINIT0(/;"	d
PTR3_TDINIT0	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PTR3_TDINIT0(/;"	d
PTR3_TDINIT1	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PTR3_TDINIT1(/;"	d
PTR3_TDINIT1	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PTR3_TDINIT1(/;"	d
PTR4_TDINIT2	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PTR4_TDINIT2(/;"	d
PTR4_TDINIT2	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PTR4_TDINIT2(/;"	d
PTR4_TDINIT3	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define PTR4_TDINIT3(/;"	d
PTR4_TDINIT3	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define PTR4_TDINIT3(/;"	d
PTRACE_GETDSPREGS	arch/sh/include/asm/ptrace.h	/^#define	PTRACE_GETDSPREGS	/;"	d
PTRACE_GETFDPIC	arch/blackfin/include/asm/ptrace.h	/^#define PTRACE_GETFDPIC /;"	d
PTRACE_GETFDPIC_EXEC	arch/blackfin/include/asm/ptrace.h	/^#define PTRACE_GETFDPIC_EXEC /;"	d
PTRACE_GETFDPIC_INTERP	arch/blackfin/include/asm/ptrace.h	/^#define PTRACE_GETFDPIC_INTERP /;"	d
PTRACE_GETFPAREGS	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_GETFPAREGS /;"	d
PTRACE_GETFPREGS	arch/arm/include/asm/ptrace.h	/^#define PTRACE_GETFPREGS	/;"	d
PTRACE_GETFPREGS	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_GETFPREGS /;"	d
PTRACE_GETFPREGS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_GETFPREGS /;"	d
PTRACE_GETFPREGS	arch/xtensa/include/asm/ptrace.h	/^#define PTRACE_GETFPREGS /;"	d
PTRACE_GETFPREGSIZE	arch/xtensa/include/asm/ptrace.h	/^#define PTRACE_GETFPREGSIZE /;"	d
PTRACE_GETFPXREGS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_GETFPXREGS /;"	d
PTRACE_GETREGS	arch/arm/include/asm/ptrace.h	/^#define PTRACE_GETREGS	/;"	d
PTRACE_GETREGS	arch/blackfin/include/asm/ptrace.h	/^#define PTRACE_GETREGS /;"	d
PTRACE_GETREGS	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_GETREGS /;"	d
PTRACE_GETREGS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_GETREGS /;"	d
PTRACE_GETREGS	arch/xtensa/include/asm/ptrace.h	/^#define PTRACE_GETREGS /;"	d
PTRACE_GETUCODE	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_GETUCODE /;"	d
PTRACE_O_TRACESYSGOOD	arch/arm/include/asm/ptrace.h	/^#define PTRACE_O_TRACESYSGOOD	/;"	d
PTRACE_O_TRACESYSGOOD	arch/sh/include/asm/ptrace.h	/^#define PTRACE_O_TRACESYSGOOD /;"	d
PTRACE_O_TRACESYSGOOD	arch/x86/include/asm/ptrace.h	/^#define PTRACE_O_TRACESYSGOOD /;"	d
PTRACE_READDATA	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_READDATA /;"	d
PTRACE_READTEXT	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_READTEXT /;"	d
PTRACE_SETDSPREGS	arch/sh/include/asm/ptrace.h	/^#define	PTRACE_SETDSPREGS	/;"	d
PTRACE_SETFPAREGS	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_SETFPAREGS /;"	d
PTRACE_SETFPREGS	arch/arm/include/asm/ptrace.h	/^#define PTRACE_SETFPREGS	/;"	d
PTRACE_SETFPREGS	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_SETFPREGS /;"	d
PTRACE_SETFPREGS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_SETFPREGS /;"	d
PTRACE_SETFPREGS	arch/xtensa/include/asm/ptrace.h	/^#define PTRACE_SETFPREGS /;"	d
PTRACE_SETFPXREGS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_SETFPXREGS /;"	d
PTRACE_SETOPTIONS	arch/arm/include/asm/ptrace.h	/^#define PTRACE_SETOPTIONS	/;"	d
PTRACE_SETOPTIONS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_SETOPTIONS /;"	d
PTRACE_SETREGS	arch/arm/include/asm/ptrace.h	/^#define PTRACE_SETREGS	/;"	d
PTRACE_SETREGS	arch/blackfin/include/asm/ptrace.h	/^#define PTRACE_SETREGS /;"	d
PTRACE_SETREGS	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_SETREGS /;"	d
PTRACE_SETREGS	arch/x86/include/asm/ptrace.h	/^#define PTRACE_SETREGS /;"	d
PTRACE_SETREGS	arch/xtensa/include/asm/ptrace.h	/^#define PTRACE_SETREGS /;"	d
PTRACE_SUNATTACH	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_SUNATTACH /;"	d
PTRACE_SUNDETACH	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_SUNDETACH /;"	d
PTRACE_WRITEDATA	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_WRITEDATA /;"	d
PTRACE_WRITETEXT	arch/sparc/include/asm/ptrace.h	/^#define PTRACE_WRITETEXT /;"	d
PTRLOG	arch/mips/include/asm/asm.h	/^#define PTRLOG	/;"	d
PTRSIZE	arch/mips/include/asm/asm.h	/^#define PTRSIZE	/;"	d
PTR_ADD	arch/mips/include/asm/asm.h	/^#define PTR_ADD	/;"	d
PTR_ADDI	arch/mips/include/asm/asm.h	/^#define PTR_ADDI	/;"	d
PTR_ADDIU	arch/mips/include/asm/asm.h	/^#define PTR_ADDIU	/;"	d
PTR_ADDU	arch/mips/include/asm/asm.h	/^#define PTR_ADDU	/;"	d
PTR_ALIGN	include/linux/kernel.h	/^#define PTR_ALIGN(/;"	d
PTR_ALIGNED2_4	fs/jffs2/compr_lzo.c	/^#define PTR_ALIGNED2_4(/;"	d	file:
PTR_ALIGNED2_8	fs/jffs2/compr_lzo.c	/^#define PTR_ALIGNED2_8(/;"	d	file:
PTR_ALIGNED_4	fs/jffs2/compr_lzo.c	/^#define PTR_ALIGNED_4(/;"	d	file:
PTR_ALIGNED_8	fs/jffs2/compr_lzo.c	/^#define PTR_ALIGNED_8(/;"	d	file:
PTR_AUTOINC	drivers/net/smc91111.h	/^#define	PTR_AUTOINC	/;"	d
PTR_COUNT_SHIFT	arch/mips/cpu/u-boot.lds	/^#define PTR_COUNT_SHIFT	/;"	d	file:
PTR_DIFF	fs/jffs2/compr_lzo.c	/^#define PTR_DIFF(/;"	d	file:
PTR_ERR	include/linux/err.h	/^static inline long PTR_ERR(const void *ptr)$/;"	f	typeref:typename:long
PTR_GE	fs/jffs2/compr_lzo.c	/^#define PTR_GE(/;"	d	file:
PTR_L	arch/mips/include/asm/asm.h	/^#define PTR_L	/;"	d
PTR_LA	arch/mips/include/asm/asm.h	/^#define PTR_LA	/;"	d
PTR_LI	arch/mips/include/asm/asm.h	/^#define PTR_LI	/;"	d
PTR_LINEAR	fs/jffs2/compr_lzo.c	/^#define PTR_LINEAR(/;"	d	file:
PTR_LT	fs/jffs2/compr_lzo.c	/^#define PTR_LT(/;"	d	file:
PTR_NOTEMPTY	drivers/net/smc91111.h	/^#define PTR_NOTEMPTY	/;"	d
PTR_RCV	drivers/net/smc91111.h	/^#define	PTR_RCV	/;"	d
PTR_READ	drivers/net/smc91111.h	/^#define PTR_READ	/;"	d
PTR_REG	drivers/net/smc91111.h	/^#define PTR_REG	/;"	d
PTR_S	arch/mips/include/asm/asm.h	/^#define PTR_S	/;"	d
PTR_SCALESHIFT	arch/mips/include/asm/asm.h	/^#define PTR_SCALESHIFT	/;"	d
PTR_SLL	arch/mips/include/asm/asm.h	/^#define PTR_SLL	/;"	d
PTR_SLLV	arch/mips/include/asm/asm.h	/^#define PTR_SLLV	/;"	d
PTR_SRA	arch/mips/include/asm/asm.h	/^#define PTR_SRA	/;"	d
PTR_SRAV	arch/mips/include/asm/asm.h	/^#define PTR_SRAV	/;"	d
PTR_SRL	arch/mips/include/asm/asm.h	/^#define PTR_SRL	/;"	d
PTR_SRLV	arch/mips/include/asm/asm.h	/^#define PTR_SRLV	/;"	d
PTR_SUB	arch/mips/include/asm/asm.h	/^#define PTR_SUB	/;"	d
PTR_SUBU	arch/mips/include/asm/asm.h	/^#define PTR_SUBU	/;"	d
PTR_TO_REAL_MODE	arch/x86/lib/bios.h	/^#define PTR_TO_REAL_MODE(/;"	d
PTS	drivers/usb/gadget/ci_udc.h	/^#define PTS(/;"	d
PTS1_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS1_MASK	/;"	d
PTS1_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS1_SHIFT	/;"	d
PTSTAT	arch/arm/mach-davinci/lowlevel_init.S	/^PTSTAT:$/;"	l
PTS_ENABLE	drivers/usb/gadget/ci_udc.h	/^#define PTS_ENABLE	/;"	d
PTS_HSIC	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_HSIC	/;"	d
PTS_ICUSB_SER	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_ICUSB_SER	/;"	d
PTS_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_MASK	/;"	d
PTS_RESERVED	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_RESERVED	/;"	d
PTS_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_SHIFT	/;"	d
PTS_ULPI	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_ULPI	/;"	d
PTS_UTMI	arch/arm/include/asm/arch-tegra/usb.h	/^#define PTS_UTMI	/;"	d
PTU	arch/arm/include/asm/arch-omap3/mux.h	/^#define PTU	/;"	d
PTU	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define PTU /;"	d
PTU	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PTU	/;"	d
PTU	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define PTU /;"	d
PTV	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define PTV	/;"	d
PTXFE_HALF	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PTXFE_HALF	/;"	d
PTXFE_ZERO	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PTXFE_ZERO	/;"	d
PTX_FIFO_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define PTX_FIFO_SIZE	/;"	d
PTYPE_ENDPOINT	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^	PTYPE_ENDPOINT		= 0x0,$/;"	e	enum:__anon6535c0830103	file:
PTYPE_LEGACY_ENDPOINT	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^	PTYPE_LEGACY_ENDPOINT	= 0x1,$/;"	e	enum:__anon6535c0830103	file:
PTYPE_ROOT_PORT	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^	PTYPE_ROOT_PORT		= 0x4,$/;"	e	enum:__anon6535c0830103	file:
PT_A0W	arch/blackfin/include/asm/ptrace.h	/^#define PT_A0W /;"	d
PT_A0X	arch/blackfin/include/asm/ptrace.h	/^#define PT_A0X /;"	d
PT_A1W	arch/blackfin/include/asm/ptrace.h	/^#define PT_A1W /;"	d
PT_A1X	arch/blackfin/include/asm/ptrace.h	/^#define PT_A1X /;"	d
PT_AREG	arch/xtensa/cpu/start.S	/^#define PT_AREG	/;"	d	file:
PT_ASTAT	arch/blackfin/include/asm/ptrace.h	/^#define PT_ASTAT /;"	d
PT_B0	arch/blackfin/include/asm/ptrace.h	/^#define PT_B0 /;"	d
PT_B1	arch/blackfin/include/asm/ptrace.h	/^#define PT_B1 /;"	d
PT_B2	arch/blackfin/include/asm/ptrace.h	/^#define PT_B2 /;"	d
PT_B3	arch/blackfin/include/asm/ptrace.h	/^#define PT_B3 /;"	d
PT_CCR	arch/powerpc/include/asm/ptrace.h	/^#define PT_CCR	/;"	d
PT_CTR	arch/powerpc/include/asm/ptrace.h	/^#define PT_CTR	/;"	d
PT_DATA_ADDR	arch/blackfin/include/asm/ptrace.h	/^#define PT_DATA_ADDR /;"	d
PT_DATA_ADDR	arch/microblaze/include/asm/ptrace.h	/^#define PT_DATA_ADDR /;"	d
PT_DATA_LEN	arch/microblaze/include/asm/ptrace.h	/^#define PT_DATA_LEN /;"	d
PT_DEBUGCAUSE	arch/xtensa/cpu/start.S	/^#define PT_DEBUGCAUSE	/;"	d	file:
PT_DEPC	arch/xtensa/cpu/start.S	/^#define PT_DEPC	/;"	d	file:
PT_DYNAMIC	include/elf.h	/^#define PT_DYNAMIC	/;"	d
PT_EXCCAUSE	arch/xtensa/cpu/start.S	/^#define PT_EXCCAUSE	/;"	d	file:
PT_EXCVADDR	arch/xtensa/cpu/start.S	/^#define PT_EXCVADDR	/;"	d	file:
PT_FDPIC_EXEC	arch/blackfin/include/asm/ptrace.h	/^#define PT_FDPIC_EXEC /;"	d
PT_FDPIC_INTERP	arch/blackfin/include/asm/ptrace.h	/^#define PT_FDPIC_INTERP /;"	d
PT_FP	arch/blackfin/include/asm/ptrace.h	/^#define PT_FP /;"	d
PT_FP	arch/sparc/include/asm/ptrace.h	/^#define PT_FP /;"	d
PT_FP	arch/sparc/include/asm/stack.h	/^#define PT_FP	/;"	d
PT_FPR0	arch/powerpc/include/asm/ptrace.h	/^#define PT_FPR0	/;"	d
PT_FPR31	arch/powerpc/include/asm/ptrace.h	/^#define PT_FPR31 /;"	d
PT_FPSCR	arch/powerpc/include/asm/ptrace.h	/^#define PT_FPSCR /;"	d
PT_G0	arch/sparc/include/asm/ptrace.h	/^#define PT_G0 /;"	d
PT_G0	arch/sparc/include/asm/stack.h	/^#define PT_G0	/;"	d
PT_G1	arch/sparc/include/asm/ptrace.h	/^#define PT_G1 /;"	d
PT_G1	arch/sparc/include/asm/stack.h	/^#define PT_G1	/;"	d
PT_G2	arch/sparc/include/asm/ptrace.h	/^#define PT_G2 /;"	d
PT_G2	arch/sparc/include/asm/stack.h	/^#define PT_G2	/;"	d
PT_G3	arch/sparc/include/asm/ptrace.h	/^#define PT_G3 /;"	d
PT_G3	arch/sparc/include/asm/stack.h	/^#define PT_G3	/;"	d
PT_G4	arch/sparc/include/asm/ptrace.h	/^#define PT_G4 /;"	d
PT_G4	arch/sparc/include/asm/stack.h	/^#define PT_G4	/;"	d
PT_G5	arch/sparc/include/asm/ptrace.h	/^#define PT_G5 /;"	d
PT_G5	arch/sparc/include/asm/stack.h	/^#define PT_G5	/;"	d
PT_G6	arch/sparc/include/asm/ptrace.h	/^#define PT_G6 /;"	d
PT_G6	arch/sparc/include/asm/stack.h	/^#define PT_G6	/;"	d
PT_G7	arch/sparc/include/asm/ptrace.h	/^#define PT_G7 /;"	d
PT_G7	arch/sparc/include/asm/stack.h	/^#define PT_G7	/;"	d
PT_GPR	arch/microblaze/include/asm/ptrace.h	/^#define PT_GPR(/;"	d
PT_GPR10	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR10 /;"	d
PT_GPR11	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR11 /;"	d
PT_GPR12	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR12 /;"	d
PT_GPR13	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR13 /;"	d
PT_GPR14	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR14 /;"	d
PT_GPR15	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR15 /;"	d
PT_GPR16	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR16 /;"	d
PT_GPR17	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR17 /;"	d
PT_GPR18	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR18 /;"	d
PT_GPR19	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR19 /;"	d
PT_GPR2	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR2 /;"	d
PT_GPR20	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR20 /;"	d
PT_GPR21	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR21 /;"	d
PT_GPR22	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR22 /;"	d
PT_GPR23	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR23 /;"	d
PT_GPR24	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR24 /;"	d
PT_GPR25	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR25 /;"	d
PT_GPR26	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR26 /;"	d
PT_GPR27	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR27 /;"	d
PT_GPR28	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR28 /;"	d
PT_GPR29	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR29 /;"	d
PT_GPR3	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR3 /;"	d
PT_GPR30	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR30 /;"	d
PT_GPR31	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR31 /;"	d
PT_GPR4	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR4 /;"	d
PT_GPR5	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR5 /;"	d
PT_GPR6	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR6 /;"	d
PT_GPR7	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR7 /;"	d
PT_GPR8	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR8 /;"	d
PT_GPR9	arch/openrisc/include/asm/ptrace.h	/^#define PT_GPR9 /;"	d
PT_HIOS	include/elf.h	/^#define PT_HIOS	/;"	d
PT_HIPROC	include/elf.h	/^#define PT_HIPROC	/;"	d
PT_I0	arch/blackfin/include/asm/ptrace.h	/^#define PT_I0 /;"	d
PT_I0	arch/sparc/include/asm/ptrace.h	/^#define PT_I0 /;"	d
PT_I0	arch/sparc/include/asm/stack.h	/^#define PT_I0	/;"	d
PT_I1	arch/blackfin/include/asm/ptrace.h	/^#define PT_I1 /;"	d
PT_I1	arch/sparc/include/asm/ptrace.h	/^#define PT_I1 /;"	d
PT_I1	arch/sparc/include/asm/stack.h	/^#define PT_I1	/;"	d
PT_I2	arch/blackfin/include/asm/ptrace.h	/^#define PT_I2 /;"	d
PT_I2	arch/sparc/include/asm/ptrace.h	/^#define PT_I2 /;"	d
PT_I2	arch/sparc/include/asm/stack.h	/^#define PT_I2	/;"	d
PT_I3	arch/blackfin/include/asm/ptrace.h	/^#define PT_I3 /;"	d
PT_I3	arch/sparc/include/asm/ptrace.h	/^#define PT_I3 /;"	d
PT_I3	arch/sparc/include/asm/stack.h	/^#define PT_I3	/;"	d
PT_I4	arch/sparc/include/asm/ptrace.h	/^#define PT_I4 /;"	d
PT_I4	arch/sparc/include/asm/stack.h	/^#define PT_I4	/;"	d
PT_I5	arch/sparc/include/asm/ptrace.h	/^#define PT_I5 /;"	d
PT_I5	arch/sparc/include/asm/stack.h	/^#define PT_I5	/;"	d
PT_I6	arch/sparc/include/asm/ptrace.h	/^#define PT_I6 /;"	d
PT_I6	arch/sparc/include/asm/stack.h	/^#define PT_I6	/;"	d
PT_I7	arch/sparc/include/asm/ptrace.h	/^#define PT_I7 /;"	d
PT_I7	arch/sparc/include/asm/stack.h	/^#define PT_I7	/;"	d
PT_ICOUNTLEVEL	arch/xtensa/cpu/start.S	/^#define PT_ICOUNTLEVEL	/;"	d	file:
PT_INTERP	include/elf.h	/^#define PT_INTERP	/;"	d
PT_IPEND	arch/blackfin/include/asm/ptrace.h	/^#define PT_IPEND /;"	d
PT_KERNEL_MODE	arch/microblaze/include/asm/ptrace.h	/^#define PT_KERNEL_MODE	/;"	d
PT_L0	arch/blackfin/include/asm/ptrace.h	/^#define PT_L0 /;"	d
PT_L1	arch/blackfin/include/asm/ptrace.h	/^#define PT_L1 /;"	d
PT_L2	arch/blackfin/include/asm/ptrace.h	/^#define PT_L2 /;"	d
PT_L3	arch/blackfin/include/asm/ptrace.h	/^#define PT_L3 /;"	d
PT_LB0	arch/blackfin/include/asm/ptrace.h	/^#define PT_LB0 /;"	d
PT_LB1	arch/blackfin/include/asm/ptrace.h	/^#define PT_LB1 /;"	d
PT_LBEG	arch/xtensa/cpu/start.S	/^#define PT_LBEG	/;"	d	file:
PT_LC0	arch/blackfin/include/asm/ptrace.h	/^#define PT_LC0 /;"	d
PT_LC1	arch/blackfin/include/asm/ptrace.h	/^#define PT_LC1 /;"	d
PT_LCOUNT	arch/xtensa/cpu/start.S	/^#define PT_LCOUNT	/;"	d	file:
PT_LEND	arch/xtensa/cpu/start.S	/^#define PT_LEND	/;"	d	file:
PT_LNK	arch/powerpc/include/asm/ptrace.h	/^#define PT_LNK	/;"	d
PT_LOAD	include/elf.h	/^#define PT_LOAD	/;"	d
PT_LOAD_ALL	arch/sparc/include/asm/winmacro.h	/^#define PT_LOAD_ALL(/;"	d
PT_LOAD_GLOBALS	arch/sparc/include/asm/winmacro.h	/^#define PT_LOAD_GLOBALS(/;"	d
PT_LOAD_INS	arch/sparc/include/asm/winmacro.h	/^#define PT_LOAD_INS(/;"	d
PT_LOAD_PRIV	arch/sparc/include/asm/winmacro.h	/^#define PT_LOAD_PRIV(/;"	d
PT_LOAD_YREG	arch/sparc/include/asm/winmacro.h	/^#define PT_LOAD_YREG(/;"	d
PT_LOOS	include/elf.h	/^#define PT_LOOS	/;"	d
PT_LOPROC	include/elf.h	/^#define PT_LOPROC	/;"	d
PT_LT0	arch/blackfin/include/asm/ptrace.h	/^#define PT_LT0 /;"	d
PT_LT1	arch/blackfin/include/asm/ptrace.h	/^#define PT_LT1 /;"	d
PT_M0	arch/blackfin/include/asm/ptrace.h	/^#define PT_M0 /;"	d
PT_M1	arch/blackfin/include/asm/ptrace.h	/^#define PT_M1 /;"	d
PT_M2	arch/blackfin/include/asm/ptrace.h	/^#define PT_M2 /;"	d
PT_M3	arch/blackfin/include/asm/ptrace.h	/^#define PT_M3 /;"	d
PT_MASK	arch/powerpc/include/asm/mmu.h	/^#define PT_MASK /;"	d
PT_MQ	arch/powerpc/include/asm/ptrace.h	/^#define PT_MQ	/;"	d
PT_MSR	arch/powerpc/include/asm/ptrace.h	/^#define PT_MSR	/;"	d
PT_NIP	arch/powerpc/include/asm/ptrace.h	/^#define PT_NIP	/;"	d
PT_NOTE	include/elf.h	/^#define PT_NOTE	/;"	d
PT_NPC	arch/sparc/include/asm/ptrace.h	/^#define PT_NPC /;"	d
PT_NPC	arch/sparc/include/asm/stack.h	/^#define PT_NPC	/;"	d
PT_NULL	include/elf.h	/^#define PT_NULL	/;"	d
PT_NUM	include/elf.h	/^#define PT_NUM	/;"	d
PT_ORIG_GPR11	arch/openrisc/include/asm/ptrace.h	/^#define PT_ORIG_GPR11 /;"	d
PT_ORIG_P0	arch/blackfin/include/asm/ptrace.h	/^#define PT_ORIG_P0 /;"	d
PT_ORIG_R0	arch/blackfin/include/asm/ptrace.h	/^#define PT_ORIG_R0 /;"	d
PT_ORIG_R3	arch/powerpc/include/asm/ptrace.h	/^#define PT_ORIG_R3 /;"	d
PT_P0	arch/blackfin/include/asm/ptrace.h	/^#define PT_P0 /;"	d
PT_P1	arch/blackfin/include/asm/ptrace.h	/^#define PT_P1 /;"	d
PT_P2	arch/blackfin/include/asm/ptrace.h	/^#define PT_P2 /;"	d
PT_P3	arch/blackfin/include/asm/ptrace.h	/^#define PT_P3 /;"	d
PT_P4	arch/blackfin/include/asm/ptrace.h	/^#define PT_P4 /;"	d
PT_P5	arch/blackfin/include/asm/ptrace.h	/^#define PT_P5 /;"	d
PT_PC	arch/blackfin/include/asm/ptrace.h	/^#define PT_PC /;"	d
PT_PC	arch/microblaze/include/asm/ptrace.h	/^#define PT_PC	/;"	d
PT_PC	arch/openrisc/include/asm/ptrace.h	/^#define PT_PC	/;"	d
PT_PC	arch/sparc/include/asm/ptrace.h	/^#define PT_PC /;"	d
PT_PC	arch/sparc/include/asm/stack.h	/^#define PT_PC	/;"	d
PT_PC	arch/xtensa/cpu/start.S	/^#define PT_PC	/;"	d	file:
PT_PHDR	include/elf.h	/^#define PT_PHDR	/;"	d
PT_PS	arch/xtensa/cpu/start.S	/^#define PT_PS	/;"	d	file:
PT_PSR	arch/sparc/include/asm/ptrace.h	/^#define PT_PSR /;"	d
PT_PSR	arch/sparc/include/asm/stack.h	/^#define PT_PSR	/;"	d
PT_PSW	arch/microblaze/include/asm/ptrace.h	/^#define PT_PSW	/;"	d
PT_R0	arch/blackfin/include/asm/ptrace.h	/^#define PT_R0 /;"	d
PT_R0	arch/nds32/include/asm/ptrace.h	/^#define PT_R0	/;"	d
PT_R0	arch/powerpc/include/asm/ptrace.h	/^#define PT_R0	/;"	d
PT_R1	arch/blackfin/include/asm/ptrace.h	/^#define PT_R1 /;"	d
PT_R1	arch/nds32/include/asm/ptrace.h	/^#define PT_R1	/;"	d
PT_R1	arch/powerpc/include/asm/ptrace.h	/^#define PT_R1	/;"	d
PT_R10	arch/nds32/include/asm/ptrace.h	/^#define PT_R10	/;"	d
PT_R10	arch/powerpc/include/asm/ptrace.h	/^#define PT_R10	/;"	d
PT_R11	arch/nds32/include/asm/ptrace.h	/^#define PT_R11	/;"	d
PT_R11	arch/powerpc/include/asm/ptrace.h	/^#define PT_R11	/;"	d
PT_R12	arch/nds32/include/asm/ptrace.h	/^#define PT_R12	/;"	d
PT_R12	arch/powerpc/include/asm/ptrace.h	/^#define PT_R12	/;"	d
PT_R13	arch/nds32/include/asm/ptrace.h	/^#define PT_R13	/;"	d
PT_R13	arch/powerpc/include/asm/ptrace.h	/^#define PT_R13	/;"	d
PT_R14	arch/nds32/include/asm/ptrace.h	/^#define PT_R14	/;"	d
PT_R14	arch/powerpc/include/asm/ptrace.h	/^#define PT_R14	/;"	d
PT_R15	arch/nds32/include/asm/ptrace.h	/^#define PT_R15	/;"	d
PT_R15	arch/powerpc/include/asm/ptrace.h	/^#define PT_R15	/;"	d
PT_R16	arch/nds32/include/asm/ptrace.h	/^#define PT_R16	/;"	d
PT_R16	arch/powerpc/include/asm/ptrace.h	/^#define PT_R16	/;"	d
PT_R17	arch/nds32/include/asm/ptrace.h	/^#define PT_R17	/;"	d
PT_R17	arch/powerpc/include/asm/ptrace.h	/^#define PT_R17	/;"	d
PT_R18	arch/nds32/include/asm/ptrace.h	/^#define PT_R18	/;"	d
PT_R18	arch/powerpc/include/asm/ptrace.h	/^#define PT_R18	/;"	d
PT_R19	arch/nds32/include/asm/ptrace.h	/^#define PT_R19	/;"	d
PT_R19	arch/powerpc/include/asm/ptrace.h	/^#define PT_R19	/;"	d
PT_R2	arch/blackfin/include/asm/ptrace.h	/^#define PT_R2 /;"	d
PT_R2	arch/nds32/include/asm/ptrace.h	/^#define PT_R2	/;"	d
PT_R2	arch/powerpc/include/asm/ptrace.h	/^#define PT_R2	/;"	d
PT_R20	arch/nds32/include/asm/ptrace.h	/^#define PT_R20	/;"	d
PT_R20	arch/powerpc/include/asm/ptrace.h	/^#define PT_R20	/;"	d
PT_R21	arch/nds32/include/asm/ptrace.h	/^#define PT_R21	/;"	d
PT_R21	arch/powerpc/include/asm/ptrace.h	/^#define PT_R21	/;"	d
PT_R22	arch/nds32/include/asm/ptrace.h	/^#define PT_R22	/;"	d
PT_R22	arch/powerpc/include/asm/ptrace.h	/^#define PT_R22	/;"	d
PT_R23	arch/nds32/include/asm/ptrace.h	/^#define PT_R23	/;"	d
PT_R23	arch/powerpc/include/asm/ptrace.h	/^#define PT_R23	/;"	d
PT_R24	arch/nds32/include/asm/ptrace.h	/^#define PT_R24	/;"	d
PT_R24	arch/powerpc/include/asm/ptrace.h	/^#define PT_R24	/;"	d
PT_R25	arch/nds32/include/asm/ptrace.h	/^#define PT_R25	/;"	d
PT_R25	arch/powerpc/include/asm/ptrace.h	/^#define PT_R25	/;"	d
PT_R26	arch/powerpc/include/asm/ptrace.h	/^#define PT_R26	/;"	d
PT_R27	arch/powerpc/include/asm/ptrace.h	/^#define PT_R27	/;"	d
PT_R28	arch/powerpc/include/asm/ptrace.h	/^#define PT_R28	/;"	d
PT_R29	arch/powerpc/include/asm/ptrace.h	/^#define PT_R29	/;"	d
PT_R3	arch/blackfin/include/asm/ptrace.h	/^#define PT_R3 /;"	d
PT_R3	arch/nds32/include/asm/ptrace.h	/^#define PT_R3	/;"	d
PT_R3	arch/powerpc/include/asm/ptrace.h	/^#define PT_R3	/;"	d
PT_R30	arch/powerpc/include/asm/ptrace.h	/^#define PT_R30	/;"	d
PT_R31	arch/powerpc/include/asm/ptrace.h	/^#define PT_R31	/;"	d
PT_R4	arch/blackfin/include/asm/ptrace.h	/^#define PT_R4 /;"	d
PT_R4	arch/nds32/include/asm/ptrace.h	/^#define PT_R4	/;"	d
PT_R4	arch/powerpc/include/asm/ptrace.h	/^#define PT_R4	/;"	d
PT_R5	arch/blackfin/include/asm/ptrace.h	/^#define PT_R5 /;"	d
PT_R5	arch/nds32/include/asm/ptrace.h	/^#define PT_R5	/;"	d
PT_R5	arch/powerpc/include/asm/ptrace.h	/^#define PT_R5	/;"	d
PT_R6	arch/blackfin/include/asm/ptrace.h	/^#define PT_R6 /;"	d
PT_R6	arch/nds32/include/asm/ptrace.h	/^#define PT_R6	/;"	d
PT_R6	arch/powerpc/include/asm/ptrace.h	/^#define PT_R6	/;"	d
PT_R7	arch/blackfin/include/asm/ptrace.h	/^#define PT_R7 /;"	d
PT_R7	arch/nds32/include/asm/ptrace.h	/^#define PT_R7	/;"	d
PT_R7	arch/powerpc/include/asm/ptrace.h	/^#define PT_R7	/;"	d
PT_R8	arch/nds32/include/asm/ptrace.h	/^#define PT_R8	/;"	d
PT_R8	arch/powerpc/include/asm/ptrace.h	/^#define PT_R8	/;"	d
PT_R9	arch/nds32/include/asm/ptrace.h	/^#define PT_R9	/;"	d
PT_R9	arch/powerpc/include/asm/ptrace.h	/^#define PT_R9	/;"	d
PT_REGS	include/ppc_defs.h	/^#define	PT_REGS	/;"	d
PT_REGS_OFFSET	arch/xtensa/include/asm/ptrace.h	/^#define PT_REGS_OFFSET	/;"	d
PT_REGS_SET_SYSCALL	arch/microblaze/include/asm/ptrace.h	/^#define PT_REGS_SET_SYSCALL(/;"	d
PT_REGS_SYSCALL	arch/microblaze/include/asm/ptrace.h	/^#define PT_REGS_SYSCALL(/;"	d
PT_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define PT_REGS_SZ	/;"	d
PT_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define PT_REGS_SZ /;"	d
PT_RESERVED	arch/blackfin/include/asm/ptrace.h	/^#define PT_RESERVED /;"	d
PT_RESERVED	arch/xtensa/cpu/start.S	/^#define PT_RESERVED	/;"	d	file:
PT_RETE	arch/blackfin/include/asm/ptrace.h	/^#define PT_RETE /;"	d
PT_RETN	arch/blackfin/include/asm/ptrace.h	/^#define PT_RETN /;"	d
PT_RETS	arch/blackfin/include/asm/ptrace.h	/^#define PT_RETS /;"	d
PT_RETX	arch/blackfin/include/asm/ptrace.h	/^#define PT_RETX /;"	d
PT_SAR	arch/xtensa/cpu/start.S	/^#define PT_SAR	/;"	d	file:
PT_SEQSTAT	arch/blackfin/include/asm/ptrace.h	/^#define PT_SEQSTAT /;"	d
PT_SHIFT	arch/powerpc/include/asm/mmu.h	/^#define PT_SHIFT /;"	d
PT_SHLIB	include/elf.h	/^#define PT_SHLIB	/;"	d
PT_SINGLESTEP	arch/microblaze/include/asm/ptrace.h	/^#define PT_SINGLESTEP	/;"	d
PT_SIZE	arch/microblaze/include/asm/ptrace.h	/^#define PT_SIZE	/;"	d
PT_SIZE	arch/xtensa/cpu/start.S	/^#define PT_SIZE	/;"	d	file:
PT_SP	arch/openrisc/include/asm/ptrace.h	/^#define PT_SP /;"	d
PT_SR	arch/openrisc/include/asm/ptrace.h	/^#define PT_SR /;"	d
PT_STORE_ALL	arch/sparc/include/asm/winmacro.h	/^#define PT_STORE_ALL(/;"	d
PT_STORE_GLOBALS	arch/sparc/include/asm/winmacro.h	/^#define PT_STORE_GLOBALS(/;"	d
PT_STORE_INS	arch/sparc/include/asm/winmacro.h	/^#define PT_STORE_INS(/;"	d
PT_STORE_PRIV	arch/sparc/include/asm/winmacro.h	/^#define PT_STORE_PRIV(/;"	d
PT_STORE_YREG	arch/sparc/include/asm/winmacro.h	/^#define PT_STORE_YREG(/;"	d
PT_SYSCALL	arch/microblaze/include/asm/ptrace.h	/^#define PT_SYSCALL	/;"	d
PT_SYSCALL	arch/xtensa/cpu/start.S	/^#define PT_SYSCALL	/;"	d	file:
PT_SYSCALLNO	arch/openrisc/include/asm/ptrace.h	/^#define PT_SYSCALLNO /;"	d
PT_SYSCFG	arch/blackfin/include/asm/ptrace.h	/^#define PT_SYSCFG /;"	d
PT_TEXT_ADDR	arch/blackfin/include/asm/ptrace.h	/^#define PT_TEXT_ADDR /;"	d
PT_TEXT_ADDR	arch/microblaze/include/asm/ptrace.h	/^#define PT_TEXT_ADDR /;"	d
PT_TEXT_END_ADDR	arch/blackfin/include/asm/ptrace.h	/^#define PT_TEXT_END_ADDR /;"	d
PT_TEXT_LEN	arch/microblaze/include/asm/ptrace.h	/^#define PT_TEXT_LEN /;"	d
PT_TLS	include/elf.h	/^#define PT_TLS	/;"	d
PT_USP	arch/blackfin/include/asm/ptrace.h	/^#define PT_USP /;"	d
PT_WIM	arch/sparc/include/asm/ptrace.h	/^#define PT_WIM /;"	d
PT_WIM	arch/sparc/include/asm/stack.h	/^#define PT_WIM	/;"	d
PT_WINDOWBASE	arch/xtensa/cpu/start.S	/^#define PT_WINDOWBASE	/;"	d	file:
PT_WINDOWSTART	arch/xtensa/cpu/start.S	/^#define PT_WINDOWSTART	/;"	d	file:
PT_WMASK	arch/xtensa/cpu/start.S	/^#define PT_WMASK	/;"	d	file:
PT_XER	arch/powerpc/include/asm/ptrace.h	/^#define PT_XER	/;"	d
PT_Y	arch/sparc/include/asm/ptrace.h	/^#define PT_Y /;"	d
PT_Y	arch/sparc/include/asm/stack.h	/^#define PT_Y	/;"	d
PUB_ROM_DATA_SIZE	arch/arm/cpu/armv7/am33xx/Kconfig	/^config PUB_ROM_DATA_SIZE$/;"	c
PUCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PUCR	/;"	d
PUCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PUCR /;"	d
PUCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PUCR /;"	d
PUCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PUCR /;"	d
PUCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PUCR_A:		.long	0xffec0028$/;"	l
PUCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PUCR_D	/;"	d	file:
PUCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PUCR_D:		.long	0x0000$/;"	l
PUCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PUCR_D:		.long	0x0055$/;"	l
PUCTL_ATA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_ATA,$/;"	e	enum:pmux_pullid	file:
PUCTL_ATB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_ATB,$/;"	e	enum:pmux_pullid	file:
PUCTL_ATC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_ATC,$/;"	e	enum:pmux_pullid	file:
PUCTL_ATD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_ATD,$/;"	e	enum:pmux_pullid	file:
PUCTL_ATE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_ATE,$/;"	e	enum:pmux_pullid	file:
PUCTL_CDEV1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_CDEV1,$/;"	e	enum:pmux_pullid	file:
PUCTL_CDEV2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_CDEV2,$/;"	e	enum:pmux_pullid	file:
PUCTL_CK32	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_CK32,$/;"	e	enum:pmux_pullid	file:
PUCTL_CRTP	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_CRTP,$/;"	e	enum:pmux_pullid	file:
PUCTL_CSUS	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_CSUS,$/;"	e	enum:pmux_pullid	file:
PUCTL_DAP1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DAP1,$/;"	e	enum:pmux_pullid	file:
PUCTL_DAP2	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DAP2,$/;"	e	enum:pmux_pullid	file:
PUCTL_DAP3	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DAP3,$/;"	e	enum:pmux_pullid	file:
PUCTL_DAP4	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DAP4,$/;"	e	enum:pmux_pullid	file:
PUCTL_DDC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DDC,$/;"	e	enum:pmux_pullid	file:
PUCTL_DDRC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DDRC,$/;"	e	enum:pmux_pullid	file:
PUCTL_DTA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DTA,$/;"	e	enum:pmux_pullid	file:
PUCTL_DTB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DTB,$/;"	e	enum:pmux_pullid	file:
PUCTL_DTC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DTC,$/;"	e	enum:pmux_pullid	file:
PUCTL_DTD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DTD,$/;"	e	enum:pmux_pullid	file:
PUCTL_DTE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DTE,$/;"	e	enum:pmux_pullid	file:
PUCTL_DTF	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_DTF,$/;"	e	enum:pmux_pullid	file:
PUCTL_GMA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GMA,$/;"	e	enum:pmux_pullid	file:
PUCTL_GMB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GMB,$/;"	e	enum:pmux_pullid	file:
PUCTL_GMC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GMC,$/;"	e	enum:pmux_pullid	file:
PUCTL_GMD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GMD,$/;"	e	enum:pmux_pullid	file:
PUCTL_GME	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GME,$/;"	e	enum:pmux_pullid	file:
PUCTL_GPSLXAU	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GPSLXAU,$/;"	e	enum:pmux_pullid	file:
PUCTL_GPU7	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GPU7,$/;"	e	enum:pmux_pullid	file:
PUCTL_GPV	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_GPV,$/;"	e	enum:pmux_pullid	file:
PUCTL_I2CP	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_I2CP,$/;"	e	enum:pmux_pullid	file:
PUCTL_IRRX	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_IRRX,$/;"	e	enum:pmux_pullid	file:
PUCTL_IRTX	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_IRTX,$/;"	e	enum:pmux_pullid	file:
PUCTL_KBCA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_KBCA,$/;"	e	enum:pmux_pullid	file:
PUCTL_KBCB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_KBCB,$/;"	e	enum:pmux_pullid	file:
PUCTL_KBCC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_KBCC,$/;"	e	enum:pmux_pullid	file:
PUCTL_KBCD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_KBCD,$/;"	e	enum:pmux_pullid	file:
PUCTL_KBCE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_KBCE,$/;"	e	enum:pmux_pullid	file:
PUCTL_KBCF	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_KBCF,$/;"	e	enum:pmux_pullid	file:
PUCTL_LC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_LC,$/;"	e	enum:pmux_pullid	file:
PUCTL_LD17	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_LD17,$/;"	e	enum:pmux_pullid	file:
PUCTL_LD19_18	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_LD19_18,$/;"	e	enum:pmux_pullid	file:
PUCTL_LD21_20	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_LD21_20,$/;"	e	enum:pmux_pullid	file:
PUCTL_LD23_22	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_LD23_22,$/;"	e	enum:pmux_pullid	file:
PUCTL_LS	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_LS,$/;"	e	enum:pmux_pullid	file:
PUCTL_NONE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_NONE = -1$/;"	e	enum:pmux_pullid	file:
PUCTL_OWC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_OWC,$/;"	e	enum:pmux_pullid	file:
PUCTL_PMCA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_PMCA,$/;"	e	enum:pmux_pullid	file:
PUCTL_PMCB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_PMCB,$/;"	e	enum:pmux_pullid	file:
PUCTL_PMCC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_PMCC,$/;"	e	enum:pmux_pullid	file:
PUCTL_PMCD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_PMCD,$/;"	e	enum:pmux_pullid	file:
PUCTL_PMCE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_PMCE,$/;"	e	enum:pmux_pullid	file:
PUCTL_PTA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_PTA,$/;"	e	enum:pmux_pullid	file:
PUCTL_RESERVED45	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_RESERVED45,$/;"	e	enum:pmux_pullid	file:
PUCTL_RM	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_RM,$/;"	e	enum:pmux_pullid	file:
PUCTL_SDC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SDC,$/;"	e	enum:pmux_pullid	file:
PUCTL_SDD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SDD,$/;"	e	enum:pmux_pullid	file:
PUCTL_SDMMC1	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SDMMC1,$/;"	e	enum:pmux_pullid	file:
PUCTL_SLXC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SLXC,$/;"	e	enum:pmux_pullid	file:
PUCTL_SLXD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SLXD,$/;"	e	enum:pmux_pullid	file:
PUCTL_SLXK	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SLXK,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPDI	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPDI,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPDO	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPDO,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIA,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIB,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIC,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPID	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPID,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIE	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIE,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIF	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIF,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIG	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIG,$/;"	e	enum:pmux_pullid	file:
PUCTL_SPIH	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_SPIH,$/;"	e	enum:pmux_pullid	file:
PUCTL_UAA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UAA,$/;"	e	enum:pmux_pullid	file:
PUCTL_UAB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UAB,$/;"	e	enum:pmux_pullid	file:
PUCTL_UAC	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UAC,$/;"	e	enum:pmux_pullid	file:
PUCTL_UAD	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UAD,$/;"	e	enum:pmux_pullid	file:
PUCTL_UCA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UCA,$/;"	e	enum:pmux_pullid	file:
PUCTL_UCB	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UCB,$/;"	e	enum:pmux_pullid	file:
PUCTL_UDA	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_UDA,$/;"	e	enum:pmux_pullid	file:
PUCTL_XM2C	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_XM2C,$/;"	e	enum:pmux_pullid	file:
PUCTL_XM2D	arch/arm/mach-tegra/tegra20/pinmux.c	/^	PUCTL_XM2D,$/;"	e	enum:pmux_pullid	file:
PUDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PUDR	/;"	d
PUDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PUDR /;"	d
PUDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PUDR /;"	d
PUDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PUDR /;"	d
PUEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PUEN(/;"	d
PUEN_USB1_OVC	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define PUEN_USB1_OVC /;"	d
PUEN_USB1_PWEN	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define PUEN_USB1_PWEN /;"	d
PULCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PULCR	/;"	d
PULCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PULCR /;"	d
PULCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PULCR /;"	d
PULLBYTE	lib/zlib/inflate.c	/^#define PULLBYTE(/;"	d	file:
PULLDOWN_EN	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define PULLDOWN_EN	/;"	d
PULLDOWN_EN	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define PULLDOWN_EN	/;"	d
PULLDOWN_EN	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define PULLDOWN_EN	/;"	d
PULLDOWN_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PULLDOWN_EN	/;"	d
PULLUDDIS	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define PULLUDDIS	/;"	d
PULLUDDIS	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define PULLUDDIS	/;"	d
PULLUDDIS	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define PULLUDDIS	/;"	d
PULLUDDIS	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define PULLUDDIS	/;"	d
PULLUDEN	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define PULLUDEN	/;"	d
PULLUDEN	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define PULLUDEN	/;"	d
PULLUDEN	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define PULLUDEN	/;"	d
PULLUDEN	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define PULLUDEN	/;"	d
PULLUP_EN	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define PULLUP_EN	/;"	d
PULLUP_EN	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define PULLUP_EN	/;"	d
PULLUP_EN	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define PULLUP_EN	/;"	d
PULLUP_EN	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define PULLUP_EN	/;"	d
PULLUP_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PULLUP_EN	/;"	d
PULL_DIS	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define PULL_DIS /;"	d
PULL_DIS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DIS	include/dt-bindings/pinctrl/dra.h	/^#define PULL_DIS	/;"	d
PULL_DISABLE	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	include/dt-bindings/pinctrl/am33xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DISABLE	include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_DISABLE	/;"	d
PULL_DOWN	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define PULL_DOWN /;"	d
PULL_ENA	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_ENA	include/dt-bindings/pinctrl/dra.h	/^#define PULL_ENA	/;"	d
PULL_ENA	include/dt-bindings/pinctrl/omap.h	/^#define PULL_ENA	/;"	d
PULL_MASK	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define PULL_MASK /;"	d
PULL_MASK	drivers/gpio/s5p_gpio.c	/^#define PULL_MASK(/;"	d	file:
PULL_MODE	drivers/gpio/s5p_gpio.c	/^#define PULL_MODE(/;"	d	file:
PULL_OFFSET	arch/arm/cpu/arm926ejs/mxs/iomux.c	/^#define	PULL_OFFSET	/;"	d	file:
PULL_REG	arch/arm/mach-tegra/pinmux-common.c	/^#define PULL_REG(/;"	d	file:
PULL_SEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PULL_SEL	/;"	d
PULL_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define PULL_SHIFT(/;"	d	file:
PULL_STR_20K	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_20K	include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_20K	/;"	d
PULL_STR_2K	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_STR_2K	include/dt-bindings/gpio/x86-gpio.h	/^#define PULL_STR_2K	/;"	d
PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define PULL_UP /;"	d
PULL_UP	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULL_UP	include/dt-bindings/pinctrl/am43xx.h	/^#define PULL_UP	/;"	d
PULL_UP	include/dt-bindings/pinctrl/dra.h	/^#define PULL_UP	/;"	d
PULL_UP	include/dt-bindings/pinctrl/omap.h	/^#define PULL_UP	/;"	d
PULSE_HI	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define PULSE_HI	/;"	d
PUNIT_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define PUNIT_BASE_ADDRESS	/;"	d
PUNIT_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define PUNIT_BASE_SIZE	/;"	d
PUP	arch/arm/mach-at91/arm920t/at91rm9200_devices.c	/^# define PUP /;"	d	file:
PUP	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^# define PUP /;"	d	file:
PUP	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^# define PUP /;"	d	file:
PUP	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^# define PUP /;"	d	file:
PUP	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^# define PUP /;"	d	file:
PUP	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^# define PUP /;"	d	file:
PUP	lib/zlib/inffast.c	/^#  define PUP(/;"	d	file:
PUPR1	board/renesas/silk/silk.c	/^#define PUPR1	/;"	d	file:
PUPR10	board/renesas/blanche/blanche.c	/^#define	PUPR10	/;"	d	file:
PUPR11	board/renesas/blanche/blanche.c	/^#define	PUPR11	/;"	d	file:
PUPR1_DREQ0_N	board/renesas/silk/silk.c	/^#define PUPR1_DREQ0_N	/;"	d	file:
PUPR2	board/renesas/blanche/blanche.c	/^#define	PUPR2	/;"	d	file:
PUPR3	board/renesas/blanche/blanche.c	/^#define	PUPR3	/;"	d	file:
PUPR3	board/renesas/silk/silk.c	/^#define PUPR3	/;"	d	file:
PUPR3	board/renesas/stout/cpld.c	/^#define PUPR3	/;"	d	file:
PUPR3_ETH	board/renesas/silk/silk.c	/^#define PUPR3_ETH	/;"	d	file:
PUPR3_SD3_DAT1	board/renesas/stout/cpld.c	/^#define PUPR3_SD3_DAT1	/;"	d	file:
PUPR4	board/renesas/blanche/blanche.c	/^#define	PUPR4	/;"	d	file:
PUPR5	board/renesas/blanche/blanche.c	/^#define	PUPR5	/;"	d	file:
PUPR5	board/renesas/gose/gose.c	/^#define PUPR5	/;"	d	file:
PUPR5	board/renesas/koelsch/koelsch.c	/^#define PUPR5 /;"	d	file:
PUPR5	board/renesas/porter/porter.c	/^#define PUPR5	/;"	d	file:
PUPR5_ETH	board/renesas/gose/gose.c	/^#define PUPR5_ETH	/;"	d	file:
PUPR5_ETH	board/renesas/koelsch/koelsch.c	/^#define PUPR5_ETH /;"	d	file:
PUPR5_ETH	board/renesas/porter/porter.c	/^#define PUPR5_ETH	/;"	d	file:
PUPR5_ETH_MAGIC	board/renesas/gose/gose.c	/^#define PUPR5_ETH_MAGIC	/;"	d	file:
PUPR5_ETH_MAGIC	board/renesas/koelsch/koelsch.c	/^#define PUPR5_ETH_MAGIC	/;"	d	file:
PUPR5_ETH_MAGIC	board/renesas/porter/porter.c	/^#define PUPR5_ETH_MAGIC	/;"	d	file:
PUPR7	board/renesas/blanche/blanche.c	/^#define	PUPR7	/;"	d	file:
PUPR9	board/renesas/blanche/blanche.c	/^#define	PUPR9	/;"	d	file:
PUPSD	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define PUPSD	/;"	d
PUP_ADLL_LIMITS_STATE_FAIL	drivers/ddr/marvell/axp/ddr3_dqs.c	/^	PUP_ADLL_LIMITS_STATE_FAIL,$/;"	e	enum:__anon3bb57fdb0103	file:
PUP_ADLL_LIMITS_STATE_FAIL_AFTER_PASS	drivers/ddr/marvell/axp/ddr3_dqs.c	/^	PUP_ADLL_LIMITS_STATE_FAIL_AFTER_PASS,$/;"	e	enum:__anon3bb57fdb0103	file:
PUP_ADLL_LIMITS_STATE_PASS	drivers/ddr/marvell/axp/ddr3_dqs.c	/^	PUP_ADLL_LIMITS_STATE_PASS,$/;"	e	enum:__anon3bb57fdb0103	file:
PUP_BC	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_BC /;"	d
PUP_DELAY_MASK	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_DELAY_MASK /;"	d
PUP_DQS_RD	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_DQS_RD /;"	d
PUP_DQS_WR	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_DQS_WR /;"	d
PUP_LOCK_RESULT_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define PUP_LOCK_RESULT_BIT	/;"	d
PUP_NUM_16BIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_NUM_16BIT /;"	d
PUP_NUM_32BIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_NUM_32BIT /;"	d
PUP_NUM_64BIT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_NUM_64BIT /;"	d
PUP_PBS_RX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_PBS_RX /;"	d
PUP_PBS_TX	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_PBS_TX /;"	d
PUP_PBS_TX_DM	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_PBS_TX_DM /;"	d
PUP_PHASE_MASK	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_PHASE_MASK /;"	d
PUP_RESULT_EDGE_1_MASK	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define PUP_RESULT_EDGE_1_MASK	/;"	d
PUP_RESULT_EDGE_2_MASK	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define PUP_RESULT_EDGE_2_MASK	/;"	d
PUP_RL_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_RL_MODE /;"	d
PUP_SDDAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 PUP_SDDAT /;"	d
PUP_SDDAT3	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                PUP_SDDAT3 /;"	d
PUP_SIZE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_SIZE /;"	d
PUP_WL_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define PUP_WL_MODE /;"	d
PUSH	arch/arc/lib/ints_low.S	/^.macro PUSH reg$/;"	m
PUSHAX	arch/arc/lib/ints_low.S	/^.macro PUSHAX aux$/;"	m
PUSHBUTTON1_EN	board/bf609-ezkit/soft_switch.h	/^#define PUSHBUTTON1_EN /;"	d
PUSHBUTTON2_EN	board/bf609-ezkit/soft_switch.h	/^#define PUSHBUTTON2_EN /;"	d
PUSH_KEY	board/BuR/brxre1/board.c	/^#define PUSH_KEY	/;"	d	file:
PUT	arch/microblaze/include/asm/asm.h	/^#define PUT(/;"	d
PUT_UINT32_BE	lib/sha1.c	/^#define PUT_UINT32_BE(/;"	d	file:
PUT_UINT32_BE	lib/sha256.c	/^#define PUT_UINT32_BE(/;"	d	file:
PU_ONDIE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PU_ONDIE_SHIFT	/;"	d
PU_OUTPUT_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define PU_OUTPUT_SHIFT	/;"	d
PVC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PVC	/;"	d
PVCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	   PVCR	/;"	d
PVCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR	/;"	d
PVCR	arch/sh/include/asm/cpu_sh7720.h	/^#define PVCR	/;"	d
PVCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PVCR /;"	d
PVCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PVCR /;"	d
PVCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PVCR /;"	d
PVCR_A	board/ms7720se/lowlevel_init.S	/^PVCR_A:		.long	PFC_BASE + 0x22$/;"	l
PVCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PVCR_A:		.long	0xffec002a$/;"	l
PVCR_CommandDelay	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_CommandDelay	/;"	d
PVCR_CommandDelay	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_CommandDelay /;"	d
PVCR_D	board/ms7720se/lowlevel_init.S	/^PVCR_D:		.word	0x0000$/;"	l
PVCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PVCR_D	/;"	d	file:
PVCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PVCR_D:		.long	0x0000$/;"	l
PVCR_FVC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_FVC /;"	d
PVCR_ReadPointer	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_ReadPointer /;"	d
PVCR_SlaveAddress	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_SlaveAddress /;"	d
PVCR_VCSA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_VCSA	/;"	d
PVCR_VCSA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PVCR_VCSA /;"	d
PVDR	arch/sh/include/asm/cpu_sh7720.h	/^#define PVDR	/;"	d
PVDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PVDR /;"	d
PVDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PVDR /;"	d
PVDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PVDR /;"	d
PVDR_A	board/renesas/ecovec/lowlevel_init.S	/^PVDR_A:		.long	PVDR$/;"	l
PVDR_D	board/renesas/ecovec/lowlevel_init.S	/^PVDR_D:		.long	0x00000001$/;"	l
PVD_OFFSET	disk/part_iso.h	/^#define PVD_OFFSET /;"	d
PVR	arch/powerpc/include/asm/processor.h	/^#define PVR	/;"	d
PVR_403GA	arch/powerpc/include/asm/processor.h	/^#define PVR_403GA	/;"	d
PVR_403GB	arch/powerpc/include/asm/processor.h	/^#define PVR_403GB	/;"	d
PVR_403GC	arch/powerpc/include/asm/processor.h	/^#define PVR_403GC	/;"	d
PVR_403GCX	arch/powerpc/include/asm/processor.h	/^#define PVR_403GCX	/;"	d
PVR_405EP_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_405EP_RA	/;"	d
PVR_405EP_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_405EP_RB	/;"	d
PVR_405EX1_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_405EX1_RA	/;"	d
PVR_405EX1_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_405EX1_RC	/;"	d
PVR_405EX1_RD	arch/powerpc/include/asm/processor.h	/^#define PVR_405EX1_RD	/;"	d
PVR_405EX2_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_405EX2_RC	/;"	d
PVR_405EX2_RD	arch/powerpc/include/asm/processor.h	/^#define PVR_405EX2_RD	/;"	d
PVR_405EXR1_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_405EXR1_RC	/;"	d
PVR_405EXR1_RD	arch/powerpc/include/asm/processor.h	/^#define PVR_405EXR1_RD	/;"	d
PVR_405EXR2_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_405EXR2_RA	/;"	d
PVR_405EXR2_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_405EXR2_RC	/;"	d
PVR_405EXR2_RD	arch/powerpc/include/asm/processor.h	/^#define PVR_405EXR2_RD	/;"	d
PVR_405EZ_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_405EZ_RA	/;"	d
PVR_405GP	arch/powerpc/include/asm/processor.h	/^#define PVR_405GP	/;"	d
PVR_405GPR_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_405GPR_RB	/;"	d
PVR_405GP_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_405GP_RB	/;"	d
PVR_405GP_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_405GP_RC	/;"	d
PVR_405GP_RD	arch/powerpc/include/asm/processor.h	/^#define PVR_405GP_RD	/;"	d
PVR_405GP_RE	arch/powerpc/include/asm/processor.h	/^#define PVR_405GP_RE	/;"	d
PVR_440EPX1_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440EPX1_RA	/;"	d
PVR_440EPX2_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440EPX2_RA	/;"	d
PVR_440EP_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440EP_RA	/;"	d
PVR_440EP_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_440EP_RB	/;"	d
PVR_440EP_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_440EP_RC	/;"	d
PVR_440GP_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_440GP_RB	/;"	d
PVR_440GP_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_440GP_RC	/;"	d
PVR_440GRX1_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440GRX1_RA	/;"	d
PVR_440GRX2_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440GRX2_RA	/;"	d
PVR_440GR_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440GR_RA	/;"	d
PVR_440GR_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_440GR_RB	/;"	d
PVR_440GX_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440GX_RA	/;"	d
PVR_440GX_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_440GX_RB	/;"	d
PVR_440GX_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_440GX_RC	/;"	d
PVR_440GX_RF	arch/powerpc/include/asm/processor.h	/^#define PVR_440GX_RF	/;"	d
PVR_440SP_6_RAB	arch/powerpc/include/asm/processor.h	/^#define PVR_440SP_6_RAB	/;"	d
PVR_440SP_6_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_440SP_6_RC	/;"	d
PVR_440SP_RAB	arch/powerpc/include/asm/processor.h	/^#define PVR_440SP_RAB	/;"	d
PVR_440SP_RC	arch/powerpc/include/asm/processor.h	/^#define PVR_440SP_RC	/;"	d
PVR_440SPe_6_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440SPe_6_RA	/;"	d
PVR_440SPe_6_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_440SPe_6_RB	/;"	d
PVR_440SPe_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_440SPe_RA	/;"	d
PVR_440SPe_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_440SPe_RB	/;"	d
PVR_460EX_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_460EX_RA	/;"	d
PVR_460EX_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_460EX_RB	/;"	d
PVR_460EX_SE_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_460EX_SE_RA	/;"	d
PVR_460GT_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_460GT_RA	/;"	d
PVR_460GT_RB	arch/powerpc/include/asm/processor.h	/^#define PVR_460GT_RB	/;"	d
PVR_460GT_SE_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_460GT_SE_RA	/;"	d
PVR_460GX_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_460GX_RA /;"	d
PVR_460GX_RA_V1	arch/powerpc/include/asm/processor.h	/^#define PVR_460GX_RA_V1 /;"	d
PVR_460SX_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_460SX_RA /;"	d
PVR_460SX_RA_V1	arch/powerpc/include/asm/processor.h	/^#define PVR_460SX_RA_V1 /;"	d
PVR_5200	arch/powerpc/include/asm/processor.h	/^#define PVR_5200	/;"	d
PVR_5200B	arch/powerpc/include/asm/processor.h	/^#define PVR_5200B	/;"	d
PVR_601	arch/powerpc/include/asm/processor.h	/^#define PVR_601	/;"	d
PVR_602	arch/powerpc/include/asm/processor.h	/^#define PVR_602	/;"	d
PVR_603	arch/powerpc/include/asm/processor.h	/^#define PVR_603	/;"	d
PVR_603e	arch/powerpc/include/asm/processor.h	/^#define PVR_603e	/;"	d
PVR_603ev	arch/powerpc/include/asm/processor.h	/^#define PVR_603ev	/;"	d
PVR_603r	arch/powerpc/include/asm/processor.h	/^#define PVR_603r	/;"	d
PVR_604	arch/powerpc/include/asm/processor.h	/^#define PVR_604	/;"	d
PVR_604e	arch/powerpc/include/asm/processor.h	/^#define PVR_604e	/;"	d
PVR_604r	arch/powerpc/include/asm/processor.h	/^#define PVR_604r	/;"	d
PVR_620	arch/powerpc/include/asm/processor.h	/^#define PVR_620	/;"	d
PVR_740	arch/powerpc/include/asm/processor.h	/^#define PVR_740	/;"	d
PVR_7400	arch/powerpc/include/asm/processor.h	/^#define PVR_7400	/;"	d
PVR_740P	arch/powerpc/include/asm/processor.h	/^#define PVR_740P	/;"	d
PVR_7410	arch/powerpc/include/asm/processor.h	/^#define PVR_7410	/;"	d
PVR_7450	arch/powerpc/include/asm/processor.h	/^#define PVR_7450	/;"	d
PVR_750	arch/powerpc/include/asm/processor.h	/^#define PVR_750	/;"	d
PVR_750P	arch/powerpc/include/asm/processor.h	/^#define PVR_750P	/;"	d
PVR_821	arch/powerpc/include/asm/processor.h	/^#define PVR_821	/;"	d
PVR_823	arch/powerpc/include/asm/processor.h	/^#define PVR_823	/;"	d
PVR_8240	arch/powerpc/include/asm/processor.h	/^#define PVR_8240	/;"	d
PVR_8260	arch/powerpc/include/asm/processor.h	/^#define PVR_8260	/;"	d
PVR_8260_HIP3	arch/powerpc/include/asm/processor.h	/^#define PVR_8260_HIP3	/;"	d
PVR_8260_HIP4	arch/powerpc/include/asm/processor.h	/^#define PVR_8260_HIP4	/;"	d
PVR_8260_HIP7	arch/powerpc/include/asm/processor.h	/^#define PVR_8260_HIP7	/;"	d
PVR_8260_HIP7R1	arch/powerpc/include/asm/processor.h	/^#define PVR_8260_HIP7R1 /;"	d
PVR_8260_HIP7RA	arch/powerpc/include/asm/processor.h	/^#define PVR_8260_HIP7RA	/;"	d
PVR_850	arch/powerpc/include/asm/processor.h	/^#define PVR_850	/;"	d
PVR_85xx	arch/powerpc/include/asm/processor.h	/^#define PVR_85xx	/;"	d
PVR_85xx_REV1	arch/powerpc/include/asm/processor.h	/^#define PVR_85xx_REV1	/;"	d
PVR_85xx_REV2	arch/powerpc/include/asm/processor.h	/^#define PVR_85xx_REV2	/;"	d
PVR_860	arch/powerpc/include/asm/processor.h	/^#define PVR_860	/;"	d
PVR_86xx	arch/powerpc/include/asm/processor.h	/^#define PVR_86xx	/;"	d
PVR_APM821XX_RA	arch/powerpc/include/asm/processor.h	/^#define PVR_APM821XX_RA /;"	d
PVR_CFG	arch/powerpc/include/asm/processor.h	/^#define PVR_CFG(/;"	d
PVR_CORE	arch/powerpc/include/asm/processor.h	/^#define PVR_CORE(/;"	d
PVR_E300C1	arch/powerpc/include/asm/e300.h	/^#define PVR_E300C1	/;"	d
PVR_E300C2	arch/powerpc/include/asm/e300.h	/^#define PVR_E300C2	/;"	d
PVR_E300C3	arch/powerpc/include/asm/e300.h	/^#define PVR_E300C3	/;"	d
PVR_E300C4	arch/powerpc/include/asm/e300.h	/^#define PVR_E300C4	/;"	d
PVR_E600_MAJ	arch/powerpc/include/asm/processor.h	/^#define PVR_E600_MAJ(/;"	d
PVR_E600_MIN	arch/powerpc/include/asm/processor.h	/^#define PVR_E600_MIN(/;"	d
PVR_E600_TECH	arch/powerpc/include/asm/processor.h	/^#define PVR_E600_TECH(/;"	d
PVR_E600_VER	arch/powerpc/include/asm/processor.h	/^#define PVR_E600_VER(/;"	d
PVR_FAM	arch/powerpc/include/asm/processor.h	/^#define PVR_FAM(/;"	d
PVR_MAJ	arch/powerpc/include/asm/processor.h	/^#define PVR_MAJ(/;"	d
PVR_MEM	arch/powerpc/include/asm/processor.h	/^#define PVR_MEM(/;"	d
PVR_MIN	arch/powerpc/include/asm/processor.h	/^#define PVR_MIN(/;"	d
PVR_POWERPC_440EP_PASS1	board/amcc/bamboo/bamboo.h	/^#define	 PVR_POWERPC_440EP_PASS1 /;"	d
PVR_POWERPC_440EP_PASS2	board/amcc/bamboo/bamboo.h	/^#define	 PVR_POWERPC_440EP_PASS2 /;"	d
PVR_REV	arch/powerpc/include/asm/processor.h	/^#define PVR_REV(/;"	d
PVR_VER	arch/powerpc/include/asm/processor.h	/^#define PVR_VER(/;"	d
PVR_VER_E500MC	arch/powerpc/include/asm/processor.h	/^#define PVR_VER_E500MC	/;"	d
PVR_VER_E500_V1	arch/powerpc/include/asm/processor.h	/^#define PVR_VER_E500_V1	/;"	d
PVR_VER_E500_V2	arch/powerpc/include/asm/processor.h	/^#define PVR_VER_E500_V2	/;"	d
PVR_VER_E5500	arch/powerpc/include/asm/processor.h	/^#define PVR_VER_E5500	/;"	d
PVR_VER_E6500	arch/powerpc/include/asm/processor.h	/^#define PVR_VER_E6500	/;"	d
PVR_VIRTEX5	arch/powerpc/include/asm/processor.h	/^#define PVR_VIRTEX5 /;"	d
PVS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define PVS	/;"	d
PW0_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PW0_ENABLE	/;"	d
PW1_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PW1_ENABLE	/;"	d
PW2_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PW2_ENABLE	/;"	d
PW3_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PW3_ENABLE	/;"	d
PW4_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define PW4_ENABLE	/;"	d
PWCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PWCR /;"	d
PWCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PWCR /;"	d
PWCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PWCR /;"	d
PWCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PWCR_A:		.long	0xffec002c$/;"	l
PWCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PWCR_D	/;"	d	file:
PWCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PWCR_D:		.long	0x0000$/;"	l
PWDNEN	arch/arm/include/asm/arch-omap3/cpu.h	/^#define PWDNEN	/;"	d
PWDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PWDR /;"	d
PWDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PWDR /;"	d
PWDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PWDR /;"	d
PWDR	drivers/serial/serial_sh.h	/^# define PWDR	/;"	d
PWEN_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDLCLK_MARK, DREQ1_MARK, PORT221_LCD2CS__MARK, PWEN_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
PWER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWER	/;"	d
PWER	include/SA-1100.h	/^#define PWER	/;"	d
PWER_GPIO	include/SA-1100.h	/^#define PWER_GPIO(/;"	d
PWER_GPIO0	include/SA-1100.h	/^#define PWER_GPIO0	/;"	d
PWER_GPIO1	include/SA-1100.h	/^#define PWER_GPIO1	/;"	d
PWER_GPIO10	include/SA-1100.h	/^#define PWER_GPIO10	/;"	d
PWER_GPIO11	include/SA-1100.h	/^#define PWER_GPIO11	/;"	d
PWER_GPIO12	include/SA-1100.h	/^#define PWER_GPIO12	/;"	d
PWER_GPIO13	include/SA-1100.h	/^#define PWER_GPIO13	/;"	d
PWER_GPIO14	include/SA-1100.h	/^#define PWER_GPIO14	/;"	d
PWER_GPIO15	include/SA-1100.h	/^#define PWER_GPIO15	/;"	d
PWER_GPIO16	include/SA-1100.h	/^#define PWER_GPIO16	/;"	d
PWER_GPIO17	include/SA-1100.h	/^#define PWER_GPIO17	/;"	d
PWER_GPIO18	include/SA-1100.h	/^#define PWER_GPIO18	/;"	d
PWER_GPIO19	include/SA-1100.h	/^#define PWER_GPIO19	/;"	d
PWER_GPIO2	include/SA-1100.h	/^#define PWER_GPIO2	/;"	d
PWER_GPIO20	include/SA-1100.h	/^#define PWER_GPIO20	/;"	d
PWER_GPIO21	include/SA-1100.h	/^#define PWER_GPIO21	/;"	d
PWER_GPIO22	include/SA-1100.h	/^#define PWER_GPIO22	/;"	d
PWER_GPIO23	include/SA-1100.h	/^#define PWER_GPIO23	/;"	d
PWER_GPIO24	include/SA-1100.h	/^#define PWER_GPIO24	/;"	d
PWER_GPIO25	include/SA-1100.h	/^#define PWER_GPIO25	/;"	d
PWER_GPIO26	include/SA-1100.h	/^#define PWER_GPIO26	/;"	d
PWER_GPIO27	include/SA-1100.h	/^#define PWER_GPIO27	/;"	d
PWER_GPIO3	include/SA-1100.h	/^#define PWER_GPIO3	/;"	d
PWER_GPIO4	include/SA-1100.h	/^#define PWER_GPIO4	/;"	d
PWER_GPIO5	include/SA-1100.h	/^#define PWER_GPIO5	/;"	d
PWER_GPIO6	include/SA-1100.h	/^#define PWER_GPIO6	/;"	d
PWER_GPIO7	include/SA-1100.h	/^#define PWER_GPIO7	/;"	d
PWER_GPIO8	include/SA-1100.h	/^#define PWER_GPIO8	/;"	d
PWER_GPIO9	include/SA-1100.h	/^#define PWER_GPIO9	/;"	d
PWER_RTC	include/SA-1100.h	/^#define PWER_RTC	/;"	d
PWGT1SPIEN	include/fsl_pmic.h	/^#define PWGT1SPIEN	/;"	d
PWGT2SPIEN	include/fsl_pmic.h	/^#define PWGT2SPIEN	/;"	d
PWI_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define PWI_RATIO	/;"	d
PWI_RATIO	board/samsung/odroid/setup.h	/^#define PWI_RATIO(/;"	d
PWI_RATIO	board/samsung/trats/setup.h	/^#define PWI_RATIO	/;"	d
PWM0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
PWM0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PWM0_B_MARK, ADICLK_B_MARK, AD_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
PWM0_CHA	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CHA /;"	d
PWM0_CHAL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CHAL /;"	d
PWM0_CHB	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CHB /;"	d
PWM0_CHBL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CHBL /;"	d
PWM0_CHC	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CHC /;"	d
PWM0_CHCL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CHCL /;"	d
PWM0_CTRL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_CTRL /;"	d
PWM0_DT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_DT /;"	d
PWM0_GATE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_GATE /;"	d
PWM0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM0_GMARK,$/;"	e	enum:__anona307945e0103	file:
PWM0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM0_IMARK,$/;"	e	enum:__anona307945e0103	file:
PWM0_LSI	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_LSI /;"	d
PWM0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK,$/;"	e	enum:__anona307879b0103	file:
PWM0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
PWM0_SEG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_SEG /;"	d
PWM0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_STAT /;"	d
PWM0_STAT2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_STAT2 /;"	d
PWM0_SYNCWT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_SYNCWT /;"	d
PWM0_TM	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM0_TM /;"	d
PWM1_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM1_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
PWM1_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM1_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
PWM1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PWM1_BASE_ADDR	/;"	d
PWM1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM1_BASE_ADDR /;"	d
PWM1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_WP_MARK, PWM1_B_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
PWM1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM1_CHA	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CHA /;"	d
PWM1_CHAL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CHAL /;"	d
PWM1_CHB	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CHB /;"	d
PWM1_CHBL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CHBL /;"	d
PWM1_CHC	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CHC /;"	d
PWM1_CHCL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CHCL /;"	d
PWM1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	PWM1_CLK_ROOT = 106,$/;"	e	enum:clk_root_index
PWM1_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
PWM1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
PWM1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
PWM1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
PWM1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
PWM1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
PWM1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
PWM1_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM1_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
PWM1_CTRL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_CTRL /;"	d
PWM1_DT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_DT /;"	d
PWM1_GATE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_GATE /;"	d
PWM1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PWM1_IPS_BASE_ADDR /;"	d
PWM1_LSI	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_LSI /;"	d
PWM1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK,$/;"	e	enum:__anona307879b0103	file:
PWM1_SEG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_SEG /;"	d
PWM1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_STAT /;"	d
PWM1_STAT2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_STAT2 /;"	d
PWM1_SYNCWT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_SYNCWT /;"	d
PWM1_TM	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define PWM1_TM /;"	d
PWM2_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM2_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
PWM2_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM2_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
PWM2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define PWM2_BASE_ADDR	/;"	d
PWM2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM2_BASE_ADDR /;"	d
PWM2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	PWM2_CLK_ROOT = 107,$/;"	e	enum:clk_root_index
PWM2_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
PWM2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
PWM2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
PWM2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
PWM2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
PWM2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
PWM2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
PWM2_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM2_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
PWM2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PWM2_IPS_BASE_ADDR /;"	d
PWM2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK,$/;"	e	enum:__anona307879b0103	file:
PWM3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM3_BASE_ADDR /;"	d
PWM3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	PWM3_CLK_ROOT = 108,$/;"	e	enum:clk_root_index
PWM3_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
PWM3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
PWM3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
PWM3_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
PWM3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
PWM3_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
PWM3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
PWM3_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM3_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
PWM3_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PWM3_IPS_BASE_ADDR /;"	d
PWM3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,$/;"	e	enum:__anona307879b0103	file:
PWM4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM4_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM4_BASE_ADDR /;"	d
PWM4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM4_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	PWM4_CLK_ROOT = 109,$/;"	e	enum:clk_root_index
PWM4_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
PWM4_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
PWM4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
PWM4_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
PWM4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
PWM4_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
PWM4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
PWM4_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define PWM4_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
PWM4_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define PWM4_IPS_BASE_ADDR /;"	d
PWM4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,$/;"	e	enum:__anona307879b0103	file:
PWM5_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM5_A_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM5_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM5_BASE_ADDR /;"	d
PWM5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PWM5_B_MARK, SCIFA3_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
PWM5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_D_MARK, I2C1_SCL_MARK, SCIF4_RXD_MARK, PWM5_B_MARK,$/;"	e	enum:__anona307901d0103	file:
PWM5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM5_B_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
PWM5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SCL_MARK, SCIF0_RXD_C_MARK, PWM5_MARK, TCLK1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
PWM6_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM6_A_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM6_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM6_BASE_ADDR /;"	d
PWM6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWM6_B_MARK,$/;"	e	enum:__anona307945e0103	file:
PWM6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
PWM6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK,$/;"	e	enum:__anona3078bdc0103	file:
PWM7_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM7_BASE_ADDR /;"	d
PWM8_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWM8_BASE_ADDR /;"	d
PWMC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC	/;"	d
PWMCNT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMCNT	/;"	d
PWMCR_CLKSRC_IPG	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_CLKSRC_IPG	/;"	d
PWMCR_CLKSRC_IPG_HIGH	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_CLKSRC_IPG_HIGH	/;"	d
PWMCR_DBGEN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_DBGEN	/;"	d
PWMCR_DOZEEN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_DOZEEN	/;"	d
PWMCR_EN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_EN	/;"	d
PWMCR_PRESCALER	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_PRESCALER(/;"	d
PWMCR_WAITEN	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PWMCR_WAITEN	/;"	d
PWMC_BCTR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_BCTR	/;"	d
PWMC_CLKSEL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_CLKSEL(/;"	d
PWMC_CLKSRC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_CLKSRC	/;"	d
PWMC_COUNTER	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_COUNTER(/;"	d
PWMC_EN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_EN	/;"	d
PWMC_FIFOAV	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_FIFOAV	/;"	d
PWMC_HCTR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_HCTR	/;"	d
PWMC_IRQ	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_IRQ	/;"	d
PWMC_IRQEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_IRQEN	/;"	d
PWMC_PRESCALER	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_PRESCALER(/;"	d
PWMC_REPEAT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_REPEAT(/;"	d
PWMC_SWR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMC_SWR	/;"	d
PWMFSW0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
PWMFSW0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	PWMFSW0_MARK,$/;"	e	enum:__anona307945e0103	file:
PWMP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMP	/;"	d
PWMP_PERIOD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMP_PERIOD(/;"	d
PWMR_CC_EN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMR_CC_EN /;"	d
PWMR_CLS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMR_CLS(/;"	d
PWMR_LDMSK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMR_LDMSK /;"	d
PWMR_PW	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMR_PW(/;"	d
PWMR_SCR0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMR_SCR0 /;"	d
PWMR_SCR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMR_SCR1 /;"	d
PWMS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMS	/;"	d
PWMSS0_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define PWMSS0_BASE	/;"	d
PWMS_SAMPLE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define PWMS_SAMPLE(/;"	d
PWM_APS	include/power/pfuze100_pmic.h	/^#define PWM_APS	/;"	d
PWM_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define PWM_BASE	/;"	d
PWM_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define PWM_BASE_ADDR	/;"	d
PWM_CHA	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CHA /;"	d
PWM_CHAL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CHAL /;"	d
PWM_CHB	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CHB /;"	d
PWM_CHBL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CHBL /;"	d
PWM_CHC	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CHC /;"	d
PWM_CHCL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CHCL /;"	d
PWM_CLK_PCLKn	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CLK_PCLKn(/;"	d
PWM_CLK_PCLKn_MASK	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CLK_PCLKn_MASK	/;"	d
PWM_CLOCK_HZ	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define PWM_CLOCK_HZ /;"	d
PWM_CONTINUOUS	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_CONTINUOUS /;"	d
PWM_CR_CLKSEL	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CR_CLKSEL(/;"	d
PWM_CR_CLKSEL_MASK	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CR_CLKSEL_MASK	/;"	d
PWM_CR_EN	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CR_EN	/;"	d
PWM_CR_FRC1	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CR_FRC1	/;"	d
PWM_CR_LVL	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CR_LVL	/;"	d
PWM_CTL	drivers/video/tegra124/sor.h	/^#define PWM_CTL	/;"	d
PWM_CTL_CLKSEL_PCLK	drivers/video/tegra124/sor.h	/^#define PWM_CTL_CLKSEL_PCLK	/;"	d
PWM_CTL_CLKSEL_SHIFT	drivers/video/tegra124/sor.h	/^#define PWM_CTL_CLKSEL_SHIFT	/;"	d
PWM_CTL_CLKSEL_XTAL	drivers/video/tegra124/sor.h	/^#define PWM_CTL_CLKSEL_XTAL	/;"	d
PWM_CTL_CON01	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CTL_CON01	/;"	d
PWM_CTL_CON23	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CTL_CON23	/;"	d
PWM_CTL_CON45	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CTL_CON45	/;"	d
PWM_CTL_CON67	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CTL_CON67	/;"	d
PWM_CTL_DUTY_CYCLE_MASK	drivers/video/tegra124/sor.h	/^#define PWM_CTL_DUTY_CYCLE_MASK	/;"	d
PWM_CTL_DUTY_CYCLE_SHIFT	drivers/video/tegra124/sor.h	/^#define PWM_CTL_DUTY_CYCLE_SHIFT	/;"	d
PWM_CTL_PFRZ	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CTL_PFRZ	/;"	d
PWM_CTL_PSWAR	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_CTL_PSWAR	/;"	d
PWM_CTL_SETTING_NEW_DONE	drivers/video/tegra124/sor.h	/^#define PWM_CTL_SETTING_NEW_DONE	/;"	d
PWM_CTL_SETTING_NEW_PENDING	drivers/video/tegra124/sor.h	/^#define PWM_CTL_SETTING_NEW_PENDING	/;"	d
PWM_CTL_SETTING_NEW_SHIFT	drivers/video/tegra124/sor.h	/^#define PWM_CTL_SETTING_NEW_SHIFT	/;"	d
PWM_CTL_SETTING_NEW_TRIGGER	drivers/video/tegra124/sor.h	/^#define PWM_CTL_SETTING_NEW_TRIGGER	/;"	d
PWM_CTRL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_CTRL /;"	d
PWM_CTRL0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_CTRL0	/;"	d
PWM_CTRL1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_CTRL1	/;"	d
PWM_CTRL2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_CTRL2	/;"	d
PWM_CTRL3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_CTRL3	/;"	d
PWM_DIV	drivers/video/tegra124/sor.h	/^#define PWM_DIV	/;"	d
PWM_DIVIDER_MASK	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_DIVIDER_MASK	/;"	d
PWM_DIVIDER_SHIFT	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_DIVIDER_SHIFT	/;"	d
PWM_DIV_DIVIDE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWM_DIV_DIVIDE_DEFAULT_MASK	/;"	d
PWM_DT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_DT /;"	d
PWM_DUTY	include/configs/pxm2.h	/^#define PWM_DUTY	/;"	d
PWM_DUTY_NEGATIVE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_DUTY_NEGATIVE /;"	d
PWM_DUTY_POSTIVE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_DUTY_POSTIVE /;"	d
PWM_ENABLE_MASK	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_ENABLE_MASK	/;"	d
PWM_ENABLE_SHIFT	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_ENABLE_SHIFT	/;"	d
PWM_EN_PWMEn	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_EN_PWMEn(/;"	d
PWM_EN_PWMEn_MASK	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_EN_PWMEn_MASK	/;"	d
PWM_EXYNOS	drivers/pwm/Kconfig	/^config PWM_EXYNOS$/;"	c
PWM_FER1	include/ns87308.h	/^#define PWM_FER1 /;"	d
PWM_FER2	include/ns87308.h	/^#define PWM_FER2 /;"	d
PWM_GATE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_GATE /;"	d
PWM_INACTIVE_NEGATIVE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_INACTIVE_NEGATIVE /;"	d
PWM_INACTIVE_POSTIVE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_INACTIVE_POSTIVE /;"	d
PWM_LP_DISABLE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_LP_DISABLE /;"	d
PWM_LP_ENABLE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_LP_ENABLE /;"	d
PWM_LSI	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_LSI /;"	d
PWM_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PWM_MASK		= 1,$/;"	e	enum:__anonbeb2b9771303
PWM_NUM_CHANNELS	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_NUM_CHANNELS	/;"	d
PWM_OFF	drivers/video/sunxi_display.c	/^#define PWM_OFF /;"	d	file:
PWM_OFF	include/power/pfuze100_pmic.h	/^#define PWM_OFF	/;"	d
PWM_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define PWM_OFFSET	/;"	d
PWM_ON	drivers/video/sunxi_display.c	/^#define PWM_ON /;"	d	file:
PWM_ONE_SHOT	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_ONE_SHOT /;"	d
PWM_OUT	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define PWM_OUT	/;"	d
PWM_OUTPUT_CENTER	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_OUTPUT_CENTER /;"	d
PWM_OUTPUT_LEFT	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_OUTPUT_LEFT /;"	d
PWM_PERVAL0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PERVAL0	/;"	d
PWM_PERVAL1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PERVAL1	/;"	d
PWM_PERVAL2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PERVAL2	/;"	d
PWM_PERVAL3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PERVAL3	/;"	d
PWM_PFM	include/power/pfuze100_pmic.h	/^#define PWM_PFM	/;"	d
PWM_PMC1	include/ns87308.h	/^#define PWM_PMC1 /;"	d
PWM_PMC2	include/ns87308.h	/^#define PWM_PMC2 /;"	d
PWM_PMC3	include/ns87308.h	/^#define PWM_PMC3 /;"	d
PWM_POLARITY_INVERTED	arch/arm/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	arch/microblaze/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	arch/mips/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	arch/nios2/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	arch/sandbox/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	arch/x86/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	arch/xtensa/dts/include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POLARITY_INVERTED	include/dt-bindings/pwm/pwm.h	/^#define PWM_POLARITY_INVERTED	/;"	d
PWM_POL_PPOLn	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_POL_PPOLn(/;"	d
PWM_POL_PPOLn_MASK	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_POL_PPOLn_MASK	/;"	d
PWM_PRCLK_PCKA	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_PRCLK_PCKA(/;"	d
PWM_PRCLK_PCKA_MASK	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_PRCLK_PCKA_MASK	/;"	d
PWM_PRCLK_PCKB	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_PRCLK_PCKB(/;"	d
PWM_PRCLK_PCKB_MASK	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_PRCLK_PCKB_MASK	/;"	d
PWM_PWDUTY0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PWDUTY0	/;"	d
PWM_PWDUTY1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PWDUTY1	/;"	d
PWM_PWDUTY2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PWDUTY2	/;"	d
PWM_PWDUTY3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWM_PWDUTY3	/;"	d
PWM_PWM	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PWM_PWM			= 0,$/;"	e	enum:__anonbeb2b9771303
PWM_PWM	include/power/pfuze100_pmic.h	/^#define PWM_PWM	/;"	d
PWM_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define PWM_RATIO	/;"	d
PWM_RATIO	board/samsung/trats/setup.h	/^#define PWM_RATIO	/;"	d
PWM_RK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PWM_RK			= 1,$/;"	e	enum:__anonbeb2b9771303
PWM_ROCKCHIP	drivers/pwm/Kconfig	/^config PWM_ROCKCHIP$/;"	c
PWM_SDN_IE	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_IE	/;"	d
PWM_SDN_IF	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_IF	/;"	d
PWM_SDN_LVL	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_LVL	/;"	d
PWM_SDN_PWM7IL	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_PWM7IL	/;"	d
PWM_SDN_PWM7IN	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_PWM7IN	/;"	d
PWM_SDN_RESTART	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_RESTART	/;"	d
PWM_SDN_SDNEN	arch/m68k/include/asm/coldfire/pwm.h	/^#define PWM_SDN_SDNEN	/;"	d
PWM_SEG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_SEG /;"	d
PWM_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PWM_SEL	/;"	d
PWM_SEL_SCALE_CLK	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_SEL_SCALE_CLK	/;"	d
PWM_SEL_SRC_CLK	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define PWM_SEL_SRC_CLK	/;"	d
PWM_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	PWM_SHIFT		= 0,$/;"	e	enum:__anonbeb2b9771303
PWM_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_STAT /;"	d
PWM_STAT2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_STAT2 /;"	d
PWM_SYNCWT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_SYNCWT /;"	d
PWM_TEGRA	drivers/pwm/Kconfig	/^config PWM_TEGRA$/;"	c
PWM_TICKS	include/configs/pxm2.h	/^#define PWM_TICKS	/;"	d
PWM_TM	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define PWM_TM /;"	d
PWM_WDCF	include/ns87308.h	/^#define PWM_WDCF /;"	d
PWM_WDST	include/ns87308.h	/^#define PWM_WDST /;"	d
PWM_WDTO	include/ns87308.h	/^#define PWM_WDTO /;"	d
PWM_WIDTH_MASK	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_WIDTH_MASK	/;"	d
PWM_WIDTH_SHIFT	arch/arm/include/asm/arch-tegra/pwm.h	/^#define PWM_WIDTH_SHIFT	/;"	d
PWR	drivers/video/tegra124/sor.h	/^#define PWR	/;"	d
PWRBTN_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  PWRBTN_EN	/;"	d
PWRBTN_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PWRBTN_EN	/;"	d
PWRBTN_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  PWRBTN_STS	/;"	d
PWRBTN_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   PWRBTN_STS	/;"	d
PWRDNCONFIG_DEFAULT_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define PWRDNCONFIG_DEFAULT_VAL	/;"	d
PWRDNCONFIG_DPWRDN_CYC_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PWRDNCONFIG_DPWRDN_CYC_SHIFT	/;"	d
PWRDNCONFIG_DSREF_CYC_SHIFT	arch/arm/mach-exynos/include/mach/dmc.h	/^#define PWRDNCONFIG_DSREF_CYC_SHIFT	/;"	d
PWRDOM_STAT_EMMC	board/highbank/highbank.c	/^#define PWRDOM_STAT_EMMC	/;"	d	file:
PWRDOM_STAT_PCI	board/highbank/highbank.c	/^#define PWRDOM_STAT_PCI	/;"	d	file:
PWRDOM_STAT_SATA	board/highbank/highbank.c	/^#define PWRDOM_STAT_SATA	/;"	d	file:
PWRDWN_XS_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define PWRDWN_XS_MASK	/;"	d
PWRDWN_XS_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define PWRDWN_XS_SHIFT	/;"	d
PWRGATE_STATUS	arch/arm/mach-tegra/powergate.c	/^#define PWRGATE_STATUS /;"	d	file:
PWRGATE_STATUS_C0NC_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_C0NC_ENABLE	/;"	d
PWRGATE_STATUS_C1NC_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_C1NC_ENABLE	/;"	d
PWRGATE_STATUS_CE0_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_CE0_ENABLE	/;"	d
PWRGATE_STATUS_CE1_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_CE1_ENABLE	/;"	d
PWRGATE_STATUS_CE2_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_CE2_ENABLE	/;"	d
PWRGATE_STATUS_CE3_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_CE3_ENABLE	/;"	d
PWRGATE_STATUS_CELP_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_CELP_ENABLE	/;"	d
PWRGATE_STATUS_CPU	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define PWRGATE_STATUS_CPU	/;"	d
PWRGATE_STATUS_CRAIL_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_CRAIL_ENABLE	/;"	d
PWRGATE_STATUS_DISB_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_DISB_ENABLE	/;"	d
PWRGATE_STATUS_DIS_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_DIS_ENABLE	/;"	d
PWRGATE_STATUS_HEG_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_HEG_ENABLE	/;"	d
PWRGATE_STATUS_IRAM_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_IRAM_ENABLE	/;"	d
PWRGATE_STATUS_L2C_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_L2C_ENABLE	/;"	d
PWRGATE_STATUS_MPE_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_MPE_ENABLE	/;"	d
PWRGATE_STATUS_PCX_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_PCX_ENABLE	/;"	d
PWRGATE_STATUS_SAX_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_SAX_ENABLE	/;"	d
PWRGATE_STATUS_SOR_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_SOR_ENABLE	/;"	d
PWRGATE_STATUS_TD_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_TD_ENABLE	/;"	d
PWRGATE_STATUS_VDE_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_VDE_ENABLE	/;"	d
PWRGATE_STATUS_VE_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_VE_ENABLE	/;"	d
PWRGATE_STATUS_VIC_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_VIC_ENABLE	/;"	d
PWRGATE_STATUS_XUSBA_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_XUSBA_ENABLE	/;"	d
PWRGATE_STATUS_XUSBB_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_XUSBB_ENABLE	/;"	d
PWRGATE_STATUS_XUSBC_ENABLE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_STATUS_XUSBC_ENABLE	/;"	d
PWRGATE_TOGGLE	arch/arm/mach-tegra/powergate.c	/^#define PWRGATE_TOGGLE /;"	d	file:
PWRGATE_TOGGLE_PARTID_C0NC	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_C0NC	/;"	d
PWRGATE_TOGGLE_PARTID_C1NC	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_C1NC	/;"	d
PWRGATE_TOGGLE_PARTID_CE0	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_CE0	/;"	d
PWRGATE_TOGGLE_PARTID_CE1	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_CE1	/;"	d
PWRGATE_TOGGLE_PARTID_CE2	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_CE2	/;"	d
PWRGATE_TOGGLE_PARTID_CE3	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_CE3	/;"	d
PWRGATE_TOGGLE_PARTID_CELP	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_CELP	/;"	d
PWRGATE_TOGGLE_PARTID_CPU	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define PWRGATE_TOGGLE_PARTID_CPU	/;"	d
PWRGATE_TOGGLE_PARTID_CRAIL	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_CRAIL	/;"	d
PWRGATE_TOGGLE_PARTID_DIS	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_DIS	/;"	d
PWRGATE_TOGGLE_PARTID_DISB	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_DISB	/;"	d
PWRGATE_TOGGLE_PARTID_HEG	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_HEG	/;"	d
PWRGATE_TOGGLE_PARTID_IRAM	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_IRAM	/;"	d
PWRGATE_TOGGLE_PARTID_L2C	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_L2C	/;"	d
PWRGATE_TOGGLE_PARTID_MPE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_MPE	/;"	d
PWRGATE_TOGGLE_PARTID_PCX	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_PCX	/;"	d
PWRGATE_TOGGLE_PARTID_SAX	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_SAX	/;"	d
PWRGATE_TOGGLE_PARTID_SOR	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_SOR	/;"	d
PWRGATE_TOGGLE_PARTID_TD	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_TD	/;"	d
PWRGATE_TOGGLE_PARTID_VDE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_VDE	/;"	d
PWRGATE_TOGGLE_PARTID_VE	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_VE	/;"	d
PWRGATE_TOGGLE_PARTID_VIC	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_VIC	/;"	d
PWRGATE_TOGGLE_PARTID_XUSBA	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_XUSBA	/;"	d
PWRGATE_TOGGLE_PARTID_XUSBB	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_XUSBB	/;"	d
PWRGATE_TOGGLE_PARTID_XUSBC	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_PARTID_XUSBC	/;"	d
PWRGATE_TOGGLE_START	arch/arm/include/asm/arch-tegra/pmc.h	/^#define PWRGATE_TOGGLE_START	/;"	d
PWRGATE_TOGGLE_START	arch/arm/mach-tegra/powergate.c	/^#define  PWRGATE_TOGGLE_START /;"	d	file:
PWRGATE_TOGGLE_START	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define PWRGATE_TOGGLE_START	/;"	d
PWRMAN_BOARD	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_BOARD	/;"	d
PWRMAN_DISPENSIBLE	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_DISPENSIBLE	/;"	d
PWRMAN_ETHCLK	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_ETHCLK	/;"	d
PWRMAN_ETHRST	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_ETHRST	/;"	d
PWRMAN_I2C_ADDR	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_I2C_ADDR /;"	d
PWRMAN_MMC	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_MMC	/;"	d
PWRMAN_REG_DIS	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_DIS	/;"	d
PWRMAN_REG_ENA	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_ENA	/;"	d
PWRMAN_REG_LEDCTL	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_LEDCTL	/;"	d
PWRMAN_REG_STA	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_STA	/;"	d
PWRMAN_REG_TEMP	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_TEMP	/;"	d
PWRMAN_REG_VAUX	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_VAUX	/;"	d
PWRMAN_REG_VERS	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_REG_VERS	/;"	d
PWRMAN_RS232	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_RS232	/;"	d
PWRMAN_VBIN	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_VBIN	/;"	d
PWRMAN_VBOUT	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_VBOUT	/;"	d
PWRMAN_WAKEUP	board/egnite/ethernut5/ethernut5_pwrman.h	/^#define PWRMAN_WAKEUP	/;"	d
PWRMGR_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define PWRMGR_BASE_ADDR	/;"	d
PWROK_FLR	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  PWROK_FLR	/;"	d
PWROK_FLR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  PWROK_FLR	/;"	d
PWRSAVE_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define PWRSAVE_SPDWN_EN	/;"	d
PWRSEQ	drivers/misc/Kconfig	/^config PWRSEQ$/;"	c	menu:Multifunction device drivers
PWR_BASE	arch/arm/cpu/sa1100/start.S	/^PWR_BASE:		.word   0x90020000$/;"	l
PWR_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define PWR_BASE	/;"	d
PWR_CR1_ODEN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define PWR_CR1_ODEN	/;"	d	file:
PWR_CR1_ODSWEN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define PWR_CR1_ODSWEN	/;"	d	file:
PWR_CR_VOS0	arch/arm/mach-stm32/stm32f1/clock.c	/^#define PWR_CR_VOS0	/;"	d	file:
PWR_CR_VOS0	arch/arm/mach-stm32/stm32f4/clock.c	/^#define PWR_CR_VOS0	/;"	d	file:
PWR_CR_VOS1	arch/arm/mach-stm32/stm32f1/clock.c	/^#define PWR_CR_VOS1	/;"	d	file:
PWR_CR_VOS1	arch/arm/mach-stm32/stm32f4/clock.c	/^#define PWR_CR_VOS1	/;"	d	file:
PWR_CR_VOS_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define PWR_CR_VOS_MASK	/;"	d	file:
PWR_CR_VOS_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define PWR_CR_VOS_MASK	/;"	d	file:
PWR_CR_VOS_SCALE_MODE_1	arch/arm/mach-stm32/stm32f1/clock.c	/^#define PWR_CR_VOS_SCALE_MODE_1	/;"	d	file:
PWR_CR_VOS_SCALE_MODE_1	arch/arm/mach-stm32/stm32f4/clock.c	/^#define PWR_CR_VOS_SCALE_MODE_1	/;"	d	file:
PWR_CR_VOS_SCALE_MODE_2	arch/arm/mach-stm32/stm32f1/clock.c	/^#define PWR_CR_VOS_SCALE_MODE_2	/;"	d	file:
PWR_CR_VOS_SCALE_MODE_2	arch/arm/mach-stm32/stm32f4/clock.c	/^#define PWR_CR_VOS_SCALE_MODE_2	/;"	d	file:
PWR_CR_VOS_SCALE_MODE_3	arch/arm/mach-stm32/stm32f1/clock.c	/^#define PWR_CR_VOS_SCALE_MODE_3	/;"	d	file:
PWR_CR_VOS_SCALE_MODE_3	arch/arm/mach-stm32/stm32f4/clock.c	/^#define PWR_CR_VOS_SCALE_MODE_3	/;"	d	file:
PWR_CSR1_ODRDY	arch/arm/mach-stm32/stm32f7/clock.c	/^#define PWR_CSR1_ODRDY	/;"	d	file:
PWR_CSR1_ODSWRDY	arch/arm/mach-stm32/stm32f7/clock.c	/^#define PWR_CSR1_ODSWRDY	/;"	d	file:
PWR_DN_DLY	drivers/ddr/microchip/ddr2_regs.h	/^#define PWR_DN_DLY(/;"	d
PWR_EN	drivers/usb/eth/r8152.h	/^#define PWR_EN	/;"	d
PWR_FLR	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  PWR_FLR	/;"	d
PWR_FLR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  PWR_FLR	/;"	d
PWR_HALT_DELAY_ACTIVE	drivers/video/tegra124/sor.h	/^#define PWR_HALT_DELAY_ACTIVE	/;"	d
PWR_HALT_DELAY_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_HALT_DELAY_DEFAULT_MASK	/;"	d
PWR_HALT_DELAY_DONE	drivers/video/tegra124/sor.h	/^#define PWR_HALT_DELAY_DONE	/;"	d
PWR_HALT_DELAY_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_HALT_DELAY_SHIFT	/;"	d
PWR_MGM_TIM1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PWR_MGM_TIM1_ADDR(/;"	d
PWR_MODE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_MODE_DEFAULT_MASK	/;"	d
PWR_MODE_NORMAL	drivers/video/tegra124/sor.h	/^#define PWR_MODE_NORMAL	/;"	d
PWR_MODE_SAFE	drivers/video/tegra124/sor.h	/^#define PWR_MODE_SAFE	/;"	d
PWR_MODE_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_MODE_SHIFT	/;"	d
PWR_NORMAL_START_ALT	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_START_ALT	/;"	d
PWR_NORMAL_START_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_START_DEFAULT_MASK	/;"	d
PWR_NORMAL_START_NORMAL	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_START_NORMAL	/;"	d
PWR_NORMAL_START_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_START_SHIFT	/;"	d
PWR_NORMAL_STATE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_STATE_DEFAULT_MASK	/;"	d
PWR_NORMAL_STATE_PD	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_STATE_PD	/;"	d
PWR_NORMAL_STATE_PU	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_STATE_PU	/;"	d
PWR_NORMAL_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_NORMAL_STATE_SHIFT	/;"	d
PWR_ON	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                    PWR_ON /;"	d
PWR_ON_DELAY_MSECS	drivers/video/lg4573.c	/^#define PWR_ON_DELAY_MSECS /;"	d	file:
PWR_PLL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define PWR_PLL_CTRL_ADDR(/;"	d
PWR_SAFE_START_ALT	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_START_ALT	/;"	d
PWR_SAFE_START_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_START_DEFAULT_MASK	/;"	d
PWR_SAFE_START_NORMAL	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_START_NORMAL	/;"	d
PWR_SAFE_START_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_START_SHIFT	/;"	d
PWR_SAFE_STATE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_STATE_DEFAULT_MASK	/;"	d
PWR_SAFE_STATE_PD	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_STATE_PD	/;"	d
PWR_SAFE_STATE_PU	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_STATE_PU	/;"	d
PWR_SAFE_STATE_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_SAFE_STATE_SHIFT	/;"	d
PWR_SETTING_NEW_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define PWR_SETTING_NEW_DEFAULT_MASK	/;"	d
PWR_SETTING_NEW_DONE	drivers/video/tegra124/sor.h	/^#define PWR_SETTING_NEW_DONE	/;"	d
PWR_SETTING_NEW_PENDING	drivers/video/tegra124/sor.h	/^#define PWR_SETTING_NEW_PENDING	/;"	d
PWR_SETTING_NEW_SHIFT	drivers/video/tegra124/sor.h	/^#define PWR_SETTING_NEW_SHIFT	/;"	d
PWR_SETTING_NEW_TRIGGER	drivers/video/tegra124/sor.h	/^#define PWR_SETTING_NEW_TRIGGER	/;"	d
PWR_SV_E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                  PWR_SV_E /;"	d
PWSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PWSR	/;"	d
PWUP	include/fsl_pmic.h	/^#define PWUP	/;"	d
PXA210_B0	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA210_B0	/;"	d
PXA210_B1	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA210_B1	/;"	d
PXA210_B2	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA210_B2	/;"	d
PXA210_C0	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA210_C0	/;"	d
PXA250_A0	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA250_A0	/;"	d
PXA250_A1	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA250_A1	/;"	d
PXA250_B0	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA250_B0	/;"	d
PXA250_B1	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA250_B1	/;"	d
PXA250_B2	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA250_B2	/;"	d
PXA250_C0	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA250_C0	/;"	d
PXA255_A0	arch/arm/include/asm/arch-pxa/pxa.h	/^#define PXA255_A0	/;"	d
PXA25X_UDC_BASE	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define PXA25X_UDC_BASE	/;"	d
PXA2XX_UDC_CMD_CONNECT	drivers/usb/gadget/pxa25x_udc.h	/^#define	PXA2XX_UDC_CMD_CONNECT	/;"	d
PXA2XX_UDC_CMD_DISCONNECT	drivers/usb/gadget/pxa25x_udc.h	/^#define	PXA2XX_UDC_CMD_DISCONNECT	/;"	d
PXA3XX_NAND_VARIANT_ARMADA370	drivers/mtd/nand/pxa3xx_nand.c	/^	PXA3XX_NAND_VARIANT_ARMADA370,$/;"	e	enum:pxa3xx_nand_variant	file:
PXA3XX_NAND_VARIANT_PXA	drivers/mtd/nand/pxa3xx_nand.c	/^	PXA3XX_NAND_VARIANT_PXA,$/;"	e	enum:pxa3xx_nand_variant	file:
PXAMMC_CRC_SKIP	drivers/mmc/pxa_mmc_gen.c	/^#define PXAMMC_CRC_SKIP$/;"	d	file:
PXAMMC_FIFO_SIZE	drivers/mmc/pxa_mmc_gen.c	/^#define PXAMMC_FIFO_SIZE	/;"	d	file:
PXAMMC_HOST_CAPS	drivers/mmc/pxa_mmc_gen.c	/^#define PXAMMC_HOST_CAPS	/;"	d	file:
PXAMMC_MAX_SPEED	drivers/mmc/pxa_mmc_gen.c	/^#define PXAMMC_MAX_SPEED	/;"	d	file:
PXAMMC_MIN_SPEED	drivers/mmc/pxa_mmc_gen.c	/^#define PXAMMC_MIN_SPEED	/;"	d	file:
PXA_CS0_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS0_PHYS	/;"	d
PXA_CS0_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS0_PHYS /;"	d
PXA_CS1_LPHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS1_LPHYS /;"	d
PXA_CS1_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS1_PHYS	/;"	d
PXA_CS1_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS1_PHYS /;"	d
PXA_CS2_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS2_PHYS	/;"	d
PXA_CS2_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS2_PHYS /;"	d
PXA_CS3_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS3_PHYS	/;"	d
PXA_CS3_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS3_PHYS /;"	d
PXA_CS4_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS4_PHYS	/;"	d
PXA_CS5_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_CS5_PHYS	/;"	d
PXA_MMC_TIMEOUT	drivers/mmc/pxa_mmc_gen.c	/^#define PXA_MMC_TIMEOUT	/;"	d	file:
PXA_PCMCIA_PHYS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define PXA_PCMCIA_PHYS /;"	d
PXA_UDC_NUM_ENDPOINTS	drivers/usb/gadget/pxa25x_udc.h	/^#define	PXA_UDC_NUM_ENDPOINTS	/;"	d
PXCAR_BUS_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_BUS_NUM_MASK	/;"	d
PXCAR_BUS_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_BUS_NUM_MASK	/;"	d
PXCAR_BUS_NUM_MAX	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_BUS_NUM_MAX	/;"	d
PXCAR_BUS_NUM_MAX	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_BUS_NUM_MAX	/;"	d
PXCAR_BUS_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_BUS_NUM_OFFS	/;"	d
PXCAR_BUS_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_BUS_NUM_OFFS	/;"	d
PXCAR_CONFIG_EN	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_CONFIG_EN	/;"	d
PXCAR_CONFIG_EN	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_CONFIG_EN	/;"	d
PXCAR_DEVICE_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_DEVICE_NUM_MASK	/;"	d
PXCAR_DEVICE_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_DEVICE_NUM_MASK	/;"	d
PXCAR_DEVICE_NUM_MAX	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_DEVICE_NUM_MAX	/;"	d
PXCAR_DEVICE_NUM_MAX	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_DEVICE_NUM_MAX	/;"	d
PXCAR_DEVICE_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_DEVICE_NUM_OFFS	/;"	d
PXCAR_DEVICE_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_DEVICE_NUM_OFFS	/;"	d
PXCAR_EXT_REG_NUM_MAX	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_EXT_REG_NUM_MAX	/;"	d
PXCAR_EXT_REG_NUM_MAX	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_EXT_REG_NUM_MAX	/;"	d
PXCAR_EXT_REG_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_EXT_REG_NUM_OFFS	/;"	d
PXCAR_EXT_REG_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_EXT_REG_NUM_OFFS	/;"	d
PXCAR_FUNC_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_FUNC_NUM_MASK	/;"	d
PXCAR_FUNC_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_FUNC_NUM_MASK	/;"	d
PXCAR_FUNC_NUM_MAX	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_FUNC_NUM_MAX	/;"	d
PXCAR_FUNC_NUM_MAX	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_FUNC_NUM_MAX	/;"	d
PXCAR_FUNC_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_FUNC_NUM_OFFS	/;"	d
PXCAR_FUNC_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_FUNC_NUM_OFFS	/;"	d
PXCAR_REAL_EXT_REG_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_REAL_EXT_REG_NUM_MASK	/;"	d
PXCAR_REAL_EXT_REG_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_REAL_EXT_REG_NUM_MASK /;"	d
PXCAR_REAL_EXT_REG_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_REAL_EXT_REG_NUM_OFFS	/;"	d
PXCAR_REAL_EXT_REG_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_REAL_EXT_REG_NUM_OFFS /;"	d
PXCAR_REG_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_REG_NUM_MASK	/;"	d
PXCAR_REG_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_REG_NUM_MASK	/;"	d
PXCAR_REG_NUM_MAX	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_REG_NUM_MAX	/;"	d
PXCAR_REG_NUM_MAX	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_REG_NUM_MAX	/;"	d
PXCAR_REG_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXCAR_REG_NUM_OFFS	/;"	d
PXCAR_REG_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXCAR_REG_NUM_OFFS	/;"	d
PXCKEN_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define PXCKEN_MASK	/;"	d
PXCK_BITS_START	arch/powerpc/include/asm/immap_85xx.h	/^#define PXCK_BITS_START	/;"	d
PXCK_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define PXCK_MASK	/;"	d
PXCLK_INVERT	drivers/video/am335x-fb.h	/^#define PXCLK_INVERT	/;"	d
PXCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PXCR /;"	d
PXCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PXCR /;"	d
PXCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PXCR /;"	d
PXCR_A	board/ms7722se/lowlevel_init.S	/^PXCR_A:		.long	0xa4050148$/;"	l
PXCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PXCR_A:		.long	0xffec002e$/;"	l
PXCR_D	board/ms7722se/lowlevel_init.S	/^PXCR_D:		.word	0x0AAA$/;"	l
PXCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PXCR_D	/;"	d	file:
PXCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PXCR_D:		.long	0x0000$/;"	l
PXCR_D	board/renesas/sh7785lcr/lowlevel_init.S	/^PXCR_D:		.word	0x0000$/;"	l
PXDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PXDR /;"	d
PXDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PXDR /;"	d
PXDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PXDR /;"	d
PXEFILE_ADDR_R	include/configs/sunxi-common.h	/^#define PXEFILE_ADDR_R	/;"	d
PXEFILE_ADDR_R	include/configs/sunxi-common.h	/^#define PXEFILE_ADDR_R /;"	d
PXELINUX_DIR	cmd/pxe.c	/^#define PXELINUX_DIR /;"	d	file:
PXLCSR_NEG_LNK_GEN_1_1	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXLCSR_NEG_LNK_GEN_1_1	/;"	d
PXLCSR_NEG_LNK_GEN_2_0	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXLCSR_NEG_LNK_GEN_2_0	/;"	d
PXLCSR_NEG_LNK_GEN_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXLCSR_NEG_LNK_GEN_MASK	/;"	d
PXLCSR_NEG_LNK_GEN_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXLCSR_NEG_LNK_GEN_OFFS	/;"	d
PXP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define PXP_BASE_ADDR /;"	d
PXSAC_MABORT	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXSAC_MABORT	/;"	d
PXSAC_MABORT	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXSAC_MABORT	/;"	d
PXSEG	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define PXSEG(/;"	d
PXSR_DL_DOWN	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXSR_DL_DOWN	/;"	d
PXSR_PEX_BUS_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXSR_PEX_BUS_NUM_MASK	/;"	d
PXSR_PEX_BUS_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXSR_PEX_BUS_NUM_MASK	/;"	d
PXSR_PEX_BUS_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXSR_PEX_BUS_NUM_OFFS	/;"	d
PXSR_PEX_BUS_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXSR_PEX_BUS_NUM_OFFS	/;"	d
PXSR_PEX_DEV_NUM_MASK	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXSR_PEX_DEV_NUM_MASK	/;"	d
PXSR_PEX_DEV_NUM_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXSR_PEX_DEV_NUM_MASK	/;"	d
PXSR_PEX_DEV_NUM_OFFS	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define PXSR_PEX_DEV_NUM_OFFS	/;"	d
PXSR_PEX_DEV_NUM_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define PXSR_PEX_DEV_NUM_OFFS	/;"	d
PX_BRDCFG0_DLINK	board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c	/^#define PX_BRDCFG0_DLINK	/;"	d	file:
PX_BRDCFG0_DVISEL	board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c	/^#define PX_BRDCFG0_DVISEL	/;"	d	file:
PX_BRDCFG0_ELBC_DIU	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG0_ELBC_DIU	/;"	d	file:
PX_BRDCFG0_ELBC_SPI_ELBC	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG0_ELBC_SPI_ELBC	/;"	d	file:
PX_BRDCFG0_ELBC_SPI_MASK	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG0_ELBC_SPI_MASK	/;"	d	file:
PX_BRDCFG0_ELBC_SPI_NULL	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG0_ELBC_SPI_NULL	/;"	d	file:
PX_BRDCFG1_BACKLIGHT	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG1_BACKLIGHT	/;"	d	file:
PX_BRDCFG1_DFPEN	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG1_DFPEN	/;"	d	file:
PX_BRDCFG1_DVIEN	board/freescale/p1022ds/diu.c	/^#define PX_BRDCFG1_DVIEN	/;"	d	file:
PX_CTL_ALTACC	board/freescale/p1022ds/diu.c	/^#define PX_CTL_ALTACC	/;"	d	file:
PYCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PYCR /;"	d
PYCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PYCR /;"	d
PYCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PYCR /;"	d
PYCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PYCR_A:		.long	0xffec0030$/;"	l
PYCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PYCR_D	/;"	d	file:
PYCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PYCR_D:		.long	0x0000$/;"	l
PYDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PYDR /;"	d
PYDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PYDR /;"	d
PYDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PYDR /;"	d
PYTHON	Makefile	/^PYTHON		= python$/;"	m
PZCR	arch/sh/include/asm/cpu_sh7722.h	/^#define PZCR /;"	d
PZCR	arch/sh/include/asm/cpu_sh7723.h	/^#define PZCR /;"	d
PZCR	arch/sh/include/asm/cpu_sh7724.h	/^#define PZCR /;"	d
PZCR_A	board/renesas/sh7757lcr/lowlevel_init.S	/^PZCR_A:		.long	0xffec0032$/;"	l
PZCR_D	board/renesas/ap325rxa/ap325rxa.c	/^#define PZCR_D	/;"	d	file:
PZCR_D	board/renesas/sh7757lcr/lowlevel_init.S	/^PZCR_D:		.long	0x0000$/;"	l
PZDR	arch/sh/include/asm/cpu_sh7722.h	/^#define PZDR /;"	d
PZDR	arch/sh/include/asm/cpu_sh7723.h	/^#define PZDR /;"	d
PZDR	arch/sh/include/asm/cpu_sh7724.h	/^#define PZDR /;"	d
P_A10	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A10	/;"	d
P_A10	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A10	/;"	d
P_A10	arch/blackfin/include/asm/portmux.h	/^#define P_A10 /;"	d
P_A11	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A11	/;"	d
P_A11	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A11	/;"	d
P_A11	arch/blackfin/include/asm/portmux.h	/^#define P_A11 /;"	d
P_A12	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A12	/;"	d
P_A12	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A12	/;"	d
P_A12	arch/blackfin/include/asm/portmux.h	/^#define P_A12 /;"	d
P_A13	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A13	/;"	d
P_A13	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A13	/;"	d
P_A13	arch/blackfin/include/asm/portmux.h	/^#define P_A13 /;"	d
P_A14	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A14	/;"	d
P_A14	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A14	/;"	d
P_A14	arch/blackfin/include/asm/portmux.h	/^#define P_A14 /;"	d
P_A15	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A15	/;"	d
P_A15	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A15	/;"	d
P_A15	arch/blackfin/include/asm/portmux.h	/^#define P_A15 /;"	d
P_A16	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A16	/;"	d
P_A16	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A16	/;"	d
P_A16	arch/blackfin/include/asm/portmux.h	/^#define P_A16 /;"	d
P_A17	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A17	/;"	d
P_A17	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A17	/;"	d
P_A17	arch/blackfin/include/asm/portmux.h	/^#define P_A17 /;"	d
P_A18	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A18	/;"	d
P_A18	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A18	/;"	d
P_A18	arch/blackfin/include/asm/portmux.h	/^#define P_A18 /;"	d
P_A19	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A19	/;"	d
P_A19	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A19	/;"	d
P_A19	arch/blackfin/include/asm/portmux.h	/^#define P_A19 /;"	d
P_A20	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A20	/;"	d
P_A20	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A20	/;"	d
P_A20	arch/blackfin/include/asm/portmux.h	/^#define P_A20 /;"	d
P_A21	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A21	/;"	d
P_A21	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A21	/;"	d
P_A21	arch/blackfin/include/asm/portmux.h	/^#define P_A21 /;"	d
P_A22	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A22	/;"	d
P_A22	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A22	/;"	d
P_A22	arch/blackfin/include/asm/portmux.h	/^#define P_A22 /;"	d
P_A23	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A23	/;"	d
P_A23	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A23	/;"	d
P_A23	arch/blackfin/include/asm/portmux.h	/^#define P_A23 /;"	d
P_A24	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A24	/;"	d
P_A24	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A24	/;"	d
P_A24	arch/blackfin/include/asm/portmux.h	/^#define P_A24 /;"	d
P_A25	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A25	/;"	d
P_A25	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A25	/;"	d
P_A25	arch/blackfin/include/asm/portmux.h	/^#define P_A25 /;"	d
P_A3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A3	/;"	d
P_A4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A4	/;"	d
P_A4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A4	/;"	d
P_A4	arch/blackfin/include/asm/portmux.h	/^#define P_A4 /;"	d
P_A5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A5	/;"	d
P_A5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A5	/;"	d
P_A5	arch/blackfin/include/asm/portmux.h	/^#define P_A5 /;"	d
P_A6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A6	/;"	d
P_A6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A6	/;"	d
P_A6	arch/blackfin/include/asm/portmux.h	/^#define P_A6 /;"	d
P_A7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A7	/;"	d
P_A7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A7	/;"	d
P_A7	arch/blackfin/include/asm/portmux.h	/^#define P_A7 /;"	d
P_A8	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A8	/;"	d
P_A8	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A8	/;"	d
P_A8	arch/blackfin/include/asm/portmux.h	/^#define P_A8 /;"	d
P_A9	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_A9	/;"	d
P_A9	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_A9	/;"	d
P_A9	arch/blackfin/include/asm/portmux.h	/^#define P_A9 /;"	d
P_ABE0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_ABE0	/;"	d
P_ABE1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_ABE1	/;"	d
P_ACM_A0	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_ACM_A0	/;"	d
P_ACM_A1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_ACM_A1	/;"	d
P_ACM_A2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_ACM_A2	/;"	d
P_ACM_RANGE	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_ACM_RANGE	/;"	d
P_ACM_SE_DIFF	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_ACM_SE_DIFF	/;"	d
P_AMC_ARDY_NOR_WAIT	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_AMC_ARDY_NOR_WAIT	/;"	d
P_AMC_ARDY_NOR_WAIT	arch/blackfin/include/asm/portmux.h	/^#define P_AMC_ARDY_NOR_WAIT /;"	d
P_AMC_BG	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_AMC_BG	/;"	d
P_AMC_BG	arch/blackfin/include/asm/portmux.h	/^#define P_AMC_BG /;"	d
P_AMC_BGH	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_AMC_BGH	/;"	d
P_AMC_BGH	arch/blackfin/include/asm/portmux.h	/^#define P_AMC_BGH /;"	d
P_AMC_BR	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_AMC_BR	/;"	d
P_AMC_BR	arch/blackfin/include/asm/portmux.h	/^#define P_AMC_BR /;"	d
P_AMS1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_AMS1	/;"	d
P_AMS2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_AMS2	/;"	d
P_AMS2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_AMS2	/;"	d
P_AMS3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_AMS3	/;"	d
P_AMS3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_AMS3	/;"	d
P_ATAPI_A0A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_A0A	/;"	d
P_ATAPI_A0A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_A0A /;"	d
P_ATAPI_A1A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_A1A	/;"	d
P_ATAPI_A1A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_A1A /;"	d
P_ATAPI_A2A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_A2A	/;"	d
P_ATAPI_A2A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_A2A /;"	d
P_ATAPI_CS0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_CS0	/;"	d
P_ATAPI_CS0	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_CS0 /;"	d
P_ATAPI_CS1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_CS1	/;"	d
P_ATAPI_CS1	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_CS1 /;"	d
P_ATAPI_D0A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D0A	/;"	d
P_ATAPI_D0A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D0A /;"	d
P_ATAPI_D10A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D10A	/;"	d
P_ATAPI_D10A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D10A /;"	d
P_ATAPI_D11A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D11A	/;"	d
P_ATAPI_D11A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D11A /;"	d
P_ATAPI_D12A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D12A	/;"	d
P_ATAPI_D12A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D12A /;"	d
P_ATAPI_D13A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D13A	/;"	d
P_ATAPI_D13A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D13A /;"	d
P_ATAPI_D14A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D14A	/;"	d
P_ATAPI_D14A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D14A /;"	d
P_ATAPI_D15A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D15A	/;"	d
P_ATAPI_D15A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D15A /;"	d
P_ATAPI_D1A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D1A	/;"	d
P_ATAPI_D1A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D1A /;"	d
P_ATAPI_D2A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D2A	/;"	d
P_ATAPI_D2A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D2A /;"	d
P_ATAPI_D3A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D3A	/;"	d
P_ATAPI_D3A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D3A /;"	d
P_ATAPI_D4A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D4A	/;"	d
P_ATAPI_D4A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D4A /;"	d
P_ATAPI_D5A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D5A	/;"	d
P_ATAPI_D5A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D5A /;"	d
P_ATAPI_D6A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D6A	/;"	d
P_ATAPI_D6A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D6A /;"	d
P_ATAPI_D7A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D7A	/;"	d
P_ATAPI_D7A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D7A /;"	d
P_ATAPI_D8A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D8A	/;"	d
P_ATAPI_D8A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D8A /;"	d
P_ATAPI_D9A	arch/blackfin/include/asm/mach-bf548/portmux.h	/^# define P_ATAPI_D9A	/;"	d
P_ATAPI_D9A	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_D9A /;"	d
P_ATAPI_DIOR	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_DIOR	/;"	d
P_ATAPI_DIOR	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_DIOR /;"	d
P_ATAPI_DIOW	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_DIOW	/;"	d
P_ATAPI_DIOW	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_DIOW /;"	d
P_ATAPI_DMACK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_DMACK	/;"	d
P_ATAPI_DMACK	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_DMACK /;"	d
P_ATAPI_DMARQ	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_DMARQ	/;"	d
P_ATAPI_DMARQ	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_DMARQ /;"	d
P_ATAPI_INTRQ	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_INTRQ	/;"	d
P_ATAPI_INTRQ	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_INTRQ /;"	d
P_ATAPI_IORDY	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_IORDY	/;"	d
P_ATAPI_IORDY	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_IORDY /;"	d
P_ATAPI_RESET	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_ATAPI_RESET	/;"	d
P_ATAPI_RESET	arch/blackfin/include/asm/portmux.h	/^#define P_ATAPI_RESET /;"	d
P_CAN0_RX	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_CAN0_RX	/;"	d
P_CAN0_RX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_CAN0_RX	/;"	d
P_CAN0_RX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CAN0_RX	/;"	d
P_CAN0_RX	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_CAN0_RX	/;"	d
P_CAN0_RX	arch/blackfin/include/asm/portmux.h	/^#define P_CAN0_RX /;"	d
P_CAN0_TX	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_CAN0_TX	/;"	d
P_CAN0_TX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_CAN0_TX	/;"	d
P_CAN0_TX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CAN0_TX	/;"	d
P_CAN0_TX	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_CAN0_TX	/;"	d
P_CAN0_TX	arch/blackfin/include/asm/portmux.h	/^#define P_CAN0_TX /;"	d
P_CAN1_RX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CAN1_RX	/;"	d
P_CAN1_RX	arch/blackfin/include/asm/portmux.h	/^#define P_CAN1_RX /;"	d
P_CAN1_TX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CAN1_TX	/;"	d
P_CAN1_TX	arch/blackfin/include/asm/portmux.h	/^#define P_CAN1_TX /;"	d
P_CAN_RX	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_CAN_RX	/;"	d
P_CAN_TX	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_CAN_TX	/;"	d
P_CHOICE	scripts/kconfig/expr.h	/^	P_CHOICE,   \/* choice value *\/$/;"	e	enum:prop_type
P_CHOICE	scripts/kconfig/zconf.y	/^		case P_CHOICE:$/;"	l
P_CNT_CDG	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_CNT_CDG	/;"	d
P_CNT_CDG	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CNT_CDG	/;"	d
P_CNT_CDG	arch/blackfin/include/asm/portmux.h	/^#define P_CNT_CDG /;"	d
P_CNT_CUD	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_CNT_CUD	/;"	d
P_CNT_CUD	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CNT_CUD	/;"	d
P_CNT_CUD	arch/blackfin/include/asm/portmux.h	/^#define P_CNT_CUD /;"	d
P_CNT_CZM	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_CNT_CZM	/;"	d
P_CNT_CZM	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_CNT_CZM	/;"	d
P_CNT_CZM	arch/blackfin/include/asm/portmux.h	/^#define P_CNT_CZM /;"	d
P_COMMENT	scripts/kconfig/expr.h	/^	P_COMMENT,  \/* text associated with a comment *\/$/;"	e	enum:prop_type
P_COMMENT	scripts/kconfig/zconf.y	/^			case P_COMMENT:$/;"	l
P_DEFAULT	scripts/kconfig/expr.h	/^	P_DEFAULT,  \/* default y *\/$/;"	e	enum:prop_type
P_DEFAULT	scripts/kconfig/zconf.y	/^		case P_DEFAULT:$/;"	l
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS /;"	d
P_DEFAULT_BOOT_SPI_CS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_DEFAULT_BOOT_SPI_CS$/;"	d
P_DEFINED	arch/blackfin/include/asm/portmux.h	/^#define P_DEFINED	/;"	d
P_DMAR0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_DMAR0	/;"	d
P_DMAR0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_DMAR0	/;"	d
P_DMAR0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_DMAR0	/;"	d
P_DMAR0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_DMAR0	/;"	d
P_DMAR0	arch/blackfin/include/asm/portmux.h	/^#define P_DMAR0 /;"	d
P_DMAR1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_DMAR1	/;"	d
P_DMAR1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_DMAR1	/;"	d
P_DMAR1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_DMAR1	/;"	d
P_DMAR1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_DMAR1	/;"	d
P_DMAR1	arch/blackfin/include/asm/portmux.h	/^#define P_DMAR1 /;"	d
P_DONTCARE	arch/blackfin/include/asm/portmux.h	/^#define P_DONTCARE	/;"	d
P_ENV	scripts/kconfig/expr.h	/^	P_ENV,      \/* value from environment variable *\/$/;"	e	enum:prop_type
P_FUNCT	arch/blackfin/include/asm/portmux.h	/^#define P_FUNCT(/;"	d
P_FUNCT2MUX	arch/blackfin/include/asm/portmux.h	/^#define P_FUNCT2MUX(/;"	d
P_HOST_ACK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_ACK	/;"	d
P_HOST_ACK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_ACK	/;"	d
P_HOST_ACK	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_ACK /;"	d
P_HOST_ADDR	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_ADDR	/;"	d
P_HOST_ADDR	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_ADDR	/;"	d
P_HOST_ADDR	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_ADDR /;"	d
P_HOST_CE	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_CE	/;"	d
P_HOST_CE	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_CE	/;"	d
P_HOST_CE	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_CE /;"	d
P_HOST_D0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D0	/;"	d
P_HOST_D0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D0	/;"	d
P_HOST_D0	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D0 /;"	d
P_HOST_D1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D1	/;"	d
P_HOST_D1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D1	/;"	d
P_HOST_D1	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D1 /;"	d
P_HOST_D10	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D10	/;"	d
P_HOST_D10	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D10	/;"	d
P_HOST_D10	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D10 /;"	d
P_HOST_D11	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D11	/;"	d
P_HOST_D11	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D11	/;"	d
P_HOST_D11	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D11 /;"	d
P_HOST_D12	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D12	/;"	d
P_HOST_D12	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D12	/;"	d
P_HOST_D12	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D12 /;"	d
P_HOST_D13	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D13	/;"	d
P_HOST_D13	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D13	/;"	d
P_HOST_D13	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D13 /;"	d
P_HOST_D14	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D14	/;"	d
P_HOST_D14	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D14	/;"	d
P_HOST_D14	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D14 /;"	d
P_HOST_D15	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D15	/;"	d
P_HOST_D15	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D15	/;"	d
P_HOST_D15	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D15 /;"	d
P_HOST_D2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D2	/;"	d
P_HOST_D2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D2	/;"	d
P_HOST_D2	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D2 /;"	d
P_HOST_D3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D3	/;"	d
P_HOST_D3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D3	/;"	d
P_HOST_D3	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D3 /;"	d
P_HOST_D4	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D4	/;"	d
P_HOST_D4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D4	/;"	d
P_HOST_D4	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D4 /;"	d
P_HOST_D5	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D5	/;"	d
P_HOST_D5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D5	/;"	d
P_HOST_D5	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D5 /;"	d
P_HOST_D6	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D6	/;"	d
P_HOST_D6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D6	/;"	d
P_HOST_D6	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D6 /;"	d
P_HOST_D7	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D7	/;"	d
P_HOST_D7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D7	/;"	d
P_HOST_D7	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D7 /;"	d
P_HOST_D8	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D8	/;"	d
P_HOST_D8	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D8	/;"	d
P_HOST_D8	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D8 /;"	d
P_HOST_D9	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_D9	/;"	d
P_HOST_D9	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_D9	/;"	d
P_HOST_D9	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_D9 /;"	d
P_HOST_RD	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_RD	/;"	d
P_HOST_RD	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_RD	/;"	d
P_HOST_RD	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_RD /;"	d
P_HOST_WR	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HOST_WR	/;"	d
P_HOST_WR	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_HOST_WR	/;"	d
P_HOST_WR	arch/blackfin/include/asm/portmux.h	/^#define P_HOST_WR /;"	d
P_HWAIT	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_HWAIT	/;"	d
P_HWAIT	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_HWAIT	/;"	d
P_IDENT	arch/blackfin/include/asm/portmux.h	/^#define P_IDENT(/;"	d
P_ID_AMD_STD	drivers/mtd/jedec_flash.c	/^#define P_ID_AMD_STD /;"	d	file:
P_KEY_COL0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL0	/;"	d
P_KEY_COL0	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL0 /;"	d
P_KEY_COL1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL1	/;"	d
P_KEY_COL1	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL1 /;"	d
P_KEY_COL2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL2	/;"	d
P_KEY_COL2	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL2 /;"	d
P_KEY_COL3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL3	/;"	d
P_KEY_COL3	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL3 /;"	d
P_KEY_COL4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL4	/;"	d
P_KEY_COL4	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL4 /;"	d
P_KEY_COL5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL5	/;"	d
P_KEY_COL5	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL5 /;"	d
P_KEY_COL6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL6	/;"	d
P_KEY_COL6	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL6 /;"	d
P_KEY_COL7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_COL7	/;"	d
P_KEY_COL7	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_COL7 /;"	d
P_KEY_ROW0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW0	/;"	d
P_KEY_ROW0	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW0 /;"	d
P_KEY_ROW1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW1	/;"	d
P_KEY_ROW1	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW1 /;"	d
P_KEY_ROW2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW2	/;"	d
P_KEY_ROW2	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW2 /;"	d
P_KEY_ROW3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW3	/;"	d
P_KEY_ROW3	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW3 /;"	d
P_KEY_ROW4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW4	/;"	d
P_KEY_ROW4	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW4 /;"	d
P_KEY_ROW5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW5	/;"	d
P_KEY_ROW5	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW5 /;"	d
P_KEY_ROW6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW6	/;"	d
P_KEY_ROW6	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW6 /;"	d
P_KEY_ROW7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_KEY_ROW7	/;"	d
P_KEY_ROW7	arch/blackfin/include/asm/portmux.h	/^#define P_KEY_ROW7 /;"	d
P_MAYSHARE	arch/blackfin/include/asm/portmux.h	/^#define P_MAYSHARE	/;"	d
P_MBCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_MBCLK	/;"	d
P_MBCLK	arch/blackfin/include/asm/portmux.h	/^#define P_MBCLK /;"	d
P_MDC	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MDC	/;"	d
P_MDC	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MDC	/;"	d
P_MDC	arch/blackfin/include/asm/portmux.h	/^#define P_MDC /;"	d
P_MDIO	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MDIO	/;"	d
P_MDIO	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MDIO	/;"	d
P_MDIO	arch/blackfin/include/asm/portmux.h	/^#define P_MDIO /;"	d
P_MENU	scripts/kconfig/expr.h	/^	P_MENU,     \/* prompt associated with a menuconfig option *\/$/;"	e	enum:prop_type
P_MENU	scripts/kconfig/zconf.y	/^			case P_MENU:$/;"	l
P_MENU	scripts/kconfig/zconf.y	/^		case P_MENU:$/;"	l
P_MII0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0 /;"	d
P_MII0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0 /;"	d
P_MII0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0 /;"	d
P_MII0_COL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_COL	/;"	d
P_MII0_COL	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_COL	/;"	d
P_MII0_COL	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_COL	/;"	d
P_MII0_COL	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_COL /;"	d
P_MII0_CRS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_CRS	/;"	d
P_MII0_CRS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_CRS	/;"	d
P_MII0_CRS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_CRS	/;"	d
P_MII0_CRS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_CRS	/;"	d
P_MII0_CRS	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_CRS /;"	d
P_MII0_ERxCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxCLK	/;"	d
P_MII0_ERxCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxCLK	/;"	d
P_MII0_ERxCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxCLK	/;"	d
P_MII0_ERxCLK	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxCLK /;"	d
P_MII0_ERxD0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxD0	/;"	d
P_MII0_ERxD0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxD0	/;"	d
P_MII0_ERxD0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxD0	/;"	d
P_MII0_ERxD0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_ERxD0	/;"	d
P_MII0_ERxD0	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxD0 /;"	d
P_MII0_ERxD1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxD1	/;"	d
P_MII0_ERxD1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxD1	/;"	d
P_MII0_ERxD1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxD1	/;"	d
P_MII0_ERxD1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_ERxD1	/;"	d
P_MII0_ERxD1	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxD1 /;"	d
P_MII0_ERxD2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxD2	/;"	d
P_MII0_ERxD2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxD2	/;"	d
P_MII0_ERxD2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxD2	/;"	d
P_MII0_ERxD2	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxD2 /;"	d
P_MII0_ERxD3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxD3	/;"	d
P_MII0_ERxD3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxD3	/;"	d
P_MII0_ERxD3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxD3	/;"	d
P_MII0_ERxD3	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxD3 /;"	d
P_MII0_ERxDV	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxDV	/;"	d
P_MII0_ERxDV	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxDV	/;"	d
P_MII0_ERxDV	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxDV	/;"	d
P_MII0_ERxDV	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxDV /;"	d
P_MII0_ERxER	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ERxER	/;"	d
P_MII0_ERxER	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ERxER	/;"	d
P_MII0_ERxER	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ERxER	/;"	d
P_MII0_ERxER	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_ERxER	/;"	d
P_MII0_ERxER	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ERxER /;"	d
P_MII0_ETxD0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ETxD0	/;"	d
P_MII0_ETxD0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ETxD0	/;"	d
P_MII0_ETxD0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ETxD0	/;"	d
P_MII0_ETxD0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_ETxD0	/;"	d
P_MII0_ETxD0	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ETxD0 /;"	d
P_MII0_ETxD1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ETxD1	/;"	d
P_MII0_ETxD1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ETxD1	/;"	d
P_MII0_ETxD1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ETxD1	/;"	d
P_MII0_ETxD1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_ETxD1	/;"	d
P_MII0_ETxD1	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ETxD1 /;"	d
P_MII0_ETxD2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ETxD2	/;"	d
P_MII0_ETxD2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ETxD2	/;"	d
P_MII0_ETxD2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ETxD2	/;"	d
P_MII0_ETxD2	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ETxD2 /;"	d
P_MII0_ETxD3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ETxD3	/;"	d
P_MII0_ETxD3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ETxD3	/;"	d
P_MII0_ETxD3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ETxD3	/;"	d
P_MII0_ETxD3	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ETxD3 /;"	d
P_MII0_ETxEN	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_ETxEN	/;"	d
P_MII0_ETxEN	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_ETxEN	/;"	d
P_MII0_ETxEN	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_ETxEN	/;"	d
P_MII0_ETxEN	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_ETxEN	/;"	d
P_MII0_ETxEN	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_ETxEN /;"	d
P_MII0_MDC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_MDC	/;"	d
P_MII0_MDC	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_MDC	/;"	d
P_MII0_MDIO	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_MDIO	/;"	d
P_MII0_MDIO	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_MDIO	/;"	d
P_MII0_PHYINT	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_PHYINT	/;"	d
P_MII0_PHYINT	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_PHYINT	/;"	d
P_MII0_PHYINT	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_PHYINT	/;"	d
P_MII0_PHYINT	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_PHYINT	/;"	d
P_MII0_PHYINT	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_PHYINT /;"	d
P_MII0_TxCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_MII0_TxCLK	/;"	d
P_MII0_TxCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_MII0_TxCLK	/;"	d
P_MII0_TxCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_MII0_TxCLK	/;"	d
P_MII0_TxCLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII0_TxCLK	/;"	d
P_MII0_TxCLK	arch/blackfin/include/asm/portmux.h	/^#define P_MII0_TxCLK /;"	d
P_MII1_CRS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_CRS	/;"	d
P_MII1_ERxD0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_ERxD0	/;"	d
P_MII1_ERxD1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_ERxD1	/;"	d
P_MII1_ERxER	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_ERxER	/;"	d
P_MII1_ETxD0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_ETxD0	/;"	d
P_MII1_ETxD1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_ETxD1	/;"	d
P_MII1_ETxEN	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_ETxEN	/;"	d
P_MII1_MDC	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_MDC	/;"	d
P_MII1_MDIO	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_MDIO	/;"	d
P_MII1_PHYINT	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_PHYINT	/;"	d
P_MII1_TxCLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_MII1_TxCLK	/;"	d
P_MMCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_MMCLK	/;"	d
P_MMCLK	arch/blackfin/include/asm/portmux.h	/^#define P_MMCLK /;"	d
P_MRX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_MRX	/;"	d
P_MRX	arch/blackfin/include/asm/portmux.h	/^#define P_MRX /;"	d
P_MRXONB	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_MRXONB	/;"	d
P_MRXONB	arch/blackfin/include/asm/portmux.h	/^#define P_MRXONB /;"	d
P_MTX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_MTX	/;"	d
P_MTX	arch/blackfin/include/asm/portmux.h	/^#define P_MTX /;"	d
P_MTXONB	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_MTXONB	/;"	d
P_MTXONB	arch/blackfin/include/asm/portmux.h	/^#define P_MTXONB /;"	d
P_MUX_SET_SSP0	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^#define P_MUX_SET_SSP0 /;"	d	file:
P_NAND_ALE	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_ALE	/;"	d
P_NAND_ALE	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_ALE	/;"	d
P_NAND_CE	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_CE	/;"	d
P_NAND_CE	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_CE	/;"	d
P_NAND_CE	arch/blackfin/include/asm/portmux.h	/^#define P_NAND_CE /;"	d
P_NAND_CLE	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_CLE	/;"	d
P_NAND_CLE	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_CLE	/;"	d
P_NAND_D0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D0	/;"	d
P_NAND_D0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D0	/;"	d
P_NAND_D1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D1	/;"	d
P_NAND_D1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D1	/;"	d
P_NAND_D2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D2	/;"	d
P_NAND_D2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D2	/;"	d
P_NAND_D3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D3	/;"	d
P_NAND_D3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D3	/;"	d
P_NAND_D4	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D4	/;"	d
P_NAND_D4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D4	/;"	d
P_NAND_D5	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D5	/;"	d
P_NAND_D5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D5	/;"	d
P_NAND_D6	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D6	/;"	d
P_NAND_D6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D6	/;"	d
P_NAND_D7	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_D7	/;"	d
P_NAND_D7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_D7	/;"	d
P_NAND_RB	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_RB	/;"	d
P_NAND_RB	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_RB	/;"	d
P_NAND_RB	arch/blackfin/include/asm/portmux.h	/^#define P_NAND_RB /;"	d
P_NAND_RE	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_RE	/;"	d
P_NAND_RE	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_RE	/;"	d
P_NAND_WE	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_NAND_WE	/;"	d
P_NAND_WE	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NAND_WE	/;"	d
P_NORCK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_NORCK /;"	d
P_NOR_CLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_NOR_CLK	/;"	d
P_NOR_CLK	arch/blackfin/include/asm/portmux.h	/^#define P_NOR_CLK /;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_CLK	/;"	d
P_PPI0_CLK	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_CLK /;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D0	/;"	d
P_PPI0_D0	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D0 /;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D1	/;"	d
P_PPI0_D1	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D1 /;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D10	/;"	d
P_PPI0_D10	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D10 /;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D11	/;"	d
P_PPI0_D11	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D11 /;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D12	/;"	d
P_PPI0_D12	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D12 /;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D13	/;"	d
P_PPI0_D13	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D13 /;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D14	/;"	d
P_PPI0_D14	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D14 /;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D15	/;"	d
P_PPI0_D15	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D15 /;"	d
P_PPI0_D16	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D16	/;"	d
P_PPI0_D16	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D16	/;"	d
P_PPI0_D16	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D16 /;"	d
P_PPI0_D17	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D17	/;"	d
P_PPI0_D17	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D17	/;"	d
P_PPI0_D17	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D17 /;"	d
P_PPI0_D18	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D18	/;"	d
P_PPI0_D18	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D18	/;"	d
P_PPI0_D18	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D18 /;"	d
P_PPI0_D19	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D19	/;"	d
P_PPI0_D19	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D19	/;"	d
P_PPI0_D19	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D19 /;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D2	/;"	d
P_PPI0_D2	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D2 /;"	d
P_PPI0_D20	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D20	/;"	d
P_PPI0_D20	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D20	/;"	d
P_PPI0_D20	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D20 /;"	d
P_PPI0_D21	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D21	/;"	d
P_PPI0_D21	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D21	/;"	d
P_PPI0_D21	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D21 /;"	d
P_PPI0_D22	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D22	/;"	d
P_PPI0_D22	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D22	/;"	d
P_PPI0_D22	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D22 /;"	d
P_PPI0_D23	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D23	/;"	d
P_PPI0_D23	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D23	/;"	d
P_PPI0_D23	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D23 /;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D3	/;"	d
P_PPI0_D3	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D3 /;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D4	/;"	d
P_PPI0_D4	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D4 /;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D5	/;"	d
P_PPI0_D5	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D5 /;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D6	/;"	d
P_PPI0_D6	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D6 /;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D7	/;"	d
P_PPI0_D7	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D7 /;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D8	/;"	d
P_PPI0_D8	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D8 /;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_D9	/;"	d
P_PPI0_D9	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_D9 /;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_FS1	/;"	d
P_PPI0_FS1	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_FS1 /;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_FS2	/;"	d
P_PPI0_FS2	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_FS2 /;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI0_FS3	/;"	d
P_PPI0_FS3	arch/blackfin/include/asm/portmux.h	/^#define P_PPI0_FS3 /;"	d
P_PPI1_CLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_CLK	/;"	d
P_PPI1_CLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_CLK	/;"	d
P_PPI1_CLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_CLK	/;"	d
P_PPI1_CLK	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_CLK /;"	d
P_PPI1_D0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D0	/;"	d
P_PPI1_D0	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D0	/;"	d
P_PPI1_D0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D0	/;"	d
P_PPI1_D0	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D0 /;"	d
P_PPI1_D1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D1	/;"	d
P_PPI1_D1	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D1	/;"	d
P_PPI1_D1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D1	/;"	d
P_PPI1_D1	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D1 /;"	d
P_PPI1_D10	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D10	/;"	d
P_PPI1_D10	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D10	/;"	d
P_PPI1_D10	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D10	/;"	d
P_PPI1_D10	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D10 /;"	d
P_PPI1_D11	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D11	/;"	d
P_PPI1_D11	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D11	/;"	d
P_PPI1_D11	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D11	/;"	d
P_PPI1_D11	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D11 /;"	d
P_PPI1_D12	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D12	/;"	d
P_PPI1_D12	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D12	/;"	d
P_PPI1_D12	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D12	/;"	d
P_PPI1_D12	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D12 /;"	d
P_PPI1_D13	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D13	/;"	d
P_PPI1_D13	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D13	/;"	d
P_PPI1_D13	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D13	/;"	d
P_PPI1_D13	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D13 /;"	d
P_PPI1_D14	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D14	/;"	d
P_PPI1_D14	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D14	/;"	d
P_PPI1_D14	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D14	/;"	d
P_PPI1_D14	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D14 /;"	d
P_PPI1_D15	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D15	/;"	d
P_PPI1_D15	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D15	/;"	d
P_PPI1_D15	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D15	/;"	d
P_PPI1_D15	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D15 /;"	d
P_PPI1_D16	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D16	/;"	d
P_PPI1_D17	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D17	/;"	d
P_PPI1_D2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D2	/;"	d
P_PPI1_D2	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D2	/;"	d
P_PPI1_D2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D2	/;"	d
P_PPI1_D2	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D2 /;"	d
P_PPI1_D3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D3	/;"	d
P_PPI1_D3	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D3	/;"	d
P_PPI1_D3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D3	/;"	d
P_PPI1_D3	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D3 /;"	d
P_PPI1_D4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D4	/;"	d
P_PPI1_D4	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D4	/;"	d
P_PPI1_D4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D4	/;"	d
P_PPI1_D4	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D4 /;"	d
P_PPI1_D5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D5	/;"	d
P_PPI1_D5	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D5	/;"	d
P_PPI1_D5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D5	/;"	d
P_PPI1_D5	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D5 /;"	d
P_PPI1_D6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D6	/;"	d
P_PPI1_D6	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D6	/;"	d
P_PPI1_D6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D6	/;"	d
P_PPI1_D6	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D6 /;"	d
P_PPI1_D7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D7	/;"	d
P_PPI1_D7	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D7	/;"	d
P_PPI1_D7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D7	/;"	d
P_PPI1_D7	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D7 /;"	d
P_PPI1_D8	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D8	/;"	d
P_PPI1_D8	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D8	/;"	d
P_PPI1_D8	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D8	/;"	d
P_PPI1_D8	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D8 /;"	d
P_PPI1_D9	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_D9	/;"	d
P_PPI1_D9	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_D9	/;"	d
P_PPI1_D9	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_D9	/;"	d
P_PPI1_D9	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_D9 /;"	d
P_PPI1_FS1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_FS1	/;"	d
P_PPI1_FS1	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_FS1	/;"	d
P_PPI1_FS1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_FS1	/;"	d
P_PPI1_FS1	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_FS1 /;"	d
P_PPI1_FS2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_FS2	/;"	d
P_PPI1_FS2	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_FS2	/;"	d
P_PPI1_FS2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_FS2	/;"	d
P_PPI1_FS2	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_FS2 /;"	d
P_PPI1_FS3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI1_FS3	/;"	d
P_PPI1_FS3	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_PPI1_FS3	/;"	d
P_PPI1_FS3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI1_FS3	/;"	d
P_PPI1_FS3	arch/blackfin/include/asm/portmux.h	/^#define P_PPI1_FS3 /;"	d
P_PPI2_CLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_CLK	/;"	d
P_PPI2_CLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_CLK	/;"	d
P_PPI2_CLK	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_CLK /;"	d
P_PPI2_D0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D0	/;"	d
P_PPI2_D0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D0	/;"	d
P_PPI2_D0	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D0 /;"	d
P_PPI2_D1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D1	/;"	d
P_PPI2_D1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D1	/;"	d
P_PPI2_D1	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D1 /;"	d
P_PPI2_D10	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D10	/;"	d
P_PPI2_D11	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D11	/;"	d
P_PPI2_D12	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D12	/;"	d
P_PPI2_D13	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D13	/;"	d
P_PPI2_D14	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D14	/;"	d
P_PPI2_D15	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D15	/;"	d
P_PPI2_D16	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D16	/;"	d
P_PPI2_D17	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D17	/;"	d
P_PPI2_D2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D2	/;"	d
P_PPI2_D2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D2	/;"	d
P_PPI2_D2	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D2 /;"	d
P_PPI2_D3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D3	/;"	d
P_PPI2_D3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D3	/;"	d
P_PPI2_D3	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D3 /;"	d
P_PPI2_D4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D4	/;"	d
P_PPI2_D4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D4	/;"	d
P_PPI2_D4	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D4 /;"	d
P_PPI2_D5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D5	/;"	d
P_PPI2_D5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D5	/;"	d
P_PPI2_D5	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D5 /;"	d
P_PPI2_D6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D6	/;"	d
P_PPI2_D6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D6	/;"	d
P_PPI2_D6	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D6 /;"	d
P_PPI2_D7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_D7	/;"	d
P_PPI2_D7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D7	/;"	d
P_PPI2_D7	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_D7 /;"	d
P_PPI2_D8	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D8	/;"	d
P_PPI2_D9	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_D9	/;"	d
P_PPI2_FS1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_FS1	/;"	d
P_PPI2_FS1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_FS1	/;"	d
P_PPI2_FS1	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_FS1 /;"	d
P_PPI2_FS2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_FS2	/;"	d
P_PPI2_FS2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_FS2	/;"	d
P_PPI2_FS2	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_FS2 /;"	d
P_PPI2_FS3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_PPI2_FS3	/;"	d
P_PPI2_FS3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PPI2_FS3	/;"	d
P_PPI2_FS3	arch/blackfin/include/asm/portmux.h	/^#define P_PPI2_FS3 /;"	d
P_PROMPT	scripts/kconfig/expr.h	/^	P_PROMPT,   \/* prompt "foo prompt" or "BAZ Value" *\/$/;"	e	enum:prop_type
P_PROMPT	scripts/kconfig/zconf.y	/^		case P_PROMPT:$/;"	l
P_PTP0_AUXIN	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PTP0_AUXIN	/;"	d
P_PTP0_CLKIN	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PTP0_CLKIN	/;"	d
P_PTP0_PPS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PTP0_PPS	/;"	d
P_PTP1_AUXIN	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PTP1_AUXIN	/;"	d
P_PTP1_CLKIN	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PTP1_CLKIN	/;"	d
P_PTP1_PPS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_PTP1_PPS	/;"	d
P_PTP_CLKOUT	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PTP_CLKOUT	/;"	d
P_PTP_PPS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PTP_PPS	/;"	d
P_PWM0_AH	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_AH	/;"	d
P_PWM0_AH	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_AH	/;"	d
P_PWM0_AL	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_AL	/;"	d
P_PWM0_AL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_AL	/;"	d
P_PWM0_BH	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_BH	/;"	d
P_PWM0_BH	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_BH	/;"	d
P_PWM0_BL	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_BL	/;"	d
P_PWM0_BL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_BL	/;"	d
P_PWM0_CH	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_CH	/;"	d
P_PWM0_CH	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_CH	/;"	d
P_PWM0_CL	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_CL	/;"	d
P_PWM0_CL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_CL	/;"	d
P_PWM0_SYNC	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_SYNC	/;"	d
P_PWM0_SYNC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM0_SYNC	/;"	d
P_PWM0_TRIP	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM0_TRIP	/;"	d
P_PWM1_AH	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_AH	/;"	d
P_PWM1_AH	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_AH	/;"	d
P_PWM1_AL	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_AL	/;"	d
P_PWM1_AL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_AL	/;"	d
P_PWM1_BH	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_BH	/;"	d
P_PWM1_BH	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_BH	/;"	d
P_PWM1_BL	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_BL	/;"	d
P_PWM1_BL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_BL	/;"	d
P_PWM1_CH	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_CH	/;"	d
P_PWM1_CH	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_CH	/;"	d
P_PWM1_CL	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_CL	/;"	d
P_PWM1_CL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_CL	/;"	d
P_PWM1_SYNC	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_SYNC	/;"	d
P_PWM1_SYNC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM1_SYNC	/;"	d
P_PWM1_TRIP	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_PWM1_TRIP	/;"	d
P_PWM_TRIPB	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_PWM_TRIPB	/;"	d
P_RANGE	scripts/kconfig/expr.h	/^	P_RANGE,    \/* range 7..100 (for a symbol) *\/$/;"	e	enum:prop_type
P_RANGE	scripts/kconfig/zconf.y	/^		case P_RANGE:$/;"	l
P_RMII0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RMII0 /;"	d
P_RMII0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_RMII0 /;"	d
P_RMII0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_RMII0 /;"	d
P_RMII0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RMII0 /;"	d
P_RMII0_CRS_DV	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_RMII0_CRS_DV	/;"	d
P_RMII0_CRS_DV	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_RMII0_CRS_DV	/;"	d
P_RMII0_CRS_DV	arch/blackfin/include/asm/portmux.h	/^#define P_RMII0_CRS_DV /;"	d
P_RMII0_MDINT	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_RMII0_MDINT	/;"	d
P_RMII0_MDINT	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_RMII0_MDINT	/;"	d
P_RMII0_MDINT	arch/blackfin/include/asm/portmux.h	/^#define P_RMII0_MDINT /;"	d
P_RMII0_REF_CLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_RMII0_REF_CLK	/;"	d
P_RMII0_REF_CLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_RMII0_REF_CLK	/;"	d
P_RMII0_REF_CLK	arch/blackfin/include/asm/portmux.h	/^#define P_RMII0_REF_CLK /;"	d
P_RMII1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RMII1 /;"	d
P_RSI_CLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_CLK	/;"	d
P_RSI_CLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_CLK	/;"	d
P_RSI_CLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_CLK	/;"	d
P_RSI_CMD	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_CMD	/;"	d
P_RSI_CMD	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_CMD	/;"	d
P_RSI_CMD	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_CMD	/;"	d
P_RSI_DATA0	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA0	/;"	d
P_RSI_DATA0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA0	/;"	d
P_RSI_DATA0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA0	/;"	d
P_RSI_DATA1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA1	/;"	d
P_RSI_DATA1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA1	/;"	d
P_RSI_DATA1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA1	/;"	d
P_RSI_DATA2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA2	/;"	d
P_RSI_DATA2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA2	/;"	d
P_RSI_DATA2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA2	/;"	d
P_RSI_DATA3	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA3	/;"	d
P_RSI_DATA3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA3	/;"	d
P_RSI_DATA3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA3	/;"	d
P_RSI_DATA4	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA4	/;"	d
P_RSI_DATA4	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA4	/;"	d
P_RSI_DATA4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA4	/;"	d
P_RSI_DATA5	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA5	/;"	d
P_RSI_DATA5	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA5	/;"	d
P_RSI_DATA5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA5	/;"	d
P_RSI_DATA6	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA6	/;"	d
P_RSI_DATA6	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA6	/;"	d
P_RSI_DATA6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA6	/;"	d
P_RSI_DATA7	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_RSI_DATA7	/;"	d
P_RSI_DATA7	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_RSI_DATA7	/;"	d
P_RSI_DATA7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_RSI_DATA7	/;"	d
P_SD_CLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SD_CLK	/;"	d
P_SD_CLK	arch/blackfin/include/asm/portmux.h	/^#define P_SD_CLK /;"	d
P_SD_CMD	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SD_CMD	/;"	d
P_SD_CMD	arch/blackfin/include/asm/portmux.h	/^#define P_SD_CMD /;"	d
P_SD_D0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SD_D0	/;"	d
P_SD_D0	arch/blackfin/include/asm/portmux.h	/^#define P_SD_D0 /;"	d
P_SD_D1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SD_D1	/;"	d
P_SD_D1	arch/blackfin/include/asm/portmux.h	/^#define P_SD_D1 /;"	d
P_SD_D2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SD_D2	/;"	d
P_SD_D2	arch/blackfin/include/asm/portmux.h	/^#define P_SD_D2 /;"	d
P_SD_D3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SD_D3	/;"	d
P_SD_D3	arch/blackfin/include/asm/portmux.h	/^#define P_SD_D3 /;"	d
P_SELECT	scripts/kconfig/expr.h	/^	P_SELECT,   \/* select BAR *\/$/;"	e	enum:prop_type
P_SELECT	scripts/kconfig/zconf.y	/^		case P_SELECT:$/;"	l
P_SPI0_D2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_D2	/;"	d
P_SPI0_D3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_D3	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_MISO	/;"	d
P_SPI0_MISO	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_MISO /;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_MOSI	/;"	d
P_SPI0_MOSI	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_MOSI /;"	d
P_SPI0_RDY	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_RDY	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SCK	/;"	d
P_SPI0_SCK	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SCK /;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SS	/;"	d
P_SPI0_SS	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SS /;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL1	/;"	d
P_SPI0_SSEL1	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL1 /;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL2	/;"	d
P_SPI0_SSEL2	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL2 /;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL3	/;"	d
P_SPI0_SSEL3	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL3 /;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL4	/;"	d
P_SPI0_SSEL4	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL4 /;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL5	/;"	d
P_SPI0_SSEL5	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL5 /;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL6	/;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL6	/;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL6	/;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL6	/;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL6	/;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL6	/;"	d
P_SPI0_SSEL6	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL6 /;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPI0_SSEL7	/;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPI0_SSEL7	/;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPI0_SSEL7	/;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI0_SSEL7	/;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPI0_SSEL7	/;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI0_SSEL7	/;"	d
P_SPI0_SSEL7	arch/blackfin/include/asm/portmux.h	/^#define P_SPI0_SSEL7 /;"	d
P_SPI1_D2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_D2	/;"	d
P_SPI1_D3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_D3	/;"	d
P_SPI1_MISO	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI1_MISO	/;"	d
P_SPI1_MISO	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_MISO	/;"	d
P_SPI1_MISO	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI1_MISO	/;"	d
P_SPI1_MISO	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_MISO	/;"	d
P_SPI1_MISO	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_MISO	/;"	d
P_SPI1_MISO	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_MISO /;"	d
P_SPI1_MOSI	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI1_MOSI	/;"	d
P_SPI1_MOSI	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_MOSI	/;"	d
P_SPI1_MOSI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI1_MOSI	/;"	d
P_SPI1_MOSI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_MOSI	/;"	d
P_SPI1_MOSI	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_MOSI	/;"	d
P_SPI1_MOSI	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_MOSI /;"	d
P_SPI1_RDY	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_RDY	/;"	d
P_SPI1_SCK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI1_SCK	/;"	d
P_SPI1_SCK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SCK	/;"	d
P_SPI1_SCK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI1_SCK	/;"	d
P_SPI1_SCK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_SCK	/;"	d
P_SPI1_SCK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SCK	/;"	d
P_SPI1_SCK	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SCK /;"	d
P_SPI1_SS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SS	/;"	d
P_SPI1_SS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI1_SS	/;"	d
P_SPI1_SS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_SS	/;"	d
P_SPI1_SS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SS	/;"	d
P_SPI1_SS	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SS /;"	d
P_SPI1_SSEL1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI1_SSEL1	/;"	d
P_SPI1_SSEL1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SSEL1	/;"	d
P_SPI1_SSEL1	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI1_SSEL1	/;"	d
P_SPI1_SSEL1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_SSEL1	/;"	d
P_SPI1_SSEL1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL1	/;"	d
P_SPI1_SSEL1	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL1 /;"	d
P_SPI1_SSEL2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI1_SSEL2	/;"	d
P_SPI1_SSEL2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SSEL2	/;"	d
P_SPI1_SSEL2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_SSEL2	/;"	d
P_SPI1_SSEL2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL2	/;"	d
P_SPI1_SSEL2	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL2 /;"	d
P_SPI1_SSEL3	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPI1_SSEL3	/;"	d
P_SPI1_SSEL3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SSEL3	/;"	d
P_SPI1_SSEL3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI1_SSEL3	/;"	d
P_SPI1_SSEL3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL3	/;"	d
P_SPI1_SSEL3	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL3 /;"	d
P_SPI1_SSEL4	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SSEL4	/;"	d
P_SPI1_SSEL4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL4	/;"	d
P_SPI1_SSEL4	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL4 /;"	d
P_SPI1_SSEL5	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPI1_SSEL5	/;"	d
P_SPI1_SSEL5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL5	/;"	d
P_SPI1_SSEL5	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL5 /;"	d
P_SPI1_SSEL6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL6	/;"	d
P_SPI1_SSEL6	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL6 /;"	d
P_SPI1_SSEL7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_SPI1_SSEL7	/;"	d
P_SPI1_SSEL7	arch/blackfin/include/asm/portmux.h	/^#define P_SPI1_SSEL7 /;"	d
P_SPI2_MISO	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI2_MISO	/;"	d
P_SPI2_MISO	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_MISO	/;"	d
P_SPI2_MISO	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_MISO /;"	d
P_SPI2_MOSI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI2_MOSI	/;"	d
P_SPI2_MOSI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_MOSI	/;"	d
P_SPI2_MOSI	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_MOSI /;"	d
P_SPI2_SCK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI2_SCK	/;"	d
P_SPI2_SCK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_SCK	/;"	d
P_SPI2_SCK	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SCK /;"	d
P_SPI2_SS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI2_SS	/;"	d
P_SPI2_SS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_SS	/;"	d
P_SPI2_SS	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SS /;"	d
P_SPI2_SSEL1	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPI2_SSEL1	/;"	d
P_SPI2_SSEL1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_SSEL1	/;"	d
P_SPI2_SSEL1	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL1 /;"	d
P_SPI2_SSEL2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_SSEL2	/;"	d
P_SPI2_SSEL2	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL2 /;"	d
P_SPI2_SSEL3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPI2_SSEL3	/;"	d
P_SPI2_SSEL3	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL3 /;"	d
P_SPI2_SSEL4	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL4 /;"	d
P_SPI2_SSEL5	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL5 /;"	d
P_SPI2_SSEL6	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL6 /;"	d
P_SPI2_SSEL7	arch/blackfin/include/asm/portmux.h	/^#define P_SPI2_SSEL7 /;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_DRPRI	/;"	d
P_SPORT0_DRPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_DRPRI /;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_DRSEC	/;"	d
P_SPORT0_DRSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_DRSEC /;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_DTPRI	/;"	d
P_SPORT0_DTPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_DTPRI /;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_DTSEC	/;"	d
P_SPORT0_DTSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_DTSEC /;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_RFS	/;"	d
P_SPORT0_RFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_RFS /;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_RSCLK	/;"	d
P_SPORT0_RSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_RSCLK /;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_TFS	/;"	d
P_SPORT0_TFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_TFS /;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT0_TSCLK	/;"	d
P_SPORT0_TSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT0_TSCLK /;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_DRPRI	/;"	d
P_SPORT1_DRPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_DRPRI /;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_DRSEC	/;"	d
P_SPORT1_DRSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_DRSEC /;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_DTPRI	/;"	d
P_SPORT1_DTPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_DTPRI /;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_DTSEC	/;"	d
P_SPORT1_DTSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_DTSEC /;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_RFS	/;"	d
P_SPORT1_RFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_RFS /;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_RSCLK	/;"	d
P_SPORT1_RSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_RSCLK /;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_TFS	/;"	d
P_SPORT1_TFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_TFS /;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_SPORT1_TSCLK	/;"	d
P_SPORT1_TSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT1_TSCLK /;"	d
P_SPORT2_DRPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_DRPRI	/;"	d
P_SPORT2_DRPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_DRPRI	/;"	d
P_SPORT2_DRPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_DRPRI /;"	d
P_SPORT2_DRSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_DRSEC	/;"	d
P_SPORT2_DRSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_DRSEC	/;"	d
P_SPORT2_DRSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_DRSEC /;"	d
P_SPORT2_DTPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_DTPRI	/;"	d
P_SPORT2_DTPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_DTPRI	/;"	d
P_SPORT2_DTPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_DTPRI /;"	d
P_SPORT2_DTSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_DTSEC	/;"	d
P_SPORT2_DTSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_DTSEC	/;"	d
P_SPORT2_DTSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_DTSEC /;"	d
P_SPORT2_RFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_RFS	/;"	d
P_SPORT2_RFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_RFS	/;"	d
P_SPORT2_RFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_RFS /;"	d
P_SPORT2_RSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_RSCLK	/;"	d
P_SPORT2_RSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_RSCLK	/;"	d
P_SPORT2_RSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_RSCLK /;"	d
P_SPORT2_TFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_TFS	/;"	d
P_SPORT2_TFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_TFS	/;"	d
P_SPORT2_TFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_TFS /;"	d
P_SPORT2_TSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT2_TSCLK	/;"	d
P_SPORT2_TSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT2_TSCLK	/;"	d
P_SPORT2_TSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT2_TSCLK /;"	d
P_SPORT3_DRPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_DRPRI	/;"	d
P_SPORT3_DRPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_DRPRI	/;"	d
P_SPORT3_DRPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_DRPRI /;"	d
P_SPORT3_DRSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_DRSEC	/;"	d
P_SPORT3_DRSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_DRSEC	/;"	d
P_SPORT3_DRSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_DRSEC /;"	d
P_SPORT3_DTPRI	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_DTPRI	/;"	d
P_SPORT3_DTPRI	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_DTPRI	/;"	d
P_SPORT3_DTPRI	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_DTPRI /;"	d
P_SPORT3_DTSEC	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_DTSEC	/;"	d
P_SPORT3_DTSEC	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_DTSEC	/;"	d
P_SPORT3_DTSEC	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_DTSEC /;"	d
P_SPORT3_RFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_RFS	/;"	d
P_SPORT3_RFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_RFS	/;"	d
P_SPORT3_RFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_RFS /;"	d
P_SPORT3_RSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_RSCLK	/;"	d
P_SPORT3_RSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_RSCLK	/;"	d
P_SPORT3_RSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_RSCLK /;"	d
P_SPORT3_TFS	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_TFS	/;"	d
P_SPORT3_TFS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_TFS	/;"	d
P_SPORT3_TFS	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_TFS /;"	d
P_SPORT3_TSCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_SPORT3_TSCLK	/;"	d
P_SPORT3_TSCLK	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_SPORT3_TSCLK	/;"	d
P_SPORT3_TSCLK	arch/blackfin/include/asm/portmux.h	/^#define P_SPORT3_TSCLK /;"	d
P_SYMBOL	scripts/kconfig/expr.h	/^	P_SYMBOL,   \/* where a symbol is defined *\/$/;"	e	enum:prop_type
P_TACLK0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TACLK0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR0	/;"	d
P_TMR0	arch/blackfin/include/asm/portmux.h	/^#define P_TMR0 /;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR1	/;"	d
P_TMR1	arch/blackfin/include/asm/portmux.h	/^#define P_TMR1 /;"	d
P_TMR10	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR10	/;"	d
P_TMR10	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR10	/;"	d
P_TMR10	arch/blackfin/include/asm/portmux.h	/^#define P_TMR10 /;"	d
P_TMR11	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR11	/;"	d
P_TMR11	arch/blackfin/include/asm/portmux.h	/^#define P_TMR11 /;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR2	/;"	d
P_TMR2	arch/blackfin/include/asm/portmux.h	/^#define P_TMR2 /;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR3	/;"	d
P_TMR3	arch/blackfin/include/asm/portmux.h	/^#define P_TMR3 /;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR4	/;"	d
P_TMR4	arch/blackfin/include/asm/portmux.h	/^#define P_TMR4 /;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR5	/;"	d
P_TMR5	arch/blackfin/include/asm/portmux.h	/^#define P_TMR5 /;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR6	/;"	d
P_TMR6	arch/blackfin/include/asm/portmux.h	/^#define P_TMR6 /;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMR7	/;"	d
P_TMR7	arch/blackfin/include/asm/portmux.h	/^#define P_TMR7 /;"	d
P_TMR8	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR8	/;"	d
P_TMR8	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR8	/;"	d
P_TMR8	arch/blackfin/include/asm/portmux.h	/^#define P_TMR8 /;"	d
P_TMR9	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TMR9	/;"	d
P_TMR9	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMR9	/;"	d
P_TMR9	arch/blackfin/include/asm/portmux.h	/^#define P_TMR9 /;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_TMRCLK	/;"	d
P_TMRCLK	arch/blackfin/include/asm/portmux.h	/^#define P_TMRCLK /;"	d
P_TST_J	drivers/usb/host/r8a66597.h	/^#define	  P_TST_J	/;"	d
P_TST_K	drivers/usb/host/r8a66597.h	/^#define	  P_TST_K	/;"	d
P_TST_NORMAL	drivers/usb/host/r8a66597.h	/^#define	  P_TST_NORMAL	/;"	d
P_TST_PACKET	drivers/usb/host/r8a66597.h	/^#define	  P_TST_PACKET	/;"	d
P_TST_SE0_NAK	drivers/usb/host/r8a66597.h	/^#define	  P_TST_SE0_NAK	/;"	d
P_TWI0_SCL	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TWI0_SCL	/;"	d
P_TWI0_SCL	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TWI0_SCL	/;"	d
P_TWI0_SCL	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TWI0_SCL	/;"	d
P_TWI0_SCL	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TWI0_SCL	/;"	d
P_TWI0_SCL	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TWI0_SCL	/;"	d
P_TWI0_SCL	arch/blackfin/include/asm/portmux.h	/^#define P_TWI0_SCL /;"	d
P_TWI0_SDA	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_TWI0_SDA	/;"	d
P_TWI0_SDA	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_TWI0_SDA	/;"	d
P_TWI0_SDA	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_TWI0_SDA	/;"	d
P_TWI0_SDA	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TWI0_SDA	/;"	d
P_TWI0_SDA	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TWI0_SDA	/;"	d
P_TWI0_SDA	arch/blackfin/include/asm/portmux.h	/^#define P_TWI0_SDA /;"	d
P_TWI1_SCL	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TWI1_SCL	/;"	d
P_TWI1_SCL	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TWI1_SCL	/;"	d
P_TWI1_SCL	arch/blackfin/include/asm/portmux.h	/^#define P_TWI1_SCL /;"	d
P_TWI1_SDA	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_TWI1_SDA	/;"	d
P_TWI1_SDA	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_TWI1_SDA	/;"	d
P_TWI1_SDA	arch/blackfin/include/asm/portmux.h	/^#define P_TWI1_SDA /;"	d
P_UART	arch/blackfin/include/asm/serial.h	/^#define P_UART(/;"	d
P_UART0_CTS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART0_CTS	/;"	d
P_UART0_CTS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART0_CTS	/;"	d
P_UART0_RTS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART0_RTS	/;"	d
P_UART0_RTS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART0_RTS	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART0_RX	/;"	d
P_UART0_RX	arch/blackfin/include/asm/portmux.h	/^#define P_UART0_RX /;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART0_TX	/;"	d
P_UART0_TX	arch/blackfin/include/asm/portmux.h	/^#define P_UART0_TX /;"	d
P_UART1_CTS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART1_CTS	/;"	d
P_UART1_CTS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART1_CTS	/;"	d
P_UART1_CTS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART1_CTS	/;"	d
P_UART1_CTS	arch/blackfin/include/asm/portmux.h	/^#define P_UART1_CTS /;"	d
P_UART1_RTS	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART1_RTS	/;"	d
P_UART1_RTS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART1_RTS	/;"	d
P_UART1_RTS	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART1_RTS	/;"	d
P_UART1_RTS	arch/blackfin/include/asm/portmux.h	/^#define P_UART1_RTS /;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART1_RX	/;"	d
P_UART1_RX	arch/blackfin/include/asm/portmux.h	/^#define P_UART1_RX /;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define P_UART1_TX	/;"	d
P_UART1_TX	arch/blackfin/include/asm/portmux.h	/^#define P_UART1_TX /;"	d
P_UART2_RX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_UART2_RX	/;"	d
P_UART2_RX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART2_RX	/;"	d
P_UART2_RX	arch/blackfin/include/asm/portmux.h	/^#define P_UART2_RX /;"	d
P_UART2_TX	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define P_UART2_TX	/;"	d
P_UART2_TX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART2_TX	/;"	d
P_UART2_TX	arch/blackfin/include/asm/portmux.h	/^#define P_UART2_TX /;"	d
P_UART3_CTS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART3_CTS	/;"	d
P_UART3_CTS	arch/blackfin/include/asm/portmux.h	/^#define P_UART3_CTS /;"	d
P_UART3_RTS	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART3_RTS	/;"	d
P_UART3_RTS	arch/blackfin/include/asm/portmux.h	/^#define P_UART3_RTS /;"	d
P_UART3_RX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART3_RX	/;"	d
P_UART3_RX	arch/blackfin/include/asm/portmux.h	/^#define P_UART3_RX /;"	d
P_UART3_TX	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define P_UART3_TX	/;"	d
P_UART3_TX	arch/blackfin/include/asm/portmux.h	/^#define P_UART3_TX /;"	d
P_UNDEF	arch/blackfin/include/asm/portmux.h	/^#define P_UNDEF	/;"	d
P_UNKNOWN	scripts/kconfig/expr.h	/^	P_UNKNOWN,$/;"	e	enum:prop_type
Pack	tools/dtoc/fdt.py	/^    def Pack(self):$/;"	m	class:Fdt
Pack	tools/dtoc/fdt_normal.py	/^    def Pack(self):$/;"	m	class:FdtNormal
PacketAlignmentFactor	drivers/usb/gadget/rndis.h	/^	__le32	PacketAlignmentFactor;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
PadSize	drivers/net/ax88180.h	/^	unsigned char PadSize;$/;"	m	struct:ax88180_private	typeref:typename:unsigned char
ParameterNameLength	drivers/usb/gadget/rndis.h	/^	__le32	ParameterNameLength;$/;"	m	struct:rndis_config_parameter	typeref:typename:__le32
ParameterNameOffset	drivers/usb/gadget/rndis.h	/^	__le32	ParameterNameOffset;$/;"	m	struct:rndis_config_parameter	typeref:typename:__le32
ParameterType	drivers/usb/gadget/rndis.h	/^	__le32	ParameterType;$/;"	m	struct:rndis_config_parameter	typeref:typename:__le32
ParameterValueLength	drivers/usb/gadget/rndis.h	/^	__le32	ParameterValueLength;$/;"	m	struct:rndis_config_parameter	typeref:typename:__le32
ParameterValueOffset	drivers/usb/gadget/rndis.h	/^	__le32	ParameterValueOffset;$/;"	m	struct:rndis_config_parameter	typeref:typename:__le32
Parent	scripts/kconfig/qconf.h	/^	typedef class Q3ListView Parent;$/;"	t	class:ConfigList	typeref:class:Q3ListView
Parent	scripts/kconfig/qconf.h	/^	typedef class Q3ListViewItem Parent;$/;"	t	class:ConfigItem	typeref:class:Q3ListViewItem
Parent	scripts/kconfig/qconf.h	/^	typedef class Q3TextBrowser Parent;$/;"	t	class:ConfigInfoView	typeref:class:Q3TextBrowser
Parent	scripts/kconfig/qconf.h	/^	typedef class Q3VBox Parent;$/;"	t	class:ConfigView	typeref:class:Q3VBox
Parent	scripts/kconfig/qconf.h	/^	typedef class QDialog Parent;$/;"	t	class:ConfigSearchWindow	typeref:class:QDialog
Parent	scripts/kconfig/qconf.h	/^	typedef class QLineEdit Parent;$/;"	t	class:ConfigLineEdit	typeref:class:QLineEdit
ParseArgs	tools/buildman/cmdline.py	/^def ParseArgs():$/;"	f
ParseFile	tools/microcode-tool	/^def ParseFile(fname):$/;"	f
ParseFile	tools/microcode-tool.py	/^def ParseFile(fname):$/;"	f
ParseHeaderFiles	tools/microcode-tool	/^def ParseHeaderFiles(fname_list):$/;"	f
ParseHeaderFiles	tools/microcode-tool.py	/^def ParseHeaderFiles(fname_list):$/;"	f
PatchStream	tools/patman/patchstream.py	/^class PatchStream:$/;"	c
Pattern	drivers/fpga/ivm_core.c	/^	 unsigned char  Pattern;   \/* The tragetory of TMS *\/$/;"	m	struct:__anon34a9f1e50108	typeref:typename:unsigned char	file:
PatternFlags	drivers/usb/gadget/ndis.h	/^	__le32	PatternFlags;$/;"	m	struct:NDIS_PM_PACKET_PATTERN	typeref:typename:__le32
PatternOffset	drivers/usb/gadget/ndis.h	/^	__le32	PatternOffset;$/;"	m	struct:NDIS_PM_PACKET_PATTERN	typeref:typename:__le32
PatternSize	drivers/usb/gadget/ndis.h	/^	__le32	PatternSize;$/;"	m	struct:NDIS_PM_PACKET_PATTERN	typeref:typename:__le32
PerPacketInfoLength	drivers/usb/gadget/rndis.h	/^	__le32	PerPacketInfoLength;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
PerPacketInfoOffset	drivers/usb/gadget/rndis.h	/^	__le32	PerPacketInfoOffset;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
Perror	tools/gdb/error.c	/^Perror(char *fmt, ...)$/;"	f	typeref:typename:void
PersistentRandomFile	test/py/u_boot_utils.py	/^class PersistentRandomFile(object):$/;"	c
PhyAddr	drivers/net/ax88180.h	/^	unsigned short PhyAddr;$/;"	m	struct:ax88180_private	typeref:typename:unsigned short
PhyDis	drivers/net/natsemi.c	/^	PhyDis		= 0x00000200,$/;"	e	enum:ChipConfigBits	file:
PhyDis	drivers/net/ns8382x.c	/^	PhyDis = 0x00000200,$/;"	e	enum:ChipConfigBits	file:
PhyID0	drivers/net/ax88180.h	/^	unsigned short PhyID0;$/;"	m	struct:ax88180_private	typeref:typename:unsigned short
PhyID1	drivers/net/ax88180.h	/^	unsigned short PhyID1;$/;"	m	struct:ax88180_private	typeref:typename:unsigned short
PhyParm1	drivers/net/rtl8139.c	/^	PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80,	\/* undocumented *\/$/;"	e	enum:RTL8139_registers	file:
PhyParm2	drivers/net/rtl8139.c	/^	PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80,	\/* undocumented *\/$/;"	e	enum:RTL8139_registers	file:
PhyRst	drivers/net/natsemi.c	/^	PhyRst		= 0x00000400,$/;"	e	enum:ChipConfigBits	file:
PhyRst	drivers/net/ns8382x.c	/^	PhyRst = 0x00000400,$/;"	e	enum:ChipConfigBits	file:
PhyType	include/lxt971a.h	/^} PhyType;$/;"	t	typeref:enum:__anon23dfe2480103
PhysicalAddress	include/pe.h	/^		uint32_t PhysicalAddress;$/;"	m	union:_IMAGE_SECTION_HEADER::__anon69e06b43010a	typeref:typename:uint32_t
Pin controllers	drivers/pinctrl/Kconfig	/^menu "Pin controllers"$/;"	m
PointerToLinenumbers	include/pe.h	/^	uint32_t PointerToLinenumbers;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint32_t
PointerToRawData	include/pe.h	/^	uint32_t PointerToRawData;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint32_t
PointerToRelocations	include/pe.h	/^	uint32_t PointerToRelocations;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint32_t
PointerToSymbolTable	include/pe.h	/^	uint32_t PointerToSymbolTable;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint32_t
Popen	tools/patman/cros_subprocess.py	/^class Popen(subprocess.Popen):$/;"	c
PortInfoFlags	drivers/bios_emulator/biosemui.h	/^} PortInfoFlags;$/;"	t	typeref:enum:__anonb186e4ea0203
PortPowerCtrlMask	include/usb.h	/^	unsigned char  PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)\/8];$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char[]
Pos	lib/zlib/deflate.h	/^typedef ush Pos;$/;"	t	typeref:typename:ush
PosSlot	lib/lzma/LzmaDec.c	/^#define PosSlot /;"	d	file:
Posf	lib/zlib/deflate.h	/^typedef Pos FAR Posf;$/;"	t	typeref:typename:Pos FAR
Power	drivers/power/Kconfig	/^menu "Power"$/;"	m
Power Domain Support	drivers/power/domain/Kconfig	/^menu "Power Domain Support"$/;"	m
Power commands	cmd/Kconfig	/^menu "Power commands"$/;"	m	menu:Command line interface
PowerPC architecture	arch/powerpc/Kconfig	/^menu "PowerPC architecture"$/;"	m
Power_Down	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Power_Down;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
PrdDate	board/vscom/baltos/board.h	/^	char PrdDate[11];    \/\/ as a string ie. "01.01.2006"$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:char[11]
PrepareOutputDir	tools/patman/tools.py	/^def PrepareOutputDir(dirname, preserve=False):$/;"	f
PriFlashABegin	board/bf533-ezkit/flash-defines.h	/^#define PriFlashABegin	/;"	d
PriFlashAOff	board/bf533-ezkit/flash-defines.h	/^#define PriFlashAOff	/;"	d
PriFlashBOff	board/bf533-ezkit/flash-defines.h	/^#define PriFlashBOff	/;"	d
PriQueue	drivers/net/ns8382x.c	/^	PriQueue = 0x3C,$/;"	e	enum:register_offsets	file:
Print	tools/patman/terminal.py	/^def Print(text='', newline=True, colour=None):$/;"	f
PrintData	drivers/fpga/ivm_core.c	/^void PrintData(unsigned short a_iDataSize, unsigned char *a_pucData)$/;"	f	typeref:typename:void
PrintFuncSizeDetail	tools/buildman/builder.py	/^    def PrintFuncSizeDetail(self, fname, old, new):$/;"	m	class:Builder
PrintLine	tools/patman/terminal.py	/^class PrintLine:$/;"	c
PrintResultSummary	tools/buildman/builder.py	/^    def PrintResultSummary(self, board_selected, board_dict, err_lines,$/;"	m	class:Builder
PrintSizeDetail	tools/buildman/builder.py	/^    def PrintSizeDetail(self, target_list, show_bloat):$/;"	m	class:Builder
PrintSizeSummary	tools/buildman/builder.py	/^    def PrintSizeSummary(self, board_selected, board_dict, show_detail,$/;"	m	class:Builder
Printer	tools/rkmux.py	/^class Printer:$/;"	c
Priority	drivers/usb/gadget/ndis.h	/^	__le32	Priority;$/;"	m	struct:NDIS_PM_PACKET_PATTERN	typeref:typename:__le32
Proc_1	lib/dhry/dhry_1.c	/^void Proc_1 (REG Rec_Pointer Ptr_Val_Par)$/;"	f	typeref:typename:void
Proc_2	lib/dhry/dhry_1.c	/^void Proc_2 (One_Fifty   *Int_Par_Ref)$/;"	f	typeref:typename:void
Proc_3	lib/dhry/dhry_1.c	/^void Proc_3 (Rec_Pointer *Ptr_Ref_Par)$/;"	f	typeref:typename:void
Proc_4	lib/dhry/dhry_1.c	/^void Proc_4 (void) \/* without parameters *\/$/;"	f	typeref:typename:void
Proc_5	lib/dhry/dhry_1.c	/^void Proc_5 (void) \/* without parameters *\/$/;"	f	typeref:typename:void
Proc_6	lib/dhry/dhry_2.c	/^void Proc_6 (Enumeration Enum_Val_Par, Enumeration *Enum_Ref_Par)$/;"	f	typeref:typename:void
Proc_7	lib/dhry/dhry_2.c	/^void Proc_7 (Int_1_Par_Val, Int_2_Par_Val, Int_Par_Ref)$/;"	f
Proc_8	lib/dhry/dhry_2.c	/^void Proc_8 (Arr_1_Par_Ref, Arr_2_Par_Ref, Int_1_Par_Val, Int_2_Par_Val)$/;"	f
ProcessLine	tools/patman/patchstream.py	/^    def ProcessLine(self, line):$/;"	m	class:PatchStream
ProcessResult	tools/buildman/builder.py	/^    def ProcessResult(self, result):$/;"	m	class:Builder
ProcessStream	tools/patman/patchstream.py	/^    def ProcessStream(self, infd, outfd):$/;"	m	class:PatchStream
ProduceResultSummary	tools/buildman/builder.py	/^    def ProduceResultSummary(self, commit_upto, commits, board_selected):$/;"	m	class:Builder
ProgramCheck	arch/powerpc/cpu/mpc512x/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc5xx/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc5xxx/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc8260/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc83xx/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc85xx/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc86xx/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/mpc8xx/start.S	/^ProgramCheck:$/;"	l
ProgramCheck	arch/powerpc/cpu/ppc4xx/start.S	/^ProgramCheck:$/;"	l
ProgramCheckException	arch/powerpc/cpu/mpc512x/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc5xx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc5xxx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc8260/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc83xx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc85xx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc86xx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/mpc8xx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
ProgramCheckException	arch/powerpc/cpu/ppc4xx/traps.c	/^void ProgramCheckException(struct pt_regs *regs)$/;"	f	typeref:typename:void
Progress	lib/lzma/Types.h	/^  SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize);$/;"	m	struct:__anonf2a2f1b90b08	typeref:typename:SRes (*)(void * p,UInt64 inSize,UInt64 outSize)
Progress	tools/moveconfig.py	/^class Progress:$/;"	c
Progress	tools/patman/tout.py	/^def Progress(msg, warning=False, trailer='...'):$/;"	f
Prop	tools/dtoc/fdt_fallback.py	/^class Prop(PropBase):$/;"	c
Prop	tools/dtoc/fdt_normal.py	/^class Prop(PropBase):$/;"	c
PropBase	tools/dtoc/fdt.py	/^class PropBase:$/;"	c
PtdCntrl	include/mpc5xxx.h	/^	volatile u16 PtdCntrl;		\/* SDMA + 0x12 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
Ptr_Comp	lib/dhry/dhry.h	/^    struct record *Ptr_Comp;$/;"	m	struct:record	typeref:struct:record *
Ptr_Glob	lib/dhry/dhry_1.c	/^Rec_Pointer     Ptr_Glob,$/;"	v	typeref:typename:Rec_Pointer
Pulses	drivers/fpga/ivm_core.c	/^	 unsigned char  Pulses;    \/* The number of steps *\/$/;"	m	struct:__anon34a9f1e50108	typeref:typename:unsigned char	file:
Put	doc/README.x86	/^Put all 5 files into board\/google\/chromebook_samus.$/;"	l
Q	Makefile	/^  Q = @$/;"	m
Q	Makefile	/^  Q =$/;"	m
Q35_PAM	arch/x86/include/asm/arch-qemu/qemu.h	/^#define Q35_PAM	/;"	d
Q35_VGA	arch/x86/include/asm/arch-qemu/device.h	/^#define Q35_VGA	/;"	d
Q3Action	scripts/kconfig/qconf.h	/^#define Q3Action /;"	d
Q3FileDialog	scripts/kconfig/qconf.h	/^#define Q3FileDialog /;"	d
Q3ListView	scripts/kconfig/qconf.h	/^#define Q3ListView /;"	d
Q3ListViewItem	scripts/kconfig/qconf.h	/^#define Q3ListViewItem /;"	d
Q3ListViewItemIterator	scripts/kconfig/qconf.h	/^#define Q3ListViewItemIterator /;"	d
Q3MainWindow	scripts/kconfig/qconf.h	/^#define Q3MainWindow /;"	d
Q3PopupMenu	scripts/kconfig/qconf.h	/^#define Q3PopupMenu /;"	d
Q3TextBrowser	scripts/kconfig/qconf.h	/^#define Q3TextBrowser /;"	d
Q3ToolBar	scripts/kconfig/qconf.h	/^#define Q3ToolBar /;"	d
Q3VBox	scripts/kconfig/qconf.h	/^#define Q3VBox /;"	d
Q3ValueList	scripts/kconfig/qconf.h	/^#define Q3ValueList /;"	d
QACR0	arch/sh/include/asm/cpu_sh7750.h	/^#define QACR0	/;"	d
QACR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	QACR0	/;"	d
QACR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	QACR0	/;"	d
QACR1	arch/sh/include/asm/cpu_sh7750.h	/^#define QACR1	/;"	d
QACR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	QACR1	/;"	d
QACR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	QACR1	/;"	d
QBMAN_CENA_SWP_CR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CENA_SWP_CR /;"	d	file:
QBMAN_CENA_SWP_DQRR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CENA_SWP_DQRR(/;"	d	file:
QBMAN_CENA_SWP_EQCR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CENA_SWP_EQCR(/;"	d	file:
QBMAN_CENA_SWP_RCR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CENA_SWP_RCR(/;"	d	file:
QBMAN_CENA_SWP_RR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CENA_SWP_RR(/;"	d	file:
QBMAN_CENA_SWP_VDQCR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CENA_SWP_VDQCR /;"	d	file:
QBMAN_CHECKING	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define QBMAN_CHECKING$/;"	d
QBMAN_CINH_ONLY	drivers/net/fsl-mc/dpio/qbman_sys.h	/^#define QBMAN_CINH_ONLY$/;"	d
QBMAN_CINH_SWP_CFG	drivers/net/fsl-mc/dpio/qbman_sys.h	/^#define QBMAN_CINH_SWP_CFG /;"	d
QBMAN_CINH_SWP_DCAP	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CINH_SWP_DCAP /;"	d	file:
QBMAN_CINH_SWP_EQAR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CINH_SWP_EQAR /;"	d	file:
QBMAN_CINH_SWP_RAR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CINH_SWP_RAR /;"	d	file:
QBMAN_CINH_SWP_SDQCR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_CINH_SWP_SDQCR /;"	d	file:
QBMAN_DQRR_RESPONSE_BPSCN	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_BPSCN /;"	d	file:
QBMAN_DQRR_RESPONSE_CDAN	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_CDAN /;"	d	file:
QBMAN_DQRR_RESPONSE_CGCU	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_CGCU /;"	d	file:
QBMAN_DQRR_RESPONSE_CSCN_MEM	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_CSCN_MEM /;"	d	file:
QBMAN_DQRR_RESPONSE_CSCN_WQ	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_CSCN_WQ /;"	d	file:
QBMAN_DQRR_RESPONSE_DQ	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_DQ /;"	d	file:
QBMAN_DQRR_RESPONSE_FQDAN	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_FQDAN /;"	d	file:
QBMAN_DQRR_RESPONSE_FQPN	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_FQPN /;"	d	file:
QBMAN_DQRR_RESPONSE_FQRN	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_FQRN /;"	d	file:
QBMAN_DQRR_RESPONSE_FQRNI	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_DQRR_RESPONSE_FQRNI /;"	d	file:
QBMAN_DQRR_SIZE	drivers/net/fsl-mc/dpio/qbman_portal.h	/^#define QBMAN_DQRR_SIZE /;"	d
QBMAN_IDX_FROM_DQRR	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_IDX_FROM_DQRR(/;"	d	file:
QBMAN_MC_ACQUIRE	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_MC_ACQUIRE /;"	d	file:
QBMAN_MC_RSLT_OK	drivers/net/fsl-mc/dpio/qbman_portal.h	/^#define QBMAN_MC_RSLT_OK /;"	d
QBMAN_WQCHAN_CONFIGURE	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define QBMAN_WQCHAN_CONFIGURE /;"	d	file:
QB_CODE	drivers/net/fsl-mc/dpio/qbman_portal.h	/^#define QB_CODE(/;"	d
QB_VALID_BIT	drivers/net/fsl-mc/dpio/qbman_portal.h	/^#define QB_VALID_BIT /;"	d
QCA/Atheros 7xxx/9xxx platforms	arch/mips/mach-ath79/Kconfig	/^menu "QCA\/Atheros 7xxx\/9xxx platforms"$/;"	m
QCA953X_BOOTSTRAP_DDR1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_BOOTSTRAP_DDR1	/;"	d
QCA953X_BOOTSTRAP_EJTAG_MODE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_BOOTSTRAP_EJTAG_MODE	/;"	d
QCA953X_BOOTSTRAP_REF_CLK_40	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_BOOTSTRAP_REF_CLK_40	/;"	d
QCA953X_BOOTSTRAP_SDRAM_DISABLED	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_BOOTSTRAP_SDRAM_DISABLED	/;"	d
QCA953X_BOOTSTRAP_SW_OPTION1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_BOOTSTRAP_SW_OPTION1	/;"	d
QCA953X_BOOTSTRAP_SW_OPTION2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_BOOTSTRAP_SW_OPTION2	/;"	d
QCA953X_DDR_REG_BURST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_BURST	/;"	d
QCA953X_DDR_REG_BURST2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_BURST2	/;"	d
QCA953X_DDR_REG_CONFIG3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_CONFIG3	/;"	d
QCA953X_DDR_REG_CTL_CONF	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_CTL_CONF	/;"	d
QCA953X_DDR_REG_DDR2_CONFIG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_DDR2_CONFIG	/;"	d
QCA953X_DDR_REG_FLUSH_GE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_FLUSH_GE0	/;"	d
QCA953X_DDR_REG_FLUSH_GE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_FLUSH_GE1	/;"	d
QCA953X_DDR_REG_FLUSH_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_FLUSH_PCIE	/;"	d
QCA953X_DDR_REG_FLUSH_USB	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_FLUSH_USB	/;"	d
QCA953X_DDR_REG_FLUSH_WMAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_FLUSH_WMAC	/;"	d
QCA953X_DDR_REG_TIMEOUT_MAX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_DDR_REG_TIMEOUT_MAX	/;"	d
QCA953X_EHCI_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_EHCI_BASE	/;"	d
QCA953X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_EHCI_SIZE	/;"	d
QCA953X_ETH_CFG_SW_ACC_MSB_FIRST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_ETH_CFG_SW_ACC_MSB_FIRST	/;"	d
QCA953X_ETH_CFG_SW_APB_ACCESS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_ETH_CFG_SW_APB_ACCESS	/;"	d
QCA953X_ETH_CFG_SW_ONLY_MODE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_ETH_CFG_SW_ONLY_MODE	/;"	d
QCA953X_ETH_CFG_SW_PHY_SWAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_ETH_CFG_SW_PHY_SWAP	/;"	d
QCA953X_GMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GMAC_BASE /;"	d
QCA953X_GMAC_REG_ETH_CFG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GMAC_REG_ETH_CFG	/;"	d
QCA953X_GMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GMAC_SIZE	/;"	d
QCA953X_GPIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO(/;"	d
QCA953X_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_COUNT	/;"	d
QCA953X_GPIO_IN_MUX_SPI_DATA_IN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_IN_MUX_SPI_DATA_IN	/;"	d
QCA953X_GPIO_IN_MUX_UART0_SIN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_IN_MUX_UART0_SIN	/;"	d
QCA953X_GPIO_MUX_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_MUX_MASK(/;"	d
QCA953X_GPIO_OUT_MUX_LED_LINK1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_LED_LINK1	/;"	d
QCA953X_GPIO_OUT_MUX_LED_LINK2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_LED_LINK2	/;"	d
QCA953X_GPIO_OUT_MUX_LED_LINK3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_LED_LINK3	/;"	d
QCA953X_GPIO_OUT_MUX_LED_LINK4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_LED_LINK4	/;"	d
QCA953X_GPIO_OUT_MUX_LED_LINK5	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_LED_LINK5	/;"	d
QCA953X_GPIO_OUT_MUX_SPI_CLK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_SPI_CLK	/;"	d
QCA953X_GPIO_OUT_MUX_SPI_CS0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_SPI_CS0	/;"	d
QCA953X_GPIO_OUT_MUX_SPI_CS1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_SPI_CS1	/;"	d
QCA953X_GPIO_OUT_MUX_SPI_CS2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_SPI_CS2	/;"	d
QCA953X_GPIO_OUT_MUX_SPI_MOSI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_SPI_MOSI	/;"	d
QCA953X_GPIO_OUT_MUX_UART0_SOUT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_OUT_MUX_UART0_SOUT	/;"	d
QCA953X_GPIO_REG_FUNC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_FUNC	/;"	d
QCA953X_GPIO_REG_IN_ENABLE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_IN_ENABLE0	/;"	d
QCA953X_GPIO_REG_OUT_FUNC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_OUT_FUNC0	/;"	d
QCA953X_GPIO_REG_OUT_FUNC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_OUT_FUNC1	/;"	d
QCA953X_GPIO_REG_OUT_FUNC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_OUT_FUNC2	/;"	d
QCA953X_GPIO_REG_OUT_FUNC3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_OUT_FUNC3	/;"	d
QCA953X_GPIO_REG_OUT_FUNC4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_GPIO_REG_OUT_FUNC4	/;"	d
QCA953X_PCIE_WMAC_INT_PCIE_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_PCIE_ALL /;"	d
QCA953X_PCIE_WMAC_INT_PCIE_RC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_PCIE_RC	/;"	d
QCA953X_PCIE_WMAC_INT_PCIE_RC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_PCIE_RC0	/;"	d
QCA953X_PCIE_WMAC_INT_PCIE_RC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_PCIE_RC1	/;"	d
QCA953X_PCIE_WMAC_INT_PCIE_RC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_PCIE_RC2	/;"	d
QCA953X_PCIE_WMAC_INT_PCIE_RC3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_PCIE_RC3	/;"	d
QCA953X_PCIE_WMAC_INT_WMAC_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_WMAC_ALL /;"	d
QCA953X_PCIE_WMAC_INT_WMAC_MISC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_WMAC_MISC	/;"	d
QCA953X_PCIE_WMAC_INT_WMAC_RXHP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_WMAC_RXHP	/;"	d
QCA953X_PCIE_WMAC_INT_WMAC_RXLP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_WMAC_RXLP	/;"	d
QCA953X_PCIE_WMAC_INT_WMAC_TX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCIE_WMAC_INT_WMAC_TX	/;"	d
QCA953X_PCI_CFG_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCI_CFG_BASE0	/;"	d
QCA953X_PCI_CRP_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCI_CRP_BASE0 /;"	d
QCA953X_PCI_CTRL_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCI_CTRL_BASE0 /;"	d
QCA953X_PCI_MEM_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCI_MEM_BASE0	/;"	d
QCA953X_PCI_MEM_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PCI_MEM_SIZE	/;"	d
QCA953X_PINCTRL	drivers/pinctrl/Kconfig	/^config QCA953X_PINCTRL$/;"	c	menu:Pin controllers
QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	/;"	d
QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS	/;"	d
QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	/;"	d
QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	/;"	d
QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	/;"	d
QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS	/;"	d
QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	/;"	d
QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	/;"	d
QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	/;"	d
QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS	/;"	d
QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	/;"	d
QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	/;"	d
QCA953X_PLL_CLK_CTRL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CLK_CTRL_REG	/;"	d
QCA953X_PLL_CONFIG_PWD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CONFIG_PWD	/;"	d
QCA953X_PLL_CPU_CONFIG_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK	/;"	d
QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT	/;"	d
QCA953X_PLL_CPU_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_NINT_MASK	/;"	d
QCA953X_PLL_CPU_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT	/;"	d
QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK	/;"	d
QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT	/;"	d
QCA953X_PLL_CPU_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK	/;"	d
QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT	/;"	d
QCA953X_PLL_CPU_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_CONFIG_REG	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_MAX_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_MAX_MASK	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_MAX_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_MAX_SHIFT	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_MIN_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_MIN_MASK	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_MIN_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_MIN_SHIFT	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_REG	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_STEP_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_STEP_MASK	/;"	d
QCA953X_PLL_CPU_DIT_FRAC_STEP_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_FRAC_STEP_SHIFT	/;"	d
QCA953X_PLL_CPU_DIT_UPD_CNT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_UPD_CNT_MASK	/;"	d
QCA953X_PLL_CPU_DIT_UPD_CNT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_CPU_DIT_UPD_CNT_SHIFT	/;"	d
QCA953X_PLL_DDR_CONFIG_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK	/;"	d
QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT	/;"	d
QCA953X_PLL_DDR_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_NINT_MASK	/;"	d
QCA953X_PLL_DDR_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT	/;"	d
QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK	/;"	d
QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT	/;"	d
QCA953X_PLL_DDR_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK	/;"	d
QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT	/;"	d
QCA953X_PLL_DDR_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_CONFIG_REG	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_MAX_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_MAX_MASK	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_MAX_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_MAX_SHIFT	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_MIN_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_MIN_MASK	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_MIN_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_MIN_SHIFT	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_REG	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_STEP_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_STEP_MASK	/;"	d
QCA953X_PLL_DDR_DIT_FRAC_STEP_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_FRAC_STEP_SHIFT	/;"	d
QCA953X_PLL_DDR_DIT_UPD_CNT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_UPD_CNT_MASK	/;"	d
QCA953X_PLL_DDR_DIT_UPD_CNT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DDR_DIT_UPD_CNT_SHIFT	/;"	d
QCA953X_PLL_DIT_FRAC_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_DIT_FRAC_EN	/;"	d
QCA953X_PLL_ETH_XMII_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_ETH_XMII_CONTROL_REG	/;"	d
QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG	/;"	d
QCA953X_RESET_CPU_COLD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_CPU_COLD	/;"	d
QCA953X_RESET_CPU_NMI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_CPU_NMI	/;"	d
QCA953X_RESET_DDR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_DDR	/;"	d
QCA953X_RESET_ETH_SWITCH	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_ETH_SWITCH	/;"	d
QCA953X_RESET_ETH_SWITCH_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_ETH_SWITCH_ANALOG	/;"	d
QCA953X_RESET_EXTERNAL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_EXTERNAL	/;"	d
QCA953X_RESET_FULL_CHIP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_FULL_CHIP	/;"	d
QCA953X_RESET_GE0_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_GE0_MAC	/;"	d
QCA953X_RESET_GE0_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_GE0_MDIO	/;"	d
QCA953X_RESET_GE1_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_GE1_MAC	/;"	d
QCA953X_RESET_GE1_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_GE1_MDIO	/;"	d
QCA953X_RESET_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_PCIE	/;"	d
QCA953X_RESET_PCIE_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_PCIE_PHY	/;"	d
QCA953X_RESET_REG_BOOTSTRAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_REG_BOOTSTRAP	/;"	d
QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS	/;"	d
QCA953X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_REG_RESET_MODULE	/;"	d
QCA953X_RESET_RTC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_RTC	/;"	d
QCA953X_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_USBSUS_OVERRIDE	/;"	d
QCA953X_RESET_USB_EXT_PWR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_USB_EXT_PWR	/;"	d
QCA953X_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_USB_HOST	/;"	d
QCA953X_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_USB_PHY	/;"	d
QCA953X_RESET_USB_PHY_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_USB_PHY_ANALOG	/;"	d
QCA953X_RESET_USB_PHY_PLL_PWD_EXT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RESET_USB_PHY_PLL_PWD_EXT	/;"	d
QCA953X_RTC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RTC_BASE /;"	d
QCA953X_RTC_REG_SYNC_RESET	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RTC_REG_SYNC_RESET	/;"	d
QCA953X_RTC_REG_SYNC_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RTC_REG_SYNC_STATUS	/;"	d
QCA953X_RTC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_RTC_SIZE	/;"	d
QCA953X_SRIF_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_BASE /;"	d
QCA953X_SRIF_BB_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_BB_DPLL1_REG	/;"	d
QCA953X_SRIF_BB_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_BB_DPLL2_REG	/;"	d
QCA953X_SRIF_BB_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_BB_DPLL3_REG	/;"	d
QCA953X_SRIF_CPU_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_CPU_DPLL1_REG	/;"	d
QCA953X_SRIF_CPU_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_CPU_DPLL2_REG	/;"	d
QCA953X_SRIF_CPU_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_CPU_DPLL3_REG	/;"	d
QCA953X_SRIF_DDR_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DDR_DPLL1_REG	/;"	d
QCA953X_SRIF_DDR_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DDR_DPLL2_REG	/;"	d
QCA953X_SRIF_DDR_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DDR_DPLL3_REG	/;"	d
QCA953X_SRIF_DPLL1_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL1_NFRAC_MASK	/;"	d
QCA953X_SRIF_DPLL1_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL1_NINT_MASK	/;"	d
QCA953X_SRIF_DPLL1_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL1_NINT_SHIFT	/;"	d
QCA953X_SRIF_DPLL1_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL1_REFDIV_MASK	/;"	d
QCA953X_SRIF_DPLL1_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL1_REFDIV_SHIFT	/;"	d
QCA953X_SRIF_DPLL2_KD_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_KD_MASK	/;"	d
QCA953X_SRIF_DPLL2_KD_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_KD_SHIFT	/;"	d
QCA953X_SRIF_DPLL2_KI_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_KI_MASK	/;"	d
QCA953X_SRIF_DPLL2_KI_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_KI_SHIFT	/;"	d
QCA953X_SRIF_DPLL2_LOCAL_PLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_LOCAL_PLL	/;"	d
QCA953X_SRIF_DPLL2_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_OUTDIV_MASK	/;"	d
QCA953X_SRIF_DPLL2_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT	/;"	d
QCA953X_SRIF_DPLL2_PWD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_DPLL2_PWD	/;"	d
QCA953X_SRIF_PCIE_DPLL1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_PCIE_DPLL1_REG	/;"	d
QCA953X_SRIF_PCIE_DPLL2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_PCIE_DPLL2_REG	/;"	d
QCA953X_SRIF_PCIE_DPLL3_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_PCIE_DPLL3_REG	/;"	d
QCA953X_SRIF_PMU1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_PMU1_REG	/;"	d
QCA953X_SRIF_PMU2_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_PMU2_REG	/;"	d
QCA953X_SRIF_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_SRIF_SIZE	/;"	d
QCA953X_WMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_WMAC_BASE /;"	d
QCA953X_WMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA953X_WMAC_SIZE	/;"	d
QCA955X_BOOTSTRAP_REF_CLK_40	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_BOOTSTRAP_REF_CLK_40	/;"	d
QCA955X_EHCI0_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EHCI0_BASE	/;"	d
QCA955X_EHCI1_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EHCI1_BASE	/;"	d
QCA955X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EHCI_SIZE	/;"	d
QCA955X_ETH_CFG_GE0_SGMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_ETH_CFG_GE0_SGMII	/;"	d
QCA955X_ETH_CFG_RGMII_EN	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_ETH_CFG_RGMII_EN	/;"	d
QCA955X_EXT_INT_PCIE_RC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC1	/;"	d
QCA955X_EXT_INT_PCIE_RC1_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC1_ALL /;"	d
QCA955X_EXT_INT_PCIE_RC1_INT0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC1_INT0	/;"	d
QCA955X_EXT_INT_PCIE_RC1_INT1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC1_INT1	/;"	d
QCA955X_EXT_INT_PCIE_RC1_INT2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC1_INT2	/;"	d
QCA955X_EXT_INT_PCIE_RC1_INT3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC1_INT3	/;"	d
QCA955X_EXT_INT_PCIE_RC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC2	/;"	d
QCA955X_EXT_INT_PCIE_RC2_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC2_ALL /;"	d
QCA955X_EXT_INT_PCIE_RC2_INT0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC2_INT0	/;"	d
QCA955X_EXT_INT_PCIE_RC2_INT1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC2_INT1	/;"	d
QCA955X_EXT_INT_PCIE_RC2_INT2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC2_INT2	/;"	d
QCA955X_EXT_INT_PCIE_RC2_INT3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_PCIE_RC2_INT3	/;"	d
QCA955X_EXT_INT_USB1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_USB1	/;"	d
QCA955X_EXT_INT_USB2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_USB2	/;"	d
QCA955X_EXT_INT_WMAC_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_WMAC_ALL /;"	d
QCA955X_EXT_INT_WMAC_MISC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_WMAC_MISC	/;"	d
QCA955X_EXT_INT_WMAC_RXHP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_WMAC_RXHP	/;"	d
QCA955X_EXT_INT_WMAC_RXLP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_WMAC_RXLP	/;"	d
QCA955X_EXT_INT_WMAC_TX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_EXT_INT_WMAC_TX	/;"	d
QCA955X_GMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GMAC_BASE /;"	d
QCA955X_GMAC_REG_ETH_CFG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GMAC_REG_ETH_CFG	/;"	d
QCA955X_GMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GMAC_SIZE	/;"	d
QCA955X_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_COUNT	/;"	d
QCA955X_GPIO_REG_FUNC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_FUNC	/;"	d
QCA955X_GPIO_REG_OUT_FUNC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_OUT_FUNC0	/;"	d
QCA955X_GPIO_REG_OUT_FUNC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_OUT_FUNC1	/;"	d
QCA955X_GPIO_REG_OUT_FUNC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_OUT_FUNC2	/;"	d
QCA955X_GPIO_REG_OUT_FUNC3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_OUT_FUNC3	/;"	d
QCA955X_GPIO_REG_OUT_FUNC4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_OUT_FUNC4	/;"	d
QCA955X_GPIO_REG_OUT_FUNC5	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_GPIO_REG_OUT_FUNC5	/;"	d
QCA955X_NFC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_NFC_BASE	/;"	d
QCA955X_NFC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_NFC_SIZE	/;"	d
QCA955X_PCI_CFG_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CFG_BASE0	/;"	d
QCA955X_PCI_CFG_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CFG_BASE1	/;"	d
QCA955X_PCI_CFG_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CFG_SIZE	/;"	d
QCA955X_PCI_CRP_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CRP_BASE0 /;"	d
QCA955X_PCI_CRP_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CRP_BASE1 /;"	d
QCA955X_PCI_CRP_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CRP_SIZE	/;"	d
QCA955X_PCI_CTRL_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CTRL_BASE0 /;"	d
QCA955X_PCI_CTRL_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CTRL_BASE1 /;"	d
QCA955X_PCI_CTRL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_CTRL_SIZE	/;"	d
QCA955X_PCI_MEM_BASE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_MEM_BASE0	/;"	d
QCA955X_PCI_MEM_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_MEM_BASE1	/;"	d
QCA955X_PCI_MEM_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PCI_MEM_SIZE	/;"	d
QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	/;"	d
QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS	/;"	d
QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	/;"	d
QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	/;"	d
QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	/;"	d
QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS	/;"	d
QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	/;"	d
QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	/;"	d
QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	/;"	d
QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS	/;"	d
QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	/;"	d
QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	/;"	d
QCA955X_PLL_CLK_CTRL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CLK_CTRL_REG	/;"	d
QCA955X_PLL_CPU_CONFIG_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK	/;"	d
QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT	/;"	d
QCA955X_PLL_CPU_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_NINT_MASK	/;"	d
QCA955X_PLL_CPU_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_NINT_SHIFT	/;"	d
QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK	/;"	d
QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT	/;"	d
QCA955X_PLL_CPU_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_REFDIV_MASK	/;"	d
QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT	/;"	d
QCA955X_PLL_CPU_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_CPU_CONFIG_REG	/;"	d
QCA955X_PLL_DDR_CONFIG_NFRAC_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_NFRAC_MASK	/;"	d
QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT	/;"	d
QCA955X_PLL_DDR_CONFIG_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_NINT_MASK	/;"	d
QCA955X_PLL_DDR_CONFIG_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_NINT_SHIFT	/;"	d
QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK	/;"	d
QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT	/;"	d
QCA955X_PLL_DDR_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_REFDIV_MASK	/;"	d
QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT	/;"	d
QCA955X_PLL_DDR_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_DDR_CONFIG_REG	/;"	d
QCA955X_PLL_ETH_SGMII_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_ETH_SGMII_CONTROL_REG	/;"	d
QCA955X_PLL_ETH_XMII_CONTROL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_PLL_ETH_XMII_CONTROL_REG	/;"	d
QCA955X_RESET_CHKSUM_ACC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_CHKSUM_ACC	/;"	d
QCA955X_RESET_CPU_COLD	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_CPU_COLD	/;"	d
QCA955X_RESET_CPU_NMI	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_CPU_NMI	/;"	d
QCA955X_RESET_DDR	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_DDR	/;"	d
QCA955X_RESET_EXTERNAL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_EXTERNAL	/;"	d
QCA955X_RESET_FULL_CHIP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_FULL_CHIP	/;"	d
QCA955X_RESET_GE0_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_GE0_MAC	/;"	d
QCA955X_RESET_GE0_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_GE0_MDIO	/;"	d
QCA955X_RESET_GE1_MAC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_GE1_MAC	/;"	d
QCA955X_RESET_GE1_MDIO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_GE1_MDIO	/;"	d
QCA955X_RESET_HDMA	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_HDMA	/;"	d
QCA955X_RESET_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_HOST	/;"	d
QCA955X_RESET_HOST_DMA_INT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_HOST_DMA_INT	/;"	d
QCA955X_RESET_HOST_RESET_INT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_HOST_RESET_INT	/;"	d
QCA955X_RESET_I2S	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_I2S	/;"	d
QCA955X_RESET_LUT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_LUT	/;"	d
QCA955X_RESET_MBOX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_MBOX	/;"	d
QCA955X_RESET_NANDF	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_NANDF	/;"	d
QCA955X_RESET_PCIE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_PCIE	/;"	d
QCA955X_RESET_PCIE_EP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_PCIE_EP	/;"	d
QCA955X_RESET_PCIE_EP_INT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_PCIE_EP_INT	/;"	d
QCA955X_RESET_PCIE_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_PCIE_PHY	/;"	d
QCA955X_RESET_REG_BOOTSTRAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_REG_BOOTSTRAP	/;"	d
QCA955X_RESET_REG_EXT_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_REG_EXT_INT_STATUS	/;"	d
QCA955X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_REG_RESET_MODULE	/;"	d
QCA955X_RESET_RTC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_RTC	/;"	d
QCA955X_RESET_SGMII	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_SGMII	/;"	d
QCA955X_RESET_SGMII_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_SGMII_ANALOG	/;"	d
QCA955X_RESET_SLIC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_SLIC	/;"	d
QCA955X_RESET_UART1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_UART1	/;"	d
QCA955X_RESET_USBSUS_OVERRIDE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_USBSUS_OVERRIDE	/;"	d
QCA955X_RESET_USB_HOST	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_USB_HOST	/;"	d
QCA955X_RESET_USB_PHY	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_USB_PHY	/;"	d
QCA955X_RESET_USB_PHY_ANALOG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_USB_PHY_ANALOG	/;"	d
QCA955X_RESET_USB_PHY_PLL_PWD_EXT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_RESET_USB_PHY_PLL_PWD_EXT	/;"	d
QCA955X_WMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_WMAC_BASE /;"	d
QCA955X_WMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA955X_WMAC_SIZE	/;"	d
QCA956X_BOOTSTRAP_REF_CLK_40	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_BOOTSTRAP_REF_CLK_40	/;"	d
QCA956X_EHCI0_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EHCI0_BASE	/;"	d
QCA956X_EHCI1_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EHCI1_BASE	/;"	d
QCA956X_EHCI_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EHCI_SIZE	/;"	d
QCA956X_EXT_INT_PCIE_RC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC1	/;"	d
QCA956X_EXT_INT_PCIE_RC1_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC1_ALL /;"	d
QCA956X_EXT_INT_PCIE_RC1_INT0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC1_INT0	/;"	d
QCA956X_EXT_INT_PCIE_RC1_INT1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC1_INT1	/;"	d
QCA956X_EXT_INT_PCIE_RC1_INT2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC1_INT2	/;"	d
QCA956X_EXT_INT_PCIE_RC1_INT3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC1_INT3	/;"	d
QCA956X_EXT_INT_PCIE_RC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC2	/;"	d
QCA956X_EXT_INT_PCIE_RC2_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC2_ALL /;"	d
QCA956X_EXT_INT_PCIE_RC2_INT0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC2_INT0	/;"	d
QCA956X_EXT_INT_PCIE_RC2_INT1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC2_INT1	/;"	d
QCA956X_EXT_INT_PCIE_RC2_INT2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC2_INT2	/;"	d
QCA956X_EXT_INT_PCIE_RC2_INT3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_PCIE_RC2_INT3	/;"	d
QCA956X_EXT_INT_USB1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_USB1	/;"	d
QCA956X_EXT_INT_USB2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_USB2	/;"	d
QCA956X_EXT_INT_WMAC_ALL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_WMAC_ALL /;"	d
QCA956X_EXT_INT_WMAC_MISC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_WMAC_MISC	/;"	d
QCA956X_EXT_INT_WMAC_RXHP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_WMAC_RXHP	/;"	d
QCA956X_EXT_INT_WMAC_RXLP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_WMAC_RXLP	/;"	d
QCA956X_EXT_INT_WMAC_TX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_EXT_INT_WMAC_TX	/;"	d
QCA956X_GMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GMAC_BASE /;"	d
QCA956X_GMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GMAC_SIZE	/;"	d
QCA956X_GPIO_COUNT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_COUNT	/;"	d
QCA956X_GPIO_OUT_MUX_GE0_MDC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_OUT_MUX_GE0_MDC	/;"	d
QCA956X_GPIO_OUT_MUX_GE0_MDO	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_OUT_MUX_GE0_MDO	/;"	d
QCA956X_GPIO_REG_FUNC	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_FUNC	/;"	d
QCA956X_GPIO_REG_IN_ENABLE0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_IN_ENABLE0	/;"	d
QCA956X_GPIO_REG_IN_ENABLE3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_IN_ENABLE3	/;"	d
QCA956X_GPIO_REG_OUT_FUNC0	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_OUT_FUNC0	/;"	d
QCA956X_GPIO_REG_OUT_FUNC1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_OUT_FUNC1	/;"	d
QCA956X_GPIO_REG_OUT_FUNC2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_OUT_FUNC2	/;"	d
QCA956X_GPIO_REG_OUT_FUNC3	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_OUT_FUNC3	/;"	d
QCA956X_GPIO_REG_OUT_FUNC4	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_OUT_FUNC4	/;"	d
QCA956X_GPIO_REG_OUT_FUNC5	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_GPIO_REG_OUT_FUNC5	/;"	d
QCA956X_PCI_CFG_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_CFG_BASE1	/;"	d
QCA956X_PCI_CFG_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_CFG_SIZE	/;"	d
QCA956X_PCI_CRP_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_CRP_BASE1 /;"	d
QCA956X_PCI_CRP_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_CRP_SIZE	/;"	d
QCA956X_PCI_CTRL_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_CTRL_BASE1 /;"	d
QCA956X_PCI_CTRL_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_CTRL_SIZE	/;"	d
QCA956X_PCI_MEM_BASE1	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_MEM_BASE1	/;"	d
QCA956X_PCI_MEM_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PCI_MEM_SIZE	/;"	d
QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	/;"	d
QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS	/;"	d
QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	/;"	d
QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	/;"	d
QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL	/;"	d
QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL	/;"	d
QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS	/;"	d
QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	/;"	d
QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	/;"	d
QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS	/;"	d
QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	/;"	d
QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	/;"	d
QCA956X_PLL_CLK_CTRL_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CLK_CTRL_REG	/;"	d
QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK	/;"	d
QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT	/;"	d
QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK	/;"	d
QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT	/;"	d
QCA956X_PLL_CPU_CONFIG1_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_NINT_MASK	/;"	d
QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT	/;"	d
QCA956X_PLL_CPU_CONFIG1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG1_REG	/;"	d
QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK	/;"	d
QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT	/;"	d
QCA956X_PLL_CPU_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK	/;"	d
QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT	/;"	d
QCA956X_PLL_CPU_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_CPU_CONFIG_REG	/;"	d
QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK	/;"	d
QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT	/;"	d
QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK	/;"	d
QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT	/;"	d
QCA956X_PLL_DDR_CONFIG1_NINT_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_NINT_MASK	/;"	d
QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT	/;"	d
QCA956X_PLL_DDR_CONFIG1_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG1_REG	/;"	d
QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK	/;"	d
QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT	/;"	d
QCA956X_PLL_DDR_CONFIG_REFDIV_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG_REFDIV_MASK	/;"	d
QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT	/;"	d
QCA956X_PLL_DDR_CONFIG_REG	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_PLL_DDR_CONFIG_REG	/;"	d
QCA956X_RESET_REG_BOOTSTRAP	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_RESET_REG_BOOTSTRAP	/;"	d
QCA956X_RESET_REG_EXT_INT_STATUS	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_RESET_REG_EXT_INT_STATUS	/;"	d
QCA956X_RESET_REG_RESET_MODULE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_RESET_REG_RESET_MODULE	/;"	d
QCA956X_WMAC_BASE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_WMAC_BASE /;"	d
QCA956X_WMAC_SIZE	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define QCA956X_WMAC_SIZE	/;"	d
QCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
QCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QCLK_MARK,$/;"	e	enum:__anona307945e0103	file:
QCPV_QDE_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,$/;"	e	enum:__anona3077f190103	file:
QCPV_QDE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CC50_STATE29_MARK,$/;"	e	enum:__anona307901d0103	file:
QCPV_QDE_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QCPV_QDE_MARK,$/;"	e	enum:__anona307945e0103	file:
QEMU	arch/x86/cpu/qemu/Kconfig	/^config QEMU$/;"	c
QEMU_FW_CFG_SIGNATURE	include/qfw.h	/^#define QEMU_FW_CFG_SIGNATURE	/;"	d
QEMU_I440FX	arch/x86/include/asm/arch-qemu/device.h	/^#define QEMU_I440FX	/;"	d
QEMU_Q35	arch/x86/include/asm/arch-qemu/device.h	/^#define QEMU_Q35	/;"	d
QE_ASSIGN_PAGE	include/fsl_qe.h	/^#define QE_ASSIGN_PAGE	/;"	d
QE_ASSIGN_PAGE_TO_DEVICE	include/fsl_qe.h	/^#define QE_ASSIGN_PAGE_TO_DEVICE	/;"	d
QE_ATM_MULTI_THREAD_INIT	include/fsl_qe.h	/^#define QE_ATM_MULTI_THREAD_INIT	/;"	d
QE_ATM_TRANSMIT	include/fsl_qe.h	/^#define QE_ATM_TRANSMIT	/;"	d
QE_BRG1	include/fsl_qe.h	/^	QE_BRG1,     \/* Baud Rate Generator  1 *\/$/;"	e	enum:qe_clock
QE_BRG10	include/fsl_qe.h	/^	QE_BRG10,    \/* Baud Rate Generator 10 *\/$/;"	e	enum:qe_clock
QE_BRG11	include/fsl_qe.h	/^	QE_BRG11,    \/* Baud Rate Generator 11 *\/$/;"	e	enum:qe_clock
QE_BRG12	include/fsl_qe.h	/^	QE_BRG12,    \/* Baud Rate Generator 12 *\/$/;"	e	enum:qe_clock
QE_BRG13	include/fsl_qe.h	/^	QE_BRG13,    \/* Baud Rate Generator 13 *\/$/;"	e	enum:qe_clock
QE_BRG14	include/fsl_qe.h	/^	QE_BRG14,    \/* Baud Rate Generator 14 *\/$/;"	e	enum:qe_clock
QE_BRG15	include/fsl_qe.h	/^	QE_BRG15,    \/* Baud Rate Generator 15 *\/$/;"	e	enum:qe_clock
QE_BRG16	include/fsl_qe.h	/^	QE_BRG16,    \/* Baud Rate Generator 16 *\/$/;"	e	enum:qe_clock
QE_BRG2	include/fsl_qe.h	/^	QE_BRG2,     \/* Baud Rate Generator  2 *\/$/;"	e	enum:qe_clock
QE_BRG3	include/fsl_qe.h	/^	QE_BRG3,     \/* Baud Rate Generator  3 *\/$/;"	e	enum:qe_clock
QE_BRG4	include/fsl_qe.h	/^	QE_BRG4,     \/* Baud Rate Generator  4 *\/$/;"	e	enum:qe_clock
QE_BRG5	include/fsl_qe.h	/^	QE_BRG5,     \/* Baud Rate Generator  5 *\/$/;"	e	enum:qe_clock
QE_BRG6	include/fsl_qe.h	/^	QE_BRG6,     \/* Baud Rate Generator  6 *\/$/;"	e	enum:qe_clock
QE_BRG7	include/fsl_qe.h	/^	QE_BRG7,     \/* Baud Rate Generator  7 *\/$/;"	e	enum:qe_clock
QE_BRG8	include/fsl_qe.h	/^	QE_BRG8,     \/* Baud Rate Generator  8 *\/$/;"	e	enum:qe_clock
QE_BRG9	include/fsl_qe.h	/^	QE_BRG9,     \/* Baud Rate Generator  9 *\/$/;"	e	enum:qe_clock
QE_BRGC_DIV16	include/fsl_qe.h	/^#define QE_BRGC_DIV16	/;"	d
QE_BRGC_DIVISOR_MAX	include/fsl_qe.h	/^#define QE_BRGC_DIVISOR_MAX	/;"	d
QE_BRGC_DIVISOR_SHIFT	include/fsl_qe.h	/^#define QE_BRGC_DIVISOR_SHIFT	/;"	d
QE_BRGC_ENABLE	include/fsl_qe.h	/^#define QE_BRGC_ENABLE	/;"	d
QE_CELL_POOL_GET	include/fsl_qe.h	/^#define QE_CELL_POOL_GET	/;"	d
QE_CELL_POOL_PUT	include/fsl_qe.h	/^#define QE_CELL_POOL_PUT	/;"	d
QE_CLK1	include/fsl_qe.h	/^	QE_CLK1,     \/* Clock  1	       *\/$/;"	e	enum:qe_clock
QE_CLK10	include/fsl_qe.h	/^	QE_CLK10,    \/* Clock 10	       *\/$/;"	e	enum:qe_clock
QE_CLK11	include/fsl_qe.h	/^	QE_CLK11,    \/* Clock 11	       *\/$/;"	e	enum:qe_clock
QE_CLK12	include/fsl_qe.h	/^	QE_CLK12,    \/* Clock 12	       *\/$/;"	e	enum:qe_clock
QE_CLK13	include/fsl_qe.h	/^	QE_CLK13,    \/* Clock 13	       *\/$/;"	e	enum:qe_clock
QE_CLK14	include/fsl_qe.h	/^	QE_CLK14,    \/* Clock 14	       *\/$/;"	e	enum:qe_clock
QE_CLK15	include/fsl_qe.h	/^	QE_CLK15,    \/* Clock 15	       *\/$/;"	e	enum:qe_clock
QE_CLK16	include/fsl_qe.h	/^	QE_CLK16,    \/* Clock 16	       *\/$/;"	e	enum:qe_clock
QE_CLK17	include/fsl_qe.h	/^	QE_CLK17,    \/* Clock 17	       *\/$/;"	e	enum:qe_clock
QE_CLK18	include/fsl_qe.h	/^	QE_CLK18,    \/* Clock 18	       *\/$/;"	e	enum:qe_clock
QE_CLK19	include/fsl_qe.h	/^	QE_CLK19,    \/* Clock 19	       *\/$/;"	e	enum:qe_clock
QE_CLK2	include/fsl_qe.h	/^	QE_CLK2,     \/* Clock  2	       *\/$/;"	e	enum:qe_clock
QE_CLK20	include/fsl_qe.h	/^	QE_CLK20,    \/* Clock 20	       *\/$/;"	e	enum:qe_clock
QE_CLK21	include/fsl_qe.h	/^	QE_CLK21,    \/* Clock 21	       *\/$/;"	e	enum:qe_clock
QE_CLK22	include/fsl_qe.h	/^	QE_CLK22,    \/* Clock 22	       *\/$/;"	e	enum:qe_clock
QE_CLK23	include/fsl_qe.h	/^	QE_CLK23,    \/* Clock 23	       *\/$/;"	e	enum:qe_clock
QE_CLK24	include/fsl_qe.h	/^	QE_CLK24,    \/* Clock 24	       *\/$/;"	e	enum:qe_clock
QE_CLK3	include/fsl_qe.h	/^	QE_CLK3,     \/* Clock  3	       *\/$/;"	e	enum:qe_clock
QE_CLK4	include/fsl_qe.h	/^	QE_CLK4,     \/* Clock  4	       *\/$/;"	e	enum:qe_clock
QE_CLK5	include/fsl_qe.h	/^	QE_CLK5,     \/* Clock  5	       *\/$/;"	e	enum:qe_clock
QE_CLK6	include/fsl_qe.h	/^	QE_CLK6,     \/* Clock  6	       *\/$/;"	e	enum:qe_clock
QE_CLK7	include/fsl_qe.h	/^	QE_CLK7,     \/* Clock  7	       *\/$/;"	e	enum:qe_clock
QE_CLK8	include/fsl_qe.h	/^	QE_CLK8,     \/* Clock  8	       *\/$/;"	e	enum:qe_clock
QE_CLK9	include/fsl_qe.h	/^	QE_CLK9,     \/* Clock  9	       *\/$/;"	e	enum:qe_clock
QE_CLK_DUMMY	include/fsl_qe.h	/^	QE_CLK_DUMMY$/;"	e	enum:qe_clock
QE_CLK_NONE	include/fsl_qe.h	/^	QE_CLK_NONE = 0,$/;"	e	enum:qe_clock
QE_CMXGCR_MII_ENET_MNG_MASK	include/fsl_qe.h	/^#define QE_CMXGCR_MII_ENET_MNG_MASK	/;"	d
QE_CMXGCR_MII_ENET_MNG_SHIFT	include/fsl_qe.h	/^#define QE_CMXGCR_MII_ENET_MNG_SHIFT	/;"	d
QE_CMXUCR_TX_CLK_SRC_MASK	include/fsl_qe.h	/^#define QE_CMXUCR_TX_CLK_SRC_MASK	/;"	d
QE_CP_CERCR_CIR	include/fsl_qe.h	/^#define QE_CP_CERCR_CIR	/;"	d
QE_CP_CERCR_IEE	include/fsl_qe.h	/^#define QE_CP_CERCR_IEE	/;"	d
QE_CP_CERCR_MEE	include/fsl_qe.h	/^#define QE_CP_CERCR_MEE	/;"	d
QE_CR_ASSIGN_PAGE_SNUM_SHIFT	include/fsl_qe.h	/^#define QE_CR_ASSIGN_PAGE_SNUM_SHIFT	/;"	d
QE_CR_FLG	include/fsl_qe.h	/^#define QE_CR_FLG	/;"	d
QE_CR_PROTOCOL_ATM_POS	include/fsl_qe.h	/^#define QE_CR_PROTOCOL_ATM_POS	/;"	d
QE_CR_PROTOCOL_ETHERNET	include/fsl_qe.h	/^#define QE_CR_PROTOCOL_ETHERNET	/;"	d
QE_CR_PROTOCOL_HDLC_TRANSPARENT	include/fsl_qe.h	/^#define QE_CR_PROTOCOL_HDLC_TRANSPARENT	/;"	d
QE_CR_PROTOCOL_L2_SWITCH	include/fsl_qe.h	/^#define QE_CR_PROTOCOL_L2_SWITCH	/;"	d
QE_CR_PROTOCOL_SHIFT	include/fsl_qe.h	/^#define QE_CR_PROTOCOL_SHIFT	/;"	d
QE_CR_PROTOCOL_UNSPECIFIED	include/fsl_qe.h	/^#define QE_CR_PROTOCOL_UNSPECIFIED	/;"	d
QE_CR_SUBBLOCK_GENERAL	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_GENERAL	/;"	d
QE_CR_SUBBLOCK_HPAC	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_HPAC	/;"	d
QE_CR_SUBBLOCK_IDMA1	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_IDMA1	/;"	d
QE_CR_SUBBLOCK_IDMA2	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_IDMA2	/;"	d
QE_CR_SUBBLOCK_IDMA3	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_IDMA3	/;"	d
QE_CR_SUBBLOCK_IDMA4	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_IDMA4	/;"	d
QE_CR_SUBBLOCK_INVALID	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_INVALID	/;"	d
QE_CR_SUBBLOCK_MCC1	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_MCC1	/;"	d
QE_CR_SUBBLOCK_MCC2	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_MCC2	/;"	d
QE_CR_SUBBLOCK_MCC3	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_MCC3	/;"	d
QE_CR_SUBBLOCK_RAND	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_RAND	/;"	d
QE_CR_SUBBLOCK_SPI1	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_SPI1	/;"	d
QE_CR_SUBBLOCK_SPI2	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_SPI2	/;"	d
QE_CR_SUBBLOCK_TIMER	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_TIMER	/;"	d
QE_CR_SUBBLOCK_UCCFAST1	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST1	/;"	d
QE_CR_SUBBLOCK_UCCFAST2	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST2	/;"	d
QE_CR_SUBBLOCK_UCCFAST3	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST3	/;"	d
QE_CR_SUBBLOCK_UCCFAST4	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST4	/;"	d
QE_CR_SUBBLOCK_UCCFAST5	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST5	/;"	d
QE_CR_SUBBLOCK_UCCFAST6	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST6	/;"	d
QE_CR_SUBBLOCK_UCCFAST7	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST7	/;"	d
QE_CR_SUBBLOCK_UCCFAST8	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCFAST8	/;"	d
QE_CR_SUBBLOCK_UCCSLOW1	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW1	/;"	d
QE_CR_SUBBLOCK_UCCSLOW2	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW2	/;"	d
QE_CR_SUBBLOCK_UCCSLOW3	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW3	/;"	d
QE_CR_SUBBLOCK_UCCSLOW4	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW4	/;"	d
QE_CR_SUBBLOCK_UCCSLOW5	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW5	/;"	d
QE_CR_SUBBLOCK_UCCSLOW6	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW6	/;"	d
QE_CR_SUBBLOCK_UCCSLOW7	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW7	/;"	d
QE_CR_SUBBLOCK_UCCSLOW8	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_UCCSLOW8	/;"	d
QE_CR_SUBBLOCK_USB	include/fsl_qe.h	/^#define QE_CR_SUBBLOCK_USB	/;"	d
QE_DATAONLY_BASE	include/fsl_qe.h	/^#define QE_DATAONLY_BASE	/;"	d
QE_DATAONLY_SIZE	include/fsl_qe.h	/^#define QE_DATAONLY_SIZE	/;"	d
QE_ENTER_HUNT_MODE	include/fsl_qe.h	/^#define QE_ENTER_HUNT_MODE	/;"	d
QE_GRACEFUL_STOP_RX	include/fsl_qe.h	/^#define QE_GRACEFUL_STOP_RX	/;"	d
QE_GRACEFUL_STOP_TX	include/fsl_qe.h	/^#define QE_GRACEFUL_STOP_TX	/;"	d
QE_IMA_HOST_CMD	include/fsl_qe.h	/^#define QE_IMA_HOST_CMD	/;"	d
QE_IMMR_OFFSET	include/linux/immap_qe.h	/^#define QE_IMMR_OFFSET	/;"	d
QE_INIT_RX	include/fsl_qe.h	/^#define QE_INIT_RX	/;"	d
QE_INIT_TX	include/fsl_qe.h	/^#define QE_INIT_TX	/;"	d
QE_INIT_TX_RX	include/fsl_qe.h	/^#define QE_INIT_TX_RX	/;"	d
QE_INSERT_CELL	include/fsl_qe.h	/^#define QE_INSERT_CELL	/;"	d
QE_IOP_TAB_END	include/ioports.h	/^#define QE_IOP_TAB_END	/;"	d
QE_IRAM_IADD_AIE	include/fsl_qe.h	/^#define QE_IRAM_IADD_AIE	/;"	d
QE_IRAM_IADD_BADDR	include/fsl_qe.h	/^#define QE_IRAM_IADD_BADDR	/;"	d
QE_IRAM_READY	include/fsl_qe.h	/^#define QE_IRAM_READY	/;"	d
QE_MURAM_SIZE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define QE_MURAM_SIZE	/;"	d
QE_MURAM_SIZE	arch/powerpc/include/asm/config_mpc85xx.h	/^#define QE_MURAM_SIZE	/;"	d
QE_MURAM_SIZE	include/linux/immap_qe.h	/^#define QE_MURAM_SIZE	/;"	d
QE_MURAM_SIZE	include/linux/immap_qe.h	/^#define QE_MURAM_SIZE /;"	d
QE_NUM_OF_BRGS	include/fsl_qe.h	/^#define QE_NUM_OF_BRGS	/;"	d
QE_NUM_OF_SNUM	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define QE_NUM_OF_SNUM	/;"	d
QE_NUM_OF_SNUM	arch/powerpc/include/asm/config_mpc85xx.h	/^#define QE_NUM_OF_SNUM	/;"	d
QE_NUM_OF_SNUM	include/linux/immap_qe.h	/^#define QE_NUM_OF_SNUM	/;"	d
QE_NUM_OF_SNUM	include/linux/immap_qe.h	/^#define QE_NUM_OF_SNUM /;"	d
QE_RESET	include/fsl_qe.h	/^#define QE_RESET	/;"	d
QE_RESTART_RX	include/fsl_qe.h	/^#define QE_RESTART_RX	/;"	d
QE_RESTART_TX	include/fsl_qe.h	/^#define QE_RESTART_TX	/;"	d
QE_RISC_ALLOCATION_FOUR_RISCS	include/fsl_qe.h	/^#define	QE_RISC_ALLOCATION_FOUR_RISCS	/;"	d
QE_RISC_ALLOCATION_RISC1	include/fsl_qe.h	/^#define	QE_RISC_ALLOCATION_RISC1	/;"	d
QE_RISC_ALLOCATION_RISC1_AND_RISC2	include/fsl_qe.h	/^#define	QE_RISC_ALLOCATION_RISC1_AND_RISC2 /;"	d
QE_RISC_ALLOCATION_RISC2	include/fsl_qe.h	/^#define	QE_RISC_ALLOCATION_RISC2	/;"	d
QE_RISC_ALLOCATION_RISC3	include/fsl_qe.h	/^#define	QE_RISC_ALLOCATION_RISC3	/;"	d
QE_RISC_ALLOCATION_RISC4	include/fsl_qe.h	/^#define	QE_RISC_ALLOCATION_RISC4	/;"	d
QE_SDEBCR_BA_MASK	include/fsl_qe.h	/^#define QE_SDEBCR_BA_MASK	/;"	d
QE_SDMR_ADR_SEL	include/fsl_qe.h	/^#define QE_SDMR_ADR_SEL	/;"	d
QE_SDMR_BER1_MSK	include/fsl_qe.h	/^#define QE_SDMR_BER1_MSK	/;"	d
QE_SDMR_BER2_MSK	include/fsl_qe.h	/^#define QE_SDMR_BER2_MSK	/;"	d
QE_SDMR_CEN_MASK	include/fsl_qe.h	/^#define QE_SDMR_CEN_MASK	/;"	d
QE_SDMR_CEN_SHIFT	include/fsl_qe.h	/^#define QE_SDMR_CEN_SHIFT	/;"	d
QE_SDMR_EB1_MSK	include/fsl_qe.h	/^#define QE_SDMR_EB1_MSK	/;"	d
QE_SDMR_EB1_PR_MASK	include/fsl_qe.h	/^#define QE_SDMR_EB1_PR_MASK	/;"	d
QE_SDMR_EB1_PR_SHIFT	include/fsl_qe.h	/^#define QE_SDMR_EB1_PR_SHIFT	/;"	d
QE_SDMR_ER1_MSK	include/fsl_qe.h	/^#define QE_SDMR_ER1_MSK	/;"	d
QE_SDMR_ER1_PR	include/fsl_qe.h	/^#define QE_SDMR_ER1_PR	/;"	d
QE_SDMR_ER2_MSK	include/fsl_qe.h	/^#define QE_SDMR_ER2_MSK	/;"	d
QE_SDMR_GLB_1_MSK	include/fsl_qe.h	/^#define QE_SDMR_GLB_1_MSK	/;"	d
QE_SDMR_SBER_1	include/fsl_qe.h	/^#define QE_SDMR_SBER_1	/;"	d
QE_SDMR_SBER_2	include/fsl_qe.h	/^#define QE_SDMR_SBER_2	/;"	d
QE_SDSR_BER1	include/fsl_qe.h	/^#define QE_SDSR_BER1	/;"	d
QE_SDSR_BER2	include/fsl_qe.h	/^#define QE_SDSR_BER2	/;"	d
QE_SDTM_MSNUM_SHIFT	include/fsl_qe.h	/^#define QE_SDTM_MSNUM_SHIFT	/;"	d
QE_SET_GROUP_ADDRESS	include/fsl_qe.h	/^#define QE_SET_GROUP_ADDRESS	/;"	d
QE_SNUM_STATE_FREE	include/fsl_qe.h	/^	QE_SNUM_STATE_FREE    \/* free *\/$/;"	e	enum:qe_snum_state
QE_SNUM_STATE_USED	include/fsl_qe.h	/^	QE_SNUM_STATE_USED,   \/* used *\/$/;"	e	enum:qe_snum_state
QE_START_FLOW_CONTROL	include/fsl_qe.h	/^#define QE_START_FLOW_CONTROL	/;"	d
QE_STOP_FLOW_CONTROL	include/fsl_qe.h	/^#define QE_STOP_FLOW_CONTROL	/;"	d
QE_STOP_TX	include/fsl_qe.h	/^#define QE_STOP_TX	/;"	d
QE_SWITCH_COMMAND	include/fsl_qe.h	/^#define QE_SWITCH_COMMAND	/;"	d
QFW	drivers/misc/Kconfig	/^config QFW$/;"	c	menu:Multifunction device drivers
QH	drivers/usb/host/ehci.h	/^struct QH {$/;"	s
QH_ENDPT1_C	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_C(/;"	d
QH_ENDPT1_DEVADDR	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_DEVADDR(/;"	d
QH_ENDPT1_DTC	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_DTC(/;"	d
QH_ENDPT1_DTC_DT_FROM_QTD	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_DTC_DT_FROM_QTD	/;"	d
QH_ENDPT1_DTC_IGNORE_QTD_TD	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_DTC_IGNORE_QTD_TD	/;"	d
QH_ENDPT1_ENDPT	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_ENDPT(/;"	d
QH_ENDPT1_EPS	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_EPS(/;"	d
QH_ENDPT1_EPS_FS	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_EPS_FS	/;"	d
QH_ENDPT1_EPS_HS	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_EPS_HS	/;"	d
QH_ENDPT1_EPS_LS	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_EPS_LS	/;"	d
QH_ENDPT1_H	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_H(/;"	d
QH_ENDPT1_I	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_I(/;"	d
QH_ENDPT1_MAXPKTLEN	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_MAXPKTLEN(/;"	d
QH_ENDPT1_RL	drivers/usb/host/ehci.h	/^#define QH_ENDPT1_RL(/;"	d
QH_ENDPT2_HUBADDR	drivers/usb/host/ehci.h	/^#define QH_ENDPT2_HUBADDR(/;"	d
QH_ENDPT2_MULT	drivers/usb/host/ehci.h	/^#define QH_ENDPT2_MULT(/;"	d
QH_ENDPT2_PORTNUM	drivers/usb/host/ehci.h	/^#define QH_ENDPT2_PORTNUM(/;"	d
QH_ENDPT2_UFCMASK	drivers/usb/host/ehci.h	/^#define QH_ENDPT2_UFCMASK(/;"	d
QH_ENDPT2_UFSMASK	drivers/usb/host/ehci.h	/^#define QH_ENDPT2_UFSMASK(/;"	d
QH_FULL_SPEED	drivers/usb/host/ehci-hcd.c	/^	#define QH_FULL_SPEED	/;"	d	file:
QH_HIGH_SPEED	drivers/usb/host/ehci-hcd.c	/^	#define QH_HIGH_SPEED	/;"	d	file:
QH_LINK_TERMINATE	drivers/usb/host/ehci.h	/^#define	QH_LINK_TERMINATE	/;"	d
QH_LINK_TYPE_FSTN	drivers/usb/host/ehci.h	/^#define	QH_LINK_TYPE_FSTN	/;"	d
QH_LINK_TYPE_ITD	drivers/usb/host/ehci.h	/^#define	QH_LINK_TYPE_ITD	/;"	d
QH_LINK_TYPE_QH	drivers/usb/host/ehci.h	/^#define	QH_LINK_TYPE_QH	/;"	d
QH_LINK_TYPE_SITD	drivers/usb/host/ehci.h	/^#define	QH_LINK_TYPE_SITD	/;"	d
QH_LOW_SPEED	drivers/usb/host/ehci-hcd.c	/^	#define QH_LOW_SPEED	/;"	d	file:
QIXIS_BASE	include/configs/B4860QDS.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/BSC9132QDS.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/T102xQDS.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/T1040QDS.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/T208xQDS.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/T4240QDS.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/ls1021aqds.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/ls1043aqds.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/ls1046aqds.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE	include/configs/ls2080a_common.h	/^#define QIXIS_BASE	/;"	d
QIXIS_BASE_PHYS	include/configs/B4860QDS.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/T102xQDS.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/T1040QDS.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/T208xQDS.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/T4240QDS.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/ls1021aqds.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/ls1043aqds.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/ls1046aqds.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS	include/configs/ls2080a_common.h	/^#define QIXIS_BASE_PHYS	/;"	d
QIXIS_BASE_PHYS_EARLY	include/configs/ls2080a_common.h	/^#define QIXIS_BASE_PHYS_EARLY	/;"	d
QIXIS_BRDCFG5	include/configs/T4240QDS.h	/^#define QIXIS_BRDCFG5	/;"	d
QIXIS_CLK_100	board/freescale/b4860qds/b4860qds_qixis.h	/^#define QIXIS_CLK_100	/;"	d
QIXIS_CLK_125	board/freescale/b4860qds/b4860qds_qixis.h	/^#define QIXIS_CLK_125	/;"	d
QIXIS_CLK_133	board/freescale/b4860qds/b4860qds_qixis.h	/^#define QIXIS_CLK_133	/;"	d
QIXIS_CLK_66	board/freescale/b4860qds/b4860qds_qixis.h	/^#define QIXIS_CLK_66	/;"	d
QIXIS_CTL_SYS	include/configs/ls1021aqds.h	/^#define QIXIS_CTL_SYS	/;"	d
QIXIS_CTL_SYS_EVTSW_IRQ	include/configs/ls1021aqds.h	/^#define QIXIS_CTL_SYS_EVTSW_IRQ	/;"	d
QIXIS_CTL_SYS_EVTSW_MASK	include/configs/ls1021aqds.h	/^#define QIXIS_CTL_SYS_EVTSW_MASK	/;"	d
QIXIS_DAT4	board/freescale/common/qixis.h	/^#define QIXIS_DAT4	/;"	d
QIXIS_DAT5_6_7	board/freescale/common/qixis.h	/^#define QIXIS_DAT5_6_7	/;"	d
QIXIS_DCU_BRDCFG5	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_DCU_BRDCFG5	/;"	d
QIXIS_DDRCLK_100	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_100	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_DDRCLK_100 /;"	d
QIXIS_DDRCLK_100	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_DDRCLK_100	/;"	d
QIXIS_DDRCLK_125	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_125	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_DDRCLK_125 /;"	d
QIXIS_DDRCLK_125	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_DDRCLK_125	/;"	d
QIXIS_DDRCLK_133	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_133	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_DDRCLK_133 /;"	d
QIXIS_DDRCLK_133	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_DDRCLK_133	/;"	d
QIXIS_DDRCLK_66	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_DDRCLK_66	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_DDRCLK_66 /;"	d
QIXIS_DDRCLK_66	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_DDRCLK_66	/;"	d
QIXIS_ESDHC_ADAPTER_TYPE_EMMC44	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC44 /;"	d
QIXIS_ESDHC_ADAPTER_TYPE_EMMC45	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 /;"	d
QIXIS_ESDHC_ADAPTER_TYPE_MMC	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_ADAPTER_TYPE_MMC /;"	d
QIXIS_ESDHC_ADAPTER_TYPE_RSV	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_ADAPTER_TYPE_RSV /;"	d
QIXIS_ESDHC_ADAPTER_TYPE_SD	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_ADAPTER_TYPE_SD /;"	d
QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY /;"	d
QIXIS_ESDHC_NO_ADAPTER	board/freescale/common/qixis.h	/^#define QIXIS_ESDHC_NO_ADAPTER /;"	d
QIXIS_ESDHC_NO_ADAPTER	include/configs/ls2080a_common.h	/^#define QIXIS_ESDHC_NO_ADAPTER	/;"	d
QIXIS_EVDD_BY_SDHC_VS	board/freescale/common/qixis.h	/^#define QIXIS_EVDD_BY_SDHC_VS	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/B4860QDS.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/BSC9132QDS.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/T102xQDS.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/T1040QDS.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/T4240QDS.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/ls1012aqds.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/ls1021aqds.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_ALTBANK	include/configs/ls2080ardb.h	/^#define QIXIS_LBMAP_ALTBANK	/;"	d
QIXIS_LBMAP_BRDCFG_REG	board/freescale/common/qixis.c	/^#define QIXIS_LBMAP_BRDCFG_REG /;"	d	file:
QIXIS_LBMAP_BRDCFG_REG	include/configs/ls1012aqds.h	/^#define QIXIS_LBMAP_BRDCFG_REG	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/B4860QDS.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/BSC9132QDS.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/T102xQDS.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/T1040QDS.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/T4240QDS.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/ls1012aqds.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/ls1021aqds.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_DFLTBANK	include/configs/ls2080ardb.h	/^#define QIXIS_LBMAP_DFLTBANK	/;"	d
QIXIS_LBMAP_MASK	include/configs/B4860QDS.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/BSC9132QDS.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/T102xQDS.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/T1040QDS.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/T4240QDS.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/ls1012aqds.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/ls1021aqds.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_MASK	include/configs/ls2080ardb.h	/^#define QIXIS_LBMAP_MASK	/;"	d
QIXIS_LBMAP_NAND	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_NAND	/;"	d
QIXIS_LBMAP_NAND	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_NAND	/;"	d
QIXIS_LBMAP_NAND	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_NAND	/;"	d
QIXIS_LBMAP_NAND	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_NAND	/;"	d
QIXIS_LBMAP_NAND	include/configs/ls2080ardb.h	/^#define QIXIS_LBMAP_NAND	/;"	d
QIXIS_LBMAP_QSPI	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_QSPI	/;"	d
QIXIS_LBMAP_QSPI	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_QSPI	/;"	d
QIXIS_LBMAP_QSPI	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_QSPI	/;"	d
QIXIS_LBMAP_SD	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_SD	/;"	d
QIXIS_LBMAP_SD	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_SD	/;"	d
QIXIS_LBMAP_SD	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_SD	/;"	d
QIXIS_LBMAP_SD_QSPI	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_SD_QSPI	/;"	d
QIXIS_LBMAP_SD_QSPI	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_SD_QSPI	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/B4860QDS.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/BSC9132QDS.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/T102xQDS.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/T1040QDS.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/T4240QDS.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/ls1012aqds.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/ls1021aqds.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SHIFT	include/configs/ls2080ardb.h	/^#define QIXIS_LBMAP_SHIFT	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/B4860QDS.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/BSC9132QDS.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/T102xQDS.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/T1040QDS.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/T208xQDS.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/T4240QDS.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/ls1012aqds.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/ls1021aqds.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/ls1043aqds.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/ls1046aqds.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/ls2080aqds.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_LBMAP_SWITCH	include/configs/ls2080ardb.h	/^#define QIXIS_LBMAP_SWITCH	/;"	d
QIXIS_MUX_SDHC	include/configs/T4240QDS.h	/^#define QIXIS_MUX_SDHC	/;"	d
QIXIS_MUX_SDHC_WIDTH8	include/configs/T4240QDS.h	/^#define QIXIS_MUX_SDHC_WIDTH8	/;"	d
QIXIS_PWR_CTL	include/configs/ls1021aqds.h	/^#define QIXIS_PWR_CTL	/;"	d
QIXIS_PWR_CTL2	include/configs/ls1021aqds.h	/^#define QIXIS_PWR_CTL2	/;"	d
QIXIS_PWR_CTL2_PCTL	include/configs/ls1021aqds.h	/^#define QIXIS_PWR_CTL2_PCTL	/;"	d
QIXIS_PWR_CTL_POWEROFF	include/configs/ls1021aqds.h	/^#define QIXIS_PWR_CTL_POWEROFF	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/B4860QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/BSC9132QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/T102xQDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/T1040QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/T208xQDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/T4240QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/ls1012aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/ls1021aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/ls1043aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/ls1046aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/ls2080aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_IDLE	include/configs/ls2080ardb.h	/^#define QIXIS_RCFG_CTL_RECONFIG_IDLE	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/B4860QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/BSC9132QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/T102xQDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/T1040QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/T208xQDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/T4240QDS.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/ls1012aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/ls1021aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/ls1043aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/ls1046aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/ls2080aqds.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_RECONFIG_START	include/configs/ls2080ardb.h	/^#define QIXIS_RCFG_CTL_RECONFIG_START	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/B4860QDS.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/BSC9132QDS.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/T102xQDS.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/T1040QDS.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/T208xQDS.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/T4240QDS.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/ls1012aqds.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/ls1021aqds.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/ls1043aqds.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/ls1046aqds.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/ls2080aqds.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCFG_CTL_WATCHDOG_ENBLE	include/configs/ls2080ardb.h	/^#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	/;"	d
QIXIS_RCW_SRC_NAND	include/configs/T208xQDS.h	/^#define QIXIS_RCW_SRC_NAND	/;"	d
QIXIS_RCW_SRC_NAND	include/configs/ls1043aqds.h	/^#define QIXIS_RCW_SRC_NAND	/;"	d
QIXIS_RCW_SRC_NAND	include/configs/ls1046aqds.h	/^#define QIXIS_RCW_SRC_NAND	/;"	d
QIXIS_RCW_SRC_NAND	include/configs/ls2080aqds.h	/^#define QIXIS_RCW_SRC_NAND	/;"	d
QIXIS_RCW_SRC_NAND	include/configs/ls2080ardb.h	/^#define QIXIS_RCW_SRC_NAND	/;"	d
QIXIS_RCW_SRC_QSPI	include/configs/ls1043aqds.h	/^#define QIXIS_RCW_SRC_QSPI	/;"	d
QIXIS_RCW_SRC_QSPI	include/configs/ls1046aqds.h	/^#define QIXIS_RCW_SRC_QSPI	/;"	d
QIXIS_RCW_SRC_QSPI	include/configs/ls2080aqds.h	/^#define QIXIS_RCW_SRC_QSPI	/;"	d
QIXIS_RCW_SRC_SD	include/configs/T208xQDS.h	/^#define QIXIS_RCW_SRC_SD	/;"	d
QIXIS_RCW_SRC_SD	include/configs/ls1043aqds.h	/^#define QIXIS_RCW_SRC_SD	/;"	d
QIXIS_RCW_SRC_SD	include/configs/ls1046aqds.h	/^#define QIXIS_RCW_SRC_SD	/;"	d
QIXIS_READ	board/freescale/common/qixis.h	/^#define QIXIS_READ(/;"	d
QIXIS_READ_I2C	board/freescale/common/qixis.h	/^#define QIXIS_READ_I2C(/;"	d
QIXIS_RST_CTL_RESET	include/configs/B4860QDS.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/BSC9132QDS.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/T102xQDS.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/T1040QDS.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/T208xQDS.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/T4240QDS.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/ls1012aqds.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/ls1021aqds.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/ls1043aqds.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/ls1046aqds.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/ls2080aqds.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET	include/configs/ls2080ardb.h	/^#define QIXIS_RST_CTL_RESET	/;"	d
QIXIS_RST_CTL_RESET_EN	include/configs/ls2080ardb.h	/^#define QIXIS_RST_CTL_RESET_EN	/;"	d
QIXIS_RST_FORCE_3	include/configs/ls1021aqds.h	/^#define QIXIS_RST_FORCE_3	/;"	d
QIXIS_RST_FORCE_3_PCIESLOT1	include/configs/ls1021aqds.h	/^#define QIXIS_RST_FORCE_3_PCIESLOT1	/;"	d
QIXIS_RST_FORCE_MEM	include/configs/T102xQDS.h	/^#define	QIXIS_RST_FORCE_MEM	/;"	d
QIXIS_RST_FORCE_MEM	include/configs/T1040QDS.h	/^#define	QIXIS_RST_FORCE_MEM	/;"	d
QIXIS_RST_FORCE_MEM	include/configs/T208xQDS.h	/^#define QIXIS_RST_FORCE_MEM	/;"	d
QIXIS_RST_FORCE_MEM	include/configs/T4240QDS.h	/^#define QIXIS_RST_FORCE_MEM	/;"	d
QIXIS_RST_FORCE_MEM	include/configs/ls2080aqds.h	/^#define	QIXIS_RST_FORCE_MEM	/;"	d
QIXIS_RST_FORCE_MEM	include/configs/ls2080ardb.h	/^#define	QIXIS_RST_FORCE_MEM	/;"	d
QIXIS_SDCLK1_100	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SDCLK1_100	/;"	d
QIXIS_SDCLK1_100	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SDCLK1_100	/;"	d
QIXIS_SDCLK1_100	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SDCLK1_100	/;"	d
QIXIS_SDCLK1_100_SP	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SDCLK1_100_SP	/;"	d
QIXIS_SDCLK1_100_SP	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SDCLK1_100_SP	/;"	d
QIXIS_SDCLK1_100_SP	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SDCLK1_100_SP	/;"	d
QIXIS_SDCLK1_125	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SDCLK1_125	/;"	d
QIXIS_SDCLK1_125	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SDCLK1_125	/;"	d
QIXIS_SDCLK1_125	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SDCLK1_125	/;"	d
QIXIS_SDCLK1_165	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SDCLK1_165	/;"	d
QIXIS_SDCLK1_165	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SDCLK1_165	/;"	d
QIXIS_SDCLK1_165	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SDCLK1_165	/;"	d
QIXIS_SDCLKIN	board/freescale/common/qixis.h	/^#define QIXIS_SDCLKIN	/;"	d
QIXIS_SDCLKOUT	board/freescale/common/qixis.h	/^#define QIXIS_SDCLKOUT	/;"	d
QIXIS_SDID_MASK	board/freescale/common/qixis.h	/^#define QIXIS_SDID_MASK /;"	d
QIXIS_SDID_MASK	include/configs/ls2080a_common.h	/^#define QIXIS_SDID_MASK	/;"	d
QIXIS_SRDS1CLK_100	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SRDS1CLK_100	/;"	d
QIXIS_SRDS1CLK_122	board/freescale/b4860qds/b4860qds_qixis.h	/^#define QIXIS_SRDS1CLK_122	/;"	d
QIXIS_SRDS1CLK_122	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SRDS1CLK_122	/;"	d
QIXIS_SRDS1CLK_122	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SRDS1CLK_122	/;"	d
QIXIS_SRDS1CLK_122	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SRDS1CLK_122	/;"	d
QIXIS_SRDS1CLK_125	board/freescale/b4860qds/b4860qds_qixis.h	/^#define QIXIS_SRDS1CLK_125	/;"	d
QIXIS_SRDS1CLK_125	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SRDS1CLK_125	/;"	d
QIXIS_SRDS1CLK_125	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SRDS1CLK_125	/;"	d
QIXIS_SRDS1CLK_125	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SRDS1CLK_125	/;"	d
QIXIS_STAT_PRES1	include/configs/ls2080a_common.h	/^#define QIXIS_STAT_PRES1	/;"	d
QIXIS_SYSCLK_100	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_100	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_100 /;"	d
QIXIS_SYSCLK_100	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_100	/;"	d
QIXIS_SYSCLK_125	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_125	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_125 /;"	d
QIXIS_SYSCLK_125	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_125	/;"	d
QIXIS_SYSCLK_133	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_133	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_133 /;"	d
QIXIS_SYSCLK_133	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_133	/;"	d
QIXIS_SYSCLK_150	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_150	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_150 /;"	d
QIXIS_SYSCLK_150	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_150	/;"	d
QIXIS_SYSCLK_160	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_160	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_160 /;"	d
QIXIS_SYSCLK_160	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_160	/;"	d
QIXIS_SYSCLK_166	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_166	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_166 /;"	d
QIXIS_SYSCLK_166	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_166	/;"	d
QIXIS_SYSCLK_64	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_64	/;"	d
QIXIS_SYSCLK_64	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_64	/;"	d
QIXIS_SYSCLK_64	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_64	/;"	d
QIXIS_SYSCLK_64	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_64	/;"	d
QIXIS_SYSCLK_64	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_64	/;"	d
QIXIS_SYSCLK_66	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_66	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_66 /;"	d
QIXIS_SYSCLK_66	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_66	/;"	d
QIXIS_SYSCLK_83	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/t102xqds/t102xqds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/t1040qds/t1040qds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_SYSCLK_83	board/freescale/t208xqds/t208xqds_qixis.h	/^#define QIXIS_SYSCLK_83 /;"	d
QIXIS_SYSCLK_83	board/freescale/t4qds/t4240qds_qixis.h	/^#define QIXIS_SYSCLK_83	/;"	d
QIXIS_WRITE	board/freescale/common/qixis.h	/^#define QIXIS_WRITE(/;"	d
QIXIS_WRITE_I2C	board/freescale/common/qixis.h	/^#define QIXIS_WRITE_I2C(/;"	d
QItype	arch/arc/lib/libgcc2.h	/^typedef		 int QItype	__attribute__ ((mode (QI)));$/;"	t	typeref:typename:int
QMTBS_DEF_VAL	drivers/net/mvgbe.h	/^#define QMTBS_DEF_VAL	/;"	d
QM_DESC_DEFAULT_DESCINFO	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_DESC_DEFAULT_DESCINFO /;"	d
QM_DESC_DEFAULT_PINFO	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_DESC_DEFAULT_PINFO /;"	d
QM_DESC_PINFO_EPIB	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_DESC_PINFO_EPIB /;"	d
QM_DESC_PINFO_RETURN_OWN	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_DESC_PINFO_RETURN_OWN /;"	d
QM_DESC_PSINFO_IN_DESCR	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_DESC_PSINFO_IN_DESCR /;"	d
QM_DESC_TYPE_HOST	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_DESC_TYPE_HOST /;"	d
QM_ERR	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_ERR /;"	d
QM_OK	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define QM_OK /;"	d
QOSC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define QOSC_IPS_BASE_ADDR /;"	d
QOS_FAST_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define QOS_FAST_DISABLE	/;"	d
QOS_PRI_GFX	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_GFX$/;"	c	choice:choice335b3af40204
QOS_PRI_MEDIA	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_MEDIA$/;"	c	choice:choice335b3af40204
QOS_PRI_NORMAL	arch/arm/mach-rmobile/Kconfig.32	/^config QOS_PRI_NORMAL$/;"	c	choice:choice335b3af40204
QPOLA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
QPOLA_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK,$/;"	e	enum:__anona307901d0103	file:
QPOLA_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QPOLA_MARK,$/;"	e	enum:__anona307945e0103	file:
QPOLB_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
QPOLB_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK,$/;"	e	enum:__anona307901d0103	file:
QPOLB_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QPOLB_MARK,$/;"	e	enum:__anona307945e0103	file:
QRTR_CLK	arch/x86/cpu/quark/smc.h	/^#define QRTR_CLK	/;"	d
QSFP1_RST	board/keymile/kmp204x/kmp204x.c	/^#define QSFP1_RST	/;"	d	file:
QSFP2_RST	board/keymile/kmp204x/kmp204x.c	/^#define QSFP2_RST	/;"	d	file:
QSGMII	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII,$/;"	e	enum:serdes_type
QSGMII_5_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII_5_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
QSGMII_A	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_A, \/* A indicates MACs 1-4 *\/$/;"	e	enum:srds_prtcl
QSGMII_B	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_B, \/* B indicates MACs 5-8 *\/$/;"	e	enum:srds_prtcl
QSGMII_C	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_C, \/* C indicates MACs 9-12 *\/$/;"	e	enum:srds_prtcl
QSGMII_CARD_PORT1_PHY_ADDR_S1	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT1_PHY_ADDR_S1 /;"	d
QSGMII_CARD_PORT1_PHY_ADDR_S2	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT1_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT1_PHY_ADDR_S2	include/configs/ls1046aqds.h	/^#define QSGMII_CARD_PORT1_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT2_PHY_ADDR_S1	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT2_PHY_ADDR_S1 /;"	d
QSGMII_CARD_PORT2_PHY_ADDR_S2	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT2_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT2_PHY_ADDR_S2	include/configs/ls1046aqds.h	/^#define QSGMII_CARD_PORT2_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT3_PHY_ADDR_S1	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT3_PHY_ADDR_S1 /;"	d
QSGMII_CARD_PORT3_PHY_ADDR_S2	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT3_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT3_PHY_ADDR_S2	include/configs/ls1046aqds.h	/^#define QSGMII_CARD_PORT3_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT4_PHY_ADDR_S1	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT4_PHY_ADDR_S1 /;"	d
QSGMII_CARD_PORT4_PHY_ADDR_S2	include/configs/ls1043aqds.h	/^#define QSGMII_CARD_PORT4_PHY_ADDR_S2 /;"	d
QSGMII_CARD_PORT4_PHY_ADDR_S2	include/configs/ls1046aqds.h	/^#define QSGMII_CARD_PORT4_PHY_ADDR_S2 /;"	d
QSGMII_CONTROL_1_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define QSGMII_CONTROL_1_REG	/;"	d
QSGMII_CONTROL_REG1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define QSGMII_CONTROL_REG1	/;"	d
QSGMII_D	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_D, \/* D indicates MACs 12-16 *\/$/;"	e	enum:srds_prtcl
QSGMII_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
QSGMII_FM1_A	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_FM1_A,		\/* A indicates MACs 1,2,5,6 *\/$/;"	e	enum:srds_prtcl
QSGMII_FM1_A	arch/powerpc/include/asm/fsl_serdes.h	/^	QSGMII_FM1_A,		\/* A indicates MACs 1-4 *\/$/;"	e	enum:srds_prtcl
QSGMII_FM1_B	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_FM1_B,		\/* B indicates MACs 5,6,9,10 *\/$/;"	e	enum:srds_prtcl
QSGMII_FM1_B	arch/powerpc/include/asm/fsl_serdes.h	/^	QSGMII_FM1_B,		\/* B indicates MACs 5,6,9,10 *\/$/;"	e	enum:srds_prtcl
QSGMII_FM2_A	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_FM2_A,$/;"	e	enum:srds_prtcl
QSGMII_FM2_A	arch/powerpc/include/asm/fsl_serdes.h	/^	QSGMII_FM2_A,$/;"	e	enum:srds_prtcl
QSGMII_FM2_B	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_FM2_B,$/;"	e	enum:srds_prtcl
QSGMII_FM2_B	arch/powerpc/include/asm/fsl_serdes.h	/^	QSGMII_FM2_B,$/;"	e	enum:srds_prtcl
QSGMII_GEN_1_SETTING_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define QSGMII_GEN_1_SETTING_REG(/;"	d
QSGMII_PORT1_PHY_ADDR	include/configs/ls1043ardb.h	/^#define QSGMII_PORT1_PHY_ADDR	/;"	d
QSGMII_PORT2_PHY_ADDR	include/configs/ls1043ardb.h	/^#define QSGMII_PORT2_PHY_ADDR	/;"	d
QSGMII_PORT3_PHY_ADDR	include/configs/ls1043ardb.h	/^#define QSGMII_PORT3_PHY_ADDR	/;"	d
QSGMII_PORT4_PHY_ADDR	include/configs/ls1043ardb.h	/^#define QSGMII_PORT4_PHY_ADDR	/;"	d
QSGMII_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
QSGMII_SEQ_IDX	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII_SEQ_IDX,$/;"	e	enum:__anon525929f50403
QSGMII_SERDES_CFG_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define QSGMII_SERDES_CFG_REG(/;"	d
QSGMII_SW1_A	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_SW1_A,		\/* Indicates ports on L2 Switch *\/$/;"	e	enum:srds_prtcl
QSGMII_SW1_A	arch/powerpc/include/asm/fsl_serdes.h	/^	QSGMII_SW1_A,		\/* Indicates ports on L2 Switch *\/$/;"	e	enum:srds_prtcl
QSGMII_SW1_B	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	QSGMII_SW1_B,$/;"	e	enum:srds_prtcl
QSGMII_SW1_B	arch/powerpc/include/asm/fsl_serdes.h	/^	QSGMII_SW1_B,$/;"	e	enum:srds_prtcl
QSGMII_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
QSGMII_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	QSGMII_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
QSGMII_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	QSGMII_UNIT_ID,$/;"	e	enum:unit_id
QSPI0_AMBA_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define QSPI0_AMBA_BASE /;"	d
QSPI0_AMBA_BASE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define QSPI0_AMBA_BASE	/;"	d
QSPI0_AMBA_BASE	include/configs/ls1012a_common.h	/^#define QSPI0_AMBA_BASE	/;"	d
QSPI0_AMBA_BASE	include/configs/ls1021aqds.h	/^#define QSPI0_AMBA_BASE	/;"	d
QSPI0_AMBA_BASE	include/configs/ls1021atwr.h	/^#define QSPI0_AMBA_BASE	/;"	d
QSPI0_AMBA_BASE	include/configs/mx7dsabresd.h	/^#define QSPI0_AMBA_BASE	/;"	d
QSPI0_AMBA_END	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define QSPI0_AMBA_END /;"	d
QSPI0_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define QSPI0_ARB_BASE_ADDR /;"	d
QSPI0_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define QSPI0_ARB_END_ADDR /;"	d
QSPI0_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define QSPI0_BASE_ADDR	/;"	d
QSPI0_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define QSPI0_BASE_ADDR	/;"	d
QSPI0_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define QSPI0_BASE_ADDR /;"	d
QSPI0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define QSPI0_BASE_ADDR	/;"	d
QSPI0_BASE_ADDR	include/configs/mx7dsabresd.h	/^#define QSPI0_BASE_ADDR	/;"	d
QSPI1_AMBA_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define QSPI1_AMBA_BASE /;"	d
QSPI1_AMBA_END	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define QSPI1_AMBA_END /;"	d
QSPI1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define QSPI1_BASE_ADDR /;"	d
QSPI1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define QSPI1_IPS_BASE_ADDR /;"	d
QSPI_3_PIN	drivers/spi/ti_qspi.c	/^#define QSPI_3_PIN /;"	d	file:
QSPI_BASE	arch/arm/include/asm/arch-am33xx/omap.h	/^#define QSPI_BASE /;"	d
QSPI_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define QSPI_BASE	/;"	d
QSPI_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define QSPI_BASE_ADDR /;"	d
QSPI_BFGENCR_PAR_EN_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_BFGENCR_PAR_EN_MASK	/;"	d
QSPI_BFGENCR_PAR_EN_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_BFGENCR_PAR_EN_SHIFT	/;"	d
QSPI_BFGENCR_SEQID_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_BFGENCR_SEQID_MASK	/;"	d
QSPI_BFGENCR_SEQID_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_BFGENCR_SEQID_SHIFT	/;"	d
QSPI_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	QSPI_BOOT,$/;"	e	enum:boot_device
QSPI_BOOT	common/Kconfig	/^config QSPI_BOOT$/;"	c	menu:Boot media
QSPI_BUF3CR_ADATSZ_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_BUF3CR_ADATSZ_MASK	/;"	d
QSPI_BUF3CR_ADATSZ_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_BUF3CR_ADATSZ_SHIFT	/;"	d
QSPI_BUF3CR_ALLMST_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_BUF3CR_ALLMST_MASK	/;"	d
QSPI_BUF3CR_ALLMST_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_BUF3CR_ALLMST_SHIFT	/;"	d
QSPI_BUFXCR_INVALID_MSTRID	drivers/spi/fsl_qspi.h	/^#define QSPI_BUFXCR_INVALID_MSTRID	/;"	d
QSPI_BUSY	drivers/spi/ti_qspi.c	/^#define QSPI_BUSY /;"	d	file:
QSPI_CKPHA	drivers/spi/ti_qspi.c	/^#define QSPI_CKPHA(/;"	d	file:
QSPI_CKPOL	drivers/spi/ti_qspi.c	/^#define QSPI_CKPOL(/;"	d	file:
QSPI_CLK_CTRL	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define QSPI_CLK_CTRL	/;"	d
QSPI_CLK_DIV_MAX	drivers/spi/ti_qspi.c	/^#define QSPI_CLK_DIV_MAX /;"	d	file:
QSPI_CLK_EN	drivers/spi/ti_qspi.c	/^#define QSPI_CLK_EN /;"	d	file:
QSPI_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	QSPI_CLK_ROOT = 85,$/;"	e	enum:clk_root_index
QSPI_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
QSPI_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define QSPI_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
QSPI_CLOCK_CFG	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	QSPI_CLOCK_CFG,$/;"	e	enum:periph_clock
QSPI_CMD1_BIDIR	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_BIDIR	/;"	d	file:
QSPI_CMD1_BITLEN_MASK	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_BITLEN_MASK	/;"	d	file:
QSPI_CMD1_BITLEN_SHIFT	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_BITLEN_SHIFT	/;"	d	file:
QSPI_CMD1_BOTH_EN_BIT	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_BOTH_EN_BIT	/;"	d	file:
QSPI_CMD1_BOTH_EN_BYTE	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_BOTH_EN_BYTE	/;"	d	file:
QSPI_CMD1_CS_POL_INACTIVE0	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_CS_POL_INACTIVE0	/;"	d	file:
QSPI_CMD1_CS_SEL_MASK	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_CS_SEL_MASK	/;"	d	file:
QSPI_CMD1_CS_SEL_SHIFT	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_CS_SEL_SHIFT	/;"	d	file:
QSPI_CMD1_CS_SW_HW	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_CS_SW_HW	/;"	d	file:
QSPI_CMD1_CS_SW_VAL	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_CS_SW_VAL	/;"	d	file:
QSPI_CMD1_GO	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_GO	/;"	d	file:
QSPI_CMD1_IDLE_SDA_MASK	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_IDLE_SDA_MASK	/;"	d	file:
QSPI_CMD1_IDLE_SDA_SHIFT	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_IDLE_SDA_SHIFT	/;"	d	file:
QSPI_CMD1_LSBI_FE	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_LSBI_FE	/;"	d	file:
QSPI_CMD1_LSBY_FE	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_LSBY_FE	/;"	d	file:
QSPI_CMD1_MODE_MASK	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_MODE_MASK	/;"	d	file:
QSPI_CMD1_MODE_SHIFT	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_MODE_SHIFT	/;"	d	file:
QSPI_CMD1_M_S	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_M_S	/;"	d	file:
QSPI_CMD1_PACKED	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_PACKED	/;"	d	file:
QSPI_CMD1_RX_EN	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_RX_EN	/;"	d	file:
QSPI_CMD1_TX_EN	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD1_TX_EN	/;"	d	file:
QSPI_CMD2_RX_CLK_TAP_DELAY	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD2_RX_CLK_TAP_DELAY	/;"	d	file:
QSPI_CMD2_RX_CLK_TAP_DELAY_MASK	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD2_RX_CLK_TAP_DELAY_MASK	/;"	d	file:
QSPI_CMD2_TX_CLK_TAP_DELAY	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD2_TX_CLK_TAP_DELAY	/;"	d	file:
QSPI_CMD2_TX_CLK_TAP_DELAY_MASK	drivers/spi/tegra210_qspi.c	/^#define QSPI_CMD2_TX_CLK_TAP_DELAY_MASK	/;"	d	file:
QSPI_CMD_BE_4K	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_BE_4K	/;"	d	file:
QSPI_CMD_BRRD	drivers/spi/fsl_qspi.c	/^#define	QSPI_CMD_BRRD	/;"	d	file:
QSPI_CMD_BRWR	drivers/spi/fsl_qspi.c	/^#define	QSPI_CMD_BRWR	/;"	d	file:
QSPI_CMD_CHIP_ERASE	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_CHIP_ERASE	/;"	d	file:
QSPI_CMD_FAST_READ	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_FAST_READ	/;"	d	file:
QSPI_CMD_FAST_READ_4B	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_FAST_READ_4B	/;"	d	file:
QSPI_CMD_PP	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_PP	/;"	d	file:
QSPI_CMD_PP_4B	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_PP_4B	/;"	d	file:
QSPI_CMD_RDAR	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_RDAR	/;"	d	file:
QSPI_CMD_RDEAR	drivers/spi/fsl_qspi.c	/^#define	QSPI_CMD_RDEAR	/;"	d	file:
QSPI_CMD_RDID	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_RDID	/;"	d	file:
QSPI_CMD_RDSR	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_RDSR	/;"	d	file:
QSPI_CMD_READ	drivers/spi/ti_qspi.c	/^#define QSPI_CMD_READ /;"	d	file:
QSPI_CMD_READ_DUAL	drivers/spi/ti_qspi.c	/^#define QSPI_CMD_READ_DUAL	/;"	d	file:
QSPI_CMD_READ_FAST	drivers/spi/ti_qspi.c	/^#define QSPI_CMD_READ_FAST /;"	d	file:
QSPI_CMD_READ_QUAD	drivers/spi/ti_qspi.c	/^#define QSPI_CMD_READ_QUAD /;"	d	file:
QSPI_CMD_SE	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_SE	/;"	d	file:
QSPI_CMD_SE_4B	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_SE_4B	/;"	d	file:
QSPI_CMD_WRAR	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_WRAR	/;"	d	file:
QSPI_CMD_WREAR	drivers/spi/fsl_qspi.c	/^#define	QSPI_CMD_WREAR	/;"	d	file:
QSPI_CMD_WREN	drivers/spi/fsl_qspi.c	/^#define QSPI_CMD_WREN	/;"	d	file:
QSPI_CMD_WRITE	drivers/spi/ti_qspi.c	/^#define QSPI_CMD_WRITE /;"	d	file:
QSPI_CSPOL	drivers/spi/ti_qspi.c	/^#define QSPI_CSPOL(/;"	d	file:
QSPI_CS_CLK_PAD	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	QSPI_CS_CLK_PAD,$/;"	e	enum:periph_id
QSPI_DD	drivers/spi/ti_qspi.c	/^#define QSPI_DD(/;"	d	file:
QSPI_DRA7XX_FCLK	drivers/spi/ti_qspi.c	/^#define QSPI_DRA7XX_FCLK /;"	d	file:
QSPI_EN_CS	drivers/spi/ti_qspi.c	/^#define QSPI_EN_CS(/;"	d	file:
QSPI_FCLK	drivers/spi/ti_qspi.c	/^#define QSPI_FCLK	/;"	d	file:
QSPI_FIFO_STS_CS_INACTIVE	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_CS_INACTIVE	/;"	d	file:
QSPI_FIFO_STS_ERR	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_ERR	/;"	d	file:
QSPI_FIFO_STS_FRAME_END	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_FRAME_END	/;"	d	file:
QSPI_FIFO_STS_RX_FIFO_EMPTY	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_RX_FIFO_EMPTY	/;"	d	file:
QSPI_FIFO_STS_RX_FIFO_FLUSH	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_RX_FIFO_FLUSH	/;"	d	file:
QSPI_FIFO_STS_RX_FIFO_FULL	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_RX_FIFO_FULL	/;"	d	file:
QSPI_FIFO_STS_RX_FIFO_OVF	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_RX_FIFO_OVF	/;"	d	file:
QSPI_FIFO_STS_RX_FIFO_UNR	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_RX_FIFO_UNR	/;"	d	file:
QSPI_FIFO_STS_TX_FIFO_EMPTY	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_TX_FIFO_EMPTY	/;"	d	file:
QSPI_FIFO_STS_TX_FIFO_FLUSH	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_TX_FIFO_FLUSH	/;"	d	file:
QSPI_FIFO_STS_TX_FIFO_FULL	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_TX_FIFO_FULL	/;"	d	file:
QSPI_FIFO_STS_TX_FIFO_OVF	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_TX_FIFO_OVF	/;"	d	file:
QSPI_FIFO_STS_TX_FIFO_UNR	drivers/spi/tegra210_qspi.c	/^#define QSPI_FIFO_STS_TX_FIFO_UNR	/;"	d	file:
QSPI_FLAG_REGMAP_ENDIAN_BIG	drivers/spi/fsl_qspi.c	/^#define QSPI_FLAG_REGMAP_ENDIAN_BIG	/;"	d	file:
QSPI_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define QSPI_FREQ /;"	d
QSPI_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define QSPI_FREQ /;"	d
QSPI_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define QSPI_FREQ /;"	d
QSPI_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define QSPI_FREQ /;"	d
QSPI_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define QSPI_FREQ /;"	d
QSPI_INVAL	drivers/spi/ti_qspi.c	/^#define QSPI_INVAL /;"	d	file:
QSPI_IPCR_SEQID_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_IPCR_SEQID_MASK	/;"	d
QSPI_IPCR_SEQID_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_IPCR_SEQID_SHIFT	/;"	d
QSPI_LCKCR_LOCK	drivers/spi/fsl_qspi.h	/^#define QSPI_LCKCR_LOCK	/;"	d
QSPI_LCKCR_UNLOCK	drivers/spi/fsl_qspi.h	/^#define QSPI_LCKCR_UNLOCK	/;"	d
QSPI_MCR_CLR_RXF_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_CLR_RXF_MASK	/;"	d
QSPI_MCR_CLR_RXF_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_CLR_RXF_SHIFT	/;"	d
QSPI_MCR_CLR_TXF_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_CLR_TXF_MASK	/;"	d
QSPI_MCR_CLR_TXF_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_CLR_TXF_SHIFT	/;"	d
QSPI_MCR_DDR_EN_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_DDR_EN_MASK	/;"	d
QSPI_MCR_DDR_EN_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_DDR_EN_SHIFT	/;"	d
QSPI_MCR_END_CFD_LE	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_END_CFD_LE	/;"	d
QSPI_MCR_END_CFD_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_END_CFD_MASK	/;"	d
QSPI_MCR_END_CFD_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_END_CFD_SHIFT	/;"	d
QSPI_MCR_MDIS_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_MDIS_MASK	/;"	d
QSPI_MCR_MDIS_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_MDIS_SHIFT	/;"	d
QSPI_MCR_RESERVED_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_RESERVED_MASK	/;"	d
QSPI_MCR_RESERVED_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_RESERVED_SHIFT	/;"	d
QSPI_MCR_SWRSTHD_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_SWRSTHD_MASK	/;"	d
QSPI_MCR_SWRSTHD_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_SWRSTHD_SHIFT	/;"	d
QSPI_MCR_SWRSTSD_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_SWRSTSD_MASK	/;"	d
QSPI_MCR_SWRSTSD_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_MCR_SWRSTSD_SHIFT	/;"	d
QSPI_MODE_24BIT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config QSPI_MODE_24BIT$/;"	c	choice:choice5ba020940104
QSPI_MODE_24BIT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define QSPI_MODE_24BIT	/;"	d
QSPI_MODE_32BIT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config QSPI_MODE_32BIT$/;"	c	choice:choice5ba020940104
QSPI_MODE_32BIT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define QSPI_MODE_32BIT	/;"	d
QSPI_MSTP917	board/renesas/blanche/blanche.c	/^#define QSPI_MSTP917	/;"	d	file:
QSPI_NUM_DUMMY_BITS	drivers/spi/ti_qspi.c	/^#define QSPI_NUM_DUMMY_BITS /;"	d	file:
QSPI_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define QSPI_PAD_CTRL	/;"	d	file:
QSPI_PAD_CTRL1	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define QSPI_PAD_CTRL1	/;"	d	file:
QSPI_PAD_CTRL1	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define QSPI_PAD_CTRL1	/;"	d	file:
QSPI_PAD_CTRL1	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define QSPI_PAD_CTRL1	/;"	d	file:
QSPI_QAR_ADDR	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QAR_ADDR(/;"	d
QSPI_QAR_ADDR_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QAR_ADDR_MASK	/;"	d
QSPI_QAR_CMD	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QAR_CMD	/;"	d
QSPI_QAR_RECV	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QAR_RECV	/;"	d
QSPI_QAR_TRANS	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QAR_TRANS	/;"	d
QSPI_QDLYR_DTL	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDLYR_DTL(/;"	d
QSPI_QDLYR_DTL_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDLYR_DTL_MASK	/;"	d
QSPI_QDLYR_QCD	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDLYR_QCD(/;"	d
QSPI_QDLYR_QCD_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDLYR_QCD_MASK	/;"	d
QSPI_QDLYR_SPE	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDLYR_SPE	/;"	d
QSPI_QDR_BITSE	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_BITSE	/;"	d
QSPI_QDR_CONT	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_CONT	/;"	d
QSPI_QDR_DSCK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_DSCK	/;"	d
QSPI_QDR_DT	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_DT	/;"	d
QSPI_QDR_QSPI_CS0	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_QSPI_CS0	/;"	d
QSPI_QDR_QSPI_CS1	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_QSPI_CS1	/;"	d
QSPI_QDR_QSPI_CS2	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_QSPI_CS2	/;"	d
QSPI_QDR_QSPI_CS3	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QDR_QSPI_CS3	/;"	d
QSPI_QIR_ABRT	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_ABRT	/;"	d
QSPI_QIR_ABRTB	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_ABRTB	/;"	d
QSPI_QIR_ABRTE	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_ABRTE	/;"	d
QSPI_QIR_ABRTL	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_ABRTL	/;"	d
QSPI_QIR_SPIF	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_SPIF	/;"	d
QSPI_QIR_SPIFE	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_SPIFE	/;"	d
QSPI_QIR_WCEF	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_WCEF	/;"	d
QSPI_QIR_WCEFB	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_WCEFB	/;"	d
QSPI_QIR_WCEFE	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QIR_WCEFE	/;"	d
QSPI_QMR_BAUD	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BAUD(/;"	d
QSPI_QMR_BAUD_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BAUD_MASK	/;"	d
QSPI_QMR_BITS	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS(/;"	d
QSPI_QMR_BITS_10	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_10	/;"	d
QSPI_QMR_BITS_11	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_11	/;"	d
QSPI_QMR_BITS_12	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_12	/;"	d
QSPI_QMR_BITS_13	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_13	/;"	d
QSPI_QMR_BITS_14	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_14	/;"	d
QSPI_QMR_BITS_15	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_15	/;"	d
QSPI_QMR_BITS_16	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_16	/;"	d
QSPI_QMR_BITS_8	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_8	/;"	d
QSPI_QMR_BITS_9	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_9	/;"	d
QSPI_QMR_BITS_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_BITS_MASK	/;"	d
QSPI_QMR_CPHA	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_CPHA	/;"	d
QSPI_QMR_CPOL	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_CPOL	/;"	d
QSPI_QMR_DOHIE	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_DOHIE	/;"	d
QSPI_QMR_MSTR	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QMR_MSTR	/;"	d
QSPI_QWR_CPTQP	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_CPTQP(/;"	d
QSPI_QWR_CPTQP_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_CPTQP_MASK	/;"	d
QSPI_QWR_CSIV	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_CSIV	/;"	d
QSPI_QWR_ENDQP	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_ENDQP(/;"	d
QSPI_QWR_ENDQP_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_ENDQP_MASK	/;"	d
QSPI_QWR_HALT	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_HALT	/;"	d
QSPI_QWR_NEWQP	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_NEWQP(/;"	d
QSPI_QWR_NEWQP_MASK	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_NEWQP_MASK	/;"	d
QSPI_QWR_WREN	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_WREN	/;"	d
QSPI_QWR_WRTO	arch/m68k/include/asm/coldfire/qspi.h	/^#define QSPI_QWR_WRTO	/;"	d
QSPI_RBCT_RXBRD_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_RBCT_RXBRD_SHIFT	/;"	d
QSPI_RBCT_RXBRD_USEIPS	drivers/spi/fsl_qspi.h	/^#define QSPI_RBCT_RXBRD_USEIPS	/;"	d
QSPI_RBSR_RDBFL_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_RBSR_RDBFL_MASK	/;"	d
QSPI_RBSR_RDBFL_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_RBSR_RDBFL_SHIFT	/;"	d
QSPI_RD_QUAD	drivers/spi/ti_qspi.c	/^#define QSPI_RD_QUAD /;"	d	file:
QSPI_RD_SNGL	drivers/spi/ti_qspi.c	/^#define QSPI_RD_SNGL /;"	d	file:
QSPI_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define QSPI_RESET	/;"	d
QSPI_SETUP0_NUM_A_BYTES	drivers/spi/ti_qspi.c	/^#define QSPI_SETUP0_NUM_A_BYTES /;"	d	file:
QSPI_SETUP0_NUM_D_BYTES_8_BITS	drivers/spi/ti_qspi.c	/^#define QSPI_SETUP0_NUM_D_BYTES_8_BITS /;"	d	file:
QSPI_SETUP0_NUM_D_BYTES_NO_BITS	drivers/spi/ti_qspi.c	/^#define QSPI_SETUP0_NUM_D_BYTES_NO_BITS /;"	d	file:
QSPI_SETUP0_READ_DUAL	drivers/spi/ti_qspi.c	/^#define QSPI_SETUP0_READ_DUAL /;"	d	file:
QSPI_SETUP0_READ_NORMAL	drivers/spi/ti_qspi.c	/^#define QSPI_SETUP0_READ_NORMAL /;"	d	file:
QSPI_SETUP0_READ_QUAD	drivers/spi/ti_qspi.c	/^#define QSPI_SETUP0_READ_QUAD /;"	d	file:
QSPI_SMPR_DDRSMP_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_DDRSMP_MASK	/;"	d
QSPI_SMPR_DDRSMP_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_DDRSMP_SHIFT	/;"	d
QSPI_SMPR_FSDLY_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_FSDLY_MASK	/;"	d
QSPI_SMPR_FSDLY_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_FSDLY_SHIFT	/;"	d
QSPI_SMPR_FSPHS_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_FSPHS_MASK	/;"	d
QSPI_SMPR_FSPHS_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_FSPHS_SHIFT	/;"	d
QSPI_SMPR_HSENA_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_HSENA_MASK	/;"	d
QSPI_SMPR_HSENA_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_SMPR_HSENA_SHIFT	/;"	d
QSPI_SR_BUSY_MASK	drivers/spi/fsl_qspi.h	/^#define QSPI_SR_BUSY_MASK	/;"	d
QSPI_SR_BUSY_SHIFT	drivers/spi/fsl_qspi.h	/^#define QSPI_SR_BUSY_SHIFT	/;"	d
QSPI_TIMEOUT	drivers/spi/tegra210_qspi.c	/^#define QSPI_TIMEOUT	/;"	d	file:
QSPI_TIMEOUT	drivers/spi/ti_qspi.c	/^#define QSPI_TIMEOUT /;"	d	file:
QSPI_WC	drivers/spi/ti_qspi.c	/^#define QSPI_WC /;"	d	file:
QSPI_WC_BUSY	drivers/spi/ti_qspi.c	/^#define QSPI_WC_BUSY /;"	d	file:
QSPI_WLEN	drivers/spi/ti_qspi.c	/^#define QSPI_WLEN(/;"	d	file:
QSPI_WLEN_MASK	drivers/spi/ti_qspi.c	/^#define QSPI_WLEN_MASK	/;"	d	file:
QSPI_WLEN_MAX_BITS	drivers/spi/ti_qspi.c	/^#define QSPI_WLEN_MAX_BITS	/;"	d	file:
QSPI_WLEN_MAX_BYTES	drivers/spi/ti_qspi.c	/^#define QSPI_WLEN_MAX_BYTES	/;"	d	file:
QSPI_WR_SNGL	drivers/spi/ti_qspi.c	/^#define QSPI_WR_SNGL /;"	d	file:
QSPI_XFER_DONE	drivers/spi/ti_qspi.c	/^#define QSPI_XFER_DONE /;"	d	file:
QSPI_XFER_STS_RDY	drivers/spi/tegra210_qspi.c	/^#define QSPI_XFER_STS_RDY	/;"	d	file:
QSTB_QHE_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK,$/;"	e	enum:__anona3077f190103	file:
QSTB_QHE_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK, CC50_STATE28_MARK,$/;"	e	enum:__anona307901d0103	file:
QSTB_QHE_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QSTB_QHE_MARK,$/;"	e	enum:__anona307945e0103	file:
QSTH_QHS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK,$/;"	e	enum:__anona3077f190103	file:
QSTH_QHS_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QSTH_QHS_MARK,$/;"	e	enum:__anona307945e0103	file:
QSTVA_QVS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,$/;"	e	enum:__anona3077f190103	file:
QSTVA_QVS_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QSTVA_QVS_MARK,$/;"	e	enum:__anona307945e0103	file:
QSTVB_QVE_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,$/;"	e	enum:__anona3077f190103	file:
QSTVB_QVE_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	QSTVB_QVE_MARK,$/;"	e	enum:__anona307945e0103	file:
QTKNBKT_DEF_VAL	drivers/net/mvgbe.h	/^#define QTKNBKT_DEF_VAL	/;"	d
QTKNRT_DEF_VAL	drivers/net/mvgbe.h	/^#define QTKNRT_DEF_VAL	/;"	d
QT_BUFFER_CNT	drivers/usb/host/ehci.h	/^#define QT_BUFFER_CNT	/;"	d
QT_NEXT_TERMINATE	drivers/usb/host/ehci.h	/^#define	QT_NEXT_TERMINATE	/;"	d
QT_TOKEN_CERR	drivers/usb/host/ehci.h	/^#define QT_TOKEN_CERR(/;"	d
QT_TOKEN_CPAGE	drivers/usb/host/ehci.h	/^#define QT_TOKEN_CPAGE(/;"	d
QT_TOKEN_DT	drivers/usb/host/ehci.h	/^#define QT_TOKEN_DT(/;"	d
QT_TOKEN_GET_DT	drivers/usb/host/ehci.h	/^#define QT_TOKEN_GET_DT(/;"	d
QT_TOKEN_GET_STATUS	drivers/usb/host/ehci.h	/^#define QT_TOKEN_GET_STATUS(/;"	d
QT_TOKEN_GET_TOTALBYTES	drivers/usb/host/ehci.h	/^#define QT_TOKEN_GET_TOTALBYTES(/;"	d
QT_TOKEN_IOC	drivers/usb/host/ehci.h	/^#define QT_TOKEN_IOC(/;"	d
QT_TOKEN_PID	drivers/usb/host/ehci.h	/^#define QT_TOKEN_PID(/;"	d
QT_TOKEN_PID_IN	drivers/usb/host/ehci.h	/^#define QT_TOKEN_PID_IN	/;"	d
QT_TOKEN_PID_OUT	drivers/usb/host/ehci.h	/^#define QT_TOKEN_PID_OUT	/;"	d
QT_TOKEN_PID_SETUP	drivers/usb/host/ehci.h	/^#define QT_TOKEN_PID_SETUP	/;"	d
QT_TOKEN_STATUS	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS(/;"	d
QT_TOKEN_STATUS_ACTIVE	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_ACTIVE	/;"	d
QT_TOKEN_STATUS_BABBLEDET	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_BABBLEDET	/;"	d
QT_TOKEN_STATUS_DATBUFERR	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_DATBUFERR	/;"	d
QT_TOKEN_STATUS_HALTED	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_HALTED	/;"	d
QT_TOKEN_STATUS_MISSEDUFRAME	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_MISSEDUFRAME	/;"	d
QT_TOKEN_STATUS_PERR	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_PERR	/;"	d
QT_TOKEN_STATUS_SPLITXSTATE	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_SPLITXSTATE	/;"	d
QT_TOKEN_STATUS_XACTERR	drivers/usb/host/ehci.h	/^#define QT_TOKEN_STATUS_XACTERR	/;"	d
QT_TOKEN_TOTALBYTES	drivers/usb/host/ehci.h	/^#define QT_TOKEN_TOTALBYTES(/;"	d
QUADSPI0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define QUADSPI0_BASE_ADDR	/;"	d
QUADSPI_ISR_ILLEGAL_ERASE	drivers/mtd/altera_qspi.c	/^#define QUADSPI_ISR_ILLEGAL_ERASE	/;"	d	file:
QUADSPI_ISR_ILLEGAL_WRITE	drivers/mtd/altera_qspi.c	/^#define QUADSPI_ISR_ILLEGAL_WRITE	/;"	d	file:
QUADSPI_MEM_OP_BULK_ERASE	drivers/mtd/altera_qspi.c	/^#define QUADSPI_MEM_OP_BULK_ERASE	/;"	d	file:
QUADSPI_MEM_OP_SECTOR_ERASE	drivers/mtd/altera_qspi.c	/^#define QUADSPI_MEM_OP_SECTOR_ERASE	/;"	d	file:
QUADSPI_MEM_OP_SECTOR_PROTECT	drivers/mtd/altera_qspi.c	/^#define QUADSPI_MEM_OP_SECTOR_PROTECT	/;"	d	file:
QUADSPI_SR_BP0	drivers/mtd/altera_qspi.c	/^#define QUADSPI_SR_BP0	/;"	d	file:
QUADSPI_SR_BP1	drivers/mtd/altera_qspi.c	/^#define QUADSPI_SR_BP1	/;"	d	file:
QUADSPI_SR_BP2	drivers/mtd/altera_qspi.c	/^#define QUADSPI_SR_BP2	/;"	d	file:
QUADSPI_SR_BP2_0	drivers/mtd/altera_qspi.c	/^#define QUADSPI_SR_BP2_0	/;"	d	file:
QUADSPI_SR_BP3	drivers/mtd/altera_qspi.c	/^#define QUADSPI_SR_BP3	/;"	d	file:
QUADSPI_SR_TB	drivers/mtd/altera_qspi.c	/^#define QUADSPI_SR_TB	/;"	d	file:
QUARK_DEV_20	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_DEV_20	/;"	d
QUARK_DEV_21	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_DEV_21	/;"	d
QUARK_DEV_23	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_DEV_23	/;"	d
QUARK_EMAC0	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_EMAC0	/;"	d
QUARK_EMAC0_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_EMAC0_FUNC	/;"	d
QUARK_EMAC1	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_EMAC1	/;"	d
QUARK_EMAC1_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_EMAC1_FUNC	/;"	d
QUARK_HOST_BRIDGE	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_HOST_BRIDGE	/;"	d
QUARK_HOST_BRIDGE_DEV	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_HOST_BRIDGE_DEV	/;"	d
QUARK_HOST_BRIDGE_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_HOST_BRIDGE_FUNC	/;"	d
QUARK_I2C_GPIO	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_I2C_GPIO	/;"	d
QUARK_I2C_GPIO_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_I2C_GPIO_FUNC	/;"	d
QUARK_LEGACY_BRIDGE	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_LEGACY_BRIDGE	/;"	d
QUARK_LGC_BRIDGE_DEV	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_LGC_BRIDGE_DEV	/;"	d
QUARK_LGC_BRIDGE_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_LGC_BRIDGE_FUNC	/;"	d
QUARK_MMC_SDIO	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_MMC_SDIO	/;"	d
QUARK_MMC_SDIO_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_MMC_SDIO_FUNC	/;"	d
QUARK_PCIE0	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_PCIE0	/;"	d
QUARK_PCIE0_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_PCIE0_FUNC	/;"	d
QUARK_PCIE1	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_PCIE1	/;"	d
QUARK_PCIE1_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_PCIE1_FUNC	/;"	d
QUARK_SPI0	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_SPI0	/;"	d
QUARK_SPI0_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_SPI0_FUNC	/;"	d
QUARK_SPI1	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_SPI1	/;"	d
QUARK_SPI1_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_SPI1_FUNC	/;"	d
QUARK_UART0	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_UART0	/;"	d
QUARK_UART0_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_UART0_FUNC	/;"	d
QUARK_UART1	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_UART1	/;"	d
QUARK_UART1_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_UART1_FUNC	/;"	d
QUARK_USB_DEVICE	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_USB_DEVICE	/;"	d
QUARK_USB_DEVICE_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_USB_DEVICE_FUNC	/;"	d
QUARK_USB_EHCI	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_USB_EHCI	/;"	d
QUARK_USB_EHCI_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_USB_EHCI_FUNC	/;"	d
QUARK_USB_OHCI	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_USB_OHCI	/;"	d
QUARK_USB_OHCI_FUNC	arch/x86/include/asm/arch-quark/device.h	/^#define QUARK_USB_OHCI_FUNC	/;"	d
QUEST	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE	include/gt64120.h	/^#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE	/;"	d
QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE	include/gt64120.h	/^#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE	/;"	d
QUEUE_CONTROL_REGISTER_CPU_SIDE	include/gt64120.h	/^#define QUEUE_CONTROL_REGISTER_CPU_SIDE	/;"	d
QUEUE_CONTROL_REGISTER_PCI_SIDE	include/gt64120.h	/^#define QUEUE_CONTROL_REGISTER_PCI_SIDE	/;"	d
QUEUE_LENGTH_1	board/micronas/vct/ebi.h	/^#define QUEUE_LENGTH_1	/;"	d
QUEUE_LENGTH_2	board/micronas/vct/ebi.h	/^#define QUEUE_LENGTH_2	/;"	d
QUEUE_LENGTH_3	board/micronas/vct/ebi.h	/^#define QUEUE_LENGTH_3	/;"	d
QUEUE_LENGTH_4	board/micronas/vct/ebi.h	/^#define QUEUE_LENGTH_4	/;"	d
QUIET_FLAG	arch/x86/include/asm/bootparam.h	/^#define QUIET_FLAG	/;"	d
QUIRK_DUP_POR	drivers/input/i8042.c	/^	QUIRK_DUP_POR	= 1 << 0,$/;"	e	enum:__anondc7a779a0103	file:
QVGA	drivers/video/da8xx-fb.h	/^	QVGA = 0,$/;"	e	enum:panel_type
Q_0	arch/arm/lib/uldivmod.S	/^Q_0	.req	r0$/;"	l
Q_1	arch/arm/lib/uldivmod.S	/^Q_1	.req	r1$/;"	l
Quad	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^typedef Word		Quad [4] ;$/;"	t	typeref:typename:Word[4]
Quad	include/SA-1100.h	/^typedef Word		Quad [4] ;$/;"	t	typeref:typename:Word[4]
R	arch/x86/cpu/quark/smc.h	/^	R	\/* RIGHT RDQS *\/$/;"	e	enum:__anone34d010a0203
R	lib/sha1.c	/^#define R(/;"	d	file:
R	lib/sha256.c	/^#define R(/;"	d	file:
R0	arch/blackfin/cpu/cache.S	/^	R0 = R0 & R2;$/;"	d
R0	arch/blackfin/cpu/start.S	/^	R0 = CCEN | 0x30;$/;"	d
R0	arch/blackfin/lib/__kgdb.S	/^	R0 = 0;$/;"	d
R0	arch/blackfin/lib/__kgdb.S	/^	R0 = 1;$/;"	d
R0	arch/blackfin/lib/memcmp.S	/^	R0 = 0;$/;"	d
R0	arch/blackfin/lib/memcmp.S	/^	R0 = B[P0++](Z);	\/* *s1 *\/$/;"	d
R0	arch/blackfin/lib/memcmp.S	/^	R0 = R0 - R1;$/;"	d
R0	arch/blackfin/lib/memcmp.S	/^	R0 = [P0++];$/;"	d
R0	arch/blackfin/lib/memcpy.S	/^	R0 = 0x3;$/;"	d
R0	arch/blackfin/lib/memcpy.S	/^	R0 = R1;	\/* Save src address for return *\/$/;"	d
R0	arch/blackfin/lib/memcpy.S	/^	R0 = R1;	\/* save src for later. *\/$/;"	d
R0	arch/blackfin/lib/memcpy.S	/^	R0 = R1;	\/* setup src address for return *\/$/;"	d
R0	arch/blackfin/lib/memcpy.S	/^	R0 = R1;$/;"	d
R0	arch/blackfin/lib/memset.S	/^	R0 = 4;$/;"	d
R0	arch/blackfin/lib/memset.S	/^	R0 = P0;		    \/* Recover return address *\/$/;"	d
R0	arch/blackfin/lib/memset.S	/^	R0 = R0 - R2;$/;"	d
R0	arch/blackfin/lib/outs.S	/^		R0 = B[P1++];$/;"	d
R0	arch/blackfin/lib/outs.S	/^		R0 = R0 + R1;$/;"	d
R0	arch/blackfin/lib/outs.S	/^		R0 = R0 << 8;$/;"	d
R0SIZE	arch/arm/mach-exynos/include/mach/tzpc.h	/^#define R0SIZE	/;"	d
R0_CHK_FLAG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define R0_CHK_FLAG	/;"	d
R1	arch/blackfin/cpu/cache.S	/^	R1 = R1 & R2;$/;"	d
R1	arch/blackfin/lib/memcmp.S	/^	R1 = B[P3++](Z);	\/* *s2 *\/$/;"	d
R1	arch/blackfin/lib/memcmp.S	/^	R1 = R1 | R0;		\/* OR addresses together *\/$/;"	d
R1	arch/blackfin/lib/memcmp.S	/^	R1 = [I0++];$/;"	d
R1	arch/blackfin/lib/memcpy.S	/^	R1 = B[P1++] (X);$/;"	d
R1	arch/blackfin/lib/memcpy.S	/^	R1 = B[P1--] (X);$/;"	d
R1	arch/blackfin/lib/memmove.S	/^	R1 = B[P3--] (Z);$/;"	d
R1	arch/blackfin/lib/memmove.S	/^	R1 = [I0++];$/;"	d
R1	arch/blackfin/lib/memset.S	/^	R1 = R1.B (Z);         \/* R1 = fill char *\/$/;"	d
R10KCBARRIER	arch/mips/include/asm/asm.h	/^#define R10KCBARRIER(/;"	d
R10K_CONF_CT	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_CT	/;"	d
R10K_CONF_DC	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_DC	/;"	d
R10K_CONF_DN	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_DN	/;"	d
R10K_CONF_EC	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_EC	/;"	d
R10K_CONF_IC	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_IC	/;"	d
R10K_CONF_PE	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_PE	/;"	d
R10K_CONF_PM	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_PM	/;"	d
R10K_CONF_SB	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_SB	/;"	d
R10K_CONF_SC	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_SC	/;"	d
R10K_CONF_SK	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_SK	/;"	d
R10K_CONF_SS	arch/mips/include/asm/mipsregs.h	/^#define R10K_CONF_SS	/;"	d
R10K_DIAG_D_BRC	arch/mips/include/asm/mipsregs.h	/^#define R10K_DIAG_D_BRC	/;"	d
R10K_DIAG_D_BTAC	arch/mips/include/asm/mipsregs.h	/^#define R10K_DIAG_D_BTAC	/;"	d
R10K_DIAG_E_GHIST	arch/mips/include/asm/mipsregs.h	/^#define R10K_DIAG_E_GHIST	/;"	d
R14	arch/microblaze/include/asm/asm.h	/^#define R14(/;"	d
R17	arch/microblaze/include/asm/asm.h	/^#define R17(/;"	d
R1_APP_CMD	include/mmc.h	/^#define R1_APP_CMD	/;"	d
R1_ILLEGAL_COMMAND	include/mmc.h	/^#define R1_ILLEGAL_COMMAND	/;"	d
R1_SPI_ADDRESS	drivers/mmc/mmc_spi.c	/^#define R1_SPI_ADDRESS	/;"	d	file:
R1_SPI_COM_CRC	drivers/mmc/mmc_spi.c	/^#define R1_SPI_COM_CRC	/;"	d	file:
R1_SPI_ERASE_RESET	drivers/mmc/mmc_spi.c	/^#define R1_SPI_ERASE_RESET	/;"	d	file:
R1_SPI_ERASE_SEQ	drivers/mmc/mmc_spi.c	/^#define R1_SPI_ERASE_SEQ	/;"	d	file:
R1_SPI_ERROR	drivers/mmc/mmc_spi.c	/^#define R1_SPI_ERROR	/;"	d	file:
R1_SPI_IDLE	drivers/mmc/mmc_spi.c	/^#define R1_SPI_IDLE	/;"	d	file:
R1_SPI_ILLEGAL_COMMAND	drivers/mmc/mmc_spi.c	/^#define R1_SPI_ILLEGAL_COMMAND	/;"	d	file:
R1_SPI_PARAMETER	drivers/mmc/mmc_spi.c	/^#define R1_SPI_PARAMETER	/;"	d	file:
R2	arch/blackfin/cpu/cache.S	/^	R2 = -L1_CACHE_BYTES;$/;"	d
R2	arch/blackfin/cpu/cache.S	/^	R2 = R1 - R0;$/;"	d
R2	arch/blackfin/lib/memcmp.S	/^	R2 = R2 & R3;		\/* remainder *\/$/;"	d
R2	arch/blackfin/lib/memmove.S	/^	R2 = R2 & R3;             \/* remainder *\/$/;"	d
R2	arch/blackfin/lib/memset.S	/^	R2 =  3;$/;"	d
R2	arch/blackfin/lib/memset.S	/^	R2 = R0 & R2;          \/* addr bottom two bits *\/$/;"	d
R2	arch/blackfin/lib/memset.S	/^	R2 = R1 <<  8;         \/* create quad filler *\/$/;"	d
R2	arch/blackfin/lib/memset.S	/^	R2 = R2 - R3;           \/* bytes left *\/$/;"	d
R2	arch/blackfin/lib/memset.S	/^	R2 = R3;                \/* end point *\/$/;"	d
R200_FP_SOURCE_SEL_CRTC1	include/radeon.h	/^#define R200_FP_SOURCE_SEL_CRTC1	/;"	d
R200_FP_SOURCE_SEL_CRTC2	include/radeon.h	/^#define R200_FP_SOURCE_SEL_CRTC2	/;"	d
R200_FP_SOURCE_SEL_MASK	include/radeon.h	/^#define R200_FP_SOURCE_SEL_MASK	/;"	d
R200_FP_SOURCE_SEL_RMX	include/radeon.h	/^#define R200_FP_SOURCE_SEL_RMX	/;"	d
R200_FP_SOURCE_SEL_TRANS	include/radeon.h	/^#define R200_FP_SOURCE_SEL_TRANS	/;"	d
R200_SURF_TILE_COLOR_MACRO	include/radeon.h	/^#define R200_SURF_TILE_COLOR_MACRO	/;"	d
R2R_SHARING	arch/x86/cpu/quark/smc.h	/^#define R2R_SHARING$/;"	d
R3	arch/blackfin/lib/memcmp.S	/^	R3 =  3;$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = 0x3;$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = B[P1++] (X);$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = R1 + R2;$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = R1 | R0;$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = R2 & R3;$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = R3 & R0;$/;"	d
R3	arch/blackfin/lib/memcpy.S	/^	R3 = [I1++];$/;"	d
R3	arch/blackfin/lib/memmove.S	/^	R3 =  3;$/;"	d
R3	arch/blackfin/lib/memmove.S	/^	R3 = 11;$/;"	d
R3	arch/blackfin/lib/memmove.S	/^	R3 = R1 + R2;$/;"	d
R3	arch/blackfin/lib/memmove.S	/^	R3 = R1 | R0;             \/* OR addresses together *\/$/;"	d
R3	arch/blackfin/lib/memset.S	/^	R3 = P0;                \/* current position *\/$/;"	d
R3	arch/blackfin/lib/memset.S	/^	R3 = R0 + R2;          \/* end          *\/$/;"	d
R300_MEM_NUM_CHANNELS_MASK	include/radeon.h	/^#define R300_MEM_NUM_CHANNELS_MASK	/;"	d
R300_MEM_USE_CD_CH_ONLY	include/radeon.h	/^#define R300_MEM_USE_CD_CH_ONLY	/;"	d
R300_PPLL_REF_DIV_ACC_MASK	include/radeon.h	/^#define R300_PPLL_REF_DIV_ACC_MASK	/;"	d
R300_PPLL_REF_DIV_ACC_SHIFT	include/radeon.h	/^#define R300_PPLL_REF_DIV_ACC_SHIFT	/;"	d
R30XX_CONF_AC	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_AC	/;"	d
R30XX_CONF_DBR	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_DBR	/;"	d
R30XX_CONF_FDM	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_FDM	/;"	d
R30XX_CONF_FPINT	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_FPINT	/;"	d
R30XX_CONF_HALT	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_HALT	/;"	d
R30XX_CONF_LOCK	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_LOCK	/;"	d
R30XX_CONF_REV	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_REV	/;"	d
R30XX_CONF_RF	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_RF	/;"	d
R30XX_CONF_SB	arch/mips/include/asm/mipsregs.h	/^#define R30XX_CONF_SB	/;"	d
R3K_ENTRYLO_D	arch/mips/include/asm/mipsregs.h	/^#define R3K_ENTRYLO_D	/;"	d
R3K_ENTRYLO_G	arch/mips/include/asm/mipsregs.h	/^#define R3K_ENTRYLO_G	/;"	d
R3K_ENTRYLO_N	arch/mips/include/asm/mipsregs.h	/^#define R3K_ENTRYLO_N	/;"	d
R3K_ENTRYLO_V	arch/mips/include/asm/mipsregs.h	/^#define R3K_ENTRYLO_V	/;"	d
R4K_CONF_SB	arch/mips/include/asm/mipsregs.h	/^#define R4K_CONF_SB	/;"	d
R4K_CONF_SS	arch/mips/include/asm/mipsregs.h	/^#define R4K_CONF_SS	/;"	d
R4K_CONF_SW	arch/mips/include/asm/mipsregs.h	/^#define R4K_CONF_SW	/;"	d
R4_CTI_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define R4_CTI_BASE_ADDR /;"	d
R4_DBG_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define R4_DBG_BASE_ADDR /;"	d
R4_ETM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define R4_ETM_BASE_ADDR /;"	d
R5K_CONF_SE	arch/mips/include/asm/mipsregs.h	/^#define R5K_CONF_SE	/;"	d
R5K_CONF_SS	arch/mips/include/asm/mipsregs.h	/^#define R5K_CONF_SS	/;"	d
R5K_PAGE_INVALIDATE_S	arch/mips/include/asm/cacheops.h	/^#define R5K_PAGE_INVALIDATE_S	/;"	d
R64CNT	arch/sh/include/asm/cpu_sh7750.h	/^#define R64CNT	/;"	d
R64CNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	R64CNT	/;"	d
R7	arch/blackfin/cpu/interrupt.S	/^	R7  = LC0;$/;"	d
R7	arch/blackfin/cpu/interrupt.S	/^	R7  = LC1;$/;"	d
R8152_BASE_NAME	drivers/usb/eth/r8152.h	/^#define R8152_BASE_NAME	/;"	d
R8152_WAIT_TIMEOUT	drivers/usb/eth/r8152.h	/^#define R8152_WAIT_TIMEOUT	/;"	d
R8A66597_BFRE	drivers/usb/host/r8a66597.h	/^#define	R8A66597_BFRE	/;"	d
R8A66597_BUF_BSIZE	drivers/usb/host/r8a66597.h	/^#define R8A66597_BUF_BSIZE	/;"	d
R8A66597_BULK	drivers/usb/host/r8a66597.h	/^#define	  R8A66597_BULK	/;"	d
R8A66597_CNTMD	drivers/usb/host/r8a66597.h	/^#define	R8A66597_CNTMD	/;"	d
R8A66597_DBLB	drivers/usb/host/r8a66597.h	/^#define	R8A66597_DBLB	/;"	d
R8A66597_DIR	drivers/usb/host/r8a66597.h	/^#define	R8A66597_DIR	/;"	d
R8A66597_DPRINT	drivers/usb/host/r8a66597-hcd.c	/^#define R8A66597_DPRINT	/;"	d	file:
R8A66597_DPRINT	drivers/usb/host/r8a66597-hcd.c	/^#define R8A66597_DPRINT(/;"	d	file:
R8A66597_EPNUM	drivers/usb/host/r8a66597.h	/^#define	R8A66597_EPNUM	/;"	d
R8A66597_INT	drivers/usb/host/r8a66597.h	/^#define	  R8A66597_INT	/;"	d
R8A66597_ISO	drivers/usb/host/r8a66597.h	/^#define	  R8A66597_ISO	/;"	d
R8A66597_MAX_DEVICE	drivers/usb/host/r8a66597.h	/^#define R8A66597_MAX_DEVICE	/;"	d
R8A66597_MAX_NUM_PIPE	drivers/usb/host/r8a66597.h	/^#define R8A66597_MAX_NUM_PIPE	/;"	d
R8A66597_MAX_ROOT_HUB	drivers/usb/host/r8a66597.h	/^#define R8A66597_MAX_ROOT_HUB	/;"	d
R8A66597_MAX_SAMPLING	drivers/usb/host/r8a66597.h	/^#define R8A66597_MAX_SAMPLING	/;"	d
R8A66597_RH_POLL_TIME	drivers/usb/host/r8a66597.h	/^#define R8A66597_RH_POLL_TIME	/;"	d
R8A66597_SHTNAK	drivers/usb/host/r8a66597.h	/^#define	R8A66597_SHTNAK	/;"	d
R8A66597_TYP	drivers/usb/host/r8a66597.h	/^#define	R8A66597_TYP	/;"	d
R8A7790_CUT_ES2X	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define R8A7790_CUT_ES2X	/;"	d
R8A7791_CUT_ES2X	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define R8A7791_CUT_ES2X	/;"	d
R8A7793_CUT_ES2X	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define R8A7793_CUT_ES2X	/;"	d
R8A7794_CUT_ES2	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define R8A7794_CUT_ES2	/;"	d
R8A7794_ETHERNET_B	board/renesas/alt/Kconfig	/^config R8A7794_ETHERNET_B$/;"	c
R8A7795	arch/arm/mach-rmobile/Kconfig.64	/^config R8A7795$/;"	c
RADEON_BUFFER_ALIGN	drivers/video/ati_radeon_fb.c	/^#define RADEON_BUFFER_ALIGN	/;"	d	file:
RADEON_CRT_PITCH	drivers/video/ati_radeon_fb.c	/^#define RADEON_CRT_PITCH(/;"	d	file:
RADEON_REGSIZE	include/radeon.h	/^#define RADEON_REGSIZE	/;"	d
RADIONOR_devices	cmd/ambapp.c	/^static ambapp_device_name RADIONOR_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
RADVA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RADVA(/;"	d
RADVN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RADVN(/;"	d
RAF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RAF	/;"	d
RAF_BCREJ	drivers/net/xilinx_ll_temac.h	/^#define RAF_BCREJ	/;"	d
RAF_EMFE	drivers/net/xilinx_ll_temac.h	/^#define RAF_EMFE	/;"	d
RAF_HTRST	drivers/net/xilinx_ll_temac.h	/^#define RAF_HTRST	/;"	d
RAF_MCREJ	drivers/net/xilinx_ll_temac.h	/^#define RAF_MCREJ	/;"	d
RAF_NFE	drivers/net/xilinx_ll_temac.h	/^#define RAF_NFE	/;"	d
RAF_RVSTM_MASK	drivers/net/xilinx_ll_temac.h	/^#define RAF_RVSTM_MASK	/;"	d
RAF_RVSTM_POS	drivers/net/xilinx_ll_temac.h	/^#define RAF_RVSTM_POS	/;"	d
RAF_RVTM_MASK	drivers/net/xilinx_ll_temac.h	/^#define RAF_RVTM_MASK	/;"	d
RAF_RVTM_POS	drivers/net/xilinx_ll_temac.h	/^#define RAF_RVTM_POS	/;"	d
RAF_SR	drivers/net/xilinx_ll_temac.h	/^#define RAF_SR	/;"	d
RAF_TVSTM_MASK	drivers/net/xilinx_ll_temac.h	/^#define RAF_TVSTM_MASK	/;"	d
RAF_TVSTM_POS	drivers/net/xilinx_ll_temac.h	/^#define RAF_TVSTM_POS	/;"	d
RAF_TVTM_MASK	drivers/net/xilinx_ll_temac.h	/^#define RAF_TVTM_MASK	/;"	d
RAF_TVTM_POS	drivers/net/xilinx_ll_temac.h	/^#define RAF_TVTM_POS	/;"	d
RAL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RAL	/;"	d
RAM	drivers/ram/Kconfig	/^config RAM$/;"	c
RAMBASE	arch/x86/Kconfig	/^config RAMBASE$/;"	c	menu:x86 architecture
RAMCR	arch/sh/include/asm/cpu_sh7722.h	/^#define RAMCR	/;"	d
RAMCR	arch/sh/include/asm/cpu_sh7723.h	/^#define RAMCR	/;"	d
RAMCR	arch/sh/include/asm/cpu_sh7724.h	/^#define RAMCR	/;"	d
RAMCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RAMCR	/;"	d
RAMCR	arch/sh/include/asm/cpu_sh7785.h	/^#define	RAMCR	/;"	d
RAMCR_A	board/espt/lowlevel_init.S	/^RAMCR_A:	.long	0xFF000074$/;"	l
RAMCR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^RAMCR_A:	.long	0xFF000074$/;"	l
RAMCR_D	board/espt/lowlevel_init.S	/^RAMCR_D:	.long	0x00000200$/;"	l
RAMCR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^RAMCR_D:	.long	0x00000200$/;"	l
RAMDISKFILE	include/configs/T104xRDB.h	/^#define RAMDISKFILE	/;"	d
RAMDISK_ADDR	include/configs/uniphier.h	/^#define RAMDISK_ADDR	/;"	d
RAMDISK_ADDR_R	include/configs/sunxi-common.h	/^#define RAMDISK_ADDR_R	/;"	d
RAMDISK_ADDR_R	include/configs/sunxi-common.h	/^#define RAMDISK_ADDR_R /;"	d
RAMDISK_FLAGS	arch/sh/include/asm/zimage.h	/^#define RAMDISK_FLAGS	/;"	d
RAMDISK_IMAGE_START_MASK	arch/sparc/lib/bootm.c	/^#define RAMDISK_IMAGE_START_MASK	/;"	d	file:
RAMDISK_IMAGE_START_MASK	arch/x86/include/asm/bootparam.h	/^#define RAMDISK_IMAGE_START_MASK	/;"	d
RAMDISK_LOAD_FLAG	arch/sparc/cpu/leon2/prom.c	/^#define RAMDISK_LOAD_FLAG /;"	d	file:
RAMDISK_LOAD_FLAG	arch/sparc/cpu/leon3/prom.c	/^#define RAMDISK_LOAD_FLAG /;"	d	file:
RAMDISK_LOAD_FLAG	arch/sparc/lib/bootm.c	/^#define RAMDISK_LOAD_FLAG	/;"	d	file:
RAMDISK_LOAD_FLAG	arch/x86/include/asm/bootparam.h	/^#define RAMDISK_LOAD_FLAG	/;"	d
RAMDISK_PROMPT_FLAG	arch/sparc/lib/bootm.c	/^#define RAMDISK_PROMPT_FLAG	/;"	d	file:
RAMDISK_PROMPT_FLAG	arch/x86/include/asm/bootparam.h	/^#define RAMDISK_PROMPT_FLAG	/;"	d
RAMENV	include/configs/microblaze-generic.h	/^#define	RAMENV	/;"	d
RAMSIZE_128	arch/arm/include/asm/arch-omap3/cpu.h	/^#define RAMSIZE_128	/;"	d
RAM_CODE_MASK	arch/arm/include/asm/arch-tegra/apb_misc.h	/^#define RAM_CODE_MASK	/;"	d
RAM_CODE_SHIFT	arch/arm/include/asm/arch-tegra/apb_misc.h	/^#define RAM_CODE_SHIFT	/;"	d
RAM_DDR2_32	board/gdsys/405ep/dlvision-10g.c	/^	RAM_DDR2_32 = 1,$/;"	e	enum:__anon678ede200503	file:
RAM_DDR2_32	board/gdsys/405ep/iocon.c	/^	RAM_DDR2_32 = 0,$/;"	e	enum:__anon023d8a7b0703	file:
RAM_DDR2_32	board/gdsys/common/ioep-fpga.c	/^	RAM_DDR2_32 = 0,$/;"	e	enum:__anoneadcbf560603	file:
RAM_DDR2_64	board/gdsys/405ep/dlvision-10g.c	/^	RAM_DDR2_64 = 2,$/;"	e	enum:__anon678ede200503	file:
RAM_DDR3_32	board/gdsys/405ep/iocon.c	/^	RAM_DDR3_32 = 1,$/;"	e	enum:__anon023d8a7b0703	file:
RAM_DDR3_32	board/gdsys/common/ioep-fpga.c	/^	RAM_DDR3_32 = 1,$/;"	e	enum:__anoneadcbf560603	file:
RAM_DDR3_48	board/gdsys/common/ioep-fpga.c	/^	RAM_DDR3_48 = 2,$/;"	e	enum:__anoneadcbf560603	file:
RAM_IN_BANK_0	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define RAM_IN_BANK_0 /;"	d
RAM_IN_BANK_1	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define RAM_IN_BANK_1 /;"	d
RAM_IN_BANK_2	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define RAM_IN_BANK_2 /;"	d
RAM_IN_BANK_3	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define RAM_IN_BANK_3 /;"	d
RAM_NONE	board/gdsys/405ep/dlvision-10g.c	/^	RAM_NONE = 0,$/;"	e	enum:__anon678ede200503	file:
RAM_REPAIR_REQ	arch/arm/include/asm/arch-tegra124/flow.h	/^	RAM_REPAIR_REQ = 0x1 << 0,$/;"	e	enum:__anon97e6e8d60103
RAM_REPAIR_STS	arch/arm/include/asm/arch-tegra124/flow.h	/^	RAM_REPAIR_STS = 0x1 << 1,$/;"	e	enum:__anon97e6e8d60103
RAND_MAX	include/common.h	/^#define RAND_MAX /;"	d
RANGE	drivers/power/regulator/sandbox.c	/^#define RANGE(/;"	d	file:
RANGES_PER_FIXED_MTRR	arch/x86/include/asm/mtrr.h	/^#define RANGES_PER_FIXED_MTRR	/;"	d
RANGE_LIST_IO_ISA	arch/x86/include/asm/mpspec.h	/^#define RANGE_LIST_IO_ISA	/;"	d
RANGE_LIST_IO_VGA	arch/x86/include/asm/mpspec.h	/^#define RANGE_LIST_IO_VGA	/;"	d
RANK0_ODT_WRITE_SEL	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define RANK0_ODT_WRITE_SEL	/;"	d
RANK0_ODT_WRITE_SEL	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RANK0_ODT_WRITE_SEL		= 1 << 3,$/;"	e	enum:__anon957231910203	file:
RANK1_ODT_WRITE_SEL	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define RANK1_ODT_WRITE_SEL	/;"	d
RANK1_ODT_WRITE_SEL	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RANK1_ODT_WRITE_SEL		= 1 << 11,$/;"	e	enum:__anon957231910203	file:
RANK_BLOCKS_TR	arch/arm/mach-uniphier/dram/umc-ld11.c	/^#define RANK_BLOCKS_TR	/;"	d	file:
RANK_CTRL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RANK_CTRL_REG	/;"	d
RARP	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
RARPOP_REPLY	include/net.h	/^#   define RARPOP_REPLY	/;"	d
RARPOP_REQUEST	include/net.h	/^#   define RARPOP_REQUEST /;"	d
RAR_IDX	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define RAR_IDX(/;"	d	file:
RAR_SUCCESS	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define RAR_SUCCESS(/;"	d	file:
RAR_VB	drivers/net/fsl-mc/dpio/qbman_portal.c	/^#define RAR_VB(/;"	d	file:
RASTER_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RASTER_BASE	/;"	d
RASTER_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RASTER_OFFSET	/;"	d
RASWIDTH_13BITS	arch/arm/include/asm/arch-omap3/cpu.h	/^#define RASWIDTH_13BITS	/;"	d
RATE_32000HZ	drivers/rtc/rs5c372.c	/^#define RATE_32000HZ	/;"	d	file:
RATE_32768HZ	drivers/rtc/rs5c372.c	/^#define RATE_32768HZ	/;"	d	file:
RATE_LIMIT_INTERVAL	net/link_local.c	/^	RATE_LIMIT_INTERVAL = 60,$/;"	e	enum:__anonc9befdc40103	file:
RATE_LIMIT_PROBE	net/link_local.c	/^	RATE_LIMIT_PROBE,$/;"	e	enum:ll_state_t	file:
RATE_MASK	drivers/gpio/s5p_gpio.c	/^#define RATE_MASK(/;"	d	file:
RATE_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RATE_PHY_REG	/;"	d
RATE_SET	drivers/gpio/s5p_gpio.c	/^#define RATE_SET(/;"	d	file:
RATE_TO_DIV	drivers/clk/rockchip/clk_rk3036.c	/^#define RATE_TO_DIV(/;"	d	file:
RATE_TO_DIV	drivers/clk/rockchip/clk_rk3288.c	/^#define RATE_TO_DIV(/;"	d	file:
RATE_TO_DIV	drivers/clk/rockchip/clk_rk3399.c	/^#define RATE_TO_DIV(/;"	d	file:
RAWCLK_FREQ_MASK	drivers/video/i915_reg.h	/^#define  RAWCLK_FREQ_MASK /;"	d
RB2D_DC_BUSY	include/radeon.h	/^#define RB2D_DC_BUSY	/;"	d
RB2D_DC_FLUSH	include/radeon.h	/^#define RB2D_DC_FLUSH	/;"	d
RB2D_DC_FLUSH_ALL	include/radeon.h	/^#define RB2D_DC_FLUSH_ALL	/;"	d
RB2D_DSTCACHE_CTLSTAT	include/radeon.h	/^#define RB2D_DSTCACHE_CTLSTAT	/;"	d
RB2D_DSTCACHE_MODE	include/radeon.h	/^#define RB2D_DSTCACHE_MODE	/;"	d
RB3D_CNTL	include/radeon.h	/^#define RB3D_CNTL	/;"	d
RBBM_CMDFIFO_ADDR	include/radeon.h	/^#define RBBM_CMDFIFO_ADDR	/;"	d
RBBM_CMDFIFO_DATAH	include/radeon.h	/^#define RBBM_CMDFIFO_DATAH	/;"	d
RBBM_CMDFIFO_DATAL	include/radeon.h	/^#define RBBM_CMDFIFO_DATAL	/;"	d
RBBM_CMDFIFO_STAT	include/radeon.h	/^#define RBBM_CMDFIFO_STAT	/;"	d
RBBM_CNTL	include/radeon.h	/^#define RBBM_CNTL	/;"	d
RBBM_CNTL_alt_1	include/radeon.h	/^#define RBBM_CNTL_alt_1	/;"	d
RBBM_DEBUG	include/radeon.h	/^#define RBBM_DEBUG	/;"	d
RBBM_GUICNTL	include/radeon.h	/^#define RBBM_GUICNTL	/;"	d
RBBM_SOFT_RESET	include/radeon.h	/^#define RBBM_SOFT_RESET	/;"	d
RBBM_SOFT_RESET_alt_1	include/radeon.h	/^#define RBBM_SOFT_RESET_alt_1	/;"	d
RBBM_STATUS	include/radeon.h	/^#define RBBM_STATUS	/;"	d
RBBM_STATUS_alt_1	include/radeon.h	/^#define RBBM_STATUS_alt_1	/;"	d
RBE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RBE	/;"	d
RBEA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RBEA(/;"	d
RBEN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RBEN(/;"	d
RBF_ADDR	drivers/net/at91_emac.c	/^#define RBF_ADDR /;"	d	file:
RBF_BROADCAST	drivers/net/at91_emac.c	/^#define RBF_BROADCAST /;"	d	file:
RBF_EXTERNAL	drivers/net/at91_emac.c	/^#define RBF_EXTERNAL /;"	d	file:
RBF_FRAMELEN	drivers/net/at91_emac.c	/^#define RBF_FRAMELEN /;"	d	file:
RBF_FRAMEMAX	drivers/net/at91_emac.c	/^#define RBF_FRAMEMAX /;"	d	file:
RBF_LOCAL1	drivers/net/at91_emac.c	/^#define RBF_LOCAL1 /;"	d	file:
RBF_LOCAL2	drivers/net/at91_emac.c	/^#define RBF_LOCAL2 /;"	d	file:
RBF_LOCAL3	drivers/net/at91_emac.c	/^#define RBF_LOCAL3 /;"	d	file:
RBF_LOCAL4	drivers/net/at91_emac.c	/^#define RBF_LOCAL4 /;"	d	file:
RBF_MULTICAST	drivers/net/at91_emac.c	/^#define RBF_MULTICAST /;"	d	file:
RBF_OWNER	drivers/net/at91_emac.c	/^#define RBF_OWNER /;"	d	file:
RBF_SIZE	drivers/net/at91_emac.c	/^#define RBF_SIZE /;"	d	file:
RBF_UNICAST	drivers/net/at91_emac.c	/^#define RBF_UNICAST /;"	d	file:
RBF_UNKNOWN	drivers/net/at91_emac.c	/^#define RBF_UNKNOWN /;"	d	file:
RBF_WRAP	drivers/net/at91_emac.c	/^#define RBF_WRAP /;"	d	file:
RBR	board/renesas/sh7752evb/spi-boot.c	/^#define RBR	/;"	d	file:
RBR	board/renesas/sh7753evb/spi-boot.c	/^#define RBR	/;"	d	file:
RBR	board/renesas/sh7757lcr/spi-boot.c	/^#define RBR	/;"	d	file:
RBSR_DEFAULT_VALUE	drivers/net/ftgmac100.c	/^#define RBSR_DEFAULT_VALUE	/;"	d	file:
RBSY	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define RBSY	/;"	d
RBWAR	drivers/net/sh_eth.h	/^	RBWAR,$/;"	e	enum:__anon5ef54f5a0103
RBWTCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define RBWTCNT /;"	d
RBWTCNT	arch/sh/include/asm/cpu_sh7723.h	/^#define RBWTCNT	/;"	d
RBWTCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define RBWTCNT	/;"	d
RB_BLACK	include/linux/rbtree_augmented.h	/^#define	RB_BLACK	/;"	d
RB_CLEAR_NODE	include/linux/rbtree.h	/^#define RB_CLEAR_NODE(/;"	d
RB_DECLARE_CALLBACKS	include/linux/rbtree_augmented.h	/^#define RB_DECLARE_CALLBACKS(/;"	d
RB_EMPTY_NODE	include/linux/rbtree.h	/^#define RB_EMPTY_NODE(/;"	d
RB_EMPTY_ROOT	include/linux/rbtree.h	/^#define RB_EMPTY_ROOT(/;"	d
RB_GPIO	drivers/mtd/nand/sunxi_nand.c	/^	RB_GPIO,$/;"	e	enum:sunxi_nand_rb_type	file:
RB_NATIVE	drivers/mtd/nand/sunxi_nand.c	/^	RB_NATIVE,$/;"	e	enum:sunxi_nand_rb_type	file:
RB_NONE	drivers/mtd/nand/sunxi_nand.c	/^	RB_NONE,$/;"	e	enum:sunxi_nand_rb_type	file:
RB_PIN_ENABLED	drivers/mtd/nand/denali.h	/^#define RB_PIN_ENABLED	/;"	d
RB_PIN_ENABLED__BANK0	drivers/mtd/nand/denali.h	/^#define     RB_PIN_ENABLED__BANK0	/;"	d
RB_PIN_ENABLED__BANK1	drivers/mtd/nand/denali.h	/^#define     RB_PIN_ENABLED__BANK1	/;"	d
RB_PIN_ENABLED__BANK2	drivers/mtd/nand/denali.h	/^#define     RB_PIN_ENABLED__BANK2	/;"	d
RB_PIN_ENABLED__BANK3	drivers/mtd/nand/denali.h	/^#define     RB_PIN_ENABLED__BANK3	/;"	d
RB_RED	include/linux/rbtree_augmented.h	/^#define	RB_RED	/;"	d
RB_ROOT	include/linux/rbtree.h	/^#define RB_ROOT	/;"	d
RB_USB2PHY_PU	drivers/phy/marvell/comphy_a3700.h	/^#define RB_USB2PHY_PU(/;"	d
RB_USB2PHY_SUSPM	drivers/phy/marvell/comphy_a3700.h	/^#define RB_USB2PHY_SUSPM(/;"	d
RC	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define RC	/;"	d
RC	arch/x86/include/asm/lpc_common.h	/^#define RC	/;"	d
RCAL_START	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define RCAL_START	/;"	d
RCAR_32	arch/arm/mach-rmobile/Kconfig	/^config RCAR_32$/;"	c	choice:choice886758210104
RCAR_GEN2_SDRAM_BASE	include/configs/alt.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/blanche.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/gose.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/koelsch.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/lager.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/porter.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/silk.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_BASE	include/configs/stout.h	/^#define RCAR_GEN2_SDRAM_BASE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/alt.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/blanche.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/gose.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/koelsch.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/lager.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/porter.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/silk.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_SDRAM_SIZE	include/configs/stout.h	/^#define RCAR_GEN2_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/alt.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/blanche.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/gose.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/koelsch.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/lager.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/porter.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/silk.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN2_UBOOT_SDRAM_SIZE	include/configs/stout.h	/^#define RCAR_GEN2_UBOOT_SDRAM_SIZE	/;"	d
RCAR_GEN3	arch/arm/mach-rmobile/Kconfig	/^config RCAR_GEN3$/;"	c	choice:choice886758210104
RCAR_GEN3_EXTRAM_BOOT	arch/arm/mach-rmobile/Kconfig.64	/^config RCAR_GEN3_EXTRAM_BOOT$/;"	c
RCAR_XTAL_CLK	include/configs/salvator-x.h	/^#define RCAR_XTAL_CLK	/;"	d
RCBA_BASE	arch/x86/cpu/quark/Kconfig	/^config RCBA_BASE$/;"	c
RCBA_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define RCBA_BASE_ADDRESS	/;"	d
RCBA_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define RCBA_BASE_ADDRESS	/;"	d
RCBA_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define RCBA_BASE_ADDRESS	/;"	d
RCBA_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define RCBA_BASE_SIZE	/;"	d
RCBA_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define RCBA_BASE_SIZE	/;"	d
RCBA_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define RCBA_BASE_SIZE	/;"	d
RCB_BASE_ADDRESS	arch/x86/include/asm/intel_regs.h	/^#define RCB_BASE_ADDRESS	/;"	d
RCB_REG	arch/x86/include/asm/intel_regs.h	/^#define RCB_REG(/;"	d
RCC_AHB1ENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB1ENR	/;"	d
RCC_AHB1LPENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB1LPENR	/;"	d
RCC_AHB1RSTR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB1RSTR	/;"	d
RCC_AHB2ENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB2ENR	/;"	d
RCC_AHB2LPENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB2LPENR	/;"	d
RCC_AHB2RSTR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB2RSTR	/;"	d
RCC_AHB3ENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB3ENR	/;"	d
RCC_AHB3LPENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB3LPENR	/;"	d
RCC_AHB3RSTR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_AHB3RSTR	/;"	d
RCC_APB1ENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB1ENR	/;"	d
RCC_APB1ENR_PWREN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB1ENR_PWREN	/;"	d
RCC_APB1ENR_PWREN	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_APB1ENR_PWREN	/;"	d	file:
RCC_APB1ENR_PWREN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_APB1ENR_PWREN	/;"	d	file:
RCC_APB1ENR_PWREN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_APB1ENR_PWREN	/;"	d	file:
RCC_APB1ENR_TIM2EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB1ENR_TIM2EN	/;"	d
RCC_APB1ENR_TIM2EN	arch/arm/mach-stm32/stm32f1/timer.c	/^#define RCC_APB1ENR_TIM2EN	/;"	d	file:
RCC_APB1ENR_TIM2EN	arch/arm/mach-stm32/stm32f4/timer.c	/^#define RCC_APB1ENR_TIM2EN	/;"	d	file:
RCC_APB1LPENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB1LPENR	/;"	d
RCC_APB1RSTR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB1RSTR	/;"	d
RCC_APB2ENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB2ENR	/;"	d
RCC_APB2LPENR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB2LPENR	/;"	d
RCC_APB2RSTR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_APB2RSTR	/;"	d
RCC_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define RCC_BASE	/;"	d
RCC_BDCR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_BDCR	/;"	d
RCC_CFGR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_CFGR	/;"	d
RCC_CFGR_AHB_PSC_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_AHB_PSC_MASK	/;"	d	file:
RCC_CFGR_AHB_PSC_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_AHB_PSC_MASK	/;"	d	file:
RCC_CFGR_AHB_PSC_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_AHB_PSC_MASK	/;"	d	file:
RCC_CFGR_APB1_PSC_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_APB1_PSC_MASK	/;"	d	file:
RCC_CFGR_APB1_PSC_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_APB1_PSC_MASK	/;"	d	file:
RCC_CFGR_APB1_PSC_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_APB1_PSC_MASK	/;"	d	file:
RCC_CFGR_APB2_PSC_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_APB2_PSC_MASK	/;"	d	file:
RCC_CFGR_APB2_PSC_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_APB2_PSC_MASK	/;"	d	file:
RCC_CFGR_APB2_PSC_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_APB2_PSC_MASK	/;"	d	file:
RCC_CFGR_HPRE_SHIFT	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_HPRE_SHIFT	/;"	d	file:
RCC_CFGR_HPRE_SHIFT	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_HPRE_SHIFT	/;"	d	file:
RCC_CFGR_HPRE_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_HPRE_SHIFT	/;"	d	file:
RCC_CFGR_PLLMUL_CFG	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_PLLMUL_CFG	/;"	d	file:
RCC_CFGR_PLLMUL_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_PLLMUL_MASK	/;"	d	file:
RCC_CFGR_PLLMUL_SHIFT	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_PLLMUL_SHIFT	/;"	d	file:
RCC_CFGR_PLLSRC_HSE	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_PLLSRC_HSE	/;"	d	file:
RCC_CFGR_PPRE1_SHIFT	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_PPRE1_SHIFT	/;"	d	file:
RCC_CFGR_PPRE1_SHIFT	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_PPRE1_SHIFT	/;"	d	file:
RCC_CFGR_PPRE1_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_PPRE1_SHIFT	/;"	d	file:
RCC_CFGR_PPRE2_SHIFT	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_PPRE2_SHIFT	/;"	d	file:
RCC_CFGR_PPRE2_SHIFT	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_PPRE2_SHIFT	/;"	d	file:
RCC_CFGR_PPRE2_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_PPRE2_SHIFT	/;"	d	file:
RCC_CFGR_SW0	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SW0	/;"	d	file:
RCC_CFGR_SW0	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SW0	/;"	d	file:
RCC_CFGR_SW0	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SW0	/;"	d	file:
RCC_CFGR_SW1	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SW1	/;"	d	file:
RCC_CFGR_SW1	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SW1	/;"	d	file:
RCC_CFGR_SW1	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SW1	/;"	d	file:
RCC_CFGR_SWS0	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SWS0	/;"	d	file:
RCC_CFGR_SWS0	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SWS0	/;"	d	file:
RCC_CFGR_SWS0	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SWS0	/;"	d	file:
RCC_CFGR_SWS1	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SWS1	/;"	d	file:
RCC_CFGR_SWS1	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SWS1	/;"	d	file:
RCC_CFGR_SWS1	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SWS1	/;"	d	file:
RCC_CFGR_SWS_HSE	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SWS_HSE	/;"	d	file:
RCC_CFGR_SWS_HSE	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SWS_HSE	/;"	d	file:
RCC_CFGR_SWS_HSE	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SWS_HSE	/;"	d	file:
RCC_CFGR_SWS_HSI	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SWS_HSI	/;"	d	file:
RCC_CFGR_SWS_HSI	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SWS_HSI	/;"	d	file:
RCC_CFGR_SWS_HSI	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SWS_HSI	/;"	d	file:
RCC_CFGR_SWS_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SWS_MASK	/;"	d	file:
RCC_CFGR_SWS_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SWS_MASK	/;"	d	file:
RCC_CFGR_SWS_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SWS_MASK	/;"	d	file:
RCC_CFGR_SWS_PLL	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SWS_PLL	/;"	d	file:
RCC_CFGR_SWS_PLL	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SWS_PLL	/;"	d	file:
RCC_CFGR_SWS_PLL	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SWS_PLL	/;"	d	file:
RCC_CFGR_SW_HSE	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SW_HSE	/;"	d	file:
RCC_CFGR_SW_HSE	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SW_HSE	/;"	d	file:
RCC_CFGR_SW_HSE	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SW_HSE	/;"	d	file:
RCC_CFGR_SW_HSI	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SW_HSI	/;"	d	file:
RCC_CFGR_SW_HSI	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SW_HSI	/;"	d	file:
RCC_CFGR_SW_HSI	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SW_HSI	/;"	d	file:
RCC_CFGR_SW_MASK	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SW_MASK	/;"	d	file:
RCC_CFGR_SW_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SW_MASK	/;"	d	file:
RCC_CFGR_SW_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SW_MASK	/;"	d	file:
RCC_CFGR_SW_PLL	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CFGR_SW_PLL	/;"	d	file:
RCC_CFGR_SW_PLL	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CFGR_SW_PLL	/;"	d	file:
RCC_CFGR_SW_PLL	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CFGR_SW_PLL	/;"	d	file:
RCC_CIR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_CIR	/;"	d
RCC_CR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_CR	/;"	d
RCC_CR_CSSON	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_CSSON	/;"	d	file:
RCC_CR_CSSON	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_CSSON	/;"	d	file:
RCC_CR_CSSON	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_CSSON	/;"	d	file:
RCC_CR_HSEBYP	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_HSEBYP	/;"	d	file:
RCC_CR_HSEBYP	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_HSEBYP	/;"	d	file:
RCC_CR_HSEBYP	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_HSEBYP	/;"	d	file:
RCC_CR_HSEON	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_HSEON	/;"	d	file:
RCC_CR_HSEON	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_HSEON	/;"	d	file:
RCC_CR_HSEON	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_HSEON	/;"	d	file:
RCC_CR_HSERDY	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_HSERDY	/;"	d	file:
RCC_CR_HSERDY	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_HSERDY	/;"	d	file:
RCC_CR_HSERDY	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_HSERDY	/;"	d	file:
RCC_CR_HSION	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_HSION	/;"	d	file:
RCC_CR_HSION	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_HSION	/;"	d	file:
RCC_CR_HSION	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_HSION	/;"	d	file:
RCC_CR_PLLON	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_PLLON	/;"	d	file:
RCC_CR_PLLON	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_PLLON	/;"	d	file:
RCC_CR_PLLON	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_PLLON	/;"	d	file:
RCC_CR_PLLRDY	arch/arm/mach-stm32/stm32f1/clock.c	/^#define RCC_CR_PLLRDY	/;"	d	file:
RCC_CR_PLLRDY	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_CR_PLLRDY	/;"	d	file:
RCC_CR_PLLRDY	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_CR_PLLRDY	/;"	d	file:
RCC_CSR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_CSR	/;"	d
RCC_DCKCFG1	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_DCKCFG1	/;"	d
RCC_DCKCFG2	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_DCKCFG2	/;"	d
RCC_ENR_FMC	board/st/stm32f746-disco/stm32f746-disco.c	/^#define RCC_ENR_FMC	/;"	d	file:
RCC_ENR_GPIO_A_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_A_EN	/;"	d
RCC_ENR_GPIO_A_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_A_EN	/;"	d	file:
RCC_ENR_GPIO_A_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_A_EN	/;"	d	file:
RCC_ENR_GPIO_B_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_B_EN	/;"	d
RCC_ENR_GPIO_B_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_B_EN	/;"	d	file:
RCC_ENR_GPIO_B_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_B_EN	/;"	d	file:
RCC_ENR_GPIO_C_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_C_EN	/;"	d
RCC_ENR_GPIO_C_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_C_EN	/;"	d	file:
RCC_ENR_GPIO_C_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_C_EN	/;"	d	file:
RCC_ENR_GPIO_D_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_D_EN	/;"	d
RCC_ENR_GPIO_D_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_D_EN	/;"	d	file:
RCC_ENR_GPIO_D_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_D_EN	/;"	d	file:
RCC_ENR_GPIO_E_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_E_EN	/;"	d
RCC_ENR_GPIO_E_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_E_EN	/;"	d	file:
RCC_ENR_GPIO_E_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_E_EN	/;"	d	file:
RCC_ENR_GPIO_F_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_F_EN	/;"	d
RCC_ENR_GPIO_F_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_F_EN	/;"	d	file:
RCC_ENR_GPIO_F_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_F_EN	/;"	d	file:
RCC_ENR_GPIO_G_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_G_EN	/;"	d
RCC_ENR_GPIO_G_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_G_EN	/;"	d	file:
RCC_ENR_GPIO_G_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_G_EN	/;"	d	file:
RCC_ENR_GPIO_H_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_H_EN	/;"	d
RCC_ENR_GPIO_H_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_H_EN	/;"	d	file:
RCC_ENR_GPIO_H_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_H_EN	/;"	d	file:
RCC_ENR_GPIO_I_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_I_EN	/;"	d
RCC_ENR_GPIO_I_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_I_EN	/;"	d	file:
RCC_ENR_GPIO_I_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_I_EN	/;"	d	file:
RCC_ENR_GPIO_J_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_J_EN	/;"	d
RCC_ENR_GPIO_J_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_J_EN	/;"	d	file:
RCC_ENR_GPIO_J_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_J_EN	/;"	d	file:
RCC_ENR_GPIO_K_EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_GPIO_K_EN	/;"	d
RCC_ENR_GPIO_K_EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_GPIO_K_EN	/;"	d	file:
RCC_ENR_GPIO_K_EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_GPIO_K_EN	/;"	d	file:
RCC_ENR_USART1EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_USART1EN	/;"	d
RCC_ENR_USART1EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_USART1EN	/;"	d	file:
RCC_ENR_USART1EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_USART1EN	/;"	d	file:
RCC_ENR_USART2EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_USART2EN	/;"	d
RCC_ENR_USART2EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_USART2EN	/;"	d	file:
RCC_ENR_USART2EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_USART2EN	/;"	d	file:
RCC_ENR_USART3EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_USART3EN	/;"	d
RCC_ENR_USART3EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_USART3EN	/;"	d	file:
RCC_ENR_USART3EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_USART3EN	/;"	d	file:
RCC_ENR_USART6EN	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_ENR_USART6EN	/;"	d
RCC_ENR_USART6EN	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_ENR_USART6EN	/;"	d	file:
RCC_ENR_USART6EN	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_ENR_USART6EN	/;"	d	file:
RCC_PLLCFGR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_PLLCFGR	/;"	d
RCC_PLLCFGR_PLLM_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLM_MASK	/;"	d	file:
RCC_PLLCFGR_PLLM_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLM_MASK	/;"	d	file:
RCC_PLLCFGR_PLLM_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLM_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLN_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLN_MASK	/;"	d	file:
RCC_PLLCFGR_PLLN_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLN_MASK	/;"	d	file:
RCC_PLLCFGR_PLLN_SHIFT	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLN_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLN_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLN_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLP_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLP_MASK	/;"	d	file:
RCC_PLLCFGR_PLLP_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLP_MASK	/;"	d	file:
RCC_PLLCFGR_PLLP_SHIFT	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLP_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLP_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLP_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLQ_MASK	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLQ_MASK	/;"	d	file:
RCC_PLLCFGR_PLLQ_MASK	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLQ_MASK	/;"	d	file:
RCC_PLLCFGR_PLLQ_SHIFT	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLQ_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLQ_SHIFT	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLQ_SHIFT	/;"	d	file:
RCC_PLLCFGR_PLLSRC	arch/arm/mach-stm32/stm32f4/clock.c	/^#define RCC_PLLCFGR_PLLSRC	/;"	d	file:
RCC_PLLCFGR_PLLSRC	arch/arm/mach-stm32/stm32f7/clock.c	/^#define RCC_PLLCFGR_PLLSRC	/;"	d	file:
RCC_PLLI2SCFGR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_PLLI2SCFGR	/;"	d
RCC_PLLSAICFG	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_PLLSAICFG	/;"	d
RCC_SSCGR	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define RCC_SSCGR	/;"	d
RCER_CRE	arch/powerpc/include/asm/immap_512x.h	/^#define RCER_CRE	/;"	d
RCER_CRE	include/mpc83xx.h	/^#define RCER_CRE	/;"	d
RCER_RES	arch/powerpc/include/asm/immap_512x.h	/^#define RCER_RES	/;"	d
RCER_RES	include/mpc83xx.h	/^#define RCER_RES	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m520x.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5227x.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5275.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5301x.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5329.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5441x.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_FRCRSTOUT	arch/m68k/include/asm/m5445x.h	/^#define RCM_RCR_FRCRSTOUT	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m520x.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m5227x.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m5275.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m5301x.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m5329.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m5441x.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RCR_SOFTRST	arch/m68k/include/asm/m5445x.h	/^#define RCM_RCR_SOFTRST	/;"	d
RCM_RSR_EXT	arch/m68k/include/asm/m520x.h	/^#define RCM_RSR_EXT	/;"	d
RCM_RSR_EXT	arch/m68k/include/asm/m5227x.h	/^#define RCM_RSR_EXT	/;"	d
RCM_RSR_EXT	arch/m68k/include/asm/m5301x.h	/^#define RCM_RSR_EXT	/;"	d
RCM_RSR_EXT	arch/m68k/include/asm/m5329.h	/^#define RCM_RSR_EXT	/;"	d
RCM_RSR_EXT	arch/m68k/include/asm/m5441x.h	/^#define RCM_RSR_EXT	/;"	d
RCM_RSR_EXT	arch/m68k/include/asm/m5445x.h	/^#define RCM_RSR_EXT	/;"	d
RCM_RSR_LOC	arch/m68k/include/asm/m5301x.h	/^#define RCM_RSR_LOC	/;"	d
RCM_RSR_LOC	arch/m68k/include/asm/m5441x.h	/^#define RCM_RSR_LOC	/;"	d
RCM_RSR_LOL	arch/m68k/include/asm/m520x.h	/^#define RCM_RSR_LOL	/;"	d
RCM_RSR_LOL	arch/m68k/include/asm/m5227x.h	/^#define RCM_RSR_LOL	/;"	d
RCM_RSR_LOL	arch/m68k/include/asm/m5301x.h	/^#define RCM_RSR_LOL	/;"	d
RCM_RSR_LOL	arch/m68k/include/asm/m5329.h	/^#define RCM_RSR_LOL	/;"	d
RCM_RSR_LOL	arch/m68k/include/asm/m5441x.h	/^#define RCM_RSR_LOL	/;"	d
RCM_RSR_LOL	arch/m68k/include/asm/m5445x.h	/^#define RCM_RSR_LOL	/;"	d
RCM_RSR_POR	arch/m68k/include/asm/m520x.h	/^#define RCM_RSR_POR	/;"	d
RCM_RSR_POR	arch/m68k/include/asm/m5227x.h	/^#define RCM_RSR_POR	/;"	d
RCM_RSR_POR	arch/m68k/include/asm/m5301x.h	/^#define RCM_RSR_POR	/;"	d
RCM_RSR_POR	arch/m68k/include/asm/m5329.h	/^#define RCM_RSR_POR	/;"	d
RCM_RSR_POR	arch/m68k/include/asm/m5441x.h	/^#define RCM_RSR_POR	/;"	d
RCM_RSR_POR	arch/m68k/include/asm/m5445x.h	/^#define RCM_RSR_POR	/;"	d
RCM_RSR_SOFT	arch/m68k/include/asm/m520x.h	/^#define RCM_RSR_SOFT	/;"	d
RCM_RSR_SOFT	arch/m68k/include/asm/m5227x.h	/^#define RCM_RSR_SOFT	/;"	d
RCM_RSR_SOFT	arch/m68k/include/asm/m5301x.h	/^#define RCM_RSR_SOFT	/;"	d
RCM_RSR_SOFT	arch/m68k/include/asm/m5329.h	/^#define RCM_RSR_SOFT	/;"	d
RCM_RSR_SOFT	arch/m68k/include/asm/m5441x.h	/^#define RCM_RSR_SOFT	/;"	d
RCM_RSR_SOFT	arch/m68k/include/asm/m5445x.h	/^#define RCM_RSR_SOFT	/;"	d
RCM_RSR_WDOG	arch/m68k/include/asm/m520x.h	/^#define RCM_RSR_WDOG	/;"	d
RCM_RSR_WDR_CORE	arch/m68k/include/asm/m520x.h	/^#define RCM_RSR_WDR_CORE	/;"	d
RCM_RSR_WDR_CORE	arch/m68k/include/asm/m5227x.h	/^#define RCM_RSR_WDR_CORE	/;"	d
RCM_RSR_WDR_CORE	arch/m68k/include/asm/m5301x.h	/^#define RCM_RSR_WDR_CORE	/;"	d
RCM_RSR_WDR_CORE	arch/m68k/include/asm/m5329.h	/^#define RCM_RSR_WDR_CORE	/;"	d
RCM_RSR_WDR_CORE	arch/m68k/include/asm/m5441x.h	/^#define RCM_RSR_WDR_CORE	/;"	d
RCM_RSR_WDR_CORE	arch/m68k/include/asm/m5445x.h	/^#define RCM_RSR_WDR_CORE	/;"	d
RCNR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RCNR	/;"	d
RCNR	include/SA-1100.h	/^#define RCNR	/;"	d
RCNT	drivers/usb/host/r8a66597.h	/^#define	RCNT	/;"	d
RCOMP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	RCOMP	/;"	d
RCOMP0	include/power/max17042_fg.h	/^#define RCOMP0	/;"	d
RCONF	board/amcc/makalu/cmd_pll.c	/^	RCONF,$/;"	e	enum:__anonc3f6b6150103	file:
RCPM_CLPCL10SETR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_CLPCL10SETR	/;"	d
RCPM_CLPCL10SETR_C0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_CLPCL10SETR_C0	/;"	d
RCPM_DSIMSKR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_DSIMSKR	/;"	d
RCPM_IPPDEXPCR0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR0	/;"	d
RCPM_IPPDEXPCR0_ETSEC	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR0_ETSEC	/;"	d
RCPM_IPPDEXPCR0_GPIO	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR0_GPIO	/;"	d
RCPM_IPPDEXPCR1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR1	/;"	d
RCPM_IPPDEXPCR1_FLEXTIMER	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR1_FLEXTIMER	/;"	d
RCPM_IPPDEXPCR1_LPUART	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR1_LPUART	/;"	d
RCPM_IPPDEXPCR1_OCRAM1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_IPPDEXPCR1_OCRAM1	/;"	d
RCPM_NFIQOUTR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_NFIQOUTR	/;"	d
RCPM_NIRQOUTR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_NIRQOUTR	/;"	d
RCPM_POWMGTCSR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_POWMGTCSR	/;"	d
RCPM_POWMGTCSR_LPM20_REQ	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_POWMGTCSR_LPM20_REQ	/;"	d
RCPM_POWMGTCSR_LPM20_ST	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_POWMGTCSR_LPM20_ST	/;"	d
RCPM_POWMGTCSR_P_LPM20_ST	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_POWMGTCSR_P_LPM20_ST	/;"	d
RCPM_POWMGTCSR_SERDES_PW	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCPM_POWMGTCSR_SERDES_PW	/;"	d
RCPM_TWAITSR	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define RCPM_TWAITSR	/;"	d	file:
RCR1	arch/sh/include/asm/cpu_sh7750.h	/^#define RCR1	/;"	d
RCR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	RCR1	/;"	d
RCR2	arch/sh/include/asm/cpu_sh7750.h	/^#define RCR2	/;"	d
RCR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	RCR2	/;"	d
RCR3	arch/sh/include/asm/cpu_sh7750.h	/^#define RCR3	/;"	d
RCR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	RCR3	/;"	d
RCR_AAP	drivers/usb/eth/r8152.h	/^#define RCR_AAP	/;"	d
RCR_AB	drivers/usb/eth/r8152.h	/^#define RCR_AB	/;"	d
RCR_ABORT_ENB	drivers/net/smc91111.h	/^#define	RCR_ABORT_ENB	/;"	d
RCR_ACPT_ALL	drivers/usb/eth/r8152.h	/^#define RCR_ACPT_ALL	/;"	d
RCR_ALL	drivers/net/dm9000x.h	/^#define RCR_ALL	/;"	d
RCR_ALMUL	drivers/net/smc91111.h	/^#define	RCR_ALMUL	/;"	d
RCR_AM	drivers/usb/eth/r8152.h	/^#define RCR_AM	/;"	d
RCR_APM	drivers/usb/eth/r8152.h	/^#define RCR_APM	/;"	d
RCR_CLEAR	drivers/net/smc91111.h	/^#define RCR_CLEAR	/;"	d
RCR_DEFAULT	drivers/net/smc91111.h	/^#define	RCR_DEFAULT	/;"	d
RCR_DIS_CRC	drivers/net/dm9000x.h	/^#define RCR_DIS_CRC	/;"	d
RCR_DIS_LONG	drivers/net/dm9000x.h	/^#define RCR_DIS_LONG	/;"	d
RCR_FILT_CAR	drivers/net/smc91111.h	/^#define	RCR_FILT_CAR	/;"	d
RCR_PRMS	drivers/net/smc91111.h	/^#define	RCR_PRMS	/;"	d
RCR_PRMSC	drivers/net/dm9000x.h	/^#define RCR_PRMSC	/;"	d
RCR_REG	drivers/net/smc91111.h	/^#define	RCR_REG	/;"	d
RCR_RES	arch/powerpc/include/asm/immap_512x.h	/^#define RCR_RES	/;"	d
RCR_RES	include/mpc83xx.h	/^#define RCR_RES	/;"	d
RCR_RUNT	drivers/net/dm9000x.h	/^#define RCR_RUNT	/;"	d
RCR_RXEN	drivers/net/dm9000x.h	/^#define RCR_RXEN	/;"	d
RCR_RXEN	drivers/net/smc91111.h	/^#define RCR_RXEN	/;"	d
RCR_RX_ABORT	drivers/net/smc91111.h	/^#define	RCR_RX_ABORT	/;"	d
RCR_SOFTRST	drivers/net/smc91111.h	/^#define RCR_SOFTRST	/;"	d
RCR_STRIP_CRC	drivers/net/smc91111.h	/^#define	RCR_STRIP_CRC	/;"	d
RCR_SWHR	arch/powerpc/include/asm/immap_512x.h	/^#define RCR_SWHR	/;"	d
RCR_SWHR	include/mpc83xx.h	/^#define RCR_SWHR	/;"	d
RCR_SWSR	arch/powerpc/include/asm/immap_512x.h	/^#define RCR_SWSR	/;"	d
RCR_SWSR	include/mpc83xx.h	/^#define RCR_SWSR	/;"	d
RCR_WTDIS	drivers/net/dm9000x.h	/^#define RCR_WTDIS	/;"	d
RCSA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RCSA(/;"	d
RCSN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RCSN(/;"	d
RCSR	arch/arm/cpu/sa1100/cpu.c	/^#define RCSR	/;"	d	file:
RCSR	arch/arm/cpu/sa1100/start.S	/^#define RCSR	/;"	d	file:
RCSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RCSR	/;"	d
RCSR	include/SA-1100.h	/^#define RCSR	/;"	d
RCSR_GPR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RCSR_GPR	/;"	d
RCSR_HWR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RCSR_HWR	/;"	d
RCSR_HWR	include/SA-1100.h	/^#define RCSR_HWR	/;"	d
RCSR_MEM_CTL_ATA	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_CTL_ATA	/;"	d	file:
RCSR_MEM_CTL_EXPANSION	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_CTL_EXPANSION	/;"	d	file:
RCSR_MEM_CTL_NAND	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_CTL_NAND	/;"	d	file:
RCSR_MEM_CTL_WEIM	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_CTL_WEIM	/;"	d	file:
RCSR_MEM_TYPE_I2C	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_TYPE_I2C	/;"	d	file:
RCSR_MEM_TYPE_NOR	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_TYPE_NOR	/;"	d	file:
RCSR_MEM_TYPE_ONENAND	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_TYPE_ONENAND	/;"	d	file:
RCSR_MEM_TYPE_SD	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_TYPE_SD	/;"	d	file:
RCSR_MEM_TYPE_SPI	arch/arm/cpu/arm1136/mx35/generic.c	/^#define RCSR_MEM_TYPE_SPI	/;"	d	file:
RCSR_SMR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RCSR_SMR	/;"	d
RCSR_SMR	include/SA-1100.h	/^#define RCSR_SMR	/;"	d
RCSR_SWR	include/SA-1100.h	/^#define RCSR_SWR	/;"	d
RCSR_WDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RCSR_WDR	/;"	d
RCSR_WDR	include/SA-1100.h	/^#define RCSR_WDR	/;"	d
RCS_FIND_IGNORE	Makefile	/^export RCS_FIND_IGNORE := \\( -name SCCS -o -name BitKeeper -o -name .svn -o    \\$/;"	m
RCS_TAR_IGNORE	Makefile	/^export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \\$/;"	m
RCTCL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RCTCL	/;"	d
RCTRL_BC_MPROM	include/fsl_dtsec.h	/^#define RCTRL_BC_MPROM	/;"	d
RCTRL_BC_REJ	include/fsl_dtsec.h	/^#define RCTRL_BC_REJ	/;"	d
RCTRL_CFA	include/fsl_dtsec.h	/^#define RCTRL_CFA	/;"	d
RCTRL_EMEN	include/fsl_dtsec.h	/^#define RCTRL_EMEN	/;"	d
RCTRL_GHTX	include/fsl_dtsec.h	/^#define RCTRL_GHTX	/;"	d
RCTRL_GRS	include/fsl_dtsec.h	/^#define RCTRL_GRS	/;"	d
RCTRL_INIT	drivers/net/fm/dtsec.c	/^#define RCTRL_INIT	/;"	d	file:
RCTRL_PAL_MASK	include/fsl_dtsec.h	/^#define RCTRL_PAL_MASK	/;"	d
RCTRL_PAL_SHIFT	include/fsl_dtsec.h	/^#define RCTRL_PAL_SHIFT	/;"	d
RCTRL_RSF	include/fsl_dtsec.h	/^#define RCTRL_RSF	/;"	d
RCTRL_RTSE	include/fsl_dtsec.h	/^#define RCTRL_RTSE	/;"	d
RCTRL_UPROM	include/fsl_dtsec.h	/^#define RCTRL_UPROM	/;"	d
RCU0_BCODE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_BCODE /;"	d
RCU0_CRCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_CRCTL /;"	d
RCU0_CRSTAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_CRSTAT /;"	d
RCU0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_CTL /;"	d
RCU0_SIDIS	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_SIDIS /;"	d
RCU0_SISTAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_SISTAT /;"	d
RCU0_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_STAT /;"	d
RCU0_SVECT0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_SVECT0 /;"	d
RCU0_SVECT1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_SVECT1 /;"	d
RCU0_SVECT_LCK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RCU0_SVECT_LCK /;"	d
RCVFLUSH	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCVFLUSH	/;"	d
RCVINTLEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCVINTLEN	/;"	d
RCVN	arch/x86/cpu/quark/mrc_util.h	/^	RCVN,$/;"	e	enum:__anon78bf36a60203
RCVR_EN	drivers/ddr/microchip/ddr2_regs.h	/^#define RCVR_EN	/;"	d
RCVSERV	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCVSERV	/;"	d
RCVSTAT	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCVSTAT	/;"	d
RCV_EMPTY	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCV_EMPTY	/;"	d
RCV_FULL	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCV_FULL	/;"	d
RCV_HALF	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RCV_HALF	/;"	d
RCV_SEL_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define RCV_SEL_SHIFT	/;"	d	file:
RCW0_PADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define RCW0_PADDR_MASK	/;"	d
RCW0_PADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define RCW0_PADDR_POS	/;"	d
RCW1_FCS	drivers/net/xilinx_ll_temac.h	/^#define RCW1_FCS	/;"	d
RCW1_HD	drivers/net/xilinx_ll_temac.h	/^#define RCW1_HD	/;"	d
RCW1_JUM	drivers/net/xilinx_ll_temac.h	/^#define RCW1_JUM	/;"	d
RCW1_LT_DIS	drivers/net/xilinx_ll_temac.h	/^#define RCW1_LT_DIS	/;"	d
RCW1_PADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define RCW1_PADDR_MASK	/;"	d
RCW1_PADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define RCW1_PADDR_POS	/;"	d
RCW1_RST	drivers/net/xilinx_ll_temac.h	/^#define RCW1_RST	/;"	d
RCW1_RX	drivers/net/xilinx_ll_temac.h	/^#define RCW1_RX	/;"	d
RCW1_VLAN	drivers/net/xilinx_ll_temac.h	/^#define RCW1_VLAN	/;"	d
RCWSR0_MEM_PLL_RAT_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCWSR0_MEM_PLL_RAT_MASK	/;"	d
RCWSR0_MEM_PLL_RAT_SHIFT	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCWSR0_MEM_PLL_RAT_SHIFT	/;"	d
RCWSR0_SYS_PLL_RAT_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCWSR0_SYS_PLL_RAT_MASK	/;"	d
RCWSR0_SYS_PLL_RAT_SHIFT	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCWSR0_SYS_PLL_RAT_SHIFT	/;"	d
RCWSR4_SRDS1_PRTCL_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCWSR4_SRDS1_PRTCL_MASK	/;"	d
RCWSR4_SRDS1_PRTCL_SHIFT	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCWSR4_SRDS1_PRTCL_SHIFT	/;"	d
RCW_BYTES	tools/pblimage.h	/^#define RCW_BYTES	/;"	d
RCW_HEADER	tools/pblimage.h	/^#define RCW_HEADER	/;"	d
RCW_PREAMBLE	tools/pblimage.h	/^#define RCW_PREAMBLE	/;"	d
RCW_SB_EN_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define RCW_SB_EN_MASK	/;"	d
RCW_SB_EN_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define RCW_SB_EN_MASK	/;"	d
RCW_SB_EN_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCW_SB_EN_MASK	/;"	d
RCW_SB_EN_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define RCW_SB_EN_MASK	/;"	d
RCW_SB_EN_REG_INDEX	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define RCW_SB_EN_REG_INDEX	/;"	d
RCW_SB_EN_REG_INDEX	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define RCW_SB_EN_REG_INDEX	/;"	d
RCW_SB_EN_REG_INDEX	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define RCW_SB_EN_REG_INDEX	/;"	d
RCW_SB_EN_REG_INDEX	arch/powerpc/include/asm/immap_85xx.h	/^#define RCW_SB_EN_REG_INDEX	/;"	d
RC_FAILURE	examples/standalone/sched.c	/^#define RC_FAILURE	/;"	d	file:
RC_INIT_SIZE	lib/lzma/LzmaDec.c	/^#define RC_INIT_SIZE /;"	d	file:
RC_SUCCESS	examples/standalone/sched.c	/^#define	RC_SUCCESS	/;"	d	file:
RD2WR	arch/arm/mach-sunxi/dram_sun9i.c	/^#define RD2WR /;"	d	file:
RDACCESSTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define RDACCESSTIME(/;"	d
RDAR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RDAR1	/;"	d
RDAR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RDAR2	/;"	d
RDATENDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define RDATENDLY(/;"	d
RDAYAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RDAYAR	/;"	d
RDAYAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RDAYAR	/;"	d
RDAYCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RDAYCNT /;"	d
RDAYCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RDAYCNT	/;"	d
RDBR_CORE	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define RDBR_CORE	/;"	d
RDBR_DMA	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define RDBR_DMA	/;"	d
RDCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RDCR	/;"	d
RDCYCLETIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define RDCYCLETIME(/;"	d
RDC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define RDC_BASE_ADDR /;"	d
RDC_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define RDC_BASE_ADDR /;"	d
RDC_DOMAIN	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_DOMAIN(/;"	d
RDC_DOMAIN_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_DOMAIN_MASK	/;"	d
RDC_DOMAIN_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_DOMAIN_SHIFT(/;"	d
RDC_DOMAIN_SHIFT_BASE	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_DOMAIN_SHIFT_BASE	/;"	d
RDC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define RDC_IPS_BASE_ADDR /;"	d
RDC_MASTER_CFG	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MASTER_CFG(/;"	d
RDC_MASTER_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MASTER_MASK	/;"	d
RDC_MASTER_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MASTER_SHIFT	/;"	d
RDC_MA_A7	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_A7 = 0,$/;"	e	enum:__anon19be98080203
RDC_MA_A9_L2CACHE	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_A9_L2CACHE = 0,$/;"	e	enum:__anonbeae406d0203
RDC_MA_APBHDMA	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_APBHDMA,$/;"	e	enum:__anonbeae406d0203
RDC_MA_APBHDMA	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_APBHDMA,$/;"	e	enum:__anon19be98080203
RDC_MA_CAAM	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_CAAM,$/;"	e	enum:__anonbeae406d0203
RDC_MA_CAAM	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_CAAM,$/;"	e	enum:__anon19be98080203
RDC_MA_CORESIGHT	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_CORESIGHT,$/;"	e	enum:__anon19be98080203
RDC_MA_CSI	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_CSI,$/;"	e	enum:__anon19be98080203
RDC_MA_CSI1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_CSI1,$/;"	e	enum:__anonbeae406d0203
RDC_MA_CSI2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_CSI2,$/;"	e	enum:__anonbeae406d0203
RDC_MA_DAP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_DAP,$/;"	e	enum:__anonbeae406d0203
RDC_MA_DAP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_DAP,$/;"	e	enum:__anon19be98080203
RDC_MA_DISPLAY_PORT	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_DISPLAY_PORT,$/;"	e	enum:__anon19be98080203
RDC_MA_ENET1_RX	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_ENET1_RX,$/;"	e	enum:__anonbeae406d0203
RDC_MA_ENET1_RX	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_ENET1_RX,$/;"	e	enum:__anon19be98080203
RDC_MA_ENET1_TX	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_ENET1_TX,$/;"	e	enum:__anonbeae406d0203
RDC_MA_ENET1_TX	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_ENET1_TX,$/;"	e	enum:__anon19be98080203
RDC_MA_ENET2_RX	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_ENET2_RX,$/;"	e	enum:__anonbeae406d0203
RDC_MA_ENET2_RX	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_ENET2_RX,$/;"	e	enum:__anon19be98080203
RDC_MA_ENET2_TX	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_ENET2_TX,$/;"	e	enum:__anonbeae406d0203
RDC_MA_ENET2_TX	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_ENET2_TX,$/;"	e	enum:__anon19be98080203
RDC_MA_EPDC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_EPDC,$/;"	e	enum:__anon19be98080203
RDC_MA_GPU	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_GPU,$/;"	e	enum:__anonbeae406d0203
RDC_MA_LCDIF	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_LCDIF,$/;"	e	enum:__anon19be98080203
RDC_MA_LCDIF1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_LCDIF1,$/;"	e	enum:__anonbeae406d0203
RDC_MA_LCDIF2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_LCDIF2,$/;"	e	enum:__anonbeae406d0203
RDC_MA_M4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_M4,$/;"	e	enum:__anonbeae406d0203
RDC_MA_M4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_M4,$/;"	e	enum:__anon19be98080203
RDC_MA_MLB	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_MLB,$/;"	e	enum:__anonbeae406d0203
RDC_MA_NC1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_NC1,$/;"	e	enum:__anon19be98080203
RDC_MA_NC2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_NC2,$/;"	e	enum:__anon19be98080203
RDC_MA_PCIE	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_PCIE,$/;"	e	enum:__anon19be98080203
RDC_MA_PCIE_CTRL	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_PCIE_CTRL,$/;"	e	enum:__anonbeae406d0203
RDC_MA_PXP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_PXP,$/;"	e	enum:__anonbeae406d0203
RDC_MA_PXP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_PXP,$/;"	e	enum:__anon19be98080203
RDC_MA_RAWNAND	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_RAWNAND,$/;"	e	enum:__anonbeae406d0203
RDC_MA_RAWNAND	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_RAWNAND,$/;"	e	enum:__anon19be98080203
RDC_MA_SDMA	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_SDMA,$/;"	e	enum:__anonbeae406d0203
RDC_MA_SDMA	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_SDMA,$/;"	e	enum:__anon19be98080203
RDC_MA_SDMA_BURST	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_SDMA_BURST,$/;"	e	enum:__anonbeae406d0203
RDC_MA_SDMA_BURST	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_SDMA_BURST,$/;"	e	enum:__anon19be98080203
RDC_MA_SDMA_PERI	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_SDMA_PERI,$/;"	e	enum:__anonbeae406d0203
RDC_MA_SDMA_PERI	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_SDMA_PERI,$/;"	e	enum:__anon19be98080203
RDC_MA_TEST	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_TEST,$/;"	e	enum:__anonbeae406d0203
RDC_MA_TEST	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_TEST,$/;"	e	enum:__anon19be98080203
RDC_MA_USB	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_USB,$/;"	e	enum:__anonbeae406d0203
RDC_MA_USB	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_USB,$/;"	e	enum:__anon19be98080203
RDC_MA_USDHC1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_USDHC1,$/;"	e	enum:__anonbeae406d0203
RDC_MA_USDHC1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_USDHC1,$/;"	e	enum:__anon19be98080203
RDC_MA_USDHC2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_USDHC2,$/;"	e	enum:__anonbeae406d0203
RDC_MA_USDHC2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_USDHC2,$/;"	e	enum:__anon19be98080203
RDC_MA_USDHC3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_USDHC3,$/;"	e	enum:__anonbeae406d0203
RDC_MA_USDHC3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_MA_USDHC3,$/;"	e	enum:__anon19be98080203
RDC_MA_USDHC4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_MA_USDHC4,$/;"	e	enum:__anonbeae406d0203
RDC_MDA_DID_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MDA_DID_MASK	/;"	d
RDC_MDA_DID_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MDA_DID_SHIFT	/;"	d
RDC_MDA_LCK_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MDA_LCK_MASK	/;"	d
RDC_MDA_LCK_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MDA_LCK_SHIFT	/;"	d
RDC_MRC_DRW_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_DRW_MASK(/;"	d
RDC_MRC_DR_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_DR_MASK(/;"	d
RDC_MRC_DR_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_DR_SHIFT(/;"	d
RDC_MRC_DW_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_DW_MASK(/;"	d
RDC_MRC_DW_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_DW_SHIFT(/;"	d
RDC_MRC_ENA_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_ENA_MASK	/;"	d
RDC_MRC_ENA_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_ENA_SHIFT	/;"	d
RDC_MRC_LCK_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_LCK_MASK	/;"	d
RDC_MRC_LCK_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRC_LCK_SHIFT	/;"	d
RDC_MREA_EADR_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MREA_EADR_MASK	/;"	d
RDC_MREA_EADR_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MREA_EADR_SHIFT	/;"	d
RDC_MRSA_SADR_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRSA_SADR_MASK	/;"	d
RDC_MRSA_SADR_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRSA_SADR_SHIFT	/;"	d
RDC_MRVS_AD_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRVS_AD_MASK	/;"	d
RDC_MRVS_AD_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRVS_AD_SHIFT	/;"	d
RDC_MRVS_VADDR_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRVS_VADDR_MASK	/;"	d
RDC_MRVS_VADDR_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRVS_VADDR_SHIFT	/;"	d
RDC_MRVS_VDID_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRVS_VDID_MASK	/;"	d
RDC_MRVS_VDID_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_MRVS_VDID_SHIFT	/;"	d
RDC_PDAP_DRW_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_DRW_MASK(/;"	d
RDC_PDAP_DR_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_DR_MASK(/;"	d
RDC_PDAP_DR_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_DR_SHIFT(/;"	d
RDC_PDAP_DW_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_DW_MASK(/;"	d
RDC_PDAP_DW_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_DW_SHIFT(/;"	d
RDC_PDAP_LCK_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_LCK_MASK	/;"	d
RDC_PDAP_LCK_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_LCK_SHIFT	/;"	d
RDC_PDAP_SREQ_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_SREQ_MASK	/;"	d
RDC_PDAP_SREQ_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PDAP_SREQ_SHIFT	/;"	d
RDC_PERI_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PERI_MASK	/;"	d
RDC_PERI_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_PERI_SHIFT	/;"	d
RDC_PER_ADC1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ADC1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ADC1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ADC1,$/;"	e	enum:__anon19be98080103
RDC_PER_ADC2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ADC2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ADC2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ADC2,$/;"	e	enum:__anon19be98080103
RDC_PER_AIPSTZ1_GE1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_AIPSTZ1_GE1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_AIPSTZ2_GE2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_AIPSTZ2_GE2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_AIPSTZ3_GE0	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_AIPSTZ3_GE0,$/;"	e	enum:__anonbeae406d0103
RDC_PER_AIPSTZ3_GE1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_AIPSTZ3_GE1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ANATOPDIG	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ANATOPDIG,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ANATOP_DIG	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ANATOP_DIG,$/;"	e	enum:__anon19be98080103
RDC_PER_ASRC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ASRC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_AUDMUX	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_AUDMUX,$/;"	e	enum:__anonbeae406d0103
RDC_PER_AXIMON	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_AXIMON,$/;"	e	enum:__anonbeae406d0103
RDC_PER_AXI_DEBUG_MON	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_AXI_DEBUG_MON,$/;"	e	enum:__anon19be98080103
RDC_PER_CAAM	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CAAM,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CAAM	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_CAAM,$/;"	e	enum:__anon19be98080103
RDC_PER_CAN1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CAN1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CAN2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CAN2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CANFD1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CANFD1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CANFD2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CANFD2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CANFD_CPU	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CANFD_CPU,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CCM	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CCM,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CCM	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_CCM,$/;"	e	enum:__anon19be98080103
RDC_PER_CSI	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_CSI,$/;"	e	enum:__anon19be98080103
RDC_PER_CSI1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CSI1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CSI2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CSI2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CSU	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_CSU,$/;"	e	enum:__anonbeae406d0103
RDC_PER_CSU	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_CSU,$/;"	e	enum:__anon19be98080103
RDC_PER_DAP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_DAP,$/;"	e	enum:__anonbeae406d0103
RDC_PER_DAP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_DAP,$/;"	e	enum:__anon19be98080103
RDC_PER_DCIC1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_DCIC1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_DCIC2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_DCIC2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_DDRC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_DDRC,$/;"	e	enum:__anon19be98080103
RDC_PER_DDR_PHY	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_DDR_PHY,$/;"	e	enum:__anon19be98080103
RDC_PER_ECSPI1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ECSPI1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ECSPI1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ECSPI1,$/;"	e	enum:__anon19be98080103
RDC_PER_ECSPI2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ECSPI2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ECSPI2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ECSPI2,$/;"	e	enum:__anon19be98080103
RDC_PER_ECSPI3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ECSPI3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ECSPI3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ECSPI3,$/;"	e	enum:__anon19be98080103
RDC_PER_ECSPI4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ECSPI4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ECSPI4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ECSPI4,$/;"	e	enum:__anon19be98080103
RDC_PER_ECSPI5	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ECSPI5,$/;"	e	enum:__anonbeae406d0103
RDC_PER_EIM	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_EIM,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ENET1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ENET1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ENET1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ENET1,$/;"	e	enum:__anon19be98080103
RDC_PER_ENET2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ENET2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ENET2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ENET2,$/;"	e	enum:__anon19be98080103
RDC_PER_EPDC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_EPDC,$/;"	e	enum:__anon19be98080103
RDC_PER_EPIT1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_EPIT1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_EPIT2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_EPIT2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ESAI	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ESAI,$/;"	e	enum:__anonbeae406d0103
RDC_PER_FLEXCAN1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_FLEXCAN1,$/;"	e	enum:__anon19be98080103
RDC_PER_FLEXCAN2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_FLEXCAN2,$/;"	e	enum:__anon19be98080103
RDC_PER_FLEX_TIMER1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_FLEX_TIMER1,$/;"	e	enum:__anon19be98080103
RDC_PER_FLEX_TIMER2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_FLEX_TIMER2,$/;"	e	enum:__anon19be98080103
RDC_PER_GIS	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GIS,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPC,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO1 = 0,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO2,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO3,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO4,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO5	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO5,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO5	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO5,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO6	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO6,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO6	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO6,$/;"	e	enum:__anon19be98080103
RDC_PER_GPIO7	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPIO7,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPIO7	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPIO7,$/;"	e	enum:__anon19be98080103
RDC_PER_GPT	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_GPT,$/;"	e	enum:__anonbeae406d0103
RDC_PER_GPT1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPT1,$/;"	e	enum:__anon19be98080103
RDC_PER_GPT2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPT2,$/;"	e	enum:__anon19be98080103
RDC_PER_GPT3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPT3,$/;"	e	enum:__anon19be98080103
RDC_PER_GPT4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_GPT4,$/;"	e	enum:__anon19be98080103
RDC_PER_I2C1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_I2C1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_I2C1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_I2C1,$/;"	e	enum:__anon19be98080103
RDC_PER_I2C2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_I2C2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_I2C2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_I2C2,$/;"	e	enum:__anon19be98080103
RDC_PER_I2C3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_I2C3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_I2C3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_I2C3,$/;"	e	enum:__anon19be98080103
RDC_PER_I2C4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_I2C4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_I2C4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_I2C4,$/;"	e	enum:__anon19be98080103
RDC_PER_IOMUXC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_IOMUXC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_IOMUXC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_IOMUXC,$/;"	e	enum:__anon19be98080103
RDC_PER_IOMUXCGPR	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_IOMUXCGPR,$/;"	e	enum:__anonbeae406d0103
RDC_PER_IOMUXCGPR	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_IOMUXCGPR,$/;"	e	enum:__anon19be98080103
RDC_PER_IOMUXC_LPSR	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_IOMUXC_LPSR,$/;"	e	enum:__anon19be98080103
RDC_PER_IOMUXC_LPSR_GPR	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_IOMUXC_LPSR_GPR,$/;"	e	enum:__anon19be98080103
RDC_PER_KPP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_KPP,$/;"	e	enum:__anonbeae406d0103
RDC_PER_KPP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_KPP,$/;"	e	enum:__anon19be98080103
RDC_PER_LCDIF	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_LCDIF,$/;"	e	enum:__anon19be98080103
RDC_PER_LCDIF1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_LCDIF1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_LCDIF2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_LCDIF2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_MIPI_CSI	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_MIPI_CSI,$/;"	e	enum:__anon19be98080103
RDC_PER_MIPI_DSI	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_MIPI_DSI,$/;"	e	enum:__anon19be98080103
RDC_PER_MLB25	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_MLB25,$/;"	e	enum:__anonbeae406d0103
RDC_PER_MMDC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_MMDC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_MUPORT1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_MUPORT1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_MUPORT2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_MUPORT2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_MU_A	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_MU_A,$/;"	e	enum:__anon19be98080103
RDC_PER_MU_B	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_MU_B,$/;"	e	enum:__anon19be98080103
RDC_PER_OCOTP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_OCOTP,$/;"	e	enum:__anonbeae406d0103
RDC_PER_OCOTP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_OCOTP,$/;"	e	enum:__anon19be98080103
RDC_PER_PCIE_PHY	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PCIE_PHY,$/;"	e	enum:__anon19be98080103
RDC_PER_PERFMON1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PERFMON1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PERFMON1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PERFMON1,$/;"	e	enum:__anon19be98080103
RDC_PER_PERFMON2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PERFMON2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PERFMON2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PERFMON2,$/;"	e	enum:__anon19be98080103
RDC_PER_PWM1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM1 = 0,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PWM1,$/;"	e	enum:__anon19be98080103
RDC_PER_PWM2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PWM2,$/;"	e	enum:__anon19be98080103
RDC_PER_PWM3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PWM3,$/;"	e	enum:__anon19be98080103
RDC_PER_PWM4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PWM4,$/;"	e	enum:__anon19be98080103
RDC_PER_PWM5	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM5,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM6	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM6,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM7	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM7,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PWM8	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PWM8,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PXP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_PXP,$/;"	e	enum:__anonbeae406d0103
RDC_PER_PXP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_PXP,$/;"	e	enum:__anon19be98080103
RDC_PER_QOSC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_QOSC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_QOSC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_QOSC,$/;"	e	enum:__anon19be98080103
RDC_PER_QSPI	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_QSPI,$/;"	e	enum:__anon19be98080103
RDC_PER_QSPI1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_QSPI1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_QSPI2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_QSPI2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_RDC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_RDC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_RDC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RDC,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_RESERVED1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_RESERVED1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED1,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED10	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED10,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED11	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED11,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED12	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED12,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED13	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED13,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED14	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED14,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED15	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED15,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED16	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED16,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED17	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED17,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED18	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED18,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED19	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED19,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_RESERVED2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_RESERVED2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED2,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED20	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED20,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED21	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED21,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED22	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED22,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_RESERVED3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_RESERVED3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED3,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_RESERVED4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_RESERVED4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED4,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED5	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED5,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED6	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED6,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED7	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED7,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED8	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED8,$/;"	e	enum:__anon19be98080103
RDC_PER_RESERVED9	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_RESERVED9,$/;"	e	enum:__anon19be98080103
RDC_PER_ROMCP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_ROMCP,$/;"	e	enum:__anonbeae406d0103
RDC_PER_ROMCP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_ROMCP,$/;"	e	enum:__anon19be98080103
RDC_PER_SAI1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SAI1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SAI1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SAI1,$/;"	e	enum:__anon19be98080103
RDC_PER_SAI2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SAI2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SAI2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SAI2,$/;"	e	enum:__anon19be98080103
RDC_PER_SAI3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SAI3,$/;"	e	enum:__anon19be98080103
RDC_PER_SDMA	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SDMA,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SDMA	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SDMA,$/;"	e	enum:__anon19be98080103
RDC_PER_SEMA1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SEMA1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SEMA1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SEMA1,$/;"	e	enum:__anon19be98080103
RDC_PER_SEMA2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SEMA2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SEMA2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SEMA2,$/;"	e	enum:__anon19be98080103
RDC_PER_SEMA4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SEMA4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SEMAPHORE_HS	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SEMAPHORE_HS,$/;"	e	enum:__anon19be98080103
RDC_PER_SIM1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SIM1,$/;"	e	enum:__anon19be98080103
RDC_PER_SIM2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SIM2,$/;"	e	enum:__anon19be98080103
RDC_PER_SNVSHP	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SNVSHP,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SNVS_HP	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SNVS_HP,$/;"	e	enum:__anon19be98080103
RDC_PER_SPBA	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SPBA,$/;"	e	enum:__anon19be98080103
RDC_PER_SPBA_DISPLAYMIX	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SPBA_DISPLAYMIX,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SPBA_MA	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SPBA_MA,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SPDIF	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SPDIF,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SRC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SRC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SRC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SRC,$/;"	e	enum:__anon19be98080103
RDC_PER_SSI1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SSI1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SSI2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SSI2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SSI3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_SSI3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_SYSTEM_COUNTER_COMPARE	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SYSTEM_COUNTER_COMPARE,$/;"	e	enum:__anon19be98080103
RDC_PER_SYSTEM_COUNTER_CONTROL	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SYSTEM_COUNTER_CONTROL,$/;"	e	enum:__anon19be98080103
RDC_PER_SYSTEM_COUNTER_READ	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_SYSTEM_COUNTER_READ,$/;"	e	enum:__anon19be98080103
RDC_PER_TZASC	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_TZASC,$/;"	e	enum:__anon19be98080103
RDC_PER_TZASC1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_TZASC1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_UART1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART1,$/;"	e	enum:__anon19be98080103
RDC_PER_UART2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_UART2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART2,$/;"	e	enum:__anon19be98080103
RDC_PER_UART3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_UART3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART3,$/;"	e	enum:__anon19be98080103
RDC_PER_UART4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_UART4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART4,$/;"	e	enum:__anon19be98080103
RDC_PER_UART5	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_UART5,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART5	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART5,$/;"	e	enum:__anon19be98080103
RDC_PER_UART6	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_UART6,$/;"	e	enum:__anonbeae406d0103
RDC_PER_UART6	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART6,$/;"	e	enum:__anon19be98080103
RDC_PER_UART7	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_UART7,$/;"	e	enum:__anon19be98080103
RDC_PER_USB1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USB1,$/;"	e	enum:__anon19be98080103
RDC_PER_USB2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USB2,$/;"	e	enum:__anon19be98080103
RDC_PER_USB3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USB3,$/;"	e	enum:__anon19be98080103
RDC_PER_USBO2H_PL301	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_USBO2H_PL301,$/;"	e	enum:__anonbeae406d0103
RDC_PER_USBO2H_USB	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_USBO2H_USB,$/;"	e	enum:__anonbeae406d0103
RDC_PER_USB_PL301	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USB_PL301,$/;"	e	enum:__anon19be98080103
RDC_PER_USDHC1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_USDHC1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_USDHC1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USDHC1,$/;"	e	enum:__anon19be98080103
RDC_PER_USDHC2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_USDHC2,$/;"	e	enum:__anonbeae406d0103
RDC_PER_USDHC2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USDHC2,$/;"	e	enum:__anon19be98080103
RDC_PER_USDHC3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_USDHC3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_USDHC3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_USDHC3,$/;"	e	enum:__anon19be98080103
RDC_PER_USDHC4	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_USDHC4,$/;"	e	enum:__anonbeae406d0103
RDC_PER_VADC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_VADC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_VDEC	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_VDEC,$/;"	e	enum:__anonbeae406d0103
RDC_PER_WDOG1	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_WDOG1,$/;"	e	enum:__anonbeae406d0103
RDC_PER_WDOG1	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_WDOG1,$/;"	e	enum:__anon19be98080103
RDC_PER_WDOG2	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_WDOG2,$/;"	e	enum:__anon19be98080103
RDC_PER_WDOG3	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_WDOG3,$/;"	e	enum:__anonbeae406d0103
RDC_PER_WDOG3	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_WDOG3,$/;"	e	enum:__anon19be98080103
RDC_PER_WDOG4	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_WDOG4,$/;"	e	enum:__anon19be98080103
RDC_PER_WEIM	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^	RDC_PER_WEIM,$/;"	e	enum:__anon19be98080103
RDC_PER_WODG2	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^	RDC_PER_WODG2,$/;"	e	enum:__anonbeae406d0103
RDC_SEMA_GATE_GTFSM_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_GATE_GTFSM_MASK	/;"	d
RDC_SEMA_GATE_GTFSM_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_GATE_GTFSM_SHIFT	/;"	d
RDC_SEMA_GATE_LDOM_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_GATE_LDOM_MASK	/;"	d
RDC_SEMA_GATE_LDOM_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_GATE_LDOM_SHIFT	/;"	d
RDC_SEMA_PROC_ID	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^#define RDC_SEMA_PROC_ID /;"	d
RDC_SEMA_PROC_ID	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^#define RDC_SEMA_PROC_ID /;"	d
RDC_SEMA_RSTGT_RSTGDP_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGDP_MASK	/;"	d
RDC_SEMA_RSTGT_RSTGDP_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGDP_SHIFT	/;"	d
RDC_SEMA_RSTGT_RSTGMS_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGMS_MASK	/;"	d
RDC_SEMA_RSTGT_RSTGMS_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGMS_SHIFT	/;"	d
RDC_SEMA_RSTGT_RSTGSM_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGSM_MASK	/;"	d
RDC_SEMA_RSTGT_RSTGSM_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGSM_SHIFT	/;"	d
RDC_SEMA_RSTGT_RSTGTN_MASK	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGTN_MASK	/;"	d
RDC_SEMA_RSTGT_RSTGTN_SHIFT	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define RDC_SEMA_RSTGT_RSTGTN_SHIFT	/;"	d
RDDL	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define RDDL	/;"	d
RDDL_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define RDDL_P	/;"	d
RDF1ST	drivers/net/sh_eth.h	/^#define RDF1ST	/;"	d
RDFAR	drivers/net/sh_eth.h	/^	RDFAR,$/;"	e	enum:__anon5ef54f5a0103
RDFEND	drivers/net/sh_eth.h	/^#define RDFEND	/;"	d
RDFFR	drivers/net/sh_eth.h	/^	RDFFR,$/;"	e	enum:__anon5ef54f5a0103
RDFFR_BIT	drivers/net/sh_eth.h	/^enum RDFFR_BIT {$/;"	g
RDFFR_RDLF	drivers/net/sh_eth.h	/^	RDFFR_RDLF = 0x01,$/;"	e	enum:RDFFR_BIT
RDFXR	drivers/net/sh_eth.h	/^	RDFXR,$/;"	e	enum:__anon5ef54f5a0103
RDIMM_RC0	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC0	/;"	d
RDIMM_RC1	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC1	/;"	d
RDIMM_RC10	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC10	/;"	d
RDIMM_RC11	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC11	/;"	d
RDIMM_RC2	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC2	/;"	d
RDIMM_RC8	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC8	/;"	d
RDIMM_RC9	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define RDIMM_RC9	/;"	d
RDLAR	drivers/net/sh_eth.h	/^	RDLAR,$/;"	e	enum:__anon5ef54f5a0103
RDLVL_COMPLETE_CH1	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_COMPLETE_CH1	/;"	d
RDLVL_COMPLETE_CHO	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_COMPLETE_CHO	/;"	d
RDLVL_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_EN	/;"	d
RDLVL_GATE_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_GATE_EN	/;"	d
RDLVL_INCR_ADJ	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_INCR_ADJ	/;"	d
RDLVL_PASS_ADJ_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_PASS_ADJ_OFFSET	/;"	d
RDLVL_PASS_ADJ_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define RDLVL_PASS_ADJ_VAL	/;"	d
RDMLR	drivers/net/sh_eth.h	/^	RDMLR,$/;"	e	enum:__anon5ef54f5a0103
RDQS	arch/x86/cpu/quark/mrc_util.h	/^	RDQS,$/;"	e	enum:__anon78bf36a60203
RDQS_MAX	arch/x86/cpu/quark/smc.h	/^#define RDQS_MAX	/;"	d
RDQS_MIN	arch/x86/cpu/quark/smc.h	/^#define RDQS_MIN	/;"	d
RDQS_STEP	arch/x86/cpu/quark/smc.h	/^#define RDQS_STEP	/;"	d
RDS_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RDS_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RDS_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RDS_CLK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RDS_CLK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_CLK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_CLK_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	FMCLK_C_MARK, RDS_CLK_MARK,$/;"	e	enum:__anona307901d0103	file:
RDS_DATA_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RDS_DATA_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RDS_DATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_DATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RDS_DATA_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RDS_DATA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_DATA_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_DATA_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_DATA_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,$/;"	e	enum:__anona3077f190103	file:
RDS_DATA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,$/;"	e	enum:__anona3077f190103	file:
RDWR_EN_HI_CNT	drivers/mtd/nand/denali.h	/^#define RDWR_EN_HI_CNT	/;"	d
RDWR_EN_HI_CNT__VALUE	drivers/mtd/nand/denali.h	/^#define     RDWR_EN_HI_CNT__VALUE	/;"	d
RDWR_EN_LO_CNT	drivers/mtd/nand/denali.h	/^#define RDWR_EN_LO_CNT	/;"	d
RDWR_EN_LO_CNT__VALUE	drivers/mtd/nand/denali.h	/^#define     RDWR_EN_LO_CNT__VALUE	/;"	d
RDWR_FWE_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	WE0__FWE_MARK, RDWR_FWE_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
RDWR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	CKO_MARK,	BS_MARK,	RDWR_MARK,$/;"	e	enum:__anona304c1340103	file:
RDY_ACT	include/linux/mtd/samsung_onenand.h	/^#define RDY_ACT /;"	d
RD_78460_CUSTOMER_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define RD_78460_CUSTOMER_ID	/;"	d
RD_78460_GP_GPP_OUT_ENA_HIGH	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define RD_78460_GP_GPP_OUT_ENA_HIGH	/;"	d	file:
RD_78460_GP_GPP_OUT_ENA_LOW	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define RD_78460_GP_GPP_OUT_ENA_LOW	/;"	d	file:
RD_78460_GP_GPP_OUT_ENA_MID	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define RD_78460_GP_GPP_OUT_ENA_MID	/;"	d	file:
RD_78460_GP_GPP_OUT_VAL_HIGH	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define RD_78460_GP_GPP_OUT_VAL_HIGH	/;"	d	file:
RD_78460_GP_GPP_OUT_VAL_LOW	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define RD_78460_GP_GPP_OUT_VAL_LOW	/;"	d	file:
RD_78460_GP_GPP_OUT_VAL_MID	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^#define RD_78460_GP_GPP_OUT_VAL_MID	/;"	d	file:
RD_78460_NAS_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define RD_78460_NAS_ID	/;"	d
RD_78460_SERVER_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define RD_78460_SERVER_ID	/;"	d
RD_78460_SERVER_REV2_ID	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define RD_78460_SERVER_REV2_ID	/;"	d
RD_AP_68XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define RD_AP_68XX_ID	/;"	d
RD_CRC	drivers/usb/eth/r8152.h	/^#define RD_CRC	/;"	d
RD_DLY	drivers/mtd/nand/bfin_nand.c	/^#define                    RD_DLY /;"	d	file:
RD_DOLOAD	arch/sh/include/asm/zimage.h	/^#define RD_DOLOAD	/;"	d
RD_DQS	board/ti/ti816x/evm.c	/^#define RD_DQS	/;"	d	file:
RD_DQS_GATE	board/ti/ti816x/evm.c	/^#define RD_DQS_GATE	/;"	d	file:
RD_DUAL	drivers/mtd/spi/sf_internal.h	/^#define RD_DUAL	/;"	d
RD_DUALIO	drivers/mtd/spi/sf_internal.h	/^#define RD_DUALIO	/;"	d
RD_ES	drivers/net/dc2114x.c	/^#define RD_ES	/;"	d	file:
RD_FETCH	arch/arm/mach-exynos/exynos4_setup.h	/^#define RD_FETCH	/;"	d
RD_FSC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RD_FSC_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
RD_FULL	drivers/mtd/spi/sf_internal.h	/^#define RD_FULL	/;"	d
RD_GET_MODE_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define RD_GET_MODE_ADDR	/;"	d
RD_IPV4_CS	drivers/usb/eth/r8152.h	/^#define RD_IPV4_CS	/;"	d
RD_IPV6_CS	drivers/usb/eth/r8152.h	/^#define RD_IPV6_CS	/;"	d
RD_LS	drivers/net/dc2114x.c	/^#define RD_LS	/;"	d	file:
RD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,$/;"	e	enum:__anona307879b0103	file:
RD_NAS_68XX_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define RD_NAS_68XX_ID	/;"	d
RD_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,$/;"	e	enum:__anona3077f190103	file:
RD_N_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	EX_CS0_N_MARK, RD_N_MARK,$/;"	e	enum:__anona307835a0103	file:
RD_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	EX_CS0_N_MARK, RD_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RD_PROMPT	arch/sh/include/asm/zimage.h	/^#define RD_PROMPT	/;"	d
RD_QUAD	drivers/mtd/spi/sf_internal.h	/^#define RD_QUAD	/;"	d
RD_QUADIO	drivers/mtd/spi/sf_internal.h	/^#define RD_QUADIO	/;"	d
RD_RACT	drivers/net/sh_eth.h	/^	RD_RACT = 0x80000000, RD_RDLE = 0x40000000,$/;"	e	enum:RD_STS_BIT
RD_RDLE	drivers/net/sh_eth.h	/^	RD_RACT = 0x80000000, RD_RDLE = 0x40000000,$/;"	e	enum:RD_STS_BIT
RD_RDY	drivers/mtd/nand/bfin_nand.c	/^#define                    RD_RDY /;"	d	file:
RD_RER	drivers/net/dc2114x.c	/^#define RD_RER	/;"	d	file:
RD_RFE	drivers/net/sh_eth.h	/^	RD_RFE = 0x08000000, RD_RFS10 = 0x00000200,$/;"	e	enum:RD_STS_BIT
RD_RFP	drivers/net/sh_eth.h	/^#define RD_RFP	/;"	d
RD_RFP0	drivers/net/sh_eth.h	/^	RD_RFP1 = 0x20000000, RD_RFP0 = 0x10000000,$/;"	e	enum:RD_STS_BIT
RD_RFP1	drivers/net/sh_eth.h	/^	RD_RFP1 = 0x20000000, RD_RFP0 = 0x10000000,$/;"	e	enum:RD_STS_BIT
RD_RFS1	drivers/net/sh_eth.h	/^	RD_RFS1 = 0x00000001,$/;"	e	enum:RD_STS_BIT
RD_RFS10	drivers/net/sh_eth.h	/^	RD_RFE = 0x08000000, RD_RFS10 = 0x00000200,$/;"	e	enum:RD_STS_BIT
RD_RFS2	drivers/net/sh_eth.h	/^	RD_RFS3 = 0x00000004, RD_RFS2 = 0x00000002,$/;"	e	enum:RD_STS_BIT
RD_RFS3	drivers/net/sh_eth.h	/^	RD_RFS3 = 0x00000004, RD_RFS2 = 0x00000002,$/;"	e	enum:RD_STS_BIT
RD_RFS4	drivers/net/sh_eth.h	/^	RD_RFS5 = 0x00000010, RD_RFS4 = 0x00000008,$/;"	e	enum:RD_STS_BIT
RD_RFS5	drivers/net/sh_eth.h	/^	RD_RFS5 = 0x00000010, RD_RFS4 = 0x00000008,$/;"	e	enum:RD_STS_BIT
RD_RFS6	drivers/net/sh_eth.h	/^	RD_RFS7 = 0x00000040, RD_RFS6 = 0x00000020,$/;"	e	enum:RD_STS_BIT
RD_RFS7	drivers/net/sh_eth.h	/^	RD_RFS7 = 0x00000040, RD_RFS6 = 0x00000020,$/;"	e	enum:RD_STS_BIT
RD_RFS8	drivers/net/sh_eth.h	/^	RD_RFS9 = 0x00000100, RD_RFS8 = 0x00000080,$/;"	e	enum:RD_STS_BIT
RD_RFS9	drivers/net/sh_eth.h	/^	RD_RFS9 = 0x00000100, RD_RFS8 = 0x00000080,$/;"	e	enum:RD_STS_BIT
RD_RH_PORTSTAT	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define RD_RH_PORTSTAT	/;"	d	file:
RD_RH_PORTSTAT	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define RD_RH_PORTSTAT	/;"	d	file:
RD_RH_PORTSTAT	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define RD_RH_PORTSTAT	/;"	d	file:
RD_RH_PORTSTAT	drivers/usb/host/ohci-hcd.c	/^#define RD_RH_PORTSTAT	/;"	d	file:
RD_RH_PORTSTAT	drivers/usb/host/ohci-s3c24xx.c	/^#define RD_RH_PORTSTAT	/;"	d	file:
RD_RH_STAT	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define RD_RH_STAT	/;"	d	file:
RD_RH_STAT	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define RD_RH_STAT	/;"	d	file:
RD_RH_STAT	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define RD_RH_STAT	/;"	d	file:
RD_RH_STAT	drivers/usb/host/ohci-hcd.c	/^#define RD_RH_STAT	/;"	d	file:
RD_RH_STAT	drivers/usb/host/ohci-s3c24xx.c	/^#define RD_RH_STAT	/;"	d	file:
RD_RW_LVL_INC_PRE	arch/arm/include/asm/emif.h	/^#define RD_RW_LVL_INC_PRE	/;"	d
RD_STATUS_REG	include/linux/mtd/st_smi.h	/^#define RD_STATUS_REG	/;"	d
RD_STS_BIT	drivers/net/sh_eth.h	/^enum RD_STS_BIT {$/;"	g
RD_TCP_CS	drivers/usb/eth/r8152.h	/^#define RD_TCP_CS	/;"	d
RD_TO_PRE_MASK	include/fsl_ddr_sdram.h	/^#define RD_TO_PRE_MASK	/;"	d
RD_TO_PRE_SHIFT	include/fsl_ddr_sdram.h	/^#define RD_TO_PRE_SHIFT	/;"	d
RD_UDP_CS	drivers/usb/eth/r8152.h	/^#define RD_UDP_CS	/;"	d
RD_WR_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,$/;"	e	enum:__anona307879b0103	file:
RD_WR_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,$/;"	e	enum:__anona3077f190103	file:
RD_WRx_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RD_WRx_GMARK,$/;"	e	enum:__anona307945e0103	file:
RD_WRx_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RD_WRx_IMARK,$/;"	e	enum:__anona307945e0103	file:
RD__FSC_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	RD__FSC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
RDx_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RDx_GMARK,$/;"	e	enum:__anona307945e0103	file:
RDx_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RDx_IMARK,$/;"	e	enum:__anona307945e0103	file:
RE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RE	/;"	d
READ	board/bf533-ezkit/flash-defines.h	/^#define READ	/;"	d
READ	drivers/block/sata_dwc.h	/^#define READ /;"	d
READ	include/lattice.h	/^#define READ	/;"	d
READ32	arch/sparc/cpu/leon3/usb_uhci.c	/^#define READ32(/;"	d	file:
READINIT	arch/blackfin/cpu/Makefile	/^READINIT = env LC_ALL=C $(CROSS_COMPILE)readelf -s $<$/;"	m
READMULTIPLE	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define READMULTIPLE /;"	d
READTYPE	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define READTYPE /;"	d
READY	board/cobra5272/flash.c	/^#define READY /;"	d	file:
READY_PAUSE	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               READY_PAUSE /;"	d
READ_BUFFER_SELECT	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define READ_BUFFER_SELECT	/;"	d
READ_BUFFER_SELECT_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define READ_BUFFER_SELECT_REG	/;"	d
READ_BUFF_SIZE	drivers/mtd/nand/arasan_nfc.c	/^#define READ_BUFF_SIZE	/;"	d	file:
READ_BUSY_PIN_ENABLED	drivers/mtd/nand/denali.h	/^#define READ_BUSY_PIN_ENABLED /;"	d
READ_CENTRALIZATION_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define READ_CENTRALIZATION_PHY_REG	/;"	d
READ_CMD	drivers/block/dwc_ahsata.h	/^#define READ_CMD	/;"	d
READ_CMD	drivers/block/fsl_sata.h	/^#define READ_CMD	/;"	d
READ_CMD	drivers/block/sata_mv.c	/^#define READ_CMD	/;"	d	file:
READ_CMD	drivers/block/sata_sil.h	/^#define READ_CMD	/;"	d
READ_DATA	drivers/block/ftide020.c	/^#define READ_DATA(/;"	d	file:
READ_DATA	include/lattice.h	/^#define READ_DATA	/;"	d
READ_DATA_CMD	drivers/block/ftide020.h	/^#define READ_DATA_CMD	/;"	d
READ_DATA_READY_DELAY	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define READ_DATA_READY_DELAY	/;"	d
READ_DATA_SAMPLE_DELAY	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define READ_DATA_SAMPLE_DELAY	/;"	d
READ_DURATION	board/micronas/vct/ebi.h	/^#define READ_DURATION	/;"	d
READ_ENABLE_2_WRITE_ENABLE	drivers/mtd/nand/denali.h	/^#define READ_ENABLE_2_WRITE_ENABLE /;"	d
READ_ENDIANNESS_ABCD	board/micronas/vct/ebi.h	/^#define READ_ENDIANNESS_ABCD	/;"	d
READ_ENDIANNESS_BADC	board/micronas/vct/ebi.h	/^#define READ_ENDIANNESS_BADC	/;"	d
READ_ENDIANNESS_CDAB	board/micronas/vct/ebi.h	/^#define READ_ENDIANNESS_CDAB	/;"	d
READ_ENDIANNESS_DCBA	board/micronas/vct/ebi.h	/^#define READ_ENDIANNESS_DCBA	/;"	d
READ_ERROR	drivers/mtd/nand/denali.h	/^#define READ_ERROR /;"	d
READ_ID	include/linux/mtd/st_smi.h	/^#define READ_ID	/;"	d
READ_IDLE_INTERVAL_DVFS	arch/arm/include/asm/emif.h	/^#define READ_IDLE_INTERVAL_DVFS	/;"	d
READ_IDLE_INTERVAL_NORMAL	arch/arm/include/asm/emif.h	/^#define READ_IDLE_INTERVAL_NORMAL	/;"	d
READ_ID_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define READ_ID_CMD_CODE	/;"	d	file:
READ_LEVELING	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	READ_LEVELING,$/;"	e	enum:auto_tune_stage
READ_LEVELING_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define READ_LEVELING_MASK_BIT	/;"	d
READ_LEVELING_PHY_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define READ_LEVELING_PHY_OFFSET	/;"	d
READ_LEVELING_STATIC	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	READ_LEVELING_STATIC$/;"	e	enum:hws_static_config_type
READ_LEVELING_TF	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	READ_LEVELING_TF,$/;"	e	enum:auto_tune_stage
READ_LEVELING_TF_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define READ_LEVELING_TF_MASK_BIT	/;"	d
READ_LEVELLING_DDR3	arch/arm/mach-exynos/exynos5_setup.h	/^#define READ_LEVELLING_DDR3	/;"	d
READ_MODE	drivers/mtd/nand/denali.h	/^#define READ_MODE	/;"	d
READ_MODE__VALUE	drivers/mtd/nand/denali.h	/^#define     READ_MODE__VALUE	/;"	d
READ_MUX_ACTIVE	arch/arm/include/asm/arch-tegra/dc.h	/^#define  READ_MUX_ACTIVE	/;"	d
READ_MUX_ASSEMBLY	arch/arm/include/asm/arch-tegra/dc.h	/^#define  READ_MUX_ASSEMBLY	/;"	d
READ_ONCE	include/linux/compiler.h	/^#define READ_ONCE(/;"	d
READ_ONCE_NOCHECK	include/linux/compiler.h	/^#define READ_ONCE_NOCHECK(/;"	d
READ_ONFI_PARAM_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define READ_ONFI_PARAM_CMD_CODE	/;"	d	file:
READ_PAGE_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define READ_PAGE_CMD_CODE	/;"	d	file:
READ_PHY	drivers/net/ax88180.h	/^  #define READ_PHY	/;"	d
READ_REG_CMD	drivers/block/ftide020.h	/^#define READ_REG_CMD	/;"	d
READ_RXBUF	drivers/net/ax88180.h	/^static inline unsigned long READ_RXBUF (struct eth_device *dev)$/;"	f	typeref:typename:unsigned long
READ_RXBUF	drivers/net/ax88180.h	/^static inline unsigned short READ_RXBUF (struct eth_device *dev)$/;"	f	typeref:typename:unsigned short
READ_SCC_DM_IO_OUT2_DELAY	drivers/ddr/altera/sequencer.h	/^#define READ_SCC_DM_IO_OUT2_DELAY	/;"	d
READ_SCC_DQS_IO_OUT2_DELAY	drivers/ddr/altera/sequencer.h	/^#define READ_SCC_DQS_IO_OUT2_DELAY	/;"	d
READ_SCC_DQ_OUT2_DELAY	drivers/ddr/altera/sequencer.h	/^#define READ_SCC_DQ_OUT2_DELAY	/;"	d
READ_SCC_OCT_OUT2_DELAY	drivers/ddr/altera/sequencer.h	/^#define READ_SCC_OCT_OUT2_DELAY	/;"	d
READ_SECTORS	include/linux/edd.h	/^#define READ_SECTORS /;"	d
READ_STATUS	drivers/block/ftide020.c	/^#define READ_STATUS(/;"	d	file:
READ_TIMER	arch/arm/cpu/arm926ejs/omap/timer.c	/^#define READ_TIMER	/;"	d	file:
READ_TIMER	arch/arm/cpu/arm926ejs/spear/timer.c	/^#define READ_TIMER(/;"	d	file:
READ_TIMER	arch/arm/cpu/armv7/stv0991/timer.c	/^#define READ_TIMER(/;"	d	file:
READ_TIMER	arch/arm/mach-stm32/stm32f7/timer.c	/^#define READ_TIMER(/;"	d	file:
READ_TIMER	board/armltd/integrator/timer.c	/^#define READ_TIMER /;"	d	file:
READ_TRAIN	arch/x86/cpu/quark/hte.h	/^	READ_TRAIN,$/;"	e	enum:__anone289d2a80203
READ_VALID_FIFO_SIZE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/denx/mcvevk/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/ebv/socrates/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/is1/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/sr1500/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_VALID_FIFO_SIZE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE /;"	d
READ_VALID_FIFO_SIZE	board/terasic/sockit/qts/sdram_config.h	/^#define READ_VALID_FIFO_SIZE	/;"	d
READ_WRITE_ENABLE_HIGH_COUNT	drivers/mtd/nand/denali.h	/^#define READ_WRITE_ENABLE_HIGH_COUNT /;"	d
READ_WRITE_ENABLE_LOW_COUNT	drivers/mtd/nand/denali.h	/^#define READ_WRITE_ENABLE_LOW_COUNT /;"	d
READ_XBAR_PORT1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  READ_XBAR_PORT1	/;"	d
REALMODE_BASE	arch/x86/lib/bios.h	/^#define REALMODE_BASE	/;"	d
REASON1_CPUWD	board/keymile/kmp204x/qrio.c	/^#define REASON1_CPUWD	/;"	d	file:
REASON1_OFF	board/keymile/kmp204x/qrio.c	/^#define REASON1_OFF	/;"	d	file:
REBINDING	net/bootp.h	/^	       REBINDING,$/;"	e	enum:__anon7cb633f50103
REBOOTING	net/bootp.h	/^	       REBOOTING,$/;"	e	enum:__anon7cb633f50103
REBOOT_DELAY	board/theadorable/theadorable.c	/^#define REBOOT_DELAY	/;"	d	file:
REBOOT_FLAG	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define REBOOT_FLAG	/;"	d
RECALIB_CNT	drivers/ddr/microchip/ddr2_regs.h	/^#define RECALIB_CNT(/;"	d
RECEIVE_BUFFER_ALIGN_SIZE	drivers/net/e1000.h	/^#define RECEIVE_BUFFER_ALIGN_SIZE /;"	d
RECOVER	fs/ext4/ext4_common.h	/^#define RECOVER	/;"	d
RECOVER_TIME	board/micronas/vct/ebi.h	/^#define RECOVER_TIME	/;"	d
RECV_BUFSIZE	drivers/net/bfin_mac.h	/^#define RECV_BUFSIZE	/;"	d
RECV_ERROR	include/usbdevice.h	/^	RECV_ERROR$/;"	e	enum:urb_send_status
RECV_OK	include/usbdevice.h	/^	RECV_OK,$/;"	e	enum:urb_send_status
RECV_READY	include/usbdevice.h	/^	RECV_READY,$/;"	e	enum:urb_send_status
RECV_RST_BIT	drivers/net/sh_eth.h	/^enum RECV_RST_BIT { RMCR_RST = 0x01, };$/;"	g
REC_BUFFER_SIZE	board/mpl/pati/pati.c	/^#define REC_BUFFER_SIZE	/;"	d	file:
RED	board/bf533-stamp/video.h	/^#define RED /;"	d
RED	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
REDIRECT_APPEND	common/cli_hush.c	/^	REDIRECT_APPEND    = 3,$/;"	e	enum:__anon62a9299d0103	file:
REDIRECT_HEREIS	common/cli_hush.c	/^	REDIRECT_HEREIS    = 4,$/;"	e	enum:__anon62a9299d0103	file:
REDIRECT_INPUT	common/cli_hush.c	/^	REDIRECT_INPUT     = 1,$/;"	e	enum:__anon62a9299d0103	file:
REDIRECT_IO	common/cli_hush.c	/^	REDIRECT_IO        = 5$/;"	e	enum:__anon62a9299d0103	file:
REDIRECT_OVERWRITE	common/cli_hush.c	/^	REDIRECT_OVERWRITE = 2,$/;"	e	enum:__anon62a9299d0103	file:
RED_LED	board/atmel/at91rm9200ek/led.c	/^#define	RED_LED	/;"	d	file:
RED_LED_DEV	include/configs/omap3_igep00x0.h	/^#define RED_LED_DEV	/;"	d
RED_LED_GPIO	include/configs/omap3_igep00x0.h	/^#define RED_LED_GPIO /;"	d
REF1CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF1CLK	include/dt-bindings/clock/microchip,clock.h	/^#define REF1CLK	/;"	d
REF2CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF2CLK	include/dt-bindings/clock/microchip,clock.h	/^#define REF2CLK	/;"	d
REF3CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF3CLK	include/dt-bindings/clock/microchip,clock.h	/^#define REF3CLK	/;"	d
REF4CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF4CLK	include/dt-bindings/clock/microchip,clock.h	/^#define REF4CLK	/;"	d
REF5CLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REF5CLK	include/dt-bindings/clock/microchip,clock.h	/^#define REF5CLK	/;"	d
REFCNT	board/samsung/smdk2410/lowlevel_init.S	/^#define REFCNT	/;"	d	file:
REFCNT_200	board/mpl/vcma9/lowlevel_init.S	/^#define REFCNT_200	/;"	d	file:
REFCNT_250	board/mpl/vcma9/lowlevel_init.S	/^#define REFCNT_250	/;"	d	file:
REFCNT_266	board/mpl/vcma9/lowlevel_init.S	/^#define REFCNT_266	/;"	d	file:
REFCNT_CLK	drivers/ddr/microchip/ddr2_regs.h	/^#define REFCNT_CLK(/;"	d
REFDLY_CLK	drivers/ddr/microchip/ddr2_regs.h	/^#define REFDLY_CLK(/;"	d
REFEN	board/mpl/vcma9/lowlevel_init.S	/^#define REFEN	/;"	d	file:
REFEN	board/samsung/smdk2410/lowlevel_init.S	/^#define REFEN	/;"	d	file:
REFLASH	include/configs/dragonboard410c.h	/^#define REFLASH(/;"	d
REFLECTION_TESTPATTERN	board/gdsys/405ep/405ep.c	/^#define REFLECTION_TESTPATTERN /;"	d	file:
REFLECTION_TESTPATTERN	board/gdsys/405ex/405ex.c	/^#define REFLECTION_TESTPATTERN /;"	d	file:
REFLECTION_TESTPATTERN	board/gdsys/mpc8308/mpc8308.c	/^#define REFLECTION_TESTPATTERN /;"	d	file:
REFLECTION_TESTPATTERN_INV	board/gdsys/405ep/405ep.c	/^#define REFLECTION_TESTPATTERN_INV /;"	d	file:
REFLECTION_TESTPATTERN_INV	board/gdsys/405ex/405ex.c	/^#define REFLECTION_TESTPATTERN_INV /;"	d	file:
REFLECTION_TESTPATTERN_INV	board/gdsys/mpc8308/mpc8308.c	/^#define REFLECTION_TESTPATTERN_INV /;"	d	file:
REFLECTION_TESTREG	board/gdsys/405ep/405ep.c	/^#define REFLECTION_TESTREG /;"	d	file:
REFLECTION_TESTREG	board/gdsys/405ex/405ex.c	/^#define REFLECTION_TESTREG /;"	d	file:
REFLECTION_TESTREG	board/gdsys/mpc8308/mpc8308.c	/^#define REFLECTION_TESTREG /;"	d	file:
REFO1CON	drivers/clk/clk_pic32.c	/^#define REFO1CON	/;"	d	file:
REFO1TRIM	drivers/clk/clk_pic32.c	/^#define REFO1TRIM	/;"	d	file:
REFO_ACTIVE	drivers/clk/clk_pic32.c	/^#define REFO_ACTIVE	/;"	d	file:
REFO_DIVSW_EN	drivers/clk/clk_pic32.c	/^#define REFO_DIVSW_EN	/;"	d	file:
REFO_DIV_MASK	drivers/clk/clk_pic32.c	/^#define REFO_DIV_MASK	/;"	d	file:
REFO_DIV_SHIFT	drivers/clk/clk_pic32.c	/^#define REFO_DIV_SHIFT	/;"	d	file:
REFO_OE	drivers/clk/clk_pic32.c	/^#define REFO_OE	/;"	d	file:
REFO_ON	drivers/clk/clk_pic32.c	/^#define REFO_ON	/;"	d	file:
REFO_SEL_MASK	drivers/clk/clk_pic32.c	/^#define REFO_SEL_MASK	/;"	d	file:
REFO_SEL_SHIFT	drivers/clk/clk_pic32.c	/^#define REFO_SEL_SHIFT	/;"	d	file:
REFO_TRIM_MASK	drivers/clk/clk_pic32.c	/^#define REFO_TRIM_MASK	/;"	d	file:
REFO_TRIM_MAX	drivers/clk/clk_pic32.c	/^#define REFO_TRIM_MAX	/;"	d	file:
REFO_TRIM_REG	drivers/clk/clk_pic32.c	/^#define REFO_TRIM_REG	/;"	d	file:
REFO_TRIM_SHIFT	drivers/clk/clk_pic32.c	/^#define REFO_TRIM_SHIFT	/;"	d	file:
REFRESH_CYCLES_V	board/spear/common/spr_lowlevel_init.S	/^REFRESH_CYCLES_V:$/;"	l
REFRESH_TO_EOL	common/cli_readline.c	/^#define REFRESH_TO_EOL(/;"	d	file:
REFSEL_12MHZ	include/usb/ehci-ci.h	/^#define REFSEL_12MHZ	/;"	d
REFSEL_16MHZ	include/usb/ehci-ci.h	/^#define REFSEL_16MHZ	/;"	d
REFSEL_48MHZ	include/usb/ehci-ci.h	/^#define REFSEL_48MHZ	/;"	d
REF_1M_CLK	arch/arm/include/asm/arch-mx7/clock.h	/^	REF_1M_CLK,$/;"	e	enum:clk_root_src
REF_CLK_24M	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define REF_CLK_24M	/;"	d
REF_CLK_27M	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define REF_CLK_27M	/;"	d
REF_CLK_SELECTOR_VAL	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REF_CLK_SELECTOR_VAL(/;"	d
REF_CLK_SELECTOR_VAL_PEX0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REF_CLK_SELECTOR_VAL_PEX0(/;"	d
REF_CLK_SELECTOR_VAL_PEX1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REF_CLK_SELECTOR_VAL_PEX1(/;"	d
REF_CLK_SELECTOR_VAL_PEX2	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REF_CLK_SELECTOR_VAL_PEX2(/;"	d
REF_CLK_SELECTOR_VAL_PEX3	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REF_CLK_SELECTOR_VAL_PEX3(/;"	d
REF_CLOCK_100MHZ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	REF_CLOCK_100MHZ,$/;"	e	enum:ref_clock
REF_CLOCK_25MHZ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	REF_CLOCK_25MHZ,$/;"	e	enum:ref_clock
REF_CLOCK_40MHZ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	REF_CLOCK_40MHZ,$/;"	e	enum:ref_clock
REF_CLOCK_UNSUPPORTED	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	REF_CLOCK_UNSUPPORTED$/;"	e	enum:ref_clock
REF_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	REF_CMD,$/;"	e	enum:__anon114585520103
REF_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	REF_CMD,$/;"	e	enum:__anon957231910203	file:
REF_CMD	drivers/ddr/microchip/ddr2_regs.h	/^#define REF_CMD	/;"	d
REF_ON_IDLE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define REF_ON_IDLE	/;"	d
REF_REG0	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REF_REG0	/;"	d
REG	arch/arm/mach-davinci/include/mach/hardware.h	/^#define	REG(/;"	d
REG	arch/arm/mach-keystone/include/mach/hardware.h	/^#define	REG(/;"	d
REG	arch/arm/mach-tegra/pinmux-common.c	/^#define REG(/;"	d	file:
REG	board/freescale/mx31ads/lowlevel_init.S	/^.macro REG reg, val$/;"	m
REG	board/imx31_phycore/lowlevel_init.S	/^.macro REG reg, val$/;"	m
REG	include/sym53c8xx.h	/^#define REG(/;"	d
REG	lib/dhry/dhry_1.c	/^#define REG$/;"	d	file:
REG	lib/dhry/dhry_2.c	/^#define REG$/;"	d	file:
REG10_CTL	drivers/power/regulator/act8846.c	/^	REG10_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG10_VOL	drivers/power/regulator/act8846.c	/^	REG10_VOL	= 0x80,$/;"	e	enum:__anon8cd915960103	file:
REG11_CTL	drivers/power/regulator/act8846.c	/^	REG11_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG11_VOL	drivers/power/regulator/act8846.c	/^	REG11_VOL	= 0x90,$/;"	e	enum:__anon8cd915960103	file:
REG12_CTL	drivers/power/regulator/act8846.c	/^	REG12_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG12_VOL	drivers/power/regulator/act8846.c	/^	REG12_VOL	= 0xa0,$/;"	e	enum:__anon8cd915960103	file:
REG13	drivers/power/regulator/act8846.c	/^	REG13		= 0xb1,$/;"	e	enum:__anon8cd915960103	file:
REG1_CTL	drivers/power/regulator/act8846.c	/^	REG1_CTL	= 0X11,$/;"	e	enum:__anon8cd915960103	file:
REG1_VOL	drivers/power/regulator/act8846.c	/^	REG1_VOL	= 0x10,$/;"	e	enum:__anon8cd915960103	file:
REG2OFF	drivers/block/mxc_ata.c	/^#define	REG2OFF(/;"	d	file:
REG2VAL	include/power/sandbox_pmic.h	/^#define REG2VAL(/;"	d
REG2_CTL	drivers/power/regulator/act8846.c	/^	REG2_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG2_VOL0	drivers/power/regulator/act8846.c	/^	REG2_VOL0	= 0x20,$/;"	e	enum:__anon8cd915960103	file:
REG2_VOL1	drivers/power/regulator/act8846.c	/^	REG2_VOL1,$/;"	e	enum:__anon8cd915960103	file:
REG3_CTL	drivers/power/regulator/act8846.c	/^	REG3_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG3_VOL0	drivers/power/regulator/act8846.c	/^	REG3_VOL0	= 0x30,$/;"	e	enum:__anon8cd915960103	file:
REG3_VOL1	drivers/power/regulator/act8846.c	/^	REG3_VOL1,$/;"	e	enum:__anon8cd915960103	file:
REG4_CTL	drivers/power/regulator/act8846.c	/^	REG4_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG4_SPEED_MASK	drivers/net/e1000.h	/^#define REG4_SPEED_MASK	/;"	d
REG4_VOL0	drivers/power/regulator/act8846.c	/^	REG4_VOL0	= 0x40,$/;"	e	enum:__anon8cd915960103	file:
REG4_VOL1	drivers/power/regulator/act8846.c	/^	REG4_VOL1,$/;"	e	enum:__anon8cd915960103	file:
REG5_CTL	drivers/power/regulator/act8846.c	/^	REG5_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG5_VOL	drivers/power/regulator/act8846.c	/^	REG5_VOL	= 0x50,$/;"	e	enum:__anon8cd915960103	file:
REG6_CTL	drivers/power/regulator/act8846.c	/^	REG6_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG6_VOL	drivers/power/regulator/act8846.c	/^	REG6_VOL	= 0X58,$/;"	e	enum:__anon8cd915960103	file:
REG7_CTL	drivers/power/regulator/act8846.c	/^	REG7_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG7_VOL	drivers/power/regulator/act8846.c	/^	REG7_VOL	= 0x60,$/;"	e	enum:__anon8cd915960103	file:
REG8	board/freescale/mx31ads/lowlevel_init.S	/^.macro REG8 reg, val$/;"	m
REG8	board/imx31_phycore/lowlevel_init.S	/^.macro REG8 reg, val$/;"	m
REG8_CTL	drivers/power/regulator/act8846.c	/^	REG8_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG8_VOL	drivers/power/regulator/act8846.c	/^	REG8_VOL	= 0x68,$/;"	e	enum:__anon8cd915960103	file:
REG9_CTL	drivers/power/regulator/act8846.c	/^	REG9_CTL,$/;"	e	enum:__anon8cd915960103	file:
REG9_SPEED_MASK	drivers/net/e1000.h	/^#define REG9_SPEED_MASK	/;"	d
REG9_VOL	drivers/power/regulator/act8846.c	/^	REG9_VOL	= 0x70,$/;"	e	enum:__anon8cd915960103	file:
REGAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	REGAD	/;"	d
REGEX	lib/Kconfig	/^config REGEX$/;"	c	menu:Library routines
REGISTER_BYTES	tools/gdb/remote.c	/^#define REGISTER_BYTES /;"	d	file:
REGISTER_LIST_END	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REGISTER_LIST_END	/;"	d
REGISTER_LIST_END	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REGISTER_LIST_END	/;"	d
REGISTER_M	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	REGISTER_M$/;"	e	enum:clock_recovery_m_value_type
REGISTER_M	arch/arm/mach-exynos/include/mach/dp_info.h	/^	REGISTER_M$/;"	e	enum:__anon79d8640c0d03
REGISTER_TYPE	arch/powerpc/cpu/ppc4xx/reginfo.c	/^enum REGISTER_TYPE {$/;"	g	file:
REGMAP	drivers/core/Kconfig	/^config REGMAP$/;"	c	menu:Generic Driver Options
REGNUM	board/freescale/b4860qds/b4860qds_qixis.h	/^#define REGNUM	/;"	d
REGNUM	board/freescale/corenet_ds/eth_superhydra.c	/^#define REGNUM	/;"	d	file:
REGPROG_INF	include/radeon.h	/^#define REGPROG_INF	/;"	d
REGS_AHB0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define REGS_AHB0_BASE	/;"	d
REGS_AHB0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define REGS_AHB0_BASE	/;"	d
REGS_AHB1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define REGS_AHB1_BASE	/;"	d
REGS_AHB1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define REGS_AHB1_BASE	/;"	d
REGS_AHB2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define REGS_AHB2_BASE	/;"	d
REGS_AHB2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define REGS_AHB2_BASE	/;"	d
REGS_APB0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define REGS_APB0_BASE	/;"	d
REGS_APB0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define REGS_APB0_BASE	/;"	d
REGS_APB1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define REGS_APB1_BASE	/;"	d
REGS_APB1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define REGS_APB1_BASE	/;"	d
REGS_OFS	arch/sparc/cpu/leon3/memcfg.h	/^#define REGS_OFS /;"	d
REGS_RCPUS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define REGS_RCPUS_BASE	/;"	d
REGS_RCPUS_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define REGS_RCPUS_BASE	/;"	d
REGS_SIZE	arch/sparc/cpu/leon3/memcfg.h	/^#define REGS_SIZE /;"	d
REGULATOR_ACT8846	drivers/power/regulator/Kconfig	/^config REGULATOR_ACT8846$/;"	c
REGULATOR_FLAG_AUTOSET_UA	include/power/regulator.h	/^	REGULATOR_FLAG_AUTOSET_UA	= 1 << 1,$/;"	e	enum:regulator_flag
REGULATOR_FLAG_AUTOSET_UV	include/power/regulator.h	/^	REGULATOR_FLAG_AUTOSET_UV	= 1 << 0,$/;"	e	enum:regulator_flag
REGULATOR_OFF	drivers/power/regulator/palmas_regulator.c	/^#define	REGULATOR_OFF	/;"	d	file:
REGULATOR_ON	drivers/power/regulator/palmas_regulator.c	/^#define	REGULATOR_ON	/;"	d	file:
REGULATOR_PWM	drivers/power/regulator/Kconfig	/^config REGULATOR_PWM$/;"	c
REGULATOR_RK808	drivers/power/regulator/Kconfig	/^config REGULATOR_RK808$/;"	c
REGULATOR_S5M8767	drivers/power/regulator/Kconfig	/^config REGULATOR_S5M8767$/;"	c
REGULATOR_TPS65090	drivers/power/regulator/Kconfig	/^config REGULATOR_TPS65090$/;"	c
REGULATOR_TYPE_BUCK	include/power/regulator.h	/^	REGULATOR_TYPE_BUCK,$/;"	e	enum:regulator_type
REGULATOR_TYPE_DVS	include/power/regulator.h	/^	REGULATOR_TYPE_DVS,$/;"	e	enum:regulator_type
REGULATOR_TYPE_FIXED	include/power/regulator.h	/^	REGULATOR_TYPE_FIXED,$/;"	e	enum:regulator_type
REGULATOR_TYPE_GPIO	include/power/regulator.h	/^	REGULATOR_TYPE_GPIO,$/;"	e	enum:regulator_type
REGULATOR_TYPE_LDO	include/power/regulator.h	/^	REGULATOR_TYPE_LDO = 0,$/;"	e	enum:regulator_type
REGULATOR_TYPE_OTHER	include/power/regulator.h	/^	REGULATOR_TYPE_OTHER,$/;"	e	enum:regulator_type
REGULATOR_V_SEL_950MV	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define REGULATOR_V_SEL_950MV	/;"	d
REG_ACC0	include/fsl_pmic.h	/^	REG_ACC0,$/;"	e	enum:__anond57df49b0103
REG_ACC1	include/fsl_pmic.h	/^	REG_ACC1,		\/*10 *\/$/;"	e	enum:__anond57df49b0103
REG_ACCESS_TIMING	drivers/block/ftide020.h	/^unsigned int REG_ACCESS_TIMING[REG_PARAMETER][REG_MODE] = {$/;"	v	typeref:typename:unsigned int[][]
REG_ADC0	include/fsl_pmic.h	/^	REG_ADC0,$/;"	e	enum:__anond57df49b0103
REG_ADC1	include/fsl_pmic.h	/^	REG_ADC1,$/;"	e	enum:__anond57df49b0103
REG_ADC2	include/fsl_pmic.h	/^	REG_ADC2,$/;"	e	enum:__anond57df49b0103
REG_ADC3	include/fsl_pmic.h	/^	REG_ADC3,$/;"	e	enum:__anond57df49b0103
REG_ADC4	include/fsl_pmic.h	/^	REG_ADC4,$/;"	e	enum:__anond57df49b0103
REG_ADDR_MASK	drivers/net/ax88180.h	/^  #define REG_ADDR_MASK	/;"	d
REG_ADDU	arch/mips/include/asm/asm.h	/^#define REG_ADDU	/;"	d
REG_AR_BASE	arch/xtensa/include/asm/ptrace.h	/^#define REG_AR_BASE	/;"	d
REG_A_BASE	arch/xtensa/include/asm/ptrace.h	/^#define REG_A_BASE	/;"	d
REG_BOOTROM_ROUTINE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_BOOTROM_ROUTINE_ADDR	/;"	d
REG_BOOTROM_ROUTINE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_BOOTROM_ROUTINE_ADDR	/;"	d
REG_BOOTROM_ROUTINE_DRAM_INIT_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_BOOTROM_ROUTINE_DRAM_INIT_OFFS	/;"	d
REG_BOOTROM_ROUTINE_DRAM_INIT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_BOOTROM_ROUTINE_DRAM_INIT_OFFS	/;"	d
REG_BUCK1_CONFIG	include/power/rk808_pmic.h	/^	REG_BUCK1_CONFIG,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK1_DVS_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK1_DVS_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK1_ON_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK1_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK1_SLP_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK1_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK2_CONFIG	include/power/rk808_pmic.h	/^	REG_BUCK2_CONFIG,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK2_DVS_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK2_DVS_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK2_ON_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK2_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK2_SLP_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK2_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK3_CONFIG	include/power/rk808_pmic.h	/^	REG_BUCK3_CONFIG,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK4_CONFIG	include/power/rk808_pmic.h	/^	REG_BUCK4_CONFIG,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK4_ON_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK4_ON_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_BUCK4_SLP_VSEL	include/power/rk808_pmic.h	/^	REG_BUCK4_SLP_VSEL,$/;"	e	enum:__anon9b8afd0f0103
REG_CDI_CONFIG_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CDI_CONFIG_ADDR	/;"	d
REG_CDI_CONFIG_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CDI_CONFIG_ADDR	/;"	d
REG_CG_CTRL0	include/power/tps65090.h	/^	REG_CG_CTRL0 = 4,$/;"	e	enum:__anon01d79aa50103
REG_CG_STATUS1	include/power/tps65090.h	/^	REG_CG_STATUS1 = 0xa,$/;"	e	enum:__anon01d79aa50103
REG_CHARGE	include/fsl_pmic.h	/^	REG_CHARGE,$/;"	e	enum:__anond57df49b0103
REG_CNT	drivers/rtc/m41t11.c	/^#define REG_CNT /;"	d	file:
REG_CONFIG	drivers/usb/eth/mcs7830.c	/^#define REG_CONFIG	/;"	d	file:
REG_CONTROL_STATUS	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^REG_CONTROL_STATUS:$/;"	l
REG_CORE_DIV_CLK_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CORE_DIV_CLK_CTRL_ADDR	/;"	d
REG_CORE_DIV_CLK_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CORE_DIV_CLK_CTRL_ADDR	/;"	d
REG_CORE_DIV_CLK_STATUS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CORE_DIV_CLK_STATUS_ADDR	/;"	d
REG_CORE_DIV_CLK_STATUS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CORE_DIV_CLK_STATUS_ADDR	/;"	d
REG_COUNT	arch/sandbox/include/asm/rtc.h	/^	REG_COUNT	= 0x80,$/;"	e	enum:__anon539924f20103
REG_COUNT	drivers/rtc/sandbox_rtc.c	/^#define REG_COUNT /;"	d	file:
REG_CPUCS_WIN_ENABLE	arch/arm/mach-mvebu/dram.c	/^#define REG_CPUCS_WIN_ENABLE	/;"	d	file:
REG_CPUCS_WIN_SIZE	arch/arm/mach-mvebu/dram.c	/^#define REG_CPUCS_WIN_SIZE(/;"	d	file:
REG_CPUCS_WIN_WIN0_CS	arch/arm/mach-mvebu/dram.c	/^#define REG_CPUCS_WIN_WIN0_CS(/;"	d	file:
REG_CPUCS_WIN_WR_PROTECT	arch/arm/mach-mvebu/dram.c	/^#define REG_CPUCS_WIN_WR_PROTECT	/;"	d	file:
REG_CPU_DIV_CLK_ALL_STABLE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_ALL_STABLE_OFFS	/;"	d
REG_CPU_DIV_CLK_ALL_STABLE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_ALL_STABLE_OFFS	/;"	d
REG_CPU_DIV_CLK_CTRL_0_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_0_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_0_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_0_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_0_NEW_RATIO	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_0_NEW_RATIO	/;"	d
REG_CPU_DIV_CLK_CTRL_0_NEW_RATIO	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_0_NEW_RATIO	/;"	d
REG_CPU_DIV_CLK_CTRL_1_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_1_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_1_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_1_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_2_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_2_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_2_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_2_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_3_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_3_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_3_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_3_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK	/;"	d
REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_3_FREQ_MASK	/;"	d
REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS	/;"	d
REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS	/;"	d
REG_CPU_DIV_CLK_CTRL_4_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_CTRL_4_ADDR	/;"	d
REG_CPU_DIV_CLK_CTRL_4_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_CTRL_4_ADDR	/;"	d
REG_CPU_DIV_CLK_STATUS_0_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_DIV_CLK_STATUS_0_ADDR	/;"	d
REG_CPU_DIV_CLK_STATUS_0_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_DIV_CLK_STATUS_0_ADDR	/;"	d
REG_CPU_PLL_CTRL_0_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_PLL_CTRL_0_ADDR	/;"	d
REG_CPU_PLL_CTRL_0_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_PLL_CTRL_0_ADDR	/;"	d
REG_CPU_PLL_STATUS_0_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CPU_PLL_STATUS_0_ADDR	/;"	d
REG_CPU_PLL_STATUS_0_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CPU_PLL_STATUS_0_ADDR	/;"	d
REG_CS_SIZE_SCRATCH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_CS_SIZE_SCRATCH_ADDR	/;"	d
REG_CS_SIZE_SCRATCH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_CS_SIZE_SCRATCH_ADDR	/;"	d
REG_CS_TIM	arch/arm/include/asm/emif.h	/^#define REG_CS_TIM	/;"	d
REG_CTL	drivers/gpio/pm8916_gpio.c	/^#define REG_CTL /;"	d	file:
REG_CTL_MODE_INOUT	drivers/gpio/pm8916_gpio.c	/^#define REG_CTL_MODE_INOUT /;"	d	file:
REG_CTL_MODE_INPUT	drivers/gpio/pm8916_gpio.c	/^#define REG_CTL_MODE_INPUT /;"	d	file:
REG_CTL_MODE_MASK	drivers/gpio/pm8916_gpio.c	/^#define REG_CTL_MODE_MASK /;"	d	file:
REG_CTL_MODE_OUTPUT	drivers/gpio/pm8916_gpio.c	/^#define REG_CTL_MODE_OUTPUT /;"	d	file:
REG_CTL_OUTPUT_MASK	drivers/gpio/pm8916_gpio.c	/^#define REG_CTL_OUTPUT_MASK /;"	d	file:
REG_CTRL_H	board/keymile/km_arm/km_arm.c	/^#define REG_CTRL_H	/;"	d	file:
REG_DCDC_EN	include/power/rk808_pmic.h	/^	REG_DCDC_EN			= 0x23,$/;"	e	enum:__anon9b8afd0f0103
REG_DCDC_PG	include/power/rk808_pmic.h	/^	REG_DCDC_PG,$/;"	e	enum:__anon9b8afd0f0103
REG_DCDC_UV_ACT	include/power/rk808_pmic.h	/^	REG_DCDC_UV_ACT,$/;"	e	enum:__anon9b8afd0f0103
REG_DCDC_UV_STS	include/power/rk808_pmic.h	/^	REG_DCDC_UV_STS,$/;"	e	enum:__anon9b8afd0f0103
REG_DDR3_MR0_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR0_ADDR	/;"	d
REG_DDR3_MR0_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR0_ADDR	/;"	d
REG_DDR3_MR0_CL_HIGH_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR0_CL_HIGH_OFFS	/;"	d
REG_DDR3_MR0_CL_HIGH_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR0_CL_HIGH_OFFS	/;"	d
REG_DDR3_MR0_CL_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR0_CL_MASK	/;"	d
REG_DDR3_MR0_CL_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR0_CL_MASK	/;"	d
REG_DDR3_MR0_CL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR0_CL_OFFS	/;"	d
REG_DDR3_MR0_CL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR0_CL_OFFS	/;"	d
REG_DDR3_MR0_CS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR0_CS_ADDR	/;"	d
REG_DDR3_MR0_CS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR0_CS_ADDR	/;"	d
REG_DDR3_MR1_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR1_ADDR	/;"	d
REG_DDR3_MR1_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR1_ADDR	/;"	d
REG_DDR3_MR1_CS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR1_CS_ADDR	/;"	d
REG_DDR3_MR1_CS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR1_CS_ADDR	/;"	d
REG_DDR3_MR1_DLL_ENA_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_DLL_ENA_OFFS	/;"	d
REG_DDR3_MR1_DLL_ENA_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_DLL_ENA_OFFS	/;"	d
REG_DDR3_MR1_ODT_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_ODT_MASK	/;"	d
REG_DDR3_MR1_ODT_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_ODT_MASK	/;"	d
REG_DDR3_MR1_OUTBUF_DIS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_OUTBUF_DIS_OFFS	/;"	d
REG_DDR3_MR1_OUTBUF_DIS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_OUTBUF_DIS_OFFS	/;"	d
REG_DDR3_MR1_OUTBUF_WL_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_OUTBUF_WL_MASK	/;"	d
REG_DDR3_MR1_OUTBUF_WL_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_OUTBUF_WL_MASK	/;"	d
REG_DDR3_MR1_RTT_DISABLED	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_DISABLED	/;"	d
REG_DDR3_MR1_RTT_DISABLED	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_DISABLED	/;"	d
REG_DDR3_MR1_RTT_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_MASK	/;"	d
REG_DDR3_MR1_RTT_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_MASK	/;"	d
REG_DDR3_MR1_RTT_RZQ12	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_RZQ12	/;"	d
REG_DDR3_MR1_RTT_RZQ12	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_RZQ12	/;"	d
REG_DDR3_MR1_RTT_RZQ2	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_RZQ2	/;"	d
REG_DDR3_MR1_RTT_RZQ2	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_RZQ2	/;"	d
REG_DDR3_MR1_RTT_RZQ4	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_RZQ4	/;"	d
REG_DDR3_MR1_RTT_RZQ4	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_RZQ4	/;"	d
REG_DDR3_MR1_RTT_RZQ6	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_RZQ6	/;"	d
REG_DDR3_MR1_RTT_RZQ6	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_RZQ6	/;"	d
REG_DDR3_MR1_RTT_RZQ8	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_RTT_RZQ8	/;"	d
REG_DDR3_MR1_RTT_RZQ8	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_RTT_RZQ8	/;"	d
REG_DDR3_MR1_WL_ENA	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_WL_ENA	/;"	d
REG_DDR3_MR1_WL_ENA	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_WL_ENA	/;"	d
REG_DDR3_MR1_WL_ENA_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR1_WL_ENA_OFFS	/;"	d
REG_DDR3_MR1_WL_ENA_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR1_WL_ENA_OFFS	/;"	d
REG_DDR3_MR2_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR2_ADDR	/;"	d
REG_DDR3_MR2_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR2_ADDR	/;"	d
REG_DDR3_MR2_CS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR2_CS_ADDR	/;"	d
REG_DDR3_MR2_CS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR2_CS_ADDR	/;"	d
REG_DDR3_MR2_CWL_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR2_CWL_MASK	/;"	d
REG_DDR3_MR2_CWL_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR2_CWL_MASK	/;"	d
REG_DDR3_MR2_CWL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR2_CWL_OFFS	/;"	d
REG_DDR3_MR2_CWL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR2_CWL_OFFS	/;"	d
REG_DDR3_MR2_ODT_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_MR2_ODT_MASK	/;"	d
REG_DDR3_MR2_ODT_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_MR2_ODT_MASK	/;"	d
REG_DDR3_MR3_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR3_ADDR	/;"	d
REG_DDR3_MR3_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR3_ADDR	/;"	d
REG_DDR3_MR3_CS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define	REG_DDR3_MR3_CS_ADDR	/;"	d
REG_DDR3_MR3_CS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_DDR3_MR3_CS_ADDR	/;"	d
REG_DDR3_RANK_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_RANK_CTRL_ADDR	/;"	d
REG_DDR3_RANK_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_RANK_CTRL_ADDR	/;"	d
REG_DDR3_RANK_CTRL_CS_ENA_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_RANK_CTRL_CS_ENA_MASK	/;"	d
REG_DDR3_RANK_CTRL_CS_ENA_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_RANK_CTRL_CS_ENA_MASK	/;"	d
REG_DDR3_RANK_CTRL_MIRROR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR3_RANK_CTRL_MIRROR_OFFS	/;"	d
REG_DDR3_RANK_CTRL_MIRROR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR3_RANK_CTRL_MIRROR_OFFS	/;"	d
REG_DDRPHY_APLL_CTRL_2_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDRPHY_APLL_CTRL_2_ADDR	/;"	d
REG_DDRPHY_APLL_CTRL_2_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDRPHY_APLL_CTRL_2_ADDR	/;"	d
REG_DDRPHY_APLL_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDRPHY_APLL_CTRL_ADDR	/;"	d
REG_DDRPHY_APLL_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDRPHY_APLL_CTRL_ADDR	/;"	d
REG_DDR_CONT_HIGH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR_CONT_HIGH_ADDR	/;"	d
REG_DDR_CONT_HIGH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR_CONT_HIGH_ADDR	/;"	d
REG_DDR_IO_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR_IO_ADDR	/;"	d
REG_DDR_IO_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR_IO_ADDR	/;"	d
REG_DDR_IO_CLK_RATIO_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DDR_IO_CLK_RATIO_OFFS	/;"	d
REG_DDR_IO_CLK_RATIO_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DDR_IO_CLK_RATIO_OFFS	/;"	d
REG_DEPC	arch/xtensa/include/asm/ptrace.h	/^#define REG_DEPC	/;"	d
REG_DEVICE_SAR1_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_DEVICE_SAR1_ADDR	/;"	d
REG_DFS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_ADDR	/;"	d
REG_DFS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_ADDR	/;"	d
REG_DFS_ATSR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_ATSR_OFFS	/;"	d
REG_DFS_ATSR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_ATSR_OFFS	/;"	d
REG_DFS_BLOCK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_BLOCK_OFFS	/;"	d
REG_DFS_BLOCK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_BLOCK_OFFS	/;"	d
REG_DFS_CL_NEXT_STATE_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_CL_NEXT_STATE_MASK	/;"	d
REG_DFS_CL_NEXT_STATE_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_CL_NEXT_STATE_MASK	/;"	d
REG_DFS_CL_NEXT_STATE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_CL_NEXT_STATE_OFFS	/;"	d
REG_DFS_CL_NEXT_STATE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_CL_NEXT_STATE_OFFS	/;"	d
REG_DFS_CWL_NEXT_STATE_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_CWL_NEXT_STATE_MASK	/;"	d
REG_DFS_CWL_NEXT_STATE_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_CWL_NEXT_STATE_MASK	/;"	d
REG_DFS_CWL_NEXT_STATE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_CWL_NEXT_STATE_OFFS	/;"	d
REG_DFS_CWL_NEXT_STATE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_CWL_NEXT_STATE_OFFS	/;"	d
REG_DFS_DLLNEXTSTATE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_DLLNEXTSTATE_OFFS	/;"	d
REG_DFS_DLLNEXTSTATE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_DLLNEXTSTATE_OFFS	/;"	d
REG_DFS_RECONF_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_RECONF_OFFS	/;"	d
REG_DFS_RECONF_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_RECONF_OFFS	/;"	d
REG_DFS_SR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DFS_SR_OFFS	/;"	d
REG_DFS_SR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DFS_SR_OFFS	/;"	d
REG_DIG_OUT_CTL	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_OUT_CTL /;"	d	file:
REG_DIG_OUT_CTL_CMOS	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_OUT_CTL_CMOS /;"	d	file:
REG_DIG_OUT_CTL_DRIVE_L	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_OUT_CTL_DRIVE_L /;"	d	file:
REG_DIG_PULL_CTL	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_PULL_CTL /;"	d	file:
REG_DIG_PULL_NO_PU	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_PULL_NO_PU /;"	d	file:
REG_DIG_VIN_CTL	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_VIN_CTL /;"	d	file:
REG_DIG_VIN_VIN0	drivers/gpio/pm8916_gpio.c	/^#define REG_DIG_VIN_VIN0 /;"	d	file:
REG_DIMM_SKIP_WL	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define REG_DIMM_SKIP_WL	/;"	d
REG_DISABLE	include/power/max77686_pmic.h	/^	REG_DISABLE = 0,$/;"	e	enum:__anon582827aa0203
REG_DRAM_ADDR_CTRL_DRIVE_STRENGTH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_ADDR_CTRL_DRIVE_STRENGTH_ADDR	/;"	d
REG_DRAM_ADDR_CTRL_DRIVE_STRENGTH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_ADDR_CTRL_DRIVE_STRENGTH_ADDR	/;"	d
REG_DRAM_AXI_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_AXI_CTRL_ADDR	/;"	d
REG_DRAM_AXI_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_AXI_CTRL_ADDR	/;"	d
REG_DRAM_AXI_CTRL_AXIDATABUSWIDTH_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_AXI_CTRL_AXIDATABUSWIDTH_OFFS	/;"	d
REG_DRAM_AXI_CTRL_AXIDATABUSWIDTH_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_AXI_CTRL_AXIDATABUSWIDTH_OFFS	/;"	d
REG_DRAM_DATA_DQS_DRIVE_STRENGTH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_DATA_DQS_DRIVE_STRENGTH_ADDR	/;"	d
REG_DRAM_DATA_DQS_DRIVE_STRENGTH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_DATA_DQS_DRIVE_STRENGTH_ADDR	/;"	d
REG_DRAM_FIFO_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_FIFO_CTRL_ADDR	/;"	d
REG_DRAM_FIFO_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_FIFO_CTRL_ADDR	/;"	d
REG_DRAM_HOR_CAL_MACHINE_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_HOR_CAL_MACHINE_CTRL_ADDR /;"	d
REG_DRAM_HOR_CAL_MACHINE_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_HOR_CAL_MACHINE_CTRL_ADDR	/;"	d
REG_DRAM_INIT_CTRL_STATUS_2_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_INIT_CTRL_STATUS_2_ADDR	/;"	d
REG_DRAM_INIT_CTRL_STATUS_2_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_INIT_CTRL_STATUS_2_ADDR	/;"	d
REG_DRAM_INIT_CTRL_STATUS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_INIT_CTRL_STATUS_ADDR	/;"	d
REG_DRAM_INIT_CTRL_STATUS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_INIT_CTRL_STATUS_ADDR	/;"	d
REG_DRAM_INIT_CTRL_TRN_CLK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_INIT_CTRL_TRN_CLK_OFFS	/;"	d
REG_DRAM_INIT_CTRL_TRN_CLK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_INIT_CTRL_TRN_CLK_OFFS	/;"	d
REG_DRAM_MAIN_PADS_CAL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_MAIN_PADS_CAL_ADDR	/;"	d
REG_DRAM_MAIN_PADS_CAL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_MAIN_PADS_CAL_ADDR	/;"	d
REG_DRAM_PHY_CONFIG_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_PHY_CONFIG_ADDR	/;"	d
REG_DRAM_PHY_CONFIG_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_PHY_CONFIG_ADDR	/;"	d
REG_DRAM_PHY_CONFIG_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_PHY_CONFIG_MASK	/;"	d
REG_DRAM_PHY_CONFIG_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_PHY_CONFIG_MASK	/;"	d
REG_DRAM_TRAINING_1_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_1_ADDR	/;"	d
REG_DRAM_TRAINING_1_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_1_ADDR	/;"	d
REG_DRAM_TRAINING_1_TRNBPOINT_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_1_TRNBPOINT_OFFS	/;"	d
REG_DRAM_TRAINING_1_TRNBPOINT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_1_TRNBPOINT_OFFS	/;"	d
REG_DRAM_TRAINING_2_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_ADDR	/;"	d
REG_DRAM_TRAINING_2_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_ADDR	/;"	d
REG_DRAM_TRAINING_2_ECC_MUX_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_ECC_MUX_OFFS	/;"	d
REG_DRAM_TRAINING_2_ECC_MUX_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_ECC_MUX_OFFS	/;"	d
REG_DRAM_TRAINING_2_FIFO_RST_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_FIFO_RST_OFFS	/;"	d
REG_DRAM_TRAINING_2_FIFO_RST_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_FIFO_RST_OFFS	/;"	d
REG_DRAM_TRAINING_2_OVERRUN_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_OVERRUN_OFFS	/;"	d
REG_DRAM_TRAINING_2_OVERRUN_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_OVERRUN_OFFS	/;"	d
REG_DRAM_TRAINING_2_RL_MODE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_RL_MODE_OFFS	/;"	d
REG_DRAM_TRAINING_2_RL_MODE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_RL_MODE_OFFS	/;"	d
REG_DRAM_TRAINING_2_SW_OVRD_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_SW_OVRD_OFFS	/;"	d
REG_DRAM_TRAINING_2_SW_OVRD_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_SW_OVRD_OFFS	/;"	d
REG_DRAM_TRAINING_2_WL_MODE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_2_WL_MODE_OFFS	/;"	d
REG_DRAM_TRAINING_2_WL_MODE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_2_WL_MODE_OFFS	/;"	d
REG_DRAM_TRAINING_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_ADDR	/;"	d
REG_DRAM_TRAINING_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_ADDR	/;"	d
REG_DRAM_TRAINING_AUTO_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_AUTO_OFFS	/;"	d
REG_DRAM_TRAINING_AUTO_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_AUTO_OFFS	/;"	d
REG_DRAM_TRAINING_CS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_CS_MASK	/;"	d
REG_DRAM_TRAINING_CS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_CS_MASK	/;"	d
REG_DRAM_TRAINING_CS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_CS_OFFS	/;"	d
REG_DRAM_TRAINING_CS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_CS_OFFS	/;"	d
REG_DRAM_TRAINING_DFS_FREQ_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_DFS_FREQ_OFFS	/;"	d
REG_DRAM_TRAINING_DFS_FREQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_DFS_FREQ_OFFS	/;"	d
REG_DRAM_TRAINING_DFS_REQ_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_DFS_REQ_OFFS	/;"	d
REG_DRAM_TRAINING_DFS_REQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_DFS_REQ_OFFS	/;"	d
REG_DRAM_TRAINING_DQS_RX_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_DQS_RX_OFFS	/;"	d
REG_DRAM_TRAINING_DQS_RX_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_DQS_RX_OFFS	/;"	d
REG_DRAM_TRAINING_DQS_TX_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_DQS_TX_OFFS	/;"	d
REG_DRAM_TRAINING_DQS_TX_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_DQS_TX_OFFS	/;"	d
REG_DRAM_TRAINING_ERROR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_ERROR_OFFS	/;"	d
REG_DRAM_TRAINING_ERROR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_ERROR_OFFS	/;"	d
REG_DRAM_TRAINING_LOW_FREQ_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_LOW_FREQ_OFFS	/;"	d
REG_DRAM_TRAINING_LOW_FREQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_LOW_FREQ_OFFS	/;"	d
REG_DRAM_TRAINING_MED_FREQ_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_MED_FREQ_OFFS	/;"	d
REG_DRAM_TRAINING_MED_FREQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_MED_FREQ_OFFS	/;"	d
REG_DRAM_TRAINING_PATTERNS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_PATTERNS_MASK	/;"	d
REG_DRAM_TRAINING_PATTERNS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_PATTERNS_MASK	/;"	d
REG_DRAM_TRAINING_PATTERNS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_PATTERNS_OFFS	/;"	d
REG_DRAM_TRAINING_PATTERNS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_PATTERNS_OFFS	/;"	d
REG_DRAM_TRAINING_PATTERN_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_PATTERN_BASE_ADDR	/;"	d
REG_DRAM_TRAINING_PATTERN_BASE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_PATTERN_BASE_ADDR	/;"	d
REG_DRAM_TRAINING_PATTERN_BASE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_PATTERN_BASE_OFFS	/;"	d
REG_DRAM_TRAINING_PATTERN_BASE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_PATTERN_BASE_OFFS	/;"	d
REG_DRAM_TRAINING_RETEST_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_RETEST_MASK	/;"	d
REG_DRAM_TRAINING_RETEST_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_RETEST_MASK	/;"	d
REG_DRAM_TRAINING_RETEST_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_RETEST_OFFS	/;"	d
REG_DRAM_TRAINING_RETEST_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_RETEST_OFFS	/;"	d
REG_DRAM_TRAINING_RETEST_PAR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_RETEST_PAR	/;"	d
REG_DRAM_TRAINING_RETEST_PAR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_RETEST_PAR	/;"	d
REG_DRAM_TRAINING_RL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_RL_OFFS	/;"	d
REG_DRAM_TRAINING_RL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_RL_OFFS	/;"	d
REG_DRAM_TRAINING_SHADOW_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_SHADOW_ADDR	/;"	d
REG_DRAM_TRAINING_SHADOW_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_SHADOW_ADDR	/;"	d
REG_DRAM_TRAINING_WL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_TRAINING_WL_OFFS	/;"	d
REG_DRAM_TRAINING_WL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_TRAINING_WL_OFFS	/;"	d
REG_DRAM_VER_CAL_MACHINE_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DRAM_VER_CAL_MACHINE_CTRL_ADDR /;"	d
REG_DRAM_VER_CAL_MACHINE_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DRAM_VER_CAL_MACHINE_CTRL_ADDR	/;"	d
REG_DUMP	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^#define REG_DUMP(/;"	d	file:
REG_DUMP	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^#define REG_DUMP(/;"	d	file:
REG_DUNIT_CTRL_LOW_2T_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_CTRL_LOW_2T_MASK	/;"	d
REG_DUNIT_CTRL_LOW_2T_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_CTRL_LOW_2T_MASK	/;"	d
REG_DUNIT_CTRL_LOW_2T_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_CTRL_LOW_2T_OFFS	/;"	d
REG_DUNIT_CTRL_LOW_2T_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_CTRL_LOW_2T_OFFS	/;"	d
REG_DUNIT_CTRL_LOW_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_CTRL_LOW_ADDR	/;"	d
REG_DUNIT_CTRL_LOW_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_CTRL_LOW_ADDR	/;"	d
REG_DUNIT_CTRL_LOW_DPDE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_CTRL_LOW_DPDE_OFFS	/;"	d
REG_DUNIT_CTRL_LOW_DPDE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_CTRL_LOW_DPDE_OFFS	/;"	d
REG_DUNIT_ODT_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_ODT_CTRL_ADDR	/;"	d
REG_DUNIT_ODT_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_ODT_CTRL_ADDR	/;"	d
REG_DUNIT_ODT_CTRL_OVRD_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_ODT_CTRL_OVRD_OFFS /;"	d
REG_DUNIT_ODT_CTRL_OVRD_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_ODT_CTRL_OVRD_OFFS /;"	d
REG_DUNIT_ODT_CTRL_OVRD_VAL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DUNIT_ODT_CTRL_OVRD_VAL_OFFS /;"	d
REG_DUNIT_ODT_CTRL_OVRD_VAL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DUNIT_ODT_CTRL_OVRD_VAL_OFFS /;"	d
REG_DYNAMIC_POWER_SAVE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_DYNAMIC_POWER_SAVE_ADDR /;"	d
REG_DYNAMIC_POWER_SAVE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_DYNAMIC_POWER_SAVE_ADDR	/;"	d
REG_ENABLE	include/power/max77686_pmic.h	/^	REG_ENABLE$/;"	e	enum:__anon582827aa0203
REG_EN_CTL	drivers/gpio/pm8916_gpio.c	/^#define REG_EN_CTL /;"	d	file:
REG_EN_CTL_ENABLE	drivers/gpio/pm8916_gpio.c	/^#define REG_EN_CTL_ENABLE /;"	d	file:
REG_ESDCTL_BASE_CONFIG	board/armadeus/apf27/apf27.h	/^#define REG_ESDCTL_BASE_CONFIG /;"	d
REG_ETHER_ADDR	drivers/usb/eth/mcs7830.c	/^#define REG_ETHER_ADDR	/;"	d	file:
REG_EXCCAUSE	arch/xtensa/include/asm/ptrace.h	/^#define REG_EXCCAUSE	/;"	d
REG_EXCVADDR	arch/xtensa/include/asm/ptrace.h	/^#define REG_EXCVADDR	/;"	d
REG_FABRIC_LOCAL_IRQ_MASK_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_FABRIC_LOCAL_IRQ_MASK_ADDR	/;"	d
REG_FABRIC_LOCAL_IRQ_MASK_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_FABRIC_LOCAL_IRQ_MASK_ADDR	/;"	d
REG_FABRIC_LOCAL_IRQ_PMU_MASK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_FABRIC_LOCAL_IRQ_PMU_MASK_OFFS	/;"	d
REG_FABRIC_LOCAL_IRQ_PMU_MASK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_FABRIC_LOCAL_IRQ_PMU_MASK_OFFS	/;"	d
REG_FASTPATH_WIN_0_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_FASTPATH_WIN_0_CTRL_ADDR	/;"	d
REG_FASTPATH_WIN_0_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_FASTPATH_WIN_0_CTRL_ADDR	/;"	d
REG_FASTPATH_WIN_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_FASTPATH_WIN_BASE_ADDR(/;"	d
REG_FASTPATH_WIN_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_FASTPATH_WIN_CTRL_ADDR(/;"	d
REG_FET1_CTRL	include/power/tps65090.h	/^	REG_FET1_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET2_CTRL	include/power/tps65090.h	/^	REG_FET2_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET3_CTRL	include/power/tps65090.h	/^	REG_FET3_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET4_CTRL	include/power/tps65090.h	/^	REG_FET4_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET5_CTRL	include/power/tps65090.h	/^	REG_FET5_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET6_CTRL	include/power/tps65090.h	/^	REG_FET6_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET7_CTRL	include/power/tps65090.h	/^	REG_FET7_CTRL,$/;"	e	enum:__anon01d79aa50103
REG_FET_BASE	include/power/tps65090.h	/^	REG_FET_BASE = 0xe,	\/* Not a real register, FETs count from here *\/$/;"	e	enum:__anon01d79aa50103
REG_FIELD_SCLIMX_VAL	board/armadeus/apf27/apf27.h	/^#define REG_FIELD_SCLIMX_VAL /;"	d
REG_FIELD_SCL_VAL	board/armadeus/apf27/apf27.h	/^#define REG_FIELD_SCL_VAL /;"	d
REG_FIELD_SCL_VAL	board/armadeus/apf27/apf27.h	/^#define REG_FIELD_SCL_VAL\\/;"	d
REG_FIELD_SRC_VAL	board/armadeus/apf27/apf27.h	/^#define REG_FIELD_SRC_VAL /;"	d
REG_FIELD_SRC_VAL	board/armadeus/apf27/apf27.h	/^#define REG_FIELD_SRC_VAL\\/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/denx/mcvevk/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/ebv/socrates/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/is1/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/sr1500/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE /;"	d
REG_FILE_INIT_SEQ_SIGNATURE	board/terasic/sockit/qts/sdram_config.h	/^#define REG_FILE_INIT_SEQ_SIGNATURE	/;"	d
REG_FPREG0	arch/sh/include/asm/ptrace.h	/^#define REG_FPREG0	/;"	d
REG_FPREG15	arch/sh/include/asm/ptrace.h	/^#define REG_FPREG15	/;"	d
REG_FPSCR	arch/sh/include/asm/ptrace.h	/^#define REG_FPSCR	/;"	d
REG_FPUL	arch/sh/include/asm/ptrace.h	/^#define REG_FPUL	/;"	d
REG_FRAME_DROP_COUNTER	drivers/usb/eth/mcs7830.c	/^#define REG_FRAME_DROP_COUNTER	/;"	d	file:
REG_GBR	arch/sh/include/asm/ptrace.h	/^#define REG_GBR	/;"	d
REG_GLOBAL_START_ADDR	board/micronas/vct/vct.h	/^#define REG_GLOBAL_START_ADDR	/;"	d
REG_HOUR	arch/sandbox/include/asm/rtc.h	/^	REG_HOUR,$/;"	e	enum:__anon539924f20103
REG_IDENTIFICATION	include/fsl_pmic.h	/^	REG_IDENTIFICATION,$/;"	e	enum:__anond57df49b0103
REG_INT_MASK0	include/fsl_pmic.h	/^	REG_INT_MASK0,$/;"	e	enum:__anond57df49b0103
REG_INT_MASK1	include/fsl_pmic.h	/^	REG_INT_MASK1,$/;"	e	enum:__anond57df49b0103
REG_INT_SENSE0	include/fsl_pmic.h	/^	REG_INT_SENSE0,$/;"	e	enum:__anond57df49b0103
REG_INT_SENSE1	include/fsl_pmic.h	/^	REG_INT_SENSE1,$/;"	e	enum:__anond57df49b0103
REG_INT_STATUS0	include/fsl_pmic.h	/^	REG_INT_STATUS0 = 0,$/;"	e	enum:__anond57df49b0103
REG_INT_STATUS1	include/fsl_pmic.h	/^	REG_INT_STATUS1,$/;"	e	enum:__anond57df49b0103
REG_IO_BASE	include/radeon.h	/^#define REG_IO_BASE	/;"	d
REG_IRQ1	include/power/tps65090.h	/^	REG_IRQ1 = 0,$/;"	e	enum:__anon01d79aa50103
REG_IRQ_CIRQ2	board/keymile/km_arm/km_arm.c	/^#define REG_IRQ_CIRQ2	/;"	d	file:
REG_L	arch/mips/include/asm/asm.h	/^#define REG_L	/;"	d
REG_LBEG	arch/xtensa/include/asm/ptrace.h	/^#define REG_LBEG	/;"	d
REG_LCCR0	drivers/video/pxa_lcd.c	/^# define REG_LCCR0	/;"	d	file:
REG_LCCR0	drivers/video/pxa_lcd.c	/^#define REG_LCCR0	/;"	d	file:
REG_LCCR3	drivers/video/pxa_lcd.c	/^# define REG_LCCR3	/;"	d	file:
REG_LCCR3	drivers/video/pxa_lcd.c	/^#define REG_LCCR3	/;"	d	file:
REG_LCOUNT	arch/xtensa/include/asm/ptrace.h	/^#define REG_LCOUNT	/;"	d
REG_LDO_EN	include/power/rk808_pmic.h	/^	REG_LDO_EN,$/;"	e	enum:__anon9b8afd0f0103
REG_LDO_PG	include/power/rk808_pmic.h	/^	REG_LDO_PG,$/;"	e	enum:__anon9b8afd0f0103
REG_LDO_UV_ACT	include/power/rk808_pmic.h	/^	REG_LDO_UV_ACT,$/;"	e	enum:__anon9b8afd0f0103
REG_LDO_UV_STS	include/power/rk808_pmic.h	/^	REG_LDO_UV_STS,$/;"	e	enum:__anon9b8afd0f0103
REG_LED_CTL0	include/fsl_pmic.h	/^	REG_LED_CTL0,$/;"	e	enum:__anond57df49b0103
REG_LED_CTL1	include/fsl_pmic.h	/^	REG_LED_CTL1,$/;"	e	enum:__anond57df49b0103
REG_LED_CTL2	include/fsl_pmic.h	/^	REG_LED_CTL2,$/;"	e	enum:__anond57df49b0103
REG_LED_CTL3	include/fsl_pmic.h	/^	REG_LED_CTL3,$/;"	e	enum:__anond57df49b0103
REG_LEND	arch/xtensa/include/asm/ptrace.h	/^#define REG_LEND	/;"	d
REG_LR	arch/avr32/include/asm/ptrace.h	/^#define REG_LR	/;"	d
REG_MACH	arch/sh/include/asm/ptrace.h	/^#define REG_MACH	/;"	d
REG_MACL	arch/sh/include/asm/ptrace.h	/^#define REG_MACL	/;"	d
REG_MASK	drivers/power/pmic/pm8916.c	/^#define REG_MASK /;"	d	file:
REG_MDAY	arch/sandbox/include/asm/rtc.h	/^	REG_MDAY,$/;"	e	enum:__anon539924f20103
REG_MEM_A	include/fsl_pmic.h	/^	REG_MEM_A,$/;"	e	enum:__anond57df49b0103
REG_MEM_B	include/fsl_pmic.h	/^	REG_MEM_B,$/;"	e	enum:__anond57df49b0103
REG_MEM_BASE	include/radeon.h	/^#define REG_MEM_BASE	/;"	d
REG_METAL_MASK_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_METAL_MASK_ADDR	/;"	d
REG_METAL_MASK_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_METAL_MASK_ADDR	/;"	d
REG_METAL_MASK_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_METAL_MASK_MASK	/;"	d
REG_METAL_MASK_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_METAL_MASK_MASK	/;"	d
REG_METAL_MASK_RETRY_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_METAL_MASK_RETRY_OFFS	/;"	d
REG_METAL_MASK_RETRY_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_METAL_MASK_RETRY_OFFS	/;"	d
REG_MIN	arch/sandbox/include/asm/rtc.h	/^	REG_MIN,$/;"	e	enum:__anon539924f20103
REG_MODE	drivers/block/ftide020.h	/^#define REG_MODE	/;"	d
REG_MODE0	drivers/block/ftide020.h	/^#define REG_MODE0	/;"	d
REG_MODE1	drivers/block/ftide020.h	/^#define REG_MODE1	/;"	d
REG_MODE2	drivers/block/ftide020.h	/^#define REG_MODE2	/;"	d
REG_MODE3	drivers/block/ftide020.h	/^#define REG_MODE3	/;"	d
REG_MODE4	drivers/block/ftide020.h	/^#define REG_MODE4	/;"	d
REG_MODE_0	include/fsl_pmic.h	/^	REG_MODE_0,$/;"	e	enum:__anond57df49b0103
REG_MODE_1	include/fsl_pmic.h	/^	REG_MODE_1,$/;"	e	enum:__anond57df49b0103
REG_MON	arch/sandbox/include/asm/rtc.h	/^	REG_MON,$/;"	e	enum:__anon539924f20103
REG_MULTICAST_HASH	drivers/usb/eth/mcs7830.c	/^#define REG_MULTICAST_HASH	/;"	d	file:
REG_NUM	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define REG_NUM /;"	d
REG_ODPG_CNTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ODPG_CNTRL_ADDR	/;"	d
REG_ODPG_CNTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ODPG_CNTRL_ADDR	/;"	d
REG_ODPG_CNTRL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ODPG_CNTRL_OFFS	/;"	d
REG_ODPG_CNTRL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ODPG_CNTRL_OFFS	/;"	d
REG_ODT_OFF_CTL_RD_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ODT_OFF_CTL_RD_OFFS /;"	d
REG_ODT_OFF_CTL_RD_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ODT_OFF_CTL_RD_OFFS /;"	d
REG_ODT_ON_CTL_RD_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ODT_ON_CTL_RD_OFFS /;"	d
REG_ODT_ON_CTL_RD_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ODT_ON_CTL_RD_OFFS /;"	d
REG_ODT_TIME_HIGH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ODT_TIME_HIGH_ADDR	/;"	d
REG_ODT_TIME_HIGH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ODT_TIME_HIGH_ADDR	/;"	d
REG_ODT_TIME_LOW_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ODT_TIME_LOW_ADDR	/;"	d
REG_ODT_TIME_LOW_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ODT_TIME_LOW_ADDR	/;"	d
REG_OFFSET	drivers/gpio/pm8916_gpio.c	/^#define REG_OFFSET(/;"	d	file:
REG_OUDDR3_TIMING_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_OUDDR3_TIMING_ADDR	/;"	d
REG_OUDDR3_TIMING_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_OUDDR3_TIMING_ADDR	/;"	d
REG_P	arch/arm/mach-davinci/include/mach/hardware.h	/^#define REG_P(/;"	d
REG_P	arch/arm/mach-keystone/include/mach/hardware.h	/^#define REG_P(/;"	d
REG_PARAMETER	drivers/block/ftide020.h	/^#define REG_PARAMETER	/;"	d
REG_PAUSE_THRESHOLD	drivers/usb/eth/mcs7830.c	/^#define REG_PAUSE_THRESHOLD	/;"	d	file:
REG_PC	arch/avr32/include/asm/ptrace.h	/^#define REG_PC	/;"	d
REG_PC	arch/sh/include/asm/ptrace.h	/^#define REG_PC	/;"	d
REG_PC	arch/xtensa/include/asm/ptrace.h	/^#define REG_PC	/;"	d
REG_PD_TIM	arch/arm/include/asm/emif.h	/^#define REG_PD_TIM	/;"	d
REG_PHY_ADDR_MASK	drivers/net/sun8i_emac.c	/^#define REG_PHY_ADDR_MASK	/;"	d	file:
REG_PHY_BC_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_BC_OFFS	/;"	d
REG_PHY_BC_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_BC_OFFS	/;"	d
REG_PHY_CMD	drivers/usb/eth/mcs7830.c	/^#define REG_PHY_CMD	/;"	d	file:
REG_PHY_CNTRL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_CNTRL_OFFS	/;"	d
REG_PHY_CNTRL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_CNTRL_OFFS	/;"	d
REG_PHY_CS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_CS_OFFS	/;"	d
REG_PHY_CS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_CS_OFFS	/;"	d
REG_PHY_DATA	drivers/usb/eth/mcs7830.c	/^#define REG_PHY_DATA	/;"	d	file:
REG_PHY_DQS_REF_DLY_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_DQS_REF_DLY_OFFS	/;"	d
REG_PHY_DQS_REF_DLY_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_DQS_REF_DLY_OFFS	/;"	d
REG_PHY_LOCK_APLL_ADLL_STATUS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_LOCK_APLL_ADLL_STATUS_MASK	/;"	d
REG_PHY_LOCK_APLL_ADLL_STATUS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_LOCK_APLL_ADLL_STATUS_MASK	/;"	d
REG_PHY_LOCK_MASK_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_LOCK_MASK_ADDR	/;"	d
REG_PHY_LOCK_MASK_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_LOCK_MASK_ADDR	/;"	d
REG_PHY_LOCK_MASK_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_LOCK_MASK_MASK	/;"	d
REG_PHY_LOCK_MASK_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_LOCK_MASK_MASK	/;"	d
REG_PHY_LOCK_STATUS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_LOCK_STATUS_ADDR	/;"	d
REG_PHY_LOCK_STATUS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_LOCK_STATUS_ADDR	/;"	d
REG_PHY_LOCK_STATUS_LOCK_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_LOCK_STATUS_LOCK_MASK	/;"	d
REG_PHY_LOCK_STATUS_LOCK_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_LOCK_STATUS_LOCK_MASK	/;"	d
REG_PHY_LOCK_STATUS_LOCK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_LOCK_STATUS_LOCK_OFFS	/;"	d
REG_PHY_LOCK_STATUS_LOCK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_LOCK_STATUS_LOCK_OFFS	/;"	d
REG_PHY_PHASE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_PHASE_OFFS	/;"	d
REG_PHY_PHASE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_PHASE_OFFS	/;"	d
REG_PHY_PUP_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_PUP_OFFS	/;"	d
REG_PHY_PUP_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_PUP_OFFS	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_ADDR	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_ADDR	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_OP_DONE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_OP_DONE	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_OP_DONE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_OP_DONE	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_OP_RD	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_OP_RD	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_OP_RD	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_OP_RD	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_OP_WR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_OP_WR	/;"	d
REG_PHY_REGISTRY_FILE_ACCESS_OP_WR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PHY_REGISTRY_FILE_ACCESS_OP_WR	/;"	d
REG_PHY_UNK_H3	arch/arm/mach-sunxi/usb_phy.c	/^#define REG_PHY_UNK_H3	/;"	d	file:
REG_PMU_DUNIT_ACK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PMU_DUNIT_ACK_OFFS	/;"	d
REG_PMU_DUNIT_ACK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PMU_DUNIT_ACK_OFFS	/;"	d
REG_PMU_DUNIT_BLK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PMU_DUNIT_BLK_OFFS	/;"	d
REG_PMU_DUNIT_BLK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PMU_DUNIT_BLK_OFFS	/;"	d
REG_PMU_DUNIT_RFRS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PMU_DUNIT_RFRS_OFFS	/;"	d
REG_PMU_DUNIT_RFRS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PMU_DUNIT_RFRS_OFFS	/;"	d
REG_PMU_I_F_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PMU_I_F_CTRL_ADDR	/;"	d
REG_PMU_I_F_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PMU_I_F_CTRL_ADDR	/;"	d
REG_PMU_UNK_H3	arch/arm/mach-sunxi/usb_phy.c	/^#define REG_PMU_UNK_H3	/;"	d	file:
REG_PM_CTRL_CONFIG_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PM_CTRL_CONFIG_ADDR	/;"	d
REG_PM_CTRL_CONFIG_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PM_CTRL_CONFIG_ADDR	/;"	d
REG_PM_CTRL_CONFIG_DFS_REQ_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PM_CTRL_CONFIG_DFS_REQ_OFFS	/;"	d
REG_PM_CTRL_CONFIG_DFS_REQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PM_CTRL_CONFIG_DFS_REQ_OFFS	/;"	d
REG_PM_EVENT_STAT_MASK_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PM_EVENT_STAT_MASK_ADDR	/;"	d
REG_PM_EVENT_STAT_MASK_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PM_EVENT_STAT_MASK_ADDR	/;"	d
REG_PM_EVENT_STAT_MASK_DFS_DONE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PM_EVENT_STAT_MASK_DFS_DONE_OFFS	/;"	d
REG_PM_EVENT_STAT_MASK_DFS_DONE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PM_EVENT_STAT_MASK_DFS_DONE_OFFS	/;"	d
REG_PM_STAT_MASK_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PM_STAT_MASK_ADDR	/;"	d
REG_PM_STAT_MASK_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PM_STAT_MASK_ADDR	/;"	d
REG_PM_STAT_MASK_CPU0_IDLE_MASK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_PM_STAT_MASK_CPU0_IDLE_MASK_OFFS	/;"	d
REG_PM_STAT_MASK_CPU0_IDLE_MASK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_PM_STAT_MASK_CPU0_IDLE_MASK_OFFS	/;"	d
REG_POWER_CTL0	include/fsl_pmic.h	/^	REG_POWER_CTL0,$/;"	e	enum:__anond57df49b0103
REG_POWER_CTL1	include/fsl_pmic.h	/^	REG_POWER_CTL1,$/;"	e	enum:__anond57df49b0103
REG_POWER_CTL2	include/fsl_pmic.h	/^	REG_POWER_CTL2,$/;"	e	enum:__anond57df49b0103
REG_POWER_MISC	include/fsl_pmic.h	/^	REG_POWER_MISC,$/;"	e	enum:__anond57df49b0103
REG_PR	arch/sh/include/asm/ptrace.h	/^#define REG_PR	/;"	d
REG_PS	arch/xtensa/include/asm/ptrace.h	/^#define REG_PS	/;"	d
REG_PU_MODE_S	include/fsl_pmic.h	/^	REG_PU_MODE_S,$/;"	e	enum:__anond57df49b0103
REG_R0	arch/avr32/include/asm/ptrace.h	/^#define REG_R0	/;"	d
REG_R1	arch/avr32/include/asm/ptrace.h	/^#define REG_R1	/;"	d
REG_R10	arch/avr32/include/asm/ptrace.h	/^#define REG_R10	/;"	d
REG_R11	arch/avr32/include/asm/ptrace.h	/^#define REG_R11	/;"	d
REG_R12	arch/avr32/include/asm/ptrace.h	/^#define REG_R12	/;"	d
REG_R12_ORIG	arch/avr32/include/asm/ptrace.h	/^#define REG_R12_ORIG	/;"	d
REG_R2	arch/avr32/include/asm/ptrace.h	/^#define REG_R2	/;"	d
REG_R3	arch/avr32/include/asm/ptrace.h	/^#define REG_R3	/;"	d
REG_R4	arch/avr32/include/asm/ptrace.h	/^#define REG_R4	/;"	d
REG_R5	arch/avr32/include/asm/ptrace.h	/^#define REG_R5	/;"	d
REG_R6	arch/avr32/include/asm/ptrace.h	/^#define REG_R6	/;"	d
REG_R7	arch/avr32/include/asm/ptrace.h	/^#define REG_R7	/;"	d
REG_R8	arch/avr32/include/asm/ptrace.h	/^#define REG_R8	/;"	d
REG_R9	arch/avr32/include/asm/ptrace.h	/^#define REG_R9	/;"	d
REG_READ	drivers/net/cs8900.c	/^#define REG_READ(/;"	d	file:
REG_READ_BYTE	drivers/bios_emulator/biosemui.h	/^	REG_READ_BYTE = 0,$/;"	e	enum:__anonb186e4ea0103
REG_READ_DATA_READY_DELAYS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^#define REG_READ_DATA_READY_DELAYS_ADDR	/;"	d	file:
REG_READ_DATA_READY_DELAYS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_READ_DATA_READY_DELAYS_ADDR	/;"	d
REG_READ_DATA_READY_DELAYS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_READ_DATA_READY_DELAYS_ADDR	/;"	d
REG_READ_DATA_READY_DELAYS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^#define REG_READ_DATA_READY_DELAYS_MASK	/;"	d	file:
REG_READ_DATA_READY_DELAYS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_READ_DATA_READY_DELAYS_MASK	/;"	d
REG_READ_DATA_READY_DELAYS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_READ_DATA_READY_DELAYS_MASK	/;"	d
REG_READ_DATA_READY_DELAYS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^#define REG_READ_DATA_READY_DELAYS_OFFS	/;"	d	file:
REG_READ_DATA_READY_DELAYS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_READ_DATA_READY_DELAYS_OFFS	/;"	d
REG_READ_DATA_READY_DELAYS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_READ_DATA_READY_DELAYS_OFFS	/;"	d
REG_READ_DATA_SAMPLE_DELAYS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^#define REG_READ_DATA_SAMPLE_DELAYS_ADDR	/;"	d	file:
REG_READ_DATA_SAMPLE_DELAYS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_READ_DATA_SAMPLE_DELAYS_ADDR	/;"	d
REG_READ_DATA_SAMPLE_DELAYS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_READ_DATA_SAMPLE_DELAYS_ADDR	/;"	d
REG_READ_DATA_SAMPLE_DELAYS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^#define REG_READ_DATA_SAMPLE_DELAYS_MASK	/;"	d	file:
REG_READ_DATA_SAMPLE_DELAYS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_READ_DATA_SAMPLE_DELAYS_MASK	/;"	d
REG_READ_DATA_SAMPLE_DELAYS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_READ_DATA_SAMPLE_DELAYS_MASK	/;"	d
REG_READ_DATA_SAMPLE_DELAYS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^#define REG_READ_DATA_SAMPLE_DELAYS_OFFS	/;"	d	file:
REG_READ_DATA_SAMPLE_DELAYS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_READ_DATA_SAMPLE_DELAYS_OFFS	/;"	d
REG_READ_DATA_SAMPLE_DELAYS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_READ_DATA_SAMPLE_DELAYS_OFFS	/;"	d
REG_READ_DWORD	drivers/bios_emulator/biosemui.h	/^	REG_READ_DWORD = 2,$/;"	e	enum:__anonb186e4ea0103
REG_READ_WORD	drivers/bios_emulator/biosemui.h	/^	REG_READ_WORD = 1,$/;"	e	enum:__anonb186e4ea0103
REG_REG0	arch/sh/include/asm/ptrace.h	/^#define REG_REG0	/;"	d
REG_REG15	arch/sh/include/asm/ptrace.h	/^#define REG_REG15	/;"	d
REG_REGEN_ASSIGN	include/fsl_pmic.h	/^	REG_REGEN_ASSIGN,$/;"	e	enum:__anond57df49b0103
REG_REGISTERED_DRAM_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_REGISTERED_DRAM_CTRL_ADDR	/;"	d
REG_REGISTERED_DRAM_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_REGISTERED_DRAM_CTRL_ADDR	/;"	d
REG_REGISTERED_DRAM_CTRL_PARITY_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_REGISTERED_DRAM_CTRL_PARITY_MASK	/;"	d
REG_REGISTERED_DRAM_CTRL_PARITY_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_REGISTERED_DRAM_CTRL_PARITY_MASK	/;"	d
REG_REGISTERED_DRAM_CTRL_SR_FLOAT_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_REGISTERED_DRAM_CTRL_SR_FLOAT_OFFS	/;"	d
REG_REGISTERED_DRAM_CTRL_SR_FLOAT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_REGISTERED_DRAM_CTRL_SR_FLOAT_OFFS	/;"	d
REG_REG_BASE	include/radeon.h	/^#define REG_REG_BASE	/;"	d
REG_RESET	arch/sandbox/include/asm/rtc.h	/^	REG_RESET	= 0x20,$/;"	e	enum:__anon539924f20103
REG_RTC_ALARM	include/fsl_pmic.h	/^	REG_RTC_ALARM,$/;"	e	enum:__anond57df49b0103
REG_RTC_DAY	include/fsl_pmic.h	/^	REG_RTC_DAY,$/;"	e	enum:__anond57df49b0103
REG_RTC_DAY_ALARM	include/fsl_pmic.h	/^	REG_RTC_DAY_ALARM,$/;"	e	enum:__anond57df49b0103
REG_RTC_TIME	include/fsl_pmic.h	/^	REG_RTC_TIME,		\/*20 *\/$/;"	e	enum:__anond57df49b0103
REG_S	arch/mips/include/asm/asm.h	/^#define REG_S	/;"	d
REG_SAMPLE_RESET_CPU_ARCH_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_CPU_ARCH_OFFS	/;"	d
REG_SAMPLE_RESET_CPU_FREQ_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_CPU_FREQ_MASK	/;"	d
REG_SAMPLE_RESET_CPU_FREQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_CPU_FREQ_OFFS	/;"	d
REG_SAMPLE_RESET_FAB_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_FAB_MASK	/;"	d
REG_SAMPLE_RESET_FAB_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_FAB_OFFS	/;"	d
REG_SAMPLE_RESET_HIGH_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define	REG_SAMPLE_RESET_HIGH_ADDR	/;"	d
REG_SAMPLE_RESET_HIGH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SAMPLE_RESET_HIGH_ADDR	/;"	d
REG_SAMPLE_RESET_HIGH_CPU_FREQ_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_HIGH_CPU_FREQ_OFFS	/;"	d
REG_SAMPLE_RESET_LOW_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SAMPLE_RESET_LOW_ADDR	/;"	d
REG_SAMPLE_RESET_TCLK_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define	REG_SAMPLE_RESET_TCLK_OFFS	/;"	d
REG_SAR	arch/xtensa/include/asm/ptrace.h	/^#define REG_SAR	/;"	d
REG_SDRAM_ADDRESS_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ADDRESS_CTRL_ADDR	/;"	d
REG_SDRAM_ADDRESS_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ADDRESS_CTRL_ADDR	/;"	d
REG_SDRAM_ADDRESS_CTRL_STRUCT_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ADDRESS_CTRL_STRUCT_OFFS	/;"	d
REG_SDRAM_ADDRESS_CTRL_STRUCT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ADDRESS_CTRL_STRUCT_OFFS	/;"	d
REG_SDRAM_ADDRESS_SIZE_HIGH_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ADDRESS_SIZE_HIGH_OFFS	/;"	d
REG_SDRAM_ADDRESS_SIZE_HIGH_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ADDRESS_SIZE_HIGH_OFFS	/;"	d
REG_SDRAM_ADDRESS_SIZE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ADDRESS_SIZE_OFFS	/;"	d
REG_SDRAM_ADDRESS_SIZE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ADDRESS_SIZE_OFFS	/;"	d
REG_SDRAM_AUTO_PWR_SAVE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_AUTO_PWR_SAVE_ADDR /;"	d
REG_SDRAM_AUTO_PWR_SAVE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_AUTO_PWR_SAVE_ADDR	/;"	d
REG_SDRAM_CONFIG_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_ADDR	/;"	d
REG_SDRAM_CONFIG_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_ADDR	/;"	d
REG_SDRAM_CONFIG_ECC_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_ECC_OFFS	/;"	d
REG_SDRAM_CONFIG_ECC_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_ECC_OFFS	/;"	d
REG_SDRAM_CONFIG_IERR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_IERR_OFFS	/;"	d
REG_SDRAM_CONFIG_IERR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_IERR_OFFS	/;"	d
REG_SDRAM_CONFIG_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_MASK	/;"	d
REG_SDRAM_CONFIG_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_MASK	/;"	d
REG_SDRAM_CONFIG_PUPRSTDIV_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_PUPRSTDIV_OFFS	/;"	d
REG_SDRAM_CONFIG_PUPRSTDIV_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_PUPRSTDIV_OFFS	/;"	d
REG_SDRAM_CONFIG_REGDIMM_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_REGDIMM_OFFS	/;"	d
REG_SDRAM_CONFIG_REGDIMM_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_REGDIMM_OFFS	/;"	d
REG_SDRAM_CONFIG_RFRS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_RFRS_MASK	/;"	d
REG_SDRAM_CONFIG_RFRS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_RFRS_MASK	/;"	d
REG_SDRAM_CONFIG_RSTRD_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_RSTRD_OFFS	/;"	d
REG_SDRAM_CONFIG_RSTRD_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_RSTRD_OFFS	/;"	d
REG_SDRAM_CONFIG_WIDTH_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_CONFIG_WIDTH_OFFS	/;"	d
REG_SDRAM_CONFIG_WIDTH_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_CONFIG_WIDTH_OFFS	/;"	d
REG_SDRAM_ERROR_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ERROR_ADDR /;"	d
REG_SDRAM_ERROR_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ERROR_ADDR	/;"	d
REG_SDRAM_EXT_MODE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_EXT_MODE_ADDR	/;"	d
REG_SDRAM_EXT_MODE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_EXT_MODE_ADDR	/;"	d
REG_SDRAM_INIT_CKE_ASSERT_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_INIT_CKE_ASSERT_OFFS	/;"	d
REG_SDRAM_INIT_CKE_ASSERT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_INIT_CKE_ASSERT_OFFS	/;"	d
REG_SDRAM_INIT_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_INIT_CTRL_ADDR	/;"	d
REG_SDRAM_INIT_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_INIT_CTRL_ADDR	/;"	d
REG_SDRAM_INIT_CTRL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_INIT_CTRL_OFFS	/;"	d
REG_SDRAM_INIT_CTRL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_INIT_CTRL_OFFS	/;"	d
REG_SDRAM_INIT_RESET_DEASSERT_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_INIT_RESET_DEASSERT_OFFS	/;"	d
REG_SDRAM_INIT_RESET_DEASSERT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_INIT_RESET_DEASSERT_OFFS	/;"	d
REG_SDRAM_INIT_RESET_MASK_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_INIT_RESET_MASK_OFFS	/;"	d
REG_SDRAM_MODE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_MODE_ADDR	/;"	d
REG_SDRAM_MODE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_MODE_ADDR	/;"	d
REG_SDRAM_ODT_CTRL_HIGH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ODT_CTRL_HIGH_ADDR	/;"	d
REG_SDRAM_ODT_CTRL_HIGH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ODT_CTRL_HIGH_ADDR	/;"	d
REG_SDRAM_ODT_CTRL_HIGH_OVRD_ENA	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ODT_CTRL_HIGH_OVRD_ENA	/;"	d
REG_SDRAM_ODT_CTRL_HIGH_OVRD_ENA	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ODT_CTRL_HIGH_OVRD_ENA	/;"	d
REG_SDRAM_ODT_CTRL_HIGH_OVRD_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ODT_CTRL_HIGH_OVRD_MASK	/;"	d
REG_SDRAM_ODT_CTRL_HIGH_OVRD_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ODT_CTRL_HIGH_OVRD_MASK	/;"	d
REG_SDRAM_ODT_CTRL_LOW_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_ODT_CTRL_LOW_ADDR	/;"	d
REG_SDRAM_ODT_CTRL_LOW_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_ODT_CTRL_LOW_ADDR	/;"	d
REG_SDRAM_OPEN_PAGES_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPEN_PAGES_ADDR	/;"	d
REG_SDRAM_OPEN_PAGES_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPEN_PAGES_ADDR	/;"	d
REG_SDRAM_OPERATION_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_ADDR	/;"	d
REG_SDRAM_OPERATION_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_ADDR	/;"	d
REG_SDRAM_OPERATION_CMD_CWA	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_CWA	/;"	d
REG_SDRAM_OPERATION_CMD_CWA	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_CWA	/;"	d
REG_SDRAM_OPERATION_CMD_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_MASK	/;"	d
REG_SDRAM_OPERATION_CMD_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_MASK	/;"	d
REG_SDRAM_OPERATION_CMD_MR0	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_MR0	/;"	d
REG_SDRAM_OPERATION_CMD_MR0	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_MR0	/;"	d
REG_SDRAM_OPERATION_CMD_MR1	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_MR1	/;"	d
REG_SDRAM_OPERATION_CMD_MR1	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_MR1	/;"	d
REG_SDRAM_OPERATION_CMD_MR2	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_MR2	/;"	d
REG_SDRAM_OPERATION_CMD_MR2	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_MR2	/;"	d
REG_SDRAM_OPERATION_CMD_MR3	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_MR3	/;"	d
REG_SDRAM_OPERATION_CMD_MR3	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_MR3	/;"	d
REG_SDRAM_OPERATION_CMD_RFRS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_RFRS	/;"	d
REG_SDRAM_OPERATION_CMD_RFRS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_RFRS	/;"	d
REG_SDRAM_OPERATION_CMD_RFRS_DONE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CMD_RFRS_DONE	/;"	d
REG_SDRAM_OPERATION_CMD_RFRS_DONE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CMD_RFRS_DONE	/;"	d
REG_SDRAM_OPERATION_CS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CS_OFFS	/;"	d
REG_SDRAM_OPERATION_CS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CS_OFFS	/;"	d
REG_SDRAM_OPERATION_CWA_DATA_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CWA_DATA_MASK	/;"	d
REG_SDRAM_OPERATION_CWA_DATA_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CWA_DATA_MASK	/;"	d
REG_SDRAM_OPERATION_CWA_DATA_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CWA_DATA_OFFS	/;"	d
REG_SDRAM_OPERATION_CWA_DATA_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CWA_DATA_OFFS	/;"	d
REG_SDRAM_OPERATION_CWA_DELAY_SEL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CWA_DELAY_SEL_OFFS	/;"	d
REG_SDRAM_OPERATION_CWA_DELAY_SEL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CWA_DELAY_SEL_OFFS	/;"	d
REG_SDRAM_OPERATION_CWA_RC_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CWA_RC_MASK	/;"	d
REG_SDRAM_OPERATION_CWA_RC_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CWA_RC_MASK	/;"	d
REG_SDRAM_OPERATION_CWA_RC_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_OPERATION_CWA_RC_OFFS	/;"	d
REG_SDRAM_OPERATION_CWA_RC_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_OPERATION_CWA_RC_OFFS	/;"	d
REG_SDRAM_PINS_MUX	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_PINS_MUX	/;"	d
REG_SDRAM_TIMING_HIGH_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_HIGH_ADDR	/;"	d
REG_SDRAM_TIMING_HIGH_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_HIGH_ADDR	/;"	d
REG_SDRAM_TIMING_H_R2R_H_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2R_H_MASK	/;"	d
REG_SDRAM_TIMING_H_R2R_H_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2R_H_MASK	/;"	d
REG_SDRAM_TIMING_H_R2R_H_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2R_H_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2R_H_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2R_H_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2R_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2R_MASK	/;"	d
REG_SDRAM_TIMING_H_R2R_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2R_MASK	/;"	d
REG_SDRAM_TIMING_H_R2R_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2R_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2R_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2R_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_H_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_H_MASK	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_H_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_H_MASK	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_MASK	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_MASK	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_OFFS	/;"	d
REG_SDRAM_TIMING_H_R2W_W2R_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_R2W_W2R_OFFS	/;"	d
REG_SDRAM_TIMING_H_W2W_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_W2W_MASK	/;"	d
REG_SDRAM_TIMING_H_W2W_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_W2W_MASK	/;"	d
REG_SDRAM_TIMING_H_W2W_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_H_W2W_OFFS	/;"	d
REG_SDRAM_TIMING_H_W2W_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_H_W2W_OFFS	/;"	d
REG_SDRAM_TIMING_LOW_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SDRAM_TIMING_LOW_ADDR	/;"	d
REG_SDRAM_TIMING_LOW_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SDRAM_TIMING_LOW_ADDR	/;"	d
REG_SEC	arch/sandbox/include/asm/rtc.h	/^	REG_SEC		= 5,$/;"	e	enum:__anon539924f20103
REG_SETTING_0	include/fsl_pmic.h	/^	REG_SETTING_0,		\/*30 *\/$/;"	e	enum:__anond57df49b0103
REG_SETTING_1	include/fsl_pmic.h	/^	REG_SETTING_1,$/;"	e	enum:__anond57df49b0103
REG_SFABRIC_CLK_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SFABRIC_CLK_CTRL_ADDR	/;"	d
REG_SFABRIC_CLK_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SFABRIC_CLK_CTRL_ADDR	/;"	d
REG_SFABRIC_CLK_CTRL_SMPL_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SFABRIC_CLK_CTRL_SMPL_OFFS	/;"	d
REG_SFABRIC_CLK_CTRL_SMPL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SFABRIC_CLK_CTRL_SMPL_OFFS	/;"	d
REG_SLEEP_SET_OFF1	include/power/rk808_pmic.h	/^	REG_SLEEP_SET_OFF1,$/;"	e	enum:__anon9b8afd0f0103
REG_SLEEP_SET_OFF2	include/power/rk808_pmic.h	/^	REG_SLEEP_SET_OFF2,$/;"	e	enum:__anon9b8afd0f0103
REG_SP	arch/avr32/include/asm/ptrace.h	/^#define REG_SP	/;"	d
REG_SR	arch/avr32/include/asm/ptrace.h	/^#define REG_SR	/;"	d
REG_SR	arch/sh/include/asm/ptrace.h	/^#define REG_SR	/;"	d
REG_SRAM_CLEAN_BY_WAY_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SRAM_CLEAN_BY_WAY_ADDR	/;"	d
REG_SRAM_CLEAN_BY_WAY_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SRAM_CLEAN_BY_WAY_ADDR	/;"	d
REG_SRAM_L2_ENA_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SRAM_L2_ENA_ADDR	/;"	d
REG_SRAM_L2_ENA_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SRAM_L2_ENA_ADDR	/;"	d
REG_SRAM_WINDOW_0_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SRAM_WINDOW_0_ADDR	/;"	d
REG_SRAM_WINDOW_0_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SRAM_WINDOW_0_ADDR	/;"	d
REG_SRAM_WINDOW_0_ENA_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SRAM_WINDOW_0_ENA_OFFS	/;"	d
REG_SRAM_WINDOW_0_ENA_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SRAM_WINDOW_0_ENA_OFFS	/;"	d
REG_SRAM_WINDOW_1_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_SRAM_WINDOW_1_ADDR	/;"	d
REG_SRAM_WINDOW_1_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_SRAM_WINDOW_1_ADDR	/;"	d
REG_SR_TIM	arch/arm/include/asm/emif.h	/^#define REG_SR_TIM	/;"	d
REG_STATIC_DRAM_DLB_CONTROL	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_STATIC_DRAM_DLB_CONTROL	/;"	d
REG_STATIC_DRAM_DLB_CONTROL	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_STATIC_DRAM_DLB_CONTROL	/;"	d
REG_STATUS	drivers/gpio/pm8916_gpio.c	/^#define REG_STATUS /;"	d	file:
REG_STATUS_VAL_MASK	drivers/gpio/pm8916_gpio.c	/^#define REG_STATUS_VAL_MASK /;"	d	file:
REG_SUBTYPE	drivers/gpio/pm8916_gpio.c	/^#define REG_SUBTYPE /;"	d	file:
REG_SUBU	arch/mips/include/asm/asm.h	/^#define REG_SUBU	/;"	d
REG_SW_0	include/fsl_pmic.h	/^	REG_SW_0,$/;"	e	enum:__anond57df49b0103
REG_SW_1	include/fsl_pmic.h	/^	REG_SW_1,$/;"	e	enum:__anond57df49b0103
REG_SW_2	include/fsl_pmic.h	/^	REG_SW_2,$/;"	e	enum:__anond57df49b0103
REG_SW_3	include/fsl_pmic.h	/^	REG_SW_3,$/;"	e	enum:__anond57df49b0103
REG_SW_4	include/fsl_pmic.h	/^	REG_SW_4,$/;"	e	enum:__anond57df49b0103
REG_SW_5	include/fsl_pmic.h	/^	REG_SW_5,$/;"	e	enum:__anond57df49b0103
REG_SYS0	drivers/power/regulator/act8846.c	/^	REG_SYS0,$/;"	e	enum:__anon8cd915960103	file:
REG_SYS1	drivers/power/regulator/act8846.c	/^	REG_SYS1,$/;"	e	enum:__anon8cd915960103	file:
REG_SYSCALL	arch/sh/include/asm/ptrace.h	/^#define REG_SYSCALL	/;"	d
REG_T0	drivers/block/ftide020.h	/^#define REG_T0	/;"	d
REG_T1	drivers/block/ftide020.h	/^#define REG_T1	/;"	d
REG_T2	drivers/block/ftide020.h	/^#define REG_T2	/;"	d
REG_T4	drivers/block/ftide020.h	/^#define REG_T4	/;"	d
REG_TEMPERATURE	post/board/lwmon5/sysmon.c	/^#define REG_TEMPERATURE	/;"	d	file:
REG_TEST0	include/fsl_pmic.h	/^	REG_TEST0,$/;"	e	enum:__anond57df49b0103
REG_TEST1	include/fsl_pmic.h	/^	REG_TEST1,		\/*60 *\/$/;"	e	enum:__anond57df49b0103
REG_TEST2	include/fsl_pmic.h	/^	REG_TEST2,$/;"	e	enum:__anond57df49b0103
REG_TEST3	include/fsl_pmic.h	/^	REG_TEST3,$/;"	e	enum:__anond57df49b0103
REG_TEST4	include/fsl_pmic.h	/^	REG_TEST4,$/;"	e	enum:__anond57df49b0103
REG_TIMER0_ENABLE_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TIMER0_ENABLE_MASK	/;"	d
REG_TIMER0_VALUE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TIMER0_VALUE_ADDR	/;"	d
REG_TIMER1_VALUE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TIMER1_VALUE_ADDR	/;"	d
REG_TIMERS_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TIMERS_CTRL_ADDR	/;"	d
REG_TIMERS_EVENTS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TIMERS_EVENTS_ADDR	/;"	d
REG_TRAINING_DEBUG_2_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_DEBUG_2_ADDR	/;"	d
REG_TRAINING_DEBUG_2_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_DEBUG_2_ADDR	/;"	d
REG_TRAINING_DEBUG_2_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_DEBUG_2_MASK	/;"	d
REG_TRAINING_DEBUG_2_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_DEBUG_2_MASK	/;"	d
REG_TRAINING_DEBUG_2_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_DEBUG_2_OFFS	/;"	d
REG_TRAINING_DEBUG_2_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_DEBUG_2_OFFS	/;"	d
REG_TRAINING_DEBUG_3_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_DEBUG_3_ADDR	/;"	d
REG_TRAINING_DEBUG_3_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_DEBUG_3_ADDR	/;"	d
REG_TRAINING_DEBUG_3_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_DEBUG_3_MASK	/;"	d
REG_TRAINING_DEBUG_3_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_DEBUG_3_MASK	/;"	d
REG_TRAINING_DEBUG_3_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_DEBUG_3_OFFS	/;"	d
REG_TRAINING_DEBUG_3_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_DEBUG_3_OFFS	/;"	d
REG_TRAINING_WL_1TO1	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_1TO1	/;"	d
REG_TRAINING_WL_1TO1	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_1TO1	/;"	d
REG_TRAINING_WL_2TO1	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_2TO1	/;"	d
REG_TRAINING_WL_2TO1	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_2TO1	/;"	d
REG_TRAINING_WL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_ADDR	/;"	d
REG_TRAINING_WL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_ADDR	/;"	d
REG_TRAINING_WL_CS_DONE_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_CS_DONE_OFFS	/;"	d
REG_TRAINING_WL_CS_DONE_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_CS_DONE_OFFS	/;"	d
REG_TRAINING_WL_CS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_CS_MASK	/;"	d
REG_TRAINING_WL_CS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_CS_MASK	/;"	d
REG_TRAINING_WL_DELAYEXP_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_DELAYEXP_MASK	/;"	d
REG_TRAINING_WL_DELAYEXP_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_DELAYEXP_MASK	/;"	d
REG_TRAINING_WL_RATIO_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_RATIO_MASK	/;"	d
REG_TRAINING_WL_RATIO_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_RATIO_MASK	/;"	d
REG_TRAINING_WL_RESULTS_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_RESULTS_MASK	/;"	d
REG_TRAINING_WL_RESULTS_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_RESULTS_MASK	/;"	d
REG_TRAINING_WL_RESULTS_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_RESULTS_OFFS	/;"	d
REG_TRAINING_WL_RESULTS_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_RESULTS_OFFS	/;"	d
REG_TRAINING_WL_UPD_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_TRAINING_WL_UPD_OFFS	/;"	d
REG_TRAINING_WL_UPD_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_TRAINING_WL_UPD_OFFS	/;"	d
REG_TRIM0	include/fsl_pmic.h	/^	REG_TRIM0,$/;"	e	enum:__anond57df49b0103
REG_TRIM1	include/fsl_pmic.h	/^	REG_TRIM1,$/;"	e	enum:__anond57df49b0103
REG_TYPE	drivers/gpio/pm8916_gpio.c	/^#define REG_TYPE /;"	d	file:
REG_UNUSED0	include/fsl_pmic.h	/^	REG_UNUSED0,$/;"	e	enum:__anond57df49b0103
REG_UNUSED1	include/fsl_pmic.h	/^	REG_UNUSED1,$/;"	e	enum:__anond57df49b0103
REG_UNUSED10	include/fsl_pmic.h	/^	REG_UNUSED10,$/;"	e	enum:__anond57df49b0103
REG_UNUSED11	include/fsl_pmic.h	/^	REG_UNUSED11,$/;"	e	enum:__anond57df49b0103
REG_UNUSED12	include/fsl_pmic.h	/^	REG_UNUSED12,$/;"	e	enum:__anond57df49b0103
REG_UNUSED13	include/fsl_pmic.h	/^	REG_UNUSED13,$/;"	e	enum:__anond57df49b0103
REG_UNUSED2	include/fsl_pmic.h	/^	REG_UNUSED2,$/;"	e	enum:__anond57df49b0103
REG_UNUSED3	include/fsl_pmic.h	/^	REG_UNUSED3,$/;"	e	enum:__anond57df49b0103
REG_UNUSED4	include/fsl_pmic.h	/^	REG_UNUSED4,$/;"	e	enum:__anond57df49b0103
REG_UNUSED5	include/fsl_pmic.h	/^	REG_UNUSED5,$/;"	e	enum:__anond57df49b0103
REG_UNUSED6	include/fsl_pmic.h	/^	REG_UNUSED6,$/;"	e	enum:__anond57df49b0103
REG_UNUSED7	include/fsl_pmic.h	/^	REG_UNUSED7,$/;"	e	enum:__anond57df49b0103
REG_UNUSED8	include/fsl_pmic.h	/^	REG_UNUSED8,$/;"	e	enum:__anond57df49b0103
REG_UNUSED9	include/fsl_pmic.h	/^	REG_UNUSED9,		\/*40 *\/$/;"	e	enum:__anond57df49b0103
REG_USB0	include/fsl_pmic.h	/^	REG_USB0,$/;"	e	enum:__anond57df49b0103
REG_USB1	include/fsl_pmic.h	/^	REG_USB1,		\/*50 *\/$/;"	e	enum:__anond57df49b0103
REG_VOLTAGE_5V	post/board/lwmon5/sysmon.c	/^#define REG_VOLTAGE_5V	/;"	d	file:
REG_VOLTAGE_5V_STANDBY	post/board/lwmon5/sysmon.c	/^#define REG_VOLTAGE_5V_STANDBY	/;"	d	file:
REG_VOUT_MON_TDB	include/power/rk808_pmic.h	/^	REG_VOUT_MON_TDB,$/;"	e	enum:__anon9b8afd0f0103
REG_WB	arch/xtensa/include/asm/ptrace.h	/^#define REG_WB	/;"	d
REG_WDAY	arch/sandbox/include/asm/rtc.h	/^	REG_WDAY,$/;"	e	enum:__anon539924f20103
REG_WRITE	drivers/net/cs8900.c	/^#define REG_WRITE(/;"	d	file:
REG_WRITE_BYTE	drivers/bios_emulator/biosemui.h	/^	REG_WRITE_BYTE = 3,$/;"	e	enum:__anonb186e4ea0103
REG_WRITE_DWORD	drivers/bios_emulator/biosemui.h	/^	REG_WRITE_DWORD = 5$/;"	e	enum:__anonb186e4ea0103
REG_WRITE_WORD	drivers/bios_emulator/biosemui.h	/^	REG_WRITE_WORD = 4,$/;"	e	enum:__anonb186e4ea0103
REG_WS	arch/xtensa/include/asm/ptrace.h	/^#define REG_WS	/;"	d
REG_XBAR_WIN_16_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_16_BASE_ADDR /;"	d
REG_XBAR_WIN_16_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_16_CTRL_ADDR /;"	d
REG_XBAR_WIN_16_REMAP_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_16_REMAP_ADDR /;"	d
REG_XBAR_WIN_19_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_19_CTRL_ADDR /;"	d
REG_XBAR_WIN_19_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_XBAR_WIN_19_CTRL_ADDR	/;"	d
REG_XBAR_WIN_19_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_XBAR_WIN_19_CTRL_ADDR	/;"	d
REG_XBAR_WIN_4_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_4_BASE_ADDR /;"	d
REG_XBAR_WIN_4_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_XBAR_WIN_4_BASE_ADDR	/;"	d
REG_XBAR_WIN_4_BASE_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_XBAR_WIN_4_BASE_ADDR	/;"	d
REG_XBAR_WIN_4_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_4_CTRL_ADDR /;"	d
REG_XBAR_WIN_4_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_XBAR_WIN_4_CTRL_ADDR	/;"	d
REG_XBAR_WIN_4_CTRL_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_XBAR_WIN_4_CTRL_ADDR	/;"	d
REG_XBAR_WIN_4_REMAP_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_4_REMAP_ADDR /;"	d
REG_XBAR_WIN_4_REMAP_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_XBAR_WIN_4_REMAP_ADDR	/;"	d
REG_XBAR_WIN_4_REMAP_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_XBAR_WIN_4_REMAP_ADDR	/;"	d
REG_XBAR_WIN_5_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_5_BASE_ADDR	/;"	d
REG_XBAR_WIN_5_CTRL_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_5_CTRL_ADDR	/;"	d
REG_XBAR_WIN_7_REMAP_ADDR	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define REG_XBAR_WIN_7_REMAP_ADDR /;"	d
REG_XBAR_WIN_7_REMAP_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_XBAR_WIN_7_REMAP_ADDR /;"	d
REG_XBAR_WIN_7_REMAP_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_XBAR_WIN_7_REMAP_ADDR	/;"	d
REG_XFREG0	arch/sh/include/asm/ptrace.h	/^#define REG_XFREG0	/;"	d
REG_XFREG15	arch/sh/include/asm/ptrace.h	/^#define REG_XFREG15	/;"	d
REG_YEAR	arch/sandbox/include/asm/rtc.h	/^	REG_YEAR,$/;"	e	enum:__anon539924f20103
REG_ZQC_CONF_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define REG_ZQC_CONF_ADDR	/;"	d
REG_ZQC_CONF_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define REG_ZQC_CONF_ADDR	/;"	d
REG_ZQ_CS0EN_ENABLE	arch/arm/include/asm/emif.h	/^#define REG_ZQ_CS0EN_ENABLE	/;"	d
REG_ZQ_DUALCALEN_DISABLE	arch/arm/include/asm/emif.h	/^#define REG_ZQ_DUALCALEN_DISABLE	/;"	d
REG_ZQ_SFEXITEN_ENABLE	arch/arm/include/asm/emif.h	/^#define REG_ZQ_SFEXITEN_ENABLE	/;"	d
REG_ZQ_ZQCL_MULT	arch/arm/include/asm/emif.h	/^#define REG_ZQ_ZQCL_MULT	/;"	d
REG_ZQ_ZQINIT_MULT	arch/arm/include/asm/emif.h	/^#define REG_ZQ_ZQINIT_MULT	/;"	d
REISER2FS_SUPER_MAGIC_STRING	fs/reiserfs/reiserfs_private.h	/^#define REISER2FS_SUPER_MAGIC_STRING /;"	d
REISER3FS_SUPER_MAGIC_STRING	fs/reiserfs/reiserfs_private.h	/^#define REISER3FS_SUPER_MAGIC_STRING /;"	d
REISERFS_DISK_OFFSET_IN_BYTES	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_DISK_OFFSET_IN_BYTES /;"	d
REISERFS_MAX_SUPPORTED_VERSION	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_MAX_SUPPORTED_VERSION /;"	d
REISERFS_OLD_BLOCKSIZE	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_OLD_BLOCKSIZE /;"	d
REISERFS_OLD_DISK_OFFSET_IN_BYTES	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_OLD_DISK_OFFSET_IN_BYTES /;"	d
REISERFS_ROOT_OBJECTID	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_ROOT_OBJECTID /;"	d
REISERFS_ROOT_PARENT_OBJECTID	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_ROOT_PARENT_OBJECTID /;"	d
REISERFS_SUPER_MAGIC_STRING	fs/reiserfs/reiserfs_private.h	/^#define REISERFS_SUPER_MAGIC_STRING /;"	d
REJECT	scripts/kconfig/zconf.lex.c	/^#define REJECT /;"	d	file:
REJECT_MAC_ADDR	drivers/net/mvgbe.h	/^#define REJECT_MAC_ADDR	/;"	d
RELEASE	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define RELEASE	/;"	d	file:
RELFLAGS	config.mk	/^RELFLAGS := $(PLATFORM_RELFLAGS)$/;"	m
RELOAD_EEPROM	drivers/net/ax88180.h	/^  #define RELOAD_EEPROM	/;"	d
RELOC	cmd/date.c	/^#define RELOC(/;"	d	file:
RELOCATE1	arch/xtensa/include/asm/ldscript.h	/^#define RELOCATE1(/;"	d
RELOCATE2	arch/xtensa/include/asm/ldscript.h	/^#define RELOCATE2(/;"	d
RELOC_HIDE	include/linux/compiler-gcc.h	/^#define RELOC_HIDE(/;"	d
RELOC_HIDE	include/linux/compiler-intel.h	/^#define RELOC_HIDE(/;"	d
RELOC_HIDE	include/linux/compiler.h	/^# define RELOC_HIDE(/;"	d
REL_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define REL_CNT	/;"	d
REL_DIAL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_DIAL	include/dt-bindings/input/linux-event-codes.h	/^#define REL_DIAL	/;"	d
REL_HWHEEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_HWHEEL	include/dt-bindings/input/linux-event-codes.h	/^#define REL_HWHEEL	/;"	d
REL_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define REL_MAX	/;"	d
REL_MISC	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_MISC	include/dt-bindings/input/linux-event-codes.h	/^#define REL_MISC	/;"	d
REL_RX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RX	include/dt-bindings/input/linux-event-codes.h	/^#define REL_RX	/;"	d
REL_RY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RY	include/dt-bindings/input/linux-event-codes.h	/^#define REL_RY	/;"	d
REL_RZ	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_RZ	include/dt-bindings/input/linux-event-codes.h	/^#define REL_RZ	/;"	d
REL_WHEEL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_WHEEL	include/dt-bindings/input/linux-event-codes.h	/^#define REL_WHEEL	/;"	d
REL_X	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_X	include/dt-bindings/input/linux-event-codes.h	/^#define REL_X	/;"	d
REL_Y	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Y	include/dt-bindings/input/linux-event-codes.h	/^#define REL_Y	/;"	d
REL_Z	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REL_Z	include/dt-bindings/input/linux-event-codes.h	/^#define REL_Z	/;"	d
REMAPPED_FLASH_SZ	board/armltd/integrator/integrator.c	/^#define REMAPPED_FLASH_SZ /;"	d	file:
REMOCON_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	REMOCON_A_MARK,$/;"	e	enum:__anona307945e0103	file:
REMOCON_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
REMOCON_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	REMOCON_B_MARK,$/;"	e	enum:__anona307945e0103	file:
REMOCON_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
REMODER_DYNAMIC_MAX_FRAME_LENGTH	drivers/qe/uec.h	/^#define REMODER_DYNAMIC_MAX_FRAME_LENGTH	/;"	d
REMODER_DYNAMIC_MIN_FRAME_LENGTH	drivers/qe/uec.h	/^#define REMODER_DYNAMIC_MIN_FRAME_LENGTH	/;"	d
REMODER_INIT_VALUE	drivers/qe/uec.h	/^#define REMODER_INIT_VALUE	/;"	d
REMODER_IP_ADDRESS_ALIGNMENT	drivers/qe/uec.h	/^#define REMODER_IP_ADDRESS_ALIGNMENT	/;"	d
REMODER_IP_CHECKSUM_CHECK	drivers/qe/uec.h	/^#define REMODER_IP_CHECKSUM_CHECK	/;"	d
REMODER_NUM_OF_QUEUES_SHIFT	drivers/qe/uec.h	/^#define REMODER_NUM_OF_QUEUES_SHIFT	/;"	d
REMODER_RMON_STATISTICS	drivers/qe/uec.h	/^#define REMODER_RMON_STATISTICS	/;"	d
REMODER_RX_EXTENDED_FEATURES	drivers/qe/uec.h	/^#define REMODER_RX_EXTENDED_FEATURES	/;"	d
REMODER_RX_EXTENDED_FILTERING	drivers/qe/uec.h	/^#define REMODER_RX_EXTENDED_FILTERING	/;"	d
REMODER_RX_QOS_MODE_SHIFT	drivers/qe/uec.h	/^#define REMODER_RX_QOS_MODE_SHIFT	/;"	d
REMODER_RX_RMON_STATISTICS_ENABLE	drivers/qe/uec.h	/^#define REMODER_RX_RMON_STATISTICS_ENABLE	/;"	d
REMODER_VLAN_OPERATION_NON_TAGGED_SHIFT	drivers/qe/uec.h	/^#define REMODER_VLAN_OPERATION_NON_TAGGED_SHIFT	/;"	d
REMODER_VLAN_OPERATION_TAGGED_SHIFT	drivers/qe/uec.h	/^#define REMODER_VLAN_OPERATION_TAGGED_SHIFT	/;"	d
REMOTEPROC	drivers/remoteproc/Kconfig	/^config REMOTEPROC$/;"	c	menu:Remote Processor drivers
REMOTEPROC_SANDBOX	drivers/remoteproc/Kconfig	/^config REMOTEPROC_SANDBOX$/;"	c	menu:Remote Processor drivers
REMOTEPROC_TI_POWER	drivers/remoteproc/Kconfig	/^config REMOTEPROC_TI_POWER$/;"	c	menu:Remote Processor drivers
REMOTE_NDIS_HALT_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_HALT_MSG	/;"	d
REMOTE_NDIS_INDICATE_STATUS_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_INDICATE_STATUS_MSG	/;"	d
REMOTE_NDIS_INITIALIZE_CMPLT	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_INITIALIZE_CMPLT	/;"	d
REMOTE_NDIS_INITIALIZE_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_INITIALIZE_MSG	/;"	d
REMOTE_NDIS_KEEPALIVE_CMPLT	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_KEEPALIVE_CMPLT	/;"	d
REMOTE_NDIS_KEEPALIVE_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_KEEPALIVE_MSG	/;"	d
REMOTE_NDIS_PACKET_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_PACKET_MSG	/;"	d
REMOTE_NDIS_QUERY_CMPLT	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_QUERY_CMPLT	/;"	d
REMOTE_NDIS_QUERY_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_QUERY_MSG	/;"	d
REMOTE_NDIS_RESET_CMPLT	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_RESET_CMPLT	/;"	d
REMOTE_NDIS_RESET_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_RESET_MSG	/;"	d
REMOTE_NDIS_SET_CMPLT	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_SET_CMPLT	/;"	d
REMOTE_NDIS_SET_MSG	drivers/usb/gadget/rndis.h	/^#define REMOTE_NDIS_SET_MSG	/;"	d
REMOVE_CLAMPING	arch/arm/mach-tegra/powergate.c	/^#define REMOVE_CLAMPING /;"	d	file:
RENEWING	net/bootp.h	/^	       RENEWING } dhcp_state_t;$/;"	e	enum:__anon7cb633f50103
REPEAT	include/lattice.h	/^#define REPEAT	/;"	d
REPEAT0_R1	board/renesas/r7780mp/lowlevel_init.S	/^REPEAT0_R1:		.long	0x0000200$/;"	l
REPEAT0_R3	board/espt/lowlevel_init.S	/^REPEAT0_R3:	.long	0x00002000$/;"	l
REPEAT0_R3	board/renesas/r7780mp/lowlevel_init.S	/^REPEAT0_R3:		.long	0x00002000$/;"	l
REPEATLOOP	include/lattice.h	/^#define REPEATLOOP	/;"	d
REPEAT_BYTE	include/linux/kernel.h	/^#define REPEAT_BYTE(/;"	d
REPEAT_D	board/renesas/rsk7203/lowlevel_init.S	/^REPEAT_D:	.long 0x00009C40$/;"	l
REPEAT_D	board/renesas/rsk7264/lowlevel_init.S	/^REPEAT_D:	.long 0x00000085$/;"	l
REPEAT_D	board/renesas/rsk7269/lowlevel_init.S	/^REPEAT_D:	.long 0x000033F1$/;"	l
REPEAT_DELAY	common/usb_kbd.c	/^#define REPEAT_DELAY	/;"	d	file:
REPEAT_PATTERN	drivers/bootcount/bootcount_ram.c	/^const ulong REPEAT_PATTERN  = 1000;$/;"	v	typeref:typename:const ulong
REPEAT_R3	board/espt/lowlevel_init.S	/^REPEAT_R3:	.long	0x00000200$/;"	l
REPEAT_RATE	common/usb_kbd.c	/^#define REPEAT_RATE	/;"	d	file:
REPORTFN	arch/x86/cpu/quark/mrc_util.h	/^#define REPORTFN(/;"	d
REPSWITCH	board/BuR/brppt1/board.c	/^#define	REPSWITCH	/;"	d	file:
REPZ_11_138	lib/zlib/trees.c	/^#define REPZ_11_138 /;"	d	file:
REPZ_3_10	lib/zlib/trees.c	/^#define REPZ_3_10 /;"	d	file:
REP_3_6	lib/zlib/trees.c	/^#define REP_3_6 /;"	d	file:
REP_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define REP_BASE_ADDR	/;"	d
REP_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define REP_CNT	/;"	d
REP_DELAY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_DELAY	include/dt-bindings/input/linux-event-codes.h	/^#define REP_DELAY	/;"	d
REP_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define REP_MAX	/;"	d
REP_PERIOD	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REP_PERIOD	include/dt-bindings/input/linux-event-codes.h	/^#define REP_PERIOD	/;"	d
REQPKT_H	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define REQPKT_H	/;"	d
REQPKT_RH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define REQPKT_RH	/;"	d
REQUESTING	net/bootp.h	/^	       REQUESTING,$/;"	e	enum:__anon7cb633f50103
REQUEST_AND_CLR_GPIO	board/ti/am335x/board.c	/^#define REQUEST_AND_CLR_GPIO(/;"	d	file:
REQUEST_AND_PULSE_RESET	board/siemens/rut/board.c	/^#define REQUEST_AND_PULSE_RESET(/;"	d	file:
REQUEST_AND_SET_GPIO	board/ti/am335x/board.c	/^#define REQUEST_AND_SET_GPIO(/;"	d	file:
REQUEST_QUEUE_SIZE	drivers/block/sata_mv.c	/^#define REQUEST_QUEUE_SIZE	/;"	d	file:
REQUIRE_SERIAL_CONSOLE	drivers/serial/Kconfig	/^config REQUIRE_SERIAL_CONSOLE$/;"	c	menu:Serial drivers
REQ_PHY_DPLL_CLK	drivers/usb/phy/twl4030.c	/^#define REQ_PHY_DPLL_CLK	/;"	d	file:
REQ_RX_DESCRIPTOR_MULTIPLE	drivers/net/e1000.h	/^#define REQ_RX_DESCRIPTOR_MULTIPLE /;"	d
REQ_TX_DESCRIPTOR_MULTIPLE	drivers/net/e1000.h	/^#define REQ_TX_DESCRIPTOR_MULTIPLE /;"	d
RES0	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES0[1];		\/* MBAR_ETH + 0x00C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[1]
RES1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES1[6];		\/* MBAR_ETH + 0x028-03C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[6]
RES10	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES10[6];		\/* MBAR_ETH + 0x2E4-2FC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[6]
RES11	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES11[64];		\/* MBAR_ETH + 0x300-3FF *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[64]
RES2	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES2[5];		\/* MBAR_ETH + 0x04C-05C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[5]
RES3	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES3[6];		\/* MBAR_ETH + 0x068-7C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[6]
RES4	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES4[7];		\/* MBAR_ETH + 0x0A4-0BC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[7]
RES5	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES5[4];		\/* MBAR_ETH + 0x0F0-0FC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[4]
RES6	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES6[3];		\/* MBAR_ETH + 0x134-13C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[3]
RES7	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES7[2];		\/* MBAR_ETH + 0x178-17C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[2]
RES8	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES8[3];		\/* MBAR_ETH + 0x1CC-1D4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[3]
RES9	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 RES9[2];		\/* MBAR_ETH + 0x278-27C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32[2]
RESCNT2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define RESCNT2	/;"	d
RESCUE_IMAGE	board/cm5200/fwupdate.h	/^#define RESCUE_IMAGE	/;"	d
RESERVED	lib/gunzip.c	/^#define RESERVED	/;"	d	file:
RESERVED_16	include/usb/ehci-ci.h	/^#define RESERVED_16	/;"	d
RESERVED_17	include/usb/ehci-ci.h	/^#define RESERVED_17	/;"	d
RESERVED_18	include/usb/ehci-ci.h	/^#define RESERVED_18	/;"	d
RESERVED_FIELDS	include/eeprom_layout.h	/^#define RESERVED_FIELDS	/;"	d
RESERVED_MASK	arch/arm/include/asm/omap_mmc.h	/^#define RESERVED_MASK	/;"	d
RESERVED_SIZE	common/dlmalloc.c	/^#define RESERVED_SIZE /;"	d	file:
RESERVE_BLOCK_SIZE	include/configs/origen.h	/^#define RESERVE_BLOCK_SIZE	/;"	d
RESERVE_BLOCK_SIZE	include/configs/smdkv310.h	/^#define RESERVE_BLOCK_SIZE	/;"	d
RESET	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RESET	/;"	d
RESET	board/bf533-ezkit/flash-defines.h	/^#define RESET	/;"	d
RESET	drivers/rtc/ds1302.c	/^#define RESET	/;"	d	file:
RESET	include/lattice.h	/^#define RESET	/;"	d
RESET	tools/patman/terminal.py	/^    RESET = '\\033[0m'$/;"	v	class:Color
RESETA_N_PU_OFF_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	RESETA_N_PU_OFF_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
RESETA_N_PU_ON_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	RESETA_N_PU_ON_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
RESETDONE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define RESETDONE	/;"	d
RESETDONE	arch/arm/include/asm/omap_mmc.h	/^#define RESETDONE	/;"	d
RESETDONE	drivers/usb/musb-new/omap2430.h	/^#	define	RESETDONE	/;"	d
RESETFLOW	include/lattice.h	/^#define RESETFLOW	/;"	d
RESETN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RESETN	/;"	d
RESETN_DDR0_REQ_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDR0_REQ_MASK		= 1 << RESETN_DDR0_REQ_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDR0_REQ_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDR0_REQ_SHIFT		= 8,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDR1_REQ_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDR1_REQ_MASK		= 1 << RESETN_DDR1_REQ_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDR1_REQ_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDR1_REQ_SHIFT		= 12,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDRPHY0_REQ_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDRPHY0_REQ_MASK		= 1 << RESETN_DDRPHY0_REQ_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDRPHY0_REQ_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDRPHY0_REQ_SHIFT	= 9,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDRPHY1_REQ_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDRPHY1_REQ_MASK		= 1 << RESETN_DDRPHY1_REQ_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
RESETN_DDRPHY1_REQ_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	RESETN_DDRPHY1_REQ_SHIFT	= 13,$/;"	e	enum:__anon06b9221d0103	file:
RESETOUTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RESETOUTS_MARK,		RESETP_PULLUP_MARK,	RESETP_PLAIN_MARK,$/;"	e	enum:__anona304c1340103	file:
RESETOUTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	RESETOUTS__MARK, EXTAL2OUT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
RESETP_PLAIN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RESETOUTS_MARK,		RESETP_PULLUP_MARK,	RESETP_PLAIN_MARK,$/;"	e	enum:__anona304c1340103	file:
RESETP_PULLUP_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RESETOUTS_MARK,		RESETP_PULLUP_MARK,	RESETP_PLAIN_MARK,$/;"	e	enum:__anona304c1340103	file:
RESET_A9_DMC_PIPEL	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_A9_DMC_PIPEL	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_A9_DMC_PIPEL	/;"	d
RESET_AFIFO2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AFIFO2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AFIFO2	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_BRIDGE_CNTL	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_BRIDGE_CNTL	/;"	d
RESET_AHB_CNTL	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_CNTL	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_CNTL	/;"	d
RESET_AHB_DATA	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_DATA	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_DATA	/;"	d
RESET_AHB_SRAM	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AHB_SRAM	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AHB_SRAM	/;"	d
RESET_AIFIFO	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIFIFO	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIFIFO	/;"	d
RESET_AIU	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AIU	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AIU	/;"	d
RESET_AO_CPU_RESET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_CPU_RESET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_CPU_RESET	/;"	d
RESET_AO_RESET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_AO_RESET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AO_RESET	/;"	d
RESET_ASSIST	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_ASSIST	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ASSIST	/;"	d
RESET_AUDIN	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIN	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIN	/;"	d
RESET_AUDIO_DAC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_AUDIO_DAC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_AUDIO_DAC	/;"	d
RESET_BLKMV	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BLKMV	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BLKMV	/;"	d
RESET_BT656	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_BT656	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_BT656	/;"	d
RESET_CAPB3_DECODE	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CAPB3_DECODE	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CAPB3_DECODE	/;"	d
RESET_CBUS_CAPB3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CBUS_CAPB3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CBUS_CAPB3	/;"	d
RESET_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define RESET_CMD_CODE	/;"	d	file:
RESET_CPPM	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_CPPM	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_CPPM	/;"	d
RESET_DCU_RESET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DCU_RESET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DCU_RESET	/;"	d
RESET_DDR	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR	/;"	d
RESET_DDR_TOP	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DDR_TOP	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DDR_TOP	/;"	d
RESET_DE4X5	drivers/net/dc2114x.c	/^#define RESET_DE4X5(/;"	d	file:
RESET_DEMUX	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX	/;"	d
RESET_DEMUX_DES	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_DES	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_DES	/;"	d
RESET_DEMUX_RESET_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_0	/;"	d
RESET_DEMUX_RESET_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_1	/;"	d
RESET_DEMUX_RESET_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_RESET_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_RESET_2	/;"	d
RESET_DEMUX_S2P_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_0	/;"	d
RESET_DEMUX_S2P_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_S2P_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_S2P_1	/;"	d
RESET_DEMUX_TOP	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEMUX_TOP	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEMUX_TOP	/;"	d
RESET_DEVICE_MMC_ARB	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DEVICE_MMC_ARB	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DEVICE_MMC_ARB	/;"	d
RESET_DFE_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define RESET_DFE_REG	/;"	d
RESET_DM9102	drivers/net/dc2114x.c	/^#define RESET_DM9102(/;"	d	file:
RESET_DONE	drivers/usb/gadget/f_thor.h	/^#define RESET_DONE /;"	d
RESET_DOS_CAPB3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_CAPB3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_CAPB3	/;"	d
RESET_DOS_RESET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOS_RESET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DOS_RESET	/;"	d
RESET_DOUBLE	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define RESET_DOUBLE	/;"	d
RESET_DOUBLE_A	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define RESET_DOUBLE_A	/;"	d
RESET_DOUBLE_B	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define RESET_DOUBLE_B	/;"	d
RESET_DP_TX	arch/arm/mach-exynos/include/mach/dp.h	/^#define RESET_DP_TX	/;"	d
RESET_DVIN_RESET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_DVIN_RESET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_DVIN_RESET	/;"	d
RESET_EFUSE	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EFUSE	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_EFUSE	/;"	d
RESET_EN	board/esd/pmc440/pmc440.h	/^#define RESET_EN /;"	d
RESET_ETHERNET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_ETHERNET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ETHERNET	/;"	d
RESET_GE2D	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GE2D	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GE2D	/;"	d
RESET_GIC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GIC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_GIC	/;"	d
RESET_GPIO	board/bosch/shc/board.h	/^# define RESET_GPIO /;"	d
RESET_HDMITX_CAPB3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMITX_CAPB3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMITX_CAPB3	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_SYSTEM_RESET	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_SYSTEM_RESET	/;"	d
RESET_HDMI_TX	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HDMI_TX	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HDMI_TX	/;"	d
RESET_HIU	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_HIU	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_HIU	/;"	d
RESET_I2C_MASTER_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_1	/;"	d
RESET_I2C_MASTER_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_I2C_MASTER_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_I2C_MASTER_2	/;"	d
RESET_IN	board/esd/pmc440/pmc440.h	/^#define RESET_IN /;"	d
RESET_ISA	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_ISA	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ISA	/;"	d
RESET_MALI	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI	/;"	d
RESET_MALI_CAPB3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MALI_CAPB3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MALI_CAPB3	/;"	d
RESET_MASK	board/bosch/shc/board.h	/^#define RESET_MASK	/;"	d
RESET_MAX_TIMEOUT	arch/arm/imx-common/misc.c	/^#define	RESET_MAX_TIMEOUT	/;"	d	file:
RESET_MIPI_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_0	/;"	d
RESET_MIPI_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_1	/;"	d
RESET_MIPI_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_2	/;"	d
RESET_MIPI_3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MIPI_3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MIPI_3	/;"	d
RESET_MMC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_MMC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_MMC	/;"	d
RESET_NAND_CAPB3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_NAND_CAPB3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_NAND_CAPB3	/;"	d
RESET_OR_BABLE_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RESET_OR_BABLE_B	/;"	d
RESET_OR_BABLE_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RESET_OR_BABLE_BE	/;"	d
RESET_OUT	board/esd/pmc440/pmc440.h	/^#define RESET_OUT /;"	d
RESET_PARSER	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER	/;"	d
RESET_PARSER_CTL	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_CTL	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_CTL	/;"	d
RESET_PARSER_FETCH	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_FETCH	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_FETCH	/;"	d
RESET_PARSER_REG	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_REG	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_REG	/;"	d
RESET_PARSER_TOP	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PARSER_TOP	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PARSER_TOP	/;"	d
RESET_PERIPHS_ASYNC_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_0	/;"	d
RESET_PERIPHS_ASYNC_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_ASYNC_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_ASYNC_1	/;"	d
RESET_PERIPHS_GENERAL	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_GENERAL	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_GENERAL	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_I2C_MASTER_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_I2C_MASTER_0	/;"	d
RESET_PERIPHS_SAR_ADC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SAR_ADC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SAR_ADC	/;"	d
RESET_PERIPHS_SDHC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDHC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDHC	/;"	d
RESET_PERIPHS_SDIO	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SDIO	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SDIO	/;"	d
RESET_PERIPHS_SMART_CARD	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SMART_CARD	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SMART_CARD	/;"	d
RESET_PERIPHS_SPICC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPICC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPICC	/;"	d
RESET_PERIPHS_SPI_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_SPI_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_SPI_0	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_STREAM_INTERFACE	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_STREAM_INTERFACE	/;"	d
RESET_PERIPHS_UART_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_0	/;"	d
RESET_PERIPHS_UART_1_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PERIPHS_UART_1_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PERIPHS_UART_1_2	/;"	d
RESET_PMUX	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_PMUX	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_PMUX	/;"	d
RESET_RDMA	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RDMA	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RDMA	/;"	d
RESET_RING_OSCILLATOR	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_RING_OSCILLATOR	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RING_OSCILLATOR	/;"	d
RESET_ROM_BOOT	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_ROM_BOOT	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_ROM_BOOT	/;"	d
RESET_RTC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_RTC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_RTC	/;"	d
RESET_SANA	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SANA	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SANA	/;"	d
RESET_SD_EMMC_A	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_A	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_A	/;"	d
RESET_SD_EMMC_B	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_B	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_B	/;"	d
RESET_SD_EMMC_C	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SD_EMMC_C	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SD_EMMC_C	/;"	d
RESET_SEG_SIZE	arch/x86/Kconfig	/^config RESET_SEG_SIZE$/;"	c	menu:x86 architecture
RESET_SEG_START	arch/x86/Kconfig	/^config RESET_SEG_START$/;"	c	menu:x86 architecture
RESET_SOFTWARE	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define RESET_SOFTWARE	/;"	d
RESET_SYS_CPU	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU	/;"	d
RESET_SYS_CPU_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_0	/;"	d
RESET_SYS_CPU_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_1	/;"	d
RESET_SYS_CPU_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_2	/;"	d
RESET_SYS_CPU_3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_3	/;"	d
RESET_SYS_CPU_AXI	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_AXI	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_AXI	/;"	d
RESET_SYS_CPU_BVCI	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_BVCI	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_BVCI	/;"	d
RESET_SYS_CPU_CAPB3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CAPB3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CAPB3	/;"	d
RESET_SYS_CPU_CORE_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_0	/;"	d
RESET_SYS_CPU_CORE_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_1	/;"	d
RESET_SYS_CPU_CORE_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_2	/;"	d
RESET_SYS_CPU_CORE_3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_CORE_3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_CORE_3	/;"	d
RESET_SYS_CPU_L2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_L2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_L2	/;"	d
RESET_SYS_CPU_MBIST	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_MBIST	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_MBIST	/;"	d
RESET_SYS_CPU_P	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_CPU_P	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_CPU_P	/;"	d
RESET_SYS_PLL_DIV	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_SYS_PLL_DIV	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_SYS_PLL_DIV	/;"	d
RESET_TIME	board/micronas/vct/scc.h	/^#define RESET_TIME	/;"	d
RESET_TIMEOUT	arch/arm/mach-bcm283x/reset.c	/^#define RESET_TIMEOUT /;"	d	file:
RESET_TVFE	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_TVFE	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_TVFE	/;"	d
RESET_UART_SLIP	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UART_SLIP	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_UART_SLIP	/;"	d
RESET_UNIPHIER	drivers/reset/Kconfig	/^config RESET_UNIPHIER$/;"	c	menu:Reset Controller Support
RESET_USB_DDR_0	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_0	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_0	/;"	d
RESET_USB_DDR_1	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_1	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_1	/;"	d
RESET_USB_DDR_2	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_2	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_2	/;"	d
RESET_USB_DDR_3	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_DDR_3	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_DDR_3	/;"	d
RESET_USB_OTG	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_USB_OTG	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_USB_OTG	/;"	d
RESET_VAL	board/bf533-ezkit/flash-defines.h	/^#define RESET_VAL	/;"	d
RESET_VCBUS	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS	/;"	d
RESET_VCBUS_CLK81	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VCBUS_CLK81	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VCBUS_CLK81	/;"	d
RESET_VDAC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDAC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDAC	/;"	d
RESET_VDI6	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VDI6	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VDI6	/;"	d
RESET_VD_RMEM	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VD_RMEM	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VD_RMEM	/;"	d
RESET_VECTOR	arch/powerpc/include/asm/ppc4xx.h	/^#define RESET_VECTOR	/;"	d
RESET_VECTOR	include/e500.h	/^#define RESET_VECTOR	/;"	d
RESET_VECTOR_ADDR	board/synopsys/axs10x/axs10x.c	/^#define RESET_VECTOR_ADDR	/;"	d	file:
RESET_VECTOR_ADDRESS	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^#define RESET_VECTOR_ADDRESS	/;"	d	file:
RESET_VECTOR_ADDRESS	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^#define RESET_VECTOR_ADDRESS	/;"	d	file:
RESET_VECTOR_OFFSET	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^#define RESET_VECTOR_OFFSET /;"	d	file:
RESET_VECTOR_OFFSET	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^#define RESET_VECTOR_OFFSET /;"	d	file:
RESET_VECTOR_OFFSET	include/configs/B4860QDS.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T102xQDS.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T102xRDB.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T104xRDB.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T208xQDS.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T208xRDB.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T4240QDS.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VECTOR_OFFSET	include/configs/T4240RDB.h	/^#define RESET_VECTOR_OFFSET	/;"	d
RESET_VEC_LOC	arch/x86/Kconfig	/^config RESET_VEC_LOC$/;"	c	menu:x86 architecture
RESET_VENC	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENC	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENC	/;"	d
RESET_VENCI	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCI	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCI	/;"	d
RESET_VENCL	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCL	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCL	/;"	d
RESET_VENCP	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VENCP	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VENCP	/;"	d
RESET_VID_LOCK	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_LOCK	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_LOCK	/;"	d
RESET_VID_PLL_DIV	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VID_PLL_DIV	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VID_PLL_DIV	/;"	d
RESET_VIU	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_VIU	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define RESET_VIU	/;"	d
RESET_WAIT	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define	RESET_WAIT	/;"	d	file:
RESET_WDOG	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define RESET_WDOG	/;"	d
RESET_WDOG_A	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define RESET_WDOG_A	/;"	d
RESET_WDOG_B	arch/blackfin/include/asm/mach-common/bits/core.h	/^# define RESET_WDOG_B	/;"	d
RESIN_ON_INT_BIT	drivers/gpio/pm8916_gpio.c	/^#define RESIN_ON_INT_BIT /;"	d	file:
RESISTOR_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define RESISTOR_CTRL	/;"	d
RESISTOR_MSB_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define RESISTOR_MSB_CTRL	/;"	d
RESM	drivers/usb/host/r8a66597.h	/^#define	RESM	/;"	d
RESOLUTION	drivers/video/fsl_dcu_fb.c	/^#define RESOLUTION(/;"	d	file:
RESOLUTION	drivers/video/fsl_diu_fb.c	/^#define RESOLUTION(/;"	d	file:
RESOURCE_LABEL_SIZE	arch/blackfin/cpu/gpio.c	/^#define RESOURCE_LABEL_SIZE	/;"	d	file:
RESOURCE_LABEL_SIZE	drivers/gpio/adi_gpio2.c	/^#define RESOURCE_LABEL_SIZE	/;"	d	file:
RESPID	include/sym53c8xx.h	/^#define RESPID	/;"	d
RESPONSE_QUEUE_SIZE	drivers/block/sata_mv.c	/^#define RESPONSE_QUEUE_SIZE	/;"	d	file:
RESP_0	drivers/mtd/nand/tegra_nand.h	/^#define RESP_0	/;"	d
RESP_CMD	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                  RESP_CMD /;"	d
RESTART	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define RESTART	/;"	d
RESTART_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define RESTART_P	/;"	d
RESTORE	lib/zlib/inflate.c	/^#define RESTORE(/;"	d	file:
RESTORE_ALL	arch/m68k/cpu/mcf5227x/start.S	/^#define RESTORE_ALL	/;"	d	file:
RESTORE_ALL	arch/m68k/cpu/mcf523x/start.S	/^#define RESTORE_ALL	/;"	d	file:
RESTORE_ALL	arch/m68k/cpu/mcf52x2/start.S	/^#define RESTORE_ALL	/;"	d	file:
RESTORE_ALL	arch/m68k/cpu/mcf530x/start.S	/^.macro  RESTORE_ALL$/;"	m
RESTORE_ALL	arch/m68k/cpu/mcf532x/start.S	/^#define RESTORE_ALL	/;"	d	file:
RESTORE_ALL	arch/m68k/cpu/mcf5445x/start.S	/^#define RESTORE_ALL	/;"	d	file:
RESTORE_ALL	arch/m68k/cpu/mcf547x_8x/start.S	/^#define RESTORE_ALL	/;"	d	file:
RESTORE_ALL	arch/sparc/cpu/leon2/start.S	/^#define RESTORE_ALL /;"	d	file:
RESTORE_ALL	arch/sparc/cpu/leon3/start.S	/^#define RESTORE_ALL /;"	d	file:
RESTORE_ALL	arch/sparc/include/asm/asmmacro.h	/^#define RESTORE_ALL /;"	d
RESULT	include/ppc_defs.h	/^#define	RESULT	/;"	d
RESULT_CONTROL_BYTE_PUP_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_BYTE_PUP_0_REG	/;"	d
RESULT_CONTROL_BYTE_PUP_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_BYTE_PUP_1_REG	/;"	d
RESULT_CONTROL_BYTE_PUP_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_BYTE_PUP_2_REG	/;"	d
RESULT_CONTROL_BYTE_PUP_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_BYTE_PUP_3_REG	/;"	d
RESULT_CONTROL_BYTE_PUP_4_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_BYTE_PUP_4_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_0_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_1_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_2_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_3_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_4_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_4_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_5_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_5_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_6_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_6_REG	/;"	d
RESULT_CONTROL_PUP_0_BIT_7_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_0_BIT_7_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_0_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_1_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_2_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_3_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_4_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_4_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_5_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_5_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_6_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_6_REG	/;"	d
RESULT_CONTROL_PUP_1_BIT_7_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_1_BIT_7_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_0_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_1_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_2_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_3_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_4_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_4_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_5_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_5_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_6_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_6_REG	/;"	d
RESULT_CONTROL_PUP_2_BIT_7_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_2_BIT_7_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_0_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_1_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_2_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_3_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_4_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_4_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_5_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_5_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_6_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_6_REG	/;"	d
RESULT_CONTROL_PUP_3_BIT_7_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_3_BIT_7_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_0_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_1_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_2_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_3_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_4_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_4_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_5_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_5_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_6_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_6_REG	/;"	d
RESULT_CONTROL_PUP_4_BIT_7_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_CONTROL_PUP_4_BIT_7_REG	/;"	d
RESULT_DB_PHY_REG_ADDR	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_DB_PHY_REG_ADDR	/;"	d
RESULT_DB_PHY_REG_RX_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_DB_PHY_REG_RX_OFFSET	/;"	d
RESULT_DB_PHY_REG_TX_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RESULT_DB_PHY_REG_TX_OFFSET	/;"	d
RESULT_PER_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	RESULT_PER_BIT,$/;"	e	enum:hws_training_result
RESULT_PER_BYTE	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	RESULT_PER_BYTE$/;"	e	enum:hws_training_result
RESUME	drivers/usb/host/r8a66597.h	/^#define	RESUME	/;"	d
RESUME_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RESUME_B	/;"	d
RESUME_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RESUME_BE	/;"	d
RESUME_INDICATE	drivers/usb/eth/r8152.h	/^#define RESUME_INDICATE	/;"	d
RESUME_MODE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RESUME_MODE	/;"	d
RESUME_RL_PATTERNS_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define RESUME_RL_PATTERNS_ADDR	/;"	d
RESUME_RL_PATTERNS_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define RESUME_RL_PATTERNS_ADDR	/;"	d
RESUME_RL_PATTERNS_SIZE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define RESUME_RL_PATTERNS_SIZE	/;"	d
RESUME_RL_PATTERNS_SIZE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define RESUME_RL_PATTERNS_SIZE	/;"	d
RESUME_TRAINING_VALUES_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define RESUME_TRAINING_VALUES_ADDR	/;"	d
RESUME_TRAINING_VALUES_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define RESUME_TRAINING_VALUES_ADDR	/;"	d
RESUME_TRAINING_VALUES_MAX	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define RESUME_TRAINING_VALUES_MAX	/;"	d
RESUME_TRAINING_VALUES_MAX	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define RESUME_TRAINING_VALUES_MAX	/;"	d
RESVD0	drivers/block/ftide020.h	/^	unsigned int	RESVD0;		\/* 0x24 *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
RESVD1	drivers/block/ftide020.h	/^	unsigned int	RESVD1;		\/* 0x28 *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
RESVD2	drivers/block/ftide020.h	/^	unsigned int	RESVD2;		\/* 0x2c *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
RES_32KCLKOUT	include/twl4030.h	/^#define RES_32KCLKOUT /;"	d
RES_ATTR_16_BIT_IO	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_16_BIT_IO	/;"	d
RES_ATTR_32_BIT_IO	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_32_BIT_IO	/;"	d
RES_ATTR_64_BIT_IO	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_64_BIT_IO	/;"	d
RES_ATTR_ECC_RESERVED_1	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_ECC_RESERVED_1	/;"	d
RES_ATTR_ECC_RESERVED_2	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_ECC_RESERVED_2	/;"	d
RES_ATTR_EXECUTION_PROTECTED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_EXECUTION_PROTECTED	/;"	d
RES_ATTR_INITIALIZED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_INITIALIZED	/;"	d
RES_ATTR_MULTIPLE_BIT_ECC	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_MULTIPLE_BIT_ECC	/;"	d
RES_ATTR_PRESENT	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_PRESENT	/;"	d
RES_ATTR_READ_PROTECTED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_READ_PROTECTED	/;"	d
RES_ATTR_SINGLE_BIT_ECC	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_SINGLE_BIT_ECC	/;"	d
RES_ATTR_TESTED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_TESTED	/;"	d
RES_ATTR_UNCACHEABLE	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_UNCACHEABLE	/;"	d
RES_ATTR_UNCACHED_EXPORTED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_UNCACHED_EXPORTED	/;"	d
RES_ATTR_WRITE_BACK_CACHEABLE	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_WRITE_BACK_CACHEABLE	/;"	d
RES_ATTR_WRITE_COMBINEABLE	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_WRITE_COMBINEABLE	/;"	d
RES_ATTR_WRITE_PROTECTED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_WRITE_PROTECTED	/;"	d
RES_ATTR_WRITE_THROUGH_CACHEABLE	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_ATTR_WRITE_THROUGH_CACHEABLE	/;"	d
RES_CLKEN	include/twl4030.h	/^#define RES_CLKEN /;"	d
RES_DATA	include/ns87308.h	/^#define RES_DATA /;"	d
RES_DO	common/cli_hush.c	/^	RES_DO    = 9,$/;"	e	enum:__anon62a9299d0403	file:
RES_DONE	common/cli_hush.c	/^	RES_DONE  = 10,$/;"	e	enum:__anon62a9299d0403	file:
RES_ELIF	common/cli_hush.c	/^	RES_ELIF  = 3,$/;"	e	enum:__anon62a9299d0403	file:
RES_ELSE	common/cli_hush.c	/^	RES_ELSE  = 4,$/;"	e	enum:__anon62a9299d0403	file:
RES_FI	common/cli_hush.c	/^	RES_FI    = 5,$/;"	e	enum:__anon62a9299d0403	file:
RES_FOR	common/cli_hush.c	/^	RES_FOR   = 6,$/;"	e	enum:__anon62a9299d0403	file:
RES_FW_DEVICE	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_FW_DEVICE	/;"	d
RES_GRP_ALL	include/twl4030.h	/^#define RES_GRP_ALL	/;"	d
RES_GRP_PP	include/twl4030.h	/^#define RES_GRP_PP	/;"	d
RES_GRP_PP_PR	include/twl4030.h	/^#define RES_GRP_PP_PR	/;"	d
RES_GRP_PP_RC	include/twl4030.h	/^#define RES_GRP_PP_RC	/;"	d
RES_GRP_PR	include/twl4030.h	/^#define RES_GRP_PR	/;"	d
RES_GRP_RC	include/twl4030.h	/^#define RES_GRP_RC	/;"	d
RES_GRP_RC_PR	include/twl4030.h	/^#define RES_GRP_RC_PR	/;"	d
RES_GRP_RES	include/twl4030.h	/^#define RES_GRP_RES	/;"	d
RES_HFCLKOUT	include/twl4030.h	/^#define RES_HFCLKOUT /;"	d
RES_IF	common/cli_hush.c	/^	RES_IF    = 1,$/;"	e	enum:__anon62a9299d0403	file:
RES_IN	common/cli_hush.c	/^	RES_IN    = 12,$/;"	e	enum:__anon62a9299d0403	file:
RES_IO	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_IO	/;"	d
RES_IO_RESERVED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_IO_RESERVED	/;"	d
RES_MAX_MEM_TYPE	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_MAX_MEM_TYPE	/;"	d
RES_MEM_RESERVED	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_MEM_RESERVED	/;"	d
RES_MMAP_IO	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_MMAP_IO	/;"	d
RES_MMAP_IO_PORT	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_MMAP_IO_PORT	/;"	d
RES_MODES_COUNT	drivers/video/videomodes.h	/^#define RES_MODES_COUNT	/;"	d
RES_MODE_1024x768	drivers/video/videomodes.h	/^#define RES_MODE_1024x768	/;"	d
RES_MODE_1152x864	drivers/video/videomodes.h	/^#define RES_MODE_1152x864	/;"	d
RES_MODE_1280x1024	drivers/video/videomodes.h	/^#define RES_MODE_1280x1024	/;"	d
RES_MODE_1280x720	drivers/video/videomodes.h	/^#define RES_MODE_1280x720	/;"	d
RES_MODE_1360x768	drivers/video/videomodes.h	/^#define RES_MODE_1360x768	/;"	d
RES_MODE_1920x1080	drivers/video/videomodes.h	/^#define RES_MODE_1920x1080	/;"	d
RES_MODE_1920x1200	drivers/video/videomodes.h	/^#define RES_MODE_1920x1200	/;"	d
RES_MODE_640x480	drivers/video/videomodes.h	/^#define RES_MODE_640x480	/;"	d
RES_MODE_800x600	drivers/video/videomodes.h	/^#define RES_MODE_800x600	/;"	d
RES_MODE_960_720	drivers/video/videomodes.h	/^#define RES_MODE_960_720	/;"	d
RES_Main_Ref	include/twl4030.h	/^#define RES_Main_Ref /;"	d
RES_NONE	common/cli_hush.c	/^	RES_NONE  = 0,$/;"	e	enum:__anon62a9299d0403	file:
RES_NRES_PWRON	include/twl4030.h	/^#define RES_NRES_PWRON /;"	d
RES_REGEN	include/twl4030.h	/^#define RES_REGEN /;"	d
RES_RESET	include/twl4030.h	/^#define RES_RESET /;"	d
RES_SNTX	common/cli_hush.c	/^	RES_SNTX  = 13$/;"	e	enum:__anon62a9299d0403	file:
RES_STATE_ACTIVE	include/twl4030.h	/^#define RES_STATE_ACTIVE	/;"	d
RES_STATE_OFF	include/twl4030.h	/^#define RES_STATE_OFF	/;"	d
RES_STATE_SLEEP	include/twl4030.h	/^#define RES_STATE_SLEEP	/;"	d
RES_STATE_WRST	include/twl4030.h	/^#define RES_STATE_WRST	/;"	d
RES_SYSEN	include/twl4030.h	/^#define RES_SYSEN /;"	d
RES_SYS_MEM	arch/x86/include/asm/fsp/fsp_hob.h	/^#define RES_SYS_MEM	/;"	d
RES_THEN	common/cli_hush.c	/^	RES_THEN  = 2,$/;"	e	enum:__anon62a9299d0403	file:
RES_TYPE2_R0	include/twl4030.h	/^#define RES_TYPE2_R0	/;"	d
RES_TYPE_ALL	include/twl4030.h	/^#define RES_TYPE_ALL	/;"	d
RES_UNTIL	common/cli_hush.c	/^	RES_UNTIL = 8,$/;"	e	enum:__anon62a9299d0403	file:
RES_VAUX1	include/twl4030.h	/^#define RES_VAUX1 /;"	d
RES_VAUX2	include/twl4030.h	/^#define RES_VAUX2 /;"	d
RES_VAUX3	include/twl4030.h	/^#define RES_VAUX3 /;"	d
RES_VAUX4	include/twl4030.h	/^#define RES_VAUX4 /;"	d
RES_VDAC	include/twl4030.h	/^#define RES_VDAC /;"	d
RES_VDD1	include/twl4030.h	/^#define RES_VDD1 /;"	d
RES_VDD2	include/twl4030.h	/^#define RES_VDD2 /;"	d
RES_VINTANA1	include/twl4030.h	/^#define RES_VINTANA1 /;"	d
RES_VINTANA2	include/twl4030.h	/^#define RES_VINTANA2 /;"	d
RES_VINTDIG	include/twl4030.h	/^#define RES_VINTDIG /;"	d
RES_VIO	include/twl4030.h	/^#define RES_VIO /;"	d
RES_VMMC1	include/twl4030.h	/^#define RES_VMMC1 /;"	d
RES_VMMC2	include/twl4030.h	/^#define RES_VMMC2 /;"	d
RES_VPLL1	include/twl4030.h	/^#define RES_VPLL1 /;"	d
RES_VPLL2	include/twl4030.h	/^#define RES_VPLL2 /;"	d
RES_VSIM	include/twl4030.h	/^#define RES_VSIM /;"	d
RES_VUSBCP	include/twl4030.h	/^#define RES_VUSBCP /;"	d
RES_VUSB_1V5	include/twl4030.h	/^#define RES_VUSB_1V5 /;"	d
RES_VUSB_1V8	include/twl4030.h	/^#define RES_VUSB_1V8 /;"	d
RES_VUSB_3V1	include/twl4030.h	/^#define RES_VUSB_3V1 /;"	d
RES_WHILE	common/cli_hush.c	/^	RES_WHILE = 7,$/;"	e	enum:__anon62a9299d0403	file:
RES_XXXX	common/cli_hush.c	/^	RES_XXXX  = 11,$/;"	e	enum:__anon62a9299d0403	file:
RETRIES	drivers/i2c/i2c-gpio.c	/^#define RETRIES	/;"	d	file:
RETRIES	drivers/i2c/soft_i2c.c	/^#define RETRIES	/;"	d	file:
RETURN	lib/bzip2/bzlib_decompress.c	/^#define RETURN(/;"	d	file:
RETURN_CODE_RETRY	tools/buildman/builderthread.py	/^RETURN_CODE_RETRY = -1$/;"	v
RETURN_TRACE	drivers/bios_emulator/include/x86emu/debug.h	/^# define RETURN_TRACE(/;"	d
RETURN_TYPE	arch/x86/include/asm/io.h	/^#define RETURN_TYPE /;"	d
RET_STALL	drivers/usb/gadget/f_dfu.h	/^#define RET_STALL	/;"	d
RET_STAT_LEN	drivers/usb/gadget/f_dfu.h	/^#define RET_STAT_LEN	/;"	d
RET_ZLP	drivers/usb/gadget/f_dfu.h	/^#define RET_ZLP	/;"	d
REVERSE	lib/zlib/inflate.c	/^#define REVERSE(/;"	d	file:
REVID_MAJOR	include/mpc83xx.h	/^#define REVID_MAJOR(/;"	d
REVID_MINOR	include/mpc83xx.h	/^#define REVID_MINOR(/;"	d
REVISION	drivers/mtd/nand/denali.h	/^#define REVISION	/;"	d
REVISION_0	board/overo/overo.h	/^#define REVISION_0	/;"	d
REVISION_1	board/overo/overo.h	/^#define REVISION_1	/;"	d
REVISION_2	board/overo/overo.h	/^#define REVISION_2	/;"	d
REVISION_3	board/overo/overo.h	/^#define REVISION_3	/;"	d
REVISION_4	board/overo/overo.h	/^#define REVISION_4	/;"	d
REVISION_5_1	drivers/mtd/nand/denali.h	/^#define REVISION_5_1	/;"	d
REVISION_AXBX	board/ti/beagle/beagle.h	/^#define REVISION_AXBX	/;"	d
REVISION_C4	board/ti/beagle/beagle.h	/^#define REVISION_C4	/;"	d
REVISION_CX	board/ti/beagle/beagle.h	/^#define REVISION_CX	/;"	d
REVISION_ID	include/radeon.h	/^#define REVISION_ID	/;"	d
REVISION_ID_REG	board/freescale/common/vsc3316_3308.c	/^#define REVISION_ID_REG	/;"	d	file:
REVISION_XM_AB	board/ti/beagle/beagle.h	/^#define REVISION_XM_AB	/;"	d
REVISION_XM_C	board/ti/beagle/beagle.h	/^#define REVISION_XM_C	/;"	d
REVISION__VALUE	drivers/mtd/nand/denali.h	/^#define     REVISION__VALUE	/;"	d
REVISON_ID_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REVISON_ID_MASK	/;"	d
REVISON_ID_MASK	drivers/ddr/marvell/a38x/ddr3_init.c	/^#define REVISON_ID_MASK	/;"	d	file:
REVISON_ID_OFFS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define REVISON_ID_OFFS	/;"	d
REVISON_ID_OFFS	drivers/ddr/marvell/a38x/ddr3_init.c	/^#define REVISON_ID_OFFS	/;"	d	file:
REV_AM18X_EVM	board/Barix/ipam390/ipam390.c	/^#define REV_AM18X_EVM	/;"	d	file:
REV_AM18X_EVM	board/davinci/da8xxevm/da850evm.c	/^#define REV_AM18X_EVM	/;"	d	file:
REV_DETECTION	board/wandboard/wandboard.c	/^#define REV_DETECTION	/;"	d	file:
REV_ID_MAJOR_AR71XX	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR71XX	/;"	d
REV_ID_MAJOR_AR7240	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR7240	/;"	d
REV_ID_MAJOR_AR7241	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR7241	/;"	d
REV_ID_MAJOR_AR7242	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR7242	/;"	d
REV_ID_MAJOR_AR913X	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR913X	/;"	d
REV_ID_MAJOR_AR9330	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR9330	/;"	d
REV_ID_MAJOR_AR9331	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR9331	/;"	d
REV_ID_MAJOR_AR9341	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR9341	/;"	d
REV_ID_MAJOR_AR9342	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR9342	/;"	d
REV_ID_MAJOR_AR9344	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_AR9344	/;"	d
REV_ID_MAJOR_MASK	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_MASK	/;"	d
REV_ID_MAJOR_QCA9533	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_QCA9533	/;"	d
REV_ID_MAJOR_QCA9533_V2	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_QCA9533_V2	/;"	d
REV_ID_MAJOR_QCA9556	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_QCA9556	/;"	d
REV_ID_MAJOR_QCA9558	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_QCA9558	/;"	d
REV_ID_MAJOR_QCA9561	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_QCA9561	/;"	d
REV_ID_MAJOR_TP9343	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define REV_ID_MAJOR_TP9343	/;"	d
REV_REG	drivers/net/smc91111.h	/^#define	REV_REG	/;"	d
REW	drivers/usb/host/r8a66597.h	/^#define	REW	/;"	d
RE_2_RE	drivers/mtd/nand/denali.h	/^#define RE_2_RE	/;"	d
RE_2_RE__VALUE	drivers/mtd/nand/denali.h	/^#define     RE_2_RE__VALUE	/;"	d
RE_2_WE	drivers/mtd/nand/denali.h	/^#define RE_2_WE	/;"	d
RE_2_WE__VALUE	drivers/mtd/nand/denali.h	/^#define     RE_2_WE__VALUE	/;"	d
RE_INIT_LL	drivers/usb/eth/r8152.h	/^#define RE_INIT_LL	/;"	d
RFBI_A0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_A0	/;"	d
RFBI_CS0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_CS0	/;"	d
RFBI_DATA0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA0	/;"	d
RFBI_DATA1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA1	/;"	d
RFBI_DATA10	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA10	/;"	d
RFBI_DATA11	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA11	/;"	d
RFBI_DATA12	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA12	/;"	d
RFBI_DATA13	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA13	/;"	d
RFBI_DATA14	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA14	/;"	d
RFBI_DATA15	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA15	/;"	d
RFBI_DATA2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA2	/;"	d
RFBI_DATA3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA3	/;"	d
RFBI_DATA4	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA4	/;"	d
RFBI_DATA5	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA5	/;"	d
RFBI_DATA6	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA6	/;"	d
RFBI_DATA7	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA7	/;"	d
RFBI_DATA8	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA8	/;"	d
RFBI_DATA9	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_DATA9	/;"	d
RFBI_HSYNC0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_HSYNC0	/;"	d
RFBI_RE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_RE	/;"	d
RFBI_TE_VSYNC0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_TE_VSYNC0	/;"	d
RFBI_WE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define RFBI_WE	/;"	d
RFCF	drivers/net/sh_eth.h	/^	RFCF,$/;"	e	enum:__anon5ef54f5a0103
RFCR	arch/sh/include/asm/cpu_sh7706.h	/^#define	RFCR	/;"	d
RFCR	arch/sh/include/asm/cpu_sh7750.h	/^#define RFCR	/;"	d
RFCR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define	RFCR	/;"	d	file:
RFCR	drivers/net/sh_eth.h	/^	RFCR,$/;"	e	enum:__anon5ef54f5a0103
RFCR_A	board/ms7750se/lowlevel_init.S	/^RFCR_A:		.long	RFCR$/;"	l
RFCR_A	board/renesas/MigoR/lowlevel_init.S	/^RFCR_A:		.long	SBSC_RFCR$/;"	l
RFCR_A	board/renesas/r2dplus/lowlevel_init.S	/^RFCR_A:		.long	RFCR		\/* RFCR Address *\/$/;"	l
RFCR_CLR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define RFCR_CLR	/;"	d	file:
RFCR_D	board/ms7750se/lowlevel_init.S	/^RFCR_D:		.word	0xA400		\/* RFCR Write Code A4h Data 00h *\/$/;"	l
RFCR_D	board/renesas/MigoR/lowlevel_init.S	/^RFCR_D:		.long	0xA55A0221$/;"	l
RFCR_D	board/renesas/r2dplus/lowlevel_init.S	/^RFCR_D:		.long	0xA400		\/* RFCR Write Code A4h Data 00h *\/$/;"	l
RFCS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define RFCS	/;"	d
RFDIV	drivers/serial/serial_mxc.c	/^#define RFDIV /;"	d	file:
RFD_CONTROL_EL	drivers/net/eepro100.c	/^#define RFD_CONTROL_EL	/;"	d	file:
RFD_CONTROL_H	drivers/net/eepro100.c	/^#define RFD_CONTROL_H	/;"	d	file:
RFD_CONTROL_S	drivers/net/eepro100.c	/^#define RFD_CONTROL_S	/;"	d	file:
RFD_CONTROL_SF	drivers/net/eepro100.c	/^#define RFD_CONTROL_SF	/;"	d	file:
RFD_COUNT_EOF	drivers/net/eepro100.c	/^#define RFD_COUNT_EOF	/;"	d	file:
RFD_COUNT_F	drivers/net/eepro100.c	/^#define RFD_COUNT_F	/;"	d	file:
RFD_COUNT_MASK	drivers/net/eepro100.c	/^#define RFD_COUNT_MASK	/;"	d	file:
RFD_RX_ALIGNMENT	drivers/net/eepro100.c	/^#define RFD_RX_ALIGNMENT	/;"	d	file:
RFD_RX_CRC	drivers/net/eepro100.c	/^#define RFD_RX_CRC	/;"	d	file:
RFD_RX_DMA_OVER	drivers/net/eepro100.c	/^#define RFD_RX_DMA_OVER	/;"	d	file:
RFD_RX_ERROR	drivers/net/eepro100.c	/^#define RFD_RX_ERROR	/;"	d	file:
RFD_RX_IA_MATCH	drivers/net/eepro100.c	/^#define RFD_RX_IA_MATCH	/;"	d	file:
RFD_RX_LENGTH	drivers/net/eepro100.c	/^#define RFD_RX_LENGTH	/;"	d	file:
RFD_RX_NO_ADR_MATCH	drivers/net/eepro100.c	/^#define RFD_RX_NO_ADR_MATCH	/;"	d	file:
RFD_RX_RESOURCE	drivers/net/eepro100.c	/^#define RFD_RX_RESOURCE	/;"	d	file:
RFD_RX_SHORT	drivers/net/eepro100.c	/^#define RFD_RX_SHORT	/;"	d	file:
RFD_RX_TCO	drivers/net/eepro100.c	/^#define RFD_RX_TCO	/;"	d	file:
RFD_STATUS_C	drivers/net/eepro100.c	/^#define RFD_STATUS_C	/;"	d	file:
RFD_STATUS_OK	drivers/net/eepro100.c	/^#define RFD_STATUS_OK	/;"	d	file:
RFIT	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define RFIT	/;"	d
RFIT	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define RFIT	/;"	d
RFIT_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define RFIT_P	/;"	d
RFL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RFL	/;"	d
RFLR	drivers/net/sh_eth.h	/^	RFLR,$/;"	e	enum:__anon5ef54f5a0103
RFLR_RFL_MIN	drivers/net/sh_eth.h	/^#define RFLR_RFL_MIN	/;"	d
RFOCR	drivers/net/sh_eth.h	/^	RFOCR,$/;"	e	enum:__anon5ef54f5a0103
RFRT	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define RFRT	/;"	d
RFRT	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define RFRT	/;"	d
RFRT_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define RFRT_P	/;"	d
RFSHTMG_TREFI	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define RFSHTMG_TREFI(/;"	d
RFSHTMG_TREFI	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define RFSHTMG_TREFI(/;"	d
RFSHTMG_TRFC	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define RFSHTMG_TRFC(/;"	d
RFSHTMG_TRFC	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define RFSHTMG_TRFC(/;"	d
RFU_GLOBAL_SW_RST	arch/arm/mach-mvebu/armada8k/cpu.c	/^#define RFU_GLOBAL_SW_RST	/;"	d	file:
RFU_SW_RESET_OFFSET	arch/arm/mach-mvebu/armada8k/cpu.c	/^#define RFU_SW_RESET_OFFSET	/;"	d	file:
RGB	drivers/video/ipu.h	/^	RGB,$/;"	e	enum:__anon4a35f9fd0b03
RGB2RGB	drivers/video/ipu_disp.c	/^	RGB2RGB,$/;"	e	enum:csc_type_t	file:
RGB2YUV	drivers/video/ipu_disp.c	/^	RGB2YUV = 0,$/;"	e	enum:csc_type_t	file:
RGB565	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	RGB565 = 2,$/;"	e	enum:rockchip_fb_data_format_t
RGB888	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	RGB888 = 1,$/;"	e	enum:rockchip_fb_data_format_t
RGB_BACKLIGHT_GP	board/boundary/nitrogen6x/nitrogen6x.c	/^#define RGB_BACKLIGHT_GP /;"	d	file:
RGB_FMT_EN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define RGB_FMT_EN /;"	d
RGMII	drivers/net/fec_mxc.h	/^	RGMII,		\/* RGMII *\/$/;"	e	enum:xceiver_type
RGMII0	arch/powerpc/dts/canyonlands.dts	/^			RGMII0: emac-rgmii@ef601500 {$/;"	l
RGMII0	arch/powerpc/dts/glacier.dts	/^			RGMII0: emac-rgmii@ef601500 {$/;"	l
RGMII0_RXC	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_RXC	/;"	d
RGMII0_RXCTL	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_RXCTL	/;"	d
RGMII0_RXD0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_RXD0	/;"	d
RGMII0_RXD1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_RXD1	/;"	d
RGMII0_RXD2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_RXD2	/;"	d
RGMII0_RXD3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_RXD3	/;"	d
RGMII0_TXC	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_TXC	/;"	d
RGMII0_TXCTL	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_TXCTL	/;"	d
RGMII0_TXCTL_DLY_VAL	board/ti/am57xx/board.c	/^#define RGMII0_TXCTL_DLY_VAL	/;"	d	file:
RGMII0_TXD0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_TXD0	/;"	d
RGMII0_TXD0_DLY_VAL	board/ti/am57xx/board.c	/^#define RGMII0_TXD0_DLY_VAL	/;"	d	file:
RGMII0_TXD1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_TXD1	/;"	d
RGMII0_TXD1_DLY_VAL	board/ti/am57xx/board.c	/^#define RGMII0_TXD1_DLY_VAL	/;"	d	file:
RGMII0_TXD2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_TXD2	/;"	d
RGMII0_TXD2_DLY_VAL	board/ti/am57xx/board.c	/^#define RGMII0_TXD2_DLY_VAL	/;"	d	file:
RGMII0_TXD3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RGMII0_TXD3	/;"	d
RGMII0_TXD3_DLY_VAL	board/ti/am57xx/board.c	/^#define RGMII0_TXD3_DLY_VAL	/;"	d	file:
RGMII1	arch/powerpc/dts/glacier.dts	/^			RGMII1: emac-rgmii@ef601600 {$/;"	l
RGMII1_BASE_OFFSET	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII1_BASE_OFFSET	/;"	d
RGMII1_IDMODE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RGMII1_IDMODE	/;"	d
RGMII1_ID_MODE_N_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define RGMII1_ID_MODE_N_MASK	/;"	d
RGMII2_IDMODE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RGMII2_IDMODE	/;"	d
RGMII2_ID_MODE_N_MASK	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define RGMII2_ID_MODE_N_MASK	/;"	d
RGMII_BASE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_BASE	/;"	d
RGMII_COPPER_MODE	drivers/net/ax88180.h	/^  #define RGMII_COPPER_MODE	/;"	d
RGMII_EN	drivers/net/ax88180.h	/^  #define RGMII_EN	/;"	d
RGMII_FER	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER	/;"	d
RGMII_FER_DIS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_DIS	/;"	d
RGMII_FER_GMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_GMII	/;"	d
RGMII_FER_MDIO	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_MDIO(/;"	d
RGMII_FER_MII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_MII	/;"	d
RGMII_FER_RGMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_RGMII	/;"	d
RGMII_FER_RTBI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_RTBI	/;"	d
RGMII_FER_TBI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_TBI	/;"	d
RGMII_FER_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_FER_V(/;"	d
RGMII_INT_DELAY	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RGMII_INT_DELAY	/;"	d
RGMII_MODE_ENABLE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RGMII_MODE_ENABLE	/;"	d
RGMII_MODE_ENABLE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define RGMII_MODE_ENABLE	/;"	d
RGMII_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define RGMII_PAD_CTRL	/;"	d	file:
RGMII_PHY1_ADDR	include/configs/T102xQDS.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/T102xRDB.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/T208xQDS.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/T208xRDB.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/ls1043aqds.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/ls1043ardb.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/ls1046aqds.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY1_ADDR	include/configs/ls1046ardb.h	/^#define RGMII_PHY1_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/T102xQDS.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/T102xRDB.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/T208xQDS.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/T208xRDB.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/ls1043aqds.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/ls1043ardb.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/ls1046aqds.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_PHY2_ADDR	include/configs/ls1046ardb.h	/^#define RGMII_PHY2_ADDR	/;"	d
RGMII_REG_STATUS_LINK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define RGMII_REG_STATUS_LINK	/;"	d
RGMII_RXCLK_DELAY	drivers/net/ax88180.h	/^  #define RGMII_RXCLK_DELAY	/;"	d
RGMII_SSR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_SSR	/;"	d
RGMII_SSR_SP_1000MBPS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_SSR_SP_1000MBPS	/;"	d
RGMII_SSR_SP_100MBPS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_SSR_SP_100MBPS	/;"	d
RGMII_SSR_SP_10MBPS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_SSR_SP_10MBPS	/;"	d
RGMII_SSR_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define RGMII_SSR_V(/;"	d
RGMII_STATUS_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define RGMII_STATUS_REG	/;"	d
RGMII_TXCLK_DELAY	drivers/net/ax88180.h	/^  #define RGMII_TXCLK_DELAY	/;"	d
RG_CKRSEL	drivers/usb/eth/r8152.h	/^#define RG_CKRSEL	/;"	d
RG_DACQUIET_EN	drivers/usb/eth/r8152.h	/^#define RG_DACQUIET_EN	/;"	d
RG_EEEPRG_EN	drivers/usb/eth/r8152.h	/^#define RG_EEEPRG_EN	/;"	d
RG_LDVQUIET_EN	drivers/usb/eth/r8152.h	/^#define RG_LDVQUIET_EN	/;"	d
RG_LFS_SEL	drivers/usb/eth/r8152.h	/^#define RG_LFS_SEL	/;"	d
RG_LPIHYS_NUM	drivers/usb/eth/r8152.h	/^#define RG_LPIHYS_NUM	/;"	d
RG_MATCLR_EN	drivers/usb/eth/r8152.h	/^#define RG_MATCLR_EN	/;"	d
RG_RXLPI_MSK_HFDUP	drivers/usb/eth/r8152.h	/^#define RG_RXLPI_MSK_HFDUP	/;"	d
RG_TXLPI_MSK_HFDUP	drivers/usb/eth/r8152.h	/^#define RG_TXLPI_MSK_HFDUP	/;"	d
RHRAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RHRAR	/;"	d
RHRAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RHRAR	/;"	d
RHRCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RHRCNT	/;"	d
RHRCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RHRCNT	/;"	d
RHST	drivers/usb/host/r8a66597.h	/^#define	RHST	/;"	d
RH_ACK	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_ACK	/;"	d
RH_ACK	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_ACK	/;"	d
RH_ACK	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_ACK	/;"	d
RH_ACK	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_ACK /;"	d
RH_ACK	board/mpl/common/usb_uhci.h	/^#define RH_ACK /;"	d
RH_ACK	drivers/usb/host/isp116x.h	/^#define RH_ACK /;"	d
RH_ACK	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_ACK	/;"	d
RH_ACK	drivers/usb/host/ohci.h	/^#define RH_ACK	/;"	d
RH_ACK	drivers/usb/host/r8a66597.h	/^#define RH_ACK	/;"	d
RH_ACK	drivers/usb/musb/musb_hcd.h	/^#define RH_ACK	/;"	d
RH_A_DT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_DT	/;"	d
RH_A_DT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_DT	/;"	d
RH_A_DT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_DT	/;"	d
RH_A_DT	drivers/usb/host/dwc2.h	/^#define RH_A_DT	/;"	d
RH_A_DT	drivers/usb/host/isp116x.h	/^#define		RH_A_DT	/;"	d
RH_A_DT	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_DT	/;"	d
RH_A_DT	drivers/usb/host/ohci.h	/^#define RH_A_DT	/;"	d
RH_A_DT	drivers/usb/host/r8a66597.h	/^#define RH_A_DT	/;"	d
RH_A_NDP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_NDP	/;"	d
RH_A_NDP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_NDP	/;"	d
RH_A_NDP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_NDP	/;"	d
RH_A_NDP	drivers/usb/host/dwc2.h	/^#define RH_A_NDP	/;"	d
RH_A_NDP	drivers/usb/host/isp116x.h	/^#define		RH_A_NDP	/;"	d
RH_A_NDP	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_NDP	/;"	d
RH_A_NDP	drivers/usb/host/ohci.h	/^#define RH_A_NDP	/;"	d
RH_A_NDP	drivers/usb/host/r8a66597.h	/^#define RH_A_NDP	/;"	d
RH_A_NOCP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_NOCP	/;"	d
RH_A_NOCP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_NOCP	/;"	d
RH_A_NOCP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_NOCP	/;"	d
RH_A_NOCP	drivers/usb/host/dwc2.h	/^#define RH_A_NOCP	/;"	d
RH_A_NOCP	drivers/usb/host/isp116x.h	/^#define		RH_A_NOCP	/;"	d
RH_A_NOCP	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_NOCP	/;"	d
RH_A_NOCP	drivers/usb/host/ohci.h	/^#define RH_A_NOCP	/;"	d
RH_A_NOCP	drivers/usb/host/r8a66597.h	/^#define RH_A_NOCP	/;"	d
RH_A_NPS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_NPS	/;"	d
RH_A_NPS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_NPS	/;"	d
RH_A_NPS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_NPS	/;"	d
RH_A_NPS	drivers/usb/host/dwc2.h	/^#define RH_A_NPS	/;"	d
RH_A_NPS	drivers/usb/host/isp116x.h	/^#define		RH_A_NPS	/;"	d
RH_A_NPS	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_NPS	/;"	d
RH_A_NPS	drivers/usb/host/ohci.h	/^#define RH_A_NPS	/;"	d
RH_A_NPS	drivers/usb/host/r8a66597.h	/^#define RH_A_NPS	/;"	d
RH_A_OCPM	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_OCPM	/;"	d
RH_A_OCPM	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_OCPM	/;"	d
RH_A_OCPM	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_OCPM	/;"	d
RH_A_OCPM	drivers/usb/host/dwc2.h	/^#define RH_A_OCPM	/;"	d
RH_A_OCPM	drivers/usb/host/isp116x.h	/^#define		RH_A_OCPM	/;"	d
RH_A_OCPM	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_OCPM	/;"	d
RH_A_OCPM	drivers/usb/host/ohci.h	/^#define RH_A_OCPM	/;"	d
RH_A_OCPM	drivers/usb/host/r8a66597.h	/^#define RH_A_OCPM	/;"	d
RH_A_POTPGT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_POTPGT	/;"	d
RH_A_POTPGT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_POTPGT	/;"	d
RH_A_POTPGT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_POTPGT	/;"	d
RH_A_POTPGT	drivers/usb/host/dwc2.h	/^#define RH_A_POTPGT	/;"	d
RH_A_POTPGT	drivers/usb/host/isp116x.h	/^#define		RH_A_POTPGT	/;"	d
RH_A_POTPGT	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_POTPGT	/;"	d
RH_A_POTPGT	drivers/usb/host/ohci.h	/^#define RH_A_POTPGT	/;"	d
RH_A_POTPGT	drivers/usb/host/r8a66597.h	/^#define RH_A_POTPGT	/;"	d
RH_A_PSM	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define	RH_A_PSM	/;"	d
RH_A_PSM	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_A_PSM	/;"	d
RH_A_PSM	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_A_PSM	/;"	d
RH_A_PSM	drivers/usb/host/dwc2.h	/^#define RH_A_PSM	/;"	d
RH_A_PSM	drivers/usb/host/isp116x.h	/^#define		RH_A_PSM	/;"	d
RH_A_PSM	drivers/usb/host/ohci-s3c24xx.h	/^#define	RH_A_PSM	/;"	d
RH_A_PSM	drivers/usb/host/ohci.h	/^#define RH_A_PSM	/;"	d
RH_A_PSM	drivers/usb/host/r8a66597.h	/^#define RH_A_PSM	/;"	d
RH_B_DR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_B_DR	/;"	d
RH_B_DR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_B_DR	/;"	d
RH_B_DR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_B_DR	/;"	d
RH_B_DR	drivers/usb/host/dwc2.h	/^#define RH_B_DR	/;"	d
RH_B_DR	drivers/usb/host/isp116x.h	/^#define		RH_B_DR	/;"	d
RH_B_DR	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_B_DR	/;"	d
RH_B_DR	drivers/usb/host/ohci.h	/^#define RH_B_DR	/;"	d
RH_B_DR	drivers/usb/host/r8a66597.h	/^#define RH_B_DR	/;"	d
RH_B_PPCM	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_B_PPCM	/;"	d
RH_B_PPCM	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_B_PPCM	/;"	d
RH_B_PPCM	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_B_PPCM	/;"	d
RH_B_PPCM	drivers/usb/host/dwc2.h	/^#define RH_B_PPCM	/;"	d
RH_B_PPCM	drivers/usb/host/isp116x.h	/^#define		RH_B_PPCM	/;"	d
RH_B_PPCM	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_B_PPCM	/;"	d
RH_B_PPCM	drivers/usb/host/ohci.h	/^#define RH_B_PPCM	/;"	d
RH_B_PPCM	drivers/usb/host/r8a66597.h	/^#define RH_B_PPCM	/;"	d
RH_CLASS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_CLASS	/;"	d
RH_CLASS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_CLASS	/;"	d
RH_CLASS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_CLASS	/;"	d
RH_CLASS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_CLASS /;"	d
RH_CLASS	board/mpl/common/usb_uhci.h	/^#define RH_CLASS /;"	d
RH_CLASS	drivers/usb/host/isp116x.h	/^#define RH_CLASS /;"	d
RH_CLASS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_CLASS	/;"	d
RH_CLASS	drivers/usb/host/ohci.h	/^#define RH_CLASS	/;"	d
RH_CLASS	drivers/usb/host/r8a66597.h	/^#define RH_CLASS	/;"	d
RH_CLASS	drivers/usb/musb/musb_hcd.h	/^#define RH_CLASS	/;"	d
RH_CLEAR_FEATURE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_CLEAR_FEATURE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_CLEAR_FEATURE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_CLEAR_FEATURE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_CLEAR_FEATURE /;"	d
RH_CLEAR_FEATURE	board/mpl/common/usb_uhci.h	/^#define RH_CLEAR_FEATURE /;"	d
RH_CLEAR_FEATURE	drivers/usb/host/isp116x.h	/^#define RH_CLEAR_FEATURE /;"	d
RH_CLEAR_FEATURE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_CLEAR_FEATURE	drivers/usb/host/ohci.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_CLEAR_FEATURE	drivers/usb/host/r8a66597.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_CLEAR_FEATURE	drivers/usb/host/sl811.h	/^#define RH_CLEAR_FEATURE /;"	d
RH_CLEAR_FEATURE	drivers/usb/musb/musb_hcd.h	/^#define RH_CLEAR_FEATURE	/;"	d
RH_C_HUB_LOCAL_POWER	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_LOCAL_POWER	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_LOCAL_POWER	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_LOCAL_POWER	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_HUB_LOCAL_POWER /;"	d
RH_C_HUB_LOCAL_POWER	board/mpl/common/usb_uhci.h	/^#define RH_C_HUB_LOCAL_POWER /;"	d
RH_C_HUB_LOCAL_POWER	drivers/usb/host/isp116x.h	/^#define RH_C_HUB_LOCAL_POWER /;"	d
RH_C_HUB_LOCAL_POWER	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_LOCAL_POWER	drivers/usb/host/ohci.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_LOCAL_POWER	drivers/usb/host/r8a66597.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_LOCAL_POWER	drivers/usb/musb/musb_hcd.h	/^#define RH_C_HUB_LOCAL_POWER	/;"	d
RH_C_HUB_OVER_CURRENT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_HUB_OVER_CURRENT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_HUB_OVER_CURRENT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_HUB_OVER_CURRENT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_HUB_OVER_CURRENT /;"	d
RH_C_HUB_OVER_CURRENT	board/mpl/common/usb_uhci.h	/^#define RH_C_HUB_OVER_CURRENT /;"	d
RH_C_HUB_OVER_CURRENT	drivers/usb/host/isp116x.h	/^#define RH_C_HUB_OVER_CURRENT /;"	d
RH_C_HUB_OVER_CURRENT	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_HUB_OVER_CURRENT	drivers/usb/host/ohci.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_HUB_OVER_CURRENT	drivers/usb/host/r8a66597.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_HUB_OVER_CURRENT	drivers/usb/musb/musb_hcd.h	/^#define RH_C_HUB_OVER_CURRENT	/;"	d
RH_C_PORT_CONNECTION	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_CONNECTION	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_CONNECTION	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_CONNECTION	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_PORT_CONNECTION /;"	d
RH_C_PORT_CONNECTION	board/mpl/common/usb_uhci.h	/^#define RH_C_PORT_CONNECTION /;"	d
RH_C_PORT_CONNECTION	drivers/usb/host/isp116x.h	/^#define RH_C_PORT_CONNECTION /;"	d
RH_C_PORT_CONNECTION	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_CONNECTION	drivers/usb/host/ohci.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_CONNECTION	drivers/usb/host/r8a66597.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_CONNECTION	drivers/usb/musb/musb_hcd.h	/^#define RH_C_PORT_CONNECTION	/;"	d
RH_C_PORT_ENABLE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_ENABLE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_ENABLE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_ENABLE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_PORT_ENABLE /;"	d
RH_C_PORT_ENABLE	board/mpl/common/usb_uhci.h	/^#define RH_C_PORT_ENABLE /;"	d
RH_C_PORT_ENABLE	drivers/usb/host/isp116x.h	/^#define RH_C_PORT_ENABLE /;"	d
RH_C_PORT_ENABLE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_ENABLE	drivers/usb/host/ohci.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_ENABLE	drivers/usb/host/r8a66597.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_ENABLE	drivers/usb/musb/musb_hcd.h	/^#define RH_C_PORT_ENABLE	/;"	d
RH_C_PORT_OVER_CURRENT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_OVER_CURRENT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_OVER_CURRENT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_OVER_CURRENT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_PORT_OVER_CURRENT /;"	d
RH_C_PORT_OVER_CURRENT	board/mpl/common/usb_uhci.h	/^#define RH_C_PORT_OVER_CURRENT /;"	d
RH_C_PORT_OVER_CURRENT	drivers/usb/host/isp116x.h	/^#define RH_C_PORT_OVER_CURRENT /;"	d
RH_C_PORT_OVER_CURRENT	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_OVER_CURRENT	drivers/usb/host/ohci.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_OVER_CURRENT	drivers/usb/host/r8a66597.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_OVER_CURRENT	drivers/usb/musb/musb_hcd.h	/^#define RH_C_PORT_OVER_CURRENT	/;"	d
RH_C_PORT_RESET	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_RESET	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_RESET	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_RESET	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_PORT_RESET /;"	d
RH_C_PORT_RESET	board/mpl/common/usb_uhci.h	/^#define RH_C_PORT_RESET /;"	d
RH_C_PORT_RESET	drivers/usb/host/isp116x.h	/^#define RH_C_PORT_RESET /;"	d
RH_C_PORT_RESET	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_RESET	drivers/usb/host/ohci.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_RESET	drivers/usb/host/r8a66597.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_RESET	drivers/usb/musb/musb_hcd.h	/^#define RH_C_PORT_RESET	/;"	d
RH_C_PORT_SUSPEND	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_C_PORT_SUSPEND	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_C_PORT_SUSPEND	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_C_PORT_SUSPEND	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_C_PORT_SUSPEND /;"	d
RH_C_PORT_SUSPEND	board/mpl/common/usb_uhci.h	/^#define RH_C_PORT_SUSPEND /;"	d
RH_C_PORT_SUSPEND	drivers/usb/host/isp116x.h	/^#define RH_C_PORT_SUSPEND /;"	d
RH_C_PORT_SUSPEND	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_C_PORT_SUSPEND	drivers/usb/host/ohci.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_C_PORT_SUSPEND	drivers/usb/host/r8a66597.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_C_PORT_SUSPEND	drivers/usb/musb/musb_hcd.h	/^#define RH_C_PORT_SUSPEND	/;"	d
RH_DEVICE_REMOTE_WAKEUP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_DEVICE_REMOTE_WAKEUP /;"	d
RH_DEVICE_REMOTE_WAKEUP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_DEVICE_REMOTE_WAKEUP	/;"	d
RH_DEVICE_REMOTE_WAKEUP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_DEVICE_REMOTE_WAKEUP	/;"	d
RH_DEVICE_REMOTE_WAKEUP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_DEVICE_REMOTE_WAKEUP /;"	d
RH_DEVICE_REMOTE_WAKEUP	board/mpl/common/usb_uhci.h	/^#define RH_DEVICE_REMOTE_WAKEUP /;"	d
RH_DEVICE_REMOTE_WAKEUP	drivers/usb/host/isp116x.h	/^#define RH_DEVICE_REMOTE_WAKEUP /;"	d
RH_DEVICE_REMOTE_WAKEUP	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_DEVICE_REMOTE_WAKEUP /;"	d
RH_DEVICE_REMOTE_WAKEUP	drivers/usb/host/ohci.h	/^#define RH_DEVICE_REMOTE_WAKEUP	/;"	d
RH_DEVICE_REMOTE_WAKEUP	drivers/usb/host/r8a66597.h	/^#define RH_DEVICE_REMOTE_WAKEUP	/;"	d
RH_DEVICE_REMOTE_WAKEUP	drivers/usb/musb/musb_hcd.h	/^#define RH_DEVICE_REMOTE_WAKEUP	/;"	d
RH_ENDPOINT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_ENDPOINT /;"	d
RH_ENDPOINT	board/mpl/common/usb_uhci.h	/^#define RH_ENDPOINT /;"	d
RH_ENDPOINT	drivers/usb/host/isp116x.h	/^#define RH_ENDPOINT /;"	d
RH_ENDPOINT	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT	drivers/usb/host/ohci.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT	drivers/usb/host/r8a66597.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT	drivers/usb/musb/musb_hcd.h	/^#define RH_ENDPOINT	/;"	d
RH_ENDPOINT_STALL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_ENDPOINT_STALL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_ENDPOINT_STALL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_ENDPOINT_STALL	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_ENDPOINT_STALL /;"	d
RH_ENDPOINT_STALL	board/mpl/common/usb_uhci.h	/^#define RH_ENDPOINT_STALL /;"	d
RH_ENDPOINT_STALL	drivers/usb/host/isp116x.h	/^#define RH_ENDPOINT_STALL /;"	d
RH_ENDPOINT_STALL	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_ENDPOINT_STALL	drivers/usb/host/ohci.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_ENDPOINT_STALL	drivers/usb/host/r8a66597.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_ENDPOINT_STALL	drivers/usb/musb/musb_hcd.h	/^#define RH_ENDPOINT_STALL	/;"	d
RH_GET_CONFIGURATION	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_GET_CONFIGURATION /;"	d
RH_GET_CONFIGURATION	board/mpl/common/usb_uhci.h	/^#define RH_GET_CONFIGURATION /;"	d
RH_GET_CONFIGURATION	drivers/usb/host/isp116x.h	/^#define RH_GET_CONFIGURATION /;"	d
RH_GET_CONFIGURATION	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	drivers/usb/host/ohci.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	drivers/usb/host/r8a66597.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	drivers/usb/host/sl811.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_CONFIGURATION	drivers/usb/musb/musb_hcd.h	/^#define RH_GET_CONFIGURATION	/;"	d
RH_GET_DESCRIPTOR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_GET_DESCRIPTOR /;"	d
RH_GET_DESCRIPTOR	board/mpl/common/usb_uhci.h	/^#define RH_GET_DESCRIPTOR /;"	d
RH_GET_DESCRIPTOR	drivers/usb/host/isp116x.h	/^#define RH_GET_DESCRIPTOR /;"	d
RH_GET_DESCRIPTOR	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	drivers/usb/host/ohci.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	drivers/usb/host/r8a66597.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	drivers/usb/host/sl811.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_DESCRIPTOR	drivers/usb/musb/musb_hcd.h	/^#define RH_GET_DESCRIPTOR	/;"	d
RH_GET_INTERFACE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_INTERFACE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_INTERFACE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_INTERFACE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_GET_INTERFACE /;"	d
RH_GET_INTERFACE	board/mpl/common/usb_uhci.h	/^#define RH_GET_INTERFACE /;"	d
RH_GET_INTERFACE	drivers/usb/host/isp116x.h	/^#define RH_GET_INTERFACE /;"	d
RH_GET_INTERFACE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_INTERFACE	drivers/usb/host/ohci.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_INTERFACE	drivers/usb/host/r8a66597.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_INTERFACE	drivers/usb/host/sl811.h	/^#define RH_GET_INTERFACE /;"	d
RH_GET_INTERFACE	drivers/usb/musb/musb_hcd.h	/^#define RH_GET_INTERFACE	/;"	d
RH_GET_STATE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_GET_STATE /;"	d
RH_GET_STATE	board/mpl/common/usb_uhci.h	/^#define RH_GET_STATE /;"	d
RH_GET_STATE	drivers/usb/host/isp116x.h	/^#define RH_GET_STATE /;"	d
RH_GET_STATE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATE	drivers/usb/host/ohci.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATE	drivers/usb/host/r8a66597.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATE	drivers/usb/host/sl811.h	/^#define RH_GET_STATE /;"	d
RH_GET_STATE	drivers/usb/musb/musb_hcd.h	/^#define RH_GET_STATE	/;"	d
RH_GET_STATUS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_GET_STATUS	/;"	d
RH_GET_STATUS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_GET_STATUS	/;"	d
RH_GET_STATUS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_GET_STATUS	/;"	d
RH_GET_STATUS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_GET_STATUS /;"	d
RH_GET_STATUS	board/mpl/common/usb_uhci.h	/^#define RH_GET_STATUS /;"	d
RH_GET_STATUS	drivers/usb/host/isp116x.h	/^#define RH_GET_STATUS /;"	d
RH_GET_STATUS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_GET_STATUS	/;"	d
RH_GET_STATUS	drivers/usb/host/ohci.h	/^#define RH_GET_STATUS	/;"	d
RH_GET_STATUS	drivers/usb/host/r8a66597.h	/^#define RH_GET_STATUS	/;"	d
RH_GET_STATUS	drivers/usb/host/sl811.h	/^#define RH_GET_STATUS /;"	d
RH_GET_STATUS	drivers/usb/musb/musb_hcd.h	/^#define RH_GET_STATUS	/;"	d
RH_HS_CRWE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_HS_CRWE	/;"	d
RH_HS_CRWE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_HS_CRWE	/;"	d
RH_HS_CRWE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_HS_CRWE	/;"	d
RH_HS_CRWE	drivers/usb/host/isp116x.h	/^#define		RH_HS_CRWE	/;"	d
RH_HS_CRWE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_HS_CRWE	/;"	d
RH_HS_CRWE	drivers/usb/host/ohci.h	/^#define RH_HS_CRWE	/;"	d
RH_HS_CRWE	drivers/usb/host/r8a66597.h	/^#define RH_HS_CRWE	/;"	d
RH_HS_DRWE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_HS_DRWE	/;"	d
RH_HS_DRWE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_HS_DRWE	/;"	d
RH_HS_DRWE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_HS_DRWE	/;"	d
RH_HS_DRWE	drivers/usb/host/isp116x.h	/^#define		RH_HS_DRWE	/;"	d
RH_HS_DRWE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_HS_DRWE	/;"	d
RH_HS_DRWE	drivers/usb/host/ohci.h	/^#define RH_HS_DRWE	/;"	d
RH_HS_DRWE	drivers/usb/host/r8a66597.h	/^#define RH_HS_DRWE	/;"	d
RH_HS_LPS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_HS_LPS	/;"	d
RH_HS_LPS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_HS_LPS	/;"	d
RH_HS_LPS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_HS_LPS	/;"	d
RH_HS_LPS	drivers/usb/host/isp116x.h	/^#define		RH_HS_LPS	/;"	d
RH_HS_LPS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_HS_LPS	/;"	d
RH_HS_LPS	drivers/usb/host/ohci.h	/^#define RH_HS_LPS	/;"	d
RH_HS_LPS	drivers/usb/host/r8a66597.h	/^#define RH_HS_LPS	/;"	d
RH_HS_LPSC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_HS_LPSC	/;"	d
RH_HS_LPSC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_HS_LPSC	/;"	d
RH_HS_LPSC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_HS_LPSC	/;"	d
RH_HS_LPSC	drivers/usb/host/isp116x.h	/^#define		RH_HS_LPSC	/;"	d
RH_HS_LPSC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_HS_LPSC	/;"	d
RH_HS_LPSC	drivers/usb/host/ohci.h	/^#define RH_HS_LPSC	/;"	d
RH_HS_LPSC	drivers/usb/host/r8a66597.h	/^#define RH_HS_LPSC	/;"	d
RH_HS_OCI	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_HS_OCI	/;"	d
RH_HS_OCI	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_HS_OCI	/;"	d
RH_HS_OCI	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_HS_OCI	/;"	d
RH_HS_OCI	drivers/usb/host/isp116x.h	/^#define		RH_HS_OCI	/;"	d
RH_HS_OCI	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_HS_OCI	/;"	d
RH_HS_OCI	drivers/usb/host/ohci.h	/^#define RH_HS_OCI	/;"	d
RH_HS_OCI	drivers/usb/host/r8a66597.h	/^#define RH_HS_OCI	/;"	d
RH_HS_OCIC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_HS_OCIC	/;"	d
RH_HS_OCIC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_HS_OCIC	/;"	d
RH_HS_OCIC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_HS_OCIC	/;"	d
RH_HS_OCIC	drivers/usb/host/isp116x.h	/^#define		RH_HS_OCIC	/;"	d
RH_HS_OCIC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_HS_OCIC	/;"	d
RH_HS_OCIC	drivers/usb/host/ohci.h	/^#define RH_HS_OCIC	/;"	d
RH_HS_OCIC	drivers/usb/host/r8a66597.h	/^#define RH_HS_OCIC	/;"	d
RH_INTERFACE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_INTERFACE	/;"	d
RH_INTERFACE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_INTERFACE	/;"	d
RH_INTERFACE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_INTERFACE	/;"	d
RH_INTERFACE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_INTERFACE /;"	d
RH_INTERFACE	board/mpl/common/usb_uhci.h	/^#define RH_INTERFACE /;"	d
RH_INTERFACE	drivers/usb/host/isp116x.h	/^#define RH_INTERFACE /;"	d
RH_INTERFACE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_INTERFACE	/;"	d
RH_INTERFACE	drivers/usb/host/ohci.h	/^#define RH_INTERFACE	/;"	d
RH_INTERFACE	drivers/usb/host/r8a66597.h	/^#define RH_INTERFACE	/;"	d
RH_INTERFACE	drivers/usb/musb/musb_hcd.h	/^#define RH_INTERFACE	/;"	d
RH_NACK	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_NACK	/;"	d
RH_NACK	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_NACK	/;"	d
RH_NACK	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_NACK	/;"	d
RH_NACK	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_NACK /;"	d
RH_NACK	board/mpl/common/usb_uhci.h	/^#define RH_NACK /;"	d
RH_NACK	drivers/usb/host/isp116x.h	/^#define RH_NACK /;"	d
RH_NACK	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_NACK	/;"	d
RH_NACK	drivers/usb/host/ohci.h	/^#define RH_NACK	/;"	d
RH_NACK	drivers/usb/host/r8a66597.h	/^#define RH_NACK	/;"	d
RH_NACK	drivers/usb/musb/musb_hcd.h	/^#define RH_NACK	/;"	d
RH_OTHER	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_OTHER	/;"	d
RH_OTHER	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_OTHER	/;"	d
RH_OTHER	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_OTHER	/;"	d
RH_OTHER	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_OTHER /;"	d
RH_OTHER	board/mpl/common/usb_uhci.h	/^#define RH_OTHER /;"	d
RH_OTHER	drivers/usb/host/isp116x.h	/^#define RH_OTHER /;"	d
RH_OTHER	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_OTHER	/;"	d
RH_OTHER	drivers/usb/host/ohci.h	/^#define RH_OTHER	/;"	d
RH_OTHER	drivers/usb/host/r8a66597.h	/^#define RH_OTHER	/;"	d
RH_OTHER	drivers/usb/musb/musb_hcd.h	/^#define RH_OTHER	/;"	d
RH_PORT_CONNECTION	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_CONNECTION	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_CONNECTION	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_CONNECTION	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_CONNECTION /;"	d
RH_PORT_CONNECTION	board/mpl/common/usb_uhci.h	/^#define RH_PORT_CONNECTION /;"	d
RH_PORT_CONNECTION	drivers/usb/host/isp116x.h	/^#define RH_PORT_CONNECTION /;"	d
RH_PORT_CONNECTION	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_CONNECTION	drivers/usb/host/ohci.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_CONNECTION	drivers/usb/host/r8a66597.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_CONNECTION	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_CONNECTION	/;"	d
RH_PORT_ENABLE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_ENABLE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_ENABLE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_ENABLE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_ENABLE /;"	d
RH_PORT_ENABLE	board/mpl/common/usb_uhci.h	/^#define RH_PORT_ENABLE /;"	d
RH_PORT_ENABLE	drivers/usb/host/isp116x.h	/^#define RH_PORT_ENABLE /;"	d
RH_PORT_ENABLE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_ENABLE	drivers/usb/host/ohci.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_ENABLE	drivers/usb/host/r8a66597.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_ENABLE	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_ENABLE	/;"	d
RH_PORT_LOW_SPEED	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_LOW_SPEED	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_LOW_SPEED	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_LOW_SPEED	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_LOW_SPEED /;"	d
RH_PORT_LOW_SPEED	board/mpl/common/usb_uhci.h	/^#define RH_PORT_LOW_SPEED /;"	d
RH_PORT_LOW_SPEED	drivers/usb/host/isp116x.h	/^#define RH_PORT_LOW_SPEED /;"	d
RH_PORT_LOW_SPEED	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_LOW_SPEED	drivers/usb/host/ohci.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_LOW_SPEED	drivers/usb/host/r8a66597.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_LOW_SPEED	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_LOW_SPEED	/;"	d
RH_PORT_OVER_CURRENT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_OVER_CURRENT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_OVER_CURRENT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_OVER_CURRENT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_OVER_CURRENT /;"	d
RH_PORT_OVER_CURRENT	board/mpl/common/usb_uhci.h	/^#define RH_PORT_OVER_CURRENT /;"	d
RH_PORT_OVER_CURRENT	drivers/usb/host/isp116x.h	/^#define RH_PORT_OVER_CURRENT /;"	d
RH_PORT_OVER_CURRENT	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_OVER_CURRENT	drivers/usb/host/ohci.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_OVER_CURRENT	drivers/usb/host/r8a66597.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_OVER_CURRENT	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_OVER_CURRENT	/;"	d
RH_PORT_POWER	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_POWER	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_POWER	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_POWER	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_POWER /;"	d
RH_PORT_POWER	board/mpl/common/usb_uhci.h	/^#define RH_PORT_POWER /;"	d
RH_PORT_POWER	drivers/usb/host/isp116x.h	/^#define RH_PORT_POWER /;"	d
RH_PORT_POWER	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_POWER	drivers/usb/host/ohci.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_POWER	drivers/usb/host/r8a66597.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_POWER	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_POWER	/;"	d
RH_PORT_RESET	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_RESET	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_RESET	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_RESET	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_RESET /;"	d
RH_PORT_RESET	board/mpl/common/usb_uhci.h	/^#define RH_PORT_RESET /;"	d
RH_PORT_RESET	drivers/usb/host/isp116x.h	/^#define RH_PORT_RESET /;"	d
RH_PORT_RESET	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_RESET	drivers/usb/host/ohci.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_RESET	drivers/usb/host/r8a66597.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_RESET	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_RESET	/;"	d
RH_PORT_SUSPEND	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PORT_SUSPEND	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PORT_SUSPEND	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PORT_SUSPEND	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_PORT_SUSPEND /;"	d
RH_PORT_SUSPEND	board/mpl/common/usb_uhci.h	/^#define RH_PORT_SUSPEND /;"	d
RH_PORT_SUSPEND	drivers/usb/host/isp116x.h	/^#define RH_PORT_SUSPEND /;"	d
RH_PORT_SUSPEND	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PORT_SUSPEND	drivers/usb/host/ohci.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PORT_SUSPEND	drivers/usb/host/r8a66597.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PORT_SUSPEND	drivers/usb/musb/musb_hcd.h	/^#define RH_PORT_SUSPEND	/;"	d
RH_PS_CCS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_CCS	/;"	d
RH_PS_CCS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_CCS	/;"	d
RH_PS_CCS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_CCS	/;"	d
RH_PS_CCS	drivers/usb/host/isp116x.h	/^#define		RH_PS_CCS	/;"	d
RH_PS_CCS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_CCS	/;"	d
RH_PS_CCS	drivers/usb/host/ohci.h	/^#define RH_PS_CCS	/;"	d
RH_PS_CCS	drivers/usb/host/r8a66597.h	/^#define RH_PS_CCS	/;"	d
RH_PS_CSC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_CSC	/;"	d
RH_PS_CSC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_CSC	/;"	d
RH_PS_CSC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_CSC	/;"	d
RH_PS_CSC	drivers/usb/host/isp116x.h	/^#define		RH_PS_CSC	/;"	d
RH_PS_CSC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_CSC	/;"	d
RH_PS_CSC	drivers/usb/host/ohci.h	/^#define RH_PS_CSC	/;"	d
RH_PS_CSC	drivers/usb/host/r8a66597.h	/^#define RH_PS_CSC	/;"	d
RH_PS_LSDA	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_LSDA	/;"	d
RH_PS_LSDA	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_LSDA	/;"	d
RH_PS_LSDA	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_LSDA	/;"	d
RH_PS_LSDA	drivers/usb/host/isp116x.h	/^#define		RH_PS_LSDA	/;"	d
RH_PS_LSDA	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_LSDA	/;"	d
RH_PS_LSDA	drivers/usb/host/ohci.h	/^#define RH_PS_LSDA	/;"	d
RH_PS_LSDA	drivers/usb/host/r8a66597.h	/^#define RH_PS_LSDA	/;"	d
RH_PS_OCIC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_OCIC	/;"	d
RH_PS_OCIC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_OCIC	/;"	d
RH_PS_OCIC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_OCIC	/;"	d
RH_PS_OCIC	drivers/usb/host/isp116x.h	/^#define		RH_PS_OCIC	/;"	d
RH_PS_OCIC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_OCIC	/;"	d
RH_PS_OCIC	drivers/usb/host/ohci.h	/^#define RH_PS_OCIC	/;"	d
RH_PS_OCIC	drivers/usb/host/r8a66597.h	/^#define RH_PS_OCIC	/;"	d
RH_PS_PES	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PES	/;"	d
RH_PS_PES	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PES	/;"	d
RH_PS_PES	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PES	/;"	d
RH_PS_PES	drivers/usb/host/isp116x.h	/^#define		RH_PS_PES	/;"	d
RH_PS_PES	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PES	/;"	d
RH_PS_PES	drivers/usb/host/ohci.h	/^#define RH_PS_PES	/;"	d
RH_PS_PES	drivers/usb/host/r8a66597.h	/^#define RH_PS_PES	/;"	d
RH_PS_PESC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PESC	/;"	d
RH_PS_PESC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PESC	/;"	d
RH_PS_PESC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PESC	/;"	d
RH_PS_PESC	drivers/usb/host/isp116x.h	/^#define		RH_PS_PESC	/;"	d
RH_PS_PESC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PESC	/;"	d
RH_PS_PESC	drivers/usb/host/ohci.h	/^#define RH_PS_PESC	/;"	d
RH_PS_PESC	drivers/usb/host/r8a66597.h	/^#define RH_PS_PESC	/;"	d
RH_PS_POCI	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_POCI	/;"	d
RH_PS_POCI	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_POCI	/;"	d
RH_PS_POCI	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_POCI	/;"	d
RH_PS_POCI	drivers/usb/host/isp116x.h	/^#define		RH_PS_POCI	/;"	d
RH_PS_POCI	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_POCI	/;"	d
RH_PS_POCI	drivers/usb/host/ohci.h	/^#define RH_PS_POCI	/;"	d
RH_PS_POCI	drivers/usb/host/r8a66597.h	/^#define RH_PS_POCI	/;"	d
RH_PS_PPS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PPS	/;"	d
RH_PS_PPS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PPS	/;"	d
RH_PS_PPS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PPS	/;"	d
RH_PS_PPS	drivers/usb/host/isp116x.h	/^#define		RH_PS_PPS	/;"	d
RH_PS_PPS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PPS	/;"	d
RH_PS_PPS	drivers/usb/host/ohci.h	/^#define RH_PS_PPS	/;"	d
RH_PS_PPS	drivers/usb/host/r8a66597.h	/^#define RH_PS_PPS	/;"	d
RH_PS_PRS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PRS	/;"	d
RH_PS_PRS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PRS	/;"	d
RH_PS_PRS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PRS	/;"	d
RH_PS_PRS	drivers/usb/host/isp116x.h	/^#define		RH_PS_PRS	/;"	d
RH_PS_PRS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PRS	/;"	d
RH_PS_PRS	drivers/usb/host/ohci.h	/^#define RH_PS_PRS	/;"	d
RH_PS_PRS	drivers/usb/host/r8a66597.h	/^#define RH_PS_PRS	/;"	d
RH_PS_PRSC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PRSC	/;"	d
RH_PS_PRSC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PRSC	/;"	d
RH_PS_PRSC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PRSC	/;"	d
RH_PS_PRSC	drivers/usb/host/isp116x.h	/^#define		RH_PS_PRSC	/;"	d
RH_PS_PRSC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PRSC	/;"	d
RH_PS_PRSC	drivers/usb/host/ohci.h	/^#define RH_PS_PRSC	/;"	d
RH_PS_PRSC	drivers/usb/host/r8a66597.h	/^#define RH_PS_PRSC	/;"	d
RH_PS_PSS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PSS	/;"	d
RH_PS_PSS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PSS	/;"	d
RH_PS_PSS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PSS	/;"	d
RH_PS_PSS	drivers/usb/host/isp116x.h	/^#define		RH_PS_PSS	/;"	d
RH_PS_PSS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PSS	/;"	d
RH_PS_PSS	drivers/usb/host/ohci.h	/^#define RH_PS_PSS	/;"	d
RH_PS_PSS	drivers/usb/host/r8a66597.h	/^#define RH_PS_PSS	/;"	d
RH_PS_PSSC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_PS_PSSC	/;"	d
RH_PS_PSSC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_PS_PSSC	/;"	d
RH_PS_PSSC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_PS_PSSC	/;"	d
RH_PS_PSSC	drivers/usb/host/isp116x.h	/^#define		RH_PS_PSSC	/;"	d
RH_PS_PSSC	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_PS_PSSC	/;"	d
RH_PS_PSSC	drivers/usb/host/ohci.h	/^#define RH_PS_PSSC	/;"	d
RH_PS_PSSC	drivers/usb/host/r8a66597.h	/^#define RH_PS_PSSC	/;"	d
RH_REMOVE_EP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_REMOVE_EP /;"	d
RH_REMOVE_EP	board/mpl/common/usb_uhci.h	/^#define RH_REMOVE_EP /;"	d
RH_REQ_ERR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_REQ_ERR	/;"	d
RH_REQ_ERR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_REQ_ERR	/;"	d
RH_REQ_ERR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_REQ_ERR	/;"	d
RH_REQ_ERR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_REQ_ERR /;"	d
RH_REQ_ERR	board/mpl/common/usb_uhci.h	/^#define RH_REQ_ERR /;"	d
RH_REQ_ERR	drivers/usb/host/isp116x.h	/^#define RH_REQ_ERR /;"	d
RH_REQ_ERR	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_REQ_ERR	/;"	d
RH_REQ_ERR	drivers/usb/host/ohci.h	/^#define RH_REQ_ERR	/;"	d
RH_REQ_ERR	drivers/usb/host/r8a66597.h	/^#define RH_REQ_ERR	/;"	d
RH_REQ_ERR	drivers/usb/musb/musb_hcd.h	/^#define RH_REQ_ERR	/;"	d
RH_SET_ADDRESS	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SET_ADDRESS /;"	d
RH_SET_ADDRESS	board/mpl/common/usb_uhci.h	/^#define RH_SET_ADDRESS /;"	d
RH_SET_ADDRESS	drivers/usb/host/isp116x.h	/^#define RH_SET_ADDRESS /;"	d
RH_SET_ADDRESS	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	drivers/usb/host/ohci.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	drivers/usb/host/r8a66597.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	drivers/usb/host/sl811.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_ADDRESS	drivers/usb/musb/musb_hcd.h	/^#define RH_SET_ADDRESS	/;"	d
RH_SET_CONFIGURATION	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SET_CONFIGURATION /;"	d
RH_SET_CONFIGURATION	board/mpl/common/usb_uhci.h	/^#define RH_SET_CONFIGURATION /;"	d
RH_SET_CONFIGURATION	drivers/usb/host/isp116x.h	/^#define RH_SET_CONFIGURATION /;"	d
RH_SET_CONFIGURATION	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	drivers/usb/host/ohci.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	drivers/usb/host/r8a66597.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	drivers/usb/host/sl811.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_CONFIGURATION	drivers/usb/musb/musb_hcd.h	/^#define RH_SET_CONFIGURATION	/;"	d
RH_SET_DESCRIPTOR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_DESCRIPTOR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_DESCRIPTOR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_DESCRIPTOR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SET_DESCRIPTOR /;"	d
RH_SET_DESCRIPTOR	board/mpl/common/usb_uhci.h	/^#define RH_SET_DESCRIPTOR /;"	d
RH_SET_DESCRIPTOR	drivers/usb/host/isp116x.h	/^#define RH_SET_DESCRIPTOR /;"	d
RH_SET_DESCRIPTOR	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_DESCRIPTOR	drivers/usb/host/ohci.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_DESCRIPTOR	drivers/usb/host/r8a66597.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_DESCRIPTOR	drivers/usb/host/sl811.h	/^#define RH_SET_DESCRIPTOR /;"	d
RH_SET_DESCRIPTOR	drivers/usb/musb/musb_hcd.h	/^#define RH_SET_DESCRIPTOR	/;"	d
RH_SET_EP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SET_EP	/;"	d
RH_SET_EP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SET_EP	/;"	d
RH_SET_EP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SET_EP	/;"	d
RH_SET_EP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SET_EP /;"	d
RH_SET_EP	board/mpl/common/usb_uhci.h	/^#define RH_SET_EP /;"	d
RH_SET_EP	drivers/usb/host/isp116x.h	/^#define RH_SET_EP /;"	d
RH_SET_EP	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SET_EP	/;"	d
RH_SET_EP	drivers/usb/host/ohci.h	/^#define RH_SET_EP	/;"	d
RH_SET_EP	drivers/usb/host/r8a66597.h	/^#define RH_SET_EP	/;"	d
RH_SET_EP	drivers/usb/musb/musb_hcd.h	/^#define RH_SET_EP	/;"	d
RH_SET_FEATURE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_FEATURE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_FEATURE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_FEATURE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SET_FEATURE /;"	d
RH_SET_FEATURE	board/mpl/common/usb_uhci.h	/^#define RH_SET_FEATURE /;"	d
RH_SET_FEATURE	drivers/usb/host/isp116x.h	/^#define RH_SET_FEATURE /;"	d
RH_SET_FEATURE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_FEATURE	drivers/usb/host/ohci.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_FEATURE	drivers/usb/host/r8a66597.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_FEATURE	drivers/usb/host/sl811.h	/^#define RH_SET_FEATURE /;"	d
RH_SET_FEATURE	drivers/usb/musb/musb_hcd.h	/^#define RH_SET_FEATURE	/;"	d
RH_SET_INTERFACE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SET_INTERFACE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SET_INTERFACE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SET_INTERFACE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SET_INTERFACE /;"	d
RH_SET_INTERFACE	board/mpl/common/usb_uhci.h	/^#define RH_SET_INTERFACE /;"	d
RH_SET_INTERFACE	drivers/usb/host/isp116x.h	/^#define RH_SET_INTERFACE /;"	d
RH_SET_INTERFACE	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SET_INTERFACE	drivers/usb/host/ohci.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SET_INTERFACE	drivers/usb/host/r8a66597.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SET_INTERFACE	drivers/usb/host/sl811.h	/^#define RH_SET_INTERFACE /;"	d
RH_SET_INTERFACE	drivers/usb/musb/musb_hcd.h	/^#define RH_SET_INTERFACE	/;"	d
RH_SYNC_FRAME	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_SYNC_FRAME	/;"	d
RH_SYNC_FRAME	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_SYNC_FRAME	/;"	d
RH_SYNC_FRAME	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_SYNC_FRAME	/;"	d
RH_SYNC_FRAME	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_SYNC_FRAME /;"	d
RH_SYNC_FRAME	board/mpl/common/usb_uhci.h	/^#define RH_SYNC_FRAME /;"	d
RH_SYNC_FRAME	drivers/usb/host/isp116x.h	/^#define RH_SYNC_FRAME /;"	d
RH_SYNC_FRAME	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_SYNC_FRAME	/;"	d
RH_SYNC_FRAME	drivers/usb/host/ohci.h	/^#define RH_SYNC_FRAME	/;"	d
RH_SYNC_FRAME	drivers/usb/host/r8a66597.h	/^#define RH_SYNC_FRAME	/;"	d
RH_SYNC_FRAME	drivers/usb/host/sl811.h	/^#define RH_SYNC_FRAME /;"	d
RH_SYNC_FRAME	drivers/usb/musb/musb_hcd.h	/^#define RH_SYNC_FRAME	/;"	d
RH_VENDOR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define RH_VENDOR	/;"	d
RH_VENDOR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define RH_VENDOR	/;"	d
RH_VENDOR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define RH_VENDOR	/;"	d
RH_VENDOR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define RH_VENDOR /;"	d
RH_VENDOR	board/mpl/common/usb_uhci.h	/^#define RH_VENDOR /;"	d
RH_VENDOR	drivers/usb/host/isp116x.h	/^#define RH_VENDOR /;"	d
RH_VENDOR	drivers/usb/host/ohci-s3c24xx.h	/^#define RH_VENDOR	/;"	d
RH_VENDOR	drivers/usb/host/ohci.h	/^#define RH_VENDOR	/;"	d
RH_VENDOR	drivers/usb/host/r8a66597.h	/^#define RH_VENDOR	/;"	d
RH_VENDOR	drivers/usb/musb/musb_hcd.h	/^#define RH_VENDOR	/;"	d
RIF0_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_CLK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_D0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_D0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_D0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_D0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_D0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_D0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_D1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_D1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_D1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_D1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_D1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_D1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF0_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF0_SYNC_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
RIF1_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_CLK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_D0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_D0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_D0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C2_SCL_C_MARK, DU1_DR2_MARK, RIF1_D0_B_MARK, TS_SDEN_D_MARK,$/;"	e	enum:__anona307901d0103	file:
RIF1_D0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_D0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_D0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_D0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_D1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_D1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_D1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_D1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_D1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_D1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DR0_MARK, RIF1_SYNC_B_MARK, TS_SDATA_D_MARK, TPUTO1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
RIF1_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF1_SYNC_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF1_SYNC_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_D0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_D0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_D0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_D0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_D1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_D1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_D1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_D1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF2_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF2_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_D0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_D0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_D0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_D0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_D1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_D1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_SYNC_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_SYNC_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RIF3_SYNC_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RIF3_SYNC_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RIGHT	board/tqc/tqm5200/cmd_stk52xx.c	/^#define RIGHT	/;"	d	file:
RIGHT_ALT	common/usb_kbd.c	/^#define RIGHT_ALT	/;"	d	file:
RIGHT_CHN_RX_DQS_DELAY_TAP_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_RX_DQS_DELAY_TAP_MASK		= 3,$/;"	e	enum:__anon957231910103	file:
RIGHT_CHN_RX_DQS_DELAY_TAP_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_RX_DQS_DELAY_TAP_SHIFT	= 0,$/;"	e	enum:__anon957231910103	file:
RIGHT_CHN_TX_DQ_DLL_DELAY_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_TX_DQ_DLL_DELAY_MASK		= 7,$/;"	e	enum:__anon957231910103	file:
RIGHT_CHN_TX_DQ_DLL_DELAY_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_TX_DQ_DLL_DELAY_SHIFT		= 0,$/;"	e	enum:__anon957231910103	file:
RIGHT_CHN_TX_DQ_DLL_ENABLE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_TX_DQ_DLL_ENABLE		= 1 << 3,$/;"	e	enum:__anon957231910103	file:
RIGHT_CHN_TX_DQ_PHASE_BYPASS_0	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_TX_DQ_PHASE_BYPASS_0		= 0 << 4,$/;"	e	enum:__anon957231910103	file:
RIGHT_CHN_TX_DQ_PHASE_BYPASS_90	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RIGHT_CHN_TX_DQ_PHASE_BYPASS_90		= 1 << 4,$/;"	e	enum:__anon957231910103	file:
RIGHT_CNTR	common/usb_kbd.c	/^#define RIGHT_CNTR	/;"	d	file:
RIGHT_GUI	common/usb_kbd.c	/^#define RIGHT_GUI	/;"	d	file:
RIGHT_MARGIN	drivers/video/da8xx-fb.c	/^#define RIGHT_MARGIN	/;"	d	file:
RIGHT_SHIFT	common/usb_kbd.c	/^#define RIGHT_SHIFT	/;"	d	file:
RINGSZ	include/net.h	/^#define RINGSZ	/;"	d
RINGSZ_LOG2	include/net.h	/^#define RINGSZ_LOG2	/;"	d
RINOK	lib/lzma/Types.h	/^#define RINOK(/;"	d
RI_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   RI_STS	/;"	d
RK3288_LVDS_CFG_REG21	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CFG_REG21	/;"	d
RK3288_LVDS_CFG_REG21_TX_DISABLE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CFG_REG21_TX_DISABLE	/;"	d
RK3288_LVDS_CFG_REG21_TX_ENABLE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CFG_REG21_TX_ENABLE	/;"	d
RK3288_LVDS_CFG_REGC	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CFG_REGC	/;"	d
RK3288_LVDS_CFG_REGC_PLL_DISABLE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CFG_REGC_PLL_DISABLE	/;"	d
RK3288_LVDS_CFG_REGC_PLL_ENABLE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CFG_REGC_PLL_ENABLE	/;"	d
RK3288_LVDS_CH0_REG0	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0	/;"	d
RK3288_LVDS_CH0_REG0_LANE0_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LANE0_EN	/;"	d
RK3288_LVDS_CH0_REG0_LANE1_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LANE1_EN	/;"	d
RK3288_LVDS_CH0_REG0_LANE2_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LANE2_EN	/;"	d
RK3288_LVDS_CH0_REG0_LANE3_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LANE3_EN	/;"	d
RK3288_LVDS_CH0_REG0_LANE4_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LANE4_EN	/;"	d
RK3288_LVDS_CH0_REG0_LANECK_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LANECK_EN	/;"	d
RK3288_LVDS_CH0_REG0_LVDS_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_LVDS_EN	/;"	d
RK3288_LVDS_CH0_REG0_TTL_EN	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG0_TTL_EN	/;"	d
RK3288_LVDS_CH0_REG1	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1	/;"	d
RK3288_LVDS_CH0_REG1_LANE0_BIAS	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1_LANE0_BIAS	/;"	d
RK3288_LVDS_CH0_REG1_LANE1_BIAS	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1_LANE1_BIAS	/;"	d
RK3288_LVDS_CH0_REG1_LANE2_BIAS	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1_LANE2_BIAS	/;"	d
RK3288_LVDS_CH0_REG1_LANE3_BIAS	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1_LANE3_BIAS	/;"	d
RK3288_LVDS_CH0_REG1_LANE4_BIAS	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1_LANE4_BIAS	/;"	d
RK3288_LVDS_CH0_REG1_LANECK_BIAS	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG1_LANECK_BIAS	/;"	d
RK3288_LVDS_CH0_REG2	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2	/;"	d
RK3288_LVDS_CH0_REG20	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG20	/;"	d
RK3288_LVDS_CH0_REG20_LSB	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG20_LSB	/;"	d
RK3288_LVDS_CH0_REG20_MSB	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG20_MSB	/;"	d
RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE	/;"	d
RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE	/;"	d
RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE	/;"	d
RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE	/;"	d
RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE	/;"	d
RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE	/;"	d
RK3288_LVDS_CH0_REG2_PLL_FBDIV8	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8	/;"	d
RK3288_LVDS_CH0_REG2_RESERVE_ON	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG2_RESERVE_ON	/;"	d
RK3288_LVDS_CH0_REG3	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG3	/;"	d
RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK	/;"	d
RK3288_LVDS_CH0_REG4	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4	/;"	d
RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE	/;"	d
RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE	/;"	d
RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE	/;"	d
RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE	/;"	d
RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE	/;"	d
RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE	/;"	d
RK3288_LVDS_CH0_REG5	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5	/;"	d
RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA	/;"	d
RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA	/;"	d
RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA	/;"	d
RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA	/;"	d
RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA	/;"	d
RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA	/;"	d
RK3288_LVDS_CH0_REGD	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REGD	/;"	d
RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK	/;"	d
RK3288_LVDS_PLL_FBDIV_REG2	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_PLL_FBDIV_REG2(/;"	d
RK3288_LVDS_PLL_FBDIV_REG3	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_PLL_FBDIV_REG3(/;"	d
RK3288_LVDS_PLL_PREDIV_REGD	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_PLL_PREDIV_REGD(/;"	d
RK3288_LVDS_SOC_CON6_SEL_VOP_LIT	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT	/;"	d
RK3288_PD_GPU	arch/arm/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	arch/microblaze/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	arch/mips/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	arch/nios2/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	arch/sandbox/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	arch/x86/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	arch/xtensa/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_GPU	include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_GPU /;"	d
RK3288_PD_HEVC	arch/arm/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	arch/microblaze/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	arch/mips/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	arch/nios2/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	arch/sandbox/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	arch/x86/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	arch/xtensa/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_HEVC	include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_HEVC /;"	d
RK3288_PD_PERI	arch/arm/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	arch/microblaze/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	arch/mips/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	arch/nios2/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	arch/sandbox/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	arch/x86/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	arch/xtensa/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_PERI	include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_PERI /;"	d
RK3288_PD_VIDEO	arch/arm/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	arch/microblaze/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	arch/mips/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	arch/nios2/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	arch/sandbox/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	arch/x86/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	arch/xtensa/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIDEO	include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIDEO /;"	d
RK3288_PD_VIO	arch/arm/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	arch/microblaze/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	arch/mips/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	arch/nios2/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	arch/sandbox/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	arch/x86/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	arch/xtensa/dts/include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK3288_PD_VIO	include/dt-bindings/power-domain/rk3288.h	/^#define RK3288_PD_VIO /;"	d
RK808_CLKOUT0	arch/arm/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	arch/microblaze/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	arch/mips/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	arch/nios2/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	arch/sandbox/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	arch/x86/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	arch/xtensa/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT0	include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT0	/;"	d
RK808_CLKOUT1	arch/arm/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	arch/microblaze/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	arch/mips/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	arch/nios2/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	arch/sandbox/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	arch/x86/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	arch/xtensa/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_CLKOUT1	include/dt-bindings/clock/rockchip,rk808.h	/^#define RK808_CLKOUT1	/;"	d
RK808_NUM_OF_REGS	include/power/rk808_pmic.h	/^	RK808_NUM_OF_REGS,$/;"	e	enum:__anon9b8afd0f0103
RKCLK_PLL_MODE_NORMAL	arch/arm/include/asm/arch-rockchip/clock.h	/^#define RKCLK_PLL_MODE_NORMAL	/;"	d
RKCLK_PLL_MODE_SLOW	arch/arm/include/asm/arch-rockchip/clock.h	/^#define RKCLK_PLL_MODE_SLOW	/;"	d
RKSPI_SECT_LEN	tools/rkspi.c	/^	RKSPI_SECT_LEN		= RK_BLK_SIZE * 4,$/;"	e	enum:__anon229d051f0103	file:
RK_BLK_SIZE	tools/rkcommon.h	/^	RK_BLK_SIZE		= 512,$/;"	e	enum:__anonf90573010103
RK_CLRBITS	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define RK_CLRBITS(/;"	d
RK_CLRSETBITS	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define RK_CLRSETBITS(/;"	d
RK_FUNC_1	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_1	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_1	/;"	d
RK_FUNC_2	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_2	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_2	/;"	d
RK_FUNC_3	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_3	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_3	/;"	d
RK_FUNC_4	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_4	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_4	/;"	d
RK_FUNC_GPIO	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_FUNC_GPIO	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_FUNC_GPIO	/;"	d
RK_GPIO0	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO0	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO0	/;"	d
RK_GPIO1	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO1	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO1	/;"	d
RK_GPIO2	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO2	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO2	/;"	d
RK_GPIO3	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO3	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO3	/;"	d
RK_GPIO4	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO4	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO4	/;"	d
RK_GPIO6	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_GPIO6	include/dt-bindings/pinctrl/rockchip.h	/^#define RK_GPIO6	/;"	d
RK_I2C_FIFO_SIZE	drivers/i2c/rk_i2c.c	/^#define RK_I2C_FIFO_SIZE	/;"	d	file:
RK_IMAGE_HEADER_LEN	tools/rkcommon.h	/^	RK_IMAGE_HEADER_LEN	= RK_SPL_START,$/;"	e	enum:__anonf90573010103
RK_INIT_OFFSET	tools/rkcommon.h	/^	RK_INIT_OFFSET		= 4,$/;"	e	enum:__anonf90573010103
RK_MAX_BOOT_SIZE	tools/rkcommon.h	/^	RK_MAX_BOOT_SIZE	= 512 << 10,$/;"	e	enum:__anonf90573010103
RK_PWM_CAPTURE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define RK_PWM_CAPTURE /;"	d
RK_PWM_DISABLE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define RK_PWM_DISABLE /;"	d
RK_PWM_ENABLE	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define RK_PWM_ENABLE /;"	d
RK_SETBITS	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define RK_SETBITS(/;"	d
RK_SIGNATURE	tools/rkcommon.c	/^	RK_SIGNATURE		= 0x0ff0aa55,$/;"	e	enum:__anonf90572fc0103	file:
RK_SPL_HDR_SIZE	tools/rkcommon.h	/^	RK_SPL_HDR_SIZE		= 4,$/;"	e	enum:__anonf90573010103
RK_SPL_HDR_START	tools/rkcommon.h	/^	RK_SPL_HDR_START	= RK_INIT_OFFSET * RK_BLK_SIZE,$/;"	e	enum:__anonf90573010103
RK_SPL_START	tools/rkcommon.h	/^	RK_SPL_START		= RK_SPL_HDR_START + RK_SPL_HDR_SIZE,$/;"	e	enum:__anonf90573010103
RL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RL(/;"	d
RL	arch/arm/include/asm/emif.h	/^	u8 RL;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
RL	drivers/ddr/microchip/ddr2_timing.h	/^#define RL	/;"	d
RLE_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define RLE_BASE_ADDR	/;"	d
RL_BOOT	arch/arm/include/asm/emif.h	/^#define RL_BOOT	/;"	d
RL_FINAL	arch/arm/include/asm/emif.h	/^#define RL_FINAL	/;"	d
RL_FINAL_STATE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define RL_FINAL_STATE /;"	d
RL_MODE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define RL_MODE$/;"	d
RL_MODE_	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	RL_MODE_,$/;"	e	enum:training_modes
RL_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define RL_PHY_REG	/;"	d
RL_RETRY_COUNT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define RL_RETRY_COUNT /;"	d
RL_UNLOCK_STATE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define RL_UNLOCK_STATE /;"	d
RL_WINDOW_STATE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define RL_WINDOW_STATE /;"	d
RL_WINDOW_WA	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define RL_WINDOW_WA$/;"	d
RM7K_CONF_CLK	arch/mips/include/asm/mipsregs.h	/^#define RM7K_CONF_CLK	/;"	d
RM7K_CONF_SC	arch/mips/include/asm/mipsregs.h	/^#define RM7K_CONF_SC	/;"	d
RM7K_CONF_SE	arch/mips/include/asm/mipsregs.h	/^#define RM7K_CONF_SE	/;"	d
RM7K_CONF_SI	arch/mips/include/asm/mipsregs.h	/^#define RM7K_CONF_SI	/;"	d
RM7K_CONF_TC	arch/mips/include/asm/mipsregs.h	/^#define RM7K_CONF_TC	/;"	d
RM7K_CONF_TE	arch/mips/include/asm/mipsregs.h	/^#define RM7K_CONF_TE	/;"	d
RMASK	include/lattice.h	/^#define RMASK	/;"	d
RMASK_DATA	include/lattice.h	/^#define RMASK_DATA	/;"	d
RMBYTEREGS	drivers/bios_emulator/include/biosemu.h	/^} RMBYTEREGS;$/;"	t	typeref:struct:__anon964d10140508
RMBYTEREGS	drivers/bios_emulator/include/biosemu.h	/^} RMBYTEREGS;$/;"	t	typeref:struct:__anon964d10140608
RMCR	drivers/net/sh_eth.h	/^	RMCR,$/;"	e	enum:__anon5ef54f5a0103
RMCR_LCDC_EN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RMCR_LCDC_EN	/;"	d
RMCR_RST	drivers/net/sh_eth.h	/^enum RECV_RST_BIT { RMCR_RST = 0x01, };$/;"	e	enum:RECV_RST_BIT
RMCR_SELF_REF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RMCR_SELF_REF	/;"	d
RMDWORDREGS	drivers/bios_emulator/include/biosemu.h	/^} RMDWORDREGS;$/;"	t	typeref:struct:__anon964d10140208
RMFCR	drivers/net/sh_eth.h	/^	RMFCR,$/;"	e	enum:__anon5ef54f5a0103
RMII	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RMII	/;"	d
RMII	drivers/net/fec_mxc.h	/^	RMII,		\/* RMII *\/$/;"	e	enum:xceiver_type
RMII1_IO_CLK_EN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RMII1_IO_CLK_EN	/;"	d
RMII2_IO_CLK_EN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RMII2_IO_CLK_EN	/;"	d
RMIIMR	drivers/net/sh_eth.h	/^	RMIIMR, \/* R8A7790 *\/$/;"	e	enum:__anon5ef54f5a0103
RMII_10	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RMII_10	/;"	d
RMII_CHIPCKL_ENABLE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RMII_CHIPCKL_ENABLE /;"	d
RMII_CLK_EN	board/bf609-ezkit/soft_switch.h	/^#define RMII_CLK_EN /;"	d
RMII_CLK_SEL_25M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_CLK_SEL_25M,$/;"	e	enum:__anonbeb2b9771203
RMII_CLK_SEL_2_5M	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_CLK_SEL_2_5M	= 0,$/;"	e	enum:__anonbeb2b9771203
RMII_CLK_SEL_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_CLK_SEL_MASK	= 1,$/;"	e	enum:__anonbeb2b9771203
RMII_CLK_SEL_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_CLK_SEL_SHIFT	= 0xb,$/;"	e	enum:__anonbeb2b9771203
RMII_CRS_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_CRS_DV_MARK,	RMII_RX_ER_MARK,	RMII_RXD0_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_CRS_DV_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_EXTCLK_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	RMII_EXTCLK_MASK = 1,$/;"	e	enum:__anon3783c4e20303
RMII_EXTCLK_SELECT_EXT_CLK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	RMII_EXTCLK_SELECT_EXT_CLK = 1,$/;"	e	enum:__anon3783c4e20303
RMII_EXTCLK_SELECT_INT_DIV_CLK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	RMII_EXTCLK_SELECT_INT_DIV_CLK = 0,$/;"	e	enum:__anon3783c4e20303
RMII_EXTCLK_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	RMII_EXTCLK_SHIFT = 4,$/;"	e	enum:__anon3783c4e20303
RMII_LINK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_MAGIC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_MDC_MARK,		RMII_TXD1_MARK,		RMII_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_MDC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_MDC_MARK,		RMII_TXD1_MARK,		RMII_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_MDIO_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_MHZ_50_CLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RMII_MHZ_50_CLK	/;"	d
RMII_MII	drivers/net/sh_eth.h	/^	RMII_MII,$/;"	e	enum:__anon5ef54f5a0103
RMII_MODE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_MODE = 1,$/;"	e	enum:__anonbeb2b9771203
RMII_MODE_ENABLE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define RMII_MODE_ENABLE /;"	d
RMII_MODE_ENABLE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define RMII_MODE_ENABLE /;"	d
RMII_MODE_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_MODE_MASK = 1,$/;"	e	enum:__anonbeb2b9771203
RMII_MODE_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RMII_MODE_SHIFT = 0xe,$/;"	e	enum:__anonbeb2b9771203
RMII_PHY_RESET	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define RMII_PHY_RESET /;"	d	file:
RMII_REF125CK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_REF125CK_MARK,	\/* for GMII *\/$/;"	e	enum:__anona304c1340103	file:
RMII_REF50CK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_REF50CK_MARK,	\/* for RMII *\/$/;"	e	enum:__anona304c1340103	file:
RMII_REF_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_RGMII2_MODE_ENABLE	board/phytec/pcm051/board.c	/^#define RMII_RGMII2_MODE_ENABLE	/;"	d	file:
RMII_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_CRS_DV_MARK,	RMII_RX_ER_MARK,	RMII_RXD0_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_RXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_RXD1_MARK,		RMII_TX_EN_MARK,	RMII_TXD0_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_RXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_CRS_DV_MARK,	RMII_RX_ER_MARK,	RMII_RXD0_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_RX_ER_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_SEL	board/amcc/bamboo/bamboo.h	/^			    RMII_SEL,$/;"	e	enum:config_list
RMII_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_RXD1_MARK,		RMII_TX_EN_MARK,	RMII_TXD0_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_TXD0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_MDC_MARK,		RMII_TXD1_MARK,		RMII_MDIO_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_TXD1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,$/;"	e	enum:__anona3077f190103	file:
RMII_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RMII_RXD1_MARK,		RMII_TX_EN_MARK,	RMII_TXD0_MARK,$/;"	e	enum:__anona304c1340103	file:
RMII_TX_EN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
RMINAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RMINAR	/;"	d
RMINAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RMINAR	/;"	d
RMINCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RMINCNT /;"	d
RMINCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RMINCNT	/;"	d
RMIN_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RMIN_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RMOBILE_EXTRAM_BOOT	arch/arm/mach-rmobile/Kconfig.32	/^config RMOBILE_EXTRAM_BOOT$/;"	c
RMOBILE_XTAL_CLK	include/configs/alt.h	/^#define RMOBILE_XTAL_CLK /;"	d
RMOBILE_XTAL_CLK	include/configs/blanche.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMOBILE_XTAL_CLK	include/configs/gose.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMOBILE_XTAL_CLK	include/configs/koelsch.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMOBILE_XTAL_CLK	include/configs/lager.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMOBILE_XTAL_CLK	include/configs/porter.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMOBILE_XTAL_CLK	include/configs/silk.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMOBILE_XTAL_CLK	include/configs/stout.h	/^#define RMOBILE_XTAL_CLK	/;"	d
RMODULE_MAGIC	arch/x86/cpu/broadwell/refcode.c	/^#define RMODULE_MAGIC	/;"	d	file:
RMODULE_VERSION_1	arch/x86/cpu/broadwell/refcode.c	/^#define RMODULE_VERSION_1	/;"	d	file:
RMONAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RMONAR	/;"	d
RMONAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RMONAR	/;"	d
RMONCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RMONCNT /;"	d
RMONCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RMONCNT	/;"	d
RMREGS	drivers/bios_emulator/include/biosemu.h	/^} RMREGS;$/;"	t	typeref:union:__anon964d1014070a
RMR_CSRE	arch/powerpc/include/asm/immap_512x.h	/^#define RMR_CSRE	/;"	d
RMR_CSRE	include/mpc8260.h	/^#define RMR_CSRE	/;"	d
RMR_CSRE	include/mpc83xx.h	/^#define RMR_CSRE	/;"	d
RMR_CSRE_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define RMR_CSRE_SHIFT	/;"	d
RMR_CSRE_SHIFT	include/mpc83xx.h	/^#define RMR_CSRE_SHIFT	/;"	d
RMR_RES	arch/powerpc/include/asm/immap_512x.h	/^#define RMR_RES	/;"	d
RMR_RES	include/mpc83xx.h	/^#define RMR_RES	/;"	d
RMSREGS	drivers/bios_emulator/include/biosemu.h	/^} RMSREGS;$/;"	t	typeref:struct:__anon964d10140808
RMSTPCR0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR0	/;"	d
RMSTPCR0	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR0	/;"	d
RMSTPCR1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR1	/;"	d
RMSTPCR1	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR1	/;"	d
RMSTPCR10	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR10	/;"	d
RMSTPCR10	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR10	/;"	d
RMSTPCR11	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR11	/;"	d
RMSTPCR11	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR11	/;"	d
RMSTPCR2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR2	/;"	d
RMSTPCR2	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR2	/;"	d
RMSTPCR3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR3	/;"	d
RMSTPCR3	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR3	/;"	d
RMSTPCR4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR4	/;"	d
RMSTPCR4	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR4	/;"	d
RMSTPCR5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR5	/;"	d
RMSTPCR5	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR5	/;"	d
RMSTPCR6	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR6	/;"	d
RMSTPCR7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR7	/;"	d
RMSTPCR7	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR7	/;"	d
RMSTPCR8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR8	/;"	d
RMSTPCR8	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR8	/;"	d
RMSTPCR9	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RMSTPCR9	/;"	d
RMSTPCR9	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RMSTPCR9	/;"	d
RMU_ADDR	arch/x86/cpu/quark/Kconfig	/^config RMU_ADDR$/;"	c
RMU_BINARY_SIZE	arch/x86/include/asm/arch-quark/quark.h	/^#define RMU_BINARY_SIZE	/;"	d
RMU_CTRL	arch/x86/include/asm/arch-quark/quark.h	/^#define RMU_CTRL	/;"	d
RMU_FILE	arch/x86/cpu/quark/Kconfig	/^config RMU_FILE$/;"	c
RMWORDREGS	drivers/bios_emulator/include/biosemu.h	/^} RMWORDREGS;$/;"	t	typeref:struct:__anon964d10140308
RMWORDREGS	drivers/bios_emulator/include/biosemu.h	/^} RMWORDREGS;$/;"	t	typeref:struct:__anon964d10140408
RMX_HORZ_FILTER_0TAP_COEF	include/radeon.h	/^#define RMX_HORZ_FILTER_0TAP_COEF	/;"	d
RMX_HORZ_FILTER_1TAP_COEF	include/radeon.h	/^#define RMX_HORZ_FILTER_1TAP_COEF	/;"	d
RMX_HORZ_FILTER_2TAP_COEF	include/radeon.h	/^#define RMX_HORZ_FILTER_2TAP_COEF	/;"	d
RMX_HORZ_PHASE	include/radeon.h	/^#define RMX_HORZ_PHASE	/;"	d
RN5T567_CPUCNT	include/power/rn5t567_pmic.h	/^	RN5T567_CPUCNT		= 0x06,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC1CTL	include/power/rn5t567_pmic.h	/^	RN5T567_DC1CTL		= 0x2C,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC1CTL2	include/power/rn5t567_pmic.h	/^	RN5T567_DC1CTL2		= 0x2D,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC1DAC	include/power/rn5t567_pmic.h	/^	RN5T567_DC1DAC		= 0x36,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC1DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_DC1DAC_SLP	= 0x3B,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC1_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_DC1_SLOT	= 0x16,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC2CTL	include/power/rn5t567_pmic.h	/^	RN5T567_DC2CTL		= 0x2E,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC2CTL2	include/power/rn5t567_pmic.h	/^	RN5T567_DC2CTL2		= 0x2F,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC2DAC	include/power/rn5t567_pmic.h	/^	RN5T567_DC2DAC		= 0x37,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC2DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_DC2DAC_SLP	= 0x3C,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC2_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_DC2_SLOT	= 0x17,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC3CTL	include/power/rn5t567_pmic.h	/^	RN5T567_DC3CTL		= 0x30,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC3CTL2	include/power/rn5t567_pmic.h	/^	RN5T567_DC3CTL2		= 0x31,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC3DAC	include/power/rn5t567_pmic.h	/^	RN5T567_DC3DAC		= 0x38,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC3DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_DC3DAC_SLP	= 0x3D,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC3_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_DC3_SLOT	= 0x18,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC4CTL	include/power/rn5t567_pmic.h	/^	RN5T567_DC4CTL		= 0x32,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC4CTL2	include/power/rn5t567_pmic.h	/^	RN5T567_DC4CTL2		= 0x33,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC4DAC	include/power/rn5t567_pmic.h	/^	RN5T567_DC4DAC		= 0x39,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC4DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_DC4DAC_SLP	= 0x3E,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DC4_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_DC4_SLOT	= 0x19,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DCIREN	include/power/rn5t567_pmic.h	/^	RN5T567_DCIREN		= 0x40,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DCIRMON	include/power/rn5t567_pmic.h	/^	RN5T567_DCIRMON		= 0x42,$/;"	e	enum:__anonfee57e1d0103
RN5T567_DCIRQ	include/power/rn5t567_pmic.h	/^	RN5T567_DCIRQ		= 0x41,$/;"	e	enum:__anonfee57e1d0103
RN5T567_EN_GPIR	include/power/rn5t567_pmic.h	/^	RN5T567_EN_GPIR		= 0x94,$/;"	e	enum:__anonfee57e1d0103
RN5T567_GPEDGE1	include/power/rn5t567_pmic.h	/^	RN5T567_GPEDGE1		= 0x92,$/;"	e	enum:__anonfee57e1d0103
RN5T567_GPLED_FUNC	include/power/rn5t567_pmic.h	/^	RN5T567_GPLED_FUNC	= 0x98,$/;"	e	enum:__anonfee57e1d0103
RN5T567_INTEN	include/power/rn5t567_pmic.h	/^	RN5T567_INTEN		= 0x9D,$/;"	e	enum:__anonfee57e1d0103
RN5T567_INTMON	include/power/rn5t567_pmic.h	/^	RN5T567_INTMON		= 0x9E,$/;"	e	enum:__anonfee57e1d0103
RN5T567_INTPOL	include/power/rn5t567_pmic.h	/^	RN5T567_INTPOL		= 0x9C,$/;"	e	enum:__anonfee57e1d0103
RN5T567_IODAC	include/power/rn5t567_pmic.h	/^	RN5T567_IODAC		= 0x02,$/;"	e	enum:__anonfee57e1d0103
RN5T567_IOOUT	include/power/rn5t567_pmic.h	/^	RN5T567_IOOUT		= 0x91,$/;"	e	enum:__anonfee57e1d0103
RN5T567_IOSEL	include/power/rn5t567_pmic.h	/^	RN5T567_IOSEL		= 0x90,$/;"	e	enum:__anonfee57e1d0103
RN5T567_IR_GPF	include/power/rn5t567_pmic.h	/^	RN5T567_IR_GPF		= 0x96,$/;"	e	enum:__anonfee57e1d0103
RN5T567_IR_GPR	include/power/rn5t567_pmic.h	/^	RN5T567_IR_GPR		= 0x95,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO1DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDO1DAC		= 0x4C,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO1DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_LDO1DAC_SLP	= 0x58,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO1_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_LDO1_SLOT	= 0x1B,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO2DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDO2DAC		= 0x4D,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO2DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_LDO2DAC_SLP	= 0x59,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO2_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_LDO2_SLOT	= 0x1C,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO3DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDO3DAC		= 0x4E,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO3DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_LDO3DAC_SLP	= 0x5A,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO3_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_LDO3_SLOT	= 0x1D,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO4DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDO4DAC		= 0x4F,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO4DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_LDO4DAC_SLP	= 0x5B,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO4_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_LDO4_SLOT	= 0x1E,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO5DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDO5DAC		= 0x50,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO5DAC_SLP	include/power/rn5t567_pmic.h	/^	RN5T567_LDO5DAC_SLP	= 0x5C,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDO5_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_LDO5_SLOT	= 0x1F,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDODIS1	include/power/rn5t567_pmic.h	/^	RN5T567_LDODIS1		= 0x46,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDOEN1	include/power/rn5t567_pmic.h	/^	RN5T567_LDOEN1		= 0x44,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDOEN2	include/power/rn5t567_pmic.h	/^	RN5T567_LDOEN2		= 0x45,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDORTC1DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDORTC1DAC	= 0x56,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDORTC1_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_LDORTC1_SLOT	= 0x2A,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LDORTC2DAC	include/power/rn5t567_pmic.h	/^	RN5T567_LDORTC2DAC	= 0x57,$/;"	e	enum:__anonfee57e1d0103
RN5T567_LSIVER	include/power/rn5t567_pmic.h	/^	RN5T567_LSIVER		= 0x00,$/;"	e	enum:__anonfee57e1d0103
RN5T567_MON_IOIN	include/power/rn5t567_pmic.h	/^	RN5T567_MON_IOIN	= 0x97,$/;"	e	enum:__anonfee57e1d0103
RN5T567_NOETIMSETCNT	include/power/rn5t567_pmic.h	/^	RN5T567_NOETIMSETCNT	= 0x11,$/;"	e	enum:__anonfee57e1d0103
RN5T567_NUM_OF_REGS	include/power/rn5t567_pmic.h	/^	RN5T567_NUM_OF_REGS	= 0xBF,$/;"	e	enum:__anonfee57e1d0103
RN5T567_OTPVER	include/power/rn5t567_pmic.h	/^	RN5T567_OTPVER		= 0x01,$/;"	e	enum:__anonfee57e1d0103
RN5T567_OUT32KEN	include/power/rn5t567_pmic.h	/^	RN5T567_OUT32KEN	= 0x05,$/;"	e	enum:__anonfee57e1d0103
RN5T567_OVTEMP	include/power/rn5t567_pmic.h	/^	RN5T567_OVTEMP		= 0xBC,$/;"	e	enum:__anonfee57e1d0103
RN5T567_POFFHIS	include/power/rn5t567_pmic.h	/^	RN5T567_POFFHIS		= 0x0A,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PONHIS	include/power/rn5t567_pmic.h	/^	RN5T567_PONHIS		= 0x09,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PREVINDAC	include/power/rn5t567_pmic.h	/^	RN5T567_PREVINDAC	= 0xB0,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PSO0_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_PSO0_SLOT	= 0x25,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PSO1_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_PSO1_SLOT	= 0x26,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PSO2_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_PSO2_SLOT	= 0x27,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PSO3_SLOT	include/power/rn5t567_pmic.h	/^	RN5T567_PSO3_SLOT	= 0x28,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PSWR	include/power/rn5t567_pmic.h	/^	RN5T567_PSWR		= 0x07,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PWRFUNC	include/power/rn5t567_pmic.h	/^	RN5T567_PWRFUNC		= 0x0D,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PWRIREN	include/power/rn5t567_pmic.h	/^	RN5T567_PWRIREN		= 0x12,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PWRIRQ	include/power/rn5t567_pmic.h	/^	RN5T567_PWRIRQ		= 0x13,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PWRIRSEL	include/power/rn5t567_pmic.h	/^	RN5T567_PWRIRSEL	= 0x15,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PWRMON	include/power/rn5t567_pmic.h	/^	RN5T567_PWRMON		= 0x14,$/;"	e	enum:__anonfee57e1d0103
RN5T567_PWRONTIMSET	include/power/rn5t567_pmic.h	/^	RN5T567_PWRONTIMSET	= 0x10,$/;"	e	enum:__anonfee57e1d0103
RN5T567_REPCNT	include/power/rn5t567_pmic.h	/^	RN5T567_REPCNT		= 0x0F,$/;"	e	enum:__anonfee57e1d0103
RN5T567_SLPCNT	include/power/rn5t567_pmic.h	/^	RN5T567_SLPCNT		= 0x0E,$/;"	e	enum:__anonfee57e1d0103
RN5T567_VINDAC	include/power/rn5t567_pmic.h	/^	RN5T567_VINDAC		= 0x03,$/;"	e	enum:__anonfee57e1d0103
RN5T567_WATCHDOG	include/power/rn5t567_pmic.h	/^	RN5T567_WATCHDOG	= 0x0B,$/;"	e	enum:__anonfee57e1d0103
RN5T567_WATCHDOGCNT	include/power/rn5t567_pmic.h	/^	RN5T567_WATCHDOGCNT	= 0x0C,$/;"	e	enum:__anonfee57e1d0103
RNDIS_DATA_INITIALIZED	drivers/usb/gadget/rndis.h	/^	RNDIS_DATA_INITIALIZED,$/;"	e	enum:rndis_state
RNDIS_DF_CONNECTIONLESS	drivers/usb/gadget/rndis.h	/^#define RNDIS_DF_CONNECTIONLESS	/;"	d
RNDIS_DF_CONNECTION_ORIENTED	drivers/usb/gadget/rndis.h	/^#define RNDIS_DF_CONNECTION_ORIENTED	/;"	d
RNDIS_INITIALIZED	drivers/usb/gadget/rndis.h	/^	RNDIS_INITIALIZED,$/;"	e	enum:rndis_state
RNDIS_MAJOR_VERSION	drivers/usb/gadget/rndis.h	/^#define RNDIS_MAJOR_VERSION	/;"	d
RNDIS_MAXIMUM_FRAME_SIZE	drivers/usb/gadget/rndis.h	/^#define RNDIS_MAXIMUM_FRAME_SIZE	/;"	d
RNDIS_MAX_CONFIGS	drivers/usb/gadget/rndis.c	/^#define RNDIS_MAX_CONFIGS	/;"	d	file:
RNDIS_MAX_TOTAL_SIZE	drivers/usb/gadget/rndis.h	/^#define RNDIS_MAX_TOTAL_SIZE	/;"	d
RNDIS_MEDIUM_802_3	drivers/usb/gadget/rndis.h	/^#define RNDIS_MEDIUM_802_3	/;"	d
RNDIS_MINOR_VERSION	drivers/usb/gadget/rndis.h	/^#define RNDIS_MINOR_VERSION	/;"	d
RNDIS_PRODUCT_NUM	drivers/usb/gadget/ether.c	/^#define RNDIS_PRODUCT_NUM	/;"	d	file:
RNDIS_STATUS_FAILURE	drivers/usb/gadget/rndis.h	/^#define RNDIS_STATUS_FAILURE	/;"	d
RNDIS_STATUS_INVALID_DATA	drivers/usb/gadget/rndis.h	/^#define RNDIS_STATUS_INVALID_DATA	/;"	d
RNDIS_STATUS_MEDIA_CONNECT	drivers/usb/gadget/rndis.h	/^#define RNDIS_STATUS_MEDIA_CONNECT	/;"	d
RNDIS_STATUS_MEDIA_DISCONNECT	drivers/usb/gadget/rndis.h	/^#define RNDIS_STATUS_MEDIA_DISCONNECT	/;"	d
RNDIS_STATUS_NOT_SUPPORTED	drivers/usb/gadget/rndis.h	/^#define RNDIS_STATUS_NOT_SUPPORTED	/;"	d
RNDIS_STATUS_SUCCESS	drivers/usb/gadget/rndis.h	/^#define RNDIS_STATUS_SUCCESS	/;"	d
RNDIS_UNINITIALIZED	drivers/usb/gadget/rndis.h	/^	RNDIS_UNINITIALIZED,$/;"	e	enum:rndis_state
RNDIS_VENDOR_NUM	drivers/usb/gadget/ether.c	/^#define RNDIS_VENDOR_NUM	/;"	d	file:
RNGB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define RNGB_BASE_ADDR /;"	d
RNGB_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define RNGB_IPS_BASE_ADDR /;"	d
RNG_CR_CI	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_CR_CI	/;"	d
RNG_CR_GO	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_CR_GO	/;"	d
RNG_CR_HA	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_CR_HA	/;"	d
RNG_CR_IM	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_CR_IM	/;"	d
RNG_CR_SLM	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_CR_SLM	/;"	d
RNG_SR_EI	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_EI	/;"	d
RNG_SR_FUF	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_FUF	/;"	d
RNG_SR_LRS	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_LRS	/;"	d
RNG_SR_OFL	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_OFL(/;"	d
RNG_SR_OFL_MASK	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_OFL_MASK	/;"	d
RNG_SR_OFS	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_OFS(/;"	d
RNG_SR_OFS_MASK	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_OFS_MASK	/;"	d
RNG_SR_SV	arch/m68k/include/asm/coldfire/rng.h	/^#define RNG_SR_SV	/;"	d
RNG_STATE0_HANDLE_INSTANTIATED	include/fsl_sec.h	/^#define RNG_STATE0_HANDLE_INSTANTIATED	/;"	d
RNSS_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define RNSS_BASE_ADDR /;"	d
RO	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define RO	/;"	d
ROCKCHIP_BOOT_MODE_FASTBOOT	board/rockchip/kylin_rk3036/kylin_rk3036.c	/^#define ROCKCHIP_BOOT_MODE_FASTBOOT	/;"	d	file:
ROCKCHIP_DEVICE_SETTINGS	include/configs/chromebook_jerry.h	/^#define ROCKCHIP_DEVICE_SETTINGS /;"	d
ROCKCHIP_DEVICE_SETTINGS	include/configs/evb_rk3288.h	/^#define ROCKCHIP_DEVICE_SETTINGS$/;"	d
ROCKCHIP_DEVICE_SETTINGS	include/configs/fennec_rk3288.h	/^#define ROCKCHIP_DEVICE_SETTINGS$/;"	d
ROCKCHIP_DEVICE_SETTINGS	include/configs/firefly-rk3288.h	/^#define ROCKCHIP_DEVICE_SETTINGS /;"	d
ROCKCHIP_DEVICE_SETTINGS	include/configs/miniarm_rk3288.h	/^#define ROCKCHIP_DEVICE_SETTINGS$/;"	d
ROCKCHIP_DEVICE_SETTINGS	include/configs/popmetal_rk3288.h	/^#define ROCKCHIP_DEVICE_SETTINGS$/;"	d
ROCKCHIP_DEVICE_SETTINGS	include/configs/rock2.h	/^#define ROCKCHIP_DEVICE_SETTINGS /;"	d
ROCKCHIP_DWMMC	drivers/mmc/Kconfig	/^config ROCKCHIP_DWMMC$/;"	c	menu:MMC Host controller Support
ROCKCHIP_FAST_SPL	arch/arm/mach-rockchip/rk3288/Kconfig	/^config ROCKCHIP_FAST_SPL$/;"	c
ROCKCHIP_GPIO	drivers/gpio/Kconfig	/^config ROCKCHIP_GPIO$/;"	c	menu:GPIO Support
ROCKCHIP_GPIOS_PER_BANK	drivers/gpio/rk_gpio.c	/^	ROCKCHIP_GPIOS_PER_BANK		= 32,$/;"	e	enum:__anon9a374dad0103	file:
ROCKCHIP_OBS	tools/Makefile	/^ROCKCHIP_OBS = lib\/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o$/;"	m
ROCKCHIP_RK3036	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3036$/;"	c
ROCKCHIP_RK3036_PINCTRL	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3036_PINCTRL$/;"	c	menu:Pin controllers
ROCKCHIP_RK3288	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3288$/;"	c
ROCKCHIP_RK3288_PINCTRL	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3288_PINCTRL$/;"	c	menu:Pin controllers
ROCKCHIP_RK3399	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_RK3399$/;"	c
ROCKCHIP_RK3399_PINCTRL	drivers/pinctrl/Kconfig	/^config ROCKCHIP_RK3399_PINCTRL$/;"	c	menu:Pin controllers
ROCKCHIP_SDHCI	drivers/mmc/Kconfig	/^config ROCKCHIP_SDHCI$/;"	c	menu:MMC Host controller Support
ROCKCHIP_SERIAL	drivers/serial/Kconfig	/^config ROCKCHIP_SERIAL$/;"	c	menu:Serial drivers
ROCKCHIP_SPI	drivers/spi/Kconfig	/^config ROCKCHIP_SPI$/;"	c	menu:SPI Support
ROCKCHIP_SPI_MAX_RATE	drivers/spi/rk_spi.h	/^#define ROCKCHIP_SPI_MAX_RATE	/;"	d
ROCKCHIP_SPI_TIMEOUT_MS	drivers/spi/rk_spi.h	/^#define ROCKCHIP_SPI_TIMEOUT_MS	/;"	d
ROCKCHIP_SPL_BACK_TO_BROM	arch/arm/mach-rockchip/Kconfig	/^config ROCKCHIP_SPL_BACK_TO_BROM$/;"	c
ROCKCHIP_SYSCON_GRF	arch/arm/include/asm/arch-rockchip/clock.h	/^	ROCKCHIP_SYSCON_GRF,$/;"	e	enum:__anon11d27cf30103
ROCKCHIP_SYSCON_NOC	arch/arm/include/asm/arch-rockchip/clock.h	/^	ROCKCHIP_SYSCON_NOC,$/;"	e	enum:__anon11d27cf30103
ROCKCHIP_SYSCON_PMU	arch/arm/include/asm/arch-rockchip/clock.h	/^	ROCKCHIP_SYSCON_PMU,$/;"	e	enum:__anon11d27cf30103
ROCKCHIP_SYSCON_PMUGRF	arch/arm/include/asm/arch-rockchip/clock.h	/^	ROCKCHIP_SYSCON_PMUGRF,$/;"	e	enum:__anon11d27cf30103
ROCKCHIP_SYSCON_SGRF	arch/arm/include/asm/arch-rockchip/clock.h	/^	ROCKCHIP_SYSCON_SGRF,$/;"	e	enum:__anon11d27cf30103
ROCLK_SRC_ROCLKI	drivers/clk/clk_pic32.c	/^#define ROCLK_SRC_ROCLKI	/;"	d	file:
ROCLK_SRC_SCLK	drivers/clk/clk_pic32.c	/^#define ROCLK_SRC_SCLK	/;"	d	file:
ROCLK_SRC_SPLL	drivers/clk/clk_pic32.c	/^#define ROCLK_SRC_SPLL	/;"	d	file:
ROD_CTL	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   ROD_CTL /;"	d
ROF	include/sym53c8xx.h	/^	#define   ROF /;"	d
ROK_EXIT_LPM	drivers/usb/eth/r8152.h	/^#define ROK_EXIT_LPM	/;"	d
ROLLBACK_SPACE_KERNEL_UID	drivers/tpm/tpm_tis_sandbox.c	/^#define ROLLBACK_SPACE_KERNEL_UID	/;"	d	file:
ROLLBACK_SPACE_KERNEL_VERSION	drivers/tpm/tpm_tis_sandbox.c	/^#define ROLLBACK_SPACE_KERNEL_VERSION	/;"	d	file:
ROMCP_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ROMCP_ARB_BASE_ADDR /;"	d
ROMCP_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ROMCP_ARB_BASE_ADDR /;"	d
ROMCP_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ROMCP_ARB_END_ADDR /;"	d
ROMCP_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ROMCP_ARB_END_ADDR /;"	d
ROMCP_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ROMCP_BASE_ADDR	/;"	d
ROMCP_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define ROMCP_BASE_ADDR /;"	d
ROMCP_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ROMCP_IPS_BASE_ADDR /;"	d
ROMPATCH_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ROMPATCH_BASE_ADDR	/;"	d
ROMPATCH_REV	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define ROMPATCH_REV	/;"	d
ROM_API_HWCNFG_SETUP_OFFSET	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_API_HWCNFG_SETUP_OFFSET	/;"	d	file:
ROM_API_HWCNFG_SETUP_OFFSET	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^#define ROM_API_HWCNFG_SETUP_OFFSET	/;"	d	file:
ROM_API_TABLE_BASE_ADDR_LEGACY	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_API_TABLE_BASE_ADDR_LEGACY	/;"	d	file:
ROM_API_TABLE_BASE_ADDR_LEGACY	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^#define ROM_API_TABLE_BASE_ADDR_LEGACY	/;"	d	file:
ROM_API_TABLE_BASE_ADDR_MX6DL_TO12	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_API_TABLE_BASE_ADDR_MX6DL_TO12	/;"	d	file:
ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15	/;"	d	file:
ROM_CALL_CMD	tools/mxsimage.h	/^	ROM_CALL_CMD	= 0x05,$/;"	e	enum:sb_tag
ROM_CALL_CMD_FLAG_HAB	tools/mxsimage.h	/^#define ROM_CALL_CMD_FLAG_HAB	/;"	d
ROM_FILL_CMD	tools/mxsimage.h	/^	ROM_FILL_CMD	= 0x03,$/;"	e	enum:sb_tag
ROM_JUMP_CMD	tools/mxsimage.h	/^	ROM_JUMP_CMD	= 0x04,$/;"	e	enum:sb_tag
ROM_JUMP_CMD_FLAG_HAB	tools/mxsimage.h	/^#define ROM_JUMP_CMD_FLAG_HAB	/;"	d
ROM_LOAD_CMD	tools/mxsimage.h	/^	ROM_LOAD_CMD	= 0x02,$/;"	e	enum:sb_tag
ROM_LOAD_CMD_FLAG_DCD_LOAD	tools/mxsimage.h	/^#define ROM_LOAD_CMD_FLAG_DCD_LOAD	/;"	d
ROM_MODE_CMD	tools/mxsimage.h	/^	ROM_MODE_CMD	= 0x06$/;"	e	enum:sb_tag
ROM_NOP_CMD	tools/mxsimage.h	/^	ROM_NOP_CMD	= 0x00,$/;"	e	enum:sb_tag
ROM_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define ROM_RESET	/;"	d
ROM_SIZE	arch/x86/Kconfig	/^config ROM_SIZE$/;"	c	menu:x86 architecture
ROM_SI_REV	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define ROM_SI_REV	/;"	d
ROM_SW_INFO_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define ROM_SW_INFO_ADDR /;"	d
ROM_TABLE_ADDR	arch/x86/include/asm/tables.h	/^#define ROM_TABLE_ADDR	/;"	d
ROM_TABLE_ALIGN	arch/x86/include/asm/tables.h	/^#define ROM_TABLE_ALIGN	/;"	d
ROM_TAG_CMD	tools/mxsimage.h	/^	ROM_TAG_CMD	= 0x01,$/;"	e	enum:sb_tag
ROM_TAG_CMD_FLAG_ROM_LAST_TAG	tools/mxsimage.h	/^#define ROM_TAG_CMD_FLAG_ROM_LAST_TAG	/;"	d
ROM_UNIFIED_SECTIONS	arch/arm/imx-common/Kconfig	/^config ROM_UNIFIED_SECTIONS$/;"	c
ROM_VERSION_OFFSET	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_VERSION_OFFSET /;"	d	file:
ROM_VERSION_OFFSET	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^#define ROM_VERSION_OFFSET /;"	d	file:
ROM_VERSION_TO10	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_VERSION_TO10	/;"	d	file:
ROM_VERSION_TO12	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_VERSION_TO12	/;"	d	file:
ROM_VERSION_TO15	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^#define ROM_VERSION_TO15	/;"	d	file:
ROOT	fs/reiserfs/reiserfs_private.h	/^#define ROOT	/;"	d
ROOTCOMPLEX	arch/arm/mach-keystone/init.c	/^	ROOTCOMPLEX,$/;"	e	enum:pci_mode	file:
ROOTPORT_IRQ_ROUTES	arch/x86/include/asm/acpi/irq_helper.h	/^#define ROOTPORT_IRQ_ROUTES(/;"	d
ROOTPORT_METHODS	arch/x86/include/asm/acpi/irq_helper.h	/^#define ROOTPORT_METHODS(/;"	d
ROOT_HUB_PORT	drivers/usb/host/xhci.h	/^#define ROOT_HUB_PORT(/;"	d
ROOT_HUB_PORT_MASK	drivers/usb/host/xhci.h	/^#define ROOT_HUB_PORT_MASK	/;"	d
ROOT_HUB_PORT_SHIFT	drivers/usb/host/xhci.h	/^#define ROOT_HUB_PORT_SHIFT	/;"	d
ROP3_P	include/radeon.h	/^#define ROP3_P	/;"	d
ROP3_PATCOPY	include/radeon.h	/^#define ROP3_PATCOPY	/;"	d
ROP3_S	include/radeon.h	/^#define ROP3_S	/;"	d
ROP3_SRCCOPY	include/radeon.h	/^#define ROP3_SRCCOPY	/;"	d
ROP_COPY	include/linux/fb.h	/^#define ROP_COPY /;"	d
ROP_XOR	include/linux/fb.h	/^#define ROP_XOR /;"	d
ROTR	lib/sha256.c	/^#define ROTR(/;"	d	file:
ROTWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define ROTWE	/;"	d
ROUND	include/common.h	/^#define ROUND(/;"	d
ROUND	include/image.h	/^#define ROUND(/;"	d
ROUNDUP	include/image-sparse.h	/^#define ROUNDUP(/;"	d
ROUTE_SCI	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SCI	include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SCI	/;"	d
ROUTE_SMI	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_SMI	include/dt-bindings/gpio/x86-gpio.h	/^#define ROUTE_SMI	/;"	d
ROUTE_STRING_MASK	drivers/usb/host/xhci.h	/^#define ROUTE_STRING_MASK	/;"	d
ROW_10	arch/arm/include/asm/emif.h	/^#define ROW_10 /;"	d
ROW_11	arch/arm/include/asm/emif.h	/^#define ROW_11 /;"	d
ROW_12	arch/arm/include/asm/emif.h	/^#define ROW_12 /;"	d
ROW_13	arch/arm/include/asm/emif.h	/^#define ROW_13 /;"	d
ROW_14	arch/arm/include/asm/emif.h	/^#define ROW_14 /;"	d
ROW_15	arch/arm/include/asm/emif.h	/^#define ROW_15 /;"	d
ROW_16	arch/arm/include/asm/emif.h	/^#define ROW_16 /;"	d
ROW_9	arch/arm/include/asm/emif.h	/^#define ROW_9 /;"	d
ROW_ADDR_CHIP_SEL_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define ROW_ADDR_CHIP_SEL_MASK	/;"	d	file:
ROW_ADDR_CHIP_SEL_RB_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define ROW_ADDR_CHIP_SEL_RB_MASK	/;"	d	file:
ROW_ADDR_CHIP_SEL_RB_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define ROW_ADDR_CHIP_SEL_RB_SHIFT	/;"	d	file:
ROW_ADDR_CHIP_SEL_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define ROW_ADDR_CHIP_SEL_SHIFT	/;"	d	file:
ROW_ADDR_MASK	drivers/ddr/microchip/ddr2_timing.h	/^#define ROW_ADDR_MASK	/;"	d
ROW_ADDR_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define ROW_ADDR_MASK	/;"	d	file:
ROW_ADDR_RSHIFT	drivers/ddr/microchip/ddr2_timing.h	/^#define ROW_ADDR_RSHIFT	/;"	d
ROW_ADDR_SHIFT	drivers/mtd/nand/vf610_nfc.c	/^#define ROW_ADDR_SHIFT	/;"	d	file:
ROW_BITS	drivers/ddr/microchip/ddr2_timing.h	/^#define ROW_BITS	/;"	d
RP1BA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP1BA	/;"	d
RP1D	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP1D	/;"	d
RP2BA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP2BA	/;"	d
RP2D	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP2D	/;"	d
RP3BA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP3BA	/;"	d
RP3D	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP3D	/;"	d
RP4BA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP4BA	/;"	d
RP4D	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP4D	/;"	d
RP5BA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP5BA	/;"	d
RP5D	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP5D	/;"	d
RP6BA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP6BA	/;"	d
RP6D	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RP6D	/;"	d
RPA	arch/powerpc/include/asm/processor.h	/^#define RPA	/;"	d
RPADIR	drivers/net/sh_eth.h	/^	RPADIR,$/;"	e	enum:__anon5ef54f5a0103
RPADIR_BIT	drivers/net/sh_eth.h	/^enum RPADIR_BIT {$/;"	g
RPADIR_INIT	drivers/net/sh_eth.h	/^# define RPADIR_INIT /;"	d
RPADIR_PADR	drivers/net/sh_eth.h	/^	RPADIR_PADR = 0x0003f,$/;"	e	enum:RPADIR_BIT
RPADIR_PADS0	drivers/net/sh_eth.h	/^	RPADIR_PADS1 = 0x20000, RPADIR_PADS0 = 0x10000,$/;"	e	enum:RPADIR_BIT
RPADIR_PADS1	drivers/net/sh_eth.h	/^	RPADIR_PADS1 = 0x20000, RPADIR_PADS0 = 0x10000,$/;"	e	enum:RPADIR_BIT
RPC	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RPC	/;"	d
RPC_ANEG	drivers/net/smc91111.h	/^#define	RPC_ANEG	/;"	d
RPC_DEFAULT	drivers/net/smc91111.h	/^#define RPC_DEFAULT	/;"	d
RPC_DPLX	drivers/net/smc91111.h	/^#define	RPC_DPLX	/;"	d
RPC_LED_10	drivers/net/smc91111.h	/^#define RPC_LED_10	/;"	d
RPC_LED_100	drivers/net/smc91111.h	/^#define RPC_LED_100	/;"	d
RPC_LED_100_10	drivers/net/smc91111.h	/^#define RPC_LED_100_10	/;"	d
RPC_LED_FD	drivers/net/smc91111.h	/^#define RPC_LED_FD	/;"	d
RPC_LED_RES	drivers/net/smc91111.h	/^#define RPC_LED_RES	/;"	d
RPC_LED_RX	drivers/net/smc91111.h	/^#define RPC_LED_RX	/;"	d
RPC_LED_TX	drivers/net/smc91111.h	/^#define RPC_LED_TX	/;"	d
RPC_LED_TX_RX	drivers/net/smc91111.h	/^#define RPC_LED_TX_RX	/;"	d
RPC_LSXA_SHFT	drivers/net/smc91111.h	/^#define	RPC_LSXA_SHFT	/;"	d
RPC_LSXB_SHFT	drivers/net/smc91111.h	/^#define	RPC_LSXB_SHFT	/;"	d
RPC_REG	drivers/net/smc91111.h	/^#define	RPC_REG	/;"	d
RPC_SPEED	drivers/net/smc91111.h	/^#define	RPC_SPEED	/;"	d
RPFN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RPFN	/;"	d
RPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define RPLL	/;"	d
RPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define RPLL_CON1_VAL	/;"	d
RPLL_CON2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define RPLL_CON2_VAL	/;"	d
RPLY_RECEIV	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define RPLY_RECEIV	/;"	d
RPLY_RECEIV	arch/arm/mach-exynos/include/mach/dp.h	/^#define RPLY_RECEIV	/;"	d
RPMB_ERR_ADDRESS	drivers/mmc/rpmb.c	/^#define RPMB_ERR_ADDRESS	/;"	d	file:
RPMB_ERR_AUTH	drivers/mmc/rpmb.c	/^#define RPMB_ERR_AUTH	/;"	d	file:
RPMB_ERR_CNT_EXPIRED	drivers/mmc/rpmb.c	/^#define RPMB_ERR_CNT_EXPIRED	/;"	d	file:
RPMB_ERR_COUNTER	drivers/mmc/rpmb.c	/^#define RPMB_ERR_COUNTER	/;"	d	file:
RPMB_ERR_GENERAL	drivers/mmc/rpmb.c	/^#define RPMB_ERR_GENERAL	/;"	d	file:
RPMB_ERR_KEY	drivers/mmc/rpmb.c	/^#define RPMB_ERR_KEY	/;"	d	file:
RPMB_ERR_MSK	drivers/mmc/rpmb.c	/^#define RPMB_ERR_MSK	/;"	d	file:
RPMB_ERR_READ	drivers/mmc/rpmb.c	/^#define RPMB_ERR_READ	/;"	d	file:
RPMB_ERR_WRITE	drivers/mmc/rpmb.c	/^#define RPMB_ERR_WRITE	/;"	d	file:
RPMB_OK	drivers/mmc/rpmb.c	/^#define RPMB_OK	/;"	d	file:
RPMB_REQ_KEY	drivers/mmc/rpmb.c	/^#define RPMB_REQ_KEY	/;"	d	file:
RPMB_REQ_READ_DATA	drivers/mmc/rpmb.c	/^#define RPMB_REQ_READ_DATA	/;"	d	file:
RPMB_REQ_STATUS	drivers/mmc/rpmb.c	/^#define RPMB_REQ_STATUS	/;"	d	file:
RPMB_REQ_WCOUNTER	drivers/mmc/rpmb.c	/^#define RPMB_REQ_WCOUNTER	/;"	d	file:
RPMB_REQ_WRITE_DATA	drivers/mmc/rpmb.c	/^#define RPMB_REQ_WRITE_DATA	/;"	d	file:
RPMB_RESP_KEY	drivers/mmc/rpmb.c	/^#define RPMB_RESP_KEY	/;"	d	file:
RPMB_RESP_READ_DATA	drivers/mmc/rpmb.c	/^#define RPMB_RESP_READ_DATA	/;"	d	file:
RPMB_RESP_WCOUNTER	drivers/mmc/rpmb.c	/^#define RPMB_RESP_WCOUNTER	/;"	d	file:
RPMB_RESP_WRITE_DATA	drivers/mmc/rpmb.c	/^#define RPMB_RESP_WRITE_DATA	/;"	d	file:
RPMB_SZ_DATA	drivers/mmc/rpmb.c	/^#define RPMB_SZ_DATA	/;"	d	file:
RPMB_SZ_MAC	drivers/mmc/rpmb.c	/^#define RPMB_SZ_MAC	/;"	d	file:
RPMB_SZ_NONCE	drivers/mmc/rpmb.c	/^#define RPMB_SZ_NONCE	/;"	d	file:
RPMB_SZ_STUFF	drivers/mmc/rpmb.c	/^#define RPMB_SZ_STUFF	/;"	d	file:
RPOLC	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define RPOLC	/;"	d
RPOLC	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define RPOLC	/;"	d
RPOLC_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define RPOLC_P	/;"	d
RPROC_INTERNAL_MEMORY_MAPPED	include/remoteproc.h	/^	RPROC_INTERNAL_MEMORY_MAPPED	= 0,$/;"	e	enum:rproc_mem_type
RPROC_PING	drivers/remoteproc/rproc-uclass.c	/^	RPROC_PING,$/;"	e	enum:rproc_ops	file:
RPROC_RESET	drivers/remoteproc/rproc-uclass.c	/^	RPROC_RESET,$/;"	e	enum:rproc_ops	file:
RPROC_RUNNING	drivers/remoteproc/rproc-uclass.c	/^	RPROC_RUNNING,$/;"	e	enum:rproc_ops	file:
RPROC_START	drivers/remoteproc/rproc-uclass.c	/^	RPROC_START,$/;"	e	enum:rproc_ops	file:
RPROC_STOP	drivers/remoteproc/rproc-uclass.c	/^	RPROC_STOP,$/;"	e	enum:rproc_ops	file:
RP_IRQ_ROUTES	arch/x86/include/asm/acpi/irq_helper.h	/^#define RP_IRQ_ROUTES(/;"	d
RP_LINK_CONTROL_STATUS	drivers/pci/pci_tegra.c	/^#define RP_LINK_CONTROL_STATUS	/;"	d	file:
RP_LINK_CONTROL_STATUS_DL_LINK_ACTIVE	drivers/pci/pci_tegra.c	/^#define  RP_LINK_CONTROL_STATUS_DL_LINK_ACTIVE	/;"	d	file:
RP_LINK_CONTROL_STATUS_LINKSTAT_MASK	drivers/pci/pci_tegra.c	/^#define  RP_LINK_CONTROL_STATUS_LINKSTAT_MASK	/;"	d	file:
RP_METHOD	arch/x86/include/asm/acpi/irq_helper.h	/^#define RP_METHOD(/;"	d
RP_PRIV_MISC	drivers/pci/pci_tegra.c	/^#define RP_PRIV_MISC	/;"	d	file:
RP_PRIV_MISC_PRSNT_MAP_EP_ABSNT	drivers/pci/pci_tegra.c	/^#define  RP_PRIV_MISC_PRSNT_MAP_EP_ABSNT /;"	d	file:
RP_PRIV_MISC_PRSNT_MAP_EP_PRSNT	drivers/pci/pci_tegra.c	/^#define  RP_PRIV_MISC_PRSNT_MAP_EP_PRSNT /;"	d	file:
RP_VEND_CTL2	drivers/pci/pci_tegra.c	/^#define RP_VEND_CTL2	/;"	d	file:
RP_VEND_CTL2_PCA_ENABLE	drivers/pci/pci_tegra.c	/^#define  RP_VEND_CTL2_PCA_ENABLE	/;"	d	file:
RP_VEND_XP	drivers/pci/pci_tegra.c	/^#define RP_VEND_XP	/;"	d	file:
RP_VEND_XP_DL_UP	drivers/pci/pci_tegra.c	/^#define  RP_VEND_XP_DL_UP	/;"	d	file:
RQST_PERIOD_WIDTH	drivers/ddr/microchip/ddr2_regs.h	/^#define RQST_PERIOD_WIDTH	/;"	d
RQT_CMD	drivers/usb/gadget/f_thor.h	/^	RQT_CMD,$/;"	e	enum:rqt
RQT_CMD_EFSCLEAR	drivers/usb/gadget/f_thor.h	/^	RQT_CMD_EFSCLEAR,$/;"	e	enum:rqt_data
RQT_CMD_POWEROFF	drivers/usb/gadget/f_thor.h	/^	RQT_CMD_POWEROFF,$/;"	e	enum:rqt_data
RQT_CMD_REBOOT	drivers/usb/gadget/f_thor.h	/^	RQT_CMD_REBOOT = 1,$/;"	e	enum:rqt_data
RQT_DL	drivers/usb/gadget/f_thor.h	/^	RQT_DL,$/;"	e	enum:rqt
RQT_DL_EXIT	drivers/usb/gadget/f_thor.h	/^	RQT_DL_EXIT,$/;"	e	enum:rqt_data
RQT_DL_FILE_END	drivers/usb/gadget/f_thor.h	/^	RQT_DL_FILE_END,$/;"	e	enum:rqt_data
RQT_DL_FILE_INFO	drivers/usb/gadget/f_thor.h	/^	RQT_DL_FILE_INFO,$/;"	e	enum:rqt_data
RQT_DL_FILE_START	drivers/usb/gadget/f_thor.h	/^	RQT_DL_FILE_START,$/;"	e	enum:rqt_data
RQT_DL_INIT	drivers/usb/gadget/f_thor.h	/^	RQT_DL_INIT = 1,$/;"	e	enum:rqt_data
RQT_INFO	drivers/usb/gadget/f_thor.h	/^	RQT_INFO = 200,$/;"	e	enum:rqt
RQT_INFO_VER_PROTOCOL	drivers/usb/gadget/f_thor.h	/^	RQT_INFO_VER_PROTOCOL = 1,$/;"	e	enum:rqt_data
RQT_INIT_VER_BOOT	drivers/usb/gadget/f_thor.h	/^	RQT_INIT_VER_BOOT,$/;"	e	enum:rqt_data
RQT_INIT_VER_CSC	drivers/usb/gadget/f_thor.h	/^	RQT_INIT_VER_CSC,$/;"	e	enum:rqt_data
RQT_INIT_VER_HW	drivers/usb/gadget/f_thor.h	/^	RQT_INIT_VER_HW,$/;"	e	enum:rqt_data
RQT_INIT_VER_KERNEL	drivers/usb/gadget/f_thor.h	/^	RQT_INIT_VER_KERNEL,$/;"	e	enum:rqt_data
RQT_INIT_VER_PLATFORM	drivers/usb/gadget/f_thor.h	/^	RQT_INIT_VER_PLATFORM,$/;"	e	enum:rqt_data
RQT_UL	drivers/usb/gadget/f_thor.h	/^	RQT_UL,$/;"	e	enum:rqt
RQT_UL_END	drivers/usb/gadget/f_thor.h	/^	RQT_UL_END,$/;"	e	enum:rqt_data
RQT_UL_EXIT	drivers/usb/gadget/f_thor.h	/^	RQT_UL_EXIT,$/;"	e	enum:rqt_data
RQT_UL_INIT	drivers/usb/gadget/f_thor.h	/^	RQT_UL_INIT = 1,$/;"	e	enum:rqt_data
RQT_UL_START	drivers/usb/gadget/f_thor.h	/^	RQT_UL_START,$/;"	e	enum:rqt_data
RRE	include/sym53c8xx.h	/^	#define   RRE /;"	d
RRMODE_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define RRMODE_MASK /;"	d
RRP_OPCODE	board/freescale/common/zm7300.c	/^#define RRP_OPCODE /;"	d	file:
RS5C372_RAM_SIZE	drivers/rtc/rs5c372.c	/^#define RS5C372_RAM_SIZE /;"	d	file:
RSA	lib/rsa/Kconfig	/^config RSA$/;"	c
RSA2048_BYTES	include/u-boot/rsa.h	/^#define RSA2048_BYTES	/;"	d
RSA4096_BYTES	include/u-boot/rsa.h	/^#define RSA4096_BYTES	/;"	d
RSA_DEFAULT_PUBEXP	lib/rsa/rsa-mod-exp.c	/^#define RSA_DEFAULT_PUBEXP	/;"	d	file:
RSA_DEFAULT_PUBEXP	lib/rsa/rsa-verify.c	/^#define RSA_DEFAULT_PUBEXP	/;"	d	file:
RSA_FREESCALE_EXP	lib/rsa/Kconfig	/^config RSA_FREESCALE_EXP$/;"	c
RSA_MAX_KEY_BITS	include/u-boot/rsa.h	/^#define RSA_MAX_KEY_BITS	/;"	d
RSA_MAX_SIG_BITS	include/u-boot/rsa.h	/^#define RSA_MAX_SIG_BITS	/;"	d
RSA_MIN_KEY_BITS	include/u-boot/rsa.h	/^#define RSA_MIN_KEY_BITS	/;"	d
RSA_OBJS-$(CONFIG_FIT_SIGNATURE)	tools/Makefile	/^RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib\/rsa\/, \\$/;"	m
RSA_SOFTWARE_EXP	lib/rsa/Kconfig	/^config RSA_SOFTWARE_EXP$/;"	c
RSB_CMD_BYTE_READ	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_CMD_BYTE_READ	/;"	d
RSB_CMD_BYTE_READ	arch/arm/include/asm/arch/rsb.h	/^#define RSB_CMD_BYTE_READ	/;"	d
RSB_CMD_BYTE_WRITE	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_CMD_BYTE_WRITE	/;"	d
RSB_CMD_BYTE_WRITE	arch/arm/include/asm/arch/rsb.h	/^#define RSB_CMD_BYTE_WRITE	/;"	d
RSB_CMD_SET_RTSADDR	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_CMD_SET_RTSADDR	/;"	d
RSB_CMD_SET_RTSADDR	arch/arm/include/asm/arch/rsb.h	/^#define RSB_CMD_SET_RTSADDR	/;"	d
RSB_CTRL_SOFT_RST	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_CTRL_SOFT_RST	/;"	d
RSB_CTRL_SOFT_RST	arch/arm/include/asm/arch/rsb.h	/^#define RSB_CTRL_SOFT_RST	/;"	d
RSB_CTRL_START_TRANS	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_CTRL_START_TRANS	/;"	d
RSB_CTRL_START_TRANS	arch/arm/include/asm/arch/rsb.h	/^#define RSB_CTRL_START_TRANS	/;"	d
RSB_DEVADDR_DEVICE_ADDR	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_DEVADDR_DEVICE_ADDR(/;"	d
RSB_DEVADDR_DEVICE_ADDR	arch/arm/include/asm/arch/rsb.h	/^#define RSB_DEVADDR_DEVICE_ADDR(/;"	d
RSB_DEVADDR_RUNTIME_ADDR	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_DEVADDR_RUNTIME_ADDR(/;"	d
RSB_DEVADDR_RUNTIME_ADDR	arch/arm/include/asm/arch/rsb.h	/^#define RSB_DEVADDR_RUNTIME_ADDR(/;"	d
RSB_DMCR_DEVICE_MODE_DATA	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_DMCR_DEVICE_MODE_DATA	/;"	d
RSB_DMCR_DEVICE_MODE_DATA	arch/arm/include/asm/arch/rsb.h	/^#define RSB_DMCR_DEVICE_MODE_DATA	/;"	d
RSB_DMCR_DEVICE_MODE_START	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_DMCR_DEVICE_MODE_START	/;"	d
RSB_DMCR_DEVICE_MODE_START	arch/arm/include/asm/arch/rsb.h	/^#define RSB_DMCR_DEVICE_MODE_START	/;"	d
RSB_STAT_LBSY_INT	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_STAT_LBSY_INT	/;"	d
RSB_STAT_LBSY_INT	arch/arm/include/asm/arch/rsb.h	/^#define RSB_STAT_LBSY_INT	/;"	d
RSB_STAT_TERR_INT	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_STAT_TERR_INT	/;"	d
RSB_STAT_TERR_INT	arch/arm/include/asm/arch/rsb.h	/^#define RSB_STAT_TERR_INT	/;"	d
RSB_STAT_TOVER_INT	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define RSB_STAT_TOVER_INT	/;"	d
RSB_STAT_TOVER_INT	arch/arm/include/asm/arch/rsb.h	/^#define RSB_STAT_TOVER_INT	/;"	d
RSC_MODE_ACTIVE	include/palmas.h	/^#define RSC_MODE_ACTIVE	/;"	d
RSC_MODE_SLEEP	include/palmas.h	/^#define RSC_MODE_SLEEP	/;"	d
RSC_STAT_ON	include/palmas.h	/^#define RSC_STAT_ON	/;"	d
RSDP_SIG	arch/x86/include/asm/acpi_table.h	/^#define RSDP_SIG	/;"	d
RSD_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RSD_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RSD_DATA_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RSD_DATA_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RSECAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RSECAR	/;"	d
RSECAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSECAR	/;"	d
RSECCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RSECCNT /;"	d
RSECCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSECCNT	/;"	d
RSE_AF_RR	drivers/net/xilinx_ll_temac.h	/^#define RSE_AF_RR	/;"	d
RSE_AF_WR	drivers/net/xilinx_ll_temac.h	/^#define RSE_AF_WR	/;"	d
RSE_CFG_RR	drivers/net/xilinx_ll_temac.h	/^#define RSE_CFG_RR	/;"	d
RSE_CFG_WR	drivers/net/xilinx_ll_temac.h	/^#define RSE_CFG_WR	/;"	d
RSE_FABR_RR	drivers/net/xilinx_ll_temac.h	/^#define RSE_FABR_RR	/;"	d
RSE_HACS_RDY	drivers/net/xilinx_ll_temac.h	/^#define RSE_HACS_RDY	/;"	d
RSE_MIIM_RR	drivers/net/xilinx_ll_temac.h	/^#define RSE_MIIM_RR	/;"	d
RSE_MIIM_WR	drivers/net/xilinx_ll_temac.h	/^#define RSE_MIIM_WR	/;"	d
RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_ARGUMENT /;"	d
RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_ARGUMENT /;"	d
RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_ARGUMENT /;"	d
RSI_BACK_TOUT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_BACK_TOUT /;"	d
RSI_BLKSZ	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_BLKSZ /;"	d
RSI_BOOT_TCNTR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_BOOT_TCNTR /;"	d
RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_CEATA_CONTROL /;"	d
RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_CEATA_CONTROL /;"	d
RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_CEATA_CONTROL /;"	d
RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_CLK_CONTROL /;"	d
RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_CLK_CONTROL /;"	d
RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_CLK_CONTROL /;"	d
RSI_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_COMMAND /;"	d
RSI_COMMAND	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_COMMAND /;"	d
RSI_COMMAND	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_COMMAND /;"	d
RSI_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_CONFIG /;"	d
RSI_CONFIG	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_CONFIG /;"	d
RSI_CONFIG	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_CONFIG /;"	d
RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_DATA_CNT /;"	d
RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_DATA_CNT /;"	d
RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_DATA_CNT /;"	d
RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_DATA_CONTROL /;"	d
RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_DATA_CONTROL /;"	d
RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_DATA_CONTROL /;"	d
RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_DATA_LGTH /;"	d
RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_DATA_LGTH /;"	d
RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_DATA_LGTH /;"	d
RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_DATA_TIMER /;"	d
RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_DATA_TIMER /;"	d
RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_DATA_TIMER /;"	d
RSI_EMASK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_EMASK /;"	d
RSI_EMASK	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_EMASK /;"	d
RSI_EMASK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_EMASK /;"	d
RSI_ESTAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_ESTAT /;"	d
RSI_ESTAT	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_ESTAT /;"	d
RSI_ESTAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_ESTAT /;"	d
RSI_FIFO	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_FIFO /;"	d
RSI_FIFO	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_FIFO /;"	d
RSI_FIFO	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_FIFO /;"	d
RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_FIFO_CNT /;"	d
RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_FIFO_CNT /;"	d
RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_FIFO_CNT /;"	d
RSI_IMSK0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_IMSK0 /;"	d
RSI_IMSK1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_IMSK1 /;"	d
RSI_MASK0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_MASK0 /;"	d
RSI_MASK0	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_MASK0 /;"	d
RSI_MASK1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_MASK1 /;"	d
RSI_MASK1	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_MASK1 /;"	d
RSI_PID0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_PID0 /;"	d
RSI_PID0	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_PID0 /;"	d
RSI_PID0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_PID0 /;"	d
RSI_PID1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_PID1 /;"	d
RSI_PID1	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_PID1 /;"	d
RSI_PID1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_PID1 /;"	d
RSI_PID2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_PID2 /;"	d
RSI_PID2	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_PID2 /;"	d
RSI_PID2	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_PID2 /;"	d
RSI_PID3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_PID3 /;"	d
RSI_PID3	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_PID3 /;"	d
RSI_PID3	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_PID3 /;"	d
RSI_PWR_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_PWR_CONTROL /;"	d
RSI_PWR_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_PWR_CONTROL /;"	d
RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_RD_WAIT_EN /;"	d
RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_RD_WAIT_EN /;"	d
RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_RD_WAIT_EN /;"	d
RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_RESPONSE0 /;"	d
RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_RESPONSE0 /;"	d
RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_RESPONSE0 /;"	d
RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_RESPONSE1 /;"	d
RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_RESPONSE1 /;"	d
RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_RESPONSE1 /;"	d
RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_RESPONSE2 /;"	d
RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_RESPONSE2 /;"	d
RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_RESPONSE2 /;"	d
RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_RESPONSE3 /;"	d
RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_RESPONSE3 /;"	d
RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_RESPONSE3 /;"	d
RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_RESP_CMD /;"	d
RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_RESP_CMD /;"	d
RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_RESP_CMD /;"	d
RSI_SLP_WKUP_TOUT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_SLP_WKUP_TOUT /;"	d
RSI_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_STATUS /;"	d
RSI_STATUS	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_STATUS /;"	d
RSI_STATUS	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_STATUS /;"	d
RSI_STATUSCL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define RSI_STATUSCL /;"	d
RSI_STATUSCL	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define RSI_STATUSCL /;"	d
RSI_STATUSCL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define RSI_STATUSCL /;"	d
RSK7203_FLASH_BANK_SIZE	include/configs/rsk7203.h	/^#define RSK7203_FLASH_BANK_SIZE	/;"	d
RSK7203_FLASH_BASE_1	include/configs/rsk7203.h	/^#define RSK7203_FLASH_BASE_1	/;"	d
RSK7203_SDRAM_BASE	include/configs/rsk7203.h	/^#define RSK7203_SDRAM_BASE	/;"	d
RSL	include/sym53c8xx.h	/^  #define   RSL /;"	d
RSME	drivers/usb/host/r8a66597.h	/^#define	RSME	/;"	d
RSO_TOE_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RSO_TOE_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RSPI_CK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_SSL3_A_MARK,	RSPI_CK_A_MARK,		RSPI_MOSI_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPI_MISO_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_MISO_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPI_MOSI_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_SSL3_A_MARK,	RSPI_CK_A_MARK,		RSPI_MOSI_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPI_SSL0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_SSL0_A_MARK,	RSPI_SSL1_A_MARK,	RSPI_SSL2_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPI_SSL1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_SSL0_A_MARK,	RSPI_SSL1_A_MARK,	RSPI_SSL2_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPI_SSL2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_SSL0_A_MARK,	RSPI_SSL1_A_MARK,	RSPI_SSL2_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPI_SSL3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	RSPI_SSL3_A_MARK,	RSPI_CK_A_MARK,		RSPI_MOSI_A_MARK,$/;"	e	enum:__anona304c1340103	file:
RSPR0	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR0 /;"	d
RSPR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR0	/;"	d
RSPR1	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR1 /;"	d
RSPR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR1	/;"	d
RSPR10	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR10 /;"	d
RSPR10	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR10	/;"	d
RSPR11	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR11 /;"	d
RSPR11	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR11	/;"	d
RSPR12	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR12 /;"	d
RSPR12	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR12	/;"	d
RSPR13	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR13 /;"	d
RSPR13	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR13	/;"	d
RSPR14	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR14 /;"	d
RSPR14	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR14	/;"	d
RSPR15	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR15 /;"	d
RSPR15	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR15	/;"	d
RSPR16	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR16 /;"	d
RSPR16	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR16	/;"	d
RSPR2	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR2 /;"	d
RSPR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR2	/;"	d
RSPR3	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR3 /;"	d
RSPR3	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR3	/;"	d
RSPR4	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR4 /;"	d
RSPR4	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR4	/;"	d
RSPR5	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR5 /;"	d
RSPR5	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR5	/;"	d
RSPR6	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR6 /;"	d
RSPR6	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR6	/;"	d
RSPR7	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR7 /;"	d
RSPR7	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR7	/;"	d
RSPR8	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR8 /;"	d
RSPR8	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR8	/;"	d
RSPR9	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPR9 /;"	d
RSPR9	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPR9	/;"	d
RSPRD	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPRD /;"	d
RSPRD	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPRD	/;"	d
RSPTYR	arch/sh/include/asm/cpu_sh7722.h	/^#define RSPTYR /;"	d
RSPTYR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RSPTYR	/;"	d
RSP_TYPE_LGHT136	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_LGHT136	/;"	d
RSP_TYPE_LGHT48	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_LGHT48	/;"	d
RSP_TYPE_LGHT48B	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_LGHT48B	/;"	d
RSP_TYPE_MASK	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_MASK	/;"	d
RSP_TYPE_NONE	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_NONE	/;"	d
RSP_TYPE_NORSP	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_NORSP	/;"	d
RSP_TYPE_OFFSET	arch/arm/include/asm/omap_mmc.h	/^#define RSP_TYPE_OFFSET	/;"	d
RSR	include/linux/mtd/st_smi.h	/^#define RSR	/;"	d
RSRR	arch/arm/cpu/sa1100/cpu.c	/^#define RSRR	/;"	d	file:
RSRR	arch/arm/cpu/sa1100/start.S	/^#define RSRR	/;"	d	file:
RSRR	include/SA-1100.h	/^#define RSRR	/;"	d
RSRR_SWR	include/SA-1100.h	/^#define RSRR_SWR	/;"	d
RSR_AE	drivers/net/dm9000x.h	/^#define RSR_AE	/;"	d
RSR_ALLBITS	include/mpc8260.h	/^#define RSR_ALLBITS	/;"	d
RSR_ALLBITS	include/mpc8xx.h	/^#define RSR_ALLBITS	/;"	d
RSR_BMRS	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_BMRS	/;"	d
RSR_BMRS	include/mpc8260.h	/^#define RSR_BMRS	/;"	d
RSR_BMRS	include/mpc83xx.h	/^#define RSR_BMRS	/;"	d
RSR_BMRS_SHIFT	include/mpc83xx.h	/^#define RSR_BMRS_SHIFT	/;"	d
RSR_BSF	include/mpc83xx.h	/^#define RSR_BSF	/;"	d
RSR_BSF_SHIFT	include/mpc83xx.h	/^#define RSR_BSF_SHIFT	/;"	d
RSR_CE	drivers/net/dm9000x.h	/^#define RSR_CE	/;"	d
RSR_CSHR	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_CSHR	/;"	d
RSR_CSHR	include/mpc83xx.h	/^#define RSR_CSHR	/;"	d
RSR_CSHR_SHIFT	include/mpc83xx.h	/^#define RSR_CSHR_SHIFT	/;"	d
RSR_CSRS	include/mpc8260.h	/^#define RSR_CSRS	/;"	d
RSR_CSRS	include/mpc8xx.h	/^#define RSR_CSRS	/;"	d
RSR_DBHRS	include/mpc8xx.h	/^#define RSR_DBHRS	/;"	d
RSR_DBSRS	include/mpc8xx.h	/^#define RSR_DBSRS	/;"	d
RSR_EHRS	include/mpc8260.h	/^#define RSR_EHRS	/;"	d
RSR_EHRS	include/mpc8xx.h	/^#define RSR_EHRS	/;"	d
RSR_ESRS	include/mpc8260.h	/^#define RSR_ESRS	/;"	d
RSR_ESRS	include/mpc8xx.h	/^#define RSR_ESRS	/;"	d
RSR_FOE	drivers/net/dm9000x.h	/^#define RSR_FOE	/;"	d
RSR_HRS	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_HRS	/;"	d
RSR_HRS	include/mpc83xx.h	/^#define RSR_HRS	/;"	d
RSR_HRS_SHIFT	include/mpc83xx.h	/^#define RSR_HRS_SHIFT	/;"	d
RSR_JHRS	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_JHRS	/;"	d
RSR_JHRS	include/mpc83xx.h	/^#define RSR_JHRS	/;"	d
RSR_JHRS_SHIFT	include/mpc83xx.h	/^#define RSR_JHRS_SHIFT	/;"	d
RSR_JSRS	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_JSRS	/;"	d
RSR_JSRS	include/mpc83xx.h	/^#define RSR_JSRS	/;"	d
RSR_JSRS_SHIFT	include/mpc83xx.h	/^#define RSR_JSRS_SHIFT	/;"	d
RSR_JTRS	include/mpc8260.h	/^#define RSR_JTRS	/;"	d
RSR_JTRS	include/mpc8xx.h	/^#define RSR_JTRS	/;"	d
RSR_LCS	drivers/net/dm9000x.h	/^#define RSR_LCS	/;"	d
RSR_LLRS	include/mpc8xx.h	/^#define RSR_LLRS	/;"	d
RSR_MF	drivers/net/dm9000x.h	/^#define RSR_MF	/;"	d
RSR_PLE	drivers/net/dm9000x.h	/^#define RSR_PLE	/;"	d
RSR_RES	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_RES	/;"	d
RSR_RES	include/mpc83xx.h	/^#define RSR_RES	/;"	d
RSR_RF	drivers/net/dm9000x.h	/^#define RSR_RF	/;"	d
RSR_RSTSRC	include/mpc83xx.h	/^#define RSR_RSTSRC	/;"	d
RSR_RSTSRC_SHIFT	include/mpc83xx.h	/^#define RSR_RSTSRC_SHIFT	/;"	d
RSR_RWTO	drivers/net/dm9000x.h	/^#define RSR_RWTO	/;"	d
RSR_SRS	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_SRS	/;"	d
RSR_SRS	include/mpc83xx.h	/^#define RSR_SRS	/;"	d
RSR_SRS_SHIFT	include/mpc83xx.h	/^#define RSR_SRS_SHIFT	/;"	d
RSR_SWHR	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_SWHR	/;"	d
RSR_SWHR	include/mpc83xx.h	/^#define RSR_SWHR	/;"	d
RSR_SWHR_SHIFT	include/mpc83xx.h	/^#define RSR_SWHR_SHIFT	/;"	d
RSR_SWRS	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_SWRS	/;"	d
RSR_SWRS	include/mpc8260.h	/^#define RSR_SWRS	/;"	d
RSR_SWRS	include/mpc83xx.h	/^#define RSR_SWRS	/;"	d
RSR_SWRS	include/mpc8xx.h	/^#define RSR_SWRS	/;"	d
RSR_SWRS_SHIFT	include/mpc83xx.h	/^#define RSR_SWRS_SHIFT	/;"	d
RSR_SWSR	arch/powerpc/include/asm/immap_512x.h	/^#define RSR_SWSR	/;"	d
RSR_SWSR	include/mpc83xx.h	/^#define RSR_SWSR	/;"	d
RSR_SWSR_SHIFT	include/mpc83xx.h	/^#define RSR_SWSR_SHIFT	/;"	d
RSSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RSSR(/;"	d
RST	drivers/rtc/ds1302.c	/^#define RST	/;"	d	file:
RST	include/sym53c8xx.h	/^  #define   RST /;"	d
RST2_CPU_DDR_CLOCK_SELECT_IN_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define RST2_CPU_DDR_CLOCK_SELECT_IN_MASK	/;"	d
RST2_CPU_DDR_CLOCK_SELECT_IN_OFFSET	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define RST2_CPU_DDR_CLOCK_SELECT_IN_OFFSET	/;"	d
RSTART	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	RSTART	/;"	d
RSTAT_CLEAR_RHALT	include/tsec.h	/^#define RSTAT_CLEAR_RHALT	/;"	d
RSTC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RSTC	/;"	d
RSTCFG_OFF	board/keymile/kmp204x/qrio.c	/^#define RSTCFG_OFF	/;"	d	file:
RSTCON_HOSTPHY_SWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define RSTCON_HOSTPHY_SWRST /;"	d
RSTCON_SWRST	arch/arm/mach-exynos/include/mach/ehci.h	/^#define RSTCON_SWRST /;"	d
RSTCTRL_ADDR	board/BuR/brxre1/board.c	/^#define	RSTCTRL_ADDR	/;"	d	file:
RSTCTRL_CAN_STB	board/BuR/brxre1/board.c	/^#define	RSTCTRL_CAN_STB	/;"	d	file:
RSTCTRL_CTRLREG	board/BuR/brxre1/board.c	/^#define RSTCTRL_CTRLREG	/;"	d	file:
RSTCTRL_FORCE_PWR_NEN	board/BuR/brxre1/board.c	/^#define	RSTCTRL_FORCE_PWR_NEN	/;"	d	file:
RSTCTRL_SCRATCHREG	board/BuR/brxre1/board.c	/^#define RSTCTRL_SCRATCHREG	/;"	d	file:
RSTL_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	RSTL_CMD,$/;"	e	enum:__anon114585520103
RSTL_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	RSTL_CMD,$/;"	e	enum:__anon957231910203	file:
RSTMGR_BANK	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_BANK(/;"	d
RSTMGR_BANK_MASK	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_BANK_MASK	/;"	d
RSTMGR_BANK_OFFSET	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_BANK_OFFSET	/;"	d
RSTMGR_CTRL_SWWARMRSTREQ_LSB	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_CTRL_SWWARMRSTREQ_LSB /;"	d
RSTMGR_DEFINE	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_DEFINE(/;"	d
RSTMGR_DMA	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_DMA	/;"	d
RSTMGR_EMAC0	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_EMAC0	/;"	d
RSTMGR_EMAC1	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_EMAC1	/;"	d
RSTMGR_L4WD0	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_L4WD0	/;"	d
RSTMGR_NAND	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_NAND	/;"	d
RSTMGR_OSC1TIMER0	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_OSC1TIMER0	/;"	d
RSTMGR_QSPI	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_QSPI	/;"	d
RSTMGR_RESET	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_RESET(/;"	d
RSTMGR_RESET_MASK	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_RESET_MASK	/;"	d
RSTMGR_RESET_OFFSET	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_RESET_OFFSET	/;"	d
RSTMGR_SDMMC	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_SDMMC	/;"	d
RSTMGR_SDR	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_SDR	/;"	d
RSTMGR_SPIM0	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_SPIM0	/;"	d
RSTMGR_SPIM1	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_SPIM1	/;"	d
RSTMGR_UART0	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define RSTMGR_UART0	/;"	d
RSTMUX_LOCK8_MASK	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_LOCK8_MASK	/;"	d
RSTMUX_LOCK8_SHIFT	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_LOCK8_SHIFT	/;"	d
RSTMUX_OMODE8_DEV_RESET	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_OMODE8_DEV_RESET	/;"	d
RSTMUX_OMODE8_INT	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_OMODE8_INT	/;"	d
RSTMUX_OMODE8_INT_AND_DEV_RESET	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_OMODE8_INT_AND_DEV_RESET	/;"	d
RSTMUX_OMODE8_MASK	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_OMODE8_MASK	/;"	d
RSTMUX_OMODE8_SHIFT	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define RSTMUX_OMODE8_SHIFT	/;"	d
RSTOUTN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RSTOUTN	/;"	d
RSTRQSR1_SW_RR	board/keymile/kmp204x/kmp204x.c	/^#define RSTRQSR1_SW_RR	/;"	d	file:
RSTRQSR1_WDT_RR	board/keymile/kmp204x/kmp204x.c	/^#define RSTRQSR1_WDT_RR	/;"	d	file:
RSTTIME1_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define RSTTIME1_MASK	/;"	d
RSTTIME1_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define RSTTIME1_SHIFT	/;"	d
RST_BASE	arch/arm/cpu/sa1100/cpu.c	/^#define RST_BASE /;"	d	file:
RST_BASE	arch/arm/cpu/sa1100/start.S	/^RST_BASE:		.word   0x90030000$/;"	l
RST_BASE	board/renesas/salvator-x/salvator-x.c	/^#define RST_BASE	/;"	d	file:
RST_BUS_CE	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CE	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CE	/;"	d
RST_BUS_CODEC	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CODEC	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CODEC	/;"	d
RST_BUS_CSI	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_CSI	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_CSI	/;"	d
RST_BUS_DBG	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DBG	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DBG	/;"	d
RST_BUS_DE	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DE	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DE	/;"	d
RST_BUS_DEINTERLACE	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DEINTERLACE	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DEINTERLACE	/;"	d
RST_BUS_DMA	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DMA	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DMA	/;"	d
RST_BUS_DRAM	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_DRAM	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_DRAM	/;"	d
RST_BUS_EHCI0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI0	/;"	d
RST_BUS_EHCI1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI1	/;"	d
RST_BUS_EHCI2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI2	/;"	d
RST_BUS_EHCI3	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EHCI3	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EHCI3	/;"	d
RST_BUS_EMAC	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EMAC	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EMAC	/;"	d
RST_BUS_EPHY	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_EPHY	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_EPHY	/;"	d
RST_BUS_GPU	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_GPU	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_GPU	/;"	d
RST_BUS_HDMI0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI0	/;"	d
RST_BUS_HDMI1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HDMI1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HDMI1	/;"	d
RST_BUS_HSTIMER	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_HSTIMER	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_HSTIMER	/;"	d
RST_BUS_I2C0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C0	/;"	d
RST_BUS_I2C1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C1	/;"	d
RST_BUS_I2C2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2C2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2C2	/;"	d
RST_BUS_I2S0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S0	/;"	d
RST_BUS_I2S1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S1	/;"	d
RST_BUS_I2S2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_I2S2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_I2S2	/;"	d
RST_BUS_MMC0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC0	/;"	d
RST_BUS_MMC1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC1	/;"	d
RST_BUS_MMC2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MMC2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MMC2	/;"	d
RST_BUS_MSGBOX	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_MSGBOX	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_MSGBOX	/;"	d
RST_BUS_NAND	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_NAND	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_NAND	/;"	d
RST_BUS_OHCI0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI0	/;"	d
RST_BUS_OHCI1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI1	/;"	d
RST_BUS_OHCI2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI2	/;"	d
RST_BUS_OHCI3	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OHCI3	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OHCI3	/;"	d
RST_BUS_OTG	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_OTG	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_OTG	/;"	d
RST_BUS_SCR	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SCR	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SCR	/;"	d
RST_BUS_SPDIF	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPDIF	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPDIF	/;"	d
RST_BUS_SPI0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI0	/;"	d
RST_BUS_SPI1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPI1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPI1	/;"	d
RST_BUS_SPINLOCK	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_SPINLOCK	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_SPINLOCK	/;"	d
RST_BUS_TCON0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON0	/;"	d
RST_BUS_TCON1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_TCON1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TCON1	/;"	d
RST_BUS_THS	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_THS	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_THS	/;"	d
RST_BUS_TS	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TS	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TS	/;"	d
RST_BUS_TVE	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_TVE	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_TVE	/;"	d
RST_BUS_UART0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART0	/;"	d
RST_BUS_UART1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART1	/;"	d
RST_BUS_UART2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART2	/;"	d
RST_BUS_UART3	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_UART3	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_UART3	/;"	d
RST_BUS_VE	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_BUS_VE	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_BUS_VE	/;"	d
RST_CA53RESCNT	board/renesas/salvator-x/salvator-x.c	/^#define RST_CA53RESCNT	/;"	d	file:
RST_CA57RESCNT	board/renesas/salvator-x/salvator-x.c	/^#define RST_CA57RESCNT	/;"	d	file:
RST_CMP	include/linux/mtd/samsung_onenand.h	/^#define RST_CMP /;"	d
RST_CODE	board/renesas/salvator-x/salvator-x.c	/^#define RST_CODE	/;"	d	file:
RST_CPU	arch/x86/include/asm/processor.h	/^	RST_CPU		= 1 << 2,	\/* initiate reset *\/$/;"	e	enum:__anon33354ee00103
RST_DP_TX	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define RST_DP_TX	/;"	d
RST_MBUS	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_MBUS	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_MBUS	/;"	d
RST_RSTOUTCR	board/renesas/salvator-x/salvator-x.c	/^#define RST_RSTOUTCR	/;"	d	file:
RST_USB_PHY0	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY0	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY0	/;"	d
RST_USB_PHY1	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY1	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY1	/;"	d
RST_USB_PHY2	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY2	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY2	/;"	d
RST_USB_PHY3	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RST_USB_PHY3	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define RST_USB_PHY3	/;"	d
RSVD0	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD0[4];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[4]
RSVD0	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD0[8];$/;"	m	struct:__anon759824920308	typeref:typename:u_int8_t[8]
RSVD1	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD1[100];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[100]
RSVD1	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD1[80];$/;"	m	struct:__anon759824920308	typeref:typename:u_int8_t[80]
RSVD2	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD2[12];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[12]
RSVD3	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD3[64];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[64]
RSVD4	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD4[8];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[8]
RSVD5	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD5[88];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[88]
RSVD6	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD6[16];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[16]
RSVD7	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD7[624];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[624]
RSVD8	drivers/net/davinci_emac.h	/^	u_int8_t	RSVD8[244];$/;"	m	struct:__anon759824920108	typeref:typename:u_int8_t[244]
RSV_CRC_ERR	drivers/net/pic32_eth.h	/^#define RSV_CRC_ERR(/;"	d
RSV_RX_COUNT	drivers/net/pic32_eth.h	/^#define RSV_RX_COUNT(/;"	d
RSV_RX_CSUM	drivers/net/pic32_eth.h	/^#define RSV_RX_CSUM(/;"	d
RSV_RX_OK	drivers/net/pic32_eth.h	/^#define RSV_RX_OK(/;"	d
RSWRST	arch/mips/mach-pic32/reset.c	/^#define RSWRST /;"	d	file:
RS_ALGNERR	drivers/net/smc91111.h	/^#define RS_ALGNERR	/;"	d
RS_BADCRC	drivers/net/smc91111.h	/^#define RS_BADCRC	/;"	d
RS_BOOTARGS	board/cm5200/fwupdate.h	/^#define RS_BOOTARGS	/;"	d
RS_BRODCAST	drivers/net/smc91111.h	/^#define RS_BRODCAST	/;"	d
RS_ERRORS	drivers/net/smc91111.h	/^#define RS_ERRORS	/;"	d
RS_MULTICAST	drivers/net/smc91111.h	/^#define RS_MULTICAST	/;"	d
RS_ODDFRAME	drivers/net/smc91111.h	/^#define RS_ODDFRAME	/;"	d
RS_TOOLONG	drivers/net/smc91111.h	/^#define RS_TOOLONG	/;"	d
RS_TOOSHORT	drivers/net/smc91111.h	/^#define RS_TOOSHORT	/;"	d
RTAR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTAR	/;"	d
RTAR	include/SA-1100.h	/^#define RTAR	/;"	d
RTC	include/configs/B4860QDS.h	/^#define RTC$/;"	d
RTC	include/configs/T102xQDS.h	/^#define RTC$/;"	d
RTC	include/configs/T102xRDB.h	/^#define RTC$/;"	d
RTC	include/configs/T1040QDS.h	/^#define RTC$/;"	d
RTC	include/configs/T104xRDB.h	/^#define RTC$/;"	d
RTC	include/configs/ls1012aqds.h	/^#define RTC$/;"	d
RTC	include/configs/ls2080aqds.h	/^#define RTC$/;"	d
RTC	include/configs/ls2080ardb.h	/^#define RTC$/;"	d
RTC	include/configs/pcm030.h	/^#define RTC$/;"	d
RTC5200	drivers/rtc/mpc5xxx.c	/^} RTC5200;$/;"	t	typeref:struct:rtc5200	file:
RTCK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RTCK	/;"	d
RTCNR	arch/sh/include/asm/cpu_sh7720.h	/^#define RTCNR	/;"	d
RTCNT	arch/sh/include/asm/cpu_sh7706.h	/^#define	RTCNT	/;"	d
RTCNT	arch/sh/include/asm/cpu_sh7710.h	/^#define RTCNT	/;"	d
RTCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RTCNT	/;"	d
RTCNT_A	board/mpr2/lowlevel_init.S	/^RTCNT_A:	.long	BSC_BASE + 0x4C$/;"	l
RTCNT_A	board/ms7720se/lowlevel_init.S	/^RTCNT_A:	.long	BSC_BASE + 0x4C$/;"	l
RTCNT_A	board/ms7750se/lowlevel_init.S	/^RTCNT_A:	.long	RTCNT$/;"	l
RTCNT_A	board/renesas/MigoR/lowlevel_init.S	/^RTCNT_A:	.long	SBSC_RTCNT$/;"	l
RTCNT_A	board/renesas/r2dplus/lowlevel_init.S	/^RTCNT_A:	.long	RTCNT		\/* RTCNT Address *\/$/;"	l
RTCNT_D	board/mpr2/lowlevel_init.S	/^RTCNT_D:	.long	0xA55A005D	\/* count 93 *\/$/;"	l
RTCNT_D	board/ms7720se/lowlevel_init.S	/^RTCNT_D:	.long	0xA55A001F$/;"	l
RTCNT_D	board/ms7750se/lowlevel_init.S	/^RTCNT_D:	.word	0xA500		\/* RTCNT Write Code A5h Data 00h *\/$/;"	l
RTCNT_D	board/renesas/MigoR/lowlevel_init.S	/^RTCNT_D:	.long	0xA55A0012$/;"	l
RTCNT_D	board/renesas/r2dplus/lowlevel_init.S	/^RTCNT_D:	.word	0xA500		\/* RTCNT Write Code A5h Data 00h *\/$/;"	l
RTCOR	arch/sh/include/asm/cpu_sh7706.h	/^#define	RTCOR	/;"	d
RTCOR	arch/sh/include/asm/cpu_sh7710.h	/^#define RTCOR	/;"	d
RTCOR	arch/sh/include/asm/cpu_sh7720.h	/^#define RTCOR	/;"	d
RTCOR	arch/sh/include/asm/cpu_sh7750.h	/^#define RTCOR	/;"	d
RTCOR_A	board/mpr2/lowlevel_init.S	/^RTCOR_A:	.long	BSC_BASE + 0x50$/;"	l
RTCOR_A	board/ms7720se/lowlevel_init.S	/^RTCOR_A:	.long	BSC_BASE + 0x50$/;"	l
RTCOR_A	board/ms7722se/lowlevel_init.S	/^RTCOR_A:	.long	SBSC_RTCOR$/;"	l
RTCOR_A	board/ms7750se/lowlevel_init.S	/^RTCOR_A:	.long	RTCOR$/;"	l
RTCOR_A	board/renesas/MigoR/lowlevel_init.S	/^RTCOR_A:	.long	SBSC_RTCOR$/;"	l
RTCOR_A	board/renesas/r2dplus/lowlevel_init.S	/^RTCOR_A:	.long	RTCOR		\/* RTCOR Address *\/$/;"	l
RTCOR_A	board/renesas/rsk7203/lowlevel_init.S	/^RTCOR_A:	.long 0xFFFC0058$/;"	l
RTCOR_A	board/renesas/rsk7264/lowlevel_init.S	/^RTCOR_A:	.long 0xFFFC0058$/;"	l
RTCOR_A	board/renesas/rsk7269/lowlevel_init.S	/^RTCOR_A:	.long 0xFFFC0058$/;"	l
RTCOR_D	board/mpr2/lowlevel_init.S	/^RTCOR_D:	.long	0xa55a005d	\/* count 93 *\/$/;"	l
RTCOR_D	board/ms7720se/lowlevel_init.S	/^RTCOR_D:	.long	0xA55A001F$/;"	l
RTCOR_D	board/ms7722se/lowlevel_init.S	/^RTCOR_D:	.long	0xA55A0034$/;"	l
RTCOR_D	board/ms7750se/lowlevel_init.S	/^RTCOR_D:	.word	RTCOR_D_VALUE	\/* Set refresh time (about 15us) *\/$/;"	l
RTCOR_D	board/renesas/MigoR/lowlevel_init.S	/^RTCOR_D:	.long	0xA55A001C$/;"	l
RTCOR_D	board/renesas/r2dplus/lowlevel_init.S	/^RTCOR_D:	.word	0xA534		\/* RTCOR Write Code *\/$/;"	l
RTCOR_D	board/renesas/rsk7203/lowlevel_init.S	/^RTCOR_D:	.long 0xA55A0041$/;"	l
RTCOR_D	board/renesas/rsk7264/lowlevel_init.S	/^RTCOR_D:	.long 0xA55A0046$/;"	l
RTCOR_D	board/renesas/rsk7269/lowlevel_init.S	/^RTCOR_D:	.long 0xA55A0035$/;"	l
RTCOR_D_VALUE	board/ms7750se/lowlevel_init.S	/^#define RTCOR_D_VALUE	/;"	d	file:
RTCPICR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTCPICR	/;"	d
RTCRSTI	include/fsl_pmic.h	/^#define RTCRSTI	/;"	d
RTCSC_38K	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_38K	/;"	d
RTCSC_ALE	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_ALE	/;"	d
RTCSC_ALR	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_ALR	/;"	d
RTCSC_RTCIRQ_MASK	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_RTCIRQ_MASK	/;"	d
RTCSC_RTE	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_RTE	/;"	d
RTCSC_RTF	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_RTF	/;"	d
RTCSC_SEC	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_SEC	/;"	d
RTCSC_SIE	arch/powerpc/include/asm/8xx_immap.h	/^#define RTCSC_SIE	/;"	d
RTCSR	arch/sh/include/asm/cpu_sh7706.h	/^#define	RTCSR	/;"	d
RTCSR	arch/sh/include/asm/cpu_sh7710.h	/^#define RTCSR	/;"	d
RTCSR	arch/sh/include/asm/cpu_sh7720.h	/^#define RTCSR	/;"	d
RTCSR	arch/sh/include/asm/cpu_sh7750.h	/^#define RTCSR	/;"	d
RTCSR_A	board/mpr2/lowlevel_init.S	/^RTCSR_A:	.long	BSC_BASE + 0x48$/;"	l
RTCSR_A	board/ms7720se/lowlevel_init.S	/^RTCSR_A:	.long	BSC_BASE + 0x48$/;"	l
RTCSR_A	board/ms7722se/lowlevel_init.S	/^RTCSR_A:	.long	SBSC_RTCSR$/;"	l
RTCSR_A	board/ms7750se/lowlevel_init.S	/^RTCSR_A:	.long	RTCSR$/;"	l
RTCSR_A	board/renesas/MigoR/lowlevel_init.S	/^RTCSR_A:	.long	SBSC_RTCSR$/;"	l
RTCSR_A	board/renesas/r2dplus/lowlevel_init.S	/^RTCSR_A:	.long	RTCSR		\/* RTCSR Address *\/$/;"	l
RTCSR_A	board/renesas/rsk7203/lowlevel_init.S	/^RTCSR_A:	.long 0xFFFC0050$/;"	l
RTCSR_A	board/renesas/rsk7264/lowlevel_init.S	/^RTCSR_A:	.long 0xFFFC0050$/;"	l
RTCSR_A	board/renesas/rsk7269/lowlevel_init.S	/^RTCSR_A:	.long 0xFFFC0050$/;"	l
RTCSR_D	board/mpr2/lowlevel_init.S	/^RTCSR_D:	.long	0xA55A0008	\/* 1\/4, once *\/$/;"	l
RTCSR_D	board/ms7720se/lowlevel_init.S	/^RTCSR_D:	.long	0xA55A0010$/;"	l
RTCSR_D	board/ms7722se/lowlevel_init.S	/^RTCSR_D:	.long	0xA55A0010$/;"	l
RTCSR_D	board/ms7750se/lowlevel_init.S	/^RTCSR_D:	.word	0xA518		\/* RTCSR Write Code A5h Data 18h *\/$/;"	l
RTCSR_D	board/renesas/MigoR/lowlevel_init.S	/^RTCSR_D:	.long	0xA55A009a$/;"	l
RTCSR_D	board/renesas/r2dplus/lowlevel_init.S	/^RTCSR_D:	.word	0xA510		\/* RTCSR Write Code *\/$/;"	l
RTCSR_D	board/renesas/rsk7203/lowlevel_init.S	/^RTCSR_D:	.long 0xa55a0010$/;"	l
RTCSR_D	board/renesas/rsk7264/lowlevel_init.S	/^RTCSR_D:	.long 0xA55A0010$/;"	l
RTCSR_D	board/renesas/rsk7269/lowlevel_init.S	/^RTCSR_D:	.long 0xA55A0010$/;"	l
RTC_24H	include/linux/mc146818rtc.h	/^# define RTC_24H /;"	d
RTC_ACCESS	drivers/rtc/s3c24x0_rtc.c	/^} RTC_ACCESS;$/;"	t	typeref:enum:__anon9b924edb0103	file:
RTC_AF	include/linux/mc146818rtc.h	/^# define RTC_AF /;"	d
RTC_AIE	include/linux/mc146818rtc.h	/^# define RTC_AIE /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define RTC_ALARM /;"	d
RTC_ALARM_DONT_CARE	include/linux/mc146818rtc.h	/^# define RTC_ALARM_DONT_CARE /;"	d
RTC_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_ALARM_VALUE_MASK	/;"	d
RTC_ALARM_VALUE_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_ALARM_VALUE_OFFSET	/;"	d
RTC_ALRM_DAY_DAYS	arch/m68k/include/asm/rtc.h	/^#define RTC_ALRM_DAY_DAYS(/;"	d
RTC_ALRM_HM_HOURS	arch/m68k/include/asm/rtc.h	/^#define RTC_ALRM_HM_HOURS(/;"	d
RTC_ALRM_HM_MINUTES	arch/m68k/include/asm/rtc.h	/^#define RTC_ALRM_HM_MINUTES(/;"	d
RTC_ALRM_SEC_SECONDS	arch/m68k/include/asm/rtc.h	/^#define RTC_ALRM_SEC_SECONDS(/;"	d
RTC_ALWAYS_BCD	arch/powerpc/include/asm/mc146818rtc.h	/^#define RTC_ALWAYS_BCD /;"	d
RTC_BA	include/configs/PLU405.h	/^#define RTC_BA	/;"	d
RTC_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define RTC_BASE	/;"	d
RTC_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define RTC_BASE	/;"	d
RTC_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define RTC_BASE	/;"	d
RTC_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define RTC_BASE	/;"	d
RTC_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RTC_BASE	/;"	d
RTC_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define RTC_BASE	/;"	d
RTC_BASE	drivers/rtc/ds1556.c	/^#define RTC_BASE	/;"	d	file:
RTC_BASE	drivers/rtc/ds164x.c	/^#define RTC_BASE	/;"	d	file:
RTC_BASE	drivers/rtc/ds174x.c	/^#define RTC_BASE	/;"	d	file:
RTC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define RTC_BASE_ADDR	/;"	d
RTC_BATTERY_DEAD	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  RTC_BATTERY_DEAD	/;"	d
RTC_BATTERY_DEAD	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  RTC_BATTERY_DEAD	/;"	d
RTC_BATTERY_DEAD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RTC_BATTERY_DEAD	/;"	d
RTC_CA_CALIB_MASK	include/mk48t59.h	/^#define RTC_CA_CALIB_MASK /;"	d
RTC_CA_CALIB_SIGN	include/mk48t59.h	/^#define RTC_CA_CALIB_SIGN /;"	d
RTC_CA_READ	drivers/rtc/ds1556.c	/^#define RTC_CA_READ	/;"	d	file:
RTC_CA_READ	drivers/rtc/ds164x.c	/^#define   RTC_CA_READ	/;"	d	file:
RTC_CA_READ	drivers/rtc/ds174x.c	/^#define RTC_CA_READ	/;"	d	file:
RTC_CA_READ	include/mk48t59.h	/^#define RTC_CA_READ /;"	d
RTC_CA_WRITE	drivers/rtc/ds1556.c	/^#define RTC_CA_WRITE	/;"	d	file:
RTC_CA_WRITE	drivers/rtc/ds164x.c	/^#define   RTC_CA_WRITE	/;"	d	file:
RTC_CA_WRITE	drivers/rtc/ds174x.c	/^#define RTC_CA_WRITE	/;"	d	file:
RTC_CA_WRITE	include/mk48t59.h	/^#define RTC_CA_WRITE /;"	d
RTC_CB_OSC_DISABLE	drivers/rtc/ds1556.c	/^#define RTC_CB_OSC_DISABLE	/;"	d	file:
RTC_CB_OSC_DISABLE	drivers/rtc/ds164x.c	/^#define   RTC_CB_OSC_DISABLE	/;"	d	file:
RTC_CB_OSC_DISABLE	drivers/rtc/ds174x.c	/^#define RTC_CB_OSC_DISABLE	/;"	d	file:
RTC_CB_STOP	include/mk48t59.h	/^#define RTC_CB_STOP /;"	d
RTC_CC_BATTERY_FLAG	drivers/rtc/ds1556.c	/^#define RTC_CC_BATTERY_FLAG	/;"	d	file:
RTC_CC_BATTERY_FLAG	drivers/rtc/ds174x.c	/^#define RTC_CC_BATTERY_FLAG	/;"	d	file:
RTC_CC_FREQ_TEST	drivers/rtc/ds1556.c	/^#define RTC_CC_FREQ_TEST	/;"	d	file:
RTC_CC_FREQ_TEST	drivers/rtc/ds164x.c	/^#define   RTC_CC_FREQ_TEST	/;"	d	file:
RTC_CC_FREQ_TEST	drivers/rtc/ds174x.c	/^#define RTC_CC_FREQ_TEST	/;"	d	file:
RTC_CENTURY	drivers/rtc/ds1556.c	/^#define RTC_CENTURY	/;"	d	file:
RTC_CENTURY	drivers/rtc/ds174x.c	/^#define RTC_CENTURY	/;"	d	file:
RTC_CLK_FREQUENCY	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define RTC_CLK_FREQUENCY	/;"	d
RTC_CONFIG_A	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_A	/;"	d	file:
RTC_CONFIG_A_RATE_1024HZ	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_A_RATE_1024HZ	/;"	d	file:
RTC_CONFIG_A_REF_CLCK_32KHZ	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_A_REF_CLCK_32KHZ	/;"	d	file:
RTC_CONFIG_B	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_B	/;"	d	file:
RTC_CONFIG_B_24H	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_B_24H	/;"	d	file:
RTC_CONFIG_C	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_C	/;"	d	file:
RTC_CONFIG_D	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_D	/;"	d	file:
RTC_CONFIG_D_VALID_RAM_AND_TIME	drivers/rtc/mc146818.c	/^#define RTC_CONFIG_D_VALID_RAM_AND_TIME	/;"	d	file:
RTC_CONTROL	drivers/rtc/ds1306.c	/^#define	RTC_CONTROL	/;"	d	file:
RTC_CONTROL	drivers/rtc/ds164x.c	/^#define RTC_CONTROL	/;"	d	file:
RTC_CONTROL	include/linux/mc146818rtc.h	/^#define RTC_CONTROL /;"	d
RTC_CONTROLA	drivers/rtc/ds1556.c	/^#define RTC_CONTROLA	/;"	d	file:
RTC_CONTROLA	drivers/rtc/ds164x.c	/^#define RTC_CONTROLA	/;"	d	file:
RTC_CONTROLA	drivers/rtc/ds174x.c	/^#define RTC_CONTROLA	/;"	d	file:
RTC_CONTROLA	include/mk48t59.h	/^#define RTC_CONTROLA /;"	d
RTC_CONTROLB	drivers/rtc/ds1556.c	/^#define RTC_CONTROLB	/;"	d	file:
RTC_CONTROLB	drivers/rtc/ds164x.c	/^#define RTC_CONTROLB	/;"	d	file:
RTC_CONTROLB	drivers/rtc/ds174x.c	/^#define RTC_CONTROLB	/;"	d	file:
RTC_CONTROLB	include/mk48t59.h	/^#define RTC_CONTROLB /;"	d
RTC_CONTROLC	drivers/rtc/ds1556.c	/^#define RTC_CONTROLC	/;"	d	file:
RTC_CONTROLC	drivers/rtc/ds164x.c	/^#define RTC_CONTROLC	/;"	d	file:
RTC_CONTROLC	drivers/rtc/ds174x.c	/^#define RTC_CONTROLC	/;"	d	file:
RTC_CONTROL_ADDR	drivers/rtc/m41t11.c	/^#define RTC_CONTROL_ADDR /;"	d	file:
RTC_CR	drivers/rtc/pl031.c	/^#define	RTC_CR	/;"	d	file:
RTC_CR_32000	arch/m68k/include/asm/rtc.h	/^#define RTC_CR_32000	/;"	d
RTC_CR_32768	arch/m68k/include/asm/rtc.h	/^#define RTC_CR_32768	/;"	d
RTC_CR_38400	arch/m68k/include/asm/rtc.h	/^#define RTC_CR_38400	/;"	d
RTC_CR_EN	arch/m68k/include/asm/rtc.h	/^#define RTC_CR_EN	/;"	d
RTC_CR_START	drivers/rtc/pl031.c	/^#define RTC_CR_START	/;"	d	file:
RTC_CR_SWR	arch/m68k/include/asm/rtc.h	/^#define RTC_CR_SWR	/;"	d
RTC_CR_XTL	arch/m68k/include/asm/rtc.h	/^#define RTC_CR_XTL(/;"	d
RTC_CTL1_BIT_2412	drivers/rtc/rx8025.c	/^#define RTC_CTL1_BIT_2412	/;"	d	file:
RTC_CTL1_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_CTL1_REG_ADDR	/;"	d	file:
RTC_CTL2_BIT_PON	drivers/rtc/rx8025.c	/^#define RTC_CTL2_BIT_PON	/;"	d	file:
RTC_CTL2_BIT_VDET	drivers/rtc/rx8025.c	/^#define RTC_CTL2_BIT_VDET	/;"	d	file:
RTC_CTL2_BIT_VDSL	drivers/rtc/rx8025.c	/^#define RTC_CTL2_BIT_VDSL	/;"	d	file:
RTC_CTL2_BIT_XST	drivers/rtc/rx8025.c	/^#define RTC_CTL2_BIT_XST	/;"	d	file:
RTC_CTL2_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_CTL2_REG_ADDR	/;"	d	file:
RTC_CTL_ADDR	drivers/rtc/ds1374.c	/^#define RTC_CTL_ADDR	/;"	d	file:
RTC_CTL_BIT_A1IE	drivers/rtc/ds1337.c	/^#define RTC_CTL_BIT_A1IE	/;"	d	file:
RTC_CTL_BIT_A1IE	drivers/rtc/ds3231.c	/^#define RTC_CTL_BIT_A1IE	/;"	d	file:
RTC_CTL_BIT_A2IE	drivers/rtc/ds1337.c	/^#define RTC_CTL_BIT_A2IE	/;"	d	file:
RTC_CTL_BIT_A2IE	drivers/rtc/ds3231.c	/^#define RTC_CTL_BIT_A2IE	/;"	d	file:
RTC_CTL_BIT_AIE	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_AIE	/;"	d	file:
RTC_CTL_BIT_BBSQW	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_BBSQW	/;"	d	file:
RTC_CTL_BIT_DOSC	drivers/rtc/ds1337.c	/^#define RTC_CTL_BIT_DOSC	/;"	d	file:
RTC_CTL_BIT_DOSC	drivers/rtc/ds3231.c	/^#define RTC_CTL_BIT_DOSC	/;"	d	file:
RTC_CTL_BIT_EN_OSC	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_EN_OSC	/;"	d	file:
RTC_CTL_BIT_INTCN	drivers/rtc/ds1337.c	/^#define RTC_CTL_BIT_INTCN	/;"	d	file:
RTC_CTL_BIT_INTCN	drivers/rtc/ds3231.c	/^#define RTC_CTL_BIT_INTCN	/;"	d	file:
RTC_CTL_BIT_OUT	drivers/rtc/ds1307.c	/^#define RTC_CTL_BIT_OUT	/;"	d	file:
RTC_CTL_BIT_RS0	drivers/rtc/ds1307.c	/^#define RTC_CTL_BIT_RS0	/;"	d	file:
RTC_CTL_BIT_RS1	drivers/rtc/ds1307.c	/^#define RTC_CTL_BIT_RS1	/;"	d	file:
RTC_CTL_BIT_RS1	drivers/rtc/ds1337.c	/^#define RTC_CTL_BIT_RS1	/;"	d	file:
RTC_CTL_BIT_RS1	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_RS1	/;"	d	file:
RTC_CTL_BIT_RS1	drivers/rtc/ds3231.c	/^#define RTC_CTL_BIT_RS1	/;"	d	file:
RTC_CTL_BIT_RS2	drivers/rtc/ds1337.c	/^#define RTC_CTL_BIT_RS2	/;"	d	file:
RTC_CTL_BIT_RS2	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_RS2	/;"	d	file:
RTC_CTL_BIT_RS2	drivers/rtc/ds3231.c	/^#define RTC_CTL_BIT_RS2	/;"	d	file:
RTC_CTL_BIT_SQWE	drivers/rtc/ds1307.c	/^#define RTC_CTL_BIT_SQWE	/;"	d	file:
RTC_CTL_BIT_WACE	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_WACE	/;"	d	file:
RTC_CTL_BIT_WDSTR	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_WDSTR	/;"	d	file:
RTC_CTL_BIT_WD_ALM	drivers/rtc/ds1374.c	/^#define RTC_CTL_BIT_WD_ALM	/;"	d	file:
RTC_CTL_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_CTL_REG_ADDR	/;"	d	file:
RTC_CTL_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_CTL_REG_ADDR	/;"	d	file:
RTC_CTL_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_CTL_REG_ADDR	/;"	d	file:
RTC_CTL_STAT_BIT_OSF	drivers/rtc/pt7c4338.c	/^#define RTC_CTL_STAT_BIT_OSF /;"	d	file:
RTC_CTL_STAT_BIT_OUT	drivers/rtc/pt7c4338.c	/^#define RTC_CTL_STAT_BIT_OUT /;"	d	file:
RTC_CTL_STAT_BIT_RS0	drivers/rtc/pt7c4338.c	/^#define RTC_CTL_STAT_BIT_RS0 /;"	d	file:
RTC_CTL_STAT_BIT_RS1	drivers/rtc/pt7c4338.c	/^#define RTC_CTL_STAT_BIT_RS1 /;"	d	file:
RTC_CTL_STAT_BIT_SQWE	drivers/rtc/pt7c4338.c	/^#define RTC_CTL_STAT_BIT_SQWE /;"	d	file:
RTC_CTL_STAT_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_CTL_STAT_REG_ADDR /;"	d	file:
RTC_CTRL	drivers/rtc/m41t60.c	/^#define RTC_CTRL	/;"	d	file:
RTC_CTRL_ALARM_IRQ	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_ALARM_IRQ	/;"	d
RTC_CTRL_ALARM_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_ALARM_IRQ_EN	/;"	d
RTC_CTRL_CLKGATE	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_CLKGATE	/;"	d
RTC_CTRL_FORCE_UPDATE	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_FORCE_UPDATE	/;"	d
RTC_CTRL_ONEMSEC_IRQ	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_ONEMSEC_IRQ	/;"	d
RTC_CTRL_ONEMSEC_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_ONEMSEC_IRQ_EN	/;"	d
RTC_CTRL_SFTRST	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_SFTRST	/;"	d
RTC_CTRL_SUPPRESS_COPY2ANALOG	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_SUPPRESS_COPY2ANALOG	/;"	d
RTC_CTRL_WATCHDOGEN	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_CTRL_WATCHDOGEN	/;"	d
RTC_DATE	drivers/rtc/m41t60.c	/^#define RTC_DATE	/;"	d	file:
RTC_DATE_ADDR	drivers/rtc/m41t11.c	/^#define RTC_DATE_ADDR /;"	d	file:
RTC_DATE_OF_MONTH	drivers/rtc/ds1306.c	/^#define	RTC_DATE_OF_MONTH	/;"	d	file:
RTC_DATE_OF_MONTH	drivers/rtc/mc146818.c	/^#define RTC_DATE_OF_MONTH	/;"	d	file:
RTC_DATE_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_DATE_REG_ADDR	/;"	d	file:
RTC_DATE_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_DATE_REG_ADDR	/;"	d	file:
RTC_DATE_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_DATE_REG_ADDR	/;"	d	file:
RTC_DATE_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_DATE_REG_ADDR	/;"	d	file:
RTC_DATE_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_DATE_REG_ADDR /;"	d	file:
RTC_DATE_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_DATE_REG_ADDR	/;"	d	file:
RTC_DAY	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	RTC_DAY	/;"	d
RTC_DAY	drivers/rtc/m41t60.c	/^#define RTC_DAY	/;"	d	file:
RTC_DAYS_DAYS	arch/m68k/include/asm/rtc.h	/^#define RTC_DAYS_DAYS(/;"	d
RTC_DAY_ADDR	drivers/rtc/m41t11.c	/^#define RTC_DAY_ADDR /;"	d	file:
RTC_DAY_OF_MONTH	drivers/rtc/ds1556.c	/^#define RTC_DAY_OF_MONTH	/;"	d	file:
RTC_DAY_OF_MONTH	drivers/rtc/ds164x.c	/^#define RTC_DAY_OF_MONTH	/;"	d	file:
RTC_DAY_OF_MONTH	drivers/rtc/ds174x.c	/^#define RTC_DAY_OF_MONTH	/;"	d	file:
RTC_DAY_OF_MONTH	include/linux/mc146818rtc.h	/^#define RTC_DAY_OF_MONTH /;"	d
RTC_DAY_OF_MONTH	include/mk48t59.h	/^#define RTC_DAY_OF_MONTH /;"	d
RTC_DAY_OF_WEEK	drivers/rtc/ds1306.c	/^#define	RTC_DAY_OF_WEEK	/;"	d	file:
RTC_DAY_OF_WEEK	drivers/rtc/ds1556.c	/^#define RTC_DAY_OF_WEEK	/;"	d	file:
RTC_DAY_OF_WEEK	drivers/rtc/ds164x.c	/^#define RTC_DAY_OF_WEEK	/;"	d	file:
RTC_DAY_OF_WEEK	drivers/rtc/ds174x.c	/^#define RTC_DAY_OF_WEEK	/;"	d	file:
RTC_DAY_OF_WEEK	drivers/rtc/mc146818.c	/^#define RTC_DAY_OF_WEEK	/;"	d	file:
RTC_DAY_OF_WEEK	include/linux/mc146818rtc.h	/^#define RTC_DAY_OF_WEEK /;"	d
RTC_DAY_OF_WEEK	include/mk48t59.h	/^#define RTC_DAY_OF_WEEK /;"	d
RTC_DAY_OF_WEEK_ALARM0	drivers/rtc/ds1306.c	/^#define	RTC_DAY_OF_WEEK_ALARM0	/;"	d	file:
RTC_DAY_OF_WEEK_ALARM1	drivers/rtc/ds1306.c	/^#define	RTC_DAY_OF_WEEK_ALARM1	/;"	d	file:
RTC_DAY_P	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define RTC_DAY_P	/;"	d
RTC_DAY_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_DAY_REG_ADDR	/;"	d	file:
RTC_DAY_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_DAY_REG_ADDR	/;"	d	file:
RTC_DAY_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_DAY_REG_ADDR	/;"	d	file:
RTC_DAY_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_DAY_REG_ADDR	/;"	d	file:
RTC_DAY_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_DAY_REG_ADDR /;"	d	file:
RTC_DAY_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_DAY_REG_ADDR	/;"	d	file:
RTC_DEBUG_WATCHDOG_RESET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_DEBUG_WATCHDOG_RESET	/;"	d
RTC_DEBUG_WATCHDOG_RESET_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_DEBUG_WATCHDOG_RESET_MASK	/;"	d
RTC_DISABLE	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  RTC_DISABLE	/;"	d
RTC_DISABLE	drivers/rtc/s3c24x0_rtc.c	/^	RTC_DISABLE$/;"	e	enum:__anon9b924edb0103	file:
RTC_DIV_COUNT	include/configs/adp-ag101p.h	/^#define RTC_DIV_COUNT	/;"	d
RTC_DIV_CTL	include/linux/mc146818rtc.h	/^# define RTC_DIV_CTL /;"	d
RTC_DIV_RESET1	include/linux/mc146818rtc.h	/^#  define RTC_DIV_RESET1 /;"	d
RTC_DIV_RESET2	include/linux/mc146818rtc.h	/^#  define RTC_DIV_RESET2 /;"	d
RTC_DM_BINARY	include/linux/mc146818rtc.h	/^# define RTC_DM_BINARY /;"	d
RTC_DR	drivers/rtc/pl031.c	/^#define	RTC_DR	/;"	d	file:
RTC_DS1337_RESET_VAL	drivers/rtc/ds1337.c	/^ #define RTC_DS1337_RESET_VAL /;"	d	file:
RTC_DST_EN	include/linux/mc146818rtc.h	/^# define RTC_DST_EN /;"	d
RTC_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  RTC_EN	/;"	d
RTC_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   RTC_EN	/;"	d
RTC_ENABLE	drivers/rtc/s3c24x0_rtc.c	/^	RTC_ENABLE,$/;"	e	enum:__anon9b924edb0103	file:
RTC_EPOCH	drivers/rtc/ds164x.c	/^#define RTC_EPOCH /;"	d	file:
RTC_FREQ_SELECT	include/linux/mc146818rtc.h	/^#define RTC_FREQ_SELECT /;"	d
RTC_HOUR	drivers/rtc/m41t60.c	/^#define RTC_HOUR	/;"	d	file:
RTC_HOURMIN_HOURS	arch/m68k/include/asm/rtc.h	/^#define RTC_HOURMIN_HOURS(/;"	d
RTC_HOURMIN_MINUTES	arch/m68k/include/asm/rtc.h	/^#define RTC_HOURMIN_MINUTES(/;"	d
RTC_HOURS	drivers/rtc/ds1306.c	/^#define	RTC_HOURS	/;"	d	file:
RTC_HOURS	drivers/rtc/ds1556.c	/^#define RTC_HOURS	/;"	d	file:
RTC_HOURS	drivers/rtc/ds164x.c	/^#define RTC_HOURS	/;"	d	file:
RTC_HOURS	drivers/rtc/ds174x.c	/^#define RTC_HOURS	/;"	d	file:
RTC_HOURS	drivers/rtc/mc146818.c	/^#define RTC_HOURS	/;"	d	file:
RTC_HOURS	include/linux/mc146818rtc.h	/^#define RTC_HOURS /;"	d
RTC_HOURS	include/mk48t59.h	/^#define RTC_HOURS /;"	d
RTC_HOURS_ALARM	drivers/rtc/mc146818.c	/^#define RTC_HOURS_ALARM	/;"	d	file:
RTC_HOURS_ALARM	include/linux/mc146818rtc.h	/^#define RTC_HOURS_ALARM /;"	d
RTC_HOURS_ALARM0	drivers/rtc/ds1306.c	/^#define	RTC_HOURS_ALARM0	/;"	d	file:
RTC_HOURS_ALARM1	drivers/rtc/ds1306.c	/^#define	RTC_HOURS_ALARM1	/;"	d	file:
RTC_HOUR_ADDR	drivers/rtc/m41t11.c	/^#define RTC_HOUR_ADDR /;"	d	file:
RTC_HR	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	RTC_HR	/;"	d
RTC_HR_P	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define RTC_HR_P	/;"	d
RTC_HR_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_HR_REG_ADDR	/;"	d	file:
RTC_HR_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_HR_REG_ADDR	/;"	d	file:
RTC_HR_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_HR_REG_ADDR	/;"	d	file:
RTC_HR_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_HR_REG_ADDR	/;"	d	file:
RTC_HR_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_HR_REG_ADDR /;"	d	file:
RTC_HR_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_HR_REG_ADDR	/;"	d	file:
RTC_ICR	drivers/rtc/pl031.c	/^#define	RTC_ICR	/;"	d	file:
RTC_ICTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define RTC_ICTL /;"	d
RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define RTC_ICTL /;"	d
RTC_IER_1HZ	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_1HZ	/;"	d
RTC_IER_2HZ	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_2HZ	/;"	d
RTC_IER_ALM	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_ALM	/;"	d
RTC_IER_DAY	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_DAY	/;"	d
RTC_IER_HR	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_HR	/;"	d
RTC_IER_MIN	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_MIN	/;"	d
RTC_IER_SAM0	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM0	/;"	d
RTC_IER_SAM1	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM1	/;"	d
RTC_IER_SAM2	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM2	/;"	d
RTC_IER_SAM3	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM3	/;"	d
RTC_IER_SAM4	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM4	/;"	d
RTC_IER_SAM5	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM5	/;"	d
RTC_IER_SAM6	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM6	/;"	d
RTC_IER_SAM7	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SAM7	/;"	d
RTC_IER_SW	arch/m68k/include/asm/rtc.h	/^#define RTC_IER_SW	/;"	d
RTC_IMSC	drivers/rtc/pl031.c	/^#define	RTC_IMSC	/;"	d	file:
RTC_INTR_FLAGS	include/linux/mc146818rtc.h	/^#define RTC_INTR_FLAGS /;"	d
RTC_IRQF	include/linux/mc146818rtc.h	/^# define RTC_IRQF /;"	d
RTC_ISR_1HZ	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_1HZ	/;"	d
RTC_ISR_2HZ	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_2HZ	/;"	d
RTC_ISR_ALM	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_ALM	/;"	d
RTC_ISR_DAY	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_DAY	/;"	d
RTC_ISR_HR	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_HR	/;"	d
RTC_ISR_MIN	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_MIN	/;"	d
RTC_ISR_SAM0	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM0	/;"	d
RTC_ISR_SAM1	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM1	/;"	d
RTC_ISR_SAM2	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM2	/;"	d
RTC_ISR_SAM3	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM3	/;"	d
RTC_ISR_SAM4	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM4	/;"	d
RTC_ISR_SAM5	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM5	/;"	d
RTC_ISR_SAM6	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM6	/;"	d
RTC_ISR_SAM7	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SAM7	/;"	d
RTC_ISR_SW	arch/m68k/include/asm/rtc.h	/^#define RTC_ISR_SW	/;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define RTC_ISTAT /;"	d
RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define RTC_ISTAT /;"	d
RTC_KICK0R_WE	arch/arm/include/asm/davinci_rtc.h	/^#define RTC_KICK0R_WE	/;"	d
RTC_KICK1R_WE	arch/arm/include/asm/davinci_rtc.h	/^#define RTC_KICK1R_WE	/;"	d
RTC_LR	drivers/rtc/pl031.c	/^#define	RTC_LR	/;"	d	file:
RTC_MILLISECONDS_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_MILLISECONDS_COUNT_MASK	/;"	d
RTC_MILLISECONDS_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_MILLISECONDS_COUNT_OFFSET	/;"	d
RTC_MIN	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	RTC_MIN	/;"	d
RTC_MIN	drivers/rtc/m41t60.c	/^#define RTC_MIN	/;"	d	file:
RTC_MINUTES	drivers/rtc/ds1306.c	/^#define	RTC_MINUTES	/;"	d	file:
RTC_MINUTES	drivers/rtc/ds1556.c	/^#define RTC_MINUTES	/;"	d	file:
RTC_MINUTES	drivers/rtc/ds164x.c	/^#define RTC_MINUTES	/;"	d	file:
RTC_MINUTES	drivers/rtc/ds174x.c	/^#define RTC_MINUTES	/;"	d	file:
RTC_MINUTES	drivers/rtc/mc146818.c	/^#define RTC_MINUTES	/;"	d	file:
RTC_MINUTES	include/linux/mc146818rtc.h	/^#define RTC_MINUTES /;"	d
RTC_MINUTES	include/mk48t59.h	/^#define RTC_MINUTES /;"	d
RTC_MINUTES_ALARM	drivers/rtc/mc146818.c	/^#define RTC_MINUTES_ALARM	/;"	d	file:
RTC_MINUTES_ALARM	include/linux/mc146818rtc.h	/^#define RTC_MINUTES_ALARM /;"	d
RTC_MINUTES_ALARM0	drivers/rtc/ds1306.c	/^#define	RTC_MINUTES_ALARM0	/;"	d	file:
RTC_MINUTES_ALARM1	drivers/rtc/ds1306.c	/^#define	RTC_MINUTES_ALARM1	/;"	d	file:
RTC_MIN_ADDR	drivers/rtc/m41t11.c	/^#define RTC_MIN_ADDR /;"	d	file:
RTC_MIN_P	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define RTC_MIN_P	/;"	d
RTC_MIN_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_MIN_REG_ADDR	/;"	d	file:
RTC_MIN_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_MIN_REG_ADDR	/;"	d	file:
RTC_MIN_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_MIN_REG_ADDR	/;"	d	file:
RTC_MIN_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_MIN_REG_ADDR	/;"	d	file:
RTC_MIN_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_MIN_REG_ADDR /;"	d	file:
RTC_MIN_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_MIN_REG_ADDR	/;"	d	file:
RTC_MIS	drivers/rtc/pl031.c	/^#define	RTC_MIS	/;"	d	file:
RTC_MONTH	drivers/rtc/ds1306.c	/^#define	RTC_MONTH	/;"	d	file:
RTC_MONTH	drivers/rtc/ds1556.c	/^#define RTC_MONTH	/;"	d	file:
RTC_MONTH	drivers/rtc/ds164x.c	/^#define RTC_MONTH	/;"	d	file:
RTC_MONTH	drivers/rtc/ds174x.c	/^#define RTC_MONTH	/;"	d	file:
RTC_MONTH	drivers/rtc/m41t60.c	/^#define RTC_MONTH	/;"	d	file:
RTC_MONTH	drivers/rtc/mc146818.c	/^#define RTC_MONTH	/;"	d	file:
RTC_MONTH	include/linux/mc146818rtc.h	/^#define RTC_MONTH /;"	d
RTC_MONTH	include/mk48t59.h	/^#define RTC_MONTH /;"	d
RTC_MONTH_ADDR	drivers/rtc/m41t11.c	/^#define RTC_MONTH_ADDR /;"	d	file:
RTC_MON_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_MON_REG_ADDR	/;"	d	file:
RTC_MON_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_MON_REG_ADDR	/;"	d	file:
RTC_MON_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_MON_REG_ADDR	/;"	d	file:
RTC_MON_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_MON_REG_ADDR	/;"	d	file:
RTC_MON_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_MON_REG_ADDR /;"	d	file:
RTC_MON_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_MON_REG_ADDR	/;"	d	file:
RTC_MR	drivers/rtc/pl031.c	/^#define	RTC_MR	/;"	d	file:
RTC_OCEN_CLKEN	arch/m68k/include/asm/m5301x.h	/^#define RTC_OCEN_CLKEN	/;"	d
RTC_OCEN_OSCBYP	arch/m68k/include/asm/m5301x.h	/^#define RTC_OCEN_OSCBYP	/;"	d
RTC_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RTC_OFFSET	/;"	d
RTC_PAUSE	drivers/rtc/mpc5xxx.c	/^#define	RTC_PAUSE	/;"	d	file:
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V48	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V48	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V52	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V52	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V57	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V57	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V62	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V62	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V68	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V68	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V73	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V73	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V78	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V78	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V83	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V83	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_MASK	/;"	d
RTC_PERSISTENT0_ADJ_POSLIMITBUCK_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ADJ_POSLIMITBUCK_OFFSET	/;"	d
RTC_PERSISTENT0_ALARM_EN	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ALARM_EN	/;"	d
RTC_PERSISTENT0_ALARM_WAKE	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ALARM_WAKE	/;"	d
RTC_PERSISTENT0_ALARM_WAKE_EN	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ALARM_WAKE_EN	/;"	d
RTC_PERSISTENT0_AUTO_RESTART	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_AUTO_RESTART	/;"	d
RTC_PERSISTENT0_CLOCKSOURCE	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_CLOCKSOURCE	/;"	d
RTC_PERSISTENT0_DISABLE_PSWITCH	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_DISABLE_PSWITCH	/;"	d
RTC_PERSISTENT0_DISABLE_XTALOK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_DISABLE_XTALOK	/;"	d
RTC_PERSISTENT0_ENABLE_LRADC_PWRUP	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_ENABLE_LRADC_PWRUP	/;"	d
RTC_PERSISTENT0_EXTERNAL_RESET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_EXTERNAL_RESET	/;"	d
RTC_PERSISTENT0_LCK_SECS	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_LCK_SECS	/;"	d
RTC_PERSISTENT0_LOWERBIAS_M25P	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_LOWERBIAS_M25P	/;"	d
RTC_PERSISTENT0_LOWERBIAS_M50P	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_LOWERBIAS_M50P	/;"	d
RTC_PERSISTENT0_LOWERBIAS_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_LOWERBIAS_MASK	/;"	d
RTC_PERSISTENT0_LOWERBIAS_NOMINAL	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_LOWERBIAS_NOMINAL	/;"	d
RTC_PERSISTENT0_LOWERBIAS_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_LOWERBIAS_OFFSET	/;"	d
RTC_PERSISTENT0_MSEC_RES_16MS	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_16MS	/;"	d
RTC_PERSISTENT0_MSEC_RES_1MS	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_1MS	/;"	d
RTC_PERSISTENT0_MSEC_RES_2MS	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_2MS	/;"	d
RTC_PERSISTENT0_MSEC_RES_4MS	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_4MS	/;"	d
RTC_PERSISTENT0_MSEC_RES_8MS	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_8MS	/;"	d
RTC_PERSISTENT0_MSEC_RES_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_MASK	/;"	d
RTC_PERSISTENT0_MSEC_RES_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_MSEC_RES_OFFSET	/;"	d
RTC_PERSISTENT0_THERMAL_RESET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_THERMAL_RESET	/;"	d
RTC_PERSISTENT0_XTAL24KHZ_PWRUP	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_XTAL24KHZ_PWRUP	/;"	d
RTC_PERSISTENT0_XTAL32KHZ_PWRUP	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_XTAL32KHZ_PWRUP	/;"	d
RTC_PERSISTENT0_XTAL32_FREQ	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT0_XTAL32_FREQ	/;"	d
RTC_PERSISTENT1_GENERAL_ENUM_500MA_2X	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_ENUM_500MA_2X	/;"	d
RTC_PERSISTENT1_GENERAL_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_MASK	/;"	d
RTC_PERSISTENT1_GENERAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_OFFSET	/;"	d
RTC_PERSISTENT1_GENERAL_OTG_ALT_ROLE	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_OTG_ALT_ROLE	/;"	d
RTC_PERSISTENT1_GENERAL_OTG_HNP	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_OTG_HNP	/;"	d
RTC_PERSISTENT1_GENERAL_SKIP_CHECKDISK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_SKIP_CHECKDISK	/;"	d
RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER	/;"	d
RTC_PERSISTENT1_GENERAL_USB_LPM	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT1_GENERAL_USB_LPM	/;"	d
RTC_PERSISTENT2_GENERAL_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT2_GENERAL_MASK	/;"	d
RTC_PERSISTENT2_GENERAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT2_GENERAL_OFFSET	/;"	d
RTC_PERSISTENT3_GENERAL_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT3_GENERAL_MASK	/;"	d
RTC_PERSISTENT3_GENERAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT3_GENERAL_OFFSET	/;"	d
RTC_PERSISTENT4_GENERAL_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT4_GENERAL_MASK	/;"	d
RTC_PERSISTENT4_GENERAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT4_GENERAL_OFFSET	/;"	d
RTC_PERSISTENT5_GENERAL_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT5_GENERAL_MASK	/;"	d
RTC_PERSISTENT5_GENERAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_PERSISTENT5_GENERAL_OFFSET	/;"	d
RTC_PF	include/linux/mc146818rtc.h	/^# define RTC_PF /;"	d
RTC_PIE	include/linux/mc146818rtc.h	/^# define RTC_PIE /;"	d
RTC_PORT	arch/powerpc/include/asm/mc146818rtc.h	/^#define RTC_PORT(/;"	d
RTC_PORT_ADDR0	include/mk48t59.h	/^#define RTC_PORT_ADDR0	/;"	d
RTC_PORT_ADDR1	include/mk48t59.h	/^#define RTC_PORT_ADDR1	/;"	d
RTC_PORT_DATA	include/mk48t59.h	/^#define RTC_PORT_DATA	/;"	d
RTC_PORT_MC146818	drivers/rtc/mc146818.c	/^#define RTC_PORT_MC146818	/;"	d	file:
RTC_PORZ	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define RTC_PORZ	/;"	d
RTC_POWER_FAILED	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define RTC_POWER_FAILED	/;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define RTC_PREN /;"	d
RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define RTC_PREN /;"	d
RTC_PT7C4338_RESET_VAL	drivers/rtc/pt7c4338.c	/^#define RTC_PT7C4338_RESET_VAL /;"	d	file:
RTC_RATE_SELECT	include/linux/mc146818rtc.h	/^# define RTC_RATE_SELECT /;"	d
RTC_READ_REG	drivers/rtc/pl031.c	/^#define	RTC_READ_REG(/;"	d	file:
RTC_REF_CLCK_1MHZ	include/linux/mc146818rtc.h	/^#  define RTC_REF_CLCK_1MHZ /;"	d
RTC_REF_CLCK_32KHZ	include/linux/mc146818rtc.h	/^#  define RTC_REF_CLCK_32KHZ /;"	d
RTC_REF_CLCK_4MHZ	include/linux/mc146818rtc.h	/^#  define RTC_REF_CLCK_4MHZ /;"	d
RTC_REG_A	include/linux/mc146818rtc.h	/^#define RTC_REG_A /;"	d
RTC_REG_B	include/linux/mc146818rtc.h	/^#define RTC_REG_B /;"	d
RTC_REG_C	include/linux/mc146818rtc.h	/^#define RTC_REG_C /;"	d
RTC_REG_CNT	drivers/rtc/m41t11.c	/^#define RTC_REG_CNT /;"	d	file:
RTC_REG_CNT	drivers/rtc/m41t60.c	/^#define RTC_REG_CNT	/;"	d	file:
RTC_REG_D	include/linux/mc146818rtc.h	/^#define RTC_REG_D /;"	d
RTC_REG_SIZE	drivers/rtc/mc146818.c	/^#define RTC_REG_SIZE	/;"	d	file:
RTC_RIS	drivers/rtc/pl031.c	/^#define	RTC_RIS	/;"	d	file:
RTC_RV3029_CLOCK_PAGE	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CLOCK_PAGE	/;"	d	file:
RTC_RV3029_CTRL1	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CTRL1	/;"	d	file:
RTC_RV3029_CTRL1_EERE	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CTRL1_EERE	/;"	d	file:
RTC_RV3029_CTRLS_EEBUSY	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CTRLS_EEBUSY	/;"	d	file:
RTC_RV3029_CTRL_RESET	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CTRL_RESET	/;"	d	file:
RTC_RV3029_CTRL_STATUS	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CTRL_STATUS	/;"	d	file:
RTC_RV3029_CTRL_SYS_R	drivers/rtc/rv3029.c	/^#define RTC_RV3029_CTRL_SYS_R	/;"	d	file:
RTC_RV3029_EEPROM_CTRL	drivers/rtc/rv3029.c	/^#define RTC_RV3029_EEPROM_CTRL	/;"	d	file:
RTC_RV3029_PAGE_LEN	drivers/rtc/rv3029.c	/^#define RTC_RV3029_PAGE_LEN	/;"	d	file:
RTC_RV3029_TRICKLE_1K	drivers/rtc/rv3029.c	/^#define RTC_RV3029_TRICKLE_1K	/;"	d	file:
RTC_RV3029_TRICKLE_20K	drivers/rtc/rv3029.c	/^#define RTC_RV3029_TRICKLE_20K	/;"	d	file:
RTC_RV3029_TRICKLE_5K	drivers/rtc/rv3029.c	/^#define RTC_RV3029_TRICKLE_5K	/;"	d	file:
RTC_RV3029_TRICKLE_80K	drivers/rtc/rv3029.c	/^#define RTC_RV3029_TRICKLE_80K	/;"	d	file:
RTC_SEC	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	RTC_SEC	/;"	d
RTC_SEC	drivers/rtc/m41t60.c	/^#define RTC_SEC	/;"	d	file:
RTC_SECONDS	drivers/rtc/ds1306.c	/^#define	RTC_SECONDS	/;"	d	file:
RTC_SECONDS	drivers/rtc/ds1556.c	/^#define RTC_SECONDS	/;"	d	file:
RTC_SECONDS	drivers/rtc/ds164x.c	/^#define RTC_SECONDS	/;"	d	file:
RTC_SECONDS	drivers/rtc/ds174x.c	/^#define RTC_SECONDS	/;"	d	file:
RTC_SECONDS	drivers/rtc/mc146818.c	/^#define RTC_SECONDS	/;"	d	file:
RTC_SECONDS	include/linux/mc146818rtc.h	/^#define RTC_SECONDS /;"	d
RTC_SECONDS	include/mk48t59.h	/^#define RTC_SECONDS /;"	d
RTC_SECONDS_ALARM	drivers/rtc/mc146818.c	/^#define RTC_SECONDS_ALARM	/;"	d	file:
RTC_SECONDS_ALARM	include/linux/mc146818rtc.h	/^#define RTC_SECONDS_ALARM /;"	d
RTC_SECONDS_ALARM0	drivers/rtc/ds1306.c	/^#define	RTC_SECONDS_ALARM0	/;"	d	file:
RTC_SECONDS_ALARM1	drivers/rtc/ds1306.c	/^#define	RTC_SECONDS_ALARM1	/;"	d	file:
RTC_SECONDS_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_SECONDS_COUNT_MASK	/;"	d
RTC_SECONDS_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_SECONDS_COUNT_OFFSET	/;"	d
RTC_SECONDS_SECONDS	arch/m68k/include/asm/rtc.h	/^#define RTC_SECONDS_SECONDS(/;"	d
RTC_SEC_ADDR	drivers/rtc/m41t11.c	/^#define RTC_SEC_ADDR /;"	d	file:
RTC_SEC_BIT_CH	drivers/rtc/ds1307.c	/^#define RTC_SEC_BIT_CH	/;"	d	file:
RTC_SEC_BIT_CH	drivers/rtc/pt7c4338.c	/^#define RTC_SEC_BIT_CH	/;"	d	file:
RTC_SEC_P	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define RTC_SEC_P	/;"	d
RTC_SEC_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_SEC_REG_ADDR	/;"	d	file:
RTC_SEC_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_SEC_REG_ADDR	/;"	d	file:
RTC_SEC_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_SEC_REG_ADDR	/;"	d	file:
RTC_SEC_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_SEC_REG_ADDR	/;"	d	file:
RTC_SEC_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_SEC_REG_ADDR /;"	d	file:
RTC_SEC_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_SEC_REG_ADDR	/;"	d	file:
RTC_SET	drivers/rtc/mpc5xxx.c	/^#define	RTC_SET	/;"	d	file:
RTC_SET	include/linux/mc146818rtc.h	/^# define RTC_SET /;"	d
RTC_SQWE	include/linux/mc146818rtc.h	/^# define RTC_SQWE /;"	d
RTC_SR_ADDR	drivers/rtc/ds1374.c	/^#define RTC_SR_ADDR	/;"	d	file:
RTC_SR_BIT_AF	drivers/rtc/ds1374.c	/^#define RTC_SR_BIT_AF	/;"	d	file:
RTC_SR_BIT_OSF	drivers/rtc/ds1374.c	/^#define RTC_SR_BIT_OSF	/;"	d	file:
RTC_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define RTC_STAT /;"	d
RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define RTC_STAT /;"	d
RTC_STATE_BUSY	arch/arm/include/asm/davinci_rtc.h	/^#define RTC_STATE_BUSY	/;"	d
RTC_STATE_RUN	arch/arm/include/asm/davinci_rtc.h	/^#define RTC_STATE_RUN	/;"	d
RTC_STATUS	drivers/rtc/ds1306.c	/^#define	RTC_STATUS	/;"	d	file:
RTC_STAT_ALARM_PRESENT	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_ALARM_PRESENT	/;"	d
RTC_STAT_BIT_A1F	drivers/rtc/ds1337.c	/^#define RTC_STAT_BIT_A1F	/;"	d	file:
RTC_STAT_BIT_A1F	drivers/rtc/ds3231.c	/^#define RTC_STAT_BIT_A1F	/;"	d	file:
RTC_STAT_BIT_A2F	drivers/rtc/ds1337.c	/^#define RTC_STAT_BIT_A2F	/;"	d	file:
RTC_STAT_BIT_A2F	drivers/rtc/ds3231.c	/^#define RTC_STAT_BIT_A2F	/;"	d	file:
RTC_STAT_BIT_ALM	drivers/rtc/isl1208.c	/^#define RTC_STAT_BIT_ALM	/;"	d	file:
RTC_STAT_BIT_ARST	drivers/rtc/isl1208.c	/^#define RTC_STAT_BIT_ARST	/;"	d	file:
RTC_STAT_BIT_BAT	drivers/rtc/isl1208.c	/^#define RTC_STAT_BIT_BAT	/;"	d	file:
RTC_STAT_BIT_BB32KHZ	drivers/rtc/ds3231.c	/^#define RTC_STAT_BIT_BB32KHZ	/;"	d	file:
RTC_STAT_BIT_EN32KHZ	drivers/rtc/ds3231.c	/^#define RTC_STAT_BIT_EN32KHZ	/;"	d	file:
RTC_STAT_BIT_OSF	drivers/rtc/ds1337.c	/^#define RTC_STAT_BIT_OSF	/;"	d	file:
RTC_STAT_BIT_OSF	drivers/rtc/ds3231.c	/^#define RTC_STAT_BIT_OSF	/;"	d	file:
RTC_STAT_BIT_RTCF	drivers/rtc/isl1208.c	/^#define RTC_STAT_BIT_RTCF	/;"	d	file:
RTC_STAT_BIT_WRTC	drivers/rtc/isl1208.c	/^#define RTC_STAT_BIT_WRTC	/;"	d	file:
RTC_STAT_BIT_XTOSCB	drivers/rtc/isl1208.c	/^#define RTC_STAT_BIT_XTOSCB	/;"	d	file:
RTC_STAT_NEW_REGS_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_NEW_REGS_MASK	/;"	d
RTC_STAT_NEW_REGS_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_NEW_REGS_OFFSET	/;"	d
RTC_STAT_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_STAT_REG_ADDR	/;"	d	file:
RTC_STAT_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_STAT_REG_ADDR	/;"	d	file:
RTC_STAT_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_STAT_REG_ADDR	/;"	d	file:
RTC_STAT_RTC_PRESENT	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_RTC_PRESENT	/;"	d
RTC_STAT_STALE_REGS_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_STALE_REGS_MASK	/;"	d
RTC_STAT_STALE_REGS_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_STALE_REGS_OFFSET	/;"	d
RTC_STAT_WATCHDOG_PRESENT	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_WATCHDOG_PRESENT	/;"	d
RTC_STAT_XTAL32000_PRESENT	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_XTAL32000_PRESENT	/;"	d
RTC_STAT_XTAL32768_PRESENT	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_STAT_XTAL32768_PRESENT	/;"	d
RTC_STPWCH_CNT	arch/m68k/include/asm/rtc.h	/^#define RTC_STPWCH_CNT(/;"	d
RTC_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  RTC_STS	/;"	d
RTC_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   RTC_STS	/;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define RTC_SWCNT /;"	d
RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define RTC_SWCNT /;"	d
RTC_TCS_DS_ADDR	drivers/rtc/ds1374.c	/^#define RTC_TCS_DS_ADDR	/;"	d	file:
RTC_TC_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_TC_REG_ADDR	/;"	d	file:
RTC_TOD_CNT_BYTE0_ADDR	drivers/rtc/ds1374.c	/^#define RTC_TOD_CNT_BYTE0_ADDR	/;"	d	file:
RTC_TOD_CNT_BYTE1_ADDR	drivers/rtc/ds1374.c	/^#define RTC_TOD_CNT_BYTE1_ADDR	/;"	d	file:
RTC_TOD_CNT_BYTE2_ADDR	drivers/rtc/ds1374.c	/^#define RTC_TOD_CNT_BYTE2_ADDR	/;"	d	file:
RTC_TOD_CNT_BYTE3_ADDR	drivers/rtc/ds1374.c	/^#define RTC_TOD_CNT_BYTE3_ADDR	/;"	d	file:
RTC_TRICKLE_CHARGER	drivers/rtc/ds1306.c	/^#define	RTC_TRICKLE_CHARGER	/;"	d	file:
RTC_UF	include/linux/mc146818rtc.h	/^# define RTC_UF /;"	d
RTC_UIE	include/linux/mc146818rtc.h	/^# define RTC_UIE /;"	d
RTC_UIP	include/linux/mc146818rtc.h	/^# define RTC_UIP /;"	d
RTC_USER_RAM_BASE	drivers/rtc/ds1306.c	/^#define	RTC_USER_RAM_BASE	/;"	d	file:
RTC_VALID	include/linux/mc146818rtc.h	/^#define RTC_VALID /;"	d
RTC_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_VERSION_MAJOR_MASK	/;"	d
RTC_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_VERSION_MAJOR_OFFSET	/;"	d
RTC_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_VERSION_MINOR_MASK	/;"	d
RTC_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_VERSION_MINOR_OFFSET	/;"	d
RTC_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_VERSION_STEP_MASK	/;"	d
RTC_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_VERSION_STEP_OFFSET	/;"	d
RTC_VRT	include/linux/mc146818rtc.h	/^# define RTC_VRT /;"	d
RTC_WATCHDOG	include/mk48t59.h	/^#define RTC_WATCHDOG	/;"	d
RTC_WATCHDOG_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_WATCHDOG_COUNT_MASK	/;"	d
RTC_WATCHDOG_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define	RTC_WATCHDOG_COUNT_OFFSET	/;"	d
RTC_WDS	include/mk48t59.h	/^#define RTC_WDS	/;"	d
RTC_WD_ALM_CNT_BYTE0_ADDR	drivers/rtc/ds1374.c	/^#define RTC_WD_ALM_CNT_BYTE0_ADDR	/;"	d	file:
RTC_WD_ALM_CNT_BYTE1_ADDR	drivers/rtc/ds1374.c	/^#define RTC_WD_ALM_CNT_BYTE1_ADDR	/;"	d	file:
RTC_WD_ALM_CNT_BYTE2_ADDR	drivers/rtc/ds1374.c	/^#define RTC_WD_ALM_CNT_BYTE2_ADDR	/;"	d	file:
RTC_WD_RB_1	include/mk48t59.h	/^#define RTC_WD_RB_1	/;"	d
RTC_WD_RB_16TH	include/mk48t59.h	/^#define RTC_WD_RB_16TH	/;"	d
RTC_WD_RB_4	include/mk48t59.h	/^#define RTC_WD_RB_4	/;"	d
RTC_WD_RB_4TH	include/mk48t59.h	/^#define RTC_WD_RB_4TH	/;"	d
RTC_WRITE_REG	drivers/rtc/pl031.c	/^#define	RTC_WRITE_REG(/;"	d	file:
RTC_YEAR	drivers/rtc/ds1306.c	/^#define	RTC_YEAR	/;"	d	file:
RTC_YEAR	drivers/rtc/ds1556.c	/^#define RTC_YEAR	/;"	d	file:
RTC_YEAR	drivers/rtc/ds164x.c	/^#define RTC_YEAR	/;"	d	file:
RTC_YEAR	drivers/rtc/ds174x.c	/^#define RTC_YEAR	/;"	d	file:
RTC_YEAR	drivers/rtc/m41t60.c	/^#define RTC_YEAR	/;"	d	file:
RTC_YEAR	drivers/rtc/mc146818.c	/^#define RTC_YEAR	/;"	d	file:
RTC_YEAR	include/linux/mc146818rtc.h	/^#define RTC_YEAR /;"	d
RTC_YEAR	include/mk48t59.h	/^#define RTC_YEAR /;"	d
RTC_YEARS_ADDR	drivers/rtc/m41t11.c	/^#define RTC_YEARS_ADDR /;"	d	file:
RTC_YR_REG_ADDR	drivers/rtc/ds1307.c	/^#define RTC_YR_REG_ADDR	/;"	d	file:
RTC_YR_REG_ADDR	drivers/rtc/ds1337.c	/^#define RTC_YR_REG_ADDR	/;"	d	file:
RTC_YR_REG_ADDR	drivers/rtc/ds3231.c	/^#define RTC_YR_REG_ADDR	/;"	d	file:
RTC_YR_REG_ADDR	drivers/rtc/isl1208.c	/^#define RTC_YR_REG_ADDR	/;"	d	file:
RTC_YR_REG_ADDR	drivers/rtc/pt7c4338.c	/^#define RTC_YR_REG_ADDR /;"	d	file:
RTC_YR_REG_ADDR	drivers/rtc/rx8025.c	/^#define RTC_YR_REG_ADDR	/;"	d	file:
RTFRQMAX_DISABLE	include/fsl_sec.h	/^#define RTFRQMAX_DISABLE /;"	d
RTIC_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define RTIC_BASE_ADDR	/;"	d
RTIC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RTIC_BASE_ADDR	/;"	d
RTL8139	drivers/net/Kconfig	/^config RTL8139$/;"	c
RTL8139_registers	drivers/net/rtl8139.c	/^enum RTL8139_registers {$/;"	g	file:
RTL8152_AGG_BUF_SZ	drivers/usb/eth/r8152.h	/^#define RTL8152_AGG_BUF_SZ	/;"	d
RTL8152_ETH_FRAME_LEN	drivers/usb/eth/r8152.h	/^#define RTL8152_ETH_FRAME_LEN	/;"	d
RTL8152_MAX_RX	drivers/usb/eth/r8152.h	/^#define RTL8152_MAX_RX	/;"	d
RTL8152_MAX_TX	drivers/usb/eth/r8152.h	/^#define RTL8152_MAX_TX	/;"	d
RTL8152_REQT_READ	drivers/usb/eth/r8152.h	/^#define RTL8152_REQT_READ	/;"	d
RTL8152_REQT_WRITE	drivers/usb/eth/r8152.h	/^#define RTL8152_REQT_WRITE	/;"	d
RTL8152_REQ_GET_REGS	drivers/usb/eth/r8152.h	/^#define RTL8152_REQ_GET_REGS	/;"	d
RTL8152_REQ_SET_REGS	drivers/usb/eth/r8152.h	/^#define RTL8152_REQ_SET_REGS	/;"	d
RTL8152_RMS	drivers/usb/eth/r8152.h	/^#define RTL8152_RMS	/;"	d
RTL8152_TX_TIMEOUT	drivers/usb/eth/r8152.h	/^#define RTL8152_TX_TIMEOUT	/;"	d
RTL8153_RMS	drivers/usb/eth/r8152.h	/^#define RTL8153_RMS	/;"	d
RTL8169	drivers/net/Kconfig	/^config RTL8169$/;"	c
RTL8169_ALIGN	drivers/net/rtl8169.c	/^#  define RTL8169_ALIGN /;"	d	file:
RTL8169_DESC_SIZE	drivers/net/rtl8169.c	/^#define RTL8169_DESC_SIZE /;"	d	file:
RTL8169_register_content	drivers/net/rtl8169.c	/^enum RTL8169_register_content {$/;"	g	file:
RTL8169_registers	drivers/net/rtl8169.c	/^enum RTL8169_registers {$/;"	g	file:
RTL8211B_driver	drivers/net/phy/realtek.c	/^static struct phy_driver RTL8211B_driver = {$/;"	v	typeref:struct:phy_driver	file:
RTL8211DN_driver	drivers/net/phy/realtek.c	/^static struct phy_driver RTL8211DN_driver = {$/;"	v	typeref:struct:phy_driver	file:
RTL8211E_driver	drivers/net/phy/realtek.c	/^static struct phy_driver RTL8211E_driver = {$/;"	v	typeref:struct:phy_driver	file:
RTL8211F_driver	drivers/net/phy/realtek.c	/^static struct phy_driver RTL8211F_driver = {$/;"	v	typeref:struct:phy_driver	file:
RTL8211X_PHY_FORCE_MASTER	drivers/net/Kconfig	/^config RTL8211X_PHY_FORCE_MASTER$/;"	c
RTL_MIN_IO_SIZE	drivers/net/rtl8169.c	/^#define RTL_MIN_IO_SIZE /;"	d	file:
RTL_R16	drivers/net/rtl8169.c	/^#define RTL_R16(/;"	d	file:
RTL_R32	drivers/net/rtl8169.c	/^#define RTL_R32(/;"	d	file:
RTL_R8	drivers/net/rtl8169.c	/^#define RTL_R8(/;"	d	file:
RTL_TIMEOUT	drivers/net/rtl8139.c	/^#define RTL_TIMEOUT	/;"	d	file:
RTL_VER_01	drivers/usb/eth/r8152.h	/^	RTL_VER_01,$/;"	e	enum:rtl_version
RTL_VER_02	drivers/usb/eth/r8152.h	/^	RTL_VER_02,$/;"	e	enum:rtl_version
RTL_VER_03	drivers/usb/eth/r8152.h	/^	RTL_VER_03,$/;"	e	enum:rtl_version
RTL_VER_04	drivers/usb/eth/r8152.h	/^	RTL_VER_04,$/;"	e	enum:rtl_version
RTL_VER_05	drivers/usb/eth/r8152.h	/^	RTL_VER_05,$/;"	e	enum:rtl_version
RTL_VER_06	drivers/usb/eth/r8152.h	/^	RTL_VER_06,$/;"	e	enum:rtl_version
RTL_VER_07	drivers/usb/eth/r8152.h	/^	RTL_VER_07,$/;"	e	enum:rtl_version
RTL_VER_MAX	drivers/usb/eth/r8152.h	/^	RTL_VER_MAX$/;"	e	enum:rtl_version
RTL_VER_UNKNOWN	drivers/usb/eth/r8152.h	/^	RTL_VER_UNKNOWN = 0,$/;"	e	enum:rtl_version
RTL_W16	drivers/net/rtl8169.c	/^#define RTL_W16(/;"	d	file:
RTL_W32	drivers/net/rtl8169.c	/^#define RTL_W32(/;"	d	file:
RTL_W8	drivers/net/rtl8169.c	/^#define RTL_W8(/;"	d	file:
RTMCTL_PRGM	include/fsl_sec.h	/^#define RTMCTL_PRGM /;"	d
RTMCTL_SAMP_MODE_INVALID	include/fsl_sec.h	/^#define RTMCTL_SAMP_MODE_INVALID /;"	d
RTMCTL_SAMP_MODE_RAW_ES_SC	include/fsl_sec.h	/^#define RTMCTL_SAMP_MODE_RAW_ES_SC /;"	d
RTMCTL_SAMP_MODE_VON_NEUMANN_ES_RAW_SC	include/fsl_sec.h	/^#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_RAW_SC /;"	d
RTMCTL_SAMP_MODE_VON_NEUMANN_ES_SC	include/fsl_sec.h	/^#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_SC /;"	d
RTOR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RTOR(/;"	d
RTOR_CLK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RTOR_CLK /;"	d
RTOR_EN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RTOR_EN /;"	d
RTOR_PSC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define RTOR_PSC /;"	d
RTOUT	drivers/mmc/mmc_spi.c	/^#define RTOUT /;"	d	file:
RTPORT	drivers/usb/host/r8a66597.h	/^#define	RTPORT	/;"	d
RTRATE	drivers/net/sh_eth.h	/^	RTRATE,$/;"	e	enum:__anon5ef54f5a0103
RTR_EN	include/smsc_sio1007.h	/^#define RTR_EN	/;"	d
RTR_IOBASE_HIGH	include/smsc_sio1007.h	/^#define RTR_IOBASE_HIGH	/;"	d
RTR_IOBASE_LOW	include/smsc_sio1007.h	/^#define RTR_IOBASE_LOW	/;"	d
RTS0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,$/;"	e	enum:__anona307879b0103	file:
RTS0_N_TANS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,$/;"	e	enum:__anona3077f190103	file:
RTS0x_TANS_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS0x_TANS_GMARK,$/;"	e	enum:__anona307945e0103	file:
RTS0x_TANS_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS0x_TANS_IMARK,$/;"	e	enum:__anona307945e0103	file:
RTS1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,$/;"	e	enum:__anona307879b0103	file:
RTS1_N_TANS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,$/;"	e	enum:__anona3077f190103	file:
RTS1x_TANS_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS1x_TANS_GMARK,$/;"	e	enum:__anona307945e0103	file:
RTS1x_TANS_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS1x_TANS_IMARK,$/;"	e	enum:__anona307945e0103	file:
RTS3x_TANS_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS3x_TANS_MARK,$/;"	e	enum:__anona307945e0103	file:
RTS4n_TANS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS4n_TANS_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RTS4x_TANS_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS4x_TANS_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RTS4x_TANS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RTS4x_TANS_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RTSDCTL_ENT_DLY_MASK	include/fsl_sec.h	/^#define RTSDCTL_ENT_DLY_MASK /;"	d
RTSDCTL_ENT_DLY_MAX	include/fsl_sec.h	/^#define RTSDCTL_ENT_DLY_MAX	/;"	d
RTSDCTL_ENT_DLY_MIN	include/fsl_sec.h	/^#define RTSDCTL_ENT_DLY_MIN	/;"	d
RTSDCTL_ENT_DLY_SHIFT	include/fsl_sec.h	/^#define RTSDCTL_ENT_DLY_SHIFT /;"	d
RTSOFF_MASK	drivers/usb/host/xhci.h	/^#define	RTSOFF_MASK	/;"	d
RTSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR	/;"	d
RTSR	include/SA-1100.h	/^#define RTSR	/;"	d
RTSR_AL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_AL	/;"	d
RTSR_AL	include/SA-1100.h	/^#define RTSR_AL	/;"	d
RTSR_ALE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_ALE	/;"	d
RTSR_ALE	include/SA-1100.h	/^#define RTSR_ALE	/;"	d
RTSR_HZ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_HZ	/;"	d
RTSR_HZ	include/SA-1100.h	/^#define RTSR_HZ	/;"	d
RTSR_HZE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_HZE	/;"	d
RTSR_HZE	include/SA-1100.h	/^#define RTSR_HZE	/;"	d
RTSR_PIAL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_PIAL	/;"	d
RTSR_PIALE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_PIALE	/;"	d
RTSR_PICE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTSR_PICE	/;"	d
RTTR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RTTR	/;"	d
RTTR	include/SA-1100.h	/^#define RTTR	/;"	d
RTTR_C	include/SA-1100.h	/^#define RTTR_C	/;"	d
RTTR_D	include/SA-1100.h	/^#define RTTR_D	/;"	d
RTT_NOM_120OHM	board/gateworks/gw_ventana/gw_ventana_spl.c	/^#define RTT_NOM_120OHM /;"	d	file:
RTXBD	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^} RTXBD;$/;"	t	typeref:typename:volatile struct rtxbd	file:
RTXBD	arch/powerpc/cpu/mpc8260/ether_scc.c	/^} RTXBD;$/;"	t	typeref:typename:volatile struct CommonBufferDescriptor	file:
RTXBD	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^} RTXBD;$/;"	t	typeref:typename:volatile struct rtxbd	file:
RTXBD	arch/powerpc/cpu/mpc8xx/fec.c	/^} RTXBD;$/;"	t	typeref:typename:volatile struct CommonBufferDescriptor	file:
RTXBD	arch/powerpc/cpu/mpc8xx/scc.c	/^} RTXBD;$/;"	t	typeref:typename:volatile struct CommonBufferDescriptor	file:
RTXBD	post/cpu/mpc8xx/ether.c	/^} RTXBD;$/;"	t	typeref:typename:volatile struct CommonBufferDescriptor	file:
RT_AXI_A128TO64SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_A128TO64SLVDMSCR	/;"	d
RT_AXI_A64TO128CSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_A64TO128CSLVDMSCR	/;"	d
RT_AXI_A64TO128SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_A64TO128SLVDMSCR	/;"	d
RT_AXI_CBMDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_CBMDMSCR	/;"	d
RT_AXI_CBSSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_CBSSLVDMSCR	/;"	d
RT_AXI_DBDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_DBDMSCR	/;"	d
RT_AXI_DBGW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_DBGW_BASE	/;"	d
RT_AXI_DBG_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_DBG_BASE	/;"	d
RT_AXI_DBSSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_DBSSLVDMSCR	/;"	d
RT_AXI_RDMDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RDMDMSCR	/;"	d
RT_AXI_RDM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RDM_BASE	/;"	d
RT_AXI_RDSDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RDSDMSCR	/;"	d
RT_AXI_RDS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RDS_BASE	/;"	d
RT_AXI_RT2SYSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RT2SYSLVDMSCR	/;"	d
RT_AXI_RTAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RTAP1SLVDMSCR	/;"	d
RT_AXI_RTAP2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RTAP2SLVDMSCR	/;"	d
RT_AXI_RTAP3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RTAP3SLVDMSCR	/;"	d
RT_AXI_RTW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RTW_BASE	/;"	d
RT_AXI_RTX64TO128W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RTX64TO128W_BASE	/;"	d
RT_AXI_RTX64TO128_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RTX64TO128_BASE	/;"	d
RT_AXI_RT_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_RT_BASE	/;"	d
RT_AXI_SHXW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_SHXW_BASE	/;"	d
RT_AXI_SHX_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_SHX_BASE	/;"	d
RT_AXI_STPRO_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_STPRO_BASE	/;"	d
RT_AXI_STRDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_STRDMSCR	/;"	d
RT_AXI_SY2RTDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_SY2RTDMSCR	/;"	d
RT_AXI_SY2RT_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_SY2RT_BASE	/;"	d
RT_AXI_UTLBRSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RT_AXI_UTLBRSLVDMSCR	/;"	d
RUBIN_REG_SIZE	include/jffs2/compr_rubin.h	/^#define RUBIN_REG_SIZE /;"	d
RUC_ABORT	drivers/net/eepro100.c	/^#define RUC_ABORT	/;"	d	file:
RUC_ADDR_LOAD	drivers/net/eepro100.c	/^#define RUC_ADDR_LOAD	/;"	d	file:
RUC_NOP	drivers/net/eepro100.c	/^#define RUC_NOP	/;"	d	file:
RUC_RESUME	drivers/net/eepro100.c	/^#define RUC_RESUME	/;"	d	file:
RUC_RESUMENR	drivers/net/eepro100.c	/^#define RUC_RESUMENR	/;"	d	file:
RUC_START	drivers/net/eepro100.c	/^#define RUC_START	/;"	d	file:
RUNTEST	include/lattice.h	/^#define RUNTEST	/;"	d
RUN_BITS	lib/lz4.c	/^#define RUN_BITS /;"	d	file:
RUN_MASK	lib/lz4.c	/^#define RUN_MASK /;"	d	file:
RUT_IOCTRL_VAL	include/configs/rut.h	/^#define RUT_IOCTRL_VAL	/;"	d
RU_CMD_MASK	drivers/net/eepro100.c	/^#define RU_CMD_MASK	/;"	d	file:
RU_STATUS_IDLE	drivers/net/eepro100.c	/^#define RU_STATUS_IDLE	/;"	d	file:
RU_STATUS_MASK	drivers/net/eepro100.c	/^#define RU_STATUS_MASK	/;"	d	file:
RU_STATUS_NORES	drivers/net/eepro100.c	/^#define RU_STATUS_NORES	/;"	d	file:
RU_STATUS_NO_RBDS_NORES	drivers/net/eepro100.c	/^#define RU_STATUS_NO_RBDS_NORES /;"	d	file:
RU_STATUS_NO_RBDS_READY	drivers/net/eepro100.c	/^#define RU_STATUS_NO_RBDS_READY /;"	d	file:
RU_STATUS_NO_RBDS_SUS	drivers/net/eepro100.c	/^#define RU_STATUS_NO_RBDS_SUS	/;"	d	file:
RU_STATUS_READY	drivers/net/eepro100.c	/^#define RU_STATUS_READY	/;"	d	file:
RU_STATUS_SUS	drivers/net/eepro100.c	/^#define RU_STATUS_SUS	/;"	d	file:
RV100_MEM_HALF_MODE	include/radeon.h	/^#define RV100_MEM_HALF_MODE	/;"	d
RV3029C2_REG_HR_12_24	drivers/rtc/rv3029.c	/^#define RV3029C2_REG_HR_12_24 /;"	d	file:
RV3029C2_REG_HR_PM	drivers/rtc/rv3029.c	/^#define RV3029C2_REG_HR_PM /;"	d	file:
RV3029C2_W_DATE	drivers/rtc/rv3029.c	/^#define RV3029C2_W_DATE	/;"	d	file:
RV3029C2_W_DAYS	drivers/rtc/rv3029.c	/^#define RV3029C2_W_DAYS	/;"	d	file:
RV3029C2_W_HOURS	drivers/rtc/rv3029.c	/^#define RV3029C2_W_HOURS	/;"	d	file:
RV3029C2_W_MINUTES	drivers/rtc/rv3029.c	/^#define RV3029C2_W_MINUTES	/;"	d	file:
RV3029C2_W_MONTHS	drivers/rtc/rv3029.c	/^#define RV3029C2_W_MONTHS	/;"	d	file:
RV3029C2_W_SECONDS	drivers/rtc/rv3029.c	/^#define RV3029C2_W_SECONDS	/;"	d	file:
RV3029C2_W_YEARS	drivers/rtc/rv3029.c	/^#define RV3029C2_W_YEARS	/;"	d	file:
RVRSMODE	include/mc13892.h	/^#define RVRSMODE	/;"	d
RWDT0_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define RWDT0_BASE	/;"	d
RWDT1_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define RWDT1_BASE	/;"	d
RWDT_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define RWDT_BASE	/;"	d
RWDT_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define RWDT_BASE	/;"	d
RWDT_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	RWDT_BASE /;"	d
RWKAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RWKAR	/;"	d
RWKAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RWKAR	/;"	d
RWKCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RWKCNT	/;"	d
RWKCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RWKCNT	/;"	d
RWKE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RWKE	/;"	d
RWKS	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RWKS	/;"	d
RWR	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                       RWR /;"	d
RWSC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define RWSC(/;"	d
RWTCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define RWTCNT /;"	d
RWTCNT	arch/sh/include/asm/cpu_sh7723.h	/^#define RWTCNT /;"	d
RWTCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define RWTCNT /;"	d
RWTCNT_A	board/ms7722se/lowlevel_init.S	/^RWTCNT_A:	.long	RWTCNT$/;"	l
RWTCNT_A	board/renesas/MigoR/lowlevel_init.S	/^RWTCNT_A:	.long	RWTCNT$/;"	l
RWTCNT_A	board/renesas/ap325rxa/lowlevel_init.S	/^RWTCNT_A:	.long	RWTCNT$/;"	l
RWTCNT_A	board/renesas/r7780mp/lowlevel_init.S	/^RWTCNT_A:		.long	WTCNT$/;"	l
RWTCNT_D	board/ms7722se/lowlevel_init.S	/^RWTCNT_D:	.word	0x5A00$/;"	l
RWTCNT_D	board/renesas/MigoR/lowlevel_init.S	/^RWTCNT_D:	.word	0x5A00$/;"	l
RWTCNT_D	board/renesas/ap325rxa/lowlevel_init.S	/^RWTCNT_D:	.word	0x5a00$/;"	l
RWTCNT_D	board/renesas/r7780mp/lowlevel_init.S	/^RWTCNT_D:		.word	0x5A00$/;"	l
RWTCSR	arch/sh/include/asm/cpu_sh7722.h	/^#define RWTCSR /;"	d
RWTCSR	arch/sh/include/asm/cpu_sh7723.h	/^#define RWTCSR /;"	d
RWTCSR	arch/sh/include/asm/cpu_sh7724.h	/^#define RWTCSR /;"	d
RWTCSR_A	board/ms7722se/lowlevel_init.S	/^RWTCSR_A:	.long	RWTCSR$/;"	l
RWTCSR_A	board/renesas/MigoR/lowlevel_init.S	/^RWTCSR_A:	.long	RWTCSR$/;"	l
RWTCSR_A	board/renesas/ap325rxa/lowlevel_init.S	/^RWTCSR_A:	.long	RWTCSR$/;"	l
RWTCSR_A	board/renesas/ecovec/lowlevel_init.S	/^RWTCSR_A:	.long	RWTCSR$/;"	l
RWTCSR_D	board/renesas/ecovec/lowlevel_init.S	/^RWTCSR_D:	.long	0x0000A507$/;"	l
RWTCSR_D1	board/renesas/ap325rxa/lowlevel_init.S	/^RWTCSR_D1:	.word	0xa507$/;"	l
RWTCSR_D2	board/renesas/ap325rxa/lowlevel_init.S	/^RWTCSR_D2:	.word	0xa504$/;"	l
RWTCSR_D_1	board/ms7722se/lowlevel_init.S	/^RWTCSR_D_1:	.word	0xA507$/;"	l
RWTCSR_D_1	board/renesas/MigoR/lowlevel_init.S	/^RWTCSR_D_1:	.word	0xA507$/;"	l
RWTCSR_D_1	board/renesas/r7780mp/lowlevel_init.S	/^RWTCSR_D_1:		.word	0xA507$/;"	l
RWTCSR_D_2	board/ms7722se/lowlevel_init.S	/^RWTCSR_D_2:	.word	0xA507$/;"	l
RWTCSR_D_2	board/renesas/MigoR/lowlevel_init.S	/^RWTCSR_D_2:	.word	0xA504$/;"	l
RWTCSR_D_2	board/renesas/r7780mp/lowlevel_init.S	/^RWTCSR_D_2:		.word	0xA507$/;"	l
RWUPE	drivers/usb/host/r8a66597.h	/^#define	RWUPE	/;"	d
RW_I0	arch/sparc/include/asm/ptrace.h	/^#define RW_I0 /;"	d
RW_I0	arch/sparc/include/asm/stack.h	/^#define RW_I0	/;"	d
RW_I1	arch/sparc/include/asm/ptrace.h	/^#define RW_I1 /;"	d
RW_I1	arch/sparc/include/asm/stack.h	/^#define RW_I1	/;"	d
RW_I2	arch/sparc/include/asm/ptrace.h	/^#define RW_I2 /;"	d
RW_I2	arch/sparc/include/asm/stack.h	/^#define RW_I2	/;"	d
RW_I3	arch/sparc/include/asm/ptrace.h	/^#define RW_I3 /;"	d
RW_I3	arch/sparc/include/asm/stack.h	/^#define RW_I3	/;"	d
RW_I4	arch/sparc/include/asm/ptrace.h	/^#define RW_I4 /;"	d
RW_I4	arch/sparc/include/asm/stack.h	/^#define RW_I4	/;"	d
RW_I5	arch/sparc/include/asm/ptrace.h	/^#define RW_I5 /;"	d
RW_I5	arch/sparc/include/asm/stack.h	/^#define RW_I5	/;"	d
RW_I6	arch/sparc/include/asm/ptrace.h	/^#define RW_I6 /;"	d
RW_I6	arch/sparc/include/asm/stack.h	/^#define RW_I6	/;"	d
RW_I7	arch/sparc/include/asm/ptrace.h	/^#define RW_I7 /;"	d
RW_I7	arch/sparc/include/asm/stack.h	/^#define RW_I7	/;"	d
RW_L0	arch/sparc/include/asm/ptrace.h	/^#define RW_L0 /;"	d
RW_L0	arch/sparc/include/asm/stack.h	/^#define RW_L0	/;"	d
RW_L1	arch/sparc/include/asm/ptrace.h	/^#define RW_L1 /;"	d
RW_L1	arch/sparc/include/asm/stack.h	/^#define RW_L1	/;"	d
RW_L2	arch/sparc/include/asm/ptrace.h	/^#define RW_L2 /;"	d
RW_L2	arch/sparc/include/asm/stack.h	/^#define RW_L2	/;"	d
RW_L3	arch/sparc/include/asm/ptrace.h	/^#define RW_L3 /;"	d
RW_L3	arch/sparc/include/asm/stack.h	/^#define RW_L3	/;"	d
RW_L4	arch/sparc/include/asm/ptrace.h	/^#define RW_L4 /;"	d
RW_L4	arch/sparc/include/asm/stack.h	/^#define RW_L4	/;"	d
RW_L5	arch/sparc/include/asm/ptrace.h	/^#define RW_L5 /;"	d
RW_L5	arch/sparc/include/asm/stack.h	/^#define RW_L5	/;"	d
RW_L6	arch/sparc/include/asm/ptrace.h	/^#define RW_L6 /;"	d
RW_L6	arch/sparc/include/asm/stack.h	/^#define RW_L6	/;"	d
RW_L7	arch/sparc/include/asm/ptrace.h	/^#define RW_L7 /;"	d
RW_L7	arch/sparc/include/asm/stack.h	/^#define RW_L7	/;"	d
RW_LOAD	arch/sparc/include/asm/winmacro.h	/^#define RW_LOAD(/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/is1/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1 /;"	d
RW_MGR_ACTIVATE_0_AND_1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/is1/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1 /;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT1	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/is1/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2 /;"	d
RW_MGR_ACTIVATE_0_AND_1_WAIT2	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_0_AND_1_WAIT2	/;"	d
RW_MGR_ACTIVATE_1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/is1/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_ACTIVATE_1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1 /;"	d
RW_MGR_ACTIVATE_1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_ACTIVATE_1	/;"	d
RW_MGR_AC_ROM_WRITE_OFFSET	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_AC_ROM_WRITE_OFFSET	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/is1/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE /;"	d
RW_MGR_CLEAR_DQS_ENABLE	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_CLEAR_DQS_ENABLE	/;"	d
RW_MGR_GUARANTEED_READ	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ /;"	d
RW_MGR_GUARANTEED_READ	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_READ_CONT	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT /;"	d
RW_MGR_GUARANTEED_READ_CONT	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_READ_CONT	/;"	d
RW_MGR_GUARANTEED_WRITE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE /;"	d
RW_MGR_GUARANTEED_WRITE	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0 /;"	d
RW_MGR_GUARANTEED_WRITE_WAIT0	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT0	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1 /;"	d
RW_MGR_GUARANTEED_WRITE_WAIT1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT1	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2 /;"	d
RW_MGR_GUARANTEED_WRITE_WAIT2	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT2	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/is1/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3 /;"	d
RW_MGR_GUARANTEED_WRITE_WAIT3	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_GUARANTEED_WRITE_WAIT3	/;"	d
RW_MGR_IDLE	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/is1/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_IDLE /;"	d
RW_MGR_IDLE	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_IDLE	/;"	d
RW_MGR_IDLE_LOOP1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/is1/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1 /;"	d
RW_MGR_IDLE_LOOP1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP1	/;"	d
RW_MGR_IDLE_LOOP2	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/is1/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_IDLE_LOOP2	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2 /;"	d
RW_MGR_IDLE_LOOP2	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_IDLE_LOOP2	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/is1/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0 /;"	d
RW_MGR_INIT_RESET_0_CKE_0	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_0_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/is1/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0 /;"	d
RW_MGR_INIT_RESET_1_CKE_0	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_INIT_RESET_1_CKE_0	/;"	d
RW_MGR_INST_ROM_WRITE_OFFSET	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_INST_ROM_WRITE_OFFSET	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0 /;"	d
RW_MGR_LFSR_WR_RD_BANK_0	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA /;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DATA	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS /;"	d
RW_MGR_LFSR_WR_RD_BANK_0_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP /;"	d
RW_MGR_LFSR_WR_RD_BANK_0_NOP	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT /;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WAIT	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1 /;"	d
RW_MGR_LFSR_WR_RD_BANK_0_WL_1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0 /;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA /;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS /;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP /;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT /;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/is1/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1 /;"	d
RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING /;"	d
RW_MGR_MEM_ADDRESS_MIRRORING	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_ADDRESS_MIRRORING	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH /;"	d
RW_MGR_MEM_DATA_MASK_WIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DATA_WIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH /;"	d
RW_MGR_MEM_DATA_WIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_DATA_WIDTH	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS /;"	d
RW_MGR_MEM_DQ_PER_READ_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_READ_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS /;"	d
RW_MGR_MEM_DQ_PER_WRITE_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_DQ_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH /;"	d
RW_MGR_MEM_IF_READ_DQS_WIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_READ_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH /;"	d
RW_MGR_MEM_IF_WRITE_DQS_WIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM /;"	d
RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS /;"	d
RW_MGR_MEM_NUMBER_OF_RANKS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_NUMBER_OF_RANKS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS /;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/is1/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS /;"	d
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS	/;"	d
RW_MGR_MRS0_DLL_RESET	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET /;"	d
RW_MGR_MRS0_DLL_RESET	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR /;"	d
RW_MGR_MRS0_DLL_RESET_MIRR	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS0_DLL_RESET_MIRR	/;"	d
RW_MGR_MRS0_USER	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER /;"	d
RW_MGR_MRS0_USER	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER	/;"	d
RW_MGR_MRS0_USER_MIRR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS0_USER_MIRR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR /;"	d
RW_MGR_MRS0_USER_MIRR	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS0_USER_MIRR	/;"	d
RW_MGR_MRS1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS1 /;"	d
RW_MGR_MRS1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS1	/;"	d
RW_MGR_MRS1_MIRR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS1_MIRR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR /;"	d
RW_MGR_MRS1_MIRR	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS1_MIRR	/;"	d
RW_MGR_MRS2	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS2 /;"	d
RW_MGR_MRS2	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS2	/;"	d
RW_MGR_MRS2_MIRR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS2_MIRR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR /;"	d
RW_MGR_MRS2_MIRR	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS2_MIRR	/;"	d
RW_MGR_MRS3	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS3 /;"	d
RW_MGR_MRS3	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS3	/;"	d
RW_MGR_MRS3_MIRR	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/is1/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_MRS3_MIRR	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR /;"	d
RW_MGR_MRS3_MIRR	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_MRS3_MIRR	/;"	d
RW_MGR_NUM_DM_PER_WRITE_GROUP	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_NUM_DM_PER_WRITE_GROUP /;"	d
RW_MGR_NUM_DQS_PER_WRITE_GROUP	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_NUM_DQS_PER_WRITE_GROUP /;"	d
RW_MGR_NUM_TRUE_DM_PER_WRITE_GROUP	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_NUM_TRUE_DM_PER_WRITE_GROUP /;"	d
RW_MGR_ODT_MODE_OFF	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_ODT_MODE_OFF	/;"	d
RW_MGR_ODT_MODE_READ_WRITE	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_ODT_MODE_READ_WRITE	/;"	d
RW_MGR_PRECHARGE_ALL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/is1/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_PRECHARGE_ALL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL /;"	d
RW_MGR_PRECHARGE_ALL	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_PRECHARGE_ALL	/;"	d
RW_MGR_RANK_ALL	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_RANK_ALL	/;"	d
RW_MGR_RANK_NONE	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_RANK_NONE	/;"	d
RW_MGR_READ_B2B	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/is1/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_READ_B2B /;"	d
RW_MGR_READ_B2B	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_READ_B2B	/;"	d
RW_MGR_READ_B2B_WAIT1	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/is1/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT1	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1 /;"	d
RW_MGR_READ_B2B_WAIT1	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT1	/;"	d
RW_MGR_READ_B2B_WAIT2	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/is1/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_READ_B2B_WAIT2	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2 /;"	d
RW_MGR_READ_B2B_WAIT2	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_READ_B2B_WAIT2	/;"	d
RW_MGR_REFRESH_ALL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/is1/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_REFRESH_ALL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL /;"	d
RW_MGR_REFRESH_ALL	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_REFRESH_ALL	/;"	d
RW_MGR_RESET_READ_DATAPATH_OFFSET	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_RESET_READ_DATAPATH_OFFSET	/;"	d
RW_MGR_RETURN	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/is1/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RETURN	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_RETURN /;"	d
RW_MGR_RETURN	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_RETURN	/;"	d
RW_MGR_RUN_ALL_GROUPS_OFFSET	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_RUN_ALL_GROUPS_OFFSET	/;"	d
RW_MGR_RUN_SINGLE_GROUP_OFFSET	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_RUN_SINGLE_GROUP_OFFSET	/;"	d
RW_MGR_SET_CS_AND_ODT_MASK_OFFSET	drivers/ddr/altera/sequencer.h	/^#define RW_MGR_SET_CS_AND_ODT_MASK_OFFSET	/;"	d
RW_MGR_SGLE_READ	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/is1/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_SGLE_READ	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ /;"	d
RW_MGR_SGLE_READ	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_SGLE_READ	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/is1/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH /;"	d
RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH	/;"	d
RW_MGR_ZQCL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/denx/mcvevk/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/ebv/socrates/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/is1/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/sr1500/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_MGR_ZQCL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define RW_MGR_ZQCL /;"	d
RW_MGR_ZQCL	board/terasic/sockit/qts/sdram_config.h	/^#define RW_MGR_ZQCL	/;"	d
RW_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define RW_REGS_SZ	/;"	d
RW_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define RW_REGS_SZ /;"	d
RW_STORE	arch/sparc/include/asm/winmacro.h	/^#define RW_STORE(/;"	d
RX	drivers/net/macb.c	/^#define RX	/;"	d	file:
RX	drivers/usb/musb/musb_udc.c	/^	RX,$/;"	e	enum:ep0_state_enum	file:
RX0CP	drivers/net/davinci_emac.h	/^	dv_reg		RX0CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX0FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX0FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX0FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX0FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX0HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX0HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,$/;"	e	enum:__anona3077f190103	file:
RX0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona307835a0103	file:
RX0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX0_GMARK,$/;"	e	enum:__anona307945e0103	file:
RX0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX0_IMARK,$/;"	e	enum:__anona307945e0103	file:
RX0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,$/;"	e	enum:__anona3077f190103	file:
RX0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,$/;"	e	enum:__anona307879b0103	file:
RX1CP	drivers/net/davinci_emac.h	/^	dv_reg		RX1CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX1FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX1FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX1FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX1FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX1HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX1HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX1_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX1_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
RX1_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX1_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
RX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
RX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona307835a0103	file:
RX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
RX1_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,$/;"	e	enum:__anona3077f190103	file:
RX1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,$/;"	e	enum:__anona3077f190103	file:
RX1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,$/;"	e	enum:__anona307879b0103	file:
RX2CP	drivers/net/davinci_emac.h	/^	dv_reg		RX2CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX2FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX2FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX2FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX2FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX2HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX2HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX2_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX2_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
RX2_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX2_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
RX2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RX2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,$/;"	e	enum:__anona307879b0103	file:
RX2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX3CP	drivers/net/davinci_emac.h	/^	dv_reg		RX3CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX3FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX3FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX3FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX3FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX3HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX3HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RX3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RX3_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIFA5_RXD_B_MARK, RX3_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	TX3_MARK, DREQ1_MARK, RX3_MARK,$/;"	e	enum:__anona307879b0103	file:
RX4CP	drivers/net/davinci_emac.h	/^	dv_reg		RX4CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX4FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX4FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX4FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX4FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX4HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX4HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
RX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	RX4_B_MARK, SCIFA4_RXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
RX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	RX4_B_MARK, SCIFA4_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
RX4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX4_C_MARK,$/;"	e	enum:__anona307945e0103	file:
RX4_D	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define RX4_D	/;"	d	file:
RX5CP	drivers/net/davinci_emac.h	/^	dv_reg		RX5CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX5FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX5FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX5FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX5FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX5HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX5HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
RX5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	RX5_MARK,$/;"	e	enum:__anona307945e0103	file:
RX6CP	drivers/net/davinci_emac.h	/^	dv_reg		RX6CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX6FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX6FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX6FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX6FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX6HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX6HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX7CP	drivers/net/davinci_emac.h	/^	dv_reg		RX7CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX7FLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RX7FLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX7FREEBUFFER	drivers/net/davinci_emac.h	/^	dv_reg		RX7FREEBUFFER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RX7HDP	drivers/net/davinci_emac.h	/^	dv_reg		RX7HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXACTIVE	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define RXACTIVE	/;"	d
RXACTIVE	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define RXACTIVE	/;"	d
RXADDR_USED	drivers/net/macb.c	/^#define RXADDR_USED	/;"	d	file:
RXADDR_WRAP	drivers/net/macb.c	/^#define RXADDR_WRAP	/;"	d	file:
RXALIGNCODEERRORS	drivers/net/davinci_emac.h	/^	dv_reg		RXALIGNCODEERRORS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXAUI	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI,$/;"	e	enum:serdes_type
RXAUI_6_25_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI_6_25_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
RXAUI_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
RXAUI_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
RXAUI_SEQ_IDX	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI_SEQ_IDX,$/;"	e	enum:__anon525929f50503
RXAUI_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
RXAUI_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	RXAUI_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
RXAUI_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	RXAUI_UNIT_ID,$/;"	e	enum:unit_id
RXBCASTFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		RXBCASTFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXBD_BROADCAST	include/tsec.h	/^#define RXBD_BROADCAST	/;"	d
RXBD_CRCERR	include/tsec.h	/^#define RXBD_CRCERR	/;"	d
RXBD_EMPTY	include/tsec.h	/^#define RXBD_EMPTY	/;"	d
RXBD_FIRST	include/tsec.h	/^#define RXBD_FIRST	/;"	d
RXBD_INTERRUPT	include/tsec.h	/^#define RXBD_INTERRUPT	/;"	d
RXBD_LARGE	include/tsec.h	/^#define RXBD_LARGE	/;"	d
RXBD_LAST	include/tsec.h	/^#define RXBD_LAST	/;"	d
RXBD_MISS	include/tsec.h	/^#define RXBD_MISS	/;"	d
RXBD_MULTICAST	include/tsec.h	/^#define RXBD_MULTICAST	/;"	d
RXBD_NONOCTET	include/tsec.h	/^#define RXBD_NONOCTET	/;"	d
RXBD_OVERRUN	include/tsec.h	/^#define RXBD_OVERRUN	/;"	d
RXBD_RO1	include/tsec.h	/^#define RXBD_RO1	/;"	d
RXBD_SHORT	include/tsec.h	/^#define RXBD_SHORT	/;"	d
RXBD_STATS	include/tsec.h	/^#define RXBD_STATS	/;"	d
RXBD_TRUNCATED	include/tsec.h	/^#define RXBD_TRUNCATED	/;"	d
RXBD_WRAP	include/tsec.h	/^#define RXBD_WRAP	/;"	d
RXBOUND	drivers/net/ax88180.h	/^#define RXBOUND	/;"	d
RXBTHD0	drivers/net/ax88180.h	/^#define RXBTHD0	/;"	d
RXBTHD1	drivers/net/ax88180.h	/^#define RXBTHD1	/;"	d
RXBUFFEROFFSET	drivers/net/davinci_emac.h	/^	dv_reg		RXBUFFEROFFSET;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXBUFFER_START	drivers/net/ax88180.h	/^#define RXBUFFER_START	/;"	d
RXBUFF_PROTECT	drivers/net/ax88180.h	/^  #define RXBUFF_PROTECT	/;"	d
RXBUF_ADDR1_MATCH	drivers/net/macb.c	/^#define RXBUF_ADDR1_MATCH	/;"	d	file:
RXBUF_ADDR2_MATCH	drivers/net/macb.c	/^#define RXBUF_ADDR2_MATCH	/;"	d	file:
RXBUF_ADDR3_MATCH	drivers/net/macb.c	/^#define RXBUF_ADDR3_MATCH	/;"	d	file:
RXBUF_ADDR4_MATCH	drivers/net/macb.c	/^#define RXBUF_ADDR4_MATCH	/;"	d	file:
RXBUF_BASE_ADDR	drivers/net/bfin_mac.c	/^#define RXBUF_BASE_ADDR	/;"	d	file:
RXBUF_BROADCAST	drivers/net/macb.c	/^#define RXBUF_BROADCAST	/;"	d	file:
RXBUF_FRAME_END	drivers/net/macb.c	/^#define RXBUF_FRAME_END	/;"	d	file:
RXBUF_FRAME_START	drivers/net/macb.c	/^#define RXBUF_FRAME_START	/;"	d	file:
RXBUF_FRMLEN_MASK	drivers/net/macb.c	/^#define RXBUF_FRMLEN_MASK	/;"	d	file:
RXBUF_TYPEID_MATCH	drivers/net/macb.c	/^#define RXBUF_TYPEID_MATCH	/;"	d	file:
RXCFG	drivers/net/ax88180.h	/^#define RXCFG	/;"	d
RXCKS	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RXCKS	/;"	d
RXCLK_DLY_ENA_GMAC_DISABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RXCLK_DLY_ENA_GMAC_DISABLE	= 0,$/;"	e	enum:__anonbeb2b9771403
RXCLK_DLY_ENA_GMAC_ENABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RXCLK_DLY_ENA_GMAC_ENABLE,$/;"	e	enum:__anonbeb2b9771403
RXCLK_DLY_ENA_GMAC_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RXCLK_DLY_ENA_GMAC_MASK		= 1,$/;"	e	enum:__anonbeb2b9771403
RXCLK_DLY_ENA_GMAC_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	RXCLK_DLY_ENA_GMAC_SHIFT	= 0xf,$/;"	e	enum:__anonbeb2b9771403
RXCONTROL	drivers/net/davinci_emac.h	/^	dv_reg		RXCONTROL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXCR1_FILTER_MASK	drivers/net/ks8851_mll.h	/^#define RXCR1_FILTER_MASK	/;"	d
RXCR1_FRXQ	drivers/net/ks8851_mll.h	/^#define RXCR1_FRXQ	/;"	d
RXCR1_RXAE	drivers/net/ks8851_mll.h	/^#define RXCR1_RXAE	/;"	d
RXCR1_RXBE	drivers/net/ks8851_mll.h	/^#define RXCR1_RXBE	/;"	d
RXCR1_RXE	drivers/net/ks8851_mll.h	/^#define RXCR1_RXE	/;"	d
RXCR1_RXEFE	drivers/net/ks8851_mll.h	/^#define RXCR1_RXEFE	/;"	d
RXCR1_RXFCE	drivers/net/ks8851_mll.h	/^#define RXCR1_RXFCE	/;"	d
RXCR1_RXINVF	drivers/net/ks8851_mll.h	/^#define RXCR1_RXINVF	/;"	d
RXCR1_RXIPFCC	drivers/net/ks8851_mll.h	/^#define RXCR1_RXIPFCC	/;"	d
RXCR1_RXMAFMA	drivers/net/ks8851_mll.h	/^#define RXCR1_RXMAFMA	/;"	d
RXCR1_RXME	drivers/net/ks8851_mll.h	/^#define RXCR1_RXME	/;"	d
RXCR1_RXPAFMA	drivers/net/ks8851_mll.h	/^#define RXCR1_RXPAFMA	/;"	d
RXCR1_RXTCPFCC	drivers/net/ks8851_mll.h	/^#define RXCR1_RXTCPFCC	/;"	d
RXCR1_RXUDPFCC	drivers/net/ks8851_mll.h	/^#define RXCR1_RXUDPFCC	/;"	d
RXCR1_RXUE	drivers/net/ks8851_mll.h	/^#define RXCR1_RXUE	/;"	d
RXCR2_IUFFP	drivers/net/ks8851_mll.h	/^#define RXCR2_IUFFP	/;"	d
RXCR2_RXICMPFCC	drivers/net/ks8851_mll.h	/^#define RXCR2_RXICMPFCC	/;"	d
RXCR2_RXIUFCEZ	drivers/net/ks8851_mll.h	/^#define RXCR2_RXIUFCEZ	/;"	d
RXCR2_RXSAF	drivers/net/ks8851_mll.h	/^#define RXCR2_RXSAF	/;"	d
RXCR2_SRDBL_16B	drivers/net/ks8851_mll.h	/^#define RXCR2_SRDBL_16B	/;"	d
RXCR2_SRDBL_32B	drivers/net/ks8851_mll.h	/^#define RXCR2_SRDBL_32B	/;"	d
RXCR2_SRDBL_4B	drivers/net/ks8851_mll.h	/^#define RXCR2_SRDBL_4B	/;"	d
RXCR2_SRDBL_8B	drivers/net/ks8851_mll.h	/^#define RXCR2_SRDBL_8B	/;"	d
RXCR2_SRDBL_MASK	drivers/net/ks8851_mll.h	/^#define RXCR2_SRDBL_MASK	/;"	d
RXCR2_SRDBL_SHIFT	drivers/net/ks8851_mll.h	/^#define RXCR2_SRDBL_SHIFT	/;"	d
RXCR2_UDPLFE	drivers/net/ks8851_mll.h	/^#define RXCR2_UDPLFE	/;"	d
RXCRCCNT	drivers/net/ax88180.h	/^#define RXCRCCNT	/;"	d
RXCRCERRORS	drivers/net/davinci_emac.h	/^	dv_reg		RXCRCERRORS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXCRC_CHECK	drivers/net/ax88180.h	/^  #define RXCRC_CHECK	/;"	d
RXCTL_BA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_BA	/;"	d
RXCTL_BCRC	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_BCRC	/;"	d
RXCTL_IA0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_IA0	/;"	d
RXCTL_IA1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_IA1	/;"	d
RXCTL_IA2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_IA2	/;"	d
RXCTL_IA3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_IA3	/;"	d
RXCTL_IAHA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_IAHA	/;"	d
RXCTL_MA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_MA	/;"	d
RXCTL_PA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_PA	/;"	d
RXCTL_PAUSEA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_PAUSEA	/;"	d
RXCTL_RA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_RA	/;"	d
RXCTL_RCRCA	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_RCRCA	/;"	d
RXCTL_RXFCE0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_RXFCE0	/;"	d
RXCTL_RXFCE1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_RXFCE1	/;"	d
RXCTL_SRXON	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define RXCTL_SRXON	/;"	d
RXCURT	drivers/net/ax88180.h	/^#define RXCURT	/;"	d
RXDESC1_END_RING	drivers/net/calxedaxgmac.c	/^#define RXDESC1_END_RING	/;"	d	file:
RXDESC_CRC_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_CRC_ERR	/;"	d	file:
RXDESC_DA_FILTER_FAIL	drivers/net/calxedaxgmac.c	/^#define RXDESC_DA_FILTER_FAIL	/;"	d	file:
RXDESC_DESCRIPTOR_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_DESCRIPTOR_ERR	/;"	d	file:
RXDESC_ERROR_SUMMARY	drivers/net/calxedaxgmac.c	/^#define RXDESC_ERROR_SUMMARY	/;"	d	file:
RXDESC_EXT_STATUS	drivers/net/calxedaxgmac.c	/^#define RXDESC_EXT_STATUS	/;"	d	file:
RXDESC_FIRST_SEG	drivers/net/calxedaxgmac.c	/^#define RXDESC_FIRST_SEG	/;"	d	file:
RXDESC_FRAME_LEN_MASK	drivers/net/calxedaxgmac.c	/^#define RXDESC_FRAME_LEN_MASK	/;"	d	file:
RXDESC_FRAME_LEN_OFFSET	drivers/net/calxedaxgmac.c	/^#define RXDESC_FRAME_LEN_OFFSET	/;"	d	file:
RXDESC_FRAME_TYPE	drivers/net/calxedaxgmac.c	/^#define RXDESC_FRAME_TYPE	/;"	d	file:
RXDESC_GIANT_FRAME	drivers/net/calxedaxgmac.c	/^#define RXDESC_GIANT_FRAME	/;"	d	file:
RXDESC_IPV4_PACKET	drivers/net/calxedaxgmac.c	/^#define RXDESC_IPV4_PACKET	/;"	d	file:
RXDESC_IPV6_PACKET	drivers/net/calxedaxgmac.c	/^#define RXDESC_IPV6_PACKET	/;"	d	file:
RXDESC_IP_HEADER_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_IP_HEADER_ERR	/;"	d	file:
RXDESC_IP_PAYLOAD_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_IP_PAYLOAD_ERR	/;"	d	file:
RXDESC_IP_PAYLOAD_ICMP	drivers/net/calxedaxgmac.c	/^#define RXDESC_IP_PAYLOAD_ICMP	/;"	d	file:
RXDESC_IP_PAYLOAD_MASK	drivers/net/calxedaxgmac.c	/^#define RXDESC_IP_PAYLOAD_MASK	/;"	d	file:
RXDESC_IP_PAYLOAD_TCP	drivers/net/calxedaxgmac.c	/^#define RXDESC_IP_PAYLOAD_TCP	/;"	d	file:
RXDESC_IP_PAYLOAD_UDP	drivers/net/calxedaxgmac.c	/^#define RXDESC_IP_PAYLOAD_UDP	/;"	d	file:
RXDESC_LAST_SEG	drivers/net/calxedaxgmac.c	/^#define RXDESC_LAST_SEG	/;"	d	file:
RXDESC_LENGTH_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_LENGTH_ERR	/;"	d	file:
RXDESC_OVERFLOW_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_OVERFLOW_ERR	/;"	d	file:
RXDESC_PER_CACHELINE	drivers/net/fec_mxc.c	/^#define RXDESC_PER_CACHELINE /;"	d	file:
RXDESC_RX_ERR	drivers/net/calxedaxgmac.c	/^#define RXDESC_RX_ERR	/;"	d	file:
RXDESC_RX_WDOG	drivers/net/calxedaxgmac.c	/^#define RXDESC_RX_WDOG	/;"	d	file:
RXDESC_SA_FILTER_FAIL	drivers/net/calxedaxgmac.c	/^#define RXDESC_SA_FILTER_FAIL	/;"	d	file:
RXDESC_VLAN_FRAME	drivers/net/calxedaxgmac.c	/^#define RXDESC_VLAN_FRAME	/;"	d	file:
RXDMAERR	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RXDMAERR	/;"	d
RXDMAOVERRUNS	drivers/net/davinci_emac.h	/^	dv_reg		RXDMAOVERRUNS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXDSD_MASK	drivers/spi/rk_spi.h	/^	RXDSD_MASK	= 3,$/;"	e	enum:__anondde5bacc0103
RXDSD_SHIFT	drivers/spi/rk_spi.h	/^	RXDSD_SHIFT	= 14,	\/* Rxd Sample Delay, in cycles *\/$/;"	e	enum:__anondde5bacc0103
RXDV_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define RXDV_SPDWN_EN	/;"	d
RXDWA	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RXDWA	/;"	d
RXDY_GATED_EN	drivers/usb/eth/r8152.h	/^#define RXDY_GATED_EN	/;"	d
RXEN	drivers/net/ax88180.h	/^  #define RXEN	/;"	d
RXENABLE	drivers/net/calxedaxgmac.c	/^#define RXENABLE	/;"	d	file:
RXENABLE	drivers/net/designware.h	/^#define RXENABLE	/;"	d
RXFCR_NACK_EN_SHIFT	drivers/i2c/kona_i2c.c	/^#define RXFCR_NACK_EN_SHIFT	/;"	d	file:
RXFCR_OFFSET	drivers/i2c/kona_i2c.c	/^#define RXFCR_OFFSET	/;"	d	file:
RXFCR_READ_COUNT_SHIFT	drivers/i2c/kona_i2c.c	/^#define RXFCR_READ_COUNT_SHIFT	/;"	d	file:
RXFCTR_RXFCT_MASK	drivers/net/ks8851_mll.h	/^#define RXFCTR_RXFCT_MASK	/;"	d
RXFCTR_RXFCT_SHIFT	drivers/net/ks8851_mll.h	/^#define RXFCTR_RXFCT_SHIFT	/;"	d
RXFCTR_RXFC_GET	drivers/net/ks8851_mll.h	/^#define RXFCTR_RXFC_GET(/;"	d
RXFCTR_RXFC_MASK	drivers/net/ks8851_mll.h	/^#define RXFCTR_RXFC_MASK	/;"	d
RXFCTR_RXFC_SHIFT	drivers/net/ks8851_mll.h	/^#define RXFCTR_RXFC_SHIFT	/;"	d
RXFCTR_THRESHOLD_MASK	drivers/net/ks8851_mll.h	/^#define RXFCTR_THRESHOLD_MASK	/;"	d
RXFDPR_RXFPAI	drivers/net/ks8851_mll.h	/^#define RXFDPR_RXFPAI	/;"	d
RXFHBCR_CNT_MASK	drivers/net/ks8851_mll.h	/^#define RXFHBCR_CNT_MASK	/;"	d
RXFIFORDOUT_OFFSET	drivers/i2c/kona_i2c.c	/^#define RXFIFORDOUT_OFFSET	/;"	d	file:
RXFIFO_EMPTY	drivers/usb/eth/r8152.h	/^#define RXFIFO_EMPTY	/;"	d
RXFIFO_REG	drivers/net/smc91111.h	/^#define RXFIFO_REG	/;"	d
RXFIFO_REMPTY	drivers/net/smc91111.h	/^#define RXFIFO_REMPTY	/;"	d
RXFIFO_THR1_NORMAL	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR1_NORMAL	/;"	d
RXFIFO_THR1_OOB	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR1_OOB	/;"	d
RXFIFO_THR2_FULL	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR2_FULL	/;"	d
RXFIFO_THR2_HIGH	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR2_HIGH	/;"	d
RXFIFO_THR2_NORMAL	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR2_NORMAL	/;"	d
RXFIFO_THR2_OOB	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR2_OOB	/;"	d
RXFIFO_THR3_FULL	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR3_FULL	/;"	d
RXFIFO_THR3_HIGH	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR3_HIGH	/;"	d
RXFIFO_THR3_NORMAL	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR3_NORMAL	/;"	d
RXFIFO_THR3_OOB	drivers/usb/eth/r8152.h	/^#define RXFIFO_THR3_OOB	/;"	d
RXFILTER	drivers/net/ax88180.h	/^#define RXFILTER	/;"	d
RXFILTERCTRL_ACCEPTBROADCAST	drivers/net/lpc32xx_eth.c	/^#define RXFILTERCTRL_ACCEPTBROADCAST /;"	d	file:
RXFILTERCTRL_ACCEPTPERFECT	drivers/net/lpc32xx_eth.c	/^#define RXFILTERCTRL_ACCEPTPERFECT /;"	d	file:
RXFILTERED	drivers/net/davinci_emac.h	/^	dv_reg		RXFILTERED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXFILTERLOWTHRESH	drivers/net/davinci_emac.h	/^	dv_reg		RXFILTERLOWTHRESH;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXFLOW_EN	drivers/net/ax88180.h	/^  #define RXFLOW_EN	/;"	d
RXFLOW_ENABLE	drivers/net/ax88180.h	/^  #define RXFLOW_ENABLE	/;"	d
RXFRAGMENTS	drivers/net/davinci_emac.h	/^	dv_reg		RXFRAGMENTS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXFSHR_ERR	drivers/net/ks8851_mll.h	/^#define RXFSHR_ERR	/;"	d
RXFSHR_RXBF	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXBF	/;"	d
RXFSHR_RXCE	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXCE	/;"	d
RXFSHR_RXFT	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXFT	/;"	d
RXFSHR_RXFTL	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXFTL	/;"	d
RXFSHR_RXFV	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXFV	/;"	d
RXFSHR_RXICMPFCS	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXICMPFCS	/;"	d
RXFSHR_RXIPFCS	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXIPFCS	/;"	d
RXFSHR_RXMF	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXMF	/;"	d
RXFSHR_RXMR	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXMR	/;"	d
RXFSHR_RXRF	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXRF	/;"	d
RXFSHR_RXTCPFCS	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXTCPFCS	/;"	d
RXFSHR_RXUDPFCS	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXUDPFCS	/;"	d
RXFSHR_RXUF	drivers/net/ks8851_mll.h	/^#define RXFSHR_RXUF	/;"	d
RXFSINT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RXFSINT	/;"	d
RXFULTHD	drivers/net/ax88180.h	/^#define RXFULTHD	/;"	d
RXGOODFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		RXGOODFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXHIGHPRIO	drivers/net/designware.h	/^#define RXHIGHPRIO	/;"	d
RXH_DISCARD	include/linux/ethtool.h	/^#define	RXH_DISCARD	/;"	d
RXH_IP_DST	include/linux/ethtool.h	/^#define	RXH_IP_DST	/;"	d
RXH_IP_SRC	include/linux/ethtool.h	/^#define	RXH_IP_SRC	/;"	d
RXH_L2DA	include/linux/ethtool.h	/^#define	RXH_L2DA	/;"	d
RXH_L3_PROTO	include/linux/ethtool.h	/^#define	RXH_L3_PROTO	/;"	d
RXH_L4_B_0_1	include/linux/ethtool.h	/^#define	RXH_L4_B_0_1	/;"	d
RXH_L4_B_2_3	include/linux/ethtool.h	/^#define	RXH_L4_B_2_3	/;"	d
RXH_VLAN	include/linux/ethtool.h	/^#define	RXH_VLAN	/;"	d
RXIDVER	drivers/net/davinci_emac.h	/^	dv_reg		RXIDVER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXINDICATOR	drivers/net/ax88180.h	/^#define RXINDICATOR	/;"	d
RXINTMASKCLEAR	drivers/net/davinci_emac.h	/^	dv_reg		RXINTMASKCLEAR;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXINTMASKSET	drivers/net/davinci_emac.h	/^	dv_reg		RXINTMASKSET;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXINTSTATMASKED	drivers/net/davinci_emac.h	/^	dv_reg		RXINTSTATMASKED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXINTSTATRAW	drivers/net/davinci_emac.h	/^	dv_reg		RXINTSTATRAW;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXIPCRCCNT	drivers/net/ax88180.h	/^#define RXIPCRCCNT	/;"	d
RXJABBER	drivers/net/davinci_emac.h	/^	dv_reg		RXJABBER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXJUMBO_EN	drivers/net/ax88180.h	/^  #define RXJUMBO_EN	/;"	d
RXMAXLEN	drivers/net/davinci_emac.h	/^	dv_reg		RXMAXLEN;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXMBPENABLE	drivers/net/davinci_emac.h	/^	dv_reg		RXMBPENABLE;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXMCASTFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		RXMCASTFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXMOFOVERRUNS	drivers/net/davinci_emac.h	/^	dv_reg		RXMOFOVERRUNS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXOCTETS	drivers/net/davinci_emac.h	/^	dv_reg		RXOCTETS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXOFFSETCH0	arch/x86/cpu/quark/smc.h	/^#define RXOFFSETCH0	/;"	d
RXOVERSIZED	drivers/net/davinci_emac.h	/^	dv_reg		RXOVERSIZED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXPAUSE	drivers/net/davinci_emac.h	/^	dv_reg		RXPAUSE;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXPAUSEFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		RXPAUSEFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXPAUSE_DA_CHECK	drivers/net/ax88180.h	/^  #define RXPAUSE_DA_CHECK	/;"	d
RXPKTRDY	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RXPKTRDY	/;"	d
RXPKTRDY_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RXPKTRDY_R	/;"	d
RXQ	drivers/net/armada100_fec.h	/^#define RXQ	/;"	d
RXQCR_ADRFE	drivers/net/ks8851_mll.h	/^#define RXQCR_ADRFE	/;"	d
RXQCR_CMD_CNTL	drivers/net/ks8851_mll.h	/^#define RXQCR_CMD_CNTL	/;"	d
RXQCR_RRXEF	drivers/net/ks8851_mll.h	/^#define RXQCR_RRXEF	/;"	d
RXQCR_RXDBCTE	drivers/net/ks8851_mll.h	/^#define RXQCR_RXDBCTE	/;"	d
RXQCR_RXDBCTS	drivers/net/ks8851_mll.h	/^#define RXQCR_RXDBCTS	/;"	d
RXQCR_RXDTTE	drivers/net/ks8851_mll.h	/^#define RXQCR_RXDTTE	/;"	d
RXQCR_RXDTTS	drivers/net/ks8851_mll.h	/^#define RXQCR_RXDTTS	/;"	d
RXQCR_RXFCTE	drivers/net/ks8851_mll.h	/^#define RXQCR_RXFCTE	/;"	d
RXQCR_RXFCTS	drivers/net/ks8851_mll.h	/^#define RXQCR_RXFCTS	/;"	d
RXQCR_RXIPHTOE	drivers/net/ks8851_mll.h	/^#define RXQCR_RXIPHTOE	/;"	d
RXQCR_SDA	drivers/net/ks8851_mll.h	/^#define RXQCR_SDA	/;"	d
RXQOSFILTERED	drivers/net/davinci_emac.h	/^	dv_reg		RXQOSFILTERED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXS	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define RXS	/;"	d
RXSOFOVERRUNS	drivers/net/davinci_emac.h	/^	dv_reg		RXSOFOVERRUNS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXSTART	drivers/net/calxedaxgmac.c	/^#define RXSTART	/;"	d	file:
RXSTART	drivers/net/designware.h	/^#define RXSTART	/;"	d
RXTCPCRC_CHECK	drivers/net/ax88180.h	/^  #define RXTCPCRC_CHECK	/;"	d
RXTEARDOWN	drivers/net/davinci_emac.h	/^	dv_reg		RXTEARDOWN;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXTL	drivers/serial/serial_mxc.c	/^#define RXTL /;"	d	file:
RXUNDERSIZED	drivers/net/davinci_emac.h	/^	dv_reg		RXUNDERSIZED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXUNICASTCLEAR	drivers/net/davinci_emac.h	/^	dv_reg		RXUNICASTCLEAR;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXUNICASTSET	drivers/net/davinci_emac.h	/^	dv_reg		RXUNICASTSET;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
RXUQ	drivers/net/mvgbe.h	/^#define RXUQ	/;"	d
RXZLP_EP	include/usb/fotg210.h	/^#define RXZLP_EP(/;"	d
RX_ACCEPT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ACCEPT	/;"	d
RX_ACT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                    RX_ACT /;"	d
RX_ACT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               RX_ACT_MASK /;"	d
RX_ADDR	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ADDR	/;"	d
RX_AGG_DISABLE	drivers/usb/eth/r8152.h	/^#define RX_AGG_DISABLE	/;"	d
RX_ALIGN	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ALIGN	/;"	d
RX_ALIGN	drivers/usb/eth/r8152.h	/^#define RX_ALIGN	/;"	d
RX_ALIGN_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ALIGN_CNT	/;"	d
RX_ALLF_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ALLF_CNT	/;"	d
RX_ALLOC_SIZE	drivers/net/uli526x.c	/^#define RX_ALLOC_SIZE	/;"	d	file:
RX_ALLO_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ALLO_CNT	/;"	d
RX_BASE	drivers/net/ax88180.h	/^  #define RX_BASE	/;"	d
RX_BCAST_FRAME	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_BCAST_FRAME /;"	d
RX_BD_AB	include/usb/mpc8xx_udc.h	/^#define RX_BD_AB	/;"	d
RX_BD_CF	drivers/net/ethoc.c	/^#define	RX_BD_CF	/;"	d	file:
RX_BD_CR	include/usb/mpc8xx_udc.h	/^#define RX_BD_CR	/;"	d
RX_BD_CRC	drivers/net/ethoc.c	/^#define	RX_BD_CRC	/;"	d	file:
RX_BD_DN	drivers/net/ethoc.c	/^#define	RX_BD_DN	/;"	d	file:
RX_BD_E	include/usb/mpc8xx_udc.h	/^#define RX_BD_E	/;"	d
RX_BD_EMPTY	drivers/net/ethoc.c	/^#define	RX_BD_EMPTY	/;"	d	file:
RX_BD_F	include/usb/mpc8xx_udc.h	/^#define RX_BD_F	/;"	d
RX_BD_I	include/usb/mpc8xx_udc.h	/^#define RX_BD_I	/;"	d
RX_BD_IRQ	drivers/net/ethoc.c	/^#define	RX_BD_IRQ	/;"	d	file:
RX_BD_IS	drivers/net/ethoc.c	/^#define	RX_BD_IS	/;"	d	file:
RX_BD_L	include/usb/mpc8xx_udc.h	/^#define RX_BD_L	/;"	d
RX_BD_LC	drivers/net/ethoc.c	/^#define	RX_BD_LC	/;"	d	file:
RX_BD_LEN	drivers/net/ethoc.c	/^#define	RX_BD_LEN(/;"	d	file:
RX_BD_MISS	drivers/net/ethoc.c	/^#define	RX_BD_MISS	/;"	d	file:
RX_BD_NO	include/usb/mpc8xx_udc.h	/^#define RX_BD_NO	/;"	d
RX_BD_OR	drivers/net/ethoc.c	/^#define	RX_BD_OR	/;"	d	file:
RX_BD_OV	include/usb/mpc8xx_udc.h	/^#define RX_BD_OV	/;"	d
RX_BD_PID_BITMASK	include/usb/mpc8xx_udc.h	/^#define RX_BD_PID_BITMASK /;"	d
RX_BD_PID_DATA0	include/usb/mpc8xx_udc.h	/^#define RX_BD_PID_DATA0	/;"	d
RX_BD_PID_DATA1	include/usb/mpc8xx_udc.h	/^#define RX_BD_PID_DATA1	/;"	d
RX_BD_PID_SETUP	include/usb/mpc8xx_udc.h	/^#define RX_BD_PID_SETUP	/;"	d
RX_BD_RING_SIZE	drivers/net/fm/fm.h	/^#define RX_BD_RING_SIZE	/;"	d
RX_BD_SF	drivers/net/ethoc.c	/^#define	RX_BD_SF	/;"	d	file:
RX_BD_STATS	drivers/net/ethoc.c	/^#define	RX_BD_STATS	/;"	d	file:
RX_BD_TL	drivers/net/ethoc.c	/^#define	RX_BD_TL	/;"	d	file:
RX_BD_W	include/usb/mpc8xx_udc.h	/^#define RX_BD_W	/;"	d
RX_BD_WRAP	drivers/net/ethoc.c	/^#define	RX_BD_WRAP	/;"	d	file:
RX_BROAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_BROAD	/;"	d
RX_BROADCAST	drivers/net/ax88180.h	/^  #define RX_BROADCAST	/;"	d
RX_BROADCAST_CNT	drivers/net/dnet.h	/^	u32 RX_BROADCAST_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_BROAD_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_BROAD_CNT	/;"	d
RX_BUF	drivers/net/zynq_gem.c	/^#define RX_BUF /;"	d	file:
RX_BUFFER_SIZE	drivers/net/mvneta.c	/^#define RX_BUFFER_SIZE	/;"	d	file:
RX_BUFFER_SIZE	drivers/net/mvpp2.c	/^#define RX_BUFFER_SIZE	/;"	d	file:
RX_BUFFER_SIZE	drivers/net/tsi108_eth.c	/^#define RX_BUFFER_SIZE	/;"	d	file:
RX_BUFFER_SIZE	drivers/spi/fsl_qspi.c	/^#define RX_BUFFER_SIZE	/;"	d	file:
RX_BUFF_LEN	drivers/net/keystone_net.c	/^#define RX_BUFF_LEN	/;"	d	file:
RX_BUFF_NUMS	drivers/net/keystone_net.c	/^#define RX_BUFF_NUMS	/;"	d	file:
RX_BUFF_SZ	drivers/net/dc2114x.c	/^#define RX_BUFF_SZ /;"	d	file:
RX_BUF_ALIGNE_SIZE	drivers/net/sh_eth.h	/^#define RX_BUF_ALIGNE_SIZE	/;"	d
RX_BUF_COUNT	drivers/net/lpc32xx_eth.c	/^#define RX_BUF_COUNT /;"	d	file:
RX_BUF_LEN	drivers/net/rtl8139.c	/^#define RX_BUF_LEN /;"	d	file:
RX_BUF_LEN	drivers/net/rtl8169.c	/^#define RX_BUF_LEN	/;"	d	file:
RX_BUF_LEN_IDX	drivers/net/rtl8139.c	/^#define RX_BUF_LEN_IDX /;"	d	file:
RX_BUF_NUM	drivers/net/bcm-sf2-eth.h	/^#define RX_BUF_NUM	/;"	d
RX_BUF_OFFSET	drivers/net/armada100_fec.h	/^#define RX_BUF_OFFSET	/;"	d
RX_BUF_OFFSET	drivers/net/mvgbe.h	/^#define RX_BUF_OFFSET	/;"	d
RX_BUF_SIZE	drivers/net/ax88180.h	/^  #define RX_BUF_SIZE	/;"	d
RX_BUF_SIZE	drivers/net/bcm-sf2-eth.h	/^#define RX_BUF_SIZE	/;"	d
RX_BUF_SIZE	drivers/net/ks8851_mll.c	/^#define RX_BUF_SIZE	/;"	d	file:
RX_BUF_SIZE	drivers/net/natsemi.c	/^#define RX_BUF_SIZE	/;"	d	file:
RX_BUF_SIZE	drivers/net/ns8382x.c	/^#define RX_BUF_SIZE /;"	d	file:
RX_BUF_SIZE	drivers/net/rtl8169.c	/^#define RX_BUF_SIZE	/;"	d	file:
RX_BUF_SZ	drivers/net/calxedaxgmac.c	/^#define RX_BUF_SZ	/;"	d	file:
RX_BYTE_CNT	drivers/net/dnet.h	/^	u32 RX_BYTE_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_CFG	drivers/net/smc911x.h	/^#define RX_CFG	/;"	d
RX_CFG_RXDOFF	drivers/net/smc911x.h	/^#define	RX_CFG_RXDOFF	/;"	d
RX_CFG_RX_DMA_CNT	drivers/net/smc911x.h	/^#define	RX_CFG_RX_DMA_CNT	/;"	d
RX_CFG_RX_DUMP	drivers/net/smc911x.h	/^#define	RX_CFG_RX_DUMP	/;"	d
RX_CFG_RX_END_ALGN	drivers/net/smc911x.h	/^#define	RX_CFG_RX_END_ALGN	/;"	d
RX_CFG_RX_END_ALGN16	drivers/net/smc911x.h	/^#define		RX_CFG_RX_END_ALGN16	/;"	d
RX_CFG_RX_END_ALGN32	drivers/net/smc911x.h	/^#define		RX_CFG_RX_END_ALGN32	/;"	d
RX_CFG_RX_END_ALGN4	drivers/net/smc911x.h	/^#define		RX_CFG_RX_END_ALGN4	/;"	d
RX_CHNL_CTRL	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_CHNL_CTRL,		\/* RX Channel Control *\/$/;"	e	enum:dmac_ctrl
RX_CHNL_STS	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_CHNL_STS,		\/* RX Status Register *\/$/;"	e	enum:dmac_ctrl
RX_CLK_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define RX_CLK_SHIFT	/;"	d
RX_CLS_FLOW_DISC	include/linux/ethtool.h	/^#define	RX_CLS_FLOW_DISC	/;"	d
RX_CNTRL_FRAME	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_CNTRL_FRAME /;"	d
RX_COLL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_COLL /;"	d
RX_COMP	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_COMP	/;"	d
RX_CONFIG_ABF	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_ABF	/;"	d	file:
RX_CONFIG_APE	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_APE	/;"	d	file:
RX_CONFIG_BFE	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_BFE	/;"	d	file:
RX_CONFIG_CHP	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_CHP	/;"	d	file:
RX_CONFIG_DEF_Q	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_DEF_Q	/;"	d	file:
RX_CONFIG_EMF	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_EMF	/;"	d	file:
RX_CONFIG_EUF	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_EUF	/;"	d	file:
RX_CONFIG_MFE	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_MFE	/;"	d	file:
RX_CONFIG_RST	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_RST	/;"	d	file:
RX_CONFIG_SE	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_SE	/;"	d	file:
RX_CONFIG_UFE	drivers/net/tsi108_eth.c	/^#define RX_CONFIG_UFE	/;"	d	file:
RX_COPY_SIZE	drivers/net/uli526x.c	/^#define RX_COPY_SIZE	/;"	d	file:
RX_COUNT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RX_COUNT	/;"	d
RX_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_CRC	/;"	d
RX_CRC_ERROR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_CRC_ERROR /;"	d
RX_CRC_ERR_CNT	drivers/net/dnet.h	/^	u32 RX_CRC_ERR_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_CTL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_CTL	/;"	d
RX_CTL_FRM_CNT	drivers/net/dnet.h	/^	u32 RX_CTL_FRM_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_CURBUF_ADDR	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_CURBUF_ADDR,		\/* RX Current Buffer Address *\/$/;"	e	enum:dmac_ctrl
RX_CURBUF_LENGTH	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_CURBUF_LENGTH,	\/* RX Current Buffer Length *\/$/;"	e	enum:dmac_ctrl
RX_CURDESC_PTR	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_CURDESC_PTR,		\/* RX Current Descriptor Pointer *\/$/;"	e	enum:dmac_ctrl
RX_DATA_FIFO	drivers/net/dnet.h	/^	u32 RX_DATA_FIFO;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_DATA_FIFO	drivers/net/smc911x.h	/^#define RX_DATA_FIFO	/;"	d
RX_DATA_READY	drivers/usb/gadget/at91_udc.c	/^#define	RX_DATA_READY	/;"	d	file:
RX_DAT_ZERO	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               RX_DAT_ZERO /;"	d
RX_DAT_ZERO_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          RX_DAT_ZERO_MASK /;"	d
RX_DESC_CNT	drivers/net/uli526x.c	/^#define RX_DESC_CNT	/;"	d	file:
RX_DESC_PADDING	drivers/net/sh_eth.h	/^#define RX_DESC_PADDING	/;"	d
RX_DIAGNOSTIC_ADDR_AI	drivers/net/tsi108_eth.c	/^#define RX_DIAGNOSTIC_ADDR_AI	/;"	d	file:
RX_DIAGNOSTIC_ADDR_DFR	drivers/net/tsi108_eth.c	/^#define RX_DIAGNOSTIC_ADDR_DFR	/;"	d	file:
RX_DIAGNOSTIC_ADDR_INDEX	drivers/net/tsi108_eth.c	/^#define RX_DIAGNOSTIC_ADDR_INDEX	/;"	d	file:
RX_DMAO	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_DMAO	/;"	d
RX_DMA_BURST	drivers/net/rtl8139.c	/^#define RX_DMA_BURST	/;"	d	file:
RX_DMA_BURST	drivers/net/rtl8169.c	/^#define RX_DMA_BURST	/;"	d	file:
RX_DMA_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_DMA_ENABLE /;"	d
RX_DP_CTRL	drivers/net/smc911x.h	/^#define RX_DP_CTRL	/;"	d
RX_DP_CTRL_FFWD_BUSY	drivers/net/smc911x.h	/^#define	RX_DP_CTRL_FFWD_BUSY	/;"	d
RX_DP_CTRL_RX_FFWD	drivers/net/smc911x.h	/^#define	RX_DP_CTRL_RX_FFWD	/;"	d
RX_DRIBBLING	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_DRIBBLING /;"	d
RX_DRIB_NIB_CNT	drivers/net/dnet.h	/^	u32 RX_DRIB_NIB_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_DRIVING_MASK	drivers/usb/eth/r8152.h	/^#define RX_DRIVING_MASK	/;"	d
RX_DROP	drivers/net/smc911x.h	/^#define RX_DROP	/;"	d
RX_END	drivers/net/ax88796.h	/^#define RX_END	/;"	d
RX_END	drivers/net/ne2000.h	/^#define RX_END	/;"	d
RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1	drivers/usb/gadget/f_fastboot.c	/^#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1 /;"	d	file:
RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0	drivers/usb/gadget/f_fastboot.c	/^#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0 /;"	d	file:
RX_EN_INT	drivers/net/armada100_fec.h	/^#define RX_EN_INT /;"	d
RX_EQ64_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_EQ64_CNT	/;"	d
RX_ERROR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_ERROR /;"	d
RX_ERROR	drivers/net/armada100_fec.h	/^#define RX_ERROR /;"	d
RX_ETHER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_ETHER /;"	d
RX_EXTENDED_STATUS	drivers/net/tsi108_eth.c	/^#define RX_EXTENDED_STATUS	/;"	d	file:
RX_EXTENDED_STATUS_DESCRIPTOR_INTERRUPT_CONDITION	drivers/net/tsi108_eth.c	/^#define RX_EXTENDED_STATUS_DESCRIPTOR_INTERRUPT_CONDITION	/;"	d	file:
RX_EXTENDED_STATUS_EOF	drivers/net/tsi108_eth.c	/^#define RX_EXTENDED_STATUS_EOF	/;"	d	file:
RX_EXTENDED_STATUS_EOQ	drivers/net/tsi108_eth.c	/^#define RX_EXTENDED_STATUS_EOQ	/;"	d	file:
RX_EXTENDED_STATUS_EOQ_0	drivers/net/tsi108_eth.c	/^#define RX_EXTENDED_STATUS_EOQ_0	/;"	d	file:
RX_EXTENDED_STATUS_ERROR_FLAG	drivers/net/tsi108_eth.c	/^#define RX_EXTENDED_STATUS_ERROR_FLAG	/;"	d	file:
RX_EXTRA	drivers/usb/gadget/ether.c	/^#define RX_EXTRA	/;"	d	file:
RX_FCS_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_FCS_CNT	/;"	d
RX_FIFO_COUNT_MASK	drivers/serial/serial_s5p.c	/^#define RX_FIFO_COUNT_MASK	/;"	d	file:
RX_FIFO_COUNT_SHIFT	drivers/serial/serial_s5p.c	/^#define RX_FIFO_COUNT_SHIFT	/;"	d	file:
RX_FIFO_FLUSH	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define RX_FIFO_FLUSH /;"	d
RX_FIFO_FULL	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              RX_FIFO_FULL /;"	d
RX_FIFO_FULL	drivers/serial/serial_s5p.c	/^#define RX_FIFO_FULL	/;"	d	file:
RX_FIFO_FULL_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         RX_FIFO_FULL_MASK /;"	d
RX_FIFO_INF	drivers/net/smc911x.h	/^#define RX_FIFO_INF	/;"	d
RX_FIFO_INF_RXDUSED	drivers/net/smc911x.h	/^#define	 RX_FIFO_INF_RXDUSED	/;"	d
RX_FIFO_INF_RXSUSED	drivers/net/smc911x.h	/^#define	 RX_FIFO_INF_RXSUSED	/;"	d
RX_FIFO_RDY	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               RX_FIFO_RDY /;"	d
RX_FIFO_RDY_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          RX_FIFO_RDY_MASK /;"	d
RX_FIFO_SIZE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define RX_FIFO_SIZE	/;"	d
RX_FIFO_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              RX_FIFO_STAT /;"	d
RX_FIFO_STAT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         RX_FIFO_STAT_MASK /;"	d
RX_FIFO_TH	drivers/net/dnet.h	/^	u32 RX_FIFO_TH;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_FIFO_THRESH	drivers/net/rtl8139.c	/^#define RX_FIFO_THRESH	/;"	d	file:
RX_FIFO_THRESH	drivers/net/rtl8169.c	/^#define RX_FIFO_THRESH	/;"	d	file:
RX_FIFO_WCNT	drivers/net/dnet.h	/^	u32 RX_FIFO_WCNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_FILTER_FAIL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_FILTER_FAIL /;"	d
RX_FIRST_DESC	drivers/net/armada100_fec.h	/^#define RX_FIRST_DESC /;"	d
RX_FIS_D2H_REG	include/ahci.h	/^#define RX_FIS_D2H_REG	/;"	d
RX_FRAG	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_FRAG	/;"	d
RX_FRAMES_CNT	drivers/net/dnet.h	/^	u32 RX_FRAMES_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_FRAME_LEN_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_FRAME_LEN_MASK /;"	d
RX_FRLEN	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_FRLEN	/;"	d
RX_GE1024_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_GE1024_CNT	/;"	d
RX_GET_DMA_BUFFER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_GET_DMA_BUFFER(/;"	d
RX_INIFINIT_LOOP_MODE	drivers/net/ax88180.h	/^#define RX_INIFINIT_LOOP_MODE	/;"	d
RX_IPG_VIOL_CNT	drivers/net/dnet.h	/^	u32 RX_IPG_VIOL_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_IRL_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_IRL_CNT	/;"	d
RX_IRQ_REG	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_IRQ_REG,		\/* RX Interrupt Register *\/$/;"	e	enum:dmac_ctrl
RX_LAST_DESC	drivers/net/armada100_fec.h	/^#define RX_LAST_DESC /;"	d
RX_LATE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LATE	/;"	d
RX_LEN	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LEN	/;"	d
RX_LEN_1	include/linux/mtd/st_smi.h	/^#define RX_LEN_1	/;"	d
RX_LEN_2	include/linux/mtd/st_smi.h	/^#define RX_LEN_2	/;"	d
RX_LEN_3	include/linux/mtd/st_smi.h	/^#define RX_LEN_3	/;"	d
RX_LEN_4	include/linux/mtd/st_smi.h	/^#define RX_LEN_4	/;"	d
RX_LEN_CHK_ERR_CNT	drivers/net/dnet.h	/^	u32 RX_LEN_CHK_ERR_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_LEN_ERROR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_LEN_ERROR /;"	d
RX_LEN_FIFO	drivers/net/dnet.h	/^	u32 RX_LEN_FIFO;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_LEN_MASK	drivers/usb/eth/r8152.h	/^#define RX_LEN_MASK	/;"	d
RX_LNG_FRM_CNT	drivers/net/dnet.h	/^	u32 RX_LNG_FRM_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_LONG	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LONG	/;"	d
RX_LONG_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LONG_CNT	/;"	d
RX_LOOPBACK_MODE	drivers/net/ax88180.h	/^#define RX_LOOPBACK_MODE	/;"	d
RX_LOST_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LOST_CNT	/;"	d
RX_LT1024_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LT1024_CNT	/;"	d
RX_LT128_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LT128_CNT	/;"	d
RX_LT256_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LT256_CNT	/;"	d
RX_LT512_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_LT512_CNT	/;"	d
RX_MACCTL_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_MACCTL_CNT	/;"	d
RX_MCAST_FRAME	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_MCAST_FRAME /;"	d
RX_MII_ERROR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_MII_ERROR /;"	d
RX_MISSED_FRAME	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_MISSED_FRAME /;"	d
RX_MULTI	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_MULTI	/;"	d
RX_MULTICAST	drivers/net/ax88180.h	/^  #define RX_MULTICAST	/;"	d
RX_MULTICAST_CNT	drivers/net/dnet.h	/^	u32 RX_MULTICAST_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_MULTI_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_MULTI_CNT	/;"	d
RX_MULTI_HASH	drivers/net/ax88180.h	/^  #define RX_MULTI_HASH	/;"	d
RX_NUM_DESC	drivers/net/calxedaxgmac.c	/^#define RX_NUM_DESC	/;"	d	file:
RX_NXTDESC_PTR	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_NXTDESC_PTR,		\/* RX Next Descriptor Pointer *\/$/;"	e	enum:dmac_ctrl
RX_OCTET_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_OCTET_CNT	/;"	d
RX_OK	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_OK	/;"	d
RX_OK_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_OK_CNT	/;"	d
RX_OK_PKT_CNT	drivers/net/dnet.h	/^	u32 RX_OK_PKT_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_OPCODE_CTL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_OPCODE_CTL	/;"	d
RX_ORL_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_ORL_CNT	/;"	d
RX_OVERLEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_OVERLEN /;"	d
RX_OVERRUN	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                RX_OVERRUN /;"	d
RX_OVERRUN_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define           RX_OVERRUN_MASK /;"	d
RX_OVERRUN_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define           RX_OVERRUN_STAT /;"	d
RX_PACKET_FILTER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_PACKET_FILTER /;"	d
RX_PACKET_LEN_OFFSET	drivers/net/ax88180.h	/^  #define RX_PACKET_LEN_OFFSET	/;"	d
RX_PAGE_NUM_MASK	drivers/net/ax88180.h	/^  #define RX_PAGE_NUM_MASK	/;"	d
RX_PAUSE_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_PAUSE_CNT	/;"	d
RX_PAUSE_FRM_CNT	drivers/net/dnet.h	/^	u32 RX_PAUSE_FRM_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_PHY	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_PHY	/;"	d
RX_PKT_IGNR_CNT	drivers/net/dnet.h	/^	u32 RX_PKT_IGNR_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_POLL_INTERVAL	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define RX_POLL_INTERVAL	/;"	d
RX_PORT_10G_BASE	drivers/net/fm/fm.h	/^#define RX_PORT_10G_BASE	/;"	d
RX_PORT_10G_BASE2	drivers/net/fm/fm.h	/^#define RX_PORT_10G_BASE2	/;"	d
RX_PORT_1G_BASE	drivers/net/fm/fm.h	/^#define RX_PORT_1G_BASE	/;"	d
RX_PRE_SHRINK_CNT	drivers/net/dnet.h	/^	u32 RX_PRE_SHRINK_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_PRINT_ERRORS	drivers/net/tsi108_eth.c	/^#define RX_PRINT_ERRORS$/;"	d	file:
RX_QUEUE_0_BUF_CONFIG_BSWP	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_BUF_CONFIG_BSWP	/;"	d	file:
RX_QUEUE_0_BUF_CONFIG_BURST	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_BUF_CONFIG_BURST	/;"	d	file:
RX_QUEUE_0_BUF_CONFIG_OCN_PORT	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_BUF_CONFIG_OCN_PORT	/;"	d	file:
RX_QUEUE_0_BUF_CONFIG_WSWP	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_BUF_CONFIG_WSWP	/;"	d	file:
RX_QUEUE_0_CONFIG_AM	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_AM	/;"	d	file:
RX_QUEUE_0_CONFIG_BSWP	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_BSWP	/;"	d	file:
RX_QUEUE_0_CONFIG_EDI	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_EDI	/;"	d	file:
RX_QUEUE_0_CONFIG_EEI	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_EEI	/;"	d	file:
RX_QUEUE_0_CONFIG_ELI	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_ELI	/;"	d	file:
RX_QUEUE_0_CONFIG_ENI	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_ENI	/;"	d	file:
RX_QUEUE_0_CONFIG_ESI	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_ESI	/;"	d	file:
RX_QUEUE_0_CONFIG_OCN_PORT	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_OCN_PORT	/;"	d	file:
RX_QUEUE_0_CONFIG_WSWP	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_CONFIG_WSWP	/;"	d	file:
RX_QUEUE_0_PTR_HIGH_VALID	drivers/net/tsi108_eth.c	/^#define RX_QUEUE_0_PTR_HIGH_VALID	/;"	d	file:
RX_QUIET_EN	drivers/usb/eth/r8152.h	/^#define RX_QUIET_EN	/;"	d
RX_RANGE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_RANGE	/;"	d
RX_REG2	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define RX_REG2	/;"	d
RX_REG3	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define RX_REG3	/;"	d
RX_RESET_COUNTER	drivers/net/enc28j60.c	/^#define RX_RESET_COUNTER	/;"	d	file:
RX_RGMII_TIM	include/mv88e6352.h	/^#define RX_RGMII_TIM	/;"	d
RX_RING_LEN_BITS	drivers/net/pcnet.c	/^#define RX_RING_LEN_BITS	/;"	d	file:
RX_RING_SIZE	drivers/net/pcnet.c	/^#define RX_RING_SIZE	/;"	d	file:
RX_RING_SIZE	include/usb/mpc8xx_udc.h	/^#define RX_RING_SIZE	/;"	d
RX_RUNT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_RUNT /;"	d
RX_RXANY	drivers/net/ax88180.h	/^  #define RX_RXANY	/;"	d
RX_SET_BUFF_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_SET_BUFF_ADDR(/;"	d
RX_SHORT_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_SHORT_CNT	/;"	d
RX_SHRT_FRM_CNT	drivers/net/dnet.h	/^	u32 RX_SHRT_FRM_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_START	drivers/net/ax88796.h	/^#define RX_START	/;"	d
RX_START	drivers/net/ne2000.h	/^#define RX_START	/;"	d
RX_START_READ	drivers/net/ax88180.h	/^  #define RX_START_READ	/;"	d
RX_STATUS	drivers/net/dnet.h	/^	u32 RX_STATUS;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_STATUS_FIFO	drivers/net/smc911x.h	/^#define RX_STATUS_FIFO	/;"	d
RX_STATUS_FIFO_PEEK	drivers/net/smc911x.h	/^#define RX_STATUS_FIFO_PEEK	/;"	d
RX_STATUS_FRAME_LEN	drivers/net/ep93xx_eth.h	/^#define RX_STATUS_FRAME_LEN(/;"	d
RX_STATUS_RFP	drivers/net/ep93xx_eth.h	/^#define RX_STATUS_RFP(/;"	d
RX_STATUS_RWE	drivers/net/ep93xx_eth.h	/^#define RX_STATUS_RWE(/;"	d
RX_STAT_ERRORS	drivers/net/lpc32xx_eth.c	/^#define RX_STAT_ERRORS /;"	d	file:
RX_STAT_RXSIZE	drivers/net/lpc32xx_eth.c	/^#define RX_STAT_RXSIZE /;"	d	file:
RX_STOP_READ	drivers/net/ax88180.h	/^  #define RX_STOP_READ	/;"	d
RX_STS_BCST	drivers/net/smc911x.h	/^#define	RX_STS_BCST	/;"	d
RX_STS_COLL	drivers/net/smc911x.h	/^#define	RX_STS_COLL	/;"	d
RX_STS_CRC_ERR	drivers/net/smc911x.h	/^#define	RX_STS_CRC_ERR	/;"	d
RX_STS_DRIBBLING	drivers/net/smc911x.h	/^#define	RX_STS_DRIBBLING	/;"	d
RX_STS_ES	drivers/net/smc911x.h	/^#define	RX_STS_ES	/;"	d
RX_STS_ES_	drivers/usb/eth/smsc95xx.c	/^#define RX_STS_ES_	/;"	d	file:
RX_STS_ETH_TYPE	drivers/net/smc911x.h	/^#define	RX_STS_ETH_TYPE	/;"	d
RX_STS_FL_	drivers/usb/eth/smsc95xx.c	/^#define RX_STS_FL_	/;"	d	file:
RX_STS_LEN_ERR	drivers/net/smc911x.h	/^#define	RX_STS_LEN_ERR	/;"	d
RX_STS_MCAST	drivers/net/smc911x.h	/^#define	RX_STS_MCAST	/;"	d
RX_STS_MII_ERR	drivers/net/smc911x.h	/^#define	RX_STS_MII_ERR	/;"	d
RX_STS_PKT_LEN	drivers/net/smc911x.h	/^#define	RX_STS_PKT_LEN	/;"	d
RX_STS_RUNT_ERR	drivers/net/smc911x.h	/^#define	RX_STS_RUNT_ERR	/;"	d
RX_STS_TOO_LONG	drivers/net/smc911x.h	/^#define	RX_STS_TOO_LONG	/;"	d
RX_STS_WDOG_TMT	drivers/net/smc911x.h	/^#define	RX_STS_WDOG_TMT	/;"	d
RX_TAILDESC_PTR	drivers/net/xilinx_ll_temac_sdma.h	/^	RX_TAILDESC_PTR,	\/* RX Tail Descriptor Pointer *\/$/;"	e	enum:dmac_ctrl
RX_THRESH	drivers/block/ftide020.h	/^#define RX_THRESH	/;"	d
RX_THRESH_DEF	arch/arm/include/asm/arch-armada100/spi.h	/^#define RX_THRESH_DEF	/;"	d
RX_THR_HIGH	drivers/usb/eth/r8152.h	/^#define RX_THR_HIGH	/;"	d
RX_THR_SLOW	drivers/usb/eth/r8152.h	/^#define RX_THR_SLOW	/;"	d
RX_THR_SUPPER	drivers/usb/eth/r8152.h	/^#define RX_THR_SUPPER	/;"	d
RX_TIMEOUT	drivers/net/lpc32xx_eth.c	/^#define RX_TIMEOUT /;"	d	file:
RX_TIMEOUT	drivers/spi/designware_spi.c	/^#define RX_TIMEOUT	/;"	d	file:
RX_TOTAL_BUFSIZE	drivers/net/ag7xxx.c	/^#define RX_TOTAL_BUFSIZE	/;"	d	file:
RX_TOTAL_BUFSIZE	drivers/net/designware.h	/^#define RX_TOTAL_BUFSIZE	/;"	d
RX_TOTAL_BUFSIZE	drivers/net/sun8i_emac.c	/^#define RX_TOTAL_BUFSIZE	/;"	d	file:
RX_TYPE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_TYPE	/;"	d
RX_TYPED_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_TYPED_CNT	/;"	d
RX_T_DONE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_T_DONE /;"	d
RX_UCTL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_UCTL	/;"	d
RX_UNICAST	drivers/net/ax88180.h	/^  #define RX_UNICAST	/;"	d
RX_UNI_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_UNI_CNT	/;"	d
RX_UNSUP_OPCD_CNT	drivers/net/dnet.h	/^	u32 RX_UNSUP_OPCD_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_URB_SIZE	drivers/usb/eth/smsc95xx.c	/^#define RX_URB_SIZE /;"	d	file:
RX_U_CNTRL_FRAME	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_U_CNTRL_FRAME /;"	d
RX_VLAN1	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_VLAN1	/;"	d
RX_VLAN1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_VLAN1 /;"	d
RX_VLAN2	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	RX_VLAN2	/;"	d
RX_VLAN2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_VLAN2 /;"	d
RX_VLAN_TAG	drivers/usb/eth/r8152.h	/^#define RX_VLAN_TAG	/;"	d
RX_VLAN_TAG_CNT	drivers/net/dnet.h	/^	u32 RX_VLAN_TAG_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
RX_WDOG_TIMER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define RX_WDOG_TIMER /;"	d
RX_WMARK	include/dwmmc.h	/^#define RX_WMARK(/;"	d
RX_WMARK_MASK	include/dwmmc.h	/^#define RX_WMARK_MASK	/;"	d
RX_WMARK_SHIFT	include/dwmmc.h	/^#define RX_WMARK_SHIFT	/;"	d
RX_ZERO_EN	drivers/usb/eth/r8152.h	/^#define RX_ZERO_EN	/;"	d
RYAR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RYAR1	/;"	d
RYAR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RYAR2	/;"	d
RYCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define RYCR	/;"	d
RYRAR	arch/sh/include/asm/cpu_sh7750.h	/^#define RYRAR	/;"	d
RYRAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	RYRAR	/;"	d
RYRCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define RYRCNT	/;"	d
RYRCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	RYRCNT	/;"	d
RZQ_12_TERM	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_12_TERM,$/;"	e	enum:die_term	file:
RZQ_2_TERM	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_2_TERM,$/;"	e	enum:die_term	file:
RZQ_4_TERM	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_4_TERM,$/;"	e	enum:die_term	file:
RZQ_6_IMP	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_6_IMP = 0,$/;"	e	enum:out_impedance	file:
RZQ_6_TERM	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_6_TERM,$/;"	e	enum:die_term	file:
RZQ_7_IMP	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_7_IMP$/;"	e	enum:out_impedance	file:
RZQ_8_TERM	arch/arm/mach-keystone/ddr3_spd.c	/^	RZQ_8_TERM$/;"	e	enum:die_term	file:
R_0	arch/arm/lib/uldivmod.S	/^R_0	.req	r2$/;"	l
R_1	arch/arm/lib/uldivmod.S	/^R_1	.req	r3$/;"	l
R_386_32	arch/x86/include/asm/elf.h	/^#define R_386_32	/;"	d
R_386_COPY	arch/x86/include/asm/elf.h	/^#define R_386_COPY	/;"	d
R_386_GLOB_DAT	arch/x86/include/asm/elf.h	/^#define R_386_GLOB_DAT	/;"	d
R_386_GOT32	arch/x86/include/asm/elf.h	/^#define R_386_GOT32	/;"	d
R_386_GOTOFF	arch/x86/include/asm/elf.h	/^#define R_386_GOTOFF	/;"	d
R_386_GOTPC	arch/x86/include/asm/elf.h	/^#define R_386_GOTPC	/;"	d
R_386_JMP_SLOT	arch/x86/include/asm/elf.h	/^#define R_386_JMP_SLOT	/;"	d
R_386_NONE	arch/x86/include/asm/elf.h	/^#define R_386_NONE	/;"	d
R_386_NUM	arch/x86/include/asm/elf.h	/^#define R_386_NUM	/;"	d
R_386_PC32	arch/x86/include/asm/elf.h	/^#define R_386_PC32	/;"	d
R_386_PLT32	arch/x86/include/asm/elf.h	/^#define R_386_PLT32	/;"	d
R_386_RELATIVE	arch/x86/include/asm/elf.h	/^#define R_386_RELATIVE	/;"	d
R_AARCH64_RELATIVE	tools/relocate-rela.c	/^#define R_AARCH64_RELATIVE	/;"	d	file:
R_AH	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_AH /;"	d
R_AL	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_AL /;"	d
R_AX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_AX /;"	d
R_BH	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_BH /;"	d
R_BL	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_BL /;"	d
R_BP	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_BP /;"	d
R_BX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_BX /;"	d
R_CH	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_CH /;"	d
R_CL	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_CL /;"	d
R_CS	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_CS /;"	d
R_CX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_CX /;"	d
R_DC_LINE	arch/mips/lib/cache_init.S	/^#define R_DC_LINE	/;"	d	file:
R_DC_SIZE	arch/mips/lib/cache_init.S	/^#define R_DC_SIZE	/;"	d	file:
R_DH	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_DH /;"	d
R_DI	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_DI /;"	d
R_DL	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_DL /;"	d
R_DS	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_DS /;"	d
R_DX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_DX /;"	d
R_EAX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EAX /;"	d
R_EBP	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EBP /;"	d
R_EBX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EBX /;"	d
R_ECX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_ECX /;"	d
R_EDI	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EDI /;"	d
R_EDX	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EDX /;"	d
R_EFLG	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EFLG /;"	d
R_EIP	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_EIP /;"	d
R_ES	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_ES /;"	d
R_ESI	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_ESI /;"	d
R_ESP	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_ESP /;"	d
R_FLG	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_FLG /;"	d
R_FS	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_FS /;"	d
R_GS	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_GS /;"	d
R_I2C_ENABLE	board/sunxi/Kconfig	/^config R_I2C_ENABLE$/;"	c
R_IC_LINE	arch/mips/lib/cache_init.S	/^#define R_IC_LINE	/;"	d	file:
R_IC_SIZE	arch/mips/lib/cache_init.S	/^#define R_IC_SIZE	/;"	d	file:
R_IP	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_IP /;"	d
R_L2_BYPASSED	arch/mips/lib/cache_init.S	/^#define R_L2_BYPASSED	/;"	d	file:
R_L2_L2C	arch/mips/lib/cache_init.S	/^#define R_L2_L2C	/;"	d	file:
R_L2_LINE	arch/mips/lib/cache_init.S	/^#define R_L2_LINE	/;"	d	file:
R_L2_SIZE	arch/mips/lib/cache_init.S	/^#define R_L2_SIZE	/;"	d	file:
R_MASK	lib/efi_loader/efi_runtime.c	/^#define R_MASK	/;"	d	file:
R_OK	fs/yaffs2/yportenv.h	/^#define R_OK	/;"	d
R_OWN	drivers/net/dc2114x.c	/^#define R_OWN	/;"	d	file:
R_PPC_ADDR14	include/elf.h	/^#define R_PPC_ADDR14 /;"	d
R_PPC_ADDR14_BRNTAKEN	include/elf.h	/^#define R_PPC_ADDR14_BRNTAKEN /;"	d
R_PPC_ADDR14_BRTAKEN	include/elf.h	/^#define R_PPC_ADDR14_BRTAKEN /;"	d
R_PPC_ADDR16	include/elf.h	/^#define R_PPC_ADDR16 /;"	d
R_PPC_ADDR16_HA	include/elf.h	/^#define R_PPC_ADDR16_HA /;"	d
R_PPC_ADDR16_HI	include/elf.h	/^#define R_PPC_ADDR16_HI /;"	d
R_PPC_ADDR16_LO	include/elf.h	/^#define R_PPC_ADDR16_LO /;"	d
R_PPC_ADDR24	include/elf.h	/^#define R_PPC_ADDR24 /;"	d
R_PPC_ADDR32	include/elf.h	/^#define R_PPC_ADDR32 /;"	d
R_PPC_COPY	include/elf.h	/^#define R_PPC_COPY /;"	d
R_PPC_DIAB_RELSDA_HA	include/elf.h	/^#define R_PPC_DIAB_RELSDA_HA /;"	d
R_PPC_DIAB_RELSDA_HI	include/elf.h	/^#define R_PPC_DIAB_RELSDA_HI /;"	d
R_PPC_DIAB_RELSDA_LO	include/elf.h	/^#define R_PPC_DIAB_RELSDA_LO /;"	d
R_PPC_DIAB_SDA21_HA	include/elf.h	/^#define R_PPC_DIAB_SDA21_HA /;"	d
R_PPC_DIAB_SDA21_HI	include/elf.h	/^#define R_PPC_DIAB_SDA21_HI /;"	d
R_PPC_DIAB_SDA21_LO	include/elf.h	/^#define R_PPC_DIAB_SDA21_LO /;"	d
R_PPC_EMB_BIT_FLD	include/elf.h	/^#define R_PPC_EMB_BIT_FLD /;"	d
R_PPC_EMB_MRKREF	include/elf.h	/^#define R_PPC_EMB_MRKREF /;"	d
R_PPC_EMB_NADDR16	include/elf.h	/^#define R_PPC_EMB_NADDR16 /;"	d
R_PPC_EMB_NADDR16_HA	include/elf.h	/^#define R_PPC_EMB_NADDR16_HA /;"	d
R_PPC_EMB_NADDR16_HI	include/elf.h	/^#define R_PPC_EMB_NADDR16_HI /;"	d
R_PPC_EMB_NADDR16_LO	include/elf.h	/^#define R_PPC_EMB_NADDR16_LO /;"	d
R_PPC_EMB_NADDR32	include/elf.h	/^#define R_PPC_EMB_NADDR32 /;"	d
R_PPC_EMB_RELSDA	include/elf.h	/^#define R_PPC_EMB_RELSDA /;"	d
R_PPC_EMB_RELSEC16	include/elf.h	/^#define R_PPC_EMB_RELSEC16 /;"	d
R_PPC_EMB_RELST_HA	include/elf.h	/^#define R_PPC_EMB_RELST_HA /;"	d
R_PPC_EMB_RELST_HI	include/elf.h	/^#define R_PPC_EMB_RELST_HI /;"	d
R_PPC_EMB_RELST_LO	include/elf.h	/^#define R_PPC_EMB_RELST_LO /;"	d
R_PPC_EMB_SDA21	include/elf.h	/^#define R_PPC_EMB_SDA21 /;"	d
R_PPC_EMB_SDA2I16	include/elf.h	/^#define R_PPC_EMB_SDA2I16 /;"	d
R_PPC_EMB_SDA2REL	include/elf.h	/^#define R_PPC_EMB_SDA2REL /;"	d
R_PPC_EMB_SDAI16	include/elf.h	/^#define R_PPC_EMB_SDAI16 /;"	d
R_PPC_GLOB_DAT	include/elf.h	/^#define R_PPC_GLOB_DAT /;"	d
R_PPC_GOT16	include/elf.h	/^#define R_PPC_GOT16 /;"	d
R_PPC_GOT16_HA	include/elf.h	/^#define R_PPC_GOT16_HA /;"	d
R_PPC_GOT16_HI	include/elf.h	/^#define R_PPC_GOT16_HI /;"	d
R_PPC_GOT16_LO	include/elf.h	/^#define R_PPC_GOT16_LO /;"	d
R_PPC_JMP_SLOT	include/elf.h	/^#define R_PPC_JMP_SLOT /;"	d
R_PPC_LOCAL24PC	include/elf.h	/^#define R_PPC_LOCAL24PC /;"	d
R_PPC_NONE	include/elf.h	/^#define R_PPC_NONE /;"	d
R_PPC_NUM	include/elf.h	/^#define R_PPC_NUM /;"	d
R_PPC_PLT16_HA	include/elf.h	/^#define R_PPC_PLT16_HA /;"	d
R_PPC_PLT16_HI	include/elf.h	/^#define R_PPC_PLT16_HI /;"	d
R_PPC_PLT16_LO	include/elf.h	/^#define R_PPC_PLT16_LO /;"	d
R_PPC_PLT32	include/elf.h	/^#define R_PPC_PLT32 /;"	d
R_PPC_PLTREL24	include/elf.h	/^#define R_PPC_PLTREL24 /;"	d
R_PPC_PLTREL32	include/elf.h	/^#define R_PPC_PLTREL32 /;"	d
R_PPC_REL14	include/elf.h	/^#define R_PPC_REL14 /;"	d
R_PPC_REL14_BRNTAKEN	include/elf.h	/^#define R_PPC_REL14_BRNTAKEN /;"	d
R_PPC_REL14_BRTAKEN	include/elf.h	/^#define R_PPC_REL14_BRTAKEN /;"	d
R_PPC_REL24	include/elf.h	/^#define R_PPC_REL24 /;"	d
R_PPC_REL32	include/elf.h	/^#define R_PPC_REL32 /;"	d
R_PPC_RELATIVE	include/elf.h	/^#define R_PPC_RELATIVE /;"	d
R_PPC_SDAREL16	include/elf.h	/^#define R_PPC_SDAREL16 /;"	d
R_PPC_SECTOFF	include/elf.h	/^#define R_PPC_SECTOFF /;"	d
R_PPC_SECTOFF_HA	include/elf.h	/^#define R_PPC_SECTOFF_HA /;"	d
R_PPC_SECTOFF_HI	include/elf.h	/^#define R_PPC_SECTOFF_HI /;"	d
R_PPC_SECTOFF_LO	include/elf.h	/^#define R_PPC_SECTOFF_LO /;"	d
R_PPC_TOC16	include/elf.h	/^#define R_PPC_TOC16 /;"	d
R_PPC_UADDR16	include/elf.h	/^#define R_PPC_UADDR16 /;"	d
R_PPC_UADDR32	include/elf.h	/^#define R_PPC_UADDR32 /;"	d
R_RELATIVE	lib/efi_loader/efi_runtime.c	/^#define R_RELATIVE	/;"	d	file:
R_RETURN	arch/mips/lib/cache_init.S	/^#define R_RETURN	/;"	d	file:
R_SI	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_SI /;"	d
R_SP	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_SP /;"	d
R_SS	drivers/bios_emulator/include/x86emu/regs.h	/^#define R_SS /;"	d
R_X86_64_16	arch/x86/include/asm/elf.h	/^#define R_X86_64_16	/;"	d
R_X86_64_32	arch/x86/include/asm/elf.h	/^#define R_X86_64_32	/;"	d
R_X86_64_32S	arch/x86/include/asm/elf.h	/^#define R_X86_64_32S	/;"	d
R_X86_64_64	arch/x86/include/asm/elf.h	/^#define R_X86_64_64	/;"	d
R_X86_64_8	arch/x86/include/asm/elf.h	/^#define R_X86_64_8	/;"	d
R_X86_64_COPY	arch/x86/include/asm/elf.h	/^#define R_X86_64_COPY	/;"	d
R_X86_64_GLOB_DAT	arch/x86/include/asm/elf.h	/^#define R_X86_64_GLOB_DAT	/;"	d
R_X86_64_GOT32	arch/x86/include/asm/elf.h	/^#define R_X86_64_GOT32	/;"	d
R_X86_64_GOTPCREL	arch/x86/include/asm/elf.h	/^#define R_X86_64_GOTPCREL	/;"	d
R_X86_64_JUMP_SLOT	arch/x86/include/asm/elf.h	/^#define R_X86_64_JUMP_SLOT	/;"	d
R_X86_64_NONE	arch/x86/include/asm/elf.h	/^#define R_X86_64_NONE	/;"	d
R_X86_64_NUM	arch/x86/include/asm/elf.h	/^#define R_X86_64_NUM	/;"	d
R_X86_64_PC16	arch/x86/include/asm/elf.h	/^#define R_X86_64_PC16	/;"	d
R_X86_64_PC32	arch/x86/include/asm/elf.h	/^#define R_X86_64_PC32	/;"	d
R_X86_64_PC8	arch/x86/include/asm/elf.h	/^#define R_X86_64_PC8	/;"	d
R_X86_64_PLT32	arch/x86/include/asm/elf.h	/^#define R_X86_64_PLT32	/;"	d
R_X86_64_RELATIVE	arch/x86/include/asm/elf.h	/^#define R_X86_64_RELATIVE	/;"	d
RdDCSR0	include/SA-1100.h	/^#define RdDCSR0	/;"	d
RdDCSR1	include/SA-1100.h	/^#define RdDCSR1	/;"	d
RdDCSR2	include/SA-1100.h	/^#define RdDCSR2	/;"	d
RdDCSR3	include/SA-1100.h	/^#define RdDCSR3	/;"	d
RdDCSR4	include/SA-1100.h	/^#define RdDCSR4	/;"	d
RdDCSR5	include/SA-1100.h	/^#define RdDCSR5	/;"	d
Read	lib/lzma/Types.h	/^  Byte (*Read)(void *p); \/* reads one byte, returns 0 in case of EOF or error *\/$/;"	m	struct:__anonf2a2f1b90108	typeref:typename:Byte (*)(void * p)
Read	lib/lzma/Types.h	/^  SRes (*Read)(void *p, void *buf, size_t *size);  \/* same as ISeqInStream::Read *\/$/;"	m	struct:__anonf2a2f1b90608	typeref:typename:SRes (*)(void * p,void * buf,size_t * size)
Read	lib/lzma/Types.h	/^  SRes (*Read)(void *p, void *buf, size_t *size);$/;"	m	struct:__anonf2a2f1b90308	typeref:typename:SRes (*)(void * p,void * buf,size_t * size)
Read	lib/lzma/Types.h	/^  SRes (*Read)(void *p, void *buf, size_t *size);$/;"	m	struct:__anonf2a2f1b90708	typeref:typename:SRes (*)(void * p,void * buf,size_t * size)
ReadBoards	tools/buildman/board.py	/^    def ReadBoards(self, fname):$/;"	m	class:Boards
ReadDOC	include/linux/mtd/doc2000.h	/^#define ReadDOC(/;"	d
ReadDOC_	include/linux/mtd/doc2000.h	/^#define ReadDOC_(/;"	d
ReadFuncSizes	tools/buildman/builder.py	/^    def ReadFuncSizes(self, fname, fd):$/;"	m	class:Builder
ReadGitAliases	tools/patman/settings.py	/^def ReadGitAliases(fname):$/;"	f
ReadPixClckFromXrRegsBack	drivers/video/ct69000.c	/^ReadPixClckFromXrRegsBack (struct ctfb_chips_properties *param)$/;"	f	typeref:typename:int	file:
Real Time Clock	drivers/rtc/Kconfig	/^menu "Real Time Clock"$/;"	m
Rec_Pointer	lib/dhry/dhry.h	/^      } Rec_Type, *Rec_Pointer;$/;"	t	typeref:struct:record *
Rec_Type	lib/dhry/dhry.h	/^      } Rec_Type, *Rec_Pointer;$/;"	t	typeref:struct:record
ReferenceSource	tools/moveconfig.py	/^class ReferenceSource:$/;"	c
Refresh	tools/dtoc/fdt_normal.py	/^    def Refresh(self):$/;"	m	class:FdtNormal
Refresh	tools/dtoc/fdt_normal.py	/^    def Refresh(self, my_offset):$/;"	m	class:Node
Reg	lib/dhry/dhry_1.c	/^        Boolean Reg = false;$/;"	v	typeref:typename:Boolean
Reg	lib/dhry/dhry_1.c	/^        Boolean Reg = true;$/;"	v	typeref:typename:Boolean
RegField	tools/rkmux.py	/^class RegField:$/;"	c
RegisterFlags	drivers/bios_emulator/biosemui.h	/^} RegisterFlags;$/;"	t	typeref:enum:__anonb186e4ea0103
RelocCount	include/pe.h	/^		uint32_t RelocCount;$/;"	m	union:_IMAGE_RELOCATION::__anon69e06b43020a	typeref:typename:uint32_t
Remote Processor drivers	drivers/remoteproc/Kconfig	/^menu "Remote Processor drivers"$/;"	m
Rename	doc/README.x86	/^Rename flashregion_0_flashdescriptor.bin to descriptor.bin$/;"	l
Rename	doc/README.x86	/^Rename flashregion_2_intel_me.bin to me.bin$/;"	l
Rename	doc/README.x86	/^Rename the first one to fsp.bin and second one to cmc.bin and put them in the$/;"	l
RepLenCoder	lib/lzma/LzmaDec.c	/^#define RepLenCoder /;"	d	file:
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_halt_msg_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_init_msg_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_keepalive_cmplt_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_keepalive_msg_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_query_cmplt_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_query_msg_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_set_cmplt_type	typeref:typename:__le32
RequestID	drivers/usb/gadget/rndis.h	/^	__le32	RequestID;$/;"	m	struct:rndis_set_msg_type	typeref:typename:__le32
Requirements	test/py/README.md	/^## Requirements$/;"	s	chapter:U-Boot pytest suite
Reserved	drivers/usb/gadget/ndis.h	/^	__le32	Reserved;$/;"	m	struct:NDIS_PM_PACKET_PATTERN	typeref:typename:__le32
Reserved	drivers/usb/gadget/rndis.h	/^	__le32	Reserved;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
Reserved	drivers/usb/gadget/rndis.h	/^	__le32	Reserved;$/;"	m	struct:rndis_reset_msg_type	typeref:typename:__le32
Reset Controller Support	drivers/reset/Kconfig	/^menu "Reset Controller Support"$/;"	m
ResetLoop	arch/arm/mach-davinci/lowlevel_init.S	/^ResetLoop:$/;"	l
ResetPPL2Loop	arch/arm/mach-davinci/lowlevel_init.S	/^ResetPPL2Loop:$/;"	l
ResetResultSummary	tools/buildman/builder.py	/^    def ResetResultSummary(self, board_selected):$/;"	m	class:Builder
Residue	drivers/usb/gadget/storage_common.c	/^	__le32	Residue;		\/* Amount not transferred *\/$/;"	m	struct:bulk_cs_wrap	typeref:typename:__le32	file:
ResolveReferences	tools/buildman/toolchain.py	/^    def ResolveReferences(self, var_dict, args):$/;"	m	class:Toolchains
ResultThread	tools/buildman/builderthread.py	/^class ResultThread(threading.Thread):$/;"	c
RetBit	board/esd/common/xilinx_jtag/lenval.c	/^short RetBit( lenVal*   plv,$/;"	f	typeref:typename:short
RevisionID	drivers/net/rtl8139.c	/^	RevisionID=0x5E,	\/* revision of the RTL8139 chip *\/$/;"	e	enum:RTL8139_registers	file:
Rot32	fs/zfs/zfs_sha256.c	/^#define	Rot32(/;"	d	file:
RtcTodAddr	drivers/rtc/ds1374.c	/^const char RtcTodAddr[] = {$/;"	v	typeref:typename:const char[]
Run	tools/patman/command.py	/^def Run(*cmd, **kwargs):$/;"	f
RunAndLog	test/py/multiplexed_log.py	/^class RunAndLog(object):$/;"	c
RunCommit	tools/buildman/builderthread.py	/^    def RunCommit(self, commit_upto, brd, work_dir, do_config, force_build,$/;"	m	class:BuilderThread
RunJob	tools/buildman/builderthread.py	/^    def RunJob(self, job):$/;"	m	class:BuilderThread
RunList	tools/patman/command.py	/^def RunList(cmd):$/;"	f
RunPipe	tools/patman/command.py	/^def RunPipe(pipe_list, infile=None, outfile=None,$/;"	f
RunTests	tools/buildman/buildman	/^def RunTests():$/;"	f
RunTests	tools/buildman/buildman.py	/^def RunTests():$/;"	f
Run_Index	lib/dhry/dhry_1.c	/^unsigned long Run_Index;$/;"	v	typeref:typename:unsigned long
Running	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		enum { Idle, Running, Closing, Closed } state;$/;"	e	enum:__anon7d79ed4b0408::__anon7d79ed4b0503	file:
RxAcceptErr	drivers/net/natsemi.c	/^	RxAcceptErr	= 0x80000000$/;"	e	enum:RxConfig_bits	file:
RxAcceptErr	drivers/net/ns8382x.c	/^	RxAcceptErr	= 0x80000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptLenErr	drivers/net/ns8382x.c	/^	RxAcceptLenErr	= 0x04000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptLong	drivers/net/natsemi.c	/^	RxAcceptLong	= 0x8000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptLong	drivers/net/ns8382x.c	/^	RxAcceptLong	= 0x08000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptRunt	drivers/net/natsemi.c	/^	RxAcceptRunt	= 0x40000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptRunt	drivers/net/ns8382x.c	/^	RxAcceptRunt	= 0x40000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptTx	drivers/net/natsemi.c	/^	RxAcceptTx	= 0x10000000,$/;"	e	enum:RxConfig_bits	file:
RxAcceptTx	drivers/net/ns8382x.c	/^	RxAcceptTx	= 0x10000000,$/;"	e	enum:RxConfig_bits	file:
RxBD_BCAST	drivers/qe/uec.h	/^#define RxBD_BCAST	/;"	d
RxBD_CMR	drivers/qe/uec.h	/^#define RxBD_CMR	/;"	d
RxBD_CRCERR	drivers/qe/uec.h	/^#define RxBD_CRCERR	/;"	d
RxBD_EMPTY	drivers/net/fm/fm.h	/^#define RxBD_EMPTY	/;"	d
RxBD_EMPTY	drivers/qe/uec.h	/^#define RxBD_EMPTY	/;"	d
RxBD_ERROR	drivers/net/fm/fm.h	/^#define RxBD_ERROR	/;"	d
RxBD_ERROR	drivers/qe/uec.h	/^#define RxBD_ERROR	/;"	d
RxBD_FIRST	drivers/net/fm/fm.h	/^#define RxBD_FIRST	/;"	d
RxBD_FIRST	drivers/qe/uec.h	/^#define RxBD_FIRST	/;"	d
RxBD_INT	drivers/qe/uec.h	/^#define RxBD_INT	/;"	d
RxBD_IPCH	drivers/qe/uec.h	/^#define RxBD_IPCH	/;"	d
RxBD_LAST	drivers/net/fm/fm.h	/^#define RxBD_LAST	/;"	d
RxBD_LAST	drivers/qe/uec.h	/^#define RxBD_LAST	/;"	d
RxBD_LG	drivers/qe/uec.h	/^#define RxBD_LG	/;"	d
RxBD_MCAST	drivers/qe/uec.h	/^#define RxBD_MCAST	/;"	d
RxBD_MISS	drivers/qe/uec.h	/^#define RxBD_MISS	/;"	d
RxBD_NO	drivers/qe/uec.h	/^#define RxBD_NO	/;"	d
RxBD_OVERRUN	drivers/qe/uec.h	/^#define RxBD_OVERRUN	/;"	d
RxBD_OWNER	drivers/qe/uec.h	/^#define RxBD_OWNER	/;"	d
RxBD_PHYS_ERR	drivers/net/fm/fm.h	/^#define RxBD_PHYS_ERR	/;"	d
RxBD_SHORT	drivers/qe/uec.h	/^#define RxBD_SHORT	/;"	d
RxBD_SIZE_ERR	drivers/net/fm/fm.h	/^#define RxBD_SIZE_ERR	/;"	d
RxBD_WRAP	drivers/qe/uec.h	/^#define RxBD_WRAP	/;"	d
RxBadAlign	drivers/net/rtl8139.c	/^	RxBadAlign=0x0002, RxStatusOK=0x0001,$/;"	e	enum:RxStatusBits	file:
RxBadSymbol	drivers/net/rtl8139.c	/^	RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,$/;"	e	enum:RxStatusBits	file:
RxBroadcast	drivers/net/rtl8139.c	/^	RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,$/;"	e	enum:RxStatusBits	file:
RxBuf	drivers/net/rtl8139.c	/^	RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,$/;"	e	enum:RTL8139_registers	file:
RxBufAddr	drivers/net/rtl8139.c	/^	ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,$/;"	e	enum:RTL8139_registers	file:
RxBufEmpty	drivers/net/rtl8139.c	/^	CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };$/;"	e	enum:ChipCmdBits	file:
RxBufEmpty	drivers/net/rtl8169.c	/^	RxBufEmpty = 0x01,$/;"	e	enum:RTL8169_register_content	file:
RxBufPtr	drivers/net/rtl8139.c	/^	ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,$/;"	e	enum:RTL8139_registers	file:
RxBufferRing	drivers/net/rtl8169.c	/^	unsigned char *RxBufferRing[NUM_RX_DESC];	\/* Index of Rx Buffer array *\/$/;"	m	struct:rtl8169_private	typeref:typename:unsigned char * []	file:
RxBufferRings	drivers/net/rtl8169.c	/^	unsigned char *RxBufferRings;	\/* Index of Rx Buffer  *\/$/;"	m	struct:rtl8169_private	typeref:typename:unsigned char *	file:
RxCRC	drivers/net/rtl8169.c	/^	RxCRC = 0x00080000,$/;"	e	enum:RTL8169_register_content	file:
RxCRCErr	drivers/net/rtl8139.c	/^	RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,$/;"	e	enum:RxStatusBits	file:
RxCfgDMAShift	drivers/net/rtl8169.c	/^	RxCfgDMAShift = 8,$/;"	e	enum:RTL8169_register_content	file:
RxCfgFIFOShift	drivers/net/rtl8169.c	/^	RxCfgFIFOShift = 13,$/;"	e	enum:RTL8169_register_content	file:
RxCfgWrap	drivers/net/rtl8139.c	/^	RxCfgWrap=0x80,$/;"	e	enum:rx_mode_bits	file:
RxCnt	drivers/net/rtl8139.c	/^	RxCnt=0x72,		\/* packet received counter *\/$/;"	e	enum:RTL8139_registers	file:
RxConfig	drivers/net/natsemi.c	/^	RxConfig	= 0x34,$/;"	e	enum:register_offsets	file:
RxConfig	drivers/net/ns8382x.c	/^	RxConfig = 0x38,$/;"	e	enum:register_offsets	file:
RxConfig	drivers/net/rtl8139.c	/^	TxConfig=0x40, RxConfig=0x44,$/;"	e	enum:RTL8139_registers	file:
RxConfig	drivers/net/rtl8169.c	/^	RxConfig = 0x44,$/;"	e	enum:RTL8169_registers	file:
RxConfigMask	drivers/net/rtl8169.c	/^	u32 RxConfigMask;	\/* should clear the bits supported by this chip *\/$/;"	m	struct:__anon571e08a40108	typeref:typename:u32	file:
RxConfig_bits	drivers/net/natsemi.c	/^enum RxConfig_bits {$/;"	g	file:
RxConfig_bits	drivers/net/ns8382x.c	/^enum RxConfig_bits {$/;"	g	file:
RxDesc	drivers/net/rtl8169.c	/^struct RxDesc {$/;"	s	file:
RxDescArray	drivers/net/rtl8169.c	/^	struct RxDesc *RxDescArray;	\/* Index of 256-alignment Rx Descriptor buffer *\/$/;"	m	struct:rtl8169_private	typeref:struct:RxDesc *	file:
RxDescStartAddrHigh	drivers/net/rtl8169.c	/^	RxDescStartAddrHigh = 0xE8,$/;"	e	enum:RTL8169_registers	file:
RxDescStartAddrLow	drivers/net/rtl8169.c	/^	RxDescStartAddrLow = 0xE4,$/;"	e	enum:RTL8169_registers	file:
RxDrthMask	drivers/net/natsemi.c	/^	RxDrthMask	= 0x3e,$/;"	e	enum:RxConfig_bits	file:
RxDrthMask	drivers/net/ns8382x.c	/^	RxDrthMask	= 0x0000003e,$/;"	e	enum:RxConfig_bits	file:
RxEarlyCnt	drivers/net/rtl8139.c	/^	RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,$/;"	e	enum:RTL8139_registers	file:
RxEarlyStatus	drivers/net/rtl8139.c	/^	RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,$/;"	e	enum:RTL8139_registers	file:
RxErr	drivers/net/rtl8139.c	/^	TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,$/;"	e	enum:IntrStatusBits	file:
RxErr	drivers/net/rtl8169.c	/^	RxErr = 0x02,$/;"	e	enum:RTL8169_register_content	file:
RxFD	drivers/net/eepro100.c	/^struct RxFD {$/;"	s	file:
RxFIFOOver	drivers/net/rtl8139.c	/^	RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,$/;"	e	enum:IntrStatusBits	file:
RxFIFOOver	drivers/net/rtl8169.c	/^	RxFIFOOver = 0x40,$/;"	e	enum:RTL8169_register_content	file:
RxFilterAddr	drivers/net/natsemi.c	/^	RxFilterAddr	= 0x48,$/;"	e	enum:register_offsets	file:
RxFilterAddr	drivers/net/ns8382x.c	/^	RxFilterAddr = 0x48,$/;"	e	enum:register_offsets	file:
RxFilterData	drivers/net/natsemi.c	/^	RxFilterData	= 0x4C,$/;"	e	enum:register_offsets	file:
RxFilterData	drivers/net/ns8382x.c	/^	RxFilterData = 0x4C,$/;"	e	enum:register_offsets	file:
RxFilterEnable	drivers/net/ns8382x.c	/^	RxFilterEnable		= 0x80000000,$/;"	e	enum:rx_mode_bits	file:
RxFlowCtrl	drivers/net/rtl8169.c	/^	RxFlowCtrl = 0x20,$/;"	e	enum:RTL8169_register_content	file:
RxMaxSize	drivers/net/rtl8169.c	/^	RxMaxSize = 0xDA,$/;"	e	enum:RTL8169_registers	file:
RxMissed	drivers/net/rtl8139.c	/^	RxMissed=0x4C,		\/* 24 bits valid, write clears. *\/$/;"	e	enum:RTL8139_registers	file:
RxMissed	drivers/net/rtl8169.c	/^	RxMissed = 0x4C,$/;"	e	enum:RTL8169_registers	file:
RxMulticast	drivers/net/rtl8139.c	/^	RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,$/;"	e	enum:RxStatusBits	file:
RxMxdmaMask	drivers/net/natsemi.c	/^	RxMxdmaMask	= 0x700000,$/;"	e	enum:RxConfig_bits	file:
RxMxdmaMask	drivers/net/ns8382x.c	/^	RxMxdmaMask	= 0x00700000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_1024	drivers/net/ns8382x.c	/^	RxMxdma_1024	= 0x00000000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_128	drivers/net/natsemi.c	/^	RxMxdma_128	= 0x600000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_128	drivers/net/ns8382x.c	/^	RxMxdma_128	= 0x00500000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_16	drivers/net/natsemi.c	/^	RxMxdma_16	= 0x300000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_16	drivers/net/ns8382x.c	/^	RxMxdma_16	= 0x00200000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_256	drivers/net/natsemi.c	/^	RxMxdma_256	= 0x700000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_256	drivers/net/ns8382x.c	/^	RxMxdma_256	= 0x00600000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_32	drivers/net/natsemi.c	/^	RxMxdma_32	= 0x400000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_32	drivers/net/ns8382x.c	/^	RxMxdma_32	= 0x00300000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_4	drivers/net/natsemi.c	/^	RxMxdma_4	= 0x100000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_512	drivers/net/natsemi.c	/^	RxMxdma_512	= 0x0,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_512	drivers/net/ns8382x.c	/^	RxMxdma_512	= 0x00700000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_64	drivers/net/natsemi.c	/^	RxMxdma_64	= 0x500000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_64	drivers/net/ns8382x.c	/^	RxMxdma_64	= 0x00400000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_8	drivers/net/natsemi.c	/^	RxMxdma_8	= 0x200000,$/;"	e	enum:RxConfig_bits	file:
RxMxdma_8	drivers/net/ns8382x.c	/^	RxMxdma_8	= 0x00100000,$/;"	e	enum:RxConfig_bits	file:
RxOK	drivers/net/rtl8139.c	/^	TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,$/;"	e	enum:IntrStatusBits	file:
RxOK	drivers/net/rtl8169.c	/^	RxOK = 0x01,$/;"	e	enum:RTL8169_register_content	file:
RxOff	drivers/net/natsemi.c	/^	RxOff		= 0x08,$/;"	e	enum:ChipCmdBits	file:
RxOff	drivers/net/ns8382x.c	/^	RxOff = 0x08,$/;"	e	enum:ChipCmdBits	file:
RxOn	drivers/net/natsemi.c	/^	RxOn		= 0x04,$/;"	e	enum:ChipCmdBits	file:
RxOn	drivers/net/ns8382x.c	/^	RxOn = 0x04,$/;"	e	enum:ChipCmdBits	file:
RxOverflow	drivers/net/rtl8139.c	/^	RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,$/;"	e	enum:IntrStatusBits	file:
RxOverflow	drivers/net/rtl8169.c	/^	RxOverflow = 0x10,$/;"	e	enum:RTL8169_register_content	file:
RxPacketMaxSize	drivers/net/rtl8169.c	/^#define RxPacketMaxSize /;"	d	file:
RxPhysical	drivers/net/rtl8139.c	/^	RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,$/;"	e	enum:RxStatusBits	file:
RxRES	drivers/net/rtl8169.c	/^	RxRES = 0x00200000,$/;"	e	enum:RTL8169_register_content	file:
RxRUNT	drivers/net/rtl8169.c	/^	RxRUNT = 0x00100000,$/;"	e	enum:RTL8169_register_content	file:
RxRWT	drivers/net/rtl8169.c	/^	RxRWT = 0x00400000,$/;"	e	enum:RTL8169_register_content	file:
RxReset	drivers/net/natsemi.c	/^	RxReset		= 0x20,$/;"	e	enum:ChipCmdBits	file:
RxReset	drivers/net/ns8382x.c	/^	RxReset = 0x20,$/;"	e	enum:ChipCmdBits	file:
RxRingPtr	drivers/net/natsemi.c	/^	RxRingPtr	= 0x30,$/;"	e	enum:register_offsets	file:
RxRingPtr	drivers/net/ns8382x.c	/^	RxRingPtr = 0x30,$/;"	e	enum:register_offsets	file:
RxRingPtrHi	drivers/net/ns8382x.c	/^	RxRingPtrHi = 0x34,$/;"	e	enum:register_offsets	file:
RxRunt	drivers/net/rtl8139.c	/^	RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,$/;"	e	enum:RxStatusBits	file:
RxStatusBits	drivers/net/rtl8139.c	/^enum RxStatusBits {$/;"	g	file:
RxStatusOK	drivers/net/rtl8139.c	/^	RxBadAlign=0x0002, RxStatusOK=0x0001,$/;"	e	enum:RxStatusBits	file:
RxStripCRC	drivers/net/ns8382x.c	/^	RxStripCRC	= 0x20000000,$/;"	e	enum:RxConfig_bits	file:
RxTooLong	drivers/net/rtl8139.c	/^	RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,$/;"	e	enum:RxStatusBits	file:
RxUnderrun	drivers/net/rtl8139.c	/^	RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,$/;"	e	enum:IntrStatusBits	file:
RxUnderrun	drivers/net/rtl8169.c	/^	RxUnderrun = 0x20,$/;"	e	enum:RTL8169_register_content	file:
Rx_COE_EN_	drivers/usb/eth/smsc95xx.c	/^#define Rx_COE_EN_	/;"	d	file:
S	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define S /;"	d
S	lib/sha1.c	/^#define S(/;"	d	file:
S0	lib/sha256.c	/^#define S0(/;"	d	file:
S0SEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define S0SEL	/;"	d
S0SEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define S0SEL_P	/;"	d
S1	lib/sha256.c	/^#define S1(/;"	d	file:
S12M	arch/arm/include/asm/arch-omap3/clock.h	/^#define S12M	/;"	d
S13M	arch/arm/include/asm/arch-omap3/clock.h	/^#define S13M	/;"	d
S16	fs/jffs2/compr_lzo.c	/^#define S16 /;"	d	file:
S16_MAX	include/linux/kernel.h	/^#define S16_MAX	/;"	d
S16_MIN	include/linux/kernel.h	/^#define S16_MIN	/;"	d
S19_2M	arch/arm/include/asm/arch-omap3/clock.h	/^#define S19_2M	/;"	d
S1D_REGS	board/esd/common/lcd.h	/^} S1D_REGS;$/;"	t	typeref:struct:__anon5a5858080108
S1D_WRITE_PALETTE	board/esd/common/lcd.h	/^#define S1D_WRITE_PALETTE(/;"	d
S1SEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define S1SEL	/;"	d
S1SEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define S1SEL_P	/;"	d
S2	lib/sha256.c	/^#define S2(/;"	d	file:
S24M	arch/arm/include/asm/arch-omap3/clock.h	/^#define S24M	/;"	d
S26M	arch/arm/include/asm/arch-omap3/clock.h	/^#define S26M	/;"	d
S2FCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2FCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2FCOLD_RESET	/;"	d
S2F_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2F_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define S2F_RESET	/;"	d
S2MPS11_LDO26_ENABLE	include/power/s2mps11.h	/^#define S2MPS11_LDO26_ENABLE	/;"	d
S2MPS11_REG_B10CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B10CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B10CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B10CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B1CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B1CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B1CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B1CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B2CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B2CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B2CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B2CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B3CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B3CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B3CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B3CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B4CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B4CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B4CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B4CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B5CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B5CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B5CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B5CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B5CTRL3	include/power/s2mps11.h	/^	S2MPS11_REG_B5CTRL3,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B5CTRL4	include/power/s2mps11.h	/^	S2MPS11_REG_B5CTRL4,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B5CTRL5	include/power/s2mps11.h	/^	S2MPS11_REG_B5CTRL5,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B6CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B6CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B6CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B6CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B7CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B7CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B7CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B7CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B8CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B8CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B8CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B8CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B9CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_B9CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_B9CTRL2	include/power/s2mps11.h	/^	S2MPS11_REG_B9CTRL2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_BUCK5_SW	include/power/s2mps11.h	/^	S2MPS11_REG_BUCK5_SW,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_BU_CHG	include/power/s2mps11.h	/^	S2MPS11_REG_BU_CHG,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_COUNT	include/power/s2mps11.h	/^	S2MPS11_REG_COUNT,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_CTRL1	include/power/s2mps11.h	/^	S2MPS11_REG_CTRL1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_ETC_TEST	include/power/s2mps11.h	/^	S2MPS11_REG_ETC_TEST,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_ID	include/power/s2mps11.h	/^	S2MPS11_REG_ID = 0,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_INT1	include/power/s2mps11.h	/^	S2MPS11_REG_INT1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_INT1M	include/power/s2mps11.h	/^	S2MPS11_REG_INT1M,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_INT2	include/power/s2mps11.h	/^	S2MPS11_REG_INT2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_INT2M	include/power/s2mps11.h	/^	S2MPS11_REG_INT2M,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_INT3	include/power/s2mps11.h	/^	S2MPS11_REG_INT3,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_INT3M	include/power/s2mps11.h	/^	S2MPS11_REG_INT3M,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L10CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L10CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L11CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L11CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L12CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L12CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L13CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L13CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L14CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L14CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L15CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L15CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L16CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L16CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L17CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L17CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L18CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L18CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L19CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L19CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L1CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L1CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L20CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L20CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L21CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L21CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L22CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L22CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L23CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L23CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L24CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L24CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L25CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L25CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L26CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L26CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L27CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L27CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L28CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L28CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L29CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L29CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L2CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L2CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L30CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L30CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L31CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L31CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L32CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L32CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L33CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L33CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L34CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L34CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L35CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L35CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L36CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L36CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L37CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L37CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L38CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L38CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L3CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L3CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L4CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L4CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L5CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L5CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L6CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L6CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L7CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L7CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L8CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L8CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_L9CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_L9CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO17_24	include/power/s2mps11.h	/^	S2MPS11_REG_LDO17_24,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO17_24_OVC	include/power/s2mps11.h	/^	S2MPS11_REG_LDO17_24_OVC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO1_8	include/power/s2mps11.h	/^	S2MPS11_REG_LDO1_8,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO1_8_OVC	include/power/s2mps11.h	/^	S2MPS11_REG_LDO1_8_OVC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO25_32	include/power/s2mps11.h	/^	S2MPS11_REG_LDO25_32,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO25_32_OVC	include/power/s2mps11.h	/^	S2MPS11_REG_LDO25_32_OVC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO33_38	include/power/s2mps11.h	/^	S2MPS11_REG_LDO33_38,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO33_38_OVC	include/power/s2mps11.h	/^	S2MPS11_REG_LDO33_38_OVC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO9_16	include/power/s2mps11.h	/^	S2MPS11_REG_LDO9_16,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_LDO9_16_OVC	include/power/s2mps11.h	/^	S2MPS11_REG_LDO9_16_OVC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_OFFSRC	include/power/s2mps11.h	/^	S2MPS11_REG_OFFSRC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_PWRONSRC	include/power/s2mps11.h	/^	S2MPS11_REG_PWRONSRC,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RAMP	include/power/s2mps11.h	/^	S2MPS11_REG_RAMP,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RAMP_BUCK	include/power/s2mps11.h	/^	S2MPS11_REG_RAMP_BUCK,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED1	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED2	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED3	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED3,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED4	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED4,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED5	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED5,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED6	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED6,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED7	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED7,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RESERVED8	include/power/s2mps11.h	/^	S2MPS11_REG_RESERVED8,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RSVD3	include/power/s2mps11.h	/^	S2MPS11_REG_RSVD3,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_RTC_CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_RTC_CTRL,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_STATUS1	include/power/s2mps11.h	/^	S2MPS11_REG_STATUS1,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_STATUS2	include/power/s2mps11.h	/^	S2MPS11_REG_STATUS2,$/;"	e	enum:s2mps11_reg
S2MPS11_REG_WDRSTEN_CTRL	include/power/s2mps11.h	/^	S2MPS11_REG_WDRSTEN_CTRL,$/;"	e	enum:s2mps11_reg
S3	lib/sha256.c	/^#define S3(/;"	d	file:
S32	fs/jffs2/compr_lzo.c	/^#define S32 /;"	d	file:
S32	lib/lz4_wrapper.c	/^typedef  int32_t S32;$/;"	t	typeref:typename:int32_t	file:
S32V234_DRAM_BASE1	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_DRAM_BASE1 /;"	d	file:
S32V234_DRAM_BASE2	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_DRAM_BASE2 /;"	d	file:
S32V234_DRAM_SIZE1	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_DRAM_SIZE1 /;"	d	file:
S32V234_DRAM_SIZE2	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_DRAM_SIZE2 /;"	d	file:
S32V234_IRAM_BASE	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_IRAM_BASE /;"	d	file:
S32V234_IRAM_SIZE	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_IRAM_SIZE /;"	d	file:
S32V234_PERIPH_BASE	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_PERIPH_BASE /;"	d	file:
S32V234_PERIPH_SIZE	arch/arm/cpu/armv8/s32v234/cpu.c	/^#define S32V234_PERIPH_SIZE /;"	d	file:
S32_MAX	include/linux/kernel.h	/^#define S32_MAX	/;"	d
S32_MIN	include/linux/kernel.h	/^#define S32_MIN	/;"	d
S38_4M	arch/arm/include/asm/arch-omap3/clock.h	/^#define S38_4M	/;"	d
S3C2400_MMC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C2400_MMC_BASE	/;"	d
S3C2410_ADC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C2410_ADC_BASE	/;"	d
S3C2410_ADDR_NALE	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_ADDR_NALE /;"	d	file:
S3C2410_ADDR_NCLE	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_ADDR_NCLE /;"	d	file:
S3C2410_ECCBYTES	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C2410_ECCBYTES	/;"	d
S3C2410_ECCSIZE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C2410_ECCSIZE	/;"	d
S3C2410_NAND_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C2410_NAND_BASE	/;"	d
S3C2410_NFCONF_4STEP	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_4STEP /;"	d	file:
S3C2410_NFCONF_512BYTE	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_512BYTE /;"	d	file:
S3C2410_NFCONF_EN	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_EN /;"	d	file:
S3C2410_NFCONF_INITECC	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_INITECC /;"	d	file:
S3C2410_NFCONF_TACLS	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_TACLS(/;"	d	file:
S3C2410_NFCONF_TWRPH0	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_TWRPH0(/;"	d	file:
S3C2410_NFCONF_TWRPH1	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_TWRPH1(/;"	d	file:
S3C2410_NFCONF_nFCE	drivers/mtd/nand/s3c2410_nand.c	/^#define S3C2410_NFCONF_nFCE /;"	d	file:
S3C2410_SDICMDCON_CMDSTART	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDCON_CMDSTART	/;"	d	file:
S3C2410_SDICMDCON_INDEX	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDCON_INDEX	/;"	d	file:
S3C2410_SDICMDCON_LONGRSP	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDCON_LONGRSP	/;"	d	file:
S3C2410_SDICMDCON_SENDERHOST	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDCON_SENDERHOST	/;"	d	file:
S3C2410_SDICMDCON_WAITRSP	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDCON_WAITRSP	/;"	d	file:
S3C2410_SDICMDSTAT_CMDSENT	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDSTAT_CMDSENT	/;"	d	file:
S3C2410_SDICMDSTAT_CMDTIMEOUT	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDSTAT_CMDTIMEOUT	/;"	d	file:
S3C2410_SDICMDSTAT_CRCFAIL	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDSTAT_CRCFAIL	/;"	d	file:
S3C2410_SDICMDSTAT_RSPFIN	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICMDSTAT_RSPFIN	/;"	d	file:
S3C2410_SDICON_CLOCKTYPE	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICON_CLOCKTYPE	/;"	d	file:
S3C2410_SDICON_FIFORESET	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDICON_FIFORESET	/;"	d	file:
S3C2410_SDIDCON_BLKNUM	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_BLKNUM	/;"	d	file:
S3C2410_SDIDCON_BLOCKMODE	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_BLOCKMODE	/;"	d	file:
S3C2410_SDIDCON_RXAFTERCMD	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_RXAFTERCMD	/;"	d	file:
S3C2410_SDIDCON_TXAFTERRESP	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_TXAFTERRESP	/;"	d	file:
S3C2410_SDIDCON_WIDEBUS	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_WIDEBUS	/;"	d	file:
S3C2410_SDIDCON_XFER_RXSTART	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_XFER_RXSTART	/;"	d	file:
S3C2410_SDIDCON_XFER_TXSTART	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDCON_XFER_TXSTART	/;"	d	file:
S3C2410_SDIDSTA_CRCFAIL	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDSTA_CRCFAIL	/;"	d	file:
S3C2410_SDIDSTA_DATATIMEOUT	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDSTA_DATATIMEOUT	/;"	d	file:
S3C2410_SDIDSTA_FIFOFAIL	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDSTA_FIFOFAIL	/;"	d	file:
S3C2410_SDIDSTA_RXCRCFAIL	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDSTA_RXCRCFAIL	/;"	d	file:
S3C2410_SDIDSTA_XFERFINISH	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIDSTA_XFERFINISH	/;"	d	file:
S3C2410_SDIFSTA_COUNTMASK	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIFSTA_COUNTMASK	/;"	d	file:
S3C2410_SDIFSTA_TFHALF	drivers/mmc/s3c_sdi.c	/^#define S3C2410_SDIFSTA_TFHALF	/;"	d	file:
S3C2410_SDI_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C2410_SDI_BASE	/;"	d
S3C2440_ADC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C2440_ADC_BASE	/;"	d
S3C2440_ECCBYTES	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C2440_ECCBYTES	/;"	d
S3C2440_ECCSIZE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C2440_ECCSIZE	/;"	d
S3C2440_NAND_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C2440_NAND_BASE	/;"	d
S3C2440_SDICON_SDRESET	drivers/mmc/s3c_sdi.c	/^#define S3C2440_SDICON_SDRESET	/;"	d	file:
S3C2440_SDIDCON_DATSTART	drivers/mmc/s3c_sdi.c	/^#define S3C2440_SDIDCON_DATSTART	/;"	d	file:
S3C2440_SDIDCON_DS_WORD	drivers/mmc/s3c_sdi.c	/^#define S3C2440_SDIDCON_DS_WORD	/;"	d	file:
S3C2440_SDI_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C2440_SDI_BASE	/;"	d
S3C24X0_ADC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_ADC_BASE	/;"	d
S3C24X0_CLOCK_POWER_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_CLOCK_POWER_BASE	/;"	d
S3C24X0_CLOCK_POWER_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_CLOCK_POWER_BASE	/;"	d
S3C24X0_CLOCK_POWER_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_CLOCK_POWER_BASE	/;"	d
S3C24X0_DMA_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_DMA_BASE	/;"	d
S3C24X0_DMA_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_DMA_BASE	/;"	d
S3C24X0_DMA_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_DMA_BASE	/;"	d
S3C24X0_GPIO_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_GPIO_BASE	/;"	d
S3C24X0_GPIO_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_GPIO_BASE	/;"	d
S3C24X0_GPIO_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_GPIO_BASE	/;"	d
S3C24X0_I2C_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_I2C_BASE	/;"	d
S3C24X0_I2C_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_I2C_BASE	/;"	d
S3C24X0_I2C_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_I2C_BASE	/;"	d
S3C24X0_I2S_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_I2S_BASE	/;"	d
S3C24X0_I2S_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_I2S_BASE	/;"	d
S3C24X0_I2S_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_I2S_BASE	/;"	d
S3C24X0_INTERRUPT_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_INTERRUPT_BASE	/;"	d
S3C24X0_INTERRUPT_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_INTERRUPT_BASE	/;"	d
S3C24X0_INTERRUPT_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_INTERRUPT_BASE	/;"	d
S3C24X0_LCD_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_LCD_BASE	/;"	d
S3C24X0_LCD_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_LCD_BASE	/;"	d
S3C24X0_LCD_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_LCD_BASE	/;"	d
S3C24X0_MEMCTL_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_MEMCTL_BASE	/;"	d
S3C24X0_MEMCTL_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_MEMCTL_BASE	/;"	d
S3C24X0_MEMCTL_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_MEMCTL_BASE	/;"	d
S3C24X0_RTC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_RTC_BASE	/;"	d
S3C24X0_RTC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_RTC_BASE	/;"	d
S3C24X0_RTC_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_RTC_BASE	/;"	d
S3C24X0_SPI_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_SPI_BASE	/;"	d
S3C24X0_SPI_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_SPI_BASE	/;"	d
S3C24X0_SPI_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_SPI_BASE	/;"	d
S3C24X0_SPI_CHANNELS	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_SPI_CHANNELS	/;"	d
S3C24X0_SPI_CHANNELS	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_SPI_CHANNELS	/;"	d
S3C24X0_SPI_CHANNELS	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_SPI_CHANNELS	/;"	d
S3C24X0_TIMER_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_TIMER_BASE	/;"	d
S3C24X0_TIMER_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_TIMER_BASE	/;"	d
S3C24X0_TIMER_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_TIMER_BASE	/;"	d
S3C24X0_UART0	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^	S3C24X0_UART0,$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART0	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^	S3C24X0_UART0,$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART0	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^	S3C24X0_UART0,$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART1	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^	S3C24X0_UART1,$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART1	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^	S3C24X0_UART1,$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART1	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^	S3C24X0_UART1,$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART2	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^	S3C24X0_UART2$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART2	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^	S3C24X0_UART2$/;"	e	enum:s3c24x0_uarts_nr
S3C24X0_UART_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_UART_BASE	/;"	d
S3C24X0_UART_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_UART_BASE	/;"	d
S3C24X0_UART_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_UART_BASE	/;"	d
S3C24X0_UART_CHANNELS	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_UART_CHANNELS	/;"	d
S3C24X0_UART_CHANNELS	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_UART_CHANNELS	/;"	d
S3C24X0_UART_CHANNELS	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_UART_CHANNELS	/;"	d
S3C24X0_USB_DEVICE_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_USB_DEVICE_BASE	/;"	d
S3C24X0_USB_DEVICE_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_USB_DEVICE_BASE	/;"	d
S3C24X0_USB_DEVICE_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_USB_DEVICE_BASE	/;"	d
S3C24X0_USB_HOST_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_USB_HOST_BASE	/;"	d
S3C24X0_USB_HOST_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_USB_HOST_BASE	/;"	d
S3C24X0_USB_HOST_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_USB_HOST_BASE	/;"	d
S3C24X0_WATCHDOG_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define S3C24X0_WATCHDOG_BASE	/;"	d
S3C24X0_WATCHDOG_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define S3C24X0_WATCHDOG_BASE	/;"	d
S3C24X0_WATCHDOG_BASE	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define S3C24X0_WATCHDOG_BASE	/;"	d
S3C_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_BASE	/;"	d
S3C_GPIO_CON	drivers/gpio/s3c2440_gpio.c	/^#define S3C_GPIO_CON	/;"	d	file:
S3C_GPIO_DAT	drivers/gpio/s3c2440_gpio.c	/^#define S3C_GPIO_DAT	/;"	d	file:
S3C_INT_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_INT_BASE	/;"	d
S3C_MEDIA_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_MEDIA_BASE	/;"	d
S3C_QOS_AXI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_QOS_AXI_BASE	/;"	d
S3C_QOS_CCI0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_QOS_CCI0_BASE	/;"	d
S3C_QOS_CCI1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_QOS_CCI1_BASE	/;"	d
S3C_QOS_DCACHE_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_QOS_DCACHE_BASE	/;"	d
S3C_QOS_MXI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define S3C_QOS_MXI_BASE	/;"	d
S3_devices	cmd/ambapp.c	/^static ambapp_device_name S3_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
S5M8767_BUCK1	include/power/s5m8767.h	/^	S5M8767_BUCK1 = 0,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK2	include/power/s5m8767.h	/^	S5M8767_BUCK2,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK3	include/power/s5m8767.h	/^	S5M8767_BUCK3,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK4	include/power/s5m8767.h	/^	S5M8767_BUCK4,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK5	include/power/s5m8767.h	/^	S5M8767_BUCK5,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK6	include/power/s5m8767.h	/^	S5M8767_BUCK6,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK7	include/power/s5m8767.h	/^	S5M8767_BUCK7,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK8	include/power/s5m8767.h	/^	S5M8767_BUCK8,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK9	include/power/s5m8767.h	/^	S5M8767_BUCK9,$/;"	e	enum:s5m8767_regnum
S5M8767_BUCK_DRIVER	include/power/s5m8767.h	/^#define S5M8767_BUCK_DRIVER	/;"	d
S5M8767_EN32KHZ_CP	include/power/s5m8767.h	/^	S5M8767_EN32KHZ_CP,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO1	include/power/s5m8767.h	/^	S5M8767_LDO1,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO10	include/power/s5m8767.h	/^	S5M8767_LDO10,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO11	include/power/s5m8767.h	/^	S5M8767_LDO11,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO12	include/power/s5m8767.h	/^	S5M8767_LDO12,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO13	include/power/s5m8767.h	/^	S5M8767_LDO13,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO14	include/power/s5m8767.h	/^	S5M8767_LDO14,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO15	include/power/s5m8767.h	/^	S5M8767_LDO15,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO16	include/power/s5m8767.h	/^	S5M8767_LDO16,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO17	include/power/s5m8767.h	/^	S5M8767_LDO17,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO18	include/power/s5m8767.h	/^	S5M8767_LDO18,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO19	include/power/s5m8767.h	/^	S5M8767_LDO19,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO2	include/power/s5m8767.h	/^	S5M8767_LDO2,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO20	include/power/s5m8767.h	/^	S5M8767_LDO20,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO21	include/power/s5m8767.h	/^	S5M8767_LDO21,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO22	include/power/s5m8767.h	/^	S5M8767_LDO22,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO23	include/power/s5m8767.h	/^	S5M8767_LDO23,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO24	include/power/s5m8767.h	/^	S5M8767_LDO24,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO25	include/power/s5m8767.h	/^	S5M8767_LDO25,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO26	include/power/s5m8767.h	/^	S5M8767_LDO26,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO27	include/power/s5m8767.h	/^	S5M8767_LDO27,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO28	include/power/s5m8767.h	/^	S5M8767_LDO28,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO3	include/power/s5m8767.h	/^	S5M8767_LDO3,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO4	include/power/s5m8767.h	/^	S5M8767_LDO4,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO5	include/power/s5m8767.h	/^	S5M8767_LDO5,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO6	include/power/s5m8767.h	/^	S5M8767_LDO6,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO7	include/power/s5m8767.h	/^	S5M8767_LDO7,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO8	include/power/s5m8767.h	/^	S5M8767_LDO8,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO9	include/power/s5m8767.h	/^	S5M8767_LDO9,$/;"	e	enum:s5m8767_regnum
S5M8767_LDO_DRIVER	include/power/s5m8767.h	/^#define S5M8767_LDO_DRIVER	/;"	d
S5M8767_NUM_OF_REGS	include/power/s5m8767.h	/^	S5M8767_NUM_OF_REGS,$/;"	e	enum:s5m8767_regnum
S5PC100_CLOCK_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_CLOCK_BASE	/;"	d
S5PC100_DMC_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_DMC_BASE	/;"	d
S5PC100_GPIO_A00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_A17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_A17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B0	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B0,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B1,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B2	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B2,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B3	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B3,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B4	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B4,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B5	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B5,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B6	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B6,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_B7	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_B7,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_GPIO_BASE	/;"	d
S5PC100_GPIO_C0	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C0,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C1,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C2	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C2,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C3	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C3,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C4	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C4,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C5	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C5,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C6	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C6,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_C7	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_C7,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D0	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D0,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D1,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D2	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D2,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D3	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D3,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D4	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D4,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D5	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D5,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D6	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D6,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_D7	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_D7,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_E17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_E17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F20,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F21,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F22,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F23,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F24,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F25,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F26,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F27,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F30,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F31,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F32,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F33,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F34,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F35,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F36,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_F37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_F37,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G20,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G21,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G22,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G23,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G24,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G25,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G26,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G27,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G30,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G31,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G32,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G33,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G34,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G35,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G36,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_G37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_G37,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H20,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H21,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H22,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H23,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H24,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H25,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H26,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H27,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H30,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H31,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H32,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H33,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H34,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H35,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H36,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_H37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_H37,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I0	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I0,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I1,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I2	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I2,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I3	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I3,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I4	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I4,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I5	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I5,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I6	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I6,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_I7	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_I7,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J20,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J21,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J22,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J23,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J24,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J25,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J26,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J27,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J30,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J31,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J32,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J33,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J34,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J35,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J36,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J37,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J40	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J40,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J41	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J41,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J42	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J42,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J43	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J43,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J44	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J44,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J45	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J45,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J46	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J46,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_J47	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_J47,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K20,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K21,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K22,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K23,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K24,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K25,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K26,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K27,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K30,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K31,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K32,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K33,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K34,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K35,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K36,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_K37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_K37,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L00,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L01,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L02,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L03,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L04,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L05,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L06,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L07,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L10,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L11,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L12,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L13,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L14,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L15,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L16,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L17,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L20,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L21,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L22,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L23,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L24,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L25,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L26,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L27,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L30,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L31,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L32,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L33,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L34,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L35,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L36,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L37,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L40	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L40,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L41	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L41,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L42	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L42,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L43	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L43,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L44	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L44,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L45	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L45,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L46	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L46,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_L47	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_L47,$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_MAX_PORT	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC100_GPIO_MAX_PORT$/;"	e	enum:s5pc100_gpio_pin
S5PC100_GPIO_NUM_PARTS	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5PC100_GPIO_NUM_PARTS	/;"	d
S5PC100_INFORM0	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC100_INFORM0	/;"	d
S5PC100_MMC_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_MMC_BASE	/;"	d
S5PC100_ONENAND_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_ONENAND_BASE	/;"	d
S5PC100_OTHERS	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC100_OTHERS	/;"	d
S5PC100_PRO_ID	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_PRO_ID	/;"	d
S5PC100_PWMTIMER_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_PWMTIMER_BASE	/;"	d
S5PC100_RST_STAT	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC100_RST_STAT	/;"	d
S5PC100_SLEEP_WAKEUP	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC100_SLEEP_WAKEUP	/;"	d
S5PC100_SROMC_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_SROMC_BASE	/;"	d
S5PC100_SWRESET	arch/arm/mach-s5pc1xx/reset.S	/^#define S5PC100_SWRESET	/;"	d	file:
S5PC100_UART_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_UART_BASE	/;"	d
S5PC100_VIC0_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_VIC0_BASE	/;"	d
S5PC100_VIC1_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_VIC1_BASE	/;"	d
S5PC100_VIC2_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_VIC2_BASE	/;"	d
S5PC100_WAKEUP_STAT	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC100_WAKEUP_STAT	/;"	d
S5PC100_WATCHDOG_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC100_WATCHDOG_BASE	/;"	d
S5PC110_CLOCK_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_CLOCK_BASE	/;"	d
S5PC110_DMC0_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_DMC0_BASE	/;"	d
S5PC110_DMC1_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_DMC1_BASE	/;"	d
S5PC110_GPIO_A00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_A17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_A17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B0	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B0,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B1,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B2	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B2,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B3	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B3,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B4	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B4,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B5	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B5,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B6	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B6,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_B7	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_B7,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_GPIO_BASE	/;"	d
S5PC110_GPIO_C00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_C17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_C17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_D17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_D17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_E17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_E17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F20,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F21,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F22,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F23,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F24,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F25,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F26,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F27,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F30,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F31,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F32,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F33,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F34,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F35,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F36,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_F37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_F37,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G20,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G21,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G22,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G23,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G24,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G25,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G26,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G27,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G30,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G31,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G32,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G33,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G34,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G35,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G36,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_G37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_G37,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H20,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H21,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H22,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H23,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H24,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H25,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H26,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H27,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H30,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H31,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H32,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H33,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H34,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H35,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H36,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_H37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_H37,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I0	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I0,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I1,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I2	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I2,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I3	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I3,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I4	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I4,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I5	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I5,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I6	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I6,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_I7	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_I7,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J00	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J00,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J01	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J01,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J02	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J02,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J03	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J03,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J04	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J04,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J05	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J05,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J06	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J06,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J07	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J07,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J10	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J10,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J11	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J11,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J12	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J12,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J13	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J13,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J14	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J14,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J15	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J15,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J16	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J16,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J17	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J17,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J20	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J20,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J21	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J21,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J22	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J22,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J23	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J23,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J24	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J24,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J25	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J25,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J26	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J26,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J27	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J27,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J30	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J30,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J31	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J31,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J32	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J32,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J33	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J33,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J34	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J34,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J35	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J35,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J36	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J36,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J37	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J37,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J40	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J40,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J41	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J41,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J42	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J42,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J43	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J43,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J44	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J44,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J45	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J45,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J46	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J46,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_J47	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_J47,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MAX_PORT	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MAX_PORT$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP010	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP010,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP011	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP011,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP012	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP012,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP013	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP013,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP014	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP014,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP015	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP015,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP016	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP016,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP017	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP017,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP020	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP020,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP021	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP021,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP022	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP022,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP023	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP023,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP024	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP024,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP025	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP025,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP026	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP026,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP027	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP027,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP030	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP030,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP031	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP031,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP032	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP032,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP033	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP033,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP034	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP034,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP035	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP035,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP036	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP036,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP037	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP037,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP040	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP040,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP041	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP041,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP042	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP042,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP043	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP043,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP044	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP044,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP045	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP045,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP046	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP046,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP047	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP047,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP050	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP050,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP051	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP051,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP052	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP052,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP053	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP053,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP054	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP054,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP055	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP055,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP056	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP056,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP057	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP057,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP060	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP060,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP061	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP061,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP062	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP062,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP063	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP063,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP064	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP064,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP065	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP065,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP066	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP066,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP067	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP067,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP070	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP070,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP071	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP071,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP072	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP072,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP073	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP073,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP074	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP074,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP075	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP075,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP076	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP076,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP077	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP077,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP100	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP100,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP101	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP101,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP102	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP102,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP103	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP103,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP104	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP104,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP105	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP105,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP106	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP106,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP107	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP107,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP110	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP110,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP111	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP111,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP112	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP112,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP113	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP113,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP114	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP114,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP115	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP115,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP116	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP116,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP117	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP117,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP120	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP120,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP121	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP121,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP122	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP122,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP123	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP123,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP124	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP124,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP125	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP125,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP126	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP126,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP127	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP127,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP130	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP130,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP131	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP131,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP132	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP132,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP133	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP133,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP134	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP134,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP135	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP135,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP136	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP136,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP137	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP137,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP140	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP140,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP141	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP141,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP142	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP142,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP143	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP143,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP144	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP144,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP145	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP145,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP146	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP146,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP147	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP147,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP150	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP150,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP151	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP151,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP152	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP152,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP153	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP153,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP154	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP154,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP155	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP155,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP156	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP156,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP157	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP157,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP160	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP160,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP161	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP161,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP162	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP162,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP163	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP163,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP164	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP164,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP165	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP165,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP166	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP166,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP167	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP167,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP170	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP170,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP171	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP171,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP172	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP172,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP173	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP173,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP174	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP174,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP175	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP175,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP176	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP176,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP177	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP177,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP180	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP180,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP181	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP181,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP182	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP182,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP183	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP183,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP184	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP184,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP185	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP185,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP186	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP186,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP187	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP187,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP200	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP200,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP201	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP201,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP202	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP202,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP203	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP203,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP204	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP204,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP205	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP205,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP206	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP206,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP207	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP207,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP210	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP210,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP211	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP211,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP212	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP212,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP213	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP213,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP214	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP214,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP215	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP215,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP216	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP216,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP217	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP217,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP220	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP220,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP221	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP221,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP222	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP222,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP223	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP223,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP224	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP224,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP225	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP225,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP226	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP226,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP227	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP227,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP230	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP230,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP231	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP231,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP232	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP232,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP233	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP233,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP234	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP234,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP235	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP235,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP236	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP236,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP237	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP237,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP240	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP240,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP241	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP241,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP242	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP242,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP243	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP243,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP244	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP244,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP245	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP245,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP246	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP246,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP247	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP247,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP250	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP250,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP251	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP251,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP252	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP252,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP253	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP253,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP254	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP254,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP255	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP255,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP256	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP256,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP257	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP257,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP260	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP260,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP261	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP261,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP262	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP262,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP263	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP263,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP264	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP264,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP265	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP265,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP266	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP266,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP267	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP267,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP270	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP270,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP271	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP271,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP272	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP272,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP273	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP273,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP274	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP274,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP275	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP275,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP276	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP276,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP277	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP277,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP280	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP280,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP281	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP281,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP282	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP282,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP283	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP283,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP284	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP284,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP285	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP285,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP286	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP286,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_MP287	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	S5PC110_GPIO_MP287,$/;"	e	enum:s5pc110_gpio_pin
S5PC110_GPIO_NUM_PARTS	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5PC110_GPIO_NUM_PARTS	/;"	d
S5PC110_INFORM0	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC110_INFORM0	/;"	d
S5PC110_MMC_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_MMC_BASE	/;"	d
S5PC110_OTG_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_OTG_BASE	/;"	d
S5PC110_OTHERS	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC110_OTHERS	/;"	d
S5PC110_PHY_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_PHY_BASE	/;"	d
S5PC110_PRO_ID	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_PRO_ID	/;"	d
S5PC110_PWMTIMER_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_PWMTIMER_BASE	/;"	d
S5PC110_RST_STAT	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC110_RST_STAT	/;"	d
S5PC110_SLEEP_WAKEUP	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC110_SLEEP_WAKEUP	/;"	d
S5PC110_SROMC_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_SROMC_BASE	/;"	d
S5PC110_SWRESET	arch/arm/mach-s5pc1xx/reset.S	/^#define S5PC110_SWRESET	/;"	d	file:
S5PC110_UART_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_UART_BASE	/;"	d
S5PC110_USB_PHY_CON	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC110_USB_PHY_CON	/;"	d
S5PC110_USB_PHY_CONTROL	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_USB_PHY_CONTROL /;"	d
S5PC110_VIC0_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_VIC0_BASE	/;"	d
S5PC110_VIC1_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_VIC1_BASE	/;"	d
S5PC110_VIC2_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_VIC2_BASE	/;"	d
S5PC110_VIC3_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_VIC3_BASE	/;"	d
S5PC110_WAKEUP_STAT	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define S5PC110_WAKEUP_STAT	/;"	d
S5PC110_WATCHDOG_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC110_WATCHDOG_BASE	/;"	d
S5PC1XX_ADDR_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5PC1XX_ADDR_BASE	/;"	d
S5P_CHECK_DIDLE	include/configs/exynos5-common.h	/^#define S5P_CHECK_DIDLE	/;"	d
S5P_CHECK_DIDLE	include/configs/origen.h	/^#define S5P_CHECK_DIDLE	/;"	d
S5P_CHECK_DIDLE	include/configs/smdkv310.h	/^#define S5P_CHECK_DIDLE	/;"	d
S5P_CHECK_LPA	include/configs/exynos5-common.h	/^#define S5P_CHECK_LPA	/;"	d
S5P_CHECK_LPA	include/configs/origen.h	/^#define S5P_CHECK_LPA	/;"	d
S5P_CHECK_LPA	include/configs/smdkv310.h	/^#define S5P_CHECK_LPA	/;"	d
S5P_CHECK_SLEEP	include/configs/exynos5-common.h	/^#define S5P_CHECK_SLEEP	/;"	d
S5P_CHECK_SLEEP	include/configs/origen.h	/^#define S5P_CHECK_SLEEP	/;"	d
S5P_CHECK_SLEEP	include/configs/smdkv310.h	/^#define S5P_CHECK_SLEEP	/;"	d
S5P_CPU_NAME	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define S5P_CPU_NAME	/;"	d
S5P_GPIO_DRV_1X	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_DRV_1X	/;"	d
S5P_GPIO_DRV_1X	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_DRV_1X	/;"	d
S5P_GPIO_DRV_2X	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_DRV_2X	/;"	d
S5P_GPIO_DRV_2X	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_DRV_2X	/;"	d
S5P_GPIO_DRV_3X	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_DRV_3X	/;"	d
S5P_GPIO_DRV_3X	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_DRV_3X	/;"	d
S5P_GPIO_DRV_4X	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_DRV_4X	/;"	d
S5P_GPIO_DRV_4X	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_DRV_4X	/;"	d
S5P_GPIO_DRV_FAST	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_DRV_FAST	/;"	d
S5P_GPIO_DRV_FAST	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_DRV_FAST	/;"	d
S5P_GPIO_DRV_SLOW	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_DRV_SLOW	/;"	d
S5P_GPIO_DRV_SLOW	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_DRV_SLOW	/;"	d
S5P_GPIO_FUNC	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_FUNC(/;"	d
S5P_GPIO_FUNC	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_FUNC(/;"	d
S5P_GPIO_GET_PIN	drivers/gpio/s5p_gpio.c	/^#define S5P_GPIO_GET_PIN(/;"	d	file:
S5P_GPIO_INPUT	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_INPUT	/;"	d
S5P_GPIO_INPUT	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_INPUT	/;"	d
S5P_GPIO_IRQ	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_IRQ	/;"	d
S5P_GPIO_IRQ	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_IRQ	/;"	d
S5P_GPIO_OUTPUT	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_OUTPUT	/;"	d
S5P_GPIO_OUTPUT	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_OUTPUT	/;"	d
S5P_GPIO_PULL_DOWN	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_PULL_DOWN	/;"	d
S5P_GPIO_PULL_DOWN	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_PULL_DOWN	/;"	d
S5P_GPIO_PULL_NONE	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_PULL_NONE	/;"	d
S5P_GPIO_PULL_NONE	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_PULL_NONE	/;"	d
S5P_GPIO_PULL_UP	arch/arm/mach-exynos/include/mach/gpio.h	/^#define S5P_GPIO_PULL_UP	/;"	d
S5P_GPIO_PULL_UP	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define S5P_GPIO_PULL_UP	/;"	d
S5P_MMC_DEV_OFFSET	arch/arm/mach-exynos/include/mach/mmc.h	/^#define S5P_MMC_DEV_OFFSET	/;"	d
S5P_MMC_DEV_OFFSET	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define S5P_MMC_DEV_OFFSET	/;"	d
S5P_NAME	drivers/mmc/s5p_sdhci.c	/^static char *S5P_NAME = "SAMSUNG SDHCI";$/;"	v	typeref:typename:char *	file:
S64_MAX	include/linux/kernel.h	/^#define S64_MAX	/;"	d
S64_MIN	include/linux/kernel.h	/^#define S64_MIN	/;"	d
S8	fs/jffs2/compr_lzo.c	/^#define S8 /;"	d	file:
S8_MAX	include/linux/kernel.h	/^#define S8_MAX	/;"	d
S8_MIN	include/linux/kernel.h	/^#define S8_MIN	/;"	d
SA	arch/sparc/cpu/leon2/start.S	/^#define SA(/;"	d	file:
SA	arch/sparc/cpu/leon3/start.S	/^#define SA(/;"	d	file:
SACK	drivers/usb/host/r8a66597.h	/^#define	SACK	/;"	d
SACKE	drivers/usb/host/r8a66597.h	/^#define	SACKE	/;"	d
SACR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SACR0	/;"	d
SACR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SACR1	/;"	d
SAC_REG_BASE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SAC_REG_BASE	/;"	d
SADD_LEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SADD_LEN	/;"	d
SADIV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SADIV	/;"	d
SADR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SADR	/;"	d
SAFEOUT_3_30V	include/power/max8997_pmic.h	/^#define SAFEOUT_3_30V /;"	d
SAFEOUT_4_85V	include/power/max8997_pmic.h	/^#define SAFEOUT_4_85V /;"	d
SAFEOUT_4_90V	include/power/max8997_pmic.h	/^#define SAFEOUT_4_90V /;"	d
SAFEOUT_4_95V	include/power/max8997_pmic.h	/^#define SAFEOUT_4_95V /;"	d
SAFE_MODE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SAFE_MODE	/;"	d
SAFE_MODE	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SAFE_MODE	/;"	d
SAFE_MODE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SAFE_MODE	/;"	d
SAHARA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SAHARA_BASE_ADDR	/;"	d
SAI0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SAI0_BASE_ADDR	/;"	d
SAI1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SAI1_BASE_ADDR /;"	d
SAI1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SAI1_BASE_ADDR	/;"	d
SAI1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	SAI1_CLK_ROOT = 74,$/;"	e	enum:clk_root_index
SAI1_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
SAI1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
SAI1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
SAI1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
SAI1_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
SAI1_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
SAI1_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
SAI1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI1_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
SAI1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SAI1_IPS_BASE_ADDR /;"	d
SAI2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SAI2_BASE_ADDR /;"	d
SAI2_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SAI2_BASE_ADDR	/;"	d
SAI2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	SAI2_CLK_ROOT = 75,$/;"	e	enum:clk_root_index
SAI2_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
SAI2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
SAI2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
SAI2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
SAI2_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
SAI2_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
SAI2_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
SAI2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
SAI2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SAI2_IPS_BASE_ADDR /;"	d
SAI3_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SAI3_BASE_ADDR	/;"	d
SAI3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	SAI3_CLK_ROOT = 76,$/;"	e	enum:clk_root_index
SAI3_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
SAI3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
SAI3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
SAI3_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
SAI3_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
SAI3_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
SAI3_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
SAI3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SAI3_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
SAI3_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SAI3_IPS_BASE_ADDR /;"	d
SAICR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SAICR	/;"	d
SAIMR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SAIMR	/;"	d
SAI_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SAI_BASE_ADDR /;"	d
SAMA5D3_H	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define SAMA5D3_H$/;"	d
SAMA5D3_MPDDRC_VERSION	arch/arm/mach-at91/mpddrc.c	/^#define SAMA5D3_MPDDRC_VERSION	/;"	d	file:
SAMA5D3_SMC_H	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^#define SAMA5D3_SMC_H$/;"	d
SAME_AS	lib/errno_str.c	/^#define SAME_AS(/;"	d	file:
SAMPLE_CNT	arch/x86/cpu/quark/mrc_util.h	/^#define SAMPLE_CNT	/;"	d
SAMPLE_DLY	arch/x86/cpu/quark/mrc_util.h	/^#define SAMPLE_DLY	/;"	d
SAMPLE_SIZE	arch/x86/cpu/quark/smc.h	/^#define SAMPLE_SIZE	/;"	d
SAMSUNG_BASE	arch/arm/mach-exynos/include/mach/cpu.h	/^#define SAMSUNG_BASE(/;"	d
SAMSUNG_BASE	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define SAMSUNG_BASE(/;"	d
SAMSUNG_BL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_BL_165	/;"	d
SAMSUNG_CASL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_CASL_165	/;"	d
SAMSUNG_RASWIDTH_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_RASWIDTH_165	/;"	d
SAMSUNG_SHARING	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_SHARING /;"	d
SAMSUNG_SIL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_SIL_165	/;"	d
SAMSUNG_TCKE_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TCKE_165	/;"	d
SAMSUNG_TDAL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TDAL_165	/;"	d
SAMSUNG_TDPL_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TDPL_165	/;"	d
SAMSUNG_TRAS_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TRAS_165	/;"	d
SAMSUNG_TRCD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TRCD_165	/;"	d
SAMSUNG_TRC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TRC_165	/;"	d
SAMSUNG_TRFC_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TRFC_165	/;"	d
SAMSUNG_TRP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TRP_165	/;"	d
SAMSUNG_TRRD_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TRRD_165	/;"	d
SAMSUNG_TWTR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TWTR_165	/;"	d
SAMSUNG_TXP_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_TXP_165	/;"	d
SAMSUNG_V_ACTIMA_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_V_ACTIMA_165	/;"	d
SAMSUNG_V_ACTIMB_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_V_ACTIMB_165	/;"	d
SAMSUNG_V_MCFG_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_V_MCFG_165(/;"	d
SAMSUNG_V_MR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_V_MR_165	/;"	d
SAMSUNG_WBST_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_WBST_165	/;"	d
SAMSUNG_XSR_165	arch/arm/include/asm/arch-omap3/mem.h	/^#define SAMSUNG_XSR_165	/;"	d
SANDBOX	arch/Kconfig	/^config SANDBOX$/;"	c	choice:choice07312ef30104
SANDBOX_ADC_ACTIVE	include/sandbox-adc.h	/^	SANDBOX_ADC_ACTIVE,$/;"	e	enum:sandbox_adc_status
SANDBOX_ADC_CHANNEL0_DATA	include/sandbox-adc.h	/^#define SANDBOX_ADC_CHANNEL0_DATA	/;"	d
SANDBOX_ADC_CHANNEL1_DATA	include/sandbox-adc.h	/^#define SANDBOX_ADC_CHANNEL1_DATA	/;"	d
SANDBOX_ADC_CHANNEL2_DATA	include/sandbox-adc.h	/^#define SANDBOX_ADC_CHANNEL2_DATA	/;"	d
SANDBOX_ADC_CHANNEL3_DATA	include/sandbox-adc.h	/^#define SANDBOX_ADC_CHANNEL3_DATA	/;"	d
SANDBOX_ADC_CHANNELS	include/sandbox-adc.h	/^#define SANDBOX_ADC_CHANNELS	/;"	d
SANDBOX_ADC_DATA_MASK	include/sandbox-adc.h	/^#define SANDBOX_ADC_DATA_MASK	/;"	d
SANDBOX_ADC_DEVNAME	include/sandbox-adc.h	/^#define SANDBOX_ADC_DEVNAME	/;"	d
SANDBOX_ADC_INACTIVE	include/sandbox-adc.h	/^	SANDBOX_ADC_INACTIVE = 0,$/;"	e	enum:sandbox_adc_status
SANDBOX_ADC_MODE_MULTI_CHANNEL	include/sandbox-adc.h	/^	SANDBOX_ADC_MODE_MULTI_CHANNEL,$/;"	e	enum:sandbox_adc_mode
SANDBOX_ADC_MODE_SINGLE_CHANNEL	include/sandbox-adc.h	/^	SANDBOX_ADC_MODE_SINGLE_CHANNEL = 0,$/;"	e	enum:sandbox_adc_mode
SANDBOX_ADC_VSS_VALUE	include/sandbox-adc.h	/^#define SANDBOX_ADC_VSS_VALUE	/;"	d
SANDBOX_BUCK1_AUTOSET_EXPECTED_ENABLE	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK1_AUTOSET_EXPECTED_ENABLE	/;"	d
SANDBOX_BUCK1_AUTOSET_EXPECTED_UA	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK1_AUTOSET_EXPECTED_UA	/;"	d
SANDBOX_BUCK1_AUTOSET_EXPECTED_UV	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK1_AUTOSET_EXPECTED_UV	/;"	d
SANDBOX_BUCK1_DEVNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK1_DEVNAME	/;"	d
SANDBOX_BUCK1_PLATNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK1_PLATNAME	/;"	d
SANDBOX_BUCK2_DEVNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK2_DEVNAME	/;"	d
SANDBOX_BUCK2_INITIAL_EXPECTED_UV	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK2_INITIAL_EXPECTED_UV	/;"	d
SANDBOX_BUCK2_PLATNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK2_PLATNAME	/;"	d
SANDBOX_BUCK2_SET_UV	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK2_SET_UV	/;"	d
SANDBOX_BUCK_COUNT	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK_COUNT	/;"	d
SANDBOX_BUCK_DRIVER	include/power/sandbox_pmic.h	/^#define SANDBOX_BUCK_DRIVER	/;"	d
SANDBOX_CLK_ID_COUNT	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_ID_COUNT,$/;"	e	enum:sandbox_clk_id
SANDBOX_CLK_ID_I2C	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_ID_I2C,$/;"	e	enum:sandbox_clk_id
SANDBOX_CLK_ID_SPI	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_ID_SPI,$/;"	e	enum:sandbox_clk_id
SANDBOX_CLK_RATE	arch/sandbox/include/asm/test.h	/^#define SANDBOX_CLK_RATE	/;"	d
SANDBOX_CLK_TEST_ID_COUNT	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_TEST_ID_COUNT,$/;"	e	enum:sandbox_clk_test_id
SANDBOX_CLK_TEST_ID_FIXED	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_TEST_ID_FIXED,$/;"	e	enum:sandbox_clk_test_id
SANDBOX_CLK_TEST_ID_I2C	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_TEST_ID_I2C,$/;"	e	enum:sandbox_clk_test_id
SANDBOX_CLK_TEST_ID_SPI	arch/sandbox/include/asm/clk.h	/^	SANDBOX_CLK_TEST_ID_SPI,$/;"	e	enum:sandbox_clk_test_id
SANDBOX_CMDLINE_OPT	arch/sandbox/include/asm/getopt.h	/^#define SANDBOX_CMDLINE_OPT(/;"	d
SANDBOX_CMDLINE_OPT_SHORT	arch/sandbox/include/asm/getopt.h	/^#define SANDBOX_CMDLINE_OPT_SHORT(/;"	d
SANDBOX_ETH_SETTINGS	include/configs/sandbox.h	/^#define SANDBOX_ETH_SETTINGS	/;"	d
SANDBOX_FLASH_BLOCK_LEN	drivers/usb/emul/sandbox_flash.c	/^	SANDBOX_FLASH_BLOCK_LEN		= 512,$/;"	e	enum:__anon4763d25b0103	file:
SANDBOX_FLASH_EP_IN	drivers/usb/emul/sandbox_flash.c	/^	SANDBOX_FLASH_EP_IN		= 2,$/;"	e	enum:__anon4763d25b0103	file:
SANDBOX_FLASH_EP_OUT	drivers/usb/emul/sandbox_flash.c	/^	SANDBOX_FLASH_EP_OUT		= 1,	\/* endpoints *\/$/;"	e	enum:__anon4763d25b0103	file:
SANDBOX_GPIO	drivers/gpio/Kconfig	/^config SANDBOX_GPIO$/;"	c	menu:GPIO Support
SANDBOX_GPIO_COUNT	drivers/gpio/Kconfig	/^config SANDBOX_GPIO_COUNT$/;"	c	menu:GPIO Support
SANDBOX_I2C_TEST_ADDR	arch/sandbox/include/asm/test.h	/^#define SANDBOX_I2C_TEST_ADDR	/;"	d
SANDBOX_KEYB_EP_IN	drivers/usb/emul/sandbox_keyb.c	/^	SANDBOX_KEYB_EP_IN		= 1,	\/* endpoints *\/$/;"	e	enum:__anon3bed6c180103	file:
SANDBOX_LDO1_AUTOSET_EXPECTED_ENABLE	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO1_AUTOSET_EXPECTED_ENABLE	/;"	d
SANDBOX_LDO1_AUTOSET_EXPECTED_UA	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO1_AUTOSET_EXPECTED_UA	/;"	d
SANDBOX_LDO1_AUTOSET_EXPECTED_UV	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO1_AUTOSET_EXPECTED_UV	/;"	d
SANDBOX_LDO1_DEVNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO1_DEVNAME	/;"	d
SANDBOX_LDO1_PLATNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO1_PLATNAME	/;"	d
SANDBOX_LDO2_AUTOSET_EXPECTED_ENABLE	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO2_AUTOSET_EXPECTED_ENABLE	/;"	d
SANDBOX_LDO2_AUTOSET_EXPECTED_UA	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO2_AUTOSET_EXPECTED_UA	/;"	d
SANDBOX_LDO2_AUTOSET_EXPECTED_UV	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO2_AUTOSET_EXPECTED_UV	/;"	d
SANDBOX_LDO2_DEVNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO2_DEVNAME	/;"	d
SANDBOX_LDO2_PLATNAME	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO2_PLATNAME	/;"	d
SANDBOX_LDO_COUNT	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO_COUNT	/;"	d
SANDBOX_LDO_DRIVER	include/power/sandbox_pmic.h	/^#define SANDBOX_LDO_DRIVER	/;"	d
SANDBOX_MBOX	drivers/mailbox/Kconfig	/^config SANDBOX_MBOX$/;"	c	menu:Mailbox Controller Support
SANDBOX_MBOX_CHANNELS	drivers/mailbox/sandbox-mbox.c	/^#define SANDBOX_MBOX_CHANNELS /;"	d	file:
SANDBOX_MBOX_PING_XOR	arch/sandbox/include/asm/mbox.h	/^#define SANDBOX_MBOX_PING_XOR /;"	d
SANDBOX_MMC	drivers/mmc/Kconfig	/^config SANDBOX_MMC$/;"	c	menu:MMC Host controller Support
SANDBOX_NUM_PORTS	drivers/usb/emul/sandbox_hub.c	/^#define SANDBOX_NUM_PORTS	/;"	d	file:
SANDBOX_OF_BUCK_PREFIX	include/power/sandbox_pmic.h	/^#define SANDBOX_OF_BUCK_PREFIX	/;"	d
SANDBOX_OF_LDO_PREFIX	include/power/sandbox_pmic.h	/^#define SANDBOX_OF_LDO_PREFIX	/;"	d
SANDBOX_PCI_CLASS_CODE	arch/sandbox/include/asm/test.h	/^#define SANDBOX_PCI_CLASS_CODE	/;"	d
SANDBOX_PCI_CLASS_SUB_CODE	arch/sandbox/include/asm/test.h	/^#define SANDBOX_PCI_CLASS_SUB_CODE	/;"	d
SANDBOX_PCI_DEVICE_ID	arch/sandbox/include/asm/test.h	/^#define SANDBOX_PCI_DEVICE_ID	/;"	d
SANDBOX_PCI_VENDOR_ID	arch/sandbox/include/asm/test.h	/^#define SANDBOX_PCI_VENDOR_ID	/;"	d
SANDBOX_PMIC_REG_BUCK1_OM	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_BUCK1_OM,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_BUCK1_UA	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_BUCK1_UA,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_BUCK1_UV	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_BUCK1_UV = 0,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_BUCK2_OM	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_BUCK2_OM,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_BUCK2_UA	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_BUCK2_UA,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_BUCK2_UV	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_BUCK2_UV,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_COUNT	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_COUNT = 16,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO1_OM	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO1_OM,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO1_UA	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO1_UA,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO1_UV	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO1_UV = SANDBOX_PMIC_REG_LDO_OFFSET,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO2_OM	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO2_OM,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO2_UA	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO2_UA,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO2_UV	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO2_UV,$/;"	e	enum:__anon64fe6be10103
SANDBOX_PMIC_REG_LDO_OFFSET	include/power/sandbox_pmic.h	/^	SANDBOX_PMIC_REG_LDO_OFFSET,$/;"	e	enum:__anon64fe6be10103
SANDBOX_POWER_DOMAIN	drivers/power/domain/Kconfig	/^config SANDBOX_POWER_DOMAIN$/;"	c	menu:Power Domain Support
SANDBOX_POWER_DOMAINS	drivers/power/domain/sandbox-power-domain.c	/^#define SANDBOX_POWER_DOMAINS /;"	d	file:
SANDBOX_RESET	drivers/reset/Kconfig	/^config SANDBOX_RESET$/;"	c	menu:Reset Controller Support
SANDBOX_RESET_SIGNALS	drivers/reset/sandbox-reset.c	/^#define SANDBOX_RESET_SIGNALS /;"	d	file:
SANDBOX_SERIAL	drivers/serial/Kconfig	/^config SANDBOX_SERIAL$/;"	c	menu:Serial drivers
SANDBOX_SERIAL_SETTINGS	include/configs/sandbox.h	/^#define SANDBOX_SERIAL_SETTINGS	/;"	d
SANDBOX_SPI	drivers/spi/Kconfig	/^config SANDBOX_SPI$/;"	c	menu:SPI Support
SANDBOX_SPL	arch/sandbox/Kconfig	/^config SANDBOX_SPL$/;"	c	menu:Sandbox architecture
SANDBOX_STATE_IO	arch/sandbox/include/asm/state.h	/^#define SANDBOX_STATE_IO(/;"	d
SANDBOX_STATE_MIN_SPACE	arch/sandbox/include/asm/state.h	/^#define SANDBOX_STATE_MIN_SPACE	/;"	d
SANDBOX_TIMER	drivers/timer/Kconfig	/^config SANDBOX_TIMER$/;"	c	menu:Timer Support
SANDBOX_TIMER_RATE	drivers/timer/sandbox_timer.c	/^#define SANDBOX_TIMER_RATE	/;"	d	file:
SANDYBRIDGE_BCLK	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define SANDYBRIDGE_BCLK	/;"	d
SANDYBRIDGE_DESKTOP	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SANDYBRIDGE_DESKTOP	/;"	d
SANDYBRIDGE_MOBILE	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SANDYBRIDGE_MOBILE	/;"	d
SANDYBRIDGE_SERVER	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SANDYBRIDGE_SERVER	/;"	d
SAR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SAR(/;"	d
SAR0	arch/sh/include/asm/cpu_sh7750.h	/^#define SAR0	/;"	d
SAR0_BOOTSRC_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_BOOTSRC_MASK	/;"	d
SAR0_BOOTSRC_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_BOOTSRC_OFFSET	/;"	d
SAR0_BOOTWIDTH_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_BOOTWIDTH_MASK	/;"	d
SAR0_BOOTWIDTH_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_BOOTWIDTH_OFFSET	/;"	d
SAR0_CPU0CORE_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_CPU0CORE_MASK	/;"	d
SAR0_CPU0CORE_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_CPU0CORE_OFFSET	/;"	d
SAR0_CPU_FREQ_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_CPU_FREQ_MASK	/;"	d
SAR0_CPU_FREQ_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_CPU_FREQ_OFFSET	/;"	d
SAR0_FABRIC_FREQ_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_FABRIC_FREQ_MASK	/;"	d
SAR0_FABRIC_FREQ_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_FABRIC_FREQ_OFFSET	/;"	d
SAR0_L2_SIZE_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_L2_SIZE_MASK	/;"	d
SAR0_L2_SIZE_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR0_L2_SIZE_OFFSET	/;"	d
SAR1	arch/sh/include/asm/cpu_sh7750.h	/^#define SAR1	/;"	d
SAR1_CPU0CORE_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR1_CPU0CORE_MASK	/;"	d
SAR1_CPU0CORE_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR1_CPU0CORE_OFFSET	/;"	d
SAR1_CPU_CORE_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SAR1_CPU_CORE_MASK	/;"	d
SAR1_CPU_CORE_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SAR1_CPU_CORE_MASK	/;"	d
SAR1_CPU_CORE_OFFSET	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SAR1_CPU_CORE_OFFSET	/;"	d
SAR1_CPU_CORE_OFFSET	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SAR1_CPU_CORE_OFFSET	/;"	d
SAR1_CPU_MODE_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR1_CPU_MODE_MASK	/;"	d
SAR1_CPU_MODE_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR1_CPU_MODE_OFFSET	/;"	d
SAR1_FABRIC_MODE_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR1_FABRIC_MODE_MASK	/;"	d
SAR1_FABRIC_MODE_OFFSET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR1_FABRIC_MODE_OFFSET	/;"	d
SAR2	arch/sh/include/asm/cpu_sh7750.h	/^#define SAR2	/;"	d
SAR2_CPU_FREQ_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR2_CPU_FREQ_MASK	/;"	d
SAR2_CPU_FREQ_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR2_CPU_FREQ_OFFS	/;"	d
SAR3	arch/sh/include/asm/cpu_sh7750.h	/^#define SAR3	/;"	d
SAR4	arch/sh/include/asm/cpu_sh7750.h	/^#define SAR4	/;"	d
SARB_0	arch/sh/include/asm/cpu_sh7722.h	/^#define SARB_0 /;"	d
SARB_1	arch/sh/include/asm/cpu_sh7722.h	/^#define SARB_1 /;"	d
SARB_2	arch/sh/include/asm/cpu_sh7722.h	/^#define SARB_2 /;"	d
SARB_3	arch/sh/include/asm/cpu_sh7722.h	/^#define SARB_3 /;"	d
SAR_0	arch/sh/include/asm/cpu_sh7722.h	/^#define SAR_0 /;"	d
SAR_1	arch/sh/include/asm/cpu_sh7722.h	/^#define SAR_1 /;"	d
SAR_2	arch/sh/include/asm/cpu_sh7722.h	/^#define SAR_2 /;"	d
SAR_3	arch/sh/include/asm/cpu_sh7722.h	/^#define SAR_3 /;"	d
SAR_4	arch/sh/include/asm/cpu_sh7722.h	/^#define SAR_4 /;"	d
SAR_5	arch/sh/include/asm/cpu_sh7722.h	/^#define SAR_5 /;"	d
SAR_BOOT_DEVICE_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR_BOOT_DEVICE_MASK	/;"	d
SAR_BOOT_DEVICE_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR_BOOT_DEVICE_OFFS	/;"	d
SAR_CPU_FAB_GET	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SAR_CPU_FAB_GET(/;"	d
SAR_CPU_FAB_GET	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SAR_CPU_FAB_GET(/;"	d
SAR_CPU_FAB_GET	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SAR_CPU_FAB_GET(/;"	d
SAR_CPU_FREQ_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR_CPU_FREQ_MASK	/;"	d
SAR_CPU_FREQ_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR_CPU_FREQ_OFFS	/;"	d
SAR_DDR3_FREQ_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SAR_DDR3_FREQ_MASK	/;"	d
SAR_DDR3_FREQ_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SAR_DDR3_FREQ_MASK	/;"	d
SAR_DEV_ID_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SAR_DEV_ID_MASK	/;"	d
SAR_DEV_ID_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define SAR_DEV_ID_MASK	/;"	d	file:
SAR_DEV_ID_OFFS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SAR_DEV_ID_OFFS	/;"	d
SAR_DEV_ID_OFFS	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define SAR_DEV_ID_OFFS	/;"	d	file:
SAR_FFC_FREQ_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR_FFC_FREQ_MASK	/;"	d
SAR_FFC_FREQ_OFFS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SAR_FFC_FREQ_OFFS	/;"	d
SASR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SASR0	/;"	d
SATA	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA,$/;"	e	enum:__anon525929f50303
SATA0	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA0,$/;"	e	enum:serdes_type
SATA0	arch/powerpc/dts/canyonlands.dts	/^		SATA0: sata@bffd1000 {$/;"	l
SATA0_BASE	drivers/block/sata_mv.c	/^#define SATA0_BASE	/;"	d	file:
SATA1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SATA1,$/;"	e	enum:srds_prtcl
SATA1	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	SATA1,$/;"	e	enum:srds_prtcl
SATA1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA1,$/;"	e	enum:serdes_type
SATA1	arch/powerpc/include/asm/fsl_serdes.h	/^	SATA1,$/;"	e	enum:srds_prtcl
SATA1_BASE	drivers/block/sata_mv.c	/^#define SATA1_BASE	/;"	d	file:
SATA2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SATA2,$/;"	e	enum:srds_prtcl
SATA2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA2,$/;"	e	enum:serdes_type
SATA2	arch/powerpc/include/asm/fsl_serdes.h	/^	SATA2,$/;"	e	enum:srds_prtcl
SATA3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA3,$/;"	e	enum:serdes_type
SATA3_CTRL_SATA0_PD_MASK	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA0_PD_MASK	/;"	d
SATA3_CTRL_SATA0_PD_OFFSET	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA0_PD_OFFSET	/;"	d
SATA3_CTRL_SATA1_ENABLE_MASK	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA1_ENABLE_MASK	/;"	d
SATA3_CTRL_SATA1_ENABLE_OFFSET	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA1_ENABLE_OFFSET	/;"	d
SATA3_CTRL_SATA1_PD_MASK	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA1_PD_MASK	/;"	d
SATA3_CTRL_SATA1_PD_OFFSET	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA1_PD_OFFSET	/;"	d
SATA3_CTRL_SATA_SSU_MASK	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA_SSU_MASK	/;"	d
SATA3_CTRL_SATA_SSU_OFFSET	drivers/phy/marvell/sata.h	/^#define SATA3_CTRL_SATA_SSU_OFFSET	/;"	d
SATA3_VENDOR_ADDRESS	drivers/phy/marvell/sata.h	/^#define SATA3_VENDOR_ADDRESS	/;"	d
SATA3_VENDOR_ADDR_MASK	drivers/phy/marvell/sata.h	/^#define SATA3_VENDOR_ADDR_MASK	/;"	d
SATA3_VENDOR_ADDR_OFSSET	drivers/phy/marvell/sata.h	/^#define SATA3_VENDOR_ADDR_OFSSET	/;"	d
SATA3_VENDOR_DATA	drivers/phy/marvell/sata.h	/^#define SATA3_VENDOR_DATA	/;"	d
SATAHC_BASE	drivers/block/sata_mv.c	/^#define SATAHC_BASE	/;"	d	file:
SATAHC_CFG	drivers/block/sata_mv.c	/^#define SATAHC_CFG	/;"	d	file:
SATAHC_ICR	drivers/block/sata_mv.c	/^#define SATAHC_ICR	/;"	d	file:
SATAHC_ICR_PORT0	drivers/block/sata_mv.c	/^#define SATAHC_ICR_PORT0	/;"	d	file:
SATAHC_ICR_PORT1	drivers/block/sata_mv.c	/^#define SATAHC_ICR_PORT1	/;"	d	file:
SATAHC_ICT	drivers/block/sata_mv.c	/^#define SATAHC_ICT	/;"	d	file:
SATAHC_ITT	drivers/block/sata_mv.c	/^#define SATAHC_ITT	/;"	d	file:
SATAHC_LED_CFG	drivers/block/sata_mv.c	/^#define SATAHC_LED_CFG	/;"	d	file:
SATAHC_MIC	drivers/block/sata_mv.c	/^#define SATAHC_MIC	/;"	d	file:
SATAHC_MIM	drivers/block/sata_mv.c	/^#define SATAHC_MIM	/;"	d	file:
SATAHC_RQIP	drivers/block/sata_mv.c	/^#define SATAHC_RQIP	/;"	d	file:
SATAHC_RQOP	drivers/block/sata_mv.c	/^#define SATAHC_RQOP	/;"	d	file:
SATASERDES_SPEED_1_5_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATASERDES_SPEED_1_5_GBPS,$/;"	e	enum:__anon525929f50603
SATASERDES_SPEED_3_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATASERDES_SPEED_3_GBPS,$/;"	e	enum:__anon525929f50603
SATASERDES_SPEED_6_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATASERDES_SPEED_6_GBPS,$/;"	e	enum:__anon525929f50603
SATA_1_5_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_1_5_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SATA_3_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_3_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SATA_6_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_6_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SATA_AN	include/libata.h	/^	SATA_AN			= 0x05,  \/* Asynchronous Notification *\/$/;"	e	enum:__anoneacac85b0103
SATA_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SATA_ARB_BASE_ADDR /;"	d
SATA_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SATA_ARB_END_ADDR /;"	d
SATA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SATA_BASE_ADDR	/;"	d
SATA_BASE_ADDR	include/configs/canyonlands.h	/^#define SATA_BASE_ADDR	/;"	d
SATA_BASE_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_BASE_REG(/;"	d
SATA_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	SATA_BOOT,$/;"	e	enum:boot_device
SATA_BOOT	common/Kconfig	/^config SATA_BOOT$/;"	c	menu:Boot media
SATA_CLKCTRL_OPTFCLKEN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define SATA_CLKCTRL_OPTFCLKEN_MASK	/;"	d
SATA_COMPHY_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_COMPHY_CTRL_REG(/;"	d
SATA_CONTROL_REG	drivers/phy/marvell/sata.h	/^#define SATA_CONTROL_REG	/;"	d
SATA_CTRL_REG_IND_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATA_CTRL_REG_IND_ADDR	/;"	d
SATA_CTRL_REG_IND_DATA	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATA_CTRL_REG_IND_DATA	/;"	d
SATA_DET_OFFLINE	drivers/block/sata_sil3114.h	/^#define SATA_DET_OFFLINE	/;"	d
SATA_DET_PRES	drivers/block/sata_sil3114.h	/^#define SATA_DET_PRES	/;"	d
SATA_DET_P_NOPHY	drivers/block/sata_sil3114.h	/^#define SATA_DET_P_NOPHY	/;"	d
SATA_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define SATA_DEV	/;"	d
SATA_DEVSLP_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SATA_DEVSLP_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SATA_DEVSLP_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SATA_DEVSLP_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SATA_DIG_LP_ENA_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_DIG_LP_ENA_REG(/;"	d
SATA_DIPM	include/libata.h	/^	SATA_DIPM		= 0x03,  \/* Device Initiated Power Management *\/$/;"	e	enum:__anoneacac85b0103
SATA_DMA_REG_ADDR	include/configs/canyonlands.h	/^#define SATA_DMA_REG_ADDR	/;"	d
SATA_DTLE_DATA_SHIFT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_DTLE_DATA_SHIFT	/;"	d
SATA_DTLE_EDGE_SHIFT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_DTLE_EDGE_SHIFT	/;"	d
SATA_DTLE_MASK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_DTLE_MASK	/;"	d
SATA_DWC_CMD_ISSUED_EXEC	drivers/block/sata_dwc.c	/^	SATA_DWC_CMD_ISSUED_EXEC	= 2,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_CMD_ISSUED_NODATA	drivers/block/sata_dwc.c	/^	SATA_DWC_CMD_ISSUED_NODATA	= 3,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_CMD_ISSUED_NOT	drivers/block/sata_dwc.c	/^	SATA_DWC_CMD_ISSUED_NOT		= 0,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_CMD_ISSUED_PEND	drivers/block/sata_dwc.c	/^	SATA_DWC_CMD_ISSUED_PEND	= 1,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_DBTSR_MRD	drivers/block/sata_dwc.c	/^#define SATA_DWC_DBTSR_MRD(/;"	d	file:
SATA_DWC_DBTSR_MWR	drivers/block/sata_dwc.c	/^#define SATA_DWC_DBTSR_MWR(/;"	d	file:
SATA_DWC_DMACR_TMOD_TXCHEN	drivers/block/sata_dwc.c	/^#define SATA_DWC_DMACR_TMOD_TXCHEN	/;"	d	file:
SATA_DWC_DMACR_TXRXCH_CLEAR	drivers/block/sata_dwc.c	/^#define SATA_DWC_DMACR_TXRXCH_CLEAR	/;"	d	file:
SATA_DWC_DMA_PENDING_NONE	drivers/block/sata_dwc.c	/^	SATA_DWC_DMA_PENDING_NONE	= 0,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_DMA_PENDING_RX	drivers/block/sata_dwc.c	/^	SATA_DWC_DMA_PENDING_RX		= 2,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_DMA_PENDING_TX	drivers/block/sata_dwc.c	/^	SATA_DWC_DMA_PENDING_TX		= 1,$/;"	e	enum:__anone5f668440103	file:
SATA_DWC_INTMR_DMATM	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTMR_DMATM	/;"	d	file:
SATA_DWC_INTMR_ERRM	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTMR_ERRM	/;"	d	file:
SATA_DWC_INTMR_NEWBISTM	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTMR_NEWBISTM	/;"	d	file:
SATA_DWC_INTMR_NEWFPM	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTMR_NEWFPM	/;"	d	file:
SATA_DWC_INTMR_PMABRTM	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTMR_PMABRTM	/;"	d	file:
SATA_DWC_INTPR_DMAT	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTPR_DMAT	/;"	d	file:
SATA_DWC_INTPR_ERR	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTPR_ERR	/;"	d	file:
SATA_DWC_INTPR_IPF	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTPR_IPF	/;"	d	file:
SATA_DWC_INTPR_NEWBIST	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTPR_NEWBIST	/;"	d	file:
SATA_DWC_INTPR_NEWFP	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTPR_NEWFP	/;"	d	file:
SATA_DWC_INTPR_PMABRT	drivers/block/sata_dwc.c	/^#define SATA_DWC_INTPR_PMABRT	/;"	d	file:
SATA_DWC_MAX_PORTS	drivers/block/sata_dwc.c	/^#define SATA_DWC_MAX_PORTS	/;"	d	file:
SATA_DWC_QCMD_MAX	drivers/block/sata_dwc.c	/^#define SATA_DWC_QCMD_MAX	/;"	d	file:
SATA_DWC_REG_OFFSET	drivers/block/sata_dwc.c	/^#define SATA_DWC_REG_OFFSET	/;"	d	file:
SATA_DWC_RXFIFO_DEPTH	drivers/block/sata_dwc.c	/^#define SATA_DWC_RXFIFO_DEPTH	/;"	d	file:
SATA_DWC_SCR_OFFSET	drivers/block/sata_dwc.c	/^#define SATA_DWC_SCR_OFFSET	/;"	d	file:
SATA_DWC_SERROR_ERR_BITS	drivers/block/sata_dwc.c	/^#define SATA_DWC_SERROR_ERR_BITS	/;"	d	file:
SATA_DWC_TXFIFO_DEPTH	drivers/block/sata_dwc.c	/^#define SATA_DWC_TXFIFO_DEPTH	/;"	d	file:
SATA_ECC_DISABLE	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define SATA_ECC_DISABLE	/;"	d	file:
SATA_ECC_REG_ADDR	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^#define SATA_ECC_REG_ADDR	/;"	d	file:
SATA_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SATA_ERROR	drivers/block/sata_dwc.c	/^	SATA_ERROR = 3,$/;"	e	enum:sata_dev_state	file:
SATA_FIS_TYPE_BIST_ACT_BI	include/fis.h	/^	SATA_FIS_TYPE_BIST_ACT_BI		= 0x58,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_DATA_BI	include/fis.h	/^	SATA_FIS_TYPE_DATA_BI			= 0x46,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_DMA_ACT_D2H	include/fis.h	/^	SATA_FIS_TYPE_DMA_ACT_D2H		= 0x39,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_DMA_SETUP_BI	include/fis.h	/^	SATA_FIS_TYPE_DMA_SETUP_BI		= 0x41,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_PIO_SETUP_D2H	include/fis.h	/^	SATA_FIS_TYPE_PIO_SETUP_D2H		= 0x5F,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_REGISTER_D2H	include/fis.h	/^	SATA_FIS_TYPE_REGISTER_D2H		= 0x34,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_REGISTER_H2D	include/fis.h	/^	SATA_FIS_TYPE_REGISTER_H2D		= 0x27,$/;"	e	enum:sata_fis_type
SATA_FIS_TYPE_SET_DEVICE_BITS_D2H	include/fis.h	/^	SATA_FIS_TYPE_SET_DEVICE_BITS_D2H	= 0xA1,$/;"	e	enum:sata_fis_type
SATA_FLAG_FLUSH	drivers/block/dwc_ahsata.h	/^#define SATA_FLAG_FLUSH	/;"	d
SATA_FLAG_FLUSH_EXT	drivers/block/dwc_ahsata.h	/^#define SATA_FLAG_FLUSH_EXT	/;"	d
SATA_FLAG_Q_DEP_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_FLAG_Q_DEP_MASK	/;"	d
SATA_FLAG_WCACHE	drivers/block/dwc_ahsata.h	/^#define SATA_FLAG_WCACHE	/;"	d
SATA_GEN_1_SET_0_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_GEN_1_SET_0_REG(/;"	d
SATA_GEN_1_SET_1_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_GEN_1_SET_1_REG(/;"	d
SATA_GEN_2_SET_0_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_GEN_2_SET_0_REG(/;"	d
SATA_GEN_2_SET_1_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_GEN_2_SET_1_REG(/;"	d
SATA_HB_VERSION	board/highbank/ahci.c	/^#define SATA_HB_VERSION	/;"	d	file:
SATA_HC_CMD_DESC_ACMD_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_ACMD_SIZE	/;"	d
SATA_HC_CMD_DESC_ALIGN	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_ALIGN	/;"	d
SATA_HC_CMD_DESC_CFIS_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_CFIS_SIZE	/;"	d
SATA_HC_CMD_DESC_PRD_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_PRD_SIZE	/;"	d
SATA_HC_CMD_DESC_RES	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_RES	/;"	d
SATA_HC_CMD_DESC_SFIS_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_SFIS_SIZE	/;"	d
SATA_HC_CMD_DESC_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_DESC_SIZE	/;"	d
SATA_HC_CMD_HDR_ENTRY_SIZE	drivers/block/dwc_ahsata.h	/^#define SATA_HC_CMD_HDR_ENTRY_SIZE	/;"	d
SATA_HC_CMD_HDR_ENTRY_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_HDR_ENTRY_SIZE	/;"	d
SATA_HC_CMD_HDR_TBL_ALIGN	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_HDR_TBL_ALIGN	/;"	d
SATA_HC_CMD_HDR_TBL_SIZE	drivers/block/fsl_sata.h	/^#define SATA_HC_CMD_HDR_TBL_SIZE	/;"	d
SATA_HC_MAX_CMD	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_CMD	/;"	d
SATA_HC_MAX_NUM	drivers/block/dwc_ahsata.h	/^#define SATA_HC_MAX_NUM	/;"	d
SATA_HC_MAX_NUM	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_NUM	/;"	d
SATA_HC_MAX_PORT	drivers/block/dwc_ahsata.h	/^#define SATA_HC_MAX_PORT	/;"	d
SATA_HC_MAX_PORT	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_PORT	/;"	d
SATA_HC_MAX_PRD	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_PRD	/;"	d
SATA_HC_MAX_PRD_DIRECT	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_PRD_DIRECT	/;"	d
SATA_HC_MAX_PRD_USABLE	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_PRD_USABLE	/;"	d
SATA_HC_MAX_XFER_LEN	drivers/block/fsl_sata.h	/^#define SATA_HC_MAX_XFER_LEN	/;"	d
SATA_HOST_BISTAFR_NCP_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTAFR_NCP_MASK	/;"	d
SATA_HOST_BISTAFR_NCP_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTAFR_NCP_OFFSET	/;"	d
SATA_HOST_BISTAFR_PD_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTAFR_PD_MASK	/;"	d
SATA_HOST_BISTAFR_PD_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTAFR_PD_OFFSET	/;"	d
SATA_HOST_BISTCR_CNTCLR	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_CNTCLR	/;"	d
SATA_HOST_BISTCR_ERREN	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_ERREN	/;"	d
SATA_HOST_BISTCR_FERLB	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_FERLB	/;"	d
SATA_HOST_BISTCR_FLIP	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_FLIP	/;"	d
SATA_HOST_BISTCR_LLC_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_LLC_MASK	/;"	d
SATA_HOST_BISTCR_LLC_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_LLC_OFFSET	/;"	d
SATA_HOST_BISTCR_NEALB	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_NEALB	/;"	d
SATA_HOST_BISTCR_PATTERN_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_PATTERN_MASK	/;"	d
SATA_HOST_BISTCR_PATTERN_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_PATTERN_OFFSET	/;"	d
SATA_HOST_BISTCR_PV	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_PV	/;"	d
SATA_HOST_BISTCR_TXO	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTCR_TXO	/;"	d
SATA_HOST_BISTSR_BRSTERR_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTSR_BRSTERR_MASK	/;"	d
SATA_HOST_BISTSR_BRSTERR_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTSR_BRSTERR_OFFSET	/;"	d
SATA_HOST_BISTSR_FRAMERR_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTSR_FRAMERR_MASK	/;"	d
SATA_HOST_BISTSR_FRAMERR_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_BISTSR_FRAMERR_OFFSET	/;"	d
SATA_HOST_CAP2_APST	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP2_APST	/;"	d
SATA_HOST_CAP_CCCS	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_CCCS	/;"	d
SATA_HOST_CAP_EMS	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_EMS	/;"	d
SATA_HOST_CAP_ISS_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_ISS_MASK	/;"	d
SATA_HOST_CAP_ISS_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_ISS_OFFSET	/;"	d
SATA_HOST_CAP_NCS	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_NCS	/;"	d
SATA_HOST_CAP_NP_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_NP_MASK	/;"	d
SATA_HOST_CAP_PMD	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_PMD	/;"	d
SATA_HOST_CAP_PSC	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_PSC	/;"	d
SATA_HOST_CAP_S64A	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_S64A	/;"	d
SATA_HOST_CAP_SAL	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SAL	/;"	d
SATA_HOST_CAP_SALP	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SALP	/;"	d
SATA_HOST_CAP_SAM	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SAM	/;"	d
SATA_HOST_CAP_SCLO	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SCLO	/;"	d
SATA_HOST_CAP_SMPS	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SMPS	/;"	d
SATA_HOST_CAP_SNCQ	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SNCQ	/;"	d
SATA_HOST_CAP_SNZO	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SNZO	/;"	d
SATA_HOST_CAP_SPM	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SPM	/;"	d
SATA_HOST_CAP_SSC	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SSC	/;"	d
SATA_HOST_CAP_SSNTF	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SSNTF	/;"	d
SATA_HOST_CAP_SSS	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SSS	/;"	d
SATA_HOST_CAP_SXS	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CAP_SXS	/;"	d
SATA_HOST_CCC_CTL_CC_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_CC_MASK	/;"	d
SATA_HOST_CCC_CTL_CC_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_CC_OFFSET	/;"	d
SATA_HOST_CCC_CTL_EN	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_EN	/;"	d
SATA_HOST_CCC_CTL_INT_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_INT_MASK	/;"	d
SATA_HOST_CCC_CTL_INT_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_INT_OFFSET	/;"	d
SATA_HOST_CCC_CTL_TV_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_TV_MASK	/;"	d
SATA_HOST_CCC_CTL_TV_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_CCC_CTL_TV_OFFSET	/;"	d
SATA_HOST_GHC_AE	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GHC_AE	/;"	d
SATA_HOST_GHC_HR	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GHC_HR	/;"	d
SATA_HOST_GHC_IE	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GHC_IE	/;"	d
SATA_HOST_GPARAM1R_AHB_ENDIAN_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_AHB_ENDIAN_MASK	/;"	d
SATA_HOST_GPARAM1R_ALIGN_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_ALIGN_M	/;"	d
SATA_HOST_GPARAM1R_BIST_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_BIST_M	/;"	d
SATA_HOST_GPARAM1R_LATCH_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_LATCH_M	/;"	d
SATA_HOST_GPARAM1R_M_HADDR	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_M_HADDR	/;"	d
SATA_HOST_GPARAM1R_PHY_CTRL_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_PHY_CTRL_MASK	/;"	d
SATA_HOST_GPARAM1R_PHY_DATA_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_PHY_DATA_MASK	/;"	d
SATA_HOST_GPARAM1R_PHY_RST	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_PHY_RST	/;"	d
SATA_HOST_GPARAM1R_PHY_STAT_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_PHY_STAT_MASK	/;"	d
SATA_HOST_GPARAM1R_PHY_TYPE	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_PHY_TYPE	/;"	d
SATA_HOST_GPARAM1R_RETURN_ERR	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_RETURN_ERR	/;"	d
SATA_HOST_GPARAM1R_RX_BUFFER	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_RX_BUFFER	/;"	d
SATA_HOST_GPARAM1R_S_HADDR	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM1R_S_HADDR	/;"	d
SATA_HOST_GPARAM2R_DEV_CP	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_DEV_CP	/;"	d
SATA_HOST_GPARAM2R_DEV_ENCODE_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_DEV_ENCODE_M	/;"	d
SATA_HOST_GPARAM2R_DEV_MP	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_DEV_MP	/;"	d
SATA_HOST_GPARAM2R_RXOOB_CLK_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_RXOOB_CLK_M	/;"	d
SATA_HOST_GPARAM2R_RXOOB_CLK_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_RXOOB_CLK_MASK	/;"	d
SATA_HOST_GPARAM2R_RXOOB_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_RXOOB_M	/;"	d
SATA_HOST_GPARAM2R_TX_OOB_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_GPARAM2R_TX_OOB_M	/;"	d
SATA_HOST_OOBR_WE	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_OOBR_WE	/;"	d
SATA_HOST_OOBR_ciMax_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_OOBR_ciMax_MASK	/;"	d
SATA_HOST_OOBR_ciMin_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_OOBR_ciMin_MASK	/;"	d
SATA_HOST_OOBR_cwMAX_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_OOBR_cwMAX_MASK	/;"	d
SATA_HOST_OOBR_cwMin_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_OOBR_cwMin_MASK	/;"	d
SATA_HOST_PPARAMR_RXFIFO_DEPTH_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_PPARAMR_RXFIFO_DEPTH_MASK	/;"	d
SATA_HOST_PPARAMR_RX_MEM_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_PPARAMR_RX_MEM_M	/;"	d
SATA_HOST_PPARAMR_RX_MEM_S	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_PPARAMR_RX_MEM_S	/;"	d
SATA_HOST_PPARAMR_TXFIFO_DEPTH_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_PPARAMR_TXFIFO_DEPTH_MASK	/;"	d
SATA_HOST_PPARAMR_TX_MEM_M	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_PPARAMR_TX_MEM_M	/;"	d
SATA_HOST_PPARAMR_TX_MEM_S	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_PPARAMR_TX_MEM_S	/;"	d
SATA_HOST_TESTR_PSEL_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_TESTR_PSEL_MASK	/;"	d
SATA_HOST_TESTR_TEST_IF	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_TESTR_TEST_IF	/;"	d
SATA_HOST_VS_MJR_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_VS_MJR_MASK	/;"	d
SATA_HOST_VS_MJR_MNR	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_VS_MJR_MNR	/;"	d
SATA_HOST_VS_MJR_OFFSET	drivers/block/dwc_ahsata.h	/^#define SATA_HOST_VS_MJR_OFFSET	/;"	d
SATA_IMP_TX_SSC_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_IMP_TX_SSC_CTRL_REG(/;"	d
SATA_INIT	drivers/block/sata_dwc.c	/^	SATA_INIT = 0,$/;"	e	enum:sata_dev_state	file:
SATA_IOBP_SP0DTLE_DATA	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_IOBP_SP0DTLE_DATA	/;"	d
SATA_IOBP_SP0DTLE_EDGE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_IOBP_SP0DTLE_EDGE	/;"	d
SATA_IOBP_SP0G3IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SATA_IOBP_SP0G3IR	/;"	d
SATA_IOBP_SP0_SECRT88	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_IOBP_SP0_SECRT88	/;"	d
SATA_IOBP_SP1DTLE_DATA	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_IOBP_SP1DTLE_DATA	/;"	d
SATA_IOBP_SP1DTLE_EDGE	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_IOBP_SP1DTLE_EDGE	/;"	d
SATA_IOBP_SP1G3IR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SATA_IOBP_SP1G3IR	/;"	d
SATA_IOBP_SP1_SECRT88	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_IOBP_SP1_SECRT88	/;"	d
SATA_LP_PHY_EXT_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_LP_PHY_EXT_CTRL_REG(/;"	d
SATA_LP_PHY_EXT_STAT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_LP_PHY_EXT_STAT_REG(/;"	d
SATA_MAX_READ_BLK	drivers/block/sata_dwc.c	/^#define SATA_MAX_READ_BLK /;"	d	file:
SATA_MAX_WRITE_BLK	drivers/block/sata_dwc.c	/^#define SATA_MAX_WRITE_BLK /;"	d	file:
SATA_MBUS_REGRET_EN_MASK	drivers/phy/marvell/sata.h	/^#define SATA_MBUS_REGRET_EN_MASK	/;"	d
SATA_MBUS_REGRET_EN_OFFSET	drivers/phy/marvell/sata.h	/^#define SATA_MBUS_REGRET_EN_OFFSET	/;"	d
SATA_MBUS_SIZE_SELECT_REG	drivers/phy/marvell/sata.h	/^#define SATA_MBUS_SIZE_SELECT_REG	/;"	d
SATA_NODEVICE	drivers/block/sata_dwc.c	/^	SATA_NODEVICE = 2,$/;"	e	enum:sata_dev_state	file:
SATA_PLLCFG0_1	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLLCFG0_1 /;"	d	file:
SATA_PLLCFG0_2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLLCFG0_2 /;"	d	file:
SATA_PLLCFG0_3	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLLCFG0_3 /;"	d	file:
SATA_PLLCFG0_4	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLLCFG0_4 /;"	d	file:
SATA_PLLCFG1	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLLCFG1 /;"	d	file:
SATA_PLLCFG3	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLLCFG3 /;"	d	file:
SATA_PLL_BASE	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SATA_PLL_BASE	/;"	d	file:
SATA_PMP_CTRL_PORT	include/libata.h	/^	SATA_PMP_CTRL_PORT	= 15,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_FEAT_BIST	include/libata.h	/^	SATA_PMP_FEAT_BIST	= (1 << 0),$/;"	e	enum:__anoneacac85b0103
SATA_PMP_FEAT_DYNSSC	include/libata.h	/^	SATA_PMP_FEAT_DYNSSC	= (1 << 2),$/;"	e	enum:__anoneacac85b0103
SATA_PMP_FEAT_NOTIFY	include/libata.h	/^	SATA_PMP_FEAT_NOTIFY	= (1 << 3),$/;"	e	enum:__anoneacac85b0103
SATA_PMP_FEAT_PMREQ	include/libata.h	/^	SATA_PMP_FEAT_PMREQ	= (1 << 1),$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_DWORDS	include/libata.h	/^	SATA_PMP_GSCR_DWORDS	= 128,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_ERROR	include/libata.h	/^	SATA_PMP_GSCR_ERROR	= 32,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_ERROR_EN	include/libata.h	/^	SATA_PMP_GSCR_ERROR_EN	= 33,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_FEAT	include/libata.h	/^	SATA_PMP_GSCR_FEAT	= 64,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_FEAT_EN	include/libata.h	/^	SATA_PMP_GSCR_FEAT_EN	= 96,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_PORT_INFO	include/libata.h	/^	SATA_PMP_GSCR_PORT_INFO	= 2,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_PROD_ID	include/libata.h	/^	SATA_PMP_GSCR_PROD_ID	= 0,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_GSCR_REV	include/libata.h	/^	SATA_PMP_GSCR_REV	= 1,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_MAX_PORTS	include/libata.h	/^	SATA_PMP_MAX_PORTS	= 15,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_PSCR_CONTROL	include/libata.h	/^	SATA_PMP_PSCR_CONTROL	= 2,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_PSCR_ERROR	include/libata.h	/^	SATA_PMP_PSCR_ERROR	= 1,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_PSCR_STATUS	include/libata.h	/^	SATA_PMP_PSCR_STATUS	= 0,$/;"	e	enum:__anoneacac85b0103
SATA_PMP_SCR_TIMEOUT	drivers/block/sata_dwc.h	/^	SATA_PMP_SCR_TIMEOUT	= 250,$/;"	e	enum:__anone5f668490203
SATA_PORT_0_ONLY_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_PORT_0_ONLY_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
SATA_PORT_0_ONLY_TX_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_PORT_0_ONLY_TX_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SATA_PORT_1_ONLY_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_PORT_1_ONLY_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
SATA_PORT_1_ONLY_TX_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_PORT_1_ONLY_TX_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SATA_PORT_BASE	board/highbank/ahci.c	/^#define SATA_PORT_BASE	/;"	d	file:
SATA_PORT_CLB_CLB_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CLB_CLB_MASK	/;"	d
SATA_PORT_CMD_ALPE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_ALPE	/;"	d
SATA_PORT_CMD_APSTE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_APSTE	/;"	d
SATA_PORT_CMD_ASP	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_ASP	/;"	d
SATA_PORT_CMD_ATAPI	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_ATAPI	/;"	d
SATA_PORT_CMD_CCS_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_CCS_MASK	/;"	d
SATA_PORT_CMD_CLO	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_CLO	/;"	d
SATA_PORT_CMD_CPD	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_CPD	/;"	d
SATA_PORT_CMD_CPS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_CPS	/;"	d
SATA_PORT_CMD_CR	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_CR	/;"	d
SATA_PORT_CMD_DLAE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_DLAE	/;"	d
SATA_PORT_CMD_ESP	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_ESP	/;"	d
SATA_PORT_CMD_FR	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_FR	/;"	d
SATA_PORT_CMD_FRE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_FRE	/;"	d
SATA_PORT_CMD_HPCP	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_HPCP	/;"	d
SATA_PORT_CMD_ICC_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_ICC_MASK	/;"	d
SATA_PORT_CMD_MPSP	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_MPSP	/;"	d
SATA_PORT_CMD_MPSS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_MPSS	/;"	d
SATA_PORT_CMD_PMA	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_PMA	/;"	d
SATA_PORT_CMD_POD	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_POD	/;"	d
SATA_PORT_CMD_ST	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_ST	/;"	d
SATA_PORT_CMD_SUD	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_CMD_SUD	/;"	d
SATA_PORT_DMACR_RXABL_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_DMACR_RXABL_MASK	/;"	d
SATA_PORT_DMACR_RXTS_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_DMACR_RXTS_MASK	/;"	d
SATA_PORT_DMACR_TXABL_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_DMACR_TXABL_MASK	/;"	d
SATA_PORT_DMACR_TXTS_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_DMACR_TXTS_MASK	/;"	d
SATA_PORT_FB_FB_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_FB_FB_MASK	/;"	d
SATA_PORT_IE_CPDE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_CPDE	/;"	d
SATA_PORT_IE_DHRE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_DHRE	/;"	d
SATA_PORT_IE_DMPE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_DMPE	/;"	d
SATA_PORT_IE_DPE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_DPE	/;"	d
SATA_PORT_IE_DSE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_DSE	/;"	d
SATA_PORT_IE_HBDE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_HBDE	/;"	d
SATA_PORT_IE_HBFE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_HBFE	/;"	d
SATA_PORT_IE_IFE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_IFE	/;"	d
SATA_PORT_IE_INFE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_INFE	/;"	d
SATA_PORT_IE_IPME	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_IPME	/;"	d
SATA_PORT_IE_OFE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_OFE	/;"	d
SATA_PORT_IE_PCE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_PCE	/;"	d
SATA_PORT_IE_PRCE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_PRCE	/;"	d
SATA_PORT_IE_PSE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_PSE	/;"	d
SATA_PORT_IE_SDBE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_SDBE	/;"	d
SATA_PORT_IE_TFEE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_TFEE	/;"	d
SATA_PORT_IE_UFE	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IE_UFE	/;"	d
SATA_PORT_IS_CPDS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_CPDS	/;"	d
SATA_PORT_IS_DHRS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_DHRS	/;"	d
SATA_PORT_IS_DMPS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_DMPS	/;"	d
SATA_PORT_IS_DPS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_DPS	/;"	d
SATA_PORT_IS_DSS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_DSS	/;"	d
SATA_PORT_IS_HBDS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_HBDS	/;"	d
SATA_PORT_IS_HBFS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_HBFS	/;"	d
SATA_PORT_IS_IFS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_IFS	/;"	d
SATA_PORT_IS_INFS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_INFS	/;"	d
SATA_PORT_IS_IPMS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_IPMS	/;"	d
SATA_PORT_IS_OFS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_OFS	/;"	d
SATA_PORT_IS_PCS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_PCS	/;"	d
SATA_PORT_IS_PRCS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_PRCS	/;"	d
SATA_PORT_IS_PSS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_PSS	/;"	d
SATA_PORT_IS_SDBS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_SDBS	/;"	d
SATA_PORT_IS_TFES	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_TFES	/;"	d
SATA_PORT_IS_UFS	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_IS_UFS	/;"	d
SATA_PORT_SCTL_DET_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SCTL_DET_MASK	/;"	d
SATA_PORT_SCTL_IPM_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SCTL_IPM_MASK	/;"	d
SATA_PORT_SCTL_SPD_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SCTL_SPD_MASK	/;"	d
SATA_PORT_SERR_DIAG_B	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_B	/;"	d
SATA_PORT_SERR_DIAG_C	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_C	/;"	d
SATA_PORT_SERR_DIAG_D	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_D	/;"	d
SATA_PORT_SERR_DIAG_F	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_F	/;"	d
SATA_PORT_SERR_DIAG_H	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_H	/;"	d
SATA_PORT_SERR_DIAG_I	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_I	/;"	d
SATA_PORT_SERR_DIAG_N	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_N	/;"	d
SATA_PORT_SERR_DIAG_S	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_S	/;"	d
SATA_PORT_SERR_DIAG_T	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_T	/;"	d
SATA_PORT_SERR_DIAG_W	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_W	/;"	d
SATA_PORT_SERR_DIAG_X	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_DIAG_X	/;"	d
SATA_PORT_SERR_ERR_C	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_ERR_C	/;"	d
SATA_PORT_SERR_ERR_E	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_ERR_E	/;"	d
SATA_PORT_SERR_ERR_I	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_ERR_I	/;"	d
SATA_PORT_SERR_ERR_M	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_ERR_M	/;"	d
SATA_PORT_SERR_ERR_P	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_ERR_P	/;"	d
SATA_PORT_SERR_ERR_T	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SERR_ERR_T	/;"	d
SATA_PORT_SSTS_DET_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SSTS_DET_MASK	/;"	d
SATA_PORT_SSTS_IPM_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SSTS_IPM_MASK	/;"	d
SATA_PORT_SSTS_SPD_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_SSTS_SPD_MASK	/;"	d
SATA_PORT_TFD_ERR_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_TFD_ERR_MASK	/;"	d
SATA_PORT_TFD_STS_BSY	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_TFD_STS_BSY	/;"	d
SATA_PORT_TFD_STS_DRQ	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_TFD_STS_DRQ	/;"	d
SATA_PORT_TFD_STS_ERR	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_TFD_STS_ERR	/;"	d
SATA_PORT_TFD_STS_MASK	drivers/block/dwc_ahsata.h	/^#define SATA_PORT_TFD_STS_MASK	/;"	d
SATA_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
SATA_PWR_PLL_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_PWR_PLL_CTRL_REG(/;"	d
SATA_READY	drivers/block/sata_dwc.c	/^	SATA_READY = 1,$/;"	e	enum:sata_dev_state	file:
SATA_REF_CLK_SEL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SATA_REF_CLK_SEL_REG(/;"	d
SATA_SC_DET_PDIS	drivers/block/sata_sil3114.h	/^#define SATA_SC_DET_PDIS	/;"	d
SATA_SC_DET_RST	drivers/block/sata_sil3114.h	/^#define SATA_SC_DET_RST	/;"	d
SATA_SC_IPM_T2P	drivers/block/sata_sil3114.h	/^#define SATA_SC_IPM_T2P	/;"	d
SATA_SC_IPM_T2S	drivers/block/sata_sil3114.h	/^#define SATA_SC_IPM_T2S	/;"	d
SATA_SC_SPD_1_5	drivers/block/sata_sil3114.h	/^#define SATA_SC_SPD_1_5	/;"	d
SATA_SC_SPD_3_0	drivers/block/sata_sil3114.h	/^#define SATA_SC_SPD_3_0	/;"	d
SATA_SECRT88_VADJ_MASK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_SECRT88_VADJ_MASK	/;"	d
SATA_SECRT88_VADJ_SHIFT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SATA_SECRT88_VADJ_SHIFT	/;"	d
SATA_SEL_SCLKAPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define SATA_SEL_SCLKAPLL	/;"	d
SATA_SEL_SCLKAPLL	board/samsung/trats/setup.h	/^#define SATA_SEL_SCLKAPLL	/;"	d
SATA_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define SATA_SEL_SCLKMPLL	/;"	d
SATA_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define SATA_SEL_SCLKMPLL	/;"	d
SATA_SIL3114_H	drivers/block/sata_sil3114.h	/^#define SATA_SIL3114_H$/;"	d
SATA_SIL3132_H	drivers/block/sata_sil.h	/^#define SATA_SIL3132_H$/;"	d
SATA_SIRD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SATA_SIRD	/;"	d
SATA_SIRD	arch/x86/include/asm/pch_common.h	/^#define SATA_SIRD	/;"	d
SATA_SIRI	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SATA_SIRI	/;"	d
SATA_SIRI	arch/x86/include/asm/pch_common.h	/^#define SATA_SIRI	/;"	d
SATA_SP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SATA_SP	/;"	d
SATA_SP	arch/x86/include/asm/pch_common.h	/^#define SATA_SP	/;"	d
SATA_SS_IPM_ACTIVE	drivers/block/sata_sil3114.h	/^#define SATA_SS_IPM_ACTIVE	/;"	d
SATA_SS_IPM_PARTIAL	drivers/block/sata_sil3114.h	/^#define SATA_SS_IPM_PARTIAL	/;"	d
SATA_SS_IPM_SLUMBER	drivers/block/sata_sil3114.h	/^#define SATA_SS_IPM_SLUMBER	/;"	d
SATA_SS_SPD_1_5	drivers/block/sata_sil3114.h	/^#define SATA_SS_SPD_1_5	/;"	d
SATA_SS_SPD_3_0	drivers/block/sata_sil3114.h	/^#define SATA_SS_SPD_3_0	/;"	d
SATA_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
SATA_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SATA_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
SATA_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	SATA_UNIT_ID,$/;"	e	enum:unit_id
SATA_VENDOR_PORT_0_REG_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATA_VENDOR_PORT_0_REG_ADDR	/;"	d
SATA_VENDOR_PORT_0_REG_DATA	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATA_VENDOR_PORT_0_REG_DATA	/;"	d
SATA_VENDOR_PORT_1_REG_ADDR	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATA_VENDOR_PORT_1_REG_ADDR	/;"	d
SATA_VENDOR_PORT_1_REG_DATA	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATA_VENDOR_PORT_1_REG_DATA	/;"	d
SATA_VERSIONR	board/highbank/ahci.c	/^#define SATA_VERSIONR	/;"	d	file:
SATR_DB_LANE1_CFG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_DB_LANE1_CFG_MASK	/;"	d
SATR_DB_LANE1_CFG_OFFSET	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_DB_LANE1_CFG_OFFSET	/;"	d
SATR_DB_LANE1_MAX_OPTIONS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_DB_LANE1_MAX_OPTIONS	/;"	d
SATR_DB_LANE2_CFG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_DB_LANE2_CFG_MASK	/;"	d
SATR_DB_LANE2_CFG_OFFSET	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_DB_LANE2_CFG_OFFSET	/;"	d
SATR_DB_LANE2_MAX_OPTIONS	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_DB_LANE2_MAX_OPTIONS	/;"	d
SATR_GP_LANE1_CFG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_GP_LANE1_CFG_MASK	/;"	d
SATR_GP_LANE1_CFG_OFFSET	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_GP_LANE1_CFG_OFFSET	/;"	d
SATR_GP_LANE2_CFG_MASK	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_GP_LANE2_CFG_MASK	/;"	d
SATR_GP_LANE2_CFG_OFFSET	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SATR_GP_LANE2_CFG_OFFSET	/;"	d
SAVE_ALL	arch/m68k/cpu/mcf5227x/start.S	/^#define SAVE_ALL	/;"	d	file:
SAVE_ALL	arch/m68k/cpu/mcf523x/start.S	/^#define SAVE_ALL	/;"	d	file:
SAVE_ALL	arch/m68k/cpu/mcf52x2/start.S	/^#define SAVE_ALL	/;"	d	file:
SAVE_ALL	arch/m68k/cpu/mcf530x/start.S	/^.macro  SAVE_ALL$/;"	m
SAVE_ALL	arch/m68k/cpu/mcf532x/start.S	/^#define SAVE_ALL	/;"	d	file:
SAVE_ALL	arch/m68k/cpu/mcf5445x/start.S	/^#define SAVE_ALL	/;"	d	file:
SAVE_ALL	arch/m68k/cpu/mcf547x_8x/start.S	/^#define SAVE_ALL	/;"	d	file:
SAVE_ALL	arch/nds32/cpu/n1213/start.S	/^.macro	SAVE_ALL$/;"	m
SAVE_ALL	arch/sparc/include/asm/asmmacro.h	/^#define SAVE_ALL /;"	d
SAVE_ALL_HEAD	arch/sparc/include/asm/asmmacro.h	/^#define SAVE_ALL_HEAD /;"	d
SAVE_ALL_SYS	arch/arc/lib/ints_low.S	/^.macro SAVE_ALL_SYS$/;"	m
SAVE_EXCEPTION_SOURCE	arch/arc/lib/ints_low.S	/^.macro SAVE_EXCEPTION_SOURCE$/;"	m
SAVE_IP_CS	drivers/bios_emulator/include/x86emu/debug.h	/^# define SAVE_IP_CS(/;"	d
SAVE_IP_CS	drivers/bios_emulator/include/x86emu/debug.h	/^#define SAVE_IP_CS(/;"	d
SAVE_R1_TO_R24	arch/arc/lib/ints_low.S	/^.macro  SAVE_R1_TO_R24$/;"	m
SAVE_SP_ADDR	arch/arm/mach-rockchip/save_boot_param.S	/^SAVE_SP_ADDR:$/;"	l
SA_E	arch/powerpc/include/asm/mmu.h	/^#define SA_E	/;"	d
SA_G	arch/powerpc/include/asm/mmu.h	/^#define SA_G	/;"	d
SA_HDR_SIZE	include/zfs/sa_impl.h	/^#define	SA_HDR_SIZE(/;"	d
SA_I	arch/powerpc/include/asm/mmu.h	/^#define SA_I	/;"	d
SA_IG	arch/powerpc/include/asm/mmu.h	/^#define SA_IG	/;"	d
SA_IGD_OPROM_VENDEV	arch/x86/include/asm/arch-broadwell/pch.h	/^#define SA_IGD_OPROM_VENDEV	/;"	d
SA_INTERRUPT	arch/powerpc/include/asm/signal.h	/^#define SA_INTERRUPT	/;"	d
SA_M	arch/powerpc/include/asm/mmu.h	/^#define SA_M	/;"	d
SA_NOCLDSTOP	arch/powerpc/include/asm/signal.h	/^#define SA_NOCLDSTOP	/;"	d
SA_NOCLDSTOP	include/asm-generic/signal.h	/^#define SA_NOCLDSTOP	/;"	d
SA_NOCLDWAIT	arch/powerpc/include/asm/signal.h	/^#define SA_NOCLDWAIT	/;"	d
SA_NOCLDWAIT	include/asm-generic/signal.h	/^#define SA_NOCLDWAIT	/;"	d
SA_NODEFER	arch/powerpc/include/asm/signal.h	/^#define SA_NODEFER	/;"	d
SA_NODEFER	include/asm-generic/signal.h	/^#define SA_NODEFER	/;"	d
SA_NOMASK	arch/powerpc/include/asm/signal.h	/^#define SA_NOMASK	/;"	d
SA_NOMASK	include/asm-generic/signal.h	/^#define SA_NOMASK	/;"	d
SA_ONESHOT	arch/powerpc/include/asm/signal.h	/^#define SA_ONESHOT	/;"	d
SA_ONESHOT	include/asm-generic/signal.h	/^#define SA_ONESHOT	/;"	d
SA_ONSTACK	arch/powerpc/include/asm/signal.h	/^#define SA_ONSTACK	/;"	d
SA_ONSTACK	include/asm-generic/signal.h	/^#define SA_ONSTACK	/;"	d
SA_PROBE	arch/powerpc/include/asm/signal.h	/^#define SA_PROBE	/;"	d
SA_RESETHAND	arch/powerpc/include/asm/signal.h	/^#define SA_RESETHAND	/;"	d
SA_RESETHAND	include/asm-generic/signal.h	/^#define SA_RESETHAND	/;"	d
SA_RESTART	arch/powerpc/include/asm/signal.h	/^#define SA_RESTART	/;"	d
SA_RESTART	include/asm-generic/signal.h	/^#define SA_RESTART	/;"	d
SA_RESTORER	arch/powerpc/include/asm/signal.h	/^#define SA_RESTORER	/;"	d
SA_SAMPLE_RANDOM	arch/powerpc/include/asm/signal.h	/^#define SA_SAMPLE_RANDOM	/;"	d
SA_SHIRQ	arch/powerpc/include/asm/signal.h	/^#define SA_SHIRQ	/;"	d
SA_SIGINFO	arch/powerpc/include/asm/signal.h	/^#define SA_SIGINFO	/;"	d
SA_SIGINFO	include/asm-generic/signal.h	/^#define SA_SIGINFO	/;"	d
SA_SIZE_OFFSET	include/zfs/sa_impl.h	/^#define	SA_SIZE_OFFSET	/;"	d
SA_W	arch/powerpc/include/asm/mmu.h	/^#define SA_W	/;"	d
SB	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define SB	/;"	d
SB	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define SB	/;"	d
SBACTIV	arch/sh/include/asm/cpu_sh7722.h	/^#define SBACTIV /;"	d
SBASE_ADDR	drivers/pch/pch9.c	/^#define SBASE_ADDR	/;"	d	file:
SBA_CONFIG	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	SBA_CONFIG$/;"	e	enum:__anonc557e98b0103
SBBASE	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE(/;"	d
SBBASE0	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE0	/;"	d
SBBASE1	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE1	/;"	d
SBBASE2	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE2	/;"	d
SBBASE3	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE3	/;"	d
SBBASE4	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE4	/;"	d
SBBASE5	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE5	/;"	d
SBBASE6	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE6	/;"	d
SBBASE7	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE7	/;"	d
SBBASE_BANK_ENABLE	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE_BANK_ENABLE	/;"	d
SBBASE_BASE	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBBASE_BASE	/;"	d
SBBUS	arch/sh/include/asm/cpu_sh7722.h	/^#define SBBUS /;"	d
SBCL	include/sym53c8xx.h	/^#define SBCL	/;"	d
SBCTL	arch/sh/include/asm/cpu_sh7722.h	/^#define SBCTL /;"	d
SBCTRL	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL(/;"	d
SBCTRL00	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL00	/;"	d
SBCTRL01	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL01	/;"	d
SBCTRL02	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL02	/;"	d
SBCTRL03	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL03	/;"	d
SBCTRL04	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL04	/;"	d
SBCTRL0_ADMULTIPLX_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^#define SBCTRL0_ADMULTIPLX_MEM_VALUE	/;"	d	file:
SBCTRL0_ADMULTIPLX_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^#define SBCTRL0_ADMULTIPLX_PERI_VALUE	/;"	d	file:
SBCTRL0_SAVEPIN_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL0_SAVEPIN_MEM_VALUE	/;"	d	file:
SBCTRL0_SAVEPIN_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL0_SAVEPIN_PERI_VALUE	/;"	d	file:
SBCTRL10	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL10	/;"	d
SBCTRL11	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL11	/;"	d
SBCTRL12	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL12	/;"	d
SBCTRL13	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL13	/;"	d
SBCTRL14	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL14	/;"	d
SBCTRL1_ADMULTIPLX_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^#define SBCTRL1_ADMULTIPLX_MEM_VALUE	/;"	d	file:
SBCTRL1_ADMULTIPLX_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^#define SBCTRL1_ADMULTIPLX_PERI_VALUE	/;"	d	file:
SBCTRL1_SAVEPIN_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL1_SAVEPIN_MEM_VALUE	/;"	d	file:
SBCTRL1_SAVEPIN_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL1_SAVEPIN_PERI_VALUE	/;"	d	file:
SBCTRL20	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL20	/;"	d
SBCTRL21	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL21	/;"	d
SBCTRL22	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL22	/;"	d
SBCTRL23	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL23	/;"	d
SBCTRL24	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL24	/;"	d
SBCTRL2_ADMULTIPLX_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^#define SBCTRL2_ADMULTIPLX_MEM_VALUE	/;"	d	file:
SBCTRL2_ADMULTIPLX_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^#define SBCTRL2_ADMULTIPLX_PERI_VALUE	/;"	d	file:
SBCTRL2_SAVEPIN_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL2_SAVEPIN_MEM_VALUE	/;"	d	file:
SBCTRL2_SAVEPIN_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL2_SAVEPIN_PERI_VALUE	/;"	d	file:
SBCTRL30	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL30	/;"	d
SBCTRL31	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL31	/;"	d
SBCTRL32	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL32	/;"	d
SBCTRL33	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL33	/;"	d
SBCTRL34	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL34	/;"	d
SBCTRL40	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL40	/;"	d
SBCTRL41	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL41	/;"	d
SBCTRL42	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL42	/;"	d
SBCTRL43	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL43	/;"	d
SBCTRL44	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL44	/;"	d
SBCTRL4_SAVEPIN_MEM_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL4_SAVEPIN_MEM_VALUE	/;"	d	file:
SBCTRL4_SAVEPIN_PERI_VALUE	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^#define SBCTRL4_SAVEPIN_PERI_VALUE	/;"	d	file:
SBCTRL50	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL50	/;"	d
SBCTRL51	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL51	/;"	d
SBCTRL52	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL52	/;"	d
SBCTRL53	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL53	/;"	d
SBCTRL54	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL54	/;"	d
SBCTRL60	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL60	/;"	d
SBCTRL61	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL61	/;"	d
SBCTRL62	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL62	/;"	d
SBCTRL63	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL63	/;"	d
SBCTRL64	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL64	/;"	d
SBCTRL70	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL70	/;"	d
SBCTRL71	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL71	/;"	d
SBCTRL72	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL72	/;"	d
SBCTRL73	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL73	/;"	d
SBCTRL74	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL74	/;"	d
SBCTRL_BASE	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^#define	SBCTRL_BASE	/;"	d
SBDL	include/sym53c8xx.h	/^#define SBDL	/;"	d
SBDVCA	arch/sh/include/asm/cpu_sh7722.h	/^#define SBDVCA /;"	d
SBDVCB	arch/sh/include/asm/cpu_sh7722.h	/^#define SBDVCB /;"	d
SBFSTS	arch/sh/include/asm/cpu_sh7722.h	/^#define SBFSTS /;"	d
SBF_SBFCR_BLDIV	arch/m68k/include/asm/m5441x.h	/^#define SBF_SBFCR_BLDIV(/;"	d
SBF_SBFCR_BLDIV	arch/m68k/include/asm/m5445x.h	/^#define SBF_SBFCR_BLDIV(/;"	d
SBF_SBFCR_FR	arch/m68k/include/asm/m5441x.h	/^#define SBF_SBFCR_FR	/;"	d
SBF_SBFCR_FR	arch/m68k/include/asm/m5445x.h	/^#define SBF_SBFCR_FR	/;"	d
SBIAS_BYPASS	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SBIAS_BYPASS	/;"	d
SBMC	include/sym53c8xx.h	/^  #define   SBMC /;"	d
SBPSET	arch/sh/include/asm/cpu_sh7722.h	/^#define SBPSET /;"	d
SBR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SBR	/;"	d
SBR	include/sym53c8xx.h	/^#define SBR	/;"	d
SBRDAT	arch/sh/include/asm/cpu_sh7722.h	/^#define SBRDAT /;"	d
SBRFLG	arch/sh/include/asm/cpu_sh7722.h	/^#define SBRFLG /;"	d
SBSC1_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SBSC1_BASE	/;"	d
SBSC2_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SBSC2_BASE	/;"	d
SBSCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSCR	/;"	d
SBSCR_A	board/ms7722se/lowlevel_init.S	/^SBSCR_A:	.long	SBSCR$/;"	l
SBSCR_A	board/renesas/MigoR/lowlevel_init.S	/^SBSCR_A:	.long	SBSCR$/;"	l
SBSCR_D	board/ms7722se/lowlevel_init.S	/^SBSCR_D:	.word	0x0040$/;"	l
SBSCR_D	board/renesas/MigoR/lowlevel_init.S	/^SBSCR_D:	.word	0x0044$/;"	l
SBSC_RFCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_RFCR /;"	d
SBSC_RFCR	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_RFCR	/;"	d
SBSC_RFCR	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_RFCR	/;"	d
SBSC_RTCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_RTCNT /;"	d
SBSC_RTCNT	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_RTCNT	/;"	d
SBSC_RTCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_RTCNT	/;"	d
SBSC_RTCNT_A	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_RTCNT_A:	.long	SBSC_RTCNT$/;"	l
SBSC_RTCNT_D	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_RTCNT_D:	.long	0xa55a0000$/;"	l
SBSC_RTCOR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_RTCOR /;"	d
SBSC_RTCOR	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_RTCOR	/;"	d
SBSC_RTCOR	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_RTCOR	/;"	d
SBSC_RTCOR_A	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_RTCOR_A:	.long	SBSC_RTCOR$/;"	l
SBSC_RTCOR_D	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_RTCOR_D:	.long	0xa55a0040$/;"	l
SBSC_RTCSR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_RTCSR /;"	d
SBSC_RTCSR	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_RTCSR	/;"	d
SBSC_RTCSR	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_RTCSR	/;"	d
SBSC_RTCSR_A	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_RTCSR_A:	.long	SBSC_RTCSR$/;"	l
SBSC_RTCSR_D	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_RTCSR_D:	.long	0xa55a0212$/;"	l
SBSC_SDCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_SDCR /;"	d
SBSC_SDCR	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_SDCR	/;"	d
SBSC_SDCR	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_SDCR	/;"	d
SBSC_SDCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDCR_A:	.long	SBSC_SDCR$/;"	l
SBSC_SDCR_D1	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDCR_D1:	.long	0x92810112$/;"	l
SBSC_SDCR_D2	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDCR_D2:	.long	0x92810912$/;"	l
SBSC_SDMR3_A1	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDMR3_A1:	.long	0xfe510000$/;"	l
SBSC_SDMR3_A2	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDMR3_A2:	.long	0xfe500242$/;"	l
SBSC_SDMR3_A3	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDMR3_A3:	.long	0xfe5c0042$/;"	l
SBSC_SDMR3_D	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDMR3_D:	.long	0x00$/;"	l
SBSC_SDPCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_SDPCR /;"	d
SBSC_SDPCR	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_SDPCR	/;"	d
SBSC_SDPCR	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_SDPCR	/;"	d
SBSC_SDPCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDPCR_A:	.long	SBSC_SDPCR$/;"	l
SBSC_SDPCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDPCR_D:	.long	0x00300087$/;"	l
SBSC_SDWCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SBSC_SDWCR /;"	d
SBSC_SDWCR	arch/sh/include/asm/cpu_sh7723.h	/^#define SBSC_SDWCR	/;"	d
SBSC_SDWCR	arch/sh/include/asm/cpu_sh7724.h	/^#define SBSC_SDWCR	/;"	d
SBSC_SDWCR_A	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDWCR_A:	.long	SBSC_SDWCR$/;"	l
SBSC_SDWCR_D	board/renesas/ap325rxa/lowlevel_init.S	/^SBSC_SDWCR_D:	.long	0x05162482$/;"	l
SBWDAT	arch/sh/include/asm/cpu_sh7722.h	/^#define SBWDAT /;"	d
SBWFLG	arch/sh/include/asm/cpu_sh7722.h	/^#define SBWFLG /;"	d
SB_AA64_RESET_HIGH	arch/arm/mach-tegra/cpu.h	/^#define SB_AA64_RESET_HIGH	/;"	d
SB_AA64_RESET_LOW	arch/arm/mach-tegra/cpu.h	/^#define SB_AA64_RESET_LOW	/;"	d
SB_BLOCK_SIZE	tools/mxsimage.h	/^#define SB_BLOCK_SIZE	/;"	d
SB_DCD_ANDC	tools/mxsimage.c	/^#define	SB_DCD_ANDC	/;"	d	file:
SB_DCD_CHK_EQ	tools/mxsimage.c	/^#define	SB_DCD_CHK_EQ	/;"	d	file:
SB_DCD_CHK_EQZ	tools/mxsimage.c	/^#define	SB_DCD_CHK_EQZ	/;"	d	file:
SB_DCD_CHK_NEQ	tools/mxsimage.c	/^#define	SB_DCD_CHK_NEQ	/;"	d	file:
SB_DCD_CHK_NEZ	tools/mxsimage.c	/^#define	SB_DCD_CHK_NEZ	/;"	d	file:
SB_DCD_NOOP	tools/mxsimage.c	/^#define	SB_DCD_NOOP	/;"	d	file:
SB_DCD_ORR	tools/mxsimage.c	/^#define	SB_DCD_ORR	/;"	d	file:
SB_DCD_WRITE	tools/mxsimage.c	/^#define	SB_DCD_WRITE	/;"	d	file:
SB_FREEZE_COMPLETE	fs/ubifs/ubifs.h	/^	SB_FREEZE_COMPLETE = 4,		\/* ->freeze_fs finished successfully *\/$/;"	e	enum:__anonf648d0840103
SB_FREEZE_FS	fs/ubifs/ubifs.h	/^	SB_FREEZE_FS = 3,		\/* For internal FS use (e.g. to stop$/;"	e	enum:__anonf648d0840103
SB_FREEZE_LEVELS	fs/ubifs/ubifs.h	/^#define SB_FREEZE_LEVELS /;"	d
SB_FREEZE_PAGEFAULT	fs/ubifs/ubifs.h	/^	SB_FREEZE_PAGEFAULT = 2,	\/* Page faults stopped as well *\/$/;"	e	enum:__anonf648d0840103
SB_FREEZE_WRITE	fs/ubifs/ubifs.h	/^	SB_FREEZE_WRITE	= 1,		\/* Writes, dir ops, ioctls frozen *\/$/;"	e	enum:__anonf648d0840103
SB_FX6_I2C_EEPROM_BUS	board/compulab/cm_fx6/cm_fx6.c	/^#define SB_FX6_I2C_EEPROM_BUS	/;"	d	file:
SB_FX6_USB_OTG_PWR	board/compulab/cm_fx6/common.h	/^#define SB_FX6_USB_OTG_PWR	/;"	d
SB_HAB_DCD_CHECK	tools/mxsimage.c	/^#define SB_HAB_DCD_CHECK	/;"	d	file:
SB_HAB_DCD_MASK_BIT	tools/mxsimage.c	/^#define SB_HAB_DCD_MASK_BIT	/;"	d	file:
SB_HAB_DCD_NOOP	tools/mxsimage.c	/^#define SB_HAB_DCD_NOOP	/;"	d	file:
SB_HAB_DCD_SET_BIT	tools/mxsimage.c	/^#define SB_HAB_DCD_SET_BIT	/;"	d	file:
SB_HAB_DCD_TAG	tools/mxsimage.h	/^#define	SB_HAB_DCD_TAG	/;"	d
SB_HAB_DCD_WRITE	tools/mxsimage.c	/^#define SB_HAB_DCD_WRITE	/;"	d	file:
SB_HAB_IVT_TAG	tools/mxsimage.h	/^#define	SB_HAB_IVT_TAG	/;"	d
SB_HAB_VERSION	tools/mxsimage.h	/^#define	SB_HAB_VERSION	/;"	d
SB_HI	arch/arm/include/asm/arch-omap3/mux.h	/^#define SB_HI /;"	d
SB_HIZ	arch/arm/include/asm/arch-omap3/mux.h	/^#define SB_HIZ /;"	d
SB_IMAGE_FLAGS_MASK	tools/mxsimage.h	/^#define SB_IMAGE_FLAGS_MASK /;"	d
SB_IMAGE_FLAG_DISPLAY_PROGRESS	tools/mxsimage.h	/^#define SB_IMAGE_FLAG_DISPLAY_PROGRESS	/;"	d
SB_LOW	arch/arm/include/asm/arch-omap3/mux.h	/^#define SB_LOW /;"	d
SB_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define SB_P	/;"	d
SB_PD	arch/arm/include/asm/arch-omap3/mux.h	/^#define SB_PD /;"	d
SB_PRI	drivers/ddr/microchip/ddr2_regs.h	/^#define SB_PRI	/;"	d
SB_PU	arch/arm/include/asm/arch-omap3/mux.h	/^#define SB_PU /;"	d
SB_SECTION_FLAG_BOOTABLE	tools/mxsimage.h	/^#define	SB_SECTION_FLAG_BOOTABLE	/;"	d
SB_T35_CD_GPIO	board/compulab/cm_t3517/cm_t3517.c	/^#define SB_T35_CD_GPIO /;"	d	file:
SB_T35_ETH_RST_GPIO	board/compulab/cm_t3517/cm_t3517.c	/^#define SB_T35_ETH_RST_GPIO /;"	d	file:
SB_T35_SMC911X_BASE	include/configs/cm_t35.h	/^#define SB_T35_SMC911X_BASE	/;"	d
SB_T35_USB_HUB_RESET_GPIO	board/compulab/cm_t35/cm_t35.c	/^#define SB_T35_USB_HUB_RESET_GPIO	/;"	d	file:
SB_T35_USB_HUB_RESET_GPIO	board/compulab/cm_t3517/cm_t3517.c	/^#define SB_T35_USB_HUB_RESET_GPIO	/;"	d	file:
SB_T35_WP_GPIO	board/compulab/cm_t35/cm_t35.c	/^#define SB_T35_WP_GPIO /;"	d	file:
SB_T35_WP_GPIO	board/compulab/cm_t3517/cm_t3517.c	/^#define SB_T35_WP_GPIO /;"	d	file:
SB_T54_CD_GPIO	board/compulab/cm_t54/cm_t54.c	/^#define SB_T54_CD_GPIO /;"	d	file:
SB_T54_WP_GPIO	board/compulab/cm_t54/cm_t54.c	/^#define SB_T54_WP_GPIO /;"	d	file:
SB_UNFROZEN	fs/ubifs/ubifs.h	/^	SB_UNFROZEN = 0,		\/* FS is unfrozen *\/$/;"	e	enum:__anonf648d0840103
SB_VERSION_MAJOR	tools/mxsimage.h	/^#define	SB_VERSION_MAJOR	/;"	d
SB_VERSION_MINOR	tools/mxsimage.h	/^#define	SB_VERSION_MINOR	/;"	d
SC64_REGS_H	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC64_REGS_H$/;"	d
SCAN	fs/ext4/ext4_common.h	/^#define SCAN	/;"	d
SCANMAX	include/lattice.h	/^#define SCANMAX	/;"	d
SCANMGR_MAX_DELAY	arch/arm/mach-socfpga/scan_manager.c	/^#define SCANMGR_MAX_DELAY	/;"	d	file:
SCANMGR_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCANMGR_RESET	/;"	d
SCANMGR_STAT_ACTIVE	arch/arm/mach-socfpga/scan_manager.c	/^#define SCANMGR_STAT_ACTIVE	/;"	d	file:
SCANMGR_STAT_WFIFOCNT_MASK	arch/arm/mach-socfpga/scan_manager.c	/^#define SCANMGR_STAT_WFIFOCNT_MASK	/;"	d	file:
SCANNED_A_BAD_PAD_NODE	fs/ubifs/ubifs.h	/^	SCANNED_A_BAD_PAD_NODE = -4,$/;"	e	enum:__anonf648d0840803
SCANNED_A_CORRUPT_NODE	fs/ubifs/ubifs.h	/^	SCANNED_A_CORRUPT_NODE = -3,$/;"	e	enum:__anonf648d0840803
SCANNED_A_NODE	fs/ubifs/ubifs.h	/^	SCANNED_A_NODE         = -2,$/;"	e	enum:__anonf648d0840803
SCANNED_EMPTY_SPACE	fs/ubifs/ubifs.h	/^	SCANNED_EMPTY_SPACE    = -1,$/;"	e	enum:__anonf648d0840803
SCANNED_GARBAGE	fs/ubifs/ubifs.h	/^	SCANNED_GARBAGE        = 0,$/;"	e	enum:__anonf648d0840803
SCAN_DEV_FOR_EFI	include/config_distro_bootcmd.h	/^#define SCAN_DEV_FOR_EFI /;"	d
SCAN_DEV_FOR_EFI	include/config_distro_bootcmd.h	/^#define SCAN_DEV_FOR_EFI$/;"	d
SCAN_FROM_BOTTOM_TO_TOP	drivers/video/l5f31188.c	/^#define SCAN_FROM_BOTTOM_TO_TOP /;"	d	file:
SCAN_FROM_LEFT_TO_RIGHT	drivers/video/l5f31188.c	/^#define SCAN_FROM_LEFT_TO_RIGHT /;"	d	file:
SCAN_FROM_RIGHT_TO_LEFT	drivers/video/l5f31188.c	/^#define SCAN_FROM_RIGHT_TO_LEFT /;"	d	file:
SCAN_FROM_TOP_TO_BOTTOM	drivers/video/l5f31188.c	/^#define SCAN_FROM_TOP_TO_BOTTOM /;"	d	file:
SCB0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SCB0	/;"	d
SCB1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SCB1	/;"	d
SCBCmd	drivers/net/eepro100.c	/^#define SCBCmd	/;"	d	file:
SCBCtrlMDI	drivers/net/eepro100.c	/^#define SCBCtrlMDI	/;"	d	file:
SCBEarlyRx	drivers/net/eepro100.c	/^#define SCBEarlyRx	/;"	d	file:
SCBF0EN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define SCBF0EN	/;"	d
SCBF1EN	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define SCBF1EN	/;"	d
SCBGenControl	drivers/net/eepro100.c	/^#define SCBGenControl	/;"	d	file:
SCBGenStatus	drivers/net/eepro100.c	/^#define SCBGenStatus	/;"	d	file:
SCBIntAckByte	drivers/net/eepro100.c	/^#define SCBIntAckByte	/;"	d	file:
SCBIntrCtlByte	drivers/net/eepro100.c	/^#define SCBIntrCtlByte	/;"	d	file:
SCBPointer	drivers/net/eepro100.c	/^#define SCBPointer	/;"	d	file:
SCBPort	drivers/net/eepro100.c	/^#define SCBPort	/;"	d	file:
SCBRR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCBRR	/;"	d	file:
SCBRR_VALUE	drivers/serial/serial_sh.h	/^  #define SCBRR_VALUE(/;"	d
SCBRR_VALUE	drivers/serial/serial_sh.h	/^#define SCBRR_VALUE(/;"	d
SCBStatus	drivers/net/eepro100.c	/^#define SCBStatus	/;"	d	file:
SCB_INTACK_MASK	drivers/net/eepro100.c	/^#define SCB_INTACK_MASK	/;"	d	file:
SCB_INTACK_RX	drivers/net/eepro100.c	/^#define SCB_INTACK_RX	/;"	d	file:
SCB_INTACK_TX	drivers/net/eepro100.c	/^#define SCB_INTACK_TX	/;"	d	file:
SCB_M	drivers/net/eepro100.c	/^#define SCB_M	/;"	d	file:
SCB_STATUS_CNA	drivers/net/eepro100.c	/^#define SCB_STATUS_CNA	/;"	d	file:
SCB_STATUS_CX	drivers/net/eepro100.c	/^#define SCB_STATUS_CX	/;"	d	file:
SCB_STATUS_FCP	drivers/net/eepro100.c	/^#define SCB_STATUS_FCP	/;"	d	file:
SCB_STATUS_FR	drivers/net/eepro100.c	/^#define SCB_STATUS_FR	/;"	d	file:
SCB_STATUS_MDI	drivers/net/eepro100.c	/^#define SCB_STATUS_MDI	/;"	d	file:
SCB_STATUS_RNR	drivers/net/eepro100.c	/^#define SCB_STATUS_RNR	/;"	d	file:
SCB_STATUS_SWI	drivers/net/eepro100.c	/^#define SCB_STATUS_SWI	/;"	d	file:
SCB_SWI	drivers/net/eepro100.c	/^#define SCB_SWI	/;"	d	file:
SCBeeprom	drivers/net/eepro100.c	/^#define SCBeeprom	/;"	d	file:
SCBflash	drivers/net/eepro100.c	/^#define SCBflash	/;"	d	file:
SCC0_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC0_BASE	/;"	d
SCC10_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC10_BASE	/;"	d
SCC11_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC11_BASE	/;"	d
SCC12_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC12_BASE	/;"	d
SCC13_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC13_BASE	/;"	d
SCC14_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC14_BASE	/;"	d
SCC15_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC15_BASE	/;"	d
SCC16_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC16_BASE	/;"	d
SCC17_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC17_BASE	/;"	d
SCC18_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC18_BASE	/;"	d
SCC19_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC19_BASE	/;"	d
SCC1_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC1_BASE	/;"	d
SCC20_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC20_BASE	/;"	d
SCC21_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC21_BASE	/;"	d
SCC22_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC22_BASE	/;"	d
SCC23_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC23_BASE	/;"	d
SCC24_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC24_BASE	/;"	d
SCC25_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC25_BASE	/;"	d
SCC26_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC26_BASE	/;"	d
SCC27_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC27_BASE	/;"	d
SCC28_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC28_BASE	/;"	d
SCC29_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC29_BASE	/;"	d
SCC2_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC2_BASE	/;"	d
SCC30_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC30_BASE	/;"	d
SCC31_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC31_BASE	/;"	d
SCC32_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC32_BASE	/;"	d
SCC33_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC33_BASE	/;"	d
SCC34_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC34_BASE	/;"	d
SCC35_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC35_BASE	/;"	d
SCC36_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC36_BASE	/;"	d
SCC37_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC37_BASE	/;"	d
SCC38_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC38_BASE	/;"	d
SCC39_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC39_BASE	/;"	d
SCC3_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC3_BASE	/;"	d
SCC40_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC40_BASE	/;"	d
SCC4_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC4_BASE	/;"	d
SCC5_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC5_BASE	/;"	d
SCC6_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC6_BASE	/;"	d
SCC7_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC7_BASE	/;"	d
SCC8_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC8_BASE	/;"	d
SCC9_BASE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC9_BASE	/;"	d
SCCB	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SCCB	/;"	d
SCCE_ENET_BSY	arch/powerpc/include/asm/cpm_8260.h	/^#define SCCE_ENET_BSY	/;"	d
SCCE_ENET_BSY	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCCE_ENET_BSY	/;"	d
SCCE_ENET_BSY	include/commproc.h	/^#define SCCE_ENET_BSY	/;"	d
SCCE_ENET_GRA	arch/powerpc/include/asm/cpm_8260.h	/^#define SCCE_ENET_GRA	/;"	d
SCCE_ENET_GRA	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCCE_ENET_GRA	/;"	d
SCCE_ENET_GRA	include/commproc.h	/^#define SCCE_ENET_GRA	/;"	d
SCCE_ENET_RXB	arch/powerpc/include/asm/cpm_8260.h	/^#define SCCE_ENET_RXB	/;"	d
SCCE_ENET_RXB	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCCE_ENET_RXB	/;"	d
SCCE_ENET_RXB	include/commproc.h	/^#define SCCE_ENET_RXB	/;"	d
SCCE_ENET_RXF	arch/powerpc/include/asm/cpm_8260.h	/^#define SCCE_ENET_RXF	/;"	d
SCCE_ENET_RXF	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCCE_ENET_RXF	/;"	d
SCCE_ENET_RXF	include/commproc.h	/^#define SCCE_ENET_RXF	/;"	d
SCCE_ENET_TXB	arch/powerpc/include/asm/cpm_8260.h	/^#define SCCE_ENET_TXB	/;"	d
SCCE_ENET_TXB	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCCE_ENET_TXB	/;"	d
SCCE_ENET_TXB	include/commproc.h	/^#define SCCE_ENET_TXB	/;"	d
SCCE_ENET_TXE	arch/powerpc/include/asm/cpm_8260.h	/^#define SCCE_ENET_TXE	/;"	d
SCCE_ENET_TXE	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCCE_ENET_TXE	/;"	d
SCCE_ENET_TXE	include/commproc.h	/^#define SCCE_ENET_TXE	/;"	d
SCCM_BSY	arch/powerpc/include/asm/cpm_8260.h	/^#define	SCCM_BSY	/;"	d
SCCM_BSY	arch/powerpc/include/asm/cpm_85xx.h	/^#define	SCCM_BSY	/;"	d
SCCM_BSY	include/commproc.h	/^#define	SCCM_BSY	/;"	d
SCCM_RX	arch/powerpc/include/asm/cpm_8260.h	/^#define	SCCM_RX	/;"	d
SCCM_RX	arch/powerpc/include/asm/cpm_85xx.h	/^#define	SCCM_RX	/;"	d
SCCM_RX	include/commproc.h	/^#define	SCCM_RX	/;"	d
SCCM_TX	arch/powerpc/include/asm/cpm_8260.h	/^#define	SCCM_TX	/;"	d
SCCM_TX	arch/powerpc/include/asm/cpm_85xx.h	/^#define	SCCM_TX	/;"	d
SCCM_TX	include/commproc.h	/^#define	SCCM_TX	/;"	d
SCCM_TXE	arch/powerpc/include/asm/cpm_8260.h	/^#define	SCCM_TXE	/;"	d
SCCM_TXE	arch/powerpc/include/asm/cpm_85xx.h	/^#define	SCCM_TXE	/;"	d
SCCM_TXE	include/commproc.h	/^#define	SCCM_TXE	/;"	d
SCCR1_CLOCKS_EN	include/configs/ac14xx.h	/^#define SCCR1_CLOCKS_EN	/;"	d
SCCR1_CLOCKS_EN	include/configs/aria.h	/^#define SCCR1_CLOCKS_EN	/;"	d
SCCR1_CLOCKS_EN	include/configs/mecp5123.h	/^#define SCCR1_CLOCKS_EN	/;"	d
SCCR1_CLOCKS_EN	include/configs/mpc5121ads.h	/^#define SCCR1_CLOCKS_EN	/;"	d
SCCR1_CLOCKS_EN	include/configs/pdm360ng.h	/^#define SCCR1_CLOCKS_EN	/;"	d
SCCR2_CLOCKS_EN	include/configs/ac14xx.h	/^#define SCCR2_CLOCKS_EN	/;"	d
SCCR2_CLOCKS_EN	include/configs/aria.h	/^#define SCCR2_CLOCKS_EN	/;"	d
SCCR2_CLOCKS_EN	include/configs/mecp5123.h	/^#define SCCR2_CLOCKS_EN	/;"	d
SCCR2_CLOCKS_EN	include/configs/mpc5121ads.h	/^#define SCCR2_CLOCKS_EN	/;"	d
SCCR2_CLOCKS_EN	include/configs/pdm360ng.h	/^#define SCCR2_CLOCKS_EN	/;"	d
SCCR_CLPD	include/mpc8260.h	/^#define SCCR_CLPD	/;"	d
SCCR_CLPD	include/mpc85xx.h	/^#define SCCR_CLPD /;"	d
SCCR_COM00	include/mpc5xx.h	/^#define SCCR_COM00	/;"	d
SCCR_COM00	include/mpc8xx.h	/^#define SCCR_COM00	/;"	d
SCCR_COM01	include/mpc5xx.h	/^#define SCCR_COM01	/;"	d
SCCR_COM01	include/mpc8xx.h	/^#define SCCR_COM01	/;"	d
SCCR_COM10	include/mpc8xx.h	/^#define SCCR_COM10	/;"	d
SCCR_COM11	include/mpc8xx.h	/^#define SCCR_COM11	/;"	d
SCCR_CRQEN	include/mpc8xx.h	/^#define SCCR_CRQEN	/;"	d
SCCR_DFALCD00	include/mpc8xx.h	/^#define SCCR_DFALCD00	/;"	d
SCCR_DFALCD01	include/mpc8xx.h	/^#define SCCR_DFALCD01	/;"	d
SCCR_DFALCD10	include/mpc8xx.h	/^#define SCCR_DFALCD10	/;"	d
SCCR_DFALCD11	include/mpc8xx.h	/^#define SCCR_DFALCD11	/;"	d
SCCR_DFBRG00	include/mpc8260.h	/^#define SCCR_DFBRG00	/;"	d
SCCR_DFBRG00	include/mpc85xx.h	/^#define SCCR_DFBRG00 /;"	d
SCCR_DFBRG00	include/mpc8xx.h	/^#define SCCR_DFBRG00	/;"	d
SCCR_DFBRG01	include/mpc8260.h	/^#define SCCR_DFBRG01	/;"	d
SCCR_DFBRG01	include/mpc85xx.h	/^#define SCCR_DFBRG01 /;"	d
SCCR_DFBRG01	include/mpc8xx.h	/^#define SCCR_DFBRG01	/;"	d
SCCR_DFBRG10	include/mpc8260.h	/^#define SCCR_DFBRG10	/;"	d
SCCR_DFBRG10	include/mpc85xx.h	/^#define SCCR_DFBRG10 /;"	d
SCCR_DFBRG10	include/mpc8xx.h	/^#define SCCR_DFBRG10	/;"	d
SCCR_DFBRG11	include/mpc8260.h	/^#define SCCR_DFBRG11	/;"	d
SCCR_DFBRG11	include/mpc85xx.h	/^#define SCCR_DFBRG11 /;"	d
SCCR_DFBRG11	include/mpc8xx.h	/^#define SCCR_DFBRG11	/;"	d
SCCR_DFBRG_MSK	include/mpc8260.h	/^#define SCCR_DFBRG_MSK	/;"	d
SCCR_DFBRG_MSK	include/mpc85xx.h	/^#define SCCR_DFBRG_MSK /;"	d
SCCR_DFBRG_SHIFT	include/mpc8260.h	/^#define SCCR_DFBRG_SHIFT /;"	d
SCCR_DFBRG_SHIFT	include/mpc85xx.h	/^#define SCCR_DFBRG_SHIFT /;"	d
SCCR_DFLCD000	include/mpc8xx.h	/^#define SCCR_DFLCD000	/;"	d
SCCR_DFLCD001	include/mpc8xx.h	/^#define SCCR_DFLCD001	/;"	d
SCCR_DFLCD010	include/mpc8xx.h	/^#define SCCR_DFLCD010	/;"	d
SCCR_DFLCD011	include/mpc8xx.h	/^#define SCCR_DFLCD011	/;"	d
SCCR_DFLCD100	include/mpc8xx.h	/^#define SCCR_DFLCD100	/;"	d
SCCR_DFLCD101	include/mpc8xx.h	/^#define SCCR_DFLCD101	/;"	d
SCCR_DFLCD110	include/mpc8xx.h	/^#define SCCR_DFLCD110	/;"	d
SCCR_DFLCD111	include/mpc8xx.h	/^#define SCCR_DFLCD111	/;"	d
SCCR_DFNH000	include/mpc5xx.h	/^#define SCCR_DFNH000	/;"	d
SCCR_DFNH000	include/mpc8xx.h	/^#define SCCR_DFNH000	/;"	d
SCCR_DFNH110	include/mpc8xx.h	/^#define SCCR_DFNH110	/;"	d
SCCR_DFNH111	include/mpc8xx.h	/^#define SCCR_DFNH111	/;"	d
SCCR_DFNH_MSK	include/mpc5xx.h	/^#define SCCR_DFNH_MSK	/;"	d
SCCR_DFNL000	include/mpc5xx.h	/^#define SCCR_DFNL000	/;"	d
SCCR_DFNL000	include/mpc8xx.h	/^#define SCCR_DFNL000	/;"	d
SCCR_DFNL001	include/mpc8xx.h	/^#define SCCR_DFNL001	/;"	d
SCCR_DFNL010	include/mpc8xx.h	/^#define SCCR_DFNL010	/;"	d
SCCR_DFNL011	include/mpc8xx.h	/^#define SCCR_DFNL011	/;"	d
SCCR_DFNL100	include/mpc8xx.h	/^#define SCCR_DFNL100	/;"	d
SCCR_DFNL101	include/mpc8xx.h	/^#define SCCR_DFNL101	/;"	d
SCCR_DFNL110	include/mpc8xx.h	/^#define SCCR_DFNL110	/;"	d
SCCR_DFNL111	include/mpc8xx.h	/^#define SCCR_DFNL111	/;"	d
SCCR_DFNL_MSK	include/mpc5xx.h	/^#define SCCR_DFNL_MSK	/;"	d
SCCR_DFNL_SHIFT	include/mpc5xx.h	/^#define SCCR_DFNL_SHIFT /;"	d
SCCR_DFSYNC00	include/mpc8xx.h	/^#define SCCR_DFSYNC00	/;"	d
SCCR_DFSYNC01	include/mpc8xx.h	/^#define SCCR_DFSYNC01	/;"	d
SCCR_DFSYNC10	include/mpc8xx.h	/^#define SCCR_DFSYNC10	/;"	d
SCCR_DFSYNC11	include/mpc8xx.h	/^#define SCCR_DFSYNC11	/;"	d
SCCR_EBDF00	include/mpc5xx.h	/^#define SCCR_EBDF00	/;"	d
SCCR_EBDF00	include/mpc8xx.h	/^#define SCCR_EBDF00	/;"	d
SCCR_EBDF01	include/mpc8xx.h	/^#define SCCR_EBDF01	/;"	d
SCCR_EBDF10	include/mpc8xx.h	/^#define SCCR_EBDF10	/;"	d
SCCR_EBDF11	include/mpc5xx.h	/^#define SCCR_EBDF11	/;"	d
SCCR_EBDF11	include/mpc8xx.h	/^#define SCCR_EBDF11	/;"	d
SCCR_ENCCM	include/mpc83xx.h	/^#define SCCR_ENCCM	/;"	d
SCCR_ENCCM_0	include/mpc83xx.h	/^#define SCCR_ENCCM_0	/;"	d
SCCR_ENCCM_1	include/mpc83xx.h	/^#define SCCR_ENCCM_1	/;"	d
SCCR_ENCCM_2	include/mpc83xx.h	/^#define SCCR_ENCCM_2	/;"	d
SCCR_ENCCM_3	include/mpc83xx.h	/^#define SCCR_ENCCM_3	/;"	d
SCCR_ENCCM_SHIFT	include/mpc83xx.h	/^#define SCCR_ENCCM_SHIFT	/;"	d
SCCR_MASK	include/configs/PATI.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM823L.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM823M.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM850L.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM850M.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM855L.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM855M.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM860L.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM860M.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM862L.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM862M.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM866M.h	/^#define SCCR_MASK	/;"	d
SCCR_MASK	include/configs/TQM885D.h	/^#define SCCR_MASK	/;"	d
SCCR_PCICM	include/mpc83xx.h	/^#define SCCR_PCICM	/;"	d
SCCR_PCICM_SHIFT	include/mpc83xx.h	/^#define SCCR_PCICM_SHIFT	/;"	d
SCCR_PCIDF_MSK	include/mpc8260.h	/^#define SCCR_PCIDF_MSK	/;"	d
SCCR_PCIDF_SHIFT	include/mpc8260.h	/^#define SCCR_PCIDF_SHIFT /;"	d
SCCR_PCIEXP1CM	include/mpc83xx.h	/^#define SCCR_PCIEXP1CM	/;"	d
SCCR_PCIEXP1CM_0	include/mpc83xx.h	/^#define SCCR_PCIEXP1CM_0	/;"	d
SCCR_PCIEXP1CM_1	include/mpc83xx.h	/^#define SCCR_PCIEXP1CM_1	/;"	d
SCCR_PCIEXP1CM_2	include/mpc83xx.h	/^#define SCCR_PCIEXP1CM_2	/;"	d
SCCR_PCIEXP1CM_3	include/mpc83xx.h	/^#define SCCR_PCIEXP1CM_3	/;"	d
SCCR_PCIEXP1CM_SHIFT	include/mpc83xx.h	/^#define SCCR_PCIEXP1CM_SHIFT	/;"	d
SCCR_PCIEXP2CM	include/mpc83xx.h	/^#define SCCR_PCIEXP2CM	/;"	d
SCCR_PCIEXP2CM_0	include/mpc83xx.h	/^#define SCCR_PCIEXP2CM_0	/;"	d
SCCR_PCIEXP2CM_1	include/mpc83xx.h	/^#define SCCR_PCIEXP2CM_1	/;"	d
SCCR_PCIEXP2CM_2	include/mpc83xx.h	/^#define SCCR_PCIEXP2CM_2	/;"	d
SCCR_PCIEXP2CM_3	include/mpc83xx.h	/^#define SCCR_PCIEXP2CM_3	/;"	d
SCCR_PCIEXP2CM_SHIFT	include/mpc83xx.h	/^#define SCCR_PCIEXP2CM_SHIFT	/;"	d
SCCR_PCI_MODCK	include/mpc8260.h	/^#define SCCR_PCI_MODCK	/;"	d
SCCR_PCI_MODE	include/mpc8260.h	/^#define SCCR_PCI_MODE	/;"	d
SCCR_PRQEN	include/mpc8xx.h	/^#define SCCR_PRQEN	/;"	d
SCCR_RTDIV	include/mpc5xx.h	/^#define SCCR_RTDIV	/;"	d
SCCR_RTDIV	include/mpc8xx.h	/^#define SCCR_RTDIV	/;"	d
SCCR_RTSEL	include/mpc5xx.h	/^#define SCCR_RTSEL	/;"	d
SCCR_RTSEL	include/mpc8xx.h	/^#define SCCR_RTSEL	/;"	d
SCCR_SATA1CM	include/mpc83xx.h	/^#define SCCR_SATA1CM	/;"	d
SCCR_SATA1CM_SHIFT	include/mpc83xx.h	/^#define SCCR_SATA1CM_SHIFT	/;"	d
SCCR_SATACM	include/mpc83xx.h	/^#define SCCR_SATACM	/;"	d
SCCR_SATACM_0	include/mpc83xx.h	/^#define SCCR_SATACM_0	/;"	d
SCCR_SATACM_1	include/mpc83xx.h	/^#define SCCR_SATACM_1	/;"	d
SCCR_SATACM_2	include/mpc83xx.h	/^#define SCCR_SATACM_2	/;"	d
SCCR_SATACM_3	include/mpc83xx.h	/^#define SCCR_SATACM_3	/;"	d
SCCR_SATACM_SHIFT	include/mpc83xx.h	/^#define SCCR_SATACM_SHIFT	/;"	d
SCCR_SDHCCM	include/mpc83xx.h	/^#define SCCR_SDHCCM	/;"	d
SCCR_SDHCCM_0	include/mpc83xx.h	/^#define SCCR_SDHCCM_0	/;"	d
SCCR_SDHCCM_1	include/mpc83xx.h	/^#define SCCR_SDHCCM_1	/;"	d
SCCR_SDHCCM_2	include/mpc83xx.h	/^#define SCCR_SDHCCM_2	/;"	d
SCCR_SDHCCM_3	include/mpc83xx.h	/^#define SCCR_SDHCCM_3	/;"	d
SCCR_SDHCCM_SHIFT	include/mpc83xx.h	/^#define SCCR_SDHCCM_SHIFT	/;"	d
SCCR_TBS	include/mpc5xx.h	/^#define SCCR_TBS	/;"	d
SCCR_TBS	include/mpc8xx.h	/^#define SCCR_TBS	/;"	d
SCCR_TDMCM	include/mpc83xx.h	/^#define SCCR_TDMCM	/;"	d
SCCR_TDMCM_0	include/mpc83xx.h	/^#define SCCR_TDMCM_0	/;"	d
SCCR_TDMCM_1	include/mpc83xx.h	/^#define SCCR_TDMCM_1	/;"	d
SCCR_TDMCM_2	include/mpc83xx.h	/^#define SCCR_TDMCM_2	/;"	d
SCCR_TDMCM_3	include/mpc83xx.h	/^#define SCCR_TDMCM_3	/;"	d
SCCR_TDMCM_SHIFT	include/mpc83xx.h	/^#define SCCR_TDMCM_SHIFT	/;"	d
SCCR_TSEC1CM	include/mpc83xx.h	/^#define SCCR_TSEC1CM	/;"	d
SCCR_TSEC1CM_0	include/mpc83xx.h	/^#define SCCR_TSEC1CM_0	/;"	d
SCCR_TSEC1CM_1	include/mpc83xx.h	/^#define SCCR_TSEC1CM_1	/;"	d
SCCR_TSEC1CM_2	include/mpc83xx.h	/^#define SCCR_TSEC1CM_2	/;"	d
SCCR_TSEC1CM_3	include/mpc83xx.h	/^#define SCCR_TSEC1CM_3	/;"	d
SCCR_TSEC1CM_SHIFT	include/mpc83xx.h	/^#define SCCR_TSEC1CM_SHIFT	/;"	d
SCCR_TSEC1ON	include/mpc83xx.h	/^#define SCCR_TSEC1ON	/;"	d
SCCR_TSEC1ON_SHIFT	include/mpc83xx.h	/^#define SCCR_TSEC1ON_SHIFT	/;"	d
SCCR_TSEC2CM	include/mpc83xx.h	/^#define SCCR_TSEC2CM	/;"	d
SCCR_TSEC2CM_0	include/mpc83xx.h	/^#define SCCR_TSEC2CM_0	/;"	d
SCCR_TSEC2CM_1	include/mpc83xx.h	/^#define SCCR_TSEC2CM_1	/;"	d
SCCR_TSEC2CM_2	include/mpc83xx.h	/^#define SCCR_TSEC2CM_2	/;"	d
SCCR_TSEC2CM_3	include/mpc83xx.h	/^#define SCCR_TSEC2CM_3	/;"	d
SCCR_TSEC2CM_SHIFT	include/mpc83xx.h	/^#define SCCR_TSEC2CM_SHIFT	/;"	d
SCCR_TSEC2ON	include/mpc83xx.h	/^#define SCCR_TSEC2ON	/;"	d
SCCR_TSEC2ON_SHIFT	include/mpc83xx.h	/^#define SCCR_TSEC2ON_SHIFT	/;"	d
SCCR_USBCM	include/mpc83xx.h	/^#define SCCR_USBCM	/;"	d
SCCR_USBCM_0	include/mpc83xx.h	/^#define SCCR_USBCM_0	/;"	d
SCCR_USBCM_1	include/mpc83xx.h	/^#define SCCR_USBCM_1	/;"	d
SCCR_USBCM_2	include/mpc83xx.h	/^#define SCCR_USBCM_2	/;"	d
SCCR_USBCM_3	include/mpc83xx.h	/^#define SCCR_USBCM_3	/;"	d
SCCR_USBCM_SHIFT	include/mpc83xx.h	/^#define SCCR_USBCM_SHIFT	/;"	d
SCCR_USBDRCM	include/mpc83xx.h	/^#define SCCR_USBDRCM	/;"	d
SCCR_USBDRCM_0	include/mpc83xx.h	/^#define SCCR_USBDRCM_0	/;"	d
SCCR_USBDRCM_1	include/mpc83xx.h	/^#define SCCR_USBDRCM_1	/;"	d
SCCR_USBDRCM_2	include/mpc83xx.h	/^#define SCCR_USBDRCM_2	/;"	d
SCCR_USBDRCM_3	include/mpc83xx.h	/^#define SCCR_USBDRCM_3	/;"	d
SCCR_USBDRCM_SHIFT	include/mpc83xx.h	/^#define SCCR_USBDRCM_SHIFT	/;"	d
SCCR_USBMPHCM	include/mpc83xx.h	/^#define SCCR_USBMPHCM	/;"	d
SCCR_USBMPHCM_SHIFT	include/mpc83xx.h	/^#define SCCR_USBMPHCM_SHIFT	/;"	d
SCCSTO_29	drivers/mmc/sh_mmcif.h	/^#define SCCSTO_29	/;"	d
SCCSid	lib/dhry/dhry_1.c	/^char SCCSid[] = "@(#) @(#)dhry_1.c:3.4 -- 5\/15\/91 19:30:21";$/;"	v	typeref:typename:char[]
SCCTRL_V	board/spear/common/spr_lowlevel_init.S	/^SCCTRL_V:$/;"	l
SCC_ABP_RD	board/micronas/vct/scc.h	/^	SCC_ABP_RD,		\/* SCC_ABP Read channel			*\/$/;"	e	enum:scc_id
SCC_ABP_WR	board/micronas/vct/scc.h	/^	SCC_ABP_WR,		\/* SCC_ABP Write channel		*\/$/;"	e	enum:scc_id
SCC_AD_RD	board/micronas/vct/scc.h	/^	SCC_AD_RD,		\/* SCC_AD Read channel			*\/$/;"	e	enum:scc_id
SCC_AD_WR	board/micronas/vct/scc.h	/^	SCC_AD_WR,		\/* SCC_AD Write channel			*\/$/;"	e	enum:scc_id
SCC_BASE	board/armltd/vexpress/vexpress_tc2.c	/^#define SCC_BASE	/;"	d	file:
SCC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SCC_BASE_ADDR	/;"	d
SCC_CMD	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_CMD(/;"	d
SCC_CMD_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_CMD_OFFS	/;"	d
SCC_CPU1_BRIDGE_RW	board/micronas/vct/scc.h	/^	SCC_CPU1_BRIDGE_RW,	\/* SCC_CPU1_BRIDGE Read\/Write channel	*\/$/;"	e	enum:scc_id
SCC_CPU1_SPDMA_RW	board/micronas/vct/scc.h	/^	SCC_CPU1_SPDMA_RW,	\/* SCC_CPU1_SPDMA Read\/Write channel	*\/$/;"	e	enum:scc_id
SCC_DBG_IDLE	board/micronas/vct/scc.h	/^#define SCC_DBG_IDLE	/;"	d
SCC_DBG_SYNC_RES	board/micronas/vct/scc.h	/^#define SCC_DBG_SYNC_RES	/;"	d
SCC_DEBUG	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_DEBUG(/;"	d
SCC_DEBUG_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_DEBUG_OFFS	/;"	d
SCC_DI_MVAL_RD	board/micronas/vct/scc.h	/^	SCC_DI_MVAL_RD,		\/* SCC_DI_MVAL Read channel		*\/$/;"	e	enum:scc_id
SCC_DI_MVAL_WR	board/micronas/vct/scc.h	/^	SCC_DI_MVAL_WR,		\/* SCC_DI_MVAL Write channel		*\/$/;"	e	enum:scc_id
SCC_DI_TNR_FIELD_RD	board/micronas/vct/scc.h	/^	SCC_DI_TNR_FIELD_RD,	\/* SCC_DI_TNR_FIELD Read channel	*\/$/;"	e	enum:scc_id
SCC_DI_TNR_FRAME_RD	board/micronas/vct/scc.h	/^	SCC_DI_TNR_FRAME_RD,	\/* SCC_DI_TNR_FRAME Read channel	*\/$/;"	e	enum:scc_id
SCC_DI_TNR_WR	board/micronas/vct/scc.h	/^	SCC_DI_TNR_WR,		\/* SCC_DI_TNR Write channel		*\/$/;"	e	enum:scc_id
SCC_DMA_CFG	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_DMA_CFG(/;"	d
SCC_DMA_CFG_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_DMA_CFG_OFFS	/;"	d
SCC_DMA_OFFSET	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_DMA_OFFSET(/;"	d
SCC_DMA_OFFSET_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_DMA_OFFSET_OFFS	/;"	d
SCC_DP_AGPU_RD	board/micronas/vct/scc.h	/^	SCC_DP_AGPU_RD,		\/* SCC_DP_AGPU Read channel		*\/$/;"	e	enum:scc_id
SCC_DP_GRAPHIC_RD	board/micronas/vct/scc.h	/^	SCC_DP_GRAPHIC_RD,	\/* SCC_DP_GRAPHIC Read channel		*\/$/;"	e	enum:scc_id
SCC_DP_OSD_RD	board/micronas/vct/scc.h	/^	SCC_DP_OSD_RD,		\/* SCC_DP_OSD Read channel		*\/$/;"	e	enum:scc_id
SCC_DVP_OSD_RD	board/micronas/vct/scc.h	/^	SCC_DVP_OSD_RD,		\/* SCC_DVP_OSD Read channel		*\/$/;"	e	enum:scc_id
SCC_DVP_VBI_RD	board/micronas/vct/scc.h	/^	SCC_DVP_VBI_RD,		\/* SCC_DVP_VBI Read channel		*\/$/;"	e	enum:scc_id
SCC_EB	include/commproc.h	/^#define SCC_EB	/;"	d
SCC_EBI_RW	board/micronas/vct/scc.h	/^	SCC_EBI_RW,		\/* SCC_EBI Read\/Write channel		*\/$/;"	e	enum:scc_id
SCC_EMMC_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define SCC_EMMC_IRQ	/;"	d
SCC_ENABLE	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_ENABLE(/;"	d
SCC_ENABLE_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_ENABLE_OFFS	/;"	d
SCC_ENET	include/commproc.h	/^#define	SCC_ENET	/;"	d
SCC_ENET	include/commproc.h	/^#define SCC_ENET	/;"	d
SCC_EWARP_RW	board/micronas/vct/scc.h	/^	SCC_EWARP_RW,		\/* SCC_EWARP Read\/Write channel		*\/$/;"	e	enum:scc_id
SCC_FE_3DCOMB_RD	board/micronas/vct/scc.h	/^	SCC_FE_3DCOMB_RD,	\/* SCC_FE_3DCOMB Read channel		*\/$/;"	e	enum:scc_id
SCC_FE_3DCOMB_WR	board/micronas/vct/scc.h	/^	SCC_FE_3DCOMB_WR,	\/* SCC_FE_3DCOMB Write channel		*\/$/;"	e	enum:scc_id
SCC_GA_SRC1_RD	board/micronas/vct/scc.h	/^	SCC_GA_SRC1_RD,		\/* SCC_GA_SRC1 Read channel		*\/$/;"	e	enum:scc_id
SCC_GA_SRC2_RD	board/micronas/vct/scc.h	/^	SCC_GA_SRC2_RD,		\/* SCC_GA_SRC2 Read channel		*\/$/;"	e	enum:scc_id
SCC_GA_WR	board/micronas/vct/scc.h	/^	SCC_GA_WR,		\/* SCC_GA Write channel			*\/$/;"	e	enum:scc_id
SCC_GSMRH_CDP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_CDP	/;"	d
SCC_GSMRH_CDP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_CDP	/;"	d
SCC_GSMRH_CDP	include/commproc.h	/^#define SCC_GSMRH_CDP	/;"	d
SCC_GSMRH_CDS	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_CDS	/;"	d
SCC_GSMRH_CDS	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_CDS	/;"	d
SCC_GSMRH_CDS	include/commproc.h	/^#define SCC_GSMRH_CDS	/;"	d
SCC_GSMRH_CTSP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_CTSP	/;"	d
SCC_GSMRH_CTSP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_CTSP	/;"	d
SCC_GSMRH_CTSP	include/commproc.h	/^#define SCC_GSMRH_CTSP	/;"	d
SCC_GSMRH_CTSS	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_CTSS	/;"	d
SCC_GSMRH_CTSS	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_CTSS	/;"	d
SCC_GSMRH_CTSS	include/commproc.h	/^#define SCC_GSMRH_CTSS	/;"	d
SCC_GSMRH_GDE	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_GDE	/;"	d
SCC_GSMRH_GDE	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_GDE	/;"	d
SCC_GSMRH_GDE	include/commproc.h	/^#define SCC_GSMRH_GDE	/;"	d
SCC_GSMRH_IRP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_IRP	/;"	d
SCC_GSMRH_IRP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_IRP	/;"	d
SCC_GSMRH_IRP	include/commproc.h	/^#define SCC_GSMRH_IRP	/;"	d
SCC_GSMRH_REVD	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_REVD	/;"	d
SCC_GSMRH_REVD	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_REVD	/;"	d
SCC_GSMRH_REVD	include/commproc.h	/^#define SCC_GSMRH_REVD	/;"	d
SCC_GSMRH_RFW	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_RFW	/;"	d
SCC_GSMRH_RFW	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_RFW	/;"	d
SCC_GSMRH_RFW	include/commproc.h	/^#define SCC_GSMRH_RFW	/;"	d
SCC_GSMRH_RSYN	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_RSYN	/;"	d
SCC_GSMRH_RSYN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_RSYN	/;"	d
SCC_GSMRH_RSYN	include/commproc.h	/^#define SCC_GSMRH_RSYN	/;"	d
SCC_GSMRH_RTSM	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_RTSM	/;"	d
SCC_GSMRH_RTSM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_RTSM	/;"	d
SCC_GSMRH_RTSM	include/commproc.h	/^#define SCC_GSMRH_RTSM	/;"	d
SCC_GSMRH_SYNL16	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_SYNL16	/;"	d
SCC_GSMRH_SYNL16	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_SYNL16	/;"	d
SCC_GSMRH_SYNL16	include/commproc.h	/^#define SCC_GSMRH_SYNL16	/;"	d
SCC_GSMRH_SYNL4	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_SYNL4	/;"	d
SCC_GSMRH_SYNL4	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_SYNL4	/;"	d
SCC_GSMRH_SYNL4	include/commproc.h	/^#define SCC_GSMRH_SYNL4	/;"	d
SCC_GSMRH_SYNL8	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_SYNL8	/;"	d
SCC_GSMRH_SYNL8	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_SYNL8	/;"	d
SCC_GSMRH_SYNL8	include/commproc.h	/^#define SCC_GSMRH_SYNL8	/;"	d
SCC_GSMRH_TCRC_BISYNC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TCRC_BISYNC	/;"	d
SCC_GSMRH_TCRC_BISYNC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TCRC_BISYNC	/;"	d
SCC_GSMRH_TCRC_BISYNC	include/commproc.h	/^#define SCC_GSMRH_TCRC_BISYNC	/;"	d
SCC_GSMRH_TCRC_CCITT	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TCRC_CCITT	/;"	d
SCC_GSMRH_TCRC_CCITT	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TCRC_CCITT	/;"	d
SCC_GSMRH_TCRC_CCITT	include/commproc.h	/^#define SCC_GSMRH_TCRC_CCITT	/;"	d
SCC_GSMRH_TCRC_HDLC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TCRC_HDLC	/;"	d
SCC_GSMRH_TCRC_HDLC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TCRC_HDLC	/;"	d
SCC_GSMRH_TCRC_HDLC	include/commproc.h	/^#define SCC_GSMRH_TCRC_HDLC	/;"	d
SCC_GSMRH_TFL	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TFL	/;"	d
SCC_GSMRH_TFL	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TFL	/;"	d
SCC_GSMRH_TFL	include/commproc.h	/^#define SCC_GSMRH_TFL	/;"	d
SCC_GSMRH_TRX	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TRX	/;"	d
SCC_GSMRH_TRX	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TRX	/;"	d
SCC_GSMRH_TRX	include/commproc.h	/^#define SCC_GSMRH_TRX	/;"	d
SCC_GSMRH_TTX	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TTX	/;"	d
SCC_GSMRH_TTX	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TTX	/;"	d
SCC_GSMRH_TTX	include/commproc.h	/^#define SCC_GSMRH_TTX	/;"	d
SCC_GSMRH_TXSY	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRH_TXSY	/;"	d
SCC_GSMRH_TXSY	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRH_TXSY	/;"	d
SCC_GSMRH_TXSY	include/commproc.h	/^#define SCC_GSMRH_TXSY	/;"	d
SCC_GSMRL_DIAG_ECHO	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_DIAG_ECHO	/;"	d
SCC_GSMRL_DIAG_ECHO	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_DIAG_ECHO	/;"	d
SCC_GSMRL_DIAG_ECHO	include/commproc.h	/^#define SCC_GSMRL_DIAG_ECHO	/;"	d
SCC_GSMRL_DIAG_LE	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_DIAG_LE	/;"	d
SCC_GSMRL_DIAG_LE	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_DIAG_LE	/;"	d
SCC_GSMRL_DIAG_LE	include/commproc.h	/^#define SCC_GSMRL_DIAG_LE	/;"	d
SCC_GSMRL_DIAG_LOOP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_DIAG_LOOP	/;"	d
SCC_GSMRL_DIAG_LOOP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_DIAG_LOOP	/;"	d
SCC_GSMRL_DIAG_LOOP	include/commproc.h	/^#define SCC_GSMRL_DIAG_LOOP	/;"	d
SCC_GSMRL_DIAG_NORM	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_DIAG_NORM	/;"	d
SCC_GSMRL_DIAG_NORM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_DIAG_NORM	/;"	d
SCC_GSMRL_DIAG_NORM	include/commproc.h	/^#define SCC_GSMRL_DIAG_NORM	/;"	d
SCC_GSMRL_EDGE_BOTH	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_EDGE_BOTH	/;"	d
SCC_GSMRL_EDGE_BOTH	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_EDGE_BOTH	/;"	d
SCC_GSMRL_EDGE_BOTH	include/commproc.h	/^#define SCC_GSMRL_EDGE_BOTH	/;"	d
SCC_GSMRL_EDGE_NEG	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_EDGE_NEG	/;"	d
SCC_GSMRL_EDGE_NEG	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_EDGE_NEG	/;"	d
SCC_GSMRL_EDGE_NEG	include/commproc.h	/^#define SCC_GSMRL_EDGE_NEG	/;"	d
SCC_GSMRL_EDGE_NONE	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_EDGE_NONE	/;"	d
SCC_GSMRL_EDGE_NONE	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_EDGE_NONE	/;"	d
SCC_GSMRL_EDGE_NONE	include/commproc.h	/^#define SCC_GSMRL_EDGE_NONE	/;"	d
SCC_GSMRL_EDGE_POS	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_EDGE_POS	/;"	d
SCC_GSMRL_EDGE_POS	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_EDGE_POS	/;"	d
SCC_GSMRL_EDGE_POS	include/commproc.h	/^#define SCC_GSMRL_EDGE_POS	/;"	d
SCC_GSMRL_ENR	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_ENR	/;"	d
SCC_GSMRL_ENR	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_ENR	/;"	d
SCC_GSMRL_ENR	include/commproc.h	/^#define SCC_GSMRL_ENR	/;"	d
SCC_GSMRL_ENT	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_ENT	/;"	d
SCC_GSMRL_ENT	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_ENT	/;"	d
SCC_GSMRL_ENT	include/commproc.h	/^#define SCC_GSMRL_ENT	/;"	d
SCC_GSMRL_MODE_AHDLC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_AHDLC	/;"	d
SCC_GSMRL_MODE_AHDLC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_AHDLC	/;"	d
SCC_GSMRL_MODE_AHDLC	include/commproc.h	/^#define SCC_GSMRL_MODE_AHDLC	/;"	d
SCC_GSMRL_MODE_ATALK	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_ATALK	/;"	d
SCC_GSMRL_MODE_ATALK	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_ATALK	/;"	d
SCC_GSMRL_MODE_ATALK	include/commproc.h	/^#define SCC_GSMRL_MODE_ATALK	/;"	d
SCC_GSMRL_MODE_BISYNC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_BISYNC	/;"	d
SCC_GSMRL_MODE_BISYNC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_BISYNC	/;"	d
SCC_GSMRL_MODE_BISYNC	include/commproc.h	/^#define SCC_GSMRL_MODE_BISYNC	/;"	d
SCC_GSMRL_MODE_DDCMP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_DDCMP	/;"	d
SCC_GSMRL_MODE_DDCMP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_DDCMP	/;"	d
SCC_GSMRL_MODE_DDCMP	include/commproc.h	/^#define SCC_GSMRL_MODE_DDCMP	/;"	d
SCC_GSMRL_MODE_ENET	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_ENET	/;"	d
SCC_GSMRL_MODE_ENET	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_ENET	/;"	d
SCC_GSMRL_MODE_ENET	include/commproc.h	/^#define SCC_GSMRL_MODE_ENET	/;"	d
SCC_GSMRL_MODE_HDLC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_HDLC	/;"	d
SCC_GSMRL_MODE_HDLC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_HDLC	/;"	d
SCC_GSMRL_MODE_HDLC	include/commproc.h	/^#define SCC_GSMRL_MODE_HDLC	/;"	d
SCC_GSMRL_MODE_PROFIBUS	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_PROFIBUS	/;"	d
SCC_GSMRL_MODE_PROFIBUS	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_PROFIBUS	/;"	d
SCC_GSMRL_MODE_PROFIBUS	include/commproc.h	/^#define SCC_GSMRL_MODE_PROFIBUS	/;"	d
SCC_GSMRL_MODE_SS7	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_SS7	/;"	d
SCC_GSMRL_MODE_SS7	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_SS7	/;"	d
SCC_GSMRL_MODE_SS7	include/commproc.h	/^#define SCC_GSMRL_MODE_SS7	/;"	d
SCC_GSMRL_MODE_UART	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_UART	/;"	d
SCC_GSMRL_MODE_UART	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_UART	/;"	d
SCC_GSMRL_MODE_UART	include/commproc.h	/^#define SCC_GSMRL_MODE_UART	/;"	d
SCC_GSMRL_MODE_V14	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_MODE_V14	/;"	d
SCC_GSMRL_MODE_V14	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_MODE_V14	/;"	d
SCC_GSMRL_MODE_V14	include/commproc.h	/^#define SCC_GSMRL_MODE_V14	/;"	d
SCC_GSMRL_RDCR_1	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RDCR_1	/;"	d
SCC_GSMRL_RDCR_1	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RDCR_1	/;"	d
SCC_GSMRL_RDCR_1	include/commproc.h	/^#define SCC_GSMRL_RDCR_1	/;"	d
SCC_GSMRL_RDCR_16	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RDCR_16	/;"	d
SCC_GSMRL_RDCR_16	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RDCR_16	/;"	d
SCC_GSMRL_RDCR_16	include/commproc.h	/^#define SCC_GSMRL_RDCR_16	/;"	d
SCC_GSMRL_RDCR_32	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RDCR_32	/;"	d
SCC_GSMRL_RDCR_32	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RDCR_32	/;"	d
SCC_GSMRL_RDCR_32	include/commproc.h	/^#define SCC_GSMRL_RDCR_32	/;"	d
SCC_GSMRL_RDCR_8	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RDCR_8	/;"	d
SCC_GSMRL_RDCR_8	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RDCR_8	/;"	d
SCC_GSMRL_RDCR_8	include/commproc.h	/^#define SCC_GSMRL_RDCR_8	/;"	d
SCC_GSMRL_RENC_DFMAN	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RENC_DFMAN	/;"	d
SCC_GSMRL_RENC_DFMAN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RENC_DFMAN	/;"	d
SCC_GSMRL_RENC_DFMAN	include/commproc.h	/^#define SCC_GSMRL_RENC_DFMAN	/;"	d
SCC_GSMRL_RENC_FM0	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RENC_FM0	/;"	d
SCC_GSMRL_RENC_FM0	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RENC_FM0	/;"	d
SCC_GSMRL_RENC_FM0	include/commproc.h	/^#define SCC_GSMRL_RENC_FM0	/;"	d
SCC_GSMRL_RENC_MANCH	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RENC_MANCH	/;"	d
SCC_GSMRL_RENC_MANCH	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RENC_MANCH	/;"	d
SCC_GSMRL_RENC_MANCH	include/commproc.h	/^#define SCC_GSMRL_RENC_MANCH	/;"	d
SCC_GSMRL_RENC_NRZ	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RENC_NRZ	/;"	d
SCC_GSMRL_RENC_NRZ	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RENC_NRZ	/;"	d
SCC_GSMRL_RENC_NRZ	include/commproc.h	/^#define SCC_GSMRL_RENC_NRZ	/;"	d
SCC_GSMRL_RENC_NRZI	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RENC_NRZI	/;"	d
SCC_GSMRL_RENC_NRZI	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RENC_NRZI	/;"	d
SCC_GSMRL_RENC_NRZI	include/commproc.h	/^#define SCC_GSMRL_RENC_NRZI	/;"	d
SCC_GSMRL_RINV	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_RINV	/;"	d
SCC_GSMRL_RINV	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_RINV	/;"	d
SCC_GSMRL_RINV	include/commproc.h	/^#define SCC_GSMRL_RINV	/;"	d
SCC_GSMRL_SIR	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_SIR	/;"	d
SCC_GSMRL_SIR	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_SIR	/;"	d
SCC_GSMRL_SIR	include/commproc.h	/^#define SCC_GSMRL_SIR	/;"	d
SCC_GSMRL_TCI	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TCI	/;"	d
SCC_GSMRL_TCI	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TCI	/;"	d
SCC_GSMRL_TCI	include/commproc.h	/^#define SCC_GSMRL_TCI	/;"	d
SCC_GSMRL_TDCR_1	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TDCR_1	/;"	d
SCC_GSMRL_TDCR_1	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TDCR_1	/;"	d
SCC_GSMRL_TDCR_1	include/commproc.h	/^#define SCC_GSMRL_TDCR_1	/;"	d
SCC_GSMRL_TDCR_16	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TDCR_16	/;"	d
SCC_GSMRL_TDCR_16	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TDCR_16	/;"	d
SCC_GSMRL_TDCR_16	include/commproc.h	/^#define SCC_GSMRL_TDCR_16	/;"	d
SCC_GSMRL_TDCR_32	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TDCR_32	/;"	d
SCC_GSMRL_TDCR_32	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TDCR_32	/;"	d
SCC_GSMRL_TDCR_32	include/commproc.h	/^#define SCC_GSMRL_TDCR_32	/;"	d
SCC_GSMRL_TDCR_8	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TDCR_8	/;"	d
SCC_GSMRL_TDCR_8	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TDCR_8	/;"	d
SCC_GSMRL_TDCR_8	include/commproc.h	/^#define SCC_GSMRL_TDCR_8	/;"	d
SCC_GSMRL_TENC_DFMAN	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TENC_DFMAN	/;"	d
SCC_GSMRL_TENC_DFMAN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TENC_DFMAN	/;"	d
SCC_GSMRL_TENC_DFMAN	include/commproc.h	/^#define SCC_GSMRL_TENC_DFMAN	/;"	d
SCC_GSMRL_TENC_FM0	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TENC_FM0	/;"	d
SCC_GSMRL_TENC_FM0	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TENC_FM0	/;"	d
SCC_GSMRL_TENC_FM0	include/commproc.h	/^#define SCC_GSMRL_TENC_FM0	/;"	d
SCC_GSMRL_TENC_MANCH	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TENC_MANCH	/;"	d
SCC_GSMRL_TENC_MANCH	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TENC_MANCH	/;"	d
SCC_GSMRL_TENC_MANCH	include/commproc.h	/^#define SCC_GSMRL_TENC_MANCH	/;"	d
SCC_GSMRL_TENC_NRZ	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TENC_NRZ	/;"	d
SCC_GSMRL_TENC_NRZ	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TENC_NRZ	/;"	d
SCC_GSMRL_TENC_NRZ	include/commproc.h	/^#define SCC_GSMRL_TENC_NRZ	/;"	d
SCC_GSMRL_TENC_NRZI	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TENC_NRZI	/;"	d
SCC_GSMRL_TENC_NRZI	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TENC_NRZI	/;"	d
SCC_GSMRL_TENC_NRZI	include/commproc.h	/^#define SCC_GSMRL_TENC_NRZI	/;"	d
SCC_GSMRL_TEND	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TEND	/;"	d
SCC_GSMRL_TEND	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TEND	/;"	d
SCC_GSMRL_TEND	include/commproc.h	/^#define SCC_GSMRL_TEND	/;"	d
SCC_GSMRL_TINV	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TINV	/;"	d
SCC_GSMRL_TINV	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TINV	/;"	d
SCC_GSMRL_TINV	include/commproc.h	/^#define SCC_GSMRL_TINV	/;"	d
SCC_GSMRL_TPL_128	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_128	/;"	d
SCC_GSMRL_TPL_128	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_128	/;"	d
SCC_GSMRL_TPL_128	include/commproc.h	/^#define SCC_GSMRL_TPL_128	/;"	d
SCC_GSMRL_TPL_16	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_16	/;"	d
SCC_GSMRL_TPL_16	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_16	/;"	d
SCC_GSMRL_TPL_16	include/commproc.h	/^#define SCC_GSMRL_TPL_16	/;"	d
SCC_GSMRL_TPL_32	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_32	/;"	d
SCC_GSMRL_TPL_32	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_32	/;"	d
SCC_GSMRL_TPL_32	include/commproc.h	/^#define SCC_GSMRL_TPL_32	/;"	d
SCC_GSMRL_TPL_48	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_48	/;"	d
SCC_GSMRL_TPL_48	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_48	/;"	d
SCC_GSMRL_TPL_48	include/commproc.h	/^#define SCC_GSMRL_TPL_48	/;"	d
SCC_GSMRL_TPL_64	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_64	/;"	d
SCC_GSMRL_TPL_64	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_64	/;"	d
SCC_GSMRL_TPL_64	include/commproc.h	/^#define SCC_GSMRL_TPL_64	/;"	d
SCC_GSMRL_TPL_8	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_8	/;"	d
SCC_GSMRL_TPL_8	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_8	/;"	d
SCC_GSMRL_TPL_8	include/commproc.h	/^#define SCC_GSMRL_TPL_8	/;"	d
SCC_GSMRL_TPL_NONE	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPL_NONE	/;"	d
SCC_GSMRL_TPL_NONE	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPL_NONE	/;"	d
SCC_GSMRL_TPL_NONE	include/commproc.h	/^#define SCC_GSMRL_TPL_NONE	/;"	d
SCC_GSMRL_TPP_01	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPP_01	/;"	d
SCC_GSMRL_TPP_01	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPP_01	/;"	d
SCC_GSMRL_TPP_01	include/commproc.h	/^#define SCC_GSMRL_TPP_01	/;"	d
SCC_GSMRL_TPP_10	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPP_10	/;"	d
SCC_GSMRL_TPP_10	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPP_10	/;"	d
SCC_GSMRL_TPP_10	include/commproc.h	/^#define SCC_GSMRL_TPP_10	/;"	d
SCC_GSMRL_TPP_ALL1	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPP_ALL1	/;"	d
SCC_GSMRL_TPP_ALL1	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPP_ALL1	/;"	d
SCC_GSMRL_TPP_ALL1	include/commproc.h	/^#define SCC_GSMRL_TPP_ALL1	/;"	d
SCC_GSMRL_TPP_ZEROS	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TPP_ZEROS	/;"	d
SCC_GSMRL_TPP_ZEROS	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TPP_ZEROS	/;"	d
SCC_GSMRL_TPP_ZEROS	include/commproc.h	/^#define SCC_GSMRL_TPP_ZEROS	/;"	d
SCC_GSMRL_TSNC_14	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TSNC_14	/;"	d
SCC_GSMRL_TSNC_14	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TSNC_14	/;"	d
SCC_GSMRL_TSNC_14	include/commproc.h	/^#define SCC_GSMRL_TSNC_14	/;"	d
SCC_GSMRL_TSNC_3	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TSNC_3	/;"	d
SCC_GSMRL_TSNC_3	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TSNC_3	/;"	d
SCC_GSMRL_TSNC_3	include/commproc.h	/^#define SCC_GSMRL_TSNC_3	/;"	d
SCC_GSMRL_TSNC_4	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TSNC_4	/;"	d
SCC_GSMRL_TSNC_4	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TSNC_4	/;"	d
SCC_GSMRL_TSNC_4	include/commproc.h	/^#define SCC_GSMRL_TSNC_4	/;"	d
SCC_GSMRL_TSNC_INF	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_GSMRL_TSNC_INF	/;"	d
SCC_GSMRL_TSNC_INF	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_GSMRL_TSNC_INF	/;"	d
SCC_GSMRL_TSNC_INF	include/commproc.h	/^#define SCC_GSMRL_TSNC_INF	/;"	d
SCC_IMR	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_IMR(/;"	d
SCC_IMR_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_IMR_OFFS	/;"	d
SCC_INDEX	arch/powerpc/cpu/mpc8260/serial_scc.c	/^#define SCC_INDEX	/;"	d	file:
SCC_INDEX	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^#define SCC_INDEX	/;"	d	file:
SCC_INDEX	arch/powerpc/cpu/mpc8xx/serial.c	/^#define SCC_INDEX	/;"	d	file:
SCC_ISR	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_ISR(/;"	d
SCC_ISR_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_ISR_OFFS	/;"	d
SCC_MAX	board/micronas/vct/scc.h	/^	SCC_MAX			\/* maximum limit on the SCC id		*\/$/;"	e	enum:scc_id
SCC_MCI_CFG	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_MCI_CFG(/;"	d
SCC_MCI_CFG_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_MCI_CFG_OFFS	/;"	d
SCC_MGR_AFI_CAL_INIT_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_AFI_CAL_INIT_OFFSET	/;"	d
SCC_MGR_DQDQS_OUT_PHASE_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_DQDQS_OUT_PHASE_OFFSET	/;"	d
SCC_MGR_DQS_EN_DELAY_GATE_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_DQS_EN_DELAY_GATE_OFFSET	/;"	d
SCC_MGR_DQS_EN_DELAY_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_DQS_EN_DELAY_OFFSET	/;"	d
SCC_MGR_DQS_EN_PHASE_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_DQS_EN_PHASE_OFFSET	/;"	d
SCC_MGR_DQS_IN_DELAY_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_DQS_IN_DELAY_OFFSET	/;"	d
SCC_MGR_GROUP_COUNTER_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_GROUP_COUNTER_OFFSET	/;"	d
SCC_MGR_HHP_DQSE_MAP_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_HHP_DQSE_MAP_OFFSET	/;"	d
SCC_MGR_HHP_EXTRAS_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_HHP_EXTRAS_OFFSET	/;"	d
SCC_MGR_HHP_GLOBALS_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_HHP_GLOBALS_OFFSET	/;"	d
SCC_MGR_HHP_RFILE_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_HHP_RFILE_OFFSET	/;"	d
SCC_MGR_IO_IN_DELAY_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_IO_IN_DELAY_OFFSET	/;"	d
SCC_MGR_IO_OE_DELAY_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_IO_OE_DELAY_OFFSET	/;"	d
SCC_MGR_IO_OUT1_DELAY_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_IO_OUT1_DELAY_OFFSET	/;"	d
SCC_MGR_OCT_OUT1_DELAY_OFFSET	drivers/ddr/altera/sequencer.h	/^#define SCC_MGR_OCT_OUT1_DELAY_OFFSET	/;"	d
SCC_MR_VD_M_C_RD	board/micronas/vct/scc.h	/^	SCC_MR_VD_M_C_RD,	\/* SCC_MR_VD_M_C Read channel		*\/$/;"	e	enum:scc_id
SCC_MR_VD_M_Y_RD	board/micronas/vct/scc.h	/^	SCC_MR_VD_M_Y_RD,	\/* SCC_MR_VD_M_Y Read channel		*\/$/;"	e	enum:scc_id
SCC_MR_VD_S_C_RD	board/micronas/vct/scc.h	/^	SCC_MR_VD_S_C_RD,	\/* SCC_MR_VD_S_C Read channel		*\/$/;"	e	enum:scc_id
SCC_MR_VD_S_Y_RD	board/micronas/vct/scc.h	/^	SCC_MR_VD_S_Y_RD,	\/* SCC_MR_VD_S_Y Read channel		*\/$/;"	e	enum:scc_id
SCC_NULL	board/micronas/vct/scc.h	/^	SCC_NULL = -1,		\/* illegal SCC identifier		*\/$/;"	e	enum:scc_id
SCC_OPT_FIELD0_RD	board/micronas/vct/scc.h	/^	SCC_OPT_FIELD0_RD,	\/* SCC_OPT_FIELD0 Read channel		*\/$/;"	e	enum:scc_id
SCC_OPT_FIELD1_RD	board/micronas/vct/scc.h	/^	SCC_OPT_FIELD1_RD,	\/* SCC_OPT_FIELD1 Read channel		*\/$/;"	e	enum:scc_id
SCC_OPT_FIELD2_RD	board/micronas/vct/scc.h	/^	SCC_OPT_FIELD2_RD,	\/* SCC_OPT_FIELD2 Read channel		*\/$/;"	e	enum:scc_id
SCC_PACKET_CFG1	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PACKET_CFG1(/;"	d
SCC_PACKET_CFG1_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PACKET_CFG1_OFFS	/;"	d
SCC_PACKET_CFG2	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PACKET_CFG2(/;"	d
SCC_PACKET_CFG2_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PACKET_CFG2_OFFS	/;"	d
SCC_PACKET_CFG3	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PACKET_CFG3(/;"	d
SCC_PACKET_CFG3_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PACKET_CFG3_OFFS	/;"	d
SCC_PIP_FRAME_RD	board/micronas/vct/scc.h	/^	SCC_PIP_FRAME_RD,	\/* SCC_PIP_FRAME Read channel		*\/$/;"	e	enum:scc_id
SCC_PIP_FRAME_WR	board/micronas/vct/scc.h	/^	SCC_PIP_FRAME_WR,	\/* SCC_PIP_FRAME Write channel		*\/$/;"	e	enum:scc_id
SCC_PRIO	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PRIO(/;"	d
SCC_PRIO_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_PRIO_OFFS	/;"	d
SCC_PSMR_BRO	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_BRO	/;"	d
SCC_PSMR_BRO	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_BRO	/;"	d
SCC_PSMR_BRO	include/commproc.h	/^#define SCC_PSMR_BRO	/;"	d
SCC_PSMR_ENCRC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_ENCRC	/;"	d
SCC_PSMR_ENCRC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_ENCRC	/;"	d
SCC_PSMR_ENCRC	include/commproc.h	/^#define SCC_PSMR_ENCRC	/;"	d
SCC_PSMR_FC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_FC	/;"	d
SCC_PSMR_FC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_FC	/;"	d
SCC_PSMR_FC	include/commproc.h	/^#define SCC_PSMR_FC	/;"	d
SCC_PSMR_FDE	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_FDE	/;"	d
SCC_PSMR_FDE	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_FDE	/;"	d
SCC_PSMR_FDE	include/commproc.h	/^#define SCC_PSMR_FDE	/;"	d
SCC_PSMR_HBC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_HBC	/;"	d
SCC_PSMR_HBC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_HBC	/;"	d
SCC_PSMR_HBC	include/commproc.h	/^#define SCC_PSMR_HBC	/;"	d
SCC_PSMR_IAM	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_IAM	/;"	d
SCC_PSMR_IAM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_IAM	/;"	d
SCC_PSMR_IAM	include/commproc.h	/^#define SCC_PSMR_IAM	/;"	d
SCC_PSMR_LCW	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_LCW	/;"	d
SCC_PSMR_LCW	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_LCW	/;"	d
SCC_PSMR_LCW	include/commproc.h	/^#define SCC_PSMR_LCW	/;"	d
SCC_PSMR_LPB	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_LPB	/;"	d
SCC_PSMR_LPB	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_LPB	/;"	d
SCC_PSMR_LPB	include/commproc.h	/^#define SCC_PSMR_LPB	/;"	d
SCC_PSMR_NIB22	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_NIB22	/;"	d
SCC_PSMR_NIB22	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_NIB22	/;"	d
SCC_PSMR_NIB22	include/commproc.h	/^#define SCC_PSMR_NIB22	/;"	d
SCC_PSMR_PRO	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_PRO	/;"	d
SCC_PSMR_PRO	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_PRO	/;"	d
SCC_PSMR_PRO	include/commproc.h	/^#define SCC_PSMR_PRO	/;"	d
SCC_PSMR_RSH	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_RSH	/;"	d
SCC_PSMR_RSH	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_RSH	/;"	d
SCC_PSMR_RSH	include/commproc.h	/^#define SCC_PSMR_RSH	/;"	d
SCC_PSMR_SBT	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_SBT	/;"	d
SCC_PSMR_SBT	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_SBT	/;"	d
SCC_PSMR_SBT	include/commproc.h	/^#define SCC_PSMR_SBT	/;"	d
SCC_PSMR_SIP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_PSMR_SIP	/;"	d
SCC_PSMR_SIP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_PSMR_SIP	/;"	d
SCC_PSMR_SIP	include/commproc.h	/^#define SCC_PSMR_SIP	/;"	d
SCC_RC_FRAME0_RD	board/micronas/vct/scc.h	/^	SCC_RC_FRAME0_RD,	\/* SCC_RC_FRAME0 Read channel		*\/$/;"	e	enum:scc_id
SCC_RC_FRAME_WR	board/micronas/vct/scc.h	/^	SCC_RC_FRAME_WR,	\/* SCC_RC_FRAME Write channel		*\/$/;"	e	enum:scc_id
SCC_RESET	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_RESET(/;"	d
SCC_RESET_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_RESET_OFFS	/;"	d
SCC_RS_CTLSTS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_RS_CTLSTS(/;"	d
SCC_RS_CTLSTS_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_RS_CTLSTS_OFFS	/;"	d
SCC_SDIO_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define SCC_SDIO_IRQ	/;"	d
SCC_SD_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define SCC_SD_IRQ	/;"	d
SCC_STATUS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_STATUS(/;"	d
SCC_STATUS_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_STATUS_OFFS	/;"	d
SCC_TODR_TOD	arch/powerpc/include/asm/cpm_8260.h	/^#define SCC_TODR_TOD	/;"	d
SCC_TODR_TOD	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCC_TODR_TOD	/;"	d
SCC_TODR_TOD	include/commproc.h	/^#define SCC_TODR_TOD	/;"	d
SCC_TO_IMMEDIATE	board/micronas/vct/scc.h	/^#define SCC_TO_IMMEDIATE	/;"	d
SCC_TSD_WR	board/micronas/vct/scc.h	/^	SCC_TSD_WR,		\/* SCC_TSD Write channel		*\/$/;"	e	enum:scc_id
SCC_TSIO_RD	board/micronas/vct/scc.h	/^	SCC_TSIO_RD,		\/* SCC_TSIO Read channel		*\/$/;"	e	enum:scc_id
SCC_TSIO_WR	board/micronas/vct/scc.h	/^	SCC_TSIO_WR,		\/* SCC_TSIO Write channel		*\/$/;"	e	enum:scc_id
SCC_USB_RW	board/micronas/vct/scc.h	/^	SCC_USB_RW,		\/* SCC_USB Read\/Write channel		*\/$/;"	e	enum:scc_id
SCC_VCID	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_VCID(/;"	d
SCC_VCID_OFFS	board/micronas/vct/vcth/reg_scc.h	/^#define SCC_VCID_OFFS	/;"	d
SCC_VD_FRR_RD	board/micronas/vct/scc.h	/^	SCC_VD_FRR_RD,		\/* SCC_VD_FRR Read channel		*\/$/;"	e	enum:scc_id
SCC_VD_FRW_DISP_WR	board/micronas/vct/scc.h	/^	SCC_VD_FRW_DISP_WR,	\/* SCC_VD_FRW_DISP Write channel	*\/$/;"	e	enum:scc_id
SCC_VD_UD_ST_RW	board/micronas/vct/scc.h	/^	SCC_VD_UD_ST_RW,	\/* SCC_VD_UD_ST Read\/Write channel	*\/$/;"	e	enum:scc_id
SCD_MSK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                   SCD_MSK /;"	d
SCF0403852GGU04_ID	drivers/video/scf0403_lcd.c	/^#define SCF0403852GGU04_ID /;"	d	file:
SCF0403_LCD_H_	include/scf0403_lcd.h	/^#define SCF0403_LCD_H_$/;"	d
SCF0_BASE	arch/sh/include/asm/cpu_sh7750.h	/^#define SCF0_BASE	/;"	d
SCFCR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCFCR	/;"	d	file:
SCFCR_INIT	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCFCR_INIT	/;"	d	file:
SCFCR_MCE	drivers/serial/serial_sh.h	/^#define SCFCR_MCE /;"	d
SCFCR_RFRST	drivers/serial/serial_sh.h	/^#define SCFCR_RFRST /;"	d
SCFCR_TCRST	drivers/serial/serial_sh.h	/^#define SCFCR_TCRST /;"	d
SCFCR_TFRST	drivers/serial/serial_sh.h	/^#define SCFCR_TFRST /;"	d
SCFG	arch/avr32/include/asm/hmatrix-common.h	/^	u32	SCFG[16];$/;"	m	struct:hmatrix_regs	typeref:typename:u32[16]
SCFG_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SCFG_BASE	/;"	d
SCFG_CLUSTERPMCR_WFIL2EN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_CLUSTERPMCR_WFIL2EN	/;"	d
SCFG_CORE0_SFT_RST	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define SCFG_CORE0_SFT_RST /;"	d	file:
SCFG_CORESRENCR	arch/arm/cpu/armv7/ls102xa/psci.S	/^#define SCFG_CORESRENCR /;"	d	file:
SCFG_DPSLPCR_WDRR_EN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_DPSLPCR_WDRR_EN	/;"	d
SCFG_ENDIANCR_LE	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_ENDIANCR_LE	/;"	d
SCFG_ETSECCMCR_GE0_CLK125	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_ETSECCMCR_GE0_CLK125	/;"	d
SCFG_ETSECCMCR_GE1_CLK125	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_ETSECCMCR_GE1_CLK125	/;"	d
SCFG_ETSECCMCR_GE2_CLK125	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_ETSECCMCR_GE2_CLK125	/;"	d
SCFG_ETSECDMAMCR_LE_BD_FR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_ETSECDMAMCR_LE_BD_FR	/;"	d
SCFG_PIXCLKCR_PXCKEN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PIXCLKCR_PXCKEN	/;"	d
SCFG_PMCINTECR_ETSECERRG0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_ETSECERRG0	/;"	d
SCFG_PMCINTECR_ETSECERRG1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_ETSECERRG1	/;"	d
SCFG_PMCINTECR_ETSECRXG0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_ETSECRXG0	/;"	d
SCFG_PMCINTECR_ETSECRXG1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_ETSECRXG1	/;"	d
SCFG_PMCINTECR_FTM	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_FTM	/;"	d
SCFG_PMCINTECR_GPIO	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_GPIO	/;"	d
SCFG_PMCINTECR_IRQ0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_IRQ0	/;"	d
SCFG_PMCINTECR_IRQ1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_IRQ1	/;"	d
SCFG_PMCINTECR_LPUART	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_PMCINTECR_LPUART	/;"	d
SCFG_QSPICLKCTLR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SCFG_QSPICLKCTLR	/;"	d
SCFG_QSPICLKCTRL_DIV_20	board/freescale/ls2080aqds/ls2080aqds.c	/^#define SCFG_QSPICLKCTRL_DIV_20	/;"	d	file:
SCFG_QSPI_CLKSEL	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_QSPI_CLKSEL	/;"	d
SCFG_QSPI_CLKSEL	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_QSPI_CLKSEL	/;"	d
SCFG_SNPCNFGCR_DBG_RD_WR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_SNPCNFGCR_DBG_RD_WR	/;"	d
SCFG_SNPCNFGCR_DCU_RD_WR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_SNPCNFGCR_DCU_RD_WR	/;"	d
SCFG_SNPCNFGCR_EDMA_SNP	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_SNPCNFGCR_EDMA_SNP	/;"	d
SCFG_SNPCNFGCR_SATARDSNP	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_SNPCNFGCR_SATARDSNP	/;"	d
SCFG_SNPCNFGCR_SATAWRSNP	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_SNPCNFGCR_SATAWRSNP	/;"	d
SCFG_SNPCNFGCR_SATA_RD_WR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_SNPCNFGCR_SATA_RD_WR	/;"	d
SCFG_SNPCNFGCR_SECRDSNP	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_SNPCNFGCR_SECRDSNP	/;"	d
SCFG_SNPCNFGCR_SECWRSNP	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_SNPCNFGCR_SECWRSNP	/;"	d
SCFG_SNPCNFGCR_SEC_RD_WR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_SNPCNFGCR_SEC_RD_WR	/;"	d
SCFG_SNPCNFGCR_USB3_RD_WR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SCFG_SNPCNFGCR_USB3_RD_WR	/;"	d
SCFG_USB3PRM1CR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SCFG_USB3PRM1CR	/;"	d
SCFG_USB3PRM1CR_INIT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SCFG_USB3PRM1CR_INIT	/;"	d
SCFG_USBDRVVBUS_SELCR_USB1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBDRVVBUS_SELCR_USB1	/;"	d
SCFG_USBDRVVBUS_SELCR_USB2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBDRVVBUS_SELCR_USB2	/;"	d
SCFG_USBDRVVBUS_SELCR_USB3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBDRVVBUS_SELCR_USB3	/;"	d
SCFG_USBPWRFAULT_DEDICATED	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBPWRFAULT_DEDICATED	/;"	d
SCFG_USBPWRFAULT_INACTIVE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBPWRFAULT_INACTIVE	/;"	d
SCFG_USBPWRFAULT_SHARED	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBPWRFAULT_SHARED	/;"	d
SCFG_USBPWRFAULT_USB1_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBPWRFAULT_USB1_SHIFT	/;"	d
SCFG_USBPWRFAULT_USB2_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBPWRFAULT_USB2_SHIFT	/;"	d
SCFG_USBPWRFAULT_USB3_SHIFT	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCFG_USBPWRFAULT_USB3_SHIFT	/;"	d
SCFR1_DIU_DIV	include/configs/ac14xx.h	/^#define SCFR1_DIU_DIV	/;"	d
SCFR1_DIU_DIV_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_DIU_DIV_MASK	/;"	d
SCFR1_DIU_DIV_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_DIU_DIV_SHIFT	/;"	d
SCFR1_IPS_DIV	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_IPS_DIV	/;"	d
SCFR1_IPS_DIV	include/configs/ac14xx.h	/^#define SCFR1_IPS_DIV	/;"	d
SCFR1_IPS_DIV_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_IPS_DIV_MASK	/;"	d
SCFR1_IPS_DIV_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_IPS_DIV_SHIFT	/;"	d
SCFR1_LPC_DIV	include/configs/ac14xx.h	/^#define SCFR1_LPC_DIV	/;"	d
SCFR1_LPC_DIV_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_LPC_DIV_MASK	/;"	d
SCFR1_LPC_DIV_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_LPC_DIV_SHIFT	/;"	d
SCFR1_NFC_DIV	include/configs/ac14xx.h	/^#define SCFR1_NFC_DIV	/;"	d
SCFR1_NFC_DIV_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_NFC_DIV_MASK	/;"	d
SCFR1_NFC_DIV_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_NFC_DIV_SHIFT	/;"	d
SCFR1_PCI_DIV	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_PCI_DIV	/;"	d
SCFR1_PCI_DIV_MASK	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_PCI_DIV_MASK	/;"	d
SCFR1_PCI_DIV_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR1_PCI_DIV_SHIFT	/;"	d
SCFR2_SYS_DIV	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR2_SYS_DIV	/;"	d
SCFR2_SYS_DIV_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SCFR2_SYS_DIV_SHIFT	/;"	d
SCG_CG_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define SCG_CG_EN	/;"	d
SCHED_CONFIG	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_CONFIG	/;"	d	file:
SCHED_FORCE_LOW_PRI_N	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_FORCE_LOW_PRI_N /;"	d	file:
SCHED_GO2CRITICAL_HYSTERESIS	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_GO2CRITICAL_HYSTERESIS(/;"	d	file:
SCHED_LPR_NUM_ENTRIES	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_LPR_NUM_ENTRIES(/;"	d	file:
SCHED_PAGECLOSE	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_PAGECLOSE /;"	d	file:
SCHED_PREFER_WRITE	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_PREFER_WRITE /;"	d	file:
SCHED_RDWR_IDLE_GAP	arch/arm/mach-sunxi/dram_sun9i.c	/^#define SCHED_RDWR_IDLE_GAP(/;"	d	file:
SCHMT_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define SCHMT_SHIFT	/;"	d	file:
SCID	include/sym53c8xx.h	/^#define SCID	/;"	d
SCIF0	drivers/serial/serial_sh.h	/^# define SCIF0	/;"	d
SCIF0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7203.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7269.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7706.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7710.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7720.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7722.h	/^#define SCIF0_BASE /;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define SCIF0_BASE /;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define SCIF0_BASE /;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define SCIF0_BASE /;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7763.h	/^#define SCIF0_BASE	/;"	d
SCIF0_BASE	arch/sh/include/asm/cpu_sh7780.h	/^#define	SCIF0_BASE /;"	d
SCIF0_BASE	include/configs/armadillo-800eva.h	/^#define SCIF0_BASE	/;"	d
SCIF0_MSTP721	board/renesas/blanche/blanche.c	/^#define SCIF0_MSTP721	/;"	d	file:
SCIF0_MSTP721	board/renesas/gose/gose.c	/^#define SCIF0_MSTP721	/;"	d	file:
SCIF0_MSTP721	board/renesas/koelsch/koelsch.c	/^#define SCIF0_MSTP721	/;"	d	file:
SCIF0_MSTP721	board/renesas/lager/lager.c	/^#define SCIF0_MSTP721	/;"	d	file:
SCIF0_MSTP721	board/renesas/porter/porter.c	/^#define SCIF0_MSTP721	/;"	d	file:
SCIF0_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_ER_MARK, VI0_HSYNC_N_MARK, SCIF0_RXD_B_MARK, I2C0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SCL_MARK, SCIF0_RXD_C_MARK, PWM5_MARK, TCLK1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_RXD_D_MARK, I2C0_SCL_E_MARK, AVB_MAGIC_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IERX_C_MARK, AVB_COL_MARK, VI0_VSYNC_N_MARK, SCIF0_TXD_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_TXD_C_MARK, TPUTO0_MARK, CAN_CLK_MARK, DVC_MUTE_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HRTS_N_MARK, VI0_R7_MARK, SCIF0_TXD_D_MARK, I2C0_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_RX_MARK, MMC_D7_MARK, SCIF0_TXD_MARK, I2C2_SDA_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7269.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7710.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define SCIF1_BASE /;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define SCIF1_BASE /;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define SCIF1_BASE /;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7750.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7763.h	/^#define SCIF1_BASE	/;"	d
SCIF1_BASE	arch/sh/include/asm/cpu_sh7785.h	/^#define	SCIF1_BASE	/;"	d
SCIF1_BASE	include/configs/armadillo-800eva.h	/^#define SCIF1_BASE	/;"	d
SCIF2	drivers/serial/serial_sh.h	/^# define SCIF2	/;"	d
SCIF2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7269.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define SCIF2_BASE /;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define SCIF2_BASE /;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define SCIF2_BASE /;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	arch/sh/include/asm/cpu_sh7763.h	/^#define SCIF2_BASE	/;"	d
SCIF2_BASE	include/configs/armadillo-800eva.h	/^#define SCIF2_BASE	/;"	d
SCIF2_MSTP310	board/renesas/salvator-x/salvator-x.c	/^#define SCIF2_MSTP310	/;"	d	file:
SCIF2_MSTP719	board/renesas/alt/alt.c	/^#define SCIF2_MSTP719	/;"	d	file:
SCIF2_MSTP719	board/renesas/silk/silk.c	/^#define SCIF2_MSTP719	/;"	d	file:
SCIF2_RFDC_MASK	drivers/serial/serial_sh.h	/^# define SCIF2_RFDC_MASK /;"	d
SCIF2_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SCK5_B_MARK, ETH_TXD1_MARK, VI0_G7_MARK, SCIF2_RXD_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF2_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_REFCLK_MARK, VI0_G6_MARK, SCIF2_SCK_C_MARK, AVB_TXD5_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF2_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_R0_MARK, SCIF2_TXD_C_MARK, IIC1_SDA_D_MARK, AVB_TXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF2_TXROOM_MAX	drivers/serial/serial_sh.h	/^# define SCIF2_TXROOM_MAX /;"	d
SCIF3_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIF3_BASE	/;"	d
SCIF3_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SCIF3_BASE	/;"	d
SCIF3_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF3_BASE	/;"	d
SCIF3_BASE	arch/sh/include/asm/cpu_sh7264.h	/^#define SCIF3_BASE	/;"	d
SCIF3_BASE	arch/sh/include/asm/cpu_sh7269.h	/^#define SCIF3_BASE	/;"	d
SCIF3_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define SCIF3_BASE /;"	d
SCIF3_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define SCIF3_BASE /;"	d
SCIF3_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define SCIF3_BASE /;"	d
SCIF3_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF3_RXD_B_MARK, I2C4_SCL_E_MARK, AVB_GTX_CLK_MARK, SSI_WS6_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF3_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SDATA5_B_MARK, ETH_MAGIC_MARK, VI0_R1_MARK, SCIF3_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF3_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_MDC_MARK, VI0_R3_MARK, SCIF3_TXD_B_MARK, I2C4_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF4_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIF4_BASE	/;"	d
SCIF4_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SCIF4_BASE	/;"	d
SCIF4_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF4_BASE	/;"	d
SCIF4_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define SCIF4_BASE /;"	d
SCIF4_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define SCIF4_BASE /;"	d
SCIF4_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define SCIF4_BASE /;"	d
SCIF4_BASE	include/configs/armadillo-800eva.h	/^#define SCIF4_BASE	/;"	d
SCIF4_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF4_RXD_B_MARK, I2C0_SCL_D_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF4_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_RXD1_MARK, VI0_G4_MARK, MSIOF2_SS1_B_MARK, SCIF4_RXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF4_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_D_MARK, I2C1_SCL_MARK, SCIF4_RXD_MARK, PWM5_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF4_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF2_SS2_B_MARK, SCIF4_TXD_D_MARK, AVB_TXD4_MARK, ADICHS2_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF4_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF5_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define SCIF5_BASE	/;"	d
SCIF5_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIF5_BASE	/;"	d
SCIF5_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SCIF5_BASE	/;"	d
SCIF5_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF5_BASE	/;"	d
SCIF5_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define SCIF5_BASE /;"	d
SCIF5_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define SCIF5_BASE /;"	d
SCIF5_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define SCIF5_BASE /;"	d
SCIF5_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF5_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MSIOF1_RXD_B_MARK, SCIF5_RXD_D_MARK, ADIDATA_B_MARK, AD_DI_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF5_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	TS_SCK_D_MARK, BPFCLK_C_MARK, MSIOF0_RXD_MARK, SCIF5_RXD_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF5_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF5_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PCMWE_N_MARK, SSI_WS0129_MARK, MSIOF1_TXD_B_MARK, SCIF5_TXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF6_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define SCIF6_BASE	/;"	d
SCIF6_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF6_BASE	/;"	d
SCIF7_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SCIF7_BASE	/;"	d
SCIF7_BASE	arch/sh/include/asm/cpu_sh7269.h	/^#define SCIF7_BASE	/;"	d
SCIFA0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIFA0_BASE	/;"	d
SCIFA0_CTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA0_SCK_MARK,	SCIFA0_CTS_MARK,	SCIFA0_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA0_CTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA0_CTS__MARK, FSICOSLDT1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA0_MSTP204	board/renesas/stout/stout.c	/^#define SCIFA0_MSTP204	/;"	d	file:
SCIFA0_RTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA0_SCK_MARK,	SCIFA0_CTS_MARK,	SCIFA0_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA0_RTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA0_RTS__MARK, FSICOSLDT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA0_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA0_RXD_MARK,	SCIFA0_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA0_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA0_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA0_SCK_MARK,	SCIFA0_CTS_MARK,	SCIFA0_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO5_MARK, SCIFA0_SCK_MARK, FSICOSLDT3_MARK, PORT16_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA0_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA0_RXD_MARK,	SCIFA0_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA0_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA0_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIFA1_BASE	/;"	d
SCIFA1_CTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA1_CTS_MARK,	SCIFA1_SCK_MARK,	SCIFA1_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA1_CTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_CTS_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_CTS_N_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_CTS__MARK, MFG1_IN1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA1_RTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA1_TXD_MARK,	SCIFA1_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA1_RTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RTS_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RTS_N_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_RTS__MARK, IDIN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS6_MARK, SCIFA1_RXD_B_MARK, I2C4_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA1_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA1_CTS_MARK,	SCIFA1_SCK_MARK,	SCIFA1_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA1_SCK_B_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, CAN_DEBUGOUT13_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA1_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_SCK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA1_CTS_MARK,	SCIFA1_SCK_MARK,	SCIFA1_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA1_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_SCK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	EXTLP_MARK, SCIFA1_SCK_MARK, PORT226_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA1_TXD_B_MARK, I2C4_SDA_C_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA1_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA1_TXD_MARK,	SCIFA1_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA1_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA1_TXD_MARK, OVCN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SCIFA2_BASE	/;"	d
SCIFA2_CTS1__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_CTS1__MARK, PORT157_MSIOF2_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_CTS2__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_TSYNC_MARK, SCIFA2_CTS2__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_CTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA2_CTS_MARK,	SCIFA2_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA2_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_RTS1__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_RTS1__MARK, PORT156_MSIOF2_SS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_RTS2__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSCK_MARK, SCIFA2_RTS2__MARK, VIO2_CLK2_MARK, LCD2D20_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_RTS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA2_CTS_MARK,	SCIFA2_RTS_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA2_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_RXD1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_RXD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DISP_MARK, SSI_WS78_MARK, SCIFA2_RXD_B_MARK, IIC0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA2_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA2_RXD_MARK,	SCIFA2_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA2_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIFA2_RXD_MARK, FMIN_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA2_SCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	DINT__MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_SCK2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT15_MARK, SSI_SCK78_MARK, SCIFA2_SCK_B_MARK, IIC0_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA2_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_SCK_PORT199_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA2_SCK_PORT199_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA2_SCK_PORT22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA2_SCK_PORT22_MARK, \/* SCIFA2_SCK Port 22\/199 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA2_TXD1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_TXD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA2_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_CDE_MARK, SSI_SDATA7_MARK, SCIFA2_TXD_B_MARK, IRQ8_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA2_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA2_RXD_MARK,	SCIFA2_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA2_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFA2_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA3_CTS_PORT117_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_CTS_PORT117_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_CTS_PORT162_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_CTS_PORT162_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA3_CTS__MARK, MFG3_IN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA3_RTS_PORT105_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_RTS_PORT105_MARK, \/* MSEL5CR_8_0 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA3_RTS_PORT161_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_RTS_PORT161_MARK, \/* MSEL5CR_8_1 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA3_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	BBIF1_SS2_MARK, SCIFA3_RTS__MARK, MFG3_OUT1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA3_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFA3_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA3_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA3_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_G6_B_MARK, SCIFA3_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA3_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS5_MARK, SCIFA3_RXD_MARK, I2C3_SCL_C_MARK, DU1_DOTCLKOUT0_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA3_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA3_RXD_MARK, MFG3_IN1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA3_RXD_PORT159_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_RXD_PORT159_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_RXD_PORT174_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_RXD_PORT174_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA3_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_G7_B_MARK, SCIFA3_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA3_SCK_PORT116_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_SCK_PORT116_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_SCK_PORT158_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_SCK_PORT158_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFA3_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA3_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA3_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	PWM5_B_MARK, SCIFA3_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA3_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT11_MARK, SSI_SDATA5_MARK, SCIFA3_TXD_MARK, I2C3_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA3_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA3_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA3_TXD_PORT160_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_TXD_PORT160_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA3_TXD_PORT175_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA3_TXD_PORT175_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA4_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA4_CTS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA4_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA4_RTS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA4_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	RX4_B_MARK, SCIFA4_RXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFA4_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	RX4_B_MARK, SCIFA4_RXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA4_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA4_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA4_RXD_MARK, XWUP_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA4_RXD_PORT12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_RXD_PORT12_MARK, \/* MSEL5CR[12:11] = 00 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA4_RXD_PORT204_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_RXD_PORT204_MARK, \/* MSEL5CR[12:11] = 01 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA4_RXD_PORT94_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_RXD_PORT94_MARK, \/* MSEL5CR[12:11] = 10 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA4_SCK_PORT205_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_SCK_PORT205_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA4_SCK_PORT21_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_SCK_PORT21_MARK, \/* SCIFA4_SCK Port 21\/205 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA4_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	TX4_B_MARK, SCIFA4_TXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFA4_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	TX4_B_MARK, SCIFA4_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA4_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA4_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA4_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA4_TXD_PORT13_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_TXD_PORT13_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA4_TXD_PORT203_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_TXD_PORT203_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA4_TXD_PORT93_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA4_TXD_PORT93_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA5_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIFA5_RXD_B_MARK, RX3_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA5_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA5_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C3_SCL_MARK, SCIFA5_RXD_C_MARK, IETX_C_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA5_RXD_PORT10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_RXD_PORT10_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA5_RXD_PORT207_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_RXD_PORT207_MARK, \/* MSEL5CR[15:14] = 01 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA5_RXD_PORT92_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_RXD_PORT92_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA5_SCK_PORT206_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_SCK_PORT206_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA5_SCK_PORT23_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_SCK_PORT23_MARK, \/* SCIFA5_SCK Port 23\/206 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA5_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIFA5_TXD_B_MARK, TX3_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA5_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFA5_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_FIELD_MARK, I2C3_SDA_MARK, SCIFA5_TXD_C_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFA5_TXD_PORT208_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_TXD_PORT208_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA5_TXD_PORT20_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_TXD_PORT20_MARK, \/* MSEL5CR[15:14] = 00 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA5_TXD_PORT91_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA5_TXD_PORT91_MARK, \/* MSEL5CR[15:14] = 10 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFA6_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA6_SCK_MARK,	SCIFA6_RXD_MARK,	SCIFA6_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA6_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA6_SCK_MARK,	SCIFA6_RXD_MARK,	SCIFA6_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA6_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA6_SCK_MARK,	SCIFA6_RXD_MARK,	SCIFA6_TXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA6_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA6_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA7_CTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA7_CTS__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA7_RTS__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA7_RTS__MARK, PORT19_VIO_CKO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA7_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA7_TXD_MARK,	SCIFA7_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA7_RXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA7_RXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFA7_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFA7_TXD_MARK,	SCIFA7_RXD_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFA7_TXD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA7_TXD_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SCIFB0_CTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB0_RTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB0_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SDA4_B_MARK, _MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFB0_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA4_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB0_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB0_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB0_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_CTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_RTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ0_MARK, SCIFB1_RXD_D_MARK, INTC_IRQ0_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_RXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_G_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DREQ0_N_MARK, SCIFB1_RXD_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIFB1_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ1_MARK, SCIFB1_SCK_C_MARK, INTC_IRQ1_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_SCK_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_SCK_G_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ2_MARK, SCIFB1_TXD_D_MARK, INTC_IRQ2_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB1_TXD_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_F_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_G_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB1_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB2_CTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_CTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_RTS_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_RTS_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_RXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_RXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFB2_RXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB2_RXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_SCK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_SCK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB2_SCK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_TXD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_TXD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB2_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
SCIFB2_TXD_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIFB2_TXD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIFB_CTS_PORT173_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_CTS_PORT173_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_CTS_PORT187_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_CTS_PORT187_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_RTS_PORT172_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_RTS_PORT172_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_RTS_PORT186_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_RTS_PORT186_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_RXD_PORT191_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_RXD_PORT191_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_RXD_PORT3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_RXD_PORT3_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_SCK_PORT190_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_SCK_PORT190_MARK, \/* MSEL5CR_17_0 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFB_SCK_PORT2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_SCK_PORT2_MARK, \/* MSEL5CR_17_1 *\/$/;"	e	enum:__anona304c1340103	file:
SCIFB_TXD_PORT192_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_TXD_PORT192_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIFB_TXD_PORT4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SCIFB_TXD_PORT4_MARK,$/;"	e	enum:__anona304c1340103	file:
SCIF_ADDR_SH5	drivers/serial/serial_sh.h	/^# define SCIF_ADDR_SH5 /;"	d
SCIF_BASE	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCIF_BASE /;"	d	file:
SCIF_BASE	drivers/serial/serial_sh.c	/^# define SCIF_BASE	/;"	d	file:
SCIF_BASE_ADDR	drivers/serial/serial_sh.h	/^# define SCIF_BASE_ADDR /;"	d
SCIF_BASE_PORT	drivers/serial/serial_sh.c	/^	#define SCIF_BASE_PORT	/;"	d	file:
SCIF_BASE_PORT	drivers/serial/serial_sh.c	/^	#define SCIF_BASE_PORT /;"	d	file:
SCIF_BRK	drivers/serial/serial_sh.h	/^#define SCIF_BRK /;"	d
SCIF_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCIF_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SCIF_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIF_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HSCK_MARK, SCIF_CLK_B_MARK, AVB_CRS_MARK, AUDIO_CLKC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SCIF_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCIF_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SCIF_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCIF_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona307879b0103	file:
SCIF_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIF_CLK_MARK, BPFCLK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCIF_DR	drivers/serial/serial_sh.h	/^#define SCIF_DR /;"	d
SCIF_ER	drivers/serial/serial_sh.h	/^#define SCIF_ER /;"	d
SCIF_ERRORS	drivers/serial/serial_sh.h	/^# define SCIF_ERRORS /;"	d
SCIF_FER	drivers/serial/serial_sh.h	/^#define SCIF_FER /;"	d
SCIF_FNS	drivers/serial/serial_sh.h	/^		#define SCIF_FNS(/;"	d
SCIF_FNS	drivers/serial/serial_sh.h	/^#define SCIF_FNS(/;"	d
SCIF_LSR2_OFFS	drivers/serial/serial_sh.h	/^# define SCIF_LSR2_OFFS /;"	d
SCIF_ONLY	drivers/serial/serial_sh.h	/^# define SCIF_ONLY$/;"	d
SCIF_ORER	drivers/serial/serial_sh.h	/^#  define SCIF_ORER	/;"	d
SCIF_ORER	drivers/serial/serial_sh.h	/^# define SCIF_ORER	/;"	d
SCIF_ORER	drivers/serial/serial_sh.h	/^# define SCIF_ORER /;"	d
SCIF_ORER	drivers/serial/serial_sh.h	/^#define SCIF_ORER	/;"	d
SCIF_PER	drivers/serial/serial_sh.h	/^#define SCIF_PER /;"	d
SCIF_PTR2_OFFS	drivers/serial/serial_sh.h	/^# define SCIF_PTR2_OFFS /;"	d
SCIF_RDF	drivers/serial/serial_sh.h	/^#define SCIF_RDF /;"	d
SCIF_RFDC_MASK	drivers/serial/serial_sh.h	/^#  define SCIF_RFDC_MASK	/;"	d
SCIF_RFDC_MASK	drivers/serial/serial_sh.h	/^# define SCIF_RFDC_MASK /;"	d
SCIF_TDFE	drivers/serial/serial_sh.h	/^#define SCIF_TDFE /;"	d
SCIF_TEND	drivers/serial/serial_sh.h	/^#define SCIF_TEND /;"	d
SCIF_TXROOM_MAX	drivers/serial/serial_sh.h	/^# define SCIF_TXROOM_MAX /;"	d
SCI_CTRL_FLAGS_RE	drivers/serial/serial_sh.h	/^#define SCI_CTRL_FLAGS_RE /;"	d
SCI_CTRL_FLAGS_REIE	drivers/serial/serial_sh.h	/^#define SCI_CTRL_FLAGS_REIE /;"	d
SCI_CTRL_FLAGS_RIE	drivers/serial/serial_sh.h	/^#define SCI_CTRL_FLAGS_RIE /;"	d
SCI_CTRL_FLAGS_TE	drivers/serial/serial_sh.h	/^#define SCI_CTRL_FLAGS_TE /;"	d
SCI_CTRL_FLAGS_TIE	drivers/serial/serial_sh.h	/^#define SCI_CTRL_FLAGS_TIE /;"	d
SCI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  SCI_EN	/;"	d
SCI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SCI_EN	/;"	d
SCI_ERRORS	drivers/serial/serial_sh.h	/^#define SCI_ERRORS /;"	d
SCI_EVENT_WRITE_WAKEUP	drivers/serial/serial_sh.h	/^#define SCI_EVENT_WRITE_WAKEUP	/;"	d
SCI_FER	drivers/serial/serial_sh.h	/^#define SCI_FER /;"	d
SCI_IN	drivers/serial/serial_sh.h	/^#define SCI_IN(/;"	d
SCI_MAGIC	drivers/serial/serial_sh.h	/^#define SCI_MAGIC /;"	d
SCI_MAJOR	drivers/serial/serial_sh.h	/^#define SCI_MAJOR	/;"	d
SCI_MINOR_START	drivers/serial/serial_sh.h	/^#define SCI_MINOR_START	/;"	d
SCI_M_10	include/mpc5xx.h	/^#define SCI_M_10	/;"	d
SCI_M_11	include/mpc5xx.h	/^#define SCI_M_11	/;"	d
SCI_ORER	drivers/serial/serial_sh.h	/^#define SCI_ORER /;"	d
SCI_OUT	drivers/serial/serial_sh.h	/^#define SCI_OUT(/;"	d
SCI_PE	include/mpc5xx.h	/^#define SCI_PE	/;"	d
SCI_PER	drivers/serial/serial_sh.h	/^#define SCI_PER /;"	d
SCI_PORT_1	include/mpc5xx.h	/^#define SCI_PORT_1	/;"	d
SCI_PORT_2	include/mpc5xx.h	/^#define SCI_PORT_2	/;"	d
SCI_RDRF	drivers/serial/serial_sh.h	/^#define SCI_RDRF /;"	d
SCI_RDRF	include/mpc5xx.h	/^#define SCI_RDRF	/;"	d
SCI_RE	include/mpc5xx.h	/^#define SCI_RE	/;"	d
SCI_RX_THROTTLE	drivers/serial/serial_sh.h	/^#define SCI_RX_THROTTLE	/;"	d
SCI_SCXBR_MK	include/mpc5xx.h	/^#define SCI_SCXBR_MK	/;"	d
SCI_SCXDR_MK	include/mpc5xx.h	/^#define SCI_SCXDR_MK	/;"	d
SCI_TDRE	drivers/serial/serial_sh.h	/^#define SCI_TDRE /;"	d
SCI_TDRE	include/mpc5xx.h	/^#define SCI_TDRE	/;"	d
SCI_TDRE_CLEAR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCI_TDRE_CLEAR	/;"	d	file:
SCI_TD_E	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCI_TD_E	/;"	d	file:
SCI_TE	include/mpc5xx.h	/^#define SCI_TE	/;"	d
SCI_TEND	drivers/serial/serial_sh.h	/^#define SCI_TEND /;"	d
SCIx_FNS	drivers/serial/serial_sh.h	/^		#define SCIx_FNS(/;"	d
SCIx_FNS	drivers/serial/serial_sh.h	/^#define SCIx_FNS(/;"	d
SCK0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK0_GMARK,$/;"	e	enum:__anona307945e0103	file:
SCK0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK0_IMARK,$/;"	e	enum:__anona307945e0103	file:
SCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
SCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,$/;"	e	enum:__anona307879b0103	file:
SCK1E	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SCK1E	/;"	d
SCK1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SCK1_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
SCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,$/;"	e	enum:__anona307879b0103	file:
SCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK1_MARK,$/;"	e	enum:__anona307945e0103	file:
SCK2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK2_GMARK,$/;"	e	enum:__anona307945e0103	file:
SCK2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK2_IMARK,$/;"	e	enum:__anona307945e0103	file:
SCK2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,$/;"	e	enum:__anona307879b0103	file:
SCK3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,$/;"	e	enum:__anona307879b0103	file:
SCK3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK3_MARK,$/;"	e	enum:__anona307945e0103	file:
SCK4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SCK4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SCK4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK4_C_MARK,$/;"	e	enum:__anona307945e0103	file:
SCK5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCK5_MARK,$/;"	e	enum:__anona307945e0103	file:
SCKE	drivers/usb/host/r8a66597.h	/^#define	SCKE	/;"	d
SCKZ_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCKZ_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SCKZ_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCKZ_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SCKZ_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,$/;"	e	enum:__anona3077f190103	file:
SCK_MPP10	arch/arm/include/asm/arch-mvebu/spi.h	/^#define SCK_MPP10	/;"	d
SCL1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL1_CIS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL1_CIS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL1_CIS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL1_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL2_CIS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_CIS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_CIS_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_CIS_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_CIS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,$/;"	e	enum:__anona307835a0103	file:
SCL2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SCL2_D_MARK, MSIOF1_RXD_E_MARK,$/;"	e	enum:__anona307835a0103	file:
SCL2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCL2_D_MARK, MSIOF1_RXD_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL2_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,$/;"	e	enum:__anona3077f190103	file:
SCL3_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona307835a0103	file:
SCL3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona307835a0103	file:
SCL4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL6_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL6_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL6_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL6_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SCL6_C_MARK,$/;"	e	enum:__anona307945e0103	file:
SCL7_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_HSYNC_N_C_MARK, SCL7_C_MARK, VI1_G4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona307835a0103	file:
SCL7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCL8_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SCLK	board/renesas/stout/cpld.c	/^#define SCLK	/;"	d	file:
SCLK	drivers/rtc/ds1302.c	/^#define SCLK	/;"	d	file:
SCLK	include/sym53c8xx.h	/^	#define   SCLK /;"	d
SCLKACR	arch/sh/include/asm/cpu_sh7722.h	/^#define SCLKACR /;"	d
SCLKACR	arch/sh/include/asm/cpu_sh7723.h	/^#define SCLKACR /;"	d
SCLKACR	arch/sh/include/asm/cpu_sh7724.h	/^#define SCLKACR /;"	d
SCLKBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SCLKBCR /;"	d
SCLKBCR	arch/sh/include/asm/cpu_sh7723.h	/^#define SCLKBCR /;"	d
SCLKBCR	arch/sh/include/asm/cpu_sh7724.h	/^#define SCLKBCR /;"	d
SCLK_32K_SUSPEND_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_32K_SUSPEND_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_32K_SUSPEND_PMU	/;"	d
SCLK_AUD_PLL	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_AUD_PLL	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_AUD_PLL	/;"	d
SCLK_BUS0_PLL_A	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_A	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_A	/;"	d
SCLK_BUS0_PLL_B	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS0_PLL_B	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS0_PLL_B	/;"	d
SCLK_BUS1_PLL_A	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_A	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_A	/;"	d
SCLK_BUS1_PLL_B	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_BUS1_PLL_B	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_BUS1_PLL_B	/;"	d
SCLK_CCI_TRACE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CCI_TRACE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CCI_TRACE	/;"	d
SCLK_CC_PLL_A	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_A	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_A	/;"	d
SCLK_CC_PLL_B	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CC_PLL_B	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CC_PLL_B	/;"	d
SCLK_CHIPID	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CHIPID	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_CHIPID	/;"	d
SCLK_CIF_OUT	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CIF_OUT	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CIF_OUT	/;"	d
SCLK_CM0S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S	/;"	d
SCLK_CM0S_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CM0S_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CM0S_PMU	/;"	d
SCLK_CNTL	include/radeon.h	/^#define SCLK_CNTL	/;"	d
SCLK_CNTL2__R300_CBA_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL2__R300_CBA_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL2__R300_FORCE_CBA	include/radeon.h	/^#define SCLK_CNTL2__R300_FORCE_CBA	/;"	d
SCLK_CNTL2__R300_FORCE_GA	include/radeon.h	/^#define SCLK_CNTL2__R300_FORCE_GA	/;"	d
SCLK_CNTL2__R300_FORCE_TCL	include/radeon.h	/^#define SCLK_CNTL2__R300_FORCE_TCL	/;"	d
SCLK_CNTL2__R300_GA_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL2__R300_GA_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL2__R300_TCL_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL2__R300_TCL_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__CP_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__CP_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__DYN_STOP_LAT_MASK	include/radeon.h	/^#define SCLK_CNTL__DYN_STOP_LAT_MASK	/;"	d
SCLK_CNTL__E2_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__E2_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__FORCEON_MASK	include/radeon.h	/^#define SCLK_CNTL__FORCEON_MASK	/;"	d
SCLK_CNTL__FORCE_CP	include/radeon.h	/^#define SCLK_CNTL__FORCE_CP	/;"	d
SCLK_CNTL__FORCE_DISP1	include/radeon.h	/^#define SCLK_CNTL__FORCE_DISP1	/;"	d
SCLK_CNTL__FORCE_DISP2	include/radeon.h	/^#define SCLK_CNTL__FORCE_DISP2	/;"	d
SCLK_CNTL__FORCE_E2	include/radeon.h	/^#define SCLK_CNTL__FORCE_E2	/;"	d
SCLK_CNTL__FORCE_HDP	include/radeon.h	/^#define SCLK_CNTL__FORCE_HDP	/;"	d
SCLK_CNTL__FORCE_IDCT	include/radeon.h	/^#define SCLK_CNTL__FORCE_IDCT	/;"	d
SCLK_CNTL__FORCE_OV0	include/radeon.h	/^#define SCLK_CNTL__FORCE_OV0	/;"	d
SCLK_CNTL__FORCE_PB	include/radeon.h	/^#define SCLK_CNTL__FORCE_PB	/;"	d
SCLK_CNTL__FORCE_RB	include/radeon.h	/^#define SCLK_CNTL__FORCE_RB	/;"	d
SCLK_CNTL__FORCE_RE	include/radeon.h	/^#define SCLK_CNTL__FORCE_RE	/;"	d
SCLK_CNTL__FORCE_SE	include/radeon.h	/^#define SCLK_CNTL__FORCE_SE	/;"	d
SCLK_CNTL__FORCE_SUBPIC	include/radeon.h	/^#define SCLK_CNTL__FORCE_SUBPIC	/;"	d
SCLK_CNTL__FORCE_TAM	include/radeon.h	/^#define SCLK_CNTL__FORCE_TAM	/;"	d
SCLK_CNTL__FORCE_TDM	include/radeon.h	/^#define SCLK_CNTL__FORCE_TDM	/;"	d
SCLK_CNTL__FORCE_TOP	include/radeon.h	/^#define SCLK_CNTL__FORCE_TOP	/;"	d
SCLK_CNTL__FORCE_TV_SCLK	include/radeon.h	/^#define SCLK_CNTL__FORCE_TV_SCLK	/;"	d
SCLK_CNTL__FORCE_VIP	include/radeon.h	/^#define SCLK_CNTL__FORCE_VIP	/;"	d
SCLK_CNTL__HDP_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__HDP_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__IDCT_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__IDCT_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__PB_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__PB_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__R300_FORCE_PX	include/radeon.h	/^#define SCLK_CNTL__R300_FORCE_PX	/;"	d
SCLK_CNTL__R300_FORCE_SR	include/radeon.h	/^#define SCLK_CNTL__R300_FORCE_SR	/;"	d
SCLK_CNTL__R300_FORCE_SU	include/radeon.h	/^#define SCLK_CNTL__R300_FORCE_SU	/;"	d
SCLK_CNTL__R300_FORCE_TX	include/radeon.h	/^#define SCLK_CNTL__R300_FORCE_TX	/;"	d
SCLK_CNTL__R300_FORCE_US	include/radeon.h	/^#define SCLK_CNTL__R300_FORCE_US	/;"	d
SCLK_CNTL__R300_FORCE_VAP	include/radeon.h	/^#define SCLK_CNTL__R300_FORCE_VAP	/;"	d
SCLK_CNTL__RB_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__RB_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__RE_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__RE_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__SCLK_SRC_SEL_MASK	include/radeon.h	/^#define SCLK_CNTL__SCLK_SRC_SEL_MASK	/;"	d
SCLK_CNTL__SE_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__SE_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__TAM_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__TAM_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__TDM_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__TDM_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__TV_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__TV_MAX_DYN_STOP_LAT	/;"	d
SCLK_CNTL__VIP_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_CNTL__VIP_MAX_DYN_STOP_LAT	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COMBO_PHY_EMBEDDED_26M	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_COMBO_PHY_EMBEDDED_26M	/;"	d
SCLK_COP_FIQ_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_COP_FIQ_MASK /;"	d
SCLK_COP_IRQ_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_COP_IRQ_MASK /;"	d
SCLK_CPU_FIQ_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_CPU_FIQ_MASK /;"	d
SCLK_CPU_IRQ_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_CPU_IRQ_MASK /;"	d
SCLK_CRYPTO0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO0	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO0	/;"	d
SCLK_CRYPTO1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CRYPTO1	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CRYPTO1	/;"	d
SCLK_CS	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_CS	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_CS	/;"	d
SCLK_DBG_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_NOC	/;"	d
SCLK_DBG_PD_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_B	/;"	d
SCLK_DBG_PD_CORE_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DBG_PD_CORE_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DBG_PD_CORE_L	/;"	d
SCLK_DFIMON0_TIMER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON0_TIMER	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON0_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DFIMON1_TIMER	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DFIMON1_TIMER	/;"	d
SCLK_DIV_ISP_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SCLK_DIV_ISP_VAL	/;"	d
SCLK_DPHY_PLL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_PLL	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_PLL	/;"	d
SCLK_DPHY_RX0_CFG	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_RX0_CFG	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_RX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX0_CFG	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX0_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DPHY_TX1RX1_CFG	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DPHY_TX1RX1_CFG	/;"	d
SCLK_DP_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_DP_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_DP_CORE	/;"	d
SCLK_EDP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP	/;"	d
SCLK_EDP_24M	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EDP_24M	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EDP_24M	/;"	d
SCLK_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_EMMC	/;"	d
SCLK_EMMC_DRV	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_DRV	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_DRV	/;"	d
SCLK_EMMC_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_EMMC_SAMPLE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_EMMC_SAMPLE	/;"	d
SCLK_FORCEON_MASK	include/radeon.h	/^#define SCLK_FORCEON_MASK	/;"	d
SCLK_GPU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_GPU	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_GPU	/;"	d
SCLK_HDMI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HDMI	/;"	d
SCLK_HDMI_CEC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_CEC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_CEC	/;"	d
SCLK_HDMI_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_HDCP	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HDMI_HDCP	/;"	d
SCLK_HDMI_SFR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HDMI_SFR	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HDMI_SFR	/;"	d
SCLK_HEVC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_HEVC	/;"	d
SCLK_HEVC_CABAC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CABAC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CABAC	/;"	d
SCLK_HEVC_CORE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HEVC_CORE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HEVC_CORE	/;"	d
SCLK_HSADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSADC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSADC	/;"	d
SCLK_HSICPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_HSICPHY	/;"	d
SCLK_HSICPHY12M	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY12M	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY12M	/;"	d
SCLK_HSICPHY480M	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_HSICPHY480M	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_HSICPHY480M	/;"	d
SCLK_I2C0_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C0_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C0_PMU	/;"	d
SCLK_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C1	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C1	/;"	d
SCLK_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C2	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C2	/;"	d
SCLK_I2C3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C3	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C3	/;"	d
SCLK_I2C4_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C4_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C4_PMU	/;"	d
SCLK_I2C5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C5	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C5	/;"	d
SCLK_I2C6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C6	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C6	/;"	d
SCLK_I2C7	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C7	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C7	/;"	d
SCLK_I2C8_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2C8_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2C8_PMU	/;"	d
SCLK_I2S	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S	/;"	d
SCLK_I2S0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0	/;"	d
SCLK_I2S0_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S0_8CH	/;"	d
SCLK_I2S0_OUT	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S0_OUT	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_I2S0_OUT	/;"	d
SCLK_I2S1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_I2S1	/;"	d
SCLK_I2S1_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S1_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S1_8CH	/;"	d
SCLK_I2S2_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S2_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S2_8CH	/;"	d
SCLK_I2S_8CH_OUT	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_8CH_OUT	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_I2S_8CH_OUT	/;"	d
SCLK_I2S_OUT	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_I2S_OUT	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_I2S_OUT	/;"	d
SCLK_INTMEM0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM0	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM0	/;"	d
SCLK_INTMEM1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM1	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM1	/;"	d
SCLK_INTMEM2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM2	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM2	/;"	d
SCLK_INTMEM3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM3	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM3	/;"	d
SCLK_INTMEM4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM4	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM4	/;"	d
SCLK_INTMEM5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_INTMEM5	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_INTMEM5	/;"	d
SCLK_ISP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP	/;"	d
SCLK_ISP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP0	/;"	d
SCLK_ISP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_ISP1	/;"	d
SCLK_ISP_JPE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_ISP_JPE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_ISP_JPE	/;"	d
SCLK_LCDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_LCDC	/;"	d
SCLK_LCDC_PWM0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM0	/;"	d
SCLK_LCDC_PWM1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_LCDC_PWM1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_LCDC_PWM1	/;"	d
SCLK_M0_PERILP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP	/;"	d
SCLK_M0_PERILP_DEC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_M0_PERILP_DEC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_M0_PERILP_DEC	/;"	d
SCLK_MAC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MAC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC	/;"	d
SCLK_MACREF	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF	/;"	d
SCLK_MACREF_OUT	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MACREF_OUT	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MACREF_OUT	/;"	d
SCLK_MAC_RX	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_RX	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_RX	/;"	d
SCLK_MAC_TX	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MAC_TX	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MAC_TX	/;"	d
SCLK_MFC_PLL_A	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_A	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_A	/;"	d
SCLK_MFC_PLL_B	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MFC_PLL_B	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_MFC_PLL_B	/;"	d
SCLK_MIPIDPHY_CFG	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_CFG	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_CFG	/;"	d
SCLK_MIPIDPHY_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MIPIDPHY_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_MIPIDPHY_REF	/;"	d
SCLK_MORE_CNTL	include/radeon.h	/^#define SCLK_MORE_CNTL	/;"	d
SCLK_MORE_CNTL__AGP_BUSY_HALF_SCLK	include/radeon.h	/^#define SCLK_MORE_CNTL__AGP_BUSY_HALF_SCLK	/;"	d
SCLK_MORE_CNTL__CG_SPARE_RD_C_MASK	include/radeon.h	/^#define SCLK_MORE_CNTL__CG_SPARE_RD_C_MASK	/;"	d
SCLK_MORE_CNTL__DISPREGS_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_MORE_CNTL__DISPREGS_MAX_DYN_STOP_LAT	/;"	d
SCLK_MORE_CNTL__FORCEON	include/radeon.h	/^#define SCLK_MORE_CNTL__FORCEON	/;"	d
SCLK_MORE_CNTL__FORCE_DISPREGS	include/radeon.h	/^#define SCLK_MORE_CNTL__FORCE_DISPREGS	/;"	d
SCLK_MORE_CNTL__FORCE_MC_GUI	include/radeon.h	/^#define SCLK_MORE_CNTL__FORCE_MC_GUI	/;"	d
SCLK_MORE_CNTL__FORCE_MC_HOST	include/radeon.h	/^#define SCLK_MORE_CNTL__FORCE_MC_HOST	/;"	d
SCLK_MORE_CNTL__HALF_SPEED_SCLK	include/radeon.h	/^#define SCLK_MORE_CNTL__HALF_SPEED_SCLK	/;"	d
SCLK_MORE_CNTL__IDLE_DELAY_HALF_SCLK	include/radeon.h	/^#define SCLK_MORE_CNTL__IDLE_DELAY_HALF_SCLK	/;"	d
SCLK_MORE_CNTL__IO_CG_VOLTAGE_DROP	include/radeon.h	/^#define SCLK_MORE_CNTL__IO_CG_VOLTAGE_DROP	/;"	d
SCLK_MORE_CNTL__MC_GUI_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_MORE_CNTL__MC_GUI_MAX_DYN_STOP_LAT	/;"	d
SCLK_MORE_CNTL__MC_HOST_MAX_DYN_STOP_LAT	include/radeon.h	/^#define SCLK_MORE_CNTL__MC_HOST_MAX_DYN_STOP_LAT	/;"	d
SCLK_MORE_CNTL__STOP_SCLK_A	include/radeon.h	/^#define SCLK_MORE_CNTL__STOP_SCLK_A	/;"	d
SCLK_MORE_CNTL__STOP_SCLK_B	include/radeon.h	/^#define SCLK_MORE_CNTL__STOP_SCLK_B	/;"	d
SCLK_MORE_CNTL__STOP_SCLK_C	include/radeon.h	/^#define SCLK_MORE_CNTL__STOP_SCLK_C	/;"	d
SCLK_MORE_CNTL__STOP_SCLK_EN	include/radeon.h	/^#define SCLK_MORE_CNTL__STOP_SCLK_EN	/;"	d
SCLK_MORE_CNTL__TVFB_SOFT_RESET	include/radeon.h	/^#define SCLK_MORE_CNTL__TVFB_SOFT_RESET	/;"	d
SCLK_MORE_CNTL__VOLTAGE_DROP_SYNC	include/radeon.h	/^#define SCLK_MORE_CNTL__VOLTAGE_DROP_SYNC	/;"	d
SCLK_MORE_FORCEON	include/radeon.h	/^#define SCLK_MORE_FORCEON	/;"	d
SCLK_NANDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_NANDC	/;"	d
SCLK_NANDC0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC0	/;"	d
SCLK_NANDC1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NANDC1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_NANDC1	/;"	d
SCLK_NUM	board/bf537-stamp/post-memory.c	/^#define SCLK_NUM	/;"	d	file:
SCLK_OTGPHY0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY0	/;"	d
SCLK_OTGPHY1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY1	/;"	d
SCLK_OTGPHY2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTGPHY2	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTGPHY2	/;"	d
SCLK_OTG_ADP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_OTG_ADP	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_OTG_ADP	/;"	d
SCLK_PCIEPHY_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF	/;"	d
SCLK_PCIEPHY_REF100M	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIEPHY_REF100M	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIEPHY_REF100M	/;"	d
SCLK_PCIE_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_CORE	/;"	d
SCLK_PCIE_PM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCIE_PM	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PCIE_PM	/;"	d
SCLK_PCM	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM	/;"	d
SCLK_PCM1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PCM1	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PCM1	/;"	d
SCLK_PS2C	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PS2C	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PS2C	/;"	d
SCLK_PVTM_CORE	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_CORE /;"	d
SCLK_PVTM_CORE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_CORE	/;"	d
SCLK_PVTM_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_B	/;"	d
SCLK_PVTM_CORE_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_CORE_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_CORE_L	/;"	d
SCLK_PVTM_DDR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_DDR	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_DDR	/;"	d
SCLK_PVTM_GPU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_GPU /;"	d
SCLK_PVTM_GPU	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_GPU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_GPU	/;"	d
SCLK_PVTM_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_PVTM_PMU	/;"	d
SCLK_PVTM_VIDEO	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PVTM_VIDEO	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_PVTM_VIDEO /;"	d
SCLK_PWM	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_PWM	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_PWM	/;"	d
SCLK_RGA	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_RGA	/;"	d
SCLK_RGA_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RGA_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RGA_CORE	/;"	d
SCLK_RMII_SRC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_RMII_SRC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_RMII_SRC	/;"	d
SCLK_SARADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SARADC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SARADC	/;"	d
SCLK_SDIO	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO	/;"	d
SCLK_SDIO0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0	/;"	d
SCLK_SDIO0_DRV	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_DRV	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_DRV	/;"	d
SCLK_SDIO0_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO0_SAMPLE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO0_SAMPLE	/;"	d
SCLK_SDIO1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1	/;"	d
SCLK_SDIO1_DRV	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_DRV	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_DRV	/;"	d
SCLK_SDIO1_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO1_SAMPLE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDIO1_SAMPLE	/;"	d
SCLK_SDIO_DRV	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_DRV	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_DRV	/;"	d
SCLK_SDIO_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDIO_SAMPLE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDIO_SAMPLE	/;"	d
SCLK_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC	/;"	d
SCLK_SDMMC_DRV	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_DRV	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_DRV	/;"	d
SCLK_SDMMC_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SDMMC_SAMPLE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SDMMC_SAMPLE	/;"	d
SCLK_SFC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SFC	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SFC	/;"	d
SCLK_SOURCE_CLKD	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_CLKD,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_CLKM	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_CLKM,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_CLKS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_CLKS,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_PLLC_OUT1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_PLLC_OUT1,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_PLLM_OUT1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_PLLM_OUT1,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_PLLP_OUT2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_PLLP_OUT2,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_PLLP_OUT3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_PLLP_OUT3,$/;"	e	enum:__anon84cad1990403
SCLK_SOURCE_PLLP_OUT4	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SOURCE_PLLP_OUT4,$/;"	e	enum:__anon84cad1990403
SCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF	/;"	d
SCLK_SPDIF8CH	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF8CH	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPDIF8CH	/;"	d
SCLK_SPDIF_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_8CH	/;"	d
SCLK_SPDIF_REC_DPTX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPDIF_REC_DPTX	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPDIF_REC_DPTX	/;"	d
SCLK_SPI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_SPI	/;"	d
SCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI0	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI0	/;"	d
SCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI1	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI1	/;"	d
SCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI2	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI2	/;"	d
SCLK_SPI3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI3	/;"	d
SCLK_SPI3_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI3_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI3_PMU	/;"	d
SCLK_SPI4	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI4	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI4	/;"	d
SCLK_SPI5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SPI5	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_SPI5	/;"	d
SCLK_SRC_FRC1	drivers/clk/clk_pic32.c	/^#define SCLK_SRC_FRC1	/;"	d	file:
SCLK_SRC_FRC2	drivers/clk/clk_pic32.c	/^#define SCLK_SRC_FRC2	/;"	d	file:
SCLK_SRC_ISP_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SCLK_SRC_ISP_VAL	/;"	d
SCLK_SRC_POSC	drivers/clk/clk_pic32.c	/^#define SCLK_SRC_POSC	/;"	d	file:
SCLK_SRC_SPLL	drivers/clk/clk_pic32.c	/^#define SCLK_SRC_SPLL	/;"	d	file:
SCLK_SWAKEUP_FIQ_SOURCE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_FIQ_SOURCE_MASK	/;"	d
SCLK_SWAKEUP_FIQ_SOURCE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_FIQ_SOURCE_SHIFT	/;"	d
SCLK_SWAKEUP_IDLE_SOURCE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_IDLE_SOURCE_MASK	/;"	d
SCLK_SWAKEUP_IDLE_SOURCE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_IDLE_SOURCE_SHIFT	/;"	d
SCLK_SWAKEUP_IRQ_SOURCE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_IRQ_SOURCE_MASK	/;"	d
SCLK_SWAKEUP_IRQ_SOURCE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_IRQ_SOURCE_SHIFT	/;"	d
SCLK_SWAKEUP_RUN_SOURCE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_RUN_SOURCE_MASK	/;"	d
SCLK_SWAKEUP_RUN_SOURCE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKEUP_RUN_SOURCE_SHIFT	/;"	d
SCLK_SWAKE_FIQ_SRC_PLLM_OUT1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKE_FIQ_SRC_PLLM_OUT1 /;"	d
SCLK_SWAKE_FIQ_SRC_PLLM_OUT1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SCLK_SWAKE_FIQ_SRC_PLLM_OUT1	/;"	d
SCLK_SWAKE_IDLE_SRC_PLLM_OUT1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKE_IDLE_SRC_PLLM_OUT1 /;"	d
SCLK_SWAKE_IDLE_SRC_PLLM_OUT1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SCLK_SWAKE_IDLE_SRC_PLLM_OUT1	/;"	d
SCLK_SWAKE_IRQ_SRC_PLLM_OUT1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKE_IRQ_SRC_PLLM_OUT1 /;"	d
SCLK_SWAKE_IRQ_SRC_PLLM_OUT1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SCLK_SWAKE_IRQ_SRC_PLLM_OUT1	/;"	d
SCLK_SWAKE_RUN_SRC_PLLM_OUT1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SWAKE_RUN_SRC_PLLM_OUT1 /;"	d
SCLK_SWAKE_RUN_SRC_PLLM_OUT1	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SCLK_SWAKE_RUN_SRC_PLLM_OUT1	/;"	d
SCLK_SYS_STATE_FIQ	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SYS_STATE_FIQ = 8U,$/;"	e	enum:__anon84cad1990303
SCLK_SYS_STATE_IDLE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SYS_STATE_IDLE,$/;"	e	enum:__anon84cad1990303
SCLK_SYS_STATE_IDLE	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SCLK_SYS_STATE_IDLE	/;"	d
SCLK_SYS_STATE_IRQ	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SYS_STATE_IRQ = 4U,$/;"	e	enum:__anon84cad1990303
SCLK_SYS_STATE_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SYS_STATE_MASK /;"	d
SCLK_SYS_STATE_RUN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SYS_STATE_RUN,$/;"	e	enum:__anon84cad1990303
SCLK_SYS_STATE_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SCLK_SYS_STATE_SHIFT /;"	d
SCLK_SYS_STATE_STDBY	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	SCLK_SYS_STATE_STDBY,$/;"	e	enum:__anon84cad1990303
SCLK_TIMER0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER0	/;"	d
SCLK_TIMER00	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER00	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER00	/;"	d
SCLK_TIMER01	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER01	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER01	/;"	d
SCLK_TIMER02	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER02	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER02	/;"	d
SCLK_TIMER03	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER03	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER03	/;"	d
SCLK_TIMER04	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER04	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER04	/;"	d
SCLK_TIMER05	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER05	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER05	/;"	d
SCLK_TIMER06	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER06	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER06	/;"	d
SCLK_TIMER07	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER07	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER07	/;"	d
SCLK_TIMER08	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER08	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER08	/;"	d
SCLK_TIMER09	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER09	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER09	/;"	d
SCLK_TIMER1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER1	/;"	d
SCLK_TIMER10	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER10	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER10	/;"	d
SCLK_TIMER11	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER11	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER11	/;"	d
SCLK_TIMER12_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER12_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER12_PMU	/;"	d
SCLK_TIMER13_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER13_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TIMER13_PMU	/;"	d
SCLK_TIMER2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER2	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER2	/;"	d
SCLK_TIMER3	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER3	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER3	/;"	d
SCLK_TIMER4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER4	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER4	/;"	d
SCLK_TIMER5	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER5	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER5	/;"	d
SCLK_TIMER6	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TIMER6	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TIMER6	/;"	d
SCLK_TMU	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TMU	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_TMU	/;"	d
SCLK_TO_MSEC	arch/blackfin/include/asm/blackfin_local.h	/^#define SCLK_TO_MSEC(/;"	d
SCLK_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_TSADC	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_TSADC	/;"	d
SCLK_UART0	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART0	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART0	/;"	d
SCLK_UART1	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART1	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART1	/;"	d
SCLK_UART2	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	include/dt-bindings/clock/rk3036-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART2	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART2	/;"	d
SCLK_UART3	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART3	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART3	/;"	d
SCLK_UART4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_UART4	/;"	d
SCLK_UART4_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UART4_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UART4_PMU	/;"	d
SCLK_UFSUNIPRO20_USER	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UFSUNIPRO20_USER	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_UFSUNIPRO20_USER	/;"	d
SCLK_UPHY0_TCPDCORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDCORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDCORE	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY0_TCPDPHY_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY0_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDCORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDCORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDCORE	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_UPHY1_TCPDPHY_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_UPHY1_TCPDPHY_REF	/;"	d
SCLK_USB2PHY0_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY0_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY0_REF	/;"	d
SCLK_USB2PHY1_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB2PHY1_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB2PHY1_REF	/;"	d
SCLK_USB3OTG0_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_REF	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG0_SUSPEND	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG0_SUSPEND	/;"	d
SCLK_USB3OTG1_REF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_REF	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_REF	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USB3OTG1_SUSPEND	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USB3OTG1_SUSPEND	/;"	d
SCLK_USBDRD300_REFCLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_REFCLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_REFCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBDRD300_SUSPENDCLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define SCLK_USBDRD300_SUSPENDCLK	/;"	d
SCLK_USBPHY480M	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_USBPHY480M	/;"	d
SCLK_USBPHY480M_SRC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_USBPHY480M_SRC	include/dt-bindings/clock/rk3288-cru.h	/^#define SCLK_USBPHY480M_SRC	/;"	d
SCLK_VDU_CA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CA	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CA	/;"	d
SCLK_VDU_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VDU_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VDU_CORE	/;"	d
SCLK_VOP0_PWM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP0_PWM	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP0_PWM	/;"	d
SCLK_VOP1_PWM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_VOP1_PWM	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_VOP1_PWM	/;"	d
SCLK_WIFI_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLK_WIFI_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SCLK_WIFI_PMU	/;"	d
SCLOVR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SCLOVR	/;"	d
SCLSEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SCLSEN	/;"	d
SCLSR2	drivers/serial/serial_sh.h	/^# define SCLSR2\\/;"	d
SCL_BURST8	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_BURST8	/;"	d
SCL_CAPCLKDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_CAPCLKDLY(/;"	d
SCL_CSEN	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_CSEN	/;"	d
SCL_DDRCLKDLY	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_DDRCLKDLY(/;"	d
SCL_DDR_CONNECTED	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_DDR_CONNECTED	/;"	d
SCL_EN	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_EN	/;"	d
SCL_LUBPASS	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_LUBPASS	/;"	d
SCL_MASK	board/keymile/km82xx/km82xx.c	/^#define SCL_MASK	/;"	d	file:
SCL_ODTCSWW	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_ODTCSWW	/;"	d
SCL_RCAS_LAT	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_RCAS_LAT(/;"	d
SCL_START	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_START	/;"	d
SCL_WCAS_LAT	drivers/ddr/microchip/ddr2_regs.h	/^#define SCL_WCAS_LAT(/;"	d
SCMISR_CFEI	arch/m68k/include/asm/m5329.h	/^#define SCMISR_CFEI	/;"	d
SCMISR_CWIC	arch/m68k/include/asm/m5329.h	/^#define SCMISR_CWIC	/;"	d
SCMR_BUSDF_MSK	include/mpc8260.h	/^#define SCMR_BUSDF_MSK	/;"	d
SCMR_BUSDF_SHIFT	include/mpc8260.h	/^#define SCMR_BUSDF_SHIFT /;"	d
SCMR_CORECNF_MSK	include/mpc8260.h	/^#define SCMR_CORECNF_MSK /;"	d
SCMR_CORECNF_SHIFT	include/mpc8260.h	/^#define SCMR_CORECNF_SHIFT /;"	d
SCMR_CPMDF_MSK	include/mpc8260.h	/^#define SCMR_CPMDF_MSK	/;"	d
SCMR_CPMDF_SHIFT	include/mpc8260.h	/^#define SCMR_CPMDF_SHIFT /;"	d
SCMR_PLLDF	include/mpc8260.h	/^#define SCMR_PLLDF	/;"	d
SCMR_PLLMF_MSK	include/mpc8260.h	/^#define SCMR_PLLMF_MSK	/;"	d
SCMR_PLLMF_MSKH7	include/mpc8260.h	/^#define SCMR_PLLMF_MSKH7 /;"	d
SCMR_PLLMF_SHIFT	include/mpc8260.h	/^#define SCMR_PLLMF_SHIFT /;"	d
SCM_BMT_BME	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BME	/;"	d
SCM_BMT_BMT	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT(/;"	d
SCM_BMT_BMT1024	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT1024	/;"	d
SCM_BMT_BMT128	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT128	/;"	d
SCM_BMT_BMT16	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT16	/;"	d
SCM_BMT_BMT256	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT256	/;"	d
SCM_BMT_BMT32	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT32	/;"	d
SCM_BMT_BMT512	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT512	/;"	d
SCM_BMT_BMT64	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT64	/;"	d
SCM_BMT_BMT8	arch/m68k/include/asm/m520x.h	/^#define SCM_BMT_BMT8	/;"	d
SCM_CFATR_CACHE	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_CACHE	/;"	d
SCM_CFATR_CACHE	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_CACHE	/;"	d
SCM_CFATR_MODE	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_MODE	/;"	d
SCM_CFATR_MODE	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_MODE	/;"	d
SCM_CFATR_SZ08	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_SZ08	/;"	d
SCM_CFATR_SZ08	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_SZ08	/;"	d
SCM_CFATR_SZ16	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_SZ16	/;"	d
SCM_CFATR_SZ16	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_SZ16	/;"	d
SCM_CFATR_SZ32	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_SZ32	/;"	d
SCM_CFATR_SZ32	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_SZ32	/;"	d
SCM_CFATR_TYPE	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_TYPE	/;"	d
SCM_CFATR_TYPE	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_TYPE	/;"	d
SCM_CFATR_WRITE	arch/m68k/include/asm/m520x.h	/^#define SCM_CFATR_WRITE	/;"	d
SCM_CFATR_WRITE	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFATR_WRITE	/;"	d
SCM_CFIER_ECFEI	arch/m68k/include/asm/m520x.h	/^#define SCM_CFIER_ECFEI	/;"	d
SCM_CFIER_ECFEI	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFIER_ECFEI	/;"	d
SCM_CFLOC_LOC	arch/m68k/include/asm/m520x.h	/^#define SCM_CFLOC_LOC	/;"	d
SCM_CFLOC_LOC	arch/m68k/include/asm/m5301x.h	/^#define SCM_CFLOC_LOC	/;"	d
SCM_CRSR_EXT	arch/m68k/include/asm/m5235.h	/^#define SCM_CRSR_EXT	/;"	d
SCM_CWCR_CWE	arch/m68k/include/asm/m520x.h	/^#define SCM_CWCR_CWE	/;"	d
SCM_CWCR_CWE	arch/m68k/include/asm/m5235.h	/^#define SCM_CWCR_CWE	/;"	d
SCM_CWCR_CWE	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWE	/;"	d
SCM_CWCR_CWRI	arch/m68k/include/asm/m5235.h	/^#define SCM_CWCR_CWRI	/;"	d
SCM_CWCR_CWRI_INT	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWRI_INT	/;"	d
SCM_CWCR_CWRI_INT_RESET	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWRI_INT_RESET	/;"	d
SCM_CWCR_CWRI_RESET	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWRI_RESET	/;"	d
SCM_CWCR_CWRI_WINDOW	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWRI_WINDOW	/;"	d
SCM_CWCR_CWR_WH	arch/m68k/include/asm/m520x.h	/^#define SCM_CWCR_CWR_WH	/;"	d
SCM_CWCR_CWR_WH	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWR_WH	/;"	d
SCM_CWCR_CWT	arch/m68k/include/asm/m520x.h	/^#define SCM_CWCR_CWT(/;"	d
SCM_CWCR_CWT	arch/m68k/include/asm/m5235.h	/^#define SCM_CWCR_CWT(/;"	d
SCM_CWCR_CWT	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_CWT(/;"	d
SCM_CWCR_CWTA	arch/m68k/include/asm/m5235.h	/^#define SCM_CWCR_CWTA	/;"	d
SCM_CWCR_CWTAVAL	arch/m68k/include/asm/m5235.h	/^#define SCM_CWCR_CWTAVAL	/;"	d
SCM_CWCR_CWTIC	arch/m68k/include/asm/m5235.h	/^#define SCM_CWCR_CWTIC	/;"	d
SCM_CWCR_RO	arch/m68k/include/asm/m520x.h	/^#define SCM_CWCR_RO	/;"	d
SCM_CWCR_RO	arch/m68k/include/asm/m5301x.h	/^#define SCM_CWCR_RO	/;"	d
SCM_CWRI_INT	arch/m68k/include/asm/m520x.h	/^#define SCM_CWRI_INT	/;"	d
SCM_CWRI_INT_RESET	arch/m68k/include/asm/m520x.h	/^#define SCM_CWRI_INT_RESET	/;"	d
SCM_CWRI_RESET	arch/m68k/include/asm/m520x.h	/^#define SCM_CWRI_RESET	/;"	d
SCM_CWRI_WINDOW	arch/m68k/include/asm/m520x.h	/^#define SCM_CWRI_WINDOW	/;"	d
SCM_DMAREQC_DMAC0	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMAC0(/;"	d
SCM_DMAREQC_DMAC1	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMAC1(/;"	d
SCM_DMAREQC_DMAC2	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMAC2(/;"	d
SCM_DMAREQC_DMAC3	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMAC3(/;"	d
SCM_DMAREQC_DMACn_DTMR0	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_DTMR0	/;"	d
SCM_DMAREQC_DMACn_DTMR1	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_DTMR1	/;"	d
SCM_DMAREQC_DMACn_DTMR2	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_DTMR2	/;"	d
SCM_DMAREQC_DMACn_DTMR3	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_DTMR3	/;"	d
SCM_DMAREQC_DMACn_UART0RX	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_UART0RX	/;"	d
SCM_DMAREQC_DMACn_UART0TX	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_UART0TX	/;"	d
SCM_DMAREQC_DMACn_UART1RX	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_UART1RX	/;"	d
SCM_DMAREQC_DMACn_UART1TX	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_UART1TX	/;"	d
SCM_DMAREQC_DMACn_UART2RX	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_UART2RX	/;"	d
SCM_DMAREQC_DMACn_UART3TX	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_DMACn_UART3TX	/;"	d
SCM_DMAREQC_EXT	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_EXT(/;"	d
SCM_DMAREQC_EXT_ETPU	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_EXT_ETPU	/;"	d
SCM_DMAREQC_EXT_EXTDREQ0	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_EXT_EXTDREQ0	/;"	d
SCM_DMAREQC_EXT_EXTDREQ1	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_EXT_EXTDREQ1	/;"	d
SCM_DMAREQC_EXT_EXTDREQ2	arch/m68k/include/asm/m5235.h	/^#define SCM_DMAREQC_EXT_EXTDREQ2	/;"	d
SCM_IPSBAR_BA	arch/m68k/include/asm/m5235.h	/^#define SCM_IPSBAR_BA(/;"	d
SCM_IPSBAR_V	arch/m68k/include/asm/m5235.h	/^#define SCM_IPSBAR_V	/;"	d
SCM_ISR_CFEI	arch/m68k/include/asm/m520x.h	/^#define SCM_ISR_CFEI	/;"	d
SCM_ISR_CFEI	arch/m68k/include/asm/m5301x.h	/^#define SCM_ISR_CFEI	/;"	d
SCM_ISR_CWIC	arch/m68k/include/asm/m520x.h	/^#define SCM_ISR_CWIC	/;"	d
SCM_ISR_CWIC	arch/m68k/include/asm/m5301x.h	/^#define SCM_ISR_CWIC	/;"	d
SCM_LPICR_ENBSTOP	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_ENBSTOP	/;"	d
SCM_LPICR_XLPM_IPL	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL(/;"	d
SCM_LPICR_XLPM_IPL_ANY	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_ANY	/;"	d
SCM_LPICR_XLPM_IPL_L2_7	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_L2_7	/;"	d
SCM_LPICR_XLPM_IPL_L3_7	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_L3_7	/;"	d
SCM_LPICR_XLPM_IPL_L4_7	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_L4_7	/;"	d
SCM_LPICR_XLPM_IPL_L5_7	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_L5_7	/;"	d
SCM_LPICR_XLPM_IPL_L6_7	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_L6_7	/;"	d
SCM_LPICR_XLPM_IPL_L7	arch/m68k/include/asm/m5235.h	/^#define SCM_LPICR_XLPM_IPL_L7	/;"	d
SCM_MPARK_FIXED	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_FIXED	/;"	d
SCM_MPARK_LCKOUT_TIME	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_LCKOUT_TIME(/;"	d
SCM_MPARK_M0_PRTY_1ST	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M0_PRTY_1ST	/;"	d
SCM_MPARK_M0_PRTY_2ND	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M0_PRTY_2ND	/;"	d
SCM_MPARK_M0_PRTY_3RD	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M0_PRTY_3RD	/;"	d
SCM_MPARK_M0_PRTY_4TH	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M0_PRTY_4TH	/;"	d
SCM_MPARK_M0_PRTY_MSK	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M0_PRTY_MSK	/;"	d
SCM_MPARK_M2_PRTY_1ST	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M2_PRTY_1ST	/;"	d
SCM_MPARK_M2_PRTY_2ND	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M2_PRTY_2ND	/;"	d
SCM_MPARK_M2_PRTY_3RD	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M2_PRTY_3RD	/;"	d
SCM_MPARK_M2_PRTY_4TH	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M2_PRTY_4TH	/;"	d
SCM_MPARK_M2_PRTY_MSK	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M2_PRTY_MSK	/;"	d
SCM_MPARK_M2_P_EN	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M2_P_EN	/;"	d
SCM_MPARK_M3_PRTY_1ST	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M3_PRTY_1ST	/;"	d
SCM_MPARK_M3_PRTY_2ND	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M3_PRTY_2ND	/;"	d
SCM_MPARK_M3_PRTY_3RD	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M3_PRTY_3RD	/;"	d
SCM_MPARK_M3_PRTY_4TH	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M3_PRTY_4TH	/;"	d
SCM_MPARK_M3_PRTY_MSK	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_M3_PRTY_MSK	/;"	d
SCM_MPARK_PRKLAST	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_PRKLAST	/;"	d
SCM_MPARK_TIMEOUT	arch/m68k/include/asm/m5235.h	/^#define SCM_MPARK_TIMEOUT	/;"	d
SCM_MPR_MPR0	arch/m68k/include/asm/m5235.h	/^#define SCM_MPR_MPR0	/;"	d
SCM_MPR_MPR1	arch/m68k/include/asm/m5235.h	/^#define SCM_MPR_MPR1	/;"	d
SCM_MPR_MPR2	arch/m68k/include/asm/m5235.h	/^#define SCM_MPR_MPR2	/;"	d
SCM_MPR_MPR3	arch/m68k/include/asm/m5235.h	/^#define SCM_MPR_MPR3	/;"	d
SCM_MPR_MPROT0	arch/m68k/include/asm/m520x.h	/^#define SCM_MPR_MPROT0(/;"	d
SCM_MPR_MPROT0	arch/m68k/include/asm/m5301x.h	/^#define SCM_MPR_MPROT0(/;"	d
SCM_MPR_MPROT0	arch/m68k/include/asm/m5329.h	/^#define SCM_MPR_MPROT0(/;"	d
SCM_MPR_MPROT1	arch/m68k/include/asm/m520x.h	/^#define SCM_MPR_MPROT1(/;"	d
SCM_MPR_MPROT1	arch/m68k/include/asm/m5301x.h	/^#define SCM_MPR_MPROT1(/;"	d
SCM_MPR_MPROT1	arch/m68k/include/asm/m5329.h	/^#define SCM_MPR_MPROT1(/;"	d
SCM_MPR_MPROT2	arch/m68k/include/asm/m520x.h	/^#define SCM_MPR_MPROT2(/;"	d
SCM_MPR_MPROT2	arch/m68k/include/asm/m5301x.h	/^#define SCM_MPR_MPROT2(/;"	d
SCM_MPR_MPROT2	arch/m68k/include/asm/m5329.h	/^#define SCM_MPR_MPROT2(/;"	d
SCM_MPR_MPROT4	arch/m68k/include/asm/m5301x.h	/^#define SCM_MPR_MPROT4(/;"	d
SCM_MPR_MPROT4	arch/m68k/include/asm/m5329.h	/^#define SCM_MPR_MPROT4(/;"	d
SCM_MPR_MPROT5	arch/m68k/include/asm/m5301x.h	/^#define SCM_MPR_MPROT5(/;"	d
SCM_MPR_MPROT5	arch/m68k/include/asm/m5329.h	/^#define SCM_MPR_MPROT5(/;"	d
SCM_MPR_MPROT6	arch/m68k/include/asm/m5301x.h	/^#define SCM_MPR_MPROT6(/;"	d
SCM_MPR_MPROT6	arch/m68k/include/asm/m5329.h	/^#define SCM_MPR_MPROT6(/;"	d
SCM_PACRA_PACR0	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRA_PACR0(/;"	d
SCM_PACRA_PACR0	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRA_PACR0(/;"	d
SCM_PACRA_PACR0	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRA_PACR0(/;"	d
SCM_PACRA_PACR1	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRA_PACR1(/;"	d
SCM_PACRA_PACR1	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRA_PACR1(/;"	d
SCM_PACRA_PACR1	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRA_PACR1(/;"	d
SCM_PACRA_PACR2	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRA_PACR2(/;"	d
SCM_PACRA_PACR2	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRA_PACR2(/;"	d
SCM_PACRA_PACR2	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRA_PACR2(/;"	d
SCM_PACRA_PACR5	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRA_PACR5(/;"	d
SCM_PACRB_PACR12	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRB_PACR12(/;"	d
SCM_PACRB_PACR12	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRB_PACR12(/;"	d
SCM_PACRB_PACR12	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRB_PACR12(/;"	d
SCM_PACRB_PACR13	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRB_PACR13(/;"	d
SCM_PACRB_PACR8	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRB_PACR8(/;"	d
SCM_PACRC_PACR16	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRC_PACR16(/;"	d
SCM_PACRC_PACR16	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR16(/;"	d
SCM_PACRC_PACR16	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR16(/;"	d
SCM_PACRC_PACR17	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRC_PACR17(/;"	d
SCM_PACRC_PACR17	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR17(/;"	d
SCM_PACRC_PACR17	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR17(/;"	d
SCM_PACRC_PACR18	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRC_PACR18(/;"	d
SCM_PACRC_PACR18	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR18(/;"	d
SCM_PACRC_PACR18	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR18(/;"	d
SCM_PACRC_PACR19	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR19(/;"	d
SCM_PACRC_PACR19	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR19(/;"	d
SCM_PACRC_PACR21	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRC_PACR21(/;"	d
SCM_PACRC_PACR21	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR21(/;"	d
SCM_PACRC_PACR21	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR21(/;"	d
SCM_PACRC_PACR22	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRC_PACR22(/;"	d
SCM_PACRC_PACR22	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR22(/;"	d
SCM_PACRC_PACR22	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR22(/;"	d
SCM_PACRC_PACR23	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRC_PACR23(/;"	d
SCM_PACRC_PACR23	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRC_PACR23(/;"	d
SCM_PACRC_PACR23	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRC_PACR23(/;"	d
SCM_PACRD_PACR24	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR24(/;"	d
SCM_PACRD_PACR24	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR24(/;"	d
SCM_PACRD_PACR24	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR24(/;"	d
SCM_PACRD_PACR25	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR25(/;"	d
SCM_PACRD_PACR25	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR25(/;"	d
SCM_PACRD_PACR25	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR25(/;"	d
SCM_PACRD_PACR26	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR26(/;"	d
SCM_PACRD_PACR26	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR26(/;"	d
SCM_PACRD_PACR26	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR26(/;"	d
SCM_PACRD_PACR28	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR28(/;"	d
SCM_PACRD_PACR28	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR28(/;"	d
SCM_PACRD_PACR28	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR28(/;"	d
SCM_PACRD_PACR29	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR29(/;"	d
SCM_PACRD_PACR29	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR29(/;"	d
SCM_PACRD_PACR29	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR29(/;"	d
SCM_PACRD_PACR30	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR30(/;"	d
SCM_PACRD_PACR30	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR30(/;"	d
SCM_PACRD_PACR30	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR30(/;"	d
SCM_PACRD_PACR31	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRD_PACR31(/;"	d
SCM_PACRD_PACR31	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRD_PACR31(/;"	d
SCM_PACRD_PACR31	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRD_PACR31(/;"	d
SCM_PACRE_PACR32	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRE_PACR32(/;"	d
SCM_PACRE_PACR32	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR32(/;"	d
SCM_PACRE_PACR32	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR32(/;"	d
SCM_PACRE_PACR33	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRE_PACR33(/;"	d
SCM_PACRE_PACR33	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR33(/;"	d
SCM_PACRE_PACR33	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR33(/;"	d
SCM_PACRE_PACR34	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRE_PACR34(/;"	d
SCM_PACRE_PACR34	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR34(/;"	d
SCM_PACRE_PACR34	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR34(/;"	d
SCM_PACRE_PACR35	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRE_PACR35(/;"	d
SCM_PACRE_PACR35	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR35(/;"	d
SCM_PACRE_PACR35	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR35(/;"	d
SCM_PACRE_PACR36	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRE_PACR36(/;"	d
SCM_PACRE_PACR36	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR36(/;"	d
SCM_PACRE_PACR36	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR36(/;"	d
SCM_PACRE_PACR37	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR37(/;"	d
SCM_PACRE_PACR37	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR37(/;"	d
SCM_PACRE_PACR38	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRE_PACR38(/;"	d
SCM_PACRE_PACR39	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRE_PACR39(/;"	d
SCM_PACRF_PACR40	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRF_PACR40(/;"	d
SCM_PACRF_PACR40	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR40(/;"	d
SCM_PACRF_PACR40	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR40(/;"	d
SCM_PACRF_PACR41	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRF_PACR41(/;"	d
SCM_PACRF_PACR41	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR41(/;"	d
SCM_PACRF_PACR41	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR41(/;"	d
SCM_PACRF_PACR42	arch/m68k/include/asm/m520x.h	/^#define SCM_PACRF_PACR42(/;"	d
SCM_PACRF_PACR42	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR42(/;"	d
SCM_PACRF_PACR42	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR42(/;"	d
SCM_PACRF_PACR43	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR43(/;"	d
SCM_PACRF_PACR43	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR43(/;"	d
SCM_PACRF_PACR44	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR44(/;"	d
SCM_PACRF_PACR44	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR44(/;"	d
SCM_PACRF_PACR45	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR45(/;"	d
SCM_PACRF_PACR45	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR45(/;"	d
SCM_PACRF_PACR46	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR46(/;"	d
SCM_PACRF_PACR46	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR46(/;"	d
SCM_PACRF_PACR47	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRF_PACR47(/;"	d
SCM_PACRF_PACR47	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRF_PACR47(/;"	d
SCM_PACRG_PACR48	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRG_PACR48(/;"	d
SCM_PACRG_PACR48	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRG_PACR48(/;"	d
SCM_PACRG_PACR49	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRG_PACR49(/;"	d
SCM_PACRG_PACR50	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRG_PACR50(/;"	d
SCM_PACRG_PACR51	arch/m68k/include/asm/m5301x.h	/^#define SCM_PACRG_PACR51(/;"	d
SCM_PACRH_PACR56	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRH_PACR56(/;"	d
SCM_PACRH_PACR57	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRH_PACR57(/;"	d
SCM_PACRH_PACR58	arch/m68k/include/asm/m5329.h	/^#define SCM_PACRH_PACR58(/;"	d
SCM_PACRn_ACCESSCTRL0	arch/m68k/include/asm/m5235.h	/^#define SCM_PACRn_ACCESSCTRL0(/;"	d
SCM_PACRn_ACCESSCTRL1	arch/m68k/include/asm/m5235.h	/^#define SCM_PACRn_ACCESSCTRL1(/;"	d
SCM_PACRn_LOCK	arch/m68k/include/asm/m5235.h	/^#define SCM_PACRn_LOCK	/;"	d
SCM_PACRn_LOCK0	arch/m68k/include/asm/m5235.h	/^#define SCM_PACRn_LOCK0	/;"	d
SCM_PACRn_LOCK1	arch/m68k/include/asm/m5235.h	/^#define SCM_PACRn_LOCK1	/;"	d
SCM_RAMBAR_BA	arch/m68k/include/asm/m5235.h	/^#define SCM_RAMBAR_BA(/;"	d
SCM_RAMBAR_BDE	arch/m68k/include/asm/m5235.h	/^#define SCM_RAMBAR_BDE	/;"	d
SCNTL0	include/sym53c8xx.h	/^#define SCNTL0	/;"	d
SCNTL1	include/sym53c8xx.h	/^#define SCNTL1	/;"	d
SCNTL2	include/sym53c8xx.h	/^#define SCNTL2	/;"	d
SCNTL3	include/sym53c8xx.h	/^#define SCNTL3	/;"	d
SCNd16	include/inttypes.h	/^# define SCNd16	/;"	d
SCNd32	include/inttypes.h	/^# define SCNd32	/;"	d
SCNd64	include/inttypes.h	/^# define SCNd64	/;"	d
SCNd8	include/inttypes.h	/^# define SCNd8	/;"	d
SCNdFAST16	include/inttypes.h	/^# define SCNdFAST16	/;"	d
SCNdFAST32	include/inttypes.h	/^# define SCNdFAST32	/;"	d
SCNdFAST64	include/inttypes.h	/^# define SCNdFAST64	/;"	d
SCNdFAST8	include/inttypes.h	/^# define SCNdFAST8	/;"	d
SCNdLEAST16	include/inttypes.h	/^# define SCNdLEAST16	/;"	d
SCNdLEAST32	include/inttypes.h	/^# define SCNdLEAST32	/;"	d
SCNdLEAST64	include/inttypes.h	/^# define SCNdLEAST64	/;"	d
SCNdLEAST8	include/inttypes.h	/^# define SCNdLEAST8	/;"	d
SCNdMAX	include/inttypes.h	/^# define SCNdMAX	/;"	d
SCNdPTR	include/inttypes.h	/^# define SCNdPTR	/;"	d
SCNi16	include/inttypes.h	/^# define SCNi16	/;"	d
SCNi32	include/inttypes.h	/^# define SCNi32	/;"	d
SCNi64	include/inttypes.h	/^# define SCNi64	/;"	d
SCNi8	include/inttypes.h	/^# define SCNi8	/;"	d
SCNiFAST16	include/inttypes.h	/^# define SCNiFAST16	/;"	d
SCNiFAST32	include/inttypes.h	/^# define SCNiFAST32	/;"	d
SCNiFAST64	include/inttypes.h	/^# define SCNiFAST64	/;"	d
SCNiFAST8	include/inttypes.h	/^# define SCNiFAST8	/;"	d
SCNiLEAST16	include/inttypes.h	/^# define SCNiLEAST16	/;"	d
SCNiLEAST32	include/inttypes.h	/^# define SCNiLEAST32	/;"	d
SCNiLEAST64	include/inttypes.h	/^# define SCNiLEAST64	/;"	d
SCNiLEAST8	include/inttypes.h	/^# define SCNiLEAST8	/;"	d
SCNiMAX	include/inttypes.h	/^# define SCNiMAX	/;"	d
SCNiPTR	include/inttypes.h	/^# define SCNiPTR	/;"	d
SCNo16	include/inttypes.h	/^# define SCNo16	/;"	d
SCNo32	include/inttypes.h	/^# define SCNo32	/;"	d
SCNo64	include/inttypes.h	/^# define SCNo64	/;"	d
SCNo8	include/inttypes.h	/^# define SCNo8	/;"	d
SCNoFAST16	include/inttypes.h	/^# define SCNoFAST16	/;"	d
SCNoFAST32	include/inttypes.h	/^# define SCNoFAST32	/;"	d
SCNoFAST64	include/inttypes.h	/^# define SCNoFAST64	/;"	d
SCNoFAST8	include/inttypes.h	/^# define SCNoFAST8	/;"	d
SCNoLEAST16	include/inttypes.h	/^# define SCNoLEAST16	/;"	d
SCNoLEAST32	include/inttypes.h	/^# define SCNoLEAST32	/;"	d
SCNoLEAST64	include/inttypes.h	/^# define SCNoLEAST64	/;"	d
SCNoLEAST8	include/inttypes.h	/^# define SCNoLEAST8	/;"	d
SCNoMAX	include/inttypes.h	/^# define SCNoMAX	/;"	d
SCNoPTR	include/inttypes.h	/^# define SCNoPTR	/;"	d
SCNu16	include/inttypes.h	/^# define SCNu16	/;"	d
SCNu32	include/inttypes.h	/^# define SCNu32	/;"	d
SCNu64	include/inttypes.h	/^# define SCNu64	/;"	d
SCNu8	include/inttypes.h	/^# define SCNu8	/;"	d
SCNuFAST16	include/inttypes.h	/^# define SCNuFAST16	/;"	d
SCNuFAST32	include/inttypes.h	/^# define SCNuFAST32	/;"	d
SCNuFAST64	include/inttypes.h	/^# define SCNuFAST64	/;"	d
SCNuFAST8	include/inttypes.h	/^# define SCNuFAST8	/;"	d
SCNuLEAST16	include/inttypes.h	/^# define SCNuLEAST16	/;"	d
SCNuLEAST32	include/inttypes.h	/^# define SCNuLEAST32	/;"	d
SCNuLEAST64	include/inttypes.h	/^# define SCNuLEAST64	/;"	d
SCNuLEAST8	include/inttypes.h	/^# define SCNuLEAST8	/;"	d
SCNuMAX	include/inttypes.h	/^# define SCNuMAX	/;"	d
SCNuPTR	include/inttypes.h	/^# define SCNuPTR	/;"	d
SCNx16	include/inttypes.h	/^# define SCNx16	/;"	d
SCNx32	include/inttypes.h	/^# define SCNx32	/;"	d
SCNx64	include/inttypes.h	/^# define SCNx64	/;"	d
SCNx8	include/inttypes.h	/^# define SCNx8	/;"	d
SCNxFAST16	include/inttypes.h	/^# define SCNxFAST16	/;"	d
SCNxFAST32	include/inttypes.h	/^# define SCNxFAST32	/;"	d
SCNxFAST64	include/inttypes.h	/^# define SCNxFAST64	/;"	d
SCNxFAST8	include/inttypes.h	/^# define SCNxFAST8	/;"	d
SCNxLEAST16	include/inttypes.h	/^# define SCNxLEAST16	/;"	d
SCNxLEAST32	include/inttypes.h	/^# define SCNxLEAST32	/;"	d
SCNxLEAST64	include/inttypes.h	/^# define SCNxLEAST64	/;"	d
SCNxLEAST8	include/inttypes.h	/^# define SCNxLEAST8	/;"	d
SCNxMAX	include/inttypes.h	/^# define SCNxMAX	/;"	d
SCNxPTR	include/inttypes.h	/^# define SCNxPTR	/;"	d
SCOL_HIGH	drivers/spi/rk_spi.h	/^	SCOL_HIGH,		\/* Inactive state of serial clock is high *\/$/;"	e	enum:__anondde5bacc0103
SCOL_LOW	drivers/spi/rk_spi.h	/^	SCOL_LOW	= 0,	\/* Inactive state of serial clock is low *\/$/;"	e	enum:__anondde5bacc0103
SCOL_MASK	drivers/spi/rk_spi.h	/^	SCOL_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
SCOL_SHIFT	drivers/spi/rk_spi.h	/^	SCOL_SHIFT	= 7,	\/* Serial Clock Polarity *\/$/;"	e	enum:__anondde5bacc0103
SCOMP	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SCOMP	/;"	d
SCONTROL_DET_DISABLE	drivers/block/fsl_sata.h	/^#define SCONTROL_DET_DISABLE	/;"	d
SCONTROL_DET_HRESET	drivers/block/fsl_sata.h	/^#define SCONTROL_DET_HRESET	/;"	d
SCONTROL_DET_MASK	drivers/block/fsl_sata.h	/^#define SCONTROL_DET_MASK	/;"	d
SCONTROL_IPM_MASK	drivers/block/fsl_sata.h	/^#define SCONTROL_IPM_MASK	/;"	d
SCONTROL_IPM_NO_RESTRICT	drivers/block/fsl_sata.h	/^#define SCONTROL_IPM_NO_RESTRICT	/;"	d
SCONTROL_IPM_PARTIAL	drivers/block/fsl_sata.h	/^#define SCONTROL_IPM_PARTIAL	/;"	d
SCONTROL_IPM_PART_SLUM	drivers/block/fsl_sata.h	/^#define SCONTROL_IPM_PART_SLUM	/;"	d
SCONTROL_IPM_SLUMBER	drivers/block/fsl_sata.h	/^#define SCONTROL_IPM_SLUMBER	/;"	d
SCONTROL_SPD_GEN1	drivers/block/fsl_sata.h	/^#define SCONTROL_SPD_GEN1	/;"	d
SCONTROL_SPD_GEN2	drivers/block/fsl_sata.h	/^#define SCONTROL_SPD_GEN2	/;"	d
SCONTROL_SPD_MASK	drivers/block/fsl_sata.h	/^#define SCONTROL_SPD_MASK	/;"	d
SCONTROL_SPD_NO_RESTRICT	drivers/block/fsl_sata.h	/^#define SCONTROL_SPD_NO_RESTRICT	/;"	d
SCONTROL_SPM_GO_ACTIVE	drivers/block/fsl_sata.h	/^#define SCONTROL_SPM_GO_ACTIVE	/;"	d
SCONTROL_SPM_GO_PARTIAL	drivers/block/fsl_sata.h	/^#define SCONTROL_SPM_GO_PARTIAL	/;"	d
SCONTROL_SPM_GO_SLUMBER	drivers/block/fsl_sata.h	/^#define SCONTROL_SPM_GO_SLUMBER	/;"	d
SCONTROL_SPM_MASK	drivers/block/fsl_sata.h	/^#define SCONTROL_SPM_MASK	/;"	d
SCPCR	drivers/serial/serial_sh.h	/^# define SCPCR /;"	d
SCPDR	drivers/serial/serial_sh.h	/^# define SCPDR /;"	d
SCPDR0	drivers/serial/serial_sh.h	/^# define SCPDR0	/;"	d
SCPH_MASK	drivers/spi/rk_spi.h	/^	SCPH_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
SCPH_SHIFT	drivers/spi/rk_spi.h	/^	SCPH_SHIFT	= 6,	\/* Serial Clock Phase *\/$/;"	e	enum:__anondde5bacc0103
SCPH_TOGMID	drivers/spi/rk_spi.h	/^	SCPH_TOGMID	= 0,	\/* SCLK toggles in middle of first data bit *\/$/;"	e	enum:__anondde5bacc0103
SCPH_TOGSTA	drivers/spi/rk_spi.h	/^	SCPH_TOGSTA,		\/* SCLK toggles at start of first data bit *\/$/;"	e	enum:__anondde5bacc0103
SCP_CORE	board/amcc/bamboo/bamboo.h	/^			    SCP_CORE,$/;"	e	enum:config_list
SCR0_CLIENTPD_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCR0_CLIENTPD_MASK	/;"	d
SCR0_CLIENTPD_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SCR0_CLIENTPD_MASK	/;"	d
SCR0_USFCFG_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SCR0_USFCFG_MASK	/;"	d
SCR0_USFCFG_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SCR0_USFCFG_MASK	/;"	d
SCR4_A	board/renesas/sh7763rdp/lowlevel_init.S	/^SCR4_A:		.long	0xFE800014$/;"	l
SCR4_D1	board/renesas/sh7763rdp/lowlevel_init.S	/^SCR4_D1:	.long	0x00000001$/;"	l
SCR4_D2	board/renesas/sh7763rdp/lowlevel_init.S	/^SCR4_D2:	.long	0x00000002$/;"	l
SCR4_D3	board/renesas/sh7763rdp/lowlevel_init.S	/^SCR4_D3:	.long	0x00000003$/;"	l
SCR4_D4	board/renesas/sh7763rdp/lowlevel_init.S	/^SCR4_D4:	.long	0x00000004$/;"	l
SCRAMBLER_TYPE	arch/arm/mach-exynos/include/mach/dp.h	/^#define SCRAMBLER_TYPE	/;"	d
SCRAMBLING_DISABLE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SCRAMBLING_DISABLE	/;"	d
SCRAMBLING_DISABLE	arch/arm/mach-exynos/include/mach/dp.h	/^#define SCRAMBLING_DISABLE	/;"	d
SCRAMBLING_ENABLE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SCRAMBLING_ENABLE	/;"	d
SCRAMBLING_ENABLE	arch/arm/mach-exynos/include/mach/dp.h	/^#define SCRAMBLING_ENABLE	/;"	d
SCRATCHA	include/sym53c8xx.h	/^#define SCRATCHA	/;"	d
SCRATCHA1	include/sym53c8xx.h	/^#define SCRATCHA1	/;"	d
SCRATCHA2	include/sym53c8xx.h	/^#define SCRATCHA2	/;"	d
SCRATCHA3	include/sym53c8xx.h	/^#define SCRATCHA3	/;"	d
SCRATCHPAD	cmd/fdt.c	/^#define SCRATCHPAD	/;"	d	file:
SCRATCH_ADDR	include/radeon.h	/^#define SCRATCH_ADDR	/;"	d
SCRATCH_REG0	include/radeon.h	/^#define SCRATCH_REG0	/;"	d
SCRATCH_REG1	include/radeon.h	/^#define SCRATCH_REG1	/;"	d
SCRATCH_REG2	include/radeon.h	/^#define SCRATCH_REG2	/;"	d
SCRATCH_REG3	include/radeon.h	/^#define SCRATCH_REG3	/;"	d
SCRATCH_REG4	include/radeon.h	/^#define SCRATCH_REG4	/;"	d
SCRATCH_REG5	include/radeon.h	/^#define SCRATCH_REG5	/;"	d
SCRATCH_REG_ADDR	drivers/mtd/nand/denali.h	/^#define SCRATCH_REG_ADDR /;"	d
SCRATCH_REG_SIZE	drivers/mtd/nand/denali.h	/^#define SCRATCH_REG_SIZE /;"	d
SCRATCH_UMSK	include/radeon.h	/^#define SCRATCH_UMSK	/;"	d
SCRB_XOR_CHAN	arch/arm/mach-mvebu/dram.c	/^#define SCRB_XOR_CHAN	/;"	d	file:
SCRB_XOR_UNIT	arch/arm/mach-mvebu/dram.c	/^#define SCRB_XOR_UNIT	/;"	d	file:
SCRB_XOR_WIN	arch/arm/mach-mvebu/dram.c	/^#define SCRB_XOR_WIN	/;"	d	file:
SCRIPT_ADDR_R	include/configs/sunxi-common.h	/^#define SCRIPT_ADDR_R	/;"	d
SCRIPT_ADDR_R	include/configs/sunxi-common.h	/^#define SCRIPT_ADDR_R /;"	d
SCRMHI	arch/x86/cpu/quark/smc.h	/^#define SCRMHI	/;"	d
SCRMLO	arch/x86/cpu/quark/smc.h	/^#define SCRMLO	/;"	d
SCRMSEED	arch/x86/cpu/quark/smc.h	/^#define SCRMSEED	/;"	d
SCROLLWIN_BOX	scripts/kconfig/nconf.h	/^	SCROLLWIN_BOX,$/;"	e	enum:__anon6c8863760103
SCROLLWIN_HEADING	scripts/kconfig/nconf.h	/^	SCROLLWIN_HEADING,$/;"	e	enum:__anon6c8863760103
SCROLLWIN_TEXT	scripts/kconfig/nconf.h	/^	SCROLLWIN_TEXT,$/;"	e	enum:__anon6c8863760103
SCROLL_LINES	test/dm/video.c	/^#define SCROLL_LINES	/;"	d	file:
SCROLL_LOCK	common/usb_kbd.c	/^#define SCROLL_LOCK	/;"	d	file:
SCRUB_MAGIC	arch/arm/mach-mvebu/dram.c	/^#define SCRUB_MAGIC	/;"	d	file:
SCR_1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SCR_1	/;"	d
SCR_2	arch/sh/include/asm/cpu_sh7780.h	/^#define	SCR_2	/;"	d
SCR_ACK	include/sym53c8xx.h	/^#define	SCR_ACK	/;"	d
SCR_ACTIVE	include/libata.h	/^	SCR_ACTIVE		= 3,$/;"	e	enum:__anoneacac85b0103
SCR_ADD	include/sym53c8xx.h	/^#define      SCR_ADD /;"	d
SCR_ADDC	include/sym53c8xx.h	/^#define      SCR_ADDC /;"	d
SCR_AND	include/sym53c8xx.h	/^#define      SCR_AND /;"	d
SCR_ATN	include/sym53c8xx.h	/^#define	SCR_ATN	/;"	d
SCR_CALL	include/sym53c8xx.h	/^#define SCR_CALL /;"	d
SCR_CALLR	include/sym53c8xx.h	/^#define SCR_CALLR /;"	d
SCR_CARRY	include/sym53c8xx.h	/^#define	SCR_CARRY	/;"	d
SCR_CHMOV_ABS	include/sym53c8xx.h	/^#define SCR_CHMOV_ABS(/;"	d
SCR_CHMOV_IND	include/sym53c8xx.h	/^#define SCR_CHMOV_IND(/;"	d
SCR_CHMOV_TBL	include/sym53c8xx.h	/^#define SCR_CHMOV_TBL /;"	d
SCR_CLR	include/sym53c8xx.h	/^#define SCR_CLR(/;"	d
SCR_COMMAND	include/sym53c8xx.h	/^#define	SCR_COMMAND	/;"	d
SCR_CONTROL	include/libata.h	/^	SCR_CONTROL		= 2,$/;"	e	enum:__anoneacac85b0103
SCR_COPY	include/sym53c8xx.h	/^#define SCR_COPY(/;"	d
SCR_COPY_F	include/sym53c8xx.h	/^#define SCR_COPY_F(/;"	d
SCR_DATA_IN	include/sym53c8xx.h	/^#define	SCR_DATA_IN	/;"	d
SCR_DATA_OUT	include/sym53c8xx.h	/^#define	SCR_DATA_OUT	/;"	d
SCR_DSA_REL2	include/sym53c8xx.h	/^#define SCR_DSA_REL2	/;"	d
SCR_DT_DATA_IN	include/sym53c8xx.h	/^#define SCR_DT_DATA_IN	/;"	d
SCR_DT_DATA_OUT	include/sym53c8xx.h	/^#define SCR_DT_DATA_OUT	/;"	d
SCR_ERROR	include/libata.h	/^	SCR_ERROR		= 1,$/;"	e	enum:__anoneacac85b0103
SCR_FROM_REG	include/sym53c8xx.h	/^#define	SCR_FROM_REG(/;"	d
SCR_ID	include/sym53c8xx.h	/^#define SCR_ID(/;"	d
SCR_ILG_IN	include/sym53c8xx.h	/^#define SCR_ILG_IN	/;"	d
SCR_ILG_OUT	include/sym53c8xx.h	/^#define SCR_ILG_OUT	/;"	d
SCR_INT	include/sym53c8xx.h	/^#define SCR_INT /;"	d
SCR_INT_FLY	include/sym53c8xx.h	/^#define SCR_INT_FLY /;"	d
SCR_JMP_REL	include/sym53c8xx.h	/^#define SCR_JMP_REL /;"	d
SCR_JUMP	include/sym53c8xx.h	/^#define SCR_JUMP /;"	d
SCR_JUMP64	include/sym53c8xx.h	/^#define SCR_JUMP64 /;"	d
SCR_JUMPR	include/sym53c8xx.h	/^#define SCR_JUMPR /;"	d
SCR_LOAD	include/sym53c8xx.h	/^#define      SCR_LOAD /;"	d
SCR_LOAD_ABS	include/sym53c8xx.h	/^#define SCR_LOAD_ABS(/;"	d
SCR_LOAD_ABS_F	include/sym53c8xx.h	/^#define SCR_LOAD_ABS_F(/;"	d
SCR_LOAD_R	include/sym53c8xx.h	/^#define SCR_LOAD_R(/;"	d
SCR_LOAD_REG	include/sym53c8xx.h	/^#define	SCR_LOAD_REG(/;"	d
SCR_LOAD_REL	include/sym53c8xx.h	/^#define SCR_LOAD_REL(/;"	d
SCR_LOAD_REL_F	include/sym53c8xx.h	/^#define SCR_LOAD_REL_F(/;"	d
SCR_LOAD_SFBR	include/sym53c8xx.h	/^#define SCR_LOAD_SFBR(/;"	d
SCR_L_A	board/espt/lowlevel_init.S	/^SCR_L_A:	.long	0xFE800014$/;"	l
SCR_L_A	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_A:		.long	SCR_2$/;"	l
SCR_L_A_D0	board/espt/lowlevel_init.S	/^SCR_L_A_D0:	.long 	0x00000003$/;"	l
SCR_L_A_D1	board/espt/lowlevel_init.S	/^SCR_L_A_D1:	.long 	0x00000002$/;"	l
SCR_L_A_D2	board/espt/lowlevel_init.S	/^SCR_L_A_D2:	.long	0x00000004$/;"	l
SCR_L_CBR	board/espt/lowlevel_init.S	/^SCR_L_CBR:		.long	0x00000004$/;"	l
SCR_L_CKE_EN	board/espt/lowlevel_init.S	/^SCR_L_CKE_EN:	.long	0x00000003$/;"	l
SCR_L_D0	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_D0:		.long	0x3$/;"	l
SCR_L_D1	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_D1:		.long	0x2$/;"	l
SCR_L_D2	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_D2:		.long	0x2$/;"	l
SCR_L_D3	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_D3:		.long	0x4$/;"	l
SCR_L_D4	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_D4:		.long	0x4$/;"	l
SCR_L_D5	board/renesas/r7780mp/lowlevel_init.S	/^SCR_L_D5:		.long	0x0$/;"	l
SCR_L_NOP	board/espt/lowlevel_init.S	/^SCR_L_NOP:		.long	0x00000001$/;"	l
SCR_L_NORMAL	board/espt/lowlevel_init.S	/^SCR_L_NORMAL:	.long	0x00000000$/;"	l
SCR_L_PALL	board/espt/lowlevel_init.S	/^SCR_L_PALL:		.long	0x00000002$/;"	l
SCR_MOVE_ABS	include/sym53c8xx.h	/^#define SCR_MOVE_ABS(/;"	d
SCR_MOVE_IND	include/sym53c8xx.h	/^#define SCR_MOVE_IND(/;"	d
SCR_MOVE_TBL	include/sym53c8xx.h	/^#define SCR_MOVE_TBL /;"	d
SCR_MSG_IN	include/sym53c8xx.h	/^#define SCR_MSG_IN /;"	d
SCR_MSG_OUT	include/sym53c8xx.h	/^#define SCR_MSG_OUT	/;"	d
SCR_NOTIFICATION	include/libata.h	/^	SCR_NOTIFICATION	= 4,$/;"	e	enum:__anoneacac85b0103
SCR_NO_FLUSH	include/sym53c8xx.h	/^#define SCR_NO_FLUSH /;"	d
SCR_NO_FLUSH2	include/sym53c8xx.h	/^#define SCR_NO_FLUSH2	/;"	d
SCR_NO_OP	include/sym53c8xx.h	/^#define SCR_NO_OP /;"	d
SCR_OR	include/sym53c8xx.h	/^#define      SCR_OR /;"	d
SCR_PEX0_4BY1_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX0_4BY1_MASK	/;"	d
SCR_PEX0_4BY1_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX0_4BY1_OFFS	/;"	d
SCR_PEX1_4BY1_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX1_4BY1_MASK	/;"	d
SCR_PEX1_4BY1_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX1_4BY1_OFFS	/;"	d
SCR_PEX_4BY1_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX_4BY1_MASK(/;"	d
SCR_PEX_4BY1_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX_4BY1_OFFS(/;"	d
SCR_PEX_ENA_MASK	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX_ENA_MASK(/;"	d
SCR_PEX_ENA_OFFS	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SCR_PEX_ENA_OFFS(/;"	d
SCR_REG_OFS	include/sym53c8xx.h	/^#define SCR_REG_OFS(/;"	d
SCR_REG_OFS2	include/sym53c8xx.h	/^#define SCR_REG_OFS2(/;"	d
SCR_REG_REG	include/sym53c8xx.h	/^#define SCR_REG_REG(/;"	d
SCR_REG_SFBR	include/sym53c8xx.h	/^#define SCR_REG_SFBR(/;"	d
SCR_RETURN	include/sym53c8xx.h	/^#define SCR_RETURN /;"	d
SCR_SEL_ABS	include/sym53c8xx.h	/^#define	SCR_SEL_ABS	/;"	d
SCR_SEL_ABS_ATN	include/sym53c8xx.h	/^#define	SCR_SEL_ABS_ATN	/;"	d
SCR_SEL_TBL	include/sym53c8xx.h	/^#define	SCR_SEL_TBL	/;"	d
SCR_SEL_TBL_ATN	include/sym53c8xx.h	/^#define	SCR_SEL_TBL_ATN	/;"	d
SCR_SET	include/sym53c8xx.h	/^#define SCR_SET(/;"	d
SCR_SFBR_DATA	include/sym53c8xx.h	/^#define      SCR_SFBR_DATA /;"	d
SCR_SFBR_REG	include/sym53c8xx.h	/^#define SCR_SFBR_REG(/;"	d
SCR_SHL	include/sym53c8xx.h	/^#define      SCR_SHL /;"	d
SCR_SHR	include/sym53c8xx.h	/^#define      SCR_SHR /;"	d
SCR_STATUS	include/libata.h	/^	SCR_STATUS		= 0,$/;"	e	enum:__anoneacac85b0103
SCR_STATUS	include/sym53c8xx.h	/^#define	SCR_STATUS	/;"	d
SCR_STORE_ABS	include/sym53c8xx.h	/^#define SCR_STORE_ABS(/;"	d
SCR_STORE_ABS_F	include/sym53c8xx.h	/^#define SCR_STORE_ABS_F(/;"	d
SCR_STORE_R	include/sym53c8xx.h	/^#define SCR_STORE_R(/;"	d
SCR_STORE_REL	include/sym53c8xx.h	/^#define SCR_STORE_REL(/;"	d
SCR_STORE_REL_F	include/sym53c8xx.h	/^#define SCR_STORE_REL_F(/;"	d
SCR_TO_REG	include/sym53c8xx.h	/^#define	SCR_TO_REG(/;"	d
SCR_TRG	include/sym53c8xx.h	/^#define	SCR_TRG	/;"	d
SCR_U_A	board/espt/lowlevel_init.S	/^SCR_U_A:	.long	0xFE800010$/;"	l
SCR_U_A	board/renesas/r7780mp/lowlevel_init.S	/^SCR_U_A:		.long	SCR_1$/;"	l
SCR_WAIT_DISC	include/sym53c8xx.h	/^#define	SCR_WAIT_DISC	/;"	d
SCR_WAIT_RESEL	include/sym53c8xx.h	/^#define SCR_WAIT_RESEL /;"	d
SCR_XOR	include/sym53c8xx.h	/^#define      SCR_XOR /;"	d
SCSCR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCSCR	/;"	d	file:
SCSCR_CLR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCSCR_CLR	/;"	d	file:
SCSCR_INIT	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCSCR_INIT	/;"	d	file:
SCSCR_INIT	drivers/serial/serial_sh.h	/^# define SCSCR_INIT(/;"	d
SCSC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SCSC_BASE_ADDR	/;"	d
SCSC_SOSC_CTR_SOSC_EN	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SCSC_SOSC_CTR_SOSC_EN /;"	d
SCSI_CHANGE_DEF	include/scsi.h	/^#define SCSI_CHANGE_DEF	/;"	d
SCSI_COMPARE	include/scsi.h	/^#define SCSI_COMPARE	/;"	d
SCSI_COPY	include/scsi.h	/^#define SCSI_COPY	/;"	d
SCSI_COP_VERIFY	include/scsi.h	/^#define SCSI_COP_VERIFY	/;"	d
SCSI_DEV_ID	common/scsi.c	/^#define SCSI_DEV_ID	/;"	d	file:
SCSI_DEV_ID	common/scsi.c	/^#define SCSI_DEV_ID /;"	d	file:
SCSI_DEV_ID	include/configs/ls1043ardb.h	/^#define SCSI_DEV_ID /;"	d
SCSI_DEV_LIST	common/scsi.c	/^#define SCSI_DEV_LIST /;"	d	file:
SCSI_FORMAT	include/scsi.h	/^#define SCSI_FORMAT	/;"	d
SCSI_HNS_TIME_OUT	include/scsi.h	/^#define SCSI_HNS_TIME_OUT	/;"	d
SCSI_IDENTIFY	include/scsi.h	/^#define SCSI_IDENTIFY	/;"	d
SCSI_IDENTIFY	include/sym53c8xx.h	/^#define SCSI_IDENTIFY	/;"	d
SCSI_INQUIRY	include/scsi.h	/^#define SCSI_INQUIRY	/;"	d
SCSI_INT_STATE	include/scsi.h	/^#define SCSI_INT_STATE	/;"	d
SCSI_LBA48_READ	common/scsi.c	/^#define SCSI_LBA48_READ	/;"	d	file:
SCSI_LCK_UN_CAC	include/scsi.h	/^#define SCSI_LCK_UN_CAC	/;"	d
SCSI_LOG_SELECT	include/scsi.h	/^#define SCSI_LOG_SELECT	/;"	d
SCSI_LOG_SENSE	include/scsi.h	/^#define SCSI_LOG_SENSE	/;"	d
SCSI_MAX_READ_BLK	common/scsi.c	/^#define SCSI_MAX_READ_BLK /;"	d	file:
SCSI_MAX_RETRY	drivers/block/sym53c8xx.c	/^#define SCSI_MAX_RETRY /;"	d	file:
SCSI_MAX_RETRY_NOT_READY	drivers/block/sym53c8xx.c	/^#define SCSI_MAX_RETRY_NOT_READY /;"	d	file:
SCSI_MAX_WRITE_BLK	common/scsi.c	/^#define SCSI_MAX_WRITE_BLK /;"	d	file:
SCSI_MA_TIME_OUT	include/scsi.h	/^#define SCSI_MA_TIME_OUT	/;"	d
SCSI_MED_REMOVL	include/scsi.h	/^#define SCSI_MED_REMOVL	/;"	d
SCSI_MODE_SEL10	include/scsi.h	/^#define SCSI_MODE_SEL10	/;"	d
SCSI_MODE_SEL6	include/scsi.h	/^#define SCSI_MODE_SEL6	/;"	d
SCSI_MODE_SEN10	include/scsi.h	/^#define SCSI_MODE_SEN10	/;"	d
SCSI_MODE_SEN6	include/scsi.h	/^#define SCSI_MODE_SEN6	/;"	d
SCSI_NOT_READY_TIME_OUT	drivers/block/sym53c8xx.c	/^#define SCSI_NOT_READY_TIME_OUT /;"	d	file:
SCSI_PREFETCH	include/scsi.h	/^#define SCSI_PREFETCH	/;"	d
SCSI_RCV_DIAG	include/scsi.h	/^#define SCSI_RCV_DIAG	/;"	d
SCSI_RD_CAPAC	include/scsi.h	/^#define SCSI_RD_CAPAC	/;"	d
SCSI_RD_CAPAC10	include/scsi.h	/^#define SCSI_RD_CAPAC10	/;"	d
SCSI_RD_CAPAC16	include/scsi.h	/^#define SCSI_RD_CAPAC16	/;"	d
SCSI_RD_DEFECT	include/scsi.h	/^#define SCSI_RD_DEFECT	/;"	d
SCSI_READ10	include/scsi.h	/^#define SCSI_READ10	/;"	d
SCSI_READ16	include/scsi.h	/^#define SCSI_READ16	/;"	d
SCSI_READ6	include/scsi.h	/^#define SCSI_READ6	/;"	d
SCSI_READ_BUFF	include/scsi.h	/^#define SCSI_READ_BUFF	/;"	d
SCSI_READ_LONG	include/scsi.h	/^#define SCSI_READ_LONG	/;"	d
SCSI_REASS_BLK	include/scsi.h	/^#define SCSI_REASS_BLK	/;"	d
SCSI_RELEASE	include/scsi.h	/^#define SCSI_RELEASE	/;"	d
SCSI_REQ_SENSE	include/scsi.h	/^#define SCSI_REQ_SENSE	/;"	d
SCSI_REZERO	include/scsi.h	/^#define SCSI_REZERO	/;"	d
SCSI_SEEK10	include/scsi.h	/^#define SCSI_SEEK10	/;"	d
SCSI_SEEK6	include/scsi.h	/^#define SCSI_SEEK6	/;"	d
SCSI_SEL_TIME_OUT	include/scsi.h	/^#define SCSI_SEL_TIME_OUT	/;"	d
SCSI_SEND_DIAG	include/scsi.h	/^#define SCSI_SEND_DIAG	/;"	d
SCSI_SET_LIMIT	include/scsi.h	/^#define SCSI_SET_LIMIT	/;"	d
SCSI_SRCH_DAT_E	include/scsi.h	/^#define SCSI_SRCH_DAT_E	/;"	d
SCSI_SRCH_DAT_H	include/scsi.h	/^#define SCSI_SRCH_DAT_H	/;"	d
SCSI_SRCH_DAT_L	include/scsi.h	/^#define SCSI_SRCH_DAT_L	/;"	d
SCSI_START_STP	include/scsi.h	/^#define SCSI_START_STP	/;"	d
SCSI_SYNC_CACHE	include/scsi.h	/^#define SCSI_SYNC_CACHE	/;"	d
SCSI_TST_U_RDY	include/scsi.h	/^#define SCSI_TST_U_RDY	/;"	d
SCSI_UNEXP_DIS	include/scsi.h	/^#define SCSI_UNEXP_DIS	/;"	d
SCSI_VEND_ID	common/scsi.c	/^#define SCSI_VEND_ID	/;"	d	file:
SCSI_VEND_ID	common/scsi.c	/^#define SCSI_VEND_ID /;"	d	file:
SCSI_VEND_ID	include/configs/ls1043ardb.h	/^#define SCSI_VEND_ID /;"	d
SCSI_VERIFY	include/scsi.h	/^#define SCSI_VERIFY	/;"	d
SCSI_WRITE10	include/scsi.h	/^#define SCSI_WRITE10	/;"	d
SCSI_WRITE6	include/scsi.h	/^#define SCSI_WRITE6	/;"	d
SCSI_WRITE_BUFF	include/scsi.h	/^#define SCSI_WRITE_BUFF	/;"	d
SCSI_WRITE_LONG	include/scsi.h	/^#define SCSI_WRITE_LONG	/;"	d
SCSI_WRITE_SAME	include/scsi.h	/^#define SCSI_WRITE_SAME	/;"	d
SCSI_WRT_VERIFY	include/scsi.h	/^#define SCSI_WRT_VERIFY	/;"	d
SCSI_cmd_block	include/scsi.h	/^typedef struct SCSI_cmd_block{$/;"	s
SCSMR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCSMR	/;"	d	file:
SCSMR0	arch/sh/include/asm/cpu_sh7763.h	/^#define SCSMR0	/;"	d
SCSMR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SCSMR0	/;"	d
SCSMR1	arch/sh/include/asm/cpu_sh7750.h	/^#define SCSMR1	/;"	d
SCSMR1	arch/sh/include/asm/cpu_sh7763.h	/^#define SCSMR1	/;"	d
SCSMR2	arch/sh/include/asm/cpu_sh7750.h	/^#define SCSMR2	/;"	d
SCSMR2	arch/sh/include/asm/cpu_sh7763.h	/^#define SCSMR2	/;"	d
SCSMR_0	arch/sh/include/asm/cpu_sh7203.h	/^#define SCSMR_0	/;"	d
SCSMR_0	arch/sh/include/asm/cpu_sh7269.h	/^#define SCSMR_0	/;"	d
SCSMR_0	arch/sh/include/asm/cpu_sh7710.h	/^#define SCSMR_0	/;"	d
SCSMR_1	arch/sh/include/asm/cpu_sh7269.h	/^#define SCSMR_1	/;"	d
SCSMR_2	arch/sh/include/asm/cpu_sh7269.h	/^#define SCSMR_2	/;"	d
SCSMR_2	arch/sh/include/asm/cpu_sh7706.h	/^#define SCSMR_2	/;"	d
SCSMR_3	arch/sh/include/asm/cpu_sh7264.h	/^#define SCSMR_3	/;"	d
SCSMR_3	arch/sh/include/asm/cpu_sh7269.h	/^#define SCSMR_3	/;"	d
SCSMR_7	arch/sh/include/asm/cpu_sh7269.h	/^#define SCSMR_7	/;"	d
SCSMR_INIT	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SCSMR_INIT	/;"	d	file:
SCSMR_Ir	drivers/serial/serial_sh.h	/^# define SCSMR_Ir	/;"	d
SCSPTR	drivers/serial/serial_sh.h	/^# define SCSPTR\\/;"	d
SCSPTR0	drivers/serial/serial_sh.h	/^# define SCSPTR0	/;"	d
SCSPTR0	drivers/serial/serial_sh.h	/^# define SCSPTR0 /;"	d
SCSPTR1	drivers/serial/serial_sh.h	/^# define SCSPTR1	/;"	d
SCSPTR1	drivers/serial/serial_sh.h	/^# define SCSPTR1 /;"	d
SCSPTR2	drivers/serial/serial_sh.h	/^# define SCSPTR2	/;"	d
SCSPTR2	drivers/serial/serial_sh.h	/^# define SCSPTR2 /;"	d
SCSPTR3	drivers/serial/serial_sh.h	/^# define SCSPTR3	/;"	d
SCSPTR3	drivers/serial/serial_sh.h	/^# define SCSPTR3 /;"	d
SCSPTR4	drivers/serial/serial_sh.h	/^#  define SCSPTR4 /;"	d
SCSPTR4	drivers/serial/serial_sh.h	/^# define SCSPTR4	/;"	d
SCSPTR4	drivers/serial/serial_sh.h	/^# define SCSPTR4 /;"	d
SCSPTR5	drivers/serial/serial_sh.h	/^#  define SCSPTR5 /;"	d
SCSPTR5	drivers/serial/serial_sh.h	/^# define SCSPTR5	/;"	d
SCSPTR5	drivers/serial/serial_sh.h	/^# define SCSPTR5 /;"	d
SCSPTR6	drivers/serial/serial_sh.h	/^#  define SCSPTR6 /;"	d
SCSPTR6	drivers/serial/serial_sh.h	/^# define SCSPTR6 /;"	d
SCSPTR7	drivers/serial/serial_sh.h	/^#  define SCSPTR7 /;"	d
SCSPTR7	drivers/serial/serial_sh.h	/^# define SCSPTR7 /;"	d
SCTLE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SCTLE	/;"	d
SCTL_BASE	include/configs/vexpress_common.h	/^#define SCTL_BASE	/;"	d
SCTP_V4_FLOW	include/linux/ethtool.h	/^#define	SCTP_V4_FLOW	/;"	d
SCTP_V6_FLOW	include/linux/ethtool.h	/^#define	SCTP_V6_FLOW	/;"	d
SCTR_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define SCTR_BASE_ADDR	/;"	d
SCTR_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SCTR_BASE_ADDR /;"	d
SCTS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define SCTS	/;"	d
SCUPER_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUPER_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SCUPER_RESET	/;"	d
SCUTIMER_CONTROL_AUTO_RELOAD_MASK	arch/arm/mach-zynq/timer.c	/^#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK	/;"	d	file:
SCUTIMER_CONTROL_ENABLE_MASK	arch/arm/mach-zynq/timer.c	/^#define SCUTIMER_CONTROL_ENABLE_MASK	/;"	d	file:
SCUTIMER_CONTROL_PRESCALER_MASK	arch/arm/mach-zynq/timer.c	/^#define SCUTIMER_CONTROL_PRESCALER_MASK	/;"	d	file:
SCUTIMER_CONTROL_PRESCALER_SHIFT	arch/arm/mach-zynq/timer.c	/^#define SCUTIMER_CONTROL_PRESCALER_SHIFT	/;"	d	file:
SCU_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SCU_BASE_ADDR /;"	d
SCU_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SCU_BASE_ADDR /;"	d
SCU_CONF	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_CONF	/;"	d
SCU_CTRL	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_CTRL	/;"	d
SCU_CTRL_ENABLE	arch/arm/include/asm/arch-tegra/scu.h	/^#define SCU_CTRL_ENABLE	/;"	d
SCU_ENABLE	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_ENABLE	/;"	d
SCU_FILTER_END	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_FILTER_END	/;"	d
SCU_FILTER_START	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_FILTER_START	/;"	d
SCU_GLOBAL_TIMER_AUTO_INC	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_AUTO_INC	/;"	d
SCU_GLOBAL_TIMER_AUTO_INC	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_AUTO_INC	/;"	d
SCU_GLOBAL_TIMER_AUTO_INC	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_AUTO_INC	/;"	d
SCU_GLOBAL_TIMER_AUTO_INC	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_AUTO_INC	/;"	d
SCU_GLOBAL_TIMER_AUTO_INC	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_AUTO_INC	/;"	d
SCU_GLOBAL_TIMER_CONTROL	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_CONTROL	/;"	d
SCU_GLOBAL_TIMER_CONTROL	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_CONTROL	/;"	d
SCU_GLOBAL_TIMER_CONTROL	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_CONTROL	/;"	d
SCU_GLOBAL_TIMER_CONTROL	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_CONTROL	/;"	d
SCU_GLOBAL_TIMER_CONTROL	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_CONTROL	/;"	d
SCU_GLOBAL_TIMER_COUNT_L32	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_L32	/;"	d
SCU_GLOBAL_TIMER_COUNT_L32	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_L32	/;"	d
SCU_GLOBAL_TIMER_COUNT_L32	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_L32	/;"	d
SCU_GLOBAL_TIMER_COUNT_L32	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_L32	/;"	d
SCU_GLOBAL_TIMER_COUNT_L32	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_L32	/;"	d
SCU_GLOBAL_TIMER_COUNT_U32	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_U32	/;"	d
SCU_GLOBAL_TIMER_COUNT_U32	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_U32	/;"	d
SCU_GLOBAL_TIMER_COUNT_U32	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_U32	/;"	d
SCU_GLOBAL_TIMER_COUNT_U32	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_U32	/;"	d
SCU_GLOBAL_TIMER_COUNT_U32	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SCU_GLOBAL_TIMER_COUNT_U32	/;"	d
SCU_INV_ALL	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_INV_ALL	/;"	d
SCU_OFFSET	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_OFFSET	/;"	d
SCU_PSMR_CL	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_CL	/;"	d
SCU_PSMR_CL	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_CL	/;"	d
SCU_PSMR_CL	include/commproc.h	/^#define SCU_PSMR_CL	/;"	d
SCU_PSMR_DRT	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_DRT	/;"	d
SCU_PSMR_DRT	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_DRT	/;"	d
SCU_PSMR_DRT	include/commproc.h	/^#define SCU_PSMR_DRT	/;"	d
SCU_PSMR_FLC	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_FLC	/;"	d
SCU_PSMR_FLC	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_FLC	/;"	d
SCU_PSMR_FLC	include/commproc.h	/^#define SCU_PSMR_FLC	/;"	d
SCU_PSMR_FRZ	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_FRZ	/;"	d
SCU_PSMR_FRZ	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_FRZ	/;"	d
SCU_PSMR_FRZ	include/commproc.h	/^#define SCU_PSMR_FRZ	/;"	d
SCU_PSMR_PEN	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_PEN	/;"	d
SCU_PSMR_PEN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_PEN	/;"	d
SCU_PSMR_PEN	include/commproc.h	/^#define SCU_PSMR_PEN	/;"	d
SCU_PSMR_REVP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_REVP	/;"	d
SCU_PSMR_REVP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_REVP	/;"	d
SCU_PSMR_REVP	include/commproc.h	/^#define SCU_PSMR_REVP	/;"	d
SCU_PSMR_RPM	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_RPM	/;"	d
SCU_PSMR_RPM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_RPM	/;"	d
SCU_PSMR_RPM	include/commproc.h	/^#define SCU_PSMR_RPM	/;"	d
SCU_PSMR_RZS	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_RZS	/;"	d
SCU_PSMR_RZS	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_RZS	/;"	d
SCU_PSMR_RZS	include/commproc.h	/^#define SCU_PSMR_RZS	/;"	d
SCU_PSMR_SL	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_SL	/;"	d
SCU_PSMR_SL	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_SL	/;"	d
SCU_PSMR_SL	include/commproc.h	/^#define SCU_PSMR_SL	/;"	d
SCU_PSMR_SYN	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_SYN	/;"	d
SCU_PSMR_SYN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_SYN	/;"	d
SCU_PSMR_SYN	include/commproc.h	/^#define SCU_PSMR_SYN	/;"	d
SCU_PSMR_TEVP	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_TEVP	/;"	d
SCU_PSMR_TEVP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_TEVP	/;"	d
SCU_PSMR_TEVP	include/commproc.h	/^#define SCU_PSMR_TEVP	/;"	d
SCU_PSMR_TPM	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_TPM	/;"	d
SCU_PSMR_TPM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_TPM	/;"	d
SCU_PSMR_TPM	include/commproc.h	/^#define SCU_PSMR_TPM	/;"	d
SCU_PSMR_UM	arch/powerpc/include/asm/cpm_8260.h	/^#define SCU_PSMR_UM	/;"	d
SCU_PSMR_UM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SCU_PSMR_UM	/;"	d
SCU_PSMR_UM	include/commproc.h	/^#define SCU_PSMR_UM	/;"	d
SCU_PWR_STATUS	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_PWR_STATUS	/;"	d
SCU_SAC	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_SAC	/;"	d
SCU_SNSAC	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_SNSAC	/;"	d
SCU_STANDBY_ENABLE	arch/arm/mach-uniphier/arm32/arm-mpcore.h	/^#define SCU_STANDBY_ENABLE	/;"	d
SC_A2PLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_A2PLLCTRL	/;"	d
SC_ARB	board/armltd/integrator/integrator-sc.h	/^#define SC_ARB /;"	d
SC_ARB_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_ARB_OFFSET	/;"	d
SC_BASE	board/armltd/integrator/integrator-sc.h	/^#define SC_BASE	/;"	d
SC_BASE_ADDR	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_BASE_ADDR	/;"	d
SC_BASE_ADDR	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_BASE_ADDR	/;"	d
SC_BOTTOM	include/radeon.h	/^#define SC_BOTTOM	/;"	d
SC_BOTTOM_RIGHT	include/radeon.h	/^#define SC_BOTTOM_RIGHT	/;"	d
SC_CA53_GEARSET	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CA53_GEARSET	/;"	d
SC_CA53_GEARST	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CA53_GEARST	/;"	d
SC_CA53_GEARUPD	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CA53_GEARUPD	/;"	d
SC_CA72_GEARSET	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CA72_GEARSET	/;"	d
SC_CA72_GEARST	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CA72_GEARST	/;"	d
SC_CA72_GEARUPD	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CA72_GEARUPD	/;"	d
SC_CA_GEARUPD	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CA_GEARUPD	/;"	d
SC_CLKCTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL	/;"	d
SC_CLKCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CLKCTRL	/;"	d
SC_CLKCTRL3	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CLKCTRL3	/;"	d
SC_CLKCTRL4	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL4	/;"	d
SC_CLKCTRL4	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CLKCTRL4	/;"	d
SC_CLKCTRL4_CEN_UMC0	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL4_CEN_UMC0	/;"	d
SC_CLKCTRL4_CEN_UMC1	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL4_CEN_UMC1	/;"	d
SC_CLKCTRL4_CEN_UMC2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL4_CEN_UMC2	/;"	d
SC_CLKCTRL4_CEN_UMCSB	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL4_CEN_UMCSB	/;"	d
SC_CLKCTRL4_ETHER	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL4_ETHER	/;"	d
SC_CLKCTRL4_MIO	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL4_MIO	/;"	d
SC_CLKCTRL4_NAND	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL4_NAND	/;"	d
SC_CLKCTRL4_PERI	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL4_PERI	/;"	d
SC_CLKCTRL4_STDMAC	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL4_STDMAC	/;"	d
SC_CLKCTRL5	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CLKCTRL5	/;"	d
SC_CLKCTRL6	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CLKCTRL6	/;"	d
SC_CLKCTRL7	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CLKCTRL7	/;"	d
SC_CLKCTRL7_UMC30	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL7_UMC30	/;"	d
SC_CLKCTRL7_UMC31	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL7_UMC31	/;"	d
SC_CLKCTRL7_UMC32	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL7_UMC32	/;"	d
SC_CLKCTRL7_UMCSB	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_CLKCTRL7_UMCSB	/;"	d
SC_CLKCTRL_CEN_ETHER	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_ETHER	/;"	d
SC_CLKCTRL_CEN_GIO	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_GIO	/;"	d
SC_CLKCTRL_CEN_MIO	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_MIO	/;"	d
SC_CLKCTRL_CEN_NAND	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_NAND	/;"	d
SC_CLKCTRL_CEN_PERI	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_PERI	/;"	d
SC_CLKCTRL_CEN_SBC	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_SBC	/;"	d
SC_CLKCTRL_CEN_STDMAC	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_STDMAC	/;"	d
SC_CLKCTRL_CEN_UMC	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_UMC	/;"	d
SC_CLKCTRL_CEN_USB30	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_USB30	/;"	d
SC_CLKCTRL_CEN_USB31	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_CLKCTRL_CEN_USB31	/;"	d
SC_CNTCR_ENABLE	arch/arm/include/asm/imx-common/syscounter.h	/^#define SC_CNTCR_ENABLE	/;"	d
SC_CNTCR_FREQ0	arch/arm/include/asm/imx-common/syscounter.h	/^#define SC_CNTCR_FREQ0	/;"	d
SC_CNTCR_FREQ1	arch/arm/include/asm/imx-common/syscounter.h	/^#define SC_CNTCR_FREQ1	/;"	d
SC_CNTCR_HDBG	arch/arm/include/asm/imx-common/syscounter.h	/^#define SC_CNTCR_HDBG	/;"	d
SC_CPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_CPLLCTRL	/;"	d
SC_CTRLC	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRLC /;"	d
SC_CTRLC_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRLC_OFFSET	/;"	d
SC_CTRLS	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRLS /;"	d
SC_CTRLS_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRLS_OFFSET	/;"	d
SC_CTRL_FLASHVPP	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_FLASHVPP	/;"	d
SC_CTRL_FLASHWP	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_FLASHWP	/;"	d
SC_CTRL_SOFTRESET	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_SOFTRESET	/;"	d
SC_CTRL_UART0DTR	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_UART0DTR	/;"	d
SC_CTRL_UART0RTS	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_UART0RTS	/;"	d
SC_CTRL_UART1DTR	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_UART1DTR	/;"	d
SC_CTRL_UART1RTS	board/armltd/integrator/integrator-sc.h	/^#define SC_CTRL_UART1RTS	/;"	d
SC_DEC	board/armltd/integrator/integrator-sc.h	/^#define SC_DEC /;"	d
SC_DEC_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_DEC_OFFSET	/;"	d
SC_DPLL0CTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_DPLL0CTRL	/;"	d
SC_DPLL1CTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_DPLL1CTRL	/;"	d
SC_DPLL2CTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_DPLL2CTRL	/;"	d
SC_DPLLCTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL	/;"	d
SC_DPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_DPLLCTRL	/;"	d
SC_DPLLCTRL2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL2	/;"	d
SC_DPLLCTRL2_NRSTDS	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL2_NRSTDS	/;"	d
SC_DPLLCTRL3	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL3	/;"	d
SC_DPLLCTRL3_LPFSEL_COEF2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL3_LPFSEL_COEF2	/;"	d
SC_DPLLCTRL3_LPFSEL_COEF3	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL3_LPFSEL_COEF3	/;"	d
SC_DPLLCTRL_FOUTMODE_MASK	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL_FOUTMODE_MASK /;"	d
SC_DPLLCTRL_SSC_EN	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL_SSC_EN	/;"	d
SC_DPLLCTRL_SSC_RATE	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLCTRL_SSC_RATE	/;"	d
SC_DPLLOSCCTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLOSCCTRL	/;"	d
SC_DPLLOSCCTRL_DPLLEN	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLOSCCTRL_DPLLEN	/;"	d
SC_DPLLOSCCTRL_DPLLST	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_DPLLOSCCTRL_DPLLST	/;"	d
SC_DSPLLCTRL2_K_LD	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_DSPLLCTRL2_K_LD	/;"	d	file:
SC_EPIT	drivers/net/sun8i_emac.c	/^#define SC_EPIT	/;"	d	file:
SC_ETCS_EXT_GMII	drivers/net/sun8i_emac.c	/^#define SC_ETCS_EXT_GMII	/;"	d	file:
SC_ETCS_INT_GMII	drivers/net/sun8i_emac.c	/^#define SC_ETCS_INT_GMII	/;"	d	file:
SC_ETCS_MASK	drivers/net/sun8i_emac.c	/^#define SC_ETCS_MASK	/;"	d	file:
SC_FORMAT_UNIT	drivers/usb/gadget/storage_common.c	/^#define SC_FORMAT_UNIT	/;"	d	file:
SC_GPPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_GPPLLCTRL	/;"	d
SC_ID	board/armltd/integrator/integrator-sc.h	/^#define SC_ID /;"	d
SC_ID_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_ID_OFFSET	/;"	d
SC_INQUIRY	drivers/usb/gadget/storage_common.c	/^#define SC_INQUIRY	/;"	d	file:
SC_IRQTIMSET	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_IRQTIMSET	/;"	d
SC_LBFADDR	board/armltd/integrator/integrator-sc.h	/^#define SC_LBFADDR /;"	d
SC_LBFADDR_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_LBFADDR_OFFSET	/;"	d
SC_LBFCODE	board/armltd/integrator/integrator-sc.h	/^#define SC_LBFCODE /;"	d
SC_LBFCODE_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_LBFCODE_OFFSET	/;"	d
SC_LEFT	include/radeon.h	/^#define SC_LEFT	/;"	d
SC_LOCK	board/armltd/integrator/integrator-sc.h	/^#define SC_LOCK /;"	d
SC_LOCK_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_LOCK_OFFSET	/;"	d
SC_MASK	include/bedbug/ppc.h	/^#define SC_MASK /;"	d
SC_MODE_SELECT_10	drivers/usb/gadget/storage_common.c	/^#define SC_MODE_SELECT_10	/;"	d	file:
SC_MODE_SELECT_6	drivers/usb/gadget/storage_common.c	/^#define SC_MODE_SELECT_6	/;"	d	file:
SC_MODE_SENSE_10	drivers/usb/gadget/storage_common.c	/^#define SC_MODE_SENSE_10	/;"	d	file:
SC_MODE_SENSE_6	drivers/usb/gadget/storage_common.c	/^#define SC_MODE_SENSE_6	/;"	d	file:
SC_MPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_MPLLCTRL	/;"	d
SC_OPCODE	include/bedbug/ppc.h	/^#define SC_OPCODE(/;"	d
SC_OSC	board/armltd/integrator/integrator-sc.h	/^#define SC_OSC /;"	d
SC_OSC_DIVXY	board/armltd/integrator/integrator-sc.h	/^#define SC_OSC_DIVXY	/;"	d
SC_OSC_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_OSC_OFFSET	/;"	d
SC_PCI	board/armltd/integrator/integrator-sc.h	/^#define SC_PCI /;"	d
SC_PCI_OFFSET	board/armltd/integrator/integrator-sc.h	/^#define SC_PCI_OFFSET	/;"	d
SC_PCI_PCIBINT_CLR	board/armltd/integrator/integrator-sc.h	/^#define SC_PCI_PCIBINT_CLR	/;"	d
SC_PCI_PCIEN	board/armltd/integrator/integrator-sc.h	/^#define SC_PCI_PCIEN	/;"	d
SC_PLLCTRL2_NRSTDS	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_PLLCTRL2_NRSTDS	/;"	d	file:
SC_PLLCTRL2_SSC_JK_MASK	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_PLLCTRL2_SSC_JK_MASK	/;"	d	file:
SC_PLLCTRL_SSC_DK_MASK	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_PLLCTRL_SSC_DK_MASK	/;"	d	file:
SC_PLLCTRL_SSC_EN	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_PLLCTRL_SSC_EN	/;"	d	file:
SC_PREVENT_ALLOW_MEDIUM_REMOVAL	drivers/usb/gadget/storage_common.c	/^#define SC_PREVENT_ALLOW_MEDIUM_REMOVAL	/;"	d	file:
SC_READ_10	drivers/usb/gadget/storage_common.c	/^#define SC_READ_10	/;"	d	file:
SC_READ_12	drivers/usb/gadget/storage_common.c	/^#define SC_READ_12	/;"	d	file:
SC_READ_6	drivers/usb/gadget/storage_common.c	/^#define SC_READ_6	/;"	d	file:
SC_READ_CAPACITY	drivers/usb/gadget/storage_common.c	/^#define SC_READ_CAPACITY	/;"	d	file:
SC_READ_FORMAT_CAPACITIES	drivers/usb/gadget/storage_common.c	/^#define SC_READ_FORMAT_CAPACITIES	/;"	d	file:
SC_READ_HEADER	drivers/usb/gadget/storage_common.c	/^#define SC_READ_HEADER	/;"	d	file:
SC_READ_TOC	drivers/usb/gadget/storage_common.c	/^#define SC_READ_TOC	/;"	d	file:
SC_RELEASE	drivers/usb/gadget/storage_common.c	/^#define SC_RELEASE	/;"	d	file:
SC_REQUEST_SENSE	drivers/usb/gadget/storage_common.c	/^#define SC_REQUEST_SENSE	/;"	d	file:
SC_RESERVE	drivers/usb/gadget/storage_common.c	/^#define SC_RESERVE	/;"	d	file:
SC_RIGHT	include/radeon.h	/^#define SC_RIGHT	/;"	d
SC_RMII_EN	drivers/net/sun8i_emac.c	/^#define SC_RMII_EN	/;"	d	file:
SC_RSTCTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL	/;"	d
SC_RSTCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_RSTCTRL	/;"	d
SC_RSTCTRL2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL2	/;"	d
SC_RSTCTRL2_NRST_USB3B1	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL2_NRST_USB3B1	/;"	d
SC_RSTCTRL2_NRST_USB3C1	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL2_NRST_USB3C1	/;"	d
SC_RSTCTRL3	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL3	/;"	d
SC_RSTCTRL3	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_RSTCTRL3	/;"	d
SC_RSTCTRL4	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4	/;"	d
SC_RSTCTRL4	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_RSTCTRL4	/;"	d
SC_RSTCTRL4_ETHER	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL4_ETHER	/;"	d
SC_RSTCTRL4_NAND	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL4_NAND	/;"	d
SC_RSTCTRL4_NRST_UMC30	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMC30	/;"	d
SC_RSTCTRL4_NRST_UMC31	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMC31	/;"	d
SC_RSTCTRL4_NRST_UMC32	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMC32	/;"	d
SC_RSTCTRL4_NRST_UMCA0	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMCA0	/;"	d
SC_RSTCTRL4_NRST_UMCA1	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMCA1	/;"	d
SC_RSTCTRL4_NRST_UMCA2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMCA2	/;"	d
SC_RSTCTRL4_NRST_UMCSB	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL4_NRST_UMCSB	/;"	d
SC_RSTCTRL5	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL5	/;"	d
SC_RSTCTRL5	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_RSTCTRL5	/;"	d
SC_RSTCTRL6	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL6	/;"	d
SC_RSTCTRL6	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_RSTCTRL6	/;"	d
SC_RSTCTRL7	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_RSTCTRL7	/;"	d
SC_RSTCTRL7_UMC30	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMC30	/;"	d
SC_RSTCTRL7_UMC31	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMC31	/;"	d
SC_RSTCTRL7_UMC32	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMC32	/;"	d
SC_RSTCTRL7_UMCA0	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMCA0	/;"	d
SC_RSTCTRL7_UMCA1	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMCA1	/;"	d
SC_RSTCTRL7_UMCA2	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMCA2	/;"	d
SC_RSTCTRL7_UMCSB	arch/arm/mach-uniphier/sc64-regs.h	/^#define   SC_RSTCTRL7_UMCSB	/;"	d
SC_RSTCTRL_NRST_ETHER	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_ETHER	/;"	d
SC_RSTCTRL_NRST_GIO	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_GIO	/;"	d
SC_RSTCTRL_NRST_NAND	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_NAND	/;"	d
SC_RSTCTRL_NRST_STDMAC	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_STDMAC	/;"	d
SC_RSTCTRL_NRST_UMC0	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_UMC0	/;"	d
SC_RSTCTRL_NRST_UMC1	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_UMC1	/;"	d
SC_RSTCTRL_NRST_USB3B0	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_USB3B0	/;"	d
SC_RSTCTRL_NRST_USB3C0	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_RSTCTRL_NRST_USB3C0	/;"	d
SC_SEND_DIAGNOSTIC	drivers/usb/gadget/storage_common.c	/^#define SC_SEND_DIAGNOSTIC	/;"	d	file:
SC_SLFRSTCTL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_SLFRSTCTL	/;"	d
SC_SLFRSTSEL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_SLFRSTSEL	/;"	d
SC_SPLL2CTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_SPLL2CTRL	/;"	d
SC_SPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_SPLLCTRL	/;"	d
SC_SR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SC_SR	/;"	d	file:
SC_START_STOP_UNIT	drivers/usb/gadget/storage_common.c	/^#define SC_START_STOP_UNIT	/;"	d	file:
SC_SYNCHRONIZE_CACHE	drivers/usb/gadget/storage_common.c	/^#define SC_SYNCHRONIZE_CACHE	/;"	d	file:
SC_TDR	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define SC_TDR	/;"	d	file:
SC_TEST_UNIT_READY	drivers/usb/gadget/storage_common.c	/^#define SC_TEST_UNIT_READY	/;"	d	file:
SC_TOP	include/radeon.h	/^#define SC_TOP	/;"	d
SC_TOP_LEFT	include/radeon.h	/^#define SC_TOP_LEFT	/;"	d
SC_UPLLCTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_UPLLCTRL	/;"	d
SC_VERIFY	drivers/usb/gadget/storage_common.c	/^#define SC_VERIFY	/;"	d	file:
SC_VPLL27ACTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_VPLL27ACTRL	/;"	d
SC_VPLL27ACTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_VPLL27ACTRL	/;"	d
SC_VPLL27ACTRL2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_VPLL27ACTRL2	/;"	d
SC_VPLL27ACTRL3	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_VPLL27ACTRL3	/;"	d
SC_VPLL27BCTRL	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_VPLL27BCTRL	/;"	d
SC_VPLL27BCTRL2	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_VPLL27BCTRL2	/;"	d
SC_VPLL27BCTRL3	arch/arm/mach-uniphier/sc-regs.h	/^#define SC_VPLL27BCTRL3	/;"	d
SC_VPLL27CTRL3_K_LD	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_VPLL27CTRL3_K_LD	/;"	d	file:
SC_VPLL27CTRL_WP	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^#define SC_VPLL27CTRL_WP	/;"	d	file:
SC_VPLL27FCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_VPLL27FCTRL	/;"	d
SC_VPLL8KCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_VPLL8KCTRL	/;"	d
SC_VPPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_VPPLLCTRL	/;"	d
SC_VSPLLCTRL	arch/arm/mach-uniphier/sc64-regs.h	/^#define SC_VSPLLCTRL	/;"	d
SC_WRITE_10	drivers/usb/gadget/storage_common.c	/^#define SC_WRITE_10	/;"	d	file:
SC_WRITE_12	drivers/usb/gadget/storage_common.c	/^#define SC_WRITE_12	/;"	d	file:
SC_WRITE_6	drivers/usb/gadget/storage_common.c	/^#define SC_WRITE_6	/;"	d	file:
SCxSR_BREAK_CLEAR	drivers/serial/serial_sh.h	/^# define SCxSR_BREAK_CLEAR(/;"	d
SCxSR_BRK	drivers/serial/serial_sh.h	/^#define SCxSR_BRK(/;"	d
SCxSR_ERRORS	drivers/serial/serial_sh.h	/^#define SCxSR_ERRORS(/;"	d
SCxSR_ERROR_CLEAR	drivers/serial/serial_sh.h	/^# define SCxSR_ERROR_CLEAR(/;"	d
SCxSR_FER	drivers/serial/serial_sh.h	/^#define SCxSR_FER(/;"	d
SCxSR_ORER	drivers/serial/serial_sh.h	/^#define SCxSR_ORER(/;"	d
SCxSR_PER	drivers/serial/serial_sh.h	/^#define SCxSR_PER(/;"	d
SCxSR_RDxF	drivers/serial/serial_sh.h	/^#define SCxSR_RDxF(/;"	d
SCxSR_RDxF_CLEAR	drivers/serial/serial_sh.h	/^# define SCxSR_RDxF_CLEAR(/;"	d
SCxSR_TDxE	drivers/serial/serial_sh.h	/^#define SCxSR_TDxE(/;"	d
SCxSR_TDxE_CLEAR	drivers/serial/serial_sh.h	/^# define SCxSR_TDxE_CLEAR(/;"	d
SCxSR_TEND	drivers/serial/serial_sh.h	/^#define SCxSR_TEND(/;"	d
SD	Makefile	/^SD = \/dev\/sdc$/;"	m
SD0_CD_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_CD_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_CD_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_CD_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_DATA2_MARK, SD0_DATA3_MARK, SD0_CD_MARK, SD0_WP_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_CLK_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_CLK_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_CLK_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_CLK_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DATA0_MARK, SD0_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_CMD_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_CMD_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_CMD_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_CMD_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DATA0_MARK, SD0_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_DAT0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT0_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT0_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_DAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_DAT1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT1_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT1_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_DAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_DAT2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT2_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT2_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_DAT2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_DAT3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT3_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_DAT3_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_DAT3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_DAT3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DATA0_MARK, SD0_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_CLK_MARK, SD0_CMD_MARK, SD0_DATA0_MARK, SD0_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_DATA2_MARK, SD0_DATA3_MARK, SD0_CD_MARK, SD0_WP_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_DATA2_MARK, SD0_DATA3_MARK, SD0_CD_MARK, SD0_WP_MARK,$/;"	e	enum:__anona307901d0103	file:
SD0_WP_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_WP_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_WP_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD0_WP_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD0_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
SD0_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK,$/;"	e	enum:__anona307879b0103	file:
SD0_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD0_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD0_DATA2_MARK, SD0_DATA3_MARK, SD0_CD_MARK, SD0_WP_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1CKCR	board/renesas/alt/alt.c	/^#define SD1CKCR	/;"	d	file:
SD1CKCR	board/renesas/gose/gose.c	/^#define SD1CKCR	/;"	d	file:
SD1CKCR	board/renesas/koelsch/koelsch.c	/^#define SD1CKCR	/;"	d	file:
SD1CKCR	board/renesas/silk/silk.c	/^#define SD1CKCR	/;"	d	file:
SD1_97500KHZ	board/renesas/alt/alt.c	/^#define SD1_97500KHZ	/;"	d	file:
SD1_97500KHZ	board/renesas/silk/silk.c	/^#define SD1_97500KHZ	/;"	d	file:
SD1_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	SD1_BOOT,$/;"	e	enum:boot_device
SD1_CD_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_CD_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_CD_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_CD_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_CLK_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_CLK_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_CLK_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_CLK_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CLK_MARK, SD1_CMD_MARK, SD1_DATA0_MARK, SD1_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_CMD_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_CMD_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_CMD_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_CMD_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CLK_MARK, SD1_CMD_MARK, SD1_DATA0_MARK, SD1_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_DAT0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT0_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT0_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_DAT1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT1_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT1_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_DAT2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT2_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT2_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_DAT3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT3_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_DAT3_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_DAT3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CLK_MARK, SD1_CMD_MARK, SD1_DATA0_MARK, SD1_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CLK_MARK, SD1_CMD_MARK, SD1_DATA0_MARK, SD1_DATA1_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_DATA2_MARK, SD1_DATA3_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_DATA3_MARK, IERX_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_DATA2_MARK, SD1_DATA3_MARK,$/;"	e	enum:__anona307901d0103	file:
SD1_WP_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_WP_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_WP_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD1_WP_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD1_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
SD1_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_WP_MARK, PWM1_B_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD1_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2CKCR	board/renesas/gose/gose.c	/^#define SD2CKCR	/;"	d	file:
SD2CKCR	board/renesas/koelsch/koelsch.c	/^#define SD2CKCR	/;"	d	file:
SD2CKCR	board/renesas/lager/lager.c	/^#define SD2CKCR	/;"	d	file:
SD2CKCR	board/renesas/porter/porter.c	/^#define SD2CKCR	/;"	d	file:
SD2CKCR	board/renesas/stout/stout.c	/^#define SD2CKCR	/;"	d	file:
SD2_97500KHZ	board/renesas/lager/lager.c	/^#define SD2_97500KHZ	/;"	d	file:
SD2_97500KHZ	board/renesas/stout/stout.c	/^#define SD2_97500KHZ	/;"	d	file:
SD2_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	SD2_BOOT,$/;"	e	enum:boot_device
SD2_CD_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_CD_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_CD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_CD_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_CLK_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_CLK_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_CLK_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_CLK_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_CMD_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT0_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT0_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_DAT1_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT1_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT1_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT1_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_DAT2_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT2_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT2_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT2_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_DAT3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT3_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT3_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_DAT4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT4_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT5_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT6_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DAT7_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DAT7_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA0_MARK, MMC_D1_MARK, SD2_DATA1_MARK, MMC_D2_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA0_MARK, MMC_D1_MARK, SD2_DATA1_MARK, MMC_D2_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK,$/;"	e	enum:__anona307901d0103	file:
SD2_DRIVER_ENABLE	board/aristainetos/aristainetos-v2.c	/^#define SD2_DRIVER_ENABLE	/;"	d	file:
SD2_DS_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DS_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_DS_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_DS_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD2_WP_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_WP_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_WP_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD2_WP_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SD2_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
SD2_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SD2_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SD3_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	SD3_BOOT,$/;"	e	enum:boot_device
SD3_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_CD_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_CLK_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_CMD_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_DAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT0_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_DAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT1_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_DAT2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT2_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_DAT3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT3_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT4_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT4_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT5_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT5_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT5_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT5_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT6_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT6_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT6_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT6_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT7_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT7_GMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DAT7_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DAT7_IMARK,$/;"	e	enum:__anona307945e0103	file:
SD3_DS_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_DS_MARK,$/;"	e	enum:__anona307945e0103	file:
SD3_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
SD3_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SD3_WP_MARK,$/;"	e	enum:__anona307945e0103	file:
SD4E	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                      SD4E /;"	d
SD4_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	SD4_BOOT,$/;"	e	enum:boot_device
SDA1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA1_CIS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA1_CIS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA1_CIS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_WP_MARK, PWM1_B_MARK, SDA1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona307835a0103	file:
SDA1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA1_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA1_E_MARK, MSIOF2_SYNC_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA2_CIS_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_CIS_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_CIS_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_CIS_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_CIS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,$/;"	e	enum:__anona307835a0103	file:
SDA2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SDA2_D_MARK, MSIOF1_SCK_E_MARK,$/;"	e	enum:__anona307835a0103	file:
SDA2_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA2_D_MARK, MSIOF1_SCK_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA2_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA3_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona307835a0103	file:
SDA3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SDA4_B_MARK, _MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
SDA4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SDA4_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	IRQ4_MARK, HRX1_C_MARK, SDA4_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA6_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA6_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA6_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA6_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDA6_C_MARK,$/;"	e	enum:__anona307945e0103	file:
SDA7_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_VSYNC_N_C_MARK, SDA7_C_MARK, VI1_G5_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona307835a0103	file:
SDA7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDA8_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SDAOVR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SDAOVR	/;"	d
SDASEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SDASEN	/;"	d
SDATA_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDATA_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SDATA_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SDATA_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SDATA_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,$/;"	e	enum:__anona3077f190103	file:
SDA_MASK	board/keymile/km82xx/km82xx.c	/^#define SDA_MASK	/;"	d	file:
SDBP_PWROFF	arch/arm/include/asm/omap_mmc.h	/^#define SDBP_PWROFF	/;"	d
SDBP_PWRON	arch/arm/include/asm/omap_mmc.h	/^#define SDBP_PWRON	/;"	d
SDCARD_BIAS_HIZ_MODE	arch/arm/include/asm/arch-omap5/omap.h	/^#define SDCARD_BIAS_HIZ_MODE	/;"	d
SDCARD_BIAS_PWRDNZ	arch/arm/include/asm/arch-omap5/omap.h	/^#define SDCARD_BIAS_PWRDNZ	/;"	d
SDCARD_CLK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SDCARD_CLK	/;"	d
SDCARD_CMD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SDCARD_CMD	/;"	d
SDCARD_DATA0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SDCARD_DATA0	/;"	d
SDCARD_DATA1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SDCARD_DATA1	/;"	d
SDCARD_DATA2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SDCARD_DATA2	/;"	d
SDCARD_DATA3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SDCARD_DATA3	/;"	d
SDCARD_PBIASLITE_VMODE	arch/arm/include/asm/arch-omap5/omap.h	/^#define SDCARD_PBIASLITE_VMODE	/;"	d
SDCARD_PWRDNZ	arch/arm/include/asm/arch-omap5/omap.h	/^#define SDCARD_PWRDNZ	/;"	d
SDCC_AHB_CBCR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_AHB_CBCR(/;"	d	file:
SDCC_APPS_CBCR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_APPS_CBCR(/;"	d	file:
SDCC_BCR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_BCR(/;"	d	file:
SDCC_CFG_RCGR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_CFG_RCGR(/;"	d	file:
SDCC_CMD_RCGR	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_CMD_RCGR(/;"	d	file:
SDCC_D	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_D(/;"	d	file:
SDCC_M	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_M(/;"	d	file:
SDCC_MCI_HC_MODE	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_HC_MODE /;"	d	file:
SDCC_MCI_POWER	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_POWER /;"	d	file:
SDCC_MCI_POWER_SW_RST	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_POWER_SW_RST /;"	d	file:
SDCC_MCI_STATUS2	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_STATUS2 /;"	d	file:
SDCC_MCI_STATUS2_MCI_ACT	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_STATUS2_MCI_ACT /;"	d	file:
SDCC_MCI_VERSION	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_VERSION /;"	d	file:
SDCC_MCI_VERSION_MAJOR_MASK	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_VERSION_MAJOR_MASK /;"	d	file:
SDCC_MCI_VERSION_MAJOR_SHIFT	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_VERSION_MAJOR_SHIFT /;"	d	file:
SDCC_MCI_VERSION_MINOR_MASK	drivers/mmc/msm_sdhci.c	/^#define SDCC_MCI_VERSION_MINOR_MASK /;"	d	file:
SDCC_N	arch/arm/mach-snapdragon/clock-apq8016.c	/^#define SDCC_N(/;"	d	file:
SDCC_SDHCI_OFFSET	drivers/mmc/msm_sdhci.c	/^#define SDCC_SDHCI_OFFSET /;"	d	file:
SDCFG	arch/arm/mach-davinci/lowlevel_init.S	/^SDCFG:$/;"	l
SDCFG	drivers/net/natsemi.c	/^	SDCFG		= 0x8C$/;"	e	enum:register_offsets	file:
SDCFG_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^SDCFG_VAL:$/;"	l
SDCI	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SDCI	/;"	d
SDCR	arch/sh/include/asm/cpu_sh7710.h	/^#define SDCR	/;"	d
SDCR	arch/sh/include/asm/cpu_sh7720.h	/^#define SDCR	/;"	d
SDCR0_BMS	include/SA-1100.h	/^#define SDCR0_BMS	/;"	d
SDCR0_DblFlg	include/SA-1100.h	/^#define SDCR0_DblFlg	/;"	d
SDCR0_FM0	include/SA-1100.h	/^#define SDCR0_FM0	/;"	d
SDCR0_LBM	include/SA-1100.h	/^#define SDCR0_LBM	/;"	d
SDCR0_NRZ	include/SA-1100.h	/^#define SDCR0_NRZ	/;"	d
SDCR0_RCE	include/SA-1100.h	/^#define SDCR0_RCE	/;"	d
SDCR0_RcFlEdg	include/SA-1100.h	/^#define SDCR0_RcFlEdg	/;"	d
SDCR0_RcRsEdg	include/SA-1100.h	/^#define SDCR0_RcRsEdg	/;"	d
SDCR0_SCD	include/SA-1100.h	/^#define SDCR0_SCD	/;"	d
SDCR0_SCE	include/SA-1100.h	/^#define SDCR0_SCE	/;"	d
SDCR0_SClkIn	include/SA-1100.h	/^#define SDCR0_SClkIn	/;"	d
SDCR0_SClkOut	include/SA-1100.h	/^#define SDCR0_SClkOut	/;"	d
SDCR0_SDF	include/SA-1100.h	/^#define SDCR0_SDF	/;"	d
SDCR0_SDLC	include/SA-1100.h	/^#define SDCR0_SDLC	/;"	d
SDCR0_SUS	include/SA-1100.h	/^#define SDCR0_SUS	/;"	d
SDCR0_SglFlg	include/SA-1100.h	/^#define SDCR0_SglFlg	/;"	d
SDCR0_TCE	include/SA-1100.h	/^#define SDCR0_TCE	/;"	d
SDCR0_TrFlEdg	include/SA-1100.h	/^#define SDCR0_TrFlEdg	/;"	d
SDCR0_TrRsEdg	include/SA-1100.h	/^#define SDCR0_TrRsEdg	/;"	d
SDCR0_UART	include/SA-1100.h	/^#define SDCR0_UART	/;"	d
SDCR1_AAF	include/SA-1100.h	/^#define SDCR1_AAF	/;"	d
SDCR1_AME	include/SA-1100.h	/^#define SDCR1_AME	/;"	d
SDCR1_AbortURn	include/SA-1100.h	/^#define SDCR1_AbortURn	/;"	d
SDCR1_EFrmURn	include/SA-1100.h	/^#define SDCR1_EFrmURn	/;"	d
SDCR1_RAE	include/SA-1100.h	/^#define SDCR1_RAE	/;"	d
SDCR1_RIE	include/SA-1100.h	/^#define SDCR1_RIE	/;"	d
SDCR1_RXE	include/SA-1100.h	/^#define SDCR1_RXE	/;"	d
SDCR1_TIE	include/SA-1100.h	/^#define SDCR1_TIE	/;"	d
SDCR1_TUS	include/SA-1100.h	/^#define SDCR1_TUS	/;"	d
SDCR1_TXE	include/SA-1100.h	/^#define SDCR1_TXE	/;"	d
SDCR2_AMV	include/SA-1100.h	/^#define SDCR2_AMV	/;"	d
SDCR3_BRD	include/SA-1100.h	/^#define SDCR3_BRD	/;"	d
SDCR3_BdRtDiv	include/SA-1100.h	/^#define SDCR3_BdRtDiv(/;"	d
SDCR3_CeilBdRtDiv	include/SA-1100.h	/^#define SDCR3_CeilBdRtDiv(/;"	d
SDCR4_BRD	include/SA-1100.h	/^#define SDCR4_BRD	/;"	d
SDCR4_BdRtDiv	include/SA-1100.h	/^#define SDCR4_BdRtDiv(/;"	d
SDCR4_CeilBdRtDiv	include/SA-1100.h	/^#define SDCR4_CeilBdRtDiv(/;"	d
SDCR_A	board/mpr2/lowlevel_init.S	/^SDCR_A:		.long	BSC_BASE + 0x44$/;"	l
SDCR_A	board/ms7720se/lowlevel_init.S	/^SDCR_A:		.long	BSC_BASE + 0x44$/;"	l
SDCR_A	board/ms7722se/lowlevel_init.S	/^SDCR_A:		.long	SBSC_SDCR$/;"	l
SDCR_A	board/renesas/MigoR/lowlevel_init.S	/^SDCR_A:		.long	SBSC_SDCR$/;"	l
SDCR_A	board/renesas/rsk7203/lowlevel_init.S	/^SDCR_A:		.long 0xFFFC004C$/;"	l
SDCR_A	board/renesas/rsk7264/lowlevel_init.S	/^SDCR_A:		.long 0xFFFC004C$/;"	l
SDCR_A	board/renesas/rsk7269/lowlevel_init.S	/^SDCR_A:		.long 0xFFFC004C$/;"	l
SDCR_BLMR	drivers/net/armada100_fec.h	/^#define SDCR_BLMR /;"	d
SDCR_BLMT	drivers/net/armada100_fec.h	/^#define SDCR_BLMT /;"	d
SDCR_BSZ1	drivers/net/armada100_fec.h	/^#define SDCR_BSZ1 /;"	d
SDCR_BSZ2	drivers/net/armada100_fec.h	/^#define SDCR_BSZ2 /;"	d
SDCR_BSZ4	drivers/net/armada100_fec.h	/^#define SDCR_BSZ4 /;"	d
SDCR_BSZ8	drivers/net/armada100_fec.h	/^#define SDCR_BSZ8 /;"	d
SDCR_BSZ_OFF	drivers/net/armada100_fec.h	/^#define SDCR_BSZ_OFF /;"	d
SDCR_D	board/ms7722se/lowlevel_init.S	/^SDCR_D:		.long	0x00020809$/;"	l
SDCR_D	board/renesas/MigoR/lowlevel_init.S	/^SDCR_D:		.long	0x80160809$/;"	l
SDCR_D	board/renesas/rsk7203/lowlevel_init.S	/^SDCR_D:		.long 0x00000809$/;"	l
SDCR_D	board/renesas/rsk7264/lowlevel_init.S	/^SDCR_D:		.long 0x00000812$/;"	l
SDCR_D	board/renesas/rsk7269/lowlevel_init.S	/^SDCR_D:		.long 0x00000811$/;"	l
SDCR_D1	board/mpr2/lowlevel_init.S	/^SDCR_D1:	.long	0x00000012$/;"	l
SDCR_D1	board/ms7720se/lowlevel_init.S	/^SDCR_D1:	.long	0x00000011$/;"	l
SDCR_D2	board/mpr2/lowlevel_init.S	/^SDCR_D2:	.long	0x00000812	\/* refresh *\/$/;"	l
SDCR_D2	board/ms7720se/lowlevel_init.S	/^SDCR_D2:	.long	0x00000811$/;"	l
SDCR_RC_MAX_RETRANS	drivers/net/armada100_fec.h	/^#define SDCR_RC_MAX_RETRANS /;"	d
SDCR_RC_OFF	drivers/net/armada100_fec.h	/^#define SDCR_RC_OFF /;"	d
SDCR_RIFB	drivers/net/armada100_fec.h	/^#define SDCR_RIFB /;"	d
SDCS0_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define SDCS0_SEL	/;"	d
SDCS1_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define SDCS1_SEL	/;"	d
SDCTL0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SDCTL0 /;"	d
SDCTL1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SDCTL1 /;"	d
SDC_BG_POS	drivers/video/mx3fb.c	/^#define SDC_BG_POS	/;"	d	file:
SDC_COM_BG_EN	drivers/video/mx3fb.c	/^#define SDC_COM_BG_EN	/;"	d	file:
SDC_COM_CONF	drivers/video/mx3fb.c	/^#define SDC_COM_CONF	/;"	d	file:
SDC_COM_FG_EN	drivers/video/mx3fb.c	/^#define SDC_COM_FG_EN	/;"	d	file:
SDC_COM_GLB_A	drivers/video/mx3fb.c	/^#define SDC_COM_GLB_A	/;"	d	file:
SDC_COM_GWSEL	drivers/video/mx3fb.c	/^#define SDC_COM_GWSEL	/;"	d	file:
SDC_COM_KEY_COLOR_G	drivers/video/mx3fb.c	/^#define SDC_COM_KEY_COLOR_G	/;"	d	file:
SDC_COM_SHARP	drivers/video/mx3fb.c	/^#define SDC_COM_SHARP	/;"	d	file:
SDC_COM_TFT_COLOR	drivers/video/mx3fb.c	/^#define SDC_COM_TFT_COLOR	/;"	d	file:
SDC_CUR_MAP	drivers/video/mx3fb.c	/^#define SDC_CUR_MAP	/;"	d	file:
SDC_CUR_POS	drivers/video/mx3fb.c	/^#define SDC_CUR_POS	/;"	d	file:
SDC_FG_POS	drivers/video/mx3fb.c	/^#define SDC_FG_POS	/;"	d	file:
SDC_GW_CTRL	drivers/video/mx3fb.c	/^#define SDC_GW_CTRL	/;"	d	file:
SDC_HOR_CONF	drivers/video/mx3fb.c	/^#define SDC_HOR_CONF	/;"	d	file:
SDC_PWM_CTRL	drivers/video/mx3fb.c	/^#define SDC_PWM_CTRL	/;"	d	file:
SDC_RACC	include/faraday/ftpmu010.h	/^	unsigned int	SDC_RACC;	\/* 0xB8 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
SDC_SHARP_CONF_1	drivers/video/mx3fb.c	/^#define SDC_SHARP_CONF_1	/;"	d	file:
SDC_SHARP_CONF_2	drivers/video/mx3fb.c	/^#define SDC_SHARP_CONF_2	/;"	d	file:
SDC_VER_CONF	drivers/video/mx3fb.c	/^#define SDC_VER_CONF	/;"	d	file:
SDC_V_SYNC_WIDTH_L	drivers/video/mx3fb.c	/^#define SDC_V_SYNC_WIDTH_L	/;"	d	file:
SDDR	arch/sh/include/asm/cpu_sh7750.h	/^#define SDDR	/;"	d
SDDRH	arch/sh/include/asm/cpu_sh7722.h	/^#define SDDRH /;"	d
SDDRL	arch/sh/include/asm/cpu_sh7722.h	/^#define SDDRL /;"	d
SDDR_DATA	include/SA-1100.h	/^#define SDDR_DATA	/;"	d
SDEASE	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SDEASE	/;"	d
SDENC_CPG_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDENC_CPG_MARK,		SDENC_DV_CLKI_MARK,$/;"	e	enum:__anona304c1340103	file:
SDENC_DV_CLKI_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDENC_CPG_MARK,		SDENC_DV_CLKI_MARK,$/;"	e	enum:__anona304c1340103	file:
SDFALLTIME	drivers/usb/eth/r8152.h	/^#define SDFALLTIME	/;"	d
SDHC1_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define SDHC1_BASE_ADDR	/;"	d
SDHC2_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define SDHC2_BASE_ADDR	/;"	d
SDHCDCR_CD_INV	arch/powerpc/include/asm/immap_85xx.h	/^#define SDHCDCR_CD_INV	/;"	d
SDHCI_ACMD12_ERR	include/sdhci.h	/^#define SDHCI_ACMD12_ERR	/;"	d
SDHCI_ADMA_ADDRESS	include/sdhci.h	/^#define SDHCI_ADMA_ADDRESS	/;"	d
SDHCI_ADMA_ERROR	include/sdhci.h	/^#define SDHCI_ADMA_ERROR	/;"	d
SDHCI_ARGUMENT	include/sdhci.h	/^#define SDHCI_ARGUMENT	/;"	d
SDHCI_BLOCK_COUNT	include/sdhci.h	/^#define SDHCI_BLOCK_COUNT	/;"	d
SDHCI_BLOCK_GAP_CONTROL	include/sdhci.h	/^#define SDHCI_BLOCK_GAP_CONTROL	/;"	d
SDHCI_BLOCK_SIZE	include/sdhci.h	/^#define SDHCI_BLOCK_SIZE	/;"	d
SDHCI_BUFFER	include/sdhci.h	/^#define SDHCI_BUFFER	/;"	d
SDHCI_CAN_64BIT	include/sdhci.h	/^#define  SDHCI_CAN_64BIT	/;"	d
SDHCI_CAN_DO_8BIT	include/sdhci.h	/^#define  SDHCI_CAN_DO_8BIT	/;"	d
SDHCI_CAN_DO_ADMA1	include/sdhci.h	/^#define  SDHCI_CAN_DO_ADMA1	/;"	d
SDHCI_CAN_DO_ADMA2	include/sdhci.h	/^#define  SDHCI_CAN_DO_ADMA2	/;"	d
SDHCI_CAN_DO_HISPD	include/sdhci.h	/^#define  SDHCI_CAN_DO_HISPD	/;"	d
SDHCI_CAN_DO_SDMA	include/sdhci.h	/^#define  SDHCI_CAN_DO_SDMA	/;"	d
SDHCI_CAN_VDD_180	include/sdhci.h	/^#define  SDHCI_CAN_VDD_180	/;"	d
SDHCI_CAN_VDD_300	include/sdhci.h	/^#define  SDHCI_CAN_VDD_300	/;"	d
SDHCI_CAN_VDD_330	include/sdhci.h	/^#define  SDHCI_CAN_VDD_330	/;"	d
SDHCI_CAPABILITIES	include/sdhci.h	/^#define SDHCI_CAPABILITIES	/;"	d
SDHCI_CAPABILITIES_1	include/sdhci.h	/^#define SDHCI_CAPABILITIES_1	/;"	d
SDHCI_CARD_DETECT_PIN_LEVEL	include/sdhci.h	/^#define  SDHCI_CARD_DETECT_PIN_LEVEL	/;"	d
SDHCI_CARD_PRESENT	include/sdhci.h	/^#define  SDHCI_CARD_PRESENT	/;"	d
SDHCI_CARD_STATE_STABLE	include/sdhci.h	/^#define  SDHCI_CARD_STATE_STABLE	/;"	d
SDHCI_CLOCK_BASE_MASK	include/sdhci.h	/^#define  SDHCI_CLOCK_BASE_MASK	/;"	d
SDHCI_CLOCK_BASE_SHIFT	include/sdhci.h	/^#define  SDHCI_CLOCK_BASE_SHIFT	/;"	d
SDHCI_CLOCK_CARD_EN	include/sdhci.h	/^#define  SDHCI_CLOCK_CARD_EN	/;"	d
SDHCI_CLOCK_CONTROL	include/sdhci.h	/^#define SDHCI_CLOCK_CONTROL	/;"	d
SDHCI_CLOCK_INT_EN	include/sdhci.h	/^#define  SDHCI_CLOCK_INT_EN	/;"	d
SDHCI_CLOCK_INT_STABLE	include/sdhci.h	/^#define  SDHCI_CLOCK_INT_STABLE	/;"	d
SDHCI_CLOCK_MUL_MASK	include/sdhci.h	/^#define  SDHCI_CLOCK_MUL_MASK	/;"	d
SDHCI_CLOCK_MUL_SHIFT	include/sdhci.h	/^#define  SDHCI_CLOCK_MUL_SHIFT	/;"	d
SDHCI_CLOCK_V3_BASE_MASK	include/sdhci.h	/^#define  SDHCI_CLOCK_V3_BASE_MASK	/;"	d
SDHCI_CMD_ABORTCMD	include/sdhci.h	/^#define  SDHCI_CMD_ABORTCMD	/;"	d
SDHCI_CMD_CRC	include/sdhci.h	/^#define  SDHCI_CMD_CRC	/;"	d
SDHCI_CMD_DATA	include/sdhci.h	/^#define  SDHCI_CMD_DATA	/;"	d
SDHCI_CMD_DEFAULT_TIMEOUT	drivers/mmc/sdhci.c	/^#define SDHCI_CMD_DEFAULT_TIMEOUT	/;"	d	file:
SDHCI_CMD_INDEX	include/sdhci.h	/^#define  SDHCI_CMD_INDEX	/;"	d
SDHCI_CMD_INHIBIT	include/sdhci.h	/^#define  SDHCI_CMD_INHIBIT	/;"	d
SDHCI_CMD_MAX_TIMEOUT	drivers/mmc/sdhci.c	/^#define SDHCI_CMD_MAX_TIMEOUT	/;"	d	file:
SDHCI_CMD_RESP_LONG	include/sdhci.h	/^#define  SDHCI_CMD_RESP_LONG	/;"	d
SDHCI_CMD_RESP_MASK	include/sdhci.h	/^#define  SDHCI_CMD_RESP_MASK	/;"	d
SDHCI_CMD_RESP_NONE	include/sdhci.h	/^#define  SDHCI_CMD_RESP_NONE	/;"	d
SDHCI_CMD_RESP_SHORT	include/sdhci.h	/^#define  SDHCI_CMD_RESP_SHORT	/;"	d
SDHCI_CMD_RESP_SHORT_BUSY	include/sdhci.h	/^#define  SDHCI_CMD_RESP_SHORT_BUSY /;"	d
SDHCI_COMMAND	include/sdhci.h	/^#define SDHCI_COMMAND	/;"	d
SDHCI_CONTROL2	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CONTROL2	/;"	d
SDHCI_CONTROL2	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CONTROL2	/;"	d
SDHCI_CONTROL3	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CONTROL3	/;"	d
SDHCI_CONTROL3	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CONTROL3	/;"	d
SDHCI_CONTROL4	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CONTROL4	/;"	d
SDHCI_CONTROL4	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CONTROL4	/;"	d
SDHCI_CORECTRL_EN	drivers/mmc/kona_sdhci.c	/^#define SDHCI_CORECTRL_EN	/;"	d	file:
SDHCI_CORECTRL_OFFSET	drivers/mmc/kona_sdhci.c	/^#define SDHCI_CORECTRL_OFFSET	/;"	d	file:
SDHCI_CORECTRL_RESET	drivers/mmc/kona_sdhci.c	/^#define SDHCI_CORECTRL_RESET	/;"	d	file:
SDHCI_COREIMR_IP	drivers/mmc/kona_sdhci.c	/^#define SDHCI_COREIMR_IP	/;"	d	file:
SDHCI_COREIMR_OFFSET	drivers/mmc/kona_sdhci.c	/^#define SDHCI_COREIMR_OFFSET	/;"	d	file:
SDHCI_CORESTAT_CD_SW	drivers/mmc/kona_sdhci.c	/^#define SDHCI_CORESTAT_CD_SW	/;"	d	file:
SDHCI_CORESTAT_OFFSET	drivers/mmc/kona_sdhci.c	/^#define SDHCI_CORESTAT_OFFSET	/;"	d	file:
SDHCI_CTRL2_CDINVRXD3	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_CDINVRXD3	/;"	d
SDHCI_CTRL2_CDINVRXD3	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_CDINVRXD3	/;"	d
SDHCI_CTRL2_DFCNT_MASK	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_DFCNT_MASK(/;"	d
SDHCI_CTRL2_DFCNT_MASK	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_DFCNT_MASK(/;"	d
SDHCI_CTRL2_DFCNT_SHIFT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_DFCNT_SHIFT	/;"	d
SDHCI_CTRL2_DFCNT_SHIFT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_DFCNT_SHIFT	/;"	d
SDHCI_CTRL2_DISBUFRD	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_DISBUFRD	/;"	d
SDHCI_CTRL2_DISBUFRD	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_DISBUFRD	/;"	d
SDHCI_CTRL2_ENBUSYCHKTXSTART	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENBUSYCHKTXSTART	/;"	d
SDHCI_CTRL2_ENBUSYCHKTXSTART	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENBUSYCHKTXSTART	/;"	d
SDHCI_CTRL2_ENCLKOUTHOLD	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENCLKOUTHOLD	/;"	d
SDHCI_CTRL2_ENCLKOUTHOLD	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENCLKOUTHOLD	/;"	d
SDHCI_CTRL2_ENCLKOUTMSKCON	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENCLKOUTMSKCON	/;"	d
SDHCI_CTRL2_ENCLKOUTMSKCON	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENCLKOUTMSKCON	/;"	d
SDHCI_CTRL2_ENCMDCNFMSK	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENCMDCNFMSK	/;"	d
SDHCI_CTRL2_ENCMDCNFMSK	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENCMDCNFMSK	/;"	d
SDHCI_CTRL2_ENFBCLKRX	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENFBCLKRX	/;"	d
SDHCI_CTRL2_ENFBCLKRX	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENFBCLKRX	/;"	d
SDHCI_CTRL2_ENFBCLKTX	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENFBCLKTX	/;"	d
SDHCI_CTRL2_ENFBCLKTX	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENFBCLKTX	/;"	d
SDHCI_CTRL2_ENSTAASYNCCLR	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENSTAASYNCCLR	/;"	d
SDHCI_CTRL2_ENSTAASYNCCLR	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_ENSTAASYNCCLR	/;"	d
SDHCI_CTRL2_FLTCLKSEL	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_FLTCLKSEL(/;"	d
SDHCI_CTRL2_FLTCLKSEL	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_FLTCLKSEL(/;"	d
SDHCI_CTRL2_FLTCLKSEL_MASK	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_FLTCLKSEL_MASK	/;"	d
SDHCI_CTRL2_FLTCLKSEL_MASK	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_FLTCLKSEL_MASK	/;"	d
SDHCI_CTRL2_FLTCLKSEL_SHIFT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_FLTCLKSEL_SHIFT	/;"	d
SDHCI_CTRL2_FLTCLKSEL_SHIFT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_FLTCLKSEL_SHIFT	/;"	d
SDHCI_CTRL2_HWINITFIN	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_HWINITFIN	/;"	d
SDHCI_CTRL2_HWINITFIN	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_HWINITFIN	/;"	d
SDHCI_CTRL2_LVLDAT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_LVLDAT(/;"	d
SDHCI_CTRL2_LVLDAT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_LVLDAT(/;"	d
SDHCI_CTRL2_LVLDAT_MASK	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_LVLDAT_MASK	/;"	d
SDHCI_CTRL2_LVLDAT_MASK	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_LVLDAT_MASK	/;"	d
SDHCI_CTRL2_LVLDAT_SHIFT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_LVLDAT_SHIFT	/;"	d
SDHCI_CTRL2_LVLDAT_SHIFT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_LVLDAT_SHIFT	/;"	d
SDHCI_CTRL2_PWRSYNC	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_PWRSYNC	/;"	d
SDHCI_CTRL2_PWRSYNC	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_PWRSYNC	/;"	d
SDHCI_CTRL2_RWAITMODE	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_RWAITMODE	/;"	d
SDHCI_CTRL2_RWAITMODE	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_RWAITMODE	/;"	d
SDHCI_CTRL2_SDCDSEL	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_SDCDSEL	/;"	d
SDHCI_CTRL2_SDCDSEL	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_SDCDSEL	/;"	d
SDHCI_CTRL2_SDSIGPC	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_SDSIGPC	/;"	d
SDHCI_CTRL2_SDSIGPC	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_SDSIGPC	/;"	d
SDHCI_CTRL2_SELBASECLK_MASK	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_SELBASECLK_MASK(/;"	d
SDHCI_CTRL2_SELBASECLK_MASK	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_SELBASECLK_MASK(/;"	d
SDHCI_CTRL2_SELBASECLK_SHIFT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_SELBASECLK_SHIFT	/;"	d
SDHCI_CTRL2_SELBASECLK_SHIFT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_SELBASECLK_SHIFT	/;"	d
SDHCI_CTRL2_SLCARDOUT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL2_SLCARDOUT	/;"	d
SDHCI_CTRL2_SLCARDOUT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL2_SLCARDOUT	/;"	d
SDHCI_CTRL3_FCSEL0	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL0	/;"	d
SDHCI_CTRL3_FCSEL0	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL0	/;"	d
SDHCI_CTRL3_FCSEL1	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL1	/;"	d
SDHCI_CTRL3_FCSEL1	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL1	/;"	d
SDHCI_CTRL3_FCSEL2	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL2	/;"	d
SDHCI_CTRL3_FCSEL2	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL2	/;"	d
SDHCI_CTRL3_FCSEL3	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL3	/;"	d
SDHCI_CTRL3_FCSEL3	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL3_FCSEL3	/;"	d
SDHCI_CTRL4_DRIVE_MASK	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL4_DRIVE_MASK(/;"	d
SDHCI_CTRL4_DRIVE_MASK	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL4_DRIVE_MASK(/;"	d
SDHCI_CTRL4_DRIVE_SHIFT	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_CTRL4_DRIVE_SHIFT	/;"	d
SDHCI_CTRL4_DRIVE_SHIFT	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define SDHCI_CTRL4_DRIVE_SHIFT	/;"	d
SDHCI_CTRL_4BITBUS	include/sdhci.h	/^#define  SDHCI_CTRL_4BITBUS	/;"	d
SDHCI_CTRL_8BITBUS	include/sdhci.h	/^#define  SDHCI_CTRL_8BITBUS	/;"	d
SDHCI_CTRL_ADMA1	include/sdhci.h	/^#define   SDHCI_CTRL_ADMA1	/;"	d
SDHCI_CTRL_ADMA32	include/sdhci.h	/^#define   SDHCI_CTRL_ADMA32	/;"	d
SDHCI_CTRL_ADMA64	include/sdhci.h	/^#define   SDHCI_CTRL_ADMA64	/;"	d
SDHCI_CTRL_CD_TEST	include/sdhci.h	/^#define  SDHCI_CTRL_CD_TEST	/;"	d
SDHCI_CTRL_CD_TEST_INS	include/sdhci.h	/^#define  SDHCI_CTRL_CD_TEST_INS	/;"	d
SDHCI_CTRL_DMA_MASK	include/sdhci.h	/^#define  SDHCI_CTRL_DMA_MASK	/;"	d
SDHCI_CTRL_HISPD	include/sdhci.h	/^#define  SDHCI_CTRL_HISPD	/;"	d
SDHCI_CTRL_LED	include/sdhci.h	/^#define  SDHCI_CTRL_LED	/;"	d
SDHCI_CTRL_SDMA	include/sdhci.h	/^#define   SDHCI_CTRL_SDMA	/;"	d
SDHCI_DATA_AVAILABLE	include/sdhci.h	/^#define  SDHCI_DATA_AVAILABLE	/;"	d
SDHCI_DATA_INHIBIT	include/sdhci.h	/^#define  SDHCI_DATA_INHIBIT	/;"	d
SDHCI_DEFAULT_BOUNDARY_ARG	include/sdhci.h	/^#define SDHCI_DEFAULT_BOUNDARY_ARG	/;"	d
SDHCI_DEFAULT_BOUNDARY_SIZE	include/sdhci.h	/^#define SDHCI_DEFAULT_BOUNDARY_SIZE	/;"	d
SDHCI_DIVIDER_HI_SHIFT	include/sdhci.h	/^#define  SDHCI_DIVIDER_HI_SHIFT	/;"	d
SDHCI_DIVIDER_SHIFT	include/sdhci.h	/^#define  SDHCI_DIVIDER_SHIFT	/;"	d
SDHCI_DIV_HI_MASK	include/sdhci.h	/^#define  SDHCI_DIV_HI_MASK	/;"	d
SDHCI_DIV_MASK	include/sdhci.h	/^#define  SDHCI_DIV_MASK	/;"	d
SDHCI_DIV_MASK_LEN	include/sdhci.h	/^#define  SDHCI_DIV_MASK_LEN	/;"	d
SDHCI_DMA_ADDRESS	include/sdhci.h	/^#define SDHCI_DMA_ADDRESS	/;"	d
SDHCI_DOING_READ	include/sdhci.h	/^#define  SDHCI_DOING_READ	/;"	d
SDHCI_DOING_WRITE	include/sdhci.h	/^#define  SDHCI_DOING_WRITE	/;"	d
SDHCI_GET_CMD	include/sdhci.h	/^#define SDHCI_GET_CMD(/;"	d
SDHCI_GET_VERSION	include/sdhci.h	/^#define SDHCI_GET_VERSION(/;"	d
SDHCI_HOST_CONTROL	include/sdhci.h	/^#define SDHCI_HOST_CONTROL	/;"	d
SDHCI_HOST_VERSION	include/sdhci.h	/^#define SDHCI_HOST_VERSION	/;"	d
SDHCI_INT_ACMD12ERR	include/sdhci.h	/^#define  SDHCI_INT_ACMD12ERR	/;"	d
SDHCI_INT_ADMA_ERROR	include/sdhci.h	/^#define  SDHCI_INT_ADMA_ERROR	/;"	d
SDHCI_INT_ALL_MASK	include/sdhci.h	/^#define SDHCI_INT_ALL_MASK	/;"	d
SDHCI_INT_BUS_POWER	include/sdhci.h	/^#define  SDHCI_INT_BUS_POWER	/;"	d
SDHCI_INT_CARD_INSERT	include/sdhci.h	/^#define  SDHCI_INT_CARD_INSERT	/;"	d
SDHCI_INT_CARD_INT	include/sdhci.h	/^#define  SDHCI_INT_CARD_INT	/;"	d
SDHCI_INT_CARD_REMOVE	include/sdhci.h	/^#define  SDHCI_INT_CARD_REMOVE	/;"	d
SDHCI_INT_CMD_MASK	include/sdhci.h	/^#define  SDHCI_INT_CMD_MASK	/;"	d
SDHCI_INT_CRC	include/sdhci.h	/^#define  SDHCI_INT_CRC	/;"	d
SDHCI_INT_DATA_AVAIL	include/sdhci.h	/^#define  SDHCI_INT_DATA_AVAIL	/;"	d
SDHCI_INT_DATA_CRC	include/sdhci.h	/^#define  SDHCI_INT_DATA_CRC	/;"	d
SDHCI_INT_DATA_END	include/sdhci.h	/^#define  SDHCI_INT_DATA_END	/;"	d
SDHCI_INT_DATA_END_BIT	include/sdhci.h	/^#define  SDHCI_INT_DATA_END_BIT	/;"	d
SDHCI_INT_DATA_MASK	include/sdhci.h	/^#define  SDHCI_INT_DATA_MASK	/;"	d
SDHCI_INT_DATA_TIMEOUT	include/sdhci.h	/^#define  SDHCI_INT_DATA_TIMEOUT	/;"	d
SDHCI_INT_DMA_END	include/sdhci.h	/^#define  SDHCI_INT_DMA_END	/;"	d
SDHCI_INT_ENABLE	include/sdhci.h	/^#define SDHCI_INT_ENABLE	/;"	d
SDHCI_INT_END_BIT	include/sdhci.h	/^#define  SDHCI_INT_END_BIT	/;"	d
SDHCI_INT_ERROR	include/sdhci.h	/^#define  SDHCI_INT_ERROR	/;"	d
SDHCI_INT_ERROR_MASK	include/sdhci.h	/^#define  SDHCI_INT_ERROR_MASK	/;"	d
SDHCI_INT_INDEX	include/sdhci.h	/^#define  SDHCI_INT_INDEX	/;"	d
SDHCI_INT_NORMAL_MASK	include/sdhci.h	/^#define  SDHCI_INT_NORMAL_MASK	/;"	d
SDHCI_INT_RESPONSE	include/sdhci.h	/^#define  SDHCI_INT_RESPONSE	/;"	d
SDHCI_INT_SPACE_AVAIL	include/sdhci.h	/^#define  SDHCI_INT_SPACE_AVAIL	/;"	d
SDHCI_INT_STATUS	include/sdhci.h	/^#define SDHCI_INT_STATUS	/;"	d
SDHCI_INT_TIMEOUT	include/sdhci.h	/^#define  SDHCI_INT_TIMEOUT	/;"	d
SDHCI_IRQ_EN_BITS	drivers/mmc/fsl_esdhc.c	/^#define SDHCI_IRQ_EN_BITS	/;"	d	file:
SDHCI_MAKE_BLKSZ	include/sdhci.h	/^#define  SDHCI_MAKE_BLKSZ(/;"	d
SDHCI_MAKE_CMD	include/sdhci.h	/^#define SDHCI_MAKE_CMD(/;"	d
SDHCI_MAX_BLOCK_MASK	include/sdhci.h	/^#define  SDHCI_MAX_BLOCK_MASK	/;"	d
SDHCI_MAX_BLOCK_SHIFT	include/sdhci.h	/^#define  SDHCI_MAX_BLOCK_SHIFT /;"	d
SDHCI_MAX_CURRENT	include/sdhci.h	/^#define SDHCI_MAX_CURRENT	/;"	d
SDHCI_MAX_DIV_SPEC_200	include/sdhci.h	/^#define SDHCI_MAX_DIV_SPEC_200	/;"	d
SDHCI_MAX_DIV_SPEC_300	include/sdhci.h	/^#define SDHCI_MAX_DIV_SPEC_300	/;"	d
SDHCI_MAX_HOSTS	arch/arm/mach-exynos/include/mach/mmc.h	/^#define SDHCI_MAX_HOSTS /;"	d
SDHCI_MAX_HOSTS	include/configs/s5p_goni.h	/^#define SDHCI_MAX_HOSTS	/;"	d
SDHCI_POWER_180	include/sdhci.h	/^#define  SDHCI_POWER_180	/;"	d
SDHCI_POWER_300	include/sdhci.h	/^#define  SDHCI_POWER_300	/;"	d
SDHCI_POWER_330	include/sdhci.h	/^#define  SDHCI_POWER_330	/;"	d
SDHCI_POWER_CONTROL	include/sdhci.h	/^#define SDHCI_POWER_CONTROL	/;"	d
SDHCI_POWER_ON	include/sdhci.h	/^#define  SDHCI_POWER_ON	/;"	d
SDHCI_PRESENT_STATE	include/sdhci.h	/^#define SDHCI_PRESENT_STATE	/;"	d
SDHCI_PROG_CLOCK_MODE	include/sdhci.h	/^#define  SDHCI_PROG_CLOCK_MODE /;"	d
SDHCI_QUIRK_32BIT_DMA_ADDR	include/sdhci.h	/^#define SDHCI_QUIRK_32BIT_DMA_ADDR	/;"	d
SDHCI_QUIRK_BROKEN_R1B	include/sdhci.h	/^#define SDHCI_QUIRK_BROKEN_R1B	/;"	d
SDHCI_QUIRK_BROKEN_VOLTAGE	include/sdhci.h	/^#define SDHCI_QUIRK_BROKEN_VOLTAGE	/;"	d
SDHCI_QUIRK_NO_CD	include/sdhci.h	/^#define SDHCI_QUIRK_NO_CD	/;"	d
SDHCI_QUIRK_NO_HISPD_BIT	include/sdhci.h	/^#define SDHCI_QUIRK_NO_HISPD_BIT	/;"	d
SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER	include/sdhci.h	/^#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER /;"	d
SDHCI_QUIRK_REG32_RW	include/sdhci.h	/^#define SDHCI_QUIRK_REG32_RW	/;"	d
SDHCI_QUIRK_USE_WIDE8	include/sdhci.h	/^#define SDHCI_QUIRK_USE_WIDE8	/;"	d
SDHCI_QUIRK_WAIT_SEND_CMD	include/sdhci.h	/^#define SDHCI_QUIRK_WAIT_SEND_CMD	/;"	d
SDHCI_READ_STATUS_TIMEOUT	drivers/mmc/sdhci.c	/^#define SDHCI_READ_STATUS_TIMEOUT	/;"	d	file:
SDHCI_RESET_ALL	include/sdhci.h	/^#define  SDHCI_RESET_ALL	/;"	d
SDHCI_RESET_CMD	include/sdhci.h	/^#define  SDHCI_RESET_CMD	/;"	d
SDHCI_RESET_DATA	include/sdhci.h	/^#define  SDHCI_RESET_DATA	/;"	d
SDHCI_RESPONSE	include/sdhci.h	/^#define SDHCI_RESPONSE	/;"	d
SDHCI_SET_ACMD12_ERROR	include/sdhci.h	/^#define SDHCI_SET_ACMD12_ERROR	/;"	d
SDHCI_SET_INT_ERROR	include/sdhci.h	/^#define SDHCI_SET_INT_ERROR	/;"	d
SDHCI_SIGNAL_ENABLE	include/sdhci.h	/^#define SDHCI_SIGNAL_ENABLE	/;"	d
SDHCI_SLOT_INT_STATUS	include/sdhci.h	/^#define SDHCI_SLOT_INT_STATUS	/;"	d
SDHCI_SOFTWARE_RESET	include/sdhci.h	/^#define SDHCI_SOFTWARE_RESET	/;"	d
SDHCI_SPACE_AVAILABLE	include/sdhci.h	/^#define  SDHCI_SPACE_AVAILABLE	/;"	d
SDHCI_SPEC_100	include/sdhci.h	/^#define   SDHCI_SPEC_100	/;"	d
SDHCI_SPEC_200	include/sdhci.h	/^#define   SDHCI_SPEC_200	/;"	d
SDHCI_SPEC_300	include/sdhci.h	/^#define   SDHCI_SPEC_300	/;"	d
SDHCI_SPEC_VER_MASK	include/sdhci.h	/^#define  SDHCI_SPEC_VER_MASK	/;"	d
SDHCI_SPEC_VER_SHIFT	include/sdhci.h	/^#define  SDHCI_SPEC_VER_SHIFT	/;"	d
SDHCI_TIMEOUT_CLK_MASK	include/sdhci.h	/^#define  SDHCI_TIMEOUT_CLK_MASK	/;"	d
SDHCI_TIMEOUT_CLK_SHIFT	include/sdhci.h	/^#define  SDHCI_TIMEOUT_CLK_SHIFT /;"	d
SDHCI_TIMEOUT_CLK_UNIT	include/sdhci.h	/^#define  SDHCI_TIMEOUT_CLK_UNIT	/;"	d
SDHCI_TIMEOUT_CONTROL	include/sdhci.h	/^#define SDHCI_TIMEOUT_CONTROL	/;"	d
SDHCI_TRANSFER_MODE	include/sdhci.h	/^#define SDHCI_TRANSFER_MODE	/;"	d
SDHCI_TRNS_ACMD12	include/sdhci.h	/^#define  SDHCI_TRNS_ACMD12	/;"	d
SDHCI_TRNS_BLK_CNT_EN	include/sdhci.h	/^#define  SDHCI_TRNS_BLK_CNT_EN	/;"	d
SDHCI_TRNS_DMA	include/sdhci.h	/^#define  SDHCI_TRNS_DMA	/;"	d
SDHCI_TRNS_MULTI	include/sdhci.h	/^#define  SDHCI_TRNS_MULTI	/;"	d
SDHCI_TRNS_READ	include/sdhci.h	/^#define  SDHCI_TRNS_READ	/;"	d
SDHCI_VENDOR_SPEC_CAPABILITIES0	drivers/mmc/msm_sdhci.c	/^#define SDHCI_VENDOR_SPEC_CAPABILITIES0 /;"	d	file:
SDHCI_VENDOR_VER_MASK	include/sdhci.h	/^#define  SDHCI_VENDOR_VER_MASK	/;"	d
SDHCI_VENDOR_VER_SHIFT	include/sdhci.h	/^#define  SDHCI_VENDOR_VER_SHIFT	/;"	d
SDHCI_WAKE_ON_INSERT	include/sdhci.h	/^#define  SDHCI_WAKE_ON_INSERT	/;"	d
SDHCI_WAKE_ON_INT	include/sdhci.h	/^#define  SDHCI_WAKE_ON_INT	/;"	d
SDHCI_WAKE_ON_REMOVE	include/sdhci.h	/^#define  SDHCI_WAKE_ON_REMOVE	/;"	d
SDHCI_WAKE_UP_CONTROL	include/sdhci.h	/^#define SDHCI_WAKE_UP_CONTROL	/;"	d
SDHCI_WINDOW_BASE	drivers/mmc/mv_sdhci.c	/^#define SDHCI_WINDOW_BASE(/;"	d	file:
SDHCI_WINDOW_CTRL	drivers/mmc/mv_sdhci.c	/^#define SDHCI_WINDOW_CTRL(/;"	d	file:
SDHCI_WRITE_PROTECT	include/sdhci.h	/^#define  SDHCI_WRITE_PROTECT	/;"	d
SDHI0_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define SDHI0_BASE	/;"	d
SDHI0_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_CD_MARK,	SDHI0_WP_MARK,	SDHI0_CMD_MARK,	SDHI0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_CD_MARK,	SDHI0_WP_MARK,	SDHI0_CMD_MARK,	SDHI0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_CD_MARK,	SDHI0_WP_MARK,	SDHI0_CMD_MARK,	SDHI0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_D0_MARK,	SDHI0_D1_MARK,	SDHI0_D2_MARK,	SDHI0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_D0_MARK,	SDHI0_D1_MARK,	SDHI0_D2_MARK,	SDHI0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_D0_MARK,	SDHI0_D1_MARK,	SDHI0_D2_MARK,	SDHI0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_D0_MARK,	SDHI0_D1_MARK,	SDHI0_D2_MARK,	SDHI0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI0_MSTP314	board/renesas/alt/alt.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_MSTP314	board/renesas/blanche/blanche.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_MSTP314	board/renesas/gose/gose.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_MSTP314	board/renesas/koelsch/koelsch.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_MSTP314	board/renesas/lager/lager.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_MSTP314	board/renesas/porter/porter.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_MSTP314	board/renesas/stout/stout.c	/^#define SDHI0_MSTP314	/;"	d	file:
SDHI0_VCCQ_MC0_OFF_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHI0_VCCQ_MC0_OFF_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHI0_VCCQ_MC0_ON_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHI0_VCCQ_MC0_ON_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHI0_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI0_CD_MARK,	SDHI0_WP_MARK,	SDHI0_CMD_MARK,	SDHI0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define SDHI1_BASE	/;"	d
SDHI1_CD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_CD_MARK,	SDHI1_WP_MARK,	SDHI1_CMD_MARK,	SDHI1_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_CD_MARK,	SDHI1_WP_MARK,	SDHI1_CMD_MARK,	SDHI1_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_CD_MARK,	SDHI1_WP_MARK,	SDHI1_CMD_MARK,	SDHI1_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_D0_MARK,	SDHI1_D1_MARK,	SDHI1_D2_MARK,	SDHI1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_D0_MARK,	SDHI1_D1_MARK,	SDHI1_D2_MARK,	SDHI1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_D0_MARK,	SDHI1_D1_MARK,	SDHI1_D2_MARK,	SDHI1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_D0_MARK,	SDHI1_D1_MARK,	SDHI1_D2_MARK,	SDHI1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI1_MSTP312	board/renesas/alt/alt.c	/^#define SDHI1_MSTP312	/;"	d	file:
SDHI1_MSTP312	board/renesas/gose/gose.c	/^#define SDHI1_MSTP312	/;"	d	file:
SDHI1_MSTP312	board/renesas/koelsch/koelsch.c	/^#define SDHI1_MSTP312	/;"	d	file:
SDHI1_MSTP312	board/renesas/silk/silk.c	/^#define SDHI1_MSTP312	/;"	d	file:
SDHI1_MSTP313	board/renesas/lager/lager.c	/^#define SDHI1_MSTP313	/;"	d	file:
SDHI1_WP_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI1_CD_MARK,	SDHI1_WP_MARK,	SDHI1_CMD_MARK,	SDHI1_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_CD_PORT202_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_CD_PORT202_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_CD_PORT24_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_CD_PORT24_MARK, \/* MSEL5CR_19_0 *\/$/;"	e	enum:__anona304c1340103	file:
SDHI2_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_CLK_MARK,	SDHI2_CMD_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_CMD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_CLK_MARK,	SDHI2_CMD_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_D0_MARK,	SDHI2_D1_MARK,	SDHI2_D2_MARK,	SDHI2_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_D0_MARK,	SDHI2_D1_MARK,	SDHI2_D2_MARK,	SDHI2_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_D0_MARK,	SDHI2_D1_MARK,	SDHI2_D2_MARK,	SDHI2_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_D0_MARK,	SDHI2_D1_MARK,	SDHI2_D2_MARK,	SDHI2_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHI2_MSTP311	board/renesas/gose/gose.c	/^#define SDHI2_MSTP311	/;"	d	file:
SDHI2_MSTP311	board/renesas/koelsch/koelsch.c	/^#define SDHI2_MSTP311	/;"	d	file:
SDHI2_MSTP311	board/renesas/porter/porter.c	/^#define SDHI2_MSTP311	/;"	d	file:
SDHI2_MSTP312	board/renesas/lager/lager.c	/^#define SDHI2_MSTP312	/;"	d	file:
SDHI2_MSTP312	board/renesas/stout/stout.c	/^#define SDHI2_MSTP312	/;"	d	file:
SDHI2_WP_PORT177_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_WP_PORT177_MARK, \/* MSEL5CR_19_1 *\/$/;"	e	enum:__anona304c1340103	file:
SDHI2_WP_PORT25_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SDHI2_WP_PORT25_MARK,$/;"	e	enum:__anona304c1340103	file:
SDHICD0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICD0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICD0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICD0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICLK0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICLK0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICLK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICLK1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICLK2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICLK2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICMD0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICMD0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICMD0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICMD0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICMD1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICMD1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICMD1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICMD1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICMD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICMD2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHICMD2_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHICMD2_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_2_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_2_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID0_3_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID0_3_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_0_MARK, TS_SPSYNC2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_1_MARK, TS_SDAT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_2_MARK, TS_SDEN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_2_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_2_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_3_MARK, TS_SCK2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID1_3_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_3_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_0_MARK, TS_SPSYNC4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_1_MARK, TS_SDAT4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_1_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_1_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_2_MARK, TS_SDEN4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_2_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_2_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_3_MARK, TS_SCK4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHID2_3_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_3_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHIWP0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHIWP0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHIWP0_PU_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHIWP0_PU_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SDHI_APP	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_APP	/;"	d
SDHI_ARG0	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_ARG0	/;"	d
SDHI_ARG1	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_ARG1	/;"	d
SDHI_BUF0	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_BUF0	/;"	d
SDHI_CC_EXT_MODE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_CC_EXT_MODE	/;"	d
SDHI_CLK_CTRL	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_CLK_CTRL	/;"	d
SDHI_CMD	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_CMD	/;"	d
SDHI_ERR_STS1	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_ERR_STS1	/;"	d
SDHI_ERR_STS2	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_ERR_STS2	/;"	d
SDHI_EXT_SWAP	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_EXT_SWAP	/;"	d
SDHI_HOST_MODE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_HOST_MODE	/;"	d
SDHI_INFO1	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_INFO1	/;"	d
SDHI_INFO1_MASK	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_INFO1_MASK	/;"	d
SDHI_INFO2	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_INFO2	/;"	d
SDHI_INFO2_MASK	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_INFO2_MASK	/;"	d
SDHI_OPTION	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_OPTION	/;"	d
SDHI_PORTSEL	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_PORTSEL	/;"	d
SDHI_RSP00	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP00	/;"	d
SDHI_RSP01	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP01	/;"	d
SDHI_RSP02	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP02	/;"	d
SDHI_RSP03	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP03	/;"	d
SDHI_RSP04	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP04	/;"	d
SDHI_RSP05	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP05	/;"	d
SDHI_RSP06	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP06	/;"	d
SDHI_RSP07	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_RSP07	/;"	d
SDHI_SDIF_MODE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SDIF_MODE	/;"	d
SDHI_SDIO_INFO1	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SDIO_INFO1	/;"	d
SDHI_SDIO_INFO1_MASK	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SDIO_INFO1_MASK	/;"	d
SDHI_SDIO_MODE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SDIO_MODE	/;"	d
SDHI_SD_APP_SEND_SCR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SD_APP_SEND_SCR	/;"	d
SDHI_SD_DMACR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SD_DMACR	/;"	d
SDHI_SD_SWITCH	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SD_SWITCH	/;"	d
SDHI_SECCNT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SECCNT	/;"	d
SDHI_SIZE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SIZE	/;"	d
SDHI_SOFT_RST	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_SOFT_RST	/;"	d
SDHI_STOP	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_STOP	/;"	d
SDHI_VERSION	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDHI_VERSION	/;"	d
SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_ARGUMENT /;"	d
SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_ARGUMENT /;"	d
SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_ARGUMENT /;"	d
SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_ARGUMENT /;"	d
SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_CFG /;"	d
SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_CFG /;"	d
SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_CFG /;"	d
SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_CFG /;"	d
SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_CLK_CTL /;"	d
SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_CLK_CTL /;"	d
SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_CLK_CTL /;"	d
SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_CLK_CTL /;"	d
SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_COMMAND /;"	d
SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_COMMAND /;"	d
SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_COMMAND /;"	d
SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_COMMAND /;"	d
SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_DATA_CNT /;"	d
SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_DATA_CNT /;"	d
SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_DATA_CNT /;"	d
SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_DATA_CNT /;"	d
SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_DATA_CTL /;"	d
SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_DATA_CTL /;"	d
SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_DATA_CTL /;"	d
SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_DATA_CTL /;"	d
SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_DATA_LGTH /;"	d
SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_DATA_LGTH /;"	d
SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_DATA_LGTH /;"	d
SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_DATA_LGTH /;"	d
SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_DATA_TIMER /;"	d
SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_DATA_TIMER /;"	d
SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_DATA_TIMER /;"	d
SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_DATA_TIMER /;"	d
SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_E_MASK /;"	d
SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_E_MASK /;"	d
SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_E_MASK /;"	d
SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_E_MASK /;"	d
SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_E_STATUS /;"	d
SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_E_STATUS /;"	d
SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_E_STATUS /;"	d
SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_E_STATUS /;"	d
SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_FIFO /;"	d
SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_FIFO /;"	d
SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_FIFO /;"	d
SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_FIFO /;"	d
SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_FIFO_CNT /;"	d
SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_FIFO_CNT /;"	d
SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_FIFO_CNT /;"	d
SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_FIFO_CNT /;"	d
SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_MASK0 /;"	d
SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_MASK0 /;"	d
SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_MASK0 /;"	d
SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_MASK0 /;"	d
SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_MASK1 /;"	d
SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_MASK1 /;"	d
SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_MASK1 /;"	d
SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_MASK1 /;"	d
SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID0 /;"	d
SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID0 /;"	d
SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID0 /;"	d
SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID0 /;"	d
SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID1 /;"	d
SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID1 /;"	d
SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID1 /;"	d
SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID1 /;"	d
SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID2 /;"	d
SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID2 /;"	d
SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID2 /;"	d
SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID2 /;"	d
SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID3 /;"	d
SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID3 /;"	d
SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID3 /;"	d
SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID3 /;"	d
SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID4 /;"	d
SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID4 /;"	d
SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID4 /;"	d
SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID4 /;"	d
SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID5 /;"	d
SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID5 /;"	d
SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID5 /;"	d
SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID5 /;"	d
SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID6 /;"	d
SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID6 /;"	d
SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID6 /;"	d
SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID6 /;"	d
SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PID7 /;"	d
SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PID7 /;"	d
SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PID7 /;"	d
SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PID7 /;"	d
SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_PWR_CTL /;"	d
SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_PWR_CTL /;"	d
SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_PWR_CTL /;"	d
SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_PWR_CTL /;"	d
SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_RD_WAIT_EN /;"	d
SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_RD_WAIT_EN /;"	d
SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_RD_WAIT_EN /;"	d
SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_RD_WAIT_EN /;"	d
SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_RESPONSE0 /;"	d
SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_RESPONSE0 /;"	d
SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_RESPONSE0 /;"	d
SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_RESPONSE0 /;"	d
SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_RESPONSE1 /;"	d
SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_RESPONSE1 /;"	d
SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_RESPONSE1 /;"	d
SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_RESPONSE1 /;"	d
SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_RESPONSE2 /;"	d
SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_RESPONSE2 /;"	d
SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_RESPONSE2 /;"	d
SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_RESPONSE2 /;"	d
SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_RESPONSE3 /;"	d
SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_RESPONSE3 /;"	d
SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_RESPONSE3 /;"	d
SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_RESPONSE3 /;"	d
SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_RESP_CMD /;"	d
SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_RESP_CMD /;"	d
SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_RESP_CMD /;"	d
SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_RESP_CMD /;"	d
SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_STATUS /;"	d
SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_STATUS /;"	d
SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_STATUS /;"	d
SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_STATUS /;"	d
SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SDH_STATUS_CLR /;"	d
SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SDH_STATUS_CLR /;"	d
SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SDH_STATUS_CLR /;"	d
SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SDH_STATUS_CLR /;"	d
SDI1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SDI1_BASE_ADDR /;"	d
SDI2_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SDI2_BASE_ADDR /;"	d
SDID	include/sym53c8xx.h	/^#define SDID	/;"	d
SDINT	arch/sh/include/asm/cpu_sh7722.h	/^#define SDINT /;"	d
SDINT	arch/sh/include/asm/cpu_sh7750.h	/^#define SDINT	/;"	d
SDIO0_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_DIV_MASK		= 0x3f,$/;"	e	enum:__anon3783c4e20203
SDIO0_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_DIV_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20203
SDIO0_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_PLL_MASK		= 3,$/;"	e	enum:__anon3783c4e20203
SDIO0_PLL_SELECT_24MHZ	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_PLL_SELECT_24MHZ,$/;"	e	enum:__anon3783c4e20203
SDIO0_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_PLL_SELECT_CODEC	= 0,$/;"	e	enum:__anon3783c4e20203
SDIO0_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20203
SDIO0_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SDIO0_PLL_SHIFT		= 6,$/;"	e	enum:__anon3783c4e20203
SDIO1_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define SDIO1_BASE_ADDR	/;"	d
SDIO1_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define SDIO1_BASE_ADDR	/;"	d
SDIO2_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define SDIO2_BASE_ADDR	/;"	d
SDIO2_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define SDIO2_BASE_ADDR	/;"	d
SDIO3_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define SDIO3_BASE_ADDR	/;"	d
SDIO3_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define SDIO3_BASE_ADDR	/;"	d
SDIO4_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define SDIO4_BASE_ADDR	/;"	d
SDIO4_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define SDIO4_BASE_ADDR	/;"	d
SDIOCFG_DRVDN	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^#define SDIOCFG_DRVDN	/;"	d
SDIOCFG_DRVDN	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^#define SDIOCFG_DRVDN	/;"	d
SDIOCFG_DRVDN	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^#define SDIOCFG_DRVDN	/;"	d
SDIOCFG_DRVDN	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^#define SDIOCFG_DRVDN	/;"	d
SDIOCFG_DRVDN_SLWR	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^#define SDIOCFG_DRVDN_SLWR	/;"	d
SDIOCFG_DRVDN_SLWR	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^#define SDIOCFG_DRVDN_SLWR	/;"	d
SDIOCFG_DRVDN_SLWR	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^#define SDIOCFG_DRVDN_SLWR	/;"	d
SDIOCFG_DRVDN_SLWR	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^#define SDIOCFG_DRVDN_SLWR	/;"	d
SDIOCFG_DRVUP	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^#define SDIOCFG_DRVUP	/;"	d
SDIOCFG_DRVUP	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^#define SDIOCFG_DRVUP	/;"	d
SDIOCFG_DRVUP	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^#define SDIOCFG_DRVUP	/;"	d
SDIOCFG_DRVUP	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^#define SDIOCFG_DRVUP	/;"	d
SDIOCFG_DRVUP_SLWF	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^#define SDIOCFG_DRVUP_SLWF	/;"	d
SDIOCFG_DRVUP_SLWF	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^#define SDIOCFG_DRVUP_SLWF	/;"	d
SDIOCFG_DRVUP_SLWF	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^#define SDIOCFG_DRVUP_SLWF	/;"	d
SDIOCFG_DRVUP_SLWF	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^#define SDIOCFG_DRVUP_SLWF	/;"	d
SDIO_ARG_HI	include/mvebu_mmc.h	/^#define SDIO_ARG_HI	/;"	d
SDIO_ARG_LOW	include/mvebu_mmc.h	/^#define SDIO_ARG_LOW	/;"	d
SDIO_AUTOCMD12_ARG_HI	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ARG_HI	/;"	d
SDIO_AUTOCMD12_ARG_LOW	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ARG_LOW	/;"	d
SDIO_AUTOCMD12_ERR_CRC	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_CRC	/;"	d
SDIO_AUTOCMD12_ERR_ENDBIT	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_ENDBIT	/;"	d
SDIO_AUTOCMD12_ERR_INDEX	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_INDEX	/;"	d
SDIO_AUTOCMD12_ERR_NOTEXE	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_NOTEXE	/;"	d
SDIO_AUTOCMD12_ERR_RESP_STARTBIT	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_RESP_STARTBIT	/;"	d
SDIO_AUTOCMD12_ERR_RESP_T_BIT	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_RESP_T_BIT	/;"	d
SDIO_AUTOCMD12_ERR_STATUS	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_STATUS	/;"	d
SDIO_AUTOCMD12_ERR_TIMEOUT	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_ERR_TIMEOUT	/;"	d
SDIO_AUTOCMD12_INDEX	include/mvebu_mmc.h	/^#define SDIO_AUTOCMD12_INDEX	/;"	d
SDIO_AUTO_RSP	include/mvebu_mmc.h	/^#define SDIO_AUTO_RSP(/;"	d
SDIO_AUTO_RSP0	include/mvebu_mmc.h	/^#define SDIO_AUTO_RSP0	/;"	d
SDIO_AUTO_RSP1	include/mvebu_mmc.h	/^#define SDIO_AUTO_RSP1	/;"	d
SDIO_AUTO_RSP2	include/mvebu_mmc.h	/^#define SDIO_AUTO_RSP2	/;"	d
SDIO_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_BASE	/;"	d
SDIO_BLK_COUNT	include/mvebu_mmc.h	/^#define SDIO_BLK_COUNT	/;"	d
SDIO_BLK_GAP_CTRL	include/mvebu_mmc.h	/^#define SDIO_BLK_GAP_CTRL	/;"	d
SDIO_BLK_SIZE	include/mvebu_mmc.h	/^#define SDIO_BLK_SIZE	/;"	d
SDIO_BUF_DATA_PORT	include/mvebu_mmc.h	/^#define SDIO_BUF_DATA_PORT	/;"	d
SDIO_CAP_12_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_CAP_12_ADDR	/;"	d
SDIO_CLK_CTRL	include/mvebu_mmc.h	/^#define SDIO_CLK_CTRL	/;"	d
SDIO_CLK_DIV	include/mvebu_mmc.h	/^#define SDIO_CLK_DIV	/;"	d
SDIO_CMD	include/mvebu_mmc.h	/^#define SDIO_CMD	/;"	d
SDIO_CMD_CHECK_CMDCRC	include/mvebu_mmc.h	/^#define SDIO_CMD_CHECK_CMDCRC	/;"	d
SDIO_CMD_CHECK_DATACRC16	include/mvebu_mmc.h	/^#define SDIO_CMD_CHECK_DATACRC16	/;"	d
SDIO_CMD_DATA_PRESENT	include/mvebu_mmc.h	/^#define SDIO_CMD_DATA_PRESENT	/;"	d
SDIO_CMD_INDEX	include/mvebu_mmc.h	/^#define SDIO_CMD_INDEX(/;"	d
SDIO_CMD_INDX_CHECK	include/mvebu_mmc.h	/^#define SDIO_CMD_INDX_CHECK	/;"	d
SDIO_CMD_RSP_136	include/mvebu_mmc.h	/^#define SDIO_CMD_RSP_136	/;"	d
SDIO_CMD_RSP_48	include/mvebu_mmc.h	/^#define SDIO_CMD_RSP_48	/;"	d
SDIO_CMD_RSP_48BUSY	include/mvebu_mmc.h	/^#define SDIO_CMD_RSP_48BUSY	/;"	d
SDIO_CMD_RSP_NONE	include/mvebu_mmc.h	/^#define SDIO_CMD_RSP_NONE	/;"	d
SDIO_CURR_BLK_LEFT	include/mvebu_mmc.h	/^#define SDIO_CURR_BLK_LEFT	/;"	d
SDIO_CURR_BYTE_LEFT	include/mvebu_mmc.h	/^#define SDIO_CURR_BYTE_LEFT	/;"	d
SDIO_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define SDIO_DEV	/;"	d
SDIO_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_DIV_MASK		= 0x7f,$/;"	e	enum:__anon375ccd790103
SDIO_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_DIV_SHIFT		= 8,$/;"	e	enum:__anon375ccd790103
SDIO_DLL_RST_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_DLL_RST_ADDR	/;"	d
SDIO_ENDIAN_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_ENDIAN_ADDR	/;"	d
SDIO_ERR_AUTOCMD12	include/mvebu_mmc.h	/^#define SDIO_ERR_AUTOCMD12	/;"	d
SDIO_ERR_CMD_CRC	include/mvebu_mmc.h	/^#define SDIO_ERR_CMD_CRC	/;"	d
SDIO_ERR_CMD_ENDBIT	include/mvebu_mmc.h	/^#define SDIO_ERR_CMD_ENDBIT	/;"	d
SDIO_ERR_CMD_INDEX	include/mvebu_mmc.h	/^#define SDIO_ERR_CMD_INDEX	/;"	d
SDIO_ERR_CMD_STARTBIT	include/mvebu_mmc.h	/^#define SDIO_ERR_CMD_STARTBIT	/;"	d
SDIO_ERR_CMD_TIMEOUT	include/mvebu_mmc.h	/^#define SDIO_ERR_CMD_TIMEOUT	/;"	d
SDIO_ERR_CRC_ENDBIT	include/mvebu_mmc.h	/^#define SDIO_ERR_CRC_ENDBIT	/;"	d
SDIO_ERR_CRC_STARTBIT	include/mvebu_mmc.h	/^#define SDIO_ERR_CRC_STARTBIT	/;"	d
SDIO_ERR_CRC_STATUS	include/mvebu_mmc.h	/^#define SDIO_ERR_CRC_STATUS	/;"	d
SDIO_ERR_DATA_CRC	include/mvebu_mmc.h	/^#define SDIO_ERR_DATA_CRC	/;"	d
SDIO_ERR_DATA_ENDBIT	include/mvebu_mmc.h	/^#define SDIO_ERR_DATA_ENDBIT	/;"	d
SDIO_ERR_DATA_TIMEOUT	include/mvebu_mmc.h	/^#define SDIO_ERR_DATA_TIMEOUT	/;"	d
SDIO_ERR_INTR_EN	include/mvebu_mmc.h	/^#define SDIO_ERR_INTR_EN	/;"	d
SDIO_ERR_INTR_STATUS	include/mvebu_mmc.h	/^#define SDIO_ERR_INTR_STATUS	/;"	d
SDIO_ERR_RESP_TBIT	include/mvebu_mmc.h	/^#define SDIO_ERR_RESP_TBIT	/;"	d
SDIO_ERR_STATUS_EN	include/mvebu_mmc.h	/^#define SDIO_ERR_STATUS_EN	/;"	d
SDIO_ERR_XFER_SIZE	include/mvebu_mmc.h	/^#define SDIO_ERR_XFER_SIZE	/;"	d
SDIO_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SDIO_FREQ /;"	d
SDIO_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SDIO_FREQ /;"	d
SDIO_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SDIO_FREQ /;"	d
SDIO_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SDIO_FREQ /;"	d
SDIO_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SDIO_FREQ /;"	d
SDIO_HOST_CTRL	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL	/;"	d
SDIO_HOST_CTRL1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_HOST_CTRL1_ADDR	/;"	d
SDIO_HOST_CTRL_BIG_ENDIAN	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_BIG_ENDIAN	/;"	d
SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO	/;"	d
SDIO_HOST_CTRL_CARD_TYPE_IO_MMC	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_CARD_TYPE_IO_MMC	/;"	d
SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY	/;"	d
SDIO_HOST_CTRL_CARD_TYPE_MASK	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_CARD_TYPE_MASK	/;"	d
SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY	/;"	d
SDIO_HOST_CTRL_DATA_WIDTH_1_BIT	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_DATA_WIDTH_1_BIT	/;"	d
SDIO_HOST_CTRL_DATA_WIDTH_4_BITS	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_DATA_WIDTH_4_BITS	/;"	d
SDIO_HOST_CTRL_HI_SPEED_EN	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_HI_SPEED_EN	/;"	d
SDIO_HOST_CTRL_LSB_FIRST	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_LSB_FIRST	/;"	d
SDIO_HOST_CTRL_PUSH_PULL_EN	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_PUSH_PULL_EN	/;"	d
SDIO_HOST_CTRL_TMOUT	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_TMOUT(/;"	d
SDIO_HOST_CTRL_TMOUT_EN	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_TMOUT_EN	/;"	d
SDIO_HOST_CTRL_TMOUT_MASK	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_TMOUT_MASK	/;"	d
SDIO_HOST_CTRL_TMOUT_MAX	include/mvebu_mmc.h	/^#define SDIO_HOST_CTRL_TMOUT_MAX	/;"	d
SDIO_HW_STATE	include/mvebu_mmc.h	/^#define SDIO_HW_STATE	/;"	d
SDIO_INFO1M_CLEAR	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_INFO1M_CLEAR	/;"	d
SDIO_INFO1M_ON	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_INFO1M_ON	/;"	d
SDIO_INFO1_EXPUB52	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_INFO1_EXPUB52	/;"	d
SDIO_INFO1_EXWT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_INFO1_EXWT	/;"	d
SDIO_INFO1_IOIRQ	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_INFO1_IOIRQ	/;"	d
SDIO_INT_DET	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              SDIO_INT_DET /;"	d
SDIO_MODE_OFF	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_MODE_OFF	/;"	d
SDIO_MODE_ON	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SDIO_MODE_ON	/;"	d
SDIO_MSK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                  SDIO_MSK /;"	d
SDIO_NOR_AUTOCMD12_DONE	include/mvebu_mmc.h	/^#define SDIO_NOR_AUTOCMD12_DONE	/;"	d
SDIO_NOR_BLK_GAP_EVT	include/mvebu_mmc.h	/^#define SDIO_NOR_BLK_GAP_EVT	/;"	d
SDIO_NOR_CARD_INT	include/mvebu_mmc.h	/^#define SDIO_NOR_CARD_INT	/;"	d
SDIO_NOR_CMD_DONE	include/mvebu_mmc.h	/^#define SDIO_NOR_CMD_DONE	/;"	d
SDIO_NOR_DMA_INI	include/mvebu_mmc.h	/^#define SDIO_NOR_DMA_INI	/;"	d
SDIO_NOR_ERROR	include/mvebu_mmc.h	/^#define SDIO_NOR_ERROR	/;"	d
SDIO_NOR_INTR_EN	include/mvebu_mmc.h	/^#define SDIO_NOR_INTR_EN	/;"	d
SDIO_NOR_INTR_STATUS	include/mvebu_mmc.h	/^#define SDIO_NOR_INTR_STATUS	/;"	d
SDIO_NOR_LMB_FF_8W_AVAIL	include/mvebu_mmc.h	/^#define SDIO_NOR_LMB_FF_8W_AVAIL	/;"	d
SDIO_NOR_LMB_FF_8W_FILLED	include/mvebu_mmc.h	/^#define SDIO_NOR_LMB_FF_8W_FILLED	/;"	d
SDIO_NOR_READ_READY	include/mvebu_mmc.h	/^#define SDIO_NOR_READ_READY	/;"	d
SDIO_NOR_READ_WAIT_ON	include/mvebu_mmc.h	/^#define SDIO_NOR_READ_WAIT_ON	/;"	d
SDIO_NOR_STATUS_EN	include/mvebu_mmc.h	/^#define SDIO_NOR_STATUS_EN	/;"	d
SDIO_NOR_SUSPEND_ON	include/mvebu_mmc.h	/^#define SDIO_NOR_SUSPEND_ON	/;"	d
SDIO_NOR_UNEXP_RSP	include/mvebu_mmc.h	/^#define SDIO_NOR_UNEXP_RSP	/;"	d
SDIO_NOR_WRITE_READY	include/mvebu_mmc.h	/^#define SDIO_NOR_WRITE_READY	/;"	d
SDIO_NOR_XFER_DONE	include/mvebu_mmc.h	/^#define SDIO_NOR_XFER_DONE	/;"	d
SDIO_PHY_PAD_CTRL0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_PHY_PAD_CTRL0_ADDR	/;"	d
SDIO_PHY_TIMING_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_PHY_TIMING_ADDR	/;"	d
SDIO_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_PLL_MASK		= 3,$/;"	e	enum:__anon375ccd790103
SDIO_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_PLL_SHIFT		= 10,$/;"	e	enum:__anon375ccd790103
SDIO_POLL_MASK	include/mvebu_mmc.h	/^#define SDIO_POLL_MASK	/;"	d
SDIO_PRESENT_STATE0	include/mvebu_mmc.h	/^#define SDIO_PRESENT_STATE0	/;"	d
SDIO_PRESENT_STATE1	include/mvebu_mmc.h	/^#define SDIO_PRESENT_STATE1	/;"	d
SDIO_RSP	include/mvebu_mmc.h	/^#define SDIO_RSP(/;"	d
SDIO_RSP0	include/mvebu_mmc.h	/^#define SDIO_RSP0	/;"	d
SDIO_RSP1	include/mvebu_mmc.h	/^#define SDIO_RSP1	/;"	d
SDIO_RSP2	include/mvebu_mmc.h	/^#define SDIO_RSP2	/;"	d
SDIO_RSP3	include/mvebu_mmc.h	/^#define SDIO_RSP3	/;"	d
SDIO_RSP4	include/mvebu_mmc.h	/^#define SDIO_RSP4	/;"	d
SDIO_RSP5	include/mvebu_mmc.h	/^#define SDIO_RSP5	/;"	d
SDIO_RSP6	include/mvebu_mmc.h	/^#define SDIO_RSP6	/;"	d
SDIO_RSP7	include/mvebu_mmc.h	/^#define SDIO_RSP7	/;"	d
SDIO_RSVED	include/mvebu_mmc.h	/^#define SDIO_RSVED	/;"	d
SDIO_SDHC_FIFO_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SDIO_SDHC_FIFO_ADDR	/;"	d
SDIO_SEL_24M	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_SEL_24M,$/;"	e	enum:__anon375ccd790103
SDIO_SEL_APLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_SEL_APLL		= 0,$/;"	e	enum:__anon375ccd790103
SDIO_SEL_DPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_SEL_DPLL,$/;"	e	enum:__anon375ccd790103
SDIO_SEL_GPLL	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	SDIO_SEL_GPLL,$/;"	e	enum:__anon375ccd790103
SDIO_SW_RESET	include/mvebu_mmc.h	/^#define SDIO_SW_RESET	/;"	d
SDIO_SW_RESET_NOW	include/mvebu_mmc.h	/^#define SDIO_SW_RESET_NOW	/;"	d
SDIO_SYS_ADDR_HI	include/mvebu_mmc.h	/^#define SDIO_SYS_ADDR_HI	/;"	d
SDIO_SYS_ADDR_LOW	include/mvebu_mmc.h	/^#define SDIO_SYS_ADDR_LOW	/;"	d
SDIO_UNEXPECTED_RESP	include/mvebu_mmc.h	/^#define SDIO_UNEXPECTED_RESP	/;"	d
SDIO_XFER_MODE	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE	/;"	d
SDIO_XFER_MODE_AUTO_CMD12	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE_AUTO_CMD12	/;"	d
SDIO_XFER_MODE_DMA	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE_DMA	/;"	d
SDIO_XFER_MODE_HW_WR_DATA_EN	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE_HW_WR_DATA_EN	/;"	d
SDIO_XFER_MODE_INT_CHK_EN	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE_INT_CHK_EN	/;"	d
SDIO_XFER_MODE_STOP_CLK	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE_STOP_CLK	/;"	d
SDIO_XFER_MODE_TO_HOST	include/mvebu_mmc.h	/^#define SDIO_XFER_MODE_TO_HOST	/;"	d
SDIR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SDIR	/;"	d
SDIR	arch/sh/include/asm/cpu_sh7722.h	/^#define SDIR /;"	d
SDIR	arch/sh/include/asm/cpu_sh7750.h	/^#define SDIR	/;"	d
SDIS	include/usb/ehci-ci.h	/^#define SDIS	/;"	d
SDIV	board/samsung/odroid/setup.h	/^#define SDIV(/;"	d
SDI_CLKCR_BYPASS	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_BYPASS	/;"	d
SDI_CLKCR_CLKDIV_INIT_V1	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_CLKDIV_INIT_V1 /;"	d
SDI_CLKCR_CLKDIV_INIT_V2	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_CLKDIV_INIT_V2 /;"	d
SDI_CLKCR_CLKDIV_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_CLKDIV_MASK	/;"	d
SDI_CLKCR_CLKEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_CLKEN	/;"	d
SDI_CLKCR_HWFC_EN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_HWFC_EN	/;"	d
SDI_CLKCR_NEDGE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_NEDGE	/;"	d
SDI_CLKCR_PWRSAV	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_PWRSAV	/;"	d
SDI_CLKCR_WIDBUS_1	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_WIDBUS_1	/;"	d
SDI_CLKCR_WIDBUS_4	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_WIDBUS_4	/;"	d
SDI_CLKCR_WIDBUS_8	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_WIDBUS_8	/;"	d
SDI_CLKCR_WIDBUS_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CLKCR_WIDBUS_MASK	/;"	d
SDI_CMD_CBOOTMODEEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_CBOOTMODEEN	/;"	d
SDI_CMD_CE_ATACMD	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_CE_ATACMD	/;"	d
SDI_CMD_CMDINDEX_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_CMDINDEX_MASK	/;"	d
SDI_CMD_CPSMEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_CPSMEN	/;"	d
SDI_CMD_ENDCMDCOMPL	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_ENDCMDCOMPL	/;"	d
SDI_CMD_LONGRESP	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_LONGRESP	/;"	d
SDI_CMD_NIEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_NIEN	/;"	d
SDI_CMD_SDIOSUSPEND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_SDIOSUSPEND	/;"	d
SDI_CMD_WAITINT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_WAITINT	/;"	d
SDI_CMD_WAITPEND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_WAITPEND	/;"	d
SDI_CMD_WAITRESP	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_CMD_WAITRESP	/;"	d
SDI_DCTRL_BUSYMODE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_BUSYMODE	/;"	d
SDI_DCTRL_DBLKSIZE_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DBLKSIZE_MASK	/;"	d
SDI_DCTRL_DBLOCKSIZE_V2_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DBLOCKSIZE_V2_MASK /;"	d
SDI_DCTRL_DBLOCKSIZE_V2_SHIFT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DBLOCKSIZE_V2_SHIFT /;"	d
SDI_DCTRL_DBOOTMODEEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DBOOTMODEEN	/;"	d
SDI_DCTRL_DDR_MODE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DDR_MODE	/;"	d
SDI_DCTRL_DMAEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DMAEN	/;"	d
SDI_DCTRL_DMAREQCTL	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DMAREQCTL	/;"	d
SDI_DCTRL_DTDIR_IN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DTDIR_IN	/;"	d
SDI_DCTRL_DTEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DTEN	/;"	d
SDI_DCTRL_DTMODE_STREAM	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_DTMODE_STREAM	/;"	d
SDI_DCTRL_RWMOD	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_RWMOD	/;"	d
SDI_DCTRL_RWSTART	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_RWSTART	/;"	d
SDI_DCTRL_RWSTOP	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_RWSTOP	/;"	d
SDI_DCTRL_SDIOEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DCTRL_SDIOEN	/;"	d
SDI_DTIMER_DEFAULT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_DTIMER_DEFAULT	/;"	d
SDI_FIFO_BURST_SIZE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_FIFO_BURST_SIZE	/;"	d
SDI_ICR_BOOTACKERRC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_BOOTACKERRC	/;"	d
SDI_ICR_BOOTACKTIMEOUTC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_BOOTACKTIMEOUTC	/;"	d
SDI_ICR_BUSYENDC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_BUSYENDC	/;"	d
SDI_ICR_CCRCFAILC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_CCRCFAILC	/;"	d
SDI_ICR_CEATAENDC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_CEATAENDC	/;"	d
SDI_ICR_CMDRENDC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_CMDRENDC	/;"	d
SDI_ICR_CMDSENTC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_CMDSENTC	/;"	d
SDI_ICR_CTIMEOUTC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_CTIMEOUTC	/;"	d
SDI_ICR_DATAENDC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_DATAENDC	/;"	d
SDI_ICR_DBCKENDC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_DBCKENDC	/;"	d
SDI_ICR_DCRCFAILC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_DCRCFAILC	/;"	d
SDI_ICR_DTIMEOUTC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_DTIMEOUTC	/;"	d
SDI_ICR_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_MASK	/;"	d
SDI_ICR_RSTNENDC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_RSTNENDC	/;"	d
SDI_ICR_RXOVERRC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_RXOVERRC	/;"	d
SDI_ICR_SDIOITC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_SDIOITC	/;"	d
SDI_ICR_STBITERRC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_STBITERRC	/;"	d
SDI_ICR_TXUNDERRC	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_ICR_TXUNDERRC	/;"	d
SDI_MASK0_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_MASK0_MASK	/;"	d
SDI_PWR_CMDDIREN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_CMDDIREN	/;"	d
SDI_PWR_DAT0DIREN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_DAT0DIREN	/;"	d
SDI_PWR_DAT2DIREN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_DAT2DIREN	/;"	d
SDI_PWR_DAT31DIREN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_DAT31DIREN	/;"	d
SDI_PWR_DAT74DIREN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_DAT74DIREN	/;"	d
SDI_PWR_FBCLKEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_FBCLKEN	/;"	d
SDI_PWR_OPD	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_OPD	/;"	d
SDI_PWR_PWRCTRL_MASK	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_PWRCTRL_MASK	/;"	d
SDI_PWR_PWRCTRL_OFF	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_PWRCTRL_OFF	/;"	d
SDI_PWR_PWRCTRL_ON	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_PWRCTRL_ON	/;"	d
SDI_PWR_RSTEN	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_PWR_RSTEN	/;"	d
SDI_STA_BOOTACKERR	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_BOOTACKERR	/;"	d
SDI_STA_BOOTACKTIMEOUT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_BOOTACKTIMEOUT	/;"	d
SDI_STA_BOOTMODE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_BOOTMODE	/;"	d
SDI_STA_CARDBUSY	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CARDBUSY	/;"	d
SDI_STA_CCRCFAIL	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CCRCFAIL	/;"	d
SDI_STA_CEATAEND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CEATAEND	/;"	d
SDI_STA_CMDACT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CMDACT	/;"	d
SDI_STA_CMDREND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CMDREND	/;"	d
SDI_STA_CMDSENT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CMDSENT	/;"	d
SDI_STA_CTIMEOUT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_CTIMEOUT	/;"	d
SDI_STA_DATAEND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_DATAEND	/;"	d
SDI_STA_DBCKEND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_DBCKEND	/;"	d
SDI_STA_DCRCFAIL	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_DCRCFAIL	/;"	d
SDI_STA_DTIMEOUT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_DTIMEOUT	/;"	d
SDI_STA_RSTNEND	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RSTNEND	/;"	d
SDI_STA_RXACT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RXACT	/;"	d
SDI_STA_RXDAVL	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RXDAVL	/;"	d
SDI_STA_RXFIFOBR	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RXFIFOBR	/;"	d
SDI_STA_RXFIFOE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RXFIFOE	/;"	d
SDI_STA_RXFIFOF	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RXFIFOF	/;"	d
SDI_STA_RXOVERR	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_RXOVERR	/;"	d
SDI_STA_SDIOIT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_SDIOIT	/;"	d
SDI_STA_STBITERR	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_STBITERR	/;"	d
SDI_STA_TXACT	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_TXACT	/;"	d
SDI_STA_TXDAVL	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_TXDAVL	/;"	d
SDI_STA_TXFIFOBW	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_TXFIFOBW	/;"	d
SDI_STA_TXFIFOE	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_TXFIFOE	/;"	d
SDI_STA_TXFIFOF	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_TXFIFOF	/;"	d
SDI_STA_TXUNDERR	drivers/mmc/arm_pl180_mmci.h	/^#define SDI_STA_TXUNDERR	/;"	d
SDMA_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define SDMA_BASE_ADDR	/;"	d
SDMA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SDMA_BASE_ADDR	/;"	d
SDMA_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SDMA_BASE_ADDR /;"	d
SDMA_CLEAR_IEVENT	include/mpc5xxx_sdma.h	/^#define SDMA_CLEAR_IEVENT(/;"	d
SDMA_CMD_AR	drivers/net/armada100_fec.h	/^#define SDMA_CMD_AR /;"	d
SDMA_CMD_AT	drivers/net/armada100_fec.h	/^#define SDMA_CMD_AT /;"	d
SDMA_CMD_ERD	drivers/net/armada100_fec.h	/^#define SDMA_CMD_ERD /;"	d
SDMA_CMD_TXDH	drivers/net/armada100_fec.h	/^#define SDMA_CMD_TXDH /;"	d
SDMA_CMD_TXDL	drivers/net/armada100_fec.h	/^#define SDMA_CMD_TXDL /;"	d
SDMA_CTRL_REGNUMS	drivers/net/xilinx_ll_temac_sdma.h	/^#define SDMA_CTRL_REGNUMS	/;"	d
SDMA_CTRL_REGSIZE	drivers/net/xilinx_ll_temac_sdma.h	/^#define SDMA_CTRL_REGSIZE	/;"	d
SDMA_CTRL_REGTYPE	drivers/net/xilinx_ll_temac_sdma.h	/^#define SDMA_CTRL_REGTYPE	/;"	d
SDMA_GET_MASKBIT	include/mpc5xxx_sdma.h	/^#define SDMA_GET_MASKBIT(/;"	d
SDMA_GET_PENDINGBIT	include/mpc5xxx_sdma.h	/^#define SDMA_GET_PENDINGBIT(/;"	d
SDMA_INT_DISABLE	include/mpc5xxx_sdma.h	/^#define SDMA_INT_DISABLE(/;"	d
SDMA_INT_ENABLE	include/mpc5xxx_sdma.h	/^#define SDMA_INT_ENABLE(/;"	d
SDMA_IPS_HOST_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SDMA_IPS_HOST_BASE_ADDR /;"	d
SDMA_IPS_HOST_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SDMA_IPS_HOST_IPS_BASE_ADDR /;"	d
SDMA_PORT_HOST_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SDMA_PORT_HOST_BASE_ADDR /;"	d
SDMA_PORT_IPS_HOST_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SDMA_PORT_IPS_HOST_BASE_ADDR /;"	d
SDMA_TASK_DISABLE	include/mpc5xxx_sdma.h	/^#define SDMA_TASK_DISABLE(/;"	d
SDMA_TASK_ENABLE	include/mpc5xxx_sdma.h	/^#define SDMA_TASK_ENABLE(/;"	d
SDMC_B0_BSR_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_B0_BSR_A	/;"	d	file:
SDMC_B0_BSR_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_B0_BSR_D	/;"	d	file:
SDMC_B1_BSR_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_B1_BSR_A	/;"	d	file:
SDMC_B1_BSR_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_B1_BSR_D	/;"	d	file:
SDMC_CR1_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_CR1_A	/;"	d	file:
SDMC_CR1_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_CR1_D	/;"	d	file:
SDMC_CR2_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_CR2_A	/;"	d	file:
SDMC_CR2_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_CR2_D	/;"	d	file:
SDMC_TP1_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_TP1_A	/;"	d	file:
SDMC_TP1_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_TP1_D	/;"	d	file:
SDMC_TP2_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_TP2_A	/;"	d	file:
SDMC_TP2_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SDMC_TP2_D	/;"	d	file:
SDMISC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SDMISC /;"	d
SDMMC1_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_CLK	/;"	d
SDMMC1_CMD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_CMD	/;"	d
SDMMC1_DAT0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT0	/;"	d
SDMMC1_DAT1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT1	/;"	d
SDMMC1_DAT2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT2	/;"	d
SDMMC1_DAT3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT3	/;"	d
SDMMC1_DAT4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT4	/;"	d
SDMMC1_DAT5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT5	/;"	d
SDMMC1_DAT6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT6	/;"	d
SDMMC1_DAT7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC1_DAT7	/;"	d
SDMMC5_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC5_CLK	/;"	d
SDMMC5_CMD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC5_CMD	/;"	d
SDMMC5_DAT0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC5_DAT0	/;"	d
SDMMC5_DAT1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC5_DAT1	/;"	d
SDMMC5_DAT2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC5_DAT2	/;"	d
SDMMC5_DAT3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SDMMC5_DAT3	/;"	d
SDMMC_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMMC_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDMMC_RESET	/;"	d
SDMR	arch/sh/include/asm/cpu_sh7706.h	/^#define SDMR	/;"	d
SDMR00308_A	board/renesas/sh7763rdp/lowlevel_init.S	/^SDMR00308_A:	.long	0xFE900308$/;"	l
SDMR00308_D	board/renesas/sh7763rdp/lowlevel_init.S	/^SDMR00308_D:	.long	0x00000000$/;"	l
SDMR00B08_A	board/renesas/sh7763rdp/lowlevel_init.S	/^SDMR00B08_A:	.long	0xFE900B08$/;"	l
SDMR00B08_D	board/renesas/sh7763rdp/lowlevel_init.S	/^SDMR00B08_D:	.long	0x00000000$/;"	l
SDMR02000_A	board/renesas/sh7763rdp/lowlevel_init.S	/^SDMR02000_A:	.long	0xFE902000$/;"	l
SDMR02000_D	board/renesas/sh7763rdp/lowlevel_init.S	/^SDMR02000_D:	.long	0x00000000$/;"	l
SDMR2	arch/sh/include/asm/cpu_sh7720.h	/^#define SDMR2	/;"	d
SDMR3	arch/sh/include/asm/cpu_sh7720.h	/^#define SDMR3	/;"	d
SDMR3_A	board/mpr2/lowlevel_init.S	/^SDMR3_A:	.long	BSC_BASE + 0x5000$/;"	l
SDMR3_A	board/ms7720se/lowlevel_init.S	/^SDMR3_A:	.long	BSC_BASE + 0x58C0$/;"	l
SDMR3_A	board/ms7722se/lowlevel_init.S	/^SDMR3_A:	.long	0xFE500180$/;"	l
SDMR3_A	board/ms7750se/lowlevel_init.S	/^SDMR3_A:	.long	SDMR3_ADDRESS$/;"	l
SDMR3_A	board/renesas/MigoR/lowlevel_init.S	/^SDMR3_A:	.long	0xFE581180$/;"	l
SDMR3_A	board/renesas/r2dplus/lowlevel_init.S	/^SDMR3_A:	.long	0xFF9400CC	\/* SDMR3 Address *\/$/;"	l
SDMR3_ADDRESS	board/ms7750se/lowlevel_init.S	/^#define SDMR3_ADDRESS	/;"	d	file:
SDMR3_D	board/mpr2/lowlevel_init.S	/^SDMR3_D:	.long	0x440$/;"	l
SDMR3_D	board/ms7720se/lowlevel_init.S	/^SDMR3_D:	.word	0x0000$/;"	l
SDMR3_D	board/ms7722se/lowlevel_init.S	/^SDMR3_D:	.long	0x0$/;"	l
SDMR3_D	board/ms7750se/lowlevel_init.S	/^SDMR3_D:	.long	0x00$/;"	l
SDMR3_D	board/renesas/MigoR/lowlevel_init.S	/^SDMR3_D:	.long	0x0$/;"	l
SDMR3_D0	board/renesas/r2dplus/lowlevel_init.S	/^SDMR3_D0:	.long	0x55$/;"	l
SDMR3_D1	board/renesas/r2dplus/lowlevel_init.S	/^SDMR3_D1:	.long	0x00$/;"	l
SDMRA1A	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	SDMRA1A	/;"	d
SDMRA1B	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	SDMRA1B	/;"	d
SDMRA2A	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	SDMRA2A	/;"	d
SDMRA2B	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	SDMRA2B	/;"	d
SDMRA3A	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	SDMRA3A	/;"	d
SDMRA3B	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define	SDMRA3B	/;"	d
SDP	include/sym53c8xx.h	/^  #define   SDP /;"	d
SDPCR_A	board/ms7722se/lowlevel_init.S	/^SDPCR_A:	.long	SBSC_SDPCR$/;"	l
SDPCR_A	board/renesas/MigoR/lowlevel_init.S	/^SDPCR_A:	.long	SBSC_SDPCR$/;"	l
SDPCR_D	board/ms7722se/lowlevel_init.S	/^SDPCR_D:	.long	0x00000087$/;"	l
SDPCR_D	board/renesas/MigoR/lowlevel_init.S	/^SDPCR_D:	.long	0x00000087$/;"	l
SDPUA	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SDPUA	/;"	d
SDPV2_MPDB_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDPV2_MPDB_GPMC_CONFIG1	/;"	d
SDPV2_MPDB_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDPV2_MPDB_GPMC_CONFIG2	/;"	d
SDPV2_MPDB_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDPV2_MPDB_GPMC_CONFIG3	/;"	d
SDPV2_MPDB_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDPV2_MPDB_GPMC_CONFIG4	/;"	d
SDPV2_MPDB_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDPV2_MPDB_GPMC_CONFIG5	/;"	d
SDPV2_MPDB_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDPV2_MPDB_GPMC_CONFIG6	/;"	d
SDP_3430_SDRC_RFR_CTRL_100MHz	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDP_3430_SDRC_RFR_CTRL_100MHz	/;"	d
SDP_3430_SDRC_RFR_CTRL_133MHz	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDP_3430_SDRC_RFR_CTRL_133MHz	/;"	d
SDP_3430_SDRC_RFR_CTRL_165MHz	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDP_3430_SDRC_RFR_CTRL_165MHz	/;"	d
SDP_3430_SDRC_RFR_CTRL_200MHz	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDP_3430_SDRC_RFR_CTRL_200MHz	/;"	d
SDP_SDRC_DLLAB_CTRL	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDP_SDRC_DLLAB_CTRL	/;"	d
SDR	include/lattice.h	/^#define SDR	/;"	d
SDR0	arch/powerpc/dts/arches.dts	/^	SDR0: sdr {$/;"	l
SDR0	arch/powerpc/dts/canyonlands.dts	/^	SDR0: sdr {$/;"	l
SDR0	arch/powerpc/dts/glacier.dts	/^	SDR0: sdr {$/;"	l
SDR0_AHB_CFG	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_AHB_CFG	/;"	d
SDR0_AMP0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_AMP0	/;"	d
SDR0_AMP1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_AMP1	/;"	d
SDR0_CFGADDR	arch/powerpc/include/asm/ppc4xx.h	/^#define SDR0_CFGADDR	/;"	d
SDR0_CFGDATA	arch/powerpc/include/asm/ppc4xx.h	/^#define SDR0_CFGDATA	/;"	d
SDR0_CP440	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_CP440	/;"	d
SDR0_CRYP0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CRYP0	/;"	d
SDR0_CUST0	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0	/;"	d
SDR0_CUST0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_CUST0	/;"	d
SDR0_CUST0_CHIPSELGAT_DIS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_DIS	/;"	d
SDR0_CUST0_CHIPSELGAT_DIS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_DIS	/;"	d
SDR0_CUST0_CHIPSELGAT_DIS	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_DIS	/;"	d
SDR0_CUST0_CHIPSELGAT_EN0	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_EN0	/;"	d
SDR0_CUST0_CHIPSELGAT_EN0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_EN0	/;"	d
SDR0_CUST0_CHIPSELGAT_EN0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_EN0	/;"	d
SDR0_CUST0_CHIPSELGAT_EN1	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_EN1	/;"	d
SDR0_CUST0_CHIPSELGAT_EN1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_EN1	/;"	d
SDR0_CUST0_CHIPSELGAT_EN1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_EN1	/;"	d
SDR0_CUST0_CHIPSELGAT_EN2	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_EN2	/;"	d
SDR0_CUST0_CHIPSELGAT_EN2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_EN2	/;"	d
SDR0_CUST0_CHIPSELGAT_EN2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_EN2	/;"	d
SDR0_CUST0_CHIPSELGAT_EN3	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_EN3	/;"	d
SDR0_CUST0_CHIPSELGAT_EN3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_EN3	/;"	d
SDR0_CUST0_CHIPSELGAT_EN3	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_EN3	/;"	d
SDR0_CUST0_CHIPSELGAT_ENALL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_ENALL	/;"	d
SDR0_CUST0_CHIPSELGAT_ENALL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_ENALL	/;"	d
SDR0_CUST0_CHIPSELGAT_ENALL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_ENALL	/;"	d
SDR0_CUST0_CHIPSELGAT_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_CHIPSELGAT_MASK	/;"	d
SDR0_CUST0_CHIPSELGAT_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_CHIPSELGAT_MASK	/;"	d
SDR0_CUST0_CHIPSELGAT_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_CHIPSELGAT_MASK	/;"	d
SDR0_CUST0_ENET2_COPPER	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_ENET2_COPPER	/;"	d
SDR0_CUST0_ENET2_FIBER	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_ENET2_FIBER	/;"	d
SDR0_CUST0_ENET2_MASK	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_ENET2_MASK	/;"	d
SDR0_CUST0_ENET3_COPPER	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_ENET3_COPPER	/;"	d
SDR0_CUST0_ENET3_FIBER	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_ENET3_FIBER	/;"	d
SDR0_CUST0_ENET3_MASK	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_ENET3_MASK	/;"	d
SDR0_CUST0_MUX_EMAC_SEL	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_MUX_EMAC_SEL	/;"	d
SDR0_CUST0_MUX_EMAC_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_MUX_EMAC_SEL	/;"	d
SDR0_CUST0_MUX_EMAC_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_MUX_EMAC_SEL	/;"	d
SDR0_CUST0_MUX_EMAC_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_MUX_EMAC_SEL	/;"	d
SDR0_CUST0_MUX_E_N_G_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_MUX_E_N_G_MASK	/;"	d
SDR0_CUST0_MUX_E_N_G_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_MUX_E_N_G_MASK	/;"	d
SDR0_CUST0_MUX_E_N_G_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_MUX_E_N_G_MASK	/;"	d
SDR0_CUST0_MUX_E_N_G_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_MUX_E_N_G_MASK	/;"	d
SDR0_CUST0_MUX_GPIO_SEL	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_MUX_GPIO_SEL	/;"	d
SDR0_CUST0_MUX_GPIO_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_MUX_GPIO_SEL	/;"	d
SDR0_CUST0_MUX_GPIO_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_MUX_GPIO_SEL	/;"	d
SDR0_CUST0_MUX_GPIO_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_MUX_GPIO_SEL	/;"	d
SDR0_CUST0_MUX_NDFC_SEL	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_MUX_NDFC_SEL	/;"	d
SDR0_CUST0_MUX_NDFC_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_MUX_NDFC_SEL	/;"	d
SDR0_CUST0_MUX_NDFC_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_MUX_NDFC_SEL	/;"	d
SDR0_CUST0_MUX_NDFC_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_MUX_NDFC_SEL	/;"	d
SDR0_CUST0_NDFC_ARE_DISABLE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_ARE_DISABLE	/;"	d
SDR0_CUST0_NDFC_ARE_DISABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_ARE_DISABLE	/;"	d
SDR0_CUST0_NDFC_ARE_DISABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_ARE_DISABLE	/;"	d
SDR0_CUST0_NDFC_ARE_DISABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_ARE_DISABLE	/;"	d
SDR0_CUST0_NDFC_ARE_ENABLE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_ARE_ENABLE	/;"	d
SDR0_CUST0_NDFC_ARE_ENABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_ARE_ENABLE	/;"	d
SDR0_CUST0_NDFC_ARE_ENABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_ARE_ENABLE	/;"	d
SDR0_CUST0_NDFC_ARE_ENABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_ARE_ENABLE	/;"	d
SDR0_CUST0_NDFC_ARE_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_ARE_MASK	/;"	d
SDR0_CUST0_NDFC_ARE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_ARE_MASK	/;"	d
SDR0_CUST0_NDFC_ARE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_ARE_MASK	/;"	d
SDR0_CUST0_NDFC_ARE_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_ARE_MASK	/;"	d
SDR0_CUST0_NDFC_BAC_DECODE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BAC_DECODE(/;"	d
SDR0_CUST0_NDFC_BAC_DECODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BAC_DECODE(/;"	d
SDR0_CUST0_NDFC_BAC_DECODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BAC_DECODE(/;"	d
SDR0_CUST0_NDFC_BAC_DECODE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BAC_DECODE(/;"	d
SDR0_CUST0_NDFC_BAC_ENCODE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BAC_ENCODE(/;"	d
SDR0_CUST0_NDFC_BAC_ENCODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BAC_ENCODE(/;"	d
SDR0_CUST0_NDFC_BAC_ENCODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BAC_ENCODE(/;"	d
SDR0_CUST0_NDFC_BAC_ENCODE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BAC_ENCODE(/;"	d
SDR0_CUST0_NDFC_BAC_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BAC_MASK	/;"	d
SDR0_CUST0_NDFC_BAC_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BAC_MASK	/;"	d
SDR0_CUST0_NDFC_BAC_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BAC_MASK	/;"	d
SDR0_CUST0_NDFC_BAC_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BAC_MASK	/;"	d
SDR0_CUST0_NDFC_BP_DECODE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BP_DECODE(/;"	d
SDR0_CUST0_NDFC_BP_DECODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BP_DECODE(/;"	d
SDR0_CUST0_NDFC_BP_DECODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BP_DECODE(/;"	d
SDR0_CUST0_NDFC_BP_DECODE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BP_DECODE(/;"	d
SDR0_CUST0_NDFC_BP_ENCODE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BP_ENCODE(/;"	d
SDR0_CUST0_NDFC_BP_ENCODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BP_ENCODE(/;"	d
SDR0_CUST0_NDFC_BP_ENCODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BP_ENCODE(/;"	d
SDR0_CUST0_NDFC_BP_ENCODE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BP_ENCODE(/;"	d
SDR0_CUST0_NDFC_BP_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BP_MASK	/;"	d
SDR0_CUST0_NDFC_BP_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BP_MASK	/;"	d
SDR0_CUST0_NDFC_BP_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BP_MASK	/;"	d
SDR0_CUST0_NDFC_BP_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BP_MASK	/;"	d
SDR0_CUST0_NDFC_BW_16_BIT	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BW_16_BIT /;"	d
SDR0_CUST0_NDFC_BW_16_BIT	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BW_16_BIT	/;"	d
SDR0_CUST0_NDFC_BW_16_BIT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BW_16_BIT	/;"	d
SDR0_CUST0_NDFC_BW_16_BIT	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BW_16_BIT	/;"	d
SDR0_CUST0_NDFC_BW_8_BIT	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BW_8_BIT /;"	d
SDR0_CUST0_NDFC_BW_8_BIT	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BW_8_BIT	/;"	d
SDR0_CUST0_NDFC_BW_8_BIT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BW_8_BIT	/;"	d
SDR0_CUST0_NDFC_BW_8_BIT	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BW_8_BIT	/;"	d
SDR0_CUST0_NDFC_BW_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_BW_MASK	/;"	d
SDR0_CUST0_NDFC_BW_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_BW_MASK	/;"	d
SDR0_CUST0_NDFC_BW_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_BW_MASK	/;"	d
SDR0_CUST0_NDFC_BW_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_BW_MASK	/;"	d
SDR0_CUST0_NDFC_DISABLE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_DISABLE	/;"	d
SDR0_CUST0_NDFC_DISABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_DISABLE	/;"	d
SDR0_CUST0_NDFC_DISABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_DISABLE	/;"	d
SDR0_CUST0_NDFC_DISABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_DISABLE	/;"	d
SDR0_CUST0_NDFC_ENABLE	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_ENABLE	/;"	d
SDR0_CUST0_NDFC_ENABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_ENABLE	/;"	d
SDR0_CUST0_NDFC_ENABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_ENABLE	/;"	d
SDR0_CUST0_NDFC_ENABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_ENABLE	/;"	d
SDR0_CUST0_NDFC_EN_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NDFC_EN_MASK	/;"	d
SDR0_CUST0_NDFC_EN_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDFC_EN_MASK	/;"	d
SDR0_CUST0_NDFC_EN_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDFC_EN_MASK	/;"	d
SDR0_CUST0_NDFC_EN_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDFC_EN_MASK	/;"	d
SDR0_CUST0_NDRSC_DECODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDRSC_DECODE(/;"	d
SDR0_CUST0_NDRSC_DECODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDRSC_DECODE(/;"	d
SDR0_CUST0_NDRSC_DECODE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDRSC_DECODE(/;"	d
SDR0_CUST0_NDRSC_ENCODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDRSC_ENCODE(/;"	d
SDR0_CUST0_NDRSC_ENCODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDRSC_ENCODE(/;"	d
SDR0_CUST0_NDRSC_ENCODE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDRSC_ENCODE(/;"	d
SDR0_CUST0_NDRSC_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NDRSC_MASK	/;"	d
SDR0_CUST0_NDRSC_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NDRSC_MASK	/;"	d
SDR0_CUST0_NDRSC_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NDRSC_MASK	/;"	d
SDR0_CUST0_NRB_BUSY	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NRB_BUSY	/;"	d
SDR0_CUST0_NRB_BUSY	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NRB_BUSY	/;"	d
SDR0_CUST0_NRB_BUSY	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NRB_BUSY	/;"	d
SDR0_CUST0_NRB_BUSY	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NRB_BUSY	/;"	d
SDR0_CUST0_NRB_MASK	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NRB_MASK	/;"	d
SDR0_CUST0_NRB_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NRB_MASK	/;"	d
SDR0_CUST0_NRB_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NRB_MASK	/;"	d
SDR0_CUST0_NRB_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NRB_MASK	/;"	d
SDR0_CUST0_NRB_READY	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_CUST0_NRB_READY	/;"	d
SDR0_CUST0_NRB_READY	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_CUST0_NRB_READY	/;"	d
SDR0_CUST0_NRB_READY	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_CUST0_NRB_READY	/;"	d
SDR0_CUST0_NRB_READY	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_CUST0_NRB_READY	/;"	d
SDR0_CUST0_RGMII2_DECODE	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_DECODE(/;"	d
SDR0_CUST0_RGMII2_DISAB	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_DISAB	/;"	d
SDR0_CUST0_RGMII2_ENCODE	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_ENCODE(/;"	d
SDR0_CUST0_RGMII2_GMII	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_GMII	/;"	d
SDR0_CUST0_RGMII2_MASK	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_MASK	/;"	d
SDR0_CUST0_RGMII2_RGMII	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_RGMII	/;"	d
SDR0_CUST0_RGMII2_RTBI	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_RTBI	/;"	d
SDR0_CUST0_RGMII2_TBI	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII2_TBI	/;"	d
SDR0_CUST0_RGMII3_DECODE	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_DECODE(/;"	d
SDR0_CUST0_RGMII3_DISAB	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_DISAB	/;"	d
SDR0_CUST0_RGMII3_ENCODE	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_ENCODE(/;"	d
SDR0_CUST0_RGMII3_GMII	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_GMII	/;"	d
SDR0_CUST0_RGMII3_MASK	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_MASK	/;"	d
SDR0_CUST0_RGMII3_RGMII	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_RGMII	/;"	d
SDR0_CUST0_RGMII3_RTBI	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_RTBI	/;"	d
SDR0_CUST0_RGMII3_TBI	board/amcc/yucca/yucca.h	/^#define SDR0_CUST0_RGMII3_TBI	/;"	d
SDR0_CUST1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_CUST1	/;"	d
SDR0_CUST2	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_CUST2	/;"	d
SDR0_CUST3	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_CUST3	/;"	d
SDR0_DDR0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_DDR0	/;"	d
SDR0_DDR0_DDRM_DECODE	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_DDR0_DDRM_DECODE(/;"	d
SDR0_DDRCFG	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_DDRCFG	/;"	d
SDR0_EBC	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_EBC	/;"	d
SDR0_ECID0	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_ECID0	/;"	d
SDR0_ECID0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_ECID0	/;"	d
SDR0_ECID1	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_ECID1	/;"	d
SDR0_ECID1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_ECID1	/;"	d
SDR0_ECID2	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_ECID2	/;"	d
SDR0_ECID2	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_ECID2	/;"	d
SDR0_ECID3	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_ECID3	/;"	d
SDR0_ECID3	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_ECID3	/;"	d
SDR0_EMAC0RXST	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_EMAC0RXST /;"	d
SDR0_EMAC0TXST	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_EMAC0TXST	/;"	d
SDR0_ETH_CFG	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG	/;"	d
SDR0_ETH_CFG_CLK_SEL_V	drivers/net/4xx_enet.c	/^#define SDR0_ETH_CFG_CLK_SEL_V(/;"	d	file:
SDR0_ETH_CFG_EMAC0_PHY_CLK_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_EMAC0_PHY_CLK_SEL	/;"	d
SDR0_ETH_CFG_EMAC1_PHY_CLK_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_EMAC1_PHY_CLK_SEL	/;"	d
SDR0_ETH_CFG_EMAC2_PHY_CLK_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_EMAC2_PHY_CLK_SEL	/;"	d
SDR0_ETH_CFG_EMAC3_PHY_CLK_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_EMAC3_PHY_CLK_SEL	/;"	d
SDR0_ETH_CFG_EMAC_0_3_SWAP	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_EMAC_0_3_SWAP	/;"	d
SDR0_ETH_CFG_EMAC_2_1_SWAP	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_EMAC_2_1_SWAP	/;"	d
SDR0_ETH_CFG_GMC0_BRIDGE_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_GMC0_BRIDGE_SEL	/;"	d
SDR0_ETH_CFG_GMC1_BRIDGE_SEL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_GMC1_BRIDGE_SEL	/;"	d
SDR0_ETH_CFG_MDIO_SEL_EMAC0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_MDIO_SEL_EMAC0	/;"	d
SDR0_ETH_CFG_MDIO_SEL_EMAC1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_MDIO_SEL_EMAC1	/;"	d
SDR0_ETH_CFG_MDIO_SEL_EMAC2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_MDIO_SEL_EMAC2	/;"	d
SDR0_ETH_CFG_MDIO_SEL_EMAC3	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_MDIO_SEL_EMAC3	/;"	d
SDR0_ETH_CFG_MDIO_SEL_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_MDIO_SEL_MASK	/;"	d
SDR0_ETH_CFG_SGMII0_ENABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII0_ENABLE	/;"	d
SDR0_ETH_CFG_SGMII0_LPBK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII0_LPBK	/;"	d
SDR0_ETH_CFG_SGMII1_ENABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII1_ENABLE	/;"	d
SDR0_ETH_CFG_SGMII1_LPBK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII1_LPBK	/;"	d
SDR0_ETH_CFG_SGMII2_ENABLE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII2_ENABLE	/;"	d
SDR0_ETH_CFG_SGMII2_LPBK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII2_LPBK	/;"	d
SDR0_ETH_CFG_SGMII3_LPBK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII3_LPBK	/;"	d
SDR0_ETH_CFG_SGMII_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_SGMII_MASK	/;"	d
SDR0_ETH_CFG_TAHOE0_BYPASS	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_TAHOE0_BYPASS	/;"	d
SDR0_ETH_CFG_TAHOE1_BYPASS	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_CFG_TAHOE1_BYPASS	/;"	d
SDR0_ETH_PLL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_PLL	/;"	d
SDR0_ETH_PLL_PLLLOCK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_PLL_PLLLOCK	/;"	d
SDR0_ETH_STS	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_ETH_STS	/;"	d
SDR0_ICINTSTAT	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR0_ICINTSTAT	/;"	d
SDR0_MFR	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_MFR	/;"	d
SDR0_MFR	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_MFR	/;"	d
SDR0_MFR_ECS_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_MFR_ECS_MASK	/;"	d
SDR0_MFR_ERRATA3_EN0	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ERRATA3_EN0	/;"	d
SDR0_MFR_ERRATA3_EN1	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ERRATA3_EN1	/;"	d
SDR0_MFR_ETH0_CLK_SEL_EXT	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ETH0_CLK_SEL_EXT	/;"	d
SDR0_MFR_ETH0_CLK_SEL_EXT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ETH0_CLK_SEL_EXT	/;"	d
SDR0_MFR_ETH0_CLK_SEL_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ETH0_CLK_SEL_MASK	/;"	d
SDR0_MFR_ETH0_CLK_SEL_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ETH0_CLK_SEL_MASK	/;"	d
SDR0_MFR_ETH1_CLK_SEL_EXT	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ETH1_CLK_SEL_EXT	/;"	d
SDR0_MFR_ETH1_CLK_SEL_EXT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ETH1_CLK_SEL_EXT	/;"	d
SDR0_MFR_ETH1_CLK_SEL_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ETH1_CLK_SEL_MASK	/;"	d
SDR0_MFR_ETH1_CLK_SEL_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ETH1_CLK_SEL_MASK	/;"	d
SDR0_MFR_ETH_CLK_SEL_V	drivers/net/4xx_enet.c	/^#define SDR0_MFR_ETH_CLK_SEL_V(/;"	d	file:
SDR0_MFR_ETH_CLK_SEL_V	post/cpu/ppc4xx/ether.c	/^#define SDR0_MFR_ETH_CLK_SEL_V(/;"	d	file:
SDR0_MFR_FIXD	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_MFR_FIXD	/;"	d
SDR0_MFR_FIXD	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_MFR_FIXD	/;"	d
SDR0_MFR_PKT_REJ_EN	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_PKT_REJ_EN	/;"	d
SDR0_MFR_PKT_REJ_EN	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_PKT_REJ_EN	/;"	d
SDR0_MFR_PKT_REJ_EN0	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_PKT_REJ_EN0	/;"	d
SDR0_MFR_PKT_REJ_EN0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_PKT_REJ_EN0	/;"	d
SDR0_MFR_PKT_REJ_EN1	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_PKT_REJ_EN1	/;"	d
SDR0_MFR_PKT_REJ_EN1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_PKT_REJ_EN1	/;"	d
SDR0_MFR_PKT_REJ_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_PKT_REJ_MASK	/;"	d
SDR0_MFR_PKT_REJ_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_PKT_REJ_MASK	/;"	d
SDR0_MFR_PKT_REJ_POL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_PKT_REJ_POL	/;"	d
SDR0_MFR_PKT_REJ_POL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_PKT_REJ_POL	/;"	d
SDR0_MFR_ZMII_MODE_BIT0	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_BIT0	/;"	d
SDR0_MFR_ZMII_MODE_BIT0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZMII_MODE_BIT0	/;"	d
SDR0_MFR_ZMII_MODE_BIT1	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_BIT1	/;"	d
SDR0_MFR_ZMII_MODE_BIT1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZMII_MODE_BIT1	/;"	d
SDR0_MFR_ZMII_MODE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_MASK	/;"	d
SDR0_MFR_ZMII_MODE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZMII_MODE_MASK	/;"	d
SDR0_MFR_ZMII_MODE_MII	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_MII	/;"	d
SDR0_MFR_ZMII_MODE_MII	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZMII_MODE_MII	/;"	d
SDR0_MFR_ZMII_MODE_RMII_100M	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_RMII_100M	/;"	d
SDR0_MFR_ZMII_MODE_RMII_10M	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_RMII_10M	/;"	d
SDR0_MFR_ZMII_MODE_SMII	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZMII_MODE_SMII	/;"	d
SDR0_MFR_ZMII_MODE_SMII	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZMII_MODE_SMII	/;"	d
SDR0_MFR_ZM_DECODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZM_DECODE(/;"	d
SDR0_MFR_ZM_DECODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZM_DECODE(/;"	d
SDR0_MFR_ZM_ENCODE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_MFR_ZM_ENCODE(/;"	d
SDR0_MFR_ZM_ENCODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_MFR_ZM_ENCODE(/;"	d
SDR0_NAND0	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR0_NAND0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc440gp.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_PCI0	/;"	d
SDR0_PCI0_PAE_MASK	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PCI0_PAE_MASK	/;"	d
SDR0_PFC0	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC0	/;"	d
SDR0_PFC0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0	/;"	d
SDR0_PFC0_GEIE_MASK	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0_GEIE_MASK	/;"	d
SDR0_PFC0_GEIE_NOTRE	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0_GEIE_NOTRE	/;"	d
SDR0_PFC0_GEIE_TRE	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0_GEIE_TRE	/;"	d
SDR0_PFC0_TRE_DISABLE	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0_TRE_DISABLE	/;"	d
SDR0_PFC0_TRE_ENABLE	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0_TRE_ENABLE	/;"	d
SDR0_PFC0_TRE_MASK	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC0_TRE_MASK	/;"	d
SDR0_PFC1	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1	/;"	d
SDR0_PFC1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC1	/;"	d
SDR0_PFC1_AHBSWAP	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_AHBSWAP	/;"	d
SDR0_PFC1_CTEMS_CPUTRACE	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_PFC1_CTEMS_CPUTRACE	/;"	d
SDR0_PFC1_CTEMS_EMS	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_PFC1_CTEMS_EMS	/;"	d
SDR0_PFC1_CTEMS_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_PFC1_CTEMS_MASK	/;"	d
SDR0_PFC1_DIS_DMAR_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_DIS_DMAR_SEL	/;"	d
SDR0_PFC1_DIS_DMAR_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_DIS_DMAR_SEL	/;"	d
SDR0_PFC1_DIS_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_DIS_MASK	/;"	d
SDR0_PFC1_DIS_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_DIS_MASK	/;"	d
SDR0_PFC1_DIS_UICIRQ5_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_DIS_UICIRQ5_SEL	/;"	d
SDR0_PFC1_DIS_UICIRQ5_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_DIS_UICIRQ5_SEL	/;"	d
SDR0_PFC1_DMAAEN	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_DMAAEN	/;"	d
SDR0_PFC1_DMADEN	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_DMADEN	/;"	d
SDR0_PFC1_EM_1000	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_PFC1_EM_1000	/;"	d
SDR0_PFC1_EM_1000	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PFC1_EM_1000	/;"	d
SDR0_PFC1_EPS_DECODE	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_PFC1_EPS_DECODE(/;"	d
SDR0_PFC1_ERE_EXTR_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_ERE_EXTR_SEL	/;"	d
SDR0_PFC1_ERE_EXTR_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_ERE_EXTR_SEL	/;"	d
SDR0_PFC1_ERE_GPIO0_27_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_ERE_GPIO0_27_SEL	/;"	d
SDR0_PFC1_ERE_GPIO0_27_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_ERE_GPIO0_27_SEL	/;"	d
SDR0_PFC1_ERE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_ERE_MASK	/;"	d
SDR0_PFC1_ERE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_ERE_MASK	/;"	d
SDR0_PFC1_GFGGI_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_GFGGI_MASK	/;"	d
SDR0_PFC1_GFGGI_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_GFGGI_MASK	/;"	d
SDR0_PFC1_GPT_FREQ	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_GPT_FREQ	/;"	d
SDR0_PFC1_PLB_PME_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_PLB_PME_MASK	/;"	d
SDR0_PFC1_PLB_PME_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_PLB_PME_MASK	/;"	d
SDR0_PFC1_PLB_PME_PLB3_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_PLB_PME_PLB3_SEL	/;"	d
SDR0_PFC1_PLB_PME_PLB3_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_PLB_PME_PLB3_SEL	/;"	d
SDR0_PFC1_PLB_PME_PLB4_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_PLB_PME_PLB4_SEL	/;"	d
SDR0_PFC1_PLB_PME_PLB4_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_PLB_PME_PLB4_SEL	/;"	d
SDR0_PFC1_SELECT_CONFIG_1_1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_1_1	/;"	d
SDR0_PFC1_SELECT_CONFIG_1_2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_1_2	/;"	d
SDR0_PFC1_SELECT_CONFIG_2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_2	/;"	d
SDR0_PFC1_SELECT_CONFIG_3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_3	/;"	d
SDR0_PFC1_SELECT_CONFIG_4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_4	/;"	d
SDR0_PFC1_SELECT_CONFIG_5	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_5	/;"	d
SDR0_PFC1_SELECT_CONFIG_6	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_CONFIG_6	/;"	d
SDR0_PFC1_SELECT_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SELECT_MASK	/;"	d
SDR0_PFC1_SIS	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_SIS	/;"	d
SDR0_PFC1_SIS_IIC1_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_SIS_IIC1_SEL	/;"	d
SDR0_PFC1_SIS_IIC1_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SIS_IIC1_SEL	/;"	d
SDR0_PFC1_SIS_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_SIS_MASK	/;"	d
SDR0_PFC1_SIS_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SIS_MASK	/;"	d
SDR0_PFC1_SIS_SCP_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_SIS_SCP_SEL	/;"	d
SDR0_PFC1_SIS_SCP_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_SIS_SCP_SEL	/;"	d
SDR0_PFC1_U0IM	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_U0IM	/;"	d
SDR0_PFC1_U0IM_4PINS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U0IM_4PINS	/;"	d
SDR0_PFC1_U0IM_4PINS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U0IM_4PINS	/;"	d
SDR0_PFC1_U0IM_8PINS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U0IM_8PINS	/;"	d
SDR0_PFC1_U0IM_8PINS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U0IM_8PINS	/;"	d
SDR0_PFC1_U0IM_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U0IM_MASK	/;"	d
SDR0_PFC1_U0IM_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U0IM_MASK	/;"	d
SDR0_PFC1_U0ME	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_U0ME	/;"	d
SDR0_PFC1_U0ME_CTS_RTS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U0ME_CTS_RTS	/;"	d
SDR0_PFC1_U0ME_CTS_RTS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U0ME_CTS_RTS	/;"	d
SDR0_PFC1_U0ME_DSR_DTR	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U0ME_DSR_DTR	/;"	d
SDR0_PFC1_U0ME_DSR_DTR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U0ME_DSR_DTR	/;"	d
SDR0_PFC1_U0ME_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U0ME_MASK	/;"	d
SDR0_PFC1_U0ME_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U0ME_MASK	/;"	d
SDR0_PFC1_U1ME	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_U1ME	/;"	d
SDR0_PFC1_U1ME_CTS_RTS	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U1ME_CTS_RTS	/;"	d
SDR0_PFC1_U1ME_CTS_RTS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U1ME_CTS_RTS	/;"	d
SDR0_PFC1_U1ME_DSR_DTR	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U1ME_DSR_DTR	/;"	d
SDR0_PFC1_U1ME_DSR_DTR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U1ME_DSR_DTR	/;"	d
SDR0_PFC1_U1ME_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_U1ME_MASK	/;"	d
SDR0_PFC1_U1ME_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_U1ME_MASK	/;"	d
SDR0_PFC1_UES_EBCHR_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_UES_EBCHR_SEL	/;"	d
SDR0_PFC1_UES_EBCHR_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_UES_EBCHR_SEL	/;"	d
SDR0_PFC1_UES_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_UES_MASK	/;"	d
SDR0_PFC1_UES_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_UES_MASK	/;"	d
SDR0_PFC1_UES_USB2D_SEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_UES_USB2D_SEL	/;"	d
SDR0_PFC1_UES_USB2D_SEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_UES_USB2D_SEL	/;"	d
SDR0_PFC1_UPR_DISABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_UPR_DISABLE	/;"	d
SDR0_PFC1_UPR_DISABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_UPR_DISABLE	/;"	d
SDR0_PFC1_UPR_ENABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_UPR_ENABLE	/;"	d
SDR0_PFC1_UPR_ENABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_UPR_ENABLE	/;"	d
SDR0_PFC1_UPR_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_PFC1_UPR_MASK	/;"	d
SDR0_PFC1_UPR_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC1_UPR_MASK	/;"	d
SDR0_PFC1_USBBIGEN	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_USBBIGEN	/;"	d
SDR0_PFC1_USBEN	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_PFC1_USBEN	/;"	d
SDR0_PFC2	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC2 /;"	d
SDR0_PFC2_SELECT_CONFIG_1_1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_1_1	/;"	d
SDR0_PFC2_SELECT_CONFIG_1_2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_1_2	/;"	d
SDR0_PFC2_SELECT_CONFIG_2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_2	/;"	d
SDR0_PFC2_SELECT_CONFIG_3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_3	/;"	d
SDR0_PFC2_SELECT_CONFIG_4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_4	/;"	d
SDR0_PFC2_SELECT_CONFIG_5	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_5	/;"	d
SDR0_PFC2_SELECT_CONFIG_6	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_CONFIG_6	/;"	d
SDR0_PFC2_SELECT_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_PFC2_SELECT_MASK	/;"	d
SDR0_PFC4	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PFC4	/;"	d
SDR0_PINSTP	arch/powerpc/include/asm/ppc405.h	/^#define SDR0_PINSTP	/;"	d
SDR0_PINSTP	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_PINSTP	/;"	d
SDR0_PINSTP_BOOTSTRAP_IIC_50_EN	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PINSTP_BOOTSTRAP_IIC_50_EN	/;"	d
SDR0_PINSTP_BOOTSTRAP_IIC_54_EN	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PINSTP_BOOTSTRAP_IIC_54_EN	/;"	d
SDR0_PINSTP_BOOTSTRAP_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PINSTP_BOOTSTRAP_MASK	/;"	d
SDR0_PINSTP_BOOTSTRAP_SETTINGS0	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PINSTP_BOOTSTRAP_SETTINGS0	/;"	d
SDR0_PINSTP_BOOTSTRAP_SETTINGS1	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_PINSTP_BOOTSTRAP_SETTINGS1	/;"	d
SDR0_PINSTP_SHIFT	arch/powerpc/cpu/ppc4xx/cpu.c	/^#define SDR0_PINSTP_SHIFT	/;"	d	file:
SDR0_PSTRP0	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0	/;"	d
SDR0_PSTRP0	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0	/;"	d
SDR0_PSTRP0	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0	/;"	d
SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN /;"	d
SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN /;"	d
SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN /;"	d
SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN /;"	d
SDR0_PSTRP0_BOOTSTRAP_MASK	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_MASK	/;"	d
SDR0_PSTRP0_BOOTSTRAP_MASK	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_MASK	/;"	d
SDR0_PSTRP0_BOOTSTRAP_MASK	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_MASK	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS0	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS0 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS0	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS0	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS0	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS0	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS1	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS1 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS1	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS1	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS1	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS1	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS2	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS2 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS2	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS2	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS2	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS2	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS3	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS3 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS3	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS3	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS3	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS3	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS4	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS4 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS4	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS4	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS4	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS4	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS5	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS5 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS5	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS5	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS5	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS5	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS6	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS6 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS6	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS6	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS6	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS6	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS7	board/amcc/bamboo/bamboo.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS7 /;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS7	board/amcc/redwood/redwood.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS7	/;"	d
SDR0_PSTRP0_BOOTSTRAP_SETTINGS7	board/amcc/yucca/yucca.h	/^#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS7	/;"	d
SDR0_SDCS0	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_SDCS0	/;"	d
SDR0_SDCS0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SDCS0	/;"	d
SDR0_SDCS_SDD	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_SDCS_SDD	/;"	d
SDR0_SDCS_SDD	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SDCS_SDD	/;"	d
SDR0_SDSTP0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SDSTP0	/;"	d
SDR0_SDSTP1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SDSTP1	/;"	d
SDR0_SDSTP1_BOOT_SEL_EBC	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_BOOT_SEL_EBC /;"	d
SDR0_SDSTP1_BOOT_SEL_EBC	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SEL_EBC	/;"	d
SDR0_SDSTP1_BOOT_SEL_MASK	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_BOOT_SEL_MASK /;"	d
SDR0_SDSTP1_BOOT_SEL_MASK	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SEL_MASK	/;"	d
SDR0_SDSTP1_BOOT_SEL_NDFC	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_BOOT_SEL_NDFC /;"	d
SDR0_SDSTP1_BOOT_SEL_PCI	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_BOOT_SEL_PCI /;"	d
SDR0_SDSTP1_BOOT_SEL_PCI	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SEL_PCI	/;"	d
SDR0_SDSTP1_BOOT_SIZE_16MB	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SIZE_16MB	/;"	d
SDR0_SDSTP1_BOOT_SIZE_2MB	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SIZE_2MB	/;"	d
SDR0_SDSTP1_BOOT_SIZE_4MB	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SIZE_4MB	/;"	d
SDR0_SDSTP1_BOOT_SIZE_8MB	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_BOOT_SIZE_8MB	/;"	d
SDR0_SDSTP1_EBCW_16_BITS	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_EBCW_16_BITS	/;"	d
SDR0_SDSTP1_EBCW_8_BITS	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_EBCW_8_BITS	/;"	d
SDR0_SDSTP1_EBCW_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_EBCW_MASK	/;"	d
SDR0_SDSTP1_EBC_ROM_BS_16BIT	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_EBC_ROM_BS_16BIT /;"	d
SDR0_SDSTP1_EBC_ROM_BS_16BIT	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_EBC_ROM_BS_16BIT	/;"	d
SDR0_SDSTP1_EBC_ROM_BS_32BIT	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_EBC_ROM_BS_32BIT /;"	d
SDR0_SDSTP1_EBC_ROM_BS_8BIT	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_EBC_ROM_BS_8BIT /;"	d
SDR0_SDSTP1_EBC_ROM_BS_8BIT	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_EBC_ROM_BS_8BIT	/;"	d
SDR0_SDSTP1_EBC_ROM_BS_MASK	board/amcc/bamboo/bamboo.h	/^#define	  SDR0_SDSTP1_EBC_ROM_BS_MASK /;"	d
SDR0_SDSTP1_EBC_ROM_BS_MASK	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_EBC_ROM_BS_MASK	/;"	d
SDR0_SDSTP1_EBC_SIZE_MASK	board/amcc/yucca/yucca.h	/^#define	SDR0_SDSTP1_EBC_SIZE_MASK	/;"	d
SDR0_SDSTP1_ERPN_EBC	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_ERPN_EBC	/;"	d
SDR0_SDSTP1_ERPN_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_ERPN_MASK	/;"	d
SDR0_SDSTP1_ERPN_PCI	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_ERPN_PCI	/;"	d
SDR0_SDSTP1_PAE_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_SDSTP1_PAE_MASK	/;"	d
SDR0_SDSTP1_PAE_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SDSTP1_PAE_MASK	/;"	d
SDR0_SDSTP1_PAE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_SDSTP1_PAE_MASK	/;"	d
SDR0_SDSTP1_PAE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_SDSTP1_PAE_MASK	/;"	d
SDR0_SDSTP1_PAE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_PAE_MASK	/;"	d
SDR0_SDSTP1_PAE_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SDSTP1_PAE_MASK	/;"	d
SDR0_SDSTP1_PAME_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_SDSTP1_PAME_MASK	/;"	d
SDR0_SDSTP1_PAME_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SDSTP1_PAME_MASK	/;"	d
SDR0_SDSTP1_PISE_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_SDSTP1_PISE_MASK	/;"	d
SDR0_SDSTP1_PISE_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_SDSTP1_PISE_MASK	/;"	d
SDR0_SDSTP1_PISE_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP1_PISE_MASK	/;"	d
SDR0_SDSTP1_PISE_MASK	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SDSTP1_PISE_MASK	/;"	d
SDR0_SDSTP2	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_SDSTP2	/;"	d
SDR0_SDSTP2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SDSTP2	/;"	d
SDR0_SDSTP2	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_SDSTP2	/;"	d
SDR0_SDSTP2	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_SDSTP2	/;"	d
SDR0_SDSTP2	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP2	/;"	d
SDR0_SDSTP3	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_SDSTP3	/;"	d
SDR0_SDSTP3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SDSTP3	/;"	d
SDR0_SDSTP3	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_SDSTP3	/;"	d
SDR0_SDSTP3	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_SDSTP3	/;"	d
SDR0_SDSTP3	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SDSTP3	/;"	d
SDR0_SRST	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_SRST	/;"	d
SDR0_SRST	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SRST	/;"	d
SDR0_SRST0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SRST0	/;"	d
SDR0_SRST0_BGI	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_BGI	/;"	d
SDR0_SRST0_BGO	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_BGO	/;"	d
SDR0_SRST0_BGO	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_BGO	/;"	d
SDR0_SRST0_CPM0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_CPM0	/;"	d
SDR0_SRST0_CPM0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_CPM0	/;"	d
SDR0_SRST0_DMA	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_DMA	/;"	d
SDR0_SRST0_DMAC	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_DMAC	/;"	d
SDR0_SRST0_DMC	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_DMC	/;"	d
SDR0_SRST0_DMC	arch/powerpc/include/asm/ppc440sp.h	/^#define SDR0_SRST0_DMC	/;"	d
SDR0_SRST0_DMC	arch/powerpc/include/asm/ppc440spe.h	/^#define SDR0_SRST0_DMC	/;"	d
SDR0_SRST0_DMC	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_DMC	/;"	d
SDR0_SRST0_DMC	arch/powerpc/include/asm/ppc460sx.h	/^#define SDR0_SRST0_DMC	/;"	d
SDR0_SRST0_EBC	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_EBC	/;"	d
SDR0_SRST0_EBC	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_EBC	/;"	d
SDR0_SRST0_EMAC0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_EMAC0	/;"	d
SDR0_SRST0_EMAC1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_EMAC1	/;"	d
SDR0_SRST0_GPIO	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_GPIO	/;"	d
SDR0_SRST0_GPIO0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_GPIO0	/;"	d
SDR0_SRST0_GPIO1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_GPIO1	/;"	d
SDR0_SRST0_GPT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_GPT	/;"	d
SDR0_SRST0_GPT	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_GPT	/;"	d
SDR0_SRST0_GPTR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_GPTR	/;"	d
SDR0_SRST0_GPTR	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_GPTR /;"	d
SDR0_SRST0_IIC0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_IIC0	/;"	d
SDR0_SRST0_IIC0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_IIC0	/;"	d
SDR0_SRST0_IIC1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_IIC1	/;"	d
SDR0_SRST0_IIC1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_IIC1	/;"	d
SDR0_SRST0_IMU	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_IMU	/;"	d
SDR0_SRST0_L2CACHE	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_L2CACHE	/;"	d
SDR0_SRST0_MAL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_MAL	/;"	d
SDR0_SRST0_MAL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_MAL	/;"	d
SDR0_SRST0_OCM	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_OCM	/;"	d
SDR0_SRST0_OPB	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_OPB	/;"	d
SDR0_SRST0_OPB	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_OPB	/;"	d
SDR0_SRST0_P3P4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_P3P4	/;"	d
SDR0_SRST0_P4P3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_P4P3	/;"	d
SDR0_SRST0_PCI	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_PCI	/;"	d
SDR0_SRST0_PCI	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_PCI	/;"	d
SDR0_SRST0_PLB3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_PLB3	/;"	d
SDR0_SRST0_PLB4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_PLB4	/;"	d
SDR0_SRST0_PLB4	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_PLB4	/;"	d
SDR0_SRST0_SCP	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_SCP	/;"	d
SDR0_SRST0_SRAM	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_SRAM	/;"	d
SDR0_SRST0_UART0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_UART0	/;"	d
SDR0_SRST0_UART0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UART0	/;"	d
SDR0_SRST0_UART1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_UART1	/;"	d
SDR0_SRST0_UART1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UART1	/;"	d
SDR0_SRST0_UART2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_UART2	/;"	d
SDR0_SRST0_UART2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UART2	/;"	d
SDR0_SRST0_UART3	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_UART3	/;"	d
SDR0_SRST0_UART3	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UART3	/;"	d
SDR0_SRST0_UIC0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_UIC0	/;"	d
SDR0_SRST0_UIC0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UIC0	/;"	d
SDR0_SRST0_UIC1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_UIC1	/;"	d
SDR0_SRST0_UIC1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UIC1	/;"	d
SDR0_SRST0_UIC2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UIC2	/;"	d
SDR0_SRST0_UIC3	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST0_UIC3	/;"	d
SDR0_SRST0_USB2D	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_USB2D	/;"	d
SDR0_SRST0_USB2H	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_USB2H	/;"	d
SDR0_SRST0_ZMII	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST0_ZMII	/;"	d
SDR0_SRST1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_SRST1	/;"	d
SDR0_SRST1_AHB	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_AHB	/;"	d
SDR0_SRST1_AHBDMAC	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_AHBDMAC	/;"	d
SDR0_SRST1_AHBICM	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_AHBICM	/;"	d
SDR0_SRST1_CPM1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_CPM1	/;"	d
SDR0_SRST1_CRYP0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_CRYP0	/;"	d
SDR0_SRST1_DMA4	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_DMA4	/;"	d
SDR0_SRST1_DMA4	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_DMA4	/;"	d
SDR0_SRST1_DMA4CH	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_DMA4CH	/;"	d
SDR0_SRST1_DMA4CH	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_DMA4CH	/;"	d
SDR0_SRST1_EIP94	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_EIP94	/;"	d
SDR0_SRST1_EIPPKP	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_EIPPKP	/;"	d
SDR0_SRST1_EMAC0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_EMAC0	/;"	d
SDR0_SRST1_EMAC1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_EMAC1	/;"	d
SDR0_SRST1_EMAC2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_EMAC2	/;"	d
SDR0_SRST1_EMAC3	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_EMAC3	/;"	d
SDR0_SRST1_ETHPLL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_ETHPLL	/;"	d
SDR0_SRST1_ETHPLL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_ETHPLL	/;"	d
SDR0_SRST1_FPU	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_FPU /;"	d
SDR0_SRST1_KASU0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_KASU0	/;"	d
SDR0_SRST1_NDFC	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_NDFC	/;"	d
SDR0_SRST1_NDFC	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_NDFC	/;"	d
SDR0_SRST1_OPB2PLB40	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_OPB2PLB40	/;"	d
SDR0_SRST1_OPBA1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_OPBA1	/;"	d
SDR0_SRST1_OPBA2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_OPBA2	/;"	d
SDR0_SRST1_P4OPB0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_P4OPB0	/;"	d
SDR0_SRST1_PLB42OPB0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_PLB42OPB0	/;"	d
SDR0_SRST1_PLB42OPB1	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_PLB42OPB1	/;"	d
SDR0_SRST1_PLBARB	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_PLBARB	/;"	d
SDR0_SRST1_RGMII0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_RGMII0	/;"	d
SDR0_SRST1_RGMII0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_RGMII0	/;"	d
SDR0_SRST1_RGMII1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_RGMII1	/;"	d
SDR0_SRST1_RLL	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_RLL	/;"	d
SDR0_SRST1_SATA	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SATA	/;"	d
SDR0_SRST1_SATAPHY	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SATAPHY	/;"	d
SDR0_SRST1_SCP	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SCP	/;"	d
SDR0_SRST1_SGMII0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SGMII0	/;"	d
SDR0_SRST1_SGMII1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SGMII1	/;"	d
SDR0_SRST1_SGMII2	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SGMII2	/;"	d
SDR0_SRST1_SRAM0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_SRAM0	/;"	d
SDR0_SRST1_SRIODEV	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SRIODEV	/;"	d
SDR0_SRST1_SRIOPCS	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SRIOPCS	/;"	d
SDR0_SRST1_SRIOPLB	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_SRIOPLB	/;"	d
SDR0_SRST1_TAHOE0	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_TAHOE0	/;"	d
SDR0_SRST1_TAHOE1	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_TAHOE1	/;"	d
SDR0_SRST1_UIC2	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_UIC2	/;"	d
SDR0_SRST1_USB20PHY	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_USB20PHY	/;"	d
SDR0_SRST1_USB2HPHY	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_USB2HPHY	/;"	d
SDR0_SRST1_USB2HUTMI	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_SRST1_USB2HUTMI	/;"	d
SDR0_SRST1_USBHOST	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_USBHOST	/;"	d
SDR0_SRST1_USBOTG	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_USBOTG	/;"	d
SDR0_SRST1_USBOTGPHY	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_USBOTGPHY	/;"	d
SDR0_SRST1_ZMII	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_SRST1_ZMII	/;"	d
SDR0_SRST_DMC	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_SRST_DMC	/;"	d
SDR0_SRST_DMC	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_SRST_DMC	/;"	d
SDR0_SRST_DMC	arch/powerpc/include/asm/ppc440gx.h	/^#define SDR0_SRST_DMC	/;"	d
SDR0_UART0	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_UART0	/;"	d
SDR0_UART0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_UART0	/;"	d
SDR0_UART1	arch/powerpc/include/asm/ppc405ex.h	/^#define SDR0_UART1	/;"	d
SDR0_UART1	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_UART1	/;"	d
SDR0_UART2	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_UART2	/;"	d
SDR0_UART3	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_UART3	/;"	d
SDR0_ULTRA0	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR0_ULTRA0	/;"	d
SDR0_ULTRA1	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR0_ULTRA1	/;"	d
SDR0_USB0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_USB0	/;"	d
SDR0_USB0_LEEN_DISABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_USB0_LEEN_DISABLE	/;"	d
SDR0_USB0_LEEN_ENABLE	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_USB0_LEEN_ENABLE	/;"	d
SDR0_USB0_LEEN_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_USB0_LEEN_MASK	/;"	d
SDR0_USB0_USB11D_DEVSEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_USB0_USB11D_DEVSEL	/;"	d
SDR0_USB0_USB20D_DEVSEL	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_USB0_USB20D_DEVSEL	/;"	d
SDR0_USB0_USB_DEVSEL_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SDR0_USB0_USB_DEVSEL_MASK	/;"	d
SDR0_USB2D0CR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR	/;"	d
SDR0_USB2D0CR_EBC_SELECTION	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_EBC_SELECTION	/;"	d
SDR0_USB2D0CR_LEEN_DISABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_LEEN_DISABLE	/;"	d
SDR0_USB2D0CR_LEEN_ENABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_LEEN_ENABLE	/;"	d
SDR0_USB2D0CR_LEEN_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_LEEN_MASK	/;"	d
SDR0_USB2D0CR_USB11D_DEVSEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_USB11D_DEVSEL	/;"	d
SDR0_USB2D0CR_USB20D_DEVSEL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_USB20D_DEVSEL	/;"	d
SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK /;"	d
SDR0_USB2D0CR_USB2DEV_SELECTION	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_USB2DEV_SELECTION	/;"	d
SDR0_USB2D0CR_USB_DEV_INT_SEL_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2D0CR_USB_DEV_INT_SEL_MASK /;"	d
SDR0_USB2H0CR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2H0CR	/;"	d
SDR0_USB2H0CR_EFLADJ_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2H0CR_EFLADJ_MASK	/;"	d
SDR0_USB2H0CR_WDINT_16BIT_30MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2H0CR_WDINT_16BIT_30MHZ	/;"	d
SDR0_USB2H0CR_WDINT_8BIT_60MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2H0CR_WDINT_8BIT_60MHZ	/;"	d
SDR0_USB2H0CR_WDINT_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2H0CR_WDINT_MASK	/;"	d
SDR0_USB2HOST_CFG	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define SDR0_USB2HOST_CFG	/;"	d
SDR0_USB2PHY0CR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR	/;"	d
SDR0_USB2PHY0CR_CLKSEL_12MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_CLKSEL_12MHZ	/;"	d
SDR0_USB2PHY0CR_CLKSEL_24MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_CLKSEL_24MHZ	/;"	d
SDR0_USB2PHY0CR_CLKSEL_48MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_CLKSEL_48MHZ	/;"	d
SDR0_USB2PHY0CR_CLKSEL_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_CLKSEL_MASK	/;"	d
SDR0_USB2PHY0CR_DVBUS_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_DVBUS_MASK	/;"	d
SDR0_USB2PHY0CR_DVBUS_PURDIS	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_DVBUS_PURDIS	/;"	d
SDR0_USB2PHY0CR_DVBUS_PUREN	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_DVBUS_PUREN	/;"	d
SDR0_USB2PHY0CR_DWNSTR_DEV	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_DWNSTR_DEV	/;"	d
SDR0_USB2PHY0CR_DWNSTR_HOST	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_DWNSTR_HOST	/;"	d
SDR0_USB2PHY0CR_DWNSTR_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_DWNSTR_MASK	/;"	d
SDR0_USB2PHY0CR_LOOPEN_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_LOOPEN_MASK	/;"	d
SDR0_USB2PHY0CR_LOOP_DISABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_LOOP_DISABLE	/;"	d
SDR0_USB2PHY0CR_LOOP_ENABLE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_LOOP_ENABLE	/;"	d
SDR0_USB2PHY0CR_PWRSAV_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_PWRSAV_MASK	/;"	d
SDR0_USB2PHY0CR_PWRSAV_OFF	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_PWRSAV_OFF	/;"	d
SDR0_USB2PHY0CR_PWRSAV_ON	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_PWRSAV_ON	/;"	d
SDR0_USB2PHY0CR_UTMICN_DEV	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_UTMICN_DEV	/;"	d
SDR0_USB2PHY0CR_UTMICN_HOST	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_UTMICN_HOST	/;"	d
SDR0_USB2PHY0CR_UTMICN_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_UTMICN_MASK	/;"	d
SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ /;"	d
SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ /;"	d
SDR0_USB2PHY0CR_WDINT_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_WDINT_MASK	/;"	d
SDR0_USB2PHY0CR_XOCLK_CRYSTAL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOCLK_CRYSTAL	/;"	d
SDR0_USB2PHY0CR_XOCLK_EXTERNAL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOCLK_EXTERNAL	/;"	d
SDR0_USB2PHY0CR_XOCLK_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOCLK_MASK	/;"	d
SDR0_USB2PHY0CR_XOON_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOON_MASK	/;"	d
SDR0_USB2PHY0CR_XOREF_INTERNAL	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOREF_INTERNAL	/;"	d
SDR0_USB2PHY0CR_XOREF_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOREF_MASK	/;"	d
SDR0_USB2PHY0CR_XOREF_XO	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XOREF_XO	/;"	d
SDR0_USB2PHY0CR_XO_OFF	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XO_OFF	/;"	d
SDR0_USB2PHY0CR_XO_ON	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SDR0_USB2PHY0CR_XO_ON	/;"	d
SDR0_XCR	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_XCR	/;"	d
SDR0_XCR0	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_XCR0	/;"	d
SDR0_XCR0_PAE_MASK	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_XCR0_PAE_MASK	/;"	d
SDR0_XPLLC	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_XPLLC	/;"	d
SDR0_XPLLD	arch/powerpc/include/asm/ppc440.h	/^#define SDR0_XPLLD	/;"	d
SDR1	arch/powerpc/include/asm/processor.h	/^#define SDR1	/;"	d
SDR4_A	board/renesas/sh7763rdp/lowlevel_init.S	/^SDR4_A:		.long	0xFE800034$/;"	l
SDR4_D	board/renesas/sh7763rdp/lowlevel_init.S	/^SDR4_D:		.long	0x00000300$/;"	l
SDRAM	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
SDRAM0	arch/powerpc/dts/arches.dts	/^		SDRAM0: sdram {$/;"	l
SDRAM0	arch/powerpc/dts/canyonlands.dts	/^		SDRAM0: sdram {$/;"	l
SDRAM0	arch/powerpc/dts/glacier.dts	/^		SDRAM0: sdram {$/;"	l
SDRAM0_B0CR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_B0CR	/;"	d
SDRAM0_B1CR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_B1CR	/;"	d
SDRAM0_B2CR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_B2CR	/;"	d
SDRAM0_B3CR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_B3CR	/;"	d
SDRAM0_BEAR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_BEAR	/;"	d
SDRAM0_BESR0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_BESR0	/;"	d
SDRAM0_BESR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_BESR1	/;"	d
SDRAM0_BESRS0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_BESRS0	/;"	d
SDRAM0_BESRS1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_BESRS1	/;"	d
SDRAM0_BXCR_AM	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_BXCR_AM(/;"	d	file:
SDRAM0_BXCR_AM_MASK	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_BXCR_AM_MASK	/;"	d	file:
SDRAM0_BXCR_AM_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_BXCR_AM_SHIFT	/;"	d	file:
SDRAM0_BXCR_SZ	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_BXCR_SZ(/;"	d	file:
SDRAM0_BXCR_SZ_MASK	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_BXCR_SZ_MASK	/;"	d	file:
SDRAM0_BXCR_SZ_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_BXCR_SZ_SHIFT	/;"	d	file:
SDRAM0_CFG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_CFG	/;"	d
SDRAM0_CFG0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_CFG0	/;"	d
SDRAM0_CFG1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_CFG1	/;"	d
SDRAM0_CFGADDR	arch/powerpc/include/asm/ppc4xx.h	/^#define SDRAM0_CFGADDR	/;"	d
SDRAM0_CFGDATA	arch/powerpc/include/asm/ppc4xx.h	/^#define SDRAM0_CFGDATA	/;"	d
SDRAM0_CFG_BRPF	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define SDRAM0_CFG_BRPF(/;"	d	file:
SDRAM0_CFG_BRPF_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_BRPF_SHIFT	/;"	d	file:
SDRAM0_CFG_DCE	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_DCE	/;"	d	file:
SDRAM0_CFG_DRW_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_DRW_SHIFT	/;"	d	file:
SDRAM0_CFG_ECCDD	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_ECCDD	/;"	d	file:
SDRAM0_CFG_EMDULR	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_EMDULR	/;"	d	file:
SDRAM0_CFG_MEMCHK	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_MEMCHK	/;"	d	file:
SDRAM0_CFG_PME	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_PME	/;"	d	file:
SDRAM0_CFG_REGEN	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_REGEN	/;"	d	file:
SDRAM0_CFG_SRE	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_CFG_SRE	/;"	d	file:
SDRAM0_CLKTR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_CLKTR	/;"	d
SDRAM0_DEVOPT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_DEVOPT	/;"	d
SDRAM0_DLYCAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_DLYCAL	/;"	d
SDRAM0_ECCCFG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_ECCCFG	/;"	d
SDRAM0_ECCCFG_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_ECCCFG_SHIFT	/;"	d	file:
SDRAM0_ECCESR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_ECCESR	/;"	d
SDRAM0_MCSTS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_MCSTS	/;"	d
SDRAM0_PMIT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_PMIT	/;"	d
SDRAM0_RTR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_RTR	/;"	d
SDRAM0_RTR_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_RTR_SHIFT	/;"	d	file:
SDRAM0_SLIO	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_SLIO	/;"	d
SDRAM0_STATUS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_STATUS	/;"	d
SDRAM0_TR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_TR	/;"	d
SDRAM0_TR0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_TR0	/;"	d
SDRAM0_TR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_TR1	/;"	d
SDRAM0_TR_CASL	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM0_TR_CASL	/;"	d
SDRAM0_TR_CASL_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_TR_CASL_SHIFT	/;"	d	file:
SDRAM0_TR_CTP	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM0_TR_CTP	/;"	d
SDRAM0_TR_CTP_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_TR_CTP_SHIFT	/;"	d	file:
SDRAM0_TR_LDF	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM0_TR_LDF	/;"	d
SDRAM0_TR_LDF_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_TR_LDF_SHIFT	/;"	d	file:
SDRAM0_TR_PTA	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM0_TR_PTA	/;"	d
SDRAM0_TR_PTA_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_TR_PTA_SHIFT	/;"	d	file:
SDRAM0_TR_RCD	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM0_TR_RCD	/;"	d
SDRAM0_TR_RCD_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_TR_RCD_SHIFT	/;"	d	file:
SDRAM0_TR_RFTA	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM0_TR_RFTA	/;"	d
SDRAM0_TR_RFTA_SHIFT	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define	 SDRAM0_TR_RFTA_SHIFT	/;"	d	file:
SDRAM0_UABBA	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_UABBA	/;"	d
SDRAM0_WDDCTR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM0_WDDCTR	/;"	d
SDRAMC_BUS_HZ	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^#define SDRAMC_BUS_HZ	/;"	d
SDRAMC_DARCn_BA	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_BA(/;"	d
SDRAMC_DARCn_CASL_C0	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CASL_C0	/;"	d
SDRAMC_DARCn_CASL_C1	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CASL_C1	/;"	d
SDRAMC_DARCn_CASL_C2	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CASL_C2	/;"	d
SDRAMC_DARCn_CASL_C3	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CASL_C3	/;"	d
SDRAMC_DARCn_CASL_MASK	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CASL_MASK	/;"	d
SDRAMC_DARCn_CBM_CMD17	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD17	/;"	d
SDRAMC_DARCn_CBM_CMD18	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD18	/;"	d
SDRAMC_DARCn_CBM_CMD19	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD19	/;"	d
SDRAMC_DARCn_CBM_CMD20	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD20	/;"	d
SDRAMC_DARCn_CBM_CMD21	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD21	/;"	d
SDRAMC_DARCn_CBM_CMD22	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD22	/;"	d
SDRAMC_DARCn_CBM_CMD23	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD23	/;"	d
SDRAMC_DARCn_CBM_CMD24	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_CMD24	/;"	d
SDRAMC_DARCn_CBM_MASK	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_CBM_MASK	/;"	d
SDRAMC_DARCn_IMRS	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_IMRS	/;"	d
SDRAMC_DARCn_IP	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_IP	/;"	d
SDRAMC_DARCn_PS_16	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_PS_16	/;"	d
SDRAMC_DARCn_PS_32	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_PS_32	/;"	d
SDRAMC_DARCn_PS_8	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_PS_8	/;"	d
SDRAMC_DARCn_PS_MASK	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_PS_MASK	/;"	d
SDRAMC_DARCn_RE	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DARCn_RE	/;"	d
SDRAMC_DCR_COC	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_COC	/;"	d
SDRAMC_DCR_IS	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_IS	/;"	d
SDRAMC_DCR_NAM	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_NAM	/;"	d
SDRAMC_DCR_RC	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_RC(/;"	d
SDRAMC_DCR_RTIM_3CLKS	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_RTIM_3CLKS	/;"	d
SDRAMC_DCR_RTIM_6CLKS	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_RTIM_6CLKS	/;"	d
SDRAMC_DCR_RTIM_9CLKS	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_RTIM_9CLKS	/;"	d
SDRAMC_DCR_RTIM_MASK	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DCR_RTIM_MASK	/;"	d
SDRAMC_DMRn_BAM	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DMRn_BAM(/;"	d
SDRAMC_DMRn_V	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DMRn_V	/;"	d
SDRAMC_DMRn_WP	arch/m68k/include/asm/m5235.h	/^#define SDRAMC_DMRn_WP	/;"	d
SDRAMC_SDCFG1_ACT2RW	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_ACT2RW(/;"	d
SDRAMC_SDCFG1_ACT2RW	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_ACT2RW(/;"	d
SDRAMC_SDCFG1_ACT2RW	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_ACT2RW(/;"	d
SDRAMC_SDCFG1_PRE2ACT	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_PRE2ACT(/;"	d
SDRAMC_SDCFG1_PRE2ACT	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_PRE2ACT(/;"	d
SDRAMC_SDCFG1_PRE2ACT	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_PRE2ACT(/;"	d
SDRAMC_SDCFG1_RDLAT	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_RDLAT(/;"	d
SDRAMC_SDCFG1_RD_LAT	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_RD_LAT(/;"	d
SDRAMC_SDCFG1_RD_LAT	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_RD_LAT(/;"	d
SDRAMC_SDCFG1_REF2ACT	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_REF2ACT(/;"	d
SDRAMC_SDCFG1_REF2ACT	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_REF2ACT(/;"	d
SDRAMC_SDCFG1_REF2ACT	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_REF2ACT(/;"	d
SDRAMC_SDCFG1_SRD2RW	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_SRD2RW(/;"	d
SDRAMC_SDCFG1_SRD2RWP	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_SRD2RWP(/;"	d
SDRAMC_SDCFG1_SRD2RWP	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_SRD2RWP(/;"	d
SDRAMC_SDCFG1_SWT2RD	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_SWT2RD(/;"	d
SDRAMC_SDCFG1_SWT2RWP	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_SWT2RWP(/;"	d
SDRAMC_SDCFG1_SWT2RWP	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_SWT2RWP(/;"	d
SDRAMC_SDCFG1_WTLAT	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG1_WTLAT(/;"	d
SDRAMC_SDCFG1_WT_LAT	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG1_WT_LAT(/;"	d
SDRAMC_SDCFG1_WT_LAT	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG1_WT_LAT(/;"	d
SDRAMC_SDCFG2_BL	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG2_BL(/;"	d
SDRAMC_SDCFG2_BL	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG2_BL(/;"	d
SDRAMC_SDCFG2_BL	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG2_BL(/;"	d
SDRAMC_SDCFG2_BRD2PRE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG2_BRD2PRE(/;"	d
SDRAMC_SDCFG2_BRD2RP	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG2_BRD2RP(/;"	d
SDRAMC_SDCFG2_BRD2RP	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG2_BRD2RP(/;"	d
SDRAMC_SDCFG2_BRD2W	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG2_BRD2W(/;"	d
SDRAMC_SDCFG2_BRD2W	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG2_BRD2W(/;"	d
SDRAMC_SDCFG2_BRD2WT	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG2_BRD2WT(/;"	d
SDRAMC_SDCFG2_BWT2RW	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCFG2_BWT2RW(/;"	d
SDRAMC_SDCFG2_BWT2RWP	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCFG2_BWT2RWP(/;"	d
SDRAMC_SDCFG2_BWT2RWP	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCFG2_BWT2RWP(/;"	d
SDRAMC_SDCR_ADDR_MUX	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_ADDR_MUX(/;"	d
SDRAMC_SDCR_ADDR_MUX	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_ADDR_MUX(/;"	d
SDRAMC_SDCR_CKE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_CKE	/;"	d
SDRAMC_SDCR_CKE	arch/m68k/include/asm/m5301x.h	/^#define SDRAMC_SDCR_CKE	/;"	d
SDRAMC_SDCR_CKE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_CKE	/;"	d
SDRAMC_SDCR_CKE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_CKE	/;"	d
SDRAMC_SDCR_DDR	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_DDR	/;"	d
SDRAMC_SDCR_DDR2_MODE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_DDR2_MODE	/;"	d
SDRAMC_SDCR_DDR2_MODE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_DDR2_MODE	/;"	d
SDRAMC_SDCR_DDR_MODE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_DDR_MODE	/;"	d
SDRAMC_SDCR_DDR_MODE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_DDR_MODE	/;"	d
SDRAMC_SDCR_DPD	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_DPD	/;"	d
SDRAMC_SDCR_DPD	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_DPD	/;"	d
SDRAMC_SDCR_DQS_OE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_DQS_OE(/;"	d
SDRAMC_SDCR_DQS_OE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_DQS_OE(/;"	d
SDRAMC_SDCR_DQS_OE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_DQS_OE(/;"	d
SDRAMC_SDCR_DQS_OE_BOTH	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_DQS_OE_BOTH	/;"	d
SDRAMC_SDCR_DQS_OE_BOTH	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_DQS_OE_BOTH	/;"	d
SDRAMC_SDCR_IPALL	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_IPALL	/;"	d
SDRAMC_SDCR_IPALL	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_IPALL	/;"	d
SDRAMC_SDCR_IPALL	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_IPALL	/;"	d
SDRAMC_SDCR_IREF	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_IREF	/;"	d
SDRAMC_SDCR_IREF	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_IREF	/;"	d
SDRAMC_SDCR_IREF	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_IREF	/;"	d
SDRAMC_SDCR_MEM_PS	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_MEM_PS	/;"	d
SDRAMC_SDCR_MEM_PS	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_MEM_PS	/;"	d
SDRAMC_SDCR_MODE_EN	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_MODE_EN	/;"	d
SDRAMC_SDCR_MODE_EN	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_MODE_EN	/;"	d
SDRAMC_SDCR_MODE_EN	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_MODE_EN	/;"	d
SDRAMC_SDCR_MUX	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_MUX(/;"	d
SDRAMC_SDCR_OE_RULE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_OE_RULE	/;"	d
SDRAMC_SDCR_OE_RULE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_OE_RULE	/;"	d
SDRAMC_SDCR_OE_RULE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_OE_RULE	/;"	d
SDRAMC_SDCR_PS_16	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_PS_16	/;"	d
SDRAMC_SDCR_PS_32	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_PS_32	/;"	d
SDRAMC_SDCR_RCNT	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_RCNT(/;"	d
SDRAMC_SDCR_REF	arch/m68k/include/asm/m5301x.h	/^#define SDRAMC_SDCR_REF	/;"	d
SDRAMC_SDCR_REF	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCR_REF	/;"	d
SDRAMC_SDCR_REF_CNT	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_REF_CNT(/;"	d
SDRAMC_SDCR_REF_CNT	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_REF_CNT(/;"	d
SDRAMC_SDCR_REF_EN	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCR_REF_EN	/;"	d
SDRAMC_SDCR_REF_EN	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCR_REF_EN	/;"	d
SDRAMC_SDCS_BA	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_BA(/;"	d
SDRAMC_SDCS_BA	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_BA(/;"	d
SDRAMC_SDCS_BASE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_BASE(/;"	d
SDRAMC_SDCS_CSBA	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSBA(/;"	d
SDRAMC_SDCS_CSBA	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSBA(/;"	d
SDRAMC_SDCS_CSSZ	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ(/;"	d
SDRAMC_SDCS_CSSZ	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ(/;"	d
SDRAMC_SDCS_CSSZ	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ(/;"	d
SDRAMC_SDCS_CSSZ_128MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_128MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_128MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_128MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_128MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_128MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_16MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_16MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_16MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_16MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_16MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_16MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_1GBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_1GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_1GBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_1GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_1GBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_1GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_1MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_1MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_1MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_1MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_1MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_1MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_256MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_256MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_256MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_256MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_256MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_256MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_2GBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_2GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_2GBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_2GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_2GBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_2GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_2MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_2MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_2MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_2MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_2MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_2MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_32MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_32MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_32MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_32MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_32MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_32MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_4GBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_4GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_4GBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_4GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_4GBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_4GBYTE	/;"	d
SDRAMC_SDCS_CSSZ_4MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_4MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_4MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_4MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_4MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_4MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_512MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_512MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_512MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_512MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_512MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_512MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_64MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_64MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_64MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_64MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_64MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_64MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_8MBYTE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_8MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_8MBYTE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_8MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_8MBYTE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_8MBYTE	/;"	d
SDRAMC_SDCS_CSSZ_DIABLE	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDCS_CSSZ_DIABLE	/;"	d
SDRAMC_SDCS_CSSZ_DISABLE	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDCS_CSSZ_DISABLE	/;"	d
SDRAMC_SDCS_CSSZ_DISABLE	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDCS_CSSZ_DISABLE	/;"	d
SDRAMC_SDDS_SB_A	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDDS_SB_A(/;"	d
SDRAMC_SDDS_SB_C	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDDS_SB_C(/;"	d
SDRAMC_SDDS_SB_D	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDDS_SB_D(/;"	d
SDRAMC_SDDS_SB_E	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDDS_SB_E(/;"	d
SDRAMC_SDDS_SB_S	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDDS_SB_S(/;"	d
SDRAMC_SDMR_AD	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDMR_AD(/;"	d
SDRAMC_SDMR_AD	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDMR_AD(/;"	d
SDRAMC_SDMR_AD	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDMR_AD(/;"	d
SDRAMC_SDMR_BK	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDMR_BK(/;"	d
SDRAMC_SDMR_BK	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDMR_BK(/;"	d
SDRAMC_SDMR_BK_LEMR	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDMR_BK_LEMR	/;"	d
SDRAMC_SDMR_BK_LEMR	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDMR_BK_LEMR	/;"	d
SDRAMC_SDMR_BK_LMR	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDMR_BK_LMR	/;"	d
SDRAMC_SDMR_BK_LMR	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDMR_BK_LMR	/;"	d
SDRAMC_SDMR_BNKAD_LEMR	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDMR_BNKAD_LEMR	/;"	d
SDRAMC_SDMR_BNKAD_LMR	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDMR_BNKAD_LMR	/;"	d
SDRAMC_SDMR_CMD	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDMR_CMD	/;"	d
SDRAMC_SDMR_CMD	arch/m68k/include/asm/m5329.h	/^#define SDRAMC_SDMR_CMD	/;"	d
SDRAMC_SDMR_CMD	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDMR_CMD	/;"	d
SDRAMC_SDMR_DDR2_AD	arch/m68k/include/asm/m5227x.h	/^#define SDRAMC_SDMR_DDR2_AD(/;"	d
SDRAMC_SDMR_DDR2_AD	arch/m68k/include/asm/m5445x.h	/^#define SDRAMC_SDMR_DDR2_AD(/;"	d
SDRAMENTRY_SIZE	board/mpl/vcma9/lowlevel_init.S	/^	.equiv SDRAMENTRY_SIZE, (. - 0b)$/;"	d
SDRAMHTC	include/faraday/ftpmu010.h	/^	unsigned int	SDRAMHTC;	\/* 0x4C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
SDRAMQ_DCR_BASE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAMQ_DCR_BASE /;"	d
SDRAM_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^SDRAM_A:		.long	0x0C000000$/;"	l
SDRAM_A	board/renesas/ecovec/lowlevel_init.S	/^SDRAM_A:	.long	0xa8000000$/;"	l
SDRAM_A	board/renesas/r0p7734/lowlevel_init.S	/^SDRAM_A:		.long	0x0C000000$/;"	l
SDRAM_ACCESS_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_ACCESS_CONTROL_REG	/;"	d
SDRAM_ADDR_CTRL	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_ADDR_CTRL	/;"	d	file:
SDRAM_ADDR_MASK	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SDRAM_ADDR_MASK	/;"	d
SDRAM_ALL_VAL	include/configs/imx27lite-common.h	/^#define SDRAM_ALL_VAL	/;"	d
SDRAM_BANK0_SIZE	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_BANK0_SIZE	/;"	d	file:
SDRAM_BANK_SIZE	include/configs/espresso7420.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/evb_rk3399.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/exynos5250-common.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/odroid.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/odroid_xu3.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/origen.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/peach-pi.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/peach-pit.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/rk3036_common.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/rk3288_common.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/s5pc210_universal.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/smdk5420.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/smdkv310.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/trats.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BANK_SIZE	include/configs/trats2.h	/^#define SDRAM_BANK_SIZE	/;"	d
SDRAM_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_BASE	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM823L.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM823M.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM850L.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM850M.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM855L.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM855M.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM860L.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM860M.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM862L.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM862M.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM866M.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE2_PRELIM	include/configs/TQM885D.h	/^#define SDRAM_BASE2_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM823L.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM823M.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM850L.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM850M.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM855L.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM855M.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM860L.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM860M.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM862L.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM862M.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM866M.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE3_PRELIM	include/configs/TQM885D.h	/^#define SDRAM_BASE3_PRELIM	/;"	d
SDRAM_BASE_CONF	board/siemens/smartweb/smartweb.c	/^#define SDRAM_BASE_CONF	/;"	d	file:
SDRAM_BASE_CONF	board/siemens/taurus/taurus.c	/^#define SDRAM_BASE_CONF	/;"	d	file:
SDRAM_BEARH	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BEARH	/;"	d
SDRAM_BEARL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BEARL	/;"	d
SDRAM_BESR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR	/;"	d
SDRAM_BESRT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESRT	/;"	d
SDRAM_BESR_M0ET_ECC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ET_ECC	/;"	d
SDRAM_BESR_M0ET_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ET_MASK	/;"	d
SDRAM_BESR_M0ET_NONE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ET_NONE	/;"	d
SDRAM_BESR_M0ID_DCU	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_DCU	/;"	d
SDRAM_BESR_M0ID_DMA	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_DMA	/;"	d
SDRAM_BESR_M0ID_ICU	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_ICU	/;"	d
SDRAM_BESR_M0ID_MAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_MAL	/;"	d
SDRAM_BESR_M0ID_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_MASK	/;"	d
SDRAM_BESR_M0ID_OPB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_OPB	/;"	d
SDRAM_BESR_M0ID_PCIE0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_PCIE0	/;"	d
SDRAM_BESR_M0ID_PCIE1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_PCIE1	/;"	d
SDRAM_BESR_M0ID_SEC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0ID_SEC	/;"	d
SDRAM_BESR_M0RW_READ	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0RW_READ	/;"	d
SDRAM_BESR_M0RW_WRITE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_M0RW_WRITE	/;"	d
SDRAM_BESR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BESR_MASK	/;"	d
SDRAM_BXCF_M_AM_0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_0	/;"	d
SDRAM_BXCF_M_AM_1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_1	/;"	d
SDRAM_BXCF_M_AM_2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_2	/;"	d
SDRAM_BXCF_M_AM_3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_3	/;"	d
SDRAM_BXCF_M_AM_4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_4	/;"	d
SDRAM_BXCF_M_AM_5	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_5	/;"	d
SDRAM_BXCF_M_AM_6	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_6	/;"	d
SDRAM_BXCF_M_AM_7	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_7	/;"	d
SDRAM_BXCF_M_AM_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_8	/;"	d
SDRAM_BXCF_M_AM_9	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_9	/;"	d
SDRAM_BXCF_M_AM_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_AM_MASK	/;"	d
SDRAM_BXCF_M_BE_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_BE_DISABLE	/;"	d
SDRAM_BXCF_M_BE_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_BE_ENABLE	/;"	d
SDRAM_BXCF_M_BE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCF_M_BE_MASK	/;"	d
SDRAM_BXCR_SDAM_1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDAM_1	/;"	d
SDRAM_BXCR_SDAM_2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDAM_2	/;"	d
SDRAM_BXCR_SDAM_3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDAM_3	/;"	d
SDRAM_BXCR_SDAM_4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDAM_4	/;"	d
SDRAM_BXCR_SDAM_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDAM_MASK	/;"	d
SDRAM_BXCR_SDBA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDBA_MASK	/;"	d
SDRAM_BXCR_SDBE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDBE	/;"	d
SDRAM_BXCR_SDSZ_128	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_128	/;"	d
SDRAM_BXCR_SDSZ_16	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_16	/;"	d
SDRAM_BXCR_SDSZ_256	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_256	/;"	d
SDRAM_BXCR_SDSZ_32	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_32	/;"	d
SDRAM_BXCR_SDSZ_512	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_512	/;"	d
SDRAM_BXCR_SDSZ_64	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_64	/;"	d
SDRAM_BXCR_SDSZ_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_8	/;"	d
SDRAM_BXCR_SDSZ_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_BXCR_SDSZ_MASK	/;"	d
SDRAM_CAL	board/mpl/pati/pati.h	/^#define SDRAM_CAL	/;"	d
SDRAM_CAS	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_CAS	/;"	d	file:
SDRAM_CAS	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_CAS	/;"	d	file:
SDRAM_CFG0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0	/;"	d
SDRAM_CFG0_DCEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_DCEN	/;"	d
SDRAM_CFG0_DC_EN	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_DC_EN	/;"	d
SDRAM_CFG0_DMWD_32	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_DMWD_32	/;"	d
SDRAM_CFG0_DMWD_64	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_DMWD_64	/;"	d
SDRAM_CFG0_DMWD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_DMWD_MASK	/;"	d
SDRAM_CFG0_DRAMWDTH	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_DRAMWDTH	/;"	d
SDRAM_CFG0_DRAMWDTH_32	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_DRAMWDTH_32	/;"	d
SDRAM_CFG0_DRAMWDTH_64	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_DRAMWDTH_64	/;"	d
SDRAM_CFG0_MCHK_CHK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_MCHK_CHK	/;"	d
SDRAM_CFG0_MCHK_GEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_MCHK_GEN	/;"	d
SDRAM_CFG0_MCHK_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_MCHK_MASK	/;"	d
SDRAM_CFG0_MCHK_NON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_MCHK_NON	/;"	d
SDRAM_CFG0_MEMCHK	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_MEMCHK	/;"	d
SDRAM_CFG0_MEMCHK_CHK	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_MEMCHK_CHK	/;"	d
SDRAM_CFG0_MEMCHK_GEN	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_MEMCHK_GEN	/;"	d
SDRAM_CFG0_MEMCHK_NON	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define SDRAM_CFG0_MEMCHK_NON	/;"	d
SDRAM_CFG0_PDP	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_PDP	/;"	d
SDRAM_CFG0_PMUD	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_PMUD	/;"	d
SDRAM_CFG0_RDEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_RDEN	/;"	d
SDRAM_CFG0_UIOS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG0_UIOS_MASK	/;"	d
SDRAM_CFG1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG1	/;"	d
SDRAM_CFG1	board/mpl/pati/pati.h	/^#define SDRAM_CFG1	/;"	d
SDRAM_CFG1_PMEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG1_PMEN	/;"	d
SDRAM_CFG1_SRE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CFG1_SRE	/;"	d
SDRAM_CFG2	board/mpl/pati/pati.h	/^#define SDRAM_CFG2	/;"	d
SDRAM_CFG2_AP_EN	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_AP_EN	/;"	d
SDRAM_CFG2_D_INIT	include/configs/ls1021atwr.h	/^#define SDRAM_CFG2_D_INIT	/;"	d
SDRAM_CFG2_D_INIT	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_D_INIT	/;"	d
SDRAM_CFG2_FRC_SR	include/configs/ls1021atwr.h	/^#define SDRAM_CFG2_FRC_SR	/;"	d
SDRAM_CFG2_FRC_SR	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_FRC_SR	/;"	d
SDRAM_CFG2_ODT_ALWAYS	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_ODT_ALWAYS	/;"	d
SDRAM_CFG2_ODT_CFG_MASK	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_ODT_CFG_MASK	/;"	d
SDRAM_CFG2_ODT_NEVER	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_ODT_NEVER	/;"	d
SDRAM_CFG2_ODT_ONLY_READ	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_ODT_ONLY_READ	/;"	d
SDRAM_CFG2_ODT_ONLY_WRITE	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG2_ODT_ONLY_WRITE	/;"	d
SDRAM_CFG3	board/mpl/pati/pati.h	/^#define SDRAM_CFG3	/;"	d
SDRAM_CFG5	board/mpl/pati/pati.h	/^#define SDRAM_CFG5	/;"	d
SDRAM_CFG6	board/mpl/pati/pati.h	/^#define SDRAM_CFG6	/;"	d
SDRAM_CFG_16_BE	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_16_BE	/;"	d
SDRAM_CFG_2T_EN	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_2T_EN	/;"	d
SDRAM_CFG_2T_EN	include/mpc83xx.h	/^#define SDRAM_CFG_2T_EN	/;"	d
SDRAM_CFG_32_BE	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_32_BE	/;"	d
SDRAM_CFG_32_BE	include/mpc83xx.h	/^#define SDRAM_CFG_32_BE	/;"	d
SDRAM_CFG_8_BE	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_8_BE	/;"	d
SDRAM_CFG_8_BE	include/mpc83xx.h	/^#define SDRAM_CFG_8_BE	/;"	d
SDRAM_CFG_BI	include/configs/ls1021atwr.h	/^#define SDRAM_CFG_BI	/;"	d
SDRAM_CFG_BI	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_BI	/;"	d
SDRAM_CFG_BI	include/mpc83xx.h	/^#define SDRAM_CFG_BI	/;"	d
SDRAM_CFG_DBW_16	include/mpc83xx.h	/^#define SDRAM_CFG_DBW_16	/;"	d
SDRAM_CFG_DBW_32	include/mpc83xx.h	/^#define SDRAM_CFG_DBW_32	/;"	d
SDRAM_CFG_DBW_MASK	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_DBW_MASK	/;"	d
SDRAM_CFG_DBW_MASK	include/mpc83xx.h	/^#define SDRAM_CFG_DBW_MASK	/;"	d
SDRAM_CFG_DBW_SHIFT	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_DBW_SHIFT	/;"	d
SDRAM_CFG_DYN_PWR	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_DYN_PWR	/;"	d
SDRAM_CFG_DYN_PWR	include/mpc83xx.h	/^#define SDRAM_CFG_DYN_PWR	/;"	d
SDRAM_CFG_ECC_EN	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_ECC_EN	/;"	d
SDRAM_CFG_ECC_EN	include/mpc83xx.h	/^#define SDRAM_CFG_ECC_EN	/;"	d
SDRAM_CFG_HSE	include/mpc83xx.h	/^#define SDRAM_CFG_HSE	/;"	d
SDRAM_CFG_MEM_EN	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_MEM_EN	/;"	d
SDRAM_CFG_MEM_EN	include/mpc83xx.h	/^#define SDRAM_CFG_MEM_EN	/;"	d
SDRAM_CFG_NCAP	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_NCAP	/;"	d
SDRAM_CFG_NCAP	include/mpc83xx.h	/^#define SDRAM_CFG_NCAP	/;"	d
SDRAM_CFG_RD_EN	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_RD_EN	/;"	d
SDRAM_CFG_RD_EN	include/mpc83xx.h	/^#define SDRAM_CFG_RD_EN	/;"	d
SDRAM_CFG_SDRAM_TYPE_DDR1	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_SDRAM_TYPE_DDR1	/;"	d
SDRAM_CFG_SDRAM_TYPE_DDR1	include/mpc83xx.h	/^#define SDRAM_CFG_SDRAM_TYPE_DDR1	/;"	d
SDRAM_CFG_SDRAM_TYPE_DDR2	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_SDRAM_TYPE_DDR2	/;"	d
SDRAM_CFG_SDRAM_TYPE_DDR2	include/mpc83xx.h	/^#define SDRAM_CFG_SDRAM_TYPE_DDR2	/;"	d
SDRAM_CFG_SDRAM_TYPE_MASK	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_SDRAM_TYPE_MASK	/;"	d
SDRAM_CFG_SDRAM_TYPE_MASK	include/mpc83xx.h	/^#define SDRAM_CFG_SDRAM_TYPE_MASK	/;"	d
SDRAM_CFG_SDRAM_TYPE_SHIFT	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_SDRAM_TYPE_SHIFT	/;"	d
SDRAM_CFG_SDRAM_TYPE_SHIFT	include/mpc83xx.h	/^#define SDRAM_CFG_SDRAM_TYPE_SHIFT	/;"	d
SDRAM_CFG_SREN	include/fsl_ddr_sdram.h	/^#define SDRAM_CFG_SREN	/;"	d
SDRAM_CFG_SREN	include/mpc83xx.h	/^#define SDRAM_CFG_SREN	/;"	d
SDRAM_CID	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CID	/;"	d
SDRAM_CLKTR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR	/;"	d
SDRAM_CLKTR_CLKP_0DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_CLKTR_CLKP_0DEG	/;"	d
SDRAM_CLKTR_CLKP_0_DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR_CLKP_0_DEG	/;"	d
SDRAM_CLKTR_CLKP_180DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_CLKTR_CLKP_180DEG /;"	d
SDRAM_CLKTR_CLKP_180_DEG_ADV	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR_CLKP_180_DEG_ADV	/;"	d
SDRAM_CLKTR_CLKP_270_DEG_ADV	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR_CLKP_270_DEG_ADV	/;"	d
SDRAM_CLKTR_CLKP_90DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_CLKTR_CLKP_90DEG	/;"	d
SDRAM_CLKTR_CLKP_90_DEG_ADV	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR_CLKP_90_DEG_ADV	/;"	d
SDRAM_CLKTR_CLKP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR_CLKP_MASK	/;"	d
SDRAM_CLKTR_DCDT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CLKTR_DCDT_MASK	/;"	d
SDRAM_CODT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT	/;"	d
SDRAM_CODT_CKEG_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CKEG_OFF	/;"	d
SDRAM_CODT_CKEG_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CKEG_ON	/;"	d
SDRAM_CODT_CKLZ_18OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CKLZ_18OHM	/;"	d
SDRAM_CODT_CKLZ_36OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CKLZ_36OHM	/;"	d
SDRAM_CODT_CKSE_DIFFERENTIAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CKSE_DIFFERENTIAL	/;"	d
SDRAM_CODT_CKSE_SINGLE_END	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CKSE_SINGLE_END	/;"	d
SDRAM_CODT_CODTZ_75OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CODTZ_75OHM	/;"	d
SDRAM_CODT_CTLG_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CTLG_OFF	/;"	d
SDRAM_CODT_CTLG_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_CTLG_ON	/;"	d
SDRAM_CODT_DQS_1_8_V_DDR2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_DQS_1_8_V_DDR2	/;"	d
SDRAM_CODT_DQS_2_5_V_DDR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_DQS_2_5_V_DDR1	/;"	d
SDRAM_CODT_DQS_DIFFERENTIAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_DQS_DIFFERENTIAL	/;"	d
SDRAM_CODT_DQS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_DQS_MASK	/;"	d
SDRAM_CODT_DQS_SINGLE_END	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_DQS_SINGLE_END	/;"	d
SDRAM_CODT_DQS_VOLTAGE_DDR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_DQS_VOLTAGE_DDR_MASK	/;"	d
SDRAM_CODT_FBDG_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_FBDG_OFF	/;"	d
SDRAM_CODT_FBDG_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_FBDG_ON	/;"	d
SDRAM_CODT_FBRG_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_FBRG_OFF	/;"	d
SDRAM_CODT_FBRG_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_FBRG_ON	/;"	d
SDRAM_CODT_FEEBBACK_DRV_SINGLE_END	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_FEEBBACK_DRV_SINGLE_END	/;"	d
SDRAM_CODT_FEEBBACK_RCV_SINGLE_END	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_FEEBBACK_RCV_SINGLE_END	/;"	d
SDRAM_CODT_IO_HIZ	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_IO_HIZ	/;"	d
SDRAM_CODT_IO_NMODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_IO_NMODE	/;"	d
SDRAM_CODT_ODTSH_ADD_ONE_AT_START	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_ODTSH_ADD_ONE_AT_START	/;"	d
SDRAM_CODT_ODTSH_NORMAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_ODTSH_NORMAL	/;"	d
SDRAM_CODT_ODTSH_REMOVE_ONE_AT_END	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_ODTSH_REMOVE_ONE_AT_END	/;"	d
SDRAM_CODT_ODTSH_SHIFT_ONE_EARLIER	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_ODTSH_SHIFT_ONE_EARLIER	/;"	d
SDRAM_CODT_ODT_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_ODT_OFF	/;"	d
SDRAM_CODT_ODT_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_ODT_ON	/;"	d
SDRAM_CODT_RK0R_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK0R_OFF	/;"	d
SDRAM_CODT_RK0R_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK0R_ON	/;"	d
SDRAM_CODT_RK0W_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK0W_OFF	/;"	d
SDRAM_CODT_RK0W_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK0W_ON	/;"	d
SDRAM_CODT_RK1R_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK1R_OFF	/;"	d
SDRAM_CODT_RK1R_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK1R_ON	/;"	d
SDRAM_CODT_RK1W_OFF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK1W_OFF	/;"	d
SDRAM_CODT_RK1W_ON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CODT_RK1W_ON	/;"	d
SDRAM_CONF1HB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB	/;"	d
SDRAM_CONF1HB_AAFR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_AAFR	/;"	d
SDRAM_CONF1HB_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_MASK	/;"	d
SDRAM_CONF1HB_PRPD	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_PRPD	/;"	d
SDRAM_CONF1HB_PRW	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_PRW	/;"	d
SDRAM_CONF1HB_PWPD	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_PWPD	/;"	d
SDRAM_CONF1HB_RFTE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_RFTE	/;"	d
SDRAM_CONF1HB_RPEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_RPEN	/;"	d
SDRAM_CONF1HB_RPLM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_RPLM	/;"	d
SDRAM_CONF1HB_WRCL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1HB_WRCL	/;"	d
SDRAM_CONF1LL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL	/;"	d
SDRAM_CONF1LL_AAFR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_AAFR	/;"	d
SDRAM_CONF1LL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_MASK	/;"	d
SDRAM_CONF1LL_PRPD	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_PRPD	/;"	d
SDRAM_CONF1LL_PRW	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_PRW	/;"	d
SDRAM_CONF1LL_PWPD	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_PWPD	/;"	d
SDRAM_CONF1LL_RFTE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_RFTE	/;"	d
SDRAM_CONF1LL_RPEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_RPEN	/;"	d
SDRAM_CONF1LL_RPLM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONF1LL_RPLM	/;"	d
SDRAM_CONFIG	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_CONFIG	/;"	d	file:
SDRAM_CONFIG1	board/a3m071/is46r16320d.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/a4m072/mt46v32m16.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/canmb/mt48lc16m32s2-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/ifm/o2dnt2/o2dnt2.c	/^#define SDRAM_CONFIG1	/;"	d	file:
SDRAM_CONFIG1	board/inka4x0/k4h511638c.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/inka4x0/mt48lc16m16a2-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/intercontrol/digsy_mtc/is42s16800a-7t.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/intercontrol/digsy_mtc/is45s16800a2.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/ipek01/ipek01.c	/^#define SDRAM_CONFIG1	/;"	d	file:
SDRAM_CONFIG1	board/jupiter/jupiter.c	/^#define SDRAM_CONFIG1	/;"	d	file:
SDRAM_CONFIG1	board/munices/mt48lc16m16a2-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	board/tqc/tqm5200/mt48lc16m16a2-75.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	include/configs/cm5200.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_CONFIG1 /;"	d
SDRAM_CONFIG1	include/configs/motionpro.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG1	include/configs/v38b.h	/^#define SDRAM_CONFIG1	/;"	d
SDRAM_CONFIG2	board/a3m071/is46r16320d.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/a4m072/mt46v32m16.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/canmb/mt48lc16m32s2-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/ifm/o2dnt2/o2dnt2.c	/^#define SDRAM_CONFIG2	/;"	d	file:
SDRAM_CONFIG2	board/inka4x0/k4h511638c.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/inka4x0/mt48lc16m16a2-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/intercontrol/digsy_mtc/is42s16800a-7t.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/intercontrol/digsy_mtc/is45s16800a2.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/ipek01/ipek01.c	/^#define SDRAM_CONFIG2	/;"	d	file:
SDRAM_CONFIG2	board/jupiter/jupiter.c	/^#define SDRAM_CONFIG2	/;"	d	file:
SDRAM_CONFIG2	board/munices/mt48lc16m16a2-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	board/tqc/tqm5200/mt48lc16m16a2-75.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	include/configs/cm5200.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_CONFIG2 /;"	d
SDRAM_CONFIG2	include/configs/motionpro.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIG2	include/configs/v38b.h	/^#define SDRAM_CONFIG2	/;"	d
SDRAM_CONFIGURATION_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_CONFIGURATION_REG	/;"	d
SDRAM_CONFIG_EXT_RD_LVL_11_SAMPLES	arch/arm/include/asm/emif.h	/^#define SDRAM_CONFIG_EXT_RD_LVL_11_SAMPLES	/;"	d
SDRAM_CONFIG_EXT_RD_LVL_11_SAMPLES_ES2	arch/arm/include/asm/emif.h	/^#define SDRAM_CONFIG_EXT_RD_LVL_11_SAMPLES_ES2 /;"	d
SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES	arch/arm/include/asm/emif.h	/^#define SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES	/;"	d
SDRAM_CONFPATHB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONFPATHB	/;"	d
SDRAM_CONFPATHB_TPEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_CONFPATHB_TPEN	/;"	d
SDRAM_CONTROL	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_CONTROL	/;"	d	file:
SDRAM_CONTROL	board/a3m071/is46r16320d.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/a4m072/mt46v32m16.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/canmb/mt48lc16m32s2-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/ifm/o2dnt2/o2dnt2.c	/^#define SDRAM_CONTROL	/;"	d	file:
SDRAM_CONTROL	board/inka4x0/k4h511638c.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/inka4x0/mt48lc16m16a2-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/intercontrol/digsy_mtc/is42s16800a-7t.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/intercontrol/digsy_mtc/is45s16800a2.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/ipek01/ipek01.c	/^#define SDRAM_CONTROL	/;"	d	file:
SDRAM_CONTROL	board/jupiter/jupiter.c	/^#define SDRAM_CONTROL	/;"	d	file:
SDRAM_CONTROL	board/munices/mt48lc16m16a2-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	board/tqc/tqm5200/mt48lc16m16a2-75.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	include/configs/cm5200.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_CONTROL /;"	d
SDRAM_CONTROL	include/configs/motionpro.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CONTROL	include/configs/v38b.h	/^#define SDRAM_CONTROL	/;"	d
SDRAM_CS_BASE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SDRAM_CS_BASE	/;"	d
SDRAM_CS_BASE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_CS_BASE	/;"	d
SDRAM_CS_BASE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define SDRAM_CS_BASE /;"	d
SDRAM_CS_CONFIG_EN	include/fsl_ddr_sdram.h	/^#define SDRAM_CS_CONFIG_EN	/;"	d
SDRAM_CS_SIZE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SDRAM_CS_SIZE	/;"	d
SDRAM_CS_SIZE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_CS_SIZE	/;"	d
SDRAM_DATA_16BIT	arch/avr32/include/asm/sdram.h	/^		SDRAM_DATA_16BIT = 16,$/;"	e	enum:sdram_config::__anon59a68c3f0103
SDRAM_DATA_32BIT	arch/avr32/include/asm/sdram.h	/^		SDRAM_DATA_32BIT = 32,$/;"	e	enum:sdram_config::__anon59a68c3f0103
SDRAM_DATA_ALT_WIDTH	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^#define SDRAM_DATA_ALT_WIDTH	/;"	d	file:
SDRAM_DATA_ALT_WIDTH	arch/powerpc/cpu/ppc4xx/ecc.c	/^#define SDRAM_DATA_ALT_WIDTH	/;"	d	file:
SDRAM_DCR_BASE	arch/powerpc/include/asm/ppc4xx.h	/^#define SDRAM_DCR_BASE	/;"	d
SDRAM_DDR	board/a3m071/is46r16320d.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/a4m072/mt46v32m16.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/canmb/mt48lc16m32s2-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/inka4x0/k4h511638c.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/inka4x0/mt48lc16m16a2-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/jupiter/jupiter.c	/^#define SDRAM_DDR	/;"	d	file:
SDRAM_DDR	board/munices/mt48lc16m16a2-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	board/tqc/tqm5200/mt48lc16m16a2-75.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR	include/configs/v38b.h	/^#define SDRAM_DDR	/;"	d
SDRAM_DDR1	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SDRAM_DDR1	/;"	d	file:
SDRAM_DDR1	board/amcc/yucca/yucca.h	/^#define SDRAM_DDR1	/;"	d
SDRAM_DDR2	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SDRAM_DDR2	/;"	d	file:
SDRAM_DDR2	board/amcc/yucca/yucca.h	/^#define SDRAM_DDR2	/;"	d
SDRAM_DEVCFG0_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG0_BASE	/;"	d
SDRAM_DEVCFG1_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG1_BASE	/;"	d
SDRAM_DEVCFG2_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG2_BASE	/;"	d
SDRAM_DEVCFG3_ASD0_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG3_ASD0_BASE	/;"	d
SDRAM_DEVCFG3_ASD1_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG3_ASD1_BASE	/;"	d
SDRAM_DEVCFG_BANKCOUNT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG_BANKCOUNT	/;"	d
SDRAM_DEVCFG_CASLAT_2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG_CASLAT_2	/;"	d
SDRAM_DEVCFG_EXTBUSWIDTH	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG_EXTBUSWIDTH	/;"	d
SDRAM_DEVCFG_RASTOCAS_2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG_RASTOCAS_2	/;"	d
SDRAM_DEVCFG_SROMLL	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_DEVCFG_SROMLL	/;"	d
SDRAM_DEVOPT_DLL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DEVOPT_DLL	/;"	d
SDRAM_DEVOPT_DS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DEVOPT_DS	/;"	d
SDRAM_DGENERIC	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_DGENERIC /;"	d
SDRAM_DIMM_SIZE	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SDRAM_DIMM_SIZE	/;"	d
SDRAM_DIMM_SIZE	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_DIMM_SIZE	/;"	d
SDRAM_DKERNEL	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_DKERNEL /;"	d
SDRAM_DLCR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR	/;"	d
SDRAM_DLCR_DCLM_AUTO	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DCLM_AUTO	/;"	d
SDRAM_DLCR_DCLM_MANUAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DCLM_MANUAL	/;"	d
SDRAM_DLCR_DCLM_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DCLM_MASK	/;"	d
SDRAM_DLCR_DLCR_CALIBRATE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCR_CALIBRATE	/;"	d
SDRAM_DLCR_DLCR_IDLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCR_IDLE	/;"	d
SDRAM_DLCR_DLCR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCR_MASK	/;"	d
SDRAM_DLCR_DLCS_COMPLETE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCS_COMPLETE	/;"	d
SDRAM_DLCR_DLCS_CONT_DONE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCS_CONT_DONE	/;"	d
SDRAM_DLCR_DLCS_ERROR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCS_ERROR	/;"	d
SDRAM_DLCR_DLCS_IN_PROGRESS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCS_IN_PROGRESS	/;"	d
SDRAM_DLCR_DLCS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCS_MASK	/;"	d
SDRAM_DLCR_DLCS_NOT_RUN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCS_NOT_RUN	/;"	d
SDRAM_DLCR_DLCV_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCV_DECODE(/;"	d
SDRAM_DLCR_DLCV_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCV_ENCODE(/;"	d
SDRAM_DLCR_DLCV_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLCR_DLCV_MASK	/;"	d
SDRAM_DLYCAL_DLCV_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_DLYCAL_DLCV_DECODE(/;"	d
SDRAM_DLYCAL_DLCV_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLYCAL_DLCV_DECODE(/;"	d
SDRAM_DLYCAL_DLCV_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_DLYCAL_DLCV_ENCODE(/;"	d
SDRAM_DLYCAL_DLCV_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLYCAL_DLCV_ENCODE(/;"	d
SDRAM_DLYCAL_DLCV_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_DLYCAL_DLCV_MASK	/;"	d
SDRAM_DNON_CHBL	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_DNON_CHBL /;"	d
SDRAM_DQS_RX_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_DQS_RX_OFFS	/;"	d
SDRAM_DQS_RX_SPECIAL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_DQS_RX_SPECIAL_OFFS	/;"	d
SDRAM_DQS_TX_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_DQS_TX_OFFS	/;"	d
SDRAM_DRIVE	arch/arm/mach-keystone/ddr3_spd.c	/^#define SDRAM_DRIVE /;"	d	file:
SDRAM_EBIU	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_EBIU /;"	d
SDRAM_ECCES	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_ECCES	/;"	d
SDRAM_ECCES	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES	/;"	d
SDRAM_ECCES_BK0ER	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_BK0ER	/;"	d
SDRAM_ECCES_BK1ER	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_BK1ER	/;"	d
SDRAM_ECCES_BKNER_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_BKNER_MASK	/;"	d
SDRAM_ECCES_BNCE_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_BNCE_ENCODE(/;"	d
SDRAM_ECCES_BNCE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_BNCE_MASK	/;"	d
SDRAM_ECCES_CE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CE	/;"	d
SDRAM_ECCES_CKBER_16_ECC_0_3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CKBER_16_ECC_0_3	/;"	d
SDRAM_ECCES_CKBER_32_ECC_0_3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CKBER_32_ECC_0_3	/;"	d
SDRAM_ECCES_CKBER_32_ECC_0_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CKBER_32_ECC_0_8	/;"	d
SDRAM_ECCES_CKBER_32_ECC_4_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CKBER_32_ECC_4_8	/;"	d
SDRAM_ECCES_CKBER_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CKBER_MASK	/;"	d
SDRAM_ECCES_CKBER_NONE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_CKBER_NONE	/;"	d
SDRAM_ECCES_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_MASK	/;"	d
SDRAM_ECCES_UE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ECCES_UE	/;"	d
SDRAM_EMODE	board/a3m071/is46r16320d.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	board/a4m072/mt46v32m16.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	board/inka4x0/k4h511638c.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	board/ipek01/ipek01.c	/^#define SDRAM_EMODE	/;"	d	file:
SDRAM_EMODE	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_EMODE	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_EMODE /;"	d
SDRAM_EMODE	include/configs/v38b.h	/^#define SDRAM_EMODE	/;"	d
SDRAM_END	include/configs/nokia_rx51.h	/^#define SDRAM_END	/;"	d
SDRAM_ERR	board/mpl/pip405/pip405.c	/^} SDRAM_ERR;$/;"	t	typeref:enum:__anonb110a3780203	file:
SDRAM_ERRADDLHB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ERRADDLHB	/;"	d
SDRAM_ERRADDLLL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ERRADDLLL	/;"	d
SDRAM_ERRADDUHB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ERRADDUHB	/;"	d
SDRAM_ERRADDULL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ERRADDULL	/;"	d
SDRAM_ERRSTATHB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ERRSTATHB	/;"	d
SDRAM_ERRSTATLL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_ERRSTATLL	/;"	d
SDRAM_ESDCFG_REGISTER_VAL	include/configs/imx27lite-common.h	/^#define SDRAM_ESDCFG_REGISTER_VAL(/;"	d
SDRAM_ESDCTL_REGISTER_VAL	include/configs/imx27lite-common.h	/^#define SDRAM_ESDCTL_REGISTER_VAL	/;"	d
SDRAM_EXT_MODE_REGISTER_VAL	include/configs/imx27lite-common.h	/^#define SDRAM_EXT_MODE_REGISTER_VAL	/;"	d
SDRAM_FALSE	board/amcc/yucca/yucca.h	/^#define SDRAM_FALSE	/;"	d
SDRAM_FCSR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_FCSR	/;"	d
SDRAM_FMC_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define SDRAM_FMC_BASE	/;"	d
SDRAM_ID	board/mpl/pati/pati.h	/^#define SDRAM_ID(/;"	d
SDRAM_ID0	board/mpl/pati/pati.h	/^#define SDRAM_ID0	/;"	d
SDRAM_ID1	board/mpl/pati/pati.h	/^#define SDRAM_ID1	/;"	d
SDRAM_ID2	board/mpl/pati/pati.h	/^#define SDRAM_ID2	/;"	d
SDRAM_ID3	board/mpl/pati/pati.h	/^#define SDRAM_ID3	/;"	d
SDRAM_IGENERIC	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_IGENERIC /;"	d
SDRAM_IIP	board/mpl/pati/pati.h	/^#define SDRAM_IIP	/;"	d
SDRAM_IKERNEL	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_IKERNEL /;"	d
SDRAM_INITPLR0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR0	/;"	d
SDRAM_INITPLR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR1	/;"	d
SDRAM_INITPLR10	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR10	/;"	d
SDRAM_INITPLR11	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR11	/;"	d
SDRAM_INITPLR12	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR12	/;"	d
SDRAM_INITPLR13	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR13	/;"	d
SDRAM_INITPLR14	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR14	/;"	d
SDRAM_INITPLR15	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR15	/;"	d
SDRAM_INITPLR2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR2	/;"	d
SDRAM_INITPLR3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR3	/;"	d
SDRAM_INITPLR4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR4	/;"	d
SDRAM_INITPLR5	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR5	/;"	d
SDRAM_INITPLR6	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR6	/;"	d
SDRAM_INITPLR7	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR7	/;"	d
SDRAM_INITPLR8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR8	/;"	d
SDRAM_INITPLR9	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR9	/;"	d
SDRAM_INITPLR_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_DISABLE	/;"	d
SDRAM_INITPLR_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_ENABLE	/;"	d
SDRAM_INITPLR_IBA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_IBA_ENCODE(/;"	d
SDRAM_INITPLR_IBA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_IBA_MASK	/;"	d
SDRAM_INITPLR_ICMD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_ICMD_ENCODE(/;"	d
SDRAM_INITPLR_ICMD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_ICMD_MASK	/;"	d
SDRAM_INITPLR_IMA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_IMA_ENCODE(/;"	d
SDRAM_INITPLR_IMA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_IMA_MASK	/;"	d
SDRAM_INITPLR_IMWT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_IMWT_ENCODE(/;"	d
SDRAM_INITPLR_IMWT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_INITPLR_IMWT_MASK	/;"	d
SDRAM_INIT_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_INIT_CONTROL_REG	/;"	d
SDRAM_INON_CHBL	arch/blackfin/include/asm/cplb.h	/^#define SDRAM_INON_CHBL /;"	d
SDRAM_INTERVAL_BSTOPRE	include/fsl_ddr_sdram.h	/^#define SDRAM_INTERVAL_BSTOPRE	/;"	d
SDRAM_INTERVAL_BSTOPRE_SHIFT	include/mpc83xx.h	/^#define SDRAM_INTERVAL_BSTOPRE_SHIFT	/;"	d
SDRAM_INTERVAL_REFINT	include/mpc83xx.h	/^#define SDRAM_INTERVAL_REFINT	/;"	d
SDRAM_INTERVAL_REFINT_SHIFT	include/mpc83xx.h	/^#define SDRAM_INTERVAL_REFINT_SHIFT	/;"	d
SDRAM_LMR	board/mpl/pati/pati.h	/^#define SDRAM_LMR	/;"	d
SDRAM_MAX_CS	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SDRAM_MAX_CS	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM823L.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM823M.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM850L.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM850M.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM855L.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM855M.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM860L.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM860M.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM862L.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM862M.h	/^#define	SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM866M.h	/^#define SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/TQM885D.h	/^#define SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/km82xx.h	/^#define SDRAM_MAX_SIZE	/;"	d
SDRAM_MAX_SIZE	include/configs/km82xx.h	/^#define SDRAM_MAX_SIZE /;"	d
SDRAM_MB0CF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MB0CF	/;"	d
SDRAM_MB1CF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MB1CF	/;"	d
SDRAM_MB2CF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MB2CF	/;"	d
SDRAM_MB3CF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MB3CF	/;"	d
SDRAM_MCOPT1	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1	/;"	d
SDRAM_MCOPT1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1	/;"	d
SDRAM_MCOPT1_4_BANKS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_4_BANKS	/;"	d
SDRAM_MCOPT1_8_BANKS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_8_BANKS	/;"	d
SDRAM_MCOPT1_BCNT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_BCNT_MASK	/;"	d
SDRAM_MCOPT1_DCOO_DISABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DCOO_DISABLED	/;"	d
SDRAM_MCOPT1_DCOO_ENABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DCOO_ENABLED	/;"	d
SDRAM_MCOPT1_DCOO_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DCOO_MASK	/;"	d
SDRAM_MCOPT1_DDR1_TYPE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DDR1_TYPE	/;"	d
SDRAM_MCOPT1_DDR2_TYPE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DDR2_TYPE	/;"	d
SDRAM_MCOPT1_DDR_TYPE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DDR_TYPE_MASK	/;"	d
SDRAM_MCOPT1_DMWD_32	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_DMWD_32	/;"	d
SDRAM_MCOPT1_DMWD_32	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DMWD_32	/;"	d
SDRAM_MCOPT1_DMWD_64	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DMWD_64	/;"	d
SDRAM_MCOPT1_DMWD_MASK	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_DMWD_MASK	/;"	d
SDRAM_MCOPT1_DMWD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DMWD_MASK	/;"	d
SDRAM_MCOPT1_DREF_DEFER_4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DREF_DEFER_4	/;"	d
SDRAM_MCOPT1_DREF_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DREF_MASK	/;"	d
SDRAM_MCOPT1_DREF_NORMAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_DREF_NORMAL	/;"	d
SDRAM_MCOPT1_MCHK_CHK	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_MCHK_CHK	/;"	d
SDRAM_MCOPT1_MCHK_CHK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_MCHK_CHK	/;"	d
SDRAM_MCOPT1_MCHK_CHK_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_MCHK_CHK_DECODE(/;"	d
SDRAM_MCOPT1_MCHK_CHK_REP	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_MCHK_CHK_REP /;"	d
SDRAM_MCOPT1_MCHK_CHK_REP	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_MCHK_CHK_REP	/;"	d
SDRAM_MCOPT1_MCHK_GEN	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_MCHK_GEN	/;"	d
SDRAM_MCOPT1_MCHK_GEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_MCHK_GEN	/;"	d
SDRAM_MCOPT1_MCHK_MASK	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_MCHK_MASK	/;"	d
SDRAM_MCOPT1_MCHK_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_MCHK_MASK	/;"	d
SDRAM_MCOPT1_MCHK_NON	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCOPT1_MCHK_NON	/;"	d
SDRAM_MCOPT1_MCHK_NON	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_MCHK_NON	/;"	d
SDRAM_MCOPT1_PMU_AUTOCLOSE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_PMU_AUTOCLOSE	/;"	d
SDRAM_MCOPT1_PMU_CLOSE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_PMU_CLOSE	/;"	d
SDRAM_MCOPT1_PMU_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_PMU_MASK	/;"	d
SDRAM_MCOPT1_PMU_OPEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_PMU_OPEN	/;"	d
SDRAM_MCOPT1_QDEP	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_QDEP	/;"	d
SDRAM_MCOPT1_RDEN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_RDEN	/;"	d
SDRAM_MCOPT1_RDEN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_RDEN_MASK	/;"	d
SDRAM_MCOPT1_RWOO_DISABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_RWOO_DISABLED	/;"	d
SDRAM_MCOPT1_RWOO_ENABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_RWOO_ENABLED	/;"	d
SDRAM_MCOPT1_RWOO_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_RWOO_MASK	/;"	d
SDRAM_MCOPT1_UIOS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_UIOS_MASK	/;"	d
SDRAM_MCOPT1_WOOO_DISABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_WOOO_DISABLED	/;"	d
SDRAM_MCOPT1_WOOO_ENABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_WOOO_ENABLED	/;"	d
SDRAM_MCOPT1_WOOO_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT1_WOOO_MASK	/;"	d
SDRAM_MCOPT2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2	/;"	d
SDRAM_MCOPT2_DCEN_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_DCEN_DISABLE	/;"	d
SDRAM_MCOPT2_DCEN_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_DCEN_ENABLE	/;"	d
SDRAM_MCOPT2_DCEN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_DCEN_MASK	/;"	d
SDRAM_MCOPT2_IPTR_EXECUTE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_IPTR_EXECUTE	/;"	d
SDRAM_MCOPT2_IPTR_IDLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_IPTR_IDLE	/;"	d
SDRAM_MCOPT2_IPTR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_IPTR_MASK	/;"	d
SDRAM_MCOPT2_ISIE_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_ISIE_DISABLE	/;"	d
SDRAM_MCOPT2_ISIE_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_ISIE_ENABLE	/;"	d
SDRAM_MCOPT2_ISIE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_ISIE_MASK	/;"	d
SDRAM_MCOPT2_PMEN_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_PMEN_DISABLE	/;"	d
SDRAM_MCOPT2_PMEN_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_PMEN_ENABLE	/;"	d
SDRAM_MCOPT2_PMEN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_PMEN_MASK	/;"	d
SDRAM_MCOPT2_SREN_ENTER	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_SREN_ENTER	/;"	d
SDRAM_MCOPT2_SREN_EXIT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_SREN_EXIT	/;"	d
SDRAM_MCOPT2_SREN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_SREN_MASK	/;"	d
SDRAM_MCOPT2_XSRP_ALLOW	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_XSRP_ALLOW	/;"	d
SDRAM_MCOPT2_XSRP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_XSRP_MASK	/;"	d
SDRAM_MCOPT2_XSRP_PREVENT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCOPT2_XSRP_PREVENT	/;"	d
SDRAM_MCSTAT	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCSTAT	/;"	d
SDRAM_MCSTAT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT	/;"	d
SDRAM_MCSTAT_IDLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_IDLE	/;"	d
SDRAM_MCSTAT_IDLE_MASK	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCSTAT_IDLE_MASK	/;"	d
SDRAM_MCSTAT_IDLE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_IDLE_MASK	/;"	d
SDRAM_MCSTAT_IDLE_NOT	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define SDRAM_MCSTAT_IDLE_NOT	/;"	d
SDRAM_MCSTAT_IDLE_NOT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_IDLE_NOT	/;"	d
SDRAM_MCSTAT_MIC_COMP	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_MIC_COMP	/;"	d
SDRAM_MCSTAT_MIC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_MIC_MASK	/;"	d
SDRAM_MCSTAT_MIC_NOTCOMP	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_MIC_NOTCOMP	/;"	d
SDRAM_MCSTAT_SRMS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_SRMS_MASK	/;"	d
SDRAM_MCSTAT_SRMS_NOT_SF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_SRMS_NOT_SF	/;"	d
SDRAM_MCSTAT_SRMS_SF	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTAT_SRMS_SF	/;"	d
SDRAM_MCSTS_CIS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTS_CIS	/;"	d
SDRAM_MCSTS_IDLE_NOT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTS_IDLE_NOT	/;"	d
SDRAM_MCSTS_MRSC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTS_MRSC	/;"	d
SDRAM_MCSTS_SRMS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MCSTS_SRMS	/;"	d
SDRAM_MEMODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE	/;"	d
SDRAM_MEMODE_AL_DDR1_0_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_AL_DDR1_0_CYC	/;"	d
SDRAM_MEMODE_AL_DDR2_1_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_AL_DDR2_1_CYC	/;"	d
SDRAM_MEMODE_AL_DDR2_2_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_AL_DDR2_2_CYC	/;"	d
SDRAM_MEMODE_AL_DDR2_3_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_AL_DDR2_3_CYC	/;"	d
SDRAM_MEMODE_AL_DDR2_4_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_AL_DDR2_4_CYC	/;"	d
SDRAM_MEMODE_DIC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DIC_MASK	/;"	d
SDRAM_MEMODE_DIC_NORMAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DIC_NORMAL	/;"	d
SDRAM_MEMODE_DIC_WEAK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DIC_WEAK	/;"	d
SDRAM_MEMODE_DLL_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DLL_DISABLE	/;"	d
SDRAM_MEMODE_DLL_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DLL_ENABLE	/;"	d
SDRAM_MEMODE_DLL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DLL_MASK	/;"	d
SDRAM_MEMODE_DQS_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DQS_DISABLE	/;"	d
SDRAM_MEMODE_DQS_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DQS_ENABLE	/;"	d
SDRAM_MEMODE_DQS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_DQS_MASK	/;"	d
SDRAM_MEMODE_QOFF_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_QOFF_DISABLE	/;"	d
SDRAM_MEMODE_QOFF_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_QOFF_ENABLE	/;"	d
SDRAM_MEMODE_QOFF_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_QOFF_MASK	/;"	d
SDRAM_MEMODE_RDQS_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RDQS_DISABLE	/;"	d
SDRAM_MEMODE_RDQS_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RDQS_ENABLE	/;"	d
SDRAM_MEMODE_RDQS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RDQS_MASK	/;"	d
SDRAM_MEMODE_RTT_150OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RTT_150OHM	/;"	d
SDRAM_MEMODE_RTT_50OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RTT_50OHM	/;"	d
SDRAM_MEMODE_RTT_75OHM	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RTT_75OHM	/;"	d
SDRAM_MEMODE_RTT_DISABLED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RTT_DISABLED	/;"	d
SDRAM_MEMODE_RTT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MEMODE_RTT_MASK	/;"	d
SDRAM_MICRON	board/amcc/yucca/yucca.h	/^#define SDRAM_MICRON	/;"	d
SDRAM_MMODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE	/;"	d
SDRAM_MMODE_BLEN_4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_BLEN_4	/;"	d
SDRAM_MMODE_BLEN_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_BLEN_8	/;"	d
SDRAM_MMODE_BLEN_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_BLEN_MASK	/;"	d
SDRAM_MMODE_BTYP_INTERLEAVED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_BTYP_INTERLEAVED	/;"	d
SDRAM_MMODE_BTYP_SEQUENTIAL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_BTYP_SEQUENTIAL	/;"	d
SDRAM_MMODE_DCL_DDR1_2_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR1_2_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR1_2_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR1_2_5_CLK	/;"	d
SDRAM_MMODE_DCL_DDR1_3_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR1_3_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR2_2_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR2_2_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR2_3_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR2_3_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR2_4_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR2_4_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR2_5_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR2_5_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR2_6_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR2_6_0_CLK	/;"	d
SDRAM_MMODE_DCL_DDR2_7_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_DDR2_7_0_CLK	/;"	d
SDRAM_MMODE_DCL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_DCL_MASK	/;"	d
SDRAM_MMODE_WR_DDR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_DDR1	/;"	d
SDRAM_MMODE_WR_DDR2_2_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_DDR2_2_CYC	/;"	d
SDRAM_MMODE_WR_DDR2_3_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_DDR2_3_CYC	/;"	d
SDRAM_MMODE_WR_DDR2_4_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_DDR2_4_CYC	/;"	d
SDRAM_MMODE_WR_DDR2_5_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_DDR2_5_CYC	/;"	d
SDRAM_MMODE_WR_DDR2_6_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_DDR2_6_CYC	/;"	d
SDRAM_MMODE_WR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MMODE_WR_MASK	/;"	d
SDRAM_MODE	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_MODE	/;"	d	file:
SDRAM_MODE	board/a3m071/is46r16320d.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/a4m072/mt46v32m16.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/canmb/mt48lc16m32s2-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/ifm/o2dnt2/o2dnt2.c	/^#define SDRAM_MODE	/;"	d	file:
SDRAM_MODE	board/inka4x0/k4h511638c.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/inka4x0/mt48lc16m16a2-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/intercontrol/digsy_mtc/is42s16800a-7t.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/intercontrol/digsy_mtc/is45s16800a2.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/ipek01/ipek01.c	/^#define SDRAM_MODE	/;"	d	file:
SDRAM_MODE	board/jupiter/jupiter.c	/^#define SDRAM_MODE	/;"	d	file:
SDRAM_MODE	board/munices/mt48lc16m16a2-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	board/renesas/rsk7203/lowlevel_init.S	/^SDRAM_MODE:	.long 0xFFFC5040$/;"	l
SDRAM_MODE	board/renesas/rsk7264/lowlevel_init.S	/^SDRAM_MODE:	.long 0xFFFC5040$/;"	l
SDRAM_MODE	board/renesas/rsk7269/lowlevel_init.S	/^SDRAM_MODE:	.long 0xFFFC5460$/;"	l
SDRAM_MODE	board/tqc/tqm5200/mt48lc16m16a2-75.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	include/configs/cm5200.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_MODE /;"	d
SDRAM_MODE	include/configs/motionpro.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE	include/configs/v38b.h	/^#define SDRAM_MODE	/;"	d
SDRAM_MODE_BL	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_MODE_BL	/;"	d	file:
SDRAM_MODE_BL	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_MODE_BL	/;"	d	file:
SDRAM_MODE_BL_SHIFT	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_MODE_BL_SHIFT	/;"	d	file:
SDRAM_MODE_BL_SHIFT	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_MODE_BL_SHIFT	/;"	d	file:
SDRAM_MODE_CAS	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_MODE_CAS	/;"	d	file:
SDRAM_MODE_CAS	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_MODE_CAS	/;"	d	file:
SDRAM_MODE_CAS_SHIFT	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_MODE_CAS_SHIFT	/;"	d	file:
SDRAM_MODE_CAS_SHIFT	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_MODE_CAS_SHIFT	/;"	d	file:
SDRAM_MODE_ESD	include/mpc83xx.h	/^#define SDRAM_MODE_ESD	/;"	d
SDRAM_MODE_ESD_SHIFT	include/mpc83xx.h	/^#define SDRAM_MODE_ESD_SHIFT	/;"	d
SDRAM_MODE_REGISTER_VAL	include/configs/imx27lite-common.h	/^#define SDRAM_MODE_REGISTER_VAL	/;"	d
SDRAM_MODE_SD	include/mpc83xx.h	/^#define SDRAM_MODE_SD	/;"	d
SDRAM_MODE_SD_SHIFT	include/mpc83xx.h	/^#define SDRAM_MODE_SD_SHIFT	/;"	d
SDRAM_MODT0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT0	/;"	d
SDRAM_MODT1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT1	/;"	d
SDRAM_MODT2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT2	/;"	d
SDRAM_MODT3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT3	/;"	d
SDRAM_MODT_EB0R_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB0R_DISABLE	/;"	d
SDRAM_MODT_EB0R_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB0R_ENABLE	/;"	d
SDRAM_MODT_EB0W_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB0W_DISABLE	/;"	d
SDRAM_MODT_EB0W_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB0W_ENABLE	/;"	d
SDRAM_MODT_EB1R_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB1R_DISABLE	/;"	d
SDRAM_MODT_EB1R_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB1R_ENABLE	/;"	d
SDRAM_MODT_EB1W_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB1W_DISABLE	/;"	d
SDRAM_MODT_EB1W_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_EB1W_ENABLE	/;"	d
SDRAM_MODT_ODTON_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_ODTON_DISABLE	/;"	d
SDRAM_MODT_ODTON_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_MODT_ODTON_ENABLE	/;"	d
SDRAM_MUX0	board/mpl/pati/pati.h	/^#define SDRAM_MUX0	/;"	d
SDRAM_MUX1	board/mpl/pati/pati.h	/^#define SDRAM_MUX1	/;"	d
SDRAM_MWID	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_MWID	/;"	d	file:
SDRAM_MWID	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_MWID	/;"	d	file:
SDRAM_NB	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_NB	/;"	d	file:
SDRAM_NB	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_NB	/;"	d	file:
SDRAM_NC	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_NC	/;"	d	file:
SDRAM_NC	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_NC	/;"	d	file:
SDRAM_NONE	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SDRAM_NONE	/;"	d	file:
SDRAM_NONE	board/amcc/yucca/yucca.h	/^#define SDRAM_NONE	/;"	d
SDRAM_NO_ERR	board/mpl/pip405/pip405.c	/^	SDRAM_NO_ERR,$/;"	e	enum:__anonb110a3780203	file:
SDRAM_NR	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_NR	/;"	d	file:
SDRAM_NR	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_NR	/;"	d	file:
SDRAM_ODT_CONTROL_HIGH_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_ODT_CONTROL_HIGH_REG	/;"	d
SDRAM_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFFSET	/;"	d
SDRAM_OFFSET	include/configs/sunxi-common.h	/^#define SDRAM_OFFSET(/;"	d
SDRAM_OFF_DEVCFG0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFF_DEVCFG0	/;"	d
SDRAM_OFF_DEVCFG1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFF_DEVCFG1	/;"	d
SDRAM_OFF_DEVCFG2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFF_DEVCFG2	/;"	d
SDRAM_OFF_DEVCFG3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFF_DEVCFG3	/;"	d
SDRAM_OFF_GLCONFIG	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFF_GLCONFIG	/;"	d
SDRAM_OFF_REFRSHTIMR	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SDRAM_OFF_REFRSHTIMR	/;"	d
SDRAM_OPARS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_OPARS	/;"	d
SDRAM_OPART	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_OPART	/;"	d
SDRAM_OPEN_PAGE_CONTROL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_OPEN_PAGE_CONTROL_REG	/;"	d
SDRAM_OPEN_PAGE_EN	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_OPEN_PAGE_EN	/;"	d	file:
SDRAM_OPERATION_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_OPERATION_REG	/;"	d
SDRAM_OP_NOP	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_OP_NOP	/;"	d	file:
SDRAM_OP_SETMODE	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_OP_SETMODE	/;"	d	file:
SDRAM_PAD_CTRL_DRVN_MASK	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_PAD_CTRL_DRVN_MASK	/;"	d	file:
SDRAM_PAD_CTRL_DRVP_MASK	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_PAD_CTRL_DRVP_MASK	/;"	d	file:
SDRAM_PAD_CTRL_DRV_STR_MASK	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_PAD_CTRL_DRV_STR_MASK	/;"	d	file:
SDRAM_PAD_CTRL_TUNE_EN	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_PAD_CTRL_TUNE_EN	/;"	d	file:
SDRAM_PAD_CTRL_WR_EN	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_PAD_CTRL_WR_EN	/;"	d	file:
SDRAM_PARAMS_BASE	arch/arm/mach-tegra/tegra20/warmboot.c	/^#define SDRAM_PARAMS_BASE	/;"	d	file:
SDRAM_PART	board/mpl/pati/pati.h	/^#define SDRAM_PART(/;"	d
SDRAM_PART0	board/mpl/pati/pati.h	/^#define SDRAM_PART0	/;"	d
SDRAM_PART1	board/mpl/pati/pati.h	/^#define SDRAM_PART1	/;"	d
SDRAM_PART2	board/mpl/pati/pati.h	/^#define SDRAM_PART2	/;"	d
SDRAM_PART3	board/mpl/pati/pati.h	/^#define SDRAM_PART3	/;"	d
SDRAM_PBS_II_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_PBS_II_OFFS	/;"	d
SDRAM_PBS_I_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_PBS_I_OFFS	/;"	d
SDRAM_PBS_NEXT_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_PBS_NEXT_OFFS	/;"	d
SDRAM_PBS_TX_DM_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_PBS_TX_DM_OFFS	/;"	d
SDRAM_PBS_TX_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_PBS_TX_OFFS	/;"	d
SDRAM_PDIS	board/mpl/pati/pati.h	/^#define SDRAM_PDIS	/;"	d
SDRAM_PLBADDUHB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_PLBADDUHB	/;"	d
SDRAM_PLBADDULL	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_PLBADDULL	/;"	d
SDRAM_PLBOPT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_PLBOPT	/;"	d
SDRAM_PMIT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_PMIT	/;"	d
SDRAM_PR	board/mpl/pati/pati.h	/^#define SDRAM_PR	/;"	d
SDRAM_PUABA	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_PUABA	/;"	d
SDRAM_R0BAS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_R0BAS	/;"	d
SDRAM_R1BAS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_R1BAS	/;"	d
SDRAM_R2BAS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_R2BAS	/;"	d
SDRAM_R3BAS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_R3BAS	/;"	d
SDRAM_RBURST	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_RBURST	/;"	d	file:
SDRAM_RBURST	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_RBURST	/;"	d	file:
SDRAM_RC	board/mpl/pati/pati.h	/^#define SDRAM_RC	/;"	d
SDRAM_RCD	board/mpl/pati/pati.h	/^#define SDRAM_RCD	/;"	d
SDRAM_RDCC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC	/;"	d
SDRAM_RDCC_RDSS_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_DECODE(/;"	d
SDRAM_RDCC_RDSS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_ENCODE(/;"	d
SDRAM_RDCC_RDSS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_MASK	/;"	d
SDRAM_RDCC_RDSS_T1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_T1	/;"	d
SDRAM_RDCC_RDSS_T2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_T2	/;"	d
SDRAM_RDCC_RDSS_T3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_T3	/;"	d
SDRAM_RDCC_RDSS_T4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RDSS_T4	/;"	d
SDRAM_RDCC_RDSS_VAL	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^#define SDRAM_RDCC_RDSS_VAL(/;"	d	file:
SDRAM_RDCC_RSAE_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RSAE_DISABLE	/;"	d
SDRAM_RDCC_RSAE_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RSAE_ENABLE	/;"	d
SDRAM_RDCC_RSAE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RDCC_RSAE_MASK	/;"	d
SDRAM_READ_WRITE_LEN_IN_DOUBLE_WORDS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define SDRAM_READ_WRITE_LEN_IN_DOUBLE_WORDS /;"	d
SDRAM_READ_WRITE_LEN_IN_WORDS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define SDRAM_READ_WRITE_LEN_IN_WORDS /;"	d
SDRAM_REG	board/mpl/vcma9/lowlevel_init.S	/^#define SDRAM_REG	/;"	d	file:
SDRAM_RES0	board/mpl/pati/pati.h	/^#define SDRAM_RES0	/;"	d
SDRAM_RES1	board/mpl/pati/pati.h	/^#define SDRAM_RES1	/;"	d
SDRAM_RES2	board/mpl/pati/pati.h	/^#define SDRAM_RES2	/;"	d
SDRAM_RES3	board/mpl/pati/pati.h	/^#define SDRAM_RES3	/;"	d
SDRAM_RES4	board/mpl/pati/pati.h	/^#define SDRAM_RES4	/;"	d
SDRAM_RES5	board/mpl/pati/pati.h	/^#define SDRAM_RES5	/;"	d
SDRAM_RES6	board/mpl/pati/pati.h	/^#define SDRAM_RES6	/;"	d
SDRAM_RES7	board/mpl/pati/pati.h	/^#define SDRAM_RES7	/;"	d
SDRAM_RFDC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC	/;"	d
SDRAM_RFDC_ARSE_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_ARSE_DISABLE	/;"	d
SDRAM_RFDC_ARSE_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_ARSE_ENABLE	/;"	d
SDRAM_RFDC_ARSE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_ARSE_MASK	/;"	d
SDRAM_RFDC_RFFD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_RFFD_ENCODE(/;"	d
SDRAM_RFDC_RFFD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_RFFD_MASK	/;"	d
SDRAM_RFDC_RFFD_MAX	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_RFFD_MAX	/;"	d
SDRAM_RFDC_RFOS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_RFOS_ENCODE(/;"	d
SDRAM_RFDC_RFOS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RFDC_RFOS_MASK	/;"	d
SDRAM_RID	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RID	/;"	d
SDRAM_RIP	board/mpl/pati/pati.h	/^#define SDRAM_RIP	/;"	d
SDRAM_RL_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_RL_OFFS	/;"	d
SDRAM_RPIPE	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_RPIPE	/;"	d	file:
SDRAM_RPIPE	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_RPIPE	/;"	d	file:
SDRAM_RQDC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC	/;"	d
SDRAM_RQDC_RQDE_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC_RQDE_DISABLE	/;"	d
SDRAM_RQDC_RQDE_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC_RQDE_ENABLE	/;"	d
SDRAM_RQDC_RQDE_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC_RQDE_MASK	/;"	d
SDRAM_RQDC_RQFD_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC_RQFD_ENCODE(/;"	d
SDRAM_RQDC_RQFD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC_RQFD_MASK	/;"	d
SDRAM_RQDC_RQFD_MAX	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RQDC_RQFD_MAX	/;"	d
SDRAM_RTR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTR	/;"	d
SDRAM_RTR_RINT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTR_RINT_DECODE(/;"	d
SDRAM_RTR_RINT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTR_RINT_ENCODE(/;"	d
SDRAM_RTR_RINT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTR_RINT_MASK	/;"	d
SDRAM_RTSR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTSR	/;"	d
SDRAM_RTSR_TRK1SM_ATBASE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTSR_TRK1SM_ATBASE	/;"	d
SDRAM_RTSR_TRK1SM_ATPLS1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTSR_TRK1SM_ATPLS1	/;"	d
SDRAM_RTSR_TRK1SM_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTSR_TRK1SM_MASK	/;"	d
SDRAM_RTSR_TRK1SM_MISSED	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTSR_TRK1SM_MISSED	/;"	d
SDRAM_RTSR_TRK1SM_RESET	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RTSR_TRK1SM_RESET	/;"	d
SDRAM_RXBAS_SDAM_MODE0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE0	/;"	d
SDRAM_RXBAS_SDAM_MODE1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE1	/;"	d
SDRAM_RXBAS_SDAM_MODE2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE2	/;"	d
SDRAM_RXBAS_SDAM_MODE3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE3	/;"	d
SDRAM_RXBAS_SDAM_MODE4	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE4	/;"	d
SDRAM_RXBAS_SDAM_MODE5	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE5	/;"	d
SDRAM_RXBAS_SDAM_MODE6	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE6	/;"	d
SDRAM_RXBAS_SDAM_MODE7	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE7	/;"	d
SDRAM_RXBAS_SDAM_MODE8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE8	/;"	d
SDRAM_RXBAS_SDAM_MODE9	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDAM_MODE9	/;"	d
SDRAM_RXBAS_SDBA_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDBA_DECODE(/;"	d
SDRAM_RXBAS_SDBA_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDBA_ENCODE(/;"	d
SDRAM_RXBAS_SDBA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDBA_MASK	/;"	d
SDRAM_RXBAS_SDBE_DISABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDBE_DISABLE	/;"	d
SDRAM_RXBAS_SDBE_ENABLE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDBE_ENABLE	/;"	d
SDRAM_RXBAS_SDSZ_0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_0	/;"	d
SDRAM_RXBAS_SDSZ_1024	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_1024	/;"	d
SDRAM_RXBAS_SDSZ_1024MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_1024MB	/;"	d
SDRAM_RXBAS_SDSZ_128	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_128	/;"	d
SDRAM_RXBAS_SDSZ_128	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_128 /;"	d
SDRAM_RXBAS_SDSZ_128MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_128MB	/;"	d
SDRAM_RXBAS_SDSZ_16	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_16	/;"	d
SDRAM_RXBAS_SDSZ_16	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_16 /;"	d
SDRAM_RXBAS_SDSZ_16MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_16MB	/;"	d
SDRAM_RXBAS_SDSZ_2048	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_2048	/;"	d
SDRAM_RXBAS_SDSZ_2048MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_2048MB	/;"	d
SDRAM_RXBAS_SDSZ_256	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_256	/;"	d
SDRAM_RXBAS_SDSZ_256	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_256 /;"	d
SDRAM_RXBAS_SDSZ_256MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_256MB	/;"	d
SDRAM_RXBAS_SDSZ_32	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_32	/;"	d
SDRAM_RXBAS_SDSZ_32	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_32 /;"	d
SDRAM_RXBAS_SDSZ_32MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_32MB	/;"	d
SDRAM_RXBAS_SDSZ_4096	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_4096	/;"	d
SDRAM_RXBAS_SDSZ_4096MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_4096MB	/;"	d
SDRAM_RXBAS_SDSZ_4MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_4MB	/;"	d
SDRAM_RXBAS_SDSZ_512	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_512	/;"	d
SDRAM_RXBAS_SDSZ_512	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_512 /;"	d
SDRAM_RXBAS_SDSZ_512MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_512MB	/;"	d
SDRAM_RXBAS_SDSZ_64	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_64	/;"	d
SDRAM_RXBAS_SDSZ_64	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_64 /;"	d
SDRAM_RXBAS_SDSZ_64MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_64MB	/;"	d
SDRAM_RXBAS_SDSZ_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_8	/;"	d
SDRAM_RXBAS_SDSZ_8	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_8 /;"	d
SDRAM_RXBAS_SDSZ_8192	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_8192	/;"	d
SDRAM_RXBAS_SDSZ_8192MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_8192MB	/;"	d
SDRAM_RXBAS_SDSZ_8MB	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_8MB	/;"	d
SDRAM_RXBAS_SDSZ_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_DECODE(/;"	d
SDRAM_RXBAS_SDSZ_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_ENCODE(/;"	d
SDRAM_RXBAS_SDSZ_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_RXBAS_SDSZ_MASK	/;"	d
SDRAM_RXBAS_SHIFT_1M	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^#define SDRAM_RXBAS_SHIFT_1M	/;"	d	file:
SDRAM_SDTR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1	/;"	d
SDRAM_SDTR1_LDOF_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_LDOF_1_CLK	/;"	d
SDRAM_SDTR1_LDOF_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_LDOF_2_CLK	/;"	d
SDRAM_SDTR1_LDOF_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_LDOF_MASK	/;"	d
SDRAM_SDTR1_RTRO_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_RTRO_1_CLK	/;"	d
SDRAM_SDTR1_RTRO_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_RTRO_2_CLK	/;"	d
SDRAM_SDTR1_RTRO_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_RTRO_MASK	/;"	d
SDRAM_SDTR1_RTW_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_RTW_2_CLK	/;"	d
SDRAM_SDTR1_RTW_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_RTW_3_CLK	/;"	d
SDRAM_SDTR1_RTW_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_RTW_MASK	/;"	d
SDRAM_SDTR1_WTWO_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_WTWO_0_CLK	/;"	d
SDRAM_SDTR1_WTWO_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_WTWO_1_CLK	/;"	d
SDRAM_SDTR1_WTWO_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR1_WTWO_MASK	/;"	d
SDRAM_SDTR2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2	/;"	d
SDRAM_SDTR2_RCD_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RCD_1_CLK	/;"	d
SDRAM_SDTR2_RCD_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RCD_2_CLK	/;"	d
SDRAM_SDTR2_RCD_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RCD_3_CLK	/;"	d
SDRAM_SDTR2_RCD_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RCD_4_CLK	/;"	d
SDRAM_SDTR2_RCD_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RCD_5_CLK	/;"	d
SDRAM_SDTR2_RCD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RCD_MASK	/;"	d
SDRAM_SDTR2_RPC_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RPC_2_CLK	/;"	d
SDRAM_SDTR2_RPC_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RPC_3_CLK	/;"	d
SDRAM_SDTR2_RPC_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RPC_4_CLK	/;"	d
SDRAM_SDTR2_RPC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RPC_MASK	/;"	d
SDRAM_SDTR2_RP_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RP_3_CLK	/;"	d
SDRAM_SDTR2_RP_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RP_4_CLK	/;"	d
SDRAM_SDTR2_RP_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RP_5_CLK	/;"	d
SDRAM_SDTR2_RP_6_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RP_6_CLK	/;"	d
SDRAM_SDTR2_RP_7_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RP_7_CLK	/;"	d
SDRAM_SDTR2_RP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RP_MASK	/;"	d
SDRAM_SDTR2_RRD_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RRD_2_CLK	/;"	d
SDRAM_SDTR2_RRD_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RRD_3_CLK	/;"	d
SDRAM_SDTR2_RRD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_RRD_MASK	/;"	d
SDRAM_SDTR2_WPC_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WPC_2_CLK	/;"	d
SDRAM_SDTR2_WPC_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WPC_3_CLK	/;"	d
SDRAM_SDTR2_WPC_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WPC_4_CLK	/;"	d
SDRAM_SDTR2_WPC_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WPC_5_CLK	/;"	d
SDRAM_SDTR2_WPC_6_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WPC_6_CLK	/;"	d
SDRAM_SDTR2_WPC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WPC_MASK	/;"	d
SDRAM_SDTR2_WTR_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WTR_1_CLK	/;"	d
SDRAM_SDTR2_WTR_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WTR_2_CLK	/;"	d
SDRAM_SDTR2_WTR_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WTR_3_CLK	/;"	d
SDRAM_SDTR2_WTR_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WTR_4_CLK	/;"	d
SDRAM_SDTR2_WTR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_WTR_MASK	/;"	d
SDRAM_SDTR2_XSNR_16_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_XSNR_16_CLK	/;"	d
SDRAM_SDTR2_XSNR_32_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_XSNR_32_CLK	/;"	d
SDRAM_SDTR2_XSNR_64_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_XSNR_64_CLK	/;"	d
SDRAM_SDTR2_XSNR_8_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_XSNR_8_CLK	/;"	d
SDRAM_SDTR2_XSNR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR2_XSNR_MASK	/;"	d
SDRAM_SDTR3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3	/;"	d
SDRAM_SDTR3_RAS_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_RAS_ENCODE(/;"	d
SDRAM_SDTR3_RAS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_RAS_MASK	/;"	d
SDRAM_SDTR3_RC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_RC_ENCODE(/;"	d
SDRAM_SDTR3_RC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_RC_MASK	/;"	d
SDRAM_SDTR3_RFC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_RFC_ENCODE(/;"	d
SDRAM_SDTR3_RFC_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_RFC_MASK	/;"	d
SDRAM_SDTR3_WPC_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_WPC_ENCODE(/;"	d
SDRAM_SDTR3_WTR_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_WTR_ENCODE(/;"	d
SDRAM_SDTR3_XCS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_XCS	/;"	d
SDRAM_SDTR3_XCS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_SDTR3_XCS_MASK	/;"	d
SDRAM_SETUP	board/mpl/pip405/pip405.c	/^} SDRAM_SETUP;$/;"	t	typeref:struct:__anonb110a3780308	file:
SDRAM_SIZE	include/configs/nokia_rx51.h	/^#define SDRAM_SIZE	/;"	d
SDRAM_SIZE_MAX	arch/arm/mach-mvebu/dram.c	/^#define SDRAM_SIZE_MAX	/;"	d	file:
SDRAM_SPD_CHKSUM_ERR	board/mpl/pip405/pip405.c	/^	SDRAM_SPD_CHKSUM_ERR,$/;"	e	enum:__anonb110a3780203	file:
SDRAM_SPD_COMM_ERR	board/mpl/pip405/pip405.c	/^	SDRAM_SPD_COMM_ERR,$/;"	e	enum:__anonb110a3780203	file:
SDRAM_TAPDELAY	board/a3m071/is46r16320d.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	board/a3m071/mt46v16m16-75.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	board/a4m072/mt46v32m16.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	board/inka4x0/k4h511638c.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	board/inka4x0/mt46v16m16-75.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	board/inka4x0/mt46v32m16-75.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	board/ipek01/ipek01.c	/^#define SDRAM_TAPDELAY	/;"	d	file:
SDRAM_TAPDELAY	board/phytec/pcm030/mt46v32m16-75.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TAPDELAY	include/configs/manroland/mpc5200-common.h	/^#define SDRAM_TAPDELAY /;"	d
SDRAM_TAPDELAY	include/configs/v38b.h	/^#define SDRAM_TAPDELAY	/;"	d
SDRAM_TBDL	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TBDL	/;"	d	file:
SDRAM_TBDL	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TBDL	/;"	d	file:
SDRAM_TCCD	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TCCD	/;"	d	file:
SDRAM_TCCD	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TCCD	/;"	d	file:
SDRAM_TCDL	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TCDL	/;"	d	file:
SDRAM_TCDL	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TCDL	/;"	d	file:
SDRAM_TEMP_HIGH_DERATE_REFRESH	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_HIGH_DERATE_REFRESH	/;"	d
SDRAM_TEMP_HIGH_DERATE_REFRESH_AND_TIMINGS	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_HIGH_DERATE_REFRESH_AND_TIMINGS	/;"	d
SDRAM_TEMP_LESS_2X_REFRESH_AND_TIMINGS	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_LESS_2X_REFRESH_AND_TIMINGS	/;"	d
SDRAM_TEMP_LESS_4X_REFRESH_AND_TIMINGS	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_LESS_4X_REFRESH_AND_TIMINGS	/;"	d
SDRAM_TEMP_LESS_LOW_SHUTDOWN	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_LESS_LOW_SHUTDOWN	/;"	d
SDRAM_TEMP_NOMINAL	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_NOMINAL	/;"	d
SDRAM_TEMP_RESERVED_4	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_RESERVED_4	/;"	d
SDRAM_TEMP_VERY_HIGH_SHUTDOWN	arch/arm/include/asm/emif.h	/^#define SDRAM_TEMP_VERY_HIGH_SHUTDOWN	/;"	d
SDRAM_TIME_CTRL_HI	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_TIME_CTRL_HI	/;"	d	file:
SDRAM_TIME_CTRL_LOW	arch/arm/mach-orion5x/lowlevel_init.S	/^#define SDRAM_TIME_CTRL_LOW	/;"	d	file:
SDRAM_TIMING_HIGH_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_TIMING_HIGH_REG	/;"	d
SDRAM_TIMING_LOW_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define SDRAM_TIMING_LOW_REG	/;"	d
SDRAM_TMRD	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TMRD	/;"	d	file:
SDRAM_TMRD	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TMRD	/;"	d	file:
SDRAM_TR0_SDCL_2_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCL_2_0_CLK /;"	d
SDRAM_TR0_SDCL_2_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCL_2_5_CLK /;"	d
SDRAM_TR0_SDCL_3_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCL_3_0_CLK /;"	d
SDRAM_TR0_SDCL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDCL_MASK	/;"	d
SDRAM_TR0_SDCP_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCP_2_CLK	/;"	d
SDRAM_TR0_SDCP_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCP_3_CLK	/;"	d
SDRAM_TR0_SDCP_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCP_4_CLK	/;"	d
SDRAM_TR0_SDCP_5_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDCP_5_CLK	/;"	d
SDRAM_TR0_SDCP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDCP_MASK	/;"	d
SDRAM_TR0_SDLD_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDLD_1_CLK	/;"	d
SDRAM_TR0_SDLD_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDLD_2_CLK	/;"	d
SDRAM_TR0_SDLD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDLD_MASK	/;"	d
SDRAM_TR0_SDPA_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDPA_2_CLK	/;"	d
SDRAM_TR0_SDPA_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDPA_3_CLK	/;"	d
SDRAM_TR0_SDPA_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDPA_4_CLK	/;"	d
SDRAM_TR0_SDPA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDPA_MASK	/;"	d
SDRAM_TR0_SDRA_10_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_10_CLK	/;"	d
SDRAM_TR0_SDRA_11_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_11_CLK	/;"	d
SDRAM_TR0_SDRA_12_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_12_CLK	/;"	d
SDRAM_TR0_SDRA_13_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_13_CLK	/;"	d
SDRAM_TR0_SDRA_6_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_6_CLK	/;"	d
SDRAM_TR0_SDRA_7_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_7_CLK	/;"	d
SDRAM_TR0_SDRA_8_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_8_CLK	/;"	d
SDRAM_TR0_SDRA_9_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRA_9_CLK	/;"	d
SDRAM_TR0_SDRA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDRA_MASK	/;"	d
SDRAM_TR0_SDRD_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRD_2_CLK	/;"	d
SDRAM_TR0_SDRD_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRD_3_CLK	/;"	d
SDRAM_TR0_SDRD_4_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDRD_4_CLK	/;"	d
SDRAM_TR0_SDRD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDRD_MASK	/;"	d
SDRAM_TR0_SDWD_0_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDWD_0_CLK	/;"	d
SDRAM_TR0_SDWD_1_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDWD_1_CLK	/;"	d
SDRAM_TR0_SDWD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDWD_MASK	/;"	d
SDRAM_TR0_SDWR_2_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDWR_2_CLK	/;"	d
SDRAM_TR0_SDWR_3_CLK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR0_SDWR_3_CLK	/;"	d
SDRAM_TR0_SDWR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR0_SDWR_MASK	/;"	d
SDRAM_TR1_RDCD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR1_RDCD_MASK	/;"	d
SDRAM_TR1_RDCD_RCD_0_0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDCD_RCD_0_0 /;"	d
SDRAM_TR1_RDCD_RCD_1_2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDCD_RCD_1_2 /;"	d
SDRAM_TR1_RDCT_DECODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDCT_DECODE(/;"	d
SDRAM_TR1_RDCT_ENCODE	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDCT_ENCODE(/;"	d
SDRAM_TR1_RDCT_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR1_RDCT_MASK	/;"	d
SDRAM_TR1_RDCT_MAX	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDCT_MAX	/;"	d
SDRAM_TR1_RDCT_MIN	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDCT_MIN	/;"	d
SDRAM_TR1_RDSL_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR1_RDSL_MASK	/;"	d
SDRAM_TR1_RDSL_STAGE1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSL_STAGE1	/;"	d
SDRAM_TR1_RDSL_STAGE2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSL_STAGE2	/;"	d
SDRAM_TR1_RDSL_STAGE3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSL_STAGE3	/;"	d
SDRAM_TR1_RDSS_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_TR1_RDSS_MASK	/;"	d
SDRAM_TR1_RDSS_TR0	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSS_TR0	/;"	d
SDRAM_TR1_RDSS_TR1	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSS_TR1	/;"	d
SDRAM_TR1_RDSS_TR2	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSS_TR2	/;"	d
SDRAM_TR1_RDSS_TR3	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_TR1_RDSS_TR3	/;"	d
SDRAM_TRAS	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRAS	/;"	d	file:
SDRAM_TRAS	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRAS	/;"	d	file:
SDRAM_TRC	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRC	/;"	d	file:
SDRAM_TRC	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRC	/;"	d	file:
SDRAM_TRCD	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRCD	/;"	d	file:
SDRAM_TRCD	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRCD	/;"	d	file:
SDRAM_TRDL	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRDL	/;"	d	file:
SDRAM_TRDL	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRDL	/;"	d	file:
SDRAM_TREF	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TREF	/;"	d	file:
SDRAM_TREF	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TREF	/;"	d	file:
SDRAM_TREFI	board/freescale/m5275evb/m5275evb.c	/^#define SDRAM_TREFI	/;"	d	file:
SDRAM_TRFC	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRFC	/;"	d	file:
SDRAM_TRFC	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRFC	/;"	d	file:
SDRAM_TRP	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRP	/;"	d	file:
SDRAM_TRP	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRP	/;"	d	file:
SDRAM_TRRD	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TRRD	/;"	d	file:
SDRAM_TRRD	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TRRD	/;"	d	file:
SDRAM_TRUE	board/amcc/yucca/yucca.h	/^#define SDRAM_TRUE	/;"	d
SDRAM_TWR	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TWR	/;"	d	file:
SDRAM_TWR	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TWR	/;"	d	file:
SDRAM_TXSR	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define SDRAM_TXSR	/;"	d	file:
SDRAM_TXSR	board/st/stm32f746-disco/stm32f746-disco.c	/^#define SDRAM_TXSR	/;"	d	file:
SDRAM_TYPE_DDR1	include/fsl_ddr_sdram.h	/^#define SDRAM_TYPE_DDR1	/;"	d
SDRAM_TYPE_DDR2	include/fsl_ddr_sdram.h	/^#define SDRAM_TYPE_DDR2	/;"	d
SDRAM_TYPE_DDR3	include/fsl_ddr_sdram.h	/^#define SDRAM_TYPE_DDR3	/;"	d
SDRAM_TYPE_DDR4	include/fsl_ddr_sdram.h	/^#define SDRAM_TYPE_DDR4	/;"	d
SDRAM_TYPE_LPDDR1	include/fsl_ddr_sdram.h	/^#define SDRAM_TYPE_LPDDR1	/;"	d
SDRAM_UABBA_UBBA_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_UABBA_UBBA_MASK	/;"	d
SDRAM_UNKNOWN_ERR	board/mpl/pip405/pip405.c	/^	SDRAM_UNKNOWN_ERR$/;"	e	enum:__anonb110a3780203	file:
SDRAM_UNSUPPORTED_ERR	board/mpl/pip405/pip405.c	/^	SDRAM_UNSUPPORTED_ERR,$/;"	e	enum:__anonb110a3780203	file:
SDRAM_VVPR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_VVPR	/;"	d
SDRAM_WDDCTR_DCD_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WDDCTR_DCD_MASK	/;"	d
SDRAM_WDDCTR_WRCP_0DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_WDDCTR_WRCP_0DEG	/;"	d
SDRAM_WDDCTR_WRCP_180DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_WDDCTR_WRCP_180DEG /;"	d
SDRAM_WDDCTR_WRCP_90DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define	 SDRAM_WDDCTR_WRCP_90DEG /;"	d
SDRAM_WDDCTR_WRCP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WDDCTR_WRCP_MASK	/;"	d
SDRAM_WIDTH_16BIT_WITH_ECC	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDRAM_WIDTH_16BIT_WITH_ECC	/;"	d
SDRAM_WIDTH_32BIT_WITH_ECC	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDRAM_WIDTH_32BIT_WITH_ECC	/;"	d
SDRAM_WL_SW_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SDRAM_WL_SW_OFFS	/;"	d
SDRAM_WMIRQ	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WMIRQ	/;"	d
SDRAM_WMIRQT	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WMIRQT	/;"	d
SDRAM_WRDTR	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR	/;"	d
SDRAM_WRDTR_LLWP_1_CYC	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_LLWP_1_CYC	/;"	d
SDRAM_WRDTR_LLWP_DIS	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_LLWP_DIS	/;"	d
SDRAM_WRDTR_LLWP_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_LLWP_MASK	/;"	d
SDRAM_WRDTR_WTR_0_DEG	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_WTR_0_DEG	/;"	d
SDRAM_WRDTR_WTR_180_DEG_ADV	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_WTR_180_DEG_ADV	/;"	d
SDRAM_WRDTR_WTR_270_DEG_ADV	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_WTR_270_DEG_ADV	/;"	d
SDRAM_WRDTR_WTR_90_DEG_ADV	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_WTR_90_DEG_ADV	/;"	d
SDRAM_WRDTR_WTR_MASK	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define SDRAM_WRDTR_WTR_MASK	/;"	d
SDRAM_WREQ	board/mpl/pati/pati.h	/^#define SDRAM_WREQ	/;"	d
SDRAM_err	board/mpl/mip405/mip405.c	/^void SDRAM_err (const char *s)$/;"	f	typeref:typename:void
SDRAM_err	board/mpl/pip405/pip405.c	/^void SDRAM_err (const char *s)$/;"	f	typeref:typename:void
SDRAM_setup_end	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^SDRAM_setup_end:$/;"	l
SDRCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDRCOLD_RESET	/;"	d
SDRC_ACTIM_CTRL0_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SDRC_ACTIM_CTRL0_BASE	/;"	d
SDRC_ACTIM_CTRL1_BASE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SDRC_ACTIM_CTRL1_BASE	/;"	d
SDRC_MR_0_SDR	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDRC_MR_0_SDR	/;"	d
SDRC_SHARING	arch/arm/include/asm/arch-omap3/mem.h	/^#define SDRC_SHARING	/;"	d
SDREF	arch/arm/mach-davinci/lowlevel_init.S	/^SDREF:$/;"	l
SDREF_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^SDREF_VAL:$/;"	l
SDRN_PESDR_BIST	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_BIST(/;"	d
SDRN_PESDR_DLPSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_DLPSET(/;"	d
SDRN_PESDR_HSSL0SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL0SET1(/;"	d
SDRN_PESDR_HSSL0SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL0SET2(/;"	d
SDRN_PESDR_HSSL0STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL0STS(/;"	d
SDRN_PESDR_HSSL1SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL1SET1(/;"	d
SDRN_PESDR_HSSL1SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL1SET2(/;"	d
SDRN_PESDR_HSSL1STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL1STS(/;"	d
SDRN_PESDR_HSSL2SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL2SET1(/;"	d
SDRN_PESDR_HSSL2SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL2SET2(/;"	d
SDRN_PESDR_HSSL2STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL2STS(/;"	d
SDRN_PESDR_HSSL3SET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL3SET1(/;"	d
SDRN_PESDR_HSSL3SET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL3SET2(/;"	d
SDRN_PESDR_HSSL3STS	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_HSSL3STS(/;"	d
SDRN_PESDR_LOOP	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_LOOP(/;"	d
SDRN_PESDR_LPB	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_LPB(/;"	d
SDRN_PESDR_PHYSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_PHYSET1(/;"	d
SDRN_PESDR_PHYSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_PHYSET2(/;"	d
SDRN_PESDR_PHYSTA	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_PHYSTA(/;"	d
SDRN_PESDR_RCSSET	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_RCSSET(/;"	d
SDRN_PESDR_RCSSTS	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_RCSSTS(/;"	d
SDRN_PESDR_UTLSET1	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_UTLSET1(/;"	d
SDRN_PESDR_UTLSET2	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDRN_PESDR_UTLSET2(/;"	d
SDRS	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SDRS	/;"	d
SDRST	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SDRST /;"	d
SDR_1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SDR_1	/;"	d
SDR_2	arch/sh/include/asm/cpu_sh7780.h	/^#define	SDR_2	/;"	d
SDR_CTRLGRP_ADDRESS	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_ADDRESS	/;"	d
SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_LSB /;"	d
SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_MASK /;"	d
SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_LSB /;"	d
SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_MASK /;"	d
SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_LSB /;"	d
SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_MASK /;"	d
SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_LSB /;"	d
SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_ECCCORREN_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_ECCCORREN_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_ECCEN_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_ECCEN_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_ECCEN_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_ECCEN_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_MEMBL_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_MEMBL_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_MEMBL_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_MEMBL_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_MEMTYPE_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_MEMTYPE_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_REORDEREN_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_REORDEREN_MASK /;"	d
SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB /;"	d
SDR_CTRLGRP_CTRLCFG_STARVELIMIT_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLCFG_STARVELIMIT_MASK /;"	d
SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_LSB /;"	d
SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_MASK /;"	d
SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB /;"	d
SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK /;"	d
SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB /;"	d
SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK /;"	d
SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB /;"	d
SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK /;"	d
SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB /;"	d
SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK /;"	d
SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_LSB /;"	d
SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_MASK /;"	d
SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_LSB /;"	d
SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_MASK /;"	d
SDR_CTRLGRP_DRAMINTR_INTREN_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMINTR_INTREN_LSB /;"	d
SDR_CTRLGRP_DRAMINTR_INTREN_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMINTR_INTREN_MASK /;"	d
SDR_CTRLGRP_DRAMODT_READ_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMODT_READ_LSB /;"	d
SDR_CTRLGRP_DRAMODT_READ_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMODT_READ_MASK /;"	d
SDR_CTRLGRP_DRAMODT_WRITE_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMODT_WRITE_LSB /;"	d
SDR_CTRLGRP_DRAMODT_WRITE_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMODT_WRITE_MASK /;"	d
SDR_CTRLGRP_DRAMSTS_DBEERR_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMSTS_DBEERR_MASK /;"	d
SDR_CTRLGRP_DRAMSTS_SBEERR_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMSTS_SBEERR_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING1_TAL_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TAL_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING1_TAL_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TAL_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING1_TCL_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TCL_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING1_TCL_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TCL_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING1_TCWL_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TCWL_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING1_TFAW_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TFAW_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING1_TRFC_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TRFC_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING1_TRRD_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING1_TRRD_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING2_TRCD_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TRCD_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING2_TRCD_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TRCD_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING2_TREFI_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TREFI_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING2_TREFI_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TREFI_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING2_TRP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TRP_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING2_TRP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TRP_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING2_TWR_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TWR_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING2_TWR_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TWR_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING2_TWTR_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TWTR_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING2_TWTR_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING2_TWTR_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING3_TCCD_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TCCD_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING3_TCCD_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TCCD_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING3_TMRD_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TMRD_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING3_TMRD_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TMRD_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING3_TRAS_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TRAS_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING3_TRAS_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TRAS_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING3_TRC_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TRC_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING3_TRC_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TRC_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING3_TRTP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TRTP_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING3_TRTP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING3_TRTP_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_MASK /;"	d
SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_LSB /;"	d
SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_MASK /;"	d
SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_BC_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_BC_LSB /;"	d
SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_DIFF_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_DIFF_LSB /;"	d
SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_LSB /;"	d
SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB /;"	d
SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK /;"	d
SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB /;"	d
SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK /;"	d
SDR_CTRLGRP_FPGAPORTRST_ADDRESS	drivers/fpga/socfpga.c	/^#define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	/;"	d	file:
SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_LSB /;"	d
SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_MASK /;"	d
SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_LSB /;"	d
SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_MASK /;"	d
SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_LSB /;"	d
SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_MASK /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_LSB /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_MASK /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_MASK /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_LSB /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_MASK /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_LSB /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_MASK /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_LSB /;"	d
SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_MASK /;"	d
SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_LSB /;"	d
SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_MASK /;"	d
SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB /;"	d
SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_MASK /;"	d
SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB /;"	d
SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK /;"	d
SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_LSB /;"	d
SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_MASK /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_LSB /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_MASK /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_MASK /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_LSB /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_MASK /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_LSB /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_MASK /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_LSB /;"	d
SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_MASK /;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ACDELAYEN_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ACDELAYEN_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ADDLATSEL_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ADDLATSEL_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQDELAYEN_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQDELAYEN_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSDELAYEN_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSDELAYEN_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSLOGICDELAYEN_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSLOGICDELAYEN_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_LPDDRDIS_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_LPDDRDIS_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_RESETDELAYEN_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_RESETDELAYEN_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_LSB /;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_WIDTH	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_WIDTH /;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_WIDTH	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_WIDTH /;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_SAMPLECOUNT_31_20_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_SAMPLECOUNT_31_20_SET(/;"	d
SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_LONGIDLESAMPLECOUNT_31_20_SET	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_LONGIDLESAMPLECOUNT_31_20_SET(/;"	d
SDR_CTRLGRP_PORTCFG_AUTOPCHEN_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PORTCFG_AUTOPCHEN_LSB /;"	d
SDR_CTRLGRP_PORTCFG_AUTOPCHEN_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PORTCFG_AUTOPCHEN_MASK /;"	d
SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_LSB /;"	d
SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_MASK /;"	d
SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_LSB /;"	d
SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_MASK /;"	d
SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_LSB /;"	d
SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_MASK /;"	d
SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB /;"	d
SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK /;"	d
SDR_CTRLGRP_STATICCFG_MEMBL_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_STATICCFG_MEMBL_LSB /;"	d
SDR_CTRLGRP_STATICCFG_MEMBL_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_STATICCFG_MEMBL_MASK /;"	d
SDR_CTRLGRP_STATICCFG_USEECCASDATA_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_STATICCFG_USEECCASDATA_LSB /;"	d
SDR_CTRLGRP_STATICCFG_USEECCASDATA_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_STATICCFG_USEECCASDATA_MASK /;"	d
SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_LSB	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_LSB /;"	d
SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_MASK	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_MASK /;"	d
SDR_DATA	include/lattice.h	/^#define SDR_DATA	/;"	d
SDR_DCR_BASE	arch/powerpc/include/asm/ppc4xx.h	/^#define SDR_DCR_BASE	/;"	d
SDR_DISCRETE	arch/arm/include/asm/arch-omap3/omap.h	/^#define SDR_DISCRETE	/;"	d
SDR_ICRX_STAT	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ICRX_STAT	/;"	d
SDR_ICTX0_STAT	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ICTX0_STAT	/;"	d
SDR_ICTX1_STAT	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ICTX1_STAT	/;"	d
SDR_L_A	board/espt/lowlevel_init.S	/^SDR_L_A:	.long	0xFE800034$/;"	l
SDR_L_A	board/renesas/r7780mp/lowlevel_init.S	/^SDR_L_A:		.long	SDR_2$/;"	l
SDR_L_A_D0	board/espt/lowlevel_init.S	/^SDR_L_A_D0:	.long	0x00000300$/;"	l
SDR_L_D	board/espt/lowlevel_init.S	/^SDR_L_D:	.long	0x00000400$/;"	l
SDR_L_D	board/renesas/r7780mp/lowlevel_init.S	/^SDR_L_D:		.long	0x00000400$/;"	l
SDR_NAND0_NDAREN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_NAND0_NDAREN	/;"	d
SDR_NAND0_NDBADR_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_NAND0_NDBADR_MASK	/;"	d
SDR_NAND0_NDBPG_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_NAND0_NDBPG_MASK	/;"	d
SDR_NAND0_NDBTEN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_NAND0_NDBTEN	/;"	d
SDR_NAND0_NDEN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_NAND0_NDEN	/;"	d
SDR_NAND0_NDRBEN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_NAND0_NDRBEN	/;"	d
SDR_PHYGRP_DATAMGRGRP_ADDRESS	drivers/ddr/altera/sequencer.h	/^#define SDR_PHYGRP_DATAMGRGRP_ADDRESS	/;"	d
SDR_PHYGRP_PHYMGRGRP_ADDRESS	drivers/ddr/altera/sequencer.h	/^#define SDR_PHYGRP_PHYMGRGRP_ADDRESS	/;"	d
SDR_PHYGRP_REGFILEGRP_ADDRESS	drivers/ddr/altera/sequencer.h	/^#define SDR_PHYGRP_REGFILEGRP_ADDRESS	/;"	d
SDR_PHYGRP_RWMGRGRP_ADDRESS	drivers/ddr/altera/sequencer.h	/^#define SDR_PHYGRP_RWMGRGRP_ADDRESS	/;"	d
SDR_PHYGRP_SCCGRP_ADDRESS	drivers/ddr/altera/sequencer.h	/^#define SDR_PHYGRP_SCCGRP_ADDRESS	/;"	d
SDR_READ	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDR_READ(/;"	d
SDR_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SDR_RESET	/;"	d
SDR_ULTRA0_CSNSEL0	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_CSNSEL0	/;"	d
SDR_ULTRA0_CSNSEL1	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_CSNSEL1	/;"	d
SDR_ULTRA0_CSNSEL2	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_CSNSEL2	/;"	d
SDR_ULTRA0_CSNSEL3	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_CSNSEL3	/;"	d
SDR_ULTRA0_CSN_MASK	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_CSN_MASK	/;"	d
SDR_ULTRA0_EBCRDYEN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_EBCRDYEN	/;"	d
SDR_ULTRA0_NDGPIOBP	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_NDGPIOBP	/;"	d
SDR_ULTRA0_NFSRSTEN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_NFSRSTEN	/;"	d
SDR_ULTRA0_SPISSINEN	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA0_SPISSINEN	/;"	d
SDR_ULTRA1_LEDNENABLE	arch/powerpc/include/asm/ppc405ez.h	/^#define SDR_ULTRA1_LEDNENABLE	/;"	d
SDR_U_A	board/espt/lowlevel_init.S	/^SDR_U_A:	.long	0xFE800030$/;"	l
SDR_U_A	board/renesas/r7780mp/lowlevel_init.S	/^SDR_U_A:		.long	SDR_1$/;"	l
SDR_VCO_BASE	arch/arm/mach-socfpga/wrap_pll_config.c	/^#define SDR_VCO_BASE /;"	d	file:
SDR_WRITE	arch/powerpc/include/asm/4xx_pcie.h	/^#define SDR_WRITE(/;"	d
SDSR0_EIF	include/SA-1100.h	/^#define SDSR0_EIF	/;"	d
SDSR0_RAB	include/SA-1100.h	/^#define SDSR0_RAB	/;"	d
SDSR0_RFS	include/SA-1100.h	/^#define SDSR0_RFS	/;"	d
SDSR0_TFS	include/SA-1100.h	/^#define SDSR0_TFS	/;"	d
SDSR0_TUR	include/SA-1100.h	/^#define SDSR0_TUR	/;"	d
SDSR1_CRE	include/SA-1100.h	/^#define SDSR1_CRE	/;"	d
SDSR1_EOF	include/SA-1100.h	/^#define SDSR1_EOF	/;"	d
SDSR1_RNE	include/SA-1100.h	/^#define SDSR1_RNE	/;"	d
SDSR1_ROR	include/SA-1100.h	/^#define SDSR1_ROR	/;"	d
SDSR1_RSY	include/SA-1100.h	/^#define SDSR1_RSY	/;"	d
SDSR1_RTD	include/SA-1100.h	/^#define SDSR1_RTD	/;"	d
SDSR1_TBY	include/SA-1100.h	/^#define SDSR1_TBY	/;"	d
SDSR1_TNF	include/SA-1100.h	/^#define SDSR1_TNF	/;"	d
SDSRA	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SDSRA	/;"	d
SDTIM0	arch/arm/mach-davinci/lowlevel_init.S	/^SDTIM0:$/;"	l
SDTIM0_VAL_162MHz	arch/arm/mach-davinci/lowlevel_init.S	/^SDTIM0_VAL_162MHz:$/;"	l
SDTIM1	arch/arm/mach-davinci/lowlevel_init.S	/^SDTIM1:$/;"	l
SDTIM1_VAL_162MHz	arch/arm/mach-davinci/lowlevel_init.S	/^SDTIM1_VAL_162MHz:$/;"	l
SDU	include/sym53c8xx.h	/^	#define   SDU /;"	d
SDU0_MSG_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SDU0_MSG_SET /;"	d
SDVOB_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   SDVOB_HOTPLUG_INT_EN	/;"	d
SDVOC_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   SDVOC_HOTPLUG_INT_EN	/;"	d
SDVS_1V8	arch/arm/include/asm/omap_mmc.h	/^#define SDVS_1V8	/;"	d
SDVS_3V0	arch/arm/include/asm/omap_mmc.h	/^#define SDVS_3V0	/;"	d
SDWCR_A	board/ms7722se/lowlevel_init.S	/^SDWCR_A:	.long	SBSC_SDWCR$/;"	l
SDWCR_A	board/renesas/MigoR/lowlevel_init.S	/^SDWCR_A:	.long	SBSC_SDWCR$/;"	l
SDWCR_D	board/ms7722se/lowlevel_init.S	/^SDWCR_D:	.long	0x00164d0d$/;"	l
SDWCR_D	board/renesas/MigoR/lowlevel_init.S	/^SDWCR_D:	.long	0x0014450C$/;"	l
SD_97500KHZ	board/renesas/gose/gose.c	/^#define SD_97500KHZ	/;"	d	file:
SD_97500KHZ	board/renesas/koelsch/koelsch.c	/^#define SD_97500KHZ	/;"	d	file:
SD_97500KHZ	board/renesas/porter/porter.c	/^#define SD_97500KHZ	/;"	d	file:
SD_ADDR	drivers/phy/marvell/comphy_cp110.c	/^#define SD_ADDR(/;"	d	file:
SD_BOOT	common/Kconfig	/^config SD_BOOT$/;"	c	menu:Boot media
SD_BOOTCMD	include/configs/colibri_imx7.h	/^#define SD_BOOTCMD /;"	d
SD_BOOTCMD	include/configs/colibri_vf.h	/^#define SD_BOOTCMD /;"	d
SD_CARD	arch/arm/include/asm/omap_mmc.h	/^#define SD_CARD	/;"	d
SD_CARD_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define SD_CARD_BASE	/;"	d
SD_CARD_BUSYMODE	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          SD_CARD_BUSYMODE /;"	d
SD_CARD_DET	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               SD_CARD_DET /;"	d
SD_CARD_READY	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define             SD_CARD_READY /;"	d
SD_CARD_SLPMODE	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define           SD_CARD_SLPMODE /;"	d
SD_CD_EN	board/bf609-ezkit/soft_switch.h	/^#define SD_CD_EN /;"	d
SD_CE_ATA_2	drivers/mmc/mv_sdhci.c	/^#define SD_CE_ATA_2	/;"	d	file:
SD_CLK_PAD_CTRL	board/freescale/mx53ard/mx53ard.c	/^#define SD_CLK_PAD_CTRL	/;"	d	file:
SD_CL_1	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_1 = 1,$/;"	e	enum:dimm_sdram_cas	file:
SD_CL_2	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_2,$/;"	e	enum:dimm_sdram_cas	file:
SD_CL_3	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_3,$/;"	e	enum:dimm_sdram_cas	file:
SD_CL_4	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_4,$/;"	e	enum:dimm_sdram_cas	file:
SD_CL_5	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_5,$/;"	e	enum:dimm_sdram_cas	file:
SD_CL_6	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_6,$/;"	e	enum:dimm_sdram_cas	file:
SD_CL_7	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_CL_7,$/;"	e	enum:dimm_sdram_cas	file:
SD_CMD_APP_SD_STATUS	include/mmc.h	/^#define SD_CMD_APP_SD_STATUS	/;"	d
SD_CMD_APP_SEND_OP_COND	include/mmc.h	/^#define SD_CMD_APP_SEND_OP_COND	/;"	d
SD_CMD_APP_SEND_SCR	include/mmc.h	/^#define SD_CMD_APP_SEND_SCR	/;"	d
SD_CMD_APP_SET_BUS_WIDTH	include/mmc.h	/^#define SD_CMD_APP_SET_BUS_WIDTH	/;"	d
SD_CMD_ERASE_WR_BLK_END	include/mmc.h	/^#define SD_CMD_ERASE_WR_BLK_END	/;"	d
SD_CMD_ERASE_WR_BLK_START	include/mmc.h	/^#define SD_CMD_ERASE_WR_BLK_START	/;"	d
SD_CMD_OD	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 SD_CMD_OD /;"	d
SD_CMD_PAD_CTRL	board/denx/m53evk/m53evk.c	/^#define SD_CMD_PAD_CTRL	/;"	d	file:
SD_CMD_PAD_CTRL	board/freescale/mx53ard/mx53ard.c	/^#define SD_CMD_PAD_CTRL	/;"	d	file:
SD_CMD_PAD_CTRL	board/freescale/mx53evk/mx53evk.c	/^#define SD_CMD_PAD_CTRL	/;"	d	file:
SD_CMD_PAD_CTRL	board/freescale/mx53loco/mx53loco.c	/^#define SD_CMD_PAD_CTRL	/;"	d	file:
SD_CMD_PAD_CTRL	board/freescale/mx53smd/mx53smd.c	/^#define SD_CMD_PAD_CTRL	/;"	d	file:
SD_CMD_PAD_CTRL	board/inversepath/usbarmory/usbarmory.c	/^#define SD_CMD_PAD_CTRL	/;"	d	file:
SD_CMD_SEND_IF_COND	include/mmc.h	/^#define SD_CMD_SEND_IF_COND	/;"	d
SD_CMD_SEND_RELATIVE_ADDR	include/mmc.h	/^#define SD_CMD_SEND_RELATIVE_ADDR	/;"	d
SD_CMD_SWITCH_FUNC	include/mmc.h	/^#define SD_CMD_SWITCH_FUNC	/;"	d
SD_CMD_SWITCH_UHS18V	include/mmc.h	/^#define SD_CMD_SWITCH_UHS18V	/;"	d
SD_CTRL	include/tsi108.h	/^#define SD_CTRL	/;"	d
SD_D0_BAR	include/tsi108.h	/^#define SD_D0_BAR	/;"	d
SD_D0_CTRL	include/tsi108.h	/^#define SD_D0_CTRL	/;"	d
SD_D1_BAR	include/tsi108.h	/^#define SD_D1_BAR	/;"	d
SD_D1_CTRL	include/tsi108.h	/^#define SD_D1_CTRL	/;"	d
SD_DATA_4BIT	include/mmc.h	/^#define SD_DATA_4BIT	/;"	d
SD_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define SD_DEV	/;"	d
SD_DLL_STATUS	include/tsi108.h	/^#define SD_DLL_STATUS	/;"	d
SD_ECC_CTRL	include/tsi108.h	/^#define SD_ECC_CTRL	/;"	d
SD_EXTERNAL_CONFIG0_HALF_BUS_MODE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_HALF_BUS_MODE_MASK	/;"	d
SD_EXTERNAL_CONFIG0_HALF_BUS_MODE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_HALF_BUS_MODE_OFFSET /;"	d
SD_EXTERNAL_CONFIG0_MEDIA_MODE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_MEDIA_MODE_MASK	/;"	d
SD_EXTERNAL_CONFIG0_MEDIA_MODE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_MEDIA_MODE_OFFSET	/;"	d
SD_EXTERNAL_CONFIG0_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_REG	/;"	d
SD_EXTERNAL_CONFIG0_SD_PHY_GEN_RX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PHY_GEN_RX_MASK	/;"	d
SD_EXTERNAL_CONFIG0_SD_PHY_GEN_RX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PHY_GEN_RX_OFFSET /;"	d
SD_EXTERNAL_CONFIG0_SD_PHY_GEN_TX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PHY_GEN_TX_MASK	/;"	d
SD_EXTERNAL_CONFIG0_SD_PHY_GEN_TX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PHY_GEN_TX_OFFSET /;"	d
SD_EXTERNAL_CONFIG0_SD_PU_PLL_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PU_PLL_MASK	/;"	d
SD_EXTERNAL_CONFIG0_SD_PU_PLL_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PU_PLL_OFFSET	/;"	d
SD_EXTERNAL_CONFIG0_SD_PU_RX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PU_RX_MASK	/;"	d
SD_EXTERNAL_CONFIG0_SD_PU_RX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PU_RX_OFFSET	/;"	d
SD_EXTERNAL_CONFIG0_SD_PU_TX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PU_TX_MASK	/;"	d
SD_EXTERNAL_CONFIG0_SD_PU_TX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG0_SD_PU_TX_OFFSET	/;"	d
SD_EXTERNAL_CONFIG1_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_REG	/;"	d
SD_EXTERNAL_CONFIG1_RESET_CORE_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RESET_CORE_MASK	/;"	d
SD_EXTERNAL_CONFIG1_RESET_CORE_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RESET_CORE_OFFSET	/;"	d
SD_EXTERNAL_CONFIG1_RESET_IN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RESET_IN_MASK	/;"	d
SD_EXTERNAL_CONFIG1_RESET_IN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RESET_IN_OFFSET	/;"	d
SD_EXTERNAL_CONFIG1_RF_RESET_IN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RF_RESET_IN_MASK	/;"	d
SD_EXTERNAL_CONFIG1_RF_RESET_IN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RF_RESET_IN_OFFSET	/;"	d
SD_EXTERNAL_CONFIG1_RX_INIT_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RX_INIT_MASK	/;"	d
SD_EXTERNAL_CONFIG1_RX_INIT_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG1_RX_INIT_OFFSET	/;"	d
SD_EXTERNAL_CONFIG2_PIN_DFE_EN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG2_PIN_DFE_EN_MASK	/;"	d
SD_EXTERNAL_CONFIG2_PIN_DFE_EN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG2_PIN_DFE_EN_OFFSET	/;"	d
SD_EXTERNAL_CONFIG2_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_CONFIG2_REG	/;"	d
SD_EXTERNAL_STATUS0_PLL_RX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_PLL_RX_MASK	/;"	d
SD_EXTERNAL_STATUS0_PLL_RX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_PLL_RX_OFFSET	/;"	d
SD_EXTERNAL_STATUS0_PLL_TX_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_PLL_TX_MASK	/;"	d
SD_EXTERNAL_STATUS0_PLL_TX_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_PLL_TX_OFFSET	/;"	d
SD_EXTERNAL_STATUS0_REG	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_REG	/;"	d
SD_EXTERNAL_STATUS0_RF_RESET_IN_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_RF_RESET_IN_MASK	/;"	d
SD_EXTERNAL_STATUS0_RF_RESET_IN_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_RF_RESET_IN_OFFSET	/;"	d
SD_EXTERNAL_STATUS0_RX_INIT_MASK	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_RX_INIT_MASK	/;"	d
SD_EXTERNAL_STATUS0_RX_INIT_OFFSET	drivers/phy/marvell/comphy_hpipe.h	/^#define SD_EXTERNAL_STATUS0_RX_INIT_OFFSET	/;"	d
SD_FAULT	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SD_FAULT$/;"	e	enum:dimm_sdram_cas	file:
SD_HIGHSPEED_BUSY	include/mmc.h	/^#define SD_HIGHSPEED_BUSY	/;"	d
SD_HIGHSPEED_SUPPORTED	include/mmc.h	/^#define SD_HIGHSPEED_SUPPORTED	/;"	d
SD_INT_ENABLE	include/tsi108.h	/^#define SD_INT_ENABLE	/;"	d
SD_INT_SET	include/tsi108.h	/^#define SD_INT_SET	/;"	d
SD_INT_STATUS	include/tsi108.h	/^#define SD_INT_STATUS	/;"	d
SD_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SD_MODE$/;"	c	choice:choice5ba020940104
SD_MODE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define SD_MODE	/;"	d
SD_MODE1	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SD_MODE1$/;"	c	choice:choice5ba020940104
SD_MODE1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define SD_MODE1	/;"	d
SD_OFFSET	fs/reiserfs/reiserfs_private.h	/^#define SD_OFFSET /;"	d
SD_PAD_CTRL	board/denx/m53evk/m53evk.c	/^#define SD_PAD_CTRL	/;"	d	file:
SD_PAD_CTRL	board/freescale/mx53ard/mx53ard.c	/^#define SD_PAD_CTRL	/;"	d	file:
SD_PAD_CTRL	board/freescale/mx53evk/mx53evk.c	/^#define SD_PAD_CTRL	/;"	d	file:
SD_PAD_CTRL	board/freescale/mx53loco/mx53loco.c	/^#define SD_PAD_CTRL	/;"	d	file:
SD_PAD_CTRL	board/freescale/mx53smd/mx53smd.c	/^#define SD_PAD_CTRL	/;"	d	file:
SD_REFRESH	include/tsi108.h	/^#define SD_REFRESH	/;"	d
SD_RST	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                    SD_RST /;"	d
SD_STATUS	include/tsi108.h	/^#define SD_STATUS	/;"	d
SD_SWITCH_CHECK	include/mmc.h	/^#define SD_SWITCH_CHECK	/;"	d
SD_SWITCH_SWITCH	include/mmc.h	/^#define SD_SWITCH_SWITCH	/;"	d
SD_TIMING	include/tsi108.h	/^#define SD_TIMING	/;"	d
SD_UNIQUENESS	fs/reiserfs/reiserfs_private.h	/^#define SD_UNIQUENESS /;"	d
SD_VERSION_1_0	include/mmc.h	/^#define SD_VERSION_1_0	/;"	d
SD_VERSION_1_10	include/mmc.h	/^#define SD_VERSION_1_10	/;"	d
SD_VERSION_2	include/mmc.h	/^#define SD_VERSION_2	/;"	d
SD_VERSION_3	include/mmc.h	/^#define SD_VERSION_3	/;"	d
SD_VERSION_SD	include/mmc.h	/^#define SD_VERSION_SD	/;"	d
SD_WP_EN	board/bf609-ezkit/soft_switch.h	/^#define SD_WP_EN /;"	d
SE0	drivers/usb/host/r8a66597.h	/^#define	  SE0	/;"	d
SE1	drivers/usb/host/r8a66597.h	/^#define	  SE1	/;"	d
SEABIOS	arch/x86/Kconfig	/^config SEABIOS$/;"	c	menu:x86 architecture
SEC	include/lattice.h	/^#define SEC	/;"	d
SEC0_CCTL0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SEC0_CCTL0 /;"	d
SEC0_CCTL1	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SEC0_CCTL1 /;"	d
SEC0_FCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SEC0_FCTL /;"	d
SEC0_GCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SEC0_GCTL /;"	d
SEC0_SCTL0	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SEC0_SCTL0 /;"	d
SECCTL_BYPASS_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define SECCTL_BYPASS_MASK	/;"	d
SECCTL_BYPASS_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define SECCTL_BYPASS_SHIFT	/;"	d
SECCTL_OP_DIV_MASK	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define SECCTL_OP_DIV_MASK	/;"	d
SECCTL_OP_DIV_SHIFT	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define SECCTL_OP_DIV_SHIFT	/;"	d
SECDAY	drivers/rtc/date.c	/^#define SECDAY	/;"	d	file:
SECOMX6DL	board/seco/Kconfig	/^config SECOMX6DL$/;"	c	choice:choicec671bd160204
SECOMX6Q	board/seco/Kconfig	/^config SECOMX6Q$/;"	c	choice:choicec671bd160204
SECOMX6S	board/seco/Kconfig	/^config SECOMX6S$/;"	c	choice:choicec671bd160204
SECOMX6_1GB	board/seco/Kconfig	/^config SECOMX6_1GB$/;"	c	choice:choicec671bd160304
SECOMX6_2GB	board/seco/Kconfig	/^config SECOMX6_2GB$/;"	c	choice:choicec671bd160304
SECOMX6_4GB	board/seco/Kconfig	/^config SECOMX6_4GB$/;"	c	choice:choicec671bd160304
SECOMX6_512MB	board/seco/Kconfig	/^config SECOMX6_512MB$/;"	c	choice:choicec671bd160304
SECOMX6_Q7	board/seco/Kconfig	/^config SECOMX6_Q7$/;"	c	choice:choicec671bd160104
SECOMX6_UQ7	board/seco/Kconfig	/^config SECOMX6_UQ7$/;"	c	choice:choicec671bd160104
SECOMX6_USBC	board/seco/Kconfig	/^config SECOMX6_USBC$/;"	c	choice:choicec671bd160104
SECOND	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	SECOND	/;"	d
SECOND_PORT	board/varisys/cyrus/eth.c	/^#define SECOND_PORT /;"	d	file:
SECOND_PORT_ADDR	board/varisys/cyrus/eth.c	/^#define SECOND_PORT_ADDR /;"	d	file:
SECSPERDAY	include/linux/time.h	/^#define SECSPERDAY	/;"	d
SECSPERHOUR	include/linux/time.h	/^#define SECSPERHOUR	/;"	d
SECSPERMIN	include/linux/time.h	/^#define SECSPERMIN	/;"	d
SECSTS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SECSTS	/;"	d
SECT32	board/bf533-ezkit/flash-defines.h	/^#define SECT32	/;"	d
SECT33	board/bf533-ezkit/flash-defines.h	/^#define SECT33	/;"	d
SECT34	board/bf533-ezkit/flash-defines.h	/^#define SECT34	/;"	d
SECT35	board/bf533-ezkit/flash-defines.h	/^#define SECT35	/;"	d
SECT36	board/bf533-ezkit/flash-defines.h	/^#define SECT36	/;"	d
SECT37	board/bf533-ezkit/flash-defines.h	/^#define SECT37	/;"	d
SECT38	board/bf533-ezkit/flash-defines.h	/^#define SECT38	/;"	d
SECT39	board/bf533-ezkit/flash-defines.h	/^#define SECT39	/;"	d
SECTION	tools/imagetool.h	/^#define SECTION(/;"	d
SECTION_ResetVector	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_ResetVector(/;"	d
SECTION_VECTOR	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_VECTOR(/;"	d
SECTION_bss	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_bss(/;"	d
SECTION_data	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_data(/;"	d
SECTION_debug	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_debug	/;"	d
SECTION_lit4	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_lit4(/;"	d
SECTION_rodata	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_rodata(/;"	d
SECTION_text	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_text(/;"	d
SECTION_u_boot_list	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_u_boot_list(/;"	d
SECTION_xtensa	arch/xtensa/include/asm/ldscript.h	/^#define SECTION_xtensa	/;"	d
SECTOR	cmd/fdc.c	/^#define SECTOR	/;"	d	file:
SECTOR_BITS	include/reiserfs.h	/^#define SECTOR_BITS	/;"	d
SECTOR_BITS	include/zfs_common.h	/^#define SECTOR_BITS	/;"	d
SECTOR_BYTES	drivers/mtd/nand/omap_gpmc.c	/^#define SECTOR_BYTES	/;"	d	file:
SECTOR_ERASE	include/linux/mtd/st_smi.h	/^#define SECTOR_ERASE	/;"	d
SECTOR_MODE	arch/arm/include/asm/omap_mmc.h	/^#define SECTOR_MODE	/;"	d
SECTOR_SIZE	cmd/fdc.c	/^#define SECTOR_SIZE	/;"	d	file:
SECTOR_SIZE	include/ext_common.h	/^#define SECTOR_SIZE	/;"	d
SECTOR_SIZE	include/reiserfs.h	/^#define SECTOR_SIZE	/;"	d
SECTOR_SIZE	include/usb_mass_storage.h	/^#define SECTOR_SIZE	/;"	d
SECTOR_SIZE	include/zfs_common.h	/^#define SECTOR_SIZE	/;"	d
SECT_4K	drivers/mtd/spi/sf_internal.h	/^#define SECT_4K	/;"	d
SECUREHEAP	include/lattice.h	/^#define SECUREHEAP	/;"	d
SECURE_BOOT	arch/arm/imx-common/Kconfig	/^config SECURE_BOOT$/;"	c
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SECURE_CONTROL /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SECURE_STATUS /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SECURE_STATUS /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SECURE_STATUS /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SECURE_STATUS /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SECURE_STATUS /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SECURE_STATUS /;"	d
SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SECURE_STATUS /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SECURE_SYSSWT /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SECURE_SYSSWT /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SECURE_SYSSWT /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SECURE_SYSSWT /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SECURE_SYSSWT /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SECURE_SYSSWT /;"	d
SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SECURE_SYSSWT /;"	d
SECURITY_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SECURITY_BASE	/;"	d
SECURITY_ENCRYPT	arch/arm/mach-tegra/tegra20/crypto.c	/^	SECURITY_ENCRYPT	= 1 << 1,	\/* Encrypt the data *\/$/;"	e	enum:security_op	file:
SECURITY_EXTENSIONID	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SECURITY_EXTENSIONID	/;"	d
SECURITY_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SECURITY_OFFSET	/;"	d
SECURITY_SIGN	arch/arm/mach-tegra/tegra20/crypto.c	/^	SECURITY_SIGN		= 1 << 0,	\/* Sign the data *\/$/;"	e	enum:security_op	file:
SECWATCHDOG_SDOGCR_CLKS_SHIFT	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^#define SECWATCHDOG_SDOGCR_CLKS_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_CLKS_SHIFT	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^#define SECWATCHDOG_SDOGCR_CLKS_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_EN_SHIFT	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^#define SECWATCHDOG_SDOGCR_EN_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_EN_SHIFT	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^#define SECWATCHDOG_SDOGCR_EN_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_LD_SHIFT	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^#define SECWATCHDOG_SDOGCR_LD_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_LD_SHIFT	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^#define SECWATCHDOG_SDOGCR_LD_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_OFFSET	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^#define SECWATCHDOG_SDOGCR_OFFSET	/;"	d	file:
SECWATCHDOG_SDOGCR_OFFSET	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^#define SECWATCHDOG_SDOGCR_OFFSET	/;"	d	file:
SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	/;"	d	file:
SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	/;"	d	file:
SECWD2_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define SECWD2_BASE_ADDR	/;"	d
SECWD_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define SECWD_BASE_ADDR	/;"	d
SECYR	drivers/rtc/date.c	/^#define SECYR	/;"	d	file:
SEC_ADDR	drivers/crypto/fsl/jr.c	/^#define SEC_ADDR(/;"	d	file:
SEC_CCBVID_ERA_MASK	include/fsl_sec.h	/^#define SEC_CCBVID_ERA_MASK	/;"	d
SEC_CCBVID_ERA_SHIFT	include/fsl_sec.h	/^#define SEC_CCBVID_ERA_SHIFT	/;"	d
SEC_CHANUM_MS_DECONUM_MASK	include/fsl_sec.h	/^#define SEC_CHANUM_MS_DECONUM_MASK	/;"	d
SEC_CHANUM_MS_DECONUM_SHIFT	include/fsl_sec.h	/^#define SEC_CHANUM_MS_DECONUM_SHIFT	/;"	d
SEC_CHANUM_MS_JRNUM_MASK	include/fsl_sec.h	/^#define SEC_CHANUM_MS_JRNUM_MASK	/;"	d
SEC_CHANUM_MS_JRNUM_SHIFT	include/fsl_sec.h	/^#define SEC_CHANUM_MS_JRNUM_SHIFT	/;"	d
SEC_CHAVID_LS_RNG_SHIFT	include/fsl_sec.h	/^#define SEC_CHAVID_LS_RNG_SHIFT	/;"	d
SEC_CHAVID_RNG_LS_MASK	include/fsl_sec.h	/^#define SEC_CHAVID_RNG_LS_MASK	/;"	d
SEC_CTPR_MS_AXI_LIODN	include/fsl_sec.h	/^#define SEC_CTPR_MS_AXI_LIODN	/;"	d
SEC_CTPR_MS_QI	include/fsl_sec.h	/^#define SEC_CTPR_MS_QI	/;"	d
SEC_CTPR_MS_VIRT_EN_INCL	include/fsl_sec.h	/^#define SEC_CTPR_MS_VIRT_EN_INCL	/;"	d
SEC_CTPR_MS_VIRT_EN_POR	include/fsl_sec.h	/^#define SEC_CTPR_MS_VIRT_EN_POR	/;"	d
SEC_DISABLE_AMAP_WRITE_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_AMAP_WRITE_ON	/;"	d
SEC_DISABLE_READ0_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_READ0_ON	/;"	d
SEC_DISABLE_READ1_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_READ1_ON	/;"	d
SEC_DISABLE_READ2_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_READ2_ON	/;"	d
SEC_DISABLE_READ3_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_READ3_ON	/;"	d
SEC_DISABLE_WRITE0_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_WRITE0_ON	/;"	d
SEC_DISABLE_WRITE1_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_WRITE1_ON	/;"	d
SEC_DISABLE_WRITE2_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_WRITE2_ON	/;"	d
SEC_DISABLE_WRITE3_ON	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SEC_DISABLE_WRITE3_ON	/;"	d
SEC_FIRMEWARE_FIT_CNF_NAME	arch/arm/cpu/armv8/sec_firmware.c	/^#define SEC_FIRMEWARE_FIT_CNF_NAME	/;"	d	file:
SEC_FIRMEWARE_FIT_CNF_NAME	arch/arm/include/asm/arch-fsl-layerscape/ppa.h	/^#define SEC_FIRMEWARE_FIT_CNF_NAME	/;"	d
SEC_FIRMWARE_ADDR_MASK	arch/arm/cpu/armv8/sec_firmware.c	/^#define SEC_FIRMWARE_ADDR_MASK	/;"	d	file:
SEC_FIRMWARE_ERET_ADDR_REVERT	include/configs/ls1043ardb.h	/^#define SEC_FIRMWARE_ERET_ADDR_REVERT$/;"	d
SEC_FIRMWARE_FIT_IMAGE	arch/arm/cpu/armv8/sec_firmware.c	/^#define SEC_FIRMWARE_FIT_IMAGE	/;"	d	file:
SEC_FIRMWARE_FIT_IMAGE	arch/arm/include/asm/arch-fsl-layerscape/ppa.h	/^#define SEC_FIRMWARE_FIT_IMAGE	/;"	d
SEC_FIRMWARE_LOADED	arch/arm/cpu/armv8/sec_firmware.c	/^#define SEC_FIRMWARE_LOADED	/;"	d	file:
SEC_FIRMWARE_RUNNING	arch/arm/cpu/armv8/sec_firmware.c	/^#define SEC_FIRMWARE_RUNNING	/;"	d	file:
SEC_FIRMWARE_TARGET_EL	arch/arm/cpu/armv8/sec_firmware.c	/^#define SEC_FIRMWARE_TARGET_EL	/;"	d	file:
SEC_FIRMWARE_TARGET_EL	arch/arm/include/asm/arch-fsl-layerscape/ppa.h	/^#define SEC_FIRMWARE_TARGET_EL	/;"	d
SEC_JR0_ADDR	drivers/crypto/fsl/jr.c	/^#define SEC_JR0_ADDR(/;"	d	file:
SEC_MEM_PAGE0	include/fsl_sec.h	/^#define SEC_MEM_PAGE0	/;"	d
SEC_MEM_PAGE1	include/fsl_sec.h	/^#define SEC_MEM_PAGE1	/;"	d
SEC_MEM_PAGE2	include/fsl_sec.h	/^#define SEC_MEM_PAGE2	/;"	d
SEC_MEM_PAGE3	include/fsl_sec.h	/^#define SEC_MEM_PAGE3	/;"	d
SEC_MON_SSM_ST	include/fsl_sec_mon.h	/^	SEC_MON_SSM_ST,$/;"	e	enum:__anonef2cc8560103
SEC_MON_SW_FSV	include/fsl_sec_mon.h	/^	SEC_MON_SW_FSV,$/;"	e	enum:__anonef2cc8560103
SEC_MON_SW_SV	include/fsl_sec_mon.h	/^	SEC_MON_SW_SV,$/;"	e	enum:__anonef2cc8560103
SEC_RVID_MA	include/fsl_sec.h	/^#define SEC_RVID_MA	/;"	d
SEC_SCFGR_RDBENABLE	include/fsl_sec.h	/^#define SEC_SCFGR_RDBENABLE	/;"	d
SEC_SCFGR_VIRT_EN	include/fsl_sec.h	/^#define SEC_SCFGR_VIRT_EN	/;"	d
SEC_SECVID_MS_IPID_MASK	include/fsl_sec.h	/^#define SEC_SECVID_MS_IPID_MASK	/;"	d
SEC_SECVID_MS_IPID_SHIFT	include/fsl_sec.h	/^#define SEC_SECVID_MS_IPID_SHIFT	/;"	d
SEC_SECVID_MS_MAJ_REV_MASK	include/fsl_sec.h	/^#define SEC_SECVID_MS_MAJ_REV_MASK	/;"	d
SEC_SECVID_MS_MAJ_REV_SHIFT	include/fsl_sec.h	/^#define SEC_SECVID_MS_MAJ_REV_SHIFT	/;"	d
SED156X_A0	drivers/video/sed156x.c	/^#define SED156X_A0(/;"	d	file:
SED156X_CS	drivers/video/sed156x.c	/^#define SED156X_CS(/;"	d	file:
SED156X_H	include/sed156x.h	/^#define SED156X_H$/;"	d
SED156X_SPI_BIT_DELAY	drivers/video/sed156x.c	/^#define SED156X_SPI_BIT_DELAY(/;"	d	file:
SED156X_SPI_CLK	drivers/video/sed156x.c	/^#define SED156X_SPI_CLK(/;"	d	file:
SED156X_SPI_CLK_TOGGLE	drivers/video/sed156x.c	/^#define SED156X_SPI_CLK_TOGGLE(/;"	d	file:
SED156X_SPI_RXD	drivers/video/sed156x.c	/^#define SED156X_SPI_RXD(/;"	d	file:
SED156X_SPI_TXD	drivers/video/sed156x.c	/^#define SED156X_SPI_TXD(/;"	d	file:
SEE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SEE	/;"	d
SEE ALSO	doc/kwboot.1	/^.SH "SEE ALSO"$/;"	s	title:KWBOOT
SEEK_CUR	fs/yaffs2/yportenv.h	/^#define SEEK_CUR	/;"	d
SEEK_CUR	include/u-boot/zlib.h	/^#  define SEEK_CUR /;"	d
SEEK_END	fs/yaffs2/yportenv.h	/^#define SEEK_END	/;"	d
SEEK_END	include/u-boot/zlib.h	/^#  define SEEK_END /;"	d
SEEK_SET	fs/yaffs2/yportenv.h	/^#define SEEK_SET	/;"	d
SEEK_SET	include/u-boot/zlib.h	/^#  define SEEK_SET /;"	d
SEG	arch/x86/lib/bios_asm.S	/^#define SEG(/;"	d	file:
SEG	drivers/bios_emulator/biosemu.c	/^#define SEG(/;"	d	file:
SEGMENT_SHIFT	drivers/usb/host/xhci.h	/^#define SEGMENT_SHIFT	/;"	d
SEGMENT_SIZE	drivers/usb/host/xhci.h	/^#define SEGMENT_SIZE	/;"	d
SEGREG	arch/powerpc/include/asm/mmu.h	/^} SEGREG;$/;"	t	typeref:struct:_SEGREG
SEG_A	board/a4m072/a4m072.c	/^#define SEG_A /;"	d	file:
SEG_B	board/a4m072/a4m072.c	/^#define SEG_B /;"	d	file:
SEG_C	board/a4m072/a4m072.c	/^#define SEG_C /;"	d	file:
SEG_D	board/a4m072/a4m072.c	/^#define SEG_D /;"	d	file:
SEG_E	board/a4m072/a4m072.c	/^#define SEG_E /;"	d	file:
SEG_F	board/a4m072/a4m072.c	/^#define SEG_F /;"	d	file:
SEG_G	board/a4m072/a4m072.c	/^#define SEG_G /;"	d	file:
SEG_P	board/a4m072/a4m072.c	/^#define SEG_P /;"	d	file:
SEG__	board/a4m072/a4m072.c	/^#define SEG__ /;"	d	file:
SEL	include/sym53c8xx.h	/^  #define   SEL /;"	d
SELECT	drivers/pci/pci_mvebu.c	/^#define SELECT(/;"	d	file:
SELECTED_ENDPOINT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SELECTED_ENDPOINT	/;"	d
SELECTING	net/bootp.h	/^	       SELECTING,$/;"	e	enum:__anon7cb633f50103
SELECTOR	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define SELECTOR(/;"	d
SELECTOR	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define SELECTOR(/;"	d
SELECT_EMR	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SELECT_EMR	/;"	d	file:
SELECT_EMR2	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SELECT_EMR2	/;"	d	file:
SELECT_EMR3	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SELECT_EMR3	/;"	d	file:
SELECT_MR	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define SELECT_MR	/;"	d	file:
SELFCTL_GPO0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SELFCTL_GPO0	/;"	d
SELFCTL_MIIL	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SELFCTL_MIIL	/;"	d
SELFCTL_PDWE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SELFCTL_PDWE	/;"	d
SELFCTL_PUWE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SELFCTL_PUWE	/;"	d
SELFCTL_RESET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SELFCTL_RESET	/;"	d
SELFCTL_RWP	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SELFCTL_RWP	/;"	d
SELFMAG	include/elf.h	/^#define	SELFMAG	/;"	d
SELFREQDCO_HS1	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SELFREQDCO_HS1	/;"	d	file:
SELFREQDCO_HS2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SELFREQDCO_HS2	/;"	d	file:
SELFTEST_PIN	board/keymile/kmp204x/kmp204x.c	/^#define SELFTEST_PIN	/;"	d	file:
SELFTEST_PORT	board/keymile/kmp204x/kmp204x.c	/^#define SELFTEST_PORT	/;"	d	file:
SELF_REF_DLY	drivers/ddr/microchip/ddr2_regs.h	/^#define SELF_REF_DLY(/;"	d
SEL_24M	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SEL_24M	/;"	d
SEL_24M	arch/arm/mach-exynos/include/mach/dp.h	/^#define SEL_24M	/;"	d
SEL_BG_INTERNAL_RESISTOR	arch/arm/mach-exynos/include/mach/dp.h	/^#define SEL_BG_INTERNAL_RESISTOR	/;"	d
SEL_BG_NEW_BANDGAP	arch/arm/mach-exynos/include/mach/dp.h	/^#define SEL_BG_NEW_BANDGAP	/;"	d
SEL_CURRENT_DEFAULT	arch/arm/mach-exynos/include/mach/dp.h	/^#define SEL_CURRENT_DEFAULT	/;"	d
SEL_FLL1	drivers/sound/wm8994.c	/^#define SEL_FLL1	/;"	d	file:
SEL_FLL2	drivers/sound/wm8994.c	/^#define SEL_FLL2	/;"	d	file:
SEL_IN_FREQ	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^#define SEL_IN_FREQ	/;"	d	file:
SEL_MCLK1	drivers/sound/wm8994.c	/^#define SEL_MCLK1	/;"	d	file:
SEL_MCLK2	drivers/sound/wm8994.c	/^#define SEL_MCLK2	/;"	d	file:
SEL_RXIDLE	drivers/usb/eth/r8152.h	/^#define SEL_RXIDLE	/;"	d
SEM	include/sym53c8xx.h	/^  #define   SEM /;"	d
SEMA41_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SEMA41_IPS_BASE_ADDR /;"	d
SEMA42_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SEMA42_BASE_ADDR	/;"	d
SEMA42_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SEMA42_IPS_BASE_ADDR /;"	d
SEMA4_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SEMA4_BASE_ADDR	/;"	d
SEMAPHORE1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SEMAPHORE1_BASE_ADDR /;"	d
SEMAPHORE1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SEMAPHORE1_BASE_ADDR /;"	d
SEMAPHORE2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SEMAPHORE2_BASE_ADDR /;"	d
SEMAPHORE2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SEMAPHORE2_BASE_ADDR /;"	d
SEMA_GATES_NUM	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define SEMA_GATES_NUM	/;"	d
SEMIHOSTING	arch/arm/Kconfig	/^config SEMIHOSTING$/;"	c	menu:ARM architecture
SEM_BIG	drivers/spi/rk_spi.h	/^	SEM_BIG,		\/* big endian *\/$/;"	e	enum:__anondde5bacc0103
SEM_LITTLE	drivers/spi/rk_spi.h	/^	SEM_LITTLE	= 0,	\/* little endian *\/$/;"	e	enum:__anondde5bacc0103
SEM_MASK	drivers/spi/rk_spi.h	/^	SEM_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
SEM_SHIFT	drivers/spi/rk_spi.h	/^	SEM_SHIFT	= 11,	\/* Serial Endian Mode *\/$/;"	e	enum:__anondde5bacc0103
SEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SEN	/;"	d
SEND	include/linux/mtd/st_smi.h	/^#define SEND	/;"	d
SENDSTALL	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SENDSTALL	/;"	d
SEND_DATA_SIZE	cmd/load.c	/^#define SEND_DATA_SIZE /;"	d	file:
SEND_FINISHED_ERROR	include/usbdevice.h	/^	SEND_FINISHED_ERROR,$/;"	e	enum:urb_send_status
SEND_FINISHED_OK	include/usbdevice.h	/^	SEND_FINISHED_OK,$/;"	e	enum:urb_send_status
SEND_IN_PROGRESS	include/usbdevice.h	/^	SEND_IN_PROGRESS,$/;"	e	enum:urb_send_status
SEND_TYPE	cmd/load.c	/^#define SEND_TYPE /;"	d	file:
SENSE_ABORTED_COMMAND	include/scsi.h	/^#define SENSE_ABORTED_COMMAND	/;"	d
SENSE_BLANK_CHECK	include/scsi.h	/^#define SENSE_BLANK_CHECK	/;"	d
SENSE_COPY_ABORTED	include/scsi.h	/^#define SENSE_COPY_ABORTED	/;"	d
SENSE_DATA_PROTECT	include/scsi.h	/^#define SENSE_DATA_PROTECT	/;"	d
SENSE_HARDWARE_ERROR	include/scsi.h	/^#define SENSE_HARDWARE_ERROR	/;"	d
SENSE_ILLEGAL_REQUEST	include/scsi.h	/^#define SENSE_ILLEGAL_REQUEST	/;"	d
SENSE_MEDIUM_ERROR	include/scsi.h	/^#define SENSE_MEDIUM_ERROR	/;"	d
SENSE_MISCOMPARE	include/scsi.h	/^#define SENSE_MISCOMPARE	/;"	d
SENSE_NOT_READY	include/scsi.h	/^#define SENSE_NOT_READY	/;"	d
SENSE_NO_SENSE	include/scsi.h	/^#define SENSE_NO_SENSE	/;"	d
SENSE_RECOVERED_ERROR	include/scsi.h	/^#define SENSE_RECOVERED_ERROR	/;"	d
SENSE_UNIT_ATTENTION	include/scsi.h	/^#define SENSE_UNIT_ATTENTION	/;"	d
SENSE_VENDOR_SPECIFIC	include/scsi.h	/^#define SENSE_VENDOR_SPECIFIC	/;"	d
SENSE_VOLUME_OVERFLOW	include/scsi.h	/^#define SENSE_VOLUME_OVERFLOW	/;"	d
SENSOR_RST_B	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	SENSOR_RST_B,$/;"	e	enum:qn	file:
SEN_VAL_MASK	drivers/usb/eth/r8152.h	/^#define SEN_VAL_MASK	/;"	d
SEN_VAL_NORMAL	drivers/usb/eth/r8152.h	/^#define SEN_VAL_NORMAL	/;"	d
SEOI_IR0	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR0	/;"	d
SEOI_IR1	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR1	/;"	d
SEOI_IR2	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR2	/;"	d
SEOI_IR3	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR3	/;"	d
SEOI_IR4	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR4	/;"	d
SEOI_IR5	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR5	/;"	d
SEOI_IR6	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR6	/;"	d
SEOI_IR7	arch/x86/include/asm/i8259.h	/^#define	SEOI_IR7	/;"	d
SEPARATOR	lib/zlib/trees.c	/^#  define SEPARATOR(/;"	d	file:
SEQID_BE_4K	drivers/spi/fsl_qspi.c	/^#define SEQID_BE_4K	/;"	d	file:
SEQID_BRRD	drivers/spi/fsl_qspi.c	/^#define SEQID_BRRD	/;"	d	file:
SEQID_BRWR	drivers/spi/fsl_qspi.c	/^#define SEQID_BRWR	/;"	d	file:
SEQID_CHIP_ERASE	drivers/spi/fsl_qspi.c	/^#define SEQID_CHIP_ERASE	/;"	d	file:
SEQID_FAST_READ	drivers/spi/fsl_qspi.c	/^#define SEQID_FAST_READ	/;"	d	file:
SEQID_PP	drivers/spi/fsl_qspi.c	/^#define SEQID_PP	/;"	d	file:
SEQID_RDAR	drivers/spi/fsl_qspi.c	/^#define SEQID_RDAR	/;"	d	file:
SEQID_RDEAR	drivers/spi/fsl_qspi.c	/^#define SEQID_RDEAR	/;"	d	file:
SEQID_RDID	drivers/spi/fsl_qspi.c	/^#define SEQID_RDID	/;"	d	file:
SEQID_RDSR	drivers/spi/fsl_qspi.c	/^#define SEQID_RDSR	/;"	d	file:
SEQID_SE	drivers/spi/fsl_qspi.c	/^#define SEQID_SE	/;"	d	file:
SEQID_WRAR	drivers/spi/fsl_qspi.c	/^#define SEQID_WRAR	/;"	d	file:
SEQID_WREAR	drivers/spi/fsl_qspi.c	/^#define SEQID_WREAR	/;"	d	file:
SEQID_WREN	drivers/spi/fsl_qspi.c	/^#define SEQID_WREN	/;"	d	file:
SEQ_APON	drivers/video/ld9040.c	/^static const unsigned char SEQ_APON[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_C	drivers/bios_emulator/include/biosemu.h	/^#define SEQ_C /;"	d
SEQ_CTL	drivers/video/tegra124/sor.h	/^#define SEQ_CTL	/;"	d
SEQ_CTL_PC_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PC_MASK	/;"	d
SEQ_CTL_PC_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PC_SHIFT	/;"	d
SEQ_CTL_PD_PC_ALT_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PD_PC_ALT_MASK	/;"	d
SEQ_CTL_PD_PC_ALT_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PD_PC_ALT_SHIFT	/;"	d
SEQ_CTL_PD_PC_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PD_PC_MASK	/;"	d
SEQ_CTL_PD_PC_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PD_PC_SHIFT	/;"	d
SEQ_CTL_PU_PC_ALT_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PU_PC_ALT_MASK	/;"	d
SEQ_CTL_PU_PC_ALT_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PU_PC_ALT_SHIFT	/;"	d
SEQ_CTL_PU_PC_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PU_PC_MASK	/;"	d
SEQ_CTL_PU_PC_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_PU_PC_SHIFT	/;"	d
SEQ_CTL_STATUS_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_STATUS_MASK	/;"	d
SEQ_CTL_STATUS_RUNNING	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_STATUS_RUNNING	/;"	d
SEQ_CTL_STATUS_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_STATUS_SHIFT	/;"	d
SEQ_CTL_STATUS_STOPPED	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_STATUS_STOPPED	/;"	d
SEQ_CTL_SWITCH_FORCE	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_SWITCH_FORCE	/;"	d
SEQ_CTL_SWITCH_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_SWITCH_MASK	/;"	d
SEQ_CTL_SWITCH_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_SWITCH_SHIFT	/;"	d
SEQ_CTL_SWITCH_WAIT	drivers/video/tegra124/sor.h	/^#define SEQ_CTL_SWITCH_WAIT	/;"	d
SEQ_DISPCTL	drivers/video/ld9040.c	/^static const unsigned char SEQ_DISPCTL[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_DISPOFF	drivers/video/ld9040.c	/^static const unsigned char SEQ_DISPOFF[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_DISPON	drivers/video/ld9040.c	/^static const unsigned char SEQ_DISPON[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_ELVSS_ON	drivers/video/ld9040.c	/^static const unsigned char SEQ_ELVSS_ON[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_GAMMA_CTRL	drivers/video/ld9040.c	/^static const unsigned char SEQ_GAMMA_CTRL[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_GAMMA_SET1	drivers/video/ld9040.c	/^static const unsigned char SEQ_GAMMA_SET1[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_GTCON	drivers/video/ld9040.c	/^static const unsigned char SEQ_GTCON[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_INST	drivers/video/tegra124/sor.h	/^#define SEQ_INST(/;"	d
SEQ_INST_ASSERT_PLL_RESET_NORMAL	drivers/video/tegra124/sor.h	/^#define SEQ_INST_ASSERT_PLL_RESET_NORMAL	/;"	d
SEQ_INST_ASSERT_PLL_RESET_RST	drivers/video/tegra124/sor.h	/^#define SEQ_INST_ASSERT_PLL_RESET_RST	/;"	d
SEQ_INST_ASSERT_PLL_RESET_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_ASSERT_PLL_RESET_SHIFT	/;"	d
SEQ_INST_BLACK_DATA_BLACK	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLACK_DATA_BLACK	/;"	d
SEQ_INST_BLACK_DATA_NORMAL	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLACK_DATA_NORMAL	/;"	d
SEQ_INST_BLACK_DATA_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLACK_DATA_SHIFT	/;"	d
SEQ_INST_BLANK_DE_INACTIVE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_DE_INACTIVE	/;"	d
SEQ_INST_BLANK_DE_NORMAL	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_DE_NORMAL	/;"	d
SEQ_INST_BLANK_DE_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_DE_SHIFT	/;"	d
SEQ_INST_BLANK_H_INACTIVE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_H_INACTIVE	/;"	d
SEQ_INST_BLANK_H_NORMAL	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_H_NORMAL	/;"	d
SEQ_INST_BLANK_H_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_H_SHIFT	/;"	d
SEQ_INST_BLANK_V_INACTIVE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_V_INACTIVE	/;"	d
SEQ_INST_BLANK_V_NORMAL	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_V_NORMAL	/;"	d
SEQ_INST_BLANK_V_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_BLANK_V_SHIFT	/;"	d
SEQ_INST_DRIVE_PWM_OUT_LO_FALSE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_DRIVE_PWM_OUT_LO_FALSE	/;"	d
SEQ_INST_DRIVE_PWM_OUT_LO_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_DRIVE_PWM_OUT_LO_SHIFT	/;"	d
SEQ_INST_DRIVE_PWM_OUT_LO_TRUE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_DRIVE_PWM_OUT_LO_TRUE	/;"	d
SEQ_INST_HALT_FALSE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_HALT_FALSE	/;"	d
SEQ_INST_HALT_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_HALT_SHIFT	/;"	d
SEQ_INST_HALT_TRUE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_HALT_TRUE	/;"	d
SEQ_INST_LANE_SEQ_RUN	drivers/video/tegra124/sor.h	/^#define SEQ_INST_LANE_SEQ_RUN	/;"	d
SEQ_INST_LANE_SEQ_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_LANE_SEQ_SHIFT	/;"	d
SEQ_INST_LANE_SEQ_STOP	drivers/video/tegra124/sor.h	/^#define SEQ_INST_LANE_SEQ_STOP	/;"	d
SEQ_INST_PDPLL_NO	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PDPLL_NO	/;"	d
SEQ_INST_PDPLL_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PDPLL_SHIFT	/;"	d
SEQ_INST_PDPLL_YES	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PDPLL_YES	/;"	d
SEQ_INST_PDPORT_NO	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PDPORT_NO	/;"	d
SEQ_INST_PDPORT_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PDPORT_SHIFT	/;"	d
SEQ_INST_PDPORT_YES	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PDPORT_YES	/;"	d
SEQ_INST_PIN_A_HIGH	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PIN_A_HIGH	/;"	d
SEQ_INST_PIN_A_LOW	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PIN_A_LOW	/;"	d
SEQ_INST_PIN_A_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PIN_A_SHIFT	/;"	d
SEQ_INST_PIN_B_HIGH	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PIN_B_HIGH	/;"	d
SEQ_INST_PIN_B_LOW	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PIN_B_LOW	/;"	d
SEQ_INST_PIN_B_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PIN_B_SHIFT	/;"	d
SEQ_INST_PLL_PULLDOWN_DISABLE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PLL_PULLDOWN_DISABLE	/;"	d
SEQ_INST_PLL_PULLDOWN_ENABLE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PLL_PULLDOWN_ENABLE	/;"	d
SEQ_INST_PLL_PULLDOWN_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_PLL_PULLDOWN_SHIFT	/;"	d
SEQ_INST_POWERDOWN_MACRO_NORMAL	drivers/video/tegra124/sor.h	/^#define SEQ_INST_POWERDOWN_MACRO_NORMAL	/;"	d
SEQ_INST_POWERDOWN_MACRO_POWERDOWN	drivers/video/tegra124/sor.h	/^#define SEQ_INST_POWERDOWN_MACRO_POWERDOWN	/;"	d
SEQ_INST_POWERDOWN_MACRO_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_POWERDOWN_MACRO_SHIFT	/;"	d
SEQ_INST_SEQUENCE_DOWN	drivers/video/tegra124/sor.h	/^#define SEQ_INST_SEQUENCE_DOWN	/;"	d
SEQ_INST_SEQUENCE_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_SEQUENCE_SHIFT	/;"	d
SEQ_INST_SEQUENCE_UP	drivers/video/tegra124/sor.h	/^#define SEQ_INST_SEQUENCE_UP	/;"	d
SEQ_INST_TRISTATE_IOS_ENABLE_PINS	drivers/video/tegra124/sor.h	/^#define SEQ_INST_TRISTATE_IOS_ENABLE_PINS	/;"	d
SEQ_INST_TRISTATE_IOS_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_TRISTATE_IOS_SHIFT	/;"	d
SEQ_INST_TRISTATE_IOS_TRISTATE	drivers/video/tegra124/sor.h	/^#define SEQ_INST_TRISTATE_IOS_TRISTATE	/;"	d
SEQ_INST_WAIT_TIME_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_TIME_DEFAULT_MASK	/;"	d
SEQ_INST_WAIT_TIME_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_TIME_SHIFT	/;"	d
SEQ_INST_WAIT_UNITS_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_UNITS_DEFAULT_MASK	/;"	d
SEQ_INST_WAIT_UNITS_MS	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_UNITS_MS	/;"	d
SEQ_INST_WAIT_UNITS_SHIFT	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_UNITS_SHIFT	/;"	d
SEQ_INST_WAIT_UNITS_US	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_UNITS_US	/;"	d
SEQ_INST_WAIT_UNITS_VSYNC	drivers/video/tegra124/sor.h	/^#define SEQ_INST_WAIT_UNITS_VSYNC	/;"	d
SEQ_MANPWR	drivers/video/ld9040.c	/^static const unsigned char SEQ_MANPWR[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_PANEL_CONDITION	drivers/video/ld9040.c	/^static const unsigned char SEQ_PANEL_CONDITION[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_PWR_CTRL	drivers/video/ld9040.c	/^static const unsigned char SEQ_PWR_CTRL[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_SLPIN	drivers/video/ld9040.c	/^static const unsigned char SEQ_SLPIN[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_SLPOUT	drivers/video/ld9040.c	/^static const unsigned char SEQ_SLPOUT[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_SWRESET	drivers/video/ld9040.c	/^static const unsigned char SEQ_SWRESET[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_TEMP_SWIRE	drivers/video/ld9040.c	/^static const unsigned char SEQ_TEMP_SWIRE[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SEQ_USER_SETTING	drivers/video/ld9040.c	/^static const unsigned char SEQ_USER_SETTING[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
SERDES_ALREADY_IN_USE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define SERDES_ALREADY_IN_USE	/;"	d	file:
SERDES_CLOCK_100M	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_CLOCK_100M,		\/* 100 MHz *\/$/;"	e	enum:ks2_serdes_clock
SERDES_CLOCK_122P88M	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_CLOCK_122P88M,		\/* 122.88 MHz *\/$/;"	e	enum:ks2_serdes_clock
SERDES_CLOCK_125M	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_CLOCK_125M,		\/* 125 MHz *\/$/;"	e	enum:ks2_serdes_clock
SERDES_CLOCK_156P25M	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_CLOCK_156P25M,		\/* 156.25 MHz *\/$/;"	e	enum:ks2_serdes_clock
SERDES_CLOCK_312P5M	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_CLOCK_312P5M,		\/* 312.5 MHz *\/$/;"	e	enum:ks2_serdes_clock
SERDES_CMU_CFG_NUM	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_CMU_CFG_NUM	/;"	d	file:
SERDES_CMU_REGS	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_CMU_REGS(/;"	d	file:
SERDES_CMU_REG_000	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_CMU_REG_000(/;"	d	file:
SERDES_CMU_REG_010	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_CMU_REG_010(/;"	d	file:
SERDES_COMLANE_CFG_NUM	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_COMLANE_CFG_NUM	/;"	d	file:
SERDES_COMLANE_REGS	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_COMLANE_REGS	/;"	d	file:
SERDES_COMLANE_REG_000	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_COMLANE_REG_000	/;"	d	file:
SERDES_CR_ADDR	board/highbank/ahci.c	/^#define SERDES_CR_ADDR	/;"	d	file:
SERDES_CR_CTL	board/highbank/ahci.c	/^#define SERDES_CR_CTL	/;"	d	file:
SERDES_CR_DATA	board/highbank/ahci.c	/^#define SERDES_CR_DATA	/;"	d	file:
SERDES_DEFAULT_MODE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_DEFAULT_MODE, \/* not pex *\/$/;"	e	enum:serdes_mode
SERDES_FIFO_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SERDES_FIFO_FUNC_EN_N	/;"	d
SERDES_FIFO_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define SERDES_FIFO_FUNC_EN_N	/;"	d
SERDES_FULL_RATE	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_FULL_RATE,$/;"	e	enum:ks2_serdes_rate_mode
SERDES_HALF_RATE	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_HALF_RATE,$/;"	e	enum:ks2_serdes_rate_mode
SERDES_LANE_CFG_NUM	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_CFG_NUM	/;"	d	file:
SERDES_LANE_CTL_STATUS_REG	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_CTL_STATUS_REG(/;"	d	file:
SERDES_LANE_EN_VAL	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_EN_VAL(/;"	d	file:
SERDES_LANE_LOOPBACK	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_LOOPBACK	/;"	d	file:
SERDES_LANE_REGS	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_REGS(/;"	d	file:
SERDES_LANE_REG_000	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_REG_000(/;"	d	file:
SERDES_LANE_REG_028	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_REG_028(/;"	d	file:
SERDES_LANE_RESET	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_LANE_RESET	/;"	d	file:
SERDES_LAST_MODE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_LAST_MODE$/;"	e	enum:serdes_mode
SERDES_LAST_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_LAST_SEQ$/;"	e	enum:serdes_seq
SERDES_LAST_UNIT	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_LAST_UNIT$/;"	e	enum:__anon3796299a0103
SERDES_LINE_MUX_REG_0_7	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SERDES_LINE_MUX_REG_0_7	/;"	d
SERDES_LINE_MUX_REG_8_15	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SERDES_LINE_MUX_REG_8_15	/;"	d
SERDES_MUX_LANE_6_MASK	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_6_MASK	/;"	d
SERDES_MUX_LANE_6_SHIFT	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_6_SHIFT	/;"	d
SERDES_MUX_LANE_A_MASK	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_A_MASK	/;"	d
SERDES_MUX_LANE_A_SHIFT	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_A_SHIFT	/;"	d
SERDES_MUX_LANE_C_MASK	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_C_MASK	/;"	d
SERDES_MUX_LANE_C_SHIFT	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_C_SHIFT	/;"	d
SERDES_MUX_LANE_D_MASK	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_D_MASK	/;"	d
SERDES_MUX_LANE_D_SHIFT	board/freescale/p2041rdb/cpld.h	/^#define SERDES_MUX_LANE_D_SHIFT	/;"	d
SERDES_PHY_PCSR	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_PHY_PCSR,		\/* XGE SERDES *\/$/;"	e	enum:ks2_serdes_interface
SERDES_PHY_SGMII	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_PHY_SGMII,$/;"	e	enum:ks2_serdes_interface
SERDES_PLL_CTL_REG	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_PLL_CTL_REG	/;"	d	file:
SERDES_POWER_DOWN_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_POWER_DOWN_SEQ,$/;"	e	enum:serdes_seq
SERDES_PRCTL_COUNT	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SERDES_PRCTL_COUNT$/;"	e	enum:srds_prtcl
SERDES_PRCTL_COUNT	arch/powerpc/include/asm/fsl_serdes.h	/^	SERDES_PRCTL_COUNT	\/* Keep this item the last one *\/$/;"	e	enum:srds_prtcl
SERDES_QUARTER_RATE	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_QUARTER_RATE,$/;"	e	enum:ks2_serdes_rate_mode
SERDES_RATE_10p3125g	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_RATE_10p3125g,		\/* 10.3215 GBaud *\/$/;"	e	enum:ks2_serdes_rate
SERDES_RATE_12p5g	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_RATE_12p5g,		\/* 12.5 GBaud *\/$/;"	e	enum:ks2_serdes_rate
SERDES_RATE_4P9152G	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_RATE_4P9152G,		\/* 4.9152 GBaud *\/$/;"	e	enum:ks2_serdes_rate
SERDES_RATE_5G	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_RATE_5G,			\/* 5 GBaud *\/$/;"	e	enum:ks2_serdes_rate
SERDES_RATE_6P144G	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_RATE_6P144G,		\/* 6.144 GBaud *\/$/;"	e	enum:ks2_serdes_rate
SERDES_RATE_6P25G	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	SERDES_RATE_6P25G,		\/* 6.25 GBaud *\/$/;"	e	enum:ks2_serdes_rate
SERDES_REFCLK_100	board/freescale/common/idt8t49n222a_serdes_clk.h	/^	SERDES_REFCLK_100,	\/* refclk 100Mhz *\/$/;"	e	enum:serdes_refclk
SERDES_REFCLK_122_88	board/freescale/common/idt8t49n222a_serdes_clk.h	/^	SERDES_REFCLK_122_88,	\/* refclk 122.88Mhz *\/$/;"	e	enum:serdes_refclk
SERDES_REFCLK_125	board/freescale/common/idt8t49n222a_serdes_clk.h	/^	SERDES_REFCLK_125,	\/* refclk 125Mhz *\/$/;"	e	enum:serdes_refclk
SERDES_REFCLK_156_25	board/freescale/common/idt8t49n222a_serdes_clk.h	/^	SERDES_REFCLK_156_25,	\/* refclk 156.25Mhz *\/$/;"	e	enum:serdes_refclk
SERDES_REFCLK_NONE	board/freescale/common/idt8t49n222a_serdes_clk.h	/^	SERDES_REFCLK_NONE = -1,$/;"	e	enum:serdes_refclk
SERDES_REGS_LANE_BASE_OFFSET	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define	SERDES_REGS_LANE_BASE_OFFSET(/;"	d
SERDES_REG_CTRL_1	drivers/net/phy/mv88e61xx.c	/^#define SERDES_REG_CTRL_1	/;"	d	file:
SERDES_REG_CTRL_1_FORCE_LINK	drivers/net/phy/mv88e61xx.c	/^#define SERDES_REG_CTRL_1_FORCE_LINK	/;"	d	file:
SERDES_RESET	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_RESET	/;"	d	file:
SERDES_SPEED_1_25_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_1_25_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_1_5_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_1_5_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_2_5_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_2_5_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_3_125_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_3_125_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_3_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_3_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_5_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_5_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_6_25_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_6_25_GBPS,$/;"	e	enum:serdes_speed
SERDES_SPEED_6_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SERDES_SPEED_6_GBPS,$/;"	e	enum:serdes_speed
SERDES_UNIT_PEX	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_PEX		= 0x1,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_QSGMII	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_QSGMII	= 0x7,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_SATA	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_SATA	= 0x2,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_SETM	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_SETM        = 0x8,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_SGMII0	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_SGMII0	= 0x3,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_SGMII1	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_SGMII1	= 0x4,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_SGMII2	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_SGMII2	= 0x5,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_SGMII3	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_SGMII3	= 0x6,$/;"	e	enum:__anon3796299a0103
SERDES_UNIT_UNCONNECTED	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	SERDES_UNIT_UNCONNECTED	= 0x0,$/;"	e	enum:__anon3796299a0103
SERDES_VERION	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^#define SERDES_VERION	/;"	d	file:
SERDES_VERION	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define	SERDES_VERION	/;"	d	file:
SERDES_VERION	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^#define	SERDES_VERION	/;"	d	file:
SERDES_WIZ_REGS	drivers/soc/keystone/keystone_serdes.c	/^#define SERDES_WIZ_REGS	/;"	d	file:
SERIALI2C_IGNORE_NAK	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_IGNORE_NAK /;"	d
SERIALI2C_NOSTART	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_NOSTART /;"	d
SERIALI2C_NO_RD_ACK	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_NO_RD_ACK /;"	d
SERIALI2C_RD	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_RD /;"	d
SERIALI2C_RECV_LEN	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_RECV_LEN /;"	d
SERIALI2C_REV_DIR_ADDR	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_REV_DIR_ADDR /;"	d
SERIALI2C_STOP	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_STOP /;"	d
SERIALI2C_TEN	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define SERIALI2C_TEN /;"	d
SERIAL_EOF	tools/gdb/serial.h	/^#define SERIAL_EOF	/;"	d
SERIAL_ERROR	tools/gdb/serial.h	/^#define SERIAL_ERROR	/;"	d
SERIAL_FLAGS	include/env_flags.h	/^#define SERIAL_FLAGS /;"	d
SERIAL_ISOLATION	include/ns87308.h	/^#define SERIAL_ISOLATION /;"	d
SERIAL_PORT_BASE	board/inka4x0/inkadiag.c	/^#define SERIAL_PORT_BASE	/;"	d	file:
SERIAL_PRESENT	drivers/serial/Kconfig	/^config SERIAL_PRESENT$/;"	c	menu:Serial drivers
SERIAL_READCHAR	tools/gdb/remote.c	/^#define SERIAL_READCHAR(/;"	d	file:
SERIAL_RSA_BAUD_BASE	include/linux/serial_reg.h	/^#define SERIAL_RSA_BAUD_BASE /;"	d
SERIAL_RSA_BAUD_BASE_LO	include/linux/serial_reg.h	/^#define SERIAL_RSA_BAUD_BASE_LO /;"	d
SERIAL_SUPPORT	lib/Makefile	/^SERIAL_SUPPORT := $(CONFIG_SPL_SERIAL_SUPPORT)$/;"	m
SERIAL_SUPPORT	lib/Makefile	/^SERIAL_SUPPORT := $(CONFIG_TPL_SERIAL_SUPPORT)$/;"	m
SERIAL_TIMEOUT	tools/gdb/serial.h	/^#define SERIAL_TIMEOUT	/;"	d
SERIAL_WRITE	tools/gdb/remote.c	/^#define SERIAL_WRITE(/;"	d	file:
SERIES	board/bosch/shc/Kconfig	/^config SERIES$/;"	c	choice:choice6f6e98480204
SERIRQ_CNTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SERIRQ_CNTL	/;"	d
SERIRQ_CNTL	arch/x86/include/asm/pch_common.h	/^#define SERIRQ_CNTL	/;"	d
SERMUX_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define SERMUX_BASE	/;"	d
SERMUX_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define SERMUX_BASE	/;"	d
SERR	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SERR	/;"	d
SERREN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define SERREN	/;"	d
SERR_10B_8B_ERR	include/libata.h	/^	SERR_10B_8B_ERR		= (1 << 19), \/* 10b to 8b decode error *\/$/;"	e	enum:__anoneacac85b0103
SERR_COMM_RECOVERED	include/libata.h	/^	SERR_COMM_RECOVERED	= (1 << 1), \/* recovered comm failure *\/$/;"	e	enum:__anoneacac85b0103
SERR_COMM_WAKE	include/libata.h	/^	SERR_COMM_WAKE		= (1 << 18), \/* Comm wake *\/$/;"	e	enum:__anoneacac85b0103
SERR_CRC	include/libata.h	/^	SERR_CRC		= (1 << 21), \/* CRC error *\/$/;"	e	enum:__anoneacac85b0103
SERR_DATA	include/libata.h	/^	SERR_DATA		= (1 << 8), \/* unrecovered data error *\/$/;"	e	enum:__anoneacac85b0103
SERR_DATA_RECOVERED	include/libata.h	/^	SERR_DATA_RECOVERED	= (1 << 0), \/* recovered data error *\/$/;"	e	enum:__anoneacac85b0103
SERR_DEV_XCHG	include/libata.h	/^	SERR_DEV_XCHG		= (1 << 26), \/* device exchanged *\/$/;"	e	enum:__anoneacac85b0103
SERR_DISPARITY	include/libata.h	/^	SERR_DISPARITY		= (1 << 20), \/* Disparity *\/$/;"	e	enum:__anoneacac85b0103
SERR_HANDSHAKE	include/libata.h	/^	SERR_HANDSHAKE		= (1 << 22), \/* Handshake error *\/$/;"	e	enum:__anoneacac85b0103
SERR_INTERNAL	include/libata.h	/^	SERR_INTERNAL		= (1 << 11), \/* host internal error *\/$/;"	e	enum:__anoneacac85b0103
SERR_LINK_SEQ_ERR	include/libata.h	/^	SERR_LINK_SEQ_ERR	= (1 << 23), \/* Link sequence error *\/$/;"	e	enum:__anoneacac85b0103
SERR_PERSISTENT	include/libata.h	/^	SERR_PERSISTENT		= (1 << 9), \/* persistent data\/comm error *\/$/;"	e	enum:__anoneacac85b0103
SERR_PHYRDY_CHG	include/libata.h	/^	SERR_PHYRDY_CHG		= (1 << 16), \/* PHY RDY changed *\/$/;"	e	enum:__anoneacac85b0103
SERR_PHY_INT_ERR	include/libata.h	/^	SERR_PHY_INT_ERR	= (1 << 17), \/* PHY internal error *\/$/;"	e	enum:__anoneacac85b0103
SERR_PROTOCOL	include/libata.h	/^	SERR_PROTOCOL		= (1 << 10), \/* protocol violation *\/$/;"	e	enum:__anoneacac85b0103
SERR_TRANS_ST_ERROR	include/libata.h	/^	SERR_TRANS_ST_ERROR	= (1 << 24), \/* Transport state trans. error *\/$/;"	e	enum:__anoneacac85b0103
SERR_UNRECOG_FIS	include/libata.h	/^	SERR_UNRECOG_FIS	= (1 << 25), \/* Unrecognized FIS *\/$/;"	e	enum:__anoneacac85b0103
SERVICED_RXPKTRDY	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SERVICED_RXPKTRDY	/;"	d
SERVICED_SETUPEND	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SERVICED_SETUPEND	/;"	d
SESSION	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SESSION	/;"	d
SESSION_REQ_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SESSION_REQ_B	/;"	d
SESSION_REQ_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SESSION_REQ_BE	/;"	d
SESS_VLD_CTRL	drivers/usb/host/ehci-msm.c	/^#define SESS_VLD_CTRL /;"	d	file:
SETBIT	arch/powerpc/cpu/mpc8xx/video.c	/^#define SETBIT(/;"	d	file:
SETFEATURES_SATA_DISABLE	include/libata.h	/^	SETFEATURES_SATA_DISABLE = 0x90, \/* Disable use of SATA feature *\/$/;"	e	enum:__anoneacac85b0103
SETFEATURES_SATA_ENABLE	include/libata.h	/^	SETFEATURES_SATA_ENABLE = 0x10, \/* Enable use of SATA feature *\/$/;"	e	enum:__anoneacac85b0103
SETFEATURES_SPINUP	include/libata.h	/^	SETFEATURES_SPINUP	= 0x07, \/* Spin-up drive *\/$/;"	e	enum:__anoneacac85b0103
SETFEATURES_WC_OFF	include/libata.h	/^	SETFEATURES_WC_OFF	= 0x82, \/* Disable write cache *\/$/;"	e	enum:__anoneacac85b0103
SETFEATURES_WC_ON	include/libata.h	/^	SETFEATURES_WC_ON	= 0x02, \/* Enable write cache *\/$/;"	e	enum:__anoneacac85b0103
SETFEATURES_XFER	include/libata.h	/^	SETFEATURES_XFER	= 0x03,$/;"	e	enum:__anoneacac85b0103
SETFLOW	include/lattice.h	/^#define SETFLOW	/;"	d
SETMASK	lib/bzip2/bzlib_blocksort.c	/^#define SETMASK /;"	d	file:
SETUP	drivers/usb/gadget/ci_udc.c	/^#define SETUP(/;"	d	file:
SETUPDATA	board/mpl/vcma9/lowlevel_init.S	/^SETUPDATA:$/;"	l
SETUPDATA_SIZE	board/mpl/vcma9/lowlevel_init.S	/^	.equiv SETUPDATA_SIZE, (. - SETUPDATA)$/;"	d
SETUPEND	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SETUPEND	/;"	d
SETUPENTRY_SIZE	board/mpl/vcma9/lowlevel_init.S	/^	.equiv SETUPENTRY_SIZE, (. - SETUPDATA)$/;"	d
SETUPPKT_H	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SETUPPKT_H	/;"	d
SETUP_E820_EXT	arch/x86/include/asm/bootparam.h	/^#define SETUP_E820_EXT	/;"	d
SETUP_ERR_OK	arch/arm/mach-exynos/exynos5_setup.h	/^	SETUP_ERR_OK,$/;"	e	enum:__anone9a306bd0103
SETUP_ERR_RDLV_COMPLETE_TIMEOUT	arch/arm/mach-exynos/exynos5_setup.h	/^	SETUP_ERR_RDLV_COMPLETE_TIMEOUT = -1,$/;"	e	enum:__anone9a306bd0103
SETUP_ERR_ZQ_CALIBRATION_FAILURE	arch/arm/mach-exynos/exynos5_setup.h	/^	SETUP_ERR_ZQ_CALIBRATION_FAILURE = -2,$/;"	e	enum:__anone9a306bd0103
SETUP_FRAME_LEN	drivers/net/dc2114x.c	/^#define SETUP_FRAME_LEN /;"	d	file:
SETUP_IOMUX_PAD	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define SETUP_IOMUX_PAD(/;"	d
SETUP_IOMUX_PADS	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define SETUP_IOMUX_PADS(/;"	d
SETUP_MAX_SIZE	arch/x86/include/asm/zimage.h	/^#define SETUP_MAX_SIZE /;"	d
SETUP_NONE	arch/x86/include/asm/bootparam.h	/^#define SETUP_NONE	/;"	d
SETUP_PKT_RECEIVED	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define SETUP_PKT_RECEIVED	/;"	d
SETUP_START_OFFSET	arch/x86/include/asm/zimage.h	/^#define SETUP_START_OFFSET /;"	d
SETUP_TRANSACTION_COMPLETED	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define SETUP_TRANSACTION_COMPLETED	/;"	d
SET_ADDRESS	drivers/usb/musb/musb_udc.c	/^	SET_ADDRESS$/;"	e	enum:ep0_state_enum	file:
SET_ALARM	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define SET_ALARM(/;"	d
SET_ALE	board/freescale/m5329evb/nand.c	/^#define SET_ALE	/;"	d	file:
SET_ALE	board/freescale/m5373evb/nand.c	/^#define SET_ALE	/;"	d	file:
SET_BAR	include/bedbug/regs.h	/^#define	 SET_BAR(/;"	d
SET_BH	lib/bzip2/bzlib_blocksort.c	/^#define       SET_BH(/;"	d	file:
SET_BINARY_MODE	lib/bzip2/bzlib.c	/^#   define SET_BINARY_MODE(/;"	d	file:
SET_BIT	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define SET_BIT(/;"	d
SET_BIT	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define SET_BIT(/;"	d	file:
SET_BMAN_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_BMAN_LIODN(/;"	d
SET_CCR0	include/bedbug/regs.h	/^#define	 SET_CCR0(/;"	d
SET_CLE	board/freescale/m5329evb/nand.c	/^#define SET_CLE	/;"	d	file:
SET_CLE	board/freescale/m5373evb/nand.c	/^#define SET_CLE	/;"	d	file:
SET_CLK_ENB_CPUG_ENABLE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SET_CLK_ENB_CPUG_ENABLE	/;"	d
SET_CLK_ENB_CPULP_ENABLE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SET_CLK_ENB_CPULP_ENABLE	/;"	d
SET_CLK_ENB_MSELECT_ENABLE	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SET_CLK_ENB_MSELECT_ENABLE	/;"	d
SET_CMPA	include/bedbug/regs.h	/^#define	 SET_CMPA(/;"	d
SET_CMPB	include/bedbug/regs.h	/^#define	 SET_CMPB(/;"	d
SET_CMPC	include/bedbug/regs.h	/^#define	 SET_CMPC(/;"	d
SET_CMPD	include/bedbug/regs.h	/^#define	 SET_CMPD(/;"	d
SET_CMPE	include/bedbug/regs.h	/^#define	 SET_CMPE(/;"	d
SET_CMPF	include/bedbug/regs.h	/^#define	 SET_CMPF(/;"	d
SET_CMPG	include/bedbug/regs.h	/^#define	 SET_CMPG(/;"	d
SET_CMPH	include/bedbug/regs.h	/^#define	 SET_CMPH(/;"	d
SET_COUNTA	include/bedbug/regs.h	/^#define	 SET_COUNTA(/;"	d
SET_COUNTB	include/bedbug/regs.h	/^#define	 SET_COUNTB(/;"	d
SET_CR	include/bedbug/regs.h	/^#define	 SET_CR(/;"	d
SET_CSN	include/ns87308.h	/^#define SET_CSN /;"	d
SET_CTR	include/bedbug/regs.h	/^#define	 SET_CTR(/;"	d
SET_DAC1	include/bedbug/regs.h	/^#define	 SET_DAC1(/;"	d
SET_DAC2	include/bedbug/regs.h	/^#define	 SET_DAC2(/;"	d
SET_DAR	include/bedbug/regs.h	/^#define	 SET_DAR(/;"	d
SET_DBCR0	include/bedbug/regs.h	/^#define	 SET_DBCR0(/;"	d
SET_DBCR1	include/bedbug/regs.h	/^#define	 SET_DBCR1(/;"	d
SET_DBSR	include/bedbug/regs.h	/^#define	 SET_DBSR(/;"	d
SET_DCCR	include/bedbug/regs.h	/^#define	 SET_DCCR(/;"	d
SET_DCWR	include/bedbug/regs.h	/^#define	 SET_DCWR(/;"	d
SET_DC_ADR	include/bedbug/regs.h	/^#define	 SET_DC_ADR(/;"	d
SET_DC_CST	include/bedbug/regs.h	/^#define	 SET_DC_CST(/;"	d
SET_DC_DAT	include/bedbug/regs.h	/^#define	 SET_DC_DAT(/;"	d
SET_DEAR	include/bedbug/regs.h	/^#define	 SET_DEAR(/;"	d
SET_DEC	include/bedbug/regs.h	/^#define	 SET_DEC(/;"	d
SET_DEQ_PENDING	drivers/usb/host/xhci.h	/^#define SET_DEQ_PENDING	/;"	d
SET_DER	include/bedbug/regs.h	/^#define	 SET_DER(/;"	d
SET_DEV_CMD	drivers/block/ftide020.h	/^#define SET_DEV_CMD	/;"	d
SET_DMA_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_DMA_LIODN(/;"	d
SET_DPDR	include/bedbug/regs.h	/^#define	 SET_DPDR(/;"	d
SET_DSISR	include/bedbug/regs.h	/^#define	 SET_DSISR(/;"	d
SET_DVC1	include/bedbug/regs.h	/^#define	 SET_DVC1(/;"	d
SET_DVC2	include/bedbug/regs.h	/^#define	 SET_DVC2(/;"	d
SET_EAR	include/bedbug/regs.h	/^#define	 SET_EAR(/;"	d
SET_EC_MUX_SEL	board/freescale/ls1021aqds/ls1021aqds.c	/^#define SET_EC_MUX_SEL(/;"	d	file:
SET_EID	include/bedbug/regs.h	/^#define	 SET_EID(/;"	d
SET_EIE	include/bedbug/regs.h	/^#define	 SET_EIE(/;"	d
SET_EP0_STATE	drivers/usb/musb/musb_udc.c	/^#define SET_EP0_STATE(/;"	d	file:
SET_ESR	include/bedbug/regs.h	/^#define	 SET_ESR(/;"	d
SET_EVPR	include/bedbug/regs.h	/^#define	 SET_EVPR(/;"	d
SET_FAILED	drivers/bios_emulator/bios.c	/^#define SET_FAILED /;"	d	file:
SET_FIELD	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^#define SET_FIELD(/;"	d	file:
SET_FLAG	drivers/bios_emulator/include/x86emu/regs.h	/^#define SET_FLAG(/;"	d
SET_FLCPAUSE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_FLCPAUSE(/;"	d
SET_FMAN_LIODN_ENTRY	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_FMAN_LIODN_ENTRY(/;"	d
SET_FMAN_RX_10G_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_FMAN_RX_10G_LIODN(/;"	d
SET_FMAN_RX_10G_TYPE2_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_FMAN_RX_10G_TYPE2_LIODN(/;"	d
SET_FMAN_RX_1G_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_FMAN_RX_1G_LIODN(/;"	d
SET_FPGA	board/esd/common/fpga.c	/^# define SET_FPGA(/;"	d	file:
SET_FX	drivers/usb/gadget/at91_udc.c	/^#define	SET_FX	/;"	d	file:
SET_GPIO	arch/blackfin/cpu/gpio.c	/^#define SET_GPIO(/;"	d	file:
SET_GPIO	arch/blackfin/cpu/gpio.c	/^SET_GPIO(inen)  \/* set_gpio_inen() *\/$/;"	f	typeref:typename:dir
SET_GPIO_P	arch/blackfin/cpu/gpio.c	/^#define SET_GPIO_P(/;"	d	file:
SET_GPIO_P	arch/blackfin/cpu/gpio.c	/^SET_GPIO_P(dir)$/;"	f	typeref:typename:data
SET_GPIO_SC	arch/blackfin/cpu/gpio.c	/^#define SET_GPIO_SC(/;"	d	file:
SET_GUTS_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_GUTS_LIODN(/;"	d
SET_IABR	include/bedbug/regs.h	/^#define	 SET_IABR(/;"	d
SET_IAC1	include/bedbug/regs.h	/^#define	 SET_IAC1(/;"	d
SET_IAC2	include/bedbug/regs.h	/^#define	 SET_IAC2(/;"	d
SET_IAC3	include/bedbug/regs.h	/^#define	 SET_IAC3(/;"	d
SET_IAC4	include/bedbug/regs.h	/^#define	 SET_IAC4(/;"	d
SET_ICCR	include/bedbug/regs.h	/^#define	 SET_ICCR(/;"	d
SET_ICDBDR	include/bedbug/regs.h	/^#define	 SET_ICDBDR(/;"	d
SET_ICR	include/bedbug/regs.h	/^#define	 SET_ICR(/;"	d
SET_ICTRL	include/bedbug/regs.h	/^#define	 SET_ICTRL(/;"	d
SET_IC_ADR	include/bedbug/regs.h	/^#define	 SET_IC_ADR(/;"	d
SET_IC_CST	include/bedbug/regs.h	/^#define	 SET_IC_CST(/;"	d
SET_IC_DAT	include/bedbug/regs.h	/^#define	 SET_IC_DAT(/;"	d
SET_IMMR	include/bedbug/regs.h	/^#define	 SET_IMMR(/;"	d
SET_LAPIC_DEST_FIELD	arch/x86/include/asm/lapic.h	/^#define SET_LAPIC_DEST_FIELD(/;"	d
SET_LAW	arch/powerpc/include/asm/fsl_law.h	/^#define SET_LAW(/;"	d
SET_LAW_ENTRY	arch/powerpc/include/asm/fsl_law.h	/^#define SET_LAW_ENTRY(/;"	d
SET_LCTRL1	include/bedbug/regs.h	/^#define	 SET_LCTRL1(/;"	d
SET_LCTRL2	include/bedbug/regs.h	/^#define	 SET_LCTRL2(/;"	d
SET_LIODN_BASE_1	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_LIODN_BASE_1(/;"	d
SET_LIODN_BASE_2	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_LIODN_BASE_2(/;"	d
SET_LIODN_ENTRY_1	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^#define SET_LIODN_ENTRY_1(/;"	d
SET_LIODN_ENTRY_1	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_LIODN_ENTRY_1(/;"	d
SET_LIODN_ENTRY_2	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^#define SET_LIODN_ENTRY_2(/;"	d
SET_LIODN_ENTRY_2	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_LIODN_ENTRY_2(/;"	d
SET_LL	lib/bzip2/bzlib_private.h	/^#define SET_LL(/;"	d
SET_LL4	lib/bzip2/bzlib_private.h	/^#define SET_LL4(/;"	d
SET_LOW_FREQ	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	SET_LOW_FREQ,$/;"	e	enum:auto_tune_stage
SET_LOW_FREQ_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define SET_LOW_FREQ_MASK_BIT	/;"	d
SET_LR	include/bedbug/regs.h	/^#define	 SET_LR(/;"	d
SET_LS_PCIE_INFO	drivers/pci/pcie_layerscape.c	/^#define SET_LS_PCIE_INFO(/;"	d	file:
SET_MDCDIV	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_MDCDIV(/;"	d
SET_MD_AP	include/bedbug/regs.h	/^#define	 SET_MD_AP(/;"	d
SET_MD_CTR	include/bedbug/regs.h	/^#define	 SET_MD_CTR(/;"	d
SET_MD_DBCA	include/bedbug/regs.h	/^#define	 SET_MD_DBCA(/;"	d
SET_MD_DBRAM0	include/bedbug/regs.h	/^#define	 SET_MD_DBRAM0(/;"	d
SET_MD_DBRAM1	include/bedbug/regs.h	/^#define	 SET_MD_DBRAM1(/;"	d
SET_MD_EPN	include/bedbug/regs.h	/^#define	 SET_MD_EPN(/;"	d
SET_MD_RPN	include/bedbug/regs.h	/^#define	 SET_MD_RPN(/;"	d
SET_MD_TWC	include/bedbug/regs.h	/^#define	 SET_MD_TWC(/;"	d
SET_MEDIUM_FREQ	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	SET_MEDIUM_FREQ,$/;"	e	enum:auto_tune_stage
SET_MEDIUM_FREQ_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define SET_MEDIUM_FREQ_MASK_BIT	/;"	d
SET_MI_AP	include/bedbug/regs.h	/^#define	 SET_MI_AP(/;"	d
SET_MI_CTR	include/bedbug/regs.h	/^#define	 SET_MI_CTR(/;"	d
SET_MI_DBCAM	include/bedbug/regs.h	/^#define	 SET_MI_DBCAM(/;"	d
SET_MI_DBRAM0	include/bedbug/regs.h	/^#define	 SET_MI_DBRAM0(/;"	d
SET_MI_DBRAM1	include/bedbug/regs.h	/^#define	 SET_MI_DBRAM1(/;"	d
SET_MI_EPN	include/bedbug/regs.h	/^#define	 SET_MI_EPN(/;"	d
SET_MI_RPN	include/bedbug/regs.h	/^#define	 SET_MI_RPN(/;"	d
SET_MI_TWC	include/bedbug/regs.h	/^#define	 SET_MI_TWC(/;"	d
SET_MRVL_ID	arch/arm/cpu/arm926ejs/armada100/cpu.c	/^#define SET_MRVL_ID	/;"	d	file:
SET_MSR	include/bedbug/regs.h	/^#define	 SET_MSR(/;"	d
SET_M_CASID	include/bedbug/regs.h	/^#define	 SET_M_CASID(/;"	d
SET_M_TW	include/bedbug/regs.h	/^#define	 SET_M_TW(/;"	d
SET_M_TWB	include/bedbug/regs.h	/^#define	 SET_M_TWB(/;"	d
SET_OK_NO_PROP_ERRORS	drivers/crypto/fsl/desc_constr.h	/^#define SET_OK_NO_PROP_ERRORS /;"	d
SET_PCI_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_PCI_LIODN(/;"	d
SET_PCI_LIODN_BASE	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_PCI_LIODN_BASE(/;"	d
SET_PHYAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_PHYAD(/;"	d
SET_PID	include/bedbug/regs.h	/^#define	 SET_PID(/;"	d
SET_PIT	include/bedbug/regs.h	/^#define	 SET_PIT(/;"	d
SET_PLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define SET_PLL(/;"	d
SET_PLL	board/samsung/trats/setup.h	/^#define SET_PLL(/;"	d
SET_PLL_GO	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^#define SET_PLL_GO /;"	d	file:
SET_PLL_GO	drivers/usb/dwc3/ti_usb_phy.c	/^#define SET_PLL_GO	/;"	d	file:
SET_PLL_GO	include/linux/usb/xhci-omap.h	/^#define	SET_PLL_GO	/;"	d
SET_PLL_PD	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^#define SET_PLL_PD(/;"	d	file:
SET_PMAN_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_PMAN_LIODN(/;"	d
SET_PME_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_PME_LIODN(/;"	d
SET_PRE_RATIO	arch/arm/mach-exynos/include/mach/clk.h	/^#define SET_PRE_RATIO(/;"	d
SET_PVR	include/bedbug/regs.h	/^#define	 SET_PVR(/;"	d
SET_QE_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_QE_LIODN(/;"	d
SET_QMAN_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_QMAN_LIODN(/;"	d
SET_QP_INFO	arch/powerpc/include/asm/fsl_portals.h	/^#define SET_QP_INFO(/;"	d
SET_RAID_ENGINE_JQ_LIODN_ENTRY	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_RAID_ENGINE_JQ_LIODN_ENTRY(/;"	d
SET_RATIO	arch/arm/mach-exynos/include/mach/clk.h	/^#define SET_RATIO(/;"	d
SET_RD_DATA_PORT	include/ns87308.h	/^#define SET_RD_DATA_PORT /;"	d
SET_REGAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_REGAD(/;"	d
SET_REGISTER	include/bedbug/regs.h	/^#define SET_REGISTER(/;"	d
SET_REG_BIT	board/mpl/pati/pati.h	/^#define SET_REG_BIT(/;"	d
SET_RESULT_STATE	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define SET_RESULT_STATE(/;"	d
SET_RMAN_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_RMAN_LIODN(/;"	d
SET_SATA_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SATA_LIODN(/;"	d
SET_SDHC_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SDHC_LIODN(/;"	d
SET_SDHC_MUX_SEL	board/freescale/ls1021aqds/ls1021aqds.c	/^#define SET_SDHC_MUX_SEL(/;"	d	file:
SET_SDHC_MUX_SEL	board/freescale/ls2080aqds/ls2080aqds.c	/^#define SET_SDHC_MUX_SEL(/;"	d	file:
SET_SDHC_MUX_SEL	board/freescale/ls2080ardb/ls2080ardb.c	/^#define SET_SDHC_MUX_SEL(/;"	d	file:
SET_SEC_DECO_LIODN_ENTRY	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^#define SET_SEC_DECO_LIODN_ENTRY(/;"	d
SET_SEC_DECO_LIODN_ENTRY	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SEC_DECO_LIODN_ENTRY(/;"	d
SET_SEC_JR_LIODN_ENTRY	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^#define SET_SEC_JR_LIODN_ENTRY(/;"	d
SET_SEC_JR_LIODN_ENTRY	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SEC_JR_LIODN_ENTRY(/;"	d
SET_SEC_RTIC_LIODN_ENTRY	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^#define SET_SEC_RTIC_LIODN_ENTRY(/;"	d
SET_SEC_RTIC_LIODN_ENTRY	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SEC_RTIC_LIODN_ENTRY(/;"	d
SET_SGR	include/bedbug/regs.h	/^#define	 SET_SGR(/;"	d
SET_SLER	include/bedbug/regs.h	/^#define	 SET_SLER(/;"	d
SET_SPRG0	include/bedbug/regs.h	/^#define	 SET_SPRG0(/;"	d
SET_SPRG1	include/bedbug/regs.h	/^#define	 SET_SPRG1(/;"	d
SET_SPRG2	include/bedbug/regs.h	/^#define	 SET_SPRG2(/;"	d
SET_SPRG3	include/bedbug/regs.h	/^#define	 SET_SPRG3(/;"	d
SET_SPRG4	include/bedbug/regs.h	/^#define	 SET_SPRG4(/;"	d
SET_SPRG4_RO	include/bedbug/regs.h	/^#define	 SET_SPRG4_RO(/;"	d
SET_SPRG5	include/bedbug/regs.h	/^#define	 SET_SPRG5(/;"	d
SET_SPRG5_RO	include/bedbug/regs.h	/^#define	 SET_SPRG5_RO(/;"	d
SET_SPRG6	include/bedbug/regs.h	/^#define	 SET_SPRG6(/;"	d
SET_SPRG6_RO	include/bedbug/regs.h	/^#define	 SET_SPRG6_RO(/;"	d
SET_SPRG7	include/bedbug/regs.h	/^#define	 SET_SPRG7(/;"	d
SET_SPRG7_RO	include/bedbug/regs.h	/^#define	 SET_SPRG7_RO(/;"	d
SET_SRIO_LIODN_1	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SRIO_LIODN_1(/;"	d
SET_SRIO_LIODN_2	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SRIO_LIODN_2(/;"	d
SET_SRIO_LIODN_BASE	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_SRIO_LIODN_BASE(/;"	d
SET_SRR0	include/bedbug/regs.h	/^#define	 SET_SRR0(/;"	d
SET_SRR1	include/bedbug/regs.h	/^#define	 SET_SRR1(/;"	d
SET_SRR2	include/bedbug/regs.h	/^#define	 SET_SRR2(/;"	d
SET_SRR3	include/bedbug/regs.h	/^#define	 SET_SRR3(/;"	d
SET_STD_PCIE_INFO	arch/powerpc/include/asm/fsl_pci.h	/^#define SET_STD_PCIE_INFO(/;"	d
SET_STD_PCI_INFO	arch/powerpc/include/asm/fsl_pci.h	/^#define SET_STD_PCI_INFO(/;"	d
SET_STD_TSEC_INFO	include/tsec.h	/^#define SET_STD_TSEC_INFO(/;"	d
SET_SU0R	include/bedbug/regs.h	/^#define	 SET_SU0R(/;"	d
SET_SWAP	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SET_SWAP	/;"	d
SET_SYSCNTR_BOOTIND	board/mpl/pati/pati.h	/^#define SET_SYSCNTR_BOOTIND(/;"	d
SET_SYSCNTR_FLWAIT	board/mpl/pati/pati.h	/^#define SET_SYSCNTR_FLWAIT(/;"	d
SET_SYSCNTR_ISB	board/mpl/pati/pati.h	/^#define SET_SYSCNTR_ISB(/;"	d
SET_TARGET_FREQ	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	SET_TARGET_FREQ,$/;"	e	enum:auto_tune_stage
SET_TARGET_FREQ_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define SET_TARGET_FREQ_MASK_BIT	/;"	d
SET_TBL	include/bedbug/regs.h	/^#define	 SET_TBL(/;"	d
SET_TBU	include/bedbug/regs.h	/^#define	 SET_TBU(/;"	d
SET_TCR	include/bedbug/regs.h	/^#define	 SET_TCR(/;"	d
SET_TDM_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_TDM_LIODN(/;"	d
SET_TLB_ENTRY	arch/powerpc/include/asm/mmu.h	/^#define SET_TLB_ENTRY(/;"	d
SET_TSR	include/bedbug/regs.h	/^#define	 SET_TSR(/;"	d
SET_USB_LIODN	arch/powerpc/include/asm/fsl_liodn.h	/^#define SET_USB_LIODN(/;"	d
SET_USPRG0	include/bedbug/regs.h	/^#define	 SET_USPRG0(/;"	d
SET_VAL_MASK	arch/powerpc/cpu/mpc8260/cpu_init.c	/^#define SET_VAL_MASK(/;"	d	file:
SET_WCR_WT	include/fsl_wdog.h	/^#define SET_WCR_WT(/;"	d
SET_WF0_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF0_CRC(/;"	d
SET_WF0_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF0_OFF(/;"	d
SET_WF1_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF1_CRC(/;"	d
SET_WF1_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF1_OFF(/;"	d
SET_WF2_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF2_CRC(/;"	d
SET_WF2_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF2_OFF(/;"	d
SET_WF3_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF3_CRC(/;"	d
SET_WF3_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF3_OFF(/;"	d
SET_WF_OFFS	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	SET_WF_OFFS(/;"	d
SET_XER	include/bedbug/regs.h	/^#define	 SET_XER(/;"	d
SET_ZPR	include/bedbug/regs.h	/^#define	 SET_ZPR(/;"	d
SEVENWIRE	drivers/net/fec_mxc.h	/^	SEVENWIRE,	\/* 7-wire       *\/$/;"	e	enum:xceiver_type
SEVENWIRE	drivers/net/mpc512x_fec.h	/^	SEVENWIRE,			\/* 7-wire       *\/$/;"	e	enum:__anonf8b8c0fc0203
SEVENWIRE	drivers/net/mpc5xxx_fec.h	/^	SEVENWIRE,			\/* 7-wire       *\/$/;"	e	enum:__anone13c4dc90203
SFBR	include/sym53c8xx.h	/^#define SFBR	/;"	d
SFIFO_RXOF	drivers/serial/serial_lpuart.c	/^#define SFIFO_RXOF	/;"	d	file:
SFIFO_RXUF	drivers/serial/serial_lpuart.c	/^#define SFIFO_RXUF	/;"	d	file:
SFI_DEV_TYPE_HSI	arch/x86/include/asm/sfi.h	/^	SFI_DEV_TYPE_HSI,$/;"	e	enum:__anonc1ef61a20103
SFI_DEV_TYPE_I2C	arch/x86/include/asm/sfi.h	/^	SFI_DEV_TYPE_I2C,$/;"	e	enum:__anonc1ef61a20103
SFI_DEV_TYPE_IPC	arch/x86/include/asm/sfi.h	/^	SFI_DEV_TYPE_IPC,$/;"	e	enum:__anonc1ef61a20103
SFI_DEV_TYPE_SD	arch/x86/include/asm/sfi.h	/^	SFI_DEV_TYPE_SD,$/;"	e	enum:__anonc1ef61a20103
SFI_DEV_TYPE_SPI	arch/x86/include/asm/sfi.h	/^	SFI_DEV_TYPE_SPI	= 0,$/;"	e	enum:__anonc1ef61a20103
SFI_DEV_TYPE_UART	arch/x86/include/asm/sfi.h	/^	SFI_DEV_TYPE_UART,$/;"	e	enum:__anonc1ef61a20103
SFI_GET_NUM_ENTRIES	arch/x86/include/asm/sfi.h	/^#define SFI_GET_NUM_ENTRIES(/;"	d
SFI_NAME_LEN	arch/x86/include/asm/sfi.h	/^#define SFI_NAME_LEN	/;"	d
SFI_OEM_ID_SIZE	arch/x86/include/asm/sfi.h	/^#define SFI_OEM_ID_SIZE	/;"	d
SFI_OEM_TABLE_ID_SIZE	arch/x86/include/asm/sfi.h	/^#define SFI_OEM_TABLE_ID_SIZE	/;"	d
SFI_SIGNATURE_SIZE	arch/x86/include/asm/sfi.h	/^#define SFI_SIGNATURE_SIZE	/;"	d
SFI_SIG_APIC	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_APIC	/;"	d
SFI_SIG_CPUS	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_CPUS	/;"	d
SFI_SIG_DEVS	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_DEVS	/;"	d
SFI_SIG_FREQ	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_FREQ	/;"	d
SFI_SIG_GPIO	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_GPIO	/;"	d
SFI_SIG_MMAP	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_MMAP	/;"	d
SFI_SIG_MRTC	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_MRTC	/;"	d
SFI_SIG_MTMR	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_MTMR	/;"	d
SFI_SIG_SYST	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_SYST	/;"	d
SFI_SIG_WAKE	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_WAKE	/;"	d
SFI_SIG_XSDT	arch/x86/include/asm/sfi.h	/^#define SFI_SIG_XSDT	/;"	d
SFI_TABLE_MAX_ENTRIES	arch/x86/include/asm/sfi.h	/^#define SFI_TABLE_MAX_ENTRIES	/;"	d
SFLASH_PAGE_SIZE	include/linux/mtd/st_smi.h	/^#define SFLASH_PAGE_SIZE	/;"	d
SFORM	arch/sh/include/asm/cpu_sh7722.h	/^#define SFORM /;"	d
SFP_TX	board/freescale/ls2080aqds/eth.c	/^#define SFP_TX	/;"	d	file:
SFR	arch/avr32/include/asm/hmatrix-common.h	/^	u32	SFR[16];$/;"	m	struct:hmatrix_regs	typeref:typename:u32[16]
SFRDEL	arch/x86/cpu/quark/smc.h	/^#define SFRDEL	/;"	d
SFRTRIM	arch/x86/cpu/quark/smc.h	/^#define SFRTRIM	/;"	d
SFR_HEADER_EMPTY	arch/arm/mach-exynos/include/mach/dsim.h	/^#define SFR_HEADER_EMPTY	/;"	d
SFT	examples/standalone/stubs.c	/^# define SFT /;"	d	file:
SFTRESET	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SFTRESET /;"	d
SFTRESET_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SFTRESET_P	/;"	d
SF_ADDR	drivers/mtd/spi/sandbox.c	/^	SF_ADDR,  \/* processing the offset in the flash to read\/etc... *\/$/;"	e	enum:sandbox_sf_state	file:
SF_ADDR_LEN	drivers/mtd/spi/sandbox.c	/^#define SF_ADDR_LEN	/;"	d	file:
SF_CMD	drivers/mtd/spi/sandbox.c	/^	SF_CMD,   \/* default state -- we're awaiting a command *\/$/;"	e	enum:sandbox_sf_state	file:
SF_DUAL_PARALLEL_FLASH	drivers/mtd/spi/sf_internal.h	/^	SF_DUAL_PARALLEL_FLASH	= BIT(1),$/;"	e	enum:spi_dual_flash
SF_DUAL_STACKED_FLASH	drivers/mtd/spi/sf_internal.h	/^	SF_DUAL_STACKED_FLASH	= BIT(0),$/;"	e	enum:spi_dual_flash
SF_ERASE	drivers/mtd/spi/sandbox.c	/^	SF_ERASE, \/* erase the flash *\/$/;"	e	enum:sandbox_sf_state	file:
SF_FP	arch/sparc/include/asm/ptrace.h	/^#define SF_FP /;"	d
SF_FP	arch/sparc/include/asm/stack.h	/^#define SF_FP	/;"	d
SF_I0	arch/sparc/include/asm/ptrace.h	/^#define SF_I0 /;"	d
SF_I0	arch/sparc/include/asm/stack.h	/^#define SF_I0	/;"	d
SF_I1	arch/sparc/include/asm/ptrace.h	/^#define SF_I1 /;"	d
SF_I1	arch/sparc/include/asm/stack.h	/^#define SF_I1	/;"	d
SF_I2	arch/sparc/include/asm/ptrace.h	/^#define SF_I2 /;"	d
SF_I2	arch/sparc/include/asm/stack.h	/^#define SF_I2	/;"	d
SF_I3	arch/sparc/include/asm/ptrace.h	/^#define SF_I3 /;"	d
SF_I3	arch/sparc/include/asm/stack.h	/^#define SF_I3	/;"	d
SF_I4	arch/sparc/include/asm/ptrace.h	/^#define SF_I4 /;"	d
SF_I4	arch/sparc/include/asm/stack.h	/^#define SF_I4	/;"	d
SF_I5	arch/sparc/include/asm/ptrace.h	/^#define SF_I5 /;"	d
SF_I5	arch/sparc/include/asm/stack.h	/^#define SF_I5	/;"	d
SF_ID	drivers/mtd/spi/sandbox.c	/^	SF_ID,    \/* read the flash's (jedec) ID code *\/$/;"	e	enum:sandbox_sf_state	file:
SF_L0	arch/sparc/include/asm/ptrace.h	/^#define SF_L0 /;"	d
SF_L0	arch/sparc/include/asm/stack.h	/^#define SF_L0	/;"	d
SF_L1	arch/sparc/include/asm/ptrace.h	/^#define SF_L1 /;"	d
SF_L1	arch/sparc/include/asm/stack.h	/^#define SF_L1	/;"	d
SF_L2	arch/sparc/include/asm/ptrace.h	/^#define SF_L2 /;"	d
SF_L2	arch/sparc/include/asm/stack.h	/^#define SF_L2	/;"	d
SF_L3	arch/sparc/include/asm/ptrace.h	/^#define SF_L3 /;"	d
SF_L3	arch/sparc/include/asm/stack.h	/^#define SF_L3	/;"	d
SF_L4	arch/sparc/include/asm/ptrace.h	/^#define SF_L4 /;"	d
SF_L4	arch/sparc/include/asm/stack.h	/^#define SF_L4	/;"	d
SF_L5	arch/sparc/include/asm/ptrace.h	/^#define SF_L5 /;"	d
SF_L5	arch/sparc/include/asm/stack.h	/^#define SF_L5	/;"	d
SF_L6	arch/sparc/include/asm/ptrace.h	/^#define SF_L6 /;"	d
SF_L6	arch/sparc/include/asm/stack.h	/^#define SF_L6	/;"	d
SF_L7	arch/sparc/include/asm/ptrace.h	/^#define SF_L7 /;"	d
SF_L7	arch/sparc/include/asm/stack.h	/^#define SF_L7	/;"	d
SF_PC	arch/sparc/include/asm/ptrace.h	/^#define SF_PC /;"	d
SF_PC	arch/sparc/include/asm/stack.h	/^#define SF_PC	/;"	d
SF_READ	drivers/mtd/spi/sandbox.c	/^	SF_READ,  \/* reading data from the flash *\/$/;"	e	enum:sandbox_sf_state	file:
SF_READ_DATA_CMD	arch/arm/mach-exynos/include/mach/spi.h	/^#define SF_READ_DATA_CMD	/;"	d
SF_READ_STATUS	drivers/mtd/spi/sandbox.c	/^	SF_READ_STATUS, \/* read the flash's status register *\/$/;"	e	enum:sandbox_sf_state	file:
SF_READ_STATUS1	drivers/mtd/spi/sandbox.c	/^	SF_READ_STATUS1, \/* read the flash's status register upper 8 bits*\/$/;"	e	enum:sandbox_sf_state	file:
SF_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define SF_REGS_SZ	/;"	d
SF_REGS_SZ	arch/sparc/include/asm/stack.h	/^#define SF_REGS_SZ /;"	d
SF_RETP	arch/sparc/include/asm/ptrace.h	/^#define SF_RETP /;"	d
SF_RETP	arch/sparc/include/asm/stack.h	/^#define SF_RETP	/;"	d
SF_SINGLE_FLASH	drivers/mtd/spi/sf_internal.h	/^	SF_SINGLE_FLASH	= 0,$/;"	e	enum:spi_dual_flash
SF_TEST_HELP	cmd/sf.c	/^#define SF_TEST_HELP /;"	d	file:
SF_TEST_HELP	cmd/sf.c	/^#define SF_TEST_HELP$/;"	d	file:
SF_WRITE	drivers/mtd/spi/sandbox.c	/^	SF_WRITE, \/* writing data to the flash, i.e. page programming *\/$/;"	e	enum:sandbox_sf_state	file:
SF_WRITE_STATUS	drivers/mtd/spi/sandbox.c	/^	SF_WRITE_STATUS, \/* write the flash's status register *\/$/;"	e	enum:sandbox_sf_state	file:
SF_XARG0	arch/sparc/include/asm/ptrace.h	/^#define SF_XARG0 /;"	d
SF_XARG0	arch/sparc/include/asm/stack.h	/^#define SF_XARG0	/;"	d
SF_XARG1	arch/sparc/include/asm/ptrace.h	/^#define SF_XARG1 /;"	d
SF_XARG1	arch/sparc/include/asm/stack.h	/^#define	SF_XARG1	/;"	d
SF_XARG2	arch/sparc/include/asm/ptrace.h	/^#define SF_XARG2 /;"	d
SF_XARG2	arch/sparc/include/asm/stack.h	/^#define	SF_XARG2	/;"	d
SF_XARG3	arch/sparc/include/asm/ptrace.h	/^#define SF_XARG3 /;"	d
SF_XARG3	arch/sparc/include/asm/stack.h	/^#define	SF_XARG3	/;"	d
SF_XARG4	arch/sparc/include/asm/ptrace.h	/^#define SF_XARG4 /;"	d
SF_XARG4	arch/sparc/include/asm/stack.h	/^#define	SF_XARG4	/;"	d
SF_XARG5	arch/sparc/include/asm/ptrace.h	/^#define SF_XARG5 /;"	d
SF_XARG5	arch/sparc/include/asm/stack.h	/^#define	SF_XARG5	/;"	d
SF_XXARG	arch/sparc/include/asm/ptrace.h	/^#define SF_XXARG /;"	d
SF_XXARG	arch/sparc/include/asm/stack.h	/^#define	SF_XXARG	/;"	d
SGE	include/sym53c8xx.h	/^  #define   SGE /;"	d
SGE_DRD	drivers/block/sata_sil.h	/^	SGE_DRD			= (1 << 29), \/* discard data read (\/dev\/null)$/;"	e	enum:__anone6fe50d30103
SGE_LNK	drivers/block/sata_sil.h	/^	SGE_LNK			= (1 << 30), \/* linked list$/;"	e	enum:__anone6fe50d30103
SGE_TRM	drivers/block/sata_sil.h	/^	SGE_TRM			= (1 << 31), \/* Last SGE in chain *\/$/;"	e	enum:__anone6fe50d30103
SGMII	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII,$/;"	e	enum:__anon525929f50303
SGMII0	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII0,$/;"	e	enum:serdes_type
SGMII1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII1,$/;"	e	enum:srds_prtcl
SGMII1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII1,$/;"	e	enum:serdes_type
SGMII10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII10,$/;"	e	enum:srds_prtcl
SGMII11	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII11,$/;"	e	enum:srds_prtcl
SGMII12	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII12,$/;"	e	enum:srds_prtcl
SGMII13	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII13,$/;"	e	enum:srds_prtcl
SGMII14	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII14,$/;"	e	enum:srds_prtcl
SGMII15	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII15,$/;"	e	enum:srds_prtcl
SGMII16	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII16,$/;"	e	enum:srds_prtcl
SGMII2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII2,$/;"	e	enum:srds_prtcl
SGMII2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII2,$/;"	e	enum:serdes_type
SGMII3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII3,$/;"	e	enum:srds_prtcl
SGMII3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII3,$/;"	e	enum:serdes_type
SGMII3_1_25_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII3_1_25_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SGMII3_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII3_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
SGMII3_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII3_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
SGMII3_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII3_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
SGMII4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII4,$/;"	e	enum:srds_prtcl
SGMII5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII5,$/;"	e	enum:srds_prtcl
SGMII6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII6,$/;"	e	enum:srds_prtcl
SGMII7	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII7,$/;"	e	enum:srds_prtcl
SGMII8	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII8,$/;"	e	enum:srds_prtcl
SGMII9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII9,$/;"	e	enum:srds_prtcl
SGMIIPHY_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SGMIIPHY_ADDR(/;"	d
SGMIIPHY_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define SGMIIPHY_BASE(/;"	d
SGMIISERDES_SPEED_1_25_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMIISERDES_SPEED_1_25_GBPS,$/;"	e	enum:__anon525929f50603
SGMIISERDES_SPEED_3_125_GBPS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMIISERDES_SPEED_3_125_GBPS,$/;"	e	enum:__anon525929f50603
SGMII_1_25_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_1_25_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SGMII_2500_FM1_DTSEC1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC1	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC10	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC2	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC3	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC4	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC5	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC6	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_2500_FM1_DTSEC9	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM1_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC1	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC10	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC2	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC3	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC4	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC5	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC6	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_2500_FM2_DTSEC9	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_2500_FM2_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_3_125	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_3_125,$/;"	e	enum:__anon525929f50303
SGMII_3_125_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_3_125_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SGMII_ANEG_TIMEOUT	drivers/net/keystone_net.c	/^#define SGMII_ANEG_TIMEOUT	/;"	d	file:
SGMII_AQR_PHY_ADDR	include/configs/T102xRDB.h	/^#define SGMII_AQR_PHY_ADDR	/;"	d
SGMII_AUXCFG_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_AUXCFG_REG(/;"	d
SGMII_CARD_AQ_PHY_ADDR_S3	include/configs/T102xQDS.h	/^#define SGMII_CARD_AQ_PHY_ADDR_S3 /;"	d
SGMII_CARD_AQ_PHY_ADDR_S4	include/configs/T102xQDS.h	/^#define SGMII_CARD_AQ_PHY_ADDR_S4 /;"	d
SGMII_CARD_AQ_PHY_ADDR_S5	include/configs/T102xQDS.h	/^#define SGMII_CARD_AQ_PHY_ADDR_S5 /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/B4860QDS.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/T102xQDS.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/T1040QDS.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/T208xQDS.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/T4240QDS.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/ls1043aqds.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/ls1046aqds.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT1_PHY_ADDR	include/configs/ls2080aqds.h	/^#define SGMII_CARD_PORT1_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/B4860QDS.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/T102xQDS.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/T1040QDS.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/T208xQDS.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/T4240QDS.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/ls1043aqds.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/ls1046aqds.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT2_PHY_ADDR	include/configs/ls2080aqds.h	/^#define SGMII_CARD_PORT2_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/B4860QDS.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/T102xQDS.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/T1040QDS.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/T208xQDS.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/T4240QDS.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/ls1043aqds.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/ls1046aqds.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT3_PHY_ADDR	include/configs/ls2080aqds.h	/^#define SGMII_CARD_PORT3_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/B4860QDS.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/T102xQDS.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/T1040QDS.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/T208xQDS.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/T4240QDS.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/ls1043aqds.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/ls1046aqds.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_CARD_PORT4_PHY_ADDR	include/configs/ls2080aqds.h	/^#define SGMII_CARD_PORT4_PHY_ADDR /;"	d
SGMII_COMPHY_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SGMII_COMPHY_CTRL_REG(/;"	d
SGMII_CTL_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_CTL_REG(/;"	d
SGMII_DIG_LP_ENA_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SGMII_DIG_LP_ENA_REG(/;"	d
SGMII_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
SGMII_FM1_DTSEC1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC1	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC10	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC2	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC3	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC4	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC5	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC6	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM1_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_FM1_DTSEC9	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM1_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC1	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC1,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC10	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC10,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC2	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC2,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC3	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC3,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC4	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC4,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC5	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC5,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC6	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC6,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_FM2_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_FM2_DTSEC9	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_FM2_DTSEC9,$/;"	e	enum:srds_prtcl
SGMII_IDVER_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_IDVER_REG(/;"	d
SGMII_LINK_MAC_FIBER	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_LINK_MAC_FIBER	/;"	d
SGMII_LINK_MAC_MAC_AUTONEG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_LINK_MAC_MAC_AUTONEG	/;"	d
SGMII_LINK_MAC_MAC_FORCED	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_LINK_MAC_MAC_FORCED	/;"	d
SGMII_LINK_MAC_PHY	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_LINK_MAC_PHY	/;"	d
SGMII_LINK_MAC_PHY_FORCED	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_LINK_MAC_PHY_FORCED	/;"	d
SGMII_LPADV_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_LPADV_REG(/;"	d
SGMII_MRADV_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_MRADV_REG(/;"	d
SGMII_OFFSET	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_OFFSET(/;"	d
SGMII_PHY1_ADDR	include/configs/ls1046ardb.h	/^#define SGMII_PHY1_ADDR	/;"	d
SGMII_PHY2_ADDR	include/configs/ls1046ardb.h	/^#define SGMII_PHY2_ADDR	/;"	d
SGMII_PHY_ADDR1	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR1 /;"	d
SGMII_PHY_ADDR2	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR2 /;"	d
SGMII_PHY_ADDR3	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR3 /;"	d
SGMII_PHY_ADDR4	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR4 /;"	d
SGMII_PHY_ADDR5	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR5 /;"	d
SGMII_PHY_ADDR6	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR6 /;"	d
SGMII_PHY_ADDR7	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR7 /;"	d
SGMII_PHY_ADDR8	include/configs/T4240RDB.h	/^#define SGMII_PHY_ADDR8 /;"	d
SGMII_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
SGMII_PWR_PLL_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SGMII_PWR_PLL_CTRL_REG(/;"	d
SGMII_REF_CLK_SEL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SGMII_REF_CLK_SEL_REG(/;"	d
SGMII_REG_CONTROL_AUTONEG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_CONTROL_AUTONEG	/;"	d
SGMII_REG_CONTROL_MASTER	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_CONTROL_MASTER	/;"	d
SGMII_REG_MR_ADV_ENABLE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_MR_ADV_ENABLE	/;"	d
SGMII_REG_MR_ADV_FULL_DUPLEX	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_MR_ADV_FULL_DUPLEX	/;"	d
SGMII_REG_MR_ADV_GIG_MODE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_MR_ADV_GIG_MODE	/;"	d
SGMII_REG_MR_ADV_LINK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_MR_ADV_LINK	/;"	d
SGMII_REG_STATUS_AUTONEG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_STATUS_AUTONEG	/;"	d
SGMII_REG_STATUS_LINK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_STATUS_LINK	/;"	d
SGMII_REG_STATUS_LOCK	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_REG_STATUS_LOCK	/;"	d
SGMII_RISER_PHY_OFFSET	include/configs/MPC8536DS.h	/^#define SGMII_RISER_PHY_OFFSET	/;"	d
SGMII_RISER_PHY_OFFSET	include/configs/MPC8544DS.h	/^#define SGMII_RISER_PHY_OFFSET	/;"	d
SGMII_RISER_PHY_OFFSET	include/configs/MPC8572DS.h	/^#define SGMII_RISER_PHY_OFFSET	/;"	d
SGMII_RISER_PHY_OFFSET	include/configs/ls1021aqds.h	/^#define SGMII_RISER_PHY_OFFSET	/;"	d
SGMII_RTK_PHY_ADDR	include/configs/T102xRDB.h	/^#define SGMII_RTK_PHY_ADDR	/;"	d
SGMII_RXCFG_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_RXCFG_REG(/;"	d
SGMII_SERDES_CFG_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SGMII_SERDES_CFG_REG(/;"	d
SGMII_SERDES_STAT_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SGMII_SERDES_STAT_REG(/;"	d
SGMII_SRESET_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_SRESET_REG(/;"	d
SGMII_STATUS_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_STATUS_REG(/;"	d
SGMII_SW1_MAC1	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_SW1_MAC1,$/;"	e	enum:srds_prtcl
SGMII_SW1_MAC2	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_SW1_MAC2,$/;"	e	enum:srds_prtcl
SGMII_SW1_MAC3	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_SW1_MAC3,$/;"	e	enum:srds_prtcl
SGMII_SW1_MAC4	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_SW1_MAC4,$/;"	e	enum:srds_prtcl
SGMII_SW1_MAC5	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_SW1_MAC5,$/;"	e	enum:srds_prtcl
SGMII_SW1_MAC6	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_SW1_MAC6,$/;"	e	enum:srds_prtcl
SGMII_TSEC1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_TSEC1,$/;"	e	enum:srds_prtcl
SGMII_TSEC1	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	SGMII_TSEC1,$/;"	e	enum:srds_prtcl
SGMII_TSEC1	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_TSEC1,$/;"	e	enum:srds_prtcl
SGMII_TSEC2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_TSEC2,$/;"	e	enum:srds_prtcl
SGMII_TSEC2	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^	SGMII_TSEC2,$/;"	e	enum:srds_prtcl
SGMII_TSEC2	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_TSEC2,$/;"	e	enum:srds_prtcl
SGMII_TSEC3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_TSEC3,$/;"	e	enum:srds_prtcl
SGMII_TSEC3	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_TSEC3,$/;"	e	enum:srds_prtcl
SGMII_TSEC4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SGMII_TSEC4,$/;"	e	enum:srds_prtcl
SGMII_TSEC4	arch/powerpc/include/asm/fsl_serdes.h	/^	SGMII_TSEC4,$/;"	e	enum:srds_prtcl
SGMII_TXCFG_REG	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SGMII_TXCFG_REG(/;"	d
SGMII_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
SGMII_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	SGMII_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
SGR_GUARDED	arch/powerpc/include/asm/processor.h	/^#define   SGR_GUARDED	/;"	d
SGR_NORMAL	arch/powerpc/include/asm/processor.h	/^#define   SGR_NORMAL	/;"	d
SG_CTRL_BASE	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_CTRL_BASE	/;"	d
SG_DBG_BASE	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_DBG_BASE	/;"	d
SG_ENTRY_BPID_MASK	include/fsl_sec.h	/^#define SG_ENTRY_BPID_MASK	/;"	d
SG_ENTRY_BPID_SHIFT	include/fsl_sec.h	/^#define SG_ENTRY_BPID_SHIFT	/;"	d
SG_ENTRY_EXTENSION_BIT	include/fsl_sec.h	/^#define SG_ENTRY_EXTENSION_BIT	/;"	d
SG_ENTRY_FINAL_BIT	include/fsl_sec.h	/^#define SG_ENTRY_FINAL_BIT	/;"	d
SG_ENTRY_LENGTH_MASK	include/fsl_sec.h	/^#define SG_ENTRY_LENGTH_MASK	/;"	d
SG_ENTRY_OFFSET_MASK	include/fsl_sec.h	/^#define SG_ENTRY_OFFSET_MASK	/;"	d
SG_ENTRY_OFFSET_SHIFT	include/fsl_sec.h	/^#define SG_ENTRY_OFFSET_SHIFT	/;"	d
SG_ETPHYCNT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_ETPHYCNT	/;"	d
SG_ETPHYPSHUT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_ETPHYPSHUT	/;"	d
SG_IECTRL	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_IECTRL	/;"	d
SG_LOADPINCTRL	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_LOADPINCTRL	/;"	d
SG_MEMCONF	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF	/;"	d
SG_MEMCONF_CH0_NUM_1	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_NUM_1	/;"	d
SG_MEMCONF_CH0_NUM_2	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_NUM_2	/;"	d
SG_MEMCONF_CH0_NUM_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_NUM_MASK	/;"	d
SG_MEMCONF_CH0_SZ_128M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_SZ_128M	/;"	d
SG_MEMCONF_CH0_SZ_1G	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_SZ_1G	/;"	d
SG_MEMCONF_CH0_SZ_256M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_SZ_256M	/;"	d
SG_MEMCONF_CH0_SZ_512M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_SZ_512M	/;"	d
SG_MEMCONF_CH0_SZ_64M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_SZ_64M	/;"	d
SG_MEMCONF_CH0_SZ_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH0_SZ_MASK	/;"	d
SG_MEMCONF_CH1_NUM_1	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_NUM_1	/;"	d
SG_MEMCONF_CH1_NUM_2	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_NUM_2	/;"	d
SG_MEMCONF_CH1_NUM_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_NUM_MASK	/;"	d
SG_MEMCONF_CH1_SZ_128M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_SZ_128M	/;"	d
SG_MEMCONF_CH1_SZ_1G	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_SZ_1G	/;"	d
SG_MEMCONF_CH1_SZ_256M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_SZ_256M	/;"	d
SG_MEMCONF_CH1_SZ_512M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_SZ_512M	/;"	d
SG_MEMCONF_CH1_SZ_64M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_SZ_64M	/;"	d
SG_MEMCONF_CH1_SZ_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH1_SZ_MASK	/;"	d
SG_MEMCONF_CH2_DISABLE	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_DISABLE	/;"	d
SG_MEMCONF_CH2_NUM_1	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_NUM_1	/;"	d
SG_MEMCONF_CH2_NUM_2	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_NUM_2	/;"	d
SG_MEMCONF_CH2_NUM_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_NUM_MASK	/;"	d
SG_MEMCONF_CH2_SZ_128M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_SZ_128M	/;"	d
SG_MEMCONF_CH2_SZ_1G	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_SZ_1G	/;"	d
SG_MEMCONF_CH2_SZ_256M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_SZ_256M	/;"	d
SG_MEMCONF_CH2_SZ_512M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_SZ_512M	/;"	d
SG_MEMCONF_CH2_SZ_64M	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_SZ_64M	/;"	d
SG_MEMCONF_CH2_SZ_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_CH2_SZ_MASK	/;"	d
SG_MEMCONF_SPARSEMEM	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_MEMCONF_SPARSEMEM	/;"	d
SG_PINCTRL_BASE	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINCTRL_BASE	/;"	d
SG_PINMON0	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_20480KHZ	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_20480KHZ	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_24576KHZ	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_24576KHZ	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_6144KHZ	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_6144KHZ	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_DEFAULT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_DEFAULT	/;"	d
SG_PINMON0_CLK_MODE_AXOSEL_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_AXOSEL_MASK	/;"	d
SG_PINMON0_CLK_MODE_UPLLSRC_DEFAULT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_UPLLSRC_DEFAULT	/;"	d
SG_PINMON0_CLK_MODE_UPLLSRC_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_UPLLSRC_MASK	/;"	d
SG_PINMON0_CLK_MODE_UPLLSRC_VPLL27A	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_UPLLSRC_VPLL27A	/;"	d
SG_PINMON0_CLK_MODE_UPLLSRC_VPLL27B	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_PINMON0_CLK_MODE_UPLLSRC_VPLL27B	/;"	d
SG_REVISION	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION	/;"	d
SG_REVISION_MODEL_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION_MODEL_MASK	/;"	d
SG_REVISION_MODEL_SHIFT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION_MODEL_SHIFT	/;"	d
SG_REVISION_REV_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION_REV_MASK	/;"	d
SG_REVISION_REV_SHIFT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION_REV_SHIFT	/;"	d
SG_REVISION_TYPE_MASK	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION_TYPE_MASK	/;"	d
SG_REVISION_TYPE_SHIFT	arch/arm/mach-uniphier/sg-regs.h	/^#define SG_REVISION_TYPE_SHIFT	/;"	d
SH	arch/Kconfig	/^config SH$/;"	c	choice:choice07312ef30104
SH	include/i8042.h	/^#define SH	/;"	d
SH73A0_PINT0_IRQ	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^#define SH73A0_PINT0_IRQ(/;"	d
SH73A0_PINT1_IRQ	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^#define SH73A0_PINT1_IRQ(/;"	d
SH7751_BCR1	drivers/pci/pci_sh7751.c	/^#define SH7751_BCR1	/;"	d	file:
SH7751_BCR2	drivers/pci/pci_sh7751.c	/^#define SH7751_BCR2	/;"	d	file:
SH7751_BCR3	drivers/pci/pci_sh7751.c	/^#define SH7751_BCR3	/;"	d	file:
SH7751_CS3_BASE_ADDR	drivers/pci/pci_sh7751.c	/^#define SH7751_CS3_BASE_ADDR /;"	d	file:
SH7751_MCR	drivers/pci/pci_sh7751.c	/^#define SH7751_MCR	/;"	d	file:
SH7751_P2CS3_BASE_ADDR	drivers/pci/pci_sh7751.c	/^#define SH7751_P2CS3_BASE_ADDR /;"	d	file:
SH7751_PCIBCR1	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIBCR1 /;"	d	file:
SH7751_PCIBCR2	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIBCR2 /;"	d	file:
SH7751_PCIBCR3	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIBCR3 /;"	d	file:
SH7751_PCICLKR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICLKR /;"	d	file:
SH7751_PCICLKR_PREFIX	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICLKR_PREFIX /;"	d	file:
SH7751_PCICONF0	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF0 /;"	d	file:
SH7751_PCICONF1	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF1 /;"	d	file:
SH7751_PCICONF1_BUM	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF1_BUM	/;"	d	file:
SH7751_PCICONF1_CMDS	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF1_CMDS	/;"	d	file:
SH7751_PCICONF1_MES	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF1_MES	/;"	d	file:
SH7751_PCICONF1_PER	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF1_PER	/;"	d	file:
SH7751_PCICONF1_WCC	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF1_WCC	/;"	d	file:
SH7751_PCICONF2	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF2 /;"	d	file:
SH7751_PCICONF3	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF3 /;"	d	file:
SH7751_PCICONF4	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF4 /;"	d	file:
SH7751_PCICONF5	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF5 /;"	d	file:
SH7751_PCICONF6	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICONF6 /;"	d	file:
SH7751_PCICR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICR /;"	d	file:
SH7751_PCICR_CFIN	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICR_CFIN	/;"	d	file:
SH7751_PCICR_PREFIX	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICR_PREFIX	/;"	d	file:
SH7751_PCICR_PRST	drivers/pci/pci_sh7751.c	/^#define SH7751_PCICR_PRST	/;"	d	file:
SH7751_PCIIOBR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIIOBR /;"	d	file:
SH7751_PCILAR0	drivers/pci/pci_sh7751.c	/^#define SH7751_PCILAR0 /;"	d	file:
SH7751_PCILAR1	drivers/pci/pci_sh7751.c	/^#define SH7751_PCILAR1 /;"	d	file:
SH7751_PCILSR0	drivers/pci/pci_sh7751.c	/^#define SH7751_PCILSR0 /;"	d	file:
SH7751_PCILSR1	drivers/pci/pci_sh7751.c	/^#define SH7751_PCILSR1 /;"	d	file:
SH7751_PCIMBR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIMBR /;"	d	file:
SH7751_PCIMCR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIMCR /;"	d	file:
SH7751_PCIPAR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIPAR /;"	d	file:
SH7751_PCIPDR	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIPDR /;"	d	file:
SH7751_PCIPINT	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIPINT /;"	d	file:
SH7751_PCIPINTM	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIPINTM /;"	d	file:
SH7751_PCIPINT_D0	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIPINT_D0	/;"	d	file:
SH7751_PCIPINT_D3	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIPINT_D3	/;"	d	file:
SH7751_PCIWCR1	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIWCR1 /;"	d	file:
SH7751_PCIWCR2	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIWCR2 /;"	d	file:
SH7751_PCIWCR3	drivers/pci/pci_sh7751.c	/^#define SH7751_PCIWCR3 /;"	d	file:
SH7751_PCI_HOST_BRIDGE	drivers/pci/pci_sh7751.c	/^#define SH7751_PCI_HOST_BRIDGE	/;"	d	file:
SH7751_PCI_IO_BASE	drivers/pci/pci_sh7751.c	/^#define SH7751_PCI_IO_BASE	/;"	d	file:
SH7751_PCI_IO_SIZE	drivers/pci/pci_sh7751.c	/^#define SH7751_PCI_IO_SIZE	/;"	d	file:
SH7751_PCI_MEM_BASE	drivers/pci/pci_sh7751.c	/^#define SH7751_PCI_MEM_BASE	/;"	d	file:
SH7751_PCI_MEM_SIZE	drivers/pci/pci_sh7751.c	/^#define SH7751_PCI_MEM_SIZE	/;"	d	file:
SH7751_WCR1	drivers/pci/pci_sh7751.c	/^#define SH7751_WCR1	/;"	d	file:
SH7751_WCR2	drivers/pci/pci_sh7751.c	/^#define SH7751_WCR2	/;"	d	file:
SH7751_WCR3	drivers/pci/pci_sh7751.c	/^#define SH7751_WCR3	/;"	d	file:
SH7752EVB_ETHERNET_MAC_BASE	include/configs/sh7752evb.h	/^#define SH7752EVB_ETHERNET_MAC_BASE	/;"	d
SH7752EVB_ETHERNET_MAC_BASE_SPI	include/configs/sh7752evb.h	/^#define SH7752EVB_ETHERNET_MAC_BASE_SPI	/;"	d
SH7752EVB_ETHERNET_MAC_SIZE	include/configs/sh7752evb.h	/^#define SH7752EVB_ETHERNET_MAC_SIZE	/;"	d
SH7752EVB_ETHERNET_NUM_CH	include/configs/sh7752evb.h	/^#define SH7752EVB_ETHERNET_NUM_CH	/;"	d
SH7752EVB_SDRAM_BASE	include/configs/sh7752evb.h	/^#define SH7752EVB_SDRAM_BASE	/;"	d
SH7752EVB_SDRAM_SIZE	include/configs/sh7752evb.h	/^#define SH7752EVB_SDRAM_SIZE	/;"	d
SH7752EVB_SPI_SECTOR_SIZE	include/configs/sh7752evb.h	/^#define SH7752EVB_SPI_SECTOR_SIZE	/;"	d
SH7753EVB_ETHERNET_MAC_BASE	include/configs/sh7753evb.h	/^#define SH7753EVB_ETHERNET_MAC_BASE	/;"	d
SH7753EVB_ETHERNET_MAC_BASE_SPI	include/configs/sh7753evb.h	/^#define SH7753EVB_ETHERNET_MAC_BASE_SPI	/;"	d
SH7753EVB_ETHERNET_MAC_SIZE	include/configs/sh7753evb.h	/^#define SH7753EVB_ETHERNET_MAC_SIZE	/;"	d
SH7753EVB_ETHERNET_NUM_CH	include/configs/sh7753evb.h	/^#define SH7753EVB_ETHERNET_NUM_CH	/;"	d
SH7753EVB_SDRAM_BASE	include/configs/sh7753evb.h	/^#define SH7753EVB_SDRAM_BASE	/;"	d
SH7753EVB_SDRAM_SIZE	include/configs/sh7753evb.h	/^#define SH7753EVB_SDRAM_SIZE	/;"	d
SH7753EVB_SPI_SECTOR_SIZE	include/configs/sh7753evb.h	/^#define SH7753EVB_SPI_SECTOR_SIZE	/;"	d
SH7757LCR_ETHERNET_MAC_BASE	include/configs/sh7757lcr.h	/^#define SH7757LCR_ETHERNET_MAC_BASE	/;"	d
SH7757LCR_ETHERNET_MAC_BASE_SPI	include/configs/sh7757lcr.h	/^#define SH7757LCR_ETHERNET_MAC_BASE_SPI	/;"	d
SH7757LCR_ETHERNET_MAC_SIZE	include/configs/sh7757lcr.h	/^#define SH7757LCR_ETHERNET_MAC_SIZE	/;"	d
SH7757LCR_ETHERNET_NUM_CH	include/configs/sh7757lcr.h	/^#define SH7757LCR_ETHERNET_NUM_CH	/;"	d
SH7757LCR_GIGA_ETHERNET_NUM_CH	include/configs/sh7757lcr.h	/^#define SH7757LCR_GIGA_ETHERNET_NUM_CH	/;"	d
SH7757LCR_GRA_OFFSET	include/configs/sh7757lcr.h	/^#define SH7757LCR_GRA_OFFSET	/;"	d
SH7757LCR_PCIEBRG_ADDR	include/configs/sh7757lcr.h	/^#define SH7757LCR_PCIEBRG_ADDR	/;"	d
SH7757LCR_PCIEBRG_ADDR_B0	include/configs/sh7757lcr.h	/^#define SH7757LCR_PCIEBRG_ADDR_B0	/;"	d
SH7757LCR_PCIEBRG_SIZE	include/configs/sh7757lcr.h	/^#define SH7757LCR_PCIEBRG_SIZE	/;"	d
SH7757LCR_PCIEBRG_SIZE_B0	include/configs/sh7757lcr.h	/^#define SH7757LCR_PCIEBRG_SIZE_B0	/;"	d
SH7757LCR_SDRAM_BASE	include/configs/sh7757lcr.h	/^#define SH7757LCR_SDRAM_BASE	/;"	d
SH7757LCR_SDRAM_DVC_SIZE	include/configs/sh7757lcr.h	/^#define SH7757LCR_SDRAM_DVC_SIZE	/;"	d
SH7757LCR_SDRAM_ECC_SETTING	include/configs/sh7757lcr.h	/^#define SH7757LCR_SDRAM_ECC_SETTING	/;"	d
SH7757LCR_SDRAM_PHYS_TOP	include/configs/sh7757lcr.h	/^#define SH7757LCR_SDRAM_PHYS_TOP	/;"	d
SH7757LCR_SDRAM_SIZE	include/configs/sh7757lcr.h	/^#define SH7757LCR_SDRAM_SIZE	/;"	d
SH7757LCR_SPI_SECTOR_SIZE	include/configs/sh7757lcr.h	/^#define SH7757LCR_SPI_SECTOR_SIZE	/;"	d
SH7780_DEVICE_ID	drivers/pci/pci_sh7780.c	/^#define SH7780_DEVICE_ID	/;"	d	file:
SH7780_PCIAINT	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIAINT	/;"	d
SH7780_PCIAINT	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIAINT	/;"	d
SH7780_PCIAINTM	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIAINTM	/;"	d
SH7780_PCIAINTM	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIAINTM	/;"	d
SH7780_PCIAIR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIAIR	/;"	d
SH7780_PCIAIR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIAIR	/;"	d
SH7780_PCIBCC	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIBCC	/;"	d
SH7780_PCIBCC	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIBCC	/;"	d
SH7780_PCIBIST	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIBIST	/;"	d
SH7780_PCIBIST	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIBIST	/;"	d
SH7780_PCIBMIR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIBMIR	/;"	d
SH7780_PCIBMIR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIBMIR	/;"	d
SH7780_PCICID	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICID	/;"	d
SH7780_PCICID	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICID	/;"	d
SH7780_PCICIR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICIR	/;"	d
SH7780_PCICIR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICIR	/;"	d
SH7780_PCICLS	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICLS	/;"	d
SH7780_PCICLS	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICLS	/;"	d
SH7780_PCICMD	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICMD	/;"	d
SH7780_PCICMD	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICMD	/;"	d
SH7780_PCICP	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICP	/;"	d
SH7780_PCICP	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICP	/;"	d
SH7780_PCICR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICR	/;"	d
SH7780_PCICR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICR	/;"	d
SH7780_PCICR_ARBM	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_ARBM	/;"	d	file:
SH7780_PCICR_CFIN	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_CFIN	/;"	d	file:
SH7780_PCICR_FTO	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_FTO	/;"	d	file:
SH7780_PCICR_IOCS	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_IOCS	/;"	d	file:
SH7780_PCICR_PFCS	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_PFCS	/;"	d	file:
SH7780_PCICR_PFE	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_PFE	/;"	d	file:
SH7780_PCICR_PREFIX	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_PREFIX	/;"	d	file:
SH7780_PCICR_PRST	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_PRST	/;"	d	file:
SH7780_PCICR_TBS	drivers/pci/pci_sh7780.c	/^#define SH7780_PCICR_TBS	/;"	d	file:
SH7780_PCICSAR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICSAR0	/;"	d
SH7780_PCICSAR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICSAR0	/;"	d
SH7780_PCICSAR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICSAR1	/;"	d
SH7780_PCICSAR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICSAR1	/;"	d
SH7780_PCICSCR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICSCR0	/;"	d
SH7780_PCICSCR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICSCR0	/;"	d
SH7780_PCICSCR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCICSCR1	/;"	d
SH7780_PCICSCR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCICSCR1	/;"	d
SH7780_PCIDID	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIDID	/;"	d
SH7780_PCIDID	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIDID	/;"	d
SH7780_PCIECR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIECR	/;"	d
SH7780_PCIECR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIECR	/;"	d
SH7780_PCIHDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIHDR	/;"	d
SH7780_PCIHDR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIHDR	/;"	d
SH7780_PCIIBAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIIBAR	/;"	d
SH7780_PCIIBAR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIIBAR	/;"	d
SH7780_PCIIMR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIIMR	/;"	d
SH7780_PCIIMR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIIMR	/;"	d
SH7780_PCIINTLINE	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIINTLINE	/;"	d
SH7780_PCIINTLINE	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIINTLINE	/;"	d
SH7780_PCIINTPIN	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIINTPIN	/;"	d
SH7780_PCIINTPIN	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIINTPIN	/;"	d
SH7780_PCIIOBMR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIIOBMR	/;"	d
SH7780_PCIIOBMR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIIOBMR	/;"	d
SH7780_PCIIOBR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIIOBR	/;"	d
SH7780_PCIIOBR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIIOBR	/;"	d
SH7780_PCIIR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIIR	/;"	d
SH7780_PCIIR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIIR	/;"	d
SH7780_PCILAR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCILAR0	/;"	d
SH7780_PCILAR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCILAR0	/;"	d
SH7780_PCILAR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCILAR1	/;"	d
SH7780_PCILAR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCILAR1	/;"	d
SH7780_PCILSR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCILSR0	/;"	d
SH7780_PCILSR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCILSR0	/;"	d
SH7780_PCILSR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCILSR1	/;"	d
SH7780_PCILSR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCILSR1	/;"	d
SH7780_PCILTM	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCILTM	/;"	d
SH7780_PCILTM	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCILTM	/;"	d
SH7780_PCIMAXLAT	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMAXLAT	/;"	d
SH7780_PCIMAXLAT	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMAXLAT	/;"	d
SH7780_PCIMBAR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBAR0	/;"	d
SH7780_PCIMBAR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBAR0	/;"	d
SH7780_PCIMBAR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBAR1	/;"	d
SH7780_PCIMBAR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBAR1	/;"	d
SH7780_PCIMBMR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBMR0	/;"	d
SH7780_PCIMBMR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBMR0	/;"	d
SH7780_PCIMBMR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBMR1	/;"	d
SH7780_PCIMBMR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBMR1	/;"	d
SH7780_PCIMBMR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBMR2	/;"	d
SH7780_PCIMBMR2	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBMR2	/;"	d
SH7780_PCIMBR0	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBR0	/;"	d
SH7780_PCIMBR0	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBR0	/;"	d
SH7780_PCIMBR1	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBR1	/;"	d
SH7780_PCIMBR1	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBR1	/;"	d
SH7780_PCIMBR2	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMBR2	/;"	d
SH7780_PCIMBR2	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMBR2	/;"	d
SH7780_PCIMINGNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIMINGNT	/;"	d
SH7780_PCIMINGNT	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIMINGNT	/;"	d
SH7780_PCINIP	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCINIP	/;"	d
SH7780_PCINIP	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCINIP	/;"	d
SH7780_PCIPAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPAR	/;"	d
SH7780_PCIPAR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPAR	/;"	d
SH7780_PCIPDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPDR	/;"	d
SH7780_PCIPDR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPDR	/;"	d
SH7780_PCIPIF	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPIF	/;"	d
SH7780_PCIPIF	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPIF	/;"	d
SH7780_PCIPINT	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPINT	/;"	d
SH7780_PCIPINT	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPINT	/;"	d
SH7780_PCIPINTM	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPINTM	/;"	d
SH7780_PCIPINTM	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPINTM	/;"	d
SH7780_PCIPMC	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPMC	/;"	d
SH7780_PCIPMC	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPMC	/;"	d
SH7780_PCIPMCSR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPMCSR	/;"	d
SH7780_PCIPMCSR	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPMCSR	/;"	d
SH7780_PCIPMCSRBSE	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIPMCSRBSE	/;"	d
SH7780_PCIPMCSRBSE	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIPMCSRBSE	/;"	d
SH7780_PCIRID	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIRID	/;"	d
SH7780_PCIRID	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIRID	/;"	d
SH7780_PCISID	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCISID	/;"	d
SH7780_PCISID	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCISID	/;"	d
SH7780_PCISTATUS	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCISTATUS	/;"	d
SH7780_PCISTATUS	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCISTATUS	/;"	d
SH7780_PCISUB	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCISUB	/;"	d
SH7780_PCISUB	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCISUB	/;"	d
SH7780_PCISVID	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCISVID	/;"	d
SH7780_PCISVID	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCISVID	/;"	d
SH7780_PCIVID	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCIVID	/;"	d
SH7780_PCIVID	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCIVID	/;"	d
SH7780_PCI_CDD	arch/sh/include/asm/cpu_sh7780.h	/^#define	SH7780_PCI_CDD	/;"	d
SH7780_PCI_CDD	arch/sh/include/asm/cpu_sh7785.h	/^#define	SH7780_PCI_CDD	/;"	d
SH7780_VENDOR_ID	drivers/pci/pci_sh7780.c	/^#define SH7780_VENDOR_ID	/;"	d	file:
SH7785LCR_FLASH_BANK_SIZE	include/configs/sh7785lcr.h	/^#define SH7785LCR_FLASH_BANK_SIZE	/;"	d
SH7785LCR_FLASH_BASE_1	include/configs/sh7785lcr.h	/^#define SH7785LCR_FLASH_BASE_1	/;"	d
SH7785LCR_SDRAM_BASE	include/configs/sh7785lcr.h	/^#define SH7785LCR_SDRAM_BASE	/;"	d
SH7785LCR_SDRAM_PHYS_BASE	include/configs/sh7785lcr.h	/^#define SH7785LCR_SDRAM_PHYS_BASE	/;"	d
SH7785LCR_SDRAM_SIZE	include/configs/sh7785lcr.h	/^#define SH7785LCR_SDRAM_SIZE	/;"	d
SH7785LCR_USB_BASE	include/configs/sh7785lcr.h	/^#define SH7785LCR_USB_BASE	/;"	d
SHA1	drivers/crypto/fsl/fsl_hash.c	/^	SHA1 = 0,$/;"	e	enum:caam_hash_algos	file:
SHA1	lib/Kconfig	/^config SHA1$/;"	c	menu:Library routines""Hashing Support
SHA1_DIGEST_SIZE	drivers/crypto/fsl/fsl_hash.c	/^#define SHA1_DIGEST_SIZE /;"	d	file:
SHA1_SUM_LEN	include/u-boot/sha1.h	/^#define SHA1_SUM_LEN	/;"	d
SHA1_SUM_POS	include/u-boot/sha1.h	/^#define SHA1_SUM_POS	/;"	d
SHA256	drivers/crypto/fsl/fsl_hash.c	/^	SHA256$/;"	e	enum:caam_hash_algos	file:
SHA256	lib/Kconfig	/^config SHA256$/;"	c	menu:Library routines""Hashing Support
SHA256Transform	fs/zfs/zfs_sha256.c	/^SHA256Transform(uint32_t *H, const uint8_t *cp)$/;"	f	typeref:typename:void	file:
SHA256_BITS	board/freescale/common/fsl_validate.c	/^#define SHA256_BITS	/;"	d	file:
SHA256_BLOCK_SIZE	drivers/mmc/rpmb.c	/^#define SHA256_BLOCK_SIZE	/;"	d	file:
SHA256_BYTES	board/freescale/common/fsl_validate.c	/^#define SHA256_BYTES	/;"	d	file:
SHA256_DIGEST_SIZE	drivers/crypto/fsl/fsl_hash.c	/^#define SHA256_DIGEST_SIZE /;"	d	file:
SHA256_K	fs/zfs/zfs_sha256.c	/^static const uint32_t SHA256_K[64] = {$/;"	v	typeref:typename:const uint32_t[64]	file:
SHA256_NIBBLES	board/freescale/common/fsl_validate.c	/^#define SHA256_NIBBLES	/;"	d	file:
SHA256_SUM_LEN	include/u-boot/sha256.h	/^#define SHA256_SUM_LEN	/;"	d
SHADOW_FREQ_CONFIG1_DLL_OVERRIDE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_DLL_OVERRIDE_MASK	/;"	d
SHADOW_FREQ_CONFIG1_DLL_OVERRIDE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_DLL_OVERRIDE_MASK	/;"	d
SHADOW_FREQ_CONFIG1_DLL_RESET_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_DLL_RESET_MASK	/;"	d
SHADOW_FREQ_CONFIG1_DLL_RESET_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_DLL_RESET_MASK	/;"	d
SHADOW_FREQ_CONFIG1_DPLL_EN_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_DPLL_EN_MASK	/;"	d
SHADOW_FREQ_CONFIG1_DPLL_EN_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_DPLL_EN_MASK	/;"	d
SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT	/;"	d
SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT	/;"	d
SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK	/;"	d
SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK	/;"	d
SHADOW_FREQ_CONFIG1_M2_DIV_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_M2_DIV_MASK	/;"	d
SHADOW_FREQ_CONFIG1_M2_DIV_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_M2_DIV_MASK	/;"	d
SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT	arch/arm/include/asm/arch-omap4/clock.h	/^#define SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT	/;"	d
SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT	arch/arm/include/asm/arch-omap5/clock.h	/^#define SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT	/;"	d
SHARED_RESOURCES	include/configs/bf533-stamp.h	/^#define SHARED_RESOURCES /;"	d
SHARED_RESOURCES	include/configs/blackstamp.h	/^#define SHARED_RESOURCES	/;"	d
SHARED_VLAN_LEARNING	drivers/net/vsc9953.c	/^	SHARED_VLAN_LEARNING,$/;"	e	enum:vlan_learning_mode	file:
SHARE_FSL_PIN_SIZE	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define SHARE_FSL_PIN_SIZE	/;"	d
SHARE_MUX_CONF_REG	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define SHARE_MUX_CONF_REG	/;"	d
SHARP_ID_28F008SC	include/flash.h	/^#define SHARP_ID_28F008SC /;"	d
SHARP_ID_28F016SCL	include/flash.h	/^#define SHARP_ID_28F016SCL /;"	d
SHARP_ID_28F016SCZ	include/flash.h	/^#define SHARP_ID_28F016SCZ /;"	d
SHA_HW_ACCEL	lib/Kconfig	/^config SHA_HW_ACCEL$/;"	c	menu:Library routines""Hashing Support
SHA_PROG_HW_ACCEL	lib/Kconfig	/^config SHA_PROG_HW_ACCEL$/;"	c	menu:Library routines""Hashing Support
SHC_EMMC	board/bosch/shc/Kconfig	/^config SHC_EMMC$/;"	c	choice:choice6f6e98480104
SHC_ICT	board/bosch/shc/Kconfig	/^config SHC_ICT$/;"	c	choice:choice6f6e98480104
SHC_NETBOOT	board/bosch/shc/Kconfig	/^config SHC_NETBOOT$/;"	c	choice:choice6f6e98480104
SHC_SDBOOT	board/bosch/shc/Kconfig	/^config SHC_SDBOOT$/;"	c	choice:choice6f6e98480104
SHDMA_SLAVE_INVALID	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_INVALID,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_MMCIF_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_MMCIF_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_MMCIF_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_MMCIF_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF0_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF0_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF0_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF0_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF1_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF1_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF1_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF1_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF2_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF2_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF2_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF2_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF3_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF3_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF3_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF3_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF4_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF4_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF4_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF4_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF5_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF5_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF5_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF5_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF6_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF6_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF6_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF6_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF7_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF7_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF7_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF7_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF8_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF8_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SCIF8_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SCIF8_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SDHI0_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SDHI0_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SDHI0_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SDHI0_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SDHI1_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SDHI1_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SDHI1_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SDHI1_TX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SDHI2_RX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SDHI2_RX,$/;"	e	enum:__anon8638ecc30203
SHDMA_SLAVE_SDHI2_TX	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^	SHDMA_SLAVE_SDHI2_TX,$/;"	e	enum:__anon8638ecc30203
SHEEVAPLUG_OE_HIGH	board/Marvell/sheevaplug/sheevaplug.h	/^#define SHEEVAPLUG_OE_HIGH	/;"	d
SHEEVAPLUG_OE_LOW	board/Marvell/sheevaplug/sheevaplug.h	/^#define SHEEVAPLUG_OE_LOW	/;"	d
SHEEVAPLUG_OE_VAL_HIGH	board/Marvell/sheevaplug/sheevaplug.h	/^#define SHEEVAPLUG_OE_VAL_HIGH	/;"	d
SHEEVAPLUG_OE_VAL_LOW	board/Marvell/sheevaplug/sheevaplug.h	/^#define SHEEVAPLUG_OE_VAL_LOW	/;"	d
SHETHER_NAME	drivers/net/sh_eth.h	/^#define SHETHER_NAME /;"	d
SHF_ALLOC	include/elf.h	/^#define SHF_ALLOC	/;"	d
SHF_EXECINSTR	include/elf.h	/^#define SHF_EXECINSTR	/;"	d
SHF_GROUP	include/elf.h	/^#define SHF_GROUP	/;"	d
SHF_INFO_LINK	include/elf.h	/^#define SHF_INFO_LINK	/;"	d
SHF_LINK_ORDER	include/elf.h	/^#define SHF_LINK_ORDER	/;"	d
SHF_MASKOS	include/elf.h	/^#define SHF_MASKOS	/;"	d
SHF_MASKPROC	include/elf.h	/^#define SHF_MASKPROC	/;"	d
SHF_MERGE	include/elf.h	/^#define SHF_MERGE	/;"	d
SHF_OS_NONCONFORMING	include/elf.h	/^#define SHF_OS_NONCONFORMING /;"	d
SHF_STRINGS	include/elf.h	/^#define SHF_STRINGS	/;"	d
SHF_TLS	include/elf.h	/^#define SHF_TLS	/;"	d
SHF_WRITE	include/elf.h	/^#define SHF_WRITE	/;"	d
SHIFT	arch/arc/lib/memcmp.S	/^#define SHIFT /;"	d	file:
SHIFT	include/i8042.h	/^#define SHIFT	/;"	d
SHIFTDR	include/lattice.h	/^#define SHIFTDR	/;"	d
SHIFTIR	include/lattice.h	/^#define SHIFTIR	/;"	d
SHIFTLEFT	include/lattice.h	/^#define SHIFTLEFT	/;"	d
SHIFTRIGHT	include/lattice.h	/^#define SHIFTRIGHT	/;"	d
SHIFT_CLK_DIVIDER_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define SHIFT_CLK_DIVIDER_MASK	/;"	d
SHIFT_CLK_DIVIDER_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define SHIFT_CLK_DIVIDER_SHIFT	/;"	d
SHKA_CR_END	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_END	/;"	d
SHKA_CR_IDMA	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_IDMA	/;"	d
SHKA_CR_IDMAL	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_IDMAL(/;"	d
SHKA_CR_IDMAL_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_IDMAL_MASK	/;"	d
SHKA_CR_ODMA	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_ODMA	/;"	d
SHKA_CR_ODMAL	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_ODMAL(/;"	d
SHKA_CR_ODMAL_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_CR_ODMAL_MASK	/;"	d
SHKA_ESE_DRL	arch/m68k/include/asm/coldfire/skha.h	/^#define SHKA_ESE_DRL	/;"	d
SHL	include/lattice.h	/^#define SHL	/;"	d
SHMIN_FLASH_BASE_1	include/configs/shmin.h	/^#define SHMIN_FLASH_BASE_1	/;"	d
SHMIN_SDRAM_BASE	include/configs/shmin.h	/^#define SHMIN_SDRAM_BASE	/;"	d
SHN_ABS	include/elf.h	/^#define SHN_ABS	/;"	d
SHN_COMMON	include/elf.h	/^#define SHN_COMMON	/;"	d
SHN_HIOS	include/elf.h	/^#define SHN_HIOS	/;"	d
SHN_HIPROC	include/elf.h	/^#define SHN_HIPROC	/;"	d
SHN_HIRESERVE	include/elf.h	/^#define SHN_HIRESERVE	/;"	d
SHN_LOOS	include/elf.h	/^#define SHN_LOOS	/;"	d
SHN_LOPROC	include/elf.h	/^#define SHN_LOPROC	/;"	d
SHN_LORESERVE	include/elf.h	/^#define SHN_LORESERVE	/;"	d
SHN_UNDEF	include/elf.h	/^#define SHN_UNDEF	/;"	d
SHN_XINDEX	include/elf.h	/^#define SHN_XINDEX	/;"	d
SHORTSWAP32	drivers/video/cfb_console.c	/^#define SHORTSWAP32(/;"	d	file:
SHOWNOTFOUND	scripts/docproc.c	/^#define SHOWNOTFOUND /;"	d	file:
SHOW_GNU_MAKE	tools/moveconfig.py	/^SHOW_GNU_MAKE = 'scripts\/show-gnu-make'$/;"	v
SHOW_INFO	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define SHOW_INFO$/;"	d	file:
SHR	include/lattice.h	/^#define SHR	/;"	d
SHR	lib/sha256.c	/^#define SHR(/;"	d	file:
SHRT_MAX	include/linux/kernel.h	/^#define SHRT_MAX	/;"	d
SHRT_MIN	include/linux/kernel.h	/^#define SHRT_MIN	/;"	d
SHT_DYNAMIC	include/elf.h	/^#define SHT_DYNAMIC	/;"	d
SHT_DYNSYM	include/elf.h	/^#define SHT_DYNSYM	/;"	d
SHT_FINI_ARRAY	include/elf.h	/^#define SHT_FINI_ARRAY	/;"	d
SHT_GROUP	include/elf.h	/^#define SHT_GROUP	/;"	d
SHT_HASH	include/elf.h	/^#define SHT_HASH	/;"	d
SHT_HIOS	include/elf.h	/^#define SHT_HIOS	/;"	d
SHT_HIPROC	include/elf.h	/^#define SHT_HIPROC	/;"	d
SHT_HIUSER	include/elf.h	/^#define SHT_HIUSER	/;"	d
SHT_INIT_ARRAY	include/elf.h	/^#define SHT_INIT_ARRAY	/;"	d
SHT_LOOS	include/elf.h	/^#define SHT_LOOS	/;"	d
SHT_LOPROC	include/elf.h	/^#define SHT_LOPROC	/;"	d
SHT_LOUSER	include/elf.h	/^#define SHT_LOUSER	/;"	d
SHT_NOBITS	include/elf.h	/^#define SHT_NOBITS	/;"	d
SHT_NOTE	include/elf.h	/^#define SHT_NOTE	/;"	d
SHT_NULL	include/elf.h	/^#define SHT_NULL	/;"	d
SHT_NUM	include/elf.h	/^#define SHT_NUM	/;"	d
SHT_PREINIT_ARRAY	include/elf.h	/^#define SHT_PREINIT_ARRAY /;"	d
SHT_PROGBITS	include/elf.h	/^#define SHT_PROGBITS	/;"	d
SHT_REL	include/elf.h	/^#define SHT_REL	/;"	d
SHT_RELA	include/elf.h	/^#define SHT_RELA	/;"	d
SHT_SHLIB	include/elf.h	/^#define SHT_SHLIB	/;"	d
SHT_STRTAB	include/elf.h	/^#define SHT_STRTAB	/;"	d
SHT_SYMTAB	include/elf.h	/^#define SHT_SYMTAB	/;"	d
SHT_SYMTAB_SHNDX	include/elf.h	/^#define SHT_SYMTAB_SHNDX /;"	d
SH_32BIT	arch/sh/Kconfig	/^config SH_32BIT$/;"	c	menu:SuperH architecture
SH_ETH_MAX_REGISTER_OFFSET	drivers/net/sh_eth.h	/^	SH_ETH_MAX_REGISTER_OFFSET,$/;"	e	enum:__anon5ef54f5a0103
SH_ETH_TYPE_ETHER	drivers/net/sh_eth.h	/^#define SH_ETH_TYPE_ETHER$/;"	d
SH_ETH_TYPE_GETHER	drivers/net/sh_eth.h	/^#define SH_ETH_TYPE_GETHER$/;"	d
SH_ETH_TYPE_RZ	drivers/net/sh_eth.h	/^#define SH_ETH_TYPE_RZ$/;"	d
SH_I2C_ICCR1_ICE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR1_ICE	/;"	d	file:
SH_I2C_ICCR1_MST	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR1_MST	/;"	d	file:
SH_I2C_ICCR1_MTRS	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR1_MTRS	/;"	d	file:
SH_I2C_ICCR1_RCVD	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR1_RCVD	/;"	d	file:
SH_I2C_ICCR1_TRS	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR1_TRS	/;"	d	file:
SH_I2C_ICCR2_BBSY	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR2_BBSY	/;"	d	file:
SH_I2C_ICCR2_IICRST	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR2_IICRST	/;"	d	file:
SH_I2C_ICCR2_SCLO	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR2_SCLO	/;"	d	file:
SH_I2C_ICCR2_SCP	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR2_SCP	/;"	d	file:
SH_I2C_ICCR2_SDAO	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR2_SDAO	/;"	d	file:
SH_I2C_ICCR2_SDAOP	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICCR2_SDAOP	/;"	d	file:
SH_I2C_ICCR_BUSY	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICCR_BUSY	/;"	d	file:
SH_I2C_ICCR_ICE	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICCR_ICE	/;"	d	file:
SH_I2C_ICCR_RACK	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICCR_RACK	/;"	d	file:
SH_I2C_ICCR_RTS	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICCR_RTS	/;"	d	file:
SH_I2C_ICCR_SCP	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICCR_SCP	/;"	d	file:
SH_I2C_ICIC_ICCHB8	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICIC_ICCHB8	/;"	d	file:
SH_I2C_ICIC_ICCLB8	drivers/i2c/sh_i2c.c	/^#define SH_I2C_ICIC_ICCLB8	/;"	d	file:
SH_I2C_ICIER_ACKBR	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_ACKBR	/;"	d	file:
SH_I2C_ICIER_ACKBT	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_ACKBT	/;"	d	file:
SH_I2C_ICIER_ACKE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_ACKE	/;"	d	file:
SH_I2C_ICIER_NAKIE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_NAKIE	/;"	d	file:
SH_I2C_ICIER_RIE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_RIE	/;"	d	file:
SH_I2C_ICIER_STIE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_STIE	/;"	d	file:
SH_I2C_ICIER_TEIE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_TEIE	/;"	d	file:
SH_I2C_ICIER_TIE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICIER_TIE	/;"	d	file:
SH_I2C_ICSR_AAS	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_AAS	/;"	d	file:
SH_I2C_ICSR_ADZ	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_ADZ	/;"	d	file:
SH_I2C_ICSR_ALOVE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_ALOVE	/;"	d	file:
SH_I2C_ICSR_NACKF	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_NACKF	/;"	d	file:
SH_I2C_ICSR_RDRF	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_RDRF	/;"	d	file:
SH_I2C_ICSR_STOP	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_STOP	/;"	d	file:
SH_I2C_ICSR_TDRE	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_TDRE	/;"	d	file:
SH_I2C_ICSR_TEND	drivers/i2c/sh_sh7734_i2c.c	/^#define SH_I2C_ICSR_TEND	/;"	d	file:
SH_IC_BUSY	drivers/i2c/sh_i2c.c	/^#define SH_IC_BUSY	/;"	d	file:
SH_IC_DTE	drivers/i2c/sh_i2c.c	/^#define SH_IC_DTE	/;"	d	file:
SH_IC_TACK	drivers/i2c/sh_i2c.c	/^#define SH_IC_TACK	/;"	d	file:
SH_IC_WAIT	drivers/i2c/sh_i2c.c	/^#define SH_IC_WAIT	/;"	d	file:
SH_QSPI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SH_QSPI_BASE	/;"	d
SH_SDHI	drivers/mmc/Kconfig	/^config SH_SDHI$/;"	c	menu:MMC Host controller Support
SH_SDHI_QUIRK_16BIT_BUF	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SH_SDHI_QUIRK_16BIT_BUF	/;"	d
SH_SPI_CPHA	drivers/spi/sh_spi.h	/^#define SH_SPI_CPHA	/;"	d
SH_SPI_CPOL	drivers/spi/sh_spi.h	/^#define SH_SPI_CPOL	/;"	d
SH_SPI_FIFO_SIZE	drivers/spi/sh_spi.h	/^#define SH_SPI_FIFO_SIZE	/;"	d
SH_SPI_L1M0	drivers/spi/sh_spi.h	/^#define SH_SPI_L1M0	/;"	d
SH_SPI_LOOPBK	drivers/spi/sh_spi.h	/^#define SH_SPI_LOOPBK	/;"	d
SH_SPI_MAX_BYTE	drivers/spi/sh_spi.h	/^#define SH_SPI_MAX_BYTE	/;"	d
SH_SPI_NUM_CS	drivers/spi/sh_spi.h	/^#define SH_SPI_NUM_CS	/;"	d
SH_SPI_PFONRD	drivers/spi/sh_spi.h	/^#define SH_SPI_PFONRD	/;"	d
SH_SPI_RBE	drivers/spi/sh_spi.h	/^#define SH_SPI_RBE	/;"	d
SH_SPI_RBEI	drivers/spi/sh_spi.h	/^#define SH_SPI_RBEI	/;"	d
SH_SPI_RBF	drivers/spi/sh_spi.h	/^#define SH_SPI_RBF	/;"	d
SH_SPI_RBFI	drivers/spi/sh_spi.h	/^#define SH_SPI_RBFI	/;"	d
SH_SPI_RSTF	drivers/spi/sh_spi.h	/^#define SH_SPI_RSTF	/;"	d
SH_SPI_SSA	drivers/spi/sh_spi.h	/^#define SH_SPI_SSA	/;"	d
SH_SPI_SSD	drivers/spi/sh_spi.h	/^#define SH_SPI_SSD	/;"	d
SH_SPI_SSDB	drivers/spi/sh_spi.h	/^#define SH_SPI_SSDB	/;"	d
SH_SPI_SSS0	drivers/spi/sh_spi.h	/^#define SH_SPI_SSS0	/;"	d
SH_SPI_SSS1	drivers/spi/sh_spi.h	/^#define SH_SPI_SSS1	/;"	d
SH_SPI_TBE	drivers/spi/sh_spi.h	/^#define SH_SPI_TBE	/;"	d
SH_SPI_TBEI	drivers/spi/sh_spi.h	/^#define SH_SPI_TBEI	/;"	d
SH_SPI_TBF	drivers/spi/sh_spi.h	/^#define SH_SPI_TBF	/;"	d
SH_SPI_TBFI	drivers/spi/sh_spi.h	/^#define SH_SPI_TBFI	/;"	d
SH_SPI_WPABRT	drivers/spi/sh_spi.h	/^#define SH_SPI_WPABRT	/;"	d
SI	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register SP, BP, SI, DI, IP;$/;"	m	struct:i386_special_regs	typeref:typename:i386_general_register
SIBNOR_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define SIBNOR_GPMC_CONFIG1	/;"	d
SIBNOR_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define SIBNOR_GPMC_CONFIG2	/;"	d
SIBNOR_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define SIBNOR_GPMC_CONFIG3	/;"	d
SIBNOR_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define SIBNOR_GPMC_CONFIG4	/;"	d
SIBNOR_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define SIBNOR_GPMC_CONFIG5	/;"	d
SIBNOR_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define SIBNOR_GPMC_CONFIG6	/;"	d
SICA_IAR0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR0 /;"	d
SICA_IAR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR1 /;"	d
SICA_IAR2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR2 /;"	d
SICA_IAR3	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR3 /;"	d
SICA_IAR4	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR4 /;"	d
SICA_IAR5	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR5 /;"	d
SICA_IAR6	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR6 /;"	d
SICA_IAR7	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IAR7 /;"	d
SICA_IMASK0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IMASK0 /;"	d
SICA_IMASK1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IMASK1 /;"	d
SICA_ISR0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_ISR0 /;"	d
SICA_ISR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_ISR1 /;"	d
SICA_IWR0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IWR0 /;"	d
SICA_IWR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_IWR1 /;"	d
SICA_RVECT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_RVECT /;"	d
SICA_SWRST	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_SWRST /;"	d
SICA_SYSCR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICA_SYSCR /;"	d
SICB_IAR0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR0 /;"	d
SICB_IAR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR1 /;"	d
SICB_IAR2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR2 /;"	d
SICB_IAR3	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR3 /;"	d
SICB_IAR4	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR4 /;"	d
SICB_IAR5	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR5 /;"	d
SICB_IAR6	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR6 /;"	d
SICB_IAR7	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IAR7 /;"	d
SICB_IMASK0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IMASK0 /;"	d
SICB_IMASK1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IMASK1 /;"	d
SICB_ISR0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_ISR0 /;"	d
SICB_ISR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_ISR1 /;"	d
SICB_IWR0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IWR0 /;"	d
SICB_IWR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_IWR1 /;"	d
SICB_RVECT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_RVECT /;"	d
SICB_SWRST	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_SWRST /;"	d
SICB_SYSCR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SICB_SYSCR /;"	d
SICDAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SICDAR	/;"	d
SICDAR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SICDAR0 /;"	d
SICDAR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SICDAR1 /;"	d
SICRH_DDR	include/mpc83xx.h	/^#define SICRH_DDR	/;"	d
SICRH_ESDHC_A_GPIO	include/mpc83xx.h	/^#define SICRH_ESDHC_A_GPIO	/;"	d
SICRH_ESDHC_A_GTM	include/mpc83xx.h	/^#define SICRH_ESDHC_A_GTM	/;"	d
SICRH_ESDHC_A_SD	include/mpc83xx.h	/^#define SICRH_ESDHC_A_SD	/;"	d
SICRH_ESDHC_B_GPIO	include/mpc83xx.h	/^#define SICRH_ESDHC_B_GPIO	/;"	d
SICRH_ESDHC_B_GTM	include/mpc83xx.h	/^#define SICRH_ESDHC_B_GTM	/;"	d
SICRH_ESDHC_B_SD	include/mpc83xx.h	/^#define SICRH_ESDHC_B_SD	/;"	d
SICRH_ESDHC_C_GPIO	include/mpc83xx.h	/^#define SICRH_ESDHC_C_GPIO	/;"	d
SICRH_ESDHC_C_GTM	include/mpc83xx.h	/^#define SICRH_ESDHC_C_GTM	/;"	d
SICRH_ESDHC_C_SD	include/mpc83xx.h	/^#define SICRH_ESDHC_C_SD	/;"	d
SICRH_ETSEC1_B	include/mpc83xx.h	/^#define SICRH_ETSEC1_B	/;"	d
SICRH_ETSEC1_C	include/mpc83xx.h	/^#define SICRH_ETSEC1_C	/;"	d
SICRH_ETSEC2_A	include/mpc83xx.h	/^#define SICRH_ETSEC2_A	/;"	d
SICRH_ETSEC2_B	include/mpc83xx.h	/^#define SICRH_ETSEC2_B	/;"	d
SICRH_ETSEC2_C	include/mpc83xx.h	/^#define SICRH_ETSEC2_C	/;"	d
SICRH_ETSEC2_CRS	include/mpc83xx.h	/^#define SICRH_ETSEC2_CRS	/;"	d
SICRH_ETSEC2_D	include/mpc83xx.h	/^#define SICRH_ETSEC2_D	/;"	d
SICRH_ETSEC2_E	include/mpc83xx.h	/^#define SICRH_ETSEC2_E	/;"	d
SICRH_ETSEC2_F	include/mpc83xx.h	/^#define SICRH_ETSEC2_F	/;"	d
SICRH_ETSEC2_G	include/mpc83xx.h	/^#define SICRH_ETSEC2_G	/;"	d
SICRH_ETSEC2_GPIO	include/mpc83xx.h	/^#define SICRH_ETSEC2_GPIO	/;"	d
SICRH_GPIO2_A	include/mpc83xx.h	/^#define SICRH_GPIO2_A	/;"	d
SICRH_GPIO2_B	include/mpc83xx.h	/^#define SICRH_GPIO2_B	/;"	d
SICRH_GPIO2_C	include/mpc83xx.h	/^#define SICRH_GPIO2_C	/;"	d
SICRH_GPIO2_D	include/mpc83xx.h	/^#define SICRH_GPIO2_D	/;"	d
SICRH_GPIO2_E	include/mpc83xx.h	/^#define SICRH_GPIO2_E	/;"	d
SICRH_GPIO2_E_SD	include/mpc83xx.h	/^#define SICRH_GPIO2_E_SD	/;"	d
SICRH_GPIO2_F	include/mpc83xx.h	/^#define SICRH_GPIO2_F	/;"	d
SICRH_GPIO2_G	include/mpc83xx.h	/^#define SICRH_GPIO2_G	/;"	d
SICRH_GPIO2_H	include/mpc83xx.h	/^#define SICRH_GPIO2_H	/;"	d
SICRH_GPIOSEL_0	include/mpc83xx.h	/^#define SICRH_GPIOSEL_0	/;"	d
SICRH_GPIOSEL_1	include/mpc83xx.h	/^#define SICRH_GPIOSEL_1	/;"	d
SICRH_GPIO_0	include/mpc83xx.h	/^#define SICRH_GPIO_0	/;"	d
SICRH_GPIO_1	include/mpc83xx.h	/^#define SICRH_GPIO_1	/;"	d
SICRH_GPIO_10	include/mpc83xx.h	/^#define SICRH_GPIO_10	/;"	d
SICRH_GPIO_11	include/mpc83xx.h	/^#define SICRH_GPIO_11	/;"	d
SICRH_GPIO_2	include/mpc83xx.h	/^#define SICRH_GPIO_2	/;"	d
SICRH_GPIO_3	include/mpc83xx.h	/^#define SICRH_GPIO_3	/;"	d
SICRH_GPIO_4	include/mpc83xx.h	/^#define SICRH_GPIO_4	/;"	d
SICRH_GPIO_5	include/mpc83xx.h	/^#define SICRH_GPIO_5	/;"	d
SICRH_GPIO_6	include/mpc83xx.h	/^#define SICRH_GPIO_6	/;"	d
SICRH_GPIO_7	include/mpc83xx.h	/^#define SICRH_GPIO_7	/;"	d
SICRH_GPIO_8	include/mpc83xx.h	/^#define SICRH_GPIO_8	/;"	d
SICRH_GPIO_9	include/mpc83xx.h	/^#define SICRH_GPIO_9	/;"	d
SICRH_GPIO_A_GPIO	include/mpc83xx.h	/^#define SICRH_GPIO_A_GPIO	/;"	d
SICRH_GPIO_A_TSEC2	include/mpc83xx.h	/^#define SICRH_GPIO_A_TSEC2	/;"	d
SICRH_GPIO_B_GPIO	include/mpc83xx.h	/^#define SICRH_GPIO_B_GPIO	/;"	d
SICRH_GPIO_B_TSEC2_GTX_CLK125	include/mpc83xx.h	/^#define SICRH_GPIO_B_TSEC2_GTX_CLK125	/;"	d
SICRH_GPIO_B_TSEC2_TX_CLK	include/mpc83xx.h	/^#define SICRH_GPIO_B_TSEC2_TX_CLK	/;"	d
SICRH_GTM_GPIO	include/mpc83xx.h	/^#define SICRH_GTM_GPIO	/;"	d
SICRH_GTM_GTM	include/mpc83xx.h	/^#define SICRH_GTM_GTM	/;"	d
SICRH_GTX1_DLY	include/mpc83xx.h	/^#define SICRH_GTX1_DLY	/;"	d
SICRH_GTX2_DLY	include/mpc83xx.h	/^#define SICRH_GTX2_DLY	/;"	d
SICRH_IEEE1588_A_GPIO	include/mpc83xx.h	/^#define SICRH_IEEE1588_A_GPIO	/;"	d
SICRH_IEEE1588_A_TMR	include/mpc83xx.h	/^#define SICRH_IEEE1588_A_TMR	/;"	d
SICRH_IEEE1588_B_GPIO	include/mpc83xx.h	/^#define SICRH_IEEE1588_B_GPIO	/;"	d
SICRH_IEEE1588_B_TMR	include/mpc83xx.h	/^#define SICRH_IEEE1588_B_TMR	/;"	d
SICRH_IIC	include/mpc83xx.h	/^#define SICRH_IIC	/;"	d
SICRH_INTR_A	include/mpc83xx.h	/^#define SICRH_INTR_A	/;"	d
SICRH_INTR_B	include/mpc83xx.h	/^#define SICRH_INTR_B	/;"	d
SICRH_IRQ3	include/mpc83xx.h	/^#define SICRH_IRQ3	/;"	d
SICRH_SDDROE	include/mpc83xx.h	/^#define SICRH_SDDROE	/;"	d
SICRH_SECONDARY_DDR	include/mpc83xx.h	/^#define SICRH_SECONDARY_DDR	/;"	d
SICRH_SPI	include/mpc83xx.h	/^#define SICRH_SPI	/;"	d
SICRH_SPI_SD	include/mpc83xx.h	/^#define SICRH_SPI_SD	/;"	d
SICRH_TMR	include/mpc83xx.h	/^#define SICRH_TMR	/;"	d
SICRH_TMROBI_V2P5	include/mpc83xx.h	/^#define SICRH_TMROBI_V2P5	/;"	d
SICRH_TMROBI_V3P3	include/mpc83xx.h	/^#define SICRH_TMROBI_V3P3	/;"	d
SICRH_TSEC1_A	include/mpc83xx.h	/^#define SICRH_TSEC1_A	/;"	d
SICRH_TSEC1_B	include/mpc83xx.h	/^#define SICRH_TSEC1_B	/;"	d
SICRH_TSEC1_C	include/mpc83xx.h	/^#define SICRH_TSEC1_C	/;"	d
SICRH_TSEC1_D	include/mpc83xx.h	/^#define SICRH_TSEC1_D	/;"	d
SICRH_TSEC1_E	include/mpc83xx.h	/^#define SICRH_TSEC1_E	/;"	d
SICRH_TSEC1_F	include/mpc83xx.h	/^#define SICRH_TSEC1_F	/;"	d
SICRH_TSEC2_A	include/mpc83xx.h	/^#define SICRH_TSEC2_A	/;"	d
SICRH_TSEC2_B	include/mpc83xx.h	/^#define SICRH_TSEC2_B	/;"	d
SICRH_TSEC2_C	include/mpc83xx.h	/^#define SICRH_TSEC2_C	/;"	d
SICRH_TSEC2_D	include/mpc83xx.h	/^#define SICRH_TSEC2_D	/;"	d
SICRH_TSEC2_E	include/mpc83xx.h	/^#define SICRH_TSEC2_E	/;"	d
SICRH_TSEC2_F	include/mpc83xx.h	/^#define SICRH_TSEC2_F	/;"	d
SICRH_TSEC2_G	include/mpc83xx.h	/^#define SICRH_TSEC2_G	/;"	d
SICRH_TSEC2_H	include/mpc83xx.h	/^#define SICRH_TSEC2_H	/;"	d
SICRH_TSOBI1	include/mpc83xx.h	/^#define SICRH_TSOBI1	/;"	d
SICRH_TSOBI1_V2P5	include/mpc83xx.h	/^#define SICRH_TSOBI1_V2P5	/;"	d
SICRH_TSOBI1_V3P3	include/mpc83xx.h	/^#define SICRH_TSOBI1_V3P3	/;"	d
SICRH_TSOBI2	include/mpc83xx.h	/^#define SICRH_TSOBI2	/;"	d
SICRH_TSOBI2_V2P5	include/mpc83xx.h	/^#define SICRH_TSOBI2_V2P5	/;"	d
SICRH_TSOBI2_V3P3	include/mpc83xx.h	/^#define SICRH_TSOBI2_V3P3	/;"	d
SICRH_UC1EOBI	include/mpc83xx.h	/^#define SICRH_UC1EOBI	/;"	d
SICRH_UC2E1OBI	include/mpc83xx.h	/^#define SICRH_UC2E1OBI	/;"	d
SICRH_UC2E2OBI	include/mpc83xx.h	/^#define SICRH_UC2E2OBI	/;"	d
SICRH_USB	include/mpc83xx.h	/^#define SICRH_USB	/;"	d
SICRL_DMA_A	include/mpc83xx.h	/^#define SICRL_DMA_A	/;"	d
SICRL_DMA_B	include/mpc83xx.h	/^#define SICRL_DMA_B	/;"	d
SICRL_DMA_C	include/mpc83xx.h	/^#define SICRL_DMA_C	/;"	d
SICRL_DMA_CH0	include/mpc83xx.h	/^#define SICRL_DMA_CH0	/;"	d
SICRL_DMA_D	include/mpc83xx.h	/^#define SICRL_DMA_D	/;"	d
SICRL_DMA_E	include/mpc83xx.h	/^#define SICRL_DMA_E	/;"	d
SICRL_DMA_F	include/mpc83xx.h	/^#define SICRL_DMA_F	/;"	d
SICRL_DMA_G	include/mpc83xx.h	/^#define SICRL_DMA_G	/;"	d
SICRL_DMA_H	include/mpc83xx.h	/^#define SICRL_DMA_H	/;"	d
SICRL_DMA_I	include/mpc83xx.h	/^#define SICRL_DMA_I	/;"	d
SICRL_DMA_J	include/mpc83xx.h	/^#define SICRL_DMA_J	/;"	d
SICRL_DMA_SPI	include/mpc83xx.h	/^#define SICRL_DMA_SPI	/;"	d
SICRL_ELBC_A	include/mpc83xx.h	/^#define SICRL_ELBC_A	/;"	d
SICRL_ETSEC1_A	include/mpc83xx.h	/^#define SICRL_ETSEC1_A	/;"	d
SICRL_ETSEC1_B	include/mpc83xx.h	/^#define SICRL_ETSEC1_B	/;"	d
SICRL_ETSEC1_C	include/mpc83xx.h	/^#define SICRL_ETSEC1_C	/;"	d
SICRL_ETSEC1_GTX_CLK125	include/mpc83xx.h	/^#define SICRL_ETSEC1_GTX_CLK125	/;"	d
SICRL_ETSEC1_TX_CLK	include/mpc83xx.h	/^#define SICRL_ETSEC1_TX_CLK	/;"	d
SICRL_ETSEC2_A	include/mpc83xx.h	/^#define SICRL_ETSEC2_A	/;"	d
SICRL_GPIO1_A	include/mpc83xx.h	/^#define SICRL_GPIO1_A	/;"	d
SICRL_GPIO1_B	include/mpc83xx.h	/^#define SICRL_GPIO1_B	/;"	d
SICRL_GPIO1_C	include/mpc83xx.h	/^#define SICRL_GPIO1_C	/;"	d
SICRL_GPIO1_D	include/mpc83xx.h	/^#define SICRL_GPIO1_D	/;"	d
SICRL_GPIO1_E	include/mpc83xx.h	/^#define SICRL_GPIO1_E	/;"	d
SICRL_GPIO1_F	include/mpc83xx.h	/^#define SICRL_GPIO1_F	/;"	d
SICRL_GPIO1_G	include/mpc83xx.h	/^#define SICRL_GPIO1_G	/;"	d
SICRL_GPIO1_H	include/mpc83xx.h	/^#define SICRL_GPIO1_H	/;"	d
SICRL_GPIO1_I	include/mpc83xx.h	/^#define SICRL_GPIO1_I	/;"	d
SICRL_GPIO1_J	include/mpc83xx.h	/^#define SICRL_GPIO1_J	/;"	d
SICRL_GPIO1_K	include/mpc83xx.h	/^#define SICRL_GPIO1_K	/;"	d
SICRL_GPIO1_L	include/mpc83xx.h	/^#define SICRL_GPIO1_L	/;"	d
SICRL_GPIO_A	include/mpc83xx.h	/^#define SICRL_GPIO_A	/;"	d
SICRL_GPIO_B	include/mpc83xx.h	/^#define SICRL_GPIO_B	/;"	d
SICRL_GPIO_C	include/mpc83xx.h	/^#define SICRL_GPIO_C	/;"	d
SICRL_GPIO_D	include/mpc83xx.h	/^#define SICRL_GPIO_D	/;"	d
SICRL_GPIO_E	include/mpc83xx.h	/^#define SICRL_GPIO_E	/;"	d
SICRL_GPIO_F	include/mpc83xx.h	/^#define SICRL_GPIO_F	/;"	d
SICRL_GPIO_G	include/mpc83xx.h	/^#define SICRL_GPIO_G	/;"	d
SICRL_GPIO_H	include/mpc83xx.h	/^#define SICRL_GPIO_H	/;"	d
SICRL_GPIO_I	include/mpc83xx.h	/^#define SICRL_GPIO_I	/;"	d
SICRL_GPIO_J	include/mpc83xx.h	/^#define SICRL_GPIO_J	/;"	d
SICRL_GPIO_K	include/mpc83xx.h	/^#define SICRL_GPIO_K	/;"	d
SICRL_GPIO_L	include/mpc83xx.h	/^#define SICRL_GPIO_L	/;"	d
SICRL_I2C2_PF0	include/mpc83xx.h	/^#define SICRL_I2C2_PF0	/;"	d
SICRL_I2C2_PF1	include/mpc83xx.h	/^#define SICRL_I2C2_PF1	/;"	d
SICRL_IIC1	include/mpc83xx.h	/^#define SICRL_IIC1	/;"	d
SICRL_IRQ4	include/mpc83xx.h	/^#define SICRL_IRQ4	/;"	d
SICRL_IRQ5	include/mpc83xx.h	/^#define SICRL_IRQ5	/;"	d
SICRL_IRQ6_7	include/mpc83xx.h	/^#define SICRL_IRQ6_7	/;"	d
SICRL_IRQ_CKS	include/mpc83xx.h	/^#define SICRL_IRQ_CKS	/;"	d
SICRL_IRQ_CKSTP_A	include/mpc83xx.h	/^#define SICRL_IRQ_CKSTP_A	/;"	d
SICRL_IRQ_CTPR	include/mpc83xx.h	/^#define SICRL_IRQ_CTPR	/;"	d
SICRL_IRQ_PF0	include/mpc83xx.h	/^#define SICRL_IRQ_PF0	/;"	d
SICRL_IRQ_PF1	include/mpc83xx.h	/^#define SICRL_IRQ_PF1	/;"	d
SICRL_LBC	include/mpc83xx.h	/^#define SICRL_LBC	/;"	d
SICRL_LCLK_1	include/mpc83xx.h	/^#define SICRL_LCLK_1	/;"	d
SICRL_LCLK_2	include/mpc83xx.h	/^#define SICRL_LCLK_2	/;"	d
SICRL_LDP_A	include/mpc83xx.h	/^#define SICRL_LDP_A	/;"	d
SICRL_LDP_B	include/mpc83xx.h	/^#define SICRL_LDP_B	/;"	d
SICRL_LDP_LCS_A	include/mpc83xx.h	/^#define SICRL_LDP_LCS_A	/;"	d
SICRL_PCI_A	include/mpc83xx.h	/^#define SICRL_PCI_A	/;"	d
SICRL_PCI_MSRC	include/mpc83xx.h	/^#define SICRL_PCI_MSRC	/;"	d
SICRL_SPI_A	include/mpc83xx.h	/^#define SICRL_SPI_A	/;"	d
SICRL_SPI_B	include/mpc83xx.h	/^#define SICRL_SPI_B	/;"	d
SICRL_SPI_C	include/mpc83xx.h	/^#define SICRL_SPI_C	/;"	d
SICRL_SPI_D	include/mpc83xx.h	/^#define SICRL_SPI_D	/;"	d
SICRL_SPI_PF0	include/mpc83xx.h	/^#define SICRL_SPI_PF0	/;"	d
SICRL_SPI_PF1	include/mpc83xx.h	/^#define SICRL_SPI_PF1	/;"	d
SICRL_SPI_PF3	include/mpc83xx.h	/^#define SICRL_SPI_PF3	/;"	d
SICRL_SRCID_A	include/mpc83xx.h	/^#define SICRL_SRCID_A	/;"	d
SICRL_TDM	include/mpc83xx.h	/^#define SICRL_TDM	/;"	d
SICRL_TDM_SHARED	include/mpc83xx.h	/^#define SICRL_TDM_SHARED	/;"	d
SICRL_TSEXPOBI	include/mpc83xx.h	/^#define SICRL_TSEXPOBI	/;"	d
SICRL_UART	include/mpc83xx.h	/^#define SICRL_UART	/;"	d
SICRL_UART_PF0	include/mpc83xx.h	/^#define SICRL_UART_PF0	/;"	d
SICRL_UART_PF1	include/mpc83xx.h	/^#define SICRL_UART_PF1	/;"	d
SICRL_UART_PF3	include/mpc83xx.h	/^#define SICRL_UART_PF3	/;"	d
SICRL_URT_CTPR	include/mpc83xx.h	/^#define SICRL_URT_CTPR	/;"	d
SICRL_USB0	include/mpc83xx.h	/^#define SICRL_USB0	/;"	d
SICRL_USB1	include/mpc83xx.h	/^#define SICRL_USB1	/;"	d
SICRL_USBDR_00	include/mpc83xx.h	/^#define SICRL_USBDR_00	/;"	d
SICRL_USBDR_01	include/mpc83xx.h	/^#define SICRL_USBDR_01	/;"	d
SICRL_USBDR_10	include/mpc83xx.h	/^#define SICRL_USBDR_10	/;"	d
SICRL_USBDR_11	include/mpc83xx.h	/^#define SICRL_USBDR_11	/;"	d
SICRL_USB_A	include/mpc83xx.h	/^#define SICRL_USB_A	/;"	d
SICRL_USB_B	include/mpc83xx.h	/^#define SICRL_USB_B	/;"	d
SICRL_USB_B_SD	include/mpc83xx.h	/^#define SICRL_USB_B_SD	/;"	d
SICR_1_FEC1_FEC1	include/mpc83xx.h	/^#define SICR_1_FEC1_FEC1	/;"	d
SICR_1_FEC1_GPIO	include/mpc83xx.h	/^#define SICR_1_FEC1_GPIO	/;"	d
SICR_1_FEC1_GTM	include/mpc83xx.h	/^#define SICR_1_FEC1_GTM	/;"	d
SICR_1_FEC2_FEC2	include/mpc83xx.h	/^#define SICR_1_FEC2_FEC2	/;"	d
SICR_1_FEC2_GPIO	include/mpc83xx.h	/^#define SICR_1_FEC2_GPIO	/;"	d
SICR_1_FEC2_GTM	include/mpc83xx.h	/^#define SICR_1_FEC2_GTM	/;"	d
SICR_1_GPIO_A_DDR	include/mpc83xx.h	/^#define SICR_1_GPIO_A_DDR	/;"	d
SICR_1_GPIO_A_GPIO	include/mpc83xx.h	/^#define SICR_1_GPIO_A_GPIO	/;"	d
SICR_1_GPIO_A_SD	include/mpc83xx.h	/^#define SICR_1_GPIO_A_SD	/;"	d
SICR_1_GPIO_B_GPIO	include/mpc83xx.h	/^#define SICR_1_GPIO_B_GPIO	/;"	d
SICR_1_GPIO_B_QE	include/mpc83xx.h	/^#define SICR_1_GPIO_B_QE	/;"	d
SICR_1_GPIO_B_SD	include/mpc83xx.h	/^#define SICR_1_GPIO_B_SD	/;"	d
SICR_1_GPIO_C_CAN	include/mpc83xx.h	/^#define SICR_1_GPIO_C_CAN	/;"	d
SICR_1_GPIO_C_DDR	include/mpc83xx.h	/^#define SICR_1_GPIO_C_DDR	/;"	d
SICR_1_GPIO_C_GPIO	include/mpc83xx.h	/^#define SICR_1_GPIO_C_GPIO	/;"	d
SICR_1_GPIO_C_LCS	include/mpc83xx.h	/^#define SICR_1_GPIO_C_LCS	/;"	d
SICR_1_GPIO_D_CAN	include/mpc83xx.h	/^#define SICR_1_GPIO_D_CAN	/;"	d
SICR_1_GPIO_D_DDR	include/mpc83xx.h	/^#define SICR_1_GPIO_D_DDR	/;"	d
SICR_1_GPIO_D_GPIO	include/mpc83xx.h	/^#define SICR_1_GPIO_D_GPIO	/;"	d
SICR_1_GPIO_D_LCS	include/mpc83xx.h	/^#define SICR_1_GPIO_D_LCS	/;"	d
SICR_1_GPIO_E_CAN	include/mpc83xx.h	/^#define SICR_1_GPIO_E_CAN	/;"	d
SICR_1_GPIO_E_DDR	include/mpc83xx.h	/^#define SICR_1_GPIO_E_DDR	/;"	d
SICR_1_GPIO_E_GPIO	include/mpc83xx.h	/^#define SICR_1_GPIO_E_GPIO	/;"	d
SICR_1_GPIO_E_LCS	include/mpc83xx.h	/^#define SICR_1_GPIO_E_LCS	/;"	d
SICR_1_GPIO_F_CAN	include/mpc83xx.h	/^#define SICR_1_GPIO_F_CAN	/;"	d
SICR_1_GPIO_F_CK	include/mpc83xx.h	/^#define SICR_1_GPIO_F_CK	/;"	d
SICR_1_GPIO_F_GPIO	include/mpc83xx.h	/^#define SICR_1_GPIO_F_GPIO	/;"	d
SICR_1_I2C_CKSTOP	include/mpc83xx.h	/^#define SICR_1_I2C_CKSTOP	/;"	d
SICR_1_I2C_I2C	include/mpc83xx.h	/^#define SICR_1_I2C_I2C	/;"	d
SICR_1_IRQ_A_IRQ	include/mpc83xx.h	/^#define SICR_1_IRQ_A_IRQ	/;"	d
SICR_1_IRQ_A_MCP	include/mpc83xx.h	/^#define SICR_1_IRQ_A_MCP	/;"	d
SICR_1_IRQ_B_CKSTOP	include/mpc83xx.h	/^#define SICR_1_IRQ_B_CKSTOP	/;"	d
SICR_1_IRQ_B_IRQ	include/mpc83xx.h	/^#define SICR_1_IRQ_B_IRQ	/;"	d
SICR_1_UART1_UART1RTS	include/mpc83xx.h	/^#define SICR_1_UART1_UART1RTS	/;"	d
SICR_1_UART1_UART1S	include/mpc83xx.h	/^#define SICR_1_UART1_UART1S	/;"	d
SICR_1_USB_A_UART2S	include/mpc83xx.h	/^#define SICR_1_USB_A_UART2S	/;"	d
SICR_1_USB_A_USBDR	include/mpc83xx.h	/^#define SICR_1_USB_A_USBDR	/;"	d
SICR_1_USB_B_UART2RTS	include/mpc83xx.h	/^#define SICR_1_USB_B_UART2RTS	/;"	d
SICR_1_USB_B_UART2S	include/mpc83xx.h	/^#define SICR_1_USB_B_UART2S	/;"	d
SICR_1_USB_B_USBDR	include/mpc83xx.h	/^#define SICR_1_USB_B_USBDR	/;"	d
SICR_1_USB_C_QE_EXT	include/mpc83xx.h	/^#define SICR_1_USB_C_QE_EXT	/;"	d
SICR_1_USB_C_USBDR	include/mpc83xx.h	/^#define SICR_1_USB_C_USBDR	/;"	d
SICR_2_ELBC_A_LA	include/mpc83xx.h	/^#define SICR_2_ELBC_A_LA	/;"	d
SICR_2_ELBC_B_LCLK	include/mpc83xx.h	/^#define SICR_2_ELBC_B_LCLK	/;"	d
SICR_2_FEC3_FEC3	include/mpc83xx.h	/^#define SICR_2_FEC3_FEC3	/;"	d
SICR_2_FEC3_GPIO	include/mpc83xx.h	/^#define SICR_2_FEC3_GPIO	/;"	d
SICR_2_FEC3_TMR	include/mpc83xx.h	/^#define SICR_2_FEC3_TMR	/;"	d
SICR_2_HDLC1_A_GPIO	include/mpc83xx.h	/^#define SICR_2_HDLC1_A_GPIO	/;"	d
SICR_2_HDLC1_A_HDLC1	include/mpc83xx.h	/^#define SICR_2_HDLC1_A_HDLC1	/;"	d
SICR_2_HDLC1_A_TDM1	include/mpc83xx.h	/^#define SICR_2_HDLC1_A_TDM1	/;"	d
SICR_2_HDLC1_B_GPIO	include/mpc83xx.h	/^#define SICR_2_HDLC1_B_GPIO	/;"	d
SICR_2_HDLC1_B_HDLC1	include/mpc83xx.h	/^#define SICR_2_HDLC1_B_HDLC1	/;"	d
SICR_2_HDLC1_B_QE_BRG	include/mpc83xx.h	/^#define SICR_2_HDLC1_B_QE_BRG	/;"	d
SICR_2_HDLC1_B_TDM1	include/mpc83xx.h	/^#define SICR_2_HDLC1_B_TDM1	/;"	d
SICR_2_HDLC1_C_GPIO	include/mpc83xx.h	/^#define SICR_2_HDLC1_C_GPIO	/;"	d
SICR_2_HDLC1_C_HDLC1	include/mpc83xx.h	/^#define SICR_2_HDLC1_C_HDLC1	/;"	d
SICR_2_HDLC1_C_TDM1	include/mpc83xx.h	/^#define SICR_2_HDLC1_C_TDM1	/;"	d
SICR_2_HDLC2_A_GPIO	include/mpc83xx.h	/^#define SICR_2_HDLC2_A_GPIO	/;"	d
SICR_2_HDLC2_A_HDLC2	include/mpc83xx.h	/^#define SICR_2_HDLC2_A_HDLC2	/;"	d
SICR_2_HDLC2_A_TDM2	include/mpc83xx.h	/^#define SICR_2_HDLC2_A_TDM2	/;"	d
SICR_2_HDLC2_B_GPIO	include/mpc83xx.h	/^#define SICR_2_HDLC2_B_GPIO	/;"	d
SICR_2_HDLC2_B_HDLC2	include/mpc83xx.h	/^#define SICR_2_HDLC2_B_HDLC2	/;"	d
SICR_2_HDLC2_B_QE_BRG	include/mpc83xx.h	/^#define SICR_2_HDLC2_B_QE_BRG	/;"	d
SICR_2_HDLC2_B_TDM2	include/mpc83xx.h	/^#define SICR_2_HDLC2_B_TDM2	/;"	d
SICR_2_HDLC2_C_GPIO	include/mpc83xx.h	/^#define SICR_2_HDLC2_C_GPIO	/;"	d
SICR_2_HDLC2_C_HDLC2	include/mpc83xx.h	/^#define SICR_2_HDLC2_C_HDLC2	/;"	d
SICR_2_HDLC2_C_QE_BRG	include/mpc83xx.h	/^#define SICR_2_HDLC2_C_QE_BRG	/;"	d
SICR_2_HDLC2_C_TDM2	include/mpc83xx.h	/^#define SICR_2_HDLC2_C_TDM2	/;"	d
SICR_2_PCI_CPCI_HS	include/mpc83xx.h	/^#define SICR_2_PCI_CPCI_HS	/;"	d
SICR_2_PCI_PCI	include/mpc83xx.h	/^#define SICR_2_PCI_PCI	/;"	d
SICR_2_QUIESCE_B	include/mpc83xx.h	/^#define SICR_2_QUIESCE_B	/;"	d
SICR_2_USB_D_GPIO	include/mpc83xx.h	/^#define SICR_2_USB_D_GPIO	/;"	d
SICR_2_USB_D_QE_BRG	include/mpc83xx.h	/^#define SICR_2_USB_D_QE_BRG	/;"	d
SICR_2_USB_D_USBDR	include/mpc83xx.h	/^#define SICR_2_USB_D_USBDR	/;"	d
SICR_ENET_CLKRT	include/commproc.h	/^#define SICR_ENET_CLKRT	/;"	d
SICR_ENET_MASK	include/commproc.h	/^#define SICR_ENET_MASK	/;"	d
SICR_RCLK_SCC1_BRG1	include/commproc.h	/^#define SICR_RCLK_SCC1_BRG1	/;"	d
SICR_RCLK_SCC2_BRG2	include/commproc.h	/^#define SICR_RCLK_SCC2_BRG2	/;"	d
SICR_RCLK_SCC3_BRG3	include/commproc.h	/^#define SICR_RCLK_SCC3_BRG3	/;"	d
SICR_RCLK_SCC4_BRG4	include/commproc.h	/^#define SICR_RCLK_SCC4_BRG4	/;"	d
SICR_TCLK_SCC1_BRG1	include/commproc.h	/^#define SICR_TCLK_SCC1_BRG1	/;"	d
SICR_TCLK_SCC2_BRG2	include/commproc.h	/^#define SICR_TCLK_SCC2_BRG2	/;"	d
SICR_TCLK_SCC3_BRG3	include/commproc.h	/^#define SICR_TCLK_SCC3_BRG3	/;"	d
SICR_TCLK_SCC4_BRG4	include/commproc.h	/^#define SICR_TCLK_SCC4_BRG4	/;"	d
SICTR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SICTR	/;"	d
SICTR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SICTR0 /;"	d
SICTR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SICTR1 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR0 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR1 /;"	d
SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR10 /;"	d
SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR10 /;"	d
SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR10 /;"	d
SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR10 /;"	d
SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR10 /;"	d
SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR11 /;"	d
SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR11 /;"	d
SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR11 /;"	d
SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR11 /;"	d
SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR11 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR2 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR3 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR4 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR5 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR6 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR7 /;"	d
SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR8 /;"	d
SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR8 /;"	d
SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR8 /;"	d
SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR8 /;"	d
SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR8 /;"	d
SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IAR9 /;"	d
SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IAR9 /;"	d
SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IAR9 /;"	d
SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IAR9 /;"	d
SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IAR9 /;"	d
SIC_IMASK	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_IMASK /;"	d
SIC_IMASK	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_IMASK /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IMASK0 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IMASK1 /;"	d
SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IMASK2 /;"	d
SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IMASK2 /;"	d
SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IMASK2 /;"	d
SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IMASK2 /;"	d
SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IMASK2 /;"	d
SIC_ISR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_ISR /;"	d
SIC_ISR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_ISR /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_ISR0 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_ISR1 /;"	d
SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_ISR2 /;"	d
SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_ISR2 /;"	d
SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_ISR2 /;"	d
SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_ISR2 /;"	d
SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_ISR2 /;"	d
SIC_IWR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_IWR /;"	d
SIC_IWR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_IWR /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IWR0 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IWR1 /;"	d
SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SIC_IWR2 /;"	d
SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SIC_IWR2 /;"	d
SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SIC_IWR2 /;"	d
SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SIC_IWR2 /;"	d
SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SIC_IWR2 /;"	d
SIC_RVECT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SIC_RVECT /;"	d
SIC_RVECT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SIC_RVECT /;"	d
SIC_RVECT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SIC_RVECT /;"	d
SIC_RVECT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SIC_RVECT /;"	d
SIC_RVECT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SIC_RVECT /;"	d
SIDL	include/sym53c8xx.h	/^#define SIDL	/;"	d
SIDLEMODE	drivers/usb/musb-new/omap2430.h	/^#	define	SIDLEMODE	/;"	d
SIDR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SIDR /;"	d
SID_REG	include/ns87308.h	/^#define SID_REG /;"	d
SIE	arch/powerpc/include/asm/xilinx_irq.h	/^#define SIE	/;"	d
SIEN	include/sym53c8xx.h	/^#define SIEN	/;"	d
SIE_TEST_MODE_NONE	arch/sandbox/include/asm/test.h	/^	SIE_TEST_MODE_NONE,$/;"	e	enum:sandbox_i2c_eeprom_test_mode
SIE_TEST_MODE_SINGLE_BYTE	arch/sandbox/include/asm/test.h	/^	SIE_TEST_MODE_SINGLE_BYTE,$/;"	e	enum:sandbox_i2c_eeprom_test_mode
SIFCTR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SIFCTR	/;"	d
SIFCTR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIFCTR0 /;"	d
SIFCTR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIFCTR1 /;"	d
SIGABRT	arch/powerpc/include/asm/signal.h	/^#define SIGABRT	/;"	d
SIGABRT	include/asm-generic/signal.h	/^#define SIGABRT	/;"	d
SIGALRM	arch/powerpc/include/asm/signal.h	/^#define SIGALRM	/;"	d
SIGALRM	include/asm-generic/signal.h	/^#define SIGALRM	/;"	d
SIGBUS	arch/powerpc/include/asm/signal.h	/^#define SIGBUS	/;"	d
SIGBUS	include/asm-generic/signal.h	/^#define SIGBUS	/;"	d
SIGCHLD	arch/powerpc/include/asm/signal.h	/^#define SIGCHLD	/;"	d
SIGCHLD	include/asm-generic/signal.h	/^#define SIGCHLD	/;"	d
SIGCONT	arch/powerpc/include/asm/signal.h	/^#define SIGCONT	/;"	d
SIGCONT	include/asm-generic/signal.h	/^#define SIGCONT	/;"	d
SIGFPE	arch/powerpc/include/asm/signal.h	/^#define SIGFPE	/;"	d
SIGFPE	include/asm-generic/signal.h	/^#define SIGFPE	/;"	d
SIGHUP	arch/powerpc/include/asm/signal.h	/^#define SIGHUP	/;"	d
SIGHUP	include/asm-generic/signal.h	/^#define SIGHUP	/;"	d
SIGILL	arch/powerpc/include/asm/signal.h	/^#define SIGILL	/;"	d
SIGILL	include/asm-generic/signal.h	/^#define SIGILL	/;"	d
SIGINT	arch/powerpc/include/asm/signal.h	/^#define SIGINT	/;"	d
SIGINT	include/asm-generic/signal.h	/^#define SIGINT	/;"	d
SIGIO	arch/powerpc/include/asm/signal.h	/^#define SIGIO	/;"	d
SIGIO	include/asm-generic/signal.h	/^#define SIGIO	/;"	d
SIGIOT	arch/powerpc/include/asm/signal.h	/^#define SIGIOT	/;"	d
SIGIOT	include/asm-generic/signal.h	/^#define SIGIOT	/;"	d
SIGKILL	arch/powerpc/include/asm/signal.h	/^#define SIGKILL	/;"	d
SIGKILL	include/asm-generic/signal.h	/^#define SIGKILL	/;"	d
SIGMA0	fs/zfs/zfs_sha256.c	/^#define	SIGMA0(/;"	d	file:
SIGMA1	fs/zfs/zfs_sha256.c	/^#define	SIGMA1(/;"	d	file:
SIGN	drivers/usb/host/r8a66597.h	/^#define	SIGN	/;"	d
SIGN	lib/vsprintf.c	/^#define SIGN	/;"	d	file:
SIGNATURE	board/samsung/arndale/arndale_spl.c	/^#define SIGNATURE	/;"	d	file:
SIGNATURE	board/samsung/smdk5250/smdk5250_spl.c	/^#define SIGNATURE	/;"	d	file:
SIGNATURE	board/samsung/smdk5420/smdk5420_spl.c	/^#define SIGNATURE	/;"	d	file:
SIGNATURE_16	arch/x86/include/asm/fsp/fsp_types.h	/^#define SIGNATURE_16(/;"	d
SIGNATURE_32	arch/x86/include/asm/fsp/fsp_types.h	/^#define SIGNATURE_32(/;"	d
SIGNATURE_64	arch/x86/include/asm/fsp/fsp_types.h	/^#define SIGNATURE_64(/;"	d
SIGNE	drivers/usb/host/r8a66597.h	/^#define	SIGNE	/;"	d
SIGNLEN	include/fat.h	/^#define SIGNLEN	/;"	d
SIGN_EXT	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define SIGN_EXT /;"	d
SIGP	include/sym53c8xx.h	/^  #define   SIGP /;"	d
SIGPENDING	include/ppc_defs.h	/^#define	SIGPENDING	/;"	d
SIGPIPE	arch/powerpc/include/asm/signal.h	/^#define SIGPIPE	/;"	d
SIGPIPE	include/asm-generic/signal.h	/^#define SIGPIPE	/;"	d
SIGPOLL	arch/powerpc/include/asm/signal.h	/^#define SIGPOLL	/;"	d
SIGPOLL	include/asm-generic/signal.h	/^#define SIGPOLL	/;"	d
SIGPROF	arch/powerpc/include/asm/signal.h	/^#define SIGPROF	/;"	d
SIGPROF	include/asm-generic/signal.h	/^#define SIGPROF	/;"	d
SIGPWR	arch/powerpc/include/asm/signal.h	/^#define SIGPWR	/;"	d
SIGPWR	include/asm-generic/signal.h	/^#define SIGPWR	/;"	d
SIGQUIT	arch/powerpc/include/asm/signal.h	/^#define SIGQUIT	/;"	d
SIGQUIT	include/asm-generic/signal.h	/^#define SIGQUIT	/;"	d
SIGRTMAX	arch/powerpc/include/asm/signal.h	/^#define SIGRTMAX	/;"	d
SIGRTMAX	include/asm-generic/signal.h	/^#define SIGRTMAX	/;"	d
SIGRTMIN	arch/powerpc/include/asm/signal.h	/^#define SIGRTMIN	/;"	d
SIGRTMIN	include/asm-generic/signal.h	/^#define SIGRTMIN	/;"	d
SIGSEGV	arch/powerpc/include/asm/signal.h	/^#define SIGSEGV	/;"	d
SIGSEGV	include/asm-generic/signal.h	/^#define SIGSEGV	/;"	d
SIGSTKFLT	arch/powerpc/include/asm/signal.h	/^#define SIGSTKFLT	/;"	d
SIGSTKFLT	include/asm-generic/signal.h	/^#define SIGSTKFLT	/;"	d
SIGSTKSZ	arch/powerpc/include/asm/signal.h	/^#define SIGSTKSZ	/;"	d
SIGSTKSZ	include/asm-generic/signal.h	/^#define SIGSTKSZ	/;"	d
SIGSTOP	arch/powerpc/include/asm/signal.h	/^#define SIGSTOP	/;"	d
SIGSTOP	include/asm-generic/signal.h	/^#define SIGSTOP	/;"	d
SIGSYS	arch/powerpc/include/asm/signal.h	/^#define SIGSYS	/;"	d
SIGSYS	include/asm-generic/signal.h	/^#define SIGSYS	/;"	d
SIGTERM	arch/powerpc/include/asm/signal.h	/^#define SIGTERM	/;"	d
SIGTERM	include/asm-generic/signal.h	/^#define SIGTERM	/;"	d
SIGTRAP	arch/powerpc/include/asm/signal.h	/^#define SIGTRAP	/;"	d
SIGTRAP	include/asm-generic/signal.h	/^#define SIGTRAP	/;"	d
SIGTSTP	arch/powerpc/include/asm/signal.h	/^#define SIGTSTP	/;"	d
SIGTSTP	include/asm-generic/signal.h	/^#define SIGTSTP	/;"	d
SIGTTIN	arch/powerpc/include/asm/signal.h	/^#define SIGTTIN	/;"	d
SIGTTIN	include/asm-generic/signal.h	/^#define SIGTTIN	/;"	d
SIGTTOU	arch/powerpc/include/asm/signal.h	/^#define SIGTTOU	/;"	d
SIGTTOU	include/asm-generic/signal.h	/^#define SIGTTOU	/;"	d
SIGUNUSED	arch/powerpc/include/asm/signal.h	/^#define	SIGUNUSED	/;"	d
SIGUNUSED	include/asm-generic/signal.h	/^#define	SIGUNUSED	/;"	d
SIGURG	arch/powerpc/include/asm/signal.h	/^#define SIGURG	/;"	d
SIGURG	include/asm-generic/signal.h	/^#define SIGURG	/;"	d
SIGUSR1	arch/powerpc/include/asm/signal.h	/^#define SIGUSR1	/;"	d
SIGUSR1	include/asm-generic/signal.h	/^#define SIGUSR1	/;"	d
SIGUSR2	arch/powerpc/include/asm/signal.h	/^#define SIGUSR2	/;"	d
SIGUSR2	include/asm-generic/signal.h	/^#define SIGUSR2	/;"	d
SIGVTALRM	arch/powerpc/include/asm/signal.h	/^#define SIGVTALRM	/;"	d
SIGVTALRM	include/asm-generic/signal.h	/^#define SIGVTALRM	/;"	d
SIGWINCH	arch/powerpc/include/asm/signal.h	/^#define SIGWINCH	/;"	d
SIGWINCH	include/asm-generic/signal.h	/^#define SIGWINCH	/;"	d
SIGXCPU	arch/powerpc/include/asm/signal.h	/^#define SIGXCPU	/;"	d
SIGXCPU	include/asm-generic/signal.h	/^#define SIGXCPU	/;"	d
SIGXFSZ	arch/powerpc/include/asm/signal.h	/^#define SIGXFSZ	/;"	d
SIGXFSZ	include/asm-generic/signal.h	/^#define SIGXFSZ	/;"	d
SIG_BLOCK	arch/powerpc/include/asm/signal.h	/^#define SIG_BLOCK /;"	d
SIG_DFL	arch/powerpc/include/asm/signal.h	/^#define SIG_DFL	/;"	d
SIG_ERR	arch/powerpc/include/asm/signal.h	/^#define SIG_ERR	/;"	d
SIG_IGN	arch/powerpc/include/asm/signal.h	/^#define SIG_IGN	/;"	d
SIG_MODE_PRI_DRIVELOW	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SIG_MODE_PRI_DRIVELOW	/;"	d
SIG_MODE_PRI_NORMAL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SIG_MODE_PRI_NORMAL	/;"	d
SIG_MODE_PRI_TRISTATE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SIG_MODE_PRI_TRISTATE	/;"	d
SIG_MODE_SEC_DRIVELOW	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SIG_MODE_SEC_DRIVELOW	/;"	d
SIG_MODE_SEC_NORMAL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SIG_MODE_SEC_NORMAL	/;"	d
SIG_MODE_SEC_TRISTATE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SIG_MODE_SEC_TRISTATE	/;"	d
SIG_SETMASK	arch/powerpc/include/asm/signal.h	/^#define SIG_SETMASK /;"	d
SIG_UNBLOCK	arch/powerpc/include/asm/signal.h	/^#define SIG_UNBLOCK /;"	d
SIIER	arch/sh/include/asm/cpu_sh7780.h	/^#define	SIIER	/;"	d
SIIER0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIIER0 /;"	d
SIIER1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIIER1 /;"	d
SIL1178_MASTER_I2C_ADDRESS	board/gdsys/common/osd.c	/^#define SIL1178_MASTER_I2C_ADDRESS /;"	d	file:
SIL1178_SLAVE_I2C_ADDRESS	board/gdsys/common/osd.c	/^#define SIL1178_SLAVE_I2C_ADDRESS /;"	d	file:
SIL3114_DEVICE_ID	drivers/block/sata_sil3114.h	/^#define SIL3114_DEVICE_ID	/;"	d
SILENT_CALLBACK	include/env_callback.h	/^#define SILENT_CALLBACK /;"	d
SILENT_CALLBACK	include/env_callback.h	/^#define SILENT_CALLBACK$/;"	d
SILENT_CONSOLE	common/Kconfig	/^config SILENT_CONSOLE$/;"	c	menu:Console
SILENT_CONSOLE_UPDATE_ON_RELOC	common/Kconfig	/^config SILENT_CONSOLE_UPDATE_ON_RELOC$/;"	c	menu:Console
SILENT_CONSOLE_UPDATE_ON_SET	common/Kconfig	/^config SILENT_CONSOLE_UPDATE_ON_SET$/;"	c	menu:Console
SILENT_U_BOOT_ONLY	common/Kconfig	/^config SILENT_U_BOOT_ONLY$/;"	c	menu:Console
SIL_VEND_ID	drivers/block/sata_sil3114.h	/^#define SIL_VEND_ID	/;"	d
SIM0_CLK_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_CLK_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_CLK_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_CLK_C_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_CLK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_CLK_D_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SIM0_D_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_D_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_D_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_D_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SIM0_D_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_D_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_D_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_D_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_D_C_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_D_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_D_D_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SIM0_RST_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_RST_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_RST_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_RST_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SIM0_RST_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_RST_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_RST_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_RST_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_RST_C_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_RST_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SIM0_RST_D_MARK,$/;"	e	enum:__anona307945e0103	file:
SIM0_RST_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SIM0_RST_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SIM1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	SIM1_CLK_ROOT = 112,$/;"	e	enum:clk_root_index
SIM1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
SIM1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
SIM1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SIM1_IPS_BASE_ADDR /;"	d
SIM2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	SIM2_CLK_ROOT = 113,$/;"	e	enum:clk_root_index
SIM2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
SIM2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SIM2_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
SIM2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SIM2_IPS_BASE_ADDR /;"	d
SIMCARD_MUX_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	SIMCARD_MUX_MASK	= 1,$/;"	e	enum:__anonbeb2b9771303
SIMCARD_MUX_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	SIMCARD_MUX_SHIFT	= 6,$/;"	e	enum:__anonbeb2b9771303
SIMCARD_MUX_USE_A	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	SIMCARD_MUX_USE_A	= 1,$/;"	e	enum:__anonbeb2b9771303
SIMCARD_MUX_USE_B	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	SIMCARD_MUX_USE_B	= 0,$/;"	e	enum:__anonbeb2b9771303
SIMDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SIMDR	/;"	d
SIMDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIMDR0 /;"	d
SIMDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIMDR1 /;"	d
SIMPLE_BUS	drivers/core/Kconfig	/^config SIMPLE_BUS$/;"	c	menu:Generic Driver Options
SIMPLE_PLLE	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SIMPLE_PLLE	/;"	d
SIMPLE_PLLX	arch/arm/mach-tegra/cpu.h	/^#define SIMPLE_PLLX /;"	d
SIMPLE_PLLX	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SIMPLE_PLLX	/;"	d
SIMPLE_PRODUCT_NUM	drivers/usb/gadget/ether.c	/^#define	SIMPLE_PRODUCT_NUM	/;"	d	file:
SIMPLE_VENDOR_NUM	drivers/usb/gadget/ether.c	/^#define	SIMPLE_VENDOR_NUM	/;"	d	file:
SIM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SIM_BASE_ADDR	/;"	d
SIM_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SIM_RST_MARK,	SIM_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SIM_CLK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SIM_CLK_MARK, PORT30_VIO_CKOR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SIM_D_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SIM_D_MARK, PORT31_IROUT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SIM_D_PORT199_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SIM_D_PORT199_MARK,$/;"	e	enum:__anona304c1340103	file:
SIM_D_PORT22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SIM_D_PORT22_MARK, \/* SIM_D  Port 22\/199 *\/$/;"	e	enum:__anona304c1340103	file:
SIM_MPARK	arch/m68k/include/asm/m5253.h	/^#define SIM_MPARK	/;"	d
SIM_RSR	arch/m68k/include/asm/m5253.h	/^#define SIM_RSR	/;"	d
SIM_RSR_HRST	arch/m68k/include/asm/m5253.h	/^#define SIM_RSR_HRST	/;"	d
SIM_RSR_SWTR	arch/m68k/include/asm/m5253.h	/^#define SIM_RSR_SWTR	/;"	d
SIM_RST_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	SIM_RST_MARK,	SIM_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
SIM_RST_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SIM_RST_MARK, PORT29_TPU1TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
SIM_SCBRR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCBRR /;"	d
SIM_SCDMAEN	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCDMAEN /;"	d
SIM_SCGRD	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCGRD /;"	d
SIM_SCRDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCRDR /;"	d
SIM_SCSC2R	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCSC2R /;"	d
SIM_SCSCMR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCSCMR /;"	d
SIM_SCSCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCSCR /;"	d
SIM_SCSMPL	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCSMPL /;"	d
SIM_SCSMR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCSMR /;"	d
SIM_SCSSR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCSSR /;"	d
SIM_SCTDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCTDR /;"	d
SIM_SCWAIT	arch/sh/include/asm/cpu_sh7722.h	/^#define SIM_SCWAIT /;"	d
SIM_SWIVR	arch/m68k/include/asm/m5253.h	/^#define SIM_SWIVR	/;"	d
SIM_SWSR	arch/m68k/include/asm/m5253.h	/^#define SIM_SWSR	/;"	d
SIM_SYPCR	arch/m68k/include/asm/m5253.h	/^#define SIM_SYPCR	/;"	d
SINGLE_PCTL	arch/x86/include/asm/msr-index.h	/^#define SINGLE_PCTL	/;"	d
SINGLE_STEP	drivers/bios_emulator/include/x86emu/debug.h	/^# define SINGLE_STEP(/;"	d
SINGLE_VIEW	scripts/kconfig/gconf.c	/^	SINGLE_VIEW, SPLIT_VIEW, FULL_VIEW$/;"	e	enum:__anon51b0ba2a0103	file:
SINIT	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SINIT	/;"	d
SINK_LOST	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SINK_LOST	/;"	d
SIO1007_GPIO_NUM	include/smsc_sio1007.h	/^#define SIO1007_GPIO_NUM	/;"	d
SIO1007_IOPORT0	include/smsc_sio1007.h	/^#define SIO1007_IOPORT0	/;"	d
SIO1007_IOPORT1	include/smsc_sio1007.h	/^#define SIO1007_IOPORT1	/;"	d
SIO1007_IOPORT2	include/smsc_sio1007.h	/^#define SIO1007_IOPORT2	/;"	d
SIO1007_IOPORT3	include/smsc_sio1007.h	/^#define SIO1007_IOPORT3	/;"	d
SIO1007_RUNTIME_IOPORT	board/intel/cougarcanyon2/cougarcanyon2.c	/^#define SIO1007_RUNTIME_IOPORT	/;"	d	file:
SIO1007_UART_NUM	include/smsc_sio1007.h	/^#define SIO1007_UART_NUM	/;"	d
SIO1_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define SIO1_DEV	/;"	d
SIO2_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define SIO2_DEV	/;"	d
SIOCONF_ACTIVATE	board/imgtec/malta/superio.c	/^	SIOCONF_ACTIVATE	= 0x30,$/;"	e	enum:sio_conf_key	file:
SIOCONF_BASE_HIGH	board/imgtec/malta/superio.c	/^	SIOCONF_BASE_HIGH	= 0x60,$/;"	e	enum:sio_conf_key	file:
SIOCONF_BASE_LOW	board/imgtec/malta/superio.c	/^	SIOCONF_BASE_LOW	= 0x61,$/;"	e	enum:sio_conf_key	file:
SIOCONF_DEVNUM	board/imgtec/malta/superio.c	/^	SIOCONF_DEVNUM		= 0x07,$/;"	e	enum:sio_conf_key	file:
SIOCONF_ENTER_SETUP	board/imgtec/malta/superio.c	/^	SIOCONF_ENTER_SETUP	= 0x55,$/;"	e	enum:sio_conf_key	file:
SIOCONF_EXIT_SETUP	board/imgtec/malta/superio.c	/^	SIOCONF_EXIT_SETUP	= 0xaa,$/;"	e	enum:sio_conf_key	file:
SIOCONF_MODE	board/imgtec/malta/superio.c	/^	SIOCONF_MODE		= 0xf0,$/;"	e	enum:sio_conf_key	file:
SIOCONF_PRIMARY_INT	board/imgtec/malta/superio.c	/^	SIOCONF_PRIMARY_INT	= 0x70,$/;"	e	enum:sio_conf_key	file:
SIOCTR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOCTR /;"	d
SIOIER	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOIER /;"	d
SIOMDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOMDR /;"	d
SIORDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIORDR /;"	d
SIOSCR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOSCR /;"	d
SIOSTBCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOSTBCR0 /;"	d
SIOSTBCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOSTBCR1 /;"	d
SIOSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOSTR /;"	d
SIOTDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SIOTDR /;"	d
SIO_CFG_PORT	board/mpl/common/isa.h	/^#define SIO_CFG_PORT	/;"	d
SIO_CONFIG_RA	arch/powerpc/include/asm/io.h	/^#define SIO_CONFIG_RA /;"	d
SIO_CONFIG_RD	arch/powerpc/include/asm/io.h	/^#define SIO_CONFIG_RD /;"	d
SIO_CONF_PORT	board/imgtec/malta/superio.c	/^#define SIO_CONF_PORT	/;"	d	file:
SIO_DATA_PORT	board/imgtec/malta/superio.c	/^#define SIO_DATA_PORT	/;"	d	file:
SIO_LOGDEV_TABLE	board/mpl/common/isa.h	/^} SIO_LOGDEV_TABLE;$/;"	t	typeref:struct:__anonabff7a9f0108
SIO_TABLE	board/mpl/common/isa.h	/^} SIO_TABLE;$/;"	t	typeref:struct:__anonabff7a9f0208
SIP	include/sym53c8xx.h	/^  #define   SIP /;"	d
SIPIX_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SIPIX_BASE_ADDR /;"	d
SIPI_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SIPI_BASE_ADDR	/;"	d
SIR	include/lattice.h	/^#define SIR	/;"	d
SIR	include/sym53c8xx.h	/^  #define   SIR /;"	d
SIRCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SIRCR	/;"	d
SIRCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIRCR0 /;"	d
SIRCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIRCR1 /;"	d
SIRDAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SIRDAR	/;"	d
SIRDAR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIRDAR0 /;"	d
SIRDAR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIRDAR1 /;"	d
SIRDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SIRDR0 /;"	d
SIRDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SIRDR1 /;"	d
SIR_BIST_CTRL	drivers/block/sata_mv.c	/^#define SIR_BIST_CTRL	/;"	d	file:
SIR_BIST_DW1	drivers/block/sata_mv.c	/^#define SIR_BIST_DW1	/;"	d	file:
SIR_BIST_DW2	drivers/block/sata_mv.c	/^#define SIR_BIST_DW2	/;"	d	file:
SIR_CFG_GEN2EN	drivers/block/sata_mv.c	/^#define SIR_CFG_GEN2EN	/;"	d	file:
SIR_CMD_OUT_ILL_PH	include/sym53c8xx.h	/^#define SIR_CMD_OUT_ILL_PH /;"	d
SIR_COMPLETE	include/sym53c8xx.h	/^#define SIR_COMPLETE	/;"	d
SIR_DATA	include/lattice.h	/^#define SIR_DATA	/;"	d
SIR_DATA_IN_ERR	include/sym53c8xx.h	/^#define SIR_DATA_IN_ERR /;"	d
SIR_DATA_OUT_ERR	include/sym53c8xx.h	/^#define SIR_DATA_OUT_ERR	/;"	d
SIR_FIS_CFG	drivers/block/sata_mv.c	/^#define SIR_FIS_CFG	/;"	d	file:
SIR_FIS_DWORD0	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD0	/;"	d	file:
SIR_FIS_DWORD1	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD1	/;"	d	file:
SIR_FIS_DWORD2	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD2	/;"	d	file:
SIR_FIS_DWORD3	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD3	/;"	d	file:
SIR_FIS_DWORD4	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD4	/;"	d	file:
SIR_FIS_DWORD5	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD5	/;"	d	file:
SIR_FIS_DWORD6	drivers/block/sata_mv.c	/^#define SIR_FIS_DWORD6	/;"	d	file:
SIR_FIS_IRQ_CAUSE	drivers/block/sata_mv.c	/^#define SIR_FIS_IRQ_CAUSE	/;"	d	file:
SIR_FIS_IRQ_MASK	drivers/block/sata_mv.c	/^#define SIR_FIS_IRQ_MASK	/;"	d	file:
SIR_ICFG	drivers/block/sata_mv.c	/^#define SIR_ICFG	/;"	d	file:
SIR_LTMODE	drivers/block/sata_mv.c	/^#define SIR_LTMODE	/;"	d	file:
SIR_LTMODE_NELBE	drivers/block/sata_mv.c	/^#define SIR_LTMODE_NELBE	/;"	d	file:
SIR_MSG_OUT_NO_CMD	include/sym53c8xx.h	/^#define SIR_MSG_OUT_NO_CMD	/;"	d
SIR_MSG_OVER7	include/sym53c8xx.h	/^#define SIR_MSG_OVER7	/;"	d
SIR_MSG_RECEIVED	include/sym53c8xx.h	/^#define SIR_MSG_RECEIVED	/;"	d
SIR_PHYCTL	drivers/block/sata_mv.c	/^#define SIR_PHYCTL	/;"	d	file:
SIR_PHYM10	drivers/block/sata_mv.c	/^#define SIR_PHYM10	/;"	d	file:
SIR_PHYM12	drivers/block/sata_mv.c	/^#define SIR_PHYM12	/;"	d	file:
SIR_PHYM9_GEN1	drivers/block/sata_mv.c	/^#define SIR_PHYM9_GEN1	/;"	d	file:
SIR_PHYM9_GEN2	drivers/block/sata_mv.c	/^#define SIR_PHYM9_GEN2	/;"	d	file:
SIR_PHYMODE1	drivers/block/sata_mv.c	/^#define SIR_PHYMODE1	/;"	d	file:
SIR_PHYMODE2	drivers/block/sata_mv.c	/^#define SIR_PHYMODE2	/;"	d	file:
SIR_PHYMODE3	drivers/block/sata_mv.c	/^#define SIR_PHYMODE3	/;"	d	file:
SIR_PHYMODE4	drivers/block/sata_mv.c	/^#define SIR_PHYMODE4	/;"	d	file:
SIR_PHY_CFG	drivers/block/sata_mv.c	/^#define SIR_PHY_CFG	/;"	d	file:
SIR_PLL_CFG	drivers/block/sata_mv.c	/^#define SIR_PLL_CFG	/;"	d	file:
SIR_SATA_IFCTRL	drivers/block/sata_mv.c	/^#define SIR_SATA_IFCTRL	/;"	d	file:
SIR_SATA_IFSTATUS	drivers/block/sata_mv.c	/^#define SIR_SATA_IFSTATUS	/;"	d	file:
SIR_SATA_TESTCTRL	drivers/block/sata_mv.c	/^#define SIR_SATA_TESTCTRL	/;"	d	file:
SIR_SCONTROL	drivers/block/sata_mv.c	/^#define SIR_SCONTROL	/;"	d	file:
SIR_SCONTROL_DETEN	drivers/block/sata_mv.c	/^#define SIR_SCONTROL_DETEN	/;"	d	file:
SIR_SCRIPT_ERROR	include/sym53c8xx.h	/^#define SIR_SCRIPT_ERROR	/;"	d
SIR_SEL_ATN_NO_MSG_OUT	include/sym53c8xx.h	/^#define SIR_SEL_ATN_NO_MSG_OUT /;"	d
SIR_SERROR	drivers/block/sata_mv.c	/^#define SIR_SERROR	/;"	d	file:
SIR_SERR_IRQ_MASK	drivers/block/sata_mv.c	/^#define SIR_SERR_IRQ_MASK	/;"	d	file:
SIR_SSTATUS	drivers/block/sata_mv.c	/^#define SIR_SSTATUS	/;"	d	file:
SIR_STATUS_ILL_PH	include/sym53c8xx.h	/^#define SIR_STATUS_ILL_PH	/;"	d
SIR_VEND_UNIQ	drivers/block/sata_mv.c	/^#define SIR_VEND_UNIQ	/;"	d	file:
SISCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SISCR	/;"	d
SISCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SISCR0 /;"	d
SISCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SISCR1 /;"	d
SIST	include/sym53c8xx.h	/^#define SIST	/;"	d
SISTR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SISTR	/;"	d
SISTR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SISTR0 /;"	d
SISTR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SISTR1 /;"	d
SITCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SITCR	/;"	d
SITCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SITCR0 /;"	d
SITCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SITCR1 /;"	d
SITDAR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SITDAR	/;"	d
SITDAR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SITDAR0 /;"	d
SITDAR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SITDAR1 /;"	d
SITDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SITDR0 /;"	d
SITDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SITDR1 /;"	d
SIUL2_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SIUL2_BASE_ADDR	/;"	d
SIUL2_DIRER0	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_DIRER0	/;"	d
SIUL2_DIRSR0	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_DIRSR0	/;"	d
SIUL2_DISR0	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_DISR0	/;"	d
SIUL2_GPDI_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_GPDI_BASE	/;"	d
SIUL2_GPDIn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_GPDIn(/;"	d
SIUL2_GPDO_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_GPDO_BASE	/;"	d
SIUL2_GPDOn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_GPDOn(/;"	d
SIUL2_IFCPR	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IFCPR	/;"	d
SIUL2_IFEER0	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IFEER0	/;"	d
SIUL2_IFER0	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IFER0	/;"	d
SIUL2_IFMCR_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IFMCR_BASE	/;"	d
SIUL2_IFMCRn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IFMCRn(/;"	d
SIUL2_IMCR_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IMCR_BASE	/;"	d
SIUL2_IMCRn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IMCRn(/;"	d
SIUL2_IREER0	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_IREER0	/;"	d
SIUL2_MIDR1	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MIDR1	/;"	d
SIUL2_MIDR2	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MIDR2	/;"	d
SIUL2_MPGPDO_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MPGPDO_BASE	/;"	d
SIUL2_MPGPDOn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MPGPDOn(/;"	d
SIUL2_MSCR_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_BASE	/;"	d
SIUL2_MSCR_CRPOINT_TRIM	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_CRPOINT_TRIM(/;"	d
SIUL2_MSCR_CRPOINT_TRIM_1	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_CRPOINT_TRIM_1	/;"	d
SIUL2_MSCR_DCYCLE_TRIM	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DCYCLE_TRIM(/;"	d
SIUL2_MSCR_DCYCLE_TRIM_LEFT	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DCYCLE_TRIM_LEFT	/;"	d
SIUL2_MSCR_DCYCLE_TRIM_NONE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DCYCLE_TRIM_NONE	/;"	d
SIUL2_MSCR_DCYCLE_TRIM_RIGHT	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DCYCLE_TRIM_RIGHT	/;"	d
SIUL2_MSCR_DDR_DO_TRIM	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_DO_TRIM(/;"	d
SIUL2_MSCR_DDR_DO_TRIM_100PS	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_DO_TRIM_100PS	/;"	d
SIUL2_MSCR_DDR_DO_TRIM_150PS	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_DO_TRIM_150PS	/;"	d
SIUL2_MSCR_DDR_DO_TRIM_50PS	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_DO_TRIM_50PS	/;"	d
SIUL2_MSCR_DDR_DO_TRIM_MIN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_DO_TRIM_MIN	/;"	d
SIUL2_MSCR_DDR_INPUT	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_INPUT(/;"	d
SIUL2_MSCR_DDR_INPUT_CMOS	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_INPUT_CMOS	/;"	d
SIUL2_MSCR_DDR_INPUT_DIFF_DDR	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_INPUT_DIFF_DDR	/;"	d
SIUL2_MSCR_DDR_ODT	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT(/;"	d
SIUL2_MSCR_DDR_ODT_120ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_120ohm	/;"	d
SIUL2_MSCR_DDR_ODT_17ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_17ohm	/;"	d
SIUL2_MSCR_DDR_ODT_20ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_20ohm	/;"	d
SIUL2_MSCR_DDR_ODT_24ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_24ohm	/;"	d
SIUL2_MSCR_DDR_ODT_30ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_30ohm	/;"	d
SIUL2_MSCR_DDR_ODT_40ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_40ohm	/;"	d
SIUL2_MSCR_DDR_ODT_60ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_ODT_60ohm	/;"	d
SIUL2_MSCR_DDR_SEL	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_SEL(/;"	d
SIUL2_MSCR_DDR_SEL_DDR3	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_SEL_DDR3	/;"	d
SIUL2_MSCR_DDR_SEL_LPDDR2	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DDR_SEL_LPDDR2	/;"	d
SIUL2_MSCR_DSE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE(/;"	d
SIUL2_MSCR_DSE_120ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_120ohm	/;"	d
SIUL2_MSCR_DSE_240ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_240ohm	/;"	d
SIUL2_MSCR_DSE_34ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_34ohm	/;"	d
SIUL2_MSCR_DSE_40ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_40ohm	/;"	d
SIUL2_MSCR_DSE_48ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_48ohm	/;"	d
SIUL2_MSCR_DSE_60ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_60ohm	/;"	d
SIUL2_MSCR_DSE_80ohm	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_DSE_80ohm	/;"	d
SIUL2_MSCR_HYS	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_HYS(/;"	d
SIUL2_MSCR_HYS_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_HYS_EN	/;"	d
SIUL2_MSCR_IBE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_IBE(/;"	d
SIUL2_MSCR_IBE_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_IBE_EN	/;"	d
SIUL2_MSCR_INV	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_INV(/;"	d
SIUL2_MSCR_INV_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_INV_EN	/;"	d
SIUL2_MSCR_MUX_MODE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_MUX_MODE(/;"	d
SIUL2_MSCR_MUX_MODE_ALT1	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_MUX_MODE_ALT1	/;"	d
SIUL2_MSCR_MUX_MODE_ALT2	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_MUX_MODE_ALT2	/;"	d
SIUL2_MSCR_MUX_MODE_ALT3	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_MUX_MODE_ALT3	/;"	d
SIUL2_MSCR_OBE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_OBE(/;"	d
SIUL2_MSCR_OBE_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_OBE_EN	/;"	d
SIUL2_MSCR_ODE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_ODE(/;"	d
SIUL2_MSCR_ODE_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_ODE_EN	/;"	d
SIUL2_MSCR_PKE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PKE(/;"	d
SIUL2_MSCR_PKE_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PKE_EN	/;"	d
SIUL2_MSCR_PUE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUE(/;"	d
SIUL2_MSCR_PUE_EN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUE_EN	/;"	d
SIUL2_MSCR_PUS	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUS(/;"	d
SIUL2_MSCR_PUS_100K_DOWN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUS_100K_DOWN	/;"	d
SIUL2_MSCR_PUS_100K_UP	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUS_100K_UP	/;"	d
SIUL2_MSCR_PUS_33K_UP	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUS_33K_UP	/;"	d
SIUL2_MSCR_PUS_50K_DOWN	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_PUS_50K_DOWN	/;"	d
SIUL2_MSCR_SMC	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_SMC(/;"	d
SIUL2_MSCR_SRE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_SRE(/;"	d
SIUL2_MSCR_SRE_SPEED_HIGH_100	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_SRE_SPEED_HIGH_100	/;"	d
SIUL2_MSCR_SRE_SPEED_HIGH_200	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_SRE_SPEED_HIGH_200	/;"	d
SIUL2_MSCR_SRE_SPEED_LOW_100	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_SRE_SPEED_LOW_100	/;"	d
SIUL2_MSCR_SRE_SPEED_LOW_50	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCR_SRE_SPEED_LOW_50	/;"	d
SIUL2_MSCRn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_MSCRn(/;"	d
SIUL2_PGPDI_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_PGPDI_BASE	/;"	d
SIUL2_PGPDIn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_PGPDIn(/;"	d
SIUL2_PGPDO_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_PGPDO_BASE	/;"	d
SIUL2_PGPDOn	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_PGPDOn(/;"	d
SIUL2_UART0_IMCR_RXD_PAD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_UART0_IMCR_RXD_PAD	/;"	d
SIUL2_UART0_MSCR_RXD_PAD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_UART0_MSCR_RXD_PAD	/;"	d
SIUL2_UART0_TXD_PAD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_UART0_TXD_PAD	/;"	d
SIUL2_UART_IMCR_RXD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_UART_IMCR_RXD	/;"	d
SIUL2_UART_MSCR_RXD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_UART_MSCR_RXD	/;"	d
SIUL2_UART_TXD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_UART_TXD	/;"	d
SIUL2_USDHC_PAD_CTRL_BASE	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_USDHC_PAD_CTRL_BASE	/;"	d
SIUL2_USDHC_PAD_CTRL_CLK	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_USDHC_PAD_CTRL_CLK	/;"	d
SIUL2_USDHC_PAD_CTRL_CMD	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_USDHC_PAD_CTRL_CMD	/;"	d
SIUL2_USDHC_PAD_CTRL_DAT0_3	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_USDHC_PAD_CTRL_DAT0_3	/;"	d
SIUL2_USDHC_PAD_CTRL_DAT4_7	arch/arm/include/asm/arch-s32v234/siul.h	/^#define SIUL2_USDHC_PAD_CTRL_DAT4_7	/;"	d
SIUMCR_ABE	include/mpc8260.h	/^#define SIUMCR_ABE	/;"	d
SIUMCR_AEME	include/mpc8xx.h	/^#define SIUMCR_AEME	/;"	d
SIUMCR_APPC00	include/mpc8260.h	/^#define SIUMCR_APPC00	/;"	d
SIUMCR_APPC01	include/mpc8260.h	/^#define SIUMCR_APPC01	/;"	d
SIUMCR_APPC10	include/mpc8260.h	/^#define SIUMCR_APPC10	/;"	d
SIUMCR_APPC11	include/mpc8260.h	/^#define SIUMCR_APPC11	/;"	d
SIUMCR_B2DD	include/mpc8xx.h	/^#define SIUMCR_B2DD	/;"	d
SIUMCR_B3DD	include/mpc8xx.h	/^#define SIUMCR_B3DD	/;"	d
SIUMCR_BBD	include/mpc8260.h	/^#define SIUMCR_BBD	/;"	d
SIUMCR_BCTLC00	include/mpc8260.h	/^#define SIUMCR_BCTLC00	/;"	d
SIUMCR_BCTLC01	include/mpc8260.h	/^#define SIUMCR_BCTLC01	/;"	d
SIUMCR_BCTLC10	include/mpc8260.h	/^#define SIUMCR_BCTLC10	/;"	d
SIUMCR_BCTLC11	include/mpc8260.h	/^#define SIUMCR_BCTLC11	/;"	d
SIUMCR_BSC	include/mpc8xx.h	/^#define SIUMCR_BSC	/;"	d
SIUMCR_CDIS	include/mpc8260.h	/^#define SIUMCR_CDIS	/;"	d
SIUMCR_CS10PC00	include/mpc8260.h	/^#define SIUMCR_CS10PC00	/;"	d
SIUMCR_CS10PC01	include/mpc8260.h	/^#define SIUMCR_CS10PC01	/;"	d
SIUMCR_CS10PC10	include/mpc8260.h	/^#define SIUMCR_CS10PC10	/;"	d
SIUMCR_CS10PC11	include/mpc8260.h	/^#define SIUMCR_CS10PC11	/;"	d
SIUMCR_DBGC00	include/mpc5xx.h	/^#define SIUMCR_DBGC00	/;"	d
SIUMCR_DBGC00	include/mpc8xx.h	/^#define SIUMCR_DBGC00	/;"	d
SIUMCR_DBGC01	include/mpc5xx.h	/^#define SIUMCR_DBGC01	/;"	d
SIUMCR_DBGC01	include/mpc8xx.h	/^#define SIUMCR_DBGC01	/;"	d
SIUMCR_DBGC10	include/mpc5xx.h	/^#define SIUMCR_DBGC10	/;"	d
SIUMCR_DBGC10	include/mpc8xx.h	/^#define SIUMCR_DBGC10	/;"	d
SIUMCR_DBGC11	include/mpc5xx.h	/^#define SIUMCR_DBGC11	/;"	d
SIUMCR_DBGC11	include/mpc8xx.h	/^#define SIUMCR_DBGC11	/;"	d
SIUMCR_DBPC00	include/mpc5xx.h	/^#define SIUMCR_DBPC00	/;"	d
SIUMCR_DBPC00	include/mpc8xx.h	/^#define SIUMCR_DBPC00	/;"	d
SIUMCR_DBPC01	include/mpc5xx.h	/^#define SIUMCR_DBPC01	/;"	d
SIUMCR_DBPC01	include/mpc8xx.h	/^#define SIUMCR_DBPC01	/;"	d
SIUMCR_DBPC10	include/mpc5xx.h	/^#define SIUMCR_DBPC10	/;"	d
SIUMCR_DBPC10	include/mpc8xx.h	/^#define SIUMCR_DBPC10	/;"	d
SIUMCR_DBPC11	include/mpc5xx.h	/^#define SIUMCR_DBPC11	/;"	d
SIUMCR_DBPC11	include/mpc8xx.h	/^#define SIUMCR_DBPC11	/;"	d
SIUMCR_DLK	include/mpc5xx.h	/^#define SIUMCR_DLK	/;"	d
SIUMCR_DLK	include/mpc8xx.h	/^#define SIUMCR_DLK	/;"	d
SIUMCR_DPC	include/mpc8xx.h	/^#define SIUMCR_DPC	/;"	d
SIUMCR_DPPC00	include/mpc8260.h	/^#define SIUMCR_DPPC00	/;"	d
SIUMCR_DPPC01	include/mpc8260.h	/^#define SIUMCR_DPPC01	/;"	d
SIUMCR_DPPC10	include/mpc8260.h	/^#define SIUMCR_DPPC10	/;"	d
SIUMCR_DPPC11	include/mpc8260.h	/^#define SIUMCR_DPPC11	/;"	d
SIUMCR_DSHW	include/mpc5xx.h	/^#define SIUMCR_DSHW	/;"	d
SIUMCR_DSHW	include/mpc8xx.h	/^#define SIUMCR_DSHW	/;"	d
SIUMCR_EARB	include/mpc5xx.h	/^#define SIUMCR_EARB	/;"	d
SIUMCR_EARB	include/mpc8xx.h	/^#define SIUMCR_EARB	/;"	d
SIUMCR_EARP0	include/mpc5xx.h	/^#define SIUMCR_EARP0	/;"	d
SIUMCR_EARP0	include/mpc8xx.h	/^#define SIUMCR_EARP0	/;"	d
SIUMCR_EARP1	include/mpc5xx.h	/^#define SIUMCR_EARP1	/;"	d
SIUMCR_EARP1	include/mpc8xx.h	/^#define SIUMCR_EARP1	/;"	d
SIUMCR_EARP2	include/mpc5xx.h	/^#define SIUMCR_EARP2	/;"	d
SIUMCR_EARP2	include/mpc8xx.h	/^#define SIUMCR_EARP2	/;"	d
SIUMCR_EARP3	include/mpc5xx.h	/^#define SIUMCR_EARP3	/;"	d
SIUMCR_EARP3	include/mpc8xx.h	/^#define SIUMCR_EARP3	/;"	d
SIUMCR_EARP4	include/mpc5xx.h	/^#define SIUMCR_EARP4	/;"	d
SIUMCR_EARP4	include/mpc8xx.h	/^#define SIUMCR_EARP4	/;"	d
SIUMCR_EARP5	include/mpc5xx.h	/^#define SIUMCR_EARP5	/;"	d
SIUMCR_EARP5	include/mpc8xx.h	/^#define SIUMCR_EARP5	/;"	d
SIUMCR_EARP6	include/mpc5xx.h	/^#define SIUMCR_EARP6	/;"	d
SIUMCR_EARP6	include/mpc8xx.h	/^#define SIUMCR_EARP6	/;"	d
SIUMCR_EARP7	include/mpc5xx.h	/^#define SIUMCR_EARP7	/;"	d
SIUMCR_EARP7	include/mpc8xx.h	/^#define SIUMCR_EARP7	/;"	d
SIUMCR_ESE	include/mpc8260.h	/^#define SIUMCR_ESE	/;"	d
SIUMCR_FRC	include/mpc8xx.h	/^#define SIUMCR_FRC	/;"	d
SIUMCR_GB5E	include/mpc8xx.h	/^#define SIUMCR_GB5E	/;"	d
SIUMCR_GPC00	include/mpc5xx.h	/^#define SIUMCR_GPC00	/;"	d
SIUMCR_GPC01	include/mpc5xx.h	/^#define SIUMCR_GPC01	/;"	d
SIUMCR_GPC10	include/mpc5xx.h	/^#define SIUMCR_GPC10	/;"	d
SIUMCR_GPC11	include/mpc5xx.h	/^#define SIUMCR_GPC11	/;"	d
SIUMCR_L2CPC00	include/mpc8260.h	/^#define SIUMCR_L2CPC00	/;"	d
SIUMCR_L2CPC01	include/mpc8260.h	/^#define SIUMCR_L2CPC01	/;"	d
SIUMCR_L2CPC10	include/mpc8260.h	/^#define SIUMCR_L2CPC10	/;"	d
SIUMCR_L2CPC11	include/mpc8260.h	/^#define SIUMCR_L2CPC11	/;"	d
SIUMCR_LBPC00	include/mpc8260.h	/^#define SIUMCR_LBPC00	/;"	d
SIUMCR_LBPC01	include/mpc8260.h	/^#define SIUMCR_LBPC01	/;"	d
SIUMCR_LBPC10	include/mpc8260.h	/^#define SIUMCR_LBPC10	/;"	d
SIUMCR_LBPC11	include/mpc8260.h	/^#define SIUMCR_LBPC11	/;"	d
SIUMCR_LPBSE	include/mpc8260.h	/^#define SIUMCR_LPBSE	/;"	d
SIUMCR_MLRC00	include/mpc5xx.h	/^#define SIUMCR_MLRC00	/;"	d
SIUMCR_MLRC00	include/mpc8xx.h	/^#define SIUMCR_MLRC00	/;"	d
SIUMCR_MLRC01	include/mpc5xx.h	/^#define SIUMCR_MLRC01	/;"	d
SIUMCR_MLRC01	include/mpc8xx.h	/^#define SIUMCR_MLRC01	/;"	d
SIUMCR_MLRC10	include/mpc5xx.h	/^#define SIUMCR_MLRC10	/;"	d
SIUMCR_MLRC10	include/mpc8xx.h	/^#define SIUMCR_MLRC10	/;"	d
SIUMCR_MLRC11	include/mpc5xx.h	/^#define SIUMCR_MLRC11	/;"	d
SIUMCR_MLRC11	include/mpc8xx.h	/^#define SIUMCR_MLRC11	/;"	d
SIUMCR_MMR00	include/mpc8260.h	/^#define SIUMCR_MMR00	/;"	d
SIUMCR_MMR01	include/mpc8260.h	/^#define SIUMCR_MMR01	/;"	d
SIUMCR_MMR10	include/mpc8260.h	/^#define SIUMCR_MMR10	/;"	d
SIUMCR_MMR11	include/mpc8260.h	/^#define SIUMCR_MMR11	/;"	d
SIUMCR_MPRE	include/mpc8xx.h	/^#define SIUMCR_MPRE	/;"	d
SIUMCR_MTSC	include/mpc5xx.h	/^#define SIUMCR_MTSC	/;"	d
SIUMCR_OPAR	include/mpc8xx.h	/^#define SIUMCR_OPAR	/;"	d
SIUMCR_PBSE	include/mpc8260.h	/^#define SIUMCR_PBSE	/;"	d
SIUMCR_PNCS	include/mpc8xx.h	/^#define SIUMCR_PNCS	/;"	d
SIUMCR_RCTX	include/mpc5xx.h	/^#define SIUMCR_RCTX	/;"	d
SIUMCR_SC00	include/mpc5xx.h	/^#define SIUMCR_SC00	/;"	d
SIUMCR_SC01	include/mpc5xx.h	/^#define SIUMCR_SC01	/;"	d
SIUMCR_SC10	include/mpc5xx.h	/^#define SIUMCR_SC10	/;"	d
SIUMCR_SC11	include/mpc5xx.h	/^#define SIUMCR_SC11	/;"	d
SIUMCR_SEME	include/mpc8xx.h	/^#define SIUMCR_SEME	/;"	d
SIU_INT_FCC1	include/mpc8260_irq.h	/^#define	SIU_INT_FCC1	/;"	d
SIU_INT_FCC2	include/mpc8260_irq.h	/^#define	SIU_INT_FCC2	/;"	d
SIU_INT_FCC3	include/mpc8260_irq.h	/^#define	SIU_INT_FCC3	/;"	d
SIU_INT_IRQ1	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ1	/;"	d
SIU_INT_IRQ2	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ2	/;"	d
SIU_INT_IRQ3	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ3	/;"	d
SIU_INT_IRQ4	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ4	/;"	d
SIU_INT_IRQ5	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ5	/;"	d
SIU_INT_IRQ6	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ6	/;"	d
SIU_INT_IRQ7	include/mpc8260_irq.h	/^#define	SIU_INT_IRQ7	/;"	d
SIU_INT_SCC1	include/mpc8260_irq.h	/^#define	SIU_INT_SCC1	/;"	d
SIU_INT_SCC2	include/mpc8260_irq.h	/^#define	SIU_INT_SCC2	/;"	d
SIU_INT_SCC3	include/mpc8260_irq.h	/^#define	SIU_INT_SCC3	/;"	d
SIU_INT_SCC4	include/mpc8260_irq.h	/^#define	SIU_INT_SCC4	/;"	d
SIU_INT_SMC1	include/mpc8260_irq.h	/^#define	SIU_INT_SMC1	/;"	d
SIU_INT_SMC2	include/mpc8260_irq.h	/^#define	SIU_INT_SMC2	/;"	d
SIU_IRQ0	include/mpc8xx_irq.h	/^#define	SIU_IRQ0	/;"	d
SIU_IRQ1	include/mpc8xx_irq.h	/^#define	SIU_IRQ1	/;"	d
SIU_IRQ2	include/mpc8xx_irq.h	/^#define	SIU_IRQ2	/;"	d
SIU_IRQ3	include/mpc8xx_irq.h	/^#define	SIU_IRQ3	/;"	d
SIU_IRQ4	include/mpc8xx_irq.h	/^#define	SIU_IRQ4	/;"	d
SIU_IRQ5	include/mpc8xx_irq.h	/^#define	SIU_IRQ5	/;"	d
SIU_IRQ6	include/mpc8xx_irq.h	/^#define	SIU_IRQ6	/;"	d
SIU_IRQ7	include/mpc8xx_irq.h	/^#define	SIU_IRQ7	/;"	d
SIU_LEVEL0	include/mpc8xx_irq.h	/^#define	SIU_LEVEL0	/;"	d
SIU_LEVEL1	include/mpc8xx_irq.h	/^#define	SIU_LEVEL1	/;"	d
SIU_LEVEL2	include/mpc8xx_irq.h	/^#define	SIU_LEVEL2	/;"	d
SIU_LEVEL3	include/mpc8xx_irq.h	/^#define	SIU_LEVEL3	/;"	d
SIU_LEVEL4	include/mpc8xx_irq.h	/^#define	SIU_LEVEL4	/;"	d
SIU_LEVEL5	include/mpc8xx_irq.h	/^#define	SIU_LEVEL5	/;"	d
SIU_LEVEL6	include/mpc8xx_irq.h	/^#define	SIU_LEVEL6	/;"	d
SIU_LEVEL7	include/mpc8xx_irq.h	/^#define	SIU_LEVEL7	/;"	d
SIZE	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define SIZE	/;"	d
SIZE	drivers/mtd/ubi/crc32.c	/^#define SIZE /;"	d	file:
SIZEOFBD	drivers/qe/uec.h	/^#define	SIZEOFBD	/;"	d
SIZEOF_STRUCT_MTD_CONCAT	drivers/mtd/mtdconcat.c	/^#define SIZEOF_STRUCT_MTD_CONCAT(/;"	d	file:
SIZE_128KiB	drivers/mtd/jedec_flash.c	/^#define SIZE_128KiB /;"	d	file:
SIZE_1MiB	drivers/mtd/jedec_flash.c	/^#define SIZE_1MiB /;"	d	file:
SIZE_256KiB	drivers/mtd/jedec_flash.c	/^#define SIZE_256KiB /;"	d	file:
SIZE_2MiB	drivers/mtd/jedec_flash.c	/^#define SIZE_2MiB /;"	d	file:
SIZE_4MiB	drivers/mtd/jedec_flash.c	/^#define SIZE_4MiB /;"	d	file:
SIZE_512KiB	drivers/mtd/jedec_flash.c	/^#define SIZE_512KiB /;"	d	file:
SIZE_64KiB	drivers/mtd/jedec_flash.c	/^#define SIZE_64KiB /;"	d	file:
SIZE_8MiB	drivers/mtd/jedec_flash.c	/^#define SIZE_8MiB /;"	d	file:
SIZE_BITS	common/dlmalloc.c	/^#define SIZE_BITS /;"	d	file:
SIZE_BOOT_ENTRY	arch/powerpc/cpu/mpc85xx/mp.h	/^#define SIZE_BOOT_ENTRY	/;"	d
SIZE_GB	cmd/mtdparts.c	/^#define SIZE_GB /;"	d	file:
SIZE_KB	cmd/mtdparts.c	/^#define SIZE_KB /;"	d	file:
SIZE_MAX	include/linux/kernel.h	/^#define SIZE_MAX	/;"	d
SIZE_MB	cmd/mtdparts.c	/^#define SIZE_MB /;"	d	file:
SIZE_REMAINING	cmd/jffs2.c	/^#define SIZE_REMAINING	/;"	d	file:
SIZE_REMAINING	cmd/mtdparts.c	/^#define SIZE_REMAINING	/;"	d	file:
SIZE_SZ	common/dlmalloc.c	/^#define SIZE_SZ /;"	d	file:
SIZE_XMAX	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SIZE_XMAX(/;"	d
SIZE_YMAX	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SIZE_YMAX(/;"	d
SI_BUSY	drivers/net/cs8900.h	/^#define SI_BUSY /;"	d
SI_SCK9_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SI_SCK9_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SI_TYPE_SIZE	arch/blackfin/lib/muldi3.c	/^#define SI_TYPE_SIZE /;"	d	file:
SI_TYPE_SIZE	arch/m68k/lib/muldi3.c	/^#define SI_TYPE_SIZE /;"	d	file:
SI_TYPE_SIZE	arch/microblaze/lib/muldi3.c	/^#define SI_TYPE_SIZE /;"	d	file:
SItype	arch/arc/lib/libgcc2.h	/^typedef 	 int SItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:int
SItype	arch/blackfin/lib/muldi3.c	/^typedef int SItype __attribute__ ((mode(SI)));$/;"	t	typeref:typename:int	file:
SItype	arch/m68k/lib/ashldi3.c	/^typedef		 int SItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:int	file:
SItype	arch/m68k/lib/lshrdi3.c	/^typedef		 int SItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:int	file:
SItype	arch/m68k/lib/muldi3.c	/^typedef 	 int SItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:int	file:
SItype	arch/microblaze/lib/muldi3.c	/^typedef int SItype __attribute__ ((mode(SI)));$/;"	t	typeref:typename:int	file:
SItype	arch/nios2/lib/libgcc.c	/^typedef long SItype;$/;"	t	typeref:typename:long	file:
SK	drivers/usb/gadget/storage_common.c	/^#define SK(/;"	d	file:
SKHA_CMR_CI	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_CMR_CI	/;"	d
SKHA_CMR_GO	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_CMR_GO	/;"	d
SKHA_CMR_RI	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_CMR_RI	/;"	d
SKHA_CMR_SWR	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_CMR_SWR	/;"	d
SKHA_CR_IE	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_CR_IE	/;"	d
SKHA_ESR_DSE	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_DSE	/;"	d
SKHA_ESR_ERE	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_ERE	/;"	d
SKHA_ESR_IFO	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_IFO	/;"	d
SKHA_ESR_IME	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_IME	/;"	d
SKHA_ESR_KPE	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_KPE	/;"	d
SKHA_ESR_KRE	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_KRE	/;"	d
SKHA_ESR_KSE	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_KSE	/;"	d
SKHA_ESR_NEIF	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_NEIF	/;"	d
SKHA_ESR_NEOF	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_NEOF	/;"	d
SKHA_ESR_OFU	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_OFU	/;"	d
SKHA_ESR_RMDP	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_ESR_RMDP	/;"	d
SKHA_KSR_SZ	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_KSR_SZ(/;"	d
SKHA_KSR_SZ_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_KSR_SZ_MASK	/;"	d
SKHA_MODE_ALG	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_ALG(/;"	d
SKHA_MODE_ALG_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_ALG_MASK	/;"	d
SKHA_MODE_CM	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_CM(/;"	d
SKHA_MODE_CM_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_CM_MASK	/;"	d
SKHA_MODE_CTRM	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_CTRM(/;"	d
SKHA_MODE_CTRM_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_CTRM_MASK	/;"	d
SKHA_MODE_DIR	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_DIR	/;"	d
SKHA_MODE_DKP	arch/m68k/include/asm/coldfire/skha.h	/^#define	SKHA_MODE_DKP	/;"	d
SKHA_SR_AESES	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_AESES(/;"	d
SKHA_SR_AESES_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_AESES_MASK	/;"	d
SKHA_SR_BUSY	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_BUSY	/;"	d
SKHA_SR_DESES	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_DESES(/;"	d
SKHA_SR_DESES_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_DESES_MASK	/;"	d
SKHA_SR_DONE	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_DONE	/;"	d
SKHA_SR_ERR	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_ERR	/;"	d
SKHA_SR_IFL	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_IFL(/;"	d
SKHA_SR_IFL_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_IFL_MASK	/;"	d
SKHA_SR_INT	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_INT	/;"	d
SKHA_SR_OFL	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_OFL(/;"	d
SKHA_SR_OFL_MASK	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_OFL_MASK	/;"	d
SKHA_SR_RD	arch/m68k/include/asm/coldfire/skha.h	/^#define SKHA_SR_RD	/;"	d
SKIPPED_SPARE_BYTES	drivers/mtd/nand/tegra_nand.c	/^#define SKIPPED_SPARE_BYTES	/;"	d	file:
SKIP_DELAY_LOOP_VALUE_OR_ZERO	drivers/ddr/altera/sequencer.c	/^#define SKIP_DELAY_LOOP_VALUE_OR_ZERO(/;"	d	file:
SKIP_EN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define SKIP_EN /;"	d
SKIP_EN	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define SKIP_EN	/;"	d
SKIP_EO	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define SKIP_EO /;"	d
SKIP_EO	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define SKIP_EO	/;"	d
SKPAD	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SKPAD	/;"	d
SKUID_CLK_600MHZ	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SKUID_CLK_600MHZ	/;"	d
SKUID_CLK_720MHZ	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SKUID_CLK_720MHZ	/;"	d
SKUID_CLK_MASK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SKUID_CLK_MASK	/;"	d
SKU_ID_AP25	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_AP25		= 0x17,$/;"	e	enum:__anonea14c2da0103
SKU_ID_AP25E	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_AP25E		= 0x1b,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T114_1	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T114_1		= 0x01,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T114_ENG	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T114_ENG		= 0x00, \/* Dalmore value, unfused *\/$/;"	e	enum:__anonea14c2da0103
SKU_ID_T124_ENG	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T124_ENG		= 0x00, \/* Venice2 value, unfused *\/$/;"	e	enum:__anonea14c2da0103
SKU_ID_T20	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T20		= 0x8,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T20_7	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T20_7		= 0x7,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T210_ENG	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T210_ENG		= 0x00, \/* unfused value TBD *\/$/;"	e	enum:__anonea14c2da0103
SKU_ID_T25	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T25		= 0x18,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T25E	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T25E		= 0x1c,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T25SE	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T25SE		= 0x14,$/;"	e	enum:__anonea14c2da0103
SKU_ID_T30	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T30		= 0x81, \/* Cardhu value *\/$/;"	e	enum:__anonea14c2da0103
SKU_ID_T33	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_T33		= 0x80,$/;"	e	enum:__anonea14c2da0103
SKU_ID_TM30MQS_P_A3	arch/arm/include/asm/arch-tegra/tegra.h	/^	SKU_ID_TM30MQS_P_A3	= 0xb1,$/;"	e	enum:__anonea14c2da0103
SL811_12M_HI	drivers/usb/host/sl811.h	/^#define SL811_12M_HI	/;"	d
SL811_12M_LOW	drivers/usb/host/sl811.h	/^#define SL811_12M_LOW	/;"	d
SL811_ADDR_A	drivers/usb/host/sl811.h	/^#define	SL811_ADDR_A	/;"	d
SL811_ADDR_B	drivers/usb/host/sl811.h	/^#define	SL811_ADDR_B	/;"	d
SL811_ADR	drivers/usb/host/sl811-hcd.c	/^#define	 SL811_ADR /;"	d	file:
SL811_CNT_A	drivers/usb/host/sl811.h	/^#define	SL811_CNT_A	/;"	d
SL811_CNT_B	drivers/usb/host/sl811.h	/^#define	SL811_CNT_B	/;"	d
SL811_CTL2_DSWAP	drivers/usb/host/sl811.h	/^#define	SL811_CTL2_DSWAP	/;"	d
SL811_CTL2_HOST	drivers/usb/host/sl811.h	/^#define	SL811_CTL2_HOST	/;"	d
SL811_CTL2_SOFHI	drivers/usb/host/sl811.h	/^#define	SL811_CTL2_SOFHI	/;"	d
SL811_CTRL1	drivers/usb/host/sl811.h	/^#define	SL811_CTRL1	/;"	d
SL811_CTRL1_JKSTATE	drivers/usb/host/sl811.h	/^#define	SL811_CTRL1_JKSTATE	/;"	d
SL811_CTRL1_RESET	drivers/usb/host/sl811.h	/^#define	SL811_CTRL1_RESET	/;"	d
SL811_CTRL1_SOF	drivers/usb/host/sl811.h	/^#define	SL811_CTRL1_SOF	/;"	d
SL811_CTRL1_SPEED_LOW	drivers/usb/host/sl811.h	/^#define	SL811_CTRL1_SPEED_LOW	/;"	d
SL811_CTRL1_SUSPEND	drivers/usb/host/sl811.h	/^#define	SL811_CTRL1_SUSPEND	/;"	d
SL811_CTRL2	drivers/usb/host/sl811.h	/^#define	SL811_CTRL2	/;"	d
SL811_CTRL_A	drivers/usb/host/sl811.h	/^#define	SL811_CTRL_A	/;"	d
SL811_CTRL_B	drivers/usb/host/sl811.h	/^#define	SL811_CTRL_B	/;"	d
SL811_DAT	drivers/usb/host/sl811-hcd.c	/^#define	 SL811_DAT /;"	d	file:
SL811_DATA_LIMIT	drivers/usb/host/sl811.h	/^#define SL811_DATA_LIMIT	/;"	d
SL811_DATA_START	drivers/usb/host/sl811.h	/^#define SL811_DATA_START	/;"	d
SL811_DEV_A	drivers/usb/host/sl811.h	/^#define	SL811_DEV_A	/;"	d
SL811_DEV_B	drivers/usb/host/sl811.h	/^#define	SL811_DEV_B	/;"	d
SL811_HWREV	drivers/usb/host/sl811.h	/^#define	SL811_HWREV	/;"	d
SL811_HWR_HWREV	drivers/usb/host/sl811.h	/^#define	SL811_HWR_HWREV	/;"	d
SL811_INTR	drivers/usb/host/sl811.h	/^#define	SL811_INTR	/;"	d
SL811_INTRSTS	drivers/usb/host/sl811.h	/^#define	SL811_INTRSTS	/;"	d
SL811_INTR_DETECT	drivers/usb/host/sl811.h	/^#define	SL811_INTR_DETECT	/;"	d
SL811_INTR_DONE_A	drivers/usb/host/sl811.h	/^#define	SL811_INTR_DONE_A	/;"	d
SL811_INTR_DONE_B	drivers/usb/host/sl811.h	/^#define	SL811_INTR_DONE_B	/;"	d
SL811_INTR_INSRMV	drivers/usb/host/sl811.h	/^#define	SL811_INTR_INSRMV	/;"	d
SL811_INTR_NOTPRESENT	drivers/usb/host/sl811.h	/^#define	SL811_INTR_NOTPRESENT	/;"	d
SL811_INTR_SOF	drivers/usb/host/sl811.h	/^#define	SL811_INTR_SOF	/;"	d
SL811_INTR_SPEED_FULL	drivers/usb/host/sl811.h	/^#define	SL811_INTR_SPEED_FULL	/;"	d
SL811_LEN_A	drivers/usb/host/sl811.h	/^#define	SL811_LEN_A	/;"	d
SL811_LEN_B	drivers/usb/host/sl811.h	/^#define	SL811_LEN_B	/;"	d
SL811_PIDEP_A	drivers/usb/host/sl811.h	/^#define	SL811_PIDEP_A	/;"	d
SL811_PIDEP_B	drivers/usb/host/sl811.h	/^#define	SL811_PIDEP_B	/;"	d
SL811_SOFCNTDIV	drivers/usb/host/sl811.h	/^#define	SL811_SOFCNTDIV	/;"	d
SL811_SOFLOW	drivers/usb/host/sl811.h	/^#define	SL811_SOFLOW	/;"	d
SL811_STS_A	drivers/usb/host/sl811.h	/^#define	SL811_STS_A	/;"	d
SL811_STS_B	drivers/usb/host/sl811.h	/^#define	SL811_STS_B	/;"	d
SL811_USB_CTRL_ARM	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_ARM	/;"	d
SL811_USB_CTRL_DIR_OUT	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_DIR_OUT	/;"	d
SL811_USB_CTRL_ENABLE	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_ENABLE	/;"	d
SL811_USB_CTRL_ISO	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_ISO	/;"	d
SL811_USB_CTRL_PREAMBLE	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_PREAMBLE	/;"	d
SL811_USB_CTRL_SOF	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_SOF	/;"	d
SL811_USB_CTRL_TOGGLE_1	drivers/usb/host/sl811.h	/^#define	SL811_USB_CTRL_TOGGLE_1	/;"	d
SL811_USB_STS_ACK	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_ACK	/;"	d
SL811_USB_STS_ERROR	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_ERROR	/;"	d
SL811_USB_STS_NAK	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_NAK	/;"	d
SL811_USB_STS_OVERFLOW	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_OVERFLOW	/;"	d
SL811_USB_STS_SETUP	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_SETUP	/;"	d
SL811_USB_STS_STALL	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_STALL	/;"	d
SL811_USB_STS_TIMEOUT	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_TIMEOUT	/;"	d
SL811_USB_STS_TOGGLE_1	drivers/usb/host/sl811.h	/^#define	SL811_USB_STS_TOGGLE_1	/;"	d
SLAVE0_SINGLE_ADDR_MAP_END_ADDR	arch/arm/mach-exynos/exynos4_setup.h	/^#define SLAVE0_SINGLE_ADDR_MAP_END_ADDR	/;"	d
SLAVE0_SINGLE_ADDR_MAP_START_ADDR	arch/arm/mach-exynos/exynos4_setup.h	/^#define SLAVE0_SINGLE_ADDR_MAP_START_ADDR	/;"	d
SLAVE1_SINGLE_ADDR_MAP_END_ADDR	arch/arm/mach-exynos/exynos4_setup.h	/^#define SLAVE1_SINGLE_ADDR_MAP_END_ADDR	/;"	d
SLAVE1_SINGLE_ADDR_MAP_START_ADDR	arch/arm/mach-exynos/exynos4_setup.h	/^#define SLAVE1_SINGLE_ADDR_MAP_START_ADDR	/;"	d
SLAVE_IMAGE	include/universe.h	/^typedef struct _SLAVE_IMAGE SLAVE_IMAGE;$/;"	t	typeref:struct:_SLAVE_IMAGE
SLAVE_PIC	arch/x86/include/asm/ibmpc.h	/^#define SLAVE_PIC /;"	d
SLAVE_VID_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define SLAVE_VID_FUNC_EN_N	/;"	d
SLB9635	drivers/tpm/tpm_tis_infineon.c	/^	SLB9635,$/;"	e	enum:i2c_chip_type	file:
SLB9645	drivers/tpm/tpm_tis_infineon.c	/^	SLB9645,$/;"	e	enum:i2c_chip_type	file:
SLCDC_SEL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define SLCDC_SEL	/;"	d
SLCR_IDCODE_MASK	arch/arm/mach-zynq/slcr.c	/^#define SLCR_IDCODE_MASK	/;"	d	file:
SLCR_IDCODE_SHIFT	arch/arm/mach-zynq/slcr.c	/^#define SLCR_IDCODE_SHIFT	/;"	d	file:
SLCR_LOCK_MAGIC	arch/arm/mach-zynq/slcr.c	/^#define SLCR_LOCK_MAGIC	/;"	d	file:
SLCR_UNLOCK_MAGIC	arch/arm/mach-zynq/slcr.c	/^#define SLCR_UNLOCK_MAGIC	/;"	d	file:
SLCR_USB_L1_SEL	arch/arm/mach-zynq/slcr.c	/^#define SLCR_USB_L1_SEL	/;"	d	file:
SLC_CTRL_SB	arch/arc/lib/cache.c	/^#define SLC_CTRL_SB	/;"	d	file:
SLC_LINE_MASK	arch/arc/lib/cache.c	/^#define SLC_LINE_MASK	/;"	d	file:
SLC_NAND_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define SLC_NAND_BASE	/;"	d
SLDDCKPAT1R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDDCKPAT1R /;"	d
SLDDCKPAT2R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDDCKPAT2R /;"	d
SLDDFR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDDFR /;"	d
SLDHCNR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDHCNR /;"	d
SLDHPDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDHPDR /;"	d
SLDHSYNR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDHSYNR /;"	d
SLDMLSR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDMLSR /;"	d
SLDMT1R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDMT1R /;"	d
SLDMT2R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDMT2R /;"	d
SLDMT3R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDMT3R /;"	d
SLDPMR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDPMR /;"	d
SLDSA1R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDSA1R /;"	d
SLDSA2R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDSA2R /;"	d
SLDSM1R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDSM1R /;"	d
SLDSM2R	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDSM2R /;"	d
SLDVLNR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDVLNR /;"	d
SLDVPDR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDVPDR /;"	d
SLDVSYNR	arch/sh/include/asm/cpu_sh7722.h	/^#define SLDVSYNR /;"	d
SLEEP	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define SLEEP /;"	d
SLEEP	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define SLEEP	/;"	d
SLEEP	drivers/net/dc2114x.c	/^#define SLEEP	/;"	d	file:
SLEEP_AFTER_POWER_FAIL	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  SLEEP_AFTER_POWER_FAIL	/;"	d
SLEEP_AFTER_POWER_FAIL	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  SLEEP_AFTER_POWER_FAIL	/;"	d
SLEEP_AFTER_POWER_FAIL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SLEEP_AFTER_POWER_FAIL	/;"	d
SLEEP_CNT	board/renesas/ap325rxa/lowlevel_init.S	/^SLEEP_CNT:	.long	0x00000800$/;"	l
SLEEP_DATA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SLEEP_DATA	/;"	d
SLEEP_DURATION_LONG_US	drivers/tpm/tpm_tis.h	/^	SLEEP_DURATION_LONG_US		= 210,$/;"	e	enum:tpm_timeout
SLEEP_DURATION_US	drivers/tpm/tpm_tis.h	/^	SLEEP_DURATION_US		= 60,$/;"	e	enum:tpm_timeout
SLEEP_OE_N	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SLEEP_OE_N	/;"	d
SLEEP_SEL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SLEEP_SEL	/;"	d
SLEEP_STATE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SLEEP_STATE	/;"	d
SLEEP_STATE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	SLEEP_STATE			= 3,$/;"	e	enum:__anon957231910203	file:
SLEEP_STATE_S0	arch/x86/include/asm/arch-broadwell/pm.h	/^#define SLEEP_STATE_S0	/;"	d
SLEEP_STATE_S3	arch/x86/include/asm/arch-broadwell/pm.h	/^#define SLEEP_STATE_S3	/;"	d
SLEEP_STATE_S5	arch/x86/include/asm/arch-broadwell/pm.h	/^#define SLEEP_STATE_S5	/;"	d
SLEEP_TIME	tools/genboardscfg.py	/^SLEEP_TIME = 0.03$/;"	v
SLEEP_TIME	tools/moveconfig.py	/^SLEEP_TIME=0.03$/;"	v
SLEWCONTROL	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCONTROL	include/dt-bindings/pinctrl/dra.h	/^#define SLEWCONTROL	/;"	d
SLEWCTRL	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define SLEWCTRL	/;"	d
SLEWCTRL	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define SLEWCTRL	/;"	d
SLEWCTRL_FAST	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	include/dt-bindings/pinctrl/am33xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_FAST	include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_FAST	/;"	d
SLEWCTRL_SLOW	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLEWCTRL_SLOW	include/dt-bindings/pinctrl/am43xx.h	/^#define SLEWCTRL_SLOW	/;"	d
SLFTST_CTRL_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SLFTST_CTRL_BASE_ADDR	/;"	d
SLIMBUS_RATIO	board/samsung/trats/setup.h	/^#define SLIMBUS_RATIO	/;"	d
SLIM_DMA_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SLIM_DMA_BASE_ADDR	/;"	d
SLINK_CMD2_CS_ACTIVE_BETWEEN	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD2_CS_ACTIVE_BETWEEN	/;"	d	file:
SLINK_CMD2_RXEN	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD2_RXEN	/;"	d	file:
SLINK_CMD2_SS_EN	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD2_SS_EN	/;"	d	file:
SLINK_CMD2_SS_EN_MASK	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD2_SS_EN_MASK	/;"	d	file:
SLINK_CMD2_SS_EN_SHIFT	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD2_SS_EN_SHIFT	/;"	d	file:
SLINK_CMD2_TXEN	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD2_TXEN	/;"	d	file:
SLINK_CMD_BIT_LENGTH	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_BIT_LENGTH	/;"	d	file:
SLINK_CMD_BIT_LENGTH_MASK	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_BIT_LENGTH_MASK	/;"	d	file:
SLINK_CMD_CK_SDA	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_CK_SDA	/;"	d	file:
SLINK_CMD_CS_POL	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_CS_POL	/;"	d	file:
SLINK_CMD_CS_SOFT	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_CS_SOFT	/;"	d	file:
SLINK_CMD_CS_VAL	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_CS_VAL	/;"	d	file:
SLINK_CMD_ENB	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_ENB	/;"	d	file:
SLINK_CMD_GO	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_GO	/;"	d	file:
SLINK_CMD_IDLE_SCLK_DRIVE_HIGH	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH	/;"	d	file:
SLINK_CMD_IDLE_SCLK_DRIVE_LOW	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW	/;"	d	file:
SLINK_CMD_IDLE_SCLK_MASK	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_IDLE_SCLK_MASK	/;"	d	file:
SLINK_CMD_IDLE_SCLK_PULL_HIGH	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_IDLE_SCLK_PULL_HIGH	/;"	d	file:
SLINK_CMD_IDLE_SCLK_PULL_LOW	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_IDLE_SCLK_PULL_LOW	/;"	d	file:
SLINK_CMD_M_S	drivers/spi/tegra20_slink.c	/^#define SLINK_CMD_M_S	/;"	d	file:
SLINK_STAT2_RXF_FULL_CNT	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT2_RXF_FULL_CNT	/;"	d	file:
SLINK_STAT2_TXF_FULL_CNT	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT2_TXF_FULL_CNT	/;"	d	file:
SLINK_STAT_BSY	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_BSY	/;"	d	file:
SLINK_STAT_CUR_BLKCNT	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_CUR_BLKCNT	/;"	d	file:
SLINK_STAT_ERR	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_ERR	/;"	d	file:
SLINK_STAT_RDY	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_RDY	/;"	d	file:
SLINK_STAT_RXF_EMPTY	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_RXF_EMPTY	/;"	d	file:
SLINK_STAT_RXF_FLUSH	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_RXF_FLUSH	/;"	d	file:
SLINK_STAT_RXF_FULL	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_RXF_FULL	/;"	d	file:
SLINK_STAT_RXF_OVF	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_RXF_OVF	/;"	d	file:
SLINK_STAT_RXF_UNR	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_RXF_UNR	/;"	d	file:
SLINK_STAT_TXF_EMPTY	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_TXF_EMPTY	/;"	d	file:
SLINK_STAT_TXF_FLUSH	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_TXF_FLUSH	/;"	d	file:
SLINK_STAT_TXF_FULL	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_TXF_FULL	/;"	d	file:
SLINK_STAT_TXF_OVF	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_TXF_OVF	/;"	d	file:
SLINK_STAT_TXF_UNR	drivers/spi/tegra20_slink.c	/^#define SLINK_STAT_TXF_UNR	/;"	d	file:
SLOM	include/usb/ehci-ci.h	/^#define SLOM	/;"	d
SLOT_FLAG	drivers/usb/host/xhci.h	/^#define SLOT_FLAG	/;"	d
SLOT_ID_FOR_TRB	drivers/usb/host/xhci.h	/^#define	SLOT_ID_FOR_TRB(/;"	d
SLOT_ID_FOR_TRB_MASK	drivers/usb/host/xhci.h	/^#define	SLOT_ID_FOR_TRB_MASK	/;"	d
SLOT_ID_FOR_TRB_SHIFT	drivers/usb/host/xhci.h	/^#define	SLOT_ID_FOR_TRB_SHIFT	/;"	d
SLOT_PCIE1	board/freescale/p1022ds/p1022ds.c	/^	SLOT_PCIE1 = 1,$/;"	e	enum:slot_id	file:
SLOT_PCIE1	board/gdsys/p1022/controlcenterd.c	/^	SLOT_PCIE1 = 1,$/;"	e	enum:slot_id	file:
SLOT_PCIE2	board/freescale/p1022ds/p1022ds.c	/^	SLOT_PCIE2,$/;"	e	enum:slot_id	file:
SLOT_PCIE2	board/gdsys/p1022/controlcenterd.c	/^	SLOT_PCIE2,$/;"	e	enum:slot_id	file:
SLOT_PCIE3	board/freescale/p1022ds/p1022ds.c	/^	SLOT_PCIE3,$/;"	e	enum:slot_id	file:
SLOT_PCIE3	board/gdsys/p1022/controlcenterd.c	/^	SLOT_PCIE3,$/;"	e	enum:slot_id	file:
SLOT_PCIE4	board/freescale/p1022ds/p1022ds.c	/^	SLOT_PCIE4,$/;"	e	enum:slot_id	file:
SLOT_PCIE4	board/gdsys/p1022/controlcenterd.c	/^	SLOT_PCIE4,$/;"	e	enum:slot_id	file:
SLOT_PCIE5	board/freescale/p1022ds/p1022ds.c	/^	SLOT_PCIE5,$/;"	e	enum:slot_id	file:
SLOT_PCIE5	board/gdsys/p1022/controlcenterd.c	/^	SLOT_PCIE5,$/;"	e	enum:slot_id	file:
SLOT_SATA1	board/freescale/p1022ds/p1022ds.c	/^	SLOT_SATA1,$/;"	e	enum:slot_id	file:
SLOT_SATA1	board/gdsys/p1022/controlcenterd.c	/^	SLOT_SATA1,$/;"	e	enum:slot_id	file:
SLOT_SATA2	board/freescale/p1022ds/p1022ds.c	/^	SLOT_SATA2$/;"	e	enum:slot_id	file:
SLOT_SATA2	board/gdsys/p1022/controlcenterd.c	/^	SLOT_SATA2$/;"	e	enum:slot_id	file:
SLOT_SPEED_FS	drivers/usb/host/xhci.h	/^#define	SLOT_SPEED_FS	/;"	d
SLOT_SPEED_HS	drivers/usb/host/xhci.h	/^#define	SLOT_SPEED_HS	/;"	d
SLOT_SPEED_LS	drivers/usb/host/xhci.h	/^#define	SLOT_SPEED_LS	/;"	d
SLOT_SPEED_SS	drivers/usb/host/xhci.h	/^#define	SLOT_SPEED_SS	/;"	d
SLOT_STATE	drivers/usb/host/xhci.h	/^#define SLOT_STATE	/;"	d
SLOT_STATE_ADDRESSED	drivers/usb/host/xhci.h	/^#define SLOT_STATE_ADDRESSED	/;"	d
SLOT_STATE_CONFIGURED	drivers/usb/host/xhci.h	/^#define SLOT_STATE_CONFIGURED	/;"	d
SLOT_STATE_DEFAULT	drivers/usb/host/xhci.h	/^#define SLOT_STATE_DEFAULT	/;"	d
SLOT_STATE_DISABLED	drivers/usb/host/xhci.h	/^#define SLOT_STATE_DISABLED	/;"	d
SLOT_STATE_ENABLED	drivers/usb/host/xhci.h	/^#define SLOT_STATE_ENABLED	/;"	d
SLOW	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define SLOW /;"	d
SLOW_CLK_FREQ	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define SLOW_CLK_FREQ	/;"	d
SLPAR	include/sym53c8xx.h	/^#define SLPAR	/;"	d
SLP_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  SLP_EN	/;"	d
SLP_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SLP_EN	/;"	d
SLP_SMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  SLP_SMI_EN	/;"	d
SLP_SMI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SLP_SMI_EN	/;"	d
SLP_STR_POL_LOCK	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  SLP_STR_POL_LOCK	/;"	d
SLP_STR_POL_LOCK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  SLP_STR_POL_LOCK	/;"	d
SLP_TYP	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  SLP_TYP	/;"	d
SLP_TYP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SLP_TYP	/;"	d
SLP_TYP_S0	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SLP_TYP_S0	/;"	d
SLP_TYP_S0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define    SLP_TYP_S0	/;"	d
SLP_TYP_S1	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SLP_TYP_S1	/;"	d
SLP_TYP_S1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define    SLP_TYP_S1	/;"	d
SLP_TYP_S3	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SLP_TYP_S3	/;"	d
SLP_TYP_S3	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define    SLP_TYP_S3	/;"	d
SLP_TYP_S4	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SLP_TYP_S4	/;"	d
SLP_TYP_S4	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define    SLP_TYP_S4	/;"	d
SLP_TYP_S5	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SLP_TYP_S5	/;"	d
SLP_TYP_S5	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define    SLP_TYP_S5	/;"	d
SLP_TYP_SHIFT	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SLP_TYP_SHIFT /;"	d
SLRE_BUFSZ	cmd/setexpr.c	/^#define SLRE_BUFSZ	/;"	d	file:
SLRE_HEADER_DEFINED	include/slre.h	/^#define	SLRE_HEADER_DEFINED$/;"	d
SLRE_PATSZ	cmd/setexpr.c	/^#define SLRE_PATSZ	/;"	d	file:
SLT_CR_IEN	arch/m68k/include/asm/m547x_8x.h	/^#define SLT_CR_IEN	/;"	d
SLT_CR_RUN	arch/m68k/include/asm/m547x_8x.h	/^#define SLT_CR_RUN	/;"	d
SLT_CR_TEN	arch/m68k/include/asm/m547x_8x.h	/^#define SLT_CR_TEN	/;"	d
SLT_SR_BE	arch/m68k/include/asm/m547x_8x.h	/^#define SLT_SR_BE	/;"	d
SLT_SR_ST	arch/m68k/include/asm/m547x_8x.h	/^#define SLT_SR_ST	/;"	d
SLWF_MASK	arch/arm/mach-tegra/pinmux-common.c	/^#define SLWF_MASK	/;"	d	file:
SLWF_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define SLWF_SHIFT	/;"	d	file:
SLWR_MASK	arch/arm/mach-tegra/pinmux-common.c	/^#define SLWR_MASK	/;"	d	file:
SLWR_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define SLWR_SHIFT	/;"	d	file:
SL_DLL_DYN_CON_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define SL_DLL_DYN_CON_EN	/;"	d
SM0_VOLTAGE_V1	drivers/power/tps6586x.c	/^	SM0_VOLTAGE_V1		= 0x26,$/;"	e	enum:__anone1ef2c880103	file:
SM0_VOLTAGE_V2	drivers/power/tps6586x.c	/^	SM0_VOLTAGE_V2,$/;"	e	enum:__anone1ef2c880103	file:
SM107_DEVICEID	board/renesas/sh7785lcr/selfcheck.c	/^#define SM107_DEVICEID	/;"	d	file:
SM1_VOLTAGE_V1	drivers/power/tps6586x.c	/^	SM1_VOLTAGE_V1		= 0x23,$/;"	e	enum:__anone1ef2c880103	file:
SM1_VOLTAGE_V2	drivers/power/tps6586x.c	/^	SM1_VOLTAGE_V2,$/;"	e	enum:__anone1ef2c880103	file:
SM501_FB_BASE	include/configs/TQM5200.h	/^#define SM501_FB_BASE	/;"	d
SM501_GPIO_51	board/tqc/tqm5200/tqm5200.c	/^#define SM501_GPIO_51	/;"	d	file:
SM501_GPIO_CTRL_HIGH	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_GPIO_CTRL_HIGH	/;"	d	file:
SM501_GPIO_CTRL_LOW	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_GPIO_CTRL_LOW	/;"	d	file:
SM501_GPIO_DATA_DIR_HIGH	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_GPIO_DATA_DIR_HIGH	/;"	d	file:
SM501_GPIO_DATA_DIR_HIGH	board/tqc/tqm5200/tqm5200.c	/^#define SM501_GPIO_DATA_DIR_HIGH	/;"	d	file:
SM501_GPIO_DATA_DIR_LOW	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_GPIO_DATA_DIR_LOW	/;"	d	file:
SM501_GPIO_DATA_HIGH	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_GPIO_DATA_HIGH	/;"	d	file:
SM501_GPIO_DATA_HIGH	board/tqc/tqm5200/tqm5200.c	/^#define SM501_GPIO_DATA_HIGH	/;"	d	file:
SM501_GPIO_DATA_LOW	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_GPIO_DATA_LOW	/;"	d	file:
SM501_MMIO_BASE	include/configs/TQM5200.h	/^#define SM501_MMIO_BASE	/;"	d
SM501_PANEL_DISPLAY_CONTROL	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_PANEL_DISPLAY_CONTROL	/;"	d	file:
SM501_POWER_MODE0_GATE	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_POWER_MODE0_GATE	/;"	d	file:
SM501_POWER_MODE0_GATE	board/tqc/tqm5200/tqm5200.c	/^#define SM501_POWER_MODE0_GATE	/;"	d	file:
SM501_POWER_MODE1_GATE	board/tqc/tqm5200/cmd_stk52xx.c	/^#define SM501_POWER_MODE1_GATE	/;"	d	file:
SM501_POWER_MODE1_GATE	board/tqc/tqm5200/tqm5200.c	/^#define SM501_POWER_MODE1_GATE	/;"	d	file:
SMALL	arch/arc/lib/memset.S	/^#define SMALL	/;"	d	file:
SMALL	lib/vsprintf.c	/^#define SMALL	/;"	d	file:
SMALLBIN_WIDTH	common/dlmalloc.c	/^#define SMALLBIN_WIDTH /;"	d	file:
SMALLEST	lib/zlib/trees.c	/^#define SMALLEST /;"	d	file:
SMALL_MEDIUM	include/u-boot/zlib.h	/^#    define SMALL_MEDIUM$/;"	d
SMALL_RAM	board/esd/vme8349/vme8349.c	/^#define SMALL_RAM	/;"	d	file:
SMARTIDLE	drivers/usb/musb-new/omap2430.h	/^#	define	SMARTIDLE	/;"	d
SMARTSTDBY	drivers/usb/musb-new/omap2430.h	/^#	define	SMARTSTDBY	/;"	d
SMART_IDLE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SMART_IDLE	/;"	d
SMASK	include/lattice.h	/^#define SMASK	/;"	d
SMBAUXCTL	drivers/i2c/intel_i2c.c	/^#define SMBAUXCTL	/;"	d	file:
SMBAUXCTL_CRC	drivers/i2c/intel_i2c.c	/^#define SMBAUXCTL_CRC	/;"	d	file:
SMBAUXCTL_E32B	drivers/i2c/intel_i2c.c	/^#define SMBAUXCTL_E32B	/;"	d	file:
SMBBLKDAT	drivers/i2c/intel_i2c.c	/^#define SMBBLKDAT	/;"	d	file:
SMBHSTCMD	drivers/i2c/intel_i2c.c	/^#define SMBHSTCMD	/;"	d	file:
SMBHSTCNT_INTREN	drivers/i2c/intel_i2c.c	/^#define SMBHSTCNT_INTREN	/;"	d	file:
SMBHSTCNT_KILL	drivers/i2c/intel_i2c.c	/^#define SMBHSTCNT_KILL	/;"	d	file:
SMBHSTCNT_LAST_BYTE	drivers/i2c/intel_i2c.c	/^#define SMBHSTCNT_LAST_BYTE	/;"	d	file:
SMBHSTCNT_PEC_EN	drivers/i2c/intel_i2c.c	/^#define SMBHSTCNT_PEC_EN	/;"	d	file:
SMBHSTCNT_START	drivers/i2c/intel_i2c.c	/^#define SMBHSTCNT_START	/;"	d	file:
SMBHSTCTL	drivers/i2c/intel_i2c.c	/^#define SMBHSTCTL	/;"	d	file:
SMBHSTDAT0	drivers/i2c/intel_i2c.c	/^#define SMBHSTDAT0	/;"	d	file:
SMBHSTDAT1	drivers/i2c/intel_i2c.c	/^#define SMBHSTDAT1	/;"	d	file:
SMBHSTSTAT	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTAT	/;"	d	file:
SMBHSTSTS_BUS_ERR	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_BUS_ERR	/;"	d	file:
SMBHSTSTS_BYTE_DONE	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_BYTE_DONE	/;"	d	file:
SMBHSTSTS_DEV_ERR	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_DEV_ERR	/;"	d	file:
SMBHSTSTS_FAILED	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_FAILED	/;"	d	file:
SMBHSTSTS_HOST_BUSY	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_HOST_BUSY	/;"	d	file:
SMBHSTSTS_INTR	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_INTR	/;"	d	file:
SMBHSTSTS_INUSE_STS	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_INUSE_STS	/;"	d	file:
SMBHSTSTS_SMBALERT_STS	drivers/i2c/intel_i2c.c	/^#define SMBHSTSTS_SMBALERT_STS	/;"	d	file:
SMBIOS_BIOS_INFORMATION	include/smbios.h	/^	SMBIOS_BIOS_INFORMATION = 0,$/;"	e	enum:__anon950ee03b0103
SMBIOS_BOARD_FEATURE_HOSTING	include/smbios.h	/^#define SMBIOS_BOARD_FEATURE_HOSTING	/;"	d
SMBIOS_BOARD_INFORMATION	include/smbios.h	/^	SMBIOS_BOARD_INFORMATION = 2,$/;"	e	enum:__anon950ee03b0103
SMBIOS_BOARD_MOTHERBOARD	include/smbios.h	/^#define SMBIOS_BOARD_MOTHERBOARD	/;"	d
SMBIOS_CACHE_INFORMATION	include/smbios.h	/^	SMBIOS_CACHE_INFORMATION = 7,$/;"	e	enum:__anon950ee03b0103
SMBIOS_ENCLOSURE_DESKTOP	include/smbios.h	/^#define SMBIOS_ENCLOSURE_DESKTOP	/;"	d
SMBIOS_END_OF_TABLE	include/smbios.h	/^	SMBIOS_END_OF_TABLE = 127$/;"	e	enum:__anon950ee03b0103
SMBIOS_INTERMEDIATE_OFFSET	include/smbios.h	/^#define SMBIOS_INTERMEDIATE_OFFSET	/;"	d
SMBIOS_MAJOR_VER	include/smbios.h	/^#define SMBIOS_MAJOR_VER	/;"	d
SMBIOS_MANUFACTURER	lib/Kconfig	/^config SMBIOS_MANUFACTURER$/;"	c	menu:Library routines""System tables
SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS	include/smbios.h	/^	SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19,$/;"	e	enum:__anon950ee03b0103
SMBIOS_MEMORY_DEVICE	include/smbios.h	/^	SMBIOS_MEMORY_DEVICE = 17,$/;"	e	enum:__anon950ee03b0103
SMBIOS_MINOR_VER	include/smbios.h	/^#define SMBIOS_MINOR_VER	/;"	d
SMBIOS_PHYS_MEMORY_ARRAY	include/smbios.h	/^	SMBIOS_PHYS_MEMORY_ARRAY = 16,$/;"	e	enum:__anon950ee03b0103
SMBIOS_PROCESSOR_FAMILY_OTHER	include/smbios.h	/^#define SMBIOS_PROCESSOR_FAMILY_OTHER	/;"	d
SMBIOS_PROCESSOR_FAMILY_UNKNOWN	include/smbios.h	/^#define SMBIOS_PROCESSOR_FAMILY_UNKNOWN	/;"	d
SMBIOS_PROCESSOR_INFORMATION	include/smbios.h	/^	SMBIOS_PROCESSOR_INFORMATION = 4,$/;"	e	enum:__anon950ee03b0103
SMBIOS_PROCESSOR_STATUS_ENABLED	include/smbios.h	/^#define SMBIOS_PROCESSOR_STATUS_ENABLED	/;"	d
SMBIOS_PROCESSOR_TYPE_CENTRAL	include/smbios.h	/^#define SMBIOS_PROCESSOR_TYPE_CENTRAL	/;"	d
SMBIOS_PROCESSOR_UPGRADE_NONE	include/smbios.h	/^#define SMBIOS_PROCESSOR_UPGRADE_NONE	/;"	d
SMBIOS_PRODUCT_NAME	board/intel/galileo/Kconfig	/^config SMBIOS_PRODUCT_NAME$/;"	c
SMBIOS_PRODUCT_NAME	lib/Kconfig	/^config SMBIOS_PRODUCT_NAME$/;"	c	menu:Library routines""System tables
SMBIOS_SECURITY_NONE	include/smbios.h	/^#define SMBIOS_SECURITY_NONE	/;"	d
SMBIOS_STATE_SAFE	include/smbios.h	/^#define SMBIOS_STATE_SAFE	/;"	d
SMBIOS_STRUCT_EOS_BYTES	include/smbios.h	/^#define SMBIOS_STRUCT_EOS_BYTES	/;"	d
SMBIOS_SYSTEM_BOOT_INFORMATION	include/smbios.h	/^	SMBIOS_SYSTEM_BOOT_INFORMATION = 32,$/;"	e	enum:__anon950ee03b0103
SMBIOS_SYSTEM_ENCLOSURE	include/smbios.h	/^	SMBIOS_SYSTEM_ENCLOSURE = 3,$/;"	e	enum:__anon950ee03b0103
SMBIOS_SYSTEM_INFORMATION	include/smbios.h	/^	SMBIOS_SYSTEM_INFORMATION = 1,$/;"	e	enum:__anon950ee03b0103
SMBIOS_SYSTEM_SLOTS	include/smbios.h	/^	SMBIOS_SYSTEM_SLOTS = 9,$/;"	e	enum:__anon950ee03b0103
SMBIOS_TABLE_GUID	include/efi_api.h	/^#define SMBIOS_TABLE_GUID /;"	d
SMBSLVDATA	drivers/i2c/intel_i2c.c	/^#define SMBSLVDATA	/;"	d	file:
SMBTRNSADD	drivers/i2c/intel_i2c.c	/^#define SMBTRNSADD	/;"	d	file:
SMBUS_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define SMBUS_BASE_ADDRESS	/;"	d
SMBUS_BASE_ADDRESS	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define SMBUS_BASE_ADDRESS	/;"	d
SMBUS_BASE_SIZE	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define SMBUS_BASE_SIZE	/;"	d
SMBUS_IO_BASE	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SMBUS_IO_BASE	/;"	d
SMBUS_PIN_CTL	drivers/i2c/intel_i2c.c	/^#define SMBUS_PIN_CTL	/;"	d	file:
SMBUS_TIMEOUT	drivers/i2c/intel_i2c.c	/^#define SMBUS_TIMEOUT	/;"	d	file:
SMBXMITADD	drivers/i2c/intel_i2c.c	/^#define SMBXMITADD	/;"	d	file:
SMB_BASE	drivers/i2c/intel_i2c.c	/^#define SMB_BASE	/;"	d	file:
SMB_RCV_SLVA	drivers/i2c/intel_i2c.c	/^#define SMB_RCV_SLVA	/;"	d	file:
SMB_WAK_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SMB_WAK_STS	/;"	d
SMB_WAK_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SMB_WAK_STS	/;"	d
SMC0_EPPI2_LP1_SWITCH	board/bf609-ezkit/soft_switch.h	/^#define SMC0_EPPI2_LP1_SWITCH /;"	d
SMC0_LP0_EN	board/bf609-ezkit/soft_switch.h	/^#define SMC0_LP0_EN /;"	d
SMC91111_DATA_REG	drivers/net/smc91111.h	/^#define	SMC91111_DATA_REG	/;"	d
SMC91111_EEPROM_INIT	examples/standalone/smc91111_eeprom.c	/^# define SMC91111_EEPROM_INIT(/;"	d	file:
SMC91111_EEPROM_INIT	include/configs/bf533-ezkit.h	/^#define SMC91111_EEPROM_INIT(/;"	d
SMC91111_EEPROM_INIT	include/configs/bf533-stamp.h	/^#define SMC91111_EEPROM_INIT(/;"	d
SMC91111_INT_REG	drivers/net/smc91111.h	/^#define	SMC91111_INT_REG	/;"	d
SMC911X_BASE	arch/arm/mach-uniphier/micro-support-card.c	/^#define SMC911X_BASE	/;"	d	file:
SMCMR_BS	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_BS	/;"	d
SMCMR_BS	include/commproc.h	/^#define SMCMR_BS	/;"	d
SMCMR_DM	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_DM	/;"	d
SMCMR_DM	include/commproc.h	/^#define SMCMR_DM	/;"	d
SMCMR_PEN	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_PEN	/;"	d
SMCMR_PEN	include/commproc.h	/^#define SMCMR_PEN	/;"	d
SMCMR_PM_EVEN	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_PM_EVEN	/;"	d
SMCMR_PM_EVEN	include/commproc.h	/^#define SMCMR_PM_EVEN	/;"	d
SMCMR_REN	arch/powerpc/include/asm/cpm_8260.h	/^#define	SMCMR_REN	/;"	d
SMCMR_REN	include/commproc.h	/^#define	SMCMR_REN	/;"	d
SMCMR_REVD	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_REVD	/;"	d
SMCMR_REVD	include/commproc.h	/^#define SMCMR_REVD	/;"	d
SMCMR_SL	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_SL	/;"	d
SMCMR_SL	include/commproc.h	/^#define SMCMR_SL	/;"	d
SMCMR_SM_GCI	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_SM_GCI	/;"	d
SMCMR_SM_GCI	include/commproc.h	/^#define SMCMR_SM_GCI	/;"	d
SMCMR_SM_MASK	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_SM_MASK	/;"	d
SMCMR_SM_MASK	include/commproc.h	/^#define SMCMR_SM_MASK	/;"	d
SMCMR_SM_TRANS	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_SM_TRANS	/;"	d
SMCMR_SM_TRANS	include/commproc.h	/^#define SMCMR_SM_TRANS	/;"	d
SMCMR_SM_UART	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_SM_UART	/;"	d
SMCMR_SM_UART	include/commproc.h	/^#define SMCMR_SM_UART	/;"	d
SMCMR_TEN	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCMR_TEN	/;"	d
SMCMR_TEN	include/commproc.h	/^#define SMCMR_TEN	/;"	d
SMCM_BRK	include/commproc.h	/^#define	SMCM_BRK	/;"	d
SMCM_BRKE	include/commproc.h	/^#define	SMCM_BRKE	/;"	d
SMCM_BSY	arch/powerpc/include/asm/cpm_8260.h	/^#define	SMCM_BSY	/;"	d
SMCM_BSY	include/commproc.h	/^#define	SMCM_BSY	/;"	d
SMCM_RX	arch/powerpc/include/asm/cpm_8260.h	/^#define	SMCM_RX	/;"	d
SMCM_RX	include/commproc.h	/^#define	SMCM_RX	/;"	d
SMCM_TX	arch/powerpc/include/asm/cpm_8260.h	/^#define	SMCM_TX	/;"	d
SMCM_TX	include/commproc.h	/^#define	SMCM_TX	/;"	d
SMCM_TXE	arch/powerpc/include/asm/cpm_8260.h	/^#define	SMCM_TXE	/;"	d
SMCM_TXE	include/commproc.h	/^#define	SMCM_TXE	/;"	d
SMCREG	drivers/net/lan91c96.h	/^#define	SMCREG(/;"	d
SMCR_CLEN_MASK	arch/powerpc/include/asm/cpm_8260.h	/^#define SMCR_CLEN_MASK	/;"	d
SMCR_CLEN_MASK	include/commproc.h	/^#define SMCR_CLEN_MASK	/;"	d
SMCSJR_AERR	include/fsl_sec.h	/^#define SMCSJR_AERR	/;"	d
SMCSJR_PO	include/fsl_sec.h	/^#define SMCSJR_PO	/;"	d
SMC_ALLOC_MAX_TRY	drivers/net/lan91c96.c	/^#define SMC_ALLOC_MAX_TRY /;"	d	file:
SMC_ALLOC_MAX_TRY	drivers/net/smc91111.c	/^#define SMC_ALLOC_MAX_TRY /;"	d	file:
SMC_B0CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B0CTL /;"	d
SMC_B0ETIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B0ETIM /;"	d
SMC_B0TIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B0TIM /;"	d
SMC_B1CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B1CTL /;"	d
SMC_B1ETIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B1ETIM /;"	d
SMC_B1TIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B1TIM /;"	d
SMC_B2CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B2CTL /;"	d
SMC_B2ETIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B2ETIM /;"	d
SMC_B2TIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B2TIM /;"	d
SMC_B3CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B3CTL /;"	d
SMC_B3ETIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B3ETIM /;"	d
SMC_B3TIM	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_B3TIM /;"	d
SMC_BANK0_CR_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SMC_BANK0_CR_A	/;"	d	file:
SMC_BANK0_CR_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SMC_BANK0_CR_D	/;"	d	file:
SMC_BANK0_TPR_A	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SMC_BANK0_TPR_A	/;"	d	file:
SMC_BANK0_TPR_D	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^#define SMC_BANK0_TPR_D	/;"	d	file:
SMC_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_BASE	/;"	d
SMC_BASE_ADDRESS	examples/standalone/smc91111_eeprom.c	/^#define SMC_BASE_ADDRESS /;"	d	file:
SMC_BCR6_VALUE	board/cirrus/edb93xx/edb93xx.c	/^#define SMC_BCR6_VALUE	/;"	d	file:
SMC_BCR_BLE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_BCR_BLE	/;"	d
SMC_BCR_IDCY_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_BCR_IDCY_SHIFT	/;"	d
SMC_BCR_MW_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_BCR_MW_SHIFT	/;"	d
SMC_BCR_WST1_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_BCR_WST1_SHIFT	/;"	d
SMC_BCR_WST2_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_BCR_WST2_SHIFT	/;"	d
SMC_BC_PMC	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_PMC(/;"	d
SMC_BC_TACC	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_TACC(/;"	d
SMC_BC_TACP	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_TACP(/;"	d
SMC_BC_TACS	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_TACS(/;"	d
SMC_BC_TAH	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_TAH(/;"	d
SMC_BC_TCOH	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_TCOH(/;"	d
SMC_BC_TCOS	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BC_TCOS(/;"	d
SMC_BYTE_ADDR_MODE	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BYTE_ADDR_MODE(/;"	d
SMC_BYTE_ENABLE	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_BYTE_ENABLE(/;"	d
SMC_CENT_F	include/commproc.h	/^#define SMC_CENT_F	/;"	d
SMC_CENT_PE	include/commproc.h	/^#define SMC_CENT_PE	/;"	d
SMC_CENT_S	include/commproc.h	/^#define SMC_CENT_S	/;"	d
SMC_DATA16_WIDTH	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_DATA16_WIDTH(/;"	d
SMC_DEBUG	drivers/net/lan91c96.c	/^#define SMC_DEBUG /;"	d	file:
SMC_DEBUG	drivers/net/smc91111.c	/^#define SMC_DEBUG /;"	d	file:
SMC_DEV_NAME	drivers/net/smc91111.c	/^#define SMC_DEV_NAME /;"	d	file:
SMC_DISABLE_INT	drivers/net/lan91c96.h	/^#define SMC_DISABLE_INT(/;"	d
SMC_DISABLE_INT	drivers/net/smc91111.h	/^#define SMC_DISABLE_INT(/;"	d
SMC_EB	include/commproc.h	/^#define SMC_EB	/;"	d
SMC_ENABLE_INT	drivers/net/lan91c96.h	/^#define SMC_ENABLE_INT(/;"	d
SMC_ENABLE_INT	drivers/net/smc91111.h	/^#define SMC_ENABLE_INT(/;"	d
SMC_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SMC_FREQ /;"	d
SMC_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SMC_FREQ /;"	d
SMC_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SMC_FREQ /;"	d
SMC_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SMC_FREQ /;"	d
SMC_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SMC_FREQ /;"	d
SMC_GCTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_GCTL /;"	d
SMC_GSTAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SMC_GSTAT /;"	d
SMC_INDEX	arch/powerpc/cpu/mpc8260/serial_smc.c	/^#define SMC_INDEX	/;"	d	file:
SMC_INDEX	arch/powerpc/cpu/mpc8xx/serial.c	/^#define	SMC_INDEX	/;"	d	file:
SMC_INDEX	arch/powerpc/cpu/mpc8xx/serial.c	/^#define SMC_INDEX	/;"	d	file:
SMC_INTERRUPT_MASK	drivers/net/lan91c96.h	/^#define SMC_INTERRUPT_MASK /;"	d
SMC_INTERRUPT_MASK	drivers/net/smc91111.h	/^#define SMC_INTERRUPT_MASK /;"	d
SMC_IO_EXTENT	drivers/net/lan91c96.h	/^#define	SMC_IO_EXTENT	/;"	d
SMC_IO_EXTENT	drivers/net/smc91111.h	/^#define	SMC_IO_EXTENT	/;"	d
SMC_IO_SHIFT	drivers/net/lan91c96.h	/^#define	SMC_IO_SHIFT	/;"	d
SMC_LEON_SWAP16	drivers/net/smc91111.h	/^#define SMC_LEON_SWAP16(/;"	d
SMC_LEON_SWAP32	drivers/net/smc91111.h	/^#define SMC_LEON_SWAP32(/;"	d
SMC_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SMC_OFFSET	/;"	d
SMC_PHY_ADDR	drivers/net/smc91111.c	/^#define SMC_PHY_ADDR /;"	d	file:
SMC_PHY_CLOCK_DELAY	drivers/net/smc91111.c	/^#define SMC_PHY_CLOCK_DELAY /;"	d	file:
SMC_REG_BASE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SMC_REG_BASE	/;"	d
SMC_SELECT_BANK	drivers/net/lan91c96.h	/^#define SMC_SELECT_BANK(/;"	d
SMC_SELECT_BANK	drivers/net/smc91111.h	/^#define SMC_SELECT_BANK(/;"	d
SMC_SIP_INVOKE_MCE	arch/arm/mach-tegra/tegra186/cache.S	/^#define SMC_SIP_INVOKE_MCE	/;"	d	file:
SMC_TX_TIMEOUT	drivers/net/lan91c96.c	/^#define SMC_TX_TIMEOUT /;"	d	file:
SMC_TX_TIMEOUT	drivers/net/smc91111.c	/^#define SMC_TX_TIMEOUT /;"	d	file:
SMC_WAIT_ENABLE	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define SMC_WAIT_ENABLE(/;"	d
SMC_inb	drivers/net/lan91c96.h	/^#define  SMC_inb(/;"	d
SMC_inb	drivers/net/lan91c96.h	/^#define SMC_inb(/;"	d
SMC_inb	drivers/net/smc91111.c	/^static inline byte SMC_inb(struct eth_device *dev, dword offset)$/;"	f	typeref:typename:byte	file:
SMC_inb	drivers/net/smc91111.h	/^#define  SMC_inb(/;"	d
SMC_inb	drivers/net/smc91111.h	/^#define SMC_inb(/;"	d
SMC_inl	drivers/net/lan91c96.h	/^#define	SMC_inl(/;"	d
SMC_inl	drivers/net/smc91111.h	/^#define	SMC_inl(/;"	d
SMC_inl_nosw	drivers/net/smc91111.h	/^#define	SMC_inl_nosw(/;"	d
SMC_insb	drivers/net/lan91c96.h	/^#define SMC_insb(/;"	d
SMC_insb	drivers/net/smc91111.h	/^#define SMC_insb(/;"	d
SMC_insl	drivers/net/lan91c96.h	/^#define SMC_insl(/;"	d
SMC_insl	drivers/net/smc91111.h	/^#define SMC_insl(/;"	d
SMC_insw	drivers/net/lan91c96.h	/^#define SMC_insw(/;"	d
SMC_insw	drivers/net/smc91111.c	/^static inline void SMC_insw(struct eth_device *dev, dword offset,$/;"	f	typeref:typename:void	file:
SMC_insw	drivers/net/smc91111.h	/^#define SMC_insw(/;"	d
SMC_inw	drivers/net/lan91c96.h	/^#define	SMC_inw(/;"	d
SMC_inw	drivers/net/smc91111.c	/^static inline word SMC_inw(struct eth_device *dev, dword offset)$/;"	f	typeref:typename:word	file:
SMC_inw	drivers/net/smc91111.h	/^#define	SMC_inw(/;"	d
SMC_inw	drivers/net/smc91111.h	/^#define SMC_inw(/;"	d
SMC_inw_nosw	drivers/net/smc91111.h	/^#define	SMC_inw_nosw(/;"	d
SMC_outb	drivers/net/lan91c96.h	/^#define	SMC_outb(/;"	d
SMC_outb	drivers/net/smc91111.c	/^static inline void SMC_outb(struct eth_device *dev, byte value, dword offset)$/;"	f	typeref:typename:void	file:
SMC_outb	drivers/net/smc91111.h	/^#define	SMC_outb(/;"	d
SMC_outl	drivers/net/lan91c96.h	/^#define	SMC_outl(/;"	d
SMC_outl	drivers/net/smc91111.h	/^#define	SMC_outl(/;"	d
SMC_outl_nosw	drivers/net/smc91111.h	/^#define	SMC_outl_nosw(/;"	d
SMC_outsl	drivers/net/lan91c96.h	/^#define SMC_outsl(/;"	d
SMC_outsl	drivers/net/smc91111.h	/^#define SMC_outsl(/;"	d
SMC_outsw	drivers/net/lan91c96.h	/^#define SMC_outsw(/;"	d
SMC_outsw	drivers/net/smc91111.c	/^static inline void SMC_outsw(struct eth_device *dev, dword offset,$/;"	f	typeref:typename:void	file:
SMC_outsw	drivers/net/smc91111.h	/^#define SMC_outsw(/;"	d
SMC_outw	drivers/net/lan91c96.h	/^#define	SMC_outw(/;"	d
SMC_outw	drivers/net/smc91111.c	/^static inline void SMC_outw(struct eth_device *dev, word value, dword offset)$/;"	f	typeref:typename:void	file:
SMC_outw	drivers/net/smc91111.h	/^#define	SMC_outw(/;"	d
SMC_outw_nosw	drivers/net/smc91111.h	/^#define	SMC_outw_nosw(/;"	d
SMIBANK0_BASE	include/linux/mtd/st_smi.h	/^#define SMIBANK0_BASE	/;"	d
SMIBANK1_BASE	include/linux/mtd/st_smi.h	/^#define SMIBANK1_BASE	/;"	d
SMIBANK2_BASE	include/linux/mtd/st_smi.h	/^#define SMIBANK2_BASE	/;"	d
SMIBANK3_BASE	include/linux/mtd/st_smi.h	/^#define SMIBANK3_BASE	/;"	d
SMII_SEL	board/amcc/bamboo/bamboo.h	/^			    SMII_SEL,$/;"	e	enum:config_list
SMIRD_OP	drivers/net/phy/mv88e6352.c	/^#define SMIRD_OP	/;"	d	file:
SMIWR_OP	drivers/net/phy/mv88e6352.c	/^#define SMIWR_OP	/;"	d	file:
SMI_BUSY	drivers/net/armada100_fec.h	/^#define SMI_BUSY /;"	d
SMI_BUSY	drivers/net/phy/mv88e61xx.c	/^#define SMI_BUSY	/;"	d	file:
SMI_BUSY_MASK	drivers/net/phy/mv88e6352.c	/^#define SMI_BUSY_MASK	/;"	d	file:
SMI_CMD_ADDR_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_ADDR_SHIFT	/;"	d	file:
SMI_CMD_ADDR_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_ADDR_WIDTH	/;"	d	file:
SMI_CMD_CLAUSE_22	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_CLAUSE_22	/;"	d	file:
SMI_CMD_CLAUSE_22_OP_READ	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_CLAUSE_22_OP_READ	/;"	d	file:
SMI_CMD_CLAUSE_22_OP_WRITE	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_CLAUSE_22_OP_WRITE	/;"	d	file:
SMI_CMD_READ	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_READ	/;"	d	file:
SMI_CMD_REG	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_REG	/;"	d	file:
SMI_CMD_REG_SHIFT	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_REG_SHIFT	/;"	d	file:
SMI_CMD_REG_WIDTH	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_REG_WIDTH	/;"	d	file:
SMI_CMD_WRITE	drivers/net/phy/mv88e61xx.c	/^#define SMI_CMD_WRITE	/;"	d	file:
SMI_DATA_REG	drivers/net/phy/mv88e61xx.c	/^#define SMI_DATA_REG	/;"	d	file:
SMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define SMI_EN	/;"	d
SMI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SMI_EN	/;"	d
SMI_HDR	drivers/net/phy/mv88e6352.c	/^#define SMI_HDR	/;"	d	file:
SMI_LOCK	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  SMI_LOCK	/;"	d
SMI_LOCK	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  SMI_LOCK	/;"	d
SMI_MASK	drivers/net/phy/mv88e6352.c	/^#define SMI_MASK	/;"	d	file:
SMI_OP_R	drivers/net/armada100_fec.h	/^#define SMI_OP_R /;"	d
SMI_OP_W	drivers/net/armada100_fec.h	/^#define SMI_OP_W /;"	d
SMI_REGS	include/sm501.h	/^} SMI_REGS;$/;"	t	typeref:struct:__anond2aa10c40108
SMI_R_VALID	drivers/net/armada100_fec.h	/^#define SMI_R_VALID /;"	d
SMI_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define SMI_STS	/;"	d
SMI_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SMI_STS	/;"	d
SMLINK_PIN_CTL	drivers/i2c/intel_i2c.c	/^#define SMLINK_PIN_CTL	/;"	d	file:
SMLT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SMLT	/;"	d
SMMU_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define SMMU_BASE	/;"	d
SMMU_IDR0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_IDR0	/;"	d
SMMU_IDR0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_IDR0	/;"	d
SMMU_IDR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_IDR1	/;"	d
SMMU_IDR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_IDR1	/;"	d
SMMU_NSACR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_NSACR	/;"	d
SMMU_NSACR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_NSACR	/;"	d
SMMU_NSCR0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_NSCR0	/;"	d
SMMU_NSCR0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_NSCR0	/;"	d
SMMU_NSCR2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_NSCR2	/;"	d
SMMU_NSCR2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_NSCR2	/;"	d
SMMU_SACR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_SACR	/;"	d
SMMU_SACR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_SACR	/;"	d
SMMU_SCR0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_SCR0	/;"	d
SMMU_SCR0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_SCR0	/;"	d
SMMU_SCR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_SCR1	/;"	d
SMMU_SCR1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_SCR1	/;"	d
SMMU_SCR2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SMMU_SCR2	/;"	d
SMMU_SCR2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define SMMU_SCR2	/;"	d
SMM_TSEG	arch/x86/Kconfig	/^config SMM_TSEG$/;"	c	menu:x86 architecture
SMM_TSEG_SIZE	arch/x86/Kconfig	/^config SMM_TSEG_SIZE$/;"	c	menu:x86 architecture
SMM_TSEG_SIZE	arch/x86/cpu/broadwell/Kconfig	/^config SMM_TSEG_SIZE$/;"	c
SMM_TSEG_SIZE	arch/x86/cpu/ivybridge/Kconfig	/^config SMM_TSEG_SIZE$/;"	c
SMNAND_ENV_OFFSET	include/configs/am3517_crane.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/am3517_evm.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/cm_t35.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/cm_t3517.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/devkit8000.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/mcx.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_beagle.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_cairo.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_evm.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_logic.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_overo.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_pandora.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/omap3_zoom1.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/tam3517-common.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMNAND_ENV_OFFSET	include/configs/tao3530.h	/^#define SMNAND_ENV_OFFSET	/;"	d
SMODE	include/sym53c8xx.h	/^	#define SMODE	/;"	d
SMODE_AUTO_REFRESH	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^	SMODE_AUTO_REFRESH,$/;"	e	enum:__anon1af476220103	file:
SMODE_HVD	include/sym53c8xx.h	/^	#define SMODE_HVD /;"	d
SMODE_LOAD_REG	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^	SMODE_LOAD_REG,$/;"	e	enum:__anon1af476220103	file:
SMODE_LVD	include/sym53c8xx.h	/^	#define SMODE_LVD /;"	d
SMODE_MANUAL_REFRESH	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^	SMODE_MANUAL_REFRESH$/;"	e	enum:__anon1af476220103	file:
SMODE_NORMAL	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^	SMODE_NORMAL =	0,$/;"	e	enum:__anon1af476220103	file:
SMODE_PRECHARGE	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^	SMODE_PRECHARGE,$/;"	e	enum:__anon1af476220103	file:
SMODE_READY_CTR	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define SMODE_READY_CTR	/;"	d
SMODE_READ_BURST	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define SMODE_READ_BURST	/;"	d
SMODE_SE	include/sym53c8xx.h	/^	#define SMODE_SE /;"	d
SMP	arch/x86/Kconfig	/^config SMP$/;"	c	menu:x86 architecture
SMPS10_CTRL	include/palmas.h	/^#define SMPS10_CTRL	/;"	d
SMPS10_MODE_ACTIVE_D	include/palmas.h	/^#define SMPS10_MODE_ACTIVE_D	/;"	d
SMPS7_CTRL	include/palmas.h	/^#define SMPS7_CTRL	/;"	d
SMPS9_CTRL	include/palmas.h	/^#define SMPS9_CTRL	/;"	d
SMPS9_VOLTAGE	include/palmas.h	/^#define SMPS9_VOLTAGE	/;"	d
SMPS_I2C_SLAVE_ADDR	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_I2C_SLAVE_ADDR	/;"	d
SMPS_I2C_SLAVE_ADDR	arch/arm/include/asm/arch-omap5/clock.h	/^#define SMPS_I2C_SLAVE_ADDR	/;"	d
SMPS_MODE_ACT_AUTO	include/palmas.h	/^#define SMPS_MODE_ACT_AUTO	/;"	d
SMPS_MODE_ACT_ECO	include/palmas.h	/^#define SMPS_MODE_ACT_ECO	/;"	d
SMPS_MODE_ACT_FPWM	include/palmas.h	/^#define SMPS_MODE_ACT_FPWM	/;"	d
SMPS_MODE_MASK	drivers/power/regulator/palmas_regulator.c	/^#define	SMPS_MODE_MASK	/;"	d	file:
SMPS_MODE_SHIFT	drivers/power/regulator/palmas_regulator.c	/^#define	SMPS_MODE_SHIFT	/;"	d	file:
SMPS_MODE_SLP_AUTO	include/palmas.h	/^#define SMPS_MODE_SLP_AUTO	/;"	d
SMPS_MODE_SLP_ECO	include/palmas.h	/^#define SMPS_MODE_SLP_ECO	/;"	d
SMPS_MODE_SLP_FPWM	include/palmas.h	/^#define SMPS_MODE_SLP_FPWM	/;"	d
SMPS_REG_ADDR_12_MPU	arch/arm/include/asm/arch-omap5/clock.h	/^#define SMPS_REG_ADDR_12_MPU	/;"	d
SMPS_REG_ADDR_45_IVA	arch/arm/include/asm/arch-omap5/clock.h	/^#define SMPS_REG_ADDR_45_IVA	/;"	d
SMPS_REG_ADDR_8_CORE	arch/arm/include/asm/arch-omap5/clock.h	/^#define SMPS_REG_ADDR_8_CORE	/;"	d
SMPS_REG_ADDR_SMPS1	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_REG_ADDR_SMPS1	/;"	d
SMPS_REG_ADDR_SMPS2	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_REG_ADDR_SMPS2	/;"	d
SMPS_REG_ADDR_SMPS5	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_REG_ADDR_SMPS5	/;"	d
SMPS_REG_ADDR_VCORE1	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_REG_ADDR_VCORE1	/;"	d
SMPS_REG_ADDR_VCORE2	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_REG_ADDR_VCORE2	/;"	d
SMPS_REG_ADDR_VCORE3	arch/arm/include/asm/arch-omap4/clock.h	/^#define SMPS_REG_ADDR_VCORE3	/;"	d
SMPS_VOLT_1V2	include/palmas.h	/^#define SMPS_VOLT_1V2	/;"	d
SMPS_VOLT_1V8	include/palmas.h	/^#define SMPS_VOLT_1V8	/;"	d
SMPS_VOLT_2V1	include/palmas.h	/^#define SMPS_VOLT_2V1	/;"	d
SMPS_VOLT_3V0	include/palmas.h	/^#define SMPS_VOLT_3V0	/;"	d
SMPS_VOLT_3V3	include/palmas.h	/^#define SMPS_VOLT_3V3	/;"	d
SMPS_VOLT_OFF	include/palmas.h	/^#define SMPS_VOLT_OFF	/;"	d
SMP_CACHE_BYTES	arch/blackfin/include/asm/cache.h	/^#define SMP_CACHE_BYTES	/;"	d
SMP_CACHE_BYTES	arch/powerpc/include/asm/cache.h	/^#define	SMP_CACHE_BYTES /;"	d
SMP_MB	arch/powerpc/include/asm/bitops.h	/^#define SMP_MB	/;"	d
SMP_MB	arch/powerpc/include/asm/bitops.h	/^#define SMP_MB$/;"	d
SMP_WMB	arch/powerpc/include/asm/bitops.h	/^#define SMP_WMB	/;"	d
SMP_WMB	arch/powerpc/include/asm/bitops.h	/^#define SMP_WMB$/;"	d
SMR0	arch/sh/include/asm/cpu_sh7757.h	/^#define SMR0	/;"	d
SMRAM	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SMRAM	/;"	d
SMRDATA	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^SMRDATA:$/;"	l
SMRDATA	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^SMRDATA:$/;"	l
SMRDATA	board/samsung/smdk2410/lowlevel_init.S	/^SMRDATA:$/;"	l
SMRDATA1	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^SMRDATA1:$/;"	l
SMRDATA1	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^SMRDATA1:$/;"	l
SMRDATA1E	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^SMRDATA1E:$/;"	l
SMRDATA2	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^SMRDATA2:$/;"	l
SMRDATAE	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^SMRDATAE:$/;"	l
SMSC9118_BASE	board/micronas/vct/smc_eeprom.c	/^#define SMSC9118_BASE	/;"	d	file:
SMSC95XX_BASE_NAME	drivers/usb/eth/smsc95xx.c	/^#define SMSC95XX_BASE_NAME /;"	d	file:
SMSC95XX_INTERNAL_PHY_ID	drivers/usb/eth/smsc95xx.c	/^#define SMSC95XX_INTERNAL_PHY_ID	/;"	d	file:
SMSC_NRESET	board/gumstix/duovero/duovero.c	/^#define SMSC_NRESET	/;"	d	file:
SMSTPCR0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR0	/;"	d
SMSTPCR0	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR0	/;"	d
SMSTPCR1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR1	/;"	d
SMSTPCR1	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR1	/;"	d
SMSTPCR10	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR10	/;"	d
SMSTPCR10	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR10	/;"	d
SMSTPCR11	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR11	/;"	d
SMSTPCR11	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR11	/;"	d
SMSTPCR1_CMT0	board/kmc/kzm9g/kzm9g.c	/^#define SMSTPCR1_CMT0	/;"	d	file:
SMSTPCR1_I2C0	board/kmc/kzm9g/kzm9g.c	/^#define SMSTPCR1_I2C0	/;"	d	file:
SMSTPCR2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR2	/;"	d
SMSTPCR2	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR2	/;"	d
SMSTPCR3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR3	/;"	d
SMSTPCR3	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR3	/;"	d
SMSTPCR3	board/renesas/lager/lager.c	/^#define SMSTPCR3	/;"	d	file:
SMSTPCR3	board/renesas/stout/stout.c	/^#define SMSTPCR3	/;"	d	file:
SMSTPCR3_I2C1	board/kmc/kzm9g/kzm9g.c	/^#define SMSTPCR3_I2C1	/;"	d	file:
SMSTPCR3_USB	board/kmc/kzm9g/kzm9g.c	/^#define SMSTPCR3_USB	/;"	d	file:
SMSTPCR4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR4	/;"	d
SMSTPCR4	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR4	/;"	d
SMSTPCR5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR5	/;"	d
SMSTPCR5	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR5	/;"	d
SMSTPCR6	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR6	/;"	d
SMSTPCR7	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define SMSTPCR7 /;"	d
SMSTPCR7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR7	/;"	d
SMSTPCR7	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR7	/;"	d
SMSTPCR703	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define SMSTPCR703 /;"	d
SMSTPCR8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR8	/;"	d
SMSTPCR8	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR8	/;"	d
SMSTPCR9	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SMSTPCR9	/;"	d
SMSTPCR9	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SMSTPCR9	/;"	d
SMVID_V2	include/fsl_sec.h	/^#define SMVID_V2 /;"	d
SMX_APE_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define SMX_APE_BASE	/;"	d
SM_4C_ELC	arch/sparc/include/asm/machines.h	/^#define SM_4C_ELC /;"	d
SM_4C_IPC	arch/sparc/include/asm/machines.h	/^#define SM_4C_IPC /;"	d
SM_4C_IPX	arch/sparc/include/asm/machines.h	/^#define SM_4C_IPX /;"	d
SM_4C_SLC	arch/sparc/include/asm/machines.h	/^#define SM_4C_SLC /;"	d
SM_4C_SS1	arch/sparc/include/asm/machines.h	/^#define SM_4C_SS1 /;"	d
SM_4C_SS1PLUS	arch/sparc/include/asm/machines.h	/^#define SM_4C_SS1PLUS /;"	d
SM_4C_SS2	arch/sparc/include/asm/machines.h	/^#define SM_4C_SS2 /;"	d
SM_4M_SS40	arch/sparc/include/asm/machines.h	/^#define SM_4M_SS40 /;"	d
SM_4M_SS50	arch/sparc/include/asm/machines.h	/^#define SM_4M_SS50 /;"	d
SM_4M_SS60	arch/sparc/include/asm/machines.h	/^#define SM_4M_SS60 /;"	d
SM_4_110	arch/sparc/include/asm/machines.h	/^#define SM_4_110 /;"	d
SM_4_260	arch/sparc/include/asm/machines.h	/^#define SM_4_260 /;"	d
SM_4_330	arch/sparc/include/asm/machines.h	/^#define SM_4_330 /;"	d
SM_4_470	arch/sparc/include/asm/machines.h	/^#define SM_4_470 /;"	d
SM_ARCH_MASK	arch/sparc/include/asm/machines.h	/^#define SM_ARCH_MASK /;"	d
SM_BF	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_BF(/;"	d
SM_BFEXT	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_BFEXT(/;"	d
SM_BFINS	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_BFINS(/;"	d
SM_BIT	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_BIT(/;"	d
SM_BOD_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_BOD_OFFSET	/;"	d
SM_BOD_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_BOD_SIZE	/;"	d
SM_CEN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CEN_OFFSET	/;"	d
SM_CEN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CEN_SIZE	/;"	d
SM_CKRDY_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CKRDY_OFFSET	/;"	d
SM_CKRDY_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CKRDY_SIZE	/;"	d
SM_CLKEN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CLKEN_OFFSET	/;"	d
SM_CLKEN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CLKEN_SIZE	/;"	d
SM_CMD	include/fsl_sec.h	/^#define SM_CMD(/;"	d
SM_CPC_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CPC_OFFSET	/;"	d
SM_CPC_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CPC_SIZE	/;"	d
SM_CPUDIV_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CPUDIV_OFFSET	/;"	d
SM_CPUDIV_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CPUDIV_SIZE	/;"	d
SM_CPUSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CPUSEL_OFFSET	/;"	d
SM_CPUSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_CPUSEL_SIZE	/;"	d
SM_DIVEN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_DIVEN_OFFSET	/;"	d
SM_DIVEN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_DIVEN_SIZE	/;"	d
SM_DIV_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_DIV_OFFSET	/;"	d
SM_DIV_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_DIV_SIZE	/;"	d
SM_EIM_EDGE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_EDGE	/;"	d
SM_EIM_ICR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_ICR	/;"	d
SM_EIM_IDR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_IDR	/;"	d
SM_EIM_IER	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_IER	/;"	d
SM_EIM_IMR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_IMR	/;"	d
SM_EIM_ISR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_ISR	/;"	d
SM_EIM_LEVEL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_LEVEL	/;"	d
SM_EIM_MODE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_MODE	/;"	d
SM_EIM_NMIC	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_NMIC	/;"	d
SM_EIM_TEST	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EIM_TEST	/;"	d
SM_EN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EN_OFFSET	/;"	d
SM_EN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EN_SIZE	/;"	d
SM_EXT_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EXT_OFFSET	/;"	d
SM_EXT_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_EXT_SIZE	/;"	d
SM_GROUP1	include/fsl_sec.h	/^#define SM_GROUP1(/;"	d
SM_GROUP2	include/fsl_sec.h	/^#define SM_GROUP2(/;"	d
SM_HSBDIV_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_HSBDIV_OFFSET	/;"	d
SM_HSBDIV_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_HSBDIV_SIZE	/;"	d
SM_HSBSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_HSBSEL_OFFSET	/;"	d
SM_HSBSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_HSBSEL_SIZE	/;"	d
SM_INT0_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT0_OFFSET	/;"	d
SM_INT0_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT0_SIZE	/;"	d
SM_INT1_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT1_OFFSET	/;"	d
SM_INT1_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT1_SIZE	/;"	d
SM_INT2_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT2_OFFSET	/;"	d
SM_INT2_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT2_SIZE	/;"	d
SM_INT3_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT3_OFFSET	/;"	d
SM_INT3_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_INT3_SIZE	/;"	d
SM_KEY_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_KEY_OFFSET	/;"	d
SM_KEY_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_KEY_SIZE	/;"	d
SM_LOCK0_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_LOCK0_OFFSET	/;"	d
SM_LOCK0_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_LOCK0_SIZE	/;"	d
SM_LOCK1_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_LOCK1_OFFSET	/;"	d
SM_LOCK1_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_LOCK1_SIZE	/;"	d
SM_NTAE_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_NTAE_OFFSET	/;"	d
SM_NTAE_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_NTAE_SIZE	/;"	d
SM_OFFSET	include/fsl_sec.h	/^#define SM_OFFSET(/;"	d
SM_OSCSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_OSCSEL_OFFSET	/;"	d
SM_OSCSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_OSCSEL_SIZE	/;"	d
SM_PBADIV_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBADIV_OFFSET	/;"	d
SM_PBADIV_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBADIV_SIZE	/;"	d
SM_PBASEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBASEL_OFFSET	/;"	d
SM_PBASEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBASEL_SIZE	/;"	d
SM_PBBDIV_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBBDIV_OFFSET	/;"	d
SM_PBBDIV_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBBDIV_SIZE	/;"	d
SM_PBBSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBBSEL_OFFSET	/;"	d
SM_PBBSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PBBSEL_SIZE	/;"	d
SM_PCLR_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PCLR_OFFSET	/;"	d
SM_PCLR_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PCLR_SIZE	/;"	d
SM_PERM	include/fsl_sec.h	/^#define SM_PERM(/;"	d
SM_PLLCOUNT_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLCOUNT_OFFSET	/;"	d
SM_PLLCOUNT_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLCOUNT_SIZE	/;"	d
SM_PLLDIV_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLDIV_OFFSET	/;"	d
SM_PLLDIV_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLDIV_SIZE	/;"	d
SM_PLLEN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLEN_OFFSET	/;"	d
SM_PLLEN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLEN_SIZE	/;"	d
SM_PLLMUL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLMUL_OFFSET	/;"	d
SM_PLLMUL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLMUL_SIZE	/;"	d
SM_PLLOPT_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLOPT_OFFSET	/;"	d
SM_PLLOPT_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLOPT_SIZE	/;"	d
SM_PLLOSC_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLOSC_OFFSET	/;"	d
SM_PLLOSC_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLOSC_SIZE	/;"	d
SM_PLLSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLSEL_OFFSET	/;"	d
SM_PLLSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLSEL_SIZE	/;"	d
SM_PLLTEST_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLTEST_OFFSET	/;"	d
SM_PLLTEST_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PLLTEST_SIZE	/;"	d
SM_PM_CKSEL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_CKSEL	/;"	d
SM_PM_CPU_MASK	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_CPU_MASK	/;"	d
SM_PM_GCCTRL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_GCCTRL(/;"	d
SM_PM_HSB_MASK	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_HSB_MASK	/;"	d
SM_PM_ICR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_ICR	/;"	d
SM_PM_IDR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_IDR	/;"	d
SM_PM_IER	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_IER	/;"	d
SM_PM_IMR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_IMR	/;"	d
SM_PM_ISR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_ISR	/;"	d
SM_PM_MCCTRL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_MCCTRL	/;"	d
SM_PM_PBA_MASK	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_PBA_MASK	/;"	d
SM_PM_PBB_MASK	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_PBB_MASK	/;"	d
SM_PM_PLL0	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_PLL0	/;"	d
SM_PM_PLL1	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_PLL1	/;"	d
SM_PM_VCTRL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VCTRL	/;"	d
SM_PM_VCTRL_VAL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VCTRL_VAL_OFFSET	/;"	d
SM_PM_VCTRL_VAL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VCTRL_VAL_SIZE	/;"	d
SM_PM_VMREF	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VMREF	/;"	d
SM_PM_VMV	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VMV	/;"	d
SM_PM_VMV_VAL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VMV_VAL_OFFSET	/;"	d
SM_PM_VMV_VAL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PM_VMV_VAL_SIZE	/;"	d
SM_POR_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_POR_OFFSET	/;"	d
SM_POR_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_POR_SIZE	/;"	d
SM_PSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PSEL_OFFSET	/;"	d
SM_PSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_PSEL_SIZE	/;"	d
SM_RC_RCAUSE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RC_RCAUSE	/;"	d
SM_REFSEL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_REFSEL_OFFSET	/;"	d
SM_REFSEL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_REFSEL_SIZE	/;"	d
SM_RTC_CTRL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_CTRL	/;"	d
SM_RTC_ICR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_ICR	/;"	d
SM_RTC_IDR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_IDR	/;"	d
SM_RTC_IER	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_IER	/;"	d
SM_RTC_IMR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_IMR	/;"	d
SM_RTC_ISR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_ISR	/;"	d
SM_RTC_TOP	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_TOP	/;"	d
SM_RTC_TOP_VAL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_TOP_VAL_OFFSET	/;"	d
SM_RTC_TOP_VAL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_TOP_VAL_SIZE	/;"	d
SM_RTC_VAL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_VAL	/;"	d
SM_RTC_VAL_VAL_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_VAL_VAL_OFFSET	/;"	d
SM_RTC_VAL_VAL_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_RTC_VAL_VAL_SIZE	/;"	d
SM_SERP_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_SERP_OFFSET	/;"	d
SM_SERP_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_SERP_SIZE	/;"	d
SM_STATUS	include/fsl_sec.h	/^#define SM_STATUS(/;"	d
SM_SUN4	arch/sparc/include/asm/machines.h	/^#define SM_SUN4 /;"	d
SM_SUN4C	arch/sparc/include/asm/machines.h	/^#define SM_SUN4C /;"	d
SM_SUN4M	arch/sparc/include/asm/machines.h	/^#define SM_SUN4M /;"	d
SM_SUN4M_OBP	arch/sparc/include/asm/machines.h	/^#define SM_SUN4M_OBP /;"	d
SM_TESTEN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_TESTEN_OFFSET	/;"	d
SM_TESTEN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_TESTEN_SIZE	/;"	d
SM_TOPEN_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_TOPEN_OFFSET	/;"	d
SM_TOPEN_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_TOPEN_SIZE	/;"	d
SM_TOPI_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_TOPI_OFFSET	/;"	d
SM_TOPI_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_TOPI_SIZE	/;"	d
SM_TYP_MASK	arch/sparc/include/asm/machines.h	/^#define SM_TYP_MASK /;"	d
SM_V1_OFFSET	include/fsl_sec.h	/^#define SM_V1_OFFSET /;"	d
SM_V2_OFFSET	include/fsl_sec.h	/^#define SM_V2_OFFSET /;"	d
SM_VAUTO_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_VAUTO_OFFSET	/;"	d
SM_VAUTO_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_VAUTO_SIZE	/;"	d
SM_VERSION	include/fsl_sec.h	/^#define SM_VERSION(/;"	d
SM_VMRDY_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_VMRDY_OFFSET	/;"	d
SM_VMRDY_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_VMRDY_SIZE	/;"	d
SM_VOK_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_VOK_OFFSET	/;"	d
SM_VOK_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_VOK_SIZE	/;"	d
SM_WAKE_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WAKE_OFFSET	/;"	d
SM_WAKE_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WAKE_SIZE	/;"	d
SM_WDT_CLR	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WDT_CLR	/;"	d
SM_WDT_CTRL	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WDT_CTRL	/;"	d
SM_WDT_EXT	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WDT_EXT	/;"	d
SM_WDT_OFFSET	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WDT_OFFSET	/;"	d
SM_WDT_SIZE	arch/avr32/cpu/at32ap700x/sm.h	/^#define SM_WDT_SIZE	/;"	d
SNAPSHOT_F_COUNT	include/radeon.h	/^#define SNAPSHOT_F_COUNT	/;"	d
SNAPSHOT_VH_COUNTS	include/radeon.h	/^#define SNAPSHOT_VH_COUNTS	/;"	d
SNAPSHOT_VIF_COUNT	include/radeon.h	/^#define SNAPSHOT_VIF_COUNT	/;"	d
SNB_C1_AUTO_UNDEMOTE	arch/x86/include/asm/msr-index.h	/^#define SNB_C1_AUTO_UNDEMOTE	/;"	d
SNB_C3_AUTO_UNDEMOTE	arch/x86/include/asm/msr-index.h	/^#define SNB_C3_AUTO_UNDEMOTE	/;"	d
SNB_STEP_D0	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SNB_STEP_D0	/;"	d
SNB_STEP_D1	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SNB_STEP_D1	/;"	d
SNB_STEP_D2	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SNB_STEP_D2	/;"	d
SND_BELL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_BELL	include/dt-bindings/input/linux-event-codes.h	/^#define SND_BELL	/;"	d
SND_CLICK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CLICK	include/dt-bindings/input/linux-event-codes.h	/^#define SND_CLICK	/;"	d
SND_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define SND_CNT	/;"	d
SND_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define SND_MAX	/;"	d
SND_SOC_CLOCK_IN	include/i2s.h	/^#define SND_SOC_CLOCK_IN	/;"	d
SND_SOC_CLOCK_OUT	include/i2s.h	/^#define SND_SOC_CLOCK_OUT	/;"	d
SND_SOC_DAIFMT_AC97	include/i2s.h	/^#define SND_SOC_DAIFMT_AC97	/;"	d
SND_SOC_DAIFMT_CBM_CFM	include/i2s.h	/^#define SND_SOC_DAIFMT_CBM_CFM	/;"	d
SND_SOC_DAIFMT_CBM_CFS	include/i2s.h	/^#define SND_SOC_DAIFMT_CBM_CFS	/;"	d
SND_SOC_DAIFMT_CBS_CFM	include/i2s.h	/^#define SND_SOC_DAIFMT_CBS_CFM	/;"	d
SND_SOC_DAIFMT_CBS_CFS	include/i2s.h	/^#define SND_SOC_DAIFMT_CBS_CFS	/;"	d
SND_SOC_DAIFMT_CLOCK_MASK	include/i2s.h	/^#define SND_SOC_DAIFMT_CLOCK_MASK	/;"	d
SND_SOC_DAIFMT_DSP_A	include/i2s.h	/^#define SND_SOC_DAIFMT_DSP_A	/;"	d
SND_SOC_DAIFMT_DSP_B	include/i2s.h	/^#define SND_SOC_DAIFMT_DSP_B	/;"	d
SND_SOC_DAIFMT_FORMAT_MASK	include/i2s.h	/^#define SND_SOC_DAIFMT_FORMAT_MASK	/;"	d
SND_SOC_DAIFMT_I2S	include/i2s.h	/^#define SND_SOC_DAIFMT_I2S	/;"	d
SND_SOC_DAIFMT_IB_IF	include/i2s.h	/^#define SND_SOC_DAIFMT_IB_IF	/;"	d
SND_SOC_DAIFMT_IB_NF	include/i2s.h	/^#define SND_SOC_DAIFMT_IB_NF	/;"	d
SND_SOC_DAIFMT_INV_MASK	include/i2s.h	/^#define SND_SOC_DAIFMT_INV_MASK	/;"	d
SND_SOC_DAIFMT_LEFT_J	include/i2s.h	/^#define SND_SOC_DAIFMT_LEFT_J	/;"	d
SND_SOC_DAIFMT_LSB	include/i2s.h	/^#define SND_SOC_DAIFMT_LSB	/;"	d
SND_SOC_DAIFMT_MASTER_MASK	include/i2s.h	/^#define SND_SOC_DAIFMT_MASTER_MASK	/;"	d
SND_SOC_DAIFMT_MSB	include/i2s.h	/^#define SND_SOC_DAIFMT_MSB	/;"	d
SND_SOC_DAIFMT_NB_IF	include/i2s.h	/^#define SND_SOC_DAIFMT_NB_IF	/;"	d
SND_SOC_DAIFMT_NB_NF	include/i2s.h	/^#define SND_SOC_DAIFMT_NB_NF	/;"	d
SND_SOC_DAIFMT_PDM	include/i2s.h	/^#define SND_SOC_DAIFMT_PDM	/;"	d
SND_SOC_DAIFMT_RIGHT_J	include/i2s.h	/^#define SND_SOC_DAIFMT_RIGHT_J	/;"	d
SND_TONE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SND_TONE	include/dt-bindings/input/linux-event-codes.h	/^#define SND_TONE	/;"	d
SNEN	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SNEN	/;"	d
SNOOP_SIZE_2GB	include/usb/ehci-ci.h	/^#define SNOOP_SIZE_2GB	/;"	d
SNOR_BOOT_SUPPORTED	include/configs/x600.h	/^#define SNOR_BOOT_SUPPORTED	/;"	d
SNOR_F_SST_WR	drivers/mtd/spi/sf_internal.h	/^	SNOR_F_SST_WR		= BIT(0),$/;"	e	enum:spi_nor_option_flags
SNOR_F_USE_FSR	drivers/mtd/spi/sf_internal.h	/^	SNOR_F_USE_FSR		= BIT(1),$/;"	e	enum:spi_nor_option_flags
SNPS_DWC3	drivers/usb/common/fsl-dt-fixup.c	/^#define SNPS_DWC3	/;"	d	file:
SNTP	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
SNTP_PACKET_LEN	net/sntp.h	/^#define SNTP_PACKET_LEN	/;"	d
SNTP_TIMEOUT	net/sntp.c	/^#define SNTP_TIMEOUT /;"	d	file:
SNVS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SNVS_BASE_ADDR /;"	d
SNVS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SNVS_BASE_ADDR /;"	d
SNVS_GPR_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SNVS_GPR_BASE_ADDR /;"	d
SNVS_LPGPR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SNVS_LPGPR	/;"	d
SOC	config.mk	/^SOC := $(CONFIG_SYS_SOC:"%"=%)$/;"	m
SOCFPGA_ACPIDMAP_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_ACPIDMAP_ADDRESS	/;"	d
SOCFPGA_CAN0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_CAN0_ADDRESS	/;"	d
SOCFPGA_CAN1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_CAN1_ADDRESS	/;"	d
SOCFPGA_CLKMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_CLKMGR_ADDRESS	/;"	d
SOCFPGA_CLKMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_CLKMGR_ADDRESS	/;"	d
SOCFPGA_DAP_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_DAP_ADDRESS	/;"	d
SOCFPGA_DMANONSECURE_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_DMANONSECURE_ADDRESS	/;"	d
SOCFPGA_DMANONSECURE_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_DMANONSECURE_ADDRESS	/;"	d
SOCFPGA_DMASECURE_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_DMASECURE_ADDRESS	/;"	d
SOCFPGA_DMASECURE_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_DMASECURE_ADDRESS	/;"	d
SOCFPGA_ECC_OCRAM_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_ECC_OCRAM_ADDRESS	/;"	d
SOCFPGA_EMAC0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_EMAC0_ADDRESS	/;"	d
SOCFPGA_EMAC0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_EMAC0_ADDRESS	/;"	d
SOCFPGA_EMAC1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_EMAC1_ADDRESS	/;"	d
SOCFPGA_EMAC1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_EMAC1_ADDRESS	/;"	d
SOCFPGA_EMAC2_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_EMAC2_ADDRESS	/;"	d
SOCFPGA_FPGA2HPSREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_FPGA2HPSREGS_ADDRESS	/;"	d
SOCFPGA_FPGAMGRDATA_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_FPGAMGRDATA_ADDRESS	/;"	d
SOCFPGA_FPGAMGRDATA_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_FPGAMGRDATA_ADDRESS	/;"	d
SOCFPGA_FPGAMGRREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_FPGAMGRREGS_ADDRESS	/;"	d
SOCFPGA_FPGAMGRREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_FPGAMGRREGS_ADDRESS	/;"	d
SOCFPGA_GPIO0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_GPIO0_ADDRESS	/;"	d
SOCFPGA_GPIO1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_GPIO1_ADDRESS	/;"	d
SOCFPGA_GPIO2_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_GPIO2_ADDRESS	/;"	d
SOCFPGA_HMC_MMR_IO48_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_HMC_MMR_IO48_ADDRESS	/;"	d
SOCFPGA_HPS2FPGAREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_HPS2FPGAREGS_ADDRESS	/;"	d
SOCFPGA_I2C0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_I2C0_ADDRESS	/;"	d
SOCFPGA_I2C0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_I2C0_ADDRESS	/;"	d
SOCFPGA_I2C1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_I2C1_ADDRESS	/;"	d
SOCFPGA_I2C1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_I2C1_ADDRESS	/;"	d
SOCFPGA_I2C2_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_I2C2_ADDRESS	/;"	d
SOCFPGA_I2C3_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_I2C3_ADDRESS	/;"	d
SOCFPGA_L3REGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_L3REGS_ADDRESS	/;"	d
SOCFPGA_L4WD0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_L4WD0_ADDRESS	/;"	d
SOCFPGA_L4WD0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_L4WD0_ADDRESS	/;"	d
SOCFPGA_L4WD1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_L4WD1_ADDRESS	/;"	d
SOCFPGA_LWFPGASLAVES_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_LWFPGASLAVES_ADDRESS	/;"	d
SOCFPGA_LWHPS2FPGAREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_LWHPS2FPGAREGS_ADDRESS	/;"	d
SOCFPGA_MPUL2_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_MPUL2_ADDRESS	/;"	d
SOCFPGA_MPUL2_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_MPUL2_ADDRESS	/;"	d
SOCFPGA_MPUSCU_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_MPUSCU_ADDRESS	/;"	d
SOCFPGA_MPUSCU_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_MPUSCU_ADDRESS	/;"	d
SOCFPGA_NANDDATA_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_NANDDATA_ADDRESS	/;"	d
SOCFPGA_NANDREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_NANDREGS_ADDRESS	/;"	d
SOCFPGA_OCRAM_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_OCRAM_ADDRESS	/;"	d
SOCFPGA_OSC1TIMER0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_OSC1TIMER0_ADDRESS	/;"	d
SOCFPGA_OSC1TIMER0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_OSC1TIMER0_ADDRESS	/;"	d
SOCFPGA_OSC1TIMER1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_OSC1TIMER1_ADDRESS	/;"	d
SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS	/;"	d
SOCFPGA_PINMUX_DEDICATED_IO_CFG_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_PINMUX_DEDICATED_IO_CFG_ADDRESS	/;"	d
SOCFPGA_PINMUX_FPGA_INTERFACE_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_PINMUX_FPGA_INTERFACE_ADDRESS	/;"	d
SOCFPGA_PINMUX_SHARED_3V_IO_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_PINMUX_SHARED_3V_IO_ADDRESS	/;"	d
SOCFPGA_QSPIDATA_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_QSPIDATA_ADDRESS	/;"	d
SOCFPGA_QSPIDATA_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_QSPIDATA_ADDRESS	/;"	d
SOCFPGA_QSPIREGS_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_QSPIREGS_ADDRESS	/;"	d
SOCFPGA_QSPI_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_QSPI_ADDRESS	/;"	d
SOCFPGA_RESET	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define SOCFPGA_RESET(/;"	d
SOCFPGA_ROM_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_ROM_ADDRESS	/;"	d
SOCFPGA_RSTMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_RSTMGR_ADDRESS	/;"	d
SOCFPGA_RSTMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_RSTMGR_ADDRESS	/;"	d
SOCFPGA_SCANMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SCANMGR_ADDRESS	/;"	d
SOCFPGA_SDMMC_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SDMMC_ADDRESS	/;"	d
SOCFPGA_SDMMC_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SDMMC_ADDRESS	/;"	d
SOCFPGA_SDR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SDR_ADDRESS	/;"	d
SOCFPGA_SDR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SDR_ADDRESS	/;"	d
SOCFPGA_SDR_FIREWALL_L3_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SDR_FIREWALL_L3_ADDRESS	/;"	d
SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	/;"	d
SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	/;"	d
SOCFPGA_SDR_SCHEDULER_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SDR_SCHEDULER_ADDRESS	/;"	d
SOCFPGA_SPIM0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SPIM0_ADDRESS	/;"	d
SOCFPGA_SPIM1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SPIM1_ADDRESS	/;"	d
SOCFPGA_SPIS0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SPIS0_ADDRESS	/;"	d
SOCFPGA_SPIS1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SPIS1_ADDRESS	/;"	d
SOCFPGA_SPTIMER0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SPTIMER0_ADDRESS	/;"	d
SOCFPGA_SPTIMER1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SPTIMER1_ADDRESS	/;"	d
SOCFPGA_STM_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_STM_ADDRESS	/;"	d
SOCFPGA_SYSMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_SYSMGR_ADDRESS	/;"	d
SOCFPGA_SYSMGR_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_SYSMGR_ADDRESS	/;"	d
SOCFPGA_UART0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_UART0_ADDRESS	/;"	d
SOCFPGA_UART0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_UART0_ADDRESS	/;"	d
SOCFPGA_UART1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define SOCFPGA_UART1_ADDRESS	/;"	d
SOCFPGA_UART1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_UART1_ADDRESS	/;"	d
SOCFPGA_USB0_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_USB0_ADDRESS	/;"	d
SOCFPGA_USB1_ADDRESS	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define SOCFPGA_USB1_ADDRESS	/;"	d
SOCL	include/sym53c8xx.h	/^#define SOCL	/;"	d
SOCSTS_APLL_LOCK	drivers/clk/rockchip/clk_rk3288.c	/^	SOCSTS_APLL_LOCK	= 1 << 6,$/;"	e	enum:__anon06a678fa0203	file:
SOCSTS_CPLL_LOCK	drivers/clk/rockchip/clk_rk3288.c	/^	SOCSTS_CPLL_LOCK	= 1 << 7,$/;"	e	enum:__anon06a678fa0203	file:
SOCSTS_DPLL_LOCK	drivers/clk/rockchip/clk_rk3288.c	/^	SOCSTS_DPLL_LOCK	= 1 << 5,$/;"	e	enum:__anon06a678fa0203	file:
SOCSTS_GPLL_LOCK	drivers/clk/rockchip/clk_rk3288.c	/^	SOCSTS_GPLL_LOCK	= 1 << 8,$/;"	e	enum:__anon06a678fa0203	file:
SOCSTS_NPLL_LOCK	drivers/clk/rockchip/clk_rk3288.c	/^	SOCSTS_NPLL_LOCK	= 1 << 9,$/;"	e	enum:__anon06a678fa0203	file:
SOC_88F6720_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_88F6720_ID	/;"	d
SOC_88F6810_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_88F6810_ID	/;"	d
SOC_88F6820_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_88F6820_ID	/;"	d
SOC_88F6828_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_88F6828_ID	/;"	d
SOC_AR933X	arch/mips/mach-ath79/Kconfig	/^config SOC_AR933X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
SOC_AR934X	arch/mips/mach-ath79/Kconfig	/^config SOC_AR934X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
SOC_COHERENCY_FABRIC_CTRL_REG	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_COHERENCY_FABRIC_CTRL_REG	/;"	d
SOC_CONTROL_REG1	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SOC_CONTROL_REG1	/;"	d
SOC_CTI_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SOC_CTI_BASE_ADDR /;"	d
SOC_CTRL_REG	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define SOC_CTRL_REG	/;"	d
SOC_CTRL_REG	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define SOC_CTRL_REG	/;"	d
SOC_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define SOC_DEV	/;"	d
SOC_MAJOR_VER_1_0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SOC_MAJOR_VER_1_0	/;"	d
SOC_MAJOR_VER_2_0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SOC_MAJOR_VER_2_0	/;"	d
SOC_MC_PORTALS_BASE_ADDR	include/fsl-mc/fsl_mc.h	/^#define SOC_MC_PORTALS_BASE_ADDR /;"	d
SOC_MC_PORTAL_ADDR	include/fsl-mc/fsl_mc.h	/^#define SOC_MC_PORTAL_ADDR(/;"	d
SOC_MC_PORTAL_STRIDE	include/fsl-mc/fsl_mc.h	/^#define SOC_MC_PORTAL_STRIDE	/;"	d
SOC_MV78230_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_MV78230_ID	/;"	d
SOC_MV78260_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_MV78260_ID	/;"	d
SOC_MV78460_ID	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_MV78460_ID	/;"	d
SOC_PIC32MZDA	arch/mips/mach-pic32/Kconfig	/^config SOC_PIC32MZDA$/;"	c	choice:Microchip PIC32 platforms""choicef4d9e1b10104
SOC_PRI_SHFT	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_PRI_SHFT	/;"	d
SOC_QBMAN_PORTALS_BASE_ADDR	include/fsl-mc/fsl_mc.h	/^#define SOC_QBMAN_PORTALS_BASE_ADDR /;"	d
SOC_QCA953X	arch/mips/mach-ath79/Kconfig	/^config SOC_QCA953X$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
SOC_REGS_PHY_BASE	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SOC_REGS_PHY_BASE	/;"	d
SOC_SEC_SHFT	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SEC_SHFT	/;"	d
SOC_SPEAR300	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR300	/;"	d
SOC_SPEAR310	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR310	/;"	d
SOC_SPEAR320	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR320	/;"	d
SOC_SPEAR600_AA	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR600_AA	/;"	d
SOC_SPEAR600_AB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR600_AB	/;"	d
SOC_SPEAR600_BA	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR600_BA	/;"	d
SOC_SPEAR600_BB	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR600_BB	/;"	d
SOC_SPEAR600_BC	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR600_BC	/;"	d
SOC_SPEAR600_BD	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR600_BD	/;"	d
SOC_SPEAR_NA	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SOC_SPEAR_NA	/;"	d
SOC_UNIPHIER_LD11	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_LD11,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_LD20	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_LD20,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_LD4	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_LD4,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_LD6B	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_LD6B,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_PRO4	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_PRO4,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_PRO5	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_PRO5,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_PXS2	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_PXS2,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_SLD3	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_SLD3,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_SLD8	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_SLD8,$/;"	e	enum:uniphier_soc_id
SOC_UNIPHIER_UNKNOWN	arch/arm/mach-uniphier/soc-info.h	/^	SOC_UNIPHIER_UNKNOWN,$/;"	e	enum:uniphier_soc_id
SOC_VER_LS1020	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SOC_VER_LS1020	/;"	d
SOC_VER_LS1021	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SOC_VER_LS1021	/;"	d
SOC_VER_LS1022	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SOC_VER_LS1022	/;"	d
SOC_VER_SLS1020	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SOC_VER_SLS1020	/;"	d
SODL	include/sym53c8xx.h	/^#define SODL	/;"	d
SOFCFG	drivers/usb/host/r8a66597.h	/^#define SOFCFG	/;"	d
SOFE	drivers/usb/host/r8a66597.h	/^#define	SOFE	/;"	d
SOFEA	drivers/usb/host/r8a66597.h	/^#define	SOFEA	/;"	d
SOFFNR_FNR	include/usb/fotg210.h	/^#define SOFFNR_FNR(/;"	d
SOFFNR_UFN	include/usb/fotg210.h	/^#define SOFFNR_UFN(/;"	d
SOFMODE	drivers/usb/host/r8a66597.h	/^#define	SOFMODE	/;"	d
SOFMTR_TMR	include/usb/fotg210.h	/^#define SOFMTR_TMR(/;"	d
SOFR	drivers/usb/host/r8a66597.h	/^#define	SOFR	/;"	d
SOFTRESET	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SOFTRESET	/;"	d
SOFTRESET	drivers/net/davinci_emac.h	/^	dv_reg		SOFTRESET;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
SOFTRESETALL	arch/arm/include/asm/omap_mmc.h	/^#define SOFTRESETALL	/;"	d
SOFTRST	drivers/net/ax88180.h	/^#define SOFTRST	/;"	d
SOFTRST	drivers/usb/musb-new/omap2430.h	/^#	define	SOFTRST	/;"	d
SOFTRSTCNTL	arch/x86/cpu/quark/smc.h	/^#define SOFTRSTCNTL	/;"	d
SOFTRST_NORMAL	drivers/net/ax88180.h	/^  #define SOFTRST_NORMAL	/;"	d
SOFTRST_RESET_MAC	drivers/net/ax88180.h	/^  #define SOFTRST_RESET_MAC	/;"	d
SOFTWARE_REBOOT	board/Synology/ds109/ds109.c	/^#define SOFTWARE_REBOOT /;"	d	file:
SOFTWARE_SHUTDOWN	board/Synology/ds109/ds109.c	/^#define SOFTWARE_SHUTDOWN /;"	d	file:
SOFT_CONN	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SOFT_CONN	/;"	d
SOFT_DISCONNECT	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define SOFT_DISCONNECT	/;"	d
SOFT_INT_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SOFT_INT_CTRL	/;"	d
SOFT_INT_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define SOFT_INT_CTRL	/;"	d
SOFT_LEBS_LIMIT	fs/ubifs/gc.c	/^#define SOFT_LEBS_LIMIT /;"	d	file:
SOFT_MUX_ON_CAN3_USB2	board/freescale/ls1021atwr/ls1021atwr.c	/^#define SOFT_MUX_ON_CAN3_USB2	/;"	d	file:
SOFT_MUX_ON_I2C3_IFC	board/freescale/ls1021atwr/ls1021atwr.c	/^#define SOFT_MUX_ON_I2C3_IFC	/;"	d	file:
SOFT_MUX_ON_QE_LCD	board/freescale/ls1021atwr/ls1021atwr.c	/^#define SOFT_MUX_ON_QE_LCD	/;"	d	file:
SOFT_RESET_CP	include/radeon.h	/^#define SOFT_RESET_CP	/;"	d
SOFT_RESET_CTRL	arch/x86/include/asm/intel_regs.h	/^#define SOFT_RESET_CTRL	/;"	d
SOFT_RESET_DATA	arch/x86/include/asm/intel_regs.h	/^#define SOFT_RESET_DATA	/;"	d
SOFT_RESET_DISPENG_XCLK	include/radeon.h	/^#define SOFT_RESET_DISPENG_XCLK	/;"	d
SOFT_RESET_E2	include/radeon.h	/^#define SOFT_RESET_E2	/;"	d
SOFT_RESET_ECP	include/radeon.h	/^#define SOFT_RESET_ECP	/;"	d
SOFT_RESET_GPIO	board/aristainetos/aristainetos-v2.c	/^#define SOFT_RESET_GPIO	/;"	d	file:
SOFT_RESET_GUI	include/radeon.h	/^#define SOFT_RESET_GUI	/;"	d
SOFT_RESET_HDP	include/radeon.h	/^#define SOFT_RESET_HDP	/;"	d
SOFT_RESET_HI	include/radeon.h	/^#define SOFT_RESET_HI	/;"	d
SOFT_RESET_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	SOFT_RESET_MASK				= 3,$/;"	e	enum:__anon957231910103	file:
SOFT_RESET_PCLK	include/radeon.h	/^#define SOFT_RESET_PCLK	/;"	d
SOFT_RESET_PP	include/radeon.h	/^#define SOFT_RESET_PP	/;"	d
SOFT_RESET_RB	include/radeon.h	/^#define SOFT_RESET_RB	/;"	d
SOFT_RESET_RE	include/radeon.h	/^#define SOFT_RESET_RE	/;"	d
SOFT_RESET_SE	include/radeon.h	/^#define SOFT_RESET_SE	/;"	d
SOFT_RESET_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	SOFT_RESET_SHIFT			= 2,$/;"	e	enum:__anon957231910103	file:
SOFT_RESET_VCLK	include/radeon.h	/^#define SOFT_RESET_VCLK	/;"	d
SOFT_RST	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                  SOFT_RST /;"	d
SOFT_RST_OFF	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SOFT_RST_OFF	/;"	d
SOFT_RST_OFF	drivers/mmc/sh_mmcif.h	/^#define SOFT_RST_OFF	/;"	d
SOFT_RST_ON	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define SOFT_RST_ON	/;"	d
SOFT_RST_ON	drivers/mmc/sh_mmcif.h	/^#define SOFT_RST_ON	/;"	d
SOFT_TRAP	arch/sparc/cpu/leon2/start.S	/^#define SOFT_TRAP /;"	d	file:
SOFT_TRAP	arch/sparc/cpu/leon3/start.S	/^#define SOFT_TRAP /;"	d	file:
SOF_125US	drivers/usb/host/r8a66597.h	/^#define	  SOF_125US	/;"	d
SOF_1MS	drivers/usb/host/r8a66597.h	/^#define	  SOF_1MS	/;"	d
SOF_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SOF_B	/;"	d
SOF_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SOF_BE	/;"	d
SOF_DISABLE	drivers/usb/host/r8a66597.h	/^#define	  SOF_DISABLE	/;"	d
SOH	common/xyzModem.c	/^#define SOH /;"	d	file:
SOH	tools/kwboot.c	/^#define SOH	/;"	d	file:
SOPASS_MAX	include/linux/ethtool.h	/^#define SOPASS_MAX	/;"	d
SOR	arch/arm/include/asm/arch-tegra/pmc.h	/^#define SOR	/;"	d
SOR	cmd/immap.c	/^		SOR,$/;"	e	enum:do_iopset::__anonb0469eed0103	file:
SOR0_CLK_SEL0	arch/arm/include/asm/arch-tegra124/clock.h	/^#define SOR0_CLK_SEL0	/;"	d
SOR0_CLK_SEL1	arch/arm/include/asm/arch-tegra124/clock.h	/^#define SOR0_CLK_SEL1	/;"	d
SORT_BY_ALIGNMENT	include/u-boot/u-boot.lds.h	/^# define SORT_BY_ALIGNMENT(/;"	d
SORT_BY_NAME	include/u-boot/u-boot.lds.h	/^# define SORT_BY_NAME(/;"	d
SOR_DP	drivers/video/tegra124/sor.h	/^	SOR_DP,$/;"	e	enum:tegra_dc_sor_protocol
SOR_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define	SOR_ENABLE	/;"	d
SOR_LINK_SPEED_G1_62	drivers/video/tegra124/sor.h	/^#define SOR_LINK_SPEED_G1_62	/;"	d
SOR_LINK_SPEED_G2_7	drivers/video/tegra124/sor.h	/^#define SOR_LINK_SPEED_G2_7	/;"	d
SOR_LINK_SPEED_G5_4	drivers/video/tegra124/sor.h	/^#define SOR_LINK_SPEED_G5_4	/;"	d
SOR_LINK_SPEED_LVDS	drivers/video/tegra124/sor.h	/^#define SOR_LINK_SPEED_LVDS	/;"	d
SOR_LVDS	drivers/video/tegra124/sor.h	/^	SOR_LVDS,$/;"	e	enum:tegra_dc_sor_protocol
SOUND	drivers/sound/Kconfig	/^config SOUND$/;"	c	menu:Sound support
SOUND_400_HZ	drivers/sound/sound-i2s.c	/^#define SOUND_400_HZ /;"	d	file:
SOUND_BITS_IN_BYTE	drivers/sound/sound-i2s.c	/^#define SOUND_BITS_IN_BYTE /;"	d	file:
SOUND_MAX98095	drivers/sound/Kconfig	/^config SOUND_MAX98095$/;"	c	menu:Sound support
SOUND_SANDBOX	drivers/sound/Kconfig	/^config SOUND_SANDBOX$/;"	c	menu:Sound support
SOUND_WM8994	drivers/sound/Kconfig	/^config SOUND_WM8994$/;"	c	menu:Sound support
SOVF	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	SOVF	/;"	d
SP	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SP	/;"	d
SP	drivers/bios_emulator/include/x86emu/regs.h	/^	i386_general_register SP, BP, SI, DI, IP;$/;"	m	struct:i386_special_regs	typeref:typename:i386_general_register
SP810_TIMER0_ENSEL	arch/arm/include/asm/arch-armv7/sysctrl.h	/^#define SP810_TIMER0_ENSEL	/;"	d
SP810_TIMER1_ENSEL	arch/arm/include/asm/arch-armv7/sysctrl.h	/^#define SP810_TIMER1_ENSEL	/;"	d
SP810_TIMER2_ENSEL	arch/arm/include/asm/arch-armv7/sysctrl.h	/^#define SP810_TIMER2_ENSEL	/;"	d
SP810_TIMER3_ENSEL	arch/arm/include/asm/arch-armv7/sysctrl.h	/^#define SP810_TIMER3_ENSEL	/;"	d
SPAACE_AF_LIODN	arch/powerpc/include/asm/fsl_pamu.h	/^#define SPAACE_AF_LIODN	/;"	d
SPAACE_AF_LIODN_SHIFT	arch/powerpc/include/asm/fsl_pamu.h	/^#define SPAACE_AF_LIODN_SHIFT	/;"	d
SPACE	cmd/load.c	/^#define SPACE /;"	d	file:
SPACE	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
SPACE	lib/vsprintf.c	/^#define SPACE	/;"	d	file:
SPACE0_TA_ENABLE	board/mpl/pati/pati.h	/^#define SPACE0_TA_ENABLE /;"	d
SPACE1_TA_ENABLE	board/mpl/pati/pati.h	/^#define SPACE1_TA_ENABLE /;"	d
SPACE_REQUIRED	arch/powerpc/lib/kgdb.c	/^#define SPACE_REQUIRED	/;"	d	file:
SPARC	arch/Kconfig	/^config SPARC$/;"	c	choice:choice07312ef30104
SPARC architecture	arch/sparc/Kconfig	/^menu "SPARC architecture"$/;"	m
SPARC_BYPASS_READ	arch/sparc/include/asm/processor.h	/^#define SPARC_BYPASS_READ(/;"	d
SPARC_BYPASS_WRITE	arch/sparc/include/asm/processor.h	/^#define SPARC_BYPASS_WRITE(/;"	d
SPARC_ETH_GSET	include/linux/ethtool.h	/^#define SPARC_ETH_GSET	/;"	d
SPARC_ETH_SSET	include/linux/ethtool.h	/^#define SPARC_ETH_SSET	/;"	d
SPARC_LOAD_ADDRESS	arch/sparc/cpu/leon2/start.S	/^#define SPARC_LOAD_ADDRESS(/;"	d	file:
SPARC_LOAD_ADDRESS	arch/sparc/cpu/leon3/start.S	/^#define SPARC_LOAD_ADDRESS(/;"	d	file:
SPARC_NOCACHE_READ	arch/sparc/include/asm/processor.h	/^#define SPARC_NOCACHE_READ(/;"	d
SPARC_NOCACHE_READ_BYTE	arch/sparc/include/asm/processor.h	/^#define SPARC_NOCACHE_READ_BYTE(/;"	d
SPARC_NOCACHE_READ_DWORD	arch/sparc/include/asm/processor.h	/^#define SPARC_NOCACHE_READ_DWORD(/;"	d
SPARC_NOCACHE_READ_HWORD	arch/sparc/include/asm/processor.h	/^#define SPARC_NOCACHE_READ_HWORD(/;"	d
SPARC_PIC_THUNK_CALL	arch/sparc/cpu/leon2/start.S	/^#define SPARC_PIC_THUNK_CALL(/;"	d	file:
SPARC_PIC_THUNK_CALL	arch/sparc/cpu/leon3/start.S	/^#define SPARC_PIC_THUNK_CALL(/;"	d	file:
SPARE_ACCESS	drivers/mtd/nand/denali.c	/^#define SPARE_ACCESS	/;"	d	file:
SPARE_ACCESS	drivers/mtd/nand/denali_spl.c	/^#define SPARE_ACCESS	/;"	d	file:
SPARE_AREA_MARKER	drivers/mtd/nand/denali.h	/^#define SPARE_AREA_MARKER	/;"	d
SPARE_AREA_MARKER__VALUE	drivers/mtd/nand/denali.h	/^#define     SPARE_AREA_MARKER__VALUE	/;"	d
SPARE_AREA_SKIP_BYTES	drivers/mtd/nand/denali.h	/^#define SPARE_AREA_SKIP_BYTES	/;"	d
SPARE_AREA_SKIP_BYTES__VALUE	drivers/mtd/nand/denali.h	/^#define     SPARE_AREA_SKIP_BYTES__VALUE	/;"	d
SPARE_SINGLEBIT_ERROR	drivers/mtd/nand/mxc_nand.c	/^#define SPARE_SINGLEBIT_ERROR /;"	d	file:
SPARSE_HEADER_MAGIC	include/sparse_format.h	/^#define SPARSE_HEADER_MAGIC	/;"	d
SPA_ASIZEBITS	include/zfs/spa.h	/^#define	SPA_ASIZEBITS	/;"	d
SPA_BLKPTRSHIFT	include/zfs/spa.h	/^#define	SPA_BLKPTRSHIFT	/;"	d
SPA_BLOCKSIZES	include/zfs/spa.h	/^#define	SPA_BLOCKSIZES	/;"	d
SPA_CONFIG_BLOCKSIZE	include/zfs/spa.h	/^#define	SPA_CONFIG_BLOCKSIZE	/;"	d
SPA_DVAS_PER_BP	include/zfs/spa.h	/^#define	SPA_DVAS_PER_BP	/;"	d
SPA_GANGBLOCKSIZE	include/zfs/zio.h	/^#define	SPA_GANGBLOCKSIZE	/;"	d
SPA_GBH_FILLER	include/zfs/zio.h	/^#define	SPA_GBH_FILLER	/;"	d
SPA_GBH_NBLKPTRS	include/zfs/zio.h	/^#define	SPA_GBH_NBLKPTRS	/;"	d
SPA_LSIZEBITS	include/zfs/spa.h	/^#define	SPA_LSIZEBITS	/;"	d
SPA_MAXBLOCKSHIFT	include/zfs/spa.h	/^#define	SPA_MAXBLOCKSHIFT	/;"	d
SPA_MAXBLOCKSIZE	include/zfs/spa.h	/^#define	SPA_MAXBLOCKSIZE	/;"	d
SPA_MINBLOCKSHIFT	include/zfs/spa.h	/^#define	SPA_MINBLOCKSHIFT	/;"	d
SPA_MINBLOCKSIZE	include/zfs/spa.h	/^#define	SPA_MINBLOCKSIZE	/;"	d
SPA_PSIZEBITS	include/zfs/spa.h	/^#define	SPA_PSIZEBITS	/;"	d
SPA_VERSION	include/zfs/zfs.h	/^#define	SPA_VERSION	/;"	d
SPBA0_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SPBA0_BASE_ADDR /;"	d
SPBA_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define SPBA_BASE_ADDR /;"	d
SPBA_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SPBA_BASE_ADDR /;"	d
SPBA_CTRL_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define SPBA_CTRL_BASE_ADDR /;"	d
SPBA_CTRL_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SPBA_CTRL_BASE_ADDR	/;"	d
SPBA_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SPBA_IPS_BASE_ADDR /;"	d
SPBDCR_RXBC0	drivers/spi/sh_qspi.c	/^#define SPBDCR_RXBC0	/;"	d	file:
SPBFCR_RXRST	drivers/spi/sh_qspi.c	/^#define SPBFCR_RXRST	/;"	d	file:
SPBFCR_TXRST	drivers/spi/sh_qspi.c	/^#define SPBFCR_TXRST	/;"	d	file:
SPCID_MASK	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define SPCID_MASK	/;"	d
SPCID_MASK	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SPCID_MASK	/;"	d
SPCID_MASK	arch/powerpc/include/asm/ppc440gx.h	/^#define SPCID_MASK	/;"	d
SPCID_MASK	arch/powerpc/include/asm/ppc440sp.h	/^#define SPCID_MASK	/;"	d
SPCID_MASK	arch/powerpc/include/asm/ppc440spe.h	/^#define SPCID_MASK	/;"	d
SPCLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SPCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
SPCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,$/;"	e	enum:__anona307879b0103	file:
SPCMD_BRDV0	drivers/spi/sh_qspi.c	/^#define SPCMD_BRDV0	/;"	d	file:
SPCMD_INIT1	drivers/spi/sh_qspi.c	/^#define SPCMD_INIT1	/;"	d	file:
SPCMD_INIT2	drivers/spi/sh_qspi.c	/^#define SPCMD_INIT2	/;"	d	file:
SPCMD_SCKDEN	drivers/spi/sh_qspi.c	/^#define SPCMD_SCKDEN	/;"	d	file:
SPCMD_SLNDEN	drivers/spi/sh_qspi.c	/^#define SPCMD_SLNDEN	/;"	d	file:
SPCMD_SPNDEN	drivers/spi/sh_qspi.c	/^#define SPCMD_SPNDEN	/;"	d	file:
SPCMD_SSLKP	drivers/spi/sh_qspi.c	/^#define SPCMD_SSLKP	/;"	d	file:
SPCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SPCR	/;"	d
SPCR_COREPR	include/mpc83xx.h	/^#define SPCR_COREPR	/;"	d
SPCR_COREPR_SHIFT	include/mpc83xx.h	/^#define SPCR_COREPR_SHIFT	/;"	d
SPCR_MSTR	drivers/spi/sh_qspi.c	/^#define SPCR_MSTR	/;"	d	file:
SPCR_OPT	include/mpc83xx.h	/^#define SPCR_OPT	/;"	d
SPCR_OPT_SHIFT	include/mpc83xx.h	/^#define SPCR_OPT_SHIFT	/;"	d
SPCR_PCIHPE	include/mpc83xx.h	/^#define SPCR_PCIHPE	/;"	d
SPCR_PCIHPE_SHIFT	include/mpc83xx.h	/^#define SPCR_PCIHPE_SHIFT	/;"	d
SPCR_PCIPR	include/mpc83xx.h	/^#define SPCR_PCIPR	/;"	d
SPCR_PCIPR_SHIFT	include/mpc83xx.h	/^#define SPCR_PCIPR_SHIFT	/;"	d
SPCR_SPE	drivers/spi/sh_qspi.c	/^#define SPCR_SPE	/;"	d	file:
SPCR_TBEN	arch/powerpc/include/asm/immap_512x.h	/^#define SPCR_TBEN	/;"	d
SPCR_TBEN	include/mpc83xx.h	/^#define SPCR_TBEN	/;"	d
SPCR_TBEN_SHIFT	include/mpc83xx.h	/^#define SPCR_TBEN_SHIFT	/;"	d
SPCR_TSEC1BDP	include/mpc83xx.h	/^#define SPCR_TSEC1BDP	/;"	d
SPCR_TSEC1BDP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSEC1BDP_SHIFT	/;"	d
SPCR_TSEC1DP	include/mpc83xx.h	/^#define SPCR_TSEC1DP	/;"	d
SPCR_TSEC1DP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSEC1DP_SHIFT	/;"	d
SPCR_TSEC1EP	include/mpc83xx.h	/^#define SPCR_TSEC1EP	/;"	d
SPCR_TSEC1EP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSEC1EP_SHIFT	/;"	d
SPCR_TSEC2BDP	include/mpc83xx.h	/^#define SPCR_TSEC2BDP	/;"	d
SPCR_TSEC2BDP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSEC2BDP_SHIFT	/;"	d
SPCR_TSEC2DP	include/mpc83xx.h	/^#define SPCR_TSEC2DP	/;"	d
SPCR_TSEC2DP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSEC2DP_SHIFT	/;"	d
SPCR_TSEC2EP	include/mpc83xx.h	/^#define SPCR_TSEC2EP	/;"	d
SPCR_TSEC2EP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSEC2EP_SHIFT	/;"	d
SPCR_TSECBDP	include/mpc83xx.h	/^#define SPCR_TSECBDP	/;"	d
SPCR_TSECBDP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSECBDP_SHIFT	/;"	d
SPCR_TSECDP	include/mpc83xx.h	/^#define SPCR_TSECDP	/;"	d
SPCR_TSECDP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSECDP_SHIFT	/;"	d
SPCR_TSECEP	include/mpc83xx.h	/^#define SPCR_TSECEP	/;"	d
SPCR_TSECEP_SHIFT	include/mpc83xx.h	/^#define SPCR_TSECEP_SHIFT	/;"	d
SPCTL	arch/sh/include/asm/cpu_sh7722.h	/^#define SPCTL /;"	d
SPCTL0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SPCTL0 /;"	d
SPCTL0_VAL	include/configs/imx27lite-common.h	/^#define SPCTL0_VAL	/;"	d
SPCTL1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SPCTL1 /;"	d
SPD	drivers/ddr/fsl/Makefile	/^SPD := y$/;"	m
SPD1000	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD1000,$/;"	e	enum:__anonc27926650103
SPD1200	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD1200,$/;"	e	enum:__anonc27926650103
SPD1250	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD1250,$/;"	e	enum:__anonc27926650103
SPD1350	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD1350,$/;"	e	enum:__anonc27926650103
SPD1400	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD1400,$/;"	e	enum:__anonc27926650103
SPD1500	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD1500,$/;"	e	enum:__anonc27926650103
SPD200	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD200,$/;"	e	enum:__anonc27926650103
SPD400	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD400,$/;"	e	enum:__anonc27926650103
SPD600	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD600,$/;"	e	enum:__anonc27926650103
SPD800	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD800,$/;"	e	enum:__anonc27926650103
SPD850	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD850,$/;"	e	enum:__anonc27926650103
SPD900	arch/arm/mach-keystone/include/mach/clock.h	/^	SPD900,$/;"	e	enum:__anonc27926650103
SPDIF_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SPDIF_BASE_ADDR	/;"	d
SPDIF_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SPDIF_BASE_ADDR /;"	d
SPDIF_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SPDIF_BASE_ADDR	/;"	d
SPDIF_BI_PHASE_ERR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SPDIF_BI_PHASE_ERR	/;"	d
SPDIF_BI_PHASE_ERR	arch/arm/mach-exynos/include/mach/dp.h	/^#define SPDIF_BI_PHASE_ERR	/;"	d
SPDIF_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	SPDIF_CLK,$/;"	e	enum:mxc_peri_clock
SPDIF_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	SPDIF_CLK_ROOT = 77,$/;"	e	enum:clk_root_index
SPDIF_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
SPDIF_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
SPDIF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_PLL_AUDIO_MAIN_CLK	/;"	d
SPDIF_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
SPDIF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
SPDIF_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
SPDIF_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
SPDIF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define SPDIF_CLK_ROOT_FROM_PLL_VIDEO_MAIN_CLK	/;"	d
SPDIF_ERR	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SPDIF_ERR	/;"	d
SPDIF_ERR	arch/arm/mach-exynos/include/mach/dp.h	/^#define SPDIF_ERR	/;"	d
SPDIF_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPDIF_SEL	/;"	d
SPDIF_UNSTBL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SPDIF_UNSTBL	/;"	d
SPDIF_UNSTBL	arch/arm/mach-exynos/include/mach/dp.h	/^#define SPDIF_UNSTBL	/;"	d
SPDWN_LINKCHG_MSK	drivers/usb/eth/r8152.h	/^#define SPDWN_LINKCHG_MSK	/;"	d
SPDWN_RXDV_MSK	drivers/usb/eth/r8152.h	/^#define SPDWN_RXDV_MSK	/;"	d
SPD_ADDR_MAP_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_ADDR_MAP_BYTE	/;"	d	file:
SPD_ADDR_MAP_MIRROR_OFFS	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_ADDR_MAP_MIRROR_OFFS	/;"	d	file:
SPD_BUS_ECC_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_BUS_ECC_MASK	/;"	d	file:
SPD_BUS_ECC_OFF	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_BUS_ECC_OFF	/;"	d	file:
SPD_BUS_WIDTH_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_BUS_WIDTH_BYTE	/;"	d	file:
SPD_BUS_WIDTH_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_BUS_WIDTH_MASK	/;"	d	file:
SPD_BUS_WIDTH_OFF	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_BUS_WIDTH_OFF	/;"	d	file:
SPD_COL_NUM_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_COL_NUM_BYTE	/;"	d	file:
SPD_COL_NUM_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_COL_NUM_MASK	/;"	d	file:
SPD_COL_NUM_MIN	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_COL_NUM_MIN	/;"	d	file:
SPD_COL_NUM_OFF	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_COL_NUM_OFF	/;"	d	file:
SPD_DEV_DENSITY_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_DEV_DENSITY_BYTE	/;"	d	file:
SPD_DEV_DENSITY_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_DEV_DENSITY_MASK	/;"	d	file:
SPD_DEV_TYPE_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_DEV_TYPE_BYTE	/;"	d	file:
SPD_EEPROM_ADDRESS	include/configs/B4860QDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/BSC9131RDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/C29XPCIE.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8323ERDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC832XEMDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8349EMDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8349ITX.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC837XEMDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8536DS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8540ADS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8541CDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8544DS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8548CDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8555CDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8560ADS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8568MDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8569MDS.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/MPC8610HPCD.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/P1010RDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/P1022DS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/P1023RDB.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/P2041RDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/PIP405.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/T102xQDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T102xRDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T1040QDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T104xRDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T208xQDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T208xRDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/T4240RDB.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/bamboo.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/bubinga.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/canyonlands.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/controlcenterd.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/corenet_ds.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/icon.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/katmai.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/km/kmp204x-common.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls1021aqds.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls1043aqds.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls1046aqds.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls1046ardb.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls2080a_emu.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/luan.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/p1_p2_rdb_pc.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/redwood.h	/^#define SPD_EEPROM_ADDRESS /;"	d
SPD_EEPROM_ADDRESS	include/configs/sbc8349.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/sbc8548.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/socrates.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/vme8349.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/walnut.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/xpedite1000.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/xpedite520x.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/xpedite550x.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS	include/configs/yucca.h	/^#define SPD_EEPROM_ADDRESS	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/B4860QDS.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/BSC9132QDS.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/MPC8349EMDS.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/MPC8572DS.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/MPC8641HPCN.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/T208xQDS.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/T208xRDB.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/T4240RDB.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/corenet_ds.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/cyrus.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/ls2080a_emu.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/sbc8641d.h	/^    #define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/xpedite517x.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS1	include/configs/xpedite537x.h	/^#define SPD_EEPROM_ADDRESS1	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/B4860QDS.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/BSC9132QDS.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/MPC8349EMDS.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/MPC8572DS.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/MPC8641HPCN.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/T208xQDS.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/T208xRDB.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/T4240RDB.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/corenet_ds.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/cyrus.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/ls2080a_emu.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/sbc8641d.h	/^    #define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/xpedite517x.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS2	include/configs/xpedite537x.h	/^#define SPD_EEPROM_ADDRESS2	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/MPC8641HPCN.h	/^#define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/T4240RDB.h	/^#define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/ls2080a_emu.h	/^#define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS3	include/configs/sbc8641d.h	/^    #define SPD_EEPROM_ADDRESS3	/;"	d
SPD_EEPROM_ADDRESS4	include/configs/MPC8641HPCN.h	/^#define SPD_EEPROM_ADDRESS4	/;"	d
SPD_EEPROM_ADDRESS4	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS4	/;"	d
SPD_EEPROM_ADDRESS4	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS4	/;"	d
SPD_EEPROM_ADDRESS4	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS4	/;"	d
SPD_EEPROM_ADDRESS4	include/configs/sbc8641d.h	/^    #define SPD_EEPROM_ADDRESS4	/;"	d
SPD_EEPROM_ADDRESS5	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS5	/;"	d
SPD_EEPROM_ADDRESS5	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS5	/;"	d
SPD_EEPROM_ADDRESS5	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS5	/;"	d
SPD_EEPROM_ADDRESS6	include/configs/T4240QDS.h	/^#define SPD_EEPROM_ADDRESS6	/;"	d
SPD_EEPROM_ADDRESS6	include/configs/ls2080aqds.h	/^#define SPD_EEPROM_ADDRESS6	/;"	d
SPD_EEPROM_ADDRESS6	include/configs/ls2080ardb.h	/^#define SPD_EEPROM_ADDRESS6	/;"	d
SPD_EEPROM_ADDR_LEN	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^#define SPD_EEPROM_ADDR_LEN /;"	d	file:
SPD_EEPROM_OFFSET	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^#define SPD_EEPROM_OFFSET	/;"	d	file:
SPD_EEPROM_OFFSET	include/configs/xpedite517x.h	/^#define SPD_EEPROM_OFFSET	/;"	d
SPD_EEPROM_OFFSET	include/configs/xpedite537x.h	/^#define SPD_EEPROM_OFFSET	/;"	d
SPD_EEPROM_OFFSET	include/configs/xpedite550x.h	/^#define SPD_EEPROM_OFFSET	/;"	d
SPD_ERR	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^# define SPD_ERR(/;"	d	file:
SPD_MEMTYPE_DDR	include/ddr_spd.h	/^#define SPD_MEMTYPE_DDR	/;"	d
SPD_MEMTYPE_DDR	include/spd.h	/^#define SPD_MEMTYPE_DDR	/;"	d
SPD_MEMTYPE_DDR2	include/ddr_spd.h	/^#define SPD_MEMTYPE_DDR2	/;"	d
SPD_MEMTYPE_DDR2	include/spd.h	/^#define SPD_MEMTYPE_DDR2	/;"	d
SPD_MEMTYPE_DDR2_FBDIMM	include/ddr_spd.h	/^#define SPD_MEMTYPE_DDR2_FBDIMM	/;"	d
SPD_MEMTYPE_DDR2_FBDIMM_PROBE	include/ddr_spd.h	/^#define SPD_MEMTYPE_DDR2_FBDIMM_PROBE	/;"	d
SPD_MEMTYPE_DDR3	include/ddr_spd.h	/^#define SPD_MEMTYPE_DDR3	/;"	d
SPD_MEMTYPE_DDR4	include/ddr_spd.h	/^#define SPD_MEMTYPE_DDR4	/;"	d
SPD_MEMTYPE_EDO	include/ddr_spd.h	/^#define SPD_MEMTYPE_EDO	/;"	d
SPD_MEMTYPE_EDO	include/spd.h	/^#define SPD_MEMTYPE_EDO	/;"	d
SPD_MEMTYPE_FPM	include/ddr_spd.h	/^#define SPD_MEMTYPE_FPM	/;"	d
SPD_MEMTYPE_FPM	include/spd.h	/^#define SPD_MEMTYPE_FPM	/;"	d
SPD_MEMTYPE_PIPE_NIBBLE	include/ddr_spd.h	/^#define SPD_MEMTYPE_PIPE_NIBBLE	/;"	d
SPD_MEMTYPE_PIPE_NIBBLE	include/spd.h	/^#define SPD_MEMTYPE_PIPE_NIBBLE	/;"	d
SPD_MEMTYPE_ROM	include/ddr_spd.h	/^#define SPD_MEMTYPE_ROM	/;"	d
SPD_MEMTYPE_ROM	include/spd.h	/^#define SPD_MEMTYPE_ROM	/;"	d
SPD_MEMTYPE_SDRAM	include/ddr_spd.h	/^#define SPD_MEMTYPE_SDRAM	/;"	d
SPD_MEMTYPE_SDRAM	include/spd.h	/^#define SPD_MEMTYPE_SDRAM	/;"	d
SPD_MEMTYPE_SGRAM	include/ddr_spd.h	/^#define SPD_MEMTYPE_SGRAM	/;"	d
SPD_MEMTYPE_SGRAM	include/spd.h	/^#define SPD_MEMTYPE_SGRAM	/;"	d
SPD_MEM_TYPE_DDR1	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MEM_TYPE_DDR1	/;"	d	file:
SPD_MEM_TYPE_DDR2	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MEM_TYPE_DDR2	/;"	d	file:
SPD_MEM_TYPE_DDR3	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MEM_TYPE_DDR3	/;"	d	file:
SPD_MEM_TYPE_SDRAM	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MEM_TYPE_SDRAM	/;"	d	file:
SPD_MODULE_BANK_NUM_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_BANK_NUM_MASK	/;"	d	file:
SPD_MODULE_BANK_NUM_MIN	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_BANK_NUM_MIN	/;"	d	file:
SPD_MODULE_BANK_NUM_OFF	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_BANK_NUM_OFF	/;"	d	file:
SPD_MODULE_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_MASK	/;"	d	file:
SPD_MODULE_ORG_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_ORG_BYTE	/;"	d	file:
SPD_MODULE_SDRAM_DEV_WIDTH_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_SDRAM_DEV_WIDTH_MASK	/;"	d	file:
SPD_MODULE_SDRAM_DEV_WIDTH_OFF	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_SDRAM_DEV_WIDTH_OFF /;"	d	file:
SPD_MODULE_TYPE_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_TYPE_BYTE	/;"	d	file:
SPD_MODULE_TYPE_RDIMM	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_TYPE_RDIMM	/;"	d	file:
SPD_MODULE_TYPE_UDIMM	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MODULE_TYPE_UDIMM	/;"	d	file:
SPD_MTB_DIVIDEND_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MTB_DIVIDEND_BYTE	/;"	d	file:
SPD_MTB_DIVISOR_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_MTB_DIVISOR_BYTE	/;"	d	file:
SPD_OPT_FEATURES_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_OPT_FEATURES_BYTE	/;"	d	file:
SPD_RDIMM_RC_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_RDIMM_RC_BYTE	/;"	d	file:
SPD_RDIMM_RC_NIBBLE_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_RDIMM_RC_NIBBLE_MASK	/;"	d	file:
SPD_RDIMM_RC_NUM	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_RDIMM_RC_NUM	/;"	d	file:
SPD_ROW_NUM_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_ROW_NUM_BYTE	/;"	d	file:
SPD_ROW_NUM_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_ROW_NUM_MASK	/;"	d	file:
SPD_ROW_NUM_MIN	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_ROW_NUM_MIN	/;"	d	file:
SPD_ROW_NUM_OFF	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_ROW_NUM_OFF	/;"	d	file:
SPD_SIZE	drivers/ddr/marvell/axp/ddr3_init.h	/^#define SPD_SIZE	/;"	d
SPD_SPA0_ADDRESS	drivers/ddr/fsl/main.c	/^#define SPD_SPA0_ADDRESS	/;"	d	file:
SPD_SPA1_ADDRESS	drivers/ddr/fsl/main.c	/^#define SPD_SPA1_ADDRESS	/;"	d	file:
SPD_SUP_CAS_LAT_LSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_SUP_CAS_LAT_LSB_BYTE	/;"	d	file:
SPD_SUP_CAS_LAT_MSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_SUP_CAS_LAT_MSB_BYTE	/;"	d	file:
SPD_TAA_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TAA_BYTE	/;"	d	file:
SPD_TCK_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TCK_BYTE	/;"	d	file:
SPD_TFAW_LSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TFAW_LSB_BYTE	/;"	d	file:
SPD_TFAW_MSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TFAW_MSB_BYTE	/;"	d	file:
SPD_TFAW_MSB_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TFAW_MSB_MASK	/;"	d	file:
SPD_THERMAL_REFRESH_OPT_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_THERMAL_REFRESH_OPT_BYTE	/;"	d	file:
SPD_TRAS_LSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRAS_LSB_BYTE	/;"	d	file:
SPD_TRAS_MSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRAS_MSB_BYTE	/;"	d	file:
SPD_TRAS_MSB_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRAS_MSB_MASK	/;"	d	file:
SPD_TRCD_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRCD_BYTE	/;"	d	file:
SPD_TRC_LSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRC_LSB_BYTE	/;"	d	file:
SPD_TRC_MSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRC_MSB_BYTE	/;"	d	file:
SPD_TRC_MSB_MASK	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRC_MSB_MASK	/;"	d	file:
SPD_TRFC_LSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRFC_LSB_BYTE	/;"	d	file:
SPD_TRFC_MSB_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRFC_MSB_BYTE	/;"	d	file:
SPD_TRP_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRP_BYTE	/;"	d	file:
SPD_TRRD_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRRD_BYTE	/;"	d	file:
SPD_TRTP_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TRTP_BYTE	/;"	d	file:
SPD_TWR_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TWR_BYTE	/;"	d	file:
SPD_TWTR_BYTE	drivers/ddr/marvell/axp/ddr3_spd.c	/^#define SPD_TWTR_BYTE	/;"	d	file:
SPD_VAL	board/esd/vme8349/vme8349.c	/^#define SPD_VAL(/;"	d	file:
SPE	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define SPE	/;"	d
SPEAKER	board/teejet/mt_ventoux/mt_ventoux.c	/^#define SPEAKER	/;"	d	file:
SPEAR_GPIO_COUNT	arch/arm/include/asm/arch-spear/gpio.h	/^#define SPEAR_GPIO_COUNT	/;"	d
SPECIAL	lib/vsprintf.c	/^#define SPECIAL	/;"	d	file:
SPECIAL_VAR_SYMBOL	common/cli_hush.c	/^#define SPECIAL_VAR_SYMBOL /;"	d	file:
SPECTRA_PARTITION_ID	drivers/mtd/nand/denali.h	/^#define SPECTRA_PARTITION_ID /;"	d
SPECTRA_START_BLOCK	drivers/mtd/nand/denali.h	/^#define SPECTRA_START_BLOCK /;"	d
SPEC_HLT	cmd/fdc.c	/^#define SPEC_HLT	/;"	d	file:
SPEC_HUTSRT	cmd/fdc.c	/^#define SPEC_HUTSRT	/;"	d	file:
SPEC_PWR_DOWN	include/mv88e6352.h	/^#define SPEC_PWR_DOWN	/;"	d
SPEC_STAT_CABLE_LEN_MASK	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_CABLE_LEN_MASK	/;"	d	file:
SPEC_STAT_FULL_DUP	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_FULL_DUP	/;"	d	file:
SPEC_STAT_JABBER	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_JABBER	/;"	d	file:
SPEC_STAT_LINK_UP	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_LINK_UP	/;"	d	file:
SPEC_STAT_MDIX	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_MDIX	/;"	d	file:
SPEC_STAT_PAGE_RCVD	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_PAGE_RCVD	/;"	d	file:
SPEC_STAT_POLARITY	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_POLARITY	/;"	d	file:
SPEC_STAT_RESOLVED	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_RESOLVED	/;"	d	file:
SPEC_STAT_SPEED_MASK	drivers/net/tsi108_eth.c	/^#define SPEC_STAT_SPEED_MASK	/;"	d	file:
SPEED100	drivers/net/ax88180.h	/^  #define SPEED100	/;"	d
SPEEDIN_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SPEEDIN_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SPEEDIN_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SPEEDIN_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SPEEDIN_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SPEEDIN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SPEEDSTEP_APIC_MAGIC	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_APIC_MAGIC /;"	d
SPEEDSTEP_DOUBLE_RATIO	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_DOUBLE_RATIO(/;"	d
SPEEDSTEP_ENCODE_STATE	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_ENCODE_STATE(/;"	d
SPEEDSTEP_MAX_NORMAL_STATES	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MAX_NORMAL_STATES	/;"	d
SPEEDSTEP_MAX_POWER_MEROM	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MAX_POWER_MEROM	/;"	d
SPEEDSTEP_MAX_POWER_PENRYN	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MAX_POWER_PENRYN	/;"	d
SPEEDSTEP_MAX_POWER_YONAH	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MAX_POWER_YONAH	/;"	d
SPEEDSTEP_MAX_STATES	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MAX_STATES	/;"	d
SPEEDSTEP_MIN_POWER_MEROM	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MIN_POWER_MEROM	/;"	d
SPEEDSTEP_MIN_POWER_PENRYN	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MIN_POWER_PENRYN	/;"	d
SPEEDSTEP_MIN_POWER_YONAH	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_MIN_POWER_YONAH	/;"	d
SPEEDSTEP_RATIO_DYNFSB	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_RATIO_DYNFSB	/;"	d
SPEEDSTEP_RATIO_DYNFSB_SHIFT	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_RATIO_DYNFSB_SHIFT	/;"	d
SPEEDSTEP_RATIO_NONINT	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_RATIO_NONINT	/;"	d
SPEEDSTEP_RATIO_NONINT_SHIFT	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_RATIO_NONINT_SHIFT	/;"	d
SPEEDSTEP_RATIO_SHIFT	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_RATIO_SHIFT	/;"	d
SPEEDSTEP_RATIO_VALUE_MASK	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_RATIO_VALUE_MASK	/;"	d
SPEEDSTEP_SLFM_POWER_MEROM	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_SLFM_POWER_MEROM	/;"	d
SPEEDSTEP_SLFM_POWER_PENRYN	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_SLFM_POWER_PENRYN	/;"	d
SPEEDSTEP_STATE_FROM_MSR	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_STATE_FROM_MSR(/;"	d
SPEEDSTEP_VID_MASK	arch/x86/include/asm/speedstep.h	/^#define SPEEDSTEP_VID_MASK	/;"	d
SPEED_10	drivers/net/e1000.h	/^#define SPEED_10 /;"	d
SPEED_10	drivers/net/tsi108_eth.c	/^#define SPEED_10	/;"	d	file:
SPEED_10	drivers/qe/uec_phy.h	/^#define SPEED_10 /;"	d
SPEED_10	drivers/usb/eth/r8152.h	/^#define SPEED_10 /;"	d
SPEED_10	include/linux/ethtool.h	/^#define SPEED_10	/;"	d
SPEED_100	drivers/net/e1000.h	/^#define SPEED_100 /;"	d
SPEED_100	drivers/net/tsi108_eth.c	/^#define SPEED_100	/;"	d	file:
SPEED_100	drivers/qe/uec_phy.h	/^#define SPEED_100 /;"	d
SPEED_100	drivers/usb/eth/r8152.h	/^#define SPEED_100 /;"	d
SPEED_100	include/linux/ethtool.h	/^#define SPEED_100	/;"	d
SPEED_1000	drivers/net/e1000.h	/^#define SPEED_1000 /;"	d
SPEED_1000	drivers/net/tsi108_eth.c	/^#define SPEED_1000	/;"	d	file:
SPEED_1000	drivers/qe/uec_phy.h	/^#define SPEED_1000 /;"	d
SPEED_1000	drivers/usb/eth/r8152.h	/^#define SPEED_1000 /;"	d
SPEED_1000	include/linux/ethtool.h	/^#define SPEED_1000	/;"	d
SPEED_10000	include/linux/ethtool.h	/^#define SPEED_10000	/;"	d
SPEED_1000_FOR	include/mv88e6352.h	/^#define SPEED_1000_FOR	/;"	d
SPEED_100_FOR	include/mv88e6352.h	/^#define SPEED_100_FOR	/;"	d
SPEED_10_FOR	include/mv88e6352.h	/^#define SPEED_10_FOR	/;"	d
SPEED_2500	include/linux/ethtool.h	/^#define SPEED_2500	/;"	d
SPEED_BIN_DDR_1066E	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1066E,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1066F	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1066F,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1066G	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1066G,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1333F	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1333F,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1333G	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1333G,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1333H	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1333H,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1333H_EXT	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1333H_EXT,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1333J	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1333J,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1600G	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1600G,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1600H	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1600H,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1600J	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1600J,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1600K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1600K,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1600K_EXT	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1600K_EXT,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1866J	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1866J,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1866K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1866K,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1866L	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1866L,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1866M	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1866M,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_1866M_EXT	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_1866M_EXT$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_2133K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_2133K,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_2133L	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_2133L,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_2133M	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_2133M,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_2133N	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_2133N,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_800D	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_800D,$/;"	e	enum:hws_speed_bin
SPEED_BIN_DDR_800E	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_DDR_800E,$/;"	e	enum:hws_speed_bin
SPEED_BIN_TFAW1K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TFAW1K,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TFAW2K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TFAW2K,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TMOD	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TMOD$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TPD	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TPD,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRAS	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRAS,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRC	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRC,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRCD	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRCD,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRP	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRP,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRRD1K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRRD1K,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRRD2K	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRRD2K,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TRTP	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TRTP,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TWR	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TWR,$/;"	e	enum:speed_bin_table_elements
SPEED_BIN_TWTR	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^	SPEED_BIN_TWTR,$/;"	e	enum:speed_bin_table_elements
SPEED_DOWN_MSK	drivers/usb/eth/r8152.h	/^#define SPEED_DOWN_MSK	/;"	d
SPEED_PITC	arch/powerpc/cpu/mpc8xx/speed.c	/^#define SPEED_PITC	/;"	d	file:
SPEED_PITC_INIT	arch/powerpc/cpu/mpc8xx/speed.c	/^#define SPEED_PITC_INIT	/;"	d	file:
SPEED_PIT_COUNTS	arch/powerpc/cpu/mpc8xx/speed.c	/^#define SPEED_PIT_COUNTS /;"	d	file:
SPEED_PLPRCR_WAIT_5CYC	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define SPEED_PLPRCR_WAIT_5CYC	/;"	d	file:
SPEED_UNKNOWN	drivers/usb/eth/r8152.h	/^#define SPEED_UNKNOWN /;"	d
SPHY_HALF_RATE	board/highbank/ahci.c	/^#define SPHY_HALF_RATE	/;"	d	file:
SPHY_LANE	board/highbank/ahci.c	/^#define SPHY_LANE	/;"	d	file:
SPI Flash Support	drivers/mtd/spi/Kconfig	/^menu "SPI Flash Support"$/;"	m
SPI Support	drivers/spi/Kconfig	/^menu "SPI Support"$/;"	m
SPI0D2_EN	board/bf609-ezkit/soft_switch.h	/^#define SPI0D2_EN /;"	d
SPI0D3_EN	board/bf609-ezkit/soft_switch.h	/^#define SPI0D3_EN /;"	d
SPI0_BASE	drivers/spi/davinci_spi.c	/^#define SPI0_BASE	/;"	d	file:
SPI0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SPI0_BASE_ADDR	/;"	d
SPI0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SPI0_BASE_ADDR	/;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_BAUD /;"	d
SPI0_BUS	drivers/spi/davinci_spi.c	/^#define SPI0_BUS	/;"	d	file:
SPI0_CLK_DIV_BY_2	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SPI0_CLK_DIV_BY_2 /;"	d	file:
SPI0_CLK_DIV_BY_4	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SPI0_CLK_DIV_BY_4 /;"	d	file:
SPI0_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_CTL /;"	d
SPI0_CTL	drivers/spi/bfin_spi.c	/^# define SPI0_CTL /;"	d	file:
SPI0_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI0_DIV_MASK		= 0x7f,$/;"	e	enum:__anon3783c4e20403
SPI0_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI0_DIV_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20403
SPI0_FLG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_FLG /;"	d
SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_FLG /;"	d
SPI0_ISP_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI0_ISP_RATIO	/;"	d
SPI0_ISP_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI0_ISP_SEL	/;"	d
SPI0_MODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define SPI0_MODE	/;"	d
SPI0_NUM_CS	drivers/spi/davinci_spi.c	/^#define SPI0_NUM_CS	/;"	d	file:
SPI0_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI0_PLL_MASK		= 1,$/;"	e	enum:__anon3783c4e20403
SPI0_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI0_PLL_SELECT_CODEC	= 0,$/;"	e	enum:__anon3783c4e20403
SPI0_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI0_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20403
SPI0_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI0_PLL_SHIFT		= 7,$/;"	e	enum:__anon3783c4e20403
SPI0_PRE_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI0_PRE_RATIO	/;"	d
SPI0_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI0_RATIO	/;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_RDBR /;"	d
SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_RDBR /;"	d
SPI0_REGBASE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SPI0_REGBASE /;"	d
SPI0_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI0_SEL	/;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_SHADOW /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_STAT /;"	d
SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_STAT /;"	d
SPI0_SUB_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI0_SUB_RATIO	/;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI0_TDBR /;"	d
SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI0_TDBR /;"	d
SPI1_BASE	drivers/spi/davinci_spi.c	/^#define SPI1_BASE	/;"	d	file:
SPI1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SPI1_BASE_ADDR	/;"	d
SPI1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SPI1_BASE_ADDR /;"	d
SPI1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SPI1_BASE_ADDR	/;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_BAUD /;"	d
SPI1_BUS	drivers/spi/davinci_spi.c	/^#define SPI1_BUS	/;"	d	file:
SPI1_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	SPI1_CLK,$/;"	e	enum:mxc_peri_clock
SPI1_CS0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_CS0	/;"	d
SPI1_CS1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_CS1	/;"	d
SPI1_CS2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_CS2	/;"	d
SPI1_CS3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_CS3	/;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_CTL /;"	d
SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_CTL /;"	d
SPI1_D0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_D0	/;"	d
SPI1_D1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_D1	/;"	d
SPI1_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI1_DIV_MASK		= 0x7f,$/;"	e	enum:__anon3783c4e20403
SPI1_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI1_DIV_SHIFT		= 8,$/;"	e	enum:__anon3783c4e20403
SPI1_FLG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_FLG /;"	d
SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_FLG /;"	d
SPI1_ISP_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI1_ISP_RATIO	/;"	d
SPI1_ISP_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI1_ISP_SEL	/;"	d
SPI1_NUM_CS	drivers/spi/davinci_spi.c	/^#define SPI1_NUM_CS	/;"	d	file:
SPI1_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI1_PLL_MASK		= 1,$/;"	e	enum:__anon3783c4e20403
SPI1_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI1_PLL_SELECT_CODEC	= 0,$/;"	e	enum:__anon3783c4e20403
SPI1_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI1_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20403
SPI1_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI1_PLL_SHIFT		= 0xf,$/;"	e	enum:__anon3783c4e20403
SPI1_PRE_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI1_PRE_RATIO	/;"	d
SPI1_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI1_RATIO	/;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_RDBR /;"	d
SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_RDBR /;"	d
SPI1_REGBASE	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define SPI1_REGBASE /;"	d
SPI1_SCLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI1_SCLK	/;"	d
SPI1_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI1_SEL	/;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_SHADOW /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_STAT /;"	d
SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_STAT /;"	d
SPI1_SUB_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI1_SUB_RATIO	/;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI1_TDBR /;"	d
SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI1_TDBR /;"	d
SPI2_BASE	drivers/spi/davinci_spi.c	/^#define SPI2_BASE	/;"	d	file:
SPI2_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SPI2_BASE_ADDR	/;"	d
SPI2_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SPI2_BASE_ADDR /;"	d
SPI2_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_BAUD /;"	d
SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_BAUD /;"	d
SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_BAUD /;"	d
SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_BAUD /;"	d
SPI2_BUS	drivers/spi/davinci_spi.c	/^#define SPI2_BUS	/;"	d	file:
SPI2_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	SPI2_CLK,$/;"	e	enum:mxc_peri_clock
SPI2_CS0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI2_CS0	/;"	d
SPI2_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_CTL /;"	d
SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_CTL /;"	d
SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_CTL /;"	d
SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_CTL /;"	d
SPI2_D0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI2_D0	/;"	d
SPI2_D1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI2_D1	/;"	d
SPI2_DIV_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI2_DIV_MASK		= 0x7f,$/;"	e	enum:__anon3783c4e20603
SPI2_DIV_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI2_DIV_SHIFT		= 0,$/;"	e	enum:__anon3783c4e20603
SPI2_FLG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_FLG /;"	d
SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_FLG /;"	d
SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_FLG /;"	d
SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_FLG /;"	d
SPI2_NUM_CS	drivers/spi/davinci_spi.c	/^#define SPI2_NUM_CS	/;"	d	file:
SPI2_PLL_MASK	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI2_PLL_MASK		= 1,$/;"	e	enum:__anon3783c4e20603
SPI2_PLL_SELECT_CODEC	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI2_PLL_SELECT_CODEC	= 0,$/;"	e	enum:__anon3783c4e20603
SPI2_PLL_SELECT_GENERAL	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI2_PLL_SELECT_GENERAL,$/;"	e	enum:__anon3783c4e20603
SPI2_PLL_SHIFT	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	SPI2_PLL_SHIFT		= 7,$/;"	e	enum:__anon3783c4e20603
SPI2_PRE_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI2_PRE_RATIO	/;"	d
SPI2_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI2_RATIO	/;"	d
SPI2_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_RDBR /;"	d
SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_RDBR /;"	d
SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_RDBR /;"	d
SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_RDBR /;"	d
SPI2_SCLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SPI2_SCLK	/;"	d
SPI2_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI2_SEL	/;"	d
SPI2_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_SHADOW /;"	d
SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_SHADOW /;"	d
SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_SHADOW /;"	d
SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_SHADOW /;"	d
SPI2_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_STAT /;"	d
SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_STAT /;"	d
SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_STAT /;"	d
SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_STAT /;"	d
SPI2_SUB_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPI2_SUB_RATIO	/;"	d
SPI2_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPI2_TDBR /;"	d
SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPI2_TDBR /;"	d
SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPI2_TDBR /;"	d
SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPI2_TDBR /;"	d
SPI3_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SPI3_BASE_ADDR	/;"	d
SPI3_DIV_CON_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	SPI3_DIV_CON_MASK		= 0x7f,$/;"	e	enum:__anon06b9221d0103	file:
SPI3_DIV_CON_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	SPI3_DIV_CON_SHIFT		= 0x0,$/;"	e	enum:__anon06b9221d0103	file:
SPI3_PLL_SEL_24M	drivers/clk/rockchip/clk_rk3399.c	/^	SPI3_PLL_SEL_24M		= 0,$/;"	e	enum:__anon06b9221d0103	file:
SPI3_PLL_SEL_MASK	drivers/clk/rockchip/clk_rk3399.c	/^	SPI3_PLL_SEL_MASK		= 1 << SPI3_PLL_SEL_SHIFT,$/;"	e	enum:__anon06b9221d0103	file:
SPI3_PLL_SEL_PPLL	drivers/clk/rockchip/clk_rk3399.c	/^	SPI3_PLL_SEL_PPLL		= 1,$/;"	e	enum:__anon06b9221d0103	file:
SPI3_PLL_SEL_SHIFT	drivers/clk/rockchip/clk_rk3399.c	/^	SPI3_PLL_SEL_SHIFT		= 7,$/;"	e	enum:__anon06b9221d0103	file:
SPIBAR_FADDR	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_FADDR /;"	d
SPIBAR_FDATA	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_FDATA(/;"	d
SPIBAR_FDOC	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_FDOC	/;"	d
SPIBAR_FDOD	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_FDOD	/;"	d
SPIBAR_HSFC	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_HSFC /;"	d
SPIBAR_HSFC_BYTE_COUNT	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFC_BYTE_COUNT(/;"	d
SPIBAR_HSFC_CYCLE_ERASE	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFC_CYCLE_ERASE /;"	d
SPIBAR_HSFC_CYCLE_READ	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFC_CYCLE_READ /;"	d
SPIBAR_HSFC_CYCLE_WRITE	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFC_CYCLE_WRITE /;"	d
SPIBAR_HSFC_GO	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFC_GO /;"	d
SPIBAR_HSFS	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_HSFS /;"	d
SPIBAR_HSFS_AEL	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFS_AEL /;"	d
SPIBAR_HSFS_FCERR	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFS_FCERR /;"	d
SPIBAR_HSFS_FDONE	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFS_FDONE /;"	d
SPIBAR_HSFS_FLOCKDN	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFS_FLOCKDN /;"	d
SPIBAR_HSFS_SCIP	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_HSFS_SCIP /;"	d
SPIBAR_OFFSET	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_OFFSET	/;"	d
SPIBAR_OPMENU_LOWER	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_OPMENU_LOWER	/;"	d
SPIBAR_OPMENU_UPPER	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_OPMENU_UPPER	/;"	d
SPIBAR_OPTYPE	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_OPTYPE	/;"	d
SPIBAR_PREOP	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_PREOP	/;"	d
SPIBAR_SSFC	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_SSFC	/;"	d
SPIBAR_SSFC	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_SSFC /;"	d
SPIBAR_SSFC_DATA	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_SSFC_DATA /;"	d
SPIBAR_SSFC_GO	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_SSFC_GO /;"	d
SPIBAR_SSFS	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPIBAR_SSFS /;"	d
SPIBAR_SSFS_DONE	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_SSFS_DONE /;"	d
SPIBAR_SSFS_ERROR	arch/x86/include/asm/arch-broadwell/spi.h	/^#define  SPIBAR_SSFS_ERROR /;"	d
SPIBUF_RXEMPTY_MASK	drivers/spi/davinci_spi.c	/^#define SPIBUF_RXEMPTY_MASK	/;"	d	file:
SPIBUF_TXFULL_MASK	drivers/spi/davinci_spi.c	/^#define SPIBUF_TXFULL_MASK	/;"	d	file:
SPICR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SPICR	/;"	d
SPICR0	arch/sh/include/asm/cpu_sh7722.h	/^#define SPICR0 /;"	d
SPICR1	arch/sh/include/asm/cpu_sh7722.h	/^#define SPICR1 /;"	d
SPICR_CPHA	drivers/spi/xilinx_spi.c	/^#define SPICR_CPHA	/;"	d	file:
SPICR_CPOL	drivers/spi/xilinx_spi.c	/^#define SPICR_CPOL	/;"	d	file:
SPICR_LOOP	drivers/spi/xilinx_spi.c	/^#define SPICR_LOOP	/;"	d	file:
SPICR_LSB_FIRST	drivers/spi/xilinx_spi.c	/^#define SPICR_LSB_FIRST	/;"	d	file:
SPICR_MANUAL_SS	drivers/spi/xilinx_spi.c	/^#define SPICR_MANUAL_SS	/;"	d	file:
SPICR_MASTER_INHIBIT	drivers/spi/xilinx_spi.c	/^#define SPICR_MASTER_INHIBIT	/;"	d	file:
SPICR_MASTER_MODE	drivers/spi/xilinx_spi.c	/^#define SPICR_MASTER_MODE	/;"	d	file:
SPICR_RXFIFO_RESEST	drivers/spi/xilinx_spi.c	/^#define SPICR_RXFIFO_RESEST	/;"	d	file:
SPICR_SPE	drivers/spi/xilinx_spi.c	/^#define SPICR_SPE	/;"	d	file:
SPICR_TXFIFO_RESEST	drivers/spi/xilinx_spi.c	/^#define SPICR_TXFIFO_RESEST	/;"	d	file:
SPIC_ACS	drivers/spi/ich.h	/^	SPIC_ACS =		0x000004,$/;"	e	enum:__anon07fadeb80203
SPIC_DBC	drivers/spi/ich.h	/^	SPIC_DBC =		0x003f00,$/;"	e	enum:__anon07fadeb80203
SPIC_DS	drivers/spi/ich.h	/^	SPIC_DS =		0x004000,$/;"	e	enum:__anon07fadeb80203
SPIC_SCGO	drivers/spi/ich.h	/^	SPIC_SCGO =		0x000002,$/;"	e	enum:__anon07fadeb80203
SPIC_SME	drivers/spi/ich.h	/^	SPIC_SME =		0x008000,$/;"	e	enum:__anon07fadeb80203
SPIC_SPOP	drivers/spi/ich.h	/^	SPIC_SPOP =		0x000008,$/;"	e	enum:__anon07fadeb80203
SPIDAT1_CSHOLD_SHIFT	drivers/spi/davinci_spi.c	/^#define SPIDAT1_CSHOLD_SHIFT	/;"	d	file:
SPIDAT1_CSNR_SHIFT	drivers/spi/davinci_spi.c	/^#define SPIDAT1_CSNR_SHIFT	/;"	d	file:
SPIDEF_CSDEF0_MASK	drivers/spi/davinci_spi.c	/^#define SPIDEF_CSDEF0_MASK	/;"	d	file:
SPIDMCOR	board/renesas/sh7752evb/spi-boot.c	/^#define SPIDMCOR	/;"	d	file:
SPIDMCOR	board/renesas/sh7753evb/spi-boot.c	/^#define SPIDMCOR	/;"	d	file:
SPIDMCOR	board/renesas/sh7757lcr/spi-boot.c	/^#define SPIDMCOR	/;"	d	file:
SPIDMINTMR	board/renesas/sh7752evb/spi-boot.c	/^#define SPIDMINTMR	/;"	d	file:
SPIDMINTMR	board/renesas/sh7753evb/spi-boot.c	/^#define SPIDMINTMR	/;"	d	file:
SPIDMINTMR	board/renesas/sh7757lcr/spi-boot.c	/^#define SPIDMINTMR	/;"	d	file:
SPIDMINTSR	board/renesas/sh7752evb/spi-boot.c	/^#define SPIDMINTSR	/;"	d	file:
SPIDMINTSR	board/renesas/sh7753evb/spi-boot.c	/^#define SPIDMINTSR	/;"	d	file:
SPIDMINTSR	board/renesas/sh7757lcr/spi-boot.c	/^#define SPIDMINTSR	/;"	d	file:
SPIDMINTSR_DMEND	board/renesas/sh7752evb/spi-boot.c	/^#define SPIDMINTSR_DMEND	/;"	d	file:
SPIDMINTSR_DMEND	board/renesas/sh7753evb/spi-boot.c	/^#define SPIDMINTSR_DMEND	/;"	d	file:
SPIDMINTSR_DMEND	board/renesas/sh7757lcr/spi-boot.c	/^#define SPIDMINTSR_DMEND	/;"	d	file:
SPIDRR_16BIT_MASK	drivers/spi/xilinx_spi.c	/^#define SPIDRR_16BIT_MASK	/;"	d	file:
SPIDRR_32BIT_MASK	drivers/spi/xilinx_spi.c	/^#define SPIDRR_32BIT_MASK	/;"	d	file:
SPIDRR_8BIT_MASK	drivers/spi/xilinx_spi.c	/^#define SPIDRR_8BIT_MASK	/;"	d	file:
SPIDTR_16BIT_MASK	drivers/spi/xilinx_spi.c	/^#define SPIDTR_16BIT_MASK	/;"	d	file:
SPIDTR_32BIT_MASK	drivers/spi/xilinx_spi.c	/^#define SPIDTR_32BIT_MASK	/;"	d	file:
SPIDTR_8BIT_MASK	drivers/spi/xilinx_spi.c	/^#define SPIDTR_8BIT_MASK	/;"	d	file:
SPIF	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define SPIF	/;"	d
SPIFLASH	board/Arcturus/ucp1020/Kconfig	/^config SPIFLASH$/;"	c
SPIFLASH	include/configs/microblaze-generic.h	/^#define	SPIFLASH$/;"	d
SPIFLASH_CS_EN	board/bf609-ezkit/soft_switch.h	/^#define SPIFLASH_CS_EN /;"	d
SPIFMT_PHASE_SHIFT	drivers/spi/davinci_spi.c	/^#define SPIFMT_PHASE_SHIFT	/;"	d	file:
SPIFMT_POLARITY_SHIFT	drivers/spi/davinci_spi.c	/^#define SPIFMT_POLARITY_SHIFT	/;"	d	file:
SPIFMT_PRESCALE_SHIFT	drivers/spi/davinci_spi.c	/^#define SPIFMT_PRESCALE_SHIFT	/;"	d	file:
SPIFMT_SHIFTDIR_SHIFT	drivers/spi/davinci_spi.c	/^#define SPIFMT_SHIFTDIR_SHIFT	/;"	d	file:
SPIGCR0_SPIENA_MASK	drivers/spi/davinci_spi.c	/^#define SPIGCR0_SPIENA_MASK	/;"	d	file:
SPIGCR0_SPIRST_MASK	drivers/spi/davinci_spi.c	/^#define SPIGCR0_SPIRST_MASK	/;"	d	file:
SPIGCR1_CLKMOD_MASK	drivers/spi/davinci_spi.c	/^#define SPIGCR1_CLKMOD_MASK	/;"	d	file:
SPIGCR1_MASTER_MASK	drivers/spi/davinci_spi.c	/^#define SPIGCR1_MASTER_MASK	/;"	d	file:
SPIGCR1_SPIENA_MASK	drivers/spi/davinci_spi.c	/^#define SPIGCR1_SPIENA_MASK	/;"	d	file:
SPIM0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM0_RESET	/;"	d
SPIM1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIM1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIM1_RESET	/;"	d
SPIMUX_SEL_UART3	board/freescale/bsc9132qds/bsc9132qds.c	/^#define SPIMUX_SEL_UART3	/;"	d	file:
SPINWAIT	drivers/net/bcm-sf2-eth-gmac.c	/^#define SPINWAIT(/;"	d	file:
SPIN_BLKSIZE	fs/jffs2/jffs2_1pass.c	/^#define	SPIN_BLKSIZE	/;"	d	file:
SPIN_TABLE_ELEM_ENTRY_ADDR_IDX	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX	/;"	d
SPIN_TABLE_ELEM_LPID_IDX	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define SPIN_TABLE_ELEM_LPID_IDX	/;"	d
SPIN_TABLE_ELEM_SIZE	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define SPIN_TABLE_ELEM_SIZE	/;"	d
SPIN_TABLE_ELEM_STATUS_IDX	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define SPIN_TABLE_ELEM_STATUS_IDX	/;"	d
SPIPC0_CLKFUN_MASK	drivers/spi/davinci_spi.c	/^#define SPIPC0_CLKFUN_MASK	/;"	d	file:
SPIPC0_DIFUN_MASK	drivers/spi/davinci_spi.c	/^#define SPIPC0_DIFUN_MASK	/;"	d	file:
SPIPC0_DOFUN_MASK	drivers/spi/davinci_spi.c	/^#define SPIPC0_DOFUN_MASK	/;"	d	file:
SPIPC0_EN0FUN_MASK	drivers/spi/davinci_spi.c	/^#define SPIPC0_EN0FUN_MASK	/;"	d	file:
SPIRI	arch/sh/include/asm/cpu_sh7722.h	/^#define SPIRI /;"	d
SPIS0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS0_RESET	/;"	d
SPIS1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPIS1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPIS1_RESET	/;"	d
SPISR_MODF	drivers/spi/xilinx_spi.c	/^#define SPISR_MODF	/;"	d	file:
SPISR_RX_EMPTY	drivers/spi/xilinx_spi.c	/^#define SPISR_RX_EMPTY	/;"	d	file:
SPISR_RX_FULL	drivers/spi/xilinx_spi.c	/^#define SPISR_RX_FULL	/;"	d	file:
SPISR_SLAVE_MODE_SELECT	drivers/spi/xilinx_spi.c	/^#define SPISR_SLAVE_MODE_SELECT	/;"	d	file:
SPISR_TX_EMPTY	drivers/spi/xilinx_spi.c	/^#define SPISR_TX_EMPTY	/;"	d	file:
SPISR_TX_FULL	drivers/spi/xilinx_spi.c	/^#define SPISR_TX_FULL	/;"	d	file:
SPISSR_ACT	drivers/spi/xilinx_spi.c	/^#define SPISSR_ACT(/;"	d	file:
SPISSR_MASK	drivers/spi/xilinx_spi.c	/^#define SPISSR_MASK(/;"	d	file:
SPISSR_OFF	drivers/spi/xilinx_spi.c	/^#define SPISSR_OFF	/;"	d	file:
SPISSR_RESET_VALUE	drivers/spi/xilinx_spi.c	/^#define SPISSR_RESET_VALUE	/;"	d	file:
SPIS_CDS	drivers/spi/ich.h	/^	SPIS_CDS =		0x0004,$/;"	e	enum:__anon07fadeb80103
SPIS_FCERR	drivers/spi/ich.h	/^	SPIS_FCERR =		0x0008,$/;"	e	enum:__anon07fadeb80103
SPIS_GRANT	drivers/spi/ich.h	/^	SPIS_GRANT =		0x0002,$/;"	e	enum:__anon07fadeb80103
SPIS_LOCK	drivers/spi/ich.h	/^	SPIS_LOCK =		0x8000,$/;"	e	enum:__anon07fadeb80103
SPIS_RESERVED_MASK	drivers/spi/ich.h	/^	SPIS_RESERVED_MASK =	0x7ff0,$/;"	e	enum:__anon07fadeb80103
SPIS_SCIP	drivers/spi/ich.h	/^	SPIS_SCIP =		0x0001,$/;"	e	enum:__anon07fadeb80103
SPIWDMADR	board/renesas/sh7752evb/spi-boot.c	/^#define SPIWDMADR	/;"	d	file:
SPIWDMADR	board/renesas/sh7753evb/spi-boot.c	/^#define SPIWDMADR	/;"	d	file:
SPIWDMADR	board/renesas/sh7757lcr/spi-boot.c	/^#define SPIWDMADR	/;"	d	file:
SPIWDMCNTR	board/renesas/sh7752evb/spi-boot.c	/^#define SPIWDMCNTR	/;"	d	file:
SPIWDMCNTR	board/renesas/sh7753evb/spi-boot.c	/^#define SPIWDMCNTR	/;"	d	file:
SPIWDMCNTR	board/renesas/sh7757lcr/spi-boot.c	/^#define SPIWDMCNTR	/;"	d	file:
SPI_3WIRE	include/spi.h	/^#define SPI_3WIRE	/;"	d
SPI_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SPI_BASE	/;"	d
SPI_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define SPI_BASE_ADDRESS	/;"	d
SPI_BASE_SIZE	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define SPI_BASE_SIZE	/;"	d
SPI_BAUD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_BAUD /;"	d
SPI_BAUD	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_BAUD /;"	d
SPI_BAUD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_BAUD /;"	d
SPI_BAUD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_BAUD /;"	d
SPI_BOOT	common/Kconfig	/^config SPI_BOOT$/;"	c	menu:Boot media
SPI_BOOT_SUPPORTED	include/configs/x600.h	/^#define SPI_BOOT_SUPPORTED	/;"	d
SPI_BSY	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_BSY	/;"	d
SPI_BSY	include/mpc8xx.h	/^#define SPI_BSY	/;"	d
SPI_BUS0_DEV1_BASE	board/theadorable/theadorable.h	/^#define SPI_BUS0_DEV1_BASE	/;"	d
SPI_BUS0_DEV1_SIZE	board/theadorable/theadorable.h	/^#define SPI_BUS0_DEV1_SIZE	/;"	d
SPI_BUS1_DEV2_BASE	board/theadorable/theadorable.h	/^#define SPI_BUS1_DEV2_BASE	/;"	d
SPI_C2TDELAY_SHIFT	drivers/spi/davinci_spi.c	/^#define SPI_C2TDELAY_SHIFT	/;"	d	file:
SPI_CFS_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_CFS_OFFSET	/;"	d	file:
SPI_CH_CPHA_B	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_CH_CPHA_B	/;"	d
SPI_CH_CPOL_L	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_CH_CPOL_L	/;"	d
SPI_CH_HS_EN	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_CH_HS_EN	/;"	d
SPI_CH_RST	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_CH_RST	/;"	d
SPI_CLK_BAUD	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CLK_BAUD /;"	d
SPI_CLK_BYPASS	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_CLK_BYPASS	/;"	d
SPI_CMD1_BIDIR	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_BIDIR	/;"	d	file:
SPI_CMD1_BIT_LEN_MASK	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_BIT_LEN_MASK	/;"	d	file:
SPI_CMD1_BIT_LEN_SHIFT	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_BIT_LEN_SHIFT	/;"	d	file:
SPI_CMD1_BOTH_EN_BIT	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_BOTH_EN_BIT	/;"	d	file:
SPI_CMD1_BOTH_EN_BYTE	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_BOTH_EN_BYTE	/;"	d	file:
SPI_CMD1_CS_POL_INACTIVE0	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_POL_INACTIVE0	/;"	d	file:
SPI_CMD1_CS_POL_INACTIVE1	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_POL_INACTIVE1	/;"	d	file:
SPI_CMD1_CS_POL_INACTIVE2	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_POL_INACTIVE2	/;"	d	file:
SPI_CMD1_CS_POL_INACTIVE3	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_POL_INACTIVE3	/;"	d	file:
SPI_CMD1_CS_SEL_MASK	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_SEL_MASK	/;"	d	file:
SPI_CMD1_CS_SEL_SHIFT	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_SEL_SHIFT	/;"	d	file:
SPI_CMD1_CS_SW_HW	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_SW_HW	/;"	d	file:
SPI_CMD1_CS_SW_VAL	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_CS_SW_VAL	/;"	d	file:
SPI_CMD1_GO	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_GO	/;"	d	file:
SPI_CMD1_IDLE_SDA_MASK	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_IDLE_SDA_MASK	/;"	d	file:
SPI_CMD1_IDLE_SDA_SHIFT	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_IDLE_SDA_SHIFT	/;"	d	file:
SPI_CMD1_LSBI_FE	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_LSBI_FE	/;"	d	file:
SPI_CMD1_LSBY_FE	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_LSBY_FE	/;"	d	file:
SPI_CMD1_MODE_MASK	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_MODE_MASK	/;"	d	file:
SPI_CMD1_MODE_SHIFT	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_MODE_SHIFT	/;"	d	file:
SPI_CMD1_M_S	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_M_S	/;"	d	file:
SPI_CMD1_PACKED	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_PACKED	/;"	d	file:
SPI_CMD1_RX_EN	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_RX_EN	/;"	d	file:
SPI_CMD1_TX_EN	drivers/spi/tegra114_spi.c	/^#define SPI_CMD1_TX_EN	/;"	d	file:
SPI_CMD2_RX_CLK_TAP_DELAY	drivers/spi/tegra114_spi.c	/^#define SPI_CMD2_RX_CLK_TAP_DELAY	/;"	d	file:
SPI_CMD2_RX_CLK_TAP_DELAY_MASK	drivers/spi/tegra114_spi.c	/^#define SPI_CMD2_RX_CLK_TAP_DELAY_MASK	/;"	d	file:
SPI_CMD2_TX_CLK_TAP_DELAY	drivers/spi/tegra114_spi.c	/^#define SPI_CMD2_TX_CLK_TAP_DELAY	/;"	d	file:
SPI_CMD2_TX_CLK_TAP_DELAY_MASK	drivers/spi/tegra114_spi.c	/^#define SPI_CMD2_TX_CLK_TAP_DELAY_MASK	/;"	d	file:
SPI_CMD_ACTIVE_SCLK_MASK	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_ACTIVE_SCLK_MASK	/;"	d	file:
SPI_CMD_ACTIVE_SCLK_SHIFT	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_ACTIVE_SCLK_SHIFT	/;"	d	file:
SPI_CMD_ACTIVE_SDA_MASK	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_ACTIVE_SDA_MASK	/;"	d	file:
SPI_CMD_ACTIVE_SDA_SHIFT	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_ACTIVE_SDA_SHIFT	/;"	d	file:
SPI_CMD_BIT_LENGTH	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_BIT_LENGTH	/;"	d	file:
SPI_CMD_BIT_LENGTH_MASK	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_BIT_LENGTH_MASK	/;"	d	file:
SPI_CMD_CK_SDA	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CK_SDA	/;"	d	file:
SPI_CMD_CS0_EN	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS0_EN	/;"	d	file:
SPI_CMD_CS1_EN	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS1_EN	/;"	d	file:
SPI_CMD_CS2_EN	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS2_EN	/;"	d	file:
SPI_CMD_CS3_EN	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS3_EN	/;"	d	file:
SPI_CMD_CS_DELAY	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS_DELAY	/;"	d	file:
SPI_CMD_CS_POL	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS_POL	/;"	d	file:
SPI_CMD_CS_SOFT	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS_SOFT	/;"	d	file:
SPI_CMD_CS_VAL	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_CS_VAL	/;"	d	file:
SPI_CMD_GO	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_GO	/;"	d	file:
SPI_CMD_RXEN	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_RXEN	/;"	d	file:
SPI_CMD_TXEN	drivers/spi/tegra20_sflash.c	/^#define SPI_CMD_TXEN	/;"	d	file:
SPI_CONN_DUAL_SEPARATED	include/spi.h	/^#define SPI_CONN_DUAL_SEPARATED	/;"	d
SPI_CONN_DUAL_SHARED	include/spi.h	/^#define SPI_CONN_DUAL_SHARED	/;"	d
SPI_CPHA	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_CPHA	/;"	d	file:
SPI_CPHA	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_CPHA	/;"	d	file:
SPI_CPHA	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_CPHA	/;"	d	file:
SPI_CPHA	include/spi.h	/^#define SPI_CPHA	/;"	d
SPI_CPOL	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_CPOL	/;"	d	file:
SPI_CPOL	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_CPOL	/;"	d	file:
SPI_CPOL	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_CPOL	/;"	d	file:
SPI_CPOL	include/spi.h	/^#define SPI_CPOL	/;"	d
SPI_CR_CPHA	include/mpc5xxx.h	/^#define SPI_CR_CPHA	/;"	d
SPI_CR_CPOL	include/mpc5xxx.h	/^#define SPI_CR_CPOL	/;"	d
SPI_CR_LSBFE	include/mpc5xxx.h	/^#define SPI_CR_LSBFE	/;"	d
SPI_CR_MSTR	include/mpc5xxx.h	/^#define SPI_CR_MSTR	/;"	d
SPI_CR_SPE	include/mpc5xxx.h	/^#define SPI_CR_SPE	/;"	d
SPI_CR_SPIE	include/mpc5xxx.h	/^#define SPI_CR_SPIE	/;"	d
SPI_CR_SSOE	include/mpc5xxx.h	/^#define SPI_CR_SSOE	/;"	d
SPI_CR_SWOM	include/mpc5xxx.h	/^#define SPI_CR_SWOM	/;"	d
SPI_CS_HIGH	include/spi.h	/^#define SPI_CS_HIGH	/;"	d
SPI_CS_MASK	board/freescale/mpc8308rdb/mpc8308rdb.c	/^#define SPI_CS_MASK	/;"	d	file:
SPI_CS_MASK	board/freescale/mpc8349emds/mpc8349emds.c	/^#define SPI_CS_MASK	/;"	d	file:
SPI_CS_PINS	drivers/spi/bfin_spi.c	/^#define SPI_CS_PINS(/;"	d	file:
SPI_CS_PINS	drivers/spi/bfin_spi6xx.c	/^#define SPI_CS_PINS(/;"	d	file:
SPI_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_CTL /;"	d
SPI_CTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_CTL /;"	d
SPI_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_CTL /;"	d
SPI_CTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_CTL /;"	d
SPI_CTL_ASSEL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_ASSEL /;"	d
SPI_CTL_CPHA	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_CPHA /;"	d
SPI_CTL_CPOL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_CPOL /;"	d
SPI_CTL_EMISO	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_EMISO /;"	d
SPI_CTL_EN	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_EN /;"	d
SPI_CTL_FCCH	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FCCH /;"	d
SPI_CTL_FCEN	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FCEN /;"	d
SPI_CTL_FCPL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FCPL /;"	d
SPI_CTL_FCWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FCWM /;"	d
SPI_CTL_FIFO0	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FIFO0 /;"	d
SPI_CTL_FIFO1	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FIFO1 /;"	d
SPI_CTL_FIFO2	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FIFO2 /;"	d
SPI_CTL_FMODE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_FMODE /;"	d
SPI_CTL_LSBF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_LSBF /;"	d
SPI_CTL_MIOM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_MIOM /;"	d
SPI_CTL_MIO_DIS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_MIO_DIS /;"	d
SPI_CTL_MIO_DUAL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_MIO_DUAL /;"	d
SPI_CTL_MIO_QUAD	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_MIO_QUAD /;"	d
SPI_CTL_MSTR	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_MSTR /;"	d
SPI_CTL_ODM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_ODM /;"	d
SPI_CTL_PSSE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_PSSE /;"	d
SPI_CTL_SELST	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_SELST /;"	d
SPI_CTL_SIZE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_SIZE /;"	d
SPI_CTL_SIZE08	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_SIZE08 /;"	d
SPI_CTL_SIZE16	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_SIZE16 /;"	d
SPI_CTL_SIZE32	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_SIZE32 /;"	d
SPI_CTL_SOSI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_CTL_SOSI /;"	d
SPI_DBLRATE	drivers/spi/cf_spi.c	/^#define SPI_DBLRATE	/;"	d	file:
SPI_DEFAULT_WORDLEN	include/spi.h	/^#define SPI_DEFAULT_WORDLEN	/;"	d
SPI_DELAY	include/configs/zipitz2.h	/^#define	SPI_DELAY	/;"	d
SPI_DESC_COMP0	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SPI_DESC_COMP0	/;"	d
SPI_DFS_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_DFS_OFFSET	/;"	d	file:
SPI_DLY_LAGX	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_DLY_LAGX /;"	d
SPI_DLY_LEADX	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_DLY_LEADX /;"	d
SPI_DLY_STOP	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_DLY_STOP /;"	d
SPI_DMA_BA	arch/x86/include/asm/arch-quark/quark.h	/^#define SPI_DMA_BA	/;"	d
SPI_DMA_BASE	arch/x86/cpu/quark/Kconfig	/^config SPI_DMA_BASE$/;"	c
SPI_DMA_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define SPI_DMA_BASE_ADDRESS	/;"	d
SPI_DMA_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define SPI_DMA_BASE_SIZE	/;"	d
SPI_EB	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_EB	/;"	d
SPI_EB	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPI_EB	/;"	d
SPI_EEPROM_DISABLE_WR	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_DISABLE_WR	/;"	d	file:
SPI_EEPROM_ENABLE_WR	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_ENABLE_WR	/;"	d	file:
SPI_EEPROM_RDSR	arch/powerpc/cpu/mpc5xx/spi.c	/^#define SPI_EEPROM_RDSR	/;"	d	file:
SPI_EEPROM_RDSR	arch/powerpc/cpu/mpc8260/spi.c	/^#define SPI_EEPROM_RDSR	/;"	d	file:
SPI_EEPROM_RDSR	arch/powerpc/cpu/mpc8xx/spi.c	/^#define SPI_EEPROM_RDSR	/;"	d	file:
SPI_EEPROM_READ	arch/powerpc/cpu/mpc5xx/spi.c	/^#define SPI_EEPROM_READ	/;"	d	file:
SPI_EEPROM_READ	arch/powerpc/cpu/mpc8260/spi.c	/^#define SPI_EEPROM_READ	/;"	d	file:
SPI_EEPROM_READ	arch/powerpc/cpu/mpc8xx/spi.c	/^#define SPI_EEPROM_READ	/;"	d	file:
SPI_EEPROM_READ_PAGE	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_READ_PAGE	/;"	d	file:
SPI_EEPROM_READ_STATUS	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_READ_STATUS	/;"	d	file:
SPI_EEPROM_STATUS_BUSY	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_STATUS_BUSY	/;"	d	file:
SPI_EEPROM_STATUS_WREN	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_STATUS_WREN	/;"	d	file:
SPI_EEPROM_WREN	arch/powerpc/cpu/mpc5xx/spi.c	/^#define SPI_EEPROM_WREN	/;"	d	file:
SPI_EEPROM_WREN	arch/powerpc/cpu/mpc8260/spi.c	/^#define SPI_EEPROM_WREN	/;"	d	file:
SPI_EEPROM_WREN	arch/powerpc/cpu/mpc8xx/spi.c	/^#define SPI_EEPROM_WREN	/;"	d	file:
SPI_EEPROM_WRITE	arch/powerpc/cpu/mpc5xx/spi.c	/^#define SPI_EEPROM_WRITE	/;"	d	file:
SPI_EEPROM_WRITE	arch/powerpc/cpu/mpc8260/spi.c	/^#define SPI_EEPROM_WRITE	/;"	d	file:
SPI_EEPROM_WRITE	arch/powerpc/cpu/mpc8xx/spi.c	/^#define SPI_EEPROM_WRITE	/;"	d	file:
SPI_EEPROM_WRITE_PAGE	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_WRITE_PAGE	/;"	d	file:
SPI_EEPROM_WRITE_STATUS	drivers/net/e1000_spi.c	/^#define SPI_EEPROM_WRITE_STATUS	/;"	d	file:
SPI_EMASK	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_EMASK	/;"	d
SPI_EMASK	include/mpc8xx.h	/^#define SPI_EMASK	/;"	d
SPI_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define SPI_ENABLE	/;"	d
SPI_EV_NE	drivers/spi/mpc8xxx_spi.c	/^#define SPI_EV_NE	/;"	d	file:
SPI_EV_NF	drivers/spi/mpc8xxx_spi.c	/^#define SPI_EV_NF	/;"	d	file:
SPI_FB_DELAY_180	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_FB_DELAY_180	/;"	d
SPI_FB_DELAY_270	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_FB_DELAY_270	/;"	d
SPI_FB_DELAY_90	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_FB_DELAY_90	/;"	d
SPI_FIFO_DEPTH	drivers/spi/rk_spi.c	/^#define SPI_FIFO_DEPTH	/;"	d	file:
SPI_FIFO_LVL_MASK	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_FIFO_LVL_MASK	/;"	d
SPI_FIFO_SIZE	drivers/spi/ep93xx_spi.c	/^#define SPI_FIFO_SIZE	/;"	d	file:
SPI_FIFO_STS_CS_INACTIVE	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_CS_INACTIVE	/;"	d	file:
SPI_FIFO_STS_ERR	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_ERR	/;"	d	file:
SPI_FIFO_STS_FRAME_END	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_FRAME_END	/;"	d	file:
SPI_FIFO_STS_RX_FIFO_EMPTY	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_RX_FIFO_EMPTY	/;"	d	file:
SPI_FIFO_STS_RX_FIFO_FLUSH	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_RX_FIFO_FLUSH	/;"	d	file:
SPI_FIFO_STS_RX_FIFO_FULL	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_RX_FIFO_FULL	/;"	d	file:
SPI_FIFO_STS_RX_FIFO_OVF	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_RX_FIFO_OVF	/;"	d	file:
SPI_FIFO_STS_RX_FIFO_UNR	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_RX_FIFO_UNR	/;"	d	file:
SPI_FIFO_STS_TX_FIFO_EMPTY	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_TX_FIFO_EMPTY	/;"	d	file:
SPI_FIFO_STS_TX_FIFO_FLUSH	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_TX_FIFO_FLUSH	/;"	d	file:
SPI_FIFO_STS_TX_FIFO_FULL	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_TX_FIFO_FULL	/;"	d	file:
SPI_FIFO_STS_TX_FIFO_OVF	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_TX_FIFO_OVF	/;"	d	file:
SPI_FIFO_STS_TX_FIFO_UNR	drivers/spi/tegra114_spi.c	/^#define SPI_FIFO_STS_TX_FIFO_UNR	/;"	d	file:
SPI_FLASH	drivers/mtd/spi/Kconfig	/^config SPI_FLASH$/;"	c	menu:SPI Flash Support
SPI_FLASH_16MB_BOUN	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_16MB_BOUN	/;"	d
SPI_FLASH_3B_ADDR_LEN	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_3B_ADDR_LEN	/;"	d
SPI_FLASH_ATMEL	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_ATMEL$/;"	c	menu:SPI Flash Support
SPI_FLASH_BAR	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_BAR$/;"	c	menu:SPI Flash Support
SPI_FLASH_CFI_MFR_ATMEL	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CFI_MFR_ATMEL	/;"	d
SPI_FLASH_CFI_MFR_MACRONIX	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CFI_MFR_MACRONIX	/;"	d
SPI_FLASH_CFI_MFR_SPANSION	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CFI_MFR_SPANSION	/;"	d
SPI_FLASH_CFI_MFR_SST	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CFI_MFR_SST	/;"	d
SPI_FLASH_CFI_MFR_STMICRO	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CFI_MFR_STMICRO	/;"	d
SPI_FLASH_CFI_MFR_WINBOND	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CFI_MFR_WINBOND	/;"	d
SPI_FLASH_CMD_LEN	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_CMD_LEN	/;"	d
SPI_FLASH_DATAFLASH	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_DATAFLASH$/;"	c	menu:SPI Flash Support
SPI_FLASH_EON	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_EON$/;"	c	menu:SPI Flash Support
SPI_FLASH_GIGADEVICE	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_GIGADEVICE$/;"	c	menu:SPI Flash Support
SPI_FLASH_MACRONIX	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_MACRONIX$/;"	c	menu:SPI Flash Support
SPI_FLASH_MTD	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_MTD$/;"	c	menu:SPI Flash Support
SPI_FLASH_PAGE_ERASE_TIMEOUT	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_PAGE_ERASE_TIMEOUT	/;"	d
SPI_FLASH_PROG_TIMEOUT	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_PROG_TIMEOUT	/;"	d
SPI_FLASH_SANDBOX	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SANDBOX$/;"	c	menu:SPI Flash Support
SPI_FLASH_SECTOR_ERASE_TIMEOUT	drivers/mtd/spi/sf_internal.h	/^#define SPI_FLASH_SECTOR_ERASE_TIMEOUT	/;"	d
SPI_FLASH_SPANSION	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SPANSION$/;"	c	menu:SPI Flash Support
SPI_FLASH_SST	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_SST$/;"	c	menu:SPI Flash Support
SPI_FLASH_STMICRO	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_STMICRO$/;"	c	menu:SPI Flash Support
SPI_FLASH_UBOOT_POS	include/configs/exynos5-common.h	/^#define SPI_FLASH_UBOOT_POS	/;"	d
SPI_FLASH_USE_4K_SECTORS	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_USE_4K_SECTORS$/;"	c	menu:SPI Flash Support
SPI_FLASH_WINBOND	drivers/mtd/spi/Kconfig	/^config SPI_FLASH_WINBOND$/;"	c	menu:SPI Flash Support
SPI_FLG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_FLG /;"	d
SPI_FLG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_FLG /;"	d
SPI_FLG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_FLG /;"	d
SPI_FLG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_FLG /;"	d
SPI_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define SPI_FREQ /;"	d
SPI_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define SPI_FREQ /;"	d
SPI_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define SPI_FREQ /;"	d
SPI_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define SPI_FREQ /;"	d
SPI_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define SPI_FREQ /;"	d
SPI_FREQUENCY_20MHZ	tools/ifdtool.h	/^	SPI_FREQUENCY_20MHZ = 0,$/;"	e	enum:spi_frequency
SPI_FREQUENCY_33MHZ	tools/ifdtool.h	/^	SPI_FREQUENCY_33MHZ = 1,$/;"	e	enum:spi_frequency
SPI_FREQUENCY_50MHZ	tools/ifdtool.h	/^	SPI_FREQUENCY_50MHZ = 4,$/;"	e	enum:spi_frequency
SPI_FREQ_SWSEQ	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SPI_FREQ_SWSEQ	/;"	d
SPI_FREQ_WR_ERA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SPI_FREQ_WR_ERA	/;"	d
SPI_FRF_MICROWIRE	drivers/spi/designware_spi.c	/^#define SPI_FRF_MICROWIRE	/;"	d	file:
SPI_FRF_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_FRF_OFFSET	/;"	d	file:
SPI_FRF_RESV	drivers/spi/designware_spi.c	/^#define SPI_FRF_RESV	/;"	d	file:
SPI_FRF_SPI	drivers/spi/designware_spi.c	/^#define SPI_FRF_SPI	/;"	d	file:
SPI_FRF_SSP	drivers/spi/designware_spi.c	/^#define SPI_FRF_SSP	/;"	d	file:
SPI_ILAT_CLR_MFI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_MFI /;"	d
SPI_ILAT_CLR_RFI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_RFI /;"	d
SPI_ILAT_CLR_ROI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_ROI /;"	d
SPI_ILAT_CLR_RSI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_RSI /;"	d
SPI_ILAT_CLR_RUWMI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_RUWMI /;"	d
SPI_ILAT_CLR_TCI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_TCI /;"	d
SPI_ILAT_CLR_TFI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_TFI /;"	d
SPI_ILAT_CLR_TSI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_TSI /;"	d
SPI_ILAT_CLR_TUI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_TUI /;"	d
SPI_ILAT_CLR_TUWMI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_CLR_TUWMI /;"	d
SPI_ILAT_MFI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_MFI /;"	d
SPI_ILAT_RFI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_RFI /;"	d
SPI_ILAT_ROI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_ROI /;"	d
SPI_ILAT_RSI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_RSI /;"	d
SPI_ILAT_RUWMI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_RUWMI /;"	d
SPI_ILAT_TCI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_TCI /;"	d
SPI_ILAT_TFI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_TFI /;"	d
SPI_ILAT_TSI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_TSI /;"	d
SPI_ILAT_TUI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_TUI /;"	d
SPI_ILAT_TUWMI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_ILAT_TUWMI /;"	d
SPI_IMSK_CLR_MFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_MFM /;"	d
SPI_IMSK_CLR_RFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_RFM /;"	d
SPI_IMSK_CLR_ROM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_ROM /;"	d
SPI_IMSK_CLR_RSM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_RSM /;"	d
SPI_IMSK_CLR_RUW	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_RUW /;"	d
SPI_IMSK_CLR_TCM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_TCM /;"	d
SPI_IMSK_CLR_TFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_TFM /;"	d
SPI_IMSK_CLR_TSM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_TSM /;"	d
SPI_IMSK_CLR_TUM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_TUM /;"	d
SPI_IMSK_CLR_TUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_CLR_TUWM /;"	d
SPI_IMSK_MFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_MFM /;"	d
SPI_IMSK_RFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_RFM /;"	d
SPI_IMSK_ROM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_ROM /;"	d
SPI_IMSK_RSM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_RSM /;"	d
SPI_IMSK_RUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_RUWM /;"	d
SPI_IMSK_SET_MFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_MFM /;"	d
SPI_IMSK_SET_RFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_RFM /;"	d
SPI_IMSK_SET_ROM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_ROM /;"	d
SPI_IMSK_SET_RSM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_RSM /;"	d
SPI_IMSK_SET_RUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_RUWM /;"	d
SPI_IMSK_SET_TCM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_TCM /;"	d
SPI_IMSK_SET_TFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_TFM /;"	d
SPI_IMSK_SET_TSM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_TSM /;"	d
SPI_IMSK_SET_TUM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_TUM /;"	d
SPI_IMSK_SET_TUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_SET_TUWM /;"	d
SPI_IMSK_TCM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_TCM /;"	d
SPI_IMSK_TFM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_TFM /;"	d
SPI_IMSK_TSM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_TSM /;"	d
SPI_IMSK_TUM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_TUM /;"	d
SPI_IMSK_TUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_IMSK_TUWM /;"	d
SPI_INDEX	arch/arm/mach-exynos/spl_boot.c	/^	SPI_INDEX,$/;"	e	enum:index	file:
SPI_L1M0	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_L1M0	/;"	d	file:
SPI_L1M0	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_L1M0	/;"	d	file:
SPI_L1M0	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_L1M0	/;"	d	file:
SPI_LOOP	include/spi.h	/^#define SPI_LOOP	/;"	d
SPI_LOOPBK	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_LOOPBK	/;"	d	file:
SPI_LOOPBK	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_LOOPBK	/;"	d	file:
SPI_LOOPBK	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_LOOPBK	/;"	d	file:
SPI_LSB_FIRST	include/spi.h	/^#define SPI_LSB_FIRST	/;"	d
SPI_MASTER_NO_RX	drivers/spi/soft_spi.c	/^#define SPI_MASTER_NO_RX /;"	d	file:
SPI_MASTER_NO_TX	drivers/spi/soft_spi.c	/^#define SPI_MASTER_NO_TX /;"	d	file:
SPI_MAX_NUM	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SPI_MAX_NUM	/;"	d
SPI_MMC_RESPONSE_CODE	drivers/mmc/mmc_spi.c	/^#define SPI_MMC_RESPONSE_CODE(/;"	d	file:
SPI_MME	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_MME	/;"	d
SPI_MME	include/mpc8xx.h	/^#define SPI_MME	/;"	d
SPI_MODE_0	include/spi.h	/^#define SPI_MODE_0	/;"	d
SPI_MODE_1	include/spi.h	/^#define SPI_MODE_1	/;"	d
SPI_MODE_2	include/spi.h	/^#define SPI_MODE_2	/;"	d
SPI_MODE_3	include/spi.h	/^#define SPI_MODE_3	/;"	d
SPI_MODE_BUS_WIDTH_WORD	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_MODE_BUS_WIDTH_WORD	/;"	d
SPI_MODE_CH_WIDTH_WORD	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_MODE_CH_WIDTH_WORD	/;"	d
SPI_MODE_EN	drivers/spi/mpc8xxx_spi.c	/^#define SPI_MODE_EN	/;"	d	file:
SPI_MODE_LOOP	drivers/spi/mpc8xxx_spi.c	/^#define SPI_MODE_LOOP	/;"	d	file:
SPI_MODE_MOD	drivers/spi/cf_spi.c	/^#define SPI_MODE_MOD	/;"	d	file:
SPI_MODE_MS	drivers/spi/mpc8xxx_spi.c	/^#define SPI_MODE_MS	/;"	d	file:
SPI_MODE_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_MODE_OFFSET	/;"	d	file:
SPI_MODE_REV	drivers/spi/mpc8xxx_spi.c	/^#define SPI_MODE_REV	/;"	d	file:
SPI_NOR_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	SPI_NOR_BOOT,$/;"	e	enum:boot_device
SPI_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SPI_OFFSET	/;"	d
SPI_OPCODE_FAST_READ	drivers/spi/ich.h	/^#define SPI_OPCODE_FAST_READ	/;"	d
SPI_OPCODE_TYPE_READ_NO_ADDRESS	drivers/spi/ich.h	/^	SPI_OPCODE_TYPE_READ_NO_ADDRESS =	0,$/;"	e	enum:__anon07fadeb80503
SPI_OPCODE_TYPE_READ_WITH_ADDRESS	drivers/spi/ich.h	/^	SPI_OPCODE_TYPE_READ_WITH_ADDRESS =	2,$/;"	e	enum:__anon07fadeb80503
SPI_OPCODE_TYPE_WRITE_NO_ADDRESS	drivers/spi/ich.h	/^	SPI_OPCODE_TYPE_WRITE_NO_ADDRESS =	1,$/;"	e	enum:__anon07fadeb80503
SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS	drivers/spi/ich.h	/^	SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS =	3$/;"	e	enum:__anon07fadeb80503
SPI_OPCODE_WREN	drivers/spi/ich.h	/^#define SPI_OPCODE_WREN	/;"	d
SPI_OPMENU_0	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_0 /;"	d
SPI_OPMENU_1	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_1 /;"	d
SPI_OPMENU_2	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_2 /;"	d
SPI_OPMENU_3	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_3 /;"	d
SPI_OPMENU_4	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_4 /;"	d
SPI_OPMENU_5	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_5 /;"	d
SPI_OPMENU_6	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_6 /;"	d
SPI_OPMENU_7	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_7 /;"	d
SPI_OPMENU_LOWER	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_LOWER /;"	d
SPI_OPMENU_UPPER	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPMENU_UPPER /;"	d
SPI_OPPREFIX	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPPREFIX /;"	d
SPI_OPTYPE	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE /;"	d
SPI_OPTYPE_0	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_0 /;"	d
SPI_OPTYPE_1	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_1 /;"	d
SPI_OPTYPE_2	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_2 /;"	d
SPI_OPTYPE_3	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_3 /;"	d
SPI_OPTYPE_4	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_4 /;"	d
SPI_OPTYPE_5	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_5 /;"	d
SPI_OPTYPE_6	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_6 /;"	d
SPI_OPTYPE_7	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_OPTYPE_7 /;"	d
SPI_PACKET_CNT_EN	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_PACKET_CNT_EN	/;"	d
SPI_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/aristainetos/aristainetos.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/bachmann/ot1200/ot1200.c	/^#define SPI_PAD_CTRL	/;"	d	file:
SPI_PAD_CTRL	board/boundary/nitrogen6x/nitrogen6x.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/el/el6x/el6x.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/embest/mx6boards/mx6boards.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/freescale/mx6sabresd/mx6sabresd.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/freescale/mx6slevk/mx6slevk.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/gateworks/gw_ventana/common.h	/^#define SPI_PAD_CTRL /;"	d
SPI_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define SPI_PAD_CTRL	/;"	d	file:
SPI_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/tqc/tqma6/tqma6.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define SPI_PAD_CTRL /;"	d	file:
SPI_PDR_SS	include/mpc5xxx.h	/^#define SPI_PDR_SS	/;"	d
SPI_PFONRD	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_PFONRD	/;"	d	file:
SPI_PFONRD	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_PFONRD	/;"	d	file:
SPI_PFONRD	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_PFONRD	/;"	d	file:
SPI_PINS	drivers/spi/bfin_spi.c	/^#define SPI_PINS(/;"	d	file:
SPI_PINS	drivers/spi/bfin_spi6xx.c	/^#define SPI_PINS(/;"	d	file:
SPI_PLLDIV	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define SPI_PLLDIV	/;"	d
SPI_PREAMBLE	include/spi.h	/^#define SPI_PREAMBLE	/;"	d
SPI_PREAMBLE_END_BYTE	include/spi.h	/^#define SPI_PREAMBLE_END_BYTE	/;"	d
SPI_PUP_EN	arch/arm/mach-mvebu/include/mach/soc.h	/^#define SPI_PUP_EN	/;"	d
SPI_RBE	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_RBE	/;"	d	file:
SPI_RBE	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_RBE	/;"	d	file:
SPI_RBE	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_RBE	/;"	d	file:
SPI_RBEI	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_RBEI	/;"	d	file:
SPI_RBEI	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_RBEI	/;"	d	file:
SPI_RBEI	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_RBEI	/;"	d	file:
SPI_RBF	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_RBF	/;"	d	file:
SPI_RBF	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_RBF	/;"	d	file:
SPI_RBF	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_RBF	/;"	d	file:
SPI_RBFI	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_RBFI	/;"	d	file:
SPI_RBFI	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_RBFI	/;"	d	file:
SPI_RBFI	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_RBFI	/;"	d	file:
SPI_RDBR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_RDBR /;"	d
SPI_RDBR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_RDBR /;"	d
SPI_RDBR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_RDBR /;"	d
SPI_RDBR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_RDBR /;"	d
SPI_READ	include/configs/zipitz2.h	/^#define	SPI_READ	/;"	d
SPI_READ_MAX_SIZE	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SPI_READ_MAX_SIZE /;"	d	file:
SPI_REG	arch/x86/include/asm/arch-broadwell/spi.h	/^#define SPI_REG(/;"	d
SPI_REG	board/keymile/km_arm/fpga_config.c	/^#define SPI_REG	/;"	d	file:
SPI_RESPONSE_ACCEPTED	drivers/mmc/mmc_spi.c	/^#define SPI_RESPONSE_ACCEPTED	/;"	d	file:
SPI_RESPONSE_CRC_ERR	drivers/mmc/mmc_spi.c	/^#define SPI_RESPONSE_CRC_ERR	/;"	d	file:
SPI_RESPONSE_WRITE_ERR	drivers/mmc/mmc_spi.c	/^#define SPI_RESPONSE_WRITE_ERR	/;"	d	file:
SPI_RSTF	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_RSTF	/;"	d	file:
SPI_RSTF	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_RSTF	/;"	d	file:
SPI_RSTF	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_RSTF	/;"	d	file:
SPI_RWCR_VALUE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RWCR_VALUE /;"	d
SPI_RWC_VALUE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RWC_VALUE /;"	d
SPI_RXB	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_RXB	/;"	d
SPI_RXB	include/mpc8xx.h	/^#define SPI_RXB	/;"	d
SPI_RXCTL_RDO	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDO /;"	d
SPI_RXCTL_RDR	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR /;"	d
SPI_RXCTL_RDR_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR_25 /;"	d
SPI_RXCTL_RDR_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR_50 /;"	d
SPI_RXCTL_RDR_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR_75 /;"	d
SPI_RXCTL_RDR_DIS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR_DIS /;"	d
SPI_RXCTL_RDR_FULL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR_FULL /;"	d
SPI_RXCTL_RDR_NE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RDR_NE /;"	d
SPI_RXCTL_REN	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_REN /;"	d
SPI_RXCTL_RRWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RRWM /;"	d
SPI_RXCTL_RTI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RTI /;"	d
SPI_RXCTL_RUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RUWM /;"	d
SPI_RXCTL_RWCEN	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RWCEN /;"	d
SPI_RXCTL_RWM_0	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RWM_0 /;"	d
SPI_RXCTL_RWM_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RWM_25 /;"	d
SPI_RXCTL_RWM_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RWM_50 /;"	d
SPI_RXCTL_RWM_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_RWM_75 /;"	d
SPI_RXCTL_UWM_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_UWM_25 /;"	d
SPI_RXCTL_UWM_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_UWM_50 /;"	d
SPI_RXCTL_UWM_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_UWM_75 /;"	d
SPI_RXCTL_UWM_DIS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_UWM_DIS /;"	d
SPI_RXCTL_UWM_FULL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_RXCTL_UWM_FULL /;"	d
SPI_RX_BYTE_SWAP	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_RX_BYTE_SWAP	/;"	d
SPI_RX_CH_ON	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_RX_CH_ON	/;"	d
SPI_RX_DUAL	include/spi.h	/^#define SPI_RX_DUAL	/;"	d
SPI_RX_HWORD_SWAP	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_RX_HWORD_SWAP	/;"	d
SPI_RX_LVL_OFFSET	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_RX_LVL_OFFSET	/;"	d
SPI_RX_QUAD	include/spi.h	/^#define SPI_RX_QUAD	/;"	d
SPI_RX_SLOW	include/spi.h	/^#define SPI_RX_SLOW	/;"	d
SPI_RX_SWAP_EN	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_RX_SWAP_EN	/;"	d
SPI_SCL	include/configs/zipitz2.h	/^#define	SPI_SCL(/;"	d
SPI_SCOL_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_SCOL_OFFSET	/;"	d	file:
SPI_SCPH_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_SCPH_OFFSET	/;"	d	file:
SPI_SDA	include/configs/zipitz2.h	/^#define	SPI_SDA(/;"	d
SPI_SHADOW	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_SHADOW /;"	d
SPI_SHADOW	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_SHADOW /;"	d
SPI_SHADOW	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_SHADOW /;"	d
SPI_SHADOW	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_SHADOW /;"	d
SPI_SLAVE	include/spi.h	/^#define SPI_SLAVE	/;"	d
SPI_SLAVE_MODE	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_SLAVE_MODE	/;"	d
SPI_SLAVE_SIG_INACT	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_SLAVE_SIG_INACT	/;"	d
SPI_SLVOE_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_SLVOE_OFFSET	/;"	d	file:
SPI_SLVSEL_SSE1	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE1 /;"	d
SPI_SLVSEL_SSE2	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE2 /;"	d
SPI_SLVSEL_SSE3	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE3 /;"	d
SPI_SLVSEL_SSE4	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE4 /;"	d
SPI_SLVSEL_SSE5	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE5 /;"	d
SPI_SLVSEL_SSE6	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE6 /;"	d
SPI_SLVSEL_SSE7	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSE7 /;"	d
SPI_SLVSEL_SSEL1	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL1 /;"	d
SPI_SLVSEL_SSEL2	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL2 /;"	d
SPI_SLVSEL_SSEL3	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL3 /;"	d
SPI_SLVSEL_SSEL4	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL4 /;"	d
SPI_SLVSEL_SSEL5	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL5 /;"	d
SPI_SLVSEL_SSEL6	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL6 /;"	d
SPI_SLVSEL_SSEL7	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_SLVSEL_SSEL7 /;"	d
SPI_SRL_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_SRL_OFFSET	/;"	d	file:
SPI_SR_MODF	include/mpc5xxx.h	/^#define SPI_SR_MODF	/;"	d
SPI_SR_SPIF	include/mpc5xxx.h	/^#define SPI_SR_SPIF	/;"	d
SPI_SR_WCOL	include/mpc5xxx.h	/^#define SPI_SR_WCOL	/;"	d
SPI_SSA	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_SSA	/;"	d	file:
SPI_SSA	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_SSA	/;"	d	file:
SPI_SSA	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_SSA	/;"	d	file:
SPI_SSD	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_SSD	/;"	d	file:
SPI_SSD	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_SSD	/;"	d	file:
SPI_SSD	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_SSD	/;"	d	file:
SPI_SSDB	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_SSDB	/;"	d	file:
SPI_SSDB	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_SSDB	/;"	d	file:
SPI_SSDB	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_SSDB	/;"	d	file:
SPI_SSS	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_SSS	/;"	d	file:
SPI_SSS	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_SSS	/;"	d	file:
SPI_SSS	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_SSS	/;"	d	file:
SPI_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_STAT /;"	d
SPI_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_STAT /;"	d
SPI_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_STAT /;"	d
SPI_STAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_STAT /;"	d
SPI_STAT_BSY	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_BSY	/;"	d	file:
SPI_STAT_CUR_BLKCNT	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_CUR_BLKCNT	/;"	d	file:
SPI_STAT_FCS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_FCS /;"	d
SPI_STAT_MODF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_MODF /;"	d
SPI_STAT_RDY	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_RDY	/;"	d	file:
SPI_STAT_RF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RF /;"	d
SPI_STAT_RFE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFE /;"	d
SPI_STAT_RFIFO_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFIFO_25 /;"	d
SPI_STAT_RFIFO_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFIFO_50 /;"	d
SPI_STAT_RFIFO_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFIFO_75 /;"	d
SPI_STAT_RFIFO_EMPTY	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFIFO_EMPTY /;"	d
SPI_STAT_RFIFO_FULL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFIFO_FULL /;"	d
SPI_STAT_RFS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RFS /;"	d
SPI_STAT_ROE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_ROE /;"	d
SPI_STAT_RS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RS /;"	d
SPI_STAT_RUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_RUWM /;"	d
SPI_STAT_RXF_EMPTY	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_RXF_EMPTY	/;"	d	file:
SPI_STAT_RXF_FLUSH	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_RXF_FLUSH	/;"	d	file:
SPI_STAT_RXF_FULL	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_RXF_FULL	/;"	d	file:
SPI_STAT_RXF_UNR	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_RXF_UNR	/;"	d	file:
SPI_STAT_SEL_TXRX_N	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_SEL_TXRX_N	/;"	d	file:
SPI_STAT_SPIF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_SPIF /;"	d
SPI_STAT_TCE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TCE /;"	d
SPI_STAT_TF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TF /;"	d
SPI_STAT_TFF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFF /;"	d
SPI_STAT_TFIFO_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFIFO_25 /;"	d
SPI_STAT_TFIFO_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFIFO_50 /;"	d
SPI_STAT_TFIFO_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFIFO_75 /;"	d
SPI_STAT_TFIFO_EMPTY	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFIFO_EMPTY /;"	d
SPI_STAT_TFIFO_FULL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFIFO_FULL /;"	d
SPI_STAT_TFS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TFS /;"	d
SPI_STAT_TS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TS /;"	d
SPI_STAT_TUE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TUE /;"	d
SPI_STAT_TUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_STAT_TUWM /;"	d
SPI_STAT_TXF_EMPTY	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_TXF_EMPTY	/;"	d	file:
SPI_STAT_TXF_FLUSH	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_TXF_FLUSH	/;"	d	file:
SPI_STAT_TXF_FULL	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_TXF_FULL	/;"	d	file:
SPI_STAT_TXF_OVF	drivers/spi/tegra20_sflash.c	/^#define SPI_STAT_TXF_OVF	/;"	d	file:
SPI_STR	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_STR	/;"	d
SPI_STR	include/mpc8xx.h	/^#define SPI_STR	/;"	d
SPI_ST_TX_DONE	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_ST_TX_DONE	/;"	d
SPI_SpiS0	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_SpiS0	/;"	d	file:
SPI_SpiS0	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_SpiS0	/;"	d	file:
SPI_T2CDELAY_SHIFT	drivers/spi/davinci_spi.c	/^#define SPI_T2CDELAY_SHIFT	/;"	d	file:
SPI_TBE	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_TBE	/;"	d	file:
SPI_TBE	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_TBE	/;"	d	file:
SPI_TBE	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_TBE	/;"	d	file:
SPI_TBEI	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_TBEI	/;"	d	file:
SPI_TBEI	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_TBEI	/;"	d	file:
SPI_TBEI	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_TBEI	/;"	d	file:
SPI_TBF	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_TBF	/;"	d	file:
SPI_TBF	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_TBF	/;"	d	file:
SPI_TBF	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_TBF	/;"	d	file:
SPI_TBFI	board/renesas/sh7752evb/spi-boot.c	/^#define SPI_TBFI	/;"	d	file:
SPI_TBFI	board/renesas/sh7753evb/spi-boot.c	/^#define SPI_TBFI	/;"	d	file:
SPI_TBFI	board/renesas/sh7757lcr/spi-boot.c	/^#define SPI_TBFI	/;"	d	file:
SPI_TDBR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPI_TDBR /;"	d
SPI_TDBR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPI_TDBR /;"	d
SPI_TDBR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPI_TDBR /;"	d
SPI_TDBR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPI_TDBR /;"	d
SPI_TIMEOUT	drivers/spi/ep93xx_spi.c	/^#define SPI_TIMEOUT	/;"	d	file:
SPI_TIMEOUT	drivers/spi/mpc8xxx_spi.c	/^#define SPI_TIMEOUT	/;"	d	file:
SPI_TIMEOUT	drivers/spi/tegra114_spi.c	/^#define SPI_TIMEOUT	/;"	d	file:
SPI_TIMEOUT	drivers/spi/tegra20_sflash.c	/^#define SPI_TIMEOUT	/;"	d	file:
SPI_TIMEOUT	drivers/spi/tegra20_slink.c	/^#define SPI_TIMEOUT	/;"	d	file:
SPI_TIMEOUT_MS	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_TIMEOUT_MS	/;"	d
SPI_TMOD_EPROMREAD	drivers/spi/designware_spi.c	/^#define SPI_TMOD_EPROMREAD	/;"	d	file:
SPI_TMOD_MASK	drivers/spi/designware_spi.c	/^#define SPI_TMOD_MASK	/;"	d	file:
SPI_TMOD_OFFSET	drivers/spi/designware_spi.c	/^#define SPI_TMOD_OFFSET	/;"	d	file:
SPI_TMOD_RO	drivers/spi/designware_spi.c	/^#define SPI_TMOD_RO	/;"	d	file:
SPI_TMOD_TO	drivers/spi/designware_spi.c	/^#define SPI_TMOD_TO	/;"	d	file:
SPI_TMOD_TR	drivers/spi/designware_spi.c	/^#define	SPI_TMOD_TR	/;"	d	file:
SPI_TOKEN_MULTI_WRITE	drivers/mmc/mmc_spi.c	/^#define SPI_TOKEN_MULTI_WRITE	/;"	d	file:
SPI_TOKEN_SINGLE	drivers/mmc/mmc_spi.c	/^#define SPI_TOKEN_SINGLE	/;"	d	file:
SPI_TOKEN_STOP_TRAN	drivers/mmc/mmc_spi.c	/^#define SPI_TOKEN_STOP_TRAN	/;"	d	file:
SPI_TWCR_VALUE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TWCR_VALUE /;"	d
SPI_TWC_VALUE	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TWC_VALUE /;"	d
SPI_TXB	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_TXB	/;"	d
SPI_TXB	include/mpc8xx.h	/^#define SPI_TXB	/;"	d
SPI_TXCTL_RWM_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_RWM_25 /;"	d
SPI_TXCTL_RWM_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_RWM_50 /;"	d
SPI_TXCTL_RWM_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_RWM_75 /;"	d
SPI_TXCTL_RWM_FULL	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_RWM_FULL /;"	d
SPI_TXCTL_TDR	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR /;"	d
SPI_TXCTL_TDR_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR_25 /;"	d
SPI_TXCTL_TDR_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR_50 /;"	d
SPI_TXCTL_TDR_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR_75 /;"	d
SPI_TXCTL_TDR_DIS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR_DIS /;"	d
SPI_TXCTL_TDR_EMPTY	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR_EMPTY /;"	d
SPI_TXCTL_TDR_NF	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDR_NF /;"	d
SPI_TXCTL_TDU	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TDU /;"	d
SPI_TXCTL_TEN	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TEN /;"	d
SPI_TXCTL_TRWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TRWM /;"	d
SPI_TXCTL_TTI	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TTI /;"	d
SPI_TXCTL_TUWM	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TUWM /;"	d
SPI_TXCTL_TWCEN	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_TWCEN /;"	d
SPI_TXCTL_UWM_25	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_UWM_25 /;"	d
SPI_TXCTL_UWM_50	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_UWM_50 /;"	d
SPI_TXCTL_UWM_75	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_UWM_75 /;"	d
SPI_TXCTL_UWM_DIS	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_UWM_DIS /;"	d
SPI_TXCTL_UWM_EMPTY	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define SPI_TXCTL_UWM_EMPTY /;"	d
SPI_TXE	arch/powerpc/include/asm/cpm_8260.h	/^#define SPI_TXE	/;"	d
SPI_TXE	include/mpc8xx.h	/^#define SPI_TXE	/;"	d
SPI_TX_BYTE	include/spi.h	/^#define SPI_TX_BYTE	/;"	d
SPI_TX_BYTE_SWAP	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_TX_BYTE_SWAP	/;"	d
SPI_TX_CH_ON	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_TX_CH_ON	/;"	d
SPI_TX_DUAL	include/spi.h	/^#define SPI_TX_DUAL	/;"	d
SPI_TX_HWORD_SWAP	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_TX_HWORD_SWAP	/;"	d
SPI_TX_LVL_OFFSET	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_TX_LVL_OFFSET	/;"	d
SPI_TX_QUAD	include/spi.h	/^#define SPI_TX_QUAD	/;"	d
SPI_TX_SWAP_EN	arch/arm/mach-exynos/include/mach/spi.h	/^#define SPI_TX_SWAP_EN	/;"	d
SPI_WAIT_TIMEOUT	drivers/spi/omap3_spi.c	/^#define SPI_WAIT_TIMEOUT	/;"	d	file:
SPI_XFER_BEGIN	include/spi.h	/^#define SPI_XFER_BEGIN	/;"	d
SPI_XFER_END	include/spi.h	/^#define SPI_XFER_END	/;"	d
SPI_XFER_MMAP	include/spi.h	/^#define SPI_XFER_MMAP	/;"	d
SPI_XFER_MMAP_END	include/spi.h	/^#define SPI_XFER_MMAP_END	/;"	d
SPI_XFER_ONCE	include/spi.h	/^#define SPI_XFER_ONCE	/;"	d
SPI_XFER_STS_RDY	drivers/spi/tegra114_spi.c	/^#define SPI_XFER_STS_RDY	/;"	d	file:
SPI_XFER_U_PAGE	include/spi.h	/^#define SPI_XFER_U_PAGE	/;"	d
SPL	Makefile	/^SPL: spl\/u-boot-spl.bin FORCE$/;"	t
SPL	arch/arm/imx-common/Makefile	/^SPL: spl\/u-boot-spl.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE$/;"	t
SPL	common/spl/Kconfig	/^config SPL$/;"	c	menu:SPL / TPL
SPL / TPL	common/spl/Kconfig	/^menu "SPL \/ TPL"$/;"	m
SPLASHIMAGE_CALLBACK	include/env_callback.h	/^#define SPLASHIMAGE_CALLBACK /;"	d
SPLASHIMAGE_CALLBACK	include/env_callback.h	/^#define SPLASHIMAGE_CALLBACK$/;"	d
SPLASH_SOURCE_DEFAULT_FILE_NAME	common/splash_source.c	/^#define SPLASH_SOURCE_DEFAULT_FILE_NAME	/;"	d	file:
SPLASH_STORAGE_FS	include/splash.h	/^	SPLASH_STORAGE_FS,$/;"	e	enum:splash_flags
SPLASH_STORAGE_MMC	include/splash.h	/^	SPLASH_STORAGE_MMC,$/;"	e	enum:splash_storage
SPLASH_STORAGE_NAND	include/splash.h	/^	SPLASH_STORAGE_NAND,$/;"	e	enum:splash_storage
SPLASH_STORAGE_RAW	include/splash.h	/^	SPLASH_STORAGE_RAW,$/;"	e	enum:splash_flags
SPLASH_STORAGE_SATA	include/splash.h	/^	SPLASH_STORAGE_SATA,$/;"	e	enum:splash_storage
SPLASH_STORAGE_SF	include/splash.h	/^	SPLASH_STORAGE_SF,$/;"	e	enum:splash_storage
SPLASH_STORAGE_USB	include/splash.h	/^	SPLASH_STORAGE_USB,$/;"	e	enum:splash_storage
SPLIT	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define SPLIT	/;"	d	file:
SPLIT_DACK_ONLY	drivers/usb/host/r8a66597.h	/^#define	  SPLIT_DACK_ONLY	/;"	d
SPLIT_VIEW	scripts/kconfig/gconf.c	/^	SINGLE_VIEW, SPLIT_VIEW, FULL_VIEW$/;"	e	enum:__anon51b0ba2a0103	file:
SPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define SPLL	/;"	d
SPLLCON	drivers/clk/clk_pic32.c	/^#define SPLLCON	/;"	d	file:
SPLL_CNTL	include/radeon.h	/^#define SPLL_CNTL	/;"	d
SPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SPLL_CON1_VAL	/;"	d
SPLRI	arch/sh/include/asm/cpu_sh7722.h	/^#define SPLRI /;"	d
SPLT_EVEN_ODD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define SPLT_EVEN_ODD /;"	d
SPL_ADDR	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SPL_ADDR	/;"	d
SPL_ADDR	arch/arm/include/asm/arch/spl.h	/^#define SPL_ADDR	/;"	d
SPL_BOOT_SDIO_MMC_CARD	include/configs/clearfog.h	/^#define SPL_BOOT_SDIO_MMC_CARD	/;"	d
SPL_BOOT_SDIO_MMC_CARD	include/configs/db-88f6820-gp.h	/^#define SPL_BOOT_SDIO_MMC_CARD	/;"	d
SPL_BOOT_SPI_NOR_FLASH	include/configs/clearfog.h	/^#define SPL_BOOT_SPI_NOR_FLASH	/;"	d
SPL_BOOT_SPI_NOR_FLASH	include/configs/db-88f6820-amc.h	/^#define SPL_BOOT_SPI_NOR_FLASH	/;"	d
SPL_BOOT_SPI_NOR_FLASH	include/configs/db-88f6820-gp.h	/^#define SPL_BOOT_SPI_NOR_FLASH	/;"	d
SPL_BUILD	include/fdtdec.h	/^#define SPL_BUILD	/;"	d
SPL_CLK	drivers/clk/Kconfig	/^config SPL_CLK$/;"	c	menu:Clock
SPL_COPY_PAYLOAD_ONLY	include/spl.h	/^#define SPL_COPY_PAYLOAD_ONLY	/;"	d
SPL_CRC32_SUPPORT	common/spl/Kconfig	/^config SPL_CRC32_SUPPORT$/;"	c	menu:SPL / TPL
SPL_CRYPTO_SUPPORT	common/spl/Kconfig	/^config SPL_CRYPTO_SUPPORT$/;"	c	menu:SPL / TPL
SPL_DFU_RAM	Kconfig	/^config SPL_DFU_RAM$/;"	c	choice:Boot images""choice8014d1a60104
SPL_DFU_SUPPORT	Kconfig	/^config SPL_DFU_SUPPORT$/;"	c	menu:Boot images
SPL_DISPLAY_PRINT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c
SPL_DISPLAY_PRINT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c
SPL_DISPLAY_PRINT	common/spl/Kconfig	/^config SPL_DISPLAY_PRINT$/;"	c	menu:SPL / TPL
SPL_DM	drivers/core/Kconfig	/^config SPL_DM$/;"	c	menu:Generic Driver Options
SPL_DMA_SUPPORT	common/spl/Kconfig	/^config SPL_DMA_SUPPORT$/;"	c	menu:SPL / TPL
SPL_DM_REGULATOR	drivers/power/regulator/Kconfig	/^config SPL_DM_REGULATOR$/;"	c
SPL_DM_SEQ_ALIAS	drivers/core/Kconfig	/^config SPL_DM_SEQ_ALIAS$/;"	c	menu:Generic Driver Options
SPL_DRIVERS_MISC_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_DRIVERS_MISC_SUPPORT$/;"	c
SPL_DRIVERS_MISC_SUPPORT	common/spl/Kconfig	/^config SPL_DRIVERS_MISC_SUPPORT$/;"	c	menu:SPL / TPL
SPL_ENV_SUPPORT	board/ti/am335x/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c
SPL_ENV_SUPPORT	board/ti/common/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c
SPL_ENV_SUPPORT	common/spl/Kconfig	/^config SPL_ENV_SUPPORT$/;"	c	menu:SPL / TPL
SPL_ETH_SUPPORT	common/spl/Kconfig	/^config SPL_ETH_SUPPORT$/;"	c	menu:SPL / TPL
SPL_EXPORT	include/cmd_spl.h	/^#define SPL_EXPORT	/;"	d
SPL_EXPORT_ATAGS	include/cmd_spl.h	/^#define SPL_EXPORT_ATAGS	/;"	d
SPL_EXPORT_FDT	include/cmd_spl.h	/^#define SPL_EXPORT_FDT	/;"	d
SPL_EXPORT_LAST	include/cmd_spl.h	/^#define SPL_EXPORT_LAST	/;"	d
SPL_EXT_SUPPORT	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
SPL_EXT_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
SPL_EXT_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
SPL_EXT_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
SPL_EXT_SUPPORT	board/ti/common/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c
SPL_EXT_SUPPORT	common/spl/Kconfig	/^config SPL_EXT_SUPPORT$/;"	c	menu:SPL / TPL
SPL_FAT_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
SPL_FAT_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
SPL_FAT_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
SPL_FAT_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
SPL_FAT_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
SPL_FAT_SUPPORT	board/ti/common/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c
SPL_FAT_SUPPORT	common/spl/Kconfig	/^config SPL_FAT_SUPPORT$/;"	c	menu:SPL / TPL
SPL_FIT	Kconfig	/^config SPL_FIT$/;"	c	menu:Boot images
SPL_FIT_IMAGE_POST_PROCESS	Kconfig	/^config SPL_FIT_IMAGE_POST_PROCESS$/;"	c	menu:Boot images
SPL_FIT_SIGNATURE	Kconfig	/^config SPL_FIT_SIGNATURE$/;"	c	menu:Boot images
SPL_FPGA_SUPPORT	common/spl/Kconfig	/^config SPL_FPGA_SUPPORT$/;"	c	menu:SPL / TPL
SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	arch/arm/mach-exynos/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	board/sunxi/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	board/ti/common/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c
SPL_GPIO_SUPPORT	common/spl/Kconfig	/^config SPL_GPIO_SUPPORT$/;"	c	menu:SPL / TPL
SPL_HASH_SUPPORT	common/spl/Kconfig	/^config SPL_HASH_SUPPORT$/;"	c	menu:SPL / TPL
SPL_HEADER	board/samsung/origen/tools/mkorigenspl.c	/^#define SPL_HEADER	/;"	d	file:
SPL_HEADER_SIZE	board/samsung/origen/tools/mkorigenspl.c	/^#define SPL_HEADER_SIZE	/;"	d	file:
SPL_HEADER_VERSION	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SPL_HEADER_VERSION	/;"	d
SPL_HEADER_VERSION	arch/arm/include/asm/arch/spl.h	/^#define SPL_HEADER_VERSION	/;"	d
SPL_I2C_MUX	drivers/i2c/muxes/Kconfig	/^config SPL_I2C_MUX$/;"	c
SPL_I2C_SUPPORT	arch/arm/cpu/armv7/am33xx/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
SPL_I2C_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
SPL_I2C_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
SPL_I2C_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
SPL_I2C_SUPPORT	board/ti/common/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c
SPL_I2C_SUPPORT	common/spl/Kconfig	/^config SPL_I2C_SUPPORT$/;"	c	menu:SPL / TPL
SPL_LED	drivers/led/Kconfig	/^config SPL_LED$/;"	c	menu:LED Support
SPL_LED_GPIO	drivers/led/Kconfig	/^config SPL_LED_GPIO$/;"	c	menu:LED Support
SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/mach-exynos/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	board/sunxi/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	board/ti/common/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c
SPL_LIBCOMMON_SUPPORT	common/spl/Kconfig	/^config SPL_LIBCOMMON_SUPPORT$/;"	c	menu:SPL / TPL
SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	board/sunxi/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	board/ti/common/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c
SPL_LIBDISK_SUPPORT	common/spl/Kconfig	/^config SPL_LIBDISK_SUPPORT$/;"	c	menu:SPL / TPL
SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/mach-exynos/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	board/sunxi/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	board/ti/common/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c
SPL_LIBGENERIC_SUPPORT	common/spl/Kconfig	/^config SPL_LIBGENERIC_SUPPORT$/;"	c	menu:SPL / TPL
SPL_LOAD_FIT	Kconfig	/^config SPL_LOAD_FIT$/;"	c	menu:Boot images
SPL_LOAD_IMAGE	include/spl.h	/^#define SPL_LOAD_IMAGE(/;"	d
SPL_LOAD_IMAGE_METHOD	include/spl.h	/^#define SPL_LOAD_IMAGE_METHOD(/;"	d
SPL_MALLOC_F_SIZE	include/configs/ti_armv7_keystone2.h	/^#define SPL_MALLOC_F_SIZE	/;"	d
SPL_MD5_SUPPORT	common/spl/Kconfig	/^config SPL_MD5_SUPPORT$/;"	c	menu:SPL / TPL
SPL_MMC_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	arch/arm/mach-rockchip/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	board/sunxi/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	board/ti/common/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c
SPL_MMC_SUPPORT	common/spl/Kconfig	/^config SPL_MMC_SUPPORT$/;"	c	menu:SPL / TPL
SPL_MPC8XXX_INIT_DDR_SUPPORT	common/spl/Kconfig	/^config SPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	c	menu:SPL / TPL
SPL_MTD_SUPPORT	common/spl/Kconfig	/^config SPL_MTD_SUPPORT$/;"	c	menu:SPL / TPL
SPL_MUSB_NEW_SUPPORT	common/spl/Kconfig	/^config SPL_MUSB_NEW_SUPPORT$/;"	c	menu:SPL / TPL
SPL_NAND_DENALI	drivers/mtd/nand/Kconfig	/^config SPL_NAND_DENALI$/;"	c	menu:NAND Device Support
SPL_NAND_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
SPL_NAND_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
SPL_NAND_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
SPL_NAND_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
SPL_NAND_SUPPORT	board/ti/common/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c
SPL_NAND_SUPPORT	common/spl/Kconfig	/^config SPL_NAND_SUPPORT$/;"	c	menu:SPL / TPL
SPL_NET_SUPPORT	common/spl/Kconfig	/^config SPL_NET_SUPPORT$/;"	c	menu:SPL / TPL
SPL_NET_VCI_STRING	common/spl/Kconfig	/^config SPL_NET_VCI_STRING$/;"	c	menu:SPL / TPL
SPL_NOR_SUPPORT	common/spl/Kconfig	/^config SPL_NOR_SUPPORT$/;"	c	menu:SPL / TPL
SPL_NO_CPU_SUPPORT	common/spl/Kconfig	/^config SPL_NO_CPU_SUPPORT$/;"	c	menu:SPL / TPL
SPL_OF_CONTROL	dts/Kconfig	/^config SPL_OF_CONTROL$/;"	c	menu:Device Tree Control
SPL_OF_LIBFDT	lib/Kconfig	/^config SPL_OF_LIBFDT$/;"	c	menu:Library routines
SPL_OF_PLATDATA	dts/Kconfig	/^config SPL_OF_PLATDATA$/;"	c	menu:Device Tree Control
SPL_OF_TRANSLATE	drivers/core/Kconfig	/^config SPL_OF_TRANSLATE$/;"	c	menu:Generic Driver Options
SPL_ONENAND_SUPPORT	common/spl/Kconfig	/^config SPL_ONENAND_SUPPORT$/;"	c	menu:SPL / TPL
SPL_OS_BOOT	common/spl/Kconfig	/^config SPL_OS_BOOT$/;"	c	menu:SPL / TPL
SPL_OS_BOOT_KEY	board/technexion/twister/twister.h	/^#define SPL_OS_BOOT_KEY	/;"	d
SPL_OS_BOOT_KEY	board/timll/devkit8000/devkit8000.h	/^#define SPL_OS_BOOT_KEY	/;"	d
SPL_PAYLOAD	Makefile	/^SPL_PAYLOAD := tpl\/u-boot-with-tpl.bin$/;"	m
SPL_PAYLOAD	Makefile	/^SPL_PAYLOAD := u-boot.bin$/;"	m
SPL_PINCONF	drivers/pinctrl/Kconfig	/^config SPL_PINCONF$/;"	c	menu:Pin controllers
SPL_PINCTRL	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL$/;"	c	menu:Pin controllers
SPL_PINCTRL_FULL	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL_FULL$/;"	c	menu:Pin controllers
SPL_PINCTRL_GENERIC	drivers/pinctrl/Kconfig	/^config SPL_PINCTRL_GENERIC$/;"	c	menu:Pin controllers
SPL_PINMUX	drivers/pinctrl/Kconfig	/^config SPL_PINMUX$/;"	c	menu:Pin controllers
SPL_PMIC_CHILDREN	drivers/power/pmic/Kconfig	/^config SPL_PMIC_CHILDREN$/;"	c
SPL_POST_MEM_SUPPORT	common/spl/Kconfig	/^config SPL_POST_MEM_SUPPORT$/;"	c	menu:SPL / TPL
SPL_POWER_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
SPL_POWER_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
SPL_POWER_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
SPL_POWER_SUPPORT	board/sunxi/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
SPL_POWER_SUPPORT	board/ti/common/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c
SPL_POWER_SUPPORT	common/spl/Kconfig	/^config SPL_POWER_SUPPORT$/;"	c	menu:SPL / TPL
SPL_PWRSEQ	drivers/misc/Kconfig	/^config SPL_PWRSEQ$/;"	c	menu:Multifunction device drivers
SPL_RAM	drivers/ram/Kconfig	/^config SPL_RAM$/;"	c
SPL_REGMAP	drivers/core/Kconfig	/^config SPL_REGMAP$/;"	c	menu:Generic Driver Options
SPL_RSA	lib/rsa/Kconfig	/^config SPL_RSA$/;"	c
SPL_SATA_SUPPORT	common/spl/Kconfig	/^config SPL_SATA_SUPPORT$/;"	c	menu:SPL / TPL
SPL_SAVEENV	common/spl/Kconfig	/^config SPL_SAVEENV$/;"	c	menu:SPL / TPL
SPL_SEPARATE_BSS	common/spl/Kconfig	/^config SPL_SEPARATE_BSS$/;"	c	menu:SPL / TPL
SPL_SERIAL_PRESENT	drivers/serial/Kconfig	/^config SPL_SERIAL_PRESENT$/;"	c	menu:Serial drivers
SPL_SERIAL_SUPPORT	arch/arm/cpu/armv7/omap3/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/cpu/armv7/omap4/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/cpu/armv7/omap5/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/mach-tegra/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	board/sunxi/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	board/ti/common/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c
SPL_SERIAL_SUPPORT	common/spl/Kconfig	/^config SPL_SERIAL_SUPPORT$/;"	c	menu:SPL / TPL
SPL_SHA1_SUPPORT	common/spl/Kconfig	/^config SPL_SHA1_SUPPORT$/;"	c	menu:SPL / TPL
SPL_SHA256_SUPPORT	common/spl/Kconfig	/^config SPL_SHA256_SUPPORT$/;"	c	menu:SPL / TPL
SPL_SIGNATURE	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SPL_SIGNATURE	/;"	d
SPL_SIGNATURE	arch/arm/include/asm/arch/spl.h	/^#define SPL_SIGNATURE	/;"	d
SPL_SIMPLE_BUS	drivers/core/Kconfig	/^config SPL_SIMPLE_BUS$/;"	c	menu:Generic Driver Options
SPL_SPI_FLASH_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
SPL_SPI_FLASH_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
SPL_SPI_FLASH_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c
SPL_SPI_FLASH_SUPPORT	common/spl/Kconfig	/^config SPL_SPI_FLASH_SUPPORT$/;"	c	menu:SPL / TPL
SPL_SPI_SUNXI	drivers/mtd/spi/Kconfig	/^config SPL_SPI_SUNXI$/;"	c	menu:SPI Flash Support
SPL_SPI_SUPPORT	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
SPL_SPI_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
SPL_SPI_SUPPORT	arch/arm/mach-zynq/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c
SPL_SPI_SUPPORT	common/spl/Kconfig	/^config SPL_SPI_SUPPORT$/;"	c	menu:SPL / TPL
SPL_STACK_R	common/spl/Kconfig	/^config SPL_STACK_R$/;"	c	menu:SPL / TPL
SPL_STACK_R_ADDR	board/sunxi/Kconfig	/^config SPL_STACK_R_ADDR$/;"	c
SPL_STACK_R_ADDR	common/spl/Kconfig	/^config SPL_STACK_R_ADDR$/;"	c	menu:SPL / TPL
SPL_STACK_R_MALLOC_SIMPLE_LEN	common/spl/Kconfig	/^config SPL_STACK_R_MALLOC_SIMPLE_LEN$/;"	c	menu:SPL / TPL
SPL_SYSCON	drivers/core/Kconfig	/^config SPL_SYSCON$/;"	c	menu:Generic Driver Options
SPL_SYS_MALLOC_SIMPLE	common/spl/Kconfig	/^config SPL_SYS_MALLOC_SIMPLE$/;"	c	menu:SPL / TPL
SPL_USBETH_SUPPORT	common/spl/Kconfig	/^config SPL_USBETH_SUPPORT$/;"	c	menu:SPL / TPL
SPL_USB_HOST_SUPPORT	common/spl/Kconfig	/^config SPL_USB_HOST_SUPPORT$/;"	c	menu:SPL / TPL
SPL_USB_SUPPORT	common/spl/Kconfig	/^config SPL_USB_SUPPORT$/;"	c	menu:SPL / TPL
SPL_WATCHDOG_SUPPORT	arch/arm/mach-socfpga/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c
SPL_WATCHDOG_SUPPORT	board/ti/am335x/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c
SPL_WATCHDOG_SUPPORT	common/spl/Kconfig	/^config SPL_WATCHDOG_SUPPORT$/;"	c	menu:SPL / TPL
SPL_YMODEM_SUPPORT	board/ti/am335x/Kconfig	/^config SPL_YMODEM_SUPPORT$/;"	c
SPL_YMODEM_SUPPORT	common/spl/Kconfig	/^config SPL_YMODEM_SUPPORT$/;"	c	menu:SPL / TPL
SPL_ZYNQMP_ALT_BOOTMODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_ZYNQMP_ALT_BOOTMODE$/;"	c
SPL_ZYNQMP_ALT_BOOTMODE_ENABLED	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED$/;"	c
SPMI	drivers/spmi/Kconfig	/^config SPMI$/;"	c	menu:SPMI support
SPMI support	drivers/spmi/Kconfig	/^menu "SPMI support"$/;"	m
SPMI_CH_OFFSET	drivers/spmi/spmi-msm.c	/^#define SPMI_CH_OFFSET(/;"	d	file:
SPMI_CMD_ADDR_OFFSET_SHIFT	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_ADDR_OFFSET_SHIFT	/;"	d	file:
SPMI_CMD_ADDR_SHIFT	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_ADDR_SHIFT	/;"	d	file:
SPMI_CMD_BYTE_CNT_SHIFT	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_BYTE_CNT_SHIFT	/;"	d	file:
SPMI_CMD_EXT_REG_READ_LONG	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_EXT_REG_READ_LONG	/;"	d	file:
SPMI_CMD_EXT_REG_WRITE_LONG	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_EXT_REG_WRITE_LONG	/;"	d	file:
SPMI_CMD_OPCODE_SHIFT	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_OPCODE_SHIFT	/;"	d	file:
SPMI_CMD_SLAVE_ID_SHIFT	drivers/spmi/spmi-msm.c	/^#define SPMI_CMD_SLAVE_ID_SHIFT	/;"	d	file:
SPMI_MAX_CHANNELS	drivers/spmi/spmi-msm.c	/^#define SPMI_MAX_CHANNELS	/;"	d	file:
SPMI_MAX_PERIPH	drivers/spmi/spmi-msm.c	/^#define SPMI_MAX_PERIPH	/;"	d	file:
SPMI_MAX_SLAVES	drivers/spmi/spmi-msm.c	/^#define SPMI_MAX_SLAVES	/;"	d	file:
SPMI_MSM	drivers/spmi/Kconfig	/^config SPMI_MSM$/;"	c	menu:SPMI support
SPMI_REG_CMD0	drivers/spmi/spmi-msm.c	/^#define SPMI_REG_CMD0	/;"	d	file:
SPMI_REG_CONFIG	drivers/spmi/spmi-msm.c	/^#define SPMI_REG_CONFIG	/;"	d	file:
SPMI_REG_RDATA	drivers/spmi/spmi-msm.c	/^#define SPMI_REG_RDATA	/;"	d	file:
SPMI_REG_STATUS	drivers/spmi/spmi-msm.c	/^#define SPMI_REG_STATUS	/;"	d	file:
SPMI_REG_WDATA	drivers/spmi/spmi-msm.c	/^#define SPMI_REG_WDATA	/;"	d	file:
SPMI_SANDBOX	drivers/spmi/Kconfig	/^config SPMI_SANDBOX$/;"	c	menu:SPMI support
SPMI_STATUS_DONE	drivers/spmi/spmi-msm.c	/^#define SPMI_STATUS_DONE	/;"	d	file:
SPMODE_CI	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_CI	/;"	d
SPMODE_CI	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_CI	/;"	d
SPMODE_CI	include/commproc.h	/^#define SPMODE_CI	/;"	d
SPMODE_CP	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_CP	/;"	d
SPMODE_CP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_CP	/;"	d
SPMODE_CP	include/commproc.h	/^#define SPMODE_CP	/;"	d
SPMODE_DIV16	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_DIV16	/;"	d
SPMODE_DIV16	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_DIV16	/;"	d
SPMODE_DIV16	include/commproc.h	/^#define SPMODE_DIV16	/;"	d
SPMODE_EN	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_EN	/;"	d
SPMODE_EN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_EN	/;"	d
SPMODE_EN	include/commproc.h	/^#define SPMODE_EN	/;"	d
SPMODE_LEN	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_LEN(/;"	d
SPMODE_LEN	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_LEN(/;"	d
SPMODE_LEN	include/commproc.h	/^#define SPMODE_LEN(/;"	d
SPMODE_LENMSK	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_LENMSK	/;"	d
SPMODE_LENMSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_LENMSK	/;"	d
SPMODE_LENMSK	include/commproc.h	/^#define SPMODE_LENMSK	/;"	d
SPMODE_LOOP	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_LOOP	/;"	d
SPMODE_LOOP	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_LOOP	/;"	d
SPMODE_LOOP	include/commproc.h	/^#define SPMODE_LOOP	/;"	d
SPMODE_MSTR	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_MSTR	/;"	d
SPMODE_MSTR	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_MSTR	/;"	d
SPMODE_MSTR	include/commproc.h	/^#define SPMODE_MSTR	/;"	d
SPMODE_PM	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_PM(/;"	d
SPMODE_PM	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_PM(/;"	d
SPMODE_PM	include/commproc.h	/^#define SPMODE_PM(/;"	d
SPMODE_PMMSK	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_PMMSK	/;"	d
SPMODE_PMMSK	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_PMMSK	/;"	d
SPMODE_PMMSK	include/commproc.h	/^#define SPMODE_PMMSK	/;"	d
SPMODE_REV	arch/powerpc/include/asm/cpm_8260.h	/^#define SPMODE_REV	/;"	d
SPMODE_REV	arch/powerpc/include/asm/cpm_85xx.h	/^#define SPMODE_REV	/;"	d
SPMODE_REV	include/commproc.h	/^#define SPMODE_REV	/;"	d
SPMR_CEPDF	include/mpc83xx.h	/^#define SPMR_CEPDF	/;"	d
SPMR_CEPDF_SHIFT	include/mpc83xx.h	/^#define SPMR_CEPDF_SHIFT	/;"	d
SPMR_CEPMF	include/mpc83xx.h	/^#define SPMR_CEPMF	/;"	d
SPMR_CEPMF_SHIFT	include/mpc83xx.h	/^#define SPMR_CEPMF_SHIFT	/;"	d
SPMR_CEVCOD	include/mpc83xx.h	/^#define SPMR_CEVCOD	/;"	d
SPMR_CEVCOD_SHIFT	include/mpc83xx.h	/^#define SPMR_CEVCOD_SHIFT	/;"	d
SPMR_CKID	include/mpc83xx.h	/^#define SPMR_CKID	/;"	d
SPMR_CKID_SHIFT	include/mpc83xx.h	/^#define SPMR_CKID_SHIFT	/;"	d
SPMR_COREPLL	include/mpc83xx.h	/^#define SPMR_COREPLL	/;"	d
SPMR_COREPLL_SHIFT	include/mpc83xx.h	/^#define SPMR_COREPLL_SHIFT	/;"	d
SPMR_CPMF	arch/powerpc/include/asm/immap_512x.h	/^#define SPMR_CPMF	/;"	d
SPMR_CPMF_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SPMR_CPMF_SHIFT	/;"	d
SPMR_DDRCM	include/mpc83xx.h	/^#define SPMR_DDRCM	/;"	d
SPMR_DDRCM_SHIFT	include/mpc83xx.h	/^#define SPMR_DDRCM_SHIFT	/;"	d
SPMR_LBIUCM	include/mpc83xx.h	/^#define SPMR_LBIUCM	/;"	d
SPMR_LBIUCM_SHIFT	include/mpc83xx.h	/^#define SPMR_LBIUCM_SHIFT	/;"	d
SPMR_SPMF	arch/powerpc/include/asm/immap_512x.h	/^#define SPMR_SPMF	/;"	d
SPMR_SPMF	include/mpc83xx.h	/^#define SPMR_SPMF	/;"	d
SPMR_SPMF_SHIFT	arch/powerpc/include/asm/immap_512x.h	/^#define SPMR_SPMF_SHIFT	/;"	d
SPMR_SPMF_SHIFT	include/mpc83xx.h	/^#define SPMR_SPMF_SHIFT	/;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_CHNL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_CHNL /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MCMC1 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MCMC2 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MRCS0 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MRCS1 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MRCS2 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MRCS3 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MTCS0 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MTCS1 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MTCS2 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_MTCS3 /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_RCLKDIV /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_RCR1 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RCR2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_RCR2 /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_RFSDIV /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_RX /;"	d
SPORT0_RX	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_RX /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_STAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_STAT /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_TCLKDIV /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_TCR1 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TCR2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_TCR2 /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_TFSDIV /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT0_TX /;"	d
SPORT0_TX	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT0_TX /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_CHNL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_CHNL /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MCMC1 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MCMC2 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MRCS0 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MRCS1 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MRCS2 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MRCS3 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MTCS0 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MTCS1 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MTCS2 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_MTCS3 /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_RCLKDIV /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_RCR1 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RCR2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_RCR2 /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_RFSDIV /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_RX /;"	d
SPORT1_RX	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_RX /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_STAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_STAT /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_TCLKDIV /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR1	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_TCR1 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TCR2	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_TCR2 /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_TFSDIV /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT1_TX /;"	d
SPORT1_TX	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define SPORT1_TX /;"	d
SPORT2_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_CHNL /;"	d
SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_CHNL /;"	d
SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_CHNL /;"	d
SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_CHNL /;"	d
SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_CHNL /;"	d
SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_CHNL /;"	d
SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MCMC1 /;"	d
SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MCMC1 /;"	d
SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MCMC1 /;"	d
SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MCMC1 /;"	d
SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MCMC1 /;"	d
SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MCMC1 /;"	d
SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MCMC2 /;"	d
SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MCMC2 /;"	d
SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MCMC2 /;"	d
SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MCMC2 /;"	d
SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MCMC2 /;"	d
SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MCMC2 /;"	d
SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MRCS0 /;"	d
SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MRCS0 /;"	d
SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MRCS0 /;"	d
SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MRCS0 /;"	d
SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MRCS0 /;"	d
SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MRCS0 /;"	d
SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MRCS1 /;"	d
SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MRCS1 /;"	d
SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MRCS1 /;"	d
SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MRCS1 /;"	d
SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MRCS1 /;"	d
SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MRCS1 /;"	d
SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MRCS2 /;"	d
SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MRCS2 /;"	d
SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MRCS2 /;"	d
SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MRCS2 /;"	d
SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MRCS2 /;"	d
SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MRCS2 /;"	d
SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MRCS3 /;"	d
SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MRCS3 /;"	d
SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MRCS3 /;"	d
SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MRCS3 /;"	d
SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MRCS3 /;"	d
SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MRCS3 /;"	d
SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MTCS0 /;"	d
SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MTCS0 /;"	d
SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MTCS0 /;"	d
SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MTCS0 /;"	d
SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MTCS0 /;"	d
SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MTCS0 /;"	d
SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MTCS1 /;"	d
SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MTCS1 /;"	d
SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MTCS1 /;"	d
SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MTCS1 /;"	d
SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MTCS1 /;"	d
SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MTCS1 /;"	d
SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MTCS2 /;"	d
SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MTCS2 /;"	d
SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MTCS2 /;"	d
SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MTCS2 /;"	d
SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MTCS2 /;"	d
SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MTCS2 /;"	d
SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_MTCS3 /;"	d
SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_MTCS3 /;"	d
SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_MTCS3 /;"	d
SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_MTCS3 /;"	d
SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_MTCS3 /;"	d
SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_MTCS3 /;"	d
SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_RCLKDIV /;"	d
SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_RCLKDIV /;"	d
SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_RCLKDIV /;"	d
SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_RCLKDIV /;"	d
SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_RCLKDIV /;"	d
SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_RCLKDIV /;"	d
SPORT2_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_RCR1 /;"	d
SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_RCR1 /;"	d
SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_RCR1 /;"	d
SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_RCR1 /;"	d
SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_RCR1 /;"	d
SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_RCR1 /;"	d
SPORT2_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_RCR2 /;"	d
SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_RCR2 /;"	d
SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_RCR2 /;"	d
SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_RCR2 /;"	d
SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_RCR2 /;"	d
SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_RCR2 /;"	d
SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_RFSDIV /;"	d
SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_RFSDIV /;"	d
SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_RFSDIV /;"	d
SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_RFSDIV /;"	d
SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_RFSDIV /;"	d
SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_RFSDIV /;"	d
SPORT2_RX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_RX /;"	d
SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_RX /;"	d
SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_RX /;"	d
SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_RX /;"	d
SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_RX /;"	d
SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_RX /;"	d
SPORT2_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_STAT /;"	d
SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_STAT /;"	d
SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_STAT /;"	d
SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_STAT /;"	d
SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_STAT /;"	d
SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_STAT /;"	d
SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_TCLKDIV /;"	d
SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_TCLKDIV /;"	d
SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_TCLKDIV /;"	d
SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_TCLKDIV /;"	d
SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_TCLKDIV /;"	d
SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_TCLKDIV /;"	d
SPORT2_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_TCR1 /;"	d
SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_TCR1 /;"	d
SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_TCR1 /;"	d
SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_TCR1 /;"	d
SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_TCR1 /;"	d
SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_TCR1 /;"	d
SPORT2_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_TCR2 /;"	d
SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_TCR2 /;"	d
SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_TCR2 /;"	d
SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_TCR2 /;"	d
SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_TCR2 /;"	d
SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_TCR2 /;"	d
SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_TFSDIV /;"	d
SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_TFSDIV /;"	d
SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_TFSDIV /;"	d
SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_TFSDIV /;"	d
SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_TFSDIV /;"	d
SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_TFSDIV /;"	d
SPORT2_TX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT2_TX /;"	d
SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT2_TX /;"	d
SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT2_TX /;"	d
SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT2_TX /;"	d
SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT2_TX /;"	d
SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT2_TX /;"	d
SPORT3_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_CHNL /;"	d
SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_CHNL /;"	d
SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_CHNL /;"	d
SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_CHNL /;"	d
SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_CHNL /;"	d
SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_CHNL /;"	d
SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MCMC1 /;"	d
SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MCMC1 /;"	d
SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MCMC1 /;"	d
SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MCMC1 /;"	d
SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MCMC1 /;"	d
SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MCMC1 /;"	d
SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MCMC2 /;"	d
SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MCMC2 /;"	d
SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MCMC2 /;"	d
SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MCMC2 /;"	d
SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MCMC2 /;"	d
SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MCMC2 /;"	d
SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MRCS0 /;"	d
SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MRCS0 /;"	d
SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MRCS0 /;"	d
SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MRCS0 /;"	d
SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MRCS0 /;"	d
SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MRCS0 /;"	d
SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MRCS1 /;"	d
SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MRCS1 /;"	d
SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MRCS1 /;"	d
SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MRCS1 /;"	d
SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MRCS1 /;"	d
SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MRCS1 /;"	d
SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MRCS2 /;"	d
SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MRCS2 /;"	d
SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MRCS2 /;"	d
SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MRCS2 /;"	d
SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MRCS2 /;"	d
SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MRCS2 /;"	d
SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MRCS3 /;"	d
SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MRCS3 /;"	d
SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MRCS3 /;"	d
SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MRCS3 /;"	d
SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MRCS3 /;"	d
SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MRCS3 /;"	d
SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MTCS0 /;"	d
SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MTCS0 /;"	d
SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MTCS0 /;"	d
SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MTCS0 /;"	d
SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MTCS0 /;"	d
SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MTCS0 /;"	d
SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MTCS1 /;"	d
SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MTCS1 /;"	d
SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MTCS1 /;"	d
SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MTCS1 /;"	d
SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MTCS1 /;"	d
SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MTCS1 /;"	d
SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MTCS2 /;"	d
SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MTCS2 /;"	d
SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MTCS2 /;"	d
SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MTCS2 /;"	d
SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MTCS2 /;"	d
SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MTCS2 /;"	d
SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_MTCS3 /;"	d
SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_MTCS3 /;"	d
SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_MTCS3 /;"	d
SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_MTCS3 /;"	d
SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_MTCS3 /;"	d
SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_MTCS3 /;"	d
SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_RCLKDIV /;"	d
SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_RCLKDIV /;"	d
SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_RCLKDIV /;"	d
SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_RCLKDIV /;"	d
SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_RCLKDIV /;"	d
SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_RCLKDIV /;"	d
SPORT3_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_RCR1 /;"	d
SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_RCR1 /;"	d
SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_RCR1 /;"	d
SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_RCR1 /;"	d
SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_RCR1 /;"	d
SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_RCR1 /;"	d
SPORT3_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_RCR2 /;"	d
SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_RCR2 /;"	d
SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_RCR2 /;"	d
SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_RCR2 /;"	d
SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_RCR2 /;"	d
SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_RCR2 /;"	d
SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_RFSDIV /;"	d
SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_RFSDIV /;"	d
SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_RFSDIV /;"	d
SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_RFSDIV /;"	d
SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_RFSDIV /;"	d
SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_RFSDIV /;"	d
SPORT3_RX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_RX /;"	d
SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_RX /;"	d
SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_RX /;"	d
SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_RX /;"	d
SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_RX /;"	d
SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_RX /;"	d
SPORT3_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_STAT /;"	d
SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_STAT /;"	d
SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_STAT /;"	d
SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_STAT /;"	d
SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_STAT /;"	d
SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_STAT /;"	d
SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_TCLKDIV /;"	d
SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_TCLKDIV /;"	d
SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_TCLKDIV /;"	d
SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_TCLKDIV /;"	d
SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_TCLKDIV /;"	d
SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_TCLKDIV /;"	d
SPORT3_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_TCR1 /;"	d
SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_TCR1 /;"	d
SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_TCR1 /;"	d
SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_TCR1 /;"	d
SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_TCR1 /;"	d
SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_TCR1 /;"	d
SPORT3_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_TCR2 /;"	d
SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_TCR2 /;"	d
SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_TCR2 /;"	d
SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_TCR2 /;"	d
SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_TCR2 /;"	d
SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_TCR2 /;"	d
SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_TFSDIV /;"	d
SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_TFSDIV /;"	d
SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_TFSDIV /;"	d
SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_TFSDIV /;"	d
SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_TFSDIV /;"	d
SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_TFSDIV /;"	d
SPORT3_TX	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SPORT3_TX /;"	d
SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define SPORT3_TX /;"	d
SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define SPORT3_TX /;"	d
SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define SPORT3_TX /;"	d
SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define SPORT3_TX /;"	d
SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define SPORT3_TX /;"	d
SPORT_HYST	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define SPORT_HYST	/;"	d
SPPCR_IO1FV	drivers/spi/sh_qspi.c	/^#define SPPCR_IO1FV	/;"	d	file:
SPPCR_IO2FV	drivers/spi/sh_qspi.c	/^#define SPPCR_IO2FV	/;"	d	file:
SPPCR_IO3FV	drivers/spi/sh_qspi.c	/^#define SPPCR_IO3FV	/;"	d	file:
SPQCF	arch/sh/include/asm/cpu_sh7722.h	/^#define SPQCF /;"	d
SPQCS	arch/sh/include/asm/cpu_sh7722.h	/^#define SPQCS /;"	d
SPQCT	arch/sh/include/asm/cpu_sh7722.h	/^#define SPQCT /;"	d
SPR0	arch/powerpc/include/asm/processor.h	/^#define SPR0	/;"	d
SPR1	arch/powerpc/include/asm/processor.h	/^#define SPR1	/;"	d
SPR2	arch/powerpc/include/asm/processor.h	/^#define SPR2	/;"	d
SPR3	arch/powerpc/include/asm/processor.h	/^#define SPR3	/;"	d
SPRBR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SPRBR	/;"	d
SPRG0	arch/powerpc/include/asm/processor.h	/^#define SPRG0	/;"	d
SPRG1	arch/powerpc/include/asm/processor.h	/^#define SPRG1	/;"	d
SPRG2	arch/powerpc/include/asm/processor.h	/^#define SPRG2	/;"	d
SPRG3	arch/powerpc/include/asm/processor.h	/^#define SPRG3	/;"	d
SPRG4	arch/powerpc/include/asm/processor.h	/^#define SPRG4	/;"	d
SPRG4R	arch/powerpc/include/asm/processor.h	/^#define SPRG4R	/;"	d
SPRG4W	arch/powerpc/include/asm/processor.h	/^#define SPRG4W	/;"	d
SPRG5	arch/powerpc/include/asm/processor.h	/^#define SPRG5	/;"	d
SPRG5R	arch/powerpc/include/asm/processor.h	/^#define SPRG5R	/;"	d
SPRG5W	arch/powerpc/include/asm/processor.h	/^#define SPRG5W	/;"	d
SPRG6	arch/powerpc/include/asm/processor.h	/^#define SPRG6	/;"	d
SPRG6R	arch/powerpc/include/asm/processor.h	/^#define SPRG6R	/;"	d
SPRG6W	arch/powerpc/include/asm/processor.h	/^#define SPRG6W	/;"	d
SPRG7	arch/powerpc/include/asm/processor.h	/^#define SPRG7	/;"	d
SPRG7R	arch/powerpc/include/asm/processor.h	/^#define SPRG7R	/;"	d
SPRG7W	arch/powerpc/include/asm/processor.h	/^#define SPRG7W	/;"	d
SPRGROUP_D	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_D	/;"	d
SPRGROUP_DC	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_DC	/;"	d
SPRGROUP_DMMU	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_DMMU	/;"	d
SPRGROUP_FP	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_FP	/;"	d
SPRGROUP_IC	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_IC	/;"	d
SPRGROUP_IMMU	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_IMMU	/;"	d
SPRGROUP_MAC	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_MAC	/;"	d
SPRGROUP_PC	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_PC	/;"	d
SPRGROUP_PIC	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_PIC	/;"	d
SPRGROUP_PM	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_PM	/;"	d
SPRGROUP_SYS	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_SYS	/;"	d
SPRGROUP_TT	arch/openrisc/include/asm/spr-defs.h	/^#define SPRGROUP_TT	/;"	d
SPRIDR_PARTID	include/mpc83xx.h	/^#define SPRIDR_PARTID	/;"	d
SPRIDR_REVID	include/mpc83xx.h	/^#define SPRIDR_REVID	/;"	d
SPRN_BBEAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_BBEAR	/;"	d
SPRN_BBTAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_BBTAR	/;"	d
SPRN_BUCSR	arch/powerpc/include/asm/processor.h	/^#define SPRN_BUCSR	/;"	d
SPRN_CCR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_CCR0	/;"	d
SPRN_CCR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_CCR1	/;"	d
SPRN_CDBCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_CDBCR	/;"	d
SPRN_CSRR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_CSRR0	/;"	d
SPRN_CSRR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_CSRR1	/;"	d
SPRN_CTR	arch/powerpc/include/asm/processor.h	/^#define SPRN_CTR	/;"	d
SPRN_DABR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DABR	/;"	d
SPRN_DAC1	arch/powerpc/include/asm/processor.h	/^#define SPRN_DAC1	/;"	d
SPRN_DAC2	arch/powerpc/include/asm/processor.h	/^#define SPRN_DAC2	/;"	d
SPRN_DAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DAR	/;"	d
SPRN_DBAT0L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT0L	/;"	d
SPRN_DBAT0U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT0U	/;"	d
SPRN_DBAT1L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT1L	/;"	d
SPRN_DBAT1U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT1U	/;"	d
SPRN_DBAT2L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT2L	/;"	d
SPRN_DBAT2U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT2U	/;"	d
SPRN_DBAT3L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT3L	/;"	d
SPRN_DBAT3U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT3U	/;"	d
SPRN_DBAT4L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT4L	/;"	d
SPRN_DBAT4U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT4U	/;"	d
SPRN_DBAT5L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT5L	/;"	d
SPRN_DBAT5U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT5U	/;"	d
SPRN_DBAT6L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT6L	/;"	d
SPRN_DBAT6U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT6U	/;"	d
SPRN_DBAT7L	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT7L	/;"	d
SPRN_DBAT7U	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBAT7U	/;"	d
SPRN_DBCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBCR	/;"	d
SPRN_DBCR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBCR0	/;"	d
SPRN_DBCR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBCR1	/;"	d
SPRN_DBCR2	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBCR2	/;"	d
SPRN_DBDR	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DBDR	/;"	d
SPRN_DBSR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DBSR	/;"	d
SPRN_DCCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DCCR	/;"	d
SPRN_DCDBTRH	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DCDBTRH	/;"	d
SPRN_DCDBTRL	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DCDBTRL	/;"	d
SPRN_DCMP	arch/powerpc/include/asm/processor.h	/^#define SPRN_DCMP	/;"	d
SPRN_DCWR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DCWR	/;"	d
SPRN_DEAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DEAR	/;"	d
SPRN_DEC	arch/powerpc/include/asm/processor.h	/^#define SPRN_DEC	/;"	d
SPRN_DECAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DECAR	/;"	d
SPRN_DMISS	arch/powerpc/include/asm/processor.h	/^#define SPRN_DMISS	/;"	d
SPRN_DNV0	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DNV0	/;"	d
SPRN_DNV1	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DNV1	/;"	d
SPRN_DNV2	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DNV2	/;"	d
SPRN_DNV3	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DNV3	/;"	d
SPRN_DSISR	arch/powerpc/include/asm/processor.h	/^#define SPRN_DSISR	/;"	d
SPRN_DTV0	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DTV0	/;"	d
SPRN_DTV1	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DTV1	/;"	d
SPRN_DTV2	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DTV2	/;"	d
SPRN_DTV3	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DTV3	/;"	d
SPRN_DVC1	arch/powerpc/include/asm/processor.h	/^#define SPRN_DVC1	/;"	d
SPRN_DVC2	arch/powerpc/include/asm/processor.h	/^#define SPRN_DVC2	/;"	d
SPRN_DVLIM	arch/powerpc/include/asm/processor.h	/^#define	SPRN_DVLIM	/;"	d
SPRN_EAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_EAR	/;"	d
SPRN_ESR	arch/powerpc/include/asm/processor.h	/^#define SPRN_ESR	/;"	d
SPRN_EVPR	arch/powerpc/include/asm/processor.h	/^#define SPRN_EVPR	/;"	d
SPRN_GIVOR13	arch/powerpc/include/asm/processor.h	/^#define SPRN_GIVOR13	/;"	d
SPRN_GIVOR14	arch/powerpc/include/asm/processor.h	/^#define SPRN_GIVOR14	/;"	d
SPRN_GIVOR2	arch/powerpc/include/asm/processor.h	/^#define SPRN_GIVOR2	/;"	d
SPRN_GIVOR3	arch/powerpc/include/asm/processor.h	/^#define SPRN_GIVOR3	/;"	d
SPRN_GIVOR4	arch/powerpc/include/asm/processor.h	/^#define SPRN_GIVOR4	/;"	d
SPRN_GIVOR8	arch/powerpc/include/asm/processor.h	/^#define SPRN_GIVOR8	/;"	d
SPRN_HASH1	arch/powerpc/include/asm/processor.h	/^#define SPRN_HASH1	/;"	d
SPRN_HASH2	arch/powerpc/include/asm/processor.h	/^#define SPRN_HASH2	/;"	d
SPRN_HDBCR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR0	/;"	d
SPRN_HDBCR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR1	/;"	d
SPRN_HDBCR2	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR2	/;"	d
SPRN_HDBCR3	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR3	/;"	d
SPRN_HDBCR4	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR4	/;"	d
SPRN_HDBCR5	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR5	/;"	d
SPRN_HDBCR6	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR6	/;"	d
SPRN_HDBCR7	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR7	/;"	d
SPRN_HDBCR8	arch/powerpc/include/asm/processor.h	/^#define SPRN_HDBCR8	/;"	d
SPRN_HID0	arch/powerpc/include/asm/processor.h	/^#define SPRN_HID0	/;"	d
SPRN_HID1	arch/powerpc/include/asm/processor.h	/^#define SPRN_HID1	/;"	d
SPRN_IABR	arch/powerpc/include/asm/processor.h	/^#define SPRN_IABR	/;"	d
SPRN_IAC1	arch/powerpc/include/asm/processor.h	/^#define SPRN_IAC1	/;"	d
SPRN_IAC2	arch/powerpc/include/asm/processor.h	/^#define SPRN_IAC2	/;"	d
SPRN_IAC3	arch/powerpc/include/asm/processor.h	/^#define SPRN_IAC3	/;"	d
SPRN_IAC4	arch/powerpc/include/asm/processor.h	/^#define SPRN_IAC4	/;"	d
SPRN_IBAT0L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT0L	/;"	d
SPRN_IBAT0U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT0U	/;"	d
SPRN_IBAT1L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT1L	/;"	d
SPRN_IBAT1U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT1U	/;"	d
SPRN_IBAT2L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT2L	/;"	d
SPRN_IBAT2U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT2U	/;"	d
SPRN_IBAT3L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT3L	/;"	d
SPRN_IBAT3U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT3U	/;"	d
SPRN_IBAT4L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT4L	/;"	d
SPRN_IBAT4U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT4U	/;"	d
SPRN_IBAT5L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT5L	/;"	d
SPRN_IBAT5U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT5U	/;"	d
SPRN_IBAT6L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT6L	/;"	d
SPRN_IBAT6U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT6U	/;"	d
SPRN_IBAT7L	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT7L	/;"	d
SPRN_IBAT7U	arch/powerpc/include/asm/processor.h	/^#define SPRN_IBAT7U	/;"	d
SPRN_ICCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_ICCR	/;"	d
SPRN_ICDBDR	arch/powerpc/include/asm/processor.h	/^#define SPRN_ICDBDR	/;"	d
SPRN_ICDBTRH	arch/powerpc/include/asm/processor.h	/^#define	SPRN_ICDBTRH	/;"	d
SPRN_ICDBTRL	arch/powerpc/include/asm/processor.h	/^#define SPRN_ICDBTRL	/;"	d
SPRN_ICMP	arch/powerpc/include/asm/processor.h	/^#define SPRN_ICMP	/;"	d
SPRN_ICTC	arch/powerpc/include/asm/processor.h	/^#define SPRN_ICTC	/;"	d
SPRN_IMISS	arch/powerpc/include/asm/processor.h	/^#define SPRN_IMISS	/;"	d
SPRN_IMMR	arch/powerpc/include/asm/processor.h	/^#define SPRN_IMMR	/;"	d
SPRN_INV0	arch/powerpc/include/asm/processor.h	/^#define	SPRN_INV0	/;"	d
SPRN_INV1	arch/powerpc/include/asm/processor.h	/^#define	SPRN_INV1	/;"	d
SPRN_INV2	arch/powerpc/include/asm/processor.h	/^#define	SPRN_INV2	/;"	d
SPRN_INV3	arch/powerpc/include/asm/processor.h	/^#define	SPRN_INV3	/;"	d
SPRN_ITV0	arch/powerpc/include/asm/processor.h	/^#define	SPRN_ITV0	/;"	d
SPRN_ITV1	arch/powerpc/include/asm/processor.h	/^#define	SPRN_ITV1	/;"	d
SPRN_ITV2	arch/powerpc/include/asm/processor.h	/^#define	SPRN_ITV2	/;"	d
SPRN_ITV3	arch/powerpc/include/asm/processor.h	/^#define	SPRN_ITV3	/;"	d
SPRN_IVLIM	arch/powerpc/include/asm/processor.h	/^#define	SPRN_IVLIM	/;"	d
SPRN_IVOR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR0	/;"	d
SPRN_IVOR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR1	/;"	d
SPRN_IVOR10	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR10	/;"	d
SPRN_IVOR11	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR11	/;"	d
SPRN_IVOR12	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR12	/;"	d
SPRN_IVOR13	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR13	/;"	d
SPRN_IVOR14	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR14	/;"	d
SPRN_IVOR15	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR15	/;"	d
SPRN_IVOR2	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR2	/;"	d
SPRN_IVOR3	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR3	/;"	d
SPRN_IVOR32	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR32	/;"	d
SPRN_IVOR33	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR33	/;"	d
SPRN_IVOR34	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR34	/;"	d
SPRN_IVOR35	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR35	/;"	d
SPRN_IVOR36	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR36	/;"	d
SPRN_IVOR37	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR37	/;"	d
SPRN_IVOR38	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR38	/;"	d
SPRN_IVOR39	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR39	/;"	d
SPRN_IVOR4	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR4	/;"	d
SPRN_IVOR40	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR40	/;"	d
SPRN_IVOR41	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR41	/;"	d
SPRN_IVOR5	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR5	/;"	d
SPRN_IVOR6	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR6	/;"	d
SPRN_IVOR7	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR7	/;"	d
SPRN_IVOR8	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR8	/;"	d
SPRN_IVOR9	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVOR9	/;"	d
SPRN_IVPR	arch/powerpc/include/asm/processor.h	/^#define SPRN_IVPR	/;"	d
SPRN_L1CFG0	arch/powerpc/include/asm/processor.h	/^#define SPRN_L1CFG0	/;"	d
SPRN_L1CFG1	arch/powerpc/include/asm/processor.h	/^#define SPRN_L1CFG1	/;"	d
SPRN_L1CSR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_L1CSR0	/;"	d
SPRN_L1CSR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_L1CSR1	/;"	d
SPRN_L1CSR2	arch/powerpc/include/asm/processor.h	/^#define SPRN_L1CSR2	/;"	d
SPRN_L2CFG0	arch/powerpc/include/asm/processor.h	/^#define SPRN_L2CFG0	/;"	d
SPRN_L2CR	arch/powerpc/include/asm/processor.h	/^#define SPRN_L2CR	/;"	d
SPRN_L2CSR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_L2CSR0	/;"	d
SPRN_L2CSR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_L2CSR1	/;"	d
SPRN_LDSTCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_LDSTCR	/;"	d
SPRN_LR	arch/powerpc/include/asm/processor.h	/^#define SPRN_LR	/;"	d
SPRN_MAS0	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS0	/;"	d
SPRN_MAS1	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS1	/;"	d
SPRN_MAS2	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS2	/;"	d
SPRN_MAS3	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS3	/;"	d
SPRN_MAS4	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS4	/;"	d
SPRN_MAS5	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS5	/;"	d
SPRN_MAS6	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS6	/;"	d
SPRN_MAS7	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS7	/;"	d
SPRN_MAS8	arch/powerpc/include/asm/processor.h	/^#define SPRN_MAS8	/;"	d
SPRN_MBAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_MBAR	/;"	d
SPRN_MCAR	arch/powerpc/include/asm/processor.h	/^#define SPRN_MCAR	/;"	d
SPRN_MCSR	arch/powerpc/include/asm/processor.h	/^#define SPRN_MCSR	/;"	d
SPRN_MCSRR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_MCSRR0	/;"	d
SPRN_MCSRR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_MCSRR1	/;"	d
SPRN_MMCR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_MMCR0	/;"	d
SPRN_MMCR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_MMCR1	/;"	d
SPRN_MMUCFG	arch/powerpc/include/asm/processor.h	/^#define SPRN_MMUCFG	/;"	d
SPRN_MMUCR	arch/powerpc/include/asm/processor.h	/^#define	SPRN_MMUCR	/;"	d
SPRN_MMUCSR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_MMUCSR0	/;"	d
SPRN_MSSCR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_MSSCR0	/;"	d
SPRN_MSSSR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_MSSSR0	/;"	d
SPRN_PBL1	arch/powerpc/include/asm/processor.h	/^#define SPRN_PBL1	/;"	d
SPRN_PBL2	arch/powerpc/include/asm/processor.h	/^#define SPRN_PBL2	/;"	d
SPRN_PBU1	arch/powerpc/include/asm/processor.h	/^#define SPRN_PBU1	/;"	d
SPRN_PBU2	arch/powerpc/include/asm/processor.h	/^#define SPRN_PBU2	/;"	d
SPRN_PID	arch/powerpc/include/asm/processor.h	/^#define SPRN_PID	/;"	d
SPRN_PID1	arch/powerpc/include/asm/processor.h	/^#define SPRN_PID1	/;"	d
SPRN_PID2	arch/powerpc/include/asm/processor.h	/^#define SPRN_PID2	/;"	d
SPRN_PIR	arch/powerpc/include/asm/processor.h	/^#define SPRN_PIR	/;"	d
SPRN_PIT	arch/powerpc/include/asm/processor.h	/^#define SPRN_PIT	/;"	d
SPRN_PMC1	arch/powerpc/include/asm/processor.h	/^#define SPRN_PMC1	/;"	d
SPRN_PMC2	arch/powerpc/include/asm/processor.h	/^#define SPRN_PMC2	/;"	d
SPRN_PMC3	arch/powerpc/include/asm/processor.h	/^#define SPRN_PMC3	/;"	d
SPRN_PMC4	arch/powerpc/include/asm/processor.h	/^#define SPRN_PMC4	/;"	d
SPRN_PVR	arch/powerpc/include/asm/processor.h	/^#define SPRN_PVR	/;"	d
SPRN_RPA	arch/powerpc/include/asm/processor.h	/^#define SPRN_RPA	/;"	d
SPRN_RSTCFG	arch/powerpc/include/asm/processor.h	/^#define	SPRN_RSTCFG	/;"	d
SPRN_SDA	arch/powerpc/include/asm/processor.h	/^#define SPRN_SDA	/;"	d
SPRN_SDR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_SDR1	/;"	d
SPRN_SGR	arch/powerpc/include/asm/processor.h	/^#define SPRN_SGR	/;"	d
SPRN_SIA	arch/powerpc/include/asm/processor.h	/^#define SPRN_SIA	/;"	d
SPRN_SPEFSCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPEFSCR	/;"	d
SPRN_SPRG0	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG0	/;"	d
SPRN_SPRG1	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG1	/;"	d
SPRN_SPRG2	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG2	/;"	d
SPRN_SPRG3	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG3	/;"	d
SPRN_SPRG4	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG4	/;"	d
SPRN_SPRG4R	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG4R	/;"	d
SPRN_SPRG4W	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG4W	/;"	d
SPRN_SPRG5	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG5	/;"	d
SPRN_SPRG5R	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG5R	/;"	d
SPRN_SPRG5W	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG5W	/;"	d
SPRN_SPRG6	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG6	/;"	d
SPRN_SPRG6R	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG6R	/;"	d
SPRN_SPRG6W	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG6W	/;"	d
SPRN_SPRG7	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG7	/;"	d
SPRN_SPRG7R	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG7R	/;"	d
SPRN_SPRG7W	arch/powerpc/include/asm/processor.h	/^#define SPRN_SPRG7W	/;"	d
SPRN_SRR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_SRR0	/;"	d
SPRN_SRR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_SRR1	/;"	d
SPRN_SRR2	arch/powerpc/include/asm/processor.h	/^#define SPRN_SRR2	/;"	d
SPRN_SRR3	arch/powerpc/include/asm/processor.h	/^#define SPRN_SRR3	/;"	d
SPRN_SVR	arch/powerpc/include/asm/processor.h	/^#define SPRN_SVR	/;"	d
SPRN_TBHI	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBHI	/;"	d
SPRN_TBHU	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBHU	/;"	d
SPRN_TBLO	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBLO	/;"	d
SPRN_TBLU	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBLU	/;"	d
SPRN_TBRL	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBRL	/;"	d
SPRN_TBRU	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBRU	/;"	d
SPRN_TBWL	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBWL	/;"	d
SPRN_TBWU	arch/powerpc/include/asm/processor.h	/^#define SPRN_TBWU	/;"	d
SPRN_TCR	arch/powerpc/include/asm/processor.h	/^#define SPRN_TCR	/;"	d
SPRN_THRM1	arch/powerpc/include/asm/processor.h	/^#define SPRN_THRM1	/;"	d
SPRN_THRM2	arch/powerpc/include/asm/processor.h	/^#define SPRN_THRM2	/;"	d
SPRN_THRM3	arch/powerpc/include/asm/processor.h	/^#define SPRN_THRM3	/;"	d
SPRN_TLB0CFG	arch/powerpc/include/asm/processor.h	/^#define SPRN_TLB0CFG	/;"	d
SPRN_TLB0PS	arch/powerpc/include/asm/processor.h	/^#define SPRN_TLB0PS	/;"	d
SPRN_TLB1CFG	arch/powerpc/include/asm/processor.h	/^#define SPRN_TLB1CFG	/;"	d
SPRN_TLB1PS	arch/powerpc/include/asm/processor.h	/^#define SPRN_TLB1PS	/;"	d
SPRN_TLBMISS	arch/powerpc/include/asm/processor.h	/^#define SPRN_TLBMISS	/;"	d
SPRN_TSR	arch/powerpc/include/asm/processor.h	/^#define SPRN_TSR	/;"	d
SPRN_UMMCR0	arch/powerpc/include/asm/processor.h	/^#define SPRN_UMMCR0	/;"	d
SPRN_UMMCR1	arch/powerpc/include/asm/processor.h	/^#define SPRN_UMMCR1	/;"	d
SPRN_UPMC1	arch/powerpc/include/asm/processor.h	/^#define SPRN_UPMC1	/;"	d
SPRN_UPMC2	arch/powerpc/include/asm/processor.h	/^#define SPRN_UPMC2	/;"	d
SPRN_UPMC3	arch/powerpc/include/asm/processor.h	/^#define SPRN_UPMC3	/;"	d
SPRN_UPMC4	arch/powerpc/include/asm/processor.h	/^#define SPRN_UPMC4	/;"	d
SPRN_USIA	arch/powerpc/include/asm/processor.h	/^#define SPRN_USIA	/;"	d
SPRN_USPRG0	arch/powerpc/include/asm/processor.h	/^#define SPRN_USPRG0	/;"	d
SPRN_XER	arch/powerpc/include/asm/processor.h	/^#define SPRN_XER	/;"	d
SPRN_ZPR	arch/powerpc/include/asm/processor.h	/^#define SPRN_ZPR	/;"	d
SPRRI	arch/sh/include/asm/cpu_sh7722.h	/^#define SPRRI /;"	d
SPR_5121E	arch/powerpc/include/asm/immap_512x.h	/^#define SPR_5121E	/;"	d
SPR_8308	include/mpc83xx.h	/^#define SPR_8308	/;"	d
SPR_8309	include/mpc83xx.h	/^#define SPR_8309	/;"	d
SPR_8311	include/mpc83xx.h	/^#define SPR_8311	/;"	d
SPR_8313	include/mpc83xx.h	/^#define SPR_8313	/;"	d
SPR_8314	include/mpc83xx.h	/^#define SPR_8314	/;"	d
SPR_8315	include/mpc83xx.h	/^#define SPR_8315	/;"	d
SPR_831X_FAMILY	include/mpc83xx.h	/^#define SPR_831X_FAMILY	/;"	d
SPR_8321	include/mpc83xx.h	/^#define SPR_8321	/;"	d
SPR_8323	include/mpc83xx.h	/^#define SPR_8323	/;"	d
SPR_832X_FAMILY	include/mpc83xx.h	/^#define SPR_832X_FAMILY	/;"	d
SPR_8343	include/mpc83xx.h	/^#define SPR_8343	/;"	d
SPR_8347_PBGA_	include/mpc83xx.h	/^#define SPR_8347_PBGA_	/;"	d
SPR_8347_TBGA_	include/mpc83xx.h	/^#define SPR_8347_TBGA_	/;"	d
SPR_8349	include/mpc83xx.h	/^#define SPR_8349	/;"	d
SPR_834X_FAMILY	include/mpc83xx.h	/^#define SPR_834X_FAMILY	/;"	d
SPR_8358_PBGA_	include/mpc83xx.h	/^#define SPR_8358_PBGA_	/;"	d
SPR_8358_TBGA_	include/mpc83xx.h	/^#define SPR_8358_TBGA_	/;"	d
SPR_8360	include/mpc83xx.h	/^#define SPR_8360	/;"	d
SPR_836X_FAMILY	include/mpc83xx.h	/^#define SPR_836X_FAMILY	/;"	d
SPR_8377	include/mpc83xx.h	/^#define SPR_8377	/;"	d
SPR_8378	include/mpc83xx.h	/^#define SPR_8378	/;"	d
SPR_8379	include/mpc83xx.h	/^#define SPR_8379	/;"	d
SPR_837X_FAMILY	include/mpc83xx.h	/^#define SPR_837X_FAMILY	/;"	d
SPR_AECR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_AECR	/;"	d
SPR_AESR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_AESR	/;"	d
SPR_AVR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_AVR	/;"	d
SPR_BAR	include/bedbug/regs.h	/^#define SPR_BAR	/;"	d
SPR_CCR0	include/bedbug/regs.h	/^#define SPR_CCR0 /;"	d
SPR_CMPA	include/bedbug/regs.h	/^#define SPR_CMPA	/;"	d
SPR_CMPB	include/bedbug/regs.h	/^#define SPR_CMPB	/;"	d
SPR_CMPC	include/bedbug/regs.h	/^#define SPR_CMPC	/;"	d
SPR_CMPD	include/bedbug/regs.h	/^#define SPR_CMPD	/;"	d
SPR_CMPE	include/bedbug/regs.h	/^#define SPR_CMPE	/;"	d
SPR_CMPF	include/bedbug/regs.h	/^#define SPR_CMPF	/;"	d
SPR_CMPG	include/bedbug/regs.h	/^#define SPR_CMPG	/;"	d
SPR_CMPH	include/bedbug/regs.h	/^#define SPR_CMPH	/;"	d
SPR_COUNTA	include/bedbug/regs.h	/^#define SPR_COUNTA	/;"	d
SPR_COUNTB	include/bedbug/regs.h	/^#define SPR_COUNTB	/;"	d
SPR_CPUCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR	/;"	d
SPR_CPUCFGR_AECSRP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_AECSRP	/;"	d
SPR_CPUCFGR_AVRP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_AVRP	/;"	d
SPR_CPUCFGR_CGF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_CGF	/;"	d
SPR_CPUCFGR_EVBARP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_EVBARP	/;"	d
SPR_CPUCFGR_ISRP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_ISRP	/;"	d
SPR_CPUCFGR_ND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_ND	/;"	d
SPR_CPUCFGR_NSGF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_NSGF	/;"	d
SPR_CPUCFGR_OB32S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_OB32S	/;"	d
SPR_CPUCFGR_OB64S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_OB64S	/;"	d
SPR_CPUCFGR_OF32S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_OF32S	/;"	d
SPR_CPUCFGR_OF64S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_OF64S	/;"	d
SPR_CPUCFGR_OV64S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_OV64S	/;"	d
SPR_CPUCFGR_RES	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_CPUCFGR_RES	/;"	d
SPR_CR	include/bedbug/regs.h	/^#define SPR_CR	/;"	d
SPR_CTR	include/bedbug/regs.h	/^#define SPR_CTR	/;"	d
SPR_DAC1	include/bedbug/regs.h	/^#define SPR_DAC1 /;"	d
SPR_DAC2	include/bedbug/regs.h	/^#define SPR_DAC2 /;"	d
SPR_DAR	include/bedbug/regs.h	/^#define SPR_DAR	/;"	d
SPR_DBCR0	include/bedbug/regs.h	/^#define SPR_DBCR0 /;"	d
SPR_DBCR1	include/bedbug/regs.h	/^#define SPR_DBCR1 /;"	d
SPR_DBSR	include/bedbug/regs.h	/^#define SPR_DBSR /;"	d
SPR_DCBFR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCBFR	/;"	d
SPR_DCBIR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCBIR	/;"	d
SPR_DCBLR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCBLR	/;"	d
SPR_DCBPR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCBPR	/;"	d
SPR_DCBWR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCBWR	/;"	d
SPR_DCCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR	/;"	d
SPR_DCCFGR_CBFRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBFRI	/;"	d
SPR_DCCFGR_CBIRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBIRI	/;"	d
SPR_DCCFGR_CBLRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBLRI	/;"	d
SPR_DCCFGR_CBPRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBPRI	/;"	d
SPR_DCCFGR_CBS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBS	/;"	d
SPR_DCCFGR_CBS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBS_OFF	/;"	d
SPR_DCCFGR_CBWBRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CBWBRI	/;"	d
SPR_DCCFGR_CCRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CCRI	/;"	d
SPR_DCCFGR_CWS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_CWS	/;"	d
SPR_DCCFGR_NCS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_NCS	/;"	d
SPR_DCCFGR_NCS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_NCS_OFF	/;"	d
SPR_DCCFGR_NCW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_NCW	/;"	d
SPR_DCCFGR_NCW_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCFGR_NCW_OFF	/;"	d
SPR_DCCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCR	/;"	d
SPR_DCCR	include/bedbug/regs.h	/^#define SPR_DCCR /;"	d
SPR_DCCR_EW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCCR_EW	/;"	d
SPR_DCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR	/;"	d
SPR_DCFGR_NDP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP	/;"	d
SPR_DCFGR_NDP1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP1	/;"	d
SPR_DCFGR_NDP2	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP2	/;"	d
SPR_DCFGR_NDP3	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP3	/;"	d
SPR_DCFGR_NDP4	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP4	/;"	d
SPR_DCFGR_NDP5	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP5	/;"	d
SPR_DCFGR_NDP6	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP6	/;"	d
SPR_DCFGR_NDP7	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP7	/;"	d
SPR_DCFGR_NDP8	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_NDP8	/;"	d
SPR_DCFGR_WPCI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCFGR_WPCI	/;"	d
SPR_DCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR(/;"	d
SPR_DCR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_BASE(/;"	d
SPR_DCR_CC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC	/;"	d
SPR_DCR_CC_EQUAL	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_EQUAL	/;"	d
SPR_DCR_CC_GREAT	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_GREAT	/;"	d
SPR_DCR_CC_GREATE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_GREATE	/;"	d
SPR_DCR_CC_LESS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_LESS	/;"	d
SPR_DCR_CC_LESSE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_LESSE	/;"	d
SPR_DCR_CC_MASKED	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_MASKED	/;"	d
SPR_DCR_CC_NEQUAL	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CC_NEQUAL	/;"	d
SPR_DCR_CT	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT	/;"	d
SPR_DCR_CT_DISABLED	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_DISABLED	/;"	d
SPR_DCR_CT_IFEA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_IFEA	/;"	d
SPR_DCR_CT_LD	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_LD	/;"	d
SPR_DCR_CT_LEA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_LEA	/;"	d
SPR_DCR_CT_LSD	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_LSD	/;"	d
SPR_DCR_CT_LSEA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_LSEA	/;"	d
SPR_DCR_CT_SD	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_SD	/;"	d
SPR_DCR_CT_SEA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_CT_SEA	/;"	d
SPR_DCR_DP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_DP	/;"	d
SPR_DCR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_LAST(/;"	d
SPR_DCR_SC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DCR_SC	/;"	d
SPR_DCWR	include/bedbug/regs.h	/^#define SPR_DCWR /;"	d
SPR_DC_ADR	include/bedbug/regs.h	/^#define SPR_DC_ADR	/;"	d
SPR_DC_CST	include/bedbug/regs.h	/^#define SPR_DC_CST	/;"	d
SPR_DC_DAT	include/bedbug/regs.h	/^#define SPR_DC_DAT	/;"	d
SPR_DEAR	include/bedbug/regs.h	/^#define SPR_DEAR /;"	d
SPR_DEC	include/bedbug/regs.h	/^#define SPR_DEC	/;"	d
SPR_DEFS__H	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DEFS__H$/;"	d
SPR_DER	include/bedbug/regs.h	/^#define SPR_DER	/;"	d
SPR_DMMUCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR	/;"	d
SPR_DMMUCFGR_CRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_CRI	/;"	d
SPR_DMMUCFGR_HTR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_HTR	/;"	d
SPR_DMMUCFGR_NAE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_NAE	/;"	d
SPR_DMMUCFGR_NTS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_NTS	/;"	d
SPR_DMMUCFGR_NTS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_NTS_OFF	/;"	d
SPR_DMMUCFGR_NTW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_NTW	/;"	d
SPR_DMMUCFGR_NTW_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_NTW_OFF	/;"	d
SPR_DMMUCFGR_PRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_PRI	/;"	d
SPR_DMMUCFGR_TEIRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCFGR_TEIRI	/;"	d
SPR_DMMUCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCR	/;"	d
SPR_DMMUCR_P1S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCR_P1S	/;"	d
SPR_DMMUCR_P2S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCR_P2S	/;"	d
SPR_DMMUCR_PADDR_WIDTH	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCR_PADDR_WIDTH	/;"	d
SPR_DMMUCR_VADDR_WIDTH	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMMUCR_VADDR_WIDTH	/;"	d
SPR_DMR1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1	/;"	d
SPR_DMR1_BT	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_BT	/;"	d
SPR_DMR1_CW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW	/;"	d
SPR_DMR1_CW0	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW0	/;"	d
SPR_DMR1_CW0_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW0_AND	/;"	d
SPR_DMR1_CW0_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW0_OR	/;"	d
SPR_DMR1_CW1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW1	/;"	d
SPR_DMR1_CW1_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW1_AND	/;"	d
SPR_DMR1_CW1_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW1_OR	/;"	d
SPR_DMR1_CW2	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW2	/;"	d
SPR_DMR1_CW2_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW2_AND	/;"	d
SPR_DMR1_CW2_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW2_OR	/;"	d
SPR_DMR1_CW3	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW3	/;"	d
SPR_DMR1_CW3_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW3_AND	/;"	d
SPR_DMR1_CW3_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW3_OR	/;"	d
SPR_DMR1_CW4	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW4	/;"	d
SPR_DMR1_CW4_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW4_AND	/;"	d
SPR_DMR1_CW4_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW4_OR	/;"	d
SPR_DMR1_CW5	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW5	/;"	d
SPR_DMR1_CW5_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW5_AND	/;"	d
SPR_DMR1_CW5_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW5_OR	/;"	d
SPR_DMR1_CW6	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW6	/;"	d
SPR_DMR1_CW6_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW6_AND	/;"	d
SPR_DMR1_CW6_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW6_OR	/;"	d
SPR_DMR1_CW7	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW7	/;"	d
SPR_DMR1_CW7_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW7_AND	/;"	d
SPR_DMR1_CW7_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW7_OR	/;"	d
SPR_DMR1_CW8	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW8	/;"	d
SPR_DMR1_CW8_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW8_AND	/;"	d
SPR_DMR1_CW8_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW8_OR	/;"	d
SPR_DMR1_CW9	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW9	/;"	d
SPR_DMR1_CW9_AND	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW9_AND	/;"	d
SPR_DMR1_CW9_OR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_CW9_OR	/;"	d
SPR_DMR1_RES1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_RES1	/;"	d
SPR_DMR1_RES2	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_RES2	/;"	d
SPR_DMR1_ST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR1_ST	/;"	d
SPR_DMR2	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2	/;"	d
SPR_DMR2_AWTC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_AWTC	/;"	d
SPR_DMR2_AWTC_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_AWTC_OFF	/;"	d
SPR_DMR2_WBS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_WBS	/;"	d
SPR_DMR2_WBS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_WBS_OFF	/;"	d
SPR_DMR2_WCE0	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_WCE0	/;"	d
SPR_DMR2_WCE1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_WCE1	/;"	d
SPR_DMR2_WGB	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_WGB	/;"	d
SPR_DMR2_WGB_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DMR2_WGB_OFF	/;"	d
SPR_DPDR	include/bedbug/regs.h	/^#define SPR_DPDR	/;"	d
SPR_DRR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR	/;"	d
SPR_DRR_AE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_AE	/;"	d
SPR_DRR_BUSEE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_BUSEE	/;"	d
SPR_DRR_DME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_DME	/;"	d
SPR_DRR_DPFE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_DPFE	/;"	d
SPR_DRR_FPE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_FPE	/;"	d
SPR_DRR_IE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_IE	/;"	d
SPR_DRR_IIE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_IIE	/;"	d
SPR_DRR_IME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_IME	/;"	d
SPR_DRR_IPFE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_IPFE	/;"	d
SPR_DRR_RE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_RE	/;"	d
SPR_DRR_RSTE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_RSTE	/;"	d
SPR_DRR_SCE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_SCE	/;"	d
SPR_DRR_TE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_TE	/;"	d
SPR_DRR_TTE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DRR_TTE	/;"	d
SPR_DSISR	include/bedbug/regs.h	/^#define SPR_DSISR	/;"	d
SPR_DSR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR	/;"	d
SPR_DSR_AE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_AE	/;"	d
SPR_DSR_BUSEE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_BUSEE	/;"	d
SPR_DSR_DME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_DME	/;"	d
SPR_DSR_DPFE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_DPFE	/;"	d
SPR_DSR_FPE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_FPE	/;"	d
SPR_DSR_IE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_IE	/;"	d
SPR_DSR_IIE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_IIE	/;"	d
SPR_DSR_IME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_IME	/;"	d
SPR_DSR_IPFE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_IPFE	/;"	d
SPR_DSR_RE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_RE	/;"	d
SPR_DSR_RSTE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_RSTE	/;"	d
SPR_DSR_SCE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_SCE	/;"	d
SPR_DSR_TE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_TE	/;"	d
SPR_DSR_TTE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DSR_TTE	/;"	d
SPR_DTLBEIR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBEIR	/;"	d
SPR_DTLBMR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_BASE(/;"	d
SPR_DTLBMR_CID	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_CID	/;"	d
SPR_DTLBMR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_LAST(/;"	d
SPR_DTLBMR_LRU	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_LRU	/;"	d
SPR_DTLBMR_PL1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_PL1	/;"	d
SPR_DTLBMR_V	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_V	/;"	d
SPR_DTLBMR_VPN	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBMR_VPN	/;"	d
SPR_DTLBTR_A	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_A	/;"	d
SPR_DTLBTR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_BASE(/;"	d
SPR_DTLBTR_CC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_CC	/;"	d
SPR_DTLBTR_CI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_CI	/;"	d
SPR_DTLBTR_D	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_D	/;"	d
SPR_DTLBTR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_LAST(/;"	d
SPR_DTLBTR_PPN	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_PPN	/;"	d
SPR_DTLBTR_SRE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_SRE	/;"	d
SPR_DTLBTR_SWE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_SWE	/;"	d
SPR_DTLBTR_URE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_URE	/;"	d
SPR_DTLBTR_UWE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_UWE	/;"	d
SPR_DTLBTR_WBC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_WBC	/;"	d
SPR_DTLBTR_WOM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DTLBTR_WOM	/;"	d
SPR_DVC1	include/bedbug/regs.h	/^#define SPR_DVC1 /;"	d
SPR_DVC2	include/bedbug/regs.h	/^#define SPR_DVC2 /;"	d
SPR_DVR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DVR(/;"	d
SPR_DWCR0	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DWCR0	/;"	d
SPR_DWCR1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DWCR1	/;"	d
SPR_DWCR_COUNT	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DWCR_COUNT	/;"	d
SPR_DWCR_MATCH	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DWCR_MATCH	/;"	d
SPR_DWCR_MATCH_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_DWCR_MATCH_OFF	/;"	d
SPR_EAR	include/bedbug/regs.h	/^#define SPR_EAR /;"	d
SPR_EEAR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_EEAR_BASE	/;"	d
SPR_EEAR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_EEAR_LAST	/;"	d
SPR_EID	include/bedbug/regs.h	/^#define SPR_EID	/;"	d
SPR_EIE	include/bedbug/regs.h	/^#define SPR_EIE	/;"	d
SPR_EPCR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_EPCR_BASE	/;"	d
SPR_EPCR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_EPCR_LAST	/;"	d
SPR_ESR	include/bedbug/regs.h	/^#define SPR_ESR /;"	d
SPR_ESR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ESR_BASE	/;"	d
SPR_ESR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ESR_LAST	/;"	d
SPR_EVBAR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_EVBAR	/;"	d
SPR_EVPR	include/bedbug/regs.h	/^#define SPR_EVPR /;"	d
SPR_FAMILY	include/mpc83xx.h	/^#define SPR_FAMILY(/;"	d
SPR_FPCSR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR	/;"	d
SPR_FPCSR_ALLF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_ALLF	/;"	d
SPR_FPCSR_DZF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_DZF	/;"	d
SPR_FPCSR_FPEE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_FPEE	/;"	d
SPR_FPCSR_INF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_INF	/;"	d
SPR_FPCSR_IVF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_IVF	/;"	d
SPR_FPCSR_IXF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_IXF	/;"	d
SPR_FPCSR_OVF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_OVF	/;"	d
SPR_FPCSR_QNF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_QNF	/;"	d
SPR_FPCSR_RM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_RM	/;"	d
SPR_FPCSR_SNF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_SNF	/;"	d
SPR_FPCSR_UNF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_UNF	/;"	d
SPR_FPCSR_ZF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_FPCSR_ZF	/;"	d
SPR_GPR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_GPR_BASE	/;"	d
SPR_IABR	include/bedbug/regs.h	/^#define SPR_IABR /;"	d
SPR_IAC1	include/bedbug/regs.h	/^#define SPR_IAC1 /;"	d
SPR_IAC2	include/bedbug/regs.h	/^#define SPR_IAC2 /;"	d
SPR_IAC3	include/bedbug/regs.h	/^#define SPR_IAC3 /;"	d
SPR_IAC4	include/bedbug/regs.h	/^#define SPR_IAC4 /;"	d
SPR_ICBIR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICBIR	/;"	d
SPR_ICBLR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICBLR	/;"	d
SPR_ICBPR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICBPR	/;"	d
SPR_ICCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR	/;"	d
SPR_ICCFGR_CBIRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_CBIRI	/;"	d
SPR_ICCFGR_CBLRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_CBLRI	/;"	d
SPR_ICCFGR_CBPRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_CBPRI	/;"	d
SPR_ICCFGR_CBS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_CBS	/;"	d
SPR_ICCFGR_CBS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_CBS_OFF	/;"	d
SPR_ICCFGR_CCRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_CCRI	/;"	d
SPR_ICCFGR_NCS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_NCS	/;"	d
SPR_ICCFGR_NCS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_NCS_OFF	/;"	d
SPR_ICCFGR_NCW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_NCW	/;"	d
SPR_ICCFGR_NCW_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCFGR_NCW_OFF	/;"	d
SPR_ICCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCR	/;"	d
SPR_ICCR	include/bedbug/regs.h	/^#define SPR_ICCR /;"	d
SPR_ICCR_EW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICCR_EW	/;"	d
SPR_ICDBDR	include/bedbug/regs.h	/^#define SPR_ICDBDR /;"	d
SPR_ICR	include/bedbug/regs.h	/^#define SPR_ICR	/;"	d
SPR_ICR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICR_BASE(/;"	d
SPR_ICR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ICR_LAST(/;"	d
SPR_ICTRL	include/bedbug/regs.h	/^#define SPR_ICTRL	/;"	d
SPR_IC_ADR	include/bedbug/regs.h	/^#define SPR_IC_ADR	/;"	d
SPR_IC_CST	include/bedbug/regs.h	/^#define SPR_IC_CST	/;"	d
SPR_IC_DAT	include/bedbug/regs.h	/^#define SPR_IC_DAT	/;"	d
SPR_IMMR	include/bedbug/regs.h	/^#define SPR_IMMR	/;"	d
SPR_IMMUCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR	/;"	d
SPR_IMMUCFGR_CRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_CRI	/;"	d
SPR_IMMUCFGR_HTR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_HTR	/;"	d
SPR_IMMUCFGR_NAE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_NAE	/;"	d
SPR_IMMUCFGR_NTS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_NTS	/;"	d
SPR_IMMUCFGR_NTS_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_NTS_OFF	/;"	d
SPR_IMMUCFGR_NTW	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_NTW	/;"	d
SPR_IMMUCFGR_NTW_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_NTW_OFF	/;"	d
SPR_IMMUCFGR_PRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_PRI	/;"	d
SPR_IMMUCFGR_TEIRI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCFGR_TEIRI	/;"	d
SPR_IMMUCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCR	/;"	d
SPR_IMMUCR_P1S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCR_P1S	/;"	d
SPR_IMMUCR_P2S	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCR_P2S	/;"	d
SPR_IMMUCR_PADDR_WIDTH	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCR_PADDR_WIDTH	/;"	d
SPR_IMMUCR_VADDR_WIDTH	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_IMMUCR_VADDR_WIDTH	/;"	d
SPR_ITLBEIR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBEIR	/;"	d
SPR_ITLBMR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_BASE(/;"	d
SPR_ITLBMR_CID	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_CID	/;"	d
SPR_ITLBMR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_LAST(/;"	d
SPR_ITLBMR_LRU	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_LRU	/;"	d
SPR_ITLBMR_PL1	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_PL1	/;"	d
SPR_ITLBMR_V	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_V	/;"	d
SPR_ITLBMR_VPN	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBMR_VPN	/;"	d
SPR_ITLBTR_A	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_A	/;"	d
SPR_ITLBTR_BASE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_BASE(/;"	d
SPR_ITLBTR_CC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_CC	/;"	d
SPR_ITLBTR_CI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_CI	/;"	d
SPR_ITLBTR_D	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_D	/;"	d
SPR_ITLBTR_LAST	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_LAST(/;"	d
SPR_ITLBTR_PPN	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_PPN	/;"	d
SPR_ITLBTR_SXE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_SXE	/;"	d
SPR_ITLBTR_UXE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_UXE	/;"	d
SPR_ITLBTR_WBC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_WBC	/;"	d
SPR_ITLBTR_WOM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_ITLBTR_WOM	/;"	d
SPR_LCTRL1	include/bedbug/regs.h	/^#define SPR_LCTRL1	/;"	d
SPR_LCTRL2	include/bedbug/regs.h	/^#define SPR_LCTRL2	/;"	d
SPR_LR	include/bedbug/regs.h	/^#define SPR_LR	/;"	d
SPR_MACHI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_MACHI	/;"	d
SPR_MACLO	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_MACLO	/;"	d
SPR_MD_AP	include/bedbug/regs.h	/^#define SPR_MD_AP	/;"	d
SPR_MD_CTR	include/bedbug/regs.h	/^#define SPR_MD_CTR	/;"	d
SPR_MD_DBCAM	include/bedbug/regs.h	/^#define SPR_MD_DBCAM	/;"	d
SPR_MD_DBRAM0	include/bedbug/regs.h	/^#define SPR_MD_DBRAM0	/;"	d
SPR_MD_DBRAM1	include/bedbug/regs.h	/^#define SPR_MD_DBRAM1	/;"	d
SPR_MD_EPN	include/bedbug/regs.h	/^#define SPR_MD_EPN	/;"	d
SPR_MD_RPN	include/bedbug/regs.h	/^#define SPR_MD_RPN	/;"	d
SPR_MD_TWC	include/bedbug/regs.h	/^#define SPR_MD_TWC	/;"	d
SPR_MI_AP	include/bedbug/regs.h	/^#define SPR_MI_AP	/;"	d
SPR_MI_CTR	include/bedbug/regs.h	/^#define SPR_MI_CTR	/;"	d
SPR_MI_DBCAM	include/bedbug/regs.h	/^#define SPR_MI_DBCAM	/;"	d
SPR_MI_DBRAM0	include/bedbug/regs.h	/^#define SPR_MI_DBRAM0	/;"	d
SPR_MI_DBRAM1	include/bedbug/regs.h	/^#define SPR_MI_DBRAM1	/;"	d
SPR_MI_EPN	include/bedbug/regs.h	/^#define SPR_MI_EPN	/;"	d
SPR_MI_RPN	include/bedbug/regs.h	/^#define SPR_MI_RPN	/;"	d
SPR_MI_TWC	include/bedbug/regs.h	/^#define SPR_MI_TWC	/;"	d
SPR_MSR	include/bedbug/regs.h	/^#define SPR_MSR	/;"	d
SPR_M_CASID	include/bedbug/regs.h	/^#define SPR_M_CASID	/;"	d
SPR_M_TW	include/bedbug/regs.h	/^#define SPR_M_TW	/;"	d
SPR_M_TWB	include/bedbug/regs.h	/^#define SPR_M_TWB	/;"	d
SPR_NPC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_NPC	/;"	d
SPR_PCCFGR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCCFGR	/;"	d
SPR_PCCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCCR(/;"	d
SPR_PCMR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR(/;"	d
SPR_PCMR_BS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_BS	/;"	d
SPR_PCMR_CISM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_CISM	/;"	d
SPR_PCMR_CIUM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_CIUM	/;"	d
SPR_PCMR_CP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_CP	/;"	d
SPR_PCMR_DCM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_DCM	/;"	d
SPR_PCMR_DDS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_DDS	/;"	d
SPR_PCMR_DTLBM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_DTLBM	/;"	d
SPR_PCMR_ICM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_ICM	/;"	d
SPR_PCMR_IF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_IF	/;"	d
SPR_PCMR_IFS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_IFS	/;"	d
SPR_PCMR_ITLBM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_ITLBM	/;"	d
SPR_PCMR_LA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_LA	/;"	d
SPR_PCMR_LSUS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_LSUS	/;"	d
SPR_PCMR_SA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_SA	/;"	d
SPR_PCMR_UMRA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_UMRA	/;"	d
SPR_PCMR_WPE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PCMR_WPE	/;"	d
SPR_PICMR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PICMR	/;"	d
SPR_PICMR_IUM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PICMR_IUM	/;"	d
SPR_PICPR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PICPR	/;"	d
SPR_PICPR_IPRIO	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PICPR_IPRIO	/;"	d
SPR_PICSR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PICSR	/;"	d
SPR_PICSR_IS	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PICSR_IS	/;"	d
SPR_PID	include/bedbug/regs.h	/^#define SPR_PID /;"	d
SPR_PIT	include/bedbug/regs.h	/^#define SPR_PIT /;"	d
SPR_PMR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PMR	/;"	d
SPR_PMR_DCGE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PMR_DCGE	/;"	d
SPR_PMR_DME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PMR_DME	/;"	d
SPR_PMR_SDF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PMR_SDF	/;"	d
SPR_PMR_SME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PMR_SME	/;"	d
SPR_PMR_SUME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PMR_SUME	/;"	d
SPR_PPC	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_PPC	/;"	d
SPR_PVR	include/bedbug/regs.h	/^#define SPR_PVR	/;"	d
SPR_SGR	include/bedbug/regs.h	/^#define SPR_SGR /;"	d
SPR_SLER	include/bedbug/regs.h	/^#define SPR_SLER /;"	d
SPR_SPRG0	include/bedbug/regs.h	/^#define SPR_SPRG0	/;"	d
SPR_SPRG1	include/bedbug/regs.h	/^#define SPR_SPRG1	/;"	d
SPR_SPRG2	include/bedbug/regs.h	/^#define SPR_SPRG2	/;"	d
SPR_SPRG3	include/bedbug/regs.h	/^#define SPR_SPRG3	/;"	d
SPR_SPRG4	include/bedbug/regs.h	/^#define SPR_SPRG4 /;"	d
SPR_SPRG4_RO	include/bedbug/regs.h	/^#define SPR_SPRG4_RO /;"	d
SPR_SPRG5	include/bedbug/regs.h	/^#define SPR_SPRG5 /;"	d
SPR_SPRG5_RO	include/bedbug/regs.h	/^#define SPR_SPRG5_RO /;"	d
SPR_SPRG6	include/bedbug/regs.h	/^#define SPR_SPRG6 /;"	d
SPR_SPRG6_RO	include/bedbug/regs.h	/^#define SPR_SPRG6_RO /;"	d
SPR_SPRG7	include/bedbug/regs.h	/^#define SPR_SPRG7 /;"	d
SPR_SPRG7_RO	include/bedbug/regs.h	/^#define SPR_SPRG7_RO /;"	d
SPR_SR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR	/;"	d
SPR_SRR0	include/bedbug/regs.h	/^#define SPR_SRR0	/;"	d
SPR_SRR1	include/bedbug/regs.h	/^#define SPR_SRR1	/;"	d
SPR_SRR2	include/bedbug/regs.h	/^#define SPR_SRR2 /;"	d
SPR_SRR3	include/bedbug/regs.h	/^#define SPR_SRR3 /;"	d
SPR_SR_CE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_CE	/;"	d
SPR_SR_CID	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_CID	/;"	d
SPR_SR_CY	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_CY	/;"	d
SPR_SR_DCE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_DCE	/;"	d
SPR_SR_DME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_DME	/;"	d
SPR_SR_DSX	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_DSX	/;"	d
SPR_SR_EPH	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_EPH	/;"	d
SPR_SR_F	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_F	/;"	d
SPR_SR_FO	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_FO	/;"	d
SPR_SR_ICE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_ICE	/;"	d
SPR_SR_IEE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_IEE	/;"	d
SPR_SR_IME	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_IME	/;"	d
SPR_SR_LEE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_LEE	/;"	d
SPR_SR_OV	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_OV	/;"	d
SPR_SR_OVE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_OVE	/;"	d
SPR_SR_RES	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_RES	/;"	d
SPR_SR_SM	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_SM	/;"	d
SPR_SR_SUMRA	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_SUMRA	/;"	d
SPR_SR_TEE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_SR_TEE	/;"	d
SPR_SU0R	include/bedbug/regs.h	/^#define SPR_SU0R /;"	d
SPR_TBL	include/bedbug/regs.h	/^#define SPR_TBL /;"	d
SPR_TBU	include/bedbug/regs.h	/^#define SPR_TBU /;"	d
SPR_TCR	include/bedbug/regs.h	/^#define SPR_TCR /;"	d
SPR_TSR	include/bedbug/regs.h	/^#define SPR_TSR /;"	d
SPR_TTCR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTCR	/;"	d
SPR_TTCR_CNT	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTCR_CNT	/;"	d
SPR_TTMR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR	/;"	d
SPR_TTMR_CR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_CR	/;"	d
SPR_TTMR_DI	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_DI	/;"	d
SPR_TTMR_IE	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_IE	/;"	d
SPR_TTMR_IP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_IP	/;"	d
SPR_TTMR_M	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_M	/;"	d
SPR_TTMR_RT	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_RT	/;"	d
SPR_TTMR_SR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_SR	/;"	d
SPR_TTMR_TP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_TTMR_TP	/;"	d
SPR_UPR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR	/;"	d
SPR_UPR_CUP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_CUP	/;"	d
SPR_UPR_DCP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_DCP	/;"	d
SPR_UPR_DMP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_DMP	/;"	d
SPR_UPR_DUP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_DUP	/;"	d
SPR_UPR_ICP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_ICP	/;"	d
SPR_UPR_IMP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_IMP	/;"	d
SPR_UPR_MP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_MP	/;"	d
SPR_UPR_PCUP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_PCUP	/;"	d
SPR_UPR_PICP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_PICP	/;"	d
SPR_UPR_PMP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_PMP	/;"	d
SPR_UPR_RES	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_RES	/;"	d
SPR_UPR_TTP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_TTP	/;"	d
SPR_UPR_UP	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_UPR_UP	/;"	d
SPR_USPRG0	include/bedbug/regs.h	/^#define SPR_USPRG0 /;"	d
SPR_VR	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR	/;"	d
SPR_VR2	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR2	/;"	d
SPR_VR_CFG	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_CFG	/;"	d
SPR_VR_CFG_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_CFG_OFF	/;"	d
SPR_VR_RES	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_RES	/;"	d
SPR_VR_REV	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_REV	/;"	d
SPR_VR_REV_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_REV_OFF	/;"	d
SPR_VR_VER	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_VER	/;"	d
SPR_VR_VER_OFF	arch/openrisc/include/asm/spr-defs.h	/^#define SPR_VR_VER_OFF	/;"	d
SPR_XER	include/bedbug/regs.h	/^#define SPR_XER	/;"	d
SPR_ZPR	include/bedbug/regs.h	/^#define SPR_ZPR /;"	d
SPSCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SPSCR	/;"	d
SPSR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SPSR	/;"	d
SPSR_SPRFF	drivers/spi/sh_qspi.c	/^#define SPSR_SPRFF	/;"	d	file:
SPSR_SPTEF	drivers/spi/sh_qspi.c	/^#define SPSR_SPTEF	/;"	d	file:
SPSTS	arch/sh/include/asm/cpu_sh7722.h	/^#define SPSTS /;"	d
SPT0_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_CHNL /;"	d
SPT0_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MCMC1 /;"	d
SPT0_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MCMC2 /;"	d
SPT0_MRCS0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MRCS0 /;"	d
SPT0_MRCS1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MRCS1 /;"	d
SPT0_MRCS2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MRCS2 /;"	d
SPT0_MRCS3	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MRCS3 /;"	d
SPT0_MTCS0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MTCS0 /;"	d
SPT0_MTCS1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MTCS1 /;"	d
SPT0_MTCS2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MTCS2 /;"	d
SPT0_MTCS3	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_MTCS3 /;"	d
SPT0_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_RFSDIV /;"	d
SPT0_RSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_RSCLKDIV /;"	d
SPT0_RX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_RX /;"	d
SPT0_RX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_RX_CONFIG0 /;"	d
SPT0_RX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_RX_CONFIG1 /;"	d
SPT0_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_STAT /;"	d
SPT0_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_TFSDIV /;"	d
SPT0_TSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_TSCLKDIV /;"	d
SPT0_TX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_TX /;"	d
SPT0_TX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_TX_CONFIG0 /;"	d
SPT0_TX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT0_TX_CONFIG1 /;"	d
SPT1_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_CHNL /;"	d
SPT1_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MCMC1 /;"	d
SPT1_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MCMC2 /;"	d
SPT1_MRCS0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MRCS0 /;"	d
SPT1_MRCS1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MRCS1 /;"	d
SPT1_MRCS2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MRCS2 /;"	d
SPT1_MRCS3	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MRCS3 /;"	d
SPT1_MTCS0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MTCS0 /;"	d
SPT1_MTCS1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MTCS1 /;"	d
SPT1_MTCS2	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MTCS2 /;"	d
SPT1_MTCS3	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_MTCS3 /;"	d
SPT1_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_RFSDIV /;"	d
SPT1_RSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_RSCLKDIV /;"	d
SPT1_RX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_RX /;"	d
SPT1_RX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_RX_CONFIG0 /;"	d
SPT1_RX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_RX_CONFIG1 /;"	d
SPT1_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_STAT /;"	d
SPT1_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_TFSDIV /;"	d
SPT1_TSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_TSCLKDIV /;"	d
SPT1_TX	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_TX /;"	d
SPT1_TX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_TX_CONFIG0 /;"	d
SPT1_TX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SPT1_TX_CONFIG1 /;"	d
SPTBR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SPTBR	/;"	d
SPTIMER0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER0_RESET	/;"	d
SPTIMER1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIMER1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SPTIMER1_RESET	/;"	d
SPTIS	arch/sh/include/asm/cpu_sh7722.h	/^#define SPTIS /;"	d
SPURI	arch/sh/include/asm/cpu_sh7722.h	/^#define SPURI /;"	d
SPV_EVEN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,$/;"	e	enum:__anona3077f190103	file:
SPV_EVEN_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SPV_EVEN_MARK,$/;"	e	enum:__anona307945e0103	file:
SP_OPTIONS	drivers/mtd/nand/nand_ids.c	/^#define SP_OPTIONS /;"	d	file:
SP_OPTIONS16	drivers/mtd/nand/nand_ids.c	/^#define SP_OPTIONS16 /;"	d	file:
SP_REGNUM	arch/powerpc/lib/kgdb.c	/^#define SP_REGNUM /;"	d	file:
SQCLR	drivers/usb/host/r8a66597.h	/^#define	SQCLR	/;"	d
SQIN_EXT	drivers/crypto/fsl/desc.h	/^#define SQIN_EXT	/;"	d
SQIN_INL	drivers/crypto/fsl/desc.h	/^#define SQIN_INL	/;"	d
SQIN_LEN_MASK	drivers/crypto/fsl/desc.h	/^#define SQIN_LEN_MASK	/;"	d
SQIN_LEN_SHIFT	drivers/crypto/fsl/desc.h	/^#define SQIN_LEN_SHIFT	/;"	d
SQIN_PRE	drivers/crypto/fsl/desc.h	/^#define SQIN_PRE	/;"	d
SQIN_RBS	drivers/crypto/fsl/desc.h	/^#define SQIN_RBS	/;"	d
SQIN_RJD	drivers/crypto/fsl/desc.h	/^#define SQIN_RJD	/;"	d
SQIN_RTO	drivers/crypto/fsl/desc.h	/^#define SQIN_RTO	/;"	d
SQIN_SGF	drivers/crypto/fsl/desc.h	/^#define SQIN_SGF	/;"	d
SQMON	drivers/usb/host/r8a66597.h	/^#define	SQMON	/;"	d
SQNUM_WARN_WATERMARK	fs/ubifs/ubifs.h	/^#define SQNUM_WARN_WATERMARK /;"	d
SQNUM_WATERMARK	fs/ubifs/ubifs.h	/^#define SQNUM_WATERMARK /;"	d
SQOUT_EXT	drivers/crypto/fsl/desc.h	/^#define SQOUT_EXT	/;"	d
SQOUT_LEN_MASK	drivers/crypto/fsl/desc.h	/^#define SQOUT_LEN_MASK	/;"	d
SQOUT_LEN_SHIFT	drivers/crypto/fsl/desc.h	/^#define SQOUT_LEN_SHIFT	/;"	d
SQOUT_PRE	drivers/crypto/fsl/desc.h	/^#define SQOUT_PRE	/;"	d
SQOUT_RTO	drivers/crypto/fsl/desc.h	/^#define SQOUT_RTO	/;"	d
SQOUT_SGF	drivers/crypto/fsl/desc.h	/^#define SQOUT_SGF	/;"	d
SQSET	drivers/usb/host/r8a66597.h	/^#define	SQSET	/;"	d
SQUELCH_FFE_SETTING_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SQUELCH_FFE_SETTING_REG	/;"	d
SR0	arch/powerpc/include/asm/processor.h	/^#define SR0	/;"	d
SR1	arch/powerpc/include/asm/processor.h	/^#define SR1	/;"	d
SR10	arch/powerpc/include/asm/processor.h	/^#define SR10	/;"	d
SR11	arch/powerpc/include/asm/processor.h	/^#define SR11	/;"	d
SR12	arch/powerpc/include/asm/processor.h	/^#define SR12	/;"	d
SR13	arch/powerpc/include/asm/processor.h	/^#define SR13	/;"	d
SR14	arch/powerpc/include/asm/processor.h	/^#define SR14	/;"	d
SR15	arch/powerpc/include/asm/processor.h	/^#define SR15	/;"	d
SR2	arch/powerpc/include/asm/processor.h	/^#define SR2	/;"	d
SR3	arch/powerpc/include/asm/processor.h	/^#define SR3	/;"	d
SR4	arch/powerpc/include/asm/processor.h	/^#define SR4	/;"	d
SR5	arch/powerpc/include/asm/processor.h	/^#define SR5	/;"	d
SR6	arch/powerpc/include/asm/processor.h	/^#define SR6	/;"	d
SR7	arch/powerpc/include/asm/processor.h	/^#define SR7	/;"	d
SR8	arch/powerpc/include/asm/processor.h	/^#define SR8	/;"	d
SR9	arch/powerpc/include/asm/processor.h	/^#define SR9	/;"	d
SRACK	arch/blackfin/cpu/initcode.c	/^#define SRACK /;"	d	file:
SRACK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SRACK	/;"	d
SRAM0_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SRAM0_BASE_ADDR /;"	d
SRAM1_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define SRAM1_BASE	/;"	d
SRAM1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SRAM1_BASE_ADDR /;"	d
SRAM2_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define SRAM2_BASE	/;"	d
SRAM2_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SRAM2_BASE_ADDR /;"	d
SRAM3_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SRAM3_BASE_ADDR /;"	d
SRAMBAR	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define SRAMBAR	/;"	d
SRAM_10M_AMP1	drivers/usb/eth/r8152.h	/^#define SRAM_10M_AMP1	/;"	d
SRAM_10M_AMP2	drivers/usb/eth/r8152.h	/^#define SRAM_10M_AMP2	/;"	d
SRAM_BASE	drivers/ddr/marvell/a38x/xor.h	/^#define SRAM_BASE	/;"	d
SRAM_BASE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define SRAM_BASE /;"	d
SRAM_BASE_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define SRAM_BASE_ADDR /;"	d
SRAM_BASE_ADDR	arch/powerpc/cpu/mpc85xx/cpu_init_early.c	/^#define SRAM_BASE_ADDR	/;"	d	file:
SRAM_CLK_CODE	arch/arm/include/asm/arch-omap3/omap.h	/^#define SRAM_CLK_CODE	/;"	d
SRAM_IMPEDANCE	drivers/usb/eth/r8152.h	/^#define SRAM_IMPEDANCE	/;"	d
SRAM_LOAD_MAX_SIZE	tools/mksunxiboot.c	/^#define SRAM_LOAD_MAX_SIZE /;"	d	file:
SRAM_LPF_CFG	drivers/usb/eth/r8152.h	/^#define SRAM_LPF_CFG	/;"	d
SRAM_OFFSET0	arch/arm/include/asm/arch-omap3/omap.h	/^#define SRAM_OFFSET0	/;"	d
SRAM_OFFSET1	arch/arm/include/asm/arch-omap3/omap.h	/^#define SRAM_OFFSET1	/;"	d
SRAM_OFFSET2	arch/arm/include/asm/arch-omap3/omap.h	/^#define SRAM_OFFSET2	/;"	d
SRAM_REL	board/spear/common/spr_misc.c	/^#define SRAM_REL	/;"	d	file:
SRAM_ROM_VECT_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define SRAM_ROM_VECT_BASE	/;"	d
SRAM_ROM_VECT_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define SRAM_ROM_VECT_BASE	/;"	d
SRAM_SCRATCH_SPACE_ADDR	arch/arm/include/asm/arch-am33xx/omap.h	/^#define SRAM_SCRATCH_SPACE_ADDR	/;"	d
SRAM_SCRATCH_SPACE_ADDR	arch/arm/include/asm/arch-omap3/omap.h	/^#define SRAM_SCRATCH_SPACE_ADDR	/;"	d
SRAM_SCRATCH_SPACE_ADDR	arch/arm/include/asm/arch-omap4/omap.h	/^#define SRAM_SCRATCH_SPACE_ADDR	/;"	d
SRAM_SCRATCH_SPACE_ADDR	arch/arm/include/asm/arch-omap5/omap.h	/^#define SRAM_SCRATCH_SPACE_ADDR	/;"	d
SRAM_SIZE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define SRAM_SIZE /;"	d
SRAM_STACK	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^SRAM_STACK:$/;"	l
SRAM_STACK_V	board/spear/common/spr_lowlevel_init.S	/^SRAM_STACK_V:$/;"	l
SRAM_VECT_CODE	arch/arm/include/asm/arch-omap3/omap.h	/^#define SRAM_VECT_CODE	/;"	d
SRBSYTO_29	drivers/mmc/sh_mmcif.h	/^#define SRBSYTO_29	/;"	d
SRCARCH	scripts/kconfig/Makefile	/^SRCARCH := ..$/;"	m
SRCODE_OVERRIDE_SEL_XS_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define SRCODE_OVERRIDE_SEL_XS_MASK	/;"	d
SRCODE_OVERRIDE_SEL_XS_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define SRCODE_OVERRIDE_SEL_XS_SHIFT	/;"	d
SRCODE_READ_XS_MASK	arch/arm/include/asm/arch-omap5/omap.h	/^#define SRCODE_READ_XS_MASK	/;"	d
SRCODE_READ_XS_SHIFT	arch/arm/include/asm/arch-omap5/omap.h	/^#define SRCODE_READ_XS_SHIFT	/;"	d
SRCPTR	include/MCD_progCheck.h	/^#define SRCPTR	/;"	d
SRCR_HIGH	arch/m68k/include/asm/m5301x.h	/^#define SRCR_HIGH	/;"	d
SRCR_HIGHEST	arch/m68k/include/asm/m5301x.h	/^#define SRCR_HIGHEST	/;"	d
SRCR_LOW	arch/m68k/include/asm/m5301x.h	/^#define SRCR_LOW	/;"	d
SRCR_LOWEST	arch/m68k/include/asm/m5301x.h	/^#define SRCR_LOWEST	/;"	d
SRCTL	arch/sh/include/asm/cpu_sh7722.h	/^#define SRCTL /;"	d
SRCTREE	scripts/kconfig/lkc.h	/^#define SRCTREE /;"	d
SRC_A7RCR0	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define SRC_A7RCR0	/;"	d	file:
SRC_A7RCR1	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define SRC_A7RCR1	/;"	d	file:
SRC_ADDR0	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR0,		\/* Source Address #0 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR1	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR1,		\/* Source Address #1 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR2	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR2,		\/* Source Address #2 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR3	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR3,		\/* Source Address #3 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR4	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR4,		\/* Source Address #4 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR5	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR5,		\/* Source Address #5 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR6	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR6,		\/* Source Address #6 Control *\/$/;"	e	enum:xor_override_target
SRC_ADDR7	drivers/ddr/marvell/a38x/xor.h	/^	SRC_ADDR7,		\/* Source Address #7 Control *\/$/;"	e	enum:xor_override_target
SRC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SRC_BASE_ADDR	/;"	d
SRC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_BASE_ADDR /;"	d
SRC_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SRC_BASE_ADDR /;"	d
SRC_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_BASE_ADDR	/;"	d
SRC_CLUT_ADDRESS	include/radeon.h	/^#define SRC_CLUT_ADDRESS	/;"	d
SRC_CLUT_DATA	include/radeon.h	/^#define SRC_CLUT_DATA	/;"	d
SRC_CLUT_DATA_RD	include/radeon.h	/^#define SRC_CLUT_DATA_RD	/;"	d
SRC_DSTCOLOR	include/radeon.h	/^#define SRC_DSTCOLOR	/;"	d
SRC_GPR1_FIRC_CLK_SOURCE	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SRC_GPR1_FIRC_CLK_SOURCE	/;"	d
SRC_GPR1_MX7D	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^#define SRC_GPR1_MX7D	/;"	d	file:
SRC_GPR1_PLL_OFFSET	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SRC_GPR1_PLL_OFFSET	/;"	d
SRC_GPR1_PLL_SOURCE	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SRC_GPR1_PLL_SOURCE(/;"	d
SRC_GPR1_PLL_SOURCE_MASK	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SRC_GPR1_PLL_SOURCE_MASK	/;"	d
SRC_GPR1_XOSC_CLK_SOURCE	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SRC_GPR1_XOSC_CLK_SOURCE	/;"	d
SRC_KFC_HPM_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define SRC_KFC_HPM_SEL	/;"	d
SRC_M4RCR_ENABLE_M4_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SRC_M4RCR_ENABLE_M4_MASK	/;"	d
SRC_M4RCR_ENABLE_M4_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SRC_M4RCR_ENABLE_M4_OFFSET	/;"	d
SRC_M4RCR_M4C_NON_SCLR_RST_MASK	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SRC_M4RCR_M4C_NON_SCLR_RST_MASK	/;"	d
SRC_M4RCR_M4C_NON_SCLR_RST_OFFSET	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SRC_M4RCR_M4C_NON_SCLR_RST_OFFSET	/;"	d
SRC_MONO	include/radeon.h	/^#define SRC_MONO	/;"	d
SRC_MONO_LBKGD	include/radeon.h	/^#define SRC_MONO_LBKGD	/;"	d
SRC_OFFSET	include/radeon.h	/^#define SRC_OFFSET	/;"	d
SRC_ON	drivers/video/mxc_ipuv3_fb.c	/^	SRC_ON,$/;"	e	enum:__anon46dcecef0103	file:
SRC_PITCH	include/radeon.h	/^#define SRC_PITCH	/;"	d
SRC_PITCH_OFFSET	include/radeon.h	/^#define SRC_PITCH_OFFSET	/;"	d
SRC_SBMR2_BMOD_FUSES	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SBMR2_BMOD_FUSES /;"	d
SRC_SBMR2_BMOD_MASK	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SBMR2_BMOD_MASK /;"	d
SRC_SBMR2_BMOD_RCON	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SBMR2_BMOD_RCON /;"	d
SRC_SBMR2_BMOD_SERIAL	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SBMR2_BMOD_SERIAL /;"	d
SRC_SBMR2_BMOD_SHIFT	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SBMR2_BMOD_SHIFT /;"	d
SRC_SCR_CORE_1_ENABLE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_1_ENABLE_MASK /;"	d
SRC_SCR_CORE_1_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_1_ENABLE_OFFSET /;"	d
SRC_SCR_CORE_1_RESET_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_1_RESET_MASK /;"	d
SRC_SCR_CORE_1_RESET_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_1_RESET_OFFSET /;"	d
SRC_SCR_CORE_2_ENABLE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_2_ENABLE_MASK /;"	d
SRC_SCR_CORE_2_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_2_ENABLE_OFFSET /;"	d
SRC_SCR_CORE_2_RESET_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_2_RESET_MASK /;"	d
SRC_SCR_CORE_2_RESET_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_2_RESET_OFFSET /;"	d
SRC_SCR_CORE_3_ENABLE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_3_ENABLE_MASK /;"	d
SRC_SCR_CORE_3_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_3_ENABLE_OFFSET /;"	d
SRC_SCR_CORE_3_RESET_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_3_RESET_MASK /;"	d
SRC_SCR_CORE_3_RESET_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_CORE_3_RESET_OFFSET /;"	d
SRC_SCR_M4C_NON_SCLR_RST_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_M4C_NON_SCLR_RST_MASK /;"	d
SRC_SCR_M4C_NON_SCLR_RST_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_M4C_NON_SCLR_RST_OFFSET /;"	d
SRC_SCR_M4_ENABLE_MASK	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_M4_ENABLE_MASK /;"	d
SRC_SCR_M4_ENABLE_OFFSET	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SRC_SCR_M4_ENABLE_OFFSET /;"	d
SRC_SCR_SW_RST	arch/arm/cpu/armv8/s32v234/generic.c	/^#define SRC_SCR_SW_RST	/;"	d	file:
SRC_SCR_WARM_RESET_ENABLE	arch/arm/imx-common/init.c	/^#define SRC_SCR_WARM_RESET_ENABLE	/;"	d	file:
SRC_SC_BOTTOM	include/radeon.h	/^#define SRC_SC_BOTTOM	/;"	d
SRC_SC_BOTTOM_RIGHT	include/radeon.h	/^#define SRC_SC_BOTTOM_RIGHT	/;"	d
SRC_SC_RIGHT	include/radeon.h	/^#define SRC_SC_RIGHT	/;"	d
SRC_SOC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SRC_SOC_BASE_ADDR	/;"	d
SRC_SRSR_JTAG_RST	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SRSR_JTAG_RST	/;"	d
SRC_SRSR_POR_RST	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SRSR_POR_RST	/;"	d
SRC_SRSR_RESETB	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SRSR_RESETB	/;"	d
SRC_SRSR_SW_RST	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SRSR_SW_RST	/;"	d
SRC_SRSR_WDOG_A5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SRSR_WDOG_A5	/;"	d
SRC_SRSR_WDOG_M4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define SRC_SRSR_WDOG_M4	/;"	d
SRC_TILE	include/radeon.h	/^#define SRC_TILE	/;"	d
SRC_X	include/radeon.h	/^#define SRC_X	/;"	d
SRC_X_Y	include/radeon.h	/^#define SRC_X_Y	/;"	d
SRC_Y	include/radeon.h	/^#define SRC_Y	/;"	d
SRC_Y_X	include/radeon.h	/^#define SRC_Y_X	/;"	d
SRD	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SRD	/;"	d
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/p1023_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc85xx/p2020_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS1_MAX_LANES	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^#define SRDS1_MAX_LANES	/;"	d	file:
SRDS2_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^#define SRDS2_MAX_LANES	/;"	d	file:
SRDS2_MAX_LANES	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^#define SRDS2_MAX_LANES	/;"	d	file:
SRDS2_MAX_LANES	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^#define SRDS2_MAX_LANES	/;"	d	file:
SRDS2_MAX_LANES	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^#define SRDS2_MAX_LANES	/;"	d	file:
SRDS2_MAX_LANES	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^#define SRDS2_MAX_LANES	/;"	d	file:
SRDS2_MAX_LANES	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^#define SRDS2_MAX_LANES	/;"	d	file:
SRDS_GCR0_1STLANE	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR0_1STLANE	/;"	d
SRDS_GCR0_RRST	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR0_RRST	/;"	d
SRDS_GCR0_UOTHL	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR0_UOTHL	/;"	d
SRDS_GCR1_OPAD_CTL	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR1_OPAD_CTL	/;"	d
SRDS_GCR1_REIDL_CTL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR1_REIDL_CTL_MASK	/;"	d
SRDS_GCR1_REIDL_CTL_PCIE	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR1_REIDL_CTL_PCIE	/;"	d
SRDS_GCR1_REIDL_CTL_SGMII	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR1_REIDL_CTL_SGMII	/;"	d
SRDS_GCR1_REIDL_CTL_SRIO	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_GCR1_REIDL_CTL_SRIO	/;"	d
SRDS_MAX_BANK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_MAX_BANK	/;"	d
SRDS_MAX_BANK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_MAX_BANK	/;"	d
SRDS_MAX_BANK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_MAX_BANK /;"	d
SRDS_MAX_LANES	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define	SRDS_MAX_LANES	/;"	d
SRDS_MAX_LANES	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_MAX_LANES	/;"	d
SRDS_MAX_LANES	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_MAX_LANES	/;"	d
SRDS_MAX_LANES	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_MAX_LANES	/;"	d
SRDS_MAX_LANES	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_MAX_LANES /;"	d
SRDS_PCCR2_RST_XGMII1	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PCCR2_RST_XGMII1	/;"	d
SRDS_PCCR2_RST_XGMII2	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PCCR2_RST_XGMII2	/;"	d
SRDS_PLLCR0_DCBIAS_OUT_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_DCBIAS_OUT_EN /;"	d
SRDS_PLLCR0_DCBIAS_OVRD	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_DCBIAS_OVRD	/;"	d
SRDS_PLLCR0_DCBIAS_OVRD_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_DCBIAS_OVRD_SHIFT	/;"	d
SRDS_PLLCR0_FRATE_SEL_3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_3	/;"	d
SRDS_PLLCR0_FRATE_SEL_3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_3	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_0	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_0	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_072	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_072	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_12	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_12	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_12	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_12	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_125	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_125	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_75	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_75	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_75	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_75	/;"	d
SRDS_PLLCR0_FRATE_SEL_3_75	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_3_75	/;"	d
SRDS_PLLCR0_FRATE_SEL_4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_4	/;"	d
SRDS_PLLCR0_FRATE_SEL_4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_4	/;"	d
SRDS_PLLCR0_FRATE_SEL_4	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_4	/;"	d
SRDS_PLLCR0_FRATE_SEL_4_9152	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_4_9152	/;"	d
SRDS_PLLCR0_FRATE_SEL_5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_5	/;"	d
SRDS_PLLCR0_FRATE_SEL_5	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_5	/;"	d
SRDS_PLLCR0_FRATE_SEL_5	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_5	/;"	d
SRDS_PLLCR0_FRATE_SEL_5_15	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_5_15	/;"	d
SRDS_PLLCR0_FRATE_SEL_5_15	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_5_15	/;"	d
SRDS_PLLCR0_FRATE_SEL_5_15	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_5_15	/;"	d
SRDS_PLLCR0_FRATE_SEL_6_25	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_6_25	/;"	d
SRDS_PLLCR0_FRATE_SEL_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_FRATE_SEL_MASK	/;"	d
SRDS_PLLCR0_FRATE_SEL_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_FRATE_SEL_MASK	/;"	d
SRDS_PLLCR0_FRATE_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_FRATE_SEL_MASK	/;"	d
SRDS_PLLCR0_PLL_LCK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_PLL_LCK	/;"	d
SRDS_PLLCR0_PLL_LCK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_PLL_LCK	/;"	d
SRDS_PLLCR0_PLL_LCK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_PLL_LCK	/;"	d
SRDS_PLLCR0_POFF	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_POFF	/;"	d
SRDS_PLLCR0_POFF	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_POFF	/;"	d
SRDS_PLLCR0_POFF	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_POFF	/;"	d
SRDS_PLLCR0_PVCOCNT_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_PVCOCNT_EN	/;"	d
SRDS_PLLCR0_RFCK_SEL_100	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_100	/;"	d
SRDS_PLLCR0_RFCK_SEL_100	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_100	/;"	d
SRDS_PLLCR0_RFCK_SEL_100	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_100	/;"	d
SRDS_PLLCR0_RFCK_SEL_122_88	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_122_88	/;"	d
SRDS_PLLCR0_RFCK_SEL_122_88	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_122_88	/;"	d
SRDS_PLLCR0_RFCK_SEL_122_88	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_122_88	/;"	d
SRDS_PLLCR0_RFCK_SEL_125	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_125	/;"	d
SRDS_PLLCR0_RFCK_SEL_125	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_125	/;"	d
SRDS_PLLCR0_RFCK_SEL_125	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_125	/;"	d
SRDS_PLLCR0_RFCK_SEL_150	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_150	/;"	d
SRDS_PLLCR0_RFCK_SEL_150	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_150	/;"	d
SRDS_PLLCR0_RFCK_SEL_150	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_150	/;"	d
SRDS_PLLCR0_RFCK_SEL_156_25	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_156_25	/;"	d
SRDS_PLLCR0_RFCK_SEL_156_25	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_156_25	/;"	d
SRDS_PLLCR0_RFCK_SEL_156_25	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_156_25	/;"	d
SRDS_PLLCR0_RFCK_SEL_161_13	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_161_13	/;"	d
SRDS_PLLCR0_RFCK_SEL_161_13	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_161_13	/;"	d
SRDS_PLLCR0_RFCK_SEL_161_13	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_161_13	/;"	d
SRDS_PLLCR0_RFCK_SEL_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR0_RFCK_SEL_MASK	/;"	d
SRDS_PLLCR0_RFCK_SEL_MASK	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR0_RFCK_SEL_MASK	/;"	d
SRDS_PLLCR0_RFCK_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR0_RFCK_SEL_MASK	/;"	d
SRDS_PLLCR1_BCAP_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR1_BCAP_EN	/;"	d
SRDS_PLLCR1_BCAP_OVD	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR1_BCAP_OVD	/;"	d
SRDS_PLLCR1_BYP_CAL	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR1_BYP_CAL	/;"	d
SRDS_PLLCR1_PLL_BWSEL	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_PLLCR1_PLL_BWSEL	/;"	d
SRDS_PLLCR1_PLL_BWSEL	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_PLLCR1_PLL_BWSEL	/;"	d
SRDS_PLLCR1_PLL_BWSEL	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR1_PLL_BWSEL	/;"	d
SRDS_PLLCR1_PLL_FCAP	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR1_PLL_FCAP	/;"	d
SRDS_PLLCR1_PLL_FCAP_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLCR1_PLL_FCAP_SHIFT	/;"	d
SRDS_PLLSR2_BCAP_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLSR2_BCAP_EN	/;"	d
SRDS_PLLSR2_BCAP_EN_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLSR2_BCAP_EN_SHIFT	/;"	d
SRDS_PLLSR2_DCBIAS	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLSR2_DCBIAS	/;"	d
SRDS_PLLSR2_DCBIAS_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLSR2_DCBIAS_SHIFT	/;"	d
SRDS_PLLSR2_FCAP	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLSR2_FCAP	/;"	d
SRDS_PLLSR2_FCAP_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_PLLSR2_FCAP_SHIFT	/;"	d
SRDS_RSTCTL_PLLRST_B	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_PLLRST_B	/;"	d
SRDS_RSTCTL_PLLRST_B	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_PLLRST_B	/;"	d
SRDS_RSTCTL_PLLRST_B	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_PLLRST_B	/;"	d
SRDS_RSTCTL_RST	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_RST	/;"	d
SRDS_RSTCTL_RST	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_RST	/;"	d
SRDS_RSTCTL_RST	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_RST	/;"	d
SRDS_RSTCTL_RSTDONE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_RSTDONE	/;"	d
SRDS_RSTCTL_RSTDONE	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_RSTDONE	/;"	d
SRDS_RSTCTL_RSTDONE	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_RSTDONE	/;"	d
SRDS_RSTCTL_RSTERR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_RSTERR	/;"	d
SRDS_RSTCTL_RSTERR	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_RSTERR	/;"	d
SRDS_RSTCTL_RSTERR	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_RSTERR	/;"	d
SRDS_RSTCTL_RSTERR_SHIFT	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_RSTERR_SHIFT /;"	d
SRDS_RSTCTL_SDEN	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_SDEN	/;"	d
SRDS_RSTCTL_SDEN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_SDEN	/;"	d
SRDS_RSTCTL_SDEN	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_SDEN	/;"	d
SRDS_RSTCTL_SDPD	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_SDPD	/;"	d
SRDS_RSTCTL_SDRST_B	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_SDRST_B	/;"	d
SRDS_RSTCTL_SDRST_B	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_SDRST_B	/;"	d
SRDS_RSTCTL_SDRST_B	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_SDRST_B	/;"	d
SRDS_RSTCTL_SWRST	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define SRDS_RSTCTL_SWRST	/;"	d
SRDS_RSTCTL_SWRST	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SRDS_RSTCTL_SWRST	/;"	d
SRDS_RSTCTL_SWRST	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_RSTCTL_SWRST	/;"	d
SRDS_TECR0_TEQ_TYPE_2LVL	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TECR0_TEQ_TYPE_2LVL	/;"	d
SRDS_TECR0_TEQ_TYPE_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TECR0_TEQ_TYPE_MASK	/;"	d
SRDS_TTLCR0_FLT_SEL_750PPM	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TTLCR0_FLT_SEL_750PPM	/;"	d
SRDS_TTLCR0_FLT_SEL_KFR_26	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TTLCR0_FLT_SEL_KFR_26	/;"	d
SRDS_TTLCR0_FLT_SEL_KPH_28	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TTLCR0_FLT_SEL_KPH_28	/;"	d
SRDS_TTLCR0_FLT_SEL_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TTLCR0_FLT_SEL_MASK	/;"	d
SRDS_TTLCR0_FREQOVD_EN	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TTLCR0_FREQOVD_EN	/;"	d
SRDS_TTLCR0_PM_DIS	arch/powerpc/include/asm/immap_85xx.h	/^#define SRDS_TTLCR0_PM_DIS	/;"	d
SRE	include/sym53c8xx.h	/^	#define   SRE /;"	d
SREC3_END	cmd/load.c	/^#define SREC3_END	/;"	d	file:
SREC3_FORMAT	cmd/load.c	/^#define SREC3_FORMAT	/;"	d	file:
SREC3_START	cmd/load.c	/^#define SREC3_START	/;"	d	file:
SREC_BYTES_PER_RECORD	cmd/load.c	/^#define SREC_BYTES_PER_RECORD	/;"	d	file:
SREC_COUNT	include/s_record.h	/^#define SREC_COUNT	/;"	d
SREC_DATA2	include/s_record.h	/^#define SREC_DATA2	/;"	d
SREC_DATA3	include/s_record.h	/^#define SREC_DATA3	/;"	d
SREC_DATA4	include/s_record.h	/^#define SREC_DATA4	/;"	d
SREC_EMPTY	include/s_record.h	/^#define SREC_EMPTY	/;"	d
SREC_END2	include/s_record.h	/^#define SREC_END2	/;"	d
SREC_END3	include/s_record.h	/^#define SREC_END3	/;"	d
SREC_END4	include/s_record.h	/^#define SREC_END4	/;"	d
SREC_E_BADCHKS	include/s_record.h	/^#define SREC_E_BADCHKS	/;"	d
SREC_E_BADTYPE	include/s_record.h	/^#define SREC_E_BADTYPE	/;"	d
SREC_E_NOSREC	include/s_record.h	/^#define SREC_E_NOSREC	/;"	d
SREC_MAXBINLEN	include/s_record.h	/^#define SREC_MAXBINLEN	/;"	d
SREC_MAXRECLEN	include/s_record.h	/^#define SREC_MAXRECLEN	/;"	d
SREC_REC_OK	include/s_record.h	/^#define SREC_REC_OK /;"	d
SREC_START	include/s_record.h	/^#define SREC_START	/;"	d
SREFRESH_DELAY_V	board/spear/common/spr_lowlevel_init.S	/^SREFRESH_DELAY_V:$/;"	l
SREFRESH_MASK_V	board/spear/common/spr_lowlevel_init.S	/^SREFRESH_MASK_V:$/;"	l
SRESCR	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SRESCR	/;"	d
SRFRONRESET	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SRFRONRESET	/;"	d
SRFS	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SRFS	/;"	d
SRGPL0_CFG_BAR	include/configs/canyonlands.h	/^#define SRGPL0_CFG_BAR	/;"	d
SRGPL0_MNT_BAR	include/configs/canyonlands.h	/^#define SRGPL0_MNT_BAR	/;"	d
SRGPL0_MSG_BAR	include/configs/canyonlands.h	/^#define SRGPL0_MSG_BAR	/;"	d
SRGPL0_OUT_BAR	include/configs/canyonlands.h	/^#define SRGPL0_OUT_BAR	/;"	d
SRGPL0_REG_BAR	include/configs/canyonlands.h	/^#define SRGPL0_REG_BAR	/;"	d
SRIO1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SRIO1,$/;"	e	enum:srds_prtcl
SRIO1	arch/powerpc/include/asm/fsl_serdes.h	/^	SRIO1,$/;"	e	enum:srds_prtcl
SRIO2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	SRIO2,$/;"	e	enum:srds_prtcl
SRIO2	arch/powerpc/include/asm/fsl_serdes.h	/^	SRIO2,$/;"	e	enum:srds_prtcl
SRIO_IB_ATMU_AR	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_IB_ATMU_AR /;"	d	file:
SRIO_LCSBA1CSR	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_LCSBA1CSR /;"	d	file:
SRIO_LCSBA1CSR_OFFSET	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_LCSBA1CSR_OFFSET /;"	d	file:
SRIO_MAINT_WIN_SIZE	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_MAINT_WIN_SIZE /;"	d	file:
SRIO_OB_ATMU_AR_MAINT	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_OB_ATMU_AR_MAINT /;"	d	file:
SRIO_OB_ATMU_AR_RW	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_OB_ATMU_AR_RW /;"	d	file:
SRIO_PORT_ACCEPT_ALL	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_PORT_ACCEPT_ALL /;"	d	file:
SRIO_RW_WIN_SIZE	arch/powerpc/cpu/mpc8xxx/srio.c	/^#define SRIO_RW_WIN_SIZE /;"	d	file:
SRK_FLAG	include/fsl_validate.h	/^#define SRK_FLAG	/;"	d
SRMD	board/micronas/vct/scc.h	/^#define SRMD	/;"	d
SRMMU_CACHE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_CACHE /;"	d
SRMMU_CHG_MASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_CHG_MASK /;"	d
SRMMU_CTRL_REG	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_CTRL_REG /;"	d
SRMMU_CTXTBL_PTR	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_CTXTBL_PTR /;"	d
SRMMU_CTX_PMASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_CTX_PMASK /;"	d
SRMMU_CTX_REG	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_CTX_REG /;"	d
SRMMU_DIRTY	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_DIRTY /;"	d
SRMMU_ET_INVALID	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_ET_INVALID /;"	d
SRMMU_ET_MASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_ET_MASK /;"	d
SRMMU_ET_PTD	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_ET_PTD /;"	d
SRMMU_ET_PTE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_ET_PTE /;"	d
SRMMU_ET_REPTE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_ET_REPTE /;"	d
SRMMU_EXEC	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_EXEC /;"	d
SRMMU_FAULT_ADDR	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_FAULT_ADDR /;"	d
SRMMU_FAULT_STATUS	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_FAULT_STATUS /;"	d
SRMMU_FILE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_FILE /;"	d
SRMMU_MAX_CONTEXTS	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_MAX_CONTEXTS	/;"	d
SRMMU_NOREAD	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_NOREAD /;"	d
SRMMU_PAGE_COPY	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PAGE_COPY /;"	d
SRMMU_PAGE_KERNEL	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PAGE_KERNEL /;"	d
SRMMU_PAGE_NONE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PAGE_NONE /;"	d
SRMMU_PAGE_RDONLY	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PAGE_RDONLY /;"	d
SRMMU_PAGE_SHARED	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PAGE_SHARED /;"	d
SRMMU_PGDIR_ALIGN	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PGDIR_ALIGN(/;"	d
SRMMU_PGDIR_MASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PGDIR_MASK /;"	d
SRMMU_PGDIR_SHIFT	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PGDIR_SHIFT /;"	d
SRMMU_PGDIR_SIZE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PGDIR_SIZE /;"	d
SRMMU_PGD_TABLE_SIZE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PGD_TABLE_SIZE	/;"	d
SRMMU_PMD_TABLE_SIZE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PMD_TABLE_SIZE	/;"	d
SRMMU_PRIV	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PRIV /;"	d
SRMMU_PRIV_RDONLY	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PRIV_RDONLY /;"	d
SRMMU_PTD_PMASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PTD_PMASK /;"	d
SRMMU_PTE_FILE_SHIFT	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PTE_FILE_SHIFT /;"	d
SRMMU_PTE_PMASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PTE_PMASK /;"	d
SRMMU_PTRS_PER_PGD	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PTRS_PER_PGD	/;"	d
SRMMU_PTRS_PER_PMD	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_PTRS_PER_PMD	/;"	d
SRMMU_REAL_PMD_ALIGN	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PMD_ALIGN(/;"	d
SRMMU_REAL_PMD_MASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PMD_MASK	/;"	d
SRMMU_REAL_PMD_SHIFT	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PMD_SHIFT	/;"	d
SRMMU_REAL_PMD_SIZE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PMD_SIZE	/;"	d
SRMMU_REAL_PTE_TABLE_SIZE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PTE_TABLE_SIZE	/;"	d
SRMMU_REAL_PTRS_PER_PMD	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PTRS_PER_PMD	/;"	d
SRMMU_REAL_PTRS_PER_PTE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REAL_PTRS_PER_PTE	/;"	d
SRMMU_REF	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_REF /;"	d
SRMMU_SWP_OFF_MASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_SWP_OFF_MASK	/;"	d
SRMMU_SWP_OFF_SHIFT	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_SWP_OFF_SHIFT	/;"	d
SRMMU_SWP_TYPE_MASK	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_SWP_TYPE_MASK	/;"	d
SRMMU_SWP_TYPE_SHIFT	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_SWP_TYPE_SHIFT	/;"	d
SRMMU_VALID	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_VALID /;"	d
SRMMU_WRITE	arch/sparc/include/asm/srmmu.h	/^#define SRMMU_WRITE /;"	d
SROMC_BC_PMC	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_PMC(/;"	d
SROMC_BC_TACC	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_TACC(/;"	d
SROMC_BC_TACP	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_TACP(/;"	d
SROMC_BC_TACS	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_TACS(/;"	d
SROMC_BC_TAH	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_TAH(/;"	d
SROMC_BC_TCOH	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_TCOH(/;"	d
SROMC_BC_TCOS	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BC_TCOS(/;"	d
SROMC_BYTE_ADDR_MODE	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BYTE_ADDR_MODE(/;"	d
SROMC_BYTE_ENABLE	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_BYTE_ENABLE(/;"	d
SROMC_DATA16_WIDTH	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_DATA16_WIDTH(/;"	d
SROMC_WAIT_ENABLE	arch/arm/mach-exynos/include/mach/sromc.h	/^#define SROMC_WAIT_ENABLE(/;"	d
SROM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define SROM_BASE_ADDR /;"	d
SROM_CLK_WRITE	drivers/net/uli526x.c	/^#define SROM_CLK_WRITE(/;"	d	file:
SROM_DATA_0	drivers/net/uli526x.c	/^#define SROM_DATA_0	/;"	d	file:
SROM_DATA_1	drivers/net/uli526x.c	/^#define SROM_DATA_1	/;"	d	file:
SROM_ERASE_CMD	drivers/net/dc2114x.c	/^#define SROM_ERASE_CMD	/;"	d	file:
SROM_HWADD	drivers/net/dc2114x.c	/^#define SROM_HWADD	/;"	d	file:
SROM_RD	drivers/net/dc2114x.c	/^#define SROM_RD	/;"	d	file:
SROM_READ_CMD	drivers/net/dc2114x.c	/^#define SROM_READ_CMD	/;"	d	file:
SROM_SR	drivers/net/dc2114x.c	/^#define SROM_SR	/;"	d	file:
SROM_V41_CODE	drivers/net/uli526x.c	/^#define SROM_V41_CODE	/;"	d	file:
SROM_WRITE_CMD	drivers/net/dc2114x.c	/^#define SROM_WRITE_CMD	/;"	d	file:
SRR0	arch/powerpc/include/asm/processor.h	/^#define SRR0	/;"	d
SRR1	arch/powerpc/include/asm/processor.h	/^#define SRR1	/;"	d
SRR2	arch/powerpc/include/asm/processor.h	/^#define SRR2	/;"	d
SRR3	arch/powerpc/include/asm/processor.h	/^#define SRR3	/;"	d
SRREQ	arch/blackfin/cpu/initcode.c	/^#define SRREQ	/;"	d	file:
SRREQ	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define SRREQ	/;"	d
SRSPTO_256	drivers/mmc/sh_mmcif.h	/^#define SRSPTO_256	/;"	d
SRST	include/sym53c8xx.h	/^  #define   SRST /;"	d
SRSTEN_MASK	arch/arm/cpu/armv7/bcm281xx/reset.c	/^#define SRSTEN_MASK	/;"	d	file:
SRST_ACC_EFUSE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACC_EFUSE	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ACC_EFUSE	/;"	d
SRST_ACODEC_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ACODEC_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ACODEC_P	/;"	d
SRST_ADB400_MST0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST0	/;"	d
SRST_ADB400_MST1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_MST1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_MST1	/;"	d
SRST_ADB400_SLV0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV0	/;"	d
SRST_ADB400_SLV1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB400_SLV1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB400_SLV1	/;"	d
SRST_ADB_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B	/;"	d
SRST_ADB_B_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_B_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_B_T	/;"	d
SRST_ADB_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L	/;"	d
SRST_ADB_L_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_ADB_L_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ADB_L_T	/;"	d
SRST_AHB1TOM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB1TOM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_AHB1TOM	/;"	d
SRST_AHB2APB_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_AHB2APB_H	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_AHB2APB_H	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_B_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_B_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400M_PD_CORE_L_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400M_PD_CORE_L_T	/;"	d
SRST_A_ADB400_COREB2GIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREB2GIC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREB2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_COREL2GIC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_COREL2GIC	/;"	d
SRST_A_ADB400_GIC2COREB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREB	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREB	/;"	d
SRST_A_ADB400_GIC2COREL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_ADB400_GIC2COREL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ADB400_GIC2COREL	/;"	d
SRST_A_CCI	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCI	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI	/;"	d
SRST_A_CCIM0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC	/;"	d
SRST_A_CCIM0_NOC_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM0_NOC_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM0_NOC_T	/;"	d
SRST_A_CCIM1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC	/;"	d
SRST_A_CCIM1_NOC_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCIM1_NOC_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCIM1_NOC_T	/;"	d
SRST_A_CCI_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CCI_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CCI_T	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_MAIN_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_MAIN_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_CENTER_PERI_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_CENTER_PERI_NOC	/;"	d
SRST_A_DCF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_DCF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_DCF	/;"	d
SRST_A_GMAC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC	/;"	d
SRST_A_GMAC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GMAC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GMAC_NOC	/;"	d
SRST_A_GPU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU	/;"	d
SRST_A_GPU_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_GRF	/;"	d
SRST_A_GPU_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_GPU_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_GPU_NOC	/;"	d
SRST_A_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP	/;"	d
SRST_A_HDCP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_HDCP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_HDCP_NOC	/;"	d
SRST_A_IEP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP	/;"	d
SRST_A_IEP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_IEP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_IEP_NOC	/;"	d
SRST_A_ISP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP0_NOC	/;"	d
SRST_A_ISP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_ISP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_ISP1_NOC	/;"	d
SRST_A_PCIE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PCIE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PCIE	/;"	d
SRST_A_PERIHP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERIHP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERIHP_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_PERILP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_PERILP0_NOC	/;"	d
SRST_A_RGA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA	/;"	d
SRST_A_RGA_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RGA_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RGA_NOC	/;"	d
SRST_A_RKPERF_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_B	/;"	d
SRST_A_RKPERF_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_RKPERF_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_RKPERF_L	/;"	d
SRST_A_USB3_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_GRF	/;"	d
SRST_A_USB3_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_NOC	/;"	d
SRST_A_USB3_OTG0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG0	/;"	d
SRST_A_USB3_OTG1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_USB3_OTG1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_USB3_OTG1	/;"	d
SRST_A_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC	/;"	d
SRST_A_VCODEC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VCODEC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VCODEC_NOC	/;"	d
SRST_A_VDU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU	/;"	d
SRST_A_VDU_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VDU_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VDU_NOC	/;"	d
SRST_A_VIO_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VIO_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VIO_NOC	/;"	d
SRST_A_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0	/;"	d
SRST_A_VOP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP0_NOC	/;"	d
SRST_A_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1	/;"	d
SRST_A_VOP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP1_NOC	/;"	d
SRST_A_VOP_IEP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_A_VOP_IEP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_A_VOP_IEP	/;"	d
SRST_C2C_HOST	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_C2C_HOST	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_C2C_HOST	/;"	d
SRST_CCI_TRACE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCI_TRACE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CCI_TRACE	/;"	d
SRST_CCP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CCP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CCP	/;"	d
SRST_CM0S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S	/;"	d
SRST_CM0S_DBG	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_DBG	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_DBG	/;"	d
SRST_CM0S_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_NOC	/;"	d
SRST_CM0S_PO	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CM0S_PO	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CM0S_PO	/;"	d
SRST_CORE0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0	/;"	d
SRST_CORE0_DBG	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_DBG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_DBG	/;"	d
SRST_CORE0_PO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_PO	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE0_PO	/;"	d
SRST_CORE0_POR	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE0_POR	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE0_POR	/;"	d
SRST_CORE1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1	/;"	d
SRST_CORE1_DBG	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_DBG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_DBG	/;"	d
SRST_CORE1_PO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_PO	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE1_PO	/;"	d
SRST_CORE1_POR	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE1_POR	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE1_POR	/;"	d
SRST_CORE2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2	/;"	d
SRST_CORE2_DBG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_DBG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_DBG	/;"	d
SRST_CORE2_PO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE2_PO	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE2_PO	/;"	d
SRST_CORE3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3	/;"	d
SRST_CORE3_DBG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_DBG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_DBG	/;"	d
SRST_CORE3_PO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORE3_PO	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE3_PO	/;"	d
SRST_CORESIGHT	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORESIGHT	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORESIGHT	/;"	d
SRST_CORE_B0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0	/;"	d
SRST_CORE_B0_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B0_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B0_T	/;"	d
SRST_CORE_B1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_B1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_B1	/;"	d
SRST_CORE_DLL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_DLL	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CORE_DLL	/;"	d
SRST_CORE_L0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0	/;"	d
SRST_CORE_L0_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L0_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L0_T	/;"	d
SRST_CORE_L1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L1	/;"	d
SRST_CORE_L2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L2	/;"	d
SRST_CORE_L3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_L3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_L3	/;"	d
SRST_CORE_PO_B0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0	/;"	d
SRST_CORE_PO_B0_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B0_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B0_T	/;"	d
SRST_CORE_PO_B1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_B1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_B1	/;"	d
SRST_CORE_PO_L0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0	/;"	d
SRST_CORE_PO_L0_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L0_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L0_T	/;"	d
SRST_CORE_PO_L1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L1	/;"	d
SRST_CORE_PO_L2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L2	/;"	d
SRST_CORE_PO_L3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PO_L3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CORE_PO_L3	/;"	d
SRST_CORE_PVTM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CORE_PVTM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CORE_PVTM	/;"	d
SRST_CPUSYS_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPUSYS_H	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPUSYS_H	/;"	d
SRST_CPU_PERI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CPU_PERI	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_CPU_PERI	/;"	d
SRST_CRYPTO	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO	/;"	d
SRST_CRYPTO1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1	/;"	d
SRST_CRYPTO1_M	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_M	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_M	/;"	d
SRST_CRYPTO1_S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO1_S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO1_S	/;"	d
SRST_CRYPTO_M	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_M	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_M	/;"	d
SRST_CRYPTO_S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_CRYPTO_S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_CRYPTO_S	/;"	d
SRST_C_DP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_C_DP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_C_DP_CTRL	/;"	d
SRST_DAP	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP	/;"	d
SRST_DAP_SYS	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DAP_SYS	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DAP_SYS	/;"	d
SRST_DBG_CM0S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CM0S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CM0S	/;"	d
SRST_DBG_CXCS	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_CXCS	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_CXCS	/;"	d
SRST_DBG_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC	/;"	d
SRST_DBG_NOC_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_NOC_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DBG_NOC_T	/;"	d
SRST_DBG_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DBG_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DBG_P	/;"	d
SRST_DDR0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0	/;"	d
SRST_DDR0_MSCH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR0_MSCH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR0_MSCH	/;"	d
SRST_DDR1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1	/;"	d
SRST_DDR1_MSCH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDR1_MSCH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR1_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG0_MSCH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG0_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCFG1_MSCH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRCFG1_MSCH	/;"	d
SRST_DDRCTRL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL	/;"	d
SRST_DDRCTRL0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0	/;"	d
SRST_DDRCTRL0_APB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL0_APB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL0_APB	/;"	d
SRST_DDRCTRL1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1	/;"	d
SRST_DDRCTRL1_APB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL1_APB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRCTRL1_APB	/;"	d
SRST_DDRCTRL_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRCTRL_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRCTRL_P	/;"	d
SRST_DDRMSCH	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRMSCH	/;"	d
SRST_DDRMSCH0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH0	/;"	d
SRST_DDRMSCH1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRMSCH1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRMSCH1	/;"	d
SRST_DDRPHY	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY	/;"	d
SRST_DDRPHY0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY0	/;"	d
SRST_DDRPHY0_APB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_APB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_APB	/;"	d
SRST_DDRPHY0_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY0_CTRL	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY0_CTRL	/;"	d
SRST_DDRPHY1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDRPHY1	/;"	d
SRST_DDRPHY1_APB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_APB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_APB	/;"	d
SRST_DDRPHY1_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY1_CTRL	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DDRPHY1_CTRL	/;"	d
SRST_DDRPHY_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDRPHY_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDRPHY_P	/;"	d
SRST_DDR_CIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_CIC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DDR_CIC	/;"	d
SRST_DDR_PLL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DDR_PLL	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DDR_PLL	/;"	d
SRST_DMA2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMA2	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_DMA2	/;"	d
SRST_DMAC0_PERILP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC0_PERILP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC0_PERILP0	/;"	d
SRST_DMAC1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC1	/;"	d
SRST_DMAC1_PERILP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC1_PERILP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DMAC1_PERILP0	/;"	d
SRST_DMAC2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DMAC2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DMAC2	/;"	d
SRST_DPTX_SPDIF_REC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DPTX_SPDIF_REC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DPTX_SPDIF_REC	/;"	d
SRST_DP_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_CORE	/;"	d
SRST_DP_I2S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DP_I2S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_DP_I2S	/;"	d
SRST_DWPWM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_DWPWM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_DWPWM	/;"	d
SRST_D_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP0	/;"	d
SRST_D_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_D_VOP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_D_VOP1	/;"	d
SRST_EDP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EDP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EDP	/;"	d
SRST_EFUSE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE	/;"	d
SRST_EFUSE256	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE256	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EFUSE256	/;"	d
SRST_EFUSE_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EFUSE_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EFUSE_P	/;"	d
SRST_EMEM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMEM	/;"	d
SRST_EMEM_PERI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMEM_PERI	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMEM_PERI	/;"	d
SRST_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC	/;"	d
SRST_EMMC_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_GRF	/;"	d
SRST_EMMC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_EMMC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_EMMC_NOC	/;"	d
SRST_GASKET	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GASKET	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GASKET	/;"	d
SRST_GIC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GIC	/;"	d
SRST_GIC500	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC500	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC500	/;"	d
SRST_GIC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GIC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_GIC_NOC	/;"	d
SRST_GPIO0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO0	/;"	d
SRST_GPIO1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO1	/;"	d
SRST_GPIO2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO2	/;"	d
SRST_GPIO3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO3	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO3	/;"	d
SRST_GPIO4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO4	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO4	/;"	d
SRST_GPIO5	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO5	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO5	/;"	d
SRST_GPIO6	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO6	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO6	/;"	d
SRST_GPIO7	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO7	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO7	/;"	d
SRST_GPIO8	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPIO8	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPIO8	/;"	d
SRST_GPS	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPS	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPS	/;"	d
SRST_GPU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU	/;"	d
SRST_GPU_DLL	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_DLL	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_DLL	/;"	d
SRST_GPU_NIU_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_NIU_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GPU_NIU_A	/;"	d
SRST_GPU_PVTM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GPU_PVTM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GPU_PVTM	/;"	d
SRST_GRF	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_GRF	/;"	d
SRST_GRF	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_GRF	/;"	d
SRST_HDCP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDCP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDCP_CTRL	/;"	d
SRST_HDMI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HDMI	/;"	d
SRST_HDMI_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HDMI_CTRL	/;"	d
SRST_HDMI_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HDMI_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HDMI_P	/;"	d
SRST_HEVC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HEVC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HEVC	/;"	d
SRST_HOST0_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST0_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST0_ARB	/;"	d
SRST_HOST1_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOST1_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOST1_ARB	/;"	d
SRST_HOSTC0_AUX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC0_AUX	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC0_AUX	/;"	d
SRST_HOSTC1_AUX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HOSTC1_AUX	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HOSTC1_AUX	/;"	d
SRST_HSADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSADC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSADC	/;"	d
SRST_HSIC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSIC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC	/;"	d
SRST_HSICPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY	/;"	d
SRST_HSICPHY_POR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_POR	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_POR	/;"	d
SRST_HSICPHY_UTMI	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSICPHY_UTMI	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSICPHY_UTMI	/;"	d
SRST_HSIC_AUX	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_AUX	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_HSIC_AUX	/;"	d
SRST_HSIC_PHY	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_HSIC_PHY	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_HSIC_PHY	/;"	d
SRST_H_CM0S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S	/;"	d
SRST_H_CM0S_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_CM0S_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_CM0S_NOC	/;"	d
SRST_H_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP	/;"	d
SRST_H_HDCP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_HDCP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_HDCP_NOC	/;"	d
SRST_H_I2S0_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S0_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S0_8CH	/;"	d
SRST_H_I2S1_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S1_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S1_8CH	/;"	d
SRST_H_I2S2_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_I2S2_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_I2S2_8CH	/;"	d
SRST_H_IEP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP	/;"	d
SRST_H_IEP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_IEP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_IEP_NOC	/;"	d
SRST_H_ISP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0	/;"	d
SRST_H_ISP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP0_NOC	/;"	d
SRST_H_ISP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1	/;"	d
SRST_H_ISP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_ISP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_ISP1_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERIHP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERIHP_NOC	/;"	d
SRST_H_PERILP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0	/;"	d
SRST_H_PERILP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP0_NOC	/;"	d
SRST_H_PERILP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1	/;"	d
SRST_H_PERILP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_PERILP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_PERILP1_NOC	/;"	d
SRST_H_RGA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA	/;"	d
SRST_H_RGA_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_RGA_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_RGA_NOC	/;"	d
SRST_H_SPDIF_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_SPDIF_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_SPDIF_8CH	/;"	d
SRST_H_VCODEC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC	/;"	d
SRST_H_VCODEC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VCODEC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VCODEC_NOC	/;"	d
SRST_H_VDU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU	/;"	d
SRST_H_VDU_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VDU_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VDU_NOC	/;"	d
SRST_H_VOP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0	/;"	d
SRST_H_VOP0_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP0_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP0_NOC	/;"	d
SRST_H_VOP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1	/;"	d
SRST_H_VOP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_H_VOP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_H_VOP1_NOC	/;"	d
SRST_I2C0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C0	/;"	d
SRST_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C1	/;"	d
SRST_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C2	/;"	d
SRST_I2C3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C3	/;"	d
SRST_I2C4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C4	/;"	d
SRST_I2C5	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C5	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C5	/;"	d
SRST_I2C6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C6	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C6	/;"	d
SRST_I2C7	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C7	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C7	/;"	d
SRST_I2C8	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2C8	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2C8	/;"	d
SRST_I2S	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_I2S	/;"	d
SRST_I2S0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_I2S0	/;"	d
SRST_I2S0_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S0_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S0_8CH	/;"	d
SRST_I2S1_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S1_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S1_8CH	/;"	d
SRST_I2S2_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_I2S2_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_I2S2_8CH	/;"	d
SRST_IEP_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AHB	/;"	d
SRST_IEP_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_IEP_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_IEP_AXI	/;"	d
SRST_INTMEM	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_INTMEM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_INTMEM	/;"	d
SRST_ISP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ISP	/;"	d
SRST_ISP0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP0	/;"	d
SRST_ISP1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_ISP1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ISP1	/;"	d
SRST_L2C	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2C	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_L2C	/;"	d
SRST_L2_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B	/;"	d
SRST_L2_B_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_B_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_B_T	/;"	d
SRST_L2_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L	/;"	d
SRST_L2_L_T	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_L2_L_T	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_L2_L_T	/;"	d
SRST_LCDC0_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AHB	/;"	d
SRST_LCDC0_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_AXI	/;"	d
SRST_LCDC0_DCLK	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC0_DCLK	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC0_DCLK	/;"	d
SRST_LCDC1_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_A	/;"	d
SRST_LCDC1_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AHB	/;"	d
SRST_LCDC1_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_AXI	/;"	d
SRST_LCDC1_D	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_D	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_D	/;"	d
SRST_LCDC1_DCLK	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_DCLK	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC1_DCLK	/;"	d
SRST_LCDC1_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC1_H	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_LCDC1_H	/;"	d
SRST_LCDC_PWM0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM0	/;"	d
SRST_LCDC_PWM1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LCDC_PWM1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LCDC_PWM1	/;"	d
SRST_LVDS_CON	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_CON	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_CON	/;"	d
SRST_LVDS_PHY	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_LVDS_PHY	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_LVDS_PHY	/;"	d
SRST_MAC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MAC	/;"	d
SRST_MAC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MAC	/;"	d
SRST_MIPICSI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPICSI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPICSI	/;"	d
SRST_MIPIDSI0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI0	/;"	d
SRST_MIPIDSI1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MIPIDSI1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MIPIDSI1	/;"	d
SRST_MMC0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC0	/;"	d
SRST_MMC_PERI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_MMC_PERI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_MMC_PERI	/;"	d
SRST_NANDC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_NANDC	/;"	d
SRST_NANDC0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC0	/;"	d
SRST_NANDC1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_NANDC1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_NANDC1	/;"	d
SRST_OTGC0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC0	/;"	d
SRST_OTGC1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_OTGC1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_OTGC1	/;"	d
SRST_PCIEPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIEPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIEPHY	/;"	d
SRST_PCIE_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_CORE	/;"	d
SRST_PCIE_MGMT	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT	/;"	d
SRST_PCIE_MGMT_STICKY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_MGMT_STICKY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_MGMT_STICKY	/;"	d
SRST_PCIE_PIPE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PIPE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PIPE	/;"	d
SRST_PCIE_PM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PCIE_PM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PCIE_PM	/;"	d
SRST_PDALIVE_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDALIVE_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDALIVE_NIU	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUG_AHB_ARBITOR	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUG_AHB_ARBITOR	/;"	d
SRST_PDBUS_STRSYS	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDBUS_STRSYS	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDBUS_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDCORE_STRSYS	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDCORE_STRSYS	/;"	d
SRST_PDPERI_AHB_ARBI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPERI_AHB_ARBI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPERI_AHB_ARBI	/;"	d
SRST_PDPMU_INTMEM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_INTMEM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_INTMEM	/;"	d
SRST_PDPMU_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PDPMU_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PDPMU_NIU	/;"	d
SRST_PD_CORE_AHB_NOC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_AHB_NOC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_AHB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_APB_NOC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_APB_NOC	/;"	d
SRST_PD_CORE_MP_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_MP_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PD_CORE_MP_AXI	/;"	d
SRST_PD_CORE_NIU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PD_CORE_NIU	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PD_CORE_NIU	/;"	d
SRST_PERIPHSYS_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_A	/;"	d
SRST_PERIPHSYS_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_H	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_H	/;"	d
SRST_PERIPHSYS_P	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPHSYS_P	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERIPHSYS_P	/;"	d
SRST_PERIPH_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AHB	/;"	d
SRST_PERIPH_APB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_APB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_APB	/;"	d
SRST_PERIPH_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_AXI	/;"	d
SRST_PERIPH_MMU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_MMU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_MMU	/;"	d
SRST_PERIPH_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERIPH_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PERIPH_NIU	/;"	d
SRST_PERI_NIU	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PERI_NIU	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PERI_NIU	/;"	d
SRST_PMU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PMU	/;"	d
SRST_PMU_APB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PMU_APB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PMU_APB	/;"	d
SRST_PO_CM0S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PO_CM0S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PO_CM0S	/;"	d
SRST_PS2C	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PS2C	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_PS2C	/;"	d
SRST_PVTM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM	/;"	d
SRST_PVTM_CORE_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_B	/;"	d
SRST_PVTM_CORE_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_CORE_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_CORE_L	/;"	d
SRST_PVTM_DDR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_DDR	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_DDR	/;"	d
SRST_PVTM_GPU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PVTM_GPU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_PVTM_GPU	/;"	d
SRST_PWM0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_PWM0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_PWM0	/;"	d
SRST_P_ALIVE_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_NOC	/;"	d
SRST_P_ALIVE_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_ALIVE_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_ALIVE_SGRF	/;"	d
SRST_P_CCI_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CCI_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CCI_GRF	/;"	d
SRST_P_CENTER_MAIN	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_MAIN	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_MAIN	/;"	d
SRST_P_CENTER_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CENTER_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CENTER_SGRF	/;"	d
SRST_P_CIC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CIC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CIC	/;"	d
SRST_P_CRU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_CRU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_CRU	/;"	d
SRST_P_DBG_B	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_B	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_B	/;"	d
SRST_P_DBG_L	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DBG_L	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DBG_L	/;"	d
SRST_P_DCF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DCF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DCF	/;"	d
SRST_P_DDRMON	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DDRMON	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DDRMON	/;"	d
SRST_P_DP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_DP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_DP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_CTRL	/;"	d
SRST_P_EDP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EDP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EDP_NOC	/;"	d
SRST_P_EFUSE_1024	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024	/;"	d
SRST_P_EFUSE_1024S	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_EFUSE_1024S	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_EFUSE_1024S	/;"	d
SRST_P_GMAC_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_GRF	/;"	d
SRST_P_GMAC_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GMAC_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GMAC_NOC	/;"	d
SRST_P_GPIO0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO0	/;"	d
SRST_P_GPIO1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO1	/;"	d
SRST_P_GPIO2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO2	/;"	d
SRST_P_GPIO3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO3	/;"	d
SRST_P_GPIO4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GPIO4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GPIO4	/;"	d
SRST_P_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_GRF	/;"	d
SRST_P_HDCP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP	/;"	d
SRST_P_HDCP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDCP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDCP_NOC	/;"	d
SRST_P_HDMI_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_HDMI_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_HDMI_CTRL	/;"	d
SRST_P_I2C0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C0	/;"	d
SRST_P_I2C1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C1	/;"	d
SRST_P_I2C2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C2	/;"	d
SRST_P_I2C3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C3	/;"	d
SRST_P_I2C4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C4	/;"	d
SRST_P_I2C5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C5	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C5	/;"	d
SRST_P_I2C6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C6	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C6	/;"	d
SRST_P_I2C7	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C7	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C7	/;"	d
SRST_P_I2C8	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_I2C8	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_I2C8	/;"	d
SRST_P_INTMEM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTMEM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTMEM	/;"	d
SRST_P_INTR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR	/;"	d
SRST_P_INTR_ARB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB	/;"	d
SRST_P_INTR_ARB_PMU	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_INTR_ARB_PMU	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_INTR_ARB_PMU	/;"	d
SRST_P_MAILBOX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX	/;"	d
SRST_P_MAILBOX0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MAILBOX0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MAILBOX0	/;"	d
SRST_P_MIPI_DSI0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI0	/;"	d
SRST_P_MIPI_DSI1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_MIPI_DSI1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_MIPI_DSI1	/;"	d
SRST_P_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_NOC	/;"	d
SRST_P_PCIE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PCIE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PCIE	/;"	d
SRST_P_PERIHP_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_GRF	/;"	d
SRST_P_PERIHP_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERIHP_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERIHP_NOC	/;"	d
SRST_P_PERILP1_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_GRF	/;"	d
SRST_P_PERILP1_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_NOC	/;"	d
SRST_P_PERILP1_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PERILP1_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PERILP1_SGRF	/;"	d
SRST_P_PMUGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_PMUGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_PMUGRF	/;"	d
SRST_P_RKPWM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_RKPWM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_RKPWM	/;"	d
SRST_P_SARADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SARADC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SARADC	/;"	d
SRST_P_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SGRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SGRF	/;"	d
SRST_P_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI0	/;"	d
SRST_P_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI1	/;"	d
SRST_P_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI2	/;"	d
SRST_P_SPI3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI3	/;"	d
SRST_P_SPI4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI4	/;"	d
SRST_P_SPI6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_SPI6	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_SPI6	/;"	d
SRST_P_TIMER0_5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER0_5	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER0_5	/;"	d
SRST_P_TIMER6_11	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER6_11	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER6_11	/;"	d
SRST_P_TIMER_0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0	/;"	d
SRST_P_TIMER_0_1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_0_1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_0_1	/;"	d
SRST_P_TIMER_1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TIMER_1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TIMER_1	/;"	d
SRST_P_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_TSADC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_TSADC	/;"	d
SRST_P_UART0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART0	/;"	d
SRST_P_UART1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART1	/;"	d
SRST_P_UART2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART2	/;"	d
SRST_P_UART3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART3	/;"	d
SRST_P_UART4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UART4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UART4	/;"	d
SRST_P_UPHY0_APB	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_APB	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_APB	/;"	d
SRST_P_UPHY0_DPTX	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_DPTX	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_DPTX	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPDCTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPDCTRL	/;"	d
SRST_P_UPHY0_TCPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY0_TCPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY0_TCPHY	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPDCTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPDCTRL	/;"	d
SRST_P_UPHY1_TCPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_UPHY1_TCPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_UPHY1_TCPHY	/;"	d
SRST_P_WDT	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT	/;"	d
SRST_P_WDT0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT0	/;"	d
SRST_P_WDT1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_P_WDT1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_P_WDT1	/;"	d
SRST_RGA_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AHB	/;"	d
SRST_RGA_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_AXI	/;"	d
SRST_RGA_CORE	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_RGA_CORE	/;"	d
SRST_RGA_H2P_BRG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_H2P_BRG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_H2P_BRG	/;"	d
SRST_RGA_NIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RGA_NIU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RGA_NIU	/;"	d
SRST_RKPWM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_RKPWM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_RKPWM	/;"	d
SRST_ROM	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_ROM	/;"	d
SRST_ROM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_ROM	/;"	d
SRST_SARADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SARADC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SARADC	/;"	d
SRST_SDIO	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SDIO	/;"	d
SRST_SDIO0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIO0	/;"	d
SRST_SDIO1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIO1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SDIO1	/;"	d
SRST_SDIOAUDIO_BRG	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_BRG	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_BRG	/;"	d
SRST_SDIOAUDIO_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDIOAUDIO_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDIOAUDIO_NOC	/;"	d
SRST_SDMMC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SDMMC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SDMMC	/;"	d
SRST_SD_NOC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SD_NOC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SD_NOC	/;"	d
SRST_SFC	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SFC	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SFC	/;"	d
SRST_SGRF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SGRF	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SGRF	/;"	d
SRST_SIMC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SIMC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SIMC	/;"	d
SRST_SPDIF	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF	/;"	d
SRST_SPDIF8CH	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF8CH	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPDIF8CH	/;"	d
SRST_SPDIF_8CH	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPDIF_8CH	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPDIF_8CH	/;"	d
SRST_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI0	/;"	d
SRST_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI1	/;"	d
SRST_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI2	/;"	d
SRST_SPI3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI3	/;"	d
SRST_SPI4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI4	/;"	d
SRST_SPI6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_SPI6	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_SPI6	/;"	d
SRST_STRC_SYS_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_STRC_SYS_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_STRC_SYS_A	/;"	d
SRST_S_DP_CTRL	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_S_DP_CTRL	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_S_DP_CTRL	/;"	d
SRST_TIMER	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER	/;"	d
SRST_TIMER0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER0	/;"	d
SRST_TIMER1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER1	/;"	d
SRST_TIMER10	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER10	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER10	/;"	d
SRST_TIMER11	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER11	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER11	/;"	d
SRST_TIMER2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER2	/;"	d
SRST_TIMER3	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER3	/;"	d
SRST_TIMER4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER4	/;"	d
SRST_TIMER5	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER5	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER5	/;"	d
SRST_TIMER6	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER6	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER6	/;"	d
SRST_TIMER7	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER7	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER7	/;"	d
SRST_TIMER8	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER8	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER8	/;"	d
SRST_TIMER9	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TIMER9	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TIMER9	/;"	d
SRST_TOPDBG	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TOPDBG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TOPDBG	/;"	d
SRST_TPIU	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TPIU	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TPIU	/;"	d
SRST_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSADC	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TSADC	/;"	d
SRST_TSP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP	/;"	d
SRST_TSP_27M	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_27M	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_27M	/;"	d
SRST_TSP_CLKIN0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN0	/;"	d
SRST_TSP_CLKIN1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TSP_CLKIN1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TSP_CLKIN1	/;"	d
SRST_TZMA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZMA	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_TZMA	/;"	d
SRST_TZPC	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_TZPC	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_TZPC	/;"	d
SRST_UART0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART0	/;"	d
SRST_UART1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART1	/;"	d
SRST_UART2	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART2	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART2	/;"	d
SRST_UART3	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART3	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART3	/;"	d
SRST_UART4	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_UART4	/;"	d
SRST_UART4	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UART4	/;"	d
SRST_UPHY0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0	/;"	d
SRST_UPHY0_PIPE_L00	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_PIPE_L00	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_PIPE_L00	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY0_TCPDPWRUP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY0_TCPDPWRUP	/;"	d
SRST_UPHY1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1	/;"	d
SRST_UPHY1_PIPE_L00	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_PIPE_L00	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_PIPE_L00	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_UPHY1_TCPDPWRUP	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_UPHY1_TCPDPWRUP	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_EHCIPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_EHCIPHY	/;"	d
SRST_USB2PHY0_POR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_POR	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_POR	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT0	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY0_UTMI_PORT1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY0_UTMI_PORT1	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_EHCIPHY	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_EHCIPHY	/;"	d
SRST_USB2PHY1_POR	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_POR	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_POR	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT0	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USB2PHY1_UTMI_PORT1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USB2PHY1_UTMI_PORT1	/;"	d
SRST_USBHOST0	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST0	/;"	d
SRST_USBHOST0_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_AHB	/;"	d
SRST_USBHOST0_CON	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_CON	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_CON	/;"	d
SRST_USBHOST0_PHY	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST0_PHY	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST0_PHY	/;"	d
SRST_USBHOST1	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_USBHOST1	/;"	d
SRST_USBHOST1_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_AHB	/;"	d
SRST_USBHOST1_CON	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_CON	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_CON	/;"	d
SRST_USBHOST1_PHY	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBHOST1_PHY	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBHOST1_PHY	/;"	d
SRST_USBOTG0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG0	/;"	d
SRST_USBOTG1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBOTG1	/;"	d
SRST_USBOTG_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_AHB	/;"	d
SRST_USBOTG_CON	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_CON	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_CON	/;"	d
SRST_USBOTG_PHY	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBOTG_PHY	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USBOTG_PHY	/;"	d
SRST_USBPOR	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USBPOR	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USBPOR	/;"	d
SRST_USB_ADP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_ADP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_ADP	/;"	d
SRST_USB_PERI	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_USB_PERI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_USB_PERI	/;"	d
SRST_UTMI0	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI0	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI0	/;"	d
SRST_UTMI1	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_UTMI1	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_UTMI1	/;"	d
SRST_VCODEC_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_A	/;"	d
SRST_VCODEC_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AHB	/;"	d
SRST_VCODEC_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VCODEC_AXI	/;"	d
SRST_VCODEC_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_H	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_H	/;"	d
SRST_VCODEC_NIU_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VCODEC_NIU_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VCODEC_NIU_A	/;"	d
SRST_VDU_CA	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CA	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CA	/;"	d
SRST_VDU_CORE	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VDU_CORE	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VDU_CORE	/;"	d
SRST_VIO0_H2P_BRG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_H2P_BRG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_H2P_BRG	/;"	d
SRST_VIO0_NIU_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO0_NIU_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO0_NIU_AXI	/;"	d
SRST_VIO1_A	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_A	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO1_A	/;"	d
SRST_VIO1_H2P_BRG	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_H2P_BRG	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_H2P_BRG	/;"	d
SRST_VIO1_NIU_AXI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO1_NIU_AXI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO1_NIU_AXI	/;"	d
SRST_VIO_ARBI	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_ARBI	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_ARBI	/;"	d
SRST_VIO_BUS_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_BUS_H	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_VIO_BUS_H	/;"	d
SRST_VIO_GRF	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_GRF	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VIO_GRF	/;"	d
SRST_VIO_H2P	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_H2P	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_H2P	/;"	d
SRST_VIO_NIU_AHB	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIO_NIU_AHB	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIO_NIU_AHB	/;"	d
SRST_VIP	arch/arm/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	arch/microblaze/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	arch/mips/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	arch/nios2/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	arch/sandbox/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	arch/x86/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	arch/xtensa/dts/include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VIP	include/dt-bindings/clock/rk3288-cru.h	/^#define SRST_VIP	/;"	d
SRST_VOP0_PWM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP0_PWM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP0_PWM	/;"	d
SRST_VOP1_PWM	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_VOP1_PWM	include/dt-bindings/clock/rk3399-cru.h	/^#define SRST_VOP1_PWM	/;"	d
SRST_WDT	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRST_WDT	include/dt-bindings/clock/rk3036-cru.h	/^#define SRST_WDT	/;"	d
SRT	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 SRT;		\/* self-refresh temperature: 0=normal, 1=extended *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
SRTC_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SRTC_BASE_ADDR	/;"	d
SRWDTO_29	drivers/mmc/sh_mmcif.h	/^#define SRWDTO_29	/;"	d
SR_1000T_ASYM_PAUSE_DIR	drivers/net/e1000.h	/^#define SR_1000T_ASYM_PAUSE_DIR	/;"	d
SR_1000T_IDLE_ERROR_CNT	drivers/net/e1000.h	/^#define SR_1000T_IDLE_ERROR_CNT	/;"	d
SR_1000T_LOCAL_RX_STATUS	drivers/net/e1000.h	/^#define SR_1000T_LOCAL_RX_STATUS	/;"	d
SR_1000T_LOCAL_RX_STATUS_SHIFT	drivers/net/e1000.h	/^#define SR_1000T_LOCAL_RX_STATUS_SHIFT	/;"	d
SR_1000T_LP_FD_CAPS	drivers/net/e1000.h	/^#define SR_1000T_LP_FD_CAPS	/;"	d
SR_1000T_LP_HD_CAPS	drivers/net/e1000.h	/^#define SR_1000T_LP_HD_CAPS	/;"	d
SR_1000T_MS_CONFIG_FAULT	drivers/net/e1000.h	/^#define SR_1000T_MS_CONFIG_FAULT	/;"	d
SR_1000T_MS_CONFIG_RES	drivers/net/e1000.h	/^#define SR_1000T_MS_CONFIG_RES	/;"	d
SR_1000T_REMOTE_RX_STATUS	drivers/net/e1000.h	/^#define SR_1000T_REMOTE_RX_STATUS	/;"	d
SR_1000T_REMOTE_RX_STATUS_SHIFT	drivers/net/e1000.h	/^#define SR_1000T_REMOTE_RX_STATUS_SHIFT /;"	d
SR_ACK	drivers/i2c/fti2c010.h	/^#define SR_ACK /;"	d
SR_ASID	arch/microblaze/include/asm/ptrace.h	/^#define SR_ASID	/;"	d
SR_BB	drivers/i2c/fti2c010.h	/^#define SR_BB /;"	d
SR_BP0	drivers/mtd/spi/sf_internal.h	/^#define SR_BP0	/;"	d
SR_BP1	drivers/mtd/spi/sf_internal.h	/^#define SR_BP1	/;"	d
SR_BP2	drivers/mtd/spi/sf_internal.h	/^#define SR_BP2	/;"	d
SR_BUSY	drivers/i2c/fti2c010.h	/^#define SR_BUSY /;"	d
SR_BUSY	drivers/spi/designware_spi.c	/^#define SR_BUSY	/;"	d	file:
SR_BUSY	drivers/spi/rk_spi.h	/^	SR_BUSY		= 1 << 0,$/;"	e	enum:__anondde5bacc0203
SR_C	arch/avr32/include/asm/ptrace.h	/^#define SR_C	/;"	d
SR_CLRAL	drivers/i2c/fti2c010.h	/^#define SR_CLRAL /;"	d
SR_CLRGC	drivers/i2c/fti2c010.h	/^#define SR_CLRGC /;"	d
SR_CLRNAKR	drivers/i2c/fti2c010.h	/^#define SR_CLRNAKR /;"	d
SR_CLRSAM	drivers/i2c/fti2c010.h	/^#define SR_CLRSAM /;"	d
SR_CLRSTOP	drivers/i2c/fti2c010.h	/^#define SR_CLRSTOP /;"	d
SR_CTBP	arch/microblaze/include/asm/ptrace.h	/^#define SR_CTBP	/;"	d
SR_CTPC	arch/microblaze/include/asm/ptrace.h	/^#define SR_CTPC	/;"	d
SR_CTPSW	arch/microblaze/include/asm/ptrace.h	/^#define SR_CTPSW	/;"	d
SR_D	arch/avr32/include/asm/ptrace.h	/^#define SR_D	/;"	d
SR_DBPC	arch/microblaze/include/asm/ptrace.h	/^#define SR_DBPC	/;"	d
SR_DBPSW	arch/microblaze/include/asm/ptrace.h	/^#define SR_DBPSW	/;"	d
SR_DCOL	drivers/spi/designware_spi.c	/^#define SR_DCOL	/;"	d	file:
SR_DIR	arch/microblaze/include/asm/ptrace.h	/^#define SR_DIR	/;"	d
SR_DM	arch/avr32/include/asm/ptrace.h	/^#define SR_DM	/;"	d
SR_DR	drivers/i2c/fti2c010.h	/^#define SR_DR /;"	d
SR_DT	drivers/i2c/fti2c010.h	/^#define SR_DT /;"	d
SR_ECR	arch/microblaze/include/asm/ptrace.h	/^#define SR_ECR	/;"	d
SR_EIPC	arch/microblaze/include/asm/ptrace.h	/^#define SR_EIPC	/;"	d
SR_EIPSW	arch/microblaze/include/asm/ptrace.h	/^#define SR_EIPSW	/;"	d
SR_EM	arch/avr32/include/asm/ptrace.h	/^#define SR_EM	/;"	d
SR_EM_BIT	arch/avr32/include/asm/ptrace.h	/^#define SR_EM_BIT	/;"	d
SR_FEPC	arch/microblaze/include/asm/ptrace.h	/^#define SR_FEPC	/;"	d
SR_FEPSW	arch/microblaze/include/asm/ptrace.h	/^#define SR_FEPSW	/;"	d
SR_GM	arch/avr32/include/asm/ptrace.h	/^#define SR_GM	/;"	d
SR_GM_BIT	arch/avr32/include/asm/ptrace.h	/^#define SR_GM_BIT	/;"	d
SR_H	arch/avr32/include/asm/ptrace.h	/^#define SR_H	/;"	d
SR_I0M	arch/avr32/include/asm/ptrace.h	/^#define SR_I0M	/;"	d
SR_I0M_BIT	arch/avr32/include/asm/ptrace.h	/^#define SR_I0M_BIT	/;"	d
SR_I1M	arch/avr32/include/asm/ptrace.h	/^#define SR_I1M	/;"	d
SR_I1M_BIT	arch/avr32/include/asm/ptrace.h	/^#define SR_I1M_BIT	/;"	d
SR_I2M	arch/avr32/include/asm/ptrace.h	/^#define SR_I2M	/;"	d
SR_I2M_BIT	arch/avr32/include/asm/ptrace.h	/^#define SR_I2M_BIT	/;"	d
SR_I3M	arch/avr32/include/asm/ptrace.h	/^#define SR_I3M	/;"	d
SR_I3M_BIT	arch/avr32/include/asm/ptrace.h	/^#define SR_I3M_BIT	/;"	d
SR_IDLE_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	SR_IDLE_MASK			= 0x1ff,$/;"	e	enum:__anon957231910203	file:
SR_IDLE_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	SR_IDLE_SHIFT			= 0,$/;"	e	enum:__anon957231910203	file:
SR_INIT	arch/avr32/cpu/start.S	/^#define SR_INIT /;"	d	file:
SR_J	arch/avr32/include/asm/ptrace.h	/^#define SR_J	/;"	d
SR_MASK	drivers/spi/designware_spi.c	/^#define SR_MASK	/;"	d	file:
SR_MASK	drivers/spi/rk_spi.h	/^	SR_MASK		= 0x7f,$/;"	e	enum:__anondde5bacc0203
SR_MASK_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_MASK_D	board/ms7722se/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_MASK_D	board/renesas/MigoR/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_MASK_D	board/renesas/ap325rxa/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_MASK_D	board/renesas/ecovec/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_MASK_D	board/renesas/r0p7734/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_MASK_D	board/renesas/sh7763rdp/lowlevel_init.S	/^SR_MASK_D:	.long	0xEFFFFF0F$/;"	l
SR_N	arch/avr32/include/asm/ptrace.h	/^#define SR_N	/;"	d
SR_PMIC_SCL	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SR_PMIC_SCL	/;"	d
SR_PMIC_SDA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SR_PMIC_SDA	/;"	d
SR_PSW	arch/microblaze/include/asm/ptrace.h	/^#define SR_PSW	/;"	d
SR_Q	arch/avr32/include/asm/ptrace.h	/^#define SR_Q	/;"	d
SR_R	arch/avr32/include/asm/ptrace.h	/^#define SR_R	/;"	d
SR_RF_EMPT	drivers/spi/rk_spi.h	/^	SR_RF_EMPT	= 1 << 3,$/;"	e	enum:__anondde5bacc0203
SR_RF_FULL	drivers/spi/designware_spi.c	/^#define SR_RF_FULL	/;"	d	file:
SR_RF_FULL	drivers/spi/rk_spi.h	/^	SR_RF_FULL	= 1 << 4,$/;"	e	enum:__anondde5bacc0203
SR_RF_NOT_EMPT	drivers/spi/designware_spi.c	/^#define SR_RF_NOT_EMPT	/;"	d	file:
SR_RW	drivers/i2c/fti2c010.h	/^#define SR_RW /;"	d
SR_RX_FIFO_FULL	drivers/serial/serial_xuartlite.c	/^#define SR_RX_FIFO_FULL	/;"	d	file:
SR_RX_FIFO_VALID_DATA	drivers/serial/serial_xuartlite.c	/^#define SR_RX_FIFO_VALID_DATA	/;"	d	file:
SR_TF_EMPT	drivers/spi/designware_spi.c	/^#define SR_TF_EMPT	/;"	d	file:
SR_TF_EMPT	drivers/spi/rk_spi.h	/^	SR_TF_EMPT	= 1 << 2,$/;"	e	enum:__anondde5bacc0203
SR_TF_FULL	drivers/spi/rk_spi.h	/^	SR_TF_FULL	= 1 << 1,$/;"	e	enum:__anondde5bacc0203
SR_TF_NOT_FULL	drivers/spi/designware_spi.c	/^#define SR_TF_NOT_FULL	/;"	d	file:
SR_TX_ERR	drivers/spi/designware_spi.c	/^#define SR_TX_ERR	/;"	d	file:
SR_TX_FIFO_EMPTY	drivers/serial/serial_xuartlite.c	/^#define SR_TX_FIFO_EMPTY	/;"	d	file:
SR_TX_FIFO_FULL	drivers/serial/serial_xuartlite.c	/^#define SR_TX_FIFO_FULL	/;"	d	file:
SR_V	arch/avr32/include/asm/ptrace.h	/^#define SR_V	/;"	d
SR_Z	arch/avr32/include/asm/ptrace.h	/^#define SR_Z	/;"	d
SRes	lib/lzma/Types.h	/^typedef int SRes;$/;"	t	typeref:typename:int
SS	arch/x86/include/asm/ptrace.h	/^#define SS /;"	d
SS	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 CS, DS, SS, ES, FS, GS;$/;"	m	struct:i386_segment_regs	typeref:typename:u16
SS1_SDATA2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SS1_SDATA2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSC	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define SSC	/;"	d
SSCOLPQS	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOLPQS	/;"	d	file:
SSCOPE	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOPE	/;"	d	file:
SSCOPPQSEF	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOPPQSEF	/;"	d	file:
SSCOQAD	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOQAD	/;"	d	file:
SSCOQM	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOQM	/;"	d	file:
SSCOQSZ	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOQSZ	/;"	d	file:
SSCOQWN	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCOQWN	/;"	d	file:
SSCO_BASE	arch/arm/mach-uniphier/arm32/lowlevel_init.S	/^#define SSCO_BASE	/;"	d	file:
SSCR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SSCR0	/;"	d
SSCR0_CeilSerClkDiv	include/SA-1100.h	/^#define SSCR0_CeilSerClkDiv(/;"	d
SSCR0_DATASIZE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_DATASIZE(/;"	d
SSCR0_DSS	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_DSS	/;"	d
SSCR0_DSS	include/SA-1100.h	/^#define SSCR0_DSS	/;"	d
SSCR0_DataSize	include/SA-1100.h	/^#define SSCR0_DataSize(/;"	d
SSCR0_ECS	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_ECS	/;"	d
SSCR0_FRF	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_FRF	/;"	d
SSCR0_FRF	include/SA-1100.h	/^#define SSCR0_FRF	/;"	d
SSCR0_MOTO	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_MOTO	/;"	d
SSCR0_Motorola	include/SA-1100.h	/^#define SSCR0_Motorola	/;"	d
SSCR0_NATIONAL	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_NATIONAL	/;"	d
SSCR0_National	include/SA-1100.h	/^#define SSCR0_National	/;"	d
SSCR0_SCR	include/SA-1100.h	/^#define SSCR0_SCR	/;"	d
SSCR0_SSE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_SSE	/;"	d
SSCR0_SSE	include/SA-1100.h	/^#define SSCR0_SSE	/;"	d
SSCR0_SerClkDiv	include/SA-1100.h	/^#define SSCR0_SerClkDiv(/;"	d
SSCR0_TI	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR0_TI	/;"	d
SSCR0_TI	include/SA-1100.h	/^#define SSCR0_TI	/;"	d
SSCR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SSCR1	/;"	d
SSCR1_ECS	include/SA-1100.h	/^#define SSCR1_ECS	/;"	d
SSCR1_ExtClk	include/SA-1100.h	/^#define SSCR1_ExtClk	/;"	d
SSCR1_IntClk	include/SA-1100.h	/^#define SSCR1_IntClk	/;"	d
SSCR1_LBM	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_LBM	/;"	d
SSCR1_LBM	include/SA-1100.h	/^#define SSCR1_LBM	/;"	d
SSCR1_MWDS	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_MWDS	/;"	d
SSCR1_RFT	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_RFT	/;"	d
SSCR1_RIE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_RIE	/;"	d
SSCR1_RIE	include/SA-1100.h	/^#define SSCR1_RIE	/;"	d
SSCR1_RXTRESH	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_RXTRESH(/;"	d
SSCR1_SClk1P	include/SA-1100.h	/^#define SSCR1_SClk1P	/;"	d
SSCR1_SClk1_2P	include/SA-1100.h	/^#define SSCR1_SClk1_2P	/;"	d
SSCR1_SClkIactH	include/SA-1100.h	/^#define SSCR1_SClkIactH	/;"	d
SSCR1_SClkIactL	include/SA-1100.h	/^#define SSCR1_SClkIactL	/;"	d
SSCR1_SP	include/SA-1100.h	/^#define SSCR1_SP	/;"	d
SSCR1_SPH	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_SPH	/;"	d
SSCR1_SPO	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_SPO	/;"	d
SSCR1_SPO	include/SA-1100.h	/^#define SSCR1_SPO	/;"	d
SSCR1_TFT	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_TFT	/;"	d
SSCR1_TIE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_TIE	/;"	d
SSCR1_TIE	include/SA-1100.h	/^#define SSCR1_TIE	/;"	d
SSCR1_TINTE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_TINTE	/;"	d
SSCR1_TXTRESH	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSCR1_TXTRESH(/;"	d
SSC_DEPTH	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SSC_DEPTH	/;"	d
SSC_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SSC_FUNC_EN_N	/;"	d
SSC_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define SSC_FUNC_EN_N	/;"	d
SSC_MODE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SSC_MODE	/;"	d
SSC_OFFSET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SSC_OFFSET	/;"	d
SSD2828_ACR1	drivers/video/ssd2828.c	/^#define		SSD2828_ACR1	/;"	d	file:
SSD2828_ACR2	drivers/video/ssd2828.c	/^#define		SSD2828_ACR2	/;"	d	file:
SSD2828_ACR3	drivers/video/ssd2828.c	/^#define		SSD2828_ACR3	/;"	d	file:
SSD2828_ACR4	drivers/video/ssd2828.c	/^#define		SSD2828_ACR4	/;"	d	file:
SSD2828_ACR5	drivers/video/ssd2828.c	/^#define		SSD2828_ACR5	/;"	d	file:
SSD2828_ARSR	drivers/video/ssd2828.c	/^#define		SSD2828_ARSR	/;"	d	file:
SSD2828_CBCR1	drivers/video/ssd2828.c	/^#define		SSD2828_CBCR1	/;"	d	file:
SSD2828_CBCR2	drivers/video/ssd2828.c	/^#define		SSD2828_CBCR2	/;"	d	file:
SSD2828_CBSR	drivers/video/ssd2828.c	/^#define		SSD2828_CBSR	/;"	d	file:
SSD2828_CCR	drivers/video/ssd2828.c	/^#define		SSD2828_CCR	/;"	d	file:
SSD2828_CFGR	drivers/video/ssd2828.c	/^#define		SSD2828_CFGR	/;"	d	file:
SSD2828_CFGR_CKE	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_CKE	/;"	d	file:
SSD2828_CFGR_CSS	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_CSS	/;"	d	file:
SSD2828_CFGR_DCS	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_DCS	/;"	d	file:
SSD2828_CFGR_ECD	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_ECD	/;"	d	file:
SSD2828_CFGR_EOT	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_EOT	/;"	d	file:
SSD2828_CFGR_HCLK	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_HCLK	/;"	d	file:
SSD2828_CFGR_HS	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_HS	/;"	d	file:
SSD2828_CFGR_LPE	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_LPE	/;"	d	file:
SSD2828_CFGR_REN	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_REN	/;"	d	file:
SSD2828_CFGR_SLP	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_SLP	/;"	d	file:
SSD2828_CFGR_TXD	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_TXD	/;"	d	file:
SSD2828_CFGR_VEN	drivers/video/ssd2828.c	/^#define	SSD2828_CFGR_VEN	/;"	d	file:
SSD2828_DAR1	drivers/video/ssd2828.c	/^#define		SSD2828_DAR1	/;"	d	file:
SSD2828_DAR2	drivers/video/ssd2828.c	/^#define		SSD2828_DAR2	/;"	d	file:
SSD2828_DAR3	drivers/video/ssd2828.c	/^#define		SSD2828_DAR3	/;"	d	file:
SSD2828_DAR4	drivers/video/ssd2828.c	/^#define		SSD2828_DAR4	/;"	d	file:
SSD2828_DAR5	drivers/video/ssd2828.c	/^#define		SSD2828_DAR5	/;"	d	file:
SSD2828_DAR6	drivers/video/ssd2828.c	/^#define		SSD2828_DAR6	/;"	d	file:
SSD2828_DAR7	drivers/video/ssd2828.c	/^#define		SSD2828_DAR7	/;"	d	file:
SSD2828_DIR	drivers/video/ssd2828.c	/^#define		SSD2828_DIR	/;"	d	file:
SSD2828_DLYA01	drivers/video/ssd2828.c	/^#define		SSD2828_DLYA01	/;"	d	file:
SSD2828_DLYA23	drivers/video/ssd2828.c	/^#define		SSD2828_DLYA23	/;"	d	file:
SSD2828_DLYB01	drivers/video/ssd2828.c	/^#define		SSD2828_DLYB01	/;"	d	file:
SSD2828_DLYB23	drivers/video/ssd2828.c	/^#define		SSD2828_DLYB23	/;"	d	file:
SSD2828_DLYC01	drivers/video/ssd2828.c	/^#define		SSD2828_DLYC01	/;"	d	file:
SSD2828_DLYC23	drivers/video/ssd2828.c	/^#define		SSD2828_DLYC23	/;"	d	file:
SSD2828_ECR	drivers/video/ssd2828.c	/^#define		SSD2828_ECR	/;"	d	file:
SSD2828_ESR	drivers/video/ssd2828.c	/^#define		SSD2828_ESR	/;"	d	file:
SSD2828_GPIO1	drivers/video/ssd2828.c	/^#define		SSD2828_GPIO1	/;"	d	file:
SSD2828_GPIO2	drivers/video/ssd2828.c	/^#define		SSD2828_GPIO2	/;"	d	file:
SSD2828_HTTR1	drivers/video/ssd2828.c	/^#define		SSD2828_HTTR1	/;"	d	file:
SSD2828_HTTR2	drivers/video/ssd2828.c	/^#define		SSD2828_HTTR2	/;"	d	file:
SSD2828_ICR	drivers/video/ssd2828.c	/^#define		SSD2828_ICR	/;"	d	file:
SSD2828_IOCR	drivers/video/ssd2828.c	/^#define		SSD2828_IOCR	/;"	d	file:
SSD2828_ISR	drivers/video/ssd2828.c	/^#define		SSD2828_ISR	/;"	d	file:
SSD2828_LCFR	drivers/video/ssd2828.c	/^#define		SSD2828_LCFR	/;"	d	file:
SSD2828_LCR	drivers/video/ssd2828.c	/^#define		SSD2828_LCR	/;"	d	file:
SSD2828_LP_CLOCK_DIVIDER	drivers/video/ssd2828.c	/^#define	SSD2828_LP_CLOCK_DIVIDER(/;"	d	file:
SSD2828_LRR	drivers/video/ssd2828.c	/^#define		SSD2828_LRR	/;"	d	file:
SSD2828_LRTR1	drivers/video/ssd2828.c	/^#define		SSD2828_LRTR1	/;"	d	file:
SSD2828_LRTR2	drivers/video/ssd2828.c	/^#define		SSD2828_LRTR2	/;"	d	file:
SSD2828_MRSR	drivers/video/ssd2828.c	/^#define		SSD2828_MRSR	/;"	d	file:
SSD2828_OCR	drivers/video/ssd2828.c	/^#define		SSD2828_OCR	/;"	d	file:
SSD2828_PCR	drivers/video/ssd2828.c	/^#define		SSD2828_PCR	/;"	d	file:
SSD2828_PDR	drivers/video/ssd2828.c	/^#define		SSD2828_PDR	/;"	d	file:
SSD2828_PLCR	drivers/video/ssd2828.c	/^#define		SSD2828_PLCR	/;"	d	file:
SSD2828_PLLR	drivers/video/ssd2828.c	/^#define		SSD2828_PLLR	/;"	d	file:
SSD2828_PSCR1	drivers/video/ssd2828.c	/^#define		SSD2828_PSCR1	/;"	d	file:
SSD2828_PSCR2	drivers/video/ssd2828.c	/^#define		SSD2828_PSCR2	/;"	d	file:
SSD2828_PSCR3	drivers/video/ssd2828.c	/^#define		SSD2828_PSCR3	/;"	d	file:
SSD2828_PUCR1	drivers/video/ssd2828.c	/^#define		SSD2828_PUCR1	/;"	d	file:
SSD2828_PUCR2	drivers/video/ssd2828.c	/^#define		SSD2828_PUCR2	/;"	d	file:
SSD2828_PUCR3	drivers/video/ssd2828.c	/^#define		SSD2828_PUCR3	/;"	d	file:
SSD2828_RDCR	drivers/video/ssd2828.c	/^#define		SSD2828_RDCR	/;"	d	file:
SSD2828_RR	drivers/video/ssd2828.c	/^#define		SSD2828_RR	/;"	d	file:
SSD2828_TECR	drivers/video/ssd2828.c	/^#define		SSD2828_TECR	/;"	d	file:
SSD2828_TMR	drivers/video/ssd2828.c	/^#define		SSD2828_TMR	/;"	d	file:
SSD2828_TR	drivers/video/ssd2828.c	/^#define		SSD2828_TR	/;"	d	file:
SSD2828_TSR	drivers/video/ssd2828.c	/^#define		SSD2828_TSR	/;"	d	file:
SSD2828_VCR	drivers/video/ssd2828.c	/^#define		SSD2828_VCR	/;"	d	file:
SSD2828_VICR1	drivers/video/ssd2828.c	/^#define		SSD2828_VICR1	/;"	d	file:
SSD2828_VICR2	drivers/video/ssd2828.c	/^#define		SSD2828_VICR2	/;"	d	file:
SSD2828_VICR3	drivers/video/ssd2828.c	/^#define		SSD2828_VICR3	/;"	d	file:
SSD2828_VICR4	drivers/video/ssd2828.c	/^#define		SSD2828_VICR4	/;"	d	file:
SSD2828_VICR5	drivers/video/ssd2828.c	/^#define		SSD2828_VICR5	/;"	d	file:
SSD2828_VICR6	drivers/video/ssd2828.c	/^#define		SSD2828_VICR6	/;"	d	file:
SSD2828_VICR7	drivers/video/ssd2828.c	/^#define		SSD2828_VICR7	/;"	d	file:
SSD2828_VIDEO_MODE_BURST	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_MODE_BURST	/;"	d	file:
SSD2828_VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS	/;"	d	file:
SSD2828_VIDEO_MODE_NON_BURST_WITH_SYNC_PULSES	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_MODE_NON_BURST_WITH_SYNC_PULSES	/;"	d	file:
SSD2828_VIDEO_PIXEL_FORMAT_16BPP	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_PIXEL_FORMAT_16BPP	/;"	d	file:
SSD2828_VIDEO_PIXEL_FORMAT_18BPP_LOOSELY_PACKED	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_PIXEL_FORMAT_18BPP_LOOSELY_PACKED	/;"	d	file:
SSD2828_VIDEO_PIXEL_FORMAT_18BPP_PACKED	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_PIXEL_FORMAT_18BPP_PACKED	/;"	d	file:
SSD2828_VIDEO_PIXEL_FORMAT_24BPP	drivers/video/ssd2828.c	/^#define	SSD2828_VIDEO_PIXEL_FORMAT_24BPP	/;"	d	file:
SSD2828_VSDR	drivers/video/ssd2828.c	/^#define		SSD2828_VSDR	/;"	d	file:
SSDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SSDR	/;"	d
SSDR_DATA	include/SA-1100.h	/^#define SSDR_DATA	/;"	d
SSEL	arch/blackfin/include/asm/clock.h	/^# define SSEL /;"	d
SSEL	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define SSEL	/;"	d
SSEL_P	arch/blackfin/include/asm/clock.h	/^# define SSEL_P /;"	d
SSEL_P	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define SSEL_P	/;"	d
SSE_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SSE_BASE_ADDR	/;"	d
SSFC_RESERVED	drivers/spi/ich.h	/^	SSFC_RESERVED =		0xf80000,$/;"	e	enum:__anon07fadeb80203
SSFC_SCF_33MHZ	drivers/spi/ich.h	/^	SSFC_SCF_33MHZ	=	0x01,$/;"	e	enum:__anon07fadeb80203
SSFC_SCF_MASK	drivers/spi/ich.h	/^	SSFC_SCF_MASK =		0x070000,$/;"	e	enum:__anon07fadeb80203
SSFS_AEL	drivers/spi/ich.h	/^	SSFS_AEL =		0x0010,$/;"	e	enum:__anon07fadeb80103
SSFS_RESERVED_MASK	drivers/spi/ich.h	/^	SSFS_RESERVED_MASK =	0x7fe2$/;"	e	enum:__anon07fadeb80103
SSI	include/sym53c8xx.h	/^  #define   SSI /;"	d
SSI0_ADATA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_ADATA /;"	d
SSI0_CLKDIV	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_CLKDIV /;"	d
SSI0_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_CONFIG /;"	d
SSI0_CONTROL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_CONTROL /;"	d
SSI0_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_INT /;"	d
SSI0_INT_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_INT_ENABLE /;"	d
SSI0_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI0_STATUS /;"	d
SSI1_ADATA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_ADATA /;"	d
SSI1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SSI1_BASE_ADDR	/;"	d
SSI1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SSI1_BASE_ADDR /;"	d
SSI1_BAUD	arch/arm/include/asm/arch-mx35/clock.h	/^	SSI1_BAUD,$/;"	e	enum:mxc_peri_clock
SSI1_CLKDIV	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_CLKDIV /;"	d
SSI1_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_CONFIG /;"	d
SSI1_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_ENABLE /;"	d
SSI1_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_INT /;"	d
SSI1_INT_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_INT_ENABLE /;"	d
SSI1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SSI1_IPS_BASE_ADDR /;"	d
SSI1_STATUS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI1_STATUS /;"	d
SSI2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SSI2_BASE_ADDR	/;"	d
SSI2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SSI2_BASE_ADDR /;"	d
SSI2_BAUD	arch/arm/include/asm/arch-mx35/clock.h	/^	SSI2_BAUD,$/;"	e	enum:mxc_peri_clock
SSI2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SSI2_IPS_BASE_ADDR /;"	d
SSI3BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SSI3BASE_ADDR	/;"	d
SSI3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SSI3_BASE_ADDR /;"	d
SSI3_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define SSI3_IPS_BASE_ADDR /;"	d
SSICR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SSICR	/;"	d
SSID	include/sym53c8xx.h	/^#define SSID	/;"	d
SSIRDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SSIRDR	/;"	d
SSISR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SSISR	/;"	d
SSITDR	arch/sh/include/asm/cpu_sh7780.h	/^#define	SSITDR	/;"	d
SSITR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SSITR	/;"	d
SSI_ACADD_SSI_ACADD	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACADD_SSI_ACADD(/;"	d
SSI_ACDAT_SSI_ACDAT	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACDAT_SSI_ACDAT(/;"	d
SSI_ACR_AC97EN	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_AC97EN	/;"	d
SSI_ACR_FRDIV	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_FRDIV(/;"	d
SSI_ACR_FRDIV_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_FRDIV_MASK	/;"	d
SSI_ACR_FV	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_FV	/;"	d
SSI_ACR_RD	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_RD	/;"	d
SSI_ACR_TIF	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_TIF	/;"	d
SSI_ACR_WR	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ACR_WR	/;"	d
SSI_ADATA_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_ADATA_ADDR	/;"	d
SSI_ADATA_ADDR_N	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_ADATA_ADDR_N(/;"	d
SSI_ADATA_D	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_ADATA_D	/;"	d
SSI_ADATA_DATA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_ADATA_DATA	/;"	d
SSI_AD_ADDR_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_AD_ADDR_BIT /;"	d
SSI_AD_ADDR_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_AD_ADDR_MASK /;"	d
SSI_AD_D	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_AD_D /;"	d
SSI_AD_DATA_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_AD_DATA_BIT /;"	d
SSI_AD_DATA_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_AD_DATA_MASK /;"	d
SSI_ATAG_DDI_ATAG	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ATAG_DDI_ATAG(/;"	d
SSI_CCR_DC	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_DC(/;"	d
SSI_CCR_DC_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_DC_MASK	/;"	d
SSI_CCR_DIV2	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_DIV2	/;"	d
SSI_CCR_PM	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_PM(/;"	d
SSI_CCR_PM_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_PM_MASK	/;"	d
SSI_CCR_PSR	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_PSR	/;"	d
SSI_CCR_WL	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_WL(/;"	d
SSI_CCR_WL_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CCR_WL_MASK	/;"	d
SSI_CONFIG_AD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_AD	/;"	d
SSI_CONFIG_AD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_AD /;"	d
SSI_CONFIG_ALEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_ALEN	/;"	d
SSI_CONFIG_ALEN_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_ALEN_BIT /;"	d
SSI_CONFIG_ALEN_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_ALEN_MASK /;"	d
SSI_CONFIG_ALEN_N	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_ALEN_N(/;"	d
SSI_CONFIG_AO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_AO	/;"	d
SSI_CONFIG_AO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_AO /;"	d
SSI_CONFIG_BM	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_BM	/;"	d
SSI_CONFIG_BM_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_BM_BIT /;"	d
SSI_CONFIG_BM_CY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_BM_CY	/;"	d
SSI_CONFIG_BM_HI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_BM_HI	/;"	d
SSI_CONFIG_BM_LO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_BM_LO	/;"	d
SSI_CONFIG_BM_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_BM_MASK /;"	d
SSI_CONFIG_CE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_CE	/;"	d
SSI_CONFIG_CE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_CE /;"	d
SSI_CONFIG_DD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DD	/;"	d
SSI_CONFIG_DD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DD /;"	d
SSI_CONFIG_DL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DL	/;"	d
SSI_CONFIG_DL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DL /;"	d
SSI_CONFIG_DLEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DLEN	/;"	d
SSI_CONFIG_DLEN_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DLEN_BIT /;"	d
SSI_CONFIG_DLEN_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DLEN_MASK /;"	d
SSI_CONFIG_DLEN_N	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DLEN_N(/;"	d
SSI_CONFIG_DO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DO	/;"	d
SSI_CONFIG_DO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DO /;"	d
SSI_CONFIG_DP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DP	/;"	d
SSI_CONFIG_DP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_DP /;"	d
SSI_CONFIG_EP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_EP	/;"	d
SSI_CONFIG_EP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONFIG_EP /;"	d
SSI_CONTROL_CD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONTROL_CD /;"	d
SSI_CONTROL_E	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_CONTROL_E /;"	d
SSI_CR_CIS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_CIS	/;"	d
SSI_CR_I2S_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_I2S_MASK	/;"	d
SSI_CR_I2S_MASTER	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_I2S_MASTER	/;"	d
SSI_CR_I2S_NORMAL	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_I2S_NORMAL	/;"	d
SSI_CR_I2S_SLAVE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_I2S_SLAVE	/;"	d
SSI_CR_MCE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_MCE	/;"	d
SSI_CR_NET	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_NET	/;"	d
SSI_CR_RE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_RE	/;"	d
SSI_CR_SSI_EN	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_SSI_EN	/;"	d
SSI_CR_SYN	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_SYN	/;"	d
SSI_CR_TCH	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_TCH	/;"	d
SSI_CR_TE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_CR_TE	/;"	d
SSI_ENABLE_CD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_ENABLE_CD	/;"	d
SSI_ENABLE_E	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_ENABLE_E	/;"	d
SSI_FCSR_RFCNT0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFCNT0(/;"	d
SSI_FCSR_RFCNT0_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFCNT0_MASK	/;"	d
SSI_FCSR_RFCNT1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFCNT1(/;"	d
SSI_FCSR_RFCNT1_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFCNT1_MASK	/;"	d
SSI_FCSR_RFWM0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFWM0(/;"	d
SSI_FCSR_RFWM0_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFWM0_MASK	/;"	d
SSI_FCSR_RFWM1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFWM1(/;"	d
SSI_FCSR_RFWM1_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_RFWM1_MASK	/;"	d
SSI_FCSR_TFCNT0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFCNT0(/;"	d
SSI_FCSR_TFCNT0_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFCNT0_MASK	/;"	d
SSI_FCSR_TFCNT1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFCNT1(/;"	d
SSI_FCSR_TFCNT1_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFCNT1_MASK	/;"	d
SSI_FCSR_TFWM0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFWM0(/;"	d
SSI_FCSR_TFWM0_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFWM0_MASK	/;"	d
SSI_FCSR_TFWM1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFWM1(/;"	d
SSI_FCSR_TFWM1_MASK	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_FCSR_TFWM1_MASK	/;"	d
SSI_IER_CMDAU	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_CMDAU	/;"	d
SSI_IER_CMDU	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_CMDU	/;"	d
SSI_IER_RDMAE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RDMAE	/;"	d
SSI_IER_RDR0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RDR0	/;"	d
SSI_IER_RDR1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RDR1	/;"	d
SSI_IER_RFF0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RFF0	/;"	d
SSI_IER_RFF1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RFF1	/;"	d
SSI_IER_RFS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RFS	/;"	d
SSI_IER_RIE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RIE	/;"	d
SSI_IER_RLS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RLS	/;"	d
SSI_IER_ROE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_ROE0	/;"	d
SSI_IER_ROE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_ROE1	/;"	d
SSI_IER_RXT	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_RXT	/;"	d
SSI_IER_TDE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TDE0	/;"	d
SSI_IER_TDE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TDE1	/;"	d
SSI_IER_TDMAE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TDMAE	/;"	d
SSI_IER_TFE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TFE0	/;"	d
SSI_IER_TFE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TFE1	/;"	d
SSI_IER_TFS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TFS	/;"	d
SSI_IER_TIE	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TIE	/;"	d
SSI_IER_TLS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TLS	/;"	d
SSI_IER_TUE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TUE0	/;"	d
SSI_IER_TUE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_IER_TUE1	/;"	d
SSI_INTEN_DIE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INTEN_DIE	/;"	d
SSI_INTEN_OIE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INTEN_OIE	/;"	d
SSI_INTEN_UIE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INTEN_UIE	/;"	d
SSI_INTE_DIE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INTE_DIE /;"	d
SSI_INTE_OIE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INTE_OIE /;"	d
SSI_INTE_UIE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INTE_UIE /;"	d
SSI_INT_DI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INT_DI	/;"	d
SSI_INT_DI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INT_DI /;"	d
SSI_INT_OI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INT_OI	/;"	d
SSI_INT_OI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INT_OI /;"	d
SSI_INT_UI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INT_UI	/;"	d
SSI_INT_UI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_INT_UI /;"	d
SSI_ISR_CMDAU	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_CMDAU	/;"	d
SSI_ISR_CMDDU	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_CMDDU	/;"	d
SSI_ISR_RDR0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RDR0	/;"	d
SSI_ISR_RDR1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RDR1	/;"	d
SSI_ISR_RFF0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RFF0	/;"	d
SSI_ISR_RFF1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RFF1	/;"	d
SSI_ISR_RFS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RFS	/;"	d
SSI_ISR_RLS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RLS	/;"	d
SSI_ISR_ROE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_ROE0	/;"	d
SSI_ISR_ROE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_ROE1	/;"	d
SSI_ISR_RXT	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_RXT	/;"	d
SSI_ISR_TDE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TDE0	/;"	d
SSI_ISR_TDE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TDE1	/;"	d
SSI_ISR_TFE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TFE0	/;"	d
SSI_ISR_TFE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TFE1	/;"	d
SSI_ISR_TFS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TFS	/;"	d
SSI_ISR_TLS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TLS	/;"	d
SSI_ISR_TUE0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TUE0	/;"	d
SSI_ISR_TUE1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_ISR_TUE1	/;"	d
SSI_RCR_REFS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_REFS	/;"	d
SSI_RCR_RFEN0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RFEN0	/;"	d
SSI_RCR_RFEN1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RFEN1	/;"	d
SSI_RCR_RFSI	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RFSI	/;"	d
SSI_RCR_RFSL	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RFSL	/;"	d
SSI_RCR_RSCKP	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RSCKP	/;"	d
SSI_RCR_RSHFD	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RSHFD	/;"	d
SSI_RCR_RXBIT0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RXBIT0	/;"	d
SSI_RCR_RXEXT	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_RCR_RXEXT	/;"	d
SSI_SCK0129_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK0129_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK0129_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK0129_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK0129_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK0129_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, PCMOE_N_MARK, SSI_SCK0129_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SCK1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK34_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK34_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK34_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK34_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK34_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,$/;"	e	enum:__anona307879b0103	file:
SSI_SCK4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK4_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK4_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK,$/;"	e	enum:__anona307879b0103	file:
SSI_SCK5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SCK5_B_MARK, ETH_TXD1_MARK, VI0_G7_MARK, SCIF2_RXD_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SCK5_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK5_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TX_ER_MARK, SSI_SCK6_B_MARK, ETH_TXD0_MARK, VI0_R2_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SCK6_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK6_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK6_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK6_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DOTCLKOUT1_MARK, CAN_DEBUGOUT12_MARK, SSI_SCK6_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SCK78_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK78_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C1_SCL_C_MARK, AUDIO_CLKA_B_MARK, AVB_MDIO_MARK, SSI_SCK78_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SCK78_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK78_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK78_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK78_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK78_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK78_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SCK78_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT15_MARK, SSI_SCK78_MARK, SCIFA2_SCK_B_MARK, IIC0_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SCK9_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SCK9_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SCK9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA0_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA0_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ADICS_SAMP_B_MARK, AD_DO_B_MARK, SSI_SDATA0_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA1_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA1_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA1_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA1_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA2_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA2_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA2_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA2_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA3_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA3_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA3_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA3_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,$/;"	e	enum:__anona307879b0103	file:
SSI_SDATA4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA4_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA4_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK,$/;"	e	enum:__anona307879b0103	file:
SSI_SDATA5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SDATA5_B_MARK, ETH_MAGIC_MARK, VI0_R1_MARK, SCIF3_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA5_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CAN_DEBUGOUT11_MARK, SSI_SDATA5_MARK, SCIFA3_TXD_MARK, I2C3_SDA_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA5_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_MDC_MARK, SSI_SDATA6_B_MARK, HSCIF0_HRX_MARK, VI0_R4_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA6_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA6_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA6_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA6_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_EXVSYNC_DU1_VSYNC_MARK, CAN_DEBUGOUT14_MARK, SSI_SDATA6_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_RXD_D_MARK, I2C0_SCL_E_MARK, AVB_MAGIC_MARK, SSI_SDATA7_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA7_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA7_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA7_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA7_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA7_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_CDE_MARK, SSI_SDATA7_MARK, SCIFA2_TXD_B_MARK, IRQ8_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA8_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA8_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_PHY_INT_MARK, SSI_SDATA8_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_SDATA8_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA8_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA8_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA8_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA8_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA8_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_SDATA9_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA9_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA9_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA9_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA9_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_SDATA9_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_SDATA9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_STATUS_B	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_B	/;"	d
SSI_STATUS_B	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_B /;"	d
SSI_STATUS_BF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_BF	/;"	d
SSI_STATUS_BF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_BF /;"	d
SSI_STATUS_D	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_D	/;"	d
SSI_STATUS_D	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_D /;"	d
SSI_STATUS_OF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_OF	/;"	d
SSI_STATUS_OF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_OF /;"	d
SSI_STATUS_UF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_UF	/;"	d
SSI_STATUS_UF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SSI_STATUS_UF /;"	d
SSI_TCR_TEFS	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TEFS	/;"	d
SSI_TCR_TFDIR	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TFDIR	/;"	d
SSI_TCR_TFEN0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TFEN0	/;"	d
SSI_TCR_TFEN1	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TFEN1	/;"	d
SSI_TCR_TFSI	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TFSI	/;"	d
SSI_TCR_TFSL	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TFSL	/;"	d
SSI_TCR_TSCKP	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TSCKP	/;"	d
SSI_TCR_TSHFD	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TSHFD	/;"	d
SSI_TCR_TXBIT0	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TXBIT0	/;"	d
SSI_TCR_TXDIR	arch/m68k/include/asm/coldfire/ssi.h	/^#define SSI_TCR_TXDIR	/;"	d
SSI_WS0129_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS0129_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS0129_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS0129_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS0129_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS0129_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	PCMWE_N_MARK, SSI_WS0129_MARK, MSIOF1_TXD_B_MARK, SCIF5_TXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS34_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS34_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS34_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS34_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS34_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,$/;"	e	enum:__anona307879b0103	file:
SSI_WS4_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS4_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS4_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS4_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK,$/;"	e	enum:__anona307879b0103	file:
SSI_WS5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IIC1_SCL_D_MARK, AVB_TXD6_MARK, SSI_WS5_B_MARK, ETH_TX_EN_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS5_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS5_MARK, SCIFA3_RXD_MARK, I2C3_SCL_C_MARK, DU1_DOTCLKOUT0_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS5_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF3_RXD_B_MARK, I2C4_SCL_E_MARK, AVB_GTX_CLK_MARK, SSI_WS6_B_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS6_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS6_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS6_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS6_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_WS6_MARK, SCIFA1_RXD_B_MARK, I2C4_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS78_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS78_B_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS78_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_LINK_MARK, SSI_WS78_B_MARK, HSCIF0_HCTS_N_MARK, VI0_R6_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS78_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS78_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS78_GMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS78_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS78_IMARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS78_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,$/;"	e	enum:__anona3077f190103	file:
SSI_WS78_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DISP_MARK, SSI_WS78_MARK, SCIFA2_RXD_B_MARK, IIC0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
SSI_WS9_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS9_A_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS9_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	SSI_WS9_B_MARK,$/;"	e	enum:__anona307945e0103	file:
SSI_WS9_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,$/;"	e	enum:__anona3077f190103	file:
SSKPD	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SSKPD	/;"	d
SSKPD0	arch/x86/cpu/quark/smc.h	/^#define SSKPD0	/;"	d
SSKPD1	arch/x86/cpu/quark/smc.h	/^#define SSKPD1	/;"	d
SSL_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
SSL_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,$/;"	e	enum:__anona3077f190103	file:
SSL_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,$/;"	e	enum:__anona307879b0103	file:
SSM	include/sym53c8xx.h	/^	#define   SSM /;"	d
SSNOP	arch/mips/include/asm/asm.h	/^#define SSNOP	/;"	d
SSN_DELAY_HALF	drivers/spi/rk_spi.h	/^	SSN_DELAY_HALF	= 0,	\/* 1\/2 sclk_out cycle *\/$/;"	e	enum:__anondde5bacc0103
SSN_DELAY_MASK	drivers/spi/rk_spi.h	/^	SSN_DELAY_MASK	= 1,$/;"	e	enum:__anondde5bacc0103
SSN_DELAY_ONE	drivers/spi/rk_spi.h	/^	SSN_DELAY_ONE	= 1,	\/* 1 sclk_out cycle *\/$/;"	e	enum:__anondde5bacc0103
SSN_DELAY_SHIFT	drivers/spi/rk_spi.h	/^	SSN_DELAY_SHIFT	= 10,	\/* SSN to Sclk_out delay *\/$/;"	e	enum:__anondde5bacc0103
SSO_DQ_NUMBER	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define SSO_DQ_NUMBER	/;"	d
SSP0_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define SSP0_BASE	/;"	d
SSP1_RACC	include/faraday/ftpmu010.h	/^	unsigned int	SSP1_RACC;	\/* 0xA4 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
SSP2_APBCLK	arch/arm/include/asm/arch-armada100/armada100.h	/^#define SSP2_APBCLK	/;"	d
SSP2_FNCLK	arch/arm/include/asm/arch-armada100/armada100.h	/^#define SSP2_FNCLK	/;"	d
SSPBASE	drivers/spi/ep93xx_spi.c	/^#define SSPBASE	/;"	d	file:
SSPCLOCK	drivers/spi/ep93xx_spi.c	/^#define SSPCLOCK	/;"	d	file:
SSPCPSR	drivers/spi/ep93xx_spi.c	/^#define SSPCPSR	/;"	d	file:
SSPCR0	drivers/spi/ep93xx_spi.c	/^#define SSPCR0	/;"	d	file:
SSPCR0_DSS_16BITS	arch/arm/include/asm/arch-spear/spr_ssp.h	/^#define SSPCR0_DSS_16BITS	/;"	d
SSPCR0_DSS_8BIT	drivers/spi/ep93xx_spi.c	/^#define SSPCR0_DSS_8BIT	/;"	d	file:
SSPCR0_FRF_MOT_SPI	arch/arm/include/asm/arch-spear/spr_ssp.h	/^#define SSPCR0_FRF_MOT_SPI	/;"	d
SSPCR0_FRF_SPI	drivers/spi/ep93xx_spi.c	/^#define SSPCR0_FRF_SPI	/;"	d	file:
SSPCR0_MODE_SHIFT	drivers/spi/ep93xx_spi.c	/^#define SSPCR0_MODE_SHIFT	/;"	d	file:
SSPCR0_SCR_SHIFT	drivers/spi/ep93xx_spi.c	/^#define SSPCR0_SCR_SHIFT	/;"	d	file:
SSPCR0_SPH	drivers/spi/ep93xx_spi.c	/^#define SSPCR0_SPH	/;"	d	file:
SSPCR0_SPO	drivers/spi/ep93xx_spi.c	/^#define SSPCR0_SPO	/;"	d	file:
SSPCR1	drivers/spi/ep93xx_spi.c	/^#define SSPCR1	/;"	d	file:
SSPCR1_LBM	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_LBM	/;"	d	file:
SSPCR1_MS	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_MS	/;"	d	file:
SSPCR1_RIE	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_RIE	/;"	d	file:
SSPCR1_RORIE	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_RORIE	/;"	d	file:
SSPCR1_SOD	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_SOD	/;"	d	file:
SSPCR1_SSE	arch/arm/include/asm/arch-spear/spr_ssp.h	/^#define SSPCR1_SSE	/;"	d
SSPCR1_SSE	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_SSE	/;"	d	file:
SSPCR1_TIE	drivers/spi/ep93xx_spi.c	/^#define SSPCR1_TIE	/;"	d	file:
SSPDR	drivers/spi/ep93xx_spi.c	/^#define SSPDR	/;"	d	file:
SSPICR	drivers/spi/ep93xx_spi.c	/^#define SSPICR	/;"	d	file:
SSPIIR	drivers/spi/ep93xx_spi.c	/^#define SSPIIR	/;"	d	file:
SSPIIR_RIS	drivers/spi/ep93xx_spi.c	/^#define SSPIIR_RIS	/;"	d	file:
SSPIIR_RORIS	drivers/spi/ep93xx_spi.c	/^#define SSPIIR_RORIS	/;"	d	file:
SSPIIR_TIS	drivers/spi/ep93xx_spi.c	/^#define SSPIIR_TIS	/;"	d	file:
SSPSR	drivers/spi/ep93xx_spi.c	/^#define SSPSR	/;"	d	file:
SSPSR_BSY	drivers/spi/ep93xx_spi.c	/^#define SSPSR_BSY	/;"	d	file:
SSPSR_RFF	drivers/spi/ep93xx_spi.c	/^#define SSPSR_RFF	/;"	d	file:
SSPSR_RNE	drivers/spi/ep93xx_spi.c	/^#define SSPSR_RNE	/;"	d	file:
SSPSR_TFE	arch/arm/include/asm/arch-spear/spr_ssp.h	/^#define SSPSR_TFE	/;"	d
SSPSR_TFE	drivers/spi/ep93xx_spi.c	/^#define SSPSR_TFE	/;"	d	file:
SSPSR_TNF	arch/arm/include/asm/arch-spear/spr_ssp.h	/^#define SSPSR_TNF	/;"	d
SSPSR_TNF	drivers/spi/ep93xx_spi.c	/^#define SSPSR_TNF	/;"	d	file:
SSP_BLOCK_SIZE_BLOCK_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_BLOCK_SIZE_BLOCK_COUNT_MASK	/;"	d
SSP_BLOCK_SIZE_BLOCK_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_BLOCK_SIZE_BLOCK_COUNT_OFFSET	/;"	d
SSP_BLOCK_SIZE_BLOCK_SIZE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_BLOCK_SIZE_BLOCK_SIZE_MASK	/;"	d
SSP_BLOCK_SIZE_BLOCK_SIZE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_BLOCK_SIZE_BLOCK_SIZE_OFFSET	/;"	d
SSP_CMD0_APPEND_8CYC	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_APPEND_8CYC	/;"	d
SSP_CMD0_BLOCK_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_BLOCK_COUNT_MASK	/;"	d
SSP_CMD0_BLOCK_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_BLOCK_COUNT_OFFSET	/;"	d
SSP_CMD0_BLOCK_SIZE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_BLOCK_SIZE_MASK	/;"	d
SSP_CMD0_BLOCK_SIZE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_BLOCK_SIZE_OFFSET	/;"	d
SSP_CMD0_BOOT_ACK_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_BOOT_ACK_EN	/;"	d
SSP_CMD0_CMD_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MASK	/;"	d
SSP_CMD0_CMD_MMC_ALL_SEND_CID	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_ALL_SEND_CID	/;"	d
SSP_CMD0_CMD_MMC_APP_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_APP_CMD	/;"	d
SSP_CMD0_CMD_MMC_BUSTEST_R	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_BUSTEST_R	/;"	d
SSP_CMD0_CMD_MMC_BUSTEST_W	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_BUSTEST_W	/;"	d
SSP_CMD0_CMD_MMC_CLR_WRITE_PROT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_CLR_WRITE_PROT	/;"	d
SSP_CMD0_CMD_MMC_ERASE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_ERASE	/;"	d
SSP_CMD0_CMD_MMC_ERASE_GROUP_END	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_ERASE_GROUP_END	/;"	d
SSP_CMD0_CMD_MMC_ERASE_GROUP_START	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_ERASE_GROUP_START	/;"	d
SSP_CMD0_CMD_MMC_FAST_IO	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_FAST_IO	/;"	d
SSP_CMD0_CMD_MMC_GEN_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_GEN_CMD	/;"	d
SSP_CMD0_CMD_MMC_GO_IDLE_STATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_GO_IDLE_STATE	/;"	d
SSP_CMD0_CMD_MMC_GO_INACTIVE_STATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_GO_INACTIVE_STATE	/;"	d
SSP_CMD0_CMD_MMC_GO_IRQ_STATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_GO_IRQ_STATE	/;"	d
SSP_CMD0_CMD_MMC_LOCK_UNLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_LOCK_UNLOCK	/;"	d
SSP_CMD0_CMD_MMC_PROGRAM_CID	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_PROGRAM_CID	/;"	d
SSP_CMD0_CMD_MMC_PROGRAM_CSD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_PROGRAM_CSD	/;"	d
SSP_CMD0_CMD_MMC_READ_DAT_UNTIL_STOP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_READ_DAT_UNTIL_STOP	/;"	d
SSP_CMD0_CMD_MMC_READ_MULTIPLE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_READ_MULTIPLE_BLOCK	/;"	d
SSP_CMD0_CMD_MMC_READ_SINGLE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_READ_SINGLE_BLOCK	/;"	d
SSP_CMD0_CMD_MMC_RESERVED_5	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_RESERVED_5	/;"	d
SSP_CMD0_CMD_MMC_SELECT_DESELECT_CARD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SELECT_DESELECT_CARD	/;"	d
SSP_CMD0_CMD_MMC_SEND_CID	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SEND_CID	/;"	d
SSP_CMD0_CMD_MMC_SEND_CSD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SEND_CSD	/;"	d
SSP_CMD0_CMD_MMC_SEND_EXT_CSD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SEND_EXT_CSD	/;"	d
SSP_CMD0_CMD_MMC_SEND_OP_COND	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SEND_OP_COND	/;"	d
SSP_CMD0_CMD_MMC_SEND_STATUS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SEND_STATUS	/;"	d
SSP_CMD0_CMD_MMC_SEND_WRITE_PROT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SEND_WRITE_PROT	/;"	d
SSP_CMD0_CMD_MMC_SET_BLOCKLEN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SET_BLOCKLEN	/;"	d
SSP_CMD0_CMD_MMC_SET_BLOCK_COUNT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SET_BLOCK_COUNT	/;"	d
SSP_CMD0_CMD_MMC_SET_DSR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SET_DSR	/;"	d
SSP_CMD0_CMD_MMC_SET_RELATIVE_ADDR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SET_RELATIVE_ADDR	/;"	d
SSP_CMD0_CMD_MMC_SET_WRITE_PROT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SET_WRITE_PROT	/;"	d
SSP_CMD0_CMD_MMC_STOP_TRANSMISSION	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_STOP_TRANSMISSION	/;"	d
SSP_CMD0_CMD_MMC_SWITCH	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_SWITCH	/;"	d
SSP_CMD0_CMD_MMC_WRITE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_WRITE_BLOCK	/;"	d
SSP_CMD0_CMD_MMC_WRITE_DAT_UNTIL_STOP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_WRITE_DAT_UNTIL_STOP	/;"	d
SSP_CMD0_CMD_MMC_WRITE_MULTIPLE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_MMC_WRITE_MULTIPLE_BLOCK	/;"	d
SSP_CMD0_CMD_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_OFFSET	/;"	d
SSP_CMD0_CMD_SD_ALL_SEND_CID	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_ALL_SEND_CID	/;"	d
SSP_CMD0_CMD_SD_APP_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_APP_CMD	/;"	d
SSP_CMD0_CMD_SD_CLR_WRITE_PROT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_CLR_WRITE_PROT	/;"	d
SSP_CMD0_CMD_SD_ERASE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_ERASE	/;"	d
SSP_CMD0_CMD_SD_ERASE_GROUP_END	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_ERASE_GROUP_END	/;"	d
SSP_CMD0_CMD_SD_ERASE_GROUP_START	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_ERASE_GROUP_START	/;"	d
SSP_CMD0_CMD_SD_ERASE_WR_BLK_END	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_ERASE_WR_BLK_END	/;"	d
SSP_CMD0_CMD_SD_ERASE_WR_BLK_START	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_ERASE_WR_BLK_START	/;"	d
SSP_CMD0_CMD_SD_GEN_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_GEN_CMD	/;"	d
SSP_CMD0_CMD_SD_GO_IDLE_STATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_GO_IDLE_STATE	/;"	d
SSP_CMD0_CMD_SD_GO_INACTIVE_STATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_GO_INACTIVE_STATE	/;"	d
SSP_CMD0_CMD_SD_IO_RW_DIRECT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_IO_RW_DIRECT	/;"	d
SSP_CMD0_CMD_SD_IO_RW_EXTENDED	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_IO_RW_EXTENDED	/;"	d
SSP_CMD0_CMD_SD_IO_SEND_OP_COND	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_IO_SEND_OP_COND	/;"	d
SSP_CMD0_CMD_SD_LOCK_UNLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_LOCK_UNLOCK	/;"	d
SSP_CMD0_CMD_SD_PROGRAM_CSD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_PROGRAM_CSD	/;"	d
SSP_CMD0_CMD_SD_READ_MULTIPLE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_READ_MULTIPLE_BLOCK	/;"	d
SSP_CMD0_CMD_SD_READ_SINGLE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_READ_SINGLE_BLOCK	/;"	d
SSP_CMD0_CMD_SD_SELECT_DESELECT_CARD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SELECT_DESELECT_CARD	/;"	d
SSP_CMD0_CMD_SD_SEND_CID	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SEND_CID	/;"	d
SSP_CMD0_CMD_SD_SEND_CSD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SEND_CSD	/;"	d
SSP_CMD0_CMD_SD_SEND_RELATIVE_ADDR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SEND_RELATIVE_ADDR	/;"	d
SSP_CMD0_CMD_SD_SEND_STATUS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SEND_STATUS	/;"	d
SSP_CMD0_CMD_SD_SEND_WRITE_PROT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SEND_WRITE_PROT	/;"	d
SSP_CMD0_CMD_SD_SET_BLOCKLEN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SET_BLOCKLEN	/;"	d
SSP_CMD0_CMD_SD_SET_DSR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SET_DSR	/;"	d
SSP_CMD0_CMD_SD_SET_WRITE_PROT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_SET_WRITE_PROT	/;"	d
SSP_CMD0_CMD_SD_STOP_TRANSMISSION	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_STOP_TRANSMISSION	/;"	d
SSP_CMD0_CMD_SD_WRITE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_WRITE_BLOCK	/;"	d
SSP_CMD0_CMD_SD_WRITE_MULTIPLE_BLOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CMD_SD_WRITE_MULTIPLE_BLOCK	/;"	d
SSP_CMD0_CONT_CLKING_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_CONT_CLKING_EN	/;"	d
SSP_CMD0_DBL_DATA_RATE_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_DBL_DATA_RATE_EN	/;"	d
SSP_CMD0_PRIM_BOOT_OP_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_PRIM_BOOT_OP_EN	/;"	d
SSP_CMD0_SLOW_CLKING_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_SLOW_CLKING_EN	/;"	d
SSP_CMD0_SOFT_TERMINATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD0_SOFT_TERMINATE	/;"	d
SSP_CMD1_CMD_ARG_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD1_CMD_ARG_MASK	/;"	d
SSP_CMD1_CMD_ARG_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CMD1_CMD_ARG_OFFSET	/;"	d
SSP_COMPMASK_MASK_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_COMPMASK_MASK_MASK	/;"	d
SSP_COMPMASK_MASK_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_COMPMASK_MASK_OFFSET	/;"	d
SSP_COMPREF_REFERENCE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_COMPREF_REFERENCE_MASK	/;"	d
SSP_COMPREF_REFERENCE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_COMPREF_REFERENCE_OFFSET	/;"	d
SSP_CR1_SSP_ENABLE	drivers/spi/lpc32xx_ssp.c	/^#define SSP_CR1_SSP_ENABLE /;"	d	file:
SSP_CTRL0_BUS_WIDTH_EIGHT_BIT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_BUS_WIDTH_EIGHT_BIT	/;"	d
SSP_CTRL0_BUS_WIDTH_FOUR_BIT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_BUS_WIDTH_FOUR_BIT	/;"	d
SSP_CTRL0_BUS_WIDTH_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_BUS_WIDTH_MASK	/;"	d
SSP_CTRL0_BUS_WIDTH_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_BUS_WIDTH_OFFSET	/;"	d
SSP_CTRL0_BUS_WIDTH_ONE_BIT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_BUS_WIDTH_ONE_BIT	/;"	d
SSP_CTRL0_CHECK_RESP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_CHECK_RESP	/;"	d
SSP_CTRL0_CLKGATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_CLKGATE	/;"	d
SSP_CTRL0_DATA_XFER	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_DATA_XFER	/;"	d
SSP_CTRL0_ENABLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_ENABLE	/;"	d
SSP_CTRL0_GET_RESP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_GET_RESP	/;"	d
SSP_CTRL0_IGNORE_CRC	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_IGNORE_CRC	/;"	d
SSP_CTRL0_LOCK_CS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_LOCK_CS	/;"	d
SSP_CTRL0_LONG_RESP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_LONG_RESP	/;"	d
SSP_CTRL0_READ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_READ	/;"	d
SSP_CTRL0_RUN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_RUN	/;"	d
SSP_CTRL0_SDIO_IRQ_CHECK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_SDIO_IRQ_CHECK	/;"	d
SSP_CTRL0_SFTRST	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_SFTRST	/;"	d
SSP_CTRL0_WAIT_FOR_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_WAIT_FOR_CMD	/;"	d
SSP_CTRL0_WAIT_FOR_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_WAIT_FOR_IRQ	/;"	d
SSP_CTRL0_XFER_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_XFER_COUNT_MASK	/;"	d
SSP_CTRL0_XFER_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL0_XFER_COUNT_OFFSET	/;"	d
SSP_CTRL1_CEATA_CCS_ERR_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_CEATA_CCS_ERR_EN	/;"	d
SSP_CTRL1_CEATA_CCS_ERR_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_CEATA_CCS_ERR_IRQ	/;"	d
SSP_CTRL1_CEATA_CCS_ERR_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_CEATA_CCS_ERR_IRQ_EN	/;"	d
SSP_CTRL1_DATA_CRC_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_DATA_CRC_IRQ	/;"	d
SSP_CTRL1_DATA_CRC_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_DATA_CRC_IRQ_EN	/;"	d
SSP_CTRL1_DATA_TIMEOUT_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_DATA_TIMEOUT_IRQ	/;"	d
SSP_CTRL1_DATA_TIMEOUT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_DATA_TIMEOUT_IRQ_EN	/;"	d
SSP_CTRL1_DMA_ENABLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_DMA_ENABLE	/;"	d
SSP_CTRL1_FIFO_OVERRUN_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_FIFO_OVERRUN_IRQ	/;"	d
SSP_CTRL1_FIFO_OVERRUN_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_FIFO_OVERRUN_IRQ_EN	/;"	d
SSP_CTRL1_FIFO_UNDERRUN_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_FIFO_UNDERRUN_EN	/;"	d
SSP_CTRL1_FIFO_UNDERRUN_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_FIFO_UNDERRUN_IRQ	/;"	d
SSP_CTRL1_PHASE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_PHASE	/;"	d
SSP_CTRL1_POLARITY	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_POLARITY	/;"	d
SSP_CTRL1_RECV_TIMEOUT_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_RECV_TIMEOUT_IRQ	/;"	d
SSP_CTRL1_RECV_TIMEOUT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_RECV_TIMEOUT_IRQ_EN	/;"	d
SSP_CTRL1_RESP_ERR_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_RESP_ERR_IRQ	/;"	d
SSP_CTRL1_RESP_ERR_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_RESP_ERR_IRQ_EN	/;"	d
SSP_CTRL1_RESP_TIMEOUT_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_RESP_TIMEOUT_IRQ	/;"	d
SSP_CTRL1_RESP_TIMEOUT_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_RESP_TIMEOUT_IRQ_EN	/;"	d
SSP_CTRL1_SDIO_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SDIO_IRQ	/;"	d
SSP_CTRL1_SDIO_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SDIO_IRQ_EN	/;"	d
SSP_CTRL1_SLAVE_MODE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SLAVE_MODE	/;"	d
SSP_CTRL1_SLAVE_OUT_DISABLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SLAVE_OUT_DISABLE	/;"	d
SSP_CTRL1_SSP_MODE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SSP_MODE_MASK	/;"	d
SSP_CTRL1_SSP_MODE_MS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SSP_MODE_MS	/;"	d
SSP_CTRL1_SSP_MODE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SSP_MODE_OFFSET	/;"	d
SSP_CTRL1_SSP_MODE_SD_MMC	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SSP_MODE_SD_MMC	/;"	d
SSP_CTRL1_SSP_MODE_SPI	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SSP_MODE_SPI	/;"	d
SSP_CTRL1_SSP_MODE_SSI	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_SSP_MODE_SSI	/;"	d
SSP_CTRL1_WORD_LENGTH_EIGHT_BITS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_EIGHT_BITS	/;"	d
SSP_CTRL1_WORD_LENGTH_FOUR_BITS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_FOUR_BITS	/;"	d
SSP_CTRL1_WORD_LENGTH_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_MASK	/;"	d
SSP_CTRL1_WORD_LENGTH_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_OFFSET	/;"	d
SSP_CTRL1_WORD_LENGTH_RESERVED0	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_RESERVED0	/;"	d
SSP_CTRL1_WORD_LENGTH_RESERVED1	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_RESERVED1	/;"	d
SSP_CTRL1_WORD_LENGTH_RESERVED2	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_RESERVED2	/;"	d
SSP_CTRL1_WORD_LENGTH_SIXTEEN_BITS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_CTRL1_WORD_LENGTH_SIXTEEN_BITS	/;"	d
SSP_DATA_DATA_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DATA_DATA_MASK	/;"	d
SSP_DATA_DATA_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DATA_DATA_OFFSET	/;"	d
SSP_DDR_CTRL_DMA_BURST_TYPE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DDR_CTRL_DMA_BURST_TYPE_MASK	/;"	d
SSP_DDR_CTRL_DMA_BURST_TYPE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DDR_CTRL_DMA_BURST_TYPE_OFFSET	/;"	d
SSP_DDR_CTRL_NIBBLE_POS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DDR_CTRL_NIBBLE_POS	/;"	d
SSP_DDR_CTRL_TXCLK_DELAY_TYPE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DDR_CTRL_TXCLK_DELAY_TYPE	/;"	d
SSP_DEBUG_CMD_OE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_OE	/;"	d
SSP_DEBUG_CMD_SM_CSM_ARG	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_SM_CSM_ARG	/;"	d
SSP_DEBUG_CMD_SM_CSM_CRC	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_SM_CSM_CRC	/;"	d
SSP_DEBUG_CMD_SM_CSM_IDLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_SM_CSM_IDLE	/;"	d
SSP_DEBUG_CMD_SM_CSM_INDEX	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_SM_CSM_INDEX	/;"	d
SSP_DEBUG_CMD_SM_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_SM_MASK	/;"	d
SSP_DEBUG_CMD_SM_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_CMD_SM_OFFSET	/;"	d
SSP_DEBUG_DATACRC_ERR_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DATACRC_ERR_MASK	/;"	d
SSP_DEBUG_DATACRC_ERR_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DATACRC_ERR_OFFSET	/;"	d
SSP_DEBUG_DATA_STALL	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DATA_STALL	/;"	d
SSP_DEBUG_DAT_SM_DSM_CRC1	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_DSM_CRC1	/;"	d
SSP_DEBUG_DAT_SM_DSM_CRC2	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_DSM_CRC2	/;"	d
SSP_DEBUG_DAT_SM_DSM_END	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_DSM_END	/;"	d
SSP_DEBUG_DAT_SM_DSM_IDLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_DSM_IDLE	/;"	d
SSP_DEBUG_DAT_SM_DSM_WORD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_DSM_WORD	/;"	d
SSP_DEBUG_DAT_SM_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_MASK	/;"	d
SSP_DEBUG_DAT_SM_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DAT_SM_OFFSET	/;"	d
SSP_DEBUG_DMA_SM_DMA_BUSY	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_BUSY	/;"	d
SSP_DEBUG_DMA_SM_DMA_COUNT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_COUNT	/;"	d
SSP_DEBUG_DMA_SM_DMA_DMAACK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_DMAACK	/;"	d
SSP_DEBUG_DMA_SM_DMA_DMAREQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_DMAREQ	/;"	d
SSP_DEBUG_DMA_SM_DMA_DONE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_DONE	/;"	d
SSP_DEBUG_DMA_SM_DMA_IDLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_IDLE	/;"	d
SSP_DEBUG_DMA_SM_DMA_STALL	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_DMA_STALL	/;"	d
SSP_DEBUG_DMA_SM_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_MASK	/;"	d
SSP_DEBUG_DMA_SM_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_DMA_SM_OFFSET	/;"	d
SSP_DEBUG_MMC_SM_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MASK	/;"	d
SSP_DEBUG_MMC_SM_MMC_CCS	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_CCS	/;"	d
SSP_DEBUG_MMC_SM_MMC_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_CMD	/;"	d
SSP_DEBUG_MMC_SM_MMC_CTOK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_CTOK	/;"	d
SSP_DEBUG_MMC_SM_MMC_IDLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_IDLE	/;"	d
SSP_DEBUG_MMC_SM_MMC_PUP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_PUP	/;"	d
SSP_DEBUG_MMC_SM_MMC_RESP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_RESP	/;"	d
SSP_DEBUG_MMC_SM_MMC_RPRX	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_RPRX	/;"	d
SSP_DEBUG_MMC_SM_MMC_RX	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_RX	/;"	d
SSP_DEBUG_MMC_SM_MMC_TRC	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_TRC	/;"	d
SSP_DEBUG_MMC_SM_MMC_TX	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_TX	/;"	d
SSP_DEBUG_MMC_SM_MMC_WAIT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_MMC_WAIT	/;"	d
SSP_DEBUG_MMC_SM_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MMC_SM_OFFSET	/;"	d
SSP_DEBUG_MSTK_SM_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MASK	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_BS0	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_BS0	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_BS1	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_BS1	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_BS2	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_BS2	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_BS3	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_BS3	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_CKON	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_CKON	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_CRC1	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_CRC1	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_CRC2	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_CRC2	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_DONE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_DONE	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_END1	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_END1	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_END2R	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_END2R	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_END2W	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_END2W	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_HDSHK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_HDSHK	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_IDLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_IDLE	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_RW	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_RW	/;"	d
SSP_DEBUG_MSTK_SM_MSTK_TPC	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_MSTK_TPC	/;"	d
SSP_DEBUG_MSTK_SM_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_MSTK_SM_OFFSET	/;"	d
SSP_DEBUG_SSP_CMD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_SSP_CMD	/;"	d
SSP_DEBUG_SSP_RESP	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_SSP_RESP	/;"	d
SSP_DEBUG_SSP_RXD_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_SSP_RXD_MASK	/;"	d
SSP_DEBUG_SSP_RXD_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DEBUG_SSP_RXD_OFFSET	/;"	d
SSP_DLL_CTRL_ENABLE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_ENABLE	/;"	d
SSP_DLL_CTRL_GATE_UPDATE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_GATE_UPDATE	/;"	d
SSP_DLL_CTRL_REF_UPDATE_INT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_REF_UPDATE_INT_MASK	/;"	d
SSP_DLL_CTRL_REF_UPDATE_INT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_REF_UPDATE_INT_OFFSET	/;"	d
SSP_DLL_CTRL_RESET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_RESET	/;"	d
SSP_DLL_CTRL_SLV_DLY_TARGET_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_DLY_TARGET_MASK	/;"	d
SSP_DLL_CTRL_SLV_DLY_TARGET_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_DLY_TARGET_OFFSET	/;"	d
SSP_DLL_CTRL_SLV_FORCE_UPD	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_FORCE_UPD	/;"	d
SSP_DLL_CTRL_SLV_OVERRIDE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_OVERRIDE	/;"	d
SSP_DLL_CTRL_SLV_OVERRIDE_VAL_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_OVERRIDE_VAL_MASK	/;"	d
SSP_DLL_CTRL_SLV_OVERRIDE_VAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_OVERRIDE_VAL_OFFSET	/;"	d
SSP_DLL_CTRL_SLV_UPDATE_INT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_UPDATE_INT_MASK	/;"	d
SSP_DLL_CTRL_SLV_UPDATE_INT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_CTRL_SLV_UPDATE_INT_OFFSET	/;"	d
SSP_DLL_STS_REF_LOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_STS_REF_LOCK	/;"	d
SSP_DLL_STS_REF_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_STS_REF_SEL_MASK	/;"	d
SSP_DLL_STS_REF_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_STS_REF_SEL_OFFSET	/;"	d
SSP_DLL_STS_SLV_LOCK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_STS_SLV_LOCK	/;"	d
SSP_DLL_STS_SLV_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_STS_SLV_SEL_MASK	/;"	d
SSP_DLL_STS_SLV_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_DLL_STS_SLV_SEL_OFFSET	/;"	d
SSP_FLUSH_NUM	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSP_FLUSH_NUM	/;"	d
SSP_MAX_RATE	drivers/spi/ep93xx_spi.c	/^#define SSP_MAX_RATE	/;"	d	file:
SSP_MIN_RATE	drivers/spi/ep93xx_spi.c	/^#define SSP_MIN_RATE	/;"	d	file:
SSP_REG_BASE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSP_REG_BASE(/;"	d
SSP_SDRESP0_RESP0_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP0_RESP0_MASK	/;"	d
SSP_SDRESP0_RESP0_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP0_RESP0_OFFSET	/;"	d
SSP_SDRESP1_RESP1_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP1_RESP1_MASK	/;"	d
SSP_SDRESP1_RESP1_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP1_RESP1_OFFSET	/;"	d
SSP_SDRESP2_RESP2_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP2_RESP2_MASK	/;"	d
SSP_SDRESP2_RESP2_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP2_RESP2_OFFSET	/;"	d
SSP_SDRESP3_RESP3_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP3_RESP3_MASK	/;"	d
SSP_SDRESP3_RESP3_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_SDRESP3_RESP3_OFFSET	/;"	d
SSP_SR_RNE	drivers/spi/lpc32xx_ssp.c	/^#define SSP_SR_RNE /;"	d	file:
SSP_SR_TNF	drivers/spi/lpc32xx_ssp.c	/^#define SSP_SR_TNF /;"	d	file:
SSP_STATUS_BUSY	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_BUSY	/;"	d
SSP_STATUS_CARD_DETECT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_CARD_DETECT	/;"	d
SSP_STATUS_CEATA_CCS_ERR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_CEATA_CCS_ERR	/;"	d
SSP_STATUS_CMD_BUSY	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_CMD_BUSY	/;"	d
SSP_STATUS_DATA_BUSY	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DATA_BUSY	/;"	d
SSP_STATUS_DATA_CRC_ERR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DATA_CRC_ERR	/;"	d
SSP_STATUS_DMABURST	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DMABURST	/;"	d
SSP_STATUS_DMAEND	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DMAEND	/;"	d
SSP_STATUS_DMAREQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DMAREQ	/;"	d
SSP_STATUS_DMASENSE	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DMASENSE	/;"	d
SSP_STATUS_DMATERM	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_DMATERM	/;"	d
SSP_STATUS_FIFO_EMPTY	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_FIFO_EMPTY	/;"	d
SSP_STATUS_FIFO_FULL	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_FIFO_FULL	/;"	d
SSP_STATUS_FIFO_OVRFLW	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_FIFO_OVRFLW	/;"	d
SSP_STATUS_FIFO_UNDRFLW	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_FIFO_UNDRFLW	/;"	d
SSP_STATUS_MS_PRESENT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_MS_PRESENT	/;"	d
SSP_STATUS_PRESENT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_PRESENT	/;"	d
SSP_STATUS_RECV_TIMEOUT_STAT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_RECV_TIMEOUT_STAT	/;"	d
SSP_STATUS_RESP_CRC_ERR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_RESP_CRC_ERR	/;"	d
SSP_STATUS_RESP_ERR	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_RESP_ERR	/;"	d
SSP_STATUS_RESP_TIMEOUT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_RESP_TIMEOUT	/;"	d
SSP_STATUS_SDIO_IRQ	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_SDIO_IRQ	/;"	d
SSP_STATUS_SD_PRESENT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_SD_PRESENT	/;"	d
SSP_STATUS_TIMEOUT	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_STATUS_TIMEOUT	/;"	d
SSP_TIMING_CLOCK_DIVIDE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_TIMING_CLOCK_DIVIDE_MASK	/;"	d
SSP_TIMING_CLOCK_DIVIDE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_TIMING_CLOCK_DIVIDE_OFFSET	/;"	d
SSP_TIMING_CLOCK_RATE_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_TIMING_CLOCK_RATE_MASK	/;"	d
SSP_TIMING_CLOCK_RATE_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_TIMING_CLOCK_RATE_OFFSET	/;"	d
SSP_TIMING_TIMEOUT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_TIMING_TIMEOUT_MASK	/;"	d
SSP_TIMING_TIMEOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_TIMING_TIMEOUT_OFFSET	/;"	d
SSP_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_VERSION_MAJOR_MASK	/;"	d
SSP_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_VERSION_MAJOR_OFFSET	/;"	d
SSP_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_VERSION_MINOR_MASK	/;"	d
SSP_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_VERSION_MINOR_OFFSET	/;"	d
SSP_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_VERSION_STEP_MASK	/;"	d
SSP_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_VERSION_STEP_OFFSET	/;"	d
SSP_XFER_SIZE_XFER_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_XFER_SIZE_XFER_COUNT_MASK	/;"	d
SSP_XFER_SIZE_XFER_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define	SSP_XFER_SIZE_XFER_COUNT_OFFSET	/;"	d
SSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SSR(/;"	d
SSR_1000FULL	drivers/net/ax88180.h	/^  #define SSR_1000FULL	/;"	d
SSR_1000HALF	drivers/net/ax88180.h	/^  #define SSR_1000HALF	/;"	d
SSR_100FULL	drivers/net/ax88180.h	/^  #define SSR_100FULL	/;"	d
SSR_100HALF	drivers/net/ax88180.h	/^  #define SSR_100HALF	/;"	d
SSR_10FULL	drivers/net/ax88180.h	/^  #define SSR_10FULL	/;"	d
SSR_10HALF	drivers/net/ax88180.h	/^  #define SSR_10HALF	/;"	d
SSR_DUPLEX	drivers/net/ax88180.h	/^  #define SSR_DUPLEX	/;"	d
SSR_MEDIA_MASK	drivers/net/ax88180.h	/^  #define SSR_MEDIA_MASK	/;"	d
SSR_MEDIA_RESOLVED_OK	drivers/net/ax88180.h	/^  #define SSR_MEDIA_RESOLVED_OK	/;"	d
SSR_SPEED_10	drivers/net/ax88180.h	/^  #define SSR_SPEED_10	/;"	d
SSR_SPEED_100	drivers/net/ax88180.h	/^  #define SSR_SPEED_100	/;"	d
SSR_SPEED_1000	drivers/net/ax88180.h	/^  #define SSR_SPEED_1000	/;"	d
SSR_SPEED_MASK	drivers/net/ax88180.h	/^  #define SSR_SPEED_MASK	/;"	d
SSSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SSSR	/;"	d
SSSR_BSY	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_BSY	/;"	d
SSSR_BSY	include/SA-1100.h	/^#define SSSR_BSY	/;"	d
SSSR_RFS	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_RFS	/;"	d
SSSR_RFS	include/SA-1100.h	/^#define SSSR_RFS	/;"	d
SSSR_RNE	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_RNE	/;"	d
SSSR_RNE	include/SA-1100.h	/^#define SSSR_RNE	/;"	d
SSSR_ROR	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_ROR	/;"	d
SSSR_ROR	include/SA-1100.h	/^#define SSSR_ROR	/;"	d
SSSR_TFS	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_TFS	/;"	d
SSSR_TFS	include/SA-1100.h	/^#define SSSR_TFS	/;"	d
SSSR_TINT	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_TINT	/;"	d
SSSR_TNF	arch/arm/include/asm/arch-armada100/spi.h	/^#define SSSR_TNF	/;"	d
SSSR_TNF	include/SA-1100.h	/^#define SSSR_TNF	/;"	d
SSSTEP	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SSSTEP	/;"	d
SST39LF010	drivers/mtd/jedec_flash.c	/^#define SST39LF010	/;"	d	file:
SST39LF020	drivers/mtd/jedec_flash.c	/^#define SST39LF020	/;"	d	file:
SST39LF040	drivers/mtd/jedec_flash.c	/^#define SST39LF040	/;"	d	file:
SST39LF160	drivers/mtd/jedec_flash.c	/^#define SST39LF160	/;"	d	file:
SST39LF512	drivers/mtd/jedec_flash.c	/^#define SST39LF512	/;"	d	file:
SST39LF800	drivers/mtd/jedec_flash.c	/^#define SST39LF800	/;"	d	file:
SST39SF010A	drivers/mtd/jedec_flash.c	/^#define SST39SF010A	/;"	d	file:
SST39SF020A	drivers/mtd/jedec_flash.c	/^#define SST39SF020A	/;"	d	file:
SST39VF1601	drivers/mtd/jedec_flash.c	/^#define SST39VF1601	/;"	d	file:
SSTAT0	include/sym53c8xx.h	/^#define SSTAT0	/;"	d
SSTAT1	include/sym53c8xx.h	/^#define SSTAT1	/;"	d
SSTAT2	include/sym53c8xx.h	/^#define SSTAT2	/;"	d
SSTATUS_DET_CONNECT	drivers/block/fsl_sata.h	/^#define SSTATUS_DET_CONNECT	/;"	d
SSTATUS_DET_DISCONNECT	drivers/block/fsl_sata.h	/^#define SSTATUS_DET_DISCONNECT	/;"	d
SSTATUS_DET_MASK	drivers/block/fsl_sata.h	/^#define SSTATUS_DET_MASK	/;"	d
SSTATUS_DET_MASK	drivers/block/sata_mv.c	/^#define SSTATUS_DET_MASK	/;"	d	file:
SSTATUS_DET_NODEVICE	drivers/block/fsl_sata.h	/^#define SSTATUS_DET_NODEVICE	/;"	d
SSTATUS_DET_PHY_OFFLINE	drivers/block/fsl_sata.h	/^#define SSTATUS_DET_PHY_OFFLINE	/;"	d
SSTATUS_IPM_ACTIVE	drivers/block/fsl_sata.h	/^#define SSTATUS_IPM_ACTIVE	/;"	d
SSTATUS_IPM_MASK	drivers/block/fsl_sata.h	/^#define SSTATUS_IPM_MASK	/;"	d
SSTATUS_IPM_NOPRESENT	drivers/block/fsl_sata.h	/^#define SSTATUS_IPM_NOPRESENT	/;"	d
SSTATUS_IPM_PATIAL	drivers/block/fsl_sata.h	/^#define SSTATUS_IPM_PATIAL	/;"	d
SSTATUS_IPM_SLUMBER	drivers/block/fsl_sata.h	/^#define SSTATUS_IPM_SLUMBER	/;"	d
SSTATUS_SPD_GEN1	drivers/block/fsl_sata.h	/^#define SSTATUS_SPD_GEN1	/;"	d
SSTATUS_SPD_GEN2	drivers/block/fsl_sata.h	/^#define SSTATUS_SPD_GEN2	/;"	d
SSTATUS_SPD_MASK	drivers/block/fsl_sata.h	/^#define SSTATUS_SPD_MASK	/;"	d
SSTBZ	board/renesas/stout/cpld.c	/^#define SSTBZ	/;"	d	file:
SSTL_2_5V	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SSTL_2_5V,$/;"	e	enum:dimm_volt_if	file:
SSTL_3_3V	drivers/ddr/marvell/axp/ddr3_spd.c	/^	SSTL_3_3V,$/;"	e	enum:dimm_volt_if	file:
SST_ID_xF020	include/flash.h	/^#define SST_ID_xF020	/;"	d
SST_ID_xF040	include/flash.h	/^#define SST_ID_xF040	/;"	d
SST_ID_xF1601	include/flash.h	/^#define SST_ID_xF1601	/;"	d
SST_ID_xF1602	include/flash.h	/^#define SST_ID_xF1602	/;"	d
SST_ID_xF160A	include/flash.h	/^#define SST_ID_xF160A	/;"	d
SST_ID_xF200A	include/flash.h	/^#define SST_ID_xF200A	/;"	d
SST_ID_xF3201	include/flash.h	/^#define SST_ID_xF3201	/;"	d
SST_ID_xF3202	include/flash.h	/^#define SST_ID_xF3202	/;"	d
SST_ID_xF400A	include/flash.h	/^#define SST_ID_xF400A	/;"	d
SST_ID_xF6401	include/flash.h	/^#define SST_ID_xF6401	/;"	d
SST_ID_xF6401B	include/configs/M5253DEMO.h	/^#define SST_ID_xF6401B	/;"	d
SST_ID_xF6402	include/flash.h	/^#define SST_ID_xF6402	/;"	d
SST_ID_xF800A	include/flash.h	/^#define SST_ID_xF800A	/;"	d
SST_MANUFACT	include/flash.h	/^#define SST_MANUFACT	/;"	d
SST_WR	drivers/mtd/spi/sf_internal.h	/^#define SST_WR	/;"	d
SSYNC	arch/blackfin/include/asm/blackfin_local.h	/^#define SSYNC(/;"	d
SSYNC	arch/blackfin/include/asm/blackfin_local.h	/^static inline void SSYNC(void)$/;"	f	typeref:typename:void
SS_CNT	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define SS_CNT	/;"	d
SS_COMMUNICATION_FAILURE	drivers/usb/gadget/storage_common.c	/^#define SS_COMMUNICATION_FAILURE	/;"	d	file:
SS_DISABLE	arch/powerpc/include/asm/signal.h	/^#define SS_DISABLE	/;"	d
SS_DISABLE	include/asm-generic/signal.h	/^#define SS_DISABLE	/;"	d
SS_INVALID_COMMAND	drivers/usb/gadget/storage_common.c	/^#define SS_INVALID_COMMAND	/;"	d	file:
SS_INVALID_FIELD_IN_CDB	drivers/usb/gadget/storage_common.c	/^#define SS_INVALID_FIELD_IN_CDB	/;"	d	file:
SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE	drivers/usb/gadget/storage_common.c	/^#define SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE	/;"	d	file:
SS_LOGICAL_UNIT_NOT_SUPPORTED	drivers/usb/gadget/storage_common.c	/^#define SS_LOGICAL_UNIT_NOT_SUPPORTED	/;"	d	file:
SS_MEDIUM_NOT_PRESENT	drivers/usb/gadget/storage_common.c	/^#define SS_MEDIUM_NOT_PRESENT	/;"	d	file:
SS_MEDIUM_REMOVAL_PREVENTED	drivers/usb/gadget/storage_common.c	/^#define SS_MEDIUM_REMOVAL_PREVENTED	/;"	d	file:
SS_NOT_READY_TO_READY_TRANSITION	drivers/usb/gadget/storage_common.c	/^#define SS_NOT_READY_TO_READY_TRANSITION	/;"	d	file:
SS_NO_SENSE	drivers/usb/gadget/storage_common.c	/^#define SS_NO_SENSE	/;"	d	file:
SS_ONSTACK	arch/powerpc/include/asm/signal.h	/^#define SS_ONSTACK	/;"	d
SS_ONSTACK	include/asm-generic/signal.h	/^#define SS_ONSTACK	/;"	d
SS_RESET_OCCURRED	drivers/usb/gadget/storage_common.c	/^#define SS_RESET_OCCURRED	/;"	d	file:
SS_SAVING_PARAMETERS_NOT_SUPPORTED	drivers/usb/gadget/storage_common.c	/^#define SS_SAVING_PARAMETERS_NOT_SUPPORTED	/;"	d	file:
SS_UNRECOVERED_READ_ERROR	drivers/usb/gadget/storage_common.c	/^#define SS_UNRECOVERED_READ_ERROR	/;"	d	file:
SS_WRITE_ERROR	drivers/usb/gadget/storage_common.c	/^#define SS_WRITE_ERROR	/;"	d	file:
SS_WRITE_PROTECTED	drivers/usb/gadget/storage_common.c	/^#define SS_WRITE_PROTECTED	/;"	d	file:
ST	include/i8042.h	/^#define ST	/;"	d
ST0_BEV	arch/mips/include/asm/mipsregs.h	/^#define ST0_BEV	/;"	d
ST0_CE	arch/mips/include/asm/mipsregs.h	/^#define ST0_CE	/;"	d
ST0_CH	arch/mips/include/asm/mipsregs.h	/^#define ST0_CH	/;"	d
ST0_CM	arch/mips/include/asm/mipsregs.h	/^#define ST0_CM	/;"	d
ST0_CO	arch/mips/include/asm/mipsregs.h	/^#define ST0_CO	/;"	d
ST0_CU	arch/mips/include/asm/mipsregs.h	/^#define ST0_CU	/;"	d
ST0_CU0	arch/mips/include/asm/mipsregs.h	/^#define ST0_CU0	/;"	d
ST0_CU1	arch/mips/include/asm/mipsregs.h	/^#define ST0_CU1	/;"	d
ST0_CU2	arch/mips/include/asm/mipsregs.h	/^#define ST0_CU2	/;"	d
ST0_CU3	arch/mips/include/asm/mipsregs.h	/^#define ST0_CU3	/;"	d
ST0_DE	arch/mips/include/asm/mipsregs.h	/^#define ST0_DE	/;"	d
ST0_DL	arch/mips/include/asm/mipsregs.h	/^#define ST0_DL	/;"	d
ST0_ERL	arch/mips/include/asm/mipsregs.h	/^#define ST0_ERL	/;"	d
ST0_EXL	arch/mips/include/asm/mipsregs.h	/^#define ST0_EXL	/;"	d
ST0_FR	arch/mips/include/asm/mipsregs.h	/^#define ST0_FR	/;"	d
ST0_IE	arch/mips/include/asm/mipsregs.h	/^#define ST0_IE	/;"	d
ST0_IEC	arch/mips/include/asm/mipsregs.h	/^#define ST0_IEC	/;"	d
ST0_IEO	arch/mips/include/asm/mipsregs.h	/^#define ST0_IEO	/;"	d
ST0_IEP	arch/mips/include/asm/mipsregs.h	/^#define ST0_IEP	/;"	d
ST0_IL	arch/mips/include/asm/mipsregs.h	/^#define ST0_IL	/;"	d
ST0_IM	arch/mips/include/asm/mipsregs.h	/^#define ST0_IM	/;"	d
ST0_ISC	arch/mips/include/asm/mipsregs.h	/^#define ST0_ISC	/;"	d
ST0_KSU	arch/mips/include/asm/mipsregs.h	/^#define ST0_KSU	/;"	d
ST0_KUC	arch/mips/include/asm/mipsregs.h	/^#define ST0_KUC	/;"	d
ST0_KUO	arch/mips/include/asm/mipsregs.h	/^#define ST0_KUO	/;"	d
ST0_KUP	arch/mips/include/asm/mipsregs.h	/^#define ST0_KUP	/;"	d
ST0_KX	arch/mips/include/asm/mipsregs.h	/^#define ST0_KX	/;"	d
ST0_MX	arch/mips/include/asm/mipsregs.h	/^#define ST0_MX	/;"	d
ST0_NMI	arch/mips/include/asm/mipsregs.h	/^#define ST0_NMI	/;"	d
ST0_RE	arch/mips/include/asm/mipsregs.h	/^#define ST0_RE	/;"	d
ST0_SR	arch/mips/include/asm/mipsregs.h	/^#define ST0_SR	/;"	d
ST0_SWC	arch/mips/include/asm/mipsregs.h	/^#define ST0_SWC	/;"	d
ST0_SX	arch/mips/include/asm/mipsregs.h	/^#define ST0_SX	/;"	d
ST0_TS	arch/mips/include/asm/mipsregs.h	/^#define ST0_TS	/;"	d
ST0_UM	arch/mips/include/asm/mipsregs.h	/^#define ST0_UM	/;"	d
ST0_UX	arch/mips/include/asm/mipsregs.h	/^#define ST0_UX	/;"	d
ST0_XX	arch/mips/include/asm/mipsregs.h	/^#define ST0_XX	/;"	d
ST33ZP24_BADLOCALITY	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_BADLOCALITY	/;"	d	file:
ST33ZP24_BAD_COMMAND_ORDER	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_BAD_COMMAND_ORDER	/;"	d	file:
ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END	/;"	d	file:
ST33ZP24_DUMMY_BYTES	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_DUMMY_BYTES	/;"	d	file:
ST33ZP24_HASH_END_BEFORE_HASH_START	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_HASH_END_BEFORE_HASH_START	/;"	d	file:
ST33ZP24_INCORECT_RECEIVED_LENGTH	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_INCORECT_RECEIVED_LENGTH	/;"	d	file:
ST33ZP24_LOCALITY_NOT_ACTIVATED	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_LOCALITY_NOT_ACTIVATED	/;"	d	file:
ST33ZP24_OK	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_OK	/;"	d	file:
ST33ZP24_SPI_BUFFER_SIZE	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_SPI_BUFFER_SIZE /;"	d	file:
ST33ZP24_TISREGISTER_UKNOWN	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_TISREGISTER_UKNOWN	/;"	d	file:
ST33ZP24_TPM_FIFO_OVERFLOW	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_TPM_FIFO_OVERFLOW	/;"	d	file:
ST33ZP24_UNDEFINED_ERR	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_UNDEFINED_ERR	/;"	d	file:
ST33ZP24_UNEXPECTED_READ_FIFO	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_UNEXPECTED_READ_FIFO	/;"	d	file:
ST33ZP24_UNEXPECTED_WRITE_FIFO	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define ST33ZP24_UNEXPECTED_WRITE_FIFO	/;"	d	file:
STABTIME	drivers/dma/MCD_dmaApi.c	/^#define STABTIME /;"	d	file:
STABUSY	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	STABUSY	/;"	d
STACKED	arch/arm/include/asm/arch-omap3/mem.h	/^	STACKED = 0,$/;"	e	enum:__anonba94f5130103
STACKFRAME_SZ	arch/sparc/include/asm/ptrace.h	/^#define STACKFRAME_SZ /;"	d
STACK_ALIGN	arch/sparc/cpu/leon2/start.S	/^#define STACK_ALIGN	/;"	d	file:
STACK_ALIGN	arch/sparc/cpu/leon3/start.S	/^#define STACK_ALIGN	/;"	d	file:
STACK_AREA_SIZE	include/configs/alt.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/armadillo-800eva.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/blanche.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/gose.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/koelsch.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/lager.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/porter.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/silk.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_AREA_SIZE	include/configs/stout.h	/^#define STACK_AREA_SIZE	/;"	d
STACK_FRAME_OVERHEAD	arch/openrisc/include/asm/ptrace.h	/^#define STACK_FRAME_OVERHEAD /;"	d
STACK_FRAME_OVERHEAD	arch/powerpc/include/asm/ptrace.h	/^#define STACK_FRAME_OVERHEAD	/;"	d
STACK_FRAME_OVERHEAD	include/ppc_defs.h	/^#define	STACK_FRAME_OVERHEAD	/;"	d
STACK_MAGIC	include/linux/kernel.h	/^#define STACK_MAGIC	/;"	d
STADATA	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	STADATA	/;"	d
STADISPRE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	STADISPRE	/;"	d
STAGE_CHECK	cmd/sf.c	/^	STAGE_CHECK,$/;"	e	enum:__anon8c8ba1920103	file:
STAGE_COUNT	cmd/sf.c	/^	STAGE_COUNT,$/;"	e	enum:__anon8c8ba1920103	file:
STAGE_ERASE	cmd/sf.c	/^	STAGE_ERASE,$/;"	e	enum:__anon8c8ba1920103	file:
STAGE_READ	cmd/sf.c	/^	STAGE_READ,$/;"	e	enum:__anon8c8ba1920103	file:
STAGE_WRITE	cmd/sf.c	/^	STAGE_WRITE,$/;"	e	enum:__anon8c8ba1920103	file:
STAIE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	STAIE	/;"	d
STALL_BITMASK	include/usb/mpc8xx_udc.h	/^#define STALL_BITMASK /;"	d
STALL_RECEIVED_H	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_RECEIVED_H	/;"	d
STALL_RECEIVED_RH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_RECEIVED_RH	/;"	d
STALL_RECEIVED_TH	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_RECEIVED_TH	/;"	d
STALL_SEND_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_SEND_R	/;"	d
STALL_SEND_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_SEND_T	/;"	d
STALL_SENT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_SENT	/;"	d
STALL_SENT_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_SENT_R	/;"	d
STALL_SENT_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STALL_SENT_T	/;"	d
STAMP_VALUE	tools/mksunxiboot.c	/^#define STAMP_VALUE /;"	d	file:
STANDALONE	examples/standalone/mem_to_mem_idma2intr.c	/^#define STANDALONE$/;"	d	file:
STANDBY_CUR_SEL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define STANDBY_CUR_SEL	/;"	d
STAOP	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	STAOP	/;"	d
STAR	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
STARQ	lib/slre.c	/^	STAR, PLUS, STARQ, PLUSQ, QUEST, SPACE, NONSPACE, DIGIT};$/;"	e	enum:__anon5875e6120103	file:
START	include/fat.h	/^#define START(/;"	d
STARTOFTIME	drivers/rtc/date.c	/^#define	STARTOFTIME	/;"	d	file:
STARTOFTIME	drivers/rtc/mcfrtc.c	/^#define	STARTOFTIME	/;"	d	file:
STARTUP	board/siemens/common/board.c	/^#define STARTUP	/;"	d	file:
START_ADDR	drivers/net/bfin_mac.h	/^	u32 START_ADDR;$/;"	m	struct:dma_descriptor	typeref:typename:u32
START_BASE	drivers/net/ax88180.h	/^  #define START_BASE	/;"	d
START_BIT	drivers/mtd/nand/vf610_nfc.c	/^#define START_BIT	/;"	d	file:
START_BIT_ERR	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define             START_BIT_ERR /;"	d
START_BIT_ERR_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define        START_BIT_ERR_MASK /;"	d
START_BIT_ERR_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define        START_BIT_ERR_STAT /;"	d
START_BURST_IN_ADDR	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define START_BURST_IN_ADDR	/;"	d
START_BURST_IN_ADDR	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define START_BURST_IN_ADDR	/;"	d
START_CHAR	cmd/load.c	/^#define START_CHAR /;"	d	file:
START_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define START_CMD	/;"	d
START_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	START_CMD			= 1 << 31,$/;"	e	enum:__anon957231910203	file:
START_CP	arch/arm/include/asm/arch-tegra/pmc.h	/^#define START_CP	/;"	d
START_DE4X5	drivers/net/dc2114x.c	/^#define START_DE4X5(/;"	d	file:
START_DELAY_US	arch/powerpc/cpu/mpc8260/i2c.c	/^#define START_DELAY_US	/;"	d	file:
START_OF_INSTR	drivers/bios_emulator/include/x86emu/debug.h	/^# define START_OF_INSTR(/;"	d
START_PG	drivers/net/ax88796.h	/^#define START_PG	/;"	d
START_PG	drivers/net/ne2000.h	/^#define START_PG	/;"	d
START_PG2	drivers/net/ax88796.h	/^#define START_PG2	/;"	d
START_PG2	drivers/net/ne2000.h	/^#define START_PG2	/;"	d
START_REG	arch/powerpc/cpu/mpc512x/start.S	/^#define START_REG(/;"	d	file:
START_REG	include/mpc5xxx.h	/^#define START_REG(/;"	d
START_STRSIZE	scripts/kconfig/zconf.lex.c	/^#define START_STRSIZE	/;"	d	file:
START_TRANSFER	drivers/usb/gadget/f_mass_storage.c	/^#define START_TRANSFER(/;"	d	file:
START_TRANSFER_OR	drivers/usb/gadget/f_mass_storage.c	/^#define START_TRANSFER_OR(/;"	d	file:
START_WATCHDOG_TIMER	drivers/net/ax88180.h	/^  #define START_WATCHDOG_TIMER	/;"	d
STATDA0	arch/blackfin/lib/kgdb.h	/^#define STATDA0	/;"	d
STATDA1	arch/blackfin/lib/kgdb.h	/^#define STATDA1	/;"	d
STATE	include/lattice.h	/^#define STATE	/;"	d
STATE	include/ppc_defs.h	/^#define	STATE	/;"	d
STATE0	drivers/video/tegra124/sor.h	/^#define STATE0	/;"	d
STATE0_UPDATE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE0_UPDATE_DEFAULT_MASK	/;"	d
STATE0_UPDATE_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE0_UPDATE_SHIFT	/;"	d
STATE1	drivers/video/tegra124/sor.h	/^#define STATE1	/;"	d
STATE1_ASY_CRCMODE_ACTIVE_RASTER	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_CRCMODE_ACTIVE_RASTER	/;"	d
STATE1_ASY_CRCMODE_COMPLETE_RASTER	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_CRCMODE_COMPLETE_RASTER	/;"	d
STATE1_ASY_CRCMODE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_CRCMODE_DEFAULT_MASK	/;"	d
STATE1_ASY_CRCMODE_NON_ACTIVE_RASTER	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_CRCMODE_NON_ACTIVE_RASTER	/;"	d
STATE1_ASY_CRCMODE_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_CRCMODE_SHIFT	/;"	d
STATE1_ASY_DEPOL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_DEPOL_DEFAULT_MASK	/;"	d
STATE1_ASY_DEPOL_NEGATIVE_TRUE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_DEPOL_NEGATIVE_TRUE	/;"	d
STATE1_ASY_DEPOL_POSITIVE_TRUE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_DEPOL_POSITIVE_TRUE	/;"	d
STATE1_ASY_DEPOL_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_DEPOL_SHIFT	/;"	d
STATE1_ASY_HSYNCPOL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_HSYNCPOL_DEFAULT_MASK	/;"	d
STATE1_ASY_HSYNCPOL_NEGATIVE_TRUE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_HSYNCPOL_NEGATIVE_TRUE	/;"	d
STATE1_ASY_HSYNCPOL_POSITIVE_TRUE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_HSYNCPOL_POSITIVE_TRUE	/;"	d
STATE1_ASY_HSYNCPOL_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_HSYNCPOL_SHIFT	/;"	d
STATE1_ASY_OWNER_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_OWNER_DEFAULT_MASK	/;"	d
STATE1_ASY_OWNER_HEAD0	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_OWNER_HEAD0	/;"	d
STATE1_ASY_OWNER_HEAD1	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_OWNER_HEAD1	/;"	d
STATE1_ASY_OWNER_NONE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_OWNER_NONE	/;"	d
STATE1_ASY_OWNER_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_OWNER_SHIFT	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_16_422	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_16_422	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_18_444	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_18_444	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_20_422	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_20_422	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_24_422	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_24_422	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_24_444	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_24_444	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_30_444	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_30_444	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_32_422	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_32_422	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_36_444	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_36_444	/;"	d
STATE1_ASY_PIXELDEPTH_BPP_48_444	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_BPP_48_444	/;"	d
STATE1_ASY_PIXELDEPTH_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_DEFAULT_MASK	/;"	d
STATE1_ASY_PIXELDEPTH_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PIXELDEPTH_SHIFT	/;"	d
STATE1_ASY_PROTOCOL_CUSTOM	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PROTOCOL_CUSTOM	/;"	d
STATE1_ASY_PROTOCOL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PROTOCOL_DEFAULT_MASK	/;"	d
STATE1_ASY_PROTOCOL_DP_A	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PROTOCOL_DP_A	/;"	d
STATE1_ASY_PROTOCOL_DP_B	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PROTOCOL_DP_B	/;"	d
STATE1_ASY_PROTOCOL_LVDS_CUSTOM	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PROTOCOL_LVDS_CUSTOM	/;"	d
STATE1_ASY_PROTOCOL_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_PROTOCOL_SHIFT	/;"	d
STATE1_ASY_REPLICATE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_REPLICATE_DEFAULT_MASK	/;"	d
STATE1_ASY_REPLICATE_OFF	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_REPLICATE_OFF	/;"	d
STATE1_ASY_REPLICATE_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_REPLICATE_SHIFT	/;"	d
STATE1_ASY_REPLICATE_X2	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_REPLICATE_X2	/;"	d
STATE1_ASY_REPLICATE_X4	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_REPLICATE_X4	/;"	d
STATE1_ASY_SUBOWNER_BOTH	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_SUBOWNER_BOTH	/;"	d
STATE1_ASY_SUBOWNER_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_SUBOWNER_DEFAULT_MASK	/;"	d
STATE1_ASY_SUBOWNER_NONE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_SUBOWNER_NONE	/;"	d
STATE1_ASY_SUBOWNER_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_SUBOWNER_SHIFT	/;"	d
STATE1_ASY_SUBOWNER_SUBHEAD0	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_SUBOWNER_SUBHEAD0	/;"	d
STATE1_ASY_SUBOWNER_SUBHEAD1	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_SUBOWNER_SUBHEAD1	/;"	d
STATE1_ASY_VSYNCPOL_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_VSYNCPOL_DEFAULT_MASK	/;"	d
STATE1_ASY_VSYNCPOL_NEGATIVE_TRUE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_VSYNCPOL_NEGATIVE_TRUE	/;"	d
STATE1_ASY_VSYNCPOL_POSITIVE_TRUE	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_VSYNCPOL_POSITIVE_TRUE	/;"	d
STATE1_ASY_VSYNCPOL_SHIFT	drivers/video/tegra124/sor.h	/^#define STATE1_ASY_VSYNCPOL_SHIFT	/;"	d
STATE_ADDRESSED	include/usbdevice.h	/^	STATE_ADDRESSED,	\/* we have been addressed (in default configuration) *\/$/;"	e	enum:usb_device_state
STATE_ATTACHED	include/usbdevice.h	/^	STATE_ATTACHED,		\/* we are attached *\/$/;"	e	enum:usb_device_state
STATE_AUTOCONF	tools/moveconfig.py	/^STATE_AUTOCONF = 2$/;"	v
STATE_BAD_MAGIC	net/tftp.c	/^#define STATE_BAD_MAGIC	/;"	d	file:
STATE_CMD_DONE	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_CMD_DONE,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_CMD_HANDLE	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_CMD_HANDLE,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_CONFIGURED	include/usbdevice.h	/^	STATE_CONFIGURED,	\/* we have seen a set configuration device command *\/$/;"	e	enum:usb_device_state
STATE_CREATED	include/usbdevice.h	/^	STATE_CREATED,		\/* just created *\/$/;"	e	enum:usb_device_state
STATE_DATA	net/tftp.c	/^#define STATE_DATA	/;"	d	file:
STATE_DEFAULT	include/usbdevice.h	/^	STATE_DEFAULT,		\/* we been reset *\/$/;"	e	enum:usb_device_state
STATE_DEFCONFIG	tools/moveconfig.py	/^STATE_DEFCONFIG = 1$/;"	v
STATE_DIFFS	tools/patman/patchstream.py	/^STATE_DIFFS = 3             # In the diff part (past --- line)$/;"	v
STATE_DMA_DONE	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_DMA_DONE,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_DMA_READING	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_DMA_READING,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_DMA_WRITING	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_DMA_WRITING,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_EMPTY	examples/standalone/sched.c	/^#define STATE_EMPTY /;"	d	file:
STATE_ERROR	include/usb/mpc8xx_udc.h	/^	STATE_ERROR,$/;"	e	enum:mpc8xx_udc_state
STATE_IDLE	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_IDLE = 0,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_IDLE	tools/moveconfig.py	/^STATE_IDLE = 0$/;"	v
STATE_INIT	include/usbdevice.h	/^	STATE_INIT,		\/* just initialized *\/$/;"	e	enum:usb_device_state
STATE_LOOKUP_REQ	net/nfs.c	/^#define STATE_LOOKUP_REQ	/;"	d	file:
STATE_MOUNT_REQ	net/nfs.c	/^#define STATE_MOUNT_REQ	/;"	d	file:
STATE_MSG_HEADER	tools/patman/patchstream.py	/^STATE_MSG_HEADER = 0        # Still in the message header$/;"	v
STATE_NOT_READY	include/usb/mpc8xx_udc.h	/^	STATE_NOT_READY,$/;"	e	enum:mpc8xx_udc_state
STATE_OACK	net/tftp.c	/^#define STATE_OACK	/;"	d	file:
STATE_PATCH_HEADER	tools/patman/patchstream.py	/^STATE_PATCH_HEADER = 2      # In patch header (after the subject)$/;"	v
STATE_PATCH_SUBJECT	tools/patman/patchstream.py	/^STATE_PATCH_SUBJECT = 1     # In patch subject (first line of log for a commit)$/;"	v
STATE_PIO_READING	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_PIO_READING,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_PIO_WRITING	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_PIO_WRITING,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_POWERED	include/usbdevice.h	/^	STATE_POWERED,		\/* we have seen power indication (electrical bus signal) *\/$/;"	e	enum:usb_device_state
STATE_PRCLOOKUP_PROG_MOUNT_REQ	net/nfs.c	/^#define STATE_PRCLOOKUP_PROG_MOUNT_REQ	/;"	d	file:
STATE_PRCLOOKUP_PROG_NFS_REQ	net/nfs.c	/^#define STATE_PRCLOOKUP_PROG_NFS_REQ	/;"	d	file:
STATE_PREPARED	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_PREPARED,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_PROC_RX_RECEIVE_TIMEOUT	board/gdsys/common/cmd_ioloop.c	/^	STATE_PROC_RX_RECEIVE_TIMEOUT = 1<<6,$/;"	e	enum:__anon6137e5c30103	file:
STATE_PROC_RX_STORE_TIMEOUT	board/gdsys/common/cmd_ioloop.c	/^	STATE_PROC_RX_STORE_TIMEOUT = 1<<5,$/;"	e	enum:__anon6137e5c30103	file:
STATE_READLINK_REQ	net/nfs.c	/^#define STATE_READLINK_REQ	/;"	d	file:
STATE_READY	drivers/mtd/nand/pxa3xx_nand.c	/^	STATE_READY,$/;"	e	enum:__anon8b22f9f40203	file:
STATE_READY	include/usb/mpc8xx_udc.h	/^	STATE_READY,$/;"	e	enum:mpc8xx_udc_state
STATE_READ_REQ	net/nfs.c	/^#define STATE_READ_REQ	/;"	d	file:
STATE_RECEIVE_TIMEOUT	board/gdsys/common/cmd_ioloop.c	/^	STATE_RECEIVE_TIMEOUT = 1<<4,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RECV_WRQ	net/tftp.c	/^#define STATE_RECV_WRQ	/;"	d	file:
STATE_RUNNABLE	examples/standalone/sched.c	/^#define STATE_RUNNABLE /;"	d	file:
STATE_RX_DATA_AVAILABLE	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_DATA_AVAILABLE = 1<<15,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_DATA_FIRST	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_DATA_FIRST = 1<<13,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_DATA_LAST	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_DATA_LAST = 1<<12,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_DIST_ERR	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_DIST_ERR = 1<<7,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_FCS_ERR	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_FCS_ERR = 1<<10,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_FRAME_CTR_ERR	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_FRAME_CTR_ERR = 1<<9,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_LENGTH_ERR	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_LENGTH_ERR = 1<<8,$/;"	e	enum:__anon6137e5c30103	file:
STATE_RX_PACKET_DROPPED	board/gdsys/common/cmd_ioloop.c	/^	STATE_RX_PACKET_DROPPED = 1<<11,$/;"	e	enum:__anon6137e5c30103	file:
STATE_SAVEDEFCONFIG	tools/moveconfig.py	/^STATE_SAVEDEFCONFIG = 3$/;"	v
STATE_SEND_RRQ	net/tftp.c	/^#define STATE_SEND_RRQ	/;"	d	file:
STATE_SEND_WRQ	net/tftp.c	/^#define STATE_SEND_WRQ	/;"	d	file:
STATE_STOPPED	examples/standalone/sched.c	/^#define STATE_STOPPED /;"	d	file:
STATE_TERMINATED	examples/standalone/sched.c	/^#define STATE_TERMINATED /;"	d	file:
STATE_TERM_COOKED	arch/sandbox/include/asm/state.h	/^	STATE_TERM_COOKED,$/;"	e	enum:state_terminal_raw
STATE_TERM_COUNT	arch/sandbox/include/asm/state.h	/^	STATE_TERM_COUNT,$/;"	e	enum:state_terminal_raw
STATE_TERM_RAW	arch/sandbox/include/asm/state.h	/^	STATE_TERM_RAW,$/;"	e	enum:state_terminal_raw
STATE_TERM_RAW_WITH_SIGS	arch/sandbox/include/asm/state.h	/^	STATE_TERM_RAW_WITH_SIGS,	\/* Default *\/$/;"	e	enum:state_terminal_raw
STATE_TOO_LARGE	net/tftp.c	/^#define STATE_TOO_LARGE	/;"	d	file:
STATE_TX_BUFFER_FULL	board/gdsys/common/cmd_ioloop.c	/^	STATE_TX_BUFFER_FULL = 1<<2,$/;"	e	enum:__anon6137e5c30103	file:
STATE_TX_ERR	board/gdsys/common/cmd_ioloop.c	/^	STATE_TX_ERR = 1<<3,$/;"	e	enum:__anon6137e5c30103	file:
STATE_TX_PACKET_BUILDING	board/gdsys/common/cmd_ioloop.c	/^	STATE_TX_PACKET_BUILDING = 1<<0,$/;"	e	enum:__anon6137e5c30103	file:
STATE_TX_TRANSMITTING	board/gdsys/common/cmd_ioloop.c	/^	STATE_TX_TRANSMITTING = 1<<1,$/;"	e	enum:__anon6137e5c30103	file:
STATE_UMOUNT_REQ	net/nfs.c	/^#define STATE_UMOUNT_REQ	/;"	d	file:
STATE_UNKNOWN	include/usbdevice.h	/^	STATE_UNKNOWN,		\/* destroyed *\/$/;"	e	enum:usb_device_state
STATIA0	arch/blackfin/lib/kgdb.h	/^#define STATIA0	/;"	d
STATIA1	arch/blackfin/lib/kgdb.h	/^#define STATIA1	/;"	d
STATIA2	arch/blackfin/lib/kgdb.h	/^#define STATIA2	/;"	d
STATIA3	arch/blackfin/lib/kgdb.h	/^#define STATIA3	/;"	d
STATIA4	arch/blackfin/lib/kgdb.h	/^#define STATIA4	/;"	d
STATIA5	arch/blackfin/lib/kgdb.h	/^#define STATIA5	/;"	d
STATIC_CALIB_STEPS	drivers/ddr/altera/sequencer.c	/^#define STATIC_CALIB_STEPS /;"	d	file:
STATIC_IN_RTL_SIM	drivers/ddr/altera/sequencer.c	/^#define STATIC_IN_RTL_SIM /;"	d	file:
STATIC_LEVELING	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	STATIC_LEVELING,$/;"	e	enum:auto_tune_stage
STATIC_LEVELING_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define STATIC_LEVELING_MASK_BIT	/;"	d
STATIC_SKIP_DELAY_LOOPS	drivers/ddr/altera/sequencer.c	/^#define STATIC_SKIP_DELAY_LOOPS /;"	d	file:
STATIC_TRAINING	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define STATIC_TRAINING$/;"	d
STATIC_TREES	lib/zlib/zutil.h	/^#define STATIC_TREES /;"	d
STATLEGEN0CH0	arch/x86/cpu/quark/smc.h	/^#define STATLEGEN0CH0	/;"	d
STATLEGEN1CH0	arch/x86/cpu/quark/smc.h	/^#define STATLEGEN1CH0	/;"	d
STATM_PRGD_M	drivers/misc/fsl_iim.c	/^#define STATM_PRGD_M	/;"	d	file:
STATM_SNSD_M	drivers/misc/fsl_iim.c	/^#define STATM_SNSD_M	/;"	d	file:
STATUS	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STATUS	/;"	d
STATUS	include/ns87308.h	/^#define STATUS /;"	d
STATUS	include/radeon.h	/^#define STATUS	/;"	d
STATUS0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO2_MARK, STATUS0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
STATUS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO3_MARK, STATUS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
STATUS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	GPO4_MARK, STATUS2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
STATUSB_IP0	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP0	/;"	d
STATUSB_IP1	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP1	/;"	d
STATUSB_IP10	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP10	/;"	d
STATUSB_IP11	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP11	/;"	d
STATUSB_IP12	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP12	/;"	d
STATUSB_IP13	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP13	/;"	d
STATUSB_IP14	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP14	/;"	d
STATUSB_IP15	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP15	/;"	d
STATUSB_IP2	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP2	/;"	d
STATUSB_IP3	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP3	/;"	d
STATUSB_IP4	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP4	/;"	d
STATUSB_IP5	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP5	/;"	d
STATUSB_IP6	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP6	/;"	d
STATUSB_IP7	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP7	/;"	d
STATUSB_IP8	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP8	/;"	d
STATUSB_IP9	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSB_IP9	/;"	d
STATUSF_IP0	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP0	/;"	d
STATUSF_IP1	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP1	/;"	d
STATUSF_IP10	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP10	/;"	d
STATUSF_IP11	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP11	/;"	d
STATUSF_IP12	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP12	/;"	d
STATUSF_IP13	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP13	/;"	d
STATUSF_IP14	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP14	/;"	d
STATUSF_IP15	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP15	/;"	d
STATUSF_IP2	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP2	/;"	d
STATUSF_IP3	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP3	/;"	d
STATUSF_IP4	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP4	/;"	d
STATUSF_IP5	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP5	/;"	d
STATUSF_IP6	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP6	/;"	d
STATUSF_IP7	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP7	/;"	d
STATUSF_IP8	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP8	/;"	d
STATUSF_IP9	arch/mips/include/asm/mipsregs.h	/^#define	 STATUSF_IP9	/;"	d
STATUSPKT_H	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define STATUSPKT_H	/;"	d
STATUS_0	cmd/fdc.c	/^#define STATUS_0	/;"	d	file:
STATUS_0	drivers/mtd/nand/tegra_nand.h	/^#define STATUS_0	/;"	d
STATUS_1	cmd/fdc.c	/^#define STATUS_1	/;"	d	file:
STATUS_2	cmd/fdc.c	/^#define STATUS_2	/;"	d	file:
STATUS_AER	drivers/block/ftide020.h	/^#define STATUS_AER	/;"	d
STATUS_BUF_OVFL	drivers/mmc/mxcmmc.c	/^#define STATUS_BUF_OVFL	/;"	d	file:
STATUS_BUF_READ_RDY	drivers/mmc/mxcmmc.c	/^#define STATUS_BUF_READ_RDY	/;"	d	file:
STATUS_BUF_UND_RUN	drivers/mmc/mxcmmc.c	/^#define STATUS_BUF_UND_RUN	/;"	d	file:
STATUS_BUF_WRITE_RDY	drivers/mmc/mxcmmc.c	/^#define STATUS_BUF_WRITE_RDY	/;"	d	file:
STATUS_BYTE1_MASK	drivers/mtd/nand/vf610_nfc.c	/^#define STATUS_BYTE1_MASK	/;"	d	file:
STATUS_BYTECOUNT	drivers/usb/gadget/ether.c	/^#define STATUS_BYTECOUNT	/;"	d	file:
STATUS_CAN_ISF	board/esd/pmc440/pmc440.h	/^#define STATUS_CAN_ISF /;"	d
STATUS_CARD_BUS_CLK_RUN	drivers/mmc/mxcmmc.c	/^#define STATUS_CARD_BUS_CLK_RUN	/;"	d	file:
STATUS_CARD_INSERTION	drivers/mmc/mxcmmc.c	/^#define STATUS_CARD_INSERTION	/;"	d	file:
STATUS_CARD_REMOVAL	drivers/mmc/mxcmmc.c	/^#define STATUS_CARD_REMOVAL	/;"	d	file:
STATUS_COUNTER	drivers/block/ftide020.h	/^#define STATUS_COUNTER(/;"	d
STATUS_CRC_READ_ERR	drivers/mmc/mxcmmc.c	/^#define STATUS_CRC_READ_ERR	/;"	d	file:
STATUS_CRC_WRITE_ERR	drivers/mmc/mxcmmc.c	/^#define STATUS_CRC_WRITE_ERR	/;"	d	file:
STATUS_CS	drivers/block/ftide020.h	/^#define STATUS_CS(/;"	d
STATUS_CSEL	drivers/block/ftide020.h	/^#define STATUS_CSEL	/;"	d
STATUS_CSTM_ISF	board/esd/pmc440/pmc440.h	/^#define STATUS_CSTM_ISF /;"	d
STATUS_CYCLE	drivers/mtd/nand/denali.c	/^#define STATUS_CYCLE	/;"	d	file:
STATUS_DASP	drivers/block/ftide020.h	/^#define STATUS_DASP	/;"	d
STATUS_DATA_TRANS_DONE	drivers/mmc/mxcmmc.c	/^#define STATUS_DATA_TRANS_DONE	/;"	d	file:
STATUS_DEV	drivers/block/ftide020.h	/^#define STATUS_DEV	/;"	d
STATUS_DIOR	drivers/block/ftide020.h	/^#define STATUS_DIOR	/;"	d
STATUS_DIOW	drivers/block/ftide020.h	/^#define STATUS_DIOW	/;"	d
STATUS_DMA	drivers/block/ftide020.h	/^#define STATUS_DMA	/;"	d
STATUS_DMACK	drivers/block/ftide020.h	/^#define STATUS_DMACK	/;"	d
STATUS_DMARQ	drivers/block/ftide020.h	/^#define STATUS_DMARQ	/;"	d
STATUS_END_CMD_RESP	drivers/mmc/mxcmmc.c	/^#define STATUS_END_CMD_RESP	/;"	d	file:
STATUS_ERR	drivers/block/ftide020.h	/^#define STATUS_ERR	/;"	d
STATUS_ERR_MASK	drivers/mmc/mxcmmc.c	/^#define STATUS_ERR_MASK	/;"	d	file:
STATUS_FIFO_ISF	board/esd/pmc440/pmc440.h	/^#define STATUS_FIFO_ISF /;"	d
STATUS_HEAD	cmd/fdc.c	/^#define STATUS_HEAD	/;"	d	file:
STATUS_HOST_ISF	board/esd/pmc440/pmc440.h	/^#define STATUS_HOST_ISF /;"	d
STATUS_HWREV_MASK	board/esd/pmc440/pmc440.h	/^#define STATUS_HWREV_MASK /;"	d
STATUS_HWREV_SHIFT	board/esd/pmc440/pmc440.h	/^#define STATUS_HWREV_SHIFT /;"	d
STATUS_IBF	include/i8042.h	/^#define STATUS_IBF	/;"	d
STATUS_IE	arch/nios2/include/asm/nios2.h	/^#define STATUS_IE	/;"	d
STATUS_INTRQ	drivers/block/ftide020.h	/^#define STATUS_INTRQ	/;"	d
STATUS_IORDY	drivers/block/ftide020.h	/^#define STATUS_IORDY	/;"	d
STATUS_LED_ACTIVE	include/configs/eb_cpu5282.h	/^#define STATUS_LED_ACTIVE	/;"	d
STATUS_LED_ACTIVE	include/status_led.h	/^# define STATUS_LED_ACTIVE	/;"	d
STATUS_LED_BIT	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_BIT /;"	d
STATUS_LED_BIT	include/configs/bf533-stamp.h	/^#define STATUS_LED_BIT /;"	d
STATUS_LED_BIT	include/configs/cm_t335.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/cm_t35.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/cm_t3517.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/eb_cpu5282.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/edb93xx.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/mx23_olinuxino.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/omap3_beagle.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/omap3_igep00x0.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/tqma6_wru4.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/configs/tricorder.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/status_led.h	/^# define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT	include/status_led.h	/^#define STATUS_LED_BIT	/;"	d
STATUS_LED_BIT1	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_BIT1 /;"	d
STATUS_LED_BIT1	include/configs/bf533-stamp.h	/^#define STATUS_LED_BIT1 /;"	d
STATUS_LED_BIT1	include/configs/edb93xx.h	/^#define STATUS_LED_BIT1	/;"	d
STATUS_LED_BIT1	include/configs/omap3_beagle.h	/^#define STATUS_LED_BIT1	/;"	d
STATUS_LED_BIT1	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_BIT1	/;"	d
STATUS_LED_BIT1	include/configs/tqma6_wru4.h	/^#define STATUS_LED_BIT1	/;"	d
STATUS_LED_BIT1	include/configs/tricorder.h	/^#define STATUS_LED_BIT1	/;"	d
STATUS_LED_BIT1	include/status_led.h	/^#define STATUS_LED_BIT1	/;"	d
STATUS_LED_BIT2	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_BIT2	/;"	d
STATUS_LED_BIT2	include/configs/tqma6_wru4.h	/^#define STATUS_LED_BIT2	/;"	d
STATUS_LED_BIT2	include/configs/tricorder.h	/^#define STATUS_LED_BIT2	/;"	d
STATUS_LED_BIT3	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_BIT3	/;"	d
STATUS_LED_BIT3	include/configs/tqma6_wru4.h	/^#define STATUS_LED_BIT3	/;"	d
STATUS_LED_BIT4	include/configs/tqma6_wru4.h	/^#define STATUS_LED_BIT4	/;"	d
STATUS_LED_BIT5	include/configs/tqma6_wru4.h	/^#define STATUS_LED_BIT5	/;"	d
STATUS_LED_BLINKING	include/status_led.h	/^#define STATUS_LED_BLINKING	/;"	d
STATUS_LED_BOOT	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_BOOT /;"	d
STATUS_LED_BOOT	include/configs/bf533-stamp.h	/^#define STATUS_LED_BOOT /;"	d
STATUS_LED_BOOT	include/configs/cm_t335.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/cm_t35.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/cm_t3517.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/eb_cpu5282.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/edb93xx.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/mx23_olinuxino.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/omap3_beagle.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/configs/omap3_igep00x0.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/status_led.h	/^# define STATUS_LED_BOOT	/;"	d
STATUS_LED_BOOT	include/status_led.h	/^#define STATUS_LED_BOOT	/;"	d
STATUS_LED_CRASH	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_CRASH /;"	d
STATUS_LED_CRASH	include/configs/bf533-stamp.h	/^#define STATUS_LED_CRASH /;"	d
STATUS_LED_DAT	include/status_led.h	/^# define STATUS_LED_DAT	/;"	d
STATUS_LED_DIR	include/status_led.h	/^# define STATUS_LED_DIR	/;"	d
STATUS_LED_GREEN	include/configs/edb93xx.h	/^#define STATUS_LED_GREEN	/;"	d
STATUS_LED_GREEN	include/configs/omap3_beagle.h	/^#define STATUS_LED_GREEN	/;"	d
STATUS_LED_ODR	include/status_led.h	/^# define STATUS_LED_ODR	/;"	d
STATUS_LED_OFF	board/bf533-stamp/bf533-stamp.c	/^#define STATUS_LED_OFF /;"	d	file:
STATUS_LED_OFF	include/status_led.h	/^#define STATUS_LED_OFF	/;"	d
STATUS_LED_ON	board/bf533-stamp/bf533-stamp.c	/^#define STATUS_LED_ON /;"	d	file:
STATUS_LED_ON	include/status_led.h	/^#define STATUS_LED_ON	/;"	d
STATUS_LED_PAR	include/status_led.h	/^# define STATUS_LED_PAR	/;"	d
STATUS_LED_PERIOD	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_PERIOD /;"	d
STATUS_LED_PERIOD	include/configs/bf533-stamp.h	/^#define STATUS_LED_PERIOD /;"	d
STATUS_LED_PERIOD	include/configs/cm_t335.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/cm_t35.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/cm_t3517.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/eb_cpu5282.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/edb93xx.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/mx23_olinuxino.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/omap3_beagle.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/omap3_igep00x0.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/tqma6_wru4.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/configs/tricorder.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/status_led.h	/^# define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD	include/status_led.h	/^#define STATUS_LED_PERIOD	/;"	d
STATUS_LED_PERIOD1	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_PERIOD1 /;"	d
STATUS_LED_PERIOD1	include/configs/bf533-stamp.h	/^#define STATUS_LED_PERIOD1 /;"	d
STATUS_LED_PERIOD1	include/configs/edb93xx.h	/^#define STATUS_LED_PERIOD1	/;"	d
STATUS_LED_PERIOD1	include/configs/omap3_beagle.h	/^#define STATUS_LED_PERIOD1	/;"	d
STATUS_LED_PERIOD1	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_PERIOD1	/;"	d
STATUS_LED_PERIOD1	include/configs/tqma6_wru4.h	/^#define STATUS_LED_PERIOD1	/;"	d
STATUS_LED_PERIOD1	include/configs/tricorder.h	/^#define STATUS_LED_PERIOD1	/;"	d
STATUS_LED_PERIOD1	include/status_led.h	/^#define STATUS_LED_PERIOD1	/;"	d
STATUS_LED_PERIOD2	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_PERIOD2	/;"	d
STATUS_LED_PERIOD2	include/configs/tqma6_wru4.h	/^#define STATUS_LED_PERIOD2	/;"	d
STATUS_LED_PERIOD2	include/configs/tricorder.h	/^#define STATUS_LED_PERIOD2	/;"	d
STATUS_LED_PERIOD3	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_PERIOD3	/;"	d
STATUS_LED_PERIOD3	include/configs/tqma6_wru4.h	/^#define STATUS_LED_PERIOD3	/;"	d
STATUS_LED_PERIOD4	include/configs/tqma6_wru4.h	/^#define STATUS_LED_PERIOD4	/;"	d
STATUS_LED_PERIOD5	include/configs/tqma6_wru4.h	/^#define STATUS_LED_PERIOD5	/;"	d
STATUS_LED_RED	include/configs/edb93xx.h	/^#define STATUS_LED_RED	/;"	d
STATUS_LED_STATE	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_STATE /;"	d
STATUS_LED_STATE	include/configs/bf533-stamp.h	/^#define STATUS_LED_STATE /;"	d
STATUS_LED_STATE	include/configs/cm_t335.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/cm_t35.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/cm_t3517.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/eb_cpu5282.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/edb93xx.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/mx23_olinuxino.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/omap3_beagle.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/omap3_igep00x0.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/tqma6_wru4.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/configs/tricorder.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/status_led.h	/^# define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE	include/status_led.h	/^#define STATUS_LED_STATE	/;"	d
STATUS_LED_STATE1	include/configs/bf526-ezbrd.h	/^#define STATUS_LED_STATE1 /;"	d
STATUS_LED_STATE1	include/configs/bf533-stamp.h	/^#define STATUS_LED_STATE1 /;"	d
STATUS_LED_STATE1	include/configs/edb93xx.h	/^#define STATUS_LED_STATE1	/;"	d
STATUS_LED_STATE1	include/configs/omap3_beagle.h	/^#define STATUS_LED_STATE1	/;"	d
STATUS_LED_STATE1	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_STATE1	/;"	d
STATUS_LED_STATE1	include/configs/tqma6_wru4.h	/^#define STATUS_LED_STATE1	/;"	d
STATUS_LED_STATE1	include/configs/tricorder.h	/^#define STATUS_LED_STATE1	/;"	d
STATUS_LED_STATE1	include/status_led.h	/^#define STATUS_LED_STATE1	/;"	d
STATUS_LED_STATE2	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_STATE2	/;"	d
STATUS_LED_STATE2	include/configs/tqma6_wru4.h	/^#define STATUS_LED_STATE2	/;"	d
STATUS_LED_STATE2	include/configs/tricorder.h	/^#define STATUS_LED_STATE2	/;"	d
STATUS_LED_STATE3	include/configs/socfpga_vining_fpga.h	/^#define STATUS_LED_STATE3	/;"	d
STATUS_LED_STATE3	include/configs/tqma6_wru4.h	/^#define STATUS_LED_STATE3	/;"	d
STATUS_LED_STATE4	include/configs/tqma6_wru4.h	/^#define STATUS_LED_STATE4	/;"	d
STATUS_LED_STATE5	include/configs/tqma6_wru4.h	/^#define STATUS_LED_STATE5	/;"	d
STATUS_OBF	include/i8042.h	/^#define STATUS_OBF	/;"	d
STATUS_P0	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STATUS_P0	/;"	d
STATUS_P1	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STATUS_P1	/;"	d
STATUS_PCN	cmd/fdc.c	/^#define STATUS_PCN	/;"	d	file:
STATUS_PDIAG	drivers/block/ftide020.h	/^#define STATUS_PDIAG	/;"	d
STATUS_PEC	drivers/mtd/spi/sf_internal.h	/^#define STATUS_PEC	/;"	d
STATUS_PIO	drivers/block/ftide020.h	/^#define STATUS_PIO	/;"	d
STATUS_QEB_MICRON	drivers/mtd/spi/sf_internal.h	/^#define STATUS_QEB_MICRON	/;"	d
STATUS_QEB_MXIC	drivers/mtd/spi/sf_internal.h	/^#define STATUS_QEB_MXIC	/;"	d
STATUS_QEB_WINSPAN	drivers/mtd/spi/sf_internal.h	/^#define STATUS_QEB_WINSPAN	/;"	d
STATUS_RBSY0	drivers/mtd/nand/tegra_nand.h	/^#define STATUS_RBSY0	/;"	d
STATUS_READ_CMD_CODE	drivers/mtd/nand/vf610_nfc.c	/^#define STATUS_READ_CMD_CODE	/;"	d	file:
STATUS_READ_OP_DONE	drivers/mmc/mxcmmc.c	/^#define STATUS_READ_OP_DONE	/;"	d	file:
STATUS_RESP_CRC_ERR	drivers/mmc/mxcmmc.c	/^#define STATUS_RESP_CRC_ERR	/;"	d	file:
STATUS_RFE	drivers/block/ftide020.h	/^#define STATUS_RFE	/;"	d
STATUS_RXSTATUS	drivers/net/lpc32xx_eth.c	/^#define STATUS_RXSTATUS /;"	d	file:
STATUS_SDIO_INT_ACTIVE	drivers/mmc/mxcmmc.c	/^#define STATUS_SDIO_INT_ACTIVE	/;"	d	file:
STATUS_SECT	cmd/fdc.c	/^#define STATUS_SECT	/;"	d	file:
STATUS_SECT_SIZE	cmd/fdc.c	/^#define STATUS_SECT_SIZE	/;"	d	file:
STATUS_SET	arch/mips/cpu/start.S	/^# define STATUS_SET	/;"	d	file:
STATUS_STAGE_ADDR	drivers/usb/gadget/atmel_usba_udc.h	/^	STATUS_STAGE_ADDR,$/;"	e	enum:usba_ctrl_state
STATUS_STAGE_IN	drivers/usb/gadget/atmel_usba_udc.h	/^	STATUS_STAGE_IN,$/;"	e	enum:usba_ctrl_state
STATUS_STAGE_OUT	drivers/usb/gadget/atmel_usba_udc.h	/^	STATUS_STAGE_OUT,$/;"	e	enum:usba_ctrl_state
STATUS_STAGE_TEST	drivers/usb/gadget/atmel_usba_udc.h	/^	STATUS_STAGE_TEST,$/;"	e	enum:usba_ctrl_state
STATUS_TIME_OUT_READ	drivers/mmc/mxcmmc.c	/^#define STATUS_TIME_OUT_READ	/;"	d	file:
STATUS_TIME_OUT_RESP	drivers/mmc/mxcmmc.c	/^#define STATUS_TIME_OUT_RESP	/;"	d	file:
STATUS_TRACK	cmd/fdc.c	/^#define STATUS_TRACK	/;"	d	file:
STATUS_TXSTATUS	drivers/net/lpc32xx_eth.c	/^#define STATUS_TXSTATUS /;"	d	file:
STATUS_U	arch/nios2/include/asm/nios2.h	/^#define STATUS_U	/;"	d
STATUS_VERSION_MASK	board/esd/pmc440/pmc440.h	/^#define STATUS_VERSION_MASK /;"	d
STATUS_VERSION_SHIFT	board/esd/pmc440/pmc440.h	/^#define STATUS_VERSION_SHIFT /;"	d
STATUS_WFE	drivers/block/ftide020.h	/^#define STATUS_WFE	/;"	d
STATUS_WIP	drivers/mtd/spi/sf_internal.h	/^#define STATUS_WIP	/;"	d
STATUS_WRITE_OP_DONE	drivers/mmc/mxcmmc.c	/^#define STATUS_WRITE_OP_DONE	/;"	d	file:
STATUS_WR_CRC_ERROR_CODE_MASK	drivers/mmc/mxcmmc.c	/^#define STATUS_WR_CRC_ERROR_CODE_MASK	/;"	d	file:
STATUS_XBUF_EMPTY	drivers/mmc/mxcmmc.c	/^#define STATUS_XBUF_EMPTY	/;"	d	file:
STATUS_XBUF_FULL	drivers/mmc/mxcmmc.c	/^#define STATUS_XBUF_FULL	/;"	d	file:
STATUS_XPT	drivers/rtc/rs5c372.c	/^#define STATUS_XPT /;"	d	file:
STATUS_YBUF_EMPTY	drivers/mmc/mxcmmc.c	/^#define STATUS_YBUF_EMPTY	/;"	d	file:
STATUS_YBUF_FULL	drivers/mmc/mxcmmc.c	/^#define STATUS_YBUF_FULL	/;"	d	file:
STAT_BUSY	drivers/misc/fsl_iim.c	/^#define STAT_BUSY	/;"	d	file:
STAT_DIS_OFF	board/hisilicon/hikey/hikey.c	/^#define STAT_DIS_OFF /;"	d	file:
STAT_DMA_FIFO	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define STAT_DMA_FIFO	/;"	d	file:
STAT_EN_OFF	board/hisilicon/hikey/hikey.c	/^#define STAT_EN_OFF /;"	d	file:
STAT_FE	drivers/serial/serial_lpuart.c	/^#define STAT_FE	/;"	d	file:
STAT_FLAGS	drivers/serial/serial_lpuart.c	/^#define STAT_FLAGS	/;"	d	file:
STAT_IDLE	drivers/serial/serial_lpuart.c	/^#define STAT_IDLE	/;"	d	file:
STAT_LBKDIF	drivers/serial/serial_lpuart.c	/^#define STAT_LBKDIF	/;"	d	file:
STAT_MA1F	drivers/serial/serial_lpuart.c	/^#define STAT_MA1F	/;"	d	file:
STAT_MA2F	drivers/serial/serial_lpuart.c	/^#define STAT_MA2F	/;"	d	file:
STAT_NAND_READY	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define STAT_NAND_READY	/;"	d	file:
STAT_NF	drivers/serial/serial_lpuart.c	/^#define STAT_NF	/;"	d	file:
STAT_OR	drivers/serial/serial_lpuart.c	/^#define STAT_OR	/;"	d	file:
STAT_PF	drivers/serial/serial_lpuart.c	/^#define STAT_PF	/;"	d	file:
STAT_PRGD	drivers/misc/fsl_iim.c	/^#define STAT_PRGD	/;"	d	file:
STAT_RDRF	drivers/serial/serial_lpuart.c	/^#define STAT_RDRF	/;"	d	file:
STAT_RXEDGIF	drivers/serial/serial_lpuart.c	/^#define STAT_RXEDGIF	/;"	d	file:
STAT_RX_ALIGNMENT_ERROR	drivers/usb/eth/mcs7830.c	/^#define STAT_RX_ALIGNMENT_ERROR	/;"	d	file:
STAT_RX_CRC_ERROR	drivers/usb/eth/mcs7830.c	/^#define STAT_RX_CRC_ERROR	/;"	d	file:
STAT_RX_FRAME_CORRECT	drivers/usb/eth/mcs7830.c	/^#define STAT_RX_FRAME_CORRECT	/;"	d	file:
STAT_RX_LARGE_FRAME	drivers/usb/eth/mcs7830.c	/^#define STAT_RX_LARGE_FRAME	/;"	d	file:
STAT_RX_LENGTH_ERROR	drivers/usb/eth/mcs7830.c	/^#define STAT_RX_LENGTH_ERROR	/;"	d	file:
STAT_RX_SHORT_FRAME	drivers/usb/eth/mcs7830.c	/^#define STAT_RX_SHORT_FRAME	/;"	d	file:
STAT_SIZE	drivers/net/zynq_gem.c	/^#define STAT_SIZE	/;"	d	file:
STAT_SNSD	drivers/misc/fsl_iim.c	/^#define STAT_SNSD	/;"	d	file:
STAT_SPEED_FULL	drivers/usb/eth/r8152.h	/^#define STAT_SPEED_FULL	/;"	d
STAT_SPEED_HIGH	drivers/usb/eth/r8152.h	/^#define STAT_SPEED_HIGH	/;"	d
STAT_SPEED_MASK	drivers/usb/eth/r8152.h	/^#define STAT_SPEED_MASK	/;"	d
STAT_TDRE	drivers/serial/serial_lpuart.c	/^#define STAT_TDRE	/;"	d	file:
STAT_WEL	drivers/mtd/spi/sandbox.c	/^#define STAT_WEL	/;"	d	file:
STAT_WIP	drivers/mtd/spi/sandbox.c	/^#define STAT_WIP	/;"	d	file:
STB	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STB	/;"	d
STB	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define STB	/;"	d
STBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define STBCR /;"	d
STBCR	arch/sh/include/asm/cpu_sh7723.h	/^#define STBCR /;"	d
STBCR	arch/sh/include/asm/cpu_sh7724.h	/^#define STBCR /;"	d
STBCR	arch/sh/include/asm/cpu_sh7750.h	/^#define STBCR	/;"	d
STBCR10_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR10_A:	.long 0xFFFE0444$/;"	l
STBCR10_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR10_D:	.long 0x00000010$/;"	l
STBCR2	arch/sh/include/asm/cpu_sh7750.h	/^#define STBCR2	/;"	d
STBCR3_A	board/renesas/rsk7264/lowlevel_init.S	/^STBCR3_A:	.long 0xFFFE0408$/;"	l
STBCR3_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR3_A:	.long 0xFFFE0408$/;"	l
STBCR3_D	board/renesas/rsk7264/lowlevel_init.S	/^STBCR3_D:	.long 0x00000002$/;"	l
STBCR3_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR3_D:	.long 0x0000001A$/;"	l
STBCR4	arch/sh/cpu/sh2/cpu.c	/^#define STBCR4 /;"	d	file:
STBCR4_A	board/renesas/rsk7264/lowlevel_init.S	/^STBCR4_A:	.long 0xFFFE040C$/;"	l
STBCR4_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR4_A:	.long 0xFFFE040C$/;"	l
STBCR4_D	board/renesas/rsk7264/lowlevel_init.S	/^STBCR4_D:	.word 0x0000$/;"	l
STBCR4_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR4_D:	.long 0x00000000$/;"	l
STBCR5_A	board/renesas/rsk7264/lowlevel_init.S	/^STBCR5_A:	.long 0xFFFE0410$/;"	l
STBCR5_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR5_A:	.long 0xFFFE0410$/;"	l
STBCR5_D	board/renesas/rsk7264/lowlevel_init.S	/^STBCR5_D:	.long 0x00000010$/;"	l
STBCR5_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR5_D:	.long 0x00000000$/;"	l
STBCR6_A	board/renesas/rsk7264/lowlevel_init.S	/^STBCR6_A:	.long 0xFFFE0414$/;"	l
STBCR6_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR6_A:	.long 0xFFFE0414$/;"	l
STBCR6_D	board/renesas/rsk7264/lowlevel_init.S	/^STBCR6_D:	.long 0x00000002$/;"	l
STBCR6_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR6_D:	.long 0x00000000$/;"	l
STBCR7_A	board/renesas/rsk7264/lowlevel_init.S	/^STBCR7_A:	.long 0xFFFE0418$/;"	l
STBCR7_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR7_A:	.long 0xFFFE0418$/;"	l
STBCR7_D	board/renesas/rsk7264/lowlevel_init.S	/^STBCR7_D:	.long 0x0000002A$/;"	l
STBCR7_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR7_D:	.long 0x00000012$/;"	l
STBCR8_A	board/renesas/rsk7264/lowlevel_init.S	/^STBCR8_A:	.long 0xFFFE041C$/;"	l
STBCR8_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR8_A:	.long 0xFFFE041C$/;"	l
STBCR8_D	board/renesas/rsk7264/lowlevel_init.S	/^STBCR8_D:	.long 0x0000007E$/;"	l
STBCR8_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR8_D:	.long 0x00000009$/;"	l
STBCR9_A	board/renesas/rsk7269/lowlevel_init.S	/^STBCR9_A:	.long 0xFFFE0440$/;"	l
STBCR9_D	board/renesas/rsk7269/lowlevel_init.S	/^STBCR9_D:	.long 0x00000000$/;"	l
STBH	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define STBH	/;"	d
STBTT_DEF	drivers/video/stb_truetype.h	/^#define STBTT_DEF /;"	d
STBTT_FIX	drivers/video/stb_truetype.h	/^#define STBTT_FIX /;"	d
STBTT_FIXMASK	drivers/video/stb_truetype.h	/^#define STBTT_FIXMASK /;"	d
STBTT_FIXSHIFT	drivers/video/stb_truetype.h	/^#define STBTT_FIXSHIFT /;"	d
STBTT_MACSTYLE_BOLD	drivers/video/stb_truetype.h	/^#define STBTT_MACSTYLE_BOLD /;"	d
STBTT_MACSTYLE_DONTCARE	drivers/video/stb_truetype.h	/^#define STBTT_MACSTYLE_DONTCARE /;"	d
STBTT_MACSTYLE_ITALIC	drivers/video/stb_truetype.h	/^#define STBTT_MACSTYLE_ITALIC /;"	d
STBTT_MACSTYLE_NONE	drivers/video/stb_truetype.h	/^#define STBTT_MACSTYLE_NONE /;"	d
STBTT_MACSTYLE_UNDERSCORE	drivers/video/stb_truetype.h	/^#define STBTT_MACSTYLE_UNDERSCORE /;"	d
STBTT_MAC_EID_ARABIC	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_ROMAN        =0,   STBTT_MAC_EID_ARABIC       =4,$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_CHINESE_TRAD	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_CHINESE_TRAD =2,   STBTT_MAC_EID_GREEK        =6,$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_GREEK	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_CHINESE_TRAD =2,   STBTT_MAC_EID_GREEK        =6,$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_HEBREW	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_JAPANESE     =1,   STBTT_MAC_EID_HEBREW       =5,$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_JAPANESE	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_JAPANESE     =1,   STBTT_MAC_EID_HEBREW       =5,$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_KOREAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_KOREAN       =3,   STBTT_MAC_EID_RUSSIAN      =7$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_ROMAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_ROMAN        =0,   STBTT_MAC_EID_ARABIC       =4,$/;"	e	enum:__anonce392f790b03
STBTT_MAC_EID_RUSSIAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_EID_KOREAN       =3,   STBTT_MAC_EID_RUSSIAN      =7$/;"	e	enum:__anonce392f790b03
STBTT_MAC_LANG_ARABIC	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_ARABIC       =12,   STBTT_MAC_LANG_KOREAN       =23,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_CHINESE_SIMPLIFIED	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_HEBREW       =10,   STBTT_MAC_LANG_CHINESE_SIMPLIFIED =33,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_CHINESE_TRAD	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_ITALIAN      =3 ,   STBTT_MAC_LANG_CHINESE_TRAD =19$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_DUTCH	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_DUTCH        =4 ,   STBTT_MAC_LANG_RUSSIAN      =32,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_ENGLISH	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_ENGLISH      =0 ,   STBTT_MAC_LANG_JAPANESE     =11,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_FRENCH	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_FRENCH       =1 ,   STBTT_MAC_LANG_SPANISH      =6 ,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_GERMAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_GERMAN       =2 ,   STBTT_MAC_LANG_SWEDISH      =5 ,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_HEBREW	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_HEBREW       =10,   STBTT_MAC_LANG_CHINESE_SIMPLIFIED =33,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_ITALIAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_ITALIAN      =3 ,   STBTT_MAC_LANG_CHINESE_TRAD =19$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_JAPANESE	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_ENGLISH      =0 ,   STBTT_MAC_LANG_JAPANESE     =11,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_KOREAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_ARABIC       =12,   STBTT_MAC_LANG_KOREAN       =23,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_RUSSIAN	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_DUTCH        =4 ,   STBTT_MAC_LANG_RUSSIAN      =32,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_SPANISH	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_FRENCH       =1 ,   STBTT_MAC_LANG_SPANISH      =6 ,$/;"	e	enum:__anonce392f790d03
STBTT_MAC_LANG_SWEDISH	drivers/video/stb_truetype.h	/^   STBTT_MAC_LANG_GERMAN       =2 ,   STBTT_MAC_LANG_SWEDISH      =5 ,$/;"	e	enum:__anonce392f790d03
STBTT_MAX_OVERSAMPLE	drivers/video/stb_truetype.h	/^#define STBTT_MAX_OVERSAMPLE /;"	d
STBTT_MS_EID_SHIFTJIS	drivers/video/stb_truetype.h	/^   STBTT_MS_EID_SHIFTJIS      =2,$/;"	e	enum:__anonce392f790a03
STBTT_MS_EID_SYMBOL	drivers/video/stb_truetype.h	/^   STBTT_MS_EID_SYMBOL        =0,$/;"	e	enum:__anonce392f790a03
STBTT_MS_EID_UNICODE_BMP	drivers/video/stb_truetype.h	/^   STBTT_MS_EID_UNICODE_BMP   =1,$/;"	e	enum:__anonce392f790a03
STBTT_MS_EID_UNICODE_FULL	drivers/video/stb_truetype.h	/^   STBTT_MS_EID_UNICODE_FULL  =10$/;"	e	enum:__anonce392f790a03
STBTT_MS_LANG_CHINESE	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_CHINESE     =0x0804,   STBTT_MS_LANG_JAPANESE    =0x0411,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_DUTCH	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_DUTCH       =0x0413,   STBTT_MS_LANG_KOREAN      =0x0412,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_ENGLISH	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_ENGLISH     =0x0409,   STBTT_MS_LANG_ITALIAN     =0x0410,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_FRENCH	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_FRENCH      =0x040c,   STBTT_MS_LANG_RUSSIAN     =0x0419,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_GERMAN	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_GERMAN      =0x0407,   STBTT_MS_LANG_SPANISH     =0x0409,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_HEBREW	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_HEBREW      =0x040d,   STBTT_MS_LANG_SWEDISH     =0x041D$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_ITALIAN	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_ENGLISH     =0x0409,   STBTT_MS_LANG_ITALIAN     =0x0410,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_JAPANESE	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_CHINESE     =0x0804,   STBTT_MS_LANG_JAPANESE    =0x0411,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_KOREAN	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_DUTCH       =0x0413,   STBTT_MS_LANG_KOREAN      =0x0412,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_RUSSIAN	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_FRENCH      =0x040c,   STBTT_MS_LANG_RUSSIAN     =0x0419,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_SPANISH	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_GERMAN      =0x0407,   STBTT_MS_LANG_SPANISH     =0x0409,$/;"	e	enum:__anonce392f790c03
STBTT_MS_LANG_SWEDISH	drivers/video/stb_truetype.h	/^   STBTT_MS_LANG_HEBREW      =0x040d,   STBTT_MS_LANG_SWEDISH     =0x041D$/;"	e	enum:__anonce392f790c03
STBTT_PLATFORM_ID_ISO	drivers/video/stb_truetype.h	/^   STBTT_PLATFORM_ID_ISO       =2,$/;"	e	enum:__anonce392f790803
STBTT_PLATFORM_ID_MAC	drivers/video/stb_truetype.h	/^   STBTT_PLATFORM_ID_MAC       =1,$/;"	e	enum:__anonce392f790803
STBTT_PLATFORM_ID_MICROSOFT	drivers/video/stb_truetype.h	/^   STBTT_PLATFORM_ID_MICROSOFT =3$/;"	e	enum:__anonce392f790803
STBTT_PLATFORM_ID_UNICODE	drivers/video/stb_truetype.h	/^   STBTT_PLATFORM_ID_UNICODE   =0,$/;"	e	enum:__anonce392f790803
STBTT_POINT_SIZE	drivers/video/stb_truetype.h	/^#define STBTT_POINT_SIZE(/;"	d
STBTT_RASTERIZER_VERSION	drivers/video/stb_truetype.h	/^#define STBTT_RASTERIZER_VERSION /;"	d
STBTT_UNICODE_EID_ISO_10646	drivers/video/stb_truetype.h	/^   STBTT_UNICODE_EID_ISO_10646      =2,$/;"	e	enum:__anonce392f790903
STBTT_UNICODE_EID_UNICODE_1_0	drivers/video/stb_truetype.h	/^   STBTT_UNICODE_EID_UNICODE_1_0    =0,$/;"	e	enum:__anonce392f790903
STBTT_UNICODE_EID_UNICODE_1_1	drivers/video/stb_truetype.h	/^   STBTT_UNICODE_EID_UNICODE_1_1    =1,$/;"	e	enum:__anonce392f790903
STBTT_UNICODE_EID_UNICODE_2_0_BMP	drivers/video/stb_truetype.h	/^   STBTT_UNICODE_EID_UNICODE_2_0_BMP=3,$/;"	e	enum:__anonce392f790903
STBTT_UNICODE_EID_UNICODE_2_0_FULL	drivers/video/stb_truetype.h	/^   STBTT_UNICODE_EID_UNICODE_2_0_FULL=4$/;"	e	enum:__anonce392f790903
STBTT__COMPARE	drivers/video/stb_truetype.h	/^#define STBTT__COMPARE(/;"	d
STBTT__NOTUSED	drivers/video/stb_truetype.h	/^#define STBTT__NOTUSED(/;"	d
STBTT__OVER_MASK	drivers/video/stb_truetype.h	/^#define STBTT__OVER_MASK /;"	d
STBTT_assert	drivers/video/console_truetype.c	/^#define STBTT_assert(/;"	d	file:
STBTT_assert	drivers/video/stb_truetype.h	/^   #define STBTT_assert(/;"	d
STBTT_fabs	drivers/video/console_truetype.c	/^#define STBTT_fabs	/;"	d	file:
STBTT_fabs	drivers/video/stb_truetype.h	/^   #define STBTT_fabs(/;"	d
STBTT_free	drivers/video/console_truetype.c	/^#define STBTT_free(/;"	d	file:
STBTT_free	drivers/video/stb_truetype.h	/^   #define STBTT_free(/;"	d
STBTT_iceil	drivers/video/console_truetype.c	/^#define STBTT_iceil	/;"	d	file:
STBTT_iceil	drivers/video/stb_truetype.h	/^   #define STBTT_iceil(/;"	d
STBTT_ifloor	drivers/video/console_truetype.c	/^#define STBTT_ifloor	/;"	d	file:
STBTT_ifloor	drivers/video/stb_truetype.h	/^   #define STBTT_ifloor(/;"	d
STBTT_malloc	drivers/video/console_truetype.c	/^#define STBTT_malloc(/;"	d	file:
STBTT_malloc	drivers/video/stb_truetype.h	/^   #define STBTT_malloc(/;"	d
STBTT_memcpy	drivers/video/console_truetype.c	/^#define STBTT_memcpy	/;"	d	file:
STBTT_memcpy	drivers/video/stb_truetype.h	/^   #define STBTT_memcpy /;"	d
STBTT_memset	drivers/video/console_truetype.c	/^#define STBTT_memset	/;"	d	file:
STBTT_memset	drivers/video/stb_truetype.h	/^   #define STBTT_memset /;"	d
STBTT_sqrt	drivers/video/console_truetype.c	/^#define STBTT_sqrt	/;"	d	file:
STBTT_sqrt	drivers/video/stb_truetype.h	/^   #define STBTT_sqrt(/;"	d
STBTT_strlen	drivers/video/console_truetype.c	/^#define STBTT_strlen(/;"	d	file:
STBTT_strlen	drivers/video/stb_truetype.h	/^   #define STBTT_strlen(/;"	d
STBTT_vcurve	drivers/video/stb_truetype.h	/^      STBTT_vcurve$/;"	e	enum:__anonce392f790503
STBTT_vline	drivers/video/stb_truetype.h	/^      STBTT_vline,$/;"	e	enum:__anonce392f790503
STBTT_vmove	drivers/video/stb_truetype.h	/^      STBTT_vmove=1,$/;"	e	enum:__anonce392f790503
STB_GLOBAL	include/elf.h	/^#define STB_GLOBAL	/;"	d
STB_HIOS	include/elf.h	/^#define STB_HIOS	/;"	d
STB_HIPROC	include/elf.h	/^#define STB_HIPROC	/;"	d
STB_LOCAL	include/elf.h	/^#define STB_LOCAL	/;"	d
STB_LOOS	include/elf.h	/^#define STB_LOOS	/;"	d
STB_LOPROC	include/elf.h	/^#define STB_LOPROC	/;"	d
STB_NUM	include/elf.h	/^#define STB_NUM	/;"	d
STB_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STB_P	/;"	d
STB_TRUETYPE_IMPLEMENTATION	drivers/video/console_truetype.c	/^#define STB_TRUETYPE_IMPLEMENTATION$/;"	d	file:
STB_WEAK	include/elf.h	/^#define STB_WEAK	/;"	d
STCU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define STCU_BASE_ADDR	/;"	d
STD	include/sym53c8xx.h	/^	#define   STD /;"	d
STDC	include/u-boot/zlib.h	/^#    define STDC$/;"	d
STDC	include/u-boot/zlib.h	/^#  define STDC$/;"	d
STDC99	include/u-boot/zlib.h	/^#      define STDC99$/;"	d
STDIN_KBD_KBC	include/configs/tegra-common-post.h	/^#define STDIN_KBD_KBC /;"	d
STDIN_KBD_USB	include/configs/tegra-common-post.h	/^#define STDIN_KBD_USB /;"	d
STDOUT	tools/patman/cros_subprocess.py	/^STDOUT = subprocess.STDOUT$/;"	v
STDOUT_CROS_EC	include/configs/tegra-common-post.h	/^#define STDOUT_CROS_EC	/;"	d
STDOUT_LCD	include/configs/tegra-common-post.h	/^#define STDOUT_LCD /;"	d
STDOUT_VIDEO	include/configs/tegra-common-post.h	/^#define STDOUT_VIDEO /;"	d
STDVAL	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	STDVAL	/;"	d
STD_BUS_1	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                 STD_BUS_1 /;"	d
STD_FUSE_OPP_VMIN_CORE	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_CORE	/;"	d
STD_FUSE_OPP_VMIN_CORE_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_CORE_NOM	/;"	d
STD_FUSE_OPP_VMIN_DSPEVE	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_DSPEVE	/;"	d
STD_FUSE_OPP_VMIN_DSPEVE_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_DSPEVE_HIGH	/;"	d
STD_FUSE_OPP_VMIN_DSPEVE_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_DSPEVE_NOM	/;"	d
STD_FUSE_OPP_VMIN_DSPEVE_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_DSPEVE_OD	/;"	d
STD_FUSE_OPP_VMIN_GPU	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_GPU	/;"	d
STD_FUSE_OPP_VMIN_GPU_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_GPU_HIGH	/;"	d
STD_FUSE_OPP_VMIN_GPU_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_GPU_NOM	/;"	d
STD_FUSE_OPP_VMIN_GPU_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_GPU_OD	/;"	d
STD_FUSE_OPP_VMIN_IVA	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_IVA	/;"	d
STD_FUSE_OPP_VMIN_IVA_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_IVA_HIGH	/;"	d
STD_FUSE_OPP_VMIN_IVA_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_IVA_NOM	/;"	d
STD_FUSE_OPP_VMIN_IVA_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_IVA_OD	/;"	d
STD_FUSE_OPP_VMIN_MPU	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_MPU	/;"	d
STD_FUSE_OPP_VMIN_MPU_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_MPU_HIGH	/;"	d
STD_FUSE_OPP_VMIN_MPU_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_MPU_NOM	/;"	d
STD_FUSE_OPP_VMIN_MPU_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define STD_FUSE_OPP_VMIN_MPU_OD	/;"	d
STD_TSEC_INFO	include/tsec.h	/^#define STD_TSEC_INFO(/;"	d
STD_UEC_INFO	drivers/qe/uec.h	/^#define STD_UEC_INFO(/;"	d
STEER_ENET	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define STEER_ENET	/;"	d	file:
STEP_ALL	include/fsl_ddr.h	/^#define STEP_ALL /;"	d
STEP_ASSIGN_ADDRESSES	include/fsl_ddr.h	/^#define STEP_ASSIGN_ADDRESSES /;"	d
STEP_COMPUTE_COMMON_PARMS	include/fsl_ddr.h	/^#define STEP_COMPUTE_COMMON_PARMS /;"	d
STEP_COMPUTE_DIMM_PARMS	include/fsl_ddr.h	/^#define STEP_COMPUTE_DIMM_PARMS /;"	d
STEP_COMPUTE_REGS	include/fsl_ddr.h	/^#define STEP_COMPUTE_REGS /;"	d
STEP_GATHER_OPTS	include/fsl_ddr.h	/^#define STEP_GATHER_OPTS /;"	d
STEP_GET_SPD	include/fsl_ddr.h	/^#define STEP_GET_SPD /;"	d
STEP_PROGRAM_REGS	include/fsl_ddr.h	/^#define STEP_PROGRAM_REGS /;"	d
STEST0	include/sym53c8xx.h	/^#define STEST0	/;"	d
STEST1	include/sym53c8xx.h	/^#define STEST1	/;"	d
STEST2	include/sym53c8xx.h	/^#define STEST2	/;"	d
STEST3	include/sym53c8xx.h	/^#define STEST3	/;"	d
STEST4	include/sym53c8xx.h	/^#define STEST4	/;"	d
STFDI	arch/powerpc/lib/kgdb.c	/^#define STFDI(/;"	d	file:
STFDM	arch/powerpc/lib/kgdb.c	/^#define STFDM(/;"	d	file:
STFIFO	arch/sh/include/asm/cpu_sh7722.h	/^#define STFIFO /;"	d
STIME0	include/sym53c8xx.h	/^#define STIME0	/;"	d
STIME1	include/sym53c8xx.h	/^#define STIME1	/;"	d
STI_INNER	arch/blackfin/lib/ins.S	/^#  define STI_INNER /;"	d	file:
STI_INNER	arch/blackfin/lib/ins.S	/^# define STI_INNER /;"	d	file:
STI_OUTER	arch/blackfin/lib/ins.S	/^# define STI_OUTER /;"	d	file:
STI_OUTER	arch/blackfin/lib/ins.S	/^# define STI_OUTER$/;"	d	file:
STK_SIZE	examples/standalone/sched.c	/^#define STK_SIZE /;"	d	file:
STLMR	arch/sh/include/asm/cpu_sh7722.h	/^#define STLMR /;"	d
STM0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define STM0_BASE_ADDR	/;"	d
STM1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define STM1_BASE_ADDR	/;"	d
STM29F400BB	drivers/mtd/jedec_flash.c	/^#define STM29F400BB	/;"	d	file:
STM32	arch/arm/Kconfig	/^config STM32$/;"	c	choice:ARM architecture""choice031ab9020104
STM32F1	arch/arm/mach-stm32/Kconfig	/^config STM32F1$/;"	c
STM32F4	arch/arm/mach-stm32/Kconfig	/^config STM32F4$/;"	c
STM32F7	arch/arm/mach-stm32/Kconfig	/^config STM32F7$/;"	c
STM32_AHB1PERIPH_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_AHB1PERIPH_BASE	/;"	d
STM32_AHB1PERIPH_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_AHB1PERIPH_BASE	/;"	d
STM32_AHB2PERIPH_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_AHB2PERIPH_BASE	/;"	d
STM32_APB1PERIPH_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_APB1PERIPH_BASE	/;"	d
STM32_APB1PERIPH_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_APB1PERIPH_BASE	/;"	d
STM32_APB2PERIPH_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_APB2PERIPH_BASE	/;"	d
STM32_APB2PERIPH_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_APB2PERIPH_BASE	/;"	d
STM32_BUS_MASK	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_BUS_MASK	/;"	d
STM32_BUS_MASK	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_BUS_MASK	/;"	d
STM32_BUS_MASK	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_BUS_MASK /;"	d
STM32_DES	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_DES	/;"	d
STM32_DES_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_DES_BASE	/;"	d
STM32_FLASH	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH	/;"	d
STM32_FLASH	drivers/mtd/stm32_flash.c	/^#define STM32_FLASH	/;"	d	file:
STM32_FLASH_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH_BASE	/;"	d
STM32_FLASH_CR_LOCK	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH_CR_LOCK	/;"	d
STM32_FLASH_CR_LOCK	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_CR_LOCK	/;"	d
STM32_FLASH_CR_PER	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH_CR_PER	/;"	d
STM32_FLASH_CR_PG	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH_CR_PG	/;"	d
STM32_FLASH_CR_PG	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_CR_PG	/;"	d
STM32_FLASH_CR_SER	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_CR_SER	/;"	d
STM32_FLASH_CR_SNB_MASK	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_CR_SNB_MASK	/;"	d
STM32_FLASH_CR_SNB_OFFSET	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_CR_SNB_OFFSET	/;"	d
STM32_FLASH_CR_STRT	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH_CR_STRT	/;"	d
STM32_FLASH_CR_STRT	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_CR_STRT	/;"	d
STM32_FLASH_KEY1	arch/arm/mach-stm32/stm32f1/flash.c	/^#define STM32_FLASH_KEY1	/;"	d	file:
STM32_FLASH_KEY1	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_KEY1	/;"	d
STM32_FLASH_KEY2	arch/arm/mach-stm32/stm32f1/flash.c	/^#define STM32_FLASH_KEY2	/;"	d	file:
STM32_FLASH_KEY2	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_KEY2	/;"	d
STM32_FLASH_SR_BSY	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_FLASH_SR_BSY	/;"	d
STM32_FLASH_SR_BSY	drivers/mtd/stm32_flash.h	/^#define STM32_FLASH_SR_BSY	/;"	d
STM32_GPIOA_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOA_BASE	/;"	d
STM32_GPIOA_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOA_BASE	/;"	d
STM32_GPIOA_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOA_BASE	/;"	d
STM32_GPIOB_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOB_BASE	/;"	d
STM32_GPIOB_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOB_BASE	/;"	d
STM32_GPIOB_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOB_BASE	/;"	d
STM32_GPIOC_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOC_BASE	/;"	d
STM32_GPIOC_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOC_BASE	/;"	d
STM32_GPIOC_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOC_BASE	/;"	d
STM32_GPIOD_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOD_BASE	/;"	d
STM32_GPIOD_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOD_BASE	/;"	d
STM32_GPIOD_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOD_BASE	/;"	d
STM32_GPIOE_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOE_BASE	/;"	d
STM32_GPIOE_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOE_BASE	/;"	d
STM32_GPIOE_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOE_BASE	/;"	d
STM32_GPIOF_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOF_BASE	/;"	d
STM32_GPIOF_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOF_BASE	/;"	d
STM32_GPIOF_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOF_BASE	/;"	d
STM32_GPIOG_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_GPIOG_BASE	/;"	d
STM32_GPIOG_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOG_BASE	/;"	d
STM32_GPIOG_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOG_BASE	/;"	d
STM32_GPIOH_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOH_BASE	/;"	d
STM32_GPIOH_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOH_BASE	/;"	d
STM32_GPIOI_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_GPIOI_BASE	/;"	d
STM32_GPIOI_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOI_BASE	/;"	d
STM32_GPIOJ_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOJ_BASE	/;"	d
STM32_GPIOK_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_GPIOK_BASE	/;"	d
STM32_GPIO_AF0	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF0 = 0,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF0	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF0 = 0,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF0	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF0 = 0,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF1	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF1,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF1	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF1,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF1	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF1,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF10	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF10,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF10	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF10,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF10	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF10,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF11	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF11,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF11	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF11,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF11	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF11,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF12	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF12,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF12	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF12,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF12	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF12,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF13	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF13,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF13	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF13,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF13	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF13,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF14	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF14,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF14	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF14,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF14	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF14,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF15	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF15$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF15	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF15$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF15	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF15$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF2	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF2,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF2	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF2,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF2	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF2,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF3	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF3,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF3	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF3,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF3	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF3,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF4	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF4,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF4	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF4,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF4	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF4,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF5	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF5,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF5	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF5,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF5	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF5,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF6	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF6,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF6	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF6,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF6	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF6,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF7	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF7,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF7	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF7,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF7	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF7,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF8	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF8,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF8	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF8,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF8	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF8,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF9	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_AF9,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF9	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_AF9,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_AF9	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_AF9,$/;"	e	enum:stm32_gpio_af
STM32_GPIO_CR_CNF_MASK	drivers/gpio/stm32_gpio.c	/^#define STM32_GPIO_CR_CNF_MASK	/;"	d	file:
STM32_GPIO_CR_CNF_SHIFT	drivers/gpio/stm32_gpio.c	/^#define STM32_GPIO_CR_CNF_SHIFT(/;"	d	file:
STM32_GPIO_CR_MODE_MASK	drivers/gpio/stm32_gpio.c	/^#define STM32_GPIO_CR_MODE_MASK	/;"	d	file:
STM32_GPIO_CR_MODE_SHIFT	drivers/gpio/stm32_gpio.c	/^#define STM32_GPIO_CR_MODE_SHIFT(/;"	d	file:
STM32_GPIO_ICNF_AN	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_ICNF_AN = 0,$/;"	e	enum:stm32_gpio_icnf
STM32_GPIO_ICNF_IN_FLT	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_ICNF_IN_FLT,$/;"	e	enum:stm32_gpio_icnf
STM32_GPIO_ICNF_IN_PUD	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_ICNF_IN_PUD,$/;"	e	enum:stm32_gpio_icnf
STM32_GPIO_ICNF_RSVD	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_ICNF_RSVD$/;"	e	enum:stm32_gpio_icnf
STM32_GPIO_MODE_AF	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_MODE_AF,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_AF	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_MODE_AF,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_AN	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_MODE_AN$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_AN	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_MODE_AN$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_IN	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_MODE_IN = 0,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_IN	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_MODE_IN = 0,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_IN	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_MODE_IN = 0,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_OUT	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_MODE_OUT,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_OUT	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_MODE_OUT,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_OUT_10M	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_MODE_OUT_10M,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_OUT_2M	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_MODE_OUT_2M,$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_MODE_OUT_50M	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_MODE_OUT_50M$/;"	e	enum:stm32_gpio_mode
STM32_GPIO_OCNF_AF_OD	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_OCNF_AF_OD$/;"	e	enum:stm32_gpio_ocnf
STM32_GPIO_OCNF_AF_PP	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_OCNF_AF_PP,$/;"	e	enum:stm32_gpio_ocnf
STM32_GPIO_OCNF_GP_OD	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_OCNF_GP_OD,$/;"	e	enum:stm32_gpio_ocnf
STM32_GPIO_OCNF_GP_PP	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_OCNF_GP_PP = 0,$/;"	e	enum:stm32_gpio_ocnf
STM32_GPIO_OTYPE_OD	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_OTYPE_OD$/;"	e	enum:stm32_gpio_otype
STM32_GPIO_OTYPE_OD	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_OTYPE_OD$/;"	e	enum:stm32_gpio_otype
STM32_GPIO_OTYPE_PP	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_OTYPE_PP = 0,$/;"	e	enum:stm32_gpio_otype
STM32_GPIO_OTYPE_PP	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_OTYPE_PP = 0,$/;"	e	enum:stm32_gpio_otype
STM32_GPIO_PIN_0	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_0 = 0,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_0	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_0 = 0,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_0	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_0 = 0,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_1	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_1,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_1	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_1,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_1	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_1,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_10	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_10,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_10	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_10,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_10	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_10,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_11	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_11,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_11	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_11,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_11	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_11,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_12	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_12,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_12	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_12,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_12	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_12,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_13	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_13,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_13	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_13,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_13	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_13,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_14	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_14,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_14	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_14,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_14	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_14,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_15	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_15$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_15	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_15$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_15	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_15$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_2	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_2,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_2	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_2,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_2	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_2,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_3	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_3,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_3	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_3,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_3	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_3,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_4	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_4,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_4	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_4,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_4	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_4,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_5	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_5,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_5	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_5,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_5	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_5,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_6	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_6,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_6	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_6,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_6	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_6,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_7	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_7,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_7	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_7,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_7	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_7,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_8	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_8,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_8	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_8,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_8	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_8,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_9	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PIN_9,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_9	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PIN_9,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_9	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PIN_9,$/;"	e	enum:stm32_gpio_pin
STM32_GPIO_PIN_RX	arch/arm/include/asm/arch-stm32f4/gpio.h	/^#define STM32_GPIO_PIN_RX /;"	d
STM32_GPIO_PIN_TX	arch/arm/include/asm/arch-stm32f4/gpio.h	/^#define STM32_GPIO_PIN_TX /;"	d
STM32_GPIO_PORT_A	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_A = 0,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_A	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_A = 0,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_A	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_A = 0,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_B	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_B,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_B	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_B,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_B	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_B,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_C	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_C,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_C	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_C,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_C	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_C,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_D	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_D,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_D	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_D,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_D	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_D,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_E	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_E,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_E	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_E,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_E	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_E,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_F	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_F,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_F	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_F,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_F	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_F,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_G	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PORT_G,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_G	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_G,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_G	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_G,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_H	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_H,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_H	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_H,$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_I	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PORT_I$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_I	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PORT_I$/;"	e	enum:stm32_gpio_port
STM32_GPIO_PORT_X	arch/arm/include/asm/arch-stm32f4/gpio.h	/^#define STM32_GPIO_PORT_X /;"	d
STM32_GPIO_PUPD_DOWN	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PUPD_DOWN = 0,$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_DOWN	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PUPD_DOWN$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_DOWN	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PUPD_DOWN$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_NO	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PUPD_NO = 0,$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_NO	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PUPD_NO = 0,$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_UP	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	STM32_GPIO_PUPD_UP,$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_UP	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_PUPD_UP,$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_PUPD_UP	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_PUPD_UP,$/;"	e	enum:stm32_gpio_pupd
STM32_GPIO_SPEED_100M	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_SPEED_100M$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_100M	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_SPEED_100M$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_25M	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_SPEED_25M,$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_25M	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_SPEED_25M,$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_2M	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_SPEED_2M = 0,$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_2M	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_SPEED_2M = 0,$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_50M	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	STM32_GPIO_SPEED_50M,$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_SPEED_50M	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	STM32_GPIO_SPEED_50M,$/;"	e	enum:stm32_gpio_speed
STM32_GPIO_USART	arch/arm/include/asm/arch-stm32f4/gpio.h	/^#define STM32_GPIO_USART /;"	d
STM32_MAX_BANK	arch/arm/mach-stm32/stm32f1/flash.c	/^#define STM32_MAX_BANK	/;"	d	file:
STM32_NUM_BANKS	arch/arm/mach-stm32/stm32f1/flash.c	/^#define STM32_NUM_BANKS	/;"	d	file:
STM32_PERIPH_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_PERIPH_BASE	/;"	d
STM32_PERIPH_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_PERIPH_BASE	/;"	d
STM32_PWR	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_PWR	/;"	d
STM32_PWR	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_PWR	/;"	d
STM32_PWR	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_PWR	/;"	d
STM32_PWR_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_PWR_BASE	/;"	d
STM32_PWR_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_PWR_BASE	/;"	d
STM32_RCC	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_RCC	/;"	d
STM32_RCC	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_RCC	/;"	d
STM32_RCC	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define STM32_RCC	/;"	d
STM32_RCC_BASE	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define STM32_RCC_BASE	/;"	d
STM32_RCC_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_RCC_BASE	/;"	d
STM32_RCC_ENR_FMC	board/st/stm32f429-discovery/stm32f429-discovery.c	/^#define STM32_RCC_ENR_FMC	/;"	d	file:
STM32_SDRAM_FMC	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define STM32_SDRAM_FMC	/;"	d
STM32_SDRAM_FMC	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define STM32_SDRAM_FMC	/;"	d
STM32_SDRAM_FMC_BASE	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define STM32_SDRAM_FMC_BASE	/;"	d
STM32_SDRAM_FMC_BASE	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define STM32_SDRAM_FMC_BASE	/;"	d
STM32_SYSMEM_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_SYSMEM_BASE	/;"	d
STM32_TIM2_BASE	arch/arm/mach-stm32/stm32f1/timer.c	/^#define STM32_TIM2_BASE	/;"	d	file:
STM32_TIM2_BASE	arch/arm/mach-stm32/stm32f4/timer.c	/^#define STM32_TIM2_BASE	/;"	d	file:
STM32_USART1_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_USART1_BASE	/;"	d
STM32_USART2_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_USART2_BASE	/;"	d
STM32_USART3_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_USART3_BASE	/;"	d
STM32_USART6_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_USART6_BASE	/;"	d
STM32_U_ID	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_U_ID	/;"	d
STM32_U_ID_BASE	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define STM32_U_ID_BASE	/;"	d
STMDONE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	STMDONE	/;"	d
STM_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define STM_BASE_ADDR /;"	d
STM_CHANNELS_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define STM_CHANNELS_BASE_ADDR /;"	d
STM_I2C_ADDR	board/theadorable/theadorable.c	/^#define STM_I2C_ADDR	/;"	d	file:
STM_I2C_BUS	board/theadorable/theadorable.c	/^#define STM_I2C_BUS	/;"	d	file:
STM_ID_29W040B	include/flash.h	/^#define STM_ID_29W040B	/;"	d
STM_ID_29W320DB	include/flash.h	/^#define STM_ID_29W320DB /;"	d
STM_ID_29W320DT	include/flash.h	/^#define STM_ID_29W320DT /;"	d
STM_ID_29W320EB	include/flash.h	/^#define STM_ID_29W320EB /;"	d
STM_ID_29W320ET	include/flash.h	/^#define STM_ID_29W320ET /;"	d
STM_ID_F040B	include/flash.h	/^#define STM_ID_F040B	/;"	d
STM_ID_M29W040B	include/flash.h	/^#define STM_ID_M29W040B /;"	d
STM_ID_x800AB	include/flash.h	/^#define STM_ID_x800AB	/;"	d
STM_MANUFACT	include/flash.h	/^#define STM_MANUFACT	/;"	d
STM_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,$/;"	e	enum:__anona3077f190103	file:
STMx_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STMx_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STMx_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STMx_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STNOR_GPMC_CONFIG1	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG1	/;"	d
STNOR_GPMC_CONFIG1	arch/arm/include/asm/arch-omap3/mem.h	/^#define STNOR_GPMC_CONFIG1	/;"	d
STNOR_GPMC_CONFIG1	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG1	/;"	d
STNOR_GPMC_CONFIG1	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG1	/;"	d
STNOR_GPMC_CONFIG2	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG2	/;"	d
STNOR_GPMC_CONFIG2	arch/arm/include/asm/arch-omap3/mem.h	/^#define STNOR_GPMC_CONFIG2	/;"	d
STNOR_GPMC_CONFIG2	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG2	/;"	d
STNOR_GPMC_CONFIG2	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG2	/;"	d
STNOR_GPMC_CONFIG3	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG3	/;"	d
STNOR_GPMC_CONFIG3	arch/arm/include/asm/arch-omap3/mem.h	/^#define STNOR_GPMC_CONFIG3	/;"	d
STNOR_GPMC_CONFIG3	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG3	/;"	d
STNOR_GPMC_CONFIG3	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG3	/;"	d
STNOR_GPMC_CONFIG4	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG4	/;"	d
STNOR_GPMC_CONFIG4	arch/arm/include/asm/arch-omap3/mem.h	/^#define STNOR_GPMC_CONFIG4	/;"	d
STNOR_GPMC_CONFIG4	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG4	/;"	d
STNOR_GPMC_CONFIG4	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG4	/;"	d
STNOR_GPMC_CONFIG5	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG5	/;"	d
STNOR_GPMC_CONFIG5	arch/arm/include/asm/arch-omap3/mem.h	/^#define STNOR_GPMC_CONFIG5	/;"	d
STNOR_GPMC_CONFIG5	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG5	/;"	d
STNOR_GPMC_CONFIG5	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG5	/;"	d
STNOR_GPMC_CONFIG6	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG6	/;"	d
STNOR_GPMC_CONFIG6	arch/arm/include/asm/arch-omap3/mem.h	/^#define STNOR_GPMC_CONFIG6	/;"	d
STNOR_GPMC_CONFIG6	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG6	/;"	d
STNOR_GPMC_CONFIG6	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG6	/;"	d
STNOR_GPMC_CONFIG7	arch/arm/include/asm/arch-am33xx/mem.h	/^#define STNOR_GPMC_CONFIG7	/;"	d
STNOR_GPMC_CONFIG7	arch/arm/include/asm/arch-omap4/mem.h	/^#define STNOR_GPMC_CONFIG7	/;"	d
STNOR_GPMC_CONFIG7	arch/arm/include/asm/arch-omap5/mem.h	/^#define STNOR_GPMC_CONFIG7	/;"	d
STN_UNDEF	include/elf.h	/^#define STN_UNDEF	/;"	d
STO	include/sym53c8xx.h	/^  #define   STO /;"	d
STOP	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	STOP	/;"	d
STOPCK	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define STOPCK	/;"	d
STOPWATCH	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	STOPWATCH	/;"	d
STOP_DE4X5	drivers/net/dc2114x.c	/^#define STOP_DE4X5(/;"	d	file:
STOP_PG	drivers/net/ax88796.h	/^#define STOP_PG	/;"	d
STOP_PG	drivers/net/ne2000.h	/^#define STOP_PG	/;"	d
STOP_REG	arch/powerpc/cpu/mpc512x/start.S	/^#define STOP_REG(/;"	d	file:
STOP_REG	include/mpc5xxx.h	/^#define STOP_REG(/;"	d
STOP_SEC_ENABLE	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define STOP_SEC_ENABLE	/;"	d
STORED	lib/zlib/inflate.h	/^        STORED,     \/* i: waiting for stored size (length and complement) *\/$/;"	e	enum:__anon43d5a4c40103
STORED_BLOCK	lib/zlib/zutil.h	/^#define STORED_BLOCK /;"	d
STOREFORWARD	drivers/net/designware.h	/^#define STOREFORWARD	/;"	d
STP	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STP	/;"	d
STP	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define STP	/;"	d
STP	include/i8042.h	/^#define STP	/;"	d
STP0_IPCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPEN_MARK,	STP0_IPCLK_MARK,	STP0_IPSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD0_MARK,	STP0_IPD1_MARK,	STP0_IPD2_MARK,	STP0_IPD3_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD0_MARK,	STP0_IPD1_MARK,	STP0_IPD2_MARK,	STP0_IPD3_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD0_MARK,	STP0_IPD1_MARK,	STP0_IPD2_MARK,	STP0_IPD3_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD0_MARK,	STP0_IPD1_MARK,	STP0_IPD2_MARK,	STP0_IPD3_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD4_MARK,	STP0_IPD5_MARK,	STP0_IPD6_MARK,	STP0_IPD7_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD4_MARK,	STP0_IPD5_MARK,	STP0_IPD6_MARK,	STP0_IPD7_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD4_MARK,	STP0_IPD5_MARK,	STP0_IPD6_MARK,	STP0_IPD7_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPD7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPD4_MARK,	STP0_IPD5_MARK,	STP0_IPD6_MARK,	STP0_IPD7_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPEN_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPEN_MARK,	STP0_IPCLK_MARK,	STP0_IPSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
STP0_IPSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP0_IPEN_MARK,	STP0_IPCLK_MARK,	STP0_IPSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPCLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD5_MARK,	STP1_IPD6_MARK,	STP1_IPD7_MARK,	STP1_IPCLK_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD0_PORT186_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD0_PORT186_MARK, \/* MSEL5CR_23_0 *\/$/;"	e	enum:__anona304c1340103	file:
STP1_IPD0_PORT194_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD0_PORT194_MARK, \/* MSEL5CR_23_1 *\/$/;"	e	enum:__anona304c1340103	file:
STP1_IPD1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD1_MARK,	STP1_IPD2_MARK,	STP1_IPD3_MARK,	STP1_IPD4_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD1_MARK,	STP1_IPD2_MARK,	STP1_IPD3_MARK,	STP1_IPD4_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD1_MARK,	STP1_IPD2_MARK,	STP1_IPD3_MARK,	STP1_IPD4_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD1_MARK,	STP1_IPD2_MARK,	STP1_IPD3_MARK,	STP1_IPD4_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD5_MARK,	STP1_IPD6_MARK,	STP1_IPD7_MARK,	STP1_IPCLK_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD5_MARK,	STP1_IPD6_MARK,	STP1_IPD7_MARK,	STP1_IPCLK_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPD7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPD5_MARK,	STP1_IPD6_MARK,	STP1_IPD7_MARK,	STP1_IPCLK_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPEN_PORT187_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPEN_PORT187_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPEN_PORT193_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPEN_PORT193_MARK,$/;"	e	enum:__anona304c1340103	file:
STP1_IPSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	STP1_IPSYNC_MARK,$/;"	e	enum:__anona304c1340103	file:
STP_IDS_0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IDS_0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IEN_1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IEN_1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IOD_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IOD_1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISCLK_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISCLK_0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
STP_ISCLK_0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_ISCLK_1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISCLK_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISCLK_1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISCLK_1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISD_0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISD_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISD_0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_ISD_1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISD_1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISD_1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISD_1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISEN_0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISEN_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISEN_0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_ISEN_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISEN_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISEN_1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISEN_1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISSYNC_0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISSYNC_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISSYNC_0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_ISSYNC_1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_ISSYNC_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_ISSYNC_1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_ISSYNC_1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_IVCXO27_0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_IVCXO27_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_IVCXO27_0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
STP_IVCXO27_0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_IVCXO27_1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_1_B_MARK, HRX0_F_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_IVCXO27_1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_IVCXO27_1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_IVCXO27_1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_OPWM_0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_OPWM_0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_OPWM_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_OPWM_0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_OPWM_0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_OPWM_0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_OPWM_0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_OPWM_0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_OPWM_0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_OPWM_0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK,$/;"	e	enum:__anona3077f190103	file:
STP_OPWM_0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
STP_OPWM__C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	STP_OPWM__C_MARK,$/;"	e	enum:__anona307945e0103	file:
STP_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define STP_P	/;"	d
STR	arch/mips/include/asm/mipsregs.h	/^#define STR(/;"	d
STR1W_SHIFT	arch/arm/lib/memcpy.S	/^#define STR1W_SHIFT	/;"	d	file:
STRAP_OPT_A_RAM_CODE_MASK	arch/arm/include/asm/arch-tegra/warmboot.h	/^#define STRAP_OPT_A_RAM_CODE_MASK	/;"	d
STRAP_OPT_A_RAM_CODE_SHIFT	arch/arm/include/asm/arch-tegra/warmboot.h	/^#define STRAP_OPT_A_RAM_CODE_SHIFT	/;"	d
STRC_A	board/renesas/sh7763rdp/lowlevel_init.S	/^STRC_A:		.long	0xFE80001C$/;"	l
STRC_D	board/renesas/sh7763rdp/lowlevel_init.S	/^STRC_D:		.long	0x000f3980$/;"	l
STREAM_ID_FOR_TRB	drivers/usb/host/xhci.h	/^#define STREAM_ID_FOR_TRB(/;"	d
STREAM_ON_TIMEOUT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define STREAM_ON_TIMEOUT /;"	d
STRESS_ENABLE	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	STRESS_ENABLE = 1$/;"	e	enum:hws_stress_jump
STRESS_NONE	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	STRESS_NONE = 0,$/;"	e	enum:hws_stress_jump
STRIDE_COUNT	tools/mxsboot.c	/^#define	STRIDE_COUNT	/;"	d	file:
STRIDE_PAGES	tools/mxsboot.c	/^#define	STRIDE_PAGES	/;"	d	file:
STRING	scripts/kconfig/zconf.l	/^%x COMMAND HELP STRING PARAM$/;"	c
STRING	scripts/kconfig/zconf.lex.c	/^#define STRING /;"	d	file:
STRING	tools/buildman/kconfiglib.py	/^UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6)$/;"	v
STRINGID_COUNT	drivers/usb/emul/sandbox_flash.c	/^	STRINGID_COUNT,$/;"	e	enum:__anon4763d25b0203	file:
STRINGID_COUNT	drivers/usb/emul/sandbox_keyb.c	/^	STRINGID_COUNT,$/;"	e	enum:__anon3bed6c180203	file:
STRINGID_MANUFACTURER	drivers/usb/emul/sandbox_flash.c	/^	STRINGID_MANUFACTURER = 1,$/;"	e	enum:__anon4763d25b0203	file:
STRINGID_MANUFACTURER	drivers/usb/emul/sandbox_keyb.c	/^	STRINGID_MANUFACTURER = 1,$/;"	e	enum:__anon3bed6c180203	file:
STRINGID_PRODUCT	drivers/usb/emul/sandbox_flash.c	/^	STRINGID_PRODUCT,$/;"	e	enum:__anon4763d25b0203	file:
STRINGID_PRODUCT	drivers/usb/emul/sandbox_keyb.c	/^	STRINGID_PRODUCT,$/;"	e	enum:__anon3bed6c180203	file:
STRINGID_SERIAL	drivers/usb/emul/sandbox_flash.c	/^	STRINGID_SERIAL,$/;"	e	enum:__anon4763d25b0203	file:
STRINGID_SERIAL	drivers/usb/emul/sandbox_keyb.c	/^	STRINGID_SERIAL,$/;"	e	enum:__anon3bed6c180203	file:
STRING_CDC	drivers/usb/gadget/ether.c	/^#define STRING_CDC	/;"	d	file:
STRING_CONTROL	drivers/usb/gadget/ether.c	/^#define STRING_CONTROL	/;"	d	file:
STRING_DATA	drivers/usb/gadget/ether.c	/^#define STRING_DATA	/;"	d	file:
STRING_ETHADDR	drivers/usb/gadget/ether.c	/^#define STRING_ETHADDR	/;"	d	file:
STRING_LEX	tools/buildman/kconfiglib.py	/^STRING_LEX = frozenset((T_BOOL, T_TRISTATE, T_INT, T_HEX, T_STRING, T_CHOICE,$/;"	v
STRING_MANUFACTURER	drivers/usb/emul/sandbox_hub.c	/^	STRING_MANUFACTURER = 1,$/;"	e	enum:__anon4f365d4c0103	file:
STRING_MANUFACTURER	drivers/usb/gadget/ether.c	/^#define STRING_MANUFACTURER	/;"	d	file:
STRING_MANUFACTURER	drivers/usb/gadget/g_dnl.c	/^#define STRING_MANUFACTURER /;"	d	file:
STRING_MANUFACTURER_IDX	drivers/usb/gadget/f_thor.h	/^#define STRING_MANUFACTURER_IDX	/;"	d
STRING_PATH_SEPARATOR	lib/lzma/Types.h	/^#define STRING_PATH_SEPARATOR /;"	d
STRING_PRODUCT	drivers/usb/emul/sandbox_hub.c	/^	STRING_PRODUCT,$/;"	e	enum:__anon4f365d4c0103	file:
STRING_PRODUCT	drivers/usb/gadget/ether.c	/^#define STRING_PRODUCT	/;"	d	file:
STRING_PRODUCT	drivers/usb/gadget/g_dnl.c	/^#define STRING_PRODUCT /;"	d	file:
STRING_PRODUCT_IDX	drivers/usb/gadget/f_thor.h	/^#define STRING_PRODUCT_IDX	/;"	d
STRING_RNDIS	drivers/usb/gadget/ether.c	/^#define STRING_RNDIS	/;"	d	file:
STRING_RNDIS_CONTROL	drivers/usb/gadget/ether.c	/^#define STRING_RNDIS_CONTROL	/;"	d	file:
STRING_SERIAL	drivers/usb/emul/sandbox_hub.c	/^	STRING_SERIAL,$/;"	e	enum:__anon4f365d4c0103	file:
STRING_SERIAL	drivers/usb/gadget/g_dnl.c	/^#define STRING_SERIAL /;"	d	file:
STRING_SERIALNUMBER	drivers/usb/gadget/ether.c	/^#define STRING_SERIALNUMBER	/;"	d	file:
STRING_SERIAL_IDX	drivers/usb/gadget/f_thor.h	/^#define STRING_SERIAL_IDX	/;"	d
STRING_SUBSET	drivers/usb/gadget/ether.c	/^#define STRING_SUBSET	/;"	d	file:
STRING_USBDOWN	drivers/usb/gadget/g_dnl.c	/^#define STRING_USBDOWN /;"	d	file:
STRING_count	drivers/usb/emul/sandbox_hub.c	/^	STRING_count,$/;"	e	enum:__anon4f365d4c0103	file:
STRIP	Makefile	/^STRIP		= $(CROSS_COMPILE)strip$/;"	m
STRM_D	board/micronas/vct/scc.h	/^#define STRM_D	/;"	d
STRM_P	board/micronas/vct/scc.h	/^#define STRM_P	/;"	d
STRM_VALID	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define STRM_VALID	/;"	d
STRM_VALID	arch/arm/mach-exynos/include/mach/dp.h	/^#define STRM_VALID	/;"	d
STRUCT_PREFIX	tools/dtoc/dtoc	/^STRUCT_PREFIX = 'dtd_'$/;"	v
STRUCT_PREFIX	tools/dtoc/dtoc.py	/^STRUCT_PREFIX = 'dtd_'$/;"	v
STR_1	arch/sh/include/asm/cpu_sh7780.h	/^#define	STR_1	/;"	d
STR_2	arch/sh/include/asm/cpu_sh7780.h	/^#define	STR_2	/;"	d
STR_BLOCK	arch/arm/include/asm/omap_mmc.h	/^#define STR_BLOCK	/;"	d
STR_CONFIG	drivers/serial/usbtty.h	/^#define STR_CONFIG	/;"	d
STR_COUNT	drivers/serial/usbtty.h	/^#define STR_COUNT	/;"	d
STR_CTRL_INTERFACE	drivers/serial/usbtty.h	/^#define STR_CTRL_INTERFACE	/;"	d
STR_DATA_INTERFACE	drivers/serial/usbtty.h	/^#define STR_DATA_INTERFACE	/;"	d
STR_ENV_ETHADDR	board/logicpd/zoom1/zoom1.c	/^#define STR_ENV_ETHADDR	/;"	d	file:
STR_ENV_ETHADDR	board/renesas/blanche/blanche.c	/^#define STR_ENV_ETHADDR	/;"	d	file:
STR_ENV_ETHADDR	board/ti/evm/evm.c	/^#define STR_ENV_ETHADDR	/;"	d	file:
STR_LANG	drivers/serial/usbtty.h	/^#define STR_LANG	/;"	d
STR_L_A	board/espt/lowlevel_init.S	/^STR_L_A:	.long	0xFE80001C$/;"	l
STR_L_A	board/renesas/r7780mp/lowlevel_init.S	/^STR_L_A:		.long	STR_2$/;"	l
STR_L_A_D0	board/espt/lowlevel_init.S	/^STR_L_A_D0:	.long	0x00010040$/;"	l
STR_L_D	board/espt/lowlevel_init.S	/^STR_L_D:	.long	0x000F3980$/;"	l
STR_L_D	board/renesas/r7780mp/lowlevel_init.S	/^STR_L_D:		.long	0x000f0000$/;"	l
STR_MANUFACTURER	drivers/serial/usbtty.h	/^#define STR_MANUFACTURER	/;"	d
STR_PRODUCT	drivers/serial/usbtty.h	/^#define STR_PRODUCT	/;"	d
STR_SERIAL	drivers/serial/usbtty.h	/^#define STR_SERIAL	/;"	d
STR_STP_CLK_RESET	drivers/mmc/mxcmmc.c	/^#define STR_STP_CLK_RESET /;"	d	file:
STR_STP_CLK_START_CLK	drivers/mmc/mxcmmc.c	/^#define STR_STP_CLK_START_CLK /;"	d	file:
STR_STP_CLK_STOP_CLK	drivers/mmc/mxcmmc.c	/^#define STR_STP_CLK_STOP_CLK /;"	d	file:
STR_U_A	board/espt/lowlevel_init.S	/^STR_U_A:	.long	0xFE800018$/;"	l
STR_U_A	board/renesas/r7780mp/lowlevel_init.S	/^STR_U_A:		.long	STR_1$/;"	l
STS	arch/arm/include/asm/arch-tegra/usb.h	/^#define STS	/;"	d
STS1	arch/arm/include/asm/arch-tegra/usb.h	/^#define STS1	/;"	d
STS1_CMDSEQ	drivers/mmc/sh_mmcif.h	/^#define STS1_CMDSEQ	/;"	d
STS2_AC12BSYTO	drivers/mmc/sh_mmcif.h	/^#define STS2_AC12BSYTO	/;"	d
STS2_AC12CRCE	drivers/mmc/sh_mmcif.h	/^#define STS2_AC12CRCE	/;"	d
STS2_AC12IDXE	drivers/mmc/sh_mmcif.h	/^#define STS2_AC12IDXE	/;"	d
STS2_AC12REBE	drivers/mmc/sh_mmcif.h	/^#define STS2_AC12REBE	/;"	d
STS2_AC12RSPTO	drivers/mmc/sh_mmcif.h	/^#define STS2_AC12RSPTO	/;"	d
STS2_CCSTO	drivers/mmc/sh_mmcif.h	/^#define STS2_CCSTO	/;"	d
STS2_CRC16E	drivers/mmc/sh_mmcif.h	/^#define STS2_CRC16E	/;"	d
STS2_CRCSTE	drivers/mmc/sh_mmcif.h	/^#define STS2_CRCSTE	/;"	d
STS2_CRCSTEBE	drivers/mmc/sh_mmcif.h	/^#define STS2_CRCSTEBE	/;"	d
STS2_CRCSTTO	drivers/mmc/sh_mmcif.h	/^#define STS2_CRCSTTO	/;"	d
STS2_CRC_ERR	drivers/mmc/sh_mmcif.h	/^#define STS2_CRC_ERR	/;"	d
STS2_DATBSYTO	drivers/mmc/sh_mmcif.h	/^#define STS2_DATBSYTO	/;"	d
STS2_RDATEBE	drivers/mmc/sh_mmcif.h	/^#define STS2_RDATEBE	/;"	d
STS2_RDATTO	drivers/mmc/sh_mmcif.h	/^#define STS2_RDATTO	/;"	d
STS2_RSPBSYTO	drivers/mmc/sh_mmcif.h	/^#define STS2_RSPBSYTO	/;"	d
STS2_RSPCRC7E	drivers/mmc/sh_mmcif.h	/^#define STS2_RSPCRC7E	/;"	d
STS2_RSPEBE	drivers/mmc/sh_mmcif.h	/^#define STS2_RSPEBE	/;"	d
STS2_RSPIDXE	drivers/mmc/sh_mmcif.h	/^#define STS2_RSPIDXE	/;"	d
STS2_RSPTO	drivers/mmc/sh_mmcif.h	/^#define STS2_RSPTO	/;"	d
STS2_TIMEOUT_ERR	drivers/mmc/sh_mmcif.h	/^#define STS2_TIMEOUT_ERR	/;"	d
STS_1MS_TOGGLE	include/usb/ehci-ci.h	/^#define STS_1MS_TOGGLE	/;"	d
STS_ASS	drivers/usb/host/ehci.h	/^#define STS_ASS	/;"	d
STS_A_SESSION_VALID	include/usb/ehci-ci.h	/^#define STS_A_SESSION_VALID	/;"	d
STS_A_VBUS_VALID	include/usb/ehci-ci.h	/^#define STS_A_VBUS_VALID	/;"	d
STS_B_SESSION_END	include/usb/ehci-ci.h	/^#define STS_B_SESSION_END	/;"	d
STS_B_SESSION_VALID	include/usb/ehci-ci.h	/^#define STS_B_SESSION_VALID	/;"	d
STS_CNR	drivers/usb/host/xhci.h	/^#define STS_CNR	/;"	d
STS_DATA_PULSING	include/usb/ehci-ci.h	/^#define STS_DATA_PULSING	/;"	d
STS_EINT	drivers/usb/host/xhci.h	/^#define STS_EINT	/;"	d
STS_FATAL	drivers/usb/host/xhci.h	/^#define STS_FATAL	/;"	d
STS_HALT	drivers/usb/host/ehci.h	/^#define STS_HALT	/;"	d
STS_HALT	drivers/usb/host/xhci.h	/^#define STS_HALT	/;"	d
STS_HCE	drivers/usb/host/xhci.h	/^#define STS_HCE	/;"	d
STS_PCI	drivers/usb/gadget/ci_udc.h	/^#define STS_PCI	/;"	d
STS_PORT	drivers/usb/host/xhci.h	/^#define STS_PORT	/;"	d
STS_PSS	drivers/usb/host/ehci.h	/^#define	STS_PSS	/;"	d
STS_RESTORE	drivers/usb/host/xhci.h	/^#define STS_RESTORE	/;"	d
STS_RS	drivers/net/dc2114x.c	/^#define STS_RS	/;"	d	file:
STS_SAVE	drivers/usb/host/xhci.h	/^#define STS_SAVE	/;"	d
STS_SLI	drivers/usb/gadget/ci_udc.h	/^#define STS_SLI	/;"	d
STS_SRE	drivers/usb/host/xhci.h	/^#define STS_SRE	/;"	d
STS_TS	drivers/net/dc2114x.c	/^#define STS_TS	/;"	d	file:
STS_UEI	drivers/usb/gadget/ci_udc.h	/^#define STS_UEI	/;"	d
STS_UI	drivers/usb/gadget/ci_udc.h	/^#define STS_UI	/;"	d
STS_URI	drivers/usb/gadget/ci_udc.h	/^#define STS_URI	/;"	d
STS_USB_ID	include/usb/ehci-ci.h	/^#define STS_USB_ID	/;"	d
STT_FILE	include/elf.h	/^#define STT_FILE	/;"	d
STT_FUNC	include/elf.h	/^#define STT_FUNC	/;"	d
STT_HIOS	include/elf.h	/^#define STT_HIOS	/;"	d
STT_HIPROC	include/elf.h	/^#define STT_HIPROC	/;"	d
STT_LOOS	include/elf.h	/^#define STT_LOOS	/;"	d
STT_LOPROC	include/elf.h	/^#define STT_LOPROC	/;"	d
STT_NOTYPE	include/elf.h	/^#define STT_NOTYPE	/;"	d
STT_NUM	include/elf.h	/^#define STT_NUM	/;"	d
STT_OBJECT	include/elf.h	/^#define STT_OBJECT	/;"	d
STT_SECTION	include/elf.h	/^#define STT_SECTION	/;"	d
STT_TLS	include/elf.h	/^#define STT_TLS	/;"	d
STUART_BASE	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	STUART_BASE	/;"	d
STUART_INDEX	drivers/serial/serial_pxa.c	/^#define	STUART_INDEX	/;"	d	file:
STV_DEFAULT	include/elf.h	/^#define STV_DEFAULT	/;"	d
STV_HIDDEN	include/elf.h	/^#define STV_HIDDEN	/;"	d
STV_INTERNAL	include/elf.h	/^#define STV_INTERNAL	/;"	d
STV_PROTECTED	include/elf.h	/^#define STV_PROTECTED	/;"	d
STX	common/xyzModem.c	/^#define STX /;"	d	file:
ST_BUS_BUSY	drivers/i2c/mxc_i2c.c	/^#define ST_BUS_BUSY /;"	d	file:
ST_BUS_IDLE	drivers/i2c/mxc_i2c.c	/^#define ST_BUS_IDLE /;"	d	file:
ST_CORE_CLK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ST_CORE_CLK	/;"	d
ST_DPLL_CLK_MASK	arch/arm/include/asm/arch-am33xx/clock.h	/^#define ST_DPLL_CLK_MASK	/;"	d
ST_DPLL_CLK_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define ST_DPLL_CLK_MASK	/;"	d
ST_DPLL_CLK_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define ST_DPLL_CLK_MASK	/;"	d
ST_IIF	drivers/i2c/mxc_i2c.c	/^#define ST_IIF /;"	d	file:
ST_IVA2_CLK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ST_IVA2_CLK	/;"	d
ST_MPU_CLK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ST_MPU_CLK	/;"	d
ST_PERIPH_CLK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ST_PERIPH_CLK	/;"	d
ST_SMI_H	include/linux/mtd/st_smi.h	/^#define ST_SMI_H$/;"	d
ST_WDT2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define ST_WDT2	/;"	d
SUBLEVEL	Makefile	/^SUBLEVEL =$/;"	m
SUBPIC_BTN_HLI_COLCON	include/radeon.h	/^#define SUBPIC_BTN_HLI_COLCON	/;"	d
SUBPIC_BTN_HLI_Y_X_END	include/radeon.h	/^#define SUBPIC_BTN_HLI_Y_X_END	/;"	d
SUBPIC_BTN_HLI_Y_X_START	include/radeon.h	/^#define SUBPIC_BTN_HLI_Y_X_START	/;"	d
SUBPIC_BUF0_OFFSET	include/radeon.h	/^#define SUBPIC_BUF0_OFFSET	/;"	d
SUBPIC_BUF1_OFFSET	include/radeon.h	/^#define SUBPIC_BUF1_OFFSET	/;"	d
SUBPIC_CNTL	include/radeon.h	/^#define SUBPIC_CNTL	/;"	d
SUBPIC_DEFCOLCON	include/radeon.h	/^#define SUBPIC_DEFCOLCON	/;"	d
SUBPIC_H_ACCUM_INIT	include/radeon.h	/^#define SUBPIC_H_ACCUM_INIT	/;"	d
SUBPIC_H_INC	include/radeon.h	/^#define SUBPIC_H_INC	/;"	d
SUBPIC_LC0_OFFSET	include/radeon.h	/^#define SUBPIC_LC0_OFFSET	/;"	d
SUBPIC_LC1_OFFSET	include/radeon.h	/^#define SUBPIC_LC1_OFFSET	/;"	d
SUBPIC_PALETTE_DATA	include/radeon.h	/^#define SUBPIC_PALETTE_DATA	/;"	d
SUBPIC_PALETTE_INDEX	include/radeon.h	/^#define SUBPIC_PALETTE_INDEX	/;"	d
SUBPIC_PITCH	include/radeon.h	/^#define SUBPIC_PITCH	/;"	d
SUBPIC_V_ACCUM_INIT	include/radeon.h	/^#define SUBPIC_V_ACCUM_INIT	/;"	d
SUBPIC_V_INC	include/radeon.h	/^#define SUBPIC_V_INC	/;"	d
SUBPIC_Y_X_END	include/radeon.h	/^#define SUBPIC_Y_X_END	/;"	d
SUBPIC_Y_X_START	include/radeon.h	/^#define SUBPIC_Y_X_START	/;"	d
SUBSPLT_ODD	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define SUBSPLT_ODD /;"	d
SUBSTED_VAR_SYMBOL	common/cli_hush.c	/^#define SUBSTED_VAR_SYMBOL /;"	d	file:
SUB_CLASS	include/radeon.h	/^#define SUB_CLASS	/;"	d
SUB_VERSION	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define SUB_VERSION	/;"	d
SUCCESS	include/ext_common.h	/^#define SUCCESS	/;"	d
SUCCESSFUL	drivers/bios_emulator/bios.c	/^#define SUCCESSFUL /;"	d	file:
SUN4I_A10_PLL2_1X	arch/arm/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	arch/microblaze/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	arch/mips/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	arch/nios2/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	arch/sandbox/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	arch/x86/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	arch/xtensa/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_1X	include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_1X	/;"	d
SUN4I_A10_PLL2_2X	arch/arm/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	arch/microblaze/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	arch/mips/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	arch/nios2/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	arch/sandbox/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	arch/x86/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	arch/xtensa/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_2X	include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_2X	/;"	d
SUN4I_A10_PLL2_4X	arch/arm/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	arch/microblaze/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	arch/mips/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	arch/nios2/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	arch/sandbox/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	arch/x86/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	arch/xtensa/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_4X	include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_4X	/;"	d
SUN4I_A10_PLL2_8X	arch/arm/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	arch/microblaze/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	arch/mips/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	arch/nios2/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	arch/sandbox/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	arch/x86/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	arch/xtensa/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_A10_PLL2_8X	include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define SUN4I_A10_PLL2_8X	/;"	d
SUN4I_CTL_ENABLE	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_CTL_ENABLE /;"	d	file:
SUN4I_CTL_MASTER	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_CTL_MASTER /;"	d	file:
SUN4I_CTL_RF_RST	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_CTL_RF_RST /;"	d	file:
SUN4I_CTL_TF_RST	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_CTL_TF_RST /;"	d	file:
SUN4I_CTL_XCH	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_CTL_XCH /;"	d	file:
SUN4I_DMA_DEDICATED	arch/arm/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	arch/microblaze/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	arch/mips/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	arch/nios2/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	arch/sandbox/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	arch/x86/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	arch/xtensa/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_DEDICATED	include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_DEDICATED	/;"	d
SUN4I_DMA_NORMAL	arch/arm/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	arch/microblaze/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	arch/mips/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	arch/nios2/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	arch/sandbox/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	arch/x86/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	arch/xtensa/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_DMA_NORMAL	include/dt-bindings/dma/sun4i-a10.h	/^#define SUN4I_DMA_NORMAL	/;"	d
SUN4I_GPB_PWM	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPB_PWM	/;"	d
SUN4I_GPB_PWM	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPB_PWM	/;"	d
SUN4I_GPB_TWI0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPB_TWI0	/;"	d
SUN4I_GPB_TWI0	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPB_TWI0	/;"	d
SUN4I_GPB_TWI1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPB_TWI1	/;"	d
SUN4I_GPB_TWI1	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPB_TWI1	/;"	d
SUN4I_GPB_TWI2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPB_TWI2	/;"	d
SUN4I_GPB_TWI2	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPB_TWI2	/;"	d
SUN4I_GPB_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPB_UART0	/;"	d
SUN4I_GPB_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPB_UART0	/;"	d
SUN4I_GPG_SDC1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPG_SDC1	/;"	d
SUN4I_GPG_SDC1	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPG_SDC1	/;"	d
SUN4I_GPH_SDC1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN4I_GPH_SDC1	/;"	d
SUN4I_GPH_SDC1	arch/arm/include/asm/arch/gpio.h	/^#define SUN4I_GPH_SDC1	/;"	d
SUN4I_PINCTRL_10_MA	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_10_MA	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_10_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_20_MA	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_20_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_30_MA	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_30_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_40_MA	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_40_MA	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_NO_PULL	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_NO_PULL	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_DOWN	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_DOWN	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_PINCTRL_PULL_UP	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define SUN4I_PINCTRL_PULL_UP	/;"	d
SUN4I_SPI0_BC	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_BC /;"	d	file:
SUN4I_SPI0_CCTL	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_CCTL /;"	d	file:
SUN4I_SPI0_CTL	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_CTL /;"	d	file:
SUN4I_SPI0_FIFO_STA	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_FIFO_STA /;"	d	file:
SUN4I_SPI0_RX	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_RX /;"	d	file:
SUN4I_SPI0_TC	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_TC /;"	d	file:
SUN4I_SPI0_TX	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN4I_SPI0_TX /;"	d	file:
SUN4I_SRAM_SIZE	tools/mksunxiboot.c	/^#define SUN4I_SRAM_SIZE /;"	d	file:
SUN50I_GPB_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN50I_GPB_UART0	/;"	d
SUN50I_GPB_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN50I_GPB_UART0	/;"	d
SUN50I_GPC_SPI0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN50I_GPC_SPI0	/;"	d
SUN50I_GPC_SPI0	arch/arm/include/asm/arch/gpio.h	/^#define SUN50I_GPC_SPI0	/;"	d
SUN5I_GPB_TWI1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN5I_GPB_TWI1	/;"	d
SUN5I_GPB_TWI1	arch/arm/include/asm/arch/gpio.h	/^#define SUN5I_GPB_TWI1	/;"	d
SUN5I_GPB_TWI2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN5I_GPB_TWI2	/;"	d
SUN5I_GPB_TWI2	arch/arm/include/asm/arch/gpio.h	/^#define SUN5I_GPB_TWI2	/;"	d
SUN5I_GPB_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN5I_GPB_UART0	/;"	d
SUN5I_GPB_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN5I_GPB_UART0	/;"	d
SUN5I_GPE_SDC2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN5I_GPE_SDC2	/;"	d
SUN5I_GPE_SDC2	arch/arm/include/asm/arch/gpio.h	/^#define SUN5I_GPE_SDC2	/;"	d
SUN5I_GPG_SDC1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN5I_GPG_SDC1	/;"	d
SUN5I_GPG_SDC1	arch/arm/include/asm/arch/gpio.h	/^#define SUN5I_GPG_SDC1	/;"	d
SUN5I_GPG_UART1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN5I_GPG_UART1	/;"	d
SUN5I_GPG_UART1	arch/arm/include/asm/arch/gpio.h	/^#define SUN5I_GPG_UART1	/;"	d
SUN6I_BUS_SOFT_RST_REG0	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_BUS_SOFT_RST_REG0 /;"	d	file:
SUN6I_CTL_ENABLE	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_CTL_ENABLE /;"	d	file:
SUN6I_CTL_MASTER	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_CTL_MASTER /;"	d	file:
SUN6I_CTL_SRST	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_CTL_SRST /;"	d	file:
SUN6I_GPA_GMAC	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPA_GMAC	/;"	d
SUN6I_GPA_GMAC	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPA_GMAC	/;"	d
SUN6I_GPA_SDC2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPA_SDC2	/;"	d
SUN6I_GPA_SDC2	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPA_SDC2	/;"	d
SUN6I_GPA_SDC3	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPA_SDC3	/;"	d
SUN6I_GPA_SDC3	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPA_SDC3	/;"	d
SUN6I_GPC_SDC3	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPC_SDC3	/;"	d
SUN6I_GPC_SDC3	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPC_SDC3	/;"	d
SUN6I_GPG_SDC1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPG_SDC1	/;"	d
SUN6I_GPG_SDC1	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPG_SDC1	/;"	d
SUN6I_GPG_TWI3	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPG_TWI3	/;"	d
SUN6I_GPG_TWI3	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPG_TWI3	/;"	d
SUN6I_GPH_PWM	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPH_PWM	/;"	d
SUN6I_GPH_PWM	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPH_PWM	/;"	d
SUN6I_GPH_TWI0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPH_TWI0	/;"	d
SUN6I_GPH_TWI0	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPH_TWI0	/;"	d
SUN6I_GPH_TWI1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPH_TWI1	/;"	d
SUN6I_GPH_TWI1	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPH_TWI1	/;"	d
SUN6I_GPH_TWI2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPH_TWI2	/;"	d
SUN6I_GPH_TWI2	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPH_TWI2	/;"	d
SUN6I_GPH_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPH_UART0	/;"	d
SUN6I_GPH_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPH_UART0	/;"	d
SUN6I_GPL0_R_P2WI_SCK	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPL0_R_P2WI_SCK	/;"	d
SUN6I_GPL0_R_P2WI_SCK	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPL0_R_P2WI_SCK	/;"	d
SUN6I_GPL1_R_P2WI_SDA	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN6I_GPL1_R_P2WI_SDA	/;"	d
SUN6I_GPL1_R_P2WI_SDA	arch/arm/include/asm/arch/gpio.h	/^#define SUN6I_GPL1_R_P2WI_SDA	/;"	d
SUN6I_P2WI_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUN6I_P2WI_BASE	/;"	d
SUN6I_P2WI_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUN6I_P2WI_BASE	/;"	d
SUN6I_SPI0_BCC	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_BCC /;"	d	file:
SUN6I_SPI0_CCTL	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_CCTL /;"	d	file:
SUN6I_SPI0_FIFO_STA	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_FIFO_STA /;"	d	file:
SUN6I_SPI0_GCR	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_GCR /;"	d	file:
SUN6I_SPI0_MBC	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_MBC /;"	d	file:
SUN6I_SPI0_MTC	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_MTC /;"	d	file:
SUN6I_SPI0_RXD	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_RXD /;"	d	file:
SUN6I_SPI0_TCR	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_TCR /;"	d	file:
SUN6I_SPI0_TXD	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_SPI0_TXD /;"	d	file:
SUN6I_TCR_XCH	drivers/mtd/spi/sunxi_spi_spl.c	/^#define SUN6I_TCR_XCH /;"	d	file:
SUN6I_TZPC_DECPORT0_RTC	arch/arm/include/asm/arch-sunxi/tzpc.h	/^#define SUN6I_TZPC_DECPORT0_RTC	/;"	d
SUN6I_TZPC_DECPORT0_RTC	arch/arm/include/asm/arch/tzpc.h	/^#define SUN6I_TZPC_DECPORT0_RTC	/;"	d
SUN7I_GPA_GMAC	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN7I_GPA_GMAC	/;"	d
SUN7I_GPA_GMAC	arch/arm/include/asm/arch/gpio.h	/^#define SUN7I_GPA_GMAC	/;"	d
SUN7I_GPI_TWI3	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN7I_GPI_TWI3	/;"	d
SUN7I_GPI_TWI3	arch/arm/include/asm/arch/gpio.h	/^#define SUN7I_GPI_TWI3	/;"	d
SUN7I_GPI_TWI4	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN7I_GPI_TWI4	/;"	d
SUN7I_GPI_TWI4	arch/arm/include/asm/arch/gpio.h	/^#define SUN7I_GPI_TWI4	/;"	d
SUN8I_A23_GPL_R_TWI	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_A23_GPL_R_TWI	/;"	d
SUN8I_A23_GPL_R_TWI	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_A23_GPL_R_TWI	/;"	d
SUN8I_A33_GPB_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_A33_GPB_UART0	/;"	d
SUN8I_A33_GPB_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_A33_GPB_UART0	/;"	d
SUN8I_A83T_GPB_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_A83T_GPB_UART0	/;"	d
SUN8I_A83T_GPB_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_A83T_GPB_UART0	/;"	d
SUN8I_EMAC	drivers/net/Kconfig	/^config SUN8I_EMAC$/;"	c
SUN8I_GPB_UART2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPB_UART2	/;"	d
SUN8I_GPB_UART2	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPB_UART2	/;"	d
SUN8I_GPD8_GMAC	drivers/net/sun8i_emac.c	/^#define SUN8I_GPD8_GMAC	/;"	d	file:
SUN8I_GPD_SDC1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPD_SDC1	/;"	d
SUN8I_GPD_SDC1	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPD_SDC1	/;"	d
SUN8I_GPE_TWI2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPE_TWI2	/;"	d
SUN8I_GPE_TWI2	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPE_TWI2	/;"	d
SUN8I_GPF_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPF_UART0	/;"	d
SUN8I_GPF_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPF_UART0	/;"	d
SUN8I_GPG_SDC1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPG_SDC1	/;"	d
SUN8I_GPG_SDC1	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPG_SDC1	/;"	d
SUN8I_GPH_PWM	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPH_PWM	/;"	d
SUN8I_GPH_PWM	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPH_PWM	/;"	d
SUN8I_GPH_TWI0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPH_TWI0	/;"	d
SUN8I_GPH_TWI0	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPH_TWI0	/;"	d
SUN8I_GPH_TWI1	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPH_TWI1	/;"	d
SUN8I_GPH_TWI1	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPH_TWI1	/;"	d
SUN8I_GPL_R_RSB	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPL_R_RSB	/;"	d
SUN8I_GPL_R_RSB	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPL_R_RSB	/;"	d
SUN8I_GPL_R_UART	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_GPL_R_UART	/;"	d
SUN8I_GPL_R_UART	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_GPL_R_UART	/;"	d
SUN8I_H3_GPA_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_H3_GPA_UART0	/;"	d
SUN8I_H3_GPA_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_H3_GPA_UART0	/;"	d
SUN8I_H3_GPL_R_TWI	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN8I_H3_GPL_R_TWI	/;"	d
SUN8I_H3_GPL_R_TWI	arch/arm/include/asm/arch/gpio.h	/^#define SUN8I_H3_GPL_R_TWI	/;"	d
SUN8I_H3_TZPC_DECPORT0_ALL	arch/arm/include/asm/arch-sunxi/tzpc.h	/^#define SUN8I_H3_TZPC_DECPORT0_ALL /;"	d
SUN8I_H3_TZPC_DECPORT0_ALL	arch/arm/include/asm/arch/tzpc.h	/^#define SUN8I_H3_TZPC_DECPORT0_ALL /;"	d
SUN8I_H3_TZPC_DECPORT1_ALL	arch/arm/include/asm/arch-sunxi/tzpc.h	/^#define SUN8I_H3_TZPC_DECPORT1_ALL /;"	d
SUN8I_H3_TZPC_DECPORT1_ALL	arch/arm/include/asm/arch/tzpc.h	/^#define SUN8I_H3_TZPC_DECPORT1_ALL /;"	d
SUN8I_H3_TZPC_DECPORT2_ALL	arch/arm/include/asm/arch-sunxi/tzpc.h	/^#define SUN8I_H3_TZPC_DECPORT2_ALL /;"	d
SUN8I_H3_TZPC_DECPORT2_ALL	arch/arm/include/asm/arch/tzpc.h	/^#define SUN8I_H3_TZPC_DECPORT2_ALL /;"	d
SUN8I_HMDI_DDC_ADDR_SEG_ADDR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUN8I_HMDI_DDC_ADDR_SEG_ADDR	/;"	d
SUN8I_HMDI_DDC_ADDR_SEG_ADDR	arch/arm/include/asm/arch/display2.h	/^#define SUN8I_HMDI_DDC_ADDR_SEG_ADDR	/;"	d
SUN8I_HMDI_DDC_ADDR_SLAVE_ADDR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUN8I_HMDI_DDC_ADDR_SLAVE_ADDR	/;"	d
SUN8I_HMDI_DDC_ADDR_SLAVE_ADDR	arch/arm/include/asm/arch/display2.h	/^#define SUN8I_HMDI_DDC_ADDR_SLAVE_ADDR	/;"	d
SUN8I_HMDI_DDC_CTRL_RESET	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUN8I_HMDI_DDC_CTRL_RESET	/;"	d
SUN8I_HMDI_DDC_CTRL_RESET	arch/arm/include/asm/arch/display2.h	/^#define SUN8I_HMDI_DDC_CTRL_RESET	/;"	d
SUN9I_GPH_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN9I_GPH_UART0	/;"	d
SUN9I_GPH_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUN9I_GPH_UART0	/;"	d
SUN9I_GPN_R_RSB	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUN9I_GPN_R_RSB	/;"	d
SUN9I_GPN_R_RSB	arch/arm/include/asm/arch/gpio.h	/^#define SUN9I_GPN_R_RSB	/;"	d
SUNRPC_PORT	net/nfs.h	/^#define SUNRPC_PORT /;"	d
SUNXI_AC97_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_AC97_BASE	/;"	d
SUNXI_AC97_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_AC97_BASE	/;"	d
SUNXI_ACE_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_ACE_BASE	/;"	d
SUNXI_ACE_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_ACE_BASE	/;"	d
SUNXI_AD_DA_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_AD_DA_BASE	/;"	d
SUNXI_AD_DA_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_AD_DA_BASE	/;"	d
SUNXI_ARMA9_CPUIF_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_ARMA9_CPUIF_BASE	/;"	d
SUNXI_ARMA9_CPUIF_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_ARMA9_CPUIF_BASE	/;"	d
SUNXI_ARMA9_GIC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_ARMA9_GIC_BASE	/;"	d
SUNXI_ARMA9_GIC_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_ARMA9_GIC_BASE	/;"	d
SUNXI_AVG_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_AVG_BASE	/;"	d
SUNXI_AVG_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_AVG_BASE	/;"	d
SUNXI_BOOTED_FROM_MMC0	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SUNXI_BOOTED_FROM_MMC0	/;"	d
SUNXI_BOOTED_FROM_MMC0	arch/arm/include/asm/arch/spl.h	/^#define SUNXI_BOOTED_FROM_MMC0	/;"	d
SUNXI_BOOTED_FROM_MMC2	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SUNXI_BOOTED_FROM_MMC2	/;"	d
SUNXI_BOOTED_FROM_MMC2	arch/arm/include/asm/arch/spl.h	/^#define SUNXI_BOOTED_FROM_MMC2	/;"	d
SUNXI_BOOTED_FROM_NAND	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SUNXI_BOOTED_FROM_NAND	/;"	d
SUNXI_BOOTED_FROM_NAND	arch/arm/include/asm/arch/spl.h	/^#define SUNXI_BOOTED_FROM_NAND	/;"	d
SUNXI_BOOTED_FROM_SPI	arch/arm/include/asm/arch-sunxi/spl.h	/^#define SUNXI_BOOTED_FROM_SPI	/;"	d
SUNXI_BOOTED_FROM_SPI	arch/arm/include/asm/arch/spl.h	/^#define SUNXI_BOOTED_FROM_SPI	/;"	d
SUNXI_BROM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_BROM_BASE	/;"	d
SUNXI_BROM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_BROM_BASE	/;"	d
SUNXI_BROM_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_BROM_BASE	/;"	d
SUNXI_BROM_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_BROM_BASE	/;"	d
SUNXI_CAN_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CAN_BASE	/;"	d
SUNXI_CAN_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CAN_BASE	/;"	d
SUNXI_CCMMODULE_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_CCMMODULE_BASE	/;"	d
SUNXI_CCMMODULE_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_CCMMODULE_BASE	/;"	d
SUNXI_CCM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CCM_BASE	/;"	d
SUNXI_CCM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_CCM_BASE	/;"	d
SUNXI_CCM_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CCM_BASE	/;"	d
SUNXI_CCM_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_CCM_BASE	/;"	d
SUNXI_CPUCFG_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CPUCFG_BASE	/;"	d
SUNXI_CPUCFG_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CPUCFG_BASE	/;"	d
SUNXI_CPU_CFG	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CPU_CFG	/;"	d
SUNXI_CPU_CFG	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_CPU_CFG	/;"	d
SUNXI_CPU_CFG	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CPU_CFG	/;"	d
SUNXI_CPU_CFG	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_CPU_CFG	/;"	d
SUNXI_CSDM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CSDM_BASE	/;"	d
SUNXI_CSDM_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CSDM_BASE	/;"	d
SUNXI_CSI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CSI0_BASE	/;"	d
SUNXI_CSI0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CSI0_BASE	/;"	d
SUNXI_CSI1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_CSI1_BASE	/;"	d
SUNXI_CSI1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_CSI1_BASE	/;"	d
SUNXI_DDRII_DDRIII_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DDRII_DDRIII_BASE	/;"	d
SUNXI_DDRII_DDRIII_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DDRII_DDRIII_BASE	/;"	d
SUNXI_DE2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DE2_BASE	/;"	d
SUNXI_DE2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DE2_BASE	/;"	d
SUNXI_DE2_FORMAT_ARGB_8888	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_FORMAT_ARGB_8888 /;"	d
SUNXI_DE2_FORMAT_ARGB_8888	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_FORMAT_ARGB_8888 /;"	d
SUNXI_DE2_FORMAT_BGRA_8888	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_FORMAT_BGRA_8888 /;"	d
SUNXI_DE2_FORMAT_BGRA_8888	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_FORMAT_BGRA_8888 /;"	d
SUNXI_DE2_FORMAT_BGR_888	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_FORMAT_BGR_888 /;"	d
SUNXI_DE2_FORMAT_BGR_888	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_FORMAT_BGR_888 /;"	d
SUNXI_DE2_FORMAT_RGB_888	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_FORMAT_RGB_888 /;"	d
SUNXI_DE2_FORMAT_RGB_888	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_FORMAT_RGB_888 /;"	d
SUNXI_DE2_FORMAT_XRGB_8888	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_FORMAT_XRGB_8888 /;"	d
SUNXI_DE2_FORMAT_XRGB_8888	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_FORMAT_XRGB_8888 /;"	d
SUNXI_DE2_MUX0_BASE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX0_BASE /;"	d
SUNXI_DE2_MUX0_BASE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX0_BASE /;"	d
SUNXI_DE2_MUX_ASE_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_ASE_REGS	/;"	d
SUNXI_DE2_MUX_ASE_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_ASE_REGS	/;"	d
SUNXI_DE2_MUX_BLD_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_BLD_REGS	/;"	d
SUNXI_DE2_MUX_BLD_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_BLD_REGS	/;"	d
SUNXI_DE2_MUX_BWS_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_BWS_REGS	/;"	d
SUNXI_DE2_MUX_BWS_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_BWS_REGS	/;"	d
SUNXI_DE2_MUX_CHAN_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_CHAN_REGS	/;"	d
SUNXI_DE2_MUX_CHAN_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_CHAN_REGS	/;"	d
SUNXI_DE2_MUX_CHAN_SZ	arch/arm/include/asm/arch-sunxi/display2.h	/^#define	SUNXI_DE2_MUX_CHAN_SZ	/;"	d
SUNXI_DE2_MUX_CHAN_SZ	arch/arm/include/asm/arch/display2.h	/^#define	SUNXI_DE2_MUX_CHAN_SZ	/;"	d
SUNXI_DE2_MUX_DCSC_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_DCSC_REGS	/;"	d
SUNXI_DE2_MUX_DCSC_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_DCSC_REGS	/;"	d
SUNXI_DE2_MUX_FCC_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_FCC_REGS	/;"	d
SUNXI_DE2_MUX_FCC_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_FCC_REGS	/;"	d
SUNXI_DE2_MUX_FCE_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_FCE_REGS	/;"	d
SUNXI_DE2_MUX_FCE_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_FCE_REGS	/;"	d
SUNXI_DE2_MUX_GLB_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_GLB_REGS	/;"	d
SUNXI_DE2_MUX_GLB_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_GLB_REGS	/;"	d
SUNXI_DE2_MUX_GSU1_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_GSU1_REGS	/;"	d
SUNXI_DE2_MUX_GSU1_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_GSU1_REGS	/;"	d
SUNXI_DE2_MUX_GSU2_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_GSU2_REGS	/;"	d
SUNXI_DE2_MUX_GSU2_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_GSU2_REGS	/;"	d
SUNXI_DE2_MUX_GSU3_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_GSU3_REGS	/;"	d
SUNXI_DE2_MUX_GSU3_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_GSU3_REGS	/;"	d
SUNXI_DE2_MUX_LTI_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_LTI_REGS	/;"	d
SUNXI_DE2_MUX_LTI_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_LTI_REGS	/;"	d
SUNXI_DE2_MUX_PEAK_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_PEAK_REGS	/;"	d
SUNXI_DE2_MUX_PEAK_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_PEAK_REGS	/;"	d
SUNXI_DE2_MUX_VSU_REGS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_DE2_MUX_VSU_REGS	/;"	d
SUNXI_DE2_MUX_VSU_REGS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_DE2_MUX_VSU_REGS	/;"	d
SUNXI_DE_BE0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DE_BE0_BASE	/;"	d
SUNXI_DE_BE0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_BE0_BASE	/;"	d
SUNXI_DE_BE0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DE_BE0_BASE	/;"	d
SUNXI_DE_BE0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_BE0_BASE	/;"	d
SUNXI_DE_BE1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DE_BE1_BASE	/;"	d
SUNXI_DE_BE1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_BE1_BASE	/;"	d
SUNXI_DE_BE1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DE_BE1_BASE	/;"	d
SUNXI_DE_BE1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_BE1_BASE	/;"	d
SUNXI_DE_BE2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_BE2_BASE	/;"	d
SUNXI_DE_BE2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_BE2_BASE	/;"	d
SUNXI_DE_BE_HEIGHT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_HEIGHT(/;"	d
SUNXI_DE_BE_HEIGHT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_HEIGHT(/;"	d
SUNXI_DE_BE_LAYER_ATTR0_SRC_FE0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_LAYER_ATTR0_SRC_FE0	/;"	d
SUNXI_DE_BE_LAYER_ATTR0_SRC_FE0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_LAYER_ATTR0_SRC_FE0	/;"	d
SUNXI_DE_BE_LAYER_ATTR1_FMT_XRGB8888	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_LAYER_ATTR1_FMT_XRGB8888	/;"	d
SUNXI_DE_BE_LAYER_ATTR1_FMT_XRGB8888	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_LAYER_ATTR1_FMT_XRGB8888	/;"	d
SUNXI_DE_BE_LAYER_STRIDE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_LAYER_STRIDE(/;"	d
SUNXI_DE_BE_LAYER_STRIDE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_LAYER_STRIDE(/;"	d
SUNXI_DE_BE_MODE_DEFLICKER_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_MODE_DEFLICKER_ENABLE	/;"	d
SUNXI_DE_BE_MODE_DEFLICKER_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_MODE_DEFLICKER_ENABLE	/;"	d
SUNXI_DE_BE_MODE_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_MODE_ENABLE	/;"	d
SUNXI_DE_BE_MODE_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_MODE_ENABLE	/;"	d
SUNXI_DE_BE_MODE_INTERLACE_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_MODE_INTERLACE_ENABLE	/;"	d
SUNXI_DE_BE_MODE_INTERLACE_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_MODE_INTERLACE_ENABLE	/;"	d
SUNXI_DE_BE_MODE_LAYER0_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_MODE_LAYER0_ENABLE	/;"	d
SUNXI_DE_BE_MODE_LAYER0_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_MODE_LAYER0_ENABLE	/;"	d
SUNXI_DE_BE_MODE_START	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_MODE_START	/;"	d
SUNXI_DE_BE_MODE_START	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_MODE_START	/;"	d
SUNXI_DE_BE_OUTPUT_COLOR_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_OUTPUT_COLOR_CTRL_ENABLE	/;"	d
SUNXI_DE_BE_OUTPUT_COLOR_CTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_OUTPUT_COLOR_CTRL_ENABLE	/;"	d
SUNXI_DE_BE_REG_CTRL_LOAD_REGS	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_REG_CTRL_LOAD_REGS	/;"	d
SUNXI_DE_BE_REG_CTRL_LOAD_REGS	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_REG_CTRL_LOAD_REGS	/;"	d
SUNXI_DE_BE_WIDTH	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_BE_WIDTH(/;"	d
SUNXI_DE_BE_WIDTH	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_BE_WIDTH(/;"	d
SUNXI_DE_DEU0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_DEU0_BASE	/;"	d
SUNXI_DE_DEU0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_DEU0_BASE	/;"	d
SUNXI_DE_DEU1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_DEU1_BASE	/;"	d
SUNXI_DE_DEU1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_DEU1_BASE	/;"	d
SUNXI_DE_DRC0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_DRC0_BASE	/;"	d
SUNXI_DE_DRC0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_DRC0_BASE	/;"	d
SUNXI_DE_DRC1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_DRC1_BASE	/;"	d
SUNXI_DE_DRC1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_DRC1_BASE	/;"	d
SUNXI_DE_FE0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DE_FE0_BASE	/;"	d
SUNXI_DE_FE0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_FE0_BASE	/;"	d
SUNXI_DE_FE0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DE_FE0_BASE	/;"	d
SUNXI_DE_FE0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_FE0_BASE	/;"	d
SUNXI_DE_FE1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DE_FE1_BASE	/;"	d
SUNXI_DE_FE1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_FE1_BASE	/;"	d
SUNXI_DE_FE1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DE_FE1_BASE	/;"	d
SUNXI_DE_FE1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_FE1_BASE	/;"	d
SUNXI_DE_FE2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_FE2_BASE	/;"	d
SUNXI_DE_FE2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_FE2_BASE	/;"	d
SUNXI_DE_FE_BYPASS_CSC_BYPASS	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_BYPASS_CSC_BYPASS	/;"	d
SUNXI_DE_FE_BYPASS_CSC_BYPASS	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_BYPASS_CSC_BYPASS	/;"	d
SUNXI_DE_FE_ENABLE_EN	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_ENABLE_EN	/;"	d
SUNXI_DE_FE_ENABLE_EN	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_ENABLE_EN	/;"	d
SUNXI_DE_FE_FACTOR_INT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_FACTOR_INT(/;"	d
SUNXI_DE_FE_FACTOR_INT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_FACTOR_INT(/;"	d
SUNXI_DE_FE_FRAME_CTRL_COEF_RDY	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_FRAME_CTRL_COEF_RDY	/;"	d
SUNXI_DE_FE_FRAME_CTRL_COEF_RDY	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_FRAME_CTRL_COEF_RDY	/;"	d
SUNXI_DE_FE_FRAME_CTRL_FRM_START	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_FRAME_CTRL_FRM_START	/;"	d
SUNXI_DE_FE_FRAME_CTRL_FRM_START	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_FRAME_CTRL_FRM_START	/;"	d
SUNXI_DE_FE_FRAME_CTRL_REG_RDY	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_FRAME_CTRL_REG_RDY	/;"	d
SUNXI_DE_FE_FRAME_CTRL_REG_RDY	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_FRAME_CTRL_REG_RDY	/;"	d
SUNXI_DE_FE_HEIGHT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_HEIGHT(/;"	d
SUNXI_DE_FE_HEIGHT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_HEIGHT(/;"	d
SUNXI_DE_FE_INPUT_FMT_ARGB8888	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_INPUT_FMT_ARGB8888	/;"	d
SUNXI_DE_FE_INPUT_FMT_ARGB8888	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_INPUT_FMT_ARGB8888	/;"	d
SUNXI_DE_FE_OUTPUT_FMT_ARGB8888	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_OUTPUT_FMT_ARGB8888	/;"	d
SUNXI_DE_FE_OUTPUT_FMT_ARGB8888	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_OUTPUT_FMT_ARGB8888	/;"	d
SUNXI_DE_FE_WIDTH	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_DE_FE_WIDTH(/;"	d
SUNXI_DE_FE_WIDTH	arch/arm/include/asm/arch/display.h	/^#define SUNXI_DE_FE_WIDTH(/;"	d
SUNXI_DE_SYS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DE_SYS_BASE	/;"	d
SUNXI_DE_SYS_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DE_SYS_BASE	/;"	d
SUNXI_DISP_SYS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DISP_SYS_BASE	/;"	d
SUNXI_DISP_SYS_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DISP_SYS_BASE	/;"	d
SUNXI_DMA_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DMA_BASE	/;"	d
SUNXI_DMA_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DMA_BASE	/;"	d
SUNXI_DMA_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DMA_BASE	/;"	d
SUNXI_DMA_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DMA_BASE	/;"	d
SUNXI_DMA_CFG_REG0	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_CFG_REG0 /;"	d	file:
SUNXI_DMA_CTL_DST_DATA_WIDTH_32	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define SUNXI_DMA_CTL_DST_DATA_WIDTH_32	/;"	d
SUNXI_DMA_CTL_DST_DATA_WIDTH_32	arch/arm/include/asm/arch/dma_sun4i.h	/^#define SUNXI_DMA_CTL_DST_DATA_WIDTH_32	/;"	d
SUNXI_DMA_CTL_DST_DRQ	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define SUNXI_DMA_CTL_DST_DRQ(/;"	d
SUNXI_DMA_CTL_DST_DRQ	arch/arm/include/asm/arch/dma_sun4i.h	/^#define SUNXI_DMA_CTL_DST_DRQ(/;"	d
SUNXI_DMA_CTL_MODE_IO	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define SUNXI_DMA_CTL_MODE_IO	/;"	d
SUNXI_DMA_CTL_MODE_IO	arch/arm/include/asm/arch/dma_sun4i.h	/^#define SUNXI_DMA_CTL_MODE_IO	/;"	d
SUNXI_DMA_CTL_SRC_DATA_WIDTH_32	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define SUNXI_DMA_CTL_SRC_DATA_WIDTH_32	/;"	d
SUNXI_DMA_CTL_SRC_DATA_WIDTH_32	arch/arm/include/asm/arch/dma_sun4i.h	/^#define SUNXI_DMA_CTL_SRC_DATA_WIDTH_32	/;"	d
SUNXI_DMA_CTL_SRC_DRQ	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define SUNXI_DMA_CTL_SRC_DRQ(/;"	d
SUNXI_DMA_CTL_SRC_DRQ	arch/arm/include/asm/arch/dma_sun4i.h	/^#define SUNXI_DMA_CTL_SRC_DRQ(/;"	d
SUNXI_DMA_CTL_TRIGGER	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define SUNXI_DMA_CTL_TRIGGER	/;"	d
SUNXI_DMA_CTL_TRIGGER	arch/arm/include/asm/arch/dma_sun4i.h	/^#define SUNXI_DMA_CTL_TRIGGER	/;"	d
SUNXI_DMA_DDMA_BC_REG0	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_BC_REG0 /;"	d	file:
SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM /;"	d	file:
SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC /;"	d	file:
SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 /;"	d	file:
SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO /;"	d	file:
SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 /;"	d	file:
SUNXI_DMA_DDMA_CFG_REG_LOADING	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_CFG_REG_LOADING /;"	d	file:
SUNXI_DMA_DDMA_PARA_REG0	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_PARA_REG0 /;"	d	file:
SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE /;"	d	file:
SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC /;"	d	file:
SUNXI_DMA_DEST_START_ADDRR_REG0	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_DEST_START_ADDRR_REG0 /;"	d	file:
SUNXI_DMA_SRC_START_ADDR_REG0	drivers/mtd/nand/sunxi_nand_spl.c	/^#define SUNXI_DMA_SRC_START_ADDR_REG0 /;"	d	file:
SUNXI_DRAMC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DRAMC_BASE	/;"	d
SUNXI_DRAMC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DRAMC_BASE	/;"	d
SUNXI_DRAM_COM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DRAM_COM_BASE	/;"	d
SUNXI_DRAM_COM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DRAM_COM_BASE	/;"	d
SUNXI_DRAM_COM_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DRAM_COM_BASE	/;"	d
SUNXI_DRAM_COM_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DRAM_COM_BASE	/;"	d
SUNXI_DRAM_CTL0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DRAM_CTL0_BASE	/;"	d
SUNXI_DRAM_CTL0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DRAM_CTL0_BASE	/;"	d
SUNXI_DRAM_CTL0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DRAM_CTL0_BASE	/;"	d
SUNXI_DRAM_CTL0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DRAM_CTL0_BASE	/;"	d
SUNXI_DRAM_CTL1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DRAM_CTL1_BASE	/;"	d
SUNXI_DRAM_CTL1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DRAM_CTL1_BASE	/;"	d
SUNXI_DRAM_CTL1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DRAM_CTL1_BASE	/;"	d
SUNXI_DRAM_CTL1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DRAM_CTL1_BASE	/;"	d
SUNXI_DRAM_PHY0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DRAM_PHY0_BASE	/;"	d
SUNXI_DRAM_PHY0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DRAM_PHY0_BASE	/;"	d
SUNXI_DRAM_PHY0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DRAM_PHY0_BASE	/;"	d
SUNXI_DRAM_PHY0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DRAM_PHY0_BASE	/;"	d
SUNXI_DRAM_PHY1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_DRAM_PHY1_BASE	/;"	d
SUNXI_DRAM_PHY1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_DRAM_PHY1_BASE	/;"	d
SUNXI_DRAM_PHY1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_DRAM_PHY1_BASE	/;"	d
SUNXI_DRAM_PHY1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_DRAM_PHY1_BASE	/;"	d
SUNXI_EHCI_AHB_ICHR8_EN	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_AHB_ICHR8_EN	/;"	d	file:
SUNXI_EHCI_AHB_INCR4_BURST_EN	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_AHB_INCR4_BURST_EN	/;"	d	file:
SUNXI_EHCI_AHB_INCRX_ALIGN_EN	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN	/;"	d	file:
SUNXI_EHCI_CONNECT_DET	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_CONNECT_DET	/;"	d	file:
SUNXI_EHCI_CONNECT_INT	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_CONNECT_INT	/;"	d	file:
SUNXI_EHCI_HSIC	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_HSIC	/;"	d	file:
SUNXI_EHCI_HS_FORCE	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_HS_FORCE	/;"	d	file:
SUNXI_EHCI_ULPI_BYPASS_EN	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_EHCI_ULPI_BYPASS_EN	/;"	d	file:
SUNXI_EMAC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_EMAC_BASE	/;"	d
SUNXI_EMAC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_EMAC_BASE	/;"	d
SUNXI_GEN_SUN4I	board/sunxi/Kconfig	/^config SUNXI_GEN_SUN4I$/;"	c
SUNXI_GEN_SUN6I	board/sunxi/Kconfig	/^config SUNXI_GEN_SUN6I$/;"	c
SUNXI_GIC400_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_GIC400_BASE	/;"	d
SUNXI_GIC400_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_GIC400_BASE	/;"	d
SUNXI_GIC400_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_GIC400_BASE	/;"	d
SUNXI_GIC400_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_GIC400_BASE	/;"	d
SUNXI_GMAC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_GMAC_BASE	/;"	d
SUNXI_GMAC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_GMAC_BASE	/;"	d
SUNXI_GPA	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPA(/;"	d
SUNXI_GPA	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPA(/;"	d
SUNXI_GPAXP0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPAXP0(/;"	d
SUNXI_GPAXP0	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPAXP0(/;"	d
SUNXI_GPA_EMAC	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPA_EMAC	/;"	d
SUNXI_GPA_EMAC	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPA_EMAC	/;"	d
SUNXI_GPB	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPB(/;"	d
SUNXI_GPB	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPB(/;"	d
SUNXI_GPC	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPC(/;"	d
SUNXI_GPC	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPC(/;"	d
SUNXI_GPC_NAND	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPC_NAND	/;"	d
SUNXI_GPC_NAND	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPC_NAND	/;"	d
SUNXI_GPC_SDC2	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPC_SDC2	/;"	d
SUNXI_GPC_SDC2	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPC_SDC2	/;"	d
SUNXI_GPC_SPI0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPC_SPI0	/;"	d
SUNXI_GPC_SPI0	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPC_SPI0	/;"	d
SUNXI_GPD	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPD(/;"	d
SUNXI_GPD	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPD(/;"	d
SUNXI_GPD_LCD0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPD_LCD0	/;"	d
SUNXI_GPD_LCD0	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPD_LCD0	/;"	d
SUNXI_GPD_LVDS0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPD_LVDS0	/;"	d
SUNXI_GPD_LVDS0	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPD_LVDS0	/;"	d
SUNXI_GPE	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPE(/;"	d
SUNXI_GPE	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPE(/;"	d
SUNXI_GPF	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPF(/;"	d
SUNXI_GPF	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPF(/;"	d
SUNXI_GPF_SDC0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPF_SDC0	/;"	d
SUNXI_GPF_SDC0	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPF_SDC0	/;"	d
SUNXI_GPF_UART0	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPF_UART0	/;"	d
SUNXI_GPF_UART0	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPF_UART0	/;"	d
SUNXI_GPG	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPG(/;"	d
SUNXI_GPG	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPG(/;"	d
SUNXI_GPH	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPH(/;"	d
SUNXI_GPH	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPH(/;"	d
SUNXI_GPI	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPI(/;"	d
SUNXI_GPI	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPI(/;"	d
SUNXI_GPIOS_PER_BANK	drivers/gpio/sunxi_gpio.c	/^#define SUNXI_GPIOS_PER_BANK	/;"	d	file:
SUNXI_GPIO_A	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_A	/;"	d
SUNXI_GPIO_A	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_A	/;"	d
SUNXI_GPIO_AXP0_GPIO_COUNT	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_AXP0_GPIO_COUNT	/;"	d
SUNXI_GPIO_AXP0_GPIO_COUNT	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_AXP0_GPIO_COUNT	/;"	d
SUNXI_GPIO_AXP0_PREFIX	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_AXP0_PREFIX /;"	d
SUNXI_GPIO_AXP0_PREFIX	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_AXP0_PREFIX /;"	d
SUNXI_GPIO_AXP0_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_AXP0_START = 1024,$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_AXP0_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_AXP0_START = 1024,$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_AXP0_VBUS_DETECT	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_AXP0_VBUS_DETECT	/;"	d
SUNXI_GPIO_AXP0_VBUS_DETECT	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_AXP0_VBUS_DETECT	/;"	d
SUNXI_GPIO_AXP0_VBUS_ENABLE	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_AXP0_VBUS_ENABLE	/;"	d
SUNXI_GPIO_AXP0_VBUS_ENABLE	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_AXP0_VBUS_ENABLE	/;"	d
SUNXI_GPIO_A_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_A_NR	/;"	d
SUNXI_GPIO_A_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_A_NR	/;"	d
SUNXI_GPIO_A_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_A_START = 0,$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_A_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_A_START = 0,$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_B	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_B	/;"	d
SUNXI_GPIO_B	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_B	/;"	d
SUNXI_GPIO_BANKS	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_BANKS /;"	d
SUNXI_GPIO_BANKS	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_BANKS /;"	d
SUNXI_GPIO_B_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_B_NR	/;"	d
SUNXI_GPIO_B_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_B_NR	/;"	d
SUNXI_GPIO_B_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_B_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_A),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_B_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_B_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_A),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_C	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_C	/;"	d
SUNXI_GPIO_C	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_C	/;"	d
SUNXI_GPIO_C_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_C_NR	/;"	d
SUNXI_GPIO_C_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_C_NR	/;"	d
SUNXI_GPIO_C_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_C_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_B),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_C_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_C_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_B),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_D	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_D	/;"	d
SUNXI_GPIO_D	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_D	/;"	d
SUNXI_GPIO_DISABLE	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_DISABLE	/;"	d
SUNXI_GPIO_DISABLE	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_DISABLE	/;"	d
SUNXI_GPIO_D_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_D_NR	/;"	d
SUNXI_GPIO_D_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_D_NR	/;"	d
SUNXI_GPIO_D_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_D_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_C),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_D_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_D_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_C),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_E	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_E	/;"	d
SUNXI_GPIO_E	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_E	/;"	d
SUNXI_GPIO_E_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_E_NR	/;"	d
SUNXI_GPIO_E_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_E_NR	/;"	d
SUNXI_GPIO_E_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_E_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_D),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_E_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_E_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_D),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_F	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_F	/;"	d
SUNXI_GPIO_F	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_F	/;"	d
SUNXI_GPIO_F_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_F_NR	/;"	d
SUNXI_GPIO_F_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_F_NR	/;"	d
SUNXI_GPIO_F_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_F_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_E),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_F_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_F_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_E),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_G	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_G	/;"	d
SUNXI_GPIO_G	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_G	/;"	d
SUNXI_GPIO_G_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_G_NR	/;"	d
SUNXI_GPIO_G_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_G_NR	/;"	d
SUNXI_GPIO_G_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_G_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_F),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_G_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_G_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_F),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_H	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_H	/;"	d
SUNXI_GPIO_H	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_H	/;"	d
SUNXI_GPIO_H_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_H_NR	/;"	d
SUNXI_GPIO_H_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_H_NR	/;"	d
SUNXI_GPIO_H_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_H_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_G),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_H_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_H_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_G),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_I	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_I	/;"	d
SUNXI_GPIO_I	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_I	/;"	d
SUNXI_GPIO_INPUT	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_INPUT	/;"	d
SUNXI_GPIO_INPUT	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_INPUT	/;"	d
SUNXI_GPIO_I_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_I_NR	/;"	d
SUNXI_GPIO_I_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_I_NR	/;"	d
SUNXI_GPIO_I_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_I_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_H),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_I_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_I_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_H),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_L	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_L	/;"	d
SUNXI_GPIO_L	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_L	/;"	d
SUNXI_GPIO_L_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_L_NR	/;"	d
SUNXI_GPIO_L_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_L_NR	/;"	d
SUNXI_GPIO_L_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_L_START = 352,$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_L_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_L_START = 352,$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_M	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_M	/;"	d
SUNXI_GPIO_M	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_M	/;"	d
SUNXI_GPIO_M_NR	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_M_NR	/;"	d
SUNXI_GPIO_M_NR	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_M_NR	/;"	d
SUNXI_GPIO_M_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_M_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_L),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_M_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_M_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_L),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_N	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_N	/;"	d
SUNXI_GPIO_N	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_N	/;"	d
SUNXI_GPIO_NEXT	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_NEXT(/;"	d
SUNXI_GPIO_NEXT	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_NEXT(/;"	d
SUNXI_GPIO_N_START	arch/arm/include/asm/arch-sunxi/gpio.h	/^	SUNXI_GPIO_N_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_M),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_N_START	arch/arm/include/asm/arch/gpio.h	/^	SUNXI_GPIO_N_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_M),$/;"	e	enum:sunxi_gpio_number
SUNXI_GPIO_OUTPUT	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_OUTPUT	/;"	d
SUNXI_GPIO_OUTPUT	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_OUTPUT	/;"	d
SUNXI_GPIO_PULL_DISABLE	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_PULL_DISABLE	/;"	d
SUNXI_GPIO_PULL_DISABLE	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_PULL_DISABLE	/;"	d
SUNXI_GPIO_PULL_DOWN	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_PULL_DOWN	/;"	d
SUNXI_GPIO_PULL_DOWN	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_PULL_DOWN	/;"	d
SUNXI_GPIO_PULL_UP	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPIO_PULL_UP	/;"	d
SUNXI_GPIO_PULL_UP	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPIO_PULL_UP	/;"	d
SUNXI_GPI_SDC3	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPI_SDC3	/;"	d
SUNXI_GPI_SDC3	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPI_SDC3	/;"	d
SUNXI_GPL	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPL(/;"	d
SUNXI_GPL	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPL(/;"	d
SUNXI_GPM	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPM(/;"	d
SUNXI_GPM	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPM(/;"	d
SUNXI_GPN	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define SUNXI_GPN(/;"	d
SUNXI_GPN	arch/arm/include/asm/arch/gpio.h	/^#define SUNXI_GPN(/;"	d
SUNXI_GPS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_GPS_BASE	/;"	d
SUNXI_GPS_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_GPS_BASE	/;"	d
SUNXI_GTBUS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_GTBUS_BASE	/;"	d
SUNXI_GTBUS_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_GTBUS_BASE	/;"	d
SUNXI_HDMI_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_HDMI_BASE	/;"	d
SUNXI_HDMI_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_HDMI_BASE	/;"	d
SUNXI_HDMI_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_HDMI_BASE	/;"	d
SUNXI_HDMI_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_HDMI_BASE	/;"	d
SUNXI_HDMI_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_CTRL_ENABLE	/;"	d
SUNXI_HDMI_CTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_CTRL_ENABLE	/;"	d
SUNXI_HDMI_DDC_CLOCK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_DDC_CLOCK	/;"	d
SUNXI_HDMI_DDC_CLOCK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_DDC_CLOCK	/;"	d
SUNXI_HDMI_DDC_CMND_EXPLICIT_EDDC_READ	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_DDC_CMND_EXPLICIT_EDDC_READ	/;"	d
SUNXI_HDMI_DDC_CMND_EXPLICIT_EDDC_READ	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_DDC_CMND_EXPLICIT_EDDC_READ	/;"	d
SUNXI_HDMI_DDC_CMND_IMPLICIT_EDDC_READ	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_DDC_CMND_IMPLICIT_EDDC_READ	/;"	d
SUNXI_HDMI_DDC_CMND_IMPLICIT_EDDC_READ	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_DDC_CMND_IMPLICIT_EDDC_READ	/;"	d
SUNXI_HDMI_DDC_FIFO_CTRL_CLEAR	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_DDC_FIFO_CTRL_CLEAR	/;"	d
SUNXI_HDMI_DDC_FIFO_CTRL_CLEAR	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_DDC_FIFO_CTRL_CLEAR	/;"	d
SUNXI_HDMI_FC_AVICONF0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_AVICONF0	/;"	d
SUNXI_HDMI_FC_AVICONF0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_AVICONF0	/;"	d
SUNXI_HDMI_FC_AVICONF1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_AVICONF1	/;"	d
SUNXI_HDMI_FC_AVICONF1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_AVICONF1	/;"	d
SUNXI_HDMI_FC_AVICONF2	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_AVICONF2	/;"	d
SUNXI_HDMI_FC_AVICONF2	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_AVICONF2	/;"	d
SUNXI_HDMI_FC_CH0PREAM	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_CH0PREAM	/;"	d
SUNXI_HDMI_FC_CH0PREAM	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_CH0PREAM	/;"	d
SUNXI_HDMI_FC_CH1PREAM	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_CH1PREAM /;"	d
SUNXI_HDMI_FC_CH1PREAM	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_CH1PREAM /;"	d
SUNXI_HDMI_FC_CH2PREAM	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_CH2PREAM	/;"	d
SUNXI_HDMI_FC_CH2PREAM	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_CH2PREAM	/;"	d
SUNXI_HDMI_FC_CTRLDUR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_CTRLDUR	/;"	d
SUNXI_HDMI_FC_CTRLDUR	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_CTRLDUR	/;"	d
SUNXI_HDMI_FC_EXCTRLDUR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_EXCTRLDUR	/;"	d
SUNXI_HDMI_FC_EXCTRLDUR	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_EXCTRLDUR	/;"	d
SUNXI_HDMI_FC_EXCTRLSPAC	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_EXCTRLSPAC	/;"	d
SUNXI_HDMI_FC_EXCTRLSPAC	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_EXCTRLSPAC	/;"	d
SUNXI_HDMI_FC_HSYNCINDELAY0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINDELAY0	/;"	d
SUNXI_HDMI_FC_HSYNCINDELAY0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINDELAY0	/;"	d
SUNXI_HDMI_FC_HSYNCINDELAY1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINDELAY1	/;"	d
SUNXI_HDMI_FC_HSYNCINDELAY1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINDELAY1	/;"	d
SUNXI_HDMI_FC_HSYNCINWIDTH0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINWIDTH0	/;"	d
SUNXI_HDMI_FC_HSYNCINWIDTH0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINWIDTH0	/;"	d
SUNXI_HDMI_FC_HSYNCINWIDTH1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINWIDTH1	/;"	d
SUNXI_HDMI_FC_HSYNCINWIDTH1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_HSYNCINWIDTH1	/;"	d
SUNXI_HDMI_FC_INHACTV0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INHACTV0	/;"	d
SUNXI_HDMI_FC_INHACTV0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INHACTV0	/;"	d
SUNXI_HDMI_FC_INHACTV1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INHACTV1	/;"	d
SUNXI_HDMI_FC_INHACTV1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INHACTV1	/;"	d
SUNXI_HDMI_FC_INHBLANK0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INHBLANK0	/;"	d
SUNXI_HDMI_FC_INHBLANK0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INHBLANK0	/;"	d
SUNXI_HDMI_FC_INHBLANK1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INHBLANK1	/;"	d
SUNXI_HDMI_FC_INHBLANK1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INHBLANK1	/;"	d
SUNXI_HDMI_FC_INVACTV0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INVACTV0	/;"	d
SUNXI_HDMI_FC_INVACTV0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INVACTV0	/;"	d
SUNXI_HDMI_FC_INVACTV1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INVACTV1	/;"	d
SUNXI_HDMI_FC_INVACTV1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INVACTV1	/;"	d
SUNXI_HDMI_FC_INVBLANK	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INVBLANK	/;"	d
SUNXI_HDMI_FC_INVBLANK	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INVBLANK	/;"	d
SUNXI_HDMI_FC_INVIDCONF	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_INVIDCONF	/;"	d
SUNXI_HDMI_FC_INVIDCONF	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_INVIDCONF	/;"	d
SUNXI_HDMI_FC_VSYNCINDELAY	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_VSYNCINDELAY	/;"	d
SUNXI_HDMI_FC_VSYNCINDELAY	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_VSYNCINDELAY	/;"	d
SUNXI_HDMI_FC_VSYNCINWIDTH	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_FC_VSYNCINWIDTH	/;"	d
SUNXI_HDMI_FC_VSYNCINWIDTH	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_FC_VSYNCINWIDTH	/;"	d
SUNXI_HDMI_HPD_DETECT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_HPD_DETECT	/;"	d
SUNXI_HDMI_HPD_DETECT	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_HPD_DETECT	/;"	d
SUNXI_HDMI_HPD_DETECT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_HPD_DETECT	/;"	d
SUNXI_HDMI_HPD_DETECT	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_HPD_DETECT	/;"	d
SUNXI_HDMI_I2CM_ADDRESS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_ADDRESS	/;"	d
SUNXI_HDMI_I2CM_ADDRESS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_ADDRESS	/;"	d
SUNXI_HDMI_I2CM_CTLINT	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_CTLINT	/;"	d
SUNXI_HDMI_I2CM_CTLINT	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_CTLINT	/;"	d
SUNXI_HDMI_I2CM_DATAI	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_DATAI	/;"	d
SUNXI_HDMI_I2CM_DATAI	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_DATAI	/;"	d
SUNXI_HDMI_I2CM_DIV	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_DIV	/;"	d
SUNXI_HDMI_I2CM_DIV	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_DIV	/;"	d
SUNXI_HDMI_I2CM_INT	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_INT	/;"	d
SUNXI_HDMI_I2CM_INT	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_INT	/;"	d
SUNXI_HDMI_I2CM_OPERATION	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_OPERATION	/;"	d
SUNXI_HDMI_I2CM_OPERATION	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_OPERATION	/;"	d
SUNXI_HDMI_I2CM_SEGADDR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_SEGADDR	/;"	d
SUNXI_HDMI_I2CM_SEGADDR	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_SEGADDR	/;"	d
SUNXI_HDMI_I2CM_SEGPTR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_SEGPTR	/;"	d
SUNXI_HDMI_I2CM_SEGPTR	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_SEGPTR	/;"	d
SUNXI_HDMI_I2CM_SLAVE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_SLAVE	/;"	d
SUNXI_HDMI_I2CM_SLAVE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_SLAVE	/;"	d
SUNXI_HDMI_I2CM_SOFTRSTZ	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_SOFTRSTZ	/;"	d
SUNXI_HDMI_I2CM_SOFTRSTZ	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_SOFTRSTZ	/;"	d
SUNXI_HDMI_I2CM_SS_SCL_HCNT_0_ADDR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_SS_SCL_HCNT_0_ADDR	/;"	d
SUNXI_HDMI_I2CM_SS_SCL_HCNT_0_ADDR	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_SS_SCL_HCNT_0_ADDR	/;"	d
SUNXI_HDMI_I2CM_SS_SCL_LCNT_0_ADDR	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_I2CM_SS_SCL_LCNT_0_ADDR	/;"	d
SUNXI_HDMI_I2CM_SS_SCL_LCNT_0_ADDR	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_I2CM_SS_SCL_LCNT_0_ADDR	/;"	d
SUNXI_HDMI_IH_I2CM_STAT0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_IH_I2CM_STAT0	/;"	d
SUNXI_HDMI_IH_I2CM_STAT0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_IH_I2CM_STAT0	/;"	d
SUNXI_HDMI_IH_MUTE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_IH_MUTE	/;"	d
SUNXI_HDMI_IH_MUTE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_IH_MUTE	/;"	d
SUNXI_HDMI_IRQ_STATUS_BITS	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_IRQ_STATUS_BITS	/;"	d
SUNXI_HDMI_IRQ_STATUS_BITS	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_IRQ_STATUS_BITS	/;"	d
SUNXI_HDMI_IRQ_STATUS_FIFO_OF	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_IRQ_STATUS_FIFO_OF	/;"	d
SUNXI_HDMI_IRQ_STATUS_FIFO_OF	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_IRQ_STATUS_FIFO_OF	/;"	d
SUNXI_HDMI_IRQ_STATUS_FIFO_UF	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_IRQ_STATUS_FIFO_UF	/;"	d
SUNXI_HDMI_IRQ_STATUS_FIFO_UF	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_IRQ_STATUS_FIFO_UF	/;"	d
SUNXI_HDMI_MC_CLKDIS	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_MC_CLKDIS	/;"	d
SUNXI_HDMI_MC_CLKDIS	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_MC_CLKDIS	/;"	d
SUNXI_HDMI_MC_FLOWCTRL	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_MC_FLOWCTRL	/;"	d
SUNXI_HDMI_MC_FLOWCTRL	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_MC_FLOWCTRL	/;"	d
SUNXI_HDMI_MC_SWRSTZ	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_MC_SWRSTZ	/;"	d
SUNXI_HDMI_MC_SWRSTZ	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_MC_SWRSTZ	/;"	d
SUNXI_HDMI_PAD_CTRL0_HDP	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PAD_CTRL0_HDP	/;"	d
SUNXI_HDMI_PAD_CTRL0_HDP	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PAD_CTRL0_HDP	/;"	d
SUNXI_HDMI_PAD_CTRL0_RUN	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PAD_CTRL0_RUN	/;"	d
SUNXI_HDMI_PAD_CTRL0_RUN	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PAD_CTRL0_RUN	/;"	d
SUNXI_HDMI_PAD_CTRL1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PAD_CTRL1	/;"	d
SUNXI_HDMI_PAD_CTRL1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PAD_CTRL1	/;"	d
SUNXI_HDMI_PAD_CTRL1_HALVE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PAD_CTRL1_HALVE	/;"	d
SUNXI_HDMI_PAD_CTRL1_HALVE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PAD_CTRL1_HALVE	/;"	d
SUNXI_HDMI_PHY_BASE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_PHY_BASE	/;"	d
SUNXI_HDMI_PHY_BASE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_PHY_BASE	/;"	d
SUNXI_HDMI_PKT_CTRL0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PKT_CTRL0	/;"	d
SUNXI_HDMI_PKT_CTRL0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PKT_CTRL0	/;"	d
SUNXI_HDMI_PKT_CTRL1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PKT_CTRL1	/;"	d
SUNXI_HDMI_PKT_CTRL1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PKT_CTRL1	/;"	d
SUNXI_HDMI_PLL_CTRL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PLL_CTRL	/;"	d
SUNXI_HDMI_PLL_CTRL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PLL_CTRL	/;"	d
SUNXI_HDMI_PLL_CTRL_DIV	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PLL_CTRL_DIV(/;"	d
SUNXI_HDMI_PLL_CTRL_DIV	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PLL_CTRL_DIV(/;"	d
SUNXI_HDMI_PLL_CTRL_DIV_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PLL_CTRL_DIV_MASK	/;"	d
SUNXI_HDMI_PLL_CTRL_DIV_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PLL_CTRL_DIV_MASK	/;"	d
SUNXI_HDMI_PLL_DBG0_PLL3	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PLL_DBG0_PLL3	/;"	d
SUNXI_HDMI_PLL_DBG0_PLL3	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PLL_DBG0_PLL3	/;"	d
SUNXI_HDMI_PLL_DBG0_PLL7	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_PLL_DBG0_PLL7	/;"	d
SUNXI_HDMI_PLL_DBG0_PLL7	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_PLL_DBG0_PLL7	/;"	d
SUNXI_HDMI_QCP_PACKET0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_QCP_PACKET0	/;"	d
SUNXI_HDMI_QCP_PACKET0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_QCP_PACKET0	/;"	d
SUNXI_HDMI_QCP_PACKET1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_QCP_PACKET1	/;"	d
SUNXI_HDMI_QCP_PACKET1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_QCP_PACKET1	/;"	d
SUNXI_HDMI_TX_BCBDATA0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_BCBDATA0	/;"	d
SUNXI_HDMI_TX_BCBDATA0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_BCBDATA0	/;"	d
SUNXI_HDMI_TX_BCBDATA1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_BCBDATA1	/;"	d
SUNXI_HDMI_TX_BCBDATA1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_BCBDATA1	/;"	d
SUNXI_HDMI_TX_GYDATA0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_GYDATA0	/;"	d
SUNXI_HDMI_TX_GYDATA0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_GYDATA0	/;"	d
SUNXI_HDMI_TX_GYDATA1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_GYDATA1	/;"	d
SUNXI_HDMI_TX_GYDATA1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_GYDATA1	/;"	d
SUNXI_HDMI_TX_INSTUFFING	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_INSTUFFING	/;"	d
SUNXI_HDMI_TX_INSTUFFING	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_INSTUFFING	/;"	d
SUNXI_HDMI_TX_INVID0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_INVID0	/;"	d
SUNXI_HDMI_TX_INVID0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_INVID0	/;"	d
SUNXI_HDMI_TX_RCRDATA0	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_RCRDATA0	/;"	d
SUNXI_HDMI_TX_RCRDATA0	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_RCRDATA0	/;"	d
SUNXI_HDMI_TX_RCRDATA1	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_TX_RCRDATA1	/;"	d
SUNXI_HDMI_TX_RCRDATA1	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_TX_RCRDATA1	/;"	d
SUNXI_HDMI_UNKNOWN_INPUT_SYNC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_UNKNOWN_INPUT_SYNC	/;"	d
SUNXI_HDMI_UNKNOWN_INPUT_SYNC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_UNKNOWN_INPUT_SYNC	/;"	d
SUNXI_HDMI_VIDEO_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_VIDEO_CTRL_ENABLE	/;"	d
SUNXI_HDMI_VIDEO_CTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_VIDEO_CTRL_ENABLE	/;"	d
SUNXI_HDMI_VIDEO_CTRL_HDMI	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_VIDEO_CTRL_HDMI	/;"	d
SUNXI_HDMI_VIDEO_CTRL_HDMI	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_VIDEO_CTRL_HDMI	/;"	d
SUNXI_HDMI_VIDEO_POL_HOR	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_VIDEO_POL_HOR	/;"	d
SUNXI_HDMI_VIDEO_POL_HOR	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_VIDEO_POL_HOR	/;"	d
SUNXI_HDMI_VIDEO_POL_TX_CLK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_VIDEO_POL_TX_CLK	/;"	d
SUNXI_HDMI_VIDEO_POL_TX_CLK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_VIDEO_POL_TX_CLK	/;"	d
SUNXI_HDMI_VIDEO_POL_VER	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_VIDEO_POL_VER	/;"	d
SUNXI_HDMI_VIDEO_POL_VER	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_VIDEO_POL_VER	/;"	d
SUNXI_HDMI_VP_CONF	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_VP_CONF	/;"	d
SUNXI_HDMI_VP_CONF	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_VP_CONF	/;"	d
SUNXI_HDMI_VP_PR_CD	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_VP_PR_CD	/;"	d
SUNXI_HDMI_VP_PR_CD	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_VP_PR_CD	/;"	d
SUNXI_HDMI_VP_REMAP	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_VP_REMAP	/;"	d
SUNXI_HDMI_VP_REMAP	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_VP_REMAP	/;"	d
SUNXI_HDMI_VP_STUFF	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_HDMI_VP_STUFF	/;"	d
SUNXI_HDMI_VP_STUFF	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_HDMI_VP_STUFF	/;"	d
SUNXI_HDMI_X	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_X(/;"	d
SUNXI_HDMI_X	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_X(/;"	d
SUNXI_HDMI_Y	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HDMI_Y(/;"	d
SUNXI_HDMI_Y	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HDMI_Y(/;"	d
SUNXI_HMDI_DDC_ADDR_EDDC_ADDR	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_ADDR_EDDC_ADDR	/;"	d
SUNXI_HMDI_DDC_ADDR_EDDC_ADDR	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_ADDR_EDDC_ADDR	/;"	d
SUNXI_HMDI_DDC_ADDR_EDDC_SEGMENT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_ADDR_EDDC_SEGMENT(/;"	d
SUNXI_HMDI_DDC_ADDR_EDDC_SEGMENT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_ADDR_EDDC_SEGMENT(/;"	d
SUNXI_HMDI_DDC_ADDR_OFFSET	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_ADDR_OFFSET(/;"	d
SUNXI_HMDI_DDC_ADDR_OFFSET	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_ADDR_OFFSET(/;"	d
SUNXI_HMDI_DDC_ADDR_SLAVE_ADDR	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_ADDR_SLAVE_ADDR	/;"	d
SUNXI_HMDI_DDC_ADDR_SLAVE_ADDR	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_ADDR_SLAVE_ADDR	/;"	d
SUNXI_HMDI_DDC_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_CTRL_ENABLE	/;"	d
SUNXI_HMDI_DDC_CTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_CTRL_ENABLE	/;"	d
SUNXI_HMDI_DDC_CTRL_RESET	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_CTRL_RESET	/;"	d
SUNXI_HMDI_DDC_CTRL_RESET	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_CTRL_RESET	/;"	d
SUNXI_HMDI_DDC_CTRL_SCL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_CTRL_SCL_ENABLE	/;"	d
SUNXI_HMDI_DDC_CTRL_SCL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_CTRL_SCL_ENABLE	/;"	d
SUNXI_HMDI_DDC_CTRL_SDA_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_CTRL_SDA_ENABLE	/;"	d
SUNXI_HMDI_DDC_CTRL_SDA_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_CTRL_SDA_ENABLE	/;"	d
SUNXI_HMDI_DDC_CTRL_START	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_CTRL_START	/;"	d
SUNXI_HMDI_DDC_CTRL_START	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_CTRL_START	/;"	d
SUNXI_HMDI_DDC_LINE_CTRL_SCL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_LINE_CTRL_SCL_ENABLE	/;"	d
SUNXI_HMDI_DDC_LINE_CTRL_SCL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_LINE_CTRL_SCL_ENABLE	/;"	d
SUNXI_HMDI_DDC_LINE_CTRL_SDA_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_HMDI_DDC_LINE_CTRL_SDA_ENABLE	/;"	d
SUNXI_HMDI_DDC_LINE_CTRL_SDA_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_HMDI_DDC_LINE_CTRL_SDA_ENABLE	/;"	d
SUNXI_IIS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_IIS_BASE	/;"	d
SUNXI_IIS_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_IIS_BASE	/;"	d
SUNXI_INTC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_INTC_BASE	/;"	d
SUNXI_INTC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_INTC_BASE	/;"	d
SUNXI_IR0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_IR0_BASE	/;"	d
SUNXI_IR0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_IR0_BASE	/;"	d
SUNXI_IR1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_IR1_BASE	/;"	d
SUNXI_IR1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_IR1_BASE	/;"	d
SUNXI_KEYPAD_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_KEYPAD_BASE	/;"	d
SUNXI_KEYPAD_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_KEYPAD_BASE	/;"	d
SUNXI_LCD0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_LCD0_BASE	/;"	d
SUNXI_LCD0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_LCD0_BASE	/;"	d
SUNXI_LCD0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_LCD0_BASE	/;"	d
SUNXI_LCD0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_LCD0_BASE	/;"	d
SUNXI_LCD1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_LCD1_BASE	/;"	d
SUNXI_LCD1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_LCD1_BASE	/;"	d
SUNXI_LCD1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_LCD1_BASE	/;"	d
SUNXI_LCD1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_LCD1_BASE	/;"	d
SUNXI_LCD2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_LCD2_BASE	/;"	d
SUNXI_LCD2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_LCD2_BASE	/;"	d
SUNXI_LCDC_CTRL_IO_MAP_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_CTRL_IO_MAP_MASK	/;"	d
SUNXI_LCDC_CTRL_IO_MAP_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_CTRL_IO_MAP_MASK	/;"	d
SUNXI_LCDC_CTRL_IO_MAP_TCON0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_CTRL_IO_MAP_TCON0	/;"	d
SUNXI_LCDC_CTRL_IO_MAP_TCON0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_CTRL_IO_MAP_TCON0	/;"	d
SUNXI_LCDC_CTRL_IO_MAP_TCON1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_CTRL_IO_MAP_TCON1	/;"	d
SUNXI_LCDC_CTRL_IO_MAP_TCON1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_CTRL_IO_MAP_TCON1	/;"	d
SUNXI_LCDC_CTRL_TCON_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_CTRL_TCON_ENABLE	/;"	d
SUNXI_LCDC_CTRL_TCON_ENABLE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_CTRL_TCON_ENABLE	/;"	d
SUNXI_LCDC_CTRL_TCON_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_CTRL_TCON_ENABLE	/;"	d
SUNXI_LCDC_CTRL_TCON_ENABLE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_CTRL_TCON_ENABLE	/;"	d
SUNXI_LCDC_LVDS_ANA0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA0	/;"	d
SUNXI_LCDC_LVDS_ANA0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA0	/;"	d
SUNXI_LCDC_LVDS_ANA0_DRVC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_DRVC	/;"	d
SUNXI_LCDC_LVDS_ANA0_DRVC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_DRVC	/;"	d
SUNXI_LCDC_LVDS_ANA0_DRVD	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_DRVD(/;"	d
SUNXI_LCDC_LVDS_ANA0_DRVD	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_DRVD(/;"	d
SUNXI_LCDC_LVDS_ANA0_EN_MB	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_EN_MB	/;"	d
SUNXI_LCDC_LVDS_ANA0_EN_MB	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_EN_MB	/;"	d
SUNXI_LCDC_LVDS_ANA0_UPDATE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_UPDATE	/;"	d
SUNXI_LCDC_LVDS_ANA0_UPDATE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA0_UPDATE	/;"	d
SUNXI_LCDC_LVDS_ANA1_INIT1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA1_INIT1	/;"	d
SUNXI_LCDC_LVDS_ANA1_INIT1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA1_INIT1	/;"	d
SUNXI_LCDC_LVDS_ANA1_INIT2	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_LVDS_ANA1_INIT2	/;"	d
SUNXI_LCDC_LVDS_ANA1_INIT2	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_LVDS_ANA1_INIT2	/;"	d
SUNXI_LCDC_MUX_CTRL_SRC0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC0(/;"	d
SUNXI_LCDC_MUX_CTRL_SRC0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC0(/;"	d
SUNXI_LCDC_MUX_CTRL_SRC0_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC0_MASK	/;"	d
SUNXI_LCDC_MUX_CTRL_SRC0_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC0_MASK	/;"	d
SUNXI_LCDC_MUX_CTRL_SRC1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC1(/;"	d
SUNXI_LCDC_MUX_CTRL_SRC1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC1(/;"	d
SUNXI_LCDC_MUX_CTRL_SRC1_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC1_MASK	/;"	d
SUNXI_LCDC_MUX_CTRL_SRC1_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_MUX_CTRL_SRC1_MASK	/;"	d
SUNXI_LCDC_TCON0_CTRL_CLK_DELAY	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(/;"	d
SUNXI_LCDC_TCON0_CTRL_CLK_DELAY	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(/;"	d
SUNXI_LCDC_TCON0_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON0_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON0_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON0_CTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON0_CTRL_ENABLE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON0_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON0_DCLK_DIV	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_DCLK_DIV(/;"	d
SUNXI_LCDC_TCON0_DCLK_DIV	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_DCLK_DIV(/;"	d
SUNXI_LCDC_TCON0_DCLK_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_DCLK_ENABLE	/;"	d
SUNXI_LCDC_TCON0_DCLK_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_DCLK_ENABLE	/;"	d
SUNXI_LCDC_TCON0_FRM_CTRL_RGB565	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB565	/;"	d
SUNXI_LCDC_TCON0_FRM_CTRL_RGB565	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB565	/;"	d
SUNXI_LCDC_TCON0_FRM_CTRL_RGB666	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB666	/;"	d
SUNXI_LCDC_TCON0_FRM_CTRL_RGB666	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB666	/;"	d
SUNXI_LCDC_TCON0_FRM_SEED	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_SEED	/;"	d
SUNXI_LCDC_TCON0_FRM_SEED	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_SEED	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB0	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB0	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB1	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB1	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB2	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB2	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB2	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB2	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB3	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB3	/;"	d
SUNXI_LCDC_TCON0_FRM_TAB3	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_FRM_TAB3	/;"	d
SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(/;"	d
SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(/;"	d
SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0	/;"	d
SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0	/;"	d
SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(/;"	d
SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(/;"	d
SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE	/;"	d
SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE	/;"	d
SUNXI_LCDC_TCON0_TIMING_H_BP	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_H_BP(/;"	d
SUNXI_LCDC_TCON0_TIMING_H_BP	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_H_BP(/;"	d
SUNXI_LCDC_TCON0_TIMING_H_TOTAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_H_TOTAL(/;"	d
SUNXI_LCDC_TCON0_TIMING_H_TOTAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_H_TOTAL(/;"	d
SUNXI_LCDC_TCON0_TIMING_V_BP	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_V_BP(/;"	d
SUNXI_LCDC_TCON0_TIMING_V_BP	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_V_BP(/;"	d
SUNXI_LCDC_TCON0_TIMING_V_TOTAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_V_TOTAL(/;"	d
SUNXI_LCDC_TCON0_TIMING_V_TOTAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON0_TIMING_V_TOTAL(/;"	d
SUNXI_LCDC_TCON1_CTRL_CLK_DELAY	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(/;"	d
SUNXI_LCDC_TCON1_CTRL_CLK_DELAY	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(/;"	d
SUNXI_LCDC_TCON1_CTRL_CLK_DELAY	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(/;"	d
SUNXI_LCDC_TCON1_CTRL_CLK_DELAY	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(/;"	d
SUNXI_LCDC_TCON1_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_ENABLE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_CTRL_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	/;"	d
SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE	/;"	d
SUNXI_LCDC_TCON1_TIMING_H_BP	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_BP	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_BP	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_BP	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_TOTAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_TOTAL	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_TOTAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_H_TOTAL	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_BP	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_BP	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_BP	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_BP	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_BP(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_TOTAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_TOTAL	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_TOTAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_TOTAL(/;"	d
SUNXI_LCDC_TCON1_TIMING_V_TOTAL	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_TCON1_TIMING_V_TOTAL(/;"	d
SUNXI_LCDC_TCON_HSYNC_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON_HSYNC_MASK	/;"	d
SUNXI_LCDC_TCON_HSYNC_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON_HSYNC_MASK	/;"	d
SUNXI_LCDC_TCON_VSYNC_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_TCON_VSYNC_MASK	/;"	d
SUNXI_LCDC_TCON_VSYNC_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_TCON_VSYNC_MASK	/;"	d
SUNXI_LCDC_X	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_X(/;"	d
SUNXI_LCDC_X	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_X(/;"	d
SUNXI_LCDC_X	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_X(/;"	d
SUNXI_LCDC_X	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_X(/;"	d
SUNXI_LCDC_Y	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_LCDC_Y(/;"	d
SUNXI_LCDC_Y	arch/arm/include/asm/arch-sunxi/display2.h	/^#define SUNXI_LCDC_Y(/;"	d
SUNXI_LCDC_Y	arch/arm/include/asm/arch/display.h	/^#define SUNXI_LCDC_Y(/;"	d
SUNXI_LCDC_Y	arch/arm/include/asm/arch/display2.h	/^#define SUNXI_LCDC_Y(/;"	d
SUNXI_LRADC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_LRADC_BASE	/;"	d
SUNXI_LRADC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_LRADC_BASE	/;"	d
SUNXI_LRADC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_LRADC_BASE	/;"	d
SUNXI_LRADC_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_LRADC_BASE	/;"	d
SUNXI_MALI400_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MALI400_BASE	/;"	d
SUNXI_MALI400_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MALI400_BASE	/;"	d
SUNXI_MIPI_DSI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MIPI_DSI0_BASE	/;"	d
SUNXI_MIPI_DSI0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MIPI_DSI0_BASE	/;"	d
SUNXI_MIPI_DSI0_DPHY_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MIPI_DSI0_DPHY_BASE	/;"	d
SUNXI_MIPI_DSI0_DPHY_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MIPI_DSI0_DPHY_BASE	/;"	d
SUNXI_MMC0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MMC0_BASE	/;"	d
SUNXI_MMC0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MMC0_BASE	/;"	d
SUNXI_MMC0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MMC0_BASE	/;"	d
SUNXI_MMC0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MMC0_BASE	/;"	d
SUNXI_MMC1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MMC1_BASE	/;"	d
SUNXI_MMC1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MMC1_BASE	/;"	d
SUNXI_MMC1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MMC1_BASE	/;"	d
SUNXI_MMC1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MMC1_BASE	/;"	d
SUNXI_MMC2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MMC2_BASE	/;"	d
SUNXI_MMC2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MMC2_BASE	/;"	d
SUNXI_MMC2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MMC2_BASE	/;"	d
SUNXI_MMC2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MMC2_BASE	/;"	d
SUNXI_MMC3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MMC3_BASE	/;"	d
SUNXI_MMC3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MMC3_BASE	/;"	d
SUNXI_MMC3_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MMC3_BASE	/;"	d
SUNXI_MMC3_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MMC3_BASE	/;"	d
SUNXI_MMC_CLK_DIVIDER_MASK	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CLK_DIVIDER_MASK	/;"	d
SUNXI_MMC_CLK_DIVIDER_MASK	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CLK_DIVIDER_MASK	/;"	d
SUNXI_MMC_CLK_ENABLE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CLK_ENABLE	/;"	d
SUNXI_MMC_CLK_ENABLE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CLK_ENABLE	/;"	d
SUNXI_MMC_CLK_POWERSAVE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CLK_POWERSAVE	/;"	d
SUNXI_MMC_CLK_POWERSAVE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CLK_POWERSAVE	/;"	d
SUNXI_MMC_CMD_AUTO_STOP	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_AUTO_STOP	/;"	d
SUNXI_MMC_CMD_AUTO_STOP	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_AUTO_STOP	/;"	d
SUNXI_MMC_CMD_CHK_RESPONSE_CRC	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC	/;"	d
SUNXI_MMC_CMD_CHK_RESPONSE_CRC	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC	/;"	d
SUNXI_MMC_CMD_DATA_EXPIRE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_DATA_EXPIRE	/;"	d
SUNXI_MMC_CMD_DATA_EXPIRE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_DATA_EXPIRE	/;"	d
SUNXI_MMC_CMD_LONG_RESPONSE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_LONG_RESPONSE	/;"	d
SUNXI_MMC_CMD_LONG_RESPONSE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_LONG_RESPONSE	/;"	d
SUNXI_MMC_CMD_RESP_EXPIRE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_RESP_EXPIRE	/;"	d
SUNXI_MMC_CMD_RESP_EXPIRE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_RESP_EXPIRE	/;"	d
SUNXI_MMC_CMD_SEND_INIT_SEQ	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_SEND_INIT_SEQ	/;"	d
SUNXI_MMC_CMD_SEND_INIT_SEQ	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_SEND_INIT_SEQ	/;"	d
SUNXI_MMC_CMD_START	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_START	/;"	d
SUNXI_MMC_CMD_START	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_START	/;"	d
SUNXI_MMC_CMD_UPCLK_ONLY	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_UPCLK_ONLY	/;"	d
SUNXI_MMC_CMD_UPCLK_ONLY	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_UPCLK_ONLY	/;"	d
SUNXI_MMC_CMD_WAIT_PRE_OVER	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_WAIT_PRE_OVER	/;"	d
SUNXI_MMC_CMD_WAIT_PRE_OVER	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_WAIT_PRE_OVER	/;"	d
SUNXI_MMC_CMD_WRITE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_CMD_WRITE	/;"	d
SUNXI_MMC_CMD_WRITE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_CMD_WRITE	/;"	d
SUNXI_MMC_COMMON_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_MMC_COMMON_BASE	/;"	d
SUNXI_MMC_COMMON_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_MMC_COMMON_BASE	/;"	d
SUNXI_MMC_COMMON_CLK_GATE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_COMMON_CLK_GATE	/;"	d
SUNXI_MMC_COMMON_CLK_GATE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_COMMON_CLK_GATE	/;"	d
SUNXI_MMC_COMMON_RESET	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_COMMON_RESET	/;"	d
SUNXI_MMC_COMMON_RESET	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_COMMON_RESET	/;"	d
SUNXI_MMC_GCTRL_ACCESS_BY_AHB	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB /;"	d
SUNXI_MMC_GCTRL_ACCESS_BY_AHB	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB /;"	d
SUNXI_MMC_GCTRL_DMA_ENABLE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_GCTRL_DMA_ENABLE	/;"	d
SUNXI_MMC_GCTRL_DMA_ENABLE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_GCTRL_DMA_ENABLE	/;"	d
SUNXI_MMC_GCTRL_DMA_RESET	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_GCTRL_DMA_RESET	/;"	d
SUNXI_MMC_GCTRL_DMA_RESET	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_GCTRL_DMA_RESET	/;"	d
SUNXI_MMC_GCTRL_FIFO_RESET	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_GCTRL_FIFO_RESET	/;"	d
SUNXI_MMC_GCTRL_FIFO_RESET	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_GCTRL_FIFO_RESET	/;"	d
SUNXI_MMC_GCTRL_RESET	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_GCTRL_RESET	/;"	d
SUNXI_MMC_GCTRL_RESET	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_GCTRL_RESET	/;"	d
SUNXI_MMC_GCTRL_SOFT_RESET	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_GCTRL_SOFT_RESET	/;"	d
SUNXI_MMC_GCTRL_SOFT_RESET	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_GCTRL_SOFT_RESET	/;"	d
SUNXI_MMC_IDIE_RXIRQ	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_IDIE_RXIRQ	/;"	d
SUNXI_MMC_IDIE_RXIRQ	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_IDIE_RXIRQ	/;"	d
SUNXI_MMC_IDIE_TXIRQ	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_IDIE_TXIRQ	/;"	d
SUNXI_MMC_IDIE_TXIRQ	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_IDIE_TXIRQ	/;"	d
SUNXI_MMC_IDMAC_ENABLE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_IDMAC_ENABLE	/;"	d
SUNXI_MMC_IDMAC_ENABLE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_IDMAC_ENABLE	/;"	d
SUNXI_MMC_IDMAC_FIXBURST	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_IDMAC_FIXBURST	/;"	d
SUNXI_MMC_IDMAC_FIXBURST	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_IDMAC_FIXBURST	/;"	d
SUNXI_MMC_IDMAC_RESET	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_IDMAC_RESET	/;"	d
SUNXI_MMC_IDMAC_RESET	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_IDMAC_RESET	/;"	d
SUNXI_MMC_RINT_AUTO_COMMAND_DONE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE	/;"	d
SUNXI_MMC_RINT_AUTO_COMMAND_DONE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE	/;"	d
SUNXI_MMC_RINT_CARD_INSERT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_CARD_INSERT	/;"	d
SUNXI_MMC_RINT_CARD_INSERT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_CARD_INSERT	/;"	d
SUNXI_MMC_RINT_CARD_REMOVE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_CARD_REMOVE	/;"	d
SUNXI_MMC_RINT_CARD_REMOVE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_CARD_REMOVE	/;"	d
SUNXI_MMC_RINT_COMMAND_DONE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_COMMAND_DONE	/;"	d
SUNXI_MMC_RINT_COMMAND_DONE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_COMMAND_DONE	/;"	d
SUNXI_MMC_RINT_DATA_CRC_ERROR	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_DATA_CRC_ERROR	/;"	d
SUNXI_MMC_RINT_DATA_CRC_ERROR	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_DATA_CRC_ERROR	/;"	d
SUNXI_MMC_RINT_DATA_OVER	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_DATA_OVER	/;"	d
SUNXI_MMC_RINT_DATA_OVER	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_DATA_OVER	/;"	d
SUNXI_MMC_RINT_DATA_TIMEOUT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_DATA_TIMEOUT	/;"	d
SUNXI_MMC_RINT_DATA_TIMEOUT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_DATA_TIMEOUT	/;"	d
SUNXI_MMC_RINT_END_BIT_ERROR	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_END_BIT_ERROR	/;"	d
SUNXI_MMC_RINT_END_BIT_ERROR	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_END_BIT_ERROR	/;"	d
SUNXI_MMC_RINT_FIFO_RUN_ERROR	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_FIFO_RUN_ERROR	/;"	d
SUNXI_MMC_RINT_FIFO_RUN_ERROR	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_FIFO_RUN_ERROR	/;"	d
SUNXI_MMC_RINT_HARD_WARE_LOCKED	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_HARD_WARE_LOCKED	/;"	d
SUNXI_MMC_RINT_HARD_WARE_LOCKED	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_HARD_WARE_LOCKED	/;"	d
SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	/;"	d
SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	/;"	d
SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT /;"	d
SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT /;"	d
SUNXI_MMC_RINT_RESP_CRC_ERROR	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_RESP_CRC_ERROR	/;"	d
SUNXI_MMC_RINT_RESP_CRC_ERROR	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_RESP_CRC_ERROR	/;"	d
SUNXI_MMC_RINT_RESP_ERROR	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_RESP_ERROR	/;"	d
SUNXI_MMC_RINT_RESP_ERROR	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_RESP_ERROR	/;"	d
SUNXI_MMC_RINT_RESP_TIMEOUT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_RESP_TIMEOUT	/;"	d
SUNXI_MMC_RINT_RESP_TIMEOUT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_RESP_TIMEOUT	/;"	d
SUNXI_MMC_RINT_RX_DATA_REQUEST	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_RX_DATA_REQUEST	/;"	d
SUNXI_MMC_RINT_RX_DATA_REQUEST	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_RX_DATA_REQUEST	/;"	d
SUNXI_MMC_RINT_SDIO_INTERRUPT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_SDIO_INTERRUPT	/;"	d
SUNXI_MMC_RINT_SDIO_INTERRUPT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_SDIO_INTERRUPT	/;"	d
SUNXI_MMC_RINT_START_BIT_ERROR	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_START_BIT_ERROR	/;"	d
SUNXI_MMC_RINT_START_BIT_ERROR	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_START_BIT_ERROR	/;"	d
SUNXI_MMC_RINT_TX_DATA_REQUEST	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_TX_DATA_REQUEST	/;"	d
SUNXI_MMC_RINT_TX_DATA_REQUEST	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_TX_DATA_REQUEST	/;"	d
SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	/;"	d
SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	/;"	d
SUNXI_MMC_STATUS_CARD_DATA_BUSY	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_CARD_DATA_BUSY	/;"	d
SUNXI_MMC_STATUS_CARD_DATA_BUSY	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_CARD_DATA_BUSY	/;"	d
SUNXI_MMC_STATUS_CARD_PRESENT	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_CARD_PRESENT	/;"	d
SUNXI_MMC_STATUS_CARD_PRESENT	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_CARD_PRESENT	/;"	d
SUNXI_MMC_STATUS_DATA_FSM_BUSY	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_DATA_FSM_BUSY	/;"	d
SUNXI_MMC_STATUS_DATA_FSM_BUSY	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_DATA_FSM_BUSY	/;"	d
SUNXI_MMC_STATUS_FIFO_EMPTY	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_FIFO_EMPTY	/;"	d
SUNXI_MMC_STATUS_FIFO_EMPTY	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_FIFO_EMPTY	/;"	d
SUNXI_MMC_STATUS_FIFO_FULL	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_FIFO_FULL	/;"	d
SUNXI_MMC_STATUS_FIFO_FULL	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_FIFO_FULL	/;"	d
SUNXI_MMC_STATUS_RXWL_FLAG	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_RXWL_FLAG	/;"	d
SUNXI_MMC_STATUS_RXWL_FLAG	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_RXWL_FLAG	/;"	d
SUNXI_MMC_STATUS_TXWL_FLAG	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define SUNXI_MMC_STATUS_TXWL_FLAG	/;"	d
SUNXI_MMC_STATUS_TXWL_FLAG	arch/arm/include/asm/arch/mmc.h	/^#define SUNXI_MMC_STATUS_TXWL_FLAG	/;"	d
SUNXI_MONITOR_LAST	drivers/video/sunxi_display.c	/^#define SUNXI_MONITOR_LAST /;"	d	file:
SUNXI_MONITOR_LAST	drivers/video/sunxi_display2.c	/^#define SUNXI_MONITOR_LAST /;"	d	file:
SUNXI_MP_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MP_BASE	/;"	d
SUNXI_MP_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MP_BASE	/;"	d
SUNXI_MS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_MS_BASE	/;"	d
SUNXI_MS_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_MS_BASE	/;"	d
SUNXI_NFC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_NFC_BASE	/;"	d
SUNXI_NFC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_NFC_BASE	/;"	d
SUNXI_NFC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_NFC_BASE	/;"	d
SUNXI_NFC_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_NFC_BASE	/;"	d
SUNXI_NO_PMIC	drivers/power/Kconfig	/^config SUNXI_NO_PMIC$/;"	c	choice:Power""choice187d87300104
SUNXI_PATA_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PATA_BASE	/;"	d
SUNXI_PATA_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PATA_BASE	/;"	d
SUNXI_PHY_CTL_SIDDQ	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_PHY_CTL_SIDDQ	/;"	d	file:
SUNXI_PHY_CTL_VBUSVLDEXT	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_PHY_CTL_VBUSVLDEXT	/;"	d	file:
SUNXI_PIO_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PIO_BASE	/;"	d
SUNXI_PIO_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_PIO_BASE	/;"	d
SUNXI_PIO_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PIO_BASE	/;"	d
SUNXI_PIO_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_PIO_BASE	/;"	d
SUNXI_PMU_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PMU_BASE	/;"	d
SUNXI_PMU_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PMU_BASE	/;"	d
SUNXI_PRCM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PRCM_BASE	/;"	d
SUNXI_PRCM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_PRCM_BASE	/;"	d
SUNXI_PRCM_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PRCM_BASE	/;"	d
SUNXI_PRCM_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_PRCM_BASE	/;"	d
SUNXI_PS2_0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PS2_0_BASE	/;"	d
SUNXI_PS2_0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PS2_0_BASE	/;"	d
SUNXI_PS2_1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PS2_1_BASE	/;"	d
SUNXI_PS2_1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PS2_1_BASE	/;"	d
SUNXI_PWM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_PWM_BASE	/;"	d
SUNXI_PWM_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_PWM_BASE	/;"	d
SUNXI_PWM_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_PWM_BASE	/;"	d
SUNXI_PWM_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_PWM_BASE	/;"	d
SUNXI_PWM_CH0_PERIOD	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_CH0_PERIOD	/;"	d
SUNXI_PWM_CH0_PERIOD	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_CH0_PERIOD	/;"	d
SUNXI_PWM_CTRL_ENABLE0	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_CTRL_ENABLE0	/;"	d
SUNXI_PWM_CTRL_ENABLE0	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_CTRL_ENABLE0	/;"	d
SUNXI_PWM_CTRL_POLARITY0	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_CTRL_POLARITY0(/;"	d
SUNXI_PWM_CTRL_POLARITY0	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_CTRL_POLARITY0(/;"	d
SUNXI_PWM_CTRL_PRESCALE0	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_CTRL_PRESCALE0(/;"	d
SUNXI_PWM_CTRL_PRESCALE0	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_CTRL_PRESCALE0(/;"	d
SUNXI_PWM_CTRL_REG	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_CTRL_REG	/;"	d
SUNXI_PWM_CTRL_REG	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_CTRL_REG	/;"	d
SUNXI_PWM_MUX	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_MUX	/;"	d
SUNXI_PWM_MUX	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_MUX	/;"	d
SUNXI_PWM_PERIOD_80PCT	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_PERIOD_80PCT	/;"	d
SUNXI_PWM_PERIOD_80PCT	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_PERIOD_80PCT	/;"	d
SUNXI_PWM_PIN0	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define SUNXI_PWM_PIN0	/;"	d
SUNXI_PWM_PIN0	arch/arm/include/asm/arch/pwm.h	/^#define SUNXI_PWM_PIN0	/;"	d
SUNXI_RSB_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_RSB_BASE	/;"	d
SUNXI_RSB_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_RSB_BASE	/;"	d
SUNXI_RSB_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_RSB_BASE	/;"	d
SUNXI_RSB_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_RSB_BASE	/;"	d
SUNXI_RTC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_RTC_BASE	/;"	d
SUNXI_RTC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_RTC_BASE	/;"	d
SUNXI_R_PIO_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_R_PIO_BASE	/;"	d
SUNXI_R_PIO_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_R_PIO_BASE	/;"	d
SUNXI_R_PIO_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_R_PIO_BASE	/;"	d
SUNXI_R_PIO_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_R_PIO_BASE	/;"	d
SUNXI_R_TWI_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_R_TWI_BASE	/;"	d
SUNXI_R_TWI_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_R_TWI_BASE	/;"	d
SUNXI_R_UART_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_R_UART_BASE	/;"	d
SUNXI_R_UART_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_R_UART_BASE	/;"	d
SUNXI_R_UART_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_R_UART_BASE	/;"	d
SUNXI_R_UART_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_R_UART_BASE	/;"	d
SUNXI_SATA_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SATA_BASE	/;"	d
SUNXI_SATA_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SATA_BASE	/;"	d
SUNXI_SCR_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SCR_BASE	/;"	d
SUNXI_SCR_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SCR_BASE	/;"	d
SUNXI_SID_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SID_BASE	/;"	d
SUNXI_SID_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_SID_BASE	/;"	d
SUNXI_SID_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SID_BASE	/;"	d
SUNXI_SID_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_SID_BASE	/;"	d
SUNXI_SJTAG_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SJTAG_BASE	/;"	d
SUNXI_SJTAG_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SJTAG_BASE	/;"	d
SUNXI_SPDIF_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SPDIF_BASE	/;"	d
SUNXI_SPDIF_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SPDIF_BASE	/;"	d
SUNXI_SPI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SPI0_BASE	/;"	d
SUNXI_SPI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_SPI0_BASE	/;"	d
SUNXI_SPI0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SPI0_BASE	/;"	d
SUNXI_SPI0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_SPI0_BASE	/;"	d
SUNXI_SPI1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SPI1_BASE	/;"	d
SUNXI_SPI1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_SPI1_BASE	/;"	d
SUNXI_SPI1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SPI1_BASE	/;"	d
SUNXI_SPI1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_SPI1_BASE	/;"	d
SUNXI_SPI2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SPI2_BASE	/;"	d
SUNXI_SPI2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_SPI2_BASE	/;"	d
SUNXI_SPI2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SPI2_BASE	/;"	d
SUNXI_SPI2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_SPI2_BASE	/;"	d
SUNXI_SPI3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SPI3_BASE	/;"	d
SUNXI_SPI3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_SPI3_BASE	/;"	d
SUNXI_SPI3_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SPI3_BASE	/;"	d
SUNXI_SPI3_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_SPI3_BASE	/;"	d
SUNXI_SRAMC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAMC_BASE	/;"	d
SUNXI_SRAMC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAMC_BASE	/;"	d
SUNXI_SRAM_A1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_A1_BASE	/;"	d
SUNXI_SRAM_A1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_A1_BASE	/;"	d
SUNXI_SRAM_A1_SIZE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_A1_SIZE	/;"	d
SUNXI_SRAM_A1_SIZE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_A1_SIZE	/;"	d
SUNXI_SRAM_A2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_A2_BASE	/;"	d
SUNXI_SRAM_A2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_A2_BASE	/;"	d
SUNXI_SRAM_A3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_A3_BASE	/;"	d
SUNXI_SRAM_A3_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_A3_BASE	/;"	d
SUNXI_SRAM_A4_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_A4_BASE	/;"	d
SUNXI_SRAM_A4_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_A4_BASE	/;"	d
SUNXI_SRAM_B_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_B_BASE	/;"	d
SUNXI_SRAM_B_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_B_BASE	/;"	d
SUNXI_SRAM_C_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_C_BASE	/;"	d
SUNXI_SRAM_C_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_C_BASE	/;"	d
SUNXI_SRAM_D_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SRAM_D_BASE	/;"	d
SUNXI_SRAM_D_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_SRAM_D_BASE	/;"	d
SUNXI_SRAM_D_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SRAM_D_BASE	/;"	d
SUNXI_SRAM_D_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_SRAM_D_BASE	/;"	d
SUNXI_SS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SS_BASE	/;"	d
SUNXI_SS_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SS_BASE	/;"	d
SUNXI_SS_BOND_ID_A31	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SS_BOND_ID_A31	/;"	d
SUNXI_SS_BOND_ID_A31	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SS_BOND_ID_A31	/;"	d
SUNXI_SS_BOND_ID_A31S	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_SS_BOND_ID_A31S	/;"	d
SUNXI_SS_BOND_ID_A31S	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_SS_BOND_ID_A31S	/;"	d
SUNXI_TIMER_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TIMER_BASE	/;"	d
SUNXI_TIMER_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TIMER_BASE	/;"	d
SUNXI_TIMER_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TIMER_BASE	/;"	d
SUNXI_TIMER_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TIMER_BASE	/;"	d
SUNXI_TP_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TP_BASE	/;"	d
SUNXI_TP_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TP_BASE	/;"	d
SUNXI_TSC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TSC_BASE	/;"	d
SUNXI_TSC_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TSC_BASE	/;"	d
SUNXI_TS_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TS_BASE	/;"	d
SUNXI_TS_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TS_BASE	/;"	d
SUNXI_TVD_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TVD_BASE	/;"	d
SUNXI_TVD_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TVD_BASE	/;"	d
SUNXI_TVE0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TVE0_BASE	/;"	d
SUNXI_TVE0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TVE0_BASE	/;"	d
SUNXI_TVE1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TVE1_BASE	/;"	d
SUNXI_TVE1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TVE1_BASE	/;"	d
SUNXI_TVE_ACTIVE_NUM_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_ACTIVE_NUM_COMPOSITE	/;"	d
SUNXI_TVE_ACTIVE_NUM_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_ACTIVE_NUM_COMPOSITE	/;"	d
SUNXI_TVE_AUTO_DETECT_DEBOUNCE_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_DEBOUNCE_MASK(/;"	d
SUNXI_TVE_AUTO_DETECT_DEBOUNCE_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_DEBOUNCE_MASK(/;"	d
SUNXI_TVE_AUTO_DETECT_DEBOUNCE_SHIFT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_DEBOUNCE_SHIFT(/;"	d
SUNXI_TVE_AUTO_DETECT_DEBOUNCE_SHIFT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_DEBOUNCE_SHIFT(/;"	d
SUNXI_TVE_AUTO_DETECT_EN_DET_EN	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_EN_DET_EN(/;"	d
SUNXI_TVE_AUTO_DETECT_EN_DET_EN	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_EN_DET_EN(/;"	d
SUNXI_TVE_AUTO_DETECT_EN_INT_EN	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_EN_INT_EN(/;"	d
SUNXI_TVE_AUTO_DETECT_EN_INT_EN	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_EN_INT_EN(/;"	d
SUNXI_TVE_AUTO_DETECT_INT_STATUS	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_INT_STATUS(/;"	d
SUNXI_TVE_AUTO_DETECT_INT_STATUS	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_INT_STATUS(/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_CONNECTED	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_CONNECTED	/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_CONNECTED	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_CONNECTED	/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_MASK(/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_MASK(/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_NONE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_NONE	/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_NONE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_NONE	/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_SHIFT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_SHIFT(/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_SHIFT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_SHIFT(/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_SHORT_GND	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_SHORT_GND	/;"	d
SUNXI_TVE_AUTO_DETECT_STATUS_SHORT_GND	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_AUTO_DETECT_STATUS_SHORT_GND	/;"	d
SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC	/;"	d
SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC	/;"	d
SUNXI_TVE_BLANK_BLACK_LEVEL_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_BLANK_BLACK_LEVEL_PAL	/;"	d
SUNXI_TVE_BLANK_BLACK_LEVEL_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_BLANK_BLACK_LEVEL_PAL	/;"	d
SUNXI_TVE_BURST_PHASE_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_BURST_PHASE_NTSC	/;"	d
SUNXI_TVE_BURST_PHASE_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_BURST_PHASE_NTSC	/;"	d
SUNXI_TVE_BURST_WIDTH_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_BURST_WIDTH_COMPOSITE	/;"	d
SUNXI_TVE_BURST_WIDTH_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_BURST_WIDTH_COMPOSITE	/;"	d
SUNXI_TVE_CBR_LEVEL_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CBR_LEVEL_NTSC	/;"	d
SUNXI_TVE_CBR_LEVEL_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CBR_LEVEL_NTSC	/;"	d
SUNXI_TVE_CBR_LEVEL_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CBR_LEVEL_PAL	/;"	d
SUNXI_TVE_CBR_LEVEL_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CBR_LEVEL_PAL	/;"	d
SUNXI_TVE_CFG0_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CFG0_NTSC	/;"	d
SUNXI_TVE_CFG0_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CFG0_NTSC	/;"	d
SUNXI_TVE_CFG0_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CFG0_PAL	/;"	d
SUNXI_TVE_CFG0_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CFG0_PAL	/;"	d
SUNXI_TVE_CFG0_VGA	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CFG0_VGA	/;"	d
SUNXI_TVE_CFG0_VGA	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CFG0_VGA	/;"	d
SUNXI_TVE_CHROMA_BW_GAIN_COMP	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CHROMA_BW_GAIN_COMP	/;"	d
SUNXI_TVE_CHROMA_BW_GAIN_COMP	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CHROMA_BW_GAIN_COMP	/;"	d
SUNXI_TVE_CHROMA_FREQ_PAL_M	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CHROMA_FREQ_PAL_M	/;"	d
SUNXI_TVE_CHROMA_FREQ_PAL_M	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CHROMA_FREQ_PAL_M	/;"	d
SUNXI_TVE_CHROMA_FREQ_PAL_NC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CHROMA_FREQ_PAL_NC	/;"	d
SUNXI_TVE_CHROMA_FREQ_PAL_NC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CHROMA_FREQ_PAL_NC	/;"	d
SUNXI_TVE_COLOR_BURST_PAL_M	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_COLOR_BURST_PAL_M	/;"	d
SUNXI_TVE_COLOR_BURST_PAL_M	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_COLOR_BURST_PAL_M	/;"	d
SUNXI_TVE_CSC_REG0	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CSC_REG0	/;"	d
SUNXI_TVE_CSC_REG0	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CSC_REG0	/;"	d
SUNXI_TVE_CSC_REG0_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CSC_REG0_ENABLE	/;"	d
SUNXI_TVE_CSC_REG0_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CSC_REG0_ENABLE	/;"	d
SUNXI_TVE_CSC_REG1	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CSC_REG1	/;"	d
SUNXI_TVE_CSC_REG1	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CSC_REG1	/;"	d
SUNXI_TVE_CSC_REG2	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CSC_REG2	/;"	d
SUNXI_TVE_CSC_REG2	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CSC_REG2	/;"	d
SUNXI_TVE_CSC_REG3	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_CSC_REG3	/;"	d
SUNXI_TVE_CSC_REG3	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_CSC_REG3	/;"	d
SUNXI_TVE_DAC_CFG0_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_DAC_CFG0_COMPOSITE	/;"	d
SUNXI_TVE_DAC_CFG0_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_DAC_CFG0_COMPOSITE	/;"	d
SUNXI_TVE_DAC_CFG0_VGA	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_DAC_CFG0_VGA	/;"	d
SUNXI_TVE_DAC_CFG0_VGA	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_DAC_CFG0_VGA	/;"	d
SUNXI_TVE_FILTER_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_FILTER_COMPOSITE	/;"	d
SUNXI_TVE_FILTER_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_FILTER_COMPOSITE	/;"	d
SUNXI_TVE_GCTRL_DAC_INPUT	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_GCTRL_DAC_INPUT(/;"	d
SUNXI_TVE_GCTRL_DAC_INPUT	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_GCTRL_DAC_INPUT(/;"	d
SUNXI_TVE_GCTRL_DAC_INPUT_MASK	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_GCTRL_DAC_INPUT_MASK(/;"	d
SUNXI_TVE_GCTRL_DAC_INPUT_MASK	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_GCTRL_DAC_INPUT_MASK(/;"	d
SUNXI_TVE_GCTRL_ENABLE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_GCTRL_ENABLE	/;"	d
SUNXI_TVE_GCTRL_ENABLE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_GCTRL_ENABLE	/;"	d
SUNXI_TVE_LINE_NUM_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_LINE_NUM_NTSC	/;"	d
SUNXI_TVE_LINE_NUM_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_LINE_NUM_NTSC	/;"	d
SUNXI_TVE_LINE_NUM_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_LINE_NUM_PAL	/;"	d
SUNXI_TVE_LINE_NUM_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_LINE_NUM_PAL	/;"	d
SUNXI_TVE_NOTCH_WIDTH_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_NOTCH_WIDTH_COMPOSITE	/;"	d
SUNXI_TVE_NOTCH_WIDTH_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_NOTCH_WIDTH_COMPOSITE	/;"	d
SUNXI_TVE_PORCH_NUM_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_PORCH_NUM_NTSC	/;"	d
SUNXI_TVE_PORCH_NUM_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_PORCH_NUM_NTSC	/;"	d
SUNXI_TVE_PORCH_NUM_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_PORCH_NUM_PAL	/;"	d
SUNXI_TVE_PORCH_NUM_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_PORCH_NUM_PAL	/;"	d
SUNXI_TVE_RESYNC_NUM_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_RESYNC_NUM_NTSC	/;"	d
SUNXI_TVE_RESYNC_NUM_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_RESYNC_NUM_NTSC	/;"	d
SUNXI_TVE_RESYNC_NUM_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_RESYNC_NUM_PAL	/;"	d
SUNXI_TVE_RESYNC_NUM_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_RESYNC_NUM_PAL	/;"	d
SUNXI_TVE_SLAVE_PARA_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_SLAVE_PARA_COMPOSITE	/;"	d
SUNXI_TVE_SLAVE_PARA_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_SLAVE_PARA_COMPOSITE	/;"	d
SUNXI_TVE_SYNC_VBI_LEVEL_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_SYNC_VBI_LEVEL_NTSC	/;"	d
SUNXI_TVE_SYNC_VBI_LEVEL_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_SYNC_VBI_LEVEL_NTSC	/;"	d
SUNXI_TVE_UNKNOWN1_COMPOSITE	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_UNKNOWN1_COMPOSITE	/;"	d
SUNXI_TVE_UNKNOWN1_COMPOSITE	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_UNKNOWN1_COMPOSITE	/;"	d
SUNXI_TVE_UNKNOWN1_VGA	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_UNKNOWN1_VGA	/;"	d
SUNXI_TVE_UNKNOWN1_VGA	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_UNKNOWN1_VGA	/;"	d
SUNXI_TVE_UNKNOWN2_NTSC	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_UNKNOWN2_NTSC	/;"	d
SUNXI_TVE_UNKNOWN2_NTSC	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_UNKNOWN2_NTSC	/;"	d
SUNXI_TVE_UNKNOWN2_PAL	arch/arm/include/asm/arch-sunxi/display.h	/^#define SUNXI_TVE_UNKNOWN2_PAL	/;"	d
SUNXI_TVE_UNKNOWN2_PAL	arch/arm/include/asm/arch/display.h	/^#define SUNXI_TVE_UNKNOWN2_PAL	/;"	d
SUNXI_TWI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TWI0_BASE	/;"	d
SUNXI_TWI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TWI0_BASE	/;"	d
SUNXI_TWI0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TWI0_BASE	/;"	d
SUNXI_TWI0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TWI0_BASE	/;"	d
SUNXI_TWI1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TWI1_BASE	/;"	d
SUNXI_TWI1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TWI1_BASE	/;"	d
SUNXI_TWI1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TWI1_BASE	/;"	d
SUNXI_TWI1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TWI1_BASE	/;"	d
SUNXI_TWI2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TWI2_BASE	/;"	d
SUNXI_TWI2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TWI2_BASE	/;"	d
SUNXI_TWI2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TWI2_BASE	/;"	d
SUNXI_TWI2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TWI2_BASE	/;"	d
SUNXI_TWI3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TWI3_BASE	/;"	d
SUNXI_TWI3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TWI3_BASE	/;"	d
SUNXI_TWI3_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TWI3_BASE	/;"	d
SUNXI_TWI3_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TWI3_BASE	/;"	d
SUNXI_TWI4_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TWI4_BASE	/;"	d
SUNXI_TWI4_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_TWI4_BASE	/;"	d
SUNXI_TWI4_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TWI4_BASE	/;"	d
SUNXI_TWI4_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_TWI4_BASE	/;"	d
SUNXI_TZASC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TZASC_BASE	/;"	d
SUNXI_TZASC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TZASC_BASE	/;"	d
SUNXI_TZPC_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_TZPC_BASE	/;"	d
SUNXI_TZPC_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_TZPC_BASE	/;"	d
SUNXI_UART0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART0_BASE	/;"	d
SUNXI_UART0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_UART0_BASE	/;"	d
SUNXI_UART0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART0_BASE	/;"	d
SUNXI_UART0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_UART0_BASE	/;"	d
SUNXI_UART1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART1_BASE	/;"	d
SUNXI_UART1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_UART1_BASE	/;"	d
SUNXI_UART1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART1_BASE	/;"	d
SUNXI_UART1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_UART1_BASE	/;"	d
SUNXI_UART2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART2_BASE	/;"	d
SUNXI_UART2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_UART2_BASE	/;"	d
SUNXI_UART2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART2_BASE	/;"	d
SUNXI_UART2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_UART2_BASE	/;"	d
SUNXI_UART3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART3_BASE	/;"	d
SUNXI_UART3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_UART3_BASE	/;"	d
SUNXI_UART3_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART3_BASE	/;"	d
SUNXI_UART3_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_UART3_BASE	/;"	d
SUNXI_UART4_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART4_BASE	/;"	d
SUNXI_UART4_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_UART4_BASE	/;"	d
SUNXI_UART4_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART4_BASE	/;"	d
SUNXI_UART4_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_UART4_BASE	/;"	d
SUNXI_UART5_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART5_BASE	/;"	d
SUNXI_UART5_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_UART5_BASE	/;"	d
SUNXI_UART5_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART5_BASE	/;"	d
SUNXI_UART5_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_UART5_BASE	/;"	d
SUNXI_UART6_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART6_BASE	/;"	d
SUNXI_UART6_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART6_BASE	/;"	d
SUNXI_UART7_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_UART7_BASE	/;"	d
SUNXI_UART7_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_UART7_BASE	/;"	d
SUNXI_USB0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_USB0_BASE	/;"	d
SUNXI_USB0_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_USB0_BASE	/;"	d
SUNXI_USB1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_USB1_BASE	/;"	d
SUNXI_USB1_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_USB1_BASE	/;"	d
SUNXI_USB2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_USB2_BASE	/;"	d
SUNXI_USB2_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_USB2_BASE	/;"	d
SUNXI_USB3_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_USB3_BASE	/;"	d
SUNXI_USB3_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_USB3_BASE	/;"	d
SUNXI_USBEHCI0_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_USBEHCI0_BASE	/;"	d
SUNXI_USBEHCI0_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_USBEHCI0_BASE	/;"	d
SUNXI_USBEHCI1_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_USBEHCI1_BASE	/;"	d
SUNXI_USBEHCI1_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_USBEHCI1_BASE	/;"	d
SUNXI_USBEHCI2_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_USBEHCI2_BASE	/;"	d
SUNXI_USBEHCI2_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_USBEHCI2_BASE	/;"	d
SUNXI_USBOTG_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define SUNXI_USBOTG_BASE	/;"	d
SUNXI_USBOTG_BASE	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define SUNXI_USBOTG_BASE	/;"	d
SUNXI_USBPHY_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_USBPHY_BASE	/;"	d
SUNXI_USBPHY_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_USBPHY_BASE	/;"	d
SUNXI_USB_CSR	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_USB_CSR	/;"	d	file:
SUNXI_USB_PASSBY_EN	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_USB_PASSBY_EN	/;"	d	file:
SUNXI_USB_PMU_IRQ_ENABLE	arch/arm/mach-sunxi/usb_phy.c	/^#define SUNXI_USB_PMU_IRQ_ENABLE	/;"	d	file:
SUNXI_VE_BASE	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define SUNXI_VE_BASE	/;"	d
SUNXI_VE_BASE	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define SUNXI_VE_BASE	/;"	d
SUN_S1	include/ambapp_ids.h	/^#define SUN_S1 /;"	d
SUN_T1	include/ambapp_ids.h	/^#define SUN_T1 /;"	d
SUN_devices	cmd/ambapp.c	/^static ambapp_device_name SUN_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
SUPERBLOCK_SIZE	fs/ext4/ext4_common.h	/^#define SUPERBLOCK_SIZE	/;"	d
SUPERBLOCK_START	fs/ext4/ext4_common.h	/^#define SUPERBLOCK_START	/;"	d
SUPER_BANK_INTERLEAVING	include/configs/sbc8641d.h	/^#define SUPER_BANK_INTERLEAVING	/;"	d
SUPER_CCLK_DIVIDER	arch/arm/include/asm/arch-tegra/ap.h	/^#define SUPER_CCLK_DIVIDER	/;"	d
SUPER_CCLK_DIVIDER	arch/arm/mach-tegra/cpu.h	/^#define SUPER_CCLK_DIVIDER	/;"	d
SUPER_SCLK_DIVIDEND_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SUPER_SCLK_DIVIDEND_MASK	/;"	d
SUPER_SCLK_DIVIDEND_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SUPER_SCLK_DIVIDEND_SHIFT	/;"	d
SUPER_SCLK_DIVISOR_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SUPER_SCLK_DIVISOR_MASK	/;"	d
SUPER_SCLK_DIVISOR_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SUPER_SCLK_DIVISOR_SHIFT	/;"	d
SUPER_SCLK_ENB_MASK	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SUPER_SCLK_ENB_MASK	/;"	d
SUPER_SCLK_ENB_SHIFT	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define SUPER_SCLK_ENB_SHIFT	/;"	d
SUPER_STATE0	drivers/video/tegra124/sor.h	/^#define SUPER_STATE0	/;"	d
SUPER_STATE0_UPDATE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define SUPER_STATE0_UPDATE_DEFAULT_MASK	/;"	d
SUPER_STATE0_UPDATE_SHIFT	drivers/video/tegra124/sor.h	/^#define SUPER_STATE0_UPDATE_SHIFT	/;"	d
SUPER_STATE1	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1	/;"	d
SUPER_STATE1_ASY_HEAD_OP_AWAKE	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_HEAD_OP_AWAKE	/;"	d
SUPER_STATE1_ASY_HEAD_OP_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_HEAD_OP_DEFAULT_MASK	/;"	d
SUPER_STATE1_ASY_HEAD_OP_SHIFT	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_HEAD_OP_SHIFT	/;"	d
SUPER_STATE1_ASY_HEAD_OP_SLEEP	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_HEAD_OP_SLEEP	/;"	d
SUPER_STATE1_ASY_HEAD_OP_SNOOZE	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_HEAD_OP_SNOOZE	/;"	d
SUPER_STATE1_ASY_ORMODE_NORMAL	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_ORMODE_NORMAL	/;"	d
SUPER_STATE1_ASY_ORMODE_SAFE	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_ORMODE_SAFE	/;"	d
SUPER_STATE1_ASY_ORMODE_SHIFT	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ASY_ORMODE_SHIFT	/;"	d
SUPER_STATE1_ATTACHED_NO	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ATTACHED_NO	/;"	d
SUPER_STATE1_ATTACHED_SHIFT	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ATTACHED_SHIFT	/;"	d
SUPER_STATE1_ATTACHED_YES	drivers/video/tegra124/sor.h	/^#define SUPER_STATE1_ATTACHED_YES	/;"	d
SUPOERIO_CONF1	include/ns87308.h	/^#define SUPOERIO_CONF1 /;"	d
SUPOERIO_CONF2	include/ns87308.h	/^#define SUPOERIO_CONF2 /;"	d
SUPPLY_CONTROL1	drivers/power/tps6586x.c	/^	SUPPLY_CONTROL1		= 0x20,$/;"	e	enum:__anone1ef2c880103	file:
SUPPLY_CONTROL2	drivers/power/tps6586x.c	/^	SUPPLY_CONTROL2,$/;"	e	enum:__anone1ef2c880103	file:
SUPPORTED_10000baseKR_Full	include/linux/ethtool.h	/^#define SUPPORTED_10000baseKR_Full	/;"	d
SUPPORTED_10000baseKX4_Full	include/linux/ethtool.h	/^#define SUPPORTED_10000baseKX4_Full	/;"	d
SUPPORTED_10000baseR_FEC	include/linux/ethtool.h	/^#define SUPPORTED_10000baseR_FEC	/;"	d
SUPPORTED_10000baseT_Full	drivers/qe/uec_phy.h	/^#define SUPPORTED_10000baseT_Full	/;"	d
SUPPORTED_10000baseT_Full	include/linux/ethtool.h	/^#define SUPPORTED_10000baseT_Full	/;"	d
SUPPORTED_1000baseKX_Full	include/linux/ethtool.h	/^#define SUPPORTED_1000baseKX_Full	/;"	d
SUPPORTED_1000baseT_Full	drivers/qe/uec_phy.h	/^#define SUPPORTED_1000baseT_Full	/;"	d
SUPPORTED_1000baseT_Full	include/linux/ethtool.h	/^#define SUPPORTED_1000baseT_Full	/;"	d
SUPPORTED_1000baseT_Half	drivers/qe/uec_phy.h	/^#define SUPPORTED_1000baseT_Half	/;"	d
SUPPORTED_1000baseT_Half	include/linux/ethtool.h	/^#define SUPPORTED_1000baseT_Half	/;"	d
SUPPORTED_1000baseX_Full	include/linux/ethtool.h	/^#define SUPPORTED_1000baseX_Full	/;"	d
SUPPORTED_1000baseX_Half	include/linux/ethtool.h	/^#define SUPPORTED_1000baseX_Half	/;"	d
SUPPORTED_100baseT_Full	drivers/qe/uec_phy.h	/^#define SUPPORTED_100baseT_Full	/;"	d
SUPPORTED_100baseT_Full	include/linux/ethtool.h	/^#define SUPPORTED_100baseT_Full	/;"	d
SUPPORTED_100baseT_Half	drivers/qe/uec_phy.h	/^#define SUPPORTED_100baseT_Half	/;"	d
SUPPORTED_100baseT_Half	include/linux/ethtool.h	/^#define SUPPORTED_100baseT_Half	/;"	d
SUPPORTED_10baseT_Full	drivers/qe/uec_phy.h	/^#define SUPPORTED_10baseT_Full	/;"	d
SUPPORTED_10baseT_Full	include/linux/ethtool.h	/^#define SUPPORTED_10baseT_Full	/;"	d
SUPPORTED_10baseT_Half	drivers/qe/uec_phy.h	/^#define SUPPORTED_10baseT_Half	/;"	d
SUPPORTED_10baseT_Half	include/linux/ethtool.h	/^#define SUPPORTED_10baseT_Half	/;"	d
SUPPORTED_2500baseX_Full	include/linux/ethtool.h	/^#define SUPPORTED_2500baseX_Full	/;"	d
SUPPORTED_AUI	drivers/qe/uec_phy.h	/^#define SUPPORTED_AUI	/;"	d
SUPPORTED_AUI	include/linux/ethtool.h	/^#define SUPPORTED_AUI	/;"	d
SUPPORTED_Asym_Pause	include/linux/ethtool.h	/^#define SUPPORTED_Asym_Pause	/;"	d
SUPPORTED_Autoneg	drivers/qe/uec_phy.h	/^#define SUPPORTED_Autoneg	/;"	d
SUPPORTED_Autoneg	include/linux/ethtool.h	/^#define SUPPORTED_Autoneg	/;"	d
SUPPORTED_BNC	drivers/qe/uec_phy.h	/^#define SUPPORTED_BNC	/;"	d
SUPPORTED_BNC	include/linux/ethtool.h	/^#define SUPPORTED_BNC	/;"	d
SUPPORTED_Backplane	include/linux/ethtool.h	/^#define SUPPORTED_Backplane	/;"	d
SUPPORTED_FIBRE	drivers/qe/uec_phy.h	/^#define SUPPORTED_FIBRE	/;"	d
SUPPORTED_FIBRE	include/linux/ethtool.h	/^#define SUPPORTED_FIBRE	/;"	d
SUPPORTED_FLAGS	drivers/i2c/tegra186_bpmp_i2c.c	/^#define SUPPORTED_FLAGS /;"	d	file:
SUPPORTED_MII	drivers/qe/uec_phy.h	/^#define SUPPORTED_MII	/;"	d
SUPPORTED_MII	include/linux/ethtool.h	/^#define SUPPORTED_MII	/;"	d
SUPPORTED_Pause	include/linux/ethtool.h	/^#define SUPPORTED_Pause	/;"	d
SUPPORTED_TP	drivers/qe/uec_phy.h	/^#define SUPPORTED_TP	/;"	d
SUPPORTED_TP	include/linux/ethtool.h	/^#define SUPPORTED_TP	/;"	d
SUPPORTS_BIG_ENDIAN	arch/mips/Kconfig	/^config SUPPORTS_BIG_ENDIAN$/;"	c	menu:MIPS architecture
SUPPORTS_CPU_MIPS32_R1	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R1$/;"	c	menu:MIPS architecture
SUPPORTS_CPU_MIPS32_R2	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R2$/;"	c	menu:MIPS architecture
SUPPORTS_CPU_MIPS32_R6	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS32_R6$/;"	c	menu:MIPS architecture
SUPPORTS_CPU_MIPS64_R1	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R1$/;"	c	menu:MIPS architecture
SUPPORTS_CPU_MIPS64_R2	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R2$/;"	c	menu:MIPS architecture
SUPPORTS_CPU_MIPS64_R6	arch/mips/Kconfig	/^config SUPPORTS_CPU_MIPS64_R6$/;"	c	menu:MIPS architecture
SUPPORTS_LITTLE_ENDIAN	arch/mips/Kconfig	/^config SUPPORTS_LITTLE_ENDIAN$/;"	c	menu:MIPS architecture
SUPPORT_8BITECC	drivers/mtd/nand/denali.c	/^#define SUPPORT_8BITECC	/;"	d	file:
SUPPORT_OF_CONTROL	dts/Kconfig	/^config SUPPORT_OF_CONTROL$/;"	c
SUPPORT_SPL	common/spl/Kconfig	/^config SUPPORT_SPL$/;"	c	menu:SPL / TPL
SUPPORT_TPL	common/spl/Kconfig	/^config SUPPORT_TPL$/;"	c	menu:SPL / TPL
SUPP_SPEED	drivers/net/lpc32xx_eth.c	/^#define SUPP_SPEED /;"	d	file:
SUP_POW2PS	drivers/mtd/spi/sf_dataflash.c	/^#define SUP_POW2PS	/;"	d	file:
SUREQ	drivers/usb/host/r8a66597.h	/^#define	SUREQ	/;"	d
SUREQCLR	drivers/usb/host/r8a66597.h	/^#define	SUREQCLR	/;"	d
SURFACE0_INFO	include/radeon.h	/^#define SURFACE0_INFO	/;"	d
SURFACE0_LOWER_BOUND	include/radeon.h	/^#define SURFACE0_LOWER_BOUND	/;"	d
SURFACE0_UPPER_BOUND	include/radeon.h	/^#define SURFACE0_UPPER_BOUND	/;"	d
SURFACE1_INFO	include/radeon.h	/^#define SURFACE1_INFO	/;"	d
SURFACE1_LOWER_BOUND	include/radeon.h	/^#define SURFACE1_LOWER_BOUND	/;"	d
SURFACE1_UPPER_BOUND	include/radeon.h	/^#define SURFACE1_UPPER_BOUND	/;"	d
SURFACE2_INFO	include/radeon.h	/^#define SURFACE2_INFO	/;"	d
SURFACE2_LOWER_BOUND	include/radeon.h	/^#define SURFACE2_LOWER_BOUND	/;"	d
SURFACE2_UPPER_BOUND	include/radeon.h	/^#define SURFACE2_UPPER_BOUND	/;"	d
SURFACE3_INFO	include/radeon.h	/^#define SURFACE3_INFO	/;"	d
SURFACE3_LOWER_BOUND	include/radeon.h	/^#define SURFACE3_LOWER_BOUND	/;"	d
SURFACE3_UPPER_BOUND	include/radeon.h	/^#define SURFACE3_UPPER_BOUND	/;"	d
SURFACE4_INFO	include/radeon.h	/^#define SURFACE4_INFO	/;"	d
SURFACE4_LOWER_BOUND	include/radeon.h	/^#define SURFACE4_LOWER_BOUND	/;"	d
SURFACE4_UPPER_BOUND	include/radeon.h	/^#define SURFACE4_UPPER_BOUND	/;"	d
SURFACE5_INFO	include/radeon.h	/^#define SURFACE5_INFO	/;"	d
SURFACE5_LOWER_BOUND	include/radeon.h	/^#define SURFACE5_LOWER_BOUND	/;"	d
SURFACE5_UPPER_BOUND	include/radeon.h	/^#define SURFACE5_UPPER_BOUND	/;"	d
SURFACE6_INFO	include/radeon.h	/^#define SURFACE6_INFO	/;"	d
SURFACE6_LOWER_BOUND	include/radeon.h	/^#define SURFACE6_LOWER_BOUND	/;"	d
SURFACE6_UPPER_BOUND	include/radeon.h	/^#define SURFACE6_UPPER_BOUND	/;"	d
SURFACE7_INFO	include/radeon.h	/^#define SURFACE7_INFO	/;"	d
SURFACE7_LOWER_BOUND	include/radeon.h	/^#define SURFACE7_LOWER_BOUND	/;"	d
SURFACE7_UPPER_BOUND	include/radeon.h	/^#define SURFACE7_UPPER_BOUND	/;"	d
SURFACE_ACCESS_CLR	include/radeon.h	/^#define SURFACE_ACCESS_CLR	/;"	d
SURFACE_ACCESS_FLAGS	include/radeon.h	/^#define SURFACE_ACCESS_FLAGS	/;"	d
SURFACE_CNTL	include/radeon.h	/^#define SURFACE_CNTL	/;"	d
SURF_TRANSLATION_DIS	include/radeon.h	/^#define SURF_TRANSLATION_DIS	/;"	d
SURF_UPPER_BOUND	drivers/video/ati_radeon_fb.c	/^#define SURF_UPPER_BOUND(/;"	d	file:
SUSPEND_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SUSPEND_B	/;"	d
SUSPEND_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SUSPEND_BE	/;"	d
SUSPEND_BOOT	include/twl6030.h	/^#define SUSPEND_BOOT	/;"	d
SUSPEND_MAGIC_WORD	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define SUSPEND_MAGIC_WORD	/;"	d
SUSPEND_MAGIC_WORD	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define SUSPEND_MAGIC_WORD	/;"	d
SUSPEND_MODE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define SUSPEND_MODE	/;"	d
SUSPEND_PORT_FOR_TRB	drivers/usb/host/xhci.h	/^#define SUSPEND_PORT_FOR_TRB(/;"	d
SUSPEND_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define SUSPEND_SPDWN_EN	/;"	d
SUSPEND_WAKEUP_DISABLED	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	SUSPEND_WAKEUP_DISABLED,$/;"	e	enum:suspend_wakeup_status
SUSPEND_WAKEUP_ENABLED	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	SUSPEND_WAKEUP_ENABLED,$/;"	e	enum:suspend_wakeup_status
SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED,$/;"	e	enum:suspend_wakeup_status
SUS_PWR_FLR	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  SUS_PWR_FLR	/;"	d
SUS_PWR_FLR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  SUS_PWR_FLR	/;"	d
SUS_S3_OUT	board/advantech/dms-ba16/dms-ba16.c	/^#define SUS_S3_OUT	/;"	d	file:
SUS_S3_OUT	board/ge/bx50v3/bx50v3.c	/^#define SUS_S3_OUT	/;"	d	file:
SU_MODE	arch/nds32/include/asm/ptrace.h	/^#define SU_MODE	/;"	d
SVC26_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define SVC26_MODE	/;"	d
SVC_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define SVC_MODE	/;"	d
SVR	arch/powerpc/include/asm/processor.h	/^#define SVR	/;"	d
SVR_8533	arch/powerpc/include/asm/processor.h	/^#define SVR_8533	/;"	d
SVR_8535	arch/powerpc/include/asm/processor.h	/^#define SVR_8535	/;"	d
SVR_8536	arch/powerpc/include/asm/processor.h	/^#define SVR_8536	/;"	d
SVR_8540	arch/powerpc/include/asm/processor.h	/^#define SVR_8540	/;"	d
SVR_8541	arch/powerpc/include/asm/processor.h	/^#define SVR_8541	/;"	d
SVR_8543	arch/powerpc/include/asm/processor.h	/^#define SVR_8543	/;"	d
SVR_8544	arch/powerpc/include/asm/processor.h	/^#define SVR_8544	/;"	d
SVR_8545	arch/powerpc/include/asm/processor.h	/^#define SVR_8545	/;"	d
SVR_8547	arch/powerpc/include/asm/processor.h	/^#define SVR_8547	/;"	d
SVR_8548	arch/powerpc/include/asm/processor.h	/^#define SVR_8548	/;"	d
SVR_8555	arch/powerpc/include/asm/processor.h	/^#define SVR_8555	/;"	d
SVR_8560	arch/powerpc/include/asm/processor.h	/^#define SVR_8560	/;"	d
SVR_8567	arch/powerpc/include/asm/processor.h	/^#define SVR_8567	/;"	d
SVR_8568	arch/powerpc/include/asm/processor.h	/^#define SVR_8568	/;"	d
SVR_8569	arch/powerpc/include/asm/processor.h	/^#define SVR_8569	/;"	d
SVR_8572	arch/powerpc/include/asm/processor.h	/^#define SVR_8572	/;"	d
SVR_8610	arch/powerpc/include/asm/processor.h	/^#define SVR_8610	/;"	d
SVR_8641	arch/powerpc/include/asm/processor.h	/^#define SVR_8641	/;"	d
SVR_8641D	arch/powerpc/include/asm/processor.h	/^#define SVR_8641D	/;"	d
SVR_9130	arch/powerpc/include/asm/processor.h	/^#define SVR_9130	/;"	d
SVR_9131	arch/powerpc/include/asm/processor.h	/^#define SVR_9131	/;"	d
SVR_9132	arch/powerpc/include/asm/processor.h	/^#define SVR_9132	/;"	d
SVR_9232	arch/powerpc/include/asm/processor.h	/^#define SVR_9232	/;"	d
SVR_B4220	arch/powerpc/include/asm/processor.h	/^#define SVR_B4220	/;"	d
SVR_B4420	arch/powerpc/include/asm/processor.h	/^#define SVR_B4420	/;"	d
SVR_B4440	arch/powerpc/include/asm/processor.h	/^#define SVR_B4440	/;"	d
SVR_B4460	arch/powerpc/include/asm/processor.h	/^#define SVR_B4460	/;"	d
SVR_B4860	arch/powerpc/include/asm/processor.h	/^#define SVR_B4860	/;"	d
SVR_C291	arch/powerpc/include/asm/processor.h	/^#define SVR_C291	/;"	d
SVR_C292	arch/powerpc/include/asm/processor.h	/^#define SVR_C292	/;"	d
SVR_C293	arch/powerpc/include/asm/processor.h	/^#define SVR_C293	/;"	d
SVR_CID	arch/powerpc/include/asm/processor.h	/^#define SVR_CID(/;"	d
SVR_FAM	arch/powerpc/include/asm/processor.h	/^#define SVR_FAM(/;"	d
SVR_G4440	arch/powerpc/include/asm/processor.h	/^#define SVR_G4440	/;"	d
SVR_G4860	arch/powerpc/include/asm/processor.h	/^#define SVR_G4860	/;"	d
SVR_LS1012A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS1012A	/;"	d
SVR_LS1023A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS1023A	/;"	d
SVR_LS1026A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS1026A	/;"	d
SVR_LS1043A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS1043A	/;"	d
SVR_LS1046A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS1046A	/;"	d
SVR_LS2040A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS2040A	/;"	d
SVR_LS2045A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS2045A	/;"	d
SVR_LS2080A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS2080A	/;"	d
SVR_LS2085A	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_LS2085A	/;"	d
SVR_MAJ	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_MAJ(/;"	d
SVR_MAJ	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SVR_MAJ(/;"	d
SVR_MAJ	arch/powerpc/include/asm/processor.h	/^#define SVR_MAJ(/;"	d
SVR_MEM	arch/powerpc/include/asm/processor.h	/^#define SVR_MEM(/;"	d
SVR_MFG	arch/powerpc/include/asm/processor.h	/^#define SVR_MFG(/;"	d
SVR_MIN	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_MIN(/;"	d
SVR_MIN	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SVR_MIN(/;"	d
SVR_MIN	arch/powerpc/include/asm/processor.h	/^#define SVR_MIN(/;"	d
SVR_MJREV	arch/powerpc/include/asm/processor.h	/^#define SVR_MJREV(/;"	d
SVR_MNREV	arch/powerpc/include/asm/processor.h	/^#define SVR_MNREV(/;"	d
SVR_P1010	arch/powerpc/include/asm/processor.h	/^#define SVR_P1010	/;"	d
SVR_P1011	arch/powerpc/include/asm/processor.h	/^#define SVR_P1011	/;"	d
SVR_P1012	arch/powerpc/include/asm/processor.h	/^#define SVR_P1012	/;"	d
SVR_P1013	arch/powerpc/include/asm/processor.h	/^#define SVR_P1013	/;"	d
SVR_P1014	arch/powerpc/include/asm/processor.h	/^#define SVR_P1014	/;"	d
SVR_P1017	arch/powerpc/include/asm/processor.h	/^#define SVR_P1017	/;"	d
SVR_P1020	arch/powerpc/include/asm/processor.h	/^#define SVR_P1020	/;"	d
SVR_P1021	arch/powerpc/include/asm/processor.h	/^#define SVR_P1021	/;"	d
SVR_P1022	arch/powerpc/include/asm/processor.h	/^#define SVR_P1022	/;"	d
SVR_P1023	arch/powerpc/include/asm/processor.h	/^#define SVR_P1023	/;"	d
SVR_P1024	arch/powerpc/include/asm/processor.h	/^#define SVR_P1024	/;"	d
SVR_P1025	arch/powerpc/include/asm/processor.h	/^#define SVR_P1025	/;"	d
SVR_P2010	arch/powerpc/include/asm/processor.h	/^#define SVR_P2010	/;"	d
SVR_P2020	arch/powerpc/include/asm/processor.h	/^#define SVR_P2020	/;"	d
SVR_P2040	arch/powerpc/include/asm/processor.h	/^#define SVR_P2040	/;"	d
SVR_P2041	arch/powerpc/include/asm/processor.h	/^#define SVR_P2041	/;"	d
SVR_P3041	arch/powerpc/include/asm/processor.h	/^#define SVR_P3041	/;"	d
SVR_P4040	arch/powerpc/include/asm/processor.h	/^#define SVR_P4040	/;"	d
SVR_P4080	arch/powerpc/include/asm/processor.h	/^#define SVR_P4080	/;"	d
SVR_P5010	arch/powerpc/include/asm/processor.h	/^#define SVR_P5010	/;"	d
SVR_P5020	arch/powerpc/include/asm/processor.h	/^#define SVR_P5020	/;"	d
SVR_P5021	arch/powerpc/include/asm/processor.h	/^#define SVR_P5021	/;"	d
SVR_P5040	arch/powerpc/include/asm/processor.h	/^#define SVR_P5040	/;"	d
SVR_PROC	arch/powerpc/include/asm/processor.h	/^#define SVR_PROC(/;"	d
SVR_REV	arch/powerpc/include/asm/processor.h	/^#define SVR_REV(/;"	d
SVR_SID	arch/powerpc/include/asm/processor.h	/^#define SVR_SID(/;"	d
SVR_SOCOP	arch/powerpc/include/asm/processor.h	/^#define SVR_SOCOP(/;"	d
SVR_SOC_VER	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_SOC_VER(/;"	d
SVR_SOC_VER	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SVR_SOC_VER(/;"	d
SVR_SOC_VER	arch/powerpc/include/asm/processor.h	/^#define SVR_SOC_VER(/;"	d
SVR_SUBVER	arch/powerpc/include/asm/processor.h	/^#define SVR_SUBVER(/;"	d
SVR_T1013	arch/powerpc/include/asm/processor.h	/^#define SVR_T1013	/;"	d
SVR_T1014	arch/powerpc/include/asm/processor.h	/^#define SVR_T1014	/;"	d
SVR_T1020	arch/powerpc/include/asm/processor.h	/^#define SVR_T1020	/;"	d
SVR_T1021	arch/powerpc/include/asm/processor.h	/^#define SVR_T1021	/;"	d
SVR_T1022	arch/powerpc/include/asm/processor.h	/^#define SVR_T1022	/;"	d
SVR_T1023	arch/powerpc/include/asm/processor.h	/^#define SVR_T1023	/;"	d
SVR_T1024	arch/powerpc/include/asm/processor.h	/^#define SVR_T1024	/;"	d
SVR_T1040	arch/powerpc/include/asm/processor.h	/^#define SVR_T1040	/;"	d
SVR_T1041	arch/powerpc/include/asm/processor.h	/^#define SVR_T1041	/;"	d
SVR_T1042	arch/powerpc/include/asm/processor.h	/^#define SVR_T1042	/;"	d
SVR_T2080	arch/powerpc/include/asm/processor.h	/^#define SVR_T2080	/;"	d
SVR_T2081	arch/powerpc/include/asm/processor.h	/^#define SVR_T2081	/;"	d
SVR_T4080	arch/powerpc/include/asm/processor.h	/^#define SVR_T4080	/;"	d
SVR_T4120	arch/powerpc/include/asm/processor.h	/^#define SVR_T4120	/;"	d
SVR_T4160	arch/powerpc/include/asm/processor.h	/^#define SVR_T4160	/;"	d
SVR_T4240	arch/powerpc/include/asm/processor.h	/^#define SVR_T4240	/;"	d
SVR_Unknown	arch/powerpc/include/asm/processor.h	/^#define SVR_Unknown	/;"	d
SVR_VER	arch/powerpc/include/asm/processor.h	/^#define SVR_VER(/;"	d
SVR_WO_E	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define SVR_WO_E	/;"	d
SW1_CNTRL	include/power/max77696_pmic.h	/^	SW1_CNTRL,$/;"	e	enum:__anoncca498ab0103
SW1xCONF_DVSSPEED_16US	include/power/pfuze100_pmic.h	/^#define SW1xCONF_DVSSPEED_16US /;"	d
SW1xCONF_DVSSPEED_2US	include/power/pfuze100_pmic.h	/^#define SW1xCONF_DVSSPEED_2US /;"	d
SW1xCONF_DVSSPEED_4US	include/power/pfuze100_pmic.h	/^#define SW1xCONF_DVSSPEED_4US /;"	d
SW1xCONF_DVSSPEED_8US	include/power/pfuze100_pmic.h	/^#define SW1xCONF_DVSSPEED_8US /;"	d
SW1xCONF_DVSSPEED_MASK	include/power/pfuze100_pmic.h	/^#define SW1xCONF_DVSSPEED_MASK /;"	d
SW1x_0_300V	include/power/pfuze100_pmic.h	/^#define SW1x_0_300V /;"	d
SW1x_0_325V	include/power/pfuze100_pmic.h	/^#define SW1x_0_325V /;"	d
SW1x_0_350V	include/power/pfuze100_pmic.h	/^#define SW1x_0_350V /;"	d
SW1x_0_375V	include/power/pfuze100_pmic.h	/^#define SW1x_0_375V /;"	d
SW1x_0_400V	include/power/pfuze100_pmic.h	/^#define SW1x_0_400V /;"	d
SW1x_0_425V	include/power/pfuze100_pmic.h	/^#define SW1x_0_425V /;"	d
SW1x_0_450V	include/power/pfuze100_pmic.h	/^#define SW1x_0_450V /;"	d
SW1x_0_475V	include/power/pfuze100_pmic.h	/^#define SW1x_0_475V /;"	d
SW1x_0_500V	include/power/pfuze100_pmic.h	/^#define SW1x_0_500V /;"	d
SW1x_0_525V	include/power/pfuze100_pmic.h	/^#define SW1x_0_525V /;"	d
SW1x_0_550V	include/power/pfuze100_pmic.h	/^#define SW1x_0_550V /;"	d
SW1x_0_575V	include/power/pfuze100_pmic.h	/^#define SW1x_0_575V /;"	d
SW1x_0_600V	include/power/pfuze100_pmic.h	/^#define SW1x_0_600V /;"	d
SW1x_0_625V	include/power/pfuze100_pmic.h	/^#define SW1x_0_625V /;"	d
SW1x_0_650V	include/power/pfuze100_pmic.h	/^#define SW1x_0_650V /;"	d
SW1x_0_675V	include/power/pfuze100_pmic.h	/^#define SW1x_0_675V /;"	d
SW1x_0_700V	include/power/pfuze100_pmic.h	/^#define SW1x_0_700V /;"	d
SW1x_0_725V	include/power/pfuze100_pmic.h	/^#define SW1x_0_725V /;"	d
SW1x_0_750V	include/power/pfuze100_pmic.h	/^#define SW1x_0_750V /;"	d
SW1x_0_775V	include/power/pfuze100_pmic.h	/^#define SW1x_0_775V /;"	d
SW1x_0_800V	include/power/pfuze100_pmic.h	/^#define SW1x_0_800V /;"	d
SW1x_0_825V	include/power/pfuze100_pmic.h	/^#define SW1x_0_825V /;"	d
SW1x_0_850V	include/power/pfuze100_pmic.h	/^#define SW1x_0_850V /;"	d
SW1x_0_875V	include/power/pfuze100_pmic.h	/^#define SW1x_0_875V /;"	d
SW1x_0_900V	include/power/pfuze100_pmic.h	/^#define SW1x_0_900V /;"	d
SW1x_0_925V	include/power/pfuze100_pmic.h	/^#define SW1x_0_925V /;"	d
SW1x_0_950V	include/power/pfuze100_pmic.h	/^#define SW1x_0_950V /;"	d
SW1x_0_975V	include/power/pfuze100_pmic.h	/^#define SW1x_0_975V /;"	d
SW1x_1_000V	include/power/pfuze100_pmic.h	/^#define SW1x_1_000V /;"	d
SW1x_1_025V	include/power/pfuze100_pmic.h	/^#define SW1x_1_025V /;"	d
SW1x_1_050V	include/power/pfuze100_pmic.h	/^#define SW1x_1_050V /;"	d
SW1x_1_075V	include/power/pfuze100_pmic.h	/^#define SW1x_1_075V /;"	d
SW1x_1_100V	include/power/pfuze100_pmic.h	/^#define SW1x_1_100V /;"	d
SW1x_1_125V	include/power/pfuze100_pmic.h	/^#define SW1x_1_125V /;"	d
SW1x_1_150V	include/power/pfuze100_pmic.h	/^#define SW1x_1_150V /;"	d
SW1x_1_175V	include/power/pfuze100_pmic.h	/^#define SW1x_1_175V /;"	d
SW1x_1_200V	include/power/pfuze100_pmic.h	/^#define SW1x_1_200V /;"	d
SW1x_1_225V	include/power/pfuze100_pmic.h	/^#define SW1x_1_225V /;"	d
SW1x_1_250V	include/power/pfuze100_pmic.h	/^#define SW1x_1_250V /;"	d
SW1x_1_275V	include/power/pfuze100_pmic.h	/^#define SW1x_1_275V /;"	d
SW1x_1_300V	include/power/pfuze100_pmic.h	/^#define SW1x_1_300V /;"	d
SW1x_1_325V	include/power/pfuze100_pmic.h	/^#define SW1x_1_325V /;"	d
SW1x_1_350V	include/power/pfuze100_pmic.h	/^#define SW1x_1_350V /;"	d
SW1x_1_375V	include/power/pfuze100_pmic.h	/^#define SW1x_1_375V /;"	d
SW1x_1_400V	include/power/pfuze100_pmic.h	/^#define SW1x_1_400V /;"	d
SW1x_1_425V	include/power/pfuze100_pmic.h	/^#define SW1x_1_425V /;"	d
SW1x_1_450V	include/power/pfuze100_pmic.h	/^#define SW1x_1_450V /;"	d
SW1x_1_475V	include/power/pfuze100_pmic.h	/^#define SW1x_1_475V /;"	d
SW1x_1_500V	include/power/pfuze100_pmic.h	/^#define SW1x_1_500V /;"	d
SW1x_1_525V	include/power/pfuze100_pmic.h	/^#define SW1x_1_525V /;"	d
SW1x_1_550V	include/power/pfuze100_pmic.h	/^#define SW1x_1_550V /;"	d
SW1x_1_575V	include/power/pfuze100_pmic.h	/^#define SW1x_1_575V /;"	d
SW1x_1_600V	include/power/pfuze100_pmic.h	/^#define SW1x_1_600V /;"	d
SW1x_1_625V	include/power/pfuze100_pmic.h	/^#define SW1x_1_625V /;"	d
SW1x_1_650V	include/power/pfuze100_pmic.h	/^#define SW1x_1_650V /;"	d
SW1x_1_675V	include/power/pfuze100_pmic.h	/^#define SW1x_1_675V /;"	d
SW1x_1_700V	include/power/pfuze100_pmic.h	/^#define SW1x_1_700V /;"	d
SW1x_1_725V	include/power/pfuze100_pmic.h	/^#define SW1x_1_725V /;"	d
SW1x_1_750V	include/power/pfuze100_pmic.h	/^#define SW1x_1_750V /;"	d
SW1x_1_775V	include/power/pfuze100_pmic.h	/^#define SW1x_1_775V /;"	d
SW1x_1_800V	include/power/pfuze100_pmic.h	/^#define SW1x_1_800V /;"	d
SW1x_1_825V	include/power/pfuze100_pmic.h	/^#define SW1x_1_825V /;"	d
SW1x_1_850V	include/power/pfuze100_pmic.h	/^#define SW1x_1_850V /;"	d
SW1x_1_875V	include/power/pfuze100_pmic.h	/^#define SW1x_1_875V /;"	d
SW1x_NORMAL_MASK	include/power/pfuze100_pmic.h	/^#define SW1x_NORMAL_MASK /;"	d
SW1x_OFF_MASK	include/power/pfuze100_pmic.h	/^#define SW1x_OFF_MASK /;"	d
SW1x_STBY_MASK	include/power/pfuze100_pmic.h	/^#define SW1x_STBY_MASK /;"	d
SW2_CNTRL	include/power/max77696_pmic.h	/^	SW2_CNTRL,$/;"	e	enum:__anoncca498ab0103
SW3_CNTRL	include/power/max77696_pmic.h	/^	SW3_CNTRL,$/;"	e	enum:__anoncca498ab0103
SW4_CNTRL	include/power/max77696_pmic.h	/^	SW4_CNTRL,$/;"	e	enum:__anoncca498ab0103
SWAB7206	drivers/net/smc91111.h	/^#define SWAB7206(/;"	d
SWAP16	drivers/video/cfb_console.c	/^#define SWAP16(/;"	d	file:
SWAP32	drivers/video/cfb_console.c	/^#define SWAP32(/;"	d	file:
SWAPCHAR	arch/powerpc/cpu/mpc8xx/video.c	/^#define SWAPCHAR(/;"	d	file:
SWAPEN	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define SWAPEN /;"	d
SWAPINIT	fs/yaffs2/yaffs_qsort.c	/^#define SWAPINIT(/;"	d	file:
SWAPINT	arch/powerpc/cpu/mpc8xx/video.c	/^#define SWAPINT(/;"	d	file:
SWAPSHORT	arch/powerpc/cpu/mpc8xx/video.c	/^#define SWAPSHORT(/;"	d	file:
SWAP_DONE	drivers/fpga/zynqmppl.c	/^#define SWAP_DONE	/;"	d	file:
SWAP_DONE	drivers/fpga/zynqpl.c	/^#define SWAP_DONE	/;"	d	file:
SWAP_IO_SPACE	arch/mips/Kconfig	/^config SWAP_IO_SPACE$/;"	c	menu:MIPS architecture
SWAP_LONG	board/esd/common/lcd.h	/^#define SWAP_LONG(/;"	d
SWAP_NO	drivers/fpga/zynqmppl.c	/^#define SWAP_NO	/;"	d	file:
SWAP_NO	drivers/fpga/zynqpl.c	/^#define SWAP_NO	/;"	d	file:
SWAP_SHORT	board/esd/common/lcd.h	/^#define SWAP_SHORT(/;"	d
SWAR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SWAR1	/;"	d
SWAR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SWAR2	/;"	d
SWBST_5_00V	include/power/pfuze100_pmic.h	/^#define SWBST_5_00V	/;"	d
SWBST_5_05V	include/power/pfuze100_pmic.h	/^#define SWBST_5_05V	/;"	d
SWBST_5_10V	include/power/pfuze100_pmic.h	/^#define SWBST_5_10V	/;"	d
SWBST_5_15V	include/power/pfuze100_pmic.h	/^#define SWBST_5_15V	/;"	d
SWBST_AUTO	include/fsl_pmic.h	/^#define SWBST_AUTO	/;"	d
SWBST_CTRL	include/fsl_pmic.h	/^#define SWBST_CTRL	/;"	d
SWBST_MODE_APS	include/power/pfuze100_pmic.h	/^#define SWBST_MODE_APS	/;"	d
SWBST_MODE_AUTO	include/power/pfuze100_pmic.h	/^#define SWBST_MODE_AUTO	/;"	d
SWBST_MODE_MASK	include/power/pfuze100_pmic.h	/^#define SWBST_MODE_MASK	/;"	d
SWBST_MODE_OFF	include/power/pfuze100_pmic.h	/^#define SWBST_MODE_OFF	/;"	d
SWBST_MODE_PFM	include/power/pfuze100_pmic.h	/^#define SWBST_MODE_PFM	/;"	d
SWBST_MODE_SHIFT	include/power/pfuze100_pmic.h	/^#define SWBST_MODE_SHIFT /;"	d
SWBST_VOL_MASK	include/power/pfuze100_pmic.h	/^#define SWBST_VOL_MASK	/;"	d
SWCNR	include/mpc83xx.h	/^#define SWCNR	/;"	d
SWCNR_RES	include/mpc83xx.h	/^#define SWCNR_RES	/;"	d
SWCNR_SWCN	include/mpc83xx.h	/^#define SWCNR_SWCN	/;"	d
SWCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SWCR	/;"	d
SWCRR	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define SWCRR	/;"	d
SWCRR	include/mpc83xx.h	/^#define SWCRR	/;"	d
SWCRR_RES	include/mpc83xx.h	/^#define SWCRR_RES	/;"	d
SWCRR_SWEN	include/mpc83xx.h	/^#define SWCRR_SWEN	/;"	d
SWCRR_SWPR	include/mpc83xx.h	/^#define SWCRR_SWPR	/;"	d
SWCRR_SWRI	include/mpc83xx.h	/^#define SWCRR_SWRI	/;"	d
SWCRR_SWTC	include/mpc83xx.h	/^#define SWCRR_SWTC	/;"	d
SWDPIO_SHIFT	drivers/net/e1000.h	/^#define SWDPIO_SHIFT /;"	d
SWDPIO__EXT_SHIFT	drivers/net/e1000.h	/^#define SWDPIO__EXT_SHIFT /;"	d
SWDT_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SWDT_BASE	/;"	d
SWDT_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define SWDT_BASE	/;"	d
SWGPE_CTRL	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  SWGPE_CTRL	/;"	d
SWGPE_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SWGPE_EN	/;"	d
SWGPE_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   SWGPE_STS	/;"	d
SWGPE_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SWGPE_STS	/;"	d
SWIDE	include/sym53c8xx.h	/^#define SWIDE	/;"	d
SWING_A_30PER_G_INCREASE	arch/arm/mach-exynos/include/mach/dp.h	/^#define SWING_A_30PER_G_INCREASE	/;"	d
SWING_A_30PER_G_NORMAL	arch/arm/mach-exynos/include/mach/dp.h	/^#define SWING_A_30PER_G_NORMAL	/;"	d
SWITCH	examples/standalone/sched.c	/^#define SWITCH(/;"	d	file:
SWITCH_ADDR	board/bf609-ezkit/soft_switch.h	/^#define SWITCH_ADDR /;"	d
SWITCH_GLOBAL_CONFIG_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define SWITCH_GLOBAL_CONFIG_ADDR	/;"	d
SWITCH_MAX_PKT_SIZE	arch/arm/include/asm/ti-common/keystone_net.h	/^#define SWITCH_MAX_PKT_SIZE	/;"	d
SWITCH_SIZE	include/power/pfuze100_pmic.h	/^#define SWITCH_SIZE	/;"	d
SWInt	drivers/net/rtl8169.c	/^	SWInt = 0x0100,$/;"	e	enum:RTL8169_register_content	file:
SWMODE1_SHIFT	include/mc13892.h	/^#define SWMODE1_SHIFT	/;"	d
SWMODE2_SHIFT	include/mc13892.h	/^#define SWMODE2_SHIFT	/;"	d
SWMODE3_SHIFT	include/mc13892.h	/^#define SWMODE3_SHIFT	/;"	d
SWMODE4_SHIFT	include/mc13892.h	/^#define SWMODE4_SHIFT	/;"	d
SWMODE_AUTO_AUTO	include/mc13892.h	/^#define SWMODE_AUTO_AUTO	/;"	d
SWMODE_AUTO_OFF	include/mc13892.h	/^#define SWMODE_AUTO_OFF	/;"	d
SWMODE_AUTO_PFM	include/mc13892.h	/^#define SWMODE_AUTO_PFM	/;"	d
SWMODE_MASK	include/mc13892.h	/^#define SWMODE_MASK	/;"	d
SWMODE_OFF_OFF	include/mc13892.h	/^#define SWMODE_OFF_OFF	/;"	d
SWMODE_PFM_OFF	include/mc13892.h	/^#define SWMODE_PFM_OFF	/;"	d
SWMODE_PFM_PFM	include/mc13892.h	/^#define SWMODE_PFM_PFM	/;"	d
SWMODE_PWMPS_OFF	include/mc13892.h	/^#define SWMODE_PWMPS_OFF	/;"	d
SWMODE_PWMS_AUTO	include/mc13892.h	/^#define SWMODE_PWMS_AUTO	/;"	d
SWMODE_PWMS_PFM	include/mc13892.h	/^#define SWMODE_PWMS_PFM	/;"	d
SWMODE_PWMS_PWMPS	include/mc13892.h	/^#define SWMODE_PWMS_PWMPS	/;"	d
SWMODE_PWM_AUTO	include/mc13892.h	/^#define SWMODE_PWM_AUTO	/;"	d
SWMODE_PWM_OFF	include/mc13892.h	/^#define SWMODE_PWM_OFF	/;"	d
SWMODE_PWM_PFM	include/mc13892.h	/^#define SWMODE_PWM_PFM	/;"	d
SWMODE_PWM_PWM	include/mc13892.h	/^#define SWMODE_PWM_PWM	/;"	d
SWMODE_PWM_PWMPS	include/mc13892.h	/^#define SWMODE_PWM_PWMPS	/;"	d
SWR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define SWR(/;"	d
SWR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define SWR	/;"	d
SWRST	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf548/BF542_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf548/BF544_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf548/BF547_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf548/BF548_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf548/BF549_def.h	/^#define SWRST /;"	d
SWRST	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define SWRST /;"	d
SWR_CSITE_RST	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SWR_CSITE_RST	/;"	d
SWR_TRIG_SYS_RST	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define SWR_TRIG_SYS_RST	/;"	d
SWSCI	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define SWSCI	/;"	d
SWSMI_TMR_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  SWSMI_TMR_EN	/;"	d
SWSMI_TMR_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   SWSMI_TMR_EN	/;"	d
SWSRR	include/mpc83xx.h	/^#define SWSRR	/;"	d
SWT0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SWT0_BASE_ADDR	/;"	d
SWT1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SWT1_BASE_ADDR	/;"	d
SWT2_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SWT2_BASE_ADDR	/;"	d
SWT3_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SWT3_BASE_ADDR	/;"	d
SWT4_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define SWT4_BASE_ADDR	/;"	d
SWX_OUT_1_25	include/mc13892.h	/^#define SWX_OUT_1_25	/;"	d
SWX_OUT_1_30	include/mc13892.h	/^#define SWX_OUT_1_30 /;"	d
SWX_OUT_MASK	include/mc13892.h	/^#define SWX_OUT_MASK	/;"	d
SW_CAMERA_LENS_COVER	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CAMERA_LENS_COVER	include/dt-bindings/input/linux-event-codes.h	/^#define SW_CAMERA_LENS_COVER	/;"	d
SW_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_CNT	/;"	d
SW_DOCK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_DOCK	include/dt-bindings/input/linux-event-codes.h	/^#define SW_DOCK	/;"	d
SW_FRONT_PROXIMITY	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FRONT_PROXIMITY	include/dt-bindings/input/linux-event-codes.h	/^#define SW_FRONT_PROXIMITY	/;"	d
SW_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SW_FUNC_EN_N	/;"	d
SW_FUNC_EN_N	arch/arm/mach-exynos/include/mach/dp.h	/^#define SW_FUNC_EN_N	/;"	d
SW_HEADPHONE_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_HEADPHONE_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_HEADPHONE_INSERT	/;"	d
SW_INT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SW_INT	/;"	d
SW_INT	arch/arm/mach-exynos/include/mach/dp.h	/^#define SW_INT	/;"	d
SW_IPU_RST	drivers/video/ipu_regs.h	/^#define SW_IPU_RST	/;"	d
SW_JACK_PHYSICAL_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_JACK_PHYSICAL_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_JACK_PHYSICAL_INSERT /;"	d
SW_KEYPAD_SLIDE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_KEYPAD_SLIDE	include/dt-bindings/input/linux-event-codes.h	/^#define SW_KEYPAD_SLIDE	/;"	d
SW_LID	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LID	include/dt-bindings/input/linux-event-codes.h	/^#define SW_LID	/;"	d
SW_LINEIN_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEIN_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEIN_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_LINEOUT_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_LINEOUT_INSERT	/;"	d
SW_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define SW_MAX	/;"	d
SW_MICROPHONE_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MICROPHONE_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_MICROPHONE_INSERT	/;"	d
SW_MODE	include/linux/mtd/st_smi.h	/^#define SW_MODE	/;"	d
SW_MODE_MASK	include/power/pfuze100_pmic.h	/^#define SW_MODE_MASK	/;"	d
SW_MODE_SHIFT	include/power/pfuze100_pmic.h	/^#define SW_MODE_SHIFT	/;"	d
SW_MUTE_DEVICE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_MUTE_DEVICE	include/dt-bindings/input/linux-event-codes.h	/^#define SW_MUTE_DEVICE	/;"	d
SW_ONLY_GATE	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define SW_ONLY_GATE(/;"	d
SW_ONLY_GATE	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define SW_ONLY_GATE(/;"	d
SW_RADIO	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_RADIO	include/dt-bindings/input/linux-event-codes.h	/^#define SW_RADIO	/;"	d
SW_READ_LEVELING_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define SW_READ_LEVELING_MASK_BIT	/;"	d
SW_RESET	drivers/net/phy/mv88e6352.c	/^#define SW_RESET	/;"	d	file:
SW_RFKILL_ALL	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_RFKILL_ALL	include/dt-bindings/input/linux-event-codes.h	/^#define SW_RFKILL_ALL	/;"	d
SW_ROTATE_LOCK	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_ROTATE_LOCK	include/dt-bindings/input/linux-event-codes.h	/^#define SW_ROTATE_LOCK	/;"	d
SW_SEMAPHORE	include/radeon.h	/^#define SW_SEMAPHORE	/;"	d
SW_TABLET_MODE	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TABLET_MODE	include/dt-bindings/input/linux-event-codes.h	/^#define SW_TABLET_MODE	/;"	d
SW_TRAINING_PATTERN_SET_DISABLE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SW_TRAINING_PATTERN_SET_DISABLE	/;"	d
SW_TRAINING_PATTERN_SET_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SW_TRAINING_PATTERN_SET_MASK	/;"	d
SW_TRAINING_PATTERN_SET_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define SW_TRAINING_PATTERN_SET_MASK	/;"	d
SW_TRAINING_PATTERN_SET_NORMAL	arch/arm/mach-exynos/include/mach/dp.h	/^#define SW_TRAINING_PATTERN_SET_NORMAL	/;"	d
SW_TRAINING_PATTERN_SET_PTN1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SW_TRAINING_PATTERN_SET_PTN1	/;"	d
SW_TRAINING_PATTERN_SET_PTN1	arch/arm/mach-exynos/include/mach/dp.h	/^#define SW_TRAINING_PATTERN_SET_PTN1	/;"	d
SW_TRAINING_PATTERN_SET_PTN2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define SW_TRAINING_PATTERN_SET_PTN2	/;"	d
SW_TRAINING_PATTERN_SET_PTN2	arch/arm/mach-exynos/include/mach/dp.h	/^#define SW_TRAINING_PATTERN_SET_PTN2	/;"	d
SW_VIDEOOUT_INSERT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SW_VIDEOOUT_INSERT	include/dt-bindings/input/linux-event-codes.h	/^#define SW_VIDEOOUT_INSERT	/;"	d
SWx_0_600V	include/mc13892.h	/^#define SWx_0_600V	/;"	d
SWx_0_625V	include/mc13892.h	/^#define SWx_0_625V	/;"	d
SWx_0_650V	include/mc13892.h	/^#define SWx_0_650V	/;"	d
SWx_0_675V	include/mc13892.h	/^#define SWx_0_675V	/;"	d
SWx_0_700V	include/mc13892.h	/^#define SWx_0_700V	/;"	d
SWx_0_725V	include/mc13892.h	/^#define SWx_0_725V	/;"	d
SWx_0_750V	include/mc13892.h	/^#define SWx_0_750V	/;"	d
SWx_0_775V	include/mc13892.h	/^#define SWx_0_775V	/;"	d
SWx_0_800V	include/mc13892.h	/^#define SWx_0_800V	/;"	d
SWx_0_825V	include/mc13892.h	/^#define SWx_0_825V	/;"	d
SWx_0_850V	include/mc13892.h	/^#define SWx_0_850V	/;"	d
SWx_0_875V	include/mc13892.h	/^#define SWx_0_875V	/;"	d
SWx_0_900V	include/mc13892.h	/^#define SWx_0_900V	/;"	d
SWx_0_925V	include/mc13892.h	/^#define SWx_0_925V	/;"	d
SWx_0_950V	include/mc13892.h	/^#define SWx_0_950V	/;"	d
SWx_0_975V	include/mc13892.h	/^#define SWx_0_975V	/;"	d
SWx_1_000V	include/mc13892.h	/^#define SWx_1_000V	/;"	d
SWx_1_025V	include/mc13892.h	/^#define SWx_1_025V	/;"	d
SWx_1_050V	include/mc13892.h	/^#define SWx_1_050V	/;"	d
SWx_1_075V	include/mc13892.h	/^#define SWx_1_075V	/;"	d
SWx_1_100V	include/mc13892.h	/^#define SWx_1_100V	/;"	d
SWx_1_125V	include/mc13892.h	/^#define SWx_1_125V	/;"	d
SWx_1_150V	include/mc13892.h	/^#define SWx_1_150V	/;"	d
SWx_1_175V	include/mc13892.h	/^#define SWx_1_175V	/;"	d
SWx_1_200V	include/mc13892.h	/^#define SWx_1_200V	/;"	d
SWx_1_225V	include/mc13892.h	/^#define SWx_1_225V	/;"	d
SWx_1_250V	include/mc13892.h	/^#define SWx_1_250V	/;"	d
SWx_1_250V_MC34708	include/fsl_pmic.h	/^#define SWx_1_250V_MC34708	/;"	d
SWx_1_275V	include/mc13892.h	/^#define SWx_1_275V	/;"	d
SWx_1_300V	include/mc13892.h	/^#define SWx_1_300V	/;"	d
SWx_1_300V_MC34708	include/fsl_pmic.h	/^#define SWx_1_300V_MC34708	/;"	d
SWx_1_325V	include/mc13892.h	/^#define SWx_1_325V	/;"	d
SWx_1_350V	include/mc13892.h	/^#define SWx_1_350V	/;"	d
SWx_1_375V	include/mc13892.h	/^#define SWx_1_375V	/;"	d
SWx_VOLT_MASK	include/mc13892.h	/^#define SWx_VOLT_MASK	/;"	d
SWx_VOLT_MASK_MC34708	include/fsl_pmic.h	/^#define SWx_VOLT_MASK_MC34708	/;"	d
SX151X_REG_DATA	drivers/gpio/sx151x.c	/^#define SX151X_REG_DATA	/;"	d	file:
SX151X_REG_DIR	drivers/gpio/sx151x.c	/^#define SX151X_REG_DIR	/;"	d	file:
SX151X_REG_RESET	drivers/gpio/sx151x.c	/^#define SX151X_REG_RESET	/;"	d	file:
SXCNFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	SXCNFG	/;"	d
SXCNFG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SXCNFG	/;"	d
SXCNFG_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SXCNFG_OFFSET	/;"	d
SXFER	include/sym53c8xx.h	/^#define SXFER	/;"	d
SXLCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SXLCR	/;"	d
SXLCR_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SXLCR_OFFSET	/;"	d
SXMRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SXMRS	/;"	d
SXMRS_OFFSET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define SXMRS_OFFSET	/;"	d
SXsvfInfo	board/esd/common/xilinx_jtag/micro.c	/^} SXsvfInfo;$/;"	t	typeref:struct:tagSXsvfInfo	file:
SY8106A_I2C_ADDR	drivers/power/sy8106a.c	/^#define SY8106A_I2C_ADDR /;"	d	file:
SY8106A_POWER	drivers/power/Kconfig	/^config SY8106A_POWER$/;"	c	choice:Power""choice187d87300104
SY8106A_VOUT1_SEL	drivers/power/sy8106a.c	/^#define SY8106A_VOUT1_SEL /;"	d	file:
SY8106A_VOUT1_SEL_ENABLE	drivers/power/sy8106a.c	/^#define SY8106A_VOUT1_SEL_ENABLE /;"	d	file:
SY8106A_VOUT1_VOLT	drivers/power/Kconfig	/^config SY8106A_VOUT1_VOLT$/;"	c	menu:Power
SYM	arch/arc/lib/_millicodethunk.S	/^ #define SYM(/;"	d	file:
SYMBOL_ALLNOCONFIG_Y	scripts/kconfig/expr.h	/^#define SYMBOL_ALLNOCONFIG_Y /;"	d
SYMBOL_AUTO	scripts/kconfig/expr.h	/^#define SYMBOL_AUTO /;"	d
SYMBOL_CHANGED	scripts/kconfig/expr.h	/^#define SYMBOL_CHANGED /;"	d
SYMBOL_CHECK	scripts/kconfig/expr.h	/^#define SYMBOL_CHECK /;"	d
SYMBOL_CHECKED	scripts/kconfig/expr.h	/^#define SYMBOL_CHECKED /;"	d
SYMBOL_CHOICE	scripts/kconfig/expr.h	/^#define SYMBOL_CHOICE /;"	d
SYMBOL_CHOICEVAL	scripts/kconfig/expr.h	/^#define SYMBOL_CHOICEVAL /;"	d
SYMBOL_CONST	scripts/kconfig/expr.h	/^#define SYMBOL_CONST /;"	d
SYMBOL_DASH	board/a4m072/a4m072.c	/^#define SYMBOL_DASH	/;"	d	file:
SYMBOL_DEF	scripts/kconfig/expr.h	/^#define SYMBOL_DEF /;"	d
SYMBOL_DEF3	scripts/kconfig/expr.h	/^#define SYMBOL_DEF3 /;"	d
SYMBOL_DEF4	scripts/kconfig/expr.h	/^#define SYMBOL_DEF4 /;"	d
SYMBOL_DEF_AUTO	scripts/kconfig/expr.h	/^#define SYMBOL_DEF_AUTO /;"	d
SYMBOL_DEF_USER	scripts/kconfig/expr.h	/^#define SYMBOL_DEF_USER /;"	d
SYMBOL_DOT	board/a4m072/a4m072.c	/^#define SYMBOL_DOT	/;"	d	file:
SYMBOL_HASHSIZE	scripts/kconfig/expr.h	/^#define SYMBOL_HASHSIZE	/;"	d
SYMBOL_MAXLENGTH	scripts/kconfig/expr.h	/^#define SYMBOL_MAXLENGTH	/;"	d
SYMBOL_NAME	include/linux/linkage.h	/^#define SYMBOL_NAME(/;"	d
SYMBOL_NAME_LABEL	include/linux/linkage.h	/^#define SYMBOL_NAME_LABEL(/;"	d
SYMBOL_NAME_STR	include/linux/linkage.h	/^#define SYMBOL_NAME_STR(/;"	d
SYMBOL_NEED_SET_CHOICE_VALUES	scripts/kconfig/expr.h	/^#define SYMBOL_NEED_SET_CHOICE_VALUES /;"	d
SYMBOL_OPTIONAL	scripts/kconfig/expr.h	/^#define SYMBOL_OPTIONAL /;"	d
SYMBOL_UNDERLINE	board/a4m072/a4m072.c	/^#define SYMBOL_UNDERLINE	/;"	d	file:
SYMBOL_VALID	scripts/kconfig/expr.h	/^#define SYMBOL_VALID /;"	d
SYMBOL_WARNED	scripts/kconfig/expr.h	/^#define SYMBOL_WARNED /;"	d
SYMBOL_WRITE	scripts/kconfig/expr.h	/^#define SYMBOL_WRITE /;"	d
SYM_CHAR	board/mpl/pati/pati.c	/^#  define SYM_CHAR /;"	d	file:
SYM_CHAR	board/mpl/pati/pati.c	/^#  define SYM_CHAR$/;"	d	file:
SYM_CHAR	common/env_embedded.c	/^#  define SYM_CHAR /;"	d	file:
SYM_CHAR	common/env_embedded.c	/^#  define SYM_CHAR$/;"	d	file:
SYM_PREFIX	arch/blackfin/config.mk	/^SYM_PREFIX = _$/;"	m
SYNC	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define SYNC	/;"	d
SYNC	board/freescale/m5253demo/flash.c	/^#define SYNC	/;"	d	file:
SYNC	board/tqc/tqm834x/tqm834x.c	/^#define SYNC	/;"	d	file:
SYNC	common/ide.c	/^# define SYNC	/;"	d	file:
SYNC	lib/zlib/inflate.h	/^    SYNC        \/* looking for synchronization bytes to restart inflate() *\/$/;"	e	enum:__anon43d5a4c40103
SYNC_32KTIMER_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define SYNC_32KTIMER_BASE	/;"	d
SYNC_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define SYNC_P	/;"	d
SYNC_PATTERN_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define SYNC_PATTERN_ADDR(/;"	d
SYNC_PATTERN_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define SYNC_PATTERN_REG	/;"	d
SYNC_WAVE	drivers/video/ipu_disp.c	/^#define SYNC_WAVE /;"	d	file:
SYNOPSIS	doc/kwboot.1	/^.SH SYNOPSIS$/;"	s	title:KWBOOT
SYNOPSIS	doc/mkimage.1	/^.SH SYNOPSIS$/;"	s	title:MKIMAGE
SYNOPSYS_devices	cmd/ambapp.c	/^static ambapp_device_name SYNOPSYS_devices[] = {$/;"	v	typeref:typename:ambapp_device_name[]	file:
SYNO_CHKSUM_TAG	board/Synology/ds414/cmd_syno.c	/^#define SYNO_CHKSUM_TAG	/;"	d	file:
SYNO_DS109_ID	board/Synology/ds109/ds109.h	/^#define SYNO_DS109_ID /;"	d
SYNO_SN_TAG	board/Synology/ds414/cmd_syno.c	/^#define SYNO_SN_TAG	/;"	d	file:
SYNTH23	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define SYNTH23	/;"	d
SYN_CNT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CNT	include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CNT	/;"	d
SYN_CONFIG	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_CONFIG	include/dt-bindings/input/linux-event-codes.h	/^#define SYN_CONFIG	/;"	d
SYN_DROPPED	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_DROPPED	include/dt-bindings/input/linux-event-codes.h	/^#define SYN_DROPPED	/;"	d
SYN_MAX	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MAX	include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MAX	/;"	d
SYN_MT_REPORT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_MT_REPORT	include/dt-bindings/input/linux-event-codes.h	/^#define SYN_MT_REPORT	/;"	d
SYN_REPORT	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYN_REPORT	include/dt-bindings/input/linux-event-codes.h	/^#define SYN_REPORT	/;"	d
SYPCR_BME	include/mpc5xx.h	/^#define SYPCR_BME	/;"	d
SYPCR_BME	include/mpc8xx.h	/^#define SYPCR_BME	/;"	d
SYPCR_BMT	include/mpc5xx.h	/^#define SYPCR_BMT	/;"	d
SYPCR_BMT	include/mpc8260.h	/^#define SYPCR_BMT	/;"	d
SYPCR_BMT	include/mpc8xx.h	/^#define SYPCR_BMT	/;"	d
SYPCR_LBME	include/mpc8260.h	/^#define SYPCR_LBME	/;"	d
SYPCR_PBME	include/mpc8260.h	/^#define SYPCR_PBME	/;"	d
SYPCR_SWE	arch/m68k/include/asm/m5307.h	/^#define SYPCR_SWE	/;"	d
SYPCR_SWE	include/mpc5xx.h	/^#define SYPCR_SWE	/;"	d
SYPCR_SWE	include/mpc8260.h	/^#define SYPCR_SWE	/;"	d
SYPCR_SWE	include/mpc8xx.h	/^#define SYPCR_SWE	/;"	d
SYPCR_SWF	include/mpc5xx.h	/^#define SYPCR_SWF	/;"	d
SYPCR_SWF	include/mpc8xx.h	/^#define SYPCR_SWF	/;"	d
SYPCR_SWP	arch/m68k/include/asm/m5307.h	/^#define SYPCR_SWP	/;"	d
SYPCR_SWP	include/mpc5xx.h	/^#define SYPCR_SWP	/;"	d
SYPCR_SWP	include/mpc8260.h	/^#define SYPCR_SWP	/;"	d
SYPCR_SWP	include/mpc8xx.h	/^#define SYPCR_SWP	/;"	d
SYPCR_SWRI	arch/m68k/include/asm/m5307.h	/^#define SYPCR_SWRI	/;"	d
SYPCR_SWRI	include/mpc5xx.h	/^#define SYPCR_SWRI	/;"	d
SYPCR_SWRI	include/mpc8260.h	/^#define SYPCR_SWRI	/;"	d
SYPCR_SWRI	include/mpc8xx.h	/^#define SYPCR_SWRI	/;"	d
SYPCR_SWT	arch/m68k/include/asm/m5307.h	/^#define SYPCR_SWT(/;"	d
SYPCR_SWTA	arch/m68k/include/asm/m5307.h	/^#define SYPCR_SWTA	/;"	d
SYPCR_SWTAVAL	arch/m68k/include/asm/m5307.h	/^#define SYPCR_SWTAVAL	/;"	d
SYPCR_SWTC	include/mpc5xx.h	/^#define SYPCR_SWTC	/;"	d
SYPCR_SWTC	include/mpc8260.h	/^#define SYPCR_SWTC	/;"	d
SYPCR_SWTC	include/mpc8xx.h	/^#define SYPCR_SWTC	/;"	d
SYS16BIT	include/u-boot/zlib.h	/^#      define SYS16BIT$/;"	d
SYSBOOT_MASK	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define SYSBOOT_MASK	/;"	d
SYSBOOT_MASK	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SYSBOOT_MASK	/;"	d
SYSCALL_NR	arch/xtensa/include/asm/ptrace.h	/^#define SYSCALL_NR	/;"	d
SYSCFG	arch/blackfin/cpu/start.S	/^	SYSCFG = R0;$/;"	d
SYSCFG0	drivers/usb/host/r8a66597.h	/^#define SYSCFG0	/;"	d
SYSCFG1	drivers/usb/host/r8a66597.h	/^#define SYSCFG1	/;"	d
SYSCFG_CCEN_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SYSCFG_CCEN_P	/;"	d
SYSCFG_SCEN_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SYSCFG_SCEN_P	/;"	d
SYSCFG_SSSTEP_P	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SYSCFG_SSSTEP_P	/;"	d
SYSCLK	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLK	include/dt-bindings/clock/microchip,clock.h	/^#define SYSCLK	/;"	d
SYSCLKDIV_1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SYSCLKDIV_1	/;"	d
SYSCLKDIV_2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define SYSCLKDIV_2	/;"	d
SYSCLK_147456	board/gdsys/405ep/iocon.c	/^	SYSCLK_147456 = 0,$/;"	e	enum:__anon023d8a7b0603	file:
SYSCLK_147456	board/gdsys/common/ioep-fpga.c	/^	SYSCLK_147456 = 0,$/;"	e	enum:__anoneadcbf560503	file:
SYSCLK_156250	board/gdsys/405ep/dlvision-10g.c	/^	SYSCLK_156250 = 2,$/;"	e	enum:__anon678ede200403	file:
SYSCLK_64	board/freescale/p1_twr/p1_twr.c	/^#define SYSCLK_64	/;"	d	file:
SYSCLK_66	board/freescale/p1_twr/p1_twr.c	/^#define SYSCLK_66	/;"	d	file:
SYSCLOSE	arch/arm/lib/semihosting.c	/^#define SYSCLOSE	/;"	d	file:
SYSCNTR_BDIS	board/mpl/pati/pati.h	/^#define SYSCNTR_BDIS	/;"	d
SYSCNTR_BIND0	board/mpl/pati/pati.h	/^#define SYSCNTR_BIND0	/;"	d
SYSCNTR_BIND1	board/mpl/pati/pati.h	/^#define SYSCNTR_BIND1	/;"	d
SYSCNTR_BIND2	board/mpl/pati/pati.h	/^#define SYSCNTR_BIND2	/;"	d
SYSCNTR_BOOTEN	board/mpl/pati/pati.h	/^#define SYSCNTR_BOOTEN	/;"	d
SYSCNTR_BREV	board/mpl/pati/pati.h	/^#define SYSCNTR_BREV(/;"	d
SYSCNTR_BREV0	board/mpl/pati/pati.h	/^#define SYSCNTR_BREV0	/;"	d
SYSCNTR_BREV1	board/mpl/pati/pati.h	/^#define SYSCNTR_BREV1	/;"	d
SYSCNTR_BREV2	board/mpl/pati/pati.h	/^#define SYSCNTR_BREV2	/;"	d
SYSCNTR_BREV3	board/mpl/pati/pati.h	/^#define SYSCNTR_BREV3	/;"	d
SYSCNTR_CFG0	board/mpl/pati/pati.h	/^#define SYSCNTR_CFG0	/;"	d
SYSCNTR_CFG1	board/mpl/pati/pati.h	/^#define SYSCNTR_CFG1	/;"	d
SYSCNTR_CFG2	board/mpl/pati/pati.h	/^#define SYSCNTR_CFG2	/;"	d
SYSCNTR_CFG3	board/mpl/pati/pati.h	/^#define SYSCNTR_CFG3	/;"	d
SYSCNTR_CPU_VPP	board/mpl/pati/pati.h	/^#define SYSCNTR_CPU_VPP	/;"	d
SYSCNTR_FLAG	board/mpl/pati/pati.h	/^#define SYSCNTR_FLAG	/;"	d
SYSCNTR_FLWAIT0	board/mpl/pati/pati.h	/^#define SYSCNTR_FLWAIT0	/;"	d
SYSCNTR_FLWAIT1	board/mpl/pati/pati.h	/^#define SYSCNTR_FLWAIT1	/;"	d
SYSCNTR_FLWAIT2	board/mpl/pati/pati.h	/^#define SYSCNTR_FLWAIT2	/;"	d
SYSCNTR_FL_VPP	board/mpl/pati/pati.h	/^#define SYSCNTR_FL_VPP	/;"	d
SYSCNTR_FL_WP	board/mpl/pati/pati.h	/^#define SYSCNTR_FL_WP	/;"	d
SYSCNTR_ICW	board/mpl/pati/pati.h	/^#define SYSCNTR_ICW	/;"	d
SYSCNTR_ID	board/mpl/pati/pati.h	/^#define SYSCNTR_ID(/;"	d
SYSCNTR_ID0	board/mpl/pati/pati.h	/^#define SYSCNTR_ID0	/;"	d
SYSCNTR_ID1	board/mpl/pati/pati.h	/^#define SYSCNTR_ID1	/;"	d
SYSCNTR_ID2	board/mpl/pati/pati.h	/^#define SYSCNTR_ID2	/;"	d
SYSCNTR_ID3	board/mpl/pati/pati.h	/^#define SYSCNTR_ID3	/;"	d
SYSCNTR_ID4	board/mpl/pati/pati.h	/^#define SYSCNTR_ID4	/;"	d
SYSCNTR_IP	board/mpl/pati/pati.h	/^#define SYSCNTR_IP	/;"	d
SYSCNTR_ISB0	board/mpl/pati/pati.h	/^#define SYSCNTR_ISB0	/;"	d
SYSCNTR_ISB1	board/mpl/pati/pati.h	/^#define SYSCNTR_ISB1	/;"	d
SYSCNTR_ISB2	board/mpl/pati/pati.h	/^#define SYSCNTR_ISB2	/;"	d
SYSCNTR_PART	board/mpl/pati/pati.h	/^#define SYSCNTR_PART(/;"	d
SYSCNTR_PART0	board/mpl/pati/pati.h	/^#define SYSCNTR_PART0	/;"	d
SYSCNTR_PART1	board/mpl/pati/pati.h	/^#define SYSCNTR_PART1	/;"	d
SYSCNTR_PART2	board/mpl/pati/pati.h	/^#define SYSCNTR_PART2	/;"	d
SYSCNTR_PART3	board/mpl/pati/pati.h	/^#define SYSCNTR_PART3	/;"	d
SYSCNTR_PART4	board/mpl/pati/pati.h	/^#define SYSCNTR_PART4	/;"	d
SYSCNTR_PCIM	board/mpl/pati/pati.h	/^#define SYSCNTR_PCIM	/;"	d
SYSCNTR_PRM	board/mpl/pati/pati.h	/^#define SYSCNTR_PRM	/;"	d
SYSCNTR_RES0	board/mpl/pati/pati.h	/^#define SYSCNTR_RES0	/;"	d
SYSCNTR_RES1	board/mpl/pati/pati.h	/^#define SYSCNTR_RES1	/;"	d
SYSCNTR_RES2	board/mpl/pati/pati.h	/^#define SYSCNTR_RES2	/;"	d
SYSCNT_CMP_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SYSCNT_CMP_IPS_BASE_ADDR /;"	d
SYSCNT_CTRL_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SYSCNT_CTRL_IPS_BASE_ADDR /;"	d
SYSCNT_RD_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define SYSCNT_RD_IPS_BASE_ADDR /;"	d
SYSCON	drivers/core/Kconfig	/^config SYSCON$/;"	c	menu:Generic Driver Options
SYSCON0	arch/sandbox/include/asm/test.h	/^	SYSCON0		= 32,$/;"	e	enum:__anonca628da90103
SYSCON1	arch/sandbox/include/asm/test.h	/^	SYSCON1,$/;"	e	enum:__anonca628da90103
SYSCON_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_BASE	/;"	d
SYSCON_CHIPID_REV_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CHIPID_REV_MASK	/;"	d
SYSCON_CLKSET1_FCLK_DIV_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET1_FCLK_DIV_SHIFT	/;"	d
SYSCON_CLKSET1_HCLK_DIV_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET1_HCLK_DIV_SHIFT	/;"	d
SYSCON_CLKSET1_NBYP1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET1_NBYP1	/;"	d
SYSCON_CLKSET1_PCLK_DIV_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET1_PCLK_DIV_SHIFT	/;"	d
SYSCON_CLKSET2_NBYP2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET2_NBYP2	/;"	d
SYSCON_CLKSET2_PLL2_EN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET2_PLL2_EN	/;"	d
SYSCON_CLKSET2_USB_DIV_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET2_USB_DIV_SHIFT	/;"	d
SYSCON_CLKSET_PLL_PS_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET_PLL_PS_SHIFT	/;"	d
SYSCON_CLKSET_PLL_X1FBD1_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET_PLL_X1FBD1_SHIFT	/;"	d
SYSCON_CLKSET_PLL_X2FBD2_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET_PLL_X2FBD2_SHIFT	/;"	d
SYSCON_CLKSET_PLL_X2IPD_SHIFT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_CLKSET_PLL_X2IPD_SHIFT	/;"	d
SYSCON_COUNT	arch/sandbox/include/asm/test.h	/^	SYSCON_COUNT$/;"	e	enum:__anonca628da90103
SYSCON_DEVICECFG_SWRST	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_DEVICECFG_SWRST	/;"	d
SYSCON_GT64120	board/imgtec/malta/malta.c	/^	SYSCON_GT64120,$/;"	e	enum:sys_con	file:
SYSCON_MSC01	board/imgtec/malta/malta.c	/^	SYSCON_MSC01,$/;"	e	enum:sys_con	file:
SYSCON_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_OFFSET	/;"	d
SYSCON_OFF_CLKSET1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_OFF_CLKSET1	/;"	d
SYSCON_OFF_SYSCFG	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_OFF_SYSCFG	/;"	d
SYSCON_PWRCNT_UART_BAUD	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_PWRCNT_UART_BAUD	/;"	d
SYSCON_PWRCNT_USH_EN	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_PWRCNT_USH_EN	/;"	d
SYSCON_SCRATCH0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_SCRATCH0	/;"	d
SYSCON_SYSCFG_LASDO	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define SYSCON_SYSCFG_LASDO	/;"	d
SYSCON_UNKNOWN	board/imgtec/malta/malta.c	/^	SYSCON_UNKNOWN,$/;"	e	enum:sys_con	file:
SYSCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf548/BF542_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf548/BF544_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf548/BF547_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf548/BF548_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf548/BF549_def.h	/^#define SYSCR /;"	d
SYSCR	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define SYSCR /;"	d
SYSCTL	include/fsl_esdhc.h	/^#define SYSCTL	/;"	d
SYSCTLA	arch/x86/include/asm/ibmpc.h	/^#define SYSCTLA /;"	d
SYSCTLB	arch/x86/include/asm/ibmpc.h	/^#define SYSCTLB /;"	d
SYSCTL_CKEN	include/fsl_esdhc.h	/^#define SYSCTL_CKEN	/;"	d
SYSCTL_CLOCK_MASK	include/fsl_esdhc.h	/^#define SYSCTL_CLOCK_MASK	/;"	d
SYSCTL_HCKEN	include/fsl_esdhc.h	/^#define SYSCTL_HCKEN	/;"	d
SYSCTL_INITA	include/fsl_esdhc.h	/^#define SYSCTL_INITA	/;"	d
SYSCTL_IPGEN	include/fsl_esdhc.h	/^#define SYSCTL_IPGEN	/;"	d
SYSCTL_PEREN	include/fsl_esdhc.h	/^#define SYSCTL_PEREN	/;"	d
SYSCTL_RSTA	include/fsl_esdhc.h	/^#define SYSCTL_RSTA	/;"	d
SYSCTL_RSTC	include/fsl_esdhc.h	/^#define SYSCTL_RSTC	/;"	d
SYSCTL_RSTD	include/fsl_esdhc.h	/^#define SYSCTL_RSTD	/;"	d
SYSCTL_SRC	drivers/mmc/omap_hsmmc.c	/^#define SYSCTL_SRC	/;"	d	file:
SYSCTL_SRD	drivers/mmc/omap_hsmmc.c	/^#define SYSCTL_SRD	/;"	d	file:
SYSCTL_TIMEOUT_MASK	include/fsl_esdhc.h	/^#define SYSCTL_TIMEOUT_MASK	/;"	d
SYSCTRL_CORERESET	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_CORERESET /;"	d
SYSCTRL_EXTVOLTAGE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_EXTVOLTAGE /;"	d
SYSCTRL_INTVOLTAGE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_INTVOLTAGE /;"	d
SYSCTRL_LOCKCNT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_LOCKCNT /;"	d
SYSCTRL_OTPVOLTAGE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_OTPVOLTAGE /;"	d
SYSCTRL_PLLCTL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_PLLCTL /;"	d
SYSCTRL_PLLDIV	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_PLLDIV /;"	d
SYSCTRL_PLLSTAT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_PLLSTAT /;"	d
SYSCTRL_READ	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_READ /;"	d
SYSCTRL_SOFTRESET	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_SOFTRESET /;"	d
SYSCTRL_SYSRESET	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_SYSRESET /;"	d
SYSCTRL_VRCTL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_VRCTL /;"	d
SYSCTRL_WRITE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define SYSCTRL_WRITE /;"	d
SYSC_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define SYSC_BASE	/;"	d
SYSC_BASE	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define SYSC_BASE /;"	d
SYSC_PWRONCR2	board/renesas/salvator-x/salvator-x.c	/^#define	SYSC_PWRONCR2	/;"	d	file:
SYSC_PWRSR2	board/renesas/salvator-x/salvator-x.c	/^#define	SYSC_PWRSR2	/;"	d	file:
SYSDBG_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSDBG_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSDBG_RESET	/;"	d
SYSEN2_CTRL	include/palmas.h	/^#define SYSEN2_CTRL	/;"	d
SYSErr	drivers/net/rtl8169.c	/^	SYSErr = 0x8000,$/;"	e	enum:RTL8169_register_content	file:
SYSFLEN	arch/arm/lib/semihosting.c	/^#define SYSFLEN	/;"	d	file:
SYSHZ_CLOCK	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSHZ_CLOCK	/;"	d
SYSINFO_BOARD_NAME_MAX_LEN	board/ti/am57xx/board.c	/^#define SYSINFO_BOARD_NAME_MAX_LEN	/;"	d	file:
SYSINFO_BOARD_NAME_MAX_LEN	board/ti/dra7xx/evm.c	/^#define SYSINFO_BOARD_NAME_MAX_LEN	/;"	d	file:
SYSINFO_MAX_GPIOS	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^#define SYSINFO_MAX_GPIOS	/;"	d
SYSINFO_MAX_MEM_RANGES	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^#define SYSINFO_MAX_MEM_RANGES	/;"	d
SYSKEY	arch/mips/mach-pic32/include/mach/pic32.h	/^#define SYSKEY	/;"	d
SYSMGRCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGRCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGRCOLD_RESET	/;"	d
SYSMGR_ECC_OCRAM_DERR	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_ECC_OCRAM_DERR	/;"	d
SYSMGR_ECC_OCRAM_EN	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_ECC_OCRAM_EN	/;"	d
SYSMGR_ECC_OCRAM_SERR	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_ECC_OCRAM_SERR	/;"	d
SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB	/;"	d
SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB	/;"	d
SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII	/;"	d
SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII	/;"	d
SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII	/;"	d
SYSMGR_EMACGRP_CTRL_PHYSEL_MASK	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK	/;"	d
SYSMGR_FPGAINTF_EMAC0	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_EMAC0	/;"	d
SYSMGR_FPGAINTF_EMAC1	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_EMAC1	/;"	d
SYSMGR_FPGAINTF_NAND	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_NAND	/;"	d
SYSMGR_FPGAINTF_SDMMC	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_SDMMC	/;"	d
SYSMGR_FPGAINTF_SPIM0	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_SPIM0	/;"	d
SYSMGR_FPGAINTF_SPIM1	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_SPIM1	/;"	d
SYSMGR_FPGAINTF_USEFPGA	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_FPGAINTF_USEFPGA	/;"	d
SYSMGR_FRZCTRL_ADDRESS	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_ADDRESS /;"	d
SYSMGR_FRZCTRL_HIOCTRL_BUSHOLD_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_BUSHOLD_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_CFG_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_CFG_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_OCTRST_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_OCTRST_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_OCT_CFGEN_CALSTART_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_OCT_CFGEN_CALSTART_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_REGRST_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_REGRST_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_SLEW_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_SLEW_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_TRISTATE_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_TRISTATE_MASK /;"	d
SYSMGR_FRZCTRL_HIOCTRL_WKPULLUP_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HIOCTRL_WKPULLUP_MASK /;"	d
SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK /;"	d
SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN /;"	d
SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED /;"	d
SYSMGR_FRZCTRL_SRC_VIO1_ENUM_HW	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_HW /;"	d
SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW /;"	d
SYSMGR_FRZCTRL_VIOCTRL_BUSHOLD_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_VIOCTRL_BUSHOLD_MASK /;"	d
SYSMGR_FRZCTRL_VIOCTRL_CFG_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_VIOCTRL_CFG_MASK /;"	d
SYSMGR_FRZCTRL_VIOCTRL_SLEW_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_VIOCTRL_SLEW_MASK /;"	d
SYSMGR_FRZCTRL_VIOCTRL_TRISTATE_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_VIOCTRL_TRISTATE_MASK /;"	d
SYSMGR_FRZCTRL_VIOCTRL_WKPULLUP_MASK	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define SYSMGR_FRZCTRL_VIOCTRL_WKPULLUP_MASK /;"	d
SYSMGR_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define SYSMGR_RESET	/;"	d
SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO	/;"	d
SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX	/;"	d
SYSMGR_SDMMC_DRVSEL_SHIFT	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_SDMMC_DRVSEL_SHIFT	/;"	d
SYSMGR_SDMMC_SMPLSEL_SHIFT	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define SYSMGR_SDMMC_SMPLSEL_SHIFT	/;"	d
SYSMMR_BASE	arch/blackfin/include/asm/mem_map.h	/^# define SYSMMR_BASE /;"	d
SYSMODE_CLRMASK	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_CLRMASK /;"	d
SYSMODE_EXTRN_INTR	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_EXTRN_INTR	/;"	d
SYSMODE_HALTED	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_HALTED	/;"	d
SYSMODE_INTR_PENDING	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_INTR_PENDING	/;"	d
SYSMODE_PREFIX_ADDR	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_PREFIX_ADDR	/;"	d
SYSMODE_PREFIX_DATA	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_PREFIX_DATA	/;"	d
SYSMODE_PREFIX_REPE	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_PREFIX_REPE	/;"	d
SYSMODE_PREFIX_REPNE	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_PREFIX_REPNE	/;"	d
SYSMODE_SEGMASK	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGMASK /;"	d
SYSMODE_SEGOVR_CS	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGOVR_CS	/;"	d
SYSMODE_SEGOVR_DS	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGOVR_DS	/;"	d
SYSMODE_SEGOVR_ES	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGOVR_ES	/;"	d
SYSMODE_SEGOVR_FS	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGOVR_FS	/;"	d
SYSMODE_SEGOVR_GS	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGOVR_GS	/;"	d
SYSMODE_SEGOVR_SS	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEGOVR_SS	/;"	d
SYSMODE_SEG_DS_SS	drivers/bios_emulator/include/x86emu/regs.h	/^#define SYSMODE_SEG_DS_SS	/;"	d
SYSOPEN	arch/arm/lib/semihosting.c	/^#define SYSOPEN	/;"	d	file:
SYSPWR_FLR	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  SYSPWR_FLR	/;"	d
SYSPWR_FLR	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  SYSPWR_FLR	/;"	d
SYSREAD	arch/arm/lib/semihosting.c	/^#define SYSREAD	/;"	d	file:
SYSREG_ACBA	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ACBA	/;"	d
SYSREG_AP_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_AP_OFFSET	/;"	d
SYSREG_AP_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_AP_SIZE	/;"	d
SYSREG_AR_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_AR_OFFSET	/;"	d
SYSREG_AR_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_AR_SIZE	/;"	d
SYSREG_ASID_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ASID_OFFSET	/;"	d
SYSREG_ASID_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ASID_SIZE	/;"	d
SYSREG_AT_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_AT_OFFSET	/;"	d
SYSREG_AT_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_AT_SIZE	/;"	d
SYSREG_BEAR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BEAR	/;"	d
SYSREG_BE_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BE_OFFSET	/;"	d
SYSREG_BE_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BE_SIZE	/;"	d
SYSREG_BF	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BF(/;"	d
SYSREG_BFEXT	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BFEXT(/;"	d
SYSREG_BFINS	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BFINS(/;"	d
SYSREG_BIT	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BIT(/;"	d
SYSREG_BI_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BI_OFFSET	/;"	d
SYSREG_BI_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_BI_SIZE	/;"	d
SYSREG_B_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_B_OFFSET	/;"	d
SYSREG_B_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_B_SIZE	/;"	d
SYSREG_COMPARE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_COMPARE	/;"	d
SYSREG_CONF0_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONF0_OFFSET	/;"	d
SYSREG_CONF0_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONF0_SIZE	/;"	d
SYSREG_CONF1_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONF1_OFFSET	/;"	d
SYSREG_CONF1_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONF1_SIZE	/;"	d
SYSREG_CONFIG0	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0	/;"	d
SYSREG_CONFIG0_D_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_D_OFFSET	/;"	d
SYSREG_CONFIG0_D_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_D_SIZE	/;"	d
SYSREG_CONFIG0_J_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_J_OFFSET	/;"	d
SYSREG_CONFIG0_J_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_J_SIZE	/;"	d
SYSREG_CONFIG0_R_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_R_OFFSET	/;"	d
SYSREG_CONFIG0_R_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_R_SIZE	/;"	d
SYSREG_CONFIG0_S_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_S_OFFSET	/;"	d
SYSREG_CONFIG0_S_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG0_S_SIZE	/;"	d
SYSREG_CONFIG1	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CONFIG1	/;"	d
SYSREG_COUNT	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_COUNT	/;"	d
SYSREG_CPUCR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_CPUCR	/;"	d
SYSREG_DASS_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DASS_OFFSET	/;"	d
SYSREG_DASS_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DASS_SIZE	/;"	d
SYSREG_DLA_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DLA_OFFSET	/;"	d
SYSREG_DLA_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DLA_SIZE	/;"	d
SYSREG_DLSZ_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DLSZ_OFFSET	/;"	d
SYSREG_DLSZ_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DLSZ_SIZE	/;"	d
SYSREG_DMMUSZ_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DMMUSZ_OFFSET	/;"	d
SYSREG_DMMUSZ_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DMMUSZ_SIZE	/;"	d
SYSREG_DM_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DM_OFFSET	/;"	d
SYSREG_DM_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DM_SIZE	/;"	d
SYSREG_DRP_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DRP_OFFSET	/;"	d
SYSREG_DRP_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DRP_SIZE	/;"	d
SYSREG_DSET_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DSET_OFFSET	/;"	d
SYSREG_DSET_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_DSET_SIZE	/;"	d
SYSREG_ECR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ECR	/;"	d
SYSREG_ECR_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ECR_OFFSET	/;"	d
SYSREG_ECR_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ECR_SIZE	/;"	d
SYSREG_EM_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_EM_OFFSET	/;"	d
SYSREG_EM_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_EM_SIZE	/;"	d
SYSREG_EVBA	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_EVBA	/;"	d
SYSREG_E_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_E_OFFSET	/;"	d
SYSREG_E_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_E_SIZE	/;"	d
SYSREG_F0_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_F0_OFFSET	/;"	d
SYSREG_F0_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_F0_SIZE	/;"	d
SYSREG_F1_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_F1_OFFSET	/;"	d
SYSREG_F1_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_F1_SIZE	/;"	d
SYSREG_FC_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_FC_OFFSET	/;"	d
SYSREG_FC_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_FC_SIZE	/;"	d
SYSREG_FE_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_FE_OFFSET	/;"	d
SYSREG_FE_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_FE_SIZE	/;"	d
SYSREG_F_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_F_OFFSET	/;"	d
SYSREG_F_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_F_SIZE	/;"	d
SYSREG_GM_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_GM_OFFSET	/;"	d
SYSREG_GM_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_GM_SIZE	/;"	d
SYSREG_G_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_G_OFFSET	/;"	d
SYSREG_G_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_G_SIZE	/;"	d
SYSREG_H_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_H_OFFSET	/;"	d
SYSREG_H_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_H_SIZE	/;"	d
SYSREG_I0M_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I0M_OFFSET	/;"	d
SYSREG_I0M_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I0M_SIZE	/;"	d
SYSREG_I1M_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I1M_OFFSET	/;"	d
SYSREG_I1M_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I1M_SIZE	/;"	d
SYSREG_I2M_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I2M_OFFSET	/;"	d
SYSREG_I2M_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I2M_SIZE	/;"	d
SYSREG_I3M_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I3M_OFFSET	/;"	d
SYSREG_I3M_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_I3M_SIZE	/;"	d
SYSREG_IASS_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IASS_OFFSET	/;"	d
SYSREG_IASS_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IASS_SIZE	/;"	d
SYSREG_IBE_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IBE_OFFSET	/;"	d
SYSREG_IBE_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IBE_SIZE	/;"	d
SYSREG_IE0_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IE0_OFFSET	/;"	d
SYSREG_IE0_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IE0_SIZE	/;"	d
SYSREG_IE1_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IE1_OFFSET	/;"	d
SYSREG_IE1_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IE1_SIZE	/;"	d
SYSREG_IEC_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IEC_OFFSET	/;"	d
SYSREG_IEC_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IEC_SIZE	/;"	d
SYSREG_IEE_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IEE_OFFSET	/;"	d
SYSREG_IEE_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IEE_SIZE	/;"	d
SYSREG_ILA_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ILA_OFFSET	/;"	d
SYSREG_ILA_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ILA_SIZE	/;"	d
SYSREG_ILSZ_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ILSZ_OFFSET	/;"	d
SYSREG_ILSZ_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ILSZ_SIZE	/;"	d
SYSREG_IMMUSZ_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IMMUSZ_OFFSET	/;"	d
SYSREG_IMMUSZ_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IMMUSZ_SIZE	/;"	d
SYSREG_IRP_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IRP_OFFSET	/;"	d
SYSREG_IRP_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_IRP_SIZE	/;"	d
SYSREG_ISET_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ISET_OFFSET	/;"	d
SYSREG_ISET_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_ISET_SIZE	/;"	d
SYSREG_JAVA_LV0	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV0	/;"	d
SYSREG_JAVA_LV1	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV1	/;"	d
SYSREG_JAVA_LV2	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV2	/;"	d
SYSREG_JAVA_LV3	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV3	/;"	d
SYSREG_JAVA_LV4	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV4	/;"	d
SYSREG_JAVA_LV5	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV5	/;"	d
SYSREG_JAVA_LV6	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV6	/;"	d
SYSREG_JAVA_LV7	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JAVA_LV7	/;"	d
SYSREG_JBCR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JBCR	/;"	d
SYSREG_JECR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JECR	/;"	d
SYSREG_JOSP	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JOSP	/;"	d
SYSREG_JTBA	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_JTBA	/;"	d
SYSREG_L_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_L_OFFSET	/;"	d
SYSREG_L_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_L_SIZE	/;"	d
SYSREG_M0_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M0_OFFSET	/;"	d
SYSREG_M0_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M0_SIZE	/;"	d
SYSREG_M1_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M1_OFFSET	/;"	d
SYSREG_M1_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M1_SIZE	/;"	d
SYSREG_M2_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M2_OFFSET	/;"	d
SYSREG_M2_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M2_SIZE	/;"	d
SYSREG_MMUCR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR	/;"	d
SYSREG_MMUCR_I_OFFSET	arch/avr32/cpu/start.S	/^#define SYSREG_MMUCR_I_OFFSET	/;"	d	file:
SYSREG_MMUCR_I_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR_I_OFFSET	/;"	d
SYSREG_MMUCR_I_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR_I_SIZE	/;"	d
SYSREG_MMUCR_N_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR_N_OFFSET	/;"	d
SYSREG_MMUCR_N_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR_N_SIZE	/;"	d
SYSREG_MMUCR_S_OFFSET	arch/avr32/cpu/start.S	/^#define SYSREG_MMUCR_S_OFFSET	/;"	d	file:
SYSREG_MMUCR_S_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR_S_OFFSET	/;"	d
SYSREG_MMUCR_S_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUCR_S_SIZE	/;"	d
SYSREG_MMUT_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUT_OFFSET	/;"	d
SYSREG_MMUT_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_MMUT_SIZE	/;"	d
SYSREG_M_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M_OFFSET	/;"	d
SYSREG_M_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_M_SIZE	/;"	d
SYSREG_O_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_O_OFFSET	/;"	d
SYSREG_O_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_O_SIZE	/;"	d
SYSREG_PCCNT	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCNT	/;"	d
SYSREG_PCCR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR	/;"	d
SYSREG_PCCR_C_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR_C_OFFSET	/;"	d
SYSREG_PCCR_C_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR_C_SIZE	/;"	d
SYSREG_PCCR_R_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR_R_OFFSET	/;"	d
SYSREG_PCCR_R_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR_R_SIZE	/;"	d
SYSREG_PCCR_S_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR_S_OFFSET	/;"	d
SYSREG_PCCR_S_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCCR_S_SIZE	/;"	d
SYSREG_PCNT0	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCNT0	/;"	d
SYSREG_PCNT1	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PCNT1	/;"	d
SYSREG_PFN_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PFN_OFFSET	/;"	d
SYSREG_PFN_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PFN_SIZE	/;"	d
SYSREG_PROCESSORID_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PROCESSORID_OFFSET	/;"	d
SYSREG_PROCESSORID_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PROCESSORID_SIZE	/;"	d
SYSREG_PROCESSORREVISION_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PROCESSORREVISION_OFFSET	/;"	d
SYSREG_PROCESSORREVISION_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PROCESSORREVISION_SIZE	/;"	d
SYSREG_PTBR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_PTBR	/;"	d
SYSREG_P_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_P_OFFSET	/;"	d
SYSREG_P_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_P_SIZE	/;"	d
SYSREG_Q_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_Q_OFFSET	/;"	d
SYSREG_Q_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_Q_SIZE	/;"	d
SYSREG_RAR_DBG	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_DBG	/;"	d
SYSREG_RAR_EX	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_EX	/;"	d
SYSREG_RAR_INT0	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_INT0	/;"	d
SYSREG_RAR_INT1	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_INT1	/;"	d
SYSREG_RAR_INT2	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_INT2	/;"	d
SYSREG_RAR_INT3	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_INT3	/;"	d
SYSREG_RAR_NMI	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_NMI	/;"	d
SYSREG_RAR_SUP	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RAR_SUP	/;"	d
SYSREG_RE_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RE_OFFSET	/;"	d
SYSREG_RE_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RE_SIZE	/;"	d
SYSREG_RSR_DBG	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_DBG	/;"	d
SYSREG_RSR_EX	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_EX	/;"	d
SYSREG_RSR_INT0	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_INT0	/;"	d
SYSREG_RSR_INT1	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_INT1	/;"	d
SYSREG_RSR_INT2	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_INT2	/;"	d
SYSREG_RSR_INT3	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_INT3	/;"	d
SYSREG_RSR_NMI	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_NMI	/;"	d
SYSREG_RSR_SUP	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_RSR_SUP	/;"	d
SYSREG_SABAH	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SABAH	/;"	d
SYSREG_SABAL	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SABAL	/;"	d
SYSREG_SABD	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SABD	/;"	d
SYSREG_SR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR	/;"	d
SYSREG_SR_C_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_C_OFFSET	/;"	d
SYSREG_SR_C_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_C_SIZE	/;"	d
SYSREG_SR_D_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_D_OFFSET	/;"	d
SYSREG_SR_D_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_D_SIZE	/;"	d
SYSREG_SR_J_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_J_OFFSET	/;"	d
SYSREG_SR_J_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_J_SIZE	/;"	d
SYSREG_SR_N_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_N_OFFSET	/;"	d
SYSREG_SR_N_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_N_SIZE	/;"	d
SYSREG_SR_R_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_R_OFFSET	/;"	d
SYSREG_SR_R_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_R_SIZE	/;"	d
SYSREG_SR_V_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_V_OFFSET	/;"	d
SYSREG_SR_V_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SR_V_SIZE	/;"	d
SYSREG_SZ_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SZ_OFFSET	/;"	d
SYSREG_SZ_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_SZ_SIZE	/;"	d
SYSREG_TLBARHI	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBARHI	/;"	d
SYSREG_TLBARLO	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBARLO	/;"	d
SYSREG_TLBEAR	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBEAR	/;"	d
SYSREG_TLBEHI	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBEHI	/;"	d
SYSREG_TLBEHI_I_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBEHI_I_OFFSET	/;"	d
SYSREG_TLBEHI_I_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBEHI_I_SIZE	/;"	d
SYSREG_TLBEHI_V_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBEHI_V_OFFSET	/;"	d
SYSREG_TLBEHI_V_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBEHI_V_SIZE	/;"	d
SYSREG_TLBELO	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBELO	/;"	d
SYSREG_TLBELO_C_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBELO_C_OFFSET	/;"	d
SYSREG_TLBELO_C_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBELO_C_SIZE	/;"	d
SYSREG_TLBELO_D_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBELO_D_OFFSET	/;"	d
SYSREG_TLBELO_D_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_TLBELO_D_SIZE	/;"	d
SYSREG_T_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_T_OFFSET	/;"	d
SYSREG_T_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_T_SIZE	/;"	d
SYSREG_VPN_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_VPN_OFFSET	/;"	d
SYSREG_VPN_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_VPN_SIZE	/;"	d
SYSREG_W_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_W_OFFSET	/;"	d
SYSREG_W_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_W_SIZE	/;"	d
SYSREG_Z_OFFSET	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_Z_OFFSET	/;"	d
SYSREG_Z_SIZE	arch/avr32/include/asm/sysreg.h	/^#define SYSREG_Z_SIZE	/;"	d
SYSRESET	drivers/sysreset/Kconfig	/^config SYSRESET$/;"	c	menu:System reset device drivers
SYSRESET_COLD	include/sysreset.h	/^	SYSRESET_COLD,	\/* Reset CPU and GPIOs *\/$/;"	e	enum:sysreset_t
SYSRESET_COUNT	include/sysreset.h	/^	SYSRESET_COUNT,$/;"	e	enum:sysreset_t
SYSRESET_POWER	include/sysreset.h	/^	SYSRESET_POWER,	\/* Reset PMIC (remove and restore power) *\/$/;"	e	enum:sysreset_t
SYSRESET_WARM	include/sysreset.h	/^	SYSRESET_WARM,	\/* Reset CPU, keep GPIOs active *\/$/;"	e	enum:sysreset_t
SYSRST_CNT_1SEC_VAL	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define SYSRST_CNT_1SEC_VAL	/;"	d
SYSSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define SYSSEL	/;"	d
SYSSEL_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define SYSSEL_P	/;"	d
SYSSTS0	drivers/usb/host/r8a66597.h	/^#define SYSSTS0	/;"	d
SYSSTS1	drivers/usb/host/r8a66597.h	/^#define SYSSTS1	/;"	d
SYSTEM_CLOCK_12	drivers/i2c/omap24xx_i2c.h	/^#define SYSTEM_CLOCK_12	/;"	d
SYSTEM_CLOCK_13	drivers/i2c/omap24xx_i2c.h	/^#define SYSTEM_CLOCK_13	/;"	d
SYSTEM_CLOCK_192	drivers/i2c/omap24xx_i2c.h	/^#define SYSTEM_CLOCK_192	/;"	d
SYSTEM_CLOCK_96	drivers/i2c/omap24xx_i2c.h	/^#define SYSTEM_CLOCK_96	/;"	d
SYSTEM_MAP	Makefile	/^SYSTEM_MAP = \\$/;"	m
SYSTEM_MAX_ID	drivers/clk/at91/clk-system.c	/^#define SYSTEM_MAX_ID	/;"	d	file:
SYSTEM_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define SYSTEM_MODE	/;"	d
SYSTEM_RESET	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define SYSTEM_RESET	/;"	d
SYSTEM_RESET_STS	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  SYSTEM_RESET_STS	/;"	d
SYSTEM_RESET_STS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  SYSTEM_RESET_STS	/;"	d
SYSTIMER_32BIT	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSTIMER_32BIT	/;"	d
SYSTIMER_BASE	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSTIMER_BASE	/;"	d
SYSTIMER_BASE	arch/arm/mach-highbank/timer.c	/^#define SYSTIMER_BASE	/;"	d	file:
SYSTIMER_EN	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSTIMER_EN	/;"	d
SYSTIMER_PRESC_16	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSTIMER_PRESC_16	/;"	d
SYSTIMER_PRESC_256	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSTIMER_PRESC_256	/;"	d
SYSTIMER_RELOAD	arch/arm/include/asm/arch-armv7/systimer.h	/^#define SYSTIMER_RELOAD	/;"	d
SYS_32K	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_32K	/;"	d
SYS_AMBAPP_PRINT_ON_STARTUP	cmd/Kconfig	/^config SYS_AMBAPP_PRINT_ON_STARTUP$/;"	c	menu:Command line interface""Misc commands
SYS_ARCH	arch/Kconfig	/^config SYS_ARCH$/;"	c
SYS_ARCH	arch/arc/Kconfig	/^config SYS_ARCH$/;"	c	menu:ARC architecture
SYS_ARCH	arch/arm/Kconfig	/^config SYS_ARCH$/;"	c	menu:ARM architecture
SYS_ARCH	arch/avr32/Kconfig	/^config SYS_ARCH$/;"	c	menu:AVR32 architecture
SYS_ARCH	arch/blackfin/Kconfig	/^config SYS_ARCH$/;"	c	menu:Blackfin architecture
SYS_ARCH	arch/m68k/Kconfig	/^config SYS_ARCH$/;"	c	menu:M68000 architecture
SYS_ARCH	arch/microblaze/Kconfig	/^config SYS_ARCH$/;"	c	menu:MicroBlaze architecture
SYS_ARCH	arch/mips/Kconfig	/^config SYS_ARCH$/;"	c	menu:MIPS architecture
SYS_ARCH	arch/nds32/Kconfig	/^config SYS_ARCH$/;"	c	menu:NDS32 architecture
SYS_ARCH	arch/nios2/Kconfig	/^config SYS_ARCH$/;"	c	menu:Nios II architecture
SYS_ARCH	arch/openrisc/Kconfig	/^config SYS_ARCH$/;"	c	menu:OpenRISC architecture
SYS_ARCH	arch/powerpc/Kconfig	/^config SYS_ARCH$/;"	c	menu:PowerPC architecture
SYS_ARCH	arch/sandbox/Kconfig	/^config SYS_ARCH$/;"	c	menu:Sandbox architecture
SYS_ARCH	arch/sh/Kconfig	/^config SYS_ARCH$/;"	c	menu:SuperH architecture
SYS_ARCH	arch/sparc/Kconfig	/^config SYS_ARCH$/;"	c	menu:SPARC architecture
SYS_ARCH	arch/x86/Kconfig	/^config SYS_ARCH$/;"	c	menu:x86 architecture
SYS_ARCH	arch/xtensa/Kconfig	/^config SYS_ARCH$/;"	c	menu:Xtensa architecture
SYS_ARM_ARCH	arch/arm/Kconfig	/^config SYS_ARM_ARCH$/;"	c	menu:ARM architecture
SYS_AUXPLL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_AUXPLL /;"	d
SYS_AXI256_AXI128TO256W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_AXI128TO256W_BASE	/;"	d
SYS_AXI256_AXI128TO256_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_AXI128TO256_BASE	/;"	d
SYS_AXI256_AXMW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_AXMW_BASE	/;"	d
SYS_AXI256_AXM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_AXM_BASE	/;"	d
SYS_AXI256_CCXSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_CCXSLVDMSCR	/;"	d
SYS_AXI256_IMP0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_IMP0W_BASE	/;"	d
SYS_AXI256_IMP0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_IMP0_BASE	/;"	d
SYS_AXI256_MPXDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_MPXDMSCR	/;"	d
SYS_AXI256_MPX_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_MPX_BASE	/;"	d
SYS_AXI256_MXIDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_MXIDMSCR	/;"	d
SYS_AXI256_MXIW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_MXIW_BASE	/;"	d
SYS_AXI256_MXI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_MXI_BASE	/;"	d
SYS_AXI256_S3CSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_S3CSLVDMSCR	/;"	d
SYS_AXI256_SY2W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_SY2W_BASE	/;"	d
SYS_AXI256_SY2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_SY2_BASE	/;"	d
SYS_AXI256_SYXDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_SYXDMSCR	/;"	d
SYS_AXI256_SYXSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_SYXSLVDMSCR	/;"	d
SYS_AXI256_SYX_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_SYX_BASE	/;"	d
SYS_AXI256_X128TO256SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_X128TO256SLVDMSCR	/;"	d
SYS_AXI256_X256TO128SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI256_X256TO128SLVDMSCR	/;"	d
SYS_AXI_ADMW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ADMW_BASE	/;"	d
SYS_AXI_ADM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ADM_BASE	/;"	d
SYS_AXI_ADM_DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ADM_DMSCR	/;"	d
SYS_AXI_ADSW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ADSW_BASE	/;"	d
SYS_AXI_ADS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ADS_BASE	/;"	d
SYS_AXI_ADS_DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ADS_DMSCR	/;"	d
SYS_AXI_AVBDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AVBDMSCR	/;"	d
SYS_AXI_AVBSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AVBSLVDMSCR	/;"	d
SYS_AXI_AVBW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AVBW_BASE	/;"	d
SYS_AXI_AVB_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AVB_BASE	/;"	d
SYS_AXI_AX2MDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AX2MDMSCR	/;"	d
SYS_AXI_AX2M_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AX2M_BASE	/;"	d
SYS_AXI_AX2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AX2SLVDMSCR	/;"	d
SYS_AXI_AXI64TO128W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_AXI64TO128W_BASE	/;"	d
SYS_AXI_CC50DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CC50DMSCR	/;"	d
SYS_AXI_CC50W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CC50W_BASE	/;"	d
SYS_AXI_CC50_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CC50_BASE	/;"	d
SYS_AXI_CC51DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CC51DMSCR	/;"	d
SYS_AXI_CCIDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CCIDMSCR	/;"	d
SYS_AXI_CCIW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CCIW_BASE	/;"	d
SYS_AXI_CCI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CCI_BASE	/;"	d
SYS_AXI_CSDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CSDMSCR	/;"	d
SYS_AXI_CSW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CSW_BASE	/;"	d
SYS_AXI_CS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_CS_BASE	/;"	d
SYS_AXI_DDMDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_DDMDMSCR	/;"	d
SYS_AXI_DDM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_DDM_BASE	/;"	d
SYS_AXI_ETHDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ETHDMSCR	/;"	d
SYS_AXI_ETHSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ETHSLVDMSCR	/;"	d
SYS_AXI_ETH_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ETH_BASE	/;"	d
SYS_AXI_ETRABDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ETRABDMSCR	/;"	d
SYS_AXI_ETRKFDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_ETRKFDMSCR	/;"	d
SYS_AXI_G2DDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_G2DDMSCR	/;"	d
SYS_AXI_G2DW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_G2DW_BASE	/;"	d
SYS_AXI_G2D_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_G2D_BASE	/;"	d
SYS_AXI_GICSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_GICSLVDMSCR	/;"	d
SYS_AXI_IMP0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMP0DMSCR	/;"	d
SYS_AXI_IMP0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMP0_BASE	/;"	d
SYS_AXI_IMP1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMP1DMSCR	/;"	d
SYS_AXI_IMP1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMP1_BASE	/;"	d
SYS_AXI_IMPSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMPSLVDMSCR	/;"	d
SYS_AXI_IMUX0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMUX0W_BASE	/;"	d
SYS_AXI_IMUX0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMUX0_BASE	/;"	d
SYS_AXI_IMUX1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMUX1W_BASE	/;"	d
SYS_AXI_IMUX1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMUX1_BASE	/;"	d
SYS_AXI_IMUX2W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMUX2W_BASE	/;"	d
SYS_AXI_IMUX2_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMUX2_BASE	/;"	d
SYS_AXI_IMUX3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_IMUX3SLVDMSCR	/;"	d
SYS_AXI_IMX0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMX0SLVDMSCR	/;"	d
SYS_AXI_IMX1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMX1SLVDMSCR	/;"	d
SYS_AXI_IMX2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_IMX2SLVDMSCR	/;"	d
SYS_AXI_LBSDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_LBSDMSCR	/;"	d
SYS_AXI_LBSSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_LBSSLVDMSCR	/;"	d
SYS_AXI_LBSW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_LBSW_BASE	/;"	d
SYS_AXI_LBS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_LBS_BASE	/;"	d
SYS_AXI_MMC0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMC0SLVDMSCR	/;"	d
SYS_AXI_MMC1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMC1SLVDMSCR	/;"	d
SYS_AXI_MMUDSDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUDSDMSCR	/;"	d
SYS_AXI_MMUDS_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUDS_BASE	/;"	d
SYS_AXI_MMUMXDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUMXDMSCR	/;"	d
SYS_AXI_MMUM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUM_BASE	/;"	d
SYS_AXI_MMURDDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMURDDMSCR	/;"	d
SYS_AXI_MMUR_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUR_BASE	/;"	d
SYS_AXI_MMUS0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUS0DMSCR	/;"	d
SYS_AXI_MMUS0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUS0_BASE	/;"	d
SYS_AXI_MMUS1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUS1DMSCR	/;"	d
SYS_AXI_MMUS1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MMUS1_BASE	/;"	d
SYS_AXI_MPXDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MPXDMSCR	/;"	d
SYS_AXI_MPXM_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MPXM_BASE	/;"	d
SYS_AXI_MPXSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MPXSLVDMSCR	/;"	d
SYS_AXI_MTSB0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MTSB0DMSCR	/;"	d
SYS_AXI_MTSB0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MTSB0SLVDMSCR	/;"	d
SYS_AXI_MTSB0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MTSB0_BASE	/;"	d
SYS_AXI_MTSB1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MTSB1DMSCR	/;"	d
SYS_AXI_MTSB1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MTSB1SLVDMSCR	/;"	d
SYS_AXI_MTSB1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MTSB1_BASE	/;"	d
SYS_AXI_MXTSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_MXTSLVDMSCR	/;"	d
SYS_AXI_PCIDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_PCIDMSCR	/;"	d
SYS_AXI_PCISLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_PCISLVDMSCR	/;"	d
SYS_AXI_PCI_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_PCI_BASE	/;"	d
SYS_AXI_QSAPBSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_QSAPBSLVDMSCR	/;"	d
SYS_AXI_ROT0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ROT0DMSCR	/;"	d
SYS_AXI_ROT1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ROT1DMSCR	/;"	d
SYS_AXI_ROT2DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ROT2DMSCR	/;"	d
SYS_AXI_ROT3DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ROT3DMSCR	/;"	d
SYS_AXI_ROT4DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_ROT4DMSCR	/;"	d
SYS_AXI_RTXDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_RTXDMSCR	/;"	d
SYS_AXI_RTXSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_RTXSLVDMSCR	/;"	d
SYS_AXI_RTXW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_RTXW_BASE	/;"	d
SYS_AXI_RTX_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_RTX_BASE	/;"	d
SYS_AXI_SAPC1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAPC1SLVDMSCR	/;"	d
SYS_AXI_SAPC2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAPC2SLVDMSCR	/;"	d
SYS_AXI_SAPC3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAPC3SLVDMSCR	/;"	d
SYS_AXI_SAPC65SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAPC65SLVDMSCR	/;"	d
SYS_AXI_SAPC8SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAPC8SLVDMSCR	/;"	d
SYS_AXI_SAT0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAT0DMSCR	/;"	d
SYS_AXI_SAT0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAT0SLVDMSCR	/;"	d
SYS_AXI_SAT0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAT0_BASE	/;"	d
SYS_AXI_SAT1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAT1DMSCR	/;"	d
SYS_AXI_SAT1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAT1SLVDMSCR	/;"	d
SYS_AXI_SAT1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SAT1_BASE	/;"	d
SYS_AXI_SDAP0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDAP0SLVDMSCR	/;"	d
SYS_AXI_SDAP1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDAP1SLVDMSCR	/;"	d
SYS_AXI_SDAP2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDAP2SLVDMSCR	/;"	d
SYS_AXI_SDAP3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDAP3SLVDMSCR	/;"	d
SYS_AXI_SDM0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDM0DMSCR	/;"	d
SYS_AXI_SDM0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDM0W_BASE	/;"	d
SYS_AXI_SDM0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDM0_BASE	/;"	d
SYS_AXI_SDM1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDM1DMSCR	/;"	d
SYS_AXI_SDM1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDM1W_BASE	/;"	d
SYS_AXI_SDM1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDM1_BASE	/;"	d
SYS_AXI_SDS0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDS0DMSCR	/;"	d
SYS_AXI_SDS0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDS0W_BASE	/;"	d
SYS_AXI_SDS0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDS0_BASE	/;"	d
SYS_AXI_SDS1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDS1DMSCR	/;"	d
SYS_AXI_SDS1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDS1W_BASE	/;"	d
SYS_AXI_SDS1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SDS1_BASE	/;"	d
SYS_AXI_SGXSLV1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SGXSLV1SLVDMSCR	/;"	d
SYS_AXI_SGXSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SGXSLVDMSCR	/;"	d
SYS_AXI_STBR0PSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR0PSLVDMSCR	/;"	d
SYS_AXI_STBR0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR0SLVDMSCR	/;"	d
SYS_AXI_STBR0XSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR0XSLVDMSCR	/;"	d
SYS_AXI_STBR1PSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR1PSLVDMSCR	/;"	d
SYS_AXI_STBR1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR1SLVDMSCR	/;"	d
SYS_AXI_STBR1XSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR1XSLVDMSCR	/;"	d
SYS_AXI_STBR2PSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR2PSLVDMSCR	/;"	d
SYS_AXI_STBR2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR2SLVDMSCR	/;"	d
SYS_AXI_STBR2XSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR2XSLVDMSCR	/;"	d
SYS_AXI_STBR3PSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR3PSLVDMSCR	/;"	d
SYS_AXI_STBR3SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR3SLVDMSCR	/;"	d
SYS_AXI_STBR3XSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR3XSLVDMSCR	/;"	d
SYS_AXI_STBR4PSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR4PSLVDMSCR	/;"	d
SYS_AXI_STBR4SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR4SLVDMSCR	/;"	d
SYS_AXI_STBR4XSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define	SYS_AXI_STBR4XSLVDMSCR	/;"	d
SYS_AXI_STBSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_STBSLVDMSCR	/;"	d
SYS_AXI_STMSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_STMSLVDMSCR	/;"	d
SYS_AXI_SYAPBSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYAPBSLVDMSCR	/;"	d
SYS_AXI_SYX2DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYX2DMSCR	/;"	d
SYS_AXI_SYX2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYX2SLVDMSCR	/;"	d
SYS_AXI_SYX64TO128_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYX64TO128_BASE	/;"	d
SYS_AXI_SYXW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYXW_BASE	/;"	d
SYS_AXI_SYXXDEFAULTSLAVESLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYXXDEFAULTSLAVESLVDMSCR	/;"	d
SYS_AXI_SYX_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_SYX_BASE	/;"	d
SYS_AXI_TRABW_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_TRABW_BASE	/;"	d
SYS_AXI_TRAB_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_TRAB_BASE	/;"	d
SYS_AXI_TSPL0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_TSPL0SLVDMSCR	/;"	d
SYS_AXI_TSPL1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_TSPL1SLVDMSCR	/;"	d
SYS_AXI_TSPL2SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_TSPL2SLVDMSCR	/;"	d
SYS_AXI_UDM0DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UDM0DMSCR	/;"	d
SYS_AXI_UDM0W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UDM0W_BASE	/;"	d
SYS_AXI_UDM0_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UDM0_BASE	/;"	d
SYS_AXI_UDM1DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UDM1DMSCR	/;"	d
SYS_AXI_UDM1W_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UDM1W_BASE	/;"	d
SYS_AXI_UDM1_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UDM1_BASE	/;"	d
SYS_AXI_USB20DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB20DMSCR	/;"	d
SYS_AXI_USB20SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB20SLVDMSCR	/;"	d
SYS_AXI_USB20_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB20_BASE	/;"	d
SYS_AXI_USB21DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB21DMSCR	/;"	d
SYS_AXI_USB21SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB21SLVDMSCR	/;"	d
SYS_AXI_USB21_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB21_BASE	/;"	d
SYS_AXI_USB22DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB22DMSCR	/;"	d
SYS_AXI_USB22SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB22SLVDMSCR	/;"	d
SYS_AXI_USB22_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB22_BASE	/;"	d
SYS_AXI_USB30DMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB30DMSCR	/;"	d
SYS_AXI_USB30SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB30SLVDMSCR	/;"	d
SYS_AXI_USB30_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_USB30_BASE	/;"	d
SYS_AXI_UTLBDSSLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UTLBDSSLVDMSCR	/;"	d
SYS_AXI_UTLBS0SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UTLBS0SLVDMSCR	/;"	d
SYS_AXI_UTLBS1SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_UTLBS1SLVDMSCR	/;"	d
SYS_AXI_X128TO64SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_X128TO64SLVDMSCR	/;"	d
SYS_AXI_X64TO128SLVDMSCR	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define SYS_AXI_X64TO128SLVDMSCR	/;"	d
SYS_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_BASE /;"	d
SYS_BIG_ENDIAN	arch/mips/Kconfig	/^config SYS_BIG_ENDIAN$/;"	c	choice:MIPS architecture""choiced4351f5b0204
SYS_BOARD	arch/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	arch/arm/mach-bcm283x/Kconfig	/^config SYS_BOARD$/;"	c	menu:Broadcom BCM283X family
SYS_BOARD	arch/arm/mach-highbank/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	arch/arm/mach-integrator/Kconfig	/^config SYS_BOARD$/;"	c	menu:Integrator Options
SYS_BOARD	arch/arm/mach-mvebu/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	arch/arm/mach-socfpga/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	arch/arm/mach-zynq/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	arch/sandbox/Kconfig	/^config SYS_BOARD$/;"	c	menu:Sandbox architecture
SYS_BOARD	board/8dtech/eco5pk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Arcturus/ucp1020/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Barix/ipam390/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/BuR/brppt1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/BuR/brxre1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/BuS/eb_cpu5282/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/CarMediaLab/flea3/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/LaCie/edminiv2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/LaCie/net2big_v2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/LaCie/netspace_v2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Marvell/aspenite/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Marvell/dreamplug/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Marvell/gplugd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Marvell/guruplug/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Marvell/openrd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Marvell/sheevaplug/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Seagate/dockstar/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Seagate/goflexhome/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Seagate/nas220/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/Synology/ds109/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/a3m071/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/a4m072/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/abilis/tb100/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/advantech/dms-ba16/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amazon/kc1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/acadia/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/bamboo/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/bubinga/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/canyonlands/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/katmai/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/kilauea/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/luan/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/makalu/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/redwood/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/sequoia/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/walnut/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/yosemite/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amcc/yucca/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/amlogic/odroid-c2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/aristainetos/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/armadeus/apf27/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/armltd/vexpress/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/armltd/vexpress64/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/astro/mcf5373l/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91rm9200ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9260ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9261ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9263ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9rlek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/atngw100/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/atngw100mkii/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/atstk1000/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/sama5d3xek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/atmel/sama5d4ek/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/avionic-design/medcom-wide/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/avionic-design/plutux/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/avionic-design/tec-ng/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/avionic-design/tec/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bachmann/ot1200/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/barco/platinum/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/barco/titanium/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bct-brettl2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf506f-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf518f-ezbrd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf525-ucr2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf526-ezbrd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf527-ad7160-eval/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf527-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf527-sdp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf533-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf533-stamp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf537-minotaur/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf537-pnav/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf537-srv1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf537-stamp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf538f-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf548-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf561-acvilon/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf561-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bf609-ezkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/birdland/bav335x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/blackstamp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/blackvme/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bluegiga/apx4devkit/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bluewater/gurnard/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bluewater/snapper9260/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/bosch/shc/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/boundary/nitrogen6x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/br4/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/broadcom/bcmcygnus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/broadcom/bcmnsp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/buffalo/lsxl/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cadence/xtfpga/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/calao/usb_a9263/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/canmb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cavium/thunderx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ccv/xpress/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cei/cei-tk1-som/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cirrus/edb93xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cloudengines/pogo_e02/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm-bf527/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm-bf533/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm-bf537e/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm-bf537u/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm-bf548/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm-bf561/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cm5200/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/cobra5272/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compal/paz00/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/cm_fx6/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/cm_t335/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/cm_t35/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/cm_t3517/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/cm_t43/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/cm_t54/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/compulab/trimslice/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/coreboot/coreboot/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/corscience/tricorder/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/creative/xfi3/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/d-link/dns325/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/davedenx/aria/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/davinci/da8xxevm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/davinci/ea20/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/dbau1x00/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/denx/m28evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/denx/m53evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/denx/ma5d4evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/dfi/dfi-bt700/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/dnp5370/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/efi/efi-x86/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/egnite/ethernut5/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/el/el6x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/embest/mx6boards/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/emulation/qemu-x86/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/engicam/icorem6/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/cpci2dp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/cpci405/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/mecp5123/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/meesc/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/plu405/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/pmc405de/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/pmc440/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/vme8349/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/esd/vom405/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/espt/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/firefly/firefly-rk3288/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/b4860qds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/bsc9131rdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/bsc9132qds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/c29xpcie/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/corenet_ds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1012afrdm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1012aqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1012ardb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1021aqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1021atwr/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1043aqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1043ardb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1046aqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls1046ardb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls2080a/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls2080aqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/ls2080ardb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5208evbe/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m52277evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5235evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5249evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5253demo/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5253evbe/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5272c3/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5275evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5282evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m53017evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5329evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m5373evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m54418twr/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m54451evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m54455evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m547xevb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/m548xevb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc5121ads/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8308rdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8313erdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8315erdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8323erdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc832xemds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8349emds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8349itx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc837xemds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc837xerdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8536ds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8540ads/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8541cds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8544ds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8548cds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8555cds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8560ads/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8568mds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8569mds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8572ds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx23evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx25pdk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx28evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx31ads/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx31pdk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx35pdk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx51evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx53ard/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx53evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx53loco/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx53smd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6qarm2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6sabresd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6slevk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx6ullevk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/mx7dsabresd/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/p1010rdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/p1022ds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/p1023rdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/p1_twr/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/p2041rdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/qemu-ppce500/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/s32v234evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t102xqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t102xrdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t1040qds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t104xrdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t208xqds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t208xrdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t4qds/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/t4rdb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/freescale/vf610twr/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gaisler/gr_cpci_ax2000/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gaisler/gr_ep2s60/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gaisler/gr_xc3s_1500/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gaisler/grsim/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gaisler/grsim_leon2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gateworks/gw_ventana/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/405ep/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/405ex/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/dlvision/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/gdppc440etx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/intip/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/mpc8308/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gdsys/p1022/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ge/bx50v3/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/google/chromebook_jerry/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/google/chromebook_link/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/google/chromebook_samus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/google/chromebox_panther/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gumstix/duovero/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/gumstix/pepper/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/h2200/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/hisilicon/hikey/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/htkw/mcx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ibf-dsp561/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ids/ids8313/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ifm/ac14xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ifm/o2dnt2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/imgtec/boston/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/imgtec/malta/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/imgtec/xilfpga/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/imx31_phycore/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/in-circuit/grasshopper/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/inka4x0/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/intel/bayleybay/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/intel/cougarcanyon2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/intel/crownbay/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/intel/galileo/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/intel/minnowmax/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/inversepath/usbarmory/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/iomega/iconnect/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ip04/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ipek01/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/isee/igep0033/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/isee/igep00x0/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/jupiter/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/keymile/km82xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/keymile/km83xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/keymile/km_arm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/keymile/kmp204x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/kmc/kzm9g/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/kosagi/novena/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/l+g/vinco/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/lego/ev3/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/lg/sniper/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/liebherr/lwmon5/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/logicpd/am3517evm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/logicpd/omap3som/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/logicpd/zoom1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/microchip/pic32mzda/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/micronas/vct/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mini-box/picosam9g45/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mosaixtech/icon/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/motionpro/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mpc8308_p1m/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mpl/mip405/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mpl/pati/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mpl/pip405/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mpl/vcma9/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/mpr2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ms7720se/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ms7722se/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ms7750se/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/munices/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nokia/rx51/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/beaver/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/cardhu/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/dalmore/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/e2220-1170/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/harmony/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/jetson-tk1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/nyan-big/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/p2371-0000/Kconfig	/^config SYS_BOARD$/;"	c
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SYS_BOARD	board/nvidia/p2571/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/p2771-0000/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/seaboard/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/venice2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/ventana/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/nvidia/whistler/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_BOARD$/;"	c
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SYS_BOARD	board/openrisc/openrisc-generic/Kconfig	/^config SYS_BOARD$/;"	c
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SYS_BOARD	board/pb1x00/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/pdm360ng/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/phytec/pcm030/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/phytec/pcm051/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/phytec/pcm052/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/phytec/pcm058/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ppcag/bg0900/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/pr1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/qca/ap121/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/qca/ap143/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/qemu-mips/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/quipos/cairo/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/radxa/rock2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/raidsonic/ib62x0/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/MigoR/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/alt/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/ap325rxa/Kconfig	/^config SYS_BOARD$/;"	c
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SYS_BOARD	board/renesas/ecovec/Kconfig	/^config SYS_BOARD$/;"	c
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SYS_BOARD	board/renesas/koelsch/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/lager/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/porter/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/r0p7734/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/r2dplus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/r7780mp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/rsk7203/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/rsk7264/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/rsk7269/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/salvator-x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/sh7752evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/sh7753evb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/sh7757lcr/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/sh7763rdp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/sh7785lcr/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/silk/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/renesas/stout/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/rockchip/evb_rk3036/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/rockchip/evb_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/rockchip/evb_rk3399/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ronetix/pm9261/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ronetix/pm9263/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ronetix/pm9g45/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/arndale/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/espresso7420/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/goni/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/odroid/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/origen/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/smdk2410/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/smdk5250/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/smdk5420/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/smdkc100/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/smdkv310/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/trats/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/trats2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/samsung/universal_c210/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/sbc8349/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/sbc8548/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/sbc8641d/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/seco/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/shmin/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/siemens/corvus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/siemens/draco/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/siemens/pxm2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/siemens/rut/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/siemens/smartweb/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/siemens/taurus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/silica/pengwyn/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/socrates/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/spear/spear300/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/spear/spear310/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/spear/spear320/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/spear/spear600/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/spear/x600/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/st/stm32f429-discovery/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/st/stm32f746-disco/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/st/stv0991/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/sunxi/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/synopsys/axs10x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/sysam/amcore/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/syteco/zmx25/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/t3corp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tbs/tbs2910/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tcl/sl50/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tcm-bf518/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tcm-bf537/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/technexion/pico-imx6ul/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/technexion/tao3530/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/technexion/twister/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/technologic/ts4800/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/teejet/mt_ventoux/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/am335x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/am3517crane/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/am43xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/am57xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/beagle/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/dra7xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/evm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/ks2_evm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/omap5_uevm/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/panda/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/sdp4430/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/ti814x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ti/ti816x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/timll/devkit3250/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/timll/devkit8000/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/toradex/apalis_t30/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/toradex/colibri_imx7/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/toradex/colibri_pxa270/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/toradex/colibri_t20/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/toradex/colibri_t30/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/toradex/colibri_vf/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tplink/wdr4300/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tqc/tqm5200/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tqc/tqm834x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tqc/tqm8xx/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/tqc/tqma6/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/udoo/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/v38b/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/varisys/cyrus/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/ve8313/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/vscom/baltos/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/wandboard/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/warp/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/warp7/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/woodburn/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/work-microwave/work_92105/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xes/xpedite1000/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xes/xpedite517x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xes/xpedite520x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xes/xpedite537x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xes/xpedite550x/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xilinx/microblaze-generic/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xilinx/ppc405-generic/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/xilinx/ppc440-generic/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/zipitz2/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOARD	board/zyxel/nsa310s/Kconfig	/^config SYS_BOARD$/;"	c
SYS_BOOT0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_BOOT0	/;"	d
SYS_BOOT0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_BOOT0	/;"	d
SYS_BOOT1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_BOOT1	/;"	d
SYS_BOOT1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_BOOT1	/;"	d
SYS_BOOT2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_BOOT2	/;"	d
SYS_BOOT2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_BOOT2	/;"	d
SYS_BOOT3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_BOOT3	/;"	d
SYS_BOOT3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_BOOT3	/;"	d
SYS_BOOT4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_BOOT4	/;"	d
SYS_BOOT4	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_BOOT4	/;"	d
SYS_BOOT5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_BOOT5	/;"	d
SYS_BOOT5	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_BOOT5	/;"	d
SYS_CACHELINE_SIZE	arch/arm/Kconfig	/^config SYS_CACHELINE_SIZE$/;"	c	menu:ARM architecture
SYS_CACHE_SHIFT_5	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_5$/;"	c	menu:ARM architecture
SYS_CACHE_SHIFT_6	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_6$/;"	c	menu:ARM architecture
SYS_CACHE_SHIFT_7	arch/arm/Kconfig	/^config SYS_CACHE_SHIFT_7$/;"	c	menu:ARM architecture
SYS_CACHE_SIZE_AUTO	arch/mips/Kconfig	/^config SYS_CACHE_SIZE_AUTO$/;"	c	menu:MIPS architecture
SYS_CAR_ADDR	arch/x86/cpu/qemu/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_ADDR	arch/x86/cpu/quark/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_ADDR	arch/x86/lib/efi/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_ADDR	board/coreboot/coreboot/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_ADDR	board/google/chromebook_link/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_ADDR	board/google/chromebook_samus/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_ADDR	board/google/chromebox_panther/Kconfig	/^config SYS_CAR_ADDR$/;"	c
SYS_CAR_SIZE	arch/x86/cpu/qemu/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CAR_SIZE	arch/x86/cpu/quark/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CAR_SIZE	arch/x86/lib/efi/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CAR_SIZE	board/coreboot/coreboot/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CAR_SIZE	board/google/chromebook_link/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CAR_SIZE	board/google/chromebook_samus/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CAR_SIZE	board/google/chromebox_panther/Kconfig	/^config SYS_CAR_SIZE$/;"	c
SYS_CFG_AMP	include/configs/vexpress_common.h	/^#define SYS_CFG_AMP	/;"	d
SYS_CFG_COMPLETE	include/configs/vexpress_common.h	/^#define SYS_CFG_COMPLETE	/;"	d
SYS_CFG_DVIMODE	include/configs/vexpress_common.h	/^#define SYS_CFG_DVIMODE	/;"	d
SYS_CFG_ERR	include/configs/vexpress_common.h	/^#define SYS_CFG_ERR	/;"	d
SYS_CFG_MUXFPGA	include/configs/vexpress_common.h	/^#define SYS_CFG_MUXFPGA	/;"	d
SYS_CFG_OSC	include/configs/vexpress_common.h	/^#define SYS_CFG_OSC	/;"	d
SYS_CFG_POWER	include/configs/vexpress_common.h	/^#define SYS_CFG_POWER	/;"	d
SYS_CFG_REBOOT	include/configs/vexpress_common.h	/^#define SYS_CFG_REBOOT	/;"	d
SYS_CFG_RESET	include/configs/vexpress_common.h	/^#define SYS_CFG_RESET	/;"	d
SYS_CFG_SCC	include/configs/vexpress_common.h	/^#define SYS_CFG_SCC	/;"	d
SYS_CFG_SHUTDOWN	include/configs/vexpress_common.h	/^#define SYS_CFG_SHUTDOWN	/;"	d
SYS_CFG_SITE_DB1	include/configs/vexpress_common.h	/^#define SYS_CFG_SITE_DB1	/;"	d
SYS_CFG_SITE_DB2	include/configs/vexpress_common.h	/^#define SYS_CFG_SITE_DB2	/;"	d
SYS_CFG_SITE_MB	include/configs/vexpress_common.h	/^#define SYS_CFG_SITE_MB	/;"	d
SYS_CFG_STACK	include/configs/vexpress_common.h	/^#define SYS_CFG_STACK(/;"	d
SYS_CFG_START	include/configs/vexpress_common.h	/^#define SYS_CFG_START	/;"	d
SYS_CFG_TEMP	include/configs/vexpress_common.h	/^#define SYS_CFG_TEMP	/;"	d
SYS_CFG_VOLT	include/configs/vexpress_common.h	/^#define SYS_CFG_VOLT	/;"	d
SYS_CFG_WRITE	include/configs/vexpress_common.h	/^#define SYS_CFG_WRITE	/;"	d
SYS_CLK	board/ti/ks2_evm/board_k2g.c	/^#define SYS_CLK	/;"	d	file:
SYS_CLKSRC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CLKSRC /;"	d
SYS_CLK_FREQ	Kconfig	/^config SYS_CLK_FREQ$/;"	c	menu:Boot images
SYS_CLK_FREQ	board/sunxi/Kconfig	/^config SYS_CLK_FREQ$/;"	c
SYS_CNTRL_32S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_32S /;"	d
SYS_CNTRL_BP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_BP /;"	d
SYS_CNTRL_BT0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_BT0 /;"	d
SYS_CNTRL_BT1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_BT1 /;"	d
SYS_CNTRL_C0S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_C0S /;"	d
SYS_CNTRL_C1S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_C1S /;"	d
SYS_CNTRL_E0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_E0 /;"	d
SYS_CNTRL_E0S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_E0S /;"	d
SYS_CNTRL_E1S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_E1S /;"	d
SYS_CNTRL_EN0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_EN0 /;"	d
SYS_CNTRL_EN1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_EN1 /;"	d
SYS_CNTRL_M00	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_M00 /;"	d
SYS_CNTRL_M01	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_M01 /;"	d
SYS_CNTRL_M10	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_M10 /;"	d
SYS_CNTRL_M11	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_M11 /;"	d
SYS_CNTRL_M20	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_M20 /;"	d
SYS_CNTRL_M21	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_M21 /;"	d
SYS_CNTRL_T0S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_T0S /;"	d
SYS_CNTRL_T1S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CNTRL_T1S /;"	d
SYS_CONFIG_NAME	arch/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/arm/mach-bcm283x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Broadcom BCM283X family
SYS_CONFIG_NAME	arch/arm/mach-highbank/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/arm/mach-integrator/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Integrator Options
SYS_CONFIG_NAME	arch/arm/mach-mvebu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/arm/mach-socfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/arm/mach-uniphier/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/arm/mach-zynq/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	arch/nios2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Nios II architecture
SYS_CONFIG_NAME	arch/sandbox/Kconfig	/^config SYS_CONFIG_NAME$/;"	c	menu:Sandbox architecture
SYS_CONFIG_NAME	board/8dtech/eco5pk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Arcturus/ucp1020/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Barix/ipam390/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/BuR/brppt1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/BuR/brxre1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/BuS/eb_cpu5282/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/CarMediaLab/flea3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/LaCie/edminiv2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/LaCie/net2big_v2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/LaCie/netspace_v2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Marvell/aspenite/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Marvell/dreamplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Marvell/gplugd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Marvell/guruplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Marvell/openrd/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Marvell/sheevaplug/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Seagate/dockstar/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Seagate/goflexhome/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Seagate/nas220/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/Synology/ds109/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/a3m071/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/a4m072/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/abilis/tb100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/advantech/dms-ba16/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amazon/kc1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/acadia/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/bamboo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/bubinga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/canyonlands/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/katmai/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/kilauea/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/luan/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/makalu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/redwood/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/sequoia/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/walnut/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/yosemite/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amcc/yucca/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/amlogic/odroid-c2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/aristainetos/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/armadeus/apf27/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/armltd/vexpress/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/armltd/vexpress64/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/astro/mcf5373l/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/atmel/at91rm9200ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/atmel/at91sam9260ek/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
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SYS_CONFIG_NAME	board/ifm/ac14xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ifm/o2dnt2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/imgtec/boston/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/imgtec/malta/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/imgtec/xilfpga/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/imx31_phycore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/in-circuit/grasshopper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/inka4x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/intel/bayleybay/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/intel/cougarcanyon2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/intel/crownbay/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/intel/galileo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/intel/minnowmax/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/inversepath/usbarmory/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/iomega/iconnect/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ip04/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ipek01/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/isee/igep0033/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/isee/igep00x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/jupiter/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/keymile/km82xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/keymile/km83xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/keymile/km_arm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/keymile/kmp204x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/kmc/kzm9g/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/kosagi/novena/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/l+g/vinco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/lego/ev3/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/lg/sniper/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/liebherr/lwmon5/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/logicpd/am3517evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/logicpd/omap3som/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/logicpd/zoom1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/microchip/pic32mzda/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/micronas/vct/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mini-box/picosam9g45/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mosaixtech/icon/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/motionpro/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mpc8308_p1m/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mpl/mip405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mpl/pati/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mpl/pip405/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mpl/vcma9/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/mpr2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ms7720se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ms7722se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ms7750se/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/munices/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nokia/rx51/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/beaver/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/cardhu/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/dalmore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/e2220-1170/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/harmony/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/jetson-tk1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/nyan-big/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/p2371-0000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/p2371-2180/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/p2571/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/p2771-0000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/seaboard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/venice2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/ventana/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/nvidia/whistler/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/omicron/calimain/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/openrisc/openrisc-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/overo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/pandora/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/pb1x00/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/pdm360ng/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/phytec/pcm030/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/phytec/pcm051/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/phytec/pcm052/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/phytec/pcm058/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ppcag/bg0900/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/pr1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/qca/ap121/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/qca/ap143/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/qemu-mips/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/quipos/cairo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/radxa/rock2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/raidsonic/ib62x0/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/MigoR/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/alt/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/ap325rxa/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/blanche/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/ecovec/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/gose/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/koelsch/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/lager/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/porter/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/r0p7734/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/r2dplus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/r7780mp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/rsk7203/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/rsk7264/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/rsk7269/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/salvator-x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/sh7752evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/sh7753evb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/sh7757lcr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/sh7763rdp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/sh7785lcr/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/silk/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/renesas/stout/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/rockchip/evb_rk3036/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/rockchip/evb_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/rockchip/evb_rk3399/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ronetix/pm9261/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ronetix/pm9263/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ronetix/pm9g45/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/arndale/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/espresso7420/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/goni/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/odroid/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/origen/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/smdk2410/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/smdk5250/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/smdk5420/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/smdkc100/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/smdkv310/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/trats/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/trats2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/samsung/universal_c210/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/sbc8349/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/sbc8548/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/sbc8641d/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/seco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/shmin/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/siemens/corvus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/siemens/draco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/siemens/pxm2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/siemens/rut/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/siemens/smartweb/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/siemens/taurus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/silica/pengwyn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/socrates/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/spear/spear300/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/spear/spear310/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/spear/spear320/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/spear/spear600/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/spear/x600/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/st/stm32f429-discovery/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/st/stm32f746-disco/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/st/stv0991/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/sunxi/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/synopsys/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/synopsys/axs10x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/sysam/amcore/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/syteco/zmx25/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/t3corp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tbs/tbs2910/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tcl/sl50/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tcm-bf518/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tcm-bf537/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/technexion/pico-imx6ul/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/technexion/tao3530/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/technexion/twister/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/technologic/ts4800/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/teejet/mt_ventoux/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/am335x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/am3517crane/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/am43xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/am57xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/beagle/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/dra7xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/ks2_evm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/omap5_uevm/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/panda/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/sdp4430/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/ti814x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ti/ti816x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/timll/devkit3250/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/timll/devkit8000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/toradex/apalis_t30/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/toradex/colibri_imx7/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/toradex/colibri_pxa270/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/toradex/colibri_t20/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/toradex/colibri_t30/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/toradex/colibri_vf/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tplink/wdr4300/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tqc/tqm5200/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tqc/tqm834x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tqc/tqm8xx/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/tqc/tqma6/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/udoo/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/v38b/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/varisys/cyrus/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/ve8313/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/vscom/baltos/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/wandboard/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/warp/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/warp7/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/woodburn/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/work-microwave/work_92105/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xes/xpedite1000/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xes/xpedite517x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xes/xpedite520x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xes/xpedite537x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xes/xpedite550x/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xilinx/microblaze-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xilinx/ppc405-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/xilinx/ppc440-generic/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/zipitz2/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONFIG_NAME	board/zyxel/nsa310s/Kconfig	/^config SYS_CONFIG_NAME$/;"	c
SYS_CONSOLE_BG_COL	drivers/video/Kconfig	/^config SYS_CONSOLE_BG_COL$/;"	c	menu:Graphics support
SYS_CONSOLE_ENV_OVERWRITE	common/Kconfig	/^config SYS_CONSOLE_ENV_OVERWRITE$/;"	c	menu:Console
SYS_CONSOLE_FG_COL	drivers/video/Kconfig	/^config SYS_CONSOLE_FG_COL$/;"	c	menu:Graphics support
SYS_CONSOLE_INFO_QUIET	common/Kconfig	/^config SYS_CONSOLE_INFO_QUIET$/;"	c	menu:Console
SYS_CONSOLE_IS_IN_ENV	common/Kconfig	/^config SYS_CONSOLE_IS_IN_ENV$/;"	c	menu:Console
SYS_CONSOLE_OVERWRITE_ROUTINE	common/Kconfig	/^config SYS_CONSOLE_OVERWRITE_ROUTINE$/;"	c	menu:Console
SYS_COREBOOT	arch/x86/cpu/coreboot/Kconfig	/^config SYS_COREBOOT$/;"	c
SYS_COUNTER_CNTRL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_COUNTER_CNTRL /;"	d
SYS_COUNTER_CTRL_ENABLE	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define SYS_COUNTER_CTRL_ENABLE	/;"	d
SYS_CPU	arch/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	arch/arc/Kconfig	/^config SYS_CPU$/;"	c	menu:ARC architecture
SYS_CPU	arch/arm/Kconfig	/^config SYS_CPU$/;"	c	menu:ARM architecture
SYS_CPU	arch/mips/Kconfig	/^config SYS_CPU$/;"	c	menu:MIPS architecture
SYS_CPU	arch/powerpc/cpu/mpc512x/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc512x CPU
SYS_CPU	arch/powerpc/cpu/mpc5xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc5xx CPU
SYS_CPU	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc5xxx CPU
SYS_CPU	arch/powerpc/cpu/mpc8260/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc8260 CPU
SYS_CPU	arch/powerpc/cpu/mpc83xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc83xx CPU
SYS_CPU	arch/powerpc/cpu/mpc85xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc85xx CPU
SYS_CPU	arch/powerpc/cpu/mpc86xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc86xx CPU
SYS_CPU	arch/powerpc/cpu/mpc8xx/Kconfig	/^config SYS_CPU$/;"	c	menu:mpc8xx CPU
SYS_CPU	arch/powerpc/cpu/ppc4xx/Kconfig	/^config SYS_CPU$/;"	c	menu:ppc4xx CPU
SYS_CPU	arch/sandbox/Kconfig	/^config SYS_CPU$/;"	c	menu:Sandbox architecture
SYS_CPU	arch/sh/Kconfig	/^config SYS_CPU$/;"	c	menu:SuperH architecture
SYS_CPU	arch/sparc/Kconfig	/^config SYS_CPU$/;"	c	menu:SPARC architecture
SYS_CPU	arch/xtensa/Kconfig	/^config SYS_CPU$/;"	c	menu:Xtensa architecture
SYS_CPU	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/BuS/eb_cpu5282/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/abilis/tb100/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/astro/mcf5373l/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/barco/platinum/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/cavium/thunderx/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/cobra5272/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5208evbe/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m52277evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5235evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5249evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5253demo/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5253evbe/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5272c3/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5275evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5282evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m53017evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5329evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m5373evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m54418twr/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m54451evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m54455evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m547xevb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/m548xevb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/freescale/s32v234evb/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/sysam/amcore/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPU	board/toradex/colibri_vf/Kconfig	/^config SYS_CPU$/;"	c
SYS_CPUPLL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CPUPLL /;"	d
SYS_CS_CE0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_CE0 /;"	d
SYS_CS_CE1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_CE1 /;"	d
SYS_CS_CI2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_CI2 /;"	d
SYS_CS_CIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_CIR /;"	d
SYS_CS_CUD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_CUD /;"	d
SYS_CS_CUH	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_CUH /;"	d
SYS_CS_DE0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_DE0 /;"	d
SYS_CS_DE1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_DE1 /;"	d
SYS_CS_DI2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_DI2 /;"	d
SYS_CS_DIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_DIR /;"	d
SYS_CS_DUD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_DUD /;"	d
SYS_CS_DUH	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_DUH /;"	d
SYS_CS_ME0_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_ME0_BIT /;"	d
SYS_CS_ME0_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_ME0_MASK /;"	d
SYS_CS_ME1_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_ME1_BIT /;"	d
SYS_CS_ME1_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_ME1_MASK /;"	d
SYS_CS_MI2_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MI2_BIT /;"	d
SYS_CS_MI2_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MI2_MASK /;"	d
SYS_CS_MIR_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MIR_BIT /;"	d
SYS_CS_MIR_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MIR_MASK /;"	d
SYS_CS_MUD_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUD_BIT /;"	d
SYS_CS_MUD_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUD_MASK /;"	d
SYS_CS_MUH_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUH_BIT /;"	d
SYS_CS_MUH_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUH_MASK /;"	d
SYS_CS_MUX_AUX	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_AUX /;"	d
SYS_CS_MUX_FQ0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_FQ0 /;"	d
SYS_CS_MUX_FQ1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_FQ1 /;"	d
SYS_CS_MUX_FQ2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_FQ2 /;"	d
SYS_CS_MUX_FQ3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_FQ3 /;"	d
SYS_CS_MUX_FQ4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_FQ4 /;"	d
SYS_CS_MUX_FQ5	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_CS_MUX_FQ5 /;"	d
SYS_CTL	drivers/net/dnet.h	/^	u32 SYS_CTL;$/;"	m	struct:dnet_registers	typeref:typename:u32
SYS_DCACHE_LINE_SIZE	arch/mips/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c	menu:MIPS architecture
SYS_DCACHE_LINE_SIZE	board/dbau1x00/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_LINE_SIZE	board/micronas/vct/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_LINE_SIZE	board/pb1x00/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_LINE_SIZE	board/qca/ap121/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_LINE_SIZE	board/qca/ap143/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_LINE_SIZE	board/qemu-mips/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_LINE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_DCACHE_LINE_SIZE$/;"	c
SYS_DCACHE_OFF	arch/arc/Kconfig	/^config SYS_DCACHE_OFF$/;"	c	menu:ARC architecture
SYS_DCACHE_SIZE	arch/mips/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c	menu:MIPS architecture
SYS_DCACHE_SIZE	board/dbau1x00/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DCACHE_SIZE	board/micronas/vct/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DCACHE_SIZE	board/pb1x00/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DCACHE_SIZE	board/qca/ap121/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DCACHE_SIZE	board/qca/ap143/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DCACHE_SIZE	board/qemu-mips/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DCACHE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_DCACHE_SIZE$/;"	c
SYS_DDR_1G	board/advantech/dms-ba16/Kconfig	/^config SYS_DDR_1G$/;"	c	choice:choiceea9c8f640104
SYS_DDR_2G	board/advantech/dms-ba16/Kconfig	/^config SYS_DDR_2G$/;"	c	choice:choiceea9c8f640104
SYS_ENDIAN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_ENDIAN /;"	d
SYS_EXTRA_OPTIONS	Kconfig	/^config SYS_EXTRA_OPTIONS$/;"	c	menu:Boot images
SYS_FC_FE0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FE0 /;"	d
SYS_FC_FE1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FE1 /;"	d
SYS_FC_FE2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FE2 /;"	d
SYS_FC_FE3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FE3 /;"	d
SYS_FC_FE4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FE4 /;"	d
SYS_FC_FE5	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FE5 /;"	d
SYS_FC_FRDIV0_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV0_BIT /;"	d
SYS_FC_FRDIV0_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV0_MASK /;"	d
SYS_FC_FRDIV1_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV1_BIT /;"	d
SYS_FC_FRDIV1_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV1_MASK /;"	d
SYS_FC_FRDIV2_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV2_BIT /;"	d
SYS_FC_FRDIV2_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV2_MASK /;"	d
SYS_FC_FRDIV3_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV3_BIT /;"	d
SYS_FC_FRDIV3_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV3_MASK /;"	d
SYS_FC_FRDIV4_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV4_BIT /;"	d
SYS_FC_FRDIV4_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV4_MASK /;"	d
SYS_FC_FRDIV5_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV5_BIT /;"	d
SYS_FC_FRDIV5_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FRDIV5_MASK /;"	d
SYS_FC_FS0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FS0 /;"	d
SYS_FC_FS1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FS1 /;"	d
SYS_FC_FS2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FS2 /;"	d
SYS_FC_FS3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FS3 /;"	d
SYS_FC_FS4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FS4 /;"	d
SYS_FC_FS5	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FC_FS5 /;"	d
SYS_FRC_CLK_HZ	drivers/clk/clk_pic32.c	/^#define SYS_FRC_CLK_HZ	/;"	d	file:
SYS_FREQCTRL0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FREQCTRL0 /;"	d
SYS_FREQCTRL1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_FREQCTRL1 /;"	d
SYS_FSL_DCSR_RCPM_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define SYS_FSL_DCSR_RCPM_ADDR	/;"	d
SYS_FSL_DDR	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR$/;"	c	menu:LS102xA architecture
SYS_FSL_DDR	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR$/;"	c	menu:Layerscape architecture
SYS_FSL_DDR3	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR3$/;"	c	menu:LS102xA architecture
SYS_FSL_DDR3	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR3$/;"	c	menu:Layerscape architecture
SYS_FSL_DDR4	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR4$/;"	c	menu:LS102xA architecture
SYS_FSL_DDR4	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR4$/;"	c	menu:Layerscape architecture
SYS_FSL_DDRC_ARM_GEN3	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDRC_ARM_GEN3$/;"	c	menu:LS102xA architecture
SYS_FSL_DDRC_ARM_GEN3	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDRC_ARM_GEN3$/;"	c	menu:Layerscape architecture
SYS_FSL_DDRC_GEN4	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDRC_GEN4$/;"	c	menu:LS102xA architecture
SYS_FSL_DDRC_GEN4	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDRC_GEN4$/;"	c	menu:Layerscape architecture
SYS_FSL_DDR_BE	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_BE$/;"	c	menu:LS102xA architecture
SYS_FSL_DDR_BE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_BE$/;"	c	menu:Layerscape architecture
SYS_FSL_DDR_LE	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_LE$/;"	c	menu:Layerscape architecture
SYS_FSL_DDR_VER	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_VER$/;"	c	menu:LS102xA architecture
SYS_FSL_DDR_VER	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_VER$/;"	c	menu:Layerscape architecture
SYS_FSL_DDR_VER_50	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_DDR_VER_50$/;"	c	menu:LS102xA architecture
SYS_FSL_DDR_VER_50	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_DDR_VER_50$/;"	c	menu:Layerscape architecture
SYS_FSL_ERRATUM_A010315	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_ERRATUM_A010315$/;"	c	menu:LS102xA architecture
SYS_FSL_ERRATUM_A010315	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_ERRATUM_A010315$/;"	c	menu:Layerscape architecture
SYS_FSL_ERRATUM_A010539	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_ERRATUM_A010539$/;"	c	menu:Layerscape architecture
SYS_FSL_GIC_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define SYS_FSL_GIC_ADDR	/;"	d
SYS_FSL_HAS_DP_DDR	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_HAS_DP_DDR$/;"	c	menu:Layerscape architecture
SYS_FSL_IFC_BANK_COUNT	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_IFC_BANK_COUNT$/;"	c	menu:LS102xA architecture
SYS_FSL_IFC_BANK_COUNT	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_IFC_BANK_COUNT$/;"	c	menu:Layerscape architecture
SYS_FSL_MMDC	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_MMDC$/;"	c	menu:Layerscape architecture
SYS_FSL_SRDS_1	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_SRDS_1$/;"	c	menu:LS102xA architecture
SYS_FSL_SRDS_1	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_SRDS_1$/;"	c	menu:Layerscape architecture
SYS_FSL_SRDS_2	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_FSL_SRDS_2$/;"	c	menu:LS102xA architecture
SYS_FSL_SRDS_2	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_FSL_SRDS_2$/;"	c	menu:Layerscape architecture
SYS_GREEN_LED	board/zyxel/nsa310s/nsa310s.h	/^#define SYS_GREEN_LED	/;"	d
SYS_HAS_SERDES	arch/arm/cpu/armv7/ls102xa/Kconfig	/^config SYS_HAS_SERDES$/;"	c	menu:LS102xA architecture
SYS_HAS_SERDES	arch/arm/cpu/armv8/fsl-layerscape/Kconfig	/^config SYS_HAS_SERDES$/;"	c	menu:Layerscape architecture
SYS_HZ	lib/Kconfig	/^config SYS_HZ$/;"	c	menu:Library routines
SYS_I2C_AT91	drivers/i2c/Kconfig	/^config SYS_I2C_AT91$/;"	c	menu:I2C support
SYS_I2C_CADENCE	drivers/i2c/Kconfig	/^config SYS_I2C_CADENCE$/;"	c	menu:I2C support
SYS_I2C_DUTY	drivers/i2c/adi_i2c.c	/^#define SYS_I2C_DUTY /;"	d	file:
SYS_I2C_DW	drivers/i2c/Kconfig	/^config SYS_I2C_DW$/;"	c	menu:I2C support
SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED	drivers/i2c/Kconfig	/^config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED$/;"	c	menu:I2C support
SYS_I2C_FSL	drivers/i2c/Kconfig	/^config SYS_I2C_FSL$/;"	c	menu:I2C support
SYS_I2C_INTEL	drivers/i2c/Kconfig	/^config SYS_I2C_INTEL$/;"	c	menu:I2C support
SYS_I2C_MVTWSI	drivers/i2c/Kconfig	/^config SYS_I2C_MVTWSI$/;"	c	menu:I2C support
SYS_I2C_ROCKCHIP	drivers/i2c/Kconfig	/^config SYS_I2C_ROCKCHIP$/;"	c	menu:I2C support
SYS_I2C_SANDBOX	drivers/i2c/Kconfig	/^config SYS_I2C_SANDBOX$/;"	c	menu:I2C support
SYS_I2C_UNIPHIER	drivers/i2c/Kconfig	/^config SYS_I2C_UNIPHIER$/;"	c	menu:I2C support
SYS_I2C_UNIPHIER_F	drivers/i2c/Kconfig	/^config SYS_I2C_UNIPHIER_F$/;"	c	menu:I2C support
SYS_ICACHE_LINE_SIZE	arch/mips/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c	menu:MIPS architecture
SYS_ICACHE_LINE_SIZE	board/dbau1x00/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_LINE_SIZE	board/micronas/vct/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_LINE_SIZE	board/pb1x00/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_LINE_SIZE	board/qca/ap121/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_LINE_SIZE	board/qca/ap143/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_LINE_SIZE	board/qemu-mips/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_LINE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_ICACHE_LINE_SIZE$/;"	c
SYS_ICACHE_OFF	arch/arc/Kconfig	/^config SYS_ICACHE_OFF$/;"	c	menu:ARC architecture
SYS_ICACHE_SIZE	arch/mips/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c	menu:MIPS architecture
SYS_ICACHE_SIZE	board/dbau1x00/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ICACHE_SIZE	board/micronas/vct/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ICACHE_SIZE	board/pb1x00/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ICACHE_SIZE	board/qca/ap121/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ICACHE_SIZE	board/qca/ap143/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ICACHE_SIZE	board/qemu-mips/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ICACHE_SIZE	board/tplink/wdr4300/Kconfig	/^config SYS_ICACHE_SIZE$/;"	c
SYS_ID	include/configs/vexpress_common.h	/^#define SYS_ID	/;"	d
SYS_L2CACHE_OFF	arch/arm/Kconfig	/^config SYS_L2CACHE_OFF$/;"	c	menu:ARM architecture
SYS_LITTLE_ENDIAN	arch/mips/Kconfig	/^config SYS_LITTLE_ENDIAN$/;"	c	choice:MIPS architecture""choiced4351f5b0204
SYS_MALLOC_CLEAR_ON_INIT	Kconfig	/^	config SYS_MALLOC_CLEAR_ON_INIT$/;"	c	menu:General setup
SYS_MALLOC_F	Kconfig	/^config SYS_MALLOC_F$/;"	c	menu:General setup
SYS_MALLOC_F_LEN	Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:General setup
SYS_MALLOC_F_LEN	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/arm/mach-integrator/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:Integrator Options
SYS_MALLOC_F_LEN	arch/arm/mach-meson/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/arm/mach-rockchip/rk3399/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/arm/mach-tegra/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/arm/mach-zynq/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c
SYS_MALLOC_F_LEN	arch/x86/Kconfig	/^config SYS_MALLOC_F_LEN$/;"	c	menu:x86 architecture
SYS_MIPS_CACHE_INIT_RAM_LOAD	arch/mips/Kconfig	/^config SYS_MIPS_CACHE_INIT_RAM_LOAD$/;"	c	menu:MIPS architecture
SYS_NAND_BUSWIDTH_16BIT	drivers/mtd/nand/Kconfig	/^config SYS_NAND_BUSWIDTH_16BIT$/;"	c	menu:NAND Device Support
SYS_NAND_DENALI_64BIT	drivers/mtd/nand/Kconfig	/^config SYS_NAND_DENALI_64BIT$/;"	c	menu:NAND Device Support
SYS_NAND_SELF_INIT	drivers/mtd/nand/Kconfig	/^config SYS_NAND_SELF_INIT$/;"	c	menu:NAND Device Support
SYS_NAND_U_BOOT_LOCATIONS	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_LOCATIONS$/;"	c	menu:NAND Device Support
SYS_NAND_U_BOOT_OFFS	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_OFFS$/;"	c	menu:NAND Device Support
SYS_NAND_U_BOOT_OFFS_REDUND	drivers/mtd/nand/Kconfig	/^config SYS_NAND_U_BOOT_OFFS_REDUND$/;"	c	menu:NAND Device Support
SYS_NAND_VF610_NFC_45_ECC_BYTES	drivers/mtd/nand/Kconfig	/^config SYS_NAND_VF610_NFC_45_ECC_BYTES$/;"	c	choice:NAND Device Support""choice827746d80104
SYS_NAND_VF610_NFC_60_ECC_BYTES	drivers/mtd/nand/Kconfig	/^config SYS_NAND_VF610_NFC_60_ECC_BYTES$/;"	c	choice:NAND Device Support""choice827746d80104
SYS_NIRQ1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_NIRQ1	/;"	d
SYS_NIRQ1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_NIRQ1	/;"	d
SYS_NIRQ2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define SYS_NIRQ2	/;"	d
SYS_NIRQ2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_NIRQ2	/;"	d
SYS_NO_FLASH	common/Kconfig	/^config SYS_NO_FLASH$/;"	c
SYS_NRESPWRON	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_NRESPWRON	/;"	d
SYS_NRESWARM	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_NRESWARM	/;"	d
SYS_NS16550	drivers/serial/Kconfig	/^config SYS_NS16550$/;"	c	menu:Serial drivers
SYS_NUM_IRQS	arch/x86/include/asm/interrupt.h	/^#define SYS_NUM_IRQS	/;"	d
SYS_ORANGE_LED	board/zyxel/nsa310s/nsa310s.h	/^#define SYS_ORANGE_LED	/;"	d
SYS_OS_BASE	common/spl/Kconfig	/^config SYS_OS_BASE$/;"	c	menu:SPL / TPL
SYS_OUTPUTCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_OUTPUTCLR /;"	d
SYS_OUTPUTRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_OUTPUTRD /;"	d
SYS_OUTPUTSET	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_OUTPUTSET /;"	d
SYS_PF_A97	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_A97	/;"	d
SYS_PF_CK4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_CK4	/;"	d
SYS_PF_CK5	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_CK5	/;"	d
SYS_PF_I2D	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_I2D	/;"	d
SYS_PF_I2S	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_I2S	/;"	d
SYS_PF_IRF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_IRF	/;"	d
SYS_PF_NI2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_NI2	/;"	d
SYS_PF_RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_RD	/;"	d
SYS_PF_S0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_S0	/;"	d
SYS_PF_SRC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_SRC	/;"	d
SYS_PF_U0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_U0	/;"	d
SYS_PF_U1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_U1	/;"	d
SYS_PF_U2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_U2	/;"	d
SYS_PF_U3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_U3	/;"	d
SYS_PF_UR3	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_UR3	/;"	d
SYS_PF_USB	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PF_USB	/;"	d
SYS_PINFUNC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PINFUNC /;"	d
SYS_PININPUTEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PININPUTEN /;"	d
SYS_PINSTATERD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_PINSTATERD /;"	d
SYS_POSC_CLK_HZ	drivers/clk/clk_pic32.c	/^#define SYS_POSC_CLK_HZ	/;"	d	file:
SYS_POWERCTRL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_POWERCTRL /;"	d
SYS_PROMPT	cmd/Kconfig	/^config SYS_PROMPT$/;"	c	menu:Command line interface
SYS_PWR_REQ	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define SYS_PWR_REQ	/;"	d
SYS_REG_BK_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_BK_MASK	/;"	d
SYS_REG_BK_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_BK_SHIFT(/;"	d
SYS_REG_BW_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_BW_MASK	/;"	d
SYS_REG_BW_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_BW_SHIFT(/;"	d
SYS_REG_CHINFO_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_CHINFO_SHIFT(/;"	d
SYS_REG_COL_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_COL_MASK	/;"	d
SYS_REG_COL_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_COL_SHIFT(/;"	d
SYS_REG_CS0_ROW_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_CS0_ROW_MASK	/;"	d
SYS_REG_CS0_ROW_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_CS0_ROW_SHIFT(/;"	d
SYS_REG_CS1_ROW_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_CS1_ROW_MASK	/;"	d
SYS_REG_CS1_ROW_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_CS1_ROW_SHIFT(/;"	d
SYS_REG_DBW_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_DBW_MASK	/;"	d
SYS_REG_DBW_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_DBW_SHIFT(/;"	d
SYS_REG_DDRTYPE_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_DDRTYPE_MASK	/;"	d
SYS_REG_DDRTYPE_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_DDRTYPE_SHIFT	/;"	d
SYS_REG_NUM_CH_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_NUM_CH_MASK	/;"	d
SYS_REG_NUM_CH_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_NUM_CH_SHIFT	/;"	d
SYS_REG_RANK_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_RANK_MASK	/;"	d
SYS_REG_RANK_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_RANK_SHIFT(/;"	d
SYS_REG_ROW_3_4_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_ROW_3_4_MASK	/;"	d
SYS_REG_ROW_3_4_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define SYS_REG_ROW_3_4_SHIFT(/;"	d
SYS_RST	arch/x86/include/asm/processor.h	/^	SYS_RST		= 1 << 1,	\/* 0 for soft reset, 1 for hard reset *\/$/;"	e	enum:__anon33354ee00103
SYS_RTCMATCH0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_RTCMATCH0 /;"	d
SYS_RTCMATCH1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_RTCMATCH1 /;"	d
SYS_RTCMATCH2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_RTCMATCH2 /;"	d
SYS_RTCREAD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_RTCREAD /;"	d
SYS_RTCTRIM	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_RTCTRIM /;"	d
SYS_RTCWRITE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_RTCWRITE /;"	d
SYS_SCRATCH0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_SCRATCH0 /;"	d
SYS_SCRATCH1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_SCRATCH1 /;"	d
SYS_SLEEP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_SLEEP /;"	d
SYS_SLPPWR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_SLPPWR /;"	d
SYS_SOC	arch/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv7/mx5/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv7/mx6/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv7/mx7/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv7/omap3/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv7/omap4/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv7/omap5/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-at91/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-bcm283x/Kconfig	/^config SYS_SOC$/;"	c	menu:Broadcom BCM283X family
SYS_SOC	arch/arm/mach-davinci/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-exynos/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-highbank/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-keystone/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-kirkwood/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-meson/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-mvebu/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-orion5x/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-rmobile/Kconfig.32	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-rmobile/Kconfig.64	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-rockchip/rk3036/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-rockchip/rk3288/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-rockchip/rk3399/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-s5pc1xx/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-snapdragon/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-socfpga/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-tegra/tegra114/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-tegra/tegra124/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-tegra/tegra186/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-tegra/tegra20/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-tegra/tegra210/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-tegra/tegra30/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/arm/mach-zynq/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	arch/mips/mach-ath79/Kconfig	/^config SYS_SOC$/;"	c	menu:QCA/Atheros 7xxx/9xxx platforms
SYS_SOC	arch/mips/mach-pic32/Kconfig	/^config SYS_SOC$/;"	c	menu:Microchip PIC32 platforms
SYS_SOC	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/BuR/brppt1/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/BuR/brxre1/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/CarMediaLab/flea3/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/Marvell/aspenite/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/Marvell/gplugd/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/advantech/dms-ba16/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/armadeus/apf27/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/atmel/atngw100/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/atmel/atngw100mkii/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/atmel/atstk1000/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/birdland/bav335x/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/bluegiga/apx4devkit/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/bosch/shc/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/broadcom/bcmcygnus/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/broadcom/bcmnsp/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/cirrus/edb93xx/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/compulab/cm_t335/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/compulab/cm_t43/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/coreboot/coreboot/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/creative/xfi3/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/dbau1x00/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/denx/m28evk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/denx/m53evk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/dfi/dfi-bt700/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/efi/efi-x86/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/emulation/qemu-x86/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1012afrdm/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1012aqds/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1012ardb/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1021aqds/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1021atwr/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1043aqds/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1043ardb/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1046aqds/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls1046ardb/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls2080a/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls2080aqds/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/ls2080ardb/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx23evk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx25pdk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx28evk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx31ads/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx31pdk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx35pdk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx51evk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx53ard/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx53evk/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx53loco/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/mx53smd/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/s32v234evb/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/freescale/vf610twr/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/ge/bx50v3/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/google/chromebook_link/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/google/chromebook_samus/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/google/chromebox_panther/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/gumstix/pepper/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/hisilicon/hikey/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/imx31_phycore/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/in-circuit/grasshopper/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/intel/bayleybay/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/intel/cougarcanyon2/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/intel/crownbay/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/intel/galileo/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/intel/minnowmax/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/isee/igep0033/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/mpl/vcma9/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/pb1x00/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/phytec/pcm051/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/phytec/pcm052/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/ppcag/bg0900/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/renesas/salvator-x/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/samsung/goni/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/samsung/smdk2410/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/samsung/smdkc100/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/siemens/draco/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/siemens/pxm2/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/siemens/rut/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/silica/pengwyn/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/spear/spear300/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/spear/spear310/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/spear/spear320/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/spear/spear600/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/spear/x600/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/st/stm32f429-discovery/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/st/stm32f746-disco/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/st/stv0991/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/sunxi/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/syteco/zmx25/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/tcl/sl50/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/technexion/pico-imx6ul/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/technologic/ts4800/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/ti/am335x/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/ti/am43xx/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/ti/ti814x/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/ti/ti816x/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/timll/devkit3250/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/toradex/colibri_vf/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/tplink/wdr4300/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/vscom/baltos/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/woodburn/Kconfig	/^config SYS_SOC$/;"	c
SYS_SOC	board/work-microwave/work_92105/Kconfig	/^config SYS_SOC$/;"	c
SYS_SPARC_NWINDOWS	arch/sparc/Kconfig	/^config SYS_SPARC_NWINDOWS$/;"	c	menu:SPARC architecture
SYS_STDIO_DEREGISTER	common/Kconfig	/^config SYS_STDIO_DEREGISTER$/;"	c	menu:Console
SYS_TEXT_BASE	Kconfig	/^config SYS_TEXT_BASE$/;"	c	menu:Boot images
SYS_TEXT_BASE	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/coreboot/coreboot/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/dbau1x00/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/dfi/dfi-bt700/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/emulation/qemu-x86/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/google/chromebook_link/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/google/chromebook_samus/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/google/chromebox_panther/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/imgtec/boston/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/imgtec/malta/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/imgtec/xilfpga/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/intel/bayleybay/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/intel/cougarcanyon2/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/intel/crownbay/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/intel/galileo/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/intel/minnowmax/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/microchip/pic32mzda/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/micronas/vct/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/pb1x00/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/qca/ap121/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/qca/ap143/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/qemu-mips/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TEXT_BASE	board/tplink/wdr4300/Kconfig	/^config SYS_TEXT_BASE$/;"	c
SYS_TOYMATCH0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TOYMATCH0 /;"	d
SYS_TOYMATCH1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TOYMATCH1 /;"	d
SYS_TOYMATCH2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TOYMATCH2 /;"	d
SYS_TOYREAD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TOYREAD /;"	d
SYS_TOYTRIM	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TOYTRIM /;"	d
SYS_TOYWRITE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TOYWRITE /;"	d
SYS_TRIOUTCLR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TRIOUTCLR /;"	d
SYS_TRIOUTRD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_TRIOUTRD /;"	d
SYS_USB_EVENT_POLL	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL$/;"	c	choice:choiced4ee1e2d0104
SYS_USB_EVENT_POLL_VIA_CONTROL_EP	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL_VIA_CONTROL_EP$/;"	c	choice:choiced4ee1e2d0104
SYS_USB_EVENT_POLL_VIA_INT_QUEUE	drivers/usb/Kconfig	/^	config SYS_USB_EVENT_POLL_VIA_INT_QUEUE$/;"	c	choice:choiced4ee1e2d0104
SYS_VENDOR	arch/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	arch/arm/mach-bcm283x/Kconfig	/^config SYS_VENDOR$/;"	c	menu:Broadcom BCM283X family
SYS_VENDOR	arch/arm/mach-integrator/Kconfig	/^config SYS_VENDOR$/;"	c	menu:Integrator Options
SYS_VENDOR	arch/arm/mach-mvebu/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	arch/arm/mach-socfpga/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	arch/arm/mach-zynq/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	arch/sparc/Kconfig	/^config SYS_VENDOR$/;"	c	menu:SPARC architecture
SYS_VENDOR	board/8dtech/eco5pk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/AndesTech/adp-ag101p/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Arcturus/ucp1020/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Barix/ipam390/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/BuR/brppt1/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/BuR/brxre1/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/BuS/eb_cpu5282/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/CarMediaLab/flea3/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/LaCie/edminiv2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/LaCie/net2big_v2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/LaCie/netspace_v2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Marvell/aspenite/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Marvell/dreamplug/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Marvell/gplugd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Marvell/guruplug/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Marvell/openrd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Marvell/sheevaplug/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Seagate/dockstar/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Seagate/goflexhome/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Seagate/nas220/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/Synology/ds109/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/abilis/tb100/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/advantech/dms-ba16/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/advantech/som-db5800-som-6867/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/alphaproject/ap_sh4a_4a/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amazon/kc1/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/acadia/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/bamboo/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/bubinga/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/canyonlands/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/katmai/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/kilauea/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/luan/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/makalu/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/redwood/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/sequoia/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/walnut/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/yosemite/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amcc/yucca/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/amlogic/odroid-c2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/armadeus/apf27/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/armltd/vexpress/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/armltd/vexpress64/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/astro/mcf5373l/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmark-techno/armadillo-800eva/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91rm9200ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9260ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9261ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9263ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9m10g45ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9n12ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9rlek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/at91sam9x5ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/atngw100/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/atngw100mkii/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/atstk1000/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/sama5d2_ptc/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/sama5d2_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/sama5d3_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/sama5d3xek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/sama5d4_xplained/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/atmel/sama5d4ek/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/avionic-design/medcom-wide/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/avionic-design/plutux/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/avionic-design/tec-ng/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/avionic-design/tec/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/bachmann/ot1200/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/barco/platinum/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/barco/titanium/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/birdland/bav335x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/bluegiga/apx4devkit/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/bluewater/gurnard/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/bluewater/snapper9260/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/bosch/shc/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/boundary/nitrogen6x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/broadcom/bcm23550_w1d/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/broadcom/bcm28155_ap/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/broadcom/bcmcygnus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/broadcom/bcmnsp/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/buffalo/lsxl/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/cadence/xtfpga/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/calao/usb_a9263/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/cavium/thunderx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ccv/xpress/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/cei/cei-tk1-som/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/chipspark/popmetal_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/cirrus/edb93xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/cloudengines/pogo_e02/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compal/paz00/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/cm_fx6/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/cm_t335/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/cm_t35/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/cm_t3517/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/cm_t43/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/cm_t54/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/compulab/trimslice/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/congatec/cgtqmx6eval/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/congatec/conga-qeval20-qa3-e3845/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/coreboot/coreboot/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/corscience/tricorder/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/creative/xfi3/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/d-link/dns325/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/davedenx/aria/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/davinci/da8xxevm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/davinci/ea20/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/denx/m28evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/denx/m53evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/denx/ma5d4evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/dfi/dfi-bt700/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/efi/efi-x86/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/egnite/ethernut5/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/el/el6x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/embest/mx6boards/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/emulation/qemu-x86/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/engicam/icorem6/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/cpci2dp/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/cpci405/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/mecp5123/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/meesc/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/plu405/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/pmc405de/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/pmc440/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/vme8349/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/esd/vom405/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/firefly/firefly-rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/b4860qds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/bsc9131rdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/bsc9132qds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/c29xpcie/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/corenet_ds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1012afrdm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1012aqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1012ardb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1021aqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1021atwr/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1043aqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1043ardb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1046aqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls1046ardb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls2080a/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls2080aqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/ls2080ardb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5208evbe/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m52277evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5235evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5249evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5253demo/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5253evbe/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5272c3/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5275evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5282evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m53017evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5329evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m5373evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m54418twr/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m54451evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m54455evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m547xevb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/m548xevb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc5121ads/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8308rdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8313erdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8315erdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8323erdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc832xemds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8349emds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8349itx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc837xemds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc837xerdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8536ds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8540ads/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8541cds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8544ds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8548cds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8555cds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8560ads/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8568mds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8569mds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8572ds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8610hpcd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mpc8641hpcn/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx23evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx25pdk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx28evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx31ads/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx31pdk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx35pdk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx51evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx53ard/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx53evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx53loco/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx53smd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6qarm2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6qsabreauto/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6sabresd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6slevk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6sxsabreauto/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6sxsabresd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6ul_14x14_evk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx6ullevk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/mx7dsabresd/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/p1010rdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/p1022ds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/p1023rdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/p1_p2_rdb_pc/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/p1_twr/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/p2041rdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/qemu-ppce500/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/s32v234evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t102xqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t102xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t1040qds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t104xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t208xqds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t208xrdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t4qds/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/t4rdb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/freescale/vf610twr/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gateworks/gw_ventana/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/405ep/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/405ex/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/dlvision/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/gdppc440etx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/intip/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/mpc8308/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gdsys/p1022/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ge/bx50v3/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/google/chromebook_jerry/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/google/chromebook_link/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/google/chromebook_samus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/google/chromebox_panther/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gumstix/duovero/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/gumstix/pepper/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/hisilicon/hikey/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/htkw/mcx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ids/ids8313/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ifm/ac14xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ifm/o2dnt2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/imgtec/boston/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/imgtec/malta/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/imgtec/xilfpga/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/in-circuit/grasshopper/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/intel/bayleybay/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/intel/cougarcanyon2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/intel/crownbay/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/intel/galileo/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/intel/minnowmax/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/intercontrol/digsy_mtc/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/inversepath/usbarmory/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/iomega/iconnect/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/isee/igep0033/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/isee/igep00x0/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/keymile/km82xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/keymile/km83xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/keymile/km_arm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/keymile/kmp204x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/kmc/kzm9g/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/kosagi/novena/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/l+g/vinco/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/lego/ev3/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/lg/sniper/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/liebherr/lwmon5/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/logicpd/am3517evm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/logicpd/omap3som/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/logicpd/zoom1/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/microchip/pic32mzda/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/micronas/vct/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/mini-box/picosam9g45/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/mosaixtech/icon/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/mpl/mip405/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/mpl/pati/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/mpl/pip405/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/mpl/vcma9/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nokia/rx51/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/beaver/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/cardhu/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/dalmore/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/e2220-1170/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/harmony/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/jetson-tk1/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/nyan-big/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/p2371-0000/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/p2371-2180/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/p2571/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/p2771-0000/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/seaboard/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/venice2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/ventana/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/nvidia/whistler/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/olimex/mx23_olinuxino/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/omicron/calimain/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/openrisc/openrisc-generic/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/phytec/pcm030/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/phytec/pcm051/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/phytec/pcm052/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/phytec/pcm058/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ppcag/bg0900/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/qca/ap121/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/qca/ap143/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/qualcomm/dragonboard410c/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/quipos/cairo/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/radxa/rock2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/raidsonic/ib62x0/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/MigoR/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/alt/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/ap325rxa/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/blanche/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/ecovec/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/gose/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/koelsch/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/lager/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/porter/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/r0p7734/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/r2dplus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/r7780mp/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/rsk7203/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/rsk7264/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/rsk7269/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/salvator-x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/sh7752evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/sh7753evb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/sh7757lcr/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/sh7763rdp/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/sh7785lcr/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/silk/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/renesas/stout/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/rockchip/evb_rk3036/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/rockchip/evb_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/rockchip/evb_rk3399/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/rockchip/fennec_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/rockchip/kylin_rk3036/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/rockchip/miniarm_rk3288/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ronetix/pm9261/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ronetix/pm9263/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ronetix/pm9g45/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/arndale/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/espresso7420/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/goni/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/odroid/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/origen/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/smdk2410/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/smdk5250/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/smdk5420/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/smdkc100/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/smdkv310/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/trats/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/trats2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/samsung/universal_c210/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/sandisk/sansa_fuze_plus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/schulercontrol/sc_sps_1/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/seco/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/siemens/corvus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/siemens/draco/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/siemens/pxm2/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/siemens/rut/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/siemens/smartweb/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/siemens/taurus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/silica/pengwyn/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/solidrun/mx6cuboxi/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/spear/spear300/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/spear/spear310/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/spear/spear320/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/spear/spear600/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/spear/x600/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/st/stm32f429-discovery/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/st/stm32f746-disco/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/st/stv0991/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/synopsys/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/synopsys/axs10x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/sysam/amcore/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/syteco/zmx25/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tbs/tbs2910/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tcl/sl50/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/technexion/pico-imx6ul/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/technexion/tao3530/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/technexion/twister/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/technologic/ts4800/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/teejet/mt_ventoux/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/am335x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/am3517crane/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/am43xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/am57xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/beagle/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/dra7xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/evm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/ks2_evm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/omap5_uevm/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/panda/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/sdp4430/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/ti814x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/ti/ti816x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/timll/devkit3250/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/timll/devkit8000/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/toradex/apalis_t30/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/toradex/colibri_imx7/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/toradex/colibri_pxa270/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/toradex/colibri_t20/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/toradex/colibri_t30/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/toradex/colibri_vf/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tplink/wdr4300/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tqc/tqm5200/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tqc/tqm834x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tqc/tqm8xx/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/tqc/tqma6/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/varisys/cyrus/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/vscom/baltos/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/work-microwave/work_92105/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xes/xpedite1000/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xes/xpedite517x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xes/xpedite520x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xes/xpedite537x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xes/xpedite550x/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xilinx/microblaze-generic/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xilinx/ppc405-generic/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/xilinx/ppc440-generic/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_VENDOR	board/zyxel/nsa310s/Kconfig	/^config SYS_VENDOR$/;"	c
SYS_WAKEMSK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_WAKEMSK /;"	d
SYS_WAKESRC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define SYS_WAKESRC /;"	d
SYS_X86_START16	arch/x86/Kconfig	/^config SYS_X86_START16$/;"	c	menu:x86 architecture
SZ	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define SZ	/;"	d
SZREG	arch/mips/include/asm/asm.h	/^#define SZREG	/;"	d
SZ_1	include/linux/sizes.h	/^#define SZ_1	/;"	d
SZ_128	include/linux/sizes.h	/^#define SZ_128	/;"	d
SZ_128K	include/linux/sizes.h	/^#define SZ_128K	/;"	d
SZ_128M	include/linux/sizes.h	/^#define SZ_128M	/;"	d
SZ_16	include/linux/sizes.h	/^#define SZ_16	/;"	d
SZ_16K	arch/powerpc/include/asm/mmu.h	/^#define SZ_16K	/;"	d
SZ_16K	include/linux/sizes.h	/^#define SZ_16K	/;"	d
SZ_16M	arch/powerpc/include/asm/mmu.h	/^#define SZ_16M	/;"	d
SZ_16M	include/linux/sizes.h	/^#define SZ_16M	/;"	d
SZ_1G	include/linux/sizes.h	/^#define SZ_1G	/;"	d
SZ_1K	arch/powerpc/include/asm/mmu.h	/^#define SZ_1K	/;"	d
SZ_1K	include/linux/sizes.h	/^#define SZ_1K	/;"	d
SZ_1M	arch/powerpc/include/asm/mmu.h	/^#define SZ_1M	/;"	d
SZ_1M	include/linux/sizes.h	/^#define SZ_1M	/;"	d
SZ_2	include/linux/sizes.h	/^#define SZ_2	/;"	d
SZ_256	include/linux/sizes.h	/^#define SZ_256	/;"	d
SZ_256K	arch/powerpc/include/asm/mmu.h	/^#define SZ_256K	/;"	d
SZ_256K	include/linux/sizes.h	/^#define SZ_256K	/;"	d
SZ_256M	arch/powerpc/include/asm/mmu.h	/^#define SZ_256M	/;"	d
SZ_256M	board/armltd/integrator/pci.c	/^#define SZ_256M	/;"	d	file:
SZ_256M	include/linux/sizes.h	/^#define SZ_256M	/;"	d
SZ_2G	include/linux/sizes.h	/^#define SZ_2G	/;"	d
SZ_2K	include/linux/sizes.h	/^#define SZ_2K	/;"	d
SZ_2M	include/linux/sizes.h	/^#define SZ_2M	/;"	d
SZ_32	include/linux/sizes.h	/^#define SZ_32	/;"	d
SZ_32K	include/linux/sizes.h	/^#define SZ_32K	/;"	d
SZ_32M	include/linux/sizes.h	/^#define SZ_32M	/;"	d
SZ_4	include/linux/sizes.h	/^#define SZ_4	/;"	d
SZ_4K	arch/powerpc/include/asm/mmu.h	/^#define SZ_4K	/;"	d
SZ_4K	include/linux/sizes.h	/^#define SZ_4K	/;"	d
SZ_4M	include/linux/sizes.h	/^#define SZ_4M	/;"	d
SZ_512	include/linux/sizes.h	/^#define SZ_512	/;"	d
SZ_512K	include/linux/sizes.h	/^#define SZ_512K	/;"	d
SZ_512M	include/linux/sizes.h	/^#define SZ_512M	/;"	d
SZ_64	include/linux/sizes.h	/^#define SZ_64	/;"	d
SZ_64K	arch/powerpc/include/asm/mmu.h	/^#define SZ_64K	/;"	d
SZ_64K	include/linux/sizes.h	/^#define SZ_64K	/;"	d
SZ_64M	include/linux/sizes.h	/^#define SZ_64M	/;"	d
SZ_8	include/linux/sizes.h	/^#define SZ_8	/;"	d
SZ_8K	include/linux/sizes.h	/^#define SZ_8K	/;"	d
SZ_8M	include/linux/sizes.h	/^#define SZ_8M	/;"	d
SZ_DEC_1M	arch/arm/cpu/armv7/mx5/clock.c	/^#define SZ_DEC_1M /;"	d	file:
SZ_ERROR_ARCHIVE	lib/lzma/Types.h	/^#define SZ_ERROR_ARCHIVE /;"	d
SZ_ERROR_CRC	lib/lzma/Types.h	/^#define SZ_ERROR_CRC /;"	d
SZ_ERROR_DATA	lib/lzma/Types.h	/^#define SZ_ERROR_DATA /;"	d
SZ_ERROR_FAIL	lib/lzma/Types.h	/^#define SZ_ERROR_FAIL /;"	d
SZ_ERROR_INPUT_EOF	lib/lzma/Types.h	/^#define SZ_ERROR_INPUT_EOF /;"	d
SZ_ERROR_MEM	lib/lzma/Types.h	/^#define SZ_ERROR_MEM /;"	d
SZ_ERROR_NO_ARCHIVE	lib/lzma/Types.h	/^#define SZ_ERROR_NO_ARCHIVE /;"	d
SZ_ERROR_OUTPUT_EOF	lib/lzma/Types.h	/^#define SZ_ERROR_OUTPUT_EOF /;"	d
SZ_ERROR_PARAM	lib/lzma/Types.h	/^#define SZ_ERROR_PARAM /;"	d
SZ_ERROR_PROGRESS	lib/lzma/Types.h	/^#define SZ_ERROR_PROGRESS /;"	d
SZ_ERROR_READ	lib/lzma/Types.h	/^#define SZ_ERROR_READ /;"	d
SZ_ERROR_THREAD	lib/lzma/Types.h	/^#define SZ_ERROR_THREAD /;"	d
SZ_ERROR_UNSUPPORTED	lib/lzma/Types.h	/^#define SZ_ERROR_UNSUPPORTED /;"	d
SZ_ERROR_WRITE	lib/lzma/Types.h	/^#define SZ_ERROR_WRITE /;"	d
SZ_OK	lib/lzma/Types.h	/^#define SZ_OK /;"	d
SZ_SEEK_CUR	lib/lzma/Types.h	/^  SZ_SEEK_CUR = 1,$/;"	e	enum:__anonf2a2f1b90503
SZ_SEEK_END	lib/lzma/Types.h	/^  SZ_SEEK_END = 2$/;"	e	enum:__anonf2a2f1b90503
SZ_SEEK_SET	lib/lzma/Types.h	/^  SZ_SEEK_SET = 0,$/;"	e	enum:__anonf2a2f1b90503
S_APPEND	fs/ubifs/ubifs.h	/^#define S_APPEND	/;"	d
S_BOOLEAN	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
S_BOOLEAN	scripts/kconfig/zconf.y	/^	case S_BOOLEAN:$/;"	l
S_BUSY	include/scsi.h	/^#define	S_BUSY	/;"	d
S_CHECK_COND	include/scsi.h	/^#define	S_CHECK_COND	/;"	d
S_COND_MET	include/scsi.h	/^#define	S_COND_MET	/;"	d
S_CONFLICT	include/scsi.h	/^#define	S_CONFLICT	/;"	d
S_DEAD	fs/ubifs/ubifs.h	/^#define S_DEAD	/;"	d
S_DEF_AUTO	scripts/kconfig/expr.h	/^	S_DEF_AUTO,		\/* values read from auto.conf *\/$/;"	e	enum:__anon4cdf64a10103
S_DEF_COUNT	scripts/kconfig/expr.h	/^	S_DEF_COUNT$/;"	e	enum:__anon4cdf64a10103
S_DEF_DEF3	scripts/kconfig/expr.h	/^	S_DEF_DEF3,		\/* Reserved for UI usage *\/$/;"	e	enum:__anon4cdf64a10103
S_DEF_DEF4	scripts/kconfig/expr.h	/^	S_DEF_DEF4,		\/* Reserved for UI usage *\/$/;"	e	enum:__anon4cdf64a10103
S_DEF_USER	scripts/kconfig/expr.h	/^	S_DEF_USER,		\/* main user value *\/$/;"	e	enum:__anon4cdf64a10103
S_DIRSYNC	fs/ubifs/ubifs.h	/^#define S_DIRSYNC	/;"	d
S_FP	arch/arm/lib/vectors.S	/^#define S_FP	/;"	d	file:
S_FRAME_SIZE	arch/arm/lib/vectors.S	/^#define S_FRAME_SIZE	/;"	d	file:
S_GOOD	include/scsi.h	/^#define	S_GOOD	/;"	d
S_HEX	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
S_HEX	scripts/kconfig/zconf.y	/^	case S_HEX:$/;"	l
S_IEXEC	fs/yaffs2/yportenv.h	/^#define	S_IEXEC	/;"	d
S_IFBLK	fs/ubifs/ubifs.h	/^#define S_IFBLK /;"	d
S_IFBLK	fs/yaffs2/yportenv.h	/^#define S_IFBLK	/;"	d
S_IFBLK	include/linux/stat.h	/^#define S_IFBLK /;"	d
S_IFCHR	fs/ubifs/ubifs.h	/^#define S_IFCHR /;"	d
S_IFCHR	fs/yaffs2/yportenv.h	/^#define S_IFCHR	/;"	d
S_IFCHR	include/linux/stat.h	/^#define S_IFCHR /;"	d
S_IFDIR	fs/ubifs/ubifs.h	/^#define S_IFDIR /;"	d
S_IFDIR	fs/yaffs2/yportenv.h	/^#define S_IFDIR	/;"	d
S_IFDIR	include/linux/stat.h	/^#define S_IFDIR /;"	d
S_IFIFO	fs/ubifs/ubifs.h	/^#define S_IFIFO /;"	d
S_IFIFO	fs/yaffs2/yportenv.h	/^#define S_IFIFO	/;"	d
S_IFIFO	include/linux/stat.h	/^#define S_IFIFO /;"	d
S_IFLNK	fs/ext4/ext4_common.h	/^#define S_IFLNK	/;"	d
S_IFLNK	fs/ubifs/ubifs.h	/^#define S_IFLNK	/;"	d
S_IFLNK	fs/yaffs2/yportenv.h	/^#define S_IFLNK	/;"	d
S_IFLNK	include/linux/stat.h	/^#define S_IFLNK	/;"	d
S_IFMT	fs/ubifs/ubifs.h	/^#define S_IFMT /;"	d
S_IFMT	fs/yaffs2/yportenv.h	/^#define S_IFMT	/;"	d
S_IFMT	include/linux/stat.h	/^#define S_IFMT	/;"	d
S_IFREG	fs/ubifs/ubifs.h	/^#define S_IFREG /;"	d
S_IFREG	fs/yaffs2/yportenv.h	/^#define S_IFREG	/;"	d
S_IFREG	include/linux/stat.h	/^#define S_IFREG /;"	d
S_IFSOCK	fs/ubifs/ubifs.h	/^#define S_IFSOCK /;"	d
S_IFSOCK	fs/yaffs2/yportenv.h	/^#define S_IFSOCK	/;"	d
S_IFSOCK	include/linux/stat.h	/^#define S_IFSOCK /;"	d
S_ILLEGAL	include/scsi.h	/^#define	S_ILLEGAL	/;"	d
S_IMMUTABLE	fs/ubifs/ubifs.h	/^#define S_IMMUTABLE	/;"	d
S_INT	include/scsi.h	/^#define	S_INT	/;"	d
S_INT	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
S_INT	scripts/kconfig/zconf.y	/^	case S_INT:$/;"	l
S_INT_COND_MET	include/scsi.h	/^#define	S_INT_COND_MET	/;"	d
S_IP	arch/arm/lib/vectors.S	/^#define S_IP	/;"	d	file:
S_IREAD	fs/yaffs2/yportenv.h	/^#define S_IREAD	/;"	d
S_IRGRP	include/linux/stat.h	/^#define S_IRGRP /;"	d
S_IRGRP	tools/mingw_support.h	/^# define S_IRGRP /;"	d
S_IROTH	include/linux/stat.h	/^#define S_IROTH /;"	d
S_IRUSR	include/linux/stat.h	/^#define S_IRUSR /;"	d
S_IRWXG	include/linux/stat.h	/^#define S_IRWXG /;"	d
S_IRWXO	include/linux/stat.h	/^#define S_IRWXO /;"	d
S_IRWXU	include/linux/stat.h	/^#define S_IRWXU /;"	d
S_ISBLK	fs/yaffs2/yportenv.h	/^#define S_ISBLK(/;"	d
S_ISBLK	include/linux/stat.h	/^#define S_ISBLK(/;"	d
S_ISCHR	fs/yaffs2/yportenv.h	/^#define S_ISCHR(/;"	d
S_ISCHR	include/linux/stat.h	/^#define S_ISCHR(/;"	d
S_ISDIR	fs/reiserfs/reiserfs_private.h	/^#define S_ISDIR(/;"	d
S_ISDIR	fs/yaffs2/yportenv.h	/^#define S_ISDIR(/;"	d
S_ISDIR	include/linux/stat.h	/^#define S_ISDIR(/;"	d
S_ISFIFO	fs/yaffs2/yportenv.h	/^#define S_ISFIFO(/;"	d
S_ISFIFO	include/linux/stat.h	/^#define S_ISFIFO(/;"	d
S_ISGID	fs/ubifs/ubifs.h	/^#define S_ISGID /;"	d
S_ISGID	include/linux/stat.h	/^#define S_ISGID /;"	d
S_ISLNK	fs/reiserfs/reiserfs_private.h	/^#define S_ISLNK(/;"	d
S_ISLNK	fs/yaffs2/yportenv.h	/^#define S_ISLNK(/;"	d
S_ISLNK	include/linux/stat.h	/^#define S_ISLNK(/;"	d
S_ISREG	fs/reiserfs/reiserfs_private.h	/^#define S_ISREG(/;"	d
S_ISREG	fs/yaffs2/yportenv.h	/^#define S_ISREG(/;"	d
S_ISREG	include/linux/stat.h	/^#define S_ISREG(/;"	d
S_ISSOCK	fs/yaffs2/yportenv.h	/^#define S_ISSOCK(/;"	d
S_ISSOCK	include/linux/stat.h	/^#define S_ISSOCK(/;"	d
S_ISUID	fs/ubifs/ubifs.h	/^#define S_ISUID /;"	d
S_ISUID	include/linux/stat.h	/^#define S_ISUID /;"	d
S_ISVTX	fs/ubifs/ubifs.h	/^#define S_ISVTX /;"	d
S_ISVTX	include/linux/stat.h	/^#define S_ISVTX /;"	d
S_IWGRP	include/linux/stat.h	/^#define S_IWGRP /;"	d
S_IWGRP	tools/mingw_support.h	/^# define S_IWGRP /;"	d
S_IWOTH	include/linux/stat.h	/^#define S_IWOTH /;"	d
S_IWRITE	fs/yaffs2/yportenv.h	/^#define	S_IWRITE	/;"	d
S_IWUSR	include/linux/stat.h	/^#define S_IWUSR /;"	d
S_IXGRP	include/linux/stat.h	/^#define S_IXGRP /;"	d
S_IXOTH	include/linux/stat.h	/^#define S_IXOTH /;"	d
S_IXUSR	include/linux/stat.h	/^#define S_IXUSR /;"	d
S_LR	arch/arm/lib/vectors.S	/^#define S_LR	/;"	d	file:
S_NOATIME	fs/ubifs/ubifs.h	/^#define S_NOATIME	/;"	d
S_NOCMTIME	fs/ubifs/ubifs.h	/^#define S_NOCMTIME	/;"	d
S_NOQUOTA	fs/ubifs/ubifs.h	/^#define S_NOQUOTA	/;"	d
S_OLD_R0	arch/arm/lib/vectors.S	/^#define S_OLD_R0	/;"	d	file:
S_OTHER	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
S_PC	arch/arm/lib/vectors.S	/^#define S_PC	/;"	d	file:
S_PRIVATE	fs/ubifs/ubifs.h	/^#define S_PRIVATE	/;"	d
S_PSR	arch/arm/lib/vectors.S	/^#define S_PSR	/;"	d	file:
S_QUEUE_FULL	include/scsi.h	/^#define	S_QUEUE_FULL	/;"	d
S_R0	arch/arm/lib/vectors.S	/^#define S_R0	/;"	d	file:
S_R1	arch/arm/lib/vectors.S	/^#define S_R1	/;"	d	file:
S_R10	arch/arm/lib/vectors.S	/^#define S_R10	/;"	d	file:
S_R2	arch/arm/lib/vectors.S	/^#define S_R2	/;"	d	file:
S_R3	arch/arm/lib/vectors.S	/^#define S_R3	/;"	d	file:
S_R4	arch/arm/lib/vectors.S	/^#define S_R4	/;"	d	file:
S_R5	arch/arm/lib/vectors.S	/^#define S_R5	/;"	d	file:
S_R6	arch/arm/lib/vectors.S	/^#define S_R6	/;"	d	file:
S_R7	arch/arm/lib/vectors.S	/^#define S_R7	/;"	d	file:
S_R8	arch/arm/lib/vectors.S	/^#define S_R8	/;"	d	file:
S_R9	arch/arm/lib/vectors.S	/^#define S_R9	/;"	d	file:
S_SENSE	include/scsi.h	/^#define	S_SENSE	/;"	d
S_SP	arch/arm/lib/vectors.S	/^#define S_SP	/;"	d	file:
S_STRING	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
S_STRING	scripts/kconfig/zconf.y	/^	case S_STRING:$/;"	l
S_SWAPFILE	fs/ubifs/ubifs.h	/^#define S_SWAPFILE	/;"	d
S_SYNC	fs/ubifs/ubifs.h	/^#define S_SYNC	/;"	d
S_TERMINATED	include/scsi.h	/^#define	S_TERMINATED	/;"	d
S_TRISTATE	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
S_TRISTATE	scripts/kconfig/zconf.y	/^	case S_TRISTATE:$/;"	l
S_UNKNOWN	scripts/kconfig/expr.h	/^	S_UNKNOWN, S_BOOLEAN, S_TRISTATE, S_INT, S_HEX, S_STRING, S_OTHER$/;"	e	enum:symbol_type
Sandbox architecture	arch/sandbox/Kconfig	/^menu "Sandbox architecture"$/;"	m
SavedClkRun	drivers/net/natsemi.c	/^static u32 SavedClkRun;$/;"	v	typeref:typename:u32	file:
SavedClkRun	drivers/net/ns8382x.c	/^static u32 SavedClkRun;$/;"	v	typeref:typename:u32	file:
Scaler_Counter	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Scaler_Counter;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Scaler_Reload	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Scaler_Reload;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Scan	tools/buildman/toolchain.py	/^    def Scan(self, verbose):$/;"	m	class:Toolchains
Scan	tools/dtoc/fdt.py	/^    def Scan(self):$/;"	m	class:NodeBase
Scan	tools/dtoc/fdt.py	/^    def Scan(self, root='\/'):$/;"	m	class:Fdt
Scan	tools/dtoc/fdt_fallback.py	/^    def Scan(self):$/;"	m	class:Node
Scan	tools/dtoc/fdt_normal.py	/^    def Scan(self):$/;"	m	class:Node
ScanDtb	tools/dtoc/dtoc	/^    def ScanDtb(self):$/;"	m	class:DtbPlatdata
ScanDtb	tools/dtoc/dtoc.py	/^    def ScanDtb(self):$/;"	m	class:DtbPlatdata
ScanPath	tools/buildman/toolchain.py	/^    def ScanPath(self, path, verbose):$/;"	m	class:Toolchains
ScanPathEnv	tools/buildman/toolchain.py	/^    def ScanPathEnv(self, fname):$/;"	m	class:Toolchains
ScanStructs	tools/dtoc/dtoc	/^    def ScanStructs(self):$/;"	m	class:DtbPlatdata
ScanStructs	tools/dtoc/dtoc.py	/^    def ScanStructs(self):$/;"	m	class:DtbPlatdata
ScanTree	tools/dtoc/dtoc	/^    def ScanTree(self):$/;"	m	class:DtbPlatdata
ScanTree	tools/dtoc/dtoc.py	/^    def ScanTree(self):$/;"	m	class:DtbPlatdata
SecFlashABegin	board/bf533-ezkit/flash-defines.h	/^#define SecFlashABegin	/;"	d
SecFlashAEndOff	board/bf533-ezkit/flash-defines.h	/^#define SecFlashAEndOff	/;"	d
SecFlashAOff	board/bf533-ezkit/flash-defines.h	/^#define SecFlashAOff	/;"	d
SecFlashASec1Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashASec1Off	/;"	d
SecFlashASec2Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashASec2Off	/;"	d
SecFlashASec3Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashASec3Off	/;"	d
SecFlashASec4Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashASec4Off	/;"	d
SecFlashBBegin	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBBegin	/;"	d
SecFlashBEndOff	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBEndOff	/;"	d
SecFlashBOff	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBOff	/;"	d
SecFlashBSec1Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBSec1Off	/;"	d
SecFlashBSec2Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBSec2Off	/;"	d
SecFlashBSec3Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBSec3Off	/;"	d
SecFlashBSec4Off	board/bf533-ezkit/flash-defines.h	/^#define SecFlashBSec4Off	/;"	d
SectionAlignment	include/pe.h	/^	uint32_t SectionAlignment;               \/* 0x20 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SectionAlignment	include/pe.h	/^	uint32_t SectionAlignment;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
SectionCtxMgr	test/py/multiplexed_log.py	/^class SectionCtxMgr(object):$/;"	c
Security commands	cmd/Kconfig	/^menu "Security commands"$/;"	m	menu:Command line interface
Seek	lib/lzma/Types.h	/^  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);$/;"	m	struct:__anonf2a2f1b90608	typeref:typename:SRes (*)(void * p,Int64 * pos,ESzSeek origin)
Seek	lib/lzma/Types.h	/^  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);$/;"	m	struct:__anonf2a2f1b90708	typeref:typename:SRes (*)(void * p,Int64 * pos,ESzSeek origin)
Select	tools/buildman/toolchain.py	/^    def Select(self, arch):$/;"	m	class:Toolchains
SelectBoards	tools/buildman/board.py	/^    def SelectBoards(self, args, exclude=[]):$/;"	m	class:Boards
SelectCommit	tools/buildman/builder.py	/^    def SelectCommit(self, commit, checkout=True):$/;"	m	class:Builder
Ser0UDCAR	include/SA-1100.h	/^#define Ser0UDCAR	/;"	d
Ser0UDCCR	include/SA-1100.h	/^#define Ser0UDCCR	/;"	d
Ser0UDCCS0	include/SA-1100.h	/^#define Ser0UDCCS0	/;"	d
Ser0UDCCS1	include/SA-1100.h	/^#define Ser0UDCCS1	/;"	d
Ser0UDCCS2	include/SA-1100.h	/^#define Ser0UDCCS2	/;"	d
Ser0UDCD0	include/SA-1100.h	/^#define Ser0UDCD0	/;"	d
Ser0UDCDR	include/SA-1100.h	/^#define Ser0UDCDR	/;"	d
Ser0UDCIMP	include/SA-1100.h	/^#define Ser0UDCIMP	/;"	d
Ser0UDCOMP	include/SA-1100.h	/^#define Ser0UDCOMP	/;"	d
Ser0UDCSR	include/SA-1100.h	/^#define Ser0UDCSR	/;"	d
Ser0UDCWC	include/SA-1100.h	/^#define Ser0UDCWC	/;"	d
Ser1SDCR0	include/SA-1100.h	/^#define Ser1SDCR0	/;"	d
Ser1SDCR1	include/SA-1100.h	/^#define Ser1SDCR1	/;"	d
Ser1SDCR2	include/SA-1100.h	/^#define Ser1SDCR2	/;"	d
Ser1SDCR3	include/SA-1100.h	/^#define Ser1SDCR3	/;"	d
Ser1SDCR4	include/SA-1100.h	/^#define Ser1SDCR4	/;"	d
Ser1SDDR	include/SA-1100.h	/^#define Ser1SDDR	/;"	d
Ser1SDSR0	include/SA-1100.h	/^#define Ser1SDSR0	/;"	d
Ser1SDSR1	include/SA-1100.h	/^#define Ser1SDSR1	/;"	d
Ser1UTCR0	include/SA-1100.h	/^#define Ser1UTCR0	/;"	d
Ser1UTCR1	include/SA-1100.h	/^#define Ser1UTCR1	/;"	d
Ser1UTCR2	include/SA-1100.h	/^#define Ser1UTCR2	/;"	d
Ser1UTCR3	include/SA-1100.h	/^#define Ser1UTCR3	/;"	d
Ser1UTDR	include/SA-1100.h	/^#define Ser1UTDR	/;"	d
Ser1UTSR0	include/SA-1100.h	/^#define Ser1UTSR0	/;"	d
Ser1UTSR1	include/SA-1100.h	/^#define Ser1UTSR1	/;"	d
Ser2HSCR0	include/SA-1100.h	/^#define Ser2HSCR0	/;"	d
Ser2HSCR1	include/SA-1100.h	/^#define Ser2HSCR1	/;"	d
Ser2HSCR2	include/SA-1100.h	/^#define Ser2HSCR2	/;"	d
Ser2HSDR	include/SA-1100.h	/^#define Ser2HSDR	/;"	d
Ser2HSSR0	include/SA-1100.h	/^#define Ser2HSSR0	/;"	d
Ser2HSSR1	include/SA-1100.h	/^#define Ser2HSSR1	/;"	d
Ser2UTCR0	include/SA-1100.h	/^#define Ser2UTCR0	/;"	d
Ser2UTCR1	include/SA-1100.h	/^#define Ser2UTCR1	/;"	d
Ser2UTCR2	include/SA-1100.h	/^#define Ser2UTCR2	/;"	d
Ser2UTCR3	include/SA-1100.h	/^#define Ser2UTCR3	/;"	d
Ser2UTCR4	include/SA-1100.h	/^#define Ser2UTCR4	/;"	d
Ser2UTDR	include/SA-1100.h	/^#define Ser2UTDR	/;"	d
Ser2UTSR0	include/SA-1100.h	/^#define Ser2UTSR0	/;"	d
Ser2UTSR1	include/SA-1100.h	/^#define Ser2UTSR1	/;"	d
Ser3UTCR0	include/SA-1100.h	/^#define Ser3UTCR0	/;"	d
Ser3UTCR1	include/SA-1100.h	/^#define Ser3UTCR1	/;"	d
Ser3UTCR2	include/SA-1100.h	/^#define Ser3UTCR2	/;"	d
Ser3UTCR3	include/SA-1100.h	/^#define Ser3UTCR3	/;"	d
Ser3UTDR	include/SA-1100.h	/^#define Ser3UTDR	/;"	d
Ser3UTSR0	include/SA-1100.h	/^#define Ser3UTSR0	/;"	d
Ser3UTSR1	include/SA-1100.h	/^#define Ser3UTSR1	/;"	d
Ser4MCCR0	include/SA-1100.h	/^#define Ser4MCCR0	/;"	d
Ser4MCCR1	include/SA-1100.h	/^#define Ser4MCCR1	/;"	d
Ser4MCDR0	include/SA-1100.h	/^#define Ser4MCDR0	/;"	d
Ser4MCDR1	include/SA-1100.h	/^#define Ser4MCDR1	/;"	d
Ser4MCDR2	include/SA-1100.h	/^#define Ser4MCDR2	/;"	d
Ser4MCSR	include/SA-1100.h	/^#define Ser4MCSR	/;"	d
Ser4SSCR0	include/SA-1100.h	/^#define Ser4SSCR0	/;"	d
Ser4SSCR1	include/SA-1100.h	/^#define Ser4SSCR1	/;"	d
Ser4SSDR	include/SA-1100.h	/^#define Ser4SSDR	/;"	d
Ser4SSSR	include/SA-1100.h	/^#define Ser4SSSR	/;"	d
Serial drivers	drivers/serial/Kconfig	/^menu "Serial drivers"$/;"	m
SerialNumber	board/vscom/baltos/board.h	/^	uint32_t SerialNumber;$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint32_t
Series	tools/patman/series.py	/^class Series(dict):$/;"	c
SetArRegs	drivers/video/ct69000.c	/^SetArRegs (void)$/;"	f	typeref:typename:void	file:
SetBit	board/esd/common/xilinx_jtag/lenval.c	/^void SetBit( lenVal*    plv,$/;"	f	typeref:typename:void
SetBitsPerPixelIntoXrRegs	drivers/video/ct69000.c	/^SetBitsPerPixelIntoXrRegs (int bpp)$/;"	f	typeref:typename:void	file:
SetCrRegs	drivers/video/ct69000.c	/^SetCrRegs (struct ctfb_res_modes *var, int bits_per_pixel)$/;"	f	typeref:typename:void	file:
SetDCSR0	include/SA-1100.h	/^#define SetDCSR0	/;"	d
SetDCSR1	include/SA-1100.h	/^#define SetDCSR1	/;"	d
SetDCSR2	include/SA-1100.h	/^#define SetDCSR2	/;"	d
SetDCSR3	include/SA-1100.h	/^#define SetDCSR3	/;"	d
SetDCSR4	include/SA-1100.h	/^#define SetDCSR4	/;"	d
SetDCSR5	include/SA-1100.h	/^#define SetDCSR5	/;"	d
SetDisplayOptions	tools/buildman/builder.py	/^    def SetDisplayOptions(self, show_errors=False, show_sizes=False,$/;"	m	class:Builder
SetDrawingEngine	drivers/video/ct69000.c	/^SetDrawingEngine (int bits_per_pixel)$/;"	f	typeref:typename:void	file:
SetGrRegs	drivers/video/ct69000.c	/^SetGrRegs (void)$/;"	f	typeref:typename:void	file:
SetGuardREG	board/renesas/blanche/blanche.c	/^#define	SetGuardREG(/;"	d	file:
SetI2CSCL	drivers/i2c/s3c24x0_i2c.c	/^static void SetI2CSCL(int x)$/;"	f	typeref:typename:void	file:
SetInputDirs	tools/patman/tools.py	/^def SetInputDirs(dirname):$/;"	f
SetItem	tools/buildman/bsettings.py	/^def SetItem(section, tag, value):$/;"	f
SetMsrRegs	drivers/video/ct69000.c	/^SetMsrRegs (struct ctfb_res_modes *mode)$/;"	f	typeref:typename:void	file:
SetPrintTestMode	tools/patman/terminal.py	/^def SetPrintTestMode():$/;"	f
SetREG	board/renesas/blanche/blanche.c	/^#define	SetREG(/;"	d	file:
SetRTC_Access	drivers/rtc/s3c24x0_rtc.c	/^static inline void SetRTC_Access(RTC_ACCESS a)$/;"	f	typeref:typename:void	file:
SetSrRegs	drivers/video/ct69000.c	/^SetSrRegs (void)$/;"	f	typeref:typename:void	file:
Setup	tools/buildman/bsettings.py	/^def Setup(fname=''):$/;"	f
Setup	tools/patman/gitutil.py	/^def Setup():$/;"	f
Setup	tools/patman/settings.py	/^def Setup(parser, project_name, config_fname=''):$/;"	f
Setup	tools/rkmux.py	/^    def Setup(self, cols):$/;"	m	class:RegField
SetupBuild	tools/buildman/builder.py	/^    def SetupBuild(self, board_selected, commits):$/;"	m	class:Builder
SetupData	tools/patman/test.py	/^    def SetupData(self, data_type):$/;"	m	class:TestPatch
SetupOutput	tools/dtoc/dtoc	/^    def SetupOutput(self, fname):$/;"	m	class:DtbPlatdata
SetupOutput	tools/dtoc/dtoc.py	/^    def SetupOutput(self, fname):$/;"	m	class:DtbPlatdata
SetupRxBuffer	drivers/net/bfin_mac.c	/^ADI_ETHER_BUFFER *SetupRxBuffer(int no)$/;"	f	typeref:typename:ADI_ETHER_BUFFER *
SetupTxBuffer	drivers/net/bfin_mac.c	/^ADI_ETHER_BUFFER *SetupTxBuffer(int no)$/;"	f	typeref:typename:ADI_ETHER_BUFFER *
Shell scripting commands	cmd/Kconfig	/^menu "Shell scripting commands"$/;"	m	menu:Command line interface
Show	tools/rkmux.py	/^    def Show(self):$/;"	m	class:RegField
ShowActions	tools/buildman/control.py	/^def ShowActions(series, why_selected, boards_selected, builder, options):$/;"	f
ShowActions	tools/patman/series.py	/^    def ShowActions(self, args, cmd, process_tags):$/;"	m	class:Series
ShowSummary	tools/buildman/builder.py	/^    def ShowSummary(self, commits, board_selected):$/;"	m	class:Builder
Signature	drivers/usb/gadget/storage_common.c	/^	__le32	Signature;		\/* Contains 'USBC' *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:__le32	file:
Signature	drivers/usb/gadget/storage_common.c	/^	__le32	Signature;		\/* Should = 'USBS' *\/$/;"	m	struct:bulk_cs_wrap	typeref:typename:__le32	file:
Signature	include/pe.h	/^	uint32_t Signature; \/* "PE"\\0\\0 *\/       \/* 0x00 *\/$/;"	m	struct:_IMAGE_NT_HEADERS	typeref:typename:uint32_t
Signature	include/pe.h	/^	uint32_t Signature;$/;"	m	struct:_IMAGE_NT_HEADERS64	typeref:typename:uint32_t
SiliconRev	drivers/net/natsemi.c	/^	SiliconRev	= 0x58,$/;"	e	enum:register_offsets	file:
Size	include/pe.h	/^	uint32_t Size;$/;"	m	struct:_IMAGE_DATA_DIRECTORY	typeref:typename:uint32_t
SizeOfBlock	include/pe.h	/^        uint32_t SizeOfBlock;$/;"	m	struct:_IMAGE_BASE_RELOCATION	typeref:typename:uint32_t
SizeOfCode	include/pe.h	/^	uint32_t SizeOfCode;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfCode	include/pe.h	/^	uint32_t SizeOfCode;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
SizeOfHeaders	include/pe.h	/^	uint32_t SizeOfHeaders;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfHeaders	include/pe.h	/^	uint32_t SizeOfHeaders;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
SizeOfHeapCommit	include/pe.h	/^	uint32_t SizeOfHeapCommit;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfHeapCommit	include/pe.h	/^	uint64_t SizeOfHeapCommit;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint64_t
SizeOfHeapReserve	include/pe.h	/^	uint32_t SizeOfHeapReserve;              \/* 0x50 *\/$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfHeapReserve	include/pe.h	/^	uint64_t SizeOfHeapReserve;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint64_t
SizeOfImage	include/pe.h	/^	uint32_t SizeOfImage;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfImage	include/pe.h	/^	uint32_t SizeOfImage;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
SizeOfInitializedData	include/pe.h	/^	uint32_t SizeOfInitializedData;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfInitializedData	include/pe.h	/^	uint32_t SizeOfInitializedData;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
SizeOfOptionalHeader	include/pe.h	/^	uint16_t SizeOfOptionalHeader;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint16_t
SizeOfRawData	include/pe.h	/^	uint32_t SizeOfRawData;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint32_t
SizeOfStackCommit	include/pe.h	/^	uint32_t SizeOfStackCommit;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfStackCommit	include/pe.h	/^	uint64_t SizeOfStackCommit;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint64_t
SizeOfStackReserve	include/pe.h	/^	uint32_t SizeOfStackReserve;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfStackReserve	include/pe.h	/^	uint64_t SizeOfStackReserve;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint64_t
SizeOfUninitializedData	include/pe.h	/^	uint32_t SizeOfUninitializedData;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
SizeOfUninitializedData	include/pe.h	/^	uint32_t SizeOfUninitializedData;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
SizeT	lib/lzma/Types.h	/^typedef UInt32 SizeT;$/;"	t	typeref:typename:UInt32
SizeT	lib/lzma/Types.h	/^typedef size_t SizeT;$/;"	t	typeref:typename:size_t
Skip	lib/lzma/Types.h	/^  SRes (*Skip)(void *p, size_t offset);$/;"	m	struct:__anonf2a2f1b90708	typeref:typename:SRes (*)(void * p,size_t offset)
Slot	tools/moveconfig.py	/^class Slot:$/;"	c
Slots	tools/moveconfig.py	/^class Slots:$/;"	c
SmiSetRegs	drivers/video/sm501.c	/^static void SmiSetRegs (void)$/;"	f	typeref:typename:void	file:
SoftEmuException	arch/powerpc/cpu/mpc512x/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
SoftEmuException	arch/powerpc/cpu/mpc5xx/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
SoftEmuException	arch/powerpc/cpu/mpc5xxx/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
SoftEmuException	arch/powerpc/cpu/mpc8260/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
SoftEmuException	arch/powerpc/cpu/mpc83xx/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
SoftEmuException	arch/powerpc/cpu/mpc86xx/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
SoftEmuException	arch/powerpc/cpu/mpc8xx/traps.c	/^void SoftEmuException(struct pt_regs *regs)$/;"	f	typeref:typename:void
Sound support	drivers/sound/Kconfig	/^menu "Sound support"$/;"	m
Spawn	test/py/u_boot_spawn.py	/^class Spawn(object):$/;"	c
SpecPos	lib/lzma/LzmaDec.c	/^#define SpecPos /;"	d	file:
SpeedMask	drivers/net/natsemi.c	/^	SpeedMask	= 0x00004000,$/;"	e	enum:ChipConfigBits	file:
SpeedStatus_Polarity	drivers/net/ns8382x.c	/^#define SpeedStatus_Polarity /;"	d	file:
Srce	drivers/net/bfin_mac.h	/^	u8 Srce[6];		\/* source MAC address		*\/$/;"	m	struct:adi_ether_frame_buffer	typeref:typename:u8[6]
StMemBnk	include/SA-1100.h	/^#define StMemBnk	/;"	d
StMemBnk0	include/SA-1100.h	/^#define StMemBnk0	/;"	d
StMemBnk0Sp	include/SA-1100.h	/^#define StMemBnk0Sp	/;"	d
StMemBnk1	include/SA-1100.h	/^#define StMemBnk1	/;"	d
StMemBnk1Sp	include/SA-1100.h	/^#define StMemBnk1Sp	/;"	d
StMemBnk2	include/SA-1100.h	/^#define StMemBnk2	/;"	d
StMemBnk2Sp	include/SA-1100.h	/^#define StMemBnk2Sp	/;"	d
StMemBnk3	include/SA-1100.h	/^#define StMemBnk3	/;"	d
StMemBnk3Sp	include/SA-1100.h	/^#define StMemBnk3Sp	/;"	d
StMemBnkSp	include/SA-1100.h	/^#define StMemBnkSp	/;"	d
StMemBnkType	include/SA-1100.h	/^typedef Quad		StMemBnkType [StMemBnkSp\/sizeof (Quad)] ;$/;"	t	typeref:typename:Quad[StMemBnkSp/sizeof (Quad)]
Start	tools/patman/terminal.py	/^    def Start(self, color, bright=True):$/;"	m	class:Color
StateTestEnv	test/py/tests/test_env.py	/^class StateTestEnv(object):$/;"	c
Status	doc/README.x86	/^Status$/;"	l
Status	drivers/usb/gadget/rndis.h	/^	__le32	Status;$/;"	m	struct:rndis_indicate_status_msg_type	typeref:typename:__le32
Status	drivers/usb/gadget/rndis.h	/^	__le32	Status;$/;"	m	struct:rndis_init_cmplt_type	typeref:typename:__le32
Status	drivers/usb/gadget/rndis.h	/^	__le32	Status;$/;"	m	struct:rndis_keepalive_cmplt_type	typeref:typename:__le32
Status	drivers/usb/gadget/rndis.h	/^	__le32	Status;$/;"	m	struct:rndis_query_cmplt_type	typeref:typename:__le32
Status	drivers/usb/gadget/rndis.h	/^	__le32	Status;$/;"	m	struct:rndis_reset_cmplt_type	typeref:typename:__le32
Status	drivers/usb/gadget/rndis.h	/^	__le32	Status;$/;"	m	struct:rndis_set_cmplt_type	typeref:typename:__le32
Status	drivers/usb/gadget/storage_common.c	/^	u8	Status;			\/* See below *\/$/;"	m	struct:bulk_cs_wrap	typeref:typename:u8	file:
Status	include/mpc5xxx.h	/^	volatile u32 Status;		\/* SDMA + 0x7c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
StatusBufferLength	drivers/usb/gadget/rndis.h	/^	__le32	StatusBufferLength;$/;"	m	struct:rndis_indicate_status_msg_type	typeref:typename:__le32
StatusBufferOffset	drivers/usb/gadget/rndis.h	/^	__le32	StatusBufferOffset;$/;"	m	struct:rndis_indicate_status_msg_type	typeref:typename:__le32
StatusWord	drivers/net/bfin_mac.h	/^	volatile u32 StatusWord;	\/* the frame status word *\/$/;"	m	struct:adi_ether_buffer	typeref:typename:volatile u32
Stop	tools/patman/terminal.py	/^    def Stop(self):$/;"	m	class:Color
StopAll	tools/patman/command.py	/^def StopAll():$/;"	f
Str_2_Comp	lib/dhry/dhry.h	/^                  char        Str_2_Comp [31];$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0408	typeref:typename:char[31]
Str_30	lib/dhry/dhry.h	/^typedef char    Str_30 [31];$/;"	t	typeref:typename:char[31]
Str_Comp	lib/dhry/dhry.h	/^                  char        Str_Comp [31];$/;"	m	struct:record::__anon8188259e020a::__anon8188259e0308	typeref:typename:char[31]
StratixII_dump	drivers/fpga/stratixII.c	/^int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize)$/;"	f	typeref:typename:int
StratixII_info	drivers/fpga/stratixII.c	/^int StratixII_info (Altera_desc * desc)$/;"	f	typeref:typename:int
StratixII_load	drivers/fpga/stratixII.c	/^int StratixII_load (Altera_desc * desc, void *buf, size_t bsize)$/;"	f	typeref:typename:int
StratixII_ps_fpp_dump	drivers/fpga/stratixII.c	/^int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize)$/;"	f	typeref:typename:int
StratixII_ps_fpp_load	drivers/fpga/stratixII.c	/^int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,$/;"	f	typeref:typename:int
StringLowerCase	tools/easylogo/easylogo.c	/^void StringLowerCase (char *str)$/;"	f	typeref:typename:void
StringUpperCase	tools/easylogo/easylogo.c	/^void StringUpperCase (char *str)$/;"	f	typeref:typename:void
Subsystem	include/pe.h	/^	uint16_t Subsystem;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint16_t
Subsystem	include/pe.h	/^	uint16_t Subsystem;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint16_t
Sun_Machine_Models	arch/sparc/include/asm/machines.h	/^struct Sun_Machine_Models {$/;"	s
SuperH architecture	arch/sh/Kconfig	/^menu "SuperH architecture"$/;"	m
Symbol	tools/buildman/kconfiglib.py	/^class Symbol(Item):$/;"	c
SymbolTableIndex	include/pe.h	/^	uint32_t SymbolTableIndex;$/;"	m	struct:_IMAGE_RELOCATION	typeref:typename:uint32_t
System reset device drivers	drivers/sysreset/Kconfig	/^menu "System reset device drivers"$/;"	m
System tables	arch/x86/Kconfig	/^menu "System tables"$/;"	m	menu:x86 architecture
System tables	lib/Kconfig	/^menu "System tables"$/;"	m	menu:Library routines
System.map	Makefile	/^System.map:	u-boot$/;"	t
SystemId	board/vscom/baltos/board.h	/^	uint16_t SystemId;$/;"	m	struct:_BSP_VS_HWPARAM	typeref:typename:uint16_t
SzAlloc	lib/lzma/LzmaTools.c	/^static void *SzAlloc(void *p, size_t size) { return malloc(size); }$/;"	f	typeref:typename:void *	file:
SzFree	lib/lzma/LzmaTools.c	/^static void SzFree(void *p, void *address) { free(address); }$/;"	f	typeref:typename:void	file:
T	arch/x86/cpu/quark/smc.h	/^	T	\/* TOP VREF *\/$/;"	e	enum:__anone34d010a0103
T1040_SWITCH_GMII_DEV_OFFSET	include/vsc9953.h	/^#define T1040_SWITCH_GMII_DEV_OFFSET	/;"	d
T1040_TDM_QUIRK_CCSR_BASE	include/configs/T1040QDS.h	/^#define T1040_TDM_QUIRK_CCSR_BASE	/;"	d
T1040_TDM_QUIRK_CCSR_BASE	include/configs/T104xRDB.h	/^#define T1040_TDM_QUIRK_CCSR_BASE	/;"	d
T114_usb_pll	drivers/usb/host/ehci-tegra.c	/^static const unsigned T114_usb_pll[CLOCK_OSC_FREQ_COUNT][PARAM_COUNT] = {$/;"	v	typeref:typename:const unsigned[][]	file:
T1_REG	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                    T1_REG /;"	d
T20_usb_pll	drivers/usb/host/ehci-tegra.c	/^static const unsigned T20_usb_pll[CLOCK_OSC_FREQ_COUNT][PARAM_COUNT] = {$/;"	v	typeref:typename:const unsigned[][]	file:
T210_usb_pll	drivers/usb/host/ehci-tegra.c	/^static const unsigned T210_usb_pll[CLOCK_OSC_FREQ_COUNT][PARAM_COUNT] = {$/;"	v	typeref:typename:const unsigned[][]	file:
T2_BASE	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^#define T2_BASE	/;"	d
T2_REG	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                    T2_REG /;"	d
T2_REG_PIO	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                T2_REG_PIO /;"	d
T30_usb_pll	drivers/usb/host/ehci-tegra.c	/^static const unsigned T30_usb_pll[CLOCK_OSC_FREQ_COUNT][PARAM_COUNT] = {$/;"	v	typeref:typename:const unsigned[][]	file:
T4_REG	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                    T4_REG /;"	d
T64En	drivers/net/ns8382x.c	/^	T64En = 0x00004000,$/;"	e	enum:ChipConfigBits	file:
TAB	scripts/kconfig/lxdialog/dialog.h	/^#define TAB /;"	d
TABLE	lib/zlib/inflate.h	/^        TABLE,      \/* i: waiting for dynamic block table lengths *\/$/;"	e	enum:__anon43d5a4c40103
TABLES_H	include/bedbug/tables.h	/^#define TABLES_H$/;"	d
TACK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                      TACK /;"	d
TAC_R_HOLD	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_R_HOLD(/;"	d	file:
TAC_R_RDY	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_R_RDY(/;"	d	file:
TAC_R_SETUP	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_R_SETUP(/;"	d	file:
TAC_R_WIDTH	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_R_WIDTH(/;"	d	file:
TAC_W_HOLD	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_W_HOLD(/;"	d	file:
TAC_W_RDY	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_W_RDY(/;"	d	file:
TAC_W_SETUP	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_W_SETUP(/;"	d	file:
TAC_W_WIDTH	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define TAC_W_WIDTH(/;"	d	file:
TAG_ADDR_H	drivers/video/formike.c	/^#define TAG_ADDR_H	/;"	d	file:
TAG_ADDR_L	drivers/video/formike.c	/^#define TAG_ADDR_L	/;"	d	file:
TAG_COMMAND	drivers/video/formike.c	/^#define TAG_COMMAND	/;"	d	file:
TAG_DATA	drivers/video/formike.c	/^#define TAG_DATA	/;"	d	file:
TAG_ECC_BYTES	drivers/mtd/nand/tegra_nand.c	/^#define TAG_ECC_BYTES	/;"	d	file:
TAG_PTR_0	drivers/mtd/nand/tegra_nand.h	/^#define TAG_PTR_0	/;"	d
TAG_READ	drivers/video/formike.c	/^#define TAG_READ	/;"	d	file:
TAG_SUBDIRS	Makefile	/^TAG_SUBDIRS := $(patsubst %,$(srctree)\/%,$(u-boot-dirs) include)$/;"	m
TAG_WRITE	drivers/video/formike.c	/^#define TAG_WRITE	/;"	d	file:
TAH0	arch/powerpc/dts/arches.dts	/^			TAH0: emac-tah@ef601350 {$/;"	l
TAH0	arch/powerpc/dts/canyonlands.dts	/^			TAH0: emac-tah@ef601350 {$/;"	l
TAH0	arch/powerpc/dts/glacier.dts	/^			TAH0: emac-tah@ef601350 {$/;"	l
TAH1	arch/powerpc/dts/arches.dts	/^			TAH1: emac-tah@ef601450 {$/;"	l
TAH1	arch/powerpc/dts/canyonlands.dts	/^			TAH1: emac-tah@ef601450 {$/;"	l
TAH1	arch/powerpc/dts/glacier.dts	/^			TAH1: emac-tah@ef601450 {$/;"	l
TAH_BASE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_BASE	/;"	d
TAH_MR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR	/;"	d
TAH_MR_CVR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_CVR	/;"	d
TAH_MR_DIG	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_DIG	/;"	d
TAH_MR_DTFP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_DTFP	/;"	d
TAH_MR_RSVD	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_RSVD	/;"	d
TAH_MR_SR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_SR	/;"	d
TAH_MR_ST	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_ST	/;"	d
TAH_MR_ST_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_ST_V	/;"	d
TAH_MR_TFS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS	/;"	d
TAH_MR_TFS_10K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS_10K	/;"	d
TAH_MR_TFS_2K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS_2K	/;"	d
TAH_MR_TFS_4K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS_4K	/;"	d
TAH_MR_TFS_6K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS_6K	/;"	d
TAH_MR_TFS_8K	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS_8K	/;"	d
TAH_MR_TFS_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_MR_TFS_V	/;"	d
TAH_REVID	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_REVID	/;"	d
TAH_REV_BN_M	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_REV_BN_M	/;"	d
TAH_REV_BN_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_REV_BN_V	/;"	d
TAH_REV_RN_M	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_REV_RN_M	/;"	d
TAH_REV_RN_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_REV_RN_V	/;"	d
TAH_SSR0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR0	/;"	d
TAH_SSR1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR1	/;"	d
TAH_SSR2	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR2	/;"	d
TAH_SSR3	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR3	/;"	d
TAH_SSR4	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR4	/;"	d
TAH_SSR5	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR5	/;"	d
TAH_SSR_RSVD0	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR_RSVD0	/;"	d
TAH_SSR_RSVD1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR_RSVD1	/;"	d
TAH_SSR_SS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_SSR_SS	/;"	d
TAH_TSR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR	/;"	d
TAH_TSR_DLM	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_DLM	/;"	d
TAH_TSR_ILTS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_ILTS	/;"	d
TAH_TSR_IPFP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_IPFP	/;"	d
TAH_TSR_IPOP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_IPOP	/;"	d
TAH_TSR_NIPF	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_NIPF	/;"	d
TAH_TSR_NISF	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_NISF	/;"	d
TAH_TSR_RSVD	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_RSVD	/;"	d
TAH_TSR_SIEEE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_SIEEE	/;"	d
TAH_TSR_SSTS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_SSTS	/;"	d
TAH_TSR_SUDP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_SUDP	/;"	d
TAH_TSR_TFP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_TFP	/;"	d
TAH_TSR_TFPE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_TFPE	/;"	d
TAH_TSR_TFTS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_TFTS	/;"	d
TAH_TSR_UH	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_UH	/;"	d
TAH_TSR_UP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define TAH_TSR_UP	/;"	d
TAI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	TAI	/;"	d
TALLY_RESET	drivers/usb/eth/r8152.h	/^#define TALLY_RESET	/;"	d
TAM3517_PRINT_SOM_INFO	include/configs/tam3517-common.h	/^#define TAM3517_PRINT_SOM_INFO(/;"	d
TAM3517_READ_EEPROM	include/configs/tam3517-common.h	/^#define TAM3517_READ_EEPROM(/;"	d
TAM3517_READ_MAC_FROM_EEPROM	include/configs/tam3517-common.h	/^#define TAM3517_READ_MAC_FROM_EEPROM(/;"	d
TAM3517_revision_fixed	include/configs/tam3517-common.h	/^#define TAM3517_revision_fixed(/;"	d
TAM3517_revision_major	include/configs/tam3517-common.h	/^#define TAM3517_revision_major(/;"	d
TAM3517_revision_tn	include/configs/tam3517-common.h	/^#define TAM3517_revision_tn(/;"	d
TAM3517_sequence_number	include/configs/tam3517-common.h	/^#define TAM3517_sequence_number(/;"	d
TAM3517_week_of_year	include/configs/tam3517-common.h	/^#define TAM3517_week_of_year(/;"	d
TAM3517_year	include/configs/tam3517-common.h	/^#define TAM3517_year(/;"	d
TAPCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TAPCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define TAPCOLD_RESET	/;"	d
TARGET_A3M071	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_A3M071$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_A4M072	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_A4M072$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_AC14XX	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_AC14XX$/;"	c	choice:mpc512x CPU""choice919b2f980104
TARGET_ACADIA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_ACADIA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_ADP_AG101P	arch/nds32/Kconfig	/^config TARGET_ADP_AG101P$/;"	c	choice:NDS32 architecture""choice75cdf90c0104
TARGET_ADVANTECH_DMS_BA16	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ADVANTECH_DMS_BA16$/;"	c	choice:choiceab6fbbff0104
TARGET_ALT	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_ALT$/;"	c	choice:choice335b3af40104
TARGET_AM335X_BALTOS	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_BALTOS$/;"	c	choice:choice097e41480104
TARGET_AM335X_EVM	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_EVM$/;"	c	choice:choice097e41480104
TARGET_AM335X_IGEP0033	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_IGEP0033$/;"	c	choice:choice097e41480104
TARGET_AM335X_SHC	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_SHC$/;"	c	choice:choice097e41480104
TARGET_AM335X_SL50	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM335X_SL50$/;"	c	choice:choice097e41480104
TARGET_AM3517_CRANE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_AM3517_CRANE$/;"	c	choice:choice629b97240104
TARGET_AM3517_EVM	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_AM3517_EVM$/;"	c	choice:choice629b97240104
TARGET_AM43XX_EVM	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_AM43XX_EVM$/;"	c
TARGET_AM57XX_EVM	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_AM57XX_EVM$/;"	c	choice:choice4b9479260104
TARGET_AMCORE	arch/m68k/Kconfig	/^config TARGET_AMCORE$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_AP121	arch/mips/mach-ath79/Kconfig	/^config TARGET_AP121$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
TARGET_AP143	arch/mips/mach-ath79/Kconfig	/^config TARGET_AP143$/;"	c	choice:QCA/Atheros 7xxx/9xxx platforms""choice431e3c1d0104
TARGET_AP325RXA	arch/sh/Kconfig	/^config TARGET_AP325RXA$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_APALIS_T30	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_APALIS_T30$/;"	c	choice:choiced51ff68f0104
TARGET_APF27	arch/arm/Kconfig	/^config TARGET_APF27$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_APX4DEVKIT	arch/arm/Kconfig	/^config TARGET_APX4DEVKIT$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_AP_SH4A_4A	arch/sh/Kconfig	/^config TARGET_AP_SH4A_4A$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_ARIA	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_ARIA$/;"	c	choice:mpc512x CPU""choice919b2f980104
TARGET_ARISTAINETOS	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS$/;"	c	choice:choiceab6fbbff0104
TARGET_ARISTAINETOS2	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS2$/;"	c	choice:choiceab6fbbff0104
TARGET_ARISTAINETOS2B	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ARISTAINETOS2B$/;"	c	choice:choiceab6fbbff0104
TARGET_ARMADILLO_800EVA	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_ARMADILLO_800EVA$/;"	c	choice:choice335b3af40104
TARGET_ARNDALE	arch/arm/mach-exynos/Kconfig	/^config TARGET_ARNDALE$/;"	c	choice:choice9b416b3d0304
TARGET_ASPENITE	arch/arm/Kconfig	/^config TARGET_ASPENITE$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_ASTRO_MCF5373L	arch/m68k/Kconfig	/^config TARGET_ASTRO_MCF5373L$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_AT91RM9200EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91RM9200EK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9260EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9260EK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9261EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9261EK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9263EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9263EK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9M10G45EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9M10G45EK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9N12EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9N12EK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9RLEK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9RLEK$/;"	c	choice:choice338303b60104
TARGET_AT91SAM9X5EK	arch/arm/mach-at91/Kconfig	/^config TARGET_AT91SAM9X5EK$/;"	c	choice:choice338303b60104
TARGET_ATNGW100	arch/avr32/Kconfig	/^config TARGET_ATNGW100$/;"	c	choice:AVR32 architecture""choice59ba59100104
TARGET_ATNGW100MKII	arch/avr32/Kconfig	/^config TARGET_ATNGW100MKII$/;"	c	choice:AVR32 architecture""choice59ba59100104
TARGET_ATSTK1002	arch/avr32/Kconfig	/^config TARGET_ATSTK1002$/;"	c	choice:AVR32 architecture""choice59ba59100104
TARGET_AXS10X	arch/arc/Kconfig	/^config TARGET_AXS10X$/;"	c	choice:ARC architecture""choice763e4ef80404
TARGET_B4860QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_B4860QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_BAMBOO	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_BAMBOO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_BAV335X	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_BAV335X$/;"	c	choice:choice097e41480104
TARGET_BAYLEYBAY	board/intel/Kconfig	/^config TARGET_BAYLEYBAY$/;"	c	choice:choice7d5621a80104
TARGET_BCM23550_W1D	arch/arm/Kconfig	/^config TARGET_BCM23550_W1D$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BCM28155_AP	arch/arm/Kconfig	/^config TARGET_BCM28155_AP$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BCMCYGNUS	arch/arm/Kconfig	/^config TARGET_BCMCYGNUS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BCMNSP	arch/arm/Kconfig	/^config TARGET_BCMNSP$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BCT_BRETTL2	arch/blackfin/Kconfig	/^config TARGET_BCT_BRETTL2$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BEAVER	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_BEAVER$/;"	c	choice:choiced51ff68f0104
TARGET_BF506F_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF506F_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF518F_EZBRD	arch/blackfin/Kconfig	/^config TARGET_BF518F_EZBRD$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF525_UCR2	arch/blackfin/Kconfig	/^config TARGET_BF525_UCR2$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF526_EZBRD	arch/blackfin/Kconfig	/^config TARGET_BF526_EZBRD$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF527_AD7160_EVAL	arch/blackfin/Kconfig	/^config TARGET_BF527_AD7160_EVAL$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF527_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF527_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF527_SDP	arch/blackfin/Kconfig	/^config TARGET_BF527_SDP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF533_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF533_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF533_STAMP	arch/blackfin/Kconfig	/^config TARGET_BF533_STAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF537_MINOTAUR	arch/blackfin/Kconfig	/^config TARGET_BF537_MINOTAUR$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF537_PNAV	arch/blackfin/Kconfig	/^config TARGET_BF537_PNAV$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF537_SRV1	arch/blackfin/Kconfig	/^config TARGET_BF537_SRV1$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF537_STAMP	arch/blackfin/Kconfig	/^config TARGET_BF537_STAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF538F_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF538F_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF548_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF548_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF561_ACVILON	arch/blackfin/Kconfig	/^config TARGET_BF561_ACVILON$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF561_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF561_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BF609_EZKIT	arch/blackfin/Kconfig	/^config TARGET_BF609_EZKIT$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BG0900	arch/arm/Kconfig	/^config TARGET_BG0900$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BK4R1	arch/arm/Kconfig	/^config TARGET_BK4R1$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BLACKSTAMP	arch/blackfin/Kconfig	/^config TARGET_BLACKSTAMP$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BLACKVME	arch/blackfin/Kconfig	/^config TARGET_BLACKVME$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BLANCHE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_BLANCHE$/;"	c	choice:choice335b3af40104
TARGET_BOSTON	arch/mips/Kconfig	/^config TARGET_BOSTON$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_BR4	arch/blackfin/Kconfig	/^config TARGET_BR4$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_BRPPT1	arch/arm/Kconfig	/^config TARGET_BRPPT1$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BRXRE1	arch/arm/Kconfig	/^config TARGET_BRXRE1$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_BSC9131RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_BSC9131RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_BSC9132QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_BSC9132QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_BUBINGA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_BUBINGA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_C29XPCIE	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_C29XPCIE$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_CALIMAIN	arch/arm/mach-davinci/Kconfig	/^config TARGET_CALIMAIN$/;"	c	choice:choice9e1fa8550104
TARGET_CANMB	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CANMB$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_CANYONLANDS	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CANYONLANDS$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_CARDHU	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_CARDHU$/;"	c	choice:choiced51ff68f0104
TARGET_CEI_TK1_SOM	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_CEI_TK1_SOM$/;"	c	choice:choice925842630104
TARGET_CGTQMX6EVAL	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_CGTQMX6EVAL$/;"	c	choice:choiceab6fbbff0104
TARGET_CHARON	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CHARON$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_CHROMEBOOK_JERRY	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_CHROMEBOOK_JERRY$/;"	c
TARGET_CHROMEBOOK_LINK	board/google/Kconfig	/^config TARGET_CHROMEBOOK_LINK$/;"	c	choice:choice7ea0e7e90104
TARGET_CHROMEBOOK_SAMUS	board/google/Kconfig	/^config TARGET_CHROMEBOOK_SAMUS$/;"	c	choice:choice7ea0e7e90104
TARGET_CHROMEBOX_PANTHER	board/google/Kconfig	/^config TARGET_CHROMEBOX_PANTHER$/;"	c	choice:choice7ea0e7e90104
TARGET_CLEARFOG	arch/arm/mach-mvebu/Kconfig	/^config TARGET_CLEARFOG$/;"	c	choice:choice1faa09360104
TARGET_CM5200	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_CM5200$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_CM_BF527	arch/blackfin/Kconfig	/^config TARGET_CM_BF527$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_CM_BF533	arch/blackfin/Kconfig	/^config TARGET_CM_BF533$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_CM_BF537E	arch/blackfin/Kconfig	/^config TARGET_CM_BF537E$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_CM_BF537U	arch/blackfin/Kconfig	/^config TARGET_CM_BF537U$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_CM_BF548	arch/blackfin/Kconfig	/^config TARGET_CM_BF548$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_CM_BF561	arch/blackfin/Kconfig	/^config TARGET_CM_BF561$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_CM_FX6	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_CM_FX6$/;"	c	choice:choiceab6fbbff0104
TARGET_CM_T335	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_CM_T335$/;"	c	choice:choice097e41480104
TARGET_CM_T35	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_CM_T35$/;"	c	choice:choice629b97240104
TARGET_CM_T3517	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_CM_T3517$/;"	c	choice:choice629b97240104
TARGET_CM_T43	arch/arm/Kconfig	/^config TARGET_CM_T43$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_CM_T54	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_CM_T54$/;"	c	choice:choice4b9479260104
TARGET_COBRA5272	arch/m68k/Kconfig	/^config TARGET_COBRA5272$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_COLIBRI_IMX7	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_COLIBRI_IMX7$/;"	c	choice:choice1fec2d000104
TARGET_COLIBRI_PXA270	arch/arm/Kconfig	/^config TARGET_COLIBRI_PXA270$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_COLIBRI_T20	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_COLIBRI_T20$/;"	c	choice:choiced115656e0104
TARGET_COLIBRI_T30	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_COLIBRI_T30$/;"	c	choice:choiced51ff68f0104
TARGET_COLIBRI_VF	arch/arm/Kconfig	/^config TARGET_COLIBRI_VF$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_CONGA_QEVAL20_QA3_E3845	board/congatec/Kconfig	/^config TARGET_CONGA_QEVAL20_QA3_E3845$/;"	c	choice:choiced0b1a2100104
TARGET_CONTROLCENTERD	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_CONTROLCENTERD$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_COREBOOT	board/coreboot/Kconfig	/^config TARGET_COREBOOT$/;"	c	choice:choice99c575090104
TARGET_CORVUS	arch/arm/mach-at91/Kconfig	/^config TARGET_CORVUS$/;"	c	choice:choice338303b60104
TARGET_COUGARCANYON2	board/intel/Kconfig	/^config TARGET_COUGARCANYON2$/;"	c	choice:choice7d5621a80104
TARGET_CPCI2DP	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CPCI2DP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_CPCI4052	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_CPCI4052$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_CROWNBAY	board/intel/Kconfig	/^config TARGET_CROWNBAY$/;"	c	choice:choice7d5621a80104
TARGET_CYRUS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_CYRUS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_DA850EVM	arch/arm/mach-davinci/Kconfig	/^config TARGET_DA850EVM$/;"	c	choice:choice9e1fa8550104
TARGET_DALMORE	arch/arm/mach-tegra/tegra114/Kconfig	/^config TARGET_DALMORE$/;"	c	choice:choice8e4db1420104
TARGET_DBAU1X00	arch/mips/Kconfig	/^config TARGET_DBAU1X00$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_DB_88F6720	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6720$/;"	c	choice:choice1faa09360104
TARGET_DB_88F6820_AMC	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6820_AMC$/;"	c	choice:choice1faa09360104
TARGET_DB_88F6820_GP	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_88F6820_GP$/;"	c	choice:choice1faa09360104
TARGET_DB_MV784MP_GP	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DB_MV784MP_GP$/;"	c	choice:choice1faa09360104
TARGET_DDR	arch/arm/mach-mvebu/mbus.c	/^#define TARGET_DDR	/;"	d	file:
TARGET_DEVKIT3250	arch/arm/Kconfig	/^config TARGET_DEVKIT3250$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_DEVKIT8000	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_DEVKIT8000$/;"	c	choice:choice629b97240104
TARGET_DFI_BT700	board/dfi/Kconfig	/^config TARGET_DFI_BT700$/;"	c	choice:choice9009af1f0104
TARGET_DIGSY_MTC	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_DIGSY_MTC$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_DLVISION	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_DLVISION$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_DLVISION_10G	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_DLVISION_10G$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_DNP5370	arch/blackfin/Kconfig	/^config TARGET_DNP5370$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_DNS325	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DNS325$/;"	c	choice:choice87da77410104
TARGET_DOCKSTAR	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DOCKSTAR$/;"	c	choice:choice87da77410104
TARGET_DRA7XX_EVM	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_DRA7XX_EVM$/;"	c	choice:choice4b9479260104
TARGET_DRACO	arch/arm/Kconfig	/^config TARGET_DRACO$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_DRAGONBOARD410C	arch/arm/mach-snapdragon/Kconfig	/^config TARGET_DRAGONBOARD410C$/;"	c	choice:choice095a19240104
TARGET_DREAMPLUG	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DREAMPLUG$/;"	c	choice:choice87da77410104
TARGET_DS109	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_DS109$/;"	c	choice:choice87da77410104
TARGET_DS414	arch/arm/mach-mvebu/Kconfig	/^config TARGET_DS414$/;"	c	choice:choice1faa09360104
TARGET_DUOVERO	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_DUOVERO$/;"	c	choice:choiced71808250104
TARGET_E2220_1170	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_E2220_1170$/;"	c	choice:choice41b8a27f0104
TARGET_EA20	arch/arm/mach-davinci/Kconfig	/^config TARGET_EA20$/;"	c	choice:choice9e1fa8550104
TARGET_EB_CPU5282	arch/m68k/Kconfig	/^config TARGET_EB_CPU5282$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_ECO5PK	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_ECO5PK$/;"	c	choice:choice629b97240104
TARGET_ECOVEC	arch/sh/Kconfig	/^config TARGET_ECOVEC$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_EDB93XX	arch/arm/Kconfig	/^config TARGET_EDB93XX$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_EDMINIV2	arch/arm/mach-orion5x/Kconfig	/^config TARGET_EDMINIV2$/;"	c	choice:choicec8ba732b0104
TARGET_EFI	board/efi/Kconfig	/^config TARGET_EFI$/;"	c	choice:choice156664600104
TARGET_EMBESTMX6BOARDS	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_EMBESTMX6BOARDS$/;"	c	choice:choiceab6fbbff0104
TARGET_EP_NO_R	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define TARGET_EP_NO_R	/;"	d
TARGET_EP_NO_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define TARGET_EP_NO_T	/;"	d
TARGET_ERR_ADDR_HI	drivers/mtd/nand/denali.h	/^#define TARGET_ERR_ADDR_HI	/;"	d
TARGET_ERR_ADDR_HI__VALUE	drivers/mtd/nand/denali.h	/^#define     TARGET_ERR_ADDR_HI__VALUE	/;"	d
TARGET_ERR_ADDR_LO	drivers/mtd/nand/denali.h	/^#define TARGET_ERR_ADDR_LO	/;"	d
TARGET_ERR_ADDR_LO__VALUE	drivers/mtd/nand/denali.h	/^#define     TARGET_ERR_ADDR_LO__VALUE	/;"	d
TARGET_ESPRESSO7420	arch/arm/mach-exynos/Kconfig	/^config  TARGET_ESPRESSO7420$/;"	c	choice:choice9b416b3d0404
TARGET_ESPT	arch/sh/Kconfig	/^config TARGET_ESPT$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_ETAMIN	arch/arm/Kconfig	/^config TARGET_ETAMIN$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_ETHERNUT5	arch/arm/mach-at91/Kconfig	/^config TARGET_ETHERNUT5$/;"	c	choice:choice338303b60104
TARGET_EVB_RK3036	arch/arm/mach-rockchip/rk3036/Kconfig	/^config TARGET_EVB_RK3036$/;"	c
TARGET_EVB_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_EVB_RK3288$/;"	c
TARGET_EVB_RK3399	arch/arm/mach-rockchip/rk3399/Kconfig	/^config TARGET_EVB_RK3399$/;"	c	choice:choice49d2f70e0104
TARGET_EXT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define TARGET_EXT	/;"	d
TARGET_FENNEC_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_FENNEC_RK3288$/;"	c
TARGET_FIREFLY_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_FIREFLY_RK3288$/;"	c
TARGET_FLEA3	arch/arm/Kconfig	/^config TARGET_FLEA3$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_GALILEO	board/intel/Kconfig	/^config TARGET_GALILEO$/;"	c	choice:choice7d5621a80104
TARGET_GDPPC440ETX	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_GDPPC440ETX$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_GE_B450V3	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B450V3$/;"	c	choice:choiceab6fbbff0104
TARGET_GE_B650V3	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B650V3$/;"	c	choice:choiceab6fbbff0104
TARGET_GE_B850V3	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GE_B850V3$/;"	c	choice:choiceab6fbbff0104
TARGET_GOFLEXHOME	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_GOFLEXHOME$/;"	c	choice:choice87da77410104
TARGET_GOSE	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_GOSE$/;"	c	choice:choice335b3af40104
TARGET_GPLUGD	arch/arm/Kconfig	/^config TARGET_GPLUGD$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_GRASSHOPPER	arch/avr32/Kconfig	/^config TARGET_GRASSHOPPER$/;"	c	choice:AVR32 architecture""choice59ba59100104
TARGET_GRSIM	arch/sparc/Kconfig	/^config TARGET_GRSIM$/;"	c	choice:SPARC architecture""choice37f822db0104
TARGET_GRSIM_LEON2	arch/sparc/Kconfig	/^config TARGET_GRSIM_LEON2$/;"	c	choice:SPARC architecture""choice37f822db0104
TARGET_GR_CPCI_AX2000	arch/sparc/Kconfig	/^config TARGET_GR_CPCI_AX2000$/;"	c	choice:SPARC architecture""choice37f822db0104
TARGET_GR_EP2S60	arch/sparc/Kconfig	/^config TARGET_GR_EP2S60$/;"	c	choice:SPARC architecture""choice37f822db0104
TARGET_GR_XC3S_1500	arch/sparc/Kconfig	/^config TARGET_GR_XC3S_1500$/;"	c	choice:SPARC architecture""choice37f822db0104
TARGET_GURNARD	arch/arm/mach-at91/Kconfig	/^config TARGET_GURNARD$/;"	c	choice:choice338303b60104
TARGET_GURUPLUG	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_GURUPLUG$/;"	c	choice:choice87da77410104
TARGET_GW_VENTANA	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_GW_VENTANA$/;"	c	choice:choiceab6fbbff0104
TARGET_H2200	arch/arm/Kconfig	/^config TARGET_H2200$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_HARMONY	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_HARMONY$/;"	c	choice:choiced115656e0104
TARGET_HIKEY	arch/arm/Kconfig	/^config TARGET_HIKEY$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_HRCON	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_HRCON$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_IB62X0	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_IB62X0$/;"	c	choice:choice87da77410104
TARGET_IBF_DSP561	arch/blackfin/Kconfig	/^config TARGET_IBF_DSP561$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_ICON	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_ICON$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_ICONNECT	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_ICONNECT$/;"	c	choice:choice87da77410104
TARGET_IDS8313	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_IDS8313$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_IMX31_PHYCORE	arch/arm/Kconfig	/^config TARGET_IMX31_PHYCORE$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_INKA4X0	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_INKA4X0$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_INT	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define TARGET_INT	/;"	d
TARGET_INTIP	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_INTIP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_IO	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_IO64	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IO64$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_IOCON	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_IOCON$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_IP04	arch/blackfin/Kconfig	/^config TARGET_IP04$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_IPAM390	arch/arm/mach-davinci/Kconfig	/^config TARGET_IPAM390$/;"	c	choice:choice9e1fa8550104
TARGET_IPEK01	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_IPEK01$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_JETSON_TK1	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_JETSON_TK1$/;"	c	choice:choice925842630104
TARGET_JUPITER	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_JUPITER$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_K2E_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2E_EVM$/;"	c	choice:choicef20e67690104
TARGET_K2G_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2G_EVM$/;"	c	choice:choicef20e67690104
TARGET_K2HK_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2HK_EVM$/;"	c	choice:choicef20e67690104
TARGET_K2L_EVM	arch/arm/mach-keystone/Kconfig	/^config TARGET_K2L_EVM$/;"	c	choice:choicef20e67690104
TARGET_KATMAI	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_KATMAI$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_KC1	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_KC1$/;"	c	choice:choiced71808250104
TARGET_KILAUEA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_KILAUEA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_KM82XX	arch/powerpc/cpu/mpc8260/Kconfig	/^config TARGET_KM82XX$/;"	c	choice:mpc8260 CPU""choicef6fc79380104
TARGET_KM8360	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_KM8360$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_KMP204X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_KMP204X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_KM_KIRKWOOD	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_KM_KIRKWOOD$/;"	c	choice:choice87da77410104
TARGET_KOELSCH	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_KOELSCH$/;"	c	choice:choice335b3af40104
TARGET_KOSAGI_NOVENA	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_KOSAGI_NOVENA$/;"	c	choice:choiceab6fbbff0104
TARGET_KYLIN_RK3036	arch/arm/mach-rockchip/rk3036/Kconfig	/^config TARGET_KYLIN_RK3036$/;"	c
TARGET_KZM9G	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_KZM9G$/;"	c	choice:choice335b3af40104
TARGET_LAGER	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_LAGER$/;"	c	choice:choice335b3af40104
TARGET_LEGOEV3	arch/arm/mach-davinci/Kconfig	/^config TARGET_LEGOEV3$/;"	c	choice:choice9e1fa8550104
TARGET_LS1012AFRDM	arch/arm/Kconfig	/^config TARGET_LS1012AFRDM$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1012AQDS	arch/arm/Kconfig	/^config TARGET_LS1012AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1012ARDB	arch/arm/Kconfig	/^config TARGET_LS1012ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1021AQDS	arch/arm/Kconfig	/^config TARGET_LS1021AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1021ATWR	arch/arm/Kconfig	/^config TARGET_LS1021ATWR$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1043AQDS	arch/arm/Kconfig	/^config TARGET_LS1043AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1043ARDB	arch/arm/Kconfig	/^config TARGET_LS1043ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1046AQDS	arch/arm/Kconfig	/^config TARGET_LS1046AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS1046ARDB	arch/arm/Kconfig	/^config TARGET_LS1046ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS2080AQDS	arch/arm/Kconfig	/^config TARGET_LS2080AQDS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS2080ARDB	arch/arm/Kconfig	/^config TARGET_LS2080ARDB$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS2080A_EMU	arch/arm/Kconfig	/^config TARGET_LS2080A_EMU$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LS2080A_SIMU	arch/arm/Kconfig	/^config TARGET_LS2080A_SIMU$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_LSXL	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_LSXL$/;"	c	choice:choice87da77410104
TARGET_LUAN	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_LUAN$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_LWMON5	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_LWMON5$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_M28EVK	arch/arm/Kconfig	/^config TARGET_M28EVK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_M5208EVBE	arch/m68k/Kconfig	/^config TARGET_M5208EVBE$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M52277EVB	arch/m68k/Kconfig	/^config TARGET_M52277EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5235EVB	arch/m68k/Kconfig	/^config TARGET_M5235EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5249EVB	arch/m68k/Kconfig	/^config TARGET_M5249EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5253DEMO	arch/m68k/Kconfig	/^config TARGET_M5253DEMO$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5253EVBE	arch/m68k/Kconfig	/^config TARGET_M5253EVBE$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5272C3	arch/m68k/Kconfig	/^config TARGET_M5272C3$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5275EVB	arch/m68k/Kconfig	/^config TARGET_M5275EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5282EVB	arch/m68k/Kconfig	/^config TARGET_M5282EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M53017EVB	arch/m68k/Kconfig	/^config TARGET_M53017EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5329EVB	arch/m68k/Kconfig	/^config TARGET_M5329EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5373EVB	arch/m68k/Kconfig	/^config TARGET_M5373EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M53EVK	arch/arm/Kconfig	/^config TARGET_M53EVK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_M54418TWR	arch/m68k/Kconfig	/^config TARGET_M54418TWR$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M54451EVB	arch/m68k/Kconfig	/^config TARGET_M54451EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M54455EVB	arch/m68k/Kconfig	/^config TARGET_M54455EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5475EVB	arch/m68k/Kconfig	/^config TARGET_M5475EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_M5485EVB	arch/m68k/Kconfig	/^config TARGET_M5485EVB$/;"	c	choice:M68000 architecture""choicebc89bc280104
TARGET_MA5D4EVK	arch/arm/mach-at91/Kconfig	/^config TARGET_MA5D4EVK$/;"	c	choice:choice338303b60104
TARGET_MAKALU	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MAKALU$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_MALTA	arch/mips/Kconfig	/^config TARGET_MALTA$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_MAXBCM	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MAXBCM$/;"	c	choice:choice1faa09360104
TARGET_MCX	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_MCX$/;"	c	choice:choice629b97240104
TARGET_MECP5123	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_MECP5123$/;"	c	choice:mpc512x CPU""choice919b2f980104
TARGET_MEDCOM_WIDE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_MEDCOM_WIDE$/;"	c	choice:choiced115656e0104
TARGET_MEESC	arch/arm/mach-at91/Kconfig	/^config TARGET_MEESC$/;"	c	choice:choice338303b60104
TARGET_MICROBLAZE_GENERIC	arch/microblaze/Kconfig	/^config TARGET_MICROBLAZE_GENERIC$/;"	c	choice:MicroBlaze architecture""choicee81d234a0104
TARGET_MIGOR	arch/sh/Kconfig	/^config TARGET_MIGOR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_MINIARM_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_MINIARM_RK3288$/;"	c
TARGET_MINNOWMAX	board/intel/Kconfig	/^config TARGET_MINNOWMAX$/;"	c	choice:choice7d5621a80104
TARGET_MIP405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MIP405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_MIP405T	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_MIP405T$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_MOTIONPRO	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_MOTIONPRO$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_MPC5121ADS	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_MPC5121ADS$/;"	c	choice:mpc512x CPU""choice919b2f980104
TARGET_MPC8308RDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8308RDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8308_P1M	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8308_P1M$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8313ERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8313ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8315ERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8315ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8323ERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8323ERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC832XEMDS	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC832XEMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8349EMDS	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8349EMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8349ITX	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC8349ITX$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC837XEMDS	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC837XEMDS$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC837XERDB	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_MPC837XERDB$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_MPC8536DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8536DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8540ADS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8540ADS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8541CDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8541CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8544DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8544DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8548CDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8548CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8555CDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8555CDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8560ADS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8560ADS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8568MDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8568MDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8569MDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8569MDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8572DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_MPC8572DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_MPC8610HPCD	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_MPC8610HPCD$/;"	c	choice:mpc86xx CPU""choiceda2881060104
TARGET_MPC8641HPCN	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_MPC8641HPCN$/;"	c	choice:mpc86xx CPU""choiceda2881060104
TARGET_MPR2	arch/sh/Kconfig	/^config TARGET_MPR2$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_MS7720SE	arch/sh/Kconfig	/^config TARGET_MS7720SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_MS7722SE	arch/sh/Kconfig	/^config TARGET_MS7722SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_MS7750SE	arch/sh/Kconfig	/^config TARGET_MS7750SE$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_MT_VENTOUX	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_MT_VENTOUX$/;"	c	choice:choice629b97240104
TARGET_MUNICES	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_MUNICES$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_MVEBU_DB_88F3720	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MVEBU_DB_88F3720$/;"	c	choice:choice1faa09360104
TARGET_MVEBU_DB_88F7040	arch/arm/mach-mvebu/Kconfig	/^config TARGET_MVEBU_DB_88F7040$/;"	c	choice:choice1faa09360104
TARGET_MX23EVK	arch/arm/Kconfig	/^config TARGET_MX23EVK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX23_OLINUXINO	arch/arm/Kconfig	/^config TARGET_MX23_OLINUXINO$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX25PDK	arch/arm/Kconfig	/^config TARGET_MX25PDK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX28EVK	arch/arm/Kconfig	/^config TARGET_MX28EVK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX31ADS	arch/arm/Kconfig	/^config TARGET_MX31ADS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX31PDK	arch/arm/Kconfig	/^config TARGET_MX31PDK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX35PDK	arch/arm/Kconfig	/^config TARGET_MX35PDK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX51EVK	arch/arm/Kconfig	/^config TARGET_MX51EVK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX53ARD	arch/arm/Kconfig	/^config TARGET_MX53ARD$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX53EVK	arch/arm/Kconfig	/^config TARGET_MX53EVK$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX53LOCO	arch/arm/Kconfig	/^config TARGET_MX53LOCO$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX53SMD	arch/arm/Kconfig	/^config TARGET_MX53SMD$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_MX6CUBOXI	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6CUBOXI$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6QARM2	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6QARM2$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6QSABREAUTO	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6QSABREAUTO$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6Q_ICORE	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6Q_ICORE$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6SABRESD	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SABRESD$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6SLEVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SLEVK$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6SXSABREAUTO	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SXSABREAUTO$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6SXSABRESD	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6SXSABRESD$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6ULL_14X14_EVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6ULL_14X14_EVK$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6UL_14X14_EVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6UL_14X14_EVK$/;"	c	choice:choiceab6fbbff0104
TARGET_MX6UL_9X9_EVK	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_MX6UL_9X9_EVK$/;"	c	choice:choiceab6fbbff0104
TARGET_MX7DSABRESD	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_MX7DSABRESD$/;"	c	choice:choice1fec2d000104
TARGET_NAS220	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NAS220$/;"	c	choice:choice87da77410104
TARGET_NEO	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_NEO$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_NET2BIG_V2	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NET2BIG_V2$/;"	c	choice:choice87da77410104
TARGET_NETSPACE_V2	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NETSPACE_V2$/;"	c	choice:choice87da77410104
TARGET_NITROGEN6X	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_NITROGEN6X$/;"	c	choice:choiceab6fbbff0104
TARGET_NOKIA_RX51	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_NOKIA_RX51$/;"	c	choice:choice629b97240104
TARGET_NSA310S	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_NSA310S$/;"	c	choice:choice87da77410104
TARGET_NSIM	arch/arc/Kconfig	/^config TARGET_NSIM$/;"	c	choice:ARC architecture""choice763e4ef80404
TARGET_NYAN_BIG	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_NYAN_BIG$/;"	c	choice:choice925842630104
TARGET_O2D	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2D$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_O2D300	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2D300$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_O2DNT2	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2DNT2$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_O2I	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2I$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_O2MNT	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O2MNT$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_O3DNT	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_O3DNT$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_ODROID	arch/arm/mach-exynos/Kconfig	/^config TARGET_ODROID$/;"	c	choice:choice9b416b3d0204
TARGET_ODROID_C2	arch/arm/mach-meson/Kconfig	/^config TARGET_ODROID_C2$/;"	c
TARGET_ODROID_XU3	arch/arm/mach-exynos/Kconfig	/^config TARGET_ODROID_XU3$/;"	c	choice:choice9b416b3d0304
TARGET_OMAP3_BEAGLE	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_BEAGLE$/;"	c	choice:choice629b97240104
TARGET_OMAP3_CAIRO	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_CAIRO$/;"	c	choice:choice629b97240104
TARGET_OMAP3_EVM	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_EVM$/;"	c	choice:choice629b97240104
TARGET_OMAP3_IGEP00X0	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_IGEP00X0$/;"	c	choice:choice629b97240104
TARGET_OMAP3_LOGIC	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_LOGIC$/;"	c	choice:choice629b97240104
TARGET_OMAP3_OVERO	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_OVERO$/;"	c	choice:choice629b97240104
TARGET_OMAP3_PANDORA	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_PANDORA$/;"	c	choice:choice629b97240104
TARGET_OMAP3_ZOOM1	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_OMAP3_ZOOM1$/;"	c	choice:choice629b97240104
TARGET_OMAP4_PANDA	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_OMAP4_PANDA$/;"	c	choice:choiced71808250104
TARGET_OMAP4_SDP4430	arch/arm/cpu/armv7/omap4/Kconfig	/^config TARGET_OMAP4_SDP4430$/;"	c	choice:choiced71808250104
TARGET_OMAP5_UEVM	arch/arm/cpu/armv7/omap5/Kconfig	/^config TARGET_OMAP5_UEVM$/;"	c	choice:choice4b9479260104
TARGET_OMAPL138_LCDK	arch/arm/mach-davinci/Kconfig	/^config TARGET_OMAPL138_LCDK$/;"	c	choice:choice9e1fa8550104
TARGET_OPENRD	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_OPENRD$/;"	c	choice:choice87da77410104
TARGET_OPENRISC_GENERIC	arch/openrisc/Kconfig	/^config TARGET_OPENRISC_GENERIC$/;"	c	choice:OpenRISC architecture""choice807681850104
TARGET_ORIGEN	arch/arm/mach-exynos/Kconfig	/^config TARGET_ORIGEN$/;"	c	choice:choice9b416b3d0204
TARGET_OT1200	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_OT1200$/;"	c	choice:choiceab6fbbff0104
TARGET_P1010RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1010RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P1022DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1022DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P1023RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1023RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P1_P2_RDB_PC	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1_P2_RDB_PC$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P1_TWR	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P1_TWR$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P2041RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P2041RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P2371_0000	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2371_0000$/;"	c	choice:choice41b8a27f0104
TARGET_P2371_2180	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2371_2180$/;"	c	choice:choice41b8a27f0104
TARGET_P2571	arch/arm/mach-tegra/tegra210/Kconfig	/^config TARGET_P2571$/;"	c	choice:choice41b8a27f0104
TARGET_P2771_0000	arch/arm/mach-tegra/tegra186/Kconfig	/^config TARGET_P2771_0000$/;"	c	choice:choice93908b2b0104
TARGET_P3041DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P3041DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P4080DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P4080DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P5020DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P5020DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_P5040DS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_P5040DS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_PATI	arch/powerpc/cpu/mpc5xx/Kconfig	/^config TARGET_PATI$/;"	c	choice:mpc5xx CPU""choice42cbeb8d0104
TARGET_PAZ00	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_PAZ00$/;"	c	choice:choiced115656e0104
TARGET_PB1X00	arch/mips/Kconfig	/^config TARGET_PB1X00$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_PCM030	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_PCM030$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_PCM051	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PCM051$/;"	c	choice:choice097e41480104
TARGET_PCM052	arch/arm/Kconfig	/^config TARGET_PCM052$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_PCM058	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PCM058$/;"	c	choice:choiceab6fbbff0104
TARGET_PDM360NG	arch/powerpc/cpu/mpc512x/Kconfig	/^config TARGET_PDM360NG$/;"	c	choice:mpc512x CPU""choice919b2f980104
TARGET_PEACH_PI	arch/arm/mach-exynos/Kconfig	/^config TARGET_PEACH_PI$/;"	c	choice:choice9b416b3d0304
TARGET_PEACH_PIT	arch/arm/mach-exynos/Kconfig	/^config TARGET_PEACH_PIT$/;"	c	choice:choice9b416b3d0304
TARGET_PENGWYN	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PENGWYN$/;"	c	choice:choice097e41480104
TARGET_PEPPER	arch/arm/cpu/armv7/am33xx/Kconfig	/^config TARGET_PEPPER$/;"	c	choice:choice097e41480104
TARGET_PIC32MZDASK	arch/mips/mach-pic32/Kconfig	/^config TARGET_PIC32MZDASK$/;"	c	choice:Microchip PIC32 platforms""choicef4d9e1b10204
TARGET_PICOSAM9G45	arch/arm/mach-at91/Kconfig	/^config TARGET_PICOSAM9G45$/;"	c	choice:choice338303b60104
TARGET_PICO_IMX6UL	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PICO_IMX6UL$/;"	c	choice:choiceab6fbbff0104
TARGET_PIP405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PIP405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_PLATINUM_PICON	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PLATINUM_PICON$/;"	c	choice:choiceab6fbbff0104
TARGET_PLATINUM_TITANIUM	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_PLATINUM_TITANIUM$/;"	c	choice:choiceab6fbbff0104
TARGET_PLU405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PLU405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_PLUTUX	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_PLUTUX$/;"	c	choice:choiced115656e0104
TARGET_PM9261	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9261$/;"	c	choice:choice338303b60104
TARGET_PM9263	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9263$/;"	c	choice:choice338303b60104
TARGET_PM9G45	arch/arm/mach-at91/Kconfig	/^config TARGET_PM9G45$/;"	c	choice:choice338303b60104
TARGET_PMC405DE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PMC405DE$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_PMC440	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_PMC440$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_POGO_E02	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_POGO_E02$/;"	c	choice:choice87da77410104
TARGET_POPMETAL_RK3288	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_POPMETAL_RK3288$/;"	c
TARGET_PORTER	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_PORTER$/;"	c	choice:choice335b3af40104
TARGET_PR1	arch/blackfin/Kconfig	/^config TARGET_PR1$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_PXM2	arch/arm/Kconfig	/^config TARGET_PXM2$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_QEMU_MIPS	arch/mips/Kconfig	/^config TARGET_QEMU_MIPS$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_QEMU_PPCE500	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_QEMU_PPCE500$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_QEMU_X86	board/emulation/Kconfig	/^config TARGET_QEMU_X86$/;"	c	choice:choice59657bba0104
TARGET_R0P7734	arch/sh/Kconfig	/^config TARGET_R0P7734$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_R2DPLUS	arch/sh/Kconfig	/^config TARGET_R2DPLUS$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_R7780MP	arch/sh/Kconfig	/^config TARGET_R7780MP$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_RASTABAN	arch/arm/Kconfig	/^config TARGET_RASTABAN$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_REDWOOD	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_REDWOOD$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_ROCK2	arch/arm/mach-rockchip/rk3288/Kconfig	/^config TARGET_ROCK2$/;"	c
TARGET_RPI	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
TARGET_RPI_2	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_2$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
TARGET_RPI_3	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_3$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
TARGET_RPI_3_32B	arch/arm/mach-bcm283x/Kconfig	/^config TARGET_RPI_3_32B$/;"	c	choice:Broadcom BCM283X family""choice6f3207de0104
TARGET_RSK7203	arch/sh/Kconfig	/^config TARGET_RSK7203$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_RSK7264	arch/sh/Kconfig	/^config TARGET_RSK7264$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_RSK7269	arch/sh/Kconfig	/^config TARGET_RSK7269$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_RUT	arch/arm/Kconfig	/^config TARGET_RUT$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_S32V234EVB	arch/arm/Kconfig	/^config TARGET_S32V234EVB$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_S5PC210_UNIVERSAL	arch/arm/mach-exynos/Kconfig	/^config TARGET_S5PC210_UNIVERSAL$/;"	c	choice:choice9b416b3d0204
TARGET_S5P_GONI	arch/arm/mach-s5pc1xx/Kconfig	/^config TARGET_S5P_GONI$/;"	c	choice:choice5f681bf30104
TARGET_SALVATOR_X	arch/arm/mach-rmobile/Kconfig.64	/^config TARGET_SALVATOR_X$/;"	c	choice:choice335b3b590104
TARGET_SAMA5D2_PTC	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D2_PTC$/;"	c	choice:choice338303b60104
TARGET_SAMA5D2_XPLAINED	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D2_XPLAINED$/;"	c	choice:choice338303b60104
TARGET_SAMA5D3XEK	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D3XEK$/;"	c	choice:choice338303b60104
TARGET_SAMA5D3_XPLAINED	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D3_XPLAINED$/;"	c	choice:choice338303b60104
TARGET_SAMA5D4EK	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D4EK$/;"	c	choice:choice338303b60104
TARGET_SAMA5D4_XPLAINED	arch/arm/mach-at91/Kconfig	/^config TARGET_SAMA5D4_XPLAINED$/;"	c	choice:choice338303b60104
TARGET_SANSA_FUZE_PLUS	arch/arm/Kconfig	/^config TARGET_SANSA_FUZE_PLUS$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SBC8349	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_SBC8349$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_SBC8548	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_SBC8548$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_SBC8641D	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_SBC8641D$/;"	c	choice:mpc86xx CPU""choiceda2881060104
TARGET_SC_SPS_1	arch/arm/Kconfig	/^config TARGET_SC_SPS_1$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SEABOARD	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_SEABOARD$/;"	c	choice:choiced115656e0104
TARGET_SECOMX6	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_SECOMX6$/;"	c	choice:choiceab6fbbff0104
TARGET_SEQUOIA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_SEQUOIA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_SH7752EVB	arch/sh/Kconfig	/^config TARGET_SH7752EVB$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_SH7753EVB	arch/sh/Kconfig	/^config TARGET_SH7753EVB$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_SH7757LCR	arch/sh/Kconfig	/^config TARGET_SH7757LCR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_SH7763RDP	arch/sh/Kconfig	/^config TARGET_SH7763RDP$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_SH7785LCR	arch/sh/Kconfig	/^config TARGET_SH7785LCR$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_SHEEVAPLUG	arch/arm/mach-kirkwood/Kconfig	/^config TARGET_SHEEVAPLUG$/;"	c	choice:choice87da77410104
TARGET_SHMIN	arch/sh/Kconfig	/^config TARGET_SHMIN$/;"	c	choice:SuperH architecture""choiceea2bb93d0104
TARGET_SILK	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_SILK$/;"	c	choice:choice335b3af40104
TARGET_SMARTWEB	arch/arm/mach-at91/Kconfig	/^config TARGET_SMARTWEB$/;"	c	choice:choice338303b60104
TARGET_SMDK2410	arch/arm/Kconfig	/^config TARGET_SMDK2410$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SMDK5250	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDK5250$/;"	c	choice:choice9b416b3d0304
TARGET_SMDK5420	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDK5420$/;"	c	choice:choice9b416b3d0304
TARGET_SMDKC100	arch/arm/mach-s5pc1xx/Kconfig	/^config TARGET_SMDKC100$/;"	c	choice:choice5f681bf30104
TARGET_SMDKV310	arch/arm/mach-exynos/Kconfig	/^config TARGET_SMDKV310$/;"	c	choice:choice9b416b3d0204
TARGET_SNAPPER9260	arch/arm/mach-at91/Kconfig	/^config TARGET_SNAPPER9260$/;"	c	choice:choice338303b60104
TARGET_SNIPER	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_SNIPER$/;"	c	choice:choice629b97240104
TARGET_SNOW	arch/arm/mach-exynos/Kconfig	/^config TARGET_SNOW$/;"	c	choice:choice9b416b3d0304
TARGET_SOCFPGA_ARRIA5	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_ARRIA5$/;"	c
TARGET_SOCFPGA_ARRIA5_SOCDK	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_ARRIA5_SOCDK$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_CYCLONE5	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_CYCLONE5$/;"	c
TARGET_SOCFPGA_CYCLONE5_SOCDK	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_CYCLONE5_SOCDK$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_DENX_MCVEVK	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_DENX_MCVEVK$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_EBV_SOCRATES	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_EBV_SOCRATES$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_GEN5	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_GEN5$/;"	c
TARGET_SOCFPGA_IS1	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_IS1$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_SAMTEC_VINING_FPGA	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_SAMTEC_VINING_FPGA$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_SR1500	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_SR1500$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_TERASIC_DE0_NANO	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_TERASIC_DE0_NANO$/;"	c	choice:choice6cea97ba0104
TARGET_SOCFPGA_TERASIC_SOCKIT	arch/arm/mach-socfpga/Kconfig	/^config TARGET_SOCFPGA_TERASIC_SOCKIT$/;"	c	choice:choice6cea97ba0104
TARGET_SOCRATES	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_SOCRATES$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_SOM_DB5800_SOM_6867	board/advantech/Kconfig	/^config TARGET_SOM_DB5800_SOM_6867$/;"	c	choice:choicebe9bc59a0104
TARGET_SPEAR300	arch/arm/Kconfig	/^config TARGET_SPEAR300$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SPEAR310	arch/arm/Kconfig	/^config TARGET_SPEAR310$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SPEAR320	arch/arm/Kconfig	/^config TARGET_SPEAR320$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SPEAR600	arch/arm/Kconfig	/^config TARGET_SPEAR600$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SPRING	arch/arm/mach-exynos/Kconfig	/^config TARGET_SPRING$/;"	c	choice:choice9b416b3d0304
TARGET_STM32F429_DISCOVERY	arch/arm/mach-stm32/stm32f4/Kconfig	/^config TARGET_STM32F429_DISCOVERY$/;"	c
TARGET_STM32F746_DISCO	arch/arm/mach-stm32/stm32f7/Kconfig	/^config TARGET_STM32F746_DISCO$/;"	c
TARGET_STOUT	arch/arm/mach-rmobile/Kconfig.32	/^config TARGET_STOUT$/;"	c	choice:choice335b3af40104
TARGET_STRIDER	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_STRIDER$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_STV0991	arch/arm/Kconfig	/^config TARGET_STV0991$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_SUVD3	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_SUVD3$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_T102XQDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T102XQDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T102XRDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T102XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T1040QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T1040QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T104XRDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T104XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T208XQDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T208XQDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T208XRDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T208XRDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T3CORP	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_T3CORP$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_T4240QDS	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T4240QDS$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_T4240RDB	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_T4240RDB$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_TAO3530	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TAO3530$/;"	c	choice:choice629b97240104
TARGET_TAURUS	arch/arm/mach-at91/Kconfig	/^config TARGET_TAURUS$/;"	c	choice:choice338303b60104
TARGET_TB100	arch/arc/Kconfig	/^config TARGET_TB100$/;"	c	choice:ARC architecture""choice763e4ef80404
TARGET_TBS2910	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TBS2910$/;"	c	choice:choiceab6fbbff0104
TARGET_TCM_BF518	arch/blackfin/Kconfig	/^config TARGET_TCM_BF518$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_TCM_BF537	arch/blackfin/Kconfig	/^config TARGET_TCM_BF537$/;"	c	choice:Blackfin architecture""choicef0c1115c0104
TARGET_TEC	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_TEC$/;"	c	choice:choiced115656e0104
TARGET_TEC_NG	arch/arm/mach-tegra/tegra30/Kconfig	/^config TARGET_TEC_NG$/;"	c	choice:choiced51ff68f0104
TARGET_THEADORABLE	arch/arm/mach-mvebu/Kconfig	/^config TARGET_THEADORABLE$/;"	c	choice:choice1faa09360104
TARGET_THUBAN	arch/arm/Kconfig	/^config TARGET_THUBAN$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_THUNDERX_88XX	arch/arm/Kconfig	/^config TARGET_THUNDERX_88XX$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_TI814X_EVM	arch/arm/Kconfig	/^config TARGET_TI814X_EVM$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_TI816X_EVM	arch/arm/Kconfig	/^config TARGET_TI816X_EVM$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_TITANIUM	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TITANIUM$/;"	c	choice:choiceab6fbbff0104
TARGET_TQM5200	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_TQM5200$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_TQM823L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM823L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM823M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM823M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM834X	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_TQM834X$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_TQM850L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM850L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM850M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM850M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM855L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM855L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM855M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM855M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM860L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM860L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM860M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM860M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM862L	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM862L$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM862M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM862M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM866M	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM866M$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQM885D	arch/powerpc/cpu/mpc8xx/Kconfig	/^config TARGET_TQM885D$/;"	c	choice:mpc8xx CPU""choiced2e20b500104
TARGET_TQMA6	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_TQMA6$/;"	c	choice:choiceab6fbbff0104
TARGET_TRATS	arch/arm/mach-exynos/Kconfig	/^config TARGET_TRATS$/;"	c	choice:choice9b416b3d0204
TARGET_TRATS2	arch/arm/mach-exynos/Kconfig	/^config TARGET_TRATS2$/;"	c	choice:choice9b416b3d0204
TARGET_TRICORDER	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TRICORDER$/;"	c	choice:choice629b97240104
TARGET_TRIMSLICE	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_TRIMSLICE$/;"	c	choice:choiced115656e0104
TARGET_TS4800	arch/arm/Kconfig	/^config TARGET_TS4800$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_TUXX1	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_TUXX1$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_TWISTER	arch/arm/cpu/armv7/omap3/Kconfig	/^config TARGET_TWISTER$/;"	c	choice:choice629b97240104
TARGET_UCP1020	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_UCP1020$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_UCP1020_NOR	board/Arcturus/ucp1020/Kconfig	/^config TARGET_UCP1020_NOR$/;"	c	choice:choiceec2bc0df0104
TARGET_UCP1020_SPIFLASH	board/Arcturus/ucp1020/Kconfig	/^config TARGET_UCP1020_SPIFLASH$/;"	c	choice:choiceec2bc0df0104
TARGET_UDOO	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_UDOO$/;"	c	choice:choiceab6fbbff0104
TARGET_USBARMORY	arch/arm/cpu/armv7/mx5/Kconfig	/^config TARGET_USBARMORY$/;"	c	choice:choice36f34afe0104
TARGET_USB_A9263	arch/arm/mach-at91/Kconfig	/^config TARGET_USB_A9263$/;"	c	choice:choice338303b60104
TARGET_V38B	arch/powerpc/cpu/mpc5xxx/Kconfig	/^config TARGET_V38B$/;"	c	choice:mpc5xxx CPU""choicea93523a50104
TARGET_VCMA9	arch/arm/Kconfig	/^config TARGET_VCMA9$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VCT	arch/mips/Kconfig	/^config TARGET_VCT$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_VE8313	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_VE8313$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_VENICE2	arch/arm/mach-tegra/tegra124/Kconfig	/^config TARGET_VENICE2$/;"	c	choice:choice925842630104
TARGET_VENTANA	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_VENTANA$/;"	c	choice:choiced115656e0104
TARGET_VEXPRESS64_AEMV8A	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_AEMV8A$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VEXPRESS64_BASE_FVP	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_BASE_FVP$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VEXPRESS64_BASE_FVP_DRAM	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_BASE_FVP_DRAM$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VEXPRESS64_JUNO	arch/arm/Kconfig	/^config TARGET_VEXPRESS64_JUNO$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VEXPRESS_CA15_TC2	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA15_TC2$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VEXPRESS_CA5X2	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA5X2$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VEXPRESS_CA9X4	arch/arm/Kconfig	/^config TARGET_VEXPRESS_CA9X4$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VF610TWR	arch/arm/Kconfig	/^config TARGET_VF610TWR$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_VINCO	arch/arm/mach-at91/Kconfig	/^config TARGET_VINCO$/;"	c	choice:choice338303b60104
TARGET_VME8349	arch/powerpc/cpu/mpc83xx/Kconfig	/^config TARGET_VME8349$/;"	c	choice:mpc83xx CPU""choice4a1261430104
TARGET_VOM405	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_VOM405$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_WALNUT	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_WALNUT$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_WANDBOARD	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_WANDBOARD$/;"	c	choice:choiceab6fbbff0104
TARGET_WARP	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_WARP$/;"	c	choice:choiceab6fbbff0104
TARGET_WARP7	arch/arm/cpu/armv7/mx7/Kconfig	/^config TARGET_WARP7$/;"	c	choice:choice1fec2d000104
TARGET_WHISTLER	arch/arm/mach-tegra/tegra20/Kconfig	/^config TARGET_WHISTLER$/;"	c	choice:choiced115656e0104
TARGET_WOODBURN	arch/arm/Kconfig	/^config TARGET_WOODBURN$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_WOODBURN_SD	arch/arm/Kconfig	/^config TARGET_WOODBURN_SD$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_WORK_92105	arch/arm/Kconfig	/^config TARGET_WORK_92105$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_X600	arch/arm/Kconfig	/^config TARGET_X600$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_XFI3	arch/arm/Kconfig	/^config TARGET_XFI3$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_XILFPGA	arch/mips/Kconfig	/^config TARGET_XILFPGA$/;"	c	choice:MIPS architecture""choiced4351f5b0104
TARGET_XILINX_PPC405_GENERIC	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XILINX_PPC405_GENERIC$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_XILINX_PPC440_GENERIC	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XILINX_PPC440_GENERIC$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_XPEDITE1000	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_XPEDITE1000$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_XPEDITE517X	arch/powerpc/cpu/mpc86xx/Kconfig	/^config TARGET_XPEDITE517X$/;"	c	choice:mpc86xx CPU""choiceda2881060104
TARGET_XPEDITE520X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE520X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_XPEDITE537X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE537X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_XPEDITE550X	arch/powerpc/cpu/mpc85xx/Kconfig	/^config TARGET_XPEDITE550X$/;"	c	choice:mpc85xx CPU""choice54cbcbc50104
TARGET_XPRESS	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_XPRESS$/;"	c	choice:choiceab6fbbff0104
TARGET_XTFPGA	arch/xtensa/Kconfig	/^config TARGET_XTFPGA$/;"	c	choice:Xtensa architecture""choice217b16550104
TARGET_YOSEMITE	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_YOSEMITE$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_YUCCA	arch/powerpc/cpu/ppc4xx/Kconfig	/^config TARGET_YUCCA$/;"	c	choice:ppc4xx CPU""choice6f2fe32f0104
TARGET_ZC5202	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ZC5202$/;"	c	choice:choiceab6fbbff0104
TARGET_ZC5601	arch/arm/cpu/armv7/mx6/Kconfig	/^config TARGET_ZC5601$/;"	c	choice:choiceab6fbbff0104
TARGET_ZIPITZ2	arch/arm/Kconfig	/^config TARGET_ZIPITZ2$/;"	c	choice:ARM architecture""choice031ab9020104
TARGET_ZMX25	arch/arm/Kconfig	/^config TARGET_ZMX25$/;"	c	choice:ARM architecture""choice031ab9020104
TAR_ADDR	drivers/i2c/designware_i2c.h	/^#define TAR_ADDR	/;"	d
TASK_CHAINEU	drivers/dma/MCD_dmaApi.c	/^#define TASK_CHAINEU	/;"	d	file:
TASK_CHAINNOEU	drivers/dma/MCD_dmaApi.c	/^#define TASK_CHAINNOEU	/;"	d	file:
TASK_CTL_ALWAYS	include/MCD_dma.h	/^#define TASK_CTL_ALWAYS	/;"	d
TASK_CTL_ASTRT	include/MCD_dma.h	/^#define TASK_CTL_ASTRT	/;"	d
TASK_CTL_ASTSKNUM_MASK	include/MCD_dma.h	/^#define TASK_CTL_ASTSKNUM_MASK	/;"	d
TASK_CTL_EN	include/MCD_dma.h	/^#define TASK_CTL_EN	/;"	d
TASK_CTL_HIPRITSKEN	include/MCD_dma.h	/^#define TASK_CTL_HIPRITSKEN	/;"	d
TASK_CTL_HLDINITNUM	include/MCD_dma.h	/^#define TASK_CTL_HLDINITNUM	/;"	d
TASK_CTL_INIT_MASK	include/MCD_dma.h	/^#define TASK_CTL_INIT_MASK	/;"	d
TASK_CTL_VALID	include/MCD_dma.h	/^#define TASK_CTL_VALID	/;"	d
TASK_FECRX	drivers/dma/MCD_dmaApi.c	/^#define TASK_FECRX	/;"	d	file:
TASK_FECTX	drivers/dma/MCD_dmaApi.c	/^#define TASK_FECTX	/;"	d	file:
TASK_FLAGS	include/ppc_defs.h	/^#define	TASK_FLAGS	/;"	d
TASK_SINGLEEU	drivers/dma/MCD_dmaApi.c	/^#define TASK_SINGLEEU	/;"	d	file:
TASK_SINGLENOEU	drivers/dma/MCD_dmaApi.c	/^#define TASK_SINGLENOEU	/;"	d	file:
TASK_SIZE	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define TASK_SIZE /;"	d
TASK_SIZE	arch/avr32/include/asm/processor.h	/^#define TASK_SIZE	/;"	d
TASK_SIZE	arch/powerpc/include/asm/processor.h	/^#define TASK_SIZE	/;"	d
TASK_SIZE_26	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define TASK_SIZE_26	/;"	d
TASK_STRUCT_SIZE	include/ppc_defs.h	/^#define	TASK_STRUCT_SIZE	/;"	d
TASK_TABLE_SIZE	include/MCD_dma.h	/^#define TASK_TABLE_SIZE	/;"	d
TASK_UNION_SIZE	include/ppc_defs.h	/^#define	TASK_UNION_SIZE	/;"	d
TASK_UNMAPPED_BASE	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define TASK_UNMAPPED_BASE /;"	d
TASK_UNMAPPED_BASE	arch/avr32/include/asm/processor.h	/^#define TASK_UNMAPPED_BASE	/;"	d
TASK_UNMAPPED_BASE	arch/powerpc/include/asm/processor.h	/^#define TASK_UNMAPPED_BASE	/;"	d
TATOL_TIMING	drivers/block/ftide020.h	/^#define TATOL_TIMING	/;"	d
TAURUS_SPI_CS_PIN	include/configs/taurus.h	/^#define TAURUS_SPI_CS_PIN	/;"	d
TAURUS_SPI_MASK	include/configs/taurus.h	/^#define TAURUS_SPI_MASK /;"	d
TA_WAIT_BCON	drivers/usb/musb-new/musb_core.c	/^#define TA_WAIT_BCON(/;"	d	file:
TBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define TBCR /;"	d
TBCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	TBCR	/;"	d
TBIANA_ASYMMETRIC_PAUSE	drivers/qe/uec.h	/^#define TBIANA_ASYMMETRIC_PAUSE	/;"	d
TBIANA_ASYMMETRIC_PAUSE	include/fsl_dtsec.h	/^#define TBIANA_ASYMMETRIC_PAUSE /;"	d
TBIANA_ASYMMETRIC_PAUSE	include/tsec.h	/^#define TBIANA_ASYMMETRIC_PAUSE	/;"	d
TBIANA_FULL_DUPLEX	drivers/qe/uec.h	/^#define TBIANA_FULL_DUPLEX	/;"	d
TBIANA_FULL_DUPLEX	include/fsl_dtsec.h	/^#define TBIANA_FULL_DUPLEX	/;"	d
TBIANA_FULL_DUPLEX	include/tsec.h	/^#define TBIANA_FULL_DUPLEX	/;"	d
TBIANA_HALF_DUPLEX	drivers/qe/uec.h	/^#define TBIANA_HALF_DUPLEX	/;"	d
TBIANA_HALF_DUPLEX	include/fsl_dtsec.h	/^#define TBIANA_HALF_DUPLEX	/;"	d
TBIANA_HALF_DUPLEX	include/tsec.h	/^#define TBIANA_HALF_DUPLEX	/;"	d
TBIANA_SETTINGS	drivers/net/fm/eth.c	/^#define TBIANA_SETTINGS /;"	d	file:
TBIANA_SETTINGS	drivers/net/tsec.c	/^#define TBIANA_SETTINGS /;"	d	file:
TBIANA_SETTINGS	drivers/qe/uec.h	/^#define TBIANA_SETTINGS /;"	d
TBIANA_SGMII_ACK	drivers/net/fm/eth.c	/^#define TBIANA_SGMII_ACK /;"	d	file:
TBIANA_SYMMETRIC_PAUSE	drivers/qe/uec.h	/^#define TBIANA_SYMMETRIC_PAUSE	/;"	d
TBIANA_SYMMETRIC_PAUSE	include/fsl_dtsec.h	/^#define TBIANA_SYMMETRIC_PAUSE /;"	d
TBIANA_SYMMETRIC_PAUSE	include/tsec.h	/^#define TBIANA_SYMMETRIC_PAUSE	/;"	d
TBICON_CLK_SELECT	drivers/qe/uec.h	/^#define TBICON_CLK_SELECT	/;"	d
TBICON_CLK_SELECT	include/fsl_dtsec.h	/^#define TBICON_CLK_SELECT	/;"	d
TBICON_CLK_SELECT	include/tsec.h	/^#define TBICON_CLK_SELECT	/;"	d
TBICR_ANEG_ENABLE	drivers/qe/uec.h	/^#define TBICR_ANEG_ENABLE	/;"	d
TBICR_ANEG_ENABLE	include/fsl_dtsec.h	/^#define TBICR_ANEG_ENABLE	/;"	d
TBICR_ANEG_ENABLE	include/tsec.h	/^#define TBICR_ANEG_ENABLE	/;"	d
TBICR_FULL_DUPLEX	drivers/qe/uec.h	/^#define TBICR_FULL_DUPLEX	/;"	d
TBICR_FULL_DUPLEX	include/fsl_dtsec.h	/^#define TBICR_FULL_DUPLEX	/;"	d
TBICR_FULL_DUPLEX	include/tsec.h	/^#define TBICR_FULL_DUPLEX	/;"	d
TBICR_PHY_RESET	drivers/qe/uec.h	/^#define TBICR_PHY_RESET	/;"	d
TBICR_PHY_RESET	include/fsl_dtsec.h	/^#define TBICR_PHY_RESET	/;"	d
TBICR_PHY_RESET	include/tsec.h	/^#define TBICR_PHY_RESET	/;"	d
TBICR_RESTART_ANEG	drivers/qe/uec.h	/^#define TBICR_RESTART_ANEG	/;"	d
TBICR_RESTART_ANEG	include/fsl_dtsec.h	/^#define TBICR_RESTART_ANEG	/;"	d
TBICR_RESTART_ANEG	include/tsec.h	/^#define TBICR_RESTART_ANEG	/;"	d
TBICR_SETTINGS	drivers/net/fm/eth.c	/^#define TBICR_SETTINGS /;"	d	file:
TBICR_SETTINGS	drivers/qe/uec.h	/^#define TBICR_SETTINGS /;"	d
TBICR_SPEED1_SET	drivers/qe/uec.h	/^#define TBICR_SPEED1_SET	/;"	d
TBICR_SPEED1_SET	include/fsl_dtsec.h	/^#define TBICR_SPEED1_SET	/;"	d
TBICR_SPEED1_SET	include/tsec.h	/^#define TBICR_SPEED1_SET	/;"	d
TBICSR	drivers/net/rtl8169.c	/^	TBICSR = 0x64,$/;"	e	enum:RTL8169_registers	file:
TBIEn	drivers/net/ns8382x.c	/^	TBIEn = 0x01000000,$/;"	e	enum:ChipConfigBits	file:
TBILinkOK	drivers/net/rtl8169.c	/^	TBILinkOK = 0x02000000,$/;"	e	enum:RTL8169_register_content	file:
TBI_ACCEPT	drivers/net/e1000.h	/^#define TBI_ACCEPT(/;"	d
TBI_ADDR	drivers/net/tsi108_eth.c	/^#define TBI_ADDR	/;"	d	file:
TBI_ANA	include/fsl_dtsec.h	/^#define TBI_ANA	/;"	d
TBI_ANA	include/tsec.h	/^#define TBI_ANA	/;"	d
TBI_ANAR	drivers/net/rtl8169.c	/^	TBI_ANAR = 0x68,$/;"	e	enum:RTL8169_registers	file:
TBI_ANEX	include/fsl_dtsec.h	/^#define TBI_ANEX	/;"	d
TBI_ANEX	include/tsec.h	/^#define TBI_ANEX	/;"	d
TBI_ANLPBPA	include/fsl_dtsec.h	/^#define TBI_ANLPBPA	/;"	d
TBI_ANLPBPA	include/tsec.h	/^#define TBI_ANLPBPA	/;"	d
TBI_CONTROL_2	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2	/;"	d	file:
TBI_CONTROL_2_AUTO_NEGOTIATION_SENSE	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_AUTO_NEGOTIATION_SENSE	/;"	d	file:
TBI_CONTROL_2_DISABLE_RECEIVE_RUNNING_DISPARITY	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_DISABLE_RECEIVE_RUNNING_DISPARITY	/;"	d	file:
TBI_CONTROL_2_DISABLE_TRANSMIT_RUNNING_DISPARITY	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_DISABLE_TRANSMIT_RUNNING_DISPARITY	/;"	d	file:
TBI_CONTROL_2_ENABLE_COMMA_DETECT	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_ENABLE_COMMA_DETECT	/;"	d	file:
TBI_CONTROL_2_ENABLE_WRAP	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_ENABLE_WRAP	/;"	d	file:
TBI_CONTROL_2_G_MII_MODE	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_G_MII_MODE	/;"	d	file:
TBI_CONTROL_2_RECEIVE_CLOCK_SELECT	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_RECEIVE_CLOCK_SELECT	/;"	d	file:
TBI_CONTROL_2_SHORTCUT_LINK_TIMER	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_SHORTCUT_LINK_TIMER	/;"	d	file:
TBI_CONTROL_2_SOFT_RESET	drivers/net/tsi108_eth.c	/^#define TBI_CONTROL_2_SOFT_RESET	/;"	d	file:
TBI_CR	include/fsl_dtsec.h	/^#define TBI_CR	/;"	d
TBI_CR	include/tsec.h	/^#define TBI_CR	/;"	d
TBI_Enable	drivers/net/rtl8169.c	/^	TBI_Enable = 0x80,$/;"	e	enum:RTL8169_register_content	file:
TBI_LPAR	drivers/net/rtl8169.c	/^	TBI_LPAR = 0x6A,$/;"	e	enum:RTL8169_registers	file:
TBI_SR	include/fsl_dtsec.h	/^#define TBI_SR	/;"	d
TBI_SR	include/tsec.h	/^#define TBI_SR	/;"	d
TBI_TBICON	include/fsl_dtsec.h	/^#define TBI_TBICON	/;"	d
TBI_TBICON	include/tsec.h	/^#define TBI_TBICON	/;"	d
TBNCR	arch/sh/include/asm/cpu_sh7722.h	/^#define TBNCR /;"	d
TBNCR	arch/sh/include/asm/cpu_sh7780.h	/^#define	TBNCR	/;"	d
TBR	board/renesas/sh7752evb/spi-boot.c	/^#define TBR	/;"	d	file:
TBR	board/renesas/sh7753evb/spi-boot.c	/^#define TBR	/;"	d	file:
TBR	board/renesas/sh7757lcr/spi-boot.c	/^#define TBR	/;"	d	file:
TBRAR	drivers/net/sh_eth.h	/^	TBRAR,$/;"	e	enum:__anon5ef54f5a0103
TBRL	arch/powerpc/include/asm/processor.h	/^#define TBRL	/;"	d
TBRU	arch/powerpc/include/asm/processor.h	/^#define TBRU	/;"	d
TBSCR_REFA	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_REFA	/;"	d
TBSCR_REFA	include/mpc5xx.h	/^#define TBSCR_REFA	/;"	d
TBSCR_REFAE	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_REFAE	/;"	d
TBSCR_REFB	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_REFB	/;"	d
TBSCR_REFB	include/mpc5xx.h	/^#define TBSCR_REFB	/;"	d
TBSCR_REFBE	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_REFBE	/;"	d
TBSCR_TBE	arch/powerpc/include/asm/5xx_immap.h	/^#define TBSCR_TBE	/;"	d
TBSCR_TBE	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_TBE	/;"	d
TBSCR_TBF	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_TBF	/;"	d
TBSCR_TBF	include/mpc5xx.h	/^#define TBSCR_TBF	/;"	d
TBSCR_TBIRQ0	include/mpc8xx.h	/^#define TBSCR_TBIRQ0	/;"	d
TBSCR_TBIRQ1	include/mpc8xx.h	/^#define TBSCR_TBIRQ1	/;"	d
TBSCR_TBIRQ2	include/mpc8xx.h	/^#define TBSCR_TBIRQ2	/;"	d
TBSCR_TBIRQ3	include/mpc8xx.h	/^#define TBSCR_TBIRQ3	/;"	d
TBSCR_TBIRQ4	include/mpc8xx.h	/^#define TBSCR_TBIRQ4	/;"	d
TBSCR_TBIRQ5	include/mpc8xx.h	/^#define TBSCR_TBIRQ5	/;"	d
TBSCR_TBIRQ6	include/mpc8xx.h	/^#define TBSCR_TBIRQ6	/;"	d
TBSCR_TBIRQ7	include/mpc8xx.h	/^#define TBSCR_TBIRQ7	/;"	d
TBSCR_TBIRQ_MASK	arch/powerpc/include/asm/8xx_immap.h	/^#define TBSCR_TBIRQ_MASK	/;"	d
TBUF	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TBUF /;"	d
TBUFCNT	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define TBUFCNT /;"	d
TBUFCTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TBUFCTL /;"	d
TBUFEN	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define TBUFEN /;"	d
TBUFOVF	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define TBUFOVF /;"	d
TBUFPWR	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define TBUFPWR /;"	d
TBUFSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TBUFSTAT /;"	d
TBWL	arch/powerpc/include/asm/processor.h	/^#define TBWL	/;"	d
TBWU	arch/powerpc/include/asm/processor.h	/^#define TBWU	/;"	d
TCA642X_CMD_DEVICE	include/tca642x.h	/^	TCA642X_CMD_DEVICE,$/;"	e	enum:__anona8959c5a0103
TCA642X_CMD_INFO	include/tca642x.h	/^	TCA642X_CMD_INFO,$/;"	e	enum:__anona8959c5a0103
TCA642X_CMD_INPUT	include/tca642x.h	/^	TCA642X_CMD_INPUT,$/;"	e	enum:__anona8959c5a0103
TCA642X_CMD_INVERT	include/tca642x.h	/^	TCA642X_CMD_INVERT,$/;"	e	enum:__anona8959c5a0103
TCA642X_CMD_OUTPUT	include/tca642x.h	/^	TCA642X_CMD_OUTPUT,$/;"	e	enum:__anona8959c5a0103
TCA642X_DIR_IN	include/tca642x.h	/^#define TCA642X_DIR_IN	/;"	d
TCA642X_DIR_OUT	include/tca642x.h	/^#define TCA642X_DIR_OUT	/;"	d
TCA642X_OUT_HIGH	include/tca642x.h	/^#define TCA642X_OUT_HIGH	/;"	d
TCA642X_OUT_LOW	include/tca642x.h	/^#define TCA642X_OUT_LOW	/;"	d
TCA642X_POL_INVERT	include/tca642x.h	/^#define TCA642X_POL_INVERT	/;"	d
TCA642X_POL_NORMAL	include/tca642x.h	/^#define TCA642X_POL_NORMAL	/;"	d
TCD0	arch/sh/include/asm/cpu_sh7722.h	/^#define TCD0 /;"	d
TCD1	arch/sh/include/asm/cpu_sh7722.h	/^#define TCD1 /;"	d
TCD2	arch/sh/include/asm/cpu_sh7722.h	/^#define TCD2 /;"	d
TCD3	arch/sh/include/asm/cpu_sh7722.h	/^#define TCD3 /;"	d
TCFG_EMUFREE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCFG_EMUFREE	/;"	d
TCFG_IDLEMOD_SHIFT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCFG_IDLEMOD_SHIFT	/;"	d
TCFG_RESET	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCFG_RESET	/;"	d
TCF_1588_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_1588_FUNC	/;"	d
TCF_CAN_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_CAN_FUNC	/;"	d
TCF_DEV_0	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_0	/;"	d
TCF_DEV_10	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_10	/;"	d
TCF_DEV_12	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_12	/;"	d
TCF_DEV_2	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_2	/;"	d
TCF_DEV_4	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_4	/;"	d
TCF_DEV_6	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_6	/;"	d
TCF_DEV_8	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DEV_8	/;"	d
TCF_DMA1_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DMA1_FUNC	/;"	d
TCF_DMA2_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_DMA2_FUNC	/;"	d
TCF_GBE_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_GBE_FUNC	/;"	d
TCF_GPIO_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_GPIO_FUNC	/;"	d
TCF_I2C_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_I2C_FUNC	/;"	d
TCF_PCIE_PORT_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_PCIE_PORT_DEV	/;"	d
TCF_PCIE_PORT_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_PCIE_PORT_FUNC	/;"	d
TCF_PKT_HUB_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_PKT_HUB_FUNC	/;"	d
TCF_SATA_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_SATA_FUNC	/;"	d
TCF_SDIO0_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_SDIO0_FUNC	/;"	d
TCF_SDIO1_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_SDIO1_FUNC	/;"	d
TCF_SPI_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_SPI_FUNC	/;"	d
TCF_UART0_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_UART0_FUNC	/;"	d
TCF_UART1_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_UART1_FUNC	/;"	d
TCF_UART2_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_UART2_FUNC	/;"	d
TCF_UART3_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_UART3_FUNC	/;"	d
TCF_USB1_EHCI_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB1_EHCI_FUNC	/;"	d
TCF_USB1_OHCI0_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB1_OHCI0_FUNC	/;"	d
TCF_USB1_OHCI1_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB1_OHCI1_FUNC	/;"	d
TCF_USB1_OHCI2_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB1_OHCI2_FUNC	/;"	d
TCF_USB2_EHCI_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB2_EHCI_FUNC	/;"	d
TCF_USB2_OHCI0_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB2_OHCI0_FUNC	/;"	d
TCF_USB2_OHCI1_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB2_OHCI1_FUNC	/;"	d
TCF_USB2_OHCI2_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB2_OHCI2_FUNC	/;"	d
TCF_USB_DEVICE_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TCF_USB_DEVICE_FUNC	/;"	d
TCK	board/esd/common/xilinx_jtag/ports.h	/^#define TCK /;"	d
TCK	include/lattice.h	/^#define TCK	/;"	d
TCKON_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TCKON_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TCLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define TCLK	/;"	d
TCLK1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TCLK1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TCLK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TCLK1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TCLK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TCLK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TCLK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C0_SCL_MARK, SCIF0_RXD_C_MARK, PWM5_MARK, TCLK1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
TCLK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TCLK1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TCLK1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK,$/;"	e	enum:__anona307879b0103	file:
TCLK1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	TCLK1_MARK, VI1_DATA1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TCLK2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TCLK2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TCLK2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TCLK2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TCLK2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,$/;"	e	enum:__anona3077f190103	file:
TCLK2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK,$/;"	e	enum:__anona307879b0103	file:
TCLK2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	TCLK2_MARK, VI1_DATA3_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TCLK3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK,$/;"	e	enum:__anona307879b0103	file:
TCLK_3_DELAY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define TCLK_3_DELAY /;"	d
TCLR_AR	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_AR	/;"	d
TCLR_AR	arch/arm/include/asm/arch-omap3/cpu.h	/^#define TCLR_AR	/;"	d
TCLR_AR	arch/arm/include/asm/arch-omap4/cpu.h	/^#define TCLR_AR	/;"	d
TCLR_AR	arch/arm/include/asm/arch-omap4/omap.h	/^#define TCLR_AR	/;"	d
TCLR_AR	arch/arm/include/asm/arch-omap5/cpu.h	/^#define TCLR_AR	/;"	d
TCLR_AR	arch/arm/include/asm/arch-omap5/omap.h	/^#define TCLR_AR	/;"	d
TCLR_AUTO_RELOAD	drivers/timer/omap-timer.c	/^#define TCLR_AUTO_RELOAD	/;"	d	file:
TCLR_CAPTMODE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_CAPTMODE	/;"	d
TCLR_CE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_CE	/;"	d
TCLR_GPOCFG	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_GPOCFG	/;"	d
TCLR_PRE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_PRE	/;"	d
TCLR_PRE	arch/arm/include/asm/arch-omap3/cpu.h	/^#define TCLR_PRE	/;"	d
TCLR_PRE	arch/arm/include/asm/arch-omap4/cpu.h	/^#define TCLR_PRE	/;"	d
TCLR_PRE	arch/arm/include/asm/arch-omap4/omap.h	/^#define TCLR_PRE	/;"	d
TCLR_PRE	arch/arm/include/asm/arch-omap5/cpu.h	/^#define TCLR_PRE	/;"	d
TCLR_PRE	arch/arm/include/asm/arch-omap5/omap.h	/^#define TCLR_PRE	/;"	d
TCLR_PRE_DISABLE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_PRE_DISABLE	/;"	d
TCLR_PRE_EN	drivers/timer/omap-timer.c	/^#define TCLR_PRE_EN	/;"	d	file:
TCLR_PT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_PT	/;"	d
TCLR_PTV_SHIFT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_PTV_SHIFT	/;"	d
TCLR_PTV_SHIFT	drivers/timer/omap-timer.c	/^#define TCLR_PTV_SHIFT	/;"	d	file:
TCLR_SCPWM	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_SCPWM	/;"	d
TCLR_ST	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_ST	/;"	d
TCLR_ST	arch/arm/include/asm/arch-omap3/cpu.h	/^#define TCLR_ST	/;"	d
TCLR_ST	arch/arm/include/asm/arch-omap4/cpu.h	/^#define TCLR_ST	/;"	d
TCLR_ST	arch/arm/include/asm/arch-omap4/omap.h	/^#define TCLR_ST	/;"	d
TCLR_ST	arch/arm/include/asm/arch-omap5/cpu.h	/^#define TCLR_ST	/;"	d
TCLR_ST	arch/arm/include/asm/arch-omap5/omap.h	/^#define TCLR_ST	/;"	d
TCLR_START	drivers/timer/omap-timer.c	/^#define TCLR_START	/;"	d	file:
TCLR_TCM	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_TCM	/;"	d
TCLR_TRG_SHIFT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TCLR_TRG_SHIFT	/;"	d
TCMP1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCMP1 /;"	d
TCMP2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCMP2 /;"	d
TCN1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCN1 /;"	d
TCN2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCN2 /;"	d
TCNTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TCNTL /;"	d
TCO1_CNT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define TCO1_CNT	/;"	d
TCO1_CNT	arch/x86/include/asm/arch-broadwell/pm.h	/^#define TCO1_CNT	/;"	d
TCO1_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define TCO1_STS	/;"	d
TCO1_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define TCO1_STS	/;"	d
TCO2_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define TCO2_STS	/;"	d
TCO2_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define TCO2_STS	/;"	d
TCO2_STS_SECOND_TO	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  TCO2_STS_SECOND_TO	/;"	d
TCOCNTCTRL	arch/x86/cpu/quark/smc.h	/^#define TCOCNTCTRL	/;"	d
TCODRAMBUFODTCH0	arch/x86/cpu/quark/smc.h	/^#define TCODRAMBUFODTCH0	/;"	d
TCON0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define TCON0_BASE_ADDR	/;"	d
TCON4_AUTO_RELOAD	arch/arm/mach-exynos/include/mach/pwm.h	/^#define TCON4_AUTO_RELOAD	/;"	d
TCON4_AUTO_RELOAD	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define TCON4_AUTO_RELOAD	/;"	d
TCON_AUTO_RELOAD	arch/arm/mach-exynos/include/mach/pwm.h	/^#define TCON_AUTO_RELOAD(/;"	d
TCON_AUTO_RELOAD	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define TCON_AUTO_RELOAD(/;"	d
TCON_INVERTER	arch/arm/mach-exynos/include/mach/pwm.h	/^#define TCON_INVERTER(/;"	d
TCON_INVERTER	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define TCON_INVERTER(/;"	d
TCON_OFFSET	arch/arm/mach-exynos/include/mach/pwm.h	/^#define TCON_OFFSET(/;"	d
TCON_OFFSET	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define TCON_OFFSET(/;"	d
TCON_START	arch/arm/mach-exynos/include/mach/pwm.h	/^#define TCON_START(/;"	d
TCON_START	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define TCON_START(/;"	d
TCON_UPDATE	arch/arm/mach-exynos/include/mach/pwm.h	/^#define TCON_UPDATE(/;"	d
TCON_UPDATE	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define TCON_UPDATE(/;"	d
TCOSCI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   TCOSCI_EN	/;"	d
TCOSCI_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   TCOSCI_EN	/;"	d
TCOSCI_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   TCOSCI_STS	/;"	d
TCOSCI_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   TCOSCI_STS	/;"	d
TCOUNT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TCOUNT /;"	d
TCOVREFCH0	arch/x86/cpu/quark/smc.h	/^#define TCOVREFCH0	/;"	d
TCO_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  TCO_EN	/;"	d
TCO_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   TCO_EN	/;"	d
TCO_TMR_HLT	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  TCO_TMR_HLT	/;"	d
TCO_TMR_HLT	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  TCO_TMR_HLT	/;"	d
TCPF	drivers/usb/eth/r8152.h	/^#define TCPF	/;"	d
TCPHO_MAX	drivers/usb/eth/r8152.h	/^#define TCPHO_MAX	/;"	d
TCPHO_SHIFT	drivers/usb/eth/r8152.h	/^#define TCPHO_SHIFT	/;"	d
TCP_CS	drivers/usb/eth/r8152.h	/^#define TCP_CS	/;"	d
TCP_V4_FLOW	include/linux/ethtool.h	/^#define	TCP_V4_FLOW	/;"	d
TCP_V6_FLOW	include/linux/ethtool.h	/^#define	TCP_V6_FLOW	/;"	d
TCR	arch/powerpc/include/asm/processor.h	/^#define TCR	/;"	d
TCR0_AUTO_FIFO	drivers/usb/eth/r8152.h	/^#define TCR0_AUTO_FIFO	/;"	d
TCR0_TX_EMPTY	drivers/usb/eth/r8152.h	/^#define TCR0_TX_EMPTY	/;"	d
TCR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCR1 /;"	d
TCR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCR2 /;"	d
TCRB_0	arch/sh/include/asm/cpu_sh7722.h	/^#define TCRB_0 /;"	d
TCRB_1	arch/sh/include/asm/cpu_sh7722.h	/^#define TCRB_1 /;"	d
TCRB_2	arch/sh/include/asm/cpu_sh7722.h	/^#define TCRB_2 /;"	d
TCRB_3	arch/sh/include/asm/cpu_sh7722.h	/^#define TCRB_3 /;"	d
TCR_0	arch/sh/include/asm/cpu_sh7722.h	/^#define TCR_0 /;"	d
TCR_1	arch/sh/include/asm/cpu_sh7722.h	/^#define TCR_1 /;"	d
TCR_2	arch/sh/include/asm/cpu_sh7722.h	/^#define TCR_2 /;"	d
TCR_3	arch/sh/include/asm/cpu_sh7722.h	/^#define TCR_3 /;"	d
TCR_4	arch/sh/include/asm/cpu_sh7722.h	/^#define TCR_4 /;"	d
TCR_5	arch/sh/include/asm/cpu_sh7722.h	/^#define TCR_5 /;"	d
TCR_ARE	arch/powerpc/include/asm/processor.h	/^#define   TCR_ARE	/;"	d
TCR_CLEAR	drivers/net/smc91111.h	/^#define	TCR_CLEAR	/;"	d
TCR_CRC_DIS1	drivers/net/dm9000x.h	/^#define TCR_CRC_DIS1	/;"	d
TCR_CRC_DIS2	drivers/net/dm9000x.h	/^#define TCR_CRC_DIS2	/;"	d
TCR_DEFAULT	drivers/net/smc91111.h	/^#define	TCR_DEFAULT	/;"	d
TCR_EL1_RSVD	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_EL1_RSVD	/;"	d
TCR_EL2_RSVD	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_EL2_RSVD	/;"	d
TCR_EL3_RSVD	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_EL3_RSVD	/;"	d
TCR_ENABLE	drivers/net/smc91111.h	/^#define TCR_ENABLE	/;"	d
TCR_EPD1_DISABLE	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_EPD1_DISABLE	/;"	d
TCR_EPH_LOOP	drivers/net/smc91111.h	/^#define	TCR_EPH_LOOP	/;"	d
TCR_EXCECM	drivers/net/dm9000x.h	/^#define TCR_EXCECM	/;"	d
TCR_FDUPLX	drivers/net/smc91111.h	/^#define TCR_FDUPLX	/;"	d
TCR_FIE	arch/powerpc/include/asm/processor.h	/^#define   TCR_FIE	/;"	d
TCR_FORCOL	drivers/net/smc91111.h	/^#define TCR_FORCOL	/;"	d
TCR_FP	arch/powerpc/include/asm/processor.h	/^#define   TCR_FP(/;"	d
TCR_IRGN_MASK	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_IRGN_MASK	/;"	d
TCR_IRGN_NC	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_IRGN_NC	/;"	d
TCR_IRGN_WBNWA	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_IRGN_WBNWA	/;"	d
TCR_IRGN_WBWA	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_IRGN_WBWA	/;"	d
TCR_IRGN_WT	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_IRGN_WT	/;"	d
TCR_LOOP	drivers/net/smc91111.h	/^#define TCR_LOOP	/;"	d
TCR_MON_CSN	drivers/net/smc91111.h	/^#define TCR_MON_CSN	/;"	d
TCR_NOCRC	drivers/net/smc91111.h	/^#define TCR_NOCRC	/;"	d
TCR_ORGN_MASK	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_ORGN_MASK	/;"	d
TCR_ORGN_NC	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_ORGN_NC	/;"	d
TCR_ORGN_WBNWA	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_ORGN_WBNWA	/;"	d
TCR_ORGN_WBWA	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_ORGN_WBWA	/;"	d
TCR_ORGN_WT	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_ORGN_WT	/;"	d
TCR_PAD_DIS1	drivers/net/dm9000x.h	/^#define TCR_PAD_DIS1	/;"	d
TCR_PAD_DIS2	drivers/net/dm9000x.h	/^#define TCR_PAD_DIS2	/;"	d
TCR_PAD_EN	drivers/net/smc91111.h	/^#define TCR_PAD_EN	/;"	d
TCR_PIE	arch/powerpc/include/asm/processor.h	/^#define   TCR_PIE	/;"	d
TCR_REG	drivers/net/smc91111.h	/^#define	TCR_REG	/;"	d
TCR_SHARED_INNER	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_SHARED_INNER	/;"	d
TCR_SHARED_NON	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_SHARED_NON	/;"	d
TCR_SHARED_OUTER	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_SHARED_OUTER	/;"	d
TCR_STP_SQET	drivers/net/smc91111.h	/^#define TCR_STP_SQET	/;"	d
TCR_SWFDUP	drivers/net/smc91111.h	/^#define	TCR_SWFDUP	/;"	d
TCR_T0SZ	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_T0SZ(/;"	d
TCR_TG0_16K	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_TG0_16K	/;"	d
TCR_TG0_4K	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_TG0_4K	/;"	d
TCR_TG0_64K	arch/arm/include/asm/armv8/mmu.h	/^#define TCR_TG0_64K	/;"	d
TCR_TJDIS	drivers/net/dm9000x.h	/^#define TCR_TJDIS	/;"	d
TCR_TPSC	arch/sh/lib/time.c	/^#define TCR_TPSC /;"	d	file:
TCR_TXREQ	drivers/net/dm9000x.h	/^#define TCR_TXREQ	/;"	d
TCR_WIE	arch/powerpc/include/asm/processor.h	/^#define   TCR_WIE	/;"	d
TCR_WP	arch/powerpc/include/asm/processor.h	/^#define   TCR_WP(/;"	d
TCR_WP	arch/powerpc/include/asm/processor.h	/^#define  TCR_WP(/;"	d
TCR_WRC	arch/powerpc/include/asm/processor.h	/^#define   TCR_WRC(/;"	d
TCSR	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TCSR	/;"	d
TCT0	arch/sh/include/asm/cpu_sh7722.h	/^#define TCT0 /;"	d
TCT1	arch/sh/include/asm/cpu_sh7722.h	/^#define TCT1 /;"	d
TCT2	arch/sh/include/asm/cpu_sh7722.h	/^#define TCT2 /;"	d
TCT3	arch/sh/include/asm/cpu_sh7722.h	/^#define TCT3 /;"	d
TCTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define TCTL	/;"	d
TCTL1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL1 /;"	d
TCTL2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL2 /;"	d
TCTL_CAP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_CAP /;"	d
TCTL_CAP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_CAP	/;"	d
TCTL_CLKSOURCE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_CLKSOURCE /;"	d
TCTL_CLKSOURCE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_CLKSOURCE	/;"	d
TCTL_FRR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_FRR /;"	d
TCTL_FRR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_FRR	/;"	d
TCTL_IRQEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_IRQEN /;"	d
TCTL_IRQEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_IRQEN	/;"	d
TCTL_OM	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_OM /;"	d
TCTL_OM	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_OM	/;"	d
TCTL_SWR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_SWR /;"	d
TCTL_SWR	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_SWR	/;"	d
TCTL_TEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TCTL_TEN /;"	d
TCTL_TEN	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TCTL_TEN	/;"	d
TCTRL_DELAY_TIME_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TCTRL_DELAY_TIME_SHIFT	/;"	d
TCTRL_GTS	include/fsl_dtsec.h	/^#define TCTRL_GTS	/;"	d
TCTRL_INIT	drivers/net/fm/dtsec.c	/^#define TCTRL_INIT	/;"	d	file:
TCTRL_RFC_PAUSE	include/fsl_dtsec.h	/^#define TCTRL_RFC_PAUSE	/;"	d
TCTRL_THDF	include/fsl_dtsec.h	/^#define TCTRL_THDF	/;"	d
TCTRL_TTSE	include/fsl_dtsec.h	/^#define TCTRL_TTSE	/;"	d
TCYC_TDVS	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                 TCYC_TDVS /;"	d
TC_FCS	drivers/net/xilinx_ll_temac.h	/^#define TC_FCS	/;"	d
TC_HD	drivers/net/xilinx_ll_temac.h	/^#define TC_HD	/;"	d
TC_IFG	drivers/net/xilinx_ll_temac.h	/^#define TC_IFG	/;"	d
TC_JUM	drivers/net/xilinx_ll_temac.h	/^#define TC_JUM	/;"	d
TC_MASK	arch/arm/include/asm/omap_mmc.h	/^#define TC_MASK	/;"	d
TC_RST	drivers/net/xilinx_ll_temac.h	/^#define TC_RST	/;"	d
TC_TX	drivers/net/xilinx_ll_temac.h	/^#define TC_TX	/;"	d
TC_VLAN	drivers/net/xilinx_ll_temac.h	/^#define TC_VLAN	/;"	d
TD	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                        TD /;"	d
TDBR_CORE	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define	TDBR_CORE	/;"	d
TDBR_DMA	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define TDBR_DMA	/;"	d
TDES0_ERR_MASK	drivers/net/uli526x.c	/^#define TDES0_ERR_MASK	/;"	d	file:
TDF1ST	drivers/net/sh_eth.h	/^#define TDF1ST	/;"	d
TDFAR	drivers/net/sh_eth.h	/^	TDFAR,$/;"	e	enum:__anon5ef54f5a0103
TDFEND	drivers/net/sh_eth.h	/^#define TDFEND	/;"	d
TDFFR	drivers/net/sh_eth.h	/^	TDFFR,$/;"	e	enum:__anon5ef54f5a0103
TDFXR	drivers/net/sh_eth.h	/^	TDFXR,$/;"	e	enum:__anon5ef54f5a0103
TDI	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define TDI	/;"	d
TDI	board/esd/common/xilinx_jtag/ports.h	/^#define TDI /;"	d
TDI	include/lattice.h	/^#define TDI	/;"	d
TDI_DATA	include/lattice.h	/^#define TDI_DATA	/;"	d
TDI_TDO_MAX_PAYLOAD	arch/arm/mach-socfpga/scan_manager.c	/^#define TDI_TDO_MAX_PAYLOAD	/;"	d	file:
TDLAR	drivers/net/sh_eth.h	/^	TDLAR,$/;"	e	enum:__anon5ef54f5a0103
TDMA_CMD_PACKET	include/tsi148.h	/^typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;$/;"	t	typeref:struct:_TDMA_CMD_PACKET
TDMA_CMD_PACKET	include/universe.h	/^typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;$/;"	t	typeref:struct:_TDMA_CMD_PACKET
TDO	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define TDO	/;"	d
TDO	include/lattice.h	/^#define TDO	/;"	d
TDOWN_TIMEOUT_COUNT	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define TDOWN_TIMEOUT_COUNT /;"	d
TDO_DATA	include/lattice.h	/^#define TDO_DATA	/;"	d
TDQSCKMAX_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TDQSCKMAX_MASK	/;"	d
TDQSCKMAX_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TDQSCKMAX_SHIFT	/;"	d
TDQSCK_MASK	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TDQSCK_MASK	/;"	d
TDQSCK_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TDQSCK_SHIFT	/;"	d
TDR	include/lattice.h	/^#define TDR	/;"	d
TDRAM_CLK_DIS_TIME_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TDRAM_CLK_DIS_TIME_SHIFT	/;"	d
TDRAM_CLK_EN_TIME_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TDRAM_CLK_EN_TIME_SHIFT	/;"	d
TDTend	include/MCD_dma.h	/^	u32 TDTend;		\/* task descriptor table end *\/$/;"	m	struct:__anon0c34f9b30108	typeref:typename:u32
TDTstart	include/MCD_dma.h	/^	u32 TDTstart;		\/* task descriptor table start *\/$/;"	m	struct:__anon0c34f9b30108	typeref:typename:u32
TDVS	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                      TDVS /;"	d
TD_ALIGNMENT	drivers/usb/host/ohci.h	/^#define TD_ALIGNMENT /;"	d
TD_BUFFEROVERRUN	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_BUFFEROVERRUN	/;"	d
TD_BUFFEROVERRUN	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_BUFFEROVERRUN /;"	d
TD_BUFFEROVERRUN	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_BUFFEROVERRUN /;"	d
TD_BUFFEROVERRUN	drivers/usb/host/isp116x.h	/^#define TD_BUFFEROVERRUN /;"	d
TD_BUFFEROVERRUN	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_BUFFEROVERRUN	/;"	d
TD_BUFFEROVERRUN	drivers/usb/host/ohci.h	/^#define TD_BUFFEROVERRUN /;"	d
TD_BUFFERUNDERRUN	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_BUFFERUNDERRUN	/;"	d
TD_BUFFERUNDERRUN	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_BUFFERUNDERRUN /;"	d
TD_BUFFERUNDERRUN	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_BUFFERUNDERRUN /;"	d
TD_BUFFERUNDERRUN	drivers/usb/host/isp116x.h	/^#define TD_BUFFERUNDERRUN /;"	d
TD_BUFFERUNDERRUN	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_BUFFERUNDERRUN	/;"	d
TD_BUFFERUNDERRUN	drivers/usb/host/ohci.h	/^#define TD_BUFFERUNDERRUN /;"	d
TD_CC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC	/;"	d
TD_CC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC	/;"	d
TD_CC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC	/;"	d
TD_CC	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC	/;"	d
TD_CC	drivers/usb/host/ohci.h	/^#define TD_CC	/;"	d
TD_CC_BITSTUFFING	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_BITSTUFFING	/;"	d
TD_CC_BITSTUFFING	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_BITSTUFFING /;"	d
TD_CC_BITSTUFFING	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_BITSTUFFING /;"	d
TD_CC_BITSTUFFING	drivers/usb/host/isp116x.h	/^#define TD_CC_BITSTUFFING /;"	d
TD_CC_BITSTUFFING	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_BITSTUFFING	/;"	d
TD_CC_BITSTUFFING	drivers/usb/host/ohci.h	/^#define TD_CC_BITSTUFFING /;"	d
TD_CC_CRC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_CRC	/;"	d
TD_CC_CRC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_CRC	/;"	d
TD_CC_CRC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_CRC	/;"	d
TD_CC_CRC	drivers/usb/host/isp116x.h	/^#define TD_CC_CRC /;"	d
TD_CC_CRC	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_CRC	/;"	d
TD_CC_CRC	drivers/usb/host/ohci.h	/^#define TD_CC_CRC	/;"	d
TD_CC_DATATOGGLEM	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_DATATOGGLEM	/;"	d
TD_CC_DATATOGGLEM	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_DATATOGGLEM /;"	d
TD_CC_DATATOGGLEM	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_DATATOGGLEM /;"	d
TD_CC_DATATOGGLEM	drivers/usb/host/isp116x.h	/^#define TD_CC_DATATOGGLEM /;"	d
TD_CC_DATATOGGLEM	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_DATATOGGLEM	/;"	d
TD_CC_DATATOGGLEM	drivers/usb/host/ohci.h	/^#define TD_CC_DATATOGGLEM /;"	d
TD_CC_GET	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_GET(/;"	d
TD_CC_GET	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_GET(/;"	d
TD_CC_GET	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_GET(/;"	d
TD_CC_GET	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_GET(/;"	d
TD_CC_GET	drivers/usb/host/ohci.h	/^#define TD_CC_GET(/;"	d
TD_CC_NOERROR	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_NOERROR	/;"	d
TD_CC_NOERROR	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_NOERROR	/;"	d
TD_CC_NOERROR	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_NOERROR	/;"	d
TD_CC_NOERROR	drivers/usb/host/isp116x.h	/^#define TD_CC_NOERROR /;"	d
TD_CC_NOERROR	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_NOERROR	/;"	d
TD_CC_NOERROR	drivers/usb/host/ohci.h	/^#define TD_CC_NOERROR	/;"	d
TD_CC_SET	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_SET(/;"	d
TD_CC_SET	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_SET(/;"	d
TD_CC_SET	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_SET(/;"	d
TD_CC_SET	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_SET(/;"	d
TD_CC_SET	drivers/usb/host/ohci.h	/^#define TD_CC_SET(/;"	d
TD_CC_STALL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_CC_STALL	/;"	d
TD_CC_STALL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_CC_STALL	/;"	d
TD_CC_STALL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_CC_STALL	/;"	d
TD_CC_STALL	drivers/usb/host/isp116x.h	/^#define TD_CC_STALL /;"	d
TD_CC_STALL	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_CC_STALL	/;"	d
TD_CC_STALL	drivers/usb/host/ohci.h	/^#define TD_CC_STALL	/;"	d
TD_CTRL_ACTIVE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_ACTIVE /;"	d
TD_CTRL_ACTIVE	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_ACTIVE /;"	d
TD_CTRL_ACTLEN_MASK	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_ACTLEN_MASK /;"	d
TD_CTRL_ACTLEN_MASK	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_ACTLEN_MASK /;"	d
TD_CTRL_ANY_ERROR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_ANY_ERROR	/;"	d
TD_CTRL_ANY_ERROR	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_ANY_ERROR	/;"	d
TD_CTRL_BABBLE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_BABBLE /;"	d
TD_CTRL_BABBLE	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_BABBLE /;"	d
TD_CTRL_BITSTUFF	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_BITSTUFF /;"	d
TD_CTRL_BITSTUFF	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_BITSTUFF /;"	d
TD_CTRL_CRCTIMEO	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_CRCTIMEO /;"	d
TD_CTRL_CRCTIMEO	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_CRCTIMEO /;"	d
TD_CTRL_C_ERR_MASK	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_C_ERR_MASK /;"	d
TD_CTRL_C_ERR_MASK	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_C_ERR_MASK /;"	d
TD_CTRL_DBUFERR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_DBUFERR /;"	d
TD_CTRL_DBUFERR	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_DBUFERR /;"	d
TD_CTRL_IOC	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_IOC /;"	d
TD_CTRL_IOC	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_IOC /;"	d
TD_CTRL_IOS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_IOS /;"	d
TD_CTRL_IOS	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_IOS /;"	d
TD_CTRL_LS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_LS /;"	d
TD_CTRL_LS	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_LS /;"	d
TD_CTRL_NAK	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_NAK /;"	d
TD_CTRL_NAK	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_NAK /;"	d
TD_CTRL_SPD	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_SPD /;"	d
TD_CTRL_SPD	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_SPD /;"	d
TD_CTRL_STALLED	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_CTRL_STALLED /;"	d
TD_CTRL_STALLED	board/mpl/common/usb_uhci.h	/^#define TD_CTRL_STALLED /;"	d
TD_DATAOVERRUN	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DATAOVERRUN	/;"	d
TD_DATAOVERRUN	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DATAOVERRUN	/;"	d
TD_DATAOVERRUN	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DATAOVERRUN	/;"	d
TD_DATAOVERRUN	drivers/usb/host/isp116x.h	/^#define TD_DATAOVERRUN /;"	d
TD_DATAOVERRUN	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DATAOVERRUN	/;"	d
TD_DATAOVERRUN	drivers/usb/host/ohci.h	/^#define TD_DATAOVERRUN	/;"	d
TD_DATAUNDERRUN	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DATAUNDERRUN	/;"	d
TD_DATAUNDERRUN	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DATAUNDERRUN	/;"	d
TD_DATAUNDERRUN	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DATAUNDERRUN	/;"	d
TD_DATAUNDERRUN	drivers/usb/host/isp116x.h	/^#define TD_DATAUNDERRUN /;"	d
TD_DATAUNDERRUN	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DATAUNDERRUN	/;"	d
TD_DATAUNDERRUN	drivers/usb/host/ohci.h	/^#define TD_DATAUNDERRUN	/;"	d
TD_DEL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DEL	/;"	d
TD_DEL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DEL	/;"	d
TD_DEL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DEL	/;"	d
TD_DEL	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DEL	/;"	d
TD_DEL	drivers/usb/host/ohci.h	/^#define TD_DEL	/;"	d
TD_DEVNOTRESP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DEVNOTRESP	/;"	d
TD_DEVNOTRESP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DEVNOTRESP	/;"	d
TD_DEVNOTRESP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DEVNOTRESP	/;"	d
TD_DEVNOTRESP	drivers/usb/host/isp116x.h	/^#define TD_DEVNOTRESP /;"	d
TD_DEVNOTRESP	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DEVNOTRESP	/;"	d
TD_DEVNOTRESP	drivers/usb/host/ohci.h	/^#define TD_DEVNOTRESP	/;"	d
TD_DI	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DI	/;"	d
TD_DI	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DI	/;"	d
TD_DI	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DI	/;"	d
TD_DI	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DI	/;"	d
TD_DI	drivers/usb/host/ohci.h	/^#define TD_DI	/;"	d
TD_DI_SET	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DI_SET(/;"	d
TD_DI_SET	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DI_SET(/;"	d
TD_DI_SET	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DI_SET(/;"	d
TD_DI_SET	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DI_SET(/;"	d
TD_DI_SET	drivers/usb/host/ohci.h	/^#define TD_DI_SET(/;"	d
TD_DP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DP	/;"	d
TD_DP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DP	/;"	d
TD_DP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DP	/;"	d
TD_DP	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DP	/;"	d
TD_DP	drivers/usb/host/ohci.h	/^#define TD_DP	/;"	d
TD_DP_IN	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DP_IN	/;"	d
TD_DP_IN	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DP_IN /;"	d
TD_DP_IN	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DP_IN /;"	d
TD_DP_IN	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DP_IN	/;"	d
TD_DP_IN	drivers/usb/host/ohci.h	/^#define TD_DP_IN /;"	d
TD_DP_OUT	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DP_OUT	/;"	d
TD_DP_OUT	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DP_OUT /;"	d
TD_DP_OUT	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DP_OUT /;"	d
TD_DP_OUT	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DP_OUT	/;"	d
TD_DP_OUT	drivers/usb/host/ohci.h	/^#define TD_DP_OUT /;"	d
TD_DP_SETUP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_DP_SETUP	/;"	d
TD_DP_SETUP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_DP_SETUP /;"	d
TD_DP_SETUP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_DP_SETUP /;"	d
TD_DP_SETUP	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_DP_SETUP	/;"	d
TD_DP_SETUP	drivers/usb/host/ohci.h	/^#define TD_DP_SETUP /;"	d
TD_EC	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_EC	/;"	d
TD_EC	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_EC	/;"	d
TD_EC	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_EC	/;"	d
TD_EC	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_EC	/;"	d
TD_EC	drivers/usb/host/ohci.h	/^#define TD_EC	/;"	d
TD_ES	drivers/net/dc2114x.c	/^#define TD_ES	/;"	d	file:
TD_FS	drivers/net/dc2114x.c	/^#define TD_FS	/;"	d	file:
TD_ISO	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_ISO	/;"	d
TD_ISO	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_ISO	/;"	d
TD_ISO	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_ISO	/;"	d
TD_ISO	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_ISO	/;"	d
TD_ISO	drivers/usb/host/ohci.h	/^#define TD_ISO	/;"	d
TD_LS	drivers/net/dc2114x.c	/^#define TD_LS	/;"	d	file:
TD_NOTACCESSED	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_NOTACCESSED	/;"	d
TD_NOTACCESSED	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_NOTACCESSED	/;"	d
TD_NOTACCESSED	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_NOTACCESSED	/;"	d
TD_NOTACCESSED	drivers/usb/host/isp116x.h	/^#define TD_NOTACCESSED /;"	d
TD_NOTACCESSED	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_NOTACCESSED	/;"	d
TD_NOTACCESSED	drivers/usb/host/ohci.h	/^#define TD_NOTACCESSED	/;"	d
TD_PIDCHECKFAIL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_PIDCHECKFAIL	/;"	d
TD_PIDCHECKFAIL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_PIDCHECKFAIL	/;"	d
TD_PIDCHECKFAIL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_PIDCHECKFAIL	/;"	d
TD_PIDCHECKFAIL	drivers/usb/host/isp116x.h	/^#define TD_PIDCHECKFAIL /;"	d
TD_PIDCHECKFAIL	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_PIDCHECKFAIL	/;"	d
TD_PIDCHECKFAIL	drivers/usb/host/ohci.h	/^#define TD_PIDCHECKFAIL	/;"	d
TD_R	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_R	/;"	d
TD_R	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_R	/;"	d
TD_R	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_R	/;"	d
TD_R	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_R	/;"	d
TD_R	drivers/usb/host/ohci.h	/^#define TD_R	/;"	d
TD_SET	drivers/net/dc2114x.c	/^#define TD_SET	/;"	d	file:
TD_STS_BIT	drivers/net/sh_eth.h	/^enum TD_STS_BIT {$/;"	g
TD_T	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_T	/;"	d
TD_T	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_T	/;"	d
TD_T	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_T	/;"	d
TD_T	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_T	/;"	d
TD_T	drivers/usb/host/ohci.h	/^#define TD_T	/;"	d
TD_TACT	drivers/net/sh_eth.h	/^	TD_TACT = 0x80000000,$/;"	e	enum:TD_STS_BIT
TD_TDLE	drivers/net/sh_eth.h	/^	TD_TDLE = 0x40000000, TD_TFP1 = 0x20000000,$/;"	e	enum:TD_STS_BIT
TD_TER	drivers/net/dc2114x.c	/^#define TD_TER	/;"	d	file:
TD_TFP	drivers/net/sh_eth.h	/^#define TD_TFP	/;"	d
TD_TFP0	drivers/net/sh_eth.h	/^	TD_TFP0 = 0x10000000,$/;"	e	enum:TD_STS_BIT
TD_TFP1	drivers/net/sh_eth.h	/^	TD_TDLE = 0x40000000, TD_TFP1 = 0x20000000,$/;"	e	enum:TD_STS_BIT
TD_TOKEN_TOGGLE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define TD_TOKEN_TOGGLE	/;"	d
TD_TOKEN_TOGGLE	board/mpl/common/usb_uhci.h	/^#define TD_TOKEN_TOGGLE	/;"	d
TD_T_DATA0	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_T_DATA0	/;"	d
TD_T_DATA0	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_T_DATA0 /;"	d
TD_T_DATA0	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_T_DATA0 /;"	d
TD_T_DATA0	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_T_DATA0	/;"	d
TD_T_DATA0	drivers/usb/host/ohci.h	/^#define TD_T_DATA0 /;"	d
TD_T_DATA1	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_T_DATA1	/;"	d
TD_T_DATA1	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_T_DATA1 /;"	d
TD_T_DATA1	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_T_DATA1 /;"	d
TD_T_DATA1	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_T_DATA1	/;"	d
TD_T_DATA1	drivers/usb/host/ohci.h	/^#define TD_T_DATA1 /;"	d
TD_T_TOGGLE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_T_TOGGLE	/;"	d
TD_T_TOGGLE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_T_TOGGLE /;"	d
TD_T_TOGGLE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_T_TOGGLE /;"	d
TD_T_TOGGLE	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_T_TOGGLE	/;"	d
TD_T_TOGGLE	drivers/usb/host/ohci.h	/^#define TD_T_TOGGLE /;"	d
TD_UNEXPECTEDPID	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define TD_UNEXPECTEDPID	/;"	d
TD_UNEXPECTEDPID	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define TD_UNEXPECTEDPID /;"	d
TD_UNEXPECTEDPID	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define TD_UNEXPECTEDPID /;"	d
TD_UNEXPECTEDPID	drivers/usb/host/isp116x.h	/^#define TD_UNEXPECTEDPID /;"	d
TD_UNEXPECTEDPID	drivers/usb/host/ohci-s3c24xx.h	/^#define TD_UNEXPECTEDPID	/;"	d
TD_UNEXPECTEDPID	drivers/usb/host/ohci.h	/^#define TD_UNEXPECTEDPID /;"	d
TE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TE	/;"	d
TE	include/sym53c8xx.h	/^	#define   TE /;"	d
TEA	arch/sh/include/asm/cpu_sh7722.h	/^#define TEA	/;"	d
TEA	arch/sh/include/asm/cpu_sh7723.h	/^#define TEA	/;"	d
TEA	arch/sh/include/asm/cpu_sh7724.h	/^#define TEA	/;"	d
TEA	arch/sh/include/asm/cpu_sh7750.h	/^#define TEA	/;"	d
TEA	arch/sh/include/asm/cpu_sh7780.h	/^#define	TEA	/;"	d
TEGRA	arch/arm/Kconfig	/^config TEGRA$/;"	c	choice:ARM architecture""choice031ab9020104
TEGRA114	arch/arm/mach-tegra/Kconfig	/^config TEGRA114$/;"	c	choice:choice3cc3c0ca0104
TEGRA114_CLK_ACTMON	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ACTMON	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ACTMON /;"	d
TEGRA114_CLK_ADX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_ADX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ADX /;"	d
TEGRA114_CLK_AMX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_AMX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AMX /;"	d
TEGRA114_CLK_APBDMA	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBDMA	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBDMA /;"	d
TEGRA114_CLK_APBIF	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_APBIF	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_APBIF /;"	d
TEGRA114_CLK_AUDIO0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0 /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_2X /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO0_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO0_MUX /;"	d
TEGRA114_CLK_AUDIO1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1 /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_2X /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO1_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO1_MUX /;"	d
TEGRA114_CLK_AUDIO2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2 /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_2X /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO2_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO2_MUX /;"	d
TEGRA114_CLK_AUDIO3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3 /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_2X /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO3_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO3_MUX /;"	d
TEGRA114_CLK_AUDIO4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4 /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_2X /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_AUDIO4_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_AUDIO4_MUX /;"	d
TEGRA114_CLK_BLINK	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BLINK	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BLINK /;"	d
TEGRA114_CLK_BSEA	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEA	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEA /;"	d
TEGRA114_CLK_BSEV	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_BSEV	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_BSEV /;"	d
TEGRA114_CLK_CCLK_G	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_G	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_G /;"	d
TEGRA114_CLK_CCLK_LP	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CCLK_LP	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CCLK_LP /;"	d
TEGRA114_CLK_CILAB	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILAB	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILAB /;"	d
TEGRA114_CLK_CILCD	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILCD	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILCD /;"	d
TEGRA114_CLK_CILE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CILE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CILE /;"	d
TEGRA114_CLK_CLK_32K	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_32K	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_32K /;"	d
TEGRA114_CLK_CLK_M	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_M	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M /;"	d
TEGRA114_CLK_CLK_MAX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_MAX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_MAX /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV2 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_M_DIV4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_M_DIV4 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1 /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_1_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_1_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2 /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_2_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_2_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3 /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CLK_OUT_3_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CLK_OUT_3_MUX /;"	d
TEGRA114_CLK_CSI	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSI	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSI /;"	d
TEGRA114_CLK_CSITE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSITE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSITE /;"	d
TEGRA114_CLK_CSUS	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_CSUS	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_CSUS /;"	d
TEGRA114_CLK_DAM0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM0 /;"	d
TEGRA114_CLK_DAM1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM1 /;"	d
TEGRA114_CLK_DAM2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DAM2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DAM2 /;"	d
TEGRA114_CLK_DDS	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DDS	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DDS /;"	d
TEGRA114_CLK_DFLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_REF	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_REF /;"	d
TEGRA114_CLK_DFLL_SOC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DFLL_SOC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DFLL_SOC /;"	d
TEGRA114_CLK_DISP1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP1 /;"	d
TEGRA114_CLK_DISP2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DISP2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DISP2 /;"	d
TEGRA114_CLK_DP2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DP2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DP2 /;"	d
TEGRA114_CLK_DSIA	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIA	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA /;"	d
TEGRA114_CLK_DSIALP	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIALP	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIALP /;"	d
TEGRA114_CLK_DSIA_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIA_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIA_MUX /;"	d
TEGRA114_CLK_DSIB	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIB	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB /;"	d
TEGRA114_CLK_DSIBLP	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIBLP	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIBLP /;"	d
TEGRA114_CLK_DSIB_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DSIB_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DSIB_MUX /;"	d
TEGRA114_CLK_DTV	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_DTV	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_DTV /;"	d
TEGRA114_CLK_D_AUDIO	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_D_AUDIO	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_D_AUDIO /;"	d
TEGRA114_CLK_EMC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EMC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EMC /;"	d
TEGRA114_CLK_EPP	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EPP	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EPP /;"	d
TEGRA114_CLK_EXTERN1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN1 /;"	d
TEGRA114_CLK_EXTERN2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN2 /;"	d
TEGRA114_CLK_EXTERN3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_EXTERN3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_EXTERN3 /;"	d
TEGRA114_CLK_FUSE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE /;"	d
TEGRA114_CLK_FUSE_BURN	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_FUSE_BURN	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_FUSE_BURN /;"	d
TEGRA114_CLK_GR2D	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR2D	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR2D /;"	d
TEGRA114_CLK_GR3D	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_GR3D	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_GR3D /;"	d
TEGRA114_CLK_HCLK	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HCLK	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HCLK /;"	d
TEGRA114_CLK_HDA	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2CODEC_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2CODEC_2X /;"	d
TEGRA114_CLK_HDA2HDMI	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDA2HDMI	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDA2HDMI /;"	d
TEGRA114_CLK_HDMI	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HDMI	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HDMI /;"	d
TEGRA114_CLK_HOST1X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_HOST1X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_HOST1X /;"	d
TEGRA114_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C1 /;"	d
TEGRA114_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C2 /;"	d
TEGRA114_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C3 /;"	d
TEGRA114_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C4 /;"	d
TEGRA114_CLK_I2C5	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2C5	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2C5 /;"	d
TEGRA114_CLK_I2CSLOW	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2CSLOW	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2CSLOW /;"	d
TEGRA114_CLK_I2S0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0 /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S0_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S0_SYNC /;"	d
TEGRA114_CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1 /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S1_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S1_SYNC /;"	d
TEGRA114_CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2 /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S2_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S2_SYNC /;"	d
TEGRA114_CLK_I2S3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3 /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S3_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S3_SYNC /;"	d
TEGRA114_CLK_I2S4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4 /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_I2S4_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_I2S4_SYNC /;"	d
TEGRA114_CLK_ISP	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_ISP	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_ISP /;"	d
TEGRA114_CLK_KBC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KBC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KBC /;"	d
TEGRA114_CLK_KFUSE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_KFUSE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_KFUSE /;"	d
TEGRA114_CLK_LA	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_LA	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_LA /;"	d
TEGRA114_CLK_MC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MC /;"	d
TEGRA114_CLK_MIPI	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI /;"	d
TEGRA114_CLK_MIPI_CAL	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MIPI_CAL	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MIPI_CAL /;"	d
TEGRA114_CLK_MSELECT	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSELECT	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSELECT /;"	d
TEGRA114_CLK_MSENC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_MSENC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_MSENC /;"	d
TEGRA114_CLK_NDFLASH	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDFLASH	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDFLASH /;"	d
TEGRA114_CLK_NDSPEED	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NDSPEED	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NDSPEED /;"	d
TEGRA114_CLK_NOR	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_NOR	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_NOR /;"	d
TEGRA114_CLK_OWR	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_OWR	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_OWR /;"	d
TEGRA114_CLK_PCLK	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PCLK	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PCLK /;"	d
TEGRA114_CLK_PLL_A	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_A_OUT0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_A_OUT0 /;"	d
TEGRA114_CLK_PLL_C	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C /;"	d
TEGRA114_CLK_PLL_C2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C2 /;"	d
TEGRA114_CLK_PLL_C3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C3 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_C_OUT1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_C_OUT1 /;"	d
TEGRA114_CLK_PLL_D	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D /;"	d
TEGRA114_CLK_PLL_D2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D2_OUT0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D2_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_D_OUT0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_D_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_E_OUT0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_E_OUT0 /;"	d
TEGRA114_CLK_PLL_M	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_M_OUT1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_M_OUT1 /;"	d
TEGRA114_CLK_PLL_P	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT1 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT2 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT3 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_P_OUT4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_P_OUT4 /;"	d
TEGRA114_CLK_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_REF	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_REF /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_OUT	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_OUT /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_RE_VCO	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_RE_VCO /;"	d
TEGRA114_CLK_PLL_U	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U /;"	d
TEGRA114_CLK_PLL_U_12M	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_12M	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_12M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_480M	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_480M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_48M	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_48M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_U_60M	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_U_60M /;"	d
TEGRA114_CLK_PLL_X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PLL_X_OUT0	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PLL_X_OUT0 /;"	d
TEGRA114_CLK_PWM	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_PWM	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_PWM /;"	d
TEGRA114_CLK_RTC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_RTC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_RTC /;"	d
TEGRA114_CLK_SBC1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC1 /;"	d
TEGRA114_CLK_SBC2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC2 /;"	d
TEGRA114_CLK_SBC3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC3 /;"	d
TEGRA114_CLK_SBC4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC4 /;"	d
TEGRA114_CLK_SBC5	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC5	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC5 /;"	d
TEGRA114_CLK_SBC6	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SBC6	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SBC6 /;"	d
TEGRA114_CLK_SCLK	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SCLK	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SCLK /;"	d
TEGRA114_CLK_SDMMC1	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC1	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC1 /;"	d
TEGRA114_CLK_SDMMC2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC2 /;"	d
TEGRA114_CLK_SDMMC3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC3 /;"	d
TEGRA114_CLK_SDMMC4	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SDMMC4	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SDMMC4 /;"	d
TEGRA114_CLK_SE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SE /;"	d
TEGRA114_CLK_SOC_THERM	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SOC_THERM	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SOC_THERM /;"	d
TEGRA114_CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF /;"	d
TEGRA114_CLK_SPDIF_2X	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_2X	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_2X /;"	d
TEGRA114_CLK_SPDIF_IN	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_IN_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_IN_SYNC /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_MUX	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_MUX /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_SPDIF_OUT	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_SPDIF_OUT /;"	d
TEGRA114_CLK_TIMER	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TIMER	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TIMER /;"	d
TEGRA114_CLK_TRACE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TRACE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TRACE /;"	d
TEGRA114_CLK_TSEC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSEC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSEC /;"	d
TEGRA114_CLK_TSENSOR	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_TSENSOR	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_TSENSOR /;"	d
TEGRA114_CLK_UARTA	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTA	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTA /;"	d
TEGRA114_CLK_UARTB	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTB	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTB /;"	d
TEGRA114_CLK_UARTC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTC /;"	d
TEGRA114_CLK_UARTD	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_UARTD	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_UARTD /;"	d
TEGRA114_CLK_USB2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB2 /;"	d
TEGRA114_CLK_USB3	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USB3	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USB3 /;"	d
TEGRA114_CLK_USBD	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_USBD	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_USBD /;"	d
TEGRA114_CLK_VCP	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VCP	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VCP /;"	d
TEGRA114_CLK_VDE	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VDE	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VDE /;"	d
TEGRA114_CLK_VFIR	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VFIR	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VFIR /;"	d
TEGRA114_CLK_VI	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VI	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VIMCLK_SYNC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VIMCLK_SYNC /;"	d
TEGRA114_CLK_VI_SENSOR	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_VI_SENSOR	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_VI_SENSOR /;"	d
TEGRA114_CLK_XUSB_DEV	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_DEV_SRC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_DEV_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FALCON_SRC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FALCON_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_FS_SRC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_FS_SRC /;"	d
TEGRA114_CLK_XUSB_HOST	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HOST_SRC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HOST_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_HS_SRC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_HS_SRC /;"	d
TEGRA114_CLK_XUSB_SS	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_DIV2	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_DIV2 /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_CLK_XUSB_SS_SRC	include/dt-bindings/clock/tegra114-car.h	/^#define TEGRA114_CLK_XUSB_SS_SRC /;"	d
TEGRA114_SPI	drivers/spi/Kconfig	/^config TEGRA114_SPI$/;"	c	menu:SPI Support
TEGRA124	arch/arm/mach-tegra/Kconfig	/^config TEGRA124$/;"	c	choice:choice3cc3c0ca0104
TEGRA124_CLK_ACTMON	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ACTMON	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ACTMON /;"	d
TEGRA124_CLK_ADX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX /;"	d
TEGRA124_CLK_ADX1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_ADX1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ADX1 /;"	d
TEGRA124_CLK_AFI	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AFI	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AFI /;"	d
TEGRA124_CLK_AMX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX /;"	d
TEGRA124_CLK_AMX1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_AMX1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AMX1 /;"	d
TEGRA124_CLK_APBDMA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBDMA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBDMA /;"	d
TEGRA124_CLK_APBIF	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_APBIF	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_APBIF /;"	d
TEGRA124_CLK_AUDIO0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0 /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_2X /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO0_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO0_MUX /;"	d
TEGRA124_CLK_AUDIO1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1 /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_2X /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO1_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO1_MUX /;"	d
TEGRA124_CLK_AUDIO2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2 /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_2X /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO2_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO2_MUX /;"	d
TEGRA124_CLK_AUDIO3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3 /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_2X /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO3_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO3_MUX /;"	d
TEGRA124_CLK_AUDIO4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4 /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_2X /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_AUDIO4_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_AUDIO4_MUX /;"	d
TEGRA124_CLK_BLINK	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BLINK	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BLINK /;"	d
TEGRA124_CLK_BSEA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEA /;"	d
TEGRA124_CLK_BSEV	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_BSEV	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_BSEV /;"	d
TEGRA124_CLK_CCLK_G	arch/arm/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	arch/mips/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	arch/nios2/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	arch/x86/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_G	include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_G	/;"	d
TEGRA124_CLK_CCLK_LP	arch/arm/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	arch/mips/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	arch/nios2/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	arch/x86/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CCLK_LP	include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CCLK_LP	/;"	d
TEGRA124_CLK_CILAB	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILAB	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILAB /;"	d
TEGRA124_CLK_CILCD	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILCD	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILCD /;"	d
TEGRA124_CLK_CILE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CILE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CILE /;"	d
TEGRA124_CLK_CLK72MHZ	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK72MHZ	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK72MHZ /;"	d
TEGRA124_CLK_CLK_32K	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_32K	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_32K /;"	d
TEGRA124_CLK_CLK_M	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_M	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M /;"	d
TEGRA124_CLK_CLK_MAX	arch/arm/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	arch/mips/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	arch/x86/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_MAX	include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_CLK_MAX	/;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV2 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_M_DIV4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_M_DIV4 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1 /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_1_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_1_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2 /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_2_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_2_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3 /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CLK_OUT_3_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CLK_OUT_3_MUX /;"	d
TEGRA124_CLK_CML0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML0 /;"	d
TEGRA124_CLK_CML1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CML1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CML1 /;"	d
TEGRA124_CLK_CSI	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSI	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSI /;"	d
TEGRA124_CLK_CSITE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSITE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSITE /;"	d
TEGRA124_CLK_CSUS	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_CSUS	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_CSUS /;"	d
TEGRA124_CLK_DAM0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM0 /;"	d
TEGRA124_CLK_DAM1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM1 /;"	d
TEGRA124_CLK_DAM2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DAM2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DAM2 /;"	d
TEGRA124_CLK_DDS	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DDS	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DDS /;"	d
TEGRA124_CLK_DFLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_REF	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_REF /;"	d
TEGRA124_CLK_DFLL_SOC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DFLL_SOC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DFLL_SOC /;"	d
TEGRA124_CLK_DISP1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP1 /;"	d
TEGRA124_CLK_DISP2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DISP2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DISP2 /;"	d
TEGRA124_CLK_DP2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DP2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DP2 /;"	d
TEGRA124_CLK_DPAUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DPAUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DPAUX /;"	d
TEGRA124_CLK_DSIA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIA /;"	d
TEGRA124_CLK_DSIALP	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIALP	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIALP /;"	d
TEGRA124_CLK_DSIB	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIB	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIB /;"	d
TEGRA124_CLK_DSIBLP	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DSIBLP	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DSIBLP /;"	d
TEGRA124_CLK_DTV	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_DTV	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_DTV /;"	d
TEGRA124_CLK_D_AUDIO	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_D_AUDIO	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_D_AUDIO /;"	d
TEGRA124_CLK_EMC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_EMC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EMC /;"	d
TEGRA124_CLK_ENTROPY	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_ENTROPY	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ENTROPY /;"	d
TEGRA124_CLK_EXTERN1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN1 /;"	d
TEGRA124_CLK_EXTERN2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN2 /;"	d
TEGRA124_CLK_EXTERN3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_EXTERN3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_EXTERN3 /;"	d
TEGRA124_CLK_FUSE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE /;"	d
TEGRA124_CLK_FUSE_BURN	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_FUSE_BURN	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_FUSE_BURN /;"	d
TEGRA124_CLK_GPU	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_GPU	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_GPU /;"	d
TEGRA124_CLK_HCLK	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HCLK	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HCLK /;"	d
TEGRA124_CLK_HDA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2CODEC_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2CODEC_2X /;"	d
TEGRA124_CLK_HDA2HDMI	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDA2HDMI	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDA2HDMI /;"	d
TEGRA124_CLK_HDMI	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HDMI_AUDIO	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HDMI_AUDIO /;"	d
TEGRA124_CLK_HOST1X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_HOST1X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_HOST1X /;"	d
TEGRA124_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C1 /;"	d
TEGRA124_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C2 /;"	d
TEGRA124_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C3 /;"	d
TEGRA124_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C4 /;"	d
TEGRA124_CLK_I2C5	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C5	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C5 /;"	d
TEGRA124_CLK_I2C6	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2C6	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2C6 /;"	d
TEGRA124_CLK_I2CSLOW	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2CSLOW	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2CSLOW /;"	d
TEGRA124_CLK_I2S0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0 /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S0_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S0_SYNC /;"	d
TEGRA124_CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1 /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S1_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S1_SYNC /;"	d
TEGRA124_CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2 /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S2_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S2_SYNC /;"	d
TEGRA124_CLK_I2S3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3 /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S3_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S3_SYNC /;"	d
TEGRA124_CLK_I2S4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4 /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_I2S4_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_I2S4_SYNC /;"	d
TEGRA124_CLK_ISP	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISP	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISP /;"	d
TEGRA124_CLK_ISPB	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_ISPB	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_ISPB /;"	d
TEGRA124_CLK_KBC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KBC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KBC /;"	d
TEGRA124_CLK_KFUSE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_KFUSE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_KFUSE /;"	d
TEGRA124_CLK_LA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_LA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_LA /;"	d
TEGRA124_CLK_MC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MC /;"	d
TEGRA124_CLK_MIPI	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI /;"	d
TEGRA124_CLK_MIPI_CAL	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MIPI_CAL	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MIPI_CAL /;"	d
TEGRA124_CLK_MSELECT	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSELECT	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSELECT /;"	d
TEGRA124_CLK_MSENC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_MSENC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_MSENC /;"	d
TEGRA124_CLK_NOR	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_NOR	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_NOR /;"	d
TEGRA124_CLK_OWR	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_OWR	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_OWR /;"	d
TEGRA124_CLK_PCIE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCIE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCIE /;"	d
TEGRA124_CLK_PCLK	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PCLK	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PCLK /;"	d
TEGRA124_CLK_PLL_A	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_A_OUT0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_A_OUT0 /;"	d
TEGRA124_CLK_PLL_C	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C /;"	d
TEGRA124_CLK_PLL_C2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C2 /;"	d
TEGRA124_CLK_PLL_C3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C3 /;"	d
TEGRA124_CLK_PLL_C4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C4 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_OUT1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_OUT1 /;"	d
TEGRA124_CLK_PLL_C_UD	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_C_UD	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_C_UD /;"	d
TEGRA124_CLK_PLL_D	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D /;"	d
TEGRA124_CLK_PLL_D2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_D2_OUT0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D2_OUT0 /;"	d
TEGRA124_CLK_PLL_DP	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_DP	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_DP /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_DSI_OUT	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_DSI_OUT /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_D_OUT0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_D_OUT0 /;"	d
TEGRA124_CLK_PLL_E	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_E_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_E_MUX /;"	d
TEGRA124_CLK_PLL_M	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_OUT1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_OUT1 /;"	d
TEGRA124_CLK_PLL_M_UD	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_M_UD	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_M_UD /;"	d
TEGRA124_CLK_PLL_P	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT1 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT2 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT3 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT4 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_P_OUT5	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_P_OUT5 /;"	d
TEGRA124_CLK_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_REF	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_REF /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_OUT	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_OUT /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_RE_VCO	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_RE_VCO /;"	d
TEGRA124_CLK_PLL_U	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U /;"	d
TEGRA124_CLK_PLL_U_12M	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_12M	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_12M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_480M	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_480M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_48M	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_48M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_U_60M	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PLL_U_60M /;"	d
TEGRA124_CLK_PLL_X	arch/arm/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	arch/mips/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	arch/x86/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X	include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PLL_X_OUT0	include/dt-bindings/clock/tegra124-car.h	/^#define TEGRA124_CLK_PLL_X_OUT0	/;"	d
TEGRA124_CLK_PWM	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_PWM	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_PWM /;"	d
TEGRA124_CLK_RTC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_RTC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_RTC /;"	d
TEGRA124_CLK_SATA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA /;"	d
TEGRA124_CLK_SATA_COLD	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_COLD	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_COLD /;"	d
TEGRA124_CLK_SATA_OOB	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SATA_OOB	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SATA_OOB /;"	d
TEGRA124_CLK_SBC1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC1 /;"	d
TEGRA124_CLK_SBC2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC2 /;"	d
TEGRA124_CLK_SBC3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC3 /;"	d
TEGRA124_CLK_SBC4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC4 /;"	d
TEGRA124_CLK_SBC5	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC5	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC5 /;"	d
TEGRA124_CLK_SBC6	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SBC6	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SBC6 /;"	d
TEGRA124_CLK_SCLK	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SCLK	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SCLK /;"	d
TEGRA124_CLK_SDMMC1	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC1	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC1 /;"	d
TEGRA124_CLK_SDMMC2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC2 /;"	d
TEGRA124_CLK_SDMMC3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC3 /;"	d
TEGRA124_CLK_SDMMC4	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SDMMC4	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SDMMC4 /;"	d
TEGRA124_CLK_SE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SE /;"	d
TEGRA124_CLK_SOC_THERM	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOC_THERM	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOC_THERM /;"	d
TEGRA124_CLK_SOR0	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0 /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SOR0_LVDS	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SOR0_LVDS /;"	d
TEGRA124_CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF /;"	d
TEGRA124_CLK_SPDIF_2X	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_2X	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_2X /;"	d
TEGRA124_CLK_SPDIF_IN	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_IN_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_IN_SYNC /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_MUX	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_MUX /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_SPDIF_OUT	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_SPDIF_OUT /;"	d
TEGRA124_CLK_TIMER	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TIMER	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TIMER /;"	d
TEGRA124_CLK_TRACE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TRACE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TRACE /;"	d
TEGRA124_CLK_TSEC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSEC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSEC /;"	d
TEGRA124_CLK_TSENSOR	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_TSENSOR	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_TSENSOR /;"	d
TEGRA124_CLK_UARTA	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTA	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTA /;"	d
TEGRA124_CLK_UARTB	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTB	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTB /;"	d
TEGRA124_CLK_UARTC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTC /;"	d
TEGRA124_CLK_UARTD	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_UARTD	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_UARTD /;"	d
TEGRA124_CLK_USB2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB2 /;"	d
TEGRA124_CLK_USB3	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USB3	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USB3 /;"	d
TEGRA124_CLK_USBD	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_USBD	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_USBD /;"	d
TEGRA124_CLK_VCP	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VCP	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VCP /;"	d
TEGRA124_CLK_VDE	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VDE	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VDE /;"	d
TEGRA124_CLK_VFIR	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VFIR	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VFIR /;"	d
TEGRA124_CLK_VI	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VI	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI /;"	d
TEGRA124_CLK_VIC03	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIC03	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIC03 /;"	d
TEGRA124_CLK_VIM2_CLK	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIM2_CLK	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIM2_CLK /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VIMCLK_SYNC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VIMCLK_SYNC /;"	d
TEGRA124_CLK_VI_SENSOR	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_VI_SENSOR2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_VI_SENSOR2 /;"	d
TEGRA124_CLK_XUSB_DEV	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_DEV_SRC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_DEV_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FALCON_SRC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FALCON_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_FS_SRC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_FS_SRC /;"	d
TEGRA124_CLK_XUSB_HOST	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HOST_SRC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HOST_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_HS_SRC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_HS_SRC /;"	d
TEGRA124_CLK_XUSB_SS	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_DIV2	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_DIV2 /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_CLK_XUSB_SS_SRC	include/dt-bindings/clock/tegra124-car-common.h	/^#define TEGRA124_CLK_XUSB_SS_SRC /;"	d
TEGRA124_FUNC_PCIE	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_PCIE,$/;"	e	enum:tegra124_function	file:
TEGRA124_FUNC_RSVD	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_RSVD,$/;"	e	enum:tegra124_function	file:
TEGRA124_FUNC_SATA	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_SATA,$/;"	e	enum:tegra124_function	file:
TEGRA124_FUNC_SNPS	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_SNPS,$/;"	e	enum:tegra124_function	file:
TEGRA124_FUNC_UART	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_UART,$/;"	e	enum:tegra124_function	file:
TEGRA124_FUNC_USB3	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_USB3,$/;"	e	enum:tegra124_function	file:
TEGRA124_FUNC_XUSB	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^	TEGRA124_FUNC_XUSB,$/;"	e	enum:tegra124_function	file:
TEGRA124_LANE	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define TEGRA124_LANE(/;"	d	file:
TEGRA124_PCIE	drivers/pci/pci_tegra.c	/^	TEGRA124_PCIE,$/;"	e	enum:tegra_pci_id	file:
TEGRA124_RESET	arch/arm/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	arch/microblaze/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	arch/mips/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	arch/nios2/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	arch/sandbox/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	arch/x86/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	arch/xtensa/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RESET	include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RESET(/;"	d
TEGRA124_RST_DFLL_DVCO	arch/arm/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	arch/microblaze/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	arch/mips/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	arch/nios2/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	arch/sandbox/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	arch/x86/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	arch/xtensa/dts/include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_RST_DFLL_DVCO	include/dt-bindings/reset/tegra124-car.h	/^#define TEGRA124_RST_DFLL_DVCO	/;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/arm/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/microblaze/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/mips/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/nios2/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/sandbox/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/x86/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	arch/xtensa/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_CPU	include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_CPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/arm/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/microblaze/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/mips/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/nios2/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/sandbox/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/x86/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	arch/xtensa/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_GPU	include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_GPU /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/arm/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/microblaze/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/mips/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/nios2/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/sandbox/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/x86/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	arch/xtensa/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_MEM	include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_MEM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/arm/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/microblaze/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/mips/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/nios2/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/sandbox/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/x86/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	arch/xtensa/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_NUM	include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_NUM /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/arm/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/microblaze/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/mips/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/nios2/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/sandbox/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/x86/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	arch/xtensa/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA124_SOCTHERM_SENSOR_PLLX	include/dt-bindings/thermal/tegra124-soctherm.h	/^#define TEGRA124_SOCTHERM_SENSOR_PLLX /;"	d
TEGRA186	arch/arm/mach-tegra/Kconfig	/^config TEGRA186$/;"	c	choice:choice3cc3c0ca0104
TEGRA186_BPMP	drivers/misc/Kconfig	/^config TEGRA186_BPMP$/;"	c	menu:Multifunction device drivers
TEGRA186_BPMP_I2C	drivers/i2c/Kconfig	/^config TEGRA186_BPMP_I2C$/;"	c	menu:I2C support
TEGRA186_CLK_ACLK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACLK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACLK /;"	d
TEGRA186_CLK_ACTMON	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ACTMON	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ACTMON /;"	d
TEGRA186_CLK_ADSP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSP /;"	d
TEGRA186_CLK_ADSPNEON	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_ADSPNEON	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ADSPNEON /;"	d
TEGRA186_CLK_AFI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AFI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AFI /;"	d
TEGRA186_CLK_AHUB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AHUB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AHUB /;"	d
TEGRA186_CLK_AON_APB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_APB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_APB /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_CPU_NIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_CPU_NIC /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_I2C_SLOW	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_I2C_SLOW /;"	d
TEGRA186_CLK_AON_NIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_NIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_NIC /;"	d
TEGRA186_CLK_AON_TOUCH	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_TOUCH	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_TOUCH /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_AON_UART_FST_MIPI_CAL	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AON_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_APB2APE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APB2APE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APB2APE /;"	d
TEGRA186_CLK_APE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_APE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_APE /;"	d
TEGRA186_CLK_AUD_MCLK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AUD_MCLK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AUD_MCLK /;"	d
TEGRA186_CLK_AXI_CBB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_AXI_CBB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_AXI_CBB /;"	d
TEGRA186_CLK_BPMP_APB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_APB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_APB /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_CPU_NIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_CPU_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_BPMP_NIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_BPMP_NIC /;"	d
TEGRA186_CLK_CAN1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1 /;"	d
TEGRA186_CLK_CAN1_HOST	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN1_HOST	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN1_HOST /;"	d
TEGRA186_CLK_CAN2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2 /;"	d
TEGRA186_CLK_CAN2_HOST	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CAN2_HOST	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CAN2_HOST /;"	d
TEGRA186_CLK_CEC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CEC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CEC /;"	d
TEGRA186_CLK_CLK_32K	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_32K	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_32K /;"	d
TEGRA186_CLK_CLK_M	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_M	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_M /;"	d
TEGRA186_CLK_CLK_MAX	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_CLK_MAX	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_CLK_MAX /;"	d
TEGRA186_CLK_DBGAPB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DBGAPB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DBGAPB /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DFLLDISP_DIV	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DFLLDISP_DIV /;"	d
TEGRA186_CLK_DMIC1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC1 /;"	d
TEGRA186_CLK_DMIC2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC2 /;"	d
TEGRA186_CLK_DMIC3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC3 /;"	d
TEGRA186_CLK_DMIC4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC4 /;"	d
TEGRA186_CLK_DMIC5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DMIC5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DMIC5 /;"	d
TEGRA186_CLK_DP2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DP2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DP2 /;"	d
TEGRA186_CLK_DPAUX	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX /;"	d
TEGRA186_CLK_DPAUX1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DPAUX1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DPAUX1 /;"	d
TEGRA186_CLK_DSI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSI /;"	d
TEGRA186_CLK_DSIA_LP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIA_LP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIA_LP /;"	d
TEGRA186_CLK_DSIB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB /;"	d
TEGRA186_CLK_DSIB_LP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIB_LP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIB_LP /;"	d
TEGRA186_CLK_DSIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC /;"	d
TEGRA186_CLK_DSIC_LP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSIC_LP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSIC_LP /;"	d
TEGRA186_CLK_DSID	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID /;"	d
TEGRA186_CLK_DSID_LP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSID_LP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSID_LP /;"	d
TEGRA186_CLK_DSPK1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK1 /;"	d
TEGRA186_CLK_DSPK2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DSPK2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DSPK2 /;"	d
TEGRA186_CLK_DTV	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV /;"	d
TEGRA186_CLK_DTV_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_DTV_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_DTV_INPUT /;"	d
TEGRA186_CLK_EMC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EMC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EMC /;"	d
TEGRA186_CLK_EQOS_AXI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_AXI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_AXI /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_PTP_REF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_PTP_REF /;"	d
TEGRA186_CLK_EQOS_RX	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_RX_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_RX_INPUT /;"	d
TEGRA186_CLK_EQOS_TX	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EQOS_TX	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EQOS_TX /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH1 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH2 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH3 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_EXTPERIPH4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_EXTPERIPH4 /;"	d
TEGRA186_CLK_FUSE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_FUSE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_FUSE /;"	d
TEGRA186_CLK_GPC2CLK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPC2CLK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPC2CLK /;"	d
TEGRA186_CLK_GPCCLK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPCCLK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPCCLK /;"	d
TEGRA186_CLK_GPU	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_GPU	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_GPU /;"	d
TEGRA186_CLK_HDA	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2CODEC_2X	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2CODEC_2X /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HDA2HDMICODEC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HDA2HDMICODEC /;"	d
TEGRA186_CLK_HOST1X	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HOST1X	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HOST1X /;"	d
TEGRA186_CLK_HSIC_TRK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_HSIC_TRK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_HSIC_TRK /;"	d
TEGRA186_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C1 /;"	d
TEGRA186_CLK_I2C10	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C10	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C10 /;"	d
TEGRA186_CLK_I2C12	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C12	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C12 /;"	d
TEGRA186_CLK_I2C13	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C13	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C13 /;"	d
TEGRA186_CLK_I2C14	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C14	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C14 /;"	d
TEGRA186_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C2 /;"	d
TEGRA186_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C3 /;"	d
TEGRA186_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C4 /;"	d
TEGRA186_CLK_I2C5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C5 /;"	d
TEGRA186_CLK_I2C6	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C6	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C6 /;"	d
TEGRA186_CLK_I2C7	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C7	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C7 /;"	d
TEGRA186_CLK_I2C8	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C8	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C8 /;"	d
TEGRA186_CLK_I2C9	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C9	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C9 /;"	d
TEGRA186_CLK_I2C_SLOW	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2C_SLOW	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2C_SLOW /;"	d
TEGRA186_CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1 /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S1_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S1_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2 /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S2_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S2_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3 /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S3_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S3_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4 /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S4_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S4_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5 /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S5_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S5_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6 /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_I2S6_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_I2S6_SYNC_INPUT /;"	d
TEGRA186_CLK_IQC1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC1 /;"	d
TEGRA186_CLK_IQC2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_IQC2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_IQC2 /;"	d
TEGRA186_CLK_ISP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_ISP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_ISP /;"	d
TEGRA186_CLK_KFUSE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_KFUSE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_KFUSE /;"	d
TEGRA186_CLK_MAUD	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MAUD	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MAUD /;"	d
TEGRA186_CLK_MIPI_CAL	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MIPI_CAL	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MIPI_CAL /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_CORE_PLL_FIXED	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_CORE_PLL_FIXED /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_IOBIST	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_IOBIST /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_ANA	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_LS_BIT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_LS_BIT /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_RX_SYMB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_RX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_LS_3XBIT /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L0_TX_SYMB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L0_TX_SYMB /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_L1_RX_ANA	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_L1_RX_ANA /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MPHY_TX_1MHZ_REF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MPHY_TX_1MHZ_REF /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_MSS_ENCRYPT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_MSS_ENCRYPT /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_AXI_CBB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_AXI_CBB /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BCPU	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BCPU /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_BPMP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_BPMP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_DISP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_DISP /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_GPU	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_GPU /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_ISP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_ISP /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_MCPU	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_MCPU /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVDEC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVDEC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVENC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVENC /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_NVJPG	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_NVJPG /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SCE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SCE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_SE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_SE /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSEC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSEC /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_TSECB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_TSECB /;"	d
TEGRA186_CLK_NAFLL_VI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VI /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NAFLL_VIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NAFLL_VIC /;"	d
TEGRA186_CLK_NVCSI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSI /;"	d
TEGRA186_CLK_NVCSILP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVCSILP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVCSILP /;"	d
TEGRA186_CLK_NVDEC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDEC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDEC /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAYHUB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAYHUB /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DISP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DISP /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_DSC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_DSC /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P0	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P0 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P1 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVDISPLAY_P2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVDISPLAY_P2 /;"	d
TEGRA186_CLK_NVENC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVENC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVENC /;"	d
TEGRA186_CLK_NVJPG	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_NVJPG	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_NVJPG /;"	d
TEGRA186_CLK_OSC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_OSC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_OSC /;"	d
TEGRA186_CLK_PCIE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIE2_IOBIST	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIE2_IOBIST /;"	d
TEGRA186_CLK_PCIERX0	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX0	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX0 /;"	d
TEGRA186_CLK_PCIERX1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX1 /;"	d
TEGRA186_CLK_PCIERX2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX2 /;"	d
TEGRA186_CLK_PCIERX3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX3 /;"	d
TEGRA186_CLK_PCIERX4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PCIERX4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PCIERX4 /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_SATA_USB_RX_BYP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_SATA_USB_RX_BYP /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD0_MGMT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD0_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PEX_USB_PAD1_MGMT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PEX_USB_PAD1_MGMT /;"	d
TEGRA186_CLK_PLLA	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA /;"	d
TEGRA186_CLK_PLLA1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLA1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLA1 /;"	d
TEGRA186_CLK_PLLAON	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLAON	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLAON /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLBPMPCAM	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLBPMPCAM /;"	d
TEGRA186_CLK_PLLC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC /;"	d
TEGRA186_CLK_PLLC2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC2 /;"	d
TEGRA186_CLK_PLLC3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC3 /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT0	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT0 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT1 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT2 /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_OUT_MUX	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_OUT_MUX /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC4_VCO_DIV2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC4_VCO_DIV2 /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_AON	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_AON /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_ISP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_ISP /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLC_OUT_VE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLC_OUT_VE /;"	d
TEGRA186_CLK_PLLD	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD /;"	d
TEGRA186_CLK_PLLD2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD2 /;"	d
TEGRA186_CLK_PLLD3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLD3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD3 /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDISPHUB_DIV	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDISPHUB_DIV /;"	d
TEGRA186_CLK_PLLDP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLDP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLDP /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLD_OUT1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLD_OUT1 /;"	d
TEGRA186_CLK_PLLE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLE_PWRSEQ	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLE_PWRSEQ /;"	d
TEGRA186_CLK_PLLNVCSI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLNVCSI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLNVCSI /;"	d
TEGRA186_CLK_PLLP	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_DIV8	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_DIV8 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT0	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT0 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLP_OUT5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLP_OUT5 /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_IDDQ	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_IDDQ /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT1_DIV5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT1_DIV5 /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_OUT_GATED	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_OUT_GATED /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PEX	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PEX /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLLE_PASSTHROUGH /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_PLL_REF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_PLL_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_REF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_REF /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLREFE_VCO	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLREFE_VCO /;"	d
TEGRA186_CLK_PLLU	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLLU	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLLU /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT0	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT0 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_A_OUT1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_A_OUT1 /;"	d
TEGRA186_CLK_PLL_P	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_P	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_P /;"	d
TEGRA186_CLK_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_REF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_REF /;"	d
TEGRA186_CLK_PLL_U_480M	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_480M	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_480M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PLL_U_48M	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PLL_U_48M /;"	d
TEGRA186_CLK_PWM1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM1 /;"	d
TEGRA186_CLK_PWM2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM2 /;"	d
TEGRA186_CLK_PWM3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM3 /;"	d
TEGRA186_CLK_PWM4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM4 /;"	d
TEGRA186_CLK_PWM5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM5 /;"	d
TEGRA186_CLK_PWM6	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM6	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM6 /;"	d
TEGRA186_CLK_PWM7	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM7	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM7 /;"	d
TEGRA186_CLK_PWM8	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_PWM8	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_PWM8 /;"	d
TEGRA186_CLK_QSPI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI /;"	d
TEGRA186_CLK_QSPI_OUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_QSPI_OUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_QSPI_OUT /;"	d
TEGRA186_CLK_SATA	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_IOBIST	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_IOBIST /;"	d
TEGRA186_CLK_SATA_OOB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SATA_OOB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SATA_OOB /;"	d
TEGRA186_CLK_SCE_APB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_APB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_APB /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_CPU_NIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_CPU_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SCE_NIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SCE_NIC /;"	d
TEGRA186_CLK_SDMMC1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC1 /;"	d
TEGRA186_CLK_SDMMC2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC2 /;"	d
TEGRA186_CLK_SDMMC3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC3 /;"	d
TEGRA186_CLK_SDMMC4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC4 /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SDMMC_LEGACY_TM	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SDMMC_LEGACY_TM /;"	d
TEGRA186_CLK_SE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SE /;"	d
TEGRA186_CLK_SOR0	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0 /;"	d
TEGRA186_CLK_SOR0_OUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_OUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_OUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR0_PAD_CLKOUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR0_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1 /;"	d
TEGRA186_CLK_SOR1_OUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_OUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_OUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR1_PAD_CLKOUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR1_PAD_CLKOUT /;"	d
TEGRA186_CLK_SOR_SAFE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SOR_SAFE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SOR_SAFE /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIFIN_SYNC_INPUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIFIN_SYNC_INPUT /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_DOUBLER	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_DOUBLER /;"	d
TEGRA186_CLK_SPDIF_IN	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_IN	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_IN /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPDIF_OUT	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPDIF_OUT /;"	d
TEGRA186_CLK_SPI1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI1 /;"	d
TEGRA186_CLK_SPI2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI2 /;"	d
TEGRA186_CLK_SPI3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI3 /;"	d
TEGRA186_CLK_SPI4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SPI4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SPI4 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC1 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC2 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC3 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DMIC4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DMIC4 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK1 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_DSPK2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_DSPK2 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S1	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S1 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S2	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S2 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S3	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S3 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S4	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S4 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S5	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S5 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_I2S6	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_I2S6 /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_SYNC_SPDIF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_SYNC_SPDIF /;"	d
TEGRA186_CLK_TACH	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TACH	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TACH /;"	d
TEGRA186_CLK_TSC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSC /;"	d
TEGRA186_CLK_TSEC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSEC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSEC /;"	d
TEGRA186_CLK_TSECB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_TSECB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_TSECB /;"	d
TEGRA186_CLK_UARTA	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTA	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTA /;"	d
TEGRA186_CLK_UARTB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTB /;"	d
TEGRA186_CLK_UARTC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTC /;"	d
TEGRA186_CLK_UARTD	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTD	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTD /;"	d
TEGRA186_CLK_UARTE	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTE	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTE /;"	d
TEGRA186_CLK_UARTF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTF /;"	d
TEGRA186_CLK_UARTG	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UARTG	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UARTG /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UART_FST_MIPI_CAL	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UART_FST_MIPI_CAL /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSDEV_REF	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSDEV_REF /;"	d
TEGRA186_CLK_UFSHC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UFSHC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UFSHC /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL0_PWRSEQ	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL0_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_UPHY_PLL1_PWRSEQ	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UPHY_PLL1_PWRSEQ /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_HSIC_TRK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_HSIC_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_USB2_TRK	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_USB2_TRK /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_UTMIP_PLL_PWRSEQ	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_UTMIP_PLL_PWRSEQ /;"	d
TEGRA186_CLK_VI	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VI	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI /;"	d
TEGRA186_CLK_VIC	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VIC	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VIC /;"	d
TEGRA186_CLK_VI_I2C	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_VI_I2C	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_VI_I2C /;"	d
TEGRA186_CLK_XUSB	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_DEV	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_DEV /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_CORE_SS	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_CORE_SS /;"	d
TEGRA186_CLK_XUSB_DEV	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_DEV	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_DEV /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FALCON	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FALCON /;"	d
TEGRA186_CLK_XUSB_FS	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_FS	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_FS /;"	d
TEGRA186_CLK_XUSB_HOST	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_HOST	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_HOST /;"	d
TEGRA186_CLK_XUSB_SS	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLK_XUSB_SS	include/dt-bindings/clock/tegra186-clock.h	/^#define TEGRA186_CLK_XUSB_SS /;"	d
TEGRA186_CLOCK	drivers/clk/tegra/Kconfig	/^config TEGRA186_CLOCK$/;"	c
TEGRA186_GPIO	drivers/gpio/Kconfig	/^config TEGRA186_GPIO$/;"	c	menu:GPIO Support
TEGRA186_GPIO_DEBOUNCE_THRESHOLD	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_DEBOUNCE_THRESHOLD	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_DEBOUNCE_ENABLE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_DEBOUNCE_ENABLE	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_ENABLE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_ENABLE	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_INTERRUPT_ENABLE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_INTERRUPT_ENABLE	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_OUT	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_OUT	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TIMESTAMPING_ENABLE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TIMESTAMPING_ENABLE	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_LEVEL_HIGH_RISING	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_LEVEL_HIGH_RISING	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_DOUBLE_EDGE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_DOUBLE_EDGE	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_LEVEL	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_LEVEL	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_MASK	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_MASK	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_NONE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_NONE	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_SHIFT	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_SHIFT	/;"	d
TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_SINGLE_EDGE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_SINGLE_EDGE	/;"	d
TEGRA186_GPIO_INPUT	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_INPUT	/;"	d
TEGRA186_GPIO_INTERRUPT_CLEAR	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_INTERRUPT_CLEAR	/;"	d
TEGRA186_GPIO_INTERRUPT_STATUS_G	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_INTERRUPT_STATUS_G	/;"	d
TEGRA186_GPIO_INTERRUPT_STATUS_G_COUNT	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_INTERRUPT_STATUS_G_COUNT	/;"	d
TEGRA186_GPIO_INTERRUPT_STATUS_G_STRIDE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_INTERRUPT_STATUS_G_STRIDE	/;"	d
TEGRA186_GPIO_OUTPUT_CONTROL	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_OUTPUT_CONTROL	/;"	d
TEGRA186_GPIO_OUTPUT_CONTROL_FLOATED	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_OUTPUT_CONTROL_FLOATED	/;"	d
TEGRA186_GPIO_OUTPUT_VALUE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_OUTPUT_VALUE	/;"	d
TEGRA186_GPIO_OUTPUT_VALUE_HIGH	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_OUTPUT_VALUE_HIGH	/;"	d
TEGRA186_GPIO_PER_GPIO_COUNT	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_PER_GPIO_COUNT	/;"	d
TEGRA186_GPIO_PER_GPIO_STRIDE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_PER_GPIO_STRIDE	/;"	d
TEGRA186_GPIO_PER_PORT_STRIDE	drivers/gpio/tegra186_gpio_priv.h	/^#define TEGRA186_GPIO_PER_PORT_STRIDE	/;"	d
TEGRA186_PCIE	drivers/pci/pci_tegra.c	/^	TEGRA186_PCIE,$/;"	e	enum:tegra_pci_id	file:
TEGRA186_POWER_DOMAIN	drivers/power/domain/Kconfig	/^config TEGRA186_POWER_DOMAIN$/;"	c	menu:Power Domain Support
TEGRA186_POWER_DOMAIN_AUD	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_AUD	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_AUD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DFD	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DFD	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISP	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISP	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPB	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPB	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_DISPC	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_DISPC	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_GPU	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_GPU	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_ISPA	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_ISPA	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MAX	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MAX	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_MPE	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_MPE	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVDEC	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVDEC	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_NVJPG	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_NVJPG	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_PCX	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_PCX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_SAX	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_SAX	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VE	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VE	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_VIC	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_VIC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBA	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBA	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBB	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBB	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_POWER_DOMAIN_XUSBC	include/dt-bindings/power/tegra186-powergate.h	/^#define TEGRA186_POWER_DOMAIN_XUSBC	/;"	d
TEGRA186_RESET	drivers/reset/Kconfig	/^config TEGRA186_RESET$/;"	c	menu:Reset Controller Support
TEGRA186_RESET_ACTMON	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ACTMON	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ACTMON	/;"	d
TEGRA186_RESET_ADSP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP	/;"	d
TEGRA186_RESET_ADSPDBG	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPDBG	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPDBG	/;"	d
TEGRA186_RESET_ADSPINTF	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPINTF	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPINTF	/;"	d
TEGRA186_RESET_ADSPNEON	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPNEON	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPNEON	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPPERIPH	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPPERIPH	/;"	d
TEGRA186_RESET_ADSPSCU	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPSCU	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPSCU	/;"	d
TEGRA186_RESET_ADSPWDT	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSPWDT	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSPWDT	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_ADSP_ALL	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ADSP_ALL	/;"	d
TEGRA186_RESET_AFI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AFI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AFI	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_ACTMON	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_ACTMON	/;"	d
TEGRA186_RESET_AON_APB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_APB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_APB	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DBGRESETN	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DBGRESETN	/;"	d
TEGRA186_RESET_AON_DMA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_DMA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_DMA	/;"	d
TEGRA186_RESET_AON_GPIO	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GPIO	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GPIO	/;"	d
TEGRA186_RESET_AON_GTE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_GTE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_GTE	/;"	d
TEGRA186_RESET_AON_HSP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_HSP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_HSP	/;"	d
TEGRA186_RESET_AON_NIC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NIC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NIC	/;"	d
TEGRA186_RESET_AON_NRESET	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NRESET	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NRESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_NSYSPORESET	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_NSYSPORESET	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_PRESETDBGN	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_PRESETDBGN	/;"	d
TEGRA186_RESET_AON_TKE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AON_TKE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AON_TKE	/;"	d
TEGRA186_RESET_AOPM	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOPM	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOPM	/;"	d
TEGRA186_RESET_AOVC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_AOVC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AOVC	/;"	d
TEGRA186_RESET_APE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_APE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_APE	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AUD_MCLK	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AUD_MCLK	/;"	d
TEGRA186_RESET_AXI_CBB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_AXI_CBB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_AXI_CBB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_APB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_APB	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_CVC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_CVC	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DBGRESETN	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DBGRESETN	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_DMA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_DMA	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_GTE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_GTE	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_HSP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_HSP	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NIC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NIC	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NRESET	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NRESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_NSYSPORESET	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_NSYSPORESET	/;"	d
TEGRA186_RESET_BPMP_PM	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PM_ACTMON	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PM_ACTMON	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_PRESETDBGN	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_PRESETDBGN	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_BPMP_TKE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_BPMP_TKE	/;"	d
TEGRA186_RESET_CAN1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN1	/;"	d
TEGRA186_RESET_CAN2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CAN2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CAN2	/;"	d
TEGRA186_RESET_CEC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CEC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CEC	/;"	d
TEGRA186_RESET_CSITE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_CSITE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_CSITE	/;"	d
TEGRA186_RESET_DMIC5	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DMIC5	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DMIC5	/;"	d
TEGRA186_RESET_DP2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DP2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DP2	/;"	d
TEGRA186_RESET_DPAUX	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX	/;"	d
TEGRA186_RESET_DPAUX1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DPAUX1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DPAUX1	/;"	d
TEGRA186_RESET_DSI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSI	/;"	d
TEGRA186_RESET_DSIB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIB	/;"	d
TEGRA186_RESET_DSIC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSIC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIC	/;"	d
TEGRA186_RESET_DSID	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSID	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSID	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DSIPADCTL	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DSIPADCTL	/;"	d
TEGRA186_RESET_DTV	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DTV	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DTV	/;"	d
TEGRA186_RESET_DVFS	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_DVFS	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_DVFS	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_EMC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_EMC	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMCSB_MEM	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMCSB_MEM	/;"	d
TEGRA186_RESET_EMC_EMC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_EMC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_EMC	/;"	d
TEGRA186_RESET_EMC_MEM	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_EMC_MEM	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EMC_MEM	/;"	d
TEGRA186_RESET_ENTROPY	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_ENTROPY	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ENTROPY	/;"	d
TEGRA186_RESET_EQOS	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EQOS	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EQOS	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH1	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH2	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH3	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_EXTPERIPH4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_EXTPERIPH4	/;"	d
TEGRA186_RESET_GPCDMA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPCDMA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPCDMA	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL0	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL0	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL1	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL2	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL3	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL4	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPIO_CTL5	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPIO_CTL5	/;"	d
TEGRA186_RESET_GPU	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_GPU	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_GPU	/;"	d
TEGRA186_RESET_HDA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2CODEC_2X	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2CODEC_2X	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HDA2HDMICODEC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HDA2HDMICODEC	/;"	d
TEGRA186_RESET_HOST1X	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_HOST1X	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_HOST1X	/;"	d
TEGRA186_RESET_I2C1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C1	/;"	d
TEGRA186_RESET_I2C10	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C10	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C10	/;"	d
TEGRA186_RESET_I2C12	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C12	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C12	/;"	d
TEGRA186_RESET_I2C13	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C13	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C13	/;"	d
TEGRA186_RESET_I2C14	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C14	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C14	/;"	d
TEGRA186_RESET_I2C2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C2	/;"	d
TEGRA186_RESET_I2C3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C3	/;"	d
TEGRA186_RESET_I2C4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C4	/;"	d
TEGRA186_RESET_I2C5	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C5	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C5	/;"	d
TEGRA186_RESET_I2C6	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C6	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C6	/;"	d
TEGRA186_RESET_I2C7	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C7	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C7	/;"	d
TEGRA186_RESET_I2C8	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C8	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C8	/;"	d
TEGRA186_RESET_I2C9	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_I2C9	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_I2C9	/;"	d
TEGRA186_RESET_ISP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_ISP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_ISP	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_JTAG2AXI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_JTAG2AXI	/;"	d
TEGRA186_RESET_KFUSE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_KFUSE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_KFUSE	/;"	d
TEGRA186_RESET_LA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_LA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_LA	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MIPI_CAL	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MIPI_CAL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_CLK_CTL	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_CLK_CTL	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_IOBIST	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_IOBIST	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_RX	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_RX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L0_TX	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L0_TX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_RX	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_RX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_MPHY_L1_TX	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_MPHY_L1_TX	/;"	d
TEGRA186_RESET_NVCSI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVCSI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVCSI	/;"	d
TEGRA186_RESET_NVDEC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDEC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDEC	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD0	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD0	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD1	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_HEAD2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_HEAD2	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_MISC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_MISC	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP0	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP0	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP1	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP2	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP3	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP4	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVDISPLAY0_WGRP5	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVDISPLAY0_WGRP5	/;"	d
TEGRA186_RESET_NVENC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVENC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVENC	/;"	d
TEGRA186_RESET_NVJPG	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_NVJPG	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_NVJPG	/;"	d
TEGRA186_RESET_PCIE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIE	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PCIEXCLK	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PCIEXCLK	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L0	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L2	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L3	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L4	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_L5	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_L5	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL0	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL0	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PEX_USB_UPHY_PLL1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PEX_USB_UPHY_PLL1	/;"	d
TEGRA186_RESET_PWM1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM1	/;"	d
TEGRA186_RESET_PWM2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM2	/;"	d
TEGRA186_RESET_PWM3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM3	/;"	d
TEGRA186_RESET_PWM4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM4	/;"	d
TEGRA186_RESET_PWM5	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM5	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM5	/;"	d
TEGRA186_RESET_PWM6	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM6	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM6	/;"	d
TEGRA186_RESET_PWM7	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM7	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM7	/;"	d
TEGRA186_RESET_PWM8	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_PWM8	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_PWM8	/;"	d
TEGRA186_RESET_QSPI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_QSPI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_QSPI	/;"	d
TEGRA186_RESET_SATA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATA	/;"	d
TEGRA186_RESET_SATACOLD	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SATACOLD	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SATACOLD	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_ACTMON	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_ACTMON	/;"	d
TEGRA186_RESET_SCE_APB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_APB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_APB	/;"	d
TEGRA186_RESET_SCE_CFG	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_CFG	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_CFG	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DBGRESETN	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DBGRESETN	/;"	d
TEGRA186_RESET_SCE_DMA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_DMA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_DMA	/;"	d
TEGRA186_RESET_SCE_GTE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_GTE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_GTE	/;"	d
TEGRA186_RESET_SCE_HSP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_HSP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_HSP	/;"	d
TEGRA186_RESET_SCE_NIC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NIC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NIC	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NRESET	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NRESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_NSYSPORESET	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_NSYSPORESET	/;"	d
TEGRA186_RESET_SCE_PM	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PM	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PM	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_PRESETDBGN	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_PRESETDBGN	/;"	d
TEGRA186_RESET_SCE_TKE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SCE_TKE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SCE_TKE	/;"	d
TEGRA186_RESET_SDMMC1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC1	/;"	d
TEGRA186_RESET_SDMMC2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC2	/;"	d
TEGRA186_RESET_SDMMC3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC3	/;"	d
TEGRA186_RESET_SDMMC4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SDMMC4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SDMMC4	/;"	d
TEGRA186_RESET_SE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SE	/;"	d
TEGRA186_RESET_SHSP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SHSP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SHSP	/;"	d
TEGRA186_RESET_SIZE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SIZE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SIZE	/;"	d
TEGRA186_RESET_SOC_THERM	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOC_THERM	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOC_THERM	/;"	d
TEGRA186_RESET_SOR0	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR0	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR0	/;"	d
TEGRA186_RESET_SOR1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SOR1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SOR1	/;"	d
TEGRA186_RESET_SPI1	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI1	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI1	/;"	d
TEGRA186_RESET_SPI2	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI2	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI2	/;"	d
TEGRA186_RESET_SPI3	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI3	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI3	/;"	d
TEGRA186_RESET_SPI4	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_SPI4	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_SPI4	/;"	d
TEGRA186_RESET_TACH	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TACH	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TACH	/;"	d
TEGRA186_RESET_TMR	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TMR	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TMR	/;"	d
TEGRA186_RESET_TOP_GTE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TOP_GTE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TOP_GTE	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TRIG_SYS	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TRIG_SYS	/;"	d
TEGRA186_RESET_TSC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSC	/;"	d
TEGRA186_RESET_TSCTNAON	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNAON	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNAON	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNBPMP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNBPMP	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNSCE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNSCE	/;"	d
TEGRA186_RESET_TSCTNVI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSCTNVI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSCTNVI	/;"	d
TEGRA186_RESET_TSEC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSEC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSEC	/;"	d
TEGRA186_RESET_TSECB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_TSECB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_TSECB	/;"	d
TEGRA186_RESET_UARTA	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTA	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTA	/;"	d
TEGRA186_RESET_UARTB	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTB	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTB	/;"	d
TEGRA186_RESET_UARTC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTC	/;"	d
TEGRA186_RESET_UARTD	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTD	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTD	/;"	d
TEGRA186_RESET_UARTE	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTE	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTE	/;"	d
TEGRA186_RESET_UARTF	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTF	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTF	/;"	d
TEGRA186_RESET_UARTG	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UARTG	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UARTG	/;"	d
TEGRA186_RESET_UFSHC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_AXI_M	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_AXI_M	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UFSHC_LP_SEQ	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UFSHC_LP_SEQ	/;"	d
TEGRA186_RESET_UPHY	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_UPHY	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_UPHY	/;"	d
TEGRA186_RESET_VI	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VI	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI	/;"	d
TEGRA186_RESET_VIC	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VIC	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VIC	/;"	d
TEGRA186_RESET_VI_I2C	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_VI_I2C	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_VI_I2C	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_DEV	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_DEV	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_HOST	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_HOST	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_PADCTL	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_PADCTL	/;"	d
TEGRA186_RESET_XUSB_SS	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA186_RESET_XUSB_SS	include/dt-bindings/reset/tegra186-reset.h	/^#define TEGRA186_RESET_XUSB_SS	/;"	d
TEGRA20	arch/arm/mach-tegra/Kconfig	/^config TEGRA20$/;"	c	choice:choice3cc3c0ca0104
TEGRA20_CLK_AC97	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AC97	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AC97 /;"	d
TEGRA20_CLK_AFI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AFI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AFI /;"	d
TEGRA20_CLK_AHBDMA	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_AHBDMA	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AHBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_APBDMA	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_APBDMA /;"	d
TEGRA20_CLK_AUDIO	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO /;"	d
TEGRA20_CLK_AUDIO_2X	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AUDIO_2X	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AUDIO_2X /;"	d
TEGRA20_CLK_AVPUCQ	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_AVPUCQ	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_AVPUCQ /;"	d
TEGRA20_CLK_BLINK	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BLINK	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BLINK /;"	d
TEGRA20_CLK_BSEA	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEA	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEA /;"	d
TEGRA20_CLK_BSEV	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_BSEV	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_BSEV /;"	d
TEGRA20_CLK_CACHE2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CACHE2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CACHE2 /;"	d
TEGRA20_CLK_CCLK	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CCLK	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CCLK /;"	d
TEGRA20_CLK_CDEV1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV1 /;"	d
TEGRA20_CLK_CDEV2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CDEV2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CDEV2 /;"	d
TEGRA20_CLK_CLK_32K	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_32K	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_32K /;"	d
TEGRA20_CLK_CLK_D	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_D	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_D /;"	d
TEGRA20_CLK_CLK_M	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_M	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_M /;"	d
TEGRA20_CLK_CLK_MAX	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_CLK_MAX	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CLK_MAX /;"	d
TEGRA20_CLK_COP	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_COP	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_COP /;"	d
TEGRA20_CLK_CPU	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CPU	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CPU /;"	d
TEGRA20_CLK_CRAM2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CRAM2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CRAM2 /;"	d
TEGRA20_CLK_CSI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSI /;"	d
TEGRA20_CLK_CSITE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSITE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSITE /;"	d
TEGRA20_CLK_CSUS	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CSUS	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CSUS /;"	d
TEGRA20_CLK_CVE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_CVE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_CVE /;"	d
TEGRA20_CLK_DISP1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP1 /;"	d
TEGRA20_CLK_DISP2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DISP2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DISP2 /;"	d
TEGRA20_CLK_DSI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DSI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DSI /;"	d
TEGRA20_CLK_DVC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_DVC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_DVC /;"	d
TEGRA20_CLK_EMC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EMC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EMC /;"	d
TEGRA20_CLK_EPP	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_EPP	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_EPP /;"	d
TEGRA20_CLK_FUSE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_FUSE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_FUSE /;"	d
TEGRA20_CLK_GPIO	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GPIO	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GPIO /;"	d
TEGRA20_CLK_GR2D	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR2D	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR2D /;"	d
TEGRA20_CLK_GR3D	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_GR3D	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_GR3D /;"	d
TEGRA20_CLK_HCLK	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HCLK	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HCLK /;"	d
TEGRA20_CLK_HDMI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HDMI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HDMI /;"	d
TEGRA20_CLK_HOST1X	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_HOST1X	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_HOST1X /;"	d
TEGRA20_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C1 /;"	d
TEGRA20_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C2 /;"	d
TEGRA20_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2C3	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2C3 /;"	d
TEGRA20_CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S1 /;"	d
TEGRA20_CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_I2S2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_I2S2 /;"	d
TEGRA20_CLK_IDE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IDE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IDE /;"	d
TEGRA20_CLK_IRAMA	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMA	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMA /;"	d
TEGRA20_CLK_IRAMB	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMB	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMB /;"	d
TEGRA20_CLK_IRAMC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMC /;"	d
TEGRA20_CLK_IRAMD	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_IRAMD	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_IRAMD /;"	d
TEGRA20_CLK_ISP	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_ISP	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_ISP /;"	d
TEGRA20_CLK_KBC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KBC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KBC /;"	d
TEGRA20_CLK_KFUSE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_KFUSE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_KFUSE /;"	d
TEGRA20_CLK_LA	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_LA	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_LA /;"	d
TEGRA20_CLK_MC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MC /;"	d
TEGRA20_CLK_MIPI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MIPI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MIPI /;"	d
TEGRA20_CLK_MPE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_MPE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_MPE /;"	d
TEGRA20_CLK_NDFLASH	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NDFLASH	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NDFLASH /;"	d
TEGRA20_CLK_NOR	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_NOR	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_NOR /;"	d
TEGRA20_CLK_OSC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OSC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OSC /;"	d
TEGRA20_CLK_OWR	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_OWR	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_OWR /;"	d
TEGRA20_CLK_PCLK	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PCLK	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PCLK /;"	d
TEGRA20_CLK_PEX	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PEX	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PEX /;"	d
TEGRA20_CLK_PLL_A	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_A_OUT0	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_A_OUT0 /;"	d
TEGRA20_CLK_PLL_C	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_C_OUT1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_C_OUT1 /;"	d
TEGRA20_CLK_PLL_D	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_D_OUT0	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_D_OUT0 /;"	d
TEGRA20_CLK_PLL_E	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_E	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_E /;"	d
TEGRA20_CLK_PLL_M	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_M_OUT1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_M_OUT1 /;"	d
TEGRA20_CLK_PLL_P	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT1 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT2 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT3	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT3 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_P_OUT4	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_P_OUT4 /;"	d
TEGRA20_CLK_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_REF	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_REF /;"	d
TEGRA20_CLK_PLL_S	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_S	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_S /;"	d
TEGRA20_CLK_PLL_U	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_U	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_U /;"	d
TEGRA20_CLK_PLL_X	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PLL_X	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PLL_X /;"	d
TEGRA20_CLK_PMC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PMC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PMC /;"	d
TEGRA20_CLK_PWM	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_PWM	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_PWM /;"	d
TEGRA20_CLK_RTC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_RTC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_RTC /;"	d
TEGRA20_CLK_SBC1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC1 /;"	d
TEGRA20_CLK_SBC2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC2 /;"	d
TEGRA20_CLK_SBC3	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC3	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC3 /;"	d
TEGRA20_CLK_SBC4	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SBC4	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SBC4 /;"	d
TEGRA20_CLK_SCLK	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SCLK	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SCLK /;"	d
TEGRA20_CLK_SDMMC1	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC1	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC1 /;"	d
TEGRA20_CLK_SDMMC2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC2 /;"	d
TEGRA20_CLK_SDMMC3	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC3	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC3 /;"	d
TEGRA20_CLK_SDMMC4	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SDMMC4	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SDMMC4 /;"	d
TEGRA20_CLK_SPDIF_IN	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_IN	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_IN /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPDIF_OUT	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPDIF_OUT /;"	d
TEGRA20_CLK_SPEEDO	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPEEDO	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPEEDO /;"	d
TEGRA20_CLK_SPI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_SPI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_SPI /;"	d
TEGRA20_CLK_STAT_MON	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_STAT_MON	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_STAT_MON /;"	d
TEGRA20_CLK_TIMER	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TIMER	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TIMER /;"	d
TEGRA20_CLK_TVDAC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVDAC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVDAC /;"	d
TEGRA20_CLK_TVO	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TVO	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TVO /;"	d
TEGRA20_CLK_TWC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWC /;"	d
TEGRA20_CLK_TWD	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_TWD	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_TWD /;"	d
TEGRA20_CLK_UARTA	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTA	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTA /;"	d
TEGRA20_CLK_UARTB	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTB	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTB /;"	d
TEGRA20_CLK_UARTC	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTC	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTC /;"	d
TEGRA20_CLK_UARTD	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTD	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTD /;"	d
TEGRA20_CLK_UARTE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_UARTE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_UARTE /;"	d
TEGRA20_CLK_USB2	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB2	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB2 /;"	d
TEGRA20_CLK_USB3	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USB3	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USB3 /;"	d
TEGRA20_CLK_USBD	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_USBD	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_USBD /;"	d
TEGRA20_CLK_VCP	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VCP	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VCP /;"	d
TEGRA20_CLK_VDE	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VDE	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VDE /;"	d
TEGRA20_CLK_VFIR	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VFIR	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VFIR /;"	d
TEGRA20_CLK_VI	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI /;"	d
TEGRA20_CLK_VI_SENSOR	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_VI_SENSOR	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_VI_SENSOR /;"	d
TEGRA20_CLK_XIO	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_CLK_XIO	include/dt-bindings/clock/tegra20-car.h	/^#define TEGRA20_CLK_XIO /;"	d
TEGRA20_PCIE	drivers/pci/pci_tegra.c	/^	TEGRA20_PCIE,$/;"	e	enum:tegra_pci_id	file:
TEGRA20_SFLASH	drivers/spi/Kconfig	/^config TEGRA20_SFLASH$/;"	c	menu:SPI Support
TEGRA20_SLINK	drivers/spi/Kconfig	/^config TEGRA20_SLINK$/;"	c	menu:SPI Support
TEGRA210	arch/arm/mach-tegra/Kconfig	/^config TEGRA210$/;"	c	choice:choice3cc3c0ca0104
TEGRA210_CLK_ACTMON	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_ACTMON	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ACTMON /;"	d
TEGRA210_CLK_AFI	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AFI	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AFI /;"	d
TEGRA210_CLK_AHBDMA	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_AHBDMA	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AHBDMA /;"	d
TEGRA210_CLK_APB2APE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APB2APE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APB2APE /;"	d
TEGRA210_CLK_APBDMA	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APBDMA	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APBDMA /;"	d
TEGRA210_CLK_APE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_APE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_APE /;"	d
TEGRA210_CLK_AUDIO0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0 /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO0_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO0_MUX /;"	d
TEGRA210_CLK_AUDIO1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1 /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO1_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO1_MUX /;"	d
TEGRA210_CLK_AUDIO2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2 /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO2_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO2_MUX /;"	d
TEGRA210_CLK_AUDIO3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3 /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO3_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO3_MUX /;"	d
TEGRA210_CLK_AUDIO4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4 /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_AUDIO4_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_AUDIO4_MUX /;"	d
TEGRA210_CLK_BLINK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BLINK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BLINK /;"	d
TEGRA210_CLK_BSEV	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_BSEV	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_BSEV /;"	d
TEGRA210_CLK_CCLK_G	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_G	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_G /;"	d
TEGRA210_CLK_CCLK_LP	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CCLK_LP	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CCLK_LP /;"	d
TEGRA210_CLK_CILAB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILAB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILAB /;"	d
TEGRA210_CLK_CILCD	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILCD	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILCD /;"	d
TEGRA210_CLK_CILE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CILE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CILE /;"	d
TEGRA210_CLK_CLK72MHZ	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK72MHZ	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK72MHZ /;"	d
TEGRA210_CLK_CLK_32K	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_32K	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_32K /;"	d
TEGRA210_CLK_CLK_M	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_M	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M /;"	d
TEGRA210_CLK_CLK_MAX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_MAX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_MAX /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV2 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_M_DIV4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_M_DIV4 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1 /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_1_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_1_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2 /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_2_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_2_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3 /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CLK_OUT_3_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CLK_OUT_3_MUX /;"	d
TEGRA210_CLK_CML0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML0 /;"	d
TEGRA210_CLK_CML1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CML1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CML1 /;"	d
TEGRA210_CLK_CSI	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSI	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSI /;"	d
TEGRA210_CLK_CSITE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSITE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSITE /;"	d
TEGRA210_CLK_CSUS	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_CSUS	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_CSUS /;"	d
TEGRA210_CLK_DBGAPB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DBGAPB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DBGAPB /;"	d
TEGRA210_CLK_DFLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_REF	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_REF /;"	d
TEGRA210_CLK_DFLL_SOC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DFLL_SOC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DFLL_SOC /;"	d
TEGRA210_CLK_DISP1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP1 /;"	d
TEGRA210_CLK_DISP2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DISP2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DISP2 /;"	d
TEGRA210_CLK_DMIC1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC1 /;"	d
TEGRA210_CLK_DMIC2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC2 /;"	d
TEGRA210_CLK_DMIC3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DMIC3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DMIC3 /;"	d
TEGRA210_CLK_DPAUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX /;"	d
TEGRA210_CLK_DPAUX1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DPAUX1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DPAUX1 /;"	d
TEGRA210_CLK_DSIA	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIA	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA /;"	d
TEGRA210_CLK_DSIALP	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIALP	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIALP /;"	d
TEGRA210_CLK_DSIA_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIA_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIA_MUX /;"	d
TEGRA210_CLK_DSIB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB /;"	d
TEGRA210_CLK_DSIBLP	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIBLP	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIBLP /;"	d
TEGRA210_CLK_DSIB_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DSIB_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DSIB_MUX /;"	d
TEGRA210_CLK_DTV	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_DTV	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_DTV /;"	d
TEGRA210_CLK_D_AUDIO	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_D_AUDIO	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_D_AUDIO /;"	d
TEGRA210_CLK_EMC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_EMC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EMC /;"	d
TEGRA210_CLK_ENTROPY	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_ENTROPY	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ENTROPY /;"	d
TEGRA210_CLK_EXTERN1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN1 /;"	d
TEGRA210_CLK_EXTERN2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN2 /;"	d
TEGRA210_CLK_EXTERN3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_EXTERN3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_EXTERN3 /;"	d
TEGRA210_CLK_FUSE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE /;"	d
TEGRA210_CLK_FUSE_BURN	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_FUSE_BURN	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_FUSE_BURN /;"	d
TEGRA210_CLK_GPIO	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPIO	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPIO /;"	d
TEGRA210_CLK_GPU	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_GPU	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_GPU /;"	d
TEGRA210_CLK_HCLK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HCLK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HCLK /;"	d
TEGRA210_CLK_HDA	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2CODEC_2X	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2CODEC_2X /;"	d
TEGRA210_CLK_HDA2HDMI	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HDA2HDMI	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HDA2HDMI /;"	d
TEGRA210_CLK_HOST1X	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HOST1X	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HOST1X /;"	d
TEGRA210_CLK_HSIC_TRK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_HSIC_TRK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_HSIC_TRK /;"	d
TEGRA210_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C1 /;"	d
TEGRA210_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C2 /;"	d
TEGRA210_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C3 /;"	d
TEGRA210_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C4 /;"	d
TEGRA210_CLK_I2C5	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C5	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C5 /;"	d
TEGRA210_CLK_I2C6	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2C6	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2C6 /;"	d
TEGRA210_CLK_I2CSLOW	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2CSLOW	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2CSLOW /;"	d
TEGRA210_CLK_I2S0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0 /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S0_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S0_SYNC /;"	d
TEGRA210_CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1 /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S1_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S1_SYNC /;"	d
TEGRA210_CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2 /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S2_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S2_SYNC /;"	d
TEGRA210_CLK_I2S3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3 /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S3_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S3_SYNC /;"	d
TEGRA210_CLK_I2S4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4 /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_I2S4_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_I2S4_SYNC /;"	d
TEGRA210_CLK_ISP	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISP	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISP /;"	d
TEGRA210_CLK_ISPB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_ISPB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_ISPB /;"	d
TEGRA210_CLK_KFUSE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_KFUSE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_KFUSE /;"	d
TEGRA210_CLK_MAUD	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MAUD	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MAUD /;"	d
TEGRA210_CLK_MC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MC /;"	d
TEGRA210_CLK_MIPIBIF	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPIBIF	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPIBIF /;"	d
TEGRA210_CLK_MIPI_CAL	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MIPI_CAL	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MIPI_CAL /;"	d
TEGRA210_CLK_MSELECT	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_MSELECT	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_MSELECT /;"	d
TEGRA210_CLK_NVDEC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVDEC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVDEC /;"	d
TEGRA210_CLK_NVENC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVENC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVENC /;"	d
TEGRA210_CLK_NVJPG	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_NVJPG	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_NVJPG /;"	d
TEGRA210_CLK_OWR	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_OWR	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_OWR /;"	d
TEGRA210_CLK_PCIE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCIE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCIE /;"	d
TEGRA210_CLK_PCLK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PCLK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PCLK /;"	d
TEGRA210_CLK_PLL_A	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A /;"	d
TEGRA210_CLK_PLL_A1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A1 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_A_OUT0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_A_OUT0 /;"	d
TEGRA210_CLK_PLL_C	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C /;"	d
TEGRA210_CLK_PLL_C2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C2 /;"	d
TEGRA210_CLK_PLL_C3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C3 /;"	d
TEGRA210_CLK_PLL_C4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT0 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT1 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT2 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C4_OUT3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C4_OUT3 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_OUT1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_OUT1 /;"	d
TEGRA210_CLK_PLL_C_UD	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_C_UD	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_C_UD /;"	d
TEGRA210_CLK_PLL_D	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D /;"	d
TEGRA210_CLK_PLL_D2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_D2_OUT0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D2_OUT0 /;"	d
TEGRA210_CLK_PLL_DP	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_DP	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_DP /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_DSI_OUT	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_DSI_OUT /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_D_OUT0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_D_OUT0 /;"	d
TEGRA210_CLK_PLL_E	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_E_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_E_MUX /;"	d
TEGRA210_CLK_PLL_G_REF	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_G_REF	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_G_REF /;"	d
TEGRA210_CLK_PLL_M	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_M	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M /;"	d
TEGRA210_CLK_PLL_MB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_MB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_MB /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_OUT1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_OUT1 /;"	d
TEGRA210_CLK_PLL_M_UD	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_M_UD	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_M_UD /;"	d
TEGRA210_CLK_PLL_P	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT1 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT2 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT3 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT4 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT5	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT5 /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_ADSP	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_ADSP /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_CPU	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_CPU /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_HSIO	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_HSIO /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_P_OUT_XUSB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_P_OUT_XUSB /;"	d
TEGRA210_CLK_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_REF	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_REF /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_OUT1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_OUT1 /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_RE_VCO	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_RE_VCO /;"	d
TEGRA210_CLK_PLL_U	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U /;"	d
TEGRA210_CLK_PLL_U_480M	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_480M	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_480M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_48M	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_48M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_60M	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_60M /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT1 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_U_OUT2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_U_OUT2 /;"	d
TEGRA210_CLK_PLL_X	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PLL_X_OUT0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PLL_X_OUT0 /;"	d
TEGRA210_CLK_PMC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PMC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PMC /;"	d
TEGRA210_CLK_PWM	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_PWM	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_PWM /;"	d
TEGRA210_CLK_QSPI	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_QSPI	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_QSPI /;"	d
TEGRA210_CLK_RTC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_RTC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_RTC /;"	d
TEGRA210_CLK_SATA	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA /;"	d
TEGRA210_CLK_SATA_OOB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SATA_OOB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SATA_OOB /;"	d
TEGRA210_CLK_SBC1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC1 /;"	d
TEGRA210_CLK_SBC2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC2 /;"	d
TEGRA210_CLK_SBC3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC3 /;"	d
TEGRA210_CLK_SBC4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SBC4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SBC4 /;"	d
TEGRA210_CLK_SCLK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK /;"	d
TEGRA210_CLK_SCLK_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SCLK_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SCLK_MUX /;"	d
TEGRA210_CLK_SDMMC1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC1 /;"	d
TEGRA210_CLK_SDMMC2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC2 /;"	d
TEGRA210_CLK_SDMMC3	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC3	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC3 /;"	d
TEGRA210_CLK_SDMMC4	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC4	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC4 /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SDMMC_LEGACY	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SDMMC_LEGACY /;"	d
TEGRA210_CLK_SOC_THERM	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOC_THERM	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOC_THERM /;"	d
TEGRA210_CLK_SOR0	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0 /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR0_LVDS	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR0_LVDS /;"	d
TEGRA210_CLK_SOR1	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR1	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR1 /;"	d
TEGRA210_CLK_SOR_SAFE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SOR_SAFE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SOR_SAFE /;"	d
TEGRA210_CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF /;"	d
TEGRA210_CLK_SPDIF_2X	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_2X	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_2X /;"	d
TEGRA210_CLK_SPDIF_IN	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_IN_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_IN_SYNC /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_MUX	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_MUX /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_SPDIF_OUT	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_SPDIF_OUT /;"	d
TEGRA210_CLK_TIMER	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TIMER	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TIMER /;"	d
TEGRA210_CLK_TSEC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSEC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSEC /;"	d
TEGRA210_CLK_TSECB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSECB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSECB /;"	d
TEGRA210_CLK_TSENSOR	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_TSENSOR	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_TSENSOR /;"	d
TEGRA210_CLK_UARTA	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTA	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTA /;"	d
TEGRA210_CLK_UARTAPE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTAPE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTAPE /;"	d
TEGRA210_CLK_UARTB	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTB	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTB /;"	d
TEGRA210_CLK_UARTC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTC /;"	d
TEGRA210_CLK_UARTD	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_UARTD	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_UARTD /;"	d
TEGRA210_CLK_USB2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2 /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_HSIC_TRK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_HSIC_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USB2_TRK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USB2_TRK /;"	d
TEGRA210_CLK_USBD	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_USBD	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_USBD /;"	d
TEGRA210_CLK_VFIR	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VFIR	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VFIR /;"	d
TEGRA210_CLK_VI	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VI	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI /;"	d
TEGRA210_CLK_VIC03	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIC03	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIC03 /;"	d
TEGRA210_CLK_VIM2_CLK	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIM2_CLK	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIM2_CLK /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VIMCLK_SYNC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VIMCLK_SYNC /;"	d
TEGRA210_CLK_VI_I2C	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_I2C	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_I2C /;"	d
TEGRA210_CLK_VI_SENSOR	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_VI_SENSOR2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_VI_SENSOR2 /;"	d
TEGRA210_CLK_XUSB_DEV	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_DEV_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_DEV_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FALCON_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FALCON_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_FS_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_FS_SRC /;"	d
TEGRA210_CLK_XUSB_GATE	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_GATE	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_GATE /;"	d
TEGRA210_CLK_XUSB_HOST	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HOST_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HOST_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_HS_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_HS_SRC /;"	d
TEGRA210_CLK_XUSB_SS	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SS	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SSP_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SSP_SRC /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_DIV2	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_DIV2 /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_CLK_XUSB_SS_SRC	include/dt-bindings/clock/tegra210-car.h	/^#define TEGRA210_CLK_XUSB_SS_SRC /;"	d
TEGRA210_FUNC_PCIE_X1	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_PCIE_X1,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_PCIE_X4	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_PCIE_X4,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_RSVD	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_RSVD,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_SATA	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_SATA,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_SNPS	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_SNPS,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_UART	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_UART,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_USB3	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_USB3,$/;"	e	enum:tegra210_function	file:
TEGRA210_FUNC_XUSB	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^	TEGRA210_FUNC_XUSB,$/;"	e	enum:tegra210_function	file:
TEGRA210_LANE	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define TEGRA210_LANE(/;"	d	file:
TEGRA210_PCIE	drivers/pci/pci_tegra.c	/^	TEGRA210_PCIE,$/;"	e	enum:tegra_pci_id	file:
TEGRA210_QSPI	drivers/spi/Kconfig	/^config TEGRA210_QSPI$/;"	c	menu:SPI Support
TEGRA30	arch/arm/mach-tegra/Kconfig	/^config TEGRA30$/;"	c	choice:choice3cc3c0ca0104
TEGRA30_CLK_ACTMON	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_ACTMON	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ACTMON /;"	d
TEGRA30_CLK_AFI	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AFI	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AFI /;"	d
TEGRA30_CLK_AHBDMA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_AHBDMA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AHBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBDMA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBDMA /;"	d
TEGRA30_CLK_APBIF	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_APBIF	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_APBIF /;"	d
TEGRA30_CLK_ATOMICS	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_ATOMICS	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ATOMICS /;"	d
TEGRA30_CLK_AUDIO0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0 /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_2X /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO0_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO0_MUX /;"	d
TEGRA30_CLK_AUDIO1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1 /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_2X /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO1_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO1_MUX /;"	d
TEGRA30_CLK_AUDIO2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2 /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_2X /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO2_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO2_MUX /;"	d
TEGRA30_CLK_AUDIO3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3 /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_2X /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO3_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO3_MUX /;"	d
TEGRA30_CLK_AUDIO4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4 /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_2X /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO4_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO4_MUX /;"	d
TEGRA30_CLK_AUDIO_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AUDIO_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AUDIO_2X /;"	d
TEGRA30_CLK_AVPUCQ	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_AVPUCQ	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_AVPUCQ /;"	d
TEGRA30_CLK_BLINK	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BLINK	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BLINK /;"	d
TEGRA30_CLK_BSEA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEA /;"	d
TEGRA30_CLK_BSEV	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_BSEV	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_BSEV /;"	d
TEGRA30_CLK_CCLK_G	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_G	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_G /;"	d
TEGRA30_CLK_CCLK_LP	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CCLK_LP	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CCLK_LP /;"	d
TEGRA30_CLK_CDEV1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV1 /;"	d
TEGRA30_CLK_CDEV2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CDEV2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CDEV2 /;"	d
TEGRA30_CLK_CLK_32K	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_32K	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_32K /;"	d
TEGRA30_CLK_CLK_M	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_M	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M /;"	d
TEGRA30_CLK_CLK_MAX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_MAX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_MAX /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV2 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_M_DIV4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_M_DIV4 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1 /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_1_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_1_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2 /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_2_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_2_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3 /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CLK_OUT_3_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CLK_OUT_3_MUX /;"	d
TEGRA30_CLK_CML0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML0 /;"	d
TEGRA30_CLK_CML1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_CML1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CML1 /;"	d
TEGRA30_CLK_COP_CACHE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_COP_CACHE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_COP_CACHE /;"	d
TEGRA30_CLK_CPU	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU /;"	d
TEGRA30_CLK_CPU_G	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_G	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_G /;"	d
TEGRA30_CLK_CPU_LP	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CPU_LP	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CPU_LP /;"	d
TEGRA30_CLK_CRAM2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CRAM2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CRAM2 /;"	d
TEGRA30_CLK_CSI	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSI	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSI /;"	d
TEGRA30_CLK_CSITE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSITE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSITE /;"	d
TEGRA30_CLK_CSUS	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CSUS	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CSUS /;"	d
TEGRA30_CLK_CVE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_CVE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_CVE /;"	d
TEGRA30_CLK_DAM0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM0 /;"	d
TEGRA30_CLK_DAM1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM1 /;"	d
TEGRA30_CLK_DAM2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DAM2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DAM2 /;"	d
TEGRA30_CLK_DISP1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP1 /;"	d
TEGRA30_CLK_DISP2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DISP2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DISP2 /;"	d
TEGRA30_CLK_DSIA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIA /;"	d
TEGRA30_CLK_DSIB	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DSIB	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DSIB /;"	d
TEGRA30_CLK_DTV	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_DTV	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_DTV /;"	d
TEGRA30_CLK_D_AUDIO	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_D_AUDIO	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_D_AUDIO /;"	d
TEGRA30_CLK_EMC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EMC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EMC /;"	d
TEGRA30_CLK_EPP	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EPP	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EPP /;"	d
TEGRA30_CLK_EXTERN1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN1 /;"	d
TEGRA30_CLK_EXTERN2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN2 /;"	d
TEGRA30_CLK_EXTERN3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_EXTERN3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_EXTERN3 /;"	d
TEGRA30_CLK_FUSE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE /;"	d
TEGRA30_CLK_FUSE_BURN	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_FUSE_BURN	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_FUSE_BURN /;"	d
TEGRA30_CLK_GPIO	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GPIO	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GPIO /;"	d
TEGRA30_CLK_GR2D	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR2D	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR2D /;"	d
TEGRA30_CLK_GR3D	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D /;"	d
TEGRA30_CLK_GR3D2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_GR3D2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_GR3D2 /;"	d
TEGRA30_CLK_HCLK	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HCLK	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HCLK /;"	d
TEGRA30_CLK_HDA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2CODEC_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2CODEC_2X /;"	d
TEGRA30_CLK_HDA2HDMI	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDA2HDMI	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDA2HDMI /;"	d
TEGRA30_CLK_HDMI	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HDMI	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HDMI /;"	d
TEGRA30_CLK_HOST1X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_HOST1X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_HOST1X /;"	d
TEGRA30_CLK_I2C1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C1 /;"	d
TEGRA30_CLK_I2C2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C2 /;"	d
TEGRA30_CLK_I2C3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C3 /;"	d
TEGRA30_CLK_I2C4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C4 /;"	d
TEGRA30_CLK_I2C5	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2C5	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2C5 /;"	d
TEGRA30_CLK_I2CSLOW	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2CSLOW	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2CSLOW /;"	d
TEGRA30_CLK_I2S0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0 /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S0_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S0_SYNC /;"	d
TEGRA30_CLK_I2S1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1 /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S1_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S1_SYNC /;"	d
TEGRA30_CLK_I2S2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2 /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S2_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S2_SYNC /;"	d
TEGRA30_CLK_I2S3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3 /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S3_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S3_SYNC /;"	d
TEGRA30_CLK_I2S4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4 /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_I2S4_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_I2S4_SYNC /;"	d
TEGRA30_CLK_IRAMA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMA /;"	d
TEGRA30_CLK_IRAMB	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMB	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMB /;"	d
TEGRA30_CLK_IRAMC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMC /;"	d
TEGRA30_CLK_IRAMD	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_IRAMD	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_IRAMD /;"	d
TEGRA30_CLK_ISP	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_ISP	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_ISP /;"	d
TEGRA30_CLK_KBC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KBC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KBC /;"	d
TEGRA30_CLK_KFUSE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_KFUSE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_KFUSE /;"	d
TEGRA30_CLK_LA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_LA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_LA /;"	d
TEGRA30_CLK_MC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MC /;"	d
TEGRA30_CLK_MIPI	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MIPI	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MIPI /;"	d
TEGRA30_CLK_MPE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MPE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MPE /;"	d
TEGRA30_CLK_MSELECT	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_MSELECT	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_MSELECT /;"	d
TEGRA30_CLK_NDFLASH	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDFLASH	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDFLASH /;"	d
TEGRA30_CLK_NDSPEED	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NDSPEED	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NDSPEED /;"	d
TEGRA30_CLK_NOR	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_NOR	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_NOR /;"	d
TEGRA30_CLK_OWR	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_OWR	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_OWR /;"	d
TEGRA30_CLK_PCIE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCIE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCIE /;"	d
TEGRA30_CLK_PCLK	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PCLK	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PCLK /;"	d
TEGRA30_CLK_PLL_A	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_A_OUT0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_A_OUT0 /;"	d
TEGRA30_CLK_PLL_C	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_C_OUT1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_C_OUT1 /;"	d
TEGRA30_CLK_PLL_D	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D /;"	d
TEGRA30_CLK_PLL_D2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D2_OUT0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D2_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_D_OUT0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_D_OUT0 /;"	d
TEGRA30_CLK_PLL_E	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_E	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_E /;"	d
TEGRA30_CLK_PLL_M	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_M_OUT1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_M_OUT1 /;"	d
TEGRA30_CLK_PLL_P	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT1 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT2 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT3 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_P_OUT4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_P_OUT4 /;"	d
TEGRA30_CLK_PLL_REF	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_REF	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_REF /;"	d
TEGRA30_CLK_PLL_U	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_U	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_U /;"	d
TEGRA30_CLK_PLL_X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PLL_X_OUT0	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PLL_X_OUT0 /;"	d
TEGRA30_CLK_PMC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PMC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PMC /;"	d
TEGRA30_CLK_PWM	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_PWM	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_PWM /;"	d
TEGRA30_CLK_RTC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_RTC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_RTC /;"	d
TEGRA30_CLK_SATA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA /;"	d
TEGRA30_CLK_SATA_COLD	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_COLD	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_COLD /;"	d
TEGRA30_CLK_SATA_OOB	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SATA_OOB	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SATA_OOB /;"	d
TEGRA30_CLK_SBC1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC1 /;"	d
TEGRA30_CLK_SBC2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC2 /;"	d
TEGRA30_CLK_SBC3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC3 /;"	d
TEGRA30_CLK_SBC4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC4 /;"	d
TEGRA30_CLK_SBC5	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC5	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC5 /;"	d
TEGRA30_CLK_SBC6	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SBC6	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SBC6 /;"	d
TEGRA30_CLK_SCLK	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SCLK	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SCLK /;"	d
TEGRA30_CLK_SDMMC1	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC1	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC1 /;"	d
TEGRA30_CLK_SDMMC2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC2 /;"	d
TEGRA30_CLK_SDMMC3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC3 /;"	d
TEGRA30_CLK_SDMMC4	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SDMMC4	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SDMMC4 /;"	d
TEGRA30_CLK_SE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SE /;"	d
TEGRA30_CLK_SPDIF	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF /;"	d
TEGRA30_CLK_SPDIF_2X	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_2X	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_2X /;"	d
TEGRA30_CLK_SPDIF_IN	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_IN_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_IN_SYNC /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_MUX	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_MUX /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPDIF_OUT	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPDIF_OUT /;"	d
TEGRA30_CLK_SPEEDO	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_SPEEDO	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_SPEEDO /;"	d
TEGRA30_CLK_STATMON	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_STATMON	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_STATMON /;"	d
TEGRA30_CLK_TIMER	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TIMER	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TIMER /;"	d
TEGRA30_CLK_TSENSOR	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TSENSOR	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TSENSOR /;"	d
TEGRA30_CLK_TVDAC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVDAC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVDAC /;"	d
TEGRA30_CLK_TVO	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TVO	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TVO /;"	d
TEGRA30_CLK_TWD	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_TWD	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_TWD /;"	d
TEGRA30_CLK_UARTA	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTA	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTA /;"	d
TEGRA30_CLK_UARTB	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTB	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTB /;"	d
TEGRA30_CLK_UARTC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTC /;"	d
TEGRA30_CLK_UARTD	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTD	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTD /;"	d
TEGRA30_CLK_UARTE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_UARTE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_UARTE /;"	d
TEGRA30_CLK_USB2	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB2	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB2 /;"	d
TEGRA30_CLK_USB3	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USB3	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USB3 /;"	d
TEGRA30_CLK_USBD	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_USBD	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_USBD /;"	d
TEGRA30_CLK_VCP	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VCP	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VCP /;"	d
TEGRA30_CLK_VDE	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VDE	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VDE /;"	d
TEGRA30_CLK_VFIR	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VFIR	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VFIR /;"	d
TEGRA30_CLK_VI	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VI	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VIMCLK_SYNC	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VIMCLK_SYNC /;"	d
TEGRA30_CLK_VI_SENSOR	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_CLK_VI_SENSOR	include/dt-bindings/clock/tegra30-car.h	/^#define TEGRA30_CLK_VI_SENSOR /;"	d
TEGRA30_PCIE	drivers/pci/pci_tegra.c	/^	TEGRA30_PCIE,$/;"	e	enum:tegra_pci_id	file:
TEGRA_AON_GPIO	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO(/;"	d
TEGRA_AON_GPIO_PORT_AA	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_AA	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_AA /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_EE	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_EE /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_FF	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_FF /;"	d
TEGRA_AON_GPIO_PORT_S	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_S	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_S /;"	d
TEGRA_AON_GPIO_PORT_U	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_U	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_U /;"	d
TEGRA_AON_GPIO_PORT_V	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_V	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_V /;"	d
TEGRA_AON_GPIO_PORT_W	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_W	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_W /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_AON_GPIO_PORT_Z	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_AON_GPIO_PORT_Z /;"	d
TEGRA_ARMV7_COMMON	arch/arm/mach-tegra/Kconfig	/^config TEGRA_ARMV7_COMMON$/;"	c
TEGRA_ARMV8_COMMON	arch/arm/mach-tegra/Kconfig	/^config TEGRA_ARMV8_COMMON$/;"	c
TEGRA_CAR	drivers/misc/Kconfig	/^config TEGRA_CAR$/;"	c	menu:Multifunction device drivers
TEGRA_CAR_CLOCK	drivers/clk/tegra/Kconfig	/^config TEGRA_CAR_CLOCK$/;"	c
TEGRA_CAR_RESET	drivers/reset/Kconfig	/^config TEGRA_CAR_RESET$/;"	c	menu:Reset Controller Support
TEGRA_CLK_PLLS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_PLLS		= 6,	\/* Number of normal PLLs *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_REGS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_REGS		= 3,	\/* Number of clock enable regs L\/H\/U *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_REGS_VW	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_REGS_VW	= 2,	\/* Number of clock enable regs V\/W *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_SIMPLE_PLLS	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_SIMPLE_PLLS	= 3,	\/* Number of simple PLLs *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_SOURCES	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_SOURCES	= 64,	\/* Number of ppl clock sources L\/H\/U *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_SOURCES_VW	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_SOURCES_VW	= 32,	\/* Number of ppl clock sources V\/W *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_SOURCES_X	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_SOURCES_X	= 32,	\/* Number of ppl clock sources X *\/$/;"	e	enum:__anon84cad1990103
TEGRA_CLK_SOURCES_Y	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	TEGRA_CLK_SOURCES_Y	= 18,	\/* Number of ppl clock sources Y *\/$/;"	e	enum:__anon84cad1990103
TEGRA_COMMON	arch/arm/mach-tegra/Kconfig	/^config TEGRA_COMMON$/;"	c
TEGRA_DEVICE_SETTINGS	include/configs/tegra-common-post.h	/^#define TEGRA_DEVICE_SETTINGS /;"	d
TEGRA_DEV_H	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define TEGRA_DEV_H	/;"	d
TEGRA_DEV_L	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define TEGRA_DEV_L	/;"	d
TEGRA_DEV_U	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define TEGRA_DEV_U	/;"	d
TEGRA_DISCONNECT_UDC_ON_BOOT	arch/arm/mach-tegra/Kconfig	/^config TEGRA_DISCONNECT_UDC_ON_BOOT$/;"	c
TEGRA_DVC_BASE	arch/arm/include/asm/arch-tegra/tegra.h	/^#define TEGRA_DVC_BASE	/;"	d
TEGRA_EMC_NUM_REGS	arch/arm/include/asm/arch-tegra20/emc.h	/^#define TEGRA_EMC_NUM_REGS	/;"	d
TEGRA_FLOW_CTRL_BASE	arch/arm/mach-tegra/psci.S	/^#define TEGRA_FLOW_CTRL_BASE	/;"	d	file:
TEGRA_GPIO	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIO	drivers/gpio/Kconfig	/^config TEGRA_GPIO$/;"	c	menu:GPIO Support
TEGRA_GPIO	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO(/;"	d
TEGRA_GPIOS_PER_PORT	arch/arm/include/asm/arch-tegra/gpio.h	/^#define TEGRA_GPIOS_PER_PORT	/;"	d
TEGRA_GPIO_BANKS	arch/arm/include/asm/arch-tegra114/gpio.h	/^#define TEGRA_GPIO_BANKS	/;"	d
TEGRA_GPIO_BANKS	arch/arm/include/asm/arch-tegra124/gpio.h	/^#define TEGRA_GPIO_BANKS	/;"	d
TEGRA_GPIO_BANKS	arch/arm/include/asm/arch-tegra20/gpio.h	/^#define TEGRA_GPIO_BANKS	/;"	d
TEGRA_GPIO_BANKS	arch/arm/include/asm/arch-tegra210/gpio.h	/^#define TEGRA_GPIO_BANKS	/;"	d
TEGRA_GPIO_BANKS	arch/arm/include/asm/arch-tegra30/gpio.h	/^#define TEGRA_GPIO_BANKS	/;"	d
TEGRA_GPIO_INIT_IN	arch/arm/include/asm/arch-tegra/gpio.h	/^	TEGRA_GPIO_INIT_IN,$/;"	e	enum:tegra_gpio_init
TEGRA_GPIO_INIT_OUT0	arch/arm/include/asm/arch-tegra/gpio.h	/^	TEGRA_GPIO_INIT_OUT0,$/;"	e	enum:tegra_gpio_init
TEGRA_GPIO_INIT_OUT1	arch/arm/include/asm/arch-tegra/gpio.h	/^	TEGRA_GPIO_INIT_OUT1,$/;"	e	enum:tegra_gpio_init
TEGRA_GPIO_PORTS	arch/arm/include/asm/arch-tegra114/gpio.h	/^#define TEGRA_GPIO_PORTS	/;"	d
TEGRA_GPIO_PORTS	arch/arm/include/asm/arch-tegra124/gpio.h	/^#define TEGRA_GPIO_PORTS	/;"	d
TEGRA_GPIO_PORTS	arch/arm/include/asm/arch-tegra20/gpio.h	/^#define TEGRA_GPIO_PORTS	/;"	d
TEGRA_GPIO_PORTS	arch/arm/include/asm/arch-tegra210/gpio.h	/^#define TEGRA_GPIO_PORTS	/;"	d
TEGRA_GPIO_PORTS	arch/arm/include/asm/arch-tegra30/gpio.h	/^#define TEGRA_GPIO_PORTS	/;"	d
TEGRA_GPIO_PORT_A	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_A	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_A /;"	d
TEGRA_GPIO_PORT_AA	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_AA	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_AA /;"	d
TEGRA_GPIO_PORT_B	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_B	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_B /;"	d
TEGRA_GPIO_PORT_BB	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_BB	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_BB /;"	d
TEGRA_GPIO_PORT_C	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_C	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_C /;"	d
TEGRA_GPIO_PORT_CC	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_CC	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_CC /;"	d
TEGRA_GPIO_PORT_D	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_D	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_D /;"	d
TEGRA_GPIO_PORT_DD	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_DD	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_DD /;"	d
TEGRA_GPIO_PORT_E	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_E	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_E /;"	d
TEGRA_GPIO_PORT_EE	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_EE	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_EE /;"	d
TEGRA_GPIO_PORT_F	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_F	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_F /;"	d
TEGRA_GPIO_PORT_FF	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_FF	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_FF /;"	d
TEGRA_GPIO_PORT_G	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_G	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_G /;"	d
TEGRA_GPIO_PORT_H	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_H	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_H /;"	d
TEGRA_GPIO_PORT_I	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_I	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_I /;"	d
TEGRA_GPIO_PORT_J	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_J	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_J /;"	d
TEGRA_GPIO_PORT_K	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_K	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_K /;"	d
TEGRA_GPIO_PORT_L	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_L	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_L /;"	d
TEGRA_GPIO_PORT_M	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_M	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_M /;"	d
TEGRA_GPIO_PORT_N	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_N	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_N /;"	d
TEGRA_GPIO_PORT_O	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_O	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_O /;"	d
TEGRA_GPIO_PORT_P	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_P	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_P /;"	d
TEGRA_GPIO_PORT_Q	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_Q	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Q /;"	d
TEGRA_GPIO_PORT_R	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_R	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_R /;"	d
TEGRA_GPIO_PORT_S	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_S	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_S /;"	d
TEGRA_GPIO_PORT_T	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_T	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_T /;"	d
TEGRA_GPIO_PORT_U	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_U	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_U /;"	d
TEGRA_GPIO_PORT_V	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_V	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_V /;"	d
TEGRA_GPIO_PORT_W	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_W	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_W /;"	d
TEGRA_GPIO_PORT_X	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_X	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_X /;"	d
TEGRA_GPIO_PORT_Y	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Y	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Y /;"	d
TEGRA_GPIO_PORT_Z	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_GPIO_PORT_Z	include/dt-bindings/gpio/tegra-gpio.h	/^#define TEGRA_GPIO_PORT_Z /;"	d
TEGRA_HSP	drivers/mailbox/Kconfig	/^config TEGRA_HSP$/;"	c	menu:Mailbox Controller Support
TEGRA_HSP_DB_ID_BPMP	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_ID_BPMP	/;"	d	file:
TEGRA_HSP_DB_ID_CCPLEX	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_ID_CCPLEX	/;"	d	file:
TEGRA_HSP_DB_ID_NUM	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_ID_NUM	/;"	d	file:
TEGRA_HSP_DB_REG_ENABLE	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_REG_ENABLE	/;"	d	file:
TEGRA_HSP_DB_REG_PENDING	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_REG_PENDING	/;"	d	file:
TEGRA_HSP_DB_REG_RAW	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_REG_RAW	/;"	d	file:
TEGRA_HSP_DB_REG_TRIGGER	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_DB_REG_TRIGGER	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NAS_MASK	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NAS_MASK	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NAS_SHIFT	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NAS_SHIFT	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NDB_MASK	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NDB_MASK	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NDB_SHIFT	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NDB_SHIFT	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NSI_MASK	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NSI_MASK	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NSI_SHIFT	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NSI_SHIFT	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NSM_MASK	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NSM_MASK	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NSM_SHIFT	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NSM_SHIFT	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NSS_MASK	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NSS_MASK	/;"	d	file:
TEGRA_HSP_INT_DIMENSIONING_NSS_SHIFT	drivers/mailbox/tegra-hsp.c	/^#define TEGRA_HSP_INT_DIMENSIONING_NSS_SHIFT	/;"	d	file:
TEGRA_I2C_IPC_MAX_IN_BUF_SIZE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define TEGRA_I2C_IPC_MAX_IN_BUF_SIZE	/;"	d
TEGRA_I2C_IPC_MAX_OUT_BUF_SIZE	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define TEGRA_I2C_IPC_MAX_OUT_BUF_SIZE	/;"	d
TEGRA_IVC	arch/arm/mach-tegra/Kconfig	/^config TEGRA_IVC$/;"	c
TEGRA_IVC_ALIGN	arch/arm/mach-tegra/ivc.c	/^#define TEGRA_IVC_ALIGN /;"	d	file:
TEGRA_LP0_ADDR	include/configs/tegra20-common.h	/^#define TEGRA_LP0_ADDR	/;"	d
TEGRA_LP0_SIZE	include/configs/tegra20-common.h	/^#define TEGRA_LP0_SIZE	/;"	d
TEGRA_LP0_VEC	include/configs/tegra20-common.h	/^#define TEGRA_LP0_VEC /;"	d
TEGRA_LP0_VEC	include/configs/tegra20-common.h	/^#define TEGRA_LP0_VEC$/;"	d
TEGRA_MAIN_GPIO	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO(/;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_A	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_A /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_B	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_B /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_BB	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_BB /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_C	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_C /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_CC	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_CC /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_D	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_D /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_E	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_E /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_F	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_F /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_G	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_G /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_H	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_H /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_I	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_I /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_J	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_J /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_K	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_K /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_L	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_L /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_M	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_M /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_N	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_N /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_O	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_O /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_P	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_P /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_Q	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Q /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_R	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_R /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_T	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_T /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_X	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_X /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MAIN_GPIO_PORT_Y	include/dt-bindings/gpio/tegra186-gpio.h	/^#define TEGRA_MAIN_GPIO_PORT_Y /;"	d
TEGRA_MC_SMMU_CONFIG_ENABLE	arch/arm/include/asm/arch-tegra124/mc.h	/^#define TEGRA_MC_SMMU_CONFIG_ENABLE /;"	d
TEGRA_MC_SMMU_CONFIG_ENABLE	arch/arm/include/asm/arch-tegra210/mc.h	/^#define TEGRA_MC_SMMU_CONFIG_ENABLE /;"	d
TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED	arch/arm/include/asm/arch-tegra124/mc.h	/^#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED	/;"	d
TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED	arch/arm/include/asm/arch-tegra210/mc.h	/^#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED	/;"	d
TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_ENABLED	arch/arm/include/asm/arch-tegra124/mc.h	/^#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_ENABLED	/;"	d
TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_ENABLED	arch/arm/include/asm/arch-tegra210/mc.h	/^#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_ENABLED	/;"	d
TEGRA_MMC_CLKCON_INTERNAL_CLOCK_ENABLE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CLKCON_INTERNAL_CLOCK_ENABLE	/;"	d
TEGRA_MMC_CLKCON_INTERNAL_CLOCK_STABLE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CLKCON_INTERNAL_CLOCK_STABLE	/;"	d
TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK	/;"	d
TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT	/;"	d
TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE	/;"	d
TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_136	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_136	/;"	d
TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48	/;"	d
TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48_BUSY	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48_BUSY	/;"	d
TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_MASK	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_MASK	/;"	d
TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_NO_RESPONSE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_NO_RESPONSE	/;"	d
TEGRA_MMC_HOSTCTL_DMASEL_ADMA2_32BIT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_HOSTCTL_DMASEL_ADMA2_32BIT	/;"	d
TEGRA_MMC_HOSTCTL_DMASEL_ADMA2_64BIT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_HOSTCTL_DMASEL_ADMA2_64BIT	/;"	d
TEGRA_MMC_HOSTCTL_DMASEL_MASK	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_HOSTCTL_DMASEL_MASK	/;"	d
TEGRA_MMC_HOSTCTL_DMASEL_SDMA	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_HOSTCTL_DMASEL_SDMA	/;"	d
TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE	/;"	d
TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY	/;"	d
TEGRA_MMC_NORINTSTSEN_BUFFER_WRITE_READY	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTSEN_BUFFER_WRITE_READY	/;"	d
TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE	/;"	d
TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT	/;"	d
TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE	/;"	d
TEGRA_MMC_NORINTSTS_CMD_COMPLETE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTS_CMD_COMPLETE	/;"	d
TEGRA_MMC_NORINTSTS_CMD_TIMEOUT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTS_CMD_TIMEOUT	/;"	d
TEGRA_MMC_NORINTSTS_DMA_INTERRUPT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTS_DMA_INTERRUPT	/;"	d
TEGRA_MMC_NORINTSTS_ERR_INTERRUPT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTS_ERR_INTERRUPT	/;"	d
TEGRA_MMC_NORINTSTS_XFER_COMPLETE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_NORINTSTS_XFER_COMPLETE	/;"	d
TEGRA_MMC_PRNSTS_CMD_INHIBIT_CMD	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_PRNSTS_CMD_INHIBIT_CMD	/;"	d
TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT	/;"	d
TEGRA_MMC_PWRCTL_SD_BUS_POWER	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_PWRCTL_SD_BUS_POWER	/;"	d
TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8	/;"	d
TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_0	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_0	/;"	d
TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3	/;"	d
TEGRA_MMC_SWRST_SW_RESET_FOR_ALL	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL	/;"	d
TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE	/;"	d
TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE	/;"	d
TEGRA_MMC_TRNMOD_BLOCK_COUNT_ENABLE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_BLOCK_COUNT_ENABLE	/;"	d
TEGRA_MMC_TRNMOD_CMD_CRC_CHECK	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_CMD_CRC_CHECK	/;"	d
TEGRA_MMC_TRNMOD_CMD_INDEX_CHECK	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_CMD_INDEX_CHECK	/;"	d
TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER	/;"	d
TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ	/;"	d
TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_WRITE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_WRITE	/;"	d
TEGRA_MMC_TRNMOD_DMA_ENABLE	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_DMA_ENABLE	/;"	d
TEGRA_MMC_TRNMOD_MULTI_BLOCK_SELECT	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define TEGRA_MMC_TRNMOD_MULTI_BLOCK_SELECT	/;"	d
TEGRA_NO_BPMP	arch/arm/mach-tegra/Kconfig	/^config TEGRA_NO_BPMP$/;"	c
TEGRA_PIN_DISABLE	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_DISABLE	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_DISABLE	/;"	d
TEGRA_PIN_ENABLE	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_ENABLE	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_ENABLE	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_1	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_1	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_2	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_2	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_4	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_4	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_LP_DRIVE_DIV_8	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_LP_DRIVE_DIV_8	/;"	d
TEGRA_PIN_PULL_DOWN	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_DOWN	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_DOWN	/;"	d
TEGRA_PIN_PULL_NONE	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_NONE	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_NONE	/;"	d
TEGRA_PIN_PULL_UP	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_PULL_UP	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_PULL_UP	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FAST	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FAST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_FASTEST	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_FASTEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOW	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOW	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PIN_SLEW_RATE_SLOWEST	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define TEGRA_PIN_SLEW_RATE_SLOWEST	/;"	d
TEGRA_PMX_GRPS_HAVE_HSM	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_HSM$/;"	d
TEGRA_PMX_GRPS_HAVE_HSM	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_HSM$/;"	d
TEGRA_PMX_GRPS_HAVE_HSM	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_HSM$/;"	d
TEGRA_PMX_GRPS_HAVE_LPMD	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_LPMD$/;"	d
TEGRA_PMX_GRPS_HAVE_LPMD	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_LPMD$/;"	d
TEGRA_PMX_GRPS_HAVE_LPMD	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_LPMD$/;"	d
TEGRA_PMX_GRPS_HAVE_SCHMT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_SCHMT$/;"	d
TEGRA_PMX_GRPS_HAVE_SCHMT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_SCHMT$/;"	d
TEGRA_PMX_GRPS_HAVE_SCHMT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_GRPS_HAVE_SCHMT$/;"	d
TEGRA_PMX_PINS_HAVE_E_INPUT	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_E_INPUT$/;"	d
TEGRA_PMX_PINS_HAVE_E_INPUT	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_E_INPUT$/;"	d
TEGRA_PMX_PINS_HAVE_E_INPUT	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_E_INPUT$/;"	d
TEGRA_PMX_PINS_HAVE_E_INPUT	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_E_INPUT$/;"	d
TEGRA_PMX_PINS_HAVE_E_IO_HV	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_E_IO_HV$/;"	d
TEGRA_PMX_PINS_HAVE_IO_RESET	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_IO_RESET$/;"	d
TEGRA_PMX_PINS_HAVE_IO_RESET	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_IO_RESET$/;"	d
TEGRA_PMX_PINS_HAVE_IO_RESET	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_IO_RESET$/;"	d
TEGRA_PMX_PINS_HAVE_LOCK	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_LOCK$/;"	d
TEGRA_PMX_PINS_HAVE_LOCK	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_LOCK$/;"	d
TEGRA_PMX_PINS_HAVE_LOCK	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_LOCK$/;"	d
TEGRA_PMX_PINS_HAVE_LOCK	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_LOCK$/;"	d
TEGRA_PMX_PINS_HAVE_OD	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_OD$/;"	d
TEGRA_PMX_PINS_HAVE_OD	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_OD$/;"	d
TEGRA_PMX_PINS_HAVE_OD	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_OD$/;"	d
TEGRA_PMX_PINS_HAVE_OD	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_OD$/;"	d
TEGRA_PMX_PINS_HAVE_RCV_SEL	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_RCV_SEL$/;"	d
TEGRA_PMX_PINS_HAVE_RCV_SEL	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_PINS_HAVE_RCV_SEL$/;"	d
TEGRA_PMX_SOC_DRV_GROUP_BASE_REG	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG /;"	d
TEGRA_PMX_SOC_DRV_GROUP_BASE_REG	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG /;"	d
TEGRA_PMX_SOC_DRV_GROUP_BASE_REG	arch/arm/include/asm/arch-tegra20/pinmux.h	/^#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG /;"	d
TEGRA_PMX_SOC_DRV_GROUP_BASE_REG	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG /;"	d
TEGRA_PMX_SOC_DRV_GROUP_BASE_REG	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG /;"	d
TEGRA_PMX_SOC_HAS_DRVGRPS	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_DRVGRPS$/;"	d
TEGRA_PMX_SOC_HAS_DRVGRPS	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_DRVGRPS$/;"	d
TEGRA_PMX_SOC_HAS_DRVGRPS	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_DRVGRPS$/;"	d
TEGRA_PMX_SOC_HAS_DRVGRPS	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_DRVGRPS$/;"	d
TEGRA_PMX_SOC_HAS_IO_CLAMPING	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_IO_CLAMPING$/;"	d
TEGRA_PMX_SOC_HAS_IO_CLAMPING	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_IO_CLAMPING$/;"	d
TEGRA_PMX_SOC_HAS_IO_CLAMPING	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_IO_CLAMPING$/;"	d
TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS$/;"	d
TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG /;"	d
TEGRA_PORTS_PER_BANK	arch/arm/include/asm/arch-tegra/gpio.h	/^#define TEGRA_PORTS_PER_BANK	/;"	d
TEGRA_POWERGATE_3D	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_3D,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_3D1	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_3D1,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_C0NC	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_C0NC,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_C1NC	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_C1NC,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_CELP	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_CELP,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_CPU	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_CPU,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_CPU0	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_CPU0,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_CPU1	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_CPU1,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_CPU2	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_CPU2,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_CPU3	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_CPU3,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_DIS	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_DIS,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_DISB	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_DISB,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_HEG	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_HEG,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_IRAM	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_IRAM,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_L2	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_L2,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_MPE	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_MPE,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_PCIE	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_PCIE,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_SATA	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_SATA,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_SOR	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_SOR,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_VDEC	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_VDEC,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_VENC	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_VENC,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_VIC	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_VIC,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_XUSBA	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_XUSBA,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_XUSBB	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_XUSBB,$/;"	e	enum:tegra_powergate
TEGRA_POWERGATE_XUSBC	arch/arm/include/asm/arch-tegra/powergate.h	/^	TEGRA_POWERGATE_XUSBC,$/;"	e	enum:tegra_powergate
TEGRA_RESET_EXCEPTION_VECTOR	arch/arm/mach-tegra/psci.S	/^#define TEGRA_RESET_EXCEPTION_VECTOR	/;"	d	file:
TEGRA_SB_CSR_0	arch/arm/mach-tegra/psci.S	/^#define TEGRA_SB_CSR_0	/;"	d	file:
TEGRA_SOC_CNT	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_CNT,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_T114	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_T114,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_T124	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_T124,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_T20	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_T20,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_T210	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_T210,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_T25	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_T25,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_T30	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_T30,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOC_UNKNOWN	arch/arm/include/asm/arch-tegra/tegra.h	/^	TEGRA_SOC_UNKNOWN	= -1,$/;"	e	enum:__anonea14c2da0203
TEGRA_SOR_ATTACH_TIMEOUT_MS	drivers/video/tegra124/sor.h	/^#define TEGRA_SOR_ATTACH_TIMEOUT_MS	/;"	d
TEGRA_SOR_TIMEOUT_MS	drivers/video/tegra124/sor.h	/^#define TEGRA_SOR_TIMEOUT_MS	/;"	d
TEGRA_SPI_MAX_FREQ	drivers/spi/tegra114_spi.c	/^#define TEGRA_SPI_MAX_FREQ	/;"	d	file:
TEGRA_SPI_MAX_FREQ	drivers/spi/tegra20_sflash.c	/^#define TEGRA_SPI_MAX_FREQ	/;"	d	file:
TEGRA_SPI_MAX_FREQ	drivers/spi/tegra20_slink.c	/^#define TEGRA_SPI_MAX_FREQ	/;"	d	file:
TEGRA_SWGROUP_A9AVP	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_A9AVP	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_A9AVP	/;"	d
TEGRA_SWGROUP_AFI	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_AFI	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AFI	/;"	d
TEGRA_SWGROUP_APE	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_APE	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_APE	/;"	d
TEGRA_SWGROUP_AVPC	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AVPC	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_AVPC	/;"	d
TEGRA_SWGROUP_AXIAP	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_AXIAP	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_AXIAP	/;"	d
TEGRA_SWGROUP_DC	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DC	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DC	/;"	d
TEGRA_SWGROUP_DCB	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_DCB	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_DCB	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EMUCIF	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EMUCIF	/;"	d
TEGRA_SWGROUP_EPP	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_EPP	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_EPP	/;"	d
TEGRA_SWGROUP_ETR	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_ETR	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ETR	/;"	d
TEGRA_SWGROUP_G2	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_G2	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_G2	/;"	d
TEGRA_SWGROUP_GPU	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_GPU	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_GPU	/;"	d
TEGRA_SWGROUP_HC	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HC	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HC	/;"	d
TEGRA_SWGROUP_HDA	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_HDA	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_HDA	/;"	d
TEGRA_SWGROUP_ISP	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_ISP	/;"	d
TEGRA_SWGROUP_ISP2	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2	/;"	d
TEGRA_SWGROUP_ISP2B	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_ISP2B	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_ISP2B	/;"	d
TEGRA_SWGROUP_MPCORE	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORE	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORE	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPCORELP	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPCORELP	/;"	d
TEGRA_SWGROUP_MPE	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MPE	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_MPE	/;"	d
TEGRA_SWGROUP_MSENC	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_MSENC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_MSENC	/;"	d
TEGRA_SWGROUP_NV	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV	/;"	d
TEGRA_SWGROUP_NV2	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NV2	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_NV2	/;"	d
TEGRA_SWGROUP_NVDEC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVDEC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVDEC	/;"	d
TEGRA_SWGROUP_NVENC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVENC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVENC	/;"	d
TEGRA_SWGROUP_NVJPG	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_NVJPG	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_NVJPG	/;"	d
TEGRA_SWGROUP_PPCS	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PPCS	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PPCS	/;"	d
TEGRA_SWGROUP_PTC	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_PTC	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_PTC	/;"	d
TEGRA_SWGROUP_SATA	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SATA	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_SATA	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC1A	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC1A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC2A	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC2A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC3A	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC3A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SDMMC4A	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SDMMC4A	/;"	d
TEGRA_SWGROUP_SE	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_SE	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_SE	/;"	d
TEGRA_SWGROUP_TSEC	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSEC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSEC	/;"	d
TEGRA_SWGROUP_TSECB	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_TSECB	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_TSECB	/;"	d
TEGRA_SWGROUP_VDE	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VDE	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VDE	/;"	d
TEGRA_SWGROUP_VI	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/arm/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/microblaze/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/mips/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/nios2/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/sandbox/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/x86/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	arch/xtensa/dts/include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VI	include/dt-bindings/memory/tegra30-mc.h	/^#define TEGRA_SWGROUP_VI	/;"	d
TEGRA_SWGROUP_VIC	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_VIC	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_VIC	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_DEV	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_DEV	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/arm/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/arm/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/arm/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/microblaze/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/mips/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/mips/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/mips/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/nios2/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/nios2/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/nios2/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/sandbox/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/x86/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/x86/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/x86/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	arch/xtensa/dts/include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	include/dt-bindings/memory/tegra114-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	include/dt-bindings/memory/tegra124-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_SWGROUP_XUSB_HOST	include/dt-bindings/memory/tegra210-mc.h	/^#define TEGRA_SWGROUP_XUSB_HOST	/;"	d
TEGRA_USB1_BASE	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define TEGRA_USB1_BASE	/;"	d
TEGRA_USB1_BASE	arch/arm/include/asm/arch-tegra20/tegra.h	/^#define TEGRA_USB1_BASE	/;"	d
TEGRA_USB1_BASE	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define TEGRA_USB1_BASE	/;"	d
TEGRA_USB1_BASE	arch/arm/include/asm/arch-tegra30/tegra.h	/^#define TEGRA_USB1_BASE	/;"	d
TEGRA_USB_ADDR_MASK	arch/arm/include/asm/arch-tegra/tegra.h	/^#define TEGRA_USB_ADDR_MASK	/;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_PCIE	include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_PCIE /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEGRA_XUSB_PADCTL_SATA	include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define TEGRA_XUSB_PADCTL_SATA /;"	d
TEMAC_AFM	drivers/net/xilinx_ll_temac.h	/^	TEMAC_AFM	= 0x390,$/;"	e	enum:temac_ctrl
TEMAC_EMMC	drivers/net/xilinx_ll_temac.h	/^	TEMAC_EMMC	= 0x300,$/;"	e	enum:temac_ctrl
TEMAC_FCC	drivers/net/xilinx_ll_temac.h	/^	TEMAC_FCC	= 0x2C0,$/;"	e	enum:temac_ctrl
TEMAC_MAW0	drivers/net/xilinx_ll_temac.h	/^	TEMAC_MAW0	= 0x388,$/;"	e	enum:temac_ctrl
TEMAC_MAW1	drivers/net/xilinx_ll_temac.h	/^	TEMAC_MAW1	= 0x38C,$/;"	e	enum:temac_ctrl
TEMAC_MC	drivers/net/xilinx_ll_temac.h	/^	TEMAC_MC	= 0x340,$/;"	e	enum:temac_ctrl
TEMAC_MIIMAI	drivers/net/xilinx_ll_temac.h	/^	TEMAC_MIIMAI	= 0x3B4$/;"	e	enum:temac_ctrl
TEMAC_MIIMWD	drivers/net/xilinx_ll_temac.h	/^	TEMAC_MIIMWD	= 0x3B0,$/;"	e	enum:temac_ctrl
TEMAC_PHYC	drivers/net/xilinx_ll_temac.h	/^	TEMAC_PHYC	= 0x320,$/;"	e	enum:temac_ctrl
TEMAC_RCW0	drivers/net/xilinx_ll_temac.h	/^	TEMAC_RCW0	= 0x200,$/;"	e	enum:temac_ctrl
TEMAC_RCW1	drivers/net/xilinx_ll_temac.h	/^	TEMAC_RCW1	= 0x240,$/;"	e	enum:temac_ctrl
TEMAC_TC	drivers/net/xilinx_ll_temac.h	/^	TEMAC_TC	= 0x280,$/;"	e	enum:temac_ctrl
TEMAC_TIE	drivers/net/xilinx_ll_temac.h	/^	TEMAC_TIE	= 0x3A4,$/;"	e	enum:temac_ctrl
TEMAC_TIS	drivers/net/xilinx_ll_temac.h	/^	TEMAC_TIS	= 0x3A0,$/;"	e	enum:temac_ctrl
TEMAC_UAW0	drivers/net/xilinx_ll_temac.h	/^	TEMAC_UAW0	= 0x380,$/;"	e	enum:temac_ctrl
TEMAC_UAW1	drivers/net/xilinx_ll_temac.h	/^	TEMAC_UAW1	= 0x384,$/;"	e	enum:temac_ctrl
TEMODER_INIT_VALUE	drivers/qe/uec.h	/^#define TEMODER_INIT_VALUE	/;"	d
TEMODER_IP_CHECKSUM_GENERATE	drivers/qe/uec.h	/^#define TEMODER_IP_CHECKSUM_GENERATE	/;"	d
TEMODER_NUM_OF_QUEUES_SHIFT	drivers/qe/uec.h	/^#define TEMODER_NUM_OF_QUEUES_SHIFT	/;"	d
TEMODER_PERFORMANCE_OPTIMIZATION_MODE1	drivers/qe/uec.h	/^#define TEMODER_PERFORMANCE_OPTIMIZATION_MODE1	/;"	d
TEMODER_RMON_STATISTICS	drivers/qe/uec.h	/^#define TEMODER_RMON_STATISTICS	/;"	d
TEMODER_SCHEDULER_ENABLE	drivers/qe/uec.h	/^#define TEMODER_SCHEDULER_ENABLE	/;"	d
TEMP	arch/arm/mach-keystone/ddr3_spd.c	/^#define TEMP /;"	d	file:
TEMPERATURE_DISPLAY_MAX	post/board/lwmon5/sysmon.c	/^#define TEMPERATURE_DISPLAY_MAX	/;"	d	file:
TEMPERATURE_DISPLAY_MIN	post/board/lwmon5/sysmon.c	/^#define TEMPERATURE_DISPLAY_MIN	/;"	d	file:
TEMPERATURE_HOT	drivers/thermal/imx_thermal.c	/^#define TEMPERATURE_HOT /;"	d	file:
TEMPERATURE_HOT_DELTA	drivers/thermal/imx_thermal.c	/^#define TEMPERATURE_HOT_DELTA /;"	d	file:
TEMPERATURE_MAX	drivers/thermal/imx_thermal.c	/^#define TEMPERATURE_MAX /;"	d	file:
TEMPERATURE_MAX	post/board/lwmon5/sysmon.c	/^#define TEMPERATURE_MAX	/;"	d	file:
TEMPERATURE_MIN	drivers/thermal/imx_thermal.c	/^#define TEMPERATURE_MIN /;"	d	file:
TEMPERATURE_MIN	post/board/lwmon5/sysmon.c	/^#define TEMPERATURE_MIN	/;"	d	file:
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_HIGH_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_HIGH_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_HIGH_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_HIGH_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_HIGH_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_HIGH_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_LOW_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_LOW_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_LOW_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_LOW_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_LOW_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_LOW_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_PANIC_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_PANIC_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_PANIC_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_PANIC_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_PANIC_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_PANIC_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_CLR_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_HIGH_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_HIGH_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_HIGH_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_HIGH_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_HIGH_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_HIGH_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_PANIC_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_PANIC_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_PANIC_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_PANIC_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_PANIC_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_PANIC_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_HIGH_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_HIGH_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_HIGH_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_HIGH_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_HIGH_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_HIGH_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_LOW_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_LOW_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_LOW_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_LOW_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_LOW_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_LOW_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_PANIC_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_PANIC_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_PANIC_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_PANIC_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_PANIC_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_PANIC_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_SET_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_HIGH_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_HIGH_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_HIGH_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_HIGH_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_HIGH_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_HIGH_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_LOW_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_LOW_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_LOW_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_LOW_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_LOW_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_LOW_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_PANIC_ALARM_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_PANIC_ALARM_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_PANIC_ALARM_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_PANIC_ALARM_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_PANIC_ALARM_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_PANIC_ALARM_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE0_TOG_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_FINISHED_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_FINISHED_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_FINISHED_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_FINISHED_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_FREQ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_FREQ(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_FREQ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_FREQ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_TEMP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_TEMP_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_TEMP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_MEASURE_TEMP_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_POWER_DOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_POWER_DOWN_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_POWER_DOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_POWER_DOWN_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_TEMP_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_TEMP_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_TEMP_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_TEMP_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_TEMP_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_CLR_TEMP_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_FINISHED_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_FINISHED_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_FINISHED_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_FINISHED_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_FREQ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_FREQ(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_FREQ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_FREQ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_TEMP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_TEMP_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_TEMP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_MEASURE_TEMP_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_POWER_DOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_POWER_DOWN_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_POWER_DOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_POWER_DOWN_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_TEMP_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_TEMP_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_TEMP_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_TEMP_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_SET_TEMP_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_TEMP_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_FINISHED_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_FINISHED_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_FINISHED_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_FINISHED_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_FREQ	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_FREQ(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_FREQ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_FREQ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_TEMP_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_TEMP_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_TEMP_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_MEASURE_TEMP_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_POWER_DOWN_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_POWER_DOWN_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_POWER_DOWN_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_POWER_DOWN_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_TEMP_VALUE	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_TEMP_VALUE(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_TEMP_VALUE_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_TEMP_VALUE_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_TEMP_VALUE_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE1_TOG_TEMP_VALUE_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD2(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD2_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_RSVD2_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_SLOPE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_SLOPE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_SLOPE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_SLOPE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_SLOPE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_SLOPE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_VREF_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_VREF_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_VREF_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_VREF_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_VREF_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_BUF_VREF_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_EN_READ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_EN_READ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_EN_READ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_EN_READ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_MUX_ADDR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_MUX_ADDR(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_MUX_ADDR_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_MUX_ADDR_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_MUX_ADDR_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_MUX_ADDR_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_VREF_VBE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_VREF_VBE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_VREF_VBE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_VREF_VBE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_VREF_VBE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_CLR_T_VREF_VBE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD2(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD2_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_RSVD2_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_SLOPE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_SLOPE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_SLOPE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_SLOPE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_SLOPE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_SLOPE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_VREF_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_VREF_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_VREF_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_VREF_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_VREF_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_BUF_VREF_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_EN_READ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_EN_READ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_EN_READ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_EN_READ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_MUX_ADDR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_MUX_ADDR(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_MUX_ADDR_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_MUX_ADDR_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_MUX_ADDR_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_MUX_ADDR_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_VREF_VBE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_VREF_VBE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_VREF_VBE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_VREF_VBE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_VREF_VBE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_T_VREF_VBE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD0(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD0_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD0_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD0_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD0_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD1(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD1_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD1_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD1_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD1_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD2(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD2_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD2_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD2_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_RSVD2_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_SLOPE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_SLOPE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_SLOPE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_SLOPE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_SLOPE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_SLOPE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_VREF_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_VREF_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_VREF_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_VREF_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_VREF_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_BUF_VREF_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_EN_READ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_EN_READ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_EN_READ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_EN_READ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_VREF_VBE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_VREF_VBE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_VREF_VBE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_VREF_VBE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_VREF_VBE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_VREF_VBE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_SLOPE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_SLOPE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_SLOPE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_SLOPE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_SLOPE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_SLOPE_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_VREF_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_VREF_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_VREF_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_VREF_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_VREF_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_BUF_VREF_SEL_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_EN_READ_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_EN_READ_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_EN_READ_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_EN_READ_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_MUX_ADDR	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_MUX_ADDR(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_MUX_ADDR_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_MUX_ADDR_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_MUX_ADDR_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_MUX_ADDR_SHIFT /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_VREF_VBE_SEL	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_VREF_VBE_SEL(/;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_VREF_VBE_SEL_MASK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_VREF_VBE_SEL_MASK /;"	d
TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_VREF_VBE_SEL_SHIFT	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_T_VREF_VBE_SEL_SHIFT /;"	d
TEMPSENSE0_FINISHED	drivers/thermal/imx_thermal.c	/^#define TEMPSENSE0_FINISHED	/;"	d	file:
TEMPSENSE0_MEASURE_TEMP	drivers/thermal/imx_thermal.c	/^#define TEMPSENSE0_MEASURE_TEMP	/;"	d	file:
TEMPSENSE0_POWER_DOWN	drivers/thermal/imx_thermal.c	/^#define TEMPSENSE0_POWER_DOWN	/;"	d	file:
TEMPSENSE0_TEMP_CNT_MASK	drivers/thermal/imx_thermal.c	/^#define TEMPSENSE0_TEMP_CNT_MASK	/;"	d	file:
TEMPSENSE0_TEMP_CNT_SHIFT	drivers/thermal/imx_thermal.c	/^#define TEMPSENSE0_TEMP_CNT_SHIFT	/;"	d	file:
TEMPSENSE1_MEASURE_FREQ	drivers/thermal/imx_thermal.c	/^#define TEMPSENSE1_MEASURE_FREQ	/;"	d	file:
TEMP_ALERT_CONFIG_DEVCT_1	arch/arm/include/asm/emif.h	/^#define TEMP_ALERT_CONFIG_DEVCT_1	/;"	d
TEMP_ALERT_CONFIG_DEVWDT_32	arch/arm/include/asm/emif.h	/^#define TEMP_ALERT_CONFIG_DEVWDT_32	/;"	d
TEMP_ALERT_POLL_INTERVAL_MS	arch/arm/include/asm/emif.h	/^#define TEMP_ALERT_POLL_INTERVAL_MS	/;"	d
TEMP_AUTOMOTIVE	include/imx_thermal.h	/^#define TEMP_AUTOMOTIVE /;"	d
TEMP_BASE_ADDRESS	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define TEMP_BASE_ADDRESS	/;"	d
TEMP_COMMERCIAL	include/imx_thermal.h	/^#define TEMP_COMMERCIAL /;"	d
TEMP_EXTCOMMERCIAL	include/imx_thermal.h	/^#define TEMP_EXTCOMMERCIAL /;"	d
TEMP_FROM_REG	drivers/hwmon/lm81.c	/^#define TEMP_FROM_REG(/;"	d	file:
TEMP_INDUSTRIAL	include/imx_thermal.h	/^#define TEMP_INDUSTRIAL /;"	d
TEMP_IRQ_EN	board/bf609-ezkit/soft_switch.h	/^#define TEMP_IRQ_EN /;"	d
TEMP_THERM_EN	board/bf609-ezkit/soft_switch.h	/^#define TEMP_THERM_EN /;"	d
TEMT	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define TEMT	/;"	d
TEMT	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define TEMT	/;"	d
TEMT_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define TEMT_P	/;"	d
TENV	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                      TENV /;"	d
TEOC	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                      TEOC /;"	d
TEOC_REG	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                  TEOC_REG /;"	d
TEOC_REG_PIO	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define              TEOC_REG_PIO /;"	d
TEREDO_RS_EVENT_MASK	drivers/usb/eth/r8152.h	/^#define TEREDO_RS_EVENT_MASK	/;"	d
TEREDO_SEL	drivers/usb/eth/r8152.h	/^#define TEREDO_SEL	/;"	d
TEREDO_WAKE_MASK	drivers/usb/eth/r8152.h	/^#define TEREDO_WAKE_MASK	/;"	d
TERM	include/twl6030.h	/^#define TERM	/;"	d
TERMINATE	drivers/usb/gadget/ci_udc.h	/^#define TERMINATE /;"	d
TERM_READ_EN	arch/arm/mach-exynos/exynos4_setup.h	/^#define TERM_READ_EN	/;"	d
TERM_WRITE_EN	arch/arm/mach-exynos/exynos4_setup.h	/^#define TERM_WRITE_EN	/;"	d
TEST	drivers/video/tegra124/sor.h	/^#define TEST	/;"	d
TEST	post/lib_powerpc/fpu/compare-fp-1.c	/^#define TEST(/;"	d	file:
TESTMODE	drivers/usb/host/r8a66597.h	/^#define TESTMODE	/;"	d
TESTSETLOCK	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TESTSETLOCK	/;"	d
TESTSETLOCK_P	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TESTSETLOCK_P	/;"	d
TEST_ACT_HEAD_OPMODE_AWAKE	drivers/video/tegra124/sor.h	/^#define TEST_ACT_HEAD_OPMODE_AWAKE	/;"	d
TEST_ACT_HEAD_OPMODE_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define TEST_ACT_HEAD_OPMODE_DEFAULT_MASK	/;"	d
TEST_ACT_HEAD_OPMODE_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_ACT_HEAD_OPMODE_SHIFT	/;"	d
TEST_ACT_HEAD_OPMODE_SLEEP	drivers/video/tegra124/sor.h	/^#define TEST_ACT_HEAD_OPMODE_SLEEP	/;"	d
TEST_ACT_HEAD_OPMODE_SNOOZE	drivers/video/tegra124/sor.h	/^#define TEST_ACT_HEAD_OPMODE_SNOOZE	/;"	d
TEST_ADLL_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TEST_ADLL_REG	/;"	d
TEST_ATTACHED_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define TEST_ATTACHED_DEFAULT_MASK	/;"	d
TEST_ATTACHED_FALSE	drivers/video/tegra124/sor.h	/^#define TEST_ATTACHED_FALSE	/;"	d
TEST_ATTACHED_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_ATTACHED_SHIFT	/;"	d
TEST_ATTACHED_TRUE	drivers/video/tegra124/sor.h	/^#define TEST_ATTACHED_TRUE	/;"	d
TEST_BNKSELA	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_BNKSELA	/;"	d
TEST_BNKSELB	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_BNKSELB	/;"	d
TEST_BRANCH	tools/buildman/func_test.py	/^TEST_BRANCH = '__testbranch'$/;"	v
TEST_BUFFER_SIZE	test/compression.c	/^#define TEST_BUFFER_SIZE	/;"	d	file:
TEST_CRC_POST_DESERIALIZE	drivers/video/tegra124/sor.h	/^#define TEST_CRC_POST_DESERIALIZE	/;"	d
TEST_CRC_PRE_SERIALIZE	drivers/video/tegra124/sor.h	/^#define TEST_CRC_PRE_SERIALIZE	/;"	d
TEST_CRC_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_CRC_SHIFT	/;"	d
TEST_DATA	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_DATA	/;"	d
TEST_DSRC_DEBUG	drivers/video/tegra124/sor.h	/^#define TEST_DSRC_DEBUG	/;"	d
TEST_DSRC_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define TEST_DSRC_DEFAULT_MASK	/;"	d
TEST_DSRC_NORMAL	drivers/video/tegra124/sor.h	/^#define TEST_DSRC_NORMAL	/;"	d
TEST_DSRC_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_DSRC_SHIFT	/;"	d
TEST_DSRC_TGEN	drivers/video/tegra124/sor.h	/^#define TEST_DSRC_TGEN	/;"	d
TEST_DW0	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_DW0	/;"	d
TEST_DW1	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_DW1	/;"	d
TEST_DW2	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_DW2	/;"	d
TEST_DW3	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_DW3	/;"	d
TEST_FAILED	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	TEST_FAILED = 0,$/;"	e	enum:hws_result
TEST_FLASH_ADDR	examples/standalone/test_burst.c	/^#define TEST_FLASH_ADDR	/;"	d	file:
TEST_FORCE_EN	include/linux/usb/ch9.h	/^#define	TEST_FORCE_EN	/;"	d
TEST_FORCE_ENABLE_SEL	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define TEST_FORCE_ENABLE_SEL	/;"	d
TEST_HEAD_NUMBER_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define TEST_HEAD_NUMBER_DEFAULT_MASK	/;"	d
TEST_HEAD_NUMBER_HEAD0	drivers/video/tegra124/sor.h	/^#define TEST_HEAD_NUMBER_HEAD0	/;"	d
TEST_HEAD_NUMBER_HEAD1	drivers/video/tegra124/sor.h	/^#define TEST_HEAD_NUMBER_HEAD1	/;"	d
TEST_HEAD_NUMBER_NONE	drivers/video/tegra124/sor.h	/^#define TEST_HEAD_NUMBER_NONE	/;"	d
TEST_HEAD_NUMBER_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_HEAD_NUMBER_SHIFT	/;"	d
TEST_INTVAL1	test/dm/core.c	/^	TEST_INTVAL1		= 0,$/;"	e	enum:__anon88e10cae0103	file:
TEST_INTVAL2	test/dm/core.c	/^	TEST_INTVAL2		= 3,$/;"	e	enum:__anon88e10cae0103	file:
TEST_INTVAL3	test/dm/core.c	/^	TEST_INTVAL3		= 6,$/;"	e	enum:__anon88e10cae0103	file:
TEST_INTVAL_MANUAL	test/dm/core.c	/^	TEST_INTVAL_MANUAL	= 101112,$/;"	e	enum:__anon88e10cae0103	file:
TEST_INTVAL_PRE_RELOC	test/dm/core.c	/^	TEST_INTVAL_PRE_RELOC	= 7,$/;"	e	enum:__anon88e10cae0103	file:
TEST_INVD_DISABLE	drivers/video/tegra124/sor.h	/^#define TEST_INVD_DISABLE	/;"	d
TEST_INVD_ENABLE	drivers/video/tegra124/sor.h	/^#define TEST_INVD_ENABLE	/;"	d
TEST_INVD_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_INVD_SHIFT	/;"	d
TEST_IP	fs/jffs2/compr_lzo.c	/^#define TEST_IP	/;"	d	file:
TEST_J	include/linux/usb/ch9.h	/^#define	TEST_J	/;"	d
TEST_J_SEL	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define TEST_J_SEL	/;"	d
TEST_K	include/linux/usb/ch9.h	/^#define	TEST_K	/;"	d
TEST_K_SEL	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define TEST_K_SEL	/;"	d
TEST_LIST_LEN	lib/list_sort.c	/^#define TEST_LIST_LEN /;"	d	file:
TEST_LOOKBEHIND	fs/jffs2/compr_lzo.c	/^#define TEST_LOOKBEHIND(/;"	d	file:
TEST_MAX_LENGTH	arch/powerpc/cpu/mpc8xx/spi.c	/^#define TEST_MAX_LENGTH	/;"	d	file:
TEST_MB0	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_MB0	/;"	d
TEST_MB1	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_MB1	/;"	d
TEST_MB2	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_MB2	/;"	d
TEST_MB3	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_MB3	/;"	d
TEST_MIN_LENGTH	arch/powerpc/cpu/mpc8xx/spi.c	/^#define TEST_MIN_LENGTH	/;"	d	file:
TEST_MODE_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define TEST_MODE_CTRL_ADDR(/;"	d
TEST_MODE_DISABLE	drivers/usb/eth/r8152.h	/^#define TEST_MODE_DISABLE	/;"	d
TEST_NUM	arch/powerpc/cpu/mpc8xx/spi.c	/^#define TEST_NUM	/;"	d	file:
TEST_NUM	post/cpu/mpc8xx/ether.c	/^#define TEST_NUM	/;"	d	file:
TEST_OP	fs/jffs2/compr_lzo.c	/^#define TEST_OP	/;"	d	file:
TEST_PACKET	include/linux/usb/ch9.h	/^#define	TEST_PACKET	/;"	d
TEST_PACKET_SEL	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define TEST_PACKET_SEL	/;"	d
TEST_PADDR	examples/standalone/test_burst.c	/^#define TEST_PADDR	/;"	d	file:
TEST_PATTEN	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^#define TEST_PATTEN	/;"	d	file:
TEST_PATTERN_GEN_DIS	arch/arm/mach-exynos/include/mach/dp.h	/^#define TEST_PATTERN_GEN_DIS	/;"	d
TEST_PATTERN_GEN_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define TEST_PATTERN_GEN_EN	/;"	d
TEST_PATTERN_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define TEST_PATTERN_LENGTH	/;"	d
TEST_PATTERN_MODE_BALCK_WHITE_V_LINES	arch/arm/mach-exynos/include/mach/dp.h	/^#define TEST_PATTERN_MODE_BALCK_WHITE_V_LINES	/;"	d
TEST_PATTERN_MODE_COLOR_RAMP	arch/arm/mach-exynos/include/mach/dp.h	/^#define TEST_PATTERN_MODE_COLOR_RAMP	/;"	d
TEST_PATTERN_MODE_COLOR_SQUARE	arch/arm/mach-exynos/include/mach/dp.h	/^#define TEST_PATTERN_MODE_COLOR_SQUARE	/;"	d
TEST_POISON1	lib/list_sort.c	/^#define TEST_POISON1 /;"	d	file:
TEST_POISON2	lib/list_sort.c	/^#define TEST_POISON2 /;"	d	file:
TEST_POWER_DOMAIN	test/dm/power-domain.c	/^#define TEST_POWER_DOMAIN /;"	d	file:
TEST_READ	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_READ	/;"	d
TEST_RESET_ID	test/dm/reset.c	/^#define TEST_RESET_ID /;"	d	file:
TEST_SE0_NAK	include/linux/usb/ch9.h	/^#define	TEST_SE0_NAK	/;"	d
TEST_SE0_NAK_SEL	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define TEST_SE0_NAK_SEL	/;"	d
TEST_SET	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_SET(/;"	d
TEST_SMM_FLASH_LOCKDOWN	arch/x86/cpu/ivybridge/lpc.c	/^#define TEST_SMM_FLASH_LOCKDOWN	/;"	d	file:
TEST_SUCCESS	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	TEST_SUCCESS = 1,$/;"	e	enum:hws_result
TEST_TAG	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_TAG	/;"	d
TEST_TESTMUX_AVDD	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_AVDD	/;"	d
TEST_TESTMUX_AVSS	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_AVSS	/;"	d
TEST_TESTMUX_CLOCKIN	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_CLOCKIN	/;"	d
TEST_TESTMUX_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_DEFAULT_MASK	/;"	d
TEST_TESTMUX_PLL_VOL	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_PLL_VOL	/;"	d
TEST_TESTMUX_REGREF_AVDD	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_REGREF_AVDD	/;"	d
TEST_TESTMUX_REGREF_VDDREG	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_REGREF_VDDREG	/;"	d
TEST_TESTMUX_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_SHIFT	/;"	d
TEST_TESTMUX_SLOWCLKINT	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_SLOWCLKINT	/;"	d
TEST_TESTMUX_VDDREG	drivers/video/tegra124/sor.h	/^#define TEST_TESTMUX_VDDREG	/;"	d
TEST_TEST_ENABLE_DISABLE	drivers/video/tegra124/sor.h	/^#define TEST_TEST_ENABLE_DISABLE	/;"	d
TEST_TEST_ENABLE_ENABLE	drivers/video/tegra124/sor.h	/^#define TEST_TEST_ENABLE_ENABLE	/;"	d
TEST_TEST_ENABLE_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_TEST_ENABLE_SHIFT	/;"	d
TEST_TPAT_DEFAULT_MASK	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_DEFAULT_MASK	/;"	d
TEST_TPAT_LO	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_LO	/;"	d
TEST_TPAT_MAXSTEP	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_MAXSTEP	/;"	d
TEST_TPAT_MINSTEP	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_MINSTEP	/;"	d
TEST_TPAT_RAMP	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_RAMP	/;"	d
TEST_TPAT_SHIFT	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_SHIFT	/;"	d
TEST_TPAT_TDAT	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_TDAT	/;"	d
TEST_TPAT_WALK	drivers/video/tegra124/sor.h	/^#define TEST_TPAT_WALK	/;"	d
TEST_UC_PDATA_INTVAL1	include/dm/test.h	/^	TEST_UC_PDATA_INTVAL1 = 2,$/;"	e	enum:__anon26bb1aae0303
TEST_UC_PDATA_INTVAL2	include/dm/test.h	/^	TEST_UC_PDATA_INTVAL2 = 334,$/;"	e	enum:__anon26bb1aae0303
TEST_UC_PDATA_INTVAL3	include/dm/test.h	/^	TEST_UC_PDATA_INTVAL3 = 789452,$/;"	e	enum:__anon26bb1aae0303
TEST_VADDR_C	examples/standalone/test_burst.c	/^#define TEST_VADDR_C	/;"	d	file:
TEST_VADDR_NC	examples/standalone/test_burst.c	/^#define TEST_VADDR_NC	/;"	d	file:
TEST_WAY0	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_WAY0	/;"	d
TEST_WAY1	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_WAY1	/;"	d
TEST_WAY2	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_WAY2	/;"	d
TEST_WAY3	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_WAY3	/;"	d
TEST_WRITE	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define TEST_WRITE	/;"	d
TETRIS_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^	TETRIS_PLL,$/;"	e	enum:__anonc27926650203
TETRIS_PLL_1000	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_1000	/;"	d
TETRIS_PLL_1000	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_1000	/;"	d
TETRIS_PLL_1167	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_1167	/;"	d
TETRIS_PLL_1188	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_1188 /;"	d
TETRIS_PLL_1198	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_1198	/;"	d
TETRIS_PLL_1200	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_1200 /;"	d
TETRIS_PLL_1228	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_1228	/;"	d
TETRIS_PLL_1350	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_1350	/;"	d
TETRIS_PLL_1352	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_1352	/;"	d
TETRIS_PLL_1375	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_1375 /;"	d
TETRIS_PLL_1400	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_1400 /;"	d
TETRIS_PLL_1401	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_1401	/;"	d
TETRIS_PLL_491	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_491	/;"	d
TETRIS_PLL_500	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_500 /;"	d
TETRIS_PLL_625	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_625 /;"	d
TETRIS_PLL_687	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_687 /;"	d
TETRIS_PLL_737	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_737	/;"	d
TETRIS_PLL_750	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_750 /;"	d
TETRIS_PLL_799	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_799	/;"	d
TETRIS_PLL_800	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_800	/;"	d
TETRIS_PLL_812	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_812 /;"	d
TETRIS_PLL_875	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define TETRIS_PLL_875 /;"	d
TETRIS_PLL_983	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define TETRIS_PLL_983	/;"	d
TEXT	arch/mips/include/asm/asm.h	/^#define TEXT(/;"	d
TEXTBOX_HEIGTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define TEXTBOX_HEIGTH_MIN /;"	d
TEXTBOX_WIDTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define TEXTBOX_WIDTH_MIN /;"	d
TEXT_START	arch/sparc/cpu/leon2/start.S	/^#define TEXT_START /;"	d	file:
TFAW_CFG_MASK	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	TFAW_CFG_MASK			= 3,$/;"	e	enum:__anon957231910203	file:
TFAW_CFG_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	TFAW_CFG_SHIFT			= 18,$/;"	e	enum:__anon957231910203	file:
TFAW_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TFAW_SHIFT	/;"	d
TFF	include/linux/mtd/st_smi.h	/^#define TFF	/;"	d
TFI	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define TFI	/;"	d
TFIE	include/linux/mtd/st_smi.h	/^#define TFIE	/;"	d
TFP410_CONFIG	board/tqc/tqm5200/tqm5200.c	/^}TFP410_CONFIG;$/;"	t	typeref:struct:_tfp410_config	file:
TFP410_REG_CFG	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_CFG /;"	d	file:
TFP410_REG_CTL_1_MODE	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_CTL_1_MODE /;"	d	file:
TFP410_REG_CTL_2_MODE	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_CTL_2_MODE /;"	d	file:
TFP410_REG_CTL_3_MODE	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_CTL_3_MODE /;"	d	file:
TFP410_REG_DEV_ID_H	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DEV_ID_H /;"	d	file:
TFP410_REG_DEV_ID_L	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DEV_ID_L /;"	d	file:
TFP410_REG_DE_CNT_H	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_CNT_H /;"	d	file:
TFP410_REG_DE_CNT_L	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_CNT_L /;"	d	file:
TFP410_REG_DE_CTL	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_CTL /;"	d	file:
TFP410_REG_DE_DLY	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_DLY /;"	d	file:
TFP410_REG_DE_LIN_H	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_LIN_H /;"	d	file:
TFP410_REG_DE_LIN_L	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_LIN_L /;"	d	file:
TFP410_REG_DE_TOP	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_DE_TOP /;"	d	file:
TFP410_REG_H_RES_H	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_H_RES_H /;"	d	file:
TFP410_REG_H_RES_L	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_H_RES_L /;"	d	file:
TFP410_REG_REV_ID	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_REV_ID /;"	d	file:
TFP410_REG_VEN_ID_H	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_VEN_ID_H /;"	d	file:
TFP410_REG_VEN_ID_L	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_VEN_ID_L /;"	d	file:
TFP410_REG_V_RES_H	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_V_RES_H /;"	d	file:
TFP410_REG_V_RES_L	board/tqc/tqm5200/tqm5200.c	/^#define TFP410_REG_V_RES_L /;"	d	file:
TFRCNT_RST	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                TFRCNT_RST /;"	d
TFTPGET	include/net.h	/^	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,$/;"	e	enum:proto_t
TFTPPUT	include/net.h	/^	TFTPSRV, TFTPPUT, LINKLOCAL$/;"	e	enum:proto_t
TFTPSRV	include/net.h	/^	TFTPSRV, TFTPPUT, LINKLOCAL$/;"	e	enum:proto_t
TFTP_ACK	net/tftp.c	/^#define TFTP_ACK	/;"	d	file:
TFTP_BLOCK_SIZE	net/tftp.c	/^#define TFTP_BLOCK_SIZE	/;"	d	file:
TFTP_BOOT_SUPPORTED	include/configs/x600.h	/^#define TFTP_BOOT_SUPPORTED	/;"	d
TFTP_DATA	net/tftp.c	/^#define TFTP_DATA	/;"	d	file:
TFTP_ERROR	net/tftp.c	/^#define TFTP_ERROR	/;"	d	file:
TFTP_ERR_ACCESS_DENIED	net/tftp.c	/^	TFTP_ERR_ACCESS_DENIED       = 2,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_ERR_DISK_FULL	net/tftp.c	/^	TFTP_ERR_DISK_FULL           = 3,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_ERR_FILE_ALREADY_EXISTS	net/tftp.c	/^	TFTP_ERR_FILE_ALREADY_EXISTS = 6,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_ERR_FILE_NOT_FOUND	net/tftp.c	/^	TFTP_ERR_FILE_NOT_FOUND      = 1,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_ERR_UNDEFINED	net/tftp.c	/^	TFTP_ERR_UNDEFINED           = 0,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_ERR_UNEXPECTED_OPCODE	net/tftp.c	/^	TFTP_ERR_UNEXPECTED_OPCODE   = 4,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_ERR_UNKNOWN_TRANSFER_ID	net/tftp.c	/^	TFTP_ERR_UNKNOWN_TRANSFER_ID  = 5,$/;"	e	enum:__anon2d24194a0103	file:
TFTP_MTU_BLOCKSIZE	net/tftp.c	/^#define TFTP_MTU_BLOCKSIZE /;"	d	file:
TFTP_OACK	net/tftp.c	/^#define TFTP_OACK	/;"	d	file:
TFTP_RRQ	net/tftp.c	/^#define TFTP_RRQ	/;"	d	file:
TFTP_SEQUENCE_SIZE	net/tftp.c	/^#define TFTP_SEQUENCE_SIZE	/;"	d	file:
TFTP_WRQ	net/tftp.c	/^#define TFTP_WRQ	/;"	d	file:
TFTR	drivers/net/sh_eth.h	/^	TFTR,$/;"	e	enum:__anon5ef54f5a0103
TFTSTN_SHIFT	arch/arm/include/asm/arch-omap3/dss.h	/^#define TFTSTN_SHIFT	/;"	d
TFUCR	drivers/net/sh_eth.h	/^	TFUCR,$/;"	e	enum:__anon5ef54f5a0103
TF_COMMAND	scripts/kconfig/lkc.h	/^#define TF_COMMAND	/;"	d
TF_OPTION	scripts/kconfig/lkc.h	/^#define TF_OPTION	/;"	d
TF_PARAM	scripts/kconfig/lkc.h	/^#define TF_PARAM	/;"	d
TGCR1_CAS2	include/mpc8260.h	/^#define TGCR1_CAS2	/;"	d
TGCR1_GM1	include/mpc8260.h	/^#define TGCR1_GM1	/;"	d
TGCR1_RST1	include/mpc8260.h	/^#define TGCR1_RST1	/;"	d
TGCR1_RST2	include/mpc8260.h	/^#define TGCR1_RST2	/;"	d
TGCR1_STP1	include/mpc8260.h	/^#define TGCR1_STP1	/;"	d
TGCR1_STP2	include/mpc8260.h	/^#define TGCR1_STP2	/;"	d
TGCR2_CAS4	include/mpc8260.h	/^#define TGCR2_CAS4	/;"	d
TGCR2_GM2	include/mpc8260.h	/^#define TGCR2_GM2	/;"	d
TGCR2_RST3	include/mpc8260.h	/^#define TGCR2_RST3	/;"	d
TGCR2_RST4	include/mpc8260.h	/^#define TGCR2_RST4	/;"	d
TGCR2_STP3	include/mpc8260.h	/^#define TGCR2_STP3	/;"	d
TGCR2_STP4	include/mpc8260.h	/^#define TGCR2_STP4	/;"	d
TGCR_CAS2	include/mpc8xx.h	/^#define TGCR_CAS2	/;"	d
TGCR_CAS4	include/mpc8xx.h	/^#define TGCR_CAS4	/;"	d
TGCR_FRZ1	include/mpc8xx.h	/^#define TGCR_FRZ1	/;"	d
TGCR_FRZ2	include/mpc8xx.h	/^#define TGCR_FRZ2	/;"	d
TGCR_FRZ3	include/mpc8xx.h	/^#define TGCR_FRZ3	/;"	d
TGCR_FRZ4	include/mpc8xx.h	/^#define TGCR_FRZ4	/;"	d
TGCR_GM1	include/mpc8xx.h	/^#define TGCR_GM1	/;"	d
TGCR_GM2	include/mpc8xx.h	/^#define TGCR_GM2	/;"	d
TGCR_RST1	include/mpc8xx.h	/^#define TGCR_RST1	/;"	d
TGCR_RST2	include/mpc8xx.h	/^#define TGCR_RST2	/;"	d
TGCR_RST3	include/mpc8xx.h	/^#define TGCR_RST3	/;"	d
TGCR_RST4	include/mpc8xx.h	/^#define TGCR_RST4	/;"	d
TGCR_STP1	include/mpc8xx.h	/^#define TGCR_STP1	/;"	d
TGCR_STP2	include/mpc8xx.h	/^#define TGCR_STP2	/;"	d
TGCR_STP3	include/mpc8xx.h	/^#define TGCR_STP3	/;"	d
TGCR_STP4	include/mpc8xx.h	/^#define TGCR_STP4	/;"	d
TGEC_CMD_CFG_CMD_FRM_EN	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_CMD_FRM_EN	/;"	d
TGEC_CMD_CFG_CRC_FWD	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_CRC_FWD	/;"	d
TGEC_CMD_CFG_EN_TIMESTAMP	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_EN_TIMESTAMP	/;"	d
TGEC_CMD_CFG_FINAL	drivers/net/fm/tgec.c	/^#define TGEC_CMD_CFG_FINAL	/;"	d	file:
TGEC_CMD_CFG_INIT	drivers/net/fm/tgec.c	/^#define TGEC_CMD_CFG_INIT	/;"	d	file:
TGEC_CMD_CFG_NO_LEN_CHK	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_NO_LEN_CHK	/;"	d
TGEC_CMD_CFG_PAD_EN	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_PAD_EN	/;"	d
TGEC_CMD_CFG_PAUSE_FWD	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_PAUSE_FWD	/;"	d
TGEC_CMD_CFG_PAUSE_IGNORE	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_PAUSE_IGNORE	/;"	d
TGEC_CMD_CFG_PROM_EN	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_PROM_EN	/;"	d
TGEC_CMD_CFG_RXTX_EN	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_RXTX_EN	/;"	d
TGEC_CMD_CFG_RX_EN	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_RX_EN	/;"	d
TGEC_CMD_CFG_RX_ER_DISC	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_RX_ER_DISC	/;"	d
TGEC_CMD_CFG_SEND_IDLE	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_SEND_IDLE	/;"	d
TGEC_CMD_CFG_STAT_CLR	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_STAT_CLR	/;"	d
TGEC_CMD_CFG_TX_ADDR_INS	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_TX_ADDR_INS	/;"	d
TGEC_CMD_CFG_TX_ADDR_INS_SEL	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_TX_ADDR_INS_SEL	/;"	d
TGEC_CMD_CFG_TX_EN	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_TX_EN	/;"	d
TGEC_CMD_CFG_WAN_MODE	include/fsl_tgec.h	/^#define TGEC_CMD_CFG_WAN_MODE	/;"	d
TGSR_GSR	drivers/i2c/fti2c010.h	/^#define TGSR_GSR(/;"	d
TGSR_TSR	drivers/i2c/fti2c010.h	/^#define TGSR_TSR(/;"	d
TGT_ON	drivers/video/mxc_ipuv3_fb.c	/^	TGT_ON,$/;"	e	enum:__anon46dcecef0103	file:
TH	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                        TH /;"	d
THCHKB	include/mc13892.h	/^#define THCHKB	/;"	d
THEADORABLE_GPP_OUT_ENA_HIGH	board/theadorable/theadorable.c	/^#define THEADORABLE_GPP_OUT_ENA_HIGH	/;"	d	file:
THEADORABLE_GPP_OUT_ENA_LOW	board/theadorable/theadorable.c	/^#define THEADORABLE_GPP_OUT_ENA_LOW	/;"	d	file:
THEADORABLE_GPP_OUT_ENA_MID	board/theadorable/theadorable.c	/^#define THEADORABLE_GPP_OUT_ENA_MID	/;"	d	file:
THEADORABLE_GPP_OUT_VAL_HIGH	board/theadorable/theadorable.c	/^#define THEADORABLE_GPP_OUT_VAL_HIGH	/;"	d	file:
THEADORABLE_GPP_OUT_VAL_LOW	board/theadorable/theadorable.c	/^#define THEADORABLE_GPP_OUT_VAL_LOW	/;"	d	file:
THEADORABLE_GPP_OUT_VAL_MID	board/theadorable/theadorable.c	/^#define THEADORABLE_GPP_OUT_VAL_MID	/;"	d	file:
THERMAL_NO_LIMIT	arch/arm/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	arch/microblaze/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	arch/mips/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	arch/nios2/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	arch/sandbox/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	arch/x86/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	arch/xtensa/dts/include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMAL_NO_LIMIT	include/dt-bindings/thermal/thermal.h	/^#define THERMAL_NO_LIMIT	/;"	d
THERMTRIP_STS	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define  THERMTRIP_STS	/;"	d
THERMTRIP_STS	arch/x86/include/asm/arch-broadwell/pch.h	/^#define  THERMTRIP_STS	/;"	d
THERM_INT_HIGH_ENABLE	arch/x86/include/asm/msr-index.h	/^#define THERM_INT_HIGH_ENABLE	/;"	d
THERM_INT_LOW_ENABLE	arch/x86/include/asm/msr-index.h	/^#define THERM_INT_LOW_ENABLE	/;"	d
THERM_INT_PLN_ENABLE	arch/x86/include/asm/msr-index.h	/^#define THERM_INT_PLN_ENABLE	/;"	d
THERM_INT_THRESHOLD0_ENABLE	arch/x86/include/asm/msr-index.h	/^#define THERM_INT_THRESHOLD0_ENABLE /;"	d
THERM_INT_THRESHOLD1_ENABLE	arch/x86/include/asm/msr-index.h	/^#define THERM_INT_THRESHOLD1_ENABLE /;"	d
THERM_LOG_THRESHOLD0	arch/x86/include/asm/msr-index.h	/^#define THERM_LOG_THRESHOLD0 /;"	d
THERM_LOG_THRESHOLD1	arch/x86/include/asm/msr-index.h	/^#define THERM_LOG_THRESHOLD1 /;"	d
THERM_MASK_THRESHOLD0	arch/x86/include/asm/msr-index.h	/^#define THERM_MASK_THRESHOLD0 /;"	d
THERM_MASK_THRESHOLD1	arch/x86/include/asm/msr-index.h	/^#define THERM_MASK_THRESHOLD1 /;"	d
THERM_SHIFT_THRESHOLD0	arch/x86/include/asm/msr-index.h	/^#define THERM_SHIFT_THRESHOLD0 /;"	d
THERM_SHIFT_THRESHOLD1	arch/x86/include/asm/msr-index.h	/^#define THERM_SHIFT_THRESHOLD1 /;"	d
THERM_STATUS_POWER_LIMIT	arch/x86/include/asm/msr-index.h	/^#define THERM_STATUS_POWER_LIMIT	/;"	d
THERM_STATUS_PROCHOT	arch/x86/include/asm/msr-index.h	/^#define THERM_STATUS_PROCHOT	/;"	d
THERM_STATUS_THRESHOLD0	arch/x86/include/asm/msr-index.h	/^#define THERM_STATUS_THRESHOLD0 /;"	d
THERM_STATUS_THRESHOLD1	arch/x86/include/asm/msr-index.h	/^#define THERM_STATUS_THRESHOLD1 /;"	d
THERM_TRIP_EN	drivers/power/exynos-tmu.c	/^#define THERM_TRIP_EN	/;"	d	file:
THIS_MODULE	include/linux/compat.h	/^#define THIS_MODULE	/;"	d
THOR_PACKET_SIZE	drivers/usb/gadget/f_thor.h	/^#define THOR_PACKET_SIZE /;"	d
THOR_STORE_UNIT_SIZE	drivers/usb/gadget/f_thor.h	/^#define THOR_STORE_UNIT_SIZE /;"	d
THRE	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define THRE	/;"	d
THRE	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define THRE	/;"	d
THREAD_SIZE	arch/arm/include/asm/processor.h	/^#define THREAD_SIZE	/;"	d
THREAD_SIZE	arch/powerpc/include/asm/processor.h	/^#define THREAD_SIZE /;"	d
THRE_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define THRE_P	/;"	d
THRM1	arch/powerpc/include/asm/processor.h	/^#define THRM1	/;"	d
THRM1_THRES	arch/powerpc/include/asm/processor.h	/^#define   THRM1_THRES	/;"	d
THRM1_TID	arch/powerpc/include/asm/processor.h	/^#define   THRM1_TID	/;"	d
THRM1_TIE	arch/powerpc/include/asm/processor.h	/^#define   THRM1_TIE	/;"	d
THRM1_TIN	arch/powerpc/include/asm/processor.h	/^#define   THRM1_TIN	/;"	d
THRM1_TIV	arch/powerpc/include/asm/processor.h	/^#define   THRM1_TIV	/;"	d
THRM1_V	arch/powerpc/include/asm/processor.h	/^#define   THRM1_V	/;"	d
THRM2	arch/powerpc/include/asm/processor.h	/^#define THRM2	/;"	d
THRM3	arch/powerpc/include/asm/processor.h	/^#define THRM3	/;"	d
THRM3_E	arch/powerpc/include/asm/processor.h	/^#define   THRM3_E	/;"	d
THSENS_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define THSENS_BASE_ADDR /;"	d
THUMB	arch/arm/cpu/armv7/cache_v7_asm.S	/^#define THUMB(/;"	d	file:
THUMB	arch/arm/include/asm/unified.h	/^#define THUMB(/;"	d
THUNDERX_DRAM_SIZE	include/cavium/thunderx_svc.h	/^#define THUNDERX_DRAM_SIZE	/;"	d
THUNDERX_ENV_COUNT	include/cavium/thunderx_svc.h	/^#define THUNDERX_ENV_COUNT	/;"	d
THUNDERX_ENV_STRING	include/cavium/thunderx_svc.h	/^#define THUNDERX_ENV_STRING	/;"	d
THUNDERX_GET_PART	include/cavium/thunderx_svc.h	/^#define THUNDERX_GET_PART	/;"	d
THUNDERX_GTI_SYNC	include/cavium/thunderx_svc.h	/^#define THUNDERX_GTI_SYNC	/;"	d
THUNDERX_MMC_READ	include/cavium/thunderx_svc.h	/^#define THUNDERX_MMC_READ	/;"	d
THUNDERX_MMC_WRITE	include/cavium/thunderx_svc.h	/^#define THUNDERX_MMC_WRITE	/;"	d
THUNDERX_NODE_COUNT	include/cavium/thunderx_svc.h	/^#define THUNDERX_NODE_COUNT	/;"	d
THUNDERX_NOR_ERASE	include/cavium/thunderx_svc.h	/^#define THUNDERX_NOR_ERASE	/;"	d
THUNDERX_NOR_READ	include/cavium/thunderx_svc.h	/^#define THUNDERX_NOR_READ	/;"	d
THUNDERX_NOR_WRITE	include/cavium/thunderx_svc.h	/^#define THUNDERX_NOR_WRITE	/;"	d
THUNDERX_PART_COUNT	include/cavium/thunderx_svc.h	/^#define THUNDERX_PART_COUNT	/;"	d
THUNDERX_SVC_CALL_COUNT	include/cavium/thunderx_svc.h	/^#define THUNDERX_SVC_CALL_COUNT	/;"	d
THUNDERX_SVC_UID	include/cavium/thunderx_svc.h	/^#define THUNDERX_SVC_UID	/;"	d
THUNDERX_SVC_VERSION	include/cavium/thunderx_svc.h	/^#define THUNDERX_SVC_VERSION	/;"	d
THUNDERX_VERSION_MAJOR	include/cavium/thunderx_svc.h	/^#define THUNDERX_VERSION_MAJOR	/;"	d
THUNDERX_VERSION_MINOR	include/cavium/thunderx_svc.h	/^#define THUNDERX_VERSION_MINOR	/;"	d
TI81XX	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TI81XX	/;"	d
TICKS_PER_HZ	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TICKS_PER_HZ	/;"	d	file:
TICKS_TO_HZ	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TICKS_TO_HZ(/;"	d	file:
TICK_PER_TIME	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define TICK_PER_TIME	/;"	d	file:
TID_TIMER_ID	examples/standalone/timer.c	/^#define	TID_TIMER_ID	/;"	d	file:
TIM2_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define TIM2_BASE	/;"	d
TIMDIS0	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS0	/;"	d
TIMDIS1	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS1	/;"	d
TIMDIS2	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS2	/;"	d
TIMDIS3	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS3	/;"	d
TIMDIS4	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS4	/;"	d
TIMDIS5	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS5	/;"	d
TIMDIS6	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS6	/;"	d
TIMDIS7	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMDIS7	/;"	d
TIME	lib/zlib/inflate.h	/^    TIME,       \/* i: waiting for modification time (gzip) *\/$/;"	e	enum:__anon43d5a4c40103
TIME1	board/renesas/sh7785lcr/rtl8169.h	/^#define TIME1	/;"	d
TIME2	board/renesas/sh7785lcr/rtl8169.h	/^#define TIME2	/;"	d
TIMEN0	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN0	/;"	d
TIMEN1	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN1	/;"	d
TIMEN2	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN2	/;"	d
TIMEN3	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN3	/;"	d
TIMEN4	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN4	/;"	d
TIMEN5	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN5	/;"	d
TIMEN6	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN6	/;"	d
TIMEN7	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMEN7	/;"	d
TIMEOUT	arch/arm/mach-bcm283x/mbox.c	/^#define TIMEOUT /;"	d	file:
TIMEOUT	net/rarp.c	/^#define TIMEOUT /;"	d	file:
TIMEOUT	net/tftp.c	/^#define TIMEOUT	/;"	d	file:
TIMEOUT_CNT	drivers/net/sh_eth.c	/^#define TIMEOUT_CNT /;"	d	file:
TIMEOUT_COUNT	drivers/serial/arm_dcc.c	/^#define TIMEOUT_COUNT /;"	d	file:
TIMEOUT_COUNT	net/bootp.c	/^# define TIMEOUT_COUNT	/;"	d	file:
TIMEOUT_COUNT	net/rarp.c	/^#define TIMEOUT_COUNT /;"	d	file:
TIMEOUT_COUNT	net/tftp.c	/^# define TIMEOUT_COUNT	/;"	d	file:
TIMEOUT_COUNT	net/tftp.c	/^# define TIMEOUT_COUNT /;"	d	file:
TIMEOUT_DEF	arch/arm/include/asm/arch-armada100/spi.h	/^#define TIMEOUT_DEF	/;"	d
TIMEOUT_DELAY	drivers/mmc/mvebu_mmc.c	/^#define TIMEOUT_DELAY	/;"	d	file:
TIMEOUT_DRAIN_FIFO	drivers/mtd/nand/pxa3xx_nand.c	/^#define TIMEOUT_DRAIN_FIFO	/;"	d	file:
TIMEOUT_EPLL_LOCK	arch/arm/mach-exynos/include/mach/clock.h	/^#define TIMEOUT_EPLL_LOCK	/;"	d
TIMEOUT_I2S_TX	drivers/sound/samsung-i2s.c	/^#define TIMEOUT_I2S_TX	/;"	d	file:
TIMEOUT_LEVEL0	arch/arm/mach-exynos/exynos4_setup.h	/^#define TIMEOUT_LEVEL0	/;"	d
TIMEOUT_MS	net/bootp.c	/^#define TIMEOUT_MS	/;"	d	file:
TIMEOUT_RESOLUTION	drivers/usb/eth/asix.c	/^#define TIMEOUT_RESOLUTION /;"	d	file:
TIMEOUT_RESOLUTION	drivers/usb/eth/asix88179.c	/^#define TIMEOUT_RESOLUTION /;"	d	file:
TIMEOUT_RESOLUTION	drivers/usb/eth/r8152.h	/^#define TIMEOUT_RESOLUTION	/;"	d
TIMEOUT_RESOLUTION	drivers/usb/eth/smsc95xx.c	/^#define TIMEOUT_RESOLUTION /;"	d	file:
TIMEOUT_US	arch/arm/mach-exynos/dmc_init_ddr3.c	/^#define TIMEOUT_US	/;"	d	file:
TIMEPARAGRANULARITY	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define TIMEPARAGRANULARITY /;"	d
TIMER	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define TIMER	/;"	d	file:
TIMER	drivers/timer/Kconfig	/^config TIMER$/;"	c	menu:Timer Support
TIMER0_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define TIMER0_BASE	/;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER0_CONFIG /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER0_COUNTER /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER0_PERIOD /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER0_WIDTH /;"	d
TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER10_CONFIG /;"	d
TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER10_CONFIG /;"	d
TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER10_CONFIG /;"	d
TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER10_CONFIG /;"	d
TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER10_CONFIG /;"	d
TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER10_COUNTER /;"	d
TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER10_COUNTER /;"	d
TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER10_COUNTER /;"	d
TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER10_COUNTER /;"	d
TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER10_COUNTER /;"	d
TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER10_PERIOD /;"	d
TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER10_PERIOD /;"	d
TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER10_PERIOD /;"	d
TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER10_PERIOD /;"	d
TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER10_PERIOD /;"	d
TIMER10_PWM_EVT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define TIMER10_PWM_EVT	/;"	d
TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER10_WIDTH /;"	d
TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER10_WIDTH /;"	d
TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER10_WIDTH /;"	d
TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER10_WIDTH /;"	d
TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER10_WIDTH /;"	d
TIMER11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER11_CONFIG /;"	d
TIMER11_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER11_COUNTER /;"	d
TIMER11_EN	drivers/usb/eth/r8152.h	/^#define TIMER11_EN	/;"	d
TIMER11_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER11_PERIOD /;"	d
TIMER11_PWM_EVT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define TIMER11_PWM_EVT	/;"	d
TIMER11_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER11_WIDTH /;"	d
TIMER1_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define TIMER1_BASE	/;"	d
TIMER1_CLK_CFG	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define TIMER1_CLK_CFG	/;"	d
TIMER1_CLK_EN	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define TIMER1_CLK_EN	/;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER1_CONFIG /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER1_COUNTER /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER1_PERIOD /;"	d
TIMER1_VALUE	arch/x86/lib/i8254.c	/^#define TIMER1_VALUE	/;"	d	file:
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER1_WIDTH /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER2_CONFIG /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER2_COUNTER /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER2_PERIOD /;"	d
TIMER2_VALUE	arch/x86/lib/i8254.c	/^#define TIMER2_VALUE	/;"	d	file:
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER2_WIDTH /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER3_CONFIG /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER3_COUNTER /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER3_PERIOD /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER3_WIDTH /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER4_CONFIG /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER4_COUNTER /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER4_PERIOD /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER4_WIDTH /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER5_CONFIG /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER5_COUNTER /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER5_PERIOD /;"	d
TIMER5_PWM_EVT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define TIMER5_PWM_EVT	/;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER5_WIDTH /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER6_CONFIG /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER6_COUNTER /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER6_PERIOD /;"	d
TIMER6_PWM_EVT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define TIMER6_PWM_EVT	/;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER6_WIDTH /;"	d
TIMER7_BASE	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define TIMER7_BASE	/;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER7_CONFIG /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER7_COUNTER /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER7_PERIOD /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER7_WIDTH /;"	d
TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER8_CONFIG /;"	d
TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER8_CONFIG /;"	d
TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER8_CONFIG /;"	d
TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER8_CONFIG /;"	d
TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER8_CONFIG /;"	d
TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER8_COUNTER /;"	d
TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER8_COUNTER /;"	d
TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER8_COUNTER /;"	d
TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER8_COUNTER /;"	d
TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER8_COUNTER /;"	d
TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER8_PERIOD /;"	d
TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER8_PERIOD /;"	d
TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER8_PERIOD /;"	d
TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER8_PERIOD /;"	d
TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER8_PERIOD /;"	d
TIMER8_PWM_EVT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define TIMER8_PWM_EVT	/;"	d
TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER8_WIDTH /;"	d
TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER8_WIDTH /;"	d
TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER8_WIDTH /;"	d
TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER8_WIDTH /;"	d
TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER8_WIDTH /;"	d
TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER9_CONFIG /;"	d
TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER9_CONFIG /;"	d
TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER9_CONFIG /;"	d
TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER9_CONFIG /;"	d
TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER9_CONFIG /;"	d
TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER9_COUNTER /;"	d
TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER9_COUNTER /;"	d
TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER9_COUNTER /;"	d
TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER9_COUNTER /;"	d
TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER9_COUNTER /;"	d
TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER9_PERIOD /;"	d
TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER9_PERIOD /;"	d
TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER9_PERIOD /;"	d
TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER9_PERIOD /;"	d
TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER9_PERIOD /;"	d
TIMER9_PWM_EVT	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define TIMER9_PWM_EVT	/;"	d
TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER9_WIDTH /;"	d
TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER9_WIDTH /;"	d
TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER9_WIDTH /;"	d
TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER9_WIDTH /;"	d
TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TIMER9_WIDTH /;"	d
TIMER_4S_MC34708	include/fsl_pmic.h	/^#define TIMER_4S_MC34708	/;"	d
TIMER_BASE	arch/arm/cpu/arm1136/mx31/timer.c	/^#define TIMER_BASE /;"	d	file:
TIMER_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TIMER_BASE	/;"	d
TIMER_BASE_ADDR	arch/arm/include/asm/arch-bcm235xx/sysmap.h	/^#define TIMER_BASE_ADDR	/;"	d
TIMER_BASE_ADDR	arch/arm/include/asm/arch-bcm281xx/sysmap.h	/^#define TIMER_BASE_ADDR	/;"	d
TIMER_CAPTURE_MODE	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_CAPTURE_MODE /;"	d
TIMER_CCR_FALLING_EDGE	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CCR_FALLING_EDGE(/;"	d
TIMER_CCR_INTERRUPT	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CCR_INTERRUPT(/;"	d
TIMER_CCR_RISING_EDGE	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CCR_RISING_EDGE(/;"	d
TIMER_CLKSEL	arch/arm/cpu/arm920t/ep93xx/timer.c	/^#define TIMER_CLKSEL	/;"	d	file:
TIMER_CLOCK	arch/arm/cpu/arm926ejs/omap/timer.c	/^#define TIMER_CLOCK	/;"	d	file:
TIMER_CLOCK	arch/arm/cpu/armv7/omap-common/timer.c	/^#define TIMER_CLOCK	/;"	d	file:
TIMER_CLOCK	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_CLOCK	/;"	d	file:
TIMER_CLOCK	drivers/timer/omap-timer.c	/^#define TIMER_CLOCK /;"	d	file:
TIMER_CLOCK	include/configs/adp-ag101p.h	/^#define TIMER_CLOCK	/;"	d
TIMER_COMP_VAL	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define TIMER_COMP_VAL	/;"	d
TIMER_COUNTER_CYCLES	arch/openrisc/lib/timer.c	/^#define TIMER_COUNTER_CYCLES /;"	d	file:
TIMER_CTCR_INPUT	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CTCR_INPUT(/;"	d
TIMER_CTCR_MODE_COUNTER_BOTH	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CTCR_MODE_COUNTER_BOTH	/;"	d
TIMER_CTCR_MODE_COUNTER_FALLING	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CTCR_MODE_COUNTER_FALLING	/;"	d
TIMER_CTCR_MODE_COUNTER_RISING	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CTCR_MODE_COUNTER_RISING	/;"	d
TIMER_CTCR_MODE_TIMER	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_CTCR_MODE_TIMER	/;"	d
TIMER_CYCLES_MS	arch/openrisc/lib/timer.c	/^#define TIMER_CYCLES_MS /;"	d	file:
TIMER_CYCLES_US	arch/openrisc/lib/timer.c	/^#define TIMER_CYCLES_US /;"	d	file:
TIMER_D	board/renesas/ecovec/lowlevel_init.S	/^TIMER_D:	.long	64$/;"	l
TIMER_DISABLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER_DISABLE /;"	d
TIMER_DISABLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER_DISABLE /;"	d
TIMER_DISABLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER_DISABLE /;"	d
TIMER_DISABLE	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER_DISABLE /;"	d
TIMER_DISABLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER_DISABLE /;"	d
TIMER_DISABLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER_DISABLE /;"	d
TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER_DISABLE0 /;"	d
TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER_DISABLE0 /;"	d
TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER_DISABLE0 /;"	d
TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER_DISABLE0 /;"	d
TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER_DISABLE0 /;"	d
TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER_DISABLE1 /;"	d
TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER_DISABLE1 /;"	d
TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER_DISABLE1 /;"	d
TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER_DISABLE1 /;"	d
TIMER_DIV	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_DIV /;"	d	file:
TIMER_DOWN_COUNT	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_DOWN_COUNT /;"	d
TIMER_EARLY	drivers/timer/Kconfig	/^config TIMER_EARLY$/;"	c	menu:Timer Support
TIMER_EMR_EM	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_EMR_EM(/;"	d
TIMER_EMR_EMC_CLEAR	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_EMR_EMC_CLEAR(/;"	d
TIMER_EMR_EMC_NOTHING	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_EMR_EMC_NOTHING(/;"	d
TIMER_EMR_EMC_SET	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_EMR_EMC_SET(/;"	d
TIMER_EMR_EMC_TOGGLE	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_EMR_EMC_TOGGLE(/;"	d
TIMER_EN	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_EN /;"	d	file:
TIMER_ENABLE	arch/arm/cpu/arm920t/ep93xx/timer.c	/^#define TIMER_ENABLE	/;"	d	file:
TIMER_ENABLE	arch/arm/mach-versatile/timer.c	/^#define TIMER_ENABLE	/;"	d	file:
TIMER_ENABLE	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_ENABLE /;"	d
TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER_ENABLE0 /;"	d
TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER_ENABLE0 /;"	d
TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER_ENABLE0 /;"	d
TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER_ENABLE0 /;"	d
TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER_ENABLE0 /;"	d
TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER_ENABLE1 /;"	d
TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER_ENABLE1 /;"	d
TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER_ENABLE1 /;"	d
TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER_ENABLE1 /;"	d
TIMER_ENABLE_ALL	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_ENABLE_ALL /;"	d
TIMER_ENABLE_INTR	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_ENABLE_INTR /;"	d
TIMER_EXT_CAPTURE	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_EXT_CAPTURE /;"	d
TIMER_EXT_COMPARE	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_EXT_COMPARE /;"	d
TIMER_FREQ	arch/arm/cpu/arm920t/ep93xx/timer.c	/^#define TIMER_FREQ	/;"	d	file:
TIMER_GLB_CTRL_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_CTRL_OFFSET	/;"	d
TIMER_GLB_HI_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_HI_OFFSET	/;"	d
TIMER_GLB_LOW_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_LOW_OFFSET	/;"	d
TIMER_GLB_TIM_CTRL_AUTO_INC	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_TIM_CTRL_AUTO_INC	/;"	d
TIMER_GLB_TIM_CTRL_COMP_EN	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_TIM_CTRL_COMP_EN	/;"	d
TIMER_GLB_TIM_CTRL_INT_EN	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_TIM_CTRL_INT_EN	/;"	d
TIMER_GLB_TIM_CTRL_PRESC_MASK	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_TIM_CTRL_PRESC_MASK	/;"	d
TIMER_GLB_TIM_CTRL_TIM_EN	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_TIM_CTRL_TIM_EN	/;"	d
TIMER_GLB_TIM_INT_STATUS_SET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_GLB_TIM_INT_STATUS_SET	/;"	d
TIMER_INTERRUPT	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_INTERRUPT /;"	d
TIMER_INT_EN	arch/arm/mach-versatile/timer.c	/^#define TIMER_INT_EN	/;"	d	file:
TIMER_IR_CR	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_IR_CR(/;"	d
TIMER_IR_MR	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_IR_MR(/;"	d
TIMER_LOAD_VAL	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define TIMER_LOAD_VAL /;"	d	file:
TIMER_LOAD_VAL	arch/arm/cpu/arm926ejs/mxs/timer.c	/^#define TIMER_LOAD_VAL /;"	d	file:
TIMER_LOAD_VAL	arch/arm/cpu/arm926ejs/omap/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/cpu/armv7/omap-common/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/cpu/armv7/vf610/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-at91/arm920t/timer.c	/^#define TIMER_LOAD_VAL /;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-at91/arm926ejs/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-at91/armv7/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-davinci/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-mvebu/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-orion5x/timer.c	/^#define TIMER_LOAD_VAL /;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-socfpga/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	arch/arm/mach-zynq/timer.c	/^#define TIMER_LOAD_VAL /;"	d	file:
TIMER_LOAD_VAL	board/armltd/integrator/timer.c	/^#define TIMER_LOAD_VAL	/;"	d	file:
TIMER_LOAD_VAL	include/configs/adp-ag101p.h	/^#define TIMER_LOAD_VAL	/;"	d
TIMER_MARGIN_DEFAULT	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TIMER_MARGIN_DEFAULT	/;"	d
TIMER_MARGIN_MAX	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TIMER_MARGIN_MAX	/;"	d
TIMER_MARGIN_MIN	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TIMER_MARGIN_MIN	/;"	d
TIMER_MASK_MC34708	include/fsl_pmic.h	/^#define TIMER_MASK_MC34708	/;"	d
TIMER_MAX_VAL	arch/arm/cpu/arm920t/ep93xx/timer.c	/^#define TIMER_MAX_VAL	/;"	d	file:
TIMER_MCR_INTERRUPT	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_MCR_INTERRUPT(/;"	d
TIMER_MCR_RESET	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_MCR_RESET(/;"	d
TIMER_MCR_STOP	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_MCR_STOP(/;"	d
TIMER_MODE	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_MODE /;"	d	file:
TIMER_MODE_FR	arch/arm/mach-versatile/timer.c	/^#define TIMER_MODE_FR	/;"	d	file:
TIMER_MODE_MSK	arch/arm/mach-versatile/timer.c	/^#define TIMER_MODE_MSK	/;"	d	file:
TIMER_MODE_PD	arch/arm/mach-versatile/timer.c	/^#define TIMER_MODE_PD	/;"	d	file:
TIMER_MULT_CPU_MASK	arch/arm/include/asm/arch-tegra/pmc.h	/^#define TIMER_MULT_CPU_MASK	/;"	d
TIMER_MULT_CPU_SHIFT	arch/arm/include/asm/arch-tegra/pmc.h	/^#define TIMER_MULT_CPU_SHIFT	/;"	d
TIMER_MULT_MASK	arch/arm/include/asm/arch-tegra/pmc.h	/^#define TIMER_MULT_MASK	/;"	d
TIMER_MULT_SHIFT	arch/arm/include/asm/arch-tegra/pmc.h	/^#define TIMER_MULT_SHIFT	/;"	d
TIMER_NUM	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_NUM	/;"	d	file:
TIMER_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TIMER_OFFSET	/;"	d
TIMER_ONE_SHT	arch/arm/mach-versatile/timer.c	/^#define TIMER_ONE_SHT	/;"	d	file:
TIMER_OVERFLOW_VAL	arch/arm/cpu/armv7/omap-common/timer.c	/^#define TIMER_OVERFLOW_VAL	/;"	d	file:
TIMER_PERIOD	examples/standalone/timer.c	/^#define	TIMER_PERIOD	/;"	d	file:
TIMER_PRESCALE	arch/arm/mach-zynq/timer.c	/^#define TIMER_PRESCALE /;"	d	file:
TIMER_PRS_8S	arch/arm/mach-versatile/timer.c	/^#define TIMER_PRS_8S	/;"	d	file:
TIMER_PRS_MSK	arch/arm/mach-versatile/timer.c	/^#define TIMER_PRS_MSK	/;"	d	file:
TIMER_PVT_COUNTER_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_COUNTER_OFFSET	/;"	d
TIMER_PVT_CTRL_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_CTRL_OFFSET	/;"	d
TIMER_PVT_LOAD_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_LOAD_OFFSET	/;"	d
TIMER_PVT_STATUS_OFFSET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_STATUS_OFFSET	/;"	d
TIMER_PVT_TIM_CTRL_AUTO_RELD	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_TIM_CTRL_AUTO_RELD	/;"	d
TIMER_PVT_TIM_CTRL_INT_EN	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_TIM_CTRL_INT_EN	/;"	d
TIMER_PVT_TIM_CTRL_PRESC_MASK	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_TIM_CTRL_PRESC_MASK	/;"	d
TIMER_PVT_TIM_CTRL_TIM_EN	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_TIM_CTRL_TIM_EN	/;"	d
TIMER_PVT_TIM_INT_STATUS_SET	arch/arm/include/asm/iproc-common/timer.h	/^#define TIMER_PVT_TIM_INT_STATUS_SET	/;"	d
TIMER_PWM	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_PWM /;"	d
TIMER_RELOAD	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_RELOAD /;"	d	file:
TIMER_RELOAD	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_RELOAD /;"	d
TIMER_RESET	arch/microblaze/include/asm/microblaze_timer.h	/^#define TIMER_RESET /;"	d
TIMER_SIZE_MSK	arch/arm/mach-versatile/timer.c	/^#define TIMER_SIZE_MSK	/;"	d	file:
TIMER_SRC	arch/arm/cpu/armv7/sunxi/timer.c	/^#define TIMER_SRC /;"	d	file:
TIMER_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TIMER_STATUS /;"	d
TIMER_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TIMER_STATUS /;"	d
TIMER_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TIMER_STATUS /;"	d
TIMER_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define TIMER_STATUS /;"	d
TIMER_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TIMER_STATUS /;"	d
TIMER_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TIMER_STATUS /;"	d
TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TIMER_STATUS0 /;"	d
TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER_STATUS0 /;"	d
TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER_STATUS0 /;"	d
TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER_STATUS0 /;"	d
TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER_STATUS0 /;"	d
TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TIMER_STATUS1 /;"	d
TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TIMER_STATUS1 /;"	d
TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TIMER_STATUS1 /;"	d
TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TIMER_STATUS1 /;"	d
TIMER_TCR_COUNTER_DISABLE	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_TCR_COUNTER_DISABLE	/;"	d
TIMER_TCR_COUNTER_ENABLE	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_TCR_COUNTER_ENABLE	/;"	d
TIMER_TCR_COUNTER_RESET	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define TIMER_TCR_COUNTER_RESET	/;"	d
TIMER_TIMESTAMP_INC	arch/openrisc/lib/timer.c	/^#define TIMER_TIMESTAMP_INC /;"	d	file:
TIMER_USEC_CFG	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define TIMER_USEC_CFG	/;"	d
TIMER_USEC_CNTR	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define TIMER_USEC_CNTR	/;"	d
TIMES	lib/dhry/dhry.h	/^#define TIMES$/;"	d
TIMESTAMPCOLD_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIMESTAMPCOLD_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define TIMESTAMPCOLD_RESET	/;"	d
TIME_2_CLOCK_CYCLES	drivers/ddr/marvell/a38x/ddr3_training.c	/^#define TIME_2_CLOCK_CYCLES	/;"	d	file:
TIMIL0	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL0	/;"	d
TIMIL1	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL1	/;"	d
TIMIL2	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL2	/;"	d
TIMIL3	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL3	/;"	d
TIMIL4	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL4	/;"	d
TIMIL5	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL5	/;"	d
TIMIL6	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL6	/;"	d
TIMIL7	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIMIL7	/;"	d
TIMING2_0	drivers/mtd/nand/tegra_nand.h	/^#define TIMING2_0	/;"	d
TIMING2_TADL_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING2_TADL_CNT_MASK	/;"	d
TIMING2_TADL_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING2_TADL_CNT_SHIFT	/;"	d
TIMINGAREF_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define TIMINGAREF_VAL	/;"	d
TIMINGDATA_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define	TIMINGDATA_VAL	/;"	d
TIMINGDATA_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define TIMINGDATA_VAL	/;"	d
TIMINGPOWER_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define	TIMINGPOWER_VAL	/;"	d
TIMINGPOWER_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define TIMINGPOWER_VAL	/;"	d
TIMINGREF_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define TIMINGREF_VAL	/;"	d
TIMINGROW_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define TIMINGROW_VAL	/;"	d
TIMINGROW_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define TIMINGROW_VAL	/;"	d
TIMING_0	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_0	/;"	d
TIMING_CASLAT	board/tqc/tqm834x/tqm834x.c	/^#define TIMING_CASLAT	/;"	d	file:
TIMING_CFG0_ACT_PD_EXIT	include/mpc83xx.h	/^#define TIMING_CFG0_ACT_PD_EXIT	/;"	d
TIMING_CFG0_ACT_PD_EXIT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_ACT_PD_EXIT_SHIFT	/;"	d
TIMING_CFG0_MRS_CYC	include/mpc83xx.h	/^#define TIMING_CFG0_MRS_CYC	/;"	d
TIMING_CFG0_MRS_CYC_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_MRS_CYC_SHIFT	/;"	d
TIMING_CFG0_ODT_PD_EXIT	include/mpc83xx.h	/^#define TIMING_CFG0_ODT_PD_EXIT	/;"	d
TIMING_CFG0_ODT_PD_EXIT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_ODT_PD_EXIT_SHIFT	/;"	d
TIMING_CFG0_PRE_PD_EXIT	include/mpc83xx.h	/^#define TIMING_CFG0_PRE_PD_EXIT	/;"	d
TIMING_CFG0_PRE_PD_EXIT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_PRE_PD_EXIT_SHIFT	/;"	d
TIMING_CFG0_RRT	include/mpc83xx.h	/^#define TIMING_CFG0_RRT	/;"	d
TIMING_CFG0_RRT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_RRT_SHIFT	/;"	d
TIMING_CFG0_RWT	include/mpc83xx.h	/^#define TIMING_CFG0_RWT	/;"	d
TIMING_CFG0_RWT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_RWT_SHIFT	/;"	d
TIMING_CFG0_WRT	include/mpc83xx.h	/^#define TIMING_CFG0_WRT	/;"	d
TIMING_CFG0_WRT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_WRT_SHIFT	/;"	d
TIMING_CFG0_WWT	include/mpc83xx.h	/^#define TIMING_CFG0_WWT	/;"	d
TIMING_CFG0_WWT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG0_WWT_SHIFT	/;"	d
TIMING_CFG1_ACTTOACT	include/mpc83xx.h	/^#define TIMING_CFG1_ACTTOACT	/;"	d
TIMING_CFG1_ACTTOACT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_ACTTOACT_SHIFT	/;"	d
TIMING_CFG1_ACTTOPRE	include/mpc83xx.h	/^#define TIMING_CFG1_ACTTOPRE	/;"	d
TIMING_CFG1_ACTTOPRE_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_ACTTOPRE_SHIFT	/;"	d
TIMING_CFG1_ACTTORW	include/mpc83xx.h	/^#define TIMING_CFG1_ACTTORW	/;"	d
TIMING_CFG1_ACTTORW_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_ACTTORW_SHIFT	/;"	d
TIMING_CFG1_CASLAT	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT	/;"	d
TIMING_CFG1_CASLAT_20	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_20	/;"	d
TIMING_CFG1_CASLAT_25	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_25	/;"	d
TIMING_CFG1_CASLAT_30	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_30	/;"	d
TIMING_CFG1_CASLAT_35	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_35	/;"	d
TIMING_CFG1_CASLAT_40	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_40	/;"	d
TIMING_CFG1_CASLAT_45	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_45	/;"	d
TIMING_CFG1_CASLAT_50	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_50	/;"	d
TIMING_CFG1_CASLAT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_CASLAT_SHIFT	/;"	d
TIMING_CFG1_PRETOACT	include/mpc83xx.h	/^#define TIMING_CFG1_PRETOACT	/;"	d
TIMING_CFG1_PRETOACT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_PRETOACT_SHIFT	/;"	d
TIMING_CFG1_REFREC	include/mpc83xx.h	/^#define TIMING_CFG1_REFREC	/;"	d
TIMING_CFG1_REFREC_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_REFREC_SHIFT	/;"	d
TIMING_CFG1_WRREC	include/mpc83xx.h	/^#define TIMING_CFG1_WRREC	/;"	d
TIMING_CFG1_WRREC_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_WRREC_SHIFT	/;"	d
TIMING_CFG1_WRTORD	include/mpc83xx.h	/^#define TIMING_CFG1_WRTORD	/;"	d
TIMING_CFG1_WRTORD_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG1_WRTORD_SHIFT	/;"	d
TIMING_CFG2_ACSM	include/mpc83xx.h	/^#define TIMING_CFG2_ACSM	/;"	d
TIMING_CFG2_ADD_LAT	include/mpc83xx.h	/^#define TIMING_CFG2_ADD_LAT	/;"	d
TIMING_CFG2_ADD_LAT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_ADD_LAT_SHIFT	/;"	d
TIMING_CFG2_CKE_PLS	include/mpc83xx.h	/^#define TIMING_CFG2_CKE_PLS	/;"	d
TIMING_CFG2_CKE_PLS_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_CKE_PLS_SHIFT	/;"	d
TIMING_CFG2_CPO	include/mpc83xx.h	/^#define TIMING_CFG2_CPO	/;"	d
TIMING_CFG2_CPO_DEF	include/mpc83xx.h	/^#define TIMING_CFG2_CPO_DEF	/;"	d
TIMING_CFG2_CPO_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_CPO_SHIFT	/;"	d
TIMING_CFG2_FOUR_ACT	include/mpc83xx.h	/^#define TIMING_CFG2_FOUR_ACT	/;"	d
TIMING_CFG2_FOUR_ACT_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_FOUR_ACT_SHIFT	/;"	d
TIMING_CFG2_RD_TO_PRE	include/mpc83xx.h	/^#define TIMING_CFG2_RD_TO_PRE	/;"	d
TIMING_CFG2_RD_TO_PRE_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_RD_TO_PRE_SHIFT	/;"	d
TIMING_CFG2_WR_DATA_DELAY	include/mpc83xx.h	/^#define TIMING_CFG2_WR_DATA_DELAY	/;"	d
TIMING_CFG2_WR_DATA_DELAY_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_WR_DATA_DELAY_SHIFT	/;"	d
TIMING_CFG2_WR_LAT_DELAY	include/mpc83xx.h	/^#define TIMING_CFG2_WR_LAT_DELAY	/;"	d
TIMING_CFG2_WR_LAT_DELAY_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG2_WR_LAT_DELAY_SHIFT	/;"	d
TIMING_CFG3_EXT_REFREC	include/mpc83xx.h	/^#define TIMING_CFG3_EXT_REFREC	/;"	d
TIMING_CFG3_EXT_REFREC_SHIFT	include/mpc83xx.h	/^#define TIMING_CFG3_EXT_REFREC_SHIFT	/;"	d
TIMING_CFG_2_CPO_MASK	include/fsl_ddr_sdram.h	/^#define TIMING_CFG_2_CPO_MASK	/;"	d
TIMING_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TIMING_REG	/;"	d
TIMING_TCR_TAR_TRR_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TCR_TAR_TRR_CNT_MASK	/;"	d
TIMING_TCR_TAR_TRR_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TCR_TAR_TRR_CNT_SHIFT	/;"	d
TIMING_TCS_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TCS_CNT_MASK	/;"	d
TIMING_TCS_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TCS_CNT_SHIFT	/;"	d
TIMING_TRH_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TRH_CNT_MASK	/;"	d
TIMING_TRH_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TRH_CNT_SHIFT	/;"	d
TIMING_TRP_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TRP_CNT_MASK	/;"	d
TIMING_TRP_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TRP_CNT_SHIFT	/;"	d
TIMING_TRP_RESP_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TRP_RESP_CNT_MASK	/;"	d
TIMING_TRP_RESP_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TRP_RESP_CNT_SHIFT	/;"	d
TIMING_TWB_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWB_CNT_MASK	/;"	d
TIMING_TWB_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWB_CNT_SHIFT	/;"	d
TIMING_TWHR_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWHR_CNT_MASK	/;"	d
TIMING_TWHR_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWHR_CNT_SHIFT	/;"	d
TIMING_TWH_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWH_CNT_MASK	/;"	d
TIMING_TWH_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWH_CNT_SHIFT	/;"	d
TIMING_TWP_CNT_MASK	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWP_CNT_MASK	/;"	d
TIMING_TWP_CNT_SHIFT	drivers/mtd/nand/tegra_nand.h	/^#define TIMING_TWP_CNT_SHIFT	/;"	d
TIMOD	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define	TIMOD	/;"	d
TIMROT_FIXED_COUNTn_FIXED_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_FIXED_COUNTn_FIXED_COUNT_MASK	/;"	d
TIMROT_FIXED_COUNTn_FIXED_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_FIXED_COUNTn_FIXED_COUNT_OFFSET	/;"	d
TIMROT_MATCH_COUNTn_MATCH_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_MATCH_COUNTn_MATCH_COUNT_MASK	/;"	d
TIMROT_MATCH_COUNTn_MATCH_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_MATCH_COUNTn_MATCH_COUNT_OFFSET	/;"	d
TIMROT_ROTCOUNT_UPDOWN_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCOUNT_UPDOWN_MASK	/;"	d
TIMROT_ROTCOUNT_UPDOWN_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCOUNT_UPDOWN_OFFSET	/;"	d
TIMROT_ROTCTRL_CLKGATE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_CLKGATE	/;"	d
TIMROT_ROTCTRL_DIVIDER_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_DIVIDER_MASK	/;"	d
TIMROT_ROTCTRL_DIVIDER_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_DIVIDER_OFFSET	/;"	d
TIMROT_ROTCTRL_OVERSAMPLE_1X	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_OVERSAMPLE_1X	/;"	d
TIMROT_ROTCTRL_OVERSAMPLE_2X	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_OVERSAMPLE_2X	/;"	d
TIMROT_ROTCTRL_OVERSAMPLE_4X	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_OVERSAMPLE_4X	/;"	d
TIMROT_ROTCTRL_OVERSAMPLE_8X	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_OVERSAMPLE_8X	/;"	d
TIMROT_ROTCTRL_OVERSAMPLE_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_OVERSAMPLE_MASK	/;"	d
TIMROT_ROTCTRL_OVERSAMPLE_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_OVERSAMPLE_OFFSET	/;"	d
TIMROT_ROTCTRL_POLARITY_A	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_POLARITY_A	/;"	d
TIMROT_ROTCTRL_POLARITY_B	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_POLARITY_B	/;"	d
TIMROT_ROTCTRL_RELATIVE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_RELATIVE	/;"	d
TIMROT_ROTCTRL_ROTARY_PRESENT	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_ROTARY_PRESENT	/;"	d
TIMROT_ROTCTRL_SELECT_A_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_MASK	/;"	d
TIMROT_ROTCTRL_SELECT_A_NEVER_TICK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_NEVER_TICK	/;"	d
TIMROT_ROTCTRL_SELECT_A_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_OFFSET	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM0	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM0	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM1	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM2	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM3	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM3	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM4	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM5	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM5	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM6	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM6	/;"	d
TIMROT_ROTCTRL_SELECT_A_PWM7	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_PWM7	/;"	d
TIMROT_ROTCTRL_SELECT_A_ROTARYA	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_ROTARYA	/;"	d
TIMROT_ROTCTRL_SELECT_A_ROTARYB	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_A_ROTARYB	/;"	d
TIMROT_ROTCTRL_SELECT_B_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_MASK	/;"	d
TIMROT_ROTCTRL_SELECT_B_NEVER_TICK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_NEVER_TICK	/;"	d
TIMROT_ROTCTRL_SELECT_B_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_OFFSET	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM0	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM0	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM1	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM2	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM3	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM3	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM4	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM5	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM5	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM6	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM6	/;"	d
TIMROT_ROTCTRL_SELECT_B_PWM7	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_PWM7	/;"	d
TIMROT_ROTCTRL_SELECT_B_ROTARYA	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_ROTARYA	/;"	d
TIMROT_ROTCTRL_SELECT_B_ROTARYB	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SELECT_B_ROTARYB	/;"	d
TIMROT_ROTCTRL_SFTRST	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_SFTRST	/;"	d
TIMROT_ROTCTRL_STATE_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_STATE_MASK	/;"	d
TIMROT_ROTCTRL_STATE_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_STATE_OFFSET	/;"	d
TIMROT_ROTCTRL_TIM0_PRESENT	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_TIM0_PRESENT	/;"	d
TIMROT_ROTCTRL_TIM1_PRESENT	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_TIM1_PRESENT	/;"	d
TIMROT_ROTCTRL_TIM2_PRESENT	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_TIM2_PRESENT	/;"	d
TIMROT_ROTCTRL_TIM3_PRESENT	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_ROTCTRL_TIM3_PRESENT	/;"	d
TIMROT_RUNNING_COUNTn_RUNNING_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_RUNNING_COUNTn_RUNNING_COUNT_MASK	/;"	d
TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET	/;"	d
TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_MASK	/;"	d
TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_OFFSET	/;"	d
TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_MASK	/;"	d
TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_OFFSET	/;"	d
TIMROT_TIMCTRL3_DUTU_VALID	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_DUTU_VALID	/;"	d
TIMROT_TIMCTRL3_DUTY_CYCLE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_DUTY_CYCLE	/;"	d
TIMROT_TIMCTRL3_IRQ	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_IRQ	/;"	d
TIMROT_TIMCTRL3_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_IRQ_EN	/;"	d
TIMROT_TIMCTRL3_POLARITY_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_POLARITY_MASK	/;"	d
TIMROT_TIMCTRL3_POLARITY_NEGATIVE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_POLARITY_NEGATIVE	/;"	d
TIMROT_TIMCTRL3_POLARITY_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_POLARITY_OFFSET	/;"	d
TIMROT_TIMCTRL3_POLARITY_POSITIVE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_POLARITY_POSITIVE	/;"	d
TIMROT_TIMCTRL3_PRESCALE_DIV_BY_1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_1	/;"	d
TIMROT_TIMCTRL3_PRESCALE_DIV_BY_2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_2	/;"	d
TIMROT_TIMCTRL3_PRESCALE_DIV_BY_4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_4	/;"	d
TIMROT_TIMCTRL3_PRESCALE_DIV_BY_8	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_PRESCALE_DIV_BY_8	/;"	d
TIMROT_TIMCTRL3_PRESCALE_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_PRESCALE_MASK	/;"	d
TIMROT_TIMCTRL3_PRESCALE_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_PRESCALE_OFFSET	/;"	d
TIMROT_TIMCTRL3_RELOAD	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_RELOAD	/;"	d
TIMROT_TIMCTRL3_SELECT_1KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_1KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_SELECT_32KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_32KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_SELECT_4KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_4KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_SELECT_8KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_8KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_MASK	/;"	d
TIMROT_TIMCTRL3_SELECT_NEVER_TICK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_NEVER_TICK	/;"	d
TIMROT_TIMCTRL3_SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_OFFSET	/;"	d
TIMROT_TIMCTRL3_SELECT_PWM0	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_PWM0	/;"	d
TIMROT_TIMCTRL3_SELECT_PWM1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_PWM1	/;"	d
TIMROT_TIMCTRL3_SELECT_PWM2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_PWM2	/;"	d
TIMROT_TIMCTRL3_SELECT_PWM3	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_PWM3	/;"	d
TIMROT_TIMCTRL3_SELECT_PWM4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_PWM4	/;"	d
TIMROT_TIMCTRL3_SELECT_ROTARYA	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_ROTARYA	/;"	d
TIMROT_TIMCTRL3_SELECT_ROTARYB	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_ROTARYB	/;"	d
TIMROT_TIMCTRL3_SELECT_TICK_ALWAYS	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_SELECT_TICK_ALWAYS	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_1KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_1KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_32KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_32KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_4KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_4KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_8KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_8KHZ_XTAL	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_MASK	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_NEVER_TICK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_NEVER_TICK	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_OFFSET	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM0	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM0	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM1	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM2	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM3	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM3	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM4	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM5	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM5	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM6	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM6	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_PWM7	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_PWM7	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYA	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYA	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYB	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYB	/;"	d
TIMROT_TIMCTRL3_TEST_SIGNAL_TICK_ALWAYS	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_TEST_SIGNAL_TICK_ALWAYS	/;"	d
TIMROT_TIMCTRL3_UPDATE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRL3_UPDATE	/;"	d
TIMROT_TIMCTRLn_IRQ	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_IRQ	/;"	d
TIMROT_TIMCTRLn_IRQ_EN	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_IRQ_EN	/;"	d
TIMROT_TIMCTRLn_MATCH_MODE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_MATCH_MODE	/;"	d
TIMROT_TIMCTRLn_POLARITY	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_POLARITY	/;"	d
TIMROT_TIMCTRLn_PRESCALE_DIV_BY_1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_1	/;"	d
TIMROT_TIMCTRLn_PRESCALE_DIV_BY_2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_2	/;"	d
TIMROT_TIMCTRLn_PRESCALE_DIV_BY_4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_4	/;"	d
TIMROT_TIMCTRLn_PRESCALE_DIV_BY_8	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_PRESCALE_DIV_BY_8	/;"	d
TIMROT_TIMCTRLn_PRESCALE_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_PRESCALE_MASK	/;"	d
TIMROT_TIMCTRLn_PRESCALE_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_PRESCALE_OFFSET	/;"	d
TIMROT_TIMCTRLn_RELOAD	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_RELOAD	/;"	d
TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL	/;"	d
TIMROT_TIMCTRLn_SELECT_32KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_32KHZ_XTAL	/;"	d
TIMROT_TIMCTRLn_SELECT_4KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_4KHZ_XTAL	/;"	d
TIMROT_TIMCTRLn_SELECT_8KHZ_XTAL	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_8KHZ_XTAL	/;"	d
TIMROT_TIMCTRLn_SELECT_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_MASK	/;"	d
TIMROT_TIMCTRLn_SELECT_NEVER_TICK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_NEVER_TICK	/;"	d
TIMROT_TIMCTRLn_SELECT_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_OFFSET	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM0	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM0	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM1	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM1	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM2	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM2	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM3	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM3	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM4	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM4	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM5	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM5	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM6	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM6	/;"	d
TIMROT_TIMCTRLn_SELECT_PWM7	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_PWM7	/;"	d
TIMROT_TIMCTRLn_SELECT_ROTARYA	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_ROTARYA	/;"	d
TIMROT_TIMCTRLn_SELECT_ROTARYB	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_ROTARYB	/;"	d
TIMROT_TIMCTRLn_SELECT_TICK_ALWAYS	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_SELECT_TICK_ALWAYS	/;"	d
TIMROT_TIMCTRLn_UPDATE	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_TIMCTRLn_UPDATE	/;"	d
TIMROT_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_VERSION_MAJOR_MASK	/;"	d
TIMROT_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_VERSION_MAJOR_OFFSET	/;"	d
TIMROT_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_VERSION_MINOR_MASK	/;"	d
TIMROT_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_VERSION_MINOR_OFFSET	/;"	d
TIMROT_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_VERSION_STEP_MASK	/;"	d
TIMROT_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define	TIMROT_VERSION_STEP_OFFSET	/;"	d
TIM_CLK_DIV	arch/arm/mach-davinci/timer.c	/^#define TIM_CLK_DIV	/;"	d	file:
TIM_CR1_CEN	arch/arm/mach-stm32/stm32f1/timer.c	/^#define TIM_CR1_CEN	/;"	d	file:
TIM_CR1_CEN	arch/arm/mach-stm32/stm32f4/timer.c	/^#define TIM_CR1_CEN	/;"	d	file:
TIM_DIV_SHIFT	drivers/i2c/kona_i2c.c	/^#define TIM_DIV_SHIFT	/;"	d	file:
TIM_EGR_UG	arch/arm/include/asm/arch-stm32f7/gpt.h	/^#define TIM_EGR_UG	/;"	d
TIM_EGR_UG	arch/arm/mach-stm32/stm32f1/timer.c	/^#define TIM_EGR_UG	/;"	d	file:
TIM_EGR_UG	arch/arm/mach-stm32/stm32f4/timer.c	/^#define TIM_EGR_UG	/;"	d	file:
TIM_NO_DIV_SHIFT	drivers/i2c/kona_i2c.c	/^#define TIM_NO_DIV_SHIFT	/;"	d	file:
TIM_OFFSET	drivers/i2c/kona_i2c.c	/^#define TIM_OFFSET	/;"	d	file:
TIM_PRESCALE_SHIFT	drivers/i2c/kona_i2c.c	/^#define TIM_PRESCALE_SHIFT	/;"	d	file:
TIM_P_SHIFT	drivers/i2c/kona_i2c.c	/^#define TIM_P_SHIFT	/;"	d	file:
TINCANTOOLS_SHOWDOG	board/ti/beagle/beagle.c	/^#define TINCANTOOLS_SHOWDOG	/;"	d	file:
TINCANTOOLS_TRAINER	board/ti/beagle/beagle.c	/^#define TINCANTOOLS_TRAINER	/;"	d	file:
TINCANTOOLS_ZIPPY	board/ti/beagle/beagle.c	/^#define TINCANTOOLS_ZIPPY	/;"	d	file:
TINCANTOOLS_ZIPPY2	board/ti/beagle/beagle.c	/^#define TINCANTOOLS_ZIPPY2	/;"	d	file:
TINIT_CNTR0_VAL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/denx/mcvevk/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/ebv/socrates/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/is1/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/sr1500/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR0_VAL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL /;"	d
TINIT_CNTR0_VAL	board/terasic/sockit/qts/sdram_config.h	/^#define TINIT_CNTR0_VAL	/;"	d
TINIT_CNTR1_VAL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/denx/mcvevk/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/ebv/socrates/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/is1/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/sr1500/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR1_VAL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL /;"	d
TINIT_CNTR1_VAL	board/terasic/sockit/qts/sdram_config.h	/^#define TINIT_CNTR1_VAL	/;"	d
TINIT_CNTR2_VAL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/denx/mcvevk/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/ebv/socrates/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/is1/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/sr1500/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TINIT_CNTR2_VAL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL /;"	d
TINIT_CNTR2_VAL	board/terasic/sockit/qts/sdram_config.h	/^#define TINIT_CNTR2_VAL	/;"	d
TIN_SEL	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TIN_SEL	/;"	d
TIR	include/lattice.h	/^#define TIR	/;"	d
TISE_AF_R	drivers/net/xilinx_ll_temac.h	/^#define TISE_AF_R	/;"	d
TISE_AF_W	drivers/net/xilinx_ll_temac.h	/^#define TISE_AF_W	/;"	d
TISE_CFG_R	drivers/net/xilinx_ll_temac.h	/^#define TISE_CFG_R	/;"	d
TISE_CFG_W	drivers/net/xilinx_ll_temac.h	/^#define TISE_CFG_W	/;"	d
TISE_FABR_R	drivers/net/xilinx_ll_temac.h	/^#define TISE_FABR_R	/;"	d
TISE_MIIM_R	drivers/net/xilinx_ll_temac.h	/^#define TISE_MIIM_R	/;"	d
TISE_MIIM_W	drivers/net/xilinx_ll_temac.h	/^#define TISE_MIIM_W	/;"	d
TIS_ACCESS_ACTIVE_LOCALITY	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_ACTIVE_LOCALITY /;"	d	file:
TIS_ACCESS_BEEN_SEIZED	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_BEEN_SEIZED /;"	d	file:
TIS_ACCESS_PENDING_REQUEST	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_PENDING_REQUEST /;"	d	file:
TIS_ACCESS_REQUEST_USE	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_REQUEST_USE /;"	d	file:
TIS_ACCESS_SEIZE	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_SEIZE /;"	d	file:
TIS_ACCESS_TPM_ESTABLISHMENT	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_TPM_ESTABLISHMENT /;"	d	file:
TIS_ACCESS_TPM_REG_VALID_STS	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_ACCESS_TPM_REG_VALID_STS /;"	d	file:
TIS_LONG_TIMEOUT_MS	drivers/tpm/tpm_tis.h	/^	TIS_LONG_TIMEOUT_MS		= 2000,$/;"	e	enum:tpm_timeout
TIS_SHORT_TIMEOUT_MS	drivers/tpm/tpm_tis.h	/^	TIS_SHORT_TIMEOUT_MS		= 750,$/;"	e	enum:tpm_timeout
TIS_STS_BURST_COUNT_MASK	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_BURST_COUNT_MASK /;"	d	file:
TIS_STS_BURST_COUNT_SHIFT	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_BURST_COUNT_SHIFT /;"	d	file:
TIS_STS_COMMAND_READY	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_COMMAND_READY /;"	d	file:
TIS_STS_DATA_AVAILABLE	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_DATA_AVAILABLE /;"	d	file:
TIS_STS_EXPECT	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_EXPECT /;"	d	file:
TIS_STS_RESPONSE_RETRY	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_RESPONSE_RETRY /;"	d	file:
TIS_STS_TPM_GO	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_TPM_GO /;"	d	file:
TIS_STS_VALID	drivers/tpm/tpm_tis_lpc.c	/^#define TIS_STS_VALID /;"	d	file:
TIZEN_LOGO_16BPP_HEIGHT	lib/tizen/tizen_logo_16bpp.h	/^#define TIZEN_LOGO_16BPP_HEIGHT	/;"	d
TIZEN_LOGO_16BPP_WIDTH	lib/tizen/tizen_logo_16bpp.h	/^#define TIZEN_LOGO_16BPP_WIDTH	/;"	d
TIZEN_LOGO_16BPP_X_OFFSET	lib/tizen/tizen_logo_16bpp.h	/^#define TIZEN_LOGO_16BPP_X_OFFSET	/;"	d
TIZEN_LOGO_16BPP_Y_OFFSET	lib/tizen/tizen_logo_16bpp.h	/^#define TIZEN_LOGO_16BPP_Y_OFFSET	/;"	d
TI_AEMIF	drivers/memory/Kconfig	/^config TI_AEMIF$/;"	c	menu:Memory Controller drivers
TI_ARMV7_DRAM_ADDR_SPACE_END	arch/arm/include/asm/ti-common/sys_proto.h	/^#define TI_ARMV7_DRAM_ADDR_SPACE_END	/;"	d
TI_ARMV7_DRAM_ADDR_SPACE_START	arch/arm/include/asm/ti-common/sys_proto.h	/^#define TI_ARMV7_DRAM_ADDR_SPACE_START	/;"	d
TI_DEAD_EEPROM_MAGIC	board/ti/common/board_detect.h	/^#define TI_DEAD_EEPROM_MAGIC	/;"	d
TI_EDMA3	drivers/dma/Kconfig	/^config TI_EDMA3$/;"	c	menu:DMA Support
TI_EEPROM_DATA	board/ti/common/board_detect.h	/^#define TI_EEPROM_DATA /;"	d
TI_EEPROM_HDR_CONFIG_LEN	board/ti/common/board_detect.h	/^#define TI_EEPROM_HDR_CONFIG_LEN	/;"	d
TI_EEPROM_HDR_ETH_ALEN	board/ti/common/board_detect.h	/^#define TI_EEPROM_HDR_ETH_ALEN	/;"	d
TI_EEPROM_HDR_NAME_LEN	board/ti/common/board_detect.h	/^#define TI_EEPROM_HDR_NAME_LEN	/;"	d
TI_EEPROM_HDR_NO_OF_MAC_ADDR	board/ti/common/board_detect.h	/^#define TI_EEPROM_HDR_NO_OF_MAC_ADDR	/;"	d
TI_EEPROM_HDR_REV_LEN	board/ti/common/board_detect.h	/^#define TI_EEPROM_HDR_REV_LEN	/;"	d
TI_EEPROM_HDR_SERIAL_LEN	board/ti/common/board_detect.h	/^#define TI_EEPROM_HDR_SERIAL_LEN	/;"	d
TI_EEPROM_HEADER_MAGIC	board/ti/common/board_detect.h	/^#define TI_EEPROM_HEADER_MAGIC	/;"	d
TI_I2C_BOARD_DETECT	board/ti/common/Kconfig	/^config TI_I2C_BOARD_DETECT$/;"	c
TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ	arch/arm/cpu/armv7/omap5/fdt.c	/^#define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ /;"	d	file:
TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ	include/configs/ti_omap5_common.h	/^#define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ	/;"	d
TI_QSPI	drivers/spi/Kconfig	/^config TI_QSPI$/;"	c	menu:SPI Support
TI_SATA_CDRLOCK	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_CDRLOCK	/;"	d
TI_SATA_IDLE_FORCE	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_IDLE_FORCE	/;"	d
TI_SATA_IDLE_NO	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_IDLE_NO	/;"	d
TI_SATA_IDLE_SMART	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_IDLE_SMART	/;"	d
TI_SATA_IDLE_SMART_WAKE	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_IDLE_SMART_WAKE	/;"	d
TI_SATA_PLLCTRL_BASE	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_PLLCTRL_BASE	/;"	d
TI_SATA_STANDBY_FORCE	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_STANDBY_FORCE	/;"	d
TI_SATA_STANDBY_NO	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_STANDBY_NO	/;"	d
TI_SATA_STANDBY_SMART	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_STANDBY_SMART	/;"	d
TI_SATA_STANDBY_SMART_WAKE	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_STANDBY_SMART_WAKE	/;"	d
TI_SATA_SYSCONFIG	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_SYSCONFIG	/;"	d
TI_SATA_SYSCONFIG_IDLE_MASK	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_SYSCONFIG_IDLE_MASK	/;"	d
TI_SATA_SYSCONFIG_OVERRIDE0	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_SYSCONFIG_OVERRIDE0	/;"	d
TI_SATA_SYSCONFIG_STANDBY_MASK	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_SYSCONFIG_STANDBY_MASK	/;"	d
TI_SATA_WRAPPER_BASE	arch/arm/include/asm/arch-omap5/sata.h	/^#define TI_SATA_WRAPPER_BASE	/;"	d
TI_SECURE_DEVICE	arch/arm/cpu/armv7/omap-common/Kconfig	/^config TI_SECURE_DEVICE$/;"	c
TI_SECURE_EMIF_PROTECTED_REGION_SIZE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_PROTECTED_REGION_SIZE$/;"	c
TI_SECURE_EMIF_REGION_START	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_REGION_START$/;"	c
TI_SECURE_EMIF_TOTAL_REGION_SIZE	arch/arm/cpu/armv7/omap5/Kconfig	/^config TI_SECURE_EMIF_TOTAL_REGION_SIZE$/;"	c
TItype	arch/arc/lib/libgcc2.h	/^typedef		 int TItype	__attribute__ ((mode (TI)));$/;"	t	typeref:typename:int
TKR	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                       TKR /;"	d
TKW	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                       TKW /;"	d
TLB0	arch/powerpc/include/asm/mmu.h	/^#define TLB0(/;"	d
TLB1	arch/powerpc/include/asm/mmu.h	/^#define TLB1(/;"	d
TLB2	arch/powerpc/include/asm/mmu.h	/^#define TLB2(/;"	d
TLBIVAX_ALL	arch/powerpc/include/asm/mmu.h	/^#define TLBIVAX_ALL	/;"	d
TLBIVAX_TLB0	arch/powerpc/include/asm/mmu.h	/^#define TLBIVAX_TLB0	/;"	d
TLBIVAX_TLB1	arch/powerpc/include/asm/mmu.h	/^#define TLBIVAX_TLB1	/;"	d
TLBRE	arch/powerpc/include/asm/mmu.h	/^#define TLBRE(/;"	d
TLBSX	arch/powerpc/include/asm/mmu.h	/^#define TLBSX(/;"	d
TLBSXDOT	arch/powerpc/include/asm/mmu.h	/^#define TLBSXDOT(/;"	d
TLBWE	arch/powerpc/include/asm/mmu.h	/^#define TLBWE(/;"	d
TLB_16KB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_16KB_ALIGN_MASK /;"	d
TLB_16KB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_16KB_ALIGN_MASK	/;"	d
TLB_16KB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_16KB_SIZE /;"	d
TLB_16KB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_16KB_SIZE	/;"	d
TLB_16MB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_16MB_ALIGN_MASK /;"	d
TLB_16MB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_16MB_ALIGN_MASK	/;"	d
TLB_16MB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_16MB_SIZE /;"	d
TLB_16MB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_16MB_SIZE	/;"	d
TLB_1KB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_1KB_ALIGN_MASK /;"	d
TLB_1KB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_1KB_ALIGN_MASK	/;"	d
TLB_1KB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_1KB_SIZE /;"	d
TLB_1KB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_1KB_SIZE	/;"	d
TLB_1MB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_1MB_ALIGN_MASK /;"	d
TLB_1MB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_1MB_ALIGN_MASK	/;"	d
TLB_1MB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_1MB_SIZE /;"	d
TLB_1MB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_1MB_SIZE	/;"	d
TLB_256KB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_256KB_ALIGN_MASK /;"	d
TLB_256KB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_256KB_ALIGN_MASK	/;"	d
TLB_256KB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_256KB_SIZE /;"	d
TLB_256KB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_256KB_SIZE	/;"	d
TLB_256MB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_256MB_ALIGN_MASK /;"	d
TLB_256MB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_256MB_ALIGN_MASK	/;"	d
TLB_256MB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_256MB_SIZE /;"	d
TLB_256MB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_256MB_SIZE	/;"	d
TLB_4KB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_4KB_ALIGN_MASK /;"	d
TLB_4KB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_4KB_ALIGN_MASK	/;"	d
TLB_4KB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_4KB_SIZE /;"	d
TLB_4KB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_4KB_SIZE	/;"	d
TLB_64KB_ALIGN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_64KB_ALIGN_MASK /;"	d
TLB_64KB_ALIGN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_64KB_ALIGN_MASK	/;"	d
TLB_64KB_SIZE	arch/powerpc/include/asm/mmu.h	/^#define TLB_64KB_SIZE /;"	d
TLB_64KB_SIZE	board/amcc/yucca/yucca.h	/^#define TLB_64KB_SIZE	/;"	d
TLB_MAP_IO	arch/powerpc/include/asm/mmu.h	/^	TLB_MAP_IO,$/;"	e	enum:tlb_map_type
TLB_MAP_RAM	arch/powerpc/include/asm/mmu.h	/^	TLB_MAP_RAM,$/;"	e	enum:tlb_map_type
TLB_VALID	arch/powerpc/include/asm/mmu.h	/^#define TLB_VALID /;"	d
TLB_WORD0_EPN_DECODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_EPN_DECODE(/;"	d
TLB_WORD0_EPN_DECODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_EPN_DECODE(/;"	d
TLB_WORD0_EPN_ENCODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_EPN_ENCODE(/;"	d
TLB_WORD0_EPN_ENCODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_EPN_ENCODE(/;"	d
TLB_WORD0_EPN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_EPN_MASK /;"	d
TLB_WORD0_EPN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_EPN_MASK	/;"	d
TLB_WORD0_SIZE_16KB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_16KB /;"	d
TLB_WORD0_SIZE_16KB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_16KB	/;"	d
TLB_WORD0_SIZE_16MB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_16MB /;"	d
TLB_WORD0_SIZE_16MB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_16MB	/;"	d
TLB_WORD0_SIZE_1KB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_1KB /;"	d
TLB_WORD0_SIZE_1KB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_1KB	/;"	d
TLB_WORD0_SIZE_1MB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_1MB /;"	d
TLB_WORD0_SIZE_1MB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_1MB	/;"	d
TLB_WORD0_SIZE_256KB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_256KB /;"	d
TLB_WORD0_SIZE_256KB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_256KB	/;"	d
TLB_WORD0_SIZE_256MB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_256MB /;"	d
TLB_WORD0_SIZE_256MB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_256MB	/;"	d
TLB_WORD0_SIZE_4KB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_4KB /;"	d
TLB_WORD0_SIZE_4KB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_4KB	/;"	d
TLB_WORD0_SIZE_64KB	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_64KB /;"	d
TLB_WORD0_SIZE_64KB	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_64KB	/;"	d
TLB_WORD0_SIZE_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_SIZE_MASK /;"	d
TLB_WORD0_SIZE_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_SIZE_MASK	/;"	d
TLB_WORD0_TPAR_DECODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_TPAR_DECODE(/;"	d
TLB_WORD0_TPAR_DECODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_TPAR_DECODE(/;"	d
TLB_WORD0_TPAR_ENCODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_TPAR_ENCODE(/;"	d
TLB_WORD0_TPAR_ENCODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_TPAR_ENCODE(/;"	d
TLB_WORD0_TPAR_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_TPAR_MASK /;"	d
TLB_WORD0_TPAR_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_TPAR_MASK	/;"	d
TLB_WORD0_TS_0	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_TS_0 /;"	d
TLB_WORD0_TS_0	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_TS_0	/;"	d
TLB_WORD0_TS_1	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_TS_1 /;"	d
TLB_WORD0_TS_1	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_TS_1	/;"	d
TLB_WORD0_TS_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_TS_MASK /;"	d
TLB_WORD0_TS_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_TS_MASK	/;"	d
TLB_WORD0_V_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_V_DISABLE /;"	d
TLB_WORD0_V_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_V_DISABLE	/;"	d
TLB_WORD0_V_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_V_ENABLE /;"	d
TLB_WORD0_V_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_V_ENABLE	/;"	d
TLB_WORD0_V_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD0_V_MASK /;"	d
TLB_WORD0_V_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD0_V_MASK	/;"	d
TLB_WORD1_ERPN_DECODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_ERPN_DECODE(/;"	d
TLB_WORD1_ERPN_DECODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_ERPN_DECODE(/;"	d
TLB_WORD1_ERPN_ENCODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_ERPN_ENCODE(/;"	d
TLB_WORD1_ERPN_ENCODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_ERPN_ENCODE(/;"	d
TLB_WORD1_ERPN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_ERPN_MASK /;"	d
TLB_WORD1_ERPN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_ERPN_MASK	/;"	d
TLB_WORD1_PAR1_0	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_0 /;"	d
TLB_WORD1_PAR1_0	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_0	/;"	d
TLB_WORD1_PAR1_1	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_1 /;"	d
TLB_WORD1_PAR1_1	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_1	/;"	d
TLB_WORD1_PAR1_2	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_2 /;"	d
TLB_WORD1_PAR1_2	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_2	/;"	d
TLB_WORD1_PAR1_3	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_3 /;"	d
TLB_WORD1_PAR1_3	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_3	/;"	d
TLB_WORD1_PAR1_DECODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_DECODE(/;"	d
TLB_WORD1_PAR1_DECODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_DECODE(/;"	d
TLB_WORD1_PAR1_ENCODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_ENCODE(/;"	d
TLB_WORD1_PAR1_ENCODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_ENCODE(/;"	d
TLB_WORD1_PAR1_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_PAR1_MASK /;"	d
TLB_WORD1_PAR1_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_PAR1_MASK	/;"	d
TLB_WORD1_RPN_DECODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_RPN_DECODE(/;"	d
TLB_WORD1_RPN_DECODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_RPN_DECODE(/;"	d
TLB_WORD1_RPN_ENCODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_RPN_ENCODE(/;"	d
TLB_WORD1_RPN_ENCODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_RPN_ENCODE(/;"	d
TLB_WORD1_RPN_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD1_RPN_MASK /;"	d
TLB_WORD1_RPN_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD1_RPN_MASK	/;"	d
TLB_WORD2_E_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_E_DISABLE /;"	d
TLB_WORD2_E_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_E_DISABLE	/;"	d
TLB_WORD2_E_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_E_ENABLE /;"	d
TLB_WORD2_E_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_E_ENABLE	/;"	d
TLB_WORD2_E_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_E_MASK /;"	d
TLB_WORD2_E_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_E_MASK	/;"	d
TLB_WORD2_G_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_G_DISABLE /;"	d
TLB_WORD2_G_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_G_DISABLE	/;"	d
TLB_WORD2_G_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_G_ENABLE /;"	d
TLB_WORD2_G_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_G_ENABLE	/;"	d
TLB_WORD2_G_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_G_MASK /;"	d
TLB_WORD2_G_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_G_MASK	/;"	d
TLB_WORD2_I_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_I_DISABLE /;"	d
TLB_WORD2_I_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_I_DISABLE	/;"	d
TLB_WORD2_I_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_I_ENABLE /;"	d
TLB_WORD2_I_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_I_ENABLE	/;"	d
TLB_WORD2_I_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_I_MASK /;"	d
TLB_WORD2_I_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_I_MASK	/;"	d
TLB_WORD2_M_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_M_DISABLE /;"	d
TLB_WORD2_M_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_M_DISABLE	/;"	d
TLB_WORD2_M_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_M_ENABLE /;"	d
TLB_WORD2_M_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_M_ENABLE	/;"	d
TLB_WORD2_M_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_M_MASK /;"	d
TLB_WORD2_M_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_M_MASK	/;"	d
TLB_WORD2_PAR2_0	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_0 /;"	d
TLB_WORD2_PAR2_0	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_0	/;"	d
TLB_WORD2_PAR2_1	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_1 /;"	d
TLB_WORD2_PAR2_1	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_1	/;"	d
TLB_WORD2_PAR2_2	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_2 /;"	d
TLB_WORD2_PAR2_2	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_2	/;"	d
TLB_WORD2_PAR2_3	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_3 /;"	d
TLB_WORD2_PAR2_3	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_3	/;"	d
TLB_WORD2_PAR2_DECODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_DECODE(/;"	d
TLB_WORD2_PAR2_DECODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_DECODE(/;"	d
TLB_WORD2_PAR2_ENCODE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_ENCODE(/;"	d
TLB_WORD2_PAR2_ENCODE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_ENCODE(/;"	d
TLB_WORD2_PAR2_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_PAR2_MASK /;"	d
TLB_WORD2_PAR2_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_PAR2_MASK	/;"	d
TLB_WORD2_SR_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SR_DISABLE /;"	d
TLB_WORD2_SR_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SR_DISABLE	/;"	d
TLB_WORD2_SR_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SR_ENABLE /;"	d
TLB_WORD2_SR_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SR_ENABLE	/;"	d
TLB_WORD2_SR_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SR_MASK /;"	d
TLB_WORD2_SR_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SR_MASK	/;"	d
TLB_WORD2_SW_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SW_DISABLE /;"	d
TLB_WORD2_SW_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SW_DISABLE	/;"	d
TLB_WORD2_SW_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SW_ENABLE /;"	d
TLB_WORD2_SW_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SW_ENABLE	/;"	d
TLB_WORD2_SW_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SW_MASK /;"	d
TLB_WORD2_SW_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SW_MASK	/;"	d
TLB_WORD2_SX_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SX_DISABLE /;"	d
TLB_WORD2_SX_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SX_DISABLE	/;"	d
TLB_WORD2_SX_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SX_ENABLE /;"	d
TLB_WORD2_SX_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SX_ENABLE	/;"	d
TLB_WORD2_SX_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_SX_MASK /;"	d
TLB_WORD2_SX_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_SX_MASK	/;"	d
TLB_WORD2_U0_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U0_DISABLE /;"	d
TLB_WORD2_U0_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U0_DISABLE	/;"	d
TLB_WORD2_U0_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U0_ENABLE /;"	d
TLB_WORD2_U0_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U0_ENABLE	/;"	d
TLB_WORD2_U0_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U0_MASK /;"	d
TLB_WORD2_U0_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U0_MASK	/;"	d
TLB_WORD2_U1_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U1_DISABLE /;"	d
TLB_WORD2_U1_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U1_DISABLE	/;"	d
TLB_WORD2_U1_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U1_ENABLE /;"	d
TLB_WORD2_U1_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U1_ENABLE	/;"	d
TLB_WORD2_U1_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U1_MASK /;"	d
TLB_WORD2_U1_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U1_MASK	/;"	d
TLB_WORD2_U2_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U2_DISABLE /;"	d
TLB_WORD2_U2_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U2_DISABLE	/;"	d
TLB_WORD2_U2_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U2_ENABLE /;"	d
TLB_WORD2_U2_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U2_ENABLE	/;"	d
TLB_WORD2_U2_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U2_MASK /;"	d
TLB_WORD2_U2_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U2_MASK	/;"	d
TLB_WORD2_U3_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U3_DISABLE /;"	d
TLB_WORD2_U3_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U3_DISABLE	/;"	d
TLB_WORD2_U3_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U3_ENABLE /;"	d
TLB_WORD2_U3_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U3_ENABLE	/;"	d
TLB_WORD2_U3_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_U3_MASK /;"	d
TLB_WORD2_U3_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_U3_MASK	/;"	d
TLB_WORD2_UR_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UR_DISABLE /;"	d
TLB_WORD2_UR_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UR_DISABLE	/;"	d
TLB_WORD2_UR_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UR_ENABLE /;"	d
TLB_WORD2_UR_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UR_ENABLE	/;"	d
TLB_WORD2_UR_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UR_MASK /;"	d
TLB_WORD2_UR_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UR_MASK	/;"	d
TLB_WORD2_UW_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UW_DISABLE /;"	d
TLB_WORD2_UW_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UW_DISABLE	/;"	d
TLB_WORD2_UW_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UW_ENABLE /;"	d
TLB_WORD2_UW_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UW_ENABLE	/;"	d
TLB_WORD2_UW_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UW_MASK /;"	d
TLB_WORD2_UW_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UW_MASK	/;"	d
TLB_WORD2_UX_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UX_DISABLE /;"	d
TLB_WORD2_UX_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UX_DISABLE	/;"	d
TLB_WORD2_UX_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UX_ENABLE /;"	d
TLB_WORD2_UX_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UX_ENABLE	/;"	d
TLB_WORD2_UX_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_UX_MASK /;"	d
TLB_WORD2_UX_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_UX_MASK	/;"	d
TLB_WORD2_W_DISABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_W_DISABLE /;"	d
TLB_WORD2_W_DISABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_W_DISABLE	/;"	d
TLB_WORD2_W_ENABLE	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_W_ENABLE /;"	d
TLB_WORD2_W_ENABLE	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_W_ENABLE	/;"	d
TLB_WORD2_W_MASK	arch/powerpc/include/asm/mmu.h	/^#define TLB_WORD2_W_MASK /;"	d
TLB_WORD2_W_MASK	board/amcc/yucca/yucca.h	/^#define TLB_WORD2_W_MASK	/;"	d
TLBnCFG_NENTRY_MASK	arch/powerpc/include/asm/processor.h	/^#define   TLBnCFG_NENTRY_MASK	/;"	d
TLFRCR	drivers/net/sh_eth.h	/^	TLFRCR,$/;"	e	enum:__anon5ef54f5a0103
TLP_RESP_TIME_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TLP_RESP_TIME_SHIFT	/;"	d
TLP_RESP_TIME_SHIFT	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	TLP_RESP_TIME_SHIFT		= 16,$/;"	e	enum:__anon957231910203	file:
TM	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                        TM /;"	d
TM1	drivers/usb/musb-new/omap2430.h	/^#	define	TM1	/;"	d
TMCNTSC_ALE	include/mpc8260.h	/^#define TMCNTSC_ALE	/;"	d
TMCNTSC_ALR	include/mpc8260.h	/^#define TMCNTSC_ALR	/;"	d
TMCNTSC_SEC	include/mpc8260.h	/^#define TMCNTSC_SEC	/;"	d
TMCNTSC_SIE	include/mpc8260.h	/^#define TMCNTSC_SIE	/;"	d
TMCNTSC_TCE	include/mpc8260.h	/^#define TMCNTSC_TCE	/;"	d
TMCNTSC_TCF	include/mpc8260.h	/^#define TMCNTSC_TCF	/;"	d
TMC_ETF_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define TMC_ETF_BASE_ADDR /;"	d
TMDS_CNTL	include/radeon.h	/^#define TMDS_CNTL	/;"	d
TMDS_CRC	include/radeon.h	/^#define TMDS_CRC	/;"	d
TMDS_ICHCSEL	include/radeon.h	/^#define TMDS_ICHCSEL	/;"	d
TMDS_PLLRST	include/radeon.h	/^#define TMDS_PLLRST	/;"	d
TMDS_PLL_EN	include/radeon.h	/^#define TMDS_PLL_EN	/;"	d
TMDS_RAN_PAT_RST	include/radeon.h	/^#define TMDS_RAN_PAT_RST	/;"	d
TMDS_TRANSMITTER_CNTL	include/radeon.h	/^#define TMDS_TRANSMITTER_CNTL	/;"	d
TMEDCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define TMEDCR	/;"	d
TMEDRGBR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define TMEDRGBR	/;"	d
TMLI	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                      TMLI /;"	d
TMO	board/cobra5272/flash.c	/^#define TMO /;"	d	file:
TMOD_MASK	drivers/spi/rk_spi.h	/^	TMOD_MASK	= 3,$/;"	e	enum:__anondde5bacc0103
TMOD_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TMOD_MASK_REG	/;"	d
TMOD_RESV	drivers/spi/rk_spi.h	/^	TMOD_RESV,$/;"	e	enum:__anondde5bacc0103
TMOD_RO	drivers/spi/rk_spi.h	/^	TMOD_RO,		\/* recv only *\/$/;"	e	enum:__anondde5bacc0103
TMOD_SHIFT	drivers/spi/rk_spi.h	/^	TMOD_SHIFT	= 18,	\/* Transfer Mode *\/$/;"	e	enum:__anondde5bacc0103
TMOD_TO	drivers/spi/rk_spi.h	/^	TMOD_TO,		\/* xmit only *\/$/;"	e	enum:__anondde5bacc0103
TMOD_TR	drivers/spi/rk_spi.h	/^	TMOD_TR		= 0,	\/* xmit & recv *\/$/;"	e	enum:__anondde5bacc0103
TMOD_VALUE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TMOD_VALUE_REG	/;"	d
TMP	arch/arm/lib/uldivmod.S	/^TMP	.req	r8$/;"	l
TMPBUF	arch/arm/mach-davinci/include/mach/hardware.h	/^#define TMPBUF	/;"	d
TMPSTATUS	arch/arm/mach-davinci/include/mach/hardware.h	/^#define TMPSTATUS	/;"	d
TMP_ERASE	cmd/flash.c	/^# define TMP_ERASE	/;"	d	file:
TMP_PROT_OFF	cmd/flash.c	/^# define TMP_PROT_OFF	/;"	d	file:
TMP_PROT_ON	cmd/flash.c	/^# define TMP_PROT_ON	/;"	d	file:
TMP_WSAR	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define TMP_WSAR	/;"	d	file:
TMROF_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  TMROF_EN	/;"	d
TMROF_EN	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   TMROF_EN	/;"	d
TMROF_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  TMROF_STS	/;"	d
TMROF_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   TMROF_STS	/;"	d
TMRS4_DISABLE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TMRS4_DISABLE /;"	d
TMRS4_ENABLE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TMRS4_ENABLE /;"	d
TMRS4_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TMRS4_STATUS /;"	d
TMRS8_DISABLE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TMRS8_DISABLE /;"	d
TMRS8_ENABLE	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TMRS8_ENABLE /;"	d
TMRS8_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define TMRS8_STATUS /;"	d
TMR_CE_ANY	include/mpc8xx.h	/^#define TMR_CE_ANY	/;"	d
TMR_CE_FALLING	include/mpc8xx.h	/^#define TMR_CE_FALLING	/;"	d
TMR_CE_INTR_DIS	include/mpc8xx.h	/^#define TMR_CE_INTR_DIS	/;"	d
TMR_CE_MSK	include/mpc8xx.h	/^#define TMR_CE_MSK	/;"	d
TMR_CE_RISING	include/mpc8xx.h	/^#define TMR_CE_RISING	/;"	d
TMR_FREQ_EXT	board/amcc/yucca/yucca.h	/^#define TMR_FREQ_EXT	/;"	d
TMR_FRR	include/mpc8xx.h	/^#define TMR_FRR	/;"	d
TMR_GE	include/mpc8xx.h	/^#define TMR_GE	/;"	d
TMR_ICLK_IN_CAS	include/mpc8xx.h	/^#define TMR_ICLK_IN_CAS	/;"	d
TMR_ICLK_IN_GEN	include/mpc8xx.h	/^#define TMR_ICLK_IN_GEN	/;"	d
TMR_ICLK_IN_GEN_DIV16	include/mpc8xx.h	/^#define TMR_ICLK_IN_GEN_DIV16	/;"	d
TMR_ICLK_MSK	include/mpc8xx.h	/^#define TMR_ICLK_MSK	/;"	d
TMR_ICLK_TIN_PIN	include/mpc8xx.h	/^#define TMR_ICLK_TIN_PIN	/;"	d
TMR_OM	include/mpc8xx.h	/^#define TMR_OM	/;"	d
TMR_ORI	include/mpc8xx.h	/^#define TMR_ORI	/;"	d
TMR_PS_MSK	include/mpc8xx.h	/^#define TMR_PS_MSK	/;"	d
TMR_PS_SHIFT	include/mpc8xx.h	/^#define TMR_PS_SHIFT	/;"	d
TMR_WFAR	arch/arm/cpu/arm926ejs/armada100/timer.c	/^#define TMR_WFAR	/;"	d	file:
TMRx_CE_ANY	include/mpc8260.h	/^#define TMRx_CE_ANY	/;"	d
TMRx_CE_FALLING	include/mpc8260.h	/^#define TMRx_CE_FALLING	/;"	d
TMRx_CE_INTR_DIS	include/mpc8260.h	/^#define TMRx_CE_INTR_DIS	/;"	d
TMRx_CE_MSK	include/mpc8260.h	/^#define TMRx_CE_MSK	/;"	d
TMRx_CE_RISING	include/mpc8260.h	/^#define TMRx_CE_RISING	/;"	d
TMRx_FRR	include/mpc8260.h	/^#define TMRx_FRR	/;"	d
TMRx_GE	include/mpc8260.h	/^#define TMRx_GE	/;"	d
TMRx_ICLK_IN_CAS	include/mpc8260.h	/^#define TMRx_ICLK_IN_CAS	/;"	d
TMRx_ICLK_IN_GEN	include/mpc8260.h	/^#define TMRx_ICLK_IN_GEN	/;"	d
TMRx_ICLK_IN_GEN_DIV16	include/mpc8260.h	/^#define TMRx_ICLK_IN_GEN_DIV16	/;"	d
TMRx_ICLK_MSK	include/mpc8260.h	/^#define TMRx_ICLK_MSK	/;"	d
TMRx_ICLK_TIN_PIN	include/mpc8260.h	/^#define TMRx_ICLK_TIN_PIN	/;"	d
TMRx_OM	include/mpc8260.h	/^#define TMRx_OM	/;"	d
TMRx_ORI	include/mpc8260.h	/^#define TMRx_ORI	/;"	d
TMRx_PS_MSK	include/mpc8260.h	/^#define TMRx_PS_MSK	/;"	d
TMS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define TMS	/;"	d
TMS	board/esd/common/xilinx_jtag/ports.h	/^#define TMS /;"	d
TMU0_MSTP125	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define TMU0_MSTP125 /;"	d	file:
TMU0_MSTP125	board/renesas/alt/alt.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/blanche/blanche.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/gose/gose.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/koelsch/koelsch.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/lager/lager.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/porter/porter.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/salvator-x/salvator-x.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/silk/silk.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU0_MSTP125	board/renesas/stout/stout.c	/^#define TMU0_MSTP125	/;"	d	file:
TMU1_MSTP124	board/renesas/salvator-x/salvator-x.c	/^#define TMU1_MSTP124	/;"	d	file:
TMU_BASE	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7706.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7710.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7720.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7722.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7723.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7724.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7734.h	/^#define TMU_BASE /;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7750.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define TMU_BASE /;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7763.h	/^#define TMU_BASE	/;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7780.h	/^#define TMU_BASE /;"	d
TMU_BASE	arch/sh/include/asm/cpu_sh7785.h	/^#define TMU_BASE	/;"	d
TMU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define TMU_BASE_ADDR	/;"	d
TMU_CLK_DIVIDER	include/configs/kzm9g.h	/^#define TMU_CLK_DIVIDER	/;"	d
TMU_STATUS_INIT	include/tmu.h	/^	TMU_STATUS_INIT = -1,$/;"	e	enum:tmu_status_t
TMU_STATUS_NORMAL	include/tmu.h	/^	TMU_STATUS_NORMAL = 0,$/;"	e	enum:tmu_status_t
TMU_STATUS_TRIPPED	include/tmu.h	/^	TMU_STATUS_TRIPPED,$/;"	e	enum:tmu_status_t
TMU_STATUS_WARNING	include/tmu.h	/^	TMU_STATUS_WARNING,$/;"	e	enum:tmu_status_t
TNC_HDA	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_HDA	/;"	d
TNC_HDA_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_HDA_DEV	/;"	d
TNC_HDA_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_HDA_FUNC	/;"	d
TNC_HOST_BRIDGE	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_HOST_BRIDGE	/;"	d
TNC_HOST_BRIDGE_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_HOST_BRIDGE_DEV	/;"	d
TNC_HOST_BRIDGE_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_HOST_BRIDGE_FUNC	/;"	d
TNC_IGD	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_IGD	/;"	d
TNC_IGD_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_IGD_DEV	/;"	d
TNC_IGD_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_IGD_FUNC	/;"	d
TNC_LPC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_LPC	/;"	d
TNC_LPC_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_LPC_DEV	/;"	d
TNC_LPC_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_LPC_FUNC	/;"	d
TNC_PCIE0	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE0	/;"	d
TNC_PCIE0_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE0_DEV	/;"	d
TNC_PCIE0_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE0_FUNC	/;"	d
TNC_PCIE1	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE1	/;"	d
TNC_PCIE1_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE1_DEV	/;"	d
TNC_PCIE1_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE1_FUNC	/;"	d
TNC_PCIE2	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE2	/;"	d
TNC_PCIE2_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE2_DEV	/;"	d
TNC_PCIE2_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE2_FUNC	/;"	d
TNC_PCIE3	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE3	/;"	d
TNC_PCIE3_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE3_DEV	/;"	d
TNC_PCIE3_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_PCIE3_FUNC	/;"	d
TNC_SDVO	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_SDVO	/;"	d
TNC_SDVO_DEV	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_SDVO_DEV	/;"	d
TNC_SDVO_FUNC	arch/x86/include/asm/arch-queensbay/device.h	/^#define TNC_SDVO_FUNC	/;"	d
TOGGLE1	include/twl6030.h	/^#define TOGGLE1	/;"	d
TOGGLE_FLAG	drivers/bios_emulator/include/x86emu/regs.h	/^#define TOGGLE_FLAG(/;"	d
TOGGLE_HI	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOGGLE_HI	/;"	d
TOGGLE_RX_PID	include/usb/mpc8xx_udc.h	/^#define TOGGLE_RX_PID(/;"	d
TOGGLE_TX_PID	include/usb/mpc8xx_udc.h	/^#define TOGGLE_TX_PID(/;"	d
TOKEN_TO_TYPE	tools/buildman/kconfiglib.py	/^TOKEN_TO_TYPE = {T_BOOL: BOOL, T_TRISTATE: TRISTATE, T_STRING: STRING,$/;"	v
TOLUD	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define TOLUD	/;"	d
TOM	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define TOM	/;"	d
TOOLS_DEBUG	Kconfig	/^config TOOLS_DEBUG$/;"	c	menu:General setup
TOO_FAR	lib/zlib/deflate.c	/^#  define TOO_FAR /;"	d	file:
TOO_MANY_BITS	include/jffs2/mini_inflate.h	/^#define TOO_MANY_BITS /;"	d
TOP0_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP0_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP0_NR_CLK	/;"	d
TOP1_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP1_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define TOP1_NR_CLK	/;"	d
TOP2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define TOP2_VAL	/;"	d
TOPC_NR_CLK	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPC_NR_CLK	include/dt-bindings/clock/exynos7420-clk.h	/^#define TOPC_NR_CLK	/;"	d
TOPOLOGY_TEST_OK	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define TOPOLOGY_TEST_OK	/;"	d	file:
TOPOLOGY_UPDATE	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TOPOLOGY_UPDATE /;"	d
TOPOLOGY_UPDATE_16BIT	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TOPOLOGY_UPDATE_16BIT	/;"	d
TOPOLOGY_UPDATE_16BIT_ECC	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TOPOLOGY_UPDATE_16BIT_ECC	/;"	d
TOPOLOGY_UPDATE_16BIT_ECC_PUP3	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TOPOLOGY_UPDATE_16BIT_ECC_PUP3	/;"	d
TOPOLOGY_UPDATE_32BIT	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TOPOLOGY_UPDATE_32BIT	/;"	d
TOPOLOGY_UPDATE_32BIT_ECC	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TOPOLOGY_UPDATE_32BIT_ECC	/;"	d
TOPOLOGY_UPDATE_ECC_OFF	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_ECC_OFF	/;"	d
TOPOLOGY_UPDATE_ECC_OFFSET_PUP3	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_ECC_OFFSET_PUP3	/;"	d
TOPOLOGY_UPDATE_ECC_OFFSET_PUP4	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_ECC_OFFSET_PUP4	/;"	d
TOPOLOGY_UPDATE_ECC_ON	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_ECC_ON	/;"	d
TOPOLOGY_UPDATE_WIDTH_16BIT	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_WIDTH_16BIT	/;"	d
TOPOLOGY_UPDATE_WIDTH_16BIT_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_WIDTH_16BIT_MASK	/;"	d
TOPOLOGY_UPDATE_WIDTH_32BIT	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_WIDTH_32BIT	/;"	d
TOPOLOGY_UPDATE_WIDTH_32BIT_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define TOPOLOGY_UPDATE_WIDTH_32BIT_MASK	/;"	d
TOP_BASE	board/micronas/vct/vct.h	/^#define TOP_BASE	/;"	d
TOP_MEMORY	common/dlmalloc.c	/^#define TOP_MEMORY /;"	d	file:
TOP_PINMUX_t	board/micronas/vct/top.c	/^} TOP_PINMUX_t;$/;"	t	typeref:union:_TOP_PINMUX_t	file:
TOSH_ID_FVB160	include/flash.h	/^#define TOSH_ID_FVB160	/;"	d
TOSH_ID_FVT160	include/flash.h	/^#define TOSH_ID_FVT160	/;"	d
TOSH_MANUFACT	include/flash.h	/^#define TOSH_MANUFACT	/;"	d
TOTAL_KEYWORDS	scripts/kconfig/zconf.hash.c	/^      TOTAL_KEYWORDS = 33,$/;"	e	enum:kconf_id_lookup::__anond60376ef0103	file:
TOTAL_LINES_LSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define TOTAL_LINES_LSB_REG	/;"	d	file:
TOTAL_LINES_MSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define TOTAL_LINES_MSB_REG	/;"	d	file:
TOTAL_LINE_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define TOTAL_LINE_CFG_H(/;"	d
TOTAL_LINE_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define TOTAL_LINE_CFG_L(/;"	d
TOTAL_MALLOC_LEN	include/common.h	/^#define	TOTAL_MALLOC_LEN	/;"	d
TOTAL_MALLOC_LEN	include/common.h	/^#define TOTAL_MALLOC_LEN	/;"	d
TOTAL_PIXELS_LSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define TOTAL_PIXELS_LSB_REG	/;"	d	file:
TOTAL_PIXELS_MSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define TOTAL_PIXELS_MSB_REG	/;"	d	file:
TOTAL_PIXEL_CFG_H	arch/arm/mach-exynos/include/mach/dp.h	/^#define TOTAL_PIXEL_CFG_H(/;"	d
TOTAL_PIXEL_CFG_L	arch/arm/mach-exynos/include/mach/dp.h	/^#define TOTAL_PIXEL_CFG_L(/;"	d
TOTAL_RESOURCES	include/twl4030.h	/^#define TOTAL_RESOURCES	/;"	d
TOUCH_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TOUCH_BASE	/;"	d
TOUCH_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TOUCH_OFFSET	/;"	d
TOUT	drivers/net/ne2000_base.h	/^#define TOUT /;"	d
TOUT_LOOP	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	arch/powerpc/cpu/mpc8260/i2c.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	arch/powerpc/cpu/mpc8xx/fec.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	arch/powerpc/cpu/mpc8xx/i2c.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	arch/powerpc/cpu/mpc8xx/scc.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	drivers/net/bfin_mac.c	/^#define TOUT_LOOP	/;"	d	file:
TOUT_LOOP	drivers/net/dc2114x.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	drivers/net/e1000.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	drivers/net/eepro100.c	/^#define TOUT_LOOP	/;"	d	file:
TOUT_LOOP	drivers/net/natsemi.c	/^#define TOUT_LOOP	/;"	d	file:
TOUT_LOOP	drivers/net/ns8382x.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	include/tsec.h	/^#define TOUT_LOOP	/;"	d
TOUT_LOOP	post/cpu/mpc8xx/ether.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_LOOP	post/cpu/mpc8xx/usb.c	/^#define TOUT_LOOP /;"	d	file:
TOUT_OFFSET	drivers/i2c/kona_i2c.c	/^#define TOUT_OFFSET	/;"	d	file:
TOUUD	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define TOUUD	/;"	d
TOVEN	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TOVEN	/;"	d
TOVEN_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TOVEN_P	/;"	d
TOVF_ERR0	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR0	/;"	d
TOVF_ERR1	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR1	/;"	d
TOVF_ERR2	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR2	/;"	d
TOVF_ERR3	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR3	/;"	d
TOVF_ERR4	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR4	/;"	d
TOVF_ERR5	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR5	/;"	d
TOVF_ERR6	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR6	/;"	d
TOVF_ERR7	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVF_ERR7	/;"	d
TOVL_ERR0	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR0 /;"	d
TOVL_ERR1	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR1 /;"	d
TOVL_ERR2	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR2 /;"	d
TOVL_ERR3	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR3 /;"	d
TOVL_ERR4	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR4 /;"	d
TOVL_ERR5	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR5 /;"	d
TOVL_ERR6	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR6 /;"	d
TOVL_ERR7	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TOVL_ERR7 /;"	d
TO_BATU_BL	arch/powerpc/include/asm/mmu.h	/^#define TO_BATU_BL(/;"	d
TO_CAC	arch/mips/include/asm/mach-generic/spaces.h	/^#define TO_CAC(/;"	d
TO_DMA_CFG	board/micronas/vct/scc.h	/^#define TO_DMA_CFG	/;"	d
TO_PHYS	arch/mips/include/asm/mach-generic/spaces.h	/^#define TO_PHYS(/;"	d
TO_PHYS_MASK	arch/mips/include/asm/addrspace.h	/^#define TO_PHYS_MASK	/;"	d
TO_UNCAC	arch/mips/include/asm/mach-generic/spaces.h	/^#define TO_UNCAC(/;"	d
TP1000_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define TP1000_SPDWN_EN	/;"	d
TP100_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define TP100_SPDWN_EN	/;"	d
TP500_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define TP500_SPDWN_EN	/;"	d
TPACETEST	drivers/net/davinci_emac.h	/^	dv_reg		TPACETEST;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TPAUSECR	drivers/net/sh_eth.h	/^	TPAUSECR,$/;"	e	enum:__anon5ef54f5a0103
TPAUSER	drivers/net/sh_eth.h	/^	TPAUSER,$/;"	e	enum:__anon5ef54f5a0103
TPAUSER_BIT	drivers/net/sh_eth.h	/^enum TPAUSER_BIT {$/;"	g
TPAUSER_TPAUSE	drivers/net/sh_eth.h	/^	TPAUSER_TPAUSE = 0x0000ffff,$/;"	e	enum:TPAUSER_BIT
TPAUSER_UNLIMITED	drivers/net/sh_eth.h	/^	TPAUSER_UNLIMITED = 0,$/;"	e	enum:TPAUSER_BIT
TPERIOD	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TPERIOD /;"	d
TPF_TPFV_MASK	drivers/net/xilinx_ll_temac.h	/^#define TPF_TPFV_MASK	/;"	d
TPF_TPFV_POS	drivers/net/xilinx_ll_temac.h	/^#define TPF_TPFV_POS	/;"	d
TPHY_RDLAT_TIME_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TPHY_RDLAT_TIME_SHIFT	/;"	d
TPHY_WRDATA_TIME_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define TPHY_WRDATA_TIME_SHIFT	/;"	d
TPID0_V0_MASK	drivers/net/xilinx_ll_temac.h	/^#define TPID0_V0_MASK	/;"	d
TPID0_V0_POS	drivers/net/xilinx_ll_temac.h	/^#define TPID0_V0_POS	/;"	d
TPID0_V1_MASK	drivers/net/xilinx_ll_temac.h	/^#define TPID0_V1_MASK	/;"	d
TPID0_V1_POS	drivers/net/xilinx_ll_temac.h	/^#define TPID0_V1_POS	/;"	d
TPID1_V2_MASK	drivers/net/xilinx_ll_temac.h	/^#define TPID1_V2_MASK	/;"	d
TPID1_V2_POS	drivers/net/xilinx_ll_temac.h	/^#define TPID1_V2_POS	/;"	d
TPID1_V3_MASK	drivers/net/xilinx_ll_temac.h	/^#define TPID1_V3_MASK	/;"	d
TPID1_V3_POS	drivers/net/xilinx_ll_temac.h	/^#define TPID1_V3_POS	/;"	d
TPIU_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define TPIU_BASE_ADDR /;"	d
TPIU_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define TPIU_FREQ /;"	d
TPIU_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define TPIU_FREQ /;"	d
TPIU_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define TPIU_FREQ /;"	d
TPIU_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define TPIU_FREQ /;"	d
TPIU_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define TPIU_FREQ /;"	d
TPI_AUDIO_FREQ_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_FREQ_REG	/;"	d	file:
TPI_AUDIO_HANDING_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_HANDING_REG	/;"	d	file:
TPI_AUDIO_INTF_I2S	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_INTF_I2S	/;"	d	file:
TPI_AUDIO_INTF_NORMAL	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_INTF_NORMAL	/;"	d	file:
TPI_AUDIO_INTF_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_INTF_REG	/;"	d	file:
TPI_AUDIO_PASS_BASIC	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_PASS_BASIC	/;"	d	file:
TPI_AUDIO_SAMP_FREQ_44K	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_SAMP_FREQ_44K	/;"	d	file:
TPI_AUDIO_SAMP_SIZE_16BIT	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_SAMP_SIZE_16BIT	/;"	d	file:
TPI_AUDIO_TYPE_PCM	board/freescale/common/dcu_sii9022a.c	/^#define TPI_AUDIO_TYPE_PCM	/;"	d	file:
TPI_INBUS_CLOCK_RATIO_1	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INBUS_CLOCK_RATIO_1	/;"	d	file:
TPI_INBUS_FMT_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INBUS_FMT_REG	/;"	d	file:
TPI_INBUS_FULL_PIXEL_WIDE	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INBUS_FULL_PIXEL_WIDE	/;"	d	file:
TPI_INBUS_RISING_EDGE	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INBUS_RISING_EDGE	/;"	d	file:
TPI_INPUT_CLR_DEPTH_8BIT	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INPUT_CLR_DEPTH_8BIT	/;"	d	file:
TPI_INPUT_CLR_RGB	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INPUT_CLR_RGB	/;"	d	file:
TPI_INPUT_FMT_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INPUT_FMT_REG	/;"	d	file:
TPI_INPUT_VRANGE_EXPAN_AUTO	board/freescale/common/dcu_sii9022a.c	/^#define TPI_INPUT_VRANGE_EXPAN_AUTO	/;"	d	file:
TPI_OUTPUT_CLR_DEPTH_8BIT	board/freescale/common/dcu_sii9022a.c	/^#define TPI_OUTPUT_CLR_DEPTH_8BIT	/;"	d	file:
TPI_OUTPUT_CLR_HDMI_RGB	board/freescale/common/dcu_sii9022a.c	/^#define TPI_OUTPUT_CLR_HDMI_RGB	/;"	d	file:
TPI_OUTPUT_FMT_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_OUTPUT_FMT_REG	/;"	d	file:
TPI_OUTPUT_VRANGE_COMPRE_AUTO	board/freescale/common/dcu_sii9022a.c	/^#define TPI_OUTPUT_VRANGE_COMPRE_AUTO	/;"	d	file:
TPI_PWR_STAT_D0	board/freescale/common/dcu_sii9022a.c	/^#define TPI_PWR_STAT_D0	/;"	d	file:
TPI_PWR_STAT_MASK	board/freescale/common/dcu_sii9022a.c	/^#define TPI_PWR_STAT_MASK	/;"	d	file:
TPI_PWR_STAT_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_PWR_STAT_REG	/;"	d	file:
TPI_RW_ACCESS_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_RW_ACCESS_REG	/;"	d	file:
TPI_RW_EN_SRC_TERMIN	board/freescale/common/dcu_sii9022a.c	/^#define TPI_RW_EN_SRC_TERMIN	/;"	d	file:
TPI_SET_OFFSET_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SET_OFFSET_REG	/;"	d	file:
TPI_SET_OFFSET_SII9022A	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SET_OFFSET_SII9022A	/;"	d	file:
TPI_SET_PAGE_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SET_PAGE_REG	/;"	d	file:
TPI_SET_PAGE_SII9022A	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SET_PAGE_SII9022A	/;"	d	file:
TPI_SYS_AV_MUTE	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SYS_AV_MUTE	/;"	d	file:
TPI_SYS_AV_NORAML	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SYS_AV_NORAML	/;"	d	file:
TPI_SYS_CTRL_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SYS_CTRL_REG	/;"	d	file:
TPI_SYS_DVI_MODE	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SYS_DVI_MODE	/;"	d	file:
TPI_SYS_HDMI_MODE	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SYS_HDMI_MODE	/;"	d	file:
TPI_SYS_TMDS_OUTPUT	board/freescale/common/dcu_sii9022a.c	/^#define TPI_SYS_TMDS_OUTPUT	/;"	d	file:
TPI_TRANS_MODE_ENABLE	board/freescale/common/dcu_sii9022a.c	/^#define TPI_TRANS_MODE_ENABLE	/;"	d	file:
TPI_TRANS_MODE_REG	board/freescale/common/dcu_sii9022a.c	/^#define TPI_TRANS_MODE_REG	/;"	d	file:
TPL	common/spl/Kconfig	/^config TPL$/;"	c	menu:SPL / TPL
TPL_ENV_SUPPORT	common/spl/Kconfig	/^config TPL_ENV_SUPPORT$/;"	c	menu:SPL / TPL
TPL_I2C_SUPPORT	common/spl/Kconfig	/^config TPL_I2C_SUPPORT$/;"	c	menu:SPL / TPL
TPL_LIBCOMMON_SUPPORT	common/spl/Kconfig	/^config TPL_LIBCOMMON_SUPPORT$/;"	c	menu:SPL / TPL
TPL_LIBGENERIC_SUPPORT	common/spl/Kconfig	/^config TPL_LIBGENERIC_SUPPORT$/;"	c	menu:SPL / TPL
TPL_MMC_SUPPORT	common/spl/Kconfig	/^config TPL_MMC_SUPPORT$/;"	c	menu:SPL / TPL
TPL_MPC8XXX_INIT_DDR_SUPPORT	common/spl/Kconfig	/^config TPL_MPC8XXX_INIT_DDR_SUPPORT$/;"	c	menu:SPL / TPL
TPL_NAND_SUPPORT	common/spl/Kconfig	/^config TPL_NAND_SUPPORT$/;"	c	menu:SPL / TPL
TPL_SERIAL_SUPPORT	common/spl/Kconfig	/^config TPL_SERIAL_SUPPORT$/;"	c	menu:SPL / TPL
TPL_SPI_FLASH_SUPPORT	common/spl/Kconfig	/^config TPL_SPI_FLASH_SUPPORT$/;"	c	menu:SPL / TPL
TPL_SPI_SUPPORT	common/spl/Kconfig	/^config TPL_SPI_SUPPORT$/;"	c	menu:SPL / TPL
TPM	lib/Kconfig	/^config TPM$/;"	c	menu:Library routines
TPM support	drivers/tpm/Kconfig	/^menu "TPM support"$/;"	m
TPM_ACCESS	drivers/tpm/tpm_tis_infineon.c	/^#define	TPM_ACCESS(/;"	d	file:
TPM_ACCESS	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define TPM_ACCESS	/;"	d	file:
TPM_ACCESS	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define TPM_ACCESS	/;"	d	file:
TPM_ACCESS_ACTIVE_LOCALITY	drivers/tpm/tpm_tis.h	/^	TPM_ACCESS_ACTIVE_LOCALITY	= 0x20,$/;"	e	enum:tis_access
TPM_ACCESS_REQUEST_PENDING	drivers/tpm/tpm_tis.h	/^	TPM_ACCESS_REQUEST_PENDING	= 0x04,$/;"	e	enum:tis_access
TPM_ACCESS_REQUEST_USE	drivers/tpm/tpm_tis.h	/^	TPM_ACCESS_REQUEST_USE		= 0x02,$/;"	e	enum:tis_access
TPM_ACCESS_VALID	drivers/tpm/tpm_tis.h	/^	TPM_ACCESS_VALID		= 0x80,$/;"	e	enum:tis_access
TPM_AREA_LOCKED	include/tpm.h	/^	TPM_AREA_LOCKED			= TPM_BASE + 60,$/;"	e	enum:tpm_return_code
TPM_ATMEL_TWI	drivers/tpm/Kconfig	/^config TPM_ATMEL_TWI$/;"	c	menu:TPM support
TPM_AUDITFAILURE	include/tpm.h	/^	TPM_AUDITFAILURE		= TPM_BASE +  4,$/;"	e	enum:tpm_return_code
TPM_AUDITFAIL_SUCCESSFUL	include/tpm.h	/^	TPM_AUDITFAIL_SUCCESSFUL	= TPM_BASE + 49,$/;"	e	enum:tpm_return_code
TPM_AUDITFAIL_UNSUCCESSFUL	include/tpm.h	/^	TPM_AUDITFAIL_UNSUCCESSFUL	= TPM_BASE + 48,$/;"	e	enum:tpm_return_code
TPM_AUTH2FAIL	include/tpm.h	/^	TPM_AUTH2FAIL			= TPM_BASE + 29,$/;"	e	enum:tpm_return_code
TPM_AUTHFAIL	include/tpm.h	/^	TPM_AUTHFAIL			= TPM_BASE +  1,$/;"	e	enum:tpm_return_code
TPM_AUTH_CONFLICT	include/tpm.h	/^	TPM_AUTH_CONFLICT		= TPM_BASE + 59,$/;"	e	enum:tpm_return_code
TPM_AUTH_SESSIONS	drivers/tpm/Kconfig	/^config TPM_AUTH_SESSIONS$/;"	c	menu:TPM support
TPM_BADCONTEXT	include/tpm.h	/^	TPM_BADCONTEXT			= TPM_BASE + 90,$/;"	e	enum:tpm_return_code
TPM_BADINDEX	include/tpm.h	/^	TPM_BADINDEX			= TPM_BASE +  2,$/;"	e	enum:tpm_return_code
TPM_BADTAG	include/tpm.h	/^	TPM_BADTAG			= TPM_BASE + 30,$/;"	e	enum:tpm_return_code
TPM_BAD_ATTRIBUTES	include/tpm.h	/^	TPM_BAD_ATTRIBUTES		= TPM_BASE + 66,$/;"	e	enum:tpm_return_code
TPM_BAD_COUNTER	include/tpm.h	/^	TPM_BAD_COUNTER			= TPM_BASE + 69,$/;"	e	enum:tpm_return_code
TPM_BAD_DATASIZE	include/tpm.h	/^	TPM_BAD_DATASIZE		= TPM_BASE + 43,$/;"	e	enum:tpm_return_code
TPM_BAD_DELEGATE	include/tpm.h	/^	TPM_BAD_DELEGATE		= TPM_BASE + 89,$/;"	e	enum:tpm_return_code
TPM_BAD_HANDLE	include/tpm.h	/^	TPM_BAD_HANDLE			= TPM_BASE + 88,$/;"	e	enum:tpm_return_code
TPM_BAD_KEY_PROPERTY	include/tpm.h	/^	TPM_BAD_KEY_PROPERTY		= TPM_BASE + 40,$/;"	e	enum:tpm_return_code
TPM_BAD_LOCALITY	include/tpm.h	/^	TPM_BAD_LOCALITY		= TPM_BASE + 61,$/;"	e	enum:tpm_return_code
TPM_BAD_MIGRATION	include/tpm.h	/^	TPM_BAD_MIGRATION		= TPM_BASE + 41,$/;"	e	enum:tpm_return_code
TPM_BAD_MODE	include/tpm.h	/^	TPM_BAD_MODE			= TPM_BASE + 44,$/;"	e	enum:tpm_return_code
TPM_BAD_ORDINAL	include/tpm.h	/^	TPM_BAD_ORDINAL			= TPM_BASE + 10,$/;"	e	enum:tpm_return_code
TPM_BAD_PARAMETER	include/tpm.h	/^	TPM_BAD_PARAMETER		= TPM_BASE +  3,$/;"	e	enum:tpm_return_code
TPM_BAD_PARAM_SIZE	include/tpm.h	/^	TPM_BAD_PARAM_SIZE		= TPM_BASE + 25,$/;"	e	enum:tpm_return_code
TPM_BAD_PRESENCE	include/tpm.h	/^	TPM_BAD_PRESENCE		= TPM_BASE + 45,$/;"	e	enum:tpm_return_code
TPM_BAD_SCHEME	include/tpm.h	/^	TPM_BAD_SCHEME			= TPM_BASE + 42,$/;"	e	enum:tpm_return_code
TPM_BAD_SIGNATURE	include/tpm.h	/^	TPM_BAD_SIGNATURE		= TPM_BASE + 98,$/;"	e	enum:tpm_return_code
TPM_BAD_TYPE	include/tpm.h	/^	TPM_BAD_TYPE			= TPM_BASE + 52,$/;"	e	enum:tpm_return_code
TPM_BAD_VERSION	include/tpm.h	/^	TPM_BAD_VERSION			= TPM_BASE + 46,$/;"	e	enum:tpm_return_code
TPM_BASE	include/tpm.h	/^	TPM_BASE	= 0x00000000,$/;"	e	enum:tpm_return_code
TPM_BUFSIZE	drivers/tpm/tpm_tis.h	/^#define TPM_BUFSIZE /;"	d
TPM_CAP_HANDLE	board/gdsys/p1022/controlcenterd-id.c	/^	TPM_CAP_HANDLE		= 0x00000014,$/;"	e	enum:__anonaa5ecaea0103	file:
TPM_CAP_NV_INDEX	board/gdsys/p1022/controlcenterd-id.c	/^	TPM_CAP_NV_INDEX	= 0x00000011,$/;"	e	enum:__anonaa5ecaea0103	file:
TPM_CHECK	cmd/tpm_test.c	/^#define TPM_CHECK(/;"	d	file:
TPM_CLEAR_DISABLED	include/tpm.h	/^	TPM_CLEAR_DISABLED		= TPM_BASE +  5,$/;"	e	enum:tpm_return_code
TPM_CMD_COUNT_BYTE	drivers/tpm/tpm_internal.h	/^	TPM_CMD_COUNT_BYTE		= 2,$/;"	e	enum:__anon70a850760103
TPM_CMD_ORDINAL_BYTE	drivers/tpm/tpm_internal.h	/^	TPM_CMD_ORDINAL_BYTE		= 6,$/;"	e	enum:__anon70a850760103
TPM_COMMAND_NO_ARG	cmd/tpm.c	/^#define TPM_COMMAND_NO_ARG(/;"	d	file:
TPM_COMMAND_NO_ARG	cmd/tpm.c	/^TPM_COMMAND_NO_ARG(tpm_self_test_full)$/;"	f	typeref:typename:tpm_init	file:
TPM_CONTEXT_GAP	include/tpm.h	/^	TPM_CONTEXT_GAP			= TPM_BASE + 71,$/;"	e	enum:tpm_return_code
TPM_DAA_INPUT_DATA0	include/tpm.h	/^	TPM_DAA_INPUT_DATA0		= TPM_BASE + 81,$/;"	e	enum:tpm_return_code
TPM_DAA_INPUT_DATA1	include/tpm.h	/^	TPM_DAA_INPUT_DATA1		= TPM_BASE + 82,$/;"	e	enum:tpm_return_code
TPM_DAA_ISSUER_SETTINGS	include/tpm.h	/^	TPM_DAA_ISSUER_SETTINGS		= TPM_BASE + 83,$/;"	e	enum:tpm_return_code
TPM_DAA_ISSUER_VALIDITY	include/tpm.h	/^	TPM_DAA_ISSUER_VALIDITY		= TPM_BASE + 86,$/;"	e	enum:tpm_return_code
TPM_DAA_RESOURCES	include/tpm.h	/^	TPM_DAA_RESOURCES		= TPM_BASE + 80,$/;"	e	enum:tpm_return_code
TPM_DAA_STAGE	include/tpm.h	/^	TPM_DAA_STAGE			= TPM_BASE + 85,$/;"	e	enum:tpm_return_code
TPM_DAA_TPM_SETTINGS	include/tpm.h	/^	TPM_DAA_TPM_SETTINGS		= TPM_BASE + 84,$/;"	e	enum:tpm_return_code
TPM_DAA_WRONG_W	include/tpm.h	/^	TPM_DAA_WRONG_W			= TPM_BASE + 87,$/;"	e	enum:tpm_return_code
TPM_DATA_FIFO	drivers/tpm/tpm_tis_infineon.c	/^#define	TPM_DATA_FIFO(/;"	d	file:
TPM_DATA_FIFO	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define TPM_DATA_FIFO	/;"	d	file:
TPM_DATA_FIFO	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define TPM_DATA_FIFO	/;"	d	file:
TPM_DEACTIVATED	include/tpm.h	/^	TPM_DEACTIVATED			= TPM_BASE +  6,$/;"	e	enum:tpm_return_code
TPM_DECRYPT_ERROR	include/tpm.h	/^	TPM_DECRYPT_ERROR		= TPM_BASE + 33,$/;"	e	enum:tpm_return_code
TPM_DEFEND_LOCK_RUNNING	include/tpm.h	/^	TPM_DEFEND_LOCK_RUNNING	= TPM_BASE + TPM_NON_FATAL + 3,$/;"	e	enum:tpm_return_code
TPM_DELEGATE_ADMIN	include/tpm.h	/^	TPM_DELEGATE_ADMIN		= TPM_BASE + 77,$/;"	e	enum:tpm_return_code
TPM_DELEGATE_FAMILY	include/tpm.h	/^	TPM_DELEGATE_FAMILY		= TPM_BASE + 76,$/;"	e	enum:tpm_return_code
TPM_DELEGATE_LOCK	include/tpm.h	/^	TPM_DELEGATE_LOCK		= TPM_BASE + 75,$/;"	e	enum:tpm_return_code
TPM_DEV_BUFSIZE	include/tpm.h	/^#define TPM_DEV_BUFSIZE	/;"	d
TPM_DID_VID	drivers/tpm/tpm_tis_infineon.c	/^#define	TPM_DID_VID(/;"	d	file:
TPM_DISABLED	include/tpm.h	/^	TPM_DISABLED			= TPM_BASE +  7,$/;"	e	enum:tpm_return_code
TPM_DISABLED_CMD	include/tpm.h	/^	TPM_DISABLED_CMD		= TPM_BASE +  8,$/;"	e	enum:tpm_return_code
TPM_DOING_SELFTEST	include/tpm.h	/^	TPM_DOING_SELFTEST	= TPM_BASE + TPM_NON_FATAL + 2,$/;"	e	enum:tpm_return_code
TPM_DUMMY_BYTE	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define TPM_DUMMY_BYTE	/;"	d	file:
TPM_DUMMY_BYTE	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define TPM_DUMMY_BYTE	/;"	d	file:
TPM_DURATION_COUNT	include/tpm.h	/^	TPM_DURATION_COUNT,$/;"	e	enum:tpm_duration
TPM_ENCRYPT_ERROR	include/tpm.h	/^	TPM_ENCRYPT_ERROR		= TPM_BASE + 32,$/;"	e	enum:tpm_return_code
TPM_FAIL	include/tpm.h	/^	TPM_FAIL			= TPM_BASE +  9,$/;"	e	enum:tpm_return_code
TPM_FAILEDSELFTEST	include/tpm.h	/^	TPM_FAILEDSELFTEST		= TPM_BASE + 28,$/;"	e	enum:tpm_return_code
TPM_FAMILY_COUNT	include/tpm.h	/^	TPM_FAMILY_COUNT		= TPM_BASE + 64,$/;"	e	enum:tpm_return_code
TPM_HEADER_SIZE	include/tpm.h	/^#define TPM_HEADER_SIZE	/;"	d
TPM_INAPPROPRIATE_ENC	include/tpm.h	/^	TPM_INAPPROPRIATE_ENC		= TPM_BASE + 14,$/;"	e	enum:tpm_return_code
TPM_INAPPROPRIATE_SIG	include/tpm.h	/^	TPM_INAPPROPRIATE_SIG		= TPM_BASE + 39,$/;"	e	enum:tpm_return_code
TPM_INSTALL_DISABLED	include/tpm.h	/^	TPM_INSTALL_DISABLED		= TPM_BASE + 11,$/;"	e	enum:tpm_return_code
TPM_INTF_CAPABILITY	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define TPM_INTF_CAPABILITY	/;"	d	file:
TPM_INVALID_AUTHHANDLE	include/tpm.h	/^	TPM_INVALID_AUTHHANDLE		= TPM_BASE + 34,$/;"	e	enum:tpm_return_code
TPM_INVALID_FAMILY	include/tpm.h	/^	TPM_INVALID_FAMILY		= TPM_BASE + 55,$/;"	e	enum:tpm_return_code
TPM_INVALID_KEYHANDLE	include/tpm.h	/^	TPM_INVALID_KEYHANDLE		= TPM_BASE + 12,$/;"	e	enum:tpm_return_code
TPM_INVALID_KEYUSAGE	include/tpm.h	/^	TPM_INVALID_KEYUSAGE		= TPM_BASE + 36,$/;"	e	enum:tpm_return_code
TPM_INVALID_PCR_INFO	include/tpm.h	/^	TPM_INVALID_PCR_INFO		= TPM_BASE + 16,$/;"	e	enum:tpm_return_code
TPM_INVALID_POSTINIT	include/tpm.h	/^	TPM_INVALID_POSTINIT		= TPM_BASE + 38,$/;"	e	enum:tpm_return_code
TPM_INVALID_RESOURCE	include/tpm.h	/^	TPM_INVALID_RESOURCE		= TPM_BASE + 53,$/;"	e	enum:tpm_return_code
TPM_INVALID_STRUCTURE	include/tpm.h	/^	TPM_INVALID_STRUCTURE		= TPM_BASE + 67,$/;"	e	enum:tpm_return_code
TPM_IOERROR	include/tpm.h	/^	TPM_IOERROR			= TPM_BASE + 31,$/;"	e	enum:tpm_return_code
TPM_KEY12_MAX_LENGTH	lib/tpm.c	/^	TPM_KEY12_MAX_LENGTH		= 618,$/;"	e	enum:__anoneb7c99ad0103	file:
TPM_KEYNOTFOUND	include/tpm.h	/^	TPM_KEYNOTFOUND			= TPM_BASE + 13,$/;"	e	enum:tpm_return_code
TPM_KEY_NOTSUPPORTED	include/tpm.h	/^	TPM_KEY_NOTSUPPORTED		= TPM_BASE + 58,$/;"	e	enum:tpm_return_code
TPM_KEY_OWNER_CONTROL	include/tpm.h	/^	TPM_KEY_OWNER_CONTROL		= TPM_BASE + 68,$/;"	e	enum:tpm_return_code
TPM_LIB_ERROR	lib/tpm.c	/^#define TPM_LIB_ERROR	/;"	d	file:
TPM_LONG	include/tpm.h	/^	TPM_LONG = 2,$/;"	e	enum:tpm_duration
TPM_MAXNVWRITES	include/tpm.h	/^	TPM_MAXNVWRITES			= TPM_BASE + 72,$/;"	e	enum:tpm_return_code
TPM_MAX_NV_WRITES_NOOWNER	cmd/tpm_test.c	/^#define TPM_MAX_NV_WRITES_NOOWNER /;"	d	file:
TPM_MAX_ORDINAL	drivers/tpm/tpm_internal.h	/^	TPM_MAX_ORDINAL			= 243,$/;"	e	enum:__anon70a850760103
TPM_MAX_PROTECTED_ORDINAL	drivers/tpm/tpm_internal.h	/^	TPM_MAX_PROTECTED_ORDINAL	= 12,$/;"	e	enum:__anon70a850760103
TPM_MA_AUTHORITY	include/tpm.h	/^	TPM_MA_AUTHORITY		= TPM_BASE + 95,$/;"	e	enum:tpm_return_code
TPM_MA_DESTINATION	include/tpm.h	/^	TPM_MA_DESTINATION		= TPM_BASE + 93,$/;"	e	enum:tpm_return_code
TPM_MA_SOURCE	include/tpm.h	/^	TPM_MA_SOURCE			= TPM_BASE + 94,$/;"	e	enum:tpm_return_code
TPM_MA_TICKET_SIGNATURE	include/tpm.h	/^	TPM_MA_TICKET_SIGNATURE		= TPM_BASE + 92,$/;"	e	enum:tpm_return_code
TPM_MEDIUM	include/tpm.h	/^	TPM_MEDIUM = 1,$/;"	e	enum:tpm_duration
TPM_MIGRATE_FAIL	include/tpm.h	/^	TPM_MIGRATE_FAIL		= TPM_BASE + 15,$/;"	e	enum:tpm_return_code
TPM_NEEDS_SELFTEST	include/tpm.h	/^	TPM_NEEDS_SELFTEST	= TPM_BASE + TPM_NON_FATAL + 1,$/;"	e	enum:tpm_return_code
TPM_NOCONTEXTSPACE	include/tpm.h	/^	TPM_NOCONTEXTSPACE		= TPM_BASE + 99,$/;"	e	enum:tpm_return_code
TPM_NON_FATAL	include/tpm.h	/^	TPM_NON_FATAL	= 0x00000800,$/;"	e	enum:tpm_return_code
TPM_NOOPERATOR	include/tpm.h	/^	TPM_NOOPERATOR			= TPM_BASE + 73,$/;"	e	enum:tpm_return_code
TPM_NOSPACE	include/tpm.h	/^	TPM_NOSPACE			= TPM_BASE + 17,$/;"	e	enum:tpm_return_code
TPM_NOSRK	include/tpm.h	/^	TPM_NOSRK			= TPM_BASE + 18,$/;"	e	enum:tpm_return_code
TPM_NOTFIPS	include/tpm.h	/^	TPM_NOTFIPS			= TPM_BASE + 54,$/;"	e	enum:tpm_return_code
TPM_NOTLOCAL	include/tpm.h	/^	TPM_NOTLOCAL			= TPM_BASE + 51,$/;"	e	enum:tpm_return_code
TPM_NOTRESETABLE	include/tpm.h	/^	TPM_NOTRESETABLE		= TPM_BASE + 50,$/;"	e	enum:tpm_return_code
TPM_NOTSEALED_BLOB	include/tpm.h	/^	TPM_NOTSEALED_BLOB		= TPM_BASE + 19,$/;"	e	enum:tpm_return_code
TPM_NOT_FULLWRITE	include/tpm.h	/^	TPM_NOT_FULLWRITE		= TPM_BASE + 70,$/;"	e	enum:tpm_return_code
TPM_NO_ENDORSEMENT	include/tpm.h	/^	TPM_NO_ENDORSEMENT		= TPM_BASE + 35,$/;"	e	enum:tpm_return_code
TPM_NO_NV_PERMISSION	include/tpm.h	/^	TPM_NO_NV_PERMISSION		= TPM_BASE + 56,$/;"	e	enum:tpm_return_code
TPM_NO_WRAP_TRANSPORT	include/tpm.h	/^	TPM_NO_WRAP_TRANSPORT		= TPM_BASE + 47,$/;"	e	enum:tpm_return_code
TPM_NV_INDEX_0	include/tpm.h	/^	TPM_NV_INDEX_0		= 0x00000000,$/;"	e	enum:tpm_nv_index
TPM_NV_INDEX_DIR	include/tpm.h	/^	TPM_NV_INDEX_DIR	= 0x10000001,$/;"	e	enum:tpm_nv_index
TPM_NV_INDEX_LOCK	include/tpm.h	/^	TPM_NV_INDEX_LOCK	= 0xffffffff,$/;"	e	enum:tpm_nv_index
TPM_NV_PER_GLOBALLOCK	include/tpm.h	/^#define TPM_NV_PER_GLOBALLOCK	/;"	d
TPM_NV_PER_PPWRITE	include/tpm.h	/^#define TPM_NV_PER_PPWRITE	/;"	d
TPM_NV_PER_READ_STCLEAR	include/tpm.h	/^#define TPM_NV_PER_READ_STCLEAR	/;"	d
TPM_NV_PER_WRITE_STCLEAR	include/tpm.h	/^#define TPM_NV_PER_WRITE_STCLEAR	/;"	d
TPM_OWNER_CONTROL	include/tpm.h	/^	TPM_OWNER_CONTROL		= TPM_BASE + 79,$/;"	e	enum:tpm_return_code
TPM_OWNER_SET	include/tpm.h	/^	TPM_OWNER_SET			= TPM_BASE + 20,$/;"	e	enum:tpm_return_code
TPM_PERMANENTEK	include/tpm.h	/^	TPM_PERMANENTEK			= TPM_BASE + 97,$/;"	e	enum:tpm_return_code
TPM_PER_NOWRITE	include/tpm.h	/^	TPM_PER_NOWRITE			= TPM_BASE + 63,$/;"	e	enum:tpm_return_code
TPM_PHYSICAL_PRESENCE_CMD_DISABLE	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_CMD_DISABLE	= 0x0100,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_CMD_ENABLE	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_CMD_ENABLE	= 0x0020,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_HW_DISABLE	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_HW_DISABLE	= 0x0200,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_HW_ENABLE	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_HW_ENABLE		= 0x0040,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK	= 0x0080,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_LOCK	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_LOCK		= 0x0004,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_NOTPRESENT	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_NOTPRESENT	= 0x0010,$/;"	e	enum:tpm_physical_presence
TPM_PHYSICAL_PRESENCE_PRESENT	include/tpm.h	/^	TPM_PHYSICAL_PRESENCE_PRESENT		= 0x0008,$/;"	e	enum:tpm_physical_presence
TPM_PROTECTED_ORDINAL_MASK	drivers/tpm/tpm_internal.h	/^	TPM_PROTECTED_ORDINAL_MASK	= 0xff,$/;"	e	enum:__anon70a850760103
TPM_PUBEK_SIZE	include/tpm.h	/^	TPM_PUBEK_SIZE			= 256,$/;"	e	enum:__anona63d42bf0103
TPM_PUBKEY_MAX_LENGTH	cmd/tpm.c	/^	TPM_PUBKEY_MAX_LENGTH	= 288,$/;"	e	enum:__anon1e186daa0103	file:
TPM_PUBKEY_MAX_LENGTH	lib/tpm.c	/^	TPM_PUBKEY_MAX_LENGTH		= 288,$/;"	e	enum:__anoneb7c99ad0103	file:
TPM_READ_ONLY	include/tpm.h	/^	TPM_READ_ONLY			= TPM_BASE + 62,$/;"	e	enum:tpm_return_code
TPM_REQUEST_AUTH_LENGTH	lib/tpm.c	/^	TPM_REQUEST_AUTH_LENGTH		= 45,$/;"	e	enum:__anoneb7c99ad0103	file:
TPM_REQUEST_HEADER_LENGTH	drivers/tpm/tpm_tis_sandbox.c	/^#define TPM_REQUEST_HEADER_LENGTH	/;"	d	file:
TPM_REQUEST_HEADER_LENGTH	lib/tpm.c	/^	TPM_REQUEST_HEADER_LENGTH	= 10,$/;"	e	enum:__anoneb7c99ad0103	file:
TPM_REQUIRES_SIGN	include/tpm.h	/^	TPM_REQUIRES_SIGN		= TPM_BASE + 57,$/;"	e	enum:tpm_return_code
TPM_RESOURCEMISSING	include/tpm.h	/^	TPM_RESOURCEMISSING		= TPM_BASE + 74,$/;"	e	enum:tpm_return_code
TPM_RESOURCES	include/tpm.h	/^	TPM_RESOURCES			= TPM_BASE + 21,$/;"	e	enum:tpm_return_code
TPM_RESPONSE_AUTH_LENGTH	lib/tpm.c	/^	TPM_RESPONSE_AUTH_LENGTH	= 41,$/;"	e	enum:__anoneb7c99ad0103	file:
TPM_RESPONSE_HEADER_LENGTH	drivers/tpm/tpm_tis_sandbox.c	/^#define TPM_RESPONSE_HEADER_LENGTH	/;"	d	file:
TPM_RESPONSE_HEADER_LENGTH	lib/tpm.c	/^	TPM_RESPONSE_HEADER_LENGTH	= 10,$/;"	e	enum:__anoneb7c99ad0103	file:
TPM_RETRY	include/tpm.h	/^	TPM_RETRY		= TPM_BASE + TPM_NON_FATAL,$/;"	e	enum:tpm_return_code
TPM_RSP_RC_BYTE	drivers/tpm/tpm_tis.h	/^#define TPM_RSP_RC_BYTE	/;"	d
TPM_RSP_SIZE_BYTE	drivers/tpm/tpm_tis.h	/^#define TPM_RSP_SIZE_BYTE	/;"	d
TPM_RT_KEY	board/gdsys/p1022/controlcenterd-id.c	/^	TPM_RT_KEY	= 0x00000001,$/;"	e	enum:__anonaa5ecaea0103	file:
TPM_SHA_ERROR	include/tpm.h	/^	TPM_SHA_ERROR			= TPM_BASE + 27,$/;"	e	enum:tpm_return_code
TPM_SHA_THREAD	include/tpm.h	/^	TPM_SHA_THREAD			= TPM_BASE + 26,$/;"	e	enum:tpm_return_code
TPM_SHORT	include/tpm.h	/^	TPM_SHORT = 0,$/;"	e	enum:tpm_duration
TPM_SHORTRANDOM	include/tpm.h	/^	TPM_SHORTRANDOM			= TPM_BASE + 22,$/;"	e	enum:tpm_return_code
TPM_SIZE	include/tpm.h	/^	TPM_SIZE			= TPM_BASE + 23,$/;"	e	enum:tpm_return_code
TPM_ST33ZP24_I2C	drivers/tpm/Kconfig	/^config TPM_ST33ZP24_I2C$/;"	c	menu:TPM support
TPM_ST33ZP24_I2C_SLAVE_ADDR	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define TPM_ST33ZP24_I2C_SLAVE_ADDR	/;"	d	file:
TPM_ST33ZP24_SPI	drivers/tpm/Kconfig	/^config TPM_ST33ZP24_SPI$/;"	c	menu:TPM support
TPM_STS	drivers/tpm/tpm_tis_infineon.c	/^#define	TPM_STS(/;"	d	file:
TPM_STS	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define TPM_STS	/;"	d	file:
TPM_STS	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define TPM_STS	/;"	d	file:
TPM_STS_COMMAND_READY	drivers/tpm/tpm_tis.h	/^	TPM_STS_COMMAND_READY		= 0x40,$/;"	e	enum:tis_status
TPM_STS_DATA_AVAIL	drivers/tpm/tpm_tis.h	/^	TPM_STS_DATA_AVAIL		= 0x10,$/;"	e	enum:tis_status
TPM_STS_DATA_EXPECT	drivers/tpm/tpm_tis.h	/^	TPM_STS_DATA_EXPECT		= 0x08,$/;"	e	enum:tis_status
TPM_STS_GO	drivers/tpm/tpm_tis.h	/^	TPM_STS_GO			= 0x20,$/;"	e	enum:tis_status
TPM_STS_VALID	drivers/tpm/tpm_tis.h	/^	TPM_STS_VALID			= 0x80,$/;"	e	enum:tis_status
TPM_ST_CLEAR	include/tpm.h	/^	TPM_ST_CLEAR		= 0x0001,$/;"	e	enum:tpm_startup_type
TPM_ST_DEACTIVATED	include/tpm.h	/^	TPM_ST_DEACTIVATED	= 0x0003,$/;"	e	enum:tpm_startup_type
TPM_ST_STATE	include/tpm.h	/^	TPM_ST_STATE		= 0x0002,$/;"	e	enum:tpm_startup_type
TPM_SUCCESS	include/tpm.h	/^	TPM_SUCCESS	= TPM_BASE,$/;"	e	enum:tpm_return_code
TPM_TIMEOUT_MS	drivers/tpm/tpm_tis.h	/^	TPM_TIMEOUT_MS			= 5,$/;"	e	enum:tpm_timeout
TPM_TIS_I2C_BURST_LIMITATION	drivers/tpm/Kconfig	/^config TPM_TIS_I2C_BURST_LIMITATION$/;"	c	menu:TPM support
TPM_TIS_I2C_BURST_LIMITATION_LEN	drivers/tpm/Kconfig	/^config TPM_TIS_I2C_BURST_LIMITATION_LEN$/;"	c	menu:TPM support
TPM_TIS_I2C_DID_VID_9635	drivers/tpm/tpm_tis_infineon.c	/^#define TPM_TIS_I2C_DID_VID_9635 /;"	d	file:
TPM_TIS_I2C_DID_VID_9645	drivers/tpm/tpm_tis_infineon.c	/^#define TPM_TIS_I2C_DID_VID_9645 /;"	d	file:
TPM_TIS_INFINEON	drivers/tpm/Kconfig	/^config TPM_TIS_INFINEON$/;"	c	menu:TPM support
TPM_TIS_LPC	drivers/tpm/Kconfig	/^config TPM_TIS_LPC$/;"	c	menu:TPM support
TPM_TIS_SANDBOX	drivers/tpm/Kconfig	/^config TPM_TIS_SANDBOX$/;"	c	menu:TPM support
TPM_TOOMANYCONTEXTS	include/tpm.h	/^	TPM_TOOMANYCONTEXTS		= TPM_BASE + 91,$/;"	e	enum:tpm_return_code
TPM_TOTAL_LOCALITIES	drivers/tpm/tpm_tis_lpc.c	/^#define TPM_TOTAL_LOCALITIES	/;"	d	file:
TPM_TRANSPORT_NOTEXCLUSIVE	include/tpm.h	/^	TPM_TRANSPORT_NOTEXCLUSIVE	= TPM_BASE + 78,$/;"	e	enum:tpm_return_code
TPM_UNDEFINED	include/tpm.h	/^	TPM_UNDEFINED,$/;"	e	enum:tpm_duration
TPM_WRITE_DIRECTION	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^#define TPM_WRITE_DIRECTION /;"	d	file:
TPM_WRITE_DIRECTION	drivers/tpm/tpm_tis_st33zp24_spi.c	/^#define TPM_WRITE_DIRECTION	/;"	d	file:
TPM_WRITE_LOCKED	include/tpm.h	/^	TPM_WRITE_LOCKED		= TPM_BASE + 65,$/;"	e	enum:tpm_return_code
TPM_WRONGPCRVAL	include/tpm.h	/^	TPM_WRONGPCRVAL			= TPM_BASE + 24,$/;"	e	enum:tpm_return_code
TPM_WRONG_ENTITYTYPE	include/tpm.h	/^	TPM_WRONG_ENTITYTYPE		= TPM_BASE + 37,$/;"	e	enum:tpm_return_code
TPOLC	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define TPOLC	/;"	d
TPOLC	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define TPOLC	/;"	d
TPOLC_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define TPOLC_P	/;"	d
TPRER1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TPRER1 /;"	d
TPRER2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TPRER2 /;"	d
TPRER_PRES	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TPRER_PRES /;"	d
TPRER_PRES	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TPRER_PRES	/;"	d
TPS62361B_I2C_ADDR	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS62361B_I2C_ADDR	/;"	d	file:
TPS62361B_SET3_DATA	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS62361B_SET3_DATA	/;"	d	file:
TPS62361B_SET3_REG	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS62361B_SET3_REG	/;"	d	file:
TPS62361_BASE_VOLT_MV	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_BASE_VOLT_MV	/;"	d
TPS62361_BASE_VOLT_MV	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_BASE_VOLT_MV	/;"	d
TPS62361_I2C_SLAVE_ADDR	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_I2C_SLAVE_ADDR	/;"	d
TPS62361_I2C_SLAVE_ADDR	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_I2C_SLAVE_ADDR	/;"	d
TPS62361_REG_ADDR_CHIP_ID	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_CHIP_ID	/;"	d
TPS62361_REG_ADDR_CHIP_ID	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_CHIP_ID	/;"	d
TPS62361_REG_ADDR_CHIP_ID_2	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_CHIP_ID_2	/;"	d
TPS62361_REG_ADDR_CHIP_ID_2	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_CHIP_ID_2	/;"	d
TPS62361_REG_ADDR_CTRL	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_CTRL	/;"	d
TPS62361_REG_ADDR_CTRL	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_CTRL	/;"	d
TPS62361_REG_ADDR_RMP_CTRL	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_RMP_CTRL	/;"	d
TPS62361_REG_ADDR_RMP_CTRL	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_RMP_CTRL	/;"	d
TPS62361_REG_ADDR_SET0	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_SET0	/;"	d
TPS62361_REG_ADDR_SET0	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_SET0	/;"	d
TPS62361_REG_ADDR_SET1	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_SET1	/;"	d
TPS62361_REG_ADDR_SET1	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_SET1	/;"	d
TPS62361_REG_ADDR_SET2	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_SET2	/;"	d
TPS62361_REG_ADDR_SET2	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_SET2	/;"	d
TPS62361_REG_ADDR_SET3	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_SET3	/;"	d
TPS62361_REG_ADDR_SET3	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_SET3	/;"	d
TPS62361_REG_ADDR_TEMP	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_REG_ADDR_TEMP	/;"	d
TPS62361_REG_ADDR_TEMP	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_REG_ADDR_TEMP	/;"	d
TPS62361_VSEL0_GPIO	arch/arm/include/asm/arch-omap4/clock.h	/^#define TPS62361_VSEL0_GPIO	/;"	d
TPS62361_VSEL0_GPIO	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS62361_VSEL0_GPIO	/;"	d
TPS62362_DCDC_VOLT_SEL_0950MV	include/power/tps62362.h	/^#define TPS62362_DCDC_VOLT_SEL_0950MV	/;"	d
TPS62362_DCDC_VOLT_SEL_1100MV	include/power/tps62362.h	/^#define TPS62362_DCDC_VOLT_SEL_1100MV	/;"	d
TPS62362_DCDC_VOLT_SEL_1200MV	include/power/tps62362.h	/^#define TPS62362_DCDC_VOLT_SEL_1200MV	/;"	d
TPS62362_DCDC_VOLT_SEL_1260MV	include/power/tps62362.h	/^#define TPS62362_DCDC_VOLT_SEL_1260MV	/;"	d
TPS62362_DCDC_VOLT_SEL_1330MV	include/power/tps62362.h	/^#define TPS62362_DCDC_VOLT_SEL_1330MV	/;"	d
TPS62362_I2C_ADDR	include/power/tps62362.h	/^#define TPS62362_I2C_ADDR	/;"	d
TPS62362_NUM_REGS	include/power/tps62362.h	/^#define TPS62362_NUM_REGS	/;"	d
TPS62362_SET0	include/power/tps62362.h	/^#define TPS62362_SET0	/;"	d
TPS62362_SET1	include/power/tps62362.h	/^#define TPS62362_SET1	/;"	d
TPS62362_SET2	include/power/tps62362.h	/^#define TPS62362_SET2	/;"	d
TPS62362_SET3	include/power/tps62362.h	/^#define TPS62362_SET3	/;"	d
TPS62366A_I2C_ADDR	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS62366A_I2C_ADDR	/;"	d	file:
TPS62366A_SET1_DATA	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS62366A_SET1_DATA	/;"	d	file:
TPS62366A_SET1_REG	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS62366A_SET1_REG	/;"	d	file:
TPS65090_FET_DRIVER	include/power/tps65090.h	/^#define TPS65090_FET_DRIVER	/;"	d
TPS65090_I2C_ADDR	include/power/tps65090.h	/^#define TPS65090_I2C_ADDR	/;"	d
TPS65090_NUM_REGS	include/power/tps65090.h	/^	TPS65090_NUM_REGS,$/;"	e	enum:__anon01d79aa50103
TPS65090_ST1_OCC	include/power/tps65090.h	/^	TPS65090_ST1_OCC	= 1 << 1,$/;"	e	enum:__anon01d79aa50303
TPS65090_ST1_OTC	include/power/tps65090.h	/^	TPS65090_ST1_OTC	= 1 << 0,$/;"	e	enum:__anon01d79aa50303
TPS65090_ST1_STATE_MASK	include/power/tps65090.h	/^	TPS65090_ST1_STATE_MASK	= 0xf << TPS65090_ST1_STATE_SHIFT,$/;"	e	enum:__anon01d79aa50303
TPS65090_ST1_STATE_SHIFT	include/power/tps65090.h	/^	TPS65090_ST1_STATE_SHIFT = 4,$/;"	e	enum:__anon01d79aa50303
TPS65217_CHGCONFIG0	include/power/tps65217.h	/^	TPS65217_CHGCONFIG0,$/;"	e	enum:__anon01f786660103
TPS65217_CHGCONFIG1	include/power/tps65217.h	/^	TPS65217_CHGCONFIG1,$/;"	e	enum:__anon01f786660103
TPS65217_CHGCONFIG2	include/power/tps65217.h	/^	TPS65217_CHGCONFIG2,$/;"	e	enum:__anon01f786660103
TPS65217_CHGCONFIG3	include/power/tps65217.h	/^	TPS65217_CHGCONFIG3,$/;"	e	enum:__anon01f786660103
TPS65217_CHIPID	include/power/tps65217.h	/^	TPS65217_CHIPID				= 0x00,$/;"	e	enum:__anon01f786660103
TPS65217_CHIP_PM	include/power/tps65217.h	/^#define TPS65217_CHIP_PM	/;"	d
TPS65217_DCDC_GO	include/power/tps65217.h	/^#define TPS65217_DCDC_GO	/;"	d
TPS65217_DCDC_VOLT_SEL_1100MV	include/power/tps65217.h	/^#define TPS65217_DCDC_VOLT_SEL_1100MV	/;"	d
TPS65217_DCDC_VOLT_SEL_1125MV	include/power/tps65217.h	/^#define TPS65217_DCDC_VOLT_SEL_1125MV	/;"	d
TPS65217_DCDC_VOLT_SEL_1200MV	include/power/tps65217.h	/^#define TPS65217_DCDC_VOLT_SEL_1200MV	/;"	d
TPS65217_DCDC_VOLT_SEL_1275MV	include/power/tps65217.h	/^#define TPS65217_DCDC_VOLT_SEL_1275MV	/;"	d
TPS65217_DCDC_VOLT_SEL_1325MV	include/power/tps65217.h	/^#define TPS65217_DCDC_VOLT_SEL_1325MV	/;"	d
TPS65217_DCDC_VOLT_SEL_950MV	include/power/tps65217.h	/^#define TPS65217_DCDC_VOLT_SEL_950MV	/;"	d
TPS65217_DEFDCDC1	include/power/tps65217.h	/^	TPS65217_DEFDCDC1,$/;"	e	enum:__anon01f786660103
TPS65217_DEFDCDC2	include/power/tps65217.h	/^	TPS65217_DEFDCDC2,$/;"	e	enum:__anon01f786660103
TPS65217_DEFDCDC3	include/power/tps65217.h	/^	TPS65217_DEFDCDC3,$/;"	e	enum:__anon01f786660103
TPS65217_DEFLDO1	include/power/tps65217.h	/^	TPS65217_DEFLDO1,$/;"	e	enum:__anon01f786660103
TPS65217_DEFLDO2	include/power/tps65217.h	/^	TPS65217_DEFLDO2,$/;"	e	enum:__anon01f786660103
TPS65217_DEFLS1	include/power/tps65217.h	/^	TPS65217_DEFLS1,$/;"	e	enum:__anon01f786660103
TPS65217_DEFLS2	include/power/tps65217.h	/^	TPS65217_DEFLS2,$/;"	e	enum:__anon01f786660103
TPS65217_DEFPG	include/power/tps65217.h	/^	TPS65217_DEFPG,$/;"	e	enum:__anon01f786660103
TPS65217_DEFSLEW	include/power/tps65217.h	/^	TPS65217_DEFSLEW,$/;"	e	enum:__anon01f786660103
TPS65217_DEFUVLO	include/power/tps65217.h	/^	TPS65217_DEFUVLO,$/;"	e	enum:__anon01f786660103
TPS65217_ENABLE	include/power/tps65217.h	/^	TPS65217_ENABLE,$/;"	e	enum:__anon01f786660103
TPS65217_INTERRUPT	include/power/tps65217.h	/^	TPS65217_INTERRUPT,$/;"	e	enum:__anon01f786660103
TPS65217_LDO_MASK	include/power/tps65217.h	/^#define TPS65217_LDO_MASK	/;"	d
TPS65217_LDO_VOLTAGE_OUT_1_8	include/power/tps65217.h	/^#define TPS65217_LDO_VOLTAGE_OUT_1_8	/;"	d
TPS65217_LDO_VOLTAGE_OUT_3_3	include/power/tps65217.h	/^#define TPS65217_LDO_VOLTAGE_OUT_3_3	/;"	d
TPS65217_MASK_ALL_BITS	include/power/tps65217.h	/^#define TPS65217_MASK_ALL_BITS	/;"	d
TPS65217_MUXCTRL	include/power/tps65217.h	/^	TPS65217_MUXCTRL,$/;"	e	enum:__anon01f786660103
TPS65217_PASSWORD	include/power/tps65217.h	/^	TPS65217_PASSWORD,$/;"	e	enum:__anon01f786660103
TPS65217_PASSWORD_LOCK_FOR_WRITE	include/power/tps65217.h	/^#define TPS65217_PASSWORD_LOCK_FOR_WRITE	/;"	d
TPS65217_PASSWORD_UNLOCK	include/power/tps65217.h	/^#define TPS65217_PASSWORD_UNLOCK	/;"	d
TPS65217_PGOOD	include/power/tps65217.h	/^	TPS65217_PGOOD,$/;"	e	enum:__anon01f786660103
TPS65217_PMIC_NUM_OF_REGS	include/power/tps65217.h	/^	TPS65217_PMIC_NUM_OF_REGS,$/;"	e	enum:__anon01f786660103
TPS65217_POWER_PATH	include/power/tps65217.h	/^	TPS65217_POWER_PATH,$/;"	e	enum:__anon01f786660103
TPS65217_PROT_LEVEL_1	include/power/tps65217.h	/^#define TPS65217_PROT_LEVEL_1	/;"	d
TPS65217_PROT_LEVEL_2	include/power/tps65217.h	/^#define TPS65217_PROT_LEVEL_2	/;"	d
TPS65217_PROT_LEVEL_NONE	include/power/tps65217.h	/^#define TPS65217_PROT_LEVEL_NONE	/;"	d
TPS65217_PWR_OFF	include/power/tps65217.h	/^#define TPS65217_PWR_OFF	/;"	d
TPS65217_PWR_SRC_AC_BITMASK	include/power/tps65217.h	/^#define TPS65217_PWR_SRC_AC_BITMASK	/;"	d
TPS65217_PWR_SRC_USB_BITMASK	include/power/tps65217.h	/^#define TPS65217_PWR_SRC_USB_BITMASK	/;"	d
TPS65217_SEQ1	include/power/tps65217.h	/^	TPS65217_SEQ1,$/;"	e	enum:__anon01f786660103
TPS65217_SEQ2	include/power/tps65217.h	/^	TPS65217_SEQ2,$/;"	e	enum:__anon01f786660103
TPS65217_SEQ3	include/power/tps65217.h	/^	TPS65217_SEQ3,$/;"	e	enum:__anon01f786660103
TPS65217_SEQ4	include/power/tps65217.h	/^	TPS65217_SEQ4,$/;"	e	enum:__anon01f786660103
TPS65217_SEQ5	include/power/tps65217.h	/^	TPS65217_SEQ5,$/;"	e	enum:__anon01f786660103
TPS65217_SEQ6	include/power/tps65217.h	/^	TPS65217_SEQ6,$/;"	e	enum:__anon01f786660103
TPS65217_STATUS	include/power/tps65217.h	/^	TPS65217_STATUS,$/;"	e	enum:__anon01f786660103
TPS65217_USB_INPUT_CUR_LIMIT_100MA	include/power/tps65217.h	/^#define TPS65217_USB_INPUT_CUR_LIMIT_100MA	/;"	d
TPS65217_USB_INPUT_CUR_LIMIT_1300MA	include/power/tps65217.h	/^#define TPS65217_USB_INPUT_CUR_LIMIT_1300MA	/;"	d
TPS65217_USB_INPUT_CUR_LIMIT_1800MA	include/power/tps65217.h	/^#define TPS65217_USB_INPUT_CUR_LIMIT_1800MA	/;"	d
TPS65217_USB_INPUT_CUR_LIMIT_500MA	include/power/tps65217.h	/^#define TPS65217_USB_INPUT_CUR_LIMIT_500MA	/;"	d
TPS65217_USB_INPUT_CUR_LIMIT_MASK	include/power/tps65217.h	/^#define TPS65217_USB_INPUT_CUR_LIMIT_MASK	/;"	d
TPS65217_WLEDCTRL1	include/power/tps65217.h	/^	TPS65217_WLEDCTRL1,$/;"	e	enum:__anon01f786660103
TPS65217_WLEDCTRL2	include/power/tps65217.h	/^	TPS65217_WLEDCTRL2,$/;"	e	enum:__anon01f786660103
TPS65218_AC_STATE	include/power/tps65218.h	/^#define TPS65218_AC_STATE	/;"	d
TPS65218_CC_STAT	include/power/tps65218.h	/^#define TPS65218_CC_STAT	/;"	d
TPS65218_CHIPID	include/power/tps65218.h	/^	TPS65218_CHIPID				= 0x00,$/;"	e	enum:__anon01f78aa70103
TPS65218_CHIP_PM	include/power/tps65218.h	/^#define TPS65218_CHIP_PM	/;"	d
TPS65218_CONFIG1	include/power/tps65218.h	/^	TPS65218_CONFIG1,$/;"	e	enum:__anon01f78aa70103
TPS65218_CONFIG2	include/power/tps65218.h	/^	TPS65218_CONFIG2,$/;"	e	enum:__anon01f78aa70103
TPS65218_CONFIG3	include/power/tps65218.h	/^	TPS65218_CONFIG3,$/;"	e	enum:__anon01f78aa70103
TPS65218_CONTROL	include/power/tps65218.h	/^	TPS65218_CONTROL,$/;"	e	enum:__anon01f78aa70103
TPS65218_DCDC1	include/power/tps65218.h	/^	TPS65218_DCDC1,$/;"	e	enum:__anon01f78aa70103
TPS65218_DCDC2	include/power/tps65218.h	/^	TPS65218_DCDC2,$/;"	e	enum:__anon01f78aa70103
TPS65218_DCDC3	include/power/tps65218.h	/^	TPS65218_DCDC3,$/;"	e	enum:__anon01f78aa70103
TPS65218_DCDC4	include/power/tps65218.h	/^	TPS65218_DCDC4,$/;"	e	enum:__anon01f78aa70103
TPS65218_DCDC_GO	include/power/tps65218.h	/^#define TPS65218_DCDC_GO	/;"	d
TPS65218_DCDC_VOLT_SEL_0950MV	include/power/tps65218.h	/^#define TPS65218_DCDC_VOLT_SEL_0950MV	/;"	d
TPS65218_DCDC_VOLT_SEL_1100MV	include/power/tps65218.h	/^#define TPS65218_DCDC_VOLT_SEL_1100MV	/;"	d
TPS65218_DCDC_VOLT_SEL_1200MV	include/power/tps65218.h	/^#define TPS65218_DCDC_VOLT_SEL_1200MV	/;"	d
TPS65218_DCDC_VOLT_SEL_1260MV	include/power/tps65218.h	/^#define TPS65218_DCDC_VOLT_SEL_1260MV	/;"	d
TPS65218_DCDC_VOLT_SEL_1330MV	include/power/tps65218.h	/^#define TPS65218_DCDC_VOLT_SEL_1330MV	/;"	d
TPS65218_EE	include/power/tps65218.h	/^#define TPS65218_EE	/;"	d
TPS65218_ENABLE1	include/power/tps65218.h	/^	TPS65218_ENABLE1,$/;"	e	enum:__anon01f78aa70103
TPS65218_ENABLE2	include/power/tps65218.h	/^	TPS65218_ENABLE2,$/;"	e	enum:__anon01f78aa70103
TPS65218_FLAG	include/power/tps65218.h	/^	TPS65218_FLAG,$/;"	e	enum:__anon01f78aa70103
TPS65218_FSEAL	include/power/tps65218.h	/^#define TPS65218_FSEAL	/;"	d
TPS65218_INT1	include/power/tps65218.h	/^	TPS65218_INT1,$/;"	e	enum:__anon01f78aa70103
TPS65218_INT2	include/power/tps65218.h	/^	TPS65218_INT2,$/;"	e	enum:__anon01f78aa70103
TPS65218_INT_MASK1	include/power/tps65218.h	/^	TPS65218_INT_MASK1,$/;"	e	enum:__anon01f78aa70103
TPS65218_INT_MASK2	include/power/tps65218.h	/^	TPS65218_INT_MASK2,$/;"	e	enum:__anon01f78aa70103
TPS65218_LDO1	include/power/tps65218.h	/^	TPS65218_LDO1,$/;"	e	enum:__anon01f78aa70103
TPS65218_MASK_ALL_BITS	include/power/tps65218.h	/^#define TPS65218_MASK_ALL_BITS	/;"	d
TPS65218_PASSWORD	include/power/tps65218.h	/^	TPS65218_PASSWORD			= 0x10,$/;"	e	enum:__anon01f78aa70103
TPS65218_PASSWORD_LOCK_FOR_WRITE	include/power/tps65218.h	/^#define TPS65218_PASSWORD_LOCK_FOR_WRITE	/;"	d
TPS65218_PASSWORD_UNLOCK	include/power/tps65218.h	/^#define TPS65218_PASSWORD_UNLOCK	/;"	d
TPS65218_PB_STATE	include/power/tps65218.h	/^#define TPS65218_PB_STATE	/;"	d
TPS65218_PMIC_NUM_OF_REGS	include/power/tps65218.h	/^	TPS65218_PMIC_NUM_OF_REGS,$/;"	e	enum:__anon01f78aa70103
TPS65218_PROT_LEVEL_1	include/power/tps65218.h	/^#define TPS65218_PROT_LEVEL_1	/;"	d
TPS65218_PROT_LEVEL_2	include/power/tps65218.h	/^#define TPS65218_PROT_LEVEL_2	/;"	d
TPS65218_PROT_LEVEL_NONE	include/power/tps65218.h	/^#define TPS65218_PROT_LEVEL_NONE	/;"	d
TPS65218_SEQ1	include/power/tps65218.h	/^	TPS65218_SEQ1				= 0x20,$/;"	e	enum:__anon01f78aa70103
TPS65218_SEQ2	include/power/tps65218.h	/^	TPS65218_SEQ2,$/;"	e	enum:__anon01f78aa70103
TPS65218_SEQ3	include/power/tps65218.h	/^	TPS65218_SEQ3,$/;"	e	enum:__anon01f78aa70103
TPS65218_SEQ4	include/power/tps65218.h	/^	TPS65218_SEQ4,$/;"	e	enum:__anon01f78aa70103
TPS65218_SEQ5	include/power/tps65218.h	/^	TPS65218_SEQ5,$/;"	e	enum:__anon01f78aa70103
TPS65218_SEQ6	include/power/tps65218.h	/^	TPS65218_SEQ6,$/;"	e	enum:__anon01f78aa70103
TPS65218_SEQ7	include/power/tps65218.h	/^	TPS65218_SEQ7,$/;"	e	enum:__anon01f78aa70103
TPS65218_SLEW	include/power/tps65218.h	/^	TPS65218_SLEW,$/;"	e	enum:__anon01f78aa70103
TPS65218_STATE	include/power/tps65218.h	/^#define TPS65218_STATE	/;"	d
TPS65218_STATUS	include/power/tps65218.h	/^	TPS65218_STATUS,$/;"	e	enum:__anon01f78aa70103
TPS6586X_PWM_SM0	include/tps6586x.h	/^	TPS6586X_PWM_SM0	= 1 << 0,$/;"	e	enum:__anon44da9ad60103
TPS6586X_PWM_SM1	include/tps6586x.h	/^	TPS6586X_PWM_SM1	= 1 << 1,$/;"	e	enum:__anon44da9ad60103
TPS6586X_PWM_SM2	include/tps6586x.h	/^	TPS6586X_PWM_SM2	= 1 << 2,$/;"	e	enum:__anon44da9ad60103
TPS659038	include/power/palmas.h	/^#define TPS659038	/;"	d
TPS659038_I2C_SLAVE_ADDR	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS659038_I2C_SLAVE_ADDR	/;"	d
TPS659038_REG_ADDR_SMPS12	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS659038_REG_ADDR_SMPS12	/;"	d
TPS659038_REG_ADDR_SMPS45	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS659038_REG_ADDR_SMPS45	/;"	d
TPS659038_REG_ADDR_SMPS6	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS659038_REG_ADDR_SMPS6	/;"	d
TPS659038_REG_ADDR_SMPS7	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS659038_REG_ADDR_SMPS7	/;"	d
TPS659038_REG_ADDR_SMPS8	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS659038_REG_ADDR_SMPS8	/;"	d
TPS65903X_CHIP_P1	include/palmas.h	/^#define TPS65903X_CHIP_P1	/;"	d
TPS65910_CTRL_I2C_ADDR	include/power/tps65910.h	/^#define TPS65910_CTRL_I2C_ADDR	/;"	d
TPS65910_DEVCTRL_REG	include/power/tps65910.h	/^	TPS65910_DEVCTRL_REG				= 0x3F,$/;"	e	enum:__anon027614260103
TPS65910_DEVCTRL_REG_SR_CTL_I2C_MASK	include/power/tps65910.h	/^#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_MASK	/;"	d
TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C	include/power/tps65910.h	/^#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C	/;"	d
TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C	include/power/tps65910.h	/^#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C	/;"	d
TPS65910_ILMAX_MASK	include/power/tps65910.h	/^#define TPS65910_ILMAX_MASK	/;"	d
TPS65910_OP_REG_CMD_MASK	include/power/tps65910.h	/^#define TPS65910_OP_REG_CMD_MASK	/;"	d
TPS65910_OP_REG_CMD_OP	include/power/tps65910.h	/^#define TPS65910_OP_REG_CMD_OP	/;"	d
TPS65910_OP_REG_CMD_SR	include/power/tps65910.h	/^#define TPS65910_OP_REG_CMD_SR	/;"	d
TPS65910_OP_REG_SEL	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL	/;"	d
TPS65910_OP_REG_SEL_0_9_5	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL_0_9_5	/;"	d
TPS65910_OP_REG_SEL_1_1_3	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL_1_1_3	/;"	d
TPS65910_OP_REG_SEL_1_2_0	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL_1_2_0	/;"	d
TPS65910_OP_REG_SEL_1_2_6	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL_1_2_6	/;"	d
TPS65910_OP_REG_SEL_1_3_2_5	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL_1_3_2_5	/;"	d
TPS65910_OP_REG_SEL_MASK	include/power/tps65910.h	/^#define TPS65910_OP_REG_SEL_MASK	/;"	d
TPS65910_REG_ILMAX_1_0_A	include/power/tps65910.h	/^#define TPS65910_REG_ILMAX_1_0_A	/;"	d
TPS65910_REG_ILMAX_1_5_A	include/power/tps65910.h	/^#define TPS65910_REG_ILMAX_1_5_A	/;"	d
TPS65910_REG_ST_OFF	include/power/tps65910.h	/^#define TPS65910_REG_ST_OFF	/;"	d
TPS65910_REG_ST_OFF_1	include/power/tps65910.h	/^#define TPS65910_REG_ST_OFF_1	/;"	d
TPS65910_REG_ST_ON_HI_POW	include/power/tps65910.h	/^#define TPS65910_REG_ST_ON_HI_POW	/;"	d
TPS65910_REG_ST_ON_LOW_POW	include/power/tps65910.h	/^#define TPS65910_REG_ST_ON_LOW_POW	/;"	d
TPS65910_REG_TSTEP_	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_	/;"	d
TPS65910_REG_TSTEP_12_5	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_12_5	/;"	d
TPS65910_REG_TSTEP_2_5	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_2_5	/;"	d
TPS65910_REG_TSTEP_3_12	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_3_12	/;"	d
TPS65910_REG_TSTEP_4_7	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_4_7	/;"	d
TPS65910_REG_TSTEP_6_25	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_6_25	/;"	d
TPS65910_REG_TSTEP_7_5	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_7_5	/;"	d
TPS65910_REG_TSTEP_9_4	include/power/tps65910.h	/^#define TPS65910_REG_TSTEP_9_4	/;"	d
TPS65910_REG_VGAIN_SEL_X1	include/power/tps65910.h	/^#define TPS65910_REG_VGAIN_SEL_X1	/;"	d
TPS65910_REG_VGAIN_SEL_X1_0	include/power/tps65910.h	/^#define TPS65910_REG_VGAIN_SEL_X1_0	/;"	d
TPS65910_REG_VGAIN_SEL_X3	include/power/tps65910.h	/^#define TPS65910_REG_VGAIN_SEL_X3	/;"	d
TPS65910_REG_VGAIN_SEL_X4	include/power/tps65910.h	/^#define TPS65910_REG_VGAIN_SEL_X4	/;"	d
TPS65910_SR_I2C_ADDR	include/power/tps65910.h	/^#define TPS65910_SR_I2C_ADDR	/;"	d
TPS65910_ST_MASK	include/power/tps65910.h	/^#define TPS65910_ST_MASK	/;"	d
TPS65910_TSTEP_MASK	include/power/tps65910.h	/^#define TPS65910_TSTEP_MASK	/;"	d
TPS65910_VDD1_OP_REG	include/power/tps65910.h	/^	TPS65910_VDD1_OP_REG				= 0x22,$/;"	e	enum:__anon027614260103
TPS65910_VDD1_REG	include/power/tps65910.h	/^	TPS65910_VDD1_REG				= 0x21,$/;"	e	enum:__anon027614260103
TPS65910_VDD2_OP_REG	include/power/tps65910.h	/^	TPS65910_VDD2_OP_REG				= 0x25,$/;"	e	enum:__anon027614260103
TPS65910_VDD2_REG	include/power/tps65910.h	/^	TPS65910_VDD2_REG				= 0x24,$/;"	e	enum:__anon027614260103
TPS65910_VGAIN_SEL_MASK	include/power/tps65910.h	/^#define TPS65910_VGAIN_SEL_MASK	/;"	d
TPS65911_I2C_ADDR	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS65911_I2C_ADDR	/;"	d	file:
TPS65911_VDDCTRL_OP_DATA	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS65911_VDDCTRL_OP_DATA	/;"	d	file:
TPS65911_VDDCTRL_OP_REG	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS65911_VDDCTRL_OP_REG	/;"	d	file:
TPS65911_VDDCTRL_SR_DATA	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS65911_VDDCTRL_SR_DATA	/;"	d	file:
TPS65911_VDDCTRL_SR_REG	arch/arm/mach-tegra/tegra30/cpu.c	/^#define TPS65911_VDDCTRL_SR_REG	/;"	d	file:
TPS65917	include/power/palmas.h	/^#define TPS65917	/;"	d
TPS65917_I2C_SLAVE_ADDR	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS65917_I2C_SLAVE_ADDR	/;"	d
TPS65917_REG_ADDR_SMPS1	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS65917_REG_ADDR_SMPS1	/;"	d
TPS65917_REG_ADDR_SMPS2	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS65917_REG_ADDR_SMPS2	/;"	d
TPS65917_REG_ADDR_SMPS3	arch/arm/include/asm/arch-omap5/clock.h	/^#define TPS65917_REG_ADDR_SMPS3	/;"	d
TPU0TO0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TPU0TO0_MARK,	TPU0TO1_MARK,	TPU0TO3_MARK,$/;"	e	enum:__anona304c1340103	file:
TPU0TO0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,$/;"	e	enum:__anona3077f190103	file:
TPU0TO0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,$/;"	e	enum:__anona307879b0103	file:
TPU0TO0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TPU0TO0_MARK,$/;"	e	enum:__anona307945e0103	file:
TPU0TO0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAISLD_MARK, TPU0TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU0TO1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TPU0TO0_MARK,	TPU0TO1_MARK,	TPU0TO3_MARK,$/;"	e	enum:__anona304c1340103	file:
TPU0TO1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,$/;"	e	enum:__anona3077f190103	file:
TPU0TO1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,$/;"	e	enum:__anona307879b0103	file:
TPU0TO1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TPU0TO1_MARK,$/;"	e	enum:__anona307945e0103	file:
TPU0TO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A13_MARK, PORT59_KEYOUT6_MARK, TPU0TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU0TO2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,$/;"	e	enum:__anona3077f190103	file:
TPU0TO2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,$/;"	e	enum:__anona307879b0103	file:
TPU0TO2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TPU0TO2_MARK,$/;"	e	enum:__anona307945e0103	file:
TPU0TO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D10_MARK, TPU0TO2_MARK, VIO2_D2_MARK, LCD2D8_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU0TO2_PORT202_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TPU0TO2_PORT202_MARK,$/;"	e	enum:__anona304c1340103	file:
TPU0TO2_PORT66_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TPU0TO2_PORT66_MARK, \/* TPU0TO2 Port 66\/202 *\/$/;"	e	enum:__anona304c1340103	file:
TPU0TO3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TPU0TO0_MARK,	TPU0TO1_MARK,	TPU0TO3_MARK,$/;"	e	enum:__anona304c1340103	file:
TPU0TO3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,$/;"	e	enum:__anona3077f190103	file:
TPU0TO3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK,$/;"	e	enum:__anona307879b0103	file:
TPU0TO3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TPU0TO3_MARK,$/;"	e	enum:__anona307945e0103	file:
TPU0TO3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D11_MARK, TPU0TO3_MARK, VIO2_D3_MARK, LCD2D9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU1TO0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU1TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU1TO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU1TO3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D15_MARK, TPU1TO3_MARK, PORT145_LCD2DISP_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
TPU2TO0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU2TO0_MARK, PORT248_I2C_SCL3_MARK, MSIOF2R_TSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU2TO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU2TO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, FSIAILR_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU2TO3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIAOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, FSIAIBT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU3TO0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT163_SCIFB_RTS__MARK, PORT163_SCIFA5_RTS__MARK, TPU3TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU3TO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU3TO1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU3TO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIBCK_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FSIBOMC_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
TPU3TO3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	FSIASPDIF_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, FSIBSPDIF_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
TPU4TO0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, TPU4TO0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU4TO1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU4TO2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	A12_MARK, PORT58_KEYOUT7_MARK, TPU4TO2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPU4TO3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU4TO3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TPUTO0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_GTXREFCLK_MARK, CAN1_RX_D_MARK, TPUTO0_B_MARK, I2C0_SDA_MARK,$/;"	e	enum:__anona307901d0103	file:
TPUTO0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SCIF0_TXD_C_MARK, TPUTO0_MARK, CAN_CLK_MARK, DVC_MUTE_MARK,$/;"	e	enum:__anona307901d0103	file:
TPUTO1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DR0_MARK, RIF1_SYNC_B_MARK, TS_SDATA_D_MARK, TPUTO1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
TPU_BASE	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_BASE	/;"	d
TPU_TCNT0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCNT0	/;"	d
TPU_TCNT0	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCNT0 /;"	d
TPU_TCNT1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCNT1	/;"	d
TPU_TCNT1	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCNT1 /;"	d
TPU_TCNT2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCNT2	/;"	d
TPU_TCNT2	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCNT2 /;"	d
TPU_TCNT3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCNT3	/;"	d
TPU_TCNT3	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCNT3 /;"	d
TPU_TCR0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCR0	/;"	d
TPU_TCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCR0 /;"	d
TPU_TCR1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCR1	/;"	d
TPU_TCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCR1 /;"	d
TPU_TCR2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCR2	/;"	d
TPU_TCR2	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCR2 /;"	d
TPU_TCR3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TCR3	/;"	d
TPU_TCR3	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TCR3 /;"	d
TPU_TGR0A	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR0A /;"	d
TPU_TGR0B	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR0B /;"	d
TPU_TGR0C	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR0C /;"	d
TPU_TGR0D	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR0D /;"	d
TPU_TGR1A	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR1A /;"	d
TPU_TGR1B	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR1B /;"	d
TPU_TGR1C	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR1C /;"	d
TPU_TGR1D	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR1D /;"	d
TPU_TGR2A	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR2A /;"	d
TPU_TGR2B	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR2B /;"	d
TPU_TGR2C	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR2C /;"	d
TPU_TGR2D	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR2D /;"	d
TPU_TGR3A	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR3A /;"	d
TPU_TGR3B	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR3B /;"	d
TPU_TGR3C	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR3C /;"	d
TPU_TGR3D	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TGR3D /;"	d
TPU_TGRA0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRA0	/;"	d
TPU_TGRA1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRA1	/;"	d
TPU_TGRA2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRA2	/;"	d
TPU_TGRA3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRA3	/;"	d
TPU_TGRB0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRB0	/;"	d
TPU_TGRB1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRB1	/;"	d
TPU_TGRB2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRB2	/;"	d
TPU_TGRB3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRB3	/;"	d
TPU_TGRC0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRC0	/;"	d
TPU_TGRC1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRC1	/;"	d
TPU_TGRC2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRC2	/;"	d
TPU_TGRC3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRC3	/;"	d
TPU_TGRD0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRD0	/;"	d
TPU_TGRD1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRD1	/;"	d
TPU_TGRD2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRD2	/;"	d
TPU_TGRD3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TGRD3	/;"	d
TPU_TIER0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIER0	/;"	d
TPU_TIER0	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TIER0 /;"	d
TPU_TIER1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIER1	/;"	d
TPU_TIER1	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TIER1 /;"	d
TPU_TIER2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIER2	/;"	d
TPU_TIER2	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TIER2 /;"	d
TPU_TIER3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIER3	/;"	d
TPU_TIER3	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TIER3 /;"	d
TPU_TIOR0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIOR0	/;"	d
TPU_TIOR0	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TIOR0 /;"	d
TPU_TIOR1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIOR1	/;"	d
TPU_TIOR2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIOR2	/;"	d
TPU_TIOR3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TIOR3	/;"	d
TPU_TMDR0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TMDR0	/;"	d
TPU_TMDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TMDR0 /;"	d
TPU_TMDR1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TMDR1	/;"	d
TPU_TMDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TMDR1 /;"	d
TPU_TMDR2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TMDR2	/;"	d
TPU_TMDR2	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TMDR2 /;"	d
TPU_TMDR3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TMDR3	/;"	d
TPU_TMDR3	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TMDR3 /;"	d
TPU_TO0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TPU_TSR0	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TSR0	/;"	d
TPU_TSR0	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TSR0 /;"	d
TPU_TSR1	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TSR1	/;"	d
TPU_TSR1	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TSR1 /;"	d
TPU_TSR2	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TSR2	/;"	d
TPU_TSR2	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TSR2 /;"	d
TPU_TSR3	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TSR3	/;"	d
TPU_TSR3	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TSR3 /;"	d
TPU_TSTR	arch/sh/include/asm/cpu_sh7720.h	/^#define TPU_TSTR	/;"	d
TPU_TSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define TPU_TSTR /;"	d
TP_CLUSTER_EOC	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_CLUSTER_EOC	/;"	d
TP_CLUSTER_EOC	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_CLUSTER_EOC	/;"	d
TP_CLUSTER_EOC	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_CLUSTER_EOC	/;"	d
TP_CLUSTER_INIT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_CLUSTER_INIT_MASK /;"	d
TP_CLUSTER_INIT_MASK	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_CLUSTER_INIT_MASK	/;"	d
TP_CLUSTER_INIT_MASK	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_CLUSTER_INIT_MASK	/;"	d
TP_CNT	arch/arm/mach-exynos/exynos4_setup.h	/^#define TP_CNT	/;"	d
TP_DISABLE	arch/arm/mach-exynos/exynos4_setup.h	/^#define TP_DISABLE	/;"	d
TP_INIT_PER_CLUSTER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_INIT_PER_CLUSTER /;"	d
TP_INIT_PER_CLUSTER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_INIT_PER_CLUSTER /;"	d
TP_INIT_PER_CLUSTER	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_INIT_PER_CLUSTER	/;"	d
TP_ITYP_AV	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_AV /;"	d
TP_ITYP_AV	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_AV	/;"	d
TP_ITYP_AV	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_AV	/;"	d
TP_ITYP_THDS	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_THDS(/;"	d
TP_ITYP_THDS	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_THDS(/;"	d
TP_ITYP_THDS	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_THDS(/;"	d
TP_ITYP_TYPE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_TYPE(/;"	d
TP_ITYP_TYPE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_TYPE(/;"	d
TP_ITYP_TYPE	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_TYPE(/;"	d
TP_ITYP_TYPE_ARM	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_TYPE_ARM /;"	d
TP_ITYP_TYPE_ARM	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_TYPE_ARM	/;"	d
TP_ITYP_TYPE_HA	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_TYPE_HA /;"	d
TP_ITYP_TYPE_HA	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_TYPE_HA	/;"	d
TP_ITYP_TYPE_HA	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_TYPE_HA	/;"	d
TP_ITYP_TYPE_OTHER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_TYPE_OTHER /;"	d
TP_ITYP_TYPE_OTHER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_TYPE_OTHER	/;"	d
TP_ITYP_TYPE_OTHER	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_TYPE_OTHER	/;"	d
TP_ITYP_TYPE_PPC	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_TYPE_PPC /;"	d
TP_ITYP_TYPE_PPC	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_TYPE_PPC	/;"	d
TP_ITYP_TYPE_PPC	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_TYPE_PPC	/;"	d
TP_ITYP_TYPE_SC	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_TYPE_SC	/;"	d
TP_ITYP_VER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TP_ITYP_VER(/;"	d
TP_ITYP_VER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TP_ITYP_VER(/;"	d
TP_ITYP_VER	arch/powerpc/include/asm/immap_85xx.h	/^#define TP_ITYP_VER(/;"	d
TQMA6Q	board/tqc/tqma6/Kconfig	/^config TQMA6Q$/;"	c	choice:choice3e84a7cc0104
TQMA6S	board/tqc/tqma6/Kconfig	/^config TQMA6S$/;"	c	choice:choice3e84a7cc0104
TQMA6X_MMC_BOOT	board/tqc/tqma6/Kconfig	/^config TQMA6X_MMC_BOOT$/;"	c	choice:choice3e84a7cc0204
TQMA6X_SPI_BOOT	board/tqc/tqma6/Kconfig	/^config TQMA6X_SPI_BOOT$/;"	c	choice:choice3e84a7cc0204
TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS	include/configs/tqma6.h	/^#define TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS /;"	d
TQMA6_FDT_ADDRESS	include/configs/tqma6.h	/^#define TQMA6_FDT_ADDRESS	/;"	d
TQMA6_FDT_OFFSET	include/configs/tqma6.h	/^#define TQMA6_FDT_OFFSET	/;"	d
TQMA6_FDT_SECTOR_COUNT	include/configs/tqma6.h	/^#define TQMA6_FDT_SECTOR_COUNT	/;"	d
TQMA6_FDT_SECTOR_START	include/configs/tqma6.h	/^#define TQMA6_FDT_SECTOR_START	/;"	d
TQMA6_FDT_SECT_SIZE	include/configs/tqma6.h	/^#define TQMA6_FDT_SECT_SIZE	/;"	d
TQMA6_KERNEL_SECTOR_COUNT	include/configs/tqma6.h	/^#define TQMA6_KERNEL_SECTOR_COUNT	/;"	d
TQMA6_KERNEL_SECTOR_START	include/configs/tqma6.h	/^#define TQMA6_KERNEL_SECTOR_START	/;"	d
TQMA6_PFUZE100_I2C_BUS	include/configs/tqma6.h	/^#define TQMA6_PFUZE100_I2C_BUS	/;"	d
TQMA6_SF_CS_GPIO	board/tqc/tqma6/tqma6.c	/^#define TQMA6_SF_CS_GPIO /;"	d	file:
TQMA6_SPI_FLASH_SECTOR_SIZE	include/configs/tqma6.h	/^#define TQMA6_SPI_FLASH_SECTOR_SIZE	/;"	d
TQMA6_UBOOT_OFFSET	include/configs/tqma6.h	/^#define TQMA6_UBOOT_OFFSET	/;"	d
TQMA6_UBOOT_SECTOR_COUNT	include/configs/tqma6.h	/^#define TQMA6_UBOOT_SECTOR_COUNT	/;"	d
TQMA6_UBOOT_SECTOR_SIZE	include/configs/tqma6.h	/^#define TQMA6_UBOOT_SECTOR_SIZE	/;"	d
TQMA6_UBOOT_SECTOR_START	include/configs/tqma6.h	/^#define TQMA6_UBOOT_SECTOR_START	/;"	d
TQMA6_UBOOT_SIZE	include/configs/tqma6.h	/^#define TQMA6_UBOOT_SIZE	/;"	d
TR	scripts/kconfig/lxdialog/dialog.h	/^#define TR(/;"	d
TR2R_HIGH_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TR2R_HIGH_MASK_REG	/;"	d
TR2R_HIGH_VALUE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TR2R_HIGH_VALUE_REG	/;"	d
TR2R_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TR2R_MASK_REG	/;"	d
TR2R_VALUE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TR2R_VALUE_REG	/;"	d
TR2W_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TR2W_MASK_REG	/;"	d
TRA	arch/sh/include/asm/cpu_sh7720.h	/^#define TRA	/;"	d
TRA	arch/sh/include/asm/cpu_sh7722.h	/^#define TRA	/;"	d
TRA	arch/sh/include/asm/cpu_sh7723.h	/^#define TRA	/;"	d
TRA	arch/sh/include/asm/cpu_sh7724.h	/^#define TRA	/;"	d
TRA	arch/sh/include/asm/cpu_sh7750.h	/^#define TRA	/;"	d
TRA	arch/sh/include/asm/cpu_sh7780.h	/^#define	TRA	/;"	d
TRA	arch/sh/include/asm/cpu_sh7785.h	/^#define	TRA	/;"	d
TRACEAUD_FROM_LCDC0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TRACEAUD_FROM_LCDC0_MARK,$/;"	e	enum:__anona304c1340103	file:
TRACEAUD_FROM_MEMC_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TRACEAUD_FROM_MEMC_MARK,$/;"	e	enum:__anona304c1340103	file:
TRACEAUD_FROM_VIO_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	TRACEAUD_FROM_VIO_MARK,	\/* for TRACE\/AUD *\/$/;"	e	enum:__anona304c1340103	file:
TRACEREG_SZ	arch/sparc/include/asm/ptrace.h	/^#define TRACEREG_SZ /;"	d
TRACE_AND_STEP	drivers/bios_emulator/include/x86emu/debug.h	/^#define TRACE_AND_STEP(/;"	d
TRACE_CALL_TYPE	include/trace.h	/^#define TRACE_CALL_TYPE(/;"	d
TRACE_CHUNK_CALLS	include/trace.h	/^	TRACE_CHUNK_CALLS,$/;"	e	enum:trace_chunk_type
TRACE_CHUNK_FUNCS	include/trace.h	/^	TRACE_CHUNK_FUNCS,$/;"	e	enum:trace_chunk_type
TRACE_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	TRACE_CLK_ROOT = 118,$/;"	e	enum:clk_root_index
TRACE_CLK_ROOT_FROM_EXT_CLK_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_EXT_CLK_1	/;"	d
TRACE_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
TRACE_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
TRACE_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
TRACE_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
TRACE_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
TRACE_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
TRACE_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define TRACE_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
TRACE_ITER_CLEAN	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	TRACE_ITER_CLEAN = 1$/;"	e	enum:__anonb38d42410903
TRACE_ITER_INIT	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	TRACE_ITER_INIT = 0,$/;"	e	enum:__anonb38d42410903
TRACE_LINE_EXCLUDE	tools/proftool.c	/^	TRACE_LINE_EXCLUDE,$/;"	e	enum:trace_line_type	file:
TRACE_LINE_INCLUDE	tools/proftool.c	/^	TRACE_LINE_INCLUDE,$/;"	e	enum:trace_line_type	file:
TRACE_REGS	drivers/bios_emulator/include/x86emu/debug.h	/^# define TRACE_REGS(/;"	d
TRACE_REGS	drivers/bios_emulator/include/x86emu/debug.h	/^#define TRACE_REGS(/;"	d
TRACK	cmd/fdc.c	/^#define TRACK	/;"	d	file:
TRAFFIC_RST	board/keymile/km_arm/fpga_config.c	/^#define TRAFFIC_RST	/;"	d	file:
TRAINING_DBG_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_DBG_1_REG	/;"	d
TRAINING_DBG_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_DBG_2_REG	/;"	d
TRAINING_DBG_3_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_DBG_3_REG	/;"	d
TRAINING_EDGE_1	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	TRAINING_EDGE_1,$/;"	e	enum:hws_edge
TRAINING_EDGE_2	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	TRAINING_EDGE_2$/;"	e	enum:hws_edge
TRAINING_EDGE_MAX	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	TRAINING_EDGE_MAX,$/;"	e	enum:hws_edge_search
TRAINING_EDGE_MIN	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	TRAINING_EDGE_MIN$/;"	e	enum:hws_edge_search
TRAINING_ID	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define TRAINING_ID	/;"	d
TRAINING_LOAD_OPERATION_LOAD	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	TRAINING_LOAD_OPERATION_LOAD$/;"	e	enum:hws_training_load_op
TRAINING_LOAD_OPERATION_UNLOAD	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^	TRAINING_LOAD_OPERATION_UNLOAD,$/;"	e	enum:hws_training_load_op
TRAINING_OPCODE_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_OPCODE_1_REG	/;"	d
TRAINING_PATTERN_BASE_ADDRESS_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_PATTERN_BASE_ADDRESS_REG	/;"	d
TRAINING_PTN1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	TRAINING_PTN1,$/;"	e	enum:pattern_set
TRAINING_PTN1	arch/arm/mach-exynos/include/mach/dp_info.h	/^	TRAINING_PTN1,$/;"	e	enum:__anon79d8640c0b03
TRAINING_PTN2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	TRAINING_PTN2,$/;"	e	enum:pattern_set
TRAINING_PTN2	arch/arm/mach-exynos/include/mach/dp_info.h	/^	TRAINING_PTN2,$/;"	e	enum:__anon79d8640c0b03
TRAINING_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_REG	/;"	d
TRAINING_SIZE	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define TRAINING_SIZE	/;"	d
TRAINING_SW_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_SW_1_REG	/;"	d
TRAINING_SW_2_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_SW_2_REG	/;"	d
TRAINING_WRITE_LEVELING_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define TRAINING_WRITE_LEVELING_REG	/;"	d
TRANSACTION_COMPLETE	fs/ext4/ext4_journal.h	/^#define TRANSACTION_COMPLETE	/;"	d
TRANSACTION_RUNNING	fs/ext4/ext4_journal.h	/^#define TRANSACTION_RUNNING	/;"	d
TRANSA_DPLLA_SEL	drivers/video/i915_reg.h	/^#define	 TRANSA_DPLLA_SEL	/;"	d
TRANSA_DPLLB_SEL	drivers/video/i915_reg.h	/^#define	 TRANSA_DPLLB_SEL	/;"	d
TRANSA_DPLL_ENABLE	drivers/video/i915_reg.h	/^#define  TRANSA_DPLL_ENABLE	/;"	d
TRANSB_DPLLA_SEL	drivers/video/i915_reg.h	/^#define	 TRANSB_DPLLA_SEL	/;"	d
TRANSB_DPLLB_SEL	drivers/video/i915_reg.h	/^#define	 TRANSB_DPLLB_SEL	/;"	d
TRANSB_DPLL_ENABLE	drivers/video/i915_reg.h	/^#define  TRANSB_DPLL_ENABLE	/;"	d
TRANSCFG_DFIS_SIZE_SHIFT	drivers/block/fsl_sata.h	/^#define TRANSCFG_DFIS_SIZE_SHIFT	/;"	d
TRANSCFG_RX_WATER_MARK_MASK	drivers/block/fsl_sata.h	/^#define TRANSCFG_RX_WATER_MARK_MASK	/;"	d
TRANSC_DPLLA_SEL	drivers/video/i915_reg.h	/^#define	 TRANSC_DPLLA_SEL	/;"	d
TRANSC_DPLLB_SEL	drivers/video/i915_reg.h	/^#define	 TRANSC_DPLLB_SEL	/;"	d
TRANSC_DPLL_ENABLE	drivers/video/i915_reg.h	/^#define  TRANSC_DPLL_ENABLE	/;"	d
TRANSFER_DONE	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define TRANSFER_DONE	/;"	d
TRANSFER_LEN	arch/powerpc/cpu/mpc5xx/spi.c	/^#define TRANSFER_LEN /;"	d	file:
TRANSFER_MODE	drivers/mtd/nand/denali.h	/^#define TRANSFER_MODE	/;"	d
TRANSFER_MODE__VALUE	drivers/mtd/nand/denali.h	/^#define     TRANSFER_MODE__VALUE	/;"	d
TRANSFER_SPARE_REG	drivers/mtd/nand/denali.h	/^#define TRANSFER_SPARE_REG	/;"	d
TRANSFER_SPARE_REG__FLAG	drivers/mtd/nand/denali.h	/^#define     TRANSFER_SPARE_REG__FLAG	/;"	d
TRANS_HACTIVE_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_HACTIVE_SHIFT /;"	d
TRANS_HBLANK_END_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_HBLANK_END_SHIFT /;"	d
TRANS_HBLANK_START_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_HBLANK_START_SHIFT /;"	d
TRANS_HSYNC_END_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_HSYNC_END_SHIFT /;"	d
TRANS_HSYNC_START_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_HSYNC_START_SHIFT /;"	d
TRANS_HTOTAL_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_HTOTAL_SHIFT /;"	d
TRANS_VACTIVE_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_VACTIVE_SHIFT /;"	d
TRANS_VBLANK_END_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_VBLANK_END_SHIFT /;"	d
TRANS_VBLANK_START_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_VBLANK_START_SHIFT /;"	d
TRANS_VSYNC_END_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_VSYNC_END_SHIFT /;"	d
TRANS_VSYNC_START_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_VSYNC_START_SHIFT /;"	d
TRANS_VTOTAL_SHIFT	drivers/video/i915_reg.h	/^#define  TRANS_VTOTAL_SHIFT /;"	d
TRAP	arch/sparc/cpu/leon2/start.S	/^#define TRAP(/;"	d	file:
TRAP	arch/sparc/cpu/leon3/start.S	/^#define TRAP(/;"	d	file:
TRAP	include/ppc_defs.h	/^#define	TRAP	/;"	d
TRAPI	arch/sparc/cpu/leon2/start.S	/^#define TRAPI(/;"	d	file:
TRAPI	arch/sparc/cpu/leon3/start.S	/^#define TRAPI(/;"	d	file:
TRAPR	arch/sparc/cpu/leon2/start.S	/^#define TRAPR(/;"	d	file:
TRAPR	arch/sparc/cpu/leon3/start.S	/^#define TRAPR(/;"	d	file:
TRAS_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_1	/;"	d
TRAS_10	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_10	/;"	d
TRAS_11	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_11	/;"	d
TRAS_12	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_12	/;"	d
TRAS_13	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_13	/;"	d
TRAS_14	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_14	/;"	d
TRAS_15	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_15	/;"	d
TRAS_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_2	/;"	d
TRAS_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_3	/;"	d
TRAS_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_4	/;"	d
TRAS_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_5	/;"	d
TRAS_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_6	/;"	d
TRAS_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_7	/;"	d
TRAS_8	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_8	/;"	d
TRAS_9	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRAS_9	/;"	d
TRBS_PER_SEGMENT	drivers/usb/host/xhci.h	/^#define TRBS_PER_SEGMENT	/;"	d
TRB_ADDR_DEV	drivers/usb/host/xhci.h	/^	TRB_ADDR_DEV, \/* 11 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_BANDWIDTH_EVENT	drivers/usb/host/xhci.h	/^	TRB_BANDWIDTH_EVENT, \/* 35 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_BEI	drivers/usb/host/xhci.h	/^#define	TRB_BEI	/;"	d
TRB_CHAIN	drivers/usb/host/xhci.h	/^#define TRB_CHAIN	/;"	d
TRB_CMD_NOOP	drivers/usb/host/xhci.h	/^	TRB_CMD_NOOP, \/* 23 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_COMPLETION	drivers/usb/host/xhci.h	/^	TRB_COMPLETION, \/* 33 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_CONFIG_EP	drivers/usb/host/xhci.h	/^	TRB_CONFIG_EP, \/* 12 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_CYCLE	drivers/usb/host/xhci.h	/^#define TRB_CYCLE	/;"	d
TRB_DATA	drivers/usb/host/xhci.h	/^	TRB_DATA, \/* 3 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_DATA_IN	drivers/usb/host/xhci.h	/^#define	TRB_DATA_IN	/;"	d
TRB_DATA_OUT	drivers/usb/host/xhci.h	/^#define	TRB_DATA_OUT	/;"	d
TRB_DEV_NOTE	drivers/usb/host/xhci.h	/^	TRB_DEV_NOTE, \/* 38 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_DIR_IN	drivers/usb/host/xhci.h	/^#define TRB_DIR_IN	/;"	d
TRB_DISABLE_SLOT	drivers/usb/host/xhci.h	/^	TRB_DISABLE_SLOT, \/* 10 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_DOORBELL	drivers/usb/host/xhci.h	/^	TRB_DOORBELL, \/* 36 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_ENABLE_SLOT	drivers/usb/host/xhci.h	/^	TRB_ENABLE_SLOT, \/* 9 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_ENT	drivers/usb/host/xhci.h	/^#define TRB_ENT	/;"	d
TRB_EVAL_CONTEXT	drivers/usb/host/xhci.h	/^	TRB_EVAL_CONTEXT, \/* 13 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_EVENT_DATA	drivers/usb/host/xhci.h	/^	TRB_EVENT_DATA, \/* 7 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_FIELD_TO_TYPE	drivers/usb/host/xhci.h	/^#define TRB_FIELD_TO_TYPE(/;"	d
TRB_FORCE_EVENT	drivers/usb/host/xhci.h	/^	TRB_FORCE_EVENT, \/* 18 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_FORCE_HEADER	drivers/usb/host/xhci.h	/^	TRB_FORCE_HEADER, \/* 22 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_GET_BW	drivers/usb/host/xhci.h	/^	TRB_GET_BW, \/* 21 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_HC_EVENT	drivers/usb/host/xhci.h	/^	TRB_HC_EVENT, \/* 37 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_IDT	drivers/usb/host/xhci.h	/^#define TRB_IDT	/;"	d
TRB_INTR_TARGET	drivers/usb/host/xhci.h	/^#define TRB_INTR_TARGET(/;"	d
TRB_INTR_TARGET_MASK	drivers/usb/host/xhci.h	/^#define	TRB_INTR_TARGET_MASK	/;"	d
TRB_INTR_TARGET_SHIFT	drivers/usb/host/xhci.h	/^#define	TRB_INTR_TARGET_SHIFT	/;"	d
TRB_IOC	drivers/usb/host/xhci.h	/^#define TRB_IOC	/;"	d
TRB_ISOC	drivers/usb/host/xhci.h	/^	TRB_ISOC, \/* 5 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_ISP	drivers/usb/host/xhci.h	/^#define TRB_ISP	/;"	d
TRB_LEN	drivers/usb/host/xhci.h	/^#define	TRB_LEN(/;"	d
TRB_LEN_MASK	drivers/usb/host/xhci.h	/^#define	TRB_LEN_MASK	/;"	d
TRB_LINK	drivers/usb/host/xhci.h	/^	TRB_LINK, \/* 6 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_MAX_BUFF_SHIFT	drivers/usb/host/xhci.h	/^#define TRB_MAX_BUFF_SHIFT	/;"	d
TRB_MAX_BUFF_SIZE	drivers/usb/host/xhci.h	/^#define TRB_MAX_BUFF_SIZE	/;"	d
TRB_MFINDEX_WRAP	drivers/usb/host/xhci.h	/^	TRB_MFINDEX_WRAP, \/* 39 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_NEC_CMD_COMP	drivers/usb/host/xhci.h	/^	TRB_NEC_CMD_COMP = 48, \/* 48 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_NEC_GET_FW	drivers/usb/host/xhci.h	/^	TRB_NEC_GET_FW, \/* 49 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_NEG_BANDWIDTH	drivers/usb/host/xhci.h	/^	TRB_NEG_BANDWIDTH, \/* 19 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_NORMAL	drivers/usb/host/xhci.h	/^	TRB_NORMAL = 1,$/;"	e	enum:__anonfefbfedb0203
TRB_NO_SNOOP	drivers/usb/host/xhci.h	/^#define TRB_NO_SNOOP	/;"	d
TRB_PORT_STATUS	drivers/usb/host/xhci.h	/^	TRB_PORT_STATUS, \/* 34 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_RESET_DEV	drivers/usb/host/xhci.h	/^	TRB_RESET_DEV, \/* 17 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_RESET_EP	drivers/usb/host/xhci.h	/^	TRB_RESET_EP, \/* 14 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_SETUP	drivers/usb/host/xhci.h	/^	TRB_SETUP, \/* 2 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_SET_DEQ	drivers/usb/host/xhci.h	/^	TRB_SET_DEQ, \/* 16 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_SET_LT	drivers/usb/host/xhci.h	/^	TRB_SET_LT, \/* 20 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_SIA	drivers/usb/host/xhci.h	/^#define TRB_SIA	/;"	d
TRB_STATUS	drivers/usb/host/xhci.h	/^	TRB_STATUS, \/* 4 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_STOP_RING	drivers/usb/host/xhci.h	/^	TRB_STOP_RING, \/* 15 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_TBC	drivers/usb/host/xhci.h	/^#define TRB_TBC(/;"	d
TRB_TLBPC	drivers/usb/host/xhci.h	/^#define TRB_TLBPC(/;"	d
TRB_TO_EP_ID	drivers/usb/host/xhci.h	/^#define	TRB_TO_EP_ID(/;"	d
TRB_TO_EP_INDEX	drivers/usb/host/xhci.h	/^#define TRB_TO_EP_INDEX(/;"	d
TRB_TO_SLOT_ID	drivers/usb/host/xhci.h	/^#define	TRB_TO_SLOT_ID(/;"	d
TRB_TO_SLOT_ID_MASK	drivers/usb/host/xhci.h	/^#define	TRB_TO_SLOT_ID_MASK	/;"	d
TRB_TO_SLOT_ID_SHIFT	drivers/usb/host/xhci.h	/^#define	TRB_TO_SLOT_ID_SHIFT	/;"	d
TRB_TO_STREAM_ID	drivers/usb/host/xhci.h	/^#define TRB_TO_STREAM_ID(/;"	d
TRB_TO_SUSPEND_PORT	drivers/usb/host/xhci.h	/^#define TRB_TO_SUSPEND_PORT(/;"	d
TRB_TRANSFER	drivers/usb/host/xhci.h	/^	TRB_TRANSFER = 32,$/;"	e	enum:__anonfefbfedb0203
TRB_TR_NOOP	drivers/usb/host/xhci.h	/^	TRB_TR_NOOP, \/* 8 *\/$/;"	e	enum:__anonfefbfedb0203
TRB_TX_TYPE	drivers/usb/host/xhci.h	/^#define	TRB_TX_TYPE(/;"	d
TRB_TX_TYPE_SHIFT	drivers/usb/host/xhci.h	/^#define	TRB_TX_TYPE_SHIFT	/;"	d
TRB_TYPE	drivers/usb/host/xhci.h	/^#define TRB_TYPE(/;"	d
TRB_TYPE_BITMASK	drivers/usb/host/xhci.h	/^#define	TRB_TYPE_BITMASK	/;"	d
TRB_TYPE_LINK	drivers/usb/host/xhci.h	/^#define TRB_TYPE_LINK(/;"	d
TRB_TYPE_LINK_LE32	drivers/usb/host/xhci.h	/^#define TRB_TYPE_LINK_LE32(/;"	d
TRB_TYPE_NOOP_LE32	drivers/usb/host/xhci.h	/^#define TRB_TYPE_NOOP_LE32(/;"	d
TRB_TYPE_SHIFT	drivers/usb/host/xhci.h	/^#define TRB_TYPE_SHIFT	/;"	d
TRCD_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_1	/;"	d
TRCD_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_2	/;"	d
TRCD_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_3	/;"	d
TRCD_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_4	/;"	d
TRCD_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_5	/;"	d
TRCD_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_6	/;"	d
TRCD_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRCD_7	/;"	d
TRCLR	drivers/usb/host/r8a66597.h	/^#define	TRCLR	/;"	d
TRCR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define TRCR	/;"	d
TRDAT	arch/sh/include/asm/cpu_sh7722.h	/^#define TRDAT /;"	d
TREE_6_DECODE	lib/lzma/LzmaDec.c	/^#define TREE_6_DECODE(/;"	d	file:
TREE_DECODE	lib/lzma/LzmaDec.c	/^#define TREE_DECODE(/;"	d	file:
TREE_DECODE_CHECK	lib/lzma/LzmaDec.c	/^#define TREE_DECODE_CHECK(/;"	d	file:
TREE_GET_BIT	lib/lzma/LzmaDec.c	/^#define TREE_GET_BIT(/;"	d	file:
TREFI_HIGH	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TREFI_HIGH	/;"	d
TREFI_LOW	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TREFI_LOW	/;"	d
TREFI_USER	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define TREFI_USER	/;"	d
TREFI_USER_EN	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define TREFI_USER_EN$/;"	d
TREFMD	board/mpl/vcma9/lowlevel_init.S	/^#define TREFMD	/;"	d	file:
TREFMD	board/samsung/smdk2410/lowlevel_init.S	/^#define TREFMD	/;"	d	file:
TREN	include/mc13892.h	/^#define TREN	/;"	d
TRENB	drivers/usb/host/r8a66597.h	/^#define	TRENB	/;"	d
TRESET_CNTR0_VAL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/denx/mcvevk/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/ebv/socrates/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/is1/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/sr1500/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR0_VAL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL /;"	d
TRESET_CNTR0_VAL	board/terasic/sockit/qts/sdram_config.h	/^#define TRESET_CNTR0_VAL	/;"	d
TRESET_CNTR1_VAL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/denx/mcvevk/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/ebv/socrates/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/is1/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/sr1500/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR1_VAL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL /;"	d
TRESET_CNTR1_VAL	board/terasic/sockit/qts/sdram_config.h	/^#define TRESET_CNTR1_VAL	/;"	d
TRESET_CNTR2_VAL	board/altera/arria5-socdk/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/denx/mcvevk/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/ebv/socrates/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/is1/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/samtec/vining_fpga/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/sr1500/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRESET_CNTR2_VAL	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL /;"	d
TRESET_CNTR2_VAL	board/terasic/sockit/qts/sdram_config.h	/^#define TRESET_CNTR2_VAL	/;"	d
TRFC_HIGH_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TRFC_HIGH_MASK_REG	/;"	d
TRFC_HIGH_VALUE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TRFC_HIGH_VALUE_REG	/;"	d
TRFC_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TRFC_MASK_REG	/;"	d
TRG	arch/sh/include/asm/cpu_sh7722.h	/^#define TRG /;"	d
TRG_ARM_TIMER_REL_MASK	arch/arm/mach-orion5x/timer.c	/^#define TRG_ARM_TIMER_REL_MASK	/;"	d	file:
TRG_ARM_TIMER_REL_OFFS	arch/arm/mach-orion5x/timer.c	/^#define TRG_ARM_TIMER_REL_OFFS	/;"	d	file:
TRICORDER_BOARD_NAME_LENGTH	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_BOARD_NAME_LENGTH	/;"	d
TRICORDER_BOARD_SERIAL_LENGTH	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_BOARD_SERIAL_LENGTH	/;"	d
TRICORDER_BOARD_VERSION_LENGTH	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_BOARD_VERSION_LENGTH	/;"	d
TRICORDER_EEPROM_CRC_SIZE	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_EEPROM_CRC_SIZE	/;"	d
TRICORDER_EEPROM_H_	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_EEPROM_H_$/;"	d
TRICORDER_EEPROM_MAGIC	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_EEPROM_MAGIC /;"	d
TRICORDER_EEPROM_SIZE	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_EEPROM_SIZE	/;"	d
TRICORDER_EEPROM_VERSION	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_EEPROM_VERSION /;"	d
TRICORDER_INTERFACE_VERSION_LENGTH	board/corscience/tricorder/tricorder-eeprom.h	/^#define TRICORDER_INTERFACE_VERSION_LENGTH	/;"	d
TRICORDER_STATUS_LED_GREEN	board/corscience/tricorder/led.c	/^#define TRICORDER_STATUS_LED_GREEN /;"	d	file:
TRICORDER_STATUS_LED_YELLOW	board/corscience/tricorder/led.c	/^#define TRICORDER_STATUS_LED_YELLOW /;"	d	file:
TRIG	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TRIG	/;"	d
TRIGGER	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define TRIGGER(/;"	d
TRIGGER	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define TRIGGER(/;"	d
TRIGGER_EDGE	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_EDGE	include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_EDGE	/;"	d
TRIGGER_LEVEL	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIGGER_LEVEL	include/dt-bindings/gpio/x86-gpio.h	/^#define TRIGGER_LEVEL	/;"	d
TRIG_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TRIG_P	/;"	d
TRIMD	drivers/net/sh_eth.h	/^	TRIMD,$/;"	e	enum:__anon5ef54f5a0103
TRIMINFO_RELOAD	drivers/power/exynos-tmu.c	/^#define TRIMINFO_RELOAD	/;"	d	file:
TRIM_INFO_MASK	drivers/power/exynos-tmu.c	/^#define TRIM_INFO_MASK	/;"	d	file:
TRISTATE	tools/buildman/kconfiglib.py	/^UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6)$/;"	v
TRI_REG	arch/arm/mach-tegra/pinmux-common.c	/^#define TRI_REG(/;"	d	file:
TRI_SHIFT	arch/arm/mach-tegra/pinmux-common.c	/^#define TRI_SHIFT(/;"	d	file:
TRI_TO_INT	tools/buildman/kconfiglib.py	/^TRI_TO_INT = {"n": 0, "m": 1, "y": 2}$/;"	v
TRNCNT	drivers/usb/host/r8a66597.h	/^#define	TRNCNT	/;"	d
TRNENSEL	drivers/usb/host/r8a66597.h	/^#define	TRNENSEL	/;"	d
TROCR	drivers/net/sh_eth.h	/^	TROCR,$/;"	e	enum:__anon5ef54f5a0103
TROP_US_DELAY	drivers/mtd/nand/mxc_nand.c	/^#define TROP_US_DELAY /;"	d	file:
TRP_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_1	/;"	d
TRP_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_2	/;"	d
TRP_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_3	/;"	d
TRP_4	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_4	/;"	d
TRP_5	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_5	/;"	d
TRP_6	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_6	/;"	d
TRP_7	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TRP_7	/;"	d
TRSCER	drivers/net/sh_eth.h	/^	TRSCER,$/;"	e	enum:__anon5ef54f5a0103
TRSR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define TRSR	/;"	d
TRST	include/lattice.h	/^#define TRST	/;"	d
TRSTN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define TRSTN	/;"	d
TRTAG_CFI	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_CFI	/;"	d
TRTAG_PRIO_MASK	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_PRIO_MASK	/;"	d
TRTAG_PRIO_POS	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_PRIO_POS	/;"	d
TRTAG_TPID_MASK	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_TPID_MASK	/;"	d
TRTAG_TPID_POS	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_TPID_POS	/;"	d
TRTAG_VID_MASK	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_VID_MASK	/;"	d
TRTAG_VID_POS	drivers/net/xilinx_ll_temac.h	/^#define TRTAG_VID_POS	/;"	d
TRUN0	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN0	/;"	d
TRUN1	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN1	/;"	d
TRUN2	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN2	/;"	d
TRUN3	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN3	/;"	d
TRUN4	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN4	/;"	d
TRUN5	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN5	/;"	d
TRUN6	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN6	/;"	d
TRUN7	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define TRUN7	/;"	d
TRY_FREE	lib/zlib/zutil.h	/^#define TRY_FREE(/;"	d
TRY_GET_FIFO_TIMEOUT	drivers/video/exynos/exynos_mipi_dsi_common.c	/^#define TRY_GET_FIFO_TIMEOUT	/;"	d	file:
TS4800_GPIO_FEC_PHY_RES	board/technologic/ts4800/ts4800.c	/^#define TS4800_GPIO_FEC_PHY_RES /;"	d	file:
TS4800_SYSCON_BASE	board/technologic/ts4800/ts4800.h	/^#define TS4800_SYSCON_BASE /;"	d
TSBUFCLRR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSBUFCLRR /;"	d
TSCALE	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define TSCALE /;"	d
TSCMDR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSCMDR /;"	d
TSCTLR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSCTLR /;"	d
TSC_CNTCR_ENABLE	arch/arm/include/asm/arch-tegra114/sysctr.h	/^#define TSC_CNTCR_ENABLE	/;"	d
TSC_CNTCR_ENABLE	arch/arm/include/asm/arch-tegra124/sysctr.h	/^#define TSC_CNTCR_ENABLE	/;"	d
TSC_CNTCR_ENABLE	arch/arm/include/asm/arch-tegra210/sysctr.h	/^#define TSC_CNTCR_ENABLE	/;"	d
TSC_CNTCR_HDBG	arch/arm/include/asm/arch-tegra114/sysctr.h	/^#define TSC_CNTCR_HDBG	/;"	d
TSC_CNTCR_HDBG	arch/arm/include/asm/arch-tegra124/sysctr.h	/^#define TSC_CNTCR_HDBG	/;"	d
TSC_CNTCR_HDBG	arch/arm/include/asm/arch-tegra210/sysctr.h	/^#define TSC_CNTCR_HDBG	/;"	d
TSC_NAK	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	TSC_NAK	/;"	d
TSDPCRADCR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSDPCRADCR /;"	d
TSEC1_FLAGS	include/configs/BSC9131RDB.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/BSC9132QDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/C29XPCIE.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8308RDB.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8313ERDB.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8315ERDB.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8349EMDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8349ITX.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC837XEMDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC837XERDB.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8536DS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8540ADS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8541CDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8544DS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8548CDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8555CDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8560ADS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8568MDS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8572DS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/MPC8641HPCN.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/P1010RDB.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/P1022DS.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/TQM834x.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/UCP1020.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/controlcenterd.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/hrcon.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/ids8313.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/ls1021aqds.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/ls1021atwr.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/mpc8308_p1m.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/p1_p2_rdb_pc.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/p1_twr.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/sbc8349.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/sbc8548.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/sbc8641d.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/socrates.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/strider.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/ve8313.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/vme8349.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/xpedite517x.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/xpedite520x.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/xpedite537x.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_FLAGS	include/configs/xpedite550x.h	/^#define TSEC1_FLAGS	/;"	d
TSEC1_PHYIDX	include/configs/BSC9131RDB.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/BSC9132QDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8308RDB.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8313ERDB.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8315ERDB.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8349EMDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8349ITX.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC837XEMDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC837XERDB.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8536DS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8540ADS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8541CDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8544DS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8548CDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8555CDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8560ADS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8568MDS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8572DS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/MPC8641HPCN.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/P1010RDB.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/P1022DS.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/TQM834x.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/UCP1020.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/controlcenterd.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/hrcon.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/ids8313.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/ls1021aqds.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/ls1021atwr.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/mpc8308_p1m.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/p1_p2_rdb_pc.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/p1_twr.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/sbc8349.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/sbc8548.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/sbc8641d.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/socrates.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/strider.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/ve8313.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/vme8349.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/xpedite517x.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/xpedite520x.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/xpedite537x.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHYIDX	include/configs/xpedite550x.h	/^#define TSEC1_PHYIDX	/;"	d
TSEC1_PHY_ADDR	include/configs/BSC9131RDB.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/BSC9132QDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/C29XPCIE.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8308RDB.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8313ERDB.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8315ERDB.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8349EMDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8349ITX.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC837XEMDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC837XERDB.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8536DS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8540ADS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8541CDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8544DS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8548CDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8555CDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8560ADS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8568MDS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8572DS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/MPC8641HPCN.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/P1010RDB.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/P1022DS.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/TQM834x.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/UCP1020.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/controlcenterd.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/hrcon.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/ids8313.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/ls1021aqds.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/ls1021atwr.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/mpc8308_p1m.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/p1_twr.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/sbc8349.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/sbc8548.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/sbc8641d.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/socrates.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/strider.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/ve8313.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/vme8349.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/xpedite517x.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/xpedite520x.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/xpedite537x.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR	include/configs/xpedite550x.h	/^#define TSEC1_PHY_ADDR	/;"	d
TSEC1_PHY_ADDR_SGMII	include/configs/MPC837XEMDS.h	/^#define TSEC1_PHY_ADDR_SGMII	/;"	d
TSEC2_FLAGS	include/configs/BSC9131RDB.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/BSC9132QDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/C29XPCIE.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8308RDB.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8313ERDB.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8315ERDB.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8349EMDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8349ITX.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC837XEMDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC837XERDB.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8540ADS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8541CDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8548CDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8555CDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8560ADS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8568MDS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8572DS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/MPC8641HPCN.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/P1010RDB.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/P1022DS.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/TQM834x.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/UCP1020.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/controlcenterd.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/ids8313.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/ls1021aqds.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/ls1021atwr.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/mpc8308_p1m.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/p1_p2_rdb_pc.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/p1_twr.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/sbc8349.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/sbc8548.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/sbc8641d.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/vme8349.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/xpedite517x.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/xpedite520x.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/xpedite537x.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_FLAGS	include/configs/xpedite550x.h	/^#define TSEC2_FLAGS	/;"	d
TSEC2_PHYIDX	include/configs/BSC9131RDB.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/BSC9132QDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8308RDB.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8313ERDB.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8315ERDB.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8349EMDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8349ITX.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC837XEMDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC837XERDB.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8540ADS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8541CDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8548CDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8555CDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8560ADS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8568MDS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8572DS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/MPC8641HPCN.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/P1010RDB.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/P1022DS.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/TQM834x.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/UCP1020.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/controlcenterd.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/ids8313.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/ls1021aqds.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/ls1021atwr.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/mpc8308_p1m.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/p1_p2_rdb_pc.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/p1_twr.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/sbc8349.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/sbc8548.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/sbc8641d.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/vme8349.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/xpedite517x.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/xpedite520x.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/xpedite537x.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHYIDX	include/configs/xpedite550x.h	/^#define TSEC2_PHYIDX	/;"	d
TSEC2_PHY_ADDR	include/configs/BSC9131RDB.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/BSC9132QDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/C29XPCIE.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8308RDB.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8313ERDB.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8315ERDB.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8349EMDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8349ITX.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC837XEMDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC837XERDB.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8540ADS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8541CDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8548CDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8555CDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8560ADS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8568MDS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8572DS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/MPC8641HPCN.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/P1010RDB.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/P1022DS.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/TQM834x.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/UCP1020.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/controlcenterd.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/ids8313.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/ls1021aqds.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/ls1021atwr.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/mpc8308_p1m.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/p1_twr.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/sbc8349.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/sbc8548.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/sbc8641d.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/vme8349.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/xpedite517x.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/xpedite520x.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/xpedite537x.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR	include/configs/xpedite550x.h	/^#define TSEC2_PHY_ADDR	/;"	d
TSEC2_PHY_ADDR_SGMII	include/configs/MPC837XEMDS.h	/^#define TSEC2_PHY_ADDR_SGMII	/;"	d
TSEC2_PHY_ADDR_SGMII	include/configs/UCP1020.h	/^#define TSEC2_PHY_ADDR_SGMII	/;"	d
TSEC3_FLAGS	include/configs/MPC8536DS.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/MPC8544DS.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/MPC8548CDS.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/MPC8572DS.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/MPC8641HPCN.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/P1010RDB.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/UCP1020.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/ls1021aqds.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/ls1021atwr.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/p1_p2_rdb_pc.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/p1_twr.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/sbc8641d.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/socrates.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/xpedite520x.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_FLAGS	include/configs/xpedite550x.h	/^#define TSEC3_FLAGS	/;"	d
TSEC3_PHYIDX	include/configs/MPC8536DS.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/MPC8544DS.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/MPC8548CDS.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/MPC8572DS.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/MPC8641HPCN.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/P1010RDB.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/UCP1020.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/ls1021aqds.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/ls1021atwr.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/p1_p2_rdb_pc.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/p1_twr.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/sbc8641d.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/socrates.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/xpedite520x.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHYIDX	include/configs/xpedite550x.h	/^#define TSEC3_PHYIDX	/;"	d
TSEC3_PHY_ADDR	include/configs/MPC8536DS.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/MPC8544DS.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/MPC8548CDS.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/MPC8572DS.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/MPC8641HPCN.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/P1010RDB.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/UCP1020.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/ls1021aqds.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/ls1021atwr.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/p1_p2_rdb_pc.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/p1_twr.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/sbc8641d.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/socrates.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/xpedite520x.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC3_PHY_ADDR	include/configs/xpedite550x.h	/^#define TSEC3_PHY_ADDR	/;"	d
TSEC4_FLAGS	include/configs/MPC8548CDS.h	/^#define TSEC4_FLAGS	/;"	d
TSEC4_FLAGS	include/configs/MPC8572DS.h	/^#define TSEC4_FLAGS	/;"	d
TSEC4_FLAGS	include/configs/MPC8641HPCN.h	/^#define TSEC4_FLAGS	/;"	d
TSEC4_FLAGS	include/configs/sbc8641d.h	/^#define TSEC4_FLAGS	/;"	d
TSEC4_FLAGS	include/configs/xpedite520x.h	/^#define TSEC4_FLAGS	/;"	d
TSEC4_PHYIDX	include/configs/MPC8548CDS.h	/^#define TSEC4_PHYIDX	/;"	d
TSEC4_PHYIDX	include/configs/MPC8572DS.h	/^#define TSEC4_PHYIDX	/;"	d
TSEC4_PHYIDX	include/configs/MPC8641HPCN.h	/^#define TSEC4_PHYIDX	/;"	d
TSEC4_PHYIDX	include/configs/sbc8641d.h	/^#define TSEC4_PHYIDX	/;"	d
TSEC4_PHYIDX	include/configs/xpedite520x.h	/^#define TSEC4_PHYIDX	/;"	d
TSEC4_PHY_ADDR	include/configs/MPC8548CDS.h	/^#define TSEC4_PHY_ADDR	/;"	d
TSEC4_PHY_ADDR	include/configs/MPC8572DS.h	/^#define TSEC4_PHY_ADDR	/;"	d
TSEC4_PHY_ADDR	include/configs/MPC8641HPCN.h	/^#define TSEC4_PHY_ADDR	/;"	d
TSEC4_PHY_ADDR	include/configs/sbc8641d.h	/^#define TSEC4_PHY_ADDR	/;"	d
TSEC4_PHY_ADDR	include/configs/xpedite520x.h	/^#define TSEC4_PHY_ADDR	/;"	d
TSEC_1588_CLKIN_MASK	board/freescale/bsc9132qds/bsc9132qds.c	/^#define TSEC_1588_CLKIN_MASK	/;"	d	file:
TSEC_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define TSEC_BASE_ADDR	/;"	d
TSEC_BASE_ADDR	arch/powerpc/include/asm/immap_83xx.h	/^#define TSEC_BASE_ADDR	/;"	d
TSEC_BASE_ADDR	arch/powerpc/include/asm/immap_85xx.h	/^#define TSEC_BASE_ADDR	/;"	d
TSEC_BASE_ADDR	arch/powerpc/include/asm/immap_86xx.h	/^#define TSEC_BASE_ADDR	/;"	d
TSEC_GET_MDIO_REGS	include/tsec.h	/^#define TSEC_GET_MDIO_REGS(/;"	d
TSEC_GET_MDIO_REGS_BASE	include/tsec.h	/^#define TSEC_GET_MDIO_REGS_BASE(/;"	d
TSEC_GET_REGS	include/tsec.h	/^#define TSEC_GET_REGS(/;"	d
TSEC_GET_REGS_BASE	include/tsec.h	/^#define TSEC_GET_REGS_BASE(/;"	d
TSEC_GIGABIT	include/tsec.h	/^#define TSEC_GIGABIT	/;"	d
TSEC_MDIO_OFFSET	include/tsec.h	/^#define TSEC_MDIO_OFFSET	/;"	d
TSEC_REDUCED	include/tsec.h	/^#define TSEC_REDUCED	/;"	d
TSEC_SGMII	include/tsec.h	/^#define TSEC_SGMII	/;"	d
TSEC_SIZE	include/tsec.h	/^#define TSEC_SIZE	/;"	d
TSEC_SIZE	include/tsec.h	/^#define TSEC_SIZE /;"	d
TSEC_TIMEOUT	include/tsec.h	/^#define TSEC_TIMEOUT	/;"	d
TSEG	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define TSEG	/;"	d
TSEN_CONF_REG	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_CONF_REG	/;"	d	file:
TSEN_CONF_RST_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_CONF_RST_MASK	/;"	d	file:
TSEN_CONF_RST_OFFSET	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_CONF_RST_OFFSET	/;"	d	file:
TSEN_STATE_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATE_MASK	/;"	d	file:
TSEN_STATE_OFFSET	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATE_OFFSET	/;"	d	file:
TSEN_STATE_REG	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATE_REG	/;"	d	file:
TSEN_STATUS_READOUT_VALID_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATUS_READOUT_VALID_MASK	/;"	d	file:
TSEN_STATUS_READOUT_VALID_OFFSET	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATUS_READOUT_VALID_OFFSET	/;"	d	file:
TSEN_STATUS_REG	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATUS_REG	/;"	d	file:
TSEN_STATUS_TEMP_OUT_MASK	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATUS_TEMP_OUT_MASK	/;"	d	file:
TSEN_STATUS_TEMP_OUT_OFFSET	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^#define TSEN_STATUS_TEMP_OUT_OFFSET	/;"	d	file:
TSFRCR	drivers/net/sh_eth.h	/^	TSFRCR,$/;"	e	enum:__anon5ef54f5a0103
TSI108_CLK_REG_OFFSET	include/tsi108.h	/^#define TSI108_CLK_REG_OFFSET	/;"	d
TSI108_ETH_DEBUG	drivers/net/tsi108_eth.c	/^#define TSI108_ETH_DEBUG /;"	d	file:
TSI108_HLP_REG_OFFSET	include/tsi108.h	/^#define TSI108_HLP_REG_OFFSET	/;"	d
TSI108_I2C_IF_BUSY	include/tsi108.h	/^#define TSI108_I2C_IF_BUSY	/;"	d
TSI108_I2C_IF_ERROR	include/tsi108.h	/^#define TSI108_I2C_IF_ERROR	/;"	d
TSI108_I2C_OFFSET	include/tsi108.h	/^#define TSI108_I2C_OFFSET	/;"	d
TSI108_I2C_PARAM_ERR	include/tsi108.h	/^#define TSI108_I2C_PARAM_ERR	/;"	d
TSI108_I2C_SDRAM_OFFSET	include/tsi108.h	/^#define TSI108_I2C_SDRAM_OFFSET	/;"	d
TSI108_I2C_SUCCESS	include/tsi108.h	/^#define TSI108_I2C_SUCCESS	/;"	d
TSI108_I2C_TIMEOUT_ERR	include/tsi108.h	/^#define TSI108_I2C_TIMEOUT_ERR	/;"	d
TSI108_MPIC_REG_OFFSET	include/tsi108.h	/^#define TSI108_MPIC_REG_OFFSET	/;"	d
TSI108_PB_REG_OFFSET	include/tsi108.h	/^#define TSI108_PB_REG_OFFSET	/;"	d
TSI108_PCI_REG_OFFSET	include/tsi108.h	/^#define TSI108_PCI_REG_OFFSET	/;"	d
TSI108_SD_REG_OFFSET	include/tsi108.h	/^#define TSI108_SD_REG_OFFSET	/;"	d
TSI148	include/tsi148.h	/^typedef struct _TSI148 TSI148;$/;"	t	typeref:struct:_TSI148
TSI148_DEV	cmd/tsi148.c	/^typedef struct _TSI148_DEV TSI148_DEV;$/;"	t	typeref:struct:_TSI148_DEV	file:
TSIF0_TS_XX1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF0_TS_XX1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF0_TS_XX2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF0_TS_XX2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF0_TS_XX3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF0_TS_XX3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF0_TS_XX4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF0_TS_XX4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF0_TS_XX5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF0_TS_XX5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF1_TS_XX1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF1_TS_XX1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF1_TS_XX2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF1_TS_XX2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF1_TS_XX3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF1_TS_XX3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF1_TS_XX4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF1_TS_XX4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF1_TS_XX5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF1_TS_XX5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF2_TS_XX1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF2_TS_XX1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF2_TS_XX2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF2_TS_XX2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF2_TS_XX3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF2_TS_XX3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF2_TS_XX4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF2_TS_XX4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSIF2_TS_XX5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TSIF2_TS_XX5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TSINTER	arch/sh/include/asm/cpu_sh7722.h	/^#define TSINTER /;"	d
TSIZE_TO_BYTES	arch/powerpc/include/asm/mmu.h	/^#define TSIZE_TO_BYTES(/;"	d
TSPCRADCMDR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSPCRADCMDR /;"	d
TSPCRADCR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSPCRADCR /;"	d
TSPIDR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSPIDR /;"	d
TSPSCALER	arch/sh/include/asm/cpu_sh7722.h	/^#define TSPSCALER /;"	d
TSPSCALERR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSPSCALERR /;"	d
TSR	arch/powerpc/include/asm/processor.h	/^#define TSR	/;"	d
TSR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSR /;"	d
TSRF	include/linux/mtd/samsung_onenand.h	/^#define TSRF	/;"	d
TSR_COL	drivers/net/dm9000x.h	/^#define TSR_COL	/;"	d
TSR_EC	drivers/net/dm9000x.h	/^#define TSR_EC	/;"	d
TSR_ENW	arch/powerpc/include/asm/processor.h	/^#define   TSR_ENW	/;"	d
TSR_FIS	arch/powerpc/include/asm/processor.h	/^#define   TSR_FIS	/;"	d
TSR_LC	drivers/net/dm9000x.h	/^#define TSR_LC	/;"	d
TSR_LCOL	drivers/net/dm9000x.h	/^#define TSR_LCOL	/;"	d
TSR_NC	drivers/net/dm9000x.h	/^#define TSR_NC	/;"	d
TSR_PIS	arch/powerpc/include/asm/processor.h	/^#define   TSR_PIS	/;"	d
TSR_TJTO	drivers/net/dm9000x.h	/^#define TSR_TJTO	/;"	d
TSR_WIS	arch/powerpc/include/asm/processor.h	/^#define   TSR_WIS	/;"	d
TSR_WRS	arch/powerpc/include/asm/processor.h	/^#define   TSR_WRS(/;"	d
TSS	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                       TSS /;"	d
TSS	include/ppc_defs.h	/^#define	TSS	/;"	d
TSSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSSTR /;"	d
TSS_FPR0	include/ppc_defs.h	/^#define	TSS_FPR0	/;"	d
TSS_FPSCR	include/ppc_defs.h	/^#define	TSS_FPSCR	/;"	d
TSS_SMP_FORK_RET	include/ppc_defs.h	/^#define	TSS_SMP_FORK_RET	/;"	d
TSTAT1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TSTAT1 /;"	d
TSTAT2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TSTAT2 /;"	d
TSTAT_CAPT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TSTAT_CAPT /;"	d
TSTAT_CAPT	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TSTAT_CAPT	/;"	d
TSTAT_CLEAR_THALT	include/tsec.h	/^#define TSTAT_CLEAR_THALT	/;"	d
TSTAT_COMP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define TSTAT_COMP /;"	d
TSTAT_COMP	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define TSTAT_COMP	/;"	d
TSTDAT	drivers/net/natsemi.c	/^	TSTDAT		= 0xFC,$/;"	e	enum:register_offsets	file:
TSTR0	board/renesas/rcar-common/common.c	/^#define TSTR0	/;"	d	file:
TSTR0_STR0	board/renesas/rcar-common/common.c	/^#define TSTR0_STR0	/;"	d	file:
TSTRPCRADCR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSTRPCRADCR /;"	d
TSTSDR	arch/sh/include/asm/cpu_sh7722.h	/^#define TSTSDR /;"	d
TST_DEVICE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define TST_DEVICE	/;"	d
TST_DEVICE	arch/arm/include/asm/omap_common.h	/^#define TST_DEVICE /;"	d
TS_16COL	drivers/net/smc91111.h	/^#define TS_16COL /;"	d
TS_ACPI_WAKE_JUMP	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_ACPI_WAKE_JUMP = 98,$/;"	e	enum:timestamp_id
TS_AFTER_INITRAM	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_AFTER_INITRAM = 3,$/;"	e	enum:timestamp_id
TS_BEFORE_INITRAM	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_BEFORE_INITRAM = 2,$/;"	e	enum:timestamp_id
TS_CBMEM_POST	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_CBMEM_POST = 75,$/;"	e	enum:timestamp_id
TS_CFG1	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_CFG1	/;"	d
TS_CFG2	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_CFG2	/;"	d
TS_CFG3	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_CFG3	/;"	d
TS_CFG4	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_CFG4	/;"	d
TS_DEVICE_CONFIGURE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_DEVICE_CONFIGURE = 40,$/;"	e	enum:timestamp_id
TS_DEVICE_DONE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_DEVICE_DONE = 70,$/;"	e	enum:timestamp_id
TS_DEVICE_ENABLE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_DEVICE_ENABLE = 50,$/;"	e	enum:timestamp_id
TS_DEVICE_ENUMERATE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_DEVICE_ENUMERATE = 30,$/;"	e	enum:timestamp_id
TS_DEVICE_INITIALIZE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_DEVICE_INITIALIZE = 60,$/;"	e	enum:timestamp_id
TS_END_COPYRAM	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_END_COPYRAM = 9,$/;"	e	enum:timestamp_id
TS_END_ROMSTAGE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_END_ROMSTAGE = 4,$/;"	e	enum:timestamp_id
TS_LATCOL	drivers/net/smc91111.h	/^#define TS_LATCOL /;"	d
TS_LOAD_PAYLOAD	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_LOAD_PAYLOAD = 90,$/;"	e	enum:timestamp_id
TS_LOSTCAR	drivers/net/smc91111.h	/^#define TS_LOSTCAR /;"	d
TS_MODE	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_MODE	/;"	d
TS_SCK0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TS_SCK0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TS_SCK0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SCK1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SCK1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SCK1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SCK2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_3_MARK, TS_SCK2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SCK3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	DINT__MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SCK4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_3_MARK, TS_SCK4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SCK5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_7_MARK, TS_SCK5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SCK_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	TS_SCK_D_MARK, BPFCLK_C_MARK, MSIOF0_RXD_MARK, SCIF5_RXD_MARK,$/;"	e	enum:__anona307901d0103	file:
TS_SDAT0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDAT1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDAT1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDAT1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDAT2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_1_MARK, TS_SDAT2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDAT3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDAT4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_1_MARK, TS_SDAT4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDAT5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_5_MARK, TS_SDAT5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDATA0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TS_SDATA0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TS_SDATA_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	DU1_DR0_MARK, RIF1_SYNC_B_MARK, TS_SDATA_D_MARK, TPUTO1_B_MARK,$/;"	e	enum:__anona307901d0103	file:
TS_SDEN0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TS_SDEN0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TS_SDEN0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDEN1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SDEN1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SDEN1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDEN2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_2_MARK, TS_SDEN2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDEN3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDEN4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_2_MARK, TS_SDEN4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDEN5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_6_MARK, TS_SDEN5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SDEN_D_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	I2C2_SCL_C_MARK, DU1_DR2_MARK, RIF1_D0_B_MARK, TS_SDEN_D_MARK,$/;"	e	enum:__anona307901d0103	file:
TS_SDT1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SDT1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SD_CTRL_ENABLE	include/tsi108.h	/^#define TS_SD_CTRL_ENABLE	/;"	d
TS_SELFBOOT_JUMP	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_SELFBOOT_JUMP = 99,$/;"	e	enum:timestamp_id
TS_SPSYNC0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TS_SPSYNC0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TS_SPSYNC0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC0_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC0_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC0_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC0_E_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC1_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TS_SPSYNC1_D_MARK,$/;"	e	enum:__anona307945e0103	file:
TS_SPSYNC1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
TS_SPSYNC1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SPSYNC2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID1_0_MARK, TS_SPSYNC2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SPSYNC3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SPSYNC4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SDHID2_0_MARK, TS_SPSYNC4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_SPSYNC5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MMCD0_4_MARK, TS_SPSYNC5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
TS_START_COPYRAM	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_START_COPYRAM = 8,$/;"	e	enum:timestamp_id
TS_START_RAMSTAGE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_START_RAMSTAGE = 10,$/;"	e	enum:timestamp_id
TS_START_ROMSTAGE	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_START_ROMSTAGE = 1,$/;"	e	enum:timestamp_id
TS_SUCCESS	drivers/net/smc91111.h	/^#define TS_SUCCESS /;"	d
TS_TEMP	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_TEMP	/;"	d
TS_TRIP	arch/x86/include/asm/arch-quark/quark.h	/^#define TS_TRIP	/;"	d
TS_U_BOOT_INITTED	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_U_BOOT_INITTED = 1000, \/* This is where u-boot starts *\/$/;"	e	enum:timestamp_id
TS_U_BOOT_START_KERNEL	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_U_BOOT_START_KERNEL = 1100, \/* Right before jumping to kernel. *\/$/;"	e	enum:timestamp_id
TS_WRITE_TABLES	arch/x86/include/asm/arch-coreboot/timestamp.h	/^	TS_WRITE_TABLES = 80,$/;"	e	enum:timestamp_id
TTABLE	arch/mips/include/asm/asm.h	/^#define TTABLE(/;"	d
TTB	arch/sh/include/asm/cpu_sh7720.h	/^#define TTB	/;"	d
TTB	arch/sh/include/asm/cpu_sh7722.h	/^#define TTB	/;"	d
TTB	arch/sh/include/asm/cpu_sh7723.h	/^#define TTB	/;"	d
TTB	arch/sh/include/asm/cpu_sh7724.h	/^#define TTB	/;"	d
TTB	arch/sh/include/asm/cpu_sh7750.h	/^#define TTB	/;"	d
TTB	arch/sh/include/asm/cpu_sh7780.h	/^#define	TTB	/;"	d
TTBCR	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR	/;"	d	file:
TTBCR_EAE	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_EAE	/;"	d	file:
TTBCR_EAE	arch/arm/include/asm/system.h	/^#define TTBCR_EAE	/;"	d
TTBCR_EPD0	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_EPD0	/;"	d	file:
TTBCR_EPD0	arch/arm/include/asm/system.h	/^#define TTBCR_EPD0	/;"	d
TTBCR_IRGN0_MASK	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_IRGN0_MASK	/;"	d	file:
TTBCR_IRGN0_MASK	arch/arm/include/asm/system.h	/^#define TTBCR_IRGN0_MASK	/;"	d
TTBCR_IRGN0_NC	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_IRGN0_NC	/;"	d	file:
TTBCR_IRGN0_NC	arch/arm/include/asm/system.h	/^#define TTBCR_IRGN0_NC	/;"	d
TTBCR_IRGN0_WBNWA	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_IRGN0_WBNWA	/;"	d	file:
TTBCR_IRGN0_WBNWA	arch/arm/include/asm/system.h	/^#define TTBCR_IRGN0_WBNWA	/;"	d
TTBCR_IRGN0_WBWA	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_IRGN0_WBWA	/;"	d	file:
TTBCR_IRGN0_WBWA	arch/arm/include/asm/system.h	/^#define TTBCR_IRGN0_WBWA	/;"	d
TTBCR_IRGN0_WT	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_IRGN0_WT	/;"	d	file:
TTBCR_IRGN0_WT	arch/arm/include/asm/system.h	/^#define TTBCR_IRGN0_WT	/;"	d
TTBCR_ORGN0_MASK	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_ORGN0_MASK	/;"	d	file:
TTBCR_ORGN0_MASK	arch/arm/include/asm/system.h	/^#define TTBCR_ORGN0_MASK	/;"	d
TTBCR_ORGN0_NC	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_ORGN0_NC	/;"	d	file:
TTBCR_ORGN0_NC	arch/arm/include/asm/system.h	/^#define TTBCR_ORGN0_NC	/;"	d
TTBCR_ORGN0_WBNWA	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_ORGN0_WBNWA	/;"	d	file:
TTBCR_ORGN0_WBNWA	arch/arm/include/asm/system.h	/^#define TTBCR_ORGN0_WBNWA	/;"	d
TTBCR_ORGN0_WBWA	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_ORGN0_WBWA	/;"	d	file:
TTBCR_ORGN0_WBWA	arch/arm/include/asm/system.h	/^#define TTBCR_ORGN0_WBWA	/;"	d
TTBCR_ORGN0_WT	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_ORGN0_WT	/;"	d	file:
TTBCR_ORGN0_WT	arch/arm/include/asm/system.h	/^#define TTBCR_ORGN0_WT	/;"	d
TTBCR_SHARED_INNER	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_SHARED_INNER	/;"	d	file:
TTBCR_SHARED_INNER	arch/arm/include/asm/system.h	/^#define TTBCR_SHARED_INNER	/;"	d
TTBCR_SHARED_NON	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_SHARED_NON	/;"	d	file:
TTBCR_SHARED_NON	arch/arm/include/asm/system.h	/^#define TTBCR_SHARED_NON	/;"	d
TTBCR_SHARED_OUTER	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_SHARED_OUTER	/;"	d	file:
TTBCR_SHARED_OUTER	arch/arm/include/asm/system.h	/^#define TTBCR_SHARED_OUTER	/;"	d
TTBCR_T0SZ	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_T0SZ(/;"	d	file:
TTBCR_T0SZ	arch/arm/include/asm/system.h	/^#define TTBCR_T0SZ(/;"	d
TTBCR_T1SZ	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_T1SZ(/;"	d	file:
TTBCR_T1SZ	arch/arm/include/asm/system.h	/^#define TTBCR_T1SZ(/;"	d
TTBCR_USING_TTBR0	arch/arm/cpu/armv7/ls102xa/cpu.c	/^#define TTBCR_USING_TTBR0	/;"	d	file:
TTBCR_USING_TTBR0	arch/arm/include/asm/system.h	/^#define TTBCR_USING_TTBR0	/;"	d
TTBR0_BASE_ADDR_MASK	arch/arm/include/asm/system.h	/^#define TTBR0_BASE_ADDR_MASK	/;"	d
TTBR0_IRGN_NC	arch/arm/include/asm/system.h	/^#define TTBR0_IRGN_NC	/;"	d
TTBR0_IRGN_WB	arch/arm/include/asm/system.h	/^#define TTBR0_IRGN_WB	/;"	d
TTBR0_IRGN_WBWA	arch/arm/include/asm/system.h	/^#define TTBR0_IRGN_WBWA	/;"	d
TTBR0_IRGN_WT	arch/arm/include/asm/system.h	/^#define TTBR0_IRGN_WT	/;"	d
TTBR0_RGN_NC	arch/arm/include/asm/system.h	/^#define TTBR0_RGN_NC	/;"	d
TTBR0_RGN_WB	arch/arm/include/asm/system.h	/^#define TTBR0_RGN_WB	/;"	d
TTBR0_RGN_WBWA	arch/arm/include/asm/system.h	/^#define TTBR0_RGN_WBWA	/;"	d
TTBR0_RGN_WT	arch/arm/include/asm/system.h	/^#define TTBR0_RGN_WT	/;"	d
TTB_PAGETABLE	arch/arm/include/asm/system.h	/^#define TTB_PAGETABLE	/;"	d
TTB_SECT	arch/arm/include/asm/system.h	/^#define TTB_SECT	/;"	d
TTB_SECT_AF	arch/arm/include/asm/system.h	/^#define TTB_SECT_AF	/;"	d
TTB_SECT_AP	arch/arm/include/asm/system.h	/^#define TTB_SECT_AP	/;"	d
TTB_SECT_B_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_B_MASK	/;"	d
TTB_SECT_C_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_C_MASK	/;"	d
TTB_SECT_DOMAIN	arch/arm/include/asm/system.h	/^#define TTB_SECT_DOMAIN(/;"	d
TTB_SECT_MAIR	arch/arm/include/asm/system.h	/^#define TTB_SECT_MAIR(/;"	d
TTB_SECT_NG_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_NG_MASK	/;"	d
TTB_SECT_NS_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_NS_MASK	/;"	d
TTB_SECT_SH_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_SH_MASK	/;"	d
TTB_SECT_S_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_S_MASK	/;"	d
TTB_SECT_TEX	arch/arm/include/asm/system.h	/^#define TTB_SECT_TEX(/;"	d
TTB_SECT_XN_MASK	arch/arm/include/asm/system.h	/^#define TTB_SECT_XN_MASK	/;"	d
TTC_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define TTC_FREQ /;"	d
TTC_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define TTC_FREQ /;"	d
TTC_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define TTC_FREQ /;"	d
TTC_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define TTC_FREQ /;"	d
TTC_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define TTC_FREQ /;"	d
TTL	board/freescale/common/ics307_clk.c	/^#define TTL	/;"	d	file:
TTL_5V_TOLERANT	drivers/ddr/marvell/axp/ddr3_spd.c	/^	TTL_5V_TOLERANT,$/;"	e	enum:dimm_volt_if	file:
TTPM_CHECK	cmd/tpm_test.c	/^#define TTPM_CHECK(/;"	d	file:
TTYDBG	drivers/serial/usbtty.c	/^#define TTYDBG(/;"	d	file:
TTYERR	drivers/serial/usbtty.c	/^#define TTYERR(/;"	d	file:
TT_PORT	drivers/usb/host/xhci.h	/^#define TT_PORT	/;"	d
TT_SLOT	drivers/usb/host/xhci.h	/^#define TT_SLOT	/;"	d
TT_THINK_TIME	drivers/usb/host/xhci.h	/^#define TT_THINK_TIME(/;"	d
TUCR	include/SA-1100.h	/^#define TUCR	/;"	d
TUCR_32_768kHz	include/SA-1100.h	/^#define TUCR_32_768kHz	/;"	d
TUCR_3_6864MHz	include/SA-1100.h	/^#define TUCR_3_6864MHz	/;"	d
TUCR_3_6864MHzA	include/SA-1100.h	/^#define TUCR_3_6864MHzA	/;"	d
TUCR_96MHzPLL	include/SA-1100.h	/^#define TUCR_96MHzPLL	/;"	d
TUCR_CTB	include/SA-1100.h	/^#define TUCR_CTB	/;"	d
TUCR_Clock	include/SA-1100.h	/^#define TUCR_Clock	/;"	d
TUCR_DPS	include/SA-1100.h	/^#define TUCR_DPS	/;"	d
TUCR_FDC	include/SA-1100.h	/^#define TUCR_FDC	/;"	d
TUCR_FMC	include/SA-1100.h	/^#define TUCR_FMC	/;"	d
TUCR_MBGPIO	include/SA-1100.h	/^#define TUCR_MBGPIO	/;"	d
TUCR_MR	include/SA-1100.h	/^#define TUCR_MR	/;"	d
TUCR_MainPLL	include/SA-1100.h	/^#define TUCR_MainPLL	/;"	d
TUCR_NoMB	include/SA-1100.h	/^#define TUCR_NoMB	/;"	d
TUCR_PMD	include/SA-1100.h	/^#define TUCR_PMD	/;"	d
TUCR_RCRC	include/SA-1100.h	/^#define TUCR_RCRC	/;"	d
TUCR_TIC	include/SA-1100.h	/^#define TUCR_TIC	/;"	d
TUCR_TMC	include/SA-1100.h	/^#define TUCR_TMC	/;"	d
TUCR_TSEL	include/SA-1100.h	/^#define TUCR_TSEL	/;"	d
TUCR_TTST	include/SA-1100.h	/^#define TUCR_TTST	/;"	d
TUCR_VDD	include/SA-1100.h	/^#define TUCR_VDD	/;"	d
TUCR_VDDL	include/SA-1100.h	/^#define TUCR_VDDL	/;"	d
TUNE_TRAINING_PARAMS_CK_DELAY	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TUNE_TRAINING_PARAMS_CK_DELAY	/;"	d
TUNE_TRAINING_PARAMS_CK_DELAY_16	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TUNE_TRAINING_PARAMS_CK_DELAY_16	/;"	d
TUNE_TRAINING_PARAMS_NFINGER	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TUNE_TRAINING_PARAMS_NFINGER	/;"	d
TUNE_TRAINING_PARAMS_PFINGER	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TUNE_TRAINING_PARAMS_PFINGER	/;"	d
TUNE_TRAINING_PARAMS_PHYREG3VAL	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define TUNE_TRAINING_PARAMS_PHYREG3VAL	/;"	d
TURBO_DISABLED	arch/x86/include/asm/turbo.h	/^	TURBO_DISABLED,$/;"	e	enum:__anon6c0574ac0103
TURBO_ENABLED	arch/x86/include/asm/turbo.h	/^	TURBO_ENABLED,$/;"	e	enum:__anon6c0574ac0103
TURBO_MODE	drivers/usb/eth/smsc95xx.c	/^#define TURBO_MODE$/;"	d	file:
TURBO_UNAVAILABLE	arch/x86/include/asm/turbo.h	/^	TURBO_UNAVAILABLE,$/;"	e	enum:__anon6c0574ac0103
TURBO_UNKNOWN	arch/x86/include/asm/turbo.h	/^	TURBO_UNKNOWN,$/;"	e	enum:__anon6c0574ac0103
TUSB6010_OSCCLK_60	include/linux/usb/musb.h	/^#define	TUSB6010_OSCCLK_60	/;"	d
TUSB6010_REFCLK_19	include/linux/usb/musb.h	/^#define	TUSB6010_REFCLK_19	/;"	d
TUSB6010_REFCLK_24	include/linux/usb/musb.h	/^#define	TUSB6010_REFCLK_24	/;"	d
TVE_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define TVE_BASE_ADDR	/;"	d
TVIDEO_DIP_CTL	drivers/video/i915_reg.h	/^#define TVIDEO_DIP_CTL(/;"	d
TVIDEO_DIP_DATA	drivers/video/i915_reg.h	/^#define TVIDEO_DIP_DATA(/;"	d
TVIDEO_DIP_GCP	drivers/video/i915_reg.h	/^#define TVIDEO_DIP_GCP(/;"	d
TVO_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define	TVO_ENABLE	/;"	d
TVR_ARM_TIMER_MASK	arch/arm/mach-orion5x/timer.c	/^#define TVR_ARM_TIMER_MASK	/;"	d	file:
TVR_ARM_TIMER_MAX	arch/arm/mach-orion5x/timer.c	/^#define TVR_ARM_TIMER_MAX	/;"	d	file:
TVR_ARM_TIMER_OFFS	arch/arm/mach-orion5x/timer.c	/^#define TVR_ARM_TIMER_OFFS	/;"	d	file:
TV_DAC_CNTL	include/radeon.h	/^#define TV_DAC_CNTL	/;"	d
TV_DAC_CNTL_BDACPD	include/radeon.h	/^#define TV_DAC_CNTL_BDACPD	/;"	d
TV_DAC_CNTL_BGADJ_MASK	include/radeon.h	/^#define TV_DAC_CNTL_BGADJ_MASK	/;"	d
TV_DAC_CNTL_BGADJ__SHIFT	include/radeon.h	/^#define TV_DAC_CNTL_BGADJ__SHIFT	/;"	d
TV_DAC_CNTL_BGSLEEP	include/radeon.h	/^#define TV_DAC_CNTL_BGSLEEP	/;"	d
TV_DAC_CNTL_DACADJ_MASK	include/radeon.h	/^#define TV_DAC_CNTL_DACADJ_MASK	/;"	d
TV_DAC_CNTL_DACADJ__SHIFT	include/radeon.h	/^#define TV_DAC_CNTL_DACADJ__SHIFT	/;"	d
TV_DAC_CNTL_DETECT	include/radeon.h	/^#define TV_DAC_CNTL_DETECT	/;"	d
TV_DAC_CNTL_GDACPD	include/radeon.h	/^#define TV_DAC_CNTL_GDACPD	/;"	d
TV_DAC_CNTL_RDACPD	include/radeon.h	/^#define TV_DAC_CNTL_RDACPD	/;"	d
TV_HOTPLUG_INT_EN	drivers/video/i915_reg.h	/^#define   TV_HOTPLUG_INT_EN	/;"	d
TV_MASTER_CNTL	include/radeon.h	/^#define TV_MASTER_CNTL	/;"	d
TW2W_HIGH_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TW2W_HIGH_MASK_REG	/;"	d
TW2W_HIGH_VALUE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  TW2W_HIGH_VALUE_REG	/;"	d
TWAIT_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TWAIT_P	/;"	d
TWDR	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define TWDR	/;"	d
TWELVE_HOUR_MODE	drivers/rtc/rs5c372.c	/^#define TWELVE_HOUR_MODE(/;"	d	file:
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define TWI0_CLKDIV /;"	d
TWI0_CLKDIV	drivers/i2c/adi_i2c.c	/^#define TWI0_CLKDIV /;"	d	file:
TWI0_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_CONTROL /;"	d
TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_CONTROL /;"	d
TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_CONTROL /;"	d
TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_CONTROL /;"	d
TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_CONTROL /;"	d
TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_CONTROL /;"	d
TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_FIFO_CTL /;"	d
TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_FIFO_CTL /;"	d
TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_FIFO_CTL /;"	d
TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_FIFO_CTL /;"	d
TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_FIFO_CTL /;"	d
TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_FIFO_CTL /;"	d
TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_FIFO_STAT /;"	d
TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_FIFO_STAT /;"	d
TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_FIFO_STAT /;"	d
TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_FIFO_STAT /;"	d
TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_FIFO_STAT /;"	d
TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_FIFO_STAT /;"	d
TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_INT_MASK /;"	d
TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_INT_MASK /;"	d
TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_INT_MASK /;"	d
TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_INT_MASK /;"	d
TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_INT_MASK /;"	d
TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_INT_MASK /;"	d
TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_INT_STAT /;"	d
TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_INT_STAT /;"	d
TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_INT_STAT /;"	d
TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_INT_STAT /;"	d
TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_INT_STAT /;"	d
TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_INT_STAT /;"	d
TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_MASTER_ADDR /;"	d
TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_MASTER_ADDR /;"	d
TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_MASTER_ADDR /;"	d
TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_MASTER_ADDR /;"	d
TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_MASTER_ADDR /;"	d
TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_MASTER_ADDR /;"	d
TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_MASTER_CTL /;"	d
TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_MASTER_CTL /;"	d
TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_MASTER_CTL /;"	d
TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_MASTER_CTL /;"	d
TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_MASTER_CTL /;"	d
TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_MASTER_CTL /;"	d
TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_MASTER_STAT /;"	d
TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_MASTER_STAT /;"	d
TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_MASTER_STAT /;"	d
TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_MASTER_STAT /;"	d
TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_MASTER_STAT /;"	d
TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_MASTER_STAT /;"	d
TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_RCV_DATA16 /;"	d
TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_RCV_DATA16 /;"	d
TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_RCV_DATA16 /;"	d
TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_RCV_DATA16 /;"	d
TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_RCV_DATA16 /;"	d
TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_RCV_DATA16 /;"	d
TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_RCV_DATA8 /;"	d
TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_RCV_DATA8 /;"	d
TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_RCV_DATA8 /;"	d
TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_RCV_DATA8 /;"	d
TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_RCV_DATA8 /;"	d
TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_RCV_DATA8 /;"	d
TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_SLAVE_ADDR /;"	d
TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_SLAVE_ADDR /;"	d
TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_SLAVE_ADDR /;"	d
TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_SLAVE_ADDR /;"	d
TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_SLAVE_ADDR /;"	d
TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_SLAVE_ADDR /;"	d
TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_SLAVE_CTL /;"	d
TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_SLAVE_CTL /;"	d
TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_SLAVE_CTL /;"	d
TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_SLAVE_CTL /;"	d
TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_SLAVE_CTL /;"	d
TWI0_SLAVE_CTRL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_SLAVE_CTRL /;"	d
TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_SLAVE_STAT /;"	d
TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_SLAVE_STAT /;"	d
TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_SLAVE_STAT /;"	d
TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_SLAVE_STAT /;"	d
TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_SLAVE_STAT /;"	d
TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_SLAVE_STAT /;"	d
TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_XMT_DATA16 /;"	d
TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_XMT_DATA16 /;"	d
TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_XMT_DATA16 /;"	d
TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_XMT_DATA16 /;"	d
TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_XMT_DATA16 /;"	d
TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_XMT_DATA16 /;"	d
TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI0_XMT_DATA8 /;"	d
TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define TWI0_XMT_DATA8 /;"	d
TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI0_XMT_DATA8 /;"	d
TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI0_XMT_DATA8 /;"	d
TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI0_XMT_DATA8 /;"	d
TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI0_XMT_DATA8 /;"	d
TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_CLKDIV /;"	d
TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_CLKDIV /;"	d
TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_CLKDIV /;"	d
TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_CLKDIV /;"	d
TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_CLKDIV /;"	d
TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define TWI1_CLKDIV /;"	d
TWI1_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_CONTROL /;"	d
TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_CONTROL /;"	d
TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_CONTROL /;"	d
TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_CONTROL /;"	d
TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_CONTROL /;"	d
TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_FIFO_CTL /;"	d
TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_FIFO_CTL /;"	d
TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_FIFO_CTL /;"	d
TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_FIFO_CTL /;"	d
TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_FIFO_CTL /;"	d
TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_FIFO_STAT /;"	d
TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_FIFO_STAT /;"	d
TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_FIFO_STAT /;"	d
TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_FIFO_STAT /;"	d
TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_FIFO_STAT /;"	d
TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_INT_MASK /;"	d
TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_INT_MASK /;"	d
TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_INT_MASK /;"	d
TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_INT_MASK /;"	d
TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_INT_MASK /;"	d
TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_INT_STAT /;"	d
TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_INT_STAT /;"	d
TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_INT_STAT /;"	d
TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_INT_STAT /;"	d
TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_INT_STAT /;"	d
TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_MASTER_ADDR /;"	d
TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_MASTER_ADDR /;"	d
TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_MASTER_ADDR /;"	d
TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_MASTER_ADDR /;"	d
TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_MASTER_ADDR /;"	d
TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_MASTER_CTL /;"	d
TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_MASTER_CTL /;"	d
TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_MASTER_CTL /;"	d
TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_MASTER_CTL /;"	d
TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_MASTER_CTL /;"	d
TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_MASTER_STAT /;"	d
TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_MASTER_STAT /;"	d
TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_MASTER_STAT /;"	d
TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_MASTER_STAT /;"	d
TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_MASTER_STAT /;"	d
TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_RCV_DATA16 /;"	d
TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_RCV_DATA16 /;"	d
TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_RCV_DATA16 /;"	d
TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_RCV_DATA16 /;"	d
TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_RCV_DATA16 /;"	d
TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_RCV_DATA8 /;"	d
TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_RCV_DATA8 /;"	d
TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_RCV_DATA8 /;"	d
TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_RCV_DATA8 /;"	d
TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_RCV_DATA8 /;"	d
TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_SLAVE_ADDR /;"	d
TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_SLAVE_ADDR /;"	d
TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_SLAVE_ADDR /;"	d
TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_SLAVE_ADDR /;"	d
TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_SLAVE_ADDR /;"	d
TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_SLAVE_CTL /;"	d
TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_SLAVE_CTL /;"	d
TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_SLAVE_CTL /;"	d
TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_SLAVE_CTL /;"	d
TWI1_SLAVE_CTRL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_SLAVE_CTRL /;"	d
TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_SLAVE_STAT /;"	d
TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_SLAVE_STAT /;"	d
TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_SLAVE_STAT /;"	d
TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_SLAVE_STAT /;"	d
TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_SLAVE_STAT /;"	d
TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_XMT_DATA16 /;"	d
TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_XMT_DATA16 /;"	d
TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_XMT_DATA16 /;"	d
TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_XMT_DATA16 /;"	d
TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_XMT_DATA16 /;"	d
TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define TWI1_XMT_DATA8 /;"	d
TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define TWI1_XMT_DATA8 /;"	d
TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define TWI1_XMT_DATA8 /;"	d
TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define TWI1_XMT_DATA8 /;"	d
TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define TWI1_XMT_DATA8 /;"	d
TWI_ACR_DATAL	drivers/i2c/at91_i2c.h	/^#define	TWI_ACR_DATAL(/;"	d
TWI_ACR_DIR_READ	drivers/i2c/at91_i2c.h	/^#define	TWI_ACR_DIR_READ	/;"	d
TWI_CLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_CLKDIV /;"	d
TWI_CLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_CLKDIV /;"	d
TWI_CLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_CLKDIV /;"	d
TWI_CLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_CLKDIV /;"	d
TWI_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_CONTROL /;"	d
TWI_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_CONTROL /;"	d
TWI_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_CONTROL /;"	d
TWI_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_CONTROL /;"	d
TWI_CR_ACMDIS	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_ACMDIS	/;"	d
TWI_CR_ACMEN	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_ACMEN	/;"	d
TWI_CR_LOCKCLR	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_LOCKCLR	/;"	d
TWI_CR_MSEN	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_MSEN	/;"	d
TWI_CR_START	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_START	/;"	d
TWI_CR_STOP	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_STOP	/;"	d
TWI_CR_SVDIS	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_SVDIS	/;"	d
TWI_CR_SWRST	drivers/i2c/at91_i2c.h	/^#define	TWI_CR_SWRST	/;"	d
TWI_CWGR_HOLD	drivers/i2c/at91_i2c.h	/^#define	TWI_CWGR_HOLD(/;"	d
TWI_CWGR_HOLD_MAX	drivers/i2c/at91_i2c.h	/^#define	TWI_CWGR_HOLD_MAX	/;"	d
TWI_ENA	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	TWI_ENA	/;"	d
TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_FIFO_CTL /;"	d
TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_FIFO_CTL /;"	d
TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_FIFO_CTL /;"	d
TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_FIFO_CTL /;"	d
TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_FIFO_STAT /;"	d
TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_FIFO_STAT /;"	d
TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_FIFO_STAT /;"	d
TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_FIFO_STAT /;"	d
TWI_INT_MASK	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_INT_MASK /;"	d
TWI_INT_MASK	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_INT_MASK /;"	d
TWI_INT_MASK	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_INT_MASK /;"	d
TWI_INT_MASK	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_INT_MASK /;"	d
TWI_INT_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_INT_STAT /;"	d
TWI_INT_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_INT_STAT /;"	d
TWI_INT_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_INT_STAT /;"	d
TWI_INT_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_INT_STAT /;"	d
TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_MASTER_ADDR /;"	d
TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_MASTER_ADDR /;"	d
TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_MASTER_ADDR /;"	d
TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_MASTER_ADDR /;"	d
TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_MASTER_CTL /;"	d
TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_MASTER_CTL /;"	d
TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_MASTER_CTL /;"	d
TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_MASTER_CTL /;"	d
TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_MASTER_STAT /;"	d
TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_MASTER_STAT /;"	d
TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_MASTER_STAT /;"	d
TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_MASTER_STAT /;"	d
TWI_MMR_IADRSZ_1	drivers/i2c/at91_i2c.h	/^#define	TWI_MMR_IADRSZ_1	/;"	d
TWI_MMR_MREAD	drivers/i2c/at91_i2c.h	/^#define	TWI_MMR_MREAD	/;"	d
TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_RCV_DATA16 /;"	d
TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_RCV_DATA16 /;"	d
TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_RCV_DATA16 /;"	d
TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_RCV_DATA16 /;"	d
TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_RCV_DATA8 /;"	d
TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_RCV_DATA8 /;"	d
TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_RCV_DATA8 /;"	d
TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_RCV_DATA8 /;"	d
TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_SLAVE_ADDR /;"	d
TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_SLAVE_ADDR /;"	d
TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_SLAVE_ADDR /;"	d
TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_SLAVE_ADDR /;"	d
TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_SLAVE_CTL /;"	d
TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_SLAVE_CTL /;"	d
TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_SLAVE_CTL /;"	d
TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_SLAVE_CTL /;"	d
TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_SLAVE_STAT /;"	d
TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_SLAVE_STAT /;"	d
TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_SLAVE_STAT /;"	d
TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_SLAVE_STAT /;"	d
TWI_SR_LOCK	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_LOCK	/;"	d
TWI_SR_NACK	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_NACK	/;"	d
TWI_SR_OVRE	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_OVRE	/;"	d
TWI_SR_RXRDY	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_RXRDY	/;"	d
TWI_SR_TXCOMP	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_TXCOMP	/;"	d
TWI_SR_TXRDY	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_TXRDY	/;"	d
TWI_SR_UNRE	drivers/i2c/at91_i2c.h	/^#define	TWI_SR_UNRE	/;"	d
TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_XMT_DATA16 /;"	d
TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_XMT_DATA16 /;"	d
TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_XMT_DATA16 /;"	d
TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_XMT_DATA16 /;"	d
TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define TWI_XMT_DATA8 /;"	d
TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define TWI_XMT_DATA8 /;"	d
TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define TWI_XMT_DATA8 /;"	d
TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define TWI_XMT_DATA8 /;"	d
TWL4030_BASEADD_AUDIO_VOICE	include/twl4030.h	/^#define TWL4030_BASEADD_AUDIO_VOICE	/;"	d
TWL4030_BASEADD_BACKUP	include/twl4030.h	/^#define TWL4030_BASEADD_BACKUP	/;"	d
TWL4030_BASEADD_GPIO	include/twl4030.h	/^#define TWL4030_BASEADD_GPIO	/;"	d
TWL4030_BASEADD_INT	include/twl4030.h	/^#define TWL4030_BASEADD_INT	/;"	d
TWL4030_BASEADD_INTBR	include/twl4030.h	/^#define TWL4030_BASEADD_INTBR	/;"	d
TWL4030_BASEADD_INTERRUPTS	include/twl4030.h	/^#define TWL4030_BASEADD_INTERRUPTS	/;"	d
TWL4030_BASEADD_KEYPAD	include/twl4030.h	/^#define TWL4030_BASEADD_KEYPAD	/;"	d
TWL4030_BASEADD_LED	include/twl4030.h	/^#define TWL4030_BASEADD_LED	/;"	d
TWL4030_BASEADD_MADC	include/twl4030.h	/^#define TWL4030_BASEADD_MADC	/;"	d
TWL4030_BASEADD_MAIN_CHARGE	include/twl4030.h	/^#define TWL4030_BASEADD_MAIN_CHARGE	/;"	d
TWL4030_BASEADD_PIH	include/twl4030.h	/^#define TWL4030_BASEADD_PIH	/;"	d
TWL4030_BASEADD_PM_MASTER	include/twl4030.h	/^#define TWL4030_BASEADD_PM_MASTER	/;"	d
TWL4030_BASEADD_PM_RECIEVER	include/twl4030.h	/^#define TWL4030_BASEADD_PM_RECIEVER	/;"	d
TWL4030_BASEADD_PRECHARGE	include/twl4030.h	/^#define TWL4030_BASEADD_PRECHARGE	/;"	d
TWL4030_BASEADD_PWM0	include/twl4030.h	/^#define TWL4030_BASEADD_PWM0	/;"	d
TWL4030_BASEADD_PWM1	include/twl4030.h	/^#define TWL4030_BASEADD_PWM1	/;"	d
TWL4030_BASEADD_PWMA	include/twl4030.h	/^#define TWL4030_BASEADD_PWMA	/;"	d
TWL4030_BASEADD_PWMB	include/twl4030.h	/^#define TWL4030_BASEADD_PWMB	/;"	d
TWL4030_BASEADD_RTC	include/twl4030.h	/^#define TWL4030_BASEADD_RTC	/;"	d
TWL4030_BASEADD_SECURED_REG	include/twl4030.h	/^#define TWL4030_BASEADD_SECURED_REG	/;"	d
TWL4030_BASEADD_TEST	include/twl4030.h	/^#define TWL4030_BASEADD_TEST	/;"	d
TWL4030_BASEADD_USB	include/twl4030.h	/^#define TWL4030_BASEADD_USB	/;"	d
TWL4030_BB_CFG_BBCHEN	board/pandora/pandora.c	/^#define TWL4030_BB_CFG_BBCHEN	/;"	d	file:
TWL4030_BB_CFG_BBISEL_500UA	board/pandora/pandora.c	/^#define TWL4030_BB_CFG_BBISEL_500UA	/;"	d	file:
TWL4030_BB_CFG_BBSEL_3200MV	board/pandora/pandora.c	/^#define TWL4030_BB_CFG_BBSEL_3200MV	/;"	d	file:
TWL4030_CHIP_AUDIO_VOICE	include/twl4030.h	/^#define TWL4030_CHIP_AUDIO_VOICE	/;"	d
TWL4030_CHIP_BACKUP	include/twl4030.h	/^#define TWL4030_CHIP_BACKUP	/;"	d
TWL4030_CHIP_GPIO	include/twl4030.h	/^#define TWL4030_CHIP_GPIO	/;"	d
TWL4030_CHIP_INT	include/twl4030.h	/^#define TWL4030_CHIP_INT	/;"	d
TWL4030_CHIP_INTBR	include/twl4030.h	/^#define TWL4030_CHIP_INTBR	/;"	d
TWL4030_CHIP_INTERRUPTS	include/twl4030.h	/^#define TWL4030_CHIP_INTERRUPTS	/;"	d
TWL4030_CHIP_KEYPAD	include/twl4030.h	/^#define TWL4030_CHIP_KEYPAD	/;"	d
TWL4030_CHIP_LED	include/twl4030.h	/^#define TWL4030_CHIP_LED	/;"	d
TWL4030_CHIP_MADC	include/twl4030.h	/^#define TWL4030_CHIP_MADC	/;"	d
TWL4030_CHIP_MAIN_CHARGE	include/twl4030.h	/^#define TWL4030_CHIP_MAIN_CHARGE	/;"	d
TWL4030_CHIP_PIH	include/twl4030.h	/^#define TWL4030_CHIP_PIH	/;"	d
TWL4030_CHIP_PM_MASTER	include/twl4030.h	/^#define TWL4030_CHIP_PM_MASTER	/;"	d
TWL4030_CHIP_PM_RECEIVER	include/twl4030.h	/^#define TWL4030_CHIP_PM_RECEIVER	/;"	d
TWL4030_CHIP_PRECHARGE	include/twl4030.h	/^#define TWL4030_CHIP_PRECHARGE	/;"	d
TWL4030_CHIP_PWM0	include/twl4030.h	/^#define TWL4030_CHIP_PWM0	/;"	d
TWL4030_CHIP_PWM1	include/twl4030.h	/^#define TWL4030_CHIP_PWM1	/;"	d
TWL4030_CHIP_PWMA	include/twl4030.h	/^#define TWL4030_CHIP_PWMA	/;"	d
TWL4030_CHIP_PWMB	include/twl4030.h	/^#define TWL4030_CHIP_PWMB	/;"	d
TWL4030_CHIP_RTC	include/twl4030.h	/^#define TWL4030_CHIP_RTC	/;"	d
TWL4030_CHIP_SECURED_REG	include/twl4030.h	/^#define TWL4030_CHIP_SECURED_REG	/;"	d
TWL4030_CHIP_TEST	include/twl4030.h	/^#define TWL4030_CHIP_TEST	/;"	d
TWL4030_CHIP_USB	include/twl4030.h	/^#define TWL4030_CHIP_USB	/;"	d
TWL4030_GPIO_CLEARGPIODATAOUT1	include/twl4030.h	/^#define TWL4030_GPIO_CLEARGPIODATAOUT1	/;"	d
TWL4030_GPIO_CLEARGPIODATAOUT2	include/twl4030.h	/^#define TWL4030_GPIO_CLEARGPIODATAOUT2	/;"	d
TWL4030_GPIO_CLEARGPIODATAOUT3	include/twl4030.h	/^#define TWL4030_GPIO_CLEARGPIODATAOUT3	/;"	d
TWL4030_GPIO_GPIODATADIR1	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATADIR1	/;"	d
TWL4030_GPIO_GPIODATADIR2	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATADIR2	/;"	d
TWL4030_GPIO_GPIODATADIR3	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATADIR3	/;"	d
TWL4030_GPIO_GPIODATAIN1	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATAIN1	/;"	d
TWL4030_GPIO_GPIODATAIN2	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATAIN2	/;"	d
TWL4030_GPIO_GPIODATAIN3	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATAIN3	/;"	d
TWL4030_GPIO_GPIODATAOUT1	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATAOUT1	/;"	d
TWL4030_GPIO_GPIODATAOUT2	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATAOUT2	/;"	d
TWL4030_GPIO_GPIODATAOUT3	include/twl4030.h	/^#define TWL4030_GPIO_GPIODATAOUT3	/;"	d
TWL4030_GPIO_GPIOPUPDCTR1	include/twl4030.h	/^#define TWL4030_GPIO_GPIOPUPDCTR1	/;"	d
TWL4030_GPIO_GPIOPUPDCTR2	include/twl4030.h	/^#define TWL4030_GPIO_GPIOPUPDCTR2	/;"	d
TWL4030_GPIO_GPIOPUPDCTR3	include/twl4030.h	/^#define TWL4030_GPIO_GPIOPUPDCTR3	/;"	d
TWL4030_GPIO_GPIOPUPDCTR4	include/twl4030.h	/^#define TWL4030_GPIO_GPIOPUPDCTR4	/;"	d
TWL4030_GPIO_GPIOPUPDCTR5	include/twl4030.h	/^#define TWL4030_GPIO_GPIOPUPDCTR5	/;"	d
TWL4030_GPIO_GPIO_CTRL	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_CTRL	/;"	d
TWL4030_GPIO_GPIO_DEBEN1	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_DEBEN1	/;"	d
TWL4030_GPIO_GPIO_DEBEN2	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_DEBEN2	/;"	d
TWL4030_GPIO_GPIO_DEBEN3	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_DEBEN3	/;"	d
TWL4030_GPIO_GPIO_EDR1	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_EDR1	/;"	d
TWL4030_GPIO_GPIO_EDR2	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_EDR2	/;"	d
TWL4030_GPIO_GPIO_EDR3	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_EDR3	/;"	d
TWL4030_GPIO_GPIO_EDR4	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_EDR4	/;"	d
TWL4030_GPIO_GPIO_EDR5	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_EDR5	/;"	d
TWL4030_GPIO_GPIO_IMR1A	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_IMR1A	/;"	d
TWL4030_GPIO_GPIO_IMR1B	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_IMR1B	/;"	d
TWL4030_GPIO_GPIO_IMR2A	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_IMR2A	/;"	d
TWL4030_GPIO_GPIO_IMR2B	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_IMR2B	/;"	d
TWL4030_GPIO_GPIO_IMR3A	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_IMR3A	/;"	d
TWL4030_GPIO_GPIO_IMR3B	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_IMR3B	/;"	d
TWL4030_GPIO_GPIO_ISR1A	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_ISR1A	/;"	d
TWL4030_GPIO_GPIO_ISR1B	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_ISR1B	/;"	d
TWL4030_GPIO_GPIO_ISR2A	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_ISR2A	/;"	d
TWL4030_GPIO_GPIO_ISR2B	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_ISR2B	/;"	d
TWL4030_GPIO_GPIO_ISR3A	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_ISR3A	/;"	d
TWL4030_GPIO_GPIO_ISR3B	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_ISR3B	/;"	d
TWL4030_GPIO_GPIO_SIH_CTRL	include/twl4030.h	/^#define TWL4030_GPIO_GPIO_SIH_CTRL	/;"	d
TWL4030_GPIO_SETGPIODATAOUT1	include/twl4030.h	/^#define TWL4030_GPIO_SETGPIODATAOUT1	/;"	d
TWL4030_GPIO_SETGPIODATAOUT2	include/twl4030.h	/^#define TWL4030_GPIO_SETGPIODATAOUT2	/;"	d
TWL4030_GPIO_SETGPIODATAOUT3	include/twl4030.h	/^#define TWL4030_GPIO_SETGPIODATAOUT3	/;"	d
TWL4030_H	include/twl4030.h	/^#define TWL4030_H$/;"	d
TWL4030_I2C_BUS	board/overo/common.c	/^#define TWL4030_I2C_BUS /;"	d	file:
TWL4030_I2C_BUS	board/overo/overo.c	/^#define TWL4030_I2C_BUS	/;"	d	file:
TWL4030_I2C_BUS	board/ti/beagle/beagle.c	/^#define TWL4030_I2C_BUS	/;"	d	file:
TWL4030_KEYPAD_CTRL_KBD_ON	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_KBD_ON	/;"	d
TWL4030_KEYPAD_CTRL_LK_EN	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_LK_EN	/;"	d
TWL4030_KEYPAD_CTRL_RP_EN	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_RP_EN	/;"	d
TWL4030_KEYPAD_CTRL_SOFTMODEN	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_SOFTMODEN	/;"	d
TWL4030_KEYPAD_CTRL_SOFT_NRST	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_SOFT_NRST	/;"	d
TWL4030_KEYPAD_CTRL_TOE_EN	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_TOE_EN	/;"	d
TWL4030_KEYPAD_CTRL_TOLE_EN	include/twl4030.h	/^#define TWL4030_KEYPAD_CTRL_TOLE_EN	/;"	d
TWL4030_KEYPAD_FULL_CODE_15_8	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_15_8	/;"	d
TWL4030_KEYPAD_FULL_CODE_23_16	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_23_16	/;"	d
TWL4030_KEYPAD_FULL_CODE_31_24	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_31_24	/;"	d
TWL4030_KEYPAD_FULL_CODE_39_32	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_39_32	/;"	d
TWL4030_KEYPAD_FULL_CODE_47_40	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_47_40	/;"	d
TWL4030_KEYPAD_FULL_CODE_55_48	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_55_48	/;"	d
TWL4030_KEYPAD_FULL_CODE_63_56	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_63_56	/;"	d
TWL4030_KEYPAD_FULL_CODE_7_0	include/twl4030.h	/^#define TWL4030_KEYPAD_FULL_CODE_7_0	/;"	d
TWL4030_KEYPAD_KBC_REG	include/twl4030.h	/^#define TWL4030_KEYPAD_KBC_REG	/;"	d
TWL4030_KEYPAD_KBR_REG	include/twl4030.h	/^#define TWL4030_KEYPAD_KBR_REG	/;"	d
TWL4030_KEYPAD_KEYP_CTRL_REG	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_CTRL_REG	/;"	d
TWL4030_KEYPAD_KEYP_EDR	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_EDR	/;"	d
TWL4030_KEYPAD_KEYP_IMR1	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_IMR1	/;"	d
TWL4030_KEYPAD_KEYP_IMR2	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_IMR2	/;"	d
TWL4030_KEYPAD_KEYP_ISR1	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_ISR1	/;"	d
TWL4030_KEYPAD_KEYP_ISR2	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_ISR2	/;"	d
TWL4030_KEYPAD_KEYP_SIH_CTRL	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_SIH_CTRL	/;"	d
TWL4030_KEYPAD_KEYP_SIR	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_SIR	/;"	d
TWL4030_KEYPAD_KEYP_SMS	include/twl4030.h	/^#define TWL4030_KEYPAD_KEYP_SMS	/;"	d
TWL4030_KEYPAD_KEY_DEB_REG	include/twl4030.h	/^#define TWL4030_KEYPAD_KEY_DEB_REG	/;"	d
TWL4030_KEYPAD_LK_PTV_REG	include/twl4030.h	/^#define TWL4030_KEYPAD_LK_PTV_REG	/;"	d
TWL4030_KEYPAD_LONG_KEY_REG1	include/twl4030.h	/^#define TWL4030_KEYPAD_LONG_KEY_REG1	/;"	d
TWL4030_KEYPAD_TIME_OUT_REG1	include/twl4030.h	/^#define TWL4030_KEYPAD_TIME_OUT_REG1	/;"	d
TWL4030_KEYPAD_TIME_OUT_REG2	include/twl4030.h	/^#define TWL4030_KEYPAD_TIME_OUT_REG2	/;"	d
TWL4030_LED_LEDEN	include/twl4030.h	/^#define TWL4030_LED_LEDEN	/;"	d
TWL4030_LED_LEDEN_LEDAON	include/twl4030.h	/^#define TWL4030_LED_LEDEN_LEDAON	/;"	d
TWL4030_LED_LEDEN_LEDAPWM	include/twl4030.h	/^#define TWL4030_LED_LEDEN_LEDAPWM	/;"	d
TWL4030_LED_LEDEN_LEDBON	include/twl4030.h	/^#define TWL4030_LED_LEDEN_LEDBON	/;"	d
TWL4030_LED_LEDEN_LEDBPWM	include/twl4030.h	/^#define TWL4030_LED_LEDEN_LEDBPWM	/;"	d
TWL4030_PM_MASTER_BACKUP_MISC_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_BACKUP_MISC_CFG	/;"	d
TWL4030_PM_MASTER_BACKUP_MISC_STS	include/twl4030.h	/^#define TWL4030_PM_MASTER_BACKUP_MISC_STS	/;"	d
TWL4030_PM_MASTER_BACKUP_MISC_TST	include/twl4030.h	/^#define TWL4030_PM_MASTER_BACKUP_MISC_TST	/;"	d
TWL4030_PM_MASTER_BB_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_BB_CFG	/;"	d
TWL4030_PM_MASTER_BGAP_TRIM	include/twl4030.h	/^#define TWL4030_PM_MASTER_BGAP_TRIM	/;"	d
TWL4030_PM_MASTER_BOOT_BCI	include/twl4030.h	/^#define TWL4030_PM_MASTER_BOOT_BCI	/;"	d
TWL4030_PM_MASTER_CFG_BOOT	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_BOOT	/;"	d
TWL4030_PM_MASTER_CFG_P123_TRANSITION	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_P123_TRANSITION	/;"	d
TWL4030_PM_MASTER_CFG_P1_TRANSITION	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_P1_TRANSITION	/;"	d
TWL4030_PM_MASTER_CFG_P2_TRANSITION	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_P2_TRANSITION	/;"	d
TWL4030_PM_MASTER_CFG_P3_TRANSITION	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_P3_TRANSITION	/;"	d
TWL4030_PM_MASTER_CFG_PWRANA1	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_PWRANA1	/;"	d
TWL4030_PM_MASTER_CFG_PWRANA2	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_PWRANA2	/;"	d
TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV	/;"	d
TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_CHG	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_CHG	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_PWON	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_PWON	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_RTC	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_RTC	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_SWBUG	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_SWBUG	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_USB	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_USB	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT	/;"	d
TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBUS	include/twl4030.h	/^#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBUS	/;"	d
TWL4030_PM_MASTER_DCDC_GLOBAL_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG	/;"	d
TWL4030_PM_MASTER_IT_CHECK_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_IT_CHECK_CFG	/;"	d
TWL4030_PM_MASTER_LS_TST_A	include/twl4030.h	/^#define TWL4030_PM_MASTER_LS_TST_A	/;"	d
TWL4030_PM_MASTER_LS_TST_B	include/twl4030.h	/^#define TWL4030_PM_MASTER_LS_TST_B	/;"	d
TWL4030_PM_MASTER_LS_TST_C	include/twl4030.h	/^#define TWL4030_PM_MASTER_LS_TST_C	/;"	d
TWL4030_PM_MASTER_LS_TST_D	include/twl4030.h	/^#define TWL4030_PM_MASTER_LS_TST_D	/;"	d
TWL4030_PM_MASTER_MEMORY_ADDRESS	include/twl4030.h	/^#define TWL4030_PM_MASTER_MEMORY_ADDRESS	/;"	d
TWL4030_PM_MASTER_MEMORY_DATA	include/twl4030.h	/^#define TWL4030_PM_MASTER_MEMORY_DATA	/;"	d
TWL4030_PM_MASTER_MISC_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_MISC_CFG	/;"	d
TWL4030_PM_MASTER_MISC_TST	include/twl4030.h	/^#define TWL4030_PM_MASTER_MISC_TST	/;"	d
TWL4030_PM_MASTER_P1_SW_EVENTS	include/twl4030.h	/^#define TWL4030_PM_MASTER_P1_SW_EVENTS	/;"	d
TWL4030_PM_MASTER_P2_SW_EVENTS	include/twl4030.h	/^#define TWL4030_PM_MASTER_P2_SW_EVENTS	/;"	d
TWL4030_PM_MASTER_P3_SW_EVENTS	include/twl4030.h	/^#define TWL4030_PM_MASTER_P3_SW_EVENTS	/;"	d
TWL4030_PM_MASTER_PB_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_PB_CFG	/;"	d
TWL4030_PM_MASTER_PB_WORD_LSB	include/twl4030.h	/^#define TWL4030_PM_MASTER_PB_WORD_LSB	/;"	d
TWL4030_PM_MASTER_PB_WORD_MSB	include/twl4030.h	/^#define TWL4030_PM_MASTER_PB_WORD_MSB	/;"	d
TWL4030_PM_MASTER_PROTECT_KEY	include/twl4030.h	/^#define TWL4030_PM_MASTER_PROTECT_KEY	/;"	d
TWL4030_PM_MASTER_SC_CONFIG	include/twl4030.h	/^#define TWL4030_PM_MASTER_SC_CONFIG	/;"	d
TWL4030_PM_MASTER_SC_DETECT1	include/twl4030.h	/^#define TWL4030_PM_MASTER_SC_DETECT1	/;"	d
TWL4030_PM_MASTER_SC_DETECT2	include/twl4030.h	/^#define TWL4030_PM_MASTER_SC_DETECT2	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_A2S	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_A2S	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_A2W	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_A2W	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_P2A	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_P2A	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_S2A12	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_S2A12	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_S2A3	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_S2A3	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_W2P	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_W2P	/;"	d
TWL4030_PM_MASTER_SEQ_ADD_WARM	include/twl4030.h	/^#define TWL4030_PM_MASTER_SEQ_ADD_WARM	/;"	d
TWL4030_PM_MASTER_SHUNDAN	include/twl4030.h	/^#define TWL4030_PM_MASTER_SHUNDAN	/;"	d
TWL4030_PM_MASTER_STS_BOOT	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_BOOT	/;"	d
TWL4030_PM_MASTER_STS_HW_CONDITIONS	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_HW_CONDITIONS	/;"	d
TWL4030_PM_MASTER_STS_HW_CONDITIONS_CHG	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_CHG	/;"	d
TWL4030_PM_MASTER_STS_HW_CONDITIONS_PWON	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_PWON	/;"	d
TWL4030_PM_MASTER_STS_HW_CONDITIONS_USB	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_USB	/;"	d
TWL4030_PM_MASTER_STS_HW_CONDITIONS_VBUS	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_VBUS	/;"	d
TWL4030_PM_MASTER_STS_P123_STATE	include/twl4030.h	/^#define TWL4030_PM_MASTER_STS_P123_STATE	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_DEVACT	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_DEVACT	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_DEVOFF	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_DEVSLP	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON	/;"	d
TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN	include/twl4030.h	/^#define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN	/;"	d
TWL4030_PM_MASTER_TRIM1	include/twl4030.h	/^#define TWL4030_PM_MASTER_TRIM1	/;"	d
TWL4030_PM_MASTER_VDD1_TRIM1	include/twl4030.h	/^#define TWL4030_PM_MASTER_VDD1_TRIM1	/;"	d
TWL4030_PM_MASTER_VDD1_TRIM2	include/twl4030.h	/^#define TWL4030_PM_MASTER_VDD1_TRIM2	/;"	d
TWL4030_PM_MASTER_VDD2_TRIM1	include/twl4030.h	/^#define TWL4030_PM_MASTER_VDD2_TRIM1	/;"	d
TWL4030_PM_MASTER_VDD2_TRIM2	include/twl4030.h	/^#define TWL4030_PM_MASTER_VDD2_TRIM2	/;"	d
TWL4030_PM_MASTER_VIBRATOR_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_VIBRATOR_CFG	/;"	d
TWL4030_PM_MASTER_VIO_TRIM1	include/twl4030.h	/^#define TWL4030_PM_MASTER_VIO_TRIM1	/;"	d
TWL4030_PM_MASTER_VIO_TRIM2	include/twl4030.h	/^#define TWL4030_PM_MASTER_VIO_TRIM2	/;"	d
TWL4030_PM_MASTER_WATCHDOG_CFG	include/twl4030.h	/^#define TWL4030_PM_MASTER_WATCHDOG_CFG	/;"	d
TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_32KCLKOUT_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_32KCLKOUT_REMAP	/;"	d
TWL4030_PM_RECEIVER_32KCLKOUT_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_32KCLKOUT_TYPE	/;"	d
TWL4030_PM_RECEIVER_BB_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_BB_CFG	/;"	d
TWL4030_PM_RECEIVER_CLKEN_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_CLKEN_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_CLKEN_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_CLKEN_REMAP	/;"	d
TWL4030_PM_RECEIVER_CLKEN_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_CLKEN_TYPE	/;"	d
TWL4030_PM_RECEIVER_DC_DC_TIMEOUT	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_DC_DC_TIMEOUT	/;"	d
TWL4030_PM_RECEIVER_DC_TO_DC_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_DC_TO_DC_CFG	/;"	d
TWL4030_PM_RECEIVER_DEV_GRP_ALL	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_DEV_GRP_ALL	/;"	d
TWL4030_PM_RECEIVER_DEV_GRP_P1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_DEV_GRP_P1	/;"	d
TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_HFCLKOUT_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_HFCLKOUT_REMAP	/;"	d
TWL4030_PM_RECEIVER_HFCLKOUT_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_HFCLKOUT_TYPE	/;"	d
TWL4030_PM_RECEIVER_IT_CHECK_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_IT_CHECK_CFG	/;"	d
TWL4030_PM_RECEIVER_LS_TST_A	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_LS_TST_A	/;"	d
TWL4030_PM_RECEIVER_LS_TST_B	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_LS_TST_B	/;"	d
TWL4030_PM_RECEIVER_LS_TST_C	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_LS_TST_C	/;"	d
TWL4030_PM_RECEIVER_LS_TST_D	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_LS_TST_D	/;"	d
TWL4030_PM_RECEIVER_MAINREF_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_MAINREF_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_MAINREF_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_MAINREF_REMAP	/;"	d
TWL4030_PM_RECEIVER_MAINREF_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_MAINREF_TYPE	/;"	d
TWL4030_PM_RECEIVER_MISC_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_MISC_CFG	/;"	d
TWL4030_PM_RECEIVER_MISC_TST	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_MISC_TST	/;"	d
TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_NRESPWRON_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_NRESPWRON_REMAP	/;"	d
TWL4030_PM_RECEIVER_NRESPWRON_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_NRESPWRON_TYPE	/;"	d
TWL4030_PM_RECEIVER_REGEN_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_REGEN_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_REGEN_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_REGEN_REMAP	/;"	d
TWL4030_PM_RECEIVER_REGEN_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_REGEN_TYPE	/;"	d
TWL4030_PM_RECEIVER_SC_CONFIG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_SC_CONFIG	/;"	d
TWL4030_PM_RECEIVER_SC_DETECT1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_SC_DETECT1	/;"	d
TWL4030_PM_RECEIVER_SC_DETECT2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_SC_DETECT2	/;"	d
TWL4030_PM_RECEIVER_SYSEN_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_SYSEN_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_SYSEN_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_SYSEN_REMAP	/;"	d
TWL4030_PM_RECEIVER_SYSEN_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_SYSEN_TYPE	/;"	d
TWL4030_PM_RECEIVER_TRIM1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_TRIM1	/;"	d
TWL4030_PM_RECEIVER_TRIM2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_TRIM2	/;"	d
TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_TRITON_RESET_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_TRITON_RESET_REMAP	/;"	d
TWL4030_PM_RECEIVER_TRITON_RESET_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_TRITON_RESET_TYPE	/;"	d
TWL4030_PM_RECEIVER_VAUX1_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX1_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VAUX1_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX1_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VAUX1_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX1_REMAP	/;"	d
TWL4030_PM_RECEIVER_VAUX1_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX1_TYPE	/;"	d
TWL4030_PM_RECEIVER_VAUX2_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX2_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VAUX2_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX2_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VAUX2_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX2_REMAP	/;"	d
TWL4030_PM_RECEIVER_VAUX2_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX2_TYPE	/;"	d
TWL4030_PM_RECEIVER_VAUX2_VSEL_18	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX2_VSEL_18	/;"	d
TWL4030_PM_RECEIVER_VAUX2_VSEL_28	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX2_VSEL_28	/;"	d
TWL4030_PM_RECEIVER_VAUX3_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX3_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VAUX3_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX3_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VAUX3_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX3_REMAP	/;"	d
TWL4030_PM_RECEIVER_VAUX3_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX3_TYPE	/;"	d
TWL4030_PM_RECEIVER_VAUX3_VSEL_18	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX3_VSEL_18	/;"	d
TWL4030_PM_RECEIVER_VAUX3_VSEL_28	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX3_VSEL_28	/;"	d
TWL4030_PM_RECEIVER_VAUX4_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX4_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VAUX4_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX4_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VAUX4_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX4_REMAP	/;"	d
TWL4030_PM_RECEIVER_VAUX4_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VAUX4_TYPE	/;"	d
TWL4030_PM_RECEIVER_VDAC_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDAC_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VDAC_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDAC_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VDAC_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDAC_REMAP	/;"	d
TWL4030_PM_RECEIVER_VDAC_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDAC_TYPE	/;"	d
TWL4030_PM_RECEIVER_VDAC_VSEL_18	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDAC_VSEL_18	/;"	d
TWL4030_PM_RECEIVER_VDD1_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_CFG	/;"	d
TWL4030_PM_RECEIVER_VDD1_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VDD1_MISC_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_MISC_CFG	/;"	d
TWL4030_PM_RECEIVER_VDD1_OSC	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_OSC	/;"	d
TWL4030_PM_RECEIVER_VDD1_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_REMAP	/;"	d
TWL4030_PM_RECEIVER_VDD1_RESERVED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_RESERVED	/;"	d
TWL4030_PM_RECEIVER_VDD1_STEP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_STEP	/;"	d
TWL4030_PM_RECEIVER_VDD1_TEST1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_TEST1	/;"	d
TWL4030_PM_RECEIVER_VDD1_TEST2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_TEST2	/;"	d
TWL4030_PM_RECEIVER_VDD1_TRIM1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_TRIM1	/;"	d
TWL4030_PM_RECEIVER_VDD1_TRIM2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_TRIM2	/;"	d
TWL4030_PM_RECEIVER_VDD1_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_TYPE	/;"	d
TWL4030_PM_RECEIVER_VDD1_VFLOOR	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_VFLOOR	/;"	d
TWL4030_PM_RECEIVER_VDD1_VMODE_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_VMODE_CFG	/;"	d
TWL4030_PM_RECEIVER_VDD1_VROOF	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_VROOF	/;"	d
TWL4030_PM_RECEIVER_VDD1_VSEL	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD1_VSEL	/;"	d
TWL4030_PM_RECEIVER_VDD2_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_CFG	/;"	d
TWL4030_PM_RECEIVER_VDD2_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VDD2_MISC_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_MISC_CFG	/;"	d
TWL4030_PM_RECEIVER_VDD2_OSC	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_OSC	/;"	d
TWL4030_PM_RECEIVER_VDD2_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_REMAP	/;"	d
TWL4030_PM_RECEIVER_VDD2_RESERVED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_RESERVED	/;"	d
TWL4030_PM_RECEIVER_VDD2_STEP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_STEP	/;"	d
TWL4030_PM_RECEIVER_VDD2_TEST1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_TEST1	/;"	d
TWL4030_PM_RECEIVER_VDD2_TEST2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_TEST2	/;"	d
TWL4030_PM_RECEIVER_VDD2_TRIM1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_TRIM1	/;"	d
TWL4030_PM_RECEIVER_VDD2_TRIM2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_TRIM2	/;"	d
TWL4030_PM_RECEIVER_VDD2_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_TYPE	/;"	d
TWL4030_PM_RECEIVER_VDD2_VFLOOR	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_VFLOOR	/;"	d
TWL4030_PM_RECEIVER_VDD2_VMODE_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_VMODE_CFG	/;"	d
TWL4030_PM_RECEIVER_VDD2_VROOF	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_VROOF	/;"	d
TWL4030_PM_RECEIVER_VDD2_VSEL	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VDD2_VSEL	/;"	d
TWL4030_PM_RECEIVER_VIBRATOR_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIBRATOR_CFG	/;"	d
TWL4030_PM_RECEIVER_VINTANA1_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA1_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VINTANA1_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA1_REMAP	/;"	d
TWL4030_PM_RECEIVER_VINTANA1_TYP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA1_TYP	/;"	d
TWL4030_PM_RECEIVER_VINTANA2_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA2_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VINTANA2_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA2_REMAP	/;"	d
TWL4030_PM_RECEIVER_VINTANA2_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTANA2_TYPE	/;"	d
TWL4030_PM_RECEIVER_VINTDIG_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTDIG_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VINTDIG_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTDIG_REMAP	/;"	d
TWL4030_PM_RECEIVER_VINTDIG_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VINTDIG_TYPE	/;"	d
TWL4030_PM_RECEIVER_VIO_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_CFG	/;"	d
TWL4030_PM_RECEIVER_VIO_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VIO_MISC_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_MISC_CFG	/;"	d
TWL4030_PM_RECEIVER_VIO_OSC	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_OSC	/;"	d
TWL4030_PM_RECEIVER_VIO_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_REMAP	/;"	d
TWL4030_PM_RECEIVER_VIO_RESERVED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_RESERVED	/;"	d
TWL4030_PM_RECEIVER_VIO_TEST1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_TEST1	/;"	d
TWL4030_PM_RECEIVER_VIO_TEST2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_TEST2	/;"	d
TWL4030_PM_RECEIVER_VIO_TRIM1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_TRIM1	/;"	d
TWL4030_PM_RECEIVER_VIO_TRIM2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_TRIM2	/;"	d
TWL4030_PM_RECEIVER_VIO_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_TYPE	/;"	d
TWL4030_PM_RECEIVER_VIO_VSEL	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VIO_VSEL	/;"	d
TWL4030_PM_RECEIVER_VMMC1_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC1_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VMMC1_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC1_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VMMC1_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC1_REMAP	/;"	d
TWL4030_PM_RECEIVER_VMMC1_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC1_TYPE	/;"	d
TWL4030_PM_RECEIVER_VMMC1_VSEL_30	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC1_VSEL_30	/;"	d
TWL4030_PM_RECEIVER_VMMC1_VSEL_32	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC1_VSEL_32	/;"	d
TWL4030_PM_RECEIVER_VMMC2_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC2_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VMMC2_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC2_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VMMC2_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC2_REMAP	/;"	d
TWL4030_PM_RECEIVER_VMMC2_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC2_TYPE	/;"	d
TWL4030_PM_RECEIVER_VMMC2_VSEL_30	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC2_VSEL_30	/;"	d
TWL4030_PM_RECEIVER_VMMC2_VSEL_32	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VMMC2_VSEL_32	/;"	d
TWL4030_PM_RECEIVER_VPLL1_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL1_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VPLL1_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL1_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VPLL1_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL1_REMAP	/;"	d
TWL4030_PM_RECEIVER_VPLL1_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL1_TYPE	/;"	d
TWL4030_PM_RECEIVER_VPLL2_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL2_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VPLL2_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL2_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VPLL2_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL2_REMAP	/;"	d
TWL4030_PM_RECEIVER_VPLL2_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL2_TYPE	/;"	d
TWL4030_PM_RECEIVER_VPLL2_VSEL_18	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VPLL2_VSEL_18	/;"	d
TWL4030_PM_RECEIVER_VSIM_DEDICATED	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VSIM_DEDICATED	/;"	d
TWL4030_PM_RECEIVER_VSIM_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VSIM_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VSIM_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VSIM_REMAP	/;"	d
TWL4030_PM_RECEIVER_VSIM_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VSIM_TYPE	/;"	d
TWL4030_PM_RECEIVER_VSIM_VSEL_18	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VSIM_VSEL_18	/;"	d
TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VUSB1V5_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB1V5_REMAP	/;"	d
TWL4030_PM_RECEIVER_VUSB1V5_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB1V5_TYPE	/;"	d
TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VUSB1V8_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB1V8_REMAP	/;"	d
TWL4030_PM_RECEIVER_VUSB1V8_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB1V8_TYPE	/;"	d
TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VUSB3V1_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB3V1_REMAP	/;"	d
TWL4030_PM_RECEIVER_VUSB3V1_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB3V1_TYPE	/;"	d
TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP	/;"	d
TWL4030_PM_RECEIVER_VUSBCP_REMAP	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSBCP_REMAP	/;"	d
TWL4030_PM_RECEIVER_VUSBCP_TYPE	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSBCP_TYPE	/;"	d
TWL4030_PM_RECEIVER_VUSB_DEDICATED1	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB_DEDICATED1	/;"	d
TWL4030_PM_RECEIVER_VUSB_DEDICATED2	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_VUSB_DEDICATED2	/;"	d
TWL4030_PM_RECEIVER_WATCHDOG_CFG	include/twl4030.h	/^#define TWL4030_PM_RECEIVER_WATCHDOG_CFG	/;"	d
TWL4030_USB_CARKIT_4W_DEBUG	include/twl4030.h	/^#define TWL4030_USB_CARKIT_4W_DEBUG	/;"	d
TWL4030_USB_CARKIT_5W_DEBUG	include/twl4030.h	/^#define TWL4030_USB_CARKIT_5W_DEBUG	/;"	d
TWL4030_USB_CARKIT_ANA_CTRL	include/twl4030.h	/^#define TWL4030_USB_CARKIT_ANA_CTRL	/;"	d
TWL4030_USB_CARKIT_ANA_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_ANA_CTRL_CLR	/;"	d
TWL4030_USB_CARKIT_ANA_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_ANA_CTRL_SET	/;"	d
TWL4030_USB_CARKIT_CTRL	include/twl4030.h	/^#define TWL4030_USB_CARKIT_CTRL	/;"	d
TWL4030_USB_CARKIT_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_CTRL_CLR	/;"	d
TWL4030_USB_CARKIT_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_CTRL_SET	/;"	d
TWL4030_USB_CARKIT_INT_DELAY	include/twl4030.h	/^#define TWL4030_USB_CARKIT_INT_DELAY	/;"	d
TWL4030_USB_CARKIT_INT_EN	include/twl4030.h	/^#define TWL4030_USB_CARKIT_INT_EN	/;"	d
TWL4030_USB_CARKIT_INT_EN_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_INT_EN_CLR	/;"	d
TWL4030_USB_CARKIT_INT_EN_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_INT_EN_SET	/;"	d
TWL4030_USB_CARKIT_INT_LATCH	include/twl4030.h	/^#define TWL4030_USB_CARKIT_INT_LATCH	/;"	d
TWL4030_USB_CARKIT_INT_STS	include/twl4030.h	/^#define TWL4030_USB_CARKIT_INT_STS	/;"	d
TWL4030_USB_CARKIT_PLS_CTRL	include/twl4030.h	/^#define TWL4030_USB_CARKIT_PLS_CTRL	/;"	d
TWL4030_USB_CARKIT_PLS_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_PLS_CTRL_CLR	/;"	d
TWL4030_USB_CARKIT_PLS_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_PLS_CTRL_SET	/;"	d
TWL4030_USB_CARKIT_SM_1_INT_EN	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_1_INT_EN	/;"	d
TWL4030_USB_CARKIT_SM_1_INT_EN_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_1_INT_EN_CLR	/;"	d
TWL4030_USB_CARKIT_SM_1_INT_EN_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_1_INT_EN_SET	/;"	d
TWL4030_USB_CARKIT_SM_1_INT_LATCH	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_1_INT_LATCH	/;"	d
TWL4030_USB_CARKIT_SM_1_INT_STS	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_1_INT_STS	/;"	d
TWL4030_USB_CARKIT_SM_2_INT_EN	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_2_INT_EN	/;"	d
TWL4030_USB_CARKIT_SM_2_INT_EN_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_2_INT_EN_CLR	/;"	d
TWL4030_USB_CARKIT_SM_2_INT_EN_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_2_INT_EN_SET	/;"	d
TWL4030_USB_CARKIT_SM_2_INT_LATCH	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_2_INT_LATCH	/;"	d
TWL4030_USB_CARKIT_SM_2_INT_STS	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_2_INT_STS	/;"	d
TWL4030_USB_CARKIT_SM_CMD	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CMD	/;"	d
TWL4030_USB_CARKIT_SM_CMD_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CMD_CLR	/;"	d
TWL4030_USB_CARKIT_SM_CMD_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CMD_SET	/;"	d
TWL4030_USB_CARKIT_SM_CMD_STS	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CMD_STS	/;"	d
TWL4030_USB_CARKIT_SM_CTRL	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CTRL	/;"	d
TWL4030_USB_CARKIT_SM_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CTRL_CLR	/;"	d
TWL4030_USB_CARKIT_SM_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CTRL_SET	/;"	d
TWL4030_USB_CARKIT_SM_CTRL_STATE	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_CTRL_STATE	/;"	d
TWL4030_USB_CARKIT_SM_ERR_STATUS	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_ERR_STATUS	/;"	d
TWL4030_USB_CARKIT_SM_STATUS	include/twl4030.h	/^#define TWL4030_USB_CARKIT_SM_STATUS	/;"	d
TWL4030_USB_DEBUG	include/twl4030.h	/^#define TWL4030_USB_DEBUG	/;"	d
TWL4030_USB_FUNC_CTRL	include/twl4030.h	/^#define TWL4030_USB_FUNC_CTRL	/;"	d
TWL4030_USB_FUNC_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_FUNC_CTRL_CLR	/;"	d
TWL4030_USB_FUNC_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_FUNC_CTRL_SET	/;"	d
TWL4030_USB_ID_DEBOUNCE	include/twl4030.h	/^#define TWL4030_USB_ID_DEBOUNCE	/;"	d
TWL4030_USB_ID_STATUS	include/twl4030.h	/^#define TWL4030_USB_ID_STATUS	/;"	d
TWL4030_USB_IFC_CTRL	include/twl4030.h	/^#define TWL4030_USB_IFC_CTRL	/;"	d
TWL4030_USB_IFC_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_IFC_CTRL_CLR	/;"	d
TWL4030_USB_IFC_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_IFC_CTRL_SET	/;"	d
TWL4030_USB_MCPC_CTRL	include/twl4030.h	/^#define TWL4030_USB_MCPC_CTRL	/;"	d
TWL4030_USB_MCPC_CTRL2	include/twl4030.h	/^#define TWL4030_USB_MCPC_CTRL2	/;"	d
TWL4030_USB_MCPC_CTRL2_CLR	include/twl4030.h	/^#define TWL4030_USB_MCPC_CTRL2_CLR	/;"	d
TWL4030_USB_MCPC_CTRL2_SET	include/twl4030.h	/^#define TWL4030_USB_MCPC_CTRL2_SET	/;"	d
TWL4030_USB_MCPC_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_MCPC_CTRL_CLR	/;"	d
TWL4030_USB_MCPC_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_MCPC_CTRL_SET	/;"	d
TWL4030_USB_MCPC_IO_CTRL	include/twl4030.h	/^#define TWL4030_USB_MCPC_IO_CTRL	/;"	d
TWL4030_USB_MCPC_IO_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_MCPC_IO_CTRL_CLR	/;"	d
TWL4030_USB_MCPC_IO_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_MCPC_IO_CTRL_SET	/;"	d
TWL4030_USB_OTG_CTRL	include/twl4030.h	/^#define TWL4030_USB_OTG_CTRL	/;"	d
TWL4030_USB_OTG_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_OTG_CTRL_CLR	/;"	d
TWL4030_USB_OTG_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_OTG_CTRL_SET	/;"	d
TWL4030_USB_OTHER_FUNC_CTRL	include/twl4030.h	/^#define TWL4030_USB_OTHER_FUNC_CTRL	/;"	d
TWL4030_USB_OTHER_FUNC_CTRL2	include/twl4030.h	/^#define TWL4030_USB_OTHER_FUNC_CTRL2	/;"	d
TWL4030_USB_OTHER_FUNC_CTRL2_CLR	include/twl4030.h	/^#define TWL4030_USB_OTHER_FUNC_CTRL2_CLR	/;"	d
TWL4030_USB_OTHER_FUNC_CTRL2_SET	include/twl4030.h	/^#define TWL4030_USB_OTHER_FUNC_CTRL2_SET	/;"	d
TWL4030_USB_OTHER_FUNC_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_OTHER_FUNC_CTRL_CLR	/;"	d
TWL4030_USB_OTHER_FUNC_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_OTHER_FUNC_CTRL_SET	/;"	d
TWL4030_USB_OTHER_IFC_CTRL	include/twl4030.h	/^#define TWL4030_USB_OTHER_IFC_CTRL	/;"	d
TWL4030_USB_OTHER_IFC_CTRL2	include/twl4030.h	/^#define TWL4030_USB_OTHER_IFC_CTRL2	/;"	d
TWL4030_USB_OTHER_IFC_CTRL2_CLR	include/twl4030.h	/^#define TWL4030_USB_OTHER_IFC_CTRL2_CLR	/;"	d
TWL4030_USB_OTHER_IFC_CTRL2_SET	include/twl4030.h	/^#define TWL4030_USB_OTHER_IFC_CTRL2_SET	/;"	d
TWL4030_USB_OTHER_IFC_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_OTHER_IFC_CTRL_CLR	/;"	d
TWL4030_USB_OTHER_IFC_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_OTHER_IFC_CTRL_SET	/;"	d
TWL4030_USB_OTHER_INT_EN_FALL	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_EN_FALL	/;"	d
TWL4030_USB_OTHER_INT_EN_FALL_CLR	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_EN_FALL_CLR	/;"	d
TWL4030_USB_OTHER_INT_EN_FALL_SET	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_EN_FALL_SET	/;"	d
TWL4030_USB_OTHER_INT_EN_RISE_CLR	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_EN_RISE_CLR	/;"	d
TWL4030_USB_OTHER_INT_EN_RISE_SET	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_EN_RISE_SET	/;"	d
TWL4030_USB_OTHER_INT_LATCH	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_LATCH	/;"	d
TWL4030_USB_OTHER_INT_STS	include/twl4030.h	/^#define TWL4030_USB_OTHER_INT_STS	/;"	d
TWL4030_USB_PHY_CLK_CTRL	include/twl4030.h	/^#define TWL4030_USB_PHY_CLK_CTRL	/;"	d
TWL4030_USB_PHY_CLK_CTRL_STS	include/twl4030.h	/^#define TWL4030_USB_PHY_CLK_CTRL_STS	/;"	d
TWL4030_USB_PHY_PWR_CTRL	include/twl4030.h	/^#define TWL4030_USB_PHY_PWR_CTRL	/;"	d
TWL4030_USB_POWER_CTRL	include/twl4030.h	/^#define TWL4030_USB_POWER_CTRL	/;"	d
TWL4030_USB_POWER_CTRL_CLR	include/twl4030.h	/^#define TWL4030_USB_POWER_CTRL_CLR	/;"	d
TWL4030_USB_POWER_CTRL_SET	include/twl4030.h	/^#define TWL4030_USB_POWER_CTRL_SET	/;"	d
TWL4030_USB_PRODUCT_ID_HI	include/twl4030.h	/^#define TWL4030_USB_PRODUCT_ID_HI	/;"	d
TWL4030_USB_PRODUCT_ID_LO	include/twl4030.h	/^#define TWL4030_USB_PRODUCT_ID_LO	/;"	d
TWL4030_USB_RCV_PLTY_RECOVERY	include/twl4030.h	/^#define TWL4030_USB_RCV_PLTY_RECOVERY	/;"	d
TWL4030_USB_REG_CTRL_EN	include/twl4030.h	/^#define TWL4030_USB_REG_CTRL_EN	/;"	d
TWL4030_USB_REG_CTRL_EN_CLR	include/twl4030.h	/^#define TWL4030_USB_REG_CTRL_EN_CLR	/;"	d
TWL4030_USB_REG_CTRL_EN_SET	include/twl4030.h	/^#define TWL4030_USB_REG_CTRL_EN_SET	/;"	d
TWL4030_USB_REG_CTRL_ERROR	include/twl4030.h	/^#define TWL4030_USB_REG_CTRL_ERROR	/;"	d
TWL4030_USB_SCRATCH_REG	include/twl4030.h	/^#define TWL4030_USB_SCRATCH_REG	/;"	d
TWL4030_USB_SCRATCH_REG_CLR	include/twl4030.h	/^#define TWL4030_USB_SCRATCH_REG_CLR	/;"	d
TWL4030_USB_SCRATCH_REG_SET	include/twl4030.h	/^#define TWL4030_USB_SCRATCH_REG_SET	/;"	d
TWL4030_USB_TACC_ID_INT_PW	include/twl4030.h	/^#define TWL4030_USB_TACC_ID_INT_PW	/;"	d
TWL4030_USB_TACC_ID_INT_WAIT	include/twl4030.h	/^#define TWL4030_USB_TACC_ID_INT_WAIT	/;"	d
TWL4030_USB_TCR_DP_CON_MAX	include/twl4030.h	/^#define TWL4030_USB_TCR_DP_CON_MAX	/;"	d
TWL4030_USB_TCR_DP_CON_MIN	include/twl4030.h	/^#define TWL4030_USB_TCR_DP_CON_MIN	/;"	d
TWL4030_USB_TCR_UART_DET_MAX	include/twl4030.h	/^#define TWL4030_USB_TCR_UART_DET_MAX	/;"	d
TWL4030_USB_TCR_UART_DET_MIN	include/twl4030.h	/^#define TWL4030_USB_TCR_UART_DET_MIN	/;"	d
TWL4030_USB_TPH_ACK_WAIT	include/twl4030.h	/^#define TWL4030_USB_TPH_ACK_WAIT	/;"	d
TWL4030_USB_TPH_AUD_BIAS	include/twl4030.h	/^#define TWL4030_USB_TPH_AUD_BIAS	/;"	d
TWL4030_USB_TPH_CMD_DLY	include/twl4030.h	/^#define TWL4030_USB_TPH_CMD_DLY	/;"	d
TWL4030_USB_TPH_CMD_WAIT	include/twl4030.h	/^#define TWL4030_USB_TPH_CMD_WAIT	/;"	d
TWL4030_USB_TPH_DET_RST	include/twl4030.h	/^#define TWL4030_USB_TPH_DET_RST	/;"	d
TWL4030_USB_TPH_DP_CON_MAX	include/twl4030.h	/^#define TWL4030_USB_TPH_DP_CON_MAX	/;"	d
TWL4030_USB_TPH_DP_CON_MIN	include/twl4030.h	/^#define TWL4030_USB_TPH_DP_CON_MIN	/;"	d
TWL4030_USB_TPH_DP_DISC_DET	include/twl4030.h	/^#define TWL4030_USB_TPH_DP_DISC_DET	/;"	d
TWL4030_USB_TPH_DP_PD_SHORT	include/twl4030.h	/^#define TWL4030_USB_TPH_DP_PD_SHORT	/;"	d
TWL4030_USB_TPH_ID_INT_PW	include/twl4030.h	/^#define TWL4030_USB_TPH_ID_INT_PW	/;"	d
TWL4030_USB_TRANS_NEG_WIDTH	include/twl4030.h	/^#define TWL4030_USB_TRANS_NEG_WIDTH	/;"	d
TWL4030_USB_TRANS_POS_WIDTH	include/twl4030.h	/^#define TWL4030_USB_TRANS_POS_WIDTH	/;"	d
TWL4030_USB_USB_INT_EN_FALL	include/twl4030.h	/^#define TWL4030_USB_USB_INT_EN_FALL	/;"	d
TWL4030_USB_USB_INT_EN_FALL_CLR	include/twl4030.h	/^#define TWL4030_USB_USB_INT_EN_FALL_CLR	/;"	d
TWL4030_USB_USB_INT_EN_FALL_SET	include/twl4030.h	/^#define TWL4030_USB_USB_INT_EN_FALL_SET	/;"	d
TWL4030_USB_USB_INT_EN_RISE	include/twl4030.h	/^#define TWL4030_USB_USB_INT_EN_RISE	/;"	d
TWL4030_USB_USB_INT_EN_RISE_CLR	include/twl4030.h	/^#define TWL4030_USB_USB_INT_EN_RISE_CLR	/;"	d
TWL4030_USB_USB_INT_EN_RISE_SET	include/twl4030.h	/^#define TWL4030_USB_USB_INT_EN_RISE_SET	/;"	d
TWL4030_USB_USB_INT_LATCH	include/twl4030.h	/^#define TWL4030_USB_USB_INT_LATCH	/;"	d
TWL4030_USB_USB_INT_STS	include/twl4030.h	/^#define TWL4030_USB_USB_INT_STS	/;"	d
TWL4030_USB_VBAT_TIMER	include/twl4030.h	/^#define TWL4030_USB_VBAT_TIMER	/;"	d
TWL4030_USB_VBUS_DEBOUNCE	include/twl4030.h	/^#define TWL4030_USB_VBUS_DEBOUNCE	/;"	d
TWL4030_USB_VENDOR_ID_HI	include/twl4030.h	/^#define TWL4030_USB_VENDOR_ID_HI	/;"	d
TWL4030_USB_VENDOR_ID_LO	include/twl4030.h	/^#define TWL4030_USB_VENDOR_ID_LO	/;"	d
TWL6030_CFG_GRP_P1	include/twl6030.h	/^#define TWL6030_CFG_GRP_P1	/;"	d
TWL6030_CFG_STATE_ON	include/twl6030.h	/^#define TWL6030_CFG_STATE_ON	/;"	d
TWL6030_CFG_STATE_P1	include/twl6030.h	/^#define TWL6030_CFG_STATE_P1	/;"	d
TWL6030_CFG_VOLTAGE_18	include/twl6030.h	/^#define TWL6030_CFG_VOLTAGE_18	/;"	d
TWL6030_CFG_VOLTAGE_28	include/twl6030.h	/^#define TWL6030_CFG_VOLTAGE_28	/;"	d
TWL6030_CFG_VOLTAGE_30	include/twl6030.h	/^#define TWL6030_CFG_VOLTAGE_30	/;"	d
TWL6030_CFG_VOLTAGE_33	include/twl6030.h	/^#define TWL6030_CFG_VOLTAGE_33	/;"	d
TWL6030_CHIP_ADC	include/twl6030.h	/^#define TWL6030_CHIP_ADC	/;"	d
TWL6030_CHIP_CHARGER	include/twl6030.h	/^#define TWL6030_CHIP_CHARGER	/;"	d
TWL6030_CHIP_PM	include/twl6030.h	/^#define TWL6030_CHIP_PM	/;"	d
TWL6030_CHIP_PWM	include/twl6030.h	/^#define TWL6030_CHIP_PWM	/;"	d
TWL6030_CHIP_USB	include/twl6030.h	/^#define TWL6030_CHIP_USB	/;"	d
TWL6030_CONTROLLER_STAT1	include/twl6030.h	/^#define TWL6030_CONTROLLER_STAT1	/;"	d
TWL6030_CONTROLLER_STAT1_VAC_DET	include/twl6030.h	/^#define TWL6030_CONTROLLER_STAT1_VAC_DET	/;"	d
TWL6030_CONTROLLER_STAT1_VBUS_DET	include/twl6030.h	/^#define TWL6030_CONTROLLER_STAT1_VBUS_DET	/;"	d
TWL6030_GPADC_CTRL	include/twl6030.h	/^#define TWL6030_GPADC_CTRL	/;"	d
TWL6030_GPADC_VBAT_CHNL	include/twl6030.h	/^#define TWL6030_GPADC_VBAT_CHNL	/;"	d
TWL6030_H	include/twl6030.h	/^#define TWL6030_H$/;"	d
TWL6030_MISC2	include/twl6030.h	/^#define TWL6030_MISC2	/;"	d
TWL6030_MISC2_VUSB_IN_PMID	include/twl6030.h	/^#define TWL6030_MISC2_VUSB_IN_PMID	/;"	d
TWL6030_MISC2_VUSB_IN_VSYS	include/twl6030.h	/^#define TWL6030_MISC2_VUSB_IN_VSYS	/;"	d
TWL6030_PHOENIX_APP_DEVOFF	include/twl6030.h	/^#define TWL6030_PHOENIX_APP_DEVOFF	/;"	d
TWL6030_PHOENIX_CON_DEVOFF	include/twl6030.h	/^#define TWL6030_PHOENIX_CON_DEVOFF	/;"	d
TWL6030_PHOENIX_DEV_ON	include/twl6030.h	/^#define TWL6030_PHOENIX_DEV_ON	/;"	d
TWL6030_PHOENIX_MOD_DEVOFF	include/twl6030.h	/^#define TWL6030_PHOENIX_MOD_DEVOFF	/;"	d
TWL6030_PH_STS_BOOT	include/twl6030.h	/^#define TWL6030_PH_STS_BOOT	/;"	d
TWL6030_PH_STS_BOOT0	include/twl6030.h	/^#define TWL6030_PH_STS_BOOT0	/;"	d
TWL6030_PH_STS_BOOT1	include/twl6030.h	/^#define TWL6030_PH_STS_BOOT1	/;"	d
TWL6030_PH_STS_BOOT2	include/twl6030.h	/^#define TWL6030_PH_STS_BOOT2	/;"	d
TWL6030_PH_STS_BOOT3	include/twl6030.h	/^#define TWL6030_PH_STS_BOOT3	/;"	d
TWL6030_STS_HW_CONDITIONS	include/twl6030.h	/^#define TWL6030_STS_HW_CONDITIONS	/;"	d
TWL6030_STS_HW_CONDITIONS_PWRON	include/twl6030.h	/^#define TWL6030_STS_HW_CONDITIONS_PWRON	/;"	d
TWL6030_VAUX1_CFG_STATE	include/twl6030.h	/^#define TWL6030_VAUX1_CFG_STATE	/;"	d
TWL6030_VAUX1_CFG_VOLTAGE	include/twl6030.h	/^#define TWL6030_VAUX1_CFG_VOLTAGE	/;"	d
TWL6030_VBAT_MULT	include/twl6030.h	/^#define TWL6030_VBAT_MULT	/;"	d
TWL6030_VBAT_SHIFT	include/twl6030.h	/^#define TWL6030_VBAT_SHIFT	/;"	d
TWL6030_VMMC_CFG_STATE	include/twl6030.h	/^#define TWL6030_VMMC_CFG_STATE	/;"	d
TWL6030_VMMC_CFG_VOLTAGE	include/twl6030.h	/^#define TWL6030_VMMC_CFG_VOLTAGE	/;"	d
TWL6030_VUSB_CFG_STATE	include/twl6030.h	/^#define TWL6030_VUSB_CFG_STATE	/;"	d
TWL6030_VUSB_CFG_VOLTAGE	include/twl6030.h	/^#define TWL6030_VUSB_CFG_VOLTAGE	/;"	d
TWL6032_CTRL_P1	include/twl6030.h	/^#define TWL6032_CTRL_P1	/;"	d
TWL6032_GPADC_CTRL2	include/twl6030.h	/^#define TWL6032_GPADC_CTRL2	/;"	d
TWL6032_GPADC_VBAT_CHNL	include/twl6030.h	/^#define TWL6032_GPADC_VBAT_CHNL	/;"	d
TWL6032_GPCH0_LSB	include/twl6030.h	/^#define TWL6032_GPCH0_LSB	/;"	d
TWL6032_GPSELECT_ISB	include/twl6030.h	/^#define TWL6032_GPSELECT_ISB	/;"	d
TWL6032_VBAT_MULT	include/twl6030.h	/^#define TWL6032_VBAT_MULT	/;"	d
TWL6032_VBAT_SHIFT	include/twl6030.h	/^#define TWL6032_VBAT_SHIFT	/;"	d
TWL603X_CHIP_P1	include/palmas.h	/^#define TWL603X_CHIP_P1	/;"	d
TWL603X_CHIP_P2	include/palmas.h	/^#define TWL603X_CHIP_P2	/;"	d
TWL603X_CHIP_P3	include/palmas.h	/^#define TWL603X_CHIP_P3	/;"	d
TWLMRD_DELAY	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define TWLMRD_DELAY /;"	d
TWOD	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TWOD	/;"	d
TWOD_ACE_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define TWOD_ACE_BASE_ADDR	/;"	d
TWOD_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define TWOD_P	/;"	d
TWO_ROW_ADDRESS_CYCLES	drivers/mtd/nand/denali.h	/^#define TWO_ROW_ADDRESS_CYCLES /;"	d
TWO_ROW_ADDR_CYCLES	drivers/mtd/nand/denali.h	/^#define TWO_ROW_ADDR_CYCLES	/;"	d
TWO_ROW_ADDR_CYCLES__FLAG	drivers/mtd/nand/denali.h	/^#define     TWO_ROW_ADDR_CYCLES__FLAG	/;"	d
TWR_1	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TWR_1	/;"	d
TWR_2	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TWR_2	/;"	d
TWR_3	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define TWR_3	/;"	d
TWSI_DATA_ADDR_MASK	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define TWSI_DATA_ADDR_MASK	/;"	d
TWSI_DATA_ADDR_MASK	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define TWSI_DATA_ADDR_MASK	/;"	d
TWSI_DATA_ADDR_OFFS	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define TWSI_DATA_ADDR_OFFS	/;"	d
TWSI_DATA_ADDR_OFFS	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define TWSI_DATA_ADDR_OFFS	/;"	d
TWS_CE	include/configs/inka4x0.h	/^#define TWS_CE	/;"	d
TWS_CLK	include/configs/inka4x0.h	/^#define TWS_CLK	/;"	d
TWS_DATA	include/configs/inka4x0.h	/^#define TWS_DATA	/;"	d
TWS_IMPLEMENTATION	drivers/twserial/soft_tws.c	/^#define TWS_IMPLEMENTATION$/;"	d	file:
TWS_WR	include/configs/inka4x0.h	/^#define TWS_WR	/;"	d
TX	drivers/net/macb.c	/^#define TX	/;"	d	file:
TX	drivers/usb/musb/musb_udc.c	/^	TX,$/;"	e	enum:ep0_state_enum	file:
TX0CP	drivers/net/davinci_emac.h	/^	dv_reg		TX0CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX0HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX0HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,$/;"	e	enum:__anona3077f190103	file:
TX0_E_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX0_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX0_GMARK,$/;"	e	enum:__anona307945e0103	file:
TX0_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX0_IMARK,$/;"	e	enum:__anona307945e0103	file:
TX0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,$/;"	e	enum:__anona3077f190103	file:
TX0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,$/;"	e	enum:__anona307879b0103	file:
TX10MIDLE_EN	drivers/usb/eth/r8152.h	/^#define TX10MIDLE_EN	/;"	d
TX1CP	drivers/net/davinci_emac.h	/^	dv_reg		TX1CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX1HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX1HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX1_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX1_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
TX1_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX1_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
TX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
TX1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,$/;"	e	enum:__anona3077f190103	file:
TX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TX1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX1_D_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
TX1_E_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,$/;"	e	enum:__anona3077f190103	file:
TX1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,$/;"	e	enum:__anona3077f190103	file:
TX1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,$/;"	e	enum:__anona307879b0103	file:
TX2CP	drivers/net/davinci_emac.h	/^	dv_reg		TX2CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX2HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX2HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX2_A_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX2_A_GMARK,$/;"	e	enum:__anona307945e0103	file:
TX2_A_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX2_A_IMARK,$/;"	e	enum:__anona307945e0103	file:
TX2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TX2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,$/;"	e	enum:__anona307879b0103	file:
TX2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX39_CONF_CWFON	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_CWFON	/;"	d
TX39_CONF_DCE	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCE	/;"	d
TX39_CONF_DCS_16KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_16KB	/;"	d
TX39_CONF_DCS_1KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_1KB	/;"	d
TX39_CONF_DCS_2KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_2KB	/;"	d
TX39_CONF_DCS_4KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_4KB	/;"	d
TX39_CONF_DCS_8KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_8KB	/;"	d
TX39_CONF_DCS_MASK	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_MASK	/;"	d
TX39_CONF_DCS_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DCS_SHIFT	/;"	d
TX39_CONF_DOZE	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DOZE	/;"	d
TX39_CONF_DRSIZE_MASK	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DRSIZE_MASK	/;"	d
TX39_CONF_DRSIZE_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_DRSIZE_SHIFT	/;"	d
TX39_CONF_HALT	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_HALT	/;"	d
TX39_CONF_ICE	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICE	/;"	d
TX39_CONF_ICS_16KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_16KB	/;"	d
TX39_CONF_ICS_1KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_1KB	/;"	d
TX39_CONF_ICS_2KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_2KB	/;"	d
TX39_CONF_ICS_4KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_4KB	/;"	d
TX39_CONF_ICS_8KB	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_8KB	/;"	d
TX39_CONF_ICS_MASK	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_MASK	/;"	d
TX39_CONF_ICS_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_ICS_SHIFT	/;"	d
TX39_CONF_IRSIZE_MASK	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_IRSIZE_MASK	/;"	d
TX39_CONF_IRSIZE_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_IRSIZE_SHIFT	/;"	d
TX39_CONF_LOCK	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_LOCK	/;"	d
TX39_CONF_RF_MASK	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_RF_MASK	/;"	d
TX39_CONF_RF_SHIFT	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_RF_SHIFT	/;"	d
TX39_CONF_WBON	arch/mips/include/asm/mipsregs.h	/^#define TX39_CONF_WBON	/;"	d
TX3CP	drivers/net/davinci_emac.h	/^	dv_reg		TX3CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX3HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX3HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TX3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TX3_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SCIFA5_TXD_B_MARK, TX3_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	TX3_MARK, DREQ1_MARK, RX3_MARK,$/;"	e	enum:__anona307879b0103	file:
TX49_CONF_CWFON	arch/mips/include/asm/mipsregs.h	/^#define TX49_CONF_CWFON	/;"	d
TX49_CONF_DC	arch/mips/include/asm/mipsregs.h	/^#define TX49_CONF_DC	/;"	d
TX49_CONF_HALT	arch/mips/include/asm/mipsregs.h	/^#define TX49_CONF_HALT	/;"	d
TX49_CONF_IC	arch/mips/include/asm/mipsregs.h	/^#define TX49_CONF_IC	/;"	d
TX4CP	drivers/net/davinci_emac.h	/^	dv_reg		TX4CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX4HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX4HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
TX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	TX4_B_MARK, SCIFA4_TXD_B_MARK,$/;"	e	enum:__anona307835a0103	file:
TX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	TX4_B_MARK, SCIFA4_TXD_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
TX4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX4_C_MARK,$/;"	e	enum:__anona307945e0103	file:
TX4_D	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^#define TX4_D	/;"	d	file:
TX5CP	drivers/net/davinci_emac.h	/^	dv_reg		TX5CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX5HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX5HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
TX5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	TX5_MARK,$/;"	e	enum:__anona307945e0103	file:
TX6CP	drivers/net/davinci_emac.h	/^	dv_reg		TX6CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX6HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX6HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX7CP	drivers/net/davinci_emac.h	/^	dv_reg		TX7CP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TX7HDP	drivers/net/davinci_emac.h	/^	dv_reg		TX7HDP;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXBCASTFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		TXBCASTFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXBD_CRC	include/tsec.h	/^#define TXBD_CRC	/;"	d
TXBD_DEF	include/tsec.h	/^#define TXBD_DEF	/;"	d
TXBD_HUGEFRAME	include/tsec.h	/^#define TXBD_HUGEFRAME	/;"	d
TXBD_INTERRUPT	include/tsec.h	/^#define TXBD_INTERRUPT	/;"	d
TXBD_LAST	include/tsec.h	/^#define TXBD_LAST	/;"	d
TXBD_LATECOLLISION	include/tsec.h	/^#define TXBD_LATECOLLISION	/;"	d
TXBD_PADCRC	include/tsec.h	/^#define TXBD_PADCRC	/;"	d
TXBD_READY	include/tsec.h	/^#define TXBD_READY	/;"	d
TXBD_RETRYCOUNTMASK	include/tsec.h	/^#define TXBD_RETRYCOUNTMASK	/;"	d
TXBD_RETRYLIMIT	include/tsec.h	/^#define TXBD_RETRYLIMIT	/;"	d
TXBD_STATS	include/tsec.h	/^#define TXBD_STATS	/;"	d
TXBD_UNDERRUN	include/tsec.h	/^#define TXBD_UNDERRUN	/;"	d
TXBD_WRAP	include/tsec.h	/^#define TXBD_WRAP	/;"	d
TXBS	drivers/net/ax88180.h	/^#define TXBS	/;"	d
TXBUFFER_START	drivers/net/ax88180.h	/^#define TXBUFFER_START	/;"	d
TXBUF_BASE_ADDR	drivers/net/bfin_mac.c	/^#define TXBUF_BASE_ADDR	/;"	d	file:
TXBUF_EXHAUSTED	drivers/net/macb.c	/^#define TXBUF_EXHAUSTED	/;"	d	file:
TXBUF_FRAME_END	drivers/net/macb.c	/^#define TXBUF_FRAME_END	/;"	d	file:
TXBUF_FRMLEN_MASK	drivers/net/macb.c	/^#define TXBUF_FRMLEN_MASK	/;"	d	file:
TXBUF_MAXRETRY	drivers/net/macb.c	/^#define TXBUF_MAXRETRY	/;"	d	file:
TXBUF_NOCRC	drivers/net/macb.c	/^#define TXBUF_NOCRC	/;"	d	file:
TXBUF_UNDERRUN	drivers/net/macb.c	/^#define TXBUF_UNDERRUN	/;"	d	file:
TXBUF_USED	drivers/net/macb.c	/^#define TXBUF_USED	/;"	d	file:
TXBUF_WRAP	drivers/net/macb.c	/^#define TXBUF_WRAP	/;"	d	file:
TXCARRIERSENSE	drivers/net/davinci_emac.h	/^	dv_reg		TXCARRIERSENSE;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXCFG	drivers/net/ax88180.h	/^#define TXCFG	/;"	d
TXCLK_DLY_ENA_GMAC_DISABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	TXCLK_DLY_ENA_GMAC_DISABLE	= 0,$/;"	e	enum:__anonbeb2b9771403
TXCLK_DLY_ENA_GMAC_ENABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	TXCLK_DLY_ENA_GMAC_ENABLE,$/;"	e	enum:__anonbeb2b9771403
TXCLK_DLY_ENA_GMAC_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	TXCLK_DLY_ENA_GMAC_MASK		= 1,$/;"	e	enum:__anonbeb2b9771403
TXCLK_DLY_ENA_GMAC_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	TXCLK_DLY_ENA_GMAC_SHIFT	= 0xe,$/;"	e	enum:__anonbeb2b9771403
TXCMD	drivers/net/ax88180.h	/^#define TXCMD	/;"	d
TXCMD_TXDP0	drivers/net/ax88180.h	/^  #define TXCMD_TXDP0	/;"	d
TXCMD_TXDP1	drivers/net/ax88180.h	/^  #define TXCMD_TXDP1	/;"	d
TXCMD_TXDP2	drivers/net/ax88180.h	/^  #define TXCMD_TXDP2	/;"	d
TXCMD_TXDP3	drivers/net/ax88180.h	/^  #define TXCMD_TXDP3	/;"	d
TXCMD_TXDP_MASK	drivers/net/ax88180.h	/^  #define TXCMD_TXDP_MASK	/;"	d
TXCOL	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define TXCOL	/;"	d
TXCOLLISION	drivers/net/davinci_emac.h	/^	dv_reg		TXCOLLISION;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXCONTROL	drivers/net/davinci_emac.h	/^	dv_reg		TXCONTROL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXCR_FTXQ	drivers/net/ks8851_mll.h	/^#define TXCR_FTXQ	/;"	d
TXCR_TCGICMP	drivers/net/ks8851_mll.h	/^#define TXCR_TCGICMP	/;"	d
TXCR_TCGIP	drivers/net/ks8851_mll.h	/^#define TXCR_TCGIP	/;"	d
TXCR_TCGTCP	drivers/net/ks8851_mll.h	/^#define TXCR_TCGTCP	/;"	d
TXCR_TCGUDP	drivers/net/ks8851_mll.h	/^#define TXCR_TCGUDP	/;"	d
TXCR_TXCRC	drivers/net/ks8851_mll.h	/^#define TXCR_TXCRC	/;"	d
TXCR_TXE	drivers/net/ks8851_mll.h	/^#define TXCR_TXE	/;"	d
TXCR_TXFCE	drivers/net/ks8851_mll.h	/^#define TXCR_TXFCE	/;"	d
TXCR_TXPE	drivers/net/ks8851_mll.h	/^#define TXCR_TXPE	/;"	d
TXCTL_DEFDIS	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_DEFDIS	/;"	d
TXCTL_ICRC	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_ICRC	/;"	d
TXCTL_MBE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_MBE	/;"	d
TXCTL_OCOLL	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_OCOLL	/;"	d
TXCTL_PB	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_PB	/;"	d
TXCTL_SP	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_SP	/;"	d
TXCTL_STXON	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_STXON	/;"	d
TXCTL_TPD	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define TXCTL_TPD	/;"	d
TXDEFERRED	drivers/net/davinci_emac.h	/^	dv_reg		TXDEFERRED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXDES0	drivers/net/ax88180.h	/^#define TXDES0	/;"	d
TXDES1	drivers/net/ax88180.h	/^#define TXDES1	/;"	d
TXDES2	drivers/net/ax88180.h	/^#define TXDES2	/;"	d
TXDES3	drivers/net/ax88180.h	/^#define TXDES3	/;"	d
TXDESC_2ND_ADDR_CHAINED	drivers/net/calxedaxgmac.c	/^#define TXDESC_2ND_ADDR_CHAINED	/;"	d	file:
TXDESC_CRC_EN_APPEND	drivers/net/calxedaxgmac.c	/^#define TXDESC_CRC_EN_APPEND	/;"	d	file:
TXDESC_CRC_EN_REPLACE	drivers/net/calxedaxgmac.c	/^#define TXDESC_CRC_EN_REPLACE	/;"	d	file:
TXDESC_CSUM_ALL	drivers/net/calxedaxgmac.c	/^#define TXDESC_CSUM_ALL	/;"	d	file:
TXDESC_CSUM_IP	drivers/net/calxedaxgmac.c	/^#define TXDESC_CSUM_IP	/;"	d	file:
TXDESC_CSUM_IP_PAYLD	drivers/net/calxedaxgmac.c	/^#define TXDESC_CSUM_IP_PAYLD	/;"	d	file:
TXDESC_DISABLE_PAD	drivers/net/calxedaxgmac.c	/^#define TXDESC_DISABLE_PAD	/;"	d	file:
TXDESC_END_RING	drivers/net/calxedaxgmac.c	/^#define TXDESC_END_RING	/;"	d	file:
TXDESC_ERROR_SUMMARY	drivers/net/calxedaxgmac.c	/^#define TXDESC_ERROR_SUMMARY	/;"	d	file:
TXDESC_FIRST_SEG	drivers/net/calxedaxgmac.c	/^#define TXDESC_FIRST_SEG	/;"	d	file:
TXDESC_FRAME_FLUSHED	drivers/net/calxedaxgmac.c	/^#define TXDESC_FRAME_FLUSHED	/;"	d	file:
TXDESC_INTERRUPT	drivers/net/calxedaxgmac.c	/^#define TXDESC_INTERRUPT	/;"	d	file:
TXDESC_IP_HEADER_ERR	drivers/net/calxedaxgmac.c	/^#define TXDESC_IP_HEADER_ERR	/;"	d	file:
TXDESC_JABBER_TIMEOUT	drivers/net/calxedaxgmac.c	/^#define TXDESC_JABBER_TIMEOUT	/;"	d	file:
TXDESC_LAST_SEG	drivers/net/calxedaxgmac.c	/^#define TXDESC_LAST_SEG	/;"	d	file:
TXDESC_LOCAL_FAULT	drivers/net/calxedaxgmac.c	/^#define TXDESC_LOCAL_FAULT	/;"	d	file:
TXDESC_PAYLOAD_CSUM_ERR	drivers/net/calxedaxgmac.c	/^#define TXDESC_PAYLOAD_CSUM_ERR	/;"	d	file:
TXDESC_REMOTE_FAULT	drivers/net/calxedaxgmac.c	/^#define TXDESC_REMOTE_FAULT	/;"	d	file:
TXDESC_SA_CTRL_INSERT	drivers/net/calxedaxgmac.c	/^#define TXDESC_SA_CTRL_INSERT	/;"	d	file:
TXDESC_SA_CTRL_REPLACE	drivers/net/calxedaxgmac.c	/^#define TXDESC_SA_CTRL_REPLACE	/;"	d	file:
TXDESC_UNDERFLOW_ERR	drivers/net/calxedaxgmac.c	/^#define TXDESC_UNDERFLOW_ERR	/;"	d	file:
TXDESC_VLAN_FRAME	drivers/net/calxedaxgmac.c	/^#define TXDESC_VLAN_FRAME	/;"	d	file:
TXDIS_STATE	drivers/usb/eth/r8152.h	/^#define TXDIS_STATE	/;"	d
TXDMAERR	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TXDMAERR	/;"	d
TXDP0	drivers/net/ax88180.h	/^#define TXDP0	/;"	d
TXDP0_USED	drivers/net/ax88180.h	/^  #define TXDP0_USED	/;"	d
TXDP1	drivers/net/ax88180.h	/^#define TXDP1	/;"	d
TXDP1_USED	drivers/net/ax88180.h	/^  #define TXDP1_USED	/;"	d
TXDP2	drivers/net/ax88180.h	/^#define TXDP2	/;"	d
TXDP2_USED	drivers/net/ax88180.h	/^  #define TXDP2_USED	/;"	d
TXDP3	drivers/net/ax88180.h	/^#define TXDP3	/;"	d
TXDP3_USED	drivers/net/ax88180.h	/^  #define TXDP3_USED	/;"	d
TXDP_MASK	drivers/net/ax88180.h	/^#define TXDP_MASK	/;"	d
TXDPx_ENABLE	drivers/net/ax88180.h	/^  #define TXDPx_ENABLE	/;"	d
TXDPx_LEN_MASK	drivers/net/ax88180.h	/^  #define TXDPx_LEN_MASK	/;"	d
TXE	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define TXE	/;"	d
TXEN	drivers/net/ax88180.h	/^  #define TXEN	/;"	d
TXENABLE	drivers/net/calxedaxgmac.c	/^#define TXENABLE	/;"	d	file:
TXENABLE	drivers/net/designware.h	/^#define TXENABLE	/;"	d
TXEXCESSIVECOLL	drivers/net/davinci_emac.h	/^	dv_reg		TXEXCESSIVECOLL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXE_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define TXE_DEV	/;"	d
TXFAILCNT	drivers/net/ax88180.h	/^#define TXFAILCNT	/;"	d
TXFCR_FIFO_EN_MASK	drivers/i2c/kona_i2c.c	/^#define TXFCR_FIFO_EN_MASK	/;"	d	file:
TXFCR_FIFO_FLUSH_MASK	drivers/i2c/kona_i2c.c	/^#define TXFCR_FIFO_FLUSH_MASK	/;"	d	file:
TXFCR_OFFSET	drivers/i2c/kona_i2c.c	/^#define TXFCR_OFFSET	/;"	d	file:
TXFDPR_TXFPAI	drivers/net/ks8851_mll.h	/^#define TXFDPR_TXFPAI	/;"	d
TXFDPR_TXFP_MASK	drivers/net/ks8851_mll.h	/^#define TXFDPR_TXFP_MASK	/;"	d
TXFDPR_TXFP_SHIFT	drivers/net/ks8851_mll.h	/^#define TXFDPR_TXFP_SHIFT	/;"	d
TXFIFOTHRESH	include/usb/ehci-ci.h	/^#define TXFIFOTHRESH	/;"	d
TXFIFO_EMPTY	drivers/usb/eth/r8152.h	/^#define TXFIFO_EMPTY	/;"	d
TXFIFO_REG	drivers/net/smc91111.h	/^#define TXFIFO_REG	/;"	d
TXFIFO_TEMPTY	drivers/net/smc91111.h	/^#define TXFIFO_TEMPTY	/;"	d
TXFIFO_THRESH	drivers/usb/host/ehci.h	/^#define TXFIFO_THRESH(/;"	d
TXFIFO_THRESH_MASK	drivers/usb/host/ehci.h	/^#define TXFIFO_THRESH_MASK	/;"	d
TXFIFO_THR_NORMAL	drivers/usb/eth/r8152.h	/^#define TXFIFO_THR_NORMAL	/;"	d
TXFIFO_THR_NORMAL2	drivers/usb/eth/r8152.h	/^#define TXFIFO_THR_NORMAL2	/;"	d
TXFLOW_ENABLE	drivers/net/ax88180.h	/^  #define TXFLOW_ENABLE	/;"	d
TXFR_TXFID_MASK	drivers/net/ks8851_mll.h	/^#define TXFR_TXFID_MASK	/;"	d
TXFR_TXFID_SHIFT	drivers/net/ks8851_mll.h	/^#define TXFR_TXFID_SHIFT	/;"	d
TXFR_TXIC	drivers/net/ks8851_mll.h	/^#define TXFR_TXIC	/;"	d
TXFSINT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TXFSINT	/;"	d
TXGOODFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		TXGOODFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXIDVER	drivers/net/davinci_emac.h	/^	dv_reg		TXIDVER;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXINTMASKCLEAR	drivers/net/davinci_emac.h	/^	dv_reg		TXINTMASKCLEAR;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXINTMASKSET	drivers/net/davinci_emac.h	/^	dv_reg		TXINTMASKSET;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXINTSTATMASKED	drivers/net/davinci_emac.h	/^	dv_reg		TXINTSTATMASKED;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXINTSTATRAW	drivers/net/davinci_emac.h	/^	dv_reg		TXINTSTATRAW;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXLATECOLL	drivers/net/davinci_emac.h	/^	dv_reg		TXLATECOLL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXLEN	drivers/net/ax88180.h	/^#define TXLEN	/;"	d
TXMCASTFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		TXMCASTFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXMULTICOLL	drivers/net/davinci_emac.h	/^	dv_reg		TXMULTICOLL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXOCTETS	drivers/net/davinci_emac.h	/^	dv_reg		TXOCTETS;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXPAUSE	drivers/net/davinci_emac.h	/^	dv_reg		TXPAUSE;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXPAUSEFRAMES	drivers/net/davinci_emac.h	/^	dv_reg		TXPAUSEFRAMES;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXPAUT	drivers/net/ax88180.h	/^#define TXPAUT	/;"	d
TXPKTRDY	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define TXPKTRDY	/;"	d
TXPKTRDY_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define TXPKTRDY_T	/;"	d
TXQ	drivers/net/armada100_fec.h	/^#define TXQ	/;"	d
TXQCR_AETFE	drivers/net/ks8851_mll.h	/^#define TXQCR_AETFE	/;"	d
TXQCR_METFE	drivers/net/ks8851_mll.h	/^#define TXQCR_METFE	/;"	d
TXQCR_TXQMAM	drivers/net/ks8851_mll.h	/^#define TXQCR_TXQMAM	/;"	d
TXS	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define TXS	/;"	d
TXSECONDFRAME	drivers/net/designware.h	/^#define TXSECONDFRAME	/;"	d
TXSINGLECOLL	drivers/net/davinci_emac.h	/^	dv_reg		TXSINGLECOLL;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXSR_TXFID_GET	drivers/net/ks8851_mll.h	/^#define TXSR_TXFID_GET(/;"	d
TXSR_TXFID_MASK	drivers/net/ks8851_mll.h	/^#define TXSR_TXFID_MASK	/;"	d
TXSR_TXFID_SHIFT	drivers/net/ks8851_mll.h	/^#define TXSR_TXFID_SHIFT	/;"	d
TXSR_TXLC	drivers/net/ks8851_mll.h	/^#define TXSR_TXLC	/;"	d
TXSR_TXMC	drivers/net/ks8851_mll.h	/^#define TXSR_TXMC	/;"	d
TXST	drivers/net/ax88180.h	/^#define TXST	/;"	d
TXSTART	drivers/net/calxedaxgmac.c	/^#define TXSTART	/;"	d	file:
TXSTART	drivers/net/designware.h	/^#define TXSTART	/;"	d
TXSTARTMAX	drivers/net/ep93xx_eth.h	/^#define TXSTARTMAX	/;"	d
TXTEARDOWN	drivers/net/davinci_emac.h	/^	dv_reg		TXTEARDOWN;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXTL	drivers/serial/serial_mxc.c	/^#define TXTL /;"	d	file:
TXUNDERRUN	drivers/net/davinci_emac.h	/^	dv_reg		TXUNDERRUN;$/;"	m	struct:__anon759824920108	typeref:typename:dv_reg
TXUQ	drivers/net/mvgbe.h	/^#define TXUQ	/;"	d
TXZLP_EP	include/usb/fotg210.h	/^#define TXZLP_EP(/;"	d
TX_10M_IDLE_EN	drivers/usb/eth/r8152.h	/^#define TX_10M_IDLE_EN	/;"	d
TX_ABORTC_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_ABORTC_CNT	/;"	d
TX_ABORT_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_ABORT_CNT	/;"	d
TX_ACT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                    TX_ACT /;"	d
TX_ACT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               TX_ACT_MASK /;"	d
TX_AGG_MAX_THRESHOLD	drivers/usb/eth/r8152.h	/^#define TX_AGG_MAX_THRESHOLD	/;"	d
TX_ALIGN	drivers/usb/eth/r8152.h	/^#define TX_ALIGN	/;"	d
TX_ALLF_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_ALLF_CNT	/;"	d
TX_ALLO_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_ALLO_CNT	/;"	d
TX_BAD_FCS_CNT	drivers/net/dnet.h	/^	u32 TX_BAD_FCS_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_BASE	drivers/net/ax88180.h	/^  #define TX_BASE	/;"	d
TX_BD_CNF	include/usb/mpc8xx_udc.h	/^#define TX_BD_CNF	/;"	d
TX_BD_CRC	drivers/net/ethoc.c	/^#define	TX_BD_CRC	/;"	d	file:
TX_BD_CS	drivers/net/ethoc.c	/^#define	TX_BD_CS	/;"	d	file:
TX_BD_DF	drivers/net/ethoc.c	/^#define	TX_BD_DF	/;"	d	file:
TX_BD_I	include/usb/mpc8xx_udc.h	/^#define TX_BD_I	/;"	d
TX_BD_IRQ	drivers/net/ethoc.c	/^#define	TX_BD_IRQ	/;"	d	file:
TX_BD_L	include/usb/mpc8xx_udc.h	/^#define TX_BD_L	/;"	d
TX_BD_LC	drivers/net/ethoc.c	/^#define	TX_BD_LC	/;"	d	file:
TX_BD_LEN	drivers/net/ethoc.c	/^#define	TX_BD_LEN(/;"	d	file:
TX_BD_LEN_MASK	drivers/net/ethoc.c	/^#define	TX_BD_LEN_MASK	/;"	d	file:
TX_BD_NO_PID	include/usb/mpc8xx_udc.h	/^#define TX_BD_NO_PID	/;"	d
TX_BD_NUM	drivers/net/ethoc.c	/^#define	TX_BD_NUM	/;"	d	file:
TX_BD_NUM_VAL	drivers/net/ethoc.c	/^#define	TX_BD_NUM_VAL(/;"	d	file:
TX_BD_PAD	drivers/net/ethoc.c	/^#define	TX_BD_PAD	/;"	d	file:
TX_BD_PID_DATA0	include/usb/mpc8xx_udc.h	/^#define TX_BD_PID_DATA0	/;"	d
TX_BD_PID_DATA1	include/usb/mpc8xx_udc.h	/^#define TX_BD_PID_DATA1	/;"	d
TX_BD_R	include/usb/mpc8xx_udc.h	/^#define TX_BD_R	/;"	d
TX_BD_READY	drivers/net/ethoc.c	/^#define	TX_BD_READY	/;"	d	file:
TX_BD_RETRY	drivers/net/ethoc.c	/^#define	TX_BD_RETRY(/;"	d	file:
TX_BD_RETRY_MASK	drivers/net/ethoc.c	/^#define	TX_BD_RETRY_MASK	/;"	d	file:
TX_BD_RING_SIZE	drivers/net/fm/fm.h	/^#define TX_BD_RING_SIZE	/;"	d
TX_BD_RL	drivers/net/ethoc.c	/^#define	TX_BD_RL	/;"	d	file:
TX_BD_STATS	drivers/net/ethoc.c	/^#define	TX_BD_STATS	/;"	d	file:
TX_BD_TC	include/usb/mpc8xx_udc.h	/^#define TX_BD_TC	/;"	d
TX_BD_TO	include/usb/mpc8xx_udc.h	/^#define TX_BD_TO	/;"	d
TX_BD_UN	include/usb/mpc8xx_udc.h	/^#define TX_BD_UN	/;"	d
TX_BD_UR	drivers/net/ethoc.c	/^#define	TX_BD_UR	/;"	d	file:
TX_BD_W	include/usb/mpc8xx_udc.h	/^#define TX_BD_W	/;"	d
TX_BD_WRAP	drivers/net/ethoc.c	/^#define	TX_BD_WRAP	/;"	d	file:
TX_BRDCAST_CNT	drivers/net/dnet.h	/^	u32 TX_BRDCAST_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_BROAD	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_BROAD	/;"	d
TX_BROAD_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_BROAD_CNT	/;"	d
TX_BUFFER_SIZE	drivers/spi/fsl_qspi.c	/^#define TX_BUFFER_SIZE	/;"	d	file:
TX_BUF_ALLOC	drivers/net/uli526x.c	/^#define TX_BUF_ALLOC	/;"	d	file:
TX_BUF_CNT	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define TX_BUF_CNT /;"	d	file:
TX_BUF_CNT	arch/powerpc/cpu/mpc8260/ether_scc.c	/^#define TX_BUF_CNT /;"	d	file:
TX_BUF_CNT	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define TX_BUF_CNT /;"	d	file:
TX_BUF_CNT	arch/powerpc/cpu/mpc8xx/fec.c	/^#define TX_BUF_CNT /;"	d	file:
TX_BUF_CNT	arch/powerpc/cpu/mpc8xx/scc.c	/^#define TX_BUF_CNT /;"	d	file:
TX_BUF_CNT	drivers/net/bfin_mac.c	/^#define TX_BUF_CNT	/;"	d	file:
TX_BUF_CNT	drivers/net/mcffec.c	/^#define TX_BUF_CNT	/;"	d	file:
TX_BUF_CNT	drivers/net/xilinx_ll_temac_sdma.c	/^#define TX_BUF_CNT	/;"	d	file:
TX_BUF_CNT	include/tsec.h	/^#define TX_BUF_CNT	/;"	d
TX_BUF_CNT	post/cpu/mpc8xx/ether.c	/^#define TX_BUF_CNT /;"	d	file:
TX_BUF_COUNT	drivers/net/lpc32xx_eth.c	/^#define TX_BUF_COUNT /;"	d	file:
TX_BUF_NUM	drivers/net/bcm-sf2-eth.h	/^#define TX_BUF_NUM	/;"	d
TX_BUF_SIZE	drivers/net/ax88180.h	/^  #define TX_BUF_SIZE	/;"	d
TX_BUF_SIZE	drivers/net/bcm-sf2-eth.h	/^#define TX_BUF_SIZE	/;"	d
TX_BUF_SIZE	drivers/net/ks8851_mll.c	/^#define TX_BUF_SIZE	/;"	d	file:
TX_BUF_SIZE	drivers/net/natsemi.c	/^#define TX_BUF_SIZE	/;"	d	file:
TX_BUF_SIZE	drivers/net/ns8382x.c	/^#define TX_BUF_SIZE /;"	d	file:
TX_BUF_SIZE	drivers/net/rtl8139.c	/^#define TX_BUF_SIZE	/;"	d	file:
TX_BUF_SZ	drivers/net/calxedaxgmac.c	/^#define TX_BUF_SZ	/;"	d	file:
TX_BYTE_CNT	drivers/net/dnet.h	/^	u32 TX_BYTE_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_CCNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_CCNT	/;"	d
TX_CFG	drivers/net/smc911x.h	/^#define TX_CFG	/;"	d
TX_CFG	drivers/usb/eth/smsc95xx.c	/^#define TX_CFG	/;"	d	file:
TX_CFG_ON_	drivers/usb/eth/smsc95xx.c	/^#define TX_CFG_ON_	/;"	d	file:
TX_CFG_STOP_TX	drivers/net/smc911x.h	/^#define	TX_CFG_STOP_TX	/;"	d
TX_CFG_TXD_DUMP	drivers/net/smc911x.h	/^#define	TX_CFG_TXD_DUMP	/;"	d
TX_CFG_TXSAO	drivers/net/smc911x.h	/^#define	TX_CFG_TXSAO	/;"	d
TX_CFG_TXS_DUMP	drivers/net/smc911x.h	/^#define	TX_CFG_TXS_DUMP	/;"	d
TX_CFG_TX_ON	drivers/net/smc911x.h	/^#define	TX_CFG_TX_ON	/;"	d
TX_CHECK	drivers/net/sh_eth.h	/^# define TX_CHECK /;"	d
TX_CHNL_CTRL	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_CHNL_CTRL,		\/* TX Channel Control *\/$/;"	e	enum:dmac_ctrl
TX_CHNL_STS	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_CHNL_STS,		\/* TX Status Register *\/$/;"	e	enum:dmac_ctrl
TX_CLK	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	TX_CLK,$/;"	e	enum:srds_prtcl
TX_CMD_A_BUF_SIZE	drivers/net/smc911x.h	/^#define	TX_CMD_A_BUF_SIZE	/;"	d
TX_CMD_A_FIRST_SEG_	drivers/usb/eth/smsc95xx.c	/^#define TX_CMD_A_FIRST_SEG_	/;"	d	file:
TX_CMD_A_INT_16_BYTE_ALGN	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_16_BYTE_ALGN	/;"	d
TX_CMD_A_INT_32_BYTE_ALGN	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_32_BYTE_ALGN	/;"	d
TX_CMD_A_INT_4_BYTE_ALGN	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_4_BYTE_ALGN	/;"	d
TX_CMD_A_INT_BUF_END_ALGN	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_BUF_END_ALGN	/;"	d
TX_CMD_A_INT_DATA_OFFSET	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_DATA_OFFSET	/;"	d
TX_CMD_A_INT_FIRST_SEG	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_FIRST_SEG	/;"	d
TX_CMD_A_INT_LAST_SEG	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_LAST_SEG	/;"	d
TX_CMD_A_INT_ON_COMP	drivers/net/smc911x.h	/^#define	TX_CMD_A_INT_ON_COMP	/;"	d
TX_CMD_A_LAST_SEG_	drivers/usb/eth/smsc95xx.c	/^#define TX_CMD_A_LAST_SEG_	/;"	d	file:
TX_CMD_B_ADD_CRC_DISABLE	drivers/net/smc911x.h	/^#define	TX_CMD_B_ADD_CRC_DISABLE	/;"	d
TX_CMD_B_DISABLE_PADDING	drivers/net/smc911x.h	/^#define	TX_CMD_B_DISABLE_PADDING	/;"	d
TX_CMD_B_PKT_BYTE_LENGTH	drivers/net/smc911x.h	/^#define	TX_CMD_B_PKT_BYTE_LENGTH	/;"	d
TX_CMD_B_PKT_TAG	drivers/net/smc911x.h	/^#define	TX_CMD_B_PKT_TAG	/;"	d
TX_COLL_CNT_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_COLL_CNT_MASK /;"	d
TX_COMP	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_COMP	/;"	d
TX_CONFIG_CHP	drivers/net/tsi108_eth.c	/^#define TX_CONFIG_CHP	/;"	d	file:
TX_CONFIG_EHP	drivers/net/tsi108_eth.c	/^#define TX_CONFIG_EHP	/;"	d	file:
TX_CONFIG_RST	drivers/net/tsi108_eth.c	/^#define TX_CONFIG_RST	/;"	d	file:
TX_CONFIG_START_Q	drivers/net/tsi108_eth.c	/^#define TX_CONFIG_START_Q	/;"	d	file:
TX_CONTROL_ABT	drivers/net/tsi108_eth.c	/^#define TX_CONTROL_ABT	/;"	d	file:
TX_CONTROL_EAI	drivers/net/tsi108_eth.c	/^#define TX_CONTROL_EAI	/;"	d	file:
TX_CONTROL_EII	drivers/net/tsi108_eth.c	/^#define TX_CONTROL_EII	/;"	d	file:
TX_CONTROL_GO	drivers/net/tsi108_eth.c	/^#define TX_CONTROL_GO	/;"	d	file:
TX_CONTROL_MP	drivers/net/tsi108_eth.c	/^#define TX_CONTROL_MP	/;"	d	file:
TX_COUNT	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define TX_COUNT	/;"	d
TX_CRS	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_CRS	/;"	d
TX_CRS_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_CRS_CNT	/;"	d
TX_CTRL_LAST	drivers/net/lpc32xx_eth.c	/^#define TX_CTRL_LAST /;"	d	file:
TX_CTRL_TXSIZE	drivers/net/lpc32xx_eth.c	/^#define TX_CTRL_TXSIZE /;"	d	file:
TX_CUR1_1X	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR1_1X	/;"	d
TX_CUR1_2X	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define TX_CUR1_2X	/;"	d
TX_CUR1_2X	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR1_2X	/;"	d
TX_CUR1_3X	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR1_3X	/;"	d
TX_CURBUF_ADDR	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_CURBUF_ADDR,		\/* TX Current Buffer Address *\/$/;"	e	enum:dmac_ctrl
TX_CURBUF_LENGTH	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_CURBUF_LENGTH,	\/* TX Current Buffer Length *\/$/;"	e	enum:dmac_ctrl
TX_CURDESC_PTR	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_CURDESC_PTR,		\/* TX Current Descriptor Pointer *\/$/;"	e	enum:dmac_ctrl
TX_CUR_16_MA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define TX_CUR_16_MA	/;"	d
TX_CUR_1_MA	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR_1_MA	/;"	d
TX_CUR_2_MA	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR_2_MA	/;"	d
TX_CUR_3_MA	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR_3_MA	/;"	d
TX_CUR_4_MA	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_CUR_4_MA	/;"	d
TX_DATA_FIFO	drivers/net/dnet.h	/^	u32 TX_DATA_FIFO;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_DATA_FIFO	drivers/net/smc911x.h	/^#define TX_DATA_FIFO	/;"	d
TX_DAT_RDY	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                TX_DAT_RDY /;"	d
TX_DAT_RDY_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define           TX_DAT_RDY_MASK /;"	d
TX_DEFER	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_DEFER	/;"	d
TX_DEFERRED	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_DEFERRED /;"	d
TX_DEFER_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_DEFER_CNT	/;"	d
TX_DESC_CNT	drivers/net/uli526x.c	/^#define TX_DESC_CNT	/;"	d	file:
TX_DESC_EOF	drivers/net/ep93xx_eth.h	/^#define TX_DESC_EOF /;"	d
TX_DESC_PADDING	drivers/net/sh_eth.h	/^#define TX_DESC_PADDING	/;"	d
TX_DIAGNOSTIC_ADDR_AI	drivers/net/tsi108_eth.c	/^#define TX_DIAGNOSTIC_ADDR_AI	/;"	d	file:
TX_DIAGNOSTIC_ADDR_DFR	drivers/net/tsi108_eth.c	/^#define TX_DIAGNOSTIC_ADDR_DFR	/;"	d	file:
TX_DIAGNOSTIC_ADDR_INDEX	drivers/net/tsi108_eth.c	/^#define TX_DIAGNOSTIC_ADDR_INDEX	/;"	d	file:
TX_DMAU	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_DMAU	/;"	d
TX_DMA_BURST	drivers/net/rtl8139.c	/^#define TX_DMA_BURST	/;"	d	file:
TX_DMA_BURST	drivers/net/rtl8169.c	/^#define TX_DMA_BURST	/;"	d	file:
TX_DMA_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_DMA_ENABLE /;"	d
TX_DVDD_BIT_1_0000V	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_DVDD_BIT_1_0000V	/;"	d
TX_DVDD_BIT_1_0625V	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_DVDD_BIT_1_0625V	/;"	d
TX_DVDD_BIT_1_1250V	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_DVDD_BIT_1_1250V	/;"	d
TX_ECOLL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_ECOLL	/;"	d
TX_EDEFER	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_EDEFER	/;"	d
TX_EMPHASIS	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	TX_EMPHASIS,$/;"	e	enum:auto_tune_stage
TX_EMPHASIS_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define TX_EMPHASIS_MASK_BIT	/;"	d
TX_ENDPOINT_MAXIMUM_PACKET_SIZE	drivers/usb/gadget/f_fastboot.c	/^#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE /;"	d	file:
TX_EN_INT	drivers/net/armada100_fec.h	/^#define TX_EN_INT /;"	d
TX_EQ64_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_EQ64_CNT	/;"	d
TX_ERROR	drivers/net/armada100_fec.h	/^#define TX_ERROR /;"	d
TX_ERROR_CEHCK	drivers/net/sh_eth.h	/^# define TX_ERROR_CEHCK /;"	d
TX_ERROR_STATUS	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS	/;"	d	file:
TX_ERROR_STATUS_DER_ON_QUEUE_0	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_DER_ON_QUEUE_0	/;"	d	file:
TX_ERROR_STATUS_DER_ON_QUEUE_1	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_DER_ON_QUEUE_1	/;"	d	file:
TX_ERROR_STATUS_DER_ON_QUEUE_2	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_DER_ON_QUEUE_2	/;"	d	file:
TX_ERROR_STATUS_DER_ON_QUEUE_3	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_DER_ON_QUEUE_3	/;"	d	file:
TX_ERROR_STATUS_QUEUE_0_ERROR_RESPONSE	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_QUEUE_0_ERROR_RESPONSE	/;"	d	file:
TX_ERROR_STATUS_QUEUE_1_ERROR_RESPONSE	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_QUEUE_1_ERROR_RESPONSE	/;"	d	file:
TX_ERROR_STATUS_QUEUE_2_ERROR_RESPONSE	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_QUEUE_2_ERROR_RESPONSE	/;"	d	file:
TX_ERROR_STATUS_QUEUE_3_ERROR_RESPONSE	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_QUEUE_3_ERROR_RESPONSE	/;"	d	file:
TX_ERROR_STATUS_RER_ON_QUEUE_0	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_RER_ON_QUEUE_0	/;"	d	file:
TX_ERROR_STATUS_RER_ON_QUEUE_1	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_RER_ON_QUEUE_1	/;"	d	file:
TX_ERROR_STATUS_RER_ON_QUEUE_2	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_RER_ON_QUEUE_2	/;"	d	file:
TX_ERROR_STATUS_RER_ON_QUEUE_3	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_RER_ON_QUEUE_3	/;"	d	file:
TX_ERROR_STATUS_TEA_ON_QUEUE_0	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TEA_ON_QUEUE_0	/;"	d	file:
TX_ERROR_STATUS_TEA_ON_QUEUE_1	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TEA_ON_QUEUE_1	/;"	d	file:
TX_ERROR_STATUS_TEA_ON_QUEUE_2	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TEA_ON_QUEUE_2	/;"	d	file:
TX_ERROR_STATUS_TEA_ON_QUEUE_3	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TEA_ON_QUEUE_3	/;"	d	file:
TX_ERROR_STATUS_TER_ON_QUEUE_0	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TER_ON_QUEUE_0	/;"	d	file:
TX_ERROR_STATUS_TER_ON_QUEUE_1	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TER_ON_QUEUE_1	/;"	d	file:
TX_ERROR_STATUS_TER_ON_QUEUE_2	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TER_ON_QUEUE_2	/;"	d	file:
TX_ERROR_STATUS_TER_ON_QUEUE_3	drivers/net/tsi108_eth.c	/^#define TX_ERROR_STATUS_TER_ON_QUEUE_3	/;"	d	file:
TX_EXC_COLL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_EXC_COLL /;"	d
TX_EXC_DEF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_EXC_DEF /;"	d
TX_EXDEF_CTL	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_EXDEF_CTL	/;"	d
TX_EXTENDED_STATUS_DESCRIPTOR_INTERRUPT_CONDITION	drivers/net/tsi108_eth.c	/^#define TX_EXTENDED_STATUS_DESCRIPTOR_INTERRUPT_CONDITION	/;"	d	file:
TX_EXTENDED_STATUS_END_OF_FRAME_CONDITION	drivers/net/tsi108_eth.c	/^#define TX_EXTENDED_STATUS_END_OF_FRAME_CONDITION	/;"	d	file:
TX_EXTENDED_STATUS_END_OF_QUEUE_CONDITION	drivers/net/tsi108_eth.c	/^#define TX_EXTENDED_STATUS_END_OF_QUEUE_CONDITION	/;"	d	file:
TX_EXTENDED_STATUS_ERROR_FLAG	drivers/net/tsi108_eth.c	/^#define TX_EXTENDED_STATUS_ERROR_FLAG	/;"	d	file:
TX_FIFO_COUNT_MASK	drivers/serial/serial_s5p.c	/^#define TX_FIFO_COUNT_MASK	/;"	d	file:
TX_FIFO_COUNT_SHIFT	drivers/serial/serial_s5p.c	/^#define TX_FIFO_COUNT_SHIFT	/;"	d	file:
TX_FIFO_EMPTY_CNT_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define TX_FIFO_EMPTY_CNT_MASK	/;"	d
TX_FIFO_EMPTY_CNT_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define TX_FIFO_EMPTY_CNT_SHIFT	/;"	d
TX_FIFO_FLUSH	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define TX_FIFO_FLUSH /;"	d
TX_FIFO_FLUSH_ALL	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define TX_FIFO_FLUSH_ALL /;"	d
TX_FIFO_FULL	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              TX_FIFO_FULL /;"	d
TX_FIFO_FULL	drivers/serial/serial_s5p.c	/^#define TX_FIFO_FULL	/;"	d	file:
TX_FIFO_FULL_CNT_MASK	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define TX_FIFO_FULL_CNT_MASK	/;"	d
TX_FIFO_FULL_CNT_SHIFT	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define TX_FIFO_FULL_CNT_SHIFT	/;"	d
TX_FIFO_FULL_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         TX_FIFO_FULL_MASK /;"	d
TX_FIFO_INF	drivers/net/smc911x.h	/^#define TX_FIFO_INF	/;"	d
TX_FIFO_INF_TDFREE	drivers/net/smc911x.h	/^#define	TX_FIFO_INF_TDFREE	/;"	d
TX_FIFO_INF_TSUSED	drivers/net/smc911x.h	/^#define	TX_FIFO_INF_TSUSED	/;"	d
TX_FIFO_NUMBER	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define TX_FIFO_NUMBER(/;"	d
TX_FIFO_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              TX_FIFO_STAT /;"	d
TX_FIFO_STAT_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         TX_FIFO_STAT_MASK /;"	d
TX_FIFO_TH	drivers/net/dnet.h	/^	u32 TX_FIFO_TH;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_FIFO_THRESH	drivers/net/rtl8139.c	/^#define TX_FIFO_THRESH /;"	d	file:
TX_FIFO_THRESH	drivers/net/rtl8169.c	/^#define TX_FIFO_THRESH /;"	d	file:
TX_FIFO_WCNT	drivers/net/dnet.h	/^	u32 TX_FIFO_WCNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_FIFO_ZERO	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define              TX_FIFO_ZERO /;"	d
TX_FIFO_ZERO_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define         TX_FIFO_ZERO_MASK /;"	d
TX_FIRST_DESC	drivers/net/armada100_fec.h	/^#define TX_FIRST_DESC /;"	d
TX_FRAMES_CNT	drivers/net/dnet.h	/^	u32 TX_FRAMES_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_FRAME_ABORTED	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_FRAME_ABORTED /;"	d
TX_FREE_DESC	drivers/net/zynq_gem.c	/^#define TX_FREE_DESC	/;"	d	file:
TX_FREE_DESC_CNT	drivers/net/uli526x.c	/^#define TX_FREE_DESC_CNT	/;"	d	file:
TX_FRLEN	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_FRLEN	/;"	d
TX_FS	drivers/usb/eth/r8152.h	/^#define TX_FS	/;"	d
TX_GE1024_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_GE1024_CNT	/;"	d
TX_GEN_CRC	drivers/net/armada100_fec.h	/^#define TX_GEN_CRC /;"	d
TX_GET_DMA_BUFFER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_GET_DMA_BUFFER(/;"	d
TX_INIFINIT_LOOP_MODE	drivers/net/ax88180.h	/^#define TX_INIFINIT_LOOP_MODE	/;"	d
TX_IPG_LENGTH_IPG_LEN_MASK	include/fsl_memac.h	/^#define TX_IPG_LENGTH_IPG_LEN_MASK	/;"	d
TX_IPG_LENGTH_IPG_LEN_MASK	include/fsl_tgec.h	/^#define TX_IPG_LENGTH_IPG_LEN_MASK	/;"	d
TX_IRQ_REG	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_IRQ_REG,		\/* TX Interrupt Register *\/$/;"	e	enum:dmac_ctrl
TX_JAB_TIMEOUT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_JAB_TIMEOUT /;"	d
TX_JUMBO_CNT	drivers/net/dnet.h	/^	u32 TX_JUMBO_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_LAST_DESC	drivers/net/armada100_fec.h	/^#define TX_LAST_DESC /;"	d
TX_LATE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LATE	/;"	d
TX_LATE_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LATE_CNT	/;"	d
TX_LATE_COLL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_LATE_COLL /;"	d
TX_LATE_COLL_ABORT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_LATE_COLL_ABORT /;"	d
TX_LEN_1	include/linux/mtd/st_smi.h	/^#define TX_LEN_1	/;"	d
TX_LEN_2	include/linux/mtd/st_smi.h	/^#define TX_LEN_2	/;"	d
TX_LEN_3	include/linux/mtd/st_smi.h	/^#define TX_LEN_3	/;"	d
TX_LEN_4	include/linux/mtd/st_smi.h	/^#define TX_LEN_4	/;"	d
TX_LEN_FIFO	drivers/net/dnet.h	/^	u32 TX_LEN_FIFO;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_LEN_MAX	drivers/usb/eth/r8152.h	/^#define TX_LEN_MAX	/;"	d
TX_LOSS	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LOSS	/;"	d
TX_LOSS_CARRIER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_LOSS_CARRIER /;"	d
TX_LOST_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LOST_CNT	/;"	d
TX_LS	drivers/usb/eth/r8152.h	/^#define TX_LS	/;"	d
TX_LT1024_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LT1024_CNT	/;"	d
TX_LT128_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LT128_CNT	/;"	d
TX_LT256_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LT256_CNT	/;"	d
TX_LT512_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_LT512_CNT	/;"	d
TX_MACCTL_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_MACCTL_CNT	/;"	d
TX_MACE	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_MACE	/;"	d
TX_MCOLL_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_MCOLL_CNT	/;"	d
TX_MULTI	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_MULTI	/;"	d
TX_MULTICAST_CNT	drivers/net/dnet.h	/^	u32 TX_MULTICAST_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_MULTI_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_MULTI_CNT	/;"	d
TX_NO_CARRIER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_NO_CARRIER /;"	d
TX_NUM_DESC	drivers/net/calxedaxgmac.c	/^#define TX_NUM_DESC	/;"	d	file:
TX_NXTDESC_PTR	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_NXTDESC_PTR = 0,	\/* TX Next Description Pointer *\/$/;"	e	enum:dmac_ctrl
TX_OCTET_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_OCTET_CNT	/;"	d
TX_OK	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_OK	/;"	d
TX_OK_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_OK_CNT	/;"	d
TX_PAGES	drivers/net/ax88796.h	/^#define TX_PAGES	/;"	d
TX_PAUSE_FRM_CNT	drivers/net/dnet.h	/^	u32 TX_PAUSE_FRM_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_PKT_RETRY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_PKT_RETRY /;"	d
TX_POLL_INTERVAL	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define TX_POLL_INTERVAL	/;"	d
TX_PORT_10G_BASE	drivers/net/fm/fm.h	/^#define TX_PORT_10G_BASE	/;"	d
TX_PORT_10G_BASE2	drivers/net/fm/fm.h	/^#define TX_PORT_10G_BASE2	/;"	d
TX_PORT_1G_BASE	drivers/net/fm/fm.h	/^#define TX_PORT_1G_BASE	/;"	d
TX_PRINT_ERRORS	drivers/net/tsi108_eth.c	/^#define TX_PRINT_ERRORS$/;"	d	file:
TX_QUEUE_0_BUF_CONFIG_BSWP	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_BUF_CONFIG_BSWP	/;"	d	file:
TX_QUEUE_0_BUF_CONFIG_BURST	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_BUF_CONFIG_BURST	/;"	d	file:
TX_QUEUE_0_BUF_CONFIG_OCN_PORT	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_BUF_CONFIG_OCN_PORT	/;"	d	file:
TX_QUEUE_0_BUF_CONFIG_WSWP	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_BUF_CONFIG_WSWP	/;"	d	file:
TX_QUEUE_0_CONFIG_AM	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_AM	/;"	d	file:
TX_QUEUE_0_CONFIG_BSWP	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_BSWP	/;"	d	file:
TX_QUEUE_0_CONFIG_EDI	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_EDI	/;"	d	file:
TX_QUEUE_0_CONFIG_EEI	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_EEI	/;"	d	file:
TX_QUEUE_0_CONFIG_ELI	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_ELI	/;"	d	file:
TX_QUEUE_0_CONFIG_ENI	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_ENI	/;"	d	file:
TX_QUEUE_0_CONFIG_ESI	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_ESI	/;"	d	file:
TX_QUEUE_0_CONFIG_GVI	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_GVI	/;"	d	file:
TX_QUEUE_0_CONFIG_OCN_PORT	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_OCN_PORT	/;"	d	file:
TX_QUEUE_0_CONFIG_WSWP	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_CONFIG_WSWP	/;"	d	file:
TX_QUEUE_0_PTR_HIGH_VALID	drivers/net/tsi108_eth.c	/^#define TX_QUEUE_0_PTR_HIGH_VALID	/;"	d	file:
TX_QUIET_EN	drivers/usb/eth/r8152.h	/^#define TX_QUIET_EN	/;"	d
TX_RETRY	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_RETRY	/;"	d
TX_RGMII_TIM	include/mv88e6352.h	/^#define TX_RGMII_TIM	/;"	d
TX_RING_LEN_BITS	drivers/net/pcnet.c	/^#define TX_RING_LEN_BITS	/;"	d	file:
TX_RING_SIZE	drivers/net/pcnet.c	/^#define TX_RING_SIZE	/;"	d	file:
TX_RING_SIZE	include/usb/mpc8xx_udc.h	/^#define TX_RING_SIZE	/;"	d
TX_SCOLL_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_SCOLL_CNT	/;"	d
TX_SIZE_ADJUST1	drivers/usb/eth/r8152.h	/^#define TX_SIZE_ADJUST1	/;"	d
TX_START_WRITE	drivers/net/ax88180.h	/^  #define TX_START_WRITE	/;"	d
TX_STATUS	drivers/net/dnet.h	/^	u32 TX_STATUS;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_STATUS_ACT	drivers/net/tsi108_eth.c	/^#define TX_STATUS_ACT	/;"	d	file:
TX_STATUS_CURR_Q	drivers/net/tsi108_eth.c	/^#define TX_STATUS_CURR_Q	/;"	d	file:
TX_STATUS_EOQ_PENDING	drivers/net/tsi108_eth.c	/^#define TX_STATUS_EOQ_PENDING	/;"	d	file:
TX_STATUS_FIFO	drivers/net/smc911x.h	/^#define TX_STATUS_FIFO	/;"	d
TX_STATUS_FIFO_PEEK	drivers/net/smc911x.h	/^#define TX_STATUS_FIFO_PEEK	/;"	d
TX_STATUS_QUEUE_IDLE	drivers/net/tsi108_eth.c	/^#define TX_STATUS_QUEUE_IDLE	/;"	d	file:
TX_STATUS_QUEUE_USABLE	drivers/net/tsi108_eth.c	/^#define TX_STATUS_QUEUE_USABLE	/;"	d	file:
TX_STATUS_TXFP	drivers/net/ep93xx_eth.h	/^#define TX_STATUS_TXFP(/;"	d
TX_STATUS_TXWE	drivers/net/ep93xx_eth.h	/^#define TX_STATUS_TXWE(/;"	d
TX_STOP_WRITE	drivers/net/ax88180.h	/^  #define TX_STOP_WRITE	/;"	d
TX_STS_COLL_CNT	drivers/net/smc911x.h	/^#define	TX_STS_COLL_CNT	/;"	d
TX_STS_DEFERRED	drivers/net/smc911x.h	/^#define	TX_STS_DEFERRED	/;"	d
TX_STS_ES	drivers/net/smc911x.h	/^#define	TX_STS_ES	/;"	d
TX_STS_LATE_COLL	drivers/net/smc911x.h	/^#define	TX_STS_LATE_COLL	/;"	d
TX_STS_LOC	drivers/net/smc911x.h	/^#define	TX_STS_LOC	/;"	d
TX_STS_MANY_COLL	drivers/net/smc911x.h	/^#define	TX_STS_MANY_COLL	/;"	d
TX_STS_MANY_DEFER	drivers/net/smc911x.h	/^#define	TX_STS_MANY_DEFER	/;"	d
TX_STS_NO_CARR	drivers/net/smc911x.h	/^#define	TX_STS_NO_CARR	/;"	d
TX_STS_TAG	drivers/net/smc911x.h	/^#define	TX_STS_TAG	/;"	d
TX_STS_UNDERRUN	drivers/net/smc911x.h	/^#define	TX_STS_UNDERRUN	/;"	d
TX_SWING_PRE_EMP_MODE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define TX_SWING_PRE_EMP_MODE	/;"	d
TX_TAILDESC_PTR	drivers/net/xilinx_ll_temac_sdma.h	/^	TX_TAILDESC_PTR,	\/* TX Tail Descriptor Pointer *\/$/;"	e	enum:dmac_ctrl
TX_TERMINAL_CTRL_45_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_TERMINAL_CTRL_45_OHM	/;"	d
TX_TERMINAL_CTRL_50_OHM	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define TX_TERMINAL_CTRL_50_OHM	/;"	d
TX_TERMINAL_CTRL_50_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_TERMINAL_CTRL_50_OHM	/;"	d
TX_TERMINAL_CTRL_61_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_TERMINAL_CTRL_61_OHM	/;"	d
TX_TERMINAL_CTRL_73_OHM	arch/arm/mach-exynos/include/mach/dp.h	/^#define TX_TERMINAL_CTRL_73_OHM	/;"	d
TX_THRESHOLD_DECREMENT	drivers/net/e1000.h	/^#define TX_THRESHOLD_DECREMENT /;"	d
TX_THRESHOLD_DISABLE	drivers/net/e1000.h	/^#define TX_THRESHOLD_DISABLE /;"	d
TX_THRESHOLD_INCREMENT	drivers/net/e1000.h	/^#define TX_THRESHOLD_INCREMENT /;"	d
TX_THRESHOLD_START	drivers/net/e1000.h	/^#define TX_THRESHOLD_START /;"	d
TX_THRESHOLD_STOP	drivers/net/e1000.h	/^#define TX_THRESHOLD_STOP /;"	d
TX_THRESHOLD_TIMER_MS	drivers/net/e1000.h	/^#define TX_THRESHOLD_TIMER_MS /;"	d
TX_THRESH_DEF	arch/arm/include/asm/arch-armada100/spi.h	/^#define TX_THRESH_DEF	/;"	d
TX_TIMEOUT	drivers/net/lpc32xx_eth.c	/^#define TX_TIMEOUT /;"	d	file:
TX_TIMEOUT	drivers/net/rtl8169.c	/^#define TX_TIMEOUT /;"	d	file:
TX_TOTAL_BUFSIZE	drivers/net/ag7xxx.c	/^#define TX_TOTAL_BUFSIZE	/;"	d	file:
TX_TOTAL_BUFSIZE	drivers/net/designware.h	/^#define TX_TOTAL_BUFSIZE	/;"	d
TX_TOTAL_BUFSIZE	drivers/net/sun8i_emac.c	/^#define TX_TOTAL_BUFSIZE	/;"	d	file:
TX_T_DONE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_T_DONE /;"	d
TX_UNDERRUN	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define               TX_UNDERRUN /;"	d
TX_UNDERRUN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define TX_UNDERRUN /;"	d
TX_UNDERRUN_MASK	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          TX_UNDERRUN_MASK /;"	d
TX_UNDERRUN_STAT	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define          TX_UNDERRUN_STAT /;"	d
TX_UNICAST_CNT	drivers/net/dnet.h	/^	u32 TX_UNICAST_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_UNI_CNT	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	TX_UNI_CNT	/;"	d
TX_VLAN_TAG	drivers/usb/eth/r8152.h	/^#define TX_VLAN_TAG	/;"	d
TX_VLAN_TAG_CNT	drivers/net/dnet.h	/^	u32 TX_VLAN_TAG_CNT;$/;"	m	struct:dnet_registers	typeref:typename:u32
TX_WAKE_DESC_CNT	drivers/net/uli526x.c	/^#define TX_WAKE_DESC_CNT	/;"	d	file:
TX_WMARK	include/dwmmc.h	/^#define TX_WMARK(/;"	d
TX_ZERO_PADDING	drivers/net/armada100_fec.h	/^#define TX_ZERO_PADDING /;"	d
TXsvfDoCmdFuncPtr	board/esd/common/xilinx_jtag/micro.c	/^typedef int (*TXsvfDoCmdFuncPtr)( SXsvfInfo* );$/;"	t	typeref:typename:int (*)(SXsvfInfo *)	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_ACTMON,	CLOCK_TYPE_PCST),	\/* MASK 31:30 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_AUDIO,	CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_CSITE,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_CVE,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_DAM0,	CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_DAM1,	CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_DAM2,	CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_DISP1,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_DISP2,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_EMC,	CLOCK_TYPE_MCPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_EPP,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_EXTPERIPH1, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_EXTPERIPH2, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_EXTPERIPH3, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_G2D,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_G3D,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_G3D2,      CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_HDA,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_HDA2CODEC2X, CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_HDMI,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_HOST1X,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2C1,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2C2,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2C3,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2C4,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2C5,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2CSLOW,	CLOCK_TYPE_PCST),	\/* MASK 31:30 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2S0,      CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2S1,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2S2,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2S3,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_I2S4,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_MIPI,	CLOCK_TYPE_PCMT),	\/* MIPI base-band HSI *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_MPE,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_MSELECT,   CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_NANDSPEED,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_NDFLASH,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_NONE,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_NOR,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_OWR,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_PWM,	CLOCK_TYPE_PCST),  \/* only PWM uses b29:28 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SATA,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SATAOOB,	CLOCK_TYPE_PCMT),	\/* offset 0x420h *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SBC1,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SBC2,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SBC3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SBC4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SBC5,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SBC6,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SDMMC1,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SDMMC2,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SDMMC3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SDMMC4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SPDIF_IN,	CLOCK_TYPE_PCM),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SPDIF_OUT,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SPEEDO,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_SYS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_TSENSOR,   CLOCK_TYPE_PCST),	\/* s\/b PCTS *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_TVDAC,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_TVO,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_UART1,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_UART2,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_UART3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_UART4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_UART5,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_VDE,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_VFIR,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^	TYPE(PERIPHC_VI,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra114/clock.c	/^#define TYPE(/;"	d	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_05h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_08h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_0bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_0ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_10h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_11h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_13h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_16h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_17h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_18h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_1Bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_1Ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_21h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_22h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_24h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_25h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_29h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_2bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_2ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_38h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_39h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_3ah,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_3bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_3eh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_40h,	CLOCK_TYPE_NONE),	\/* start with 0x3b0 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_49h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_52h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_55h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_56h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_57h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_58h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_5ah,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_5bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_5fh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_72h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_73h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_74h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_75h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_78h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_7Fh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_ACTMON,	CLOCK_TYPE_PC2CC3S_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_ADX0,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_ADX1,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_AMX0,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_AMX1,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_AUDIO,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_CILAB,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_CILCD,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_CILE,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_CLK72MHZ,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_CSITE,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DAM0,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DAM1,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DAM2,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DISP1,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DISP2,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DSIA_LP,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DSIB_LP,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DTV,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DVFS_REF,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_DVFS_SOC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_EMC,	CLOCK_TYPE_MCPTM2C2C3),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_EMC_DLL,	CLOCK_TYPE_MCPTM2C2C3),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_EMC_LATENCY, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_ENTROPY,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_EXTPERIPH1, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_EXTPERIPH2, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_EXTPERIPH3, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_HDA,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_HDA2CODEC2X, CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_HDMI,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_HDMI_AUDIO, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_HOST1X,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_HSI,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2C1,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2C2,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2C3,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2C4,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2C5,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2C6,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2CSLOW,	CLOCK_TYPE_PC2CC3S_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2S0,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2S1,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2S2,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2S3,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_I2S4,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_MSELECT,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_MSENC,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_NOR,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_OSC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_OWR,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_PWM,	CLOCK_TYPE_PC2CC3S_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SATA,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SATAOOB,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SBC1,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SBC2,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SBC3,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SBC4,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SBC5,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SBC6,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SDMMC1,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SDMMC2,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SDMMC3,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SDMMC4,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SOC_THERM,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SOR,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SPDIF_IN,	CLOCK_TYPE_PC2CC3M),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SPDIF_OUT,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_SYS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_TRACECLKIN, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_TSEC,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_TSENSOR,	CLOCK_TYPE_PC2CC3T_S),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_UART1,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_UART2,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_UART3,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_UART4,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_UART5,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_VDE,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_VFIR,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_VI,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_VIC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_VI_SENSOR,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_VI_SENSOR2, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_XUSB_CORE_DEV, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_XUSB_CORE_HOST, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_XUSB_FALCON, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_XUSB_FS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^	TYPE(PERIPHC_XUSB_SS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra124/clock.c	/^#define TYPE(/;"	d	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_CSITE,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_CVE,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_DISP1,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_DISP2,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_DVC_I2C,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_EMC,	CLOCK_TYPE_MCPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_EPP,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_G2D,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_G3D,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_HDMI,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_HOST1X,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_I2C1,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_I2C2,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_I2C3,	CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_I2S1,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_I2S2,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_IDE0,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_MIPI,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_MPE,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_NDFLASH,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_NONE,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_NOR,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_OWR,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_PWM,	CLOCK_TYPE_PCXTS),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SDMMC1,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SDMMC2,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SDMMC3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SDMMC4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SPDIF_IN,	CLOCK_TYPE_PCM),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SPDIF_OUT,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SPI1,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SPI22,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SPI3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_SPI4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_TVDAC,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_TVO,	CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_TWC,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_UART1,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_UART2,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_UART3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_UART4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_UART5,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_VDE,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_VFIR,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_VI,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^	TYPE(PERIPHC_XIO,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra20/clock.c	/^#define TYPE(/;"	d	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_05h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_08h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_0bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_0ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_10h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_11h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_13h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_16h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_17h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_18h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_1Bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_1Ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_21h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_22h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_23h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_24h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_25h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_29h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_2bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_2ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_38h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_39h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_3ah,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_3bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_3eh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_40h,	CLOCK_TYPE_NONE),	\/* start with 0x3b0 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_49h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_4ah,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_4bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_4ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_52h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_55h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_56h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_57h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_58h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_59h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_5ah,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_5bh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_5fh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_6eh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_6fh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_72h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_73h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_74h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_75h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_78h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_7Fh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_7ah,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_7ch,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_7dh,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_84h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_85h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_86h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_87h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_88h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_89h,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_ACTMON,	CLOCK_TYPE_PC2CC3S_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_APE,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_AUDIO,	CLOCK_TYPE_AC2CC3P_TS2),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_CILAB,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_CILCD,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_CILE,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_CLK72MHZ,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_CSITE,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DISP1,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DISP2,	CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DMIC3,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DSIA_LP,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DSIB_LP,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DTV,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DVFS_REF,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_DVFS_SOC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_EMC,	CLOCK_TYPE_MCPTM2C2C3),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_EMC_DLL,	CLOCK_TYPE_MCPTM2C2C3),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_EMC_LATENCY, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_ENTROPY,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_EXTPERIPH1, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_EXTPERIPH2, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_EXTPERIPH3, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_HDA,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_HDA2CODEC2X, CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_HOST1X,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_HSI,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2C1,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2C2,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2C3,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2C4,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2C5,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2C6,	CLOCK_TYPE_PC2CC3M_T16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2CSLOW,	CLOCK_TYPE_PC2CC3S_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2S1,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2S2,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2S3,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2S4,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_I2S5,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_MAUD,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_MSELECT,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_MSENC,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_NOR,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_NVDEC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_NVENC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_NVJPG,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_OSC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_OWR,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_PEX_SATA_USB_RX_BYP, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_PWM,	CLOCK_TYPE_PC2CC3S_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_QSPI,	CLOCK_TYPE_PC01C00_C42C41TC40),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SATA,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SATAOOB,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SBC1,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SBC2,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SBC3,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SBC4,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SBC5,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SBC6,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SDMMC1,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SDMMC2,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SDMMC3,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SDMMC4,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SDMMC_LEGACY_TM,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SOC_THERM,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SPDIF_IN,	CLOCK_TYPE_PC2CC3M),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SPDIF_OUT,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_SYS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_TRACECLKIN, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_TSEC,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_TSECB,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_TSENSOR,	CLOCK_TYPE_PC2CC3T_S),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_UART1,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_UART2,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_UART3,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_UART4,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_UART5,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_USB2_HSIC_TRK, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VDE,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VFIR,	CLOCK_TYPE_PC2CC3M_T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VI,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VIC,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VI_I2C,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VI_SENSOR,	CLOCK_TYPE_MC2CC3P_A),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_VI_SENSOR2, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_XUSB_CORE_DEV, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_XUSB_CORE_HOST, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_XUSB_FALCON, CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_XUSB_FS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^	TYPE(PERIPHC_XUSB_SS,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra210/clock.c	/^#define TYPE(/;"	d	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_ACTMON,    CLOCK_TYPE_PCST),       \/* MASK 31:30 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_AUDIO,     CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_CSITE,     CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_CVE,       CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_DAM0,      CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_DAM1,      CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_DAM2,      CLOCK_TYPE_ACPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_DISP1,     CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_DISP2,     CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_DVC_I2C,   CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_EMC,	CLOCK_TYPE_MCPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_EPP,       CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_EXTPERIPH1, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_EXTPERIPH2, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_EXTPERIPH3, CLOCK_TYPE_ASPTE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_G2D,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_G3D,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_G3D2,      CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_HDA,       CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_HDA2CODEC2X, CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_HDMI,      CLOCK_TYPE_PMDACD2T),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_HOST1X,    CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2C1,      CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2C2,      CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2C3,      CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2C4,      CLOCK_TYPE_PCMT16),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2CSLOW,   CLOCK_TYPE_PCST),       \/* MASK 31:30 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2S0,      CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2S1,	CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2S2,      CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2S3,      CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_I2S4,      CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_MIPI,      CLOCK_TYPE_PCMT),       \/* MIPI base-band HSI *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_MPE,       CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_MSELECT,   CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_NANDSPEED, CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_NDFLASH,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_NONE,	CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_NOR,       CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_OWR,       CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_PWM,       CLOCK_TYPE_PCST),  \/* only PWM uses b29:28 *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SATA,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SATAOOB,   CLOCK_TYPE_PCMT),       \/* offset 0x420h *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SBC1,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SBC2,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SBC3,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SBC4,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SBC5,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SBC6,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SDMMC1,    CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SDMMC2,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SDMMC3,    CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SDMMC4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SPDIF_IN,  CLOCK_TYPE_PCM),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SPDIF_OUT, CLOCK_TYPE_AXPT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SPEEDO,    CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_SYS,       CLOCK_TYPE_NONE),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_TSENSOR,   CLOCK_TYPE_PCST),       \/* s\/b PCTS *\/$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_TVDAC,     CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_TVO,       CLOCK_TYPE_PDCT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_UART1,     CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_UART2,     CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_UART3,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_UART4,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_UART5,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_VDE,	CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_VFIR,      CLOCK_TYPE_PCMT),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^	TYPE(PERIPHC_VI,	CLOCK_TYPE_MCPA),$/;"	e	enum:clock_periph_type	file:
TYPE	arch/arm/mach-tegra/tegra30/clock.c	/^#define TYPE(/;"	d	file:
TYPE	lib/zlib/inflate.h	/^        TYPE,       \/* i: waiting for type bits, including last-flag bit *\/$/;"	e	enum:__anon43d5a4c40103
TYPEDO	lib/zlib/inflate.h	/^        TYPEDO,     \/* i: same, but skip check to exit inflate on new block *\/$/;"	e	enum:__anon43d5a4c40103
TYPENAME	tools/buildman/kconfiglib.py	/^TYPENAME = {UNKNOWN: "unknown", BOOL: "bool", TRISTATE: "tristate",$/;"	v
TYPE_114	drivers/i2c/tegra_i2c.c	/^	TYPE_114,$/;"	e	enum:i2c_type	file:
TYPE_ANY	fs/reiserfs/reiserfs_private.h	/^#define TYPE_ANY /;"	d
TYPE_CDROM	drivers/usb/gadget/storage_common.c	/^#define TYPE_CDROM	/;"	d	file:
TYPE_DATA_WATCHPOINT	arch/blackfin/lib/kgdb.h	/^#define TYPE_DATA_WATCHPOINT	/;"	d
TYPE_DISK	drivers/usb/gadget/storage_common.c	/^#define TYPE_DISK	/;"	d	file:
TYPE_DVC	drivers/i2c/tegra_i2c.c	/^	TYPE_DVC,$/;"	e	enum:i2c_type	file:
TYPE_INST_WATCHPOINT	arch/blackfin/lib/kgdb.h	/^#define TYPE_INST_WATCHPOINT	/;"	d
TYPE_MAXTYPE	fs/reiserfs/reiserfs_private.h	/^#define TYPE_MAXTYPE /;"	d
TYPE_NAMES	tools/dtoc/dtoc	/^TYPE_NAMES = {$/;"	v
TYPE_NAMES	tools/dtoc/dtoc.py	/^TYPE_NAMES = {$/;"	v
TYPE_PL010	include/dm/platform_data/serial_pl01x.h	/^	TYPE_PL010,$/;"	e	enum:pl01x_type
TYPE_PL011	include/dm/platform_data/serial_pl01x.h	/^	TYPE_PL011,$/;"	e	enum:pl01x_type
TYPE_STD	drivers/i2c/tegra_i2c.c	/^	TYPE_STD,$/;"	e	enum:i2c_type	file:
TYPICAL_PBS_VALUE	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^#define TYPICAL_PBS_VALUE	/;"	d	file:
TY_ITYP_VER_A53	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TY_ITYP_VER_A53 /;"	d
TY_ITYP_VER_A53	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TY_ITYP_VER_A53	/;"	d
TY_ITYP_VER_A57	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TY_ITYP_VER_A57 /;"	d
TY_ITYP_VER_A57	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TY_ITYP_VER_A57	/;"	d
TY_ITYP_VER_A7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TY_ITYP_VER_A7 /;"	d
TY_ITYP_VER_A7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TY_ITYP_VER_A7	/;"	d
TY_ITYP_VER_A72	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TY_ITYP_VER_A72	/;"	d
TY_ITYP_VER_A72	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TY_ITYP_VER_A72	/;"	d
TZAH	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                      TZAH /;"	d
TZASC1_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC1_BASE	/;"	d
TZASC1_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC1_BASE	/;"	d
TZASC2_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC2_BASE	/;"	d
TZASC2_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC2_BASE	/;"	d
TZASC3_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC3_BASE	/;"	d
TZASC3_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC3_BASE	/;"	d
TZASC4_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC4_BASE	/;"	d
TZASC4_BASE	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC4_BASE	/;"	d
TZASC_ACTION_REG	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_ACTION_REG(/;"	d
TZASC_ACTION_REG	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_ACTION_REG(/;"	d
TZASC_BUILD_CONFIG_REG	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_BUILD_CONFIG_REG(/;"	d
TZASC_BUILD_CONFIG_REG	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_BUILD_CONFIG_REG(/;"	d
TZASC_DDR0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define TZASC_DDR0_BASE_ADDR	/;"	d
TZASC_DDR1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define TZASC_DDR1_BASE_ADDR	/;"	d
TZASC_GATE_KEEPER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_GATE_KEEPER(/;"	d
TZASC_GATE_KEEPER	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_GATE_KEEPER(/;"	d
TZASC_GFX_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define TZASC_GFX_BASE_ADDR	/;"	d
TZASC_REGION_ATTRIBUTES_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_REGION_ATTRIBUTES_0(/;"	d
TZASC_REGION_ATTRIBUTES_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_REGION_ATTRIBUTES_0(/;"	d
TZASC_REGION_BASE_HIGH_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_REGION_BASE_HIGH_0(/;"	d
TZASC_REGION_BASE_HIGH_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_REGION_BASE_HIGH_0(/;"	d
TZASC_REGION_BASE_LOW_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_REGION_BASE_LOW_0(/;"	d
TZASC_REGION_BASE_LOW_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_REGION_BASE_LOW_0(/;"	d
TZASC_REGION_ID_ACCESS_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_REGION_ID_ACCESS_0(/;"	d
TZASC_REGION_ID_ACCESS_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_REGION_ID_ACCESS_0(/;"	d
TZASC_REGION_TOP_HIGH_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_REGION_TOP_HIGH_0(/;"	d
TZASC_REGION_TOP_HIGH_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_REGION_TOP_HIGH_0(/;"	d
TZASC_REGION_TOP_LOW_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define TZASC_REGION_TOP_LOW_0(/;"	d
TZASC_REGION_TOP_LOW_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define TZASC_REGION_TOP_LOW_0(/;"	d
TZASC_SYS0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define TZASC_SYS0_BASE_ADDR	/;"	d
TZASC_SYS1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define TZASC_SYS1_BASE_ADDR	/;"	d
TZPCDECPROT_0_CLR_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_0_CLR_BASE	/;"	d
TZPCDECPROT_0_SET_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_0_SET_BASE	/;"	d
TZPCDECPROT_0_STAT_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_0_STAT_BASE	/;"	d
TZPCDECPROT_1_CLR_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_1_CLR_BASE	/;"	d
TZPCDECPROT_1_SET_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_1_SET_BASE	/;"	d
TZPCDECPROT_1_STAT_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_1_STAT_BASE	/;"	d
TZPCDECPROT_2_CLR_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_2_CLR_BASE	/;"	d
TZPCDECPROT_2_SET_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_2_SET_BASE	/;"	d
TZPCDECPROT_2_STAT_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCDECPROT_2_STAT_BASE	/;"	d
TZPCR0SIZE_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPCR0SIZE_BASE	/;"	d
TZPC_BASE	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define TZPC_BASE	/;"	d
TZPC_BASE_OFFSET	arch/arm/mach-exynos/include/mach/tzpc.h	/^#define TZPC_BASE_OFFSET	/;"	d
TZPC_BASE_OFFSET	include/configs/odroid_xu3.h	/^#define TZPC_BASE_OFFSET	/;"	d
T_AND	scripts/kconfig/zconf.tab.c	/^     T_AND = 288,$/;"	e	enum:yytokentype	file:
T_APPEND	cmd/pxe.c	/^	T_APPEND,$/;"	e	enum:token_type	file:
T_BIT	arch/arm/include/asm/proc-armv/ptrace.h	/^#define T_BIT	/;"	d
T_CHOICE	scripts/kconfig/zconf.tab.c	/^     T_CHOICE = 262,$/;"	e	enum:yytokentype	file:
T_CHOICE	scripts/kconfig/zconf.y	/^%token <id>T_CHOICE$/;"	t	typeref:typename:id
T_CK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_CK	/;"	d
T_CKE_TCK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_CKE_TCK	/;"	d
T_CK_CTRL	drivers/ddr/microchip/ddr2_timing.h	/^#define T_CK_CTRL	/;"	d
T_CLOSE_PAREN	scripts/kconfig/zconf.tab.c	/^     T_CLOSE_PAREN = 284,$/;"	e	enum:yytokentype	file:
T_CLOSE_PAREN	scripts/kconfig/zconf.y	/^%token T_CLOSE_PAREN$/;"	t
T_COMMENT	scripts/kconfig/zconf.tab.c	/^     T_COMMENT = 264,$/;"	e	enum:yytokentype	file:
T_COMMENT	scripts/kconfig/zconf.y	/^%token <id>T_COMMENT$/;"	t	typeref:typename:id
T_CONFIG	scripts/kconfig/zconf.tab.c	/^     T_CONFIG = 265,$/;"	e	enum:yytokentype	file:
T_CONFIG	scripts/kconfig/zconf.y	/^%token <id>T_CONFIG$/;"	t	typeref:typename:id
T_DEFAULT	cmd/pxe.c	/^	T_DEFAULT,$/;"	e	enum:token_type	file:
T_DEFAULT	scripts/kconfig/zconf.tab.c	/^     T_DEFAULT = 275,$/;"	e	enum:yytokentype	file:
T_DEFAULT	scripts/kconfig/zconf.y	/^%token <id>T_DEFAULT$/;"	t	typeref:typename:id
T_DEPENDS	scripts/kconfig/zconf.tab.c	/^     T_DEPENDS = 271,$/;"	e	enum:yytokentype	file:
T_DEPENDS	scripts/kconfig/zconf.y	/^%token <id>T_DEPENDS$/;"	t	typeref:typename:id
T_DLLK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_DLLK	/;"	d
T_ENDCHOICE	scripts/kconfig/zconf.tab.c	/^     T_ENDCHOICE = 263,$/;"	e	enum:yytokentype	file:
T_ENDCHOICE	scripts/kconfig/zconf.y	/^%token <id>T_ENDCHOICE$/;"	t	typeref:typename:id
T_ENDIF	scripts/kconfig/zconf.tab.c	/^     T_ENDIF = 270,$/;"	e	enum:yytokentype	file:
T_ENDIF	scripts/kconfig/zconf.y	/^%token <id>T_ENDIF$/;"	t	typeref:typename:id
T_ENDMENU	scripts/kconfig/zconf.tab.c	/^     T_ENDMENU = 260,$/;"	e	enum:yytokentype	file:
T_ENDMENU	scripts/kconfig/zconf.y	/^%token <id>T_ENDMENU$/;"	t	typeref:typename:id
T_EOF	cmd/pxe.c	/^	T_EOF,$/;"	e	enum:token_type	file:
T_EOL	cmd/pxe.c	/^	T_EOL,$/;"	e	enum:token_type	file:
T_EOL	scripts/kconfig/zconf.tab.c	/^     T_EOL = 286,$/;"	e	enum:yytokentype	file:
T_EOL	scripts/kconfig/zconf.y	/^%token T_EOL$/;"	t
T_EQUAL	scripts/kconfig/zconf.tab.c	/^     T_EQUAL = 289,$/;"	e	enum:yytokentype	file:
T_FAW	drivers/ddr/microchip/ddr2_timing.h	/^#define T_FAW	/;"	d
T_FDT	cmd/pxe.c	/^	T_FDT,$/;"	e	enum:token_type	file:
T_FDTDIR	cmd/pxe.c	/^	T_FDTDIR,$/;"	e	enum:token_type	file:
T_HELP	scripts/kconfig/zconf.tab.c	/^     T_HELP = 267,$/;"	e	enum:yytokentype	file:
T_HELP	scripts/kconfig/zconf.y	/^%token <id>T_HELP$/;"	t	typeref:typename:id
T_HELPTEXT	scripts/kconfig/zconf.tab.c	/^     T_HELPTEXT = 268,$/;"	e	enum:yytokentype	file:
T_HELPTEXT	scripts/kconfig/zconf.y	/^%token <string> T_HELPTEXT$/;"	t	typeref:typename:string
T_IF	scripts/kconfig/zconf.tab.c	/^     T_IF = 269,$/;"	e	enum:yytokentype	file:
T_IF	scripts/kconfig/zconf.y	/^%token <id>T_IF$/;"	t	typeref:typename:id
T_INCLUDE	cmd/pxe.c	/^	T_INCLUDE,$/;"	e	enum:token_type	file:
T_INITRD	cmd/pxe.c	/^	T_INITRD,$/;"	e	enum:token_type	file:
T_INVALID	cmd/pxe.c	/^	T_INVALID$/;"	e	enum:token_type	file:
T_IPAPPEND	cmd/pxe.c	/^	T_IPAPPEND,$/;"	e	enum:token_type	file:
T_KERNEL	cmd/pxe.c	/^	T_KERNEL,$/;"	e	enum:token_type	file:
T_LABEL	cmd/pxe.c	/^	T_LABEL,$/;"	e	enum:token_type	file:
T_LINUX	cmd/pxe.c	/^	T_LINUX,$/;"	e	enum:token_type	file:
T_LOCALBOOT	cmd/pxe.c	/^	T_LOCALBOOT,$/;"	e	enum:token_type	file:
T_MAINMENU	scripts/kconfig/zconf.tab.c	/^     T_MAINMENU = 258,$/;"	e	enum:yytokentype	file:
T_MAINMENU	scripts/kconfig/zconf.y	/^%token <id>T_MAINMENU$/;"	t	typeref:typename:id
T_MASK_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  T_MASK_REG	/;"	d
T_MENU	cmd/pxe.c	/^	T_MENU,$/;"	e	enum:token_type	file:
T_MENU	scripts/kconfig/zconf.tab.c	/^     T_MENU = 259,$/;"	e	enum:yytokentype	file:
T_MENU	scripts/kconfig/zconf.y	/^%token <id>T_MENU$/;"	t	typeref:typename:id
T_MENUCONFIG	scripts/kconfig/zconf.tab.c	/^     T_MENUCONFIG = 266,$/;"	e	enum:yytokentype	file:
T_MENUCONFIG	scripts/kconfig/zconf.y	/^%token <id>T_MENUCONFIG$/;"	t	typeref:typename:id
T_MRD_TCK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_MRD_TCK	/;"	d
T_NOT	scripts/kconfig/zconf.tab.c	/^     T_NOT = 290$/;"	e	enum:yytokentype	file:
T_ON	scripts/kconfig/zconf.tab.c	/^     T_ON = 280,$/;"	e	enum:yytokentype	file:
T_ON	scripts/kconfig/zconf.y	/^%token <id>T_ON$/;"	t	typeref:typename:id
T_ONTIMEOUT	cmd/pxe.c	/^	T_ONTIMEOUT,$/;"	e	enum:token_type	file:
T_OPEN_PAREN	scripts/kconfig/zconf.tab.c	/^     T_OPEN_PAREN = 285,$/;"	e	enum:yytokentype	file:
T_OPEN_PAREN	scripts/kconfig/zconf.y	/^%token T_OPEN_PAREN$/;"	t
T_OPTION	scripts/kconfig/zconf.tab.c	/^     T_OPTION = 279,$/;"	e	enum:yytokentype	file:
T_OPTION	scripts/kconfig/zconf.y	/^%token <id>T_OPTION$/;"	t	typeref:typename:id
T_OPTIONAL	scripts/kconfig/zconf.tab.c	/^     T_OPTIONAL = 272,$/;"	e	enum:yytokentype	file:
T_OPTIONAL	scripts/kconfig/zconf.y	/^%token <id>T_OPTIONAL$/;"	t	typeref:typename:id
T_OPT_ALLNOCONFIG_Y	scripts/kconfig/lkc.h	/^#define T_OPT_ALLNOCONFIG_Y	/;"	d
T_OPT_DEFCONFIG_LIST	scripts/kconfig/lkc.h	/^#define T_OPT_DEFCONFIG_LIST	/;"	d
T_OPT_ENV	scripts/kconfig/lkc.h	/^#define T_OPT_ENV	/;"	d
T_OPT_MODULES	scripts/kconfig/lkc.h	/^#define T_OPT_MODULES	/;"	d
T_OR	scripts/kconfig/zconf.tab.c	/^     T_OR = 287,$/;"	e	enum:yytokentype	file:
T_OWN	drivers/net/dc2114x.c	/^#define T_OWN	/;"	d	file:
T_PROMPT	cmd/pxe.c	/^	T_PROMPT,$/;"	e	enum:token_type	file:
T_PROMPT	scripts/kconfig/zconf.tab.c	/^     T_PROMPT = 273,$/;"	e	enum:yytokentype	file:
T_PROMPT	scripts/kconfig/zconf.y	/^%token <id>T_PROMPT$/;"	t	typeref:typename:id
T_RANGE	scripts/kconfig/zconf.tab.c	/^     T_RANGE = 277,$/;"	e	enum:yytokentype	file:
T_RANGE	scripts/kconfig/zconf.y	/^%token <id>T_RANGE$/;"	t	typeref:typename:id
T_RAS_MIN	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RAS_MIN	/;"	d
T_RC	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RC	/;"	d
T_RCD	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RCD	/;"	d
T_REFI_15_6	arch/arm/include/asm/emif.h	/^#define T_REFI_15_6	/;"	d
T_REFI_3_9	arch/arm/include/asm/emif.h	/^#define T_REFI_3_9	/;"	d
T_REFI_7_8	arch/arm/include/asm/emif.h	/^#define T_REFI_7_8	/;"	d
T_RFC_MIN	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RFC_MIN	/;"	d
T_RFI	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RFI	/;"	d
T_RP	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RP	/;"	d
T_RRD	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RRD	/;"	d
T_RRD_TCK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RRD_TCK	/;"	d
T_RTP	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RTP	/;"	d
T_RTP_TCK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_RTP_TCK	/;"	d
T_SELECT	scripts/kconfig/zconf.tab.c	/^     T_SELECT = 276,$/;"	e	enum:yytokentype	file:
T_SELECT	scripts/kconfig/zconf.y	/^%token <id>T_SELECT$/;"	t	typeref:typename:id
T_SOURCE	scripts/kconfig/zconf.tab.c	/^     T_SOURCE = 261,$/;"	e	enum:yytokentype	file:
T_SOURCE	scripts/kconfig/zconf.y	/^%token <id>T_SOURCE$/;"	t	typeref:typename:id
T_STRING	cmd/pxe.c	/^	T_STRING,$/;"	e	enum:token_type	file:
T_TIMEOUT	cmd/pxe.c	/^	T_TIMEOUT,$/;"	e	enum:token_type	file:
T_TITLE	cmd/pxe.c	/^	T_TITLE,$/;"	e	enum:token_type	file:
T_TYPE	scripts/kconfig/zconf.tab.c	/^     T_TYPE = 274,$/;"	e	enum:yytokentype	file:
T_TYPE	scripts/kconfig/zconf.y	/^%token <id>T_TYPE$/;"	t	typeref:typename:id
T_UNEQUAL	scripts/kconfig/zconf.tab.c	/^     T_UNEQUAL = 283,$/;"	e	enum:yytokentype	file:
T_UNEQUAL	scripts/kconfig/zconf.y	/^%token T_UNEQUAL$/;"	t
T_VALUE_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  T_VALUE_REG	/;"	d
T_VISIBLE	scripts/kconfig/zconf.tab.c	/^     T_VISIBLE = 278,$/;"	e	enum:yytokentype	file:
T_VISIBLE	scripts/kconfig/zconf.y	/^%token <id>T_VISIBLE$/;"	t	typeref:typename:id
T_WORD	scripts/kconfig/zconf.tab.c	/^     T_WORD = 281,$/;"	e	enum:yytokentype	file:
T_WORD	scripts/kconfig/zconf.y	/^%token <string> T_WORD$/;"	t	typeref:typename:string
T_WORD_QUOTE	scripts/kconfig/zconf.tab.c	/^     T_WORD_QUOTE = 282,$/;"	e	enum:yytokentype	file:
T_WORD_QUOTE	scripts/kconfig/zconf.y	/^%token <string> T_WORD_QUOTE$/;"	t	typeref:typename:string
T_WR	drivers/ddr/microchip/ddr2_timing.h	/^#define T_WR	/;"	d
T_WRDATA_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define T_WRDATA_EN	/;"	d
T_WRDATA_EN_DDR3	arch/arm/mach-exynos/exynos5_setup.h	/^#define T_WRDATA_EN_DDR3	/;"	d
T_WRDATA_EN_MASK	arch/arm/mach-exynos/exynos5_setup.h	/^#define T_WRDATA_EN_MASK	/;"	d
T_WRDATA_EN_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define T_WRDATA_EN_OFFSET	/;"	d
T_WTR	drivers/ddr/microchip/ddr2_timing.h	/^#define T_WTR	/;"	d
T_WTR_TCK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_WTR_TCK	/;"	d
T_XP_TCK	drivers/ddr/microchip/ddr2_timing.h	/^#define T_XP_TCK	/;"	d
T_XSNR	drivers/ddr/microchip/ddr2_timing.h	/^#define T_XSNR	/;"	d
T_den	arch/arm/cpu/armv7/omap4/emif.c	/^u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;$/;"	v	typeref:typename:u32 * const
T_den	arch/arm/cpu/armv7/omap5/emif.c	/^static u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;$/;"	v	typeref:typename:u32 * const	file:
T_num	arch/arm/cpu/armv7/omap4/emif.c	/^u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;$/;"	v	typeref:typename:u32 * const
T_num	arch/arm/cpu/armv7/omap5/emif.c	/^static u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;$/;"	v	typeref:typename:u32 * const	file:
TabTo	tools/dtoc/dtoc	/^def TabTo(num_tabs, str):$/;"	f
TabTo	tools/dtoc/dtoc.py	/^def TabTo(num_tabs, str):$/;"	f
Tag	drivers/usb/gadget/storage_common.c	/^	u32	Tag;			\/* Same as original command *\/$/;"	m	struct:bulk_cs_wrap	typeref:typename:u32	file:
Tag	drivers/usb/gadget/storage_common.c	/^	u32	Tag;			\/* Unique per command id *\/$/;"	m	struct:fsg_bulk_cb_wrap	typeref:typename:u32	file:
TaskTableEntry	include/MCD_dma.h	/^} TaskTableEntry;$/;"	t	typeref:struct:__anon0c34f9b30108
Tchr	board/samsung/smdk2410/lowlevel_init.S	/^#define Tchr	/;"	d	file:
TempCo	include/power/max17042_fg.h	/^#define TempCo	/;"	d
TenPolarity	drivers/net/natsemi.c	/^	TenPolarity	= 0x10000000,$/;"	e	enum:ChipConfigBits	file:
Term	tools/buildman/board.py	/^class Term:$/;"	c
TestBuild	tools/buildman/test.py	/^class TestBuild(unittest.TestCase):$/;"	c
TestFunctional	tools/buildman/func_test.py	/^class TestFunctional(unittest.TestCase):$/;"	c
TestPatch	tools/patman/test.py	/^class TestPatch(unittest.TestCase):$/;"	c
TestSettingsHasPath	tools/buildman/toolchain.py	/^    def TestSettingsHasPath(self, path):$/;"	m	class:Toolchains
TestSubprocess	tools/patman/cros_subprocess.py	/^class TestSubprocess(unittest.TestCase):$/;"	c
Testing real hardware	test/py/README.md	/^## Testing real hardware$/;"	s	chapter:U-Boot pytest suite
Testing sandbox	test/py/README.md	/^## Testing sandbox$/;"	s	chapter:U-Boot pytest suite
Testing under a debugger	test/py/README.md	/^### Testing under a debugger$/;"	S	section:U-Boot pytest suite""Testing sandbox
The	doc/README.x86	/^The 3rd one should be renamed to mrc.bin.$/;"	l
The	doc/README.x86	/^The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in$/;"	l
Then	doc/README.x86	/^Then 'ifdtool -x samus.bin' on your development machine will produce:$/;"	l
This	doc/README.x86	/^This document describes the information about U-Boot running on x86 targets,$/;"	l
This	doc/README.x86	/^This tells the Makefile to build u-boot.rom as a target.$/;"	l
This	doc/README.x86	/^This uses Intel FSP for 3rd generation Intel Core and Intel Celeron processors$/;"	l
This	doc/README.x86	/^This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.$/;"	l
This	doc/README.x86	/^This will provide the descriptor file - copy this into the correct place:$/;"	l
TimeDateStamp	include/pe.h	/^	uint32_t TimeDateStamp;$/;"	m	struct:_IMAGE_FILE_HEADER	typeref:typename:uint32_t
Timeout	test/py/u_boot_spawn.py	/^class Timeout(Exception):$/;"	c
Timer	drivers/net/rtl8139.c	/^	Timer=0x48,		\/* general-purpose counter. *\/$/;"	e	enum:RTL8139_registers	file:
Timer Support	drivers/timer/Kconfig	/^menu "Timer Support"$/;"	m
TimerIntrReg	drivers/net/rtl8139.c	/^	TimerIntrReg=0x54,	\/* intr if gp counter reaches this value *\/$/;"	e	enum:RTL8139_registers	file:
Timer_Control_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Timer_Control_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Timer_Control_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Timer_Control_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Timer_Counter_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Timer_Counter_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Timer_Counter_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Timer_Counter_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Timer_Reload_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Timer_Reload_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Timer_Reload_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Timer_Reload_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
TlclStartupIfNeeded	cmd/tpm_test.c	/^static uint32_t TlclStartupIfNeeded(void)$/;"	f	typeref:typename:uint32_t	file:
TmpFile	scripts/fill_scrapyard.py	/^class TmpFile:$/;"	c
To	doc/README.x86	/^To build a coreboot payload against another board, you can change the build$/;"	l
To	doc/README.x86	/^To get the rest, use 'cbfstool samus.bin print':$/;"	l
To	scripts/checkpatch.pl	/^	To:|$/;"	l
Too_Small_Time	lib/dhry/dhry_1.c	/^#define Too_Small_Time /;"	d	file:
Toolchain	tools/buildman/toolchain.py	/^class Toolchain:$/;"	c
Toolchains	tools/buildman/toolchain.py	/^class Toolchains:$/;"	c
Trace	lib/zlib/zutil.h	/^#  define Trace(/;"	d
Tracec	lib/zlib/zutil.h	/^#  define Tracec(/;"	d
Tracecv	lib/zlib/zutil.h	/^#  define Tracecv(/;"	d
Tracev	lib/zlib/zutil.h	/^#  define Tracev(/;"	d
Tracevv	lib/zlib/zutil.h	/^#  define Tracevv(/;"	d
Trc	board/samsung/smdk2410/lowlevel_init.S	/^#define Trc	/;"	d	file:
Trp	board/samsung/smdk2410/lowlevel_init.S	/^#define Trp	/;"	d	file:
Trp_200	board/mpl/vcma9/lowlevel_init.S	/^#define Trp_200	/;"	d	file:
Trp_250	board/mpl/vcma9/lowlevel_init.S	/^#define Trp_250	/;"	d	file:
Trp_266	board/mpl/vcma9/lowlevel_init.S	/^#define Trp_266	/;"	d	file:
True	lib/bzip2/bzlib_private.h	/^#define True /;"	d
True	lib/lzma/Types.h	/^#define True /;"	d
TrueType Fonts	drivers/video/fonts/Kconfig	/^menu "TrueType Fonts"$/;"	m
Tsrc_200	board/mpl/vcma9/lowlevel_init.S	/^#define Tsrc_200	/;"	d	file:
Tsrc_250	board/mpl/vcma9/lowlevel_init.S	/^#define Tsrc_250	/;"	d	file:
Tsrc_266	board/mpl/vcma9/lowlevel_init.S	/^#define Tsrc_266	/;"	d	file:
TwisterParm	drivers/net/rtl8139.c	/^	PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80,	\/* undocumented *\/$/;"	e	enum:RTL8139_registers	file:
Two	doc/README.x86	/^Two boards that use this configuration are Bayley Bay and Minnowboard MAX.$/;"	l
TxAborted	drivers/net/rtl8139.c	/^	TxOutOfWindow=0x20000000, TxAborted=0x40000000,$/;"	e	enum:TxStatusBits	file:
TxAddr0	drivers/net/rtl8139.c	/^	TxAddr0=0x20,		\/* Tx descriptors (also four 32bit). *\/$/;"	e	enum:RTL8139_registers	file:
TxAutoPad	drivers/net/natsemi.c	/^	TxAutoPad	= 0x10000000,$/;"	e	enum:TxConfig_bits	file:
TxAutoPad	drivers/net/ns8382x.c	/^	TxAutoPad	= 0x10000000,$/;"	e	enum:TxConfig_bits	file:
TxBD_DEF	drivers/qe/uec.h	/^#define TxBD_DEF	/;"	d
TxBD_ERROR	drivers/qe/uec.h	/^#define TxBD_ERROR	/;"	d
TxBD_INT	drivers/qe/uec.h	/^#define TxBD_INT	/;"	d
TxBD_LAST	drivers/net/fm/fm.h	/^#define TxBD_LAST	/;"	d
TxBD_LAST	drivers/qe/uec.h	/^#define TxBD_LAST	/;"	d
TxBD_LC	drivers/qe/uec.h	/^#define TxBD_LC	/;"	d
TxBD_PADCRC	drivers/qe/uec.h	/^#define TxBD_PADCRC	/;"	d
TxBD_PP	drivers/qe/uec.h	/^#define TxBD_PP	/;"	d
TxBD_RC	drivers/qe/uec.h	/^#define TxBD_RC	/;"	d
TxBD_READY	drivers/net/fm/fm.h	/^#define TxBD_READY	/;"	d
TxBD_READY	drivers/qe/uec.h	/^#define TxBD_READY	/;"	d
TxBD_RL	drivers/qe/uec.h	/^#define TxBD_RL	/;"	d
TxBD_TRUNC	drivers/qe/uec.h	/^#define TxBD_TRUNC	/;"	d
TxBD_TXCRC	drivers/qe/uec.h	/^#define TxBD_TXCRC	/;"	d
TxBD_UNDERRUN	drivers/qe/uec.h	/^#define TxBD_UNDERRUN	/;"	d
TxBD_WRAP	drivers/qe/uec.h	/^#define TxBD_WRAP	/;"	d
TxCB_CMD_EL	drivers/net/eepro100.c	/^#define TxCB_CMD_EL	/;"	d	file:
TxCB_CMD_I	drivers/net/eepro100.c	/^#define TxCB_CMD_I	/;"	d	file:
TxCB_CMD_NC	drivers/net/eepro100.c	/^#define TxCB_CMD_NC	/;"	d	file:
TxCB_CMD_S	drivers/net/eepro100.c	/^#define TxCB_CMD_S	/;"	d	file:
TxCB_CMD_SF	drivers/net/eepro100.c	/^#define TxCB_CMD_SF	/;"	d	file:
TxCB_CMD_TRANSMIT	drivers/net/eepro100.c	/^#define TxCB_CMD_TRANSMIT	/;"	d	file:
TxCB_COUNT_EOF	drivers/net/eepro100.c	/^#define TxCB_COUNT_EOF	/;"	d	file:
TxCB_COUNT_MASK	drivers/net/eepro100.c	/^#define TxCB_COUNT_MASK	/;"	d	file:
TxCarrierIgn	drivers/net/natsemi.c	/^	TxCarrierIgn	= 0x80000000$/;"	e	enum:TxConfig_bits	file:
TxCarrierIgn	drivers/net/ns8382x.c	/^	TxCarrierIgn	= 0x80000000$/;"	e	enum:TxConfig_bits	file:
TxCarrierLost	drivers/net/rtl8139.c	/^	TxCarrierLost=0x80000000,$/;"	e	enum:TxStatusBits	file:
TxCollRetry	drivers/net/natsemi.c	/^	TxCollRetry	= 0x800000,$/;"	e	enum:TxConfig_bits	file:
TxCollRetry	drivers/net/ns8382x.c	/^	TxCollRetry	= 0x00800000,$/;"	e	enum:TxConfig_bits	file:
TxConfig	drivers/net/natsemi.c	/^	TxConfig	= 0x24,$/;"	e	enum:register_offsets	file:
TxConfig	drivers/net/ns8382x.c	/^	TxConfig = 0x28,$/;"	e	enum:register_offsets	file:
TxConfig	drivers/net/rtl8139.c	/^	TxConfig=0x40, RxConfig=0x44,$/;"	e	enum:RTL8139_registers	file:
TxConfig	drivers/net/rtl8169.c	/^	TxConfig = 0x40,$/;"	e	enum:RTL8169_registers	file:
TxConfig_bits	drivers/net/natsemi.c	/^enum TxConfig_bits {$/;"	g	file:
TxConfig_bits	drivers/net/ns8382x.c	/^enum TxConfig_bits {$/;"	g	file:
TxDMAShift	drivers/net/rtl8169.c	/^	TxDMAShift = 8,		\/* DMA burst value (0-7) is shift this many bits *\/$/;"	e	enum:RTL8169_register_content	file:
TxDesc	drivers/net/rtl8169.c	/^struct TxDesc {$/;"	s	file:
TxDescArray	drivers/net/rtl8169.c	/^	struct TxDesc *TxDescArray;	\/* Index of 256-alignment Tx Descriptor buffer *\/$/;"	m	struct:rtl8169_private	typeref:struct:TxDesc *	file:
TxDescStartAddrHigh	drivers/net/rtl8169.c	/^	TxDescStartAddrHigh = 0x24,$/;"	e	enum:RTL8169_registers	file:
TxDescStartAddrLow	drivers/net/rtl8169.c	/^	TxDescStartAddrLow = 0x20,$/;"	e	enum:RTL8169_registers	file:
TxDescUnavail	drivers/net/rtl8169.c	/^	TxDescUnavail = 0x80,$/;"	e	enum:RTL8169_register_content	file:
TxDrthMask	drivers/net/natsemi.c	/^	TxDrthMask	= 0x3f,$/;"	e	enum:TxConfig_bits	file:
TxDrthMask	drivers/net/ns8382x.c	/^	TxDrthMask	= 0x000000ff,$/;"	e	enum:TxConfig_bits	file:
TxErr	drivers/net/rtl8139.c	/^	TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,$/;"	e	enum:IntrStatusBits	file:
TxErr	drivers/net/rtl8169.c	/^	TxErr = 0x08,$/;"	e	enum:RTL8169_register_content	file:
TxFD	drivers/net/eepro100.c	/^struct TxFD {				\/* Transmit frame descriptor set. *\/$/;"	s	file:
TxFlowCtrl	drivers/net/rtl8169.c	/^	TxFlowCtrl = 0x40,$/;"	e	enum:RTL8169_register_content	file:
TxFlthMask	drivers/net/natsemi.c	/^	TxFlthMask	= 0x3f00,$/;"	e	enum:TxConfig_bits	file:
TxFlthMask	drivers/net/ns8382x.c	/^	TxFlthMask	= 0x0000ff00,$/;"	e	enum:TxConfig_bits	file:
TxHDescStartAddrHigh	drivers/net/rtl8169.c	/^	TxHDescStartAddrHigh = 0x2c,$/;"	e	enum:RTL8169_registers	file:
TxHDescStartAddrLow	drivers/net/rtl8169.c	/^	TxHDescStartAddrLow = 0x28,$/;"	e	enum:RTL8169_registers	file:
TxHeartIgn	drivers/net/natsemi.c	/^	TxHeartIgn	= 0x40000000,$/;"	e	enum:TxConfig_bits	file:
TxHeartIgn	drivers/net/ns8382x.c	/^	TxHeartIgn	= 0x40000000,$/;"	e	enum:TxConfig_bits	file:
TxHostOwns	drivers/net/rtl8139.c	/^	TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,$/;"	e	enum:TxStatusBits	file:
TxInterFrameGapShift	drivers/net/rtl8169.c	/^	TxInterFrameGapShift = 24,$/;"	e	enum:RTL8169_register_content	file:
TxMacLoop	drivers/net/natsemi.c	/^	TxMacLoop	= 0x20000000,$/;"	e	enum:TxConfig_bits	file:
TxMacLoop	drivers/net/ns8382x.c	/^	TxMacLoop	= 0x20000000,$/;"	e	enum:TxConfig_bits	file:
TxMxdmaMask	drivers/net/natsemi.c	/^	TxMxdmaMask	= 0x700000,$/;"	e	enum:TxConfig_bits	file:
TxMxdmaMask	drivers/net/ns8382x.c	/^	TxMxdmaMask	= 0x00700000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_1024	drivers/net/ns8382x.c	/^	TxMxdma_1024	= 0x00000000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_128	drivers/net/natsemi.c	/^	TxMxdma_128	= 0x600000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_128	drivers/net/ns8382x.c	/^	TxMxdma_128	= 0x00500000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_16	drivers/net/natsemi.c	/^	TxMxdma_16	= 0x300000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_16	drivers/net/ns8382x.c	/^	TxMxdma_16	= 0x00200000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_256	drivers/net/natsemi.c	/^	TxMxdma_256	= 0x700000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_256	drivers/net/ns8382x.c	/^	TxMxdma_256	= 0x00600000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_32	drivers/net/natsemi.c	/^	TxMxdma_32	= 0x400000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_32	drivers/net/ns8382x.c	/^	TxMxdma_32	= 0x00300000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_4	drivers/net/natsemi.c	/^	TxMxdma_4	= 0x100000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_512	drivers/net/natsemi.c	/^	TxMxdma_512	= 0x0,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_512	drivers/net/ns8382x.c	/^	TxMxdma_512	= 0x00700000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_64	drivers/net/natsemi.c	/^	TxMxdma_64	= 0x500000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_64	drivers/net/ns8382x.c	/^	TxMxdma_64	= 0x00400000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_8	drivers/net/natsemi.c	/^	TxMxdma_8	= 0x200000,$/;"	e	enum:TxConfig_bits	file:
TxMxdma_8	drivers/net/ns8382x.c	/^	TxMxdma_8	= 0x00100000,$/;"	e	enum:TxConfig_bits	file:
TxOK	drivers/net/rtl8139.c	/^	TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,$/;"	e	enum:IntrStatusBits	file:
TxOK	drivers/net/rtl8169.c	/^	TxOK = 0x04,$/;"	e	enum:RTL8169_register_content	file:
TxOff	drivers/net/natsemi.c	/^	TxOff		= 0x02,$/;"	e	enum:ChipCmdBits	file:
TxOff	drivers/net/ns8382x.c	/^	TxOff = 0x02,$/;"	e	enum:ChipCmdBits	file:
TxOn	drivers/net/natsemi.c	/^	TxOn		= 0x01$/;"	e	enum:ChipCmdBits	file:
TxOn	drivers/net/ns8382x.c	/^	TxOn = 0x01$/;"	e	enum:ChipCmdBits	file:
TxOutOfWindow	drivers/net/rtl8139.c	/^	TxOutOfWindow=0x20000000, TxAborted=0x40000000,$/;"	e	enum:TxStatusBits	file:
TxPoll	drivers/net/rtl8169.c	/^	TxPoll = 0x38,$/;"	e	enum:RTL8169_registers	file:
TxReset	drivers/net/natsemi.c	/^	TxReset		= 0x10,$/;"	e	enum:ChipCmdBits	file:
TxReset	drivers/net/ns8382x.c	/^	TxReset = 0x10,$/;"	e	enum:ChipCmdBits	file:
TxRingPtr	drivers/net/natsemi.c	/^	TxRingPtr	= 0x20,$/;"	e	enum:register_offsets	file:
TxRingPtr	drivers/net/ns8382x.c	/^	TxRingPtr = 0x20,$/;"	e	enum:register_offsets	file:
TxRingPtrHi	drivers/net/ns8382x.c	/^	TxRingPtrHi = 0x24,$/;"	e	enum:register_offsets	file:
TxStatOK	drivers/net/rtl8139.c	/^	TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,$/;"	e	enum:TxStatusBits	file:
TxStatus0	drivers/net/rtl8139.c	/^	TxStatus0=0x10,		\/* Transmit status (four 32bit registers). *\/$/;"	e	enum:RTL8139_registers	file:
TxStatusBits	drivers/net/rtl8139.c	/^enum TxStatusBits {$/;"	g	file:
TxSummary	drivers/net/rtl8139.c	/^	TxSummary=0x60,$/;"	e	enum:RTL8139_registers	file:
TxUnderrun	drivers/net/rtl8139.c	/^	TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,$/;"	e	enum:TxStatusBits	file:
Tx_COE_EN_	drivers/usb/eth/smsc95xx.c	/^#define Tx_COE_EN_	/;"	d	file:
Tx_skbuff	drivers/net/rtl8169.c	/^	unsigned char *Tx_skbuff[NUM_TX_DESC];$/;"	m	struct:rtl8169_private	typeref:typename:unsigned char * []	file:
Type	include/pe.h	/^	uint16_t Type;$/;"	m	struct:_IMAGE_RELOCATION	typeref:typename:uint16_t
U	arch/powerpc/cpu/mpc8xx/video.c	/^	unsigned char V, Y1, U, Y2;$/;"	m	struct:__anonce1d55370108	typeref:typename:unsigned char	file:
U-Boot $UBOOTVERSION Configuration	Kconfig	/^mainmenu "U-Boot $UBOOTVERSION Configuration"$/;"	M
U-Boot `.config` feature usage	test/py/README.md	/^### U-Boot `.config` feature usage$/;"	S	section:U-Boot pytest suite""Testing real hardware
U-Boot pytest suite	test/py/README.md	/^# U-Boot pytest suite$/;"	c
U16	fs/jffs2/compr_lzo.c	/^#define U16 /;"	d	file:
U16	lib/lz4_wrapper.c	/^typedef uint16_t U16;$/;"	t	typeref:typename:uint16_t	file:
U16_MAX	include/linux/kernel.h	/^#define U16_MAX	/;"	d
U1U2_SPDWN_EN	drivers/usb/eth/r8152.h	/^#define U1U2_SPDWN_EN	/;"	d
U2P3_ENABLE	drivers/usb/eth/r8152.h	/^#define U2P3_ENABLE	/;"	d
U32	fs/jffs2/compr_lzo.c	/^#define U32 /;"	d	file:
U32	lib/lz4_wrapper.c	/^typedef uint32_t U32;$/;"	t	typeref:typename:uint32_t	file:
U32_MAX	include/linux/kernel.h	/^#define U32_MAX	/;"	d
U64	lib/lz4_wrapper.c	/^typedef uint64_t U64;$/;"	t	typeref:typename:uint64_t	file:
U64_MAX	include/linux/kernel.h	/^#define U64_MAX	/;"	d
U64_TO_U32_HIGH	arch/powerpc/include/asm/4xx_pcie.h	/^#define U64_TO_U32_HIGH(/;"	d
U64_TO_U32_LOW	arch/powerpc/include/asm/4xx_pcie.h	/^#define U64_TO_U32_LOW(/;"	d
U8	fs/jffs2/compr_lzo.c	/^#define U8 /;"	d	file:
U8_MAX	include/linux/kernel.h	/^#define U8_MAX	/;"	d
UACT	drivers/usb/host/r8a66597.h	/^#define	UACT	/;"	d
UART0	arch/powerpc/dts/arches.dts	/^			UART0: serial@ef600300 {$/;"	l
UART0	arch/powerpc/dts/canyonlands.dts	/^			UART0: serial@ef600300 {$/;"	l
UART0	arch/powerpc/dts/glacier.dts	/^			UART0: serial@ef600300 {$/;"	l
UART0CTS_146_EN	board/bf609-ezkit/soft_switch.h	/^#define UART0CTS_146_EN /;"	d
UART0CTS_EN	board/bf609-ezkit/soft_switch.h	/^#define UART0CTS_EN /;"	d
UART0CTS_RST_EN	board/bf609-ezkit/soft_switch.h	/^#define UART0CTS_RST_EN /;"	d
UART0CTS_RTS_LPBK	board/bf609-ezkit/soft_switch.h	/^#define UART0CTS_RTS_LPBK /;"	d
UART0RTS_EN	board/bf609-ezkit/soft_switch.h	/^#define UART0RTS_EN /;"	d
UART0RX_EN	board/bf609-ezkit/soft_switch.h	/^#define UART0RX_EN /;"	d
UART0_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART0_ADDR /;"	d
UART0_AP	board/mpl/mip405/mip405.h	/^#define UART0_AP	/;"	d
UART0_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define UART0_BASE	/;"	d
UART0_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define UART0_BASE	/;"	d
UART0_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define UART0_BASE	/;"	d
UART0_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define UART0_BASE	/;"	d
UART0_BASE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define UART0_BASE	/;"	d
UART0_BASE	arch/x86/include/asm/ibmpc.h	/^#define UART0_BASE	/;"	d
UART0_BEM	board/mpl/mip405/mip405.h	/^#define UART0_BEM	/;"	d
UART0_BME	board/mpl/mip405/mip405.h	/^#define UART0_BME	/;"	d
UART0_BS	board/mpl/mip405/mip405.h	/^#define UART0_BS	/;"	d
UART0_BU	board/mpl/mip405/mip405.h	/^#define UART0_BU	/;"	d
UART0_BW	board/mpl/mip405/mip405.h	/^#define UART0_BW	/;"	d
UART0_CLK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_CLK /;"	d
UART0_CR	board/mpl/mip405/mip405.h	/^#define UART0_CR	/;"	d
UART0_CSN	board/mpl/mip405/mip405.h	/^#define UART0_CSN	/;"	d
UART0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_CTL /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_DLH /;"	d
UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_DLH /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_DLL /;"	d
UART0_DLL	arch/blackfin/include/asm/serial1.h	/^# define UART0_DLL /;"	d
UART0_ENABLE_MASK	arch/m68k/include/asm/m5275.h	/^#define UART0_ENABLE_MASK	/;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_GCTL /;"	d
UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_GCTL /;"	d
UART0_IER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_IER /;"	d
UART0_IER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_IER /;"	d
UART0_IER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_IER /;"	d
UART0_IER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_IER /;"	d
UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_IER_CLEAR /;"	d
UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_IER_CLEAR /;"	d
UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_IER_CLEAR /;"	d
UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_IER_CLEAR /;"	d
UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_IER_CLEAR /;"	d
UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_IER_CLEAR /;"	d
UART0_IER_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_IER_SET /;"	d
UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_IER_SET /;"	d
UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_IER_SET /;"	d
UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_IER_SET /;"	d
UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_IER_SET /;"	d
UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_IER_SET /;"	d
UART0_IIR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_IIR /;"	d
UART0_IIR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_IIR /;"	d
UART0_IIR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_IIR /;"	d
UART0_IIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_IIR /;"	d
UART0_IMSK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_IMSK /;"	d
UART0_IMSK_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_IMSK_CLR /;"	d
UART0_IMSK_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_IMSK_SET /;"	d
UART0_IRQ	arch/x86/include/asm/ibmpc.h	/^#define UART0_IRQ	/;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_LCR /;"	d
UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_LCR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_LSR /;"	d
UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_LSR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_MCR /;"	d
UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_MCR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_MSR /;"	d
UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_MSR /;"	d
UART0_OEN	board/mpl/mip405/mip405.h	/^#define UART0_OEN	/;"	d
UART0_PEN	board/mpl/mip405/mip405.h	/^#define UART0_PEN	/;"	d
UART0_PORT_F	board/sunxi/Kconfig	/^config UART0_PORT_F$/;"	c
UART0_PWREMU_MGMT	arch/arm/mach-davinci/include/mach/hardware.h	/^#define UART0_PWREMU_MGMT	/;"	d
UART0_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART0_RATIO	/;"	d
UART0_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART0_RATIO	/;"	d
UART0_RATIO	board/samsung/odroid/setup.h	/^#define UART0_RATIO(/;"	d
UART0_RATIO	board/samsung/trats/setup.h	/^#define UART0_RATIO	/;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART0_RBR /;"	d
UART0_RBR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_RBR /;"	d
UART0_RE	board/mpl/mip405/mip405.h	/^#define UART0_RE	/;"	d
UART0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART0_RESET	/;"	d
UART0_REVID	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_REVID /;"	d
UART0_RSR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_RSR /;"	d
UART0_RXCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_RXCNT /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_SCR /;"	d
UART0_SCR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_SCR /;"	d
UART0_SDR	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UART0_SDR	/;"	d	file:
UART0_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART0_SEL	/;"	d
UART0_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART0_SEL	/;"	d
UART0_SEL	board/samsung/odroid/setup.h	/^#define UART0_SEL(/;"	d
UART0_SEL	board/samsung/trats/setup.h	/^#define UART0_SEL	/;"	d
UART0_SOR	board/mpl/mip405/mip405.h	/^#define UART0_SOR	/;"	d
UART0_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_STAT /;"	d
UART0_TAIP	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_TAIP /;"	d
UART0_TH	board/mpl/mip405/mip405.h	/^#define UART0_TH	/;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART0_THR /;"	d
UART0_THR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_THR /;"	d
UART0_TSR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_TSR /;"	d
UART0_TWE	board/mpl/mip405/mip405.h	/^#define UART0_TWE	/;"	d
UART0_TXCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART0_TXCNT /;"	d
UART0_WBF	board/mpl/mip405/mip405.h	/^#define UART0_WBF	/;"	d
UART0_WBN	board/mpl/mip405/mip405.h	/^#define UART0_WBN	/;"	d
UART1	arch/powerpc/dts/canyonlands.dts	/^			UART1: serial@ef600400 {$/;"	l
UART1	arch/powerpc/dts/glacier.dts	/^			UART1: serial@ef600400 {$/;"	l
UART1RX_RACC	include/faraday/ftpmu010.h	/^	unsigned int	UART1RX_RACC;	\/* 0xAC *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
UART1TX_RACC	include/faraday/ftpmu010.h	/^	unsigned int	UART1TX_RACC;	\/* 0xA8 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
UART1_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART1_ADDR /;"	d
UART1_AP	board/mpl/mip405/mip405.h	/^#define UART1_AP /;"	d
UART1_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART1_BASE /;"	d
UART1_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define UART1_BASE	/;"	d
UART1_BASE	arch/x86/include/asm/ibmpc.h	/^#define UART1_BASE	/;"	d
UART1_BAUD	arch/arm/include/asm/arch-mx35/clock.h	/^	UART1_BAUD,$/;"	e	enum:mxc_peri_clock
UART1_CLK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_CLK /;"	d
UART1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART1_CLK_ROOT = 95,$/;"	e	enum:clk_root_index
UART1_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART1_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
UART1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART1_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART1_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART1_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART1_CR	board/mpl/mip405/mip405.h	/^#define UART1_CR	/;"	d
UART1_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_CTL /;"	d
UART1_CTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART1_CTS	/;"	d
UART1_CTSN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART1_CTSN	/;"	d
UART1_CTS_RTS	board/amcc/yucca/yucca.h	/^	UART1_CTS_RTS,$/;"	e	enum:config_list
UART1_DLH	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_DLH /;"	d
UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_DLH /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_DLL /;"	d
UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_DLL /;"	d
UART1_ENABLE_MASK	arch/m68k/include/asm/m5275.h	/^#define UART1_ENABLE_MASK	/;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_GCTL /;"	d
UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_GCTL /;"	d
UART1_GPIOA_9_10	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	UART1_GPIOA_9_10 = 0,$/;"	e	enum:periph_id
UART1_GPIOA_9_10	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	UART1_GPIOA_9_10 = 0,$/;"	e	enum:periph_id
UART1_IER	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_IER /;"	d
UART1_IER	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_IER /;"	d
UART1_IER	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_IER /;"	d
UART1_IER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_IER /;"	d
UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_IER_CLEAR /;"	d
UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_IER_CLEAR /;"	d
UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_IER_CLEAR /;"	d
UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_IER_CLEAR /;"	d
UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_IER_CLEAR /;"	d
UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_IER_CLEAR /;"	d
UART1_IER_SET	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_IER_SET /;"	d
UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_IER_SET /;"	d
UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_IER_SET /;"	d
UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_IER_SET /;"	d
UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_IER_SET /;"	d
UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_IER_SET /;"	d
UART1_IIR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_IIR /;"	d
UART1_IIR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_IIR /;"	d
UART1_IIR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_IIR /;"	d
UART1_IIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_IIR /;"	d
UART1_IMSK	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_IMSK /;"	d
UART1_IMSK_CLR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_IMSK_CLR /;"	d
UART1_IMSK_SET	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_IMSK_SET /;"	d
UART1_IN_PAD_CTRL	board/freescale/mx25pdk/mx25pdk.c	/^#define UART1_IN_PAD_CTRL	/;"	d	file:
UART1_IOBASE	include/smsc_sio1007.h	/^#define UART1_IOBASE	/;"	d
UART1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART1_IPS_BASE_ADDR /;"	d
UART1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART1_IPS_BASE_ADDR /;"	d
UART1_IRQ	arch/x86/include/asm/ibmpc.h	/^#define UART1_IRQ	/;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_LCR /;"	d
UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_LCR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_LSR /;"	d
UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_LSR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_MCR /;"	d
UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_MCR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_MSR /;"	d
UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_MSR /;"	d
UART1_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UART1_OFFSET	/;"	d
UART1_OUT_PAD_CTRL	board/freescale/mx25pdk/mx25pdk.c	/^#define UART1_OUT_PAD_CTRL	/;"	d	file:
UART1_PATH	board/gateworks/gw_ventana/gw_ventana.c	/^#define UART1_PATH	/;"	d	file:
UART1_POWER_ON	include/smsc_sio1007.h	/^#define UART1_POWER_ON	/;"	d
UART1_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART1_RATIO	/;"	d
UART1_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART1_RATIO	/;"	d
UART1_RATIO	board/samsung/odroid/setup.h	/^#define UART1_RATIO(/;"	d
UART1_RATIO	board/samsung/trats/setup.h	/^#define UART1_RATIO	/;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_RBR /;"	d
UART1_RBR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_RBR /;"	d
UART1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define UART1_RESET	/;"	d
UART1_REVID	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_REVID /;"	d
UART1_RSR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_RSR /;"	d
UART1_RTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART1_RTS	/;"	d
UART1_RTSN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART1_RTSN	/;"	d
UART1_RX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART1_RX	/;"	d
UART1_RXCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_RXCNT /;"	d
UART1_RXD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART1_RXD	/;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_SCR /;"	d
UART1_SCR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_SCR /;"	d
UART1_SDR	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UART1_SDR	/;"	d	file:
UART1_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART1_SEL	/;"	d
UART1_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART1_SEL	/;"	d
UART1_SEL	board/samsung/odroid/setup.h	/^#define UART1_SEL(/;"	d
UART1_SEL	board/samsung/trats/setup.h	/^#define UART1_SEL	/;"	d
UART1_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_STAT /;"	d
UART1_TAIP	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_TAIP /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART1_THR /;"	d
UART1_THR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_THR /;"	d
UART1_TSR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_TSR /;"	d
UART1_TX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART1_TX	/;"	d
UART1_TXCNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define UART1_TXCNT /;"	d
UART1_TXD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART1_TXD	/;"	d
UART2	arch/powerpc/dts/glacier.dts	/^			UART2: serial@ef600500 {$/;"	l
UART2RX_RACC	include/faraday/ftpmu010.h	/^	unsigned int	UART2RX_RACC;	\/* 0xB4 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
UART2TX_RACC	include/faraday/ftpmu010.h	/^	unsigned int	UART2TX_RACC;	\/* 0xB0 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
UART2_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART2_ADDR /;"	d
UART2_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART2_BASE /;"	d
UART2_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define UART2_BASE	/;"	d
UART2_BASE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define UART2_BASE	/;"	d
UART2_BAUD	arch/arm/include/asm/arch-mx35/clock.h	/^	UART2_BAUD,$/;"	e	enum:mxc_peri_clock
UART2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART2_CLK_ROOT = 96,$/;"	e	enum:clk_root_index
UART2_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART2_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
UART2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART2_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART2_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART2_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART2_CTS	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART2_CTS	/;"	d
UART2_CTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART2_CTS	/;"	d
UART2_CTSN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART2_CTSN	/;"	d
UART2_DLH	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_DLH /;"	d
UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_DLH /;"	d
UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_DLH /;"	d
UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_DLH /;"	d
UART2_DLL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_DLL /;"	d
UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_DLL /;"	d
UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_DLL /;"	d
UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_DLL /;"	d
UART2_ENABLE_MASK	arch/m68k/include/asm/m5275.h	/^#define UART2_ENABLE_MASK	/;"	d
UART2_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_GCTL /;"	d
UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_GCTL /;"	d
UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_GCTL /;"	d
UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_GCTL /;"	d
UART2_GPIOD_5_6	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	UART2_GPIOD_5_6,$/;"	e	enum:periph_id
UART2_GPIOD_5_6	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	UART2_GPIOD_5_6,$/;"	e	enum:periph_id
UART2_IER	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_IER /;"	d
UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_IER_CLEAR /;"	d
UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_IER_CLEAR /;"	d
UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_IER_CLEAR /;"	d
UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_IER_SET /;"	d
UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_IER_SET /;"	d
UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_IER_SET /;"	d
UART2_IIR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_IIR /;"	d
UART2_IN_SERVICE_MODE	board/amcc/yucca/yucca.h	/^	UART2_IN_SERVICE_MODE,$/;"	e	enum:config_list
UART2_IOBASE	include/smsc_sio1007.h	/^#define UART2_IOBASE	/;"	d
UART2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART2_IPS_BASE_ADDR /;"	d
UART2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART2_IPS_BASE_ADDR /;"	d
UART2_LCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_LCR /;"	d
UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_LCR /;"	d
UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_LCR /;"	d
UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_LCR /;"	d
UART2_LSR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_LSR /;"	d
UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_LSR /;"	d
UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_LSR /;"	d
UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_LSR /;"	d
UART2_MCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_MCR /;"	d
UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_MCR /;"	d
UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_MCR /;"	d
UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_MCR /;"	d
UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_MSR /;"	d
UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_MSR /;"	d
UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_MSR /;"	d
UART2_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UART2_OFFSET	/;"	d
UART2_POWER_ON	include/smsc_sio1007.h	/^#define UART2_POWER_ON	/;"	d
UART2_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART2_RATIO	/;"	d
UART2_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART2_RATIO	/;"	d
UART2_RATIO	board/samsung/odroid/setup.h	/^#define UART2_RATIO(/;"	d
UART2_RATIO	board/samsung/trats/setup.h	/^#define UART2_RATIO	/;"	d
UART2_RBR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_RBR /;"	d
UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_RBR /;"	d
UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_RBR /;"	d
UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_RBR /;"	d
UART2_RTS	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART2_RTS	/;"	d
UART2_RTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART2_RTS	/;"	d
UART2_RTSN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART2_RTSN	/;"	d
UART2_RX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART2_RX	/;"	d
UART2_RX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART2_RX	/;"	d
UART2_RXD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART2_RXD	/;"	d
UART2_SCR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_SCR /;"	d
UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_SCR /;"	d
UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_SCR /;"	d
UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_SCR /;"	d
UART2_SDR	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UART2_SDR	/;"	d	file:
UART2_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART2_SEL	/;"	d
UART2_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART2_SEL	/;"	d
UART2_SEL	board/samsung/odroid/setup.h	/^#define UART2_SEL(/;"	d
UART2_SEL	board/samsung/trats/setup.h	/^#define UART2_SEL	/;"	d
UART2_THR	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define UART2_THR /;"	d
UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART2_THR /;"	d
UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART2_THR /;"	d
UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART2_THR /;"	d
UART2_TX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART2_TX	/;"	d
UART2_TX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART2_TX	/;"	d
UART2_TXD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART2_TXD	/;"	d
UART3	arch/powerpc/dts/glacier.dts	/^			UART3: serial@ef600600 {$/;"	l
UART3_ADDR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART3_ADDR /;"	d
UART3_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART3_BASE /;"	d
UART3_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define UART3_BASE	/;"	d
UART3_BASE	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define UART3_BASE	/;"	d
UART3_BAUD	arch/arm/include/asm/arch-mx35/clock.h	/^	UART3_BAUD,$/;"	e	enum:mxc_peri_clock
UART3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART3_CLK_ROOT = 97,$/;"	e	enum:clk_root_index
UART3_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART3_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
UART3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART3_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART3_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART3_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART3_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART3_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART3_CTS_RCTX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART3_CTS_RCTX	/;"	d
UART3_CTS_RCTX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART3_CTS_RCTX	/;"	d
UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_DLH /;"	d
UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_DLH /;"	d
UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_DLH /;"	d
UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_DLH /;"	d
UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_DLH /;"	d
UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_DLL /;"	d
UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_DLL /;"	d
UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_DLL /;"	d
UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_DLL /;"	d
UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_DLL /;"	d
UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_GCTL /;"	d
UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_GCTL /;"	d
UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_GCTL /;"	d
UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_GCTL /;"	d
UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_GCTL /;"	d
UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_IER_CLEAR /;"	d
UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_IER_CLEAR /;"	d
UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_IER_CLEAR /;"	d
UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_IER_CLEAR /;"	d
UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_IER_CLEAR /;"	d
UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_IER_SET /;"	d
UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_IER_SET /;"	d
UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_IER_SET /;"	d
UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_IER_SET /;"	d
UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_IER_SET /;"	d
UART3_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART3_IPS_BASE_ADDR /;"	d
UART3_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART3_IPS_BASE_ADDR /;"	d
UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_LCR /;"	d
UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_LCR /;"	d
UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_LCR /;"	d
UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_LCR /;"	d
UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_LCR /;"	d
UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_LSR /;"	d
UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_LSR /;"	d
UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_LSR /;"	d
UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_LSR /;"	d
UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_LSR /;"	d
UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_MCR /;"	d
UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_MCR /;"	d
UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_MCR /;"	d
UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_MCR /;"	d
UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_MCR /;"	d
UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_MSR /;"	d
UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_MSR /;"	d
UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_MSR /;"	d
UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_MSR /;"	d
UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_MSR /;"	d
UART3_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UART3_OFFSET	/;"	d
UART3_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART3_RATIO	/;"	d
UART3_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART3_RATIO	/;"	d
UART3_RATIO	board/samsung/odroid/setup.h	/^#define UART3_RATIO(/;"	d
UART3_RATIO	board/samsung/trats/setup.h	/^#define UART3_RATIO	/;"	d
UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_RBR /;"	d
UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_RBR /;"	d
UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_RBR /;"	d
UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_RBR /;"	d
UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_RBR /;"	d
UART3_RTS_IRSD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART3_RTS_IRSD	/;"	d
UART3_RTS_SD	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART3_RTS_SD	/;"	d
UART3_RXD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART3_RXD	/;"	d
UART3_RX_IRRX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART3_RX_IRRX	/;"	d
UART3_RX_IRRX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART3_RX_IRRX	/;"	d
UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_SCR /;"	d
UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_SCR /;"	d
UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_SCR /;"	d
UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_SCR /;"	d
UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_SCR /;"	d
UART3_SDR	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UART3_SDR	/;"	d	file:
UART3_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART3_SEL	/;"	d
UART3_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART3_SEL	/;"	d
UART3_SEL	board/samsung/odroid/setup.h	/^#define UART3_SEL(/;"	d
UART3_SEL	board/samsung/trats/setup.h	/^#define UART3_SEL	/;"	d
UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define UART3_THR /;"	d
UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define UART3_THR /;"	d
UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define UART3_THR /;"	d
UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define UART3_THR /;"	d
UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define UART3_THR /;"	d
UART3_TXD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define UART3_TXD	/;"	d
UART3_TX_IRTX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART3_TX_IRTX	/;"	d
UART3_TX_IRTX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART3_TX_IRTX	/;"	d
UART4_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define UART4_BASE	/;"	d
UART4_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define UART4_BASE	/;"	d
UART4_BASE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define UART4_BASE	/;"	d
UART4_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define UART4_BASE	/;"	d
UART4_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART4_BASE /;"	d
UART4_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define UART4_BASE	/;"	d
UART4_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define UART4_BASE_ADDR /;"	d
UART4_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART4_CLK_ROOT = 98,$/;"	e	enum:clk_root_index
UART4_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART4_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
UART4_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART4_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART4_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART4_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART4_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART4_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART4_IPS_BASE_ADDR /;"	d
UART4_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART4_IPS_BASE_ADDR /;"	d
UART4_PAD_CTRL	board/tqc/tqma6/tqma6_wru4.c	/^#define UART4_PAD_CTRL /;"	d	file:
UART4_RATIO	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART4_RATIO	/;"	d
UART4_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART4_RATIO	/;"	d
UART4_RATIO	board/samsung/odroid/setup.h	/^#define UART4_RATIO(/;"	d
UART4_RATIO	board/samsung/trats/setup.h	/^#define UART4_RATIO	/;"	d
UART4_RTS_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define UART4_RTS_CTL	/;"	d
UART4_RX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART4_RX	/;"	d
UART4_RXD_CTL	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define UART4_RXD_CTL	/;"	d
UART4_SEL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART4_SEL	/;"	d
UART4_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART4_SEL	/;"	d
UART4_SEL	board/samsung/odroid/setup.h	/^#define UART4_SEL(/;"	d
UART4_SEL	board/samsung/trats/setup.h	/^#define UART4_SEL	/;"	d
UART4_TX	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UART4_TX	/;"	d
UART5_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define UART5_BASE	/;"	d
UART5_BASE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define UART5_BASE	/;"	d
UART5_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define UART5_BASE	/;"	d
UART5_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART5_BASE /;"	d
UART5_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define UART5_BASE_ADDR /;"	d
UART5_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART5_CLK_ROOT = 99,$/;"	e	enum:clk_root_index
UART5_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART5_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
UART5_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART5_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART5_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART5_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART5_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART5_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART5_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART5_CTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART5_CTS	/;"	d
UART5_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART5_IPS_BASE_ADDR /;"	d
UART5_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART5_IPS_BASE_ADDR /;"	d
UART5_RATIO	arch/arm/mach-exynos/exynos5_setup.h	/^#define UART5_RATIO	/;"	d
UART5_RATIO	board/samsung/trats/setup.h	/^#define UART5_RATIO	/;"	d
UART5_RTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART5_RTS	/;"	d
UART5_RX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART5_RX	/;"	d
UART5_SEL	board/samsung/trats/setup.h	/^#define UART5_SEL	/;"	d
UART5_TX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART5_TX	/;"	d
UART6_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define UART6_BASE	/;"	d
UART6_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART6_BASE_ADDR /;"	d
UART6_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART6_CLK_ROOT = 100,$/;"	e	enum:clk_root_index
UART6_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART6_CLK_ROOT_FROM_EXT_CLK_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_EXT_CLK_3	/;"	d
UART6_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART6_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART6_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART6_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART6_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART6_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART6_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART6_CTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART6_CTS	/;"	d
UART6_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART6_IPS_BASE_ADDR /;"	d
UART6_RTS	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART6_RTS	/;"	d
UART6_RX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART6_RX	/;"	d
UART6_TX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define UART6_TX	/;"	d
UART7_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	UART7_CLK_ROOT = 101,$/;"	e	enum:clk_root_index
UART7_CLK_ROOT_FROM_EXT_CLK_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_EXT_CLK_2	/;"	d
UART7_CLK_ROOT_FROM_EXT_CLK_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_EXT_CLK_4	/;"	d
UART7_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
UART7_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK	/;"	d
UART7_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
UART7_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
UART7_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
UART7_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define UART7_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
UART7_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define UART7_IPS_BASE_ADDR /;"	d
UART8_BASE	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART8_BASE /;"	d
UART8_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define UART8_IPS_BASE_ADDR /;"	d
UARTA	arch/arm/mach-tegra/board.c	/^	UARTA	= 1 << 0,$/;"	e	enum:__anon4241e8020103	file:
UARTAPP_AUTOBAUD_BAUD_DETECT_ENABLE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_BAUD_DETECT_ENABLE_MASK	/;"	d
UARTAPP_AUTOBAUD_REFCHAR0_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_REFCHAR0_MASK	/;"	d
UARTAPP_AUTOBAUD_REFCHAR0_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_REFCHAR0_OFFSET	/;"	d
UARTAPP_AUTOBAUD_REFCHAR1_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_REFCHAR1_MASK	/;"	d
UARTAPP_AUTOBAUD_REFCHAR1_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_REFCHAR1_OFFSET	/;"	d
UARTAPP_AUTOBAUD_START_BAUD_DETECT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_START_BAUD_DETECT_MASK	/;"	d
UARTAPP_AUTOBAUD_START_WITH_RUNBIT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_START_WITH_RUNBIT_MASK	/;"	d
UARTAPP_AUTOBAUD_TWO_REF_CHARS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_TWO_REF_CHARS_MASK	/;"	d
UARTAPP_AUTOBAUD_UPDATE_TX_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_AUTOBAUD_UPDATE_TX_MASK	/;"	d
UARTAPP_CTRL0_CLKGATE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_CLKGATE_MASK	/;"	d
UARTAPP_CTRL0_RUN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_RUN_MASK	/;"	d
UARTAPP_CTRL0_RXTIMEOUT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_RXTIMEOUT_MASK	/;"	d
UARTAPP_CTRL0_RXTIMEOUT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_RXTIMEOUT_OFFSET	/;"	d
UARTAPP_CTRL0_RXTO_ENABLE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_RXTO_ENABLE_MASK	/;"	d
UARTAPP_CTRL0_RX_SOURCE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_RX_SOURCE_MASK	/;"	d
UARTAPP_CTRL0_SFTRST_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_SFTRST_MASK	/;"	d
UARTAPP_CTRL0_XFER_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_XFER_COUNT_MASK	/;"	d
UARTAPP_CTRL0_XFER_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL0_XFER_COUNT_OFFSET	/;"	d
UARTAPP_CTRL1_RUN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL1_RUN_MASK	/;"	d
UARTAPP_CTRL1_XFER_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL1_XFER_COUNT_MASK	/;"	d
UARTAPP_CTRL1_XFER_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL1_XFER_COUNT_OFFSET	/;"	d
UARTAPP_CTRL2_CTSEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_CTSEN_MASK	/;"	d
UARTAPP_CTRL2_DMAONERR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_DMAONERR_MASK	/;"	d
UARTAPP_CTRL2_DTR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_DTR_MASK	/;"	d
UARTAPP_CTRL2_INVERT_CTS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_INVERT_CTS_MASK	/;"	d
UARTAPP_CTRL2_INVERT_RTS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_INVERT_RTS_MASK	/;"	d
UARTAPP_CTRL2_INVERT_RX_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_INVERT_RX_MASK	/;"	d
UARTAPP_CTRL2_INVERT_TX_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_INVERT_TX_MASK	/;"	d
UARTAPP_CTRL2_LBE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_LBE_MASK	/;"	d
UARTAPP_CTRL2_OUT1_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_OUT1_MASK	/;"	d
UARTAPP_CTRL2_OUT2_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_OUT2_MASK	/;"	d
UARTAPP_CTRL2_RTSEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RTSEN_MASK	/;"	d
UARTAPP_CTRL2_RTS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RTS_MASK	/;"	d
UARTAPP_CTRL2_RTS_SEMAPHORE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RTS_SEMAPHORE_MASK	/;"	d
UARTAPP_CTRL2_RXDMAE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXDMAE_MASK	/;"	d
UARTAPP_CTRL2_RXE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXE_MASK	/;"	d
UARTAPP_CTRL2_RXIFLSEL_INVALID5	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_INVALID5	/;"	d
UARTAPP_CTRL2_RXIFLSEL_INVALID6	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_INVALID6	/;"	d
UARTAPP_CTRL2_RXIFLSEL_INVALID7	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_INVALID7	/;"	d
UARTAPP_CTRL2_RXIFLSEL_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_MASK	/;"	d
UARTAPP_CTRL2_RXIFLSEL_NOT_EMPTY	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_NOT_EMPTY	/;"	d
UARTAPP_CTRL2_RXIFLSEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_OFFSET	/;"	d
UARTAPP_CTRL2_RXIFLSEL_ONE_HALF	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_ONE_HALF	/;"	d
UARTAPP_CTRL2_RXIFLSEL_ONE_QUARTER	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_ONE_QUARTER	/;"	d
UARTAPP_CTRL2_RXIFLSEL_SEVEN_EIGHTHS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_SEVEN_EIGHTHS	/;"	d
UARTAPP_CTRL2_RXIFLSEL_THREE_QUARTERS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_RXIFLSEL_THREE_QUARTERS	/;"	d
UARTAPP_CTRL2_SIREN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_SIREN_MASK	/;"	d
UARTAPP_CTRL2_SIRLP_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_SIRLP_MASK	/;"	d
UARTAPP_CTRL2_TXDMAE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXDMAE_MASK	/;"	d
UARTAPP_CTRL2_TXE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXE_MASK	/;"	d
UARTAPP_CTRL2_TXIFLSEL_EMPTY	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_EMPTY	/;"	d
UARTAPP_CTRL2_TXIFLSEL_INVALID5	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_INVALID5	/;"	d
UARTAPP_CTRL2_TXIFLSEL_INVALID6	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_INVALID6	/;"	d
UARTAPP_CTRL2_TXIFLSEL_INVALID7	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_INVALID7	/;"	d
UARTAPP_CTRL2_TXIFLSEL_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_MASK	/;"	d
UARTAPP_CTRL2_TXIFLSEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_OFFSET	/;"	d
UARTAPP_CTRL2_TXIFLSEL_ONE_HALF	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_ONE_HALF	/;"	d
UARTAPP_CTRL2_TXIFLSEL_ONE_QUARTER	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_ONE_QUARTER	/;"	d
UARTAPP_CTRL2_TXIFLSEL_SEVEN_EIGHTHS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_SEVEN_EIGHTHS	/;"	d
UARTAPP_CTRL2_TXIFLSEL_THREE_QUARTERS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_TXIFLSEL_THREE_QUARTERS	/;"	d
UARTAPP_CTRL2_UARTEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_UARTEN_MASK	/;"	d
UARTAPP_CTRL2_USE_LCR2_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_CTRL2_USE_LCR2_MASK	/;"	d
UARTAPP_DATA_DATA_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DATA_DATA_MASK	/;"	d
UARTAPP_DATA_DATA_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DATA_DATA_OFFSET	/;"	d
UARTAPP_DEBUG_RXCMDEND_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXCMDEND_MASK	/;"	d
UARTAPP_DEBUG_RXDMARQ_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXDMARQ_MASK	/;"	d
UARTAPP_DEBUG_RXDMARUN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXDMARUN_MASK	/;"	d
UARTAPP_DEBUG_RXFBAUD_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXFBAUD_DIV_MASK	/;"	d
UARTAPP_DEBUG_RXFBAUD_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXFBAUD_DIV_OFFSET	/;"	d
UARTAPP_DEBUG_RXIBAUD_DIV_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXIBAUD_DIV_MASK	/;"	d
UARTAPP_DEBUG_RXIBAUD_DIV_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_RXIBAUD_DIV_OFFSET	/;"	d
UARTAPP_DEBUG_TXCMDEND_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_TXCMDEND_MASK	/;"	d
UARTAPP_DEBUG_TXDMARQ_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_TXDMARQ_MASK	/;"	d
UARTAPP_DEBUG_TXDMARUN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_DEBUG_TXDMARUN_MASK	/;"	d
UARTAPP_INTR_ABDIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_ABDIEN_MASK	/;"	d
UARTAPP_INTR_ABDIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_ABDIS_MASK	/;"	d
UARTAPP_INTR_BEIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_BEIEN_MASK	/;"	d
UARTAPP_INTR_BEIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_BEIS_MASK	/;"	d
UARTAPP_INTR_CTSMIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_CTSMIEN_MASK	/;"	d
UARTAPP_INTR_CTSMIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_CTSMIS_MASK	/;"	d
UARTAPP_INTR_DCDMIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_DCDMIEN_MASK	/;"	d
UARTAPP_INTR_DCDMIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_DCDMIS_MASK	/;"	d
UARTAPP_INTR_DSRMIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_DSRMIEN_MASK	/;"	d
UARTAPP_INTR_DSRMIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_DSRMIS_MASK	/;"	d
UARTAPP_INTR_FEIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_FEIEN_MASK	/;"	d
UARTAPP_INTR_FEIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_FEIS_MASK	/;"	d
UARTAPP_INTR_OEIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_OEIEN_MASK	/;"	d
UARTAPP_INTR_OEIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_OEIS_MASK	/;"	d
UARTAPP_INTR_PEIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_PEIEN_MASK	/;"	d
UARTAPP_INTR_PEIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_PEIS_MASK	/;"	d
UARTAPP_INTR_RIMIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_RIMIEN_MASK	/;"	d
UARTAPP_INTR_RIMIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_RIMIS_MASK	/;"	d
UARTAPP_INTR_RTIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_RTIEN_MASK	/;"	d
UARTAPP_INTR_RTIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_RTIS_MASK	/;"	d
UARTAPP_INTR_RXIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_RXIEN_MASK	/;"	d
UARTAPP_INTR_RXIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_RXIS_MASK	/;"	d
UARTAPP_INTR_TXIEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_TXIEN_MASK	/;"	d
UARTAPP_INTR_TXIS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_INTR_TXIS_MASK	/;"	d
UARTAPP_LINECTRL2_BAUD_DIVFRAC_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_BAUD_DIVFRAC_MASK	/;"	d
UARTAPP_LINECTRL2_BAUD_DIVFRAC_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_BAUD_DIVFRAC_OFFSET	/;"	d
UARTAPP_LINECTRL2_BAUD_DIVINT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_BAUD_DIVINT_MASK	/;"	d
UARTAPP_LINECTRL2_BAUD_DIVINT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_BAUD_DIVINT_OFFSET	/;"	d
UARTAPP_LINECTRL2_EPS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_EPS_MASK	/;"	d
UARTAPP_LINECTRL2_EXTRACT_BAUD_DIVFRAC_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_EXTRACT_BAUD_DIVFRAC_MASK	/;"	d
UARTAPP_LINECTRL2_EXTRACT_BAUD_DIVINT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_EXTRACT_BAUD_DIVINT_OFFSET	/;"	d
UARTAPP_LINECTRL2_FEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_FEN_MASK	/;"	d
UARTAPP_LINECTRL2_PEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_PEN_MASK	/;"	d
UARTAPP_LINECTRL2_SPS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_SPS_MASK	/;"	d
UARTAPP_LINECTRL2_STP2_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_STP2_MASK	/;"	d
UARTAPP_LINECTRL2_WLEN_5BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_WLEN_5BITS	/;"	d
UARTAPP_LINECTRL2_WLEN_6BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_WLEN_6BITS	/;"	d
UARTAPP_LINECTRL2_WLEN_7BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_WLEN_7BITS	/;"	d
UARTAPP_LINECTRL2_WLEN_8BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_WLEN_8BITS	/;"	d
UARTAPP_LINECTRL2_WLEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_WLEN_MASK	/;"	d
UARTAPP_LINECTRL2_WLEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL2_WLEN_OFFSET	/;"	d
UARTAPP_LINECTRL_BAUD_DIVFRAC_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_BAUD_DIVFRAC_MASK	/;"	d
UARTAPP_LINECTRL_BAUD_DIVFRAC_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_BAUD_DIVFRAC_OFFSET	/;"	d
UARTAPP_LINECTRL_BAUD_DIVINT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_BAUD_DIVINT_MASK	/;"	d
UARTAPP_LINECTRL_BAUD_DIVINT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_BAUD_DIVINT_OFFSET	/;"	d
UARTAPP_LINECTRL_BRK_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_BRK_MASK	/;"	d
UARTAPP_LINECTRL_EPS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_EPS_MASK	/;"	d
UARTAPP_LINECTRL_EXTRACT_BAUD_DIVFRAC_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_EXTRACT_BAUD_DIVFRAC_MASK	/;"	d
UARTAPP_LINECTRL_EXTRACT_BAUD_DIVINT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_EXTRACT_BAUD_DIVINT_OFFSET	/;"	d
UARTAPP_LINECTRL_FEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_FEN_MASK	/;"	d
UARTAPP_LINECTRL_PEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_PEN_MASK	/;"	d
UARTAPP_LINECTRL_SPS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_SPS_MASK	/;"	d
UARTAPP_LINECTRL_STP2_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_STP2_MASK	/;"	d
UARTAPP_LINECTRL_WLEN_5BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_WLEN_5BITS	/;"	d
UARTAPP_LINECTRL_WLEN_6BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_WLEN_6BITS	/;"	d
UARTAPP_LINECTRL_WLEN_7BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_WLEN_7BITS	/;"	d
UARTAPP_LINECTRL_WLEN_8BITS	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_WLEN_8BITS	/;"	d
UARTAPP_LINECTRL_WLEN_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_WLEN_MASK	/;"	d
UARTAPP_LINECTRL_WLEN_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_LINECTRL_WLEN_OFFSET	/;"	d
UARTAPP_STAT_BERR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_BERR_MASK	/;"	d
UARTAPP_STAT_BUSY_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_BUSY_MASK	/;"	d
UARTAPP_STAT_CTS_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_CTS_MASK	/;"	d
UARTAPP_STAT_FERR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_FERR_MASK	/;"	d
UARTAPP_STAT_HISPEED_AVAILABLE	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_HISPEED_AVAILABLE	/;"	d
UARTAPP_STAT_HISPEED_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_HISPEED_MASK	/;"	d
UARTAPP_STAT_HISPEED_UNAVAILABLE	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_HISPEED_UNAVAILABLE	/;"	d
UARTAPP_STAT_OERR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_OERR_MASK	/;"	d
UARTAPP_STAT_PERR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_PERR_MASK	/;"	d
UARTAPP_STAT_PRESENT_AVAILABLE	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_PRESENT_AVAILABLE	/;"	d
UARTAPP_STAT_PRESENT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_PRESENT_MASK	/;"	d
UARTAPP_STAT_PRESENT_UNAVAILABLE	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_PRESENT_UNAVAILABLE	/;"	d
UARTAPP_STAT_RXBYTE_INVALID_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_RXBYTE_INVALID_MASK	/;"	d
UARTAPP_STAT_RXBYTE_INVALID_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_RXBYTE_INVALID_OFFSET	/;"	d
UARTAPP_STAT_RXCOUNT_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_RXCOUNT_MASK	/;"	d
UARTAPP_STAT_RXCOUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_RXCOUNT_OFFSET	/;"	d
UARTAPP_STAT_RXFE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_RXFE_MASK	/;"	d
UARTAPP_STAT_RXFF_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_RXFF_MASK	/;"	d
UARTAPP_STAT_TXFE_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_TXFE_MASK	/;"	d
UARTAPP_STAT_TXFF_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_STAT_TXFF_MASK	/;"	d
UARTAPP_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_VERSION_MAJOR_MASK	/;"	d
UARTAPP_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_VERSION_MAJOR_OFFSET	/;"	d
UARTAPP_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_VERSION_MINOR_MASK	/;"	d
UARTAPP_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_VERSION_MINOR_OFFSET	/;"	d
UARTAPP_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_VERSION_STEP_MASK	/;"	d
UARTAPP_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define UARTAPP_VERSION_STEP_OFFSET	/;"	d
UARTB	arch/arm/mach-tegra/board.c	/^	UARTB	= 1 << 1,$/;"	e	enum:__anon4241e8020103	file:
UARTC	arch/arm/mach-tegra/board.c	/^	UARTC	= 1 << 2,$/;"	e	enum:__anon4241e8020103	file:
UARTCLK14745KHZ	arch/arm/cpu/arm926ejs/armada100/cpu.c	/^#define UARTCLK14745KHZ	/;"	d	file:
UARTCLK_48MHZ	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  UARTCLK_48MHZ	/;"	d
UARTCLK_MASK	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  UARTCLK_MASK	/;"	d
UARTCLK_SYNTH	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  UARTCLK_SYNTH	/;"	d
UARTCR_PC0	drivers/serial/serial_linflexuart.c	/^#define UARTCR_PC0 /;"	d	file:
UARTCR_PC1	drivers/serial/serial_linflexuart.c	/^#define UARTCR_PC1 /;"	d	file:
UARTCR_PCE	drivers/serial/serial_linflexuart.c	/^#define UARTCR_PCE /;"	d	file:
UARTCR_RXEN	drivers/serial/serial_linflexuart.c	/^#define UARTCR_RXEN /;"	d	file:
UARTCR_TXEN	drivers/serial/serial_linflexuart.c	/^#define UARTCR_TXEN /;"	d	file:
UARTCR_UART	drivers/serial/serial_linflexuart.c	/^#define UARTCR_UART /;"	d	file:
UARTCR_WL0	drivers/serial/serial_linflexuart.c	/^#define UARTCR_WL0 /;"	d	file:
UARTD	arch/arm/mach-tegra/board.c	/^	UARTD	= 1 << 3,$/;"	e	enum:__anon4241e8020103	file:
UARTDM_CR	drivers/serial/serial_msm.c	/^#define UARTDM_CR /;"	d	file:
UARTDM_CR_CMD_FORCE_STALE	drivers/serial/serial_msm.c	/^#define UARTDM_CR_CMD_FORCE_STALE /;"	d	file:
UARTDM_CR_CMD_RESET_ERR	drivers/serial/serial_msm.c	/^#define UARTDM_CR_CMD_RESET_ERR /;"	d	file:
UARTDM_CR_CMD_RESET_STALE_INT	drivers/serial/serial_msm.c	/^#define UARTDM_CR_CMD_RESET_STALE_INT /;"	d	file:
UARTDM_CR_CMD_RESET_TX_READY	drivers/serial/serial_msm.c	/^#define UARTDM_CR_CMD_RESET_TX_READY /;"	d	file:
UARTDM_CR_CMD_STALE_EVENT_DISABLE	drivers/serial/serial_msm.c	/^#define UARTDM_CR_CMD_STALE_EVENT_DISABLE /;"	d	file:
UARTDM_DMRX	drivers/serial/serial_msm.c	/^#define UARTDM_DMRX /;"	d	file:
UARTDM_IMR	drivers/serial/serial_msm.c	/^#define UARTDM_IMR /;"	d	file:
UARTDM_ISR	drivers/serial/serial_msm.c	/^#define UARTDM_ISR /;"	d	file:
UARTDM_ISR_TX_READY	drivers/serial/serial_msm.c	/^#define UARTDM_ISR_TX_READY /;"	d	file:
UARTDM_NCF_TX	drivers/serial/serial_msm.c	/^#define UARTDM_NCF_TX /;"	d	file:
UARTDM_RF	drivers/serial/serial_msm.c	/^#define UARTDM_RF /;"	d	file:
UARTDM_RXFS	drivers/serial/serial_msm.c	/^#define UARTDM_RXFS /;"	d	file:
UARTDM_RXFS_BUF_MASK	drivers/serial/serial_msm.c	/^#define UARTDM_RXFS_BUF_MASK /;"	d	file:
UARTDM_RXFS_BUF_SHIFT	drivers/serial/serial_msm.c	/^#define UARTDM_RXFS_BUF_SHIFT /;"	d	file:
UARTDM_SR	drivers/serial/serial_msm.c	/^#define UARTDM_SR /;"	d	file:
UARTDM_SR_RX_READY	drivers/serial/serial_msm.c	/^#define UARTDM_SR_RX_READY /;"	d	file:
UARTDM_SR_TX_EMPTY	drivers/serial/serial_msm.c	/^#define UARTDM_SR_TX_EMPTY /;"	d	file:
UARTDM_SR_UART_OVERRUN	drivers/serial/serial_msm.c	/^#define UARTDM_SR_UART_OVERRUN /;"	d	file:
UARTDM_TF	drivers/serial/serial_msm.c	/^#define UARTDM_TF /;"	d	file:
UARTE	arch/arm/mach-tegra/board.c	/^	UARTE	= 1 << 4,$/;"	e	enum:__anon4241e8020103	file:
UARTSR_DRF	drivers/serial/serial_linflexuart.c	/^#define UARTSR_DRF /;"	d	file:
UARTSR_DTF	drivers/serial/serial_linflexuart.c	/^#define UARTSR_DTF /;"	d	file:
UARTSR_RMB	drivers/serial/serial_linflexuart.c	/^#define UARTSR_RMB /;"	d	file:
UART_1_BASE	include/configs/vct.h	/^#define UART_1_BASE	/;"	d
UART_ACR	include/linux/serial_reg.h	/^#define UART_ACR	/;"	d
UART_ACR_ASREN	include/linux/serial_reg.h	/^#define UART_ACR_ASREN	/;"	d
UART_ACR_DSRFC	include/linux/serial_reg.h	/^#define UART_ACR_DSRFC	/;"	d
UART_ACR_ICRRD	include/linux/serial_reg.h	/^#define UART_ACR_ICRRD	/;"	d
UART_ACR_RXDIS	include/linux/serial_reg.h	/^#define UART_ACR_RXDIS	/;"	d
UART_ACR_TLENB	include/linux/serial_reg.h	/^#define UART_ACR_TLENB	/;"	d
UART_ACR_TXDIS	include/linux/serial_reg.h	/^#define UART_ACR_TXDIS	/;"	d
UART_ASR	include/linux/serial_reg.h	/^#define UART_ASR	/;"	d
UART_BASE	arch/blackfin/include/asm/serial1.h	/^#define UART_BASE /;"	d
UART_BASE	arch/blackfin/include/asm/serial4.h	/^#define UART_BASE /;"	d
UART_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_BASE /;"	d
UART_BASE	board/astro/mcf5373l/mcf5373l.c	/^#define UART_BASE /;"	d	file:
UART_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define UART_BASE_ADDR /;"	d
UART_BAUD_REG	drivers/serial/serial_mvebu_a3700.c	/^#define UART_BAUD_REG	/;"	d	file:
UART_BOOT_SUPPORTED	include/configs/x600.h	/^#define UART_BOOT_SUPPORTED	/;"	d
UART_CKS	include/linux/serial_reg.h	/^#define UART_CKS	/;"	d
UART_CLK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_CLK	/;"	d
UART_CLKMODE_AUTO	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CLKMODE_AUTO(/;"	d
UART_CLKMODE_MASK	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CLKMODE_MASK(/;"	d
UART_CLKMODE_OFF	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CLKMODE_OFF(/;"	d
UART_CLKMODE_ON	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CLKMODE_ON(/;"	d
UART_CLKMODE_STAT	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CLKMODE_STAT	/;"	d
UART_CLKMODE_STATX	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CLKMODE_STATX(/;"	d
UART_CLK_BASE	drivers/serial/serial_pxa.c	/^#define	UART_CLK_BASE	/;"	d	file:
UART_CLK_CFG	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define UART_CLK_CFG	/;"	d
UART_CLK_REG	drivers/serial/serial_pxa.c	/^#define	UART_CLK_REG	/;"	d	file:
UART_CLK_RUNNING_MASK	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define UART_CLK_RUNNING_MASK	/;"	d
UART_CLOCK_CFG	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	UART_CLOCK_CFG = 0,$/;"	e	enum:periph_clock
UART_CONT	arch/x86/cpu/baytrail/early_uart.c	/^#define UART_CONT	/;"	d	file:
UART_CORE0	board/amcc/bamboo/bamboo.h	/^			    UART_CORE0,$/;"	e	enum:config_list
UART_CORE1	board/amcc/bamboo/bamboo.h	/^			    UART_CORE1,$/;"	e	enum:config_list
UART_CORE2	board/amcc/bamboo/bamboo.h	/^			    UART_CORE2,$/;"	e	enum:config_list
UART_CORE3	board/amcc/bamboo/bamboo.h	/^			    UART_CORE3,$/;"	e	enum:config_list
UART_COUNT	arch/arm/mach-tegra/board.c	/^	UART_COUNT = 5,$/;"	e	enum:__anon4241e8020103	file:
UART_CPR	include/linux/serial_reg.h	/^#define UART_CPR	/;"	d
UART_CSR	include/linux/serial_reg.h	/^#define UART_CSR	/;"	d
UART_CTR	include/linux/serial_reg.h	/^#define UART_CTR	/;"	d
UART_CTRL_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define UART_CTRL_BASE	/;"	d
UART_CTRL_HDPX_EN	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_HDPX_EN	/;"	d
UART_CTRL_HDPX_INV	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_HDPX_INV	/;"	d
UART_CTRL_IR_RX6_INV	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_IR_RX6_INV	/;"	d
UART_CTRL_IR_RX_LENGTH	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_IR_RX_LENGTH	/;"	d
UART_CTRL_IR_TX6_INV	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_IR_TX6_INV	/;"	d
UART_CTRL_IR_TX_LENGTH	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_IR_TX_LENGTH	/;"	d
UART_CTRL_REG	drivers/serial/serial_mvebu_a3700.c	/^#define UART_CTRL_REG	/;"	d	file:
UART_CTRL_RXFIFO_RESET	drivers/serial/serial_mvebu_a3700.c	/^#define UART_CTRL_RXFIFO_RESET	/;"	d	file:
UART_CTRL_TXFIFO_RESET	drivers/serial/serial_mvebu_a3700.c	/^#define UART_CTRL_TXFIFO_RESET	/;"	d	file:
UART_CTRL_UART3_MD_CTRL	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_UART3_MD_CTRL	/;"	d
UART_CTRL_UART5_USB_MODE	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_UART5_USB_MODE	/;"	d
UART_CTRL_UART6_IRDA	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_CTRL_UART6_IRDA	/;"	d
UART_Channel	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Channel;$/;"	m	struct:__anonf183ba530208	typeref:typename:volatile unsigned int
UART_Channel_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Channel_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_Channel_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Channel_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_Control	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Control;$/;"	m	struct:__anonf183ba530208	typeref:typename:volatile unsigned int
UART_Control_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Control_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_Control_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Control_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_DEBUG_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_DEBUG_BASE /;"	d
UART_DLH	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_DLH /;"	d
UART_DLH	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_DLH /;"	d
UART_DLL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_DLL /;"	d
UART_DLL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_DLL /;"	d
UART_DLL	include/linux/serial_reg.h	/^#define UART_DLL	/;"	d
UART_DLM	include/linux/serial_reg.h	/^#define UART_DLM	/;"	d
UART_EFR	include/linux/serial_reg.h	/^#define UART_EFR	/;"	d
UART_EFR_CTS	include/linux/serial_reg.h	/^#define UART_EFR_CTS	/;"	d
UART_EFR_ECB	include/linux/serial_reg.h	/^#define UART_EFR_ECB	/;"	d
UART_EFR_RTS	include/linux/serial_reg.h	/^#define UART_EFR_RTS	/;"	d
UART_EFR_SCD	include/linux/serial_reg.h	/^#define UART_EFR_SCD	/;"	d
UART_EMSR	include/linux/serial_reg.h	/^#define UART_EMSR	/;"	d
UART_EMSR_ALT_COUNT	include/linux/serial_reg.h	/^#define UART_EMSR_ALT_COUNT	/;"	d
UART_EMSR_FIFO_COUNT	include/linux/serial_reg.h	/^#define UART_EMSR_FIFO_COUNT	/;"	d
UART_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_ENABLE	/;"	d
UART_ENABLE	drivers/serial/serial_pic32.c	/^#define UART_ENABLE	/;"	d	file:
UART_EN_CE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_EN_CE /;"	d
UART_EN_E	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_EN_E /;"	d
UART_EXAR_8XMODE	include/linux/serial_reg.h	/^#define UART_EXAR_8XMODE	/;"	d
UART_EXAR_DVID	include/linux/serial_reg.h	/^#define UART_EXAR_DVID	/;"	d
UART_EXAR_FCTR	include/linux/serial_reg.h	/^#define UART_EXAR_FCTR	/;"	d
UART_EXAR_RXTRG	include/linux/serial_reg.h	/^#define UART_EXAR_RXTRG	/;"	d
UART_EXAR_SLEEP	include/linux/serial_reg.h	/^#define UART_EXAR_SLEEP	/;"	d
UART_EXAR_TXTRG	include/linux/serial_reg.h	/^#define UART_EXAR_TXTRG	/;"	d
UART_FCH	include/linux/serial_reg.h	/^#define UART_FCH	/;"	d
UART_FCL	include/linux/serial_reg.h	/^#define UART_FCL	/;"	d
UART_FCR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR	/;"	d
UART_FCR	include/linux/serial_reg.h	/^#define UART_FCR	/;"	d
UART_FCR6_R_TRIGGER_16	include/linux/serial_reg.h	/^#define UART_FCR6_R_TRIGGER_16	/;"	d
UART_FCR6_R_TRIGGER_24	include/linux/serial_reg.h	/^#define UART_FCR6_R_TRIGGER_24 /;"	d
UART_FCR6_R_TRIGGER_28	include/linux/serial_reg.h	/^#define UART_FCR6_R_TRIGGER_28	/;"	d
UART_FCR6_R_TRIGGER_8	include/linux/serial_reg.h	/^#define UART_FCR6_R_TRIGGER_8	/;"	d
UART_FCR6_T_TRIGGER_16	include/linux/serial_reg.h	/^#define UART_FCR6_T_TRIGGER_16	/;"	d
UART_FCR6_T_TRIGGER_24	include/linux/serial_reg.h	/^#define UART_FCR6_T_TRIGGER_24 /;"	d
UART_FCR6_T_TRIGGER_30	include/linux/serial_reg.h	/^#define UART_FCR6_T_TRIGGER_30	/;"	d
UART_FCR6_T_TRIGGER_8	include/linux/serial_reg.h	/^#define UART_FCR6_T_TRIGGER_8	/;"	d
UART_FCR7_64BYTE	include/linux/serial_reg.h	/^#define UART_FCR7_64BYTE	/;"	d
UART_FCRVAL	drivers/serial/ns16550.c	/^#define UART_FCRVAL /;"	d	file:
UART_FCR_CLEAR_RCVR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_CLEAR_RCVR	/;"	d
UART_FCR_CLEAR_RCVR	include/linux/serial_reg.h	/^#define UART_FCR_CLEAR_RCVR	/;"	d
UART_FCR_CLEAR_RCVR	include/ns16550.h	/^#define UART_FCR_CLEAR_RCVR	/;"	d
UART_FCR_CLEAR_XMIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_CLEAR_XMIT	/;"	d
UART_FCR_CLEAR_XMIT	include/linux/serial_reg.h	/^#define UART_FCR_CLEAR_XMIT	/;"	d
UART_FCR_CLEAR_XMIT	include/ns16550.h	/^#define UART_FCR_CLEAR_XMIT	/;"	d
UART_FCR_DMA_SELECT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_DMA_SELECT	/;"	d
UART_FCR_DMA_SELECT	include/linux/serial_reg.h	/^#define UART_FCR_DMA_SELECT	/;"	d
UART_FCR_DMA_SELECT	include/ns16550.h	/^#define UART_FCR_DMA_SELECT	/;"	d
UART_FCR_ENABLE_FIFO	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_ENABLE_FIFO	/;"	d
UART_FCR_ENABLE_FIFO	include/linux/serial_reg.h	/^#define UART_FCR_ENABLE_FIFO	/;"	d
UART_FCR_FIFO_EN	include/ns16550.h	/^#define UART_FCR_FIFO_EN	/;"	d
UART_FCR_FULL_EMPT_TXI	include/linux/serial_reg.h	/^#define UART_FCR_FULL_EMPT_TXI	/;"	d
UART_FCR_HALF_EMPT_TXI	include/linux/serial_reg.h	/^#define UART_FCR_HALF_EMPT_TXI	/;"	d
UART_FCR_HSU_16B_FIFO	include/linux/serial_reg.h	/^#define UART_FCR_HSU_16B_FIFO	/;"	d
UART_FCR_HSU_16_14B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_16_14B	/;"	d
UART_FCR_HSU_16_1B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_16_1B	/;"	d
UART_FCR_HSU_16_4B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_16_4B	/;"	d
UART_FCR_HSU_16_8B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_16_8B	/;"	d
UART_FCR_HSU_64B_FIFO	include/linux/serial_reg.h	/^#define UART_FCR_HSU_64B_FIFO	/;"	d
UART_FCR_HSU_64_16B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_64_16B	/;"	d
UART_FCR_HSU_64_1B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_64_1B	/;"	d
UART_FCR_HSU_64_32B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_64_32B	/;"	d
UART_FCR_HSU_64_56B	include/linux/serial_reg.h	/^#define UART_FCR_HSU_64_56B	/;"	d
UART_FCR_PXAR1	include/linux/serial_reg.h	/^#define UART_FCR_PXAR1	/;"	d
UART_FCR_PXAR16	include/linux/serial_reg.h	/^#define UART_FCR_PXAR16	/;"	d
UART_FCR_PXAR32	include/linux/serial_reg.h	/^#define UART_FCR_PXAR32	/;"	d
UART_FCR_PXAR8	include/linux/serial_reg.h	/^#define UART_FCR_PXAR8	/;"	d
UART_FCR_RXSR	include/ns16550.h	/^#define UART_FCR_RXSR	/;"	d
UART_FCR_R_TRIGGER_1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_R_TRIGGER_1	/;"	d
UART_FCR_R_TRIGGER_14	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_R_TRIGGER_14 /;"	d
UART_FCR_R_TRIGGER_4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_R_TRIGGER_4	/;"	d
UART_FCR_R_TRIGGER_8	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_R_TRIGGER_8	/;"	d
UART_FCR_R_TRIG_00	include/linux/serial_reg.h	/^#define UART_FCR_R_TRIG_00	/;"	d
UART_FCR_R_TRIG_01	include/linux/serial_reg.h	/^#define UART_FCR_R_TRIG_01	/;"	d
UART_FCR_R_TRIG_10	include/linux/serial_reg.h	/^#define UART_FCR_R_TRIG_10	/;"	d
UART_FCR_R_TRIG_11	include/linux/serial_reg.h	/^#define UART_FCR_R_TRIG_11	/;"	d
UART_FCR_TRIGGER_1	include/linux/serial_reg.h	/^#define UART_FCR_TRIGGER_1	/;"	d
UART_FCR_TRIGGER_1	include/ns16550.h	/^#define UART_FCR_TRIGGER_1	/;"	d
UART_FCR_TRIGGER_14	include/linux/serial_reg.h	/^#define UART_FCR_TRIGGER_14	/;"	d
UART_FCR_TRIGGER_14	include/ns16550.h	/^#define UART_FCR_TRIGGER_14	/;"	d
UART_FCR_TRIGGER_3	arch/arm/include/asm/arch-tegra/uart.h	/^#define UART_FCR_TRIGGER_3	/;"	d
UART_FCR_TRIGGER_4	include/linux/serial_reg.h	/^#define UART_FCR_TRIGGER_4	/;"	d
UART_FCR_TRIGGER_4	include/ns16550.h	/^#define UART_FCR_TRIGGER_4	/;"	d
UART_FCR_TRIGGER_8	include/linux/serial_reg.h	/^#define UART_FCR_TRIGGER_8	/;"	d
UART_FCR_TRIGGER_8	include/ns16550.h	/^#define UART_FCR_TRIGGER_8	/;"	d
UART_FCR_TRIGGER_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_TRIGGER_MASK	/;"	d
UART_FCR_TRIGGER_MASK	include/linux/serial_reg.h	/^#define UART_FCR_TRIGGER_MASK	/;"	d
UART_FCR_TRIGGER_MASK	include/ns16550.h	/^#define UART_FCR_TRIGGER_MASK	/;"	d
UART_FCR_TXSR	include/ns16550.h	/^#define UART_FCR_TXSR	/;"	d
UART_FCR_T_TRIGGER_0	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_T_TRIGGER_0	/;"	d
UART_FCR_T_TRIGGER_12	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_T_TRIGGER_12	/;"	d
UART_FCR_T_TRIGGER_4	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_T_TRIGGER_4	/;"	d
UART_FCR_T_TRIGGER_8	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_FCR_T_TRIGGER_8 /;"	d
UART_FCR_T_TRIG_00	include/linux/serial_reg.h	/^#define UART_FCR_T_TRIG_00	/;"	d
UART_FCR_T_TRIG_01	include/linux/serial_reg.h	/^#define UART_FCR_T_TRIG_01	/;"	d
UART_FCR_T_TRIG_10	include/linux/serial_reg.h	/^#define UART_FCR_T_TRIG_10	/;"	d
UART_FCR_T_TRIG_11	include/linux/serial_reg.h	/^#define UART_FCR_T_TRIG_11	/;"	d
UART_FCTR	include/linux/serial_reg.h	/^#define UART_FCTR	/;"	d
UART_FCTR_EXAR_485	include/linux/serial_reg.h	/^#define UART_FCTR_EXAR_485	/;"	d
UART_FCTR_EXAR_IRDA	include/linux/serial_reg.h	/^#define UART_FCTR_EXAR_IRDA	/;"	d
UART_FCTR_EXAR_TRGA	include/linux/serial_reg.h	/^#define UART_FCTR_EXAR_TRGA	/;"	d
UART_FCTR_EXAR_TRGB	include/linux/serial_reg.h	/^#define UART_FCTR_EXAR_TRGB	/;"	d
UART_FCTR_EXAR_TRGC	include/linux/serial_reg.h	/^#define UART_FCTR_EXAR_TRGC	/;"	d
UART_FCTR_EXAR_TRGD	include/linux/serial_reg.h	/^#define UART_FCTR_EXAR_TRGD	/;"	d
UART_FCTR_IRDA	include/linux/serial_reg.h	/^#define UART_FCTR_IRDA	/;"	d
UART_FCTR_RTS_4DELAY	include/linux/serial_reg.h	/^#define UART_FCTR_RTS_4DELAY	/;"	d
UART_FCTR_RTS_6DELAY	include/linux/serial_reg.h	/^#define UART_FCTR_RTS_6DELAY	/;"	d
UART_FCTR_RTS_8DELAY	include/linux/serial_reg.h	/^#define UART_FCTR_RTS_8DELAY	/;"	d
UART_FCTR_RTS_NODELAY	include/linux/serial_reg.h	/^#define UART_FCTR_RTS_NODELAY	/;"	d
UART_FCTR_RX	include/linux/serial_reg.h	/^#define UART_FCTR_RX	/;"	d
UART_FCTR_SCR_SWAP	include/linux/serial_reg.h	/^#define UART_FCTR_SCR_SWAP	/;"	d
UART_FCTR_TRGA	include/linux/serial_reg.h	/^#define UART_FCTR_TRGA	/;"	d
UART_FCTR_TRGB	include/linux/serial_reg.h	/^#define UART_FCTR_TRGB	/;"	d
UART_FCTR_TRGC	include/linux/serial_reg.h	/^#define UART_FCTR_TRGC	/;"	d
UART_FCTR_TRGD	include/linux/serial_reg.h	/^#define UART_FCTR_TRGD	/;"	d
UART_FCTR_TX	include/linux/serial_reg.h	/^#define UART_FCTR_TX	/;"	d
UART_FCTR_TX_INT	include/linux/serial_reg.h	/^#define UART_FCTR_TX_INT	/;"	d
UART_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define UART_FREQ /;"	d
UART_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define UART_FREQ /;"	d
UART_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define UART_FREQ /;"	d
UART_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define UART_FREQ /;"	d
UART_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define UART_FREQ /;"	d
UART_GBL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_GBL /;"	d
UART_GCTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_GCTL /;"	d
UART_GCTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_GCTL /;"	d
UART_GPIOB_16_17	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	UART_GPIOB_16_17,$/;"	e	enum:periph_id
UART_GPIOC_30_31	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^	UART_GPIOC_30_31 = 0,$/;"	e	enum:periph_id
UART_ICR	include/linux/serial_reg.h	/^#define UART_ICR	/;"	d
UART_ID1	include/linux/serial_reg.h	/^#define UART_ID1	/;"	d
UART_ID2	include/linux/serial_reg.h	/^#define UART_ID2	/;"	d
UART_ID3	include/linux/serial_reg.h	/^#define UART_ID3	/;"	d
UART_IER	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_IER /;"	d
UART_IER	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_IER /;"	d
UART_IER	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IER	/;"	d
UART_IER	include/linux/serial_reg.h	/^#define UART_IER	/;"	d
UART_IERX_SLEEP	include/linux/serial_reg.h	/^#define UART_IERX_SLEEP	/;"	d
UART_IER_DMAE	include/linux/serial_reg.h	/^#define UART_IER_DMAE	/;"	d
UART_IER_MSI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IER_MSI	/;"	d
UART_IER_MSI	include/linux/serial_reg.h	/^#define UART_IER_MSI	/;"	d
UART_IER_MSI	include/ns16550.h	/^#define UART_IER_MSI	/;"	d
UART_IER_NRZE	include/linux/serial_reg.h	/^#define UART_IER_NRZE	/;"	d
UART_IER_RDI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IER_RDI	/;"	d
UART_IER_RDI	include/linux/serial_reg.h	/^#define UART_IER_RDI	/;"	d
UART_IER_RDI	include/ns16550.h	/^#define UART_IER_RDI	/;"	d
UART_IER_RLSI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IER_RLSI	/;"	d
UART_IER_RLSI	include/linux/serial_reg.h	/^#define UART_IER_RLSI	/;"	d
UART_IER_RLSI	include/ns16550.h	/^#define UART_IER_RLSI	/;"	d
UART_IER_RTOIE	include/linux/serial_reg.h	/^#define UART_IER_RTOIE	/;"	d
UART_IER_THRI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IER_THRI	/;"	d
UART_IER_THRI	include/linux/serial_reg.h	/^#define UART_IER_THRI	/;"	d
UART_IER_THRI	include/ns16550.h	/^#define UART_IER_THRI	/;"	d
UART_IER_UUE	include/linux/serial_reg.h	/^#define UART_IER_UUE	/;"	d
UART_IIR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_IIR /;"	d
UART_IIR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_IIR /;"	d
UART_IIR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR	/;"	d
UART_IIR	include/linux/serial_reg.h	/^#define UART_IIR	/;"	d
UART_IIR_BUSY	include/linux/serial_reg.h	/^#define UART_IIR_BUSY	/;"	d
UART_IIR_CTS_RTS_DSR	include/linux/serial_reg.h	/^#define UART_IIR_CTS_RTS_DSR	/;"	d
UART_IIR_ID	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR_ID	/;"	d
UART_IIR_ID	include/linux/serial_reg.h	/^#define UART_IIR_ID	/;"	d
UART_IIR_ID	include/ns16550.h	/^#define UART_IIR_ID	/;"	d
UART_IIR_MSI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR_MSI	/;"	d
UART_IIR_MSI	include/linux/serial_reg.h	/^#define UART_IIR_MSI	/;"	d
UART_IIR_MSI	include/ns16550.h	/^#define UART_IIR_MSI	/;"	d
UART_IIR_NO_INT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR_NO_INT	/;"	d
UART_IIR_NO_INT	include/linux/serial_reg.h	/^#define UART_IIR_NO_INT	/;"	d
UART_IIR_NO_INT	include/ns16550.h	/^#define UART_IIR_NO_INT	/;"	d
UART_IIR_RDI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR_RDI	/;"	d
UART_IIR_RDI	include/linux/serial_reg.h	/^#define UART_IIR_RDI	/;"	d
UART_IIR_RDI	include/ns16550.h	/^#define UART_IIR_RDI	/;"	d
UART_IIR_RLSI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR_RLSI	/;"	d
UART_IIR_RLSI	include/linux/serial_reg.h	/^#define UART_IIR_RLSI	/;"	d
UART_IIR_RLSI	include/ns16550.h	/^#define UART_IIR_RLSI	/;"	d
UART_IIR_RX_TIMEOUT	include/linux/serial_reg.h	/^#define UART_IIR_RX_TIMEOUT	/;"	d
UART_IIR_THRI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_IIR_THRI	/;"	d
UART_IIR_THRI	include/linux/serial_reg.h	/^#define UART_IIR_THRI	/;"	d
UART_IIR_THRI	include/ns16550.h	/^#define UART_IIR_THRI	/;"	d
UART_IIR_TOD	include/linux/serial_reg.h	/^#define UART_IIR_TOD	/;"	d
UART_IIR_XOFF	include/linux/serial_reg.h	/^#define UART_IIR_XOFF	/;"	d
UART_IRQ	include/smsc_sio1007.h	/^#define UART_IRQ	/;"	d
UART_LCR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_LCR /;"	d
UART_LCR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_LCR /;"	d
UART_LCR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR	/;"	d
UART_LCR	include/linux/serial_reg.h	/^#define UART_LCR	/;"	d
UART_LCRVAL	drivers/serial/ns16550.c	/^#define UART_LCRVAL /;"	d	file:
UART_LCR_8N1	include/ns16550.h	/^#define UART_LCR_8N1	/;"	d
UART_LCR_BKSE	include/ns16550.h	/^#define UART_LCR_BKSE	/;"	d
UART_LCR_CONF_MODE_A	include/linux/serial_reg.h	/^#define UART_LCR_CONF_MODE_A	/;"	d
UART_LCR_CONF_MODE_B	include/linux/serial_reg.h	/^#define UART_LCR_CONF_MODE_B	/;"	d
UART_LCR_DLAB	include/linux/serial_reg.h	/^#define UART_LCR_DLAB	/;"	d
UART_LCR_DLAB	include/ns16550.h	/^#define UART_LCR_DLAB	/;"	d
UART_LCR_EPAR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_EPAR	/;"	d
UART_LCR_EPAR	include/linux/serial_reg.h	/^#define UART_LCR_EPAR	/;"	d
UART_LCR_EPS	include/ns16550.h	/^#define UART_LCR_EPS	/;"	d
UART_LCR_PARITY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_PARITY	/;"	d
UART_LCR_PARITY	include/linux/serial_reg.h	/^#define UART_LCR_PARITY	/;"	d
UART_LCR_PEN	include/ns16550.h	/^#define UART_LCR_PEN	/;"	d
UART_LCR_SBC	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_SBC	/;"	d
UART_LCR_SBC	include/linux/serial_reg.h	/^#define UART_LCR_SBC	/;"	d
UART_LCR_SBRK	include/ns16550.h	/^#define UART_LCR_SBRK	/;"	d
UART_LCR_SPAR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_SPAR	/;"	d
UART_LCR_SPAR	include/linux/serial_reg.h	/^#define UART_LCR_SPAR	/;"	d
UART_LCR_STB	include/ns16550.h	/^#define UART_LCR_STB	/;"	d
UART_LCR_STKP	include/ns16550.h	/^#define UART_LCR_STKP	/;"	d
UART_LCR_STOP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_STOP	/;"	d
UART_LCR_STOP	include/linux/serial_reg.h	/^#define UART_LCR_STOP	/;"	d
UART_LCR_WLEN5	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_WLEN5 /;"	d
UART_LCR_WLEN5	include/linux/serial_reg.h	/^#define UART_LCR_WLEN5	/;"	d
UART_LCR_WLEN6	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_WLEN6 /;"	d
UART_LCR_WLEN6	include/linux/serial_reg.h	/^#define UART_LCR_WLEN6	/;"	d
UART_LCR_WLEN7	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_WLEN7 /;"	d
UART_LCR_WLEN7	include/linux/serial_reg.h	/^#define UART_LCR_WLEN7	/;"	d
UART_LCR_WLEN8	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LCR_WLEN8 /;"	d
UART_LCR_WLEN8	include/linux/serial_reg.h	/^#define UART_LCR_WLEN8	/;"	d
UART_LCR_WLS_5	include/ns16550.h	/^#define UART_LCR_WLS_5	/;"	d
UART_LCR_WLS_6	include/ns16550.h	/^#define UART_LCR_WLS_6	/;"	d
UART_LCR_WLS_7	include/ns16550.h	/^#define UART_LCR_WLS_7	/;"	d
UART_LCR_WLS_8	include/ns16550.h	/^#define UART_LCR_WLS_8	/;"	d
UART_LCR_WLS_MSK	include/ns16550.h	/^#define UART_LCR_WLS_MSK /;"	d
UART_LOOPBACK	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define UART_LOOPBACK(/;"	d
UART_LSR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_LSR /;"	d
UART_LSR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_LSR /;"	d
UART_LSR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR	/;"	d
UART_LSR	include/linux/serial_reg.h	/^#define UART_LSR	/;"	d
UART_LSR_BI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_BI	/;"	d
UART_LSR_BI	include/linux/serial_reg.h	/^#define UART_LSR_BI	/;"	d
UART_LSR_BI	include/ns16550.h	/^#define UART_LSR_BI	/;"	d
UART_LSR_BRK_ERROR_BITS	include/linux/serial_reg.h	/^#define UART_LSR_BRK_ERROR_BITS	/;"	d
UART_LSR_DR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_DR	/;"	d
UART_LSR_DR	include/linux/serial_reg.h	/^#define UART_LSR_DR	/;"	d
UART_LSR_DR	include/ns16550.h	/^#define UART_LSR_DR	/;"	d
UART_LSR_ERR	include/ns16550.h	/^#define UART_LSR_ERR	/;"	d
UART_LSR_FE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_FE	/;"	d
UART_LSR_FE	include/linux/serial_reg.h	/^#define UART_LSR_FE	/;"	d
UART_LSR_FE	include/ns16550.h	/^#define UART_LSR_FE	/;"	d
UART_LSR_FIFOE	include/linux/serial_reg.h	/^#define UART_LSR_FIFOE	/;"	d
UART_LSR_OE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_OE	/;"	d
UART_LSR_OE	include/linux/serial_reg.h	/^#define UART_LSR_OE	/;"	d
UART_LSR_OE	include/ns16550.h	/^#define UART_LSR_OE	/;"	d
UART_LSR_PE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_PE	/;"	d
UART_LSR_PE	include/linux/serial_reg.h	/^#define UART_LSR_PE	/;"	d
UART_LSR_PE	include/ns16550.h	/^#define UART_LSR_PE	/;"	d
UART_LSR_TEMT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_TEMT	/;"	d
UART_LSR_TEMT	include/linux/serial_reg.h	/^#define UART_LSR_TEMT	/;"	d
UART_LSR_TEMT	include/ns16550.h	/^#define UART_LSR_TEMT	/;"	d
UART_LSR_THRE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_LSR_THRE	/;"	d
UART_LSR_THRE	include/linux/serial_reg.h	/^#define UART_LSR_THRE	/;"	d
UART_LSR_THRE	include/ns16550.h	/^#define UART_LSR_THRE	/;"	d
UART_MCR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_MCR /;"	d
UART_MCR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_MCR /;"	d
UART_MCR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MCR	/;"	d
UART_MCR	include/linux/serial_reg.h	/^#define UART_MCR	/;"	d
UART_MCRVAL	drivers/serial/ns16550.c	/^#define UART_MCRVAL /;"	d	file:
UART_MCR_AFE	include/linux/serial_reg.h	/^#define UART_MCR_AFE	/;"	d
UART_MCR_AFE	include/ns16550.h	/^#define UART_MCR_AFE	/;"	d
UART_MCR_CLKSEL	include/linux/serial_reg.h	/^#define UART_MCR_CLKSEL	/;"	d
UART_MCR_DMA_EN	include/ns16550.h	/^#define UART_MCR_DMA_EN	/;"	d
UART_MCR_DTR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MCR_DTR	/;"	d
UART_MCR_DTR	include/linux/serial_reg.h	/^#define UART_MCR_DTR	/;"	d
UART_MCR_DTR	include/ns16550.h	/^#define UART_MCR_DTR	/;"	d
UART_MCR_LOOP	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MCR_LOOP	/;"	d
UART_MCR_LOOP	include/linux/serial_reg.h	/^#define UART_MCR_LOOP	/;"	d
UART_MCR_LOOP	include/ns16550.h	/^#define UART_MCR_LOOP	/;"	d
UART_MCR_OUT1	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MCR_OUT1	/;"	d
UART_MCR_OUT1	include/linux/serial_reg.h	/^#define UART_MCR_OUT1	/;"	d
UART_MCR_OUT1	include/ns16550.h	/^#define UART_MCR_OUT1	/;"	d
UART_MCR_OUT2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MCR_OUT2	/;"	d
UART_MCR_OUT2	include/linux/serial_reg.h	/^#define UART_MCR_OUT2	/;"	d
UART_MCR_OUT2	include/ns16550.h	/^#define UART_MCR_OUT2	/;"	d
UART_MCR_RTS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MCR_RTS	/;"	d
UART_MCR_RTS	include/linux/serial_reg.h	/^#define UART_MCR_RTS	/;"	d
UART_MCR_RTS	include/ns16550.h	/^#define UART_MCR_RTS	/;"	d
UART_MCR_TCRTLR	include/linux/serial_reg.h	/^#define UART_MCR_TCRTLR	/;"	d
UART_MCR_TX_DFR	include/ns16550.h	/^#define UART_MCR_TX_DFR	/;"	d
UART_MCR_XONANY	include/linux/serial_reg.h	/^#define UART_MCR_XONANY	/;"	d
UART_MSR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_MSR /;"	d
UART_MSR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR	/;"	d
UART_MSR	include/linux/serial_reg.h	/^#define UART_MSR	/;"	d
UART_MSR_ANY_DELTA	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_ANY_DELTA /;"	d
UART_MSR_ANY_DELTA	include/linux/serial_reg.h	/^#define UART_MSR_ANY_DELTA	/;"	d
UART_MSR_CTS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_CTS	/;"	d
UART_MSR_CTS	include/linux/serial_reg.h	/^#define UART_MSR_CTS	/;"	d
UART_MSR_CTS	include/ns16550.h	/^#define UART_MSR_CTS	/;"	d
UART_MSR_DCD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_DCD	/;"	d
UART_MSR_DCD	include/linux/serial_reg.h	/^#define UART_MSR_DCD	/;"	d
UART_MSR_DCD	include/ns16550.h	/^#define UART_MSR_DCD	/;"	d
UART_MSR_DCTS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_DCTS	/;"	d
UART_MSR_DCTS	include/linux/serial_reg.h	/^#define UART_MSR_DCTS	/;"	d
UART_MSR_DCTS	include/ns16550.h	/^#define UART_MSR_DCTS	/;"	d
UART_MSR_DDCD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_DDCD	/;"	d
UART_MSR_DDCD	include/linux/serial_reg.h	/^#define UART_MSR_DDCD	/;"	d
UART_MSR_DDCD	include/ns16550.h	/^#define UART_MSR_DDCD	/;"	d
UART_MSR_DDSR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_DDSR	/;"	d
UART_MSR_DDSR	include/linux/serial_reg.h	/^#define UART_MSR_DDSR	/;"	d
UART_MSR_DDSR	include/ns16550.h	/^#define UART_MSR_DDSR	/;"	d
UART_MSR_DSR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_DSR	/;"	d
UART_MSR_DSR	include/linux/serial_reg.h	/^#define UART_MSR_DSR	/;"	d
UART_MSR_DSR	include/ns16550.h	/^#define UART_MSR_DSR	/;"	d
UART_MSR_RI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_RI	/;"	d
UART_MSR_RI	include/linux/serial_reg.h	/^#define UART_MSR_RI	/;"	d
UART_MSR_RI	include/ns16550.h	/^#define UART_MSR_RI	/;"	d
UART_MSR_TERI	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_MSR_TERI	/;"	d
UART_MSR_TERI	include/linux/serial_reg.h	/^#define UART_MSR_TERI	/;"	d
UART_MSR_TERI	include/ns16550.h	/^#define UART_MSR_TERI	/;"	d
UART_NMR	include/linux/serial_reg.h	/^#define UART_NMR	/;"	d
UART_NR	drivers/serial/serial_s3c24x0.c	/^#define UART_NR	/;"	d	file:
UART_OMAP_EBLR	include/linux/serial_reg.h	/^#define UART_OMAP_EBLR	/;"	d
UART_OMAP_MDR1	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1	/;"	d
UART_OMAP_MDR1_13X_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_13X_MODE	/;"	d
UART_OMAP_MDR1_16X_ABAUD_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_16X_ABAUD_MODE	/;"	d
UART_OMAP_MDR1_16X_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_16X_MODE	/;"	d
UART_OMAP_MDR1_CIR_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_CIR_MODE	/;"	d
UART_OMAP_MDR1_DISABLE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_DISABLE	/;"	d
UART_OMAP_MDR1_FIR_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_FIR_MODE	/;"	d
UART_OMAP_MDR1_MIR_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_MIR_MODE	/;"	d
UART_OMAP_MDR1_SIR_MODE	include/linux/serial_reg.h	/^#define UART_OMAP_MDR1_SIR_MODE	/;"	d
UART_OMAP_MDR2	include/linux/serial_reg.h	/^#define UART_OMAP_MDR2	/;"	d
UART_OMAP_MVER	include/linux/serial_reg.h	/^#define UART_OMAP_MVER	/;"	d
UART_OMAP_OSC_12M_SEL	include/linux/serial_reg.h	/^#define UART_OMAP_OSC_12M_SEL	/;"	d
UART_OMAP_SCR	include/linux/serial_reg.h	/^#define UART_OMAP_SCR	/;"	d
UART_OMAP_SSR	include/linux/serial_reg.h	/^#define UART_OMAP_SSR	/;"	d
UART_OMAP_SYSC	include/linux/serial_reg.h	/^#define UART_OMAP_SYSC	/;"	d
UART_OMAP_SYSS	include/linux/serial_reg.h	/^#define UART_OMAP_SYSS	/;"	d
UART_OMAP_WER	include/linux/serial_reg.h	/^#define UART_OMAP_WER	/;"	d
UART_OVERFLOW_ERR	drivers/serial/serial_arc.c	/^#define UART_OVERFLOW_ERR	/;"	d	file:
UART_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/aristainetos/aristainetos.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/bachmann/ot1200/ot1200.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/barco/platinum/platinum.h	/^#define UART_PAD_CTRL	/;"	d
UART_PAD_CTRL	board/barco/titanium/titanium.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/boundary/nitrogen6x/nitrogen6x.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/compulab/cm_fx6/common.h	/^#define UART_PAD_CTRL /;"	d
UART_PAD_CTRL	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/el/el6x/el6x.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/embest/mx6boards/mx6boards.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/engicam/icorem6/icorem6.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx51evk/mx51evk.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/freescale/mx53ard/mx53ard.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/freescale/mx53evk/mx53evk.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/freescale/mx53loco/mx53loco.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/freescale/mx53smd/mx53smd.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/freescale/mx6qarm2/mx6qarm2.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6sabresd/mx6sabresd.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6slevk/mx6slevk.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx6ullevk/mx6ullevk.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/freescale/vf610twr/vf610twr.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/gateworks/gw_ventana/common.h	/^#define UART_PAD_CTRL /;"	d
UART_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/seco/common/mx6.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/tbs/tbs2910/tbs2910.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/technologic/ts4800/ts4800.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/toradex/colibri_vf/colibri_vf.c	/^#define UART_PAD_CTRL	/;"	d	file:
UART_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/udoo/udoo.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/wandboard/wandboard.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/warp/warp.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PAD_CTRL	board/warp7/warp7.c	/^#define UART_PAD_CTRL /;"	d	file:
UART_PHYS	drivers/serial/serial_mxc.c	/^#define UART_PHYS	/;"	d	file:
UART_PL010_BAUD_115200	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_115200 /;"	d
UART_PL010_BAUD_1200	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_1200 /;"	d
UART_PL010_BAUD_14400	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_14400 /;"	d
UART_PL010_BAUD_19200	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_19200 /;"	d
UART_PL010_BAUD_230400	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_230400 /;"	d
UART_PL010_BAUD_2400	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_2400 /;"	d
UART_PL010_BAUD_38400	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_38400 /;"	d
UART_PL010_BAUD_460800	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_460800 /;"	d
UART_PL010_BAUD_4800	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_4800 /;"	d
UART_PL010_BAUD_57600	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_57600 /;"	d
UART_PL010_BAUD_9600	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_BAUD_9600 /;"	d
UART_PL010_CR_IIRLP	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_IIRLP /;"	d
UART_PL010_CR_LPE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_LPE /;"	d
UART_PL010_CR_MSIE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_MSIE /;"	d
UART_PL010_CR_RIE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_RIE /;"	d
UART_PL010_CR_RTIE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_RTIE /;"	d
UART_PL010_CR_SIREN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_SIREN /;"	d
UART_PL010_CR_TIE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_TIE /;"	d
UART_PL010_CR_UARTEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_CR_UARTEN /;"	d
UART_PL010_LCRH_BRK	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_BRK /;"	d
UART_PL010_LCRH_EPS	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_EPS /;"	d
UART_PL010_LCRH_FEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_FEN /;"	d
UART_PL010_LCRH_PEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_PEN /;"	d
UART_PL010_LCRH_STP2	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_STP2 /;"	d
UART_PL010_LCRH_WLEN_5	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_WLEN_5 /;"	d
UART_PL010_LCRH_WLEN_6	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_WLEN_6 /;"	d
UART_PL010_LCRH_WLEN_7	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_WLEN_7 /;"	d
UART_PL010_LCRH_WLEN_8	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL010_LCRH_WLEN_8 /;"	d
UART_PL011_CR_CTSEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_CTSEN /;"	d
UART_PL011_CR_DTR	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_DTR /;"	d
UART_PL011_CR_IIRLP	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_IIRLP /;"	d
UART_PL011_CR_LPE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_LPE /;"	d
UART_PL011_CR_OUT1	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_OUT1 /;"	d
UART_PL011_CR_OUT2	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_OUT2 /;"	d
UART_PL011_CR_RTS	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_RTS /;"	d
UART_PL011_CR_RTSEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_RTSEN /;"	d
UART_PL011_CR_RXE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_RXE /;"	d
UART_PL011_CR_SIREN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_SIREN /;"	d
UART_PL011_CR_TXE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_TXE /;"	d
UART_PL011_CR_UARTEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_CR_UARTEN /;"	d
UART_PL011_IMSC_BEIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_BEIM /;"	d
UART_PL011_IMSC_CTSMIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_CTSMIM /;"	d
UART_PL011_IMSC_DCDMIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_DCDMIM /;"	d
UART_PL011_IMSC_DSRMIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_DSRMIM /;"	d
UART_PL011_IMSC_FEIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_FEIM /;"	d
UART_PL011_IMSC_OEIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_OEIM /;"	d
UART_PL011_IMSC_PEIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_PEIM /;"	d
UART_PL011_IMSC_RIMIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_RIMIM /;"	d
UART_PL011_IMSC_RTIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_RTIM /;"	d
UART_PL011_IMSC_RXIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_RXIM /;"	d
UART_PL011_IMSC_TXIM	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_IMSC_TXIM /;"	d
UART_PL011_LCRH_BRK	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_BRK /;"	d
UART_PL011_LCRH_EPS	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_EPS /;"	d
UART_PL011_LCRH_FEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_FEN /;"	d
UART_PL011_LCRH_PEN	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_PEN /;"	d
UART_PL011_LCRH_SPS	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_SPS /;"	d
UART_PL011_LCRH_STP2	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_STP2 /;"	d
UART_PL011_LCRH_WLEN_5	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_WLEN_5 /;"	d
UART_PL011_LCRH_WLEN_6	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_WLEN_6 /;"	d
UART_PL011_LCRH_WLEN_7	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_WLEN_7 /;"	d
UART_PL011_LCRH_WLEN_8	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL011_LCRH_WLEN_8 /;"	d
UART_PL01x_FR_BUSY	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_FR_BUSY /;"	d
UART_PL01x_FR_RXFE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_FR_RXFE /;"	d
UART_PL01x_FR_RXFF	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_FR_RXFF /;"	d
UART_PL01x_FR_TMSK	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_FR_TMSK /;"	d
UART_PL01x_FR_TXFE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_FR_TXFE /;"	d
UART_PL01x_FR_TXFF	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_FR_TXFF /;"	d
UART_PL01x_RSR_BE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_RSR_BE /;"	d
UART_PL01x_RSR_FE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_RSR_FE /;"	d
UART_PL01x_RSR_OE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_RSR_OE /;"	d
UART_PL01x_RSR_PE	drivers/serial/serial_pl01x_internal.h	/^#define UART_PL01x_RSR_PE /;"	d
UART_PLL	arch/arm/mach-keystone/include/mach/clock.h	/^	UART_PLL,$/;"	e	enum:__anonc27926650203
UART_POSSR_REG	drivers/serial/serial_mvebu_a3700.c	/^#define UART_POSSR_REG	/;"	d	file:
UART_RBR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_RBR /;"	d
UART_RBR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_RBR /;"	d
UART_REG	include/ns16550.h	/^#define UART_REG(/;"	d
UART_REG_VAL_PWREMU_MGMT_UART_DISABLE	drivers/serial/ns16550.c	/^#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE /;"	d	file:
UART_REG_VAL_PWREMU_MGMT_UART_ENABLE	drivers/serial/ns16550.c	/^#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE /;"	d	file:
UART_RESET	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define UART_RESET	/;"	d
UART_REV	include/linux/serial_reg.h	/^#define UART_REV	/;"	d
UART_RFL	include/linux/serial_reg.h	/^#define UART_RFL	/;"	d
UART_RSA_BASE	include/linux/serial_reg.h	/^#define UART_RSA_BASE /;"	d
UART_RSA_FRR	include/linux/serial_reg.h	/^#define UART_RSA_FRR /;"	d
UART_RSA_IER	include/linux/serial_reg.h	/^#define UART_RSA_IER /;"	d
UART_RSA_IER_Rx_FIFO_H	include/linux/serial_reg.h	/^#define UART_RSA_IER_Rx_FIFO_H /;"	d
UART_RSA_IER_Rx_TOUT	include/linux/serial_reg.h	/^#define UART_RSA_IER_Rx_TOUT /;"	d
UART_RSA_IER_TIMER	include/linux/serial_reg.h	/^#define UART_RSA_IER_TIMER /;"	d
UART_RSA_IER_Tx_FIFO_E	include/linux/serial_reg.h	/^#define UART_RSA_IER_Tx_FIFO_E /;"	d
UART_RSA_IER_Tx_FIFO_H	include/linux/serial_reg.h	/^#define UART_RSA_IER_Tx_FIFO_H /;"	d
UART_RSA_MSR	include/linux/serial_reg.h	/^#define UART_RSA_MSR /;"	d
UART_RSA_MSR_FIFO	include/linux/serial_reg.h	/^#define UART_RSA_MSR_FIFO /;"	d
UART_RSA_MSR_FLOW	include/linux/serial_reg.h	/^#define UART_RSA_MSR_FLOW /;"	d
UART_RSA_MSR_ITYP	include/linux/serial_reg.h	/^#define UART_RSA_MSR_ITYP /;"	d
UART_RSA_MSR_SWAP	include/linux/serial_reg.h	/^#define UART_RSA_MSR_SWAP /;"	d
UART_RSA_SRR	include/linux/serial_reg.h	/^#define UART_RSA_SRR /;"	d
UART_RSA_SRR_Rx_FIFO_NEMP	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Rx_FIFO_NEMP /;"	d
UART_RSA_SRR_Rx_FIFO_NFUL	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Rx_FIFO_NFUL /;"	d
UART_RSA_SRR_Rx_FIFO_NHFL	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Rx_FIFO_NHFL /;"	d
UART_RSA_SRR_Rx_TOUT	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Rx_TOUT /;"	d
UART_RSA_SRR_TIMER	include/linux/serial_reg.h	/^#define UART_RSA_SRR_TIMER /;"	d
UART_RSA_SRR_Tx_FIFO_NEMP	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Tx_FIFO_NEMP /;"	d
UART_RSA_SRR_Tx_FIFO_NFUL	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Tx_FIFO_NFUL /;"	d
UART_RSA_SRR_Tx_FIFO_NHFL	include/linux/serial_reg.h	/^#define UART_RSA_SRR_Tx_FIFO_NHFL /;"	d
UART_RSA_TCR	include/linux/serial_reg.h	/^#define UART_RSA_TCR /;"	d
UART_RSA_TCR_SWITCH	include/linux/serial_reg.h	/^#define UART_RSA_TCR_SWITCH /;"	d
UART_RSA_TIVSR	include/linux/serial_reg.h	/^#define UART_RSA_TIVSR /;"	d
UART_RTL	include/linux/serial_reg.h	/^#define UART_RTL	/;"	d
UART_RX	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_RX	/;"	d
UART_RX	include/linux/serial_reg.h	/^#define UART_RX	/;"	d
UART_RXD_PAD	arch/x86/cpu/baytrail/early_uart.c	/^#define UART_RXD_PAD	/;"	d	file:
UART_RXEMPTY	drivers/serial/serial_arc.c	/^#define UART_RXEMPTY	/;"	d	file:
UART_RX_DATA_AVAIL	drivers/serial/serial_pic32.c	/^#define UART_RX_DATA_AVAIL	/;"	d	file:
UART_RX_ENABLE	drivers/serial/serial_pic32.c	/^#define UART_RX_ENABLE	/;"	d	file:
UART_RX_OVER	drivers/serial/serial_pic32.c	/^#define UART_RX_OVER	/;"	d	file:
UART_RX_REG	drivers/serial/serial_mvebu_a3700.c	/^#define UART_RX_REG	/;"	d	file:
UART_SCCM_AB	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_AB	/;"	d
UART_SCCM_AB	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_AB	/;"	d
UART_SCCM_AB	include/commproc.h	/^#define UART_SCCM_AB	/;"	d
UART_SCCM_BRKE	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_BRKE	/;"	d
UART_SCCM_BRKE	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_BRKE	/;"	d
UART_SCCM_BRKE	include/commproc.h	/^#define UART_SCCM_BRKE	/;"	d
UART_SCCM_BRKS	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_BRKS	/;"	d
UART_SCCM_BRKS	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_BRKS	/;"	d
UART_SCCM_BRKS	include/commproc.h	/^#define UART_SCCM_BRKS	/;"	d
UART_SCCM_BSY	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_BSY	/;"	d
UART_SCCM_BSY	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_BSY	/;"	d
UART_SCCM_BSY	include/commproc.h	/^#define UART_SCCM_BSY	/;"	d
UART_SCCM_CCR	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_CCR	/;"	d
UART_SCCM_CCR	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_CCR	/;"	d
UART_SCCM_CCR	include/commproc.h	/^#define UART_SCCM_CCR	/;"	d
UART_SCCM_GLR	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_GLR	/;"	d
UART_SCCM_GLR	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_GLR	/;"	d
UART_SCCM_GLR	include/commproc.h	/^#define UART_SCCM_GLR	/;"	d
UART_SCCM_GLT	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_GLT	/;"	d
UART_SCCM_GLT	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_GLT	/;"	d
UART_SCCM_GLT	include/commproc.h	/^#define UART_SCCM_GLT	/;"	d
UART_SCCM_GRA	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_GRA	/;"	d
UART_SCCM_GRA	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_GRA	/;"	d
UART_SCCM_GRA	include/commproc.h	/^#define UART_SCCM_GRA	/;"	d
UART_SCCM_IDL	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_IDL	/;"	d
UART_SCCM_IDL	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_IDL	/;"	d
UART_SCCM_IDL	include/commproc.h	/^#define UART_SCCM_IDL	/;"	d
UART_SCCM_RX	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_RX	/;"	d
UART_SCCM_RX	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_RX	/;"	d
UART_SCCM_RX	include/commproc.h	/^#define UART_SCCM_RX	/;"	d
UART_SCCM_TX	arch/powerpc/include/asm/cpm_8260.h	/^#define UART_SCCM_TX	/;"	d
UART_SCCM_TX	arch/powerpc/include/asm/cpm_85xx.h	/^#define UART_SCCM_TX	/;"	d
UART_SCCM_TX	include/commproc.h	/^#define UART_SCCM_TX	/;"	d
UART_SCR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_SCR /;"	d
UART_SCR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_SCR /;"	d
UART_SCR	include/linux/serial_reg.h	/^#define UART_SCR	/;"	d
UART_SEL_SCLKEPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLKEPLL	/;"	d
UART_SEL_SCLKEPLL	board/samsung/trats/setup.h	/^#define UART_SEL_SCLKEPLL	/;"	d
UART_SEL_SCLKMPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLKMPLL	/;"	d
UART_SEL_SCLKMPLL	board/samsung/trats/setup.h	/^#define UART_SEL_SCLKMPLL	/;"	d
UART_SEL_SCLKVPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLKVPLL	/;"	d
UART_SEL_SCLKVPLL	board/samsung/trats/setup.h	/^#define UART_SEL_SCLKVPLL	/;"	d
UART_SEL_SCLK_HDMI24M	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLK_HDMI24M	/;"	d
UART_SEL_SCLK_HDMI24M	board/samsung/trats/setup.h	/^#define UART_SEL_SCLK_HDMI24M	/;"	d
UART_SEL_SCLK_HDMIPHY	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLK_HDMIPHY	/;"	d
UART_SEL_SCLK_HDMIPHY	board/samsung/trats/setup.h	/^#define UART_SEL_SCLK_HDMIPHY	/;"	d
UART_SEL_SCLK_USBPHY0	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLK_USBPHY0	/;"	d
UART_SEL_SCLK_USBPHY0	board/samsung/trats/setup.h	/^#define UART_SEL_SCLK_USBPHY0	/;"	d
UART_SEL_SCLK_USBPHY1	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_SCLK_USBPHY1	/;"	d
UART_SEL_SCLK_USBPHY1	board/samsung/trats/setup.h	/^#define UART_SEL_SCLK_USBPHY1	/;"	d
UART_SEL_XUSBXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_XUSBXTI	/;"	d
UART_SEL_XUSBXTI	board/samsung/trats/setup.h	/^#define UART_SEL_XUSBXTI	/;"	d
UART_SEL_XXTI	arch/arm/mach-exynos/exynos4_setup.h	/^#define UART_SEL_XXTI	/;"	d
UART_SEL_XXTI	board/samsung/trats/setup.h	/^#define UART_SEL_XXTI	/;"	d
UART_SHIFT	arch/arm/include/debug/8250.S	/^#define UART_SHIFT /;"	d	file:
UART_SHIFT	arch/arm/mach-uniphier/debug.h	/^#define UART_SHIFT /;"	d
UART_SMART_IDLE_EN	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define UART_SMART_IDLE_EN	/;"	d
UART_STATUS_REG	drivers/serial/serial_mvebu_a3700.c	/^#define UART_STATUS_REG	/;"	d	file:
UART_STATUS_RX_RDY	drivers/serial/serial_mvebu_a3700.c	/^#define UART_STATUS_RX_RDY	/;"	d	file:
UART_STATUS_TXFIFO_FULL	drivers/serial/serial_mvebu_a3700.c	/^#define UART_STATUS_TXFIFO_FULL	/;"	d	file:
UART_Scaler	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Scaler;$/;"	m	struct:__anonf183ba530208	typeref:typename:volatile unsigned int
UART_Scaler_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Scaler_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_Scaler_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Scaler_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_Status	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Status;$/;"	m	struct:__anonf183ba530208	typeref:typename:volatile unsigned int
UART_Status_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Status_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_Status_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int UART_Status_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
UART_TCR	include/linux/serial_reg.h	/^#define UART_TCR	/;"	d
UART_TFL	include/linux/serial_reg.h	/^#define UART_TFL /;"	d
UART_THR	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define UART_THR /;"	d
UART_THR	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define UART_THR /;"	d
UART_TI752_TCR	include/linux/serial_reg.h	/^#define UART_TI752_TCR	/;"	d
UART_TI752_TLR	include/linux/serial_reg.h	/^#define UART_TI752_TLR	/;"	d
UART_TRG	include/linux/serial_reg.h	/^#define UART_TRG	/;"	d
UART_TRG_1	include/linux/serial_reg.h	/^#define UART_TRG_1	/;"	d
UART_TRG_120	include/linux/serial_reg.h	/^#define UART_TRG_120	/;"	d
UART_TRG_128	include/linux/serial_reg.h	/^#define UART_TRG_128	/;"	d
UART_TRG_16	include/linux/serial_reg.h	/^#define UART_TRG_16	/;"	d
UART_TRG_32	include/linux/serial_reg.h	/^#define UART_TRG_32	/;"	d
UART_TRG_4	include/linux/serial_reg.h	/^#define UART_TRG_4	/;"	d
UART_TRG_64	include/linux/serial_reg.h	/^#define UART_TRG_64	/;"	d
UART_TRG_8	include/linux/serial_reg.h	/^#define UART_TRG_8	/;"	d
UART_TRG_96	include/linux/serial_reg.h	/^#define UART_TRG_96	/;"	d
UART_TTL	include/linux/serial_reg.h	/^#define UART_TTL	/;"	d
UART_TX	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define UART_TX	/;"	d
UART_TX	include/linux/serial_reg.h	/^#define UART_TX	/;"	d
UART_TXD_PAD	arch/x86/cpu/baytrail/early_uart.c	/^#define UART_TXD_PAD	/;"	d	file:
UART_TXEMPTY	drivers/serial/serial_arc.c	/^#define UART_TXEMPTY	/;"	d	file:
UART_TX_BRK	drivers/serial/serial_pic32.c	/^#define UART_TX_BRK	/;"	d	file:
UART_TX_EMPTY	drivers/serial/serial_pic32.c	/^#define UART_TX_EMPTY	/;"	d	file:
UART_TX_ENABLE	drivers/serial/serial_pic32.c	/^#define UART_TX_ENABLE	/;"	d	file:
UART_TX_FULL	drivers/serial/serial_pic32.c	/^#define UART_TX_FULL	/;"	d	file:
UART_TX_REG	drivers/serial/serial_mvebu_a3700.c	/^#define UART_TX_REG	/;"	d	file:
UART_UACR_IEC	arch/m68k/include/asm/uart.h	/^#define UART_UACR_IEC	/;"	d
UART_UCR_BKCHGINT	arch/m68k/include/asm/uart.h	/^#define UART_UCR_BKCHGINT	/;"	d
UART_UCR_MISC	arch/m68k/include/asm/uart.h	/^#define UART_UCR_MISC(/;"	d
UART_UCR_NONE	arch/m68k/include/asm/uart.h	/^#define UART_UCR_NONE	/;"	d
UART_UCR_RESET_ERROR	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RESET_ERROR	/;"	d
UART_UCR_RESET_MR	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RESET_MR	/;"	d
UART_UCR_RESET_RX	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RESET_RX	/;"	d
UART_UCR_RESET_TX	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RESET_TX	/;"	d
UART_UCR_RXC	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RXC(/;"	d
UART_UCR_RX_DISABLED	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RX_DISABLED	/;"	d
UART_UCR_RX_ENABLED	arch/m68k/include/asm/uart.h	/^#define UART_UCR_RX_ENABLED	/;"	d
UART_UCR_START_BREAK	arch/m68k/include/asm/uart.h	/^#define UART_UCR_START_BREAK	/;"	d
UART_UCR_STOP_BREAK	arch/m68k/include/asm/uart.h	/^#define UART_UCR_STOP_BREAK	/;"	d
UART_UCR_TXC	arch/m68k/include/asm/uart.h	/^#define UART_UCR_TXC(/;"	d
UART_UCR_TX_DISABLED	arch/m68k/include/asm/uart.h	/^#define UART_UCR_TX_DISABLED	/;"	d
UART_UCR_TX_ENABLED	arch/m68k/include/asm/uart.h	/^#define UART_UCR_TX_ENABLED	/;"	d
UART_UCSR_RCS	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_RCS(/;"	d
UART_UCSR_RCS_CTM	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_RCS_CTM	/;"	d
UART_UCSR_RCS_CTM16	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_RCS_CTM16	/;"	d
UART_UCSR_RCS_SYS_CLK	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_RCS_SYS_CLK	/;"	d
UART_UCSR_TCS	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_TCS(/;"	d
UART_UCSR_TCS_CTM	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_TCS_CTM	/;"	d
UART_UCSR_TCS_CTM16	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_TCS_CTM16	/;"	d
UART_UCSR_TCS_SYS_CLK	arch/m68k/include/asm/uart.h	/^#define UART_UCSR_TCS_SYS_CLK	/;"	d
UART_UIMR_COS	arch/m68k/include/asm/uart.h	/^#define UART_UIMR_COS	/;"	d
UART_UIMR_DB	arch/m68k/include/asm/uart.h	/^#define UART_UIMR_DB	/;"	d
UART_UIMR_RXRDY_FU	arch/m68k/include/asm/uart.h	/^#define UART_UIMR_RXRDY_FU	/;"	d
UART_UIMR_TXRDY	arch/m68k/include/asm/uart.h	/^#define UART_UIMR_TXRDY	/;"	d
UART_UIPCR_COS	arch/m68k/include/asm/uart.h	/^#define UART_UIPCR_COS	/;"	d
UART_UIPCR_CTS	arch/m68k/include/asm/uart.h	/^#define UART_UIPCR_CTS	/;"	d
UART_UIP_CTS	arch/m68k/include/asm/uart.h	/^#define UART_UIP_CTS	/;"	d
UART_UISR_COS	arch/m68k/include/asm/uart.h	/^#define UART_UISR_COS	/;"	d
UART_UISR_DB	arch/m68k/include/asm/uart.h	/^#define UART_UISR_DB	/;"	d
UART_UISR_RXFIFO	arch/m68k/include/asm/uart.h	/^#define UART_UISR_RXFIFO	/;"	d
UART_UISR_RXFTO	arch/m68k/include/asm/uart.h	/^#define UART_UISR_RXFTO	/;"	d
UART_UISR_RXRDY_FU	arch/m68k/include/asm/uart.h	/^#define UART_UISR_RXRDY_FU	/;"	d
UART_UISR_TXFIFO	arch/m68k/include/asm/uart.h	/^#define UART_UISR_TXFIFO	/;"	d
UART_UISR_TXRDY	arch/m68k/include/asm/uart.h	/^#define UART_UISR_TXRDY	/;"	d
UART_UMR_BC	arch/m68k/include/asm/uart.h	/^#define UART_UMR_BC(/;"	d
UART_UMR_BC_5	arch/m68k/include/asm/uart.h	/^#define UART_UMR_BC_5	/;"	d
UART_UMR_BC_6	arch/m68k/include/asm/uart.h	/^#define UART_UMR_BC_6	/;"	d
UART_UMR_BC_7	arch/m68k/include/asm/uart.h	/^#define UART_UMR_BC_7	/;"	d
UART_UMR_BC_8	arch/m68k/include/asm/uart.h	/^#define UART_UMR_BC_8	/;"	d
UART_UMR_CM	arch/m68k/include/asm/uart.h	/^#define UART_UMR_CM(/;"	d
UART_UMR_CM_ECH	arch/m68k/include/asm/uart.h	/^#define UART_UMR_CM_ECH	/;"	d
UART_UMR_CM_LOCAL_LOOP	arch/m68k/include/asm/uart.h	/^#define UART_UMR_CM_LOCAL_LOOP	/;"	d
UART_UMR_CM_NORMAL	arch/m68k/include/asm/uart.h	/^#define UART_UMR_CM_NORMAL	/;"	d
UART_UMR_CM_REMOTE_LOOP	arch/m68k/include/asm/uart.h	/^#define UART_UMR_CM_REMOTE_LOOP	/;"	d
UART_UMR_ERR	arch/m68k/include/asm/uart.h	/^#define UART_UMR_ERR	/;"	d
UART_UMR_PM	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM(/;"	d
UART_UMR_PM_EVEN	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_EVEN	/;"	d
UART_UMR_PM_FORCE_HI	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_FORCE_HI	/;"	d
UART_UMR_PM_FORCE_LO	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_FORCE_LO	/;"	d
UART_UMR_PM_MULTI_ADDR	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_MULTI_ADDR	/;"	d
UART_UMR_PM_MULTI_DATA	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_MULTI_DATA	/;"	d
UART_UMR_PM_NONE	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_NONE	/;"	d
UART_UMR_PM_ODD	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PM_ODD	/;"	d
UART_UMR_PT	arch/m68k/include/asm/uart.h	/^#define UART_UMR_PT	/;"	d
UART_UMR_RXIRQ	arch/m68k/include/asm/uart.h	/^#define UART_UMR_RXIRQ	/;"	d
UART_UMR_RXRTS	arch/m68k/include/asm/uart.h	/^#define UART_UMR_RXRTS	/;"	d
UART_UMR_SB	arch/m68k/include/asm/uart.h	/^#define UART_UMR_SB(/;"	d
UART_UMR_SB_STOP_BITS_1	arch/m68k/include/asm/uart.h	/^#define UART_UMR_SB_STOP_BITS_1	/;"	d
UART_UMR_SB_STOP_BITS_15	arch/m68k/include/asm/uart.h	/^#define UART_UMR_SB_STOP_BITS_15	/;"	d
UART_UMR_SB_STOP_BITS_2	arch/m68k/include/asm/uart.h	/^#define UART_UMR_SB_STOP_BITS_2	/;"	d
UART_UMR_TXCTS	arch/m68k/include/asm/uart.h	/^#define UART_UMR_TXCTS	/;"	d
UART_UMR_TXRTS	arch/m68k/include/asm/uart.h	/^#define UART_UMR_TXRTS	/;"	d
UART_UOP0_RTS	arch/m68k/include/asm/uart.h	/^#define UART_UOP0_RTS	/;"	d
UART_UOP1_RTS	arch/m68k/include/asm/uart.h	/^#define UART_UOP1_RTS	/;"	d
UART_USR_FE	arch/m68k/include/asm/uart.h	/^#define UART_USR_FE	/;"	d
UART_USR_FFULL	arch/m68k/include/asm/uart.h	/^#define UART_USR_FFULL	/;"	d
UART_USR_OE	arch/m68k/include/asm/uart.h	/^#define UART_USR_OE	/;"	d
UART_USR_PE	arch/m68k/include/asm/uart.h	/^#define UART_USR_PE	/;"	d
UART_USR_RB	arch/m68k/include/asm/uart.h	/^#define UART_USR_RB	/;"	d
UART_USR_RXRDY	arch/m68k/include/asm/uart.h	/^#define UART_USR_RXRDY	/;"	d
UART_USR_TXEMP	arch/m68k/include/asm/uart.h	/^#define UART_USR_TXEMP	/;"	d
UART_USR_TXRDY	arch/m68k/include/asm/uart.h	/^#define UART_USR_TXRDY	/;"	d
UART_XOFF1	include/linux/serial_reg.h	/^#define UART_XOFF1	/;"	d
UART_XOFF2	include/linux/serial_reg.h	/^#define UART_XOFF2	/;"	d
UART_XON1	include/linux/serial_reg.h	/^#define UART_XON1	/;"	d
UART_XON2	include/linux/serial_reg.h	/^#define UART_XON2	/;"	d
UART_XR_EFR	include/linux/serial_reg.h	/^#define UART_XR_EFR	/;"	d
UAW0_UADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define UAW0_UADDR_MASK	/;"	d
UAW0_UADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define UAW0_UADDR_POS	/;"	d
UAW1_UADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define UAW1_UADDR_MASK	/;"	d
UAW1_UADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define UAW1_UADDR_POS	/;"	d
UAWL_UADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define UAWL_UADDR_MASK	/;"	d
UAWL_UADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define UAWL_UADDR_POS	/;"	d
UAWU_UADDR_MASK	drivers/net/xilinx_ll_temac.h	/^#define UAWU_UADDR_MASK	/;"	d
UAWU_UADDR_POS	drivers/net/xilinx_ll_temac.h	/^#define UAWU_UADDR_POS	/;"	d
UA_A_BANK_MASK	drivers/misc/fsl_iim.c	/^#define UA_A_BANK_MASK	/;"	d	file:
UA_A_ROWH_MASK	drivers/misc/fsl_iim.c	/^#define UA_A_ROWH_MASK	/;"	d	file:
UBCR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UBCR12	/;"	d
UBCR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UBCR14	/;"	d
UBCR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UBCR2	/;"	d
UBCR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UBCR4	/;"	d
UBCR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UBCR7	/;"	d
UBCR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UBCR9	/;"	d
UBERBLOCK_COUNT	include/zfs/uberblock_impl.h	/^#define UBERBLOCK_COUNT(/;"	d
UBERBLOCK_MAGIC	include/zfs/uberblock_impl.h	/^#define	UBERBLOCK_MAGIC	/;"	d
UBERBLOCK_SHIFT	include/zfs/uberblock_impl.h	/^#define	UBERBLOCK_SHIFT	/;"	d
UBERBLOCK_SIZE	include/zfs/uberblock_impl.h	/^#define	UBERBLOCK_SIZE(/;"	d
UBI support	drivers/mtd/ubi/Kconfig	/^menu "UBI support"$/;"	m
UBIFS_APPEND_FL	fs/ubifs/ubifs-media.h	/^	UBIFS_APPEND_FL    = 0x08,$/;"	e	enum:__anon16334f110603
UBIFS_BASE_HEAD	fs/ubifs/ubifs-media.h	/^#define UBIFS_BASE_HEAD /;"	d
UBIFS_BLOCKS_PER_PAGE	fs/ubifs/ubifs.h	/^#define UBIFS_BLOCKS_PER_PAGE /;"	d
UBIFS_BLOCKS_PER_PAGE_SHIFT	fs/ubifs/ubifs.h	/^#define UBIFS_BLOCKS_PER_PAGE_SHIFT /;"	d
UBIFS_BLOCK_SHIFT	fs/ubifs/ubifs-media.h	/^#define UBIFS_BLOCK_SHIFT /;"	d
UBIFS_BLOCK_SIZE	fs/ubifs/ubifs-media.h	/^#define UBIFS_BLOCK_SIZE /;"	d
UBIFS_BRANCH_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_BRANCH_SZ /;"	d
UBIFS_CH_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_CH_SZ /;"	d
UBIFS_COMPR_FL	fs/ubifs/ubifs-media.h	/^	UBIFS_COMPR_FL     = 0x01,$/;"	e	enum:__anon16334f110603
UBIFS_COMPR_LZO	fs/ubifs/ubifs-media.h	/^	UBIFS_COMPR_LZO,$/;"	e	enum:__anon16334f110703
UBIFS_COMPR_NONE	fs/ubifs/ubifs-media.h	/^	UBIFS_COMPR_NONE,$/;"	e	enum:__anon16334f110703
UBIFS_COMPR_TYPES_CNT	fs/ubifs/ubifs-media.h	/^	UBIFS_COMPR_TYPES_CNT,$/;"	e	enum:__anon16334f110703
UBIFS_COMPR_ZLIB	fs/ubifs/ubifs-media.h	/^	UBIFS_COMPR_ZLIB,$/;"	e	enum:__anon16334f110703
UBIFS_CRC32_INIT	fs/ubifs/ubifs-media.h	/^#define UBIFS_CRC32_INIT /;"	d
UBIFS_CS_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_CS_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_CS_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_CS_NODE_SZ /;"	d
UBIFS_DATA_HEAD	fs/ubifs/ubifs-media.h	/^#define UBIFS_DATA_HEAD /;"	d
UBIFS_DATA_KEY	fs/ubifs/ubifs-media.h	/^	UBIFS_DATA_KEY,$/;"	e	enum:__anon16334f110503
UBIFS_DATA_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_DATA_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_DATA_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_DATA_NODE_SZ /;"	d
UBIFS_DENT_KEY	fs/ubifs/ubifs-media.h	/^	UBIFS_DENT_KEY,$/;"	e	enum:__anon16334f110503
UBIFS_DENT_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_DENT_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_DENT_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_DENT_NODE_SZ /;"	d
UBIFS_DFS_DIR_LEN	fs/ubifs/debug.h	/^#define UBIFS_DFS_DIR_LEN /;"	d
UBIFS_DFS_DIR_NAME	fs/ubifs/debug.h	/^#define UBIFS_DFS_DIR_NAME /;"	d
UBIFS_DIRSYNC_FL	fs/ubifs/ubifs-media.h	/^	UBIFS_DIRSYNC_FL   = 0x10,$/;"	e	enum:__anon16334f110603
UBIFS_FIRST_INO	fs/ubifs/ubifs-media.h	/^#define UBIFS_FIRST_INO /;"	d
UBIFS_FLG_BIGLPT	fs/ubifs/ubifs-media.h	/^	UBIFS_FLG_BIGLPT = 0x02,$/;"	e	enum:__anon16334f110b03
UBIFS_FLG_SPACE_FIXUP	fs/ubifs/ubifs-media.h	/^	UBIFS_FLG_SPACE_FIXUP = 0x04,$/;"	e	enum:__anon16334f110b03
UBIFS_FL_MASK	fs/ubifs/ubifs-media.h	/^#define UBIFS_FL_MASK /;"	d
UBIFS_FORMAT_VERSION	fs/ubifs/ubifs-media.h	/^#define UBIFS_FORMAT_VERSION /;"	d
UBIFS_GC_HEAD	fs/ubifs/ubifs-media.h	/^#define UBIFS_GC_HEAD /;"	d
UBIFS_IDX_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_IDX_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_IDX_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_IDX_NODE_SZ /;"	d
UBIFS_IMMUTABLE_FL	fs/ubifs/ubifs-media.h	/^	UBIFS_IMMUTABLE_FL = 0x04,$/;"	e	enum:__anon16334f110603
UBIFS_INO_KEY	fs/ubifs/ubifs-media.h	/^	UBIFS_INO_KEY,$/;"	e	enum:__anon16334f110503
UBIFS_INO_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_INO_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_INO_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_INO_NODE_SZ /;"	d
UBIFS_INVALID_KEY	fs/ubifs/ubifs.h	/^#define UBIFS_INVALID_KEY /;"	d
UBIFS_IN_NODE_GROUP	fs/ubifs/ubifs-media.h	/^	UBIFS_IN_NODE_GROUP,$/;"	e	enum:__anon16334f110a03
UBIFS_ITYPES_CNT	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPES_CNT,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_BLK	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_BLK,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_CHR	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_CHR,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_DIR	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_DIR,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_FIFO	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_FIFO,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_LNK	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_LNK,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_REG	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_REG,$/;"	e	enum:__anon16334f110203
UBIFS_ITYPE_SOCK	fs/ubifs/ubifs-media.h	/^	UBIFS_ITYPE_SOCK,$/;"	e	enum:__anon16334f110203
UBIFS_KEY_HASH_R5	fs/ubifs/ubifs-media.h	/^	UBIFS_KEY_HASH_R5,$/;"	e	enum:__anon16334f110303
UBIFS_KEY_HASH_TEST	fs/ubifs/ubifs-media.h	/^	UBIFS_KEY_HASH_TEST,$/;"	e	enum:__anon16334f110303
UBIFS_KEY_OFFSET	fs/ubifs/ubifs-media.h	/^#define UBIFS_KEY_OFFSET /;"	d
UBIFS_KEY_TYPES_CNT	fs/ubifs/ubifs-media.h	/^	UBIFS_KEY_TYPES_CNT,$/;"	e	enum:__anon16334f110503
UBIFS_KMALLOC_OK	fs/ubifs/super.c	/^#define UBIFS_KMALLOC_OK /;"	d	file:
UBIFS_LAST_OF_NODE_GROUP	fs/ubifs/ubifs-media.h	/^	UBIFS_LAST_OF_NODE_GROUP,$/;"	e	enum:__anon16334f110a03
UBIFS_LOG_LNUM	fs/ubifs/ubifs-media.h	/^#define UBIFS_LOG_LNUM /;"	d
UBIFS_LPT_CRC_BITS	fs/ubifs/ubifs-media.h	/^#define UBIFS_LPT_CRC_BITS /;"	d
UBIFS_LPT_CRC_BYTES	fs/ubifs/ubifs-media.h	/^#define UBIFS_LPT_CRC_BYTES /;"	d
UBIFS_LPT_FANOUT	fs/ubifs/ubifs-media.h	/^#define UBIFS_LPT_FANOUT /;"	d
UBIFS_LPT_FANOUT_SHIFT	fs/ubifs/ubifs-media.h	/^#define UBIFS_LPT_FANOUT_SHIFT /;"	d
UBIFS_LPT_LSAVE	fs/ubifs/ubifs-media.h	/^	UBIFS_LPT_LSAVE,$/;"	e	enum:__anon16334f110103
UBIFS_LPT_LTAB	fs/ubifs/ubifs-media.h	/^	UBIFS_LPT_LTAB,$/;"	e	enum:__anon16334f110103
UBIFS_LPT_NNODE	fs/ubifs/ubifs-media.h	/^	UBIFS_LPT_NNODE,$/;"	e	enum:__anon16334f110103
UBIFS_LPT_NODE_CNT	fs/ubifs/ubifs-media.h	/^	UBIFS_LPT_NODE_CNT,$/;"	e	enum:__anon16334f110103
UBIFS_LPT_NOT_A_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_LPT_NOT_A_NODE = (1 << UBIFS_LPT_TYPE_BITS) - 1,$/;"	e	enum:__anon16334f110103
UBIFS_LPT_PNODE	fs/ubifs/ubifs-media.h	/^	UBIFS_LPT_PNODE,$/;"	e	enum:__anon16334f110103
UBIFS_LPT_TYPE_BITS	fs/ubifs/ubifs-media.h	/^#define UBIFS_LPT_TYPE_BITS /;"	d
UBIFS_MAX_BULK_READ	fs/ubifs/ubifs.h	/^#define UBIFS_MAX_BULK_READ /;"	d
UBIFS_MAX_DATA_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_DATA_NODE_SZ /;"	d
UBIFS_MAX_DENT_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_DENT_NODE_SZ /;"	d
UBIFS_MAX_INO_DATA	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_INO_DATA /;"	d
UBIFS_MAX_INO_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_INO_NODE_SZ /;"	d
UBIFS_MAX_JHEADS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_JHEADS /;"	d
UBIFS_MAX_KEY_LEN	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_KEY_LEN /;"	d
UBIFS_MAX_LEVELS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_LEVELS /;"	d
UBIFS_MAX_NLEN	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_NLEN /;"	d
UBIFS_MAX_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_NODE_SZ /;"	d
UBIFS_MAX_XENT_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MAX_XENT_NODE_SZ /;"	d
UBIFS_MIN_BUD_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_BUD_LEBS /;"	d
UBIFS_MIN_COMPRESS_DIFF	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_COMPRESS_DIFF /;"	d
UBIFS_MIN_COMPR_LEN	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_COMPR_LEN /;"	d
UBIFS_MIN_FANOUT	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_FANOUT /;"	d
UBIFS_MIN_JNL_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_JNL_LEBS /;"	d
UBIFS_MIN_LEB_CNT	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_LEB_CNT /;"	d
UBIFS_MIN_LEB_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_LEB_SZ /;"	d
UBIFS_MIN_LOG_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_LOG_LEBS /;"	d
UBIFS_MIN_LPT_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_LPT_LEBS /;"	d
UBIFS_MIN_MAIN_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_MAIN_LEBS /;"	d
UBIFS_MIN_ORPH_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MIN_ORPH_LEBS /;"	d
UBIFS_MST_DIRTY	fs/ubifs/ubifs-media.h	/^	UBIFS_MST_DIRTY = 1,$/;"	e	enum:__anon16334f110903
UBIFS_MST_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_MST_LEBS /;"	d
UBIFS_MST_LNUM	fs/ubifs/ubifs-media.h	/^#define UBIFS_MST_LNUM /;"	d
UBIFS_MST_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_MST_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_MST_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_MST_NODE_SZ /;"	d
UBIFS_MST_NO_ORPHS	fs/ubifs/ubifs-media.h	/^	UBIFS_MST_NO_ORPHS = 2,$/;"	e	enum:__anon16334f110903
UBIFS_MST_RCVRY	fs/ubifs/ubifs-media.h	/^	UBIFS_MST_RCVRY = 4,$/;"	e	enum:__anon16334f110903
UBIFS_NODE_MAGIC	fs/ubifs/ubifs-media.h	/^#define UBIFS_NODE_MAGIC /;"	d
UBIFS_NODE_TYPES_CNT	fs/ubifs/ubifs-media.h	/^	UBIFS_NODE_TYPES_CNT,$/;"	e	enum:__anon16334f110803
UBIFS_NO_NODE_GROUP	fs/ubifs/ubifs-media.h	/^	UBIFS_NO_NODE_GROUP = 0,$/;"	e	enum:__anon16334f110a03
UBIFS_ORPH_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_ORPH_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_ORPH_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_ORPH_NODE_SZ /;"	d
UBIFS_PADDING_BYTE	fs/ubifs/ubifs-media.h	/^#define UBIFS_PADDING_BYTE /;"	d
UBIFS_PAD_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_PAD_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_PAD_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_PAD_NODE_SZ /;"	d
UBIFS_REF_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_REF_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_REF_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_REF_NODE_SZ /;"	d
UBIFS_ROOT_INO	fs/ubifs/ubifs-media.h	/^#define UBIFS_ROOT_INO /;"	d
UBIFS_RO_COMPAT_VERSION	fs/ubifs/ubifs-media.h	/^#define UBIFS_RO_COMPAT_VERSION /;"	d
UBIFS_SB_LEBS	fs/ubifs/ubifs-media.h	/^#define UBIFS_SB_LEBS /;"	d
UBIFS_SB_LNUM	fs/ubifs/ubifs-media.h	/^#define UBIFS_SB_LNUM /;"	d
UBIFS_SB_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_SB_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_SB_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_SB_NODE_SZ /;"	d
UBIFS_SIMPLE_KEY_FMT	fs/ubifs/ubifs-media.h	/^	UBIFS_SIMPLE_KEY_FMT,$/;"	e	enum:__anon16334f110403
UBIFS_SK_LEN	fs/ubifs/ubifs-media.h	/^#define UBIFS_SK_LEN /;"	d
UBIFS_SUPER_MAGIC	fs/ubifs/ubifs.h	/^#define UBIFS_SUPER_MAGIC /;"	d
UBIFS_SYNC_FL	fs/ubifs/ubifs-media.h	/^	UBIFS_SYNC_FL      = 0x02,$/;"	e	enum:__anon16334f110603
UBIFS_S_KEY_BLOCK_BITS	fs/ubifs/ubifs-media.h	/^#define UBIFS_S_KEY_BLOCK_BITS /;"	d
UBIFS_S_KEY_BLOCK_MASK	fs/ubifs/ubifs-media.h	/^#define UBIFS_S_KEY_BLOCK_MASK /;"	d
UBIFS_S_KEY_HASH_BITS	fs/ubifs/ubifs-media.h	/^#define UBIFS_S_KEY_HASH_BITS /;"	d
UBIFS_S_KEY_HASH_MASK	fs/ubifs/ubifs-media.h	/^#define UBIFS_S_KEY_HASH_MASK /;"	d
UBIFS_TRUN_KEY	fs/ubifs/ubifs.h	/^#define UBIFS_TRUN_KEY /;"	d
UBIFS_TRUN_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_TRUN_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_TRUN_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_TRUN_NODE_SZ /;"	d
UBIFS_VERSION	fs/ubifs/ubifs.h	/^#define UBIFS_VERSION /;"	d
UBIFS_XATTR_FL	fs/ubifs/ubifs-media.h	/^	UBIFS_XATTR_FL     = 0x20,$/;"	e	enum:__anon16334f110603
UBIFS_XENT_KEY	fs/ubifs/ubifs-media.h	/^	UBIFS_XENT_KEY,$/;"	e	enum:__anon16334f110503
UBIFS_XENT_NODE	fs/ubifs/ubifs-media.h	/^	UBIFS_XENT_NODE,$/;"	e	enum:__anon16334f110803
UBIFS_XENT_NODE_SZ	fs/ubifs/ubifs-media.h	/^#define UBIFS_XENT_NODE_SZ /;"	d
UBIR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UBIR(/;"	d
UBIR	drivers/serial/serial_mxc.c	/^#define UBIR /;"	d	file:
UBI_ALL	include/linux/mtd/ubi.h	/^#define UBI_ALL /;"	d
UBI_BAD_FASTMAP	drivers/mtd/ubi/ubi.h	/^	UBI_BAD_FASTMAP,$/;"	e	enum:__anon5a04ca2c0303
UBI_BAD_FASTMAP	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_BAD_FASTMAP,$/;"	e	enum:__anon94038ec90303
UBI_BGT_NAME_PATTERN	drivers/mtd/ubi/ubi.h	/^#define UBI_BGT_NAME_PATTERN /;"	d
UBI_BOOTCMD	include/configs/colibri_imx7.h	/^#define UBI_BOOTCMD	/;"	d
UBI_BOOTCMD	include/configs/colibri_vf.h	/^#define UBI_BOOTCMD	/;"	d
UBI_COMPAT_DELETE	drivers/mtd/ubi/ubi-media.h	/^	UBI_COMPAT_DELETE   = 1,$/;"	e	enum:__anon037de6b90303
UBI_COMPAT_PRESERVE	drivers/mtd/ubi/ubi-media.h	/^	UBI_COMPAT_PRESERVE = 4,$/;"	e	enum:__anon037de6b90303
UBI_COMPAT_REJECT	drivers/mtd/ubi/ubi-media.h	/^	UBI_COMPAT_REJECT   = 5$/;"	e	enum:__anon037de6b90303
UBI_COMPAT_RO	drivers/mtd/ubi/ubi-media.h	/^	UBI_COMPAT_RO       = 2,$/;"	e	enum:__anon037de6b90303
UBI_CRC32_INIT	drivers/mtd/ubi/ubi-media.h	/^#define UBI_CRC32_INIT /;"	d
UBI_CTRL_IOC_MAGIC	include/mtd/ubi-user.h	/^#define UBI_CTRL_IOC_MAGIC /;"	d
UBI_DEV_NUM_AUTO	include/mtd/ubi-user.h	/^#define UBI_DEV_NUM_AUTO /;"	d
UBI_DFS_DIR_LEN	drivers/mtd/ubi/ubi.h	/^#define UBI_DFS_DIR_LEN /;"	d
UBI_DFS_DIR_NAME	drivers/mtd/ubi/ubi.h	/^#define UBI_DFS_DIR_NAME /;"	d
UBI_DYNAMIC_VOLUME	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_DYNAMIC_VOLUME = 3,$/;"	e	enum:__anon94038ec90203
UBI_DYNAMIC_VOLUME	include/mtd/ubi-user.h	/^	UBI_DYNAMIC_VOLUME = 3,$/;"	e	enum:__anon7822496e0103
UBI_EC_HDR_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_EC_HDR_MAGIC /;"	d
UBI_EC_HDR_SIZE	drivers/mtd/ubi/ubi-media.h	/^#define UBI_EC_HDR_SIZE /;"	d
UBI_EC_HDR_SIZE_CRC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_EC_HDR_SIZE_CRC /;"	d
UBI_EXCLUSIVE	include/linux/mtd/ubi.h	/^	UBI_EXCLUSIVE,$/;"	e	enum:__anon29af5e010103
UBI_FASTMAP_ANCHOR	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_FASTMAP_ANCHOR,$/;"	e	enum:__anon94038ec90103
UBI_FM_BM_SIZE	drivers/mtd/ubispl/ubispl.h	/^#define UBI_FM_BM_SIZE	/;"	d
UBI_FM_BUF_SIZE	drivers/mtd/ubispl/ubispl.h	/^#define UBI_FM_BUF_SIZE	/;"	d
UBI_FM_DATA_VOLUME_ID	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_DATA_VOLUME_ID	/;"	d
UBI_FM_EBA_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_EBA_MAGIC	/;"	d
UBI_FM_FMT_VERSION	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_FMT_VERSION	/;"	d
UBI_FM_HDR_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_HDR_MAGIC	/;"	d
UBI_FM_MAX_BLOCKS	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_MAX_BLOCKS	/;"	d
UBI_FM_MAX_POOL_SIZE	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_MAX_POOL_SIZE	/;"	d
UBI_FM_MAX_START	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_MAX_START	/;"	d
UBI_FM_MIN_POOL_SIZE	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_MIN_POOL_SIZE	/;"	d
UBI_FM_POOL_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_POOL_MAGIC	/;"	d
UBI_FM_SB_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_SB_MAGIC	/;"	d
UBI_FM_SB_VOLUME_ID	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_SB_VOLUME_ID	/;"	d
UBI_FM_VHDR_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_FM_VHDR_MAGIC	/;"	d
UBI_INTERNAL_VOL_START	drivers/mtd/ubi/ubi-media.h	/^#define UBI_INTERNAL_VOL_START /;"	d
UBI_INT_VOL_COUNT	drivers/mtd/ubi/ubi-media.h	/^#define UBI_INT_VOL_COUNT /;"	d
UBI_IOCATT	include/mtd/ubi-user.h	/^#define UBI_IOCATT /;"	d
UBI_IOCDET	include/mtd/ubi-user.h	/^#define UBI_IOCDET /;"	d
UBI_IOCEBCH	include/mtd/ubi-user.h	/^#define UBI_IOCEBCH /;"	d
UBI_IOCEBER	include/mtd/ubi-user.h	/^#define UBI_IOCEBER /;"	d
UBI_IOCEBISMAP	include/mtd/ubi-user.h	/^#define UBI_IOCEBISMAP /;"	d
UBI_IOCEBMAP	include/mtd/ubi-user.h	/^#define UBI_IOCEBMAP /;"	d
UBI_IOCEBUNMAP	include/mtd/ubi-user.h	/^#define UBI_IOCEBUNMAP /;"	d
UBI_IOCMKVOL	include/mtd/ubi-user.h	/^#define UBI_IOCMKVOL /;"	d
UBI_IOCRMVOL	include/mtd/ubi-user.h	/^#define UBI_IOCRMVOL /;"	d
UBI_IOCRNVOL	include/mtd/ubi-user.h	/^#define UBI_IOCRNVOL /;"	d
UBI_IOCRSVOL	include/mtd/ubi-user.h	/^#define UBI_IOCRSVOL /;"	d
UBI_IOCSETVOLPROP	include/mtd/ubi-user.h	/^#define UBI_IOCSETVOLPROP /;"	d
UBI_IOCVOLCRBLK	include/mtd/ubi-user.h	/^#define UBI_IOCVOLCRBLK /;"	d
UBI_IOCVOLRMBLK	include/mtd/ubi-user.h	/^#define UBI_IOCVOLRMBLK /;"	d
UBI_IOCVOLUP	include/mtd/ubi-user.h	/^#define UBI_IOCVOLUP /;"	d
UBI_IOC_MAGIC	include/mtd/ubi-user.h	/^#define UBI_IOC_MAGIC /;"	d
UBI_IO_BAD_HDR	drivers/mtd/ubi/ubi.h	/^	UBI_IO_BAD_HDR,$/;"	e	enum:__anon5a04ca2c0103
UBI_IO_BAD_HDR	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_IO_BAD_HDR,$/;"	e	enum:__anon94038ec90103
UBI_IO_BAD_HDR_EBADMSG	drivers/mtd/ubi/ubi.h	/^	UBI_IO_BAD_HDR_EBADMSG,$/;"	e	enum:__anon5a04ca2c0103
UBI_IO_BAD_HDR_EBADMSG	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_IO_BAD_HDR_EBADMSG,$/;"	e	enum:__anon94038ec90103
UBI_IO_BITFLIPS	drivers/mtd/ubi/ubi.h	/^	UBI_IO_BITFLIPS,$/;"	e	enum:__anon5a04ca2c0103
UBI_IO_BITFLIPS	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_IO_BITFLIPS,$/;"	e	enum:__anon94038ec90103
UBI_IO_FF	drivers/mtd/ubi/ubi.h	/^	UBI_IO_FF = 1,$/;"	e	enum:__anon5a04ca2c0103
UBI_IO_FF	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_IO_FF = 1,$/;"	e	enum:__anon94038ec90103
UBI_IO_FF_BITFLIPS	drivers/mtd/ubi/ubi.h	/^	UBI_IO_FF_BITFLIPS,$/;"	e	enum:__anon5a04ca2c0103
UBI_IO_FF_BITFLIPS	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_IO_FF_BITFLIPS,$/;"	e	enum:__anon94038ec90103
UBI_IO_RETRIES	drivers/mtd/ubi/ubi.h	/^#define UBI_IO_RETRIES /;"	d
UBI_LAYOUT_VOLUME_ALIGN	drivers/mtd/ubi/ubi-media.h	/^#define UBI_LAYOUT_VOLUME_ALIGN /;"	d
UBI_LAYOUT_VOLUME_COMPAT	drivers/mtd/ubi/ubi-media.h	/^#define UBI_LAYOUT_VOLUME_COMPAT /;"	d
UBI_LAYOUT_VOLUME_EBS	drivers/mtd/ubi/ubi-media.h	/^#define UBI_LAYOUT_VOLUME_EBS /;"	d
UBI_LAYOUT_VOLUME_ID	drivers/mtd/ubi/ubi-media.h	/^#define UBI_LAYOUT_VOLUME_ID /;"	d
UBI_LAYOUT_VOLUME_NAME	drivers/mtd/ubi/ubi-media.h	/^#define UBI_LAYOUT_VOLUME_NAME /;"	d
UBI_LAYOUT_VOLUME_TYPE	drivers/mtd/ubi/ubi-media.h	/^#define UBI_LAYOUT_VOLUME_TYPE /;"	d
UBI_LEB_UNMAPPED	drivers/mtd/ubi/ubi.h	/^#define UBI_LEB_UNMAPPED /;"	d
UBI_MAX_DEVICES	drivers/mtd/ubi/ubi.h	/^#define UBI_MAX_DEVICES /;"	d
UBI_MAX_ERASECOUNTER	drivers/mtd/ubi/ubi-media.h	/^#define UBI_MAX_ERASECOUNTER /;"	d
UBI_MAX_RNVOL	include/mtd/ubi-user.h	/^#define UBI_MAX_RNVOL /;"	d
UBI_MAX_SG_COUNT	include/linux/mtd/ubi.h	/^#define UBI_MAX_SG_COUNT /;"	d
UBI_MAX_VOLUMES	drivers/mtd/ubi/ubi-media.h	/^#define UBI_MAX_VOLUMES /;"	d
UBI_MAX_VOLUME_NAME	include/mtd/ubi-user.h	/^#define UBI_MAX_VOLUME_NAME /;"	d
UBI_MAX_VOL_LEBS	drivers/mtd/ubispl/ubispl.h	/^#define UBI_MAX_VOL_LEBS	/;"	d
UBI_METAONLY	include/linux/mtd/ubi.h	/^	UBI_METAONLY$/;"	e	enum:__anon29af5e010103
UBI_NAME_STR	drivers/mtd/ubi/ubi.h	/^#define UBI_NAME_STR /;"	d
UBI_NO_FASTMAP	drivers/mtd/ubi/ubi.h	/^	UBI_NO_FASTMAP = 1,$/;"	e	enum:__anon5a04ca2c0303
UBI_NO_FASTMAP	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_NO_FASTMAP = 1,$/;"	e	enum:__anon94038ec90303
UBI_PROT_QUEUE_LEN	drivers/mtd/ubi/ubi.h	/^#define UBI_PROT_QUEUE_LEN /;"	d
UBI_READONLY	include/linux/mtd/ubi.h	/^	UBI_READONLY = 1,$/;"	e	enum:__anon29af5e010103
UBI_READWRITE	include/linux/mtd/ubi.h	/^	UBI_READWRITE,$/;"	e	enum:__anon29af5e010103
UBI_SPL_VOL_IDS	drivers/mtd/ubispl/ubispl.h	/^#define UBI_SPL_VOL_IDS	/;"	d
UBI_STATIC_VOLUME	drivers/mtd/ubispl/ubi-wrapper.h	/^	UBI_STATIC_VOLUME  = 4,$/;"	e	enum:__anon94038ec90203
UBI_STATIC_VOLUME	include/mtd/ubi-user.h	/^	UBI_STATIC_VOLUME  = 4,$/;"	e	enum:__anon7822496e0103
UBI_UNKNOWN	drivers/mtd/ubi/ubi.h	/^#define UBI_UNKNOWN /;"	d
UBI_VERSION	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VERSION /;"	d
UBI_VID_DYNAMIC	drivers/mtd/ubi/ubi-media.h	/^	UBI_VID_DYNAMIC = 1,$/;"	e	enum:__anon037de6b90103
UBI_VID_HDR_MAGIC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VID_HDR_MAGIC /;"	d
UBI_VID_HDR_SIZE	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VID_HDR_SIZE /;"	d
UBI_VID_HDR_SIZE_CRC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VID_HDR_SIZE_CRC /;"	d
UBI_VID_STATIC	drivers/mtd/ubi/ubi-media.h	/^	UBI_VID_STATIC  = 2$/;"	e	enum:__anon037de6b90103
UBI_VOLUME_ADDED	include/linux/mtd/ubi.h	/^	UBI_VOLUME_ADDED,$/;"	e	enum:__anon29af5e010203
UBI_VOLUME_REMOVED	include/linux/mtd/ubi.h	/^	UBI_VOLUME_REMOVED,$/;"	e	enum:__anon29af5e010203
UBI_VOLUME_RENAMED	include/linux/mtd/ubi.h	/^	UBI_VOLUME_RENAMED,$/;"	e	enum:__anon29af5e010203
UBI_VOLUME_RESIZED	include/linux/mtd/ubi.h	/^	UBI_VOLUME_RESIZED,$/;"	e	enum:__anon29af5e010203
UBI_VOLUME_UPDATED	include/linux/mtd/ubi.h	/^	UBI_VOLUME_UPDATED,$/;"	e	enum:__anon29af5e010203
UBI_VOL_BM_SIZE	drivers/mtd/ubispl/ubispl.h	/^#define UBI_VOL_BM_SIZE	/;"	d
UBI_VOL_IOC_MAGIC	include/mtd/ubi-user.h	/^#define UBI_VOL_IOC_MAGIC /;"	d
UBI_VOL_NAME_MAX	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VOL_NAME_MAX /;"	d
UBI_VOL_NUM_AUTO	include/mtd/ubi-user.h	/^#define UBI_VOL_NUM_AUTO /;"	d
UBI_VOL_PROP_DIRECT_WRITE	include/mtd/ubi-user.h	/^	UBI_VOL_PROP_DIRECT_WRITE = 1,$/;"	e	enum:__anon7822496e0203
UBI_VTBL_AUTORESIZE_FLG	drivers/mtd/ubi/ubi-media.h	/^	UBI_VTBL_AUTORESIZE_FLG = 0x01,$/;"	e	enum:__anon037de6b90203
UBI_VTBL_RECORD_SIZE	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VTBL_RECORD_SIZE /;"	d
UBI_VTBL_RECORD_SIZE_CRC	drivers/mtd/ubi/ubi-media.h	/^#define UBI_VTBL_RECORD_SIZE_CRC /;"	d
UBI_WL_H	drivers/mtd/ubi/wl.h	/^#define UBI_WL_H$/;"	d
UBI_WL_THRESHOLD	drivers/mtd/ubi/wl.c	/^#define UBI_WL_THRESHOLD /;"	d	file:
UBLB	board/mpl/vcma9/lowlevel_init.S	/^#define UBLB	/;"	d	file:
UBLB	board/samsung/smdk2410/lowlevel_init.S	/^#define UBLB	/;"	d	file:
UBL_BLOCK_SIZE	tools/ublimage.h	/^#define UBL_BLOCK_SIZE /;"	d
UBL_IMAGE_SIZE	tools/ublimage.h	/^#define UBL_IMAGE_SIZE /;"	d
UBL_MAGIC_BASE	tools/ublimage.h	/^#define UBL_MAGIC_BASE /;"	d
UBL_MAGIC_DMA	tools/ublimage.h	/^#define UBL_MAGIC_DMA /;"	d
UBL_MAGIC_DMA_IC	tools/ublimage.h	/^#define UBL_MAGIC_DMA_IC /;"	d
UBL_MAGIC_DMA_IC_FAST	tools/ublimage.h	/^#define UBL_MAGIC_DMA_IC_FAST /;"	d
UBL_MAGIC_FAST	tools/ublimage.h	/^#define UBL_MAGIC_FAST /;"	d
UBL_MAGIC_IC	tools/ublimage.h	/^#define UBL_MAGIC_IC /;"	d
UBL_MAGIC_SAFE	tools/ublimage.h	/^#define UBL_MAGIC_SAFE /;"	d
UBMAX	include/zfs/uberblock_impl.h	/^#define UBMAX(/;"	d
UBMR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UBMR(/;"	d
UBMR	drivers/serial/serial_mxc.c	/^#define UBMR /;"	d	file:
UBOOTINCLUDE	Makefile	/^UBOOTINCLUDE    := \\$/;"	m
UBOOTRELEASE	Makefile	/^UBOOTRELEASE = $(shell cat include\/config\/uboot.release 2> \/dev\/null)$/;"	m
UBOOTVERSION	Kconfig	/^config UBOOTVERSION$/;"	c
UBOOTVERSION	Makefile	/^UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRA/;"	m
UBOOT_BINLOAD	Makefile	/^UBOOT_BINLOAD := u-boot.bin$/;"	m
UBOOT_BINLOAD	Makefile	/^UBOOT_BINLOAD := u-boot.img$/;"	m
UBOOT_CNTR	arch/arm/mach-orion5x/timer.c	/^#define UBOOT_CNTR	/;"	d	file:
UBOOT_ENV_FILE	include/configs/bfin_adi_common.h	/^#  define UBOOT_ENV_FILE /;"	d
UBOOT_ENV_FILE	include/configs/blackstamp.h	/^#  define UBOOT_ENV_FILE /;"	d
UBOOT_ENV_UPDATE	include/configs/bfin_adi_common.h	/^#   define UBOOT_ENV_UPDATE /;"	d
UBOOT_ENV_UPDATE	include/configs/bfin_adi_common.h	/^#  define UBOOT_ENV_UPDATE /;"	d
UBOOT_ENV_UPDATE	include/configs/blackstamp.h	/^#   define UBOOT_ENV_UPDATE /;"	d
UBOOT_ENV_UPDATE	include/configs/blackstamp.h	/^#  define UBOOT_ENV_UPDATE /;"	d
UBOOT_HEAD_LEN	arch/arm/cpu/armv7/ls102xa/fdt.c	/^#define UBOOT_HEAD_LEN	/;"	d	file:
UBOOT_IMG_HEAD_SIZE	include/configs/thunderx_88xx.h	/^#define UBOOT_IMG_HEAD_SIZE	/;"	d
UBOOT_MEMORYCNF_BANK_COUNT	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UBOOT_MEMORYCNF_BANK_COUNT	/;"	d
UBOOT_MEMORYCNF_BANK_MASK	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UBOOT_MEMORYCNF_BANK_MASK	/;"	d
UBOOT_MEMORYCNF_BANK_SIZE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define UBOOT_MEMORYCNF_BANK_SIZE	/;"	d
UBOOT_NOT_LOADED_FROM_SPL	include/spl.h	/^#define UBOOT_NOT_LOADED_FROM_SPL	/;"	d
UBOOT_ROMSIZE_KB	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB$/;"	c	menu:x86 architecture
UBOOT_ROMSIZE_KB_1024	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_1024$/;"	c	choice:x86 architecture""choice0d4dd9280204
UBOOT_ROMSIZE_KB_16384	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_16384$/;"	c	choice:x86 architecture""choice0d4dd9280204
UBOOT_ROMSIZE_KB_2048	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_2048$/;"	c	choice:x86 architecture""choice0d4dd9280204
UBOOT_ROMSIZE_KB_4096	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_4096$/;"	c	choice:x86 architecture""choice0d4dd9280204
UBOOT_ROMSIZE_KB_512	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_512$/;"	c	choice:x86 architecture""choice0d4dd9280204
UBOOT_ROMSIZE_KB_8192	arch/x86/Kconfig	/^config UBOOT_ROMSIZE_KB_8192$/;"	c	choice:x86 architecture""choice0d4dd9280204
UBRC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UBRC(/;"	d
UBRC	drivers/serial/serial_mxc.c	/^#define UBRC /;"	d	file:
UB_MAX_DEV	examples/api/glue.h	/^#define UB_MAX_DEV	/;"	d
UB_MAX_MR	examples/api/glue.h	/^#define UB_MAX_MR	/;"	d
UC2_RE	drivers/serial/serial_lpuart.c	/^#define UC2_RE	/;"	d	file:
UC2_TE	drivers/serial/serial_linflexuart.c	/^#define UC2_TE /;"	d	file:
UC2_TE	drivers/serial/serial_lpuart.c	/^#define UC2_TE	/;"	d	file:
UCBOOT	board/Arcturus/ucp1020/Kconfig	/^config UCBOOT$/;"	c
UCCE_BSY	drivers/qe/uec.h	/^#define UCCE_BSY	/;"	d
UCCE_CBPR	drivers/qe/uec.h	/^#define UCCE_CBPR	/;"	d
UCCE_GRA	drivers/qe/uec.h	/^#define UCCE_GRA	/;"	d
UCCE_MPD	drivers/qe/uec.h	/^#define UCCE_MPD	/;"	d
UCCE_OTHER	drivers/qe/uec.h	/^#define UCCE_OTHER	/;"	d
UCCE_RXB	drivers/qe/uec.h	/^#define UCCE_RXB	/;"	d
UCCE_RXB0	drivers/qe/uec.h	/^#define UCCE_RXB0	/;"	d
UCCE_RXB1	drivers/qe/uec.h	/^#define UCCE_RXB1	/;"	d
UCCE_RXB2	drivers/qe/uec.h	/^#define UCCE_RXB2	/;"	d
UCCE_RXB3	drivers/qe/uec.h	/^#define UCCE_RXB3	/;"	d
UCCE_RXB4	drivers/qe/uec.h	/^#define UCCE_RXB4	/;"	d
UCCE_RXB5	drivers/qe/uec.h	/^#define UCCE_RXB5	/;"	d
UCCE_RXB6	drivers/qe/uec.h	/^#define UCCE_RXB6	/;"	d
UCCE_RXB7	drivers/qe/uec.h	/^#define UCCE_RXB7	/;"	d
UCCE_RXC	drivers/qe/uec.h	/^#define UCCE_RXC	/;"	d
UCCE_RXF	drivers/qe/uec.h	/^#define UCCE_RXF	/;"	d
UCCE_RXF0	drivers/qe/uec.h	/^#define UCCE_RXF0	/;"	d
UCCE_RXF1	drivers/qe/uec.h	/^#define UCCE_RXF1	/;"	d
UCCE_RXF2	drivers/qe/uec.h	/^#define UCCE_RXF2	/;"	d
UCCE_RXF3	drivers/qe/uec.h	/^#define UCCE_RXF3	/;"	d
UCCE_RXF4	drivers/qe/uec.h	/^#define UCCE_RXF4	/;"	d
UCCE_RXF5	drivers/qe/uec.h	/^#define UCCE_RXF5	/;"	d
UCCE_RXF6	drivers/qe/uec.h	/^#define UCCE_RXF6	/;"	d
UCCE_RXF7	drivers/qe/uec.h	/^#define UCCE_RXF7	/;"	d
UCCE_SCAR	drivers/qe/uec.h	/^#define UCCE_SCAR	/;"	d
UCCE_TXB	drivers/qe/uec.h	/^#define UCCE_TXB	/;"	d
UCCE_TXB0	drivers/qe/uec.h	/^#define UCCE_TXB0	/;"	d
UCCE_TXB1	drivers/qe/uec.h	/^#define UCCE_TXB1	/;"	d
UCCE_TXB2	drivers/qe/uec.h	/^#define UCCE_TXB2	/;"	d
UCCE_TXB3	drivers/qe/uec.h	/^#define UCCE_TXB3	/;"	d
UCCE_TXB4	drivers/qe/uec.h	/^#define UCCE_TXB4	/;"	d
UCCE_TXB5	drivers/qe/uec.h	/^#define UCCE_TXB5	/;"	d
UCCE_TXB6	drivers/qe/uec.h	/^#define UCCE_TXB6	/;"	d
UCCE_TXB7	drivers/qe/uec.h	/^#define UCCE_TXB7	/;"	d
UCCE_TXC	drivers/qe/uec.h	/^#define UCCE_TXC	/;"	d
UCCE_TXE	drivers/qe/uec.h	/^#define UCCE_TXE	/;"	d
UCCS_BPR	drivers/qe/uec.h	/^#define UCCS_BPR	/;"	d
UCCS_MPD	drivers/qe/uec.h	/^#define UCCS_MPD	/;"	d
UCCS_PAU	drivers/qe/uec.h	/^#define UCCS_PAU	/;"	d
UCC_FAST_GUMR_ATM	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_ATM	/;"	d
UCC_FAST_GUMR_BISYNC	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_BISYNC	/;"	d
UCC_FAST_GUMR_CDP	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_CDP	/;"	d
UCC_FAST_GUMR_CDS	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_CDS	/;"	d
UCC_FAST_GUMR_CTSP	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_CTSP	/;"	d
UCC_FAST_GUMR_CTSS	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_CTSS	/;"	d
UCC_FAST_GUMR_ENR	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_ENR	/;"	d
UCC_FAST_GUMR_ENT	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_ENT	/;"	d
UCC_FAST_GUMR_ETH	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_ETH	/;"	d
UCC_FAST_GUMR_HDLC	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_HDLC	/;"	d
UCC_FAST_GUMR_QMC	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_QMC	/;"	d
UCC_FAST_GUMR_REVD	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_REVD	/;"	d
UCC_FAST_GUMR_RSYN	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_RSYN	/;"	d
UCC_FAST_GUMR_RTSM	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_RTSM	/;"	d
UCC_FAST_GUMR_TCI	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_TCI	/;"	d
UCC_FAST_GUMR_TRX	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_TRX	/;"	d
UCC_FAST_GUMR_TTX	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_TTX	/;"	d
UCC_FAST_GUMR_TXSY	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_TXSY	/;"	d
UCC_FAST_GUMR_UART	drivers/qe/uccf.h	/^#define UCC_FAST_GUMR_UART	/;"	d
UCC_FAST_MRBLR_ALIGNMENT	drivers/qe/uccf.h	/^#define UCC_FAST_MRBLR_ALIGNMENT	/;"	d
UCC_FAST_RX_ALIGN	drivers/qe/uccf.h	/^#define UCC_FAST_RX_ALIGN	/;"	d
UCC_FAST_RX_VIRTUAL_FIFO_SIZE_PAD	drivers/qe/uccf.h	/^#define UCC_FAST_RX_VIRTUAL_FIFO_SIZE_PAD	/;"	d
UCC_FAST_TOD	drivers/qe/uccf.h	/^#define UCC_FAST_TOD	/;"	d
UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT	drivers/qe/uccf.h	/^#define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT	/;"	d
UCC_GETH_URFET_GIGA_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_URFET_GIGA_INIT	/;"	d
UCC_GETH_URFET_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_URFET_INIT	/;"	d
UCC_GETH_URFSET_GIGA_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_URFSET_GIGA_INIT	/;"	d
UCC_GETH_URFSET_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_URFSET_INIT	/;"	d
UCC_GETH_URFS_GIGA_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_URFS_GIGA_INIT	/;"	d
UCC_GETH_URFS_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_URFS_INIT	/;"	d
UCC_GETH_UTFET_GIGA_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_UTFET_GIGA_INIT	/;"	d
UCC_GETH_UTFET_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_UTFET_INIT	/;"	d
UCC_GETH_UTFS_GIGA_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_UTFS_GIGA_INIT	/;"	d
UCC_GETH_UTFS_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_UTFS_INIT	/;"	d
UCC_GETH_UTFTT_GIGA_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_UTFTT_GIGA_INIT	/;"	d
UCC_GETH_UTFTT_INIT	drivers/qe/uccf.h	/^#define UCC_GETH_UTFTT_INIT	/;"	d
UCC_GUEMR_MODE_FAST_RX	drivers/qe/uccf.h	/^#define UCC_GUEMR_MODE_FAST_RX	/;"	d
UCC_GUEMR_MODE_FAST_TX	drivers/qe/uccf.h	/^#define UCC_GUEMR_MODE_FAST_TX	/;"	d
UCC_GUEMR_MODE_MASK_RX	drivers/qe/uccf.h	/^#define UCC_GUEMR_MODE_MASK_RX	/;"	d
UCC_GUEMR_MODE_MASK_TX	drivers/qe/uccf.h	/^#define UCC_GUEMR_MODE_MASK_TX	/;"	d
UCC_GUEMR_MODE_SLOW_RX	drivers/qe/uccf.h	/^#define UCC_GUEMR_MODE_SLOW_RX	/;"	d
UCC_GUEMR_MODE_SLOW_TX	drivers/qe/uccf.h	/^#define UCC_GUEMR_MODE_SLOW_TX	/;"	d
UCC_GUEMR_SET_RESERVED3	drivers/qe/uccf.h	/^#define UCC_GUEMR_SET_RESERVED3	/;"	d
UCC_MAX_NUM	include/fsl_qe.h	/^#define UCC_MAX_NUM	/;"	d
UCC_SLOW_TOD	drivers/qe/uccf.h	/^#define UCC_SLOW_TOD	/;"	d
UCEN	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define UCEN	/;"	d
UCEN_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define UCEN_P	/;"	d
UCLASS_ADC	include/dm/uclass-id.h	/^	UCLASS_ADC,		\/* Analog-to-digital converter *\/$/;"	e	enum:uclass_id
UCLASS_AHCI	include/dm/uclass-id.h	/^	UCLASS_AHCI,		\/* SATA disk controller *\/$/;"	e	enum:uclass_id
UCLASS_BLK	include/dm/uclass-id.h	/^	UCLASS_BLK,		\/* Block device *\/$/;"	e	enum:uclass_id
UCLASS_CLK	include/dm/uclass-id.h	/^	UCLASS_CLK,		\/* Clock source, e.g. used by peripherals *\/$/;"	e	enum:uclass_id
UCLASS_COUNT	include/dm/uclass-id.h	/^	UCLASS_COUNT,$/;"	e	enum:uclass_id
UCLASS_CPU	include/dm/uclass-id.h	/^	UCLASS_CPU,		\/* CPU, typically part of an SoC *\/$/;"	e	enum:uclass_id
UCLASS_CROS_EC	include/dm/uclass-id.h	/^	UCLASS_CROS_EC,		\/* Chrome OS EC *\/$/;"	e	enum:uclass_id
UCLASS_DEMO	include/dm/uclass-id.h	/^	UCLASS_DEMO,$/;"	e	enum:uclass_id
UCLASS_DISPLAY	include/dm/uclass-id.h	/^	UCLASS_DISPLAY,		\/* Display (e.g. DisplayPort, HDMI) *\/$/;"	e	enum:uclass_id
UCLASS_DMA	include/dm/uclass-id.h	/^	UCLASS_DMA,		\/* Direct Memory Access *\/$/;"	e	enum:uclass_id
UCLASS_DRIVER	include/dm/uclass.h	/^#define UCLASS_DRIVER(/;"	d
UCLASS_ETH	include/dm/uclass-id.h	/^	UCLASS_ETH,		\/* Ethernet device *\/$/;"	e	enum:uclass_id
UCLASS_GPIO	include/dm/uclass-id.h	/^	UCLASS_GPIO,		\/* Bank of general-purpose I\/O pins *\/$/;"	e	enum:uclass_id
UCLASS_I2C	include/dm/uclass-id.h	/^	UCLASS_I2C,		\/* I2C bus *\/$/;"	e	enum:uclass_id
UCLASS_I2C_EEPROM	include/dm/uclass-id.h	/^	UCLASS_I2C_EEPROM,	\/* I2C EEPROM device *\/$/;"	e	enum:uclass_id
UCLASS_I2C_EMUL	include/dm/uclass-id.h	/^	UCLASS_I2C_EMUL,	\/* sandbox I2C device emulator *\/$/;"	e	enum:uclass_id
UCLASS_I2C_GENERIC	include/dm/uclass-id.h	/^	UCLASS_I2C_GENERIC,	\/* Generic I2C device *\/$/;"	e	enum:uclass_id
UCLASS_I2C_MUX	include/dm/uclass-id.h	/^	UCLASS_I2C_MUX,		\/* I2C multiplexer *\/$/;"	e	enum:uclass_id
UCLASS_INVALID	include/dm/uclass-id.h	/^	UCLASS_INVALID = -1,$/;"	e	enum:uclass_id
UCLASS_IRQ	include/dm/uclass-id.h	/^	UCLASS_IRQ,		\/* Interrupt controller *\/$/;"	e	enum:uclass_id
UCLASS_KEYBOARD	include/dm/uclass-id.h	/^	UCLASS_KEYBOARD,	\/* Keyboard input device *\/$/;"	e	enum:uclass_id
UCLASS_LED	include/dm/uclass-id.h	/^	UCLASS_LED,		\/* Light-emitting diode (LED) *\/$/;"	e	enum:uclass_id
UCLASS_LPC	include/dm/uclass-id.h	/^	UCLASS_LPC,		\/* x86 'low pin count' interface *\/$/;"	e	enum:uclass_id
UCLASS_MAILBOX	include/dm/uclass-id.h	/^	UCLASS_MAILBOX,		\/* Mailbox controller *\/$/;"	e	enum:uclass_id
UCLASS_MASS_STORAGE	include/dm/uclass-id.h	/^	UCLASS_MASS_STORAGE,	\/* Mass storage device *\/$/;"	e	enum:uclass_id
UCLASS_MISC	include/dm/uclass-id.h	/^	UCLASS_MISC,		\/* Miscellaneous device *\/$/;"	e	enum:uclass_id
UCLASS_MMC	include/dm/uclass-id.h	/^	UCLASS_MMC,		\/* SD \/ MMC card or chip *\/$/;"	e	enum:uclass_id
UCLASS_MOD_EXP	include/dm/uclass-id.h	/^	UCLASS_MOD_EXP,		\/* RSA Mod Exp device *\/$/;"	e	enum:uclass_id
UCLASS_MTD	include/dm/uclass-id.h	/^	UCLASS_MTD,		\/* Memory Technology Device (MTD) device *\/$/;"	e	enum:uclass_id
UCLASS_NORTHBRIDGE	include/dm/uclass-id.h	/^	UCLASS_NORTHBRIDGE,	\/* Intel Northbridge \/ SDRAM controller *\/$/;"	e	enum:uclass_id
UCLASS_PANEL	include/dm/uclass-id.h	/^	UCLASS_PANEL,		\/* Display panel, such as an LCD *\/$/;"	e	enum:uclass_id
UCLASS_PANEL_BACKLIGHT	include/dm/uclass-id.h	/^	UCLASS_PANEL_BACKLIGHT,	\/* Backlight controller for panel *\/$/;"	e	enum:uclass_id
UCLASS_PCH	include/dm/uclass-id.h	/^	UCLASS_PCH,		\/* x86 platform controller hub *\/$/;"	e	enum:uclass_id
UCLASS_PCI	include/dm/uclass-id.h	/^	UCLASS_PCI,		\/* PCI bus *\/$/;"	e	enum:uclass_id
UCLASS_PCI_EMUL	include/dm/uclass-id.h	/^	UCLASS_PCI_EMUL,	\/* sandbox PCI device emulator *\/$/;"	e	enum:uclass_id
UCLASS_PCI_GENERIC	include/dm/uclass-id.h	/^	UCLASS_PCI_GENERIC,	\/* Generic PCI bus device *\/$/;"	e	enum:uclass_id
UCLASS_PINCONFIG	include/dm/uclass-id.h	/^	UCLASS_PINCONFIG,	\/* Pin configuration node device *\/$/;"	e	enum:uclass_id
UCLASS_PINCTRL	include/dm/uclass-id.h	/^	UCLASS_PINCTRL,		\/* Pinctrl (pin muxing\/configuration) device *\/$/;"	e	enum:uclass_id
UCLASS_PMIC	include/dm/uclass-id.h	/^	UCLASS_PMIC,		\/* PMIC I\/O device *\/$/;"	e	enum:uclass_id
UCLASS_POWER_DOMAIN	include/dm/uclass-id.h	/^	UCLASS_POWER_DOMAIN,	\/* (SoC) Power domains *\/$/;"	e	enum:uclass_id
UCLASS_PWM	include/dm/uclass-id.h	/^	UCLASS_PWM,		\/* Pulse-width modulator *\/$/;"	e	enum:uclass_id
UCLASS_PWRSEQ	include/dm/uclass-id.h	/^	UCLASS_PWRSEQ,		\/* Power sequence device *\/$/;"	e	enum:uclass_id
UCLASS_RAM	include/dm/uclass-id.h	/^	UCLASS_RAM,		\/* RAM controller *\/$/;"	e	enum:uclass_id
UCLASS_REGULATOR	include/dm/uclass-id.h	/^	UCLASS_REGULATOR,	\/* Regulator device *\/$/;"	e	enum:uclass_id
UCLASS_REMOTEPROC	include/dm/uclass-id.h	/^	UCLASS_REMOTEPROC,	\/* Remote Processor device *\/$/;"	e	enum:uclass_id
UCLASS_RESET	include/dm/uclass-id.h	/^	UCLASS_RESET,		\/* Reset controller device *\/$/;"	e	enum:uclass_id
UCLASS_ROOT	include/dm/uclass-id.h	/^	UCLASS_ROOT = 0,$/;"	e	enum:uclass_id
UCLASS_RTC	include/dm/uclass-id.h	/^	UCLASS_RTC,		\/* Real time clock device *\/$/;"	e	enum:uclass_id
UCLASS_SERIAL	include/dm/uclass-id.h	/^	UCLASS_SERIAL,		\/* Serial UART *\/$/;"	e	enum:uclass_id
UCLASS_SIMPLE_BUS	include/dm/uclass-id.h	/^	UCLASS_SIMPLE_BUS,	\/* bus with child devices *\/$/;"	e	enum:uclass_id
UCLASS_SPI	include/dm/uclass-id.h	/^	UCLASS_SPI,		\/* SPI bus *\/$/;"	e	enum:uclass_id
UCLASS_SPI_EMUL	include/dm/uclass-id.h	/^	UCLASS_SPI_EMUL,	\/* sandbox SPI device emulator *\/$/;"	e	enum:uclass_id
UCLASS_SPI_FLASH	include/dm/uclass-id.h	/^	UCLASS_SPI_FLASH,	\/* SPI flash *\/$/;"	e	enum:uclass_id
UCLASS_SPI_GENERIC	include/dm/uclass-id.h	/^	UCLASS_SPI_GENERIC,	\/* Generic SPI flash target *\/$/;"	e	enum:uclass_id
UCLASS_SPMI	include/dm/uclass-id.h	/^	UCLASS_SPMI,		\/* System Power Management Interface bus *\/$/;"	e	enum:uclass_id
UCLASS_SYSCON	include/dm/uclass-id.h	/^	UCLASS_SYSCON,		\/* System configuration device *\/$/;"	e	enum:uclass_id
UCLASS_SYSRESET	include/dm/uclass-id.h	/^	UCLASS_SYSRESET,	\/* System reset device *\/$/;"	e	enum:uclass_id
UCLASS_TEST	include/dm/uclass-id.h	/^	UCLASS_TEST,$/;"	e	enum:uclass_id
UCLASS_TEST_BUS	include/dm/uclass-id.h	/^	UCLASS_TEST_BUS,$/;"	e	enum:uclass_id
UCLASS_TEST_FDT	include/dm/uclass-id.h	/^	UCLASS_TEST_FDT,$/;"	e	enum:uclass_id
UCLASS_THERMAL	include/dm/uclass-id.h	/^	UCLASS_THERMAL,		\/* Thermal sensor *\/$/;"	e	enum:uclass_id
UCLASS_TIMER	include/dm/uclass-id.h	/^	UCLASS_TIMER,		\/* Timer device *\/$/;"	e	enum:uclass_id
UCLASS_TPM	include/dm/uclass-id.h	/^	UCLASS_TPM,		\/* Trusted Platform Module TIS interface *\/$/;"	e	enum:uclass_id
UCLASS_USB	include/dm/uclass-id.h	/^	UCLASS_USB,		\/* USB bus *\/$/;"	e	enum:uclass_id
UCLASS_USB_DEV_GENERIC	include/dm/uclass-id.h	/^	UCLASS_USB_DEV_GENERIC,	\/* USB generic device *\/$/;"	e	enum:uclass_id
UCLASS_USB_EMUL	include/dm/uclass-id.h	/^	UCLASS_USB_EMUL,	\/* sandbox USB bus device emulator *\/$/;"	e	enum:uclass_id
UCLASS_USB_HUB	include/dm/uclass-id.h	/^	UCLASS_USB_HUB,		\/* USB hub *\/$/;"	e	enum:uclass_id
UCLASS_VIDEO	include/dm/uclass-id.h	/^	UCLASS_VIDEO,		\/* Video or LCD device *\/$/;"	e	enum:uclass_id
UCLASS_VIDEO_BRIDGE	include/dm/uclass-id.h	/^	UCLASS_VIDEO_BRIDGE,	\/* Video bridge, e.g. DisplayPort to LVDS *\/$/;"	e	enum:uclass_id
UCLASS_VIDEO_CONSOLE	include/dm/uclass-id.h	/^	UCLASS_VIDEO_CONSOLE,	\/* Text console driver for video device *\/$/;"	e	enum:uclass_id
UCLKCR	arch/sh/include/asm/cpu_sh7720.h	/^#define UCLKCR	/;"	d
UCLKCR_A	board/ms7720se/lowlevel_init.S	/^UCLKCR_A:	.long	0xA40A0008$/;"	l
UCLKCR_D	board/ms7720se/lowlevel_init.S	/^UCLKCR_D:	.word	0xA5C0$/;"	l
UCMD_RESET	drivers/usb/host/ehci-mx6.c	/^#define UCMD_RESET	/;"	d	file:
UCMD_RESET	drivers/usb/host/ehci-vf.c	/^#define UCMD_RESET	/;"	d	file:
UCMD_RUN_STOP	drivers/usb/host/ehci-mx6.c	/^#define UCMD_RUN_STOP /;"	d	file:
UCMD_RUN_STOP	drivers/usb/host/ehci-vf.c	/^#define UCMD_RUN_STOP	/;"	d	file:
UCODE_HEADER_LEN	arch/x86/include/asm/processor.h	/^#define UCODE_HEADER_LEN	/;"	d
UCR0_MASK	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UCR0_MASK /;"	d	file:
UCR0_UDIV_POS	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UCR0_UDIV_POS /;"	d	file:
UCR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UCR1(/;"	d
UCR1	drivers/serial/serial_mxc.c	/^#define UCR1 /;"	d	file:
UCR1_ADBR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_ADBR /;"	d
UCR1_ADBR	drivers/serial/serial_mxc.c	/^#define  UCR1_ADBR /;"	d	file:
UCR1_ADEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_ADEN /;"	d
UCR1_ADEN	drivers/serial/serial_mxc.c	/^#define  UCR1_ADEN /;"	d	file:
UCR1_DOZE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_DOZE /;"	d
UCR1_DOZE	drivers/serial/serial_mxc.c	/^#define  UCR1_DOZE /;"	d	file:
UCR1_IDEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_IDEN /;"	d
UCR1_IDEN	drivers/serial/serial_mxc.c	/^#define  UCR1_IDEN /;"	d	file:
UCR1_IREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_IREN /;"	d
UCR1_IREN	drivers/serial/serial_mxc.c	/^#define  UCR1_IREN /;"	d	file:
UCR1_MASK	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UCR1_MASK /;"	d	file:
UCR1_RDMAEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_RDMAEN /;"	d
UCR1_RDMAEN	drivers/serial/serial_mxc.c	/^#define  UCR1_RDMAEN /;"	d	file:
UCR1_RRDYEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_RRDYEN /;"	d
UCR1_RRDYEN	drivers/serial/serial_mxc.c	/^#define  UCR1_RRDYEN /;"	d	file:
UCR1_RTSDEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_RTSDEN /;"	d
UCR1_RTSDEN	drivers/serial/serial_mxc.c	/^#define  UCR1_RTSDEN /;"	d	file:
UCR1_SNDBRK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_SNDBRK /;"	d
UCR1_SNDBRK	drivers/serial/serial_mxc.c	/^#define  UCR1_SNDBRK /;"	d	file:
UCR1_TDMAEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_TDMAEN /;"	d
UCR1_TDMAEN	drivers/serial/serial_mxc.c	/^#define  UCR1_TDMAEN /;"	d	file:
UCR1_TRDYEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_TRDYEN /;"	d
UCR1_TRDYEN	drivers/serial/serial_mxc.c	/^#define  UCR1_TRDYEN /;"	d	file:
UCR1_TXMPTYEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_TXMPTYEN /;"	d
UCR1_TXMPTYEN	drivers/serial/serial_mxc.c	/^#define  UCR1_TXMPTYEN /;"	d	file:
UCR1_UARTCLKEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_UARTCLKEN /;"	d
UCR1_UARTCLKEN	drivers/serial/serial_mxc.c	/^#define  UCR1_UARTCLKEN /;"	d	file:
UCR1_UARTEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR1_UARTEN /;"	d
UCR1_UARTEN	drivers/serial/serial_mxc.c	/^#define  UCR1_UARTEN /;"	d	file:
UCR1_UDIV_POS	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UCR1_UDIV_POS /;"	d	file:
UCR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UCR2(/;"	d
UCR2	drivers/serial/serial_mxc.c	/^#define UCR2 /;"	d	file:
UCR2_CTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_CTS /;"	d
UCR2_CTS	drivers/serial/serial_mxc.c	/^#define  UCR2_CTS /;"	d	file:
UCR2_CTSC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_CTSC	/;"	d
UCR2_CTSC	drivers/serial/serial_mxc.c	/^#define  UCR2_CTSC	/;"	d	file:
UCR2_ESCEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_ESCEN /;"	d
UCR2_ESCEN	drivers/serial/serial_mxc.c	/^#define  UCR2_ESCEN /;"	d	file:
UCR2_ESCI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_ESCI	/;"	d
UCR2_ESCI	drivers/serial/serial_mxc.c	/^#define  UCR2_ESCI	/;"	d	file:
UCR2_IRTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_IRTS	/;"	d
UCR2_IRTS	drivers/serial/serial_mxc.c	/^#define  UCR2_IRTS	/;"	d	file:
UCR2_PREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_PREN /;"	d
UCR2_PREN	drivers/serial/serial_mxc.c	/^#define  UCR2_PREN /;"	d	file:
UCR2_PROE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_PROE /;"	d
UCR2_PROE	drivers/serial/serial_mxc.c	/^#define  UCR2_PROE /;"	d	file:
UCR2_RTSEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_RTSEN /;"	d
UCR2_RTSEN	drivers/serial/serial_mxc.c	/^#define  UCR2_RTSEN /;"	d	file:
UCR2_RXEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_RXEN /;"	d
UCR2_RXEN	drivers/serial/serial_mxc.c	/^#define  UCR2_RXEN /;"	d	file:
UCR2_SRST	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_SRST	/;"	d
UCR2_SRST	drivers/serial/serial_mxc.c	/^#define  UCR2_SRST	/;"	d	file:
UCR2_STPB	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_STPB /;"	d
UCR2_STPB	drivers/serial/serial_mxc.c	/^#define  UCR2_STPB /;"	d	file:
UCR2_TXEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_TXEN /;"	d
UCR2_TXEN	drivers/serial/serial_mxc.c	/^#define  UCR2_TXEN /;"	d	file:
UCR2_WS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR2_WS /;"	d
UCR2_WS	drivers/serial/serial_mxc.c	/^#define  UCR2_WS /;"	d	file:
UCR3	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UCR3(/;"	d
UCR3	drivers/serial/serial_mxc.c	/^#define UCR3 /;"	d	file:
UCR3_ADNIMP	drivers/serial/serial_mxc.c	/^#define  UCR3_ADNIMP /;"	d	file:
UCR3_AIRINTEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_AIRINTEN /;"	d
UCR3_AIRINTEN	drivers/serial/serial_mxc.c	/^#define  UCR3_AIRINTEN /;"	d	file:
UCR3_AWAKEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_AWAKEN	/;"	d
UCR3_AWAKEN	drivers/serial/serial_mxc.c	/^#define  UCR3_AWAKEN	/;"	d	file:
UCR3_BPEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_BPEN	/;"	d
UCR3_BPEN	drivers/serial/serial_mxc.c	/^#define  UCR3_BPEN	/;"	d	file:
UCR3_DCD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_DCD /;"	d
UCR3_DCD	drivers/serial/serial_mxc.c	/^#define  UCR3_DCD /;"	d	file:
UCR3_DSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_DSR /;"	d
UCR3_DSR	drivers/serial/serial_mxc.c	/^#define  UCR3_DSR /;"	d	file:
UCR3_DTREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_DTREN	/;"	d
UCR3_DTREN	drivers/serial/serial_mxc.c	/^#define  UCR3_DTREN	/;"	d	file:
UCR3_FRAERREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_FRAERREN /;"	d
UCR3_FRAERREN	drivers/serial/serial_mxc.c	/^#define  UCR3_FRAERREN /;"	d	file:
UCR3_INVT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_INVT	/;"	d
UCR3_INVT	drivers/serial/serial_mxc.c	/^#define  UCR3_INVT	/;"	d	file:
UCR3_PARERREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_PARERREN /;"	d
UCR3_PARERREN	drivers/serial/serial_mxc.c	/^#define  UCR3_PARERREN /;"	d	file:
UCR3_REF25	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_REF25	/;"	d
UCR3_REF25	drivers/serial/serial_mxc.c	/^#define  UCR3_REF25	/;"	d	file:
UCR3_REF30	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_REF30	/;"	d
UCR3_REF30	drivers/serial/serial_mxc.c	/^#define  UCR3_REF30	/;"	d	file:
UCR3_RI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_RI /;"	d
UCR3_RI	drivers/serial/serial_mxc.c	/^#define  UCR3_RI /;"	d	file:
UCR3_RXDSEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_RXDSEN	/;"	d
UCR3_RXDSEN	drivers/serial/serial_mxc.c	/^#define  UCR3_RXDSEN	/;"	d	file:
UCR3_TIMEOUTEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR3_TIMEOUTEN /;"	d
UCR4	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UCR4(/;"	d
UCR4	drivers/serial/serial_mxc.c	/^#define UCR4 /;"	d	file:
UCR4_BKEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_BKEN	/;"	d
UCR4_BKEN	drivers/serial/serial_mxc.c	/^#define  UCR4_BKEN	/;"	d	file:
UCR4_CTSTL_32	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_CTSTL_32 /;"	d
UCR4_CTSTL_32	drivers/serial/serial_mxc.c	/^#define  UCR4_CTSTL_32 /;"	d	file:
UCR4_DREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_DREN	/;"	d
UCR4_DREN	drivers/serial/serial_mxc.c	/^#define  UCR4_DREN	/;"	d	file:
UCR4_ENIRI	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_ENIRI	/;"	d
UCR4_ENIRI	drivers/serial/serial_mxc.c	/^#define  UCR4_ENIRI	/;"	d	file:
UCR4_INVR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_INVR	/;"	d
UCR4_INVR	drivers/serial/serial_mxc.c	/^#define  UCR4_INVR	/;"	d	file:
UCR4_IRSC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_IRSC	/;"	d
UCR4_IRSC	drivers/serial/serial_mxc.c	/^#define  UCR4_IRSC	/;"	d	file:
UCR4_OREN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_OREN	/;"	d
UCR4_OREN	drivers/serial/serial_mxc.c	/^#define  UCR4_OREN	/;"	d	file:
UCR4_REF16	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_REF16	/;"	d
UCR4_REF16	drivers/serial/serial_mxc.c	/^#define  UCR4_REF16	/;"	d	file:
UCR4_TCEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_TCEN	/;"	d
UCR4_TCEN	drivers/serial/serial_mxc.c	/^#define  UCR4_TCEN	/;"	d	file:
UCR4_WKEN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UCR4_WKEN	/;"	d
UCR4_WKEN	drivers/serial/serial_mxc.c	/^#define  UCR4_WKEN	/;"	d	file:
UCTRL_OVER_CUR_DIS	drivers/usb/host/ehci-mx6.c	/^#define UCTRL_OVER_CUR_DIS	/;"	d	file:
UCTRL_OVER_CUR_DIS	drivers/usb/host/ehci-vf.c	/^#define UCTRL_OVER_CUR_DIS	/;"	d	file:
UCTRL_OVER_CUR_POL	drivers/usb/host/ehci-mx6.c	/^#define UCTRL_OVER_CUR_POL	/;"	d	file:
UCTRL_OVER_CUR_POL	drivers/usb/host/ehci-vf.c	/^#define UCTRL_OVER_CUR_POL	/;"	d	file:
UCTRL_PWR_POL	board/ccv/xpress/xpress.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/freescale/mx6qarm2/mx6qarm2.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/freescale/mx6sabresd/mx6sabresd.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/freescale/mx6slevk/mx6slevk.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UCTRL_PWR_POL	drivers/usb/host/ehci-mx6.c	/^#define UCTRL_PWR_POL	/;"	d	file:
UChar	lib/bzip2/bzlib_private.h	/^typedef unsigned char   UChar;$/;"	t	typeref:typename:unsigned char
UDC	include/sym53c8xx.h	/^  #define   UDC /;"	d
UDCAR_ADD	include/SA-1100.h	/^#define UDCAR_ADD	/;"	d
UDCBCN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCN(/;"	d
UDCBCR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCR0 /;"	d
UDCBCRA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRA /;"	d
UDCBCRB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRB /;"	d
UDCBCRC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRC /;"	d
UDCBCRD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRD /;"	d
UDCBCRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRE /;"	d
UDCBCRF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRF /;"	d
UDCBCRG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRG /;"	d
UDCBCRH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRH /;"	d
UDCBCRI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRI /;"	d
UDCBCRJ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRJ /;"	d
UDCBCRK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRK /;"	d
UDCBCRL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRL /;"	d
UDCBCRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRM /;"	d
UDCBCRN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRN /;"	d
UDCBCRP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRP /;"	d
UDCBCRQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRQ /;"	d
UDCBCRR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRR /;"	d
UDCBCRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRS /;"	d
UDCBCRT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRT /;"	d
UDCBCRU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRU /;"	d
UDCBCRV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRV /;"	d
UDCBCRW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRW /;"	d
UDCBCRX	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCBCRX /;"	d
UDCCFR_ACM	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCFR_ACM	/;"	d
UDCCFR_AREN	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCFR_AREN	/;"	d
UDCCFR_MB1	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCFR_MB1	/;"	d
UDCCN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCN(/;"	d
UDCCONR_AISN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_AISN	/;"	d
UDCCONR_AISN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_AISN_S	/;"	d
UDCCONR_CN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_CN	/;"	d
UDCCONR_CN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_CN_S	/;"	d
UDCCONR_DE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_DE	/;"	d
UDCCONR_ED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ED	/;"	d
UDCCONR_EE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_EE	/;"	d
UDCCONR_EN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_EN	/;"	d
UDCCONR_EN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_EN_S	/;"	d
UDCCONR_ET	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ET	/;"	d
UDCCONR_ET_BULK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ET_BULK	/;"	d
UDCCONR_ET_INT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ET_INT	/;"	d
UDCCONR_ET_ISO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ET_ISO	/;"	d
UDCCONR_ET_NU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ET_NU	/;"	d
UDCCONR_ET_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_ET_S	/;"	d
UDCCONR_IN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_IN	/;"	d
UDCCONR_IN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_IN_S	/;"	d
UDCCONR_MPS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_MPS	/;"	d
UDCCONR_MPS_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCONR_MPS_S	/;"	d
UDCCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR	/;"	d
UDCCRA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRA /;"	d
UDCCRB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRB /;"	d
UDCCRC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRC /;"	d
UDCCRD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRD /;"	d
UDCCRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRE /;"	d
UDCCRF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRF /;"	d
UDCCRG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRG /;"	d
UDCCRH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRH /;"	d
UDCCRI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRI /;"	d
UDCCRJ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRJ /;"	d
UDCCRK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRK /;"	d
UDCCRL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRL /;"	d
UDCCRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRM /;"	d
UDCCRN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRN /;"	d
UDCCRP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRP /;"	d
UDCCRQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRQ /;"	d
UDCCRR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRR /;"	d
UDCCRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRS /;"	d
UDCCRT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRT /;"	d
UDCCRU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRU /;"	d
UDCCRV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRV /;"	d
UDCCRW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRW /;"	d
UDCCRX	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCRX /;"	d
UDCCR_AAISN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_AAISN	/;"	d
UDCCR_AAISN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_AAISN_S	/;"	d
UDCCR_AALTHNP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_AALTHNP	/;"	d
UDCCR_ACN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_ACN	/;"	d
UDCCR_ACN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_ACN_S	/;"	d
UDCCR_AHNP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_AHNP	/;"	d
UDCCR_AIN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_AIN	/;"	d
UDCCR_AIN_S	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_AIN_S	/;"	d
UDCCR_BHNP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_BHNP	/;"	d
UDCCR_DWRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_DWRE	/;"	d
UDCCR_EIM	include/SA-1100.h	/^#define UDCCR_EIM	/;"	d
UDCCR_EMCE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_EMCE	/;"	d
UDCCR_MASK_BITS	drivers/usb/gadget/pxa27x_udc.c	/^#define UDCCR_MASK_BITS /;"	d	file:
UDCCR_OEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_OEN	/;"	d
UDCCR_OEN	drivers/usb/gadget/pxa27x_udc.c	/^#define UDCCR_OEN	/;"	d	file:
UDCCR_REM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_REM	/;"	d
UDCCR_REM	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_REM	/;"	d
UDCCR_REM	include/SA-1100.h	/^#define UDCCR_REM	/;"	d
UDCCR_RESIM	include/SA-1100.h	/^#define UDCCR_RESIM	/;"	d
UDCCR_RESIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_RESIR	/;"	d
UDCCR_RESIR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_RESIR	/;"	d
UDCCR_RIM	include/SA-1100.h	/^#define UDCCR_RIM	/;"	d
UDCCR_RM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_RM	/;"	d
UDCCR_RSM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_RSM	/;"	d
UDCCR_RSM	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_RSM	/;"	d
UDCCR_RSTIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_RSTIR	/;"	d
UDCCR_RSTIR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_RSTIR	/;"	d
UDCCR_SM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_SM	/;"	d
UDCCR_SMAC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_SMAC	/;"	d
UDCCR_SRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_SRM	/;"	d
UDCCR_SRM	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_SRM	/;"	d
UDCCR_SRM	include/SA-1100.h	/^#define UDCCR_SRM	/;"	d
UDCCR_SUSIM	include/SA-1100.h	/^#define UDCCR_SUSIM	/;"	d
UDCCR_SUSIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_SUSIR	/;"	d
UDCCR_SUSIR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_SUSIR	/;"	d
UDCCR_TIM	include/SA-1100.h	/^#define UDCCR_TIM	/;"	d
UDCCR_UDA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_UDA	/;"	d
UDCCR_UDA	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_UDA	/;"	d
UDCCR_UDA	include/SA-1100.h	/^#define UDCCR_UDA	/;"	d
UDCCR_UDD	include/SA-1100.h	/^#define UDCCR_UDD	/;"	d
UDCCR_UDE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCR_UDE	/;"	d
UDCCR_UDE	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCR_UDE	/;"	d
UDCCS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0	/;"	d
UDCCS0_DE	include/SA-1100.h	/^#define UDCCS0_DE	/;"	d
UDCCS0_DRWF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_DRWF	/;"	d
UDCCS0_DRWF	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_DRWF	/;"	d
UDCCS0_FST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_FST	/;"	d
UDCCS0_FST	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_FST	/;"	d
UDCCS0_FST	include/SA-1100.h	/^#define UDCCS0_FST	/;"	d
UDCCS0_FTF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_FTF	/;"	d
UDCCS0_FTF	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_FTF	/;"	d
UDCCS0_IPR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_IPR	/;"	d
UDCCS0_IPR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_IPR	/;"	d
UDCCS0_IPR	include/SA-1100.h	/^#define UDCCS0_IPR	/;"	d
UDCCS0_OPR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_OPR	/;"	d
UDCCS0_OPR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_OPR	/;"	d
UDCCS0_OPR	include/SA-1100.h	/^#define UDCCS0_OPR	/;"	d
UDCCS0_RNE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_RNE	/;"	d
UDCCS0_RNE	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_RNE	/;"	d
UDCCS0_SA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_SA	/;"	d
UDCCS0_SA	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_SA	/;"	d
UDCCS0_SE	include/SA-1100.h	/^#define UDCCS0_SE	/;"	d
UDCCS0_SO	include/SA-1100.h	/^#define UDCCS0_SO	/;"	d
UDCCS0_SSE	include/SA-1100.h	/^#define UDCCS0_SSE	/;"	d
UDCCS0_SST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS0_SST	/;"	d
UDCCS0_SST	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS0_SST	/;"	d
UDCCS0_SST	include/SA-1100.h	/^#define UDCCS0_SST	/;"	d
UDCCS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS1	/;"	d
UDCCS10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS10	/;"	d
UDCCS11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS11	/;"	d
UDCCS12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS12	/;"	d
UDCCS13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS13	/;"	d
UDCCS14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS14	/;"	d
UDCCS15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS15	/;"	d
UDCCS1_FST	include/SA-1100.h	/^#define UDCCS1_FST	/;"	d
UDCCS1_RFS	include/SA-1100.h	/^#define UDCCS1_RFS	/;"	d
UDCCS1_RNE	include/SA-1100.h	/^#define UDCCS1_RNE	/;"	d
UDCCS1_RPC	include/SA-1100.h	/^#define UDCCS1_RPC	/;"	d
UDCCS1_RPE	include/SA-1100.h	/^#define UDCCS1_RPE	/;"	d
UDCCS1_SST	include/SA-1100.h	/^#define UDCCS1_SST	/;"	d
UDCCS2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS2	/;"	d
UDCCS2_FST	include/SA-1100.h	/^#define UDCCS2_FST	/;"	d
UDCCS2_SST	include/SA-1100.h	/^#define UDCCS2_SST	/;"	d
UDCCS2_TFS	include/SA-1100.h	/^#define UDCCS2_TFS	/;"	d
UDCCS2_TPC	include/SA-1100.h	/^#define UDCCS2_TPC	/;"	d
UDCCS2_TPE	include/SA-1100.h	/^#define UDCCS2_TPE	/;"	d
UDCCS2_TUR	include/SA-1100.h	/^#define UDCCS2_TUR	/;"	d
UDCCS3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS3	/;"	d
UDCCS4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS4	/;"	d
UDCCS5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS5	/;"	d
UDCCS6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS6	/;"	d
UDCCS7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS7	/;"	d
UDCCS8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS8	/;"	d
UDCCS9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS9	/;"	d
UDCCSN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSN(/;"	d
UDCCSR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0	/;"	d
UDCCSR0_DME	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_DME	/;"	d
UDCCSR0_FST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_FST	/;"	d
UDCCSR0_FTF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_FTF	/;"	d
UDCCSR0_IPR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_IPR	/;"	d
UDCCSR0_OPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_OPC	/;"	d
UDCCSR0_RNE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_RNE	/;"	d
UDCCSR0_SA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_SA	/;"	d
UDCCSR0_SST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR0_SST	/;"	d
UDCCSRA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRA /;"	d
UDCCSRB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRB /;"	d
UDCCSRC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRC /;"	d
UDCCSRD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRD /;"	d
UDCCSRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRE /;"	d
UDCCSRF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRF /;"	d
UDCCSRG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRG /;"	d
UDCCSRH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRH /;"	d
UDCCSRI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRI /;"	d
UDCCSRJ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRJ /;"	d
UDCCSRK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRK /;"	d
UDCCSRL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRL /;"	d
UDCCSRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRM /;"	d
UDCCSRN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRN /;"	d
UDCCSRP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRP /;"	d
UDCCSRQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRQ /;"	d
UDCCSRR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRR /;"	d
UDCCSRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRS /;"	d
UDCCSRT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRT /;"	d
UDCCSRU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRU /;"	d
UDCCSRV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRV /;"	d
UDCCSRW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRW /;"	d
UDCCSRX	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSRX /;"	d
UDCCSR_BNE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_BNE	/;"	d
UDCCSR_BNF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_BNF	/;"	d
UDCCSR_DME	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_DME	/;"	d
UDCCSR_DPE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_DPE	/;"	d
UDCCSR_FEF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_FEF	/;"	d
UDCCSR_FS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_FS	/;"	d
UDCCSR_FST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_FST	/;"	d
UDCCSR_PC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_PC	/;"	d
UDCCSR_SP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_SP	/;"	d
UDCCSR_SST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_SST	/;"	d
UDCCSR_TRN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_TRN	/;"	d
UDCCSR_WR_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCSR_WR_MASK	/;"	d
UDCCS_BI_FST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_FST	/;"	d
UDCCS_BI_FST	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_FST	/;"	d
UDCCS_BI_FTF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_FTF	/;"	d
UDCCS_BI_FTF	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_FTF	/;"	d
UDCCS_BI_SST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_SST	/;"	d
UDCCS_BI_SST	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_SST	/;"	d
UDCCS_BI_TFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_TFS	/;"	d
UDCCS_BI_TFS	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_TFS	/;"	d
UDCCS_BI_TPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_TPC	/;"	d
UDCCS_BI_TPC	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_TPC	/;"	d
UDCCS_BI_TSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_TSP	/;"	d
UDCCS_BI_TSP	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_TSP	/;"	d
UDCCS_BI_TUR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BI_TUR	/;"	d
UDCCS_BI_TUR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BI_TUR	/;"	d
UDCCS_BO_DME	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_DME	/;"	d
UDCCS_BO_DME	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_DME	/;"	d
UDCCS_BO_FST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_FST	/;"	d
UDCCS_BO_FST	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_FST	/;"	d
UDCCS_BO_RFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_RFS	/;"	d
UDCCS_BO_RFS	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_RFS	/;"	d
UDCCS_BO_RNE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_RNE	/;"	d
UDCCS_BO_RNE	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_RNE	/;"	d
UDCCS_BO_RPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_RPC	/;"	d
UDCCS_BO_RPC	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_RPC	/;"	d
UDCCS_BO_RSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_RSP	/;"	d
UDCCS_BO_RSP	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_RSP	/;"	d
UDCCS_BO_SST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_BO_SST	/;"	d
UDCCS_BO_SST	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_BO_SST	/;"	d
UDCCS_II_FTF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_II_FTF	/;"	d
UDCCS_II_TFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_II_TFS	/;"	d
UDCCS_II_TPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_II_TPC	/;"	d
UDCCS_II_TSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_II_TSP	/;"	d
UDCCS_II_TUR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_II_TUR	/;"	d
UDCCS_INT_FST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_FST	/;"	d
UDCCS_INT_FTF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_FTF	/;"	d
UDCCS_INT_SST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_SST	/;"	d
UDCCS_INT_TFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_TFS	/;"	d
UDCCS_INT_TPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_TPC	/;"	d
UDCCS_INT_TSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_TSP	/;"	d
UDCCS_INT_TUR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_INT_TUR	/;"	d
UDCCS_IO_DME	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_IO_DME	/;"	d
UDCCS_IO_DME	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_IO_DME	/;"	d
UDCCS_IO_RFS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_IO_RFS	/;"	d
UDCCS_IO_RFS	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_IO_RFS	/;"	d
UDCCS_IO_RNE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_IO_RNE	/;"	d
UDCCS_IO_RNE	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_IO_RNE	/;"	d
UDCCS_IO_ROF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_IO_ROF	/;"	d
UDCCS_IO_ROF	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_IO_ROF	/;"	d
UDCCS_IO_RPC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_IO_RPC	/;"	d
UDCCS_IO_RPC	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_IO_RPC	/;"	d
UDCCS_IO_RSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCCS_IO_RSP	/;"	d
UDCCS_IO_RSP	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UDCCS_IO_RSP	/;"	d
UDCD0_DATA	include/SA-1100.h	/^#define UDCD0_DATA	/;"	d
UDCDBG	drivers/usb/gadget/designware_udc.c	/^#define UDCDBG(/;"	d	file:
UDCDBGA	drivers/usb/gadget/designware_udc.c	/^#define UDCDBGA(/;"	d	file:
UDCDN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDN(/;"	d
UDCDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDR0 /;"	d
UDCDRA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRA /;"	d
UDCDRB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRB /;"	d
UDCDRC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRC /;"	d
UDCDRD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRD /;"	d
UDCDRE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRE /;"	d
UDCDRF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRF /;"	d
UDCDRG	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRG /;"	d
UDCDRH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRH /;"	d
UDCDRI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRI /;"	d
UDCDRJ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRJ /;"	d
UDCDRK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRK /;"	d
UDCDRL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRL /;"	d
UDCDRM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRM /;"	d
UDCDRN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRN /;"	d
UDCDRP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRP /;"	d
UDCDRQ	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRQ /;"	d
UDCDRR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRR /;"	d
UDCDRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRS /;"	d
UDCDRT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRT /;"	d
UDCDRU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRU /;"	d
UDCDRV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRV /;"	d
UDCDRW	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRW /;"	d
UDCDRX	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCDRX /;"	d
UDCDR_DATA	include/SA-1100.h	/^#define UDCDR_DATA	/;"	d
UDCFNR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCFNR	/;"	d
UDCICR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR0 /;"	d
UDCICR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR1 /;"	d
UDCICR1_IECC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR1_IECC	/;"	d
UDCICR1_IERS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR1_IERS	/;"	d
UDCICR1_IERU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR1_IERU	/;"	d
UDCICR1_IESOF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR1_IESOF	/;"	d
UDCICR1_IESU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR1_IESU	/;"	d
UDCICR_FIFOERR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR_FIFOERR	/;"	d
UDCICR_INT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR_INT(/;"	d
UDCICR_PKTCOMPL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCICR_PKTCOMPL /;"	d
UDCIMP_INMAXP	include/SA-1100.h	/^#define UDCIMP_INMAXP	/;"	d
UDCIMP_InMaxPkt	include/SA-1100.h	/^#define UDCIMP_InMaxPkt(/;"	d
UDCISR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR0 /;"	d
UDCISR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR1 /;"	d
UDCISR1_IRCC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR1_IRCC	/;"	d
UDCISR1_IRRS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR1_IRRS	/;"	d
UDCISR1_IRRU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR1_IRRU	/;"	d
UDCISR1_IRSOF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR1_IRSOF	/;"	d
UDCISR1_IRSU	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR1_IRSU	/;"	d
UDCISR_INT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCISR_INT(/;"	d
UDCOMP_OUTMAXP	include/SA-1100.h	/^#define UDCOMP_OUTMAXP	/;"	d
UDCOMP_OutMaxPkt	include/SA-1100.h	/^#define UDCOMP_OutMaxPkt(/;"	d
UDCOTGICR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR	/;"	d
UDCOTGICR_IEIDF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEIDF	/;"	d
UDCOTGICR_IEIDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEIDR	/;"	d
UDCOTGICR_IESDF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IESDF	/;"	d
UDCOTGICR_IESDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IESDR	/;"	d
UDCOTGICR_IESF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IESF	/;"	d
UDCOTGICR_IESVF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IESVF	/;"	d
UDCOTGICR_IESVR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IESVR	/;"	d
UDCOTGICR_IEVV40F	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEVV40F	/;"	d
UDCOTGICR_IEVV40R	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEVV40R	/;"	d
UDCOTGICR_IEVV44F	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEVV44F	/;"	d
UDCOTGICR_IEVV44R	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEVV44R	/;"	d
UDCOTGICR_IEXF	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEXF	/;"	d
UDCOTGICR_IEXR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDCOTGICR_IEXR	/;"	d
UDCSR_EIR	include/SA-1100.h	/^#define UDCSR_EIR	/;"	d
UDCSR_RESIR	include/SA-1100.h	/^#define UDCSR_RESIR	/;"	d
UDCSR_RIR	include/SA-1100.h	/^#define UDCSR_RIR	/;"	d
UDCSR_RSTIR	include/SA-1100.h	/^#define UDCSR_RSTIR	/;"	d
UDCSR_SUSIR	include/SA-1100.h	/^#define UDCSR_SUSIR	/;"	d
UDCSR_TIR	include/SA-1100.h	/^#define UDCSR_TIR	/;"	d
UDCWC_WC	include/SA-1100.h	/^#define UDCWC_WC	/;"	d
UDC_BCR_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDC_BCR_MASK	/;"	d
UDC_BULK_HS_PACKET_SIZE	include/usb/udc.h	/^#define UDC_BULK_HS_PACKET_SIZE	/;"	d
UDC_BULK_PACKET_SIZE	include/usb/mpc8xx_udc.h	/^#define UDC_BULK_PACKET_SIZE	/;"	d
UDC_BULK_PACKET_SIZE	include/usb/udc.h	/^#define UDC_BULK_PACKET_SIZE /;"	d
UDC_EP0	include/usb/designware_udc.h	/^#define  UDC_EP0	/;"	d
UDC_EP1	include/usb/designware_udc.h	/^#define  UDC_EP1	/;"	d
UDC_EP2	include/usb/designware_udc.h	/^#define  UDC_EP2	/;"	d
UDC_EP3	include/usb/designware_udc.h	/^#define  UDC_EP3	/;"	d
UDC_FNR_MASK	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDC_FNR_MASK	/;"	d
UDC_INIT_MDELAY	drivers/usb/gadget/designware_udc.c	/^#define UDC_INIT_MDELAY	/;"	d	file:
UDC_INT_ENDPOINT	include/usb/pxa27x_udc.h	/^#define UDC_INT_ENDPOINT /;"	d
UDC_INT_ENDPOINT	include/usb/udc.h	/^#define UDC_INT_ENDPOINT	/;"	d
UDC_INT_FIFOERROR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDC_INT_FIFOERROR	/;"	d
UDC_INT_PACKETCMP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDC_INT_PACKETCMP	/;"	d
UDC_INT_PACKET_SIZE	include/usb/mpc8xx_udc.h	/^#define UDC_INT_PACKET_SIZE	/;"	d
UDC_INT_PACKET_SIZE	include/usb/udc.h	/^#define UDC_INT_PACKET_SIZE /;"	d
UDC_IN_ENDPOINT	include/usb/pxa27x_udc.h	/^#define UDC_IN_ENDPOINT /;"	d
UDC_IN_ENDPOINT	include/usb/udc.h	/^#define UDC_IN_ENDPOINT	/;"	d
UDC_IN_PACKET_SIZE	include/usb/mpc8xx_udc.h	/^#define UDC_IN_PACKET_SIZE	/;"	d
UDC_IN_PACKET_SIZE	include/usb/udc.h	/^#define UDC_IN_PACKET_SIZE /;"	d
UDC_MAX_ENDPOINTS	drivers/usb/gadget/pxa27x_udc.c	/^#define UDC_MAX_ENDPOINTS	/;"	d	file:
UDC_OUT_ENDPOINT	include/usb/pxa27x_udc.h	/^#define UDC_OUT_ENDPOINT /;"	d
UDC_OUT_ENDPOINT	include/usb/udc.h	/^#define UDC_OUT_ENDPOINT	/;"	d
UDC_OUT_PACKET_SIZE	include/usb/mpc8xx_udc.h	/^#define UDC_OUT_PACKET_SIZE	/;"	d
UDC_OUT_PACKET_SIZE	include/usb/udc.h	/^#define UDC_OUT_PACKET_SIZE /;"	d
UDC_REGS	drivers/usb/gadget/pxa25x_udc.h	/^#define UDC_REGS	/;"	d
UDDR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR0	/;"	d
UDDR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR1	/;"	d
UDDR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR10	/;"	d
UDDR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR11	/;"	d
UDDR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR12	/;"	d
UDDR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR13	/;"	d
UDDR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR14	/;"	d
UDDR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR15	/;"	d
UDDR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR2	/;"	d
UDDR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR3	/;"	d
UDDR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR4	/;"	d
UDDR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR5	/;"	d
UDDR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR6	/;"	d
UDDR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR7	/;"	d
UDDR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR8	/;"	d
UDDR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UDDR9	/;"	d
UDEBUG	include/jffs2/load_kernel.h	/^#define UDEBUG	/;"	d
UDELAY	drivers/usb/host/isp116x-hcd.c	/^#define UDELAY	/;"	d	file:
UDIMM_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define UDIMM_MASK /;"	d
UDIV_MAX	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UDIV_MAX /;"	d	file:
UDIV_NEEDS_NORMALIZATION	arch/nios2/lib/longlong.h	/^#define UDIV_NEEDS_NORMALIZATION /;"	d
UDIV_SUBTRACT	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^#define UDIV_SUBTRACT	/;"	d	file:
UDItype	arch/arc/lib/libgcc2.h	/^typedef unsigned int UDItype	__attribute__ ((mode (DI)));$/;"	t	typeref:typename:unsigned int
UDMAIN_CSTATE	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define             UDMAIN_CSTATE /;"	d
UDMAIN_DONE_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define           UDMAIN_DONE_INT /;"	d
UDMAIN_DONE_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define          UDMAIN_DONE_MASK /;"	d
UDMAIN_FIFO_THRS	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define          UDMAIN_FIFO_THRS /;"	d
UDMAIN_TERM_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define           UDMAIN_TERM_INT /;"	d
UDMAIN_TERM_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define          UDMAIN_TERM_MASK /;"	d
UDMAOUT_CSTATE	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define            UDMAOUT_CSTATE /;"	d
UDMAOUT_DONE_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define          UDMAOUT_DONE_INT /;"	d
UDMAOUT_DONE_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define         UDMAOUT_DONE_MASK /;"	d
UDMAOUT_TERM_INT	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define          UDMAOUT_TERM_INT /;"	d
UDMAOUT_TERM_MASK	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define         UDMAOUT_TERM_MASK /;"	d
UDMA_ACCESS_TIMING	drivers/block/ftide020.h	/^unsigned int UDMA_ACCESS_TIMING[UDMA_PARAMETER][UDMA_MODE] = {$/;"	v	typeref:typename:unsigned int[][]
UDMA_MODE	drivers/block/ftide020.h	/^#define UDMA_MODE	/;"	d
UDMA_MODE0	drivers/block/ftide020.h	/^#define UDMA_MODE0	/;"	d
UDMA_MODE1	drivers/block/ftide020.h	/^#define UDMA_MODE1	/;"	d
UDMA_MODE2	drivers/block/ftide020.h	/^#define UDMA_MODE2	/;"	d
UDMA_MODE3	drivers/block/ftide020.h	/^#define UDMA_MODE3	/;"	d
UDMA_MODE4	drivers/block/ftide020.h	/^#define UDMA_MODE4	/;"	d
UDMA_MODE5	drivers/block/ftide020.h	/^#define UDMA_MODE5	/;"	d
UDMA_MODE6	drivers/block/ftide020.h	/^#define UDMA_MODE6	/;"	d
UDMA_PARAMETER	drivers/block/ftide020.h	/^#define UDMA_PARAMETER	/;"	d
UDMA_TACK	drivers/block/ftide020.h	/^#define UDMA_TACK	/;"	d
UDMA_TCVS	drivers/block/ftide020.h	/^#define UDMA_TCVS	/;"	d
UDMA_TCYC	drivers/block/ftide020.h	/^#define UDMA_TCYC	/;"	d
UDMA_TENV	drivers/block/ftide020.h	/^#define UDMA_TENV	/;"	d
UDMA_TMLI	drivers/block/ftide020.h	/^#define UDMA_TMLI	/;"	d
UDMA_TRP	drivers/block/ftide020.h	/^#define UDMA_TRP	/;"	d
UDPF	drivers/usb/eth/r8152.h	/^#define UDPF	/;"	d
UDP_CS	drivers/usb/eth/r8152.h	/^#define UDP_CS	/;"	d
UDP_HDR_SIZE	include/net.h	/^#define UDP_HDR_SIZE	/;"	d
UDP_V4_FLOW	include/linux/ethtool.h	/^#define	UDP_V4_FLOW	/;"	d
UDP_V6_FLOW	include/linux/ethtool.h	/^#define	UDP_V6_FLOW	/;"	d
UDWtype	arch/arc/lib/libgcc2.h	/^#define UDWtype	/;"	d
UDWtype	arch/nios2/lib/libgcc.c	/^typedef unsigned long long UDWtype;$/;"	t	typeref:typename:unsigned long long	file:
UDWtype	arch/nios2/lib/longlong.h	/^#define UDWtype	/;"	d
UData	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define UData(/;"	d
UData	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define UData(/;"	d
UEC_IP_PRIORITY_MAX	drivers/qe/uec.h	/^#define UEC_IP_PRIORITY_MAX	/;"	d
UEC_MRBLR_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_MRBLR_ALIGNMENT	/;"	d
UEC_NUM_OF_THREADS_1	drivers/qe/uec.h	/^	UEC_NUM_OF_THREADS_1  = 0x1,  \/* 1 *\/$/;"	e	enum:uec_num_of_threads
UEC_NUM_OF_THREADS_2	drivers/qe/uec.h	/^	UEC_NUM_OF_THREADS_2  = 0x2,  \/* 2 *\/$/;"	e	enum:uec_num_of_threads
UEC_NUM_OF_THREADS_4	drivers/qe/uec.h	/^	UEC_NUM_OF_THREADS_4  = 0x0,  \/* 4 *\/$/;"	e	enum:uec_num_of_threads
UEC_NUM_OF_THREADS_6	drivers/qe/uec.h	/^	UEC_NUM_OF_THREADS_6  = 0x3,  \/* 6 *\/$/;"	e	enum:uec_num_of_threads
UEC_NUM_OF_THREADS_8	drivers/qe/uec.h	/^	UEC_NUM_OF_THREADS_8  = 0x4   \/* 8 *\/$/;"	e	enum:uec_num_of_threads
UEC_RX_BD_QUEUES_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_BD_QUEUES_ALIGNMENT	/;"	d
UEC_RX_BD_RING_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_BD_RING_ALIGNMENT	/;"	d
UEC_RX_BD_RING_SIZE_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_BD_RING_SIZE_ALIGNMENT	/;"	d
UEC_RX_BD_RING_SIZE_MIN	drivers/qe/uec.h	/^#define UEC_RX_BD_RING_SIZE_MIN	/;"	d
UEC_RX_DATA_BUF_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_DATA_BUF_ALIGNMENT	/;"	d
UEC_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT	/;"	d
UEC_RX_GLOBAL_PRAM_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_GLOBAL_PRAM_ALIGNMENT	/;"	d
UEC_RX_INTERRUPT_COALESCING_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_INTERRUPT_COALESCING_ALIGNMENT	/;"	d
UEC_RX_PREFETCHED_BDS_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_PREFETCHED_BDS_ALIGNMENT	/;"	d
UEC_RX_STATISTICS_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_RX_STATISTICS_ALIGNMENT	/;"	d
UEC_SCHEDULER_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_SCHEDULER_ALIGNMENT	/;"	d
UEC_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT	/;"	d
UEC_THREAD_DATA_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_THREAD_DATA_ALIGNMENT	/;"	d
UEC_THREAD_RX_PRAM_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_THREAD_RX_PRAM_ALIGNMENT	/;"	d
UEC_THREAD_TX_PRAM_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_THREAD_TX_PRAM_ALIGNMENT	/;"	d
UEC_TX_BD_RING_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_TX_BD_RING_ALIGNMENT	/;"	d
UEC_TX_BD_RING_SIZE_MEMORY_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_TX_BD_RING_SIZE_MEMORY_ALIGNMENT	/;"	d
UEC_TX_BD_RING_SIZE_MIN	drivers/qe/uec.h	/^#define UEC_TX_BD_RING_SIZE_MIN	/;"	d
UEC_TX_GLOBAL_PRAM_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_TX_GLOBAL_PRAM_ALIGNMENT	/;"	d
UEC_TX_STATISTICS_ALIGNMENT	drivers/qe/uec.h	/^#define UEC_TX_STATISTICS_ALIGNMENT	/;"	d
UEC_TX_VTAG_TABLE_ENTRY_MAX	drivers/qe/uec.h	/^#define UEC_TX_VTAG_TABLE_ENTRY_MAX	/;"	d
UEC_VERBOSE_DEBUG	include/configs/km/km83xx-common.h	/^#define UEC_VERBOSE_DEBUG	/;"	d
UEC_VLAN_PRIORITY_MAX	drivers/qe/uec.h	/^#define UEC_VLAN_PRIORITY_MAX	/;"	d
UEN	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define UEN	/;"	d
UESC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UESC(/;"	d
UESC	drivers/serial/serial_mxc.c	/^#define UESC /;"	d	file:
UESCR_AUTOZ	drivers/qe/uec.h	/^#define UESCR_AUTOZ	/;"	d
UESCR_CLRCNT	drivers/qe/uec.h	/^#define UESCR_CLRCNT	/;"	d
UESCR_MAXCOV_SHIFT	drivers/qe/uec.h	/^#define UESCR_MAXCOV_SHIFT	/;"	d
UESCR_SCOV_SHIFT	drivers/qe/uec.h	/^#define UESCR_SCOV_SHIFT	/;"	d
UESP	arch/x86/include/asm/ptrace.h	/^#define UESP /;"	d
UFCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UFCR(/;"	d
UFCR	drivers/serial/serial_mxc.c	/^#define UFCR /;"	d	file:
UFCR_DCEDTE	drivers/serial/serial_mxc.c	/^#define  UFCR_DCEDTE	/;"	d	file:
UFCR_RFDIV	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UFCR_RFDIV /;"	d
UFCR_RFDIV	drivers/serial/serial_mxc.c	/^#define  UFCR_RFDIV /;"	d	file:
UFCR_RFDIV_SHF	drivers/serial/serial_mxc.c	/^#define  UFCR_RFDIV_SHF /;"	d	file:
UFCR_RXTL_SHF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UFCR_RXTL_SHF /;"	d
UFCR_RXTL_SHF	drivers/serial/serial_mxc.c	/^#define  UFCR_RXTL_SHF /;"	d	file:
UFCR_TXTL_SHF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UFCR_TXTL_SHF /;"	d
UFCR_TXTL_SHF	drivers/serial/serial_mxc.c	/^#define  UFCR_TXTL_SHF /;"	d	file:
UFNRH	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UFNRH	/;"	d
UFNRH_IPE14	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UFNRH_IPE14	/;"	d
UFNRH_IPE4	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UFNRH_IPE4	/;"	d
UFNRH_IPE9	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UFNRH_IPE9	/;"	d
UFNRH_SIM	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UFNRH_SIM	/;"	d
UFNRH_SIR	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UFNRH_SIR	/;"	d
UFNRL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UFNRL	/;"	d
UFRMNUM	drivers/usb/host/r8a66597.h	/^#define UFRMNUM	/;"	d
UFRNM	drivers/usb/host/r8a66597.h	/^#define	UFRNM	/;"	d
UGETH_AN_TIMEOUT	drivers/qe/uec_phy.h	/^#define UGETH_AN_TIMEOUT	/;"	d
UHCBCED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCBCED	/;"	d
UHCBHED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCBHED	/;"	d
UHCCCED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCCCED	/;"	d
UHCCHED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCCHED	/;"	d
UHCCOMS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCCOMS	/;"	d
UHCCOMS_HCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCCOMS_HCR	/;"	d
UHCDHEAD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCDHEAD	/;"	d
UHCFMI	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCFMI	/;"	d
UHCFMN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCFMN	/;"	d
UHCFMR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCFMR	/;"	d
UHCHCCA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHCCA	/;"	d
UHCHCON	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHCON	/;"	d
UHCHIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE	/;"	d
UHCHIE_HBAIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE_HBAIE	/;"	d
UHCHIE_RWIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE_RWIE	/;"	d
UHCHIE_TAIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE_TAIE	/;"	d
UHCHIE_UPRIE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE_UPRIE	/;"	d
UHCHIE_UPS1IE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE_UPS1IE	/;"	d
UHCHIE_UPS2IE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIE_UPS2IE	/;"	d
UHCHIT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHIT	/;"	d
UHCHR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR	/;"	d
UHCHR_CGR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_CGR	/;"	d
UHCHR_FHR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_FHR	/;"	d
UHCHR_FSBIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_FSBIR	/;"	d
UHCHR_PCPL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_PCPL	/;"	d
UHCHR_PSPL	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_PSPL	/;"	d
UHCHR_SSDC	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_SSDC	/;"	d
UHCHR_SSE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_SSE	/;"	d
UHCHR_SSEP0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_SSEP0	/;"	d
UHCHR_SSEP1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_SSEP1	/;"	d
UHCHR_SSEP2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_SSEP2	/;"	d
UHCHR_UIT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCHR_UIT	/;"	d
UHCINTD	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCINTD	/;"	d
UHCINTE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCINTE	/;"	d
UHCINTS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCINTS	/;"	d
UHCI_NULL_DATA_SIZE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define UHCI_NULL_DATA_SIZE /;"	d
UHCI_NULL_DATA_SIZE	board/mpl/common/usb_uhci.h	/^#define UHCI_NULL_DATA_SIZE /;"	d
UHCI_PID	arch/sparc/cpu/leon3/usb_uhci.h	/^#define UHCI_PID /;"	d
UHCI_PID	board/mpl/common/usb_uhci.h	/^#define UHCI_PID /;"	d
UHCI_PTR_BITS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define UHCI_PTR_BITS /;"	d
UHCI_PTR_BITS	board/mpl/common/usb_uhci.h	/^#define UHCI_PTR_BITS /;"	d
UHCI_PTR_DEPTH	arch/sparc/cpu/leon3/usb_uhci.h	/^#define UHCI_PTR_DEPTH /;"	d
UHCI_PTR_DEPTH	board/mpl/common/usb_uhci.h	/^#define UHCI_PTR_DEPTH /;"	d
UHCI_PTR_QH	arch/sparc/cpu/leon3/usb_uhci.h	/^#define UHCI_PTR_QH /;"	d
UHCI_PTR_QH	board/mpl/common/usb_uhci.h	/^#define UHCI_PTR_QH /;"	d
UHCI_PTR_TERM	arch/sparc/cpu/leon3/usb_uhci.h	/^#define UHCI_PTR_TERM /;"	d
UHCI_PTR_TERM	board/mpl/common/usb_uhci.h	/^#define UHCI_PTR_TERM /;"	d
UHCLST	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCLST	/;"	d
UHCPCED	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCPCED	/;"	d
UHCPERS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCPERS	/;"	d
UHCREV	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCREV	/;"	d
UHCRHDA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCRHDA	/;"	d
UHCRHDB	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCRHDB	/;"	d
UHCRHPS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCRHPS1	/;"	d
UHCRHPS2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCRHPS2	/;"	d
UHCRHPS3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCRHPS3	/;"	d
UHCRHS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCRHS	/;"	d
UHCSTAT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UHCSTAT	/;"	d
UHItype	arch/arc/lib/libgcc2.h	/^typedef unsigned int UHItype	__attribute__ ((mode (HI)));$/;"	t	typeref:typename:unsigned int
UHWtype	arch/arc/lib/libgcc2.h	/^#define UHWtype	/;"	d
UHWtype	arch/nios2/lib/libgcc.c	/^typedef unsigned int UHWtype;$/;"	t	typeref:typename:unsigned int	file:
UHWtype	arch/nios2/lib/longlong.h	/^#define UHWtype	/;"	d
UIC0	arch/powerpc/dts/arches.dts	/^	UIC0: interrupt-controller0 {$/;"	l
UIC0	arch/powerpc/dts/canyonlands.dts	/^	UIC0: interrupt-controller0 {$/;"	l
UIC0	arch/powerpc/dts/glacier.dts	/^	UIC0: interrupt-controller0 {$/;"	l
UIC0CR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0CR	/;"	d
UIC0ER	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0ER	/;"	d
UIC0MSR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0MSR /;"	d
UIC0PR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0PR	/;"	d
UIC0SR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0SR	/;"	d
UIC0TR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0TR	/;"	d
UIC0VCR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0VCR /;"	d
UIC0VR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0VR	/;"	d
UIC0_DCR_BASE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC0_DCR_BASE /;"	d
UIC1	arch/powerpc/dts/arches.dts	/^	UIC1: interrupt-controller1 {$/;"	l
UIC1	arch/powerpc/dts/canyonlands.dts	/^	UIC1: interrupt-controller1 {$/;"	l
UIC1	arch/powerpc/dts/glacier.dts	/^	UIC1: interrupt-controller1 {$/;"	l
UIC1CR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1CR	/;"	d
UIC1ER	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1ER	/;"	d
UIC1MSR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1MSR /;"	d
UIC1PR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1PR	/;"	d
UIC1SR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1SR	/;"	d
UIC1TR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1TR	/;"	d
UIC1VCR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1VCR /;"	d
UIC1VR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1VR	/;"	d
UIC1_DCR_BASE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC1_DCR_BASE /;"	d
UIC2	arch/powerpc/dts/arches.dts	/^	UIC2: interrupt-controller2 {$/;"	l
UIC2	arch/powerpc/dts/canyonlands.dts	/^	UIC2: interrupt-controller2 {$/;"	l
UIC2	arch/powerpc/dts/glacier.dts	/^	UIC2: interrupt-controller2 {$/;"	l
UIC2CR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2CR	/;"	d
UIC2ER	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2ER	/;"	d
UIC2MSR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2MSR /;"	d
UIC2PR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2PR	/;"	d
UIC2SR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2SR	/;"	d
UIC2TR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2TR	/;"	d
UIC2VCR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2VCR /;"	d
UIC2VR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2VR	/;"	d
UIC2_DCR_BASE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC2_DCR_BASE /;"	d
UIC3	arch/powerpc/dts/arches.dts	/^	UIC3: interrupt-controller3 {$/;"	l
UIC3	arch/powerpc/dts/canyonlands.dts	/^	UIC3: interrupt-controller3 {$/;"	l
UIC3	arch/powerpc/dts/glacier.dts	/^	UIC3: interrupt-controller3 {$/;"	l
UIC3CR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3CR	/;"	d
UIC3ER	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3ER	/;"	d
UIC3MSR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3MSR /;"	d
UIC3PR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3PR	/;"	d
UIC3SR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3SR	/;"	d
UIC3TR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3TR	/;"	d
UIC3VCR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3VCR /;"	d
UIC3VR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3VR	/;"	d
UIC3_DCR_BASE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC3_DCR_BASE /;"	d
UICB0_ALL	arch/powerpc/cpu/ppc4xx/uic.c	/^#define UICB0_ALL	/;"	d	file:
UICR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0	/;"	d
UICR0_IM0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM0	/;"	d
UICR0_IM0	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define UICR0_IM0	/;"	d
UICR0_IM1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM1	/;"	d
UICR0_IM2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM2	/;"	d
UICR0_IM3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM3	/;"	d
UICR0_IM4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM4	/;"	d
UICR0_IM5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM5	/;"	d
UICR0_IM6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM6	/;"	d
UICR0_IM7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR0_IM7	/;"	d
UICR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1	/;"	d
UICR1_IM10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM10	/;"	d
UICR1_IM11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM11	/;"	d
UICR1_IM12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM12	/;"	d
UICR1_IM13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM13	/;"	d
UICR1_IM14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM14	/;"	d
UICR1_IM15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM15	/;"	d
UICR1_IM8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM8	/;"	d
UICR1_IM9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UICR1_IM9	/;"	d
UIC_0_3	board/amcc/bamboo/bamboo.h	/^			    UIC_0_3,$/;"	e	enum:config_list
UIC_4_9	board/amcc/bamboo/bamboo.h	/^			    UIC_4_9,$/;"	e	enum:config_list
UIC_BASE_EMAC	drivers/net/4xx_enet.c	/^#define UIC_BASE_EMAC	/;"	d	file:
UIC_BASE_EMAC_B	drivers/net/4xx_enet.c	/^#define UIC_BASE_EMAC_B	/;"	d	file:
UIC_BASE_MAL	drivers/net/4xx_enet.c	/^#define UIC_BASE_MAL	/;"	d	file:
UIC_BASE_MAL_ERR	drivers/net/4xx_enet.c	/^#define UIC_BASE_MAL_ERR /;"	d	file:
UIC_CR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_CR	/;"	d
UIC_ER	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_ER	/;"	d
UIC_ETHx	drivers/net/4xx_enet.c	/^#define UIC_ETHx	/;"	d	file:
UIC_ETHxB	drivers/net/4xx_enet.c	/^#define UIC_ETHxB	/;"	d	file:
UIC_MAL_RXDE	drivers/net/4xx_enet.c	/^#define UIC_MAL_RXDE	/;"	d	file:
UIC_MAL_RXEOB	drivers/net/4xx_enet.c	/^#define UIC_MAL_RXEOB	/;"	d	file:
UIC_MAL_SERR	drivers/net/4xx_enet.c	/^#define UIC_MAL_SERR	/;"	d	file:
UIC_MAL_TXDE	drivers/net/4xx_enet.c	/^#define UIC_MAL_TXDE	/;"	d	file:
UIC_MAL_TXEOB	drivers/net/4xx_enet.c	/^#define UIC_MAL_TXEOB	/;"	d	file:
UIC_MASK	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_MASK(/;"	d
UIC_MAX	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_MAX	/;"	d
UIC_MSR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_MSR /;"	d
UIC_NR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_NR(/;"	d
UIC_PR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_PR	/;"	d
UIC_SR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_SR	/;"	d
UIC_TR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_TR	/;"	d
UIC_VCR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_VCR /;"	d
UIC_VR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define UIC_VR	/;"	d
UINT16_MAX	scripts/kconfig/zconf.lex.c	/^#define UINT16_MAX /;"	d	file:
UINT32_MAX	scripts/kconfig/zconf.lex.c	/^#define UINT32_MAX /;"	d	file:
UINT64_CONST	lib/lzma/Types.h	/^#define UINT64_CONST(/;"	d
UINT64_MULT32	lib/rsa/rsa-mod-exp.c	/^#define UINT64_MULT32(/;"	d	file:
UINT8_MAX	scripts/kconfig/zconf.lex.c	/^#define UINT8_MAX /;"	d	file:
UINT_MAX	include/linux/kernel.h	/^#define UINT_MAX	/;"	d
UI_CFG_ATTR_alpha_MASK	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_alpha_MASK /;"	d
UI_CFG_ATTR_alpha_MASK	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_alpha_MASK /;"	d
UI_CFG_ATTR_alpha_SHIFT	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_alpha_SHIFT /;"	d
UI_CFG_ATTR_alpha_SHIFT	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_alpha_SHIFT /;"	d
UI_CFG_ATTR_alpmod_MASK	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_alpmod_MASK /;"	d
UI_CFG_ATTR_alpmod_MASK	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_alpmod_MASK /;"	d
UI_CFG_ATTR_alpmod_SHIFT	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_alpmod_SHIFT /;"	d
UI_CFG_ATTR_alpmod_SHIFT	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_alpmod_SHIFT /;"	d
UI_CFG_ATTR_en	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_en /;"	d
UI_CFG_ATTR_en	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_en /;"	d
UI_CFG_ATTR_fcolor_en	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_fcolor_en /;"	d
UI_CFG_ATTR_fcolor_en	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_fcolor_en /;"	d
UI_CFG_ATTR_fmt_MASK	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_fmt_MASK /;"	d
UI_CFG_ATTR_fmt_MASK	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_fmt_MASK /;"	d
UI_CFG_ATTR_fmt_SHIFT	arch/arm/include/asm/arch-sunxi/display2.h	/^#define			UI_CFG_ATTR_fmt_SHIFT /;"	d
UI_CFG_ATTR_fmt_SHIFT	arch/arm/include/asm/arch/display2.h	/^#define			UI_CFG_ATTR_fmt_SHIFT /;"	d
UInt16	lib/bzip2/bzlib_private.h	/^typedef unsigned short  UInt16;$/;"	t	typeref:typename:unsigned short
UInt16	lib/lzma/Types.h	/^typedef unsigned short UInt16;$/;"	t	typeref:typename:unsigned short
UInt32	lib/bzip2/bzlib_private.h	/^typedef unsigned int    UInt32;$/;"	t	typeref:typename:unsigned int
UInt32	lib/lzma/Types.h	/^typedef unsigned int UInt32;$/;"	t	typeref:typename:unsigned int
UInt32	lib/lzma/Types.h	/^typedef unsigned long UInt32;$/;"	t	typeref:typename:unsigned long
UInt64	lib/lzma/Types.h	/^typedef unsigned __int64 UInt64;$/;"	t	typeref:typename:unsigned __int64
UInt64	lib/lzma/Types.h	/^typedef unsigned long UInt64;$/;"	t	typeref:typename:unsigned long
UInt64	lib/lzma/Types.h	/^typedef unsigned long long int UInt64;$/;"	t	typeref:typename:unsigned long long int
UL	arch/arm/include/asm/armv8/mmu.h	/^#define UL(/;"	d
ULBA	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ULBA	/;"	d
ULB_CLK_SEL	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ULB_CLK_SEL	/;"	d	file:
ULB_CLK_SHIFT	arch/powerpc/cpu/mpc85xx/speed.c	/^#define ULB_CLK_SHIFT	/;"	d	file:
ULD	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define ULD	/;"	d
ULI5261_DEVICE_ID	drivers/net/uli526x.c	/^#define ULI5261_DEVICE_ID	/;"	d	file:
ULI5261_MAX_MULTICAST	drivers/net/uli526x.c	/^#define ULI5261_MAX_MULTICAST	/;"	d	file:
ULI5263_DEVICE_ID	drivers/net/uli526x.c	/^#define ULI5263_DEVICE_ID	/;"	d	file:
ULI526X_100MFD	drivers/net/uli526x.c	/^#define ULI526X_100MFD	/;"	d	file:
ULI526X_100MHF	drivers/net/uli526x.c	/^#define ULI526X_100MHF	/;"	d	file:
ULI526X_10MFD	drivers/net/uli526x.c	/^#define ULI526X_10MFD	/;"	d	file:
ULI526X_10MHF	drivers/net/uli526x.c	/^#define ULI526X_10MHF	/;"	d	file:
ULI526X_AUTO	drivers/net/uli526x.c	/^#define ULI526X_AUTO	/;"	d	file:
ULI526X_IO_SIZE	drivers/net/uli526x.c	/^#define ULI526X_IO_SIZE	/;"	d	file:
ULI526X_RESET	drivers/net/uli526x.c	/^#define ULI526X_RESET	/;"	d	file:
ULI526X_TXTH_128	drivers/net/uli526x.c	/^#define ULI526X_TXTH_128	/;"	d	file:
ULI526X_TXTH_1K	drivers/net/uli526x.c	/^#define ULI526X_TXTH_1K	/;"	d	file:
ULI526X_TXTH_256	drivers/net/uli526x.c	/^#define ULI526X_TXTH_256	/;"	d	file:
ULI526X_TXTH_512	drivers/net/uli526x.c	/^#define ULI526X_TXTH_512	/;"	d	file:
ULI526X_TXTH_72	drivers/net/uli526x.c	/^#define ULI526X_TXTH_72	/;"	d	file:
ULI526X_TXTH_96	drivers/net/uli526x.c	/^#define ULI526X_TXTH_96	/;"	d	file:
ULITE_CONTROL_RST_RX	drivers/serial/serial_xuartlite.c	/^#define ULITE_CONTROL_RST_RX	/;"	d	file:
ULITE_CONTROL_RST_TX	drivers/serial/serial_xuartlite.c	/^#define ULITE_CONTROL_RST_TX	/;"	d	file:
ULI_VENDOR_ID	drivers/net/uli526x.c	/^#define ULI_VENDOR_ID	/;"	d	file:
ULLONG_MAX	include/linux/kernel.h	/^#define ULLONG_MAX	/;"	d
ULL_2E12	drivers/ddr/fsl/util.c	/^#define ULL_2E12 /;"	d	file:
ULL_8FS	drivers/ddr/fsl/util.c	/^#define ULL_8FS /;"	d	file:
ULONGEST	tools/gdb/remote.c	/^#define ULONGEST /;"	d	file:
ULONG_MAX	include/linux/kernel.h	/^#define ULONG_MAX	/;"	d
ULPI_12PIN	drivers/usb/musb-new/omap2430.h	/^#	define	ULPI_12PIN	/;"	d
ULPI_8PIN	drivers/usb/musb-new/omap2430.h	/^#	define	ULPI_8PIN	/;"	d
ULPI_CARKIT_CTRL_CARKITPWR	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_CARKITPWR	/;"	d
ULPI_CARKIT_CTRL_IDGNDDRV	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_IDGNDDRV	/;"	d
ULPI_CARKIT_CTRL_MICEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_MICEN	/;"	d
ULPI_CARKIT_CTRL_RXDEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_RXDEN	/;"	d
ULPI_CARKIT_CTRL_SPKLEFTEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_SPKLEFTEN	/;"	d
ULPI_CARKIT_CTRL_SPKRIGHTEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_SPKRIGHTEN	/;"	d
ULPI_CARKIT_CTRL_TXDEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_CTRL_TXDEN	/;"	d
ULPI_CARKIT_INT_CARINTDET	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_CARINTDET	/;"	d
ULPI_CARKIT_INT_DP	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_DP	/;"	d
ULPI_CARKIT_INT_EN_CARINTDET	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_EN_CARINTDET	/;"	d
ULPI_CARKIT_INT_EN_DP_FALL	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_EN_DP_FALL	/;"	d
ULPI_CARKIT_INT_EN_DP_RISE	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_EN_DP_RISE	/;"	d
ULPI_CARKIT_INT_EN_IDFLOAT_FALL	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL	/;"	d
ULPI_CARKIT_INT_EN_IDFLOAT_RISE	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE	/;"	d
ULPI_CARKIT_INT_IDFLOAT	include/usb/ulpi.h	/^#define ULPI_CARKIT_INT_IDFLOAT	/;"	d
ULPI_CARKIT_PLS_CTRL_RXPLSEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_PLS_CTRL_RXPLSEN	/;"	d
ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN	/;"	d
ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN	/;"	d
ULPI_CARKIT_PLS_CTRL_TXPLSEN	include/usb/ulpi.h	/^#define ULPI_CARKIT_PLS_CTRL_TXPLSEN	/;"	d
ULPI_CLKOUT_PINMUX_BYP	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_CLKOUT_PINMUX_BYP	/;"	d
ULPI_DATA_TRIMMER_LOAD	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_DATA_TRIMMER_LOAD	/;"	d
ULPI_DATA_TRIMMER_SEL	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_DATA_TRIMMER_SEL(/;"	d
ULPI_DEBUG_LINESTATE0	include/usb/ulpi.h	/^#define ULPI_DEBUG_LINESTATE0	/;"	d
ULPI_DEBUG_LINESTATE1	include/usb/ulpi.h	/^#define ULPI_DEBUG_LINESTATE1	/;"	d
ULPI_DIR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	ULPI_DIR	/;"	d
ULPI_DIR_TRIMMER_LOAD	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_DIR_TRIMMER_LOAD	/;"	d
ULPI_DIR_TRIMMER_SEL	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_DIR_TRIMMER_SEL(/;"	d
ULPI_ERROR	include/usb/ulpi.h	/^#define ULPI_ERROR	/;"	d
ULPI_FC_FS4LS	include/usb/ulpi.h	/^#define ULPI_FC_FS4LS	/;"	d
ULPI_FC_FULL_SPEED	include/usb/ulpi.h	/^#define ULPI_FC_FULL_SPEED	/;"	d
ULPI_FC_HIGH_SPEED	include/usb/ulpi.h	/^#define ULPI_FC_HIGH_SPEED	/;"	d
ULPI_FC_LOW_SPEED	include/usb/ulpi.h	/^#define ULPI_FC_LOW_SPEED	/;"	d
ULPI_FC_OPMODE_DISABLE_NRZI	include/usb/ulpi.h	/^#define ULPI_FC_OPMODE_DISABLE_NRZI	/;"	d
ULPI_FC_OPMODE_MASK	include/usb/ulpi.h	/^#define ULPI_FC_OPMODE_MASK	/;"	d
ULPI_FC_OPMODE_NONDRIVING	include/usb/ulpi.h	/^#define ULPI_FC_OPMODE_NONDRIVING	/;"	d
ULPI_FC_OPMODE_NORMAL	include/usb/ulpi.h	/^#define ULPI_FC_OPMODE_NORMAL	/;"	d
ULPI_FC_OPMODE_NOSYNC_NOEOP	include/usb/ulpi.h	/^#define ULPI_FC_OPMODE_NOSYNC_NOEOP	/;"	d
ULPI_FC_RESET	include/usb/ulpi.h	/^#define ULPI_FC_RESET	/;"	d
ULPI_FC_SUSPENDM	include/usb/ulpi.h	/^#define ULPI_FC_SUSPENDM	/;"	d
ULPI_FC_TERMSELECT	include/usb/ulpi.h	/^#define ULPI_FC_TERMSELECT	/;"	d
ULPI_FC_XCVRSEL_MASK	include/usb/ulpi.h	/^#define ULPI_FC_XCVRSEL_MASK	/;"	d
ULPI_ID_REGS_COUNT	drivers/usb/ulpi/ulpi.c	/^#define ULPI_ID_REGS_COUNT	/;"	d	file:
ULPI_IFACE_3_PIN_SERIAL_MODE	include/usb/ulpi.h	/^#define ULPI_IFACE_3_PIN_SERIAL_MODE	/;"	d
ULPI_IFACE_6_PIN_SERIAL_MODE	include/usb/ulpi.h	/^#define ULPI_IFACE_6_PIN_SERIAL_MODE	/;"	d
ULPI_IFACE_AUTORESUME	include/usb/ulpi.h	/^#define ULPI_IFACE_AUTORESUME	/;"	d
ULPI_IFACE_CARKITMODE	include/usb/ulpi.h	/^#define ULPI_IFACE_CARKITMODE	/;"	d
ULPI_IFACE_CLOCKSUSPENDM	include/usb/ulpi.h	/^#define ULPI_IFACE_CLOCKSUSPENDM	/;"	d
ULPI_IFACE_EXTVBUS_COMPLEMENT	include/usb/ulpi.h	/^#define ULPI_IFACE_EXTVBUS_COMPLEMENT	/;"	d
ULPI_IFACE_PASSTHRU	include/usb/ulpi.h	/^#define ULPI_IFACE_PASSTHRU	/;"	d
ULPI_IFACE_PROTECT_IFC_DISABLE	include/usb/ulpi.h	/^#define ULPI_IFACE_PROTECT_IFC_DISABLE	/;"	d
ULPI_INT_EN	include/usb/ehci-ci.h	/^#define ULPI_INT_EN	/;"	d
ULPI_INT_HOST_DISCONNECT	include/usb/ulpi.h	/^#define ULPI_INT_HOST_DISCONNECT	/;"	d
ULPI_INT_IDGRD	include/usb/ulpi.h	/^#define ULPI_INT_IDGRD	/;"	d
ULPI_INT_SESS_END	include/usb/ulpi.h	/^#define ULPI_INT_SESS_END	/;"	d
ULPI_INT_SESS_VALID	include/usb/ulpi.h	/^#define ULPI_INT_SESS_VALID	/;"	d
ULPI_INT_VBUS_VALID	include/usb/ulpi.h	/^#define ULPI_INT_VBUS_VALID	/;"	d
ULPI_MISC_A_CLEAR	drivers/usb/host/ehci-msm.c	/^#define ULPI_MISC_A_CLEAR /;"	d	file:
ULPI_MISC_A_READ	drivers/usb/host/ehci-msm.c	/^#define ULPI_MISC_A_READ /;"	d	file:
ULPI_MISC_A_SET	drivers/usb/host/ehci-msm.c	/^#define ULPI_MISC_A_SET /;"	d	file:
ULPI_MISC_A_VBUSVLDEXT	drivers/usb/host/ehci-msm.c	/^#define ULPI_MISC_A_VBUSVLDEXT /;"	d	file:
ULPI_MISC_A_VBUSVLDEXTSEL	drivers/usb/host/ehci-msm.c	/^#define ULPI_MISC_A_VBUSVLDEXTSEL /;"	d	file:
ULPI_NXT	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	ULPI_NXT	/;"	d
ULPI_OTG_CHRGVBUS	include/usb/ulpi.h	/^#define ULPI_OTG_CHRGVBUS	/;"	d
ULPI_OTG_DISCHRGVBUS	include/usb/ulpi.h	/^#define ULPI_OTG_DISCHRGVBUS	/;"	d
ULPI_OTG_DM_PULLDOWN	include/usb/ulpi.h	/^#define ULPI_OTG_DM_PULLDOWN	/;"	d
ULPI_OTG_DP_PULLDOWN	include/usb/ulpi.h	/^#define ULPI_OTG_DP_PULLDOWN	/;"	d
ULPI_OTG_DRVVBUS	include/usb/ulpi.h	/^#define ULPI_OTG_DRVVBUS	/;"	d
ULPI_OTG_DRVVBUS_EXT	include/usb/ulpi.h	/^#define ULPI_OTG_DRVVBUS_EXT	/;"	d
ULPI_OTG_EXTVBUSIND	include/usb/ulpi.h	/^#define ULPI_OTG_EXTVBUSIND	/;"	d
ULPI_OTG_ID_PULLUP	include/usb/ulpi.h	/^#define ULPI_OTG_ID_PULLUP	/;"	d
ULPI_OUTPUT_PINMUX_BYP	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_OUTPUT_PINMUX_BYP	/;"	d
ULPI_PHY_ENB	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_PHY_ENB	/;"	d
ULPI_RWCTRL	drivers/usb/ulpi/ulpi-viewport.c	/^#define ULPI_RWCTRL	/;"	d	file:
ULPI_RWRUN	drivers/usb/ulpi/ulpi-viewport.c	/^#define ULPI_RWRUN	/;"	d	file:
ULPI_SS	drivers/usb/ulpi/ulpi-viewport.c	/^#define ULPI_SS	/;"	d	file:
ULPI_STP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	ULPI_STP	/;"	d
ULPI_STPDIRNXT_TRIMMER_LOAD	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_STPDIRNXT_TRIMMER_LOAD	/;"	d
ULPI_STPDIRNXT_TRIMMER_SEL	arch/arm/include/asm/arch-tegra/usb.h	/^#define ULPI_STPDIRNXT_TRIMMER_SEL(/;"	d
ULPI_TEST_VALUE	drivers/usb/ulpi/ulpi.c	/^#define ULPI_TEST_VALUE	/;"	d	file:
ULPI_USE_EXTVBUS	drivers/usb/musb/musb_core.h	/^#define ULPI_USE_EXTVBUS	/;"	d
ULPI_USE_EXTVBUSIND	drivers/usb/musb/musb_core.h	/^#define ULPI_USE_EXTVBUSIND	/;"	d
ULPI_WU	drivers/usb/ulpi/ulpi-viewport.c	/^#define ULPI_WU	/;"	d	file:
ULTRA	include/sym53c8xx.h	/^	#define   ULTRA /;"	d
ULTRA_IN_FL	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               ULTRA_IN_FL /;"	d
ULTRA_START	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define               ULTRA_START /;"	d
ULTRA_XFER_ON	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define             ULTRA_XFER_ON /;"	d
UL_2POW13	drivers/ddr/fsl/util.c	/^#define UL_2POW13 /;"	d	file:
UL_5POW12	drivers/ddr/fsl/util.c	/^#define UL_5POW12 /;"	d	file:
UMASS_BBB_CBW_SIZE	include/usb_defs.h	/^#define UMASS_BBB_CBW_SIZE	/;"	d
UMASS_BBB_CSW_SIZE	include/usb_defs.h	/^#define UMASS_BBB_CSW_SIZE	/;"	d
UMCR_FSPEED	include/mpc5xx.h	/^#define UMCR_FSPEED	/;"	d
UMCR_HSPEED	include/mpc5xx.h	/^#define UMCR_HSPEED	/;"	d
UMC_A2DRST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_A2DRST	/;"	d
UMC_ACFETCHCTRL	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ACFETCHCTRL	/;"	d
UMC_ACSSETA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_ACSSETA	/;"	d
UMC_ACSSETA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ACSSETA	/;"	d
UMC_ACSSETB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ACSSETB	/;"	d
UMC_AIORST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_AIORST	/;"	d
UMC_BITPERPIXELMODE_D0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_BITPERPIXELMODE_D0	/;"	d
UMC_BSICMAPSET	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_BSICMAPSET	/;"	d
UMC_BSICMAPSET	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_BSICMAPSET	/;"	d
UMC_CLKEN_SSIF_COMQUE0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_COMQUE0	/;"	d
UMC_CLKEN_SSIF_COMQUE1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_COMQUE1	/;"	d
UMC_CLKEN_SSIF_COMRC0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_COMRC0	/;"	d
UMC_CLKEN_SSIF_COMRC1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_COMRC1	/;"	d
UMC_CLKEN_SSIF_COMWC0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_COMWC0	/;"	d
UMC_CLKEN_SSIF_COMWC1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_COMWC1	/;"	d
UMC_CLKEN_SSIF_DST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_DST	/;"	d
UMC_CLKEN_SSIF_FETCH	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_FETCH	/;"	d
UMC_CLKEN_SSIF_RC	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_RC	/;"	d
UMC_CLKEN_SSIF_WC	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CLKEN_SSIF_WC	/;"	d
UMC_CMDCTLA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CMDCTLA	/;"	d
UMC_CMDCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_CMDCTLA	/;"	d
UMC_CMDCTLB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CMDCTLB	/;"	d
UMC_CMDCTLB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_CMDCTLB	/;"	d
UMC_CMDCTLC	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_CMDCTLC	/;"	d
UMC_CMDCTLE	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_CMDCTLE	/;"	d
UMC_CMDCTLF	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_CMDCTLF	/;"	d
UMC_CMDCTLG	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_CMDCTLG	/;"	d
UMC_CPURST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_CPURST	/;"	d
UMC_DATASET	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DATASET	/;"	d
UMC_DATASET	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DATASET	/;"	d
UMC_DCCGCTL	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DCCGCTL	/;"	d
UMC_DCCGCTL	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DCCGCTL	/;"	d
UMC_DEBUGC	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DEBUGC	/;"	d
UMC_DFICSOVRRD	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DFICSOVRRD	/;"	d
UMC_DFICUPDCTLA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DFICUPDCTLA	/;"	d
UMC_DFICUPDCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DFICUPDCTLA	/;"	d
UMC_DFIPUPDCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DFIPUPDCTLA	/;"	d
UMC_DFISTCTLC	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DFISTCTLC	/;"	d
UMC_DFITURNOFF	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DFITURNOFF /;"	d
UMC_DICGCTLA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DICGCTLA	/;"	d
UMC_DICGCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DICGCTLA	/;"	d
UMC_DICGCTLB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DICGCTLB	/;"	d
UMC_DICGCTLB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DICGCTLB	/;"	d
UMC_DIOCTLA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DIOCTLA	/;"	d
UMC_DIOCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DIOCTLA	/;"	d
UMC_DIOCTLA_CFG_NRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_DIOCTLA_CFG_NRST	/;"	d
UMC_DIOCTLA_CFG_NRST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define   UMC_DIOCTLA_CFG_NRST	/;"	d
UMC_DIOCTLA_CTL_NRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_DIOCTLA_CTL_NRST	/;"	d
UMC_DIOCTLA_CTL_NRST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define   UMC_DIOCTLA_CTL_NRST	/;"	d
UMC_DIRECTBUSCTRLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DIRECTBUSCTRLA	/;"	d
UMC_DMDCHSEL	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DMDCHSEL	/;"	d
UMC_DMDRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DMDRST	/;"	d
UMC_DMDRST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DMDRST	/;"	d
UMC_DRMMR0	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DRMMR0	/;"	d
UMC_DRMMR1	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DRMMR1	/;"	d
UMC_DRMMR2	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DRMMR2	/;"	d
UMC_DRMMR3	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_DRMMR3	/;"	d
UMC_DVCCHSEL	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DVCCHSEL	/;"	d
UMC_DVCRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_DVCRST	/;"	d
UMC_ERRMASKA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_ERRMASKA	/;"	d
UMC_ERRMASKA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ERRMASKA	/;"	d
UMC_ERRMASKB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_ERRMASKB	/;"	d
UMC_ERRMASKB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ERRMASKB	/;"	d
UMC_FLOWCTLA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FLOWCTLA	/;"	d
UMC_FLOWCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_FLOWCTLA	/;"	d
UMC_FLOWCTLB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FLOWCTLB	/;"	d
UMC_FLOWCTLB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_FLOWCTLB	/;"	d
UMC_FLOWCTLC	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FLOWCTLC	/;"	d
UMC_FLOWCTLC	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_FLOWCTLC	/;"	d
UMC_FLOWCTLG	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FLOWCTLG	/;"	d
UMC_FLOWCTLG	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_FLOWCTLG	/;"	d
UMC_FLOWCTLOB0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FLOWCTLOB0	/;"	d
UMC_FLOWCTLOB1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FLOWCTLOB1	/;"	d
UMC_FRCRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_FRCRST	/;"	d
UMC_GIORST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_GIORST	/;"	d
UMC_HD2RST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_HD2RST	/;"	d
UMC_HDDRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_HDDRST	/;"	d
UMC_HDMCHSEL	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_HDMCHSEL	/;"	d
UMC_HDMRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_HDMRST	/;"	d
UMC_IDSRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_IDSRST	/;"	d
UMC_INITCTLA	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_INITCTLA	/;"	d
UMC_INITCTLB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_INITCTLB	/;"	d
UMC_INITCTLC	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_INITCTLC	/;"	d
UMC_INITSET	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_INITSET	/;"	d
UMC_INITSET	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_INITSET	/;"	d
UMC_INITSET_INIT0EN	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_INITSET_INIT0EN	/;"	d
UMC_INITSET_INIT1EN	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_INITSET_INIT1EN	/;"	d
UMC_INITSTAT	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_INITSTAT	/;"	d
UMC_INITSTAT	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_INITSTAT	/;"	d
UMC_INITSTAT_INIT0ST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_INITSTAT_INIT0ST	/;"	d
UMC_INITSTAT_INIT1ST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_INITSTAT_INIT1ST	/;"	d
UMC_IXMRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_IXMRST	/;"	d
UMC_LD20_REGS_H	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_LD20_REGS_H$/;"	d
UMC_MBUS0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MBUS0	/;"	d
UMC_MBUS0	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS0	/;"	d
UMC_MBUS1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MBUS1	/;"	d
UMC_MBUS1	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS1	/;"	d
UMC_MBUS10	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS10	/;"	d
UMC_MBUS2	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MBUS2	/;"	d
UMC_MBUS2	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS2	/;"	d
UMC_MBUS3	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MBUS3	/;"	d
UMC_MBUS3	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS3	/;"	d
UMC_MBUS4	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS4	/;"	d
UMC_MBUS5	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS5	/;"	d
UMC_MBUS6	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS6	/;"	d
UMC_MBUS7	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS7	/;"	d
UMC_MBUS8	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS8	/;"	d
UMC_MBUS9	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MBUS9	/;"	d
UMC_MDDRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MDDRST	/;"	d
UMC_MDMCHSEL	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MDMCHSEL	/;"	d
UMC_MDMRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_MDMRST	/;"	d
UMC_MEMCONF0A	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MEMCONF0A	/;"	d
UMC_MEMCONF0B	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MEMCONF0B	/;"	d
UMC_MEMCONFCH	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MEMCONFCH	/;"	d
UMC_MEMMAPSET	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_MEMMAPSET	/;"	d
UMC_ODTCTL_D0	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ODTCTL_D0	/;"	d
UMC_ODTCTL_D1	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_ODTCTL_D1	/;"	d
UMC_PAIR1DOFF_D0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_PAIR1DOFF_D0	/;"	d
UMC_RDATACTL_D0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_RDATACTL_D0	/;"	d
UMC_RDATACTL_D0	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_RDATACTL_D0	/;"	d
UMC_RDATACTL_D1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_RDATACTL_D1	/;"	d
UMC_RDATACTL_D1	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_RDATACTL_D1	/;"	d
UMC_RDATACTL_RAD2LTY_MASK	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_RDATACTL_RAD2LTY_MASK	/;"	d
UMC_RDATACTL_RAD2LTY_SHIFT	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_RDATACTL_RAD2LTY_SHIFT	/;"	d
UMC_RDATACTL_RADLTY_MASK	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_RDATACTL_RADLTY_MASK	/;"	d
UMC_RDATACTL_RADLTY_SHIFT	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_RDATACTL_RADLTY_SHIFT	/;"	d
UMC_RESPCTL	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_RESPCTL	/;"	d
UMC_RESPCTL	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_RESPCTL	/;"	d
UMC_RGLRST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_RGLRST	/;"	d
UMC_RGLRST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_RGLRST	/;"	d
UMC_SIORST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SIORST	/;"	d
UMC_SIORST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_SIORST	/;"	d
UMC_SPCCTLA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCCTLA	/;"	d
UMC_SPCCTLB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCCTLB	/;"	d
UMC_SPCSETA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSETA	/;"	d
UMC_SPCSETB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSETB	/;"	d
UMC_SPCSETB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_SPCSETB	/;"	d
UMC_SPCSETB_AREFMD_ARB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_SPCSETB_AREFMD_ARB	/;"	d
UMC_SPCSETB_AREFMD_ARB	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define   UMC_SPCSETB_AREFMD_ARB	/;"	d
UMC_SPCSETB_AREFMD_CONT	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_SPCSETB_AREFMD_CONT	/;"	d
UMC_SPCSETB_AREFMD_CONT	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define   UMC_SPCSETB_AREFMD_CONT	/;"	d
UMC_SPCSETB_AREFMD_MASK	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_SPCSETB_AREFMD_MASK	/;"	d
UMC_SPCSETB_AREFMD_MASK	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define   UMC_SPCSETB_AREFMD_MASK	/;"	d
UMC_SPCSETB_AREFMD_REG	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define   UMC_SPCSETB_AREFMD_REG	/;"	d
UMC_SPCSETB_AREFMD_REG	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define   UMC_SPCSETB_AREFMD_REG	/;"	d
UMC_SPCSETC	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSETC	/;"	d
UMC_SPCSETD	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSETD	/;"	d
UMC_SPCSTATA	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSTATA	/;"	d
UMC_SPCSTATB	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSTATB	/;"	d
UMC_SPCSTATC	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_SPCSTATC	/;"	d
UMC_VIORST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_VIORST	/;"	d
UMC_VO0RST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_VO0RST	/;"	d
UMC_VPERST	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_VPERST	/;"	d
UMC_VPERST	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_VPERST	/;"	d
UMC_WDATACTL_D0	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_WDATACTL_D0	/;"	d
UMC_WDATACTL_D0	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_WDATACTL_D0	/;"	d
UMC_WDATACTL_D1	arch/arm/mach-uniphier/dram/umc-regs.h	/^#define UMC_WDATACTL_D1	/;"	d
UMC_WDATACTL_D1	arch/arm/mach-uniphier/dram/umc64-regs.h	/^#define UMC_WDATACTL_D1	/;"	d
UMOD	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define UMOD	/;"	d
UMOD_IRDA	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define UMOD_IRDA	/;"	d
UMOD_MDB	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define UMOD_MDB	/;"	d
UMOD_UART	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define UMOD_UART	/;"	d
UMS_CABLE_READY_TIMEOUT	include/usb_mass_storage.h	/^#define UMS_CABLE_READY_TIMEOUT	/;"	d
UMS_NAME_LEN	cmd/usb_mass_storage.c	/^#define UMS_NAME_LEN /;"	d	file:
UNALIGNED_BH	lib/bzip2/bzlib_blocksort.c	/^#define UNALIGNED_BH(/;"	d	file:
UNALIGNED_OK	include/u-boot/zlib.h	/^#  define UNALIGNED_OK$/;"	d
UNCACHEABLE	arch/mips/include/asm/cachectl.h	/^#define UNCACHEABLE	/;"	d
UNCACHED_ADDR	arch/arm/include/asm/arch-pxa/hardware.h	/^#define UNCACHED_ADDR	/;"	d
UNCACHED_PHYS_0	arch/arm/include/asm/arch-pxa/hardware.h	/^#define UNCACHED_PHYS_0	/;"	d
UNCACHED_SDRAM	arch/mips/include/asm/addrspace.h	/^#define UNCACHED_SDRAM(/;"	d
UNCAC_BASE	arch/mips/include/asm/mach-generic/spaces.h	/^#define UNCAC_BASE	/;"	d
UNDECID	drivers/usb/host/r8a66597.h	/^#define	  UNDECID	/;"	d
UNDEFINED	tools/imximage.c	/^#define UNDEFINED /;"	d	file:
UNDERRUN_T	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define UNDERRUN_T	/;"	d
UNDR	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define UNDR	/;"	d
UND_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define UND_MODE	/;"	d
UNEQ	post/lib_powerpc/fpu/compare-fp-1.c	/^#define UNEQ(/;"	d	file:
UNEQUAL	tools/buildman/kconfiglib.py	/^AND, OR, NOT, EQUAL, UNEQUAL = range(5)$/;"	v
UNGE	post/lib_powerpc/fpu/compare-fp-1.c	/^#define UNGE(/;"	d	file:
UNGT	post/lib_powerpc/fpu/compare-fp-1.c	/^#define UNGT(/;"	d	file:
UNIMAC0_CMD_CFG_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define UNIMAC0_CMD_CFG_ADDR	/;"	d
UNIMAC0_FRM_LENGTH_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define UNIMAC0_FRM_LENGTH_ADDR	/;"	d
UNIMAC0_MAC_LSB_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define UNIMAC0_MAC_LSB_ADDR	/;"	d
UNIMAC0_MAC_MSB_ADDR	drivers/net/bcm-sf2-eth-gmac.h	/^#define UNIMAC0_MAC_MSB_ADDR	/;"	d
UNIPHIER_BD_BOARD_GET_TYPE	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_BOARD_GET_TYPE(/;"	d
UNIPHIER_BD_BOARD_LD20_C1	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_BOARD_LD20_C1	/;"	d
UNIPHIER_BD_BOARD_LD20_GLOBAL	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_BOARD_LD20_GLOBAL	/;"	d
UNIPHIER_BD_BOARD_LD20_REF	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_BOARD_LD20_REF	/;"	d
UNIPHIER_BD_BOARD_LD21_GLOBAL	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_BOARD_LD21_GLOBAL	/;"	d
UNIPHIER_BD_BOARD_LD21_REF	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_BOARD_LD21_REF	/;"	d
UNIPHIER_BD_DDR3PLUS	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_BD_DDR3PLUS	/;"	d
UNIPHIER_CLK_END	drivers/clk/uniphier/clk-uniphier.h	/^#define UNIPHIER_CLK_END	/;"	d
UNIPHIER_CLK_FIXED_RATE	drivers/clk/uniphier/clk-uniphier.h	/^#define UNIPHIER_CLK_FIXED_RATE(/;"	d
UNIPHIER_CLK_GATE	drivers/clk/uniphier/clk-uniphier.h	/^#define UNIPHIER_CLK_GATE(/;"	d
UNIPHIER_CLK_ID_END	drivers/clk/uniphier/clk-uniphier.h	/^#define UNIPHIER_CLK_ID_END	/;"	d
UNIPHIER_CLK_MAX_NR_MUXS	drivers/clk/uniphier/clk-uniphier.h	/^#define UNIPHIER_CLK_MAX_NR_MUXS	/;"	d
UNIPHIER_GPIO_PORTS_PER_BANK	drivers/gpio/gpio-uniphier.c	/^#define UNIPHIER_GPIO_PORTS_PER_BANK	/;"	d	file:
UNIPHIER_GPIO_REG_DATA	drivers/gpio/gpio-uniphier.c	/^#define UNIPHIER_GPIO_REG_DATA	/;"	d	file:
UNIPHIER_GPIO_REG_DIR	drivers/gpio/gpio-uniphier.c	/^#define UNIPHIER_GPIO_REG_DIR	/;"	d	file:
UNIPHIER_LD11_SYS_RESET_STDMAC	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_LD11_SYS_RESET_STDMAC(/;"	d	file:
UNIPHIER_LD20_SYS_RESET_GIO	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_LD20_SYS_RESET_GIO(/;"	d	file:
UNIPHIER_LD20_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c	/^#define UNIPHIER_LD20_UART_CLK	/;"	d	file:
UNIPHIER_LD4_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_LD4_UART_CLK	/;"	d	file:
UNIPHIER_LD4_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c	/^#define UNIPHIER_LD4_UART_CLK	/;"	d	file:
UNIPHIER_LD6B_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_LD6B_UART_CLK	/;"	d	file:
UNIPHIER_LD6B_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c	/^#define UNIPHIER_LD6B_UART_CLK	/;"	d	file:
UNIPHIER_MAX_NR_DRAM_CH	arch/arm/mach-uniphier/init.h	/^#define UNIPHIER_MAX_NR_DRAM_CH	/;"	d
UNIPHIER_MIO_CLK_DMAC	drivers/clk/uniphier/clk-uniphier-mio.c	/^#define UNIPHIER_MIO_CLK_DMAC(/;"	d	file:
UNIPHIER_MIO_CLK_SD_GATE	drivers/clk/uniphier/clk-uniphier-mio.c	/^#define UNIPHIER_MIO_CLK_SD_GATE(/;"	d	file:
UNIPHIER_MIO_CLK_SD_MUX	drivers/clk/uniphier/clk-uniphier-mio.c	/^#define UNIPHIER_MIO_CLK_SD_MUX(/;"	d	file:
UNIPHIER_MIO_CLK_USB2	drivers/clk/uniphier/clk-uniphier-mio.c	/^#define UNIPHIER_MIO_CLK_USB2(/;"	d	file:
UNIPHIER_MIO_CLK_USB2_PHY	drivers/clk/uniphier/clk-uniphier-mio.c	/^#define UNIPHIER_MIO_CLK_USB2_PHY(/;"	d	file:
UNIPHIER_MIO_RESET_DMAC	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_MIO_RESET_DMAC(/;"	d	file:
UNIPHIER_MIO_RESET_EMMC_HW_RESET	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_MIO_RESET_EMMC_HW_RESET(/;"	d	file:
UNIPHIER_MIO_RESET_SD	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_MIO_RESET_SD(/;"	d	file:
UNIPHIER_MIO_RESET_SD_BRIDGE	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_MIO_RESET_SD_BRIDGE(/;"	d	file:
UNIPHIER_MIO_RESET_USB2	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_MIO_RESET_USB2(/;"	d	file:
UNIPHIER_MIO_RESET_USB2_BRIDGE	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_MIO_RESET_USB2_BRIDGE(/;"	d	file:
UNIPHIER_MULTI_SOC	arch/arm/mach-uniphier/soc-info.h	/^#define UNIPHIER_MULTI_SOC	/;"	d
UNIPHIER_NR_ENABLED_SOCS	arch/arm/mach-uniphier/soc-info.h	/^#define UNIPHIER_NR_ENABLED_SOCS	/;"	d
UNIPHIER_PERI_RESET_FI2C	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_PERI_RESET_FI2C(/;"	d	file:
UNIPHIER_PERI_RESET_I2C	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_PERI_RESET_I2C(/;"	d	file:
UNIPHIER_PERI_RESET_UART	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_PERI_RESET_UART(/;"	d	file:
UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE	/;"	d
UNIPHIER_PINCTRL_CAPS_MUX_4BIT	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT	/;"	d
UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL	/;"	d
UNIPHIER_PINCTRL_GROUP	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINCTRL_GROUP(/;"	d
UNIPHIER_PINCTRL_GROUP_SPL	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINCTRL_GROUP_SPL(/;"	d
UNIPHIER_PINCTRL_IECTRL	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^#define UNIPHIER_PINCTRL_IECTRL	/;"	d	file:
UNIPHIER_PINCTRL_LOAD_PINMUX	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^#define UNIPHIER_PINCTRL_LOAD_PINMUX	/;"	d	file:
UNIPHIER_PINCTRL_PIN	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINCTRL_PIN(/;"	d
UNIPHIER_PINCTRL_PINMUX_BASE	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^#define UNIPHIER_PINCTRL_PINMUX_BASE	/;"	d	file:
UNIPHIER_PINMUX_FUNCTION	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINMUX_FUNCTION(/;"	d
UNIPHIER_PINMUX_FUNCTION_SPL	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PINMUX_FUNCTION_SPL(/;"	d
UNIPHIER_PIN_ATTR_PACKED	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define UNIPHIER_PIN_ATTR_PACKED(/;"	d
UNIPHIER_PLL_FREQ_DEFAULT	arch/arm/mach-uniphier/clk/pll.h	/^#define UNIPHIER_PLL_FREQ_DEFAULT	/;"	d
UNIPHIER_PRO4_SYS_RESET_GIO	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_PRO4_SYS_RESET_GIO(/;"	d	file:
UNIPHIER_PRO4_SYS_RESET_USB3	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_PRO4_SYS_RESET_USB3(/;"	d	file:
UNIPHIER_PRO4_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_PRO4_UART_CLK	/;"	d	file:
UNIPHIER_PRO4_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c	/^#define UNIPHIER_PRO4_UART_CLK	/;"	d	file:
UNIPHIER_PRO5_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_PRO5_UART_CLK	/;"	d	file:
UNIPHIER_PRO5_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c	/^#define UNIPHIER_PRO5_UART_CLK	/;"	d	file:
UNIPHIER_PXS2_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_PXS2_UART_CLK	/;"	d	file:
UNIPHIER_PXS2_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c	/^#define UNIPHIER_PXS2_UART_CLK	/;"	d	file:
UNIPHIER_RESET	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_RESET(/;"	d	file:
UNIPHIER_RESETX	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_RESETX(/;"	d	file:
UNIPHIER_RESET_ACTIVE_LOW	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_RESET_ACTIVE_LOW	/;"	d	file:
UNIPHIER_RESET_END	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_RESET_END	/;"	d	file:
UNIPHIER_RESET_ID_END	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_RESET_ID_END	/;"	d	file:
UNIPHIER_SD_ARG	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_ARG	/;"	d	file:
UNIPHIER_SD_BUF	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_BUF	/;"	d	file:
UNIPHIER_SD_CAP_DIV1024	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_CAP_DIV1024	/;"	d	file:
UNIPHIER_SD_CAP_DMA_INTERNAL	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_CAP_DMA_INTERNAL	/;"	d	file:
UNIPHIER_SD_CAP_NONREMOVABLE	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_CAP_NONREMOVABLE	/;"	d	file:
UNIPHIER_SD_CLKCTL	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_CLKCTL	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV1	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV1	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV1024	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV1024	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV128	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV128	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV16	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV16	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV2	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV2	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV256	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV256	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV32	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV32	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV4	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV4	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV512	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV512	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV64	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV64	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV8	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV8	/;"	d	file:
UNIPHIER_SD_CLKCTL_DIV_MASK	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_DIV_MASK	/;"	d	file:
UNIPHIER_SD_CLKCTL_OFFEN	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_OFFEN	/;"	d	file:
UNIPHIER_SD_CLKCTL_SCLKEN	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CLKCTL_SCLKEN	/;"	d	file:
UNIPHIER_SD_CMD	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_CMD	/;"	d	file:
UNIPHIER_SD_CMD_APP	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_APP	/;"	d	file:
UNIPHIER_SD_CMD_DATA	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_DATA	/;"	d	file:
UNIPHIER_SD_CMD_MULTI	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_MULTI	/;"	d	file:
UNIPHIER_SD_CMD_NORMAL	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_NORMAL	/;"	d	file:
UNIPHIER_SD_CMD_NOSTOP	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_NOSTOP	/;"	d	file:
UNIPHIER_SD_CMD_RD	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_RD	/;"	d	file:
UNIPHIER_SD_CMD_RSP_NONE	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_RSP_NONE	/;"	d	file:
UNIPHIER_SD_CMD_RSP_R1	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_RSP_R1	/;"	d	file:
UNIPHIER_SD_CMD_RSP_R1B	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_RSP_R1B	/;"	d	file:
UNIPHIER_SD_CMD_RSP_R2	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_RSP_R2	/;"	d	file:
UNIPHIER_SD_CMD_RSP_R3	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_CMD_RSP_R3	/;"	d	file:
UNIPHIER_SD_DMA_ADDR_H	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_ADDR_H	/;"	d	file:
UNIPHIER_SD_DMA_ADDR_L	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_ADDR_L	/;"	d	file:
UNIPHIER_SD_DMA_CTL	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_CTL	/;"	d	file:
UNIPHIER_SD_DMA_CTL_START	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_CTL_START	/;"	d	file:
UNIPHIER_SD_DMA_INFO1	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_INFO1	/;"	d	file:
UNIPHIER_SD_DMA_INFO1_END_RD	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_INFO1_END_RD	/;"	d	file:
UNIPHIER_SD_DMA_INFO1_END_RD2	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_INFO1_END_RD2	/;"	d	file:
UNIPHIER_SD_DMA_INFO1_END_WR	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_INFO1_END_WR	/;"	d	file:
UNIPHIER_SD_DMA_INFO1_MASK	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_INFO1_MASK	/;"	d	file:
UNIPHIER_SD_DMA_INFO2	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_INFO2	/;"	d	file:
UNIPHIER_SD_DMA_INFO2_ERR_RD	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_INFO2_ERR_RD	/;"	d	file:
UNIPHIER_SD_DMA_INFO2_ERR_WR	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_INFO2_ERR_WR	/;"	d	file:
UNIPHIER_SD_DMA_INFO2_MASK	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_INFO2_MASK	/;"	d	file:
UNIPHIER_SD_DMA_MINALIGN	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_MINALIGN	/;"	d	file:
UNIPHIER_SD_DMA_MODE	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_MODE	/;"	d	file:
UNIPHIER_SD_DMA_MODE_ADDR_INC	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_MODE_ADDR_INC	/;"	d	file:
UNIPHIER_SD_DMA_MODE_DIR_RD	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_MODE_DIR_RD	/;"	d	file:
UNIPHIER_SD_DMA_RST	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_DMA_RST	/;"	d	file:
UNIPHIER_SD_DMA_RST_RD	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_RST_RD	/;"	d	file:
UNIPHIER_SD_DMA_RST_WR	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_DMA_RST_WR	/;"	d	file:
UNIPHIER_SD_EXTMODE	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_EXTMODE	/;"	d	file:
UNIPHIER_SD_EXTMODE_DMA_EN	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_EXTMODE_DMA_EN	/;"	d	file:
UNIPHIER_SD_HOST_MODE	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_HOST_MODE	/;"	d	file:
UNIPHIER_SD_IF_MODE	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_IF_MODE	/;"	d	file:
UNIPHIER_SD_IF_MODE_DDR	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_IF_MODE_DDR	/;"	d	file:
UNIPHIER_SD_INFO1	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_INFO1	/;"	d	file:
UNIPHIER_SD_INFO1_CD	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO1_CD	/;"	d	file:
UNIPHIER_SD_INFO1_CMP	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO1_CMP	/;"	d	file:
UNIPHIER_SD_INFO1_INSERT	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO1_INSERT	/;"	d	file:
UNIPHIER_SD_INFO1_MASK	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_INFO1_MASK	/;"	d	file:
UNIPHIER_SD_INFO1_REMOVE	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO1_REMOVE	/;"	d	file:
UNIPHIER_SD_INFO1_RSP	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO1_RSP	/;"	d	file:
UNIPHIER_SD_INFO2	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_INFO2	/;"	d	file:
UNIPHIER_SD_INFO2_BRE	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_BRE	/;"	d	file:
UNIPHIER_SD_INFO2_BWE	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_BWE	/;"	d	file:
UNIPHIER_SD_INFO2_CBSY	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_CBSY	/;"	d	file:
UNIPHIER_SD_INFO2_DAT0	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_DAT0	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_CRC	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_CRC	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_END	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_END	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_IDX	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_IDX	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_ILA	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_ILA	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_ILR	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_ILR	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_ILW	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_ILW	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_RTO	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_RTO	/;"	d	file:
UNIPHIER_SD_INFO2_ERR_TO	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_INFO2_ERR_TO	/;"	d	file:
UNIPHIER_SD_INFO2_MASK	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_INFO2_MASK	/;"	d	file:
UNIPHIER_SD_OPTION	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_OPTION	/;"	d	file:
UNIPHIER_SD_OPTION_WIDTH_1	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_OPTION_WIDTH_1	/;"	d	file:
UNIPHIER_SD_OPTION_WIDTH_4	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_OPTION_WIDTH_4	/;"	d	file:
UNIPHIER_SD_OPTION_WIDTH_8	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_OPTION_WIDTH_8	/;"	d	file:
UNIPHIER_SD_OPTION_WIDTH_MASK	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_OPTION_WIDTH_MASK	/;"	d	file:
UNIPHIER_SD_RSP10	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_RSP10	/;"	d	file:
UNIPHIER_SD_RSP32	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_RSP32	/;"	d	file:
UNIPHIER_SD_RSP54	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_RSP54	/;"	d	file:
UNIPHIER_SD_RSP76	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_RSP76	/;"	d	file:
UNIPHIER_SD_SECCNT	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_SECCNT	/;"	d	file:
UNIPHIER_SD_SIZE	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_SIZE	/;"	d	file:
UNIPHIER_SD_SOFT_RST	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_SOFT_RST	/;"	d	file:
UNIPHIER_SD_SOFT_RST_RSTX	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_SOFT_RST_RSTX	/;"	d	file:
UNIPHIER_SD_STOP	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_STOP	/;"	d	file:
UNIPHIER_SD_STOP_SEC	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_STOP_SEC	/;"	d	file:
UNIPHIER_SD_STOP_STP	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_STOP_STP	/;"	d	file:
UNIPHIER_SD_VERSION	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_VERSION	/;"	d	file:
UNIPHIER_SD_VERSION_IP	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_VERSION_IP	/;"	d	file:
UNIPHIER_SD_VOLT	drivers/mmc/uniphier-sd.c	/^#define UNIPHIER_SD_VOLT	/;"	d	file:
UNIPHIER_SD_VOLT_180	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_VOLT_180	/;"	d	file:
UNIPHIER_SD_VOLT_330	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_VOLT_330	/;"	d	file:
UNIPHIER_SD_VOLT_MASK	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_VOLT_MASK	/;"	d	file:
UNIPHIER_SD_VOLT_OFF	drivers/mmc/uniphier-sd.c	/^#define   UNIPHIER_SD_VOLT_OFF	/;"	d	file:
UNIPHIER_SERIAL	drivers/serial/Kconfig	/^config UNIPHIER_SERIAL$/;"	c	menu:Serial drivers
UNIPHIER_SLD3_SYS_RESET_STDMAC	drivers/reset/reset-uniphier.c	/^#define UNIPHIER_SLD3_SYS_RESET_STDMAC(/;"	d	file:
UNIPHIER_SLD3_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_SLD3_UART_CLK	/;"	d	file:
UNIPHIER_SLD3_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c	/^#define UNIPHIER_SLD3_UART_CLK	/;"	d	file:
UNIPHIER_SLD8_UART_CLK	arch/arm/mach-uniphier/arm32/debug_ll.S	/^#define UNIPHIER_SLD8_UART_CLK	/;"	d	file:
UNIPHIER_SLD8_UART_CLK	arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c	/^#define UNIPHIER_SLD8_UART_CLK	/;"	d	file:
UNIPHIER_SMPCTRL_ROM_RSV0	arch/arm/mach-uniphier/arm64/smp_kick_cpus.c	/^#define UNIPHIER_SMPCTRL_ROM_RSV0	/;"	d	file:
UNIPHIER_SMPCTRL_ROM_RSV2	arch/arm/mach-uniphier/arm32/psci.c	/^#define UNIPHIER_SMPCTRL_ROM_RSV2	/;"	d	file:
UNIPHIER_SSCC	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCC	/;"	d	file:
UNIPHIER_SSCC_ACT	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCC_ACT	/;"	d	file:
UNIPHIER_SSCC_BST	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCC_BST	/;"	d	file:
UNIPHIER_SSCC_ON	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCC_ON	/;"	d	file:
UNIPHIER_SSCC_PRD	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCC_PRD	/;"	d	file:
UNIPHIER_SSCC_WTG	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCC_WTG	/;"	d	file:
UNIPHIER_SSCID	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCID	/;"	d	file:
UNIPHIER_SSCLPDAWCR	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCLPDAWCR	/;"	d	file:
UNIPHIER_SSCLPIAWCR	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCLPIAWCR	/;"	d	file:
UNIPHIER_SSCOLPQS	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOLPQS	/;"	d	file:
UNIPHIER_SSCOLPQS_EF	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOLPQS_EF	/;"	d	file:
UNIPHIER_SSCOLPQS_EST	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOLPQS_EST	/;"	d	file:
UNIPHIER_SSCOLPQS_QST	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOLPQS_QST	/;"	d	file:
UNIPHIER_SSCOPE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOPE	/;"	d	file:
UNIPHIER_SSCOPE_CM_CLEAN	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPE_CM_CLEAN	/;"	d	file:
UNIPHIER_SSCOPE_CM_FLUSH	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPE_CM_FLUSH	/;"	d	file:
UNIPHIER_SSCOPE_CM_FLUSH_PREFETCH	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPE_CM_FLUSH_PREFETCH	/;"	d	file:
UNIPHIER_SSCOPE_CM_INV	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPE_CM_INV	/;"	d	file:
UNIPHIER_SSCOPE_CM_SYNC	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPE_CM_SYNC	/;"	d	file:
UNIPHIER_SSCOPPQSEF	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOPPQSEF	/;"	d	file:
UNIPHIER_SSCOPPQSEF_FE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPPQSEF_FE	/;"	d	file:
UNIPHIER_SSCOPPQSEF_OE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOPPQSEF_OE	/;"	d	file:
UNIPHIER_SSCOQAD	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQAD	/;"	d	file:
UNIPHIER_SSCOQAD_IS_NEEDED	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQAD_IS_NEEDED(/;"	d	file:
UNIPHIER_SSCOQM	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQM	/;"	d	file:
UNIPHIER_SSCOQMASK	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQMASK	/;"	d	file:
UNIPHIER_SSCOQM_CE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CE	/;"	d	file:
UNIPHIER_SSCOQM_CM_CLEAN	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_CLEAN	/;"	d	file:
UNIPHIER_SSCOQM_CM_FLUSH	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_FLUSH	/;"	d	file:
UNIPHIER_SSCOQM_CM_INV	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_INV	/;"	d	file:
UNIPHIER_SSCOQM_CM_MASK	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_MASK	/;"	d	file:
UNIPHIER_SSCOQM_CM_PREFETCH	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_PREFETCH	/;"	d	file:
UNIPHIER_SSCOQM_CM_PREFETCH_BUF	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_PREFETCH_BUF	/;"	d	file:
UNIPHIER_SSCOQM_CM_TOUCH	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_TOUCH	/;"	d	file:
UNIPHIER_SSCOQM_CM_TOUCH_DIRTY	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_TOUCH_DIRTY	/;"	d	file:
UNIPHIER_SSCOQM_CM_TOUCH_ZERO	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CM_TOUCH_ZERO	/;"	d	file:
UNIPHIER_SSCOQM_CW	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_CW	/;"	d	file:
UNIPHIER_SSCOQM_S_ALL	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_S_ALL	/;"	d	file:
UNIPHIER_SSCOQM_S_MASK	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_S_MASK	/;"	d	file:
UNIPHIER_SSCOQM_S_RANGE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_S_RANGE	/;"	d	file:
UNIPHIER_SSCOQM_S_WAY	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_S_WAY	/;"	d	file:
UNIPHIER_SSCOQM_TID_LRU_DATA	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_TID_LRU_DATA	/;"	d	file:
UNIPHIER_SSCOQM_TID_LRU_INST	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_TID_LRU_INST	/;"	d	file:
UNIPHIER_SSCOQM_TID_MASK	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_TID_MASK	/;"	d	file:
UNIPHIER_SSCOQM_TID_WAY	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define    UNIPHIER_SSCOQM_TID_WAY	/;"	d	file:
UNIPHIER_SSCOQSZ	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQSZ	/;"	d	file:
UNIPHIER_SSCOQWM_IS_NEEDED	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQWM_IS_NEEDED(/;"	d	file:
UNIPHIER_SSCOQWN	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSCOQWN	/;"	d	file:
UNIPHIER_SSC_LINE_SIZE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSC_LINE_SIZE	/;"	d	file:
UNIPHIER_SSC_RANGE_OP_MAX_SIZE	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^#define UNIPHIER_SSC_RANGE_OP_MAX_SIZE	/;"	d	file:
UNIPHIER_UART_LCR_MCR	arch/arm/mach-uniphier/debug-uart/debug-uart.c	/^#define UNIPHIER_UART_LCR_MCR	/;"	d	file:
UNIPHIER_UART_LDR	arch/arm/mach-uniphier/debug-uart/debug-uart.c	/^#define UNIPHIER_UART_LDR	/;"	d	file:
UNIPHIER_UART_LSR	arch/arm/mach-uniphier/debug-uart/debug-uart.c	/^#define UNIPHIER_UART_LSR	/;"	d	file:
UNIPHIER_UART_LSR	arch/arm/mach-uniphier/debug.h	/^#define UNIPHIER_UART_LSR	/;"	d
UNIPHIER_UART_TX	arch/arm/mach-uniphier/debug-uart/debug-uart.c	/^#define UNIPHIER_UART_TX	/;"	d	file:
UNIPHIER_UART_TX	arch/arm/mach-uniphier/debug.h	/^#define UNIPHIER_UART_TX	/;"	d
UNIPRO_RX0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_RX0	/;"	d
UNIPRO_RX1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_RX1	/;"	d
UNIPRO_RX2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_RX2	/;"	d
UNIPRO_RY0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_RY0	/;"	d
UNIPRO_RY1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_RY1	/;"	d
UNIPRO_RY2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_RY2	/;"	d
UNIPRO_TX0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_TX0	/;"	d
UNIPRO_TX1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_TX1	/;"	d
UNIPRO_TX2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_TX2	/;"	d
UNIPRO_TY0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_TY0	/;"	d
UNIPRO_TY1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_TY1	/;"	d
UNIPRO_TY2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define UNIPRO_TY2	/;"	d
UNITS_PER_WORD	arch/arc/lib/libgcc2.h	/^#define UNITS_PER_WORD /;"	d
UNITTYPEPCB_DP_165	board/gdsys/common/ioep-fpga.c	/^	UNITTYPEPCB_DP_165 = 1,$/;"	e	enum:__anoneadcbf560203	file:
UNITTYPEPCB_DP_300	board/gdsys/common/ioep-fpga.c	/^	UNITTYPEPCB_DP_300 = 2,$/;"	e	enum:__anoneadcbf560203	file:
UNITTYPEPCB_DVI	board/gdsys/common/ioep-fpga.c	/^	UNITTYPEPCB_DVI = 0,$/;"	e	enum:__anoneadcbf560203	file:
UNITTYPEPCB_HDMI	board/gdsys/common/ioep-fpga.c	/^	UNITTYPEPCB_HDMI = 3,$/;"	e	enum:__anoneadcbf560203	file:
UNITTYPE_CCD_SWITCH	board/gdsys/405ep/io.c	/^	UNITTYPE_CCD_SWITCH = 1,$/;"	e	enum:__anonb37332db0103	file:
UNITTYPE_CCD_SWITCH	board/gdsys/405ex/io64.c	/^	UNITTYPE_CCD_SWITCH = 1,$/;"	e	enum:__anonbf1d9e0d0103	file:
UNITTYPE_CCIP216	board/gdsys/405ep/neo.c	/^	UNITTYPE_CCIP216 = 2,$/;"	e	enum:__anon222f9b050103	file:
UNITTYPE_CCX16	board/gdsys/405ep/neo.c	/^	UNITTYPE_CCX16 = 1,$/;"	e	enum:__anon222f9b050103	file:
UNITTYPE_DISPLAYPORT	board/gdsys/405ep/dlvision-10g.c	/^	UNITTYPE_DISPLAYPORT = 1<<2,$/;"	e	enum:__anon678ede200103	file:
UNITTYPE_MAIN	board/gdsys/405ep/dlvision-10g.c	/^	UNITTYPE_MAIN = 1<<0,$/;"	e	enum:__anon678ede200103	file:
UNITTYPE_MAIN_SERVER	board/gdsys/405ep/iocon.c	/^	UNITTYPE_MAIN_SERVER = 0,$/;"	e	enum:__anon023d8a7b0103	file:
UNITTYPE_MAIN_SERVER	board/gdsys/common/ioep-fpga.c	/^	UNITTYPE_MAIN_SERVER = 0,$/;"	e	enum:__anoneadcbf560103	file:
UNITTYPE_MAIN_USER	board/gdsys/405ep/iocon.c	/^	UNITTYPE_MAIN_USER = 1,$/;"	e	enum:__anon023d8a7b0103	file:
UNITTYPE_MAIN_USER	board/gdsys/common/ioep-fpga.c	/^	UNITTYPE_MAIN_USER = 1,$/;"	e	enum:__anoneadcbf560103	file:
UNITTYPE_SERVER	board/gdsys/405ep/dlvision-10g.c	/^	UNITTYPE_SERVER = 1<<1,$/;"	e	enum:__anon678ede200103	file:
UNITTYPE_VIDEO_SERVER	board/gdsys/405ep/iocon.c	/^	UNITTYPE_VIDEO_SERVER = 2,$/;"	e	enum:__anon023d8a7b0103	file:
UNITTYPE_VIDEO_SERVER	board/gdsys/common/ioep-fpga.c	/^	UNITTYPE_VIDEO_SERVER = 2,$/;"	e	enum:__anoneadcbf560103	file:
UNITTYPE_VIDEO_USER	board/gdsys/405ep/iocon.c	/^	UNITTYPE_VIDEO_USER = 3,$/;"	e	enum:__anon023d8a7b0103	file:
UNITTYPE_VIDEO_USER	board/gdsys/common/ioep-fpga.c	/^	UNITTYPE_VIDEO_USER = 3,$/;"	e	enum:__anoneadcbf560103	file:
UNIT_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define UNIT_CTRL_ADDR(/;"	d
UNIT_ERR_CNT_CONST_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define UNIT_ERR_CNT_CONST_CTRL_ADDR(/;"	d
UNIT_IFACE_REF_CLK_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define UNIT_IFACE_REF_CLK_CTRL_ADDR(/;"	d
UNIT_NUMBER_VIOLATION	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define UNIT_NUMBER_VIOLATION	/;"	d	file:
UNIT_TEST	include/test/test.h	/^#define UNIT_TEST(/;"	d
UNIT_TEST	test/Kconfig	/^menuconfig UNIT_TEST$/;"	c
UNIVERSE	include/universe.h	/^typedef struct _UNIVERSE UNIVERSE;$/;"	t	typeref:struct:_UNIVERSE
UNI_DEV	cmd/universe.c	/^typedef struct _UNI_DEV UNI_DEV;$/;"	t	typeref:struct:_UNI_DEV	file:
UNKNOWN	board/birdland/bav335x/board.h	/^enum board_type {UNKNOWN, BAV335A, BAV335B};$/;"	e	enum:board_type
UNKNOWN	board/ifm/o2dnt2/o2dnt2.c	/^	UNKNOWN		= 0xff,	\/* !< Unknow sensor *\/$/;"	e	enum:ifm_sensor_type	file:
UNKNOWN	drivers/tpm/tpm_tis_infineon.c	/^	UNKNOWN,$/;"	e	enum:i2c_chip_type	file:
UNKNOWN	examples/standalone/smc91111_eeprom.c	/^#define UNKNOWN	/;"	d	file:
UNKNOWN	include/power/power_chrg.h	/^	UNKNOWN,$/;"	e	enum:__anond3b5e45a0203
UNKNOWN	tools/buildman/kconfiglib.py	/^UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6)$/;"	v
UNKNOWN_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	UNKNOWN_BOOT,$/;"	e	enum:boot_device
UNKNOWN_ENDIAN	include/zfs_common.h	/^	UNKNOWN_ENDIAN = -2,$/;"	e	enum:zfs_endian
UNLE	post/lib_powerpc/fpu/compare-fp-1.c	/^#define UNLE(/;"	d	file:
UNLOCKDATA1	board/bf533-ezkit/flash-defines.h	/^#define UNLOCKDATA1	/;"	d
UNLOCKDATA2	board/bf533-ezkit/flash-defines.h	/^#define UNLOCKDATA2	/;"	d
UNLOCKDATA3	board/bf533-ezkit/flash-defines.h	/^#define UNLOCKDATA3	/;"	d
UNLOCK_1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define UNLOCK_1	/;"	d
UNLOCK_2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define UNLOCK_2	/;"	d
UNLOCK_3	arch/arm/include/asm/arch-omap3/cpu.h	/^#define UNLOCK_3	/;"	d
UNLOCK_KEY1	arch/mips/mach-pic32/reset.c	/^#define UNLOCK_KEY1	/;"	d	file:
UNLOCK_KEY1	drivers/mtd/pic32_flash.c	/^#define UNLOCK_KEY1	/;"	d	file:
UNLOCK_KEY2	arch/mips/mach-pic32/reset.c	/^#define UNLOCK_KEY2	/;"	d	file:
UNLOCK_KEY2	drivers/mtd/pic32_flash.c	/^#define UNLOCK_KEY2	/;"	d	file:
UNLT	post/lib_powerpc/fpu/compare-fp-1.c	/^#define UNLT(/;"	d	file:
UNORD	post/lib_powerpc/fpu/compare-fp-1.c	/^#define UNORD(/;"	d	file:
UNPACK_CB64	arch/x86/include/asm/coreboot_tables.h	/^#define UNPACK_CB64(/;"	d
UNREVOCABLE_KEY	include/fsl_validate.h	/^#define UNREVOCABLE_KEY	/;"	d
UNSUP_CMD	include/linux/mtd/samsung_onenand.h	/^#define UNSUP_CMD /;"	d
UNUSED	arch/arm/include/asm/arch-rockchip/sdram.h	/^	UNUSED = 0xFF,$/;"	e	enum:__anoncf023d3e0103
UNWIND	arch/arm/lib/div64.S	/^#define UNWIND(/;"	d	file:
UNWIND	arch/arm/lib/lib1funcs.S	/^#define UNWIND(/;"	d	file:
UN_MAPPED	drivers/usb/musb-new/musb_gadget.h	/^	UN_MAPPED = 0,$/;"	e	enum:buffer_map_state
UN_RELOC	include/configs/gr_cpci_ax2000.h	/^#define UN_RELOC(/;"	d
UN_RELOC	include/configs/gr_ep2s60.h	/^#define UN_RELOC(/;"	d
UN_RELOC	include/configs/gr_xc3s_1500.h	/^#define UN_RELOC(/;"	d
UN_RELOC	include/configs/grsim.h	/^#define UN_RELOC(/;"	d
UN_RELOC	include/configs/grsim_leon2.h	/^#define UN_RELOC(/;"	d
UP2OCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR	/;"	d
UP2OCR_CPVEN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_CPVEN	/;"	d
UP2OCR_CPVPE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_CPVPE	/;"	d
UP2OCR_DMPDE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_DMPDE	/;"	d
UP2OCR_DMSTATE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_DMSTATE	/;"	d
UP2OCR_DPPDE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_DPPDE	/;"	d
UP2OCR_DPPUE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_DPPUE	/;"	d
UP2OCR_DPSTATE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_DPSTATE	/;"	d
UP2OCR_EXSP	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_EXSP	/;"	d
UP2OCR_EXSUS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_EXSUS	/;"	d
UP2OCR_HXOE	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_HXOE	/;"	d
UP2OCR_HXS	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_HXS	/;"	d
UP2OCR_IDON	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_IDON	/;"	d
UP2OCR_VPM	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define UP2OCR_VPM	/;"	d
UPCTL0_BST_DIABLE_DISABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_BST_DIABLE_DISABLE = 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL0_BST_DIABLE_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_BST_DIABLE_MASK	= 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL0_BST_DIABLE_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_BST_DIABLE_SHIFT	= 9,$/;"	e	enum:__anonbeb2b9771303
UPCTL0_C_ACTIVE_IN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_C_ACTIVE_IN_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
UPCTL0_C_ACTIVE_IN_MAY	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_C_ACTIVE_IN_MAY	= 0,$/;"	e	enum:__anonbeb2b9771103
UPCTL0_C_ACTIVE_IN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_C_ACTIVE_IN_SHIFT = 5,$/;"	e	enum:__anonbeb2b9771103
UPCTL0_C_ACTIVE_IN_WILL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_C_ACTIVE_IN_WILL,$/;"	e	enum:__anonbeb2b9771103
UPCTL0_LPDDR3_ODT_EN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_LPDDR3_ODT_EN_MASK = 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL0_LPDDR3_ODT_EN_ODT_ENABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_LPDDR3_ODT_EN_ODT_ENABLE = 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL0_LPDDR3_ODT_EN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL0_LPDDR3_ODT_EN_SHIFT = 0xa,$/;"	e	enum:__anonbeb2b9771303
UPCTL1_BST_DIABLE_DISABLE	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_BST_DIABLE_DISABLE = 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL1_BST_DIABLE_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_BST_DIABLE_MASK	= 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL1_BST_DIABLE_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_BST_DIABLE_SHIFT	= 0xc,$/;"	e	enum:__anonbeb2b9771303
UPCTL1_C_ACTIVE_IN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_C_ACTIVE_IN_MASK	= 1,$/;"	e	enum:__anonbeb2b9771103
UPCTL1_C_ACTIVE_IN_MAY	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_C_ACTIVE_IN_MAY	= 0,$/;"	e	enum:__anonbeb2b9771103
UPCTL1_C_ACTIVE_IN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_C_ACTIVE_IN_SHIFT = 6,$/;"	e	enum:__anonbeb2b9771103
UPCTL1_C_ACTIVE_IN_WILL	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_C_ACTIVE_IN_WILL,$/;"	e	enum:__anonbeb2b9771103
UPCTL1_LPDDR3_ODT_EN_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_LPDDR3_ODT_EN_MASK = 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL1_LPDDR3_ODT_EN_ODT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_LPDDR3_ODT_EN_ODT = 1,$/;"	e	enum:__anonbeb2b9771303
UPCTL1_LPDDR3_ODT_EN_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	UPCTL1_LPDDR3_ODT_EN_SHIFT = 0xd,$/;"	e	enum:__anonbeb2b9771303
UPCTL_PARAM_240	board/freescale/mx31ads/lowlevel_init.S	/^UPCTL_PARAM_240:$/;"	l
UPCTL_PARAM_240_27	board/freescale/mx31ads/lowlevel_init.S	/^UPCTL_PARAM_240_27:$/;"	l
UPDATE	drivers/power/domain/tegra186-power-domain.c	/^#define UPDATE	/;"	d	file:
UPDATE	lib/zlib/inflate.c	/^#  define UPDATE(/;"	d	file:
UPDATE_0	lib/lzma/LzmaDec.c	/^#define UPDATE_0(/;"	d	file:
UPDATE_0_CHECK	lib/lzma/LzmaDec.c	/^#define UPDATE_0_CHECK /;"	d	file:
UPDATE_1	lib/lzma/LzmaDec.c	/^#define UPDATE_1(/;"	d	file:
UPDATE_1_CHECK	lib/lzma/LzmaDec.c	/^#define UPDATE_1_CHECK /;"	d	file:
UPDATE_FILE_ENV	common/update.c	/^#define UPDATE_FILE_ENV	/;"	d	file:
UPDATE_HASH	lib/zlib/deflate.c	/^#define UPDATE_HASH(/;"	d	file:
UPDATE_M4_ENV	include/configs/mx6sxsabresd.h	/^#define UPDATE_M4_ENV /;"	d
UPDATE_M4_ENV	include/configs/mx7dsabresd.h	/^#define UPDATE_M4_ENV /;"	d
UPDT	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define UPDT	/;"	d
UPDT_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define UPDT_P	/;"	d
UPD_TERMINATOR	arch/x86/include/asm/fsp/fsp_support.h	/^#define UPD_TERMINATOR	/;"	d
UPHEAP	lib/bzip2/bzlib_huffman.c	/^#define UPHEAP(/;"	d	file:
UPLL	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^#define UPLL /;"	d	file:
UPLLCON	board/mpl/vcma9/lowlevel_init.S	/^#define UPLLCON	/;"	d	file:
UPMA	arch/powerpc/include/asm/fsl_lbc.h	/^#define UPMA	/;"	d
UPMA	include/mpc8260.h	/^#define UPMA	/;"	d
UPMA	include/mpc8xx.h	/^#define UPMA	/;"	d
UPMB	arch/powerpc/include/asm/fsl_lbc.h	/^#define UPMB	/;"	d
UPMB	include/mpc8260.h	/^#define UPMB	/;"	d
UPMB	include/mpc8xx.h	/^#define UPMB	/;"	d
UPMC	arch/powerpc/include/asm/fsl_lbc.h	/^#define UPMC	/;"	d
UPMC	include/mpc8260.h	/^#define UPMC	/;"	d
UPMTableA	board/socrates/upm_table.h	/^static const unsigned int UPMTableA[] =$/;"	v	typeref:typename:const unsigned int[]
UPMTableB	board/socrates/upm_table.h	/^static unsigned int UPMTableB[] =$/;"	v	typeref:typename:unsigned int[]
UPONCR0	board/renesas/ecovec/ecovec.c	/^#define UPONCR0 /;"	d	file:
UPPER_BIT_RUBIN	include/jffs2/compr_rubin.h	/^#define UPPER_BIT_RUBIN /;"	d
UPPER_MARGIN	drivers/video/da8xx-fb.c	/^#define UPPER_MARGIN	/;"	d	file:
UPPHUB	drivers/usb/host/r8a66597.h	/^#define	UPPHUB	/;"	d
UPREQ_CORE_RST	board/keymile/kmp204x/kmp204x.h	/^#define UPREQ_CORE_RST	/;"	d
UPREQ_UNIT_RST	board/keymile/kmp204x/kmp204x.h	/^#define UPREQ_UNIT_RST	/;"	d
UPSMR_BRO	drivers/qe/uec.h	/^#define UPSMR_BRO	/;"	d
UPSMR_CAM	drivers/qe/uec.h	/^#define UPSMR_CAM	/;"	d
UPSMR_CAP	drivers/qe/uec.h	/^#define UPSMR_CAP	/;"	d
UPSMR_ECM	drivers/qe/uec.h	/^#define UPSMR_ECM	/;"	d
UPSMR_HSE	drivers/qe/uec.h	/^#define UPSMR_HSE	/;"	d
UPSMR_INIT_VALUE	drivers/qe/uec.h	/^#define UPSMR_INIT_VALUE	/;"	d
UPSMR_PRO	drivers/qe/uec.h	/^#define UPSMR_PRO	/;"	d
UPSMR_R10M	drivers/qe/uec.h	/^#define UPSMR_R10M	/;"	d
UPSMR_RES1	drivers/qe/uec.h	/^#define UPSMR_RES1	/;"	d
UPSMR_RLPB	drivers/qe/uec.h	/^#define UPSMR_RLPB	/;"	d
UPSMR_RMM	drivers/qe/uec.h	/^#define UPSMR_RMM	/;"	d
UPSMR_RPM	drivers/qe/uec.h	/^#define UPSMR_RPM	/;"	d
UPSMR_RSH	drivers/qe/uec.h	/^#define UPSMR_RSH	/;"	d
UPSMR_SGMM	drivers/qe/uec.h	/^#define UPSMR_SGMM	/;"	d
UPSMR_TBIM	drivers/qe/uec.h	/^#define UPSMR_TBIM	/;"	d
UPWRC	arch/x86/include/asm/arch-broadwell/pm.h	/^#define UPWRC	/;"	d
UPWRC_SMI	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  UPWRC_SMI	/;"	d
UPWRC_WE	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  UPWRC_WE	/;"	d
UPWRC_WS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  UPWRC_WS	/;"	d
UQItype	arch/arc/lib/libgcc2.h	/^typedef unsigned int UQItype	__attribute__ ((mode (QI)));$/;"	t	typeref:typename:unsigned int
UQItype	arch/nios2/lib/libgcc.c	/^typedef unsigned char UQItype;$/;"	t	typeref:typename:unsigned char	file:
URB_BUF_SIZE	include/usbdevice.h	/^#define URB_BUF_SIZE /;"	d
URB_DEL	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^#define URB_DEL /;"	d
URB_DEL	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^#define URB_DEL /;"	d
URB_DEL	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^#define URB_DEL /;"	d
URB_DEL	drivers/usb/host/isp116x.h	/^#define URB_DEL	/;"	d
URB_DEL	drivers/usb/host/ohci-s3c24xx.h	/^#define URB_DEL /;"	d
URB_DEL	drivers/usb/host/ohci.h	/^#define URB_DEL /;"	d
URB_SHORT_NOT_OK	drivers/usb/musb-new/usb-compat.h	/^#define URB_SHORT_NOT_OK	/;"	d
URB_ZERO_PACKET	drivers/usb/musb-new/usb-compat.h	/^#define URB_ZERO_PACKET	/;"	d
UREG_FADDR	arch/sparc/include/asm/ptrace.h	/^#define UREG_FADDR /;"	d
UREG_FP	arch/sparc/include/asm/ptrace.h	/^#define UREG_FP /;"	d
UREG_G0	arch/sparc/include/asm/ptrace.h	/^#define UREG_G0 /;"	d
UREG_G1	arch/sparc/include/asm/ptrace.h	/^#define UREG_G1 /;"	d
UREG_G2	arch/sparc/include/asm/ptrace.h	/^#define UREG_G2 /;"	d
UREG_G3	arch/sparc/include/asm/ptrace.h	/^#define UREG_G3 /;"	d
UREG_G4	arch/sparc/include/asm/ptrace.h	/^#define UREG_G4 /;"	d
UREG_G5	arch/sparc/include/asm/ptrace.h	/^#define UREG_G5 /;"	d
UREG_G6	arch/sparc/include/asm/ptrace.h	/^#define UREG_G6 /;"	d
UREG_G7	arch/sparc/include/asm/ptrace.h	/^#define UREG_G7 /;"	d
UREG_I0	arch/sparc/include/asm/ptrace.h	/^#define UREG_I0 /;"	d
UREG_I1	arch/sparc/include/asm/ptrace.h	/^#define UREG_I1 /;"	d
UREG_I2	arch/sparc/include/asm/ptrace.h	/^#define UREG_I2 /;"	d
UREG_I3	arch/sparc/include/asm/ptrace.h	/^#define UREG_I3 /;"	d
UREG_I4	arch/sparc/include/asm/ptrace.h	/^#define UREG_I4 /;"	d
UREG_I5	arch/sparc/include/asm/ptrace.h	/^#define UREG_I5 /;"	d
UREG_I6	arch/sparc/include/asm/ptrace.h	/^#define UREG_I6 /;"	d
UREG_I7	arch/sparc/include/asm/ptrace.h	/^#define UREG_I7 /;"	d
UREG_RETPC	arch/sparc/include/asm/ptrace.h	/^#define UREG_RETPC /;"	d
UREG_WIM	arch/sparc/include/asm/ptrace.h	/^#define UREG_WIM /;"	d
URTX0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define URTX0(/;"	d
URXD	drivers/serial/serial_mxc.c	/^#define URXD /;"	d	file:
URXD0	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define URXD0(/;"	d
URXD_BRK	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  URXD_BRK /;"	d
URXD_BRK	drivers/serial/serial_mxc.c	/^#define  URXD_BRK /;"	d	file:
URXD_CHARRDY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  URXD_CHARRDY /;"	d
URXD_CHARRDY	drivers/serial/serial_mxc.c	/^#define  URXD_CHARRDY /;"	d	file:
URXD_ERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  URXD_ERR /;"	d
URXD_ERR	drivers/serial/serial_mxc.c	/^#define  URXD_ERR /;"	d	file:
URXD_FRMERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  URXD_FRMERR /;"	d
URXD_FRMERR	drivers/serial/serial_mxc.c	/^#define  URXD_FRMERR /;"	d	file:
URXD_OVRRUN	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  URXD_OVRRUN /;"	d
URXD_OVRRUN	drivers/serial/serial_mxc.c	/^#define  URXD_OVRRUN /;"	d	file:
URXD_PRERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  URXD_PRERR /;"	d
URXD_PRERR	drivers/serial/serial_mxc.c	/^#define  URXD_PRERR /;"	d	file:
URXD_RX_DATA	drivers/serial/serial_mxc.c	/^#define  URXD_RX_DATA /;"	d	file:
US1_OR	drivers/serial/serial_lpuart.c	/^#define US1_OR	/;"	d	file:
US1_RDRF	drivers/serial/serial_linflexuart.c	/^#define US1_RDRF /;"	d	file:
US1_RDRF	drivers/serial/serial_lpuart.c	/^#define US1_RDRF	/;"	d	file:
US1_TDRE	drivers/serial/serial_linflexuart.c	/^#define US1_TDRE /;"	d	file:
US1_TDRE	drivers/serial/serial_lpuart.c	/^#define US1_TDRE	/;"	d	file:
USAGE_COMMON_LONG_OPTS	tools/fdtgrep.c	/^#define USAGE_COMMON_LONG_OPTS /;"	d	file:
USAGE_COMMON_OPTS_HELP	tools/fdtgrep.c	/^#define USAGE_COMMON_OPTS_HELP /;"	d	file:
USAGE_COMMON_SHORT_OPTS	tools/fdtgrep.c	/^#define USAGE_COMMON_SHORT_OPTS /;"	d	file:
USART1_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define USART1_BASE	/;"	d
USART1_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USART1_BASE_ADDR /;"	d
USART1_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	USART1_CLOCK_CFG = 0,$/;"	e	enum:periph_clock
USART1_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	USART1_CLOCK_CFG = 0,$/;"	e	enum:periph_clock
USART2_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define USART2_BASE	/;"	d
USART2_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USART2_BASE_ADDR /;"	d
USART2_CLOCK_CFG	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^	USART2_CLOCK_CFG,$/;"	e	enum:periph_clock
USART2_CLOCK_CFG	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^	USART2_CLOCK_CFG,$/;"	e	enum:periph_clock
USART3_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define USART3_BASE	/;"	d
USART3_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USART3_BASE_ADDR /;"	d
USART3_BF	drivers/serial/atmel_usart.h	/^#define USART3_BF(/;"	d
USART3_BFEXT	drivers/serial/atmel_usart.h	/^#define USART3_BFEXT(/;"	d
USART3_BFINS	drivers/serial/atmel_usart.h	/^#define USART3_BFINS(/;"	d
USART3_BIT	drivers/serial/atmel_usart.h	/^#define USART3_BIT(/;"	d
USART3_CD_BYPASS	drivers/serial/atmel_usart.h	/^#define USART3_CD_BYPASS	/;"	d
USART3_CD_DISABLE	drivers/serial/atmel_usart.h	/^#define USART3_CD_DISABLE	/;"	d
USART3_CD_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_CD_OFFSET	/;"	d
USART3_CD_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_CD_SIZE	/;"	d
USART3_CHMODE_ECHO	drivers/serial/atmel_usart.h	/^#define USART3_CHMODE_ECHO	/;"	d
USART3_CHMODE_LOCAL_LOOP	drivers/serial/atmel_usart.h	/^#define USART3_CHMODE_LOCAL_LOOP	/;"	d
USART3_CHMODE_NORMAL	drivers/serial/atmel_usart.h	/^#define USART3_CHMODE_NORMAL	/;"	d
USART3_CHMODE_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_CHMODE_OFFSET	/;"	d
USART3_CHMODE_REMOTE_LOOP	drivers/serial/atmel_usart.h	/^#define USART3_CHMODE_REMOTE_LOOP	/;"	d
USART3_CHMODE_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_CHMODE_SIZE	/;"	d
USART3_CHRL_5	drivers/serial/atmel_usart.h	/^#define USART3_CHRL_5	/;"	d
USART3_CHRL_6	drivers/serial/atmel_usart.h	/^#define USART3_CHRL_6	/;"	d
USART3_CHRL_7	drivers/serial/atmel_usart.h	/^#define USART3_CHRL_7	/;"	d
USART3_CHRL_8	drivers/serial/atmel_usart.h	/^#define USART3_CHRL_8	/;"	d
USART3_CHRL_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_CHRL_OFFSET	/;"	d
USART3_CHRL_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_CHRL_SIZE	/;"	d
USART3_CLKO_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_CLKO_OFFSET	/;"	d
USART3_CLKO_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_CLKO_SIZE	/;"	d
USART3_COMM_RX_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_COMM_RX_OFFSET	/;"	d
USART3_COMM_RX_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_COMM_RX_SIZE	/;"	d
USART3_COMM_TX_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_COMM_TX_OFFSET	/;"	d
USART3_COMM_TX_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_COMM_TX_SIZE	/;"	d
USART3_CTSIC_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_CTSIC_OFFSET	/;"	d
USART3_CTSIC_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_CTSIC_SIZE	/;"	d
USART3_CTS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_CTS_OFFSET	/;"	d
USART3_CTS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_CTS_SIZE	/;"	d
USART3_DCDIC_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DCDIC_OFFSET	/;"	d
USART3_DCDIC_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DCDIC_SIZE	/;"	d
USART3_DCD_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DCD_OFFSET	/;"	d
USART3_DCD_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DCD_SIZE	/;"	d
USART3_DSNACK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DSNACK_OFFSET	/;"	d
USART3_DSNACK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DSNACK_SIZE	/;"	d
USART3_DSRIC_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DSRIC_OFFSET	/;"	d
USART3_DSRIC_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DSRIC_SIZE	/;"	d
USART3_DSR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DSR_OFFSET	/;"	d
USART3_DSR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DSR_SIZE	/;"	d
USART3_DTRDIS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DTRDIS_OFFSET	/;"	d
USART3_DTRDIS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DTRDIS_SIZE	/;"	d
USART3_DTREN_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_DTREN_OFFSET	/;"	d
USART3_DTREN_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_DTREN_SIZE	/;"	d
USART3_ENDRX_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_ENDRX_OFFSET	/;"	d
USART3_ENDRX_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_ENDRX_SIZE	/;"	d
USART3_ENDTX_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_ENDTX_OFFSET	/;"	d
USART3_ENDTX_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_ENDTX_SIZE	/;"	d
USART3_FILTER_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_FILTER_OFFSET	/;"	d
USART3_FILTER_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_FILTER_SIZE	/;"	d
USART3_FI_DI_RATIO_DISABLE	drivers/serial/atmel_usart.h	/^#define USART3_FI_DI_RATIO_DISABLE	/;"	d
USART3_FI_DI_RATIO_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_FI_DI_RATIO_OFFSET	/;"	d
USART3_FI_DI_RATIO_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_FI_DI_RATIO_SIZE	/;"	d
USART3_FRAME_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_FRAME_OFFSET	/;"	d
USART3_FRAME_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_FRAME_SIZE	/;"	d
USART3_INACK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_INACK_OFFSET	/;"	d
USART3_INACK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_INACK_SIZE	/;"	d
USART3_IRDA_FILTER_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_IRDA_FILTER_OFFSET	/;"	d
USART3_IRDA_FILTER_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_IRDA_FILTER_SIZE	/;"	d
USART3_ITERATION_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_ITERATION_OFFSET	/;"	d
USART3_ITERATION_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_ITERATION_SIZE	/;"	d
USART3_MAX_ITERATION_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_MAX_ITERATION_OFFSET	/;"	d
USART3_MAX_ITERATION_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_MAX_ITERATION_SIZE	/;"	d
USART3_MODE9_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_MODE9_OFFSET	/;"	d
USART3_MODE9_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_MODE9_SIZE	/;"	d
USART3_MSBF_LSBF	drivers/serial/atmel_usart.h	/^#define USART3_MSBF_LSBF	/;"	d
USART3_MSBF_MSBF	drivers/serial/atmel_usart.h	/^#define USART3_MSBF_MSBF	/;"	d
USART3_MSBF_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_MSBF_OFFSET	/;"	d
USART3_MSBF_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_MSBF_SIZE	/;"	d
USART3_NACK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_NACK_OFFSET	/;"	d
USART3_NACK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_NACK_SIZE	/;"	d
USART3_NBSTOP_1	drivers/serial/atmel_usart.h	/^#define USART3_NBSTOP_1	/;"	d
USART3_NBSTOP_1_5	drivers/serial/atmel_usart.h	/^#define USART3_NBSTOP_1_5	/;"	d
USART3_NBSTOP_2	drivers/serial/atmel_usart.h	/^#define USART3_NBSTOP_2	/;"	d
USART3_NBSTOP_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_NBSTOP_OFFSET	/;"	d
USART3_NBSTOP_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_NBSTOP_SIZE	/;"	d
USART3_NB_ERRORS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_NB_ERRORS_OFFSET	/;"	d
USART3_NB_ERRORS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_NB_ERRORS_SIZE	/;"	d
USART3_OVER_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_OVER_OFFSET	/;"	d
USART3_OVER_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_OVER_SIZE	/;"	d
USART3_OVER_X16	drivers/serial/atmel_usart.h	/^#define USART3_OVER_X16	/;"	d
USART3_OVER_X8	drivers/serial/atmel_usart.h	/^#define USART3_OVER_X8	/;"	d
USART3_OVRE_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_OVRE_OFFSET	/;"	d
USART3_OVRE_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_OVRE_SIZE	/;"	d
USART3_PARE_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_PARE_OFFSET	/;"	d
USART3_PARE_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_PARE_SIZE	/;"	d
USART3_PAR_EVEN	drivers/serial/atmel_usart.h	/^#define USART3_PAR_EVEN	/;"	d
USART3_PAR_MARK	drivers/serial/atmel_usart.h	/^#define USART3_PAR_MARK	/;"	d
USART3_PAR_MULTI	drivers/serial/atmel_usart.h	/^#define USART3_PAR_MULTI	/;"	d
USART3_PAR_NONE	drivers/serial/atmel_usart.h	/^#define USART3_PAR_NONE	/;"	d
USART3_PAR_ODD	drivers/serial/atmel_usart.h	/^#define USART3_PAR_ODD	/;"	d
USART3_PAR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_PAR_OFFSET	/;"	d
USART3_PAR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_PAR_SIZE	/;"	d
USART3_PAR_SPACE	drivers/serial/atmel_usart.h	/^#define USART3_PAR_SPACE	/;"	d
USART3_RETTO_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RETTO_OFFSET	/;"	d
USART3_RETTO_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RETTO_SIZE	/;"	d
USART3_RIIC_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RIIC_OFFSET	/;"	d
USART3_RIIC_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RIIC_SIZE	/;"	d
USART3_RI_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RI_OFFSET	/;"	d
USART3_RI_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RI_SIZE	/;"	d
USART3_RSTIT_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RSTIT_OFFSET	/;"	d
USART3_RSTIT_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RSTIT_SIZE	/;"	d
USART3_RSTNACK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RSTNACK_OFFSET	/;"	d
USART3_RSTNACK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RSTNACK_SIZE	/;"	d
USART3_RSTRX_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RSTRX_OFFSET	/;"	d
USART3_RSTRX_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RSTRX_SIZE	/;"	d
USART3_RSTSTA_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RSTSTA_OFFSET	/;"	d
USART3_RSTSTA_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RSTSTA_SIZE	/;"	d
USART3_RSTTX_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RSTTX_OFFSET	/;"	d
USART3_RSTTX_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RSTTX_SIZE	/;"	d
USART3_RTSDIS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RTSDIS_OFFSET	/;"	d
USART3_RTSDIS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RTSDIS_SIZE	/;"	d
USART3_RTSEN_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RTSEN_OFFSET	/;"	d
USART3_RTSEN_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RTSEN_SIZE	/;"	d
USART3_RXBRK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXBRK_OFFSET	/;"	d
USART3_RXBRK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXBRK_SIZE	/;"	d
USART3_RXBUFF_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXBUFF_OFFSET	/;"	d
USART3_RXBUFF_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXBUFF_SIZE	/;"	d
USART3_RXCHR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXCHR_OFFSET	/;"	d
USART3_RXCHR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXCHR_SIZE	/;"	d
USART3_RXCTR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXCTR_OFFSET	/;"	d
USART3_RXCTR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXCTR_SIZE	/;"	d
USART3_RXDIS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXDIS_OFFSET	/;"	d
USART3_RXDIS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXDIS_SIZE	/;"	d
USART3_RXEN_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXEN_OFFSET	/;"	d
USART3_RXEN_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXEN_SIZE	/;"	d
USART3_RXNCR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXNCR_OFFSET	/;"	d
USART3_RXNCR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXNCR_SIZE	/;"	d
USART3_RXRDY_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXRDY_OFFSET	/;"	d
USART3_RXRDY_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXRDY_SIZE	/;"	d
USART3_RXTDIS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXTDIS_OFFSET	/;"	d
USART3_RXTDIS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXTDIS_SIZE	/;"	d
USART3_RXTEN_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_RXTEN_OFFSET	/;"	d
USART3_RXTEN_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_RXTEN_SIZE	/;"	d
USART3_SENDA_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_SENDA_OFFSET	/;"	d
USART3_SENDA_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_SENDA_SIZE	/;"	d
USART3_STPBRK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_STPBRK_OFFSET	/;"	d
USART3_STPBRK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_STPBRK_SIZE	/;"	d
USART3_STTBRK_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_STTBRK_OFFSET	/;"	d
USART3_STTBRK_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_STTBRK_SIZE	/;"	d
USART3_STTTO_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_STTTO_OFFSET	/;"	d
USART3_STTTO_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_STTTO_SIZE	/;"	d
USART3_SYNC_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_SYNC_OFFSET	/;"	d
USART3_SYNC_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_SYNC_SIZE	/;"	d
USART3_TG_DISABLE	drivers/serial/atmel_usart.h	/^#define USART3_TG_DISABLE	/;"	d
USART3_TG_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TG_OFFSET	/;"	d
USART3_TG_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TG_SIZE	/;"	d
USART3_TIMEOUT_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TIMEOUT_OFFSET	/;"	d
USART3_TIMEOUT_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TIMEOUT_SIZE	/;"	d
USART3_TO_DISABLE	drivers/serial/atmel_usart.h	/^#define USART3_TO_DISABLE	/;"	d
USART3_TO_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TO_OFFSET	/;"	d
USART3_TO_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TO_SIZE	/;"	d
USART3_TXBUFE_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXBUFE_OFFSET	/;"	d
USART3_TXBUFE_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXBUFE_SIZE	/;"	d
USART3_TXCHR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXCHR_OFFSET	/;"	d
USART3_TXCHR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXCHR_SIZE	/;"	d
USART3_TXCTR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXCTR_OFFSET	/;"	d
USART3_TXCTR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXCTR_SIZE	/;"	d
USART3_TXDIS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXDIS_OFFSET	/;"	d
USART3_TXDIS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXDIS_SIZE	/;"	d
USART3_TXEMPTY_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXEMPTY_OFFSET	/;"	d
USART3_TXEMPTY_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXEMPTY_SIZE	/;"	d
USART3_TXEN_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXEN_OFFSET	/;"	d
USART3_TXEN_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXEN_SIZE	/;"	d
USART3_TXNCR_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXNCR_OFFSET	/;"	d
USART3_TXNCR_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXNCR_SIZE	/;"	d
USART3_TXRDY_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXRDY_OFFSET	/;"	d
USART3_TXRDY_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXRDY_SIZE	/;"	d
USART3_TXTDIS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXTDIS_OFFSET	/;"	d
USART3_TXTDIS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXTDIS_SIZE	/;"	d
USART3_TXTEN_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_TXTEN_OFFSET	/;"	d
USART3_TXTEN_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_TXTEN_SIZE	/;"	d
USART3_USART_MODE_HARDWARE	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_HARDWARE	/;"	d
USART3_USART_MODE_IRDA	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_IRDA	/;"	d
USART3_USART_MODE_ISO7816_T0	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_ISO7816_T0	/;"	d
USART3_USART_MODE_ISO7816_T1	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_ISO7816_T1	/;"	d
USART3_USART_MODE_MODEM	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_MODEM	/;"	d
USART3_USART_MODE_NORMAL	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_NORMAL	/;"	d
USART3_USART_MODE_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_OFFSET	/;"	d
USART3_USART_MODE_RS485	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_RS485	/;"	d
USART3_USART_MODE_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_USART_MODE_SIZE	/;"	d
USART3_USCLKS_MCK	drivers/serial/atmel_usart.h	/^#define USART3_USCLKS_MCK	/;"	d
USART3_USCLKS_MCK_DIV	drivers/serial/atmel_usart.h	/^#define USART3_USCLKS_MCK_DIV	/;"	d
USART3_USCLKS_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_USCLKS_OFFSET	/;"	d
USART3_USCLKS_SCK	drivers/serial/atmel_usart.h	/^#define USART3_USCLKS_SCK	/;"	d
USART3_USCLKS_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_USCLKS_SIZE	/;"	d
USART3_XOFF_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_XOFF_OFFSET	/;"	d
USART3_XOFF_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_XOFF_SIZE	/;"	d
USART3_XON_OFFSET	drivers/serial/atmel_usart.h	/^#define USART3_XON_OFFSET	/;"	d
USART3_XON_SIZE	drivers/serial/atmel_usart.h	/^#define USART3_XON_SIZE	/;"	d
USART4_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USART4_BASE_ADDR /;"	d
USART5_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USART5_BASE_ADDR /;"	d
USART6_BASE	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define USART6_BASE	/;"	d
USART6_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USART6_BASE_ADDR /;"	d
USART_BRR_F_MASK	drivers/serial/serial_stm32.c	/^#define USART_BRR_F_MASK	/;"	d	file:
USART_BRR_F_MASK	drivers/serial/serial_stm32x7.h	/^#define USART_BRR_F_MASK	/;"	d
USART_BRR_M_MASK	drivers/serial/serial_stm32.c	/^#define USART_BRR_M_MASK	/;"	d	file:
USART_BRR_M_MASK	drivers/serial/serial_stm32x7.h	/^#define USART_BRR_M_MASK	/;"	d
USART_BRR_M_SHIFT	drivers/serial/serial_stm32.c	/^#define USART_BRR_M_SHIFT	/;"	d	file:
USART_BRR_M_SHIFT	drivers/serial/serial_stm32x7.h	/^#define USART_BRR_M_SHIFT	/;"	d
USART_CR1_RE	drivers/serial/serial_stm32.c	/^#define USART_CR1_RE	/;"	d	file:
USART_CR1_RE	drivers/serial/serial_stm32x7.h	/^#define USART_CR1_RE	/;"	d
USART_CR1_TE	drivers/serial/serial_stm32.c	/^#define USART_CR1_TE	/;"	d	file:
USART_CR1_TE	drivers/serial/serial_stm32x7.h	/^#define USART_CR1_TE	/;"	d
USART_CR1_UE	drivers/serial/serial_stm32.c	/^#define USART_CR1_UE	/;"	d	file:
USART_CR1_UE	drivers/serial/serial_stm32x7.h	/^#define USART_CR1_UE	/;"	d
USART_SR_FLAG_RXNE	drivers/serial/serial_stm32.c	/^#define USART_SR_FLAG_RXNE	/;"	d	file:
USART_SR_FLAG_RXNE	drivers/serial/serial_stm32x7.h	/^#define USART_SR_FLAG_RXNE	/;"	d
USART_SR_FLAG_TXE	drivers/serial/serial_stm32.c	/^#define USART_SR_FLAG_TXE	/;"	d	file:
USART_SR_FLAG_TXE	drivers/serial/serial_stm32x7.h	/^#define USART_SR_FLAG_TXE	/;"	d
USB	drivers/usb/Kconfig	/^menuconfig USB$/;"	c
USB0	arch/powerpc/dts/canyonlands.dts	/^		USB0: ehci@bffd0400 {$/;"	l
USB0_COMMON_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define USB0_COMMON_BASE	/;"	d
USB0_COMMON_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define USB0_COMMON_BASE	/;"	d
USB0_COMMON_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define USB0_COMMON_BASE	/;"	d
USB0_ENABLE_PIN	board/bluewater/gurnard/gurnard.c	/^#define USB0_ENABLE_PIN	/;"	d	file:
USB0_EXTP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,$/;"	e	enum:__anona3077f190103	file:
USB0_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define USB0_FREQ /;"	d
USB0_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define USB0_FREQ /;"	d
USB0_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define USB0_FREQ /;"	d
USB0_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define USB0_FREQ /;"	d
USB0_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define USB0_FREQ /;"	d
USB0_IDIN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
USB0_ID_DET	board/sunxi/Kconfig	/^config USB0_ID_DET$/;"	c
USB0_OCI_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	USB0_OCI_MARK,	USB0_PPON_MARK,	VBUS_MARK,$/;"	e	enum:__anona304c1340103	file:
USB0_OTG_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define USB0_OTG_BASE	/;"	d
USB0_OTG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define USB0_OTG_BASE	/;"	d
USB0_OVC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB0_OVC_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB0_OVC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB0_OVC_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB0_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,$/;"	e	enum:__anona307835a0103	file:
USB0_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,$/;"	e	enum:__anona3078bdc0103	file:
USB0_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona307901d0103	file:
USB0_OVC_VBUS_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,$/;"	e	enum:__anona3077f190103	file:
USB0_PHY_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define USB0_PHY_BASE	/;"	d
USB0_PHY_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define USB0_PHY_BASE	/;"	d
USB0_PHY_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define USB0_PHY_BASE	/;"	d
USB0_PPON_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	USB0_OCI_MARK,	USB0_PPON_MARK,	VBUS_MARK,$/;"	e	enum:__anona304c1340103	file:
USB0_PWEN_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB0_PWEN_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB0_PWEN_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB0_PWEN_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB0_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,$/;"	e	enum:__anona3077f190103	file:
USB0_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,$/;"	e	enum:__anona307835a0103	file:
USB0_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,$/;"	e	enum:__anona3078bdc0103	file:
USB0_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona307901d0103	file:
USB0_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB0_RESET	/;"	d
USB0_VBUS_DET	board/sunxi/Kconfig	/^config USB0_VBUS_DET$/;"	c
USB0_VBUS_PIN	board/sunxi/Kconfig	/^config USB0_VBUS_PIN$/;"	c
USB1	arch/powerpc/dts/canyonlands.dts	/^		USB1: usb@bffd0000 {$/;"	l
USB1_ADDR_MASK	drivers/usb/host/ehci-tegra.c	/^#define USB1_ADDR_MASK	/;"	d	file:
USB1_ALIGNMENT_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define USB1_ALIGNMENT_BASE	/;"	d
USB1_ALIGNMENT_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define USB1_ALIGNMENT_BASE	/;"	d
USB1_ALIGNMENT_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define USB1_ALIGNMENT_BASE	/;"	d
USB1_COMMON_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define USB1_COMMON_BASE	/;"	d
USB1_COMMON_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define USB1_COMMON_BASE	/;"	d
USB1_COMMON_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define USB1_COMMON_BASE	/;"	d
USB1_CTRL	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB1_CTRL	/;"	d
USB1_CTRL_CM_PWRDN	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB1_CTRL_CM_PWRDN	/;"	d
USB1_CTRL_OTG_PWRDN	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB1_CTRL_OTG_PWRDN	/;"	d
USB1_DEVICE	board/amcc/bamboo/bamboo.h	/^			    USB1_DEVICE,$/;"	e	enum:config_list
USB1_DRVVBUS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define USB1_DRVVBUS	/;"	d
USB1_ENABLE_PIN	board/bluewater/gurnard/gurnard.c	/^#define USB1_ENABLE_PIN	/;"	d	file:
USB1_EXTP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
USB1_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define USB1_FREQ /;"	d
USB1_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define USB1_FREQ /;"	d
USB1_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define USB1_FREQ /;"	d
USB1_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define USB1_FREQ /;"	d
USB1_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define USB1_FREQ /;"	d
USB1_HOST	board/amcc/bamboo/bamboo.h	/^			    USB1_HOST,$/;"	e	enum:config_list
USB1_IDIN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
USB1_NO_LEGACY_MODE	arch/arm/include/asm/arch-tegra/usb.h	/^#define USB1_NO_LEGACY_MODE	/;"	d
USB1_OCI_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	USB1_OCI_MARK,	USB1_PPON_MARK,$/;"	e	enum:__anona304c1340103	file:
USB1_OTG_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define USB1_OTG_BASE	/;"	d
USB1_OTG_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define USB1_OTG_BASE	/;"	d
USB1_OVC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB1_OVC_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB1_OVC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB1_OVC_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB1_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona3077f190103	file:
USB1_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona307901d0103	file:
USB1_PORT_BASE	arch/sh/include/asm/cpu_sh7752.h	/^#define USB1_PORT_BASE	/;"	d
USB1_PORT_BASE	arch/sh/include/asm/cpu_sh7753.h	/^#define USB1_PORT_BASE	/;"	d
USB1_PORT_BASE	arch/sh/include/asm/cpu_sh7757.h	/^#define USB1_PORT_BASE	/;"	d
USB1_PPON_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	USB1_OCI_MARK,	USB1_PPON_MARK,$/;"	e	enum:__anona304c1340103	file:
USB1_PWEN_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB1_PWEN_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB1_PWEN_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB1_PWEN_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB1_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona3077f190103	file:
USB1_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,$/;"	e	enum:__anona307835a0103	file:
USB1_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,$/;"	e	enum:__anona3078bdc0103	file:
USB1_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK,$/;"	e	enum:__anona307901d0103	file:
USB1_PWR	board/teejet/mt_ventoux/mt_ventoux.c	/^#define USB1_PWR	/;"	d	file:
USB1_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define USB1_RESET	/;"	d
USB1_VBUS_PIN	board/sunxi/Kconfig	/^config USB1_VBUS_PIN$/;"	c
USB20_PHY_CFG_HOST_LINK_EN	arch/arm/mach-exynos/include/mach/system.h	/^#define USB20_PHY_CFG_HOST_LINK_EN	/;"	d
USB2D0_BASE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_BASE /;"	d
USB2D0_FADDR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_FADDR /;"	d
USB2D0_FRAME	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_FRAME /;"	d
USB2D0_INCSR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INCSR /;"	d
USB2D0_INCSR0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INCSR0 /;"	d
USB2D0_INDEX	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INDEX /;"	d
USB2D0_INMAXP	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INMAXP /;"	d
USB2D0_INTRIN	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INTRIN /;"	d
USB2D0_INTRINE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INTRINE /;"	d
USB2D0_INTROUT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INTROUT /;"	d
USB2D0_INTROUTE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INTROUTE /;"	d
USB2D0_INTRUSB	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INTRUSB /;"	d
USB2D0_INTRUSBE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_INTRUSBE /;"	d
USB2D0_OUTCOUNT	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_OUTCOUNT /;"	d
USB2D0_OUTCOUNT0	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_OUTCOUNT0 /;"	d
USB2D0_OUTCSR	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_OUTCSR /;"	d
USB2D0_OUTMAXP	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_OUTMAXP /;"	d
USB2D0_POWER	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_POWER /;"	d
USB2D0_TSTMODE	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define USB2D0_TSTMODE /;"	d
USB2PHY2_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB2PHY2_BASE	/;"	d
USB2PHY_AUTORESUME_EN	arch/arm/include/asm/arch-omap5/clock.h	/^#define USB2PHY_AUTORESUME_EN /;"	d
USB2PHY_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB2PHY_BASE	/;"	d
USB2PHY_DISCHGDET	arch/arm/include/asm/arch-omap5/clock.h	/^#define USB2PHY_DISCHGDET	/;"	d
USB2PHY_L1	drivers/usb/eth/r8152.h	/^#define USB2PHY_L1	/;"	d
USB2PHY_SUSPEND	drivers/usb/eth/r8152.h	/^#define USB2PHY_SUSPEND	/;"	d
USB2_CAL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_CAL_CTRL_ADDR	/;"	d
USB2_COMPBG	arch/x86/include/asm/arch-quark/quark.h	/^#define USB2_COMPBG	/;"	d
USB2_DEVICE	board/amcc/bamboo/bamboo.h	/^			    USB2_DEVICE,$/;"	e	enum:config_list
USB2_DRVVBUS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define USB2_DRVVBUS	/;"	d
USB2_EXTP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK,$/;"	e	enum:__anona3077f190103	file:
USB2_GLOBAL_PORT	arch/x86/include/asm/arch-quark/quark.h	/^#define USB2_GLOBAL_PORT	/;"	d
USB2_HOST	board/amcc/bamboo/bamboo.h	/^			    USB2_HOST,$/;"	e	enum:config_list
USB2_IDIN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,$/;"	e	enum:__anona3077f190103	file:
USB2_OTG_PHY_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_OTG_PHY_CTRL_ADDR	/;"	d
USB2_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona3077f190103	file:
USB2_OVC_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB2_OVC_MARK,$/;"	e	enum:__anona307945e0103	file:
USB2_PHY1_POWER	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB2_PHY1_POWER	/;"	d
USB2_PHY2_CAL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY2_CAL_CTRL_ADDR	/;"	d
USB2_PHY2_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY2_CTRL_ADDR	/;"	d
USB2_PHY2_PLL_CTRL0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY2_PLL_CTRL0_ADDR	/;"	d
USB2_PHY2_POWER	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB2_PHY2_POWER	/;"	d
USB2_PHY2_RX_CHAN_CTRL1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY2_RX_CHAN_CTRL1_ADDR	/;"	d
USB2_PHY_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_BASE(/;"	d
USB2_PHY_CAL_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_CAL_CTRL_ADDR(/;"	d
USB2_PHY_CHRGR_DET_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_CHRGR_DET_ADDR	/;"	d
USB2_PHY_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_CTRL_ADDR(/;"	d
USB2_PHY_OTG_CTRL_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_OTG_CTRL_ADDR	/;"	d
USB2_PHY_PLL_CTRL0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_PLL_CTRL0_ADDR(/;"	d
USB2_PHY_RX_CHAN_CTRL1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PHY_RX_CHAN_CTRL1_ADDR(/;"	d
USB2_PLL1	arch/x86/include/asm/arch-quark/quark.h	/^#define USB2_PLL1	/;"	d
USB2_PLL2	arch/x86/include/asm/arch-quark/quark.h	/^#define USB2_PLL2	/;"	d
USB2_PLL_CTRL0_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_PLL_CTRL0_ADDR	/;"	d
USB2_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB2_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
USB2_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,$/;"	e	enum:__anona3077f190103	file:
USB2_PWEN_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB2_PWEN_MARK,$/;"	e	enum:__anona307945e0103	file:
USB2_PWR	board/teejet/mt_ventoux/mt_ventoux.c	/^#define USB2_PWR	/;"	d	file:
USB2_RX_CHAN_CTRL1_ADDR	drivers/phy/marvell/comphy_a3700.h	/^#define USB2_RX_CHAN_CTRL1_ADDR	/;"	d
USB2_SBUSCFG_OFF	drivers/usb/host/ehci-marvell.c	/^#define USB2_SBUSCFG_OFF	/;"	d	file:
USB2_VBUS_PIN	board/sunxi/Kconfig	/^config USB2_VBUS_PIN$/;"	c
USB3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3,$/;"	e	enum:__anon525929f50103
USB3	drivers/phy/marvell/comphy_a3700.h	/^#define USB3	/;"	d
USB30_OVC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB30_OVC_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB30_OVC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB30_OVC_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB30_PWEN_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB30_PWEN_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB30_PWEN_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB30_PWEN_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB31_OVC_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB31_OVC_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB31_OVC_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB31_OVC_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB31_PWEN_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB31_PWEN_GMARK,$/;"	e	enum:__anona307945e0103	file:
USB31_PWEN_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	USB31_PWEN_IMARK,$/;"	e	enum:__anona307945e0103	file:
USB32H_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB32H_BASE	/;"	d
USB32_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB32_BASE	/;"	d
USB32_CTRL_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB32_CTRL_BASE	/;"	d
USB3D_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	USB3D_UNIT_ID,$/;"	e	enum:unit_id
USB3H_CTRPUL_VAL_REG	drivers/phy/marvell/comphy_a3700.h	/^#define USB3H_CTRPUL_VAL_REG	/;"	d
USB3H_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	USB3H_UNIT_ID,$/;"	e	enum:unit_id
USB3PHY_BASE	drivers/phy/marvell/comphy_a3700.h	/^#define USB3PHY_BASE	/;"	d
USB3PHY_SHFT	drivers/phy/marvell/comphy_a3700.h	/^#define USB3PHY_SHFT	/;"	d
USB3SERDES_SPEED_5_GBPS_DEVICE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3SERDES_SPEED_5_GBPS_DEVICE,$/;"	e	enum:__anon525929f50203
USB3SERDES_SPEED_5_GBPS_HOST	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3SERDES_SPEED_5_GBPS_HOST,$/;"	e	enum:__anon525929f50203
USB3_CTRPUL_VAL_REG	drivers/phy/marvell/comphy_a3700.h	/^#define USB3_CTRPUL_VAL_REG	/;"	d
USB3_DEVICE	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_DEVICE,$/;"	e	enum:serdes_type
USB3_DEVICE_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_DEVICE_CONFIG_SEQ,$/;"	e	enum:serdes_seq
USB3_DEVICE_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_DEVICE_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
USB3_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
USB3_ENABLE_BEAT_BURST	include/linux/usb/xhci-fsl.h	/^#define USB3_ENABLE_BEAT_BURST	/;"	d
USB3_ENABLE_BEAT_BURST_MASK	include/linux/usb/xhci-fsl.h	/^#define USB3_ENABLE_BEAT_BURST_MASK	/;"	d
USB3_HOST0	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_HOST0,$/;"	e	enum:serdes_type
USB3_HOST1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_HOST1,$/;"	e	enum:serdes_type
USB3_HOST_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_HOST_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
USB3_LPM_DEVICE_INITIATED	include/linux/usb/ch9.h	/^#define USB3_LPM_DEVICE_INITIATED	/;"	d
USB3_LPM_DISABLED	include/linux/usb/ch9.h	/^#define USB3_LPM_DISABLED	/;"	d
USB3_LPM_MAX_U1_SEL_PEL	include/linux/usb/ch9.h	/^#define USB3_LPM_MAX_U1_SEL_PEL	/;"	d
USB3_LPM_MAX_U2_SEL_PEL	include/linux/usb/ch9.h	/^#define USB3_LPM_MAX_U2_SEL_PEL	/;"	d
USB3_LPM_U0	include/linux/usb/ch9.h	/^	USB3_LPM_U0 = 0,$/;"	e	enum:usb3_link_state
USB3_LPM_U1	include/linux/usb/ch9.h	/^	USB3_LPM_U1,$/;"	e	enum:usb3_link_state
USB3_LPM_U1_MAX_TIMEOUT	include/linux/usb/ch9.h	/^#define USB3_LPM_U1_MAX_TIMEOUT	/;"	d
USB3_LPM_U2	include/linux/usb/ch9.h	/^	USB3_LPM_U2,$/;"	e	enum:usb3_link_state
USB3_LPM_U2_MAX_TIMEOUT	include/linux/usb/ch9.h	/^#define USB3_LPM_U2_MAX_TIMEOUT	/;"	d
USB3_LPM_U3	include/linux/usb/ch9.h	/^	USB3_LPM_U3$/;"	e	enum:usb3_link_state
USB3_PHY_OTG_VBUSVLDECTSEL	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^#define USB3_PHY_OTG_VBUSVLDECTSEL	/;"	d
USB3_PHY_PARTIAL_RX_POWERON	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PHY_PARTIAL_RX_POWERON /;"	d	file:
USB3_PHY_PARTIAL_RX_POWERON	include/linux/usb/xhci-fsl.h	/^#define USB3_PHY_PARTIAL_RX_POWERON /;"	d
USB3_PHY_PARTIAL_RX_POWERON	include/linux/usb/xhci-omap.h	/^#define USB3_PHY_PARTIAL_RX_POWERON /;"	d
USB3_PHY_REF_SSP_EN	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^#define USB3_PHY_REF_SSP_EN	/;"	d
USB3_PHY_RX_POWERON	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PHY_RX_POWERON	/;"	d	file:
USB3_PHY_RX_POWERON	include/linux/usb/xhci-fsl.h	/^#define USB3_PHY_RX_POWERON	/;"	d
USB3_PHY_RX_POWERON	include/linux/usb/xhci-omap.h	/^#define USB3_PHY_RX_POWERON	/;"	d
USB3_PHY_TX_POWERON	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PHY_TX_POWERON	/;"	d	file:
USB3_PHY_TX_POWERON	include/linux/usb/xhci-fsl.h	/^#define USB3_PHY_TX_POWERON	/;"	d
USB3_PHY_TX_POWERON	include/linux/usb/xhci-omap.h	/^#define USB3_PHY_TX_POWERON	/;"	d
USB3_PHY_TX_RX_POWERON	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PHY_TX_RX_POWERON	/;"	d	file:
USB3_PHY_TX_RX_POWERON	include/linux/usb/xhci-fsl.h	/^#define USB3_PHY_TX_RX_POWERON	/;"	d
USB3_PHY_TX_RX_POWERON	include/linux/usb/xhci-omap.h	/^#define USB3_PHY_TX_RX_POWERON	/;"	d
USB3_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
USB3_PWRCTL_CLK_CMD_MASK	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PWRCTL_CLK_CMD_MASK	/;"	d	file:
USB3_PWRCTL_CLK_CMD_MASK	include/linux/usb/xhci-fsl.h	/^#define USB3_PWRCTL_CLK_CMD_MASK	/;"	d
USB3_PWRCTL_CLK_CMD_MASK	include/linux/usb/xhci-omap.h	/^#define USB3_PWRCTL_CLK_CMD_MASK	/;"	d
USB3_PWRCTL_CLK_CMD_SHIFT	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PWRCTL_CLK_CMD_SHIFT /;"	d	file:
USB3_PWRCTL_CLK_CMD_SHIFT	include/linux/usb/xhci-fsl.h	/^#define USB3_PWRCTL_CLK_CMD_SHIFT /;"	d
USB3_PWRCTL_CLK_CMD_SHIFT	include/linux/usb/xhci-omap.h	/^#define USB3_PWRCTL_CLK_CMD_SHIFT /;"	d
USB3_PWRCTL_CLK_FREQ_MASK	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PWRCTL_CLK_FREQ_MASK	/;"	d	file:
USB3_PWRCTL_CLK_FREQ_MASK	include/linux/usb/xhci-fsl.h	/^#define USB3_PWRCTL_CLK_FREQ_MASK	/;"	d
USB3_PWRCTL_CLK_FREQ_MASK	include/linux/usb/xhci-omap.h	/^#define USB3_PWRCTL_CLK_FREQ_MASK	/;"	d
USB3_PWRCTL_CLK_FREQ_SHIFT	drivers/usb/host/xhci-zynqmp.c	/^#define USB3_PWRCTL_CLK_FREQ_SHIFT	/;"	d	file:
USB3_PWRCTL_CLK_FREQ_SHIFT	include/linux/usb/xhci-fsl.h	/^#define USB3_PWRCTL_CLK_FREQ_SHIFT	/;"	d
USB3_PWRCTL_CLK_FREQ_SHIFT	include/linux/usb/xhci-omap.h	/^#define USB3_PWRCTL_CLK_FREQ_SHIFT	/;"	d
USB3_SET_BEAT_BURST_LIMIT	include/linux/usb/xhci-fsl.h	/^#define USB3_SET_BEAT_BURST_LIMIT	/;"	d
USB3_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
USB3_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
USB3_TX_CONFIG_SEQ3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	USB3_TX_CONFIG_SEQ3,$/;"	e	enum:serdes_seq
USB3_VBUS_PIN	board/sunxi/Kconfig	/^config USB3_VBUS_PIN$/;"	c
USBA0_OTG_CE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBA0_OTG_CE	/;"	d
USBA0_OTG_DM	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBA0_OTG_DM	/;"	d
USBA0_OTG_DP	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBA0_OTG_DP	/;"	d
USBADDR	drivers/usb/host/r8a66597.h	/^#define USBADDR	/;"	d
USBARMORY_FIT_ADDR	include/configs/usbarmory.h	/^#define USBARMORY_FIT_ADDR	/;"	d
USBARMORY_FIT_PATH	include/configs/usbarmory.h	/^#define USBARMORY_FIT_PATH	/;"	d
USBA_AUTO_VALID	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_AUTO_VALID	/;"	d
USBA_BF	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BF(/;"	d
USBA_BFEXT	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BFEXT(/;"	d
USBA_BFINS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BFINS(/;"	d
USBA_BK_NUMBER_DOUBLE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BK_NUMBER_DOUBLE	/;"	d
USBA_BK_NUMBER_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BK_NUMBER_OFFSET	/;"	d
USBA_BK_NUMBER_ONE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BK_NUMBER_ONE	/;"	d
USBA_BK_NUMBER_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BK_NUMBER_SIZE	/;"	d
USBA_BK_NUMBER_TRIPLE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BK_NUMBER_TRIPLE	/;"	d
USBA_BK_NUMBER_ZERO	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BK_NUMBER_ZERO	/;"	d
USBA_BUSY_BANKS_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BUSY_BANKS_OFFSET	/;"	d
USBA_BUSY_BANKS_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BUSY_BANKS_SIZE	/;"	d
USBA_BUSY_BANK_IE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BUSY_BANK_IE	/;"	d
USBA_BYTE_COUNT_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BYTE_COUNT_OFFSET	/;"	d
USBA_BYTE_COUNT_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_BYTE_COUNT_SIZE	/;"	d
USBA_CTRL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_CTRL	/;"	d
USBA_CURRENT_BANK_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_CURRENT_BANK_OFFSET	/;"	d
USBA_CURRENT_BANK_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_CURRENT_BANK_SIZE	/;"	d
USBA_DATAX_RX	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DATAX_RX	/;"	d
USBA_DETACH	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DETACH	/;"	d
USBA_DET_SUSPEND	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DET_SUSPEND	/;"	d
USBA_DEV_ADDR_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DEV_ADDR_OFFSET	/;"	d
USBA_DEV_ADDR_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DEV_ADDR_SIZE	/;"	d
USBA_DISABLE_MASK	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DISABLE_MASK	/;"	d
USBA_DMA_ADDRESS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_ADDRESS	/;"	d
USBA_DMA_BASE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_BASE(/;"	d
USBA_DMA_BUF_LEN_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_BUF_LEN_OFFSET	/;"	d
USBA_DMA_BUF_LEN_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_BUF_LEN_SIZE	/;"	d
USBA_DMA_BURST_LOCK	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_BURST_LOCK	/;"	d
USBA_DMA_CH_ACTIVE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_CH_ACTIVE	/;"	d
USBA_DMA_CH_EN	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_CH_EN	/;"	d
USBA_DMA_CONTROL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_CONTROL	/;"	d
USBA_DMA_DESC_LOAD_IE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_DESC_LOAD_IE	/;"	d
USBA_DMA_DESC_LOAD_ST	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_DESC_LOAD_ST	/;"	d
USBA_DMA_END_BUF_EN	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_END_BUF_EN	/;"	d
USBA_DMA_END_BUF_IE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_END_BUF_IE	/;"	d
USBA_DMA_END_BUF_ST	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_END_BUF_ST	/;"	d
USBA_DMA_END_TR_EN	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_END_TR_EN	/;"	d
USBA_DMA_END_TR_IE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_END_TR_IE	/;"	d
USBA_DMA_END_TR_ST	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_END_TR_ST	/;"	d
USBA_DMA_INT_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_INT_OFFSET	/;"	d
USBA_DMA_INT_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_INT_SIZE	/;"	d
USBA_DMA_LINK	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_LINK	/;"	d
USBA_DMA_NXT_DSC	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_NXT_DSC	/;"	d
USBA_DMA_STATUS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_DMA_STATUS	/;"	d
USBA_ENABLE_MASK	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ENABLE_MASK	/;"	d
USBA_END_OF_RESET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_END_OF_RESET	/;"	d
USBA_END_OF_RESUME	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_END_OF_RESUME	/;"	d
USBA_EN_USBA	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EN_USBA	/;"	d
USBA_EPT_BASE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_BASE(/;"	d
USBA_EPT_CFG	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_CFG	/;"	d
USBA_EPT_CLR_STA	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_CLR_STA	/;"	d
USBA_EPT_CTL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_CTL	/;"	d
USBA_EPT_CTL_DIS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_CTL_DIS	/;"	d
USBA_EPT_CTL_ENB	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_CTL_ENB	/;"	d
USBA_EPT_DIR_IN	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_DIR_IN	/;"	d
USBA_EPT_ENABLE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_ENABLE	/;"	d
USBA_EPT_INT_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_INT_OFFSET	/;"	d
USBA_EPT_INT_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_INT_SIZE	/;"	d
USBA_EPT_MAPPED	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_MAPPED	/;"	d
USBA_EPT_RST	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_RST	/;"	d
USBA_EPT_SET_STA	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SET_STA	/;"	d
USBA_EPT_SIZE_1024	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_1024	/;"	d
USBA_EPT_SIZE_128	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_128	/;"	d
USBA_EPT_SIZE_16	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_16	/;"	d
USBA_EPT_SIZE_256	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_256	/;"	d
USBA_EPT_SIZE_32	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_32	/;"	d
USBA_EPT_SIZE_512	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_512	/;"	d
USBA_EPT_SIZE_64	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_64	/;"	d
USBA_EPT_SIZE_8	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_8	/;"	d
USBA_EPT_SIZE_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_OFFSET	/;"	d
USBA_EPT_SIZE_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_SIZE_SIZE	/;"	d
USBA_EPT_STA	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_STA	/;"	d
USBA_EPT_TYPE_BULK	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_TYPE_BULK	/;"	d
USBA_EPT_TYPE_CONTROL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_TYPE_CONTROL	/;"	d
USBA_EPT_TYPE_INT	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_TYPE_INT	/;"	d
USBA_EPT_TYPE_ISO	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_TYPE_ISO	/;"	d
USBA_EPT_TYPE_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_TYPE_OFFSET	/;"	d
USBA_EPT_TYPE_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_EPT_TYPE_SIZE	/;"	d
USBA_ERR_OVFLW	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ERR_OVFLW	/;"	d
USBA_FADDR_EN	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FADDR_EN	/;"	d
USBA_FIFO_BASE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FIFO_BASE(/;"	d
USBA_FNUM	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FNUM	/;"	d
USBA_FORCE_STALL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FORCE_STALL	/;"	d
USBA_FRAME_NUMBER_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FRAME_NUMBER_OFFSET	/;"	d
USBA_FRAME_NUMBER_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FRAME_NUMBER_SIZE	/;"	d
USBA_FRAME_NUM_ERROR	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_FRAME_NUM_ERROR	/;"	d
USBA_HIGH_SPEED	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_HIGH_SPEED	/;"	d
USBA_INTDIS_DMA	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_INTDIS_DMA	/;"	d
USBA_INT_CLR	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_INT_CLR	/;"	d
USBA_INT_ENB	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_INT_ENB	/;"	d
USBA_INT_STA	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_INT_STA	/;"	d
USBA_ISO_ERR_CRC	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ISO_ERR_CRC	/;"	d
USBA_ISO_ERR_FLOW	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ISO_ERR_FLOW	/;"	d
USBA_ISO_ERR_FLUSH	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ISO_ERR_FLUSH	/;"	d
USBA_ISO_ERR_NBTRANS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ISO_ERR_NBTRANS	/;"	d
USBA_ISO_ERR_TRANS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_ISO_ERR_TRANS	/;"	d
USBA_KILL_BANK	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_KILL_BANK	/;"	d
USBA_MDATA_RX	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_MDATA_RX	/;"	d
USBA_MICRO_FRAME_NUM_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_MICRO_FRAME_NUM_OFFSET	/;"	d
USBA_MICRO_FRAME_NUM_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_MICRO_FRAME_NUM_SIZE	/;"	d
USBA_MICRO_SOF	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_MICRO_SOF	/;"	d
USBA_NAK_IN	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_NAK_IN	/;"	d
USBA_NAK_OUT	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_NAK_OUT	/;"	d
USBA_NB_TRANS_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_NB_TRANS_OFFSET	/;"	d
USBA_NB_TRANS_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_NB_TRANS_SIZE	/;"	d
USBA_NR_ENDPOINTS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_NR_ENDPOINTS	/;"	d
USBA_NYET_DIS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_NYET_DIS	/;"	d
USBA_OPMODE2	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_OPMODE2	/;"	d
USBA_PULLD_DIS	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_PULLD_DIS	/;"	d
USBA_REMOTE_WAKE_UP	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_REMOTE_WAKE_UP	/;"	d
USBA_RST_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_RST_OFFSET	/;"	d
USBA_RST_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_RST_SIZE	/;"	d
USBA_RX_BK_RDY	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_RX_BK_RDY	/;"	d
USBA_RX_SETUP	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_RX_SETUP	/;"	d
USBA_SHORT_PACKET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SHORT_PACKET	/;"	d
USBA_SOF	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SOF	/;"	d
USBA_SPEED_CFG_FORCE_FULL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SPEED_CFG_FORCE_FULL	/;"	d
USBA_SPEED_CFG_FORCE_HIGH	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SPEED_CFG_FORCE_HIGH	/;"	d
USBA_SPEED_CFG_NORMAL	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SPEED_CFG_NORMAL	/;"	d
USBA_SPEED_CFG_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SPEED_CFG_OFFSET	/;"	d
USBA_SPEED_CFG_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_SPEED_CFG_SIZE	/;"	d
USBA_STALL_SENT	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_STALL_SENT	/;"	d
USBA_TOGGLE_CLR	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TOGGLE_CLR	/;"	d
USBA_TOGGLE_SEQ_OFFSET	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TOGGLE_SEQ_OFFSET	/;"	d
USBA_TOGGLE_SEQ_SIZE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TOGGLE_SEQ_SIZE	/;"	d
USBA_TST	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TST	/;"	d
USBA_TST_J_MODE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TST_J_MODE	/;"	d
USBA_TST_K_MODE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TST_K_MODE	/;"	d
USBA_TST_PKT_MODE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TST_PKT_MODE	/;"	d
USBA_TX_COMPLETE	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TX_COMPLETE	/;"	d
USBA_TX_PK_RDY	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_TX_PK_RDY	/;"	d
USBA_UPSTREAM_RESUME	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_UPSTREAM_RESUME	/;"	d
USBA_WAKE_UP	drivers/usb/gadget/atmel_usba_udc.h	/^#define USBA_WAKE_UP	/;"	d
USBB1_HSIC_DATA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_HSIC_DATA	/;"	d
USBB1_HSIC_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBB1_HSIC_DATA	/;"	d
USBB1_HSIC_STROBE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_HSIC_STROBE	/;"	d
USBB1_HSIC_STROBE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBB1_HSIC_STROBE	/;"	d
USBB1_ULPITLL_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_CLK	/;"	d
USBB1_ULPITLL_DAT0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT0	/;"	d
USBB1_ULPITLL_DAT1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT1	/;"	d
USBB1_ULPITLL_DAT2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT2	/;"	d
USBB1_ULPITLL_DAT3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT3	/;"	d
USBB1_ULPITLL_DAT4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT4	/;"	d
USBB1_ULPITLL_DAT5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT5	/;"	d
USBB1_ULPITLL_DAT6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT6	/;"	d
USBB1_ULPITLL_DAT7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DAT7	/;"	d
USBB1_ULPITLL_DIR	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_DIR	/;"	d
USBB1_ULPITLL_NXT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_NXT	/;"	d
USBB1_ULPITLL_STP	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB1_ULPITLL_STP	/;"	d
USBB2_HSIC_DATA	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_HSIC_DATA	/;"	d
USBB2_HSIC_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBB2_HSIC_DATA	/;"	d
USBB2_HSIC_STROBE	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_HSIC_STROBE	/;"	d
USBB2_HSIC_STROBE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBB2_HSIC_STROBE	/;"	d
USBB2_ULPITLL_CLK	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_CLK	/;"	d
USBB2_ULPITLL_DAT0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT0	/;"	d
USBB2_ULPITLL_DAT1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT1	/;"	d
USBB2_ULPITLL_DAT2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT2	/;"	d
USBB2_ULPITLL_DAT3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT3	/;"	d
USBB2_ULPITLL_DAT4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT4	/;"	d
USBB2_ULPITLL_DAT5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT5	/;"	d
USBB2_ULPITLL_DAT6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT6	/;"	d
USBB2_ULPITLL_DAT7	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DAT7	/;"	d
USBB2_ULPITLL_DIR	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_DIR	/;"	d
USBB2_ULPITLL_NXT	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_NXT	/;"	d
USBB2_ULPITLL_STP	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBB2_ULPITLL_STP	/;"	d
USBB3_HSIC_DATA	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBB3_HSIC_DATA	/;"	d
USBB3_HSIC_STROBE	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBB3_HSIC_STROBE	/;"	d
USBC0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define USBC0_BASE_ADDR /;"	d
USBC1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define USBC1_BASE_ADDR /;"	d
USBC1_ICUSB_DM	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBC1_ICUSB_DM	/;"	d
USBC1_ICUSB_DP	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define USBC1_ICUSB_DP	/;"	d
USBCALL_TIMEOUT	drivers/usb/eth/mcs7830.c	/^#define USBCALL_TIMEOUT	/;"	d	file:
USBCLKSEL	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define USBCLKSEL	/;"	d
USBCMD	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBCMD	/;"	d
USBCMD	board/mpl/common/usb_uhci.h	/^#define USBCMD	/;"	d
USBCMD_CF	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_CF /;"	d
USBCMD_CF	board/mpl/common/usb_uhci.h	/^#define   USBCMD_CF /;"	d
USBCMD_EGSM	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_EGSM /;"	d
USBCMD_EGSM	board/mpl/common/usb_uhci.h	/^#define   USBCMD_EGSM /;"	d
USBCMD_FGR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_FGR /;"	d
USBCMD_FGR	board/mpl/common/usb_uhci.h	/^#define   USBCMD_FGR /;"	d
USBCMD_FS2	arch/arm/mach-tegra/board2.c	/^#define USBCMD_FS2 /;"	d	file:
USBCMD_FS2	drivers/usb/gadget/ci_udc.h	/^#define USBCMD_FS2	/;"	d
USBCMD_GRESET	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_GRESET /;"	d
USBCMD_GRESET	board/mpl/common/usb_uhci.h	/^#define   USBCMD_GRESET /;"	d
USBCMD_HCRESET	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_HCRESET /;"	d
USBCMD_HCRESET	board/mpl/common/usb_uhci.h	/^#define   USBCMD_HCRESET /;"	d
USBCMD_ITC	drivers/usb/gadget/ci_udc.h	/^#define USBCMD_ITC(/;"	d
USBCMD_MAXP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_MAXP /;"	d
USBCMD_MAXP	board/mpl/common/usb_uhci.h	/^#define   USBCMD_MAXP /;"	d
USBCMD_RS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_RS /;"	d
USBCMD_RS	board/mpl/common/usb_uhci.h	/^#define   USBCMD_RS /;"	d
USBCMD_RST	drivers/usb/gadget/ci_udc.h	/^#define USBCMD_RST	/;"	d
USBCMD_RUN	drivers/usb/gadget/ci_udc.h	/^#define USBCMD_RUN	/;"	d
USBCMD_SWDBG	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBCMD_SWDBG /;"	d
USBCMD_SWDBG	board/mpl/common/usb_uhci.h	/^#define   USBCMD_SWDBG /;"	d
USBCR1	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define USBCR1 /;"	d	file:
USBCRCON	drivers/usb/musb-new/pic32.c	/^#define USBCRCON	/;"	d	file:
USBCRCON_ASVALMONEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_ASVALMONEN	/;"	d	file:
USBCRCON_BSVALMONEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_BSVALMONEN	/;"	d	file:
USBCRCON_PHYIDEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_PHYIDEN	/;"	d	file:
USBCRCON_SENDMONEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_SENDMONEN	/;"	d	file:
USBCRCON_USBIDOVEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBIDOVEN	/;"	d	file:
USBCRCON_USBIDVAL	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBIDVAL	/;"	d	file:
USBCRCON_USBIE	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBIE	/;"	d	file:
USBCRCON_USBIF	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBIF	/;"	d	file:
USBCRCON_USBRF	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBRF	/;"	d	file:
USBCRCON_USBRIE	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBRIE	/;"	d	file:
USBCRCON_USBWK	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBWK	/;"	d	file:
USBCRCON_USBWKUPEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_USBWKUPEN	/;"	d	file:
USBCRCON_VBUSMONEN	drivers/usb/musb-new/pic32.c	/^#define  USBCRCON_VBUSMONEN	/;"	d	file:
USBCTRL_OTGBASE_OFFSET	drivers/usb/host/ehci-mxc.c	/^#define USBCTRL_OTGBASE_OFFSET	/;"	d	file:
USBCTR_WIN_SIZE_1GB	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define USBCTR_WIN_SIZE_1GB	/;"	d
USBC_BP_ISCR_DPDM_CHANGE_DETECT	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_DPDM_CHANGE_DETECT	/;"	d	file:
USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN	/;"	d	file:
USBC_BP_ISCR_DPDM_PULLUP_EN	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_DPDM_PULLUP_EN	/;"	d	file:
USBC_BP_ISCR_EXT_DM_STATUS	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_EXT_DM_STATUS	/;"	d	file:
USBC_BP_ISCR_EXT_DP_STATUS	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_EXT_DP_STATUS	/;"	d	file:
USBC_BP_ISCR_EXT_ID_STATUS	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_EXT_ID_STATUS	/;"	d	file:
USBC_BP_ISCR_FORCE_ID	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_FORCE_ID	/;"	d	file:
USBC_BP_ISCR_FORCE_VBUS_VALID	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_FORCE_VBUS_VALID	/;"	d	file:
USBC_BP_ISCR_HOSC_EN	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_HOSC_EN	/;"	d	file:
USBC_BP_ISCR_ID_CHANGE_DETECT	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_ID_CHANGE_DETECT	/;"	d	file:
USBC_BP_ISCR_ID_CHANGE_DETECT_EN	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_ID_CHANGE_DETECT_EN	/;"	d	file:
USBC_BP_ISCR_ID_PULLUP_EN	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_ID_PULLUP_EN	/;"	d	file:
USBC_BP_ISCR_IRQ_ENABLE	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_IRQ_ENABLE	/;"	d	file:
USBC_BP_ISCR_MERGED_ID_STATUS	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_MERGED_ID_STATUS	/;"	d	file:
USBC_BP_ISCR_MERGED_VBUS_STATUS	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_MERGED_VBUS_STATUS	/;"	d	file:
USBC_BP_ISCR_VBUS_CHANGE_DETECT	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_VBUS_CHANGE_DETECT	/;"	d	file:
USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN	/;"	d	file:
USBC_BP_ISCR_VBUS_VALID_FROM_DATA	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_VBUS_VALID_FROM_DATA	/;"	d	file:
USBC_BP_ISCR_VBUS_VALID_FROM_VBUS	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_VBUS_VALID_FROM_VBUS	/;"	d	file:
USBC_BP_ISCR_VBUS_VALID_SRC	drivers/usb/musb-new/sunxi.c	/^#define  USBC_BP_ISCR_VBUS_VALID_SRC	/;"	d	file:
USBC_ConfigFIFO_Base	drivers/usb/musb-new/sunxi.c	/^static void USBC_ConfigFIFO_Base(void)$/;"	f	typeref:typename:void	file:
USBC_EnableDpDmPullUp	drivers/usb/musb-new/sunxi.c	/^static void USBC_EnableDpDmPullUp(__iomem void *base)$/;"	f	typeref:typename:void	file:
USBC_EnableIdPullUp	drivers/usb/musb-new/sunxi.c	/^static void USBC_EnableIdPullUp(__iomem void *base)$/;"	f	typeref:typename:void	file:
USBC_ForceIdToHigh	drivers/usb/musb-new/sunxi.c	/^static void USBC_ForceIdToHigh(__iomem void *base)$/;"	f	typeref:typename:void	file:
USBC_ForceIdToLow	drivers/usb/musb-new/sunxi.c	/^static void USBC_ForceIdToLow(__iomem void *base)$/;"	f	typeref:typename:void	file:
USBC_ForceVbusValidToHigh	drivers/usb/musb-new/sunxi.c	/^static void USBC_ForceVbusValidToHigh(__iomem void *base)$/;"	f	typeref:typename:void	file:
USBC_ForceVbusValidToLow	drivers/usb/musb-new/sunxi.c	/^static void USBC_ForceVbusValidToLow(__iomem void *base)$/;"	f	typeref:typename:void	file:
USBC_REG_o_ISCR	drivers/usb/musb-new/sunxi.c	/^#define  USBC_REG_o_ISCR	/;"	d	file:
USBC_REG_o_PHYBIST	drivers/usb/musb-new/sunxi.c	/^#define  USBC_REG_o_PHYBIST	/;"	d	file:
USBC_REG_o_PHYCTL	drivers/usb/musb-new/sunxi.c	/^#define  USBC_REG_o_PHYCTL	/;"	d	file:
USBC_REG_o_PHYTUNE	drivers/usb/musb-new/sunxi.c	/^#define  USBC_REG_o_PHYTUNE	/;"	d	file:
USBC_REG_o_VEND0	drivers/usb/musb-new/sunxi.c	/^#define  USBC_REG_o_VEND0	/;"	d	file:
USBC_WakeUp_ClearChangeDetect	drivers/usb/musb-new/sunxi.c	/^static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)$/;"	f	typeref:typename:u32	file:
USBD0_HS_DM	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBD0_HS_DM	/;"	d
USBD0_HS_DP	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBD0_HS_DP	/;"	d
USBD0_SS_RX	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define USBD0_SS_RX	/;"	d
USBDEV_CE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CE /;"	d
USBDEV_CS_ACK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_ACK /;"	d
USBDEV_CS_BUSY	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_BUSY /;"	d
USBDEV_CS_NAK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_NAK /;"	d
USBDEV_CS_STALL	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_STALL /;"	d
USBDEV_CS_SU	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_SU /;"	d
USBDEV_CS_TSIZE_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_TSIZE_BIT /;"	d
USBDEV_CS_TSIZE_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_CS_TSIZE_MASK /;"	d
USBDEV_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_ENABLE /;"	d
USBDEV_FSTAT_FCNT_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_FSTAT_FCNT_BIT /;"	d
USBDEV_FSTAT_FCNT_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_FSTAT_FCNT_MASK /;"	d
USBDEV_FSTAT_FLUSH	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_FSTAT_FLUSH /;"	d
USBDEV_FSTAT_OF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_FSTAT_OF /;"	d
USBDEV_FSTAT_UF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_FSTAT_UF /;"	d
USBDEV_INT_CMPLT_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_INT_CMPLT_BIT /;"	d
USBDEV_INT_CMPLT_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_INT_CMPLT_MASK /;"	d
USBDEV_INT_HF_BIT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_INT_HF_BIT /;"	d
USBDEV_INT_HF_MASK	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_INT_HF_MASK /;"	d
USBDEV_INT_SOF	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBDEV_INT_SOF /;"	d
USBDIV	arch/m68k/cpu/mcf532x/speed.c	/^#define USBDIV	/;"	d	file:
USBD_CLOSING	include/usbdevice.h	/^	USBD_CLOSING,		\/* we are currently closing *\/$/;"	e	enum:usb_device_status
USBD_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_CONFIG /;"	d
USBD_DEVICE_DESCRIPTORS	include/usbdevice.h	/^#define USBD_DEVICE_DESCRIPTORS(/;"	d
USBD_DEVICE_REQUESTS	include/usbdevice.h	/^#define USBD_DEVICE_REQUESTS(/;"	d
USBD_DEVICE_STATE	include/usbdevice.h	/^#define USBD_DEVICE_STATE(/;"	d
USBD_DEVICE_STATUS	include/usbdevice.h	/^#define USBD_DEVICE_STATUS(/;"	d
USBD_ENABLE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_ENABLE /;"	d
USBD_EP0CS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP0CS /;"	d
USBD_EP0RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP0RD /;"	d
USBD_EP0RDSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP0RDSTAT /;"	d
USBD_EP0WR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP0WR /;"	d
USBD_EP0WRSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP0WRSTAT /;"	d
USBD_EP2CS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP2CS /;"	d
USBD_EP2WR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP2WR /;"	d
USBD_EP2WRSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP2WRSTAT /;"	d
USBD_EP3CS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP3CS /;"	d
USBD_EP3WR	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP3WR /;"	d
USBD_EP3WRSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP3WRSTAT /;"	d
USBD_EP4CS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP4CS /;"	d
USBD_EP4RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP4RD /;"	d
USBD_EP4RDSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP4RDSTAT /;"	d
USBD_EP5CS	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP5CS /;"	d
USBD_EP5RD	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP5RD /;"	d
USBD_EP5RDSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_EP5RDSTAT /;"	d
USBD_EP_INT_MASK	arch/x86/include/asm/arch-quark/quark.h	/^#define USBD_EP_INT_MASK	/;"	d
USBD_EP_INT_STS	arch/x86/include/asm/arch-quark/quark.h	/^#define USBD_EP_INT_STS	/;"	d
USBD_INTEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_INTEN /;"	d
USBD_INTSTAT	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USBD_INTSTAT /;"	d
USBD_INT_MASK	arch/x86/include/asm/arch-quark/quark.h	/^#define USBD_INT_MASK	/;"	d
USBD_OK	include/usbdevice.h	/^	USBD_OK,		\/* ok to use *\/$/;"	e	enum:usb_device_status
USBD_OPENING	include/usbdevice.h	/^	USBD_OPENING,		\/* we are currently opening *\/$/;"	e	enum:usb_device_status
USBD_RACC	include/faraday/ftpmu010.h	/^	unsigned int	USBD_RACC;	\/* 0xC8 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
USBD_SUSPENDED	include/usbdevice.h	/^	USBD_SUSPENDED,		\/* we are currently suspended *\/$/;"	e	enum:usb_device_status
USBE	drivers/usb/host/r8a66597.h	/^#define	USBE	/;"	d
USBFLBASEADD	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBFLBASEADD /;"	d
USBFLBASEADD	board/mpl/common/usb_uhci.h	/^#define USBFLBASEADD /;"	d
USBFRNUM	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBFRNUM /;"	d
USBFRNUM	board/mpl/common/usb_uhci.h	/^#define USBFRNUM /;"	d
USBGENCTRL	include/usb/ehci-ci.h	/^#define USBGENCTRL	/;"	d
USBHSIC_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USBHSIC_IPS_BASE_ADDR	/;"	d
USBH_BASE	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_BASE	/;"	d
USBH_BURSTSIZE	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_BURSTSIZE(/;"	d
USBH_BURSTSIZE_OFFS	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_BURSTSIZE_OFFS	/;"	d
USBH_CAPLENGTH	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_CAPLENGTH(/;"	d
USBH_CAPLENGTH_OFFS	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_CAPLENGTH_OFFS	/;"	d
USBH_ENABLE_BE	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define USBH_ENABLE_BE /;"	d	file:
USBH_ENABLE_C	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define USBH_ENABLE_C /;"	d	file:
USBH_ENABLE_CE	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define USBH_ENABLE_CE /;"	d	file:
USBH_ENABLE_E	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define USBH_ENABLE_E /;"	d	file:
USBH_ENABLE_INIT	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define USBH_ENABLE_INIT /;"	d	file:
USBH_ENABLE_RD	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define USBH_ENABLE_RD /;"	d	file:
USBH_INTAEN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define USBH_INTAEN	/;"	d
USBH_INTBEN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define USBH_INTBEN	/;"	d
USBH_PMEEN	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define USBH_PMEEN	/;"	d
USBH_RST	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define USBH_RST	/;"	d
USBH_USBCMD	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_USBCMD(/;"	d
USBH_USBCMD_OFFS	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_USBCMD_OFFS	/;"	d
USBH_USBHMISC	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_USBHMISC(/;"	d
USBH_USBHMISC_OFFS	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_USBHMISC_OFFS	/;"	d
USBH_USBMODE	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_USBMODE(/;"	d
USBH_USBMODE_OFFS	board/micronas/vct/vcth/reg_usbh.h	/^#define USBH_USBMODE_OFFS	/;"	d
USBINDX	drivers/usb/host/r8a66597.h	/^#define USBINDX	/;"	d
USBINTR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBINTR	/;"	d
USBINTR	board/mpl/common/usb_uhci.h	/^#define USBINTR	/;"	d
USBINTR_IOC	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBINTR_IOC /;"	d
USBINTR_IOC	board/mpl/common/usb_uhci.h	/^#define   USBINTR_IOC /;"	d
USBINTR_RESUME	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBINTR_RESUME /;"	d
USBINTR_RESUME	board/mpl/common/usb_uhci.h	/^#define   USBINTR_RESUME /;"	d
USBINTR_SP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBINTR_SP /;"	d
USBINTR_SP	board/mpl/common/usb_uhci.h	/^#define   USBINTR_SP /;"	d
USBINTR_TIMEOUT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBINTR_TIMEOUT /;"	d
USBINTR_TIMEOUT	board/mpl/common/usb_uhci.h	/^#define   USBINTR_TIMEOUT /;"	d
USBLEGSUP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBLEGSUP /;"	d
USBLEGSUP	board/mpl/common/usb_uhci.h	/^#define USBLEGSUP /;"	d
USBLEGSUP_DEFAULT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBLEGSUP_DEFAULT /;"	d
USBLEGSUP_DEFAULT	board/mpl/common/usb_uhci.h	/^#define USBLEGSUP_DEFAULT /;"	d
USBLENG	drivers/usb/host/r8a66597.h	/^#define USBLENG	/;"	d
USBMODE	drivers/usb/host/ehci.h	/^#define USBMODE	/;"	d
USBMODE_BE	drivers/usb/host/ehci.h	/^#define USBMODE_BE	/;"	d
USBMODE_CM_HC	drivers/usb/host/ehci.h	/^#define USBMODE_CM_HC	/;"	d
USBMODE_CM_IDLE	drivers/usb/host/ehci.h	/^#define USBMODE_CM_IDLE	/;"	d
USBMODE_DEVICE	drivers/usb/gadget/ci_udc.h	/^#define USBMODE_DEVICE	/;"	d
USBMODE_RESERVED_2	include/usb/ehci-ci.h	/^#define USBMODE_RESERVED_2	/;"	d
USBMODE_SDIS	drivers/usb/host/ehci.h	/^#define USBMODE_SDIS	/;"	d
USBMUX_SEL_MASK	board/freescale/bsc9132qds/bsc9132qds.c	/^#define USBMUX_SEL_MASK	/;"	d	file:
USBMUX_SEL_UART2	board/freescale/bsc9132qds/bsc9132qds.c	/^#define USBMUX_SEL_UART2	/;"	d	file:
USBMUX_SEL_USB	board/freescale/bsc9132qds/bsc9132qds.c	/^#define USBMUX_SEL_USB	/;"	d	file:
USBNC_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USBNC_OFFSET	/;"	d	file:
USBNC_PHYCFG2_ACAENB	drivers/usb/host/ehci-mx6.c	/^#define USBNC_PHYCFG2_ACAENB	/;"	d	file:
USBNC_PHYSTATUS_ID_DIG	drivers/usb/host/ehci-mx6.c	/^#define USBNC_PHYSTATUS_ID_DIG	/;"	d	file:
USBNC_USB_H1_PWR_POL	board/compulab/cm_fx6/cm_fx6.c	/^#define USBNC_USB_H1_PWR_POL	/;"	d	file:
USBOH2_PL301_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USBOH2_PL301_IPS_BASE_ADDR /;"	d
USBOTG0	arch/powerpc/dts/canyonlands.dts	/^		USBOTG0: usbotg@bff80000 {$/;"	l
USBOTG1_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USBOTG1_IPS_BASE_ADDR	/;"	d
USBOTG2_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USBOTG2_IPS_BASE_ADDR	/;"	d
USBOTGHS_CONTROL_AVALID	drivers/usb/musb-new/omap2430.h	/^#define USBOTGHS_CONTROL_AVALID	/;"	d
USBOTGHS_CONTROL_IDDIG	drivers/usb/musb-new/omap2430.h	/^#define USBOTGHS_CONTROL_IDDIG	/;"	d
USBOTGHS_CONTROL_VBUSVALID	drivers/usb/musb-new/omap2430.h	/^#define USBOTGHS_CONTROL_VBUSVALID	/;"	d
USBOTGSSX_CLKCTRL_MODULE_EN	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USBOTGSSX_CLKCTRL_MODULE_EN	/;"	d
USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define	USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960	/;"	d
USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 /;"	d
USBOTGSS_COREIRQ_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_COREIRQ_EN	/;"	d	file:
USBOTGSS_COREIRQ_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_COREIRQ_EN	/;"	d
USBOTGSS_COREIRQ_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_COREIRQ_EN	/;"	d
USBOTGSS_DEBUG_CFG	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_DEBUG_CFG	/;"	d	file:
USBOTGSS_DEBUG_DATA	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_DEBUG_DATA	/;"	d	file:
USBOTGSS_DEBUG_OFFSET	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_DEBUG_OFFSET	/;"	d	file:
USBOTGSS_DEV_EBC_EN	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_DEV_EBC_EN	/;"	d	file:
USBOTGSS_DMADISABLE	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_DMADISABLE /;"	d	file:
USBOTGSS_DMADISABLE	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_DMADISABLE /;"	d
USBOTGSS_DMADISABLE	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_DMADISABLE /;"	d
USBOTGSS_EOI_OFFSET	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_EOI_OFFSET	/;"	d	file:
USBOTGSS_FLADJ	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_FLADJ	/;"	d	file:
USBOTGSS_IDLEMODE_NOIDLE	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IDLEMODE_NOIDLE /;"	d	file:
USBOTGSS_IDLEMODE_NOIDLE	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IDLEMODE_NOIDLE /;"	d
USBOTGSS_IDLEMODE_NOIDLE	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IDLEMODE_NOIDLE /;"	d
USBOTGSS_IDLEMODE_SMRT	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IDLEMODE_SMRT /;"	d	file:
USBOTGSS_IDLEMODE_SMRT	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IDLEMODE_SMRT /;"	d
USBOTGSS_IDLEMODE_SMRT	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IDLEMODE_SMRT /;"	d
USBOTGSS_IDLEMODE_SMRT_WKUP	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IDLEMODE_SMRT_WKUP /;"	d	file:
USBOTGSS_IDLEMODE_SMRT_WKUP	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IDLEMODE_SMRT_WKUP /;"	d
USBOTGSS_IDLEMODE_SMRT_WKUP	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IDLEMODE_SMRT_WKUP /;"	d
USBOTGSS_INTERRUPTS	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_INTERRUPTS /;"	d	file:
USBOTGSS_INT_CLR	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define USBOTGSS_INT_CLR	/;"	d
USBOTGSS_IRQ0_OFFSET	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQ0_OFFSET	/;"	d	file:
USBOTGSS_IRQENABLE_CLR_0	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_CLR_0	/;"	d	file:
USBOTGSS_IRQENABLE_CLR_1	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_CLR_1	/;"	d	file:
USBOTGSS_IRQENABLE_CLR_2	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_CLR_2	/;"	d	file:
USBOTGSS_IRQENABLE_CLR_3	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_CLR_3	/;"	d	file:
USBOTGSS_IRQENABLE_CLR_MISC	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_CLR_MISC	/;"	d	file:
USBOTGSS_IRQENABLE_SET_0	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_SET_0	/;"	d	file:
USBOTGSS_IRQENABLE_SET_1	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_SET_1	/;"	d	file:
USBOTGSS_IRQENABLE_SET_2	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_SET_2	/;"	d	file:
USBOTGSS_IRQENABLE_SET_3	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_SET_3	/;"	d	file:
USBOTGSS_IRQENABLE_SET_MISC	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQENABLE_SET_MISC	/;"	d	file:
USBOTGSS_IRQMISC_CHRGVBUS_FALL	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_CHRGVBUS_FALL	/;"	d	file:
USBOTGSS_IRQMISC_CHRGVBUS_RISE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_CHRGVBUS_RISE	/;"	d	file:
USBOTGSS_IRQMISC_DISCHRGVBUS_FALL	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_DISCHRGVBUS_FALL	/;"	d	file:
USBOTGSS_IRQMISC_DISCHRGVBUS_RISE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_DISCHRGVBUS_RISE	/;"	d	file:
USBOTGSS_IRQMISC_DMADISABLECLR	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_DMADISABLECLR	/;"	d	file:
USBOTGSS_IRQMISC_DRVVBUS_FALL	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_DRVVBUS_FALL	/;"	d	file:
USBOTGSS_IRQMISC_DRVVBUS_RISE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_DRVVBUS_RISE	/;"	d	file:
USBOTGSS_IRQMISC_IDPULLUP_FALL	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_IDPULLUP_FALL	/;"	d	file:
USBOTGSS_IRQMISC_IDPULLUP_RISE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_IDPULLUP_RISE	/;"	d	file:
USBOTGSS_IRQMISC_OEVT	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_OEVT	/;"	d	file:
USBOTGSS_IRQMISC_OFFSET	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQMISC_OFFSET	/;"	d	file:
USBOTGSS_IRQO_COREIRQ_ST	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQO_COREIRQ_ST	/;"	d	file:
USBOTGSS_IRQSTATUS_0	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_0	/;"	d	file:
USBOTGSS_IRQSTATUS_1	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_1	/;"	d	file:
USBOTGSS_IRQSTATUS_2	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_2	/;"	d	file:
USBOTGSS_IRQSTATUS_3	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_3	/;"	d	file:
USBOTGSS_IRQSTATUS_EOI_MISC	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_EOI_MISC	/;"	d	file:
USBOTGSS_IRQSTATUS_MISC	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_MISC	/;"	d	file:
USBOTGSS_IRQSTATUS_RAW_0	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_RAW_0	/;"	d	file:
USBOTGSS_IRQSTATUS_RAW_1	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_RAW_1	/;"	d	file:
USBOTGSS_IRQSTATUS_RAW_2	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_RAW_2	/;"	d	file:
USBOTGSS_IRQSTATUS_RAW_3	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_RAW_3	/;"	d	file:
USBOTGSS_IRQSTATUS_RAW_MISC	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQSTATUS_RAW_MISC	/;"	d	file:
USBOTGSS_IRQ_EOI	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQ_EOI	/;"	d	file:
USBOTGSS_IRQ_EOI_LINE_NUMBER	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_IRQ_EOI_LINE_NUMBER	/;"	d	file:
USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	/;"	d
USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	/;"	d
USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	/;"	d
USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN	/;"	d
USBOTGSS_IRQ_SET_1_OEVT_EN	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_IRQ_SET_1_OEVT_EN	/;"	d	file:
USBOTGSS_IRQ_SET_1_OEVT_EN	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_IRQ_SET_1_OEVT_EN	/;"	d
USBOTGSS_IRQ_SET_1_OEVT_EN	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_IRQ_SET_1_OEVT_EN	/;"	d
USBOTGSS_MMRAM_OFFSET	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_MMRAM_OFFSET	/;"	d	file:
USBOTGSS_REVISION	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_REVISION	/;"	d	file:
USBOTGSS_RXFIFO_DEPTH	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_RXFIFO_DEPTH	/;"	d	file:
USBOTGSS_STANDBYMODE_NO_STANDBY	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_STANDBYMODE_NO_STANDBY /;"	d	file:
USBOTGSS_STANDBYMODE_NO_STANDBY	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_STANDBYMODE_NO_STANDBY /;"	d
USBOTGSS_STANDBYMODE_NO_STANDBY	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_STANDBYMODE_NO_STANDBY /;"	d
USBOTGSS_STANDBYMODE_SMRT	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_STANDBYMODE_SMRT	/;"	d	file:
USBOTGSS_STANDBYMODE_SMRT	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_STANDBYMODE_SMRT	/;"	d
USBOTGSS_STANDBYMODE_SMRT	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_STANDBYMODE_SMRT	/;"	d
USBOTGSS_STANDBYMODE_SMRT_WKUP	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_STANDBYMODE_SMRT_WKUP /;"	d	file:
USBOTGSS_STANDBYMODE_SMRT_WKUP	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_STANDBYMODE_SMRT_WKUP /;"	d
USBOTGSS_STANDBYMODE_SMRT_WKUP	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_STANDBYMODE_SMRT_WKUP /;"	d
USBOTGSS_SW_RST	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define USBOTGSS_SW_RST	/;"	d
USBOTGSS_SYSCONFIG	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_SYSCONFIG	/;"	d	file:
USBOTGSS_SYSCONFIG_DMADISABLE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_SYSCONFIG_DMADISABLE	/;"	d	file:
USBOTGSS_TXFIFO_DEPTH	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_TXFIFO_DEPTH	/;"	d	file:
USBOTGSS_UTMI_OTG_CTRL	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_CTRL	/;"	d	file:
USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS	/;"	d	file:
USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS	/;"	d	file:
USBOTGSS_UTMI_OTG_CTRL_DRVVBUS	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_CTRL_DRVVBUS	/;"	d	file:
USBOTGSS_UTMI_OTG_CTRL_IDPULLUP	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_CTRL_IDPULLUP	/;"	d	file:
USBOTGSS_UTMI_OTG_OFFSET	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_OFFSET	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_IDDIG	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_IDDIG	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_SESSEND	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_SESSEND	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_SESSVALID	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_SW_MODE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE	/;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE /;"	d	file:
USBOTGSS_UTMI_OTG_STATUS_VBUSVALID	drivers/usb/dwc3/dwc3-omap.c	/^#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID	/;"	d	file:
USBOTGSS_WRAPRESET	drivers/usb/host/xhci-zynqmp.c	/^#define USBOTGSS_WRAPRESET	/;"	d	file:
USBOTGSS_WRAPRESET	include/linux/usb/xhci-fsl.h	/^#define USBOTGSS_WRAPRESET	/;"	d
USBOTGSS_WRAPRESET	include/linux/usb/xhci-omap.h	/^#define USBOTGSS_WRAPRESET	/;"	d
USBOTG_IN_PAD_CTRL	board/freescale/mx35pdk/mx35pdk.c	/^#define USBOTG_IN_PAD_CTRL	/;"	d	file:
USBOTG_OUT_PAD_CTRL	board/freescale/mx35pdk/mx35pdk.c	/^#define USBOTG_OUT_PAD_CTRL	/;"	d	file:
USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define	USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K	/;"	d
USBPHYOCPSCP_MODULE_EN	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USBPHYOCPSCP_MODULE_EN	/;"	d
USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	arch/arm/include/asm/arch-omap4/clock.h	/^#define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	/;"	d
USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	arch/arm/include/asm/arch-omap5/clock.h	/^#define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	/;"	d
USBPHY_CLKO1SEL	drivers/usb/musb/davinci.h	/^#define USBPHY_CLKO1SEL /;"	d
USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K	arch/arm/include/asm/arch-omap4/clock.h	/^#define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K	/;"	d
USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K	arch/arm/include/asm/arch-omap5/clock.h	/^#define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K	/;"	d
USBPHY_CTL_PADDR	drivers/usb/musb/davinci.h	/^#define USBPHY_CTL_PADDR	/;"	d
USBPHY_CTRL	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL	/;"	d
USBPHY_CTRL	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL	/;"	d	file:
USBPHY_CTRL_CLKGATE	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_CLKGATE	/;"	d
USBPHY_CTRL_CLKGATE	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_CLKGATE	/;"	d
USBPHY_CTRL_CLKGATE	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_CLKGATE	/;"	d	file:
USBPHY_CTRL_CLR	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_CLR	/;"	d
USBPHY_CTRL_CLR	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_CLR	/;"	d	file:
USBPHY_CTRL_DATA_ON_LRADC	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_DATA_ON_LRADC	/;"	d
USBPHY_CTRL_DEVPLUGIN_IRQ	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_DEVPLUGIN_IRQ	/;"	d
USBPHY_CTRL_DEVPLUGIN_POLARITY	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_DEVPLUGIN_POLARITY	/;"	d
USBPHY_CTRL_ENAUTOCLR_CLKGATE	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE	/;"	d
USBPHY_CTRL_ENAUTOCLR_PHY_PWD	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD	/;"	d
USBPHY_CTRL_ENAUTOCLR_USBCLKGATE	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENAUTOCLR_USBCLKGATE	/;"	d
USBPHY_CTRL_ENAUTOSET_USBCLKS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENAUTOSET_USBCLKS	/;"	d
USBPHY_CTRL_ENAUTO_PWRON_PLL	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENAUTO_PWRON_PLL	/;"	d
USBPHY_CTRL_ENDEVPLUGINDETECT	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENDEVPLUGINDETECT	/;"	d
USBPHY_CTRL_ENDPDMCHG_WKUP	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENDPDMCHG_WKUP	/;"	d
USBPHY_CTRL_ENHOSTDISCONDETECT	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENHOSTDISCONDETECT	/;"	d
USBPHY_CTRL_ENIDCHG_WKUP	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENIDCHG_WKUP	/;"	d
USBPHY_CTRL_ENIRQDEVPLUGIN	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENIRQDEVPLUGIN	/;"	d
USBPHY_CTRL_ENIRQHOSTDISCON	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENIRQHOSTDISCON	/;"	d
USBPHY_CTRL_ENIRQRESUMEDETECT	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENIRQRESUMEDETECT	/;"	d
USBPHY_CTRL_ENIRQWAKEUP	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENIRQWAKEUP	/;"	d
USBPHY_CTRL_ENOTGIDDETECT	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENOTGIDDETECT	/;"	d
USBPHY_CTRL_ENUTMILEVEL2	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENUTMILEVEL2	/;"	d
USBPHY_CTRL_ENUTMILEVEL2	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_ENUTMILEVEL2	/;"	d
USBPHY_CTRL_ENUTMILEVEL2	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_ENUTMILEVEL2	/;"	d	file:
USBPHY_CTRL_ENUTMILEVEL3	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENUTMILEVEL3	/;"	d
USBPHY_CTRL_ENUTMILEVEL3	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_ENUTMILEVEL3	/;"	d
USBPHY_CTRL_ENUTMILEVEL3	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_ENUTMILEVEL3	/;"	d	file:
USBPHY_CTRL_ENVBUSCHG_WKUP	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_ENVBUSCHG_WKUP	/;"	d
USBPHY_CTRL_FSDLL_RST_EN	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_FSDLL_RST_EN	/;"	d
USBPHY_CTRL_HOSTDISCONDETECT_IRQ	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ	/;"	d
USBPHY_CTRL_HOST_FORCE_LS_SE0	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_HOST_FORCE_LS_SE0	/;"	d
USBPHY_CTRL_OTG_ID	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_OTG_ID	/;"	d
USBPHY_CTRL_OTG_ID	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_OTG_ID	/;"	d	file:
USBPHY_CTRL_RESUMEIRQSTICKY	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_RESUMEIRQSTICKY	/;"	d
USBPHY_CTRL_RESUME_IRQ	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_RESUME_IRQ	/;"	d
USBPHY_CTRL_SET	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_SET	/;"	d
USBPHY_CTRL_SET	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_SET	/;"	d	file:
USBPHY_CTRL_SFTRST	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_SFTRST	/;"	d
USBPHY_CTRL_SFTRST	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_SFTRST	/;"	d
USBPHY_CTRL_SFTRST	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_SFTRST	/;"	d	file:
USBPHY_CTRL_TOG	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_CTRL_TOG	/;"	d
USBPHY_CTRL_TOG	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_CTRL_TOG	/;"	d	file:
USBPHY_CTRL_UTMI_SUSPENDM	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_UTMI_SUSPENDM	/;"	d
USBPHY_CTRL_WAKEUP_IRQ	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_CTRL_WAKEUP_IRQ	/;"	d
USBPHY_DEBUG	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_DEBUG	/;"	d
USBPHY_DEBUG0_STATUS_LOOP_BACK_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_MASK	/;"	d
USBPHY_DEBUG0_STATUS_LOOP_BACK_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_OFFSET	/;"	d
USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK	/;"	d
USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_OFFSET	/;"	d
USBPHY_DEBUG0_STATUS_UTMI_RXERROR_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_MASK	/;"	d
USBPHY_DEBUG0_STATUS_UTMI_RXERROR_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_OFFSET	/;"	d
USBPHY_DEBUG1_DBG_ADDRESS_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG1_DBG_ADDRESS_MASK	/;"	d
USBPHY_DEBUG1_DBG_ADDRESS_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG1_DBG_ADDRESS_OFFSET	/;"	d
USBPHY_DEBUG1_ENTAILADJVD_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG1_ENTAILADJVD_MASK	/;"	d
USBPHY_DEBUG1_ENTAILADJVD_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG1_ENTAILADJVD_OFFSET	/;"	d
USBPHY_DEBUG1_ENTX2TX	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG1_ENTX2TX	/;"	d
USBPHY_DEBUG_CLKGATE	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_CLKGATE	/;"	d
USBPHY_DEBUG_DEBUG_INTERFACE_HOLD	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD	/;"	d
USBPHY_DEBUG_ENHSTPULLDOWN_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_ENHSTPULLDOWN_MASK	/;"	d
USBPHY_DEBUG_ENHSTPULLDOWN_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_ENHSTPULLDOWN_OFFSET	/;"	d
USBPHY_DEBUG_ENSQUELCHRESET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_ENSQUELCHRESET	/;"	d
USBPHY_DEBUG_ENTX2RXCOUNT	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_ENTX2RXCOUNT	/;"	d
USBPHY_DEBUG_HOST_RESUME_DEBUG	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_HOST_RESUME_DEBUG	/;"	d
USBPHY_DEBUG_HSTPULLDOWN_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_HSTPULLDOWN_MASK	/;"	d
USBPHY_DEBUG_HSTPULLDOWN_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_HSTPULLDOWN_OFFSET	/;"	d
USBPHY_DEBUG_OTGIDPIDLOCK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_OTGIDPIDLOCK	/;"	d
USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK	/;"	d
USBPHY_DEBUG_SQUELCHRESETCOUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_SQUELCHRESETCOUNT_OFFSET	/;"	d
USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK	/;"	d
USBPHY_DEBUG_SQUELCHRESETLENGTH_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_SQUELCHRESETLENGTH_OFFSET	/;"	d
USBPHY_DEBUG_TX2RXCOUNT_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_TX2RXCOUNT_MASK	/;"	d
USBPHY_DEBUG_TX2RXCOUNT_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_DEBUG_TX2RXCOUNT_OFFSET	/;"	d
USBPHY_IP_ANALOG_TESTMODE	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_ANALOG_TESTMODE	/;"	d
USBPHY_IP_CP_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_CP_SEL_MASK	/;"	d
USBPHY_IP_CP_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_CP_SEL_OFFSET	/;"	d
USBPHY_IP_DIV_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_DIV_SEL_MASK	/;"	d
USBPHY_IP_DIV_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_DIV_SEL_OFFSET	/;"	d
USBPHY_IP_EN_USB_CLKS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_EN_USB_CLKS	/;"	d
USBPHY_IP_LFR_SEL_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_LFR_SEL_MASK	/;"	d
USBPHY_IP_LFR_SEL_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_LFR_SEL_OFFSET	/;"	d
USBPHY_IP_PLL_LOCKED	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_PLL_LOCKED	/;"	d
USBPHY_IP_PLL_POWER	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_PLL_POWER	/;"	d
USBPHY_IP_TSTI_TX_DM	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_TSTI_TX_DM	/;"	d
USBPHY_IP_TSTI_TX_DP	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_IP_TSTI_TX_DP	/;"	d
USBPHY_OSCPDWN	drivers/usb/musb/davinci.h	/^#define USBPHY_OSCPDWN	/;"	d
USBPHY_PHY24MHZ	drivers/usb/musb/davinci.h	/^#define USBPHY_PHY24MHZ /;"	d
USBPHY_PHYCLKGD	drivers/usb/musb/davinci.h	/^#define USBPHY_PHYCLKGD /;"	d
USBPHY_PHYPDWN	drivers/usb/musb/davinci.h	/^#define USBPHY_PHYPDWN	/;"	d
USBPHY_PHYPLLON	drivers/usb/musb/davinci.h	/^#define USBPHY_PHYPLLON /;"	d
USBPHY_PWD	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_PWD	/;"	d
USBPHY_PWD	drivers/usb/host/ehci-mx6.c	/^#define USBPHY_PWD	/;"	d	file:
USBPHY_PWD_RXPWD1PT1	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_RXPWD1PT1	/;"	d
USBPHY_PWD_RXPWDDIFF	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_RXPWDDIFF	/;"	d
USBPHY_PWD_RXPWDENV	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_RXPWDENV	/;"	d
USBPHY_PWD_RXPWDRX	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_RXPWDRX	/;"	d
USBPHY_PWD_TXPWDFS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_TXPWDFS	/;"	d
USBPHY_PWD_TXPWDIBIAS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_TXPWDIBIAS	/;"	d
USBPHY_PWD_TXPWDV2I	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_PWD_TXPWDV2I	/;"	d
USBPHY_RX	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_RX	/;"	d
USBPHY_RX_DISCONADJ_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_RX_DISCONADJ_MASK	/;"	d
USBPHY_RX_DISCONADJ_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_RX_DISCONADJ_OFFSET	/;"	d
USBPHY_RX_ENVADJ_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_RX_ENVADJ_MASK	/;"	d
USBPHY_RX_ENVADJ_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_RX_ENVADJ_OFFSET	/;"	d
USBPHY_RX_RXDBYPASS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_RX_RXDBYPASS	/;"	d
USBPHY_SESNDEN	drivers/usb/musb/davinci.h	/^#define USBPHY_SESNDEN	/;"	d
USBPHY_STATUS_DEVPLUGIN_STATUS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_STATUS_DEVPLUGIN_STATUS	/;"	d
USBPHY_STATUS_HOSTDISCONDETECT_STATUS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS	/;"	d
USBPHY_STATUS_OTGID_STATUS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_STATUS_OTGID_STATUS	/;"	d
USBPHY_STATUS_RESUME_STATUS	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_STATUS_RESUME_STATUS	/;"	d
USBPHY_TX	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define USBPHY_TX	/;"	d
USBPHY_TX_D_CAL_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_D_CAL_MASK	/;"	d
USBPHY_TX_D_CAL_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_D_CAL_OFFSET	/;"	d
USBPHY_TX_TXCAL45DM_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_TXCAL45DM_MASK	/;"	d
USBPHY_TX_TXCAL45DM_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_TXCAL45DM_OFFSET	/;"	d
USBPHY_TX_TXCAL45DP_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_TXCAL45DP_MASK	/;"	d
USBPHY_TX_TXCAL45DP_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_TXCAL45DP_OFFSET	/;"	d
USBPHY_TX_TXENCAL45DM	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_TXENCAL45DM	/;"	d
USBPHY_TX_TXENCAL45DP	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_TXENCAL45DP	/;"	d
USBPHY_TX_USBPHY_TX_EDGECTRL_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_USBPHY_TX_EDGECTRL_MASK	/;"	d
USBPHY_TX_USBPHY_TX_EDGECTRL_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_USBPHY_TX_EDGECTRL_OFFSET	/;"	d
USBPHY_TX_USBPHY_TX_SYNC_INVERT	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_USBPHY_TX_SYNC_INVERT	/;"	d
USBPHY_TX_USBPHY_TX_SYNC_MUX	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_TX_USBPHY_TX_SYNC_MUX	/;"	d
USBPHY_VBDTCTEN	drivers/usb/musb/davinci.h	/^#define USBPHY_VBDTCTEN /;"	d
USBPHY_VERSION_MAJOR_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_VERSION_MAJOR_MASK	/;"	d
USBPHY_VERSION_MAJOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_VERSION_MAJOR_OFFSET	/;"	d
USBPHY_VERSION_MINOR_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_VERSION_MINOR_MASK	/;"	d
USBPHY_VERSION_MINOR_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_VERSION_MINOR_OFFSET	/;"	d
USBPHY_VERSION_STEP_MASK	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_VERSION_STEP_MASK	/;"	d
USBPHY_VERSION_STEP_OFFSET	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define	USBPHY_VERSION_STEP_OFFSET	/;"	d
USBPORTSC1	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBPORTSC1	/;"	d
USBPORTSC1	board/mpl/common/usb_uhci.h	/^#define USBPORTSC1	/;"	d
USBPORTSC2	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBPORTSC2	/;"	d
USBPORTSC2	board/mpl/common/usb_uhci.h	/^#define USBPORTSC2	/;"	d
USBPORTSC_CCS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_CCS /;"	d
USBPORTSC_CCS	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_CCS /;"	d
USBPORTSC_CSC	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_CSC /;"	d
USBPORTSC_CSC	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_CSC /;"	d
USBPORTSC_LS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_LS /;"	d
USBPORTSC_LS	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_LS /;"	d
USBPORTSC_LSDA	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_LSDA /;"	d
USBPORTSC_LSDA	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_LSDA /;"	d
USBPORTSC_PE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_PE /;"	d
USBPORTSC_PE	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_PE /;"	d
USBPORTSC_PEC	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_PEC /;"	d
USBPORTSC_PEC	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_PEC /;"	d
USBPORTSC_PR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_PR /;"	d
USBPORTSC_PR	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_PR /;"	d
USBPORTSC_RD	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_RD /;"	d
USBPORTSC_RD	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_RD /;"	d
USBPORTSC_SUSP	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBPORTSC_SUSP /;"	d
USBPORTSC_SUSP	board/mpl/common/usb_uhci.h	/^#define   USBPORTSC_SUSP /;"	d
USBREQ	drivers/usb/host/r8a66597.h	/^#define USBREQ	/;"	d
USBRST	drivers/usb/host/r8a66597.h	/^#define	USBRST	/;"	d
USBSOF	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBSOF /;"	d
USBSOF	board/mpl/common/usb_uhci.h	/^#define USBSOF /;"	d
USBSPD	drivers/usb/host/r8a66597.h	/^#define	USBSPD	/;"	d
USBSTS	arch/sparc/cpu/leon3/usb_uhci.h	/^#define USBSTS	/;"	d
USBSTS	board/mpl/common/usb_uhci.h	/^#define USBSTS	/;"	d
USBSTS_ERROR	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBSTS_ERROR /;"	d
USBSTS_ERROR	board/mpl/common/usb_uhci.h	/^#define   USBSTS_ERROR /;"	d
USBSTS_HCH	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBSTS_HCH /;"	d
USBSTS_HCH	board/mpl/common/usb_uhci.h	/^#define   USBSTS_HCH /;"	d
USBSTS_HCPE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBSTS_HCPE /;"	d
USBSTS_HCPE	board/mpl/common/usb_uhci.h	/^#define   USBSTS_HCPE /;"	d
USBSTS_HSE	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBSTS_HSE /;"	d
USBSTS_HSE	board/mpl/common/usb_uhci.h	/^#define   USBSTS_HSE /;"	d
USBSTS_RD	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBSTS_RD /;"	d
USBSTS_RD	board/mpl/common/usb_uhci.h	/^#define   USBSTS_RD /;"	d
USBSTS_USBINT	arch/sparc/cpu/leon3/usb_uhci.h	/^#define   USBSTS_USBINT /;"	d
USBSTS_USBINT	board/mpl/common/usb_uhci.h	/^#define   USBSTS_USBINT /;"	d
USBS_IDLE	include/usb/mpc8xx_udc.h	/^#define USBS_IDLE	/;"	d
USBTTY_BCD_DEVICE	drivers/serial/usbtty.h	/^#define USBTTY_BCD_DEVICE	/;"	d
USBTTY_BUFFER_SIZE	drivers/serial/usbtty.c	/^#define USBTTY_BUFFER_SIZE /;"	d	file:
USBTTY_DEVICE_CLASS	drivers/serial/usbtty.h	/^#define USBTTY_DEVICE_CLASS	/;"	d
USBTTY_MAXPOWER	drivers/serial/usbtty.h	/^#define USBTTY_MAXPOWER	/;"	d
USBVAL	drivers/usb/host/r8a66597.h	/^#define USBVAL	/;"	d
USBWE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define USBWE	/;"	d
USB_2_0_DEVICE	include/configs/PMC440.h	/^#define USB_2_0_DEVICE$/;"	d
USB_2_0_DEVICE	include/configs/bamboo.h	/^#define USB_2_0_DEVICE$/;"	d
USB_2_0_DEVICE	include/configs/sequoia.h	/^#define USB_2_0_DEVICE$/;"	d
USB_2_0_DEVICE	include/configs/yosemite.h	/^#define USB_2_0_DEVICE$/;"	d
USB_5GBPS_OPERATION	include/linux/usb/ch9.h	/^#define USB_5GBPS_OPERATION	/;"	d
USB_AFE_CTRL2	drivers/usb/eth/r8152.h	/^#define USB_AFE_CTRL2	/;"	d
USB_ALTSETTINGALLOC	include/usb.h	/^#define USB_ALTSETTINGALLOC	/;"	d
USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_APHY_CALIB /;"	d
USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_APHY_CALIB /;"	d
USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_APHY_CALIB /;"	d
USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_APHY_CALIB /;"	d
USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_APHY_CALIB /;"	d
USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_APHY_CNTRL /;"	d
USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_APHY_CNTRL /;"	d
USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_APHY_CNTRL /;"	d
USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_APHY_CNTRL /;"	d
USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_APHY_CNTRL /;"	d
USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_APHY_CNTRL2 /;"	d
USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_APHY_CNTRL2 /;"	d
USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_APHY_CNTRL2 /;"	d
USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_APHY_CNTRL2 /;"	d
USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_APHY_CNTRL2 /;"	d
USB_AUTOREQ_REG	drivers/usb/musb-new/am35x.c	/^#define USB_AUTOREQ_REG	/;"	d	file:
USB_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define USB_BASE	/;"	d
USB_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define USB_BASE	/;"	d
USB_BASE	drivers/usb/musb-new/musb_regs.h	/^#define USB_BASE	/;"	d
USB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USB_BASE_ADDR /;"	d
USB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USB_BASE_ADDR /;"	d
USB_BCD_VERSION	include/usbdevice.h	/^#define USB_BCD_VERSION	/;"	d
USB_BESL_BASELINE_VALID	include/linux/usb/ch9.h	/^#define USB_BESL_BASELINE_VALID	/;"	d
USB_BESL_DEEP_VALID	include/linux/usb/ch9.h	/^#define USB_BESL_DEEP_VALID	/;"	d
USB_BESL_SUPPORT	include/linux/usb/ch9.h	/^#define USB_BESL_SUPPORT	/;"	d
USB_BOOT_SUPPORTED	include/configs/x600.h	/^#define USB_BOOT_SUPPORTED	/;"	d
USB_BP_0	drivers/usb/eth/r8152.h	/^#define USB_BP_0	/;"	d
USB_BP_1	drivers/usb/eth/r8152.h	/^#define USB_BP_1	/;"	d
USB_BP_2	drivers/usb/eth/r8152.h	/^#define USB_BP_2	/;"	d
USB_BP_3	drivers/usb/eth/r8152.h	/^#define USB_BP_3	/;"	d
USB_BP_4	drivers/usb/eth/r8152.h	/^#define USB_BP_4	/;"	d
USB_BP_5	drivers/usb/eth/r8152.h	/^#define USB_BP_5	/;"	d
USB_BP_6	drivers/usb/eth/r8152.h	/^#define USB_BP_6	/;"	d
USB_BP_7	drivers/usb/eth/r8152.h	/^#define USB_BP_7	/;"	d
USB_BP_BA	drivers/usb/eth/r8152.h	/^#define USB_BP_BA	/;"	d
USB_BP_EN	drivers/usb/eth/r8152.h	/^#define USB_BP_EN	/;"	d
USB_BUFSIZ	common/usb.c	/^#define USB_BUFSIZ	/;"	d	file:
USB_BUFSIZ	common/usb_hub.c	/^#define USB_BUFSIZ	/;"	d	file:
USB_BUFSIZ	drivers/usb/gadget/composite.c	/^#define USB_BUFSIZ	/;"	d	file:
USB_BUFSIZ	drivers/usb/gadget/ether.c	/^#define USB_BUFSIZ	/;"	d	file:
USB_BULK	include/usb_defs.h	/^#define USB_BULK /;"	d
USB_BULK_CB_SIG	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_CB_SIG	/;"	d	file:
USB_BULK_CB_WRAP_LEN	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_CB_WRAP_LEN	/;"	d	file:
USB_BULK_CS_SIG	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_CS_SIG	/;"	d	file:
USB_BULK_CS_WRAP_LEN	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_CS_WRAP_LEN	/;"	d	file:
USB_BULK_GET_MAX_LUN_REQUEST	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_GET_MAX_LUN_REQUEST	/;"	d	file:
USB_BULK_IN_FLAG	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_IN_FLAG	/;"	d	file:
USB_BULK_RECV_TIMEOUT	drivers/usb/eth/asix.c	/^#define USB_BULK_RECV_TIMEOUT /;"	d	file:
USB_BULK_RECV_TIMEOUT	drivers/usb/eth/asix88179.c	/^#define USB_BULK_RECV_TIMEOUT /;"	d	file:
USB_BULK_RECV_TIMEOUT	drivers/usb/eth/r8152.h	/^#define USB_BULK_RECV_TIMEOUT /;"	d
USB_BULK_RECV_TIMEOUT	drivers/usb/eth/smsc95xx.c	/^#define USB_BULK_RECV_TIMEOUT /;"	d	file:
USB_BULK_RECV_TIMEOUT	drivers/usb/eth/usb_ether.c	/^#define USB_BULK_RECV_TIMEOUT /;"	d	file:
USB_BULK_RESET_REQUEST	drivers/usb/gadget/storage_common.c	/^#define USB_BULK_RESET_REQUEST	/;"	d	file:
USB_BULK_SEND_TIMEOUT	drivers/usb/eth/asix.c	/^#define USB_BULK_SEND_TIMEOUT /;"	d	file:
USB_BULK_SEND_TIMEOUT	drivers/usb/eth/asix88179.c	/^#define USB_BULK_SEND_TIMEOUT /;"	d	file:
USB_BULK_SEND_TIMEOUT	drivers/usb/eth/r8152.h	/^#define USB_BULK_SEND_TIMEOUT /;"	d
USB_BULK_SEND_TIMEOUT	drivers/usb/eth/smsc95xx.c	/^#define USB_BULK_SEND_TIMEOUT /;"	d	file:
USB_BURST_SIZE	drivers/usb/eth/r8152.h	/^#define USB_BURST_SIZE	/;"	d
USB_CAP_TYPE_EXT	include/linux/usb/ch9.h	/^#define	USB_CAP_TYPE_EXT	/;"	d
USB_CAP_TYPE_WIRELESS_USB	include/linux/usb/ch9.h	/^#define	USB_CAP_TYPE_WIRELESS_USB	/;"	d
USB_CBI_ADSC_REQUEST	drivers/usb/gadget/storage_common.c	/^#define USB_CBI_ADSC_REQUEST	/;"	d	file:
USB_CDC_1_5_STOP_BITS	include/linux/usb/cdc.h	/^#define USB_CDC_1_5_STOP_BITS	/;"	d
USB_CDC_1_STOP_BITS	include/linux/usb/cdc.h	/^#define USB_CDC_1_STOP_BITS	/;"	d
USB_CDC_2_STOP_BITS	include/linux/usb/cdc.h	/^#define USB_CDC_2_STOP_BITS	/;"	d
USB_CDC_ACM_PROTO_AT_3G	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_AT_3G	/;"	d
USB_CDC_ACM_PROTO_AT_CDMA	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_AT_CDMA	/;"	d
USB_CDC_ACM_PROTO_AT_GSM	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_AT_GSM	/;"	d
USB_CDC_ACM_PROTO_AT_PCCA101	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_AT_PCCA101	/;"	d
USB_CDC_ACM_PROTO_AT_PCCA101_WAKE	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_AT_PCCA101_WAKE	/;"	d
USB_CDC_ACM_PROTO_AT_V25TER	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_AT_V25TER	/;"	d
USB_CDC_ACM_PROTO_VENDOR	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_PROTO_VENDOR	/;"	d
USB_CDC_ACM_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_ACM_TYPE	/;"	d
USB_CDC_CALL_MANAGEMENT_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_CALL_MANAGEMENT_TYPE	/;"	d
USB_CDC_CALL_MGMT_CAP_CALL_MGMT	include/linux/usb/cdc.h	/^#define USB_CDC_CALL_MGMT_CAP_CALL_MGMT	/;"	d
USB_CDC_CALL_MGMT_CAP_DATA_INTF	include/linux/usb/cdc.h	/^#define USB_CDC_CALL_MGMT_CAP_DATA_INTF	/;"	d
USB_CDC_CAP_BRK	include/linux/usb/cdc.h	/^#define USB_CDC_CAP_BRK	/;"	d
USB_CDC_CAP_LINE	include/linux/usb/cdc.h	/^#define USB_CDC_CAP_LINE	/;"	d
USB_CDC_CAP_NOTIFY	include/linux/usb/cdc.h	/^#define USB_CDC_CAP_NOTIFY	/;"	d
USB_CDC_COMM_FEATURE	include/linux/usb/cdc.h	/^#define USB_CDC_COMM_FEATURE	/;"	d
USB_CDC_COUNTRY_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_COUNTRY_TYPE	/;"	d
USB_CDC_DMM_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_DMM_TYPE	/;"	d
USB_CDC_ETHERNET_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_ETHERNET_TYPE	/;"	d
USB_CDC_EVEN_PARITY	include/linux/usb/cdc.h	/^#define USB_CDC_EVEN_PARITY	/;"	d
USB_CDC_GET_ENCAPSULATED_RESPONSE	include/linux/usb/cdc.h	/^#define USB_CDC_GET_ENCAPSULATED_RESPONSE	/;"	d
USB_CDC_GET_ETHERNET_PM_PATTERN_FILTER	include/linux/usb/cdc.h	/^#define USB_CDC_GET_ETHERNET_PM_PATTERN_FILTER	/;"	d
USB_CDC_GET_ETHERNET_STATISTIC	include/linux/usb/cdc.h	/^#define USB_CDC_GET_ETHERNET_STATISTIC	/;"	d
USB_CDC_HEADER_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_HEADER_TYPE	/;"	d
USB_CDC_MARK_PARITY	include/linux/usb/cdc.h	/^#define USB_CDC_MARK_PARITY	/;"	d
USB_CDC_MDLM_DETAIL_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_MDLM_DETAIL_TYPE	/;"	d
USB_CDC_MDLM_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_MDLM_TYPE	/;"	d
USB_CDC_NETWORK_TERMINAL_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_NETWORK_TERMINAL_TYPE	/;"	d
USB_CDC_NOTIFY_NETWORK_CONNECTION	include/linux/usb/cdc.h	/^#define USB_CDC_NOTIFY_NETWORK_CONNECTION	/;"	d
USB_CDC_NOTIFY_RESPONSE_AVAILABLE	include/linux/usb/cdc.h	/^#define USB_CDC_NOTIFY_RESPONSE_AVAILABLE	/;"	d
USB_CDC_NOTIFY_SERIAL_STATE	include/linux/usb/cdc.h	/^#define USB_CDC_NOTIFY_SERIAL_STATE	/;"	d
USB_CDC_NOTIFY_SPEED_CHANGE	include/linux/usb/cdc.h	/^#define USB_CDC_NOTIFY_SPEED_CHANGE	/;"	d
USB_CDC_NO_PARITY	include/linux/usb/cdc.h	/^#define USB_CDC_NO_PARITY	/;"	d
USB_CDC_OBEX_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_OBEX_TYPE	/;"	d
USB_CDC_ODD_PARITY	include/linux/usb/cdc.h	/^#define USB_CDC_ODD_PARITY	/;"	d
USB_CDC_PACKET_TYPE_ALL_MULTICAST	include/linux/usb/cdc.h	/^#define	USB_CDC_PACKET_TYPE_ALL_MULTICAST	/;"	d
USB_CDC_PACKET_TYPE_BROADCAST	include/linux/usb/cdc.h	/^#define	USB_CDC_PACKET_TYPE_BROADCAST	/;"	d
USB_CDC_PACKET_TYPE_DIRECTED	include/linux/usb/cdc.h	/^#define	USB_CDC_PACKET_TYPE_DIRECTED	/;"	d
USB_CDC_PACKET_TYPE_MULTICAST	include/linux/usb/cdc.h	/^#define	USB_CDC_PACKET_TYPE_MULTICAST	/;"	d
USB_CDC_PACKET_TYPE_PROMISCUOUS	include/linux/usb/cdc.h	/^#define	USB_CDC_PACKET_TYPE_PROMISCUOUS	/;"	d
USB_CDC_PROTO_NONE	include/linux/usb/cdc.h	/^#define USB_CDC_PROTO_NONE	/;"	d
USB_CDC_REQ_GET_LINE_CODING	include/linux/usb/cdc.h	/^#define USB_CDC_REQ_GET_LINE_CODING	/;"	d
USB_CDC_REQ_SEND_BREAK	include/linux/usb/cdc.h	/^#define USB_CDC_REQ_SEND_BREAK	/;"	d
USB_CDC_REQ_SET_CONTROL_LINE_STATE	include/linux/usb/cdc.h	/^#define USB_CDC_REQ_SET_CONTROL_LINE_STATE	/;"	d
USB_CDC_REQ_SET_LINE_CODING	include/linux/usb/cdc.h	/^#define USB_CDC_REQ_SET_LINE_CODING	/;"	d
USB_CDC_SEND_ENCAPSULATED_COMMAND	include/linux/usb/cdc.h	/^#define USB_CDC_SEND_ENCAPSULATED_COMMAND	/;"	d
USB_CDC_SET_ETHERNET_MULTICAST_FILTERS	include/linux/usb/cdc.h	/^#define USB_CDC_SET_ETHERNET_MULTICAST_FILTERS	/;"	d
USB_CDC_SET_ETHERNET_PACKET_FILTER	include/linux/usb/cdc.h	/^#define USB_CDC_SET_ETHERNET_PACKET_FILTER	/;"	d
USB_CDC_SET_ETHERNET_PM_PATTERN_FILTER	include/linux/usb/cdc.h	/^#define USB_CDC_SET_ETHERNET_PM_PATTERN_FILTER	/;"	d
USB_CDC_SPACE_PARITY	include/linux/usb/cdc.h	/^#define USB_CDC_SPACE_PARITY	/;"	d
USB_CDC_SUBCLASS_ACM	include/linux/usb/cdc.h	/^#define USB_CDC_SUBCLASS_ACM	/;"	d
USB_CDC_SUBCLASS_DMM	include/linux/usb/cdc.h	/^#define USB_CDC_SUBCLASS_DMM	/;"	d
USB_CDC_SUBCLASS_ETHERNET	include/linux/usb/cdc.h	/^#define USB_CDC_SUBCLASS_ETHERNET	/;"	d
USB_CDC_SUBCLASS_MDLM	include/linux/usb/cdc.h	/^#define USB_CDC_SUBCLASS_MDLM	/;"	d
USB_CDC_SUBCLASS_OBEX	include/linux/usb/cdc.h	/^#define USB_CDC_SUBCLASS_OBEX	/;"	d
USB_CDC_SUBCLASS_WHCM	include/linux/usb/cdc.h	/^#define USB_CDC_SUBCLASS_WHCM	/;"	d
USB_CDC_UNION_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_UNION_TYPE	/;"	d
USB_CDC_WHCM_TYPE	include/linux/usb/cdc.h	/^#define USB_CDC_WHCM_TYPE	/;"	d
USB_CDET_GPIO	board/toradex/colibri_vf/colibri_vf.c	/^#define USB_CDET_GPIO	/;"	d	file:
USB_CLASS_APP_SPEC	include/linux/usb/ch9.h	/^#define USB_CLASS_APP_SPEC	/;"	d
USB_CLASS_APP_SPEC	include/usbdevice.h	/^#define USB_CLASS_APP_SPEC	/;"	d
USB_CLASS_AUDIO	include/linux/usb/ch9.h	/^#define USB_CLASS_AUDIO	/;"	d
USB_CLASS_AUDIO	include/usb_defs.h	/^#define USB_CLASS_AUDIO /;"	d
USB_CLASS_AUDIO	include/usbdevice.h	/^#define USB_CLASS_AUDIO	/;"	d
USB_CLASS_CDC_DATA	include/linux/usb/ch9.h	/^#define USB_CLASS_CDC_DATA	/;"	d
USB_CLASS_COMM	include/linux/usb/ch9.h	/^#define USB_CLASS_COMM	/;"	d
USB_CLASS_COMM	include/usb_defs.h	/^#define USB_CLASS_COMM /;"	d
USB_CLASS_COMM	include/usbdevice.h	/^#define USB_CLASS_COMM	/;"	d
USB_CLASS_CONTENT_SEC	include/linux/usb/ch9.h	/^#define USB_CLASS_CONTENT_SEC	/;"	d
USB_CLASS_CSCID	include/linux/usb/ch9.h	/^#define USB_CLASS_CSCID	/;"	d
USB_CLASS_DATA	include/usb_defs.h	/^#define USB_CLASS_DATA /;"	d
USB_CLASS_DATA	include/usbdevice.h	/^#define USB_CLASS_DATA	/;"	d
USB_CLASS_HID	include/linux/usb/ch9.h	/^#define USB_CLASS_HID	/;"	d
USB_CLASS_HID	include/usb_defs.h	/^#define USB_CLASS_HID /;"	d
USB_CLASS_HID	include/usbdevice.h	/^#define USB_CLASS_HID	/;"	d
USB_CLASS_HUB	arch/arm/dts/rk3399.dtsi	/^#define USB_CLASS_HUB	/;"	d	file:
USB_CLASS_HUB	arch/sandbox/dts/sandbox.dts	/^#define USB_CLASS_HUB	/;"	d	file:
USB_CLASS_HUB	include/linux/usb/ch9.h	/^#define USB_CLASS_HUB	/;"	d
USB_CLASS_HUB	include/usb_defs.h	/^#define USB_CLASS_HUB /;"	d
USB_CLASS_HUB	include/usbdevice.h	/^#define USB_CLASS_HUB	/;"	d
USB_CLASS_MASS_STORAGE	include/linux/usb/ch9.h	/^#define USB_CLASS_MASS_STORAGE	/;"	d
USB_CLASS_MASS_STORAGE	include/usb_defs.h	/^#define USB_CLASS_MASS_STORAGE /;"	d
USB_CLASS_MASS_STORAGE	include/usbdevice.h	/^#define USB_CLASS_MASS_STORAGE	/;"	d
USB_CLASS_MISC	include/linux/usb/ch9.h	/^#define USB_CLASS_MISC	/;"	d
USB_CLASS_PER_INTERFACE	include/linux/usb/ch9.h	/^#define USB_CLASS_PER_INTERFACE	/;"	d
USB_CLASS_PER_INTERFACE	include/usb_defs.h	/^#define USB_CLASS_PER_INTERFACE /;"	d
USB_CLASS_PER_INTERFACE	include/usbdevice.h	/^#define USB_CLASS_PER_INTERFACE	/;"	d
USB_CLASS_PHYSICAL	include/linux/usb/ch9.h	/^#define USB_CLASS_PHYSICAL	/;"	d
USB_CLASS_PHYSICAL	include/usbdevice.h	/^#define USB_CLASS_PHYSICAL	/;"	d
USB_CLASS_PRINTER	include/linux/usb/ch9.h	/^#define USB_CLASS_PRINTER	/;"	d
USB_CLASS_PRINTER	include/usb_defs.h	/^#define USB_CLASS_PRINTER	/;"	d
USB_CLASS_PRINTER	include/usbdevice.h	/^#define USB_CLASS_PRINTER	/;"	d
USB_CLASS_STILL_IMAGE	include/linux/usb/ch9.h	/^#define USB_CLASS_STILL_IMAGE	/;"	d
USB_CLASS_VENDOR_SPEC	include/linux/usb/ch9.h	/^#define USB_CLASS_VENDOR_SPEC	/;"	d
USB_CLASS_VENDOR_SPEC	include/usb_defs.h	/^#define USB_CLASS_VENDOR_SPEC /;"	d
USB_CLASS_VENDOR_SPEC	include/usbdevice.h	/^#define USB_CLASS_VENDOR_SPEC	/;"	d
USB_CLASS_VIDEO	include/linux/usb/ch9.h	/^#define USB_CLASS_VIDEO	/;"	d
USB_CLASS_WIRELESS_CONTROLLER	include/linux/usb/ch9.h	/^#define USB_CLASS_WIRELESS_CONTROLLER	/;"	d
USB_CLK	arch/arm/include/asm/arch-mx35/clock.h	/^	USB_CLK,$/;"	e	enum:mxc_main_clock
USB_CLOCK	board/samsung/smdk2410/smdk2410.c	/^#define USB_CLOCK /;"	d	file:
USB_CNTL_TIMEOUT	include/usb.h	/^#define USB_CNTL_TIMEOUT /;"	d
USB_CONFIG_ATT_BATTERY	include/linux/usb/ch9.h	/^#define USB_CONFIG_ATT_BATTERY	/;"	d
USB_CONFIG_ATT_ONE	include/linux/usb/ch9.h	/^#define USB_CONFIG_ATT_ONE	/;"	d
USB_CONFIG_ATT_SELFPOWER	include/linux/usb/ch9.h	/^#define USB_CONFIG_ATT_SELFPOWER	/;"	d
USB_CONFIG_ATT_WAKEUP	include/linux/usb/ch9.h	/^#define USB_CONFIG_ATT_WAKEUP	/;"	d
USB_CONNECT_TIMEOUT	drivers/usb/gadget/ether.c	/^#define USB_CONNECT_TIMEOUT /;"	d	file:
USB_CONNECT_TIMER	drivers/usb/eth/r8152.h	/^#define USB_CONNECT_TIMER	/;"	d
USB_CONTROL	include/usb_defs.h	/^#define USB_CONTROL /;"	d
USB_COUNT0	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_COUNT0 /;"	d
USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_COUNT0 /;"	d
USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_COUNT0 /;"	d
USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_COUNT0 /;"	d
USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_COUNT0 /;"	d
USB_CSR0	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_CSR0 /;"	d
USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_CSR0 /;"	d
USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_CSR0 /;"	d
USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_CSR0 /;"	d
USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_CSR0 /;"	d
USB_CSR_DUMMY1	drivers/usb/eth/r8152.h	/^#define USB_CSR_DUMMY1	/;"	d
USB_CSR_DUMMY2	drivers/usb/eth/r8152.h	/^#define USB_CSR_DUMMY2	/;"	d
USB_CTLR_T114	drivers/usb/host/ehci-tegra.c	/^	USB_CTLR_T114,$/;"	e	enum:usb_ctlr_type	file:
USB_CTLR_T20	drivers/usb/host/ehci-tegra.c	/^	USB_CTLR_T20,$/;"	e	enum:usb_ctlr_type	file:
USB_CTLR_T210	drivers/usb/host/ehci-tegra.c	/^	USB_CTLR_T210,$/;"	e	enum:usb_ctlr_type	file:
USB_CTLR_T30	drivers/usb/host/ehci-tegra.c	/^	USB_CTLR_T30,$/;"	e	enum:usb_ctlr_type	file:
USB_CTRL_COUNT	drivers/usb/host/ehci-tegra.c	/^	USB_CTRL_COUNT,$/;"	e	enum:usb_ctlr_type	file:
USB_CTRL_GET_TIMEOUT	drivers/usb/eth/asix.c	/^#define USB_CTRL_GET_TIMEOUT /;"	d	file:
USB_CTRL_GET_TIMEOUT	drivers/usb/eth/asix88179.c	/^#define USB_CTRL_GET_TIMEOUT /;"	d	file:
USB_CTRL_GET_TIMEOUT	drivers/usb/eth/smsc95xx.c	/^#define USB_CTRL_GET_TIMEOUT /;"	d	file:
USB_CTRL_REG	drivers/usb/musb-new/am35x.c	/^#define USB_CTRL_REG	/;"	d	file:
USB_CTRL_SET_TIMEOUT	drivers/usb/eth/asix.c	/^#define USB_CTRL_SET_TIMEOUT /;"	d	file:
USB_CTRL_SET_TIMEOUT	drivers/usb/eth/asix88179.c	/^#define USB_CTRL_SET_TIMEOUT /;"	d	file:
USB_CTRL_SET_TIMEOUT	drivers/usb/eth/smsc95xx.c	/^#define USB_CTRL_SET_TIMEOUT /;"	d	file:
USB_DESCRIPTOR_TYPE_CONFIGURATION	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_CONFIGURATION	/;"	d
USB_DESCRIPTOR_TYPE_DEVICE	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_DEVICE	/;"	d
USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER	/;"	d
USB_DESCRIPTOR_TYPE_ENDPOINT	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_ENDPOINT	/;"	d
USB_DESCRIPTOR_TYPE_HID	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_HID	/;"	d
USB_DESCRIPTOR_TYPE_INTERFACE	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_INTERFACE	/;"	d
USB_DESCRIPTOR_TYPE_INTERFACE_POWER	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_INTERFACE_POWER	/;"	d
USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION	/;"	d
USB_DESCRIPTOR_TYPE_REPORT	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_REPORT	/;"	d
USB_DESCRIPTOR_TYPE_STRING	include/usbdevice.h	/^#define USB_DESCRIPTOR_TYPE_STRING	/;"	d
USB_DEVICE	include/usb.h	/^#define USB_DEVICE(/;"	d
USB_DEVICE_A_ALT_HNP_SUPPORT	include/linux/usb/ch9.h	/^#define USB_DEVICE_A_ALT_HNP_SUPPORT	/;"	d
USB_DEVICE_A_HNP_SUPPORT	include/linux/usb/ch9.h	/^#define USB_DEVICE_A_HNP_SUPPORT	/;"	d
USB_DEVICE_BATTERY	include/linux/usb/ch9.h	/^#define USB_DEVICE_BATTERY	/;"	d
USB_DEVICE_B_HNP_ENABLE	include/linux/usb/ch9.h	/^#define USB_DEVICE_B_HNP_ENABLE	/;"	d
USB_DEVICE_DEBUG_MODE	include/linux/usb/ch9.h	/^#define USB_DEVICE_DEBUG_MODE	/;"	d
USB_DEVICE_ID_MATCH_ALL	include/usb.h	/^#define USB_DEVICE_ID_MATCH_ALL	/;"	d
USB_DEVICE_ID_MATCH_DEVICE	include/usb.h	/^#define USB_DEVICE_ID_MATCH_DEVICE /;"	d
USB_DEVICE_ID_MATCH_DEV_CLASS	include/usb.h	/^#define USB_DEVICE_ID_MATCH_DEV_CLASS	/;"	d
USB_DEVICE_ID_MATCH_DEV_HI	include/usb.h	/^#define USB_DEVICE_ID_MATCH_DEV_HI	/;"	d
USB_DEVICE_ID_MATCH_DEV_LO	include/usb.h	/^#define USB_DEVICE_ID_MATCH_DEV_LO	/;"	d
USB_DEVICE_ID_MATCH_DEV_PROTOCOL	include/usb.h	/^#define USB_DEVICE_ID_MATCH_DEV_PROTOCOL	/;"	d
USB_DEVICE_ID_MATCH_DEV_SUBCLASS	include/usb.h	/^#define USB_DEVICE_ID_MATCH_DEV_SUBCLASS	/;"	d
USB_DEVICE_ID_MATCH_INT_CLASS	include/usb.h	/^#define USB_DEVICE_ID_MATCH_INT_CLASS	/;"	d
USB_DEVICE_ID_MATCH_INT_NUMBER	include/usb.h	/^#define USB_DEVICE_ID_MATCH_INT_NUMBER	/;"	d
USB_DEVICE_ID_MATCH_INT_PROTOCOL	include/usb.h	/^#define USB_DEVICE_ID_MATCH_INT_PROTOCOL	/;"	d
USB_DEVICE_ID_MATCH_INT_SUBCLASS	include/usb.h	/^#define USB_DEVICE_ID_MATCH_INT_SUBCLASS	/;"	d
USB_DEVICE_ID_MATCH_NONE	include/usb.h	/^#define USB_DEVICE_ID_MATCH_NONE	/;"	d
USB_DEVICE_ID_MATCH_PRODUCT	include/usb.h	/^#define USB_DEVICE_ID_MATCH_PRODUCT	/;"	d
USB_DEVICE_ID_MATCH_VENDOR	include/usb.h	/^#define USB_DEVICE_ID_MATCH_VENDOR	/;"	d
USB_DEVICE_LTM_ENABLE	include/linux/usb/ch9.h	/^#define USB_DEVICE_LTM_ENABLE	/;"	d
USB_DEVICE_REMOTE_WAKEUP	include/linux/usb/ch9.h	/^#define USB_DEVICE_REMOTE_WAKEUP	/;"	d
USB_DEVICE_REMOTE_WAKEUP	include/usbdevice.h	/^#define USB_DEVICE_REMOTE_WAKEUP	/;"	d
USB_DEVICE_SELF_POWERED	include/linux/usb/ch9.h	/^#define USB_DEVICE_SELF_POWERED	/;"	d
USB_DEVICE_TEST_MODE	include/linux/usb/ch9.h	/^#define USB_DEVICE_TEST_MODE	/;"	d
USB_DEVICE_U1_ENABLE	include/linux/usb/ch9.h	/^#define USB_DEVICE_U1_ENABLE	/;"	d
USB_DEVICE_U2_ENABLE	include/linux/usb/ch9.h	/^#define USB_DEVICE_U2_ENABLE	/;"	d
USB_DEVICE_WUSB_DEVICE	include/linux/usb/ch9.h	/^#define USB_DEVICE_WUSB_DEVICE	/;"	d
USB_DEV_STAT	drivers/usb/eth/r8152.h	/^#define USB_DEV_STAT	/;"	d
USB_DEV_STAT_LTM_ENABLED	include/linux/usb/ch9.h	/^#define USB_DEV_STAT_LTM_ENABLED	/;"	d
USB_DEV_STAT_U1_ENABLED	include/linux/usb/ch9.h	/^#define USB_DEV_STAT_U1_ENABLED	/;"	d
USB_DEV_STAT_U2_ENABLED	include/linux/usb/ch9.h	/^#define USB_DEV_STAT_U2_ENABLED	/;"	d
USB_DIR_IN	include/linux/usb/ch9.h	/^#define USB_DIR_IN	/;"	d
USB_DIR_IN	include/usb_defs.h	/^#define USB_DIR_IN /;"	d
USB_DIR_IN	include/usbdevice.h	/^#define USB_DIR_IN	/;"	d
USB_DIR_OUT	include/linux/usb/ch9.h	/^#define USB_DIR_OUT	/;"	d
USB_DIR_OUT	include/usb_defs.h	/^#define USB_DIR_OUT /;"	d
USB_DIR_OUT	include/usbdevice.h	/^#define USB_DIR_OUT	/;"	d
USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA0_ADDRHIGH /;"	d
USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA0_ADDRHIGH /;"	d
USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA0_ADDRHIGH /;"	d
USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA0_ADDRHIGH /;"	d
USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA0_ADDRHIGH /;"	d
USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA0_ADDRLOW /;"	d
USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA0_ADDRLOW /;"	d
USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA0_ADDRLOW /;"	d
USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA0_ADDRLOW /;"	d
USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA0_ADDRLOW /;"	d
USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA0_CONTROL /;"	d
USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA0_CONTROL /;"	d
USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA0_CONTROL /;"	d
USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA0_CONTROL /;"	d
USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA0_CONTROL /;"	d
USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA0_COUNTHIGH /;"	d
USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA0_COUNTHIGH /;"	d
USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA0_COUNTHIGH /;"	d
USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA0_COUNTHIGH /;"	d
USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA0_COUNTHIGH /;"	d
USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA0_COUNTLOW /;"	d
USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA0_COUNTLOW /;"	d
USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA0_COUNTLOW /;"	d
USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA0_COUNTLOW /;"	d
USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA0_COUNTLOW /;"	d
USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA1_ADDRHIGH /;"	d
USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA1_ADDRHIGH /;"	d
USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA1_ADDRHIGH /;"	d
USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA1_ADDRHIGH /;"	d
USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA1_ADDRHIGH /;"	d
USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA1_ADDRLOW /;"	d
USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA1_ADDRLOW /;"	d
USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA1_ADDRLOW /;"	d
USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA1_ADDRLOW /;"	d
USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA1_ADDRLOW /;"	d
USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA1_CONTROL /;"	d
USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA1_CONTROL /;"	d
USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA1_CONTROL /;"	d
USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA1_CONTROL /;"	d
USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA1_CONTROL /;"	d
USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA1_COUNTHIGH /;"	d
USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA1_COUNTHIGH /;"	d
USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA1_COUNTHIGH /;"	d
USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA1_COUNTHIGH /;"	d
USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA1_COUNTHIGH /;"	d
USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA1_COUNTLOW /;"	d
USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA1_COUNTLOW /;"	d
USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA1_COUNTLOW /;"	d
USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA1_COUNTLOW /;"	d
USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA1_COUNTLOW /;"	d
USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA2_ADDRHIGH /;"	d
USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA2_ADDRHIGH /;"	d
USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA2_ADDRHIGH /;"	d
USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA2_ADDRHIGH /;"	d
USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA2_ADDRHIGH /;"	d
USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA2_ADDRLOW /;"	d
USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA2_ADDRLOW /;"	d
USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA2_ADDRLOW /;"	d
USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA2_ADDRLOW /;"	d
USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA2_ADDRLOW /;"	d
USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA2_CONTROL /;"	d
USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA2_CONTROL /;"	d
USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA2_CONTROL /;"	d
USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA2_CONTROL /;"	d
USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA2_CONTROL /;"	d
USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA2_COUNTHIGH /;"	d
USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA2_COUNTHIGH /;"	d
USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA2_COUNTHIGH /;"	d
USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA2_COUNTHIGH /;"	d
USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA2_COUNTHIGH /;"	d
USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA2_COUNTLOW /;"	d
USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA2_COUNTLOW /;"	d
USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA2_COUNTLOW /;"	d
USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA2_COUNTLOW /;"	d
USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA2_COUNTLOW /;"	d
USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA3_ADDRHIGH /;"	d
USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA3_ADDRHIGH /;"	d
USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA3_ADDRHIGH /;"	d
USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA3_ADDRHIGH /;"	d
USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA3_ADDRHIGH /;"	d
USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA3_ADDRLOW /;"	d
USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA3_ADDRLOW /;"	d
USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA3_ADDRLOW /;"	d
USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA3_ADDRLOW /;"	d
USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA3_ADDRLOW /;"	d
USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA3_CONTROL /;"	d
USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA3_CONTROL /;"	d
USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA3_CONTROL /;"	d
USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA3_CONTROL /;"	d
USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA3_CONTROL /;"	d
USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA3_COUNTHIGH /;"	d
USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA3_COUNTHIGH /;"	d
USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA3_COUNTHIGH /;"	d
USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA3_COUNTHIGH /;"	d
USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA3_COUNTHIGH /;"	d
USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA3_COUNTLOW /;"	d
USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA3_COUNTLOW /;"	d
USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA3_COUNTLOW /;"	d
USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA3_COUNTLOW /;"	d
USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA3_COUNTLOW /;"	d
USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA4_ADDRHIGH /;"	d
USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA4_ADDRHIGH /;"	d
USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA4_ADDRHIGH /;"	d
USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA4_ADDRHIGH /;"	d
USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA4_ADDRHIGH /;"	d
USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA4_ADDRLOW /;"	d
USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA4_ADDRLOW /;"	d
USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA4_ADDRLOW /;"	d
USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA4_ADDRLOW /;"	d
USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA4_ADDRLOW /;"	d
USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA4_CONTROL /;"	d
USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA4_CONTROL /;"	d
USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA4_CONTROL /;"	d
USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA4_CONTROL /;"	d
USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA4_CONTROL /;"	d
USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA4_COUNTHIGH /;"	d
USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA4_COUNTHIGH /;"	d
USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA4_COUNTHIGH /;"	d
USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA4_COUNTHIGH /;"	d
USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA4_COUNTHIGH /;"	d
USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA4_COUNTLOW /;"	d
USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA4_COUNTLOW /;"	d
USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA4_COUNTLOW /;"	d
USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA4_COUNTLOW /;"	d
USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA4_COUNTLOW /;"	d
USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA5_ADDRHIGH /;"	d
USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA5_ADDRHIGH /;"	d
USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA5_ADDRHIGH /;"	d
USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA5_ADDRHIGH /;"	d
USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA5_ADDRHIGH /;"	d
USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA5_ADDRLOW /;"	d
USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA5_ADDRLOW /;"	d
USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA5_ADDRLOW /;"	d
USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA5_ADDRLOW /;"	d
USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA5_ADDRLOW /;"	d
USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA5_CONTROL /;"	d
USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA5_CONTROL /;"	d
USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA5_CONTROL /;"	d
USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA5_CONTROL /;"	d
USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA5_CONTROL /;"	d
USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA5_COUNTHIGH /;"	d
USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA5_COUNTHIGH /;"	d
USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA5_COUNTHIGH /;"	d
USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA5_COUNTHIGH /;"	d
USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA5_COUNTHIGH /;"	d
USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA5_COUNTLOW /;"	d
USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA5_COUNTLOW /;"	d
USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA5_COUNTLOW /;"	d
USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA5_COUNTLOW /;"	d
USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA5_COUNTLOW /;"	d
USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA6_ADDRHIGH /;"	d
USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA6_ADDRHIGH /;"	d
USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA6_ADDRHIGH /;"	d
USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA6_ADDRHIGH /;"	d
USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA6_ADDRHIGH /;"	d
USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA6_ADDRLOW /;"	d
USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA6_ADDRLOW /;"	d
USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA6_ADDRLOW /;"	d
USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA6_ADDRLOW /;"	d
USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA6_ADDRLOW /;"	d
USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA6_CONTROL /;"	d
USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA6_CONTROL /;"	d
USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA6_CONTROL /;"	d
USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA6_CONTROL /;"	d
USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA6_CONTROL /;"	d
USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA6_COUNTHIGH /;"	d
USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA6_COUNTHIGH /;"	d
USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA6_COUNTHIGH /;"	d
USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA6_COUNTHIGH /;"	d
USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA6_COUNTHIGH /;"	d
USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA6_COUNTLOW /;"	d
USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA6_COUNTLOW /;"	d
USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA6_COUNTLOW /;"	d
USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA6_COUNTLOW /;"	d
USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA6_COUNTLOW /;"	d
USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA7_ADDRHIGH /;"	d
USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA7_ADDRHIGH /;"	d
USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA7_ADDRHIGH /;"	d
USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA7_ADDRHIGH /;"	d
USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA7_ADDRHIGH /;"	d
USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA7_ADDRLOW /;"	d
USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA7_ADDRLOW /;"	d
USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA7_ADDRLOW /;"	d
USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA7_ADDRLOW /;"	d
USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA7_ADDRLOW /;"	d
USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA7_CONTROL /;"	d
USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA7_CONTROL /;"	d
USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA7_CONTROL /;"	d
USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA7_CONTROL /;"	d
USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA7_CONTROL /;"	d
USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA7_COUNTHIGH /;"	d
USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA7_COUNTHIGH /;"	d
USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA7_COUNTHIGH /;"	d
USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA7_COUNTHIGH /;"	d
USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA7_COUNTHIGH /;"	d
USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA7_COUNTLOW /;"	d
USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA7_COUNTLOW /;"	d
USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA7_COUNTLOW /;"	d
USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA7_COUNTLOW /;"	d
USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA7_COUNTLOW /;"	d
USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_DMA_INTERRUPT /;"	d
USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_DMA_INTERRUPT /;"	d
USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_DMA_INTERRUPT /;"	d
USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_DMA_INTERRUPT /;"	d
USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_DMA_INTERRUPT /;"	d
USB_DMA_IRQ	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define USB_DMA_IRQ /;"	d
USB_DMA_MINALIGN	include/usb.h	/^#define USB_DMA_MINALIGN	/;"	d
USB_DR_MODE_HOST	include/linux/usb/otg.h	/^	USB_DR_MODE_HOST,$/;"	e	enum:usb_dr_mode
USB_DR_MODE_OTG	include/linux/usb/otg.h	/^	USB_DR_MODE_OTG,$/;"	e	enum:usb_dr_mode
USB_DR_MODE_PERIPHERAL	include/linux/usb/otg.h	/^	USB_DR_MODE_PERIPHERAL,$/;"	e	enum:usb_dr_mode
USB_DR_MODE_UNKNOWN	include/linux/usb/otg.h	/^	USB_DR_MODE_UNKNOWN,$/;"	e	enum:usb_dr_mode
USB_DT_BOS	include/linux/usb/ch9.h	/^#define USB_DT_BOS	/;"	d
USB_DT_BOS_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_BOS_SIZE	/;"	d
USB_DT_CONFIG	include/linux/usb/ch9.h	/^#define USB_DT_CONFIG	/;"	d
USB_DT_CONFIG	include/usb_defs.h	/^#define USB_DT_CONFIG /;"	d
USB_DT_CONFIG	include/usbdevice.h	/^#define USB_DT_CONFIG	/;"	d
USB_DT_CONFIG_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_CONFIG_SIZE	/;"	d
USB_DT_CONFIG_SIZE	include/usb_defs.h	/^#define USB_DT_CONFIG_SIZE /;"	d
USB_DT_CONFIG_SIZE	include/usbdevice.h	/^#define USB_DT_CONFIG_SIZE	/;"	d
USB_DT_CS_CONFIG	include/linux/usb/ch9.h	/^#define USB_DT_CS_CONFIG	/;"	d
USB_DT_CS_DEVICE	include/linux/usb/ch9.h	/^#define USB_DT_CS_DEVICE	/;"	d
USB_DT_CS_ENDPOINT	include/linux/usb/ch9.h	/^#define USB_DT_CS_ENDPOINT	/;"	d
USB_DT_CS_INTERFACE	include/linux/usb/ch9.h	/^#define USB_DT_CS_INTERFACE	/;"	d
USB_DT_CS_RADIO_CONTROL	include/linux/usb/ch9.h	/^#define USB_DT_CS_RADIO_CONTROL	/;"	d
USB_DT_CS_STRING	include/linux/usb/ch9.h	/^#define USB_DT_CS_STRING	/;"	d
USB_DT_DEBUG	include/linux/usb/ch9.h	/^#define USB_DT_DEBUG	/;"	d
USB_DT_DEVICE	include/linux/usb/ch9.h	/^#define USB_DT_DEVICE	/;"	d
USB_DT_DEVICE	include/usb_defs.h	/^#define USB_DT_DEVICE /;"	d
USB_DT_DEVICE	include/usbdevice.h	/^#define USB_DT_DEVICE	/;"	d
USB_DT_DEVICE_CAPABILITY	include/linux/usb/ch9.h	/^#define USB_DT_DEVICE_CAPABILITY	/;"	d
USB_DT_DEVICE_QUALIFIER	include/linux/usb/ch9.h	/^#define USB_DT_DEVICE_QUALIFIER	/;"	d
USB_DT_DEVICE_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_DEVICE_SIZE	/;"	d
USB_DT_DEVICE_SIZE	include/usb_defs.h	/^#define USB_DT_DEVICE_SIZE /;"	d
USB_DT_DEVICE_SIZE	include/usbdevice.h	/^#define USB_DT_DEVICE_SIZE	/;"	d
USB_DT_ENCRYPTION_TYPE	include/linux/usb/ch9.h	/^#define USB_DT_ENCRYPTION_TYPE	/;"	d
USB_DT_ENDPOINT	include/linux/usb/ch9.h	/^#define USB_DT_ENDPOINT	/;"	d
USB_DT_ENDPOINT	include/usb_defs.h	/^#define USB_DT_ENDPOINT /;"	d
USB_DT_ENDPOINT	include/usbdevice.h	/^#define USB_DT_ENDPOINT	/;"	d
USB_DT_ENDPOINT_AUDIO_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_ENDPOINT_AUDIO_SIZE	/;"	d
USB_DT_ENDPOINT_AUDIO_SIZE	include/usb_defs.h	/^#define USB_DT_ENDPOINT_AUDIO_SIZE /;"	d
USB_DT_ENDPOINT_AUDIO_SIZE	include/usbdevice.h	/^#define USB_DT_ENDPOINT_AUDIO_SIZE	/;"	d
USB_DT_ENDPOINT_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_ENDPOINT_SIZE	/;"	d
USB_DT_ENDPOINT_SIZE	include/usb_defs.h	/^#define USB_DT_ENDPOINT_SIZE /;"	d
USB_DT_ENDPOINT_SIZE	include/usbdevice.h	/^#define USB_DT_ENDPOINT_SIZE	/;"	d
USB_DT_HID	include/usb_defs.h	/^#define USB_DT_HID /;"	d
USB_DT_HID	include/usbdevice.h	/^#define USB_DT_HID	/;"	d
USB_DT_HID_REPORT	include/linux/usb/ch9.h	/^#define USB_DT_HID_REPORT	/;"	d
USB_DT_HID_SIZE	include/usb_defs.h	/^#define USB_DT_HID_SIZE /;"	d
USB_DT_HID_SIZE	include/usbdevice.h	/^#define USB_DT_HID_SIZE	/;"	d
USB_DT_HUB	include/usb_defs.h	/^#define USB_DT_HUB /;"	d
USB_DT_HUB	include/usbdevice.h	/^#define USB_DT_HUB	/;"	d
USB_DT_HUB_NONVAR_SIZE	include/usb_defs.h	/^#define USB_DT_HUB_NONVAR_SIZE /;"	d
USB_DT_HUB_NONVAR_SIZE	include/usbdevice.h	/^#define USB_DT_HUB_NONVAR_SIZE	/;"	d
USB_DT_INTERFACE	include/linux/usb/ch9.h	/^#define USB_DT_INTERFACE	/;"	d
USB_DT_INTERFACE	include/usb_defs.h	/^#define USB_DT_INTERFACE /;"	d
USB_DT_INTERFACE	include/usbdevice.h	/^#define USB_DT_INTERFACE	/;"	d
USB_DT_INTERFACE_ASSOCIATION	include/linux/usb/ch9.h	/^#define USB_DT_INTERFACE_ASSOCIATION	/;"	d
USB_DT_INTERFACE_POWER	include/linux/usb/ch9.h	/^#define USB_DT_INTERFACE_POWER	/;"	d
USB_DT_INTERFACE_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_INTERFACE_SIZE	/;"	d
USB_DT_INTERFACE_SIZE	include/usb_defs.h	/^#define USB_DT_INTERFACE_SIZE /;"	d
USB_DT_INTERFACE_SIZE	include/usbdevice.h	/^#define USB_DT_INTERFACE_SIZE	/;"	d
USB_DT_KEY	include/linux/usb/ch9.h	/^#define USB_DT_KEY	/;"	d
USB_DT_OTG	include/linux/usb/ch9.h	/^#define USB_DT_OTG	/;"	d
USB_DT_OTHER_SPEED_CONFIG	include/linux/usb/ch9.h	/^#define USB_DT_OTHER_SPEED_CONFIG	/;"	d
USB_DT_PHYSICAL	include/usb_defs.h	/^#define USB_DT_PHYSICAL /;"	d
USB_DT_PHYSICAL	include/usbdevice.h	/^#define USB_DT_PHYSICAL	/;"	d
USB_DT_PIPE_USAGE	include/linux/usb/ch9.h	/^#define USB_DT_PIPE_USAGE	/;"	d
USB_DT_QUAL	include/usbdevice.h	/^#define USB_DT_QUAL	/;"	d
USB_DT_REPORT	include/usb_defs.h	/^#define USB_DT_REPORT /;"	d
USB_DT_REPORT	include/usbdevice.h	/^#define USB_DT_REPORT	/;"	d
USB_DT_RPIPE	include/linux/usb/ch9.h	/^#define USB_DT_RPIPE	/;"	d
USB_DT_SECURITY	include/linux/usb/ch9.h	/^#define USB_DT_SECURITY	/;"	d
USB_DT_SS_ENDPOINT_COMP	include/linux/usb/ch9.h	/^#define	USB_DT_SS_ENDPOINT_COMP	/;"	d
USB_DT_SS_EP_COMP_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_SS_EP_COMP_SIZE	/;"	d
USB_DT_STRING	include/linux/usb/ch9.h	/^#define USB_DT_STRING	/;"	d
USB_DT_STRING	include/usb_defs.h	/^#define USB_DT_STRING /;"	d
USB_DT_STRING	include/usbdevice.h	/^#define USB_DT_STRING	/;"	d
USB_DT_USB_EXT_CAP_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_USB_EXT_CAP_SIZE	/;"	d
USB_DT_USB_SS_CAP_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_USB_SS_CAP_SIZE	/;"	d
USB_DT_USB_SS_CONTN_ID_SIZE	include/linux/usb/ch9.h	/^#define USB_DT_USB_SS_CONTN_ID_SIZE	/;"	d
USB_DT_WIRELESS_ENDPOINT_COMP	include/linux/usb/ch9.h	/^#define USB_DT_WIRELESS_ENDPOINT_COMP	/;"	d
USB_DT_WIRE_ADAPTER	include/linux/usb/ch9.h	/^#define USB_DT_WIRE_ADAPTER	/;"	d
USB_DWC3	drivers/usb/dwc3/Kconfig	/^config USB_DWC3$/;"	c
USB_DWC3_GADGET	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_GADGET$/;"	c	choice:choicede88a50d0104
USB_DWC3_HOST	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_HOST$/;"	c	choice:choicede88a50d0104
USB_DWC3_OMAP	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_OMAP$/;"	c
USB_DWC3_PHY_OMAP	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_PHY_OMAP$/;"	c	menu:PHY Subsystem
USB_DWC3_PHY_SAMSUNG	drivers/usb/dwc3/Kconfig	/^config USB_DWC3_PHY_SAMSUNG$/;"	c	menu:PHY Subsystem
USB_EHCI	drivers/usb/host/Kconfig	/^config USB_EHCI$/;"	c
USB_EHCI_ATMEL	drivers/usb/host/Kconfig	/^config USB_EHCI_ATMEL$/;"	c
USB_EHCI_GENERIC	drivers/usb/host/Kconfig	/^config USB_EHCI_GENERIC$/;"	c
USB_EHCI_H	drivers/usb/host/ehci.h	/^#define USB_EHCI_H$/;"	d
USB_EHCI_HCD	drivers/usb/host/Kconfig	/^config USB_EHCI_HCD$/;"	c
USB_EHCI_MARVELL	drivers/usb/host/Kconfig	/^config USB_EHCI_MARVELL$/;"	c
USB_EHCI_MSM	drivers/usb/host/Kconfig	/^config USB_EHCI_MSM$/;"	c
USB_EHCI_MX6	drivers/usb/host/Kconfig	/^config USB_EHCI_MX6$/;"	c
USB_EHCI_MX7	drivers/usb/host/Kconfig	/^config USB_EHCI_MX7$/;"	c
USB_EHCI_ZYNQ	drivers/usb/host/Kconfig	/^config USB_EHCI_ZYNQ$/;"	c
USB_EMUL	drivers/usb/emul/Kconfig	/^config USB_EMUL$/;"	c
USB_EMULATION_REG	drivers/usb/musb-new/am35x.c	/^#define USB_EMULATION_REG	/;"	d	file:
USB_EN	include/usb/ehci-ci.h	/^#define USB_EN	/;"	d
USB_ENC_TYPE_CCM_1	include/linux/usb/ch9.h	/^#define	USB_ENC_TYPE_CCM_1	/;"	d
USB_ENC_TYPE_RSA_1	include/linux/usb/ch9.h	/^#define	USB_ENC_TYPE_RSA_1	/;"	d
USB_ENC_TYPE_UNSECURE	include/linux/usb/ch9.h	/^#define	USB_ENC_TYPE_UNSECURE	/;"	d
USB_ENC_TYPE_WIRED	include/linux/usb/ch9.h	/^#define	USB_ENC_TYPE_WIRED	/;"	d
USB_ENDPOINT_DIR_MASK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_DIR_MASK	/;"	d
USB_ENDPOINT_DIR_MASK	include/usb_defs.h	/^#define USB_ENDPOINT_DIR_MASK /;"	d
USB_ENDPOINT_DIR_MASK	include/usbdevice.h	/^#define USB_ENDPOINT_DIR_MASK	/;"	d
USB_ENDPOINT_HALT	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_HALT	/;"	d
USB_ENDPOINT_HALT	include/usbdevice.h	/^#define USB_ENDPOINT_HALT	/;"	d
USB_ENDPOINT_INTRTYPE	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_INTRTYPE	/;"	d
USB_ENDPOINT_INTR_NOTIFICATION	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_INTR_NOTIFICATION	/;"	d
USB_ENDPOINT_INTR_PERIODIC	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_INTR_PERIODIC	/;"	d
USB_ENDPOINT_MAX_ADJUSTABLE	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_MAX_ADJUSTABLE	/;"	d
USB_ENDPOINT_NUMBER_MASK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_NUMBER_MASK	/;"	d
USB_ENDPOINT_NUMBER_MASK	include/usb_defs.h	/^#define USB_ENDPOINT_NUMBER_MASK /;"	d
USB_ENDPOINT_NUMBER_MASK	include/usbdevice.h	/^#define USB_ENDPOINT_NUMBER_MASK	/;"	d
USB_ENDPOINT_SWITCH_MASK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SWITCH_MASK	/;"	d
USB_ENDPOINT_SWITCH_NO	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SWITCH_NO	/;"	d
USB_ENDPOINT_SWITCH_SCALE	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SWITCH_SCALE	/;"	d
USB_ENDPOINT_SWITCH_SWITCH	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SWITCH_SWITCH	/;"	d
USB_ENDPOINT_SYNCTYPE	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SYNCTYPE	/;"	d
USB_ENDPOINT_SYNC_ADAPTIVE	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SYNC_ADAPTIVE	/;"	d
USB_ENDPOINT_SYNC_ASYNC	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SYNC_ASYNC	/;"	d
USB_ENDPOINT_SYNC_NONE	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SYNC_NONE	/;"	d
USB_ENDPOINT_SYNC_SYNC	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_SYNC_SYNC	/;"	d
USB_ENDPOINT_USAGE_DATA	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_USAGE_DATA	/;"	d
USB_ENDPOINT_USAGE_FEEDBACK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_USAGE_FEEDBACK	/;"	d
USB_ENDPOINT_USAGE_IMPLICIT_FB	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_USAGE_IMPLICIT_FB	/;"	d
USB_ENDPOINT_USAGE_MASK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_USAGE_MASK	/;"	d
USB_ENDPOINT_XFERTYPE_MASK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_XFERTYPE_MASK	/;"	d
USB_ENDPOINT_XFERTYPE_MASK	include/usb_defs.h	/^#define USB_ENDPOINT_XFERTYPE_MASK /;"	d
USB_ENDPOINT_XFERTYPE_MASK	include/usbdevice.h	/^#define USB_ENDPOINT_XFERTYPE_MASK	/;"	d
USB_ENDPOINT_XFER_BULK	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_XFER_BULK	/;"	d
USB_ENDPOINT_XFER_BULK	include/usb_defs.h	/^#define USB_ENDPOINT_XFER_BULK /;"	d
USB_ENDPOINT_XFER_BULK	include/usbdevice.h	/^#define USB_ENDPOINT_XFER_BULK	/;"	d
USB_ENDPOINT_XFER_CONTROL	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_XFER_CONTROL	/;"	d
USB_ENDPOINT_XFER_CONTROL	include/usb_defs.h	/^#define USB_ENDPOINT_XFER_CONTROL /;"	d
USB_ENDPOINT_XFER_CONTROL	include/usbdevice.h	/^#define USB_ENDPOINT_XFER_CONTROL	/;"	d
USB_ENDPOINT_XFER_INT	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_XFER_INT	/;"	d
USB_ENDPOINT_XFER_INT	include/usb_defs.h	/^#define USB_ENDPOINT_XFER_INT /;"	d
USB_ENDPOINT_XFER_INT	include/usbdevice.h	/^#define USB_ENDPOINT_XFER_INT	/;"	d
USB_ENDPOINT_XFER_ISOC	include/linux/usb/ch9.h	/^#define USB_ENDPOINT_XFER_ISOC	/;"	d
USB_ENDPOINT_XFER_ISOC	include/usb_defs.h	/^#define USB_ENDPOINT_XFER_ISOC /;"	d
USB_ENDPOINT_XFER_ISOC	include/usbdevice.h	/^#define USB_ENDPOINT_XFER_ISOC	/;"	d
USB_END_OF_INTR_REG	drivers/usb/musb-new/am35x.c	/^#define USB_END_OF_INTR_REG	/;"	d	file:
USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP0_FIFO /;"	d
USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP0_FIFO /;"	d
USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP0_FIFO /;"	d
USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP0_FIFO /;"	d
USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP0_FIFO /;"	d
USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP1_FIFO /;"	d
USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP1_FIFO /;"	d
USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP1_FIFO /;"	d
USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP1_FIFO /;"	d
USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP1_FIFO /;"	d
USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP2_FIFO /;"	d
USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP2_FIFO /;"	d
USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP2_FIFO /;"	d
USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP2_FIFO /;"	d
USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP2_FIFO /;"	d
USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP3_FIFO /;"	d
USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP3_FIFO /;"	d
USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP3_FIFO /;"	d
USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP3_FIFO /;"	d
USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP3_FIFO /;"	d
USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP4_FIFO /;"	d
USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP4_FIFO /;"	d
USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP4_FIFO /;"	d
USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP4_FIFO /;"	d
USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP4_FIFO /;"	d
USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP5_FIFO /;"	d
USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP5_FIFO /;"	d
USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP5_FIFO /;"	d
USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP5_FIFO /;"	d
USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP5_FIFO /;"	d
USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP6_FIFO /;"	d
USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP6_FIFO /;"	d
USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP6_FIFO /;"	d
USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP6_FIFO /;"	d
USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP6_FIFO /;"	d
USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP7_FIFO /;"	d
USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP7_FIFO /;"	d
USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP7_FIFO /;"	d
USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP7_FIFO /;"	d
USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP7_FIFO /;"	d
USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_RXCOUNT /;"	d
USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_RXCOUNT /;"	d
USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_RXCOUNT /;"	d
USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_RXCOUNT /;"	d
USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_RXCOUNT /;"	d
USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_RXCSR /;"	d
USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_RXCSR /;"	d
USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_RXCSR /;"	d
USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_RXCSR /;"	d
USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_RXCSR /;"	d
USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_RXINTERVAL /;"	d
USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_RXINTERVAL /;"	d
USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_RXINTERVAL /;"	d
USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_RXINTERVAL /;"	d
USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_RXINTERVAL /;"	d
USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_RXMAXP /;"	d
USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_RXMAXP /;"	d
USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_RXMAXP /;"	d
USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_RXMAXP /;"	d
USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_RXMAXP /;"	d
USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_RXTYPE /;"	d
USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_RXTYPE /;"	d
USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_RXTYPE /;"	d
USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_RXTYPE /;"	d
USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_RXTYPE /;"	d
USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_TXCOUNT /;"	d
USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_TXCOUNT /;"	d
USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_TXCOUNT /;"	d
USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_TXCOUNT /;"	d
USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_TXCOUNT /;"	d
USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_TXCSR /;"	d
USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_TXCSR /;"	d
USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_TXCSR /;"	d
USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_TXCSR /;"	d
USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_TXCSR /;"	d
USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_TXINTERVAL /;"	d
USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_TXINTERVAL /;"	d
USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_TXINTERVAL /;"	d
USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_TXINTERVAL /;"	d
USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_TXINTERVAL /;"	d
USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_TXMAXP /;"	d
USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_TXMAXP /;"	d
USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_TXMAXP /;"	d
USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_TXMAXP /;"	d
USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_TXMAXP /;"	d
USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI0_TXTYPE /;"	d
USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI0_TXTYPE /;"	d
USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI0_TXTYPE /;"	d
USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI0_TXTYPE /;"	d
USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI0_TXTYPE /;"	d
USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_RXCOUNT /;"	d
USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_RXCOUNT /;"	d
USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_RXCOUNT /;"	d
USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_RXCOUNT /;"	d
USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_RXCOUNT /;"	d
USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_RXCSR /;"	d
USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_RXCSR /;"	d
USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_RXCSR /;"	d
USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_RXCSR /;"	d
USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_RXCSR /;"	d
USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_RXINTERVAL /;"	d
USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_RXINTERVAL /;"	d
USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_RXINTERVAL /;"	d
USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_RXINTERVAL /;"	d
USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_RXINTERVAL /;"	d
USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_RXMAXP /;"	d
USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_RXMAXP /;"	d
USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_RXMAXP /;"	d
USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_RXMAXP /;"	d
USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_RXMAXP /;"	d
USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_RXTYPE /;"	d
USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_RXTYPE /;"	d
USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_RXTYPE /;"	d
USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_RXTYPE /;"	d
USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_RXTYPE /;"	d
USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_TXCOUNT /;"	d
USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_TXCOUNT /;"	d
USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_TXCOUNT /;"	d
USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_TXCOUNT /;"	d
USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_TXCOUNT /;"	d
USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_TXCSR /;"	d
USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_TXCSR /;"	d
USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_TXCSR /;"	d
USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_TXCSR /;"	d
USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_TXCSR /;"	d
USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_TXINTERVAL /;"	d
USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_TXINTERVAL /;"	d
USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_TXINTERVAL /;"	d
USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_TXINTERVAL /;"	d
USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_TXINTERVAL /;"	d
USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_TXMAXP /;"	d
USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_TXMAXP /;"	d
USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_TXMAXP /;"	d
USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_TXMAXP /;"	d
USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_TXMAXP /;"	d
USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI1_TXTYPE /;"	d
USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI1_TXTYPE /;"	d
USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI1_TXTYPE /;"	d
USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI1_TXTYPE /;"	d
USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI1_TXTYPE /;"	d
USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_RXCOUNT /;"	d
USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_RXCOUNT /;"	d
USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_RXCOUNT /;"	d
USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_RXCOUNT /;"	d
USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_RXCOUNT /;"	d
USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_RXCSR /;"	d
USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_RXCSR /;"	d
USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_RXCSR /;"	d
USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_RXCSR /;"	d
USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_RXCSR /;"	d
USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_RXINTERVAL /;"	d
USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_RXINTERVAL /;"	d
USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_RXINTERVAL /;"	d
USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_RXINTERVAL /;"	d
USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_RXINTERVAL /;"	d
USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_RXMAXP /;"	d
USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_RXMAXP /;"	d
USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_RXMAXP /;"	d
USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_RXMAXP /;"	d
USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_RXMAXP /;"	d
USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_RXTYPE /;"	d
USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_RXTYPE /;"	d
USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_RXTYPE /;"	d
USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_RXTYPE /;"	d
USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_RXTYPE /;"	d
USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_TXCOUNT /;"	d
USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_TXCOUNT /;"	d
USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_TXCOUNT /;"	d
USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_TXCOUNT /;"	d
USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_TXCOUNT /;"	d
USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_TXCSR /;"	d
USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_TXCSR /;"	d
USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_TXCSR /;"	d
USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_TXCSR /;"	d
USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_TXCSR /;"	d
USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_TXINTERVAL /;"	d
USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_TXINTERVAL /;"	d
USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_TXINTERVAL /;"	d
USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_TXINTERVAL /;"	d
USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_TXINTERVAL /;"	d
USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_TXMAXP /;"	d
USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_TXMAXP /;"	d
USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_TXMAXP /;"	d
USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_TXMAXP /;"	d
USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_TXMAXP /;"	d
USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI2_TXTYPE /;"	d
USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI2_TXTYPE /;"	d
USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI2_TXTYPE /;"	d
USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI2_TXTYPE /;"	d
USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI2_TXTYPE /;"	d
USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_RXCOUNT /;"	d
USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_RXCOUNT /;"	d
USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_RXCOUNT /;"	d
USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_RXCOUNT /;"	d
USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_RXCOUNT /;"	d
USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_RXCSR /;"	d
USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_RXCSR /;"	d
USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_RXCSR /;"	d
USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_RXCSR /;"	d
USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_RXCSR /;"	d
USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_RXINTERVAL /;"	d
USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_RXINTERVAL /;"	d
USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_RXINTERVAL /;"	d
USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_RXINTERVAL /;"	d
USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_RXINTERVAL /;"	d
USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_RXMAXP /;"	d
USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_RXMAXP /;"	d
USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_RXMAXP /;"	d
USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_RXMAXP /;"	d
USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_RXMAXP /;"	d
USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_RXTYPE /;"	d
USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_RXTYPE /;"	d
USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_RXTYPE /;"	d
USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_RXTYPE /;"	d
USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_RXTYPE /;"	d
USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_TXCOUNT /;"	d
USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_TXCOUNT /;"	d
USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_TXCOUNT /;"	d
USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_TXCOUNT /;"	d
USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_TXCOUNT /;"	d
USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_TXCSR /;"	d
USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_TXCSR /;"	d
USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_TXCSR /;"	d
USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_TXCSR /;"	d
USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_TXCSR /;"	d
USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_TXINTERVAL /;"	d
USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_TXINTERVAL /;"	d
USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_TXINTERVAL /;"	d
USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_TXINTERVAL /;"	d
USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_TXINTERVAL /;"	d
USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_TXMAXP /;"	d
USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_TXMAXP /;"	d
USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_TXMAXP /;"	d
USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_TXMAXP /;"	d
USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_TXMAXP /;"	d
USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI3_TXTYPE /;"	d
USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI3_TXTYPE /;"	d
USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI3_TXTYPE /;"	d
USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI3_TXTYPE /;"	d
USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI3_TXTYPE /;"	d
USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_RXCOUNT /;"	d
USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_RXCOUNT /;"	d
USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_RXCOUNT /;"	d
USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_RXCOUNT /;"	d
USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_RXCOUNT /;"	d
USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_RXCSR /;"	d
USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_RXCSR /;"	d
USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_RXCSR /;"	d
USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_RXCSR /;"	d
USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_RXCSR /;"	d
USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_RXINTERVAL /;"	d
USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_RXINTERVAL /;"	d
USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_RXINTERVAL /;"	d
USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_RXINTERVAL /;"	d
USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_RXINTERVAL /;"	d
USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_RXMAXP /;"	d
USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_RXMAXP /;"	d
USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_RXMAXP /;"	d
USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_RXMAXP /;"	d
USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_RXMAXP /;"	d
USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_RXTYPE /;"	d
USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_RXTYPE /;"	d
USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_RXTYPE /;"	d
USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_RXTYPE /;"	d
USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_RXTYPE /;"	d
USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_TXCOUNT /;"	d
USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_TXCOUNT /;"	d
USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_TXCOUNT /;"	d
USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_TXCOUNT /;"	d
USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_TXCOUNT /;"	d
USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_TXCSR /;"	d
USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_TXCSR /;"	d
USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_TXCSR /;"	d
USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_TXCSR /;"	d
USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_TXCSR /;"	d
USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_TXINTERVAL /;"	d
USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_TXINTERVAL /;"	d
USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_TXINTERVAL /;"	d
USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_TXINTERVAL /;"	d
USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_TXINTERVAL /;"	d
USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_TXMAXP /;"	d
USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_TXMAXP /;"	d
USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_TXMAXP /;"	d
USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_TXMAXP /;"	d
USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_TXMAXP /;"	d
USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI4_TXTYPE /;"	d
USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI4_TXTYPE /;"	d
USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI4_TXTYPE /;"	d
USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI4_TXTYPE /;"	d
USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI4_TXTYPE /;"	d
USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_RXCOUNT /;"	d
USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_RXCOUNT /;"	d
USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_RXCOUNT /;"	d
USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_RXCOUNT /;"	d
USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_RXCOUNT /;"	d
USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_RXCSR /;"	d
USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_RXCSR /;"	d
USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_RXCSR /;"	d
USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_RXCSR /;"	d
USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_RXCSR /;"	d
USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_RXINTERVAL /;"	d
USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_RXINTERVAL /;"	d
USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_RXINTERVAL /;"	d
USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_RXINTERVAL /;"	d
USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_RXINTERVAL /;"	d
USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_RXMAXP /;"	d
USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_RXMAXP /;"	d
USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_RXMAXP /;"	d
USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_RXMAXP /;"	d
USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_RXMAXP /;"	d
USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_RXTYPE /;"	d
USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_RXTYPE /;"	d
USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_RXTYPE /;"	d
USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_RXTYPE /;"	d
USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_RXTYPE /;"	d
USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_TXCOUNT /;"	d
USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_TXCOUNT /;"	d
USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_TXCOUNT /;"	d
USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_TXCOUNT /;"	d
USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_TXCOUNT /;"	d
USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_TXCSR /;"	d
USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_TXCSR /;"	d
USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_TXCSR /;"	d
USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_TXCSR /;"	d
USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_TXCSR /;"	d
USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_TXINTERVAL /;"	d
USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_TXINTERVAL /;"	d
USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_TXINTERVAL /;"	d
USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_TXINTERVAL /;"	d
USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_TXINTERVAL /;"	d
USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_TXMAXP /;"	d
USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_TXMAXP /;"	d
USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_TXMAXP /;"	d
USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_TXMAXP /;"	d
USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_TXMAXP /;"	d
USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI5_TXTYPE /;"	d
USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI5_TXTYPE /;"	d
USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI5_TXTYPE /;"	d
USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI5_TXTYPE /;"	d
USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI5_TXTYPE /;"	d
USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_RXCOUNT /;"	d
USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_RXCOUNT /;"	d
USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_RXCOUNT /;"	d
USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_RXCOUNT /;"	d
USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_RXCOUNT /;"	d
USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_RXCSR /;"	d
USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_RXCSR /;"	d
USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_RXCSR /;"	d
USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_RXCSR /;"	d
USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_RXCSR /;"	d
USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_RXINTERVAL /;"	d
USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_RXINTERVAL /;"	d
USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_RXINTERVAL /;"	d
USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_RXINTERVAL /;"	d
USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_RXINTERVAL /;"	d
USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_RXMAXP /;"	d
USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_RXMAXP /;"	d
USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_RXMAXP /;"	d
USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_RXMAXP /;"	d
USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_RXMAXP /;"	d
USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_RXTYPE /;"	d
USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_RXTYPE /;"	d
USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_RXTYPE /;"	d
USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_RXTYPE /;"	d
USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_RXTYPE /;"	d
USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_TXCOUNT /;"	d
USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_TXCOUNT /;"	d
USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_TXCOUNT /;"	d
USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_TXCOUNT /;"	d
USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_TXCOUNT /;"	d
USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_TXCSR /;"	d
USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_TXCSR /;"	d
USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_TXCSR /;"	d
USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_TXCSR /;"	d
USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_TXCSR /;"	d
USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_TXINTERVAL /;"	d
USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_TXINTERVAL /;"	d
USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_TXINTERVAL /;"	d
USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_TXINTERVAL /;"	d
USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_TXINTERVAL /;"	d
USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_TXMAXP /;"	d
USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_TXMAXP /;"	d
USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_TXMAXP /;"	d
USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_TXMAXP /;"	d
USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_TXMAXP /;"	d
USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI6_TXTYPE /;"	d
USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI6_TXTYPE /;"	d
USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI6_TXTYPE /;"	d
USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI6_TXTYPE /;"	d
USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI6_TXTYPE /;"	d
USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_RXCOUNT /;"	d
USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_RXCOUNT /;"	d
USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_RXCOUNT /;"	d
USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_RXCOUNT /;"	d
USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_RXCOUNT /;"	d
USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_RXCSR /;"	d
USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_RXCSR /;"	d
USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_RXCSR /;"	d
USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_RXCSR /;"	d
USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_RXCSR /;"	d
USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_RXINTERVAL /;"	d
USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_RXINTERVAL /;"	d
USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_RXINTERVAL /;"	d
USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_RXINTERVAL /;"	d
USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_RXINTERVAL /;"	d
USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_RXMAXP /;"	d
USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_RXMAXP /;"	d
USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_RXMAXP /;"	d
USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_RXMAXP /;"	d
USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_RXMAXP /;"	d
USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_RXTYPE /;"	d
USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_RXTYPE /;"	d
USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_RXTYPE /;"	d
USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_RXTYPE /;"	d
USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_RXTYPE /;"	d
USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_TXCOUNT /;"	d
USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_TXCOUNT /;"	d
USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_TXCOUNT /;"	d
USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_TXCOUNT /;"	d
USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_TXCOUNT /;"	d
USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_TXCSR /;"	d
USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_TXCSR /;"	d
USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_TXCSR /;"	d
USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_TXCSR /;"	d
USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_TXCSR /;"	d
USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_TXINTERVAL /;"	d
USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_TXINTERVAL /;"	d
USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_TXINTERVAL /;"	d
USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_TXINTERVAL /;"	d
USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_TXINTERVAL /;"	d
USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_TXMAXP /;"	d
USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_TXMAXP /;"	d
USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_TXMAXP /;"	d
USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_TXMAXP /;"	d
USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_TXMAXP /;"	d
USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_EP_NI7_TXTYPE /;"	d
USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_EP_NI7_TXTYPE /;"	d
USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_EP_NI7_TXTYPE /;"	d
USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_EP_NI7_TXTYPE /;"	d
USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_EP_NI7_TXTYPE /;"	d
USB_EXPECT	post/cpu/mpc8xx/usb.c	/^#define USB_EXPECT(/;"	d	file:
USB_E_BSY	include/usb/mpc8xx_udc.h	/^#define USB_E_BSY	/;"	d
USB_E_IDLE	include/usb/mpc8xx_udc.h	/^#define USB_E_IDLE	/;"	d
USB_E_RESET	include/usb/mpc8xx_udc.h	/^#define USB_E_RESET	/;"	d
USB_E_RXB	include/usb/mpc8xx_udc.h	/^#define USB_E_RXB	/;"	d
USB_E_SOF	include/usb/mpc8xx_udc.h	/^#define USB_E_SOF	/;"	d
USB_E_TXB	include/usb/mpc8xx_udc.h	/^#define USB_E_TXB	/;"	d
USB_E_TXE1	include/usb/mpc8xx_udc.h	/^#define USB_E_TXE1	/;"	d
USB_E_TXE2	include/usb/mpc8xx_udc.h	/^#define USB_E_TXE2	/;"	d
USB_E_TXE3	include/usb/mpc8xx_udc.h	/^#define USB_E_TXE3	/;"	d
USB_E_TXE4	include/usb/mpc8xx_udc.h	/^#define USB_E_TXE4	/;"	d
USB_FADDR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_FADDR /;"	d
USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_FADDR /;"	d
USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_FADDR /;"	d
USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_FADDR /;"	d
USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_FADDR /;"	d
USB_FADDR	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define USB_FADDR /;"	d
USB_FEAT_HALT	include/usb_defs.h	/^#define USB_FEAT_HALT /;"	d
USB_FEAT_TEST	include/usb_defs.h	/^#define USB_FEAT_TEST /;"	d
USB_FEAT_WAKEUP	include/usb_defs.h	/^#define USB_FEAT_WAKEUP /;"	d
USB_FIFO	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define USB_FIFO	/;"	d
USB_FRAME	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_FRAME /;"	d
USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_FRAME /;"	d
USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_FRAME /;"	d
USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_FRAME /;"	d
USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_FRAME /;"	d
USB_FS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_FS_EOF1 /;"	d
USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_FS_EOF1 /;"	d
USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_FS_EOF1 /;"	d
USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_FS_EOF1 /;"	d
USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_FS_EOF1 /;"	d
USB_FULL_30_60MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define USB_FULL_30_60MHZ	/;"	d
USB_FULL_48MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define USB_FULL_48MHZ	/;"	d
USB_FULL_SPEED_OPERATION	include/linux/usb/ch9.h	/^#define USB_FULL_SPEED_OPERATION	/;"	d
USB_FUNCTION_DFU	drivers/dfu/Kconfig	/^config USB_FUNCTION_DFU$/;"	c	menu:DFU support
USB_FUNCTION_FASTBOOT	cmd/fastboot/Kconfig	/^config USB_FUNCTION_FASTBOOT$/;"	c	menu:Fastboot support
USB_GADGET	drivers/usb/gadget/Kconfig	/^menuconfig USB_GADGET$/;"	c
USB_GADGET_ATMEL_USBA	drivers/usb/gadget/Kconfig	/^config USB_GADGET_ATMEL_USBA$/;"	c
USB_GADGET_BCM_UDC_OTG_PHY	drivers/usb/gadget/Kconfig	/^config USB_GADGET_BCM_UDC_OTG_PHY$/;"	c
USB_GADGET_DELAYED_STATUS	include/linux/usb/composite.h	/^#define	USB_GADGET_DELAYED_STATUS	/;"	d
USB_GADGET_DOWNLOAD	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DOWNLOAD$/;"	c
USB_GADGET_DUALSPEED	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DUALSPEED$/;"	c
USB_GADGET_DWC2_OTG	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DWC2_OTG$/;"	c
USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8	drivers/usb/gadget/Kconfig	/^config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8$/;"	c
USB_GADGET_VBUS_DRAW	drivers/usb/gadget/Kconfig	/^config USB_GADGET_VBUS_DRAW$/;"	c
USB_GET_BESL_BASELINE	include/linux/usb/ch9.h	/^#define USB_GET_BESL_BASELINE(/;"	d
USB_GET_BESL_DEEP	include/linux/usb/ch9.h	/^#define USB_GET_BESL_DEEP(/;"	d
USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_GLOBAL_CTL /;"	d
USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_GLOBAL_CTL /;"	d
USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_GLOBAL_CTL /;"	d
USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_GLOBAL_CTL /;"	d
USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_GLOBAL_CTL /;"	d
USB_GLOBINTR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_GLOBINTR /;"	d
USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_GLOBINTR /;"	d
USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_GLOBINTR /;"	d
USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_GLOBINTR /;"	d
USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_GLOBINTR /;"	d
USB_GREEN_LED	board/zyxel/nsa310s/nsa310s.h	/^#define USB_GREEN_LED	/;"	d
USB_H1REGS_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USB_H1REGS_OFFSET	/;"	d	file:
USB_H1_CTRL_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USB_H1_CTRL_OFFSET	/;"	d	file:
USB_H1_VBUS	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define USB_H1_VBUS	/;"	d	file:
USB_H2REGS_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USB_H2REGS_OFFSET	/;"	d	file:
USB_H3REGS_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USB_H3REGS_OFFSET	/;"	d	file:
USB_HIGH_30_60MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define USB_HIGH_30_60MHZ	/;"	d
USB_HIGH_SPEED_OPERATION	include/linux/usb/ch9.h	/^#define USB_HIGH_SPEED_OPERATION	/;"	d
USB_HOST	drivers/usb/host/Kconfig	/^config USB_HOST$/;"	c
USB_HOST1_PWR	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define USB_HOST1_PWR /;"	d	file:
USB_HOST_CONFIG	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USB_HOST_CONFIG /;"	d
USB_HSIC_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	USB_HSIC_CLK_ROOT = 66,$/;"	e	enum:clk_root_index
USB_HSIC_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_SYS_MAIN_480M_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD3_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD5_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
USB_HSIC_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USB_HSIC_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
USB_HS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_HS_EOF1 /;"	d
USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_HS_EOF1 /;"	d
USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_HS_EOF1 /;"	d
USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_HS_EOF1 /;"	d
USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_HS_EOF1 /;"	d
USB_HUB_PORT_MASK	include/usb_defs.h	/^#define USB_HUB_PORT_MASK	/;"	d
USB_INDEX	arch/arm/mach-exynos/spl_boot.c	/^	USB_INDEX,$/;"	e	enum:index	file:
USB_INDEX	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INDEX /;"	d
USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INDEX /;"	d
USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INDEX /;"	d
USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INDEX /;"	d
USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INDEX /;"	d
USB_INIT_DEVICE	include/usb.h	/^	USB_INIT_DEVICE$/;"	e	enum:usb_init_type
USB_INIT_HOST	include/usb.h	/^	USB_INIT_HOST,$/;"	e	enum:usb_init_type
USB_INTERRUPT	include/usb_defs.h	/^#define USB_INTERRUPT /;"	d
USB_INTRF_FUNC_SUSPEND	include/linux/usb/ch9.h	/^#define USB_INTRF_FUNC_SUSPEND	/;"	d
USB_INTRF_FUNC_SUSPEND_LP	include/linux/usb/ch9.h	/^#define USB_INTRF_FUNC_SUSPEND_LP	/;"	d
USB_INTRF_FUNC_SUSPEND_RW	include/linux/usb/ch9.h	/^#define USB_INTRF_FUNC_SUSPEND_RW	/;"	d
USB_INTRRX	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INTRRX /;"	d
USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INTRRX /;"	d
USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INTRRX /;"	d
USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INTRRX /;"	d
USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INTRRX /;"	d
USB_INTRRXE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INTRRXE /;"	d
USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INTRRXE /;"	d
USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INTRRXE /;"	d
USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INTRRXE /;"	d
USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INTRRXE /;"	d
USB_INTRTX	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INTRTX /;"	d
USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INTRTX /;"	d
USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INTRTX /;"	d
USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INTRTX /;"	d
USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INTRTX /;"	d
USB_INTRTXE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INTRTXE /;"	d
USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INTRTXE /;"	d
USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INTRTXE /;"	d
USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INTRTXE /;"	d
USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INTRTXE /;"	d
USB_INTRUSB	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INTRUSB /;"	d
USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INTRUSB /;"	d
USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INTRUSB /;"	d
USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INTRUSB /;"	d
USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INTRUSB /;"	d
USB_INTRUSBE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_INTRUSBE /;"	d
USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_INTRUSBE /;"	d
USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_INTRUSBE /;"	d
USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_INTRUSBE /;"	d
USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_INTRUSBE /;"	d
USB_INTR_FUNC_SUSPEND_OPT_MASK	include/linux/usb/ch9.h	/^#define USB_INTR_FUNC_SUSPEND_OPT_MASK	/;"	d
USB_ISOCHRONOUS	include/usb_defs.h	/^#define USB_ISOCHRONOUS /;"	d
USB_KBD_BOOT_REPORT_SIZE	common/usb_kbd.c	/^#define USB_KBD_BOOT_REPORT_SIZE /;"	d	file:
USB_KBD_BUFFER_LEN	common/usb_kbd.c	/^#define USB_KBD_BUFFER_LEN	/;"	d	file:
USB_KBD_CAPSLOCK	common/usb_kbd.c	/^#define USB_KBD_CAPSLOCK	/;"	d	file:
USB_KBD_CTRL	common/usb_kbd.c	/^#define USB_KBD_CTRL	/;"	d	file:
USB_KBD_LEDMASK	common/usb_kbd.c	/^#define USB_KBD_LEDMASK	/;"	d	file:
USB_KBD_NUMLOCK	common/usb_kbd.c	/^#define USB_KBD_NUMLOCK	/;"	d	file:
USB_KBD_SCROLLLOCK	common/usb_kbd.c	/^#define USB_KBD_SCROLLLOCK	/;"	d	file:
USB_KEYBOARD	drivers/usb/Kconfig	/^config USB_KEYBOARD$/;"	c
USB_LINKINFO	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_LINKINFO /;"	d
USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_LINKINFO /;"	d
USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_LINKINFO /;"	d
USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_LINKINFO /;"	d
USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_LINKINFO /;"	d
USB_LOW_6MHZ	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define USB_LOW_6MHZ	/;"	d
USB_LOW_SPEED_OPERATION	include/linux/usb/ch9.h	/^#define USB_LOW_SPEED_OPERATION	/;"	d
USB_LPM_CTRL	drivers/usb/eth/r8152.h	/^#define USB_LPM_CTRL	/;"	d
USB_LPM_SUPPORT	include/linux/usb/ch9.h	/^#define USB_LPM_SUPPORT	/;"	d
USB_LS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_LS_EOF1 /;"	d
USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_LS_EOF1 /;"	d
USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_LS_EOF1 /;"	d
USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_LS_EOF1 /;"	d
USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_LS_EOF1 /;"	d
USB_LTM_SUPPORT	include/linux/usb/ch9.h	/^#define USB_LTM_SUPPORT	/;"	d
USB_MAXALTSETTING	include/usb.h	/^#define USB_MAXALTSETTING	/;"	d
USB_MAXCHILDREN	include/usb.h	/^#define USB_MAXCHILDREN	/;"	d
USB_MAXCONFIG	include/usb.h	/^#define USB_MAXCONFIG	/;"	d
USB_MAXENDPOINTS	include/usb.h	/^#define USB_MAXENDPOINTS	/;"	d
USB_MAXINTERFACES	include/usb.h	/^#define USB_MAXINTERFACES	/;"	d
USB_MAX_DEVICE	include/usb.h	/^#define USB_MAX_DEVICE	/;"	d
USB_MAX_ETH_DEV	include/usb.h	/^#define USB_MAX_ETH_DEV /;"	d
USB_MAX_HUB	include/usb.h	/^#define USB_MAX_HUB	/;"	d
USB_MAX_PKT	include/usb/mpc8xx_udc.h	/^#define USB_MAX_PKT	/;"	d
USB_MAX_STOR_DEV	include/usb.h	/^#define USB_MAX_STOR_DEV /;"	d
USB_MAX_TEMP_INT_TD	arch/sparc/cpu/leon3/usb_uhci.c	/^#define USB_MAX_TEMP_INT_TD /;"	d	file:
USB_MAX_TEMP_INT_TD	board/mpl/common/usb_uhci.c	/^#define USB_MAX_TEMP_INT_TD /;"	d	file:
USB_MAX_TEMP_TD	arch/sparc/cpu/leon3/usb_uhci.c	/^#define USB_MAX_TEMP_TD /;"	d	file:
USB_MAX_TEMP_TD	board/mpl/common/usb_uhci.c	/^#define USB_MAX_TEMP_TD /;"	d	file:
USB_MAX_XFER_BLK	common/usb_storage.c	/^#define USB_MAX_XFER_BLK	/;"	d	file:
USB_MENTOR_CORE_OFFSET	drivers/usb/musb-new/am35x.c	/^#define USB_MENTOR_CORE_OFFSET	/;"	d	file:
USB_MISC_0	drivers/usb/eth/r8152.h	/^#define USB_MISC_0	/;"	d
USB_MODE	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config USB_MODE$/;"	c	choice:choice5ba020940104
USB_MODE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define USB_MODE	/;"	d
USB_MSC_BBB_GET_MAX_LUN	drivers/usb/musb/musb_hcd.c	/^#define USB_MSC_BBB_GET_MAX_LUN	/;"	d	file:
USB_MSC_BBB_RESET	drivers/usb/musb/musb_hcd.c	/^#define USB_MSC_BBB_RESET /;"	d	file:
USB_MUSB_GADGET	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_GADGET$/;"	c
USB_MUSB_HOST	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_HOST$/;"	c
USB_MUSB_PIC32	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_PIC32$/;"	c
USB_MUSB_SUNXI	drivers/usb/musb-new/Kconfig	/^config USB_MUSB_SUNXI$/;"	c
USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_NAKLIMIT0 /;"	d
USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_NAKLIMIT0 /;"	d
USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_NAKLIMIT0 /;"	d
USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_NAKLIMIT0 /;"	d
USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_NAKLIMIT0 /;"	d
USB_NC_REG_OFFSET	drivers/usb/host/ehci-vf.c	/^#define USB_NC_REG_OFFSET	/;"	d	file:
USB_NET_NAME	drivers/usb/gadget/ether.c	/^#define USB_NET_NAME /;"	d	file:
USB_OC_PIN_SKIP	arch/x86/include/asm/arch-broadwell/pei_data.h	/^#define USB_OC_PIN_SKIP /;"	d
USB_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define USB_OFFSET	/;"	d
USB_OFFSET	drivers/usb/musb-new/musb_regs.h	/^#define USB_OFFSET(/;"	d
USB_OHCI_BASE	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USB_OHCI_BASE /;"	d
USB_OHCI_GENERIC	drivers/usb/host/Kconfig	/^config USB_OHCI_GENERIC$/;"	c
USB_OHCI_HCD	drivers/usb/host/Kconfig	/^config USB_OHCI_HCD$/;"	c
USB_OHCI_LEN	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define USB_OHCI_LEN /;"	d
USB_OTGREGS_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USB_OTGREGS_OFFSET	/;"	d	file:
USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_OTG_DEV_CTL /;"	d
USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_OTG_DEV_CTL /;"	d
USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_OTG_DEV_CTL /;"	d
USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_OTG_DEV_CTL /;"	d
USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_OTG_DEV_CTL /;"	d
USB_OTG_HNP	include/linux/usb/ch9.h	/^#define USB_OTG_HNP	/;"	d
USB_OTG_PWR	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define USB_OTG_PWR /;"	d	file:
USB_OTG_SRP	include/linux/usb/ch9.h	/^#define USB_OTG_SRP	/;"	d
USB_OTG_SS1_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB_OTG_SS1_BASE	/;"	d
USB_OTG_SS1_GLUE_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB_OTG_SS1_GLUE_BASE	/;"	d
USB_OTG_SS2_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB_OTG_SS2_BASE	/;"	d
USB_OTG_SS2_GLUE_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define USB_OTG_SS2_GLUE_BASE	/;"	d
USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_OTG_VBUS_IRQ /;"	d
USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_OTG_VBUS_IRQ /;"	d
USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_OTG_VBUS_IRQ /;"	d
USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_OTG_VBUS_IRQ /;"	d
USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_OTG_VBUS_IRQ /;"	d
USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_OTG_VBUS_MASK /;"	d
USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_OTG_VBUS_MASK /;"	d
USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_OTG_VBUS_MASK /;"	d
USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_OTG_VBUS_MASK /;"	d
USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_OTG_VBUS_MASK /;"	d
USB_OTHERREGS_OFFSET	board/ccv/xpress/xpress.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/freescale/mx6qarm2/mx6qarm2.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/freescale/mx6sabresd/mx6sabresd.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/freescale/mx6slevk/mx6slevk.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_OTHERREGS_OFFSET	drivers/usb/host/ehci-mx6.c	/^#define USB_OTHERREGS_OFFSET	/;"	d	file:
USB_PEN_GPIO	board/toradex/colibri_vf/colibri_vf.c	/^#define USB_PEN_GPIO /;"	d	file:
USB_PHY0_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USB_PHY0_BASE_ADDR /;"	d
USB_PHY0_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define USB_PHY0_BASE_ADDR /;"	d
USB_PHY1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USB_PHY1_BASE_ADDR /;"	d
USB_PHY1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define USB_PHY1_BASE_ADDR /;"	d
USB_PHY_CLK_VALID	arch/arm/include/asm/arch-tegra/usb.h	/^#define USB_PHY_CLK_VALID	/;"	d
USB_PHY_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define USB_PHY_CTL /;"	d
USB_PHY_CTRL	drivers/usb/eth/r8152.h	/^#define USB_PHY_CTRL	/;"	d
USB_PHY_CTRL_EN0	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define USB_PHY_CTRL_EN0 /;"	d
USB_PHY_TEST	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_PHY_TEST /;"	d
USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_PHY_TEST /;"	d
USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_PHY_TEST /;"	d
USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_PHY_TEST /;"	d
USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_PHY_TEST /;"	d
USB_PID_ACK	include/usb_defs.h	/^#define USB_PID_ACK /;"	d
USB_PID_ACK	include/usbdevice.h	/^#define USB_PID_ACK	/;"	d
USB_PID_DATA0	include/usb_defs.h	/^#define USB_PID_DATA0 /;"	d
USB_PID_DATA0	include/usbdevice.h	/^#define USB_PID_DATA0	/;"	d
USB_PID_DATA1	include/usb_defs.h	/^#define USB_PID_DATA1 /;"	d
USB_PID_DATA1	include/usbdevice.h	/^#define USB_PID_DATA1	/;"	d
USB_PID_DATA2	include/usbdevice.h	/^#define USB_PID_DATA2	/;"	d
USB_PID_ERR	include/usbdevice.h	/^#define USB_PID_ERR	/;"	d
USB_PID_IN	include/usb_defs.h	/^#define USB_PID_IN /;"	d
USB_PID_IN	include/usbdevice.h	/^#define USB_PID_IN	/;"	d
USB_PID_MDATA	include/usbdevice.h	/^#define USB_PID_MDATA	/;"	d
USB_PID_NAK	include/usb_defs.h	/^#define USB_PID_NAK /;"	d
USB_PID_NAK	include/usbdevice.h	/^#define USB_PID_NAK	/;"	d
USB_PID_NYET	include/usbdevice.h	/^#define USB_PID_NYET	/;"	d
USB_PID_OUT	include/usb_defs.h	/^#define USB_PID_OUT /;"	d
USB_PID_OUT	include/usbdevice.h	/^#define USB_PID_OUT	/;"	d
USB_PID_PING	include/usbdevice.h	/^#define USB_PID_PING	/;"	d
USB_PID_PREAMBLE	include/usb_defs.h	/^#define USB_PID_PREAMBLE /;"	d
USB_PID_PREAMBLE	include/usbdevice.h	/^#define USB_PID_PREAMBLE	/;"	d
USB_PID_SETUP	include/usb_defs.h	/^#define USB_PID_SETUP /;"	d
USB_PID_SETUP	include/usbdevice.h	/^#define USB_PID_SETUP	/;"	d
USB_PID_SOF	include/usb_defs.h	/^#define USB_PID_SOF /;"	d
USB_PID_SOF	include/usbdevice.h	/^#define USB_PID_SOF	/;"	d
USB_PID_SPLIT	include/usbdevice.h	/^#define USB_PID_SPLIT	/;"	d
USB_PID_STALL	include/usb_defs.h	/^#define USB_PID_STALL /;"	d
USB_PID_STALL	include/usbdevice.h	/^#define USB_PID_STALL	/;"	d
USB_PID_UNDEF_0	include/usb_defs.h	/^#define USB_PID_UNDEF_0 /;"	d
USB_PID_UNDEF_0	include/usbdevice.h	/^#define USB_PID_UNDEF_0	/;"	d
USB_PID_UNDEF_4	include/usb_defs.h	/^#define USB_PID_UNDEF_4 /;"	d
USB_PID_UNDEF_6	include/usb_defs.h	/^#define USB_PID_UNDEF_6 /;"	d
USB_PID_UNDEF_7	include/usb_defs.h	/^#define USB_PID_UNDEF_7 /;"	d
USB_PID_UNDEF_8	include/usb_defs.h	/^#define USB_PID_UNDEF_8 /;"	d
USB_PID_UNDEF_F	include/usb_defs.h	/^#define USB_PID_UNDEF_F /;"	d
USB_PINMUX	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define USB_PINMUX /;"	d
USB_PIPE_DEV_MASK	include/usb_defs.h	/^#define USB_PIPE_DEV_MASK	/;"	d
USB_PIPE_DEV_SHIFT	include/usb_defs.h	/^#define USB_PIPE_DEV_SHIFT	/;"	d
USB_PIPE_EP_MASK	include/usb_defs.h	/^#define USB_PIPE_EP_MASK	/;"	d
USB_PIPE_EP_SHIFT	include/usb_defs.h	/^#define USB_PIPE_EP_SHIFT	/;"	d
USB_PIPE_TYPE_MASK	include/usb_defs.h	/^#define USB_PIPE_TYPE_MASK	/;"	d
USB_PIPE_TYPE_SHIFT	include/usb_defs.h	/^#define USB_PIPE_TYPE_SHIFT	/;"	d
USB_PL301_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USB_PL301_BASE_ADDR /;"	d
USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_PLLOSC_CTRL /;"	d
USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_PLLOSC_CTRL /;"	d
USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_PLLOSC_CTRL /;"	d
USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_PLLOSC_CTRL /;"	d
USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_PLLOSC_CTRL /;"	d
USB_PLL_OSC	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define USB_PLL_OSC /;"	d
USB_PM_CTRL_STATUS	drivers/usb/eth/r8152.h	/^#define USB_PM_CTRL_STATUS	/;"	d
USB_PORT_BACK_PANEL	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_BACK_PANEL = 0,$/;"	e	enum:usb2_port_location
USB_PORT_DOCK	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_DOCK,$/;"	e	enum:usb2_port_location
USB_PORT_FEAT_CONNECTION	include/usb_defs.h	/^#define USB_PORT_FEAT_CONNECTION /;"	d
USB_PORT_FEAT_C_CONNECTION	include/usb_defs.h	/^#define USB_PORT_FEAT_C_CONNECTION /;"	d
USB_PORT_FEAT_C_ENABLE	include/usb_defs.h	/^#define USB_PORT_FEAT_C_ENABLE /;"	d
USB_PORT_FEAT_C_OVER_CURRENT	include/usb_defs.h	/^#define USB_PORT_FEAT_C_OVER_CURRENT /;"	d
USB_PORT_FEAT_C_RESET	include/usb_defs.h	/^#define USB_PORT_FEAT_C_RESET /;"	d
USB_PORT_FEAT_C_SUSPEND	include/usb_defs.h	/^#define USB_PORT_FEAT_C_SUSPEND /;"	d
USB_PORT_FEAT_ENABLE	include/usb_defs.h	/^#define USB_PORT_FEAT_ENABLE /;"	d
USB_PORT_FEAT_HIGHSPEED	include/usb_defs.h	/^#define USB_PORT_FEAT_HIGHSPEED /;"	d
USB_PORT_FEAT_LOWSPEED	include/usb_defs.h	/^#define USB_PORT_FEAT_LOWSPEED /;"	d
USB_PORT_FEAT_OVER_CURRENT	include/usb_defs.h	/^#define USB_PORT_FEAT_OVER_CURRENT /;"	d
USB_PORT_FEAT_POWER	include/usb_defs.h	/^#define USB_PORT_FEAT_POWER /;"	d
USB_PORT_FEAT_RESET	include/usb_defs.h	/^#define USB_PORT_FEAT_RESET /;"	d
USB_PORT_FEAT_SUSPEND	include/usb_defs.h	/^#define USB_PORT_FEAT_SUSPEND /;"	d
USB_PORT_FEAT_TEST	include/usb_defs.h	/^#define USB_PORT_FEAT_TEST /;"	d
USB_PORT_FLEX	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_FLEX,$/;"	e	enum:usb2_port_location
USB_PORT_FRONT_PANEL	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_FRONT_PANEL,$/;"	e	enum:usb2_port_location
USB_PORT_INTERNAL	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_INTERNAL,$/;"	e	enum:usb2_port_location
USB_PORT_MINI_PCIE	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_MINI_PCIE,$/;"	e	enum:usb2_port_location
USB_PORT_NGFF_DEVICE_DOWN	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_NGFF_DEVICE_DOWN,$/;"	e	enum:usb2_port_location
USB_PORT_SKIP	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	USB_PORT_SKIP,$/;"	e	enum:usb2_port_location
USB_PORT_STAT_CONNECTION	include/usb_defs.h	/^#define USB_PORT_STAT_CONNECTION /;"	d
USB_PORT_STAT_C_CONNECTION	include/usb_defs.h	/^#define USB_PORT_STAT_C_CONNECTION /;"	d
USB_PORT_STAT_C_ENABLE	include/usb_defs.h	/^#define USB_PORT_STAT_C_ENABLE /;"	d
USB_PORT_STAT_C_OVERCURRENT	include/usb_defs.h	/^#define USB_PORT_STAT_C_OVERCURRENT /;"	d
USB_PORT_STAT_C_RESET	include/usb_defs.h	/^#define USB_PORT_STAT_C_RESET /;"	d
USB_PORT_STAT_C_SUSPEND	include/usb_defs.h	/^#define USB_PORT_STAT_C_SUSPEND /;"	d
USB_PORT_STAT_ENABLE	include/usb_defs.h	/^#define USB_PORT_STAT_ENABLE /;"	d
USB_PORT_STAT_HIGH_SPEED	include/usb_defs.h	/^#define USB_PORT_STAT_HIGH_SPEED /;"	d
USB_PORT_STAT_LOW_SPEED	include/usb_defs.h	/^#define USB_PORT_STAT_LOW_SPEED /;"	d
USB_PORT_STAT_OVERCURRENT	include/usb_defs.h	/^#define USB_PORT_STAT_OVERCURRENT /;"	d
USB_PORT_STAT_POWER	include/usb_defs.h	/^#define USB_PORT_STAT_POWER /;"	d
USB_PORT_STAT_RESET	include/usb_defs.h	/^#define USB_PORT_STAT_RESET /;"	d
USB_PORT_STAT_SPEED_MASK	include/usb_defs.h	/^#define USB_PORT_STAT_SPEED_MASK	/;"	d
USB_PORT_STAT_SUPER_SPEED	include/usb_defs.h	/^#define USB_PORT_STAT_SUPER_SPEED /;"	d
USB_PORT_STAT_SUSPEND	include/usb_defs.h	/^#define USB_PORT_STAT_SUSPEND /;"	d
USB_POWER	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_POWER /;"	d
USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_POWER /;"	d
USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_POWER /;"	d
USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_POWER /;"	d
USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_POWER /;"	d
USB_POWER	board/zyxel/nsa310s/nsa310s.h	/^#define USB_POWER	/;"	d
USB_POWER_CUT	drivers/usb/eth/r8152.h	/^#define USB_POWER_CUT	/;"	d
USB_PRODUCT_ID_LSB	include/twl6030.h	/^#define USB_PRODUCT_ID_LSB	/;"	d
USB_PROT_HID_KEYBOARD	include/usb_defs.h	/^#define USB_PROT_HID_KEYBOARD /;"	d
USB_PROT_HID_MOUSE	include/usb_defs.h	/^#define USB_PROT_HID_MOUSE /;"	d
USB_PROT_HID_NONE	include/usb_defs.h	/^#define USB_PROT_HID_NONE /;"	d
USB_PR_BULK	drivers/usb/gadget/storage_common.c	/^#define USB_PR_BULK	/;"	d	file:
USB_PR_CB	drivers/usb/gadget/storage_common.c	/^#define USB_PR_CB	/;"	d	file:
USB_PR_CBI	drivers/usb/gadget/storage_common.c	/^#define USB_PR_CBI	/;"	d	file:
USB_READY	common/usb_storage.c	/^#	define USB_READY	/;"	d	file:
USB_RECIP_DEVICE	include/linux/usb/ch9.h	/^#define USB_RECIP_DEVICE	/;"	d
USB_RECIP_DEVICE	include/usb_defs.h	/^#define USB_RECIP_DEVICE /;"	d
USB_RECIP_DEVICE	include/usbdevice.h	/^#define USB_RECIP_DEVICE	/;"	d
USB_RECIP_ENDPOINT	include/linux/usb/ch9.h	/^#define USB_RECIP_ENDPOINT	/;"	d
USB_RECIP_ENDPOINT	include/usb_defs.h	/^#define USB_RECIP_ENDPOINT /;"	d
USB_RECIP_ENDPOINT	include/usbdevice.h	/^#define USB_RECIP_ENDPOINT	/;"	d
USB_RECIP_INTERFACE	include/linux/usb/ch9.h	/^#define USB_RECIP_INTERFACE	/;"	d
USB_RECIP_INTERFACE	include/usb_defs.h	/^#define USB_RECIP_INTERFACE /;"	d
USB_RECIP_INTERFACE	include/usbdevice.h	/^#define USB_RECIP_INTERFACE	/;"	d
USB_RECIP_MASK	include/linux/usb/ch9.h	/^#define USB_RECIP_MASK	/;"	d
USB_RECIP_OTHER	include/linux/usb/ch9.h	/^#define USB_RECIP_OTHER	/;"	d
USB_RECIP_OTHER	include/usb_defs.h	/^#define USB_RECIP_OTHER /;"	d
USB_RECIP_OTHER	include/usbdevice.h	/^#define USB_RECIP_OTHER	/;"	d
USB_RECIP_PORT	include/linux/usb/ch9.h	/^#define USB_RECIP_PORT	/;"	d
USB_RECIP_RPIPE	include/linux/usb/ch9.h	/^#define USB_RECIP_RPIPE	/;"	d
USB_REQ_CLEAR_FEATURE	include/linux/usb/ch9.h	/^#define USB_REQ_CLEAR_FEATURE	/;"	d
USB_REQ_CLEAR_FEATURE	include/usb_defs.h	/^#define USB_REQ_CLEAR_FEATURE /;"	d
USB_REQ_CLEAR_FEATURE	include/usbdevice.h	/^#define USB_REQ_CLEAR_FEATURE	/;"	d
USB_REQ_DEVICE2HOST	include/usbdevice.h	/^#define USB_REQ_DEVICE2HOST	/;"	d
USB_REQ_DFU_ABORT	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_ABORT	/;"	d
USB_REQ_DFU_CLRSTATUS	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_CLRSTATUS	/;"	d
USB_REQ_DFU_DETACH	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_DETACH	/;"	d
USB_REQ_DFU_DNLOAD	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_DNLOAD	/;"	d
USB_REQ_DFU_GETSTATE	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_GETSTATE	/;"	d
USB_REQ_DFU_GETSTATUS	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_GETSTATUS	/;"	d
USB_REQ_DFU_UPLOAD	drivers/usb/gadget/f_dfu.h	/^#define USB_REQ_DFU_UPLOAD	/;"	d
USB_REQ_DIRECTION_MASK	include/usbdevice.h	/^#define USB_REQ_DIRECTION_MASK	/;"	d
USB_REQ_GET_CONFIGURATION	include/linux/usb/ch9.h	/^#define USB_REQ_GET_CONFIGURATION	/;"	d
USB_REQ_GET_CONFIGURATION	include/usb_defs.h	/^#define USB_REQ_GET_CONFIGURATION /;"	d
USB_REQ_GET_CONFIGURATION	include/usbdevice.h	/^#define USB_REQ_GET_CONFIGURATION	/;"	d
USB_REQ_GET_DESCRIPTOR	include/linux/usb/ch9.h	/^#define USB_REQ_GET_DESCRIPTOR	/;"	d
USB_REQ_GET_DESCRIPTOR	include/usb_defs.h	/^#define USB_REQ_GET_DESCRIPTOR /;"	d
USB_REQ_GET_DESCRIPTOR	include/usbdevice.h	/^#define USB_REQ_GET_DESCRIPTOR	/;"	d
USB_REQ_GET_ENCRYPTION	include/linux/usb/ch9.h	/^#define USB_REQ_GET_ENCRYPTION	/;"	d
USB_REQ_GET_HANDSHAKE	include/linux/usb/ch9.h	/^#define USB_REQ_GET_HANDSHAKE	/;"	d
USB_REQ_GET_IDLE	include/usb_defs.h	/^#define USB_REQ_GET_IDLE /;"	d
USB_REQ_GET_IDLE	include/usbdevice.h	/^#define USB_REQ_GET_IDLE	/;"	d
USB_REQ_GET_INTERFACE	include/linux/usb/ch9.h	/^#define USB_REQ_GET_INTERFACE	/;"	d
USB_REQ_GET_INTERFACE	include/usb_defs.h	/^#define USB_REQ_GET_INTERFACE /;"	d
USB_REQ_GET_INTERFACE	include/usbdevice.h	/^#define USB_REQ_GET_INTERFACE	/;"	d
USB_REQ_GET_PROTOCOL	include/usb_defs.h	/^#define USB_REQ_GET_PROTOCOL /;"	d
USB_REQ_GET_PROTOCOL	include/usbdevice.h	/^#define USB_REQ_GET_PROTOCOL	/;"	d
USB_REQ_GET_REPORT	include/usb_defs.h	/^#define USB_REQ_GET_REPORT /;"	d
USB_REQ_GET_REPORT	include/usbdevice.h	/^#define USB_REQ_GET_REPORT	/;"	d
USB_REQ_GET_SECURITY_DATA	include/linux/usb/ch9.h	/^#define USB_REQ_GET_SECURITY_DATA	/;"	d
USB_REQ_GET_STATUS	include/linux/usb/ch9.h	/^#define USB_REQ_GET_STATUS	/;"	d
USB_REQ_GET_STATUS	include/usb_defs.h	/^#define USB_REQ_GET_STATUS /;"	d
USB_REQ_GET_STATUS	include/usbdevice.h	/^#define USB_REQ_GET_STATUS	/;"	d
USB_REQ_HOST2DEVICE	include/usbdevice.h	/^#define USB_REQ_HOST2DEVICE	/;"	d
USB_REQ_LOOPBACK_DATA_READ	include/linux/usb/ch9.h	/^#define USB_REQ_LOOPBACK_DATA_READ	/;"	d
USB_REQ_LOOPBACK_DATA_WRITE	include/linux/usb/ch9.h	/^#define USB_REQ_LOOPBACK_DATA_WRITE	/;"	d
USB_REQ_RECIPIENT_DEVICE	include/usbdevice.h	/^#define USB_REQ_RECIPIENT_DEVICE	/;"	d
USB_REQ_RECIPIENT_ENDPOINT	include/usbdevice.h	/^#define USB_REQ_RECIPIENT_ENDPOINT	/;"	d
USB_REQ_RECIPIENT_INTERFACE	include/usbdevice.h	/^#define USB_REQ_RECIPIENT_INTERFACE	/;"	d
USB_REQ_RECIPIENT_MASK	include/usbdevice.h	/^#define USB_REQ_RECIPIENT_MASK	/;"	d
USB_REQ_RECIPIENT_OTHER	include/usbdevice.h	/^#define USB_REQ_RECIPIENT_OTHER	/;"	d
USB_REQ_RPIPE_ABORT	include/linux/usb/ch9.h	/^#define USB_REQ_RPIPE_ABORT	/;"	d
USB_REQ_RPIPE_RESET	include/linux/usb/ch9.h	/^#define USB_REQ_RPIPE_RESET	/;"	d
USB_REQ_SET_ADDRESS	include/linux/usb/ch9.h	/^#define USB_REQ_SET_ADDRESS	/;"	d
USB_REQ_SET_ADDRESS	include/usb_defs.h	/^#define USB_REQ_SET_ADDRESS /;"	d
USB_REQ_SET_ADDRESS	include/usbdevice.h	/^#define USB_REQ_SET_ADDRESS	/;"	d
USB_REQ_SET_CONFIGURATION	include/linux/usb/ch9.h	/^#define USB_REQ_SET_CONFIGURATION	/;"	d
USB_REQ_SET_CONFIGURATION	include/usb_defs.h	/^#define USB_REQ_SET_CONFIGURATION /;"	d
USB_REQ_SET_CONFIGURATION	include/usbdevice.h	/^#define USB_REQ_SET_CONFIGURATION	/;"	d
USB_REQ_SET_CONNECTION	include/linux/usb/ch9.h	/^#define USB_REQ_SET_CONNECTION	/;"	d
USB_REQ_SET_DESCRIPTOR	include/linux/usb/ch9.h	/^#define USB_REQ_SET_DESCRIPTOR	/;"	d
USB_REQ_SET_DESCRIPTOR	include/usb_defs.h	/^#define USB_REQ_SET_DESCRIPTOR /;"	d
USB_REQ_SET_DESCRIPTOR	include/usbdevice.h	/^#define USB_REQ_SET_DESCRIPTOR	/;"	d
USB_REQ_SET_ENCRYPTION	include/linux/usb/ch9.h	/^#define USB_REQ_SET_ENCRYPTION	/;"	d
USB_REQ_SET_FEATURE	include/linux/usb/ch9.h	/^#define USB_REQ_SET_FEATURE	/;"	d
USB_REQ_SET_FEATURE	include/usb_defs.h	/^#define USB_REQ_SET_FEATURE /;"	d
USB_REQ_SET_FEATURE	include/usbdevice.h	/^#define USB_REQ_SET_FEATURE	/;"	d
USB_REQ_SET_HANDSHAKE	include/linux/usb/ch9.h	/^#define USB_REQ_SET_HANDSHAKE	/;"	d
USB_REQ_SET_IDLE	include/usb_defs.h	/^#define USB_REQ_SET_IDLE /;"	d
USB_REQ_SET_IDLE	include/usbdevice.h	/^#define USB_REQ_SET_IDLE	/;"	d
USB_REQ_SET_INTERFACE	include/linux/usb/ch9.h	/^#define USB_REQ_SET_INTERFACE	/;"	d
USB_REQ_SET_INTERFACE	include/usb_defs.h	/^#define USB_REQ_SET_INTERFACE /;"	d
USB_REQ_SET_INTERFACE	include/usbdevice.h	/^#define USB_REQ_SET_INTERFACE	/;"	d
USB_REQ_SET_INTERFACE_DS	include/linux/usb/ch9.h	/^#define USB_REQ_SET_INTERFACE_DS	/;"	d
USB_REQ_SET_ISOCH_DELAY	include/linux/usb/ch9.h	/^#define USB_REQ_SET_ISOCH_DELAY	/;"	d
USB_REQ_SET_PROTOCOL	include/usb_defs.h	/^#define USB_REQ_SET_PROTOCOL /;"	d
USB_REQ_SET_PROTOCOL	include/usbdevice.h	/^#define USB_REQ_SET_PROTOCOL	/;"	d
USB_REQ_SET_REPORT	include/usb_defs.h	/^#define USB_REQ_SET_REPORT /;"	d
USB_REQ_SET_REPORT	include/usbdevice.h	/^#define USB_REQ_SET_REPORT	/;"	d
USB_REQ_SET_SECURITY_DATA	include/linux/usb/ch9.h	/^#define USB_REQ_SET_SECURITY_DATA	/;"	d
USB_REQ_SET_SEL	include/linux/usb/ch9.h	/^#define USB_REQ_SET_SEL	/;"	d
USB_REQ_SET_WUSB_DATA	include/linux/usb/ch9.h	/^#define USB_REQ_SET_WUSB_DATA	/;"	d
USB_REQ_SYNCH_FRAME	include/linux/usb/ch9.h	/^#define USB_REQ_SYNCH_FRAME	/;"	d
USB_REQ_SYNCH_FRAME	include/usb_defs.h	/^#define USB_REQ_SYNCH_FRAME /;"	d
USB_REQ_SYNCH_FRAME	include/usbdevice.h	/^#define USB_REQ_SYNCH_FRAME	/;"	d
USB_REQ_TYPE_CLASS	include/usbdevice.h	/^#define USB_REQ_TYPE_CLASS	/;"	d
USB_REQ_TYPE_MASK	include/usbdevice.h	/^#define USB_REQ_TYPE_MASK	/;"	d
USB_REQ_TYPE_STANDARD	include/usbdevice.h	/^#define USB_REQ_TYPE_STANDARD	/;"	d
USB_REQ_TYPE_VENDOR	include/usbdevice.h	/^#define USB_REQ_TYPE_VENDOR	/;"	d
USB_REVISION_REG	drivers/usb/musb-new/am35x.c	/^#define USB_REVISION_REG	/;"	d	file:
USB_RH_PRINTF	arch/sparc/cpu/leon3/usb_uhci.c	/^#define	USB_RH_PRINTF(/;"	d	file:
USB_RH_PRINTF	arch/sparc/cpu/leon3/usb_uhci.c	/^#define USB_RH_PRINTF(/;"	d	file:
USB_RH_PRINTF	board/mpl/common/usb_uhci.c	/^#define	USB_RH_PRINTF(/;"	d	file:
USB_RH_PRINTF	board/mpl/common/usb_uhci.c	/^#define USB_RH_PRINTF(/;"	d	file:
USB_RT_HUB	include/usb_defs.h	/^#define USB_RT_HUB	/;"	d
USB_RT_PORT	include/usb_defs.h	/^#define USB_RT_PORT	/;"	d
USB_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_RXCOUNT /;"	d
USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_RXCOUNT /;"	d
USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_RXCOUNT /;"	d
USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_RXCOUNT /;"	d
USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_RXCOUNT /;"	d
USB_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_RXCSR /;"	d
USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_RXCSR /;"	d
USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_RXCSR /;"	d
USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_RXCSR /;"	d
USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_RXCSR /;"	d
USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_RXINTERVAL /;"	d
USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_RXINTERVAL /;"	d
USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_RXINTERVAL /;"	d
USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_RXINTERVAL /;"	d
USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_RXINTERVAL /;"	d
USB_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_RXTYPE /;"	d
USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_RXTYPE /;"	d
USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_RXTYPE /;"	d
USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_RXTYPE /;"	d
USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_RXTYPE /;"	d
USB_RX_BUF_TH	drivers/usb/eth/r8152.h	/^#define USB_RX_BUF_TH	/;"	d
USB_RX_EARLY_SIZE	drivers/usb/eth/r8152.h	/^#define USB_RX_EARLY_SIZE	/;"	d
USB_RX_EARLY_TIMEOUT	drivers/usb/eth/r8152.h	/^#define USB_RX_EARLY_TIMEOUT	/;"	d
USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_RX_MAX_PACKET /;"	d
USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_RX_MAX_PACKET /;"	d
USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_RX_MAX_PACKET /;"	d
USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_RX_MAX_PACKET /;"	d
USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_RX_MAX_PACKET /;"	d
USB_SBUSCFG_AHBBRST_INCR16	drivers/usb/host/ehci-marvell.c	/^#define USB_SBUSCFG_AHBBRST_INCR16	/;"	d	file:
USB_SBUSCFG_AHBBRST_OFF	drivers/usb/host/ehci-marvell.c	/^#define USB_SBUSCFG_AHBBRST_OFF	/;"	d	file:
USB_SBUSCFG_BARD_ALIGN_64B	drivers/usb/host/ehci-marvell.c	/^#define USB_SBUSCFG_BARD_ALIGN_64B	/;"	d	file:
USB_SBUSCFG_BARD_OFF	drivers/usb/host/ehci-marvell.c	/^#define USB_SBUSCFG_BARD_OFF	/;"	d	file:
USB_SBUSCFG_BAWR_ALIGN_64B	drivers/usb/host/ehci-marvell.c	/^#define USB_SBUSCFG_BAWR_ALIGN_64B	/;"	d	file:
USB_SBUSCFG_BAWR_OFF	drivers/usb/host/ehci-marvell.c	/^#define USB_SBUSCFG_BAWR_OFF	/;"	d	file:
USB_SC_8020	drivers/usb/gadget/storage_common.c	/^#define USB_SC_8020	/;"	d	file:
USB_SC_8070	drivers/usb/gadget/storage_common.c	/^#define USB_SC_8070	/;"	d	file:
USB_SC_QIC	drivers/usb/gadget/storage_common.c	/^#define USB_SC_QIC	/;"	d	file:
USB_SC_RBC	drivers/usb/gadget/storage_common.c	/^#define USB_SC_RBC	/;"	d	file:
USB_SC_SCSI	drivers/usb/gadget/storage_common.c	/^#define USB_SC_SCSI	/;"	d	file:
USB_SC_UFI	drivers/usb/gadget/storage_common.c	/^#define USB_SC_UFI	/;"	d	file:
USB_SELF_POWER_VBUS_MAX_DRAW	include/linux/usb/ch9.h	/^#define USB_SELF_POWER_VBUS_MAX_DRAW	/;"	d
USB_SPEED_FULL	include/linux/usb/ch9.h	/^	USB_SPEED_LOW, USB_SPEED_FULL,		\/* usb 1.1 *\/$/;"	e	enum:usb_device_speed
USB_SPEED_HIGH	include/linux/usb/ch9.h	/^	USB_SPEED_HIGH,				\/* usb 2.0 *\/$/;"	e	enum:usb_device_speed
USB_SPEED_LOW	include/linux/usb/ch9.h	/^	USB_SPEED_LOW, USB_SPEED_FULL,		\/* usb 1.1 *\/$/;"	e	enum:usb_device_speed
USB_SPEED_SUPER	include/linux/usb/ch9.h	/^	USB_SPEED_SUPER,			\/* usb 3.0 *\/$/;"	e	enum:usb_device_speed
USB_SPEED_UNKNOWN	include/linux/usb/ch9.h	/^	USB_SPEED_UNKNOWN = 0,			\/* enumerating *\/$/;"	e	enum:usb_device_speed
USB_SPEED_WIRELESS	include/linux/usb/ch9.h	/^	USB_SPEED_WIRELESS,			\/* wireless (usb 2.5) *\/$/;"	e	enum:usb_device_speed
USB_SPH_AXICLK_EN	arch/arm/include/asm/arch-armada100/armada100.h	/^#define USB_SPH_AXICLK_EN	/;"	d
USB_SPH_AXI_RST	arch/arm/include/asm/arch-armada100/armada100.h	/^#define USB_SPH_AXI_RST	/;"	d
USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_SRP_CLKDIV /;"	d
USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_SRP_CLKDIV /;"	d
USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_SRP_CLKDIV /;"	d
USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_SRP_CLKDIV /;"	d
USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_SRP_CLKDIV /;"	d
USB_SRP_FIX_TIME_REG	drivers/usb/musb-new/am35x.c	/^#define USB_SRP_FIX_TIME_REG	/;"	d	file:
USB_SSPHYLINK2	drivers/usb/eth/r8152.h	/^#define USB_SSPHYLINK2	/;"	d
USB_SS_CAP_TYPE	include/linux/usb/ch9.h	/^#define		USB_SS_CAP_TYPE	/;"	d
USB_SS_MULT	include/linux/usb/ch9.h	/^#define USB_SS_MULT(/;"	d
USB_SS_PORT_FEAT_BH_RESET	include/usb_defs.h	/^#define USB_SS_PORT_FEAT_BH_RESET	/;"	d
USB_SS_PORT_FEAT_C_BH_RESET	include/usb_defs.h	/^#define USB_SS_PORT_FEAT_C_BH_RESET	/;"	d
USB_SS_PORT_FEAT_C_CONFIG_ERROR	include/usb_defs.h	/^#define USB_SS_PORT_FEAT_C_CONFIG_ERROR	/;"	d
USB_SS_PORT_FEAT_C_LINK_STATE	include/usb_defs.h	/^#define USB_SS_PORT_FEAT_C_LINK_STATE	/;"	d
USB_SS_PORT_FEAT_U1_TIMEOUT	include/usb_defs.h	/^#define USB_SS_PORT_FEAT_U1_TIMEOUT	/;"	d
USB_SS_PORT_FEAT_U2_TIMEOUT	include/usb_defs.h	/^#define USB_SS_PORT_FEAT_U2_TIMEOUT	/;"	d
USB_SS_PORT_STAT_C_BH_RESET	include/usb_defs.h	/^#define USB_SS_PORT_STAT_C_BH_RESET	/;"	d
USB_SS_PORT_STAT_C_CONFIG_ERROR	include/usb_defs.h	/^#define USB_SS_PORT_STAT_C_CONFIG_ERROR	/;"	d
USB_SS_PORT_STAT_C_LINK_STATE	include/usb_defs.h	/^#define USB_SS_PORT_STAT_C_LINK_STATE	/;"	d
USB_SS_PORT_STAT_LINK_STATE	include/usb_defs.h	/^#define USB_SS_PORT_STAT_LINK_STATE	/;"	d
USB_SS_PORT_STAT_POWER	include/usb_defs.h	/^#define USB_SS_PORT_STAT_POWER	/;"	d
USB_SS_PORT_STAT_SPEED	include/usb_defs.h	/^#define USB_SS_PORT_STAT_SPEED	/;"	d
USB_SS_PORT_STAT_SPEED_5GBPS	include/usb_defs.h	/^#define USB_SS_PORT_STAT_SPEED_5GBPS	/;"	d
USB_STATE_ADDRESS	include/linux/usb/ch9.h	/^	USB_STATE_ADDRESS,$/;"	e	enum:usb_device_state
USB_STATE_ATTACHED	include/linux/usb/ch9.h	/^	USB_STATE_ATTACHED,$/;"	e	enum:usb_device_state
USB_STATE_CONFIGURED	include/linux/usb/ch9.h	/^	USB_STATE_CONFIGURED,			\/* most functions *\/$/;"	e	enum:usb_device_state
USB_STATE_DEFAULT	include/linux/usb/ch9.h	/^	USB_STATE_DEFAULT,			\/* limited function *\/$/;"	e	enum:usb_device_state
USB_STATE_NOTATTACHED	include/linux/usb/ch9.h	/^	USB_STATE_NOTATTACHED = 0,$/;"	e	enum:usb_device_state
USB_STATE_POWERED	include/linux/usb/ch9.h	/^	USB_STATE_POWERED,			\/* wired *\/$/;"	e	enum:usb_device_state
USB_STATE_RECONNECTING	include/linux/usb/ch9.h	/^	USB_STATE_RECONNECTING,			\/* auth *\/$/;"	e	enum:usb_device_state
USB_STATE_SUSPENDED	include/linux/usb/ch9.h	/^	USB_STATE_SUSPENDED$/;"	e	enum:usb_device_state
USB_STATE_UNAUTHENTICATED	include/linux/usb/ch9.h	/^	USB_STATE_UNAUTHENTICATED,		\/* auth *\/$/;"	e	enum:usb_device_state
USB_STATUS_FAIL	drivers/usb/gadget/storage_common.c	/^#define USB_STATUS_FAIL	/;"	d	file:
USB_STATUS_HALT	include/usbdevice.h	/^#define USB_STATUS_HALT	/;"	d
USB_STATUS_PASS	drivers/usb/gadget/storage_common.c	/^#define USB_STATUS_PASS	/;"	d	file:
USB_STATUS_PHASE_ERROR	drivers/usb/gadget/storage_common.c	/^#define USB_STATUS_PHASE_ERROR	/;"	d	file:
USB_STATUS_REMOTEWAKEUP	include/usbdevice.h	/^#define USB_STATUS_REMOTEWAKEUP	/;"	d
USB_STATUS_SELFPOWERED	include/usbdevice.h	/^#define USB_STATUS_SELFPOWERED	/;"	d
USB_STAT_REG	drivers/usb/musb-new/am35x.c	/^#define USB_STAT_REG	/;"	d	file:
USB_STORAGE	drivers/usb/Kconfig	/^config USB_STORAGE$/;"	c
USB_STOR_TRANSPORT_ERROR	common/usb_storage.c	/^#define USB_STOR_TRANSPORT_ERROR /;"	d	file:
USB_STOR_TRANSPORT_FAILED	common/usb_storage.c	/^#define USB_STOR_TRANSPORT_FAILED /;"	d	file:
USB_STOR_TRANSPORT_GOOD	common/usb_storage.c	/^#define USB_STOR_TRANSPORT_GOOD	/;"	d	file:
USB_ST_ACMF	include/usbdescriptors.h	/^#define USB_ST_ACMF	/;"	d
USB_ST_ACTIVE	include/usb_defs.h	/^#define USB_ST_ACTIVE /;"	d
USB_ST_ATMNF	include/usbdescriptors.h	/^#define USB_ST_ATMNF	/;"	d
USB_ST_BABBLE_DET	include/usb_defs.h	/^#define USB_ST_BABBLE_DET /;"	d
USB_ST_BIT_ERR	include/usb_defs.h	/^#define USB_ST_BIT_ERR /;"	d
USB_ST_BUF_ERR	include/usb_defs.h	/^#define USB_ST_BUF_ERR /;"	d
USB_ST_CCMF	include/usbdescriptors.h	/^#define USB_ST_CCMF	/;"	d
USB_ST_CMF	include/usbdescriptors.h	/^#define USB_ST_CMF	/;"	d
USB_ST_CRC_ERR	include/usb_defs.h	/^#define USB_ST_CRC_ERR /;"	d
USB_ST_CS	include/usbdescriptors.h	/^#define USB_ST_CS	/;"	d
USB_ST_CSD	include/usbdescriptors.h	/^#define USB_ST_CSD	/;"	d
USB_ST_CSF	include/usbdescriptors.h	/^#define USB_ST_CSF	/;"	d
USB_ST_DLMF	include/usbdescriptors.h	/^#define USB_ST_DLMF	/;"	d
USB_ST_DMM	include/usbdescriptors.h	/^#define USB_ST_DMM	/;"	d
USB_ST_ENF	include/usbdescriptors.h	/^#define USB_ST_ENF	/;"	d
USB_ST_EUF	include/usbdescriptors.h	/^#define USB_ST_EUF	/;"	d
USB_ST_HEADER	include/usbdescriptors.h	/^#define USB_ST_HEADER	/;"	d
USB_ST_MCMF	include/usbdescriptors.h	/^#define USB_ST_MCMF	/;"	d
USB_ST_MDLM	include/usbdescriptors.h	/^#define USB_ST_MDLM	/;"	d
USB_ST_MDLMD	include/usbdescriptors.h	/^#define USB_ST_MDLMD	/;"	d
USB_ST_NAK_REC	include/usb_defs.h	/^#define USB_ST_NAK_REC /;"	d
USB_ST_NCT	include/usbdescriptors.h	/^#define USB_ST_NCT	/;"	d
USB_ST_NOT_PROC	include/usb_defs.h	/^#define USB_ST_NOT_PROC /;"	d
USB_ST_OBEX	include/usbdescriptors.h	/^#define USB_ST_OBEX	/;"	d
USB_ST_PUF	include/usbdescriptors.h	/^#define USB_ST_PUF	/;"	d
USB_ST_STALLED	include/usb_defs.h	/^#define USB_ST_STALLED /;"	d
USB_ST_TCLF	include/usbdescriptors.h	/^#define USB_ST_TCLF	/;"	d
USB_ST_TCM	include/usbdescriptors.h	/^#define USB_ST_TCM	/;"	d
USB_ST_TOMF	include/usbdescriptors.h	/^#define USB_ST_TOMF	/;"	d
USB_ST_TRF	include/usbdescriptors.h	/^#define USB_ST_TRF	/;"	d
USB_ST_UF	include/usbdescriptors.h	/^#define USB_ST_UF	/;"	d
USB_ST_USBTF	include/usbdescriptors.h	/^#define USB_ST_USBTF	/;"	d
USB_ST_WHCM	include/usbdescriptors.h	/^#define USB_ST_WHCM	/;"	d
USB_SUBCLASS_VENDOR_SPEC	include/linux/usb/ch9.h	/^#define USB_SUBCLASS_VENDOR_SPEC	/;"	d
USB_SUB_HID_BOOT	include/usb_defs.h	/^#define USB_SUB_HID_BOOT /;"	d
USB_SUB_HID_NONE	include/usb_defs.h	/^#define USB_SUB_HID_NONE /;"	d
USB_SUSP_CLR	arch/arm/include/asm/arch-tegra/usb.h	/^#define USB_SUSP_CLR	/;"	d
USB_TARGET_DRAM	drivers/usb/host/ehci-marvell.c	/^#define USB_TARGET_DRAM	/;"	d	file:
USB_TEARDOWN_REG	drivers/usb/musb-new/am35x.c	/^#define USB_TEARDOWN_REG	/;"	d	file:
USB_TESTMODE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_TESTMODE /;"	d
USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_TESTMODE /;"	d
USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_TESTMODE /;"	d
USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_TESTMODE /;"	d
USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_TESTMODE /;"	d
USB_TEST_MODE	include/usbdevice.h	/^#define USB_TEST_MODE	/;"	d
USB_TEST_MODE_FORCE_ENABLE	include/usb_defs.h	/^#define USB_TEST_MODE_FORCE_ENABLE /;"	d
USB_TEST_MODE_J	include/usb_defs.h	/^#define USB_TEST_MODE_J /;"	d
USB_TEST_MODE_K	include/usb_defs.h	/^#define USB_TEST_MODE_K /;"	d
USB_TEST_MODE_PACKET	include/usb_defs.h	/^#define USB_TEST_MODE_PACKET /;"	d
USB_TEST_MODE_SE0_NAK	include/usb_defs.h	/^#define USB_TEST_MODE_SE0_NAK /;"	d
USB_TIMEOUT_MS	include/usb.h	/^#define USB_TIMEOUT_MS(/;"	d
USB_TOLERANCE	drivers/usb/eth/r8152.h	/^#define USB_TOLERANCE	/;"	d
USB_TRANSPORT_NOT_READY_RETRY	common/usb_storage.c	/^#define USB_TRANSPORT_NOT_READY_RETRY /;"	d	file:
USB_TRANSPORT_UNKNOWN_RETRY	common/usb_storage.c	/^#define USB_TRANSPORT_UNKNOWN_RETRY /;"	d	file:
USB_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_TXCOUNT /;"	d
USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_TXCOUNT /;"	d
USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_TXCOUNT /;"	d
USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_TXCOUNT /;"	d
USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_TXCOUNT /;"	d
USB_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_TXCSR /;"	d
USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_TXCSR /;"	d
USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_TXCSR /;"	d
USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_TXCSR /;"	d
USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_TXCSR /;"	d
USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_TXINTERVAL /;"	d
USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_TXINTERVAL /;"	d
USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_TXINTERVAL /;"	d
USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_TXINTERVAL /;"	d
USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_TXINTERVAL /;"	d
USB_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_TXTYPE /;"	d
USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_TXTYPE /;"	d
USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_TXTYPE /;"	d
USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_TXTYPE /;"	d
USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_TXTYPE /;"	d
USB_TX_AGG	drivers/usb/eth/r8152.h	/^#define USB_TX_AGG	/;"	d
USB_TX_DMA	drivers/usb/eth/r8152.h	/^#define USB_TX_DMA	/;"	d
USB_TX_ERRMASK	include/usb/mpc8xx_udc.h	/^#define USB_TX_ERRMASK /;"	d
USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_TX_MAX_PACKET /;"	d
USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_TX_MAX_PACKET /;"	d
USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_TX_MAX_PACKET /;"	d
USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_TX_MAX_PACKET /;"	d
USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_TX_MAX_PACKET /;"	d
USB_TYPE_CLASS	include/linux/usb/ch9.h	/^#define USB_TYPE_CLASS	/;"	d
USB_TYPE_CLASS	include/usb_defs.h	/^#define USB_TYPE_CLASS /;"	d
USB_TYPE_CLASS	include/usbdevice.h	/^#define USB_TYPE_CLASS	/;"	d
USB_TYPE_MASK	include/linux/usb/ch9.h	/^#define USB_TYPE_MASK	/;"	d
USB_TYPE_RESERVED	include/linux/usb/ch9.h	/^#define USB_TYPE_RESERVED	/;"	d
USB_TYPE_RESERVED	include/usb_defs.h	/^#define USB_TYPE_RESERVED /;"	d
USB_TYPE_RESERVED	include/usbdevice.h	/^#define USB_TYPE_RESERVED	/;"	d
USB_TYPE_STANDARD	include/linux/usb/ch9.h	/^#define USB_TYPE_STANDARD	/;"	d
USB_TYPE_STANDARD	include/usb_defs.h	/^#define USB_TYPE_STANDARD /;"	d
USB_TYPE_STANDARD	include/usbdevice.h	/^#define USB_TYPE_STANDARD	/;"	d
USB_TYPE_VENDOR	include/linux/usb/ch9.h	/^#define USB_TYPE_VENDOR	/;"	d
USB_TYPE_VENDOR	include/usb_defs.h	/^#define USB_TYPE_VENDOR /;"	d
USB_TYPE_VENDOR	include/usbdevice.h	/^#define USB_TYPE_VENDOR	/;"	d
USB_U2P3_CTRL	drivers/usb/eth/r8152.h	/^#define USB_U2P3_CTRL	/;"	d
USB_UDC_H	include/usb/udc.h	/^#define USB_UDC_H$/;"	d
USB_UHCI_DEV_ID	include/usb.h	/^#define USB_UHCI_DEV_ID	/;"	d
USB_UHCI_HCD	drivers/usb/host/Kconfig	/^config USB_UHCI_HCD$/;"	c
USB_UHCI_PRINTF	arch/sparc/cpu/leon3/usb_uhci.c	/^#define	USB_UHCI_PRINTF(/;"	d	file:
USB_UHCI_PRINTF	arch/sparc/cpu/leon3/usb_uhci.c	/^#define USB_UHCI_PRINTF(/;"	d	file:
USB_UHCI_PRINTF	board/mpl/common/usb_uhci.c	/^#define	USB_UHCI_PRINTF(/;"	d	file:
USB_UHCI_PRINTF	board/mpl/common/usb_uhci.c	/^#define USB_UHCI_PRINTF(/;"	d	file:
USB_UHCI_VEND_ID	include/usb.h	/^#define USB_UHCI_VEND_ID	/;"	d
USB_ULPI	drivers/usb/ulpi/Kconfig	/^config USB_ULPI$/;"	c
USB_ULPI_VIEWPORT	drivers/usb/ulpi/Kconfig	/^config USB_ULPI_VIEWPORT$/;"	c	choice:choice2a7f43960104
USB_ULPI_VIEWPORT_OMAP	drivers/usb/ulpi/Kconfig	/^config USB_ULPI_VIEWPORT_OMAP$/;"	c	choice:choice2a7f43960104
USB_UPS_CTRL	drivers/usb/eth/r8152.h	/^#define USB_UPS_CTRL	/;"	d
USB_USB2PHY	drivers/usb/eth/r8152.h	/^#define USB_USB2PHY	/;"	d
USB_USBHSC_A	board/espt/lowlevel_init.S	/^USB_USBHSC_A:	.long	0xFFEC80F0$/;"	l
USB_USBHSC_D	board/espt/lowlevel_init.S	/^USB_USBHSC_D:	.long	0x00000000$/;"	l
USB_USB_CTRL	drivers/usb/eth/r8152.h	/^#define USB_USB_CTRL	/;"	d
USB_USB_TIMER	drivers/usb/eth/r8152.h	/^#define USB_USB_TIMER	/;"	d
USB_VBUS_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define USB_VBUS_CTL /;"	d
USB_VENDOR_REQUEST_READ_REGISTER	drivers/usb/eth/smsc95xx.c	/^#define USB_VENDOR_REQUEST_READ_REGISTER	/;"	d	file:
USB_VENDOR_REQUEST_WRITE_REGISTER	drivers/usb/eth/smsc95xx.c	/^#define USB_VENDOR_REQUEST_WRITE_REGISTER	/;"	d	file:
USB_VPLEN	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define USB_VPLEN /;"	d
USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define USB_VPLEN /;"	d
USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define USB_VPLEN /;"	d
USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define USB_VPLEN /;"	d
USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define USB_VPLEN /;"	d
USB_WDT11_CTRL	drivers/usb/eth/r8152.h	/^#define USB_WDT11_CTRL	/;"	d
USB_WINDOW_BASE	drivers/usb/host/ehci-marvell.c	/^#define USB_WINDOW_BASE(/;"	d	file:
USB_WINDOW_CTRL	drivers/usb/host/ehci-marvell.c	/^#define USB_WINDOW_CTRL(/;"	d	file:
USB_WIRELESS_BEACON_DIRECTED	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_BEACON_DIRECTED	/;"	d
USB_WIRELESS_BEACON_MASK	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_BEACON_MASK	/;"	d
USB_WIRELESS_BEACON_NONE	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_BEACON_NONE	/;"	d
USB_WIRELESS_BEACON_SELF	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_BEACON_SELF	/;"	d
USB_WIRELESS_P2P_DRD	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_P2P_DRD	/;"	d
USB_WIRELESS_PHY_107	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_107	/;"	d
USB_WIRELESS_PHY_160	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_160	/;"	d
USB_WIRELESS_PHY_200	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_200	/;"	d
USB_WIRELESS_PHY_320	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_320	/;"	d
USB_WIRELESS_PHY_400	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_400	/;"	d
USB_WIRELESS_PHY_480	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_480	/;"	d
USB_WIRELESS_PHY_53	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_53	/;"	d
USB_WIRELESS_PHY_80	include/linux/usb/ch9.h	/^#define	USB_WIRELESS_PHY_80	/;"	d
USB_XHCI_DWC3	drivers/usb/host/Kconfig	/^config USB_XHCI_DWC3$/;"	c
USB_XHCI_HCD	drivers/usb/host/Kconfig	/^config USB_XHCI_HCD$/;"	c
USB_XHCI_MVEBU	drivers/usb/host/Kconfig	/^config USB_XHCI_MVEBU$/;"	c
USB_XHCI_ROCKCHIP	drivers/usb/host/Kconfig	/^config USB_XHCI_ROCKCHIP$/;"	c
USCOM_EP0	include/usb/mpc8xx_udc.h	/^#define USCOM_EP0	/;"	d
USCOM_EP1	include/usb/mpc8xx_udc.h	/^#define USCOM_EP1	/;"	d
USCOM_EP2	include/usb/mpc8xx_udc.h	/^#define USCOM_EP2	/;"	d
USCOM_EP3	include/usb/mpc8xx_udc.h	/^#define USCOM_EP3	/;"	d
USCOM_FLUSH	include/usb/mpc8xx_udc.h	/^#define USCOM_FLUSH	/;"	d
USCOM_STR	include/usb/mpc8xx_udc.h	/^#define USCOM_STR	/;"	d
USDHC1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USDHC1_BASE_ADDR /;"	d
USDHC1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USDHC1_BASE_ADDR /;"	d
USDHC1_CD_GPIO	board/engicam/icorem6/icorem6.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CD_GPIO	board/freescale/mx6slevk/mx6slevk.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CD_GPIO	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CD_GPIO	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CD_GPIO	board/phytec/pcm058/pcm058.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CD_GPIO	board/toradex/colibri_imx7/colibri_imx7.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CD_GPIO	board/wandboard/wandboard.c	/^#define USDHC1_CD_GPIO	/;"	d	file:
USDHC1_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	USDHC1_CLK_ROOT = 86,$/;"	e	enum:clk_root_index
USDHC1_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
USDHC1_PWR_GPIO	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USDHC1_PWR_GPIO	/;"	d	file:
USDHC1_PWR_GPIO	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define USDHC1_PWR_GPIO	/;"	d	file:
USDHC2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USDHC2_BASE_ADDR /;"	d
USDHC2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USDHC2_BASE_ADDR /;"	d
USDHC2_CD_GPIO	board/advantech/dms-ba16/dms-ba16.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/el/el6x/el6x.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/embest/mx6boards/mx6boards.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/freescale/mx6sabresd/mx6sabresd.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/freescale/mx6slevk/mx6slevk.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/ge/bx50v3/bx50v3.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/tbs/tbs2910/tbs2910.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/tqc/tqma6/tqma6_mba6.c	/^#define USDHC2_CD_GPIO	/;"	d	file:
USDHC2_CD_GPIO	board/tqc/tqma6/tqma6_wru4.c	/^#define USDHC2_CD_GPIO /;"	d	file:
USDHC2_CLK_PAD_CTRL	board/tqc/tqma6/tqma6_wru4.c	/^#define USDHC2_CLK_PAD_CTRL /;"	d	file:
USDHC2_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	USDHC2_CLK_ROOT = 87,$/;"	e	enum:clk_root_index
USDHC2_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC2_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
USDHC2_PAD_CTRL	board/aristainetos/aristainetos-v2.c	/^#define USDHC2_PAD_CTRL /;"	d	file:
USDHC2_PAD_CTRL	board/tqc/tqma6/tqma6_wru4.c	/^#define USDHC2_PAD_CTRL /;"	d	file:
USDHC2_PWR_GPIO	board/ccv/xpress/xpress.c	/^#define USDHC2_PWR_GPIO	/;"	d	file:
USDHC2_PWR_GPIO	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USDHC2_PWR_GPIO	/;"	d	file:
USDHC2_WP_GPIO	board/tqc/tqma6/tqma6_mba6.c	/^#define USDHC2_WP_GPIO	/;"	d	file:
USDHC2_WP_GPIO	board/tqc/tqma6/tqma6_wru4.c	/^#define USDHC2_WP_GPIO /;"	d	file:
USDHC3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USDHC3_BASE_ADDR /;"	d
USDHC3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define USDHC3_BASE_ADDR /;"	d
USDHC3_CD_GPIO	board/embest/mx6boards/mx6boards.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CD_GPIO	board/freescale/mx6sabresd/mx6sabresd.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CD_GPIO	board/freescale/mx6slevk/mx6slevk.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CD_GPIO	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CD_GPIO	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CD_GPIO	board/tbs/tbs2910/tbs2910.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CD_GPIO	board/wandboard/wandboard.c	/^#define USDHC3_CD_GPIO	/;"	d	file:
USDHC3_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	USDHC3_CLK_ROOT = 88,$/;"	e	enum:clk_root_index
USDHC3_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD4_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD6_CLK	/;"	d
USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define USDHC3_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
USDHC3_PATH	board/compulab/cm_fx6/cm_fx6.c	/^#define USDHC3_PATH	/;"	d	file:
USDHC3_PWR_GPIO	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define USDHC3_PWR_GPIO	/;"	d	file:
USDHC3_PWR_GPIO	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define USDHC3_PWR_GPIO /;"	d	file:
USDHC3_RST_GPIO	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define USDHC3_RST_GPIO	/;"	d	file:
USDHC4_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define USDHC4_BASE_ADDR /;"	d
USDHC4_CD_GPIO	board/advantech/dms-ba16/dms-ba16.c	/^#define USDHC4_CD_GPIO	/;"	d	file:
USDHC4_CD_GPIO	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define USDHC4_CD_GPIO	/;"	d	file:
USDHC4_CD_GPIO	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define USDHC4_CD_GPIO	/;"	d	file:
USDHC4_CD_GPIO	board/ge/bx50v3/bx50v3.c	/^#define USDHC4_CD_GPIO	/;"	d	file:
USDHC4_CD_GPIO	board/seco/mx6quq7/mx6quq7.c	/^#define USDHC4_CD_GPIO	/;"	d	file:
USDHC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define USDHC_BASE_ADDR	/;"	d
USDHC_CLK_PAD_CTRL	board/tqc/tqma6/tqma6.c	/^#define USDHC_CLK_PAD_CTRL /;"	d	file:
USDHC_CLK_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define USDHC_CLK_PAD_CTRL /;"	d	file:
USDHC_DAT3_CD_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USDHC_DAT3_CD_PAD_CTRL /;"	d	file:
USDHC_PAD_CLK_CTRL	board/embest/mx6boards/mx6boards.c	/^#define USDHC_PAD_CLK_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/advantech/dms-ba16/dms-ba16.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/aristainetos/aristainetos.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/bachmann/ot1200/ot1200.c	/^#define USDHC_PAD_CTRL	/;"	d	file:
USDHC_PAD_CTRL	board/barco/platinum/platinum.h	/^#define USDHC_PAD_CTRL	/;"	d
USDHC_PAD_CTRL	board/barco/titanium/titanium.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/boundary/nitrogen6x/nitrogen6x.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/ccv/xpress/xpress.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/compulab/cm_fx6/common.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/el/el6x/el6x.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/embest/mx6boards/mx6boards.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/engicam/icorem6/icorem6.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6qarm2/mx6qarm2.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6sabresd/mx6sabresd.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6slevk/mx6slevk.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/freescale/mx7dsabresd/mx7dsabresd.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/gateworks/gw_ventana/common.h	/^#define USDHC_PAD_CTRL /;"	d
USDHC_PAD_CTRL	board/ge/bx50v3/bx50v3.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/kosagi/novena/novena_spl.c	/^#define USDHC_PAD_CTRL	/;"	d	file:
USDHC_PAD_CTRL	board/phytec/pcm058/pcm058.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/seco/common/mx6.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/tbs/tbs2910/tbs2910.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/technexion/pico-imx6ul/pico-imx6ul.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/toradex/colibri_imx7/colibri_imx7.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/tqc/tqma6/tqma6.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/tqc/tqma6/tqma6_mba6.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/udoo/udoo.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/wandboard/wandboard.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/warp/warp.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USDHC_PAD_CTRL	board/warp7/warp7.c	/^#define USDHC_PAD_CTRL /;"	d	file:
USEC_CFG_DIVISOR_MASK	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define USEC_CFG_DIVISOR_MASK	/;"	d
USEC_PER_MSEC	arch/blackfin/include/asm/blackfin_local.h	/^#define USEC_PER_MSEC /;"	d
USEC_TO_COUNT	arch/arm/cpu/armv7/sunxi/timer.c	/^#define USEC_TO_COUNT(/;"	d	file:
USEP_MF	include/usb/mpc8xx_udc.h	/^#define USEP_MF	/;"	d
USEP_RHS_IGNORE	include/usb/mpc8xx_udc.h	/^#define USEP_RHS_IGNORE	/;"	d
USEP_RHS_NAK	include/usb/mpc8xx_udc.h	/^#define USEP_RHS_NAK	/;"	d
USEP_RHS_NORM	include/usb/mpc8xx_udc.h	/^#define USEP_RHS_NORM	/;"	d
USEP_RHS_STALL	include/usb/mpc8xx_udc.h	/^#define USEP_RHS_STALL	/;"	d
USEP_RTE	include/usb/mpc8xx_udc.h	/^#define USEP_RTE	/;"	d
USEP_THS_IGNORE	include/usb/mpc8xx_udc.h	/^#define USEP_THS_IGNORE	/;"	d
USEP_THS_NAK	include/usb/mpc8xx_udc.h	/^#define USEP_THS_NAK	/;"	d
USEP_THS_NORM	include/usb/mpc8xx_udc.h	/^#define USEP_THS_NORM	/;"	d
USEP_THS_STALL	include/usb/mpc8xx_udc.h	/^#define USEP_THS_STALL	/;"	d
USEP_TM_BULK	include/usb/mpc8xx_udc.h	/^#define USEP_TM_BULK	/;"	d
USEP_TM_CONTROL	include/usb/mpc8xx_udc.h	/^#define USEP_TM_CONTROL	/;"	d
USEP_TM_INT	include/usb/mpc8xx_udc.h	/^#define USEP_TM_INT	/;"	d
USEP_TM_ISO	include/usb/mpc8xx_udc.h	/^#define USEP_TM_ISO	/;"	d
USERACCESS0	drivers/net/davinci_emac.h	/^	dv_reg		USERACCESS0;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERACCESS1	drivers/net/davinci_emac.h	/^	dv_reg		USERACCESS1;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERACCESS_ACK	drivers/net/cpsw.c	/^#define USERACCESS_ACK	/;"	d	file:
USERACCESS_DATA	drivers/net/cpsw.c	/^#define USERACCESS_DATA	/;"	d	file:
USERACCESS_GO	drivers/net/cpsw.c	/^#define USERACCESS_GO	/;"	d	file:
USERACCESS_READ	drivers/net/cpsw.c	/^#define USERACCESS_READ	/;"	d	file:
USERACCESS_WRITE	drivers/net/cpsw.c	/^#define USERACCESS_WRITE	/;"	d	file:
USERIMASK	arch/sh/include/asm/cpu_sh7722.h	/^#define USERIMASK	/;"	d
USERIMASK	arch/sh/include/asm/cpu_sh7780.h	/^#define	USERIMASK	/;"	d
USERINTMASKCLEAR	drivers/net/davinci_emac.h	/^	dv_reg		USERINTMASKCLEAR;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERINTMASKED	drivers/net/davinci_emac.h	/^	dv_reg		USERINTMASKED;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERINTMASKSET	drivers/net/davinci_emac.h	/^	dv_reg		USERINTMASKSET;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERINTRAW	drivers/net/davinci_emac.h	/^	dv_reg		USERINTRAW;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERMUX_ACLK_MSCL_532	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERMUX_ACLK_MSCL_532	include/dt-bindings/clock/exynos7420-clk.h	/^#define USERMUX_ACLK_MSCL_532	/;"	d
USERPHYSEL0	drivers/net/davinci_emac.h	/^	dv_reg		USERPHYSEL0;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USERPHYSEL1	drivers/net/davinci_emac.h	/^	dv_reg		USERPHYSEL1;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
USER_LED	board/phytec/pcm058/pcm058.c	/^#define USER_LED	/;"	d	file:
USE_1PORT	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define USE_1PORT	/;"	d
USE_24HOUR_MODE	drivers/rtc/rs5c372.c	/^#define USE_24HOUR_MODE /;"	d	file:
USE_32_BIT	drivers/net/lan91c96.c	/^#define USE_32_BIT /;"	d	file:
USE_32_BIT	drivers/net/smc91111.c	/^#define USE_32_BIT /;"	d	file:
USE_920T_MMU	include/configs/at91rm9200ek.h	/^#define USE_920T_MMU$/;"	d
USE_BIG_BUF	drivers/net/ne2000.c	/^#define USE_BIG_BUF	/;"	d	file:
USE_FH	board/micronas/vct/scc.h	/^#define USE_FH	/;"	d
USE_GRETH	include/configs/gr_ep2s60.h	/^#define USE_GRETH /;"	d
USE_GRUSB	include/configs/gr_ep2s60.h	/^#define USE_GRUSB /;"	d
USE_IMXIMG_PLUGIN	arch/arm/imx-common/Kconfig	/^config USE_IMXIMG_PLUGIN$/;"	c
USE_MEMCPY	include/linux/mtd/doc2000.h	/^#define USE_MEMCPY$/;"	d
USE_MEMCPY	include/malloc.h	/^#define USE_MEMCPY /;"	d
USE_MODE1	drivers/usb/musb-new/musb_dma.h	/^#  define USE_MODE1$/;"	d
USE_NO_FH	board/micronas/vct/scc.h	/^#define USE_NO_FH	/;"	d
USE_PRIVATE_LIBGCC	lib/Kconfig	/^config USE_PRIVATE_LIBGCC$/;"	c	menu:Library routines
USE_SHMEM	drivers/net/ne2000.c	/^#define USE_SHMEM	/;"	d	file:
USE_SPRINTF	common/xyzModem.c	/^#define USE_SPRINTF$/;"	d	file:
USE_SP_CODE	board/esd/pmc440/fpga.c	/^#define USE_SP_CODE$/;"	d	file:
USE_TINY_PRINTF	lib/Kconfig	/^config USE_TINY_PRINTF$/;"	c	menu:Library routines
USE_YMODEM_LENGTH	common/xyzModem.c	/^#define USE_YMODEM_LENGTH$/;"	d	file:
USHRT_MAX	include/linux/kernel.h	/^#define USHRT_MAX	/;"	d
USIR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0	/;"	d
USIR0_IR0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR0	/;"	d
USIR0_IR0	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR0	/;"	d
USIR0_IR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR1	/;"	d
USIR0_IR1	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR1	/;"	d
USIR0_IR2	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR2	/;"	d
USIR0_IR2	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR2	/;"	d
USIR0_IR3	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR3	/;"	d
USIR0_IR3	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR3	/;"	d
USIR0_IR4	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR4	/;"	d
USIR0_IR4	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR4	/;"	d
USIR0_IR5	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR5	/;"	d
USIR0_IR5	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR5	/;"	d
USIR0_IR6	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR6	/;"	d
USIR0_IR6	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR6	/;"	d
USIR0_IR7	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR0_IR7	/;"	d
USIR0_IR7	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define USIR0_IR7	/;"	d
USIR1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1	/;"	d
USIR1_IR10	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR10	/;"	d
USIR1_IR11	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR11	/;"	d
USIR1_IR12	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR12	/;"	d
USIR1_IR13	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR13	/;"	d
USIR1_IR14	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR14	/;"	d
USIR1_IR15	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR15	/;"	d
USIR1_IR8	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR8	/;"	d
USIR1_IR9	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define USIR1_IR9	/;"	d
USI_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define USI_BASE_ADDR /;"	d
USItype	arch/arc/lib/libgcc2.h	/^typedef unsigned int USItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:unsigned int
USItype	arch/blackfin/lib/muldi3.c	/^typedef unsigned int USItype __attribute__ ((mode(SI)));$/;"	t	typeref:typename:unsigned int	file:
USItype	arch/m68k/lib/ashldi3.c	/^typedef unsigned int USItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:unsigned int	file:
USItype	arch/m68k/lib/lshrdi3.c	/^typedef unsigned int USItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:unsigned int	file:
USItype	arch/m68k/lib/muldi3.c	/^typedef unsigned int USItype	__attribute__ ((mode (SI)));$/;"	t	typeref:typename:unsigned int	file:
USItype	arch/microblaze/lib/muldi3.c	/^typedef unsigned int USItype __attribute__ ((mode(SI)));$/;"	t	typeref:typename:unsigned int	file:
USItype	arch/nios2/lib/libgcc.c	/^typedef unsigned long USItype;$/;"	t	typeref:typename:unsigned long	file:
USMOD_EN	include/usb/mpc8xx_udc.h	/^#define USMOD_EN	/;"	d
USMOD_HOST	include/usb/mpc8xx_udc.h	/^#define USMOD_HOST	/;"	d
USMOD_LSS	include/usb/mpc8xx_udc.h	/^#define USMOD_LSS	/;"	d
USMOD_RESUME	include/usb/mpc8xx_udc.h	/^#define USMOD_RESUME	/;"	d
USMOD_SFTE	include/usb/mpc8xx_udc.h	/^#define USMOD_SFTE	/;"	d
USMOD_TEST	include/usb/mpc8xx_udc.h	/^#define USMOD_TEST	/;"	d
USPRG0	arch/powerpc/include/asm/processor.h	/^#define USPRG0	/;"	d
USR1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define USR1(/;"	d
USR1	drivers/serial/serial_mxc.c	/^#define USR1 /;"	d	file:
USR1_AIRINT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_AIRINT	/;"	d
USR1_AIRINT	drivers/serial/serial_mxc.c	/^#define  USR1_AIRINT	/;"	d	file:
USR1_AWAKE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_AWAKE	/;"	d
USR1_AWAKE	drivers/serial/serial_mxc.c	/^#define  USR1_AWAKE	/;"	d	file:
USR1_ESCF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_ESCF	/;"	d
USR1_ESCF	drivers/serial/serial_mxc.c	/^#define  USR1_ESCF	/;"	d	file:
USR1_FRAMERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_FRAMERR /;"	d
USR1_FRAMERR	drivers/serial/serial_mxc.c	/^#define  USR1_FRAMERR /;"	d	file:
USR1_PARITYERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_PARITYERR /;"	d
USR1_PARITYERR	drivers/serial/serial_mxc.c	/^#define  USR1_PARITYERR /;"	d	file:
USR1_RRDY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_RRDY /;"	d
USR1_RRDY	drivers/serial/serial_mxc.c	/^#define  USR1_RRDY /;"	d	file:
USR1_RTSD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_RTSD	/;"	d
USR1_RTSD	drivers/serial/serial_mxc.c	/^#define  USR1_RTSD	/;"	d	file:
USR1_RTSS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_RTSS	/;"	d
USR1_RTSS	drivers/serial/serial_mxc.c	/^#define  USR1_RTSS	/;"	d	file:
USR1_RXDS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_RXDS	/;"	d
USR1_RXDS	drivers/serial/serial_mxc.c	/^#define  USR1_RXDS	/;"	d	file:
USR1_TIMEOUT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_TIMEOUT /;"	d
USR1_TIMEOUT	drivers/serial/serial_mxc.c	/^#define  USR1_TIMEOUT /;"	d	file:
USR1_TRDY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR1_TRDY	/;"	d
USR1_TRDY	drivers/serial/serial_mxc.c	/^#define  USR1_TRDY	/;"	d	file:
USR2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define USR2(/;"	d
USR2	drivers/serial/serial_mxc.c	/^#define USR2 /;"	d	file:
USR26_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define USR26_MODE	/;"	d
USR2_ADET	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_ADET	/;"	d
USR2_ADET	drivers/serial/serial_mxc.c	/^#define  USR2_ADET	/;"	d	file:
USR2_BRCD	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_BRCD	/;"	d
USR2_BRCD	drivers/serial/serial_mxc.c	/^#define  USR2_BRCD	/;"	d	file:
USR2_DTRF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_DTRF	/;"	d
USR2_DTRF	drivers/serial/serial_mxc.c	/^#define  USR2_DTRF	/;"	d	file:
USR2_IDLE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_IDLE	/;"	d
USR2_IDLE	drivers/serial/serial_mxc.c	/^#define  USR2_IDLE	/;"	d	file:
USR2_IRINT	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_IRINT	/;"	d
USR2_IRINT	drivers/serial/serial_mxc.c	/^#define  USR2_IRINT	/;"	d	file:
USR2_ORE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_ORE /;"	d
USR2_ORE	drivers/serial/serial_mxc.c	/^#define  USR2_ORE /;"	d	file:
USR2_RDR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_RDR /;"	d
USR2_RDR	drivers/serial/serial_mxc.c	/^#define  USR2_RDR /;"	d	file:
USR2_RTSF	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_RTSF	/;"	d
USR2_RTSF	drivers/serial/serial_mxc.c	/^#define  USR2_RTSF	/;"	d	file:
USR2_TXDC	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_TXDC	/;"	d
USR2_TXDC	drivers/serial/serial_mxc.c	/^#define  USR2_TXDC	/;"	d	file:
USR2_TXFE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_TXFE	/;"	d
USR2_TXFE	drivers/serial/serial_mxc.c	/^#define  USR2_TXFE	/;"	d	file:
USR2_WAKE	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  USR2_WAKE	/;"	d
USR2_WAKE	drivers/serial/serial_mxc.c	/^#define  USR2_WAKE	/;"	d	file:
USR_LED0	include/configs/xpedite1000.h	/^#define USR_LED0	/;"	d
USR_LED1	include/configs/xpedite1000.h	/^#define USR_LED1	/;"	d
USR_LED2	include/configs/xpedite1000.h	/^#define USR_LED2	/;"	d
USR_LED3	include/configs/xpedite1000.h	/^#define USR_LED3	/;"	d
USR_MODE	arch/arm/include/asm/proc-armv/ptrace.h	/^#define USR_MODE	/;"	d
USR_MODE	arch/nds32/include/asm/ptrace.h	/^#define USR_MODE	/;"	d
US_BBB_GET_MAX_LUN	include/usb_defs.h	/^#define US_BBB_GET_MAX_LUN	/;"	d
US_BBB_RESET	include/usb_defs.h	/^#define US_BBB_RESET	/;"	d
US_CBI_ADSC	include/usb_defs.h	/^#define US_CBI_ADSC	/;"	d
US_DIRECTION	common/usb_storage.c	/^#define US_DIRECTION(/;"	d	file:
US_PER_SECOND	drivers/spi/fsl_espi.c	/^#define US_PER_SECOND	/;"	d	file:
US_PER_TICK	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define US_PER_TICK	/;"	d	file:
US_PR_BULK	include/usb_defs.h	/^#define US_PR_BULK /;"	d
US_PR_CB	include/usb_defs.h	/^#define US_PR_CB /;"	d
US_PR_CBI	include/usb_defs.h	/^#define US_PR_CBI /;"	d
US_SC_8020	include/usb_defs.h	/^#define US_SC_8020 /;"	d
US_SC_8070	include/usb_defs.h	/^#define US_SC_8070 /;"	d
US_SC_MAX	include/usb_defs.h	/^#define US_SC_MAX /;"	d
US_SC_MIN	include/usb_defs.h	/^#define US_SC_MIN /;"	d
US_SC_QIC	include/usb_defs.h	/^#define US_SC_QIC /;"	d
US_SC_RBC	include/usb_defs.h	/^#define US_SC_RBC /;"	d
US_SC_SCSI	include/usb_defs.h	/^#define US_SC_SCSI /;"	d
US_SC_UFI	include/usb_defs.h	/^#define US_SC_UFI /;"	d
UTBIPAR_PHY_ADDRESS_MASK	drivers/qe/uec.h	/^#define UTBIPAR_PHY_ADDRESS_MASK	/;"	d
UTBIPAR_PHY_ADDRESS_SHIFT	drivers/qe/uec.h	/^#define UTBIPAR_PHY_ADDRESS_SHIFT	/;"	d
UTCR0_1StpBit	include/SA-1100.h	/^#define UTCR0_1StpBit	/;"	d
UTCR0_2StpBit	include/SA-1100.h	/^#define UTCR0_2StpBit	/;"	d
UTCR0_7BitData	include/SA-1100.h	/^#define UTCR0_7BitData	/;"	d
UTCR0_8BitData	include/SA-1100.h	/^#define UTCR0_8BitData	/;"	d
UTCR0_DSS	include/SA-1100.h	/^#define UTCR0_DSS	/;"	d
UTCR0_EvenPar	include/SA-1100.h	/^#define UTCR0_EvenPar	/;"	d
UTCR0_OES	include/SA-1100.h	/^#define UTCR0_OES	/;"	d
UTCR0_OddPar	include/SA-1100.h	/^#define UTCR0_OddPar	/;"	d
UTCR0_PE	include/SA-1100.h	/^#define UTCR0_PE	/;"	d
UTCR0_RCE	include/SA-1100.h	/^#define UTCR0_RCE	/;"	d
UTCR0_RcFlEdg	include/SA-1100.h	/^#define UTCR0_RcFlEdg	/;"	d
UTCR0_RcRsEdg	include/SA-1100.h	/^#define UTCR0_RcRsEdg	/;"	d
UTCR0_SBS	include/SA-1100.h	/^#define UTCR0_SBS	/;"	d
UTCR0_SCE	include/SA-1100.h	/^#define UTCR0_SCE	/;"	d
UTCR0_Ser2IrDA	include/SA-1100.h	/^#define UTCR0_Ser2IrDA	/;"	d
UTCR0_TCE	include/SA-1100.h	/^#define UTCR0_TCE	/;"	d
UTCR0_TrFlEdg	include/SA-1100.h	/^#define UTCR0_TrFlEdg	/;"	d
UTCR0_TrRsEdg	include/SA-1100.h	/^#define UTCR0_TrRsEdg	/;"	d
UTCR1_BRD	include/SA-1100.h	/^#define UTCR1_BRD	/;"	d
UTCR1_BdRtDiv	include/SA-1100.h	/^#define UTCR1_BdRtDiv(/;"	d
UTCR1_CeilBdRtDiv	include/SA-1100.h	/^#define UTCR1_CeilBdRtDiv(/;"	d
UTCR2_BRD	include/SA-1100.h	/^#define UTCR2_BRD	/;"	d
UTCR2_BdRtDiv	include/SA-1100.h	/^#define UTCR2_BdRtDiv(/;"	d
UTCR2_CeilBdRtDiv	include/SA-1100.h	/^#define UTCR2_CeilBdRtDiv(/;"	d
UTCR3_BRK	include/SA-1100.h	/^#define UTCR3_BRK	/;"	d
UTCR3_LBM	include/SA-1100.h	/^#define UTCR3_LBM	/;"	d
UTCR3_RIE	include/SA-1100.h	/^#define UTCR3_RIE	/;"	d
UTCR3_RXE	include/SA-1100.h	/^#define UTCR3_RXE	/;"	d
UTCR3_Ser2IrDA	include/SA-1100.h	/^#define UTCR3_Ser2IrDA	/;"	d
UTCR3_TIE	include/SA-1100.h	/^#define UTCR3_TIE	/;"	d
UTCR3_TXE	include/SA-1100.h	/^#define UTCR3_TXE	/;"	d
UTCR4_HPSIR	include/SA-1100.h	/^#define UTCR4_HPSIR	/;"	d
UTCR4_HSE	include/SA-1100.h	/^#define UTCR4_HSE	/;"	d
UTCR4_LPM	include/SA-1100.h	/^#define UTCR4_LPM	/;"	d
UTCR4_NRZ	include/SA-1100.h	/^#define UTCR4_NRZ	/;"	d
UTCR4_Z1_6us	include/SA-1100.h	/^#define UTCR4_Z1_6us	/;"	d
UTCR4_Z3_16Bit	include/SA-1100.h	/^#define UTCR4_Z3_16Bit	/;"	d
UTDR_DATA	include/SA-1100.h	/^#define UTDR_DATA	/;"	d
UTIM	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UTIM(/;"	d
UTIM	drivers/serial/serial_mxc.c	/^#define UTIM /;"	d	file:
UTItype	arch/arc/lib/libgcc2.h	/^typedef unsigned int UTItype	__attribute__ ((mode (TI)));$/;"	t	typeref:typename:unsigned int
UTMIP_BIASPD	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_BIASPD	/;"	d
UTMIP_BIAS_DEBOUNCE_TIMESCALE_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_BIAS_DEBOUNCE_TIMESCALE_MASK	/;"	d
UTMIP_BIAS_DEBOUNCE_TIMESCALE_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_BIAS_DEBOUNCE_TIMESCALE_SHIFT	/;"	d
UTMIP_BIAS_PDTRK_COUNT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_BIAS_PDTRK_COUNT_MASK	/;"	d
UTMIP_BIAS_PDTRK_COUNT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_BIAS_PDTRK_COUNT_SHIFT	/;"	d
UTMIP_DEBOUNCE_CFG0_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_DEBOUNCE_CFG0_MASK	/;"	d
UTMIP_DEBOUNCE_CFG0_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_DEBOUNCE_CFG0_SHIFT	/;"	d
UTMIP_ELASTIC_LIMIT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_ELASTIC_LIMIT_MASK	/;"	d
UTMIP_ELASTIC_LIMIT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_ELASTIC_LIMIT_SHIFT	/;"	d
UTMIP_FORCE_PD2_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PD2_POWERDOWN	/;"	d
UTMIP_FORCE_PDCHRP_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PDCHRP_POWERDOWN	/;"	d
UTMIP_FORCE_PDDISC_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PDDISC_POWERDOWN	/;"	d
UTMIP_FORCE_PDDR_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PDDR_POWERDOWN	/;"	d
UTMIP_FORCE_PDTRK_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PDTRK_POWERDOWN	/;"	d
UTMIP_FORCE_PDZI_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PDZI_POWERDOWN	/;"	d
UTMIP_FORCE_PD_POWERDOWN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FORCE_PD_POWERDOWN	/;"	d
UTMIP_FORCE_PD_SAMP_A_POWERDOWN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define UTMIP_FORCE_PD_SAMP_A_POWERDOWN	/;"	d
UTMIP_FORCE_PD_SAMP_B_POWERDOWN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define UTMIP_FORCE_PD_SAMP_B_POWERDOWN	/;"	d
UTMIP_FORCE_PD_SAMP_C_POWERDOWN	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define UTMIP_FORCE_PD_SAMP_C_POWERDOWN	/;"	d
UTMIP_FS_PREAMBLE_J	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_FS_PREAMBLE_J	/;"	d
UTMIP_HSDISCON_LEVEL_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HSDISCON_LEVEL_MASK	/;"	d
UTMIP_HSDISCON_LEVEL_MSB	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HSDISCON_LEVEL_MSB	/;"	d
UTMIP_HSDISCON_LEVEL_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HSDISCON_LEVEL_SHIFT	/;"	d
UTMIP_HSSQUELCH_LEVEL_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HSSQUELCH_LEVEL_MASK	/;"	d
UTMIP_HSSQUELCH_LEVEL_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HSSQUELCH_LEVEL_SHIFT	/;"	d
UTMIP_HS_SYNC_START_DLY_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HS_SYNC_START_DLY_MASK	/;"	d
UTMIP_HS_SYNC_START_DLY_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_HS_SYNC_START_DLY_SHIFT	/;"	d
UTMIP_IDLE_WAIT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_IDLE_WAIT_MASK	/;"	d
UTMIP_IDLE_WAIT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_IDLE_WAIT_SHIFT	/;"	d
UTMIP_OTGPD	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_OTGPD	/;"	d
UTMIP_PD_CHRG	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PD_CHRG	/;"	d
UTMIP_PHY_ENB	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PHY_ENB	/;"	d
UTMIP_PHY_XTAL_CLOCKEN	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PHY_XTAL_CLOCKEN	/;"	d
UTMIP_PLLU_ENABLE_DLY_COUNT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PLLU_ENABLE_DLY_COUNT_MASK	/;"	d
UTMIP_PLLU_ENABLE_DLY_COUNT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PLLU_ENABLE_DLY_COUNT_SHIFT	/;"	d
UTMIP_PLLU_STABLE_COUNT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PLLU_STABLE_COUNT_MASK	/;"	d
UTMIP_PLLU_STABLE_COUNT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PLLU_STABLE_COUNT_SHIFT	/;"	d
UTMIP_PLL_ACTIVE_DLY_COUNT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PLL_ACTIVE_DLY_COUNT_MASK	/;"	d
UTMIP_PLL_ACTIVE_DLY_COUNT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_PLL_ACTIVE_DLY_COUNT_SHIFT	/;"	d
UTMIP_RESET	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_RESET	/;"	d
UTMIP_SUSPEND_EXIT_ON_EDGE	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_SUSPEND_EXIT_ON_EDGE	/;"	d
UTMIP_XCVR_HSSLEW_MSB_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_HSSLEW_MSB_MASK	/;"	d
UTMIP_XCVR_HSSLEW_MSB_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_HSSLEW_MSB_SHIFT	/;"	d
UTMIP_XCVR_LSBIAS_SE	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_LSBIAS_SE	/;"	d
UTMIP_XCVR_SETUP_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_SETUP_MASK	/;"	d
UTMIP_XCVR_SETUP_MSB_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_SETUP_MSB_MASK	/;"	d
UTMIP_XCVR_SETUP_MSB_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_SETUP_MSB_SHIFT	/;"	d
UTMIP_XCVR_SETUP_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_SETUP_SHIFT	/;"	d
UTMIP_XCVR_TERM_RANGE_ADJ_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_TERM_RANGE_ADJ_MASK	/;"	d
UTMIP_XCVR_TERM_RANGE_ADJ_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XCVR_TERM_RANGE_ADJ_SHIFT	/;"	d
UTMIP_XTAL_FREQ_COUNT_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XTAL_FREQ_COUNT_MASK	/;"	d
UTMIP_XTAL_FREQ_COUNT_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define UTMIP_XTAL_FREQ_COUNT_SHIFT	/;"	d
UTMI_8BIT	drivers/usb/musb-new/omap2430.h	/^#	define	UTMI_8BIT	/;"	d
UTMI_CALIB_CTRL_IMPCAL_DONE_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_IMPCAL_DONE_MASK	/;"	d
UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET	/;"	d
UTMI_CALIB_CTRL_IMPCAL_VTH_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_IMPCAL_VTH_MASK	/;"	d
UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET	/;"	d
UTMI_CALIB_CTRL_PLLCAL_DONE_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_PLLCAL_DONE_MASK	/;"	d
UTMI_CALIB_CTRL_PLLCAL_DONE_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_PLLCAL_DONE_OFFSET	/;"	d
UTMI_CALIB_CTRL_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CALIB_CTRL_REG	/;"	d
UTMI_CHGDTC_CTRL_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CHGDTC_CTRL_REG	/;"	d
UTMI_CHGDTC_CTRL_VDAT_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CHGDTC_CTRL_VDAT_MASK	/;"	d
UTMI_CHGDTC_CTRL_VDAT_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CHGDTC_CTRL_VDAT_OFFSET	/;"	d
UTMI_CHGDTC_CTRL_VSRC_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CHGDTC_CTRL_VSRC_MASK	/;"	d
UTMI_CHGDTC_CTRL_VSRC_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CHGDTC_CTRL_VSRC_OFFSET	/;"	d
UTMI_CTRL_STATUS0_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CTRL_STATUS0_REG	/;"	d
UTMI_CTRL_STATUS0_SUSPENDM_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CTRL_STATUS0_SUSPENDM_MASK	/;"	d
UTMI_CTRL_STATUS0_SUSPENDM_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CTRL_STATUS0_SUSPENDM_OFFSET	/;"	d
UTMI_CTRL_STATUS0_TEST_SEL_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CTRL_STATUS0_TEST_SEL_MASK	/;"	d
UTMI_CTRL_STATUS0_TEST_SEL_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_CTRL_STATUS0_TEST_SEL_OFFSET	/;"	d
UTMI_FIXED_MUL	drivers/clk/at91/clk-utmi.c	/^#define UTMI_FIXED_MUL	/;"	d	file:
UTMI_PHY_BASE	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define UTMI_PHY_BASE	/;"	d
UTMI_PHY_CFG_PU_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PHY_CFG_PU_MASK	/;"	d
UTMI_PHY_CFG_PU_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PHY_CFG_PU_OFFSET	/;"	d
UTMI_PHY_EN	include/usb/ehci-ci.h	/^#define UTMI_PHY_EN	/;"	d
UTMI_PHY_INVALID	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_INVALID	include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_INVALID	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_DEVICE0	include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_DEVICE0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST0	include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST0	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PHY_TO_USB_HOST1	include/dt-bindings/comphy/comphy_data.h	/^#define UTMI_PHY_TO_USB_HOST1	/;"	d
UTMI_PLL_CTRL_FBDIV_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_FBDIV_MASK	/;"	d
UTMI_PLL_CTRL_FBDIV_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_FBDIV_OFFSET	/;"	d
UTMI_PLL_CTRL_PLL_RDY_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_PLL_RDY_MASK	/;"	d
UTMI_PLL_CTRL_PLL_RDY_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_PLL_RDY_OFFSET	/;"	d
UTMI_PLL_CTRL_REFDIV_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_REFDIV_MASK	/;"	d
UTMI_PLL_CTRL_REFDIV_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_REFDIV_OFFSET	/;"	d
UTMI_PLL_CTRL_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_REG	/;"	d
UTMI_PLL_CTRL_SEL_LPFR_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_SEL_LPFR_MASK	/;"	d
UTMI_PLL_CTRL_SEL_LPFR_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_PLL_CTRL_SEL_LPFR_OFFSET	/;"	d
UTMI_RX_CH_CTRL0_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL0_REG	/;"	d
UTMI_RX_CH_CTRL0_SQ_ANA_DTC_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL0_SQ_ANA_DTC_MASK	/;"	d
UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET	/;"	d
UTMI_RX_CH_CTRL0_SQ_DET_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL0_SQ_DET_MASK	/;"	d
UTMI_RX_CH_CTRL0_SQ_DET_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL0_SQ_DET_OFFSET	/;"	d
UTMI_RX_CH_CTRL1_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL1_REG	/;"	d
UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_MASK	/;"	d
UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET	/;"	d
UTMI_RX_CH_CTRL1_SQ_AMP_CAL_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_MASK	/;"	d
UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET	/;"	d
UTMI_TX_CH_CTRL_DRV_EN_LS_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_TX_CH_CTRL_DRV_EN_LS_MASK	/;"	d
UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET	/;"	d
UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK	/;"	d
UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET	/;"	d
UTMI_TX_CH_CTRL_REG	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_TX_CH_CTRL_REG	/;"	d
UTMI_USB_CFG_DEVICE_EN_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_USB_CFG_DEVICE_EN_MASK	/;"	d
UTMI_USB_CFG_DEVICE_EN_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_USB_CFG_DEVICE_EN_OFFSET	/;"	d
UTMI_USB_CFG_DEVICE_MUX_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_USB_CFG_DEVICE_MUX_MASK	/;"	d
UTMI_USB_CFG_DEVICE_MUX_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_USB_CFG_DEVICE_MUX_OFFSET	/;"	d
UTMI_USB_CFG_PLL_MASK	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_USB_CFG_PLL_MASK	/;"	d
UTMI_USB_CFG_PLL_OFFSET	drivers/phy/marvell/utmi_phy.h	/^#define UTMI_USB_CFG_PLL_OFFSET	/;"	d
UTS	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define UTS(/;"	d
UTS	drivers/serial/serial_mxc.c	/^#define UTS /;"	d	file:
UTSR0_EIF	include/SA-1100.h	/^#define UTSR0_EIF	/;"	d
UTSR0_RBB	include/SA-1100.h	/^#define UTSR0_RBB	/;"	d
UTSR0_REB	include/SA-1100.h	/^#define UTSR0_REB	/;"	d
UTSR0_RFS	include/SA-1100.h	/^#define UTSR0_RFS	/;"	d
UTSR0_RID	include/SA-1100.h	/^#define UTSR0_RID	/;"	d
UTSR0_TFS	include/SA-1100.h	/^#define UTSR0_TFS	/;"	d
UTSR1_FRE	include/SA-1100.h	/^#define UTSR1_FRE	/;"	d
UTSR1_PRE	include/SA-1100.h	/^#define UTSR1_PRE	/;"	d
UTSR1_RNE	include/SA-1100.h	/^#define UTSR1_RNE	/;"	d
UTSR1_ROR	include/SA-1100.h	/^#define UTSR1_ROR	/;"	d
UTSR1_TBY	include/SA-1100.h	/^#define UTSR1_TBY	/;"	d
UTSR1_TNF	include/SA-1100.h	/^#define UTSR1_TNF	/;"	d
UTST	drivers/usb/host/r8a66597.h	/^#define	UTST	/;"	d
UTS_FRCPERR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_FRCPERR	/;"	d
UTS_FRCPERR	drivers/serial/serial_mxc.c	/^#define  UTS_FRCPERR	/;"	d	file:
UTS_LOOP	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_LOOP /;"	d
UTS_LOOP	drivers/serial/serial_mxc.c	/^#define  UTS_LOOP /;"	d	file:
UTS_RXEMPTY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_RXEMPTY	/;"	d
UTS_RXEMPTY	drivers/serial/serial_mxc.c	/^#define  UTS_RXEMPTY	/;"	d	file:
UTS_RXFULL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_RXFULL	/;"	d
UTS_RXFULL	drivers/serial/serial_mxc.c	/^#define  UTS_RXFULL	/;"	d	file:
UTS_SOFTRST	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_SOFTRST	/;"	d
UTS_SOFTRST	drivers/serial/serial_mxc.c	/^#define  UTS_SOFTRST	/;"	d	file:
UTS_TXEMPTY	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_TXEMPTY	/;"	d
UTS_TXEMPTY	drivers/serial/serial_mxc.c	/^#define  UTS_TXEMPTY	/;"	d	file:
UTS_TXFULL	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define  UTS_TXFULL	/;"	d
UTS_TXFULL	drivers/serial/serial_mxc.c	/^#define  UTS_TXFULL	/;"	d	file:
UTXD	drivers/serial/serial_mxc.c	/^#define UTXD /;"	d	file:
UT_DM	test/dm/Kconfig	/^config UT_DM$/;"	c
UT_ENV	test/env/Kconfig	/^config UT_ENV$/;"	c
UT_OVERLAY	test/overlay/Kconfig	/^config UT_OVERLAY$/;"	c
UT_TIME	test/Kconfig	/^config UT_TIME$/;"	c
UUID_BIN_LEN	include/uuid.h	/^#define UUID_BIN_LEN	/;"	d
UUID_STR_FORMAT_GUID	include/uuid.h	/^	UUID_STR_FORMAT_GUID$/;"	e	enum:__anon7093eae50103
UUID_STR_FORMAT_STD	include/uuid.h	/^	UUID_STR_FORMAT_STD,$/;"	e	enum:__anon7093eae50103
UUID_STR_LEN	include/uuid.h	/^#define UUID_STR_LEN	/;"	d
UUID_VARIANT	include/uuid.h	/^#define UUID_VARIANT	/;"	d
UUID_VARIANT_MASK	include/uuid.h	/^#define UUID_VARIANT_MASK	/;"	d
UUID_VARIANT_SHIFT	include/uuid.h	/^#define UUID_VARIANT_SHIFT	/;"	d
UUID_VERSION	include/uuid.h	/^#define UUID_VERSION	/;"	d
UUID_VERSION_MASK	include/uuid.h	/^#define UUID_VERSION_MASK	/;"	d
UUID_VERSION_SHIFT	include/uuid.h	/^#define UUID_VERSION_SHIFT	/;"	d
UWF_EN	drivers/usb/eth/r8152.h	/^#define UWF_EN	/;"	d
UWtype	arch/arc/lib/libgcc2.h	/^#define UWtype	/;"	d
UWtype	arch/arc/lib/libgcc2.h	/^#define UWtype /;"	d
UWtype	arch/nios2/lib/libgcc.c	/^typedef unsigned int UWtype;$/;"	t	typeref:typename:unsigned int	file:
UWtype	arch/nios2/lib/longlong.h	/^#define UWtype	/;"	d
U_BOOT_CMD	include/command.h	/^#define U_BOOT_CMD(/;"	d
U_BOOT_CMD_COMPLETE	include/command.h	/^#define U_BOOT_CMD_COMPLETE(/;"	d
U_BOOT_CMD_MKENT	include/command.h	/^#define U_BOOT_CMD_MKENT(/;"	d
U_BOOT_CMD_MKENT_COMPLETE	include/command.h	/^#define U_BOOT_CMD_MKENT_COMPLETE(/;"	d
U_BOOT_DATE	include/generated/timestamp_autogenerated.h	/^#define U_BOOT_DATE /;"	d
U_BOOT_DEVICE	include/dm/platdata.h	/^#define U_BOOT_DEVICE(/;"	d
U_BOOT_DEVICES	include/dm/platdata.h	/^#define U_BOOT_DEVICES(/;"	d
U_BOOT_DMI_DATE	include/generated/timestamp_autogenerated.h	/^#define U_BOOT_DMI_DATE /;"	d
U_BOOT_DRIVER	include/dm/device.h	/^#define U_BOOT_DRIVER(/;"	d
U_BOOT_ENV_CALLBACK	include/env_callback.h	/^#define U_BOOT_ENV_CALLBACK(/;"	d
U_BOOT_I2C_ADAP_COMPLETE	include/i2c.h	/^#define U_BOOT_I2C_ADAP_COMPLETE(/;"	d
U_BOOT_I2C_MKENT_COMPLETE	include/i2c.h	/^#define U_BOOT_I2C_MKENT_COMPLETE(/;"	d
U_BOOT_IMAGE_TYPE	tools/imagetool.h	/^#define U_BOOT_IMAGE_TYPE(/;"	d
U_BOOT_LEGACY_BLK	include/blk.h	/^#define U_BOOT_LEGACY_BLK(/;"	d
U_BOOT_PART_TYPE	include/part.h	/^#define U_BOOT_PART_TYPE(/;"	d
U_BOOT_PCI_DEVICE	include/pci.h	/^#define U_BOOT_PCI_DEVICE(/;"	d
U_BOOT_SCRUB_SIZE	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define U_BOOT_SCRUB_SIZE	/;"	d
U_BOOT_START_ADDR	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define U_BOOT_START_ADDR	/;"	d
U_BOOT_SUBCMD_END	include/command.h	/^#define U_BOOT_SUBCMD_END$/;"	d
U_BOOT_SUBCMD_START	include/command.h	/^#define U_BOOT_SUBCMD_START(/;"	d
U_BOOT_TIME	include/generated/timestamp_autogenerated.h	/^#define U_BOOT_TIME /;"	d
U_BOOT_TZ	include/generated/timestamp_autogenerated.h	/^#define U_BOOT_TZ /;"	d
U_BOOT_USB_DEVICE	include/usb.h	/^#define U_BOOT_USB_DEVICE(/;"	d
U_BOOT_VERSION	include/generated/version_autogenerated.h	/^#define U_BOOT_VERSION /;"	d
U_BOOT_VERSION_STRING	include/version.h	/^#define U_BOOT_VERSION_STRING /;"	d
U_BRG	drivers/serial/serial_pic32.c	/^#define U_BRG	/;"	d	file:
U_LINE	board/bf527-ezkit/video.c	/^#define U_LINE	/;"	d	file:
U_MOD	drivers/serial/serial_pic32.c	/^#define U_MOD	/;"	d	file:
U_MODCLR	drivers/serial/serial_pic32.c	/^#define U_MODCLR	/;"	d	file:
U_MODSET	drivers/serial/serial_pic32.c	/^#define U_MODSET	/;"	d	file:
U_M_MDIV	board/samsung/smdk2410/smdk2410.c	/^#define U_M_MDIV	/;"	d	file:
U_M_PDIV	board/samsung/smdk2410/smdk2410.c	/^#define U_M_PDIV	/;"	d	file:
U_M_SDIV	board/samsung/smdk2410/smdk2410.c	/^#define U_M_SDIV	/;"	d	file:
U_RXR	drivers/serial/serial_pic32.c	/^#define U_RXR	/;"	d	file:
U_STA	drivers/serial/serial_pic32.c	/^#define U_STA	/;"	d	file:
U_STACLR	drivers/serial/serial_pic32.c	/^#define U_STACLR	/;"	d	file:
U_STASET	drivers/serial/serial_pic32.c	/^#define U_STASET	/;"	d	file:
U_TXR	drivers/serial/serial_pic32.c	/^#define U_TXR	/;"	d	file:
UcodeCopy	arch/powerpc/cpu/mpc8xx/upatch.c	/^static void UcodeCopy (volatile cpm8xx_t *cpm)$/;"	f	typeref:typename:void	file:
Uninit	tools/patman/tout.py	/^def Uninit():$/;"	f
UnknownException	arch/powerpc/cpu/mpc512x/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc5xx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc5xxx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc8260/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc83xx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc85xx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc86xx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/mpc8xx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
UnknownException	arch/powerpc/cpu/ppc4xx/traps.c	/^void UnknownException(struct pt_regs *regs)$/;"	f	typeref:typename:void
Unpack	tools/buildman/toolchain.py	/^    def Unpack(self, fname, dest):$/;"	m	class:Toolchains
Unzip	doc/README.x86	/^Unzip it:$/;"	l
Use	doc/README.x86	/^Use ifdtool in the U-Boot tools directory to extract the images from that$/;"	l
UseFallback	tools/dtoc/fdt_select.py	/^def UseFallback(fallback):$/;"	f
UserIsPresent	tools/patman/tout.py	/^def UserIsPresent():$/;"	f
UserOutput	tools/patman/tout.py	/^def UserOutput(msg):$/;"	f
User_Time	lib/dhry/dhry_1.c	/^                User_Time;$/;"	v	typeref:typename:long
Using `virtualenv` to provide requirements	test/py/README.md	/^### Using `virtualenv` to provide requirements$/;"	S	section:U-Boot pytest suite""Requirements
V	arch/powerpc/cpu/mpc8xx/video.c	/^	unsigned char V, Y1, U, Y2;$/;"	m	struct:__anonce1d55370108	typeref:typename:unsigned char	file:
V0CAP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define V0CAP	/;"	d
V0CTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define V0CTL	/;"	d
V0STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define V0STS	/;"	d
V15_DATA15_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	V15_DATA15_MARK,$/;"	e	enum:__anona307945e0103	file:
V1CAP	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define V1CAP	/;"	d
V1CTL	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define V1CTL	/;"	d
V1STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define V1STS	/;"	d
V1_TYPE_DIRECT	fs/reiserfs/reiserfs_private.h	/^#define V1_TYPE_DIRECT /;"	d
V1_TYPE_DIRECTORY_MAX	fs/reiserfs/reiserfs_private.h	/^#define V1_TYPE_DIRECTORY_MAX /;"	d
V1_TYPE_INDIRECT	fs/reiserfs/reiserfs_private.h	/^#define V1_TYPE_INDIRECT /;"	d
V1_TYPE_STAT_DATA	fs/reiserfs/reiserfs_private.h	/^#define V1_TYPE_STAT_DATA /;"	d
V2L_CUR_SEL_1MA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define V2L_CUR_SEL_1MA	/;"	d
V2M_AACI	include/configs/vexpress_aemv8a.h	/^#define V2M_AACI	/;"	d
V2M_AACI	include/configs/vexpress_common.h	/^#define V2M_AACI	/;"	d
V2M_BASE	include/configs/vexpress_aemv8a.h	/^#define V2M_BASE	/;"	d
V2M_BASE	include/configs/vexpress_common.h	/^#define V2M_BASE	/;"	d
V2M_CF	include/configs/vexpress_aemv8a.h	/^#define V2M_CF	/;"	d
V2M_CF	include/configs/vexpress_common.h	/^#define V2M_CF	/;"	d
V2M_CLCD	include/configs/vexpress_aemv8a.h	/^#define V2M_CLCD	/;"	d
V2M_CLCD	include/configs/vexpress_common.h	/^#define V2M_CLCD	/;"	d
V2M_ISP1761	include/configs/vexpress_common.h	/^#define V2M_ISP1761	/;"	d
V2M_KMI0	include/configs/vexpress_aemv8a.h	/^#define V2M_KMI0	/;"	d
V2M_KMI0	include/configs/vexpress_common.h	/^#define V2M_KMI0	/;"	d
V2M_KMI1	include/configs/vexpress_aemv8a.h	/^#define V2M_KMI1	/;"	d
V2M_KMI1	include/configs/vexpress_common.h	/^#define V2M_KMI1	/;"	d
V2M_LAN9118	include/configs/vexpress_common.h	/^#define V2M_LAN9118	/;"	d
V2M_MMCI	include/configs/vexpress_aemv8a.h	/^#define V2M_MMCI	/;"	d
V2M_MMCI	include/configs/vexpress_common.h	/^#define V2M_MMCI	/;"	d
V2M_NOR0	include/configs/vexpress_common.h	/^#define V2M_NOR0	/;"	d
V2M_NOR1	include/configs/vexpress_common.h	/^#define V2M_NOR1	/;"	d
V2M_PA_CS0	include/configs/vexpress_aemv8a.h	/^#define V2M_PA_CS0	/;"	d
V2M_PA_CS0	include/configs/vexpress_common.h	/^#define V2M_PA_CS0	/;"	d
V2M_PA_CS1	include/configs/vexpress_aemv8a.h	/^#define V2M_PA_CS1	/;"	d
V2M_PA_CS1	include/configs/vexpress_common.h	/^#define V2M_PA_CS1	/;"	d
V2M_PA_CS2	include/configs/vexpress_aemv8a.h	/^#define V2M_PA_CS2	/;"	d
V2M_PA_CS2	include/configs/vexpress_common.h	/^#define V2M_PA_CS2	/;"	d
V2M_PA_CS3	include/configs/vexpress_aemv8a.h	/^#define V2M_PA_CS3	/;"	d
V2M_PA_CS3	include/configs/vexpress_common.h	/^#define V2M_PA_CS3	/;"	d
V2M_PA_CS4	include/configs/vexpress_aemv8a.h	/^#define V2M_PA_CS4	/;"	d
V2M_PA_CS5	include/configs/vexpress_aemv8a.h	/^#define V2M_PA_CS5	/;"	d
V2M_PA_CS7	include/configs/vexpress_common.h	/^#define V2M_PA_CS7	/;"	d
V2M_PERIPH_OFFSET	include/configs/vexpress_aemv8a.h	/^#define V2M_PERIPH_OFFSET(/;"	d
V2M_PERIPH_OFFSET	include/configs/vexpress_common.h	/^#define V2M_PERIPH_OFFSET(/;"	d
V2M_RTC	include/configs/vexpress_aemv8a.h	/^#define V2M_RTC	/;"	d
V2M_RTC	include/configs/vexpress_common.h	/^#define V2M_RTC	/;"	d
V2M_SERIAL_BUS_DVI	include/configs/vexpress_aemv8a.h	/^#define V2M_SERIAL_BUS_DVI	/;"	d
V2M_SERIAL_BUS_DVI	include/configs/vexpress_common.h	/^#define V2M_SERIAL_BUS_DVI	/;"	d
V2M_SERIAL_BUS_PCI	include/configs/vexpress_aemv8a.h	/^#define V2M_SERIAL_BUS_PCI	/;"	d
V2M_SERIAL_BUS_PCI	include/configs/vexpress_common.h	/^#define V2M_SERIAL_BUS_PCI	/;"	d
V2M_SIZE_CS7	include/configs/vexpress_common.h	/^#define V2M_SIZE_CS7	/;"	d
V2M_SRAM	include/configs/vexpress_common.h	/^#define V2M_SRAM	/;"	d
V2M_SYSCTL	include/configs/vexpress_aemv8a.h	/^#define V2M_SYSCTL	/;"	d
V2M_SYSCTL	include/configs/vexpress_common.h	/^#define V2M_SYSCTL	/;"	d
V2M_SYSREGS	include/configs/vexpress_aemv8a.h	/^#define V2M_SYSREGS	/;"	d
V2M_SYSREGS	include/configs/vexpress_common.h	/^#define V2M_SYSREGS	/;"	d
V2M_SYS_CFGCTRL	include/configs/vexpress_aemv8a.h	/^#define V2M_SYS_CFGCTRL	/;"	d
V2M_SYS_CFGCTRL	include/configs/vexpress_common.h	/^#define V2M_SYS_CFGCTRL	/;"	d
V2M_SYS_CFGDATA	include/configs/vexpress_aemv8a.h	/^#define V2M_SYS_CFGDATA	/;"	d
V2M_SYS_CFGDATA	include/configs/vexpress_common.h	/^#define V2M_SYS_CFGDATA	/;"	d
V2M_SYS_CFGSTAT	include/configs/vexpress_aemv8a.h	/^#define V2M_SYS_CFGSTAT	/;"	d
V2M_SYS_CFGSTAT	include/configs/vexpress_common.h	/^#define V2M_SYS_CFGSTAT	/;"	d
V2M_TIMER01	include/configs/vexpress_aemv8a.h	/^#define V2M_TIMER01	/;"	d
V2M_TIMER01	include/configs/vexpress_common.h	/^#define V2M_TIMER01	/;"	d
V2M_TIMER23	include/configs/vexpress_aemv8a.h	/^#define V2M_TIMER23	/;"	d
V2M_TIMER23	include/configs/vexpress_common.h	/^#define V2M_TIMER23	/;"	d
V2M_UART0	include/configs/vexpress_aemv8a.h	/^#define V2M_UART0	/;"	d
V2M_UART0	include/configs/vexpress_common.h	/^#define V2M_UART0	/;"	d
V2M_UART1	include/configs/vexpress_aemv8a.h	/^#define V2M_UART1	/;"	d
V2M_UART1	include/configs/vexpress_common.h	/^#define V2M_UART1	/;"	d
V2M_UART2	include/configs/vexpress_aemv8a.h	/^#define V2M_UART2	/;"	d
V2M_UART2	include/configs/vexpress_common.h	/^#define V2M_UART2	/;"	d
V2M_UART3	include/configs/vexpress_aemv8a.h	/^#define V2M_UART3	/;"	d
V2M_UART3	include/configs/vexpress_common.h	/^#define V2M_UART3	/;"	d
V2M_VIDEO_SRAM	include/configs/vexpress_common.h	/^#define V2M_VIDEO_SRAM	/;"	d
V2M_WDT	include/configs/vexpress_aemv8a.h	/^#define V2M_WDT	/;"	d
V2M_WDT	include/configs/vexpress_common.h	/^#define V2M_WDT	/;"	d
V2_TYPE_DIRECT	fs/reiserfs/reiserfs_private.h	/^#define V2_TYPE_DIRECT /;"	d
V2_TYPE_DIRENTRY	fs/reiserfs/reiserfs_private.h	/^#define V2_TYPE_DIRENTRY /;"	d
V2_TYPE_INDIRECT	fs/reiserfs/reiserfs_private.h	/^#define V2_TYPE_INDIRECT /;"	d
V2_TYPE_STAT_DATA	fs/reiserfs/reiserfs_private.h	/^#define V2_TYPE_STAT_DATA /;"	d
V3_COMMAND_M_FBB_EN	board/armltd/integrator/pci_v3.h	/^#define V3_COMMAND_M_FBB_EN /;"	d
V3_COMMAND_M_IO_EN	board/armltd/integrator/pci_v3.h	/^#define V3_COMMAND_M_IO_EN /;"	d
V3_COMMAND_M_MASTER_EN	board/armltd/integrator/pci_v3.h	/^#define V3_COMMAND_M_MASTER_EN /;"	d
V3_COMMAND_M_MEM_EN	board/armltd/integrator/pci_v3.h	/^#define V3_COMMAND_M_MEM_EN /;"	d
V3_COMMAND_M_PAR_EN	board/armltd/integrator/pci_v3.h	/^#define V3_COMMAND_M_PAR_EN /;"	d
V3_COMMAND_M_SERR_EN	board/armltd/integrator/pci_v3.h	/^#define V3_COMMAND_M_SERR_EN /;"	d
V3_DMA_CSR0	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_CSR0 /;"	d
V3_DMA_CSR1	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_CSR1 /;"	d
V3_DMA_CTLB_ADR0	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_CTLB_ADR0 /;"	d
V3_DMA_CTLB_ADR1	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_CTLB_ADR1 /;"	d
V3_DMA_DELAY	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_DELAY /;"	d
V3_DMA_LENGTH0	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_LENGTH0 /;"	d
V3_DMA_LENGTH1	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_LENGTH1 /;"	d
V3_DMA_LOCAL_ADR0	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_LOCAL_ADR0 /;"	d
V3_DMA_LOCAL_ADR1	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_LOCAL_ADR1 /;"	d
V3_DMA_PCI_ADR0	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_PCI_ADR0 /;"	d
V3_DMA_PCI_ADR1	board/armltd/integrator/pci_v3.h	/^#define V3_DMA_PCI_ADR1 /;"	d
V3_FIFO_CFG	board/armltd/integrator/pci_v3.h	/^#define V3_FIFO_CFG /;"	d
V3_FIFO_PRIORITY	board/armltd/integrator/pci_v3.h	/^#define V3_FIFO_PRIORITY /;"	d
V3_FIFO_STAT	board/armltd/integrator/pci_v3.h	/^#define V3_FIFO_STAT /;"	d
V3_LB_BASE0	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE0 /;"	d
V3_LB_BASE1	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE1 /;"	d
V3_LB_BASE2	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE2 /;"	d
V3_LB_BASE2_ADR_BASE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE2_ADR_BASE	/;"	d
V3_LB_BASE2_ENABLE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE2_ENABLE	/;"	d
V3_LB_BASE2_SWAP	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE2_SWAP	/;"	d
V3_LB_BASE_ADR_BASE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_BASE	/;"	d
V3_LB_BASE_ADR_SIZE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE	/;"	d
V3_LB_BASE_ADR_SIZE_128MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_128MB	/;"	d
V3_LB_BASE_ADR_SIZE_16MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_16MB	/;"	d
V3_LB_BASE_ADR_SIZE_1GB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_1GB	/;"	d
V3_LB_BASE_ADR_SIZE_1MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_1MB	/;"	d
V3_LB_BASE_ADR_SIZE_256MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_256MB	/;"	d
V3_LB_BASE_ADR_SIZE_2GB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_2GB	/;"	d
V3_LB_BASE_ADR_SIZE_2MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_2MB	/;"	d
V3_LB_BASE_ADR_SIZE_32MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_32MB	/;"	d
V3_LB_BASE_ADR_SIZE_4MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_4MB	/;"	d
V3_LB_BASE_ADR_SIZE_512MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_512MB	/;"	d
V3_LB_BASE_ADR_SIZE_64MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_64MB	/;"	d
V3_LB_BASE_ADR_SIZE_8MB	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ADR_SIZE_8MB	/;"	d
V3_LB_BASE_ENABLE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_ENABLE	/;"	d
V3_LB_BASE_PREFETCH	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_PREFETCH	/;"	d
V3_LB_BASE_SWAP	board/armltd/integrator/pci_v3.h	/^#define V3_LB_BASE_SWAP	/;"	d
V3_LB_CFG	board/armltd/integrator/pci_v3.h	/^#define V3_LB_CFG /;"	d
V3_LB_IMASK	board/armltd/integrator/pci_v3.h	/^#define V3_LB_IMASK /;"	d
V3_LB_IO_BASE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_IO_BASE /;"	d
V3_LB_ISTAT	board/armltd/integrator/pci_v3.h	/^#define V3_LB_ISTAT /;"	d
V3_LB_MAIL_IERD	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAIL_IERD /;"	d
V3_LB_MAIL_IEWR	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAIL_IEWR /;"	d
V3_LB_MAP0	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP0 /;"	d
V3_LB_MAP1	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP1 /;"	d
V3_LB_MAP2	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP2 /;"	d
V3_LB_MAP2_MAP_ADR	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP2_MAP_ADR	/;"	d
V3_LB_MAP_AD_LOW_EN	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_AD_LOW_EN	/;"	d
V3_LB_MAP_MAP_ADR	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_MAP_ADR	/;"	d
V3_LB_MAP_TYPE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_TYPE	/;"	d
V3_LB_MAP_TYPE_CONFIG	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_TYPE_CONFIG	/;"	d
V3_LB_MAP_TYPE_IACK	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_TYPE_IACK	/;"	d
V3_LB_MAP_TYPE_IO	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_TYPE_IO	/;"	d
V3_LB_MAP_TYPE_MEM	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_TYPE_MEM	/;"	d
V3_LB_MAP_TYPE_MEM_MULTIPLE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_MAP_TYPE_MEM_MULTIPLE	/;"	d
V3_LB_SIZE	board/armltd/integrator/pci_v3.h	/^#define V3_LB_SIZE /;"	d
V3_MAIL_DATA	board/armltd/integrator/pci_v3.h	/^#define V3_MAIL_DATA /;"	d
V3_MAIL_RD_STAT	board/armltd/integrator/pci_v3.h	/^#define V3_MAIL_RD_STAT /;"	d
V3_MAIL_WR_STAT	board/armltd/integrator/pci_v3.h	/^#define V3_MAIL_WR_STAT /;"	d
V3_PCI_BASE0	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE0 /;"	d
V3_PCI_BASE1	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE1 /;"	d
V3_PCI_BASE_M_ADR_BASE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE_M_ADR_BASE /;"	d
V3_PCI_BASE_M_ADR_BASEL	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE_M_ADR_BASEL /;"	d
V3_PCI_BASE_M_IO	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE_M_IO /;"	d
V3_PCI_BASE_M_PREFETCH	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE_M_PREFETCH /;"	d
V3_PCI_BASE_M_TYPE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BASE_M_TYPE /;"	d
V3_PCI_BPARAM	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_BPARAM /;"	d
V3_PCI_CC_REV	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CC_REV /;"	d
V3_PCI_CFG	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG /;"	d
V3_PCI_CFG_M_AD_LOW0	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_AD_LOW0 /;"	d
V3_PCI_CFG_M_AD_LOW1	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_AD_LOW1 /;"	d
V3_PCI_CFG_M_EN3V	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_EN3V	/;"	d
V3_PCI_CFG_M_I2O_EN	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_I2O_EN	/;"	d
V3_PCI_CFG_M_IO_DIS	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_IO_DIS	/;"	d
V3_PCI_CFG_M_IO_REG_DIS	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_IO_REG_DIS	/;"	d
V3_PCI_CFG_M_RETRY_EN	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CFG_M_RETRY_EN /;"	d
V3_PCI_CMD	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_CMD /;"	d
V3_PCI_DEVICE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_DEVICE /;"	d
V3_PCI_HDR_CFG	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_HDR_CFG /;"	d
V3_PCI_INT_CFG	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_INT_CFG /;"	d
V3_PCI_INT_STAT	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_INT_STAT /;"	d
V3_PCI_IO_BASE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_IO_BASE /;"	d
V3_PCI_MAIL_IERD	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAIL_IERD /;"	d
V3_PCI_MAIL_IEWR	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAIL_IEWR /;"	d
V3_PCI_MAP0	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP0 /;"	d
V3_PCI_MAP1	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP1 /;"	d
V3_PCI_MAP_M_ADR_SIZE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE /;"	d
V3_PCI_MAP_M_ADR_SIZE_128MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_128MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_16MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_16MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_1GB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_1GB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_1MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_1MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_256MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_256MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_2GB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_2GB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_2MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_2MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_32MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_32MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_4MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_4MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_512MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_512MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_64MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_64MB	/;"	d
V3_PCI_MAP_M_ADR_SIZE_8MB	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ADR_SIZE_8MB	/;"	d
V3_PCI_MAP_M_ENABLE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ENABLE /;"	d
V3_PCI_MAP_M_MAP_ADR	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_MAP_ADR /;"	d
V3_PCI_MAP_M_RD_POST_INH	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_RD_POST_INH /;"	d
V3_PCI_MAP_M_REG_EN	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_REG_EN /;"	d
V3_PCI_MAP_M_ROM_SIZE	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_ROM_SIZE /;"	d
V3_PCI_MAP_M_SWAP	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_MAP_M_SWAP /;"	d
V3_PCI_ROM	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_ROM /;"	d
V3_PCI_STAT	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_STAT /;"	d
V3_PCI_SUB_ID	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_SUB_ID /;"	d
V3_PCI_SUB_VENDOR	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_SUB_VENDOR /;"	d
V3_PCI_VENDOR	board/armltd/integrator/pci_v3.h	/^#define V3_PCI_VENDOR /;"	d
V3_QBA_MAP	board/armltd/integrator/pci_v3.h	/^#define V3_QBA_MAP /;"	d
V3_SYSTEM	board/armltd/integrator/pci_v3.h	/^#define V3_SYSTEM /;"	d
V3_SYSTEM_M_LOCK	board/armltd/integrator/pci_v3.h	/^#define V3_SYSTEM_M_LOCK /;"	d
V3_SYSTEM_M_RST_OUT	board/armltd/integrator/pci_v3.h	/^#define V3_SYSTEM_M_RST_OUT /;"	d
V7M_AIRCR_ENDIAN	arch/arm/include/asm/armv7m.h	/^#define V7M_AIRCR_ENDIAN	/;"	d
V7M_AIRCR_PRIGROUP_MSK	arch/arm/include/asm/armv7m.h	/^#define V7M_AIRCR_PRIGROUP_MSK	/;"	d
V7M_AIRCR_PRIGROUP_SHIFT	arch/arm/include/asm/armv7m.h	/^#define V7M_AIRCR_PRIGROUP_SHIFT	/;"	d
V7M_AIRCR_SYSRESET	arch/arm/include/asm/armv7m.h	/^#define V7M_AIRCR_SYSRESET	/;"	d
V7M_AIRCR_VECTKEY	arch/arm/include/asm/armv7m.h	/^#define V7M_AIRCR_VECTKEY	/;"	d
V7M_AIRCR_VECTKEY_SHIFT	arch/arm/include/asm/armv7m.h	/^#define V7M_AIRCR_VECTKEY_SHIFT	/;"	d
V7M_ICSR_VECTACT_MSK	arch/arm/include/asm/armv7m.h	/^#define V7M_ICSR_VECTACT_MSK	/;"	d
V7M_MPU	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU	/;"	d
V7M_MPU_BASE	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_BASE	/;"	d
V7M_MPU_CTRL_DISABLE	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_CTRL_DISABLE	/;"	d
V7M_MPU_CTRL_ENABLE	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_CTRL_ENABLE	/;"	d
V7M_MPU_CTRL_HFNMIENA	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_CTRL_HFNMIENA	/;"	d
V7M_MPU_RASR_AP_RW_RW	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_AP_RW_RW	/;"	d
V7M_MPU_RASR_B_SHIFT	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_B_SHIFT	/;"	d
V7M_MPU_RASR_C_SHIFT	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_C_SHIFT	/;"	d
V7M_MPU_RASR_EN	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_EN	/;"	d
V7M_MPU_RASR_SIZE_4GB	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_SIZE_4GB	/;"	d
V7M_MPU_RASR_SIZE_8MB	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_SIZE_8MB	/;"	d
V7M_MPU_RASR_SIZE_BITS	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_SIZE_BITS	/;"	d
V7M_MPU_RASR_S_SHIFT	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_S_SHIFT	/;"	d
V7M_MPU_RASR_TEX_SHIFT	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_TEX_SHIFT	/;"	d
V7M_MPU_RASR_XN_DISABLE	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_XN_DISABLE /;"	d
V7M_MPU_RASR_XN_ENABLE	arch/arm/include/asm/armv7m.h	/^#define V7M_MPU_RASR_XN_ENABLE	/;"	d
V7M_SCB	arch/arm/include/asm/armv7m.h	/^#define V7M_SCB	/;"	d
V7M_SCB_BASE	arch/arm/include/asm/armv7m.h	/^#define V7M_SCB_BASE	/;"	d
V7M_SCB_VTOR	arch/arm/include/asm/armv7m.h	/^#define V7M_SCB_VTOR	/;"	d
VACK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VACK_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VAC_DET	include/twl6030.h	/^#define VAC_DET	/;"	d
VAC_MEAS	include/twl6030.h	/^#define VAC_MEAS	/;"	d
VADC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define VADC_BASE_ADDR /;"	d
VAFXR	arch/sh/include/asm/cpu_sh7722.h	/^#define VAFXR /;"	d
VAL2OMREG	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2OMREG	include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2OMREG(/;"	d
VAL2REG	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	include/dt-bindings/pmic/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VAL2REG	include/power/sandbox_pmic.h	/^#define VAL2REG(/;"	d
VALID	drivers/usb/host/r8a66597.h	/^#define	VALID	/;"	d
VALIDATE_ACTIVE	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define VALIDATE_ACTIVE(/;"	d
VALIDATE_TRAINING_LIMIT	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^#define VALIDATE_TRAINING_LIMIT(/;"	d	file:
VALIDATE_WIN_LENGTH	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^#define VALIDATE_WIN_LENGTH(/;"	d	file:
VALIDATION_WORD	tools/socfpgaimage.c	/^#define VALIDATION_WORD	/;"	d	file:
VALID_CTRL	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VALID_CTRL	/;"	d
VALID_CTRL	arch/arm/mach-exynos/include/mach/dp.h	/^#define VALID_CTRL	/;"	d
VALID_PAGE	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define VALID_PAGE(/;"	d
VALID_WIN_THRS	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define VALID_WIN_THRS /;"	d
VAL_PREFIX	tools/dtoc/dtoc	/^VAL_PREFIX = 'dtv_'$/;"	v
VAL_PREFIX	tools/dtoc/dtoc.py	/^VAL_PREFIX = 'dtv_'$/;"	v
VAPCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VAPCR /;"	d
VAR	include/lattice.h	/^#define VAR	/;"	d
VARIABLE	include/lattice.h	/^#define VARIABLE	/;"	d
VAR_TAB_SIZE	include/MCD_dma.h	/^#define VAR_TAB_SIZE	/;"	d
VAUDIOEN	include/mc13783.h	/^#define VAUDIOEN	/;"	d
VAUDIOEN	include/mc13892.h	/^#define VAUDIOEN	/;"	d
VAUDIOMODE	include/mc13783.h	/^#define VAUDIOMODE	/;"	d
VAUDIOSTBY	include/mc13783.h	/^#define VAUDIOSTBY	/;"	d
VAUDIOSTBY	include/mc13892.h	/^#define VAUDIOSTBY	/;"	d
VAUDIO_2_3	include/mc13892.h	/^#define VAUDIO_2_3	/;"	d
VAUDIO_2_5	include/mc13892.h	/^#define VAUDIO_2_5	/;"	d
VAUDIO_2_775	include/mc13892.h	/^#define VAUDIO_2_775	/;"	d
VAUDIO_3_0	include/mc13892.h	/^#define VAUDIO_3_0	/;"	d
VAUDIO_MASK	include/mc13892.h	/^#define VAUDIO_MASK	/;"	d
VA_BITS	arch/arm/include/asm/armv8/mmu.h	/^#define VA_BITS	/;"	d
VBAT_MEAS	include/twl6030.h	/^#define VBAT_MEAS	/;"	d
VBINT	drivers/usb/host/r8a66597.h	/^#define	VBINT	/;"	d
VBOOT_MODE_DEVELOPER	include/ec_commands.h	/^#define VBOOT_MODE_DEVELOPER /;"	d
VBOOT_MODE_NORMAL	include/ec_commands.h	/^#define VBOOT_MODE_NORMAL /;"	d
VBOOT_MODE_RECOVERY	include/ec_commands.h	/^#define VBOOT_MODE_RECOVERY /;"	d
VBOUT	drivers/usb/host/r8a66597.h	/^#define	VBOUT	/;"	d
VBPR	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VBPR	/;"	d
VBSE	drivers/usb/host/r8a66597.h	/^#define	VBSE	/;"	d
VBSRR	arch/sh/include/asm/cpu_sh7722.h	/^#define VBSRR /;"	d
VBSSR	arch/sh/include/asm/cpu_sh7722.h	/^#define VBSSR /;"	d
VBSTS	drivers/usb/host/r8a66597.h	/^#define	VBSTS	/;"	d
VBUS0	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define VBUS0	/;"	d
VBUS1	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define VBUS1	/;"	d
VBUSERR_RETRY_COUNT	drivers/usb/musb-new/musb_core.h	/^#define VBUSERR_RETRY_COUNT	/;"	d
VBUS_0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VBUS_0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VBUS_B_SESS_VLD_SW_EN	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_B_SESS_VLD_SW_EN	/;"	d
VBUS_B_SESS_VLD_SW_VALUE	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_B_SESS_VLD_SW_VALUE	/;"	d
VBUS_CLKPERIOD	arch/arm/mach-keystone/ddr3_spd.c	/^#define VBUS_CLKPERIOD /;"	d	file:
VBUS_DET	include/twl6030.h	/^#define VBUS_DET	/;"	d
VBUS_ERROR_B	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define VBUS_ERROR_B	/;"	d
VBUS_ERROR_BE	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define VBUS_ERROR_BE	/;"	d
VBUS_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	USB0_OCI_MARK,	USB0_PPON_MARK,	VBUS_MARK,$/;"	e	enum:__anona304c1340103	file:
VBUS_SENSE_CTL_AB_SESS_VLD	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_SENSE_CTL_AB_SESS_VLD	/;"	d
VBUS_SENSE_CTL_AB_SESS_VLD_OR_VBUS_WAKEUP	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_SENSE_CTL_AB_SESS_VLD_OR_VBUS_WAKEUP	/;"	d
VBUS_SENSE_CTL_A_SESS_VLD	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_SENSE_CTL_A_SESS_VLD	/;"	d
VBUS_SENSE_CTL_MASK	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_SENSE_CTL_MASK	/;"	d
VBUS_SENSE_CTL_SHIFT	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_SENSE_CTL_SHIFT	/;"	d
VBUS_SENSE_CTL_VBUS_WAKEUP	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_SENSE_CTL_VBUS_WAKEUP	/;"	d
VBUS_VLD_STS	arch/arm/include/asm/arch-tegra/usb.h	/^#define VBUS_VLD_STS	/;"	d
VC2K_Bright	drivers/video/bus_vcxk.c	/^#define VC2K_Bright	/;"	d	file:
VC4K16	drivers/video/bus_vcxk.c	/^vu_char VC4K16;$/;"	v	typeref:typename:vu_char
VC4K16_Bright1	drivers/video/bus_vcxk.c	/^#define VC4K16_Bright1	/;"	d	file:
VC4K16_Bright2	drivers/video/bus_vcxk.c	/^#define VC4K16_Bright2 /;"	d	file:
VC8K_BrightH	drivers/video/bus_vcxk.c	/^#define VC8K_BrightH	/;"	d	file:
VC8K_BrightL	drivers/video/bus_vcxk.c	/^#define VC8K_BrightL	/;"	d	file:
VCAMCONFIG	include/mc13892.h	/^#define VCAMCONFIG	/;"	d
VCAMEN	include/mc13783.h	/^#define VCAMEN	/;"	d
VCAMEN	include/mc13892.h	/^#define VCAMEN	/;"	d
VCAMMODE	include/mc13783.h	/^#define VCAMMODE	/;"	d
VCAMMODE	include/mc13892.h	/^#define VCAMMODE	/;"	d
VCAMSTBY	include/mc13783.h	/^#define VCAMSTBY	/;"	d
VCAMSTBY	include/mc13892.h	/^#define VCAMSTBY	/;"	d
VCAM_2_5	include/mc13892.h	/^#define VCAM_2_5	/;"	d
VCAM_2_6	include/mc13892.h	/^#define VCAM_2_6	/;"	d
VCAM_2_75	include/mc13892.h	/^#define VCAM_2_75	/;"	d
VCAM_3_0	include/mc13892.h	/^#define VCAM_3_0	/;"	d
VCAM_MASK	include/mc13892.h	/^#define VCAM_MASK	/;"	d
VCAP1	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define VCAP1	/;"	d
VCAP2	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define VCAP2	/;"	d
VCBITMASK	drivers/video/bus_vcxk.c	/^		#define VCBITMASK(/;"	d	file:
VCH	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define VCH	/;"	d
VCHGR_FC	include/power/max8997_pmic.h	/^#define VCHGR_FC /;"	d
VCHRG0	include/mc13892.h	/^#define VCHRG0	/;"	d
VCHRG1	include/mc13892.h	/^#define VCHRG1	/;"	d
VCHRG2	include/mc13892.h	/^#define VCHRG2	/;"	d
VCLKCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VCLKCR /;"	d
VCLKCR	arch/sh/include/asm/cpu_sh7723.h	/^#define VCLKCR /;"	d
VCLKCR	arch/sh/include/asm/cpu_sh7724.h	/^#define VCLKCR /;"	d
VCLKCR1_D	board/kmc/kzm9g/kzm9g.c	/^#define VCLKCR1_D	/;"	d	file:
VCLK_ECP_CNTL	include/radeon.h	/^#define VCLK_ECP_CNTL	/;"	d
VCLK_ECP_CNTL__ECP_DIV_MASK	include/radeon.h	/^#define VCLK_ECP_CNTL__ECP_DIV_MASK	/;"	d
VCLK_ECP_CNTL__ECP_FORCE_ON	include/radeon.h	/^#define VCLK_ECP_CNTL__ECP_FORCE_ON	/;"	d
VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb	include/radeon.h	/^#define VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb	/;"	d
VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb	include/radeon.h	/^#define VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb	/;"	d
VCLK_ECP_CNTL__PIXCLK_SRC_INVERT	include/radeon.h	/^#define VCLK_ECP_CNTL__PIXCLK_SRC_INVERT	/;"	d
VCLK_ECP_CNTL__R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF	include/radeon.h	/^#define VCLK_ECP_CNTL__R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF /;"	d
VCLK_ECP_CNTL__SUBCLK_FORCE_ON	include/radeon.h	/^#define VCLK_ECP_CNTL__SUBCLK_FORCE_ON	/;"	d
VCLK_ECP_CNTL__VCLK_INVERT	include/radeon.h	/^#define VCLK_ECP_CNTL__VCLK_INVERT	/;"	d
VCLK_ECP_CNTL__VCLK_SRC_SEL_MASK	include/radeon.h	/^#define VCLK_ECP_CNTL__VCLK_SRC_SEL_MASK	/;"	d
VCLK_SRC_SEL_BYTECLK	include/radeon.h	/^#define VCLK_SRC_SEL_BYTECLK	/;"	d
VCLK_SRC_SEL_CPUCLK	include/radeon.h	/^#define VCLK_SRC_SEL_CPUCLK	/;"	d
VCLK_SRC_SEL_MASK	include/radeon.h	/^#define VCLK_SRC_SEL_MASK	/;"	d
VCLK_SRC_SEL_PPLLCLK	include/radeon.h	/^#define VCLK_SRC_SEL_PPLLCLK	/;"	d
VCLK_SRC_SEL_PSCANCLK	include/radeon.h	/^#define VCLK_SRC_SEL_PSCANCLK	/;"	d
VCMA9_PLD_BASE	board/mpl/vcma9/vcma9.h	/^#define VCMA9_PLD_BASE	/;"	d
VCMA9_PLD_BOARD	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_BOARD,$/;"	e	enum:vcma9_pld_regs
VCMA9_PLD_CAN	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_CAN,$/;"	e	enum:vcma9_pld_regs
VCMA9_PLD_GPCD	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_GPCD,$/;"	e	enum:vcma9_pld_regs
VCMA9_PLD_ID	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_ID,$/;"	e	enum:vcma9_pld_regs
VCMA9_PLD_MISC	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_MISC,$/;"	e	enum:vcma9_pld_regs
VCMA9_PLD_NIC	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_NIC,$/;"	e	enum:vcma9_pld_regs
VCMA9_PLD_SDRAM	board/mpl/vcma9/vcma9.h	/^	VCMA9_PLD_SDRAM$/;"	e	enum:vcma9_pld_regs
VCOCAL_START	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^#define VCOCAL_START	/;"	d
VCODEC_MASK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	VCODEC_MASK		= 1,$/;"	e	enum:__anonbeb2b9771103
VCODEC_SELECT_VDPU_ACLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	VCODEC_SELECT_VDPU_ACLK,$/;"	e	enum:__anonbeb2b9771103
VCODEC_SELECT_VEPU_ACLK	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	VCODEC_SELECT_VEPU_ACLK	= 0,$/;"	e	enum:__anonbeb2b9771103
VCODEC_SHIFT	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	VCODEC_SHIFT		= 7,$/;"	e	enum:__anonbeb2b9771103
VCO_BIT_000_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_000_MICRO	/;"	d
VCO_BIT_200_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_200_MICRO	/;"	d
VCO_BIT_300_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_300_MICRO	/;"	d
VCO_BIT_400_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_400_MICRO	/;"	d
VCO_BIT_500_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_500_MICRO	/;"	d
VCO_BIT_600_MICRO	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VCO_BIT_600_MICRO	/;"	d
VCO_BIT_600_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_600_MICRO	/;"	d
VCO_BIT_700_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_700_MICRO	/;"	d
VCO_BIT_900_MICRO	arch/arm/mach-exynos/include/mach/dp.h	/^#define VCO_BIT_900_MICRO	/;"	d
VCO_MAX_HZ	drivers/clk/rockchip/clk_rk3036.c	/^	VCO_MAX_HZ	= 2400U * 1000000,$/;"	e	enum:__anon067f81910103	file:
VCO_MAX_HZ	drivers/clk/rockchip/clk_rk3288.c	/^	VCO_MAX_HZ	= 2200U * 1000000,$/;"	e	enum:__anon06a678fa0103	file:
VCO_MAX_KHZ	drivers/clk/rockchip/clk_rk3288.c	/^#define VCO_MAX_KHZ	/;"	d	file:
VCO_MAX_KHZ	drivers/clk/rockchip/clk_rk3399.c	/^#define VCO_MAX_KHZ	/;"	d	file:
VCO_MIN_HZ	drivers/clk/rockchip/clk_rk3036.c	/^	VCO_MIN_HZ	= 600 * 1000000,$/;"	e	enum:__anon067f81910103	file:
VCO_MIN_HZ	drivers/clk/rockchip/clk_rk3288.c	/^	VCO_MIN_HZ	= 440 * 1000000,$/;"	e	enum:__anon06a678fa0103	file:
VCO_MIN_KHZ	drivers/clk/rockchip/clk_rk3288.c	/^#define VCO_MIN_KHZ	/;"	d	file:
VCO_MIN_KHZ	drivers/clk/rockchip/clk_rk3399.c	/^#define VCO_MIN_KHZ	/;"	d	file:
VCR_V_WAIT_1	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define VCR_V_WAIT_1(/;"	d
VCR_V_WAIT_2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define VCR_V_WAIT_2(/;"	d
VCR_V_WIDTH	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define VCR_V_WIDTH(/;"	d
VCT_ONENAND	board/micronas/vct/Kconfig	/^config VCT_ONENAND$/;"	c	menu:vct board options
VCT_PLATINUM	board/micronas/vct/Kconfig	/^config VCT_PLATINUM$/;"	c	choice:vct board options""choice5c0ac1440104
VCT_PLATINUMAVC	board/micronas/vct/Kconfig	/^config VCT_PLATINUMAVC$/;"	c	choice:vct board options""choice5c0ac1440104
VCT_PREMIUM	board/micronas/vct/Kconfig	/^config VCT_PREMIUM$/;"	c	choice:vct board options""choice5c0ac1440104
VCT_SMALL_IMAGE	board/micronas/vct/Kconfig	/^config VCT_SMALL_IMAGE$/;"	c	menu:vct board options
VCXK_ACKNOWLEDGE	drivers/video/bus_vcxk.c	/^	#define VCXK_ACKNOWLEDGE /;"	d	file:
VCXK_ACKNOWLEDGE	drivers/video/bus_vcxk.c	/^#define VCXK_ACKNOWLEDGE	/;"	d	file:
VCXK_BWS	drivers/video/bus_vcxk.c	/^	#define VCXK_BWS(/;"	d	file:
VCXK_BWS_LONG	drivers/video/bus_vcxk.c	/^	#define VCXK_BWS_LONG(/;"	d	file:
VCXK_BWS_WORD_CLEAR	drivers/video/bus_vcxk.c	/^	#define VCXK_BWS_WORD_CLEAR(/;"	d	file:
VCXK_BWS_WORD_SET	drivers/video/bus_vcxk.c	/^	#define VCXK_BWS_WORD_SET(/;"	d	file:
VCXK_CLR_PIN	drivers/video/bus_vcxk.c	/^	#define VCXK_CLR_PIN(/;"	d	file:
VCXK_CLR_PIN	drivers/video/bus_vcxk.c	/^#define VCXK_CLR_PIN(/;"	d	file:
VCXK_DISABLE	drivers/video/bus_vcxk.c	/^#define VCXK_DISABLE\\/;"	d	file:
VCXK_ENABLE	drivers/video/bus_vcxk.c	/^#define VCXK_ENABLE\\/;"	d	file:
VCXK_INIT_PIN	drivers/video/bus_vcxk.c	/^	#define VCXK_INIT_PIN(/;"	d	file:
VCXK_INIT_PIN	drivers/video/bus_vcxk.c	/^#define VCXK_INIT_PIN(/;"	d	file:
VCXK_SET_PIN	drivers/video/bus_vcxk.c	/^	#define VCXK_SET_PIN(/;"	d	file:
VCXK_SET_PIN	drivers/video/bus_vcxk.c	/^#define VCXK_SET_PIN(/;"	d	file:
VDACR	arch/sh/include/asm/cpu_sh7722.h	/^#define VDACR /;"	d
VDAYR	arch/sh/include/asm/cpu_sh7722.h	/^#define VDAYR /;"	d
VDBG	drivers/usb/gadget/at91_udc.h	/^#    define VDBG	/;"	d
VDBG	drivers/usb/gadget/at91_udc.h	/^#    define VDBG(/;"	d
VDBG	drivers/usb/gadget/storage_common.c	/^#define VDBG(/;"	d	file:
VDBG	drivers/usb/host/isp116x.h	/^#    define VDBG	/;"	d
VDBG	drivers/usb/host/isp116x.h	/^#    define VDBG(/;"	d
VDCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define VDCNT /;"	d
VDD3P3V_PWDN	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VDD3P3V_PWDN	/;"	d
VDD_CORE	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_CORE	/;"	d
VDD_CORE_DRA7	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_CORE_DRA7	/;"	d
VDD_CORE_DRA7_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_CORE_DRA7_NOM	/;"	d
VDD_CORE_ES2	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_CORE_ES2	/;"	d
VDD_CORE_LOW	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_CORE_LOW	/;"	d
VDD_CORE_NOMINAL_T20	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_CORE_NOMINAL_T20	/;"	d	file:
VDD_CORE_NOMINAL_T25	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_CORE_NOMINAL_T25	/;"	d	file:
VDD_CPU_NOMINAL_T20	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_CPU_NOMINAL_T20	/;"	d	file:
VDD_CPU_NOMINAL_T25	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_CPU_NOMINAL_T25	/;"	d	file:
VDD_ETH_M_PS_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define VDD_ETH_M_PS_SHIFT	/;"	d
VDD_ETH_PS_1V8	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define VDD_ETH_PS_1V8	/;"	d
VDD_ETH_PS_2V5	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define VDD_ETH_PS_2V5	/;"	d
VDD_ETH_PS_3V3	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define VDD_ETH_PS_3V3	/;"	d
VDD_ETH_PS_MASK	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define VDD_ETH_PS_MASK	/;"	d
VDD_ETH_PS_SHIFT	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define VDD_ETH_PS_SHIFT	/;"	d
VDD_EVE_DRA7	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_EVE_DRA7	/;"	d
VDD_EVE_DRA7_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_EVE_DRA7_HIGH	/;"	d
VDD_EVE_DRA7_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_EVE_DRA7_NOM	/;"	d
VDD_EVE_DRA7_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_EVE_DRA7_OD	/;"	d
VDD_GPU_DRA7	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_GPU_DRA7	/;"	d
VDD_GPU_DRA7_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_GPU_DRA7_HIGH	/;"	d
VDD_GPU_DRA7_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_GPU_DRA7_NOM	/;"	d
VDD_GPU_DRA7_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_GPU_DRA7_OD	/;"	d
VDD_IVA_DRA7	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_IVA_DRA7	/;"	d
VDD_IVA_DRA7_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_IVA_DRA7_HIGH	/;"	d
VDD_IVA_DRA7_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_IVA_DRA7_NOM	/;"	d
VDD_IVA_DRA7_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_IVA_DRA7_OD	/;"	d
VDD_MM	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MM	/;"	d
VDD_MM_ES2	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MM_ES2	/;"	d
VDD_MM_ES2_LOW	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MM_ES2_LOW /;"	d
VDD_MM_ES2_OD	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MM_ES2_OD /;"	d
VDD_MM_LOW	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MM_LOW	/;"	d
VDD_MPU	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU	/;"	d
VDD_MPU_DRA7	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU_DRA7	/;"	d
VDD_MPU_DRA7_NOM	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU_DRA7_NOM	/;"	d
VDD_MPU_ES2	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU_ES2	/;"	d
VDD_MPU_ES2_HIGH	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU_ES2_HIGH /;"	d
VDD_MPU_ES2_LOW	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU_ES2_LOW /;"	d
VDD_MPU_LOW	arch/arm/include/asm/arch-omap5/clock.h	/^#define VDD_MPU_LOW	/;"	d
VDD_MV_MAX	include/configs/T208xQDS.h	/^#define VDD_MV_MAX	/;"	d
VDD_MV_MAX	include/configs/T208xRDB.h	/^#define VDD_MV_MAX	/;"	d
VDD_MV_MAX	include/configs/T4240RDB.h	/^#define VDD_MV_MAX	/;"	d
VDD_MV_MAX	include/configs/ls1043aqds.h	/^#define VDD_MV_MAX	/;"	d
VDD_MV_MAX	include/configs/ls1046aqds.h	/^#define VDD_MV_MAX	/;"	d
VDD_MV_MAX	include/configs/ls2080ardb.h	/^#define VDD_MV_MAX	/;"	d
VDD_MV_MIN	include/configs/T208xQDS.h	/^#define VDD_MV_MIN	/;"	d
VDD_MV_MIN	include/configs/T208xRDB.h	/^#define VDD_MV_MIN	/;"	d
VDD_MV_MIN	include/configs/T4240RDB.h	/^#define VDD_MV_MIN	/;"	d
VDD_MV_MIN	include/configs/ls1043aqds.h	/^#define VDD_MV_MIN	/;"	d
VDD_MV_MIN	include/configs/ls1046aqds.h	/^#define VDD_MV_MIN	/;"	d
VDD_MV_MIN	include/configs/ls2080ardb.h	/^#define VDD_MV_MIN	/;"	d
VDD_RELATION	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_RELATION	/;"	d	file:
VDD_TRANSITION_RATE	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_TRANSITION_RATE	/;"	d	file:
VDD_TRANSITION_STEP	arch/arm/mach-tegra/tegra20/pmu.c	/^#define VDD_TRANSITION_STEP	/;"	d	file:
VDEC_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define VDEC_BASE_ADDR /;"	d
VDEV_BOOT_HEADER_SIZE	include/zfs/vdev_impl.h	/^#define	VDEV_BOOT_HEADER_SIZE	/;"	d
VDEV_BOOT_MAGIC	include/zfs/vdev_impl.h	/^#define	VDEV_BOOT_MAGIC	/;"	d
VDEV_BOOT_OFFSET	include/zfs/vdev_impl.h	/^#define	VDEV_BOOT_OFFSET	/;"	d
VDEV_BOOT_SIZE	include/zfs/vdev_impl.h	/^#define	VDEV_BOOT_SIZE	/;"	d
VDEV_BOOT_VERSION	include/zfs/vdev_impl.h	/^#define	VDEV_BOOT_VERSION	/;"	d
VDEV_LABELS	include/zfs/vdev_impl.h	/^#define	VDEV_LABELS	/;"	d
VDEV_LABEL_END_SIZE	include/zfs/vdev_impl.h	/^#define	VDEV_LABEL_END_SIZE	/;"	d
VDEV_LABEL_START_SIZE	include/zfs/vdev_impl.h	/^#define	VDEV_LABEL_START_SIZE	/;"	d
VDEV_PHYS_SIZE	include/zfs/vdev_impl.h	/^#define	VDEV_PHYS_SIZE	/;"	d
VDEV_SKIP_SIZE	include/zfs/vdev_impl.h	/^#define	VDEV_SKIP_SIZE	/;"	d
VDEV_TYPE_DISK	include/zfs/zfs.h	/^#define	VDEV_TYPE_DISK	/;"	d
VDEV_TYPE_FILE	include/zfs/zfs.h	/^#define	VDEV_TYPE_FILE	/;"	d
VDEV_TYPE_HOLE	include/zfs/zfs.h	/^#define	VDEV_TYPE_HOLE	/;"	d
VDEV_TYPE_L2CACHE	include/zfs/zfs.h	/^#define	VDEV_TYPE_L2CACHE	/;"	d
VDEV_TYPE_MIRROR	include/zfs/zfs.h	/^#define	VDEV_TYPE_MIRROR	/;"	d
VDEV_TYPE_MISSING	include/zfs/zfs.h	/^#define	VDEV_TYPE_MISSING	/;"	d
VDEV_TYPE_RAIDZ	include/zfs/zfs.h	/^#define	VDEV_TYPE_RAIDZ	/;"	d
VDEV_TYPE_REPLACING	include/zfs/zfs.h	/^#define	VDEV_TYPE_REPLACING	/;"	d
VDEV_TYPE_ROOT	include/zfs/zfs.h	/^#define	VDEV_TYPE_ROOT	/;"	d
VDEV_TYPE_SPARE	include/zfs/zfs.h	/^#define	VDEV_TYPE_SPARE	/;"	d
VDEV_UBERBLOCK_RING	include/zfs/vdev_impl.h	/^#define	VDEV_UBERBLOCK_RING	/;"	d
VDEV_UBERBLOCK_SHIFT	include/zfs/uberblock_impl.h	/^#define	VDEV_UBERBLOCK_SHIFT(/;"	d
VDIG	include/mc13892.h	/^#define VDIG	/;"	d
VDIGEN	include/mc13783.h	/^#define VDIGEN /;"	d
VDIGEN	include/mc13892.h	/^#define VDIGEN	/;"	d
VDIGMODE	include/mc13783.h	/^#define VDIGMODE	/;"	d
VDIGSTBY	include/mc13783.h	/^#define VDIGSTBY	/;"	d
VDIGSTBY	include/mc13892.h	/^#define VDIGSTBY	/;"	d
VDIG_1_05	include/mc13892.h	/^#define VDIG_1_05	/;"	d
VDIG_1_25	include/mc13892.h	/^#define VDIG_1_25	/;"	d
VDIG_1_65	include/mc13892.h	/^#define VDIG_1_65	/;"	d
VDIG_1_8	include/mc13892.h	/^#define VDIG_1_8	/;"	d
VDIG_MASK	include/mc13892.h	/^#define VDIG_MASK	/;"	d
VDOA_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define VDOA_BASE_ADDR /;"	d
VE8313_WDT_EN	board/ve8313/ve8313.c	/^#define VE8313_WDT_EN	/;"	d	file:
VE8313_WDT_TRIG	board/ve8313/ve8313.c	/^#define VE8313_WDT_TRIG	/;"	d	file:
VECCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VECCR /;"	d
VECNUM_EIRQ2	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_EIRQ2	/;"	d
VECNUM_EIRQ6	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_EIRQ6	/;"	d
VECNUM_ETH0	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define	VECNUM_ETH0	/;"	d
VECNUM_ETH0	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_ETH0	/;"	d
VECNUM_ETH1_OFFS	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_ETH1_OFFS	/;"	d
VECNUM_MAL_RXDE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define	VECNUM_MAL_RXDE	/;"	d
VECNUM_MAL_RXDE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_MAL_RXDE	/;"	d
VECNUM_MAL_RXEOB	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define	VECNUM_MAL_RXEOB	/;"	d
VECNUM_MAL_RXEOB	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_MAL_RXEOB	/;"	d
VECNUM_MAL_SERR	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_MAL_SERR	/;"	d
VECNUM_MAL_TXDE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define	VECNUM_MAL_TXDE	/;"	d
VECNUM_MAL_TXDE	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_MAL_TXDE	/;"	d
VECNUM_MAL_TXEOB	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_MAL_TXEOB	/;"	d
VECNUM_UIC1CI	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_UIC1CI	/;"	d
VECNUM_UIC1NCI	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_UIC1NCI	/;"	d
VECNUM_UIC2CI	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_UIC2CI	/;"	d
VECNUM_UIC2NCI	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_UIC2NCI	/;"	d
VECNUM_UIC3CI	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_UIC3CI	/;"	d
VECNUM_UIC3NCI	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_UIC3NCI	/;"	d
VECNUM_USBDEV	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define VECNUM_USBDEV	/;"	d
VEC_CPLB_I_M	arch/blackfin/include/asm/traps.h	/^#define VEC_CPLB_I_M	/;"	d
VEC_CPLB_I_MHIT	arch/blackfin/include/asm/traps.h	/^#define VEC_CPLB_I_MHIT	/;"	d
VEC_CPLB_I_VL	arch/blackfin/include/asm/traps.h	/^#define VEC_CPLB_I_VL	/;"	d
VEC_CPLB_M	arch/blackfin/include/asm/traps.h	/^#define VEC_CPLB_M	/;"	d
VEC_CPLB_MHIT	arch/blackfin/include/asm/traps.h	/^#define VEC_CPLB_MHIT	/;"	d
VEC_CPLB_VL	arch/blackfin/include/asm/traps.h	/^#define VEC_CPLB_VL	/;"	d
VEC_EXCPT01	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT01	/;"	d
VEC_EXCPT02	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT02	/;"	d
VEC_EXCPT03	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT03	/;"	d
VEC_EXCPT04	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT04	/;"	d
VEC_EXCPT05	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT05	/;"	d
VEC_EXCPT06	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT06	/;"	d
VEC_EXCPT07	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT07	/;"	d
VEC_EXCPT08	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT08	/;"	d
VEC_EXCPT09	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT09	/;"	d
VEC_EXCPT10	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT10	/;"	d
VEC_EXCPT11	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT11	/;"	d
VEC_EXCPT12	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT12	/;"	d
VEC_EXCPT13	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT13	/;"	d
VEC_EXCPT14	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT14	/;"	d
VEC_EXCPT15	arch/blackfin/include/asm/traps.h	/^#define VEC_EXCPT15	/;"	d
VEC_HWERR	arch/blackfin/include/asm/traps.h	/^#define VEC_HWERR	/;"	d
VEC_ILGAL_I	arch/blackfin/include/asm/traps.h	/^#define VEC_ILGAL_I	/;"	d
VEC_ILL_RES	arch/blackfin/include/asm/traps.h	/^#define VEC_ILL_RES	/;"	d
VEC_ISTRU_VL	arch/blackfin/include/asm/traps.h	/^#define VEC_ISTRU_VL	/;"	d
VEC_MISALI_D	arch/blackfin/include/asm/traps.h	/^#define VEC_MISALI_D	/;"	d
VEC_MISALI_I	arch/blackfin/include/asm/traps.h	/^#define VEC_MISALI_I	/;"	d
VEC_OVFLOW	arch/blackfin/include/asm/traps.h	/^#define VEC_OVFLOW	/;"	d
VEC_STEP	arch/blackfin/include/asm/traps.h	/^#define VEC_STEP	/;"	d
VEC_SYS	arch/blackfin/include/asm/traps.h	/^#define VEC_SYS	/;"	d
VEC_UNCOV	arch/blackfin/include/asm/traps.h	/^#define VEC_UNCOV	/;"	d
VEC_UNDEF_I	arch/blackfin/include/asm/traps.h	/^#define VEC_UNDEF_I	/;"	d
VEC_WATCH	arch/blackfin/include/asm/traps.h	/^#define VEC_WATCH	/;"	d
VEC_WRD_CNT	arch/powerpc/cpu/mpc8260/start.S	/^#define VEC_WRD_CNT	/;"	d	file:
VEDWR	arch/sh/include/asm/cpu_sh7722.h	/^#define VEDWR /;"	d
VEIER	arch/sh/include/asm/cpu_sh7722.h	/^#define VEIER /;"	d
VENC_CLK_ENABLE	arch/arm/include/asm/arch-omap3/dss.h	/^#define VENC_CLK_ENABLE	/;"	d
VENC_HEIGHT	board/ti/beagle/beagle.h	/^#define VENC_HEIGHT	/;"	d
VENC_OUT_SEL	arch/arm/include/asm/arch-omap3/dss.h	/^#define VENC_OUT_SEL	/;"	d
VENC_WIDTH	board/ti/beagle/beagle.h	/^#define VENC_WIDTH	/;"	d
VENDOR	config.mk	/^VENDOR := $(CONFIG_SYS_VENDOR:"%"=%)$/;"	m
VENDOR	config.mk	/^VENDOR :=$/;"	m
VENDOR	include/lattice.h	/^#define VENDOR	/;"	d
VENDORSPEC_CKEN	include/fsl_esdhc.h	/^#define VENDORSPEC_CKEN	/;"	d
VENDORSPEC_HCKEN	include/fsl_esdhc.h	/^#define VENDORSPEC_HCKEN	/;"	d
VENDORSPEC_INIT	include/fsl_esdhc.h	/^#define VENDORSPEC_INIT	/;"	d
VENDORSPEC_IPGEN	include/fsl_esdhc.h	/^#define VENDORSPEC_IPGEN	/;"	d
VENDORSPEC_PEREN	include/fsl_esdhc.h	/^#define VENDORSPEC_PEREN	/;"	d
VENDOR_ACTEL	include/ambapp_ids.h	/^#define VENDOR_ACTEL /;"	d
VENDOR_ADVANTECH	arch/x86/Kconfig	/^config VENDOR_ADVANTECH$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_APPLECORE	include/ambapp_ids.h	/^#define VENDOR_APPLECORE /;"	d
VENDOR_ASTRIUM	include/ambapp_ids.h	/^#define VENDOR_ASTRIUM /;"	d
VENDOR_CAL	include/ambapp_ids.h	/^#define VENDOR_CAL /;"	d
VENDOR_CETON	include/ambapp_ids.h	/^#define VENDOR_CETON /;"	d
VENDOR_CONGATEC	arch/x86/Kconfig	/^config VENDOR_CONGATEC$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_CONTRIB	include/ambapp_ids.h	/^#define VENDOR_CONTRIB /;"	d
VENDOR_COREBOOT	arch/x86/Kconfig	/^config VENDOR_COREBOOT$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_DFI	arch/x86/Kconfig	/^config VENDOR_DFI$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_EFI	arch/x86/Kconfig	/^config VENDOR_EFI$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_EMBEDDIT	include/ambapp_ids.h	/^#define VENDOR_EMBEDDIT /;"	d
VENDOR_EMULATION	arch/x86/Kconfig	/^config VENDOR_EMULATION$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_EONIC	include/ambapp_ids.h	/^#define VENDOR_EONIC /;"	d
VENDOR_ESA	include/ambapp_ids.h	/^#define VENDOR_ESA /;"	d
VENDOR_GAISLER	include/ambapp_ids.h	/^#define VENDOR_GAISLER /;"	d
VENDOR_GLEICHMANN	include/ambapp_ids.h	/^#define VENDOR_GLEICHMANN /;"	d
VENDOR_GOOGLE	arch/x86/Kconfig	/^config VENDOR_GOOGLE$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_ID	include/radeon.h	/^#define VENDOR_ID	/;"	d
VENDOR_INTEL	arch/x86/Kconfig	/^config VENDOR_INTEL$/;"	c	choice:x86 architecture""choice0d4dd9280104
VENDOR_MENTA	include/ambapp_ids.h	/^#define VENDOR_MENTA /;"	d
VENDOR_MOVIDIA	include/ambapp_ids.h	/^#define VENDOR_MOVIDIA /;"	d
VENDOR_NASA	include/ambapp_ids.h	/^#define VENDOR_NASA /;"	d
VENDOR_OPENCHIP	include/ambapp_ids.h	/^#define VENDOR_OPENCHIP /;"	d
VENDOR_OPENCORES	include/ambapp_ids.h	/^#define VENDOR_OPENCORES /;"	d
VENDOR_ORBITA	include/ambapp_ids.h	/^#define VENDOR_ORBITA /;"	d
VENDOR_PENDER	include/ambapp_ids.h	/^#define VENDOR_PENDER /;"	d
VENDOR_RADIONOR	include/ambapp_ids.h	/^#define VENDOR_RADIONOR /;"	d
VENDOR_S3	include/ambapp_ids.h	/^#define VENDOR_S3 /;"	d
VENDOR_SPEC_OFFSET	include/usb/ulpi.h	/^#define VENDOR_SPEC_OFFSET	/;"	d
VENDOR_SUN	include/ambapp_ids.h	/^#define VENDOR_SUN /;"	d
VENDOR_SYNOPSYS	include/ambapp_ids.h	/^#define VENDOR_SYNOPSYS /;"	d
VENHR	arch/sh/include/asm/cpu_sh7722.h	/^#define VENHR /;"	d
VERBOSEP	drivers/net/at91_emac.c	/^#define VERBOSEP	/;"	d	file:
VERCAPS	drivers/net/dnet.h	/^	u32 VERCAPS;$/;"	m	struct:dnet_registers	typeref:typename:u32
VERIFYUES	include/lattice.h	/^#define VERIFYUES	/;"	d
VERIFY_PERCPU_PTR	drivers/net/mvpp2.c	/^#define VERIFY_PERCPU_PTR(/;"	d	file:
VERSION	Makefile	/^VERSION = 2016$/;"	m
VERSION	board/cm5200/cm5200.h	/^	VERSION,		\/* 4 *\/$/;"	e	enum:__anonb595836f0103
VERSION	drivers/net/davinci_emac.h	/^	dv_reg		VERSION;$/;"	m	struct:__anon759824920308	typeref:typename:dv_reg
VERSION_CLOCK	include/configs/adp-ag101p.h	/^#define VERSION_CLOCK	/;"	d
VERSION_LEN	board/cm5200/cm5200.h	/^#define VERSION_LEN	/;"	d
VERSION_MASK	board/freescale/ls1021atwr/ls1021atwr.c	/^#define VERSION_MASK	/;"	d	file:
VERSION_MASK	drivers/usb/eth/r8152.h	/^#define VERSION_MASK	/;"	d
VERSION_OFFSET	board/cm5200/cm5200.h	/^#define VERSION_OFFSET	/;"	d
VERSION_VARIABLE	common/Kconfig	/^config VERSION_VARIABLE$/;"	c
VERTICAL	board/bf533-stamp/video.c	/^#define VERTICAL	/;"	d	file:
VERT_AUTO_RATIO_EN	include/radeon.h	/^#define VERT_AUTO_RATIO_EN	/;"	d
VERT_FP_LOOP_STRETCH	include/radeon.h	/^#define VERT_FP_LOOP_STRETCH	/;"	d
VERT_FREQ_LSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define VERT_FREQ_LSB_REG	/;"	d	file:
VERT_FREQ_MSB_REG	board/freescale/common/dcu_sii9022a.c	/^#define VERT_FREQ_MSB_REG	/;"	d	file:
VERT_PANEL_SHIFT	include/radeon.h	/^#define VERT_PANEL_SHIFT	/;"	d
VERT_PANEL_SIZE	include/radeon.h	/^#define VERT_PANEL_SIZE	/;"	d
VERT_STRETCH_BLEND	include/radeon.h	/^#define VERT_STRETCH_BLEND	/;"	d
VERT_STRETCH_ENABLE	include/radeon.h	/^#define VERT_STRETCH_ENABLE	/;"	d
VERT_STRETCH_LINREP	include/radeon.h	/^#define VERT_STRETCH_LINREP	/;"	d
VERT_STRETCH_RATIO_MASK	include/radeon.h	/^#define VERT_STRETCH_RATIO_MASK	/;"	d
VERT_STRETCH_RATIO_MAX	include/radeon.h	/^#define VERT_STRETCH_RATIO_MAX	/;"	d
VERT_STRETCH_RESERVED	include/radeon.h	/^#define VERT_STRETCH_RESERVED	/;"	d
VER_NUM	board/Synology/ds109/ds109.h	/^#define VER_NUM /;"	d
VER_PROTOCOL_MAJOR	drivers/usb/gadget/f_thor.h	/^#define VER_PROTOCOL_MAJOR	/;"	d
VER_PROTOCOL_MINOR	drivers/usb/gadget/f_thor.h	/^#define VER_PROTOCOL_MINOR	/;"	d
VESA	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VESA,$/;"	e	enum:dynamic_range
VESA	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VESA,$/;"	e	enum:__anon79d8640c0303
VESA_GET_CUR_MODE	include/vbe.h	/^#define VESA_GET_CUR_MODE	/;"	d
VESA_GET_INFO	include/vbe.h	/^#define VESA_GET_INFO	/;"	d
VESA_GET_MODE_INFO	include/vbe.h	/^#define VESA_GET_MODE_INFO	/;"	d
VESA_HSYNC_SUSPEND	include/linux/fb.h	/^#define VESA_HSYNC_SUSPEND	/;"	d
VESA_MODES_COUNT	drivers/video/videomodes.h	/^#define VESA_MODES_COUNT /;"	d
VESA_NO_BLANKING	include/linux/fb.h	/^#define VESA_NO_BLANKING	/;"	d
VESA_POWERDOWN	include/linux/fb.h	/^#define VESA_POWERDOWN	/;"	d
VESA_SET_MODE	include/vbe.h	/^#define VESA_SET_MODE	/;"	d
VESA_VSYNC_SUSPEND	include/linux/fb.h	/^#define VESA_VSYNC_SUSPEND	/;"	d
VESIMEN	include/mc13783.h	/^#define VESIMEN	/;"	d
VESIMMODE	include/mc13783.h	/^#define VESIMMODE	/;"	d
VESIMSTBY	include/mc13783.h	/^#define VESIMSTBY	/;"	d
VESSR	arch/sh/include/asm/cpu_sh7722.h	/^#define VESSR /;"	d
VESTR	arch/sh/include/asm/cpu_sh7722.h	/^#define VESTR /;"	d
VESWR	arch/sh/include/asm/cpu_sh7722.h	/^#define VESWR /;"	d
VEVTR	arch/sh/include/asm/cpu_sh7722.h	/^#define VEVTR /;"	d
VEXPRESS_FLASHPROG_FLVPPEN	include/configs/vexpress_common.h	/^#define VEXPRESS_FLASHPROG_FLVPPEN	/;"	d
VF610_DDR_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_DDR_PAD_CTRL	/;"	d
VF610_DDR_PAD_CTRL_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_DDR_PAD_CTRL_1	/;"	d
VF610_DSPI_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_DSPI_PAD_CTRL	/;"	d
VF610_DSPI_SIN_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_DSPI_SIN_PAD_CTRL	/;"	d
VF610_ENET_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_ENET_PAD_CTRL	/;"	d
VF610_GPIO_DIRECTION_IN	arch/arm/include/asm/arch-vf610/gpio.h	/^#define VF610_GPIO_DIRECTION_IN	/;"	d
VF610_GPIO_DIRECTION_OUT	arch/arm/include/asm/arch-vf610/gpio.h	/^#define VF610_GPIO_DIRECTION_OUT	/;"	d
VF610_GPIO_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_GPIO_PAD_CTRL	/;"	d
VF610_I2C_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_I2C_PAD_CTRL	/;"	d
VF610_I2C_REGSHIFT	drivers/i2c/mxc_i2c.c	/^#define VF610_I2C_REGSHIFT	/;"	d	file:
VF610_NFC_CN_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_NFC_CN_PAD_CTRL	/;"	d
VF610_NFC_IO_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_NFC_IO_PAD_CTRL	/;"	d
VF610_NFC_RB_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_NFC_RB_PAD_CTRL	/;"	d
VF610_PAD_DDR_A0__DDR_A_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A0__DDR_A_0		= IOMUX_PAD(0x025c, 0x025c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A10__DDR_A_10	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A10__DDR_A_10		= IOMUX_PAD(0x0234, 0x0234, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A11__DDR_A_11	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A11__DDR_A_11		= IOMUX_PAD(0x0230, 0x0230, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A12__DDR_A_12	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A12__DDR_A_12		= IOMUX_PAD(0x022c, 0x022c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A13__DDR_A_13	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A13__DDR_A_13		= IOMUX_PAD(0x0228, 0x0228, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A14__DDR_A_14	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A14__DDR_A_14		= IOMUX_PAD(0x0224, 0x0224, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A15__DDR_A_15	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A15__DDR_A_15		= IOMUX_PAD(0x0220, 0x0220, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A1__DDR_A_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A1__DDR_A_1		= IOMUX_PAD(0x0258, 0x0258, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A2__DDR_A_2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A2__DDR_A_2		= IOMUX_PAD(0x0254, 0x0254, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A3__DDR_A_3	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A3__DDR_A_3		= IOMUX_PAD(0x0250, 0x0250, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A4__DDR_A_4	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A4__DDR_A_4		= IOMUX_PAD(0x024c, 0x024c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A5__DDR_A_5	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A5__DDR_A_5		= IOMUX_PAD(0x0248, 0x0248, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A6__DDR_A_6	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A6__DDR_A_6		= IOMUX_PAD(0x0244, 0x0244, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A7__DDR_A_7	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A7__DDR_A_7		= IOMUX_PAD(0x0240, 0x0240, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A8__DDR_A_8	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A8__DDR_A_8		= IOMUX_PAD(0x023c, 0x023c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_A9__DDR_A_9	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_A9__DDR_A_9		= IOMUX_PAD(0x0238, 0x0238, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_BA0__DDR_BA_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_BA0__DDR_BA_0		= IOMUX_PAD(0x0268, 0x0268, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_BA1__DDR_BA_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_BA1__DDR_BA_1		= IOMUX_PAD(0x0264, 0x0264, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_BA2__DDR_BA_2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_BA2__DDR_BA_2		= IOMUX_PAD(0x0260, 0x0260, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_CAS__DDR_CAS_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_CAS__DDR_CAS_B		= IOMUX_PAD(0x026c, 0x026c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_CKE__DDR_CKE_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_CKE__DDR_CKE_0		= IOMUX_PAD(0x0270, 0x0270, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_CLK__DDR_CLK_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_CLK__DDR_CLK_0		= IOMUX_PAD(0x0274, 0x0274, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_CS__DDR_CS_B_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_CS__DDR_CS_B_0		= IOMUX_PAD(0x0278, 0x0278, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D0__DDR_D_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D0__DDR_D_0		= IOMUX_PAD(0x02b8, 0x02b8, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D10__DDR_D_10	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D10__DDR_D_10		= IOMUX_PAD(0x0290, 0x0290, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D11__DDR_D_11	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D11__DDR_D_11		= IOMUX_PAD(0x028c, 0x028c, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D12__DDR_D_12	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D12__DDR_D_12		= IOMUX_PAD(0x0288, 0x0288, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D13__DDR_D_13	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D13__DDR_D_13		= IOMUX_PAD(0x0284, 0x0284, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D14__DDR_D_14	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D14__DDR_D_14		= IOMUX_PAD(0x0280, 0x0280, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D15__DDR_D_15	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D15__DDR_D_15		= IOMUX_PAD(0x027c, 0x027c, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D1__DDR_D_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D1__DDR_D_1		= IOMUX_PAD(0x02b4, 0x02b4, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D2__DDR_D_2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D2__DDR_D_2		= IOMUX_PAD(0x02b0, 0x02b0, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D3__DDR_D_3	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D3__DDR_D_3		= IOMUX_PAD(0x02ac, 0x02ac, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D4__DDR_D_4	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D4__DDR_D_4		= IOMUX_PAD(0x02a8, 0x02a8, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D5__DDR_D_5	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D5__DDR_D_5		= IOMUX_PAD(0x02a4, 0x02a4, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D6__DDR_D_6	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D6__DDR_D_6		= IOMUX_PAD(0x02a0, 0x02a0, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D7__DDR_D_7	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D7__DDR_D_7		= IOMUX_PAD(0x029c, 0x029c, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D8__DDR_D_8	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D8__DDR_D_8		= IOMUX_PAD(0x0298, 0x0298, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_D9__DDR_D_9	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_D9__DDR_D_9		= IOMUX_PAD(0x0294, 0x0294, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_DQM0__DDR_DQM_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_DQM0__DDR_DQM_0		= IOMUX_PAD(0x02c0, 0x02c0, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_DQM1__DDR_DQM_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_DQM1__DDR_DQM_1		= IOMUX_PAD(0x02bc, 0x02bc, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_DQS0__DDR_DQS_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_DQS0__DDR_DQS_0		= IOMUX_PAD(0x02c8, 0x02c8, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_DQS1__DDR_DQS_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_DQS1__DDR_DQS_1		= IOMUX_PAD(0x02c4, 0x02c4, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_ODT0__DDR_ODT_1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_ODT0__DDR_ODT_1		= IOMUX_PAD(0x02d8, 0x02d8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_ODT1__DDR_ODT_0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_ODT1__DDR_ODT_0		= IOMUX_PAD(0x02d4, 0x02d4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_RAS__DDR_RAS_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_RAS__DDR_RAS_B		= IOMUX_PAD(0x02cc, 0x02cc, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_RESETB	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_RESETB			= IOMUX_PAD(0x021c, 0x021c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_DDR_WE__DDR_WE_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_DDR_WE__DDR_WE_B		= IOMUX_PAD(0x02d0, 0x02d0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA17__GPIO_7	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA17__GPIO_7			= IOMUX_PAD(0x001c, 0x001c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA20__GPIO_10	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA20__GPIO_10		= IOMUX_PAD(0x0028, 0x0028, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA21__GPIO_11	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA21__GPIO_11		= IOMUX_PAD(0x002c, 0x002c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA22__I2C2_SCL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA22__I2C2_SCL		= IOMUX_PAD(0x0030, 0x0030, 6, 0x034c, 0, VF610_I2C_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA23__I2C2_SDA	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA23__I2C2_SDA		= IOMUX_PAD(0x0034, 0x0034, 6, 0x0350, 0, VF610_I2C_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA24__ESDHC1_CLK	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA24__ESDHC1_CLK		= IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA25__ESDHC1_CMD	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA25__ESDHC1_CMD		= IOMUX_PAD(0x003c, 0x003c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA26__ESDHC1_DAT0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA26__ESDHC1_DAT0		= IOMUX_PAD(0x0040, 0x0040, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA27__ESDHC1_DAT1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA27__ESDHC1_DAT1		= IOMUX_PAD(0x0044, 0x0044, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA28__ESDHC1_DAT2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA28__ESDHC1_DAT2		= IOMUX_PAD(0x0048, 0x0048, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA29__ESDHC1_DAT3	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA29__ESDHC1_DAT3		= IOMUX_PAD(0x004c, 0x004c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA30__GPIO_20	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA30__GPIO_20		= IOMUX_PAD(0x0050, 0x0050, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA31__GPIO_21	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA31__GPIO_21		= IOMUX_PAD(0x0054, 0x0054, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA6__RMII0_CLKIN	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA6__RMII0_CLKIN		= IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA6__RMII0_CLKOUT	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA6__RMII0_CLKOUT		= IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTA7__GPIO_134	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTA7__GPIO_134		= IOMUX_PAD(0x0218, 0x0218, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB0__GPIO_22	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB0__GPIO_22			= IOMUX_PAD(0x0058, 0x0058, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB10__UART0_TX	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB10__UART0_TX		= IOMUX_PAD(0x0080, 0x0080, 1, __NA_, 0, VF610_UART_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB11__UART0_RX	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB11__UART0_RX		= IOMUX_PAD(0x0084, 0x0084, 1, __NA_, 0, VF610_UART_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB12__GPIO_34	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB12__GPIO_34		= IOMUX_PAD(0x0088, 0x0088, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB13__GPIO_35	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB13__GPIO_35		= IOMUX_PAD(0x008c, 0x008c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB14__I2C0_SCL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB14__I2C0_SCL		= IOMUX_PAD(0x0090, 0x0090, 2, 0x033c, 1, VF610_I2C_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB15__I2C0_SDA	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB15__I2C0_SDA		= IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, VF610_I2C_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB16__GPIO_38	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB16__GPIO_38		= IOMUX_PAD(0x0098, 0x0098, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB17__GPIO_39	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB17__GPIO_39		= IOMUX_PAD(0x009c, 0x009c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB18__GPIO_40	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB18__GPIO_40		= IOMUX_PAD(0x00a0, 0x00a0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB1__GPIO_23	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB1__GPIO_23			= IOMUX_PAD(0x005C, 0x005C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB21__GPIO_43	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB21__GPIO_43		= IOMUX_PAD(0x00ac, 0x00ac, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB22__GPIO_44	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB22__GPIO_44		= IOMUX_PAD(0x00b0, 0x00b0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB23__GPIO_93	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB23__GPIO_93		= IOMUX_PAD(0x0174, 0x0174, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB24__NF_WE_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB24__NF_WE_B		= IOMUX_PAD(0x0178, 0x0178, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB25__NF_CE0_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB25__NF_CE0_B		= IOMUX_PAD(0x017c, 0x017c, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB26__GPIO_96	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB26__GPIO_96		= IOMUX_PAD(0x0180, 0x0180, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB27__NF_RE_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB27__NF_RE_B 		= IOMUX_PAD(0x0184, 0x0184, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB28__GPIO_98	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB28__GPIO_98		= IOMUX_PAD(0x0188, 0x0188, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB4__UART1_TX	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB4__UART1_TX		= IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, VF610_UART_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB5__UART1_RX	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB5__UART1_RX		= IOMUX_PAD(0x006c, 0x006c, 2, 0x037c, 0, VF610_UART_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB6__GPIO_28	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB6__GPIO_28			= IOMUX_PAD(0x0070, 0x0070, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB7__GPIO_29	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB7__GPIO_29			= IOMUX_PAD(0x0074, 0x0074, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB8__GPIO_30	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB8__GPIO_30			= IOMUX_PAD(0x0078, 0x0078, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTB9__GPIO_31	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTB9__GPIO_31			= IOMUX_PAD(0x007C, 0x007C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC0__GPIO_45	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC0__GPIO_45			= IOMUX_PAD(0x00b4, 0x00b4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC0__RMII0_MDC	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC0__RMII0_MDC		= IOMUX_PAD(0x00b4, 0x00b4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC10__RMII1_MDIO	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC10__RMII1_MDIO		= IOMUX_PAD(0x00dc, 0x00dc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC11__RMII1_CRS_DV	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC11__RMII1_CRS_DV		= IOMUX_PAD(0x00e0, 0x00e0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC12__RMII1_RD1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC12__RMII1_RD1		= IOMUX_PAD(0x00e4, 0x00e4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC13__RMII1_RD0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC13__RMII1_RD0		= IOMUX_PAD(0x00e8, 0x00e8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC14__RMII1_RXER	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC14__RMII1_RXER		= IOMUX_PAD(0x00ec, 0x00ec, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC15__RMII1_TD1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC15__RMII1_TD1		= IOMUX_PAD(0x00f0, 0x00f0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC16__RMII1_TD0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC16__RMII1_TD0		= IOMUX_PAD(0x00f4, 0x00f4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC17__RMII1_TXEN	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC17__RMII1_TXEN		= IOMUX_PAD(0x00f8, 0x00f8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC1__GPIO_46	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC1__GPIO_46			= IOMUX_PAD(0x00b8, 0x00b8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC1__RMII0_MDIO	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC1__RMII0_MDIO		= IOMUX_PAD(0x00b8, 0x00b8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC26__NF_RB_B	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC26__NF_RB_B 		= IOMUX_PAD(0x018C, 0x018C, 5, __NA_, 0, VF610_NFC_RB_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC27__NF_ALE	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC27__NF_ALE  		= IOMUX_PAD(0x0190, 0x0190, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC28__NF_CLE	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC28__NF_CLE  		= IOMUX_PAD(0x0194, 0x0194, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC29__GPIO_102	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC29__GPIO_102		= IOMUX_PAD(0x0198, 0x0198, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC2__GPIO_47	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC2__GPIO_47			= IOMUX_PAD(0x00bc, 0x00bc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC2__RMII0_CRS_DV	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC2__RMII0_CRS_DV		= IOMUX_PAD(0x00bc, 0x00bc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC30__GPIO_103	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC30__GPIO_103		= IOMUX_PAD(0x019c, 0x019c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC3__GPIO_48	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC3__GPIO_48			= IOMUX_PAD(0x00c0, 0x00c0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC3__RMII0_RD1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC3__RMII0_RD1		= IOMUX_PAD(0x00c0, 0x00c0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC4__GPIO_49	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC4__GPIO_49			= IOMUX_PAD(0x00c4, 0x00c4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC4__RMII0_RD0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC4__RMII0_RD0		= IOMUX_PAD(0x00c4, 0x00c4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC5__GPIO_50	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC5__GPIO_50			= IOMUX_PAD(0x00c8, 0x00c8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC5__RMII0_RXER	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC5__RMII0_RXER		= IOMUX_PAD(0x00c8, 0x00c8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC6__GPIO_51	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC6__GPIO_51			= IOMUX_PAD(0x00cc, 0x00cc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC6__RMII0_TD1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC6__RMII0_TD1		= IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC7__GPIO_52	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC7__GPIO_52			= IOMUX_PAD(0x00D0, 0x00D0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC7__RMII0_TD0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC7__RMII0_TD0		= IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC8__GPIO_53	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC8__GPIO_53			= IOMUX_PAD(0x00D4, 0x00D4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC8__RMII0_TXEN	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC8__RMII0_TXEN		= IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTC9__RMII1_MDC	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTC9__RMII1_MDC		= IOMUX_PAD(0x00d8, 0x00d8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD0__QSPI0_A_QSCK	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD0__QSPI0_A_QSCK		= IOMUX_PAD(0x013c, 0x013c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD10__GPIO_89	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD10__GPIO_89		= IOMUX_PAD(0x0164, 0x0164, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD10__QSPI0_B_DATA2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD10__QSPI0_B_DATA2		= IOMUX_PAD(0x0164, 0x0164, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD11__GPIO_90	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD11__GPIO_90		= IOMUX_PAD(0x0168, 0x0168, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD11__QSPI0_B_DATA1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD11__QSPI0_B_DATA1		= IOMUX_PAD(0x0168, 0x0168, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD12__GPIO_91	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD12__GPIO_91		= IOMUX_PAD(0x016c, 0x016c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD12__QSPI0_B_DATA0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD12__QSPI0_B_DATA0		= IOMUX_PAD(0x016c, 0x016c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD13__GPIO_92	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD13__GPIO_92		= IOMUX_PAD(0x0170, 0x0170, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD16__NF_IO0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD16__NF_IO0			= IOMUX_PAD(0x0138, 0x0138, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD17__NF_IO1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD17__NF_IO1			= IOMUX_PAD(0x0134, 0x0134, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD18__NF_IO2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD18__NF_IO2			= IOMUX_PAD(0x0130, 0x0130, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD19__NF_IO3	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD19__NF_IO3			= IOMUX_PAD(0x012c, 0x012c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD1__QSPI0_A_CS0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD1__QSPI0_A_CS0		= IOMUX_PAD(0x0140, 0x0140, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD20__NF_IO4	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD20__NF_IO4			= IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD21__NF_IO5	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD21__NF_IO5			= IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD22__NF_IO6	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD22__NF_IO6			= IOMUX_PAD(0x0120, 0x0120, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD23__NF_IO7	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD23__NF_IO7			= IOMUX_PAD(0x011c, 0x011c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD24__GPIO_70	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD24__GPIO_70		= IOMUX_PAD(0x0118, 0x0118, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD24__NF_IO8	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD24__NF_IO8			= IOMUX_PAD(0x0118, 0x0118, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD25__GPIO_69	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD25__GPIO_69		= IOMUX_PAD(0x0114, 0x0114, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD25__NF_IO9	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD25__NF_IO9			= IOMUX_PAD(0x0114, 0x0114, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD26__GPIO_68	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD26__GPIO_68		= IOMUX_PAD(0x0110, 0x0110, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD26__NF_IO10	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD26__NF_IO10		= IOMUX_PAD(0x0110, 0x0110, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD27__GPIO_67	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD27__GPIO_67		= IOMUX_PAD(0x010c, 0x010c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD27__NF_IO11	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD27__NF_IO11		= IOMUX_PAD(0x010c, 0x010c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD28__GPIO_66	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD28__GPIO_66		= IOMUX_PAD(0x0108, 0x0108, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD28__NF_IO12	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD28__NF_IO12		= IOMUX_PAD(0x0108, 0x0108, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD29__GPIO_65	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD29__GPIO_65		= IOMUX_PAD(0x0104, 0x0104, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD29__NF_IO13	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD29__NF_IO13		= IOMUX_PAD(0x0104, 0x0104, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD2__QSPI0_A_DATA3	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD2__QSPI0_A_DATA3		= IOMUX_PAD(0x0144, 0x0144, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD30__GPIO_64	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD30__GPIO_64		= IOMUX_PAD(0x0100, 0x0100, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD30__NF_IO14	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD30__NF_IO14		= IOMUX_PAD(0x0100, 0x0100, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD31__GPIO_63	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD31__GPIO_63		= IOMUX_PAD(0x00fc, 0x00fc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD31__NF_IO15	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD31__NF_IO15		= IOMUX_PAD(0x00fc, 0x00fc, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD3__QSPI0_A_DATA2	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD3__QSPI0_A_DATA2		= IOMUX_PAD(0x0148, 0x0148, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD4__GPIO_83	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD4__GPIO_83         = IOMUX_PAD(0x014C, 0x014C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD4__QSPI0_A_DATA1	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD4__QSPI0_A_DATA1		= IOMUX_PAD(0x014c, 0x014c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD5__DSPI1_CS0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD5__DSPI1_CS0		= IOMUX_PAD(0x0150, 0x0150, 3, 0x300, 1, VF610_DSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD5__QSPI0_A_DATA0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD5__QSPI0_A_DATA0		= IOMUX_PAD(0x0150, 0x0150, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD6__DSPI1_SIN	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD6__DSPI1_SIN		= IOMUX_PAD(0x0154, 0x0154, 3, 0x2fc, 1, VF610_DSPI_SIN_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD7__DSPI1_SOUT	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD7__DSPI1_SOUT		= IOMUX_PAD(0x0158, 0x0158, 3, __NA_, 0, VF610_DSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD7__QSPI0_B_QSCK	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD7__QSPI0_B_QSCK		= IOMUX_PAD(0x0158, 0x0158, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD8__DSPI1_SCK	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD8__DSPI1_SCK		= IOMUX_PAD(0x015c, 0x015c, 3, 0x2f8, 1, VF610_DSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD8__QSPI0_B_CS0	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD8__QSPI0_B_CS0		= IOMUX_PAD(0x015c, 0x015c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD9__GPIO_88	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD9__GPIO_88			= IOMUX_PAD(0x0160, 0x0160, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_PAD_PTD9__QSPI0_B_DATA3	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^	VF610_PAD_PTD9__QSPI0_B_DATA3		= IOMUX_PAD(0x0160, 0x0160, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),$/;"	e	enum:__anon9150ec190103
VF610_QSPI_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_QSPI_PAD_CTRL	/;"	d
VF610_SDHC_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_SDHC_PAD_CTRL	/;"	d
VF610_UART_PAD_CTRL	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define VF610_UART_PAD_CTRL	/;"	d
VFAT_MAXLEN_BYTES	include/fat.h	/^#define VFAT_MAXLEN_BYTES	/;"	d
VFAT_MAXSEQ	include/fat.h	/^#define VFAT_MAXSEQ	/;"	d
VFMCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VFMCR /;"	d
VGA_128KAP_PAGING	include/radeon.h	/^#define VGA_128KAP_PAGING	/;"	d
VGA_AS_SINGLE_DEVICE	drivers/video/Kconfig	/^config VGA_AS_SINGLE_DEVICE$/;"	c	menu:Graphics support
VGA_ATI_LINEAR	include/radeon.h	/^#define VGA_ATI_LINEAR	/;"	d
VGA_BA	include/configs/PLU405.h	/^#define VGA_BA	/;"	d
VGA_BIOS_ADDR	arch/x86/Kconfig	/^config VGA_BIOS_ADDR$/;"	c	menu:x86 architecture
VGA_BIOS_FILE	arch/x86/Kconfig	/^config VGA_BIOS_FILE$/;"	c	menu:x86 architecture
VGA_BUFFER_CNTL	include/radeon.h	/^#define VGA_BUFFER_CNTL	/;"	d
VGA_DDA_ON_OFF	include/radeon.h	/^#define VGA_DDA_ON_OFF	/;"	d
VGA_DDC_CLK_INPUT	include/radeon.h	/^#define VGA_DDC_CLK_INPUT	/;"	d
VGA_DDC_CLK_OUTPUT	include/radeon.h	/^#define VGA_DDC_CLK_OUTPUT	/;"	d
VGA_DDC_CLK_OUT_EN	include/radeon.h	/^#define VGA_DDC_CLK_OUT_EN	/;"	d
VGA_DDC_DATA_INPUT	include/radeon.h	/^#define VGA_DDC_DATA_INPUT	/;"	d
VGA_DDC_DATA_OUTPUT	include/radeon.h	/^#define VGA_DDC_DATA_OUTPUT	/;"	d
VGA_DDC_DATA_OUT_EN	include/radeon.h	/^#define VGA_DDC_DATA_OUT_EN	/;"	d
VGA_inpb	drivers/bios_emulator/besys.c	/^static u8 VGA_inpb (const int port)$/;"	f	typeref:typename:u8	file:
VGA_outpb	drivers/bios_emulator/besys.c	/^static void VGA_outpb (int port, u8 val)$/;"	f	typeref:typename:void	file:
VGEN	include/mc13892.h	/^#define VGEN	/;"	d
VGEN1EN	include/mc13892.h	/^#define VGEN1EN	/;"	d
VGEN1MODE	include/mc13892.h	/^#define VGEN1MODE	/;"	d
VGEN1STBY	include/mc13892.h	/^#define VGEN1STBY	/;"	d
VGEN1_1_2	include/mc13892.h	/^#define VGEN1_1_2	/;"	d
VGEN1_1_5	include/mc13892.h	/^#define VGEN1_1_5	/;"	d
VGEN1_2_775	include/mc13892.h	/^#define VGEN1_2_775	/;"	d
VGEN1_3_15	include/mc13892.h	/^#define VGEN1_3_15	/;"	d
VGEN1_MASK	include/mc13892.h	/^#define VGEN1_MASK	/;"	d
VGEN2EN	include/mc13892.h	/^#define VGEN2EN	/;"	d
VGEN2MODE	include/mc13892.h	/^#define VGEN2MODE	/;"	d
VGEN2STBY	include/mc13892.h	/^#define VGEN2STBY	/;"	d
VGEN2_1_2	include/mc13892.h	/^#define VGEN2_1_2	/;"	d
VGEN2_1_5	include/mc13892.h	/^#define VGEN2_1_5	/;"	d
VGEN2_1_6	include/mc13892.h	/^#define VGEN2_1_6	/;"	d
VGEN2_1_8	include/mc13892.h	/^#define VGEN2_1_8	/;"	d
VGEN2_2_7	include/mc13892.h	/^#define VGEN2_2_7	/;"	d
VGEN2_2_8	include/mc13892.h	/^#define VGEN2_2_8	/;"	d
VGEN2_3_0	include/mc13892.h	/^#define VGEN2_3_0	/;"	d
VGEN2_3_15	include/mc13892.h	/^#define VGEN2_3_15	/;"	d
VGEN2_MASK	include/mc13892.h	/^#define VGEN2_MASK	/;"	d
VGEN3CONFIG	include/mc13892.h	/^#define VGEN3CONFIG	/;"	d
VGEN3EN	include/mc13892.h	/^#define VGEN3EN	/;"	d
VGEN3MODE	include/mc13892.h	/^#define VGEN3MODE	/;"	d
VGEN3STBY	include/mc13892.h	/^#define VGEN3STBY	/;"	d
VGEN3_1_8	include/mc13892.h	/^#define VGEN3_1_8	/;"	d
VGEN3_2_9	include/mc13892.h	/^#define VGEN3_2_9	/;"	d
VGEN3_MASK	include/mc13892.h	/^#define VGEN3_MASK	/;"	d
VGENEN	include/mc13783.h	/^#define VGENEN	/;"	d
VGENMODE	include/mc13783.h	/^#define VGENMODE	/;"	d
VGENSTBY	include/mc13783.h	/^#define VGENSTBY	/;"	d
VHTCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VHTCR /;"	d
VI0_CLKENB_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD5_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RXD6_MARK, VI0_CLKENB_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CC50_STATE31_MARK, VI0_CLK_MARK, AVB_RX_CLK_MARK, VI0_DATA0_VI0_B0_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_D0_B0_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D10_G2_Y2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D11_G3_Y3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D12_G4_Y4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D13_G5_Y5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D14_G6_Y6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D15_G7_Y7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D16_R0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D17_R1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D18_R2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D19_R3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D1_B1_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D20_R4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D21_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D22_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D23_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D2_B2_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D3_B3_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D4_B4_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D5_B5_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D6_B6_C6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D7_B7_C7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D8_G0_Y0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_D9_G1_Y1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_DATA0_VI0_B0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA0_VI0_B0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA0_VI0_B0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA0_VI0_B0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	CC50_STATE31_MARK, VI0_CLK_MARK, AVB_RX_CLK_MARK, VI0_DATA0_VI0_B0_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA0_VI0_B1_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA0_VI0_B2_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA0_VI0_B4_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B4_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA0_VI0_B5_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA0_VI0_B6_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA0_VI0_B7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_DATA0_VI0_B7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_DATA1_VI0_B1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA1_VI0_B1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA1_VI0_B1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_DV_MARK, VI0_DATA1_VI0_B1_MARK, AVB_RXD0_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA2_VI0_B2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA2_VI0_B2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA2_VI0_B2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_DATA2_VI0_B2_MARK, AVB_RXD1_MARK, VI0_DATA3_VI0_B3_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA3_VI0_B3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA3_VI0_B3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA3_VI0_B3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_DATA2_VI0_B2_MARK, AVB_RXD1_MARK, VI0_DATA3_VI0_B3_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA4_VI0_B4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA4_VI0_B4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA4_VI0_B4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD2_MARK, VI0_DATA4_VI0_B4_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA5_VI0_B5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA5_VI0_B5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA5_VI0_B5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_DATA5_VI0_B5_MARK, AVB_RXD4_MARK, VI0_DATA6_VI0_B6_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA6_VI0_B6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA6_VI0_B6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA6_VI0_B6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_DATA5_VI0_B5_MARK, AVB_RXD4_MARK, VI0_DATA6_VI0_B6_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_DATA7_VI0_B7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA7_VI0_B7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_DATA7_VI0_B7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RXD5_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RXD6_MARK, VI0_CLKENB_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_FIELD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_FIELD_MARK, I2C3_SDA_MARK, SCIFA5_TXD_C_MARK, IECLK_C_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_G0_MARK, MSIOF2_RXD_B_MARK, IIC0_SCL_D_MARK, AVB_TX_CLK_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_CRS_DV_MARK, VI0_G1_MARK, MSIOF2_TXD_B_MARK, IIC0_SDA_D_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AD_CLK_MARK, ETH_RXD0_MARK, VI0_G3_MARK, MSIOF2_SYNC_B_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_RXD1_MARK, VI0_G4_MARK, MSIOF2_SS1_B_MARK, SCIF4_RXD_D_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TXD3_MARK, ADICHS1_MARK, ETH_LINK_MARK, VI0_G5_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_REFCLK_MARK, VI0_G6_MARK, SCIF2_SCK_C_MARK, AVB_TXD5_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_G7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_G7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SCK5_B_MARK, ETH_TXD1_MARK, VI0_G7_MARK, SCIF2_RXD_C_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_HSYNC_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_RX_ER_MARK, VI0_HSYNC_N_MARK, SCIF0_RXD_B_MARK, I2C0_SCL_C_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R0_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	VI0_R0_MARK, SCIF2_TXD_C_MARK, IIC1_SDA_D_MARK, AVB_TXD7_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R1_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	SSI_SDATA5_B_MARK, ETH_MAGIC_MARK, VI0_R1_MARK, SCIF3_SCK_B_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R2_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_TX_ER_MARK, SSI_SCK6_B_MARK, ETH_TXD0_MARK, VI0_R2_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R3_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	ETH_MDC_MARK, VI0_R3_MARK, SCIF3_TXD_B_MARK, I2C4_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R4_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_MDC_MARK, SSI_SDATA6_B_MARK, HSCIF0_HRX_MARK, VI0_R4_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HTX_MARK, VI0_R5_MARK, I2C1_SDA_C_MARK, AUDIO_CLKB_B_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	AVB_LINK_MARK, SSI_WS78_B_MARK, HSCIF0_HCTS_N_MARK, VI0_R6_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_R7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona307835a0103	file:
VI0_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI0_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	HSCIF0_HRTS_N_MARK, VI0_R7_MARK, SCIF0_TXD_D_MARK, I2C0_SDA_E_MARK,$/;"	e	enum:__anona307901d0103	file:
VI0_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI0_VSYNC_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI0_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	IERX_C_MARK, AVB_COL_MARK, VI0_VSYNC_N_MARK, SCIF0_TXD_B_MARK,$/;"	e	enum:__anona307901d0103	file:
VI1_CLKENB_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_CLKENB_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLKENB_C_MARK, VI1_G1_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_CLK_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLK_C_MARK, VI1_G0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_D0_B0_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D10_G2_Y2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D11_G3_Y3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D11_G3_Y3_MARK, VI1_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D12_G4_Y4_0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D12_G4_Y4_1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D13_G5_Y5_0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D13_G5_Y5_1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D14_G6_Y6_0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D14_G6_Y6_1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D15_G7_Y7_0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D15_G7_Y7_1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D16_R0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D17_R1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D18_R2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D19_R3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D1_B1_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D20_R4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D21_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D22_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D23_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D2_B2_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D3_B3_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D4_B4_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D5_B5_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D6_B6_C6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D7_B7_C7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D8_G0_Y0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_D9_G1_Y1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_DATA0_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA0_VI1_B0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA0_VI1_B0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA1_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	TCLK1_MARK, VI1_DATA1_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA1_VI1_B1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA1_VI1_B1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA2_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA2_VI1_B2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA2_VI1_B2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA3_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	TCLK2_MARK, VI1_DATA3_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA3_VI1_B3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA3_VI1_B3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA4_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN0_RX_B_MARK, VI1_DATA4_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA4_VI1_B4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA4_VI1_B4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA5_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	CAN0_TX_B_MARK, VI1_DATA5_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA5_VI1_B5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA5_VI1_B5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA6_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GLO_SDATA_C_MARK, VI1_DATA6_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA6_VI1_B6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA6_VI1_B6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA7_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	GLO_SS_C_MARK, VI1_DATA7_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_DATA7_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_DATA7_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_DATA7_VI1_B7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_DATA7_VI1_B7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_DATA7_VI1_B7_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_FIELD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_FIELD_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_D11_G3_Y3_MARK, VI1_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLK_C_MARK, VI1_G0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_CLKENB_C_MARK, VI1_G1_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_HSYNC_N_C_MARK, SCL7_C_MARK, VI1_G4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_VSYNC_N_C_MARK, SDA7_C_MARK, VI1_G5_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_G6_B_MARK, SCIFA3_RXD_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_G7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_G7_B_MARK, SCIFA3_SCK_C_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_G7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_HSYNC_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_HSYNC_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_HSYNC_N_C_MARK, SCL7_C_MARK, VI1_G4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_R0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_R0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_R1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI1_VSYNC_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_VSYNC_N_C_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_VSYNC_N_C_MARK, SDA7_C_MARK, VI1_G5_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI1_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI1_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,$/;"	e	enum:__anona307835a0103	file:
VI1_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI2_CLKENB_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D0_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D10_Y2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D11_Y3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D12_Y4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D13_Y5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D14_Y6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D15_Y7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D1_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D2_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D3_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D4_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D5_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D6_C6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D7_C7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D8_Y0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_D9_Y1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_DATA0_VI2_B0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA0_VI2_B0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA1_VI2_B1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA1_VI2_B1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA2_VI2_B2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA2_VI2_B2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA3_VI2_B3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA3_VI2_B3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA4_VI2_B4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA4_VI2_B4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA5_VI2_B5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA5_VI2_B5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona307835a0103	file:
VI2_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI2_DATA6_VI2_B6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA6_VI2_B6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona307835a0103	file:
VI2_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7793.c	/^	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,$/;"	e	enum:__anona3078bdc0103	file:
VI2_DATA7_VI2_B7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_DATA7_VI2_B7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_FIELD_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_FIELD_MARK, AVB_TXD2_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_G0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_G7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_HSYNC_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_R7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI2_VSYNC_N_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI2_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_CLK_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLK_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D0_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D10_Y2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D10_Y2_MARK, VI3_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D11_Y3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D11_Y3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D12_Y4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D13_Y5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D14_Y6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D15_Y7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D1_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D2_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D3_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D4_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D5_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D6_C6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D7_C7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D8_Y0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_D9_Y1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_DATA0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	GLO_I0_B_MARK, VI3_DATA6_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_D10_Y2_MARK, VI3_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_HSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,$/;"	e	enum:__anona3077f190103	file:
VI3_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,$/;"	e	enum:__anona307879b0103	file:
VI3_VSYNC_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,$/;"	e	enum:__anona3077f190103	file:
VI4_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_CLKENB_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_CLK_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_CLK_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_D0_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D10_Y2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D11_Y3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D1_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D2_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D3_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D4_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D5_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D6_C6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D7_C7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D8_Y0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_D9_Y1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_DATA0_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA0_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA0_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA0_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA10_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA10_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA11_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA11_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA12_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA12_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA13_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA13_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA14_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA14_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA15_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA15_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA16_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA16_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA17_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA17_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA18_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA18_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA19_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA19_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA1_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA1_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA1_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA1_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA20_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA20_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA21_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA21_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA22_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA22_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA23_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA23_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA2_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA2_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA2_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA2_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA3_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA3_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA3_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA3_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA4_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA4_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA4_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA4_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA5_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA5_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA5_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA5_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA6_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA6_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA6_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA6_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA7_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA7_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA7_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA7_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA8_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA8_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_DATA9_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_DATA9_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_FIELD_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_HSYNCx_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_HSYNCx_MARK,$/;"	e	enum:__anona307945e0103	file:
VI4_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI4_VSYNCx_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI4_VSYNCx_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_CLKENB_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_CLKENB_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_CLK_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_D0_C0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D10_Y2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D11_Y3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D1_C1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D2_C2_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D3_C3_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D4_C4_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D5_C5_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D6_C6_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D7_C7_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D8_Y0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_D9_Y1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_DATA0_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA0_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA10_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA10_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA11_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA11_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA12_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA12_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA13_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA13_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA14_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA14_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA1_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA1_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA2_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA2_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA3_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA3_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA4_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA4_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA5_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA5_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA6_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA6_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA7_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA7_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA8_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA8_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_DATA9_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_DATA9_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_FIELD_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_HSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_HSYNCx_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_HSYNCx_MARK,$/;"	e	enum:__anona307945e0103	file:
VI5_VSYNC_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,$/;"	e	enum:__anona307879b0103	file:
VI5_VSYNCx_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VI5_VSYNCx_MARK,$/;"	e	enum:__anona307945e0103	file:
VIA_ID	include/configs/MPC8541CDS.h	/^#define VIA_ID /;"	d
VIA_ID	include/configs/MPC8548CDS.h	/^#define VIA_ID /;"	d
VIA_ID	include/configs/MPC8555CDS.h	/^#define VIA_ID /;"	d
VICA_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define VICA_BASE_ADDR /;"	d
VICB_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define VICB_BASE_ADDR /;"	d
VIDCONSOLE_AS_LCD	drivers/video/Kconfig	/^config VIDCONSOLE_AS_LCD$/;"	c	menu:Graphics support
VIDEO	board/sunxi/Kconfig	/^config VIDEO$/;"	c
VIDEO	drivers/video/Kconfig	/^config VIDEO$/;"	c	menu:Graphics support
VIDEOSTBY	include/mc13892.h	/^#define VIDEOSTBY	/;"	d
VIDEO_ACTIVE_HIGH	include/video.h	/^	VIDEO_ACTIVE_HIGH,	\/* Pins are active high *\/$/;"	e	enum:video_polarity
VIDEO_ACTIVE_LOW	include/video.h	/^	VIDEO_ACTIVE_LOW,	\/* Pins are active low *\/$/;"	e	enum:video_polarity
VIDEO_BCSR4_EXTCLK_BIT	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_BCSR4_EXTCLK_BIT	/;"	d	file:
VIDEO_BCSR4_RESET_BIT	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_BCSR4_RESET_BIT	/;"	d	file:
VIDEO_BCSR4_VIDLED_BIT	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_BCSR4_VIDLED_BIT	/;"	d	file:
VIDEO_BG_COL	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_BG_COL	/;"	d	file:
VIDEO_BIST_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_BIST_MASK	/;"	d
VIDEO_BPP1	include/video.h	/^	VIDEO_BPP1	= 0,$/;"	e	enum:video_log2_bpp
VIDEO_BPP16	drivers/video/Kconfig	/^config VIDEO_BPP16$/;"	c	menu:Graphics support
VIDEO_BPP16	include/video.h	/^	VIDEO_BPP16,$/;"	e	enum:video_log2_bpp
VIDEO_BPP2	include/video.h	/^	VIDEO_BPP2,$/;"	e	enum:video_log2_bpp
VIDEO_BPP32	drivers/video/Kconfig	/^config VIDEO_BPP32$/;"	c	menu:Graphics support
VIDEO_BPP32	include/video.h	/^	VIDEO_BPP32,$/;"	e	enum:video_log2_bpp
VIDEO_BPP4	include/video.h	/^	VIDEO_BPP4,$/;"	e	enum:video_log2_bpp
VIDEO_BPP8	drivers/video/Kconfig	/^config VIDEO_BPP8$/;"	c	menu:Graphics support
VIDEO_BPP8	include/video.h	/^	VIDEO_BPP8,$/;"	e	enum:video_log2_bpp
VIDEO_BRIDGE	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE$/;"	c
VIDEO_BRIDGE_NXP_PTN3460	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE_NXP_PTN3460$/;"	c
VIDEO_BRIDGE_PARADE_PS862X	drivers/video/bridge/Kconfig	/^config VIDEO_BRIDGE_PARADE_PS862X$/;"	c
VIDEO_BROADWELL_IGD	drivers/video/Kconfig	/^config VIDEO_BROADWELL_IGD$/;"	c	menu:Graphics support
VIDEO_BURST_LEN	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_BURST_LEN	/;"	d	file:
VIDEO_BURST_LEN	drivers/video/cfb_console.c	/^#define VIDEO_BURST_LEN	/;"	d	file:
VIDEO_COLS	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_COLS	/;"	d	file:
VIDEO_COLS	drivers/video/cfb_console.c	/^#define VIDEO_COLS	/;"	d	file:
VIDEO_COMPOSITE	board/sunxi/Kconfig	/^config VIDEO_COMPOSITE$/;"	c
VIDEO_COREBOOT	drivers/video/Kconfig	/^config VIDEO_COREBOOT$/;"	c	menu:Graphics support
VIDEO_CT69000	drivers/video/Kconfig	/^config VIDEO_CT69000$/;"	c	menu:Graphics support
VIDEO_DATA_FORMAT	drivers/video/cfb_console.c	/^#define VIDEO_DATA_FORMAT	/;"	d	file:
VIDEO_EN	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VIDEO_EN	/;"	d
VIDEO_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_EN	/;"	d
VIDEO_EN_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_EN_MASK	/;"	d
VIDEO_FB_16BPP_PIXEL_SWAP	include/configs/lwmon5.h	/^#define VIDEO_FB_16BPP_PIXEL_SWAP$/;"	d
VIDEO_FB_16BPP_PIXEL_SWAP	include/configs/nokia_rx51.h	/^#define VIDEO_FB_16BPP_PIXEL_SWAP$/;"	d
VIDEO_FB_16BPP_PIXEL_SWAP	include/configs/socrates.h	/^#define VIDEO_FB_16BPP_PIXEL_SWAP$/;"	d
VIDEO_FB_16BPP_WORD_SWAP	drivers/video/cfb_console.c	/^#define VIDEO_FB_16BPP_WORD_SWAP$/;"	d	file:
VIDEO_FB_16BPP_WORD_SWAP	include/configs/ipek01.h	/^#define VIDEO_FB_16BPP_WORD_SWAP$/;"	d
VIDEO_FB_16BPP_WORD_SWAP	include/configs/lwmon5.h	/^#define VIDEO_FB_16BPP_WORD_SWAP$/;"	d
VIDEO_FB_16BPP_WORD_SWAP	include/configs/nokia_rx51.h	/^#define VIDEO_FB_16BPP_WORD_SWAP$/;"	d
VIDEO_FB_16BPP_WORD_SWAP	include/configs/socrates.h	/^#define VIDEO_FB_16BPP_WORD_SWAP$/;"	d
VIDEO_FB_ADRS	drivers/video/cfb_console.c	/^#define VIDEO_FB_ADRS	/;"	d	file:
VIDEO_FB_LITTLE_ENDIAN	drivers/video/cfb_console.c	/^#define VIDEO_FB_LITTLE_ENDIAN$/;"	d	file:
VIDEO_FB_LITTLE_ENDIAN	include/configs/icon.h	/^#define VIDEO_FB_LITTLE_ENDIAN$/;"	d
VIDEO_FLAGS_NOCURSOR	include/linux/screen_info.h	/^#define VIDEO_FLAGS_NOCURSOR	/;"	d
VIDEO_FONT_BYTE_WIDTH	drivers/video/sed156x.c	/^#define VIDEO_FONT_BYTE_WIDTH	/;"	d	file:
VIDEO_FONT_CHARS	include/video_font_4x6.h	/^#define VIDEO_FONT_CHARS	/;"	d
VIDEO_FONT_CHARS	include/video_font_data.h	/^#define VIDEO_FONT_CHARS	/;"	d
VIDEO_FONT_HEIGHT	include/video_font_4x6.h	/^#define VIDEO_FONT_HEIGHT	/;"	d
VIDEO_FONT_HEIGHT	include/video_font_data.h	/^#define VIDEO_FONT_HEIGHT	/;"	d
VIDEO_FONT_SIZE	include/video_font_4x6.h	/^#define VIDEO_FONT_SIZE	/;"	d
VIDEO_FONT_SIZE	include/video_font_data.h	/^#define VIDEO_FONT_SIZE	/;"	d
VIDEO_FONT_WIDTH	include/video_font_4x6.h	/^#define VIDEO_FONT_WIDTH	/;"	d
VIDEO_FONT_WIDTH	include/video_font_data.h	/^#define VIDEO_FONT_WIDTH	/;"	d
VIDEO_FORMAT_RGB_DIRECTCOLOR	include/stdio_dev.h	/^#define VIDEO_FORMAT_RGB_DIRECTCOLOR	/;"	d
VIDEO_FORMAT_RGB_INDEXED	include/stdio_dev.h	/^#define VIDEO_FORMAT_RGB_INDEXED	/;"	d
VIDEO_FORMAT_YUYV_4_2_2	include/stdio_dev.h	/^#define VIDEO_FORMAT_YUYV_4_2_2	/;"	d
VIDEO_FORMAT_YUYV_4_4_4	include/stdio_dev.h	/^#define VIDEO_FORMAT_YUYV_4_4_4	/;"	d
VIDEO_FREF	drivers/video/ct69000.c	/^#define VIDEO_FREF /;"	d	file:
VIDEO_GETC_FCT	include/configs/nokia_rx51.h	/^#define VIDEO_GETC_FCT	/;"	d
VIDEO_HDMI	board/sunxi/Kconfig	/^config VIDEO_HDMI$/;"	c
VIDEO_HW_BITBLT	drivers/video/cfb_console.c	/^#define VIDEO_HW_BITBLT$/;"	d	file:
VIDEO_HW_RECTFILL	drivers/video/cfb_console.c	/^#define VIDEO_HW_RECTFILL$/;"	d	file:
VIDEO_INFO	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_INFO	/;"	d	file:
VIDEO_INFO_X	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_INFO_X	/;"	d	file:
VIDEO_INFO_X	drivers/video/cfb_console.c	/^#define VIDEO_INFO_X	/;"	d	file:
VIDEO_INFO_Y	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_INFO_Y	/;"	d	file:
VIDEO_INFO_Y	drivers/video/cfb_console.c	/^#define VIDEO_INFO_Y	/;"	d	file:
VIDEO_IO_OFFSET	include/configs/MPC8536DS.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/MPC8544DS.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/MPC8572DS.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/MPC8641HPCN.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/P1022DS.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/conga-qeval20-qa3-e3845.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/dfi-bt700.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/minnowmax.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/sequoia.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/som-6896.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/som-db5800-som-6867.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IO_OFFSET	include/configs/x86-chromebook.h	/^#define VIDEO_IO_OFFSET	/;"	d
VIDEO_IVYBRIDGE_IGD	drivers/video/Kconfig	/^config VIDEO_IVYBRIDGE_IGD$/;"	c	menu:Graphics support
VIDEO_KBD_INIT_FCT	include/configs/nokia_rx51.h	/^#define VIDEO_KBD_INIT_FCT	/;"	d
VIDEO_LCD_ANX9804	drivers/video/Kconfig	/^config VIDEO_LCD_ANX9804$/;"	c	menu:Graphics support
VIDEO_LCD_BL_EN	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_EN$/;"	c
VIDEO_LCD_BL_PWM	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_PWM$/;"	c
VIDEO_LCD_BL_PWM_ACTIVE_LOW	board/sunxi/Kconfig	/^config VIDEO_LCD_BL_PWM_ACTIVE_LOW$/;"	c
VIDEO_LCD_DCLK_PHASE	board/sunxi/Kconfig	/^config VIDEO_LCD_DCLK_PHASE$/;"	c
VIDEO_LCD_HITACHI_TX18D42VM	drivers/video/Kconfig	/^config VIDEO_LCD_HITACHI_TX18D42VM$/;"	c	menu:Graphics support
VIDEO_LCD_IF_LVDS	board/sunxi/Kconfig	/^config VIDEO_LCD_IF_LVDS$/;"	c
VIDEO_LCD_IF_PARALLEL	board/sunxi/Kconfig	/^config VIDEO_LCD_IF_PARALLEL$/;"	c
VIDEO_LCD_MODE	board/sunxi/Kconfig	/^config VIDEO_LCD_MODE$/;"	c
VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804$/;"	c	choice:choicebcdb41430304
VIDEO_LCD_PANEL_HITACHI_TX18D42VM	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_HITACHI_TX18D42VM$/;"	c	choice:choicebcdb41430304
VIDEO_LCD_PANEL_I2C	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C$/;"	c
VIDEO_LCD_PANEL_I2C_SCL	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C_SCL$/;"	c
VIDEO_LCD_PANEL_I2C_SDA	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_I2C_SDA$/;"	c
VIDEO_LCD_PANEL_LVDS	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_LVDS$/;"	c	choice:choicebcdb41430304
VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828$/;"	c	choice:choicebcdb41430304
VIDEO_LCD_PANEL_PARALLEL	board/sunxi/Kconfig	/^config VIDEO_LCD_PANEL_PARALLEL$/;"	c	choice:choicebcdb41430304
VIDEO_LCD_POWER	board/sunxi/Kconfig	/^config VIDEO_LCD_POWER$/;"	c
VIDEO_LCD_RESET	board/sunxi/Kconfig	/^config VIDEO_LCD_RESET$/;"	c
VIDEO_LCD_SPI_CS	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_CS$/;"	c	menu:Graphics support
VIDEO_LCD_SPI_MISO	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_MISO$/;"	c	menu:Graphics support
VIDEO_LCD_SPI_MOSI	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_MOSI$/;"	c	menu:Graphics support
VIDEO_LCD_SPI_SCLK	drivers/video/Kconfig	/^config VIDEO_LCD_SPI_SCLK$/;"	c	menu:Graphics support
VIDEO_LCD_SSD2828	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828$/;"	c	menu:Graphics support
VIDEO_LCD_SSD2828_RESET	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828_RESET$/;"	c	menu:Graphics support
VIDEO_LCD_SSD2828_TX_CLK	drivers/video/Kconfig	/^config VIDEO_LCD_SSD2828_TX_CLK$/;"	c	menu:Graphics support
VIDEO_LCD_TL059WV5C0	board/sunxi/Kconfig	/^config VIDEO_LCD_TL059WV5C0$/;"	c	choice:choicebcdb41430304
VIDEO_LINE_LEN	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_LINE_LEN	/;"	d	file:
VIDEO_LINE_LEN	drivers/video/cfb_console.c	/^#define VIDEO_LINE_LEN	/;"	d	file:
VIDEO_LINE_LEN	include/configs/sunxi-common.h	/^#define VIDEO_LINE_LEN /;"	d
VIDEO_LOGO_ADDR	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_LOGO_ADDR	/;"	d	file:
VIDEO_LOGO_COLORS	drivers/video/cfb_console.c	/^#define VIDEO_LOGO_COLORS	/;"	d	file:
VIDEO_LOGO_HEIGHT	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_LOGO_HEIGHT	/;"	d	file:
VIDEO_LOGO_HEIGHT	drivers/video/cfb_console.c	/^#define VIDEO_LOGO_HEIGHT	/;"	d	file:
VIDEO_LOGO_LUT_OFFSET	drivers/video/cfb_console.c	/^#define VIDEO_LOGO_LUT_OFFSET	/;"	d	file:
VIDEO_LOGO_SKIP	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_LOGO_SKIP	/;"	d	file:
VIDEO_LOGO_WIDTH	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_LOGO_WIDTH	/;"	d	file:
VIDEO_LOGO_WIDTH	drivers/video/cfb_console.c	/^#define VIDEO_LOGO_WIDTH	/;"	d	file:
VIDEO_MASTER_CLK_SEL	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_MASTER_CLK_SEL	/;"	d
VIDEO_MASTER_MODE_EN	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_MASTER_MODE_EN	/;"	d
VIDEO_MEM_SIZE	drivers/video/mb862xx.c	/^#define VIDEO_MEM_SIZE	/;"	d	file:
VIDEO_MODE_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_MODE_MASK	/;"	d
VIDEO_MODE_MASTER_MODE	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_MODE_MASTER_MODE	/;"	d
VIDEO_MODE_PAL	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_MODE_PAL$/;"	d	file:
VIDEO_MODE_SLAVE_MODE	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_MODE_SLAVE_MODE	/;"	d
VIDEO_MODE_TMP1	arch/powerpc/cpu/mpc8xx/video.c	/^# define VIDEO_MODE_TMP1	/;"	d	file:
VIDEO_MODE_TMP2	arch/powerpc/cpu/mpc8xx/video.c	/^# define VIDEO_MODE_TMP2	/;"	d	file:
VIDEO_MUTE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VIDEO_MUTE	/;"	d
VIDEO_MUTE_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define VIDEO_MUTE_MASK	/;"	d
VIDEO_MVEBU	drivers/video/Kconfig	/^config VIDEO_MVEBU$/;"	c	menu:Graphics support
VIDEO_PIXEL_SIZE	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_PIXEL_SIZE	/;"	d	file:
VIDEO_PIXEL_SIZE	drivers/video/cfb_console.c	/^#define VIDEO_PIXEL_SIZE	/;"	d	file:
VIDEO_PIX_BLOCKS	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_PIX_BLOCKS	/;"	d	file:
VIDEO_PLL	arch/arm/include/asm/arch-s32v234/clock.h	/^	VIDEO_PLL,$/;"	e	enum:pll_type
VIDEO_PLL_PHI0_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define VIDEO_PLL_PHI0_FREQ	/;"	d
VIDEO_PLL_PHI1_DFS_Nr	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define VIDEO_PLL_PHI1_DFS_Nr	/;"	d
VIDEO_PLL_PHI1_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define VIDEO_PLL_PHI1_FREQ	/;"	d
VIDEO_PLL_PLLDV_MFD	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define VIDEO_PLL_PLLDV_MFD	/;"	d
VIDEO_PLL_PLLDV_MFN	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define VIDEO_PLL_PLLDV_MFN	/;"	d
VIDEO_PLL_PLLDV_PREDIV	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define VIDEO_PLL_PLLDV_PREDIV	/;"	d
VIDEO_ROCKCHIP	drivers/video/Kconfig	/^config VIDEO_ROCKCHIP$/;"	c	menu:Graphics support
VIDEO_ROWS	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_ROWS	/;"	d	file:
VIDEO_ROWS	drivers/video/cfb_console.c	/^#define VIDEO_ROWS	/;"	d	file:
VIDEO_SANDBOX_SDL	drivers/video/Kconfig	/^config VIDEO_SANDBOX_SDL$/;"	c	menu:Graphics support
VIDEO_SIZE	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_SIZE	/;"	d	file:
VIDEO_SIZE	drivers/video/cfb_console.c	/^#define VIDEO_SIZE	/;"	d	file:
VIDEO_SW_CURSOR	drivers/video/Kconfig	/^config VIDEO_SW_CURSOR$/;"	c	menu:Graphics support
VIDEO_TEGRA124	drivers/video/Kconfig	/^config VIDEO_TEGRA124$/;"	c	menu:Graphics support
VIDEO_TEGRA20	drivers/video/Kconfig	/^config VIDEO_TEGRA20$/;"	c	menu:Graphics support
VIDEO_TIMING_FROM_CAPTURE	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VIDEO_TIMING_FROM_CAPTURE,$/;"	e	enum:video_timing_recognition_type
VIDEO_TIMING_FROM_CAPTURE	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VIDEO_TIMING_FROM_CAPTURE,$/;"	e	enum:__anon79d8640c0e03
VIDEO_TIMING_FROM_REGISTER	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VIDEO_TIMING_FROM_REGISTER$/;"	e	enum:video_timing_recognition_type
VIDEO_TIMING_FROM_REGISTER	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VIDEO_TIMING_FROM_REGISTER$/;"	e	enum:__anon79d8640c0e03
VIDEO_TSTC_FCT	include/configs/nokia_rx51.h	/^#define VIDEO_TSTC_FCT	/;"	d
VIDEO_TYPE_CGA	include/linux/screen_info.h	/^#define VIDEO_TYPE_CGA	/;"	d
VIDEO_TYPE_EFI	include/linux/screen_info.h	/^#define VIDEO_TYPE_EFI	/;"	d
VIDEO_TYPE_EGAC	include/linux/screen_info.h	/^#define VIDEO_TYPE_EGAC	/;"	d
VIDEO_TYPE_EGAM	include/linux/screen_info.h	/^#define VIDEO_TYPE_EGAM	/;"	d
VIDEO_TYPE_MDA	include/linux/screen_info.h	/^#define VIDEO_TYPE_MDA	/;"	d
VIDEO_TYPE_MIPS_G364	include/linux/screen_info.h	/^#define VIDEO_TYPE_MIPS_G364	/;"	d
VIDEO_TYPE_PICA_S3	include/linux/screen_info.h	/^#define VIDEO_TYPE_PICA_S3	/;"	d
VIDEO_TYPE_PMAC	include/linux/screen_info.h	/^#define VIDEO_TYPE_PMAC	/;"	d
VIDEO_TYPE_SGI	include/linux/screen_info.h	/^#define VIDEO_TYPE_SGI /;"	d
VIDEO_TYPE_SUN	include/linux/screen_info.h	/^#define VIDEO_TYPE_SUN /;"	d
VIDEO_TYPE_SUNPCI	include/linux/screen_info.h	/^#define VIDEO_TYPE_SUNPCI /;"	d
VIDEO_TYPE_TGAC	include/linux/screen_info.h	/^#define VIDEO_TYPE_TGAC	/;"	d
VIDEO_TYPE_VGAC	include/linux/screen_info.h	/^#define VIDEO_TYPE_VGAC	/;"	d
VIDEO_TYPE_VLFB	include/linux/screen_info.h	/^#define VIDEO_TYPE_VLFB	/;"	d
VIDEO_VCCR_CSRC	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VCCR_CSRC	/;"	d	file:
VIDEO_VCCR_IEN	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VCCR_IEN	/;"	d	file:
VIDEO_VCCR_PDF	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VCCR_PDF	/;"	d	file:
VIDEO_VCCR_VON	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VCCR_VON	/;"	d	file:
VIDEO_VCMR_ASEL	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VCMR_ASEL	/;"	d	file:
VIDEO_VCMR_BD	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VCMR_BD	/;"	d	file:
VIDEO_VESA	drivers/video/Kconfig	/^config VIDEO_VESA$/;"	c	menu:Graphics support
VIDEO_VGA	board/sunxi/Kconfig	/^config VIDEO_VGA$/;"	c
VIDEO_VGA_EXTERNAL_DAC_EN	board/sunxi/Kconfig	/^config VIDEO_VGA_EXTERNAL_DAC_EN$/;"	c
VIDEO_VGA_VIA_LCD	board/sunxi/Kconfig	/^config VIDEO_VGA_VIA_LCD$/;"	c
VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH	board/sunxi/Kconfig	/^config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH$/;"	c
VIDEO_VISIBLE_COLS	drivers/video/cfb_console.c	/^#define VIDEO_VISIBLE_COLS	/;"	d	file:
VIDEO_VISIBLE_ROWS	drivers/video/cfb_console.c	/^#define VIDEO_VISIBLE_ROWS	/;"	d	file:
VIDEO_VSR_CAS	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VSR_CAS	/;"	d	file:
VIDEO_VSR_EOF	arch/powerpc/cpu/mpc8xx/video.c	/^#define VIDEO_VSR_EOF	/;"	d	file:
VID_CAP_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_CAP_FUNC_EN_N	/;"	d
VID_CHK_UPDATE_TYPE_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_CHK_UPDATE_TYPE_0	/;"	d
VID_CHK_UPDATE_TYPE_0	arch/arm/mach-exynos/include/mach/dp.h	/^#define VID_CHK_UPDATE_TYPE_0	/;"	d
VID_CHK_UPDATE_TYPE_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_CHK_UPDATE_TYPE_1	/;"	d
VID_CHK_UPDATE_TYPE_1	arch/arm/mach-exynos/include/mach/dp.h	/^#define VID_CHK_UPDATE_TYPE_1	/;"	d
VID_CHK_UPDATE_TYPE_MASK	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_CHK_UPDATE_TYPE_MASK	/;"	d
VID_CHK_UPDATE_TYPE_MASK	arch/arm/mach-exynos/include/mach/dp.h	/^#define VID_CHK_UPDATE_TYPE_MASK	/;"	d
VID_CHK_UPDATE_TYPE_SHIFT	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_CHK_UPDATE_TYPE_SHIFT	/;"	d
VID_CHK_UPDATE_TYPE_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define VID_CHK_UPDATE_TYPE_SHIFT	/;"	d
VID_CLK_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_CLK_CHG	/;"	d
VID_CLK_CHG	arch/arm/mach-exynos/include/mach/dp.h	/^#define VID_CLK_CHG	/;"	d
VID_FIFO_FUNC_EN_N	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_FIFO_FUNC_EN_N	/;"	d
VID_FORMAT_CHG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_FORMAT_CHG	/;"	d
VID_FORMAT_CHG	arch/arm/mach-exynos/include/mach/dp.h	/^#define VID_FORMAT_CHG	/;"	d
VID_FRAC_DIV	include/video_console.h	/^#define VID_FRAC_DIV	/;"	d
VID_HRES_TH	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_HRES_TH(/;"	d
VID_TO_PIXEL	include/video_console.h	/^#define VID_TO_PIXEL(/;"	d
VID_TO_POS	include/video_console.h	/^#define VID_TO_POS(/;"	d
VID_VRES_TH	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VID_VRES_TH(/;"	d
VIF1	drivers/usb/host/r8a66597.h	/^#define	  VIF1	/;"	d
VIF3	drivers/usb/host/r8a66597.h	/^#define	  VIF3	/;"	d
VILLA_DSP_SDS_DSP_COEF_DFE0_SELECT	include/cortina.h	/^#define VILLA_DSP_SDS_DSP_COEF_DFE0_SELECT /;"	d
VILLA_DSP_SDS_DSP_COEF_LARGE_LEAK	include/cortina.h	/^#define VILLA_DSP_SDS_DSP_COEF_LARGE_LEAK /;"	d
VILLA_DSP_SDS_DSP_PRECODEDINITFFE21	include/cortina.h	/^#define VILLA_DSP_SDS_DSP_PRECODEDINITFFE21 /;"	d
VILLA_DSP_SDS_SERDES_SRX_DAC_BIAS_SELECT1_MSB	include/cortina.h	/^#define VILLA_DSP_SDS_SERDES_SRX_DAC_BIAS_SELECT1_MSB /;"	d
VILLA_DSP_SDS_SERDES_SRX_DAC_ENABLEB_LSB	include/cortina.h	/^#define VILLA_DSP_SDS_SERDES_SRX_DAC_ENABLEB_LSB /;"	d
VILLA_DSP_SDS_SERDES_SRX_DFE0_SELECT	include/cortina.h	/^#define VILLA_DSP_SDS_SERDES_SRX_DFE0_SELECT /;"	d
VILLA_DSP_SDS_SERDES_SRX_FFE_DELAY_CTRL	include/cortina.h	/^#define VILLA_DSP_SDS_SERDES_SRX_FFE_DELAY_CTRL	/;"	d
VILLA_GLOBAL_BIST_CONTROL	include/cortina.h	/^#define VILLA_GLOBAL_BIST_CONTROL /;"	d
VILLA_GLOBAL_BIST_STATUS	include/cortina.h	/^#define VILLA_GLOBAL_BIST_STATUS /;"	d
VILLA_GLOBAL_CHIP_ID_LSB	include/cortina.h	/^#define VILLA_GLOBAL_CHIP_ID_LSB /;"	d
VILLA_GLOBAL_CHIP_ID_MSB	include/cortina.h	/^#define VILLA_GLOBAL_CHIP_ID_MSB /;"	d
VILLA_GLOBAL_DWNLD_CHECKSUM_CTRL	include/cortina.h	/^#define VILLA_GLOBAL_DWNLD_CHECKSUM_CTRL /;"	d
VILLA_GLOBAL_DWNLD_CHECKSUM_STATUS	include/cortina.h	/^#define VILLA_GLOBAL_DWNLD_CHECKSUM_STATUS /;"	d
VILLA_GLOBAL_HOST_SOFT_RESET	include/cortina.h	/^#define VILLA_GLOBAL_HOST_SOFT_RESET /;"	d
VILLA_GLOBAL_LINE_SOFT_RESET	include/cortina.h	/^#define VILLA_GLOBAL_LINE_SOFT_RESET /;"	d
VILLA_GLOBAL_MSEQCLKCTRL	include/cortina.h	/^#define VILLA_GLOBAL_MSEQCLKCTRL /;"	d
VILLA_GLOBAL_VILLA2_COMPATIBLE	include/cortina.h	/^#define VILLA_GLOBAL_VILLA2_COMPATIBLE /;"	d
VILLA_HOST_SDS_COMMON_STX0_TX_OUTPUT_CTRLA	include/cortina.h	/^#define VILLA_HOST_SDS_COMMON_STX0_TX_OUTPUT_CTRLA /;"	d
VILLA_HOST_SDS_COMMON_STX0_TX_OUTPUT_CTRLB	include/cortina.h	/^#define VILLA_HOST_SDS_COMMON_STX0_TX_OUTPUT_CTRLB /;"	d
VILLA_LINE_SDS_COMMON_SRX0_RX_CPA	include/cortina.h	/^#define VILLA_LINE_SDS_COMMON_SRX0_RX_CPA	/;"	d
VILLA_LINE_SDS_COMMON_SRX0_RX_CPB	include/cortina.h	/^#define VILLA_LINE_SDS_COMMON_SRX0_RX_CPB	/;"	d
VILLA_LINE_SDS_COMMON_SRX0_RX_LOOP_FILTER	include/cortina.h	/^#define VILLA_LINE_SDS_COMMON_SRX0_RX_LOOP_FILTER /;"	d
VILLA_LINE_SDS_COMMON_STX0_TX_OUTPUT_CTRLA	include/cortina.h	/^#define VILLA_LINE_SDS_COMMON_STX0_TX_OUTPUT_CTRLA /;"	d
VILLA_LINE_SDS_COMMON_STX0_TX_OUTPUT_CTRLB	include/cortina.h	/^#define VILLA_LINE_SDS_COMMON_STX0_TX_OUTPUT_CTRLB /;"	d
VILLA_MSEQ_BANKSELECT	include/cortina.h	/^#define VILLA_MSEQ_BANKSELECT /;"	d
VILLA_MSEQ_CAL_RX_DFE_EQ	include/cortina.h	/^#define VILLA_MSEQ_CAL_RX_DFE_EQ /;"	d
VILLA_MSEQ_CAL_RX_SLICER	include/cortina.h	/^#define VILLA_MSEQ_CAL_RX_SLICER /;"	d
VILLA_MSEQ_COEF8_DFE0N_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_DFE0N_LSB /;"	d
VILLA_MSEQ_COEF8_DFE0_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_DFE0_LSB /;"	d
VILLA_MSEQ_COEF8_DFE1_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_DFE1_LSB /;"	d
VILLA_MSEQ_COEF8_FFE0_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_FFE0_LSB /;"	d
VILLA_MSEQ_COEF8_FFE1_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_FFE1_LSB /;"	d
VILLA_MSEQ_COEF8_FFE2_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_FFE2_LSB /;"	d
VILLA_MSEQ_COEF8_FFE3_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_FFE3_LSB /;"	d
VILLA_MSEQ_COEF8_FFE4_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_FFE4_LSB /;"	d
VILLA_MSEQ_COEF8_FFE5_LSB	include/cortina.h	/^#define VILLA_MSEQ_COEF8_FFE5_LSB /;"	d
VILLA_MSEQ_COEF_INIT_SEL	include/cortina.h	/^#define VILLA_MSEQ_COEF_INIT_SEL /;"	d
VILLA_MSEQ_ENABLE_MSB	include/cortina.h	/^#define VILLA_MSEQ_ENABLE_MSB	/;"	d
VILLA_MSEQ_OPTIONS	include/cortina.h	/^#define VILLA_MSEQ_OPTIONS /;"	d
VILLA_MSEQ_PC	include/cortina.h	/^#define VILLA_MSEQ_PC	/;"	d
VILLA_MSEQ_POWER_DOWN_LSB	include/cortina.h	/^#define VILLA_MSEQ_POWER_DOWN_LSB /;"	d
VILLA_MSEQ_POWER_DOWN_MSB	include/cortina.h	/^#define VILLA_MSEQ_POWER_DOWN_MSB /;"	d
VILLA_MSEQ_RESET_COUNT_LSB	include/cortina.h	/^#define VILLA_MSEQ_RESET_COUNT_LSB /;"	d
VILLA_MSEQ_SERDES_PARAM_LSB	include/cortina.h	/^#define VILLA_MSEQ_SERDES_PARAM_LSB /;"	d
VILLA_MSEQ_SPARE12_MSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE12_MSB /;"	d
VILLA_MSEQ_SPARE21_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE21_LSB	/;"	d
VILLA_MSEQ_SPARE23_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE23_LSB	/;"	d
VILLA_MSEQ_SPARE25_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE25_LSB	/;"	d
VILLA_MSEQ_SPARE2_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE2_LSB /;"	d
VILLA_MSEQ_SPARE3_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE3_LSB /;"	d
VILLA_MSEQ_SPARE3_MSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE3_MSB /;"	d
VILLA_MSEQ_SPARE7_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE7_LSB /;"	d
VILLA_MSEQ_SPARE8_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE8_LSB /;"	d
VILLA_MSEQ_SPARE8_MSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE8_MSB /;"	d
VILLA_MSEQ_SPARE9_LSB	include/cortina.h	/^#define VILLA_MSEQ_SPARE9_LSB /;"	d
VIN1A_CLK0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_CLK0	/;"	d
VIN1A_D0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D0	/;"	d
VIN1A_D1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D1	/;"	d
VIN1A_D10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D10	/;"	d
VIN1A_D11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D11	/;"	d
VIN1A_D12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D12	/;"	d
VIN1A_D13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D13	/;"	d
VIN1A_D14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D14	/;"	d
VIN1A_D15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D15	/;"	d
VIN1A_D16	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D16	/;"	d
VIN1A_D17	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D17	/;"	d
VIN1A_D18	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D18	/;"	d
VIN1A_D19	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D19	/;"	d
VIN1A_D2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D2	/;"	d
VIN1A_D20	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D20	/;"	d
VIN1A_D21	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D21	/;"	d
VIN1A_D22	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D22	/;"	d
VIN1A_D23	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D23	/;"	d
VIN1A_D3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D3	/;"	d
VIN1A_D4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D4	/;"	d
VIN1A_D5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D5	/;"	d
VIN1A_D6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D6	/;"	d
VIN1A_D7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D7	/;"	d
VIN1A_D8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D8	/;"	d
VIN1A_D9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_D9	/;"	d
VIN1A_DE0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_DE0	/;"	d
VIN1A_FLD0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_FLD0	/;"	d
VIN1A_HSYNC0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_HSYNC0	/;"	d
VIN1A_VSYNC0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1A_VSYNC0	/;"	d
VIN1B_CLK1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN1B_CLK1	/;"	d
VIN2A_CLK0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_CLK0	/;"	d
VIN2A_D0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D0	/;"	d
VIN2A_D1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D1	/;"	d
VIN2A_D10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D10	/;"	d
VIN2A_D11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D11	/;"	d
VIN2A_D12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D12	/;"	d
VIN2A_D13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D13	/;"	d
VIN2A_D13_DLY_VAL	board/ti/am57xx/board.c	/^#define VIN2A_D13_DLY_VAL	/;"	d	file:
VIN2A_D14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D14	/;"	d
VIN2A_D14_DLY_VAL	board/ti/am57xx/board.c	/^#define VIN2A_D14_DLY_VAL	/;"	d	file:
VIN2A_D15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D15	/;"	d
VIN2A_D15_DLY_VAL	board/ti/am57xx/board.c	/^#define VIN2A_D15_DLY_VAL	/;"	d	file:
VIN2A_D16	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D16	/;"	d
VIN2A_D16_DLY_VAL	board/ti/am57xx/board.c	/^#define VIN2A_D16_DLY_VAL	/;"	d	file:
VIN2A_D17	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D17	/;"	d
VIN2A_D17_DLY_VAL	board/ti/am57xx/board.c	/^#define VIN2A_D17_DLY_VAL	/;"	d	file:
VIN2A_D18	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D18	/;"	d
VIN2A_D19	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D19	/;"	d
VIN2A_D2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D2	/;"	d
VIN2A_D20	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D20	/;"	d
VIN2A_D21	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D21	/;"	d
VIN2A_D22	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D22	/;"	d
VIN2A_D23	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D23	/;"	d
VIN2A_D3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D3	/;"	d
VIN2A_D4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D4	/;"	d
VIN2A_D5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D5	/;"	d
VIN2A_D6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D6	/;"	d
VIN2A_D7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D7	/;"	d
VIN2A_D8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D8	/;"	d
VIN2A_D9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_D9	/;"	d
VIN2A_DE0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_DE0	/;"	d
VIN2A_FLD0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_FLD0	/;"	d
VIN2A_HSYNC0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_HSYNC0	/;"	d
VIN2A_VSYNC0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIN2A_VSYNC0	/;"	d
VINT_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VINT_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO0_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D12_MARK,	VIO0_VD_MARK,	VIO0_HD_MARK,	VIO0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D0_MARK,	VIO0_D1_MARK,	VIO0_D2_MARK,	VIO0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D10_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D8_MARK,	VIO0_D9_MARK,	VIO0_D10_MARK,	VIO0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D11_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D8_MARK,	VIO0_D9_MARK,	VIO0_D10_MARK,	VIO0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D12_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D12_MARK,	VIO0_VD_MARK,	VIO0_HD_MARK,	VIO0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D13_PORT22_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D13_PORT22_MARK, \/* MSEL5CR_27_1 *\/$/;"	e	enum:__anona304c1340103	file:
VIO0_D13_PORT26_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D13_PORT26_MARK, \/* MSEL5CR_27_0 *\/$/;"	e	enum:__anona304c1340103	file:
VIO0_D14_PORT25_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D14_PORT25_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D14_PORT95_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D14_PORT95_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D15_PORT24_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D15_PORT24_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D15_PORT96_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D15_PORT96_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D0_MARK,	VIO0_D1_MARK,	VIO0_D2_MARK,	VIO0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D0_MARK,	VIO0_D1_MARK,	VIO0_D2_MARK,	VIO0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D0_MARK,	VIO0_D1_MARK,	VIO0_D2_MARK,	VIO0_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D4_MARK,	VIO0_D5_MARK,	VIO0_D6_MARK,	VIO0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D4_MARK,	VIO0_D5_MARK,	VIO0_D6_MARK,	VIO0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D4_MARK,	VIO0_D5_MARK,	VIO0_D6_MARK,	VIO0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D4_MARK,	VIO0_D5_MARK,	VIO0_D6_MARK,	VIO0_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D8_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D8_MARK,	VIO0_D9_MARK,	VIO0_D10_MARK,	VIO0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_D9_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D8_MARK,	VIO0_D9_MARK,	VIO0_D10_MARK,	VIO0_D11_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_FIELD_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_HD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D12_MARK,	VIO0_VD_MARK,	VIO0_HD_MARK,	VIO0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO0_VD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO0_D12_MARK,	VIO0_VD_MARK,	VIO0_HD_MARK,	VIO0_CLK_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_CLK_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_VD_MARK,	VIO1_HD_MARK,	VIO1_CLK_MARK,	VIO1_FIELD_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D0_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D0_MARK,	VIO1_D1_MARK,	VIO1_D2_MARK,	VIO1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D0_MARK,	VIO1_D1_MARK,	VIO1_D2_MARK,	VIO1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D0_MARK,	VIO1_D1_MARK,	VIO1_D2_MARK,	VIO1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D3_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D0_MARK,	VIO1_D1_MARK,	VIO1_D2_MARK,	VIO1_D3_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D4_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D4_MARK,	VIO1_D5_MARK,	VIO1_D6_MARK,	VIO1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D5_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D4_MARK,	VIO1_D5_MARK,	VIO1_D6_MARK,	VIO1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D6_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D4_MARK,	VIO1_D5_MARK,	VIO1_D6_MARK,	VIO1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_D7_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_D4_MARK,	VIO1_D5_MARK,	VIO1_D6_MARK,	VIO1_D7_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_FIELD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_VD_MARK,	VIO1_HD_MARK,	VIO1_CLK_MARK,	VIO1_FIELD_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_HD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_VD_MARK,	VIO1_HD_MARK,	VIO1_CLK_MARK,	VIO1_FIELD_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO1_VD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO1_VD_MARK,	VIO1_HD_MARK,	VIO1_CLK_MARK,	VIO1_FIELD_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO2_CLK2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSCK_MARK, SCIFA2_RTS2__MARK, VIO2_CLK2_MARK, LCD2D20_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_CLK3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF0L_TSCK_MARK, VIO2_CLK3_MARK, LCD2DCK_2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_CLK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_CLK_MARK, LCD2DCK_MARK, PORT146_LCD2WR__MARK, VIO2_CLK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D8_MARK, PORT138_KEYOUT8_MARK, VIO2_D0_MARK, LCD2D6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D9_MARK, PORT139_KEYOUT9_MARK, VIO2_D1_MARK, LCD2D7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D10_MARK, TPU0TO2_MARK, VIO2_D2_MARK, LCD2D8_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D11_MARK, TPU0TO3_MARK, VIO2_D3_MARK, LCD2D9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D12_MARK, PORT142_KEYOUT10_MARK, VIO2_D4_MARK, LCD2D2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_D5_MARK, LCD2D3_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D14_MARK, PORT144_KEYOUT7_MARK, VIO2_D6_MARK, LCD2D4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_D7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	PORT145_LCD2RS_MARK, VIO2_D7_MARK, LCD2D5_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_FIELD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_SS1_MARK, VIO2_FIELD2_MARK, LCD2D22_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_FIELD3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_FIELD3_MARK, PORT217_LCD2DISP_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_FIELD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_FIELD_MARK, LCD2RD__MARK, VIO2_FIELD_MARK, LCD2D19_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_HD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_SS2_MARK, VIO2_HD2_MARK, LCD2D23_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_HD3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF0L_RXD_MARK, VIO2_HD3_MARK, PORT221_LCD2HSYN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_HD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_HD_MARK, LCD2D1_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_VD2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	MSIOF1_RSYNC_MARK, MFG1_IN2_MARK, VIO2_VD2_MARK, LCD2D21_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_VD3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO2_VD3_MARK, PORT222_LCD2VSYN_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO2_VD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_VD_MARK, PORT128_LCD2VSYN_MARK, VIO2_VD_MARK, LCD2D0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIOHIEN	include/mc13783.h	/^#define VIOHIEN	/;"	d
VIOHIEN	include/mc13892.h	/^#define VIOHIEN	/;"	d
VIOHIMODE	include/mc13783.h	/^#define VIOHIMODE	/;"	d
VIOHISTBY	include/mc13783.h	/^#define VIOHISTBY	/;"	d
VIOHISTBY	include/mc13892.h	/^#define VIOHISTBY	/;"	d
VIOL	include/mc13892.h	/^#define VIOL	/;"	d
VIOLOEN	include/mc13783.h	/^#define VIOLOEN	/;"	d
VIOLOMODE	include/mc13783.h	/^#define VIOLOMODE	/;"	d
VIOLOSTBY	include/mc13783.h	/^#define VIOLOSTBY	/;"	d
VIO_CKO1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO_CKO1_MARK, \/* needs fixup *\/$/;"	e	enum:__anona304c1340103	file:
VIO_CKO2_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO_CKO2_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO_CKO_1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO_CKO_1_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO_CKO_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	VIO_CKO_MARK,$/;"	e	enum:__anona304c1340103	file:
VIO_CKO_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_CKO_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_CLK_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_CLK_MARK, LCD2DCK_MARK, PORT146_LCD2WR__MARK, VIO2_CLK_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D0_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D0_MARK, PORT130_MSIOF2_RXD_MARK, LCD2D10_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D10_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D10_MARK, TPU0TO2_MARK, VIO2_D2_MARK, LCD2D8_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D11_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D11_MARK, TPU0TO3_MARK, VIO2_D3_MARK, LCD2D9_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D12_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D12_MARK, PORT142_KEYOUT10_MARK, VIO2_D4_MARK, LCD2D2_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D13_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D13_MARK, PORT143_KEYOUT11_MARK, PORT143_KEYOUT6_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D14_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D14_MARK, PORT144_KEYOUT7_MARK, VIO2_D6_MARK, LCD2D4_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D15_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D15_MARK, TPU1TO3_MARK, PORT145_LCD2DISP_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D1_MARK, PORT131_KEYOUT6_MARK, PORT131_MSIOF2_SS1_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D2_MARK, PORT132_KEYOUT7_MARK, PORT132_MSIOF2_SS2_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D3_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D3_MARK, MSIOF2_TSYNC_MARK, LCD2D13_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D4_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D4_MARK, MSIOF2_TXD_MARK, LCD2D14_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D5_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D5_MARK, MSIOF2_TSCK_MARK, LCD2D15_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D6_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D6_MARK, PORT136_KEYOUT8_MARK, LCD2D16_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D7_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D7_MARK, PORT137_KEYOUT9_MARK, LCD2D17_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D8_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D8_MARK, PORT138_KEYOUT8_MARK, VIO2_D0_MARK, LCD2D6_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_D9_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_D9_MARK, PORT139_KEYOUT9_MARK, VIO2_D1_MARK, LCD2D7_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_FIELD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_FIELD_MARK, LCD2RD__MARK, VIO2_FIELD_MARK, LCD2D19_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIO_HD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_HD_MARK, PORT129_LCD2HSYN_MARK, PORT129_LCD2CS__MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
VIO_VD_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	VIO_VD_MARK, PORT128_LCD2VSYN_MARK, VIO2_VD_MARK, LCD2D0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
VIPH_CONTROL	include/radeon.h	/^#define VIPH_CONTROL	/;"	d
VIRTUAL_MODE0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE0	/;"	d
VIRTUAL_MODE1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE1	/;"	d
VIRTUAL_MODE10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE10	/;"	d
VIRTUAL_MODE11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE11	/;"	d
VIRTUAL_MODE12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE12	/;"	d
VIRTUAL_MODE13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE13	/;"	d
VIRTUAL_MODE14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE14	/;"	d
VIRTUAL_MODE15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE15	/;"	d
VIRTUAL_MODE2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE2	/;"	d
VIRTUAL_MODE3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE3	/;"	d
VIRTUAL_MODE4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE4	/;"	d
VIRTUAL_MODE5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE5	/;"	d
VIRTUAL_MODE6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE6	/;"	d
VIRTUAL_MODE7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE7	/;"	d
VIRTUAL_MODE8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE8	/;"	d
VIRTUAL_MODE9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VIRTUAL_MODE9	/;"	d
VIU0_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define VIU0_BASE_ADDR	/;"	d
VIU1_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define VIU1_BASE_ADDR	/;"	d
VI_PINMUX	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define VI_PINMUX(/;"	d
VLAN1	drivers/net/smc911x.h	/^#define VLAN1	/;"	d
VLAN1	drivers/usb/eth/smsc95xx.c	/^#define VLAN1	/;"	d	file:
VLAN1_VTI1	drivers/net/smc911x.h	/^#define VLAN1_VTI1	/;"	d
VLAN2	drivers/net/smc911x.h	/^#define VLAN2	/;"	d
VLAN2_VTI2	drivers/net/smc911x.h	/^#define VLAN2_VTI2	/;"	d
VLAN_ETHER_HDR_SIZE	include/net.h	/^#define VLAN_ETHER_HDR_SIZE	/;"	d
VLAN_IDMASK	include/net.h	/^#define VLAN_IDMASK	/;"	d
VLAN_NONE	include/net.h	/^#define VLAN_NONE	/;"	d
VLAN_TAG_SIZE	drivers/net/e1000.h	/^#define VLAN_TAG_SIZE	/;"	d
VLDBG	drivers/usb/gadget/storage_common.c	/^#define VLDBG	/;"	d	file:
VLDBG	drivers/usb/gadget/storage_common.c	/^#define VLDBG(/;"	d	file:
VLEV_085	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_085	/;"	d
VLEV_090	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_090	/;"	d
VLEV_095	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_095	/;"	d
VLEV_100	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_100	/;"	d
VLEV_105	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_105	/;"	d
VLEV_110	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_110	/;"	d
VLEV_115	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_115	/;"	d
VLEV_120	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_120	/;"	d
VLEV_125	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_125	/;"	d
VLEV_130	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_130	/;"	d
VLEV_MASK	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VLEV_MASK	/;"	d
VLV_TVIDEO_DIP_CTL	drivers/video/i915_reg.h	/^#define VLV_TVIDEO_DIP_CTL(/;"	d
VLV_TVIDEO_DIP_DATA	drivers/video/i915_reg.h	/^#define VLV_TVIDEO_DIP_DATA(/;"	d
VLV_TVIDEO_DIP_GCP	drivers/video/i915_reg.h	/^#define VLV_TVIDEO_DIP_GCP(/;"	d
VLV_VIDEO_DIP_CTL_A	drivers/video/i915_reg.h	/^#define VLV_VIDEO_DIP_CTL_A	/;"	d
VLV_VIDEO_DIP_CTL_B	drivers/video/i915_reg.h	/^#define VLV_VIDEO_DIP_CTL_B	/;"	d
VLV_VIDEO_DIP_DATA_A	drivers/video/i915_reg.h	/^#define VLV_VIDEO_DIP_DATA_A	/;"	d
VLV_VIDEO_DIP_DATA_B	drivers/video/i915_reg.h	/^#define VLV_VIDEO_DIP_DATA_B	/;"	d
VLV_VIDEO_DIP_GDCP_PAYLOAD_A	drivers/video/i915_reg.h	/^#define VLV_VIDEO_DIP_GDCP_PAYLOAD_A	/;"	d
VLV_VIDEO_DIP_GDCP_PAYLOAD_B	drivers/video/i915_reg.h	/^#define VLV_VIDEO_DIP_GDCP_PAYLOAD_B	/;"	d
VMEHEXMAX	include/lattice.h	/^#define VMEHEXMAX	/;"	d
VME_AM_A16	include/tsi148.h	/^#define VME_AM_A16	/;"	d
VME_AM_A16	include/universe.h	/^#define VME_AM_A16	/;"	d
VME_AM_A24	include/tsi148.h	/^#define VME_AM_A24	/;"	d
VME_AM_A24	include/universe.h	/^#define VME_AM_A24	/;"	d
VME_AM_A32	include/tsi148.h	/^#define VME_AM_A32	/;"	d
VME_AM_A32	include/universe.h	/^#define VME_AM_A32	/;"	d
VME_AM_Axx	include/tsi148.h	/^#define VME_AM_Axx	/;"	d
VME_AM_Axx	include/universe.h	/^#define VME_AM_Axx	/;"	d
VME_AM_DATA	include/tsi148.h	/^#define VME_AM_DATA	/;"	d
VME_AM_DATA	include/universe.h	/^#define VME_AM_DATA	/;"	d
VME_AM_Mxx	include/tsi148.h	/^#define VME_AM_Mxx	/;"	d
VME_AM_Mxx	include/universe.h	/^#define VME_AM_Mxx	/;"	d
VME_AM_PROG	include/tsi148.h	/^#define VME_AM_PROG	/;"	d
VME_AM_PROG	include/universe.h	/^#define VME_AM_PROG	/;"	d
VME_AM_SUP	include/tsi148.h	/^#define VME_AM_SUP	/;"	d
VME_AM_SUP	include/universe.h	/^#define VME_AM_SUP	/;"	d
VME_AM_USR	include/tsi148.h	/^#define VME_AM_USR	/;"	d
VME_ARGUMENT_FAILURE	include/lattice.h	/^#define VME_ARGUMENT_FAILURE	/;"	d
VME_CADDY2	include/configs/vme8349.h	/^#define VME_CADDY2$/;"	d
VME_CRC_FAILURE	include/lattice.h	/^#define VME_CRC_FAILURE	/;"	d
VME_FILE_READ_FAILURE	include/lattice.h	/^#define VME_FILE_READ_FAILURE	/;"	d
VME_FLAG_D16	include/tsi148.h	/^#define VME_FLAG_D16	/;"	d
VME_FLAG_D16	include/universe.h	/^#define VME_FLAG_D16 /;"	d
VME_FLAG_D32	include/tsi148.h	/^#define VME_FLAG_D32	/;"	d
VME_FLAG_D32	include/universe.h	/^#define VME_FLAG_D32 /;"	d
VME_FLAG_D8	include/tsi148.h	/^#define VME_FLAG_D8	/;"	d
VME_FLAG_D8	include/universe.h	/^#define VME_FLAG_D8 /;"	d
VME_FLAG_Dxx	include/tsi148.h	/^#define VME_FLAG_Dxx	/;"	d
VME_FLAG_Dxx	include/universe.h	/^#define VME_FLAG_Dxx	/;"	d
VME_INVALID_FILE	include/lattice.h	/^#define VME_INVALID_FILE	/;"	d
VME_VERIFICATION_FAILURE	include/lattice.h	/^#define VME_VERIFICATION_FAILURE	/;"	d
VME_VERSION_FAILURE	include/lattice.h	/^#define VME_VERSION_FAILURE	/;"	d
VME_VERSION_NUMBER	include/lattice.h	/^#define VME_VERSION_NUMBER /;"	d
VMMC1EN	include/mc13783.h	/^#define VMMC1EN	/;"	d
VMMC1MODE	include/mc13783.h	/^#define VMMC1MODE	/;"	d
VMMC1STBY	include/mc13783.h	/^#define VMMC1STBY	/;"	d
VMMC2EN	include/mc13783.h	/^#define VMMC2EN	/;"	d
VMMC2MODE	include/mc13783.h	/^#define VMMC2MODE	/;"	d
VMMC2STBY	include/mc13783.h	/^#define VMMC2STBY	/;"	d
VMX_BASIC_64	arch/x86/include/asm/msr-index.h	/^#define VMX_BASIC_64	/;"	d
VMX_BASIC_INOUT	arch/x86/include/asm/msr-index.h	/^#define VMX_BASIC_INOUT	/;"	d
VMX_BASIC_MEM_TYPE_MASK	arch/x86/include/asm/msr-index.h	/^#define VMX_BASIC_MEM_TYPE_MASK	/;"	d
VMX_BASIC_MEM_TYPE_SHIFT	arch/x86/include/asm/msr-index.h	/^#define VMX_BASIC_MEM_TYPE_SHIFT	/;"	d
VMX_BASIC_MEM_TYPE_WB	arch/x86/include/asm/msr-index.h	/^#define VMX_BASIC_MEM_TYPE_WB	/;"	d
VMX_BASIC_VMCS_SIZE_SHIFT	arch/x86/include/asm/msr-index.h	/^#define VMX_BASIC_VMCS_SIZE_SHIFT	/;"	d
VNBITS	include/video.h	/^#define VNBITS(/;"	d
VNBYTES	include/video.h	/^#define VNBYTES(/;"	d
VND_BMDMA2_CH0	drivers/block/sata_sil3114.h	/^#define VND_BMDMA2_CH0	/;"	d
VND_BMDMA2_CH1	drivers/block/sata_sil3114.h	/^#define VND_BMDMA2_CH1	/;"	d
VND_BMDMA2_CH2	drivers/block/sata_sil3114.h	/^#define VND_BMDMA2_CH2	/;"	d
VND_BMDMA2_CH3	drivers/block/sata_sil3114.h	/^#define VND_BMDMA2_CH3	/;"	d
VND_BMDMA_CH0	drivers/block/sata_sil3114.h	/^#define VND_BMDMA_CH0	/;"	d
VND_BMDMA_CH1	drivers/block/sata_sil3114.h	/^#define VND_BMDMA_CH1	/;"	d
VND_BMDMA_CH2	drivers/block/sata_sil3114.h	/^#define VND_BMDMA_CH2	/;"	d
VND_BMDMA_CH3	drivers/block/sata_sil3114.h	/^#define VND_BMDMA_CH3	/;"	d
VND_FIFOCFG_CH0	drivers/block/sata_sil3114.h	/^#define	VND_FIFOCFG_CH0	/;"	d
VND_FIFOCFG_CH1	drivers/block/sata_sil3114.h	/^#define	VND_FIFOCFG_CH1	/;"	d
VND_FIFOCFG_CH2	drivers/block/sata_sil3114.h	/^#define	VND_FIFOCFG_CH2	/;"	d
VND_FIFOCFG_CH3	drivers/block/sata_sil3114.h	/^#define	VND_FIFOCFG_CH3	/;"	d
VND_FMACS	drivers/block/sata_sil3114.h	/^#define VND_FMACS	/;"	d
VND_SCONTROL_CH0	drivers/block/sata_sil3114.h	/^#define VND_SCONTROL_CH0	/;"	d
VND_SCONTROL_CH1	drivers/block/sata_sil3114.h	/^#define VND_SCONTROL_CH1	/;"	d
VND_SCONTROL_CH2	drivers/block/sata_sil3114.h	/^#define VND_SCONTROL_CH2	/;"	d
VND_SCONTROL_CH3	drivers/block/sata_sil3114.h	/^#define VND_SCONTROL_CH3	/;"	d
VND_SSDR	drivers/block/sata_sil3114.h	/^#define VND_SSDR	/;"	d
VND_SSTATUS_CH0	drivers/block/sata_sil3114.h	/^#define VND_SSTATUS_CH0	/;"	d
VND_SSTATUS_CH1	drivers/block/sata_sil3114.h	/^#define VND_SSTATUS_CH1	/;"	d
VND_SSTATUS_CH2	drivers/block/sata_sil3114.h	/^#define VND_SSTATUS_CH2	/;"	d
VND_SSTATUS_CH3	drivers/block/sata_sil3114.h	/^#define VND_SSTATUS_CH3	/;"	d
VND_SYSCONFSTAT	drivers/block/sata_sil3114.h	/^#define	VND_SYSCONFSTAT	/;"	d
VND_SYSCONFSTAT_CHN_0_INTBLOCK	drivers/block/sata_sil3114.h	/^#define VND_SYSCONFSTAT_CHN_0_INTBLOCK /;"	d
VND_SYSCONFSTAT_CHN_1_INTBLOCK	drivers/block/sata_sil3114.h	/^#define VND_SYSCONFSTAT_CHN_1_INTBLOCK /;"	d
VND_SYSCONFSTAT_CHN_2_INTBLOCK	drivers/block/sata_sil3114.h	/^#define VND_SYSCONFSTAT_CHN_2_INTBLOCK /;"	d
VND_SYSCONFSTAT_CHN_3_INTBLOCK	drivers/block/sata_sil3114.h	/^#define VND_SYSCONFSTAT_CHN_3_INTBLOCK /;"	d
VND_TF0_CH0	drivers/block/sata_sil3114.h	/^#define VND_TF0_CH0	/;"	d
VND_TF0_CH1	drivers/block/sata_sil3114.h	/^#define VND_TF0_CH1	/;"	d
VND_TF0_CH2	drivers/block/sata_sil3114.h	/^#define VND_TF0_CH2	/;"	d
VND_TF0_CH3	drivers/block/sata_sil3114.h	/^#define VND_TF0_CH3	/;"	d
VND_TF1_CH0	drivers/block/sata_sil3114.h	/^#define VND_TF1_CH0	/;"	d
VND_TF1_CH1	drivers/block/sata_sil3114.h	/^#define VND_TF1_CH1	/;"	d
VND_TF1_CH2	drivers/block/sata_sil3114.h	/^#define VND_TF1_CH2	/;"	d
VND_TF1_CH3	drivers/block/sata_sil3114.h	/^#define VND_TF1_CH3	/;"	d
VND_TF2_CH0	drivers/block/sata_sil3114.h	/^#define VND_TF2_CH0	/;"	d
VND_TF2_CH1	drivers/block/sata_sil3114.h	/^#define VND_TF2_CH1	/;"	d
VND_TF2_CH2	drivers/block/sata_sil3114.h	/^#define VND_TF2_CH2	/;"	d
VND_TF2_CH3	drivers/block/sata_sil3114.h	/^#define VND_TF2_CH3	/;"	d
VND_TF_CNST_BFCMD	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_BFCMD	/;"	d
VND_TF_CNST_CH0	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_CH0	/;"	d
VND_TF_CNST_CH1	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_CH1	/;"	d
VND_TF_CNST_CH2	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_CH2	/;"	d
VND_TF_CNST_CH3	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_CH3	/;"	d
VND_TF_CNST_CHNRST	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_CHNRST	/;"	d
VND_TF_CNST_INTST	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_INTST	/;"	d
VND_TF_CNST_VDMA	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_VDMA	/;"	d
VND_TF_CNST_WDEN	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_WDEN	/;"	d
VND_TF_CNST_WDIEN	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_WDIEN	/;"	d
VND_TF_CNST_WDTO	drivers/block/sata_sil3114.h	/^#define VND_TF_CNST_WDTO	/;"	d
VOIDENT	cmd/tpm_test.c	/^#define VOIDENT(/;"	d	file:
VOIDTEST	cmd/tpm_test.c	/^#define VOIDTEST(/;"	d	file:
VOLTAGE_5V_MAX	post/board/lwmon5/sysmon.c	/^#define VOLTAGE_5V_MAX	/;"	d	file:
VOLTAGE_5V_MIN	post/board/lwmon5/sysmon.c	/^#define VOLTAGE_5V_MIN	/;"	d	file:
VOLTAGE_5V_STANDBY_MAX	post/board/lwmon5/sysmon.c	/^#define VOLTAGE_5V_STANDBY_MAX	/;"	d	file:
VOLTAGE_5V_STANDBY_MIN	post/board/lwmon5/sysmon.c	/^#define VOLTAGE_5V_STANDBY_MIN	/;"	d	file:
VOLTAGE_LEVEL_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VOLTAGE_LEVEL_0,$/;"	e	enum:voltage_swing_level
VOLTAGE_LEVEL_0	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VOLTAGE_LEVEL_0,$/;"	e	enum:__anon79d8640c0c03
VOLTAGE_LEVEL_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VOLTAGE_LEVEL_1,$/;"	e	enum:voltage_swing_level
VOLTAGE_LEVEL_1	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VOLTAGE_LEVEL_1,$/;"	e	enum:__anon79d8640c0c03
VOLTAGE_LEVEL_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VOLTAGE_LEVEL_2,$/;"	e	enum:voltage_swing_level
VOLTAGE_LEVEL_2	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VOLTAGE_LEVEL_2,$/;"	e	enum:__anon79d8640c0c03
VOLTAGE_LEVEL_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	VOLTAGE_LEVEL_3,$/;"	e	enum:voltage_swing_level
VOLTAGE_LEVEL_3	arch/arm/mach-exynos/include/mach/dp_info.h	/^	VOLTAGE_LEVEL_3,$/;"	e	enum:__anon79d8640c0c03
VOLTAGE_UNKNOWN	drivers/ddr/marvell/axp/ddr3_spd.c	/^	VOLTAGE_UNKNOWN,$/;"	e	enum:dimm_volt_if	file:
VOLTAGE_WINDOW_MMC	drivers/mmc/arm_pl180_mmci.h	/^#define VOLTAGE_WINDOW_MMC	/;"	d
VOLTAGE_WINDOW_SD	drivers/mmc/arm_pl180_mmci.h	/^#define VOLTAGE_WINDOW_SD	/;"	d
VOL_MAX_IDX	include/power/act8846_pmic.h	/^#define VOL_MAX_IDX /;"	d
VOL_MIN_IDX	include/power/act8846_pmic.h	/^#define VOL_MIN_IDX /;"	d
VOP_MODE_AUTO_DETECT	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	VOP_MODE_AUTO_DETECT,$/;"	e	enum:vop_modes
VOP_MODE_EDP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	VOP_MODE_EDP = 0,$/;"	e	enum:vop_modes
VOP_MODE_HDMI	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	VOP_MODE_HDMI,$/;"	e	enum:vop_modes
VOP_MODE_LVDS	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	VOP_MODE_LVDS,$/;"	e	enum:vop_modes
VOP_MODE_NONE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	VOP_MODE_NONE,$/;"	e	enum:vop_modes
VOP_MODE_UNKNOWN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	VOP_MODE_UNKNOWN,$/;"	e	enum:vop_modes
VOUAD1R	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUAD1R /;"	d
VOUAD2R	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUAD2R /;"	d
VOUAIR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUAIR /;"	d
VOUBCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUBCR /;"	d
VOUCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUCR /;"	d
VOUDFR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUDFR /;"	d
VOUDPR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUDPR /;"	d
VOUDSR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUDSR /;"	d
VOUER	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUER /;"	d
VOUHIR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUHIR /;"	d
VOUIR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUIR /;"	d
VOUISR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUISR /;"	d
VOUMSR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUMSR /;"	d
VOURCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOURCR /;"	d
VOURPR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOURPR /;"	d
VOUSRR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUSRR /;"	d
VOUSTR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUSTR /;"	d
VOUSWR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUSWR /;"	d
VOUT1_CLK	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_CLK	/;"	d
VOUT1_D0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D0	/;"	d
VOUT1_D1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D1	/;"	d
VOUT1_D10	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D10	/;"	d
VOUT1_D11	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D11	/;"	d
VOUT1_D12	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D12	/;"	d
VOUT1_D13	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D13	/;"	d
VOUT1_D14	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D14	/;"	d
VOUT1_D15	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D15	/;"	d
VOUT1_D16	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D16	/;"	d
VOUT1_D17	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D17	/;"	d
VOUT1_D18	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D18	/;"	d
VOUT1_D19	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D19	/;"	d
VOUT1_D2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D2	/;"	d
VOUT1_D20	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D20	/;"	d
VOUT1_D21	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D21	/;"	d
VOUT1_D22	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D22	/;"	d
VOUT1_D23	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D23	/;"	d
VOUT1_D3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D3	/;"	d
VOUT1_D4	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D4	/;"	d
VOUT1_D5	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D5	/;"	d
VOUT1_D6	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D6	/;"	d
VOUT1_D7	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D7	/;"	d
VOUT1_D8	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D8	/;"	d
VOUT1_D9	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_D9	/;"	d
VOUT1_DE	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_DE	/;"	d
VOUT1_FLD	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_FLD	/;"	d
VOUT1_HSYNC	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_HSYNC	/;"	d
VOUT1_VSYNC	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define VOUT1_VSYNC	/;"	d
VOUVCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUVCR /;"	d
VOUVPR	arch/sh/include/asm/cpu_sh7722.h	/^#define VOUVPR /;"	d
VO_1_10V	include/mc13892.h	/^#define VO_1_10V	/;"	d
VO_1_20V	include/mc13892.h	/^#define VO_1_20V	/;"	d
VO_1_30V	include/mc13892.h	/^#define VO_1_30V	/;"	d
VO_1_50V	include/mc13892.h	/^#define VO_1_50V	/;"	d
VO_1_80V	include/mc13892.h	/^#define VO_1_80V	/;"	d
VO_2_00V	include/mc13892.h	/^#define VO_2_00V	/;"	d
VO_2_40V	include/mc13892.h	/^#define VO_2_40V	/;"	d
VO_2_77V	include/mc13892.h	/^#define VO_2_77V	/;"	d
VP4_263_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_263_CTRL /;"	d
VP4_264_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_264_CTRL /;"	d
VP4_BWD_TIME	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_BWD_TIME /;"	d
VP4_CLK_STOP	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_CLK_STOP /;"	d
VP4_CMD	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_CMD /;"	d
VP4_CPC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_CPC_ADDR /;"	d
VP4_CPY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_CPY_ADDR /;"	d
VP4_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_CTRL /;"	d
VP4_D2WC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_D2WC_ADDR /;"	d
VP4_D2WY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_D2WY_ADDR /;"	d
VP4_DBMON	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DBMON /;"	d
VP4_DEBUG	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DEBUG /;"	d
VP4_DEC_ERR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DEC_ERR /;"	d
VP4_DP1_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DP1_ADDR /;"	d
VP4_DP2_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DP2_ADDR /;"	d
VP4_DWC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DWC_ADDR /;"	d
VP4_DWY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_DWY_ADDR /;"	d
VP4_EC_REF	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_EC_REF /;"	d
VP4_ENDIAN	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ENDIAN /;"	d
VP4_ERR_AREA	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ERR_AREA /;"	d
VP4_ERR_DET	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ERR_DET /;"	d
VP4_FWD_TIME	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_FWD_TIME /;"	d
VP4_ILTFRAME	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ILTFRAME /;"	d
VP4_IMAGE_SIZE	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_IMAGE_SIZE /;"	d
VP4_IRQ_ENB	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_IRQ_ENB /;"	d
VP4_IRQ_STA	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_IRQ_STA /;"	d
VP4_MAT_RAM	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MAT_RAM /;"	d
VP4_MBRF_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MBRF_CTRL /;"	d
VP4_MB_ATTR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MB_ATTR /;"	d
VP4_MB_MAXBIT	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MB_MAXBIT /;"	d
VP4_MB_NUM	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MB_NUM /;"	d
VP4_MB_SADA	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MB_SADA /;"	d
VP4_MB_SADR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MB_SADR /;"	d
VP4_MB_TBIT	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MB_TBIT /;"	d
VP4_MC_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_MC_CTRL /;"	d
VP4_ME_COSTMB	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ME_COSTMB /;"	d
VP4_ME_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ME_CTRL /;"	d
VP4_ME_SKIP	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ME_SKIP /;"	d
VP4_ME_TH1	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ME_TH1 /;"	d
VP4_ME_TH2	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_ME_TH2 /;"	d
VP4_NC_RAM	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_NC_RAM /;"	d
VP4_NEXT_CODE	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_NEXT_CODE /;"	d
VP4_PRED_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_PRED_CTRL /;"	d
VP4_PRV_BIT	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_PRV_BIT /;"	d
VP4_PST_TIME	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_PST_TIME /;"	d
VP4_QSUM	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_QSUM /;"	d
VP4_R0C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R0C_ADDR /;"	d
VP4_R0Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R0Y_ADDR /;"	d
VP4_R1C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R1C_ADDR /;"	d
VP4_R1Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R1Y_ADDR /;"	d
VP4_R2C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R2C_ADDR /;"	d
VP4_R2Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R2Y_ADDR /;"	d
VP4_R3C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R3C_ADDR /;"	d
VP4_R3Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R3Y_ADDR /;"	d
VP4_R4C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R4C_ADDR /;"	d
VP4_R4Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R4Y_ADDR /;"	d
VP4_R5C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R5C_ADDR /;"	d
VP4_R5Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R5Y_ADDR /;"	d
VP4_R6C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R6C_ADDR /;"	d
VP4_R6Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R6Y_ADDR /;"	d
VP4_R7C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R7C_ADDR /;"	d
VP4_R7Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R7Y_ADDR /;"	d
VP4_R8C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R8C_ADDR /;"	d
VP4_R8Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R8Y_ADDR /;"	d
VP4_R9C_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R9C_ADDR /;"	d
VP4_R9Y_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_R9Y_ADDR /;"	d
VP4_RAC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RAC_ADDR /;"	d
VP4_RAY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RAY_ADDR /;"	d
VP4_RBC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RBC_ADDR /;"	d
VP4_RBY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RBY_ADDR /;"	d
VP4_RCC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RCC_ADDR /;"	d
VP4_RCDJ	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RCDJ /;"	d
VP4_RCQNT	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RCQNT /;"	d
VP4_RCRP	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RCRP /;"	d
VP4_RCWQ	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RCWQ /;"	d
VP4_RCY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RCY_ADDR /;"	d
VP4_RDC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RDC_ADDR /;"	d
VP4_RDY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RDY_ADDR /;"	d
VP4_REC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_REC_ADDR /;"	d
VP4_REY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_REY_ADDR /;"	d
VP4_RFC_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RFC_ADDR /;"	d
VP4_RFY_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_RFY_ADDR /;"	d
VP4_SLC_MB	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_SLC_MB /;"	d
VP4_SLC_SIZE	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_SLC_SIZE /;"	d
VP4_STATUS	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_STATUS /;"	d
VP4_STRE_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_STRE_ADDR /;"	d
VP4_STRS_ADDR	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_STRS_ADDR /;"	d
VP4_VLC_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_VLC_CTRL /;"	d
VP4_VOL_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_VOL_CTRL /;"	d
VP4_VOP_BIT	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_VOP_BIT /;"	d
VP4_VOP_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_VOP_CTRL /;"	d
VP4_VOP_MINBIT	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_VOP_MINBIT /;"	d
VP4_VOP_TIME	arch/sh/include/asm/cpu_sh7722.h	/^#define VP4_VOP_TIME /;"	d
VPATH	Makefile	/^VPATH		:= $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD))$/;"	m
VPD_IMAGE_ID	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^#define VPD_IMAGE_ID	/;"	d
VPD_IMAGE_ID	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^#define VPD_IMAGE_ID	/;"	d
VPLL	arch/arm/mach-exynos/include/mach/clk.h	/^#define VPLL	/;"	d
VPLL	arch/arm/mach-s5pc1xx/include/mach/clk.h	/^#define VPLL	/;"	d
VPLLEN	include/mc13892.h	/^#define VPLLEN	/;"	d
VPLLSRC_SEL	arch/arm/mach-exynos/exynos5_setup.h	/^#define VPLLSRC_SEL /;"	d
VPLLSRC_SEL_FINPLL	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLLSRC_SEL_FINPLL	/;"	d
VPLLSRC_SEL_SCLKHDMI24M	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLLSRC_SEL_SCLKHDMI24M	/;"	d
VPLLSTBY	include/mc13892.h	/^#define VPLLSTBY	/;"	d
VPLL_CON0_LOCKED	arch/arm/mach-exynos/exynos5_setup.h	/^#define VPLL_CON0_LOCKED	/;"	d
VPLL_CON0_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_CON0_VAL	/;"	d
VPLL_CON0_VAL	board/samsung/trats/setup.h	/^#define VPLL_CON0_VAL	/;"	d
VPLL_CON1_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_CON1_VAL	/;"	d
VPLL_CON1_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define VPLL_CON1_VAL	/;"	d
VPLL_CON1_VAL	board/samsung/trats/setup.h	/^#define VPLL_CON1_VAL	/;"	d
VPLL_CON2_VAL	arch/arm/mach-exynos/exynos5_setup.h	/^#define VPLL_CON2_VAL	/;"	d
VPLL_K	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_K	/;"	d
VPLL_K	board/samsung/trats/setup.h	/^#define VPLL_K	/;"	d
VPLL_MDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_MDIV	/;"	d
VPLL_MDIV	board/samsung/trats/setup.h	/^#define VPLL_MDIV	/;"	d
VPLL_MFR	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_MFR	/;"	d
VPLL_MFR	board/samsung/trats/setup.h	/^#define VPLL_MFR	/;"	d
VPLL_MRR	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_MRR	/;"	d
VPLL_MRR	board/samsung/trats/setup.h	/^#define VPLL_MRR	/;"	d
VPLL_PDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_PDIV	/;"	d
VPLL_PDIV	board/samsung/trats/setup.h	/^#define VPLL_PDIV	/;"	d
VPLL_SDIV	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_SDIV	/;"	d
VPLL_SDIV	board/samsung/trats/setup.h	/^#define VPLL_SDIV	/;"	d
VPLL_SEL_PF_DN_SPREAD	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_SEL_PF_DN_SPREAD	/;"	d
VPLL_SEL_PF_DN_SPREAD	board/samsung/trats/setup.h	/^#define VPLL_SEL_PF_DN_SPREAD	/;"	d
VPLL_SSCG_EN	arch/arm/mach-exynos/exynos4_setup.h	/^#define VPLL_SSCG_EN	/;"	d
VPLL_SSCG_EN	board/samsung/trats/setup.h	/^#define VPLL_SSCG_EN	/;"	d
VPSS_CLK_CTL_VPSS_CLKMD	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define VPSS_CLK_CTL_VPSS_CLKMD	/;"	d
VPTIO_CLRZ	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define VPTIO_CLRZ	/;"	d
VPTIO_IOPWRDN	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define VPTIO_IOPWRDN	/;"	d
VPTIO_LOCK	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define VPTIO_LOCK	/;"	d
VPTIO_PWRDN	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define VPTIO_PWRDN	/;"	d
VPTIO_RDY	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define VPTIO_RDY	/;"	d
VPU_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define VPU_BASE_ADDR	/;"	d
VPU_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define VPU_BASE_ADDR /;"	d
VPW_VPW	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define VPW_VPW(/;"	d
VPrintf0	lib/bzip2/bzlib_private.h	/^#define VPrintf0(/;"	d
VPrintf1	lib/bzip2/bzlib_private.h	/^#define VPrintf1(/;"	d
VPrintf2	lib/bzip2/bzlib_private.h	/^#define VPrintf2(/;"	d
VPrintf3	lib/bzip2/bzlib_private.h	/^#define VPrintf3(/;"	d
VPrintf4	lib/bzip2/bzlib_private.h	/^#define VPrintf4(/;"	d
VPrintf5	lib/bzip2/bzlib_private.h	/^#define VPrintf5(/;"	d
VR41_CONF_AD	arch/mips/include/asm/mipsregs.h	/^#define VR41_CONF_AD	/;"	d
VR41_CONF_BP	arch/mips/include/asm/mipsregs.h	/^#define VR41_CONF_BP	/;"	d
VR41_CONF_CS	arch/mips/include/asm/mipsregs.h	/^#define VR41_CONF_CS	/;"	d
VR41_CONF_M16	arch/mips/include/asm/mipsregs.h	/^#define VR41_CONF_M16	/;"	d
VR41_CONF_P4K	arch/mips/include/asm/mipsregs.h	/^#define VR41_CONF_P4K	/;"	d
VRAM	arch/powerpc/cpu/mpc8xx/video.c	/^typedef struct VRAM {$/;"	s	file:
VRAM	arch/powerpc/cpu/mpc8xx/video.c	/^} VRAM;$/;"	t	typeref:struct:VRAM	file:
VREF	arch/x86/cpu/quark/mrc_util.h	/^	VREF,$/;"	e	enum:__anon78bf36a60203
VREFDDRCON_EN	include/power/pfuze100_pmic.h	/^#define VREFDDRCON_EN	/;"	d
VREF_CALIBRATION	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	VREF_CALIBRATION,$/;"	e	enum:auto_tune_stage
VREF_CALIBRATION_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define VREF_CALIBRATION_MASK_BIT	/;"	d
VREF_CONVERGE	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define	VREF_CONVERGE	/;"	d	file:
VREF_INITIAL_STEP	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define VREF_INITIAL_STEP	/;"	d	file:
VREF_MAX	arch/x86/cpu/quark/smc.h	/^#define VREF_MAX	/;"	d
VREF_MAX_INDEX	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define VREF_MAX_INDEX	/;"	d	file:
VREF_MIN	arch/x86/cpu/quark/smc.h	/^#define VREF_MIN	/;"	d
VREF_SECOND_STEP	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define VREF_SECOND_STEP	/;"	d	file:
VREF_STEP	arch/x86/cpu/quark/smc.h	/^#define VREF_STEP	/;"	d
VREF_STEP_1	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define	VREF_STEP_1	/;"	d	file:
VREF_STEP_2	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^#define	VREF_STEP_2	/;"	d	file:
VREG_DIG_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define VREG_DIG_BASE_ADDR	/;"	d
VRF1EN	include/mc13783.h	/^#define VRF1EN	/;"	d
VRF1MODE	include/mc13783.h	/^#define VRF1MODE	/;"	d
VRF1STBY	include/mc13783.h	/^#define VRF1STBY	/;"	d
VRF2EN	include/mc13783.h	/^#define VRF2EN	/;"	d
VRF2MODE	include/mc13783.h	/^#define VRF2MODE	/;"	d
VRF2STBY	include/mc13783.h	/^#define VRF2STBY	/;"	d
VRFBGEN	include/mc13783.h	/^#define VRFBGEN	/;"	d
VRFBGSTBY	include/mc13783.h	/^#define VRFBGSTBY	/;"	d
VRFCPEN	include/mc13783.h	/^#define VRFCPEN	/;"	d
VRFCPMODE	include/mc13783.h	/^#define VRFCPMODE	/;"	d
VRFCPSTBY	include/mc13783.h	/^#define VRFCPSTBY	/;"	d
VRFCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VRFCR /;"	d
VRFDIGEN	include/mc13783.h	/^#define VRFDIGEN	/;"	d
VRFDIGMODE	include/mc13783.h	/^#define VRFDIGMODE	/;"	d
VRFDIGSTBY	include/mc13783.h	/^#define VRFDIGSTBY	/;"	d
VRFREFEN	include/mc13783.h	/^#define VRFREFEN	/;"	d
VRFREFMODE	include/mc13783.h	/^#define VRFREFMODE	/;"	d
VRFREFSTBY	include/mc13783.h	/^#define VRFREFSTBY	/;"	d
VRFSR	arch/sh/include/asm/cpu_sh7722.h	/^#define VRFSR /;"	d
VRTC_EN_OFF	include/palmas.h	/^#define VRTC_EN_OFF	/;"	d
VRTC_EN_SLP	include/palmas.h	/^#define VRTC_EN_SLP	/;"	d
VRTC_PWEN	include/palmas.h	/^#define VRTC_PWEN	/;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define VR_CTL /;"	d
VR_CTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define VR_CTL /;"	d
VS18_1V8SUP	arch/arm/include/asm/omap_mmc.h	/^#define VS18_1V8SUP	/;"	d
VS30_3V0SUP	arch/arm/include/asm/omap_mmc.h	/^#define VS30_3V0SUP	/;"	d
VSACR	arch/sh/include/asm/cpu_sh7722.h	/^#define VSACR /;"	d
VSAYR	arch/sh/include/asm/cpu_sh7722.h	/^#define VSAYR /;"	d
VSC3308_RX_ADDRESS	include/configs/B4860QDS.h	/^#define VSC3308_RX_ADDRESS /;"	d
VSC3308_TX_ADDRESS	include/configs/B4860QDS.h	/^#define VSC3308_TX_ADDRESS /;"	d
VSC3316_FSM_RX_ADDR	include/configs/T4240QDS.h	/^#define VSC3316_FSM_RX_ADDR	/;"	d
VSC3316_FSM_TX_ADDR	include/configs/T4240QDS.h	/^#define VSC3316_FSM_TX_ADDR	/;"	d
VSC3316_RX_ADDRESS	include/configs/B4860QDS.h	/^#define VSC3316_RX_ADDRESS /;"	d
VSC3316_TX_ADDRESS	include/configs/B4860QDS.h	/^#define VSC3316_TX_ADDRESS /;"	d
VSC8101_SKEW	drivers/net/phy/vitesse.c	/^#define VSC8101_SKEW /;"	d	file:
VSC8211_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8211_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8221_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8221_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8234_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8234_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8244_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8244_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8514_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8514_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8574_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8574_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8584_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8584_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8601_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8601_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8641_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8641_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8662_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8662_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC8664_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver VSC8664_driver = {$/;"	v	typeref:struct:phy_driver	file:
VSC9953_AC_DMAC_ENA	include/vsc9953.h	/^#define VSC9953_AC_DMAC_ENA	/;"	d
VSC9953_AC_IP4_SIPDIP_ENA	include/vsc9953.h	/^#define VSC9953_AC_IP4_SIPDIP_ENA	/;"	d
VSC9953_AC_IP4_TCPUDP_ENA	include/vsc9953.h	/^#define VSC9953_AC_IP4_TCPUDP_ENA	/;"	d
VSC9953_AC_IP6_LBL_ENA	include/vsc9953.h	/^#define VSC9953_AC_IP6_LBL_ENA	/;"	d
VSC9953_AC_IP6_TCPUDP_ENA	include/vsc9953.h	/^#define VSC9953_AC_IP6_TCPUDP_ENA	/;"	d
VSC9953_AC_MASK	include/vsc9953.h	/^#define VSC9953_AC_MASK	/;"	d
VSC9953_AC_RND_ENA	include/vsc9953.h	/^#define VSC9953_AC_RND_ENA	/;"	d
VSC9953_AC_SMAC_ENA	include/vsc9953.h	/^#define VSC9953_AC_SMAC_ENA	/;"	d
VSC9953_AGE_PORT_EN	include/vsc9953.h	/^#define VSC9953_AGE_PORT_EN	/;"	d
VSC9953_AGE_PORT_MASK	include/vsc9953.h	/^#define VSC9953_AGE_PORT_MASK	/;"	d
VSC9953_AGE_VID_EN	include/vsc9953.h	/^#define VSC9953_AGE_VID_EN	/;"	d
VSC9953_AGE_VID_MASK	include/vsc9953.h	/^#define VSC9953_AGE_VID_MASK	/;"	d
VSC9953_ANA_OFFSET	include/vsc9953.h	/^#define VSC9953_ANA_OFFSET	/;"	d
VSC9953_ANA_TBL_VID_MASK	include/vsc9953.h	/^#define VSC9953_ANA_TBL_VID_MASK	/;"	d
VSC9953_AUTOAGE_PERIOD_MASK	include/vsc9953.h	/^#define VSC9953_AUTOAGE_PERIOD_MASK	/;"	d
VSC9953_CLOCK_CFG	include/vsc9953.h	/^#define VSC9953_CLOCK_CFG	/;"	d
VSC9953_CLOCK_CFG_1000M	include/vsc9953.h	/^#define VSC9953_CLOCK_CFG_1000M	/;"	d
VSC9953_CORE_ENABLE	include/vsc9953.h	/^#define VSC9953_CORE_ENABLE	/;"	d
VSC9953_DEFAULT_AGE_TIME	include/vsc9953.h	/^#define VSC9953_DEFAULT_AGE_TIME	/;"	d
VSC9953_DEVCPU_GCB	include/vsc9953.h	/^#define VSC9953_DEVCPU_GCB	/;"	d
VSC9953_DEV_GMII_OFFSET	include/vsc9953.h	/^#define VSC9953_DEV_GMII_OFFSET	/;"	d
VSC9953_ES0	include/vsc9953.h	/^#define VSC9953_ES0	/;"	d
VSC9953_FID_MASK_ALL	include/vsc9953.h	/^#define VSC9953_FID_MASK_ALL	/;"	d
VSC9953_FRONT_PORT_MODE	include/vsc9953.h	/^#define VSC9953_FRONT_PORT_MODE	/;"	d
VSC9953_INTERNAL_PORT_CHECK	include/vsc9953.h	/^#define VSC9953_INTERNAL_PORT_CHECK(/;"	d
VSC9953_IS1	include/vsc9953.h	/^#define VSC9953_IS1	/;"	d
VSC9953_IS2	include/vsc9953.h	/^#define VSC9953_IS2	/;"	d
VSC9953_MACHDATA_VID_MASK	include/vsc9953.h	/^#define VSC9953_MACHDATA_VID_MASK	/;"	d
VSC9953_MAC_CMD_AGE	include/vsc9953.h	/^#define VSC9953_MAC_CMD_AGE	/;"	d
VSC9953_MAC_CMD_FORGET	include/vsc9953.h	/^#define VSC9953_MAC_CMD_FORGET	/;"	d
VSC9953_MAC_CMD_IDLE	include/vsc9953.h	/^#define VSC9953_MAC_CMD_IDLE	/;"	d
VSC9953_MAC_CMD_LEARN	include/vsc9953.h	/^#define VSC9953_MAC_CMD_LEARN	/;"	d
VSC9953_MAC_CMD_MASK	include/vsc9953.h	/^#define VSC9953_MAC_CMD_MASK	/;"	d
VSC9953_MAC_CMD_NEXT	include/vsc9953.h	/^#define VSC9953_MAC_CMD_NEXT	/;"	d
VSC9953_MAC_CMD_READ	include/vsc9953.h	/^#define VSC9953_MAC_CMD_READ	/;"	d
VSC9953_MAC_CMD_VALID	include/vsc9953.h	/^#define VSC9953_MAC_CMD_VALID	/;"	d
VSC9953_MAC_CMD_WRITE	include/vsc9953.h	/^#define VSC9953_MAC_CMD_WRITE	/;"	d
VSC9953_MAC_DESTIDX_MASK	include/vsc9953.h	/^#define VSC9953_MAC_DESTIDX_MASK	/;"	d
VSC9953_MAC_ENA_CFG	include/vsc9953.h	/^#define VSC9953_MAC_ENA_CFG	/;"	d
VSC9953_MAC_ENTRYTYPE_IPV4MCAST	include/vsc9953.h	/^#define VSC9953_MAC_ENTRYTYPE_IPV4MCAST	/;"	d
VSC9953_MAC_ENTRYTYPE_IPV6MCAST	include/vsc9953.h	/^#define VSC9953_MAC_ENTRYTYPE_IPV6MCAST	/;"	d
VSC9953_MAC_ENTRYTYPE_LOCKED	include/vsc9953.h	/^#define VSC9953_MAC_ENTRYTYPE_LOCKED	/;"	d
VSC9953_MAC_ENTRYTYPE_MASK	include/vsc9953.h	/^#define VSC9953_MAC_ENTRYTYPE_MASK	/;"	d
VSC9953_MAC_ENTRYTYPE_NORMAL	include/vsc9953.h	/^#define VSC9953_MAC_ENTRYTYPE_NORMAL	/;"	d
VSC9953_MAC_FC_CFG	include/vsc9953.h	/^#define VSC9953_MAC_FC_CFG	/;"	d
VSC9953_MAC_FC_CFG_QSGMII	include/vsc9953.h	/^#define VSC9953_MAC_FC_CFG_QSGMII	/;"	d
VSC9953_MAC_HDX_CFG	include/vsc9953.h	/^#define VSC9953_MAC_HDX_CFG	/;"	d
VSC9953_MAC_IFG_CFG	include/vsc9953.h	/^#define VSC9953_MAC_IFG_CFG	/;"	d
VSC9953_MAC_MACH_MASK	include/vsc9953.h	/^#define VSC9953_MAC_MACH_MASK	/;"	d
VSC9953_MAC_MAX_LEN	include/vsc9953.h	/^#define VSC9953_MAC_MAX_LEN	/;"	d
VSC9953_MAC_MODE_CFG	include/vsc9953.h	/^#define VSC9953_MAC_MODE_CFG	/;"	d
VSC9953_MAC_VID_MASK	include/vsc9953.h	/^#define VSC9953_MAC_VID_MASK	/;"	d
VSC9953_MAX_PORTS	include/vsc9953.h	/^#define VSC9953_MAX_PORTS	/;"	d
VSC9953_MAX_VLAN	include/vsc9953.h	/^#define VSC9953_MAX_VLAN	/;"	d
VSC9953_MEM_ENABLE	include/vsc9953.h	/^#define VSC9953_MEM_ENABLE	/;"	d
VSC9953_MEM_INIT	include/vsc9953.h	/^#define VSC9953_MEM_INIT	/;"	d
VSC9953_OFFSET	include/vsc9953.h	/^#define VSC9953_OFFSET	/;"	d
VSC9953_PAUSE_CFG	include/vsc9953.h	/^#define VSC9953_PAUSE_CFG	/;"	d
VSC9953_PFC_FC	include/vsc9953.h	/^#define VSC9953_PFC_FC	/;"	d
VSC9953_PFC_FC_QSGMII	include/vsc9953.h	/^#define VSC9953_PFC_FC_QSGMII	/;"	d
VSC9953_PGID_PORT_MASK	include/vsc9953.h	/^#define VSC9953_PGID_PORT_MASK	/;"	d
VSC9953_PHY_REGS_OFFST	include/vsc9953.h	/^#define VSC9953_PHY_REGS_OFFST	/;"	d
VSC9953_PORT_CFG_LEARN_AUTO	include/vsc9953.h	/^#define VSC9953_PORT_CFG_LEARN_AUTO	/;"	d
VSC9953_PORT_CFG_LEARN_CPU	include/vsc9953.h	/^#define VSC9953_PORT_CFG_LEARN_CPU	/;"	d
VSC9953_PORT_CFG_LEARN_DROP	include/vsc9953.h	/^#define VSC9953_PORT_CFG_LEARN_DROP	/;"	d
VSC9953_PORT_CFG_LEARN_ENA	include/vsc9953.h	/^#define VSC9953_PORT_CFG_LEARN_ENA	/;"	d
VSC9953_PORT_CFG_PORTID_MASK	include/vsc9953.h	/^#define VSC9953_PORT_CFG_PORTID_MASK	/;"	d
VSC9953_PORT_CHECK	include/vsc9953.h	/^#define VSC9953_PORT_CHECK(/;"	d
VSC9953_PORT_ENA	include/vsc9953.h	/^#define VSC9953_PORT_ENA	/;"	d
VSC9953_PORT_INFO_INITIALIZER	include/vsc9953.h	/^#define VSC9953_PORT_INFO_INITIALIZER(/;"	d
VSC9953_PORT_VLAN_CFG_VID_MASK	include/vsc9953.h	/^#define VSC9953_PORT_VLAN_CFG_VID_MASK	/;"	d
VSC9953_QSYS_OFFSET	include/vsc9953.h	/^#define VSC9953_QSYS_OFFSET	/;"	d
VSC9953_REW_OFFSET	include/vsc9953.h	/^#define VSC9953_REW_OFFSET	/;"	d
VSC9953_SOFT_SWC_RST_ENA	include/vsc9953.h	/^#define VSC9953_SOFT_SWC_RST_ENA	/;"	d
VSC9953_STATS_PRINTF	drivers/net/vsc9953.c	/^#define VSC9953_STATS_PRINTF /;"	d	file:
VSC9953_STAT_CLEAR_DR	include/vsc9953.h	/^#define VSC9953_STAT_CLEAR_DR	/;"	d
VSC9953_STAT_CLEAR_RX	include/vsc9953.h	/^#define VSC9953_STAT_CLEAR_RX	/;"	d
VSC9953_STAT_CLEAR_TX	include/vsc9953.h	/^#define VSC9953_STAT_CLEAR_TX	/;"	d
VSC9953_SYS_OFFSET	include/vsc9953.h	/^#define VSC9953_SYS_OFFSET	/;"	d
VSC9953_TAG_CFG_ALL	include/vsc9953.h	/^#define VSC9953_TAG_CFG_ALL	/;"	d
VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO	include/vsc9953.h	/^#define VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO	/;"	d
VSC9953_TAG_CFG_ALL_BUT_ZERO	include/vsc9953.h	/^#define VSC9953_TAG_CFG_ALL_BUT_ZERO	/;"	d
VSC9953_TAG_CFG_MASK	include/vsc9953.h	/^#define VSC9953_TAG_CFG_MASK	/;"	d
VSC9953_TAG_CFG_NONE	include/vsc9953.h	/^#define VSC9953_TAG_CFG_NONE	/;"	d
VSC9953_TAG_VID_PVID	include/vsc9953.h	/^#define VSC9953_TAG_VID_PVID	/;"	d
VSC9953_TOT_TAIL_DROP_LVL	include/vsc9953.h	/^#define VSC9953_TOT_TAIL_DROP_LVL	/;"	d
VSC9953_VCAP_MV_CFG	include/vsc9953.h	/^#define VSC9953_VCAP_MV_CFG	/;"	d
VSC9953_VCAP_UPDATE_CTRL	include/vsc9953.h	/^#define VSC9953_VCAP_UPDATE_CTRL	/;"	d
VSC9953_VLAN_CFG_AWARE_ENA	include/vsc9953.h	/^#define VSC9953_VLAN_CFG_AWARE_ENA	/;"	d
VSC9953_VLAN_CFG_POP_CNT_MASK	include/vsc9953.h	/^#define VSC9953_VLAN_CFG_POP_CNT_MASK	/;"	d
VSC9953_VLAN_CFG_POP_CNT_NONE	include/vsc9953.h	/^#define VSC9953_VLAN_CFG_POP_CNT_NONE	/;"	d
VSC9953_VLAN_CFG_POP_CNT_ONE	include/vsc9953.h	/^#define VSC9953_VLAN_CFG_POP_CNT_ONE	/;"	d
VSC9953_VLAN_CFG_VID_MASK	include/vsc9953.h	/^#define VSC9953_VLAN_CFG_VID_MASK	/;"	d
VSC9953_VLAN_CHECK	include/vsc9953.h	/^#define VSC9953_VLAN_CHECK(/;"	d
VSC9953_VLAN_CHK	include/vsc9953.h	/^#define VSC9953_VLAN_CHK	/;"	d
VSC9953_VLAN_CMD_IDLE	include/vsc9953.h	/^#define VSC9953_VLAN_CMD_IDLE	/;"	d
VSC9953_VLAN_CMD_INIT	include/vsc9953.h	/^#define VSC9953_VLAN_CMD_INIT	/;"	d
VSC9953_VLAN_CMD_MASK	include/vsc9953.h	/^#define VSC9953_VLAN_CMD_MASK	/;"	d
VSC9953_VLAN_CMD_READ	include/vsc9953.h	/^#define VSC9953_VLAN_CMD_READ	/;"	d
VSC9953_VLAN_CMD_WRITE	include/vsc9953.h	/^#define VSC9953_VLAN_CMD_WRITE	/;"	d
VSC9953_VLAN_PORT_MASK	include/vsc9953.h	/^#define VSC9953_VLAN_PORT_MASK	/;"	d
VSDEN	include/mc13892.h	/^#define VSDEN	/;"	d
VSDMODE	include/mc13892.h	/^#define VSDMODE	/;"	d
VSDSTBY	include/mc13892.h	/^#define VSDSTBY	/;"	d
VSD_1_8	include/mc13892.h	/^#define VSD_1_8	/;"	d
VSD_2_0	include/mc13892.h	/^#define VSD_2_0	/;"	d
VSD_2_6	include/mc13892.h	/^#define VSD_2_6	/;"	d
VSD_2_7	include/mc13892.h	/^#define VSD_2_7	/;"	d
VSD_2_8	include/mc13892.h	/^#define VSD_2_8	/;"	d
VSD_2_9	include/mc13892.h	/^#define VSD_2_9	/;"	d
VSD_3_0	include/mc13892.h	/^#define VSD_3_0	/;"	d
VSD_3_15	include/mc13892.h	/^#define VSD_3_15	/;"	d
VSD_MASK	include/mc13892.h	/^#define VSD_MASK	/;"	d
VSIMEN	include/mc13783.h	/^#define VSIMEN	/;"	d
VSIMMODE	include/mc13783.h	/^#define VSIMMODE	/;"	d
VSIMSTBY	include/mc13783.h	/^#define VSIMSTBY	/;"	d
VSP_A_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VSP_A_MARK,$/;"	e	enum:__anona307945e0103	file:
VSP_B_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VSP_B_MARK,$/;"	e	enum:__anona307945e0103	file:
VSP_C_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VSP_C_MARK,$/;"	e	enum:__anona307945e0103	file:
VSP_D_MARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	VSP_D_MARK,$/;"	e	enum:__anona307945e0103	file:
VSP_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,$/;"	e	enum:__anona3077f190103	file:
VSTAR	arch/sh/include/asm/cpu_sh7722.h	/^#define VSTAR /;"	d
VSTAT	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define VSTAT	/;"	d
VSWPR	arch/sh/include/asm/cpu_sh7722.h	/^#define VSWPR /;"	d
VSYNC_DET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VSYNC_DET	/;"	d
VSYNC_DET	arch/arm/mach-exynos/include/mach/dp.h	/^#define VSYNC_DET	/;"	d
VSYNC_H_POSITION	arch/arm/include/asm/arch-tegra/dc.h	/^#define	VSYNC_H_POSITION(/;"	d
VSYNC_INVERT	drivers/video/am335x-fb.h	/^#define VSYNC_INVERT	/;"	d
VSYNC_POLARITY_CFG	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VSYNC_POLARITY_CFG	/;"	d
VSYNC_POLARITY_CFG	arch/arm/mach-exynos/include/mach/dp.h	/^#define VSYNC_POLARITY_CFG	/;"	d
VSYNC_POLARITY_CFG_OFFSET	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define VSYNC_POLARITY_CFG_OFFSET	/;"	d
VTHIMPCAL_CTRL_REG	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define VTHIMPCAL_CTRL_REG	/;"	d
VTP0_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define VTP0_CTRL_ADDR	/;"	d
VTP0_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define VTP0_CTRL_ADDR	/;"	d
VTP0_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define VTP0_CTRL_ADDR	/;"	d
VTP0_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define VTP0_CTRL_ADDR	/;"	d
VTP1Lock	arch/arm/mach-davinci/lowlevel_init.S	/^VTP1Lock:$/;"	l
VTP1_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define VTP1_CTRL_ADDR	/;"	d
VTP1_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define VTP1_CTRL_ADDR	/;"	d
VTP1_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define VTP1_CTRL_ADDR	/;"	d
VTP1_CTRL_ADDR	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define VTP1_CTRL_ADDR	/;"	d
VTPIOCR	arch/arm/mach-davinci/lowlevel_init.S	/^VTPIOCR:$/;"	l
VTPLock	arch/arm/mach-davinci/lowlevel_init.S	/^VTPLock:$/;"	l
VTP_CLKRZ	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VTP_CLKRZ	/;"	d
VTP_CTRL_ENABLE	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define VTP_CTRL_ENABLE	/;"	d
VTP_CTRL_READY	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define VTP_CTRL_READY	/;"	d
VTP_CTRL_START_EN	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define VTP_CTRL_START_EN	/;"	d
VTP_EN	arch/arm/mach-davinci/lowlevel_init.S	/^VTP_EN:$/;"	l
VTP_IOPWRDWN	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VTP_IOPWRDWN	/;"	d
VTP_LOCK	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VTP_LOCK	/;"	d
VTP_LOCK_COUNT	arch/arm/mach-davinci/lowlevel_init.S	/^VTP_LOCK_COUNT:$/;"	l
VTP_MASK	arch/arm/mach-davinci/lowlevel_init.S	/^VTP_MASK:$/;"	l
VTP_MMR0	arch/arm/mach-davinci/lowlevel_init.S	/^VTP_MMR0:$/;"	l
VTP_MMR1	arch/arm/mach-davinci/lowlevel_init.S	/^VTP_MMR1:$/;"	l
VTP_POWERDWN	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VTP_POWERDWN	/;"	d
VTP_READY	arch/arm/mach-davinci/include/mach/hardware.h	/^#define VTP_READY	/;"	d
VTP_RECAL	arch/arm/mach-davinci/lowlevel_init.S	/^VTP_RECAL:$/;"	l
VTRCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VTRCR /;"	d
VUES	include/lattice.h	/^#define VUES	/;"	d
VUSBEN	include/mc13892.h	/^#define VUSBEN	/;"	d
VUSBEN_MC34708	include/fsl_pmic.h	/^#define VUSBEN_MC34708	/;"	d
VUSBSEL_MC34708	include/fsl_pmic.h	/^#define VUSBSEL_MC34708	/;"	d
VUSBSTBY	include/mc13892.h	/^#define VUSBSTBY	/;"	d
VVIBEN	include/mc13783.h	/^#define VVIBEN	/;"	d
VVIDEOEN	include/mc13892.h	/^#define VVIDEOEN	/;"	d
VVIDEOMODE	include/mc13892.h	/^#define VVIDEOMODE	/;"	d
VVIDEO_2_5	include/mc13892.h	/^#define VVIDEO_2_5	/;"	d
VVIDEO_2_6	include/mc13892.h	/^#define VVIDEO_2_6	/;"	d
VVIDEO_2_7	include/mc13892.h	/^#define VVIDEO_2_7	/;"	d
VVIDEO_2_775	include/mc13892.h	/^#define VVIDEO_2_775	/;"	d
VVIDEO_MASK	include/mc13892.h	/^#define VVIDEO_MASK	/;"	d
VVTCR	arch/sh/include/asm/cpu_sh7722.h	/^#define VVTCR /;"	d
VXWORKS_E820_DATA_ADDR	include/vxworks.h	/^#define VXWORKS_E820_DATA_ADDR	/;"	d
VXWORKS_E820_INFO_ADDR	include/vxworks.h	/^#define VXWORKS_E820_INFO_ADDR	/;"	d
VYBRID_GPIO	drivers/gpio/Kconfig	/^config VYBRID_GPIO$/;"	c	menu:GPIO Support
VYBRID_GPIO_COUNT	arch/arm/include/asm/arch-vf610/gpio.h	/^#define VYBRID_GPIO_COUNT	/;"	d
V_ACT_HEIGHT	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_ACT_HEIGHT(/;"	d
V_ACT_WIDTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_ACT_WIDTH(/;"	d
V_ARGB888_VIRWIDTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_ARGB888_VIRWIDTH(/;"	d
V_AUTO_GATING_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_AUTO_GATING_EN(/;"	d
V_AXI_MAX_OUTSTANDING_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_AXI_MAX_OUTSTANDING_EN(/;"	d
V_AXI_OUTSTANDING_MAX_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_AXI_OUTSTANDING_MAX_NUM(/;"	d
V_BYTE	board/bf533-ezkit/flash-defines.h	/^#define V_BYTE(/;"	d
V_DDA_INC_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_DDA_INC_MASK	/;"	d
V_DDA_INC_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_DDA_INC_SHIFT	/;"	d
V_DIRECTION	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_DIRECTION	/;"	d
V_DIRECTION_DECREMENT	arch/arm/include/asm/arch-tegra/dc.h	/^	V_DIRECTION_DECREMENT,$/;"	e	enum:__anonf53c9cce0903
V_DIRECTION_INCREMENT	arch/arm/include/asm/arch-tegra/dc.h	/^	V_DIRECTION_INCREMENT,$/;"	e	enum:__anonf53c9cce0903
V_DIRECT_PATH_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DIRECT_PATH_EN(/;"	d
V_DIRECT_PATH_LAYER_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DIRECT_PATH_LAYER_SEL(/;"	d
V_DITHER_DOWN_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DITHER_DOWN_EN(/;"	d
V_DITHER_DOWN_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DITHER_DOWN_MODE(/;"	d
V_DITHER_DOWN_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DITHER_DOWN_SEL(/;"	d
V_DITHER_UP_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DITHER_UP_EN(/;"	d
V_DMA_BURST_LENGTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DMA_BURST_LENGTH(/;"	d
V_DMA_STOP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DMA_STOP(/;"	d
V_DOUB_CHANNEL_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DOUB_CHANNEL_EN(/;"	d
V_DOUB_CH_OVERLAP_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DOUB_CH_OVERLAP_NUM(/;"	d
V_DSP_BG_BLUE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_BG_BLUE(/;"	d
V_DSP_BG_GREEN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_BG_GREEN(/;"	d
V_DSP_BG_RED	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_BG_RED(/;"	d
V_DSP_BG_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_BG_SWAP(/;"	d
V_DSP_BLACK_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_BLACK_EN(/;"	d
V_DSP_BLANK_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_BLANK_EN(/;"	d
V_DSP_CCIR656_AVG	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_CCIR656_AVG(/;"	d
V_DSP_DCLK_DDR	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_DCLK_DDR(/;"	d
V_DSP_DCLK_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_DCLK_POL(/;"	d
V_DSP_DDR_PHASE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_DDR_PHASE(/;"	d
V_DSP_DELTA_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_DELTA_SWAP(/;"	d
V_DSP_DEN_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_DEN_POL(/;"	d
V_DSP_DUMMY_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_DUMMY_SWAP(/;"	d
V_DSP_FIELD_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_FIELD_POL(/;"	d
V_DSP_HEIGHT	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_HEIGHT(/;"	d
V_DSP_HSYNC_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_HSYNC_POL(/;"	d
V_DSP_INTERLACE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_INTERLACE(/;"	d
V_DSP_LAYER0_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_LAYER0_SEL(/;"	d
V_DSP_LAYER1_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_LAYER1_SEL(/;"	d
V_DSP_LAYER2_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_LAYER2_SEL(/;"	d
V_DSP_LAYER3_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_LAYER3_SEL(/;"	d
V_DSP_LUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_LUT_EN(/;"	d
V_DSP_OUT_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_OUT_MODE(/;"	d
V_DSP_OUT_ZERO	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_OUT_ZERO(/;"	d
V_DSP_RB_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_RB_SWAP(/;"	d
V_DSP_RG_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_RG_SWAP(/;"	d
V_DSP_VSYNC_POL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_VSYNC_POL(/;"	d
V_DSP_WIDTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_WIDTH(/;"	d
V_DSP_XST	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_XST(/;"	d
V_DSP_X_MIR_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_X_MIR_EN(/;"	d
V_DSP_YST	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_YST(/;"	d
V_DSP_YUV_CLIP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_YUV_CLIP(/;"	d
V_DSP_Y_MIR_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_DSP_Y_MIR_EN(/;"	d
V_EDPI_HALT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_EDPI_HALT_EN(/;"	d
V_EDPI_WMS_FS	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_EDPI_WMS_FS(/;"	d
V_EDPI_WMS_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_EDPI_WMS_MODE(/;"	d
V_EDP_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_EDP_OUT_EN(/;"	d
V_HASP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_HASP(/;"	d
V_HDMI_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_HDMI_OUT_EN(/;"	d
V_HEAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_HEAP(/;"	d
V_HORPRD	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_HORPRD(/;"	d
V_HSYNC	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_HSYNC(/;"	d
V_LINES	board/bf527-ezkit/video.c	/^#define V_LINES	/;"	d	file:
V_MCFG_ADDRMUXLEGACY_FLEX	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_ADDRMUXLEGACY_FLEX	/;"	d
V_MCFG_B32NOT16_32	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_B32NOT16_32	/;"	d
V_MCFG_BANKALLOCATION_RBC	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_BANKALLOCATION_RBC	/;"	d
V_MCFG_CASWIDTH	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_CASWIDTH(/;"	d
V_MCFG_CASWIDTH_10B	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_CASWIDTH_10B	/;"	d
V_MCFG_DEEPPD_EN	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_DEEPPD_EN	/;"	d
V_MCFG_RAMSIZE	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_RAMSIZE(/;"	d
V_MCFG_RAMTYPE_DDR	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_RAMTYPE_DDR	/;"	d
V_MCFG_RASWIDTH	arch/arm/include/asm/arch-omap3/mem.h	/^#define V_MCFG_RASWIDTH(/;"	d
V_MIPI_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_MIPI_OUT_EN(/;"	d
V_MMU_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_MMU_EN(/;"	d
V_NOC_HURRY_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_NOC_HURRY_EN(/;"	d
V_NOC_HURRY_THRESHOLD	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_NOC_HURRY_THRESHOLD(/;"	d
V_NOC_HURRY_VALUE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_NOC_HURRY_VALUE(/;"	d
V_NOC_QOS_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_NOC_QOS_EN(/;"	d
V_NOC_WIN_QOS	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_NOC_WIN_QOS(/;"	d
V_NS16550_CLK	include/configs/am3517_crane.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/am3517_evm.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/cm_t35.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/mcx.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/nokia_rx51.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/omap3_evm.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/sniper.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tao3530.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tegra114-common.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tegra124-common.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tegra186-common.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tegra20-common.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tegra210-common.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/tegra30-common.h	/^#define V_NS16550_CLK	/;"	d
V_NS16550_CLK	include/configs/ti_omap3_common.h	/^#define V_NS16550_CLK	/;"	d
V_OSCK	arch/arm/include/asm/arch-omap4/clock.h	/^#define V_OSCK	/;"	d
V_OSCK	arch/arm/include/asm/arch-omap5/clock.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am335x_evm.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am335x_igep0033.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am335x_shc.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am335x_sl50.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am3517_crane.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am3517_evm.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/am43xx_evm.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/baltos.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/bav335x.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/brppt1.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/brxre1.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/cm_t335.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/cm_t35.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/cm_t3517.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/cm_t43.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/mcx.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/nokia_rx51.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/omap3_evm.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/pcm051.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/pengwyn.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/pepper.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/siemens-am33x-common.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/sniper.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/tam3517-common.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/tao3530.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/ti814x_evm.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/ti816x_evm.h	/^#define V_OSCK /;"	d
V_OSCK	include/configs/ti_omap3_common.h	/^#define V_OSCK	/;"	d
V_OSCK	include/configs/tricorder.h	/^#define V_OSCK	/;"	d
V_PERIOD	board/bf527-ezkit/video.c	/^#define V_PERIOD	/;"	d	file:
V_POSITION_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_POSITION_MASK	/;"	d
V_POSITION_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_POSITION_SHIFT	/;"	d
V_PRESCALED_SIZE_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_PRESCALED_SIZE_MASK	/;"	d
V_PRESCALED_SIZE_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_PRESCALED_SIZE_SHIFT	/;"	d
V_PRE_DITHER_DOWN_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_PRE_DITHER_DOWN_EN(/;"	d
V_PULSE	board/bf527-ezkit/video.c	/^#define V_PULSE	/;"	d	file:
V_PULSE0_POSITION_A	arch/arm/include/asm/arch-tegra/dc.h	/^	V_PULSE0_POSITION_A,$/;"	e	enum:dc_disp_v_pulse_pos
V_PULSE0_POSITION_B	arch/arm/include/asm/arch-tegra/dc.h	/^	V_PULSE0_POSITION_B,$/;"	e	enum:dc_disp_v_pulse_pos
V_PULSE0_POSITION_C	arch/arm/include/asm/arch-tegra/dc.h	/^	V_PULSE0_POSITION_C,$/;"	e	enum:dc_disp_v_pulse_pos
V_PULSE0_POSITION_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	V_PULSE0_POSITION_COUNT,$/;"	e	enum:dc_disp_v_pulse_pos
V_RGB565_VIRWIDTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_RGB565_VIRWIDTH(/;"	d
V_RGB888_VIRWIDTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_RGB888_VIRWIDTH(/;"	d
V_RGB_OUT_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_RGB_OUT_EN(/;"	d
V_SCLK	arch/arm/include/asm/arch-omap4/clock.h	/^#define V_SCLK /;"	d
V_SCLK	arch/arm/include/asm/arch-omap5/clock.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am335x_evm.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am335x_igep0033.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am335x_shc.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am335x_sl50.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am3517_crane.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am3517_evm.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/am43xx_evm.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/baltos.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/bav335x.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/brppt1.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/brxre1.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/cm_t335.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/cm_t35.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/cm_t3517.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/cm_t43.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/mcx.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/nokia_rx51.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/omap3_evm.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/pcm051.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/pengwyn.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/pepper.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/siemens-am33x-common.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/sniper.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/tam3517-common.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/tao3530.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/ti814x_evm.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/ti816x_evm.h	/^#define V_SCLK /;"	d
V_SCLK	include/configs/ti_omap3_common.h	/^#define V_SCLK	/;"	d
V_SCLK	include/configs/tricorder.h	/^#define V_SCLK	/;"	d
V_SIZE_MASK	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_SIZE_MASK	/;"	d
V_SIZE_SHIFT	arch/arm/include/asm/arch-tegra/dc.h	/^#define V_SIZE_SHIFT	/;"	d
V_STANDBY_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_STANDBY_EN(/;"	d
V_S_POLARITY_CFG_SHIFT	arch/arm/mach-exynos/include/mach/dp.h	/^#define V_S_POLARITY_CFG_SHIFT	/;"	d
V_ULONG	board/bf533-ezkit/flash-defines.h	/^#define V_ULONG(/;"	d
V_VAEP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_VAEP(/;"	d
V_VASP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_VASP(/;"	d
V_VERPRD	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_VERPRD(/;"	d
V_VSYNC	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_VSYNC(/;"	d
V_WIN0_ALPHA_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_ALPHA_SWAP(/;"	d
V_WIN0_BIC_COE_SEL	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_BIC_COE_SEL(/;"	d
V_WIN0_CBR_AXI_GATHER_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_AXI_GATHER_EN(/;"	d
V_WIN0_CBR_AXI_GATHER_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_AXI_GATHER_NUM(/;"	d
V_WIN0_CBR_DEFLICK	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_DEFLICK(/;"	d
V_WIN0_CBR_HOR_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_HOR_SCL_MODE(/;"	d
V_WIN0_CBR_HSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_HSD_MODE(/;"	d
V_WIN0_CBR_VER_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_VER_SCL_MODE(/;"	d
V_WIN0_CBR_VSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_VSD_MODE(/;"	d
V_WIN0_CBR_VSU_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CBR_VSU_MODE(/;"	d
V_WIN0_CSC_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_CSC_MODE(/;"	d
V_WIN0_DATA_FMT	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_DATA_FMT(/;"	d
V_WIN0_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_EN(/;"	d
V_WIN0_FMT_10	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_FMT_10(/;"	d
V_WIN0_HS_OFFSET_CBR	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_HS_OFFSET_CBR(/;"	d
V_WIN0_HS_OFFSET_YRGB	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_HS_OFFSET_YRGB(/;"	d
V_WIN0_INTERLACE_READ	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_INTERLACE_READ(/;"	d
V_WIN0_KEY_COLOR	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_KEY_COLOR(/;"	d
V_WIN0_KEY_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_KEY_EN(/;"	d
V_WIN0_LB_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_LB_MODE(/;"	d
V_WIN0_LINE_LOAD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_LINE_LOAD_MODE(/;"	d
V_WIN0_MID_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_MID_SWAP(/;"	d
V_WIN0_NO_OUTSTANDING	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_NO_OUTSTANDING(/;"	d
V_WIN0_PPAS_ZERO_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_PPAS_ZERO_EN(/;"	d
V_WIN0_RB_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_RB_SWAP(/;"	d
V_WIN0_UV_SWAP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_UV_SWAP(/;"	d
V_WIN0_VSD_CBR_GT2	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_VSD_CBR_GT2(/;"	d
V_WIN0_VSD_CBR_GT4	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_VSD_CBR_GT4(/;"	d
V_WIN0_VSD_YRGB_GT2	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_VSD_YRGB_GT2(/;"	d
V_WIN0_VSD_YRGB_GT4	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_VSD_YRGB_GT4(/;"	d
V_WIN0_VS_OFFSET_CBR	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_VS_OFFSET_CBR(/;"	d
V_WIN0_VS_OFFSET_YRGB	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_VS_OFFSET_YRGB(/;"	d
V_WIN0_YRGB_AXI_GATHER_EN	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_AXI_GATHER_EN(/;"	d
V_WIN0_YRGB_AXI_GATHER_NUM	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_AXI_GATHER_NUM(/;"	d
V_WIN0_YRGB_DEFLICK	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_DEFLICK(/;"	d
V_WIN0_YRGB_HOR_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_HOR_SCL_MODE(/;"	d
V_WIN0_YRGB_HSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_HSD_MODE(/;"	d
V_WIN0_YRGB_VER_SCL_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_VER_SCL_MODE(/;"	d
V_WIN0_YRGB_VSD_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_VSD_MODE(/;"	d
V_WIN0_YRGB_VSU_MODE	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YRGB_VSU_MODE(/;"	d
V_WIN0_YUV_CLIP	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define V_WIN0_YUV_CLIP(/;"	d
Value	board/esd/common/lcd.h	/^    uchar  Value;$/;"	m	struct:__anon5a5858080108	typeref:typename:uchar
Value	include/sm501.h	/^	unsigned int Value;$/;"	m	struct:__anond2aa10c40108	typeref:typename:unsigned int
Value1	include/mpc5xxx.h	/^	volatile u32 Value1;		\/* SDMA + 0x70 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
Value2	include/mpc5xxx.h	/^	volatile u32 Value2;		\/* SDMA + 0x74 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
VcHandle	drivers/usb/gadget/rndis.h	/^	__le32	VcHandle;$/;"	m	struct:rndis_packet_msg_type	typeref:typename:__le32
VendorID	include/bios_emul.h	/^	u32 VendorID;$/;"	m	struct:__anoneb05efed0108	typeref:typename:u32
VirtualAddress	include/pe.h	/^		uint32_t VirtualAddress;$/;"	m	union:_IMAGE_RELOCATION::__anon69e06b43020a	typeref:typename:uint32_t
VirtualAddress	include/pe.h	/^	uint32_t VirtualAddress;$/;"	m	struct:_IMAGE_DATA_DIRECTORY	typeref:typename:uint32_t
VirtualAddress	include/pe.h	/^	uint32_t VirtualAddress;$/;"	m	struct:_IMAGE_SECTION_HEADER	typeref:typename:uint32_t
VirtualAddress	include/pe.h	/^        uint32_t VirtualAddress;$/;"	m	struct:_IMAGE_BASE_RELOCATION	typeref:typename:uint32_t
VirtualSize	include/pe.h	/^		uint32_t VirtualSize;$/;"	m	union:_IMAGE_SECTION_HEADER::__anon69e06b43010a	typeref:typename:uint32_t
Void_t	include/malloc.h	/^#define Void_t /;"	d
Vsync_pol	drivers/video/ipu.h	/^	unsigned Vsync_pol:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
W128BIT	arch/arm/include/asm/ti-common/ti-edma3.h	/^	W128BIT = 4,$/;"	e	enum:edma3_fifo_width
W16BIT	arch/arm/include/asm/ti-common/ti-edma3.h	/^	W16BIT = 1,$/;"	e	enum:edma3_fifo_width
W256BIT	arch/arm/include/asm/ti-common/ti-edma3.h	/^	W256BIT = 5$/;"	e	enum:edma3_fifo_width
W32BIT	arch/arm/include/asm/ti-common/ti-edma3.h	/^	W32BIT = 2,$/;"	e	enum:edma3_fifo_width
W39L040A	drivers/mtd/jedec_flash.c	/^#define W39L040A	/;"	d	file:
W64BIT	arch/arm/include/asm/ti-common/ti-edma3.h	/^	W64BIT = 3,$/;"	e	enum:edma3_fifo_width
W83627DHG_ACPI	include/winbond_w83627.h	/^#define W83627DHG_ACPI	/;"	d
W83627DHG_FDC	include/winbond_w83627.h	/^#define W83627DHG_FDC	/;"	d
W83627DHG_HWM	include/winbond_w83627.h	/^#define W83627DHG_HWM	/;"	d
W83627DHG_KBC	include/winbond_w83627.h	/^#define W83627DHG_KBC	/;"	d
W83627DHG_PECI_SST	include/winbond_w83627.h	/^#define W83627DHG_PECI_SST	/;"	d
W83627DHG_PP	include/winbond_w83627.h	/^#define W83627DHG_PP	/;"	d
W83627DHG_SP1	include/winbond_w83627.h	/^#define W83627DHG_SP1	/;"	d
W83627DHG_SP2	include/winbond_w83627.h	/^#define W83627DHG_SP2	/;"	d
W83627DHG_SPI	include/winbond_w83627.h	/^#define W83627DHG_SPI	/;"	d
W83627DHG_WDTO_PLED	include/winbond_w83627.h	/^#define W83627DHG_WDTO_PLED	/;"	d
W83782D_REG_ADCCLK	board/socrates/socrates.c	/^#define W83782D_REG_ADCCLK	/;"	d	file:
W83782D_REG_BANK_SEL	board/socrates/socrates.c	/^#define W83782D_REG_BANK_SEL	/;"	d	file:
W83782D_REG_BEEP_CTRL	board/socrates/socrates.c	/^#define W83782D_REG_BEEP_CTRL	/;"	d	file:
W83782D_REG_BEEP_CTRL2	board/socrates/socrates.c	/^#define W83782D_REG_BEEP_CTRL2	/;"	d	file:
W83782D_REG_CFG	board/socrates/socrates.c	/^#define W83782D_REG_CFG	/;"	d	file:
W83782D_REG_PWMOUT1	board/socrates/socrates.c	/^#define W83782D_REG_PWMOUT1	/;"	d	file:
W83782D_REG_VBAT	board/socrates/socrates.c	/^#define W83782D_REG_VBAT	/;"	d	file:
W83C553F_CS_COM_CGE	include/w83c553f.h	/^#define W83C553F_CS_COM_CGE	/;"	d
W83C553F_CS_COM_DACKAL	include/w83c553f.h	/^#define W83C553F_CS_COM_DACKAL	/;"	d
W83C553F_CS_COM_DREQSAL	include/w83c553f.h	/^#define W83C553F_CS_COM_DREQSAL	/;"	d
W83C553F_CS_COM_GAP	include/w83c553f.h	/^#define W83C553F_CS_COM_GAP	/;"	d
W83C553F_CS_STAT_CH0REQ	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH0REQ	/;"	d
W83C553F_CS_STAT_CH0TC	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH0TC	/;"	d
W83C553F_CS_STAT_CH1REQ	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH1REQ	/;"	d
W83C553F_CS_STAT_CH1TC	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH1TC	/;"	d
W83C553F_CS_STAT_CH2REQ	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH2REQ	/;"	d
W83C553F_CS_STAT_CH2TC	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH2TC	/;"	d
W83C553F_CS_STAT_CH3REQ	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH3REQ	/;"	d
W83C553F_CS_STAT_CH3TC	include/w83c553f.h	/^#define W83C553F_CS_STAT_CH3TC	/;"	d
W83C553F_DID	include/w83c553f.h	/^#define W83C553F_DID	/;"	d
W83C553F_DMA1	include/w83c553f.h	/^#define W83C553F_DMA1	/;"	d
W83C553F_DMA1_CBP	include/w83c553f.h	/^#define W83C553F_DMA1_CBP	/;"	d
W83C553F_DMA1_CM	include/w83c553f.h	/^#define W83C553F_DMA1_CM	/;"	d
W83C553F_DMA1_CS	include/w83c553f.h	/^#define W83C553F_DMA1_CS	/;"	d
W83C553F_DMA1_MC	include/w83c553f.h	/^#define W83C553F_DMA1_MC	/;"	d
W83C553F_DMA1_RWAMB	include/w83c553f.h	/^#define W83C553F_DMA1_RWAMB	/;"	d
W83C553F_DMA1_WM	include/w83c553f.h	/^#define W83C553F_DMA1_WM	/;"	d
W83C553F_DMA1_WR	include/w83c553f.h	/^#define W83C553F_DMA1_WR	/;"	d
W83C553F_DMA1_WSMB	include/w83c553f.h	/^#define W83C553F_DMA1_WSMB	/;"	d
W83C553F_DMA2	include/w83c553f.h	/^#define W83C553F_DMA2	/;"	d
W83C553F_DMA2_CBP	include/w83c553f.h	/^#define W83C553F_DMA2_CBP	/;"	d
W83C553F_DMA2_CM	include/w83c553f.h	/^#define W83C553F_DMA2_CM	/;"	d
W83C553F_DMA2_CS	include/w83c553f.h	/^#define W83C553F_DMA2_CS	/;"	d
W83C553F_DMA2_MC	include/w83c553f.h	/^#define W83C553F_DMA2_MC	/;"	d
W83C553F_DMA2_RWAMB	include/w83c553f.h	/^#define W83C553F_DMA2_RWAMB	/;"	d
W83C553F_DMA2_WM	include/w83c553f.h	/^#define W83C553F_DMA2_WM	/;"	d
W83C553F_DMA2_WR	include/w83c553f.h	/^#define W83C553F_DMA2_WR	/;"	d
W83C553F_DMA2_WSMB	include/w83c553f.h	/^#define W83C553F_DMA2_WSMB	/;"	d
W83C553F_MODE_ADDRDEC	include/w83c553f.h	/^#define W83C553F_MODE_ADDRDEC	/;"	d
W83C553F_MODE_AUTOINIT	include/w83c553f.h	/^#define W83C553F_MODE_AUTOINIT	/;"	d
W83C553F_MODE_CH0SEL	include/w83c553f.h	/^#define W83C553F_MODE_CH0SEL	/;"	d
W83C553F_MODE_CH1SEL	include/w83c553f.h	/^#define W83C553F_MODE_CH1SEL	/;"	d
W83C553F_MODE_CH2SEL	include/w83c553f.h	/^#define W83C553F_MODE_CH2SEL	/;"	d
W83C553F_MODE_CH3SEL	include/w83c553f.h	/^#define W83C553F_MODE_CH3SEL	/;"	d
W83C553F_MODE_TM_BLOCK	include/w83c553f.h	/^#define W83C553F_MODE_TM_BLOCK	/;"	d
W83C553F_MODE_TM_CASCADE	include/w83c553f.h	/^#define W83C553F_MODE_TM_CASCADE	/;"	d
W83C553F_MODE_TM_DEMAND	include/w83c553f.h	/^#define W83C553F_MODE_TM_DEMAND	/;"	d
W83C553F_MODE_TM_SINGLE	include/w83c553f.h	/^#define W83C553F_MODE_TM_SINGLE	/;"	d
W83C553F_MODE_TT_ILLEGAL	include/w83c553f.h	/^#define W83C553F_MODE_TT_ILLEGAL	/;"	d
W83C553F_MODE_TT_READ	include/w83c553f.h	/^#define W83C553F_MODE_TT_READ	/;"	d
W83C553F_MODE_TT_VERIFY	include/w83c553f.h	/^#define W83C553F_MODE_TT_VERIFY	/;"	d
W83C553F_MODE_TT_WRITE	include/w83c553f.h	/^#define W83C553F_MODE_TT_WRITE	/;"	d
W83C553F_PIC1_ELC	include/w83c553f.h	/^#define W83C553F_PIC1_ELC	/;"	d
W83C553F_PIC1_ICW1	include/w83c553f.h	/^#define W83C553F_PIC1_ICW1	/;"	d
W83C553F_PIC1_ICW2	include/w83c553f.h	/^#define W83C553F_PIC1_ICW2	/;"	d
W83C553F_PIC1_ICW3	include/w83c553f.h	/^#define W83C553F_PIC1_ICW3	/;"	d
W83C553F_PIC1_ICW4	include/w83c553f.h	/^#define W83C553F_PIC1_ICW4	/;"	d
W83C553F_PIC1_OCW1	include/w83c553f.h	/^#define W83C553F_PIC1_OCW1	/;"	d
W83C553F_PIC1_OCW2	include/w83c553f.h	/^#define W83C553F_PIC1_OCW2	/;"	d
W83C553F_PIC1_OCW3	include/w83c553f.h	/^#define W83C553F_PIC1_OCW3	/;"	d
W83C553F_PIC2_ELC	include/w83c553f.h	/^#define W83C553F_PIC2_ELC	/;"	d
W83C553F_PIC2_ICW1	include/w83c553f.h	/^#define W83C553F_PIC2_ICW1	/;"	d
W83C553F_PIC2_ICW2	include/w83c553f.h	/^#define W83C553F_PIC2_ICW2	/;"	d
W83C553F_PIC2_ICW3	include/w83c553f.h	/^#define W83C553F_PIC2_ICW3	/;"	d
W83C553F_PIC2_ICW4	include/w83c553f.h	/^#define W83C553F_PIC2_ICW4	/;"	d
W83C553F_PIC2_OCW1	include/w83c553f.h	/^#define W83C553F_PIC2_OCW1	/;"	d
W83C553F_PIC2_OCW2	include/w83c553f.h	/^#define W83C553F_PIC2_OCW2	/;"	d
W83C553F_PIC2_OCW3	include/w83c553f.h	/^#define W83C553F_PIC2_OCW3	/;"	d
W83C553F_REQ_CH0SEL	include/w83c553f.h	/^#define W83C553F_REQ_CH0SEL	/;"	d
W83C553F_REQ_CH1SEL	include/w83c553f.h	/^#define W83C553F_REQ_CH1SEL	/;"	d
W83C553F_REQ_CH2SEL	include/w83c553f.h	/^#define W83C553F_REQ_CH2SEL	/;"	d
W83C553F_REQ_CH3SEL	include/w83c553f.h	/^#define W83C553F_REQ_CH3SEL	/;"	d
W83C553F_REQ_CHSERREQ	include/w83c553f.h	/^#define W83C553F_REQ_CHSERREQ	/;"	d
W83C553F_RWAMB_CH0MASK	include/w83c553f.h	/^#define W83C553F_RWAMB_CH0MASK	/;"	d
W83C553F_RWAMB_CH1MASK	include/w83c553f.h	/^#define W83C553F_RWAMB_CH1MASK	/;"	d
W83C553F_RWAMB_CH2MASK	include/w83c553f.h	/^#define W83C553F_RWAMB_CH2MASK	/;"	d
W83C553F_RWAMB_CH3MASK	include/w83c553f.h	/^#define W83C553F_RWAMB_CH3MASK	/;"	d
W83C553F_TMR1_CMOD	include/w83c553f.h	/^#define W83C553F_TMR1_CMOD	/;"	d
W83C553F_VID	include/w83c553f.h	/^#define W83C553F_VID	/;"	d
W83C553F_WSMB_CH0SEL	include/w83c553f.h	/^#define W83C553F_WSMB_CH0SEL	/;"	d
W83C553F_WSMB_CH1SEL	include/w83c553f.h	/^#define W83C553F_WSMB_CH1SEL	/;"	d
W83C553F_WSMB_CH2SEL	include/w83c553f.h	/^#define W83C553F_WSMB_CH2SEL	/;"	d
W83C553F_WSMB_CH3SEL	include/w83c553f.h	/^#define W83C553F_WSMB_CH3SEL	/;"	d
W83C553F_WSMB_CHMASKSEL	include/w83c553f.h	/^#define W83C553F_WSMB_CHMASKSEL	/;"	d
W8BIT	arch/arm/include/asm/ti-common/ti-edma3.h	/^	W8BIT = 0,$/;"	e	enum:edma3_fifo_width
WADT_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   WADT_STS	/;"	d
WADT_en	arch/x86/include/asm/arch-broadwell/pm.h	/^#define   WADT_en	/;"	d
WADVA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WADVA(/;"	d
WADVN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WADVN(/;"	d
WAIT	board/mpl/vcma9/lowlevel_init.S	/^#define WAIT	/;"	d	file:
WAIT	board/samsung/smdk2410/lowlevel_init.S	/^#define WAIT	/;"	d	file:
WAIT	include/lattice.h	/^#define WAIT	/;"	d
WAITCFG	arch/arm/mach-davinci/lowlevel_init.S	/^WAITCFG:$/;"	l
WAITCFG_VAL	arch/arm/mach-davinci/lowlevel_init.S	/^WAITCFG_VAL:$/;"	l
WAITMONITORINGTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WAITMONITORINGTIME(/;"	d
WAITPINSELECT	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WAITPINSELECT(/;"	d
WAITREADMONITORING	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WAITREADMONITORING /;"	d
WAITWRITEMONITORING	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WAITWRITEMONITORING /;"	d
WAIT_100US_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_100US_400:	.long	20000$/;"	l
WAIT_100US_400	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_100US_400:	.long	20000$/;"	l
WAIT_100US_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_100US_533:	.long	26650$/;"	l
WAIT_100US_533	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_100US_533:	.long	26650$/;"	l
WAIT_10KMCLK	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_10KMCLK:	.long	10000$/;"	l
WAIT_10KMCLK	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_10KMCLK:	.long	10000$/;"	l
WAIT_16MCLK	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_16MCLK:	.long	16$/;"	l
WAIT_16MCLK	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_16MCLK:	.long	16$/;"	l
WAIT_1MCLK	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_1MCLK:		.long	1$/;"	l
WAIT_1MCLK	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_1MCLK:		.long	1$/;"	l
WAIT_200US	board/renesas/sh7785lcr/lowlevel_init.S	/^WAIT_200US:    .long   33333$/;"	l
WAIT_200US_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_200US_400:	.long	40000$/;"	l
WAIT_200US_400	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_200US_400:	.long	40000$/;"	l
WAIT_200US_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_200US_533:	.long	53300$/;"	l
WAIT_200US_533	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_200US_533:	.long	53300$/;"	l
WAIT_30US	board/renesas/sh7752evb/lowlevel_init.S	/^WAIT_30US:	.long	13333$/;"	l
WAIT_30US	board/renesas/sh7753evb/lowlevel_init.S	/^WAIT_30US:	.long	13333$/;"	l
WAIT_30US	board/renesas/sh7757lcr/lowlevel_init.S	/^WAIT_30US:	.long	13333$/;"	l
WAIT_32MCLK	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WAIT_32MCLK:	.long	32$/;"	l
WAIT_32MCLK	board/renesas/r0p7734/lowlevel_init.S	/^WAIT_32MCLK:	.long	32$/;"	l
WAIT_FOR_ADC	board/freescale/b4860qds/b4860qds.c	/^#define WAIT_FOR_ADC	/;"	d	file:
WAIT_FOR_ADC	board/freescale/common/vid.c	/^#define WAIT_FOR_ADC	/;"	d	file:
WAIT_FOR_ADC	board/freescale/t4qds/t4240qds.c	/^#define WAIT_FOR_ADC	/;"	d	file:
WAIT_FOR_COMPLETE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define WAIT_FOR_COMPLETE	/;"	d
WAIT_FOR_FRAME_DONE	drivers/video/da8xx-fb.c	/^#define WAIT_FOR_FRAME_DONE	/;"	d	file:
WAIT_FOR_IN_COMPLETE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define WAIT_FOR_IN_COMPLETE	/;"	d
WAIT_FOR_NULL_COMPLETE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define WAIT_FOR_NULL_COMPLETE	/;"	d
WAIT_FOR_OUT_COMPLETE	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define WAIT_FOR_OUT_COMPLETE	/;"	d
WAIT_FOR_OUT_STATUS	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define WAIT_FOR_OUT_STATUS /;"	d
WAIT_FOR_SETUP	drivers/usb/gadget/atmel_usba_udc.h	/^	WAIT_FOR_SETUP,$/;"	e	enum:usba_ctrl_state
WAIT_FOR_SETUP	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define WAIT_FOR_SETUP /;"	d
WAIT_INT_CHK	drivers/i2c/kona_i2c.c	/^#define WAIT_INT_CHK	/;"	d	file:
WAIT_MS_DATAIO	drivers/block/ahci.c	/^#define WAIT_MS_DATAIO	/;"	d	file:
WAIT_MS_FLUSH	drivers/block/ahci.c	/^#define WAIT_MS_FLUSH	/;"	d	file:
WAIT_MS_LINKUP	board/highbank/ahci.c	/^#define WAIT_MS_LINKUP	/;"	d	file:
WAIT_MS_LINKUP	drivers/block/ahci.c	/^#define WAIT_MS_LINKUP	/;"	d	file:
WAIT_MS_SPINUP	drivers/block/ahci.c	/^#define WAIT_MS_SPINUP	/;"	d	file:
WAIT_OSC_TIME	board/renesas/sh7752evb/lowlevel_init.S	/^WAIT_OSC_TIME:	.long	6000$/;"	l
WAIT_OSC_TIME	board/renesas/sh7753evb/lowlevel_init.S	/^WAIT_OSC_TIME:	.long	6000$/;"	l
WAIT_OSC_TIME	board/renesas/sh7757lcr/lowlevel_init.S	/^WAIT_OSC_TIME:	.long	6000$/;"	l
WAIT_PORT177_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	WAIT_PORT177_MARK, \/* WAIT Port 90\/177 *\/$/;"	e	enum:__anona304c1340103	file:
WAIT_PORT90_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	WAIT_PORT90_MARK,$/;"	e	enum:__anona304c1340103	file:
WAIT_RFCR_COUNTER	board/renesas/ap325rxa/cpld-ap325rxa.c	/^#define WAIT_RFCR_COUNTER	/;"	d	file:
WAIT_SECS	examples/api/demo.c	/^#define WAIT_SECS	/;"	d	file:
WAIT_TIME	board/micronas/vct/ebi.h	/^#define WAIT_TIME	/;"	d
WAIT_UNTIL	include/radeon.h	/^#define WAIT_UNTIL	/;"	d
WAIT__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	WAIT__MARK, DREQ0_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
WAKE	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define WAKE	/;"	d
WAKEDET	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WAKEDET	/;"	d
WAKEMOD	drivers/net/ax88180.h	/^  #define WAKEMOD	/;"	d
WAKEUP	drivers/net/dc2114x.c	/^#define WAKEUP	/;"	d	file:
WAKEUP0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define WAKEUP0	/;"	d
WAKEUP1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define WAKEUP1	/;"	d
WAKEUP2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define WAKEUP2	/;"	d
WAKEUP3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define WAKEUP3	/;"	d
WAKEUPEVENT_0	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_0	/;"	d
WAKEUPEVENT_1	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_1	/;"	d
WAKEUPEVENT_2	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_2	/;"	d
WAKEUPEVENT_3	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_3	/;"	d
WAKEUPEVENT_4	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_4	/;"	d
WAKEUPEVENT_5	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_5	/;"	d
WAKEUPEVENT_6	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WAKEUPEVENT_6	/;"	d
WAKEUPPROC	arch/arm/include/asm/arch-omap3/cpu.h	/^#define WAKEUPPROC	/;"	d
WAKEUP_EN	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_EN	include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EN	/;"	d
WAKEUP_ENABLE	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_ENABLE	include/dt-bindings/pinctrl/am43xx.h	/^#define WAKEUP_ENABLE	/;"	d
WAKEUP_EVENT	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	include/dt-bindings/pinctrl/dra.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_EVENT	include/dt-bindings/pinctrl/omap.h	/^#define WAKEUP_EVENT	/;"	d
WAKEUP_STATE	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define WAKEUP_STATE	/;"	d
WAKEUP_STATE	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	WAKEUP_STATE			= 4,$/;"	e	enum:__anon957231910203	file:
WAKE_ARP	include/linux/ethtool.h	/^#define WAKE_ARP	/;"	d
WAKE_BCAST	include/linux/ethtool.h	/^#define WAKE_BCAST	/;"	d
WAKE_CSN	include/ns87308.h	/^#define WAKE_CSN /;"	d
WAKE_MAGIC	include/linux/ethtool.h	/^#define WAKE_MAGIC	/;"	d
WAKE_MAGICSECURE	include/linux/ethtool.h	/^#define WAKE_MAGICSECURE	/;"	d
WAKE_MCAST	include/linux/ethtool.h	/^#define WAKE_MCAST	/;"	d
WAKE_PHY	include/linux/ethtool.h	/^#define WAKE_PHY	/;"	d
WAKE_PUSHBUTTON_EN	board/bf609-ezkit/soft_switch.h	/^#define WAKE_PUSHBUTTON_EN /;"	d
WAKE_UCAST	include/linux/ethtool.h	/^#define WAKE_UCAST	/;"	d
WAK_STS	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  WAK_STS	/;"	d
WAK_STS	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define   WAK_STS	/;"	d
WAL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WAL	/;"	d
WANT_ALL_NODES_AND_PROPS	include/libfdt.h	/^	WANT_ALL_NODES_AND_PROPS	\/* Everything for all levels *\/$/;"	e	enum:want_t
WANT_MII	arch/powerpc/cpu/mpc8xx/fec.c	/^#define WANT_MII$/;"	d	file:
WANT_NODES_AND_PROPS	include/libfdt.h	/^	WANT_NODES_AND_PROPS,		\/* Everything for one level *\/$/;"	e	enum:want_t
WANT_NODES_ONLY	include/libfdt.h	/^	WANT_NODES_ONLY,		\/* No properties *\/$/;"	e	enum:want_t
WANT_NOTHING	include/libfdt.h	/^	WANT_NOTHING,$/;"	e	enum:want_t
WANT_USB_ROOT_HUB_HUB_DES	arch/sparc/cpu/leon3/usb_uhci.c	/^#define WANT_USB_ROOT_HUB_HUB_DES$/;"	d	file:
WANT_USB_ROOT_HUB_HUB_DES	board/mpl/common/usb_uhci.c	/^#define WANT_USB_ROOT_HUB_HUB_DES$/;"	d	file:
WARN	drivers/usb/dwc3/linux-compat.h	/^#define WARN(/;"	d
WARN	drivers/usb/host/isp116x.h	/^#define WARN(/;"	d
WARN	drivers/usb/musb-new/linux-compat.h	/^#define WARN(/;"	d
WARN	scripts/checkpatch.pl	/^sub WARN {$/;"	s
WARNING	drivers/usb/gadget/at91_udc.h	/^#define WARNING(/;"	d
WARNING	drivers/usb/gadget/storage_common.c	/^#define WARNING(/;"	d	file:
WARNING	drivers/usb/musb-new/musb_debug.h	/^#define WARNING(/;"	d
WARNING	tools/patman/tout.py	/^WARNING = 1$/;"	v
WARN_ON	include/linux/compat.h	/^#define WARN_ON(/;"	d
WARN_ON_ONCE	drivers/usb/dwc3/linux-compat.h	/^#define WARN_ON_ONCE(/;"	d
WASM	arch/arm/include/asm/unified.h	/^#define WASM(/;"	d
WATCHDOG_BASE	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define WATCHDOG_BASE	/;"	d
WATCHDOG_COUNT	drivers/mmc/davinci_mmc.c	/^#define WATCHDOG_COUNT	/;"	d	file:
WATCHDOG_MASK	arch/powerpc/cpu/mpc85xx/cpu.c	/^#define WATCHDOG_MASK /;"	d	file:
WATCHDOG_OFFSET	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^#define WATCHDOG_OFFSET	/;"	d
WATCHDOG_RESET	examples/standalone/mem_to_mem_idma2intr.c	/^#define WATCHDOG_RESET(/;"	d	file:
WATCHDOG_RESET	include/watchdog.h	/^			#define WATCHDOG_RESET /;"	d
WATCHDOG_RESET	include/watchdog.h	/^			#define WATCHDOG_RESET(/;"	d
WATCHDOG_RESET	include/watchdog.h	/^		#define WATCHDOG_RESET /;"	d
WATCHDOG_TRIGGER_GPIO	include/configs/rut.h	/^#define WATCHDOG_TRIGGER_GPIO	/;"	d
WATER_RXWATER_OFF	drivers/serial/serial_lpuart.c	/^#define WATER_RXWATER_OFF	/;"	d	file:
WATER_TXWATER_OFF	drivers/serial/serial_lpuart.c	/^#define WATER_TXWATER_OFF	/;"	d	file:
WBEA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WBEA(/;"	d
WBED	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WBED	/;"	d
WBED1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WBED1	/;"	d
WBEN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WBEN(/;"	d
WBUF_TIMEOUT_HARDLIMIT	fs/ubifs/ubifs.h	/^#define WBUF_TIMEOUT_HARDLIMIT /;"	d
WBUF_TIMEOUT_SOFTLIMIT	fs/ubifs/ubifs.h	/^#define WBUF_TIMEOUT_SOFTLIMIT /;"	d
WB_EDGE	drivers/mtd/nand/bfin_nand.c	/^#define                   WB_EDGE /;"	d	file:
WB_EMPTY	drivers/mtd/nand/bfin_nand.c	/^#define                  WB_EMPTY /;"	d	file:
WB_FULL	drivers/mtd/nand/bfin_nand.c	/^#define                   WB_FULL /;"	d	file:
WB_MODE	include/linux/mtd/st_smi.h	/^#define WB_MODE	/;"	d
WB_MUTEX_1	fs/ubifs/ubifs.h	/^	WB_MUTEX_1 = 0,$/;"	e	enum:__anonf648d0840503
WB_MUTEX_2	fs/ubifs/ubifs.h	/^	WB_MUTEX_2 = 1,$/;"	e	enum:__anonf648d0840503
WB_MUTEX_3	fs/ubifs/ubifs.h	/^	WB_MUTEX_3 = 2,$/;"	e	enum:__anonf648d0840503
WB_OVF	drivers/mtd/nand/bfin_nand.c	/^#define                    WB_OVF /;"	d	file:
WB_SYNC_ALL	include/linux/compat.h	/^	WB_SYNC_ALL,	\/* Wait on every mapping *\/$/;"	e	enum:writeback_sync_modes
WB_SYNC_NONE	include/linux/compat.h	/^	WB_SYNC_NONE,	\/* Don't wait on anything *\/$/;"	e	enum:writeback_sync_modes
WC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WC	/;"	d
WCF	include/linux/mtd/st_smi.h	/^#define WCF	/;"	d
WCHAR_PATH_SEPARATOR	lib/lzma/Types.h	/^#define WCHAR_PATH_SEPARATOR /;"	d
WCIE	include/linux/mtd/st_smi.h	/^#define WCIE	/;"	d
WCLK	arch/x86/cpu/quark/mrc_util.h	/^	WCLK,$/;"	e	enum:__anon78bf36a60203
WCMD	arch/x86/cpu/quark/mrc_util.h	/^	WCMD,$/;"	e	enum:__anon78bf36a60203
WCR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define WCR /;"	d
WCR1	arch/sh/include/asm/cpu_sh7706.h	/^#define	WCR1	/;"	d
WCR1	arch/sh/include/asm/cpu_sh7750.h	/^#define WCR1	/;"	d
WCR1_A	board/ms7750se/lowlevel_init.S	/^WCR1_A:		.long	WCR1$/;"	l
WCR1_A	board/renesas/r2dplus/lowlevel_init.S	/^WCR1_A:		.long	WCR1		\/* WCR1 Address *\/$/;"	l
WCR1_D	board/ms7750se/lowlevel_init.S	/^WCR1_D:		.long	WCR1_D_VALUE	\/* Inter-area or turnaround wait states *\/$/;"	l
WCR1_D	board/renesas/r2dplus/lowlevel_init.S	/^WCR1_D:		.long	0x33343333$/;"	l
WCR1_D_VALUE	board/ms7750se/lowlevel_init.S	/^#define WCR1_D_VALUE	/;"	d	file:
WCR2	arch/sh/include/asm/cpu_sh7706.h	/^#define	WCR2	/;"	d
WCR2	arch/sh/include/asm/cpu_sh7750.h	/^#define WCR2	/;"	d
WCR2_A	board/ms7750se/lowlevel_init.S	/^WCR2_A:		.long	WCR2$/;"	l
WCR2_A	board/renesas/r2dplus/lowlevel_init.S	/^WCR2_A:		.long	WCR2		\/* WCR2 Address *\/$/;"	l
WCR2_D	board/ms7750se/lowlevel_init.S	/^WCR2_D:		.long	WCR2_D_VALUE	\/* Per-area access and burst wait states *\/$/;"	l
WCR2_D	board/renesas/r2dplus/lowlevel_init.S	/^WCR2_D:		.long	0xcff86fbf$/;"	l
WCR2_D_VALUE	board/ms7750se/lowlevel_init.S	/^#define WCR2_D_VALUE	/;"	d	file:
WCR3	arch/sh/include/asm/cpu_sh7750.h	/^#define WCR3	/;"	d
WCR3_A	board/ms7750se/lowlevel_init.S	/^WCR3_A:		.long	WCR3$/;"	l
WCR3_A	board/renesas/r2dplus/lowlevel_init.S	/^WCR3_A:		.long	WCR3		\/* WCR3 Address *\/$/;"	l
WCR3_D	board/ms7750se/lowlevel_init.S	/^WCR3_D:		.long	WCR3_D_VALUE	\/* Address setup and data hold cycles *\/$/;"	l
WCR3_D	board/renesas/r2dplus/lowlevel_init.S	/^WCR3_D:		.long	0x07777707$/;"	l
WCR3_D_VALUE	board/ms7750se/lowlevel_init.S	/^#define WCR3_D_VALUE	/;"	d	file:
WCR_SRS	include/fsl_wdog.h	/^#define WCR_SRS	/;"	d
WCR_WDA	include/fsl_wdog.h	/^#define WCR_WDA /;"	d
WCR_WDBG	include/fsl_wdog.h	/^#define WCR_WDBG	/;"	d
WCR_WDE	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define WCR_WDE /;"	d
WCR_WDE	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define WCR_WDE /;"	d
WCR_WDE	include/fsl_wdog.h	/^#define WCR_WDE	/;"	d
WCR_WDT	include/fsl_wdog.h	/^#define WCR_WDT	/;"	d
WCR_WDZST	include/fsl_wdog.h	/^#define WCR_WDZST	/;"	d
WCR_WT_MSK	include/fsl_wdog.h	/^#define WCR_WT_MSK	/;"	d
WCSA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WCSA(/;"	d
WCSN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WCSN(/;"	d
WCTL	arch/x86/cpu/quark/mrc_util.h	/^	WCTL,$/;"	e	enum:__anon78bf36a60203
WD1_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define WD1_BASE	/;"	d
WD2_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define WD2_BASE	/;"	d
WD3_BASE	arch/arm/include/asm/arch-omap3/omap.h	/^#define WD3_BASE	/;"	d
WDDIS	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDDIS	/;"	d
WDEN	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDEN	/;"	d
WDEV	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDEV	/;"	d
WDEV_GPI	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDEV_GPI	/;"	d
WDEV_NMI	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDEV_NMI	/;"	d
WDEV_NONE	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDEV_NONE	/;"	d
WDEV_RESET	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDEV_RESET	/;"	d
WDFMSERR	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define WDFMSERR	/;"	d
WDIRESET	include/mc13892.h	/^#define WDIRESET	/;"	d
WDIVERR	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define WDIVERR	/;"	d
WDMASK_OFF	board/keymile/kmp204x/qrio.c	/^#define WDMASK_OFF	/;"	d	file:
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define WDOG1_BASE_ADDR	/;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-ls102xa/config.h	/^#define WDOG1_BASE_ADDR	/;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WDOG1_BASE_ADDR	/;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WDOG1_BASE_ADDR	/;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WDOG1_BASE_ADDR	/;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define WDOG1_BASE_ADDR /;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WDOG1_BASE_ADDR /;"	d
WDOG1_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define WDOG1_BASE_ADDR	/;"	d
WDOG1_CNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define WDOG1_CNT /;"	d
WDOG1_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define WDOG1_CTL /;"	d
WDOG1_PATH	board/gateworks/gw_ventana/gw_ventana.c	/^#define WDOG1_PATH	/;"	d	file:
WDOG1_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define WDOG1_STAT /;"	d
WDOG2_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WDOG2_BASE_ADDR	/;"	d
WDOG2_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define WDOG2_BASE_ADDR /;"	d
WDOG2_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WDOG2_BASE_ADDR /;"	d
WDOG2_PATH	board/gateworks/gw_ventana/gw_ventana.c	/^#define WDOG2_PATH	/;"	d	file:
WDOG3_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define WDOG3_BASE_ADDR /;"	d
WDOG3_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WDOG3_BASE_ADDR /;"	d
WDOG4_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WDOG4_BASE_ADDR /;"	d
WDOGA_CNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define WDOGA_CNT /;"	d
WDOGA_CTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define WDOGA_CTL /;"	d
WDOGA_STAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define WDOGA_STAT /;"	d
WDOGB_CNT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define WDOGB_CNT /;"	d
WDOGB_CTL	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define WDOGB_CTL /;"	d
WDOGB_STAT	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define WDOGB_STAT /;"	d
WDOG_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define WDOG_BASE_ADDR	/;"	d
WDOG_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	WDOG_CLK_ROOT = 119,$/;"	e	enum:clk_root_index
WDOG_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_PLL_SYS_MAIN_120M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_PLL_SYS_PFD1_166M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_PLL_SYS_PFD1_166M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_PLL_SYS_PFD2_135M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
WDOG_CLK_ROOT_FROM_REF_1M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WDOG_CLK_ROOT_FROM_REF_1M_CLK	/;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define WDOG_CNT /;"	d
WDOG_CNT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define WDOG_CNT /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define WDOG_CTL /;"	d
WDOG_CTL	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define WDOG_CTL /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define WDOG_STAT /;"	d
WDOG_STAT	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define WDOG_STAT /;"	d
WDQS	arch/x86/cpu/quark/mrc_util.h	/^	WDQS,$/;"	e	enum:__anon78bf36a60203
WDQX	arch/x86/cpu/quark/mrc_util.h	/^	WDQX,$/;"	e	enum:__anon78bf36a60203
WDQ_STEP	arch/x86/cpu/quark/smc.h	/^#define WDQ_STEP	/;"	d
WDRO	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define WDRO	/;"	d
WDRU_BASE_ADDR	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define WDRU_BASE_ADDR /;"	d
WDRU_RST_SYS	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^#define WDRU_RST_SYS	/;"	d
WDSIZE_128	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_128	/;"	d
WDSIZE_16	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_16	/;"	d
WDSIZE_256	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_256	/;"	d
WDSIZE_32	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_32	/;"	d
WDSIZE_64	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_64	/;"	d
WDSIZE_8	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_8	/;"	d
WDSIZE_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WDSIZE_P	/;"	d
WDS_RESET	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDS_RESET	include/dt-bindings/reset/altr,rst-mgr.h	/^#define WDS_RESET	/;"	d
WDT2_BASE	arch/arm/include/asm/arch-omap4/omap.h	/^#define WDT2_BASE	/;"	d
WDT2_BASE	arch/arm/include/asm/arch-omap5/omap.h	/^#define WDT2_BASE	/;"	d
WDT6_SET_MODE	drivers/usb/eth/r8152.h	/^#define WDT6_SET_MODE	/;"	d
WDTBCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	WDTBCNT	/;"	d
WDTBCNT	arch/sh/include/asm/cpu_sh7785.h	/^#define	WDTBCNT	/;"	d
WDTBST	arch/sh/include/asm/cpu_sh7780.h	/^#define	WDTBST	/;"	d
WDTBST	arch/sh/include/asm/cpu_sh7785.h	/^#define	WDTBST	/;"	d
WDTBST_A	board/espt/lowlevel_init.S	/^WDTBST_A:	.long	0xFFCC0008$/;"	l
WDTBST_A	board/renesas/sh7763rdp/lowlevel_init.S	/^WDTBST_A:	.long	0xFFCC0008$/;"	l
WDTBST_D	board/espt/lowlevel_init.S	/^WDTBST_D:	.long	0x55000000$/;"	l
WDTBST_D	board/renesas/sh7763rdp/lowlevel_init.S	/^WDTBST_D:	.long	0x55000000$/;"	l
WDTCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	WDTCNT	/;"	d
WDTCNT	arch/sh/include/asm/cpu_sh7785.h	/^#define	WDTCNT	/;"	d
WDTCSR	arch/sh/include/asm/cpu_sh7780.h	/^#define	WDTCSR	/;"	d
WDTCSR	arch/sh/include/asm/cpu_sh7785.h	/^#define	WDTCSR	/;"	d
WDTCSR_A	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WDTCSR_A:	.long	0xFFCC0004$/;"	l
WDTCSR_A	board/espt/lowlevel_init.S	/^WDTCSR_A:	.long	0xFFCC0004$/;"	l
WDTCSR_A	board/renesas/r0p7734/lowlevel_init.S	/^WDTCSR_A:	.long	0xFFCC0004$/;"	l
WDTCSR_A	board/renesas/sh7763rdp/lowlevel_init.S	/^WDTCSR_A:	.long	0xFFCC0004$/;"	l
WDTCSR_D	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^WDTCSR_D:	.long	0xA5000000$/;"	l
WDTCSR_D	board/espt/lowlevel_init.S	/^WDTCSR_D:	.long	0xA5000000$/;"	l
WDTCSR_D	board/renesas/r0p7734/lowlevel_init.S	/^WDTCSR_D:	.long	0xA5000000$/;"	l
WDTCSR_D	board/renesas/sh7763rdp/lowlevel_init.S	/^WDTCSR_D:	.long	0xA5000000$/;"	l
WDTH_CAP	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define WDTH_CAP	/;"	d
WDTIM_CTRL_COUNT_ENAB	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_CTRL_COUNT_ENAB	/;"	d
WDTIM_CTRL_PAUSE_EN	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_CTRL_PAUSE_EN	/;"	d
WDTIM_CTRL_RESET_COUNT	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_CTRL_RESET_COUNT	/;"	d
WDTIM_MCTRL_MR0_INT	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_MR0_INT	/;"	d
WDTIM_MCTRL_M_RES1	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_M_RES1	/;"	d
WDTIM_MCTRL_M_RES2	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_M_RES2	/;"	d
WDTIM_MCTRL_RESET_COUNT0	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_RESET_COUNT0	/;"	d
WDTIM_MCTRL_RESFRC1	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_RESFRC1	/;"	d
WDTIM_MCTRL_RESFRC2	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_RESFRC2	/;"	d
WDTIM_MCTRL_STOP_COUNT0	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define WDTIM_MCTRL_STOP_COUNT0	/;"	d
WDTST	arch/sh/include/asm/cpu_sh7763.h	/^#define WDTST	/;"	d
WDTST	arch/sh/include/asm/cpu_sh7780.h	/^#define	WDTST	/;"	d
WDTST	arch/sh/include/asm/cpu_sh7785.h	/^#define	WDTST	/;"	d
WDTST_A	board/espt/lowlevel_init.S	/^WDTST_A:	.long	0xFFCC0000$/;"	l
WDTST_A	board/renesas/sh7763rdp/lowlevel_init.S	/^WDTST_A:	.long	0xFFCC0000$/;"	l
WDTST_D	board/espt/lowlevel_init.S	/^WDTST_D:	.long	0x5A000FFF$/;"	l
WDTST_D	board/renesas/sh7763rdp/lowlevel_init.S	/^WDTST_D:	.long	0x5A000FFF$/;"	l
WDT_BASE	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define WDT_BASE	/;"	d
WDT_BASE	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define WDT_BASE	/;"	d
WDT_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define WDT_BASE	/;"	d
WDT_BASE	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define WDT_BASE	/;"	d
WDT_BASE	arch/arm/include/asm/arch-armv7/wdt.h	/^#define WDT_BASE	/;"	d
WDT_BASE	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define WDT_BASE	/;"	d
WDT_BASE	arch/sh/cpu/sh4/watchdog.c	/^#define WDT_BASE	/;"	d	file:
WDT_BASE	arch/x86/cpu/quark/Kconfig	/^config WDT_BASE$/;"	c
WDT_BASE	board/micronas/vct/vcth/reg_wdt.h	/^#define WDT_BASE	/;"	d
WDT_BASE	board/micronas/vct/vctv/reg_wdt.h	/^#define WDT_BASE	/;"	d
WDT_BASE_ADDRESS	arch/x86/include/asm/arch-quark/iomap.h	/^#define WDT_BASE_ADDRESS	/;"	d
WDT_BASE_SIZE	arch/x86/include/asm/arch-quark/iomap.h	/^#define WDT_BASE_SIZE	/;"	d
WDT_CFG_RESET	arch/arm/include/asm/arch-sunxi/watchdog.h	/^#define WDT_CFG_RESET	/;"	d
WDT_CFG_RESET	arch/arm/include/asm/arch/watchdog.h	/^#define WDT_CFG_RESET	/;"	d
WDT_CR	board/micronas/vct/vcth/reg_wdt.h	/^#define WDT_CR(/;"	d
WDT_CR	board/micronas/vct/vctv/reg_wdt.h	/^#define WDT_CR(/;"	d
WDT_CR_OFFS	board/micronas/vct/vcth/reg_wdt.h	/^#define WDT_CR_OFFS	/;"	d
WDT_CR_OFFS	board/micronas/vct/vctv/reg_wdt.h	/^#define WDT_CR_OFFS	/;"	d
WDT_CTRL_KEY	arch/arm/include/asm/arch-sunxi/watchdog.h	/^#define WDT_CTRL_KEY	/;"	d
WDT_CTRL_KEY	arch/arm/include/asm/arch/watchdog.h	/^#define WDT_CTRL_KEY	/;"	d
WDT_CTRL_RESTART	arch/arm/include/asm/arch-sunxi/watchdog.h	/^#define WDT_CTRL_RESTART	/;"	d
WDT_CTRL_RESTART	arch/arm/include/asm/arch/watchdog.h	/^#define WDT_CTRL_RESTART	/;"	d
WDT_EN	arch/arm/include/asm/arch-armv7/wdt.h	/^#define WDT_EN	/;"	d
WDT_EN	board/udoo/udoo.c	/^#define WDT_EN	/;"	d	file:
WDT_ENABLE	arch/sh/cpu/sh4/watchdog.c	/^#define WDT_ENABLE	/;"	d	file:
WDT_FREQ	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h	/^#define WDT_FREQ /;"	d
WDT_FREQ	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h	/^#define WDT_FREQ /;"	d
WDT_FREQ	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h	/^#define WDT_FREQ /;"	d
WDT_FREQ	board/xilinx/zynq/zynq-zed/ps7_init_gpl.h	/^#define WDT_FREQ /;"	d
WDT_FREQ	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h	/^#define WDT_FREQ /;"	d
WDT_HW_TIMEOUT	drivers/watchdog/at91sam9_wdt.c	/^#define WDT_HW_TIMEOUT /;"	d	file:
WDT_HW_TIMEOUT	drivers/watchdog/omap_wdt.c	/^#define WDT_HW_TIMEOUT /;"	d	file:
WDT_MODE_EN	arch/arm/include/asm/arch-sunxi/watchdog.h	/^#define WDT_MODE_EN	/;"	d
WDT_MODE_EN	arch/arm/include/asm/arch/watchdog.h	/^#define WDT_MODE_EN	/;"	d
WDT_MODE_RESET_EN	arch/arm/include/asm/arch-sunxi/watchdog.h	/^#define WDT_MODE_RESET_EN	/;"	d
WDT_MODE_RESET_EN	arch/arm/include/asm/arch/watchdog.h	/^#define WDT_MODE_RESET_EN	/;"	d
WDT_RESET_LOAD	arch/arm/include/asm/arch-armv7/wdt.h	/^#define WDT_RESET_LOAD	/;"	d
WDT_RST_M	arch/sh/cpu/sh4/watchdog.c	/^#define WDT_RST_M	/;"	d	file:
WDT_RST_P	arch/sh/cpu/sh4/watchdog.c	/^#define WDT_RST_P	/;"	d	file:
WDT_TORR	board/micronas/vct/vcth/reg_wdt.h	/^#define WDT_TORR(/;"	d
WDT_TORR	board/micronas/vct/vctv/reg_wdt.h	/^#define WDT_TORR(/;"	d
WDT_TORR_OFFS	board/micronas/vct/vcth/reg_wdt.h	/^#define WDT_TORR_OFFS	/;"	d
WDT_TORR_OFFS	board/micronas/vct/vctv/reg_wdt.h	/^#define WDT_TORR_OFFS	/;"	d
WDT_TRG	board/udoo/udoo.c	/^#define WDT_TRG	/;"	d	file:
WDT_WCLR_PRE	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define WDT_WCLR_PRE	/;"	d
WDT_WCLR_PTV_OFF	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define WDT_WCLR_PTV_OFF	/;"	d
WDT_WD	arch/sh/cpu/sh4/watchdog.c	/^#define WDT_WD	/;"	d	file:
WDT_WWPS_PEND_WCLR	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define WDT_WWPS_PEND_WCLR	/;"	d
WDT_WWPS_PEND_WLDR	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define WDT_WWPS_PEND_WLDR	/;"	d
WDT_WWPS_PEND_WSPR	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define WDT_WWPS_PEND_WSPR	/;"	d
WDT_WWPS_PEND_WTGR	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define WDT_WWPS_PEND_WTGR	/;"	d
WD_CR	arch/nds32/cpu/n1213/ag101/watchdog.S	/^#define WD_CR	/;"	d	file:
WD_ENABLE	arch/nds32/cpu/n1213/ag101/watchdog.S	/^#define WD_ENABLE	/;"	d	file:
WD_UNLOCK1	arch/arm/include/asm/arch-omap3/cpu.h	/^#define WD_UNLOCK1	/;"	d
WD_UNLOCK1	arch/arm/include/asm/arch-omap4/cpu.h	/^#define WD_UNLOCK1	/;"	d
WD_UNLOCK1	arch/arm/include/asm/arch-omap4/omap.h	/^#define WD_UNLOCK1	/;"	d
WD_UNLOCK1	arch/arm/include/asm/arch-omap5/cpu.h	/^#define WD_UNLOCK1	/;"	d
WD_UNLOCK1	arch/arm/include/asm/arch-omap5/omap.h	/^#define WD_UNLOCK1	/;"	d
WD_UNLOCK2	arch/arm/include/asm/arch-omap3/cpu.h	/^#define WD_UNLOCK2	/;"	d
WD_UNLOCK2	arch/arm/include/asm/arch-omap4/cpu.h	/^#define WD_UNLOCK2	/;"	d
WD_UNLOCK2	arch/arm/include/asm/arch-omap4/omap.h	/^#define WD_UNLOCK2	/;"	d
WD_UNLOCK2	arch/arm/include/asm/arch-omap5/cpu.h	/^#define WD_UNLOCK2	/;"	d
WD_UNLOCK2	arch/arm/include/asm/arch-omap5/omap.h	/^#define WD_UNLOCK2	/;"	d
WE	include/linux/mtd/st_smi.h	/^#define WE	/;"	d
WE0_FWE_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	WE0_FWE_MARK,	\/* share with FLCTL *\/$/;"	e	enum:__anona304c1340103	file:
WE0_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,$/;"	e	enum:__anona307879b0103	file:
WE0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,$/;"	e	enum:__anona3077f190103	file:
WE0_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	A2_MARK, WE0_N_MARK, WE1_N_MARK, DACK0_MARK,$/;"	e	enum:__anona307901d0103	file:
WE0__FWE_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	WE0__FWE_MARK, RDWR_FWE_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
WE0x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	WE0x_GMARK,$/;"	e	enum:__anona307945e0103	file:
WE0x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	WE0x_IMARK,$/;"	e	enum:__anona307945e0103	file:
WE1_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	WE1_MARK,$/;"	e	enum:__anona304c1340103	file:
WE1_MARK	arch/arm/mach-rmobile/pfc-r8a7792.c	/^	RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,$/;"	e	enum:__anona307879b0103	file:
WE1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7790.c	/^	WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,$/;"	e	enum:__anona3077f190103	file:
WE1_N_MARK	arch/arm/mach-rmobile/pfc-r8a7794.c	/^	A2_MARK, WE0_N_MARK, WE1_N_MARK, DACK0_MARK,$/;"	e	enum:__anona307901d0103	file:
WE1__MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	WE1__MARK,$/;"	e	enum:__anon991a8e2d0103	file:
WE1x_GMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	WE1x_GMARK,$/;"	e	enum:__anona307945e0103	file:
WE1x_IMARK	arch/arm/mach-rmobile/pfc-r8a7795.c	/^	WE1x_IMARK,$/;"	e	enum:__anona307945e0103	file:
WE2_ICIORD_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	WE2_ICIORD_MARK,	\/* share with PCMCIA *\/$/;"	e	enum:__anona304c1340103	file:
WE3_ICIOWR_MARK	arch/arm/mach-rmobile/pfc-r8a7740.c	/^	WE3_ICIOWR_MARK,	\/* share with PCMCIA *\/$/;"	e	enum:__anona304c1340103	file:
WEA	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WEA(/;"	d
WEAK_PULLDOWN	board/boundary/nitrogen6x/nitrogen6x.c	/^#define WEAK_PULLDOWN	/;"	d	file:
WEAK_PULLDOWN	board/compulab/cm_fx6/cm_fx6.c	/^#define WEAK_PULLDOWN	/;"	d	file:
WEAK_PULLUP	board/boundary/nitrogen6x/nitrogen6x.c	/^#define WEAK_PULLUP	/;"	d	file:
WEAK_PULLUP	board/tbs/tbs2910/tbs2910.c	/^#define WEAK_PULLUP	/;"	d	file:
WEEXTRADELAY	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WEEXTRADELAY /;"	d
WEIGHTOF	lib/bzip2/bzlib_huffman.c	/^#define WEIGHTOF(/;"	d	file:
WEIM_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define WEIM_ARB_BASE_ADDR /;"	d
WEIM_ARB_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WEIM_ARB_BASE_ADDR /;"	d
WEIM_ARB_END_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define WEIM_ARB_END_ADDR /;"	d
WEIM_ARB_END_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WEIM_ARB_END_ADDR /;"	d
WEIM_BASE	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WEIM_BASE	/;"	d
WEIM_BASE_ADDR	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_BASE_ADDR	/;"	d
WEIM_BASE_ADDR	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WEIM_BASE_ADDR	/;"	d
WEIM_BASE_ADDR	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define WEIM_BASE_ADDR /;"	d
WEIM_CSCR_A	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define WEIM_CSCR_A(/;"	d
WEIM_CSCR_L	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define WEIM_CSCR_L(/;"	d
WEIM_CSCR_U	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define WEIM_CSCR_U(/;"	d
WEIM_CTRL_CS0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_CTRL_CS0	/;"	d
WEIM_CTRL_CS1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_CTRL_CS1	/;"	d
WEIM_CTRL_CS2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_CTRL_CS2	/;"	d
WEIM_CTRL_CS3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_CTRL_CS3	/;"	d
WEIM_CTRL_CS4	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_CTRL_CS4	/;"	d
WEIM_CTRL_CS5	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define WEIM_CTRL_CS5	/;"	d
WEIM_ESDCFG0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WEIM_ESDCFG0	/;"	d
WEIM_ESDCFG1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WEIM_ESDCFG1	/;"	d
WEIM_ESDCTL0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WEIM_ESDCTL0	/;"	d
WEIM_ESDCTL1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WEIM_ESDCTL1	/;"	d
WEIM_ESDMISC	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define WEIM_ESDMISC	/;"	d
WEIM_GCR2_MUX16_BYP_GRANT_MASK	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WEIM_GCR2_MUX16_BYP_GRANT_MASK	/;"	d
WEIM_IPS_BASE_ADDR	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define WEIM_IPS_BASE_ADDR /;"	d
WEIM_NOR_BOOT	arch/arm/include/asm/imx-common/boot_mode.h	/^	WEIM_NOR_BOOT,$/;"	e	enum:boot_device
WEIM_NOR_PAD_CTRL	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^#define WEIM_NOR_PAD_CTRL /;"	d	file:
WELL_KNOWN_PORT	net/tftp.c	/^#define WELL_KNOWN_PORT	/;"	d	file:
WEL_BIT	include/linux/mtd/st_smi.h	/^#define WEL_BIT	/;"	d
WEN	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WEN(/;"	d
WEOFFTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WEOFFTIME(/;"	d
WEONTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WEONTIME(/;"	d
WE_2_RE	drivers/mtd/nand/denali.h	/^#define WE_2_RE	/;"	d
WE_2_RE__VALUE	drivers/mtd/nand/denali.h	/^#define     WE_2_RE__VALUE	/;"	d
WF0_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF0_CRC	/;"	d
WF0_E	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF0_E	/;"	d
WF0_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF0_OFF	/;"	d
WF0_T	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF0_T	/;"	d
WF1_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF1_CRC	/;"	d
WF1_E	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF1_E	/;"	d
WF1_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF1_OFF	/;"	d
WF1_T	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF1_T	/;"	d
WF2_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF2_CRC	/;"	d
WF2_E	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF2_E	/;"	d
WF2_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF2_OFF	/;"	d
WF2_T	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF2_T	/;"	d
WF3_CRC	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF3_CRC	/;"	d
WF3_E	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF3_E	/;"	d
WF3_OFF	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF3_OFF	/;"	d
WF3_T	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define	WF3_T	/;"	d
WFCR_MPRXE	drivers/net/ks8851_mll.h	/^#define WFCR_MPRXE	/;"	d
WFCR_WF0E	drivers/net/ks8851_mll.h	/^#define WFCR_WF0E	/;"	d
WFCR_WF1E	drivers/net/ks8851_mll.h	/^#define WFCR_WF1E	/;"	d
WFCR_WF2E	drivers/net/ks8851_mll.h	/^#define WFCR_WF2E	/;"	d
WFCR_WF3E	drivers/net/ks8851_mll.h	/^#define WFCR_WF3E	/;"	d
WFL	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WFL	/;"	d
WH	arch/arm/include/asm/arch-sunxi/display2.h	/^#define WH(/;"	d
WH	arch/arm/include/asm/arch/display2.h	/^#define WH(/;"	d
WHEN	include/sym53c8xx.h	/^#define WHEN(/;"	d
WHITE	board/bf533-stamp/video.h	/^#define WHITE /;"	d
WHITE	test/dm/video.c	/^#define WHITE	/;"	d	file:
WHITE	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
WHITE_GRAY_BALCKBAR_32	arch/arm/mach-exynos/include/mach/dp_info.h	/^	WHITE_GRAY_BALCKBAR_32,$/;"	e	enum:pattern_type
WHITE_GRAY_BALCKBAR_64	arch/arm/mach-exynos/include/mach/dp_info.h	/^	WHITE_GRAY_BALCKBAR_64,$/;"	e	enum:pattern_type
WIDE_BUS_4	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define                WIDE_BUS_4 /;"	d
WIDLE	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define WIDLE	/;"	d
WIDLE_P	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define WIDLE_P	/;"	d
WIDTH	drivers/demo/demo-shape.c	/^#define WIDTH	/;"	d	file:
WIDTH_16BIT	arch/arm/include/asm/arch-omap3/omap.h	/^#define WIDTH_16BIT	/;"	d
WIDTH_8BIT	arch/arm/include/asm/arch-omap3/omap.h	/^#define WIDTH_8BIT	/;"	d
WIFI_EN	board/advantech/dms-ba16/dms-ba16.c	/^#define WIFI_EN	/;"	d	file:
WIFI_EN	board/ge/bx50v3/bx50v3.c	/^#define WIFI_EN	/;"	d	file:
WIFI_EN	board/gumstix/duovero/duovero.c	/^#define WIFI_EN	/;"	d	file:
WIFI_REGEN_GPIO	board/bosch/shc/board.h	/^# define WIFI_REGEN_GPIO /;"	d
WIFI_RST_GPIO	board/bosch/shc/board.h	/^# define WIFI_RST_GPIO /;"	d
WIM_INIT	arch/sparc/cpu/leon2/start.S	/^#define WIM_INIT /;"	d	file:
WIM_INIT	arch/sparc/cpu/leon3/start.S	/^#define WIM_INIT /;"	d	file:
WIN32	include/u-boot/zlib.h	/^#    define WIN32$/;"	d
WIN32_LEAN_AND_MEAN	include/malloc.h	/^#define WIN32_LEAN_AND_MEAN$/;"	d
WINBOND_ABEER	include/w83c553f.h	/^#define WINBOND_ABEER	/;"	d
WINBOND_ATBCR	include/w83c553f.h	/^#define WINBOND_ATBCR	/;"	d
WINBOND_ATSCR	include/w83c553f.h	/^#define WINBOND_ATSCR	/;"	d
WINBOND_BTBAR	include/w83c553f.h	/^#define WINBOND_BTBAR	/;"	d
WINBOND_CDR	include/w83c553f.h	/^#define WINBOND_CDR	/;"	d
WINBOND_CSCR	include/w83c553f.h	/^#define WINBOND_CSCR	/;"	d
WINBOND_DMABEER	include/w83c553f.h	/^#define WINBOND_DMABEER	/;"	d
WINBOND_ENTRY_KEY	drivers/misc/winbond_w83627.c	/^#define WINBOND_ENTRY_KEY	/;"	d	file:
WINBOND_EXIT_KEY	drivers/misc/winbond_w83627.c	/^#define WINBOND_EXIT_KEY	/;"	d	file:
WINBOND_IDEIRCR	include/w83c553f.h	/^#define WINBOND_IDEIRCR	/;"	d
WINBOND_IO_PORT	include/winbond_w83627.h	/^#define WINBOND_IO_PORT	/;"	d
WINBOND_IPADCR	include/w83c553f.h	/^#define WINBOND_IPADCR	/;"	d
WINBOND_IPMHSAR	include/w83c553f.h	/^#define WINBOND_IPMHSAR	/;"	d
WINBOND_IPMHSR	include/w83c553f.h	/^#define WINBOND_IPMHSR	/;"	d
WINBOND_IRADCR	include/w83c553f.h	/^#define WINBOND_IRADCR	/;"	d
WINBOND_IRQBEE0R	include/w83c553f.h	/^#define WINBOND_IRQBEE0R	/;"	d
WINBOND_IRQBEE1R	include/w83c553f.h	/^#define WINBOND_IRQBEE1R	/;"	d
WINBOND_LBCR	include/w83c553f.h	/^#define WINBOND_LBCR	/;"	d
WINBOND_PCICONTR	include/w83c553f.h	/^#define WINBOND_PCICONTR	/;"	d
WINBOND_PCIIRCR	include/w83c553f.h	/^#define WINBOND_PCIIRCR	/;"	d
WINBOND_SGBAR	include/w83c553f.h	/^#define WINBOND_SGBAR	/;"	d
WINBOND_W83627	drivers/misc/Kconfig	/^config WINBOND_W83627$/;"	c	menu:Multifunction device drivers
WINB_MANUFACT	include/flash.h	/^#define WINB_MANUFACT	/;"	d
WINC_FILTER_COUNT	arch/arm/include/asm/arch-tegra/dc.h	/^	WINC_FILTER_COUNT	= 0x10,$/;"	e	enum:dc_winc_filter_p
WINDOND_IDECSR	include/w83c553f.h	/^#define WINDOND_IDECSR	/;"	d
WINDOWS	include/u-boot/zlib.h	/^#  define WINDOWS$/;"	d
WINDOWSIZE	arch/sparc/cpu/leon2/start.S	/^WINDOWSIZE = (16 * 4)$/;"	d
WINDOWSIZE	arch/sparc/cpu/leon3/start.S	/^WINDOWSIZE = (16 * 4)$/;"	d
WINDOW_A_SELECT	arch/arm/include/asm/arch-tegra/dc.h	/^#define WINDOW_A_SELECT	/;"	d
WINDOW_BASE	include/mvebu_mmc.h	/^#define WINDOW_BASE(/;"	d
WINDOW_B_SELECT	arch/arm/include/asm/arch-tegra/dc.h	/^#define WINDOW_B_SELECT	/;"	d
WINDOW_CTRL	include/mvebu_mmc.h	/^#define WINDOW_CTRL(/;"	d
WINDOW_C_SELECT	arch/arm/include/asm/arch-tegra/dc.h	/^#define WINDOW_C_SELECT	/;"	d
WINDOW_D_SELECT	arch/arm/include/asm/arch-tegra/dc.h	/^#define	WINDOW_D_SELECT	/;"	d
WINDOW_FLUSH	arch/sparc/include/asm/srmmu.h	/^#define WINDOW_FLUSH(/;"	d
WINDOW_HEIGTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define WINDOW_HEIGTH_MIN /;"	d
WINDOW_H_SELECT	arch/arm/include/asm/arch-tegra/dc.h	/^#define	WINDOW_H_SELECT	/;"	d
WINDOW_SIZE	drivers/mtd/nand/fsl_elbc_spl.c	/^#define WINDOW_SIZE /;"	d	file:
WINDOW_WIDTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define WINDOW_WIDTH_MIN /;"	d
WIN_A_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_A_ACT_REQ	/;"	d
WIN_A_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_A_UPDATE	/;"	d
WIN_BASE_HIGH	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_BASE_HIGH /;"	d	file:
WIN_BASE_LOW	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_BASE_LOW /;"	d	file:
WIN_BASE_OFF	arch/arm/mach-mvebu/mbus.c	/^#define WIN_BASE_OFF	/;"	d	file:
WIN_B_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_B_ACT_REQ	/;"	d
WIN_B_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_B_UPDATE	/;"	d
WIN_CTRL_ATTR_MASK	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_ATTR_MASK /;"	d	file:
WIN_CTRL_ATTR_SHIFT	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_ATTR_SHIFT /;"	d	file:
WIN_CTRL_ENABLE	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_ENABLE /;"	d	file:
WIN_CTRL_OFF	arch/arm/mach-mvebu/mbus.c	/^#define WIN_CTRL_OFF	/;"	d	file:
WIN_CTRL_SIZE_MASK	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_SIZE_MASK /;"	d	file:
WIN_CTRL_SIZE_SHIFT	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_SIZE_SHIFT /;"	d	file:
WIN_CTRL_TGT_MASK	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_TGT_MASK /;"	d	file:
WIN_CTRL_TGT_SHIFT	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_CTRL_TGT_SHIFT /;"	d	file:
WIN_C_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_C_ACT_REQ	/;"	d
WIN_C_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_C_UPDATE	/;"	d
WIN_D_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_D_ACT_REQ	/;"	d
WIN_D_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_D_UPDATE	/;"	d
WIN_ENABLE	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_ENABLE	/;"	d
WIN_H_ACT_REQ	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_H_ACT_REQ	/;"	d
WIN_H_UPDATE	arch/arm/include/asm/arch-tegra/dc.h	/^#define WIN_H_UPDATE	/;"	d
WIN_INIT	lib/zlib/deflate.h	/^#define WIN_INIT /;"	d
WIN_REMAP_HI_OFF	arch/arm/mach-mvebu/mbus.c	/^#define WIN_REMAP_HI_OFF	/;"	d	file:
WIN_REMAP_LOW	arch/arm/mach-mvebu/mbus.c	/^#define   WIN_REMAP_LOW /;"	d	file:
WIN_REMAP_LO_OFF	arch/arm/mach-mvebu/mbus.c	/^#define WIN_REMAP_LO_OFF	/;"	d	file:
WIP_BIT	include/linux/mtd/st_smi.h	/^#define WIP_BIT	/;"	d
WITH_DROP_FFS	include/nand.h	/^#define WITH_DROP_FFS	/;"	d
WITH_WR_VERIFY	include/nand.h	/^#define WITH_WR_VERIFY	/;"	d
WKCN	arch/arm/include/asm/arch-tegra/usb.h	/^#define WKCN	/;"	d
WKDIS	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define WKDIS	/;"	d
WKDS	arch/arm/include/asm/arch-tegra/usb.h	/^#define WKDS	/;"	d
WKEN	arch/arm/include/asm/arch-omap3/mux.h	/^#define WKEN /;"	d
WKEN	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define WKEN	/;"	d
WKOC	arch/arm/include/asm/arch-tegra/usb.h	/^#define WKOC	/;"	d
WKPU_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define WKPU_BASE_ADDR	/;"	d
WKUP	drivers/usb/host/r8a66597.h	/^#define	WKUP	/;"	d
WKUP_BASE_ADDR	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define WKUP_BASE_ADDR	/;"	d
WKUP_HWINFO	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WKUP_HWINFO	/;"	d
WKUP_REVISION	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WKUP_REVISION	/;"	d
WKUP_RSM	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define WKUP_RSM	/;"	d
WKUP_SYSCONFIG	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define WKUP_SYSCONFIG	/;"	d
WL	drivers/ddr/microchip/ddr2_timing.h	/^#define WL	/;"	d
WL12XX_BT_ENABLE_GP	board/boundary/nitrogen6x/nitrogen6x.c	/^#define WL12XX_BT_ENABLE_GP	/;"	d	file:
WL12XX_WL_ENABLE_GP	board/boundary/nitrogen6x/nitrogen6x.c	/^#define WL12XX_WL_ENABLE_GP	/;"	d	file:
WL12XX_WL_IRQ_GP	board/boundary/nitrogen6x/nitrogen6x.c	/^#define WL12XX_WL_IRQ_GP	/;"	d	file:
WLS	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS	/;"	d
WLS	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define WLS	/;"	d
WLSDIO_CLK	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define WLSDIO_CLK	/;"	d
WLSDIO_CMD	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define WLSDIO_CMD	/;"	d
WLSDIO_DATA0	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define WLSDIO_DATA0	/;"	d
WLSDIO_DATA1	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define WLSDIO_DATA1	/;"	d
WLSDIO_DATA2	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define WLSDIO_DATA2	/;"	d
WLSDIO_DATA3	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define WLSDIO_DATA3	/;"	d
WLS_5	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS_5	/;"	d
WLS_5	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define WLS_5	/;"	d
WLS_6	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS_6	/;"	d
WLS_6	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define WLS_6	/;"	d
WLS_7	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS_7	/;"	d
WLS_7	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define WLS_7	/;"	d
WLS_8	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS_8	/;"	d
WLS_8	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define WLS_8	/;"	d
WLS_P0	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS_P0	/;"	d
WLS_P1	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define WLS_P1	/;"	d
WL_FREE_MAX_DIFF	drivers/mtd/ubi/wl.c	/^#define WL_FREE_MAX_DIFF /;"	d	file:
WL_HI_FREQ_SHIFT	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define WL_HI_FREQ_SHIFT /;"	d
WL_HI_FREQ_STATE	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define WL_HI_FREQ_STATE /;"	d
WL_ITERATION_NUM	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^#define WL_ITERATION_NUM	/;"	d	file:
WL_MAX_FAILURES	drivers/mtd/ubi/wl.c	/^#define WL_MAX_FAILURES /;"	d	file:
WL_MODE_	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	WL_MODE_,$/;"	e	enum:training_modes
WL_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define WL_PHY_REG	/;"	d
WL_RESERVED_PEBS	drivers/mtd/ubi/wl.c	/^#define WL_RESERVED_PEBS /;"	d	file:
WL_SUP_EXPECTED_DATA	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define WL_SUP_EXPECTED_DATA	/;"	d	file:
WL_SUP_READ_DRAM_ENTRY	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^#define WL_SUP_READ_DRAM_ENTRY	/;"	d	file:
WM0	include/linux/mtd/st_smi.h	/^#define WM0	/;"	d
WM1	include/linux/mtd/st_smi.h	/^#define WM1	/;"	d
WM1811	drivers/sound/wm8994.h	/^	WM1811 = 2,$/;"	e	enum:wm8994_type
WM2	include/linux/mtd/st_smi.h	/^#define WM2	/;"	d
WM3	include/linux/mtd/st_smi.h	/^#define WM3	/;"	d
WM8958	drivers/sound/wm8994.h	/^	WM8958 = 1,$/;"	e	enum:wm8994_type
WM8994	drivers/sound/wm8994.h	/^	WM8994 = 0,$/;"	e	enum:wm8994_type
WM8994_ADCL_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_ADCL_ENA	/;"	d
WM8994_ADCR_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_ADCR_ENA	/;"	d
WM8994_AIF1	drivers/sound/wm8994.h	/^	 WM8994_AIF1 = 1,$/;"	e	enum:en_audio_interface
WM8994_AIF1ADC1L_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1ADC1L_ENA	/;"	d
WM8994_AIF1ADC1R_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1ADC1R_ENA	/;"	d
WM8994_AIF1CLK_DIV	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1CLK_DIV /;"	d
WM8994_AIF1CLK_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1CLK_ENA /;"	d
WM8994_AIF1CLK_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1CLK_ENA_MASK /;"	d
WM8994_AIF1CLK_RATE_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1CLK_RATE_MASK /;"	d
WM8994_AIF1CLK_SRC_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1CLK_SRC_MASK /;"	d
WM8994_AIF1DAC1L_TO_DAC1L	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DAC1L_TO_DAC1L	/;"	d
WM8994_AIF1DAC1R_TO_DAC1R	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DAC1R_TO_DAC1R	/;"	d
WM8994_AIF1DACL_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DACL_ENA	/;"	d
WM8994_AIF1DACL_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DACL_ENA_MASK	/;"	d
WM8994_AIF1DACR_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DACR_ENA	/;"	d
WM8994_AIF1DACR_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DACR_ENA_MASK	/;"	d
WM8994_AIF1DSPCLK_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DSPCLK_ENA	/;"	d
WM8994_AIF1DSPCLK_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1DSPCLK_ENA_MASK	/;"	d
WM8994_AIF1_BCLK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_BCLK /;"	d
WM8994_AIF1_BCLK_DIV_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_BCLK_DIV_MASK /;"	d
WM8994_AIF1_BCLK_DIV_SHIFT	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_BCLK_DIV_SHIFT /;"	d
WM8994_AIF1_BCLK_INV	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_BCLK_INV /;"	d
WM8994_AIF1_CLOCKING_1	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_CLOCKING_1 /;"	d
WM8994_AIF1_CLOCKING_2	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_CLOCKING_2 /;"	d
WM8994_AIF1_CONTROL_1	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_CONTROL_1 /;"	d
WM8994_AIF1_CONTROL_2	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_CONTROL_2 /;"	d
WM8994_AIF1_DAC_FILTERS_1	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_DAC_FILTERS_1	/;"	d
WM8994_AIF1_FMT_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_FMT_MASK /;"	d
WM8994_AIF1_LRCLK_INV	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_LRCLK_INV /;"	d
WM8994_AIF1_LRCLK_INV_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_LRCLK_INV_MASK /;"	d
WM8994_AIF1_MASTER_SLAVE	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_MASTER_SLAVE /;"	d
WM8994_AIF1_MONO	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_MONO /;"	d
WM8994_AIF1_MSTR	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_MSTR /;"	d
WM8994_AIF1_MSTR_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_MSTR_MASK /;"	d
WM8994_AIF1_RATE	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_RATE /;"	d
WM8994_AIF1_SR_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_SR_MASK /;"	d
WM8994_AIF1_SR_SHIFT	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_SR_SHIFT /;"	d
WM8994_AIF1_WL_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF1_WL_MASK /;"	d
WM8994_AIF2	drivers/sound/wm8994.h	/^	 WM8994_AIF2,$/;"	e	enum:en_audio_interface
WM8994_AIF2DACL_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACL_ENA /;"	d
WM8994_AIF2DACL_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACL_ENA_MASK /;"	d
WM8994_AIF2DACL_TO_DAC1L	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACL_TO_DAC1L /;"	d
WM8994_AIF2DACL_TO_DAC1L_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACL_TO_DAC1L_MASK /;"	d
WM8994_AIF2DACL_VOL_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACL_VOL_MASK /;"	d
WM8994_AIF2DACR_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACR_ENA /;"	d
WM8994_AIF2DACR_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACR_ENA_MASK /;"	d
WM8994_AIF2DACR_TO_DAC1R	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACR_TO_DAC1R /;"	d
WM8994_AIF2DACR_TO_DAC1R_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACR_TO_DAC1R_MASK /;"	d
WM8994_AIF2DACR_VOL_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DACR_VOL_MASK /;"	d
WM8994_AIF2DAC_DIV_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DAC_DIV_MASK /;"	d
WM8994_AIF2DAC_MUTE_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DAC_MUTE_MASK /;"	d
WM8994_AIF2DAC_VU	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DAC_VU /;"	d
WM8994_AIF2DAC_VU_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DAC_VU_MASK /;"	d
WM8994_AIF2DSPCLK_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DSPCLK_ENA /;"	d
WM8994_AIF2DSPCLK_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2DSPCLK_ENA_MASK /;"	d
WM8994_AIF2_BCLK	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_BCLK /;"	d
WM8994_AIF2_CLOCKING_1	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_CLOCKING_1 /;"	d
WM8994_AIF2_CONTROL_1	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_CONTROL_1 /;"	d
WM8994_AIF2_CONTROL_2	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_CONTROL_2 /;"	d
WM8994_AIF2_DAC_FILTERS_1	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_DAC_FILTERS_1 /;"	d
WM8994_AIF2_DAC_LEFT_VOLUME	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_DAC_LEFT_VOLUME /;"	d
WM8994_AIF2_DAC_RIGHT_VOLUME	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_DAC_RIGHT_VOLUME /;"	d
WM8994_AIF2_MASTER_SLAVE	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_MASTER_SLAVE /;"	d
WM8994_AIF2_RATE	drivers/sound/wm8994_registers.h	/^#define WM8994_AIF2_RATE /;"	d
WM8994_AIF3	drivers/sound/wm8994.h	/^	 WM8994_AIF3$/;"	e	enum:en_audio_interface
WM8994_ANALOGUE_HP_1	drivers/sound/wm8994_registers.h	/^#define WM8994_ANALOGUE_HP_1 /;"	d
WM8994_BIAS_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_BIAS_ENA /;"	d
WM8994_BIAS_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_BIAS_ENA_MASK /;"	d
WM8994_CHARGE_PUMP_1	drivers/sound/wm8994_registers.h	/^#define WM8994_CHARGE_PUMP_1 /;"	d
WM8994_CHIP_REVISION	drivers/sound/wm8994_registers.h	/^#define WM8994_CHIP_REVISION /;"	d
WM8994_CLOCKING_1	drivers/sound/wm8994_registers.h	/^#define WM8994_CLOCKING_1 /;"	d
WM8994_CLOCKING_2	drivers/sound/wm8994_registers.h	/^#define WM8994_CLOCKING_2 /;"	d
WM8994_CP_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_CP_ENA /;"	d
WM8994_CP_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_CP_ENA_MASK /;"	d
WM8994_DAC1L_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1L_ENA /;"	d
WM8994_DAC1L_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1L_ENA_MASK /;"	d
WM8994_DAC1L_MUTE_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1L_MUTE_MASK /;"	d
WM8994_DAC1L_TO_HPOUT1L	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1L_TO_HPOUT1L /;"	d
WM8994_DAC1L_TO_HPOUT1L_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1L_TO_HPOUT1L_MASK /;"	d
WM8994_DAC1L_VOL_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1L_VOL_MASK /;"	d
WM8994_DAC1R_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1R_ENA /;"	d
WM8994_DAC1R_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1R_ENA_MASK /;"	d
WM8994_DAC1R_MUTE_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1R_MUTE_MASK /;"	d
WM8994_DAC1R_TO_HPOUT1R	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1R_TO_HPOUT1R /;"	d
WM8994_DAC1R_TO_HPOUT1R_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1R_TO_HPOUT1R_MASK /;"	d
WM8994_DAC1R_VOL_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1R_VOL_MASK /;"	d
WM8994_DAC1_LEFT_MIXER_ROUTING	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1_LEFT_MIXER_ROUTING /;"	d
WM8994_DAC1_LEFT_VOLUME	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1_LEFT_VOLUME /;"	d
WM8994_DAC1_RIGHT_MIXER_ROUTING	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1_RIGHT_MIXER_ROUTING /;"	d
WM8994_DAC1_RIGHT_VOLUME	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1_RIGHT_VOLUME /;"	d
WM8994_DAC1_VU	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1_VU /;"	d
WM8994_DAC1_VU_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DAC1_VU_MASK /;"	d
WM8994_DCS_ENA_CHAN_0	drivers/sound/wm8994_registers.h	/^#define WM8994_DCS_ENA_CHAN_0 /;"	d
WM8994_DCS_ENA_CHAN_0_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DCS_ENA_CHAN_0_MASK /;"	d
WM8994_DCS_ENA_CHAN_1	drivers/sound/wm8994_registers.h	/^#define WM8994_DCS_ENA_CHAN_1 /;"	d
WM8994_DCS_ENA_CHAN_1_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_DCS_ENA_CHAN_1_MASK /;"	d
WM8994_DC_SERVO_1	drivers/sound/wm8994_registers.h	/^#define WM8994_DC_SERVO_1 /;"	d
WM8994_FLL1	drivers/sound/wm8994.h	/^#define WM8994_FLL1	/;"	d
WM8994_FLL2	drivers/sound/wm8994.h	/^#define WM8994_FLL2	/;"	d
WM8994_FLL_SRC_BCLK	drivers/sound/wm8994.h	/^#define WM8994_FLL_SRC_BCLK	/;"	d
WM8994_FLL_SRC_LRCLK	drivers/sound/wm8994.h	/^#define WM8994_FLL_SRC_LRCLK	/;"	d
WM8994_FLL_SRC_MCLK1	drivers/sound/wm8994.h	/^#define WM8994_FLL_SRC_MCLK1	/;"	d
WM8994_FLL_SRC_MCLK2	drivers/sound/wm8994.h	/^#define WM8994_FLL_SRC_MCLK2	/;"	d
WM8994_GPIO_1	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_1	/;"	d
WM8994_GPIO_3	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_3 /;"	d
WM8994_GPIO_4	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_4 /;"	d
WM8994_GPIO_5	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_5 /;"	d
WM8994_GPIO_DIR_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_DIR_MASK	/;"	d
WM8994_GPIO_DIR_OUTPUT	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_DIR_OUTPUT	/;"	d
WM8994_GPIO_FUNCTION_I2S_CLK	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_FUNCTION_I2S_CLK	/;"	d
WM8994_GPIO_FUNCTION_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_FUNCTION_MASK	/;"	d
WM8994_GPIO_INPUT_DEBOUNCE	drivers/sound/wm8994_registers.h	/^#define WM8994_GPIO_INPUT_DEBOUNCE	/;"	d
WM8994_HPOUT1L_DLY	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_DLY /;"	d
WM8994_HPOUT1L_DLY_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_DLY_MASK /;"	d
WM8994_HPOUT1L_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_ENA /;"	d
WM8994_HPOUT1L_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_ENA_MASK /;"	d
WM8994_HPOUT1L_OUTP	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_OUTP /;"	d
WM8994_HPOUT1L_OUTP_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_OUTP_MASK /;"	d
WM8994_HPOUT1L_RMV_SHORT	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_RMV_SHORT /;"	d
WM8994_HPOUT1L_RMV_SHORT_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1L_RMV_SHORT_MASK /;"	d
WM8994_HPOUT1R_DLY	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_DLY /;"	d
WM8994_HPOUT1R_DLY_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_DLY_MASK /;"	d
WM8994_HPOUT1R_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_ENA /;"	d
WM8994_HPOUT1R_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_ENA_MASK /;"	d
WM8994_HPOUT1R_OUTP	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_OUTP /;"	d
WM8994_HPOUT1R_OUTP_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_OUTP_MASK /;"	d
WM8994_HPOUT1R_RMV_SHORT	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_RMV_SHORT /;"	d
WM8994_HPOUT1R_RMV_SHORT_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_HPOUT1R_RMV_SHORT_MASK /;"	d
WM8994_ID	drivers/sound/wm8994.h	/^#define WM8994_ID	/;"	d
WM8994_IN2L_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_IN2L_ENA	/;"	d
WM8994_IN2R_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_IN2R_ENA	/;"	d
WM8994_LEFT_OUTPUT_VOLUME	drivers/sound/wm8994_registers.h	/^#define WM8994_LEFT_OUTPUT_VOLUME /;"	d
WM8994_MAX_AIF	drivers/sound/wm8994.h	/^#define WM8994_MAX_AIF	/;"	d
WM8994_MAX_INPUT_CLK_FREQ	drivers/sound/wm8994.h	/^#define WM8994_MAX_INPUT_CLK_FREQ	/;"	d
WM8994_MIXINL_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_MIXINL_ENA	/;"	d
WM8994_MIXINR_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_MIXINR_ENA	/;"	d
WM8994_OPCLK_DIV_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_OPCLK_DIV_MASK /;"	d
WM8994_OPCLK_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_OPCLK_ENA /;"	d
WM8994_OUTPUT_MIXER_1	drivers/sound/wm8994_registers.h	/^#define WM8994_OUTPUT_MIXER_1 /;"	d
WM8994_OUTPUT_MIXER_2	drivers/sound/wm8994_registers.h	/^#define WM8994_OUTPUT_MIXER_2 /;"	d
WM8994_POWER_MANAGEMENT_1	drivers/sound/wm8994_registers.h	/^#define WM8994_POWER_MANAGEMENT_1 /;"	d
WM8994_POWER_MANAGEMENT_2	drivers/sound/wm8994_registers.h	/^#define WM8994_POWER_MANAGEMENT_2 /;"	d
WM8994_POWER_MANAGEMENT_4	drivers/sound/wm8994_registers.h	/^#define WM8994_POWER_MANAGEMENT_4	/;"	d
WM8994_POWER_MANAGEMENT_5	drivers/sound/wm8994_registers.h	/^#define WM8994_POWER_MANAGEMENT_5 /;"	d
WM8994_RATE_STATUS	drivers/sound/wm8994_registers.h	/^#define WM8994_RATE_STATUS /;"	d
WM8994_RIGHT_OUTPUT_VOLUME	drivers/sound/wm8994_registers.h	/^#define WM8994_RIGHT_OUTPUT_VOLUME /;"	d
WM8994_SOFTWARE_RESET	drivers/sound/wm8994_registers.h	/^#define WM8994_SOFTWARE_RESET /;"	d
WM8994_SW_RESET	drivers/sound/wm8994_registers.h	/^#define WM8994_SW_RESET /;"	d
WM8994_SYSCLK_FLL1	drivers/sound/wm8994.h	/^#define WM8994_SYSCLK_FLL1	/;"	d
WM8994_SYSCLK_FLL2	drivers/sound/wm8994.h	/^#define WM8994_SYSCLK_FLL2	/;"	d
WM8994_SYSCLK_MCLK1	drivers/sound/wm8994.h	/^#define WM8994_SYSCLK_MCLK1	/;"	d
WM8994_SYSCLK_MCLK2	drivers/sound/wm8994.h	/^#define WM8994_SYSCLK_MCLK2	/;"	d
WM8994_SYSCLK_OPCLK	drivers/sound/wm8994.h	/^#define WM8994_SYSCLK_OPCLK	/;"	d
WM8994_SYSCLK_SRC	drivers/sound/wm8994_registers.h	/^#define WM8994_SYSCLK_SRC /;"	d
WM8994_SYSDSPCLK_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_SYSDSPCLK_ENA /;"	d
WM8994_SYSDSPCLK_ENA_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_SYSDSPCLK_ENA_MASK /;"	d
WM8994_TSHUT_ENA	drivers/sound/wm8994_registers.h	/^#define WM8994_TSHUT_ENA	/;"	d
WM8994_VMID_FORCE	drivers/sound/wm8994.h	/^	WM8994_VMID_FORCE,$/;"	e	enum:wm8994_vmid_mode
WM8994_VMID_NORMAL	drivers/sound/wm8994.h	/^	WM8994_VMID_NORMAL,$/;"	e	enum:wm8994_vmid_mode
WM8994_VMID_SEL_MASK	drivers/sound/wm8994_registers.h	/^#define WM8994_VMID_SEL_MASK /;"	d
WML	include/fsl_esdhc.h	/^#define WML	/;"	d
WML_RD_WML_MASK	include/fsl_esdhc.h	/^#define WML_RD_WML_MASK	/;"	d
WML_RD_WML_MAX	include/fsl_esdhc.h	/^#define WML_RD_WML_MAX	/;"	d
WML_RD_WML_MAX_VAL	include/fsl_esdhc.h	/^#define WML_RD_WML_MAX_VAL	/;"	d
WML_WRITE	include/fsl_esdhc.h	/^#define WML_WRITE	/;"	d
WML_WR_WML_MASK	include/fsl_esdhc.h	/^#define WML_WR_WML_MASK	/;"	d
WML_WR_WML_MAX	include/fsl_esdhc.h	/^#define WML_WR_WML_MAX	/;"	d
WML_WR_WML_MAX_VAL	include/fsl_esdhc.h	/^#define WML_WR_WML_MAX_VAL	/;"	d
WMODE_TOUT	include/linux/mtd/st_smi.h	/^#define WMODE_TOUT	/;"	d
WM_SHIFT	include/linux/mtd/st_smi.h	/^#define WM_SHIFT	/;"	d
WNR	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define WNR	/;"	d
WNR	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WNR	/;"	d
WNR_P	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define WNR_P	/;"	d
WNR_P	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define WNR_P	/;"	d
WOA	include/sym53c8xx.h	/^  #define   WOA /;"	d
WOM	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define WOM	/;"	d
WORD2	arch/arc/lib/memcmp.S	/^#define WORD2 /;"	d	file:
WORDS_PER_SPIN_TABLE_ENTRY	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define WORDS_PER_SPIN_TABLE_ENTRY	/;"	d
WORD_ALIGN	tools/aisimage.c	/^#define WORD_ALIGN(/;"	d	file:
WORD_ALIGN0	tools/aisimage.c	/^#define WORD_ALIGN0	/;"	d	file:
WORD_BH	lib/bzip2/bzlib_blocksort.c	/^#define      WORD_BH(/;"	d	file:
WORD_COPY_FWD	arch/x86/lib/string.c	/^#define WORD_COPY_FWD(/;"	d	file:
WORD_SIZE	include/fsl_validate.h	/^#define WORD_SIZE /;"	d
WORK_RX_MEMORY	drivers/usb/gadget/ether.c	/^#define	WORK_RX_MEMORY	/;"	d	file:
WORST_COMPR_FACTOR	fs/ubifs/ubifs.h	/^#define WORST_COMPR_FACTOR /;"	d
WP	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WP	/;"	d
WP	drivers/rtc/ds1302.c	/^	unsigned char WP:1;		\/* write protect 1=protect 0=unprot *\/$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:1	file:
WPAND	arch/blackfin/lib/kgdb.h	/^#define WPAND	/;"	d
WPDA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPDA0 /;"	d
WPDA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPDA1 /;"	d
WPDACC0_OFFSET	arch/blackfin/lib/kgdb.h	/^#define WPDACC0_OFFSET	/;"	d
WPDACC1_OFFSET	arch/blackfin/lib/kgdb.h	/^#define WPDACC1_OFFSET	/;"	d
WPDACNT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPDACNT0 /;"	d
WPDACNT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPDACNT1 /;"	d
WPDACTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPDACTL /;"	d
WPDAEN0	arch/blackfin/lib/kgdb.h	/^#define WPDAEN0	/;"	d
WPDAEN1	arch/blackfin/lib/kgdb.h	/^#define WPDAEN1	/;"	d
WPDCNTEN0	arch/blackfin/lib/kgdb.h	/^#define WPDCNTEN0	/;"	d
WPDCNTEN1	arch/blackfin/lib/kgdb.h	/^#define WPDCNTEN1	/;"	d
WPDREN01	arch/blackfin/lib/kgdb.h	/^#define WPDREN01	/;"	d
WPDRINV01	arch/blackfin/lib/kgdb.h	/^#define WPDRINV01	/;"	d
WPDSRC0	arch/blackfin/lib/kgdb.h	/^#define WPDSRC0	/;"	d
WPDSRC1	arch/blackfin/lib/kgdb.h	/^#define WPDSRC1	/;"	d
WPIA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIA0 /;"	d
WPIA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIA1 /;"	d
WPIA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIA2 /;"	d
WPIA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIA3 /;"	d
WPIA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIA4 /;"	d
WPIA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIA5 /;"	d
WPIACNT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACNT0 /;"	d
WPIACNT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACNT1 /;"	d
WPIACNT2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACNT2 /;"	d
WPIACNT3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACNT3 /;"	d
WPIACNT4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACNT4 /;"	d
WPIACNT5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACNT5 /;"	d
WPIACTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPIACTL /;"	d
WPIAEN0	arch/blackfin/lib/kgdb.h	/^#define WPIAEN0	/;"	d
WPIAEN1	arch/blackfin/lib/kgdb.h	/^#define WPIAEN1	/;"	d
WPIAEN2	arch/blackfin/lib/kgdb.h	/^#define WPIAEN2	/;"	d
WPIAEN3	arch/blackfin/lib/kgdb.h	/^#define WPIAEN3	/;"	d
WPIAEN4	arch/blackfin/lib/kgdb.h	/^#define WPIAEN4	/;"	d
WPIAEN5	arch/blackfin/lib/kgdb.h	/^#define WPIAEN5	/;"	d
WPICNTEN0	arch/blackfin/lib/kgdb.h	/^#define WPICNTEN0	/;"	d
WPICNTEN1	arch/blackfin/lib/kgdb.h	/^#define WPICNTEN1	/;"	d
WPICNTEN2	arch/blackfin/lib/kgdb.h	/^#define WPICNTEN2	/;"	d
WPICNTEN3	arch/blackfin/lib/kgdb.h	/^#define WPICNTEN3	/;"	d
WPICNTEN4	arch/blackfin/lib/kgdb.h	/^#define WPICNTEN4	/;"	d
WPICNTEN5	arch/blackfin/lib/kgdb.h	/^#define WPICNTEN5	/;"	d
WPIREN01	arch/blackfin/lib/kgdb.h	/^#define WPIREN01	/;"	d
WPIREN23	arch/blackfin/lib/kgdb.h	/^#define WPIREN23	/;"	d
WPIREN45	arch/blackfin/lib/kgdb.h	/^#define WPIREN45	/;"	d
WPIRINV01	arch/blackfin/lib/kgdb.h	/^#define WPIRINV01	/;"	d
WPIRINV23	arch/blackfin/lib/kgdb.h	/^#define WPIRINV23	/;"	d
WPIRINV45	arch/blackfin/lib/kgdb.h	/^#define WPIRINV45	/;"	d
WPPWR	arch/blackfin/lib/kgdb.h	/^#define WPPWR	/;"	d
WPP_ACTIVEHIGH	arch/arm/include/asm/omap_mmc.h	/^#define WPP_ACTIVEHIGH	/;"	d
WPSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define WPSTAT /;"	d
WP_2_17	arch/powerpc/include/asm/processor.h	/^#define     WP_2_17	/;"	d
WP_2_21	arch/powerpc/include/asm/processor.h	/^#define     WP_2_21	/;"	d
WP_2_25	arch/powerpc/include/asm/processor.h	/^#define     WP_2_25	/;"	d
WP_2_29	arch/powerpc/include/asm/processor.h	/^#define     WP_2_29	/;"	d
WR2PRE	arch/arm/mach-sunxi/dram_sun9i.c	/^#define WR2PRE /;"	d	file:
WR2RD	arch/arm/mach-sunxi/dram_sun9i.c	/^#define WR2RD /;"	d	file:
WRACCESSTIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WRACCESSTIME(/;"	d
WRAP	drivers/net/mvneta.c	/^#define WRAP	/;"	d	file:
WRAP	drivers/net/mvpp2.c	/^#define WRAP	/;"	d	file:
WRAPBURST	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WRAPBURST /;"	d
WRAP_LIBGCC_CALL	arch/x86/lib/gcc.c	/^#define WRAP_LIBGCC_CALL(/;"	d	file:
WRCLK_CLK_ROOT	arch/arm/include/asm/arch-mx7/clock.h	/^	WRCLK_CLK_ROOT = 122,$/;"	e	enum:clk_root_index
WRCLK_CLK_ROOT_FROM_OSC_24M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_OSC_24M_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_DRAM_MAIN_533M_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_40M_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_ENET_MAIN_500M_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_SYS_MAIN_240M_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_SYS_PFD2_270M_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_SYS_PFD7_CLK	/;"	d
WRCLK_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define WRCLK_CLK_ROOT_FROM_PLL_USB_MAIN_480M_CLK	/;"	d
WRCYCLETIME	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WRCYCLETIME(/;"	d
WRC_CHIP	arch/powerpc/include/asm/processor.h	/^#define     WRC_CHIP	/;"	d
WRC_CORE	arch/powerpc/include/asm/processor.h	/^#define     WRC_CORE	/;"	d
WRC_NONE	arch/powerpc/include/asm/processor.h	/^#define     WRC_NONE	/;"	d
WRC_SYSTEM	arch/powerpc/include/asm/processor.h	/^#define     WRC_SYSTEM	/;"	d
WRDATAONADMUXBUS	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WRDATAONADMUXBUS(/;"	d
WRG_LED	board/keymile/common/common.h	/^#define WRG_LED	/;"	d
WRG_RESET	board/keymile/common/common.h	/^#define WRG_RESET	/;"	d
WRIE	include/sym53c8xx.h	/^	#define   WRIE /;"	d
WRIOP1_DPMAC1	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC1 = 1,$/;"	e	enum:wriop_port
WRIOP1_DPMAC10	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC10,$/;"	e	enum:wriop_port
WRIOP1_DPMAC11	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC11,$/;"	e	enum:wriop_port
WRIOP1_DPMAC12	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC12,$/;"	e	enum:wriop_port
WRIOP1_DPMAC13	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC13,$/;"	e	enum:wriop_port
WRIOP1_DPMAC14	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC14,$/;"	e	enum:wriop_port
WRIOP1_DPMAC15	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC15,$/;"	e	enum:wriop_port
WRIOP1_DPMAC16	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC16,$/;"	e	enum:wriop_port
WRIOP1_DPMAC17	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC17,$/;"	e	enum:wriop_port
WRIOP1_DPMAC18	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC18,$/;"	e	enum:wriop_port
WRIOP1_DPMAC19	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC19,$/;"	e	enum:wriop_port
WRIOP1_DPMAC2	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC2,$/;"	e	enum:wriop_port
WRIOP1_DPMAC20	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC20,$/;"	e	enum:wriop_port
WRIOP1_DPMAC21	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC21,$/;"	e	enum:wriop_port
WRIOP1_DPMAC22	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC22,$/;"	e	enum:wriop_port
WRIOP1_DPMAC23	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC23,$/;"	e	enum:wriop_port
WRIOP1_DPMAC24	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC24,$/;"	e	enum:wriop_port
WRIOP1_DPMAC3	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC3,$/;"	e	enum:wriop_port
WRIOP1_DPMAC4	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC4,$/;"	e	enum:wriop_port
WRIOP1_DPMAC5	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC5,$/;"	e	enum:wriop_port
WRIOP1_DPMAC6	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC6,$/;"	e	enum:wriop_port
WRIOP1_DPMAC7	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC7,$/;"	e	enum:wriop_port
WRIOP1_DPMAC8	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC8,$/;"	e	enum:wriop_port
WRIOP1_DPMAC9	include/fsl-mc/ldpaa_wriop.h	/^	WRIOP1_DPMAC9,$/;"	e	enum:wriop_port
WRITE	board/bf533-ezkit/flash-defines.h	/^#define WRITE	/;"	d
WRITE	drivers/block/sata_dwc.h	/^#define WRITE /;"	d
WRITEDATA1	board/bf533-ezkit/flash-defines.h	/^#define WRITEDATA1	/;"	d
WRITEDATA2	board/bf533-ezkit/flash-defines.h	/^#define WRITEDATA2	/;"	d
WRITEDATA3	board/bf533-ezkit/flash-defines.h	/^#define WRITEDATA3	/;"	d
WRITEDATA4	board/bf533-ezkit/flash-defines.h	/^#define WRITEDATA4	/;"	d
WRITEDATA5	board/bf533-ezkit/flash-defines.h	/^#define WRITEDATA5	/;"	d
WRITEDATA6	board/bf533-ezkit/flash-defines.h	/^#define WRITEDATA6	/;"	d
WRITEMULTIPLE	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WRITEMULTIPLE /;"	d
WRITESEQ1	board/bf533-ezkit/flash-defines.h	/^#define WRITESEQ1	/;"	d
WRITESEQ2	board/bf533-ezkit/flash-defines.h	/^#define WRITESEQ2	/;"	d
WRITESEQ3	board/bf533-ezkit/flash-defines.h	/^#define WRITESEQ3	/;"	d
WRITESEQ4	board/bf533-ezkit/flash-defines.h	/^#define WRITESEQ4	/;"	d
WRITESEQ5	board/bf533-ezkit/flash-defines.h	/^#define WRITESEQ5	/;"	d
WRITESEQ6	board/bf533-ezkit/flash-defines.h	/^#define WRITESEQ6	/;"	d
WRITETYPE	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define WRITETYPE /;"	d
WRITE_CENTRALIZATION_PHY_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define WRITE_CENTRALIZATION_PHY_REG	/;"	d
WRITE_CMD	drivers/block/dwc_ahsata.h	/^#define WRITE_CMD	/;"	d
WRITE_CMD	drivers/block/fsl_sata.h	/^#define WRITE_CMD	/;"	d
WRITE_CMD	drivers/block/ftide020.c	/^#define WRITE_CMD(/;"	d	file:
WRITE_CMD	drivers/block/sata_mv.c	/^#define WRITE_CMD	/;"	d	file:
WRITE_CMD	drivers/block/sata_sil.h	/^#define WRITE_CMD	/;"	d
WRITE_COMPLETE	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	WRITE_COMPLETE	/;"	d
WRITE_DATA	drivers/block/ftide020.c	/^#define WRITE_DATA(/;"	d	file:
WRITE_DATA_CMD	drivers/block/ftide020.h	/^#define WRITE_DATA_CMD	/;"	d
WRITE_ENABLE	include/linux/mtd/st_smi.h	/^#define WRITE_ENABLE	/;"	d
WRITE_ENABLE_2_READ_ENABLE	drivers/mtd/nand/denali.h	/^#define WRITE_ENABLE_2_READ_ENABLE /;"	d
WRITE_ENDIANNESS_ABCD	board/micronas/vct/ebi.h	/^#define WRITE_ENDIANNESS_ABCD	/;"	d
WRITE_ENDIANNESS_BADC	board/micronas/vct/ebi.h	/^#define WRITE_ENDIANNESS_BADC	/;"	d
WRITE_ENDIANNESS_CDAB	board/micronas/vct/ebi.h	/^#define WRITE_ENDIANNESS_CDAB	/;"	d
WRITE_ENDIANNESS_DCBA	board/micronas/vct/ebi.h	/^#define WRITE_ENDIANNESS_DCBA	/;"	d
WRITE_FIFO	drivers/block/ftide020.h	/^#define WRITE_FIFO	/;"	d
WRITE_LEVELING	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	WRITE_LEVELING,$/;"	e	enum:auto_tune_stage
WRITE_LEVELING_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define WRITE_LEVELING_MASK_BIT	/;"	d
WRITE_LEVELING_PHY_OFFSET	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define WRITE_LEVELING_PHY_OFFSET	/;"	d
WRITE_LEVELING_STATIC	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	WRITE_LEVELING_STATIC,$/;"	e	enum:hws_static_config_type
WRITE_LEVELING_SUPP	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	WRITE_LEVELING_SUPP,$/;"	e	enum:auto_tune_stage
WRITE_LEVELING_SUPP_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define WRITE_LEVELING_SUPP_MASK_BIT	/;"	d
WRITE_LEVELING_SUPP_TF	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	WRITE_LEVELING_SUPP_TF,$/;"	e	enum:auto_tune_stage
WRITE_LEVELING_SUPP_TF_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define WRITE_LEVELING_SUPP_TF_MASK_BIT	/;"	d
WRITE_LEVELING_TF	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	WRITE_LEVELING_TF,$/;"	e	enum:auto_tune_stage
WRITE_LEVELING_TF_MASK_BIT	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define WRITE_LEVELING_TF_MASK_BIT	/;"	d
WRITE_MAX	tools/ifdtool.h	/^#define WRITE_MAX	/;"	d
WRITE_MODE	drivers/mtd/nand/denali.h	/^#define WRITE_MODE	/;"	d
WRITE_MODE__VALUE	drivers/mtd/nand/denali.h	/^#define     WRITE_MODE__VALUE	/;"	d
WRITE_MUX_ACTIVE	arch/arm/include/asm/arch-tegra/dc.h	/^#define  WRITE_MUX_ACTIVE	/;"	d
WRITE_MUX_ASSEMBLY	arch/arm/include/asm/arch-tegra/dc.h	/^#define  WRITE_MUX_ASSEMBLY	/;"	d
WRITE_ONCE	include/linux/compiler.h	/^#define WRITE_ONCE(/;"	d
WRITE_OP	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	WRITE_OP,$/;"	e	enum:mv_op
WRITE_PAUSE	arch/sparc/cpu/leon2/start.S	/^#define WRITE_PAUSE /;"	d	file:
WRITE_PAUSE	arch/sparc/cpu/leon3/start.S	/^#define WRITE_PAUSE /;"	d	file:
WRITE_PENDING	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define	WRITE_PENDING	/;"	d
WRITE_PHY	drivers/net/ax88180.h	/^  #define WRITE_PHY	/;"	d
WRITE_POSTAMBLE_US	drivers/misc/mxc_ocotp.c	/^#define WRITE_POSTAMBLE_US	/;"	d	file:
WRITE_PROTECT	drivers/mtd/nand/denali.h	/^#define WRITE_PROTECT	/;"	d
WRITE_PROTECT__FLAG	drivers/mtd/nand/denali.h	/^#define     WRITE_PROTECT__FLAG	/;"	d
WRITE_RECOV_2	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define WRITE_RECOV_2	/;"	d	file:
WRITE_RECOV_3	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define WRITE_RECOV_3	/;"	d	file:
WRITE_RECOV_4	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define WRITE_RECOV_4	/;"	d	file:
WRITE_RECOV_5	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define WRITE_RECOV_5	/;"	d	file:
WRITE_RECOV_6	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^#define WRITE_RECOV_6	/;"	d	file:
WRITE_REG_CMD	drivers/block/ftide020.h	/^#define WRITE_REG_CMD	/;"	d
WRITE_TRAIN	arch/x86/cpu/quark/hte.h	/^	WRITE_TRAIN$/;"	e	enum:__anone289d2a80203
WRITE_TXBUF	drivers/net/ax88180.h	/^static inline void WRITE_TXBUF (struct eth_device *dev, unsigned long data)$/;"	f	typeref:typename:void
WRITE_TXBUF	drivers/net/ax88180.h	/^static inline void WRITE_TXBUF (struct eth_device *dev, unsigned short data)$/;"	f	typeref:typename:void
WRITE_XBAR_PORT1	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define  WRITE_XBAR_PORT1	/;"	d
WRL_BOOT	board/keymile/common/common.h	/^#define WRL_BOOT	/;"	d
WRM_OPCODE	board/freescale/common/zm7300.c	/^#define WRM_OPCODE /;"	d	file:
WROD	drivers/video/ipu_regs.h	/^#define WROD(/;"	d
WRONG_NUMBER_OF_UNITS	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^#define WRONG_NUMBER_OF_UNITS	/;"	d	file:
WRP_HDR_SIZE	include/fsl_sec.h	/^#define WRP_HDR_SIZE	/;"	d
WRP_OPCODE	board/freescale/common/zm7300.c	/^#define WRP_OPCODE /;"	d	file:
WRSTCSR_PREFIX	arch/sh/include/asm/cpu_sh7752.h	/^#define WRSTCSR_PREFIX	/;"	d
WRSTCSR_PREFIX	arch/sh/include/asm/cpu_sh7753.h	/^#define WRSTCSR_PREFIX	/;"	d
WRSTCSR_PREFIX	arch/sh/include/asm/cpu_sh7757.h	/^#define WRSTCSR_PREFIX	/;"	d
WRSTCSR_R	arch/sh/include/asm/cpu_sh7752.h	/^#define WRSTCSR_R	/;"	d
WRSTCSR_R	arch/sh/include/asm/cpu_sh7753.h	/^#define WRSTCSR_R	/;"	d
WRSTCSR_R	arch/sh/include/asm/cpu_sh7757.h	/^#define WRSTCSR_R	/;"	d
WRSTCSR_W	arch/sh/include/asm/cpu_sh7752.h	/^#define WRSTCSR_W	/;"	d
WRSTCSR_W	arch/sh/include/asm/cpu_sh7753.h	/^#define WRSTCSR_W	/;"	d
WRSTCSR_W	arch/sh/include/asm/cpu_sh7757.h	/^#define WRSTCSR_W	/;"	d
WRSTCSR_WOVF_PREFIX	arch/sh/include/asm/cpu_sh7752.h	/^#define WRSTCSR_WOVF_PREFIX	/;"	d
WRSTCSR_WOVF_PREFIX	arch/sh/include/asm/cpu_sh7753.h	/^#define WRSTCSR_WOVF_PREFIX	/;"	d
WRSTCSR_WOVF_PREFIX	arch/sh/include/asm/cpu_sh7757.h	/^#define WRSTCSR_WOVF_PREFIX	/;"	d
WRS_CHIP	arch/powerpc/include/asm/processor.h	/^#define     WRS_CHIP	/;"	d
WRS_CORE	arch/powerpc/include/asm/processor.h	/^#define     WRS_CORE	/;"	d
WRS_NONE	arch/powerpc/include/asm/processor.h	/^#define     WRS_NONE	/;"	d
WRS_SYSTEM	arch/powerpc/include/asm/processor.h	/^#define     WRS_SYSTEM	/;"	d
WRU4	board/tqc/tqma6/Kconfig	/^config WRU4$/;"	c	choice:choice3e84a7cc0304
WRU4_USB_H1_PWR	board/tqc/tqma6/tqma6_wru4.c	/^#define WRU4_USB_H1_PWR	/;"	d	file:
WRU4_USB_OTG_PWR	board/tqc/tqma6/tqma6_wru4.c	/^#define WRU4_USB_OTG_PWR	/;"	d	file:
WR_ACCESS_ADDR	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define WR_ACCESS_ADDR	/;"	d	file:
WR_ACCESS_ADDR	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define WR_ACCESS_ADDR	/;"	d	file:
WR_ACCESS_OFFSET	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^#define WR_ACCESS_OFFSET	/;"	d	file:
WR_ACCESS_OFFSET	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^#define WR_ACCESS_OFFSET	/;"	d	file:
WR_ACCESS_PASSWORD	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^#define WR_ACCESS_PASSWORD	/;"	d	file:
WR_ACCESS_PASSWORD	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^#define WR_ACCESS_PASSWORD	/;"	d	file:
WR_DATA_DELAY_MASK	include/fsl_ddr_sdram.h	/^#define WR_DATA_DELAY_MASK	/;"	d
WR_DATA_DELAY_SHIFT	include/fsl_ddr_sdram.h	/^#define WR_DATA_DELAY_SHIFT	/;"	d
WR_DLY	drivers/mtd/nand/bfin_nand.c	/^#define                    WR_DLY /;"	d	file:
WR_DONE	drivers/mtd/nand/bfin_nand.c	/^#define                   WR_DONE /;"	d	file:
WR_DQS	board/ti/ti816x/evm.c	/^#define WR_DQS	/;"	d	file:
WR_LEVELING_DQS_PATTERN_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define WR_LEVELING_DQS_PATTERN_REG	/;"	d
WR_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define WR_MASK /;"	d
WR_QPP	drivers/mtd/spi/sf_internal.h	/^#define WR_QPP	/;"	d
WR_RH_PORTSTAT	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define WR_RH_PORTSTAT(/;"	d	file:
WR_RH_PORTSTAT	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define WR_RH_PORTSTAT(/;"	d	file:
WR_RH_PORTSTAT	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define WR_RH_PORTSTAT(/;"	d	file:
WR_RH_PORTSTAT	drivers/usb/host/ohci-hcd.c	/^#define WR_RH_PORTSTAT(/;"	d	file:
WR_RH_PORTSTAT	drivers/usb/host/ohci-s3c24xx.c	/^#define WR_RH_PORTSTAT(/;"	d	file:
WR_RH_STAT	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define WR_RH_STAT(/;"	d	file:
WR_RH_STAT	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define WR_RH_STAT(/;"	d	file:
WR_RH_STAT	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define WR_RH_STAT(/;"	d	file:
WR_RH_STAT	drivers/usb/host/ohci-hcd.c	/^#define WR_RH_STAT(/;"	d	file:
WR_RH_STAT	drivers/usb/host/ohci-s3c24xx.c	/^#define WR_RH_STAT(/;"	d	file:
WRes	lib/lzma/Types.h	/^typedef DWORD WRes;$/;"	t	typeref:typename:DWORD
WRes	lib/lzma/Types.h	/^typedef int WRes;$/;"	t	typeref:typename:int
WSI_TIMEOUT	drivers/video/da8xx-fb.c	/^#define WSI_TIMEOUT	/;"	d	file:
WSR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define WSR /;"	d
WSR	include/sym53c8xx.h	/^	#define   WSR /;"	d
WSRA	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define WSRA /;"	d
WSRB	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define WSRB /;"	d
WSR_UNLOCK1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define WSR_UNLOCK1	/;"	d
WSR_UNLOCK2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define WSR_UNLOCK2	/;"	d
WSS	include/sym53c8xx.h	/^	#define   WSS /;"	d
WSTR	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define WSTR /;"	d
WSTRING_PATH_SEPARATOR	lib/lzma/Types.h	/^#define WSTRING_PATH_SEPARATOR /;"	d
WT	arch/sh/include/asm/cpu_sh7722.h	/^#define WT /;"	d
WTCNT	arch/sh/include/asm/cpu_sh7203.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7264.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7706.h	/^#define	WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7710.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7723.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7724.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7750.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7752.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7753.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7757.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7763.h	/^#define WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7780.h	/^#define	WTCNT	/;"	d
WTCNT	arch/sh/include/asm/cpu_sh7785.h	/^#define	WTCNT	/;"	d
WTCNT_A	board/mpr2/lowlevel_init.S	/^WTCNT_A:	.long	0xA415FF84$/;"	l
WTCNT_A	board/ms7720se/lowlevel_init.S	/^WTCNT_A:	.long	0xA415FF84$/;"	l
WTCNT_A	board/renesas/rsk7203/lowlevel_init.S	/^WTCNT_A:	.long 0xFFFE0002$/;"	l
WTCNT_A	board/renesas/rsk7264/lowlevel_init.S	/^WTCNT_A:	.long 0xFFFE0002$/;"	l
WTCNT_A	board/renesas/rsk7269/lowlevel_init.S	/^WTCNT_A:	.long 0xFFFE0002$/;"	l
WTCNT_D	board/mpr2/lowlevel_init.S	/^WTCNT_D:	.word	0x5A00		\/* start counting at zero *\/$/;"	l
WTCNT_D	board/ms7720se/lowlevel_init.S	/^WTCNT_D:	.word	0x5A00$/;"	l
WTCNT_D	board/renesas/rsk7203/lowlevel_init.S	/^WTCNT_D:	.word 0x5A84$/;"	l
WTCNT_D	board/renesas/rsk7264/lowlevel_init.S	/^WTCNT_D:	.word 0x0000$/;"	l
WTCNT_D	board/renesas/rsk7269/lowlevel_init.S	/^WTCNT_D:	.word 0x5A00$/;"	l
WTCON_CLK	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_CLK(/;"	d
WTCON_CLK	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_CLK(/;"	d
WTCON_CLKSEL_OFFSET	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_CLKSEL_OFFSET	/;"	d
WTCON_CLKSEL_OFFSET	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_CLKSEL_OFFSET	/;"	d
WTCON_CLK_128	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_CLK_128	/;"	d
WTCON_CLK_128	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_CLK_128	/;"	d
WTCON_CLK_16	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_CLK_16	/;"	d
WTCON_CLK_16	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_CLK_16	/;"	d
WTCON_CLK_32	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_CLK_32	/;"	d
WTCON_CLK_32	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_CLK_32	/;"	d
WTCON_CLK_64	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_CLK_64	/;"	d
WTCON_CLK_64	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_CLK_64	/;"	d
WTCON_EN	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_EN	/;"	d
WTCON_EN	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_EN	/;"	d
WTCON_EN_OFFSET	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_EN_OFFSET	/;"	d
WTCON_EN_OFFSET	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_EN_OFFSET	/;"	d
WTCON_INT	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_INT	/;"	d
WTCON_INT	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_INT	/;"	d
WTCON_INTEN_OFFSET	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_INTEN_OFFSET	/;"	d
WTCON_INTEN_OFFSET	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_INTEN_OFFSET	/;"	d
WTCON_PRESCALER	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_PRESCALER(/;"	d
WTCON_PRESCALER	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_PRESCALER(/;"	d
WTCON_PRE_OFFSET	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_PRE_OFFSET	/;"	d
WTCON_PRE_OFFSET	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_PRE_OFFSET	/;"	d
WTCON_RESET	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_RESET	/;"	d
WTCON_RESET	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_RESET	/;"	d
WTCON_RESET_OFFSET	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define WTCON_RESET_OFFSET	/;"	d
WTCON_RESET_OFFSET	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define WTCON_RESET_OFFSET	/;"	d
WTCSR	arch/sh/include/asm/cpu_sh7203.h	/^#define WTCSR	/;"	d
WTCSR	arch/sh/include/asm/cpu_sh7264.h	/^#define WTCSR	/;"	d
WTCSR	arch/sh/include/asm/cpu_sh7706.h	/^#define	WTCSR	/;"	d
WTCSR	arch/sh/include/asm/cpu_sh7710.h	/^#define WTCSR	/;"	d
WTCSR	arch/sh/include/asm/cpu_sh7750.h	/^#define WTCSR	/;"	d
WTCSR0	arch/sh/include/asm/cpu_sh7752.h	/^#define WTCSR0	/;"	d
WTCSR0	arch/sh/include/asm/cpu_sh7753.h	/^#define WTCSR0	/;"	d
WTCSR0	arch/sh/include/asm/cpu_sh7757.h	/^#define WTCSR0	/;"	d
WTCSR_A	board/mpr2/lowlevel_init.S	/^WTCSR_A:	.long	0xA415FF86$/;"	l
WTCSR_A	board/ms7720se/lowlevel_init.S	/^WTCSR_A:	.long	0xA415FF86$/;"	l
WTCSR_A	board/renesas/rsk7203/lowlevel_init.S	/^WTCSR_A:	.long 0xFFFE0000$/;"	l
WTCSR_A	board/renesas/rsk7264/lowlevel_init.S	/^WTCSR_A:	.long 0xFFFE0000$/;"	l
WTCSR_A	board/renesas/rsk7269/lowlevel_init.S	/^WTCSR_A:	.long 0xFFFE0000$/;"	l
WTCSR_D	board/mpr2/lowlevel_init.S	/^WTCSR_D:	.word	0xA507		\/* divide by 4096 *\/$/;"	l
WTCSR_D	board/ms7720se/lowlevel_init.S	/^WTCSR_D:	.word	0xA506$/;"	l
WTCSR_D	board/renesas/rsk7269/lowlevel_init.S	/^WTCSR_D:	.word 0xA518$/;"	l
WTCSR_D0	board/renesas/rsk7203/lowlevel_init.S	/^WTCSR_D0:	.word 0xA518$/;"	l
WTCSR_D0	board/renesas/rsk7264/lowlevel_init.S	/^WTCSR_D0:	.word 0x0000$/;"	l
WTCSR_D1	board/renesas/rsk7203/lowlevel_init.S	/^WTCSR_D1:	.word 0xA51D$/;"	l
WTCSR_D1	board/renesas/rsk7264/lowlevel_init.S	/^WTCSR_D1:	.word 0x0000$/;"	l
WTCSR_PREFIX	arch/sh/include/asm/cpu_sh7752.h	/^#define WTCSR_PREFIX	/;"	d
WTCSR_PREFIX	arch/sh/include/asm/cpu_sh7753.h	/^#define WTCSR_PREFIX	/;"	d
WTCSR_PREFIX	arch/sh/include/asm/cpu_sh7757.h	/^#define WTCSR_PREFIX	/;"	d
WTEST	board/amcc/makalu/cmd_pll.c	/^	WTEST,$/;"	e	enum:__anonc3f6b6150103	file:
WTM_WCR_DOZE	arch/m68k/include/asm/m5235.h	/^#define WTM_WCR_DOZE	/;"	d
WTM_WCR_DOZE	arch/m68k/include/asm/m5329.h	/^#define WTM_WCR_DOZE	/;"	d
WTM_WCR_DOZE	arch/m68k/include/asm/m5445x.h	/^#define WTM_WCR_DOZE	/;"	d
WTM_WCR_EN	arch/m68k/include/asm/m5235.h	/^#define WTM_WCR_EN	/;"	d
WTM_WCR_EN	arch/m68k/include/asm/m5329.h	/^#define WTM_WCR_EN	/;"	d
WTM_WCR_EN	arch/m68k/include/asm/m5445x.h	/^#define WTM_WCR_EN	/;"	d
WTM_WCR_HALTED	arch/m68k/include/asm/m5235.h	/^#define WTM_WCR_HALTED	/;"	d
WTM_WCR_HALTED	arch/m68k/include/asm/m5329.h	/^#define WTM_WCR_HALTED	/;"	d
WTM_WCR_HALTED	arch/m68k/include/asm/m5445x.h	/^#define WTM_WCR_HALTED	/;"	d
WTM_WCR_WAIT	arch/m68k/include/asm/m5235.h	/^#define WTM_WCR_WAIT	/;"	d
WTM_WCR_WAIT	arch/m68k/include/asm/m5329.h	/^#define WTM_WCR_WAIT	/;"	d
WTM_WCR_WAIT	arch/m68k/include/asm/m5445x.h	/^#define WTM_WCR_WAIT	/;"	d
WTOUT	drivers/mmc/mmc_spi.c	/^#define WTOUT /;"	d	file:
WUCSR	drivers/net/smc911x.h	/^#define WUCSR	/;"	d
WUCSR_GUE	drivers/net/smc911x.h	/^#define WUCSR_GUE	/;"	d
WUCSR_MPEN	drivers/net/smc911x.h	/^#define WUCSR_MPEN	/;"	d
WUCSR_MPR	drivers/net/smc911x.h	/^#define WUCSR_MPR	/;"	d
WUCSR_WAKE_EN	drivers/net/smc911x.h	/^#define WUCSR_WAKE_EN	/;"	d
WUCSR_WUFR	drivers/net/smc911x.h	/^#define WUCSR_WUFR	/;"	d
WUFF	drivers/net/smc911x.h	/^#define WUFF	/;"	d
WUPCR	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define WUPCR	/;"	d
WU_INT	include/usb/ehci-ci.h	/^#define WU_INT	/;"	d
WU_INT_EN	include/usb/ehci-ci.h	/^#define WU_INT_EN	/;"	d
WVGA	drivers/video/da8xx-fb.h	/^	WVGA$/;"	e	enum:panel_type
WWSC	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define WWSC(/;"	d
W_DP_216	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_216:		.word DP_OP_216$/;"	l
W_DP_400	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_400:               .word DP_OP_400$/;"	l
W_DP_455	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_455:               .word DP_OP_455$/;"	l
W_DP_665	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_665:		.word DP_OP_665$/;"	l
W_DP_800	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_800:		.word DP_OP_800$/;"	l
W_DP_864	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_864:		.word DP_OP_864$/;"	l
W_DP_MFD	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^#define W_DP_MFD	/;"	d	file:
W_DP_MFN	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^#define W_DP_MFN	/;"	d	file:
W_DP_MFN_800_DIT	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^W_DP_MFN_800_DIT:	.word DP_MFN_800_DIT$/;"	l
W_DP_OP	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^#define W_DP_OP	/;"	d	file:
W_OK	fs/yaffs2/yportenv.h	/^#define W_OK	/;"	d
W_TYPE_SIZE	arch/arc/lib/libgcc2.h	/^#define W_TYPE_SIZE /;"	d
W_TYPE_SIZE	arch/nios2/lib/libgcc.c	/^#define W_TYPE_SIZE /;"	d	file:
W_TYPE_SIZE	arch/nios2/lib/longlong.h	/^#define W_TYPE_SIZE	/;"	d
WaitForXfer	drivers/i2c/s3c24x0_i2c.c	/^static int WaitForXfer(struct s3c24x0_i2c *i2c)$/;"	f	typeref:typename:int	file:
WaitLoop	arch/arm/mach-davinci/lowlevel_init.S	/^WaitLoop:$/;"	l
WaitPPL2Loop	arch/arm/mach-davinci/lowlevel_init.S	/^WaitPPL2Loop:$/;"	l
WakeUpCapabilities	drivers/usb/gadget/ndis.h	/^	struct NDIS_PM_WAKE_UP_CAPABILITIES	WakeUpCapabilities;$/;"	m	struct:NDIS_PNP_CAPABILITIES	typeref:struct:NDIS_PM_WAKE_UP_CAPABILITIES
Warning	tools/gdb/error.c	/^Warning(char *fmt, ...)$/;"	f	typeref:typename:void
Warning	tools/patman/tout.py	/^def Warning(msg):$/;"	f
Watchdog	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Watchdog;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Widen	tools/dtoc/fdt.py	/^    def Widen(self, newprop):$/;"	m	class:PropBase
Win32VersionValue	include/pe.h	/^	uint32_t Win32VersionValue;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER	typeref:typename:uint32_t
Win32VersionValue	include/pe.h	/^	uint32_t Win32VersionValue;$/;"	m	struct:_IMAGE_OPTIONAL_HEADER64	typeref:typename:uint32_t
Word	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^typedef Word32		Word ;$/;"	t	typeref:typename:Word32
Word	include/SA-1100.h	/^typedef Word32		Word ;$/;"	t	typeref:typename:Word32
Word16	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^typedef unsigned short	Word16 ;$/;"	t	typeref:typename:unsigned short
Word16	include/SA-1100.h	/^typedef unsigned short	Word16 ;$/;"	t	typeref:typename:unsigned short
Word32	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^typedef unsigned int	Word32 ;$/;"	t	typeref:typename:unsigned int
Word32	include/SA-1100.h	/^typedef unsigned int	Word32 ;$/;"	t	typeref:typename:unsigned int
Write	lib/lzma/Types.h	/^  size_t (*Write)(void *p, const void *buf, size_t size);$/;"	m	struct:__anonf2a2f1b90408	typeref:typename:size_t (*)(void * p,const void * buf,size_t size)
Write	lib/lzma/Types.h	/^  void (*Write)(void *p, Byte b);$/;"	m	struct:__anonf2a2f1b90208	typeref:typename:void (*)(void * p,Byte b)
WriteDOC	include/linux/mtd/doc2000.h	/^#define WriteDOC(/;"	d
WriteDOC_	include/linux/mtd/doc2000.h	/^#define WriteDOC_(/;"	d
WriteHex	tools/img2srec.c	/^static char* WriteHex(char* pa, uint8_t value, uint16_t* pCheckSum)$/;"	f	typeref:typename:char *	file:
Write_Protection_1	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Write_Protection_1;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Write_Protection_2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int Write_Protection_2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
Writing tests	test/py/README.md	/^## Writing tests$/;"	s	chapter:U-Boot pytest suite
Wtype	arch/arc/lib/libgcc2.h	/^#define Wtype	/;"	d
Wtype	arch/nios2/lib/libgcc.c	/^typedef long Wtype;$/;"	t	typeref:typename:long	file:
X1205_ALM0_BASE	drivers/rtc/x1205.c	/^#define X1205_ALM0_BASE	/;"	d	file:
X1205_CCR_BASE	drivers/rtc/x1205.c	/^#define X1205_CCR_BASE	/;"	d	file:
X1205_DTR_DTR0	drivers/rtc/x1205.c	/^#define X1205_DTR_DTR0	/;"	d	file:
X1205_DTR_DTR1	drivers/rtc/x1205.c	/^#define X1205_DTR_DTR1	/;"	d	file:
X1205_DTR_DTR2	drivers/rtc/x1205.c	/^#define X1205_DTR_DTR2	/;"	d	file:
X1205_HR_MIL	drivers/rtc/x1205.c	/^#define X1205_HR_MIL	/;"	d	file:
X1205_REG_0	drivers/rtc/x1205.c	/^#define X1205_REG_0	/;"	d	file:
X1205_REG_ATR	drivers/rtc/x1205.c	/^#define X1205_REG_ATR	/;"	d	file:
X1205_REG_DT	drivers/rtc/x1205.c	/^#define X1205_REG_DT	/;"	d	file:
X1205_REG_DTA0	drivers/rtc/x1205.c	/^#define X1205_REG_DTA0	/;"	d	file:
X1205_REG_DTA1	drivers/rtc/x1205.c	/^#define X1205_REG_DTA1	/;"	d	file:
X1205_REG_DTR	drivers/rtc/x1205.c	/^#define X1205_REG_DTR	/;"	d	file:
X1205_REG_DW	drivers/rtc/x1205.c	/^#define X1205_REG_DW	/;"	d	file:
X1205_REG_DWA0	drivers/rtc/x1205.c	/^#define X1205_REG_DWA0	/;"	d	file:
X1205_REG_DWA1	drivers/rtc/x1205.c	/^#define X1205_REG_DWA1	/;"	d	file:
X1205_REG_HR	drivers/rtc/x1205.c	/^#define X1205_REG_HR	/;"	d	file:
X1205_REG_HRA0	drivers/rtc/x1205.c	/^#define X1205_REG_HRA0	/;"	d	file:
X1205_REG_HRA1	drivers/rtc/x1205.c	/^#define X1205_REG_HRA1	/;"	d	file:
X1205_REG_INT	drivers/rtc/x1205.c	/^#define X1205_REG_INT	/;"	d	file:
X1205_REG_MN	drivers/rtc/x1205.c	/^#define X1205_REG_MN	/;"	d	file:
X1205_REG_MNA0	drivers/rtc/x1205.c	/^#define X1205_REG_MNA0	/;"	d	file:
X1205_REG_MNA1	drivers/rtc/x1205.c	/^#define X1205_REG_MNA1	/;"	d	file:
X1205_REG_MO	drivers/rtc/x1205.c	/^#define X1205_REG_MO	/;"	d	file:
X1205_REG_MOA0	drivers/rtc/x1205.c	/^#define X1205_REG_MOA0	/;"	d	file:
X1205_REG_MOA1	drivers/rtc/x1205.c	/^#define X1205_REG_MOA1	/;"	d	file:
X1205_REG_SC	drivers/rtc/x1205.c	/^#define X1205_REG_SC	/;"	d	file:
X1205_REG_SCA0	drivers/rtc/x1205.c	/^#define X1205_REG_SCA0	/;"	d	file:
X1205_REG_SCA1	drivers/rtc/x1205.c	/^#define X1205_REG_SCA1	/;"	d	file:
X1205_REG_SR	drivers/rtc/x1205.c	/^#define X1205_REG_SR	/;"	d	file:
X1205_REG_Y2K	drivers/rtc/x1205.c	/^#define X1205_REG_Y2K	/;"	d	file:
X1205_REG_Y2K0	drivers/rtc/x1205.c	/^#define X1205_REG_Y2K0	/;"	d	file:
X1205_REG_Y2K1	drivers/rtc/x1205.c	/^#define X1205_REG_Y2K1	/;"	d	file:
X1205_REG_YR	drivers/rtc/x1205.c	/^#define X1205_REG_YR	/;"	d	file:
X1205_REG_YRA0	drivers/rtc/x1205.c	/^#define X1205_REG_YRA0	/;"	d	file:
X1205_REG_YRA1	drivers/rtc/x1205.c	/^#define X1205_REG_YRA1	/;"	d	file:
X1205_SR_RTCF	drivers/rtc/x1205.c	/^#define X1205_SR_RTCF	/;"	d	file:
X1205_SR_RWEL	drivers/rtc/x1205.c	/^#define X1205_SR_RWEL	/;"	d	file:
X1205_SR_WEL	drivers/rtc/x1205.c	/^#define X1205_SR_WEL	/;"	d	file:
X16	arch/x86/include/asm/arch-quark/mrc.h	/^	X16,	\/* DRAM width & Channel Width *\/$/;"	e	enum:__anon4be506e00103
X32	arch/x86/include/asm/arch-quark/mrc.h	/^	X32	\/* Channel Width *\/$/;"	e	enum:__anon4be506e00103
X60BAR	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define X60BAR	/;"	d
X8	arch/x86/include/asm/arch-quark/mrc.h	/^	X8,	\/* DRAM width *\/$/;"	e	enum:__anon4be506e00103
X86	arch/Kconfig	/^config X86$/;"	c	choice:choice07312ef30104
X86API	drivers/bios_emulator/include/x86emu.h	/^#define X86API$/;"	d
X86APIP	drivers/bios_emulator/include/x86emu.h	/^	void (X86APIP outb) (X86EMU_pioAddr addr, u8 val);$/;"	m	struct:__anon27a78dcd0108	typeref:typename:void (outb)(X86EMU_pioAddr addr,u8 val)
X86APIP	drivers/bios_emulator/include/x86emu.h	/^	void (X86APIP outl) (X86EMU_pioAddr addr, u32 val);$/;"	m	struct:__anon27a78dcd0108	typeref:typename:void (outl)(X86EMU_pioAddr addr,u32 val)
X86APIP	drivers/bios_emulator/include/x86emu.h	/^	void (X86APIP outw) (X86EMU_pioAddr addr, u16 val);$/;"	m	struct:__anon27a78dcd0108	typeref:typename:void (outw)(X86EMU_pioAddr addr,u16 val)
X86APIP	drivers/bios_emulator/include/x86emu.h	/^	void (X86APIP wrb) (u32 addr, u8 val);$/;"	m	struct:__anon27a78dcd0208	typeref:typename:void (wrb)(u32 addr,u8 val)
X86APIP	drivers/bios_emulator/include/x86emu.h	/^	void (X86APIP wrl) (u32 addr, u32 val);$/;"	m	struct:__anon27a78dcd0208	typeref:typename:void (wrl)(u32 addr,u32 val)
X86APIP	drivers/bios_emulator/include/x86emu.h	/^	void (X86APIP wrw) (u32 addr, u16 val);$/;"	m	struct:__anon27a78dcd0208	typeref:typename:void (wrw)(u32 addr,u16 val)
X86APIP	drivers/bios_emulator/include/x86emu.h	/^#define X86APIP /;"	d
X86APIP	drivers/bios_emulator/x86emu/sys.c	/^void (X86APIP sys_outb) (X86EMU_pioAddr addr, u8 val) = p_outb;$/;"	v	typeref:typename:void (sys_outb)(X86EMU_pioAddr addr,u8 val)
X86APIP	drivers/bios_emulator/x86emu/sys.c	/^void (X86APIP sys_outl) (X86EMU_pioAddr addr, u32 val) = p_outl;$/;"	v	typeref:typename:void (sys_outl)(X86EMU_pioAddr addr,u32 val)
X86APIP	drivers/bios_emulator/x86emu/sys.c	/^void (X86APIP sys_outw) (X86EMU_pioAddr addr, u16 val) = p_outw;$/;"	v	typeref:typename:void (sys_outw)(X86EMU_pioAddr addr,u16 val)
X86APIP	drivers/bios_emulator/x86emu/sys.c	/^void (X86APIP sys_wrb) (u32 addr, u8 val) = wrb;$/;"	v	typeref:typename:void (sys_wrb)(u32 addr,u8 val)
X86APIP	drivers/bios_emulator/x86emu/sys.c	/^void (X86APIP sys_wrl) (u32 addr, u32 val) = wrl;$/;"	v	typeref:typename:void (sys_wrl)(u32 addr,u32 val)
X86APIP	drivers/bios_emulator/x86emu/sys.c	/^void (X86APIP sys_wrw) (u32 addr, u16 val) = wrw;$/;"	v	typeref:typename:void (sys_wrw)(u32 addr,u16 val)
X86DIR	drivers/bios_emulator/Makefile	/^X86DIR  = x86emu$/;"	m
X86EMU_UNUSED	drivers/bios_emulator/include/x86emu/x86emui.h	/^#define X86EMU_UNUSED(/;"	d
X86EMU_dump_memory	drivers/bios_emulator/x86emu/debug.c	/^void X86EMU_dump_memory(u16 seg, u16 off, u32 amt)$/;"	f	typeref:typename:void
X86EMU_exec	drivers/bios_emulator/x86emu/decode.c	/^void X86EMU_exec(void)$/;"	f	typeref:typename:void
X86EMU_halt_sys	drivers/bios_emulator/x86emu/decode.c	/^void X86EMU_halt_sys(void)$/;"	f	typeref:typename:void
X86EMU_intrFuncs	drivers/bios_emulator/include/x86emu.h	/^typedef void (X86APIP X86EMU_intrFuncs) (int num);$/;"	t	typeref:typename:void (X86APIP)(int num)
X86EMU_memFuncs	drivers/bios_emulator/include/x86emu.h	/^} X86EMU_memFuncs;$/;"	t	typeref:struct:__anon27a78dcd0208
X86EMU_pioAddr	drivers/bios_emulator/include/x86emu.h	/^typedef u16 X86EMU_pioAddr;$/;"	t	typeref:typename:u16
X86EMU_pioFuncs	drivers/bios_emulator/include/x86emu.h	/^} X86EMU_pioFuncs;$/;"	t	typeref:struct:__anon27a78dcd0108
X86EMU_prepareForInt	drivers/bios_emulator/x86emu/sys.c	/^void X86EMU_prepareForInt(int num)$/;"	f	typeref:typename:void
X86EMU_regs	drivers/bios_emulator/include/x86emu/regs.h	/^} X86EMU_regs;$/;"	t	typeref:struct:__anon39451e6d0808
X86EMU_setupIntrFunc	drivers/bios_emulator/x86emu/sys.c	/^void X86EMU_setupIntrFunc(int intnum, X86EMU_intrFuncs func)$/;"	f	typeref:typename:void
X86EMU_setupIntrFuncs	drivers/bios_emulator/x86emu/sys.c	/^void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[])$/;"	f	typeref:typename:void
X86EMU_setupMemFuncs	drivers/bios_emulator/x86emu/sys.c	/^void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs)$/;"	f	typeref:typename:void
X86EMU_setupPioFuncs	drivers/bios_emulator/x86emu/sys.c	/^void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs)$/;"	f	typeref:typename:void
X86EMU_sysEnv	drivers/bios_emulator/include/x86emu/regs.h	/^} X86EMU_sysEnv;$/;"	t	typeref:struct:__anon39451e6d0908
X86EMU_trace_off	drivers/bios_emulator/x86emu/debug.c	/^int X86EMU_trace_off(void)$/;"	f	typeref:typename:int
X86EMU_trace_on	drivers/bios_emulator/x86emu/debug.c	/^int X86EMU_trace_on(void)$/;"	f	typeref:typename:int
X86EMU_trace_regs	drivers/bios_emulator/x86emu/debug.c	/^void X86EMU_trace_regs(void)$/;"	f	typeref:typename:void
X86EMU_trace_xregs	drivers/bios_emulator/x86emu/debug.c	/^void X86EMU_trace_xregs(void)$/;"	f	typeref:typename:void
X86_CR0_AM	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_AM	/;"	d
X86_CR0_CD	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_CD	/;"	d
X86_CR0_EM	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_EM	/;"	d
X86_CR0_ET	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_ET	/;"	d
X86_CR0_MP	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_MP	/;"	d
X86_CR0_NE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_NE	/;"	d
X86_CR0_NW	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_NW	/;"	d
X86_CR0_PE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_PE	/;"	d
X86_CR0_PG	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_PG	/;"	d
X86_CR0_TS	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_TS	/;"	d
X86_CR0_WP	arch/x86/include/asm/processor-flags.h	/^#define X86_CR0_WP	/;"	d
X86_CR3_PCD	arch/x86/include/asm/processor-flags.h	/^#define X86_CR3_PCD	/;"	d
X86_CR3_PWT	arch/x86/include/asm/processor-flags.h	/^#define X86_CR3_PWT	/;"	d
X86_CR4_DE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_DE	/;"	d
X86_CR4_MCE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_MCE	/;"	d
X86_CR4_OSFXSR	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_OSFXSR	/;"	d
X86_CR4_OSXMMEXCPT	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_OSXMMEXCPT /;"	d
X86_CR4_OSXSAVE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_OSXSAVE /;"	d
X86_CR4_PAE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_PAE	/;"	d
X86_CR4_PCE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_PCE	/;"	d
X86_CR4_PGE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_PGE	/;"	d
X86_CR4_PSE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_PSE	/;"	d
X86_CR4_PVI	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_PVI	/;"	d
X86_CR4_TSD	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_TSD	/;"	d
X86_CR4_VME	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_VME	/;"	d
X86_CR4_VMXE	arch/x86/include/asm/processor-flags.h	/^#define X86_CR4_VMXE	/;"	d
X86_CR8_TPR	arch/x86/include/asm/processor-flags.h	/^#define X86_CR8_TPR	/;"	d
X86_EFLAGS_AC	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_AC	/;"	d
X86_EFLAGS_AF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_AF	/;"	d
X86_EFLAGS_CF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_CF	/;"	d
X86_EFLAGS_DF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_DF	/;"	d
X86_EFLAGS_ID	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_ID	/;"	d
X86_EFLAGS_IF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_IF	/;"	d
X86_EFLAGS_IOPL	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_IOPL	/;"	d
X86_EFLAGS_NT	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_NT	/;"	d
X86_EFLAGS_OF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_OF	/;"	d
X86_EFLAGS_PF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_PF	/;"	d
X86_EFLAGS_RF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_RF	/;"	d
X86_EFLAGS_SF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_SF	/;"	d
X86_EFLAGS_TF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_TF	/;"	d
X86_EFLAGS_VIF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_VIF	/;"	d
X86_EFLAGS_VIP	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_VIP	/;"	d
X86_EFLAGS_VM	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_VM	/;"	d
X86_EFLAGS_ZF	arch/x86/include/asm/processor-flags.h	/^#define X86_EFLAGS_ZF	/;"	d
X86_GDT_ENTRY_16BIT_CS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_16BIT_CS	/;"	d
X86_GDT_ENTRY_16BIT_DS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_16BIT_DS	/;"	d
X86_GDT_ENTRY_16BIT_FLAT_CS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_16BIT_FLAT_CS	/;"	d
X86_GDT_ENTRY_16BIT_FLAT_DS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_16BIT_FLAT_DS	/;"	d
X86_GDT_ENTRY_32BIT_CS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_32BIT_CS	/;"	d
X86_GDT_ENTRY_32BIT_DS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_32BIT_DS	/;"	d
X86_GDT_ENTRY_32BIT_FS	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_32BIT_FS	/;"	d
X86_GDT_ENTRY_NULL	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_NULL	/;"	d
X86_GDT_ENTRY_SIZE	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_SIZE	/;"	d
X86_GDT_ENTRY_UNUSED	arch/x86/include/asm/processor.h	/^#define X86_GDT_ENTRY_UNUSED	/;"	d
X86_GDT_NUM_ENTRIES	arch/x86/include/asm/processor.h	/^#define X86_GDT_NUM_ENTRIES	/;"	d
X86_GDT_SIZE	arch/x86/include/asm/processor.h	/^#define X86_GDT_SIZE	/;"	d
X86_IOC_RDMSR_REGS	arch/x86/include/asm/msr.h	/^#define X86_IOC_RDMSR_REGS	/;"	d
X86_IOC_WRMSR_REGS	arch/x86/include/asm/msr.h	/^#define X86_IOC_WRMSR_REGS	/;"	d
X86_NONE	arch/x86/include/asm/cpu.h	/^	X86_NONE,$/;"	e	enum:__anonc0d388680303
X86_NR_SUBARCHS	arch/x86/include/asm/bootparam.h	/^	X86_NR_SUBARCHS,$/;"	e	enum:__anonb10cbac50103
X86_RAMTEST	arch/x86/Kconfig	/^config X86_RAMTEST$/;"	c	menu:x86 architecture
X86_RESET_VECTOR	arch/x86/Kconfig	/^config X86_RESET_VECTOR$/;"	c	menu:x86 architecture
X86_SUBARCH_LGUEST	arch/x86/include/asm/bootparam.h	/^	X86_SUBARCH_LGUEST,$/;"	e	enum:__anonb10cbac50103
X86_SUBARCH_MRST	arch/x86/include/asm/bootparam.h	/^	X86_SUBARCH_MRST,$/;"	e	enum:__anonb10cbac50103
X86_SUBARCH_PC	arch/x86/include/asm/bootparam.h	/^	X86_SUBARCH_PC = 0,$/;"	e	enum:__anonb10cbac50103
X86_SUBARCH_XEN	arch/x86/include/asm/bootparam.h	/^	X86_SUBARCH_XEN,$/;"	e	enum:__anonb10cbac50103
X86_SYSCON_ME	arch/x86/include/asm/cpu.h	/^	X86_SYSCON_ME,		\/* Intel Management Engine *\/$/;"	e	enum:__anonc0d388680303
X86_SYSCON_PINCONF	arch/x86/include/asm/cpu.h	/^	X86_SYSCON_PINCONF,	\/* Intel x86 pin configuration *\/$/;"	e	enum:__anonc0d388680303
X86_TSC_TIMER	drivers/timer/Kconfig	/^config X86_TSC_TIMER$/;"	c	menu:Timer Support
X86_VENDOR_AMD	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_AMD,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_ANY	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_ANY = 0xfe,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_CENTAUR	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_CENTAUR,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_CYRIX	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_CYRIX,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_INTEL	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_INTEL,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_INVALID	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_INVALID = 0,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_NEXGEN	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_NEXGEN,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_NSC	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_NSC,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_RISE	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_RISE,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_SIS	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_SIS,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_TRANSMETA	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_TRANSMETA,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_UMC	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_UMC,$/;"	e	enum:__anonc0d388680103
X86_VENDOR_UNKNOWN	arch/x86/include/asm/cpu.h	/^	X86_VENDOR_UNKNOWN = 0xff$/;"	e	enum:__anonc0d388680103
X86_VM_MASK	arch/x86/include/asm/processor-flags.h	/^#define X86_VM_MASK	/;"	d
XAE_EMMC_LINKSPD_10	drivers/net/xilinx_axi_emac.c	/^#define XAE_EMMC_LINKSPD_10	/;"	d	file:
XAE_EMMC_LINKSPD_100	drivers/net/xilinx_axi_emac.c	/^#define XAE_EMMC_LINKSPD_100	/;"	d	file:
XAE_EMMC_LINKSPD_1000	drivers/net/xilinx_axi_emac.c	/^#define XAE_EMMC_LINKSPD_1000	/;"	d	file:
XAE_EMMC_LINKSPEED_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_EMMC_LINKSPEED_MASK	/;"	d	file:
XAE_INT_MGTRDY_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_INT_MGTRDY_MASK	/;"	d	file:
XAE_INT_RXRJECT_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_INT_RXRJECT_MASK	/;"	d	file:
XAE_MDIO_DIV_DFT	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_DIV_DFT	/;"	d	file:
XAE_MDIO_MCR_INITIATE_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_INITIATE_MASK	/;"	d	file:
XAE_MDIO_MCR_OP_READ_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_OP_READ_MASK	/;"	d	file:
XAE_MDIO_MCR_OP_WRITE_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_OP_WRITE_MASK	/;"	d	file:
XAE_MDIO_MCR_PHYAD_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_PHYAD_MASK	/;"	d	file:
XAE_MDIO_MCR_PHYAD_SHIFT	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_PHYAD_SHIFT	/;"	d	file:
XAE_MDIO_MCR_READY_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_READY_MASK	/;"	d	file:
XAE_MDIO_MCR_REGAD_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_REGAD_MASK	/;"	d	file:
XAE_MDIO_MCR_REGAD_SHIFT	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MCR_REGAD_SHIFT	/;"	d	file:
XAE_MDIO_MC_MDIOEN_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_MDIO_MC_MDIOEN_MASK	/;"	d	file:
XAE_PHY_TYPE_1000BASE_X	drivers/net/phy/xilinx_phy.c	/^#define XAE_PHY_TYPE_1000BASE_X	/;"	d	file:
XAE_PHY_TYPE_GMII	drivers/net/phy/xilinx_phy.c	/^#define XAE_PHY_TYPE_GMII	/;"	d	file:
XAE_PHY_TYPE_MII	drivers/net/phy/xilinx_phy.c	/^#define XAE_PHY_TYPE_MII	/;"	d	file:
XAE_PHY_TYPE_RGMII_1_3	drivers/net/phy/xilinx_phy.c	/^#define XAE_PHY_TYPE_RGMII_1_3	/;"	d	file:
XAE_PHY_TYPE_RGMII_2_0	drivers/net/phy/xilinx_phy.c	/^#define XAE_PHY_TYPE_RGMII_2_0	/;"	d	file:
XAE_PHY_TYPE_SGMII	drivers/net/phy/xilinx_phy.c	/^#define XAE_PHY_TYPE_SGMII	/;"	d	file:
XAE_RCW1_RX_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_RCW1_RX_MASK	/;"	d	file:
XAE_TC_TX_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_TC_TX_MASK	/;"	d	file:
XAE_UAW1_UNICASTADDR_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAE_UAW1_UNICASTADDR_MASK	/;"	d	file:
XARB_CFG_AT	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_CFG_AT	/;"	d
XARB_CFG_BA	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_CFG_BA	/;"	d
XARB_CFG_DT	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_CFG_DT	/;"	d
XARB_CFG_PLDIS	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_CFG_PLDIS	/;"	d
XARB_CFG_PM	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_CFG_PM(/;"	d
XARB_CFG_SP	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_CFG_SP(/;"	d
XARB_IMR_ATE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_ATE	/;"	d
XARB_IMR_BAE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_BAE	/;"	d
XARB_IMR_DTE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_DTE	/;"	d
XARB_IMR_ECWE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_ECWE	/;"	d
XARB_IMR_MME	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_MME	/;"	d
XARB_IMR_SEAE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_SEAE	/;"	d
XARB_IMR_TTAE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_TTAE	/;"	d
XARB_IMR_TTME	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_TTME	/;"	d
XARB_IMR_TTRE	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_IMR_TTRE	/;"	d
XARB_PRIEN_M0	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_PRIEN_M0	/;"	d
XARB_PRIEN_M2	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_PRIEN_M2	/;"	d
XARB_PRIEN_M3	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_PRIEN_M3	/;"	d
XARB_PRI_M0P	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_PRI_M0P(/;"	d
XARB_PRI_M2P	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_PRI_M2P(/;"	d
XARB_PRI_M3P	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_PRI_M3P(/;"	d
XARB_SIGCAP_TBST	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SIGCAP_TBST	/;"	d
XARB_SIGCAP_TSIZ	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SIGCAP_TSIZ(/;"	d
XARB_SIGCAP_TT	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SIGCAP_TT(/;"	d
XARB_SR_AT	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_AT	/;"	d
XARB_SR_BA	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_BA	/;"	d
XARB_SR_DT	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_DT	/;"	d
XARB_SR_ECW	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_ECW	/;"	d
XARB_SR_MM	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_MM	/;"	d
XARB_SR_SEA	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_SEA	/;"	d
XARB_SR_TTA	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_TTA	/;"	d
XARB_SR_TTM	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_TTM	/;"	d
XARB_SR_TTR	arch/m68k/include/asm/m547x_8x.h	/^#define XARB_SR_TTR	/;"	d
XATTR_CREATE	fs/yaffs2/yportenv.h	/^#define XATTR_CREATE /;"	d
XATTR_LIST_MAX	include/linux/compat.h	/^#define XATTR_LIST_MAX /;"	d
XATTR_REPLACE	fs/yaffs2/yportenv.h	/^#define XATTR_REPLACE /;"	d
XAUI	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI,$/;"	e	enum:serdes_type
XAUI1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI1,$/;"	e	enum:srds_prtcl
XAUI2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI2,$/;"	e	enum:srds_prtcl
XAUI_3_125_SPEED_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI_3_125_SPEED_CONFIG_SEQ,$/;"	e	enum:serdes_seq
XAUI_ELECTRICAL_CONFIG_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI_ELECTRICAL_CONFIG_SEQ,$/;"	e	enum:serdes_seq
XAUI_FM1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI_FM1,$/;"	e	enum:srds_prtcl
XAUI_FM1	arch/powerpc/include/asm/fsl_serdes.h	/^	XAUI_FM1,$/;"	e	enum:srds_prtcl
XAUI_FM1_MAC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI_FM1_MAC10,$/;"	e	enum:srds_prtcl
XAUI_FM1_MAC10	arch/powerpc/include/asm/fsl_serdes.h	/^	XAUI_FM1_MAC10,$/;"	e	enum:srds_prtcl
XAUI_FM1_MAC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI_FM1_MAC9,$/;"	e	enum:srds_prtcl
XAUI_FM1_MAC9	arch/powerpc/include/asm/fsl_serdes.h	/^	XAUI_FM1_MAC9,$/;"	e	enum:srds_prtcl
XAUI_FM2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI_FM2,$/;"	e	enum:srds_prtcl
XAUI_FM2	arch/powerpc/include/asm/fsl_serdes.h	/^	XAUI_FM2,$/;"	e	enum:srds_prtcl
XAUI_FM2_MAC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI_FM2_MAC10,$/;"	e	enum:srds_prtcl
XAUI_FM2_MAC10	arch/powerpc/include/asm/fsl_serdes.h	/^	XAUI_FM2_MAC10,$/;"	e	enum:srds_prtcl
XAUI_FM2_MAC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XAUI_FM2_MAC9,$/;"	e	enum:srds_prtcl
XAUI_FM2_MAC9	arch/powerpc/include/asm/fsl_serdes.h	/^	XAUI_FM2_MAC9,$/;"	e	enum:srds_prtcl
XAUI_POWER_UP_SEQ	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI_POWER_UP_SEQ,$/;"	e	enum:serdes_seq
XAUI_SEQ_IDX	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI_SEQ_IDX,$/;"	e	enum:__anon525929f50503
XAUI_TX_CONFIG_SEQ1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI_TX_CONFIG_SEQ1,$/;"	e	enum:serdes_seq
XAUI_TX_CONFIG_SEQ2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	XAUI_TX_CONFIG_SEQ2,$/;"	e	enum:serdes_seq
XAUI_UNIT_ID	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	XAUI_UNIT_ID,$/;"	e	enum:unit_id
XAXIDMA_BD_CTRL_TXEOF_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_BD_CTRL_TXEOF_MASK	/;"	d	file:
XAXIDMA_BD_CTRL_TXSOF_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_BD_CTRL_TXSOF_MASK	/;"	d	file:
XAXIDMA_CR_RESET_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_CR_RESET_MASK	/;"	d	file:
XAXIDMA_CR_RUNSTOP_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_CR_RUNSTOP_MASK	/;"	d	file:
XAXIDMA_HALTED_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_HALTED_MASK	/;"	d	file:
XAXIDMA_IRQ_ALL_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_IRQ_ALL_MASK	/;"	d	file:
XAXIDMA_IRQ_DELAY_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_IRQ_DELAY_MASK	/;"	d	file:
XAXIDMA_IRQ_IOC_MASK	drivers/net/xilinx_axi_emac.c	/^#define XAXIDMA_IRQ_IOC_MASK	/;"	d	file:
XBAR_CTRL	drivers/video/tegra124/sor.h	/^#define XBAR_CTRL	/;"	d
XBCS	arch/x86/include/asm/arch-qemu/qemu.h	/^#define XBCS	/;"	d
XBIC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define XBIC_BASE_ADDR	/;"	d
XBS_CRS_ARB	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_ARB	/;"	d
XBS_CRS_PARK	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PARK(/;"	d
XBS_CRS_PCTL	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL(/;"	d
XBS_CRS_PCTL_PARK_CORE	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_CORE	/;"	d
XBS_CRS_PCTL_PARK_EDMA	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_EDMA	/;"	d
XBS_CRS_PCTL_PARK_FEC0	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_FEC0	/;"	d
XBS_CRS_PCTL_PARK_FEC1	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_FEC1	/;"	d
XBS_CRS_PCTL_PARK_FIELD	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_FIELD	/;"	d
XBS_CRS_PCTL_PARK_NONE	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_NONE	/;"	d
XBS_CRS_PCTL_PARK_ON_LAST	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_ON_LAST	/;"	d
XBS_CRS_PCTL_PARK_PCI	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_PCI	/;"	d
XBS_CRS_PCTL_PARK_SBF	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_SBF	/;"	d
XBS_CRS_PCTL_PARK_USB	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_PCTL_PARK_USB	/;"	d
XBS_CRS_RO	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_CRS_RO	/;"	d
XBS_PRS_M0	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M0(/;"	d
XBS_PRS_M1	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M1(/;"	d
XBS_PRS_M2	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M2(/;"	d
XBS_PRS_M3	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M3(/;"	d
XBS_PRS_M5	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M5(/;"	d
XBS_PRS_M6	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M6(/;"	d
XBS_PRS_M7	arch/m68k/include/asm/coldfire/crossbar.h	/^#define XBS_PRS_M7(/;"	d
XCHAL_BUILD_UNIQUE_ID	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_BUILD_UNIQUE_ID	/;"	d
XCHAL_BUILD_UNIQUE_ID	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_BUILD_UNIQUE_ID	/;"	d
XCHAL_BUILD_UNIQUE_ID	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_BUILD_UNIQUE_ID	/;"	d
XCHAL_BYTE0_FORMAT_LENGTHS	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_BYTE0_FORMAT_LENGTHS	/;"	d
XCHAL_CA_BITS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_CA_BITS	/;"	d
XCHAL_CA_BITS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_CA_BITS	/;"	d
XCHAL_CA_BITS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_CA_BITS	/;"	d
XCHAL_CLOCK_GATING_FUNCUNIT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_CLOCK_GATING_FUNCUNIT	/;"	d
XCHAL_CLOCK_GATING_GLOBAL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_CLOCK_GATING_GLOBAL	/;"	d
XCHAL_CORE_DESCRIPTION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_CORE_DESCRIPTION	/;"	d
XCHAL_CORE_DESCRIPTION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_CORE_DESCRIPTION	/;"	d
XCHAL_CORE_ID	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_CORE_ID	/;"	d
XCHAL_CORE_ID	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_CORE_ID	/;"	d
XCHAL_CORE_ID	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_CORE_ID	/;"	d
XCHAL_CP0_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP0_SA_ALIGN	/;"	d
XCHAL_CP0_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP0_SA_ALIGN	/;"	d
XCHAL_CP0_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP0_SA_LIST(/;"	d
XCHAL_CP0_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP0_SA_LIST(/;"	d
XCHAL_CP0_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP0_SA_LIST(/;"	d
XCHAL_CP0_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP0_SA_NUM	/;"	d
XCHAL_CP0_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP0_SA_NUM	/;"	d
XCHAL_CP0_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP0_SA_NUM	/;"	d
XCHAL_CP0_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP0_SA_SIZE	/;"	d
XCHAL_CP0_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP0_SA_SIZE	/;"	d
XCHAL_CP1_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP1_SA_ALIGN	/;"	d
XCHAL_CP1_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP1_SA_ALIGN	/;"	d
XCHAL_CP1_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP1_SA_LIST(/;"	d
XCHAL_CP1_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP1_SA_LIST(/;"	d
XCHAL_CP1_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP1_SA_LIST(/;"	d
XCHAL_CP1_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP1_SA_NUM	/;"	d
XCHAL_CP1_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP1_SA_NUM	/;"	d
XCHAL_CP1_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP1_SA_NUM	/;"	d
XCHAL_CP1_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP1_SA_SIZE	/;"	d
XCHAL_CP1_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP1_SA_SIZE	/;"	d
XCHAL_CP2_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP2_SA_ALIGN	/;"	d
XCHAL_CP2_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP2_SA_ALIGN	/;"	d
XCHAL_CP2_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP2_SA_LIST(/;"	d
XCHAL_CP2_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP2_SA_LIST(/;"	d
XCHAL_CP2_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP2_SA_LIST(/;"	d
XCHAL_CP2_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP2_SA_NUM	/;"	d
XCHAL_CP2_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP2_SA_NUM	/;"	d
XCHAL_CP2_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP2_SA_NUM	/;"	d
XCHAL_CP2_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP2_SA_SIZE	/;"	d
XCHAL_CP2_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP2_SA_SIZE	/;"	d
XCHAL_CP3_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP3_SA_ALIGN	/;"	d
XCHAL_CP3_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP3_SA_ALIGN	/;"	d
XCHAL_CP3_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP3_SA_LIST(/;"	d
XCHAL_CP3_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP3_SA_LIST(/;"	d
XCHAL_CP3_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP3_SA_LIST(/;"	d
XCHAL_CP3_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP3_SA_NUM	/;"	d
XCHAL_CP3_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP3_SA_NUM	/;"	d
XCHAL_CP3_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP3_SA_NUM	/;"	d
XCHAL_CP3_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP3_SA_SIZE	/;"	d
XCHAL_CP3_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP3_SA_SIZE	/;"	d
XCHAL_CP4_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP4_SA_ALIGN	/;"	d
XCHAL_CP4_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP4_SA_ALIGN	/;"	d
XCHAL_CP4_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP4_SA_LIST(/;"	d
XCHAL_CP4_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP4_SA_LIST(/;"	d
XCHAL_CP4_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP4_SA_LIST(/;"	d
XCHAL_CP4_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP4_SA_NUM	/;"	d
XCHAL_CP4_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP4_SA_NUM	/;"	d
XCHAL_CP4_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP4_SA_NUM	/;"	d
XCHAL_CP4_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP4_SA_SIZE	/;"	d
XCHAL_CP4_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP4_SA_SIZE	/;"	d
XCHAL_CP5_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP5_SA_ALIGN	/;"	d
XCHAL_CP5_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP5_SA_ALIGN	/;"	d
XCHAL_CP5_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP5_SA_LIST(/;"	d
XCHAL_CP5_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP5_SA_LIST(/;"	d
XCHAL_CP5_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP5_SA_LIST(/;"	d
XCHAL_CP5_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP5_SA_NUM	/;"	d
XCHAL_CP5_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP5_SA_NUM	/;"	d
XCHAL_CP5_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP5_SA_NUM	/;"	d
XCHAL_CP5_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP5_SA_SIZE	/;"	d
XCHAL_CP5_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP5_SA_SIZE	/;"	d
XCHAL_CP6_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP6_SA_ALIGN	/;"	d
XCHAL_CP6_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP6_SA_ALIGN	/;"	d
XCHAL_CP6_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP6_SA_LIST(/;"	d
XCHAL_CP6_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP6_SA_LIST(/;"	d
XCHAL_CP6_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP6_SA_LIST(/;"	d
XCHAL_CP6_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP6_SA_NUM	/;"	d
XCHAL_CP6_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP6_SA_NUM	/;"	d
XCHAL_CP6_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP6_SA_NUM	/;"	d
XCHAL_CP6_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP6_SA_SIZE	/;"	d
XCHAL_CP6_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP6_SA_SIZE	/;"	d
XCHAL_CP7_IDENT	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP7_IDENT	/;"	d
XCHAL_CP7_IDENT	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP7_IDENT	/;"	d
XCHAL_CP7_NAME	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP7_NAME	/;"	d
XCHAL_CP7_NAME	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP7_NAME	/;"	d
XCHAL_CP7_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP7_SA_ALIGN	/;"	d
XCHAL_CP7_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP7_SA_ALIGN	/;"	d
XCHAL_CP7_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP7_SA_LIST(/;"	d
XCHAL_CP7_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP7_SA_LIST(/;"	d
XCHAL_CP7_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP7_SA_LIST(/;"	d
XCHAL_CP7_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP7_SA_NUM	/;"	d
XCHAL_CP7_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP7_SA_NUM	/;"	d
XCHAL_CP7_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP7_SA_NUM	/;"	d
XCHAL_CP7_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP7_SA_SIZE	/;"	d
XCHAL_CP7_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP7_SA_SIZE	/;"	d
XCHAL_CP_ID_XTIOP	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP_ID_XTIOP	/;"	d
XCHAL_CP_ID_XTIOP	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP_ID_XTIOP	/;"	d
XCHAL_CP_MASK	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP_MASK	/;"	d
XCHAL_CP_MASK	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP_MASK	/;"	d
XCHAL_CP_MASK	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP_MASK	/;"	d
XCHAL_CP_MAX	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP_MAX	/;"	d
XCHAL_CP_MAX	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP_MAX	/;"	d
XCHAL_CP_MAX	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP_MAX	/;"	d
XCHAL_CP_MAXCFG	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_CP_MAXCFG	/;"	d
XCHAL_CP_MAXCFG	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_CP_MAXCFG	/;"	d
XCHAL_CP_MAXCFG	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_CP_MAXCFG	/;"	d
XCHAL_CP_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP_NUM	/;"	d
XCHAL_CP_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP_NUM	/;"	d
XCHAL_CP_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP_NUM	/;"	d
XCHAL_CP_PORT_MASK	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_CP_PORT_MASK	/;"	d
XCHAL_CP_PORT_MASK	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_CP_PORT_MASK	/;"	d
XCHAL_CP_PORT_MASK	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_CP_PORT_MASK	/;"	d
XCHAL_DATARAM0_BANKS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATARAM0_BANKS	/;"	d
XCHAL_DATARAM0_ECC_PARITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATARAM0_ECC_PARITY	/;"	d
XCHAL_DATARAM0_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATARAM0_PADDR	/;"	d
XCHAL_DATARAM0_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATARAM0_SIZE	/;"	d
XCHAL_DATARAM0_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATARAM0_VADDR	/;"	d
XCHAL_DATA_PIPE_DELAY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATA_PIPE_DELAY	/;"	d
XCHAL_DATA_WIDTH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DATA_WIDTH	/;"	d
XCHAL_DATA_WIDTH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DATA_WIDTH	/;"	d
XCHAL_DATA_WIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DATA_WIDTH	/;"	d
XCHAL_DCACHE_ACCESS_SIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_ACCESS_SIZE	/;"	d
XCHAL_DCACHE_ACCESS_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_ACCESS_SIZE	/;"	d
XCHAL_DCACHE_BANKS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_BANKS	/;"	d
XCHAL_DCACHE_ECC_PARITY	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_ECC_PARITY	/;"	d
XCHAL_DCACHE_ECC_PARITY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_ECC_PARITY	/;"	d
XCHAL_DCACHE_ECC_PARITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_ECC_PARITY	/;"	d
XCHAL_DCACHE_IS_COHERENT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_IS_COHERENT	/;"	d
XCHAL_DCACHE_IS_COHERENT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_IS_COHERENT	/;"	d
XCHAL_DCACHE_IS_WRITEBACK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_IS_WRITEBACK	/;"	d
XCHAL_DCACHE_IS_WRITEBACK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_IS_WRITEBACK	/;"	d
XCHAL_DCACHE_IS_WRITEBACK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_IS_WRITEBACK	/;"	d
XCHAL_DCACHE_LINESIZE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_LINESIZE	/;"	d
XCHAL_DCACHE_LINESIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_LINESIZE	/;"	d
XCHAL_DCACHE_LINESIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_LINESIZE	/;"	d
XCHAL_DCACHE_LINEWIDTH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_LINEWIDTH	/;"	d
XCHAL_DCACHE_LINEWIDTH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_LINEWIDTH	/;"	d
XCHAL_DCACHE_LINEWIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_LINEWIDTH	/;"	d
XCHAL_DCACHE_LINE_LOCKABLE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_LINE_LOCKABLE	/;"	d
XCHAL_DCACHE_LINE_LOCKABLE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_LINE_LOCKABLE	/;"	d
XCHAL_DCACHE_LINE_LOCKABLE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_LINE_LOCKABLE	/;"	d
XCHAL_DCACHE_SETWIDTH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_SETWIDTH	/;"	d
XCHAL_DCACHE_SETWIDTH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_SETWIDTH	/;"	d
XCHAL_DCACHE_SETWIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_SETWIDTH	/;"	d
XCHAL_DCACHE_SIZE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_SIZE	/;"	d
XCHAL_DCACHE_SIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_SIZE	/;"	d
XCHAL_DCACHE_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_SIZE	/;"	d
XCHAL_DCACHE_WAYS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DCACHE_WAYS	/;"	d
XCHAL_DCACHE_WAYS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DCACHE_WAYS	/;"	d
XCHAL_DCACHE_WAYS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DCACHE_WAYS	/;"	d
XCHAL_DEBUGLEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DEBUGLEVEL	/;"	d
XCHAL_DEBUGLEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DEBUGLEVEL	/;"	d
XCHAL_DEBUGLEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DEBUGLEVEL	/;"	d
XCHAL_DEBUG_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DEBUG_VECOFS	/;"	d
XCHAL_DEBUG_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DEBUG_VECOFS	/;"	d
XCHAL_DEBUG_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DEBUG_VECOFS	/;"	d
XCHAL_DEBUG_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DEBUG_VECTOR_PADDR	/;"	d
XCHAL_DEBUG_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DEBUG_VECTOR_PADDR	/;"	d
XCHAL_DEBUG_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DEBUG_VECTOR_PADDR	/;"	d
XCHAL_DEBUG_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DEBUG_VECTOR_VADDR	/;"	d
XCHAL_DEBUG_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DEBUG_VECTOR_VADDR	/;"	d
XCHAL_DEBUG_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DEBUG_VECTOR_VADDR	/;"	d
XCHAL_DOUBLEEXC_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DOUBLEEXC_VECOFS	/;"	d
XCHAL_DOUBLEEXC_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DOUBLEEXC_VECOFS	/;"	d
XCHAL_DOUBLEEXC_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DOUBLEEXC_VECOFS	/;"	d
XCHAL_DOUBLEEXC_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DOUBLEEXC_VECTOR_PADDR	/;"	d
XCHAL_DOUBLEEXC_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DOUBLEEXC_VECTOR_PADDR	/;"	d
XCHAL_DOUBLEEXC_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DOUBLEEXC_VECTOR_PADDR	/;"	d
XCHAL_DOUBLEEXC_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DOUBLEEXC_VECTOR_VADDR	/;"	d
XCHAL_DOUBLEEXC_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DOUBLEEXC_VECTOR_VADDR	/;"	d
XCHAL_DOUBLEEXC_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_DOUBLEEXC_VECTOR_VADDR	/;"	d
XCHAL_DTLB_ARF_ENTRIES_LOG2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_DTLB_ARF_ENTRIES_LOG2	/;"	d
XCHAL_DTLB_ARF_ENTRIES_LOG2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_DTLB_ARF_ENTRIES_LOG2	/;"	d
XCHAL_EXCM_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXCM_LEVEL	/;"	d
XCHAL_EXCM_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXCM_LEVEL	/;"	d
XCHAL_EXCM_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXCM_LEVEL	/;"	d
XCHAL_EXTINT0_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT0_NUM	/;"	d
XCHAL_EXTINT0_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT0_NUM	/;"	d
XCHAL_EXTINT0_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT0_NUM	/;"	d
XCHAL_EXTINT10_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT10_NUM	/;"	d
XCHAL_EXTINT10_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT10_NUM	/;"	d
XCHAL_EXTINT10_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT10_NUM	/;"	d
XCHAL_EXTINT11_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT11_NUM	/;"	d
XCHAL_EXTINT11_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT11_NUM	/;"	d
XCHAL_EXTINT11_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT11_NUM	/;"	d
XCHAL_EXTINT12_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT12_NUM	/;"	d
XCHAL_EXTINT12_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT12_NUM	/;"	d
XCHAL_EXTINT12_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT12_NUM	/;"	d
XCHAL_EXTINT13_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT13_NUM	/;"	d
XCHAL_EXTINT13_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT13_NUM	/;"	d
XCHAL_EXTINT13_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT13_NUM	/;"	d
XCHAL_EXTINT14_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT14_NUM	/;"	d
XCHAL_EXTINT14_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT14_NUM	/;"	d
XCHAL_EXTINT14_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT14_NUM	/;"	d
XCHAL_EXTINT15_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT15_NUM	/;"	d
XCHAL_EXTINT15_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT15_NUM	/;"	d
XCHAL_EXTINT15_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT15_NUM	/;"	d
XCHAL_EXTINT16_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT16_NUM	/;"	d
XCHAL_EXTINT16_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT16_NUM	/;"	d
XCHAL_EXTINT16_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT16_NUM	/;"	d
XCHAL_EXTINT1_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT1_NUM	/;"	d
XCHAL_EXTINT1_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT1_NUM	/;"	d
XCHAL_EXTINT1_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT1_NUM	/;"	d
XCHAL_EXTINT2_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT2_NUM	/;"	d
XCHAL_EXTINT2_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT2_NUM	/;"	d
XCHAL_EXTINT2_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT2_NUM	/;"	d
XCHAL_EXTINT3_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT3_NUM	/;"	d
XCHAL_EXTINT3_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT3_NUM	/;"	d
XCHAL_EXTINT3_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT3_NUM	/;"	d
XCHAL_EXTINT4_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT4_NUM	/;"	d
XCHAL_EXTINT4_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT4_NUM	/;"	d
XCHAL_EXTINT4_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT4_NUM	/;"	d
XCHAL_EXTINT5_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT5_NUM	/;"	d
XCHAL_EXTINT5_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT5_NUM	/;"	d
XCHAL_EXTINT5_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT5_NUM	/;"	d
XCHAL_EXTINT6_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT6_NUM	/;"	d
XCHAL_EXTINT6_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT6_NUM	/;"	d
XCHAL_EXTINT6_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT6_NUM	/;"	d
XCHAL_EXTINT7_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT7_NUM	/;"	d
XCHAL_EXTINT7_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT7_NUM	/;"	d
XCHAL_EXTINT7_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT7_NUM	/;"	d
XCHAL_EXTINT8_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT8_NUM	/;"	d
XCHAL_EXTINT8_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT8_NUM	/;"	d
XCHAL_EXTINT8_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT8_NUM	/;"	d
XCHAL_EXTINT9_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_EXTINT9_NUM	/;"	d
XCHAL_EXTINT9_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_EXTINT9_NUM	/;"	d
XCHAL_EXTINT9_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_EXTINT9_NUM	/;"	d
XCHAL_HAVE_ABS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_ABS	/;"	d
XCHAL_HAVE_ABS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_ABS	/;"	d
XCHAL_HAVE_ABS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_ABS	/;"	d
XCHAL_HAVE_ABSOLUTE_LITERALS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_ABSOLUTE_LITERALS	/;"	d
XCHAL_HAVE_ABSOLUTE_LITERALS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_ABSOLUTE_LITERALS	/;"	d
XCHAL_HAVE_ABSOLUTE_LITERALS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_ABSOLUTE_LITERALS	/;"	d
XCHAL_HAVE_ADDX	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_ADDX	/;"	d
XCHAL_HAVE_ADDX	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_ADDX	/;"	d
XCHAL_HAVE_ADDX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_ADDX	/;"	d
XCHAL_HAVE_BBE16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BBE16	/;"	d
XCHAL_HAVE_BBE16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BBE16	/;"	d
XCHAL_HAVE_BBE16_DESPREAD	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BBE16_DESPREAD	/;"	d
XCHAL_HAVE_BBE16_DESPREAD	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BBE16_DESPREAD	/;"	d
XCHAL_HAVE_BBE16_RSQRT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BBE16_RSQRT	/;"	d
XCHAL_HAVE_BBE16_RSQRT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BBE16_RSQRT	/;"	d
XCHAL_HAVE_BBE16_VECDIV	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BBE16_VECDIV	/;"	d
XCHAL_HAVE_BBE16_VECDIV	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BBE16_VECDIV	/;"	d
XCHAL_HAVE_BBENEP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BBENEP	/;"	d
XCHAL_HAVE_BBP16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BBP16	/;"	d
XCHAL_HAVE_BBP16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BBP16	/;"	d
XCHAL_HAVE_BE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_BE	/;"	d
XCHAL_HAVE_BE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BE	/;"	d
XCHAL_HAVE_BE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BE	/;"	d
XCHAL_HAVE_BOOLEANS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_BOOLEANS	/;"	d
XCHAL_HAVE_BOOLEANS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BOOLEANS	/;"	d
XCHAL_HAVE_BOOLEANS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BOOLEANS	/;"	d
XCHAL_HAVE_BOOTLOADER	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BOOTLOADER	/;"	d
XCHAL_HAVE_BOOTLOADER	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BOOTLOADER	/;"	d
XCHAL_HAVE_BSP3	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_BSP3	/;"	d
XCHAL_HAVE_BSP3	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BSP3	/;"	d
XCHAL_HAVE_BSP3_TRANSPOSE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_BSP3_TRANSPOSE	/;"	d
XCHAL_HAVE_CACHEATTR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_CACHEATTR	/;"	d
XCHAL_HAVE_CACHEATTR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CACHEATTR	/;"	d
XCHAL_HAVE_CACHEATTR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CACHEATTR	/;"	d
XCHAL_HAVE_CACHE_BLOCKOPS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CACHE_BLOCKOPS	/;"	d
XCHAL_HAVE_CALL4AND12	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_CALL4AND12	/;"	d
XCHAL_HAVE_CALL4AND12	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CALL4AND12	/;"	d
XCHAL_HAVE_CALL4AND12	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CALL4AND12	/;"	d
XCHAL_HAVE_CCOUNT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_CCOUNT	/;"	d
XCHAL_HAVE_CCOUNT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CCOUNT	/;"	d
XCHAL_HAVE_CCOUNT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CCOUNT	/;"	d
XCHAL_HAVE_CLAMPS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_CLAMPS	/;"	d
XCHAL_HAVE_CLAMPS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CLAMPS	/;"	d
XCHAL_HAVE_CLAMPS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CLAMPS	/;"	d
XCHAL_HAVE_CONNXD2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CONNXD2	/;"	d
XCHAL_HAVE_CONNXD2	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CONNXD2	/;"	d
XCHAL_HAVE_CONNXD2_DUALLSFLIX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CONNXD2_DUALLSFLIX /;"	d
XCHAL_HAVE_CONST16	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_CONST16	/;"	d
XCHAL_HAVE_CONST16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CONST16	/;"	d
XCHAL_HAVE_CONST16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CONST16	/;"	d
XCHAL_HAVE_CP	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_CP	/;"	d
XCHAL_HAVE_CP	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_CP	/;"	d
XCHAL_HAVE_CP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_CP	/;"	d
XCHAL_HAVE_DCACHE_DYN_WAYS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DCACHE_DYN_WAYS	/;"	d
XCHAL_HAVE_DCACHE_TEST	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DCACHE_TEST	/;"	d
XCHAL_HAVE_DEBUG	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_DEBUG	/;"	d
XCHAL_HAVE_DEBUG	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_DEBUG	/;"	d
XCHAL_HAVE_DEBUG	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DEBUG	/;"	d
XCHAL_HAVE_DEBUG_APB	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DEBUG_APB	/;"	d
XCHAL_HAVE_DEBUG_ERI	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DEBUG_ERI	/;"	d
XCHAL_HAVE_DEBUG_EXTERN_INT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_DEBUG_EXTERN_INT	/;"	d
XCHAL_HAVE_DEBUG_EXTERN_INT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_DEBUG_EXTERN_INT	/;"	d
XCHAL_HAVE_DEBUG_EXTERN_INT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DEBUG_EXTERN_INT	/;"	d
XCHAL_HAVE_DEBUG_JTAG	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DEBUG_JTAG	/;"	d
XCHAL_HAVE_DENSITY	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_DENSITY	/;"	d
XCHAL_HAVE_DENSITY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_DENSITY	/;"	d
XCHAL_HAVE_DENSITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DENSITY	/;"	d
XCHAL_HAVE_DEPBITS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DEPBITS	/;"	d
XCHAL_HAVE_DFP	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_DFP	/;"	d
XCHAL_HAVE_DFP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP /;"	d
XCHAL_HAVE_DFPU_SINGLE_DOUBLE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFPU_SINGLE_DOUBLE /;"	d
XCHAL_HAVE_DFPU_SINGLE_ONLY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFPU_SINGLE_ONLY /;"	d
XCHAL_HAVE_DFP_ACCEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP_ACCEL	/;"	d
XCHAL_HAVE_DFP_DIV	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP_DIV /;"	d
XCHAL_HAVE_DFP_RECIP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP_RECIP /;"	d
XCHAL_HAVE_DFP_RSQRT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP_RSQRT /;"	d
XCHAL_HAVE_DFP_SQRT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP_SQRT /;"	d
XCHAL_HAVE_DFP_accel	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_DFP_accel	/;"	d
XCHAL_HAVE_DFP_accel	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DFP_accel	/;"	d
XCHAL_HAVE_DIV32	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_DIV32	/;"	d
XCHAL_HAVE_DIV32	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_DIV32	/;"	d
XCHAL_HAVE_DIV32	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_DIV32	/;"	d
XCHAL_HAVE_EXCEPTIONS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_EXCEPTIONS	/;"	d
XCHAL_HAVE_EXCEPTIONS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_EXCEPTIONS	/;"	d
XCHAL_HAVE_EXCEPTIONS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_EXCEPTIONS	/;"	d
XCHAL_HAVE_EXTERN_REGS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_EXTERN_REGS	/;"	d
XCHAL_HAVE_EXTERN_REGS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_EXTERN_REGS	/;"	d
XCHAL_HAVE_FLIX3	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FLIX3	/;"	d
XCHAL_HAVE_FP	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_FP	/;"	d
XCHAL_HAVE_FP	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_FP	/;"	d
XCHAL_HAVE_FP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FP /;"	d
XCHAL_HAVE_FP_DIV	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FP_DIV /;"	d
XCHAL_HAVE_FP_RECIP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FP_RECIP /;"	d
XCHAL_HAVE_FP_RSQRT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FP_RSQRT /;"	d
XCHAL_HAVE_FP_SQRT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FP_SQRT /;"	d
XCHAL_HAVE_FULL_RESET	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_FULL_RESET	/;"	d
XCHAL_HAVE_FULL_RESET	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_FULL_RESET	/;"	d
XCHAL_HAVE_FULL_RESET	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FULL_RESET	/;"	d
XCHAL_HAVE_FUSION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION	/;"	d
XCHAL_HAVE_FUSION_16BIT_BASEBAND	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_16BIT_BASEBAND	/;"	d
XCHAL_HAVE_FUSION_AES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_AES	/;"	d
XCHAL_HAVE_FUSION_AVS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_AVS	/;"	d
XCHAL_HAVE_FUSION_BITOPS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_BITOPS	/;"	d
XCHAL_HAVE_FUSION_CONVENC	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_CONVENC	/;"	d
XCHAL_HAVE_FUSION_FP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_FP	/;"	d
XCHAL_HAVE_FUSION_LFSR_CRC	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_LFSR_CRC	/;"	d
XCHAL_HAVE_FUSION_LOW_POWER	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_FUSION_LOW_POWER /;"	d
XCHAL_HAVE_GRIVPEP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_GRIVPEP /;"	d
XCHAL_HAVE_GRIVPEP_HISTOGRAM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_GRIVPEP_HISTOGRAM /;"	d
XCHAL_HAVE_HALT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_HALT	/;"	d
XCHAL_HAVE_HALT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HALT	/;"	d
XCHAL_HAVE_HIFI2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_HIFI2	/;"	d
XCHAL_HAVE_HIFI2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_HIFI2	/;"	d
XCHAL_HAVE_HIFI2	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI2	/;"	d
XCHAL_HAVE_HIFI2EP	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_HIFI2EP	/;"	d
XCHAL_HAVE_HIFI2EP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI2EP	/;"	d
XCHAL_HAVE_HIFI3	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI3	/;"	d
XCHAL_HAVE_HIFI3_VFPU	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI3_VFPU	/;"	d
XCHAL_HAVE_HIFI4	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI4	/;"	d
XCHAL_HAVE_HIFI4_VFPU	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI4_VFPU	/;"	d
XCHAL_HAVE_HIFIPRO	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_HIFIPRO	/;"	d
XCHAL_HAVE_HIFIPRO	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFIPRO	/;"	d
XCHAL_HAVE_HIFI_MINI	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIFI_MINI	/;"	d
XCHAL_HAVE_HIGHPRI_INTERRUPTS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_HIGHPRI_INTERRUPTS	/;"	d
XCHAL_HAVE_HIGHPRI_INTERRUPTS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_HIGHPRI_INTERRUPTS	/;"	d
XCHAL_HAVE_HIGHPRI_INTERRUPTS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_HIGHPRI_INTERRUPTS	/;"	d
XCHAL_HAVE_ICACHE_DYN_WAYS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_ICACHE_DYN_WAYS	/;"	d
XCHAL_HAVE_ICACHE_TEST	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_ICACHE_TEST	/;"	d
XCHAL_HAVE_IDENTITY_MAP	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_IDENTITY_MAP	/;"	d
XCHAL_HAVE_IDENTITY_MAP	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_IDENTITY_MAP	/;"	d
XCHAL_HAVE_IDENTITY_MAP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_IDENTITY_MAP	/;"	d
XCHAL_HAVE_IMEM_LOADSTORE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_IMEM_LOADSTORE	/;"	d
XCHAL_HAVE_IMEM_LOADSTORE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_IMEM_LOADSTORE	/;"	d
XCHAL_HAVE_INTERRUPTS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_INTERRUPTS	/;"	d
XCHAL_HAVE_INTERRUPTS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_INTERRUPTS	/;"	d
XCHAL_HAVE_INTERRUPTS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_INTERRUPTS	/;"	d
XCHAL_HAVE_L32R	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_L32R	/;"	d
XCHAL_HAVE_L32R	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_L32R	/;"	d
XCHAL_HAVE_L32R	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_L32R	/;"	d
XCHAL_HAVE_LOOPS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_LOOPS	/;"	d
XCHAL_HAVE_LOOPS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_LOOPS	/;"	d
XCHAL_HAVE_LOOPS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_LOOPS	/;"	d
XCHAL_HAVE_MAC16	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MAC16	/;"	d
XCHAL_HAVE_MAC16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MAC16	/;"	d
XCHAL_HAVE_MAC16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MAC16	/;"	d
XCHAL_HAVE_MEM_ECC_PARITY	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MEM_ECC_PARITY	/;"	d
XCHAL_HAVE_MEM_ECC_PARITY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MEM_ECC_PARITY	/;"	d
XCHAL_HAVE_MEM_ECC_PARITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MEM_ECC_PARITY	/;"	d
XCHAL_HAVE_MIMIC_CACHEATTR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MIMIC_CACHEATTR	/;"	d
XCHAL_HAVE_MIMIC_CACHEATTR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MIMIC_CACHEATTR	/;"	d
XCHAL_HAVE_MIMIC_CACHEATTR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MIMIC_CACHEATTR	/;"	d
XCHAL_HAVE_MINMAX	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MINMAX	/;"	d
XCHAL_HAVE_MINMAX	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MINMAX	/;"	d
XCHAL_HAVE_MINMAX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MINMAX	/;"	d
XCHAL_HAVE_MP_INTERRUPTS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MP_INTERRUPTS	/;"	d
XCHAL_HAVE_MP_INTERRUPTS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MP_INTERRUPTS	/;"	d
XCHAL_HAVE_MP_RUNSTALL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MP_RUNSTALL	/;"	d
XCHAL_HAVE_MP_RUNSTALL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MP_RUNSTALL	/;"	d
XCHAL_HAVE_MUL16	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MUL16	/;"	d
XCHAL_HAVE_MUL16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MUL16	/;"	d
XCHAL_HAVE_MUL16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MUL16	/;"	d
XCHAL_HAVE_MUL32	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MUL32	/;"	d
XCHAL_HAVE_MUL32	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MUL32	/;"	d
XCHAL_HAVE_MUL32	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MUL32	/;"	d
XCHAL_HAVE_MUL32_HIGH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_MUL32_HIGH	/;"	d
XCHAL_HAVE_MUL32_HIGH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_MUL32_HIGH	/;"	d
XCHAL_HAVE_MUL32_HIGH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MUL32_HIGH	/;"	d
XCHAL_HAVE_MX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_MX	/;"	d
XCHAL_HAVE_NMI	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_NMI	/;"	d
XCHAL_HAVE_NMI	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_NMI	/;"	d
XCHAL_HAVE_NMI	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_NMI	/;"	d
XCHAL_HAVE_NSA	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_NSA	/;"	d
XCHAL_HAVE_NSA	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_NSA	/;"	d
XCHAL_HAVE_NSA	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_NSA	/;"	d
XCHAL_HAVE_OCD	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_OCD	/;"	d
XCHAL_HAVE_OCD	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_OCD	/;"	d
XCHAL_HAVE_OCD	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_OCD	/;"	d
XCHAL_HAVE_OCD_DIR_ARRAY	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_OCD_DIR_ARRAY	/;"	d
XCHAL_HAVE_OCD_DIR_ARRAY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_OCD_DIR_ARRAY	/;"	d
XCHAL_HAVE_OCD_DIR_ARRAY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_OCD_DIR_ARRAY	/;"	d
XCHAL_HAVE_OCD_LS32DDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_OCD_LS32DDR	/;"	d
XCHAL_HAVE_PDX4	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PDX4	/;"	d
XCHAL_HAVE_PIF	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_PIF	/;"	d
XCHAL_HAVE_PIF	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_PIF	/;"	d
XCHAL_HAVE_PIF	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PIF	/;"	d
XCHAL_HAVE_PREDICTED_BRANCHES	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_PREDICTED_BRANCHES	/;"	d
XCHAL_HAVE_PREDICTED_BRANCHES	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_PREDICTED_BRANCHES	/;"	d
XCHAL_HAVE_PREDICTED_BRANCHES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PREDICTED_BRANCHES	/;"	d
XCHAL_HAVE_PREFETCH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_PREFETCH	/;"	d
XCHAL_HAVE_PREFETCH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PREFETCH	/;"	d
XCHAL_HAVE_PREFETCH_L1	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PREFETCH_L1	/;"	d
XCHAL_HAVE_PRID	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_PRID	/;"	d
XCHAL_HAVE_PRID	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_PRID	/;"	d
XCHAL_HAVE_PRID	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PRID	/;"	d
XCHAL_HAVE_PSO	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PSO	/;"	d
XCHAL_HAVE_PSO_CDM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PSO_CDM	/;"	d
XCHAL_HAVE_PSO_FULL_RETENTION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PSO_FULL_RETENTION	/;"	d
XCHAL_HAVE_PTP_MMU	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_PTP_MMU	/;"	d
XCHAL_HAVE_PTP_MMU	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_PTP_MMU	/;"	d
XCHAL_HAVE_PTP_MMU	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_PTP_MMU	/;"	d
XCHAL_HAVE_RELEASE_SYNC	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_RELEASE_SYNC	/;"	d
XCHAL_HAVE_RELEASE_SYNC	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_RELEASE_SYNC	/;"	d
XCHAL_HAVE_RELEASE_SYNC	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_RELEASE_SYNC	/;"	d
XCHAL_HAVE_S32C1I	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_S32C1I	/;"	d
XCHAL_HAVE_S32C1I	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_S32C1I	/;"	d
XCHAL_HAVE_S32C1I	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_S32C1I	/;"	d
XCHAL_HAVE_SEXT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_SEXT	/;"	d
XCHAL_HAVE_SEXT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_SEXT	/;"	d
XCHAL_HAVE_SEXT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_SEXT	/;"	d
XCHAL_HAVE_SPANNING_WAY	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_SPANNING_WAY	/;"	d
XCHAL_HAVE_SPANNING_WAY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_SPANNING_WAY	/;"	d
XCHAL_HAVE_SPANNING_WAY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_SPANNING_WAY	/;"	d
XCHAL_HAVE_SPECULATION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_SPECULATION	/;"	d
XCHAL_HAVE_SPECULATION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_SPECULATION	/;"	d
XCHAL_HAVE_SPECULATION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_SPECULATION	/;"	d
XCHAL_HAVE_SSP16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_SSP16	/;"	d
XCHAL_HAVE_SSP16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_SSP16	/;"	d
XCHAL_HAVE_SSP16_VITERBI	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_SSP16_VITERBI	/;"	d
XCHAL_HAVE_SSP16_VITERBI	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_SSP16_VITERBI	/;"	d
XCHAL_HAVE_TAP_MASTER	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_TAP_MASTER	/;"	d
XCHAL_HAVE_TAP_MASTER	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_TAP_MASTER	/;"	d
XCHAL_HAVE_TAP_MASTER	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_TAP_MASTER	/;"	d
XCHAL_HAVE_THREADPTR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_THREADPTR	/;"	d
XCHAL_HAVE_THREADPTR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_THREADPTR	/;"	d
XCHAL_HAVE_THREADPTR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_THREADPTR	/;"	d
XCHAL_HAVE_TLBS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_TLBS	/;"	d
XCHAL_HAVE_TLBS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_TLBS	/;"	d
XCHAL_HAVE_TLBS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_TLBS	/;"	d
XCHAL_HAVE_TRAX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_TRAX	/;"	d
XCHAL_HAVE_TURBO16	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_TURBO16	/;"	d
XCHAL_HAVE_TURBO16	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_TURBO16	/;"	d
XCHAL_HAVE_USER_DPFPU	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_USER_DPFPU /;"	d
XCHAL_HAVE_USER_SPFPU	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_USER_SPFPU /;"	d
XCHAL_HAVE_VECBASE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_VECBASE	/;"	d
XCHAL_HAVE_VECBASE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_VECBASE	/;"	d
XCHAL_HAVE_VECBASE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_VECBASE	/;"	d
XCHAL_HAVE_VECTORFPU2005	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_VECTORFPU2005	/;"	d
XCHAL_HAVE_VECTORFPU2005	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_VECTORFPU2005	/;"	d
XCHAL_HAVE_VECTORFPU2005	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_VECTORFPU2005	/;"	d
XCHAL_HAVE_VECTOR_SELECT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_VECTOR_SELECT	/;"	d
XCHAL_HAVE_VECTOR_SELECT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_VECTOR_SELECT	/;"	d
XCHAL_HAVE_VECTOR_SELECT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_VECTOR_SELECT	/;"	d
XCHAL_HAVE_VECTRA1	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_VECTRA1	/;"	d
XCHAL_HAVE_VECTRA1	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_VECTRA1	/;"	d
XCHAL_HAVE_VECTRA1	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_VECTRA1	/;"	d
XCHAL_HAVE_VECTRALX	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_VECTRALX	/;"	d
XCHAL_HAVE_VECTRALX	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_VECTRALX	/;"	d
XCHAL_HAVE_VECTRALX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_VECTRALX	/;"	d
XCHAL_HAVE_WIDE_BRANCHES	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_WIDE_BRANCHES	/;"	d
XCHAL_HAVE_WIDE_BRANCHES	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_WIDE_BRANCHES	/;"	d
XCHAL_HAVE_WIDE_BRANCHES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_WIDE_BRANCHES	/;"	d
XCHAL_HAVE_WINDOWED	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_WINDOWED	/;"	d
XCHAL_HAVE_WINDOWED	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_WINDOWED	/;"	d
XCHAL_HAVE_WINDOWED	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_WINDOWED	/;"	d
XCHAL_HAVE_XEA1	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_XEA1	/;"	d
XCHAL_HAVE_XEA1	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_XEA1	/;"	d
XCHAL_HAVE_XEA1	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_XEA1	/;"	d
XCHAL_HAVE_XEA2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_XEA2	/;"	d
XCHAL_HAVE_XEA2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_XEA2	/;"	d
XCHAL_HAVE_XEA2	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_XEA2	/;"	d
XCHAL_HAVE_XEAX	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_XEAX	/;"	d
XCHAL_HAVE_XEAX	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_XEAX	/;"	d
XCHAL_HAVE_XEAX	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_XEAX	/;"	d
XCHAL_HAVE_XLT_CACHEATTR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HAVE_XLT_CACHEATTR	/;"	d
XCHAL_HAVE_XLT_CACHEATTR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HAVE_XLT_CACHEATTR	/;"	d
XCHAL_HAVE_XLT_CACHEATTR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HAVE_XLT_CACHEATTR	/;"	d
XCHAL_HW_CONFIGID0	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_CONFIGID0	/;"	d
XCHAL_HW_CONFIGID0	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_CONFIGID0	/;"	d
XCHAL_HW_CONFIGID0	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_CONFIGID0	/;"	d
XCHAL_HW_CONFIGID1	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_CONFIGID1	/;"	d
XCHAL_HW_CONFIGID1	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_CONFIGID1	/;"	d
XCHAL_HW_CONFIGID1	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_CONFIGID1	/;"	d
XCHAL_HW_CONFIGID_RELIABLE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_CONFIGID_RELIABLE	/;"	d
XCHAL_HW_CONFIGID_RELIABLE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_CONFIGID_RELIABLE	/;"	d
XCHAL_HW_CONFIGID_RELIABLE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_CONFIGID_RELIABLE	/;"	d
XCHAL_HW_MAX_VERSION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_MAX_VERSION	/;"	d
XCHAL_HW_MAX_VERSION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_MAX_VERSION	/;"	d
XCHAL_HW_MAX_VERSION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_MAX_VERSION	/;"	d
XCHAL_HW_MAX_VERSION_MAJOR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_MAX_VERSION_MAJOR	/;"	d
XCHAL_HW_MAX_VERSION_MAJOR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_MAX_VERSION_MAJOR	/;"	d
XCHAL_HW_MAX_VERSION_MAJOR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_MAX_VERSION_MAJOR	/;"	d
XCHAL_HW_MAX_VERSION_MINOR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_MAX_VERSION_MINOR	/;"	d
XCHAL_HW_MAX_VERSION_MINOR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_MAX_VERSION_MINOR	/;"	d
XCHAL_HW_MAX_VERSION_MINOR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_MAX_VERSION_MINOR	/;"	d
XCHAL_HW_MIN_VERSION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_MIN_VERSION	/;"	d
XCHAL_HW_MIN_VERSION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_MIN_VERSION	/;"	d
XCHAL_HW_MIN_VERSION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_MIN_VERSION	/;"	d
XCHAL_HW_MIN_VERSION_MAJOR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_MIN_VERSION_MAJOR	/;"	d
XCHAL_HW_MIN_VERSION_MAJOR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_MIN_VERSION_MAJOR	/;"	d
XCHAL_HW_MIN_VERSION_MAJOR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_MIN_VERSION_MAJOR	/;"	d
XCHAL_HW_MIN_VERSION_MINOR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_MIN_VERSION_MINOR	/;"	d
XCHAL_HW_MIN_VERSION_MINOR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_MIN_VERSION_MINOR	/;"	d
XCHAL_HW_MIN_VERSION_MINOR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_MIN_VERSION_MINOR	/;"	d
XCHAL_HW_REL_LX2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_REL_LX2	/;"	d
XCHAL_HW_REL_LX2_1	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_REL_LX2_1	/;"	d
XCHAL_HW_REL_LX2_1_1	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_REL_LX2_1_1	/;"	d
XCHAL_HW_REL_LX4	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_REL_LX4	/;"	d
XCHAL_HW_REL_LX4_0	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_REL_LX4_0	/;"	d
XCHAL_HW_REL_LX4_0_1	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_REL_LX4_0_1	/;"	d
XCHAL_HW_REL_LX6	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_REL_LX6	/;"	d
XCHAL_HW_REL_LX6_0	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_REL_LX6_0	/;"	d
XCHAL_HW_REL_LX6_0_2	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_REL_LX6_0_2	/;"	d
XCHAL_HW_VERSION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_VERSION	/;"	d
XCHAL_HW_VERSION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_VERSION	/;"	d
XCHAL_HW_VERSION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_VERSION	/;"	d
XCHAL_HW_VERSION_MAJOR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_VERSION_MAJOR	/;"	d
XCHAL_HW_VERSION_MAJOR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_VERSION_MAJOR	/;"	d
XCHAL_HW_VERSION_MAJOR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_VERSION_MAJOR	/;"	d
XCHAL_HW_VERSION_MINOR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_VERSION_MINOR	/;"	d
XCHAL_HW_VERSION_MINOR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_VERSION_MINOR	/;"	d
XCHAL_HW_VERSION_MINOR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_VERSION_MINOR	/;"	d
XCHAL_HW_VERSION_NAME	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_HW_VERSION_NAME	/;"	d
XCHAL_HW_VERSION_NAME	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_HW_VERSION_NAME	/;"	d
XCHAL_HW_VERSION_NAME	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_HW_VERSION_NAME	/;"	d
XCHAL_ICACHE_ACCESS_SIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_ACCESS_SIZE	/;"	d
XCHAL_ICACHE_ACCESS_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_ACCESS_SIZE	/;"	d
XCHAL_ICACHE_ECC_PARITY	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_ECC_PARITY	/;"	d
XCHAL_ICACHE_ECC_PARITY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_ECC_PARITY	/;"	d
XCHAL_ICACHE_ECC_PARITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_ECC_PARITY	/;"	d
XCHAL_ICACHE_LINESIZE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_LINESIZE	/;"	d
XCHAL_ICACHE_LINESIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_LINESIZE	/;"	d
XCHAL_ICACHE_LINESIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_LINESIZE	/;"	d
XCHAL_ICACHE_LINEWIDTH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_LINEWIDTH	/;"	d
XCHAL_ICACHE_LINEWIDTH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_LINEWIDTH	/;"	d
XCHAL_ICACHE_LINEWIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_LINEWIDTH	/;"	d
XCHAL_ICACHE_LINE_LOCKABLE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_LINE_LOCKABLE	/;"	d
XCHAL_ICACHE_LINE_LOCKABLE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_LINE_LOCKABLE	/;"	d
XCHAL_ICACHE_LINE_LOCKABLE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_LINE_LOCKABLE	/;"	d
XCHAL_ICACHE_SETWIDTH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_SETWIDTH	/;"	d
XCHAL_ICACHE_SETWIDTH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_SETWIDTH	/;"	d
XCHAL_ICACHE_SETWIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_SETWIDTH	/;"	d
XCHAL_ICACHE_SIZE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_SIZE	/;"	d
XCHAL_ICACHE_SIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_SIZE	/;"	d
XCHAL_ICACHE_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_SIZE	/;"	d
XCHAL_ICACHE_WAYS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ICACHE_WAYS	/;"	d
XCHAL_ICACHE_WAYS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ICACHE_WAYS	/;"	d
XCHAL_ICACHE_WAYS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_ICACHE_WAYS	/;"	d
XCHAL_INSTRAM0_ECC_PARITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INSTRAM0_ECC_PARITY	/;"	d
XCHAL_INSTRAM0_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INSTRAM0_PADDR	/;"	d
XCHAL_INSTRAM0_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INSTRAM0_SIZE	/;"	d
XCHAL_INSTRAM0_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INSTRAM0_VADDR	/;"	d
XCHAL_INST_FETCH_WIDTH	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INST_FETCH_WIDTH	/;"	d
XCHAL_INST_FETCH_WIDTH	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INST_FETCH_WIDTH	/;"	d
XCHAL_INST_FETCH_WIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INST_FETCH_WIDTH	/;"	d
XCHAL_INT0_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT0_EXTNUM	/;"	d
XCHAL_INT0_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT0_LEVEL	/;"	d
XCHAL_INT0_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT0_LEVEL	/;"	d
XCHAL_INT0_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT0_LEVEL	/;"	d
XCHAL_INT0_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT0_TYPE	/;"	d
XCHAL_INT0_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT0_TYPE /;"	d
XCHAL_INT0_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT0_TYPE /;"	d
XCHAL_INT10_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT10_LEVEL	/;"	d
XCHAL_INT10_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT10_LEVEL	/;"	d
XCHAL_INT10_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT10_LEVEL	/;"	d
XCHAL_INT10_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT10_TYPE	/;"	d
XCHAL_INT10_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT10_TYPE /;"	d
XCHAL_INT10_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT10_TYPE /;"	d
XCHAL_INT11_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT11_LEVEL	/;"	d
XCHAL_INT11_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT11_LEVEL	/;"	d
XCHAL_INT11_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT11_LEVEL	/;"	d
XCHAL_INT11_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT11_TYPE	/;"	d
XCHAL_INT11_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT11_TYPE /;"	d
XCHAL_INT11_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT11_TYPE /;"	d
XCHAL_INT12_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT12_EXTNUM	/;"	d
XCHAL_INT12_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT12_LEVEL	/;"	d
XCHAL_INT12_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT12_LEVEL	/;"	d
XCHAL_INT12_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT12_LEVEL	/;"	d
XCHAL_INT12_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT12_TYPE	/;"	d
XCHAL_INT12_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT12_TYPE /;"	d
XCHAL_INT12_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT12_TYPE /;"	d
XCHAL_INT13_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT13_LEVEL	/;"	d
XCHAL_INT13_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT13_LEVEL	/;"	d
XCHAL_INT13_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT13_LEVEL	/;"	d
XCHAL_INT13_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT13_TYPE	/;"	d
XCHAL_INT13_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT13_TYPE /;"	d
XCHAL_INT13_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT13_TYPE /;"	d
XCHAL_INT14_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT14_EXTNUM	/;"	d
XCHAL_INT14_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT14_LEVEL	/;"	d
XCHAL_INT14_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT14_LEVEL	/;"	d
XCHAL_INT14_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT14_LEVEL	/;"	d
XCHAL_INT14_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT14_TYPE	/;"	d
XCHAL_INT14_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT14_TYPE /;"	d
XCHAL_INT14_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT14_TYPE /;"	d
XCHAL_INT15_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT15_EXTNUM	/;"	d
XCHAL_INT15_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT15_LEVEL	/;"	d
XCHAL_INT15_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT15_LEVEL	/;"	d
XCHAL_INT15_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT15_LEVEL	/;"	d
XCHAL_INT15_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT15_TYPE	/;"	d
XCHAL_INT15_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT15_TYPE /;"	d
XCHAL_INT15_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT15_TYPE /;"	d
XCHAL_INT16_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT16_EXTNUM	/;"	d
XCHAL_INT16_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT16_LEVEL	/;"	d
XCHAL_INT16_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT16_LEVEL	/;"	d
XCHAL_INT16_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT16_LEVEL	/;"	d
XCHAL_INT16_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT16_TYPE	/;"	d
XCHAL_INT16_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT16_TYPE /;"	d
XCHAL_INT16_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT16_TYPE /;"	d
XCHAL_INT17_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT17_EXTNUM	/;"	d
XCHAL_INT17_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT17_LEVEL	/;"	d
XCHAL_INT17_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT17_LEVEL	/;"	d
XCHAL_INT17_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT17_LEVEL	/;"	d
XCHAL_INT17_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT17_TYPE	/;"	d
XCHAL_INT17_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT17_TYPE /;"	d
XCHAL_INT17_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT17_TYPE /;"	d
XCHAL_INT18_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT18_EXTNUM	/;"	d
XCHAL_INT18_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT18_LEVEL	/;"	d
XCHAL_INT18_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT18_LEVEL	/;"	d
XCHAL_INT18_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT18_LEVEL	/;"	d
XCHAL_INT18_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT18_TYPE	/;"	d
XCHAL_INT18_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT18_TYPE /;"	d
XCHAL_INT18_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT18_TYPE /;"	d
XCHAL_INT19_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT19_EXTNUM	/;"	d
XCHAL_INT19_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT19_LEVEL	/;"	d
XCHAL_INT19_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT19_LEVEL	/;"	d
XCHAL_INT19_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT19_LEVEL	/;"	d
XCHAL_INT19_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT19_TYPE	/;"	d
XCHAL_INT19_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT19_TYPE /;"	d
XCHAL_INT19_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT19_TYPE /;"	d
XCHAL_INT1_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT1_EXTNUM	/;"	d
XCHAL_INT1_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT1_LEVEL	/;"	d
XCHAL_INT1_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT1_LEVEL	/;"	d
XCHAL_INT1_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT1_LEVEL	/;"	d
XCHAL_INT1_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT1_TYPE	/;"	d
XCHAL_INT1_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT1_TYPE /;"	d
XCHAL_INT1_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT1_TYPE /;"	d
XCHAL_INT20_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT20_EXTNUM	/;"	d
XCHAL_INT20_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT20_LEVEL	/;"	d
XCHAL_INT20_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT20_LEVEL	/;"	d
XCHAL_INT20_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT20_LEVEL	/;"	d
XCHAL_INT20_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT20_TYPE	/;"	d
XCHAL_INT20_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT20_TYPE /;"	d
XCHAL_INT20_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT20_TYPE /;"	d
XCHAL_INT21_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT21_EXTNUM	/;"	d
XCHAL_INT21_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT21_LEVEL	/;"	d
XCHAL_INT21_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT21_LEVEL	/;"	d
XCHAL_INT21_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT21_LEVEL	/;"	d
XCHAL_INT21_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT21_TYPE	/;"	d
XCHAL_INT21_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT21_TYPE /;"	d
XCHAL_INT21_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT21_TYPE /;"	d
XCHAL_INT2_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT2_EXTNUM	/;"	d
XCHAL_INT2_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT2_LEVEL	/;"	d
XCHAL_INT2_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT2_LEVEL	/;"	d
XCHAL_INT2_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT2_LEVEL	/;"	d
XCHAL_INT2_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT2_TYPE	/;"	d
XCHAL_INT2_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT2_TYPE /;"	d
XCHAL_INT2_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT2_TYPE /;"	d
XCHAL_INT3_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT3_EXTNUM	/;"	d
XCHAL_INT3_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT3_LEVEL	/;"	d
XCHAL_INT3_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT3_LEVEL	/;"	d
XCHAL_INT3_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT3_LEVEL	/;"	d
XCHAL_INT3_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT3_TYPE	/;"	d
XCHAL_INT3_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT3_TYPE /;"	d
XCHAL_INT3_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT3_TYPE /;"	d
XCHAL_INT4_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT4_EXTNUM	/;"	d
XCHAL_INT4_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT4_LEVEL	/;"	d
XCHAL_INT4_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT4_LEVEL	/;"	d
XCHAL_INT4_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT4_LEVEL	/;"	d
XCHAL_INT4_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT4_TYPE	/;"	d
XCHAL_INT4_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT4_TYPE /;"	d
XCHAL_INT4_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT4_TYPE /;"	d
XCHAL_INT5_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT5_EXTNUM	/;"	d
XCHAL_INT5_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT5_LEVEL	/;"	d
XCHAL_INT5_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT5_LEVEL	/;"	d
XCHAL_INT5_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT5_LEVEL	/;"	d
XCHAL_INT5_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT5_TYPE	/;"	d
XCHAL_INT5_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT5_TYPE /;"	d
XCHAL_INT5_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT5_TYPE /;"	d
XCHAL_INT6_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT6_LEVEL	/;"	d
XCHAL_INT6_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT6_LEVEL	/;"	d
XCHAL_INT6_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT6_LEVEL	/;"	d
XCHAL_INT6_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT6_TYPE	/;"	d
XCHAL_INT6_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT6_TYPE /;"	d
XCHAL_INT6_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT6_TYPE /;"	d
XCHAL_INT7_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT7_LEVEL	/;"	d
XCHAL_INT7_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT7_LEVEL	/;"	d
XCHAL_INT7_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT7_LEVEL	/;"	d
XCHAL_INT7_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT7_TYPE	/;"	d
XCHAL_INT7_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT7_TYPE /;"	d
XCHAL_INT7_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT7_TYPE /;"	d
XCHAL_INT8_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT8_EXTNUM	/;"	d
XCHAL_INT8_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT8_LEVEL	/;"	d
XCHAL_INT8_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT8_LEVEL	/;"	d
XCHAL_INT8_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT8_LEVEL	/;"	d
XCHAL_INT8_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT8_TYPE	/;"	d
XCHAL_INT8_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT8_TYPE /;"	d
XCHAL_INT8_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT8_TYPE /;"	d
XCHAL_INT9_EXTNUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT9_EXTNUM	/;"	d
XCHAL_INT9_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT9_LEVEL	/;"	d
XCHAL_INT9_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT9_LEVEL	/;"	d
XCHAL_INT9_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT9_LEVEL	/;"	d
XCHAL_INT9_TYPE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INT9_TYPE	/;"	d
XCHAL_INT9_TYPE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INT9_TYPE /;"	d
XCHAL_INT9_TYPE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INT9_TYPE /;"	d
XCHAL_INTLEVEL1_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL1_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL1_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL1_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL1_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL1_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL1_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL1_MASK	/;"	d
XCHAL_INTLEVEL1_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL1_MASK	/;"	d
XCHAL_INTLEVEL1_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL1_MASK	/;"	d
XCHAL_INTLEVEL2_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL2_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL2_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL2_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL2_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL2_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL2_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL2_MASK	/;"	d
XCHAL_INTLEVEL2_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL2_MASK	/;"	d
XCHAL_INTLEVEL2_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL2_MASK	/;"	d
XCHAL_INTLEVEL2_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL2_NUM	/;"	d
XCHAL_INTLEVEL2_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL2_NUM	/;"	d
XCHAL_INTLEVEL2_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL2_NUM	/;"	d
XCHAL_INTLEVEL2_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL2_VECOFS	/;"	d
XCHAL_INTLEVEL2_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL2_VECOFS	/;"	d
XCHAL_INTLEVEL2_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL2_VECOFS	/;"	d
XCHAL_INTLEVEL2_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL2_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL2_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL2_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL2_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL2_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL2_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL2_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL2_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL2_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL2_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL2_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL3_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL3_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL3_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL3_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL3_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL3_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL3_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL3_MASK	/;"	d
XCHAL_INTLEVEL3_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL3_MASK	/;"	d
XCHAL_INTLEVEL3_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL3_MASK	/;"	d
XCHAL_INTLEVEL3_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL3_VECOFS	/;"	d
XCHAL_INTLEVEL3_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL3_VECOFS	/;"	d
XCHAL_INTLEVEL3_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL3_VECOFS	/;"	d
XCHAL_INTLEVEL3_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL3_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL3_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL3_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL3_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL3_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL3_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL3_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL3_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL3_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL3_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL3_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL4_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL4_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL4_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL4_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL4_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL4_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL4_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL4_MASK	/;"	d
XCHAL_INTLEVEL4_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL4_MASK	/;"	d
XCHAL_INTLEVEL4_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL4_MASK	/;"	d
XCHAL_INTLEVEL4_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL4_NUM	/;"	d
XCHAL_INTLEVEL4_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL4_NUM	/;"	d
XCHAL_INTLEVEL4_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL4_NUM	/;"	d
XCHAL_INTLEVEL4_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL4_VECOFS	/;"	d
XCHAL_INTLEVEL4_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL4_VECOFS	/;"	d
XCHAL_INTLEVEL4_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL4_VECOFS	/;"	d
XCHAL_INTLEVEL4_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL4_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL4_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL4_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL4_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL4_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL4_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL4_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL4_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL4_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL4_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL4_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL5_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL5_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL5_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL5_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL5_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL5_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL5_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL5_MASK	/;"	d
XCHAL_INTLEVEL5_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL5_MASK	/;"	d
XCHAL_INTLEVEL5_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL5_MASK	/;"	d
XCHAL_INTLEVEL5_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL5_NUM	/;"	d
XCHAL_INTLEVEL5_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL5_NUM	/;"	d
XCHAL_INTLEVEL5_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL5_NUM	/;"	d
XCHAL_INTLEVEL5_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL5_VECOFS	/;"	d
XCHAL_INTLEVEL5_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL5_VECOFS	/;"	d
XCHAL_INTLEVEL5_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL5_VECOFS	/;"	d
XCHAL_INTLEVEL5_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL5_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL5_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL5_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL5_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL5_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL5_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL5_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL5_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL5_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL5_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL5_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL6_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL6_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL6_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL6_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL6_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL6_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL6_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL6_MASK	/;"	d
XCHAL_INTLEVEL6_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL6_MASK	/;"	d
XCHAL_INTLEVEL6_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL6_MASK	/;"	d
XCHAL_INTLEVEL6_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL6_VECOFS	/;"	d
XCHAL_INTLEVEL6_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL6_VECOFS	/;"	d
XCHAL_INTLEVEL6_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL6_VECOFS	/;"	d
XCHAL_INTLEVEL6_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL6_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL6_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL6_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL6_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL6_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL6_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL6_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL6_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL6_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL6_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL6_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL7_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL7_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL7_ANDBELOW_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL7_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL7_ANDBELOW_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL7_ANDBELOW_MASK	/;"	d
XCHAL_INTLEVEL7_MASK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL7_MASK	/;"	d
XCHAL_INTLEVEL7_MASK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL7_MASK	/;"	d
XCHAL_INTLEVEL7_MASK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL7_MASK	/;"	d
XCHAL_INTLEVEL7_NUM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL7_NUM	/;"	d
XCHAL_INTLEVEL7_NUM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL7_NUM	/;"	d
XCHAL_INTLEVEL7_NUM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL7_NUM	/;"	d
XCHAL_INTLEVEL7_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL7_VECOFS	/;"	d
XCHAL_INTLEVEL7_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL7_VECOFS	/;"	d
XCHAL_INTLEVEL7_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL7_VECOFS	/;"	d
XCHAL_INTLEVEL7_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL7_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL7_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL7_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL7_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL7_VECTOR_PADDR	/;"	d
XCHAL_INTLEVEL7_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTLEVEL7_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL7_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTLEVEL7_VECTOR_VADDR	/;"	d
XCHAL_INTLEVEL7_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTLEVEL7_VECTOR_VADDR	/;"	d
XCHAL_INTTYPE_MASK_EXTERN_EDGE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_EXTERN_EDGE	/;"	d
XCHAL_INTTYPE_MASK_EXTERN_EDGE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_EXTERN_EDGE	/;"	d
XCHAL_INTTYPE_MASK_EXTERN_EDGE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_EXTERN_EDGE	/;"	d
XCHAL_INTTYPE_MASK_EXTERN_LEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL	/;"	d
XCHAL_INTTYPE_MASK_EXTERN_LEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL	/;"	d
XCHAL_INTTYPE_MASK_EXTERN_LEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL	/;"	d
XCHAL_INTTYPE_MASK_NMI	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_NMI	/;"	d
XCHAL_INTTYPE_MASK_NMI	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_NMI	/;"	d
XCHAL_INTTYPE_MASK_NMI	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_NMI	/;"	d
XCHAL_INTTYPE_MASK_PROFILING	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_PROFILING	/;"	d
XCHAL_INTTYPE_MASK_SOFTWARE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_SOFTWARE	/;"	d
XCHAL_INTTYPE_MASK_SOFTWARE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_SOFTWARE	/;"	d
XCHAL_INTTYPE_MASK_SOFTWARE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_SOFTWARE	/;"	d
XCHAL_INTTYPE_MASK_TIMER	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_TIMER	/;"	d
XCHAL_INTTYPE_MASK_TIMER	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_TIMER	/;"	d
XCHAL_INTTYPE_MASK_TIMER	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_TIMER	/;"	d
XCHAL_INTTYPE_MASK_UNCONFIGURED	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_UNCONFIGURED	/;"	d
XCHAL_INTTYPE_MASK_UNCONFIGURED	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_UNCONFIGURED	/;"	d
XCHAL_INTTYPE_MASK_UNCONFIGURED	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_UNCONFIGURED	/;"	d
XCHAL_INTTYPE_MASK_WRITE_ERROR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_INTTYPE_MASK_WRITE_ERROR	/;"	d
XCHAL_INTTYPE_MASK_WRITE_ERROR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_INTTYPE_MASK_WRITE_ERROR	/;"	d
XCHAL_INTTYPE_MASK_WRITE_ERROR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_INTTYPE_MASK_WRITE_ERROR	/;"	d
XCHAL_ITLB_ARF_ENTRIES_LOG2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_ITLB_ARF_ENTRIES_LOG2	/;"	d
XCHAL_ITLB_ARF_ENTRIES_LOG2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_ITLB_ARF_ENTRIES_LOG2	/;"	d
XCHAL_KERNEL_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_KERNEL_VECOFS	/;"	d
XCHAL_KERNEL_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_KERNEL_VECOFS	/;"	d
XCHAL_KERNEL_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_KERNEL_VECOFS	/;"	d
XCHAL_KERNEL_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_KERNEL_VECTOR_PADDR	/;"	d
XCHAL_KERNEL_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_KERNEL_VECTOR_PADDR	/;"	d
XCHAL_KERNEL_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_KERNEL_VECTOR_PADDR	/;"	d
XCHAL_KERNEL_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_KERNEL_VECTOR_VADDR	/;"	d
XCHAL_KERNEL_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_KERNEL_VECTOR_VADDR	/;"	d
XCHAL_KERNEL_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_KERNEL_VECTOR_VADDR	/;"	d
XCHAL_LOOP_BUFFER_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_LOOP_BUFFER_SIZE	/;"	d
XCHAL_MAX_INSTRUCTION_SIZE	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_MAX_INSTRUCTION_SIZE	/;"	d
XCHAL_MAX_INSTRUCTION_SIZE	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_MAX_INSTRUCTION_SIZE	/;"	d
XCHAL_MAX_INSTRUCTION_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_MAX_INSTRUCTION_SIZE	/;"	d
XCHAL_MMU_ASID_BITS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_MMU_ASID_BITS	/;"	d
XCHAL_MMU_ASID_BITS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_MMU_ASID_BITS	/;"	d
XCHAL_MMU_ASID_BITS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_MMU_ASID_BITS	/;"	d
XCHAL_MMU_RINGS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_MMU_RINGS	/;"	d
XCHAL_MMU_RINGS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_MMU_RINGS	/;"	d
XCHAL_MMU_RINGS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_MMU_RINGS	/;"	d
XCHAL_MMU_RING_BITS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_MMU_RING_BITS	/;"	d
XCHAL_MMU_RING_BITS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_MMU_RING_BITS	/;"	d
XCHAL_MMU_RING_BITS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_MMU_RING_BITS	/;"	d
XCHAL_NCP_NUM_ATMPS	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XCHAL_NCP_NUM_ATMPS	/;"	d
XCHAL_NCP_NUM_ATMPS	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XCHAL_NCP_NUM_ATMPS	/;"	d
XCHAL_NCP_NUM_ATMPS	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XCHAL_NCP_NUM_ATMPS	/;"	d
XCHAL_NCP_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_NCP_SA_ALIGN	/;"	d
XCHAL_NCP_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_NCP_SA_ALIGN	/;"	d
XCHAL_NCP_SA_ALIGN	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_NCP_SA_ALIGN	/;"	d
XCHAL_NCP_SA_LIST	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_NCP_SA_LIST(/;"	d
XCHAL_NCP_SA_LIST	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_NCP_SA_LIST(/;"	d
XCHAL_NCP_SA_LIST	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_NCP_SA_LIST(/;"	d
XCHAL_NCP_SA_NUM	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_NCP_SA_NUM	/;"	d
XCHAL_NCP_SA_NUM	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_NCP_SA_NUM	/;"	d
XCHAL_NCP_SA_NUM	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_NCP_SA_NUM	/;"	d
XCHAL_NCP_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_NCP_SA_SIZE	/;"	d
XCHAL_NCP_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_NCP_SA_SIZE	/;"	d
XCHAL_NCP_SA_SIZE	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_NCP_SA_SIZE	/;"	d
XCHAL_NMILEVEL	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NMILEVEL	/;"	d
XCHAL_NMILEVEL	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NMILEVEL	/;"	d
XCHAL_NMILEVEL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NMILEVEL	/;"	d
XCHAL_NMI_INTERRUPT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NMI_INTERRUPT	/;"	d
XCHAL_NMI_INTERRUPT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NMI_INTERRUPT	/;"	d
XCHAL_NMI_INTERRUPT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NMI_INTERRUPT	/;"	d
XCHAL_NMI_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NMI_VECOFS	/;"	d
XCHAL_NMI_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NMI_VECOFS	/;"	d
XCHAL_NMI_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NMI_VECOFS	/;"	d
XCHAL_NMI_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NMI_VECTOR_PADDR	/;"	d
XCHAL_NMI_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NMI_VECTOR_PADDR	/;"	d
XCHAL_NMI_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NMI_VECTOR_PADDR	/;"	d
XCHAL_NMI_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NMI_VECTOR_VADDR	/;"	d
XCHAL_NMI_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NMI_VECTOR_VADDR	/;"	d
XCHAL_NMI_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NMI_VECTOR_VADDR	/;"	d
XCHAL_NUM_AREGS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_AREGS	/;"	d
XCHAL_NUM_AREGS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_AREGS	/;"	d
XCHAL_NUM_AREGS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_AREGS	/;"	d
XCHAL_NUM_AREGS_LOG2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_AREGS_LOG2	/;"	d
XCHAL_NUM_AREGS_LOG2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_AREGS_LOG2	/;"	d
XCHAL_NUM_AREGS_LOG2	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_AREGS_LOG2	/;"	d
XCHAL_NUM_CONTEXTS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_CONTEXTS	/;"	d
XCHAL_NUM_CONTEXTS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_CONTEXTS	/;"	d
XCHAL_NUM_CONTEXTS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_CONTEXTS	/;"	d
XCHAL_NUM_DATARAM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_DATARAM	/;"	d
XCHAL_NUM_DATARAM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_DATARAM	/;"	d
XCHAL_NUM_DATARAM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_DATARAM	/;"	d
XCHAL_NUM_DATAROM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_DATAROM	/;"	d
XCHAL_NUM_DATAROM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_DATAROM	/;"	d
XCHAL_NUM_DATAROM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_DATAROM	/;"	d
XCHAL_NUM_DBREAK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_DBREAK	/;"	d
XCHAL_NUM_DBREAK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_DBREAK	/;"	d
XCHAL_NUM_DBREAK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_DBREAK	/;"	d
XCHAL_NUM_EXTINTERRUPTS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_EXTINTERRUPTS	/;"	d
XCHAL_NUM_EXTINTERRUPTS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_EXTINTERRUPTS	/;"	d
XCHAL_NUM_EXTINTERRUPTS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_EXTINTERRUPTS	/;"	d
XCHAL_NUM_IBREAK	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_IBREAK	/;"	d
XCHAL_NUM_IBREAK	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_IBREAK	/;"	d
XCHAL_NUM_IBREAK	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_IBREAK	/;"	d
XCHAL_NUM_INSTRAM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_INSTRAM	/;"	d
XCHAL_NUM_INSTRAM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_INSTRAM	/;"	d
XCHAL_NUM_INSTRAM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_INSTRAM	/;"	d
XCHAL_NUM_INSTROM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_INSTROM	/;"	d
XCHAL_NUM_INSTROM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_INSTROM	/;"	d
XCHAL_NUM_INSTROM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_INSTROM	/;"	d
XCHAL_NUM_INTERRUPTS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_INTERRUPTS	/;"	d
XCHAL_NUM_INTERRUPTS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_INTERRUPTS	/;"	d
XCHAL_NUM_INTERRUPTS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_INTERRUPTS	/;"	d
XCHAL_NUM_INTERRUPTS_LOG2	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_INTERRUPTS_LOG2	/;"	d
XCHAL_NUM_INTERRUPTS_LOG2	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_INTERRUPTS_LOG2	/;"	d
XCHAL_NUM_INTERRUPTS_LOG2	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_INTERRUPTS_LOG2	/;"	d
XCHAL_NUM_INTLEVELS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_INTLEVELS	/;"	d
XCHAL_NUM_INTLEVELS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_INTLEVELS	/;"	d
XCHAL_NUM_INTLEVELS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_INTLEVELS	/;"	d
XCHAL_NUM_LOADSTORE_UNITS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_LOADSTORE_UNITS	/;"	d
XCHAL_NUM_MISC_REGS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_MISC_REGS	/;"	d
XCHAL_NUM_MISC_REGS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_MISC_REGS	/;"	d
XCHAL_NUM_MISC_REGS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_MISC_REGS	/;"	d
XCHAL_NUM_PERF_COUNTERS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_PERF_COUNTERS	/;"	d
XCHAL_NUM_TIMERS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_TIMERS	/;"	d
XCHAL_NUM_TIMERS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_TIMERS	/;"	d
XCHAL_NUM_TIMERS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_TIMERS	/;"	d
XCHAL_NUM_URAM	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_URAM	/;"	d
XCHAL_NUM_URAM	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_URAM	/;"	d
XCHAL_NUM_URAM	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_URAM	/;"	d
XCHAL_NUM_WRITEBUFFER_ENTRIES	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_WRITEBUFFER_ENTRIES	/;"	d
XCHAL_NUM_WRITEBUFFER_ENTRIES	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_WRITEBUFFER_ENTRIES	/;"	d
XCHAL_NUM_WRITEBUFFER_ENTRIES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_WRITEBUFFER_ENTRIES	/;"	d
XCHAL_NUM_XLMI	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_NUM_XLMI	/;"	d
XCHAL_NUM_XLMI	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_NUM_XLMI	/;"	d
XCHAL_NUM_XLMI	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_NUM_XLMI	/;"	d
XCHAL_OP0_FORMAT_LENGTHS	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_OP0_FORMAT_LENGTHS	/;"	d
XCHAL_OP0_FORMAT_LENGTHS	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_OP0_FORMAT_LENGTHS	/;"	d
XCHAL_OP0_FORMAT_LENGTHS	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_OP0_FORMAT_LENGTHS	/;"	d
XCHAL_PREFETCH_BLOCK_ENTRIES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_PREFETCH_BLOCK_ENTRIES	/;"	d
XCHAL_PREFETCH_CASTOUT_LINES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_PREFETCH_CASTOUT_LINES	/;"	d
XCHAL_PREFETCH_ENTRIES	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_PREFETCH_ENTRIES	/;"	d
XCHAL_RESET_VECBASE_OVERLAP	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECBASE_OVERLAP	/;"	d
XCHAL_RESET_VECBASE_OVERLAP	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECBASE_OVERLAP	/;"	d
XCHAL_RESET_VECBASE_OVERLAP	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECBASE_OVERLAP	/;"	d
XCHAL_RESET_VECTOR0_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECTOR0_PADDR	/;"	d
XCHAL_RESET_VECTOR0_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECTOR0_PADDR	/;"	d
XCHAL_RESET_VECTOR0_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECTOR0_PADDR	/;"	d
XCHAL_RESET_VECTOR0_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECTOR0_VADDR	/;"	d
XCHAL_RESET_VECTOR0_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECTOR0_VADDR	/;"	d
XCHAL_RESET_VECTOR0_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECTOR0_VADDR	/;"	d
XCHAL_RESET_VECTOR1_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECTOR1_PADDR	/;"	d
XCHAL_RESET_VECTOR1_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECTOR1_PADDR	/;"	d
XCHAL_RESET_VECTOR1_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECTOR1_PADDR	/;"	d
XCHAL_RESET_VECTOR1_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECTOR1_VADDR	/;"	d
XCHAL_RESET_VECTOR1_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECTOR1_VADDR	/;"	d
XCHAL_RESET_VECTOR1_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECTOR1_VADDR	/;"	d
XCHAL_RESET_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECTOR_PADDR	/;"	d
XCHAL_RESET_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECTOR_PADDR	/;"	d
XCHAL_RESET_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECTOR_PADDR	/;"	d
XCHAL_RESET_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_RESET_VECTOR_VADDR	/;"	d
XCHAL_RESET_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_RESET_VECTOR_VADDR	/;"	d
XCHAL_RESET_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_RESET_VECTOR_VADDR	/;"	d
XCHAL_SA_NUM_ATMPS	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XCHAL_SA_NUM_ATMPS	/;"	d
XCHAL_SA_NUM_ATMPS	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XCHAL_SA_NUM_ATMPS	/;"	d
XCHAL_SA_NUM_ATMPS	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XCHAL_SA_NUM_ATMPS	/;"	d
XCHAL_SPANNING_WAY	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_SPANNING_WAY	/;"	d
XCHAL_SPANNING_WAY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_SPANNING_WAY	/;"	d
XCHAL_SW_VERSION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_SW_VERSION	/;"	d
XCHAL_SW_VERSION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_SW_VERSION	/;"	d
XCHAL_SW_VERSION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_SW_VERSION	/;"	d
XCHAL_TIMER0_INTERRUPT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_TIMER0_INTERRUPT	/;"	d
XCHAL_TIMER0_INTERRUPT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_TIMER0_INTERRUPT	/;"	d
XCHAL_TIMER0_INTERRUPT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TIMER0_INTERRUPT	/;"	d
XCHAL_TIMER1_INTERRUPT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_TIMER1_INTERRUPT	/;"	d
XCHAL_TIMER1_INTERRUPT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_TIMER1_INTERRUPT	/;"	d
XCHAL_TIMER1_INTERRUPT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TIMER1_INTERRUPT	/;"	d
XCHAL_TIMER2_INTERRUPT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_TIMER2_INTERRUPT	/;"	d
XCHAL_TIMER2_INTERRUPT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_TIMER2_INTERRUPT	/;"	d
XCHAL_TIMER2_INTERRUPT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TIMER2_INTERRUPT	/;"	d
XCHAL_TIMER3_INTERRUPT	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_TIMER3_INTERRUPT	/;"	d
XCHAL_TIMER3_INTERRUPT	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_TIMER3_INTERRUPT	/;"	d
XCHAL_TIMER3_INTERRUPT	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TIMER3_INTERRUPT	/;"	d
XCHAL_TOTAL_SA_ALIGN	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_TOTAL_SA_ALIGN	/;"	d
XCHAL_TOTAL_SA_ALIGN	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_TOTAL_SA_ALIGN	/;"	d
XCHAL_TOTAL_SA_ALIGN	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_TOTAL_SA_ALIGN	/;"	d
XCHAL_TOTAL_SA_SIZE	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define XCHAL_TOTAL_SA_SIZE	/;"	d
XCHAL_TOTAL_SA_SIZE	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define XCHAL_TOTAL_SA_SIZE	/;"	d
XCHAL_TOTAL_SA_SIZE	arch/xtensa/include/asm/arch-de212/tie.h	/^#define XCHAL_TOTAL_SA_SIZE	/;"	d
XCHAL_TRAX_ATB_WIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TRAX_ATB_WIDTH	/;"	d
XCHAL_TRAX_MEM_SHAREABLE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TRAX_MEM_SHAREABLE	/;"	d
XCHAL_TRAX_MEM_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TRAX_MEM_SIZE	/;"	d
XCHAL_TRAX_TIME_WIDTH	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_TRAX_TIME_WIDTH	/;"	d
XCHAL_UNALIGNED_LOAD_EXCEPTION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_UNALIGNED_LOAD_EXCEPTION	/;"	d
XCHAL_UNALIGNED_LOAD_EXCEPTION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_UNALIGNED_LOAD_EXCEPTION	/;"	d
XCHAL_UNALIGNED_LOAD_EXCEPTION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_UNALIGNED_LOAD_EXCEPTION	/;"	d
XCHAL_UNALIGNED_LOAD_HW	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_UNALIGNED_LOAD_HW	/;"	d
XCHAL_UNALIGNED_LOAD_HW	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_UNALIGNED_LOAD_HW	/;"	d
XCHAL_UNALIGNED_STORE_EXCEPTION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_UNALIGNED_STORE_EXCEPTION	/;"	d
XCHAL_UNALIGNED_STORE_EXCEPTION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_UNALIGNED_STORE_EXCEPTION	/;"	d
XCHAL_UNALIGNED_STORE_EXCEPTION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_UNALIGNED_STORE_EXCEPTION	/;"	d
XCHAL_UNALIGNED_STORE_HW	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_UNALIGNED_STORE_HW	/;"	d
XCHAL_UNALIGNED_STORE_HW	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_UNALIGNED_STORE_HW	/;"	d
XCHAL_USER_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_USER_VECOFS	/;"	d
XCHAL_USER_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_USER_VECOFS	/;"	d
XCHAL_USER_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_USER_VECOFS	/;"	d
XCHAL_USER_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_USER_VECTOR_PADDR	/;"	d
XCHAL_USER_VECTOR_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_USER_VECTOR_PADDR	/;"	d
XCHAL_USER_VECTOR_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_USER_VECTOR_PADDR	/;"	d
XCHAL_USER_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_USER_VECTOR_VADDR	/;"	d
XCHAL_USER_VECTOR_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_USER_VECTOR_VADDR	/;"	d
XCHAL_USER_VECTOR_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_USER_VECTOR_VADDR	/;"	d
XCHAL_USE_MEMCTL	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_USE_MEMCTL	/;"	d
XCHAL_VECBASE_RESET_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_VECBASE_RESET_PADDR	/;"	d
XCHAL_VECBASE_RESET_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_VECBASE_RESET_PADDR	/;"	d
XCHAL_VECBASE_RESET_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_VECBASE_RESET_PADDR	/;"	d
XCHAL_VECBASE_RESET_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_VECBASE_RESET_VADDR	/;"	d
XCHAL_VECBASE_RESET_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_VECBASE_RESET_VADDR	/;"	d
XCHAL_VECBASE_RESET_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_VECBASE_RESET_VADDR	/;"	d
XCHAL_WINDOW_OF12_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_OF12_VECOFS	/;"	d
XCHAL_WINDOW_OF12_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_OF12_VECOFS	/;"	d
XCHAL_WINDOW_OF12_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_OF12_VECOFS	/;"	d
XCHAL_WINDOW_OF4_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_OF4_VECOFS	/;"	d
XCHAL_WINDOW_OF4_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_OF4_VECOFS	/;"	d
XCHAL_WINDOW_OF4_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_OF4_VECOFS	/;"	d
XCHAL_WINDOW_OF8_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_OF8_VECOFS	/;"	d
XCHAL_WINDOW_OF8_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_OF8_VECOFS	/;"	d
XCHAL_WINDOW_OF8_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_OF8_VECOFS	/;"	d
XCHAL_WINDOW_UF12_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_UF12_VECOFS	/;"	d
XCHAL_WINDOW_UF12_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_UF12_VECOFS	/;"	d
XCHAL_WINDOW_UF12_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_UF12_VECOFS	/;"	d
XCHAL_WINDOW_UF4_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_UF4_VECOFS	/;"	d
XCHAL_WINDOW_UF4_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_UF4_VECOFS	/;"	d
XCHAL_WINDOW_UF4_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_UF4_VECOFS	/;"	d
XCHAL_WINDOW_UF8_VECOFS	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_UF8_VECOFS	/;"	d
XCHAL_WINDOW_UF8_VECOFS	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_UF8_VECOFS	/;"	d
XCHAL_WINDOW_UF8_VECOFS	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_UF8_VECOFS	/;"	d
XCHAL_WINDOW_VECTORS_PADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_VECTORS_PADDR	/;"	d
XCHAL_WINDOW_VECTORS_PADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_VECTORS_PADDR	/;"	d
XCHAL_WINDOW_VECTORS_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_VECTORS_PADDR	/;"	d
XCHAL_WINDOW_VECTORS_VADDR	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_WINDOW_VECTORS_VADDR	/;"	d
XCHAL_WINDOW_VECTORS_VADDR	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_WINDOW_VECTORS_VADDR	/;"	d
XCHAL_WINDOW_VECTORS_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_WINDOW_VECTORS_VADDR	/;"	d
XCHAL_XEA_VERSION	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define XCHAL_XEA_VERSION	/;"	d
XCHAL_XEA_VERSION	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define XCHAL_XEA_VERSION	/;"	d
XCHAL_XEA_VERSION	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_XEA_VERSION	/;"	d
XCHAL_XLMI0_ECC_PARITY	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_XLMI0_ECC_PARITY	/;"	d
XCHAL_XLMI0_PADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_XLMI0_PADDR	/;"	d
XCHAL_XLMI0_SIZE	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_XLMI0_SIZE	/;"	d
XCHAL_XLMI0_VADDR	arch/xtensa/include/asm/arch-de212/core.h	/^#define XCHAL_XLMI0_VADDR	/;"	d
XCKE	drivers/usb/host/r8a66597.h	/^#define	XCKE	/;"	d
XCL205_EN_GPIO_CON	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_CON	/;"	d
XCL205_EN_GPIO_CON_CFG	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_CON_CFG	/;"	d
XCL205_EN_GPIO_DAT_CFG	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_DAT_CFG	/;"	d
XCL205_EN_GPIO_DRV_CFG	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_DRV_CFG	/;"	d
XCL205_EN_GPIO_OFFSET	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_OFFSET	/;"	d
XCL205_EN_GPIO_PIN	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_PIN	/;"	d
XCL205_EN_GPIO_PUD_CFG	board/samsung/odroid/setup.h	/^#define XCL205_EN_GPIO_PUD_CFG	/;"	d
XCL205_GPIO_BASE	board/samsung/odroid/setup.h	/^#define XCL205_GPIO_BASE	/;"	d
XCL205_STATE_GPIO_CON	board/samsung/odroid/setup.h	/^#define XCL205_STATE_GPIO_CON	/;"	d
XCL205_STATE_GPIO_CON_CFG	board/samsung/odroid/setup.h	/^#define XCL205_STATE_GPIO_CON_CFG	/;"	d
XCL205_STATE_GPIO_DAT	board/samsung/odroid/setup.h	/^#define XCL205_STATE_GPIO_DAT	/;"	d
XCL205_STATE_GPIO_OFFSET	board/samsung/odroid/setup.h	/^#define XCL205_STATE_GPIO_OFFSET	/;"	d
XCL205_STATE_GPIO_PIN	board/samsung/odroid/setup.h	/^#define XCL205_STATE_GPIO_PIN	/;"	d
XCL205_STATE_GPIO_PUD_CFG	board/samsung/odroid/setup.h	/^#define XCL205_STATE_GPIO_PUD_CFG	/;"	d
XCOMMENT	board/esd/common/xilinx_jtag/micro.c	/^#define XCOMMENT /;"	d	file:
XCOMPLETE	board/esd/common/xilinx_jtag/micro.c	/^#define XCOMPLETE /;"	d	file:
XCRT_CNT_EN	include/radeon.h	/^#define XCRT_CNT_EN	/;"	d
XCVRSELECT_MASK	drivers/usb/phy/twl4030.c	/^#define XCVRSELECT_MASK	/;"	d	file:
XCVR_DUMMY1	include/linux/ethtool.h	/^#define XCVR_DUMMY1	/;"	d
XCVR_DUMMY2	include/linux/ethtool.h	/^#define XCVR_DUMMY2	/;"	d
XCVR_DUMMY3	include/linux/ethtool.h	/^#define XCVR_DUMMY3	/;"	d
XCVR_EXTERNAL	include/linux/ethtool.h	/^#define XCVR_EXTERNAL	/;"	d
XCVR_INTERNAL	include/linux/ethtool.h	/^#define XCVR_INTERNAL	/;"	d
XDA	arch/sh/include/asm/cpu_sh7722.h	/^#define XDA	/;"	d
XDEV_FS	drivers/usb/host/xhci.h	/^#define	XDEV_FS	/;"	d
XDEV_HS	drivers/usb/host/xhci.h	/^#define	XDEV_HS	/;"	d
XDEV_LS	drivers/usb/host/xhci.h	/^#define	XDEV_LS	/;"	d
XDEV_RESUME	drivers/usb/host/xhci.h	/^#define XDEV_RESUME	/;"	d
XDEV_SS	drivers/usb/host/xhci.h	/^#define	XDEV_SS	/;"	d
XDEV_U0	drivers/usb/host/xhci.h	/^#define XDEV_U0	/;"	d
XDEV_U2	drivers/usb/host/xhci.h	/^#define XDEV_U2	/;"	d
XDEV_U3	drivers/usb/host/xhci.h	/^#define XDEV_U3	/;"	d
XDR_POP	arch/arm/include/asm/arch-omap3/omap.h	/^#define XDR_POP	/;"	d
XDVFS1_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XDVFS1_MARK, PORT27_I2C_SCL2_MARK, PORT27_I2C_SCL3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
XDVFS2_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XDVFS2_MARK, PORT28_I2C_SDA2_MARK, PORT28_I2C_SDA3_MARK, \\$/;"	e	enum:__anon991a8e2d0103	file:
XEA	arch/sh/include/asm/cpu_sh7722.h	/^#define XEA	/;"	d
XEBARX_ATTR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEBARX_ATTR_MASK	/;"	d
XEBARX_ATTR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEBARX_ATTR_OFFS	/;"	d
XEBARX_BASE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEBARX_BASE_MASK	/;"	d
XEBARX_BASE_OFFS	arch/arm/mach-mvebu/dram.c	/^#define XEBARX_BASE_OFFS	/;"	d	file:
XEBARX_BASE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEBARX_BASE_OFFS	/;"	d
XEBARX_TARGET_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEBARX_TARGET_MASK	/;"	d
XEBARX_TARGET_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEBARX_TARGET_OFFS	/;"	d
XECAR_SLICE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XECAR_SLICE_MASK(/;"	d
XECAR_SLICE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XECAR_SLICE_OFFS(/;"	d
XEDBR_PARITY_ERR_INSR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEDBR_PARITY_ERR_INSR_MASK	/;"	d
XEDBR_PARITY_ERR_INSR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEDBR_PARITY_ERR_INSR_OFFS	/;"	d
XEDBR_XBAR_ERR_INSR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEDBR_XBAR_ERR_INSR_MASK	/;"	d
XEDBR_XBAR_ERR_INSR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEDBR_XBAR_ERR_INSR_OFFS	/;"	d
XEEAR_ERR_ADDR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEEAR_ERR_ADDR_MASK	/;"	d
XEEAR_ERR_ADDR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEEAR_ERR_ADDR_OFFS	/;"	d
XEECR_ERR_TYPE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEECR_ERR_TYPE_MASK	/;"	d
XEECR_ERR_TYPE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEECR_ERR_TYPE_OFFS	/;"	d
XEHARRX_REMAP_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEHARRX_REMAP_MASK	/;"	d
XEHARRX_REMAP_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEHARRX_REMAP_OFFS	/;"	d
XEICR_CAUSE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEICR_CAUSE_MASK(/;"	d
XEICR_CAUSE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEICR_CAUSE_OFFS(/;"	d
XEICR_CHAN_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEICR_CHAN_OFFS	/;"	d
XEICR_COMP_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEICR_COMP_MASK(/;"	d
XEICR_COMP_MASK_ALL	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEICR_COMP_MASK_ALL	/;"	d
XEICR_ERR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEICR_ERR_MASK	/;"	d
XEIVRH_INIT_VAL_H_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEIVRH_INIT_VAL_H_MASK	/;"	d
XEIVRH_INIT_VAL_H_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEIVRH_INIT_VAL_H_OFFS	/;"	d
XEIVRL_INIT_VAL_L_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEIVRL_INIT_VAL_L_MASK	/;"	d
XEIVRL_INIT_VAL_L_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEIVRL_INIT_VAL_L_OFFS	/;"	d
XEL_MDIOADDR_OP_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOADDR_OP_MASK	/;"	d	file:
XEL_MDIOADDR_PHYADR_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOADDR_PHYADR_MASK /;"	d	file:
XEL_MDIOADDR_PHYADR_SHIFT	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOADDR_PHYADR_SHIFT /;"	d	file:
XEL_MDIOADDR_REGADR_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOADDR_REGADR_MASK /;"	d	file:
XEL_MDIOCTRL_MDIOEN_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOCTRL_MDIOEN_MASK /;"	d	file:
XEL_MDIOCTRL_MDIOSTS_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOCTRL_MDIOSTS_MASK /;"	d	file:
XEL_MDIORD_RDDATA_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIORD_RDDATA_MASK	/;"	d	file:
XEL_MDIOWR_WRDATA_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_MDIOWR_WRDATA_MASK	/;"	d	file:
XEL_RSR_RECV_DONE_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_RSR_RECV_DONE_MASK	/;"	d	file:
XEL_RSR_RECV_IE_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_RSR_RECV_IE_MASK	/;"	d	file:
XEL_TPLR_LENGTH_MASK_HI	drivers/net/xilinx_emaclite.c	/^#define XEL_TPLR_LENGTH_MASK_HI	/;"	d	file:
XEL_TPLR_LENGTH_MASK_LO	drivers/net/xilinx_emaclite.c	/^#define XEL_TPLR_LENGTH_MASK_LO	/;"	d	file:
XEL_TSR_PROGRAM_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_TSR_PROGRAM_MASK	/;"	d	file:
XEL_TSR_PROG_MAC_ADDR	drivers/net/xilinx_emaclite.c	/^#define XEL_TSR_PROG_MAC_ADDR	/;"	d	file:
XEL_TSR_XMIT_BUSY_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_TSR_XMIT_BUSY_MASK	/;"	d	file:
XEL_TSR_XMIT_IE_MASK	drivers/net/xilinx_emaclite.c	/^#define XEL_TSR_XMIT_IE_MASK	/;"	d	file:
XENDDR	board/esd/common/xilinx_jtag/micro.c	/^#define XENDDR /;"	d	file:
XENDIR	board/esd/common/xilinx_jtag/micro.c	/^#define XENDIR /;"	d	file:
XENDXR_PAUSE	board/esd/common/xilinx_jtag/micro.c	/^#define XENDXR_PAUSE /;"	d	file:
XENDXR_RUNTEST	board/esd/common/xilinx_jtag/micro.c	/^#define XENDXR_RUNTEST /;"	d	file:
XER	arch/powerpc/include/asm/processor.h	/^#define XER	/;"	d
XESMRX_SIZE_MASK_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XESMRX_SIZE_MASK_MASK	/;"	d
XESMRX_SIZE_MASK_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XESMRX_SIZE_MASK_OFFS	/;"	d
XETMCR_SECTION_SIZE_CTRL_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_SECTION_SIZE_CTRL_MASK	/;"	d
XETMCR_SECTION_SIZE_CTRL_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_SECTION_SIZE_CTRL_OFFS	/;"	d
XETMCR_SECTION_SIZE_MAX_VALUE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_SECTION_SIZE_MAX_VALUE	/;"	d
XETMCR_SECTION_SIZE_MIN_VALUE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_SECTION_SIZE_MIN_VALUE	/;"	d
XETMCR_TIMER_EN_DISABLE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_TIMER_EN_DISABLE	/;"	d
XETMCR_TIMER_EN_ENABLE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_TIMER_EN_ENABLE	/;"	d
XETMCR_TIMER_EN_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_TIMER_EN_MASK	/;"	d
XETMCR_TIMER_EN_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCR_TIMER_EN_OFFS	/;"	d
XETMCVR_TIMER_CRNT_VAL_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCVR_TIMER_CRNT_VAL_MASK	/;"	d
XETMCVR_TIMER_CRNT_VAL_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMCVR_TIMER_CRNT_VAL_OFFS	/;"	d
XETMIVR_TIMER_INIT_VAL_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMIVR_TIMER_INIT_VAL_MASK	/;"	d
XETMIVR_TIMER_INIT_VAL_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XETMIVR_TIMER_INIT_VAL_OFFS	/;"	d
XEXACTR_XEPAUSE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XEPAUSE_MASK	/;"	d
XEXACTR_XEPAUSE_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XEPAUSE_MASK	/;"	d
XEXACTR_XEPAUSE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XEPAUSE_OFFS	/;"	d
XEXACTR_XEPAUSE_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XEPAUSE_OFFS	/;"	d
XEXACTR_XERESTART_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XERESTART_MASK	/;"	d
XEXACTR_XERESTART_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XERESTART_MASK	/;"	d
XEXACTR_XERESTART_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XERESTART_OFFS	/;"	d
XEXACTR_XERESTART_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XERESTART_OFFS	/;"	d
XEXACTR_XESTART_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTART_MASK	/;"	d
XEXACTR_XESTART_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTART_MASK	/;"	d
XEXACTR_XESTART_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTART_OFFS	/;"	d
XEXACTR_XESTART_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTART_OFFS	/;"	d
XEXACTR_XESTATUS_ACTIVE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTATUS_ACTIVE	/;"	d
XEXACTR_XESTATUS_ACTIVE	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTATUS_ACTIVE	/;"	d
XEXACTR_XESTATUS_IDLE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTATUS_IDLE	/;"	d
XEXACTR_XESTATUS_IDLE	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTATUS_IDLE	/;"	d
XEXACTR_XESTATUS_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTATUS_MASK	/;"	d
XEXACTR_XESTATUS_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTATUS_MASK	/;"	d
XEXACTR_XESTATUS_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTATUS_OFFS	/;"	d
XEXACTR_XESTATUS_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTATUS_OFFS	/;"	d
XEXACTR_XESTATUS_PAUSED	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTATUS_PAUSED	/;"	d
XEXACTR_XESTATUS_PAUSED	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTATUS_PAUSED	/;"	d
XEXACTR_XESTOP_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTOP_MASK	/;"	d
XEXACTR_XESTOP_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTOP_MASK	/;"	d
XEXACTR_XESTOP_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXACTR_XESTOP_OFFS	/;"	d
XEXACTR_XESTOP_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXACTR_XESTOP_OFFS	/;"	d
XEXAOCR_OVR_BAR	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXAOCR_OVR_BAR(/;"	d
XEXAOCR_OVR_EN_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXAOCR_OVR_EN_MASK(/;"	d
XEXAOCR_OVR_EN_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXAOCR_OVR_EN_OFFS(/;"	d
XEXAOCR_OVR_PTR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXAOCR_OVR_PTR_MASK(/;"	d
XEXAOCR_OVR_PTR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXAOCR_OVR_PTR_OFFS(/;"	d
XEXBCR_BYTE_CNT_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXBCR_BYTE_CNT_MASK	/;"	d
XEXBCR_BYTE_CNT_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXBCR_BYTE_CNT_OFFS	/;"	d
XEXBSR_BLOCK_SIZE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_MASK	/;"	d
XEXBSR_BLOCK_SIZE_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_MASK	/;"	d
XEXBSR_BLOCK_SIZE_MAX_VALUE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_MAX_VALUE	/;"	d
XEXBSR_BLOCK_SIZE_MAX_VALUE	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_MAX_VALUE	/;"	d
XEXBSR_BLOCK_SIZE_MIN_VALUE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_MIN_VALUE	/;"	d
XEXBSR_BLOCK_SIZE_MIN_VALUE	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_MIN_VALUE	/;"	d
XEXBSR_BLOCK_SIZE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_OFFS	/;"	d
XEXBSR_BLOCK_SIZE_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXBSR_BLOCK_SIZE_OFFS	/;"	d
XEXCDPR_CURRENT_DESC_PTR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCDPR_CURRENT_DESC_PTR_MASK	/;"	d
XEXCDPR_CURRENT_DESC_PTR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCDPR_CURRENT_DESC_PTR_OFFS	/;"	d
XEXCR_DES_SWP_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DES_SWP_MASK	/;"	d
XEXCR_DES_SWP_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DES_SWP_MASK	/;"	d
XEXCR_DES_SWP_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DES_SWP_OFFS	/;"	d
XEXCR_DES_SWP_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DES_SWP_OFFS	/;"	d
XEXCR_DRD_RES_SWP_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DRD_RES_SWP_MASK	/;"	d
XEXCR_DRD_RES_SWP_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DRD_RES_SWP_MASK	/;"	d
XEXCR_DRD_RES_SWP_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DRD_RES_SWP_OFFS	/;"	d
XEXCR_DRD_RES_SWP_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DRD_RES_SWP_OFFS	/;"	d
XEXCR_DST_BURST_LIMIT_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DST_BURST_LIMIT_MASK	/;"	d
XEXCR_DST_BURST_LIMIT_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DST_BURST_LIMIT_MASK	/;"	d
XEXCR_DST_BURST_LIMIT_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DST_BURST_LIMIT_OFFS	/;"	d
XEXCR_DST_BURST_LIMIT_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DST_BURST_LIMIT_OFFS	/;"	d
XEXCR_DWR_REQ_SWP_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DWR_REQ_SWP_MASK	/;"	d
XEXCR_DWR_REQ_SWP_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DWR_REQ_SWP_MASK	/;"	d
XEXCR_DWR_REQ_SWP_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_DWR_REQ_SWP_OFFS	/;"	d
XEXCR_DWR_REQ_SWP_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_DWR_REQ_SWP_OFFS	/;"	d
XEXCR_OPERATION_MODE_CRC	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_CRC	/;"	d
XEXCR_OPERATION_MODE_CRC	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_CRC	/;"	d
XEXCR_OPERATION_MODE_DMA	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_DMA	/;"	d
XEXCR_OPERATION_MODE_DMA	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_DMA	/;"	d
XEXCR_OPERATION_MODE_ECC	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_ECC	/;"	d
XEXCR_OPERATION_MODE_ECC	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_ECC	/;"	d
XEXCR_OPERATION_MODE_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_MASK	/;"	d
XEXCR_OPERATION_MODE_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_MASK	/;"	d
XEXCR_OPERATION_MODE_MEM_INIT	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_MEM_INIT	/;"	d
XEXCR_OPERATION_MODE_MEM_INIT	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_MEM_INIT	/;"	d
XEXCR_OPERATION_MODE_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_OFFS	/;"	d
XEXCR_OPERATION_MODE_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_OFFS	/;"	d
XEXCR_OPERATION_MODE_XOR	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_OPERATION_MODE_XOR	/;"	d
XEXCR_OPERATION_MODE_XOR	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_OPERATION_MODE_XOR	/;"	d
XEXCR_REG_ACC_PROTECT_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_REG_ACC_PROTECT_MASK	/;"	d
XEXCR_REG_ACC_PROTECT_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_REG_ACC_PROTECT_MASK	/;"	d
XEXCR_REG_ACC_PROTECT_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_REG_ACC_PROTECT_OFFS	/;"	d
XEXCR_REG_ACC_PROTECT_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_REG_ACC_PROTECT_OFFS	/;"	d
XEXCR_SRC_BURST_LIMIT_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_SRC_BURST_LIMIT_MASK	/;"	d
XEXCR_SRC_BURST_LIMIT_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_SRC_BURST_LIMIT_MASK	/;"	d
XEXCR_SRC_BURST_LIMIT_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXCR_SRC_BURST_LIMIT_OFFS	/;"	d
XEXCR_SRC_BURST_LIMIT_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXCR_SRC_BURST_LIMIT_OFFS	/;"	d
XEXDPR_DST_PTR_CRC_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXDPR_DST_PTR_CRC_MASK	/;"	d
XEXDPR_DST_PTR_CRC_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXDPR_DST_PTR_CRC_MASK	/;"	d
XEXDPR_DST_PTR_DMA_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXDPR_DST_PTR_DMA_MASK	/;"	d
XEXDPR_DST_PTR_DMA_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXDPR_DST_PTR_DMA_MASK	/;"	d
XEXDPR_DST_PTR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXDPR_DST_PTR_MASK	/;"	d
XEXDPR_DST_PTR_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXDPR_DST_PTR_MASK	/;"	d
XEXDPR_DST_PTR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXDPR_DST_PTR_OFFS	/;"	d
XEXDPR_DST_PTR_OFFS	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXDPR_DST_PTR_OFFS	/;"	d
XEXDPR_DST_PTR_XOR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXDPR_DST_PTR_XOR_MASK	/;"	d
XEXDPR_DST_PTR_XOR_MASK	drivers/ddr/marvell/axp/xor_regs.h	/^#define XEXDPR_DST_PTR_XOR_MASK	/;"	d
XEXNDPR_NEXT_DESC_PTR_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXNDPR_NEXT_DESC_PTR_MASK	/;"	d
XEXNDPR_NEXT_DESC_PTR_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXNDPR_NEXT_DESC_PTR_OFFS	/;"	d
XEXWCR_WIN_ACC_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_ACC_MASK(/;"	d
XEXWCR_WIN_ACC_NO_ACC	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_ACC_NO_ACC(/;"	d
XEXWCR_WIN_ACC_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_ACC_OFFS(/;"	d
XEXWCR_WIN_ACC_RO	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_ACC_RO(/;"	d
XEXWCR_WIN_ACC_RW	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_ACC_RW(/;"	d
XEXWCR_WIN_EN_DISABLE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_EN_DISABLE(/;"	d
XEXWCR_WIN_EN_ENABLE	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_EN_ENABLE(/;"	d
XEXWCR_WIN_EN_MASK	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_EN_MASK(/;"	d
XEXWCR_WIN_EN_OFFS	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XEXWCR_WIN_EN_OFFS(/;"	d
XFERTYP	include/fsl_esdhc.h	/^#define XFERTYP	/;"	d
XFERTYP_AC12EN	include/fsl_esdhc.h	/^#define XFERTYP_AC12EN	/;"	d
XFERTYP_BCEN	include/fsl_esdhc.h	/^#define XFERTYP_BCEN	/;"	d
XFERTYP_CCCEN	include/fsl_esdhc.h	/^#define XFERTYP_CCCEN	/;"	d
XFERTYP_CICEN	include/fsl_esdhc.h	/^#define XFERTYP_CICEN	/;"	d
XFERTYP_CMD	include/fsl_esdhc.h	/^#define XFERTYP_CMD(/;"	d
XFERTYP_CMDTYP_ABORT	include/fsl_esdhc.h	/^#define XFERTYP_CMDTYP_ABORT	/;"	d
XFERTYP_CMDTYP_NORMAL	include/fsl_esdhc.h	/^#define XFERTYP_CMDTYP_NORMAL	/;"	d
XFERTYP_CMDTYP_RESUME	include/fsl_esdhc.h	/^#define XFERTYP_CMDTYP_RESUME	/;"	d
XFERTYP_CMDTYP_SUSPEND	include/fsl_esdhc.h	/^#define XFERTYP_CMDTYP_SUSPEND	/;"	d
XFERTYP_DDREN	include/fsl_esdhc.h	/^#define XFERTYP_DDREN	/;"	d
XFERTYP_DMAEN	include/fsl_esdhc.h	/^#define XFERTYP_DMAEN	/;"	d
XFERTYP_DPSEL	include/fsl_esdhc.h	/^#define XFERTYP_DPSEL	/;"	d
XFERTYP_DTDSEL	include/fsl_esdhc.h	/^#define XFERTYP_DTDSEL	/;"	d
XFERTYP_MSBSEL	include/fsl_esdhc.h	/^#define XFERTYP_MSBSEL	/;"	d
XFERTYP_RSPTYP_136	include/fsl_esdhc.h	/^#define XFERTYP_RSPTYP_136	/;"	d
XFERTYP_RSPTYP_48	include/fsl_esdhc.h	/^#define XFERTYP_RSPTYP_48	/;"	d
XFERTYP_RSPTYP_48_BUSY	include/fsl_esdhc.h	/^#define XFERTYP_RSPTYP_48_BUSY	/;"	d
XFERTYP_RSPTYP_NONE	include/fsl_esdhc.h	/^#define XFERTYP_RSPTYP_NONE	/;"	d
XFER_DIR	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define                  XFER_DIR /;"	d
XFER_FINISH_TOUT	include/linux/mtd/st_smi.h	/^#define XFER_FINISH_TOUT	/;"	d
XFER_MW_DMA_0	include/libata.h	/^	XFER_MW_DMA_0		= 0x20,$/;"	e	enum:__anoneacac85b0103
XFER_MW_DMA_1	include/libata.h	/^	XFER_MW_DMA_1		= 0x21,$/;"	e	enum:__anoneacac85b0103
XFER_MW_DMA_2	include/libata.h	/^	XFER_MW_DMA_2		= 0x22,$/;"	e	enum:__anoneacac85b0103
XFER_MW_DMA_3	include/libata.h	/^	XFER_MW_DMA_3		= 0x23,	\/* CFA only *\/$/;"	e	enum:__anoneacac85b0103
XFER_MW_DMA_4	include/libata.h	/^	XFER_MW_DMA_4		= 0x24,	\/* CFA only *\/$/;"	e	enum:__anoneacac85b0103
XFER_PIO_0	include/libata.h	/^	XFER_PIO_0		= 0x08,$/;"	e	enum:__anoneacac85b0103
XFER_PIO_1	include/libata.h	/^	XFER_PIO_1		= 0x09,$/;"	e	enum:__anoneacac85b0103
XFER_PIO_2	include/libata.h	/^	XFER_PIO_2		= 0x0A,$/;"	e	enum:__anoneacac85b0103
XFER_PIO_3	include/libata.h	/^	XFER_PIO_3		= 0x0B,$/;"	e	enum:__anoneacac85b0103
XFER_PIO_4	include/libata.h	/^	XFER_PIO_4		= 0x0C,$/;"	e	enum:__anoneacac85b0103
XFER_PIO_5	include/libata.h	/^	XFER_PIO_5		= 0x0D,	\/* CFA only *\/$/;"	e	enum:__anoneacac85b0103
XFER_PIO_6	include/libata.h	/^	XFER_PIO_6		= 0x0E,	\/* CFA only *\/$/;"	e	enum:__anoneacac85b0103
XFER_PIO_SLOW	include/libata.h	/^	XFER_PIO_SLOW		= 0x00,$/;"	e	enum:__anoneacac85b0103
XFER_SW_DMA_0	include/libata.h	/^	XFER_SW_DMA_0		= 0x10,$/;"	e	enum:__anoneacac85b0103
XFER_SW_DMA_1	include/libata.h	/^	XFER_SW_DMA_1		= 0x11,$/;"	e	enum:__anoneacac85b0103
XFER_SW_DMA_2	include/libata.h	/^	XFER_SW_DMA_2		= 0x12,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_0	include/libata.h	/^	XFER_UDMA_0		= 0x40,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_1	include/libata.h	/^	XFER_UDMA_1		= 0x41,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_2	include/libata.h	/^	XFER_UDMA_2		= 0x42,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_3	include/libata.h	/^	XFER_UDMA_3		= 0x43,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_4	include/libata.h	/^	XFER_UDMA_4		= 0x44,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_5	include/libata.h	/^	XFER_UDMA_5		= 0x45,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_6	include/libata.h	/^	XFER_UDMA_6		= 0x46,$/;"	e	enum:__anoneacac85b0103
XFER_UDMA_7	include/libata.h	/^	XFER_UDMA_7		= 0x47,$/;"	e	enum:__anoneacac85b0103
XFI1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI1,$/;"	e	enum:srds_prtcl
XFI2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI2,$/;"	e	enum:srds_prtcl
XFI3	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI3,$/;"	e	enum:srds_prtcl
XFI4	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI4,$/;"	e	enum:srds_prtcl
XFI5	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI5,$/;"	e	enum:srds_prtcl
XFI6	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI6,$/;"	e	enum:srds_prtcl
XFI7	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI7,$/;"	e	enum:srds_prtcl
XFI8	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI8,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC1	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI_FM1_MAC1,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC1	arch/powerpc/include/asm/fsl_serdes.h	/^	XFI_FM1_MAC1,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI_FM1_MAC10,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC10	arch/powerpc/include/asm/fsl_serdes.h	/^	XFI_FM1_MAC10,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC2	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI_FM1_MAC2,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC2	arch/powerpc/include/asm/fsl_serdes.h	/^	XFI_FM1_MAC2,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI_FM1_MAC9,$/;"	e	enum:srds_prtcl
XFI_FM1_MAC9	arch/powerpc/include/asm/fsl_serdes.h	/^	XFI_FM1_MAC9,$/;"	e	enum:srds_prtcl
XFI_FM2_MAC10	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI_FM2_MAC10,$/;"	e	enum:srds_prtcl
XFI_FM2_MAC10	arch/powerpc/include/asm/fsl_serdes.h	/^	XFI_FM2_MAC10,$/;"	e	enum:srds_prtcl
XFI_FM2_MAC9	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^	XFI_FM2_MAC9,$/;"	e	enum:srds_prtcl
XFI_FM2_MAC9	arch/powerpc/include/asm/fsl_serdes.h	/^	XFI_FM2_MAC9,$/;"	e	enum:srds_prtcl
XFL_MASK	include/bedbug/ppc.h	/^#define XFL_MASK /;"	d
XFL_OPCODE	include/bedbug/ppc.h	/^#define XFL_OPCODE(/;"	d
XFR_TYPE	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define XFR_TYPE /;"	d
XFR_TYPE	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define XFR_TYPE	/;"	d
XFX_MASK	include/bedbug/ppc.h	/^#define XFX_MASK /;"	d
XFX_OPCODE	include/bedbug/ppc.h	/^#define XFX_OPCODE(/;"	d
XF_VERSION	include/exports.h	/^#define XF_VERSION	/;"	d
XGMAC_CONTROL_ACS	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_ACS	/;"	d	file:
XGMAC_CONTROL_CAR	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_CAR	/;"	d	file:
XGMAC_CONTROL_CAR_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_CAR_MASK	/;"	d	file:
XGMAC_CONTROL_CAR_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_CAR_SHIFT	/;"	d	file:
XGMAC_CONTROL_DDIC	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_DDIC	/;"	d	file:
XGMAC_CONTROL_DP	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_DP	/;"	d	file:
XGMAC_CONTROL_IPC	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_IPC	/;"	d	file:
XGMAC_CONTROL_JD	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_JD	/;"	d	file:
XGMAC_CONTROL_JE	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_JE	/;"	d	file:
XGMAC_CONTROL_LM	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_LM	/;"	d	file:
XGMAC_CONTROL_RE	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_RE	/;"	d	file:
XGMAC_CONTROL_SARC	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_SARC	/;"	d	file:
XGMAC_CONTROL_SARK_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_SARK_MASK	/;"	d	file:
XGMAC_CONTROL_SPD	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_SPD	/;"	d	file:
XGMAC_CONTROL_SPD_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_SPD_MASK	/;"	d	file:
XGMAC_CONTROL_TE	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_TE	/;"	d	file:
XGMAC_CONTROL_WD	drivers/net/calxedaxgmac.c	/^#define XGMAC_CONTROL_WD	/;"	d	file:
XGMAC_CORE_FLOW_DZQP	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_DZQP	/;"	d	file:
XGMAC_CORE_FLOW_FCB	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_FCB	/;"	d	file:
XGMAC_CORE_FLOW_PLT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_PLT	/;"	d	file:
XGMAC_CORE_FLOW_PLT_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_PLT_MASK	/;"	d	file:
XGMAC_CORE_FLOW_PLT_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_PLT_SHIFT	/;"	d	file:
XGMAC_CORE_FLOW_PT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_PT	/;"	d	file:
XGMAC_CORE_FLOW_PT_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_PT_MASK	/;"	d	file:
XGMAC_CORE_FLOW_PT_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_PT_SHIFT	/;"	d	file:
XGMAC_CORE_FLOW_RFE	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_RFE	/;"	d	file:
XGMAC_CORE_FLOW_TFE	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_TFE	/;"	d	file:
XGMAC_CORE_FLOW_UP	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_FLOW_UP	/;"	d	file:
XGMAC_CORE_OMR_DT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_DT	/;"	d	file:
XGMAC_CORE_OMR_EFC	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_EFC	/;"	d	file:
XGMAC_CORE_OMR_FEF	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_FEF	/;"	d	file:
XGMAC_CORE_OMR_FTF	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_FTF	/;"	d	file:
XGMAC_CORE_OMR_RFA_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RFA_MASK	/;"	d	file:
XGMAC_CORE_OMR_RFA_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RFA_SHIFT	/;"	d	file:
XGMAC_CORE_OMR_RFD_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RFD_MASK	/;"	d	file:
XGMAC_CORE_OMR_RFD_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RFD_SHIFT	/;"	d	file:
XGMAC_CORE_OMR_RSF	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RSF	/;"	d	file:
XGMAC_CORE_OMR_RTC	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RTC	/;"	d	file:
XGMAC_CORE_OMR_RTC_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RTC_MASK	/;"	d	file:
XGMAC_CORE_OMR_RTC_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_RTC_SHIFT	/;"	d	file:
XGMAC_CORE_OMR_TSF	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_TSF	/;"	d	file:
XGMAC_CORE_OMR_TTC	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_TTC	/;"	d	file:
XGMAC_CORE_OMR_TTC_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_TTC_MASK	/;"	d	file:
XGMAC_CORE_OMR_TTC_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_CORE_OMR_TTC_SHIFT	/;"	d	file:
XGMAC_DMA_AXIMODE_AAL	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_AAL	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN128	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN128	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN16	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN16	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN256	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN256	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN32	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN32	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN4	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN4	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN64	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN64	/;"	d	file:
XGMAC_DMA_AXIMODE_BLEN8	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_BLEN8	/;"	d	file:
XGMAC_DMA_AXIMODE_ENLPI	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_ENLPI	/;"	d	file:
XGMAC_DMA_AXIMODE_MGK	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_MGK	/;"	d	file:
XGMAC_DMA_AXIMODE_RDOSR	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_RDOSR	/;"	d	file:
XGMAC_DMA_AXIMODE_RDOSR_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_RDOSR_MASK	/;"	d	file:
XGMAC_DMA_AXIMODE_RDOSR_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_RDOSR_SHIFT	/;"	d	file:
XGMAC_DMA_AXIMODE_UNDEF	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_UNDEF	/;"	d	file:
XGMAC_DMA_AXIMODE_WROSR	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_WROSR	/;"	d	file:
XGMAC_DMA_AXIMODE_WROSR_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_WROSR_MASK	/;"	d	file:
XGMAC_DMA_AXIMODE_WROSR_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_AXIMODE_WROSR_SHIFT	/;"	d	file:
XGMAC_DMA_BUSMODE_8PBL	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_8PBL	/;"	d	file:
XGMAC_DMA_BUSMODE_AAL	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_AAL	/;"	d	file:
XGMAC_DMA_BUSMODE_ATDS	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_ATDS	/;"	d	file:
XGMAC_DMA_BUSMODE_DSL	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_DSL	/;"	d	file:
XGMAC_DMA_BUSMODE_DSL_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_DSL_MASK	/;"	d	file:
XGMAC_DMA_BUSMODE_DSL_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_DSL_SHIFT	/;"	d	file:
XGMAC_DMA_BUSMODE_FB	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_FB	/;"	d	file:
XGMAC_DMA_BUSMODE_PBL_MASK	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_PBL_MASK	/;"	d	file:
XGMAC_DMA_BUSMODE_PBL_SHIFT	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_PBL_SHIFT	/;"	d	file:
XGMAC_DMA_BUSMODE_RESET	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_RESET	/;"	d	file:
XGMAC_DMA_BUSMODE_USP	drivers/net/calxedaxgmac.c	/^#define XGMAC_DMA_BUSMODE_USP	/;"	d	file:
XHCI_ALIGNMENT	drivers/usb/host/xhci.h	/^#define XHCI_ALIGNMENT	/;"	d
XHCI_CMD_EIE	drivers/usb/host/xhci.h	/^#define XHCI_CMD_EIE	/;"	d
XHCI_CMD_EWE	drivers/usb/host/xhci.h	/^#define XHCI_CMD_EWE	/;"	d
XHCI_CMD_HSEIE	drivers/usb/host/xhci.h	/^#define XHCI_CMD_HSEIE	/;"	d
XHCI_CMD_OFFSET	drivers/usb/host/xhci.h	/^#define XHCI_CMD_OFFSET	/;"	d
XHCI_CMD_RUN	drivers/usb/host/xhci.h	/^#define XHCI_CMD_RUN	/;"	d
XHCI_CTX_TYPE_DEVICE	drivers/usb/host/xhci.h	/^#define XHCI_CTX_TYPE_DEVICE /;"	d
XHCI_CTX_TYPE_INPUT	drivers/usb/host/xhci.h	/^#define XHCI_CTX_TYPE_INPUT /;"	d
XHCI_DEV	arch/x86/include/asm/arch-baytrail/device.h	/^#define XHCI_DEV	/;"	d
XHCI_EXT_CAPS_DEBUG	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_DEBUG	/;"	d
XHCI_EXT_CAPS_ID	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_ID(/;"	d
XHCI_EXT_CAPS_LEGACY	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_LEGACY	/;"	d
XHCI_EXT_CAPS_NEXT	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_NEXT(/;"	d
XHCI_EXT_CAPS_PM	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_PM	/;"	d
XHCI_EXT_CAPS_PROTOCOL	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_PROTOCOL	/;"	d
XHCI_EXT_CAPS_ROUTE	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_ROUTE	/;"	d
XHCI_EXT_CAPS_VAL	drivers/usb/host/xhci.h	/^#define	XHCI_EXT_CAPS_VAL(/;"	d
XHCI_EXT_CAPS_VIRT	drivers/usb/host/xhci.h	/^#define XHCI_EXT_CAPS_VIRT	/;"	d
XHCI_EXT_PORT_COUNT	drivers/usb/host/xhci.h	/^#define	XHCI_EXT_PORT_COUNT(/;"	d
XHCI_EXT_PORT_MAJOR	drivers/usb/host/xhci.h	/^#define	XHCI_EXT_PORT_MAJOR(/;"	d
XHCI_EXT_PORT_OFF	drivers/usb/host/xhci.h	/^#define	XHCI_EXT_PORT_OFF(/;"	d
XHCI_HCC_EXT_CAPS	drivers/usb/host/xhci.h	/^#define XHCI_HCC_EXT_CAPS(/;"	d
XHCI_HCC_PARAMS_OFFSET	drivers/usb/host/xhci.h	/^#define XHCI_HCC_PARAMS_OFFSET	/;"	d
XHCI_HC_BIOS_OWNED	drivers/usb/host/xhci.h	/^#define XHCI_HC_BIOS_OWNED	/;"	d
XHCI_HC_LENGTH	drivers/usb/host/xhci.h	/^#define XHCI_HC_LENGTH(/;"	d
XHCI_HC_OS_OWNED	drivers/usb/host/xhci.h	/^#define XHCI_HC_OS_OWNED	/;"	d
XHCI_HLC	drivers/usb/host/xhci.h	/^#define XHCI_HLC /;"	d
XHCI_IRQS	drivers/usb/host/xhci.h	/^#define XHCI_IRQS	/;"	d
XHCI_L1C	drivers/usb/host/xhci.h	/^#define XHCI_L1C /;"	d
XHCI_LEGACY_CONTROL_OFFSET	drivers/usb/host/xhci.h	/^#define XHCI_LEGACY_CONTROL_OFFSET	/;"	d
XHCI_LEGACY_DISABLE_SMI	drivers/usb/host/xhci.h	/^#define	XHCI_LEGACY_DISABLE_SMI	/;"	d
XHCI_LEGACY_SUPPORT_OFFSET	drivers/usb/host/xhci.h	/^#define XHCI_LEGACY_SUPPORT_OFFSET	/;"	d
XHCI_MAX_EXT_CAPS	drivers/usb/host/xhci.h	/^#define XHCI_MAX_EXT_CAPS	/;"	d
XHCI_MAX_HALT_USEC	drivers/usb/host/xhci.h	/^#define XHCI_MAX_HALT_USEC	/;"	d
XHCI_MAX_PORTS	drivers/usb/host/xhci.h	/^#define XHCI_MAX_PORTS(/;"	d
XHCI_MAX_RESET_USEC	drivers/usb/host/xhci.h	/^#define XHCI_MAX_RESET_USEC	/;"	d
XHCI_MAX_RINGS_CACHED	drivers/usb/host/xhci.h	/^#define	XHCI_MAX_RINGS_CACHED	/;"	d
XHCI_PORT_RO	drivers/usb/host/xhci.h	/^#define XHCI_PORT_RO /;"	d
XHCI_PORT_RW	drivers/usb/host/xhci.h	/^#define XHCI_PORT_RW /;"	d
XHCI_PORT_RW1CS	drivers/usb/host/xhci.h	/^#define XHCI_PORT_RW1CS /;"	d
XHCI_PORT_RW1S	drivers/usb/host/xhci.h	/^#define XHCI_PORT_RW1S /;"	d
XHCI_PORT_RWS	drivers/usb/host/xhci.h	/^#define XHCI_PORT_RWS /;"	d
XHCI_PORT_RZ	drivers/usb/host/xhci.h	/^#define XHCI_PORT_RZ /;"	d
XHCI_SMI_EN	arch/x86/include/asm/arch-broadwell/pm.h	/^#define  XHCI_SMI_EN	/;"	d
XHCI_STOP_EP_CMD_TIMEOUT	drivers/usb/host/xhci.h	/^#define XHCI_STOP_EP_CMD_TIMEOUT	/;"	d
XHCI_STS_CNR	drivers/usb/host/xhci.h	/^#define XHCI_STS_CNR	/;"	d
XHCI_STS_HALT	drivers/usb/host/xhci.h	/^#define XHCI_STS_HALT	/;"	d
XHCI_STS_OFFSET	drivers/usb/host/xhci.h	/^#define XHCI_STS_OFFSET	/;"	d
XHCI_TIMEOUT	drivers/usb/host/xhci.h	/^#define XHCI_TIMEOUT	/;"	d
XILINK_XC6SLX4_SIZE	include/spartan3.h	/^#define XILINK_XC6SLX4_SIZE	/;"	d
XILINX	include/lattice.h	/^#define XILINX	/;"	d
XILINX_AXIEMAC	drivers/net/Kconfig	/^config XILINX_AXIEMAC$/;"	c
XILINX_BOARD_NAME	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_BOARD_NAME	/;"	d
XILINX_DCACHE_BYTE_SIZE	include/configs/microblaze-generic.h	/^#define XILINX_DCACHE_BYTE_SIZE	/;"	d
XILINX_EMACLITE	drivers/net/Kconfig	/^config XILINX_EMACLITE$/;"	c
XILINX_FLASH_SIZE	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_FLASH_SIZE	/;"	d
XILINX_FLASH_START	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_FLASH_START	/;"	d
XILINX_FSL_NUMBER	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_FSL_NUMBER	/;"	d
XILINX_GPIO_BASEADDR	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_GPIO_BASEADDR	/;"	d
XILINX_INDIRECT_DCR_ACCESS_REG	drivers/net/xilinx_ll_temac_sdma.c	/^#define XILINX_INDIRECT_DCR_ACCESS_REG	/;"	d	file:
XILINX_INDIRECT_DCR_ADDRESS_REG	drivers/net/xilinx_ll_temac_sdma.c	/^#define XILINX_INDIRECT_DCR_ADDRESS_REG	/;"	d	file:
XILINX_IRQ_H	arch/powerpc/include/asm/xilinx_irq.h	/^#define XILINX_IRQ_H$/;"	d
XILINX_LL_TEMAC_M_FIFO	include/netdev.h	/^#define XILINX_LL_TEMAC_M_FIFO	/;"	d
XILINX_LL_TEMAC_M_SDMA_DCR	include/netdev.h	/^#define XILINX_LL_TEMAC_M_SDMA_DCR	/;"	d
XILINX_LL_TEMAC_M_SDMA_PLB	include/netdev.h	/^#define XILINX_LL_TEMAC_M_SDMA_PLB	/;"	d
XILINX_MICROBLAZE0_HW_VER	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_HW_VER$/;"	c
XILINX_MICROBLAZE0_USE_BARREL	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_BARREL$/;"	c
XILINX_MICROBLAZE0_USE_DIV	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_DIV$/;"	c
XILINX_MICROBLAZE0_USE_HW_MUL	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_HW_MUL$/;"	c
XILINX_MICROBLAZE0_USE_MSR_INSTR	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_MSR_INSTR$/;"	c
XILINX_MICROBLAZE0_USE_PCMP_INSTR	board/xilinx/microblaze-generic/Kconfig	/^config XILINX_MICROBLAZE0_USE_PCMP_INSTR$/;"	c
XILINX_PCIE_REG_PSCR	drivers/pci/pcie_xilinx.c	/^#define XILINX_PCIE_REG_PSCR	/;"	d	file:
XILINX_PCIE_REG_PSCR_LNKUP	drivers/pci/pcie_xilinx.c	/^#define XILINX_PCIE_REG_PSCR_LNKUP	/;"	d	file:
XILINX_PHY_ID	drivers/net/phy/xilinx_phy.c	/^#define XILINX_PHY_ID	/;"	d	file:
XILINX_PHY_ID_MASK	drivers/net/phy/xilinx_phy.c	/^#define XILINX_PHY_ID_MASK	/;"	d	file:
XILINX_SPI	drivers/spi/Kconfig	/^config XILINX_SPI$/;"	c	menu:SPI Support
XILINX_UARTLITE	drivers/serial/Kconfig	/^config XILINX_UARTLITE$/;"	c	menu:Serial drivers
XILINX_WATCHDOG_BASEADDR	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_WATCHDOG_BASEADDR	/;"	d
XILINX_WATCHDOG_IRQ	board/xilinx/microblaze-generic/xparameters.h	/^#define XILINX_WATCHDOG_IRQ	/;"	d
XILINX_XC2S100E_DESC	include/spartan2.h	/^#define XILINX_XC2S100E_DESC(/;"	d
XILINX_XC2S100E_SIZE	include/spartan2.h	/^#define XILINX_XC2S100E_SIZE /;"	d
XILINX_XC2S100_DESC	include/spartan2.h	/^#define XILINX_XC2S100_DESC(/;"	d
XILINX_XC2S100_SIZE	include/spartan2.h	/^#define XILINX_XC2S100_SIZE	/;"	d
XILINX_XC2S150E_DESC	include/spartan2.h	/^#define XILINX_XC2S150E_DESC(/;"	d
XILINX_XC2S150E_SIZE	include/spartan2.h	/^#define XILINX_XC2S150E_SIZE /;"	d
XILINX_XC2S150_DESC	include/spartan2.h	/^#define XILINX_XC2S150_DESC(/;"	d
XILINX_XC2S150_SIZE	include/spartan2.h	/^#define XILINX_XC2S150_SIZE	/;"	d
XILINX_XC2S15_DESC	include/spartan2.h	/^#define XILINX_XC2S15_DESC(/;"	d
XILINX_XC2S15_SIZE	include/spartan2.h	/^#define XILINX_XC2S15_SIZE	/;"	d
XILINX_XC2S200E_DESC	include/spartan2.h	/^#define XILINX_XC2S200E_DESC(/;"	d
XILINX_XC2S200E_SIZE	include/spartan2.h	/^#define XILINX_XC2S200E_SIZE /;"	d
XILINX_XC2S200_DESC	include/spartan2.h	/^#define XILINX_XC2S200_DESC(/;"	d
XILINX_XC2S200_SIZE	include/spartan2.h	/^#define XILINX_XC2S200_SIZE	/;"	d
XILINX_XC2S300E_DESC	include/spartan2.h	/^#define XILINX_XC2S300E_DESC(/;"	d
XILINX_XC2S300E_SIZE	include/spartan2.h	/^#define XILINX_XC2S300E_SIZE /;"	d
XILINX_XC2S30_DESC	include/spartan2.h	/^#define XILINX_XC2S30_DESC(/;"	d
XILINX_XC2S30_SIZE	include/spartan2.h	/^#define XILINX_XC2S30_SIZE	/;"	d
XILINX_XC2S50E_DESC	include/spartan2.h	/^#define XILINX_XC2S50E_DESC(/;"	d
XILINX_XC2S50E_SIZE	include/spartan2.h	/^#define XILINX_XC2S50E_SIZE /;"	d
XILINX_XC2S50_DESC	include/spartan2.h	/^#define XILINX_XC2S50_DESC(/;"	d
XILINX_XC2S50_SIZE	include/spartan2.h	/^#define XILINX_XC2S50_SIZE	/;"	d
XILINX_XC2V10000_DESC	include/virtex2.h	/^#define XILINX_XC2V10000_DESC(/;"	d
XILINX_XC2V10000_SIZE	include/virtex2.h	/^#define XILINX_XC2V10000_SIZE	/;"	d
XILINX_XC2V1000_DESC	include/virtex2.h	/^#define XILINX_XC2V1000_DESC(/;"	d
XILINX_XC2V1000_SIZE	include/virtex2.h	/^#define XILINX_XC2V1000_SIZE	/;"	d
XILINX_XC2V1500_DESC	include/virtex2.h	/^#define XILINX_XC2V1500_DESC(/;"	d
XILINX_XC2V1500_SIZE	include/virtex2.h	/^#define XILINX_XC2V1500_SIZE	/;"	d
XILINX_XC2V2000_DESC	include/virtex2.h	/^#define XILINX_XC2V2000_DESC(/;"	d
XILINX_XC2V2000_SIZE	include/virtex2.h	/^#define XILINX_XC2V2000_SIZE	/;"	d
XILINX_XC2V250_DESC	include/virtex2.h	/^#define XILINX_XC2V250_DESC(/;"	d
XILINX_XC2V250_SIZE	include/virtex2.h	/^#define XILINX_XC2V250_SIZE	/;"	d
XILINX_XC2V3000_DESC	include/virtex2.h	/^#define XILINX_XC2V3000_DESC(/;"	d
XILINX_XC2V3000_SIZE	include/virtex2.h	/^#define XILINX_XC2V3000_SIZE	/;"	d
XILINX_XC2V4000_DESC	include/virtex2.h	/^#define XILINX_XC2V4000_DESC(/;"	d
XILINX_XC2V4000_SIZE	include/virtex2.h	/^#define XILINX_XC2V4000_SIZE	/;"	d
XILINX_XC2V40_DESC	include/virtex2.h	/^#define XILINX_XC2V40_DESC(/;"	d
XILINX_XC2V40_SIZE	include/virtex2.h	/^#define XILINX_XC2V40_SIZE	/;"	d
XILINX_XC2V500_DESC	include/virtex2.h	/^#define XILINX_XC2V500_DESC(/;"	d
XILINX_XC2V500_SIZE	include/virtex2.h	/^#define XILINX_XC2V500_SIZE	/;"	d
XILINX_XC2V6000_DESC	include/virtex2.h	/^#define XILINX_XC2V6000_DESC(/;"	d
XILINX_XC2V6000_SIZE	include/virtex2.h	/^#define XILINX_XC2V6000_SIZE	/;"	d
XILINX_XC2V8000_DESC	include/virtex2.h	/^#define XILINX_XC2V8000_DESC(/;"	d
XILINX_XC2V8000_SIZE	include/virtex2.h	/^#define XILINX_XC2V8000_SIZE	/;"	d
XILINX_XC2V80_DESC	include/virtex2.h	/^#define XILINX_XC2V80_DESC(/;"	d
XILINX_XC2V80_SIZE	include/virtex2.h	/^#define XILINX_XC2V80_SIZE	/;"	d
XILINX_XC3S1000_DESC	include/spartan3.h	/^#define XILINX_XC3S1000_DESC(/;"	d
XILINX_XC3S1000_SIZE	include/spartan3.h	/^#define XILINX_XC3S1000_SIZE	/;"	d
XILINX_XC3S100E_DESC	include/spartan3.h	/^#define XILINX_XC3S100E_DESC(/;"	d
XILINX_XC3S100E_SIZE	include/spartan3.h	/^#define	XILINX_XC3S100E_SIZE	/;"	d
XILINX_XC3S1200E_DESC	include/spartan3.h	/^#define XILINX_XC3S1200E_DESC(/;"	d
XILINX_XC3S1200E_SIZE	include/spartan3.h	/^#define	XILINX_XC3S1200E_SIZE	/;"	d
XILINX_XC3S1500_DESC	include/spartan3.h	/^#define XILINX_XC3S1500_DESC(/;"	d
XILINX_XC3S1500_SIZE	include/spartan3.h	/^#define XILINX_XC3S1500_SIZE	/;"	d
XILINX_XC3S1600E_DESC	include/spartan3.h	/^#define XILINX_XC3S1600E_DESC(/;"	d
XILINX_XC3S1600E_SIZE	include/spartan3.h	/^#define	XILINX_XC3S1600E_SIZE	/;"	d
XILINX_XC3S2000_DESC	include/spartan3.h	/^#define XILINX_XC3S2000_DESC(/;"	d
XILINX_XC3S2000_SIZE	include/spartan3.h	/^#define XILINX_XC3S2000_SIZE	/;"	d
XILINX_XC3S200_DESC	include/spartan3.h	/^#define XILINX_XC3S200_DESC(/;"	d
XILINX_XC3S200_SIZE	include/spartan3.h	/^#define XILINX_XC3S200_SIZE	/;"	d
XILINX_XC3S250E_DESC	include/spartan3.h	/^#define XILINX_XC3S250E_DESC(/;"	d
XILINX_XC3S250E_SIZE	include/spartan3.h	/^#define	XILINX_XC3S250E_SIZE	/;"	d
XILINX_XC3S4000_DESC	include/spartan3.h	/^#define XILINX_XC3S4000_DESC(/;"	d
XILINX_XC3S4000_SIZE	include/spartan3.h	/^#define XILINX_XC3S4000_SIZE	/;"	d
XILINX_XC3S400_DESC	include/spartan3.h	/^#define XILINX_XC3S400_DESC(/;"	d
XILINX_XC3S400_SIZE	include/spartan3.h	/^#define XILINX_XC3S400_SIZE	/;"	d
XILINX_XC3S5000_DESC	include/spartan3.h	/^#define XILINX_XC3S5000_DESC(/;"	d
XILINX_XC3S5000_SIZE	include/spartan3.h	/^#define XILINX_XC3S5000_SIZE	/;"	d
XILINX_XC3S500E_DESC	include/spartan3.h	/^#define XILINX_XC3S500E_DESC(/;"	d
XILINX_XC3S500E_SIZE	include/spartan3.h	/^#define	XILINX_XC3S500E_SIZE	/;"	d
XILINX_XC3S50_DESC	include/spartan3.h	/^#define XILINX_XC3S50_DESC(/;"	d
XILINX_XC3S50_SIZE	include/spartan3.h	/^#define XILINX_XC3S50_SIZE	/;"	d
XILINX_XC6SLX4_DESC	include/spartan3.h	/^#define XILINX_XC6SLX4_DESC(/;"	d
XILINX_XC7Z010_DESC	include/zynqpl.h	/^#define XILINX_XC7Z010_DESC(/;"	d
XILINX_XC7Z010_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z010_SIZE	/;"	d
XILINX_XC7Z015_DESC	include/zynqpl.h	/^#define XILINX_XC7Z015_DESC(/;"	d
XILINX_XC7Z015_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z015_SIZE	/;"	d
XILINX_XC7Z020_DESC	include/zynqpl.h	/^#define XILINX_XC7Z020_DESC(/;"	d
XILINX_XC7Z020_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z020_SIZE	/;"	d
XILINX_XC7Z030_DESC	include/zynqpl.h	/^#define XILINX_XC7Z030_DESC(/;"	d
XILINX_XC7Z030_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z030_SIZE	/;"	d
XILINX_XC7Z035_DESC	include/zynqpl.h	/^#define XILINX_XC7Z035_DESC(/;"	d
XILINX_XC7Z035_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z035_SIZE	/;"	d
XILINX_XC7Z045_DESC	include/zynqpl.h	/^#define XILINX_XC7Z045_DESC(/;"	d
XILINX_XC7Z045_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z045_SIZE	/;"	d
XILINX_XC7Z100_DESC	include/zynqpl.h	/^#define XILINX_XC7Z100_DESC(/;"	d
XILINX_XC7Z100_SIZE	include/zynqpl.h	/^#define XILINX_XC7Z100_SIZE	/;"	d
XILINX_ZYNQMP_DESC	include/zynqmppl.h	/^#define XILINX_ZYNQMP_DESC /;"	d
XILINX_ZYNQ_7010	include/zynqpl.h	/^#define XILINX_ZYNQ_7010	/;"	d
XILINX_ZYNQ_7015	include/zynqpl.h	/^#define XILINX_ZYNQ_7015	/;"	d
XILINX_ZYNQ_7020	include/zynqpl.h	/^#define XILINX_ZYNQ_7020	/;"	d
XILINX_ZYNQ_7030	include/zynqpl.h	/^#define XILINX_ZYNQ_7030	/;"	d
XILINX_ZYNQ_7035	include/zynqpl.h	/^#define XILINX_ZYNQ_7035	/;"	d
XILINX_ZYNQ_7045	include/zynqpl.h	/^#define XILINX_ZYNQ_7045	/;"	d
XILINX_ZYNQ_7100	include/zynqpl.h	/^#define XILINX_ZYNQ_7100	/;"	d
XILSPI_MAX_XFER_BITS	drivers/spi/xilinx_spi.c	/^#define XILSPI_MAX_XFER_BITS	/;"	d	file:
XILSPI_SPICR_DFLT_OFF	drivers/spi/xilinx_spi.c	/^#define XILSPI_SPICR_DFLT_OFF	/;"	d	file:
XILSPI_SPICR_DFLT_ON	drivers/spi/xilinx_spi.c	/^#define XILSPI_SPICR_DFLT_ON	/;"	d	file:
XIL_IO_H	board/xilinx/zynq/xil_io.h	/^#define XIL_IO_H$/;"	d
XIL_IO_H	board/xilinx/zynqmp/xil_io.h	/^#define XIL_IO_H$/;"	d
XIP_ROM_SIZE	arch/x86/Kconfig	/^config XIP_ROM_SIZE$/;"	c	menu:x86 architecture
XKPHYS	arch/mips/include/asm/addrspace.h	/^#define XKPHYS	/;"	d
XKPHYS_TO_PHYS	arch/mips/include/asm/addrspace.h	/^#define XKPHYS_TO_PHYS(/;"	d
XKSEG	arch/mips/include/asm/addrspace.h	/^#define XKSEG	/;"	d
XKSSEG	arch/mips/include/asm/addrspace.h	/^#define XKSSEG	/;"	d
XKUSEG	arch/mips/include/asm/addrspace.h	/^#define XKUSEG	/;"	d
XLASTCMD	board/esd/common/xilinx_jtag/micro.c	/^#define XLASTCMD /;"	d	file:
XL_MASK	include/bedbug/ppc.h	/^#define XL_MASK /;"	d
XL_OPCODE	include/bedbug/ppc.h	/^#define XL_OPCODE(/;"	d
XMLTOFLAGS	doc/DocBook/Makefile	/^XMLTOFLAGS = -m $(srctree)\/$(src)\/stylesheet.xsl$/;"	m
XMTFLUSH	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMTFLUSH	/;"	d
XMTINTLEN	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMTINTLEN	/;"	d
XMTSERV	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMTSERV	/;"	d
XMTSTAT	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMTSTAT	/;"	d
XMT_EMPTY	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMT_EMPTY	/;"	d
XMT_FULL	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMT_FULL	/;"	d
XMT_HALF	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define	XMT_HALF	/;"	d
XOFF	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define XOFF	/;"	d
XOFF	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define XOFF	/;"	d
XOFF_CHAR	cmd/load.c	/^#define XOFF_CHAR /;"	d	file:
XOFF_P	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define XOFF_P	/;"	d
XON_CHAR	cmd/load.c	/^#define XON_CHAR /;"	d	file:
XOR2	drivers/bios_emulator/x86emu/prim_ops.c	/^#define XOR2(/;"	d	file:
XOR_ACTIVATION_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_ACTIVATION_REG(/;"	d
XOR_ACTIVATION_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_ACTIVATION_REG(/;"	d
XOR_ADDR_OVRD_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_ADDR_OVRD_REG(/;"	d
XOR_ADDR_OVRD_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_ADDR_OVRD_REG(/;"	d
XOR_BASE_ADDR_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_BASE_ADDR_REG(/;"	d
XOR_BASE_ADDR_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_BASE_ADDR_REG(/;"	d
XOR_BLOCK_SIZE_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_BLOCK_SIZE_REG(/;"	d
XOR_BLOCK_SIZE_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_BLOCK_SIZE_REG(/;"	d
XOR_BYTE_COUNT_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_BYTE_COUNT_REG(/;"	d
XOR_BYTE_COUNT_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_BYTE_COUNT_REG(/;"	d
XOR_CAUSE_DONE_MASK	drivers/ddr/marvell/axp/ddr3_sdram.c	/^#define XOR_CAUSE_DONE_MASK(/;"	d	file:
XOR_CAUSE_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_CAUSE_REG(/;"	d
XOR_CAUSE_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_CAUSE_REG(/;"	d
XOR_CHAN	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_CHAN(/;"	d
XOR_CHAN	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_CHAN(/;"	d
XOR_CHANNEL_ARBITER_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_CHANNEL_ARBITER_REG(/;"	d
XOR_CHANNEL_ARBITER_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_CHANNEL_ARBITER_REG(/;"	d
XOR_CONFIG_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_CONFIG_REG(/;"	d
XOR_CONFIG_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_CONFIG_REG(/;"	d
XOR_CURR_DESC_PTR_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_CURR_DESC_PTR_REG(/;"	d
XOR_CURR_DESC_PTR_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_CURR_DESC_PTR_REG(/;"	d
XOR_DEBUG_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_DEBUG_REG(/;"	d
XOR_DST_ADDR	drivers/ddr/marvell/a38x/xor.h	/^	XOR_DST_ADDR,		\/* Destination Address Control *\/$/;"	e	enum:xor_override_target
XOR_DST_PTR_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_DST_PTR_REG(/;"	d
XOR_DST_PTR_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_DST_PTR_REG(/;"	d
XOR_ERROR_ADDR_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_ERROR_ADDR_REG(/;"	d
XOR_ERROR_ADDR_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_ERROR_ADDR_REG(/;"	d
XOR_ERROR_CAUSE_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_ERROR_CAUSE_REG(/;"	d
XOR_ERROR_CAUSE_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_ERROR_CAUSE_REG(/;"	d
XOR_HIGH_ADDR_REMAP_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_HIGH_ADDR_REMAP_REG(/;"	d
XOR_HIGH_ADDR_REMAP_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_HIGH_ADDR_REMAP_REG(/;"	d
XOR_INIT_VAL_HIGH_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_INIT_VAL_HIGH_REG(/;"	d
XOR_INIT_VAL_HIGH_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_INIT_VAL_HIGH_REG(/;"	d
XOR_INIT_VAL_LOW_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_INIT_VAL_LOW_REG(/;"	d
XOR_INIT_VAL_LOW_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_INIT_VAL_LOW_REG(/;"	d
XOR_MASK_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_MASK_REG(/;"	d
XOR_MASK_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_MASK_REG(/;"	d
XOR_MAX_ADDR_DEC_WIN	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_MAX_ADDR_DEC_WIN	/;"	d
XOR_MAX_OVERRIDE_WIN	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_MAX_OVERRIDE_WIN	/;"	d
XOR_MAX_REMAP_WIN	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_MAX_REMAP_WIN	/;"	d
XOR_NEXT_DESC	drivers/ddr/marvell/a38x/xor.h	/^	XOR_NEXT_DESC		\/* Next Descriptor Address Control *\/$/;"	e	enum:xor_override_target
XOR_NEXT_DESC_PTR_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_NEXT_DESC_PTR_REG(/;"	d
XOR_NEXT_DESC_PTR_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_NEXT_DESC_PTR_REG(/;"	d
XOR_OVERRIDE_CTRL_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_OVERRIDE_CTRL_REG(/;"	d
XOR_SIZE_MASK_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_SIZE_MASK_REG(/;"	d
XOR_SIZE_MASK_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_SIZE_MASK_REG(/;"	d
XOR_TIMEOUT	drivers/ddr/marvell/axp/ddr3_sdram.c	/^#define XOR_TIMEOUT /;"	d	file:
XOR_TIMER_MODE_CTRL_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_TIMER_MODE_CTRL_REG(/;"	d
XOR_TIMER_MODE_CTRL_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_TIMER_MODE_CTRL_REG(/;"	d
XOR_TIMER_MODE_CURR_VAL_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_TIMER_MODE_CURR_VAL_REG(/;"	d
XOR_TIMER_MODE_CURR_VAL_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_TIMER_MODE_CURR_VAL_REG(/;"	d
XOR_TIMER_MODE_INIT_VAL_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_TIMER_MODE_INIT_VAL_REG(/;"	d
XOR_TIMER_MODE_INIT_VAL_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_TIMER_MODE_INIT_VAL_REG(/;"	d
XOR_UNIT	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_UNIT(/;"	d
XOR_UNIT	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_UNIT(/;"	d
XOR_WINDOW_CTRL_REG	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_WINDOW_CTRL_REG(/;"	d
XOR_WINDOW_CTRL_REG	drivers/ddr/marvell/axp/xor_regs.h	/^#define XOR_WINDOW_CTRL_REG(/;"	d
XOR_WIN_SIZE_ALIGN	drivers/ddr/marvell/a38x/xor_regs.h	/^#define XOR_WIN_SIZE_ALIGN	/;"	d
XOSC_CLK_FREQ	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define XOSC_CLK_FREQ	/;"	d
XO_MASK	include/bedbug/ppc.h	/^#define XO_MASK /;"	d
XO_OPCODE	include/bedbug/ppc.h	/^#define XO_OPCODE(/;"	d
XPARAMETER_H	board/xilinx/ppc405-generic/xparameters.h	/^#define XPARAMETER_H$/;"	d
XPARAMETER_H	board/xilinx/ppc440-generic/xparameters.h	/^#define XPARAMETER_H$/;"	d
XPAR_CORE_CLOCK_FREQ_HZ	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_CORE_CLOCK_FREQ_HZ	/;"	d
XPAR_CORE_CLOCK_FREQ_HZ	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_CORE_CLOCK_FREQ_HZ	/;"	d
XPAR_DDR2_SDRAM_MEM_BASEADDR	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_DDR2_SDRAM_MEM_BASEADDR	/;"	d
XPAR_DDR2_SDRAM_MEM_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_DDR2_SDRAM_MEM_BASEADDR	/;"	d
XPAR_FLASH_MEM0_BASEADDR	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_FLASH_MEM0_BASEADDR	/;"	d
XPAR_FLASH_MEM0_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_FLASH_MEM0_BASEADDR	/;"	d
XPAR_IIC_EEPROM_BASEADDR	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_IIC_EEPROM_BASEADDR	/;"	d
XPAR_IIC_EEPROM_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_IIC_EEPROM_BASEADDR	/;"	d
XPAR_INTC_0_BASEADDR	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_INTC_0_BASEADDR	/;"	d
XPAR_INTC_0_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_INTC_0_BASEADDR	/;"	d
XPAR_INTC_MAX_NUM_INTR_INPUTS	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_INTC_MAX_NUM_INTR_INPUTS	/;"	d
XPAR_INTC_MAX_NUM_INTR_INPUTS	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_INTC_MAX_NUM_INTR_INPUTS	/;"	d
XPAR_LLTEMAC_0_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_LLTEMAC_0_BASEADDR	/;"	d
XPAR_LLTEMAC_0_LLINK_CONNECTED_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_LLTEMAC_0_LLINK_CONNECTED_BASEADDR /;"	d
XPAR_LLTEMAC_1_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_LLTEMAC_1_BASEADDR	/;"	d
XPAR_LLTEMAC_1_LLINK_CONNECTED_BASEADDR	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_LLTEMAC_1_LLINK_CONNECTED_BASEADDR /;"	d
XPAR_PLB_CLOCK_FREQ_HZ	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_PLB_CLOCK_FREQ_HZ	/;"	d
XPAR_PLB_CLOCK_FREQ_HZ	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_PLB_CLOCK_FREQ_HZ	/;"	d
XPAR_SPI_0_BASEADDR	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_SPI_0_BASEADDR /;"	d
XPAR_SPI_0_NUM_TRANSFER_BITS	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_SPI_0_NUM_TRANSFER_BITS	/;"	d
XPAR_UARTNS550_0_CLOCK_FREQ_HZ	board/xilinx/ppc405-generic/xparameters.h	/^#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ	/;"	d
XPAR_UARTNS550_0_CLOCK_FREQ_HZ	board/xilinx/ppc440-generic/xparameters.h	/^#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ	/;"	d
XPCSPMA_PHY_CTRL_ISOLATE_DISABLE	drivers/net/phy/xilinx_phy.c	/^#define XPCSPMA_PHY_CTRL_ISOLATE_DISABLE /;"	d	file:
XPHYSADDR	arch/mips/include/asm/addrspace.h	/^#define XPHYSADDR(/;"	d
XPR	arch/sh/include/asm/cpu_sh7722.h	/^#define XPR	/;"	d
XQSGMII_CARD_PHY1_PORT0_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY1_PORT0_ADDR /;"	d
XQSGMII_CARD_PHY1_PORT1_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY1_PORT1_ADDR /;"	d
XQSGMII_CARD_PHY1_PORT2_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY1_PORT2_ADDR /;"	d
XQSGMII_CARD_PHY1_PORT3_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY1_PORT3_ADDR /;"	d
XQSGMII_CARD_PHY2_PORT0_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY2_PORT0_ADDR /;"	d
XQSGMII_CARD_PHY2_PORT1_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY2_PORT1_ADDR /;"	d
XQSGMII_CARD_PHY2_PORT2_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY2_PORT2_ADDR /;"	d
XQSGMII_CARD_PHY2_PORT3_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY2_PORT3_ADDR /;"	d
XQSGMII_CARD_PHY3_PORT0_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY3_PORT0_ADDR /;"	d
XQSGMII_CARD_PHY3_PORT1_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY3_PORT1_ADDR /;"	d
XQSGMII_CARD_PHY3_PORT2_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY3_PORT2_ADDR /;"	d
XQSGMII_CARD_PHY3_PORT3_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY3_PORT3_ADDR /;"	d
XQSGMII_CARD_PHY4_PORT0_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY4_PORT0_ADDR /;"	d
XQSGMII_CARD_PHY4_PORT1_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY4_PORT1_ADDR /;"	d
XQSGMII_CARD_PHY4_PORT2_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY4_PORT2_ADDR /;"	d
XQSGMII_CARD_PHY4_PORT3_ADDR	include/configs/ls2080aqds.h	/^#define XQSGMII_CARD_PHY4_PORT3_ADDR /;"	d
XR16L2751_GPMC_CONFIG1	board/technexion/twister/twister.h	/^#define XR16L2751_GPMC_CONFIG1	/;"	d
XR16L2751_GPMC_CONFIG2	board/technexion/twister/twister.h	/^#define XR16L2751_GPMC_CONFIG2	/;"	d
XR16L2751_GPMC_CONFIG3	board/technexion/twister/twister.h	/^#define XR16L2751_GPMC_CONFIG3	/;"	d
XR16L2751_GPMC_CONFIG4	board/technexion/twister/twister.h	/^#define XR16L2751_GPMC_CONFIG4	/;"	d
XR16L2751_GPMC_CONFIG5	board/technexion/twister/twister.h	/^#define XR16L2751_GPMC_CONFIG5	/;"	d
XR16L2751_GPMC_CONFIG6	board/technexion/twister/twister.h	/^#define XR16L2751_GPMC_CONFIG6	/;"	d
XR16L2751_UART1_BASE	board/technexion/twister/twister.h	/^#define XR16L2751_UART1_BASE	/;"	d
XR16L2751_UART2_BASE	board/technexion/twister/twister.h	/^#define XR16L2751_UART2_BASE	/;"	d
XR3PCI_ATR_AXI4_SLV0	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_AXI4_SLV0	/;"	d	file:
XR3PCI_ATR_PCIE_WIN0	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_PCIE_WIN0	/;"	d	file:
XR3PCI_ATR_PCIE_WIN1	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_PCIE_WIN1	/;"	d	file:
XR3PCI_ATR_SRC_ADDR_HIGH	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_SRC_ADDR_HIGH	/;"	d	file:
XR3PCI_ATR_SRC_ADDR_LOW	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_SRC_ADDR_LOW	/;"	d	file:
XR3PCI_ATR_TABLE_SIZE	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TABLE_SIZE	/;"	d	file:
XR3PCI_ATR_TRSLID_AXIDEVICE	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSLID_AXIDEVICE	/;"	d	file:
XR3PCI_ATR_TRSLID_AXIMEMORY	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSLID_AXIMEMORY	/;"	d	file:
XR3PCI_ATR_TRSLID_PCIE_CONF	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSLID_PCIE_CONF	/;"	d	file:
XR3PCI_ATR_TRSLID_PCIE_IO	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSLID_PCIE_IO	/;"	d	file:
XR3PCI_ATR_TRSLID_PCIE_MEMORY	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSLID_PCIE_MEMORY	/;"	d	file:
XR3PCI_ATR_TRSL_ADDR_HIGH	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSL_ADDR_HIGH	/;"	d	file:
XR3PCI_ATR_TRSL_ADDR_LOW	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSL_ADDR_LOW	/;"	d	file:
XR3PCI_ATR_TRSL_PARAM	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ATR_TRSL_PARAM	/;"	d	file:
XR3PCI_BASIC_STATUS	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_BASIC_STATUS	/;"	d	file:
XR3PCI_BRIDGE_PCI_IDS	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_BRIDGE_PCI_IDS	/;"	d	file:
XR3PCI_BS_GEN_MASK	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_BS_GEN_MASK	/;"	d	file:
XR3PCI_BS_LINK_MASK	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_BS_LINK_MASK	/;"	d	file:
XR3PCI_ECAM_OFFSET	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_ECAM_OFFSET(/;"	d	file:
XR3PCI_PEX_SPC2	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_PEX_SPC2	/;"	d	file:
XR3PCI_VIRTCHAN_CREDITS	board/armltd/vexpress64/pcie.c	/^#define XR3PCI_VIRTCHAN_CREDITS	/;"	d	file:
XR3_CONFIG_BASE	board/armltd/vexpress64/pcie.c	/^#define XR3_CONFIG_BASE	/;"	d	file:
XR3_PCI_ECAM_SIZE	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_ECAM_SIZE	/;"	d	file:
XR3_PCI_ECAM_START	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_ECAM_START	/;"	d	file:
XR3_PCI_IOSPACE_SIZE	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_IOSPACE_SIZE	/;"	d	file:
XR3_PCI_IOSPACE_START	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_IOSPACE_START	/;"	d	file:
XR3_PCI_MEMSPACE64_SIZE	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_MEMSPACE64_SIZE	/;"	d	file:
XR3_PCI_MEMSPACE64_START	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_MEMSPACE64_START	/;"	d	file:
XR3_PCI_MEMSPACE_SIZE	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_MEMSPACE_SIZE	/;"	d	file:
XR3_PCI_MEMSPACE_START	board/armltd/vexpress64/pcie.c	/^#define XR3_PCI_MEMSPACE_START	/;"	d	file:
XR3_RESET_BASE	board/armltd/vexpress64/pcie.c	/^#define XR3_RESET_BASE	/;"	d	file:
XRDC_BASE_ADDR	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define XRDC_BASE_ADDR	/;"	d
XREF_CLK0	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define XREF_CLK0	/;"	d
XREF_CLK1	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define XREF_CLK1	/;"	d
XREF_CLK2	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define XREF_CLK2	/;"	d
XREF_CLK3	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define XREF_CLK3	/;"	d
XREPEAT	board/esd/common/xilinx_jtag/micro.c	/^#define XREPEAT /;"	d	file:
XRUNTEST	board/esd/common/xilinx_jtag/micro.c	/^#define XRUNTEST /;"	d	file:
XSA	arch/sh/include/asm/cpu_sh7722.h	/^#define XSA	/;"	d
XSB_ADDRESS_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define XSB_ADDRESS_REG	/;"	d
XSB_BASE_ADDR	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define XSB_BASE_ADDR	/;"	d
XSB_CMD_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define XSB_CMD_REG	/;"	d
XSB_CTRL_0_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define XSB_CTRL_0_REG	/;"	d
XSB_CTRL_1_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define XSB_CTRL_1_REG	/;"	d
XSB_DATA_REG	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define XSB_DATA_REG	/;"	d
XSDR	board/esd/common/xilinx_jtag/micro.c	/^#define XSDR /;"	d	file:
XSDR	include/lattice.h	/^#define XSDR	/;"	d
XSDRB	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRB /;"	d	file:
XSDRC	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRC /;"	d	file:
XSDRE	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRE /;"	d	file:
XSDRINC	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRINC /;"	d	file:
XSDRSIZE	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRSIZE /;"	d	file:
XSDRTDO	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRTDO /;"	d	file:
XSDRTDOB	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRTDOB /;"	d	file:
XSDRTDOC	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRTDOC /;"	d	file:
XSDRTDOE	board/esd/common/xilinx_jtag/micro.c	/^#define XSDRTDOE /;"	d	file:
XSETSDRMASKS	board/esd/common/xilinx_jtag/micro.c	/^#define XSETSDRMASKS /;"	d	file:
XSIR	board/esd/common/xilinx_jtag/micro.c	/^#define XSIR /;"	d	file:
XSIR2	board/esd/common/xilinx_jtag/micro.c	/^#define XSIR2 /;"	d	file:
XSRA	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define XSRA /;"	d
XSRB	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define XSRB /;"	d
XSTATE	board/esd/common/xilinx_jtag/micro.c	/^#define XSTATE /;"	d	file:
XSTATE_RESET	board/esd/common/xilinx_jtag/micro.c	/^#define XSTATE_RESET /;"	d	file:
XSTATE_RUNTEST	board/esd/common/xilinx_jtag/micro.c	/^#define XSTATE_RUNTEST /;"	d	file:
XSVFDBG_PRINTF	board/esd/common/xilinx_jtag/micro.c	/^#define XSVFDBG_PRINTF(/;"	d	file:
XSVFDBG_PRINTF1	board/esd/common/xilinx_jtag/micro.c	/^#define XSVFDBG_PRINTF1(/;"	d	file:
XSVFDBG_PRINTF2	board/esd/common/xilinx_jtag/micro.c	/^#define XSVFDBG_PRINTF2(/;"	d	file:
XSVFDBG_PRINTF3	board/esd/common/xilinx_jtag/micro.c	/^#define XSVFDBG_PRINTF3(/;"	d	file:
XSVFDBG_PRINTLENVAL	board/esd/common/xilinx_jtag/micro.c	/^#define XSVFDBG_PRINTLENVAL(/;"	d	file:
XSVF_ERRORCODE	board/esd/common/xilinx_jtag/micro.c	/^#define XSVF_ERRORCODE(/;"	d	file:
XSVF_ERROR_DATAOVERFLOW	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_DATAOVERFLOW /;"	d
XSVF_ERROR_ILLEGALCMD	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_ILLEGALCMD /;"	d
XSVF_ERROR_ILLEGALSTATE	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_ILLEGALSTATE /;"	d
XSVF_ERROR_LAST	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_LAST /;"	d
XSVF_ERROR_MAXRETRIES	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_MAXRETRIES /;"	d
XSVF_ERROR_NONE	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_NONE /;"	d
XSVF_ERROR_TDOMISMATCH	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_TDOMISMATCH /;"	d
XSVF_ERROR_UNKNOWN	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_ERROR_UNKNOWN /;"	d
XSVF_LEGACY_ERROR	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_LEGACY_ERROR /;"	d
XSVF_LEGACY_SUCCESS	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_LEGACY_SUCCESS /;"	d
XSVF_MICRO_H	board/esd/common/xilinx_jtag/micro.h	/^#define XSVF_MICRO_H$/;"	d
XSVF_SUPPORT_COMPRESSION	board/esd/common/xilinx_jtag/micro.c	/^#define XSVF_SUPPORT_COMPRESSION /;"	d	file:
XSVF_SUPPORT_ERRORCODES	board/esd/common/xilinx_jtag/micro.c	/^#define XSVF_SUPPORT_ERRORCODES /;"	d	file:
XSVF_VERSION	board/esd/common/xilinx_jtag/micro.c	/^#define XSVF_VERSION /;"	d	file:
XS_MASK	include/bedbug/ppc.h	/^#define XS_MASK /;"	d
XS_OPCODE	include/bedbug/ppc.h	/^#define XS_OPCODE(/;"	d
XTAL	drivers/usb/host/r8a66597.h	/^#define	XTAL	/;"	d
XTAL12	drivers/usb/host/r8a66597.h	/^#define	  XTAL12	/;"	d
XTAL1L_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	XTAL1L_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
XTAL24	drivers/usb/host/r8a66597.h	/^#define	  XTAL24	/;"	d
XTAL48	drivers/usb/host/r8a66597.h	/^#define	  XTAL48	/;"	d
XTALTIMEEN	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define  XTALTIMEEN	/;"	d
XTAL_FREQ_KHZ	arch/arm/cpu/arm926ejs/mxs/clock.c	/^#define	XTAL_FREQ_KHZ	/;"	d	file:
XTAL_FREQ_MHZ	arch/arm/cpu/arm926ejs/mxs/clock.c	/^#define	XTAL_FREQ_MHZ	/;"	d	file:
XTAPSTATE_CAPTUREDR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_CAPTUREDR /;"	d	file:
XTAPSTATE_CAPTUREIR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_CAPTUREIR /;"	d	file:
XTAPSTATE_EXIT1DR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_EXIT1DR /;"	d	file:
XTAPSTATE_EXIT1IR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_EXIT1IR /;"	d	file:
XTAPSTATE_EXIT2DR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_EXIT2DR /;"	d	file:
XTAPSTATE_EXIT2IR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_EXIT2IR /;"	d	file:
XTAPSTATE_IRSTATES	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_IRSTATES /;"	d	file:
XTAPSTATE_PAUSEDR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_PAUSEDR /;"	d	file:
XTAPSTATE_PAUSEIR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_PAUSEIR /;"	d	file:
XTAPSTATE_RESET	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_RESET /;"	d	file:
XTAPSTATE_RUNTEST	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_RUNTEST /;"	d	file:
XTAPSTATE_SELECTDR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_SELECTDR /;"	d	file:
XTAPSTATE_SELECTIR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_SELECTIR /;"	d	file:
XTAPSTATE_SHIFTDR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_SHIFTDR /;"	d	file:
XTAPSTATE_SHIFTIR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_SHIFTIR /;"	d	file:
XTAPSTATE_UPDATEDR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_UPDATEDR /;"	d	file:
XTAPSTATE_UPDATEIR	board/esd/common/xilinx_jtag/micro.c	/^#define XTAPSTATE_UPDATEIR /;"	d	file:
XTDI	include/lattice.h	/^#define XTDI	/;"	d
XTDO	include/lattice.h	/^#define XTDO	/;"	d
XTDOMASK	board/esd/common/xilinx_jtag/micro.c	/^#define XTDOMASK /;"	d	file:
XTENSA	arch/Kconfig	/^config XTENSA$/;"	c	choice:choice07312ef30104
XTFPGA_KC705	board/cadence/xtfpga/Kconfig	/^config XTFPGA_KC705$/;"	c	choice:choiceab7e29c80104
XTFPGA_LX110	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX110$/;"	c	choice:choiceab7e29c80104
XTFPGA_LX200	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX200$/;"	c	choice:choiceab7e29c80104
XTFPGA_LX60	board/cadence/xtfpga/Kconfig	/^config XTFPGA_LX60$/;"	c	choice:choiceab7e29c80104
XTFPGA_ML605	board/cadence/xtfpga/Kconfig	/^config XTFPGA_ML605$/;"	c	choice:choiceab7e29c80104
XTHAL_SAS3	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS3(/;"	d
XTHAL_SAS3	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS3(/;"	d
XTHAL_SAS_ALL	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_ALL	/;"	d
XTHAL_SAS_ALL	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_ALL	/;"	d
XTHAL_SAS_ALL	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_ALL	/;"	d
XTHAL_SAS_ANYABI	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_ANYABI /;"	d
XTHAL_SAS_ANYABI	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_ANYABI	/;"	d
XTHAL_SAS_ANYCC	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_ANYCC	/;"	d
XTHAL_SAS_ANYCC	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_ANYCC	/;"	d
XTHAL_SAS_ANYOT	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_ANYOT	/;"	d
XTHAL_SAS_ANYOT	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_ANYOT	/;"	d
XTHAL_SAS_CALE	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_CALE	/;"	d
XTHAL_SAS_CALE	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_CALE	/;"	d
XTHAL_SAS_CALE	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_CALE	/;"	d
XTHAL_SAS_CALR	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_CALR	/;"	d
XTHAL_SAS_CALR	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_CALR	/;"	d
XTHAL_SAS_CALR	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_CALR	/;"	d
XTHAL_SAS_CC	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_CC	/;"	d
XTHAL_SAS_CC	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_CC	/;"	d
XTHAL_SAS_CC	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_CC	/;"	d
XTHAL_SAS_GLOB	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_GLOB	/;"	d
XTHAL_SAS_GLOB	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_GLOB	/;"	d
XTHAL_SAS_GLOB	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_GLOB	/;"	d
XTHAL_SAS_NOCC	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_NOCC	/;"	d
XTHAL_SAS_NOCC	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_NOCC	/;"	d
XTHAL_SAS_NOCC	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_NOCC	/;"	d
XTHAL_SAS_OPT	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_OPT	/;"	d
XTHAL_SAS_OPT	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_OPT	/;"	d
XTHAL_SAS_OPT	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_OPT	/;"	d
XTHAL_SAS_TIE	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define XTHAL_SAS_TIE	/;"	d
XTHAL_SAS_TIE	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define XTHAL_SAS_TIE	/;"	d
XTHAL_SAS_TIE	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define XTHAL_SAS_TIE	/;"	d
XTRN_DECLARE_GLOBAL_DATA_PTR	arch/powerpc/include/asm/global_data.h	/^#define XTRN_DECLARE_GLOBAL_DATA_PTR	/;"	d
XTRN_DECLARE_GLOBAL_DATA_PTR	common/board_f.c	/^#define XTRN_DECLARE_GLOBAL_DATA_PTR	/;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_ELPG_PROGRAM /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define XUSB_PADCTL_ELPG_PROGRAM /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN /;"	d	file:
XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN /;"	d	file:
XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1 /;"	d	file:
XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ /;"	d	file:
XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL1	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL1 /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL0_LOCKDET /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL2	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL2_REFCLKBUF_EN /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_S0_CTL1	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_S0_CTL1 /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_LOCKDET	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_LOCKDET /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL1_MODE /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD /;"	d	file:
XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_RST /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define XUSB_PADCTL_UPHY_PLL_P0_CTL1 /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_MDIV_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_MDIV_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV(/;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_LOCKDET_STATUS	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_LOCKDET_STATUS /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP(/;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL2	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define XUSB_PADCTL_UPHY_PLL_P0_CTL2 /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_CTRL	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_CTRL(/;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_CTRL_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_CTRL_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL4	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define XUSB_PADCTL_UPHY_PLL_P0_CTL4 /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL4_REFCLKBUF_EN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL4_REFCLKBUF_EN /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL4_REFCLK_SEL_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL4_REFCLK_SEL_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_EN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_EN /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_SEL	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_SEL(/;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_SEL_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_SEL_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL5	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define XUSB_PADCTL_UPHY_PLL_P0_CTL5 /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL(/;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL_MASK	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL_MASK /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL8	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define XUSB_PADCTL_UPHY_PLL_P0_CTL8 /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN /;"	d	file:
XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define  XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD /;"	d	file:
XVERCR	arch/sh/include/asm/cpu_sh7722.h	/^#define XVERCR /;"	d
XWAIT	board/esd/common/xilinx_jtag/micro.c	/^#define XWAIT /;"	d	file:
XWT_CSR0_EWDT1_MASK	drivers/watchdog/xilinx_tb_wdt.c	/^#define XWT_CSR0_EWDT1_MASK	/;"	d	file:
XWT_CSR0_WDS_MASK	drivers/watchdog/xilinx_tb_wdt.c	/^#define XWT_CSR0_WDS_MASK	/;"	d	file:
XWT_CSR0_WRS_MASK	drivers/watchdog/xilinx_tb_wdt.c	/^#define XWT_CSR0_WRS_MASK	/;"	d	file:
XWT_CSRX_EWDT2_MASK	drivers/watchdog/xilinx_tb_wdt.c	/^#define XWT_CSRX_EWDT2_MASK	/;"	d	file:
XWUP_MARK	arch/arm/mach-rmobile/pfc-sh73a0.c	/^	SCIFA4_RXD_MARK, XWUP_MARK,$/;"	e	enum:__anon991a8e2d0103	file:
XY	arch/arm/include/asm/arch-sunxi/display2.h	/^#define XY(/;"	d
XY	arch/arm/include/asm/arch/display2.h	/^#define XY(/;"	d
X_MASK	include/bedbug/ppc.h	/^#define X_MASK /;"	d
X_OK	fs/yaffs2/yportenv.h	/^#define X_OK	/;"	d
X_OPCODE	include/bedbug/ppc.h	/^#define X_OPCODE(/;"	d
Xil_DCacheDisable	board/xilinx/zynqmp/xil_io.h	/^void Xil_DCacheDisable(void)$/;"	f	typeref:typename:void
Xil_DCacheEnable	board/xilinx/zynqmp/xil_io.h	/^void Xil_DCacheEnable(void)$/;"	f	typeref:typename:void
Xil_ICacheDisable	board/xilinx/zynqmp/xil_io.h	/^void Xil_ICacheDisable(void)$/;"	f	typeref:typename:void
Xil_ICacheEnable	board/xilinx/zynqmp/xil_io.h	/^void Xil_ICacheEnable(void)$/;"	f	typeref:typename:void
Xil_In32	board/xilinx/zynqmp/xil_io.h	/^int Xil_In32(unsigned long addr)$/;"	f	typeref:typename:int
Xil_Out32	board/xilinx/zynqmp/xil_io.h	/^void Xil_Out32(unsigned long addr, unsigned long val)$/;"	f	typeref:typename:void
Xtensa architecture	arch/xtensa/Kconfig	/^menu "Xtensa architecture"$/;"	m
Y1	arch/powerpc/cpu/mpc8xx/video.c	/^	unsigned char V, Y1, U, Y2;$/;"	m	struct:__anonce1d55370108	typeref:typename:unsigned char	file:
Y2	arch/powerpc/cpu/mpc8xx/video.c	/^	unsigned char V, Y1, U, Y2;$/;"	m	struct:__anonce1d55370108	typeref:typename:unsigned char	file:
YACC_PREFIX_zconf	scripts/kconfig/Makefile	/^YACC_PREFIX_zconf	:= zconf$/;"	m
YAFFSFS_MAX_SYMLINK_DEREFERENCES	fs/yaffs2/yaffsfs.c	/^#define YAFFSFS_MAX_SYMLINK_DEREFERENCES /;"	d	file:
YAFFSFS_N_DSC	fs/yaffs2/yaffscfg.h	/^#define YAFFSFS_N_DSC	/;"	d
YAFFSFS_N_HANDLES	fs/yaffs2/yaffscfg.h	/^#define YAFFSFS_N_HANDLES	/;"	d
YAFFSFS_RW_SHIFT	fs/yaffs2/yaffsfs.c	/^#define YAFFSFS_RW_SHIFT /;"	d	file:
YAFFSFS_RW_SIZE	fs/yaffs2/yaffsfs.c	/^#define YAFFSFS_RW_SIZE /;"	d	file:
YAFFS_ALLOCATION_NLINKS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_ALLOCATION_NLINKS	/;"	d
YAFFS_ALLOCATION_NOBJECTS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_ALLOCATION_NOBJECTS	/;"	d
YAFFS_ALLOCATION_NTNODES	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_ALLOCATION_NTNODES	/;"	d
YAFFS_BLOCK_STATE_ALLOCATING	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_ALLOCATING,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_CHECKPOINT	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_CHECKPOINT,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_COLLECTING	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_COLLECTING,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_DEAD	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_DEAD$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_DIRTY	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_DIRTY,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_EMPTY	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_EMPTY,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_FULL	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_FULL,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_NEEDS_SCAN	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_NEEDS_SCAN,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_SCANNING	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_SCANNING,$/;"	e	enum:yaffs_block_state
YAFFS_BLOCK_STATE_UNKNOWN	fs/yaffs2/yaffs_guts.h	/^	YAFFS_BLOCK_STATE_UNKNOWN = 0,$/;"	e	enum:yaffs_block_state
YAFFS_BYTES_PER_BLOCK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_BYTES_PER_BLOCK	/;"	d
YAFFS_BYTES_PER_CHUNK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_BYTES_PER_CHUNK	/;"	d
YAFFS_BYTES_PER_SPARE	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_BYTES_PER_SPARE	/;"	d
YAFFS_CHECKPOINT_MIN_BLOCKS	fs/yaffs2/yaffs_yaffs2.c	/^#define YAFFS_CHECKPOINT_MIN_BLOCKS /;"	d	file:
YAFFS_CHECKPOINT_VERSION	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_CHECKPOINT_VERSION	/;"	d
YAFFS_CHUNKS_PER_BLOCK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_CHUNKS_PER_BLOCK	/;"	d
YAFFS_CHUNK_SIZE_SHIFT	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_CHUNK_SIZE_SHIFT	/;"	d
YAFFS_ECC_RESULT_FIXED	fs/yaffs2/yaffs_guts.h	/^	YAFFS_ECC_RESULT_FIXED,$/;"	e	enum:yaffs_ecc_result
YAFFS_ECC_RESULT_NO_ERROR	fs/yaffs2/yaffs_guts.h	/^	YAFFS_ECC_RESULT_NO_ERROR,$/;"	e	enum:yaffs_ecc_result
YAFFS_ECC_RESULT_UNFIXED	fs/yaffs2/yaffs_guts.h	/^	YAFFS_ECC_RESULT_UNFIXED$/;"	e	enum:yaffs_ecc_result
YAFFS_ECC_RESULT_UNKNOWN	fs/yaffs2/yaffs_guts.h	/^	YAFFS_ECC_RESULT_UNKNOWN,$/;"	e	enum:yaffs_ecc_result
YAFFS_FAIL	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_FAIL /;"	d
YAFFS_GC_GOOD_ENOUGH	fs/yaffs2/yaffs_guts.c	/^#define YAFFS_GC_GOOD_ENOUGH /;"	d	file:
YAFFS_GC_PASSIVE_THRESHOLD	fs/yaffs2/yaffs_guts.c	/^#define YAFFS_GC_PASSIVE_THRESHOLD /;"	d	file:
YAFFS_HIGHEST_SEQUENCE_NUMBER	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_HIGHEST_SEQUENCE_NUMBER	/;"	d
YAFFS_LOSTNFOUND_MODE	fs/yaffs2/ydirectenv.h	/^#define YAFFS_LOSTNFOUND_MODE	/;"	d
YAFFS_LOSTNFOUND_NAME	fs/yaffs2/ydirectenv.h	/^#define YAFFS_LOSTNFOUND_NAME	/;"	d
YAFFS_LOSTNFOUND_PREFIX	fs/yaffs2/ydirectenv.h	/^#define YAFFS_LOSTNFOUND_PREFIX	/;"	d
YAFFS_LOWEST_SEQUENCE_NUMBER	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_LOWEST_SEQUENCE_NUMBER	/;"	d
YAFFS_MAGIC	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MAGIC	/;"	d
YAFFS_MAX_ALIAS_LENGTH	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MAX_ALIAS_LENGTH	/;"	d
YAFFS_MAX_CHUNK_ID	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MAX_CHUNK_ID	/;"	d
YAFFS_MAX_FILE_SIZE	fs/yaffs2/yaffsfs.h	/^#define YAFFS_MAX_FILE_SIZE /;"	d
YAFFS_MAX_NAME_LENGTH	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MAX_NAME_LENGTH	/;"	d
YAFFS_MAX_OBJECT_ID	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MAX_OBJECT_ID	/;"	d
YAFFS_MAX_SHORT_OP_CACHES	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MAX_SHORT_OP_CACHES	/;"	d
YAFFS_MIN_YAFFS2_CHUNK_SIZE	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MIN_YAFFS2_CHUNK_SIZE	/;"	d
YAFFS_MIN_YAFFS2_SPARE_SIZE	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_MIN_YAFFS2_SPARE_SIZE	/;"	d
YAFFS_NOBJECT_BUCKETS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_NOBJECT_BUCKETS	/;"	d
YAFFS_NTNODES_INTERNAL	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_NTNODES_INTERNAL	/;"	d
YAFFS_NTNODES_LEVEL0	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_NTNODES_LEVEL0	/;"	d
YAFFS_NUMBER_OF_BLOCK_STATES	fs/yaffs2/yaffs_guts.h	/^#define	YAFFS_NUMBER_OF_BLOCK_STATES /;"	d
YAFFS_N_TEMP_BUFFERS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_N_TEMP_BUFFERS	/;"	d
YAFFS_OBJECTID_CHECKPOINT_DATA	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECTID_CHECKPOINT_DATA	/;"	d
YAFFS_OBJECTID_DELETED	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECTID_DELETED	/;"	d
YAFFS_OBJECTID_LOSTNFOUND	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECTID_LOSTNFOUND	/;"	d
YAFFS_OBJECTID_ROOT	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECTID_ROOT	/;"	d
YAFFS_OBJECTID_SUMMARY	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECTID_SUMMARY	/;"	d
YAFFS_OBJECTID_UNLINKED	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECTID_UNLINKED	/;"	d
YAFFS_OBJECT_SPACE	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECT_SPACE	/;"	d
YAFFS_OBJECT_TYPE_DIRECTORY	fs/yaffs2/yaffs_guts.h	/^	YAFFS_OBJECT_TYPE_DIRECTORY,$/;"	e	enum:yaffs_obj_type
YAFFS_OBJECT_TYPE_FILE	fs/yaffs2/yaffs_guts.h	/^	YAFFS_OBJECT_TYPE_FILE,$/;"	e	enum:yaffs_obj_type
YAFFS_OBJECT_TYPE_HARDLINK	fs/yaffs2/yaffs_guts.h	/^	YAFFS_OBJECT_TYPE_HARDLINK,$/;"	e	enum:yaffs_obj_type
YAFFS_OBJECT_TYPE_MAX	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OBJECT_TYPE_MAX /;"	d
YAFFS_OBJECT_TYPE_SPECIAL	fs/yaffs2/yaffs_guts.h	/^	YAFFS_OBJECT_TYPE_SPECIAL$/;"	e	enum:yaffs_obj_type
YAFFS_OBJECT_TYPE_SYMLINK	fs/yaffs2/yaffs_guts.h	/^	YAFFS_OBJECT_TYPE_SYMLINK,$/;"	e	enum:yaffs_obj_type
YAFFS_OBJECT_TYPE_UNKNOWN	fs/yaffs2/yaffs_guts.h	/^	YAFFS_OBJECT_TYPE_UNKNOWN,$/;"	e	enum:yaffs_obj_type
YAFFS_OK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_OK	/;"	d
YAFFS_PATH_DIVIDERS	fs/yaffs2/ydirectenv.h	/^#define YAFFS_PATH_DIVIDERS /;"	d
YAFFS_ROOT_MODE	fs/yaffs2/ydirectenv.h	/^#define YAFFS_ROOT_MODE	/;"	d
YAFFS_SEQUENCE_BAD_BLOCK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_SEQUENCE_BAD_BLOCK	/;"	d
YAFFS_SEQUENCE_CHECKPOINT_DATA	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_SEQUENCE_CHECKPOINT_DATA	/;"	d
YAFFS_SHARE_READ	fs/yaffs2/yaffsfs.h	/^#define YAFFS_SHARE_READ /;"	d
YAFFS_SHARE_WRITE	fs/yaffs2/yaffsfs.h	/^#define YAFFS_SHARE_WRITE /;"	d
YAFFS_SHORT_NAME_LENGTH	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_SHORT_NAME_LENGTH	/;"	d
YAFFS_SMALL_HOLE_THRESHOLD	fs/yaffs2/yaffs_yaffs2.c	/^#define YAFFS_SMALL_HOLE_THRESHOLD /;"	d	file:
YAFFS_SUMMARY_VERSION	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_SUMMARY_VERSION	/;"	d
YAFFS_TNODES_INTERNAL_BITS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_TNODES_INTERNAL_BITS	/;"	d
YAFFS_TNODES_INTERNAL_MASK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_TNODES_INTERNAL_MASK	/;"	d
YAFFS_TNODES_LEVEL0_BITS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_TNODES_LEVEL0_BITS	/;"	d
YAFFS_TNODES_LEVEL0_MASK	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_TNODES_LEVEL0_MASK	/;"	d
YAFFS_TNODES_MAX_BITS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_TNODES_MAX_BITS	/;"	d
YAFFS_TNODES_MAX_LEVEL	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_TNODES_MAX_LEVEL	/;"	d
YAFFS_TRACE_ALLOCATE	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_ALLOCATE	/;"	d
YAFFS_TRACE_ALWAYS	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_ALWAYS	/;"	d
YAFFS_TRACE_BACKGROUND	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_BACKGROUND	/;"	d
YAFFS_TRACE_BAD_BLOCKS	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_BAD_BLOCKS	/;"	d
YAFFS_TRACE_BUFFERS	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_BUFFERS	/;"	d
YAFFS_TRACE_BUG	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_BUG	/;"	d
YAFFS_TRACE_CHECKPOINT	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_CHECKPOINT	/;"	d
YAFFS_TRACE_DELETION	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_DELETION	/;"	d
YAFFS_TRACE_ERASE	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_ERASE	/;"	d
YAFFS_TRACE_ERROR	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_ERROR	/;"	d
YAFFS_TRACE_GC	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_GC	/;"	d
YAFFS_TRACE_GC_DETAIL	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_GC_DETAIL	/;"	d
YAFFS_TRACE_LOCK	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_LOCK	/;"	d
YAFFS_TRACE_MOUNT	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_MOUNT	/;"	d
YAFFS_TRACE_MTD	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_MTD	/;"	d
YAFFS_TRACE_NANDACCESS	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_NANDACCESS	/;"	d
YAFFS_TRACE_OS	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_OS	/;"	d
YAFFS_TRACE_SCAN	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_SCAN	/;"	d
YAFFS_TRACE_SCAN_DEBUG	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_SCAN_DEBUG	/;"	d
YAFFS_TRACE_SYNC	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_SYNC	/;"	d
YAFFS_TRACE_TRACING	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_TRACING	/;"	d
YAFFS_TRACE_VERIFY	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_VERIFY	/;"	d
YAFFS_TRACE_VERIFY_ALL	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_VERIFY_ALL	/;"	d
YAFFS_TRACE_VERIFY_FULL	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_VERIFY_FULL	/;"	d
YAFFS_TRACE_VERIFY_NAND	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_VERIFY_NAND	/;"	d
YAFFS_TRACE_WRITE	fs/yaffs2/yaffs_trace.h	/^#define YAFFS_TRACE_WRITE	/;"	d
YAFFS_WR_ATTEMPTS	fs/yaffs2/yaffs_guts.h	/^#define YAFFS_WR_ATTEMPTS	/;"	d
YCHAR	fs/yaffs2/ydirectenv.h	/^#define YCHAR /;"	d
YCbCr	drivers/video/ipu.h	/^	YCbCr,$/;"	e	enum:__anon4a35f9fd0b03
YDA	arch/sh/include/asm/cpu_sh7722.h	/^#define YDA	/;"	d
YEA	arch/sh/include/asm/cpu_sh7722.h	/^#define YEA	/;"	d
YEAR_BASE	include/linux/time.h	/^#define YEAR_BASE	/;"	d
YELLOW	board/bf533-stamp/video.h	/^#define YELLOW /;"	d
YELLOW	tools/patman/terminal.py	/^    BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8)$/;"	v	class:Color
YELLOW_LED	board/atmel/at91rm9200ek/led.c	/^#define	YELLOW_LED	/;"	d	file:
YES	fs/ext4/ext4_common.h	/^#define YES	/;"	d
YESNO_HEIGTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define YESNO_HEIGTH_MIN /;"	d
YESNO_WIDTH_MIN	scripts/kconfig/lxdialog/dialog.h	/^#define YESNO_WIDTH_MIN /;"	d
YFIFO_ERR	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define YFIFO_ERR /;"	d
YOUNG_ZNODE_AGE	fs/ubifs/ubifs.h	/^#define YOUNG_ZNODE_AGE /;"	d
YPR	arch/sh/include/asm/cpu_sh7722.h	/^#define YPR	/;"	d
YSA	arch/sh/include/asm/cpu_sh7722.h	/^#define YSA	/;"	d
YSRA	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define YSRA /;"	d
YSRB	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define YSRB /;"	d
YUCHAR	fs/yaffs2/ydirectenv.h	/^#define YUCHAR /;"	d
YUV	drivers/video/ipu.h	/^	YUV$/;"	e	enum:__anon4a35f9fd0b03
YUV2RGB	drivers/video/ipu_disp.c	/^	YUV2RGB,$/;"	e	enum:csc_type_t	file:
YUV2YUV	drivers/video/ipu_disp.c	/^	YUV2YUV,$/;"	e	enum:csc_type_t	file:
YUV_VIRWIDTH	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define YUV_VIRWIDTH(/;"	d
YYABORT	scripts/kconfig/zconf.tab.c	/^#define YYABORT	/;"	d	file:
YYACCEPT	scripts/kconfig/zconf.tab.c	/^#define YYACCEPT	/;"	d	file:
YYBACKUP	scripts/kconfig/zconf.tab.c	/^#define YYBACKUP(/;"	d	file:
YYBISON	scripts/kconfig/zconf.tab.c	/^#define YYBISON /;"	d	file:
YYBISON_VERSION	scripts/kconfig/zconf.tab.c	/^#define YYBISON_VERSION /;"	d	file:
YYCASE_	scripts/kconfig/zconf.tab.c	/^# define YYCASE_(/;"	d	file:
YYCOPY	scripts/kconfig/zconf.tab.c	/^#   define YYCOPY(/;"	d	file:
YYCOPY_NEEDED	scripts/kconfig/zconf.tab.c	/^# define YYCOPY_NEEDED /;"	d	file:
YYDEBUG	scripts/kconfig/zconf.tab.c	/^# define YYDEBUG /;"	d	file:
YYDPRINTF	scripts/kconfig/zconf.tab.c	/^# define YYDPRINTF(/;"	d	file:
YYEMPTY	scripts/kconfig/zconf.tab.c	/^#define YYEMPTY	/;"	d	file:
YYEOF	scripts/kconfig/zconf.tab.c	/^#define YYEOF	/;"	d	file:
YYERRCODE	scripts/kconfig/zconf.tab.c	/^#define YYERRCODE	/;"	d	file:
YYERROR	scripts/kconfig/zconf.tab.c	/^#define YYERROR	/;"	d	file:
YYERROR_VERBOSE	scripts/kconfig/zconf.tab.c	/^# define YYERROR_VERBOSE /;"	d	file:
YYERROR_VERBOSE_ARGS_MAXIMUM	scripts/kconfig/zconf.tab.c	/^  enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };$/;"	e	enum:yysyntax_error::__anonb9c1ab820103	file:
YYFAIL	scripts/kconfig/zconf.tab.c	/^#define YYFAIL	/;"	d	file:
YYFINAL	scripts/kconfig/zconf.tab.c	/^#define YYFINAL /;"	d	file:
YYFPRINTF	scripts/kconfig/zconf.tab.c	/^#  define YYFPRINTF /;"	d	file:
YYFREE	scripts/kconfig/zconf.tab.c	/^#   define YYFREE /;"	d	file:
YYID	scripts/kconfig/zconf.tab.c	/^# define YYID(/;"	d	file:
YYID	scripts/kconfig/zconf.tab.c	/^YYID (int yyi)$/;"	f	typeref:typename:int	file:
YYINITDEPTH	scripts/kconfig/zconf.tab.c	/^# define YYINITDEPTH /;"	d	file:
YYLAST	scripts/kconfig/zconf.tab.c	/^#define YYLAST /;"	d	file:
YYLEX	scripts/kconfig/zconf.tab.c	/^# define YYLEX /;"	d	file:
YYLLOC_DEFAULT	scripts/kconfig/zconf.tab.c	/^# define YYLLOC_DEFAULT(/;"	d	file:
YYLSP_NEEDED	scripts/kconfig/zconf.tab.c	/^#define YYLSP_NEEDED /;"	d	file:
YYMALLOC	scripts/kconfig/zconf.tab.c	/^#   define YYMALLOC /;"	d	file:
YYMAXDEPTH	scripts/kconfig/zconf.tab.c	/^# define YYMAXDEPTH /;"	d	file:
YYMAXUTOK	scripts/kconfig/zconf.tab.c	/^#define YYMAXUTOK /;"	d	file:
YYNNTS	scripts/kconfig/zconf.tab.c	/^#define YYNNTS /;"	d	file:
YYNRULES	scripts/kconfig/zconf.tab.c	/^#define YYNRULES /;"	d	file:
YYNSTATES	scripts/kconfig/zconf.tab.c	/^#define YYNSTATES /;"	d	file:
YYNTOKENS	scripts/kconfig/zconf.tab.c	/^#define YYNTOKENS /;"	d	file:
YYPACT_NINF	scripts/kconfig/zconf.tab.c	/^#define YYPACT_NINF /;"	d	file:
YYPOPSTACK	scripts/kconfig/zconf.tab.c	/^#define YYPOPSTACK(/;"	d	file:
YYPULL	scripts/kconfig/zconf.tab.c	/^#define YYPULL /;"	d	file:
YYPURE	scripts/kconfig/zconf.tab.c	/^#define YYPURE /;"	d	file:
YYPUSH	scripts/kconfig/zconf.tab.c	/^#define YYPUSH /;"	d	file:
YYRECOVERING	scripts/kconfig/zconf.tab.c	/^#define YYRECOVERING(/;"	d	file:
YYRHSLOC	scripts/kconfig/zconf.tab.c	/^#define YYRHSLOC(/;"	d	file:
YYSIZE_MAXIMUM	scripts/kconfig/zconf.tab.c	/^#define YYSIZE_MAXIMUM /;"	d	file:
YYSIZE_T	scripts/kconfig/zconf.tab.c	/^#  define YYSIZE_T /;"	d	file:
YYSKELETON_NAME	scripts/kconfig/zconf.tab.c	/^#define YYSKELETON_NAME /;"	d	file:
YYSTACK_ALLOC	scripts/kconfig/zconf.tab.c	/^#    define YYSTACK_ALLOC /;"	d	file:
YYSTACK_ALLOC	scripts/kconfig/zconf.tab.c	/^#  define YYSTACK_ALLOC /;"	d	file:
YYSTACK_ALLOC_MAXIMUM	scripts/kconfig/zconf.tab.c	/^#   define YYSTACK_ALLOC_MAXIMUM /;"	d	file:
YYSTACK_BYTES	scripts/kconfig/zconf.tab.c	/^# define YYSTACK_BYTES(/;"	d	file:
YYSTACK_FREE	scripts/kconfig/zconf.tab.c	/^#  define YYSTACK_FREE /;"	d	file:
YYSTACK_FREE	scripts/kconfig/zconf.tab.c	/^#  define YYSTACK_FREE(/;"	d	file:
YYSTACK_GAP_MAXIMUM	scripts/kconfig/zconf.tab.c	/^# define YYSTACK_GAP_MAXIMUM /;"	d	file:
YYSTACK_RELOCATE	scripts/kconfig/zconf.tab.c	/^# define YYSTACK_RELOCATE(/;"	d	file:
YYSTATE	scripts/kconfig/zconf.lex.c	/^#define YYSTATE /;"	d	file:
YYSTYPE	scripts/kconfig/zconf.tab.c	/^typedef union YYSTYPE$/;"	u	file:
YYSTYPE	scripts/kconfig/zconf.tab.c	/^} YYSTYPE;$/;"	t	typeref:union:YYSTYPE	file:
YYSTYPE_IS_DECLARED	scripts/kconfig/zconf.tab.c	/^# define YYSTYPE_IS_DECLARED /;"	d	file:
YYSTYPE_IS_TRIVIAL	scripts/kconfig/zconf.tab.c	/^# define YYSTYPE_IS_TRIVIAL /;"	d	file:
YYSYNTAX_ERROR	scripts/kconfig/zconf.tab.c	/^# define YYSYNTAX_ERROR /;"	d	file:
YYTABLES_NAME	scripts/kconfig/zconf.lex.c	/^#define YYTABLES_NAME /;"	d	file:
YYTABLE_NINF	scripts/kconfig/zconf.tab.c	/^#define YYTABLE_NINF /;"	d	file:
YYTERROR	scripts/kconfig/zconf.tab.c	/^#define YYTERROR	/;"	d	file:
YYTOKENTYPE	scripts/kconfig/zconf.tab.c	/^# define YYTOKENTYPE$/;"	d	file:
YYTOKEN_TABLE	scripts/kconfig/zconf.tab.c	/^# define YYTOKEN_TABLE /;"	d	file:
YYTRANSLATE	scripts/kconfig/zconf.tab.c	/^#define YYTRANSLATE(/;"	d	file:
YYUNDEFTOK	scripts/kconfig/zconf.tab.c	/^#define YYUNDEFTOK /;"	d	file:
YYUSE	scripts/kconfig/zconf.tab.c	/^# define YYUSE(/;"	d	file:
YY_	scripts/kconfig/zconf.tab.c	/^#   define YY_(/;"	d	file:
YY_	scripts/kconfig/zconf.tab.c	/^#  define YY_(/;"	d	file:
YY_AT_BOL	scripts/kconfig/zconf.lex.c	/^#define YY_AT_BOL(/;"	d	file:
YY_BREAK	scripts/kconfig/zconf.lex.c	/^#define YY_BREAK /;"	d	file:
YY_BUFFER_EOF_PENDING	scripts/kconfig/zconf.lex.c	/^#define YY_BUFFER_EOF_PENDING /;"	d	file:
YY_BUFFER_NEW	scripts/kconfig/zconf.lex.c	/^#define YY_BUFFER_NEW /;"	d	file:
YY_BUFFER_NORMAL	scripts/kconfig/zconf.lex.c	/^#define YY_BUFFER_NORMAL /;"	d	file:
YY_BUFFER_STATE	scripts/kconfig/zconf.lex.c	/^typedef struct yy_buffer_state *YY_BUFFER_STATE;$/;"	t	typeref:struct:yy_buffer_state *	file:
YY_BUF_SIZE	scripts/kconfig/zconf.lex.c	/^#define YY_BUF_SIZE /;"	d	file:
YY_CHAR	scripts/kconfig/zconf.lex.c	/^typedef unsigned char YY_CHAR;$/;"	t	typeref:typename:unsigned char	file:
YY_CURRENT_BUFFER	scripts/kconfig/zconf.lex.c	/^#define YY_CURRENT_BUFFER /;"	d	file:
YY_CURRENT_BUFFER_LVALUE	scripts/kconfig/zconf.lex.c	/^#define YY_CURRENT_BUFFER_LVALUE /;"	d	file:
YY_DECL	scripts/kconfig/zconf.lex.c	/^#define YY_DECL /;"	d	file:
YY_DECL_IS_OURS	scripts/kconfig/zconf.lex.c	/^#define YY_DECL_IS_OURS /;"	d	file:
YY_DO_BEFORE_ACTION	scripts/kconfig/zconf.lex.c	/^#define YY_DO_BEFORE_ACTION /;"	d	file:
YY_END_OF_BUFFER	scripts/kconfig/zconf.lex.c	/^#define YY_END_OF_BUFFER /;"	d	file:
YY_END_OF_BUFFER_CHAR	scripts/kconfig/zconf.lex.c	/^#define YY_END_OF_BUFFER_CHAR /;"	d	file:
YY_EXIT_FAILURE	scripts/kconfig/zconf.lex.c	/^#define YY_EXIT_FAILURE /;"	d	file:
YY_EXTRA_TYPE	scripts/kconfig/zconf.lex.c	/^#define YY_EXTRA_TYPE /;"	d	file:
YY_FATAL_ERROR	scripts/kconfig/zconf.lex.c	/^#define YY_FATAL_ERROR(/;"	d	file:
YY_FLEX_MAJOR_VERSION	scripts/kconfig/zconf.lex.c	/^#define YY_FLEX_MAJOR_VERSION /;"	d	file:
YY_FLEX_MINOR_VERSION	scripts/kconfig/zconf.lex.c	/^#define YY_FLEX_MINOR_VERSION /;"	d	file:
YY_FLEX_SUBMINOR_VERSION	scripts/kconfig/zconf.lex.c	/^#define YY_FLEX_SUBMINOR_VERSION /;"	d	file:
YY_FLUSH_BUFFER	scripts/kconfig/zconf.lex.c	/^#define YY_FLUSH_BUFFER /;"	d	file:
YY_INPUT	scripts/kconfig/zconf.lex.c	/^#define YY_INPUT(/;"	d	file:
YY_INT_ALIGNED	scripts/kconfig/zconf.lex.c	/^#define  YY_INT_ALIGNED /;"	d	file:
YY_LESS_LINENO	scripts/kconfig/zconf.lex.c	/^    #define YY_LESS_LINENO(/;"	d	file:
YY_LOCATION_PRINT	scripts/kconfig/zconf.tab.c	/^# define YY_LOCATION_PRINT(/;"	d	file:
YY_MORE_ADJ	scripts/kconfig/zconf.lex.c	/^#define YY_MORE_ADJ /;"	d	file:
YY_NEW_FILE	scripts/kconfig/zconf.lex.c	/^#define YY_NEW_FILE /;"	d	file:
YY_NO_INPUT	scripts/kconfig/zconf.lex.c	/^#define YY_NO_INPUT /;"	d	file:
YY_NULL	scripts/kconfig/zconf.lex.c	/^#define YY_NULL /;"	d	file:
YY_NUM_RULES	scripts/kconfig/zconf.lex.c	/^#define YY_NUM_RULES /;"	d	file:
YY_READ_BUF_SIZE	scripts/kconfig/zconf.lex.c	/^#define YY_READ_BUF_SIZE /;"	d	file:
YY_REDUCE_PRINT	scripts/kconfig/zconf.tab.c	/^# define YY_REDUCE_PRINT(/;"	d	file:
YY_RESTORE_YY_MORE_OFFSET	scripts/kconfig/zconf.lex.c	/^#define YY_RESTORE_YY_MORE_OFFSET$/;"	d	file:
YY_RULE_SETUP	scripts/kconfig/zconf.lex.c	/^#define YY_RULE_SETUP /;"	d	file:
YY_SC_TO_UI	scripts/kconfig/zconf.lex.c	/^#define YY_SC_TO_UI(/;"	d	file:
YY_SKIP_YYWRAP	scripts/kconfig/zconf.lex.c	/^#define YY_SKIP_YYWRAP$/;"	d	file:
YY_STACK_PRINT	scripts/kconfig/zconf.tab.c	/^# define YY_STACK_PRINT(/;"	d	file:
YY_START	scripts/kconfig/zconf.lex.c	/^#define YY_START /;"	d	file:
YY_START_STACK_INCR	scripts/kconfig/zconf.lex.c	/^#define YY_START_STACK_INCR /;"	d	file:
YY_STATE_BUF_SIZE	scripts/kconfig/zconf.lex.c	/^#define YY_STATE_BUF_SIZE /;"	d	file:
YY_STATE_EOF	scripts/kconfig/zconf.lex.c	/^#define YY_STATE_EOF(/;"	d	file:
YY_STRUCT_YY_BUFFER_STATE	scripts/kconfig/zconf.lex.c	/^#define YY_STRUCT_YY_BUFFER_STATE$/;"	d	file:
YY_SYMBOL_PRINT	scripts/kconfig/zconf.tab.c	/^# define YY_SYMBOL_PRINT(/;"	d	file:
YY_TYPEDEF_YY_BUFFER_STATE	scripts/kconfig/zconf.lex.c	/^#define YY_TYPEDEF_YY_BUFFER_STATE$/;"	d	file:
YY_TYPEDEF_YY_SIZE_T	scripts/kconfig/zconf.lex.c	/^#define YY_TYPEDEF_YY_SIZE_T$/;"	d	file:
YY_USER_ACTION	scripts/kconfig/zconf.lex.c	/^#define YY_USER_ACTION$/;"	d	file:
YY_USE_CONST	scripts/kconfig/zconf.lex.c	/^#define YY_USE_CONST$/;"	d	file:
Y_CURRENT_TIME	fs/yaffs2/ydirectenv.h	/^#define Y_CURRENT_TIME /;"	d
Y_DUMP_STACK	fs/yaffs2/yportenv.h	/^#define Y_DUMP_STACK(/;"	d
Y_TIME_CONVERT	fs/yaffs2/ydirectenv.h	/^#define Y_TIME_CONVERT(/;"	d
You	doc/README.x86	/^You can extract what you need:$/;"	l
You	doc/README.x86	/^You can get these binary blobs by:$/;"	l
You	doc/README.x86	/^You can ignore flashregion_1_bios.bin - it is not used.$/;"	l
You	doc/README.x86	/^You still need two more binary blobs. For Bayley Bay, they can be extracted$/;"	l
Z1	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	Z1,$/;"	e	enum:board_rev
Z1_PCAC	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	Z1_PCAC,$/;"	e	enum:board_rev
Z1_RD_SLED	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	Z1_RD_SLED,$/;"	e	enum:board_rev
Z3D_2D_CONSTANT_SOURCE0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_CONSTANT_SOURCE0 /;"	d
Z3D_2D_CONSTANT_SOURCE1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_CONSTANT_SOURCE1 /;"	d
Z3D_2D_CTRL_STATUS	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_CTRL_STATUS /;"	d
Z3D_2D_DMAPORT	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_DMAPORT /;"	d
Z3D_2D_DSTLOC	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_DSTLOC /;"	d
Z3D_2D_SIZE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_SIZE /;"	d
Z3D_2D_SRCLOC	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_SRCLOC /;"	d
Z3D_2D_STPCOLOR0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPCOLOR0 /;"	d
Z3D_2D_STPCOLOR1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPCOLOR1 /;"	d
Z3D_2D_STPPARAMETER_SET0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPARAMETER_SET0 /;"	d
Z3D_2D_STPPARAMETER_SET1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPARAMETER_SET1 /;"	d
Z3D_2D_STPPAT_0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_0 /;"	d
Z3D_2D_STPPAT_1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_1 /;"	d
Z3D_2D_STPPAT_10	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_10 /;"	d
Z3D_2D_STPPAT_11	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_11 /;"	d
Z3D_2D_STPPAT_12	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_12 /;"	d
Z3D_2D_STPPAT_13	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_13 /;"	d
Z3D_2D_STPPAT_14	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_14 /;"	d
Z3D_2D_STPPAT_15	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_15 /;"	d
Z3D_2D_STPPAT_16	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_16 /;"	d
Z3D_2D_STPPAT_17	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_17 /;"	d
Z3D_2D_STPPAT_18	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_18 /;"	d
Z3D_2D_STPPAT_19	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_19 /;"	d
Z3D_2D_STPPAT_2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_2 /;"	d
Z3D_2D_STPPAT_20	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_20 /;"	d
Z3D_2D_STPPAT_21	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_21 /;"	d
Z3D_2D_STPPAT_22	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_22 /;"	d
Z3D_2D_STPPAT_23	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_23 /;"	d
Z3D_2D_STPPAT_24	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_24 /;"	d
Z3D_2D_STPPAT_25	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_25 /;"	d
Z3D_2D_STPPAT_26	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_26 /;"	d
Z3D_2D_STPPAT_27	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_27 /;"	d
Z3D_2D_STPPAT_28	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_28 /;"	d
Z3D_2D_STPPAT_29	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_29 /;"	d
Z3D_2D_STPPAT_3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_3 /;"	d
Z3D_2D_STPPAT_30	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_30 /;"	d
Z3D_2D_STPPAT_31	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_31 /;"	d
Z3D_2D_STPPAT_4	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_4 /;"	d
Z3D_2D_STPPAT_5	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_5 /;"	d
Z3D_2D_STPPAT_6	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_6 /;"	d
Z3D_2D_STPPAT_7	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_7 /;"	d
Z3D_2D_STPPAT_8	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_8 /;"	d
Z3D_2D_STPPAT_9	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_2D_STPPAT_9 /;"	d
Z3D_ALPHA_TEST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_ALPHA_TEST /;"	d
Z3D_AR00	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR00 /;"	d
Z3D_AR01	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR01 /;"	d
Z3D_AR02	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR02 /;"	d
Z3D_AR03	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR03 /;"	d
Z3D_AR10	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR10 /;"	d
Z3D_AR11	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR11 /;"	d
Z3D_AR12	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR12 /;"	d
Z3D_AR13	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR13 /;"	d
Z3D_AR20	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR20 /;"	d
Z3D_AR21	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR21 /;"	d
Z3D_AR22	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR22 /;"	d
Z3D_AR23	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_AR23 /;"	d
Z3D_BETWEEN_TEST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BETWEEN_TEST /;"	d
Z3D_BR00	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BR00 /;"	d
Z3D_BR01	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BR01 /;"	d
Z3D_BR10	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BR10 /;"	d
Z3D_BR11	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BR11 /;"	d
Z3D_BR20	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BR20 /;"	d
Z3D_BR21	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BR21 /;"	d
Z3D_BTR0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BTR0 /;"	d
Z3D_BTR1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BTR1 /;"	d
Z3D_BTR2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BTR2 /;"	d
Z3D_BTR3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_BTR3 /;"	d
Z3D_CACHE_INVALID	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_CACHE_INVALID /;"	d
Z3D_CCR0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_CCR0 /;"	d
Z3D_CCR1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_CCR1 /;"	d
Z3D_DBADR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DBADR /;"	d
Z3D_DEPTH_ROP_BLEND_DITHER	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DEPTH_ROP_BLEND_DITHER /;"	d
Z3D_DET_MAX	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DET_MAX /;"	d
Z3D_DET_MIN	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DET_MIN /;"	d
Z3D_DLBPRST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DLBPRST /;"	d
Z3D_DLBRST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DLBRST /;"	d
Z3D_DLBWST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DLBWST /;"	d
Z3D_DMDR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_DMDR /;"	d
Z3D_EXPR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_EXPR /;"	d
Z3D_FBUS_MODE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FBUS_MODE /;"	d
Z3D_FB_BASE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FB_BASE /;"	d
Z3D_FB_BASE_SR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FB_BASE_SR /;"	d
Z3D_FB_FLUSH	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FB_FLUSH /;"	d
Z3D_FPU_MODE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FPU_MODE /;"	d
Z3D_FR0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FR0 /;"	d
Z3D_FR1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FR1 /;"	d
Z3D_FR2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_FR2 /;"	d
Z3D_GAMMA_TABLE0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_GAMMA_TABLE0 /;"	d
Z3D_GAMMA_TABLE1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_GAMMA_TABLE1 /;"	d
Z3D_GAMMA_TABLE2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_GAMMA_TABLE2 /;"	d
Z3D_GNT_SET	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_GNT_SET /;"	d
Z3D_IMADR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IMADR /;"	d
Z3D_IREG	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IREG /;"	d
Z3D_IXR00	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR00 /;"	d
Z3D_IXR01	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR01 /;"	d
Z3D_IXR02	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR02 /;"	d
Z3D_IXR03	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR03 /;"	d
Z3D_IXR10	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR10 /;"	d
Z3D_IXR11	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR11 /;"	d
Z3D_IXR12	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR12 /;"	d
Z3D_IXR13	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR13 /;"	d
Z3D_IXR20	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR20 /;"	d
Z3D_IXR21	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR21 /;"	d
Z3D_IXR22	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR22 /;"	d
Z3D_IXR23	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_IXR23 /;"	d
Z3D_LC0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_LC0 /;"	d
Z3D_LC1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_LC1 /;"	d
Z3D_LC2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_LC2 /;"	d
Z3D_LC3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_LC3 /;"	d
Z3D_LCD_SIZE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_LCD_SIZE /;"	d
Z3D_LCD_SIZE_SR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_LCD_SIZE_SR /;"	d
Z3D_MASK	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_MASK /;"	d
Z3D_MR0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_MR0 /;"	d
Z3D_MR1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_MR1 /;"	d
Z3D_MR2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_MR2 /;"	d
Z3D_MR3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_MR3 /;"	d
Z3D_PAR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_PAR /;"	d
Z3D_PBIR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_PBIR /;"	d
Z3D_PC	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_PC /;"	d
Z3D_PCSP	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_PCSP /;"	d
Z3D_POLYGON_OFFSET	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_POLYGON_OFFSET /;"	d
Z3D_READRESET	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_READRESET /;"	d
Z3D_RENDER	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_RENDER /;"	d
Z3D_SC0_MAX	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC0_MAX /;"	d
Z3D_SC0_MIN	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC0_MIN /;"	d
Z3D_SC1_MAX	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC1_MAX /;"	d
Z3D_SC1_MIN	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC1_MIN /;"	d
Z3D_SC2_MAX	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC2_MAX /;"	d
Z3D_SC2_MIN	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC2_MIN /;"	d
Z3D_SC3_MAX	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC3_MAX /;"	d
Z3D_SC3_MIN	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC3_MIN /;"	d
Z3D_SCISSOR_MAX	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SCISSOR_MAX /;"	d
Z3D_SCISSOR_MIN	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SCISSOR_MIN /;"	d
Z3D_SC_MODE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SC_MODE /;"	d
Z3D_SMDR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SMDR /;"	d
Z3D_SR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SR /;"	d
Z3D_STATE_MODE	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_STATE_MODE /;"	d
Z3D_STENCIL_TEST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_STENCIL_TEST /;"	d
Z3D_SYS_BSYCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_BSYCNT /;"	d
Z3D_SYS_CLK	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_CLK /;"	d
Z3D_SYS_CONF	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_CONF /;"	d
Z3D_SYS_DBINV	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_DBINV /;"	d
Z3D_SYS_GBCNT	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_GBCNT /;"	d
Z3D_SYS_I2F_DST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_I2F_DST /;"	d
Z3D_SYS_I2F_FMT	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_I2F_FMT /;"	d
Z3D_SYS_I2F_SRC	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_I2F_SRC /;"	d
Z3D_SYS_INT_CLEAR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_INT_CLEAR /;"	d
Z3D_SYS_INT_MASK	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_INT_MASK /;"	d
Z3D_SYS_INT_STATUS	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_INT_STATUS /;"	d
Z3D_SYS_RESET	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_RESET /;"	d
Z3D_SYS_STATUS	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_STATUS /;"	d
Z3D_SYS_VERSION	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_SYS_VERSION /;"	d
Z3D_TEXTURE_ALPHA_A0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_A0 /;"	d
Z3D_TEXTURE_ALPHA_A1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_A1 /;"	d
Z3D_TEXTURE_ALPHA_A2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_A2 /;"	d
Z3D_TEXTURE_ALPHA_A3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_A3 /;"	d
Z3D_TEXTURE_ALPHA_A4	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_A4 /;"	d
Z3D_TEXTURE_ALPHA_A5	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_A5 /;"	d
Z3D_TEXTURE_ALPHA_B0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_B0 /;"	d
Z3D_TEXTURE_ALPHA_B1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_B1 /;"	d
Z3D_TEXTURE_ALPHA_B2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_B2 /;"	d
Z3D_TEXTURE_ALPHA_B3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_B3 /;"	d
Z3D_TEXTURE_ALPHA_B4	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_B4 /;"	d
Z3D_TEXTURE_ALPHA_B5	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_ALPHA_B5 /;"	d
Z3D_TEXTURE_BASE_HI_A	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_BASE_HI_A /;"	d
Z3D_TEXTURE_BASE_HI_B	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_BASE_HI_B /;"	d
Z3D_TEXTURE_BASE_LO_A	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_BASE_LO_A /;"	d
Z3D_TEXTURE_BASE_LO_B	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_BASE_LO_B /;"	d
Z3D_TEXTURE_FLUSH	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_FLUSH /;"	d
Z3D_TEXTURE_MODE_A	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_MODE_A /;"	d
Z3D_TEXTURE_MODE_B	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_TEXTURE_MODE_B /;"	d
Z3D_UDR0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_UDR0 /;"	d
Z3D_UDR1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_UDR1 /;"	d
Z3D_UDR2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_UDR2 /;"	d
Z3D_UDR3	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_UDR3 /;"	d
Z3D_V0_A	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_A /;"	d
Z3D_V0_B	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_B /;"	d
Z3D_V0_F	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_F /;"	d
Z3D_V0_G	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_G /;"	d
Z3D_V0_R	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_R /;"	d
Z3D_V0_SB	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_SB /;"	d
Z3D_V0_SG	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_SG /;"	d
Z3D_V0_SR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_SR /;"	d
Z3D_V0_U0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_U0 /;"	d
Z3D_V0_U1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_U1 /;"	d
Z3D_V0_V0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_V0 /;"	d
Z3D_V0_V1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_V1 /;"	d
Z3D_V0_W	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_W /;"	d
Z3D_V0_X	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_X /;"	d
Z3D_V0_Y	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_Y /;"	d
Z3D_V0_Z	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V0_Z /;"	d
Z3D_V1_A	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_A /;"	d
Z3D_V1_B	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_B /;"	d
Z3D_V1_F	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_F /;"	d
Z3D_V1_G	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_G /;"	d
Z3D_V1_R	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_R /;"	d
Z3D_V1_SB	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_SB /;"	d
Z3D_V1_SG	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_SG /;"	d
Z3D_V1_SR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_SR /;"	d
Z3D_V1_U0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_U0 /;"	d
Z3D_V1_U1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_U1 /;"	d
Z3D_V1_V0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_V0 /;"	d
Z3D_V1_V1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_V1 /;"	d
Z3D_V1_W	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_W /;"	d
Z3D_V1_X	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_X /;"	d
Z3D_V1_Y	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_Y /;"	d
Z3D_V1_Z	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V1_Z /;"	d
Z3D_V2_A	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_A /;"	d
Z3D_V2_B	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_B /;"	d
Z3D_V2_F	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_F /;"	d
Z3D_V2_G	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_G /;"	d
Z3D_V2_R	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_R /;"	d
Z3D_V2_SB	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_SB /;"	d
Z3D_V2_SG	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_SG /;"	d
Z3D_V2_SR	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_SR /;"	d
Z3D_V2_U0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_U0 /;"	d
Z3D_V2_U1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_U1 /;"	d
Z3D_V2_V0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_V0 /;"	d
Z3D_V2_V1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_V1 /;"	d
Z3D_V2_W	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_W /;"	d
Z3D_V2_X	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_X /;"	d
Z3D_V2_Y	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_Y /;"	d
Z3D_V2_Z	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_V2_Z /;"	d
Z3D_VERTEX_CONTROL	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_VERTEX_CONTROL /;"	d
Z3D_WORKRST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WORKRST /;"	d
Z3D_WORKWST	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WORKWST /;"	d
Z3D_WR_BGC	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_BGC /;"	d
Z3D_WR_CTRL	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_CTRL /;"	d
Z3D_WR_FGC	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_FGC /;"	d
Z3D_WR_P0	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_P0 /;"	d
Z3D_WR_P1	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_P1 /;"	d
Z3D_WR_P2	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_P2 /;"	d
Z3D_WR_PAT	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_PAT /;"	d
Z3D_WR_PATPARAM	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_PATPARAM /;"	d
Z3D_WR_SZ	arch/sh/include/asm/cpu_sh7722.h	/^#define Z3D_WR_SZ /;"	d
ZALLOC	lib/zlib/zutil.h	/^#define ZALLOC(/;"	d
ZALLOC_ALIGNMENT	lib/gunzip.c	/^#define	ZALLOC_ALIGNMENT	/;"	d	file:
ZALLOC_ALIGNMENT	lib/gzip.c	/^#define ZALLOC_ALIGNMENT	/;"	d	file:
ZAP_CHUNK_ARRAY	include/zfs/zap_leaf.h	/^	ZAP_CHUNK_ARRAY = 251,$/;"	e	enum:zap_chunk_type
ZAP_CHUNK_ENTRY	include/zfs/zap_leaf.h	/^	ZAP_CHUNK_ENTRY = 252,$/;"	e	enum:zap_chunk_type
ZAP_CHUNK_FREE	include/zfs/zap_leaf.h	/^	ZAP_CHUNK_FREE = 253,$/;"	e	enum:zap_chunk_type
ZAP_CHUNK_TYPE_MAX	include/zfs/zap_leaf.h	/^	ZAP_CHUNK_TYPE_MAX = 250$/;"	e	enum:zap_chunk_type
ZAP_EMBEDDED_PTRTBL_ENT	include/zfs/zap_impl.h	/^#define	ZAP_EMBEDDED_PTRTBL_ENT(/;"	d
ZAP_EMBEDDED_PTRTBL_SHIFT	include/zfs/zap_impl.h	/^#define	ZAP_EMBEDDED_PTRTBL_SHIFT(/;"	d
ZAP_HASHBITS	include/zfs/zap_impl.h	/^#define	ZAP_HASHBITS	/;"	d
ZAP_HASH_IDX	fs/zfs/zfs.c	/^#define	ZAP_HASH_IDX(/;"	d	file:
ZAP_LEAF_ARRAY_BYTES	fs/zfs/zfs.c	/^#define	ZAP_LEAF_ARRAY_BYTES /;"	d	file:
ZAP_LEAF_ARRAY_BYTES	include/zfs/zap_leaf.h	/^#define	ZAP_LEAF_ARRAY_BYTES /;"	d
ZAP_LEAF_CHUNK	fs/zfs/zfs.c	/^#define	ZAP_LEAF_CHUNK(/;"	d	file:
ZAP_LEAF_CHUNKSIZE	include/zfs/zap_leaf.h	/^#define	ZAP_LEAF_CHUNKSIZE /;"	d
ZAP_LEAF_ENTRY	fs/zfs/zfs.c	/^#define	ZAP_LEAF_ENTRY(/;"	d	file:
ZAP_LEAF_HASH_NUMENTRIES	fs/zfs/zfs.c	/^#define	ZAP_LEAF_HASH_NUMENTRIES(/;"	d	file:
ZAP_LEAF_HASH_SHIFT	fs/zfs/zfs.c	/^#define	ZAP_LEAF_HASH_SHIFT(/;"	d	file:
ZAP_LEAF_MAGIC	include/zfs/zap_leaf.h	/^#define	ZAP_LEAF_MAGIC /;"	d
ZAP_LEAF_NUMCHUNKS	fs/zfs/zfs.c	/^#define	ZAP_LEAF_NUMCHUNKS(/;"	d	file:
ZAP_MAGIC	include/zfs/zap_impl.h	/^#define	ZAP_MAGIC /;"	d
ZBT_HEADER	include/zfs/zap_impl.h	/^#define	ZBT_HEADER	/;"	d
ZBT_LEAF	include/zfs/zap_impl.h	/^#define	ZBT_LEAF	/;"	d
ZBT_MICRO	include/zfs/zap_impl.h	/^#define	ZBT_MICRO	/;"	d
ZCKSEL_MASK	arch/arm/mach-keystone/include/mach/hardware.h	/^#define ZCKSEL_MASK /;"	d
ZDEN_SHIFT	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define ZDEN_SHIFT	/;"	d
ZEC_MAGIC	include/zfs/zio.h	/^#define	ZEC_MAGIC	/;"	d
ZERO	include/MCD_dma.h	/^#define ZERO	/;"	d
ZEROPAD	lib/vsprintf.c	/^#define ZEROPAD	/;"	d	file:
ZERO_OFFSET_VALID	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define ZERO_OFFSET_VALID	/;"	d
ZEXPORT	include/u-boot/zlib.h	/^#      define ZEXPORT /;"	d
ZEXPORT	include/u-boot/zlib.h	/^#    define ZEXPORT /;"	d
ZEXPORT	include/u-boot/zlib.h	/^#  define ZEXPORT$/;"	d
ZEXPORT	lib/crc32.c	/^#define ZEXPORT	/;"	d	file:
ZEXPORTVA	include/u-boot/zlib.h	/^#      define ZEXPORTVA /;"	d
ZEXPORTVA	include/u-boot/zlib.h	/^#  define ZEXPORTVA$/;"	d
ZEXTERN	include/u-boot/zlib.h	/^#        define ZEXTERN /;"	d
ZEXTERN	include/u-boot/zlib.h	/^#  define ZEXTERN /;"	d
ZFREE	lib/zlib/zutil.h	/^#define ZFREE(/;"	d
ZFS_ACE_SPACE	include/zfs/zfs_acl.h	/^#define	ZFS_ACE_SPACE	/;"	d
ZFS_CRC64_POLY	fs/zfs/zfs.c	/^#define	ZFS_CRC64_POLY /;"	d	file:
ZFS_DIRENT_OBJ	include/zfs/zfs_znode.h	/^#define	ZFS_DIRENT_OBJ(/;"	d
ZFS_ERR_BAD_FILE_TYPE	include/zfs_common.h	/^	ZFS_ERR_BAD_FILE_TYPE = -5,$/;"	e	enum:zfs_errors
ZFS_ERR_BAD_FS	include/zfs_common.h	/^	ZFS_ERR_BAD_FS = -2,$/;"	e	enum:zfs_errors
ZFS_ERR_FILE_NOT_FOUND	include/zfs_common.h	/^	ZFS_ERR_FILE_NOT_FOUND = -4,$/;"	e	enum:zfs_errors
ZFS_ERR_NONE	include/zfs_common.h	/^	ZFS_ERR_NONE = 0,$/;"	e	enum:zfs_errors
ZFS_ERR_NOT_IMPLEMENTED_YET	include/zfs_common.h	/^	ZFS_ERR_NOT_IMPLEMENTED_YET = -1,$/;"	e	enum:zfs_errors
ZFS_ERR_OUT_OF_MEMORY	include/zfs_common.h	/^	ZFS_ERR_OUT_OF_MEMORY = -3,$/;"	e	enum:zfs_errors
ZFS_ERR_OUT_OF_RANGE	include/zfs_common.h	/^	ZFS_ERR_OUT_OF_RANGE = -6,$/;"	e	enum:zfs_errors
ZFS_ROOT_OBJ	include/zfs/zfs_znode.h	/^#define	ZFS_ROOT_OBJ	/;"	d
ZFS_SA_ATTRS	include/zfs/zfs_znode.h	/^#define	ZFS_SA_ATTRS	/;"	d
ZFS_SPA_HEADER	include/zfs/spa.h	/^#define	ZFS_SPA_HEADER /;"	d
ZIGBEE_RST_GPIO	board/bosch/shc/board.h	/^# define ZIGBEE_RST_GPIO /;"	d
ZIL_REPLAY_NEEDED	include/zfs/zil.h	/^#define	ZIL_REPLAY_NEEDED /;"	d
ZIMAGE_LOAD_ADDR	arch/x86/include/asm/zimage.h	/^#define ZIMAGE_LOAD_ADDR /;"	d
ZIMAGE_MAX_SIZE	arch/x86/include/asm/zimage.h	/^#define ZIMAGE_MAX_SIZE /;"	d
ZIO_CHECKSUM_DEFAULT	include/zfs/zio.h	/^#define	ZIO_CHECKSUM_DEFAULT	/;"	d
ZIO_CHECKSUM_EQUAL	include/zfs/spa.h	/^#define	ZIO_CHECKSUM_EQUAL(/;"	d
ZIO_CHECKSUM_FLETCHER_2	include/zfs/zio.h	/^	ZIO_CHECKSUM_FLETCHER_2,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_FLETCHER_4	include/zfs/zio.h	/^	ZIO_CHECKSUM_FLETCHER_4,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_FUNCTIONS	include/zfs/zio.h	/^	ZIO_CHECKSUM_FUNCTIONS$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_GANG_HEADER	include/zfs/zio.h	/^	ZIO_CHECKSUM_GANG_HEADER,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_INHERIT	include/zfs/zio.h	/^	ZIO_CHECKSUM_INHERIT = 0,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_LABEL	include/zfs/zio.h	/^	ZIO_CHECKSUM_LABEL,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_OFF	include/zfs/zio.h	/^	ZIO_CHECKSUM_OFF,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_ON	include/zfs/zio.h	/^	ZIO_CHECKSUM_ON,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_ON_VALUE	include/zfs/zio.h	/^#define	ZIO_CHECKSUM_ON_VALUE	/;"	d
ZIO_CHECKSUM_SHA256	include/zfs/zio.h	/^	ZIO_CHECKSUM_SHA256,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_ZILOG	include/zfs/zio.h	/^	ZIO_CHECKSUM_ZILOG,$/;"	e	enum:zio_checksum
ZIO_CHECKSUM_ZILOG2	include/zfs/zio.h	/^	ZIO_CHECKSUM_ZILOG2,$/;"	e	enum:zio_checksum
ZIO_COMPRESS_EMPTY	include/zfs/zio.h	/^	ZIO_COMPRESS_EMPTY,$/;"	e	enum:zio_compress
ZIO_COMPRESS_FUNCTIONS	include/zfs/zio.h	/^	ZIO_COMPRESS_FUNCTIONS$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP1	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP1,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP2	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP2,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP3	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP3,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP4	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP4,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP5	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP5,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP6	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP6,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP7	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP7,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP8	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP8,$/;"	e	enum:zio_compress
ZIO_COMPRESS_GZIP9	include/zfs/zio.h	/^	ZIO_COMPRESS_GZIP9,$/;"	e	enum:zio_compress
ZIO_COMPRESS_INHERIT	include/zfs/zio.h	/^	ZIO_COMPRESS_INHERIT = 0,$/;"	e	enum:zio_compress
ZIO_COMPRESS_LZJB	include/zfs/zio.h	/^	ZIO_COMPRESS_LZJB,$/;"	e	enum:zio_compress
ZIO_COMPRESS_OFF	include/zfs/zio.h	/^	ZIO_COMPRESS_OFF,$/;"	e	enum:zio_compress
ZIO_COMPRESS_ON	include/zfs/zio.h	/^	ZIO_COMPRESS_ON,$/;"	e	enum:zio_compress
ZIO_GET_IOSIZE	include/zfs/zio.h	/^#define	ZIO_GET_IOSIZE(/;"	d
ZIO_SET_CHECKSUM	include/zfs/spa.h	/^#define	ZIO_SET_CHECKSUM(/;"	d
ZL30158_RST	board/keymile/kmp204x/kmp204x.c	/^#define ZL30158_RST	/;"	d	file:
ZL30343_RST	board/keymile/kmp204x/kmp204x.c	/^#define ZL30343_RST	/;"	d	file:
ZLIB_H	include/u-boot/zlib.h	/^#define ZLIB_H$/;"	d
ZLIB_INTERNAL	lib/zlib/adler32.c	/^#define ZLIB_INTERNAL$/;"	d	file:
ZLIB_INTERNAL	lib/zlib/zutil.h	/^#define ZLIB_INTERNAL$/;"	d
ZLIB_VERNUM	include/u-boot/zlib.h	/^#define ZLIB_VERNUM /;"	d
ZLIB_VERSION	include/u-boot/zlib.h	/^#define ZLIB_VERSION /;"	d
ZMII0	arch/powerpc/dts/canyonlands.dts	/^			ZMII0: emac-zmii@ef600d00 {$/;"	l
ZMII0	arch/powerpc/dts/glacier.dts	/^			ZMII0: emac-zmii@ef600d00 {$/;"	l
ZMII0_BASE	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_BASE	/;"	d
ZMII0_FER	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_FER	/;"	d
ZMII0_SMIISR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR	/;"	d
ZMII0_SMIISR_E1	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_E1	/;"	d
ZMII0_SMIISR_EC	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_EC	/;"	d
ZMII0_SMIISR_ED	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_ED	/;"	d
ZMII0_SMIISR_EF	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_EF	/;"	d
ZMII0_SMIISR_EJ	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_EJ	/;"	d
ZMII0_SMIISR_EL	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_EL	/;"	d
ZMII0_SMIISR_EN	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_EN	/;"	d
ZMII0_SMIISR_ES	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_ES	/;"	d
ZMII0_SMIISR_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SMIISR_V(/;"	d
ZMII0_SSR	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SSR	/;"	d
ZMII0_SSR_FSS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SSR_FSS	/;"	d
ZMII0_SSR_RSVD16_31	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SSR_RSVD16_31	/;"	d
ZMII0_SSR_SCI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SSR_SCI	/;"	d
ZMII0_SSR_SP	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SSR_SP	/;"	d
ZMII0_SSR_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII0_SSR_V(/;"	d
ZMII_CONFIGURATION_IS_MII	board/amcc/bamboo/bamboo.h	/^			   ZMII_CONFIGURATION_IS_MII,$/;"	e	enum:zmii_config
ZMII_CONFIGURATION_IS_RMII	board/amcc/bamboo/bamboo.h	/^			   ZMII_CONFIGURATION_IS_RMII,$/;"	e	enum:zmii_config
ZMII_CONFIGURATION_IS_SMII	board/amcc/bamboo/bamboo.h	/^			   ZMII_CONFIGURATION_IS_SMII$/;"	e	enum:zmii_config
ZMII_CONFIGURATION_UNKNOWN	board/amcc/bamboo/bamboo.h	/^typedef enum zmii_config { ZMII_CONFIGURATION_UNKNOWN,$/;"	e	enum:zmii_config
ZMII_FER_DIS	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_DIS	/;"	d
ZMII_FER_MDI	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_MDI	/;"	d
ZMII_FER_MII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_MII	/;"	d
ZMII_FER_RMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_RMII	/;"	d
ZMII_FER_RSVD10	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_RSVD10	/;"	d
ZMII_FER_RSVD11	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_RSVD11	/;"	d
ZMII_FER_RSVD14_31	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_RSVD14_31	/;"	d
ZMII_FER_SMII	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_SMII	/;"	d
ZMII_FER_V	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define ZMII_FER_V(/;"	d
ZM_DEBUG	common/xyzModem.c	/^#define ZM_DEBUG(/;"	d	file:
ZM_STEP	board/freescale/common/zm7300.h	/^#define ZM_STEP /;"	d
ZOOM1_ENET_GPMC_CONF1	board/logicpd/zoom1/zoom1.h	/^#define ZOOM1_ENET_GPMC_CONF1 /;"	d
ZOOM1_ENET_GPMC_CONF2	board/logicpd/zoom1/zoom1.h	/^#define ZOOM1_ENET_GPMC_CONF2 /;"	d
ZOOM1_ENET_GPMC_CONF3	board/logicpd/zoom1/zoom1.h	/^#define ZOOM1_ENET_GPMC_CONF3 /;"	d
ZOOM1_ENET_GPMC_CONF4	board/logicpd/zoom1/zoom1.h	/^#define ZOOM1_ENET_GPMC_CONF4 /;"	d
ZOOM1_ENET_GPMC_CONF5	board/logicpd/zoom1/zoom1.h	/^#define ZOOM1_ENET_GPMC_CONF5 /;"	d
ZOOM1_ENET_GPMC_CONF6	board/logicpd/zoom1/zoom1.h	/^#define ZOOM1_ENET_GPMC_CONF6 /;"	d
ZPL_VERSION	include/zfs/zfs_znode.h	/^#define	ZPL_VERSION	/;"	d
ZPL_VERSION_STR	include/zfs/zfs_znode.h	/^#define	ZPL_VERSION_STR	/;"	d
ZPOOL_CONFIG_ASHIFT	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_ASHIFT	/;"	d
ZPOOL_CONFIG_ASIZE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_ASIZE	/;"	d
ZPOOL_CONFIG_CHILDREN	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_CHILDREN	/;"	d
ZPOOL_CONFIG_CREATE_TXG	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_CREATE_TXG	/;"	d
ZPOOL_CONFIG_DDT_HISTOGRAM	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_DDT_HISTOGRAM	/;"	d
ZPOOL_CONFIG_DDT_OBJ_STATS	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_DDT_OBJ_STATS	/;"	d
ZPOOL_CONFIG_DDT_STATS	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_DDT_STATS	/;"	d
ZPOOL_CONFIG_DEGRADED	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_DEGRADED	/;"	d
ZPOOL_CONFIG_DEVID	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_DEVID	/;"	d
ZPOOL_CONFIG_DTL	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_DTL	/;"	d
ZPOOL_CONFIG_ERRCOUNT	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_ERRCOUNT	/;"	d
ZPOOL_CONFIG_FAULTED	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_FAULTED	/;"	d
ZPOOL_CONFIG_GUID	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_GUID	/;"	d
ZPOOL_CONFIG_HOLE_ARRAY	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_HOLE_ARRAY	/;"	d
ZPOOL_CONFIG_ID	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_ID	/;"	d
ZPOOL_CONFIG_IS_HOLE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_IS_HOLE	/;"	d
ZPOOL_CONFIG_IS_SPARE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_IS_SPARE	/;"	d
ZPOOL_CONFIG_L2CACHE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_L2CACHE	/;"	d
ZPOOL_CONFIG_METASLAB_ARRAY	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_METASLAB_ARRAY	/;"	d
ZPOOL_CONFIG_METASLAB_SHIFT	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_METASLAB_SHIFT	/;"	d
ZPOOL_CONFIG_NOT_PRESENT	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_NOT_PRESENT	/;"	d
ZPOOL_CONFIG_NPARITY	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_NPARITY	/;"	d
ZPOOL_CONFIG_OFFLINE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_OFFLINE	/;"	d
ZPOOL_CONFIG_PATH	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_PATH	/;"	d
ZPOOL_CONFIG_PHYS_PATH	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_PHYS_PATH	/;"	d
ZPOOL_CONFIG_POOL_GUID	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_POOL_GUID	/;"	d
ZPOOL_CONFIG_POOL_NAME	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_POOL_NAME	/;"	d
ZPOOL_CONFIG_POOL_STATE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_POOL_STATE	/;"	d
ZPOOL_CONFIG_POOL_TXG	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_POOL_TXG	/;"	d
ZPOOL_CONFIG_REMOVED	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_REMOVED	/;"	d
ZPOOL_CONFIG_SPARES	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_SPARES	/;"	d
ZPOOL_CONFIG_STATS	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_STATS	/;"	d
ZPOOL_CONFIG_TOP_GUID	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_TOP_GUID	/;"	d
ZPOOL_CONFIG_TYPE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_TYPE	/;"	d
ZPOOL_CONFIG_VDEV_CHILDREN	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_VDEV_CHILDREN	/;"	d
ZPOOL_CONFIG_VDEV_TREE	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_VDEV_TREE	/;"	d
ZPOOL_CONFIG_VERSION	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_VERSION	/;"	d
ZPOOL_CONFIG_WHOLE_DISK	include/zfs/zfs.h	/^#define	ZPOOL_CONFIG_WHOLE_DISK	/;"	d
ZPOOL_PROP_BOOTFS	fs/zfs/zfs.c	/^#define	ZPOOL_PROP_BOOTFS	/;"	d	file:
ZQCL_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	ZQCL_CMD,$/;"	e	enum:__anon114585520103
ZQCL_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	ZQCL_CMD,$/;"	e	enum:__anon957231910203	file:
ZQCR_PWRDOWN	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define ZQCR_PWRDOWN	/;"	d
ZQCR_PWRDOWN	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define ZQCR_PWRDOWN	/;"	d
ZQCS_CMD	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	ZQCS_CMD,$/;"	e	enum:__anon114585520103
ZQCS_CMD	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	ZQCS_CMD,$/;"	e	enum:__anon957231910203	file:
ZQ_CLK_DIV_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define ZQ_CLK_DIV_EN	/;"	d
ZQ_CLK_EN	arch/arm/mach-exynos/exynos5_setup.h	/^#define ZQ_CLK_EN	/;"	d
ZQ_CONTROL_VAL	arch/arm/mach-exynos/exynos4_setup.h	/^#define ZQ_CONTROL_VAL	/;"	d
ZQ_DONE	arch/arm/mach-exynos/exynos5_setup.h	/^#define ZQ_DONE	/;"	d
ZQ_INIT_TIMEOUT	arch/arm/mach-exynos/dmc_common.c	/^#define ZQ_INIT_TIMEOUT	/;"	d	file:
ZQ_MANUAL_STR	arch/arm/mach-exynos/exynos5_setup.h	/^#define ZQ_MANUAL_STR	/;"	d
ZQ_MODE_DDS_OFFSET	arch/arm/mach-exynos/exynos5_setup.h	/^#define ZQ_MODE_DDS_OFFSET	/;"	d
ZQnDR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define ZQnDR(/;"	d
ZQnDR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define ZQnDR(/;"	d
ZQnPR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define ZQnPR(/;"	d
ZQnPR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define ZQnPR(/;"	d
ZQnSR	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define ZQnSR(/;"	d
ZQnSR	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define ZQnSR(/;"	d
ZUTIL_H	lib/zlib/zutil.h	/^#define ZUTIL_H$/;"	d
ZV_LCDPAD_A	include/radeon.h	/^#define ZV_LCDPAD_A	/;"	d
ZV_LCDPAD_EN	include/radeon.h	/^#define ZV_LCDPAD_EN	/;"	d
ZV_LCDPAD_MASK	include/radeon.h	/^#define ZV_LCDPAD_MASK	/;"	d
ZV_LCDPAD_Y	include/radeon.h	/^#define ZV_LCDPAD_Y	/;"	d
ZYNQMP_APU_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_APU_BASEADDR	/;"	d
ZYNQMP_BOOTADDR_HIGH_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_BOOTADDR_HIGH_MASK	/;"	d	file:
ZYNQMP_CORE_APU0	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_CORE_APU0	/;"	d	file:
ZYNQMP_CORE_APU3	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_CORE_APU3	/;"	d	file:
ZYNQMP_CRF_APB_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CRF_APB_BASEADDR	/;"	d
ZYNQMP_CRLAPB_CPU_R5_CTRL_CLKACT_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_CRLAPB_CPU_R5_CTRL_CLKACT_MASK	/;"	d	file:
ZYNQMP_CRLAPB_RST_LPD_AMBA_RST_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_CRLAPB_RST_LPD_AMBA_RST_MASK	/;"	d	file:
ZYNQMP_CRLAPB_RST_LPD_R50_RST_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_CRLAPB_RST_LPD_R50_RST_MASK	/;"	d	file:
ZYNQMP_CRLAPB_RST_LPD_R51_RST_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_CRLAPB_RST_LPD_R51_RST_MASK	/;"	d	file:
ZYNQMP_CRL_APB_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CRL_APB_BASEADDR	/;"	d
ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT	/;"	d
ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT	/;"	d
ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT	/;"	d
ZYNQMP_CSU_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CSU_BASEADDR	/;"	d
ZYNQMP_CSU_VERSION_EP108	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CSU_VERSION_EP108	/;"	d
ZYNQMP_CSU_VERSION_QEMU	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CSU_VERSION_QEMU	/;"	d
ZYNQMP_CSU_VERSION_SILICON	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CSU_VERSION_SILICON	/;"	d
ZYNQMP_CSU_VERSION_VELOCE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_CSU_VERSION_VELOCE	/;"	d
ZYNQMP_FPGA_OP_DONE	include/zynqmppl.h	/^#define ZYNQMP_FPGA_OP_DONE	/;"	d
ZYNQMP_FPGA_OP_INIT	include/zynqmppl.h	/^#define ZYNQMP_FPGA_OP_INIT	/;"	d
ZYNQMP_FPGA_OP_LOAD	include/zynqmppl.h	/^#define ZYNQMP_FPGA_OP_LOAD	/;"	d
ZYNQMP_GPIO_BANK0_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_BANK0_NGPIO	/;"	d	file:
ZYNQMP_GPIO_BANK1_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_BANK1_NGPIO	/;"	d	file:
ZYNQMP_GPIO_BANK2_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_BANK2_NGPIO	/;"	d	file:
ZYNQMP_GPIO_BANK3_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_BANK3_NGPIO	/;"	d	file:
ZYNQMP_GPIO_BANK4_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_BANK4_NGPIO	/;"	d	file:
ZYNQMP_GPIO_BANK5_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_BANK5_NGPIO	/;"	d	file:
ZYNQMP_GPIO_MAX_BANK	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_MAX_BANK	/;"	d	file:
ZYNQMP_GPIO_NR_GPIOS	drivers/gpio/zynq_gpio.c	/^#define ZYNQMP_GPIO_NR_GPIOS	/;"	d	file:
ZYNQMP_IOU_SCNTR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_IOU_SCNTR	/;"	d
ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN	/;"	d
ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG	/;"	d
ZYNQMP_IOU_SCNTR_SECURE	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_IOU_SCNTR_SECURE	/;"	d
ZYNQMP_IOU_SLCR_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_IOU_SLCR_BASEADDR	/;"	d
ZYNQMP_MAX_CORES	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_MAX_CORES	/;"	d	file:
ZYNQMP_R5_HIVEC_ADDR	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_R5_HIVEC_ADDR	/;"	d	file:
ZYNQMP_R5_LOVEC_ADDR	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_R5_LOVEC_ADDR	/;"	d	file:
ZYNQMP_RPU_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_RPU_BASEADDR	/;"	d
ZYNQMP_RPU_CFG_CPU_HALT_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_RPU_CFG_CPU_HALT_MASK	/;"	d	file:
ZYNQMP_RPU_CFG_HIVEC_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_RPU_CFG_HIVEC_MASK	/;"	d	file:
ZYNQMP_RPU_GLBL_CTRL_SLCLAMP_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_RPU_GLBL_CTRL_SLCLAMP_MASK	/;"	d	file:
ZYNQMP_RPU_GLBL_CTRL_SPLIT_LOCK_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_RPU_GLBL_CTRL_SPLIT_LOCK_MASK	/;"	d	file:
ZYNQMP_RPU_GLBL_CTRL_TCM_COMB_MASK	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_RPU_GLBL_CTRL_TCM_COMB_MASK	/;"	d	file:
ZYNQMP_SATA_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_SATA_BASEADDR	/;"	d
ZYNQMP_SILICON_VER_MASK	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_SILICON_VER_MASK	/;"	d
ZYNQMP_SILICON_VER_SHIFT	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_SILICON_VER_SHIFT	/;"	d
ZYNQMP_SIP_SVC_CSU_DMA_CHIPID	include/zynqmppl.h	/^#define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID	/;"	d
ZYNQMP_SIP_SVC_PM_FPGA_LOAD	include/zynqmppl.h	/^#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD	/;"	d
ZYNQMP_TCM_BOTH_SIZE	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_TCM_BOTH_SIZE	/;"	d	file:
ZYNQMP_TCM_START_ADDRESS	arch/arm/cpu/armv8/zynqmp/mp.c	/^#define ZYNQMP_TCM_START_ADDRESS	/;"	d	file:
ZYNQMP_USB	arch/arm/cpu/armv8/zynqmp/Kconfig	/^config ZYNQMP_USB$/;"	c
ZYNQMP_USB0_XHCI_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_USB0_XHCI_BASEADDR	/;"	d
ZYNQMP_USB1_XHCI_BASEADDR	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQMP_USB1_XHCI_BASEADDR	/;"	d
ZYNQMP_VERSION_SIZE	board/xilinx/zynqmp/zynqmp.c	/^#define ZYNQMP_VERSION_SIZE	/;"	d	file:
ZYNQ_BM_JTAG	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_BM_JTAG	/;"	d
ZYNQ_BM_MASK	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_BM_MASK	/;"	d
ZYNQ_BM_NAND	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_BM_NAND	/;"	d
ZYNQ_BM_NOR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_BM_NOR	/;"	d
ZYNQ_BM_QSPI	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_BM_QSPI	/;"	d
ZYNQ_BM_SD	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_BM_SD	/;"	d
ZYNQ_CLKMUX_SEL_0	arch/arm/mach-zynq/clk.c	/^#define ZYNQ_CLKMUX_SEL_0	/;"	d	file:
ZYNQ_CLKMUX_SEL_1	arch/arm/mach-zynq/clk.c	/^#define ZYNQ_CLKMUX_SEL_1	/;"	d	file:
ZYNQ_CLKMUX_SEL_2	arch/arm/mach-zynq/clk.c	/^#define ZYNQ_CLKMUX_SEL_2	/;"	d	file:
ZYNQ_CLKMUX_SEL_3	arch/arm/mach-zynq/clk.c	/^#define ZYNQ_CLKMUX_SEL_3	/;"	d	file:
ZYNQ_CLK_FLAGS_HAS_2_DIVS	arch/arm/mach-zynq/clk.c	/^#define ZYNQ_CLK_FLAGS_HAS_2_DIVS	/;"	d	file:
ZYNQ_CLK_MAXDIV	arch/arm/mach-zynq/clk.c	/^#define ZYNQ_CLK_MAXDIV	/;"	d	file:
ZYNQ_DDRC_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_DDRC_BASEADDR	/;"	d
ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT	arch/arm/mach-zynq/ddrc.c	/^#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT	/;"	d	file:
ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK	arch/arm/mach-zynq/ddrc.c	/^#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK	/;"	d	file:
ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT	arch/arm/mach-zynq/ddrc.c	/^#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT	/;"	d	file:
ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED	arch/arm/mach-zynq/ddrc.c	/^#define ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED	/;"	d	file:
ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK	arch/arm/mach-zynq/ddrc.c	/^#define ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK	/;"	d	file:
ZYNQ_DEV_CFG_APB_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_DEV_CFG_APB_BASEADDR	/;"	d
ZYNQ_EFUSE_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_EFUSE_BASEADDR	/;"	d
ZYNQ_GEM	drivers/net/Kconfig	/^config ZYNQ_GEM$/;"	c
ZYNQ_GEM_BASEADDR0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQ_GEM_BASEADDR0	/;"	d
ZYNQ_GEM_BASEADDR0	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_GEM_BASEADDR0	/;"	d
ZYNQ_GEM_BASEADDR1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQ_GEM_BASEADDR1	/;"	d
ZYNQ_GEM_BASEADDR1	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_GEM_BASEADDR1	/;"	d
ZYNQ_GEM_BASEADDR2	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQ_GEM_BASEADDR2	/;"	d
ZYNQ_GEM_BASEADDR3	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQ_GEM_BASEADDR3	/;"	d
ZYNQ_GEM_DBUS_WIDTH	drivers/net/zynq_gem.c	/^# define ZYNQ_GEM_DBUS_WIDTH	/;"	d	file:
ZYNQ_GEM_DMACR_BLENGTH	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_DMACR_BLENGTH	/;"	d	file:
ZYNQ_GEM_DMACR_INIT	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_DMACR_INIT	/;"	d	file:
ZYNQ_GEM_DMACR_RXBUF	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_DMACR_RXBUF	/;"	d	file:
ZYNQ_GEM_DMACR_RXSIZE	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_DMACR_RXSIZE	/;"	d	file:
ZYNQ_GEM_DMACR_TXSIZE	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_DMACR_TXSIZE	/;"	d	file:
ZYNQ_GEM_FREQUENCY_10	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_FREQUENCY_10	/;"	d	file:
ZYNQ_GEM_FREQUENCY_100	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_FREQUENCY_100	/;"	d	file:
ZYNQ_GEM_FREQUENCY_1000	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_FREQUENCY_1000	/;"	d	file:
ZYNQ_GEM_NWCFG_FDEN	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_FDEN	/;"	d	file:
ZYNQ_GEM_NWCFG_FSREM	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_FSREM	/;"	d	file:
ZYNQ_GEM_NWCFG_INIT	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_INIT	/;"	d	file:
ZYNQ_GEM_NWCFG_MDCCLKDIV	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_MDCCLKDIV	/;"	d	file:
ZYNQ_GEM_NWCFG_PCS_SEL	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_PCS_SEL	/;"	d	file:
ZYNQ_GEM_NWCFG_SGMII_ENBL	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_SGMII_ENBL	/;"	d	file:
ZYNQ_GEM_NWCFG_SPEED100	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_SPEED100	/;"	d	file:
ZYNQ_GEM_NWCFG_SPEED1000	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCFG_SPEED1000	/;"	d	file:
ZYNQ_GEM_NWCTRL_MDEN_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCTRL_MDEN_MASK	/;"	d	file:
ZYNQ_GEM_NWCTRL_RXEN_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCTRL_RXEN_MASK	/;"	d	file:
ZYNQ_GEM_NWCTRL_STARTTX_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCTRL_STARTTX_MASK	/;"	d	file:
ZYNQ_GEM_NWCTRL_TXEN_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWCTRL_TXEN_MASK	/;"	d	file:
ZYNQ_GEM_NWSR_MDIOIDLE_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_NWSR_MDIOIDLE_MASK	/;"	d	file:
ZYNQ_GEM_PCS_CTL_ANEG_ENBL	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_PCS_CTL_ANEG_ENBL	/;"	d	file:
ZYNQ_GEM_PHYMNTNC_OP_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_PHYMNTNC_OP_MASK	/;"	d	file:
ZYNQ_GEM_PHYMNTNC_OP_R_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_PHYMNTNC_OP_R_MASK	/;"	d	file:
ZYNQ_GEM_PHYMNTNC_OP_W_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_PHYMNTNC_OP_W_MASK	/;"	d	file:
ZYNQ_GEM_PHYMNTNC_PHREG_SHIFT_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_PHYMNTNC_PHREG_SHIFT_MASK	/;"	d	file:
ZYNQ_GEM_PHYMNTNC_PHYAD_SHIFT_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_PHYMNTNC_PHYAD_SHIFT_MASK	/;"	d	file:
ZYNQ_GEM_RXBUF_ADD_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_RXBUF_ADD_MASK	/;"	d	file:
ZYNQ_GEM_RXBUF_EOF_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_RXBUF_EOF_MASK	/;"	d	file:
ZYNQ_GEM_RXBUF_LEN_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_RXBUF_LEN_MASK	/;"	d	file:
ZYNQ_GEM_RXBUF_NEW_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_RXBUF_NEW_MASK	/;"	d	file:
ZYNQ_GEM_RXBUF_SOF_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_RXBUF_SOF_MASK	/;"	d	file:
ZYNQ_GEM_RXBUF_WRAP_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_RXBUF_WRAP_MASK	/;"	d	file:
ZYNQ_GEM_TSR_DONE	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TSR_DONE	/;"	d	file:
ZYNQ_GEM_TXBUF_EXHAUSTED	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TXBUF_EXHAUSTED	/;"	d	file:
ZYNQ_GEM_TXBUF_FRMLEN_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TXBUF_FRMLEN_MASK	/;"	d	file:
ZYNQ_GEM_TXBUF_LAST_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TXBUF_LAST_MASK	/;"	d	file:
ZYNQ_GEM_TXBUF_UNDERRUN	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TXBUF_UNDERRUN	/;"	d	file:
ZYNQ_GEM_TXBUF_USED_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TXBUF_USED_MASK	/;"	d	file:
ZYNQ_GEM_TXBUF_WRAP_MASK	drivers/net/zynq_gem.c	/^#define ZYNQ_GEM_TXBUF_WRAP_MASK	/;"	d	file:
ZYNQ_GPIO	drivers/gpio/Kconfig	/^config ZYNQ_GPIO$/;"	c	menu:GPIO Support
ZYNQ_GPIO_BANK0_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK0_NGPIO	/;"	d	file:
ZYNQ_GPIO_BANK0_PIN_MAX	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK0_PIN_MAX(/;"	d	file:
ZYNQ_GPIO_BANK0_PIN_MIN	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK0_PIN_MIN(/;"	d	file:
ZYNQ_GPIO_BANK1_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK1_NGPIO	/;"	d	file:
ZYNQ_GPIO_BANK1_PIN_MAX	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK1_PIN_MAX(/;"	d	file:
ZYNQ_GPIO_BANK1_PIN_MIN	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK1_PIN_MIN(/;"	d	file:
ZYNQ_GPIO_BANK2_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK2_NGPIO	/;"	d	file:
ZYNQ_GPIO_BANK2_PIN_MAX	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK2_PIN_MAX(/;"	d	file:
ZYNQ_GPIO_BANK2_PIN_MIN	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK2_PIN_MIN(/;"	d	file:
ZYNQ_GPIO_BANK3_NGPIO	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK3_NGPIO	/;"	d	file:
ZYNQ_GPIO_BANK3_PIN_MAX	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK3_PIN_MAX(/;"	d	file:
ZYNQ_GPIO_BANK3_PIN_MIN	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK3_PIN_MIN(/;"	d	file:
ZYNQ_GPIO_BANK4_PIN_MAX	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK4_PIN_MAX(/;"	d	file:
ZYNQ_GPIO_BANK4_PIN_MIN	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK4_PIN_MIN(/;"	d	file:
ZYNQ_GPIO_BANK5_PIN_MAX	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK5_PIN_MAX(/;"	d	file:
ZYNQ_GPIO_BANK5_PIN_MIN	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_BANK5_PIN_MIN(/;"	d	file:
ZYNQ_GPIO_DATA_LSW_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_DATA_LSW_OFFSET(/;"	d	file:
ZYNQ_GPIO_DATA_MSW_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_DATA_MSW_OFFSET(/;"	d	file:
ZYNQ_GPIO_DATA_RO_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_DATA_RO_OFFSET(/;"	d	file:
ZYNQ_GPIO_DIRM_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_DIRM_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTANY_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTANY_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTDIS_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTDIS_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTEN_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTEN_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTMASK_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTMASK_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTPOL_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTPOL_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTSTS_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTSTS_OFFSET(/;"	d	file:
ZYNQ_GPIO_INTTYPE_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_INTTYPE_OFFSET(/;"	d	file:
ZYNQ_GPIO_IXR_DISABLE_ALL	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_IXR_DISABLE_ALL	/;"	d	file:
ZYNQ_GPIO_MAX_BANK	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_MAX_BANK	/;"	d	file:
ZYNQ_GPIO_MID_PIN_NUM	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_MID_PIN_NUM /;"	d	file:
ZYNQ_GPIO_NR_GPIOS	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_NR_GPIOS	/;"	d	file:
ZYNQ_GPIO_OUTEN_OFFSET	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_OUTEN_OFFSET(/;"	d	file:
ZYNQ_GPIO_UPPER_MASK	drivers/gpio/zynq_gpio.c	/^#define ZYNQ_GPIO_UPPER_MASK /;"	d	file:
ZYNQ_I2C_BASEADDR0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQ_I2C_BASEADDR0	/;"	d
ZYNQ_I2C_BASEADDR0	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_I2C_BASEADDR0	/;"	d
ZYNQ_I2C_BASEADDR1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define ZYNQ_I2C_BASEADDR1	/;"	d
ZYNQ_I2C_BASEADDR1	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_I2C_BASEADDR1	/;"	d
ZYNQ_I2C_CONTROL_ACKEN	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_ACKEN	/;"	d	file:
ZYNQ_I2C_CONTROL_CLR_FIFO	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_CLR_FIFO	/;"	d	file:
ZYNQ_I2C_CONTROL_DIV_A_MASK	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_DIV_A_MASK	/;"	d	file:
ZYNQ_I2C_CONTROL_DIV_A_SHIFT	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_DIV_A_SHIFT	/;"	d	file:
ZYNQ_I2C_CONTROL_DIV_B_MASK	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_DIV_B_MASK	/;"	d	file:
ZYNQ_I2C_CONTROL_DIV_B_SHIFT	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_DIV_B_SHIFT	/;"	d	file:
ZYNQ_I2C_CONTROL_HOLD	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_HOLD	/;"	d	file:
ZYNQ_I2C_CONTROL_MS	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_MS	/;"	d	file:
ZYNQ_I2C_CONTROL_NEA	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_NEA	/;"	d	file:
ZYNQ_I2C_CONTROL_RW	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_RW	/;"	d	file:
ZYNQ_I2C_CONTROL_SLVMON	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_CONTROL_SLVMON	/;"	d	file:
ZYNQ_I2C_FIFO_DEPTH	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_FIFO_DEPTH	/;"	d	file:
ZYNQ_I2C_INTERRUPT_ARBLOST	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_ARBLOST	/;"	d	file:
ZYNQ_I2C_INTERRUPT_COMP	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_COMP	/;"	d	file:
ZYNQ_I2C_INTERRUPT_DATA	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_DATA	/;"	d	file:
ZYNQ_I2C_INTERRUPT_NACK	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_NACK	/;"	d	file:
ZYNQ_I2C_INTERRUPT_RXOVF	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_RXOVF	/;"	d	file:
ZYNQ_I2C_INTERRUPT_RXUNF	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_RXUNF	/;"	d	file:
ZYNQ_I2C_INTERRUPT_SLVRDY	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_SLVRDY	/;"	d	file:
ZYNQ_I2C_INTERRUPT_TO	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_TO	/;"	d	file:
ZYNQ_I2C_INTERRUPT_TXOVF	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_INTERRUPT_TXOVF	/;"	d	file:
ZYNQ_I2C_STATUS_BA	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_STATUS_BA	/;"	d	file:
ZYNQ_I2C_STATUS_RXDV	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_STATUS_RXDV	/;"	d	file:
ZYNQ_I2C_STATUS_RXOVF	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_STATUS_RXOVF	/;"	d	file:
ZYNQ_I2C_STATUS_TXDV	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_STATUS_TXDV	/;"	d	file:
ZYNQ_I2C_TRANSFERT_SIZE_MAX	drivers/i2c/zynq_i2c.c	/^#define ZYNQ_I2C_TRANSFERT_SIZE_MAX	/;"	d	file:
ZYNQ_NAND_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_NAND_BASEADDR	/;"	d
ZYNQ_QSPI	drivers/spi/Kconfig	/^config ZYNQ_QSPI$/;"	c	menu:SPI Support
ZYNQ_QSPI_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_QSPI_BASEADDR	/;"	d
ZYNQ_QSPI_CR_BAUD_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_BAUD_MASK	/;"	d	file:
ZYNQ_QSPI_CR_BAUD_MAX	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_BAUD_MAX	/;"	d	file:
ZYNQ_QSPI_CR_BAUD_SHIFT	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_BAUD_SHIFT	/;"	d	file:
ZYNQ_QSPI_CR_CPHA_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_CPHA_MASK	/;"	d	file:
ZYNQ_QSPI_CR_CPOL_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_CPOL_MASK	/;"	d	file:
ZYNQ_QSPI_CR_FW_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_FW_MASK	/;"	d	file:
ZYNQ_QSPI_CR_IFMODE_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_IFMODE_MASK	/;"	d	file:
ZYNQ_QSPI_CR_MCS_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_MCS_MASK	/;"	d	file:
ZYNQ_QSPI_CR_MSA_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_MSA_MASK	/;"	d	file:
ZYNQ_QSPI_CR_MSTREN_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_MSTREN_MASK	/;"	d	file:
ZYNQ_QSPI_CR_PCS_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_PCS_MASK	/;"	d	file:
ZYNQ_QSPI_CR_SS_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_SS_MASK	/;"	d	file:
ZYNQ_QSPI_CR_SS_SHIFT	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_CR_SS_SHIFT	/;"	d	file:
ZYNQ_QSPI_ENR_SPI_EN_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_ENR_SPI_EN_MASK	/;"	d	file:
ZYNQ_QSPI_FIFO_DEPTH	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_FIFO_DEPTH	/;"	d	file:
ZYNQ_QSPI_IXR_ALL_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_IXR_ALL_MASK	/;"	d	file:
ZYNQ_QSPI_IXR_RXNEMPTY_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_IXR_RXNEMPTY_MASK	/;"	d	file:
ZYNQ_QSPI_IXR_TXOW_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_IXR_TXOW_MASK	/;"	d	file:
ZYNQ_QSPI_LQSPICFG_LQMODE_MASK	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_LQSPICFG_LQMODE_MASK	/;"	d	file:
ZYNQ_QSPI_RXFIFO_THRESHOLD	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_RXFIFO_THRESHOLD	/;"	d	file:
ZYNQ_QSPI_TXD_00_00_OFFSET	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_TXD_00_00_OFFSET	/;"	d	file:
ZYNQ_QSPI_TXD_00_01_OFFSET	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_TXD_00_01_OFFSET	/;"	d	file:
ZYNQ_QSPI_TXD_00_10_OFFSET	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_TXD_00_10_OFFSET	/;"	d	file:
ZYNQ_QSPI_TXD_00_11_OFFSET	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_TXD_00_11_OFFSET	/;"	d	file:
ZYNQ_QSPI_TXFIFO_THRESHOLD	drivers/spi/zynq_qspi.c	/^#define ZYNQ_QSPI_TXFIFO_THRESHOLD	/;"	d	file:
ZYNQ_SCUTIMER_BASEADDR	include/configs/zynq-common.h	/^#define ZYNQ_SCUTIMER_BASEADDR	/;"	d
ZYNQ_SCU_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_SCU_BASEADDR	/;"	d
ZYNQ_SDHCI	drivers/mmc/Kconfig	/^config ZYNQ_SDHCI$/;"	c	menu:MMC Host controller Support
ZYNQ_SILICON_VER_MASK	arch/arm/cpu/armv8/zynqmp/cpu.c	/^#define ZYNQ_SILICON_VER_MASK	/;"	d	file:
ZYNQ_SILICON_VER_MASK	arch/arm/mach-zynq/cpu.c	/^#define ZYNQ_SILICON_VER_MASK	/;"	d	file:
ZYNQ_SILICON_VER_SHIFT	arch/arm/cpu/armv8/zynqmp/cpu.c	/^#define ZYNQ_SILICON_VER_SHIFT	/;"	d	file:
ZYNQ_SILICON_VER_SHIFT	arch/arm/mach-zynq/cpu.c	/^#define ZYNQ_SILICON_VER_SHIFT	/;"	d	file:
ZYNQ_SMC_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_SMC_BASEADDR	/;"	d
ZYNQ_SPI	drivers/spi/Kconfig	/^config ZYNQ_SPI$/;"	c	menu:SPI Support
ZYNQ_SPI_CR_BAUD_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_BAUD_MASK	/;"	d	file:
ZYNQ_SPI_CR_BAUD_MAX	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_BAUD_MAX	/;"	d	file:
ZYNQ_SPI_CR_BAUD_SHIFT	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_BAUD_SHIFT	/;"	d	file:
ZYNQ_SPI_CR_CPHA_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_CPHA_MASK	/;"	d	file:
ZYNQ_SPI_CR_CPOL_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_CPOL_MASK	/;"	d	file:
ZYNQ_SPI_CR_CS_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_CS_MASK	/;"	d	file:
ZYNQ_SPI_CR_MCS_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_MCS_MASK	/;"	d	file:
ZYNQ_SPI_CR_MSA_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_MSA_MASK	/;"	d	file:
ZYNQ_SPI_CR_MSTREN_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_MSTREN_MASK	/;"	d	file:
ZYNQ_SPI_CR_SS_SHIFT	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_CR_SS_SHIFT	/;"	d	file:
ZYNQ_SPI_ENR_SPI_EN_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_ENR_SPI_EN_MASK	/;"	d	file:
ZYNQ_SPI_FIFO_DEPTH	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_FIFO_DEPTH	/;"	d	file:
ZYNQ_SPI_IXR_ALL_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_IXR_ALL_MASK	/;"	d	file:
ZYNQ_SPI_IXR_RXNEMPTY_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_IXR_RXNEMPTY_MASK	/;"	d	file:
ZYNQ_SPI_IXR_TXOW_MASK	drivers/spi/zynq_spi.c	/^#define ZYNQ_SPI_IXR_TXOW_MASK	/;"	d	file:
ZYNQ_SYS_CTRL_BASEADDR	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_SYS_CTRL_BASEADDR	/;"	d
ZYNQ_UART_CR_RXRST	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_CR_RXRST	/;"	d	file:
ZYNQ_UART_CR_RX_EN	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_CR_RX_EN	/;"	d	file:
ZYNQ_UART_CR_TXRST	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_CR_TXRST	/;"	d	file:
ZYNQ_UART_CR_TX_EN	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_CR_TX_EN	/;"	d	file:
ZYNQ_UART_MR_PARITY_NONE	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_MR_PARITY_NONE	/;"	d	file:
ZYNQ_UART_SR_RXEMPTY	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_SR_RXEMPTY	/;"	d	file:
ZYNQ_UART_SR_TXACTIVE	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_SR_TXACTIVE	/;"	d	file:
ZYNQ_UART_SR_TXEMPTY	drivers/serial/serial_zynq.c	/^#define ZYNQ_UART_SR_TXEMPTY	/;"	d	file:
ZYNQ_USB_BASEADDR0	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_USB_BASEADDR0	/;"	d
ZYNQ_USB_BASEADDR1	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ZYNQ_USB_BASEADDR1	/;"	d
Z_ASCII	include/u-boot/zlib.h	/^#define Z_ASCII /;"	d
Z_BEST_COMPRESSION	include/u-boot/zlib.h	/^#define Z_BEST_COMPRESSION /;"	d
Z_BEST_SPEED	include/u-boot/zlib.h	/^#define Z_BEST_SPEED /;"	d
Z_BINARY	include/u-boot/zlib.h	/^#define Z_BINARY /;"	d
Z_BLOCK	include/u-boot/zlib.h	/^#define Z_BLOCK /;"	d
Z_BUF_ERROR	include/u-boot/zlib.h	/^#define Z_BUF_ERROR /;"	d
Z_DATA_ERROR	include/u-boot/zlib.h	/^#define Z_DATA_ERROR /;"	d
Z_DEFAULT_COMPRESSION	include/u-boot/zlib.h	/^#define Z_DEFAULT_COMPRESSION /;"	d
Z_DEFAULT_STRATEGY	include/u-boot/zlib.h	/^#define Z_DEFAULT_STRATEGY /;"	d
Z_DEFLATED	include/u-boot/zlib.h	/^#define Z_DEFLATED /;"	d
Z_ERRNO	include/u-boot/zlib.h	/^#define Z_ERRNO /;"	d
Z_FILTERED	include/u-boot/zlib.h	/^#define Z_FILTERED /;"	d
Z_FINISH	include/u-boot/zlib.h	/^#define Z_FINISH /;"	d
Z_FIXED	include/u-boot/zlib.h	/^#define Z_FIXED /;"	d
Z_FULL_FLUSH	include/u-boot/zlib.h	/^#define Z_FULL_FLUSH /;"	d
Z_HUFFMAN_ONLY	include/u-boot/zlib.h	/^#define Z_HUFFMAN_ONLY /;"	d
Z_MEM_ERROR	include/u-boot/zlib.h	/^#define Z_MEM_ERROR /;"	d
Z_NEED_DICT	include/u-boot/zlib.h	/^#define Z_NEED_DICT /;"	d
Z_NO_COMPRESSION	include/u-boot/zlib.h	/^#define Z_NO_COMPRESSION /;"	d
Z_NO_FLUSH	include/u-boot/zlib.h	/^#define Z_NO_FLUSH /;"	d
Z_NULL	include/u-boot/zlib.h	/^#define Z_NULL /;"	d
Z_OK	include/u-boot/zlib.h	/^#define Z_OK /;"	d
Z_PARTIAL_FLUSH	include/u-boot/zlib.h	/^#define Z_PARTIAL_FLUSH /;"	d
Z_RLE	include/u-boot/zlib.h	/^#define Z_RLE /;"	d
Z_STREAM_END	include/u-boot/zlib.h	/^#define Z_STREAM_END /;"	d
Z_STREAM_ERROR	include/u-boot/zlib.h	/^#define Z_STREAM_ERROR /;"	d
Z_SYNC_FLUSH	include/u-boot/zlib.h	/^#define Z_SYNC_FLUSH /;"	d
Z_TEXT	include/u-boot/zlib.h	/^#define Z_TEXT /;"	d
Z_UNKNOWN	include/u-boot/zlib.h	/^#define Z_UNKNOWN /;"	d
Z_VERSION_ERROR	include/u-boot/zlib.h	/^#define Z_VERSION_ERROR /;"	d
Z_WAVE_RST_GPIO	board/bosch/shc/board.h	/^# define Z_WAVE_RST_GPIO /;"	d
ZeroMem	include/SA-1100.h	/^#define ZeroMem	/;"	d
ZeroMemSp	include/SA-1100.h	/^#define ZeroMemSp	/;"	d
ZeroMemType	include/SA-1100.h	/^typedef Quad		ZeroMemType [ZeroMemSp\/sizeof (Quad)] ;$/;"	t	typeref:typename:Quad[ZeroMemSp/sizeof (Quad)]
_	scripts/kconfig/lkc.h	/^#define _(/;"	d
_	scripts/kconfig/qconf.cc	/^# define _ /;"	d	file:
_1000BASET	include/miiphy.h	/^#define _1000BASET	/;"	d
_1000_Full	drivers/net/rtl8169.c	/^	_1000_Full = 0x10,$/;"	e	enum:RTL8169_register_content	file:
_1000bps	drivers/usb/eth/r8152.h	/^	_1000bps	= 0x10,$/;"	e	enum:rtl_register_content
_1000bpsF	drivers/net/rtl8169.c	/^	_1000bpsF = 0x10,$/;"	e	enum:RTL8169_register_content	file:
_100BASET	include/miiphy.h	/^#define _100BASET	/;"	d
_100_Full	drivers/net/rtl8169.c	/^	_100_Full = 0x08,$/;"	e	enum:RTL8169_register_content	file:
_100_Half	drivers/net/rtl8169.c	/^	_100_Half = 0x04,$/;"	e	enum:RTL8169_register_content	file:
_100bps	drivers/net/rtl8169.c	/^	_100bps = 0x08,$/;"	e	enum:RTL8169_register_content	file:
_100bps	drivers/usb/eth/r8152.h	/^	_100bps		= 0x08,$/;"	e	enum:rtl_register_content
_10BASET	include/miiphy.h	/^#define _10BASET	/;"	d
_10_Full	drivers/net/rtl8169.c	/^	_10_Full = 0x02,$/;"	e	enum:RTL8169_register_content	file:
_10_Half	drivers/net/rtl8169.c	/^	_10_Half = 0x01,$/;"	e	enum:RTL8169_register_content	file:
_10bps	drivers/net/rtl8169.c	/^	_10bps = 0x04,$/;"	e	enum:RTL8169_register_content	file:
_10bps	drivers/usb/eth/r8152.h	/^	_10bps		= 0x04,$/;"	e	enum:rtl_register_content
_128K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _128K	/;"	d
_128M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _128M	/;"	d
_16K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _16K	/;"	d
_16M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _16M	/;"	d
_1G	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _1G	/;"	d
_1K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _1K	/;"	d
_1M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _1M	/;"	d
_1_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _1_5x	/;"	d	file:
_1_5x	arch/powerpc/cpu/mpc83xx/speed.c	/^	_1_5x,$/;"	e	enum:__anon6ec4fb040103	file:
_1c	include/atmel_mci.h	/^	u32	_1c;	\/* 0x1c *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
_1x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _1x	/;"	d	file:
_1x	arch/powerpc/cpu/mpc83xx/speed.c	/^	_1x,$/;"	e	enum:__anon6ec4fb040103	file:
_256K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _256K	/;"	d
_256M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _256M	/;"	d
_2G	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _2G	/;"	d
_2M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _2M	/;"	d
_2_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _2_5x	/;"	d	file:
_2_5x	arch/powerpc/cpu/mpc83xx/speed.c	/^	_2_5x,$/;"	e	enum:__anon6ec4fb040103	file:
_2x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _2x	/;"	d	file:
_2x	arch/powerpc/cpu/mpc83xx/speed.c	/^	_2x,$/;"	e	enum:__anon6ec4fb040103	file:
_32K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _32K	/;"	d
_32M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _32M	/;"	d
_38	include/atmel_mci.h	/^	u32	_38;	\/* 0x38 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
_3_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _3_5x	/;"	d	file:
_3c	include/atmel_mci.h	/^	u32	_3c;	\/* 0x3c *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
_3x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _3x	/;"	d	file:
_3x	arch/powerpc/cpu/mpc83xx/speed.c	/^	_3x$/;"	e	enum:__anon6ec4fb040103	file:
_405GP_PCI_H	arch/powerpc/include/asm/4xx_pci.h	/^#define _405GP_PCI_H$/;"	d
_4K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _4K	/;"	d
_4M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _4M	/;"	d
_4_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _4_5x	/;"	d	file:
_4x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _4x	/;"	d	file:
_4xx_i2c_h_	arch/powerpc/include/asm/ppc4xx-i2c.h	/^#define _4xx_i2c_h_$/;"	d
_512K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _512K	/;"	d
_512M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _512M	/;"	d
_5_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _5_5x	/;"	d	file:
_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _5x	/;"	d	file:
_64K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _64K	/;"	d
_64M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _64M	/;"	d
_6_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _6_5x	/;"	d	file:
_6x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _6x	/;"	d	file:
_7_5x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _7_5x	/;"	d	file:
_7x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _7x	/;"	d	file:
_8390_h	drivers/net/8390.h	/^#define _8390_h$/;"	d
_8K	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _8K	/;"	d
_8M	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _8M	/;"	d
_8x	arch/powerpc/cpu/mpc8260/speed.c	/^#define _8x	/;"	d	file:
_ABI_BPMP_ABI_H_	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define _ABI_BPMP_ABI_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/arm/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/microblaze/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/mips/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/nios2/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/sandbox/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/x86/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	arch/xtensa/dts/include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_ABI_MACH_T186_RESET_T186_H_	include/dt-bindings/reset/tegra186-reset.h	/^#define _ABI_MACH_T186_RESET_T186_H_$/;"	d
_AC	arch/arm/include/asm/armv8/mmu.h	/^#define _AC(/;"	d
_AC	arch/mips/include/asm/const.h	/^#define _AC(/;"	d
_ACAST32_	arch/mips/include/asm/addrspace.h	/^#define _ACAST32_	/;"	d
_ACAST64_	arch/mips/include/asm/addrspace.h	/^#define _ACAST64_	/;"	d
_ACEX1K_H_	include/ACEX1K.h	/^#define _ACEX1K_H_$/;"	d
_ACH_ASM_SANDYBRIDGE_H	arch/x86/include/asm/arch-ivybridge/sandybridge.h	/^#define _ACH_ASM_SANDYBRIDGE_H$/;"	d
_ACPI_GNVS_H_	arch/x86/include/asm/acpi/global_nvs.h	/^#define _ACPI_GNVS_H_$/;"	d
_ADC_H_	include/adc.h	/^#define _ADC_H_$/;"	d
_ADV7611_H_	board/gdsys/common/adv7611.h	/^#define _ADV7611_H_$/;"	d
_AEMIF_H_	arch/arm/include/asm/ti-common/ti-aemif.h	/^#define _AEMIF_H_$/;"	d
_AES_REF_H_	include/aes.h	/^#define _AES_REF_H_$/;"	d
_AHCI_H_	include/ahci.h	/^#define _AHCI_H_$/;"	d
_AISIMAGE_H_	tools/aisimage.h	/^#define _AISIMAGE_H_$/;"	d
_ALTERA_H_	include/altera.h	/^#define _ALTERA_H_$/;"	d
_ALTERA_TSE_H_	drivers/net/altera_tse.h	/^#define _ALTERA_TSE_H_$/;"	d
_AM33XX_CPU_H	arch/arm/include/asm/arch-am33xx/cpu.h	/^#define _AM33XX_CPU_H$/;"	d
_AM3517CRANE_H_	board/ti/am3517crane/am3517crane.h	/^#define _AM3517CRANE_H_$/;"	d
_AM3517EVM_H_	board/htkw/mcx/mcx.h	/^#define _AM3517EVM_H_$/;"	d
_AM3517EVM_H_	board/logicpd/am3517evm/am3517evm.h	/^#define _AM3517EVM_H_$/;"	d
_AM3517_EMAC_H_	arch/arm/include/asm/arch-omap3/emac_defs.h	/^#define _AM3517_EMAC_H_$/;"	d
_AM35X_DEF_H_	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define _AM35X_DEF_H_$/;"	d
_AND	include/linux/time.h	/^#define _AND /;"	d
_ANDROID_IMAGE_H_	include/android_image.h	/^#define _ANDROID_IMAGE_H_$/;"	d
_ANOMALY_BF526	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define _ANOMALY_BF526(/;"	d
_ANOMALY_BF526_BF527	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define _ANOMALY_BF526_BF527(/;"	d
_ANOMALY_BF527	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define _ANOMALY_BF527(/;"	d
_ANX9804_H	drivers/video/anx9804.h	/^#define _ANX9804_H$/;"	d
_API_GLUE_H_	examples/api/glue.h	/^#define _API_GLUE_H_$/;"	d
_API_PRIVATE_H_	api/api_private.h	/^#define _API_PRIVATE_H_$/;"	d
_API_PUBLIC_H_	include/api_public.h	/^#define _API_PUBLIC_H_$/;"	d
_ARCH_ASM_LAPIC_H	arch/x86/include/asm/lapic.h	/^#define _ARCH_ASM_LAPIC_H$/;"	d
_ARCH_EMC_H_	arch/arm/include/asm/arch-tegra20/emc.h	/^#define _ARCH_EMC_H_$/;"	d
_ARCH_IRQ_H_	arch/x86/include/asm/irq.h	/^#define _ARCH_IRQ_H_$/;"	d
_ARCH_PMU_H_	arch/arm/include/asm/arch-tegra20/pmu.h	/^#define _ARCH_PMU_H_$/;"	d
_ARCH_QEMU_H_	arch/x86/include/asm/arch-qemu/qemu.h	/^#define _ARCH_QEMU_H_$/;"	d
_ARMADA100CPU_H	arch/arm/include/asm/arch-armada100/cpu.h	/^#define _ARMADA100CPU_H$/;"	d
_ARMD1_CONFIG_H	arch/arm/include/asm/arch-armada100/config.h	/^#define _ARMD1_CONFIG_H$/;"	d
_ASMI386_I8954_H_	arch/x86/include/asm/i8254.h	/^#define _ASMI386_I8954_H_$/;"	d
_ASMI386_I8959_H_	arch/x86/include/asm/i8259.h	/^#define _ASMI386_I8959_H_$/;"	d
_ASMLANGUAGE	arch/powerpc/cpu/ppc4xx/dcr.S	/^#define _ASMLANGUAGE$/;"	d	file:
_ASMPPC_SIGNAL_H	arch/powerpc/include/asm/signal.h	/^#define _ASMPPC_SIGNAL_H$/;"	d
_ASM_ADDRSPACE_H	arch/mips/include/asm/addrspace.h	/^#define _ASM_ADDRSPACE_H$/;"	d
_ASM_ARCH_ARMADA100_H	arch/arm/include/asm/arch-armada100/armada100.h	/^#define _ASM_ARCH_ARMADA100_H$/;"	d
_ASM_ARCH_CLK_H_	arch/arm/include/asm/arch-zynqmp/clk.h	/^#define _ASM_ARCH_CLK_H_$/;"	d
_ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx7/clock.h	/^#define _ASM_ARCH_CLOCK_H$/;"	d
_ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-rockchip/clock.h	/^#define _ASM_ARCH_CLOCK_H$/;"	d
_ASM_ARCH_CLOCK_SLICE_H	arch/arm/include/asm/arch-mx7/clock_slice.h	/^#define _ASM_ARCH_CLOCK_SLICE_H$/;"	d
_ASM_ARCH_CRU_RK3036_H	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^#define _ASM_ARCH_CRU_RK3036_H$/;"	d
_ASM_ARCH_CRU_RK3288_H	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^#define _ASM_ARCH_CRU_RK3288_H$/;"	d
_ASM_ARCH_DDR_RK3288_H	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^#define _ASM_ARCH_DDR_RK3288_H$/;"	d
_ASM_ARCH_EDP_H	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^#define _ASM_ARCH_EDP_H$/;"	d
_ASM_ARCH_GPIO_H	arch/arm/include/asm/arch-armada100/gpio.h	/^#define _ASM_ARCH_GPIO_H$/;"	d
_ASM_ARCH_GPIO_H	arch/arm/include/asm/arch-rockchip/gpio.h	/^#define _ASM_ARCH_GPIO_H$/;"	d
_ASM_ARCH_GRF_RK3036_H	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^#define _ASM_ARCH_GRF_RK3036_H$/;"	d
_ASM_ARCH_GRF_RK3288_H	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^#define _ASM_ARCH_GRF_RK3288_H$/;"	d
_ASM_ARCH_HARDWARE_H	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define _ASM_ARCH_HARDWARE_H$/;"	d
_ASM_ARCH_HARDWARE_H	arch/arm/include/asm/arch-spear/hardware.h	/^#define _ASM_ARCH_HARDWARE_H$/;"	d
_ASM_ARCH_HARDWARE_H	arch/arm/include/asm/arch-stm32f7/stm32.h	/^#define _ASM_ARCH_HARDWARE_H$/;"	d
_ASM_ARCH_HARDWARE_H	arch/arm/include/asm/arch-stv0991/hardware.h	/^#define _ASM_ARCH_HARDWARE_H$/;"	d
_ASM_ARCH_HARDWARE_H	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define _ASM_ARCH_HARDWARE_H$/;"	d
_ASM_ARCH_HARDWARE_H	arch/arm/mach-zynq/include/mach/hardware.h	/^#define _ASM_ARCH_HARDWARE_H$/;"	d
_ASM_ARCH_HDMI_H	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^#define _ASM_ARCH_HDMI_H$/;"	d
_ASM_ARCH_KIRKWOOD_H	arch/arm/mach-kirkwood/include/mach/soc.h	/^#define _ASM_ARCH_KIRKWOOD_H$/;"	d
_ASM_ARCH_KW88F6281_H	arch/arm/mach-kirkwood/include/mach/kw88f6281.h	/^#define _ASM_ARCH_KW88F6281_H$/;"	d
_ASM_ARCH_LPC_H	arch/x86/include/asm/arch-broadwell/lpc.h	/^#define _ASM_ARCH_LPC_H$/;"	d
_ASM_ARCH_LVDS_RK3288_H	arch/arm/include/asm/arch-rockchip/lvds_rk3288.h	/^#define _ASM_ARCH_LVDS_RK3288_H$/;"	d
_ASM_ARCH_MODEL_206AX_H	arch/x86/include/asm/arch-ivybridge/model_206ax.h	/^#define _ASM_ARCH_MODEL_206AX_H$/;"	d
_ASM_ARCH_ORION5X_H	arch/arm/mach-orion5x/include/mach/orion5x.h	/^#define _ASM_ARCH_ORION5X_H$/;"	d
_ASM_ARCH_PCH_H	arch/x86/include/asm/arch-ivybridge/pch.h	/^#define _ASM_ARCH_PCH_H$/;"	d
_ASM_ARCH_PERIPH_H	arch/arm/include/asm/arch-rockchip/periph.h	/^#define _ASM_ARCH_PERIPH_H$/;"	d
_ASM_ARCH_PMU_RK3288_H	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^#define _ASM_ARCH_PMU_RK3288_H$/;"	d
_ASM_ARCH_PWM_H	arch/arm/include/asm/arch-rockchip/pwm.h	/^#define _ASM_ARCH_PWM_H$/;"	d
_ASM_ARCH_RK3288_SDRAM_H__	arch/arm/include/asm/arch-rockchip/sdram.h	/^#define _ASM_ARCH_RK3288_SDRAM_H__$/;"	d
_ASM_ARCH_SDRAM_RK3036_H	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^#define _ASM_ARCH_SDRAM_RK3036_H$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch-am33xx/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch-omap3/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch-omap4/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch-omap5/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch-orion5x/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch-sunxi/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SPL_H_	arch/arm/include/asm/arch/spl.h	/^#define	_ASM_ARCH_SPL_H_$/;"	d
_ASM_ARCH_SYSTEM_COUNTER_H	arch/arm/include/asm/imx-common/syscounter.h	/^#define _ASM_ARCH_SYSTEM_COUNTER_H$/;"	d
_ASM_ARCH_SYS_PROTO_H	arch/arm/include/asm/arch-rockchip/sys_proto.h	/^#define _ASM_ARCH_SYS_PROTO_H$/;"	d
_ASM_ARCH_SYS_PROTO_H	arch/arm/include/asm/arch-zynqmp/sys_proto.h	/^#define _ASM_ARCH_SYS_PROTO_H$/;"	d
_ASM_ARCH_TEGRA_IVC_H	arch/arm/include/asm/arch-tegra/ivc.h	/^#define _ASM_ARCH_TEGRA_IVC_H$/;"	d
_ASM_ARCH_VOP_RK3288_H	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^#define _ASM_ARCH_VOP_RK3288_H$/;"	d
_ASM_ARCH_XHCI_EXYNOS_H_	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^#define _ASM_ARCH_XHCI_EXYNOS_H_$/;"	d
_ASM_ARCH_XHCI_FSL_H_	include/linux/usb/xhci-fsl.h	/^#define _ASM_ARCH_XHCI_FSL_H_$/;"	d
_ASM_ARCH_XHCI_OMAP_H_	include/linux/usb/xhci-omap.h	/^#define _ASM_ARCH_XHCI_OMAP_H_$/;"	d
_ASM_ARC_ARCREGS_H	arch/arc/include/asm/arcregs.h	/^#define _ASM_ARC_ARCREGS_H$/;"	d
_ASM_ARC_INIT_HELPERS_H	arch/arc/include/asm/init_helpers.h	/^#define _ASM_ARC_INIT_HELPERS_H$/;"	d
_ASM_ARC_PROCESSOR_H	arch/arc/include/asm/processor.h	/^#define _ASM_ARC_PROCESSOR_H$/;"	d
_ASM_ARC_RELOCATE_H	arch/arc/include/asm/relocate.h	/^#define _ASM_ARC_RELOCATE_H$/;"	d
_ASM_ARMV7_LS102XA_CONFIG_	arch/arm/include/asm/arch-ls102xa/config.h	/^#define _ASM_ARMV7_LS102XA_CONFIG_$/;"	d
_ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_	arch/arm/include/asm/arch-fsl-layerscape/config.h	/^#define _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_$/;"	d
_ASM_ARMV8_FSL_LAYERSCAPE_FDT_H_	arch/arm/include/asm/arch-fsl-layerscape/fdt.h	/^#define _ASM_ARMV8_FSL_LAYERSCAPE_FDT_H_$/;"	d
_ASM_ARMV8_FSL_LAYERSCAPE_MMU_H_	arch/arm/include/asm/arch-fsl-layerscape/mmu.h	/^#define _ASM_ARMV8_FSL_LAYERSCAPE_MMU_H_$/;"	d
_ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_$/;"	d
_ASM_ARMV8_MMU_H_	arch/arm/include/asm/armv8/mmu.h	/^#define _ASM_ARMV8_MMU_H_$/;"	d
_ASM_ARM_PXA_CONFIG_	arch/arm/include/asm/arch-pxa/config.h	/^#define _ASM_ARM_PXA_CONFIG_$/;"	d
_ASM_ARM_UNALIGNED_H	arch/arm/include/asm/unaligned.h	/^#define _ASM_ARM_UNALIGNED_H$/;"	d
_ASM_BITOPS_H	arch/mips/include/asm/bitops.h	/^#define _ASM_BITOPS_H$/;"	d
_ASM_BOOT_DEVICE_H_	arch/arm/mach-uniphier/boot-mode/boot-device.h	/^#define _ASM_BOOT_DEVICE_H_$/;"	d
_ASM_BOOT_MODE_H	arch/arm/include/asm/imx-common/boot_mode.h	/^#define _ASM_BOOT_MODE_H$/;"	d
_ASM_BYTEORDER_H	arch/mips/include/asm/byteorder.h	/^#define _ASM_BYTEORDER_H$/;"	d
_ASM_CACHECTL	arch/mips/include/asm/cachectl.h	/^#define	_ASM_CACHECTL$/;"	d
_ASM_CACHE_H	arch/arm/include/asm/cache.h	/^#define _ASM_CACHE_H$/;"	d
_ASM_CACHE_H	arch/nds32/include/asm/cache.h	/^#define _ASM_CACHE_H$/;"	d
_ASM_CONFIG_H_	arch/arm/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/avr32/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/m68k/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/microblaze/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/mips/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/nds32/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/nios2/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/openrisc/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/powerpc/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/sandbox/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/sh/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/sparc/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/x86/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CONFIG_H_	arch/xtensa/include/asm/config.h	/^#define _ASM_CONFIG_H_$/;"	d
_ASM_CPU_H	arch/x86/include/asm/cpu.h	/^#define _ASM_CPU_H$/;"	d
_ASM_CPU_SH2_H_	arch/sh/include/asm/cpu_sh2.h	/^#define _ASM_CPU_SH2_H_$/;"	d
_ASM_CPU_SH3_H_	arch/sh/include/asm/cpu_sh3.h	/^#define _ASM_CPU_SH3_H_$/;"	d
_ASM_CPU_SH4_H_	arch/sh/include/asm/cpu_sh4.h	/^#define _ASM_CPU_SH4_H_$/;"	d
_ASM_CPU_SH7203_H_	arch/sh/include/asm/cpu_sh7203.h	/^#define _ASM_CPU_SH7203_H_$/;"	d
_ASM_CPU_SH7264_H_	arch/sh/include/asm/cpu_sh7264.h	/^#define _ASM_CPU_SH7264_H_$/;"	d
_ASM_CPU_SH7269_H_	arch/sh/include/asm/cpu_sh7269.h	/^#define _ASM_CPU_SH7269_H_$/;"	d
_ASM_CPU_SH7706_H_	arch/sh/include/asm/cpu_sh7706.h	/^#define _ASM_CPU_SH7706_H_$/;"	d
_ASM_CPU_SH7710_H_	arch/sh/include/asm/cpu_sh7710.h	/^#define _ASM_CPU_SH7710_H_$/;"	d
_ASM_CPU_SH7720_H_	arch/sh/include/asm/cpu_sh7720.h	/^#define _ASM_CPU_SH7720_H_$/;"	d
_ASM_CPU_SH7722_H_	arch/sh/include/asm/cpu_sh7722.h	/^#define _ASM_CPU_SH7722_H_$/;"	d
_ASM_CPU_SH7723_H_	arch/sh/include/asm/cpu_sh7723.h	/^#define _ASM_CPU_SH7723_H_$/;"	d
_ASM_CPU_SH7724_H_	arch/sh/include/asm/cpu_sh7724.h	/^#define _ASM_CPU_SH7724_H_$/;"	d
_ASM_CPU_SH7734_H_	arch/sh/include/asm/cpu_sh7734.h	/^#define _ASM_CPU_SH7734_H_$/;"	d
_ASM_CPU_SH7750_H_	arch/sh/include/asm/cpu_sh7750.h	/^#define _ASM_CPU_SH7750_H_$/;"	d
_ASM_CPU_SH7752_H_	arch/sh/include/asm/cpu_sh7752.h	/^#define _ASM_CPU_SH7752_H_$/;"	d
_ASM_CPU_SH7753_H_	arch/sh/include/asm/cpu_sh7753.h	/^#define _ASM_CPU_SH7753_H_$/;"	d
_ASM_CPU_SH7757_H_	arch/sh/include/asm/cpu_sh7757.h	/^#define _ASM_CPU_SH7757_H_$/;"	d
_ASM_CPU_SH7763_H_	arch/sh/include/asm/cpu_sh7763.h	/^#define _ASM_CPU_SH7763_H_$/;"	d
_ASM_CPU_SH7780_H_	arch/sh/include/asm/cpu_sh7780.h	/^#define	_ASM_CPU_SH7780_H_$/;"	d
_ASM_CPU_SH7785_H_	arch/sh/include/asm/cpu_sh7785.h	/^#define	_ASM_CPU_SH7785_H_$/;"	d
_ASM_CPU_X86_H	arch/x86/include/asm/cpu_x86.h	/^#define _ASM_CPU_X86_H$/;"	d
_ASM_FSL_DMA_H_	arch/powerpc/include/asm/fsl_dma.h	/^#define _ASM_FSL_DMA_H_$/;"	d
_ASM_FSL_I2C_H_	arch/m68k/include/asm/fsl_i2c.h	/^#define _ASM_FSL_I2C_H_$/;"	d
_ASM_FSL_I2C_H_	arch/powerpc/include/asm/fsl_i2c.h	/^#define _ASM_FSL_I2C_H_$/;"	d
_ASM_FSL_USB_H_	include/fsl_usb.h	/^#define _ASM_FSL_USB_H_$/;"	d
_ASM_GENERIC_ATOMIC_LONG_H	include/asm-generic/atomic-long.h	/^#define _ASM_GENERIC_ATOMIC_LONG_H$/;"	d
_ASM_GENERIC_BITOPS_ATOMIC_H_	arch/nios2/include/asm/bitops/atomic.h	/^#define _ASM_GENERIC_BITOPS_ATOMIC_H_$/;"	d
_ASM_GENERIC_BITOPS_FFS_H_	arch/nios2/include/asm/bitops/ffs.h	/^#define _ASM_GENERIC_BITOPS_FFS_H_$/;"	d
_ASM_GENERIC_BITOPS_FLS64_H_	include/asm-generic/bitops/fls64.h	/^#define _ASM_GENERIC_BITOPS_FLS64_H_$/;"	d
_ASM_GENERIC_BITOPS_FLS_H_	include/asm-generic/bitops/fls.h	/^#define _ASM_GENERIC_BITOPS_FLS_H_$/;"	d
_ASM_GENERIC_BITOPS_NON_ATOMIC_H_	arch/nios2/include/asm/bitops/non-atomic.h	/^#define _ASM_GENERIC_BITOPS_NON_ATOMIC_H_$/;"	d
_ASM_GENERIC_BITOPS___FFS_H_	include/asm-generic/bitops/__ffs.h	/^#define _ASM_GENERIC_BITOPS___FFS_H_$/;"	d
_ASM_GENERIC_BITOPS___FLS_H_	include/asm-generic/bitops/__fls.h	/^#define _ASM_GENERIC_BITOPS___FLS_H_$/;"	d
_ASM_GENERIC_DIV64_H	include/div64.h	/^#define _ASM_GENERIC_DIV64_H$/;"	d
_ASM_GENERIC_GPIO_H_	include/asm-generic/gpio.h	/^#define _ASM_GENERIC_GPIO_H_$/;"	d
_ASM_GENERIC_IOCTL_H	include/asm-generic/ioctl.h	/^#define _ASM_GENERIC_IOCTL_H$/;"	d
_ASM_GENERIC_SECTIONS_H_	include/asm-generic/sections.h	/^#define _ASM_GENERIC_SECTIONS_H_$/;"	d
_ASM_GT64120_H	include/gt64120.h	/^#define _ASM_GT64120_H$/;"	d
_ASM_INTEL_ME_H	arch/x86/include/asm/arch-ivybridge/me.h	/^#define _ASM_INTEL_ME_H$/;"	d
_ASM_IOPIN_8260_H_	arch/powerpc/include/asm/iopin_8260.h	/^#define _ASM_IOPIN_8260_H_$/;"	d
_ASM_IOPIN_8XX_H_	arch/powerpc/include/asm/iopin_8xx.h	/^#define _ASM_IOPIN_8XX_H_$/;"	d
_ASM_IO_H	arch/mips/include/asm/io.h	/^#define _ASM_IO_H$/;"	d
_ASM_IO_H	arch/x86/include/asm/io.h	/^#define _ASM_IO_H$/;"	d
_ASM_M68K_UNALIGNED_H	arch/m68k/include/asm/unaligned.h	/^#define _ASM_M68K_UNALIGNED_H$/;"	d
_ASM_MACH_GENERIC_SPACES_H	arch/mips/include/asm/mach-generic/spaces.h	/^#define _ASM_MACH_GENERIC_SPACES_H$/;"	d
_ASM_MICROBLAZE_GPIO_H_	arch/microblaze/include/asm/gpio.h	/^#define _ASM_MICROBLAZE_GPIO_H_$/;"	d
_ASM_MICROBLAZE_SPL_H_	arch/microblaze/include/asm/spl.h	/^#define _ASM_MICROBLAZE_SPL_H_$/;"	d
_ASM_MIPSREGS_H	arch/mips/include/asm/mipsregs.h	/^#define _ASM_MIPSREGS_H$/;"	d
_ASM_MIPS_UNALIGNED_H	arch/mips/include/asm/unaligned.h	/^#define _ASM_MIPS_UNALIGNED_H$/;"	d
_ASM_MPC85xx_CONFIG_H_	arch/powerpc/include/asm/config_mpc85xx.h	/^#define _ASM_MPC85xx_CONFIG_H_$/;"	d
_ASM_MPC86xx_CONFIG_H_	arch/powerpc/include/asm/config_mpc86xx.h	/^#define _ASM_MPC86xx_CONFIG_H_$/;"	d
_ASM_MPC8XXX_SPI_H_	arch/powerpc/include/asm/mpc8xxx_spi.h	/^#define _ASM_MPC8XXX_SPI_H_$/;"	d
_ASM_MP_H_	arch/powerpc/include/asm/mp.h	/^#define _ASM_MP_H_$/;"	d
_ASM_MRCCACHE_H	arch/x86/include/asm/mrccache.h	/^#define _ASM_MRCCACHE_H$/;"	d
_ASM_MTRR_H	arch/x86/include/asm/mtrr.h	/^#define _ASM_MTRR_H$/;"	d
_ASM_PCI_H_	arch/sh/include/asm/pci.h	/^#define _ASM_PCI_H_$/;"	d
_ASM_PGTABLE_BITS_H	arch/mips/include/asm/pgtable-bits.h	/^#define _ASM_PGTABLE_BITS_H$/;"	d
_ASM_PNP_DEF_H_	arch/x86/include/asm/pnp_def.h	/^#define _ASM_PNP_DEF_H_$/;"	d
_ASM_POSIX_TYPES_H	arch/mips/include/asm/posix_types.h	/^#define _ASM_POSIX_TYPES_H$/;"	d
_ASM_POWERPC_UNALIGNED_H	arch/powerpc/include/asm/unaligned.h	/^#define _ASM_POWERPC_UNALIGNED_H$/;"	d
_ASM_PPC_ATOMIC_H_	arch/powerpc/include/asm/atomic.h	/^#define _ASM_PPC_ATOMIC_H_$/;"	d
_ASM_PPC_SIGCONTEXT_H	arch/powerpc/include/asm/sigcontext.h	/^#define _ASM_PPC_SIGCONTEXT_H$/;"	d
_ASM_PROCESSOR_H	arch/mips/include/asm/processor.h	/^#define _ASM_PROCESSOR_H$/;"	d
_ASM_PROCESSOR_H	arch/sandbox/include/asm/processor.h	/^#define _ASM_PROCESSOR_H$/;"	d
_ASM_PTRACE_H	arch/mips/include/asm/ptrace.h	/^#define _ASM_PTRACE_H$/;"	d
_ASM_REBOOT_H	arch/mips/include/asm/reboot.h	/^#define _ASM_REBOOT_H$/;"	d
_ASM_REGDEF_H	arch/mips/include/asm/regdef.h	/^#define _ASM_REGDEF_H$/;"	d
_ASM_SH_PROCESSOR_H_	arch/sh/include/asm/processor.h	/^#define _ASM_SH_PROCESSOR_H_$/;"	d
_ASM_SH_UNALIGNED_H	arch/sh/include/asm/unaligned.h	/^#define _ASM_SH_UNALIGNED_H$/;"	d
_ASM_SIPI_H	arch/x86/include/asm/sipi.h	/^#define _ASM_SIPI_H$/;"	d
_ASM_SPARC_ATOMIC_H_	arch/sparc/include/asm/atomic.h	/^#define _ASM_SPARC_ATOMIC_H_$/;"	d
_ASM_SPARC_UNALIGNED_H	arch/sparc/include/asm/unaligned.h	/^#define _ASM_SPARC_UNALIGNED_H$/;"	d
_ASM_SPEEDSTEP_H	arch/x86/include/asm/speedstep.h	/^#define _ASM_SPEEDSTEP_H$/;"	d
_ASM_SPL_H_	arch/arm/include/asm/spl.h	/^#define	_ASM_SPL_H_$/;"	d
_ASM_SPL_H_	arch/powerpc/include/asm/spl.h	/^#define	_ASM_SPL_H_$/;"	d
_ASM_STRING_H	arch/mips/include/asm/string.h	/^#define _ASM_STRING_H$/;"	d
_ASM_SYSTEM_H	arch/mips/include/asm/system.h	/^#define _ASM_SYSTEM_H$/;"	d
_ASM_TURBO_H	arch/x86/include/asm/turbo.h	/^#define _ASM_TURBO_H$/;"	d
_ASM_TYPES_H	arch/microblaze/include/asm/types.h	/^#define _ASM_TYPES_H$/;"	d
_ASM_TYPES_H	arch/mips/include/asm/types.h	/^#define _ASM_TYPES_H$/;"	d
_ASM_TYPES_H	arch/openrisc/include/asm/types.h	/^#define _ASM_TYPES_H$/;"	d
_ASM_X86_ATOMIC_H	arch/x86/include/asm/atomic.h	/^#define _ASM_X86_ATOMIC_H$/;"	d
_ASM_X86_BOOTPARAM_H	arch/x86/include/asm/bootparam.h	/^#define _ASM_X86_BOOTPARAM_H$/;"	d
_ASM_X86_E820_H	arch/x86/include/asm/e820.h	/^#define _ASM_X86_E820_H$/;"	d
_ASM_X86_ELF_H	arch/x86/include/asm/elf.h	/^#define _ASM_X86_ELF_H$/;"	d
_ASM_X86_IST_H	arch/x86/include/asm/ist.h	/^#define _ASM_X86_IST_H$/;"	d
_ASM_X86_LINKAGE_H	arch/x86/include/asm/linkage.h	/^#define _ASM_X86_LINKAGE_H$/;"	d
_ASM_X86_MSR_H	arch/x86/include/asm/msr.h	/^#define _ASM_X86_MSR_H$/;"	d
_ASM_X86_MSR_INDEX_H	arch/x86/include/asm/msr-index.h	/^#define _ASM_X86_MSR_INDEX_H$/;"	d
_ASM_X86_PROCESSOR_FLAGS_H	arch/x86/include/asm/processor-flags.h	/^#define _ASM_X86_PROCESSOR_FLAGS_H$/;"	d
_ASM_XTENSA_RELOCATE_H	arch/xtensa/include/asm/relocate.h	/^#define _ASM_XTENSA_RELOCATE_H$/;"	d
_ASM_XTENSA_UNALIGNED_H	arch/xtensa/include/asm/unaligned.h	/^#define _ASM_XTENSA_UNALIGNED_H$/;"	d
_ASM_ZIMAGE_H_	arch/sh/include/asm/zimage.h	/^#define _ASM_ZIMAGE_H_$/;"	d
_ASM_ZIMAGE_H_	arch/x86/include/asm/zimage.h	/^#define _ASM_ZIMAGE_H_$/;"	d
_AT	arch/mips/include/asm/const.h	/^#define _AT(/;"	d
_AT91S_DATAFLASH_INFO	include/dataflash.h	/^typedef struct _AT91S_DATAFLASH_INFO {$/;"	s
_AT91S_DataFlash	include/dataflash.h	/^typedef struct _AT91S_DataFlash {$/;"	s
_AT91S_Dataflash	include/dataflash.h	/^typedef struct _AT91S_Dataflash {$/;"	s
_AT91S_DataflashDesc	include/dataflash.h	/^typedef struct _AT91S_DataflashDesc {$/;"	s
_AT91_I2C_H	drivers/i2c/at91_i2c.h	/^#define _AT91_I2C_H$/;"	d
_ATA_H	include/ata.h	/^#define _ATA_H$/;"	d
_ATMEL_LCD_H_	include/atmel_lcd.h	/^#define _ATMEL_LCD_H_$/;"	d
_ATMEL_SERIAL_H	arch/arm/mach-at91/include/mach/atmel_serial.h	/^#define _ATMEL_SERIAL_H$/;"	d
_ATYPE32_	arch/mips/include/asm/addrspace.h	/^#define _ATYPE32_	/;"	d
_ATYPE64_	arch/mips/include/asm/addrspace.h	/^#define _ATYPE64_	/;"	d
_ATYPE_	arch/mips/include/asm/addrspace.h	/^#define _ATYPE_	/;"	d
_AU1X00_H_	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define _AU1X00_H_$/;"	d
_AX88180_H_	drivers/net/ax88180.h	/^#define _AX88180_H_$/;"	d
_AddConfig	tools/buildman/builder.py	/^        def _AddConfig(lines, name, config_plus, config_minus, config_change):$/;"	f	member:Builder.PrintResultSummary	file:
_AddTimestamp	tools/buildman/builder.py	/^    def _AddTimestamp(self):$/;"	m	class:Builder
_BACKLIGHT_H	include/backlight.h	/^#define _BACKLIGHT_H$/;"	d
_BAT	arch/powerpc/include/asm/mmu.h	/^typedef struct _BAT {$/;"	s
_BATL	arch/powerpc/include/asm/mmu.h	/^typedef struct _BATL {		\/* Lower part of BAT (all except 601) *\/$/;"	s
_BATU	arch/powerpc/include/asm/mmu.h	/^typedef struct _BATU {		\/* Upper part of BAT (all except 601) *\/$/;"	s
_BAYTRAIL_IOMAP_H_	arch/x86/include/asm/arch-baytrail/iomap.h	/^#define _BAYTRAIL_IOMAP_H_$/;"	d
_BAYTRAIL_IRQ_H_	arch/x86/include/asm/arch-baytrail/irq.h	/^#define _BAYTRAIL_IRQ_H_$/;"	d
_BCD_H	include/bcd.h	/^#define _BCD_H$/;"	d
_BCH_H	include/linux/bch.h	/^#define _BCH_H$/;"	d
_BCM2835_GPIO_H_	arch/arm/mach-bcm283x/include/mach/gpio.h	/^#define _BCM2835_GPIO_H_$/;"	d
_BCM2835_MBOX_H	arch/arm/mach-bcm283x/include/mach/mbox.h	/^#define _BCM2835_MBOX_H$/;"	d
_BCM2835_SDHCI_H_	arch/arm/mach-bcm283x/include/mach/sdhci.h	/^#define _BCM2835_SDHCI_H_$/;"	d
_BCM2835_TIMER_H	arch/arm/mach-bcm283x/include/mach/timer.h	/^#define _BCM2835_TIMER_H$/;"	d
_BCM2835_WDOG_H	arch/arm/mach-bcm283x/include/mach/wdog.h	/^#define _BCM2835_WDOG_H$/;"	d
_BCM_SF2_ETH_GMAC_H_	drivers/net/bcm-sf2-eth-gmac.h	/^#define _BCM_SF2_ETH_GMAC_H_$/;"	d
_BCM_SF2_ETH_H_	drivers/net/bcm-sf2-eth.h	/^#define _BCM_SF2_ETH_H_$/;"	d
_BCU_H	board/micronas/vct/bcu.h	/^#define _BCU_H$/;"	d
_BEAGLE_H_	board/ti/beagle/beagle.h	/^#define _BEAGLE_H_$/;"	d
_BEDBUG_H	include/bedbug/bedbug.h	/^#define _BEDBUG_H$/;"	d
_BE_bios_init	drivers/bios_emulator/bios.c	/^void _BE_bios_init(u32 * intrTab)$/;"	f	typeref:typename:void
_BE_env	drivers/bios_emulator/biosemu.c	/^BE_sysEnv _BE_env = {{0}};$/;"	v	typeref:typename:BE_sysEnv
_BE_mem	drivers/bios_emulator/biosemu.c	/^static X86EMU_memFuncs _BE_mem __attribute__((section(GOT2_TYPE))) = {$/;"	v	typeref:typename:X86EMU_memFuncs	file:
_BE_pio	drivers/bios_emulator/biosemu.c	/^static X86EMU_pioFuncs _BE_pio __attribute__((section(GOT2_TYPE))) = {$/;"	v	typeref:typename:X86EMU_pioFuncs	file:
_BFIN_PTRACE_H	arch/blackfin/include/asm/ptrace.h	/^#define _BFIN_PTRACE_H$/;"	d
_BFIN_TRAPS_H	arch/blackfin/include/asm/traps.h	/^#define _BFIN_TRAPS_H$/;"	d
_BIOS_EMUL_H	include/bios_emul.h	/^#define _BIOS_EMUL_H$/;"	d
_BIT	board/buffalo/lsxl/lsxl.h	/^#define _BIT(/;"	d
_BITUL	arch/mips/include/asm/const.h	/^#define _BITUL(/;"	d
_BITULL	arch/mips/include/asm/const.h	/^#define _BITULL(/;"	d
_BLACKFINNOMMU_STRING_H_	arch/blackfin/include/asm/string.h	/^#define _BLACKFINNOMMU_STRING_H_$/;"	d
_BLACKFIN_BITOPS_H	arch/blackfin/include/asm/bitops.h	/^#define _BLACKFIN_BITOPS_H$/;"	d
_BLACKFIN_BYTEORDER_H	arch/blackfin/include/asm/byteorder.h	/^#define _BLACKFIN_BYTEORDER_H$/;"	d
_BLACKFIN_DEFER_H	arch/blackfin/include/asm/deferred.h	/^#define _BLACKFIN_DEFER_H$/;"	d
_BLACKFIN_DELAY_H	arch/blackfin/include/asm/delay.h	/^#define _BLACKFIN_DELAY_H$/;"	d
_BLACKFIN_DMA_H_	arch/blackfin/include/asm/dma.h	/^#define _BLACKFIN_DMA_H_$/;"	d
_BLACKFIN_IO_H	arch/blackfin/include/asm/io.h	/^#define _BLACKFIN_IO_H$/;"	d
_BLACKFIN_SYSTEM_H	arch/blackfin/include/asm/system.h	/^#define _BLACKFIN_SYSTEM_H$/;"	d
_BLACKFIN_TYPES_H	arch/blackfin/include/asm/types.h	/^#define _BLACKFIN_TYPES_H$/;"	d
_BMP_H_	include/bmp_layout.h	/^#define _BMP_H_$/;"	d
_BOARD_H_	board/birdland/bav335x/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/bosch/shc/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/compulab/cm_t43/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/gumstix/pepper/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/isee/igep0033/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/phytec/pcm051/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/siemens/draco/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/siemens/pxm2/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/siemens/rut/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/silica/pengwyn/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/tcl/sl50/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/ti/am335x/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/ti/am43xx/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_H_	board/vscom/baltos/board.h	/^#define _BOARD_H_$/;"	d
_BOARD_R7780MP_R7780MP_H_	board/renesas/r7780mp/r7780mp.h	/^#define _BOARD_R7780MP_R7780MP_H_$/;"	d
_BOARD_SYNOPSYS_AXS10X_H	board/synopsys/axs10x/axs10x.h	/^#define _BOARD_SYNOPSYS_AXS10X_H$/;"	d
_BOARD_ZOOM1_H_	board/logicpd/zoom1/zoom1.h	/^#define _BOARD_ZOOM1_H_$/;"	d
_BOOTM_H	include/bootm.h	/^#define _BOOTM_H$/;"	d
_BOOTROM_BOOTKERNEL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_BOOTKERNEL /;"	d
_BOOTROM_BOOT_DXE_FLASH	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_BOOT_DXE_FLASH /;"	d
_BOOTROM_BOOT_DXE_SPI	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_BOOT_DXE_SPI /;"	d
_BOOTROM_BOOT_DXE_TWI	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_BOOT_DXE_TWI /;"	d
_BOOTROM_CRC32	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_CRC32 /;"	d
_BOOTROM_CRC32CALLBACK	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_CRC32CALLBACK /;"	d
_BOOTROM_CRC32INITCODE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_CRC32INITCODE /;"	d
_BOOTROM_CRC32POLY	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_CRC32POLY /;"	d
_BOOTROM_DO_MEMORY_DMA	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_DO_MEMORY_DMA /;"	d
_BOOTROM_ECC_TABLE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_ECC_TABLE /;"	d
_BOOTROM_EXCEPTION	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_EXCEPTION /;"	d
_BOOTROM_FINAL_INIT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_FINAL_INIT /;"	d
_BOOTROM_GETPORT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_GETPORT /;"	d
_BOOTROM_GET_DXE_ADDRESS_FLASH	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_GET_DXE_ADDRESS_FLASH /;"	d
_BOOTROM_GET_DXE_ADDRESS_SPI	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_GET_DXE_ADDRESS_SPI /;"	d
_BOOTROM_GET_DXE_ADDRESS_TWI	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_GET_DXE_ADDRESS_TWI /;"	d
_BOOTROM_HWERROR	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_HWERROR /;"	d
_BOOTROM_MDMA	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_MDMA /;"	d
_BOOTROM_MEMBOOT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_MEMBOOT /;"	d
_BOOTROM_NANDBOOT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_NANDBOOT /;"	d
_BOOTROM_NMI	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_NMI /;"	d
_BOOTROM_OTPBOOT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_OTPBOOT /;"	d
_BOOTROM_OTP_COMMAND	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_OTP_COMMAND /;"	d
_BOOTROM_OTP_READ	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_OTP_READ /;"	d
_BOOTROM_OTP_WRITE	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_OTP_WRITE /;"	d
_BOOTROM_PDMA	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_PDMA /;"	d
_BOOTROM_RESET	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_RESET /;"	d
_BOOTROM_REV	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_REV /;"	d
_BOOTROM_SESR	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_SESR /;"	d
_BOOTROM_SPIBOOT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_SPIBOOT /;"	d
_BOOTROM_SYSCONTROL	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_SYSCONTROL /;"	d
_BOOTROM_TWIBOOT	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define _BOOTROM_TWIBOOT /;"	d
_BOOTSTAGE_H	include/bootstage.h	/^#define _BOOTSTAGE_H$/;"	d
_BROADWELL_SPI_H_	arch/x86/include/asm/arch-broadwell/spi.h	/^#define _BROADWELL_SPI_H_$/;"	d
_BSP_VS_HWPARAM	board/vscom/baltos/board.h	/^typedef struct _BSP_VS_HWPARAM    \/\/ v1.0$/;"	s
_BUR_COMMON_H_	board/BuR/common/bur_common.h	/^#define _BUR_COMMON_H_$/;"	d
_BUS_ADDR_H	include/phys2bus.h	/^#define _BUS_ADDR_H$/;"	d
_BZLIB_H	include/bzlib.h	/^#define _BZLIB_H$/;"	d
_BZLIB_PRIVATE_H	lib/bzip2/bzlib_private.h	/^#define _BZLIB_PRIVATE_H$/;"	d
_BasicCheck	tools/patman/cros_subprocess.py	/^    def _BasicCheck(self, plist, oper):$/;"	m	class:TestSubprocess
_BoardList	tools/buildman/builder.py	/^        def _BoardList(line, line_boards):$/;"	f	member:Builder.PrintResultSummary	file:
_BufferDesc	drivers/net/natsemi.c	/^typedef struct _BufferDesc {$/;"	s	file:
_BufferDesc	drivers/net/ns8382x.c	/^typedef struct _BufferDesc {$/;"	s	file:
_BuildTerms	tools/buildman/board.py	/^    def _BuildTerms(self, args):$/;"	m	class:Boards
_C	include/linux/ctype.h	/^#define _C	/;"	d
_CACHE_ALIGN_SIZE	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^#define _CACHE_ALIGN_SIZE	/;"	d	file:
_CACHE_CACHABLE_CE	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_CE	/;"	d
_CACHE_CACHABLE_COHERENT	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_COHERENT /;"	d
_CACHE_CACHABLE_COW	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_COW	/;"	d
_CACHE_CACHABLE_CUW	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_CUW	/;"	d
_CACHE_CACHABLE_NONCOHERENT	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_NONCOHERENT	/;"	d
_CACHE_CACHABLE_NONCOHERENT	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_NONCOHERENT /;"	d
_CACHE_CACHABLE_NO_WA	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_NO_WA	/;"	d
_CACHE_CACHABLE_WA	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_CACHABLE_WA	/;"	d
_CACHE_MASK	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_MASK	/;"	d
_CACHE_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_SHIFT	/;"	d
_CACHE_UNCACHED	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_UNCACHED	/;"	d
_CACHE_UNCACHED_ACCELERATED	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_UNCACHED_ACCELERATED	/;"	d
_CACHE_UNCACHED_ACCELERATED	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_UNCACHED_ACCELERATED /;"	d
_CACHE_UNCACHED_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _CACHE_UNCACHED_SHIFT	/;"	d
_CADDR_T	include/linux/types.h	/^#define _CADDR_T$/;"	d
_CCLK	arch/blackfin/cpu/initcode.c	/^#define _CCLK /;"	d	file:
_CCR	include/ppc_defs.h	/^#define	_CCR	/;"	d
_CH7301_H_	board/gdsys/common/ch7301.h	/^#define _CH7301_H_$/;"	d
_CLI_HUSH_H_	include/cli_hush.h	/^#define _CLI_HUSH_H_$/;"	d
_CLK_H_	include/clk.h	/^#define _CLK_H_$/;"	d
_CLK_ROCKCHIP_RK808	arch/arm/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	arch/microblaze/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	arch/mips/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	arch/nios2/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	arch/sandbox/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	arch/x86/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	arch/xtensa/dts/include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_ROCKCHIP_RK808	include/dt-bindings/clock/rockchip,rk808.h	/^#define _CLK_ROCKCHIP_RK808$/;"	d
_CLK_UCLASS_H	include/clk-uclass.h	/^#define _CLK_UCLASS_H$/;"	d
_CLOCKS_AM33XX_H_	arch/arm/include/asm/arch-am33xx/clocks_am33xx.h	/^#define _CLOCKS_AM33XX_H_$/;"	d
_CLOCKS_H_	arch/arm/include/asm/arch-am33xx/clock.h	/^#define _CLOCKS_H_$/;"	d
_CLOCKS_H_	arch/arm/include/asm/arch-omap3/clock.h	/^#define _CLOCKS_H_$/;"	d
_CLOCKS_OMAP3_H_	arch/arm/include/asm/arch-omap3/clocks_omap3.h	/^#define _CLOCKS_OMAP3_H_$/;"	d
_CLOCKS_OMAP4_H_	arch/arm/include/asm/arch-omap4/clock.h	/^#define _CLOCKS_OMAP4_H_$/;"	d
_CLOCKS_OMAP5_H_	arch/arm/include/asm/arch-omap5/clock.h	/^#define _CLOCKS_OMAP5_H_$/;"	d
_CLOCK_DEFS_H_	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define _CLOCK_DEFS_H_$/;"	d
_CLOCK_MANAGER_H_	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^#define	_CLOCK_MANAGER_H_$/;"	d
_CLOCK_T	include/linux/types.h	/^#define _CLOCK_T$/;"	d
_CLOCK_TABLES_H_	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^#define _CLOCK_TABLES_H_$/;"	d
_CLOCK_TI81XX_H_	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^#define _CLOCK_TI81XX_H_$/;"	d
_CLR_OFFSET	arch/mips/mach-pic32/include/mach/pic32.h	/^#define _CLR_OFFSET	/;"	d
_CL_COMMON_	board/compulab/common/common.h	/^#define _CL_COMMON_$/;"	d
_CLzmaProps	lib/lzma/LzmaDec.h	/^typedef struct _CLzmaProps$/;"	s
_CM5200_H	board/cm5200/cm5200.h	/^#define _CM5200_H$/;"	d
_CMD_COMPLETE	include/command.h	/^# define _CMD_COMPLETE(/;"	d
_CMD_ETHSW_H_	include/ethsw.h	/^#define _CMD_ETHSW_H_$/;"	d
_CMD_HELP	include/command.h	/^# define _CMD_HELP(/;"	d
_CMD_REMOVE	include/command.h	/^#define _CMD_REMOVE(/;"	d
_CM_T54_MUX_DATA_H	board/compulab/cm_t54/mux.c	/^#define _CM_T54_MUX_DATA_H$/;"	d	file:
_COMMON_UTIL_H_	board/mpl/common/common_util.h	/^#define _COMMON_UTIL_H_$/;"	d
_COMPHY_A3700_H_	drivers/phy/marvell/comphy_a3700.h	/^#define _COMPHY_A3700_H_$/;"	d
_COMPHY_DATA_H_	arch/arm/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	arch/microblaze/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	arch/mips/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	arch/nios2/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	arch/sandbox/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	arch/x86/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	arch/xtensa/dts/include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_DATA_H_	include/dt-bindings/comphy/comphy_data.h	/^#define _COMPHY_DATA_H_$/;"	d
_COMPHY_HPIPE_H_	drivers/phy/marvell/comphy_hpipe.h	/^#define _COMPHY_HPIPE_H_$/;"	d
_COMPHY_H_	drivers/phy/marvell/comphy.h	/^#define _COMPHY_H_$/;"	d
_CONFIG_88F5182_H	arch/arm/mach-orion5x/include/mach/mv88f5182.h	/^#define _CONFIG_88F5182_H$/;"	d
_CONFIG_ASTRO_MCF5373L_H	include/configs/astro_mcf5373l.h	/^#define _CONFIG_ASTRO_MCF5373L_H$/;"	d
_CONFIG_AXS10X_H_	include/configs/axs10x.h	/^#define _CONFIG_AXS10X_H_$/;"	d
_CONFIG_CLEARFOG_H	include/configs/clearfog.h	/^#define _CONFIG_CLEARFOG_H$/;"	d
_CONFIG_CMD_ALL_H	include/config_cmd_all.h	/^#define _CONFIG_CMD_ALL_H$/;"	d
_CONFIG_CMD_DISTRO_BOOTCMD_H	include/config_distro_bootcmd.h	/^#define _CONFIG_CMD_DISTRO_BOOTCMD_H$/;"	d
_CONFIG_CMD_DISTRO_DEFAULTS_H	include/config_distro_defaults.h	/^#define _CONFIG_CMD_DISTRO_DEFAULTS_H$/;"	d
_CONFIG_COBRA5272_H	include/configs/cobra5272.h	/^#define _CONFIG_COBRA5272_H$/;"	d
_CONFIG_DB_88F6720_H	include/configs/db-88f6720.h	/^#define _CONFIG_DB_88F6720_H$/;"	d
_CONFIG_DB_88F6820_AMC_H	include/configs/db-88f6820-amc.h	/^#define _CONFIG_DB_88F6820_AMC_H$/;"	d
_CONFIG_DB_88F6820_GP_H	include/configs/db-88f6820-gp.h	/^#define _CONFIG_DB_88F6820_GP_H$/;"	d
_CONFIG_DB_MV7846MP_GP_H	include/configs/db-mv784mp-gp.h	/^#define _CONFIG_DB_MV7846MP_GP_H$/;"	d
_CONFIG_DB_MV7846MP_GP_H	include/configs/maxbcm.h	/^#define _CONFIG_DB_MV7846MP_GP_H$/;"	d
_CONFIG_DEFAULTS_H_	include/config_defaults.h	/^#define _CONFIG_DEFAULTS_H_$/;"	d
_CONFIG_DNS325_H	include/configs/dns325.h	/^#define _CONFIG_DNS325_H$/;"	d
_CONFIG_DOCKSTAR_H	include/configs/dockstar.h	/^#define _CONFIG_DOCKSTAR_H$/;"	d
_CONFIG_DREAMPLUG_H	include/configs/dreamplug.h	/^#define _CONFIG_DREAMPLUG_H$/;"	d
_CONFIG_DS109_H	include/configs/ds109.h	/^#define _CONFIG_DS109_H$/;"	d
_CONFIG_EB_CPU5282_H_	include/configs/eb_cpu5282.h	/^#define _CONFIG_EB_CPU5282_H_$/;"	d
_CONFIG_EDMINIV2_H	include/configs/edminiv2.h	/^#define _CONFIG_EDMINIV2_H$/;"	d
_CONFIG_GOFLEXHOME_H	include/configs/goflexhome.h	/^#define _CONFIG_GOFLEXHOME_H$/;"	d
_CONFIG_GURUPLUG_H	include/configs/guruplug.h	/^#define _CONFIG_GURUPLUG_H$/;"	d
_CONFIG_IB62x0_H	include/configs/ib62x0.h	/^#define _CONFIG_IB62x0_H$/;"	d
_CONFIG_ICONNECT_H	include/configs/iconnect.h	/^#define _CONFIG_ICONNECT_H$/;"	d
_CONFIG_KMP204X_H	include/configs/km/kmp204x-common.h	/^#define _CONFIG_KMP204X_H$/;"	d
_CONFIG_KM_ARM_H	include/configs/km/km_arm.h	/^#define _CONFIG_KM_ARM_H$/;"	d
_CONFIG_KM_KIRKWOOD_H	include/configs/km_kirkwood.h	/^#define _CONFIG_KM_KIRKWOOD_H$/;"	d
_CONFIG_KW88F6192_H	arch/arm/mach-kirkwood/include/mach/kw88f6192.h	/^#define _CONFIG_KW88F6192_H$/;"	d
_CONFIG_LACIE_KW_H	include/configs/lacie_kw.h	/^#define _CONFIG_LACIE_KW_H$/;"	d
_CONFIG_LSXL_H	include/configs/lsxl.h	/^#define _CONFIG_LSXL_H$/;"	d
_CONFIG_M5282EVB_H	include/configs/M5282EVB.h	/^#define _CONFIG_M5282EVB_H$/;"	d
_CONFIG_MARVELL_PLUG_H	include/configs/mv-plug-common.h	/^#define _CONFIG_MARVELL_PLUG_H$/;"	d
_CONFIG_MVEBU_DB_88F3720_H	include/configs/mvebu_db-88f3720.h	/^#define _CONFIG_MVEBU_DB_88F3720_H$/;"	d
_CONFIG_MVEBU_DB_88F7040_H	include/configs/mvebu_db-88f7040.h	/^#define _CONFIG_MVEBU_DB_88F7040_H$/;"	d
_CONFIG_NAS220_H	include/configs/nas220.h	/^#define _CONFIG_NAS220_H$/;"	d
_CONFIG_NSA310S_H	include/configs/nsa310s.h	/^#define _CONFIG_NSA310S_H$/;"	d
_CONFIG_NSIM_H_	include/configs/nsim.h	/^#define _CONFIG_NSIM_H_$/;"	d
_CONFIG_OPENRD_H	include/configs/openrd.h	/^#define _CONFIG_OPENRD_H$/;"	d
_CONFIG_PHYLIB_ALL_H	include/config_phylib_all_drivers.h	/^#define _CONFIG_PHYLIB_ALL_H$/;"	d
_CONFIG_POGO_E02_H	include/configs/pogo_e02.h	/^#define _CONFIG_POGO_E02_H$/;"	d
_CONFIG_SHEEVAPLUG_H	include/configs/sheevaplug.h	/^#define _CONFIG_SHEEVAPLUG_H$/;"	d
_CONFIG_SYNOLOGY_DS414_H	include/configs/ds414.h	/^#define _CONFIG_SYNOLOGY_DS414_H$/;"	d
_CONFIG_TB100_H_	include/configs/tb100.h	/^#define _CONFIG_TB100_H_$/;"	d
_CONFIG_THEADORABLE_H	include/configs/theadorable.h	/^#define _CONFIG_THEADORABLE_H$/;"	d
_CONST	include/linux/time.h	/^#define _CONST /;"	d
_CONST64_	arch/mips/include/asm/addrspace.h	/^#define _CONST64_(/;"	d
_COREBOOT_SYSINFO_H	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^#define _COREBOOT_SYSINFO_H$/;"	d
_COREBOOT_TABLES_H	arch/x86/include/asm/coreboot_tables.h	/^#define _COREBOOT_TABLES_H$/;"	d
_CORTINA_H_	include/cortina.h	/^#define _CORTINA_H_$/;"	d
_CPLD_H_	board/renesas/stout/cpld.h	/^#define _CPLD_H_$/;"	d
_CPSW_H_	include/cpsw.h	/^#define _CPSW_H_$/;"	d
_CPU_ASM_H	post/lib_powerpc/cpu_asm.h	/^#define _CPU_ASM_H$/;"	d
_CPU_H	arch/arm/include/asm/arch-omap3/cpu.h	/^#define _CPU_H$/;"	d
_CPU_H	arch/arm/include/asm/arch-omap4/cpu.h	/^#define _CPU_H$/;"	d
_CPU_H	arch/arm/include/asm/arch-omap5/cpu.h	/^#define _CPU_H$/;"	d
_CPU_H_	arch/blackfin/cpu/cpu.h	/^#define _CPU_H_$/;"	d
_CPU_H_	arch/m68k/cpu/mcf52x2/cpu.h	/^#define _CPU_H_$/;"	d
_CROS_EC_H	include/cros_ec.h	/^#define _CROS_EC_H$/;"	d
_CROS_MESSAGE_H	include/cros_ec_message.h	/^#define _CROS_MESSAGE_H$/;"	d
_CRT_SECURE_NO_DEPRECATE	lib/sha1.c	/^#define _CRT_SECURE_NO_DEPRECATE /;"	d	file:
_CRYPTO_H_	arch/arm/mach-tegra/tegra20/crypto.h	/^#define _CRYPTO_H_$/;"	d
_CTR	include/ppc_defs.h	/^#define	_CTR	/;"	d
_CTRL_PEX_H	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h	/^#define _CTRL_PEX_H$/;"	d
_CalcConfig	tools/buildman/builder.py	/^        def _CalcConfig(delta, name, config):$/;"	f	member:Builder.PrintResultSummary	file:
_CalcErrorDelta	tools/buildman/builder.py	/^        def _CalcErrorDelta(base_lines, base_line_boards, lines, line_boards,$/;"	f	member:Builder.PrintResultSummary	file:
_ClrDCSR	include/SA-1100.h	/^#define _ClrDCSR(/;"	d
_ClrDCSR0	include/SA-1100.h	/^#define _ClrDCSR0	/;"	d
_ClrDCSR1	include/SA-1100.h	/^#define _ClrDCSR1	/;"	d
_ClrDCSR2	include/SA-1100.h	/^#define _ClrDCSR2	/;"	d
_ClrDCSR3	include/SA-1100.h	/^#define _ClrDCSR3	/;"	d
_ClrDCSR4	include/SA-1100.h	/^#define _ClrDCSR4	/;"	d
_ClrDCSR5	include/SA-1100.h	/^#define _ClrDCSR5	/;"	d
_D	include/linux/ctype.h	/^#define _D	/;"	d
_DAR	include/ppc_defs.h	/^#define	_DAR	/;"	d
_DAVINCI_EMAC_H_	drivers/net/davinci_emac.h	/^#define _DAVINCI_EMAC_H_$/;"	d
_DAVINCI_I2C_H_	drivers/i2c/davinci_i2c.h	/^#define _DAVINCI_I2C_H_$/;"	d
_DAVINCI_NAND_H_	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define _DAVINCI_NAND_H_$/;"	d
_DBAR1	include/SA-1100.h	/^#define _DBAR1	/;"	d
_DBAR2	include/SA-1100.h	/^#define _DBAR2	/;"	d
_DBSA	include/SA-1100.h	/^#define _DBSA(/;"	d
_DBSA0	include/SA-1100.h	/^#define _DBSA0	/;"	d
_DBSA1	include/SA-1100.h	/^#define _DBSA1	/;"	d
_DBSA2	include/SA-1100.h	/^#define _DBSA2	/;"	d
_DBSA3	include/SA-1100.h	/^#define _DBSA3	/;"	d
_DBSA4	include/SA-1100.h	/^#define _DBSA4	/;"	d
_DBSA5	include/SA-1100.h	/^#define _DBSA5	/;"	d
_DBSB	include/SA-1100.h	/^#define _DBSB(/;"	d
_DBSB0	include/SA-1100.h	/^#define _DBSB0	/;"	d
_DBSB1	include/SA-1100.h	/^#define _DBSB1	/;"	d
_DBSB2	include/SA-1100.h	/^#define _DBSB2	/;"	d
_DBSB3	include/SA-1100.h	/^#define _DBSB3	/;"	d
_DBSB4	include/SA-1100.h	/^#define _DBSB4	/;"	d
_DBSB5	include/SA-1100.h	/^#define _DBSB5	/;"	d
_DBTA	include/SA-1100.h	/^#define _DBTA(/;"	d
_DBTA0	include/SA-1100.h	/^#define _DBTA0	/;"	d
_DBTA1	include/SA-1100.h	/^#define _DBTA1	/;"	d
_DBTA2	include/SA-1100.h	/^#define _DBTA2	/;"	d
_DBTA3	include/SA-1100.h	/^#define _DBTA3	/;"	d
_DBTA4	include/SA-1100.h	/^#define _DBTA4	/;"	d
_DBTA5	include/SA-1100.h	/^#define _DBTA5	/;"	d
_DBTB	include/SA-1100.h	/^#define _DBTB(/;"	d
_DBTB0	include/SA-1100.h	/^#define _DBTB0	/;"	d
_DBTB1	include/SA-1100.h	/^#define _DBTB1	/;"	d
_DBTB2	include/SA-1100.h	/^#define _DBTB2	/;"	d
_DBTB3	include/SA-1100.h	/^#define _DBTB3	/;"	d
_DBTB4	include/SA-1100.h	/^#define _DBTB4	/;"	d
_DBTB5	include/SA-1100.h	/^#define _DBTB5	/;"	d
_DCAR1	include/SA-1100.h	/^#define _DCAR1	/;"	d
_DCAR2	include/SA-1100.h	/^#define _DCAR2	/;"	d
_DCGU_H	board/micronas/vct/dcgu.h	/^#define _DCGU_H$/;"	d
_DDAR	include/SA-1100.h	/^#define _DDAR(/;"	d
_DDAR0	include/SA-1100.h	/^#define _DDAR0	/;"	d
_DDAR1	include/SA-1100.h	/^#define _DDAR1	/;"	d
_DDAR2	include/SA-1100.h	/^#define _DDAR2	/;"	d
_DDAR3	include/SA-1100.h	/^#define _DDAR3	/;"	d
_DDAR4	include/SA-1100.h	/^#define _DDAR4	/;"	d
_DDAR5	include/SA-1100.h	/^#define _DDAR5	/;"	d
_DDR0_A0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A0	/;"	d
_DDR0_A1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A1	/;"	d
_DDR0_A10	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A10	/;"	d
_DDR0_A11	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A11	/;"	d
_DDR0_A12	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A12	/;"	d
_DDR0_A13	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A13	/;"	d
_DDR0_A14	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A14	/;"	d
_DDR0_A15	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A15	/;"	d
_DDR0_A2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A2	/;"	d
_DDR0_A3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A3	/;"	d
_DDR0_A4	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A4	/;"	d
_DDR0_A5	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A5	/;"	d
_DDR0_A6	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A6	/;"	d
_DDR0_A7	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A7	/;"	d
_DDR0_A8	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A8	/;"	d
_DDR0_A9	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_A9	/;"	d
_DDR0_BA0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_BA0	/;"	d
_DDR0_BA1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_BA1	/;"	d
_DDR0_BA2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_BA2	/;"	d
_DDR0_CAS	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_CAS	/;"	d
_DDR0_CKE0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_CKE0	/;"	d
_DDR0_CKE1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_CKE1	/;"	d
_DDR0_CLK0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_CLK0	/;"	d
_DDR0_CS_B0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_CS_B0	/;"	d
_DDR0_CS_B1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_CS_B1	/;"	d
_DDR0_D0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D0	/;"	d
_DDR0_D1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D1	/;"	d
_DDR0_D10	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D10	/;"	d
_DDR0_D11	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D11	/;"	d
_DDR0_D12	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D12	/;"	d
_DDR0_D13	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D13	/;"	d
_DDR0_D14	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D14	/;"	d
_DDR0_D15	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D15	/;"	d
_DDR0_D16	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D16	/;"	d
_DDR0_D17	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D17	/;"	d
_DDR0_D18	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D18	/;"	d
_DDR0_D19	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D19	/;"	d
_DDR0_D2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D2	/;"	d
_DDR0_D20	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D20	/;"	d
_DDR0_D21	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D21	/;"	d
_DDR0_D22	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D22	/;"	d
_DDR0_D23	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D23	/;"	d
_DDR0_D24	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D24	/;"	d
_DDR0_D25	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D25	/;"	d
_DDR0_D26	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D26	/;"	d
_DDR0_D27	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D27	/;"	d
_DDR0_D28	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D28	/;"	d
_DDR0_D29	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D29	/;"	d
_DDR0_D3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D3	/;"	d
_DDR0_D30	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D30	/;"	d
_DDR0_D31	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D31	/;"	d
_DDR0_D4	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D4	/;"	d
_DDR0_D5	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D5	/;"	d
_DDR0_D6	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D6	/;"	d
_DDR0_D7	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D7	/;"	d
_DDR0_D8	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D8	/;"	d
_DDR0_D9	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_D9	/;"	d
_DDR0_DM0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DM0	/;"	d
_DDR0_DM1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DM1	/;"	d
_DDR0_DM2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DM2	/;"	d
_DDR0_DM3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DM3	/;"	d
_DDR0_DQS0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DQS0	/;"	d
_DDR0_DQS1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DQS1	/;"	d
_DDR0_DQS2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DQS2	/;"	d
_DDR0_DQS3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_DQS3	/;"	d
_DDR0_ODT0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_ODT0	/;"	d
_DDR0_ODT1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_ODT1	/;"	d
_DDR0_RAS	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_RAS	/;"	d
_DDR0_RESET	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_RESET	/;"	d
_DDR0_WE_B	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_WE_B	/;"	d
_DDR0_ZQ	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR0_ZQ	/;"	d
_DDR1_A0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A0	/;"	d
_DDR1_A1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A1	/;"	d
_DDR1_A10	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A10	/;"	d
_DDR1_A11	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A11	/;"	d
_DDR1_A12	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A12	/;"	d
_DDR1_A13	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A13	/;"	d
_DDR1_A14	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A14	/;"	d
_DDR1_A15	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A15	/;"	d
_DDR1_A2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A2	/;"	d
_DDR1_A3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A3	/;"	d
_DDR1_A4	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A4	/;"	d
_DDR1_A5	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A5	/;"	d
_DDR1_A6	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A6	/;"	d
_DDR1_A7	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A7	/;"	d
_DDR1_A8	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A8	/;"	d
_DDR1_A9	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_A9	/;"	d
_DDR1_BA0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_BA0	/;"	d
_DDR1_BA1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_BA1	/;"	d
_DDR1_BA2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_BA2	/;"	d
_DDR1_CAS	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_CAS	/;"	d
_DDR1_CKE0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_CKE0	/;"	d
_DDR1_CKE1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_CKE1	/;"	d
_DDR1_CLK0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_CLK0	/;"	d
_DDR1_CS_B0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_CS_B0	/;"	d
_DDR1_CS_B1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_CS_B1	/;"	d
_DDR1_D0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D0	/;"	d
_DDR1_D1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D1	/;"	d
_DDR1_D10	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D10	/;"	d
_DDR1_D11	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D11	/;"	d
_DDR1_D12	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D12	/;"	d
_DDR1_D13	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D13	/;"	d
_DDR1_D14	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D14	/;"	d
_DDR1_D15	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D15	/;"	d
_DDR1_D16	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D16	/;"	d
_DDR1_D17	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D17	/;"	d
_DDR1_D18	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D18	/;"	d
_DDR1_D19	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D19	/;"	d
_DDR1_D2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D2	/;"	d
_DDR1_D20	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D20	/;"	d
_DDR1_D21	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D21	/;"	d
_DDR1_D22	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D22	/;"	d
_DDR1_D23	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D23	/;"	d
_DDR1_D24	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D24	/;"	d
_DDR1_D25	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D25	/;"	d
_DDR1_D26	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D26	/;"	d
_DDR1_D27	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D27	/;"	d
_DDR1_D28	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D28	/;"	d
_DDR1_D29	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D29	/;"	d
_DDR1_D3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D3	/;"	d
_DDR1_D30	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D30	/;"	d
_DDR1_D31	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D31	/;"	d
_DDR1_D4	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D4	/;"	d
_DDR1_D5	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D5	/;"	d
_DDR1_D6	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D6	/;"	d
_DDR1_D7	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D7	/;"	d
_DDR1_D8	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D8	/;"	d
_DDR1_D9	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_D9	/;"	d
_DDR1_DM0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DM0	/;"	d
_DDR1_DM1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DM1	/;"	d
_DDR1_DM2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DM2	/;"	d
_DDR1_DM3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DM3	/;"	d
_DDR1_DQS0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DQS0	/;"	d
_DDR1_DQS1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DQS1	/;"	d
_DDR1_DQS2	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DQS2	/;"	d
_DDR1_DQS3	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_DQS3	/;"	d
_DDR1_ODT0	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_ODT0	/;"	d
_DDR1_ODT1	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_ODT1	/;"	d
_DDR1_RAS	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_RAS	/;"	d
_DDR1_RESET	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_RESET	/;"	d
_DDR1_WE_B	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_WE_B	/;"	d
_DDR1_ZQ	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define _DDR1_ZQ	/;"	d
_DDR3_A38X_H	drivers/ddr/marvell/a38x/ddr3_a38x.h	/^#define _DDR3_A38X_H$/;"	d
_DDR3_A38X_MC_STATIC_H	drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h	/^#define _DDR3_A38X_MC_STATIC_H$/;"	d
_DDR3_A38X_TOPOLOGY_H	drivers/ddr/marvell/a38x/ddr3_a38x_topology.h	/^#define _DDR3_A38X_TOPOLOGY_H$/;"	d
_DDR3_HWS_HW_TRAINING_DEF_H	drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h	/^#define _DDR3_HWS_HW_TRAINING_DEF_H$/;"	d
_DDR3_HWS_HW_TRAINING_H	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^#define _DDR3_HWS_HW_TRAINING_H$/;"	d
_DDR3_HWS_SIL_TRAINING_H	drivers/ddr/marvell/a38x/ddr3_hws_sil_training.h	/^#define _DDR3_HWS_SIL_TRAINING_H$/;"	d
_DDR3_H_	arch/arm/mach-keystone/include/mach/ddr3.h	/^#define _DDR3_H_$/;"	d
_DDR3_INIT_H	drivers/ddr/marvell/a38x/ddr3_init.h	/^#define _DDR3_INIT_H$/;"	d
_DDR3_LOGGING_CONFIG_H	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^#define _DDR3_LOGGING_CONFIG_H$/;"	d
_DDR3_TOPOLOGY_DEF_H	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^#define _DDR3_TOPOLOGY_DEF_H$/;"	d
_DDR3_TRAINING_HW_ALGO_H_	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.h	/^#define _DDR3_TRAINING_HW_ALGO_H_$/;"	d
_DDR3_TRAINING_IP_BIST_H_	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^#define _DDR3_TRAINING_IP_BIST_H_$/;"	d
_DDR3_TRAINING_IP_CENTRALIZATION_H	drivers/ddr/marvell/a38x/ddr3_training_ip_centralization.h	/^#define _DDR3_TRAINING_IP_CENTRALIZATION_H$/;"	d
_DDR3_TRAINING_IP_DB_H_	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^#define _DDR3_TRAINING_IP_DB_H_$/;"	d
_DDR3_TRAINING_IP_DEF_H	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^#define _DDR3_TRAINING_IP_DEF_H$/;"	d
_DDR3_TRAINING_IP_ENGINE_H_	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h	/^#define _DDR3_TRAINING_IP_ENGINE_H_$/;"	d
_DDR3_TRAINING_IP_FLOW_H_	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^#define _DDR3_TRAINING_IP_FLOW_H_$/;"	d
_DDR3_TRAINING_IP_H_	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^#define _DDR3_TRAINING_IP_H_$/;"	d
_DDR3_TRAINING_IP_PBS_H_	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^#define _DDR3_TRAINING_IP_PBS_H_$/;"	d
_DDR3_TRAINING_IP_PRV_IF_H	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^#define _DDR3_TRAINING_IP_PRV_IF_H$/;"	d
_DDR3_TRAINING_IP_STATIC_H_	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^#define _DDR3_TRAINING_IP_STATIC_H_$/;"	d
_DDR3_TRAINING_LEVELING_H_	drivers/ddr/marvell/a38x/ddr3_training_leveling.h	/^#define _DDR3_TRAINING_LEVELING_H_$/;"	d
_DDRUQPHY_REGS_H	arch/arm/mach-uniphier/dram/ddruqphy-regs.h	/^#define _DDRUQPHY_REGS_H$/;"	d
_DDR_DEFS_H	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^#define _DDR_DEFS_H$/;"	d
_DDR_SPD_H_	include/ddr_spd.h	/^#define _DDR_SPD_H_$/;"	d
_DDR_TOPOLOGY_DEF_H	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^#define _DDR_TOPOLOGY_DEF_H$/;"	d
_DDR_TRAINING_IP_DB_H_	drivers/ddr/marvell/a38x/ddr_training_ip_db.h	/^#define _DDR_TRAINING_IP_DB_H_$/;"	d
_DEBUG	drivers/video/ct69000.c	/^#define _DEBUG /;"	d	file:
_DEBUG	include/common.h	/^#define _DEBUG	/;"	d
_DEBUG_UART_ANNOUNCE	include/debug_uart.h	/^#define _DEBUG_UART_ANNOUNCE	/;"	d
_DEBUG_UART_ANNOUNCE	include/debug_uart.h	/^#define _DEBUG_UART_ANNOUNCE$/;"	d
_DEBUG_UART_H	include/debug_uart.h	/^#define _DEBUG_UART_H$/;"	d
_DEFUN	include/linux/time.h	/^#define _DEFUN(/;"	d
_DEFUN	include/linux/time.h	/^_DEFUN (localtime_r, (tim_p, res),$/;"	s
_DEVDISR_PCIE1	drivers/pci/fsl_pci_init.c	/^	#define _DEVDISR_PCIE1 /;"	d	file:
_DEVDISR_PCIE2	drivers/pci/fsl_pci_init.c	/^	#define _DEVDISR_PCIE2 /;"	d	file:
_DEVDISR_PCIE3	drivers/pci/fsl_pci_init.c	/^	#define _DEVDISR_PCIE3 /;"	d	file:
_DEVDISR_PCIE4	drivers/pci/fsl_pci_init.c	/^	#define _DEVDISR_PCIE4 /;"	d	file:
_DEVDISR_RMU	arch/powerpc/cpu/mpc8xxx/srio.c	/^	#define _DEVDISR_RMU /;"	d	file:
_DEVDISR_SRIO1	arch/powerpc/cpu/mpc8xxx/srio.c	/^	#define _DEVDISR_SRIO1 /;"	d	file:
_DEVDISR_SRIO2	arch/powerpc/cpu/mpc8xxx/srio.c	/^	#define _DEVDISR_SRIO2 /;"	d	file:
_DEVICE_H_	arch/x86/include/asm/arch-baytrail/device.h	/^#define _DEVICE_H_$/;"	d
_DEVKIT8000_H_	board/timll/devkit8000/devkit8000.h	/^#define _DEVKIT8000_H_$/;"	d
_DEV_SETTING	arch/arm/mach-davinci/lowlevel_init.S	/^_DEV_SETTING:$/;"	l
_DISK_PART_AMIGA_H	disk/part_amiga.h	/^#define _DISK_PART_AMIGA_H$/;"	d
_DISK_PART_DOS_H	disk/part_dos.h	/^#define _DISK_PART_DOS_H$/;"	d
_DISK_PART_EFI_H	include/part_efi.h	/^#define _DISK_PART_EFI_H$/;"	d
_DISK_PART_MAC_H	disk/part_mac.h	/^#define	_DISK_PART_MAC_H$/;"	d
_DISPLAY_H	include/display.h	/^#define _DISPLAY_H$/;"	d
_DIVISOR	arch/blackfin/cpu/initcode.c	/^#define _DIVISOR /;"	d	file:
_DM644X_EMAC_H_	arch/arm/mach-davinci/include/mach/emac_defs.h	/^#define _DM644X_EMAC_H_$/;"	d
_DMA_H_	include/dma.h	/^#define _DMA_H_$/;"	d
_DM_DEVICE_H	include/dm/device.h	/^#define _DM_DEVICE_H$/;"	d
_DM_DEVICE_INTERNAL_H	include/dm/device-internal.h	/^#define _DM_DEVICE_INTERNAL_H$/;"	d
_DM_H_	include/dm.h	/^#define _DM_H_$/;"	d
_DM_LISTS_H_	include/dm/lists.h	/^#define _DM_LISTS_H_$/;"	d
_DM_PLATDATA_H	include/dm/platdata.h	/^#define _DM_PLATDATA_H$/;"	d
_DM_ROOT_H_	include/dm/root.h	/^#define _DM_ROOT_H_$/;"	d
_DM_UCLASS_H	include/dm/uclass.h	/^#define _DM_UCLASS_H$/;"	d
_DM_UCLASS_ID_H	include/dm/uclass-id.h	/^#define _DM_UCLASS_ID_H$/;"	d
_DM_UCLASS_INTERNAL_H	include/dm/uclass-internal.h	/^#define _DM_UCLASS_INTERNAL_H$/;"	d
_DP501_H_	board/gdsys/common/dp501.h	/^#define _DP501_H_$/;"	d
_DP_INFO_H	arch/arm/mach-exynos/include/mach/dp_info.h	/^#define _DP_INFO_H$/;"	d
_DRA7_IODELAY_H_	arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h	/^#define _DRA7_IODELAY_H_$/;"	d
_DRAMBnk	include/SA-1100.h	/^#define _DRAMBnk(/;"	d
_DRAMBnk0	include/SA-1100.h	/^#define _DRAMBnk0	/;"	d
_DRAMBnk1	include/SA-1100.h	/^#define _DRAMBnk1	/;"	d
_DRAMBnk2	include/SA-1100.h	/^#define _DRAMBnk2	/;"	d
_DRAMBnk3	include/SA-1100.h	/^#define _DRAMBnk3	/;"	d
_DRM_DP_HELPER_H_	include/linux/drm_dp_helper.h	/^#define _DRM_DP_HELPER_H_$/;"	d
_DS1722_H_	include/ds1722.h	/^#define _DS1722_H_$/;"	d
_DSIM_H	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^#define _DSIM_H$/;"	d
_DSISR	include/ppc_defs.h	/^#define	_DSISR	/;"	d
_DTT_H_	include/dtt.h	/^#define _DTT_H_$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/arm/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/microblaze/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/mips/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/nios2/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/sandbox/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/x86/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	arch/xtensa/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H	include/dt-bindings/reset/amlogic,meson-gxbb-reset.h	/^#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/arm/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/microblaze/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/mips/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/nios2/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/sandbox/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/x86/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	arch/xtensa/dts/include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_AT91_H	include/dt-bindings/clock/at91.h	/^#define _DT_BINDINGS_CLK_AT91_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/arm/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/microblaze/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/mips/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/nios2/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/sandbox/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/x86/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	arch/xtensa/dts/include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3036_H	include/dt-bindings/clock/rk3036-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3036_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/arm/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/microblaze/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/mips/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/nios2/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/sandbox/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/x86/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	arch/xtensa/dts/include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_ROCKCHIP_RK3399_H	include/dt-bindings/clock/rk3399-cru.h	/^#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/arm/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/microblaze/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/mips/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/nios2/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/sandbox/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/x86/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	arch/xtensa/dts/include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLK_SUN8I_H3_H_	include/dt-bindings/clock/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_CLK_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/arm/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/microblaze/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/mips/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/nios2/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/sandbox/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/x86/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	arch/xtensa/dts/include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_EXYNOS7_H	include/dt-bindings/clock/exynos7420-clk.h	/^#define _DT_BINDINGS_CLOCK_EXYNOS7_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/arm/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/microblaze/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/mips/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/nios2/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/sandbox/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/x86/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	arch/xtensa/dts/include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H	include/dt-bindings/clock/maxim,max77802.h	/^#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/arm/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/microblaze/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/mips/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/nios2/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/sandbox/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/x86/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	arch/xtensa/dts/include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA114_CAR_H	include/dt-bindings/clock/tegra114-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/arm/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/mips/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/nios2/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/x86/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H	include/dt-bindings/clock/tegra124-car-common.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/arm/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/microblaze/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/mips/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/nios2/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/sandbox/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/x86/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	arch/xtensa/dts/include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA124_CAR_H	include/dt-bindings/clock/tegra124-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/arm/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/microblaze/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/mips/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/nios2/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/sandbox/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/x86/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	arch/xtensa/dts/include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA20_CAR_H	include/dt-bindings/clock/tegra20-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/arm/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/microblaze/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/mips/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/nios2/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/sandbox/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/x86/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	arch/xtensa/dts/include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA210_CAR_H	include/dt-bindings/clock/tegra210-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/arm/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/microblaze/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/mips/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/nios2/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/sandbox/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/x86/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	arch/xtensa/dts/include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_CLOCK_TEGRA30_CAR_H	include/dt-bindings/clock/tegra30-car.h	/^#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/arm/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/microblaze/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/mips/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/nios2/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/sandbox/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/x86/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	arch/xtensa/dts/include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_GPIO_H	include/dt-bindings/gpio/gpio.h	/^#define _DT_BINDINGS_GPIO_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/arm/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/microblaze/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/mips/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/nios2/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/sandbox/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/x86/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	arch/xtensa/dts/include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA186_GPIO_H	include/dt-bindings/gpio/tegra186-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/arm/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/microblaze/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/mips/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/nios2/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/sandbox/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/x86/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	arch/xtensa/dts/include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_TEGRA_GPIO_H	include/dt-bindings/gpio/tegra-gpio.h	/^#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/arm/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/microblaze/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/mips/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/nios2/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/sandbox/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/x86/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	arch/xtensa/dts/include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_GPIO_X86_GPIO_H	include/dt-bindings/gpio/x86-gpio.h	/^#define _DT_BINDINGS_GPIO_X86_GPIO_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/arm/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/microblaze/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/mips/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/nios2/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/sandbox/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/x86/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	arch/xtensa/dts/include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INPUT_INPUT_H	include/dt-bindings/input/input.h	/^#define _DT_BINDINGS_INPUT_INPUT_H$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/arm/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/microblaze/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/mips/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/nios2/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/sandbox/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/x86/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	arch/xtensa/dts/include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTEL_IRQ_H_	include/dt-bindings/interrupt-router/intel-irq.h	/^#define _DT_BINDINGS_INTEL_IRQ_H_$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/arm/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/microblaze/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/mips/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/nios2/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/sandbox/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/x86/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	arch/xtensa/dts/include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H	include/dt-bindings/interrupt-controller/arm-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/microblaze/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/mips/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/nios2/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/sandbox/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/x86/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	arch/xtensa/dts/include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H	include/dt-bindings/interrupt-controller/irq.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/arm/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/microblaze/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/mips/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/nios2/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/sandbox/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/x86/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	arch/xtensa/dts/include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H	include/dt-bindings/interrupt-controller/mips-gic.h	/^#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/arm/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/microblaze/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/mips/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/nios2/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/sandbox/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/x86/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	arch/xtensa/dts/include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MAILBOX_TEGRA186_HSP_H	include/dt-bindings/mailbox/tegra186-hsp.h	/^#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/arm/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/microblaze/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/mips/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/nios2/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/sandbox/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/x86/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	arch/xtensa/dts/include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_MESON_GXBB_GPIO_H	include/dt-bindings/gpio/meson-gxbb-gpio.h	/^#define _DT_BINDINGS_MESON_GXBB_GPIO_H$/;"	d
_DT_BINDINGS_PHY	arch/arm/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	arch/microblaze/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	arch/mips/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	arch/nios2/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	arch/sandbox/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	arch/x86/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	arch/xtensa/dts/include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PHY	include/dt-bindings/phy/phy.h	/^#define _DT_BINDINGS_PHY$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/microblaze/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/mips/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/nios2/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/sandbox/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/x86/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	arch/xtensa/dts/include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM33XX_H	include/dt-bindings/pinctrl/am33xx.h	/^#define _DT_BINDINGS_PINCTRL_AM33XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/arm/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/microblaze/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/mips/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/nios2/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/sandbox/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/x86/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	arch/xtensa/dts/include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_AM43XX_H	include/dt-bindings/pinctrl/am43xx.h	/^#define _DT_BINDINGS_PINCTRL_AM43XX_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/arm/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/microblaze/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/mips/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/nios2/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/sandbox/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/x86/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	arch/xtensa/dts/include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_DRA_H	include/dt-bindings/pinctrl/dra.h	/^#define _DT_BINDINGS_PINCTRL_DRA_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/arm/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/microblaze/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/mips/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/nios2/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/sandbox/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/x86/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	arch/xtensa/dts/include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_OMAP_H	include/dt-bindings/pinctrl/omap.h	/^#define _DT_BINDINGS_PINCTRL_OMAP_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_H	include/dt-bindings/pinctrl/pinctrl-tegra.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_H$/;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/arm/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/microblaze/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/mips/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/nios2/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/sandbox/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/x86/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	arch/xtensa/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_PINCTRL_TEGRA_XUSB_H	include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h	/^#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H /;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/arm/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/microblaze/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/mips/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/nios2/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/sandbox/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/x86/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	arch/xtensa/dts/include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_POWER_TEGRA186_POWERGATE_H	include/dt-bindings/power/tegra186-powergate.h	/^#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/arm/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/microblaze/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/mips/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/nios2/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/sandbox/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/x86/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	arch/xtensa/dts/include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_PWM_PWM_H	include/dt-bindings/pwm/pwm.h	/^#define _DT_BINDINGS_PWM_PWM_H$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/arm/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/microblaze/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/mips/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/nios2/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/sandbox/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/x86/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	arch/xtensa/dts/include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_QRK_MRC_H_	include/dt-bindings/mrc/quark.h	/^#define _DT_BINDINGS_QRK_MRC_H_$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/arm/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/microblaze/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/mips/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/nios2/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/sandbox/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/x86/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	arch/xtensa/dts/include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H	include/dt-bindings/regulator/maxim,max77802.h	/^#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/arm/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/microblaze/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/mips/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/nios2/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/sandbox/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/x86/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	arch/xtensa/dts/include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_ALTR_RST_MGR_H	include/dt-bindings/reset/altr,rst-mgr.h	/^#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/arm/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/microblaze/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/mips/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/nios2/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/sandbox/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/x86/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	arch/xtensa/dts/include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RESET_TEGRA124_CAR_H	include/dt-bindings/reset/tegra124-car.h	/^#define _DT_BINDINGS_RESET_TEGRA124_CAR_H$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/arm/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/microblaze/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/mips/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/nios2/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/sandbox/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/x86/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	arch/xtensa/dts/include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_RST_SUN8I_H3_H_	include/dt-bindings/reset/sun8i-h3-ccu.h	/^#define _DT_BINDINGS_RST_SUN8I_H3_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/arm/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/microblaze/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/mips/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/nios2/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/x86/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	arch/xtensa/dts/include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_SANDBOX_PMIC_H_	include/dt-bindings/pmic/sandbox_pmic.h	/^#define _DT_BINDINGS_SANDBOX_PMIC_H_$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/arm/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/microblaze/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/mips/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/nios2/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/sandbox/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/x86/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	arch/xtensa/dts/include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H	include/dt-bindings/thermal/tegra124-soctherm.h	/^#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/arm/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/microblaze/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/mips/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/nios2/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/sandbox/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/x86/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	arch/xtensa/dts/include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_THERMAL_THERMAL_H	include/dt-bindings/thermal/thermal.h	/^#define _DT_BINDINGS_THERMAL_THERMAL_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/arm/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/microblaze/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/mips/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/nios2/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/sandbox/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/x86/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	arch/xtensa/dts/include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DT_BINDINGS_TI_DP83867_H	include/dt-bindings/net/ti-dp83867.h	/^#define _DT_BINDINGS_TI_DP83867_H$/;"	d
_DUMPIMAGE_H_	tools/dumpimage.h	/^#define _DUMPIMAGE_H_$/;"	d
_DUOVERO_MUX_DATA_H_	board/gumstix/duovero/duovero_mux_data.h	/^#define _DUOVERO_MUX_DATA_H_$/;"	d
_DV_AINTC_DEFS_H_	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^#define _DV_AINTC_DEFS_H_$/;"	d
_DV_DDR2_DEFS_H_	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define _DV_DDR2_DEFS_H_$/;"	d
_DV_PLL_DEFS_H_	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define _DV_PLL_DEFS_H_$/;"	d
_DV_PSC_DEFS_H_	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define _DV_PSC_DEFS_H_$/;"	d
_DV_SYSCFG_DEFS_H_	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define _DV_SYSCFG_DEFS_H_$/;"	d
_DW_ETH_H	drivers/net/designware.h	/^#define _DW_ETH_H$/;"	d
_DataFlash_h	include/dataflash.h	/^#define _DataFlash_h$/;"	d
_DescStatusBit	drivers/net/rtl8169.c	/^enum _DescStatusBit {$/;"	g	file:
_DoubleExceptionVector	arch/xtensa/cpu/start.S	/^_DoubleExceptionVector:$/;"	l
_E1000_HW_H_	drivers/net/e1000.h	/^#define _E1000_HW_H_$/;"	d
_E2220_1170_H	include/configs/e2220-1170.h	/^#define _E2220_1170_H$/;"	d
_EASYLOGO_H_	include/video_easylogo.h	/^#define _EASYLOGO_H_$/;"	d
_ECC_H_	arch/powerpc/cpu/ppc4xx/ecc.h	/^#define _ECC_H_$/;"	d
_ECO5PK_H__	board/8dtech/eco5pk/eco5pk.h	/^#define _ECO5PK_H__$/;"	d
_EDH_BCOUNT	drivers/net/pic32_eth.h	/^#define _EDH_BCOUNT	/;"	d
_EDMA3_H_	arch/arm/include/asm/ti-common/ti-edma3.h	/^#define _EDMA3_H_$/;"	d
_EEPROM_	board/compulab/common/eeprom.h	/^#define _EEPROM_$/;"	d
_EFER_FFXSR	arch/x86/include/asm/msr-index.h	/^#define _EFER_FFXSR	/;"	d
_EFER_LMA	arch/x86/include/asm/msr-index.h	/^#define _EFER_LMA	/;"	d
_EFER_LME	arch/x86/include/asm/msr-index.h	/^#define _EFER_LME	/;"	d
_EFER_LMSLE	arch/x86/include/asm/msr-index.h	/^#define _EFER_LMSLE	/;"	d
_EFER_NX	arch/x86/include/asm/msr-index.h	/^#define _EFER_NX	/;"	d
_EFER_SCE	arch/x86/include/asm/msr-index.h	/^#define _EFER_SCE	/;"	d
_EFER_SVME	arch/x86/include/asm/msr-index.h	/^#define _EFER_SVME	/;"	d
_EFI_API_H	include/efi_api.h	/^#define _EFI_API_H$/;"	d
_EFI_H	include/efi.h	/^#define _EFI_H$/;"	d
_EHCI_CI_H	include/usb/ehci-ci.h	/^#define _EHCI_CI_H$/;"	d
_EHCI_H	arch/arm/include/asm/arch-omap5/ehci.h	/^#define _EHCI_H$/;"	d
_ELF_H	include/elf.h	/^#define _ELF_H$/;"	d
_EMIF_H_	arch/arm/include/asm/arch-omap3/emif4.h	/^#define _EMIF_H_$/;"	d
_EMIF_H_	arch/arm/include/asm/emif.h	/^#define _EMIF_H_$/;"	d
_ENTRY	lib/hashtable.c	/^typedef struct _ENTRY {$/;"	s	file:
_ENTRY	lib/hashtable.c	/^} _ENTRY;$/;"	t	typeref:struct:_ENTRY	file:
_ENVIRONMENT_H_	include/environment.h	/^#define _ENVIRONMENT_H_$/;"	d
_EP93XX_ETH_H	drivers/net/ep93xx_eth.h	/^#define _EP93XX_ETH_H$/;"	d
_ERRNO_H	include/errno.h	/^#define _ERRNO_H$/;"	d
_ETHOC_H	include/dm/platform_data/net_ethoc.h	/^#define _ETHOC_H$/;"	d
_EVM5430_MUX_DATA_H	board/ti/omap5_uevm/mux_data.h	/^#define _EVM5430_MUX_DATA_H$/;"	d
_EVM_H	board/ti/ti814x/evm.h	/^#define _EVM_H$/;"	d
_EVM_H_	board/quipos/cairo/cairo.h	/^#define _EVM_H_$/;"	d
_EVM_H_	board/ti/evm/evm.h	/^#define _EVM_H_$/;"	d
_EXT2_HAVE_ASM_BITOPS_	arch/powerpc/include/asm/bitops.h	/^#define _EXT2_HAVE_ASM_BITOPS_$/;"	d
_EXYNOS4_CPU_H	arch/arm/mach-exynos/include/mach/cpu.h	/^#define _EXYNOS4_CPU_H$/;"	d
_EXYNOS5_DT_H_	include/samsung/exynos5-dt-types.h	/^#define _EXYNOS5_DT_H_$/;"	d
_EXYNOS_BOARD_H	arch/arm/mach-exynos/include/mach/board.h	/^#define _EXYNOS_BOARD_H$/;"	d
_EXYNOS_EDP_LOWLEVEL_H	drivers/video/exynos/exynos_dp_lowlevel.h	/^#define _EXYNOS_EDP_LOWLEVEL_H$/;"	d
_EXYNOS_LCD_H_	include/exynos_lcd.h	/^#define _EXYNOS_LCD_H_$/;"	d
_EXYNOS_MIPI_DSI_COMMON_H	drivers/video/exynos/exynos_mipi_dsi_common.h	/^#define _EXYNOS_MIPI_DSI_COMMON_H$/;"	d
_EXYNOS_MIPI_DSI_LOWLEVEL_H	drivers/video/exynos/exynos_mipi_dsi_lowlevel.h	/^#define _EXYNOS_MIPI_DSI_LOWLEVEL_H$/;"	d
_FANCTRL_H_	board/gdsys/common/fanctrl.h	/^#define _FANCTRL_H_$/;"	d
_FASTBOOT_H_	include/fastboot.h	/^#define _FASTBOOT_H_$/;"	d
_FAT_H_	include/fat.h	/^#define _FAT_H_$/;"	d
_FAULT	arch/m68k/cpu/mcf5227x/start.S	/^#define _FAULT	/;"	d	file:
_FAULT	arch/m68k/cpu/mcf523x/start.S	/^#define _FAULT	/;"	d	file:
_FAULT	arch/m68k/cpu/mcf52x2/start.S	/^#define _FAULT	/;"	d	file:
_FAULT	arch/m68k/cpu/mcf530x/start.S	/^#define _FAULT	/;"	d	file:
_FAULT	arch/m68k/cpu/mcf532x/start.S	/^#define _FAULT	/;"	d	file:
_FAULT	arch/m68k/cpu/mcf5445x/start.S	/^#define _FAULT	/;"	d	file:
_FAULT	arch/m68k/cpu/mcf547x_8x/start.S	/^#define _FAULT	/;"	d	file:
_FDT_H	include/fdt.h	/^#define _FDT_H$/;"	d
_FDT_SIMPLEFB_H_	include/fdt_simplefb.h	/^#define _FDT_SIMPLEFB_H_$/;"	d
_FEC_H_	arch/powerpc/cpu/mpc8xx/fec.h	/^#define	_FEC_H_$/;"	d
_FIELD_	include/eeprom_field.h	/^#define _FIELD_$/;"	d
_FIT_COMMON_H_	tools/fit_common.h	/^#define _FIT_COMMON_H_$/;"	d
_FIXUP_TABLE_	arch/m68k/cpu/u-boot.lds	/^		_FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc512x/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc8260/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^		_FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^		_FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	board/amcc/canyonlands/u-boot-ram.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	board/amcc/sequoia/u-boot-ram.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FIXUP_TABLE_	board/tqc/tqm8xx/u-boot.lds	/^    _FIXUP_TABLE_ = .;$/;"	s	section:.reloc
_FLASH_H_	include/flash.h	/^#define _FLASH_H_$/;"	d
_FLOW_H_	arch/arm/include/asm/arch-tegra20/flow.h	/^#define _FLOW_H_$/;"	d
_FOTG210_H	include/usb/fotg210.h	/^#define _FOTG210_H$/;"	d
_FPGA_H_	include/fpga.h	/^#define _FPGA_H_$/;"	d
_FPGA_MANAGER_H_	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^#define	_FPGA_MANAGER_H_$/;"	d
_FREEZE_CONTROLLER_H_	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^#define	_FREEZE_CONTROLLER_H_$/;"	d
_FSL_DPIO_H	include/fsl-mc/fsl_dpio.h	/^#define _FSL_DPIO_H$/;"	d
_FSL_DPNI_H	include/fsl-mc/fsl_dpni.h	/^#define _FSL_DPNI_H$/;"	d
_FSL_DPRC_H	include/fsl-mc/fsl_dprc.h	/^#define _FSL_DPRC_H$/;"	d
_FSL_DSPI_H_	include/fsl_dspi.h	/^#define _FSL_DSPI_H_$/;"	d
_FSL_ERRATA_H	include/fsl_errata.h	/^#define _FSL_ERRATA_H$/;"	d
_FSL_FDT_H_	arch/powerpc/include/asm/fsl_fdt.h	/^#define _FSL_FDT_H_$/;"	d
_FSL_LAW_H_	arch/powerpc/include/asm/fsl_law.h	/^#define _FSL_LAW_H_$/;"	d
_FSL_LAYERSCAPE_CPU_H	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^#define _FSL_LAYERSCAPE_CPU_H$/;"	d
_FSL_LAYERSCAPE_MP_H	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define _FSL_LAYERSCAPE_MP_H$/;"	d
_FSL_LAYERSCAPE_SPEED_H	arch/arm/include/asm/arch-fsl-layerscape/speed.h	/^#define _FSL_LAYERSCAPE_SPEED_H$/;"	d
_FSL_LIODN_H_	arch/powerpc/include/asm/fsl_liodn.h	/^#define _FSL_LIODN_H_$/;"	d
_FSL_MC_PRIVATE_H_	include/fsl-mc/fsl_mc_private.h	/^#define _FSL_MC_PRIVATE_H_$/;"	d
_FSL_MC_SYS_H	include/fsl-mc/fsl_mc_sys.h	/^#define _FSL_MC_SYS_H$/;"	d
_FSL_PORTALS_H_	arch/powerpc/include/asm/fsl_portals.h	/^#define _FSL_PORTALS_H_$/;"	d
_FSL_QBMAN_BASE_H	include/fsl-mc/fsl_qbman_base.h	/^#define _FSL_QBMAN_BASE_H$/;"	d
_FSL_QBMAN_PORTAL_H	include/fsl-mc/fsl_qbman_portal.h	/^#define _FSL_QBMAN_PORTAL_H$/;"	d
_FSL_QSPI_H_	drivers/spi/fsl_qspi.h	/^#define _FSL_QSPI_H_$/;"	d
_FSL_SECBOOT_ERR_H	include/fsl_secboot_err.h	/^#define _FSL_SECBOOT_ERR_H$/;"	d
_FSL_SFP_SNVS_	include/fsl_sfp.h	/^#define _FSL_SFP_SNVS_$/;"	d
_FSL_SRIO_H_	arch/powerpc/include/asm/fsl_srio.h	/^#define _FSL_SRIO_H_$/;"	d
_FSL_VALIDATE_H_	include/fsl_validate.h	/^#define _FSL_VALIDATE_H_$/;"	d
_FSP_AZALIA_H_	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^#define _FSP_AZALIA_H_$/;"	d
_FSP_HEADER_H_	arch/x86/include/asm/fsp/fsp_infoheader.h	/^#define _FSP_HEADER_H_$/;"	d
_FS_H	include/fs.h	/^#define _FS_H$/;"	d
_FTMAC110_H	drivers/net/ftmac110.h	/^#define _FTMAC110_H$/;"	d
_FUSBH200_H	include/usb/fusbh200.h	/^#define _FUSBH200_H$/;"	d
_FUSE_H_	arch/arm/include/asm/arch-tegra/fuse.h	/^#define _FUSE_H_$/;"	d
_FUSE_H_	include/fuse.h	/^#define _FUSE_H_$/;"	d
_Feed	tools/buildman/kconfiglib.py	/^class _Feed(object):$/;"	c
_FileFeed	tools/buildman/kconfiglib.py	/^class _FileFeed(object):$/;"	c
_FinaliseForTest	tools/patman/tools.py	/^def _FinaliseForTest():$/;"	f
_FindNode	tools/dtoc/fdt.py	/^    def _FindNode(self, name):$/;"	m	class:NodeBase
_GAFR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GAFR(/;"	d
_GAFR	include/SA-1100.h	/^#define _GAFR	/;"	d
_GEDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GEDR(/;"	d
_GEDR	include/SA-1100.h	/^#define _GEDR	/;"	d
_GENERICTIMER_H_	arch/arm/include/asm/arch-armv7/generictimer.h	/^#define _GENERICTIMER_H_$/;"	d
_GENERIC_UNALIGNED_H	include/asm-generic/unaligned.h	/^#define _GENERIC_UNALIGNED_H$/;"	d
_GFER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GFER(/;"	d
_GFER	include/SA-1100.h	/^#define _GFER	/;"	d
_GLOBAL	arch/m68k/include/asm/processor.h	/^#define _GLOBAL(/;"	d
_GLOBAL	arch/powerpc/include/asm/processor.h	/^#define _GLOBAL(/;"	d
_GLOBALTIMER_H_	arch/arm/include/asm/arch-armv7/globaltimer.h	/^#define _GLOBALTIMER_H_$/;"	d
_GLOBAL_NVS_H_	arch/x86/include/asm/arch-baytrail/global_nvs.h	/^#define _GLOBAL_NVS_H_$/;"	d
_GLOBAL_NVS_H_	arch/x86/include/asm/arch-quark/global_nvs.h	/^#define _GLOBAL_NVS_H_$/;"	d
_GNU_SOURCE	scripts/docproc.c	/^#define _GNU_SOURCE$/;"	d	file:
_GNU_SOURCE	scripts/kconfig/nconf.c	/^#define _GNU_SOURCE$/;"	d	file:
_GNU_SOURCE	tools/env/fw_env.c	/^#define _GNU_SOURCE$/;"	d	file:
_GOT2_TABLE_	arch/m68k/cpu/u-boot.lds	/^		_GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc512x/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc8260/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc83xx/u-boot-spl.lds	/^		_GOT2_TABLE_ = .;$/;"	s	section:.data
_GOT2_TABLE_	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^		_GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^		_GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	board/amcc/canyonlands/u-boot-ram.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	board/amcc/sequoia/u-boot-ram.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GOT2_TABLE_	board/tqc/tqm8xx/u-boot.lds	/^    _GOT2_TABLE_ = .;$/;"	s	section:.reloc
_GPCR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GPCR(/;"	d
_GPCR	include/SA-1100.h	/^#define _GPCR	/;"	d
_GPDR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GPDR(/;"	d
_GPDR	include/SA-1100.h	/^#define _GPDR	/;"	d
_GPIMAGE_H_	tools/gpheader.h	/^#define _GPIMAGE_H_$/;"	d
_GPIO_AM33xx_H	arch/arm/include/asm/arch-am33xx/gpio.h	/^#define _GPIO_AM33xx_H$/;"	d
_GPIO_DEFS_H_	arch/arm/mach-davinci/include/mach/gpio.h	/^#define _GPIO_DEFS_H_$/;"	d
_GPIO_H	arch/arm/include/asm/omap_gpio.h	/^#define _GPIO_H$/;"	d
_GPIO_OMAP3_H	arch/arm/include/asm/arch-omap3/gpio.h	/^#define _GPIO_OMAP3_H$/;"	d
_GPIO_OMAP4_H	arch/arm/include/asm/arch-omap4/gpio.h	/^#define _GPIO_OMAP4_H$/;"	d
_GPIO_OMAP5_H	arch/arm/include/asm/arch-omap5/gpio.h	/^#define _GPIO_OMAP5_H$/;"	d
_GPIO_PORT	include/sh_pfc.h	/^#define _GPIO_PORT(/;"	d
_GPIO_S0_DED_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define _GPIO_S0_DED_IRQ(/;"	d
_GPIO_S5_DED_IRQ	arch/x86/include/asm/arch-baytrail/irq.h	/^#define _GPIO_S5_DED_IRQ(/;"	d
_GPLR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GPLR(/;"	d
_GPLR	include/SA-1100.h	/^#define _GPLR	/;"	d
_GPSR	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GPSR(/;"	d
_GPSR	include/SA-1100.h	/^#define _GPSR	/;"	d
_GP_DATA	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define _GP_DATA(/;"	d
_GP_DATA	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define _GP_DATA(/;"	d	file:
_GP_DATA	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define _GP_DATA(/;"	d	file:
_GP_DATA	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define _GP_DATA(/;"	d	file:
_GP_GPIO	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define _GP_GPIO(/;"	d
_GP_GPIO	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define _GP_GPIO(/;"	d	file:
_GP_GPIO	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define _GP_GPIO(/;"	d	file:
_GP_GPIO	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define _GP_GPIO(/;"	d	file:
_GP_INDT	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define _GP_INDT(/;"	d
_GP_INDT	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define _GP_INDT(/;"	d	file:
_GP_INDT	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define _GP_INDT(/;"	d	file:
_GP_INDT	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define _GP_INDT(/;"	d	file:
_GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define _GP_INOUTSEL(/;"	d
_GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7793.c	/^#define _GP_INOUTSEL(/;"	d	file:
_GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7794.c	/^#define _GP_INOUTSEL(/;"	d	file:
_GP_INOUTSEL	arch/arm/mach-rmobile/pfc-r8a7795.c	/^#define _GP_INOUTSEL(/;"	d	file:
_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra/apb_misc.h	/^#define _GP_PADCTRL_H_$/;"	d
_GRER	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _GRER(/;"	d
_GRER	include/SA-1100.h	/^#define _GRER	/;"	d
_GWVENTANA_COMMON_H_	board/gateworks/gw_ventana/common.h	/^#define _GWVENTANA_COMMON_H_$/;"	d
_GXBB_GPIO_OFF	arch/arm/include/asm/arch-meson/gxbb.h	/^#define _GXBB_GPIO_OFF(/;"	d
_GetOutputDir	tools/buildman/builder.py	/^    def _GetOutputDir(self, commit_upto):$/;"	m	class:Builder
_HASH_H	include/hash.h	/^#define _HASH_H$/;"	d
_HI6220_GPIO_H_	arch/arm/include/asm/arch-hi6220/gpio.h	/^#define _HI6220_GPIO_H_$/;"	d
_HIGH_SPEED_ENV_SPEC_H	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^#define _HIGH_SPEED_ENV_SPEC_H$/;"	d
_HRCW_TABLE_ENTRY	arch/powerpc/cpu/mpc8260/start.S	/^#define _HRCW_TABLE_ENTRY(/;"	d	file:
_HRCW_TABLE_ENTRY	arch/powerpc/cpu/mpc83xx/start.S	/^#define _HRCW_TABLE_ENTRY(/;"	d	file:
_HTE_H_	arch/x86/cpu/quark/hte.h	/^#define _HTE_H_$/;"	d
_HWCONFIG_H	include/hwconfig.h	/^#define _HWCONFIG_H$/;"	d
_HandleCommand	tools/buildman/func_test.py	/^    def _HandleCommand(self, **kwargs):$/;"	m	class:TestFunctional
_HandleCommandGit	tools/buildman/func_test.py	/^    def _HandleCommandGit(self, in_args):$/;"	m	class:TestFunctional
_HandleCommandGitConfig	tools/buildman/func_test.py	/^    def _HandleCommandGitConfig(self, args):$/;"	m	class:TestFunctional
_HandleCommandGitLog	tools/buildman/func_test.py	/^    def _HandleCommandGitLog(self, args):$/;"	m	class:TestFunctional
_HandleCommandNm	tools/buildman/func_test.py	/^    def _HandleCommandNm(self, args):$/;"	m	class:TestFunctional
_HandleCommandObjdump	tools/buildman/func_test.py	/^    def _HandleCommandObjdump(self, args):$/;"	m	class:TestFunctional
_HandleCommandSize	tools/buildman/func_test.py	/^    def _HandleCommandSize(self, args):$/;"	m	class:TestFunctional
_HandleMake	tools/buildman/func_test.py	/^    def _HandleMake(self, commit, brd, stage, cwd, *args, **kwargs):$/;"	m	class:TestFunctional
_I2C_AM33XX_H_	arch/arm/include/asm/arch-am33xx/i2c.h	/^#define _I2C_AM33XX_H_$/;"	d
_I2C_DEFS_H_	arch/arm/mach-davinci/include/mach/i2c_defs.h	/^#define _I2C_DEFS_H_$/;"	d
_I2C_DEFS_H_	arch/arm/mach-keystone/include/mach/i2c_defs.h	/^#define _I2C_DEFS_H_$/;"	d
_I2C_H_	include/i2c.h	/^#define _I2C_H_$/;"	d
_I386_BITOPS_H	arch/x86/include/asm/bitops.h	/^#define _I386_BITOPS_H$/;"	d
_I386_BYTEORDER_H	arch/x86/include/asm/byteorder.h	/^#define _I386_BYTEORDER_H$/;"	d
_I386_PTRACE_H	arch/x86/include/asm/ptrace.h	/^#define _I386_PTRACE_H$/;"	d
_I8042_H_	include/i8042.h	/^#define _I8042_H_$/;"	d
_I915_REG_H_	drivers/video/i915_reg.h	/^#define _I915_REG_H_$/;"	d
_ICCR	include/SA-1100.h	/^#define _ICCR	/;"	d
_ICFP	include/SA-1100.h	/^#define _ICFP	/;"	d
_ICH_H_	drivers/spi/ich.h	/^#define _ICH_H_$/;"	d
_ICIP	include/SA-1100.h	/^#define _ICIP	/;"	d
_ICLR	include/SA-1100.h	/^#define _ICLR	/;"	d
_ICMR	include/SA-1100.h	/^#define _ICMR	/;"	d
_ICPR	include/SA-1100.h	/^#define _ICPR	/;"	d
_IDE_H	include/ide.h	/^#define _IDE_H$/;"	d
_IGEP00X0_H_	board/isee/igep00x0/igep00x0.h	/^#define _IGEP00X0_H_$/;"	d
_IHS_MDIO_H_	board/gdsys/common/ihs_mdio.h	/^#define _IHS_MDIO_H_$/;"	d
_IMAGETOOL_H_	tools/imagetool.h	/^#define _IMAGETOOL_H_$/;"	d
_IMAGE_BASE_RELOCATION	include/pe.h	/^typedef struct _IMAGE_BASE_RELOCATION$/;"	s
_IMAGE_DATA_DIRECTORY	include/pe.h	/^typedef struct _IMAGE_DATA_DIRECTORY {$/;"	s
_IMAGE_DOS_HEADER	include/pe.h	/^typedef struct _IMAGE_DOS_HEADER {$/;"	s
_IMAGE_FILE_HEADER	include/pe.h	/^typedef struct _IMAGE_FILE_HEADER {$/;"	s
_IMAGE_NT_HEADERS	include/pe.h	/^typedef struct _IMAGE_NT_HEADERS {$/;"	s
_IMAGE_NT_HEADERS64	include/pe.h	/^typedef struct _IMAGE_NT_HEADERS64 {$/;"	s
_IMAGE_OPTIONAL_HEADER	include/pe.h	/^typedef struct _IMAGE_OPTIONAL_HEADER {$/;"	s
_IMAGE_OPTIONAL_HEADER64	include/pe.h	/^typedef struct _IMAGE_OPTIONAL_HEADER64 {$/;"	s
_IMAGE_RELOCATION	include/pe.h	/^typedef struct _IMAGE_RELOCATION$/;"	s
_IMAGE_SECTION_HEADER	include/pe.h	/^typedef struct _IMAGE_SECTION_HEADER {$/;"	s
_IMXIMAGE_H_	tools/imximage.h	/^#define _IMXIMAGE_H_$/;"	d
_IMX_REGS_H	arch/arm/include/asm/arch-imx/imx-regs.h	/^#define _IMX_REGS_H$/;"	d
_IMX_REGS_H	arch/arm/include/asm/arch-mx25/imx-regs.h	/^#define _IMX_REGS_H$/;"	d
_IMX_REGS_H	arch/arm/include/asm/arch-mx27/imx-regs.h	/^#define _IMX_REGS_H$/;"	d
_IMX_THERMAL_H_	include/imx_thermal.h	/^#define _IMX_THERMAL_H_$/;"	d
_INBOUND	include/tsi148.h	/^struct _INBOUND {$/;"	s
_INCLUDE_REGULATOR_H_	include/power/regulator.h	/^#define _INCLUDE_REGULATOR_H_$/;"	d
_INIT_HELPERS_H_	arch/x86/include/asm/init_helpers.h	/^#define _INIT_HELPERS_H_$/;"	d
_INLINE	drivers/bios_emulator/include/x86emu/x86emui.h	/^#define _INLINE /;"	d
_INPUT_H	include/input.h	/^#define _INPUT_H$/;"	d
_INTTYPES_H	include/inttypes.h	/^#define _INTTYPES_H	/;"	d
_INV_OFFSET	arch/mips/mach-pic32/include/mach/pic32.h	/^#define _INV_OFFSET	/;"	d
_IO	include/asm-generic/ioctl.h	/^#define _IO(/;"	d
_IOC	include/asm-generic/ioctl.h	/^#define _IOC(/;"	d
_IOC_DIR	include/asm-generic/ioctl.h	/^#define _IOC_DIR(/;"	d
_IOC_DIRBITS	include/asm-generic/ioctl.h	/^# define _IOC_DIRBITS	/;"	d
_IOC_DIRMASK	include/asm-generic/ioctl.h	/^#define _IOC_DIRMASK	/;"	d
_IOC_DIRSHIFT	include/asm-generic/ioctl.h	/^#define _IOC_DIRSHIFT	/;"	d
_IOC_NONE	include/asm-generic/ioctl.h	/^# define _IOC_NONE	/;"	d
_IOC_NR	include/asm-generic/ioctl.h	/^#define _IOC_NR(/;"	d
_IOC_NRBITS	include/asm-generic/ioctl.h	/^#define _IOC_NRBITS	/;"	d
_IOC_NRMASK	include/asm-generic/ioctl.h	/^#define _IOC_NRMASK	/;"	d
_IOC_NRSHIFT	include/asm-generic/ioctl.h	/^#define _IOC_NRSHIFT	/;"	d
_IOC_READ	include/asm-generic/ioctl.h	/^# define _IOC_READ	/;"	d
_IOC_SIZE	include/asm-generic/ioctl.h	/^#define _IOC_SIZE(/;"	d
_IOC_SIZEBITS	include/asm-generic/ioctl.h	/^# define _IOC_SIZEBITS	/;"	d
_IOC_SIZEMASK	include/asm-generic/ioctl.h	/^#define _IOC_SIZEMASK	/;"	d
_IOC_SIZESHIFT	include/asm-generic/ioctl.h	/^#define _IOC_SIZESHIFT	/;"	d
_IOC_TYPE	include/asm-generic/ioctl.h	/^#define _IOC_TYPE(/;"	d
_IOC_TYPEBITS	include/asm-generic/ioctl.h	/^#define _IOC_TYPEBITS	/;"	d
_IOC_TYPECHECK	include/asm-generic/ioctl.h	/^#define _IOC_TYPECHECK(/;"	d
_IOC_TYPEMASK	include/asm-generic/ioctl.h	/^#define _IOC_TYPEMASK	/;"	d
_IOC_TYPESHIFT	include/asm-generic/ioctl.h	/^#define _IOC_TYPESHIFT	/;"	d
_IOC_WRITE	include/asm-generic/ioctl.h	/^# define _IOC_WRITE	/;"	d
_IOEP_FPGA_H_	board/gdsys/common/ioep-fpga.h	/^#define _IOEP_FPGA_H_$/;"	d
_IOR	include/asm-generic/ioctl.h	/^#define _IOR(/;"	d
_IOR_BAD	include/asm-generic/ioctl.h	/^#define _IOR_BAD(/;"	d
_IOW	include/asm-generic/ioctl.h	/^#define _IOW(/;"	d
_IOWR	include/asm-generic/ioctl.h	/^#define _IOWR(/;"	d
_IOWR_BAD	include/asm-generic/ioctl.h	/^#define _IOWR_BAD(/;"	d
_IOW_BAD	include/asm-generic/ioctl.h	/^#define _IOW_BAD(/;"	d
_IO_BASE	arch/m68k/include/asm/io.h	/^#define _IO_BASE /;"	d
_IO_BASE	arch/powerpc/include/asm/io.h	/^#define _IO_BASE /;"	d
_IO_MUX_H	include/iomux.h	/^#define _IO_MUX_H$/;"	d
_ISA_H_	board/mpl/common/isa.h	/^#define _ISA_H_$/;"	d
_IS_SPL	include/linux/kconfig.h	/^#define _IS_SPL /;"	d
_KBD_H_	board/mpl/common/kbd.h	/^#define _KBD_H_$/;"	d
_KC1_H_	board/amazon/kc1/kc1.h	/^#define _KC1_H_$/;"	d
_KEYSTONE_NAV_H_	arch/arm/include/asm/ti-common/keystone_nav.h	/^#define _KEYSTONE_NAV_H_$/;"	d
_KEYSTONE_NET_H_	arch/arm/include/asm/ti-common/keystone_net.h	/^#define _KEYSTONE_NET_H_$/;"	d
_KEY_MATRIX_H	include/key_matrix.h	/^#define _KEY_MATRIX_H$/;"	d
_KS2_BOARD	board/ti/ks2_evm/board.h	/^#define _KS2_BOARD$/;"	d
_KS8851_MLL_H_	drivers/net/ks8851_mll.h	/^#define _KS8851_MLL_H_$/;"	d
_KWBIMAGE_H_	tools/kwbimage.h	/^#define _KWBIMAGE_H_$/;"	d
_KWCPU_H	arch/arm/mach-kirkwood/include/mach/cpu.h	/^#define _KWCPU_H$/;"	d
_KW_CONFIG_H	arch/arm/mach-kirkwood/include/mach/config.h	/^#define _KW_CONFIG_H$/;"	d
_KernelExceptionVector	arch/xtensa/cpu/start.S	/^_KernelExceptionVector:$/;"	l
_L	include/linux/ctype.h	/^#define _L	/;"	d
_LACIE_COMMON_H	board/LaCie/common/common.h	/^#define _LACIE_COMMON_H$/;"	d
_LACIE_CPLD_GPI0_BUS_H	board/LaCie/common/cpld-gpio-bus.h	/^#define _LACIE_CPLD_GPI0_BUS_H$/;"	d
_LAN91C96_H_	drivers/net/lan91c96.h	/^#define _LAN91C96_H_$/;"	d
_LAYOUT_	include/eeprom_layout.h	/^#define _LAYOUT_$/;"	d
_LCCR0	include/SA-1100.h	/^#define _LCCR0	/;"	d
_LCCR1	include/SA-1100.h	/^#define _LCCR1	/;"	d
_LCCR2	include/SA-1100.h	/^#define _LCCR2	/;"	d
_LCCR3	include/SA-1100.h	/^#define _LCCR3	/;"	d
_LCD_H_	include/lcd.h	/^#define _LCD_H_$/;"	d
_LCSR	include/SA-1100.h	/^#define _LCSR	/;"	d
_LEON2_ASI_H	arch/sparc/include/asm/arch-leon2/asi.h	/^#define _LEON2_ASI_H$/;"	d
_LEON3_ASI_H	arch/sparc/include/asm/arch-leon3/asi.h	/^#define _LEON3_ASI_H$/;"	d
_LIBFDT_ENV_H	include/libfdt_env.h	/^#define _LIBFDT_ENV_H$/;"	d
_LIBFDT_H	include/libfdt.h	/^#define _LIBFDT_H$/;"	d
_LIBFDT_INTERNAL_H	lib/libfdt/libfdt_internal.h	/^#define _LIBFDT_INTERNAL_H$/;"	d
_LIBSPARSE_SPARSE_FORMAT_H_	include/sparse_format.h	/^#define _LIBSPARSE_SPARSE_FORMAT_H_$/;"	d
_LIBTIZEN_H_	include/libtizen.h	/^#define _LIBTIZEN_H_$/;"	d
_LINK	include/ppc_defs.h	/^#define	_LINK	/;"	d
_LINUX_APM_H	include/linux/apm_bios.h	/^#define _LINUX_APM_H$/;"	d
_LINUX_BITOPS_H	include/linux/bitops.h	/^#define _LINUX_BITOPS_H$/;"	d
_LINUX_BITREV_H	include/linux/bitrev.h	/^#define _LINUX_BITREV_H$/;"	d
_LINUX_BUG_H	include/linux/bug.h	/^#define _LINUX_BUG_H$/;"	d
_LINUX_BYTEORDER_BIG_ENDIAN_H	include/linux/byteorder/big_endian.h	/^#define _LINUX_BYTEORDER_BIG_ENDIAN_H$/;"	d
_LINUX_BYTEORDER_GENERIC_H	include/linux/byteorder/generic.h	/^#define _LINUX_BYTEORDER_GENERIC_H$/;"	d
_LINUX_BYTEORDER_LITTLE_ENDIAN_H	include/linux/byteorder/little_endian.h	/^#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H$/;"	d
_LINUX_BYTEORDER_SWAB_H	include/linux/byteorder/swab.h	/^#define _LINUX_BYTEORDER_SWAB_H$/;"	d
_LINUX_COMPAT_H_	include/linux/compat.h	/^#define _LINUX_COMPAT_H_$/;"	d
_LINUX_CONST_H	arch/mips/include/asm/const.h	/^#define _LINUX_CONST_H$/;"	d
_LINUX_CRC32_H	include/linux/crc32.h	/^#define _LINUX_CRC32_H$/;"	d
_LINUX_CRC7_H	include/linux/crc7.h	/^#define _LINUX_CRC7_H$/;"	d
_LINUX_CTYPE_H	include/linux/ctype.h	/^#define _LINUX_CTYPE_H$/;"	d
_LINUX_EDD_H	include/linux/edd.h	/^#define _LINUX_EDD_H$/;"	d
_LINUX_ERRNO_H	include/linux/errno.h	/^#define _LINUX_ERRNO_H$/;"	d
_LINUX_ERR_H	include/linux/err.h	/^#define _LINUX_ERR_H$/;"	d
_LINUX_ETHTOOL_H	include/linux/ethtool.h	/^#define _LINUX_ETHTOOL_H$/;"	d
_LINUX_FB_H	include/linux/fb.h	/^#define _LINUX_FB_H$/;"	d
_LINUX_INPUT_H	include/linux/input.h	/^#define _LINUX_INPUT_H$/;"	d
_LINUX_IOCTL_H	include/linux/ioctl.h	/^#define _LINUX_IOCTL_H$/;"	d
_LINUX_IOPORT_H	include/linux/ioport.h	/^#define _LINUX_IOPORT_H$/;"	d
_LINUX_IO_H	include/linux/io.h	/^#define _LINUX_IO_H$/;"	d
_LINUX_KERNEL_H	include/linux/kernel.h	/^#define _LINUX_KERNEL_H$/;"	d
_LINUX_LINKAGE_H	include/linux/linkage.h	/^#define _LINUX_LINKAGE_H$/;"	d
_LINUX_LINUX_STRING_H_	include/linux/linux_string.h	/^#define _LINUX_LINUX_STRING_H_$/;"	d
_LINUX_LIST_H	include/linux/list.h	/^#define _LINUX_LIST_H$/;"	d
_LINUX_LIST_SORT_H	include/linux/list_sort.h	/^#define _LINUX_LIST_SORT_H$/;"	d
_LINUX_LMB_H	include/lmb.h	/^#define _LINUX_LMB_H$/;"	d
_LINUX_LOG2_H	include/linux/log2.h	/^#define _LINUX_LOG2_H$/;"	d
_LINUX_MATH64_H	include/linux/math64.h	/^#define _LINUX_MATH64_H$/;"	d
_LINUX_NETDEVICE_H	include/linux/netdevice.h	/^#define _LINUX_NETDEVICE_H$/;"	d
_LINUX_POISON_H	include/linux/poison.h	/^#define _LINUX_POISON_H$/;"	d
_LINUX_POSIX_TYPES_H	include/linux/posix_types.h	/^#define _LINUX_POSIX_TYPES_H$/;"	d
_LINUX_RBTREE_AUGMENTED_H	include/linux/rbtree_augmented.h	/^#define _LINUX_RBTREE_AUGMENTED_H$/;"	d
_LINUX_RBTREE_H	include/linux/rbtree.h	/^#define	_LINUX_RBTREE_H$/;"	d
_LINUX_SERIAL_REG_H	include/linux/serial_reg.h	/^#define _LINUX_SERIAL_REG_H$/;"	d
_LINUX_SFI_H	arch/x86/include/asm/sfi.h	/^#define _LINUX_SFI_H$/;"	d
_LINUX_STAT_H	include/linux/stat.h	/^#define _LINUX_STAT_H$/;"	d
_LINUX_STDDEF_H	include/linux/stddef.h	/^#define _LINUX_STDDEF_H$/;"	d
_LINUX_STRING_H_	include/linux/string.h	/^#define _LINUX_STRING_H_$/;"	d
_LINUX_TIME_H	include/linux/time.h	/^#define _LINUX_TIME_H$/;"	d
_LINUX_TYPES_H	include/linux/types.h	/^#define _LINUX_TYPES_H$/;"	d
_LINUX_UNALIGNED_ACCESS_OK_H	include/linux/unaligned/access_ok.h	/^#define _LINUX_UNALIGNED_ACCESS_OK_H$/;"	d
_LINUX_UNALIGNED_BE_BYTESHIFT_H	include/linux/unaligned/be_byteshift.h	/^#define _LINUX_UNALIGNED_BE_BYTESHIFT_H$/;"	d
_LINUX_UNALIGNED_GENERIC_H	include/linux/unaligned/generic.h	/^#define _LINUX_UNALIGNED_GENERIC_H$/;"	d
_LINUX_UNALIGNED_LE_BYTESHIFT_H	include/linux/unaligned/le_byteshift.h	/^#define _LINUX_UNALIGNED_LE_BYTESHIFT_H$/;"	d
_LINUX_YENTA_H	include/pcmcia/yenta.h	/^#define _LINUX_YENTA_H$/;"	d
_LOGBUFF_H	include/logbuff.h	/^#define _LOGBUFF_H$/;"	d
_LOWBAUD	arch/blackfin/cpu/initcode.c	/^#define _LOWBAUD /;"	d	file:
_LPC32XX_CLK_H	arch/arm/include/asm/arch-lpc32xx/clk.h	/^#define _LPC32XX_CLK_H$/;"	d
_LPC32XX_CONFIG_H	arch/arm/include/asm/arch-lpc32xx/config.h	/^#define _LPC32XX_CONFIG_H$/;"	d
_LPC32XX_CPU_H	arch/arm/include/asm/arch-lpc32xx/cpu.h	/^#define _LPC32XX_CPU_H$/;"	d
_LPC32XX_DMA_H	arch/arm/include/asm/arch-lpc32xx/dma.h	/^#define _LPC32XX_DMA_H$/;"	d
_LPC32XX_EMC_H	arch/arm/include/asm/arch-lpc32xx/emc.h	/^#define _LPC32XX_EMC_H$/;"	d
_LPC32XX_GPIO_GRP_H	arch/arm/include/asm/arch-lpc32xx/gpio_grp.h	/^#define _LPC32XX_GPIO_GRP_H$/;"	d
_LPC32XX_HSUART_PLAT_H	include/dm/platform_data/lpc32xx_hsuart.h	/^#define _LPC32XX_HSUART_PLAT_H$/;"	d
_LPC32XX_SYS_PROTO_H	arch/arm/include/asm/arch-lpc32xx/sys_proto.h	/^#define _LPC32XX_SYS_PROTO_H$/;"	d
_LPC32XX_TIMER_H	arch/arm/include/asm/arch-lpc32xx/timer.h	/^#define _LPC32XX_TIMER_H$/;"	d
_LPC32XX_UART_H	arch/arm/include/asm/arch-lpc32xx/uart.h	/^#define _LPC32XX_UART_H$/;"	d
_LPC32XX_WDT_H	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^#define _LPC32XX_WDT_H$/;"	d
_M5208EVBE_H	include/configs/M5208EVBE.h	/^#define _M5208EVBE_H$/;"	d
_M52277EVB_H	include/configs/M52277EVB.h	/^#define _M52277EVB_H$/;"	d
_M5235EVB_H	include/configs/M5235EVB.h	/^#define _M5235EVB_H$/;"	d
_M5249EVB_H	include/configs/M5249EVB.h	/^#define _M5249EVB_H$/;"	d
_M5253DEMO_H	include/configs/M5253DEMO.h	/^#define _M5253DEMO_H$/;"	d
_M5253EVBE_H	include/configs/M5253EVBE.h	/^#define _M5253EVBE_H$/;"	d
_M5272C3_H	include/configs/M5272C3.h	/^#define _M5272C3_H$/;"	d
_M5275EVB_H	include/configs/M5275EVB.h	/^#define _M5275EVB_H$/;"	d
_M53017EVB_H	include/configs/M53017EVB.h	/^#define _M53017EVB_H$/;"	d
_M5329EVB_H	include/configs/M5329EVB.h	/^#define _M5329EVB_H$/;"	d
_M5373EVB_H	include/configs/M5373EVB.h	/^#define _M5373EVB_H$/;"	d
_M54418TWR_H	include/configs/M54418TWR.h	/^#define _M54418TWR_H$/;"	d
_M54451EVB_H	include/configs/M54451EVB.h	/^#define _M54451EVB_H$/;"	d
_M54455EVB_H	include/configs/M54455EVB.h	/^#define _M54455EVB_H$/;"	d
_M5475EVB_H	include/configs/M5475EVB.h	/^#define _M5475EVB_H$/;"	d
_M5485EVB_H	include/configs/M5485EVB.h	/^#define _M5485EVB_H$/;"	d
_M68K_BITOPS_H	arch/m68k/include/asm/bitops.h	/^#define _M68K_BITOPS_H$/;"	d
_M68K_BYTEORDER_H	arch/m68k/include/asm/byteorder.h	/^#define _M68K_BYTEORDER_H$/;"	d
_M68K_POSIX_TYPES_H	arch/m68k/include/asm/posix_types.h	/^#define _M68K_POSIX_TYPES_H$/;"	d
_M68K_PTRACE_H	arch/m68k/include/asm/ptrace.h	/^#define _M68K_PTRACE_H$/;"	d
_M68K_STRING_H_	arch/m68k/include/asm/string.h	/^#define _M68K_STRING_H_$/;"	d
_M68K_TYPES_H	arch/m68k/include/asm/types.h	/^#define _M68K_TYPES_H$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf506/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf518/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf527/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf533/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf537/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf538/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf548/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf561/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_ANOMALY_H_	arch/blackfin/include/asm/mach-bf609/anomaly.h	/^#define _MACH_ANOMALY_H_$/;"	d
_MACH_DEBUG_UART_H	arch/arm/mach-uniphier/debug-uart/debug-uart.h	/^#define _MACH_DEBUG_UART_H$/;"	d
_MACH_FMC_H_	arch/arm/include/asm/arch-stm32f4/fmc.h	/^#define _MACH_FMC_H_$/;"	d
_MACH_FMC_H_	arch/arm/include/asm/arch-stm32f7/fmc.h	/^#define _MACH_FMC_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf506/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf518/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf527/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf533/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf537/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf538/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf548/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf561/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_GPIO_H_	arch/blackfin/include/asm/mach-bf609/gpio.h	/^#define _MACH_GPIO_H_$/;"	d
_MACH_MON_H_	arch/arm/mach-keystone/include/mach/mon.h	/^#define _MACH_MON_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf506/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf518/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf527/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf533/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf537/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf538/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf548/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf561/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_PORTMUX_H_	arch/blackfin/include/asm/mach-bf609/portmux.h	/^#define _MACH_PORTMUX_H_$/;"	d
_MACH_STM32_H_	arch/arm/include/asm/arch-stm32f1/stm32.h	/^#define _MACH_STM32_H_$/;"	d
_MACH_STM32_H_	arch/arm/include/asm/arch-stm32f4/stm32.h	/^#define _MACH_STM32_H_$/;"	d
_MACH_SYSMAP_APQ8016_H	arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h	/^#define _MACH_SYSMAP_APQ8016_H$/;"	d
_MACH_T186_CLK_T186_H	arch/arm/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	arch/microblaze/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	arch/mips/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	arch/nios2/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	arch/sandbox/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	arch/x86/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	arch/xtensa/dts/include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MACH_T186_CLK_T186_H	include/dt-bindings/clock/tegra186-clock.h	/^#define _MACH_T186_CLK_T186_H$/;"	d
_MAILBOX_H	include/mailbox.h	/^#define _MAILBOX_H$/;"	d
_MAILBOX_UCLASS_H	include/mailbox-uclass.h	/^#define _MAILBOX_UCLASS_H$/;"	d
_MAKE_ALT_CHAN	drivers/video/ipu.h	/^#define _MAKE_ALT_CHAN(/;"	d
_MAKE_CHAN	drivers/video/ipu.h	/^#define _MAKE_CHAN(/;"	d
_MALTA_CONFIG_H	include/configs/malta.h	/^#define _MALTA_CONFIG_H$/;"	d
_MARK	arch/arm/mach-rmobile/pfc-r8a7791.c	/^	SDA4_B_MARK, _MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,$/;"	e	enum:__anona307835a0103	file:
_MAX77620_INIT_H_	board/nvidia/p2571/max77620_init.h	/^#define _MAX77620_INIT_H_$/;"	d
_MAX98095_H	drivers/sound/max98095.h	/^#define _MAX98095_H$/;"	d
_MB862XX_H_	include/mb862xx.h	/^#define _MB862XX_H_$/;"	d
_MC146818RTC_H	include/linux/mc146818rtc.h	/^#define _MC146818RTC_H$/;"	d
_MCD_API_H	include/MCD_dma.h	/^#define _MCD_API_H$/;"	d
_MCF5271_H_	arch/m68k/include/asm/m5271.h	/^#define	_MCF5271_H_$/;"	d
_MCLINK_H_	board/gdsys/common/mclink.h	/^#define _MCLINK_H_$/;"	d
_MD5_H	include/u-boot/md5.h	/^#define _MD5_H$/;"	d
_MDCAS	include/SA-1100.h	/^#define _MDCAS(/;"	d
_MDCAS0	include/SA-1100.h	/^#define _MDCAS0	/;"	d
_MDCAS1	include/SA-1100.h	/^#define _MDCAS1	/;"	d
_MDCAS2	include/SA-1100.h	/^#define _MDCAS2	/;"	d
_MDCNFG	include/SA-1100.h	/^#define _MDCNFG	/;"	d
_MDCTL	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define _MDCTL	/;"	d
_MDREFR	include/SA-1100.h	/^#define _MDREFR	/;"	d
_MECR	include/SA-1100.h	/^#define _MECR	/;"	d
_MEMBUFF_H	include/membuff.h	/^#define _MEMBUFF_H$/;"	d
_MEM_H_	arch/arm/include/asm/arch-am33xx/mem.h	/^#define _MEM_H_$/;"	d
_MEM_H_	arch/arm/include/asm/arch-omap3/mem.h	/^#define _MEM_H_$/;"	d
_MEM_H_	arch/arm/include/asm/arch-omap4/mem.h	/^#define _MEM_H_$/;"	d
_MEM_H_	arch/arm/include/asm/arch-omap5/mem.h	/^#define _MEM_H_$/;"	d
_MICROBLAZE_BITOPS_H	arch/microblaze/include/asm/bitops.h	/^#define _MICROBLAZE_BITOPS_H$/;"	d
_MII_PHY_H_	include/mii_phy.h	/^#define _MII_PHY_H_$/;"	d
_MII_field_desc_and_len_t	cmd/mii.c	/^typedef struct _MII_field_desc_and_len_t {$/;"	s	file:
_MII_field_desc_t	cmd/mii.c	/^typedef struct _MII_field_desc_t {$/;"	s	file:
_MII_reg_desc_t	cmd/mii.c	/^typedef struct _MII_reg_desc_t {$/;"	s	file:
_MIPS_ASM_MALTA_H	arch/mips/include/asm/malta.h	/^#define _MIPS_ASM_MALTA_H$/;"	d
_MIPS_ISA_MIPS1	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS1	/;"	d
_MIPS_ISA_MIPS2	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS2	/;"	d
_MIPS_ISA_MIPS3	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS3	/;"	d
_MIPS_ISA_MIPS32	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS32	/;"	d
_MIPS_ISA_MIPS4	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS4	/;"	d
_MIPS_ISA_MIPS5	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS5	/;"	d
_MIPS_ISA_MIPS64	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_ISA_MIPS64	/;"	d
_MIPS_SIM_ABI32	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_SIM_ABI32	/;"	d
_MIPS_SIM_ABI64	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_SIM_ABI64	/;"	d
_MIPS_SIM_NABI32	arch/mips/include/asm/sgidefs.h	/^#define _MIPS_SIM_NABI32	/;"	d
_MISC_H_	include/misc.h	/^#define _MISC_H_$/;"	d
_MKIIMAGE_H_	tools/mkimage.h	/^#define _MKIIMAGE_H_$/;"	d
_MMC_H_	include/mmc.h	/^#define _MMC_H_$/;"	d
_MMC_PRIVATE_H_	drivers/mmc/mmc_private.h	/^#define _MMC_PRIVATE_H_$/;"	d
_MMU_context	arch/powerpc/include/asm/mmu.h	/^typedef struct _MMU_context {$/;"	s
_MPC106_PCI_H	include/mpc106.h	/^#define _MPC106_PCI_H$/;"	d
_MPC823_LCD_H_	include/mpc823_lcd.h	/^#define _MPC823_LCD_H_$/;"	d
_MPC8260_IRQ_H	include/mpc8260_irq.h	/^#define _MPC8260_IRQ_H$/;"	d
_MPC83XX_GPIO_H_	arch/powerpc/include/asm/arch-mpc83xx/gpio.h	/^#define _MPC83XX_GPIO_H_$/;"	d
_MPC8XX_IDE_H_	arch/powerpc/lib/ide.h	/^#define _MPC8XX_IDE_H_ /;"	d
_MPC8XX_IRQ_H	include/mpc8xx_irq.h	/^#define _MPC8XX_IRQ_H$/;"	d
_MRC_H_	arch/x86/include/asm/arch-quark/mrc.h	/^#define _MRC_H_$/;"	d
_MRC_UTIL_H_	arch/x86/cpu/quark/mrc_util.h	/^#define _MRC_UTIL_H_$/;"	d
_MSC	include/SA-1100.h	/^#define _MSC(/;"	d
_MSC0	include/SA-1100.h	/^#define _MSC0	/;"	d
_MSC1	include/SA-1100.h	/^#define _MSC1	/;"	d
_MSC2	include/SA-1100.h	/^#define _MSC2	/;"	d
_MSMC_H_	arch/arm/mach-keystone/include/mach/msmc.h	/^#define _MSMC_H_$/;"	d
_MSR	include/ppc_defs.h	/^#define	_MSR	/;"	d
_MTD_H_	include/mtd.h	/^#define _MTD_H_$/;"	d
_MTEXT_BASE	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^_MTEXT_BASE:$/;"	l
_MT_VENTOUX_H_	board/teejet/mt_ventoux/mt_ventoux.h	/^#define _MT_VENTOUX_H_$/;"	d
_MUSB_HOST_H	drivers/usb/musb-new/musb_host.h	/^#define _MUSB_HOST_H$/;"	d
_MUSB_OMAP3_H_	drivers/usb/musb/omap3.h	/^#define _MUSB_OMAP3_H_$/;"	d
_MUX_AM33XX_H_	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^#define _MUX_AM33XX_H_$/;"	d
_MUX_AM43XX_H_	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^#define _MUX_AM43XX_H_$/;"	d
_MUX_DATA_BEAGLE_X15_H_	board/ti/am57xx/mux_data.h	/^#define _MUX_DATA_BEAGLE_X15_H_$/;"	d
_MUX_DATA_DRA7XX_H_	board/ti/dra7xx/mux_data.h	/^#define _MUX_DATA_DRA7XX_H_$/;"	d
_MUX_DRA7XX_H_	arch/arm/include/asm/arch-omap5/mux_dra7xx.h	/^#define _MUX_DRA7XX_H_$/;"	d
_MUX_H_	arch/arm/include/asm/arch-am33xx/mux.h	/^#define _MUX_H_$/;"	d
_MUX_H_	arch/arm/include/asm/arch-omap3/mux.h	/^#define _MUX_H_$/;"	d
_MUX_OMAP4_H_	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^#define _MUX_OMAP4_H_$/;"	d
_MUX_OMAP5_H_	arch/arm/include/asm/arch-omap5/mux_omap5.h	/^#define _MUX_OMAP5_H_$/;"	d
_MUX_TI814X_H_	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^#define _MUX_TI814X_H_$/;"	d
_MUX_TI816X_H_	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^#define _MUX_TI816X_H_$/;"	d
_MVEBU_CONFIG_H	arch/arm/mach-mvebu/include/mach/config.h	/^#define _MVEBU_CONFIG_H$/;"	d
_MVEBU_CPU_H	arch/arm/mach-mvebu/include/mach/cpu.h	/^#define _MVEBU_CPU_H$/;"	d
_MVEBU_SOC_H	arch/arm/mach-mvebu/include/mach/soc.h	/^#define _MVEBU_SOC_H$/;"	d
_MVRTC_H_	drivers/rtc/mvrtc.h	/^#define _MVRTC_H_$/;"	d
_MV_COMMON_H	include/configs/mv-common.h	/^#define _MV_COMMON_H$/;"	d
_MV_I2C_H_	drivers/i2c/mv_i2c.h	/^#define _MV_I2C_H_$/;"	d
_MX31_SYS_PROTO_H_	arch/arm/include/asm/arch-mx31/sys_proto.h	/^#define _MX31_SYS_PROTO_H_$/;"	d
_MX35_SYS_PROTO_H_	arch/arm/include/asm/arch-mx35/sys_proto.h	/^#define _MX35_SYS_PROTO_H_$/;"	d
_NAND_H_	include/nand.h	/^#define _NAND_H_$/;"	d
_NAND_SPL_H_	include/cmd_spl.h	/^#define	_NAND_SPL_H_$/;"	d
_NETDEV_H_	include/netdev.h	/^#define _NETDEV_H_$/;"	d
_NIC301_REGISTERS_H_	arch/arm/mach-socfpga/include/mach/nic301.h	/^#define	_NIC301_REGISTERS_H_$/;"	d
_NIP	include/ppc_defs.h	/^#define	_NIP	/;"	d
_NODE_INFO	include/mtd_node.h	/^#define _NODE_INFO$/;"	d
_NOT_USED_	board/liebherr/lwmon5/kbd.c	/^#define	_NOT_USED_	/;"	d	file:
_NOT_USED_	board/tqc/tqm8xx/tqm8xx.c	/^#define	_NOT_USED_	/;"	d	file:
_NS87308_H_	include/ns87308.h	/^#define _NS87308_H_$/;"	d
_NSIG	arch/powerpc/include/asm/signal.h	/^#define _NSIG	/;"	d
_NSIG	include/asm-generic/signal.h	/^#define _NSIG	/;"	d
_NSIG_BPW	arch/powerpc/include/asm/signal.h	/^#define _NSIG_BPW	/;"	d
_NSIG_BPW	include/asm-generic/signal.h	/^#define _NSIG_BPW	/;"	d
_NSIG_WORDS	arch/powerpc/include/asm/signal.h	/^#define _NSIG_WORDS	/;"	d
_NSIG_WORDS	include/asm-generic/signal.h	/^#define _NSIG_WORDS	/;"	d
_NUMBITS	arch/blackfin/cpu/initcode.c	/^#define _NUMBITS /;"	d	file:
_NUMINS	arch/blackfin/cpu/initcode.c	/^#define _NUMINS /;"	d	file:
_NUVOTON_NCT6102D_H_	include/nuvoton_nct6102d.h	/^#define _NUVOTON_NCT6102D_H_$/;"	d
_NVIDIA_EMC_H_	arch/arm/mach-tegra/emc.h	/^#define _NVIDIA_EMC_H_$/;"	d
_OIER	include/SA-1100.h	/^#define _OIER	/;"	d
_OMAP2PLUS_I2C_H_	drivers/i2c/omap24xx_i2c.h	/^#define _OMAP2PLUS_I2C_H_$/;"	d
_OMAP3LOGIC_H_	board/logicpd/omap3som/omap3logic.h	/^#define _OMAP3LOGIC_H_$/;"	d
_OMAP3_EHCI_H_	arch/arm/include/asm/arch-omap3/ehci.h	/^#define _OMAP3_EHCI_H_$/;"	d
_OMAP3_H_	arch/arm/include/asm/arch-omap3/omap.h	/^#define _OMAP3_H_$/;"	d
_OMAP3_I2C_H_	arch/arm/include/asm/arch-omap3/i2c.h	/^#define _OMAP3_I2C_H_$/;"	d
_OMAP3_REGS_H	arch/arm/include/asm/arch-omap3/omap3-regs.h	/^#define _OMAP3_REGS_H$/;"	d
_OMAP4_EHCI_H_	arch/arm/include/asm/arch-omap4/ehci.h	/^#define _OMAP4_EHCI_H_$/;"	d
_OMAP4_H_	arch/arm/include/asm/arch-omap4/omap.h	/^#define _OMAP4_H_$/;"	d
_OMAP4_I2C_H_	arch/arm/include/asm/arch-omap4/i2c.h	/^#define _OMAP4_I2C_H_$/;"	d
_OMAP5_H_	arch/arm/include/asm/arch-omap5/omap.h	/^#define _OMAP5_H_$/;"	d
_OMAP5_I2C_H_	arch/arm/include/asm/arch-omap5/i2c.h	/^#define _OMAP5_I2C_H_$/;"	d
_OMAPIMAGE_H_	tools/omapimage.h	/^#define _OMAPIMAGE_H_$/;"	d
_OMAP_COMMON_EHCI_H_	arch/arm/include/asm/ehci-omap.h	/^#define _OMAP_COMMON_EHCI_H_$/;"	d
_OMAP_COMMON_H_	arch/arm/include/asm/omap_common.h	/^#define	_OMAP_COMMON_H_$/;"	d
_OMAP_H_	arch/arm/include/asm/arch-am33xx/omap.h	/^#define _OMAP_H_$/;"	d
_OMAP_SEC_COMMON_H_	arch/arm/include/asm/omap_sec_common.h	/^#define	_OMAP_SEC_COMMON_H_$/;"	d
_OPENRISC_EXC_H_	arch/openrisc/include/asm/openrisc_exc.h	/^#define _OPENRISC_EXC_H_$/;"	d
_ORIGEN_SETUP_H	arch/arm/mach-exynos/exynos4_setup.h	/^#define _ORIGEN_SETUP_H$/;"	d
_ORION5X_CPU_H	arch/arm/mach-orion5x/include/mach/cpu.h	/^#define _ORION5X_CPU_H$/;"	d
_OSCR	include/SA-1100.h	/^#define _OSCR	/;"	d
_OSD_H_	board/gdsys/common/osd.h	/^#define _OSD_H_$/;"	d
_OSMR	include/SA-1100.h	/^#define _OSMR(/;"	d
_OSMR0	include/SA-1100.h	/^#define _OSMR0	/;"	d
_OSMR1	include/SA-1100.h	/^#define _OSMR1	/;"	d
_OSMR2	include/SA-1100.h	/^#define _OSMR2	/;"	d
_OSMR3	include/SA-1100.h	/^#define _OSMR3	/;"	d
_OSSR	include/SA-1100.h	/^#define _OSSR	/;"	d
_OUTBOUND	include/tsi148.h	/^struct _OUTBOUND {$/;"	s
_OUTREGP	drivers/video/ati_radeon_fb.h	/^static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,$/;"	f	typeref:typename:void
_OVERO_H_	board/overo/overo.h	/^#define _OVERO_H_$/;"	d
_OWER	include/SA-1100.h	/^#define _OWER	/;"	d
_Output	tools/patman/tout.py	/^def _Output(level, msg, color=None):$/;"	f
_OutputConfigInfo	tools/buildman/builder.py	/^        def _OutputConfigInfo(lines):$/;"	f	member:Builder.PrintResultSummary	file:
_P	include/linux/ctype.h	/^#define _P	/;"	d
_P2371_0000_H	include/configs/p2371-0000.h	/^#define _P2371_0000_H$/;"	d
_P2371_2180_H	include/configs/p2371-2180.h	/^#define _P2371_2180_H$/;"	d
_P2571_H	include/configs/p2571.h	/^#define _P2571_H$/;"	d
_P2771_0000_H	include/configs/p2771-0000.h	/^#define _P2771_0000_H$/;"	d
_P601_BAT	arch/powerpc/include/asm/mmu.h	/^typedef struct _P601_BAT {$/;"	s
_P601_BATL	arch/powerpc/include/asm/mmu.h	/^typedef struct _P601_BATL {	\/* Lower part of BAT for 601 processor *\/$/;"	s
_P601_BATU	arch/powerpc/include/asm/mmu.h	/^typedef struct _P601_BATU {	\/* Upper part of BAT for 601 processor *\/$/;"	s
_PAGE_ACCESSED	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_ACCESSED	/;"	d
_PAGE_ACCESSED_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_ACCESSED_SHIFT	/;"	d
_PAGE_CHG_MASK	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_CHG_MASK	/;"	d
_PAGE_DIRTY	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_DIRTY	/;"	d
_PAGE_DIRTY_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_DIRTY_SHIFT	/;"	d
_PAGE_GLOBAL	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_GLOBAL	/;"	d
_PAGE_GLOBAL_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_GLOBAL_SHIFT	/;"	d
_PAGE_HUGE	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_HUGE	/;"	d
_PAGE_HUGE_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_HUGE_SHIFT	/;"	d
_PAGE_MODIFIED	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_MODIFIED	/;"	d
_PAGE_MODIFIED_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_MODIFIED_SHIFT	/;"	d
_PAGE_NO_EXEC	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_NO_EXEC	/;"	d
_PAGE_NO_EXEC_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_NO_EXEC_SHIFT	/;"	d
_PAGE_NO_READ	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_NO_READ	/;"	d
_PAGE_NO_READ_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_NO_READ_SHIFT	/;"	d
_PAGE_PRESENT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_PRESENT	/;"	d
_PAGE_PRESENT_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_PRESENT_SHIFT	/;"	d
_PAGE_READ	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_READ	/;"	d
_PAGE_READ_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_READ_SHIFT	/;"	d
_PAGE_SILENT_READ	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_SILENT_READ	/;"	d
_PAGE_SILENT_WRITE	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_SILENT_WRITE	/;"	d
_PAGE_SPLITTING	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_SPLITTING	/;"	d
_PAGE_SPLITTING_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_SPLITTING_SHIFT	/;"	d
_PAGE_VALID	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_VALID	/;"	d
_PAGE_VALID_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_VALID_SHIFT	/;"	d
_PAGE_WRITE	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_WRITE	/;"	d
_PAGE_WRITE_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PAGE_WRITE_SHIFT	/;"	d
_PANDA_MUX_DATA_H_	board/ti/panda/panda_mux_data.h	/^#define _PANDA_MUX_DATA_H_$/;"	d
_PANDORA_H_	board/pandora/pandora.h	/^#define _PANDORA_H_$/;"	d
_PANEL_H	include/panel.h	/^#define _PANEL_H$/;"	d
_PART_CD_H	disk/part_iso.h	/^#define _PART_CD_H$/;"	d
_PART_H	include/part.h	/^#define _PART_H$/;"	d
_PASTE_UART	arch/blackfin/include/asm/serial.h	/^#define _PASTE_UART(/;"	d
_PCA9564_H	include/pca9564.h	/^#define _PCA9564_H$/;"	d
_PCFR	include/SA-1100.h	/^#define _PCFR	/;"	d
_PCH_DPLL	drivers/video/i915_reg.h	/^#define _PCH_DPLL(/;"	d
_PCH_DPLL_A	drivers/video/i915_reg.h	/^#define _PCH_DPLL_A /;"	d
_PCH_DPLL_B	drivers/video/i915_reg.h	/^#define _PCH_DPLL_B /;"	d
_PCH_FP0	drivers/video/i915_reg.h	/^#define _PCH_FP0(/;"	d
_PCH_FP1	drivers/video/i915_reg.h	/^#define _PCH_FP1(/;"	d
_PCH_FPA0	drivers/video/i915_reg.h	/^#define _PCH_FPA0 /;"	d
_PCH_FPA1	drivers/video/i915_reg.h	/^#define _PCH_FPA1 /;"	d
_PCH_FPB0	drivers/video/i915_reg.h	/^#define _PCH_FPB0 /;"	d
_PCH_FPB1	drivers/video/i915_reg.h	/^#define _PCH_FPB1 /;"	d
_PCH_GBE_H_	drivers/net/pch_gbe.h	/^#define _PCH_GBE_H_$/;"	d
_PCI_GT64120_H	include/pci_gt64120.h	/^#define _PCI_GT64120_H$/;"	d
_PCI_H	include/pci.h	/^#define _PCI_H$/;"	d
_PCI_I386_H_	arch/x86/include/asm/pci.h	/^#define _PCI_I386_H_$/;"	d
_PCI_IO_H_	arch/powerpc/include/asm/pci_io.h	/^#define _PCI_IO_H_$/;"	d
_PCI_PARTS_H_	board/mpl/common/pci_parts.h	/^#define _PCI_PARTS_H_$/;"	d
_PCI_ROM_H	include/pci_rom.h	/^#define _PCI_ROM_H$/;"	d
_PCMCIA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA(/;"	d
_PCMCIA	include/SA-1100.h	/^#define _PCMCIA(/;"	d
_PCMCIA0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA0	/;"	d
_PCMCIA0	include/SA-1100.h	/^#define _PCMCIA0	/;"	d
_PCMCIA0Attr	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA0Attr	/;"	d
_PCMCIA0Attr	include/SA-1100.h	/^#define _PCMCIA0Attr	/;"	d
_PCMCIA0IO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA0IO	/;"	d
_PCMCIA0IO	include/SA-1100.h	/^#define _PCMCIA0IO	/;"	d
_PCMCIA0Mem	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA0Mem	/;"	d
_PCMCIA0Mem	include/SA-1100.h	/^#define _PCMCIA0Mem	/;"	d
_PCMCIA1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA1	/;"	d
_PCMCIA1	include/SA-1100.h	/^#define _PCMCIA1	/;"	d
_PCMCIA1Attr	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA1Attr	/;"	d
_PCMCIA1Attr	include/SA-1100.h	/^#define _PCMCIA1Attr	/;"	d
_PCMCIA1IO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA1IO	/;"	d
_PCMCIA1IO	include/SA-1100.h	/^#define _PCMCIA1IO	/;"	d
_PCMCIA1Mem	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIA1Mem	/;"	d
_PCMCIA1Mem	include/SA-1100.h	/^#define _PCMCIA1Mem	/;"	d
_PCMCIAAttr	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIAAttr(/;"	d
_PCMCIAAttr	include/SA-1100.h	/^#define _PCMCIAAttr(/;"	d
_PCMCIAIO	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIAIO(/;"	d
_PCMCIAIO	include/SA-1100.h	/^#define _PCMCIAIO(/;"	d
_PCMCIAMem	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PCMCIAMem(/;"	d
_PCMCIAMem	include/SA-1100.h	/^#define _PCMCIAMem(/;"	d
_PCMCIA_H	include/pcmcia.h	/^#define _PCMCIA_H$/;"	d
_PCRH	include/sh_pfc.h	/^#define _PCRH(/;"	d
_PE_H	include/pe.h	/^#define _PE_H$/;"	d
_PFNX_MASK	arch/mips/include/asm/pgtable-bits.h	/^#define _PFNX_MASK	/;"	d
_PFN_MASK	arch/mips/include/asm/pgtable-bits.h	/^#define _PFN_MASK	/;"	d
_PFN_SHIFT	arch/mips/include/asm/pgtable-bits.h	/^#define _PFN_SHIFT	/;"	d
_PGSR	include/SA-1100.h	/^#define _PGSR	/;"	d
_PHY_H	include/phy.h	/^#define _PHY_H$/;"	d
_PHY_H_	board/gdsys/common/phy.h	/^#define _PHY_H_$/;"	d
_PIIX4_PCI_H	board/mpl/common/piix4_pci.h	/^#define _PIIX4_PCI_H$/;"	d
_PINMUX0	arch/arm/mach-davinci/lowlevel_init.S	/^_PINMUX0:$/;"	l
_PINMUX1	arch/arm/mach-davinci/lowlevel_init.S	/^_PINMUX1:$/;"	l
_PINMUX_CONFIG_APALIS_T30_H_	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^#define _PINMUX_CONFIG_APALIS_T30_H_$/;"	d
_PINMUX_CONFIG_CARDHU_H_	board/nvidia/cardhu/pinmux-config-cardhu.h	/^#define _PINMUX_CONFIG_CARDHU_H_$/;"	d
_PINMUX_CONFIG_CEI_TK1_SOM_H_	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^#define _PINMUX_CONFIG_CEI_TK1_SOM_H_$/;"	d
_PINMUX_CONFIG_COLIBRI_T30_H_	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^#define _PINMUX_CONFIG_COLIBRI_T30_H_$/;"	d
_PINMUX_CONFIG_DALMORE_H_	board/nvidia/dalmore/pinmux-config-dalmore.h	/^#define _PINMUX_CONFIG_DALMORE_H_$/;"	d
_PINMUX_CONFIG_E2220_1170_H_	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^#define _PINMUX_CONFIG_E2220_1170_H_$/;"	d
_PINMUX_CONFIG_JETSON_TK1_H_	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^#define _PINMUX_CONFIG_JETSON_TK1_H_$/;"	d
_PINMUX_CONFIG_NYAN_BIG_H_	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^#define _PINMUX_CONFIG_NYAN_BIG_H_$/;"	d
_PINMUX_CONFIG_P2371_0000_H_	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^#define _PINMUX_CONFIG_P2371_0000_H_$/;"	d
_PINMUX_CONFIG_P2371_2180_H_	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^#define _PINMUX_CONFIG_P2371_2180_H_$/;"	d
_PINMUX_CONFIG_P2571_H_	board/nvidia/p2571/pinmux-config-p2571.h	/^#define _PINMUX_CONFIG_P2571_H_$/;"	d
_PINMUX_CONFIG_TAMONTEN_NG_H_	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^#define _PINMUX_CONFIG_TAMONTEN_NG_H_$/;"	d
_PINMUX_CONFIG_VENICE2_H_	board/nvidia/venice2/pinmux-config-venice2.h	/^#define _PINMUX_CONFIG_VENICE2_H_$/;"	d
_PIRQ_ROUTING_H_	arch/x86/include/asm/pirq_routing.h	/^#define _PIRQ_ROUTING_H_$/;"	d
_PL310_H_	arch/arm/include/asm/pl310.h	/^#define _PL310_H_$/;"	d
_PLATINUM_H_	board/barco/platinum/platinum.h	/^#define _PLATINUM_H_$/;"	d
_PLL_BRM	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define _PLL_BRM(/;"	d
_PLL_MFD	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define _PLL_MFD(/;"	d
_PLL_MFI	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define _PLL_MFI(/;"	d
_PLL_MFN	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define _PLL_MFN(/;"	d
_PLL_PD	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define _PLL_PD(/;"	d
_PLL_SETTING	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define _PLL_SETTING(/;"	d
_PMCR	include/SA-1100.h	/^#define _PMCR	/;"	d
_PMC_H_	arch/arm/include/asm/arch-tegra/pmc.h	/^#define _PMC_H_$/;"	d
_PMIC_ACT8846_H_	include/power/act8846_pmic.h	/^#define _PMIC_ACT8846_H_$/;"	d
_PMIC_RK808_H_	include/power/rk808_pmic.h	/^#define _PMIC_RK808_H_$/;"	d
_PORTMUX_H_	arch/blackfin/include/asm/portmux.h	/^#define _PORTMUX_H_$/;"	d
_PORT_ALL	include/sh_pfc.h	/^#define _PORT_ALL(/;"	d
_POSR	include/SA-1100.h	/^#define _POSR	/;"	d
_POST_H	include/post.h	/^#define _POST_H$/;"	d
_POST_WORD_ADDR	include/post.h	/^#define _POST_WORD_ADDR	/;"	d
_POST_WORD_ADDR	include/post.h	/^#define _POST_WORD_ADDR /;"	d
_POWER_DOMAIN_H	include/power-domain.h	/^#define _POWER_DOMAIN_H$/;"	d
_POWER_DOMAIN_UCLASS_H	include/power-domain-uclass.h	/^#define _POWER_DOMAIN_UCLASS_H$/;"	d
_PPAR	include/SA-1100.h	/^#define _PPAR	/;"	d
_PPC405EP_H_	arch/powerpc/include/asm/ppc405ep.h	/^#define _PPC405EP_H_$/;"	d
_PPC405EX_H_	arch/powerpc/include/asm/ppc405ex.h	/^#define _PPC405EX_H_$/;"	d
_PPC405EZ_H_	arch/powerpc/include/asm/ppc405ez.h	/^#define _PPC405EZ_H_$/;"	d
_PPC405GP_H_	arch/powerpc/include/asm/ppc405gp.h	/^#define _PPC405GP_H_$/;"	d
_PPC440EPX_GRX_H_	arch/powerpc/include/asm/ppc440epx_grx.h	/^#define _PPC440EPX_GRX_H_$/;"	d
_PPC440EP_GR_H_	arch/powerpc/include/asm/ppc440ep_gr.h	/^#define _PPC440EP_GR_H_$/;"	d
_PPC440GP_H_	arch/powerpc/include/asm/ppc440gp.h	/^#define _PPC440GP_H_$/;"	d
_PPC440GX_H_	arch/powerpc/include/asm/ppc440gx.h	/^#define _PPC440GX_H_$/;"	d
_PPC440SPE_H_	arch/powerpc/include/asm/ppc440spe.h	/^#define _PPC440SPE_H_$/;"	d
_PPC440SP_H_	arch/powerpc/include/asm/ppc440sp.h	/^#define _PPC440SP_H_$/;"	d
_PPC460EX_GT_H_	arch/powerpc/include/asm/ppc460ex_gt.h	/^#define _PPC460EX_GT_H_$/;"	d
_PPC460SX_H_	arch/powerpc/include/asm/ppc460sx.h	/^#define _PPC460SX_H_$/;"	d
_PPC4XX_ENET_H_	arch/powerpc/include/asm/ppc4xx-emac.h	/^#define _PPC4XX_ENET_H_$/;"	d
_PPC4xx_EBC_H_	arch/powerpc/include/asm/ppc4xx-ebc.h	/^#define _PPC4xx_EBC_H_$/;"	d
_PPC4xx_ISRAM_H_	arch/powerpc/include/asm/ppc4xx-isram.h	/^#define _PPC4xx_ISRAM_H_$/;"	d
_PPC4xx_SDRAM_H_	arch/powerpc/include/asm/ppc4xx-sdram.h	/^#define _PPC4xx_SDRAM_H_$/;"	d
_PPC4xx_UIC_H_	arch/powerpc/include/asm/ppc4xx-uic.h	/^#define _PPC4xx_UIC_H_$/;"	d
_PPCR	include/SA-1100.h	/^#define _PPCR	/;"	d
_PPC_BITOPS_H	arch/powerpc/include/asm/bitops.h	/^#define _PPC_BITOPS_H$/;"	d
_PPC_BYTEORDER_H	arch/powerpc/include/asm/byteorder.h	/^#define _PPC_BYTEORDER_H$/;"	d
_PPC_H	include/bedbug/ppc.h	/^#define _PPC_H$/;"	d
_PPC_IO_H	arch/powerpc/include/asm/io.h	/^#define _PPC_IO_H$/;"	d
_PPC_KERNEL_M8260_PCI_H	arch/powerpc/include/asm/m8260_pci.h	/^#define _PPC_KERNEL_M8260_PCI_H$/;"	d
_PPC_KERNEL_MPC8349_PCI_H	arch/powerpc/include/asm/mpc8349_pci.h	/^#define _PPC_KERNEL_MPC8349_PCI_H$/;"	d
_PPC_MMU_H_	arch/powerpc/include/asm/mmu.h	/^#define _PPC_MMU_H_$/;"	d
_PPC_POSIX_TYPES_H	arch/powerpc/include/asm/posix_types.h	/^#define _PPC_POSIX_TYPES_H$/;"	d
_PPC_PTRACE_H	arch/powerpc/include/asm/ptrace.h	/^#define _PPC_PTRACE_H$/;"	d
_PPC_STRING_H_	arch/powerpc/include/asm/string.h	/^#define _PPC_STRING_H_$/;"	d
_PPC_TYPES_H	arch/powerpc/include/asm/types.h	/^#define _PPC_TYPES_H$/;"	d
_PPDR	include/SA-1100.h	/^#define _PPDR	/;"	d
_PPFR	include/SA-1100.h	/^#define _PPFR	/;"	d
_PPSR	include/SA-1100.h	/^#define _PPSR	/;"	d
_PRCM_CLK_MOD0_N	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define _PRCM_CLK_MOD0_N(/;"	d
_PRCM_CLK_MOD0_N	arch/arm/include/asm/arch/prcm.h	/^#define _PRCM_CLK_MOD0_N(/;"	d
_PRELOADER_PLL_CONFIG_H_	board/terasic/de0-nano-soc/qts/pll_config.h	/^#define _PRELOADER_PLL_CONFIG_H_$/;"	d
_PSC_DEFS_H_	arch/arm/mach-keystone/include/mach/psc_defs.h	/^#define _PSC_DEFS_H_$/;"	d
_PSDR	include/SA-1100.h	/^#define _PSDR	/;"	d
_PSPR	include/SA-1100.h	/^#define _PSPR	/;"	d
_PSSR	include/SA-1100.h	/^#define _PSSR	/;"	d
_PTE	arch/powerpc/include/asm/mmu.h	/^typedef struct _PTE {$/;"	s
_PTRDIFF_T	include/linux/types.h	/^#define _PTRDIFF_T$/;"	d
_PT_REG_SIZE	arch/microblaze/include/asm/ptrace.h	/^#define _PT_REG_SIZE	/;"	d
_PWER	include/SA-1100.h	/^#define _PWER	/;"	d
_PWM_BACKLIGHT_H_	arch/arm/mach-exynos/include/mach/pwm_backlight.h	/^#define _PWM_BACKLIGHT_H_$/;"	d
_PXA_LCD_H_	include/pxa_lcd.h	/^#define _PXA_LCD_H_$/;"	d
_PXA_REGS_H_	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define _PXA_REGS_H_$/;"	d
_P_UART	arch/blackfin/include/asm/serial.h	/^#define _P_UART(/;"	d
_PrepareOutputSpace	tools/buildman/builder.py	/^    def _PrepareOutputSpace(self):$/;"	m	class:Builder
_PrepareThread	tools/buildman/builder.py	/^    def _PrepareThread(self, thread_num, setup_git):$/;"	m	class:Builder
_PrepareWorkingSpace	tools/buildman/builder.py	/^    def _PrepareWorkingSpace(self, max_threads, setup_git):$/;"	m	class:Builder
_ProcessConfig	tools/buildman/builder.py	/^    def _ProcessConfig(self, fname):$/;"	m	class:Builder
_ProjectConfigParser	tools/patman/settings.py	/^class _ProjectConfigParser(ConfigParser.SafeConfigParser):$/;"	c
_QEMU_DEVICE_H_	arch/x86/include/asm/arch-qemu/device.h	/^#define _QEMU_DEVICE_H_$/;"	d
_QUARK_DEVICE_H_	arch/x86/include/asm/arch-quark/device.h	/^#define _QUARK_DEVICE_H_$/;"	d
_QUARK_H_	arch/x86/include/asm/arch-quark/quark.h	/^#define _QUARK_H_$/;"	d
_QUARK_IOMAP_H_	arch/x86/include/asm/arch-quark/iomap.h	/^#define _QUARK_IOMAP_H_$/;"	d
_QUARK_IRQ_H_	arch/x86/include/asm/arch-quark/irq.h	/^#define _QUARK_IRQ_H_$/;"	d
_QUARK_MSG_PORT_H_	arch/x86/include/asm/arch-quark/msg_port.h	/^#define _QUARK_MSG_PORT_H_$/;"	d
_QUEENSBAY_DEVICE_H_	arch/x86/include/asm/arch-queensbay/device.h	/^#define _QUEENSBAY_DEVICE_H_$/;"	d
_R	arch/arm/mach-tegra/pinmux-common.c	/^#define _R(/;"	d	file:
_RADEON_H	include/radeon.h	/^#define _RADEON_H$/;"	d
_RCNR	include/SA-1100.h	/^#define _RCNR	/;"	d
_RCSR	include/SA-1100.h	/^#define _RCSR	/;"	d
_REENT_ONLY	include/linux/time.h	/^#define _REENT_ONLY$/;"	d
_REGPARM	arch/x86/cpu/setjmp.S	/^#define _REGPARM$/;"	d	file:
_REGS_H	include/bedbug/regs.h	/^#define _REGS_H$/;"	d
_REG_EBI_PLATINUMAVC_H_	board/micronas/vct/vctv/reg_ebi.h	/^#define _REG_EBI_PLATINUMAVC_H_$/;"	d
_REG_EBI_PREMIUM_H_	board/micronas/vct/vcth/reg_ebi.h	/^#define _REG_EBI_PREMIUM_H_$/;"	d
_REG_EBI_PREMIUM_H_	board/micronas/vct/vcth2/reg_ebi.h	/^#define _REG_EBI_PREMIUM_H_$/;"	d
_REG_FWSRAM_H_	board/micronas/vct/vcth/reg_fwsram.h	/^#define _REG_FWSRAM_H_$/;"	d
_REG_SCC_PREMIUM_H_	board/micronas/vct/vcth/reg_scc.h	/^#define _REG_SCC_PREMIUM_H_$/;"	d
_RELOCATE_H_	arch/x86/include/asm/relocate.h	/^#define _RELOCATE_H_$/;"	d
_RESET_H	include/reset.h	/^#define _RESET_H$/;"	d
_RESET_MANAGER_H_	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^#define	_RESET_MANAGER_H_$/;"	d
_RESET_UCLASS_H	include/reset-uclass.h	/^#define _RESET_UCLASS_H$/;"	d
_RKCOMMON_H	tools/rkcommon.h	/^#define _RKCOMMON_H$/;"	d
_RMOBILE_MMC_H_	arch/arm/mach-rmobile/include/mach/mmc.h	/^#define _RMOBILE_MMC_H_$/;"	d
_ROCKCHIP_COMMON_H_	include/configs/rockchip-common.h	/^#define _ROCKCHIP_COMMON_H_$/;"	d
_RPROC_H_	include/remoteproc.h	/^#define _RPROC_H_$/;"	d
_RSA_CHECKSUM_H	include/u-boot/rsa-checksum.h	/^#define _RSA_CHECKSUM_H$/;"	d
_RSA_H	include/u-boot/rsa.h	/^#define _RSA_H$/;"	d
_RSA_MOD_EXP_H	include/u-boot/rsa-mod-exp.h	/^#define _RSA_MOD_EXP_H$/;"	d
_RSRR	include/SA-1100.h	/^#define _RSRR	/;"	d
_RSV1_PKT_CSUM	drivers/net/pic32_eth.h	/^#define _RSV1_PKT_CSUM	/;"	d
_RSV2_CRC_ERR	drivers/net/pic32_eth.h	/^#define _RSV2_CRC_ERR	/;"	d
_RSV2_LEN_ERR	drivers/net/pic32_eth.h	/^#define _RSV2_LEN_ERR	/;"	d
_RSV2_RX_COUNT	drivers/net/pic32_eth.h	/^#define _RSV2_RX_COUNT	/;"	d
_RSV2_RX_OK	drivers/net/pic32_eth.h	/^#define _RSV2_RX_OK	/;"	d
_RTAR	include/SA-1100.h	/^#define _RTAR	/;"	d
_RTC_H_	include/rtc.h	/^#define _RTC_H_$/;"	d
_RTL8152_ETH_H	drivers/usb/eth/r8152.h	/^#define _RTL8152_ETH_H$/;"	d
_RTSR	include/SA-1100.h	/^#define _RTSR	/;"	d
_RTTR	include/SA-1100.h	/^#define _RTTR	/;"	d
_RX51_H_	board/nokia/rx51/rx51.h	/^#define _RX51_H_$/;"	d
_RdDCSR	include/SA-1100.h	/^#define _RdDCSR(/;"	d
_RdDCSR0	include/SA-1100.h	/^#define _RdDCSR0	/;"	d
_RdDCSR1	include/SA-1100.h	/^#define _RdDCSR1	/;"	d
_RdDCSR2	include/SA-1100.h	/^#define _RdDCSR2	/;"	d
_RdDCSR3	include/SA-1100.h	/^#define _RdDCSR3	/;"	d
_RdDCSR4	include/SA-1100.h	/^#define _RdDCSR4	/;"	d
_RdDCSR5	include/SA-1100.h	/^#define _RdDCSR5	/;"	d
_ReadAliasFile	tools/patman/settings.py	/^def _ReadAliasFile(fname):$/;"	f
_RemoveOutputDir	tools/patman/tools.py	/^def _RemoveOutputDir():$/;"	f
_ResetVector	arch/xtensa/cpu/start.S	/^_ResetVector:$/;"	l
_RunBuildman	tools/buildman/func_test.py	/^    def _RunBuildman(self, *args):$/;"	m	class:TestFunctional
_RunControl	tools/buildman/func_test.py	/^    def _RunControl(self, *args, **kwargs):$/;"	m	class:TestFunctional
_S	include/linux/ctype.h	/^#define _S	/;"	d
_S3C24X0_GPIO_H_	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^#define _S3C24X0_GPIO_H_$/;"	d
_S3C24X0_I2C_H	drivers/i2c/s3c24x0_i2c.h	/^#define _S3C24X0_I2C_H$/;"	d
_S3C24X0_IOMUX_H_	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^#define _S3C24X0_IOMUX_H_$/;"	d
_S5PC1XX_CPU_H	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^#define _S5PC1XX_CPU_H$/;"	d
_S6E63D6_H_	include/s6e63d6.h	/^#define _S6E63D6_H_$/;"	d
_SANDBOX_ADC_H_	include/sandbox-adc.h	/^#define _SANDBOX_ADC_H_$/;"	d
_SANDBOX_CMDLINE_OPT	arch/sandbox/include/asm/getopt.h	/^#define _SANDBOX_CMDLINE_OPT(/;"	d
_SANDBOX_PMIC_H_	include/power/sandbox_pmic.h	/^#define  _SANDBOX_PMIC_H_$/;"	d
_SATA_DWC_H_	drivers/block/sata_dwc.h	/^#define _SATA_DWC_H_$/;"	d
_SATA_H_	drivers/phy/marvell/sata.h	/^#define _SATA_H_$/;"	d
_SCAN_MANAGER_H_	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^#define	_SCAN_MANAGER_H_$/;"	d
_SCC_H	board/micronas/vct/scc.h	/^#define _SCC_H$/;"	d
_SCLK	arch/blackfin/cpu/initcode.c	/^#define _SCLK /;"	d	file:
_SCREEN_INFO_H	include/linux/screen_info.h	/^#define _SCREEN_INFO_H$/;"	d
_SCSI_H	include/scsi.h	/^ #define _SCSI_H$/;"	d
_SCU_H_	arch/arm/include/asm/arch-tegra/scu.h	/^#define _SCU_H_$/;"	d
_SC_PAGE_SIZE	include/malloc.h	/^#      define _SC_PAGE_SIZE /;"	d
_SDMMC_DEFS_H_	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^#define _SDMMC_DEFS_H_$/;"	d
_SDP4430_MUX_DATA_H	board/ti/sdp4430/sdp4430_mux_data.h	/^#define _SDP4430_MUX_DATA_H$/;"	d
_SDRAM_H_	arch/arm/mach-socfpga/include/mach/sdram.h	/^#define	_SDRAM_H_$/;"	d
_SDRAM_H_	arch/powerpc/cpu/ppc4xx/sdram.h	/^#define _SDRAM_H_$/;"	d
_SDRAM_PARAM_H_	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^#define _SDRAM_PARAM_H_$/;"	d
_SEARCH_H_	include/search.h	/^#define _SEARCH_H_$/;"	d
_SEGREG	arch/powerpc/include/asm/mmu.h	/^typedef struct _SEGREG {$/;"	s
_SEQUENCER_H_	drivers/ddr/altera/sequencer.h	/^#define _SEQUENCER_H_$/;"	d
_SEQ_EXEC_H	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^#define _SEQ_EXEC_H$/;"	d
_SERIAL_STM32_X7_	drivers/serial/serial_stm32x7.h	/^#define _SERIAL_STM32_X7_$/;"	d
_SERVICES_CRC_CRC_H_	include/crc.h	/^#define _SERVICES_CRC_CRC_H_$/;"	d
_SETJMP_H_	arch/arm/include/asm/setjmp.h	/^#define _SETJMP_H_	/;"	d
_SET_OFFSET	arch/mips/mach-pic32/include/mach/pic32.h	/^#define _SET_OFFSET	/;"	d
_SF_INTERNAL_H_	drivers/mtd/spi/sf_internal.h	/^#define _SF_INTERNAL_H_$/;"	d
_SHA1_H	include/u-boot/sha1.h	/^#define _SHA1_H$/;"	d
_SHA256_H	include/u-boot/sha256.h	/^#define _SHA256_H$/;"	d
_SHARED_RESOURCES_H_	arch/blackfin/include/asm/shared_resources.h	/^#define _SHARED_RESOURCES_H_$/;"	d
_SHA_H	drivers/crypto/fsl/fsl_hash.h	/^#define _SHA_H$/;"	d
_SH_MMCIF_H_	drivers/mmc/sh_mmcif.h	/^#define _SH_MMCIF_H_$/;"	d
_SH_MMC_H_	arch/sh/include/asm/mmc.h	/^#define _SH_MMC_H_$/;"	d
_SH_SDHI_H	arch/arm/mach-rmobile/include/mach/sh_sdhi.h	/^#define _SH_SDHI_H$/;"	d
_SIZE_T	include/linux/types.h	/^#define _SIZE_T$/;"	d
_SJA1000_H_	include/sja1000.h	/^#define _SJA1000_H_$/;"	d
_SLAVE_IMAGE	include/universe.h	/^struct _SLAVE_IMAGE {$/;"	s
_SM501_H_	include/sm501.h	/^#define _SM501_H_$/;"	d
_SMBIOS_H_	include/smbios.h	/^#define _SMBIOS_H_$/;"	d
_SMC91111_H_	drivers/net/smc91111.h	/^#define _SMC91111_H_$/;"	d
_SMC911X_H_	drivers/net/smc911x.h	/^#define _SMC911X_H_$/;"	d
_SMC_H_	arch/x86/cpu/quark/smc.h	/^#define _SMC_H_$/;"	d
_SMDK5250_SETUP_H	arch/arm/mach-exynos/exynos5_setup.h	/^#define _SMDK5250_SETUP_H$/;"	d
_SMSC_LPC47M_H_	include/smsc_lpc47m.h	/^#define _SMSC_LPC47M_H_$/;"	d
_SMSC_SIO1007_H_	include/smsc_sio1007.h	/^#define _SMSC_SIO1007_H_$/;"	d
_SNIPER_H_	board/lg/sniper/sniper.h	/^#define _SNIPER_H_$/;"	d
_SOCFPGA_A10_BASE_HARDWARE_H_	arch/arm/mach-socfpga/include/mach/base_addr_a10.h	/^#define _SOCFPGA_A10_BASE_HARDWARE_H_$/;"	d
_SOCFPGA_BASE_ADDRS_H_	arch/arm/mach-socfpga/include/mach/base_addr_ac5.h	/^#define _SOCFPGA_BASE_ADDRS_H_$/;"	d
_SOCFPGA_GPIO_H	arch/arm/mach-socfpga/include/mach/gpio.h	/^#define _SOCFPGA_GPIO_H$/;"	d
_SOCFPGA_TIMER_H_	arch/arm/mach-socfpga/include/mach/timer.h	/^#define _SOCFPGA_TIMER_H_$/;"	d
_SP	include/linux/ctype.h	/^#define _SP	/;"	d
_SPARC_ASI_H	arch/sparc/include/asm/asi.h	/^#define _SPARC_ASI_H$/;"	d
_SPARC_BITOPS_H	arch/sparc/include/asm/bitops.h	/^#define _SPARC_BITOPS_H$/;"	d
_SPARC_BYTEORDER_H	arch/sparc/include/asm/byteorder.h	/^#define _SPARC_BYTEORDER_H$/;"	d
_SPARC_IO_H	arch/sparc/include/asm/io.h	/^#define _SPARC_IO_H$/;"	d
_SPARC_PAGE_H	arch/sparc/include/asm/page.h	/^#define _SPARC_PAGE_H$/;"	d
_SPARC_STRING_H_	arch/sparc/include/asm/string.h	/^#define _SPARC_STRING_H_$/;"	d
_SPARC_TYPES_H	arch/sparc/include/asm/types.h	/^#define _SPARC_TYPES_H$/;"	d
_SPARTAN2_H_	include/spartan2.h	/^#define _SPARTAN2_H_$/;"	d
_SPARTAN3_H_	include/spartan3.h	/^#define _SPARTAN3_H_$/;"	d
_SPD_H_	include/spd.h	/^#define _SPD_H_$/;"	d
_SPD_SDRAM_H_	include/spd_sdram.h	/^#define _SPD_SDRAM_H_$/;"	d
_SPEAR_COMMON_H	include/configs/spear-common.h	/^#define _SPEAR_COMMON_H$/;"	d
_SPI_CHANNEL_H_	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^#define _SPI_CHANNEL_H_$/;"	d
_SPI_FLASH_H_	include/spi_flash.h	/^#define _SPI_FLASH_H_$/;"	d
_SPI_H_	include/spi.h	/^#define _SPI_H_$/;"	d
_SPLASH_H_	include/splash.h	/^#define _SPLASH_H_$/;"	d
_SPL_BUILD	include/common.h	/^#define _SPL_BUILD	/;"	d
_SPL_H_	include/spl.h	/^#define	_SPL_H_$/;"	d
_SPMI_SPMI_H	include/spmi/spmi.h	/^#define _SPMI_SPMI_H$/;"	d
_SPR_GPT_H	arch/arm/include/asm/arch-spear/spr_gpt.h	/^#define _SPR_GPT_H$/;"	d
_SPR_MISC_H	arch/arm/include/asm/arch-spear/spr_misc.h	/^#define _SPR_MISC_H$/;"	d
_SPR_SSP_H	arch/arm/include/asm/arch-spear/spr_ssp.h	/^#define _SPR_SSP_H$/;"	d
_SSD2828_H	drivers/video/ssd2828.h	/^#define _SSD2828_H$/;"	d
_SSIZE_T	include/linux/types.h	/^#define _SSIZE_T$/;"	d
_START	arch/m68k/cpu/mcf5227x/start.S	/^#define _START	/;"	d	file:
_START	arch/m68k/cpu/mcf523x/start.S	/^#define _START	/;"	d	file:
_START	arch/m68k/cpu/mcf52x2/start.S	/^#define _START	/;"	d	file:
_START	arch/m68k/cpu/mcf530x/start.S	/^#define _START	/;"	d	file:
_START	arch/m68k/cpu/mcf532x/start.S	/^#define _START	/;"	d	file:
_START	arch/m68k/cpu/mcf5445x/start.S	/^#define _START	/;"	d	file:
_START	arch/m68k/cpu/mcf547x_8x/start.S	/^#define _START	/;"	d	file:
_START_OFFSET	arch/powerpc/cpu/mpc512x/asm-offsets.h	/^#define	_START_OFFSET	/;"	d
_START_OFFSET	arch/powerpc/cpu/ppc4xx/start.S	/^	. = _START_OFFSET$/;"	d
_START_OFFSET	arch/powerpc/include/asm/immap_512x.h	/^#define	_START_OFFSET	/;"	d
_START_OFFSET	arch/powerpc/include/asm/ppc4xx.h	/^#define _START_OFFSET	/;"	d
_START_OFFSET	include/mpc5xx.h	/^#define _START_OFFSET	/;"	d
_START_OFFSET	include/mpc5xxx.h	/^#define _START_OFFSET	/;"	d
_START_OFFSET	include/mpc8260.h	/^#define _START_OFFSET	/;"	d
_START_OFFSET	include/mpc83xx.h	/^#define	_START_OFFSET	/;"	d
_START_OFFSET	include/mpc86xx.h	/^#define _START_OFFSET	/;"	d
_START_OFFSET	include/mpc8xx.h	/^#define _START_OFFSET	/;"	d
_STATUS_LED_H_	include/status_led.h	/^#define	_STATUS_LED_H_$/;"	d
_STDIO_DEV_H_	include/stdio_dev.h	/^#define _STDIO_DEV_H_$/;"	d
_STM32_GPIO_H_	arch/arm/include/asm/arch-stm32f1/gpio.h	/^#define _STM32_GPIO_H_$/;"	d
_STM32_GPIO_H_	arch/arm/include/asm/arch-stm32f4/gpio.h	/^#define _STM32_GPIO_H_$/;"	d
_STM32_GPIO_H_	arch/arm/include/asm/arch-stm32f7/gpio.h	/^#define _STM32_GPIO_H_$/;"	d
_STM32_GPT_H	arch/arm/include/asm/arch-stm32f7/gpt.h	/^#define _STM32_GPT_H$/;"	d
_STM32_RCC_H	arch/arm/include/asm/arch-stm32f7/rcc.h	/^#define _STM32_RCC_H$/;"	d
_STRATIXII_H_	include/stratixII.h	/^#define _STRATIXII_H_$/;"	d
_STV0991_CGU_H	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^#define _STV0991_CGU_H$/;"	d
_STV0991_CREG_H	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^#define _STV0991_CREG_H$/;"	d
_STV0991_GPT_H	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^#define _STV0991_GPT_H$/;"	d
_STV0991_WD_RST_H	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^#define _STV0991_WD_RST_H$/;"	d
_SUNXI_CLOCK_H	arch/arm/include/asm/arch-sunxi/clock.h	/^#define _SUNXI_CLOCK_H$/;"	d
_SUNXI_CLOCK_H	arch/arm/include/asm/arch/clock.h	/^#define _SUNXI_CLOCK_H$/;"	d
_SUNXI_CLOCK_SUN4I_H	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^#define _SUNXI_CLOCK_SUN4I_H$/;"	d
_SUNXI_CLOCK_SUN4I_H	arch/arm/include/asm/arch/clock_sun4i.h	/^#define _SUNXI_CLOCK_SUN4I_H$/;"	d
_SUNXI_CLOCK_SUN6I_H	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^#define _SUNXI_CLOCK_SUN6I_H$/;"	d
_SUNXI_CLOCK_SUN6I_H	arch/arm/include/asm/arch/clock_sun6i.h	/^#define _SUNXI_CLOCK_SUN6I_H$/;"	d
_SUNXI_CLOCK_SUN8I_A83T_H	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^#define _SUNXI_CLOCK_SUN8I_A83T_H$/;"	d
_SUNXI_CLOCK_SUN8I_A83T_H	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^#define _SUNXI_CLOCK_SUN8I_A83T_H$/;"	d
_SUNXI_CLOCK_SUN9I_H	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^#define _SUNXI_CLOCK_SUN9I_H$/;"	d
_SUNXI_CLOCK_SUN9I_H	arch/arm/include/asm/arch/clock_sun9i.h	/^#define _SUNXI_CLOCK_SUN9I_H$/;"	d
_SUNXI_COMMON_CONFIG_H	include/configs/sunxi-common.h	/^#define _SUNXI_COMMON_CONFIG_H$/;"	d
_SUNXI_CPUCFG_H	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^#define _SUNXI_CPUCFG_H$/;"	d
_SUNXI_CPUCFG_H	arch/arm/include/asm/arch/cpucfg.h	/^#define _SUNXI_CPUCFG_H$/;"	d
_SUNXI_CPU_H	arch/arm/include/asm/arch-sunxi/cpu.h	/^#define _SUNXI_CPU_H$/;"	d
_SUNXI_CPU_H	arch/arm/include/asm/arch/cpu.h	/^#define _SUNXI_CPU_H$/;"	d
_SUNXI_CPU_SUN4I_H	arch/arm/include/asm/arch-sunxi/cpu_sun4i.h	/^#define _SUNXI_CPU_SUN4I_H$/;"	d
_SUNXI_CPU_SUN4I_H	arch/arm/include/asm/arch/cpu_sun4i.h	/^#define _SUNXI_CPU_SUN4I_H$/;"	d
_SUNXI_CPU_SUN9I_H	arch/arm/include/asm/arch-sunxi/cpu_sun9i.h	/^#define _SUNXI_CPU_SUN9I_H$/;"	d
_SUNXI_CPU_SUN9I_H	arch/arm/include/asm/arch/cpu_sun9i.h	/^#define _SUNXI_CPU_SUN9I_H$/;"	d
_SUNXI_DISPLAY2_H	arch/arm/include/asm/arch-sunxi/display2.h	/^#define _SUNXI_DISPLAY2_H$/;"	d
_SUNXI_DISPLAY2_H	arch/arm/include/asm/arch/display2.h	/^#define _SUNXI_DISPLAY2_H$/;"	d
_SUNXI_DISPLAY_H	arch/arm/include/asm/arch-sunxi/display.h	/^#define _SUNXI_DISPLAY_H$/;"	d
_SUNXI_DISPLAY_H	arch/arm/include/asm/arch/display.h	/^#define _SUNXI_DISPLAY_H$/;"	d
_SUNXI_DMA_H	arch/arm/include/asm/arch-sunxi/dma.h	/^#define _SUNXI_DMA_H$/;"	d
_SUNXI_DMA_H	arch/arm/include/asm/arch/dma.h	/^#define _SUNXI_DMA_H$/;"	d
_SUNXI_DMA_SUN4I_H	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^#define _SUNXI_DMA_SUN4I_H$/;"	d
_SUNXI_DMA_SUN4I_H	arch/arm/include/asm/arch/dma_sun4i.h	/^#define _SUNXI_DMA_SUN4I_H$/;"	d
_SUNXI_DRAM_H	arch/arm/include/asm/arch-sunxi/dram.h	/^#define _SUNXI_DRAM_H$/;"	d
_SUNXI_DRAM_H	arch/arm/include/asm/arch/dram.h	/^#define _SUNXI_DRAM_H$/;"	d
_SUNXI_DRAM_SUN4I_H	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^#define _SUNXI_DRAM_SUN4I_H$/;"	d
_SUNXI_DRAM_SUN4I_H	arch/arm/include/asm/arch/dram_sun4i.h	/^#define _SUNXI_DRAM_SUN4I_H$/;"	d
_SUNXI_DRAM_SUN6I_H	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^#define _SUNXI_DRAM_SUN6I_H$/;"	d
_SUNXI_DRAM_SUN6I_H	arch/arm/include/asm/arch/dram_sun6i.h	/^#define _SUNXI_DRAM_SUN6I_H$/;"	d
_SUNXI_DRAM_SUN8I_A33_H	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^#define _SUNXI_DRAM_SUN8I_A33_H$/;"	d
_SUNXI_DRAM_SUN8I_A33_H	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^#define _SUNXI_DRAM_SUN8I_A33_H$/;"	d
_SUNXI_DRAM_SUN8I_A83T_H	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^#define _SUNXI_DRAM_SUN8I_A83T_H$/;"	d
_SUNXI_DRAM_SUN8I_A83T_H	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^#define _SUNXI_DRAM_SUN8I_A83T_H$/;"	d
_SUNXI_DRAM_SUN8I_H	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^#define _SUNXI_DRAM_SUN8I_H$/;"	d
_SUNXI_DRAM_SUN8I_H	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^#define _SUNXI_DRAM_SUN8I_H$/;"	d
_SUNXI_DRAM_SUN8I_H3_H	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^#define _SUNXI_DRAM_SUN8I_H3_H$/;"	d
_SUNXI_DRAM_SUN8I_H3_H	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^#define _SUNXI_DRAM_SUN8I_H3_H$/;"	d
_SUNXI_DRAM_SUN9I_H	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^#define _SUNXI_DRAM_SUN9I_H$/;"	d
_SUNXI_DRAM_SUN9I_H	arch/arm/include/asm/arch/dram_sun9i.h	/^#define _SUNXI_DRAM_SUN9I_H$/;"	d
_SUNXI_GPIO_H	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define _SUNXI_GPIO_H$/;"	d
_SUNXI_GPIO_H	arch/arm/include/asm/arch/gpio.h	/^#define _SUNXI_GPIO_H$/;"	d
_SUNXI_GTBUS_H	arch/arm/include/asm/arch-sunxi/gtbus.h	/^#define _SUNXI_GTBUS_H$/;"	d
_SUNXI_GTBUS_H	arch/arm/include/asm/arch/gtbus.h	/^#define _SUNXI_GTBUS_H$/;"	d
_SUNXI_GTBUS_SUN9I_H	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^#define _SUNXI_GTBUS_SUN9I_H$/;"	d
_SUNXI_GTBUS_SUN9I_H	arch/arm/include/asm/arch/gtbus_sun9i.h	/^#define _SUNXI_GTBUS_SUN9I_H$/;"	d
_SUNXI_I2C_H_	arch/arm/include/asm/arch-sunxi/i2c.h	/^#define _SUNXI_I2C_H_$/;"	d
_SUNXI_I2C_H_	arch/arm/include/asm/arch/i2c.h	/^#define _SUNXI_I2C_H_$/;"	d
_SUNXI_MMC_H	arch/arm/include/asm/arch-sunxi/mmc.h	/^#define _SUNXI_MMC_H$/;"	d
_SUNXI_MMC_H	arch/arm/include/asm/arch/mmc.h	/^#define _SUNXI_MMC_H$/;"	d
_SUNXI_P2WI_H	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define _SUNXI_P2WI_H$/;"	d
_SUNXI_P2WI_H	arch/arm/include/asm/arch/p2wi.h	/^#define _SUNXI_P2WI_H$/;"	d
_SUNXI_PMIS_BUS_H	arch/arm/include/asm/arch-sunxi/pmic_bus.h	/^#define _SUNXI_PMIS_BUS_H$/;"	d
_SUNXI_PMIS_BUS_H	arch/arm/include/asm/arch/pmic_bus.h	/^#define _SUNXI_PMIS_BUS_H$/;"	d
_SUNXI_PRCM_H	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define _SUNXI_PRCM_H$/;"	d
_SUNXI_PRCM_H	arch/arm/include/asm/arch/prcm.h	/^#define _SUNXI_PRCM_H$/;"	d
_SUNXI_PWM_H	arch/arm/include/asm/arch-sunxi/pwm.h	/^#define _SUNXI_PWM_H$/;"	d
_SUNXI_PWM_H	arch/arm/include/asm/arch/pwm.h	/^#define _SUNXI_PWM_H$/;"	d
_SUNXI_TIMER_H_	arch/arm/include/asm/arch-sunxi/timer.h	/^#define _SUNXI_TIMER_H_$/;"	d
_SUNXI_TIMER_H_	arch/arm/include/asm/arch/timer.h	/^#define _SUNXI_TIMER_H_$/;"	d
_SUNXI_TZPC_H	arch/arm/include/asm/arch-sunxi/tzpc.h	/^#define _SUNXI_TZPC_H$/;"	d
_SUNXI_TZPC_H	arch/arm/include/asm/arch/tzpc.h	/^#define _SUNXI_TZPC_H$/;"	d
_SUNXI_WATCHDOG_H_	arch/arm/include/asm/arch-sunxi/watchdog.h	/^#define _SUNXI_WATCHDOG_H_$/;"	d
_SUNXI_WATCHDOG_H_	arch/arm/include/asm/arch/watchdog.h	/^#define _SUNXI_WATCHDOG_H_$/;"	d
_SYM53C8XX_DEFS_H	include/sym53c8xx.h	/^#define _SYM53C8XX_DEFS_H$/;"	d
_SYMBOL_TABLE	tools/genboardscfg.py	/^    _SYMBOL_TABLE = {$/;"	v	class:KconfigScanner
_SYSCTRL_H_	arch/arm/include/asm/arch-armv7/sysctrl.h	/^#define _SYSCTRL_H_$/;"	d
_SYSTEM_MANAGER_H_	arch/arm/mach-socfpga/include/mach/system_manager.h	/^#define	_SYSTEM_MANAGER_H_$/;"	d
_SYSTIMER_H_	arch/arm/include/asm/arch-armv7/systimer.h	/^#define _SYSTIMER_H_$/;"	d
_SYS_DMU_H	include/zfs/dmu.h	/^#define	_SYS_DMU_H$/;"	d
_SYS_DMU_OBJSET_H	include/zfs/dmu_objset.h	/^#define	_SYS_DMU_OBJSET_H$/;"	d
_SYS_DNODE_H	include/zfs/dnode.h	/^#define	_SYS_DNODE_H$/;"	d
_SYS_DSL_DATASET_H	include/zfs/dsl_dataset.h	/^#define	_SYS_DSL_DATASET_H$/;"	d
_SYS_DSL_DIR_H	include/zfs/dsl_dir.h	/^#define	_SYS_DSL_DIR_H$/;"	d
_SYS_ENV_LIB_H	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^#define _SYS_ENV_LIB_H$/;"	d
_SYS_FS_ZFS_ACL_H	include/zfs/zfs_acl.h	/^#define	_SYS_FS_ZFS_ACL_H$/;"	d
_SYS_FS_ZFS_ZNODE_H	include/zfs/zfs_znode.h	/^#define	_SYS_FS_ZFS_ZNODE_H$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch-am33xx/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch-omap3/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch-omap4/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch-omap5/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch-sunxi/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch-tegra/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/arch/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/include/asm/imx-common/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/mach-exynos/include/mach/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/mach-rmobile/include/mach/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/mach-s5pc1xx/include/mach/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_PROTO_H_	arch/arm/mach-zynq/include/mach/sys_proto.h	/^#define _SYS_PROTO_H_$/;"	d
_SYS_SA_IMPL_H	include/zfs/sa_impl.h	/^#define	_SYS_SA_IMPL_H$/;"	d
_SYS_UBERBLOCK_IMPL_H	include/zfs/uberblock_impl.h	/^#define	_SYS_UBERBLOCK_IMPL_H$/;"	d
_SYS_VDEV_IMPL_H	include/zfs/vdev_impl.h	/^#define	_SYS_VDEV_IMPL_H$/;"	d
_SYS_ZAP_IMPL_H	include/zfs/zap_impl.h	/^#define	_SYS_ZAP_IMPL_H$/;"	d
_SYS_ZAP_LEAF_H	include/zfs/zap_leaf.h	/^#define	_SYS_ZAP_LEAF_H$/;"	d
_SYS_ZIL_H	include/zfs/zil.h	/^#define	_SYS_ZIL_H$/;"	d
_SYS_ZIO_CHECKSUM_H	include/zfs/zio_checksum.h	/^#define	_SYS_ZIO_CHECKSUM_H$/;"	d
_Ser0UDCAR	include/SA-1100.h	/^#define _Ser0UDCAR	/;"	d
_Ser0UDCCR	include/SA-1100.h	/^#define _Ser0UDCCR	/;"	d
_Ser0UDCCS0	include/SA-1100.h	/^#define _Ser0UDCCS0	/;"	d
_Ser0UDCCS1	include/SA-1100.h	/^#define _Ser0UDCCS1	/;"	d
_Ser0UDCCS2	include/SA-1100.h	/^#define _Ser0UDCCS2	/;"	d
_Ser0UDCD0	include/SA-1100.h	/^#define _Ser0UDCD0	/;"	d
_Ser0UDCDR	include/SA-1100.h	/^#define _Ser0UDCDR	/;"	d
_Ser0UDCIMP	include/SA-1100.h	/^#define _Ser0UDCIMP	/;"	d
_Ser0UDCOMP	include/SA-1100.h	/^#define _Ser0UDCOMP	/;"	d
_Ser0UDCSR	include/SA-1100.h	/^#define _Ser0UDCSR	/;"	d
_Ser0UDCWC	include/SA-1100.h	/^#define _Ser0UDCWC	/;"	d
_Ser1SDCR0	include/SA-1100.h	/^#define _Ser1SDCR0	/;"	d
_Ser1SDCR1	include/SA-1100.h	/^#define _Ser1SDCR1	/;"	d
_Ser1SDCR2	include/SA-1100.h	/^#define _Ser1SDCR2	/;"	d
_Ser1SDCR3	include/SA-1100.h	/^#define _Ser1SDCR3	/;"	d
_Ser1SDCR4	include/SA-1100.h	/^#define _Ser1SDCR4	/;"	d
_Ser1SDDR	include/SA-1100.h	/^#define _Ser1SDDR	/;"	d
_Ser1SDSR0	include/SA-1100.h	/^#define _Ser1SDSR0	/;"	d
_Ser1SDSR1	include/SA-1100.h	/^#define _Ser1SDSR1	/;"	d
_Ser1UTCR0	include/SA-1100.h	/^#define _Ser1UTCR0	/;"	d
_Ser1UTCR1	include/SA-1100.h	/^#define _Ser1UTCR1	/;"	d
_Ser1UTCR2	include/SA-1100.h	/^#define _Ser1UTCR2	/;"	d
_Ser1UTCR3	include/SA-1100.h	/^#define _Ser1UTCR3	/;"	d
_Ser1UTDR	include/SA-1100.h	/^#define _Ser1UTDR	/;"	d
_Ser1UTSR0	include/SA-1100.h	/^#define _Ser1UTSR0	/;"	d
_Ser1UTSR1	include/SA-1100.h	/^#define _Ser1UTSR1	/;"	d
_Ser2HSCR0	include/SA-1100.h	/^#define _Ser2HSCR0	/;"	d
_Ser2HSCR1	include/SA-1100.h	/^#define _Ser2HSCR1	/;"	d
_Ser2HSCR2	include/SA-1100.h	/^#define _Ser2HSCR2	/;"	d
_Ser2HSDR	include/SA-1100.h	/^#define _Ser2HSDR	/;"	d
_Ser2HSSR0	include/SA-1100.h	/^#define _Ser2HSSR0	/;"	d
_Ser2HSSR1	include/SA-1100.h	/^#define _Ser2HSSR1	/;"	d
_Ser2UTCR0	include/SA-1100.h	/^#define _Ser2UTCR0	/;"	d
_Ser2UTCR1	include/SA-1100.h	/^#define _Ser2UTCR1	/;"	d
_Ser2UTCR2	include/SA-1100.h	/^#define _Ser2UTCR2	/;"	d
_Ser2UTCR3	include/SA-1100.h	/^#define _Ser2UTCR3	/;"	d
_Ser2UTCR4	include/SA-1100.h	/^#define _Ser2UTCR4	/;"	d
_Ser2UTDR	include/SA-1100.h	/^#define _Ser2UTDR	/;"	d
_Ser2UTSR0	include/SA-1100.h	/^#define _Ser2UTSR0	/;"	d
_Ser2UTSR1	include/SA-1100.h	/^#define _Ser2UTSR1	/;"	d
_Ser3UTCR0	include/SA-1100.h	/^#define _Ser3UTCR0	/;"	d
_Ser3UTCR1	include/SA-1100.h	/^#define _Ser3UTCR1	/;"	d
_Ser3UTCR2	include/SA-1100.h	/^#define _Ser3UTCR2	/;"	d
_Ser3UTCR3	include/SA-1100.h	/^#define _Ser3UTCR3	/;"	d
_Ser3UTDR	include/SA-1100.h	/^#define _Ser3UTDR	/;"	d
_Ser3UTSR0	include/SA-1100.h	/^#define _Ser3UTSR0	/;"	d
_Ser3UTSR1	include/SA-1100.h	/^#define _Ser3UTSR1	/;"	d
_Ser4MCCR0	include/SA-1100.h	/^#define _Ser4MCCR0	/;"	d
_Ser4MCCR1	include/SA-1100.h	/^#define _Ser4MCCR1	/;"	d
_Ser4MCDR0	include/SA-1100.h	/^#define _Ser4MCDR0	/;"	d
_Ser4MCDR1	include/SA-1100.h	/^#define _Ser4MCDR1	/;"	d
_Ser4MCDR2	include/SA-1100.h	/^#define _Ser4MCDR2	/;"	d
_Ser4MCSR	include/SA-1100.h	/^#define _Ser4MCSR	/;"	d
_Ser4SSCR0	include/SA-1100.h	/^#define _Ser4SSCR0	/;"	d
_Ser4SSCR1	include/SA-1100.h	/^#define _Ser4SSCR1	/;"	d
_Ser4SSDR	include/SA-1100.h	/^#define _Ser4SSDR	/;"	d
_Ser4SSSR	include/SA-1100.h	/^#define _Ser4SSSR	/;"	d
_SetDCSR	include/SA-1100.h	/^#define _SetDCSR(/;"	d
_SetDCSR0	include/SA-1100.h	/^#define _SetDCSR0	/;"	d
_SetDCSR1	include/SA-1100.h	/^#define _SetDCSR1	/;"	d
_SetDCSR2	include/SA-1100.h	/^#define _SetDCSR2	/;"	d
_SetDCSR3	include/SA-1100.h	/^#define _SetDCSR3	/;"	d
_SetDCSR4	include/SA-1100.h	/^#define _SetDCSR4	/;"	d
_SetDCSR5	include/SA-1100.h	/^#define _SetDCSR5	/;"	d
_StMemBnk	include/SA-1100.h	/^#define _StMemBnk(/;"	d
_StMemBnk0	include/SA-1100.h	/^#define _StMemBnk0	/;"	d
_StMemBnk1	include/SA-1100.h	/^#define _StMemBnk1	/;"	d
_StMemBnk2	include/SA-1100.h	/^#define _StMemBnk2	/;"	d
_StMemBnk3	include/SA-1100.h	/^#define _StMemBnk3	/;"	d
_TABLES_CSUM_H_	include/tables_csum.h	/^#define _TABLES_CSUM_H_$/;"	d
_TAM3517_H_	board/technexion/twister/twister.h	/^#define _TAM3517_H_$/;"	d
_TAO3530_H_	board/technexion/tao3530/tao3530.h	/^#define _TAO3530_H_$/;"	d
_TDMA_CMD_PACKET	include/tsi148.h	/^struct _TDMA_CMD_PACKET {$/;"	s
_TDMA_CMD_PACKET	include/universe.h	/^struct _TDMA_CMD_PACKET {$/;"	s
_TEGRA114_CLOCK_H_	arch/arm/include/asm/arch-tegra114/clock.h	/^#define _TEGRA114_CLOCK_H_$/;"	d
_TEGRA114_CLOCK_TABLES_H_	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^#define _TEGRA114_CLOCK_TABLES_H_$/;"	d
_TEGRA114_COMMON_H_	include/configs/tegra114-common.h	/^#define _TEGRA114_COMMON_H_$/;"	d
_TEGRA114_FLOW_H_	arch/arm/include/asm/arch-tegra114/flow.h	/^#define _TEGRA114_FLOW_H_$/;"	d
_TEGRA114_FUNCMUX_H_	arch/arm/include/asm/arch-tegra114/funcmux.h	/^#define _TEGRA114_FUNCMUX_H_$/;"	d
_TEGRA114_GPIO_H_	arch/arm/include/asm/arch-tegra114/gpio.h	/^#define _TEGRA114_GPIO_H_$/;"	d
_TEGRA114_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^#define _TEGRA114_GP_PADCTRL_H_$/;"	d
_TEGRA114_H_	arch/arm/include/asm/arch-tegra114/tegra.h	/^#define _TEGRA114_H_$/;"	d
_TEGRA114_MC_H_	arch/arm/include/asm/arch-tegra114/mc.h	/^#define _TEGRA114_MC_H_$/;"	d
_TEGRA114_PINMUX_H_	arch/arm/include/asm/arch-tegra114/pinmux.h	/^#define _TEGRA114_PINMUX_H_$/;"	d
_TEGRA114_PMU_H_	arch/arm/include/asm/arch-tegra114/pmu.h	/^#define _TEGRA114_PMU_H_$/;"	d
_TEGRA114_POWERGATE_H_	arch/arm/include/asm/arch-tegra114/powergate.h	/^#define _TEGRA114_POWERGATE_H_$/;"	d
_TEGRA114_SYSCTR_H_	arch/arm/include/asm/arch-tegra114/sysctr.h	/^#define _TEGRA114_SYSCTR_H_$/;"	d
_TEGRA124_AHB_H_	arch/arm/include/asm/arch-tegra124/ahb.h	/^#define _TEGRA124_AHB_H_$/;"	d
_TEGRA124_CLOCK_H_	arch/arm/include/asm/arch-tegra124/clock.h	/^#define _TEGRA124_CLOCK_H_$/;"	d
_TEGRA124_CLOCK_TABLES_H_	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^#define _TEGRA124_CLOCK_TABLES_H_$/;"	d
_TEGRA124_COMMON_H_	include/configs/tegra124-common.h	/^#define _TEGRA124_COMMON_H_$/;"	d
_TEGRA124_FLOW_H_	arch/arm/include/asm/arch-tegra124/flow.h	/^#define _TEGRA124_FLOW_H_$/;"	d
_TEGRA124_FUNCMUX_H_	arch/arm/include/asm/arch-tegra124/funcmux.h	/^#define _TEGRA124_FUNCMUX_H_$/;"	d
_TEGRA124_GPIO_H_	arch/arm/include/asm/arch-tegra124/gpio.h	/^#define _TEGRA124_GPIO_H_$/;"	d
_TEGRA124_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^#define _TEGRA124_GP_PADCTRL_H_$/;"	d
_TEGRA124_H_	arch/arm/include/asm/arch-tegra124/tegra.h	/^#define _TEGRA124_H_$/;"	d
_TEGRA124_MC_H_	arch/arm/include/asm/arch-tegra124/mc.h	/^#define _TEGRA124_MC_H_$/;"	d
_TEGRA124_PINMUX_H_	arch/arm/include/asm/arch-tegra124/pinmux.h	/^#define _TEGRA124_PINMUX_H_$/;"	d
_TEGRA124_PMU_H_	arch/arm/include/asm/arch-tegra124/pmu.h	/^#define _TEGRA124_PMU_H_$/;"	d
_TEGRA124_POWERGATE_H_	arch/arm/include/asm/arch-tegra124/powergate.h	/^#define _TEGRA124_POWERGATE_H_$/;"	d
_TEGRA124_SYSCTR_H_	arch/arm/include/asm/arch-tegra124/sysctr.h	/^#define _TEGRA124_SYSCTR_H_$/;"	d
_TEGRA186_COMMON_H_	include/configs/tegra186-common.h	/^#define _TEGRA186_COMMON_H_$/;"	d
_TEGRA186_GPIO_H_	arch/arm/include/asm/arch-tegra186/gpio.h	/^#define _TEGRA186_GPIO_H_$/;"	d
_TEGRA186_GPIO_PRIV_H_	drivers/gpio/tegra186_gpio_priv.h	/^#define _TEGRA186_GPIO_PRIV_H_$/;"	d
_TEGRA186_TEGRA_H_	arch/arm/include/asm/arch-tegra186/tegra.h	/^#define _TEGRA186_TEGRA_H_$/;"	d
_TEGRA20_CLOCK_H	arch/arm/include/asm/arch-tegra20/clock.h	/^#define _TEGRA20_CLOCK_H$/;"	d
_TEGRA20_COMMON_H_	include/configs/tegra20-common.h	/^#define _TEGRA20_COMMON_H_$/;"	d
_TEGRA20_FUNCMUX_H_	arch/arm/include/asm/arch-tegra20/funcmux.h	/^#define _TEGRA20_FUNCMUX_H_$/;"	d
_TEGRA20_GPIO_H_	arch/arm/include/asm/arch-tegra20/gpio.h	/^#define _TEGRA20_GPIO_H_$/;"	d
_TEGRA20_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^#define _TEGRA20_GP_PADCTRL_H_$/;"	d
_TEGRA20_H_	arch/arm/include/asm/arch-tegra20/tegra.h	/^#define _TEGRA20_H_$/;"	d
_TEGRA20_MC_H_	arch/arm/include/asm/arch-tegra20/mc.h	/^#define _TEGRA20_MC_H_$/;"	d
_TEGRA20_PINMUX_H_	arch/arm/include/asm/arch-tegra20/pinmux.h	/^#define _TEGRA20_PINMUX_H_$/;"	d
_TEGRA20_POWERGATE_H_	arch/arm/include/asm/arch-tegra20/powergate.h	/^#define _TEGRA20_POWERGATE_H_$/;"	d
_TEGRA210_AHB_H_	arch/arm/include/asm/arch-tegra210/ahb.h	/^#define _TEGRA210_AHB_H_$/;"	d
_TEGRA210_CLOCK_H_	arch/arm/include/asm/arch-tegra210/clock.h	/^#define _TEGRA210_CLOCK_H_$/;"	d
_TEGRA210_CLOCK_TABLES_H_	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^#define _TEGRA210_CLOCK_TABLES_H_$/;"	d
_TEGRA210_COMMON_H_	include/configs/tegra210-common.h	/^#define _TEGRA210_COMMON_H_$/;"	d
_TEGRA210_FLOW_H_	arch/arm/include/asm/arch-tegra210/flow.h	/^#define _TEGRA210_FLOW_H_$/;"	d
_TEGRA210_FUNCMUX_H_	arch/arm/include/asm/arch-tegra210/funcmux.h	/^#define _TEGRA210_FUNCMUX_H_$/;"	d
_TEGRA210_GPIO_H_	arch/arm/include/asm/arch-tegra210/gpio.h	/^#define _TEGRA210_GPIO_H_$/;"	d
_TEGRA210_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^#define _TEGRA210_GP_PADCTRL_H_$/;"	d
_TEGRA210_MC_H_	arch/arm/include/asm/arch-tegra210/mc.h	/^#define _TEGRA210_MC_H_$/;"	d
_TEGRA210_PINMUX_H_	arch/arm/include/asm/arch-tegra210/pinmux.h	/^#define _TEGRA210_PINMUX_H_$/;"	d
_TEGRA210_PMU_H_	arch/arm/include/asm/arch-tegra210/pmu.h	/^#define _TEGRA210_PMU_H_$/;"	d
_TEGRA210_POWERGATE_H_	arch/arm/include/asm/arch-tegra210/powergate.h	/^#define _TEGRA210_POWERGATE_H_$/;"	d
_TEGRA210_SYSCTR_H_	arch/arm/include/asm/arch-tegra210/sysctr.h	/^#define _TEGRA210_SYSCTR_H_$/;"	d
_TEGRA210_TEGRA_H_	arch/arm/include/asm/arch-tegra210/tegra.h	/^#define _TEGRA210_TEGRA_H_$/;"	d
_TEGRA30_CLOCK_H_	arch/arm/include/asm/arch-tegra30/clock.h	/^#define _TEGRA30_CLOCK_H_$/;"	d
_TEGRA30_CLOCK_TABLES_H_	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^#define _TEGRA30_CLOCK_TABLES_H_$/;"	d
_TEGRA30_COMMON_H_	include/configs/tegra30-common.h	/^#define _TEGRA30_COMMON_H_$/;"	d
_TEGRA30_FLOW_H_	arch/arm/include/asm/arch-tegra30/flow.h	/^#define _TEGRA30_FLOW_H_$/;"	d
_TEGRA30_FUNCMUX_H_	arch/arm/include/asm/arch-tegra30/funcmux.h	/^#define _TEGRA30_FUNCMUX_H_$/;"	d
_TEGRA30_GPIO_H_	arch/arm/include/asm/arch-tegra30/gpio.h	/^#define _TEGRA30_GPIO_H_$/;"	d
_TEGRA30_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^#define _TEGRA30_GP_PADCTRL_H_$/;"	d
_TEGRA30_H_	arch/arm/include/asm/arch-tegra30/tegra.h	/^#define _TEGRA30_H_$/;"	d
_TEGRA30_MC_H_	arch/arm/include/asm/arch-tegra30/mc.h	/^#define _TEGRA30_MC_H_$/;"	d
_TEGRA30_PINMUX_H_	arch/arm/include/asm/arch-tegra30/pinmux.h	/^#define _TEGRA30_PINMUX_H_$/;"	d
_TEGRA30_PMU_H_	arch/arm/include/asm/arch-tegra30/pmu.h	/^#define _TEGRA30_PMU_H_$/;"	d
_TEGRA30_POWERGATE_H_	arch/arm/include/asm/arch-tegra30/powergate.h	/^#define _TEGRA30_POWERGATE_H_$/;"	d
_TEGRA_BOARD_H_	arch/arm/include/asm/arch-tegra/board.h	/^#define _TEGRA_BOARD_H_$/;"	d
_TEGRA_CLK_RST_H_	arch/arm/include/asm/arch-tegra/clk_rst.h	/^#define _TEGRA_CLK_RST_H_$/;"	d
_TEGRA_CLOCK_H_	arch/arm/include/asm/arch-tegra/clock.h	/^#define _TEGRA_CLOCK_H_$/;"	d
_TEGRA_COMMON_H_	include/configs/tegra-common.h	/^#define _TEGRA_COMMON_H_$/;"	d
_TEGRA_COMMON_USB_GADGET_H_	include/configs/tegra-common-usb-gadget.h	/^#define _TEGRA_COMMON_USB_GADGET_H_$/;"	d
_TEGRA_DISPLAYPORT_H	drivers/video/tegra124/displayport.h	/^#define _TEGRA_DISPLAYPORT_H$/;"	d
_TEGRA_FUNCMUX_H_	arch/arm/include/asm/arch-tegra/funcmux.h	/^#define _TEGRA_FUNCMUX_H_$/;"	d
_TEGRA_GPIO_H_	arch/arm/include/asm/arch-tegra/gpio.h	/^#define _TEGRA_GPIO_H_$/;"	d
_TEGRA_GP_PADCTRL_H_	arch/arm/include/asm/arch-tegra/gp_padctrl.h	/^#define _TEGRA_GP_PADCTRL_H_$/;"	d
_TEGRA_H_	arch/arm/include/asm/arch-tegra/tegra.h	/^#define _TEGRA_H_$/;"	d
_TEGRA_I2C_H_	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^#define _TEGRA_I2C_H_$/;"	d
_TEGRA_PINMUX_H_	arch/arm/include/asm/arch-tegra/pinmux.h	/^#define _TEGRA_PINMUX_H_$/;"	d
_TEGRA_POWERGATE_H_	arch/arm/include/asm/arch-tegra/powergate.h	/^#define _TEGRA_POWERGATE_H_$/;"	d
_TEGRA_TIMER_H	arch/arm/include/asm/arch-tegra/timer.h	/^#define _TEGRA_TIMER_H$/;"	d
_TEGRA_USB_H_	arch/arm/include/asm/arch-tegra/usb.h	/^#define _TEGRA_USB_H_$/;"	d
_TEGRA_XUSB_PADCTL_COMMON_H_	arch/arm/mach-tegra/xusb-padctl-common.h	/^#define _TEGRA_XUSB_PADCTL_COMMON_H_$/;"	d
_TEGRA_XUSB_PADCTL_H_	arch/arm/include/asm/arch-tegra/xusb-padctl.h	/^#define _TEGRA_XUSB_PADCTL_H_$/;"	d
_TEST_BURST_H	examples/standalone/test_burst.h	/^#define _TEST_BURST_H$/;"	d
_TEXT_BASE	arch/arm/cpu/armv8/start.S	/^_TEXT_BASE:$/;"	l
_TEXT_BASE	arch/nds32/cpu/n1213/start.S	/^_TEXT_BASE:$/;"	l
_THERMAL_H_	include/thermal.h	/^#define _THERMAL_H_$/;"	d
_TIMER_DEFS_H_	arch/arm/mach-davinci/include/mach/timer_defs.h	/^#define _TIMER_DEFS_H_$/;"	d
_TIMER_H_	include/timer.h	/^#define _TIMER_H_$/;"	d
_TIME_T	include/linux/types.h	/^#define _TIME_T$/;"	d
_TI_COMMON_SYS_PROTO_H_	arch/arm/include/asm/ti-common/sys_proto.h	/^#define _TI_COMMON_SYS_PROTO_H_$/;"	d
_TI_SATA_H	arch/arm/include/asm/arch-omap5/sata.h	/^#define _TI_SATA_H$/;"	d
_TMU_H	include/tmu.h	/^#define _TMU_H$/;"	d
_TOP_PINMUX_t	board/micronas/vct/top.c	/^typedef union _TOP_PINMUX_t$/;"	u	file:
_TPM_TIS_I2C_H	drivers/tpm/tpm_tis.h	/^#define _TPM_TIS_I2C_H$/;"	d
_TPS6586X_H_	include/tps6586x.h	/^#define _TPS6586X_H_$/;"	d
_TRANSA_DATA_M1	drivers/video/i915_reg.h	/^#define _TRANSA_DATA_M1 /;"	d
_TRANSA_DATA_M2	drivers/video/i915_reg.h	/^#define _TRANSA_DATA_M2 /;"	d
_TRANSA_DATA_N1	drivers/video/i915_reg.h	/^#define _TRANSA_DATA_N1 /;"	d
_TRANSA_DATA_N2	drivers/video/i915_reg.h	/^#define _TRANSA_DATA_N2 /;"	d
_TRANSA_DP_LINK_M1	drivers/video/i915_reg.h	/^#define _TRANSA_DP_LINK_M1 /;"	d
_TRANSA_DP_LINK_M2	drivers/video/i915_reg.h	/^#define _TRANSA_DP_LINK_M2 /;"	d
_TRANSA_DP_LINK_N1	drivers/video/i915_reg.h	/^#define _TRANSA_DP_LINK_N1 /;"	d
_TRANSA_DP_LINK_N2	drivers/video/i915_reg.h	/^#define _TRANSA_DP_LINK_N2 /;"	d
_TRANS_HBLANK_A	drivers/video/i915_reg.h	/^#define _TRANS_HBLANK_A /;"	d
_TRANS_HSYNC_A	drivers/video/i915_reg.h	/^#define _TRANS_HSYNC_A /;"	d
_TRANS_HTOTAL_A	drivers/video/i915_reg.h	/^#define _TRANS_HTOTAL_A /;"	d
_TRANS_VBLANK_A	drivers/video/i915_reg.h	/^#define _TRANS_VBLANK_A /;"	d
_TRANS_VSYNCSHIFT_A	drivers/video/i915_reg.h	/^#define _TRANS_VSYNCSHIFT_A	/;"	d
_TRANS_VSYNC_A	drivers/video/i915_reg.h	/^#define _TRANS_VSYNC_A /;"	d
_TRANS_VTOTAL_A	drivers/video/i915_reg.h	/^#define _TRANS_VTOTAL_A /;"	d
_TRATS_SETUP_H	board/samsung/trats/setup.h	/^#define _TRATS_SETUP_H$/;"	d
_TRICORDER_H_	board/corscience/tricorder/tricorder.h	/^#define _TRICORDER_H_$/;"	d
_TS4800_H	board/technologic/ts4800/ts4800.h	/^#define _TS4800_H$/;"	d
_TSI108_H_	include/tsi108.h	/^#define _TSI108_H_$/;"	d
_TSI148	include/tsi148.h	/^struct _TSI148 {$/;"	s
_TSI148_DEV	cmd/tsi148.c	/^struct _TSI148_DEV {$/;"	s	file:
_TUCR	include/SA-1100.h	/^#define _TUCR	/;"	d
_TWS_H_	include/tws.h	/^#define _TWS_H_$/;"	d
_TYPE_BEDBUG_H	include/bedbug/type.h	/^#define _TYPE_BEDBUG_H$/;"	d
_U	include/linux/ctype.h	/^#define _U	/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/arm/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/microblaze/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/mips/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/nios2/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/sandbox/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/x86/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	arch/xtensa/dts/include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_INPUT_EVENT_CODES_H	include/dt-bindings/input/linux-event-codes.h	/^#define _UAPI_INPUT_EVENT_CODES_H$/;"	d
_UAPI_LINUX_PSCI_H	include/linux/psci.h	/^#define _UAPI_LINUX_PSCI_H$/;"	d
_UART_H_	arch/arm/include/asm/arch-tegra/uart.h	/^#define _UART_H_$/;"	d
_UBLIMAGE_H_	tools/ublimage.h	/^#define _UBLIMAGE_H_$/;"	d
_UBOOT_CRC_H	include/u-boot/crc.h	/^#define _UBOOT_CRC_H$/;"	d
_UBOOT_MTD_UBISPL_H	drivers/mtd/ubispl/ubispl.h	/^#define _UBOOT_MTD_UBISPL_H$/;"	d
_ULCAST_	arch/mips/include/asm/mipsregs.h	/^#define _ULCAST_ /;"	d
_UNIVERSE	include/universe.h	/^struct _UNIVERSE {$/;"	s
_UNI_DEV	cmd/universe.c	/^struct _UNI_DEV {$/;"	s	file:
_USBGADGET_NDIS_H	drivers/usb/gadget/ndis.h	/^#define _USBGADGET_NDIS_H$/;"	d
_USBGADGET_RNDIS_H	drivers/usb/gadget/rndis.h	/^#define _USBGADGET_RNDIS_H$/;"	d
_USB_DEFS_H_	include/usb_defs.h	/^#define _USB_DEFS_H_$/;"	d
_USB_H_	include/usb.h	/^#define _USB_H_$/;"	d
_USB_THOR_H_	drivers/usb/gadget/f_thor.h	/^#define _USB_THOR_H_$/;"	d
_USB_UHCI_H_	arch/sparc/cpu/leon3/usb_uhci.h	/^#define _USB_UHCI_H_$/;"	d
_USB_UHCI_H_	board/mpl/common/usb_uhci.h	/^#define _USB_UHCI_H_$/;"	d
_USE_MEMCPY	common/init/board_init.c	/^#define _USE_MEMCPY$/;"	d	file:
_USE_PROTOTYPES	include/bedbug/bedbug.h	/^#define _USE_PROTOTYPES$/;"	d
_UTCR0	include/SA-1100.h	/^#define _UTCR0(/;"	d
_UTCR1	include/SA-1100.h	/^#define _UTCR1(/;"	d
_UTCR2	include/SA-1100.h	/^#define _UTCR2(/;"	d
_UTCR3	include/SA-1100.h	/^#define _UTCR3(/;"	d
_UTCR4	include/SA-1100.h	/^#define _UTCR4(/;"	d
_UTDR	include/SA-1100.h	/^#define _UTDR(/;"	d
_UTILS_H_	arch/arm/include/asm/utils.h	/^#define _UTILS_H_$/;"	d
_UTMI_PHY_H_	drivers/phy/marvell/utmi_phy.h	/^#define _UTMI_PHY_H_$/;"	d
_UTSR0	include/SA-1100.h	/^#define _UTSR0(/;"	d
_UTSR1	include/SA-1100.h	/^#define _UTSR1(/;"	d
_U_BOOT_ARM_H_	arch/arm/include/asm/u-boot-arm.h	/^#define _U_BOOT_ARM_H_	/;"	d
_U_BOOT_H_	arch/arm/include/asm/u-boot.h	/^#define _U_BOOT_H_	/;"	d
_U_BOOT_H_	arch/blackfin/include/asm/u-boot.h	/^#define _U_BOOT_H_	/;"	d
_U_BOOT_H_	arch/microblaze/include/asm/u-boot.h	/^#define _U_BOOT_H_$/;"	d
_U_BOOT_H_	arch/mips/include/asm/u-boot.h	/^#define _U_BOOT_H_	/;"	d
_U_BOOT_H_	arch/nds32/include/asm/u-boot.h	/^#define _U_BOOT_H_	/;"	d
_U_BOOT_H_	arch/openrisc/include/asm/u-boot.h	/^#define _U_BOOT_H_$/;"	d
_U_BOOT_H_	arch/sandbox/include/asm/u-boot.h	/^#define _U_BOOT_H_	/;"	d
_U_BOOT_H_	arch/x86/include/asm/u-boot.h	/^#define _U_BOOT_H_	/;"	d
_U_BOOT_I386_H_	arch/x86/include/asm/u-boot-x86.h	/^#define _U_BOOT_I386_H_	/;"	d
_U_BOOT_MIPS_H_	arch/mips/include/asm/u-boot-mips.h	/^#define _U_BOOT_MIPS_H_$/;"	d
_U_BOOT_NDS32_H_	arch/nds32/include/asm/u-boot-nds32.h	/^#define _U_BOOT_NDS32_H_	/;"	d
_U_BOOT_SANDBOX_H_	arch/sandbox/include/asm/u-boot-sandbox.h	/^#define _U_BOOT_SANDBOX_H_$/;"	d
_UpdateDefaults	tools/patman/settings.py	/^def _UpdateDefaults(parser, config):$/;"	f
_UserExceptionVector	arch/xtensa/cpu/start.S	/^_UserExceptionVector:$/;"	l
_VBE_H	include/vbe.h	/^#define _VBE_H$/;"	d
_VCT_H	board/micronas/vct/vct.h	/^#define _VCT_H$/;"	d
_VENTANA_EEPROM_	board/gateworks/gw_ventana/ventana_eeprom.h	/^#define _VENTANA_EEPROM_$/;"	d
_VIDEO_DIP_CTL_A	drivers/video/i915_reg.h	/^#define _VIDEO_DIP_CTL_A /;"	d
_VIDEO_DIP_CTL_B	drivers/video/i915_reg.h	/^#define _VIDEO_DIP_CTL_B /;"	d
_VIDEO_DIP_DATA_A	drivers/video/i915_reg.h	/^#define _VIDEO_DIP_DATA_A /;"	d
_VIDEO_DIP_DATA_B	drivers/video/i915_reg.h	/^#define _VIDEO_DIP_DATA_B /;"	d
_VIDEO_DIP_GCP_A	drivers/video/i915_reg.h	/^#define _VIDEO_DIP_GCP_A /;"	d
_VIDEO_DIP_GCP_B	drivers/video/i915_reg.h	/^#define _VIDEO_DIP_GCP_B /;"	d
_VIDEO_FB_H_	include/video_fb.h	/^#define _VIDEO_FB_H_$/;"	d
_VIDEO_FONT_	include/video_font.h	/^#define _VIDEO_FONT_$/;"	d
_VIDEO_FONT_DATA_	include/video_font_4x6.h	/^#define _VIDEO_FONT_DATA_$/;"	d
_VIDEO_FONT_DATA_	include/video_font_data.h	/^#define _VIDEO_FONT_DATA_$/;"	d
_VIDEO_H_	include/video.h	/^#define _VIDEO_H_$/;"	d
_VIDEO_TEGRA124_SOR_H	drivers/video/tegra124/sor.h	/^#define _VIDEO_TEGRA124_SOR_H$/;"	d
_VIRTEX2_H_	include/virtex2.h	/^#define _VIRTEX2_H_$/;"	d
_VME_OPCODE_H	include/lattice.h	/^#define _VME_OPCODE_H$/;"	d
_VSC9953_H_	include/vsc9953.h	/^#define _VSC9953_H_$/;"	d
_VXWORKS_H_	include/vxworks.h	/^#define _VXWORKS_H_$/;"	d
_WARMBOOT_AVP_H_	arch/arm/mach-tegra/tegra20/warmboot_avp.h	/^#define _WARMBOOT_AVP_H_$/;"	d
_WARM_BOOT_H_	arch/arm/include/asm/arch-tegra/warmboot.h	/^#define _WARM_BOOT_H_$/;"	d
_WATCHDOG_H_	include/watchdog.h	/^#define _WATCHDOG_H_$/;"	d
_WDT_H_	arch/arm/include/asm/arch-armv7/wdt.h	/^#define _WDT_H_$/;"	d
_WINBOND_W83627_H_	include/winbond_w83627.h	/^#define _WINBOND_W83627_H_$/;"	d
_WindowOverflow12	arch/xtensa/cpu/start.S	/^_WindowOverflow12:$/;"	l
_WindowOverflow4	arch/xtensa/cpu/start.S	/^_WindowOverflow4:$/;"	l
_WindowOverflow8	arch/xtensa/cpu/start.S	/^_WindowOverflow8:$/;"	l
_WindowUnderflow12	arch/xtensa/cpu/start.S	/^_WindowUnderflow12:$/;"	l
_WindowUnderflow4	arch/xtensa/cpu/start.S	/^_WindowUnderflow4:$/;"	l
_WindowUnderflow8	arch/xtensa/cpu/start.S	/^_WindowUnderflow8:$/;"	l
_WriteResult	tools/buildman/builderthread.py	/^    def _WriteResult(self, result, keep_outputs):$/;"	m	class:BuilderThread
_X	include/linux/ctype.h	/^#define _X	/;"	d
_X86EMU_env	arch/x86/lib/bios.c	/^X86EMU_sysEnv _X86EMU_env;$/;"	v	typeref:typename:X86EMU_sysEnv
_X86EMU_env	drivers/bios_emulator/x86emu/sys.c	/^X86EMU_sysEnv _X86EMU_env;	\/* Global emulator machine state *\/$/;"	v	typeref:typename:X86EMU_sysEnv
_X86EMU_intrTab	drivers/bios_emulator/x86emu/sys.c	/^X86EMU_intrFuncs _X86EMU_intrTab[256];$/;"	v	typeref:typename:X86EMU_intrFuncs[256]
_X86_ARCH_TNC_H_	arch/x86/include/asm/arch-queensbay/tnc.h	/^#define _X86_ARCH_TNC_H_$/;"	d
_X86_CHROMEBOOK_H	include/configs/x86-chromebook.h	/^#define _X86_CHROMEBOOK_H$/;"	d
_X86_GPIO_H_	arch/x86/include/asm/gpio.h	/^#define _X86_GPIO_H_$/;"	d
_X86_LIB_BIOS_H	arch/x86/lib/bios.h	/^#define _X86_LIB_BIOS_H$/;"	d
_X86_MP_H_	arch/x86/include/asm/mp.h	/^#define _X86_MP_H_$/;"	d
_X86_TABLES_H_	arch/x86/include/asm/tables.h	/^#define _X86_TABLES_H_$/;"	d
_XER	include/ppc_defs.h	/^#define	_XER	/;"	d
_XILINX_H_	include/xilinx.h	/^#define _XILINX_H_$/;"	d
_XILINX_LL_TEMAC_	drivers/net/xilinx_ll_temac.h	/^#define _XILINX_LL_TEMAC_$/;"	d
_XILINX_LL_TEMAC_FIFO_	drivers/net/xilinx_ll_temac_fifo.h	/^#define _XILINX_LL_TEMAC_FIFO_$/;"	d
_XILINX_LL_TEMAC_MDIO_	drivers/net/xilinx_ll_temac_mdio.h	/^#define _XILINX_LL_TEMAC_MDIO_$/;"	d
_XILINX_LL_TEMAC_SDMA_	drivers/net/xilinx_ll_temac_sdma.h	/^#define _XILINX_LL_TEMAC_SDMA_$/;"	d
_XOR_H	drivers/ddr/marvell/a38x/xor.h	/^#define _XOR_H$/;"	d
_XOR_REGS_h	drivers/ddr/marvell/a38x/xor_regs.h	/^#define _XOR_REGS_h$/;"	d
_XTENSA_ADDRSPACE_H	arch/xtensa/include/asm/addrspace.h	/^#define _XTENSA_ADDRSPACE_H$/;"	d
_XTENSA_ASMMACRO_H	arch/xtensa/include/asm/asmmacro.h	/^#define _XTENSA_ASMMACRO_H$/;"	d
_XTENSA_ATOMIC_H	arch/xtensa/include/asm/atomic.h	/^#define _XTENSA_ATOMIC_H$/;"	d
_XTENSA_BITOPS_H	arch/xtensa/include/asm/bitops.h	/^#define _XTENSA_BITOPS_H$/;"	d
_XTENSA_BOOTPARAM_H	arch/xtensa/include/asm/bootparam.h	/^#define _XTENSA_BOOTPARAM_H$/;"	d
_XTENSA_BYTEORDER_H	arch/xtensa/include/asm/byteorder.h	/^#define _XTENSA_BYTEORDER_H$/;"	d
_XTENSA_CACHEASM_H	arch/xtensa/include/asm/cacheasm.h	/^#define _XTENSA_CACHEASM_H$/;"	d
_XTENSA_CACHE_H	arch/xtensa/include/asm/cache.h	/^#define _XTENSA_CACHE_H$/;"	d
_XTENSA_CORE_CONFIGURATION_H	arch/xtensa/include/asm/arch-dc232b/core.h	/^#define _XTENSA_CORE_CONFIGURATION_H$/;"	d
_XTENSA_CORE_CONFIGURATION_H	arch/xtensa/include/asm/arch-dc233c/core.h	/^#define _XTENSA_CORE_CONFIGURATION_H$/;"	d
_XTENSA_CORE_CONFIGURATION_H	arch/xtensa/include/asm/arch-de212/core.h	/^#define _XTENSA_CORE_CONFIGURATION_H$/;"	d
_XTENSA_CORE_TIE_ASM_H	arch/xtensa/include/asm/arch-dc232b/tie-asm.h	/^#define _XTENSA_CORE_TIE_ASM_H$/;"	d
_XTENSA_CORE_TIE_ASM_H	arch/xtensa/include/asm/arch-dc233c/tie-asm.h	/^#define _XTENSA_CORE_TIE_ASM_H$/;"	d
_XTENSA_CORE_TIE_ASM_H	arch/xtensa/include/asm/arch-de212/tie-asm.h	/^#define _XTENSA_CORE_TIE_ASM_H$/;"	d
_XTENSA_CORE_TIE_H	arch/xtensa/include/asm/arch-dc232b/tie.h	/^#define _XTENSA_CORE_TIE_H$/;"	d
_XTENSA_CORE_TIE_H	arch/xtensa/include/asm/arch-dc233c/tie.h	/^#define _XTENSA_CORE_TIE_H$/;"	d
_XTENSA_CORE_TIE_H	arch/xtensa/include/asm/arch-de212/tie.h	/^#define _XTENSA_CORE_TIE_H$/;"	d
_XTENSA_GBL_DATA_H	arch/xtensa/include/asm/global_data.h	/^#define _XTENSA_GBL_DATA_H$/;"	d
_XTENSA_IO_H	arch/xtensa/include/asm/io.h	/^#define _XTENSA_IO_H$/;"	d
_XTENSA_LDSCRIPT_H	arch/xtensa/include/asm/ldscript.h	/^#define _XTENSA_LDSCRIPT_H$/;"	d
_XTENSA_MISC_H	arch/xtensa/include/asm/misc.h	/^#define _XTENSA_MISC_H$/;"	d
_XTENSA_POSIX_TYPES_H	arch/xtensa/include/asm/posix_types.h	/^#define _XTENSA_POSIX_TYPES_H$/;"	d
_XTENSA_PROCESSOR_H	arch/xtensa/include/asm/processor.h	/^#define _XTENSA_PROCESSOR_H$/;"	d
_XTENSA_PTRACE_H	arch/xtensa/include/asm/ptrace.h	/^#define _XTENSA_PTRACE_H$/;"	d
_XTENSA_REGS_H	arch/xtensa/include/asm/regs.h	/^#define _XTENSA_REGS_H$/;"	d
_XTENSA_STRING_H	arch/xtensa/include/asm/string.h	/^#define _XTENSA_STRING_H$/;"	d
_XTENSA_SYSTEM_H	arch/xtensa/include/asm/system.h	/^#define _XTENSA_SYSTEM_H$/;"	d
_XTENSA_TYPES_H	arch/xtensa/include/asm/types.h	/^#define _XTENSA_TYPES_H$/;"	d
_XTENSA_U_BOOT_H	arch/xtensa/include/asm/u-boot.h	/^#define _XTENSA_U_BOOT_H$/;"	d
_XYZMODEM_H_	include/xyzModem.h	/^#define _XYZMODEM_H_$/;"	d
_Y	fs/yaffs2/ydirectenv.h	/^#define _Y(/;"	d
_ZIO_H	include/zfs/zio.h	/^#define	_ZIO_H$/;"	d
_ZYNQMPPL_H_	include/zynqmppl.h	/^#define _ZYNQMPPL_H_$/;"	d
_ZYNQPL_H_	include/zynqpl.h	/^#define _ZYNQPL_H_$/;"	d
_ZYNQ_CLK_H_	arch/arm/mach-zynq/include/mach/clk.h	/^#define _ZYNQ_CLK_H_$/;"	d
_ZYNQ_GPIO_H	arch/arm/mach-zynq/include/mach/gpio.h	/^#define _ZYNQ_GPIO_H$/;"	d
_ZeroMem	include/SA-1100.h	/^#define _ZeroMem	/;"	d
__405EP_H_	board/gdsys/405ep/405ep.h	/^#define __405EP_H_$/;"	d
__405EX_H_	board/gdsys/405ex/405ex.h	/^#define __405EX_H_$/;"	d
__440_msr_continue	arch/powerpc/cpu/ppc4xx/start.S	/^__440_msr_continue:$/;"	l
__440_msr_set	arch/powerpc/cpu/ppc4xx/start.S	/^__440_msr_set:$/;"	l
__4XX_PCIE_H	arch/powerpc/include/asm/4xx_pcie.h	/^#define __4XX_PCIE_H$/;"	d
__7Z_TYPES_H	lib/lzma/Types.h	/^#define __7Z_TYPES_H$/;"	d
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define __ABI_PACKED /;"	d
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_disable_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_disable_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_enable_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_enable_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_all_info_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_all_info_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_max_clk_id_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_max_clk_id_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_parent_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_parent_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_rate_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_get_rate_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_is_enabled_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_is_enabled_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_round_rate_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_round_rate_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_set_parent_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_set_parent_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_set_rate_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_clk_set_rate_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_debugfs_dumpdir_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_debugfs_dumpdir_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_debugfs_fileop_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_debugfs_fileop_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_i2c_xfer_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_i2c_xfer_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_thermal_get_num_zones_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_thermal_get_temp_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_thermal_get_temp_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_thermal_host_trip_reached_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_thermal_query_abi_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cmd_thermal_set_trip_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:cpu_vhint_data
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:emc_dvfs_latency
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_clk_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_clk_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_cpu_vhint_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_debugfs_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_debugfs_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_emc_dvfs_latency_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_i2c_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_i2c_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_module_load_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_module_load_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_module_mail_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_module_mail_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_module_unload_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_pg_read_state_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_pg_read_state_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_pg_update_state_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_ping_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_ping_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_query_abi_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_query_abi_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_query_tag_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_reset_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_thermal_bpmp_to_host_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_thermal_host_to_bpmp_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_threaded_ping_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_threaded_ping_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_trace_iter_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_trace_modify_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_trace_modify_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_write_trace_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:mrq_write_trace_response
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:struct:serial_i2c_request
__ABI_PACKED	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^} __ABI_PACKED;$/;"	v	typeref:union:mrq_thermal_bpmp_to_host_response
__AC	arch/mips/include/asm/const.h	/^#define __AC(/;"	d
__ACCESS_ONCE	include/linux/compiler.h	/^#define __ACCESS_ONCE(/;"	d
__ACE_SHA_H	drivers/crypto/ace_sha.h	/^#define __ACE_SHA_H$/;"	d
__ADDR_MAP_H	include/addr_map.h	/^#define __ADDR_MAP_H$/;"	d
__ADVANTECH_DMSBA16_CONFIG_H	include/configs/advantech_dms-ba16.h	/^#define __ADVANTECH_DMSBA16_CONFIG_H$/;"	d
__AG101_H	arch/nds32/include/asm/arch-ag101/ag101.h	/^#define __AG101_H$/;"	d
__AG102_H	arch/nds32/include/asm/arch-ag102/ag102.h	/^#define __AG102_H$/;"	d
__ALIGN	arch/arm/include/asm/linkage.h	/^#define __ALIGN /;"	d
__ALIGN	include/linux/linkage.h	/^#define __ALIGN /;"	d
__ALIGNMEM_H	include/memalign.h	/^#define __ALIGNMEM_H$/;"	d
__ALIGN_MASK	include/linux/kernel.h	/^#define __ALIGN_MASK(/;"	d
__ALIGN_MASK	tools/mksunxiboot.c	/^#define __ALIGN_MASK(/;"	d	file:
__ALIGN_STR	arch/arm/include/asm/linkage.h	/^#define __ALIGN_STR /;"	d
__ALIGN_STR	include/linux/linkage.h	/^#define __ALIGN_STR	/;"	d
__ALT_H	include/configs/alt.h	/^#define __ALT_H$/;"	d
__AM33XX_HARDWARE_AM33XX_H	arch/arm/include/asm/arch-am33xx/hardware_am33xx.h	/^#define __AM33XX_HARDWARE_AM33XX_H$/;"	d
__AM33XX_HARDWARE_H	arch/arm/include/asm/arch-am33xx/hardware.h	/^#define __AM33XX_HARDWARE_H$/;"	d
__AM33XX_HARDWARE_TI814X_H	arch/arm/include/asm/arch-am33xx/hardware_ti814x.h	/^#define __AM33XX_HARDWARE_TI814X_H$/;"	d
__AM33XX_HARDWARE_TI816X_H	arch/arm/include/asm/arch-am33xx/hardware_ti816x.h	/^#define __AM33XX_HARDWARE_TI816X_H$/;"	d
__AM35X_USB_H__	drivers/usb/musb/am35x.h	/^#define __AM35X_USB_H__$/;"	d
__AM43XX_HARDWARE_AM43XX_H	arch/arm/include/asm/arch-am33xx/hardware_am43xx.h	/^#define __AM43XX_HARDWARE_AM43XX_H$/;"	d
__AMBAPP_H__	include/ambapp.h	/^#define __AMBAPP_H__$/;"	d
__AMBAPP_IDS_H__	include/ambapp_ids.h	/^#define __AMBAPP_IDS_H__$/;"	d
__AMCC_COMMON_H	include/configs/amcc-common.h	/^#define __AMCC_COMMON_H$/;"	d
__AMCORE_CONFIG_H	include/configs/amcore.h	/^#define __AMCORE_CONFIG_H$/;"	d
__ANDES_PCU_H	include/andestech/andes_pcu.h	/^#define __ANDES_PCU_H$/;"	d
__AP325RXA_H	include/configs/ap325rxa.h	/^#define __AP325RXA_H$/;"	d
__APF27_H	board/armadeus/apf27/apf27.h	/^#define __APF27_H$/;"	d
__AP_SH4A_4A_H	include/configs/ap_sh4a_4a.h	/^#define __AP_SH4A_4A_H$/;"	d
__ARCH_ARM_MACH_MX51_CRM_REGS_H__	arch/arm/include/asm/arch-mx5/crm_regs.h	/^#define __ARCH_ARM_MACH_MX51_CRM_REGS_H__$/;"	d
__ARCH_ARM_MACH_MX6_CCM_REGS_H__	arch/arm/include/asm/arch-mx6/crm_regs.h	/^#define __ARCH_ARM_MACH_MX6_CCM_REGS_H__$/;"	d
__ARCH_ARM_MACH_MX7_CCM_REGS_H__	arch/arm/include/asm/arch-mx7/crm_regs.h	/^#define __ARCH_ARM_MACH_MX7_CCM_REGS_H__$/;"	d
__ARCH_ARM_MACH_S32V234_DDR_H__	arch/arm/include/asm/arch-s32v234/ddr.h	/^#define __ARCH_ARM_MACH_S32V234_DDR_H__$/;"	d
__ARCH_ARM_MACH_S32V234_LPDDR2_H__	arch/arm/include/asm/arch-s32v234/lpddr2.h	/^#define __ARCH_ARM_MACH_S32V234_LPDDR2_H__$/;"	d
__ARCH_ARM_MACH_S32V234_MCCGM_REGS_H__	arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h	/^#define __ARCH_ARM_MACH_S32V234_MCCGM_REGS_H__$/;"	d
__ARCH_ARM_MACH_S32V234_MCME_REGS_H__	arch/arm/include/asm/arch-s32v234/mc_me_regs.h	/^#define __ARCH_ARM_MACH_S32V234_MCME_REGS_H__$/;"	d
__ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__	arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h	/^#define __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__$/;"	d
__ARCH_ARM_MACH_S32V234_MMDC_H__	arch/arm/include/asm/arch-s32v234/mmdc.h	/^#define __ARCH_ARM_MACH_S32V234_MMDC_H__$/;"	d
__ARCH_ARM_MACH_S32V234_SIUL_H__	arch/arm/include/asm/arch-s32v234/siul.h	/^#define __ARCH_ARM_MACH_S32V234_SIUL_H__$/;"	d
__ARCH_ARM_MACH_VF610_CCM_REGS_H__	arch/arm/include/asm/arch-vf610/crm_regs.h	/^#define __ARCH_ARM_MACH_VF610_CCM_REGS_H__$/;"	d
__ARCH_ARM_POSIX_TYPES_H	arch/arm/include/asm/posix_types.h	/^#define __ARCH_ARM_POSIX_TYPES_H$/;"	d
__ARCH_ARM_POSIX_TYPES_H	arch/sandbox/include/asm/posix_types.h	/^#define __ARCH_ARM_POSIX_TYPES_H$/;"	d
__ARCH_ARM___MXS_UARTAPP_H	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^#define __ARCH_ARM___MXS_UARTAPP_H$/;"	d
__ARCH_BCM235XX_GPIO_H	arch/arm/include/asm/arch-bcm235xx/gpio.h	/^#define __ARCH_BCM235XX_GPIO_H$/;"	d
__ARCH_BCM281XX_GPIO_H	arch/arm/include/asm/arch-bcm281xx/gpio.h	/^#define __ARCH_BCM281XX_GPIO_H$/;"	d
__ARCH_BLACKFIN_CACHE_H	arch/blackfin/include/asm/cache.h	/^#define __ARCH_BLACKFIN_CACHE_H$/;"	d
__ARCH_BLACKFIN_GPIO_H__	arch/blackfin/include/asm/gpio.h	/^#define __ARCH_BLACKFIN_GPIO_H__$/;"	d
__ARCH_BLACKFIN_POSIX_TYPES_H	arch/blackfin/include/asm/posix_types.h	/^#define __ARCH_BLACKFIN_POSIX_TYPES_H$/;"	d
__ARCH_CONFIGS_H	arch/arm/include/asm/arch-bcmcygnus/configs.h	/^#define __ARCH_CONFIGS_H$/;"	d
__ARCH_CONFIGS_H	arch/arm/include/asm/arch-bcmnsp/configs.h	/^#define __ARCH_CONFIGS_H$/;"	d
__ARCH_FSL_LSCH2_IMMAP_H__	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^#define __ARCH_FSL_LSCH2_IMMAP_H__$/;"	d
__ARCH_FSL_LSCH3_IMMAP_H_	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^#define __ARCH_FSL_LSCH3_IMMAP_H_$/;"	d
__ARCH_I386_POSIX_TYPES_H	arch/x86/include/asm/posix_types.h	/^#define __ARCH_I386_POSIX_TYPES_H$/;"	d
__ARCH_NDS_POSIX_TYPES_H	arch/nds32/include/asm/posix_types.h	/^#define __ARCH_NDS_POSIX_TYPES_H$/;"	d
__ARCH_PPC_CACHE_H	arch/powerpc/include/asm/cache.h	/^#define __ARCH_PPC_CACHE_H$/;"	d
__ARCH_REPORT_PLATFORM_H	arch/x86/include/asm/report_platform.h	/^#define __ARCH_REPORT_PLATFORM_H$/;"	d
__ARCH_SYNC_CORE_DCACHE	arch/blackfin/include/asm/cache.h	/^# define __ARCH_SYNC_CORE_DCACHE$/;"	d
__ARCH_SYNC_CORE_ICACHE	arch/blackfin/include/asm/cache.h	/^# define __ARCH_SYNC_CORE_ICACHE$/;"	d
__ARCH_TWI_H	arch/blackfin/include/asm/twi.h	/^#define __ARCH_TWI_H$/;"	d
__ARCH_ZYNQMP_GPIO_H	arch/arm/include/asm/arch-zynqmp/gpio.h	/^#define __ARCH_ZYNQMP_GPIO_H$/;"	d
__ARG_PLACEHOLDER_1	include/linux/kconfig.h	/^#define __ARG_PLACEHOLDER_1 /;"	d
__ARISTAINETOS2B_CONFIG_H	include/configs/aristainetos2b.h	/^#define __ARISTAINETOS2B_CONFIG_H$/;"	d
__ARISTAINETOS2_CONFIG_H	include/configs/aristainetos2.h	/^#define __ARISTAINETOS2_CONFIG_H$/;"	d
__ARISTAINETOS_COMMON_CONFIG_H	include/configs/aristainetos-common.h	/^#define __ARISTAINETOS_COMMON_CONFIG_H$/;"	d
__ARISTAINETOS_CONFIG_H	include/configs/aristainetos.h	/^#define __ARISTAINETOS_CONFIG_H$/;"	d
__ARMADA100_FEC_H__	drivers/net/armada100_fec.h	/^#define __ARMADA100_FEC_H__$/;"	d
__ARMADA100_MFP_H	arch/arm/include/asm/arch-armada100/mfp.h	/^#define __ARMADA100_MFP_H$/;"	d
__ARMADA100_SPI_H_	arch/arm/include/asm/arch-armada100/spi.h	/^#define __ARMADA100_SPI_H_$/;"	d
__ARMADILLO_800EVA_H	include/configs/armadillo-800eva.h	/^#define __ARMADILLO_800EVA_H$/;"	d
__ARMCOREMODULE_H	include/armcoremodule.h	/^#define __ARMCOREMODULE_H$/;"	d
__ARMPLL_H	arch/arm/include/asm/iproc-common/armpll.h	/^#define __ARMPLL_H$/;"	d
__ARMV7_PSCI_STACK_IN_RAM	arch/arm/cpu/u-boot.lds	/^#define __ARMV7_PSCI_STACK_IN_RAM$/;"	d	file:
__ARM_EBI_H	board/armltd/integrator/arm-ebi.h	/^#define __ARM_EBI_H$/;"	d
__ARM_PL180_MMCI_H__	drivers/mmc/arm_pl180_mmci.h	/^#define __ARM_PL180_MMCI_H__$/;"	d
__ARM_PSCI_H__	arch/arm/include/asm/psci.h	/^#define __ARM_PSCI_H__$/;"	d
__ARM_SC_H	board/armltd/integrator/integrator-sc.h	/^#define __ARM_SC_H$/;"	d
__ARP_H__	net/arp.h	/^#define __ARP_H__$/;"	d
__ASMARM_SETUP_H	arch/arm/include/asm/setup.h	/^#define __ASMARM_SETUP_H$/;"	d
__ASMNDS32_SETUP_H	arch/nds32/include/asm/setup.h	/^#define __ASMNDS32_SETUP_H$/;"	d
__ASMPPC_MPC512X_H	arch/powerpc/include/asm/mpc512x.h	/^#define __ASMPPC_MPC512X_H$/;"	d
__ASMPPC_MPC5XXX_H	include/mpc5xxx.h	/^#define __ASMPPC_MPC5XXX_H$/;"	d
__ASM_ARCH_AT91SAM9_MATRIX_H	arch/arm/mach-at91/include/mach/at91sam9_matrix.h	/^#define __ASM_ARCH_AT91SAM9_MATRIX_H$/;"	d
__ASM_ARCH_AT91_GPIO_H	arch/arm/mach-at91/include/mach/gpio.h	/^#define __ASM_ARCH_AT91_GPIO_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx25/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx27/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx31/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx35/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx5/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-mx6/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-s32v234/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/include/asm/arch-vf610/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_H	arch/arm/mach-keystone/include/mach/clock.h	/^#define __ASM_ARCH_CLOCK_H$/;"	d
__ASM_ARCH_CLOCK_K2E_H	arch/arm/mach-keystone/include/mach/clock-k2e.h	/^#define __ASM_ARCH_CLOCK_K2E_H$/;"	d
__ASM_ARCH_CLOCK_K2G_H	arch/arm/mach-keystone/include/mach/clock-k2g.h	/^#define __ASM_ARCH_CLOCK_K2G_H$/;"	d
__ASM_ARCH_CLOCK_K2HK_H	arch/arm/mach-keystone/include/mach/clock-k2hk.h	/^#define __ASM_ARCH_CLOCK_K2HK_H$/;"	d
__ASM_ARCH_CLOCK_K2L_H	arch/arm/mach-keystone/include/mach/clock-k2l.h	/^#define __ASM_ARCH_CLOCK_K2L_H$/;"	d
__ASM_ARCH_CRU_RK3399_H_	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^#define __ASM_ARCH_CRU_RK3399_H_$/;"	d
__ASM_ARCH_ELM_H	include/linux/mtd/omap_elm.h	/^#define __ASM_ARCH_ELM_H$/;"	d
__ASM_ARCH_EXYNOS_COMMON_SPI_H_	arch/arm/mach-exynos/include/mach/spi.h	/^#define __ASM_ARCH_EXYNOS_COMMON_SPI_H_$/;"	d
__ASM_ARCH_EXYNOS_SPL_H__	arch/arm/mach-exynos/include/mach/spl.h	/^#define __ASM_ARCH_EXYNOS_SPL_H__$/;"	d
__ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^#define __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_$/;"	d
__ASM_ARCH_FSL_LAYERSCAPE_IMX_REGS_H__	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^#define __ASM_ARCH_FSL_LAYERSCAPE_IMX_REGS_H__$/;"	d
__ASM_ARCH_GPIO	arch/x86/include/asm/arch-broadwell/gpio.h	/^#define __ASM_ARCH_GPIO$/;"	d
__ASM_ARCH_GPIO_H	arch/arm/mach-exynos/include/mach/gpio.h	/^#define __ASM_ARCH_GPIO_H$/;"	d
__ASM_ARCH_GPIO_H	arch/arm/mach-rmobile/include/mach/gpio.h	/^#define __ASM_ARCH_GPIO_H$/;"	d
__ASM_ARCH_GPIO_H	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^#define __ASM_ARCH_GPIO_H$/;"	d
__ASM_ARCH_HARDWARE_H	arch/arm/include/asm/arch-pxa/hardware.h	/^#define __ASM_ARCH_HARDWARE_H$/;"	d
__ASM_ARCH_HARDWARE_H	arch/arm/mach-davinci/include/mach/hardware.h	/^#define __ASM_ARCH_HARDWARE_H$/;"	d
__ASM_ARCH_HARDWARE_H	arch/arm/mach-keystone/include/mach/hardware.h	/^#define __ASM_ARCH_HARDWARE_H$/;"	d
__ASM_ARCH_HARDWARE_K2E_H	arch/arm/mach-keystone/include/mach/hardware-k2e.h	/^#define __ASM_ARCH_HARDWARE_K2E_H$/;"	d
__ASM_ARCH_HARDWARE_K2G_H	arch/arm/mach-keystone/include/mach/hardware-k2g.h	/^#define __ASM_ARCH_HARDWARE_K2G_H$/;"	d
__ASM_ARCH_HARDWARE_K2HK_H	arch/arm/mach-keystone/include/mach/hardware-k2hk.h	/^#define __ASM_ARCH_HARDWARE_K2HK_H$/;"	d
__ASM_ARCH_HARDWARE_K2L_H	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^#define __ASM_ARCH_HARDWARE_K2L_H$/;"	d
__ASM_ARCH_I2C_H	arch/arm/include/asm/arch-rockchip/i2c.h	/^#define __ASM_ARCH_I2C_H$/;"	d
__ASM_ARCH_IMX6ULL_PINS_H__	arch/arm/include/asm/arch-mx6/mx6ull_pins.h	/^#define __ASM_ARCH_IMX6ULL_PINS_H__$/;"	d
__ASM_ARCH_IMX6UL_PINS_H__	arch/arm/include/asm/arch-mx6/mx6ul_pins.h	/^#define __ASM_ARCH_IMX6UL_PINS_H__$/;"	d
__ASM_ARCH_IMX7D_PINS_H__	arch/arm/include/asm/arch-mx7/mx7d_pins.h	/^#define __ASM_ARCH_IMX7D_PINS_H__$/;"	d
__ASM_ARCH_IMX_GPIO_H	arch/arm/include/asm/imx-common/gpio.h	/^#define __ASM_ARCH_IMX_GPIO_H$/;"	d
__ASM_ARCH_IMX_REGS_H__	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^#define __ASM_ARCH_IMX_REGS_H__$/;"	d
__ASM_ARCH_IMX_REGS_H__	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^#define __ASM_ARCH_IMX_REGS_H__$/;"	d
__ASM_ARCH_IMX_REGS_H__	arch/arm/include/asm/arch-vf610/imx-regs.h	/^#define __ASM_ARCH_IMX_REGS_H__$/;"	d
__ASM_ARCH_IOMUX_H__	arch/arm/include/asm/arch-mx6/iomux.h	/^#define __ASM_ARCH_IOMUX_H__$/;"	d
__ASM_ARCH_IPU_H__	drivers/video/ipu.h	/^#define __ASM_ARCH_IPU_H__$/;"	d
__ASM_ARCH_LS102XA_CLOCK_H_	arch/arm/include/asm/arch-ls102xa/clock.h	/^#define __ASM_ARCH_LS102XA_CLOCK_H_$/;"	d
__ASM_ARCH_LS102XA_GPIO_H_	arch/arm/include/asm/arch-ls102xa/gpio.h	/^#define __ASM_ARCH_LS102XA_GPIO_H_$/;"	d
__ASM_ARCH_LS102XA_IMMAP_H_	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^#define __ASM_ARCH_LS102XA_IMMAP_H_$/;"	d
__ASM_ARCH_MC9SDZ60_H	include/mc9sdz60.h	/^#define __ASM_ARCH_MC9SDZ60_H$/;"	d
__ASM_ARCH_MEMORY_H	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __ASM_ARCH_MEMORY_H$/;"	d
__ASM_ARCH_MICROCODE_H	arch/x86/include/asm/microcode.h	/^#define __ASM_ARCH_MICROCODE_H$/;"	d
__ASM_ARCH_MMC_H_	arch/arm/mach-exynos/include/mach/mmc.h	/^#define __ASM_ARCH_MMC_H_$/;"	d
__ASM_ARCH_MMC_H_	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^#define __ASM_ARCH_MMC_H_$/;"	d
__ASM_ARCH_MMU_H	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^#define __ASM_ARCH_MMU_H$/;"	d
__ASM_ARCH_MUX_K2G_H	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^#define __ASM_ARCH_MUX_K2G_H$/;"	d
__ASM_ARCH_MX25_GPIO_H	arch/arm/include/asm/arch-mx25/gpio.h	/^#define __ASM_ARCH_MX25_GPIO_H$/;"	d
__ASM_ARCH_MX27_GPIO_H	arch/arm/include/asm/arch-mx27/gpio.h	/^#define __ASM_ARCH_MX27_GPIO_H$/;"	d
__ASM_ARCH_MX31_GPIO_H	arch/arm/include/asm/arch-mx31/gpio.h	/^#define __ASM_ARCH_MX31_GPIO_H$/;"	d
__ASM_ARCH_MX31_IMX_REGS_H	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define __ASM_ARCH_MX31_IMX_REGS_H$/;"	d
__ASM_ARCH_MX35_GPIO_H	arch/arm/include/asm/arch-mx35/gpio.h	/^#define __ASM_ARCH_MX35_GPIO_H$/;"	d
__ASM_ARCH_MX35_H	arch/arm/include/asm/arch-mx35/imx-regs.h	/^#define __ASM_ARCH_MX35_H$/;"	d
__ASM_ARCH_MX5_GPIO_H	arch/arm/include/asm/arch-mx5/gpio.h	/^#define __ASM_ARCH_MX5_GPIO_H$/;"	d
__ASM_ARCH_MX5_IMX_REGS_H__	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define __ASM_ARCH_MX5_IMX_REGS_H__$/;"	d
__ASM_ARCH_MX6DLS_DDR_H__	arch/arm/include/asm/arch-mx6/mx6dl-ddr.h	/^#define __ASM_ARCH_MX6DLS_DDR_H__$/;"	d
__ASM_ARCH_MX6Q_DDR_H__	arch/arm/include/asm/arch-mx6/mx6q-ddr.h	/^#define __ASM_ARCH_MX6Q_DDR_H__$/;"	d
__ASM_ARCH_MX6SL_DDR_H__	arch/arm/include/asm/arch-mx6/mx6sl-ddr.h	/^#define __ASM_ARCH_MX6SL_DDR_H__$/;"	d
__ASM_ARCH_MX6SX_DDR_H__	arch/arm/include/asm/arch-mx6/mx6sx-ddr.h	/^#define __ASM_ARCH_MX6SX_DDR_H__$/;"	d
__ASM_ARCH_MX6UL_DDR_H__	arch/arm/include/asm/arch-mx6/mx6ul-ddr.h	/^#define __ASM_ARCH_MX6UL_DDR_H__$/;"	d
__ASM_ARCH_MX6_DDR_H__	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^#define __ASM_ARCH_MX6_DDR_H__$/;"	d
__ASM_ARCH_MX6_GPIO_H	arch/arm/include/asm/arch-mx6/gpio.h	/^#define __ASM_ARCH_MX6_GPIO_H$/;"	d
__ASM_ARCH_MX6_IMX_REGS_H__	arch/arm/include/asm/arch-mx6/imx-regs.h	/^#define __ASM_ARCH_MX6_IMX_REGS_H__$/;"	d
__ASM_ARCH_MX6_MX6DL_PINS_H__	arch/arm/include/asm/arch-mx6/mx6dl_pins.h	/^#define __ASM_ARCH_MX6_MX6DL_PINS_H__$/;"	d
__ASM_ARCH_MX6_MX6Q_PINS_H__	arch/arm/include/asm/arch-mx6/mx6q_pins.h	/^#define __ASM_ARCH_MX6_MX6Q_PINS_H__$/;"	d
__ASM_ARCH_MX6_MX6SL_PINS_H__	arch/arm/include/asm/arch-mx6/mx6sl_pins.h	/^#define __ASM_ARCH_MX6_MX6SL_PINS_H__$/;"	d
__ASM_ARCH_MX6_MX6_PINS_H__	arch/arm/include/asm/arch-mx6/mx6sx_pins.h	/^#define __ASM_ARCH_MX6_MX6_PINS_H__$/;"	d
__ASM_ARCH_MX6_PINS_H__	arch/arm/include/asm/arch-mx6/mx6-pins.h	/^#define __ASM_ARCH_MX6_PINS_H__$/;"	d
__ASM_ARCH_MX7_GPIO_H	arch/arm/include/asm/arch-mx7/gpio.h	/^#define __ASM_ARCH_MX7_GPIO_H$/;"	d
__ASM_ARCH_MX7_IMX_REGS_H__	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define __ASM_ARCH_MX7_IMX_REGS_H__$/;"	d
__ASM_ARCH_MX7_PINS_H__	arch/arm/include/asm/arch-mx7/mx7-pins.h	/^#define __ASM_ARCH_MX7_PINS_H__$/;"	d
__ASM_ARCH_MX85XX_GPIO_H	arch/powerpc/include/asm/arch-mpc85xx/gpio.h	/^#define __ASM_ARCH_MX85XX_GPIO_H$/;"	d
__ASM_ARCH_MXCFB_H__	drivers/video/mxcfb.h	/^#define __ASM_ARCH_MXCFB_H__$/;"	d
__ASM_ARCH_MXC_MXC_I2C_H__	arch/arm/include/asm/imx-common/mxc_i2c.h	/^#define __ASM_ARCH_MXC_MXC_I2C_H__$/;"	d
__ASM_ARCH_OMAP3_MUSB_H	arch/arm/include/asm/arch-omap3/musb.h	/^#define __ASM_ARCH_OMAP3_MUSB_H$/;"	d
__ASM_ARCH_PCH_H	arch/x86/include/asm/arch-broadwell/pch.h	/^#define __ASM_ARCH_PCH_H$/;"	d
__ASM_ARCH_PINMUX_DEFS_H	arch/arm/mach-davinci/include/mach/pinmux_defs.h	/^#define __ASM_ARCH_PINMUX_DEFS_H$/;"	d
__ASM_ARCH_PM_H	arch/x86/include/asm/arch-broadwell/pm.h	/^#define __ASM_ARCH_PM_H$/;"	d
__ASM_ARCH_PXA3XX_NAND_H	drivers/mtd/nand/pxa3xx_nand.h	/^#define __ASM_ARCH_PXA3XX_NAND_H$/;"	d
__ASM_ARCH_R8A7740_H	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^#define __ASM_ARCH_R8A7740_H$/;"	d
__ASM_ARCH_R8A7790_H	arch/arm/mach-rmobile/include/mach/r8a7790.h	/^#define __ASM_ARCH_R8A7790_H$/;"	d
__ASM_ARCH_R8A7791_H	arch/arm/mach-rmobile/include/mach/r8a7791.h	/^#define __ASM_ARCH_R8A7791_H$/;"	d
__ASM_ARCH_R8A7792_H	arch/arm/mach-rmobile/include/mach/r8a7792.h	/^#define __ASM_ARCH_R8A7792_H$/;"	d
__ASM_ARCH_R8A7793_H	arch/arm/mach-rmobile/include/mach/r8a7793.h	/^#define __ASM_ARCH_R8A7793_H$/;"	d
__ASM_ARCH_R8A7794_H	arch/arm/mach-rmobile/include/mach/r8a7794.h	/^#define __ASM_ARCH_R8A7794_H$/;"	d
__ASM_ARCH_R8A7795_H	arch/arm/mach-rmobile/include/mach/r8a7795.h	/^#define __ASM_ARCH_R8A7795_H$/;"	d
__ASM_ARCH_RCAR_BASE_H	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^#define __ASM_ARCH_RCAR_BASE_H$/;"	d
__ASM_ARCH_RCAR_GEN3_BASE_H	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^#define __ASM_ARCH_RCAR_GEN3_BASE_H$/;"	d
__ASM_ARCH_RCAR_MSTP_H	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define __ASM_ARCH_RCAR_MSTP_H$/;"	d
__ASM_ARCH_REGS_USB_OTG_HS_H	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^#define __ASM_ARCH_REGS_USB_OTG_HS_H$/;"	d
__ASM_ARCH_RMOBILE_H	arch/arm/mach-rmobile/include/mach/rmobile.h	/^#define __ASM_ARCH_RMOBILE_H$/;"	d
__ASM_ARCH_RMOBILE_SH73A0_H	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^#define __ASM_ARCH_RMOBILE_SH73A0_H$/;"	d
__ASM_ARCH_SPEAR_GPIO_H	arch/arm/include/asm/arch-spear/gpio.h	/^#define __ASM_ARCH_SPEAR_GPIO_H$/;"	d
__ASM_ARCH_SPL_H__	arch/arm/include/asm/arch-ls102xa/spl.h	/^#define __ASM_ARCH_SPL_H__$/;"	d
__ASM_ARCH_SROMC_H_	arch/arm/mach-exynos/include/mach/sromc.h	/^#define __ASM_ARCH_SROMC_H_$/;"	d
__ASM_ARCH_SROMC_H_	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^#define __ASM_ARCH_SROMC_H_$/;"	d
__ASM_ARCH_STV0991_GPIO_H	arch/arm/include/asm/arch-stv0991/gpio.h	/^#define __ASM_ARCH_STV0991_GPIO_H$/;"	d
__ASM_ARCH_TEGRA124_PWM_H	arch/arm/include/asm/arch-tegra124/pwm.h	/^#define __ASM_ARCH_TEGRA124_PWM_H$/;"	d
__ASM_ARCH_TEGRA20_PWM_H	arch/arm/include/asm/arch-tegra20/pwm.h	/^#define __ASM_ARCH_TEGRA20_PWM_H$/;"	d
__ASM_ARCH_TEGRA_DC_H	arch/arm/include/asm/arch-tegra/dc.h	/^#define __ASM_ARCH_TEGRA_DC_H$/;"	d
__ASM_ARCH_TEGRA_DISPLAY_H	arch/arm/include/asm/arch-tegra124/display.h	/^#define __ASM_ARCH_TEGRA_DISPLAY_H$/;"	d
__ASM_ARCH_TEGRA_DISPLAY_H	arch/arm/include/asm/arch-tegra20/display.h	/^#define __ASM_ARCH_TEGRA_DISPLAY_H$/;"	d
__ASM_ARCH_TEGRA_GPU_H	arch/arm/include/asm/arch-tegra/gpu.h	/^#define __ASM_ARCH_TEGRA_GPU_H$/;"	d
__ASM_ARCH_TEGRA_PWM_H	arch/arm/include/asm/arch-tegra/pwm.h	/^#define __ASM_ARCH_TEGRA_PWM_H$/;"	d
__ASM_ARCH_TIMER_H	arch/arm/include/asm/arch-rockchip/timer.h	/^#define __ASM_ARCH_TIMER_H$/;"	d
__ASM_ARCH_TMU_H	arch/arm/mach-exynos/include/mach/tmu.h	/^#define __ASM_ARCH_TMU_H$/;"	d
__ASM_ARCH_UART_H	arch/arm/include/asm/arch-rockchip/uart.h	/^#define __ASM_ARCH_UART_H$/;"	d
__ASM_ARCH_UART_H_	arch/arm/mach-exynos/include/mach/uart.h	/^#define __ASM_ARCH_UART_H_$/;"	d
__ASM_ARCH_UART_H_	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^#define __ASM_ARCH_UART_H_$/;"	d
__ASM_ARCH_VF610_DDRMC_H	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^#define __ASM_ARCH_VF610_DDRMC_H$/;"	d
__ASM_ARCH_VF610_GPIO_H	arch/arm/include/asm/arch-vf610/gpio.h	/^#define __ASM_ARCH_VF610_GPIO_H$/;"	d
__ASM_ARC_BITOPS_H	arch/arc/include/asm/bitops.h	/^#define __ASM_ARC_BITOPS_H$/;"	d
__ASM_ARC_BYTEORDER_H	arch/arc/include/asm/byteorder.h	/^#define __ASM_ARC_BYTEORDER_H$/;"	d
__ASM_ARC_CACHE_H	arch/arc/include/asm/cache.h	/^#define __ASM_ARC_CACHE_H$/;"	d
__ASM_ARC_CONFIG_H_	arch/arc/include/asm/config.h	/^#define __ASM_ARC_CONFIG_H_$/;"	d
__ASM_ARC_GLOBAL_DATA_H	arch/arc/include/asm/global_data.h	/^#define __ASM_ARC_GLOBAL_DATA_H$/;"	d
__ASM_ARC_IO_H	arch/arc/include/asm/io.h	/^#define __ASM_ARC_IO_H$/;"	d
__ASM_ARC_LINKAGE_H	arch/arc/include/asm/linkage.h	/^#define __ASM_ARC_LINKAGE_H$/;"	d
__ASM_ARC_POSIX_TYPES_H	arch/arc/include/asm/posix_types.h	/^#define __ASM_ARC_POSIX_TYPES_H$/;"	d
__ASM_ARC_PTRACE_H	arch/arc/include/asm/ptrace.h	/^#define __ASM_ARC_PTRACE_H$/;"	d
__ASM_ARC_SECTIONS_H	arch/arc/include/asm/sections.h	/^#define __ASM_ARC_SECTIONS_H$/;"	d
__ASM_ARC_STRING_H	arch/arc/include/asm/string.h	/^#define __ASM_ARC_STRING_H$/;"	d
__ASM_ARC_TYPES_H	arch/arc/include/asm/types.h	/^#define __ASM_ARC_TYPES_H$/;"	d
__ASM_ARC_U_BOOT_ARC_H__	arch/arc/include/asm/u-boot-arc.h	/^#define __ASM_ARC_U_BOOT_ARC_H__$/;"	d
__ASM_ARC_U_BOOT_H__	arch/arc/include/asm/u-boot.h	/^#define __ASM_ARC_U_BOOT_H__$/;"	d
__ASM_ARM_ARCH_ADC_H_	arch/arm/mach-exynos/include/mach/adc.h	/^#define __ASM_ARM_ARCH_ADC_H_$/;"	d
__ASM_ARM_ARCH_CLK_H_	arch/arm/mach-exynos/include/mach/clk.h	/^#define __ASM_ARM_ARCH_CLK_H_$/;"	d
__ASM_ARM_ARCH_CLK_H_	arch/arm/mach-s5pc1xx/include/mach/clk.h	/^#define __ASM_ARM_ARCH_CLK_H_$/;"	d
__ASM_ARM_ARCH_CLK_H__	arch/arm/mach-at91/include/mach/clk.h	/^#define __ASM_ARM_ARCH_CLK_H__$/;"	d
__ASM_ARM_ARCH_CLOCK_H_	arch/arm/mach-exynos/include/mach/clock.h	/^#define __ASM_ARM_ARCH_CLOCK_H_$/;"	d
__ASM_ARM_ARCH_CLOCK_H_	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^#define __ASM_ARM_ARCH_CLOCK_H_$/;"	d
__ASM_ARM_ARCH_DP_H_	arch/arm/mach-exynos/include/mach/dp.h	/^#define __ASM_ARM_ARCH_DP_H_$/;"	d
__ASM_ARM_ARCH_DSIM_H_	arch/arm/mach-exynos/include/mach/dsim.h	/^#define __ASM_ARM_ARCH_DSIM_H_$/;"	d
__ASM_ARM_ARCH_EHCI_H__	arch/arm/mach-exynos/include/mach/ehci.h	/^#define __ASM_ARM_ARCH_EHCI_H__$/;"	d
__ASM_ARM_ARCH_FB_H_	arch/arm/mach-exynos/include/mach/fb.h	/^#define __ASM_ARM_ARCH_FB_H_$/;"	d
__ASM_ARM_ARCH_HARDWARE_H__	arch/arm/mach-at91/include/mach/hardware.h	/^#define __ASM_ARM_ARCH_HARDWARE_H__$/;"	d
__ASM_ARM_ARCH_MACRO_H__	arch/arm/include/asm/arch-mx25/macro.h	/^#define __ASM_ARM_ARCH_MACRO_H__$/;"	d
__ASM_ARM_ARCH_PERIPH_H	arch/arm/include/asm/arch-hi6220/periph.h	/^#define __ASM_ARM_ARCH_PERIPH_H$/;"	d
__ASM_ARM_ARCH_PERIPH_H	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^#define __ASM_ARM_ARCH_PERIPH_H$/;"	d
__ASM_ARM_ARCH_PERIPH_H	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^#define __ASM_ARM_ARCH_PERIPH_H$/;"	d
__ASM_ARM_ARCH_PERIPH_H	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^#define __ASM_ARM_ARCH_PERIPH_H$/;"	d
__ASM_ARM_ARCH_PERIPH_H	arch/arm/mach-exynos/include/mach/periph.h	/^#define __ASM_ARM_ARCH_PERIPH_H$/;"	d
__ASM_ARM_ARCH_PERIPH_H	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^#define __ASM_ARM_ARCH_PERIPH_H$/;"	d
__ASM_ARM_ARCH_PINMUX_H	arch/arm/include/asm/arch-hi6220/pinmux.h	/^#define __ASM_ARM_ARCH_PINMUX_H$/;"	d
__ASM_ARM_ARCH_PINMUX_H	arch/arm/mach-exynos/include/mach/pinmux.h	/^#define __ASM_ARM_ARCH_PINMUX_H$/;"	d
__ASM_ARM_ARCH_PINMUX_H	arch/arm/mach-s5pc1xx/include/mach/pinmux.h	/^#define __ASM_ARM_ARCH_PINMUX_H$/;"	d
__ASM_ARM_ARCH_POWER_H_	arch/arm/mach-exynos/include/mach/power.h	/^#define __ASM_ARM_ARCH_POWER_H_$/;"	d
__ASM_ARM_ARCH_POWER_H_	arch/arm/mach-s5pc1xx/include/mach/power.h	/^#define __ASM_ARM_ARCH_POWER_H_$/;"	d
__ASM_ARM_ARCH_PWM_H_	arch/arm/mach-exynos/include/mach/pwm.h	/^#define __ASM_ARM_ARCH_PWM_H_$/;"	d
__ASM_ARM_ARCH_PWM_H_	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^#define __ASM_ARM_ARCH_PWM_H_$/;"	d
__ASM_ARM_ARCH_SYSTEM_H_	arch/arm/mach-exynos/include/mach/system.h	/^#define __ASM_ARM_ARCH_SYSTEM_H_$/;"	d
__ASM_ARM_ARCH_WATCHDOG_H_	arch/arm/mach-exynos/include/mach/watchdog.h	/^#define __ASM_ARM_ARCH_WATCHDOG_H_$/;"	d
__ASM_ARM_ARCH_WATCHDOG_H_	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^#define __ASM_ARM_ARCH_WATCHDOG_H_$/;"	d
__ASM_ARM_ATOMIC_H	arch/arm/include/asm/atomic.h	/^#define __ASM_ARM_ATOMIC_H$/;"	d
__ASM_ARM_BITOPS_H	arch/arm/include/asm/bitops.h	/^#define __ASM_ARM_BITOPS_H$/;"	d
__ASM_ARM_BYTEORDER_H	arch/arm/include/asm/byteorder.h	/^#define __ASM_ARM_BYTEORDER_H$/;"	d
__ASM_ARM_DMA_MAPPING_H	arch/arm/include/asm/dma-mapping.h	/^#define __ASM_ARM_DMA_MAPPING_H$/;"	d
__ASM_ARM_IO_H	arch/arm/include/asm/io.h	/^#define __ASM_ARM_IO_H$/;"	d
__ASM_ARM_MACH_TYPE_H	arch/arm/include/asm/mach-types.h	/^#define __ASM_ARM_MACH_TYPE_H$/;"	d
__ASM_ARM_MACRO_H__	arch/arm/include/asm/macro.h	/^#define __ASM_ARM_MACRO_H__$/;"	d
__ASM_ARM_MEMORY_H	arch/arm/include/asm/memory.h	/^#define __ASM_ARM_MEMORY_H$/;"	d
__ASM_ARM_OMAP_MUSB_H	arch/arm/include/asm/omap_musb.h	/^#define __ASM_ARM_OMAP_MUSB_H$/;"	d
__ASM_ARM_PROCESSOR_H	arch/arm/include/asm/processor.h	/^#define __ASM_ARM_PROCESSOR_H$/;"	d
__ASM_ARM_PTRACE_H	arch/arm/include/asm/ptrace.h	/^#define __ASM_ARM_PTRACE_H$/;"	d
__ASM_ARM_SECTIONS_H	arch/arm/include/asm/sections.h	/^#define __ASM_ARM_SECTIONS_H$/;"	d
__ASM_ARM_STRING_H	arch/arm/include/asm/string.h	/^#define __ASM_ARM_STRING_H$/;"	d
__ASM_ARM_SYSTEM_H	arch/arm/include/asm/system.h	/^#define __ASM_ARM_SYSTEM_H$/;"	d
__ASM_ARM_TYPES_H	arch/arm/include/asm/types.h	/^#define __ASM_ARM_TYPES_H$/;"	d
__ASM_ASM_H	arch/mips/include/asm/asm.h	/^#define __ASM_ASM_H$/;"	d
__ASM_AVR32_ADDRSPACE_H	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define __ASM_AVR32_ADDRSPACE_H$/;"	d
__ASM_AVR32_ARCH_CHIP_FEATURES_H__	arch/avr32/include/asm/arch-at32ap700x/chip-features.h	/^#define __ASM_AVR32_ARCH_CHIP_FEATURES_H__$/;"	d
__ASM_AVR32_ARCH_CLK_H__	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^#define __ASM_AVR32_ARCH_CLK_H__$/;"	d
__ASM_AVR32_ARCH_GPIO_H__	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^#define __ASM_AVR32_ARCH_GPIO_H__$/;"	d
__ASM_AVR32_ARCH_HMATRIX_H__	arch/avr32/include/asm/arch-at32ap700x/hmatrix.h	/^#define __ASM_AVR32_ARCH_HMATRIX_H__$/;"	d
__ASM_AVR32_ARCH_PORTMUX_H__	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^#define __ASM_AVR32_ARCH_PORTMUX_H__$/;"	d
__ASM_AVR32_BITOPS_H	arch/avr32/include/asm/bitops.h	/^#define __ASM_AVR32_BITOPS_H$/;"	d
__ASM_AVR32_BYTEORDER_H	arch/avr32/include/asm/byteorder.h	/^#define __ASM_AVR32_BYTEORDER_H$/;"	d
__ASM_AVR32_CACHEFLUSH_H	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^#define __ASM_AVR32_CACHEFLUSH_H$/;"	d
__ASM_AVR32_DMA_MAPPING_H	arch/avr32/include/asm/dma-mapping.h	/^#define __ASM_AVR32_DMA_MAPPING_H$/;"	d
__ASM_AVR32_HMATRIX_COMMON_H__	arch/avr32/include/asm/hmatrix-common.h	/^#define __ASM_AVR32_HMATRIX_COMMON_H__$/;"	d
__ASM_AVR32_HSDRAMC1_H__	arch/avr32/cpu/hsdramc1.h	/^#define __ASM_AVR32_HSDRAMC1_H__$/;"	d
__ASM_AVR32_IO_H	arch/avr32/include/asm/io.h	/^#define __ASM_AVR32_IO_H$/;"	d
__ASM_AVR32_POSIX_TYPES_H	arch/avr32/include/asm/posix_types.h	/^#define __ASM_AVR32_POSIX_TYPES_H$/;"	d
__ASM_AVR32_PROCESSOR_H	arch/avr32/include/asm/processor.h	/^#define __ASM_AVR32_PROCESSOR_H$/;"	d
__ASM_AVR32_PTRACE_H	arch/avr32/include/asm/ptrace.h	/^#define __ASM_AVR32_PTRACE_H$/;"	d
__ASM_AVR32_SDRAM_H	arch/avr32/include/asm/sdram.h	/^#define __ASM_AVR32_SDRAM_H$/;"	d
__ASM_AVR32_SECTIONS_H	arch/avr32/include/asm/sections.h	/^#define __ASM_AVR32_SECTIONS_H$/;"	d
__ASM_AVR32_SETUP_H__	arch/avr32/include/asm/setup.h	/^#define __ASM_AVR32_SETUP_H__$/;"	d
__ASM_AVR32_STRING_H	arch/avr32/include/asm/string.h	/^#define __ASM_AVR32_STRING_H$/;"	d
__ASM_AVR32_SYSREG_H__	arch/avr32/include/asm/sysreg.h	/^#define __ASM_AVR32_SYSREG_H__$/;"	d
__ASM_AVR32_TYPES_H	arch/avr32/include/asm/types.h	/^#define __ASM_AVR32_TYPES_H$/;"	d
__ASM_BLACKFIN_CONFIG_POST_H__	arch/blackfin/include/asm/config.h	/^#define __ASM_BLACKFIN_CONFIG_POST_H__$/;"	d
__ASM_BLACKFIN_CONFIG_PRE_H__	arch/blackfin/include/asm/config-pre.h	/^#define __ASM_BLACKFIN_CONFIG_PRE_H__$/;"	d
__ASM_BLACKFIN_CPLB_H__	arch/blackfin/include/asm/cplb.h	/^#define __ASM_BLACKFIN_CPLB_H__$/;"	d
__ASM_BLACKFIN_KGDB_H__	arch/blackfin/lib/kgdb.h	/^#define __ASM_BLACKFIN_KGDB_H__$/;"	d
__ASM_BLACKFIN_PROCESSOR_H	arch/blackfin/include/asm/processor.h	/^#define __ASM_BLACKFIN_PROCESSOR_H$/;"	d
__ASM_BLACKFIN_SECTIONS_H	arch/blackfin/include/asm/sections.h	/^#define __ASM_BLACKFIN_SECTIONS_H$/;"	d
__ASM_CACHEOPS_H	arch/mips/include/asm/cacheops.h	/^#define	__ASM_CACHEOPS_H$/;"	d
__ASM_CPU_COMMON_H	arch/x86/include/asm/cpu_common.h	/^#define __ASM_CPU_COMMON_H$/;"	d
__ASM_CPU_FEATURES_H	arch/mips/include/asm/cpu-features.h	/^#define __ASM_CPU_FEATURES_H$/;"	d
__ASM_DAVINCI_RTC_H	arch/arm/include/asm/davinci_rtc.h	/^#define __ASM_DAVINCI_RTC_H$/;"	d
__ASM_GBL_DATA_H	arch/arm/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/blackfin/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/m68k/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/microblaze/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/mips/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/nds32/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/openrisc/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/powerpc/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/sandbox/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/sparc/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GBL_DATA_H	arch/x86/include/asm/global_data.h	/^#define __ASM_GBL_DATA_H$/;"	d
__ASM_GENERIC_BITS_PER_LONG	include/asm-generic/bitsperlong.h	/^#define __ASM_GENERIC_BITS_PER_LONG$/;"	d
__ASM_GENERIC_GBL_DATA_H	include/asm-generic/global_data.h	/^#define __ASM_GENERIC_GBL_DATA_H$/;"	d
__ASM_GENERIC_SIGNAL_H	include/asm-generic/signal.h	/^#define __ASM_GENERIC_SIGNAL_H$/;"	d
__ASM_GENERIC_U_BOOT_H__	include/asm-generic/u-boot.h	/^#define __ASM_GENERIC_U_BOOT_H__$/;"	d
__ASM_GLOBAL_DATA_H__	arch/avr32/include/asm/global_data.h	/^#define __ASM_GLOBAL_DATA_H__$/;"	d
__ASM_HARDWARE_H	arch/arm/include/asm/hardware.h	/^#define __ASM_HARDWARE_H$/;"	d
__ASM_I386_STRING_H	arch/x86/include/asm/string.h	/^#define __ASM_I386_STRING_H$/;"	d
__ASM_I386_TYPES_H	arch/x86/include/asm/types.h	/^#define __ASM_I386_TYPES_H$/;"	d
__ASM_IBMPC_H_	arch/x86/include/asm/ibmpc.h	/^#define __ASM_IBMPC_H_ /;"	d
__ASM_IC_ALI512X_H_	include/ali512x.h	/^#define __ASM_IC_ALI512X_H_$/;"	d
__ASM_INTEL_REGS_H	arch/x86/include/asm/intel_regs.h	/^#define __ASM_INTEL_REGS_H$/;"	d
__ASM_INTERRUPT_H_	arch/x86/include/asm/interrupt.h	/^#define __ASM_INTERRUPT_H_ /;"	d
__ASM_IOAPIC_H	arch/x86/include/asm/ioapic.h	/^#define __ASM_IOAPIC_H$/;"	d
__ASM_ISADEP_H	arch/mips/include/asm/isadep.h	/^#define __ASM_ISADEP_H$/;"	d
__ASM_LEON_H__	arch/sparc/include/asm/leon.h	/^#define __ASM_LEON_H__$/;"	d
__ASM_LIBGCC_H	arch/arc/lib/libgcc2.h	/^#define __ASM_LIBGCC_H$/;"	d
__ASM_LIBGCC_H	arch/mips/lib/libgcc.h	/^#define __ASM_LIBGCC_H$/;"	d
__ASM_LIBGCC_H	arch/sh/lib/libgcc.h	/^#define __ASM_LIBGCC_H$/;"	d
__ASM_LINKAGE_H	arch/arm/include/asm/linkage.h	/^#define __ASM_LINKAGE_H$/;"	d
__ASM_LINKAGE_H	arch/blackfin/include/asm/linkage.h	/^#define __ASM_LINKAGE_H$/;"	d
__ASM_LINKAGE_H	arch/nds32/include/asm/linkage.h	/^#define __ASM_LINKAGE_H$/;"	d
__ASM_LINKAGE_H	arch/xtensa/include/asm/linkage.h	/^#define __ASM_LINKAGE_H$/;"	d
__ASM_LPC_COMMON_H	arch/x86/include/asm/lpc_common.h	/^#define __ASM_LPC_COMMON_H$/;"	d
__ASM_M68K_IO_H__	arch/m68k/include/asm/io.h	/^#define __ASM_M68K_IO_H__$/;"	d
__ASM_M68K_PROCESSOR_H	arch/m68k/include/asm/processor.h	/^#define __ASM_M68K_PROCESSOR_H$/;"	d
__ASM_M68K_SECTIONS_H	arch/m68k/include/asm/sections.h	/^#define __ASM_M68K_SECTIONS_H$/;"	d
__ASM_MACH_AR71XX_REGS_H	arch/mips/mach-ath79/include/mach/ar71xx_regs.h	/^#define __ASM_MACH_AR71XX_REGS_H$/;"	d
__ASM_MACH_ATH79_H	arch/mips/mach-ath79/include/mach/ath79.h	/^#define __ASM_MACH_ATH79_H$/;"	d
__ASM_MACH_DDR_H	arch/mips/mach-ath79/include/mach/ddr.h	/^#define __ASM_MACH_DDR_H$/;"	d
__ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H	arch/mips/include/asm/mach-generic/cpu-feature-overrides.h	/^#define __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H$/;"	d
__ASM_MACH_GENERIC_IOREMAP_H	arch/mips/include/asm/mach-generic/ioremap.h	/^#define __ASM_MACH_GENERIC_IOREMAP_H$/;"	d
__ASM_MACH_GENERIC_MANGLE_PORT_H	arch/mips/include/asm/mach-generic/mangle-port.h	/^#define __ASM_MACH_GENERIC_MANGLE_PORT_H$/;"	d
__ASM_MACH_IRQS_H	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define __ASM_MACH_IRQS_H$/;"	d
__ASM_ME_COMMON_H	arch/x86/include/asm/me_common.h	/^#define __ASM_ME_COMMON_H$/;"	d
__ASM_MICROBLAZE_PROCESSOR_H	arch/microblaze/include/asm/processor.h	/^#define __ASM_MICROBLAZE_PROCESSOR_H$/;"	d
__ASM_MICROBLAZE_SECTIONS_H	arch/microblaze/include/asm/sections.h	/^#define __ASM_MICROBLAZE_SECTIONS_H$/;"	d
__ASM_MIPS_REG_H	arch/mips/include/asm/reg.h	/^#define __ASM_MIPS_REG_H$/;"	d
__ASM_MIPS_SECTIONS_H	arch/mips/include/asm/sections.h	/^#define __ASM_MIPS_SECTIONS_H$/;"	d
__ASM_MPSPEC_H	arch/x86/include/asm/mpspec.h	/^#define __ASM_MPSPEC_H$/;"	d
__ASM_MRC_COMMON_H	arch/x86/include/asm/mrc_common.h	/^#define __ASM_MRC_COMMON_H$/;"	d
__ASM_NDS32_MACH_TYPE_H	arch/nds32/include/asm/mach-types.h	/^#define __ASM_NDS32_MACH_TYPE_H$/;"	d
__ASM_NDS32_SECTIONS_H	arch/nds32/include/asm/sections.h	/^#define __ASM_NDS32_SECTIONS_H$/;"	d
__ASM_NDS_BITOPS_H	arch/nds32/include/asm/bitops.h	/^#define __ASM_NDS_BITOPS_H$/;"	d
__ASM_NDS_BYTEORDER_H	arch/nds32/include/asm/byteorder.h	/^#define __ASM_NDS_BYTEORDER_H$/;"	d
__ASM_NDS_DMA_MAPPING_H	arch/nds32/include/asm/dma-mapping.h	/^#define __ASM_NDS_DMA_MAPPING_H$/;"	d
__ASM_NDS_IO_H	arch/nds32/include/asm/io.h	/^#define __ASM_NDS_IO_H$/;"	d
__ASM_NDS_MACRO_H	arch/nds32/include/asm/macro.h	/^#define __ASM_NDS_MACRO_H$/;"	d
__ASM_NDS_PROCESSOR_H	arch/nds32/include/asm/processor.h	/^#define __ASM_NDS_PROCESSOR_H$/;"	d
__ASM_NDS_PTRACE_H	arch/nds32/include/asm/ptrace.h	/^#define __ASM_NDS_PTRACE_H$/;"	d
__ASM_NDS_STRING_H	arch/nds32/include/asm/string.h	/^#define __ASM_NDS_STRING_H$/;"	d
__ASM_NDS_SYSTEM_H	arch/nds32/include/asm/system.h	/^#define __ASM_NDS_SYSTEM_H$/;"	d
__ASM_NDS_TYPES_H	arch/nds32/include/asm/types.h	/^#define __ASM_NDS_TYPES_H$/;"	d
__ASM_NIOS2_BITOPS_H_	arch/nios2/include/asm/bitops.h	/^#define __ASM_NIOS2_BITOPS_H_$/;"	d
__ASM_NIOS2_BYTEORDER_H_	arch/nios2/include/asm/byteorder.h	/^#define __ASM_NIOS2_BYTEORDER_H_$/;"	d
__ASM_NIOS2_CACHE_H_	arch/nios2/include/asm/cache.h	/^#define __ASM_NIOS2_CACHE_H_$/;"	d
__ASM_NIOS2_DMA_MAPPING_H	arch/nios2/include/asm/dma-mapping.h	/^#define __ASM_NIOS2_DMA_MAPPING_H$/;"	d
__ASM_NIOS2_GLOBALDATA_H_	arch/nios2/include/asm/global_data.h	/^#define __ASM_NIOS2_GLOBALDATA_H_$/;"	d
__ASM_NIOS2_H__	arch/nios2/include/asm/nios2.h	/^#define __ASM_NIOS2_H__$/;"	d
__ASM_NIOS2_IO_H_	arch/nios2/include/asm/io.h	/^#define __ASM_NIOS2_IO_H_$/;"	d
__ASM_NIOS2_OPCODES_H_	arch/nios2/include/asm/opcodes.h	/^#define __ASM_NIOS2_OPCODES_H_$/;"	d
__ASM_NIOS2_POSIX_TYPES_H_	arch/nios2/include/asm/posix_types.h	/^#define __ASM_NIOS2_POSIX_TYPES_H_$/;"	d
__ASM_NIOS2_PROCESSOR_H_	arch/nios2/include/asm/processor.h	/^#define __ASM_NIOS2_PROCESSOR_H_$/;"	d
__ASM_NIOS2_PTRACE_H_	arch/nios2/include/asm/ptrace.h	/^#define __ASM_NIOS2_PTRACE_H_$/;"	d
__ASM_NIOS2_STRING_H_	arch/nios2/include/asm/string.h	/^#define __ASM_NIOS2_STRING_H_$/;"	d
__ASM_NIOS2_SYSTEM_H_	arch/nios2/include/asm/system.h	/^#define __ASM_NIOS2_SYSTEM_H_$/;"	d
__ASM_NIOS2_TYPES_H_	arch/nios2/include/asm/types.h	/^#define __ASM_NIOS2_TYPES_H_$/;"	d
__ASM_NIOS2_U_BOOT_H_	arch/nios2/include/asm/u-boot.h	/^#define __ASM_NIOS2_U_BOOT_H_$/;"	d
__ASM_OFFSETS_H__	include/generated/asm-offsets.h	/^#define __ASM_OFFSETS_H__$/;"	d
__ASM_OMAP_GPMC_H	include/linux/mtd/omap_gpmc.h	/^#define __ASM_OMAP_GPMC_H$/;"	d
__ASM_OPENRISC_BITOPS_H	arch/openrisc/include/asm/bitops.h	/^#define __ASM_OPENRISC_BITOPS_H$/;"	d
__ASM_OPENRISC_CACHE_H_	arch/openrisc/include/asm/cache.h	/^#define __ASM_OPENRISC_CACHE_H_$/;"	d
__ASM_OPENRISC_FFS_H	arch/openrisc/include/asm/bitops/ffs.h	/^#define __ASM_OPENRISC_FFS_H$/;"	d
__ASM_OPENRISC_FLS_H	arch/openrisc/include/asm/bitops/fls.h	/^#define __ASM_OPENRISC_FLS_H$/;"	d
__ASM_OPENRISC_IO_H	arch/openrisc/include/asm/io.h	/^#define __ASM_OPENRISC_IO_H$/;"	d
__ASM_OPENRISC_POSIX_TYPES_H	arch/openrisc/include/asm/posix_types.h	/^#define __ASM_OPENRISC_POSIX_TYPES_H$/;"	d
__ASM_OPENRISC_PROCESSOR_H	arch/openrisc/include/asm/processor.h	/^#define __ASM_OPENRISC_PROCESSOR_H$/;"	d
__ASM_OPENRISC_PTRACE_H	arch/openrisc/include/asm/ptrace.h	/^#define __ASM_OPENRISC_PTRACE_H$/;"	d
__ASM_OPENRISC_SECTIONS_H	arch/openrisc/include/asm/sections.h	/^#define __ASM_OPENRISC_SECTIONS_H$/;"	d
__ASM_OPENRISC_STRING_H	arch/openrisc/include/asm/string.h	/^#define __ASM_OPENRISC_STRING_H$/;"	d
__ASM_OPENRISC_SYSTEM_H	arch/openrisc/include/asm/system.h	/^#define __ASM_OPENRISC_SYSTEM_H$/;"	d
__ASM_POWERPC_SECTIONS_H	arch/powerpc/include/asm/sections.h	/^#define __ASM_POWERPC_SECTIONS_H$/;"	d
__ASM_PPC_FSL_LBC_H	arch/powerpc/include/asm/fsl_lbc.h	/^#define __ASM_PPC_FSL_LBC_H$/;"	d
__ASM_PPC_GPIO_H	arch/powerpc/include/asm/ppc4xx-gpio.h	/^#define __ASM_PPC_GPIO_H$/;"	d
__ASM_PPC_MC146818RTC_H	arch/powerpc/include/asm/mc146818rtc.h	/^#define __ASM_PPC_MC146818RTC_H$/;"	d
__ASM_PPC_PROCESSOR_H	arch/powerpc/include/asm/processor.h	/^#define __ASM_PPC_PROCESSOR_H$/;"	d
__ASM_PROCESSOR_H_	arch/x86/include/asm/processor.h	/^#define __ASM_PROCESSOR_H_ /;"	d
__ASM_PROC_DOMAIN_H	arch/arm/include/asm/proc-armv/domain.h	/^#define __ASM_PROC_DOMAIN_H$/;"	d
__ASM_PROC_PROCESSOR_H	arch/arm/include/asm/proc-armv/processor.h	/^#define __ASM_PROC_PROCESSOR_H$/;"	d
__ASM_PROC_PTRACE_H	arch/arm/include/asm/proc-armv/ptrace.h	/^#define __ASM_PROC_PTRACE_H$/;"	d
__ASM_PROC_SYSTEM_H	arch/arm/include/asm/proc-armv/system.h	/^#define __ASM_PROC_SYSTEM_H$/;"	d
__ASM_PROC_SYSTEM_H	arch/arm/thumb1/include/asm/proc-armv/system.h	/^#define __ASM_PROC_SYSTEM_H$/;"	d
__ASM_R8A7740_H__	arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h	/^#define __ASM_R8A7740_H__$/;"	d
__ASM_R8A7790_GPIO_H__	arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h	/^#define __ASM_R8A7790_GPIO_H__$/;"	d
__ASM_R8A7791_GPIO_H__	arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h	/^#define __ASM_R8A7791_GPIO_H__$/;"	d
__ASM_R8A7792_GPIO_H__	arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h	/^#define __ASM_R8A7792_GPIO_H__$/;"	d
__ASM_R8A7793_H__	arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h	/^#define __ASM_R8A7793_H__$/;"	d
__ASM_R8A7794_H__	arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h	/^#define __ASM_R8A7794_H__$/;"	d
__ASM_R8A7795_GPIO_H__	arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h	/^#define __ASM_R8A7795_GPIO_H__$/;"	d
__ASM_SANDBOX_BITOPS_H	arch/sandbox/include/asm/bitops.h	/^#define __ASM_SANDBOX_BITOPS_H$/;"	d
__ASM_SANDBOX_BYTEORDER_H	arch/sandbox/include/asm/byteorder.h	/^#define __ASM_SANDBOX_BYTEORDER_H$/;"	d
__ASM_SANDBOX_GPIO_H	arch/sandbox/include/asm/gpio.h	/^#define __ASM_SANDBOX_GPIO_H$/;"	d
__ASM_SANDBOX_PTRACE_H	arch/sandbox/include/asm/ptrace.h	/^#define __ASM_SANDBOX_PTRACE_H$/;"	d
__ASM_SANDBOX_SYSTEM_H	arch/sandbox/include/asm/system.h	/^#define __ASM_SANDBOX_SYSTEM_H$/;"	d
__ASM_SANDBOX_TYPES_H	arch/sandbox/include/asm/types.h	/^#define __ASM_SANDBOX_TYPES_H$/;"	d
__ASM_SDH_H__	arch/blackfin/include/asm/sdh.h	/^#define __ASM_SDH_H__$/;"	d
__ASM_SECURE_H	arch/arm/include/asm/secure.h	/^#define __ASM_SECURE_H$/;"	d
__ASM_SGIDEFS_H	arch/mips/include/asm/sgidefs.h	/^#define __ASM_SGIDEFS_H$/;"	d
__ASM_SH73A0_H__	arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h	/^#define __ASM_SH73A0_H__$/;"	d
__ASM_SH_BITOPS_H	arch/sh/include/asm/bitops.h	/^#define __ASM_SH_BITOPS_H$/;"	d
__ASM_SH_BYTEORDER_H_	arch/sh/include/asm/byteorder.h	/^#define __ASM_SH_BYTEORDER_H_$/;"	d
__ASM_SH_CACHE_H	arch/sh/include/asm/cache.h	/^#define __ASM_SH_CACHE_H$/;"	d
__ASM_SH_GLOBALDATA_H_	arch/sh/include/asm/global_data.h	/^#define __ASM_SH_GLOBALDATA_H_$/;"	d
__ASM_SH_IO_H	arch/sh/include/asm/io.h	/^#define __ASM_SH_IO_H$/;"	d
__ASM_SH_IRQFLAGS_H	arch/sh/include/asm/irqflags.h	/^#define __ASM_SH_IRQFLAGS_H$/;"	d
__ASM_SH_POSIX_TYPES_H	arch/sh/include/asm/posix_types.h	/^#define __ASM_SH_POSIX_TYPES_H$/;"	d
__ASM_SH_PTRACE_H	arch/sh/include/asm/ptrace.h	/^#define __ASM_SH_PTRACE_H$/;"	d
__ASM_SH_SECTIONS_H	arch/sh/include/asm/sections.h	/^#define __ASM_SH_SECTIONS_H$/;"	d
__ASM_SH_STRING_H	arch/sh/include/asm/string.h	/^#define __ASM_SH_STRING_H$/;"	d
__ASM_SH_SYSTEM_H	arch/sh/include/asm/system.h	/^#define __ASM_SH_SYSTEM_H$/;"	d
__ASM_SH_TYPES_H	arch/sh/include/asm/types.h	/^#define __ASM_SH_TYPES_H$/;"	d
__ASM_SH_UNALIGNED_SH4A_H	arch/sh/include/asm/unaligned-sh4a.h	/^#define __ASM_SH_UNALIGNED_SH4A_H$/;"	d
__ASM_SH_U_BOOT_H_	arch/sh/include/asm/u-boot.h	/^#define __ASM_SH_U_BOOT_H_$/;"	d
__ASM_SPARC_PROCESSOR_H	arch/sparc/include/asm/processor.h	/^#define __ASM_SPARC_PROCESSOR_H$/;"	d
__ASM_SPARC_SECTIONS_H	arch/sparc/include/asm/sections.h	/^#define __ASM_SPARC_SECTIONS_H$/;"	d
__ASM_SPIN_TABLE_H__	arch/arm/include/asm/spin_table.h	/^#define __ASM_SPIN_TABLE_H__$/;"	d
__ASM_SPI_H__	arch/sandbox/include/asm/spi.h	/^#define __ASM_SPI_H__$/;"	d
__ASM_STATUS_LED_H__	arch/powerpc/include/asm/status_led.h	/^#define __ASM_STATUS_LED_H__$/;"	d
__ASM_STUB_PROCESSOR_H__	common/env_embedded.c	/^#define	__ASM_STUB_PROCESSOR_H__	/;"	d	file:
__ASM_STUB_PROCESSOR_H__	tools/envcrc.c	/^#define	__ASM_STUB_PROCESSOR_H__	/;"	d	file:
__ASM_TEST_H	arch/sandbox/include/asm/test.h	/^#define __ASM_TEST_H$/;"	d
__ASM_UNIFIED_H	arch/arm/include/asm/unified.h	/^#define __ASM_UNIFIED_H$/;"	d
__ASM_U_BOOT_H__	arch/avr32/include/asm/u-boot.h	/^#define __ASM_U_BOOT_H__ /;"	d
__ASM_X86_SECTIONS_H	arch/x86/include/asm/sections.h	/^#define __ASM_X86_SECTIONS_H$/;"	d
__ASM_XTENSA_SECTIONS_H	arch/xtensa/include/asm/sections.h	/^#define __ASM_XTENSA_SECTIONS_H$/;"	d
__ASSEMBLY__	common/env_embedded.c	/^#define	__ASSEMBLY__	/;"	d	file:
__ASSEMBLY__	tools/env/fw_env.h	/^#define __ASSEMBLY__ /;"	d
__ASSEMBLY__	tools/envcrc.c	/^#define	__ASSEMBLY__	/;"	d	file:
__ASTRO_H__	board/astro/mcf5373l/astro.h	/^#define __ASTRO_H__$/;"	d
__AT32AP7000_HARDWARE_H__	arch/avr32/include/asm/arch-at32ap700x/hardware.h	/^#define __AT32AP7000_HARDWARE_H__$/;"	d
__AT91RM9200EK_CONFIG_H__	include/configs/at91rm9200ek.h	/^#define __AT91RM9200EK_CONFIG_H__$/;"	d
__AT91RM9200_H__	arch/arm/mach-at91/include/mach/at91rm9200.h	/^#define __AT91RM9200_H__$/;"	d
__AT91SAM9N12_CONFIG_H_	include/configs/at91sam9n12ek.h	/^#define __AT91SAM9N12_CONFIG_H_$/;"	d
__AT91SAM9X5_H__	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define __AT91SAM9X5_H__$/;"	d
__AT91SAM9X5_MATRIX_H__	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^#define __AT91SAM9X5_MATRIX_H__$/;"	d
__AT91_PMC_H__	drivers/clk/at91/pmc.h	/^#define __AT91_PMC_H__$/;"	d
__AT91_SAMA5_COMMON_H	include/configs/at91-sama5_common.h	/^#define __AT91_SAMA5_COMMON_H$/;"	d
__ATA_H__	arch/m68k/include/asm/coldfire/ata.h	/^#define __ATA_H__$/;"	d
__ATA_H__	arch/m68k/include/asm/coldfire/pwm.h	/^#define __ATA_H__$/;"	d
__ATF_H__	include/cavium/atf.h	/^#define __ATF_H__$/;"	d
__ATF_PART_H__	include/cavium/atf_part.h	/^#define __ATF_PART_H__$/;"	d
__ATI_RADEON_FB_H	drivers/video/ati_radeon_fb.h	/^#define __ATI_RADEON_FB_H$/;"	d
__ATMEL_HLCDC_H__	include/atmel_hlcdc.h	/^#define __ATMEL_HLCDC_H__$/;"	d
__ATMEL_LCDC_H__	include/atmel_lcdc.h	/^#define __ATMEL_LCDC_H__$/;"	d
__ATMEL_MCI_H__	include/atmel_mci.h	/^#define __ATMEL_MCI_H__$/;"	d
__ATMEL_MPDDRC_H__	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^#define __ATMEL_MPDDRC_H__$/;"	d
__ATMEL_PIO4_H	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^#define __ATMEL_PIO4_H$/;"	d
__ATMEL_SDHCI_H	arch/arm/mach-at91/include/mach/atmel_sdhci.h	/^#define __ATMEL_SDHCI_H$/;"	d
__ATMEL_USBA_UDC_H__	arch/arm/mach-at91/include/mach/atmel_usba_udc.h	/^#define __ATMEL_USBA_UDC_H__$/;"	d
__AUTOBOOT_H	include/autoboot.h	/^#define __AUTOBOOT_H$/;"	d
__AVR32_CACHE_H__	arch/avr32/include/asm/cache.h	/^#define __AVR32_CACHE_H__$/;"	d
__AVR32_PORTMUX_PIO_H__	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define __AVR32_PORTMUX_PIO_H__$/;"	d
__AXP_MC_STATIC_H	drivers/ddr/marvell/axp/ddr3_axp_mc_static.h	/^#define __AXP_MC_STATIC_H$/;"	d
__AXP_TRAINING_STATIC_H	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^#define __AXP_TRAINING_STATIC_H$/;"	d
__AXP_VARS_H	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^#define __AXP_VARS_H$/;"	d
__B4860QDS_QIXIS_H__	board/freescale/b4860qds/b4860qds_qixis.h	/^#define __B4860QDS_QIXIS_H__$/;"	d
__BARRIERS_H__	arch/arm/include/asm/barriers.h	/^#define __BARRIERS_H__$/;"	d
__BCM23550_W1D_H	include/configs/bcm23550_w1d.h	/^#define __BCM23550_W1D_H$/;"	d
__BCM28155_AP_H	include/configs/bcm28155_ap.h	/^#define __BCM28155_AP_H$/;"	d
__BCM_EP_BOARD_H	include/configs/bcm_ep_board.h	/^#define __BCM_EP_BOARD_H$/;"	d
__BCM_UDC_OTG_H	drivers/usb/gadget/bcm_udc_otg.h	/^#define __BCM_UDC_OTG_H$/;"	d
__BCSR_H_	board/freescale/mpc8568mds/bcsr.h	/^#define __BCSR_H_$/;"	d
__BCSR_H_	board/freescale/mpc8569mds/bcsr.h	/^#define __BCSR_H_$/;"	d
__BF52X_MEM_MAP_H__	arch/blackfin/include/asm/mach-bf527/mem_map.h	/^#define __BF52X_MEM_MAP_H__$/;"	d
__BF54X_MEM_MAP_H__	arch/blackfin/include/asm/mach-bf548/mem_map.h	/^#define __BF54X_MEM_MAP_H__$/;"	d
__BFIN_CDEF_ADSP_BF504_proc__	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define __BFIN_CDEF_ADSP_BF504_proc__$/;"	d
__BFIN_CDEF_ADSP_BF506_proc__	arch/blackfin/include/asm/mach-bf506/BF506_cdef.h	/^#define __BFIN_CDEF_ADSP_BF506_proc__$/;"	d
__BFIN_CDEF_ADSP_BF512_proc__	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define __BFIN_CDEF_ADSP_BF512_proc__$/;"	d
__BFIN_CDEF_ADSP_BF514_proc__	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define __BFIN_CDEF_ADSP_BF514_proc__$/;"	d
__BFIN_CDEF_ADSP_BF516_proc__	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define __BFIN_CDEF_ADSP_BF516_proc__$/;"	d
__BFIN_CDEF_ADSP_BF518_proc__	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define __BFIN_CDEF_ADSP_BF518_proc__$/;"	d
__BFIN_CDEF_ADSP_BF522_proc__	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define __BFIN_CDEF_ADSP_BF522_proc__$/;"	d
__BFIN_CDEF_ADSP_BF524_proc__	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define __BFIN_CDEF_ADSP_BF524_proc__$/;"	d
__BFIN_CDEF_ADSP_BF526_proc__	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define __BFIN_CDEF_ADSP_BF526_proc__$/;"	d
__BFIN_CDEF_ADSP_BF531_proc__	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define __BFIN_CDEF_ADSP_BF531_proc__$/;"	d
__BFIN_CDEF_ADSP_BF534_proc__	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define __BFIN_CDEF_ADSP_BF534_proc__$/;"	d
__BFIN_CDEF_ADSP_BF536_proc__	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define __BFIN_CDEF_ADSP_BF536_proc__$/;"	d
__BFIN_CDEF_ADSP_BF538_proc__	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define __BFIN_CDEF_ADSP_BF538_proc__$/;"	d
__BFIN_CDEF_ADSP_BF542_proc__	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define __BFIN_CDEF_ADSP_BF542_proc__$/;"	d
__BFIN_CDEF_ADSP_BF544_proc__	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define __BFIN_CDEF_ADSP_BF544_proc__$/;"	d
__BFIN_CDEF_ADSP_BF547_proc__	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define __BFIN_CDEF_ADSP_BF547_proc__$/;"	d
__BFIN_CDEF_ADSP_BF548_proc__	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define __BFIN_CDEF_ADSP_BF548_proc__$/;"	d
__BFIN_CDEF_ADSP_BF549_proc__	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define __BFIN_CDEF_ADSP_BF549_proc__$/;"	d
__BFIN_CDEF_ADSP_BF561_proc__	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define __BFIN_CDEF_ADSP_BF561_proc__$/;"	d
__BFIN_CDEF_ADSP_BF609_proc__	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define __BFIN_CDEF_ADSP_BF609_proc__$/;"	d
__BFIN_CDEF_ADSP_EDN_BF542_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define __BFIN_CDEF_ADSP_EDN_BF542_extended__$/;"	d
__BFIN_CDEF_ADSP_EDN_BF544_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define __BFIN_CDEF_ADSP_EDN_BF544_extended__$/;"	d
__BFIN_CDEF_ADSP_EDN_BF547_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define __BFIN_CDEF_ADSP_EDN_BF547_extended__$/;"	d
__BFIN_CDEF_ADSP_EDN_BF548_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define __BFIN_CDEF_ADSP_EDN_BF548_extended__$/;"	d
__BFIN_CDEF_ADSP_EDN_BF549_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define __BFIN_CDEF_ADSP_EDN_BF549_extended__$/;"	d
__BFIN_CDEF_ADSP_EDN_core__	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define __BFIN_CDEF_ADSP_EDN_core__$/;"	d
__BFIN_CPU_SERIAL1_H__	arch/blackfin/include/asm/serial1.h	/^#define __BFIN_CPU_SERIAL1_H__$/;"	d
__BFIN_CPU_SERIAL4_H__	arch/blackfin/include/asm/serial4.h	/^#define __BFIN_CPU_SERIAL4_H__$/;"	d
__BFIN_CPU_SERIAL_H__	arch/blackfin/include/asm/serial.h	/^#define __BFIN_CPU_SERIAL_H__$/;"	d
__BFIN_DEF_ADSP_BF504_proc__	arch/blackfin/include/asm/mach-bf506/BF504_def.h	/^#define __BFIN_DEF_ADSP_BF504_proc__$/;"	d
__BFIN_DEF_ADSP_BF506_proc__	arch/blackfin/include/asm/mach-bf506/BF506_def.h	/^#define __BFIN_DEF_ADSP_BF506_proc__$/;"	d
__BFIN_DEF_ADSP_BF512_proc__	arch/blackfin/include/asm/mach-bf518/BF512_def.h	/^#define __BFIN_DEF_ADSP_BF512_proc__$/;"	d
__BFIN_DEF_ADSP_BF514_proc__	arch/blackfin/include/asm/mach-bf518/BF514_def.h	/^#define __BFIN_DEF_ADSP_BF514_proc__$/;"	d
__BFIN_DEF_ADSP_BF516_proc__	arch/blackfin/include/asm/mach-bf518/BF516_def.h	/^#define __BFIN_DEF_ADSP_BF516_proc__$/;"	d
__BFIN_DEF_ADSP_BF518_proc__	arch/blackfin/include/asm/mach-bf518/BF518_def.h	/^#define __BFIN_DEF_ADSP_BF518_proc__$/;"	d
__BFIN_DEF_ADSP_BF522_proc__	arch/blackfin/include/asm/mach-bf527/BF522_def.h	/^#define __BFIN_DEF_ADSP_BF522_proc__$/;"	d
__BFIN_DEF_ADSP_BF524_proc__	arch/blackfin/include/asm/mach-bf527/BF524_def.h	/^#define __BFIN_DEF_ADSP_BF524_proc__$/;"	d
__BFIN_DEF_ADSP_BF526_proc__	arch/blackfin/include/asm/mach-bf527/BF526_def.h	/^#define __BFIN_DEF_ADSP_BF526_proc__$/;"	d
__BFIN_DEF_ADSP_BF531_proc__	arch/blackfin/include/asm/mach-bf533/BF531_def.h	/^#define __BFIN_DEF_ADSP_BF531_proc__$/;"	d
__BFIN_DEF_ADSP_BF532_proc__	arch/blackfin/include/asm/mach-bf533/BF532_def.h	/^#define __BFIN_DEF_ADSP_BF532_proc__$/;"	d
__BFIN_DEF_ADSP_BF533_proc__	arch/blackfin/include/asm/mach-bf533/BF533_def.h	/^#define __BFIN_DEF_ADSP_BF533_proc__$/;"	d
__BFIN_DEF_ADSP_BF534_proc__	arch/blackfin/include/asm/mach-bf537/BF534_def.h	/^#define __BFIN_DEF_ADSP_BF534_proc__$/;"	d
__BFIN_DEF_ADSP_BF536_proc__	arch/blackfin/include/asm/mach-bf537/BF536_def.h	/^#define __BFIN_DEF_ADSP_BF536_proc__$/;"	d
__BFIN_DEF_ADSP_BF538_proc__	arch/blackfin/include/asm/mach-bf538/BF538_def.h	/^#define __BFIN_DEF_ADSP_BF538_proc__$/;"	d
__BFIN_DEF_ADSP_BF542_proc__	arch/blackfin/include/asm/mach-bf548/BF542_def.h	/^#define __BFIN_DEF_ADSP_BF542_proc__$/;"	d
__BFIN_DEF_ADSP_BF544_proc__	arch/blackfin/include/asm/mach-bf548/BF544_def.h	/^#define __BFIN_DEF_ADSP_BF544_proc__$/;"	d
__BFIN_DEF_ADSP_BF547_proc__	arch/blackfin/include/asm/mach-bf548/BF547_def.h	/^#define __BFIN_DEF_ADSP_BF547_proc__$/;"	d
__BFIN_DEF_ADSP_BF548_proc__	arch/blackfin/include/asm/mach-bf548/BF548_def.h	/^#define __BFIN_DEF_ADSP_BF548_proc__$/;"	d
__BFIN_DEF_ADSP_BF549_proc__	arch/blackfin/include/asm/mach-bf548/BF549_def.h	/^#define __BFIN_DEF_ADSP_BF549_proc__$/;"	d
__BFIN_DEF_ADSP_BF561_proc__	arch/blackfin/include/asm/mach-bf561/BF561_def.h	/^#define __BFIN_DEF_ADSP_BF561_proc__$/;"	d
__BFIN_DEF_ADSP_BF609_proc__	arch/blackfin/include/asm/mach-bf609/BF609_def.h	/^#define __BFIN_DEF_ADSP_BF609_proc__$/;"	d
__BFIN_DEF_ADSP_EDN_BF542_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h	/^#define __BFIN_DEF_ADSP_EDN_BF542_extended__$/;"	d
__BFIN_DEF_ADSP_EDN_BF544_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h	/^#define __BFIN_DEF_ADSP_EDN_BF544_extended__$/;"	d
__BFIN_DEF_ADSP_EDN_BF547_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h	/^#define __BFIN_DEF_ADSP_EDN_BF547_extended__$/;"	d
__BFIN_DEF_ADSP_EDN_BF548_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h	/^#define __BFIN_DEF_ADSP_EDN_BF548_extended__$/;"	d
__BFIN_DEF_ADSP_EDN_BF549_extended__	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h	/^#define __BFIN_DEF_ADSP_EDN_BF549_extended__$/;"	d
__BFIN_DEF_ADSP_EDN_core__	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h	/^#define __BFIN_DEF_ADSP_EDN_core__$/;"	d
__BFIN_INITCODE_H__	arch/blackfin/cpu/initcode.h	/^#define __BFIN_INITCODE_H__$/;"	d
__BFIN_MAC_H__	drivers/net/bfin_mac.h	/^#define __BFIN_MAC_H__$/;"	d
__BFIN_MEM_MAP_H__	arch/blackfin/include/asm/mem_map.h	/^#define __BFIN_MEM_MAP_H__$/;"	d
__BFIN_PERIPHERAL_BOOTROM__	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^#define __BFIN_PERIPHERAL_BOOTROM__$/;"	d
__BFIN_PERIPHERAL_CGU__	arch/blackfin/include/asm/mach-common/bits/cgu.h	/^#define __BFIN_PERIPHERAL_CGU__$/;"	d
__BFIN_PERIPHERAL_CORE__	arch/blackfin/include/asm/mach-common/bits/core.h	/^#define __BFIN_PERIPHERAL_CORE__$/;"	d
__BFIN_PERIPHERAL_DDE__	arch/blackfin/include/asm/mach-common/bits/dde.h	/^#define __BFIN_PERIPHERAL_DDE__$/;"	d
__BFIN_PERIPHERAL_DMA__	arch/blackfin/include/asm/mach-common/bits/dma.h	/^#define __BFIN_PERIPHERAL_DMA__$/;"	d
__BFIN_PERIPHERAL_EBIU__	arch/blackfin/include/asm/mach-common/bits/ebiu.h	/^#define __BFIN_PERIPHERAL_EBIU__$/;"	d
__BFIN_PERIPHERAL_EMAC__	arch/blackfin/include/asm/mach-common/bits/emac.h	/^#define __BFIN_PERIPHERAL_EMAC__$/;"	d
__BFIN_PERIPHERAL_EPPI__	arch/blackfin/include/asm/mach-common/bits/eppi.h	/^#define __BFIN_PERIPHERAL_EPPI__$/;"	d
__BFIN_PERIPHERAL_MPU__	arch/blackfin/include/asm/mach-common/bits/mpu.h	/^#define __BFIN_PERIPHERAL_MPU__$/;"	d
__BFIN_PERIPHERAL_OTP__	arch/blackfin/include/asm/mach-common/bits/otp.h	/^#define __BFIN_PERIPHERAL_OTP__$/;"	d
__BFIN_PERIPHERAL_PATA__	arch/blackfin/include/asm/mach-common/bits/pata.h	/^#define __BFIN_PERIPHERAL_PATA__$/;"	d
__BFIN_PERIPHERAL_PLL__	arch/blackfin/include/asm/mach-common/bits/pll.h	/^#define __BFIN_PERIPHERAL_PLL__$/;"	d
__BFIN_PERIPHERAL_PORT_A__	arch/blackfin/include/asm/mach-common/bits/ports-a.h	/^#define __BFIN_PERIPHERAL_PORT_A__$/;"	d
__BFIN_PERIPHERAL_PORT_B__	arch/blackfin/include/asm/mach-common/bits/ports-b.h	/^#define __BFIN_PERIPHERAL_PORT_B__$/;"	d
__BFIN_PERIPHERAL_PORT_C__	arch/blackfin/include/asm/mach-common/bits/ports-c.h	/^#define __BFIN_PERIPHERAL_PORT_C__$/;"	d
__BFIN_PERIPHERAL_PORT_D__	arch/blackfin/include/asm/mach-common/bits/ports-d.h	/^#define __BFIN_PERIPHERAL_PORT_D__$/;"	d
__BFIN_PERIPHERAL_PORT_E__	arch/blackfin/include/asm/mach-common/bits/ports-e.h	/^#define __BFIN_PERIPHERAL_PORT_E__$/;"	d
__BFIN_PERIPHERAL_PORT_F__	arch/blackfin/include/asm/mach-common/bits/ports-f.h	/^#define __BFIN_PERIPHERAL_PORT_F__$/;"	d
__BFIN_PERIPHERAL_PORT_G__	arch/blackfin/include/asm/mach-common/bits/ports-g.h	/^#define __BFIN_PERIPHERAL_PORT_G__$/;"	d
__BFIN_PERIPHERAL_PORT_H__	arch/blackfin/include/asm/mach-common/bits/ports-h.h	/^#define __BFIN_PERIPHERAL_PORT_H__$/;"	d
__BFIN_PERIPHERAL_PORT_I__	arch/blackfin/include/asm/mach-common/bits/ports-i.h	/^#define __BFIN_PERIPHERAL_PORT_I__$/;"	d
__BFIN_PERIPHERAL_PORT_J__	arch/blackfin/include/asm/mach-common/bits/ports-j.h	/^#define __BFIN_PERIPHERAL_PORT_J__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf506/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf518/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf527/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf533/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf537/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf538/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf548/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf561/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PORT__	arch/blackfin/include/asm/mach-bf609/ports.h	/^#define __BFIN_PERIPHERAL_PORT__$/;"	d
__BFIN_PERIPHERAL_PPI__	arch/blackfin/include/asm/mach-common/bits/ppi.h	/^#define __BFIN_PERIPHERAL_PPI__$/;"	d
__BFIN_PERIPHERAL_RTC__	arch/blackfin/include/asm/mach-common/bits/rtc.h	/^#define __BFIN_PERIPHERAL_RTC__$/;"	d
__BFIN_PERIPHERAL_SDH__	arch/blackfin/include/asm/mach-common/bits/sdh.h	/^#define __BFIN_PERIPHERAL_SDH__$/;"	d
__BFIN_PERIPHERAL_SPI__	arch/blackfin/include/asm/mach-common/bits/spi.h	/^#define __BFIN_PERIPHERAL_SPI__$/;"	d
__BFIN_PERIPHERAL_TIMER__	arch/blackfin/include/asm/mach-common/bits/timer.h	/^#define __BFIN_PERIPHERAL_TIMER__$/;"	d
__BFIN_PERIPHERAL_TRACE__	arch/blackfin/include/asm/mach-common/bits/trace.h	/^#define __BFIN_PERIPHERAL_TRACE__$/;"	d
__BFIN_PERIPHERAL_TWI__	arch/blackfin/include/asm/mach-common/bits/twi.h	/^#define __BFIN_PERIPHERAL_TWI__$/;"	d
__BFIN_PERIPHERAL_UART4__	arch/blackfin/include/asm/mach-common/bits/uart4.h	/^#define __BFIN_PERIPHERAL_UART4__$/;"	d
__BFIN_PERIPHERAL_UART__	arch/blackfin/include/asm/mach-common/bits/uart.h	/^#define __BFIN_PERIPHERAL_UART__$/;"	d
__BFIN_PERIPHERAL_USB__	arch/blackfin/include/asm/mach-common/bits/usb.h	/^#define __BFIN_PERIPHERAL_USB__$/;"	d
__BFIN_PERIPHERAL_WATCHDOG__	arch/blackfin/include/asm/mach-common/bits/watchdog.h	/^#define __BFIN_PERIPHERAL_WATCHDOG__$/;"	d
__BIG_ENDIAN	include/linux/byteorder/big_endian.h	/^#define __BIG_ENDIAN /;"	d
__BIG_ENDIAN_BITFIELD	include/linux/byteorder/big_endian.h	/^#define __BIG_ENDIAN_BITFIELD$/;"	d
__BIOSEMUI_H	drivers/bios_emulator/biosemui.h	/^#define __BIOSEMUI_H$/;"	d
__BIOSEMU_H	drivers/bios_emulator/include/biosemu.h	/^#define __BIOSEMU_H$/;"	d
__BITFIELD_H	arch/arm/include/asm/arch-pxa/bitfield.h	/^#define __BITFIELD_H$/;"	d
__BITFIELD_H	arch/arm/include/asm/arch-sa1100/bitfield.h	/^#define __BITFIELD_H$/;"	d
__BITS4	arch/m68k/lib/muldi3.c	/^#define __BITS4 /;"	d	file:
__BITS4	arch/nios2/lib/longlong.h	/^#define __BITS4 /;"	d
__BIT_TYPES_DEFINED__	include/linux/types.h	/^#define __BIT_TYPES_DEFINED__$/;"	d
__BLACKFIN_ENTRY_H	arch/blackfin/include/asm/entry.h	/^#define __BLACKFIN_ENTRY_H$/;"	d
__BLACKFIN_LOCAL_H__	arch/blackfin/include/asm/blackfin_local.h	/^#define __BLACKFIN_LOCAL_H__$/;"	d
__BLACKFIN_USB_H__	drivers/usb/musb/blackfin_usb.h	/^#define __BLACKFIN_USB_H__$/;"	d
__BLANCHE_H	include/configs/blanche.h	/^#define __BLANCHE_H$/;"	d
__BMP_LOGO_DATA_H__	include/bmp_logo_data.h	/^#define __BMP_LOGO_DATA_H__$/;"	d
__BMP_LOGO_H__	board/bluewater/gurnard/splash_logo.h	/^#define __BMP_LOGO_H__$/;"	d
__BMP_LOGO_H__	include/bmp_logo.h	/^#define __BMP_LOGO_H__$/;"	d
__BOARD_BOSTON_LCD_H__	board/imgtec/boston/boston-lcd.h	/^#define __BOARD_BOSTON_LCD_H__$/;"	d
__BOARD_BOSTON_REGS_H__	board/imgtec/boston/boston-regs.h	/^#define __BOARD_BOSTON_REGS_H__$/;"	d
__BOARD_DETECT_H	board/ti/common/board_detect.h	/^#define __BOARD_DETECT_H$/;"	d
__BOARD_ENV_SPEC	arch/arm/mach-mvebu/serdes/axp/board_env_spec.h	/^#define __BOARD_ENV_SPEC$/;"	d
__BOARD_KOSAGI_NOVENA_NOVENA_H__	board/kosagi/novena/novena.h	/^#define __BOARD_KOSAGI_NOVENA_NOVENA_H__$/;"	d
__BOARD_MALTA_SUPERIO_H__	board/imgtec/malta/superio.h	/^#define __BOARD_MALTA_SUPERIO_H__$/;"	d
__BOARD_MPC837XEMDS_PCI_H	board/freescale/mpc837xemds/pci.h	/^#define __BOARD_MPC837XEMDS_PCI_H$/;"	d
__BOARD_MX35_3STACK_H	board/freescale/mx35pdk/mx35pdk.h	/^#define __BOARD_MX35_3STACK_H$/;"	d
__BOARD_SOFT_SWITCH_H__	board/bf609-ezkit/soft_switch.h	/^#define __BOARD_SOFT_SWITCH_H__$/;"	d
__BOOT0_H	arch/arm/include/asm/arch-bcm235xx/boot0.h	/^#define __BOOT0_H$/;"	d
__BOOT0_H	arch/arm/include/asm/arch-bcm281xx/boot0.h	/^#define __BOOT0_H$/;"	d
__BOOT0_H	arch/arm/include/asm/arch-sunxi/boot0.h	/^#define __BOOT0_H$/;"	d
__BOOT0_H	arch/arm/include/asm/arch/boot0.h	/^#define __BOOT0_H$/;"	d
__BOOTP_H__	net/bootp.h	/^#define __BOOTP_H__$/;"	d
__BOOTRETRY_H	include/bootretry.h	/^#define __BOOTRETRY_H$/;"	d
__BUILDIO	arch/mips/include/asm/io.h	/^#define __BUILDIO(/;"	d
__BUILD_CLRBITS	arch/mips/include/asm/io.h	/^#define __BUILD_CLRBITS(/;"	d
__BUILD_CLRSETBITS	arch/mips/include/asm/io.h	/^#define __BUILD_CLRSETBITS(/;"	d
__BUILD_IOPORT_PFX	arch/mips/include/asm/io.h	/^#define __BUILD_IOPORT_PFX(/;"	d
__BUILD_IOPORT_SINGLE	arch/mips/include/asm/io.h	/^#define __BUILD_IOPORT_SINGLE(/;"	d
__BUILD_IOPORT_STRING	arch/mips/include/asm/io.h	/^#define __BUILD_IOPORT_STRING(/;"	d
__BUILD_MEMORY_PFX	arch/mips/include/asm/io.h	/^#define __BUILD_MEMORY_PFX(/;"	d
__BUILD_MEMORY_SINGLE	arch/mips/include/asm/io.h	/^#define __BUILD_MEMORY_SINGLE(/;"	d
__BUILD_MEMORY_STRING	arch/mips/include/asm/io.h	/^#define __BUILD_MEMORY_STRING(/;"	d
__BUILD_SETBITS	arch/mips/include/asm/io.h	/^#define __BUILD_SETBITS(/;"	d
__BUILD_SET_C0	arch/mips/include/asm/mipsregs.h	/^#define __BUILD_SET_C0(/;"	d
__BUILD_SET_C0	arch/mips/include/asm/mipsregs.h	/^__BUILD_SET_C0(cause)$/;"	f	typeref:typename:status
__BUR_AM335X_COMMON_H__	include/configs/bur_am335x_common.h	/^#define __BUR_AM335X_COMMON_H__$/;"	d
__BUR_CFG_COMMON_H__	include/configs/bur_cfg_common.h	/^#define __BUR_CFG_COMMON_H__$/;"	d
__BUS_VCXK_H_	include/bus_vcxk.h	/^#define __BUS_VCXK_H_$/;"	d
__BYTEORDER_HAS_U64__	arch/arc/include/asm/byteorder.h	/^	#define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/arm/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/avr32/include/asm/byteorder.h	/^# define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/blackfin/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/m68k/include/asm/byteorder.h	/^#define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/microblaze/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/mips/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/nds32/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/nios2/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/powerpc/include/asm/byteorder.h	/^#define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/sandbox/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/sparc/include/asm/byteorder.h	/^#define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/x86/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTEORDER_HAS_U64__	arch/xtensa/include/asm/byteorder.h	/^#  define __BYTEORDER_HAS_U64__$/;"	d
__BYTE_ORDER	fs/reiserfs/reiserfs_private.h	/^#define __BYTE_ORDER /;"	d
__BYTE_ORDER	include/linux/byteorder/big_endian.h	/^#define __BYTE_ORDER	/;"	d
__BYTE_ORDER	include/linux/byteorder/little_endian.h	/^#define	__BYTE_ORDER	/;"	d
__CACHE_H	arch/m68k/include/asm/cache.h	/^#define __CACHE_H$/;"	d
__CACHE_UNIPHIER_H	arch/arm/mach-uniphier/arm32/cache-uniphier.h	/^#define __CACHE_UNIPHIER_H$/;"	d
__CADDY_H__	board/esd/vme8349/caddy.h	/^#define __CADDY_H__$/;"	d
__CADENCE_QSPI_H__	drivers/spi/cadence_qspi.h	/^#define __CADENCE_QSPI_H__$/;"	d
__CADMUS_H_	board/freescale/common/cadmus.h	/^#define __CADMUS_H_$/;"	d
__CAT	arch/mips/include/asm/asm.h	/^#define __CAT(/;"	d
__CBFS_H	include/cbfs.h	/^#define __CBFS_H$/;"	d
__CDP_H__	net/cdp.h	/^#define __CDP_H__$/;"	d
__CFI_FLASH_H__	include/mtd/cfi_flash.h	/^#define __CFI_FLASH_H__$/;"	d
__CIRCBUF_H__	include/circbuf.h	/^#define __CIRCBUF_H__$/;"	d
__CI_UDC_H__	include/usb/ci_udc.h	/^#define __CI_UDC_H__$/;"	d
__CLI_H	include/cli.h	/^#define __CLI_H$/;"	d
__CLK_MICROCHIP_PIC32	arch/arm/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	arch/microblaze/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	arch/mips/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	arch/nios2/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	arch/sandbox/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	arch/x86/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	arch/xtensa/dts/include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_MICROCHIP_PIC32	include/dt-bindings/clock/microchip,clock.h	/^#define __CLK_MICROCHIP_PIC32$/;"	d
__CLK_SYNTHESIZER_H	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^#define __CLK_SYNTHESIZER_H$/;"	d
__CLK_UNIPHIER_H__	drivers/clk/uniphier/clk-uniphier.h	/^#define __CLK_UNIPHIER_H__$/;"	d
__CLOCK_H__	arch/arm/include/asm/arch-mxs/clock.h	/^#define __CLOCK_H__$/;"	d
__CLOCK_H__	arch/blackfin/include/asm/clock.h	/^#define __CLOCK_H__$/;"	d
__COLIBRI_IMX7_CONFIG_H	include/configs/colibri_imx7.h	/^#define __COLIBRI_IMX7_CONFIG_H$/;"	d
__COMMAND_H	include/command.h	/^#define __COMMAND_H$/;"	d
__COMMON_H_	include/common.h	/^#define __COMMON_H_	/;"	d
__COMPILER_H__	include/compiler.h	/^#define __COMPILER_H__$/;"	d
__CONFIGS_APX4DEVKIT_H__	include/configs/apx4devkit.h	/^#define __CONFIGS_APX4DEVKIT_H__$/;"	d
__CONFIGS_BG0900_H__	include/configs/bg0900.h	/^#define __CONFIGS_BG0900_H__$/;"	d
__CONFIGS_BOSTON_H__	include/configs/boston.h	/^#define __CONFIGS_BOSTON_H__$/;"	d
__CONFIGS_DRAGONBOARD410C_H	include/configs/dragonboard410c.h	/^#define __CONFIGS_DRAGONBOARD410C_H$/;"	d
__CONFIGS_M28EVK_H__	include/configs/m28evk.h	/^#define __CONFIGS_M28EVK_H__$/;"	d
__CONFIGS_MX23EVK_H__	include/configs/mx23evk.h	/^#define __CONFIGS_MX23EVK_H__$/;"	d
__CONFIGS_MX23_OLINUXINO_H__	include/configs/mx23_olinuxino.h	/^#define __CONFIGS_MX23_OLINUXINO_H__$/;"	d
__CONFIGS_MX28EVK_H__	include/configs/mx28evk.h	/^#define __CONFIGS_MX28EVK_H__$/;"	d
__CONFIGS_MXS_H__	include/configs/mxs.h	/^#define __CONFIGS_MXS_H__$/;"	d
__CONFIGS_SANSA_FUZE_PLUS_H__	include/configs/sansa_fuze_plus.h	/^#define __CONFIGS_SANSA_FUZE_PLUS_H__$/;"	d
__CONFIGS_SC_SPS_1_H__	include/configs/sc_sps_1.h	/^#define __CONFIGS_SC_SPS_1_H__$/;"	d
__CONFIGS_XFI3_H__	include/configs/xfi3.h	/^#define __CONFIGS_XFI3_H__$/;"	d
__CONFIG_5250_H	include/configs/exynos5250-common.h	/^#define __CONFIG_5250_H$/;"	d
__CONFIG_AM335X_EVM_H	include/configs/am335x_evm.h	/^#define __CONFIG_AM335X_EVM_H$/;"	d
__CONFIG_AM335X_EVM_H	include/configs/am335x_sl50.h	/^#define __CONFIG_AM335X_EVM_H$/;"	d
__CONFIG_AM335X_SHC_H	include/configs/am335x_shc.h	/^#define __CONFIG_AM335X_SHC_H$/;"	d
__CONFIG_AM43XX_EVM_H	include/configs/am43xx_evm.h	/^#define __CONFIG_AM43XX_EVM_H$/;"	d
__CONFIG_AM57XX_EVM_H	include/configs/am57xx_evm.h	/^#define __CONFIG_AM57XX_EVM_H$/;"	d
__CONFIG_ARNDALE_H	include/configs/arndale.h	/^#define __CONFIG_ARNDALE_H$/;"	d
__CONFIG_ASPENITE_H	include/configs/aspenite.h	/^#define __CONFIG_ASPENITE_H$/;"	d
__CONFIG_BALTOS_H	include/configs/baltos.h	/^#define __CONFIG_BALTOS_H$/;"	d
__CONFIG_BAV335X_H	include/configs/bav335x.h	/^#define __CONFIG_BAV335X_H$/;"	d
__CONFIG_BCT_BRETTL2_H__	include/configs/bct-brettl2.h	/^#define __CONFIG_BCT_BRETTL2_H__$/;"	d
__CONFIG_BF506F_EZKIT_H__	include/configs/bf506f-ezkit.h	/^#define __CONFIG_BF506F_EZKIT_H__$/;"	d
__CONFIG_BF518F_EZBRD_H__	include/configs/bf518f-ezbrd.h	/^#define __CONFIG_BF518F_EZBRD_H__$/;"	d
__CONFIG_BF525_UCR2_H__	include/configs/bf525-ucr2.h	/^#define __CONFIG_BF525_UCR2_H__$/;"	d
__CONFIG_BF526_EZBRD_H__	include/configs/bf526-ezbrd.h	/^#define __CONFIG_BF526_EZBRD_H__$/;"	d
__CONFIG_BF527_AD7160_EVAL_H__	include/configs/bf527-ad7160-eval.h	/^#define __CONFIG_BF527_AD7160_EVAL_H__$/;"	d
__CONFIG_BF527_EZKIT_H__	include/configs/bf527-ezkit.h	/^#define __CONFIG_BF527_EZKIT_H__$/;"	d
__CONFIG_BF527_SDP_H__	include/configs/bf527-sdp.h	/^#define __CONFIG_BF527_SDP_H__$/;"	d
__CONFIG_BF533_EZKIT_H__	include/configs/bf533-ezkit.h	/^#define __CONFIG_BF533_EZKIT_H__$/;"	d
__CONFIG_BF533_STAMP_H__	include/configs/bf533-stamp.h	/^#define __CONFIG_BF533_STAMP_H__$/;"	d
__CONFIG_BF537_MINOTAUR_H__	include/configs/bf537-minotaur.h	/^#define __CONFIG_BF537_MINOTAUR_H__$/;"	d
__CONFIG_BF537_PNAV_H__	include/configs/bf537-pnav.h	/^#define __CONFIG_BF537_PNAV_H__$/;"	d
__CONFIG_BF537_SRV1_H__	include/configs/bf537-srv1.h	/^#define __CONFIG_BF537_SRV1_H__$/;"	d
__CONFIG_BF537_STAMP_H__	include/configs/bf537-stamp.h	/^#define __CONFIG_BF537_STAMP_H__$/;"	d
__CONFIG_BF538F_EZKIT_H__	include/configs/bf538f-ezkit.h	/^#define __CONFIG_BF538F_EZKIT_H__$/;"	d
__CONFIG_BF548_EZKIT_H__	include/configs/bf548-ezkit.h	/^#define __CONFIG_BF548_EZKIT_H__$/;"	d
__CONFIG_BF561_ACVILON_H__	include/configs/bf561-acvilon.h	/^#define __CONFIG_BF561_ACVILON_H__$/;"	d
__CONFIG_BF561_EZKIT_H__	include/configs/bf561-ezkit.h	/^#define __CONFIG_BF561_EZKIT_H__$/;"	d
__CONFIG_BF609_EZKIT_H__	include/configs/bf609-ezkit.h	/^#define __CONFIG_BF609_EZKIT_H__$/;"	d
__CONFIG_BFIN_ADI_COMMON_H__	include/configs/bfin_adi_common.h	/^#define __CONFIG_BFIN_ADI_COMMON_H__$/;"	d
__CONFIG_BLACKSTAMP_H__	include/configs/blackstamp.h	/^#define __CONFIG_BLACKSTAMP_H__$/;"	d
__CONFIG_BLACKVME_H__	include/configs/blackvme.h	/^#define __CONFIG_BLACKVME_H__$/;"	d
__CONFIG_BR4_H__	include/configs/br4.h	/^#define __CONFIG_BR4_H__$/;"	d
__CONFIG_BRPPT1_H__	include/configs/brppt1.h	/^#define __CONFIG_BRPPT1_H__$/;"	d
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__CONFIG_CGTQMX6EVAL_H	include/configs/cgtqmx6eval.h	/^#define __CONFIG_CGTQMX6EVAL_H$/;"	d
__CONFIG_CHARON_H	include/configs/charon.h	/^#define __CONFIG_CHARON_H$/;"	d
__CONFIG_CM_BF527_H__	include/configs/cm-bf527.h	/^#define __CONFIG_CM_BF527_H__$/;"	d
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__CONFIG_CM_BF537E_H__	include/configs/cm-bf537e.h	/^#define __CONFIG_CM_BF537E_H__$/;"	d
__CONFIG_CM_BF537U_H__	include/configs/cm-bf537u.h	/^#define __CONFIG_CM_BF537U_H__$/;"	d
__CONFIG_CM_BF548_H__	include/configs/cm-bf548.h	/^#define __CONFIG_CM_BF548_H__$/;"	d
__CONFIG_CM_BF561_H__	include/configs/cm-bf561.h	/^#define __CONFIG_CM_BF561_H__$/;"	d
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__CONFIG_ESPRESSO7420_H	include/configs/espresso7420.h	/^#define __CONFIG_ESPRESSO7420_H$/;"	d
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__CONFIG_GPLUGD_H	include/configs/gplugd.h	/^#define __CONFIG_GPLUGD_H$/;"	d
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__CONFIG_H	include/configs/at91sam9m10g45ek.h	/^#define __CONFIG_H$/;"	d
__CONFIG_H	include/configs/at91sam9rlek.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H	include/configs/atngw100mkii.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H	include/configs/chromebook_jerry.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H	include/configs/chromebox_panther.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H	include/configs/colibri_pxa270.h	/^#define	__CONFIG_H$/;"	d
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__CONFIG_H	include/configs/openrisc-generic.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H	include/configs/pdm360ng.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H	include/configs/usb_a9263.h	/^#define __CONFIG_H$/;"	d
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__CONFIG_H__	include/configs/at91sam9x5ek.h	/^#define __CONFIG_H__$/;"	d
__CONFIG_H__	include/configs/gr_cpci_ax2000.h	/^#define __CONFIG_H__$/;"	d
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__CONFIG_H__	include/configs/grsim_leon2.h	/^#define __CONFIG_H__$/;"	d
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__CONFIG_KM83XX_H	include/configs/km/km83xx-common.h	/^#define __CONFIG_KM83XX_H$/;"	d
__CONFIG_KS2_EVM_H	include/configs/ti_armv7_keystone2.h	/^#define __CONFIG_KS2_EVM_H$/;"	d
__CONFIG_ODROID_U3_H	include/configs/odroid.h	/^#define __CONFIG_ODROID_U3_H$/;"	d
__CONFIG_ODROID_XU3_H	include/configs/odroid_xu3.h	/^#define __CONFIG_ODROID_XU3_H$/;"	d
__CONFIG_OMAP5_EVM_H	include/configs/omap5_uevm.h	/^#define __CONFIG_OMAP5_EVM_H$/;"	d
__CONFIG_ORIGEN_H	include/configs/origen.h	/^#define __CONFIG_ORIGEN_H$/;"	d
__CONFIG_PANDA_H	include/configs/omap4_panda.h	/^#define __CONFIG_PANDA_H$/;"	d
__CONFIG_PCM051_H	include/configs/pcm051.h	/^#define __CONFIG_PCM051_H$/;"	d
__CONFIG_PEACH_PIT_H	include/configs/peach-pit.h	/^#define __CONFIG_PEACH_PIT_H$/;"	d
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__CONFIG_PENGWYN_H	include/configs/pengwyn.h	/^#define __CONFIG_PENGWYN_H$/;"	d
__CONFIG_PEPPER_H	include/configs/pepper.h	/^#define __CONFIG_PEPPER_H$/;"	d
__CONFIG_PR1_H__	include/configs/pr1.h	/^#define __CONFIG_PR1_H__$/;"	d
__CONFIG_PXA_COMMON_H__	include/configs/pxa-common.h	/^#define	__CONFIG_PXA_COMMON_H__$/;"	d
__CONFIG_PXM2_H	include/configs/pxm2.h	/^#define __CONFIG_PXM2_H$/;"	d
__CONFIG_RASTABAN_H	include/configs/rastaban.h	/^#define __CONFIG_RASTABAN_H$/;"	d
__CONFIG_RK3036_COMMON_H	include/configs/rk3036_common.h	/^#define __CONFIG_RK3036_COMMON_H$/;"	d
__CONFIG_RK3288_COMMON_H	include/configs/rk3288_common.h	/^#define __CONFIG_RK3288_COMMON_H$/;"	d
__CONFIG_RK3399_COMMON_H	include/configs/rk3399_common.h	/^#define __CONFIG_RK3399_COMMON_H$/;"	d
__CONFIG_RUT_H	include/configs/rut.h	/^#define __CONFIG_RUT_H$/;"	d
__CONFIG_SAMTEC_VINING_FPGA_H__	include/configs/socfpga_vining_fpga.h	/^#define __CONFIG_SAMTEC_VINING_FPGA_H__$/;"	d
__CONFIG_SDP4430_H	include/configs/omap4_sdp4430.h	/^#define __CONFIG_SDP4430_H$/;"	d
__CONFIG_SIEMENS_AM33X_COMMON_H	include/configs/siemens-am33x-common.h	/^#define __CONFIG_SIEMENS_AM33X_COMMON_H$/;"	d
__CONFIG_SMDK5420_H	include/configs/smdk5420.h	/^#define __CONFIG_SMDK5420_H$/;"	d
__CONFIG_SMDK_H	include/configs/smdk5250.h	/^#define __CONFIG_SMDK_H$/;"	d
__CONFIG_SNOW_H	include/configs/snow.h	/^#define __CONFIG_SNOW_H$/;"	d
__CONFIG_SOCFPGA_ARRIA5_H__	include/configs/socfpga_arria5_socdk.h	/^#define __CONFIG_SOCFPGA_ARRIA5_H__$/;"	d
__CONFIG_SOCFPGA_COMMON_H__	include/configs/socfpga_common.h	/^#define __CONFIG_SOCFPGA_COMMON_H__$/;"	d
__CONFIG_SOCFPGA_CYCLONE5_H__	include/configs/socfpga_cyclone5_socdk.h	/^#define __CONFIG_SOCFPGA_CYCLONE5_H__$/;"	d
__CONFIG_SOCFPGA_IS1_H__	include/configs/socfpga_is1.h	/^#define __CONFIG_SOCFPGA_IS1_H__$/;"	d
__CONFIG_SOCFPGA_SOCRATES_H__	include/configs/socfpga_socrates.h	/^#define __CONFIG_SOCFPGA_SOCRATES_H__$/;"	d
__CONFIG_SOCFPGA_SR1500_H__	include/configs/socfpga_sr1500.h	/^#define __CONFIG_SOCFPGA_SR1500_H__$/;"	d
__CONFIG_SPRING_H	include/configs/spring.h	/^#define __CONFIG_SPRING_H$/;"	d
__CONFIG_STV0991_H	include/configs/stv0991.h	/^#define __CONFIG_STV0991_H$/;"	d
__CONFIG_TCM_BF518_H__	include/configs/tcm-bf518.h	/^#define __CONFIG_TCM_BF518_H__$/;"	d
__CONFIG_TCM_BF537_H__	include/configs/tcm-bf537.h	/^#define __CONFIG_TCM_BF537_H__$/;"	d
__CONFIG_TERASIC_DE0_H__	include/configs/socfpga_de0_nano_soc.h	/^#define __CONFIG_TERASIC_DE0_H__$/;"	d
__CONFIG_TERASIC_SOCKIT_H__	include/configs/socfpga_sockit.h	/^#define __CONFIG_TERASIC_SOCKIT_H__$/;"	d
__CONFIG_THUBAN_H	include/configs/thuban.h	/^#define __CONFIG_THUBAN_H$/;"	d
__CONFIG_TI814X_EVM_H	include/configs/ti814x_evm.h	/^#define __CONFIG_TI814X_EVM_H$/;"	d
__CONFIG_TI816X_EVM_H	include/configs/ti816x_evm.h	/^#define __CONFIG_TI816X_EVM_H$/;"	d
__CONFIG_TI_AM335X_COMMON_H__	include/configs/ti_am335x_common.h	/^#define __CONFIG_TI_AM335X_COMMON_H__$/;"	d
__CONFIG_TI_ARMV7_COMMON_H__	include/configs/ti_armv7_common.h	/^#define __CONFIG_TI_ARMV7_COMMON_H__$/;"	d
__CONFIG_TI_ARMV7_OMAP_H__	include/configs/ti_armv7_omap.h	/^#define __CONFIG_TI_ARMV7_OMAP_H__$/;"	d
__CONFIG_TI_OMAP3_COMMON_H__	include/configs/ti_omap3_common.h	/^#define __CONFIG_TI_OMAP3_COMMON_H__$/;"	d
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__CONFIG_TI_OMAP5_COMMON_H	include/configs/ti_omap5_common.h	/^#define __CONFIG_TI_OMAP5_COMMON_H$/;"	d
__CONFIG_TQMA6_MBA6_H	include/configs/tqma6_mba6.h	/^#define __CONFIG_TQMA6_MBA6_H$/;"	d
__CONFIG_TQMA6_WRU4_H	include/configs/tqma6_wru4.h	/^#define __CONFIG_TQMA6_WRU4_H$/;"	d
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__CONFIG_TRATS_H	include/configs/trats.h	/^#define __CONFIG_TRATS_H$/;"	d
__CONFIG_UNCMD_SPL_H__	include/config_uncmd_spl.h	/^#define __CONFIG_UNCMD_SPL_H__$/;"	d
__CONFIG_UNIPHIER_COMMON_H__	include/configs/uniphier.h	/^#define __CONFIG_UNIPHIER_COMMON_H__$/;"	d
__CONFIG_UNIVERSAL_H	include/configs/s5pc210_universal.h	/^#define __CONFIG_UNIVERSAL_H$/;"	d
__CONFIG_WORK_92105_H__	include/configs/work_92105.h	/^#define __CONFIG_WORK_92105_H__$/;"	d
__CONFIG_X86_COMMON_H	include/configs/x86-common.h	/^#define __CONFIG_X86_COMMON_H$/;"	d
__CONFIG_XLX_H	include/configs/xilinx-ppc.h	/^#define __CONFIG_XLX_H$/;"	d
__CONFIG_ZYNQMP_EP_H	include/configs/xilinx_zynqmp_ep.h	/^#define __CONFIG_ZYNQMP_EP_H$/;"	d
__CONFIG_ZYNQMP_ZC1751_XM015_DC1_H	include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h	/^#define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H$/;"	d
__CONFIG_ZYNQMP_ZC1751_XM016_DC2_H	include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h	/^#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H$/;"	d
__CONFIG_ZYNQMP_ZC1751_XM019_DC5_H	include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h	/^#define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H$/;"	d
__CONFIG_ZYNQMP_ZCU102_H	include/configs/xilinx_zynqmp_zcu102.h	/^#define __CONFIG_ZYNQMP_ZCU102_H$/;"	d
__CONFIG_ZYNQ_COMMON_H	include/configs/zynq-common.h	/^#define __CONFIG_ZYNQ_COMMON_H$/;"	d
__CONFIG_ZYNQ_ZC70X_H	include/configs/zynq_zc70x.h	/^#define __CONFIG_ZYNQ_ZC70X_H$/;"	d
__CONFIG_ZYNQ_ZYBO_H	include/configs/zynq_zybo.h	/^#define __CONFIG_ZYNQ_ZYBO_H$/;"	d
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__CPM_82XX__	arch/powerpc/include/asm/cpm_8260.h	/^#define __CPM_82XX__$/;"	d
__CPM_85XX__	arch/powerpc/include/asm/cpm_85xx.h	/^#define __CPM_85XX__$/;"	d
__CPM_8XX__	include/commproc.h	/^#define __CPM_8XX__$/;"	d
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__CRAMFS_H	include/cramfs/cramfs_fs.h	/^#define __CRAMFS_H$/;"	d
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__CROSSBAR_H__	arch/m68k/include/asm/coldfire/crossbar.h	/^#define __CROSSBAR_H__$/;"	d
__CROS_EC_COMMANDS_H	include/ec_commands.h	/^#define __CROS_EC_COMMANDS_H$/;"	d
__CSR_32_ADJUST	arch/mips/include/asm/io.h	/^#define __CSR_32_ADJUST /;"	d
__CYRUS_H	board/varisys/cyrus/cyrus.h	/^#define __CYRUS_H$/;"	d
__DA850_LOWLEVEL_H	arch/arm/mach-davinci/include/mach/da850_lowlevel.h	/^#define __DA850_LOWLEVEL_H$/;"	d
__DA8XX_MUSB_H__	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define __DA8XX_MUSB_H__$/;"	d
__DAVINCI_USB_H__	drivers/usb/musb/davinci.h	/^#define __DAVINCI_USB_H__$/;"	d
__DCSR_NOT_DEFINED_BY_CONFIG	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^#define __DCSR_NOT_DEFINED_BY_CONFIG$/;"	d	file:
__DCU_HDMI_SII9022A__	board/freescale/common/dcu_sii9022a.h	/^#define __DCU_HDMI_SII9022A__$/;"	d
__DDR3_AXP_CONFIG_H	drivers/ddr/marvell/axp/ddr3_axp_config.h	/^#define __DDR3_AXP_CONFIG_H$/;"	d
__DDR3_AXP_H	drivers/ddr/marvell/axp/ddr3_axp.h	/^#define __DDR3_AXP_H$/;"	d
__DDR3_CFG_H	board/ti/ks2_evm/ddr3_cfg.h	/^#define __DDR3_CFG_H$/;"	d
__DDR3_INIT_H	drivers/ddr/marvell/axp/ddr3_init.h	/^#define __DDR3_INIT_H$/;"	d
__DDR3_PATTERNS_64_H	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^#define __DDR3_PATTERNS_64_H$/;"	d
__DDR3_PATTERNS_64_H	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^#define __DDR3_PATTERNS_64_H$/;"	d
__DDR3_TRAINING_H	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^#define __DDR3_TRAINING_H$/;"	d
__DDR_H__	board/freescale/ls1021aqds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls1043aqds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls1043ardb/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls1046aqds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls1046ardb/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls2080a/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls2080aqds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/ls2080ardb/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/t1040qds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/t104xrdb/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/t208xqds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/t208xrdb/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/t4qds/ddr.h	/^#define __DDR_H__$/;"	d
__DDR_H__	board/freescale/t4rdb/ddr.h	/^#define __DDR_H__$/;"	d
__DEBUG_H__	arch/arm/mach-uniphier/debug.h	/^#define __DEBUG_H__$/;"	d
__DENALI_H__	drivers/mtd/nand/denali.h	/^#define __DENALI_H__$/;"	d
__DFU_ENTITY_H_	include/dfu.h	/^#define __DFU_ENTITY_H_$/;"	d
__DIALOG_PMIC_H__	include/dialog_pmic.h	/^#define __DIALOG_PMIC_H__$/;"	d
__DISPLAY_OPTIONS_H	include/display_options.h	/^#define __DISPLAY_OPTIONS_H$/;"	d
__DIU_HDMI_CH7301__	board/freescale/common/diu_ch7301.h	/^#define __DIU_HDMI_CH7301__$/;"	d
__DM365_LOWLEVEL_H	arch/arm/mach-davinci/include/mach/dm365_lowlevel.h	/^#define __DM365_LOWLEVEL_H$/;"	d
__DM9000_H__	include/dm9000.h	/^#define __DM9000_H__$/;"	d
__DMA_H__	arch/arm/include/asm/imx-common/dma.h	/^#define __DMA_H__$/;"	d
__DMC_H__	arch/arm/mach-exynos/include/mach/dmc.h	/^#define __DMC_H__$/;"	d
__DM_DEMO_H	include/dm-demo.h	/^#define __DM_DEMO_H$/;"	d
__DM_TEST_H	include/dm/test.h	/^#define __DM_TEST_H$/;"	d
__DM_UTIL_H	include/dm/util.h	/^#define __DM_UTIL_H$/;"	d
__DNS325_H	board/d-link/dns325/dns325.h	/^#define __DNS325_H$/;"	d
__DNS_H__	net/dns.h	/^#define __DNS_H__$/;"	d
__DOCKSTAR_H	board/Seagate/dockstar/dockstar.h	/^#define __DOCKSTAR_H$/;"	d
__DREAMPLUG_H	board/Marvell/dreamplug/dreamplug.h	/^#define __DREAMPLUG_H$/;"	d
__DRIVERS_ATMEL_USART_H__	drivers/serial/atmel_usart.h	/^#define __DRIVERS_ATMEL_USART_H__$/;"	d
__DRIVERS_AX88796L_H__	drivers/net/ax88796.h	/^#define __DRIVERS_AX88796L_H__$/;"	d
__DRIVERS_DNET_H__	drivers/net/dnet.h	/^#define __DRIVERS_DNET_H__$/;"	d
__DRIVERS_MACB_H__	drivers/net/macb.h	/^#define __DRIVERS_MACB_H__$/;"	d
__DRIVERS_NE2000_H__	drivers/net/ne2000.h	/^#define __DRIVERS_NE2000_H__$/;"	d
__DRIVERS_PINCTRL_IMX_H	drivers/pinctrl/nxp/pinctrl-imx.h	/^#define __DRIVERS_PINCTRL_IMX_H$/;"	d
__DRIVERS_USB_DWC3_CORE_H	drivers/usb/dwc3/core.h	/^#define __DRIVERS_USB_DWC3_CORE_H$/;"	d
__DRIVERS_USB_DWC3_GADGET_H	drivers/usb/dwc3/gadget.h	/^#define __DRIVERS_USB_DWC3_GADGET_H$/;"	d
__DRIVERS_USB_DWC3_IO_H	drivers/usb/dwc3/io.h	/^#define __DRIVERS_USB_DWC3_IO_H$/;"	d
__DS109_H	board/Synology/ds109/ds109.h	/^#define __DS109_H$/;"	d
__DS4510_H_	include/ds4510.h	/^#define __DS4510_H_$/;"	d
__DSPI_H__	arch/m68k/include/asm/coldfire/dspi.h	/^#define __DSPI_H__$/;"	d
__DTSEC_H__	include/fsl_dtsec.h	/^#define __DTSEC_H__$/;"	d
__DTS_IMX6DL_PINFUNC_H	arch/arm/dts/imx6dl-pinfunc.h	/^#define __DTS_IMX6DL_PINFUNC_H$/;"	d
__DTS_IMX6Q_PINFUNC_H	arch/arm/dts/imx6q-pinfunc.h	/^#define __DTS_IMX6Q_PINFUNC_H$/;"	d
__DTS_IMX6ULL_PINFUNC_H	arch/arm/dts/imx6ull-pinfunc.h	/^#define __DTS_IMX6ULL_PINFUNC_H$/;"	d
__DTS_IMX6ULL_PINFUNC_SNVS_H	arch/arm/dts/imx6ull-pinfunc-snvs.h	/^#define __DTS_IMX6ULL_PINFUNC_SNVS_H$/;"	d
__DTS_IMX6UL_PINFUNC_H	arch/arm/dts/imx6ul-pinfunc.h	/^#define __DTS_IMX6UL_PINFUNC_H$/;"	d
__DTS_IMX7D_PINFUNC_H	arch/arm/dts/imx7d-pinfunc.h	/^#define __DTS_IMX7D_PINFUNC_H$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/arm/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/microblaze/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/mips/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/nios2/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/sandbox/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/x86/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	arch/xtensa/dts/include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_DMA_H__	include/dt-bindings/dma/at91.h	/^#define __DT_BINDINGS_AT91_DMA_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/arm/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/microblaze/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/mips/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/nios2/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/sandbox/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/x86/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	arch/xtensa/dts/include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_AT91_PINCTRL_H__	include/dt-bindings/pinctrl/at91.h	/^#define __DT_BINDINGS_AT91_PINCTRL_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/arm/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/microblaze/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/mips/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/nios2/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/sandbox/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/x86/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	arch/xtensa/dts/include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__	include/dt-bindings/clock/boston-clock.h	/^#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/arm/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/microblaze/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/mips/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/nios2/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/sandbox/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/x86/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	arch/xtensa/dts/include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_HI6220_H	include/dt-bindings/clock/hi6220-clock.h	/^#define __DT_BINDINGS_CLOCK_HI6220_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/arm/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/microblaze/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/mips/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/nios2/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/sandbox/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/x86/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	arch/xtensa/dts/include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6QDL_H	include/dt-bindings/clock/imx6qdl-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6QDL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/arm/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/microblaze/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/mips/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/nios2/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/sandbox/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/x86/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	arch/xtensa/dts/include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_IMX6UL_H	include/dt-bindings/clock/imx6ul-clock.h	/^#define __DT_BINDINGS_CLOCK_IMX6UL_H$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/arm/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/microblaze/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/mips/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/nios2/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/sandbox/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/x86/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	arch/xtensa/dts/include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_	include/dt-bindings/clock/sun4i-a10-pll2.h	/^#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/arm/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/microblaze/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/mips/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/nios2/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/sandbox/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/x86/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	arch/xtensa/dts/include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_DMA_SUN4I_A10_H_	include/dt-bindings/dma/sun4i-a10.h	/^#define __DT_BINDINGS_DMA_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/arm/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/microblaze/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/mips/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/nios2/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/sandbox/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/x86/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	arch/xtensa/dts/include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_PINCTRL_SUN4I_A10_H_	include/dt-bindings/pinctrl/sun4i-a10.h	/^#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/arm/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/microblaze/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/mips/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/nios2/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/sandbox/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/x86/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	arch/xtensa/dts/include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_POWER_DOMAIN_RK3288_H__	include/dt-bindings/power-domain/rk3288.h	/^#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/arm/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/microblaze/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/mips/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/nios2/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/sandbox/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/x86/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	arch/xtensa/dts/include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_ROCKCHIP_PINCTRL_H__	include/dt-bindings/pinctrl/rockchip.h	/^#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/arm/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/microblaze/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/mips/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/nios2/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/sandbox/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/x86/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	arch/xtensa/dts/include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_BINDINGS_VIDEO_RK3288_H__	include/dt-bindings/video/rk3288.h	/^#define __DT_BINDINGS_VIDEO_RK3288_H__$/;"	d
__DT_STTUCTS	include/dt-structs.h	/^#define __DT_STTUCTS$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/arm/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/microblaze/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/mips/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/nios2/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/sandbox/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/x86/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	arch/xtensa/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DT_TLV320AIC31XX_MICBIAS_H	include/dt-bindings/sound/tlv320aic31xx-micbias.h	/^#define __DT_TLV320AIC31XX_MICBIAS_H$/;"	d
__DWC2_H__	drivers/usb/host/dwc2.h	/^#define __DWC2_H__$/;"	d
__DWC2_UDC_OTG_PRIV__	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define __DWC2_UDC_OTG_PRIV__$/;"	d
__DWC2_USB_GADGET	include/usb/dwc2_udc.h	/^#define __DWC2_USB_GADGET$/;"	d
__DWC3_H_	include/linux/usb/dwc3.h	/^#define __DWC3_H_$/;"	d
__DWC3_LINUX_COMPAT__	drivers/usb/dwc3/linux-compat.h	/^#define __DWC3_LINUX_COMPAT__$/;"	d
__DWC3_OMAP_H_	include/linux/usb/dwc3-omap.h	/^#define __DWC3_OMAP_H_$/;"	d
__DWC3_OMAP_UBOOT_H_	include/dwc3-omap-uboot.h	/^#define __DWC3_OMAP_UBOOT_H_$/;"	d
__DWC3_UBOOT_H_	include/dwc3-uboot.h	/^#define __DWC3_UBOOT_H_$/;"	d
__DWCDDR21MCTL_H	include/synopsys/dwcddr21mctl.h	/^#define __DWCDDR21MCTL_H$/;"	d
__DWMMC_HW_H	include/dwmmc.h	/^#define __DWMMC_HW_H$/;"	d
__DW_I2C_H_	drivers/i2c/designware_i2c.h	/^#define __DW_I2C_H_$/;"	d
__DW_UDC_H	include/usb/designware_udc.h	/^#define __DW_UDC_H$/;"	d
__DYNAMIC	arch/openrisc/cpu/u-boot.lds	/^__DYNAMIC  =  0;$/;"	s
__E300_H__	arch/powerpc/include/asm/e300.h	/^#define __E300_H__$/;"	d
__E500_H__	include/e500.h	/^#define __E500_H__$/;"	d
__EBI__	board/micronas/vct/ebi.h	/^#define __EBI__$/;"	d
__ECOVEC_H	include/configs/ecovec.h	/^#define __ECOVEC_H$/;"	d
__EDID_H_	include/edid.h	/^#define __EDID_H_$/;"	d
__EDMA_H__	arch/m68k/include/asm/coldfire/edma.h	/^#define __EDMA_H__$/;"	d
__EEPROM_H_	board/freescale/common/eeprom.h	/^#define __EEPROM_H_$/;"	d
__EHCI_RMOBILE_H__	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^#define __EHCI_RMOBILE_H__$/;"	d
__EL6Q_COMMON_CONFIG_H	include/configs/el6x_common.h	/^#define __EL6Q_COMMON_CONFIG_H$/;"	d
__EL_ZC5202_H	include/configs/zc5202.h	/^#define __EL_ZC5202_H$/;"	d
__EL_ZC5601_H	include/configs/zc5601.h	/^#define __EL_ZC5601_H$/;"	d
__ENV_ATTR_H__	include/env_attr.h	/^#define __ENV_ATTR_H__$/;"	d
__ENV_CALLBACK_H__	include/env_callback.h	/^#define __ENV_CALLBACK_H__$/;"	d
__ENV_FLAGS_H__	include/env_flags.h	/^#define __ENV_FLAGS_H__$/;"	d
__EPORT_H__	arch/m68k/include/asm/coldfire/eport.h	/^#define __EPORT_H__$/;"	d
__ESPT_H	include/configs/espt.h	/^#define __ESPT_H$/;"	d
__ETH_H	arch/sandbox/include/asm/eth.h	/^#define __ETH_H$/;"	d
__ETH_INTERNAL_H	net/eth_internal.h	/^#define __ETH_INTERNAL_H$/;"	d
__ETH_RAW_OS_H	arch/sandbox/include/asm/eth-raw-os.h	/^#define __ETH_RAW_OS_H$/;"	d
__EVB_RK3399_H	include/configs/evb_rk3399.h	/^#define __EVB_RK3399_H$/;"	d
__EXPORTS_H__	include/exports.h	/^#define __EXPORTS_H__$/;"	d
__EXT4_COMMON__	fs/ext4/ext4_common.h	/^#define __EXT4_COMMON__$/;"	d
__EXT4_JRNL__	fs/ext4/ext4_journal.h	/^#define __EXT4_JRNL__$/;"	d
__EXT4__	include/ext4fs.h	/^#define __EXT4__$/;"	d
__EXT_COMMON__	include/ext_common.h	/^#define __EXT_COMMON__$/;"	d
__EXYNOS_CLOCK_INIT_H	arch/arm/mach-exynos/clock_init.h	/^#define __EXYNOS_CLOCK_INIT_H$/;"	d
__EXYNOS_COMMON_H	include/configs/exynos-common.h	/^#define __EXYNOS_COMMON_H$/;"	d
__FACTORYSET_H	board/siemens/common/factoryset.h	/^#define __FACTORYSET_H$/;"	d
__FDELT	include/linux/posix_types.h	/^#define	__FDELT(/;"	d
__FDMASK	include/linux/posix_types.h	/^#define	__FDMASK(/;"	d
__FDSET_LONGS	include/linux/posix_types.h	/^#define __FDSET_LONGS	/;"	d
__FDT_HOST_H__	tools/fdt_host.h	/^#define __FDT_HOST_H__$/;"	d
__FDT_SUPPORT_H	include/fdt_support.h	/^#define __FDT_SUPPORT_H$/;"	d
__FD_CLR	arch/arm/include/asm/posix_types.h	/^#define __FD_CLR(/;"	d
__FD_CLR	arch/avr32/include/asm/posix_types.h	/^static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)$/;"	f	typeref:typename:void
__FD_CLR	arch/blackfin/include/asm/posix_types.h	/^#define	__FD_CLR(/;"	d
__FD_CLR	arch/m68k/include/asm/posix_types.h	/^#define	__FD_CLR(/;"	d
__FD_CLR	arch/m68k/include/asm/posix_types.h	/^static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)$/;"	f	typeref:typename:void
__FD_CLR	arch/microblaze/include/asm/posix_types.h	/^#define __FD_CLR(/;"	d
__FD_CLR	arch/mips/include/asm/posix_types.h	/^static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)$/;"	f	typeref:typename:void
__FD_CLR	arch/nds32/include/asm/posix_types.h	/^#define __FD_CLR(/;"	d
__FD_CLR	arch/nios2/include/asm/posix_types.h	/^#define	__FD_CLR(/;"	d
__FD_CLR	arch/openrisc/include/asm/posix_types.h	/^#define __FD_CLR(/;"	d
__FD_CLR	arch/powerpc/include/asm/posix_types.h	/^#define	__FD_CLR(/;"	d
__FD_CLR	arch/powerpc/include/asm/posix_types.h	/^static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)$/;"	f	typeref:typename:void
__FD_CLR	arch/sh/include/asm/posix_types.h	/^static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)$/;"	f	typeref:typename:void
__FD_CLR	arch/sparc/include/asm/posix_types.h	/^#define	__FD_CLR(/;"	d
__FD_CLR	arch/sparc/include/asm/posix_types.h	/^static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set * fdsetp)$/;"	f	typeref:typename:void
__FD_CLR	arch/x86/include/asm/posix_types.h	/^#define __FD_CLR(/;"	d
__FD_CLR	arch/xtensa/include/asm/posix_types.h	/^#define __FD_CLR(/;"	d
__FD_ISSET	arch/arm/include/asm/posix_types.h	/^#define __FD_ISSET(/;"	d
__FD_ISSET	arch/avr32/include/asm/posix_types.h	/^static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)$/;"	f	typeref:typename:int
__FD_ISSET	arch/blackfin/include/asm/posix_types.h	/^#define	__FD_ISSET(/;"	d
__FD_ISSET	arch/m68k/include/asm/posix_types.h	/^#define	__FD_ISSET(/;"	d
__FD_ISSET	arch/m68k/include/asm/posix_types.h	/^static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)$/;"	f	typeref:typename:int
__FD_ISSET	arch/microblaze/include/asm/posix_types.h	/^#define __FD_ISSET(/;"	d
__FD_ISSET	arch/mips/include/asm/posix_types.h	/^static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)$/;"	f	typeref:typename:int
__FD_ISSET	arch/nds32/include/asm/posix_types.h	/^#define __FD_ISSET(/;"	d
__FD_ISSET	arch/nios2/include/asm/posix_types.h	/^#define	__FD_ISSET(/;"	d
__FD_ISSET	arch/openrisc/include/asm/posix_types.h	/^#define __FD_ISSET(/;"	d
__FD_ISSET	arch/powerpc/include/asm/posix_types.h	/^#define	__FD_ISSET(/;"	d
__FD_ISSET	arch/powerpc/include/asm/posix_types.h	/^static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)$/;"	f	typeref:typename:int
__FD_ISSET	arch/sh/include/asm/posix_types.h	/^static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)$/;"	f	typeref:typename:int
__FD_ISSET	arch/sparc/include/asm/posix_types.h	/^#define	__FD_ISSET(/;"	d
__FD_ISSET	arch/sparc/include/asm/posix_types.h	/^static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set * p)$/;"	f	typeref:typename:int
__FD_ISSET	arch/x86/include/asm/posix_types.h	/^#define __FD_ISSET(/;"	d
__FD_ISSET	arch/xtensa/include/asm/posix_types.h	/^#define __FD_ISSET(/;"	d
__FD_SET	arch/arm/include/asm/posix_types.h	/^#define __FD_SET(/;"	d
__FD_SET	arch/avr32/include/asm/posix_types.h	/^static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)$/;"	f	typeref:typename:void
__FD_SET	arch/blackfin/include/asm/posix_types.h	/^#define	__FD_SET(/;"	d
__FD_SET	arch/m68k/include/asm/posix_types.h	/^#define	__FD_SET(/;"	d
__FD_SET	arch/m68k/include/asm/posix_types.h	/^static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)$/;"	f	typeref:typename:void
__FD_SET	arch/microblaze/include/asm/posix_types.h	/^#define __FD_SET(/;"	d
__FD_SET	arch/mips/include/asm/posix_types.h	/^static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)$/;"	f	typeref:typename:void
__FD_SET	arch/nds32/include/asm/posix_types.h	/^#define __FD_SET(/;"	d
__FD_SET	arch/nios2/include/asm/posix_types.h	/^#define	__FD_SET(/;"	d
__FD_SET	arch/openrisc/include/asm/posix_types.h	/^#define __FD_SET(/;"	d
__FD_SET	arch/powerpc/include/asm/posix_types.h	/^#define	__FD_SET(/;"	d
__FD_SET	arch/powerpc/include/asm/posix_types.h	/^static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)$/;"	f	typeref:typename:void
__FD_SET	arch/sh/include/asm/posix_types.h	/^static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)$/;"	f	typeref:typename:void
__FD_SET	arch/sparc/include/asm/posix_types.h	/^#define	__FD_SET(/;"	d
__FD_SET	arch/sparc/include/asm/posix_types.h	/^static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set * fdsetp)$/;"	f	typeref:typename:void
__FD_SET	arch/x86/include/asm/posix_types.h	/^#define __FD_SET(/;"	d
__FD_SET	arch/xtensa/include/asm/posix_types.h	/^#define __FD_SET(/;"	d
__FD_SETSIZE	include/linux/posix_types.h	/^#define __FD_SETSIZE	/;"	d
__FD_ZERO	arch/arm/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/avr32/include/asm/posix_types.h	/^static __inline__ void __FD_ZERO(__kernel_fd_set *__p)$/;"	f	typeref:typename:void
__FD_ZERO	arch/blackfin/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/m68k/include/asm/posix_types.h	/^#define	__FD_ZERO(/;"	d
__FD_ZERO	arch/m68k/include/asm/posix_types.h	/^static __inline__ void __FD_ZERO(__kernel_fd_set *p)$/;"	f	typeref:typename:void
__FD_ZERO	arch/microblaze/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/mips/include/asm/posix_types.h	/^static __inline__ void __FD_ZERO(__kernel_fd_set *__p)$/;"	f	typeref:typename:void
__FD_ZERO	arch/nds32/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/nios2/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/openrisc/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/powerpc/include/asm/posix_types.h	/^#define	__FD_ZERO(/;"	d
__FD_ZERO	arch/powerpc/include/asm/posix_types.h	/^static __inline__ void __FD_ZERO(__kernel_fd_set *p)$/;"	f	typeref:typename:void
__FD_ZERO	arch/sh/include/asm/posix_types.h	/^static __inline__ void __FD_ZERO(__kernel_fd_set *__p)$/;"	f	typeref:typename:void
__FD_ZERO	arch/sparc/include/asm/posix_types.h	/^#define	__FD_ZERO(/;"	d
__FD_ZERO	arch/sparc/include/asm/posix_types.h	/^static __inline__ void __FD_ZERO(__kernel_fd_set * p)$/;"	f	typeref:typename:void
__FD_ZERO	arch/x86/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FD_ZERO	arch/xtensa/include/asm/posix_types.h	/^#define __FD_ZERO(/;"	d
__FEC_MXC_H	drivers/net/fec_mxc.h	/^#define __FEC_MXC_H$/;"	d
__FG_BATTERY_CELL_PARAMS_H_	include/power/fg_battery_cell_params.h	/^#define __FG_BATTERY_CELL_PARAMS_H_$/;"	d
__FIS_H__	include/fis.h	/^#define __FIS_H__$/;"	d
__FLASHDEFINES_H__	board/bf533-ezkit/flash-defines.h	/^#define __FLASHDEFINES_H__$/;"	d
__FLEXBUS_H	arch/m68k/include/asm/coldfire/flexbus.h	/^#define __FLEXBUS_H$/;"	d
__FLEXCAN_H__	arch/m68k/include/asm/coldfire/flexcan.h	/^#define __FLEXCAN_H__$/;"	d
__FMAN_BOARD_HELPER__	board/freescale/common/fman.h	/^#define __FMAN_BOARD_HELPER__$/;"	d
__FM_ETH_H__	include/fm_eth.h	/^#define __FM_ETH_H__$/;"	d
__FM_H__	drivers/net/fm/fm.h	/^#define __FM_H__$/;"	d
__FREESCALE_BOARD_SPL_H	board/freescale/common/spl.h	/^#define __FREESCALE_BOARD_SPL_H$/;"	d
__FSL_8XXX_MISC_H___	board/xes/common/fsl_8xxx_misc.h	/^#define __FSL_8XXX_MISC_H___$/;"	d
__FSL_CORENET2_SERDES_H	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h	/^#define __FSL_CORENET2_SERDES_H$/;"	d
__FSL_CORENET_SERDES_H	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h	/^#define __FSL_CORENET_SERDES_H$/;"	d
__FSL_CSU_H__	include/fsl_csu.h	/^#define __FSL_CSU_H__$/;"	d
__FSL_DDRC_VER_H	include/fsl_ddrc_version.h	/^#define __FSL_DDRC_VER_H$/;"	d
__FSL_DEVDIS_H_	include/fsl_devdis.h	/^#define __FSL_DEVDIS_H_$/;"	d
__FSL_DPAA_FD_H	include/fsl-mc/fsl_dpaa_fd.h	/^#define __FSL_DPAA_FD_H$/;"	d
__FSL_DPBP_H	include/fsl-mc/fsl_dpbp.h	/^#define __FSL_DPBP_H$/;"	d
__FSL_DPMAC_H	include/fsl-mc/fsl_dpmac.h	/^#define __FSL_DPMAC_H$/;"	d
__FSL_DPMNG_CMD_H	drivers/net/fsl-mc/fsl_dpmng_cmd.h	/^#define __FSL_DPMNG_CMD_H$/;"	d
__FSL_DPMNG_H	include/fsl-mc/fsl_dpmng.h	/^#define __FSL_DPMNG_H$/;"	d
__FSL_EPU_H	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^#define __FSL_EPU_H$/;"	d
__FSL_ESDHC_H__	include/fsl_esdhc.h	/^#define	__FSL_ESDHC_H__$/;"	d
__FSL_FMAN_H__	include/fsl_fman.h	/^#define __FSL_FMAN_H__$/;"	d
__FSL_IFC_H	include/fsl_ifc.h	/^#define __FSL_IFC_H$/;"	d
__FSL_IMMAP_H	include/fsl_immap.h	/^#define __FSL_IMMAP_H$/;"	d
__FSL_LS102XA_DEVDIS_H_	arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h	/^#define __FSL_LS102XA_DEVDIS_H_$/;"	d
__FSL_LS102XA_SOC_H	arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h	/^#define __FSL_LS102XA_SOC_H$/;"	d
__FSL_LS102XA_STREAM_ID_H_	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^#define __FSL_LS102XA_STREAM_ID_H_$/;"	d
__FSL_LS1_SERDES_H	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.h	/^#define __FSL_LS1_SERDES_H$/;"	d
__FSL_MC_CMD_H	include/fsl-mc/fsl_mc_cmd.h	/^#define __FSL_MC_CMD_H$/;"	d
__FSL_MC_H__	include/fsl-mc/fsl_mc.h	/^#define __FSL_MC_H__$/;"	d
__FSL_MPC83XX_SERDES_H	arch/powerpc/include/asm/fsl_mpc83xx_serdes.h	/^#define __FSL_MPC83XX_SERDES_H$/;"	d
__FSL_NS_ACCESS_H_	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^#define __FSL_NS_ACCESS_H_$/;"	d
__FSL_NS_ACCESS_H_	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^#define __FSL_NS_ACCESS_H_$/;"	d
__FSL_PCI_H_	arch/powerpc/include/asm/fsl_pci.h	/^#define __FSL_PCI_H_$/;"	d
__FSL_PHY_H__	include/fsl_mdio.h	/^#define __FSL_PHY_H__$/;"	d
__FSL_PMIC_H__	include/fsl_pmic.h	/^#define __FSL_PMIC_H__$/;"	d
__FSL_PPA_H_	arch/arm/include/asm/arch-fsl-layerscape/ppa.h	/^#define __FSL_PPA_H_$/;"	d
__FSL_SATA_H_	arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h	/^#define __FSL_SATA_H_$/;"	d
__FSL_SATA_H__	drivers/block/dwc_ahsata.h	/^#define __FSL_SATA_H__$/;"	d
__FSL_SATA_H__	drivers/block/fsl_sata.h	/^#define __FSL_SATA_H__$/;"	d
__FSL_SECURE_BOOT_H	arch/arm/include/asm/fsl_secure_boot.h	/^#define __FSL_SECURE_BOOT_H$/;"	d
__FSL_SECURE_BOOT_H	arch/powerpc/include/asm/fsl_secure_boot.h	/^#define __FSL_SECURE_BOOT_H$/;"	d
__FSL_SEC_H	include/fsl_sec.h	/^#define __FSL_SEC_H$/;"	d
__FSL_SEC_MON_H	include/fsl_sec_mon.h	/^#define __FSL_SEC_MON_H$/;"	d
__FSL_SERDES_H	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^#define __FSL_SERDES_H$/;"	d
__FSL_SERDES_H	arch/powerpc/include/asm/fsl_serdes.h	/^#define __FSL_SERDES_H$/;"	d
__FSL_SERDES_H__	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^#define __FSL_SERDES_H__$/;"	d
__FSL_STREAM_ID_H	arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h	/^#define __FSL_STREAM_ID_H$/;"	d
__FSMC_NAND_H__	include/linux/mtd/fsmc_nand.h	/^#define __FSMC_NAND_H__$/;"	d
__FSP_API_H__	arch/x86/include/asm/fsp/fsp_api.h	/^#define __FSP_API_H__$/;"	d
__FSP_BOOT_MODE_H__	arch/x86/include/asm/fsp/fsp_bootmode.h	/^#define __FSP_BOOT_MODE_H__$/;"	d
__FSP_CONFIGS_H__	arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h	/^#define __FSP_CONFIGS_H__$/;"	d
__FSP_CONFIGS_H__	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^#define __FSP_CONFIGS_H__$/;"	d
__FSP_CONFIGS_H__	arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h	/^#define __FSP_CONFIGS_H__$/;"	d
__FSP_FFS_H__	arch/x86/include/asm/fsp/fsp_ffs.h	/^#define __FSP_FFS_H__$/;"	d
__FSP_FV___	arch/x86/include/asm/fsp/fsp_fv.h	/^#define __FSP_FV___$/;"	d
__FSP_HOB_H__	arch/x86/include/asm/fsp/fsp_hob.h	/^#define __FSP_HOB_H__$/;"	d
__FSP_SUPPORT_H__	arch/x86/include/asm/fsp/fsp_support.h	/^#define __FSP_SUPPORT_H__$/;"	d
__FSP_TYPES_H__	arch/x86/include/asm/fsp/fsp_types.h	/^#define __FSP_TYPES_H__$/;"	d
__FSP_VPD_H	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^#define __FSP_VPD_H$/;"	d
__FSP_VPD_H__	arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h	/^#define __FSP_VPD_H__$/;"	d
__FTAHBC202S_H	include/faraday/ftahbc020s.h	/^#define __FTAHBC202S_H$/;"	d
__FTGMAC100_H	drivers/net/ftgmac100.h	/^#define __FTGMAC100_H$/;"	d
__FTI2C010_H	drivers/i2c/fti2c010.h	/^#define __FTI2C010_H$/;"	d
__FTIDE020_H	drivers/block/ftide020.h	/^#define __FTIDE020_H$/;"	d
__FTMAC100_H	drivers/net/ftmac100.h	/^#define __FTMAC100_H$/;"	d
__FTPCI100_H	include/faraday/ftpci100.h	/^#define __FTPCI100_H$/;"	d
__FTPMU010_H	include/faraday/ftpmu010.h	/^#define __FTPMU010_H$/;"	d
__FTSDC010_H	include/faraday/ftsdc010.h	/^#define __FTSDC010_H$/;"	d
__FTSDMC020_H	include/faraday/ftsdmc020.h	/^#define __FTSDMC020_H$/;"	d
__FTSDMC021_H	include/faraday/ftsdmc021.h	/^#define __FTSDMC021_H$/;"	d
__FTSMC020_H	include/faraday/ftsmc020.h	/^#define __FTSMC020_H$/;"	d
__FTTMR010_H	include/faraday/fttmr010.h	/^#define __FTTMR010_H$/;"	d
__FTWDT010_H	include/faraday/ftwdt010_wdt.h	/^#define __FTWDT010_H$/;"	d
__FT_FSL_PCIE_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define __FT_FSL_PCIE_SETUP(/;"	d
__FT_FSL_PCI_SETUP	arch/powerpc/include/asm/fsl_pci.h	/^#define __FT_FSL_PCI_SETUP(/;"	d
__FULL_SLOW_DOWN_IO	arch/x86/include/asm/io.h	/^#define __FULL_SLOW_DOWN_IO /;"	d
__FW_CFG__	include/qfw.h	/^#define __FW_CFG__$/;"	d
__FW_UPDATE_H	board/cm5200/fwupdate.h	/^#define __FW_UPDATE_H$/;"	d
__F_DFU_H_	drivers/usb/gadget/f_dfu.h	/^#define __F_DFU_H_$/;"	d
__GADGET__CI_UDC_H__	drivers/usb/gadget/ci_udc.h	/^#define __GADGET__CI_UDC_H__$/;"	d
__GDSYS_FPGA_H	include/gdsys_fpga.h	/^#define __GDSYS_FPGA_H$/;"	d
__GENERIC_ASM_OFFSETS_H__	include/generated/generic-asm-offsets.h	/^#define __GENERIC_ASM_OFFSETS_H__$/;"	d
__GE_BX50V3_CONFIG_H	include/configs/ge_bx50v3.h	/^#define __GE_BX50V3_CONFIG_H$/;"	d
__GFP_NOWARN	include/linux/compat.h	/^#define __GFP_NOWARN /;"	d
__GFP_ZERO	include/linux/compat.h	/^#define __GFP_ZERO	/;"	d
__GIC_H__	arch/arm/include/asm/gic.h	/^#define __GIC_H__$/;"	d
__GLUE_ZLIB_H__	lib/zlib/zlib.h	/^#define __GLUE_ZLIB_H__$/;"	d
__GOSE_H	include/configs/gose.h	/^#define __GOSE_H$/;"	d
__GRASSHOPPER_CONFIG_H	include/configs/grasshopper.h	/^#define __GRASSHOPPER_CONFIG_H$/;"	d
__GRLIB_APBUART_H__	include/grlib/apbuart.h	/^#define __GRLIB_APBUART_H__$/;"	d
__GRLIB_GPTIMER_H__	include/grlib/gptimer.h	/^#define __GRLIB_GPTIMER_H__$/;"	d
__GRLIB_GRETH_H__	include/grlib/greth.h	/^#define __GRLIB_GRETH_H__$/;"	d
__GRLIB_IRQMP_H__	include/grlib/irqmp.h	/^#define __GRLIB_IRQMP_H__$/;"	d
__GURUPLUG_H	board/Marvell/guruplug/guruplug.h	/^#define __GURUPLUG_H$/;"	d
__GXBB_H__	arch/arm/include/asm/arch-meson/gxbb.h	/^#define __GXBB_H__$/;"	d
__G_DOWNLOAD_H_	include/g_dnl.h	/^#define __G_DOWNLOAD_H_$/;"	d
__HAVE_ARCH_BCOPY	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_BCOPY$/;"	d
__HAVE_ARCH_CMPXCHG	arch/sh/include/asm/system.h	/^#define __HAVE_ARCH_CMPXCHG /;"	d
__HAVE_ARCH_MEMCHR	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMCHR	/;"	d
__HAVE_ARCH_MEMCHR	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_MEMCHR$/;"	d
__HAVE_ARCH_MEMCHR	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_MEMCHR /;"	d
__HAVE_ARCH_MEMCMP	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_MEMCMP$/;"	d
__HAVE_ARCH_MEMCMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMCMP	/;"	d
__HAVE_ARCH_MEMCMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMCMP$/;"	d
__HAVE_ARCH_MEMCMP	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_MEMCMP$/;"	d
__HAVE_ARCH_MEMCMP	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_MEMCMP /;"	d
__HAVE_ARCH_MEMCPY	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY$/;"	d
__HAVE_ARCH_MEMCPY	arch/arm/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY$/;"	d
__HAVE_ARCH_MEMCPY	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY	/;"	d
__HAVE_ARCH_MEMCPY	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY$/;"	d
__HAVE_ARCH_MEMCPY	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY$/;"	d
__HAVE_ARCH_MEMCPY	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY /;"	d
__HAVE_ARCH_MEMCPY	arch/x86/include/asm/string.h	/^#define __HAVE_ARCH_MEMCPY$/;"	d
__HAVE_ARCH_MEMMOVE	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMMOVE	/;"	d
__HAVE_ARCH_MEMMOVE	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMMOVE$/;"	d
__HAVE_ARCH_MEMMOVE	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_MEMMOVE$/;"	d
__HAVE_ARCH_MEMMOVE	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_MEMMOVE /;"	d
__HAVE_ARCH_MEMMOVE	arch/x86/include/asm/string.h	/^#define __HAVE_ARCH_MEMMOVE$/;"	d
__HAVE_ARCH_MEMSCAN	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMSCAN	/;"	d
__HAVE_ARCH_MEMSCAN	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_MEMSCAN /;"	d
__HAVE_ARCH_MEMSET	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET$/;"	d
__HAVE_ARCH_MEMSET	arch/arm/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET$/;"	d
__HAVE_ARCH_MEMSET	arch/avr32/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET$/;"	d
__HAVE_ARCH_MEMSET	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET	/;"	d
__HAVE_ARCH_MEMSET	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET$/;"	d
__HAVE_ARCH_MEMSET	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET$/;"	d
__HAVE_ARCH_MEMSET	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET /;"	d
__HAVE_ARCH_MEMSET	arch/x86/include/asm/string.h	/^#define __HAVE_ARCH_MEMSET$/;"	d
__HAVE_ARCH_STRCAT	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRCAT	/;"	d
__HAVE_ARCH_STRCAT	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_STRCAT$/;"	d
__HAVE_ARCH_STRCAT	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRCAT /;"	d
__HAVE_ARCH_STRCHR	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_STRCHR$/;"	d
__HAVE_ARCH_STRCHR	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRCHR	/;"	d
__HAVE_ARCH_STRCHR	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRCHR /;"	d
__HAVE_ARCH_STRCMP	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_STRCMP$/;"	d
__HAVE_ARCH_STRCMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRCMP	/;"	d
__HAVE_ARCH_STRCMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRCMP$/;"	d
__HAVE_ARCH_STRCMP	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_STRCMP$/;"	d
__HAVE_ARCH_STRCMP	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRCMP /;"	d
__HAVE_ARCH_STRCMP	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRCMP$/;"	d
__HAVE_ARCH_STRCPY	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_STRCPY$/;"	d
__HAVE_ARCH_STRCPY	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRCPY	/;"	d
__HAVE_ARCH_STRCPY	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRCPY$/;"	d
__HAVE_ARCH_STRCPY	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_STRCPY$/;"	d
__HAVE_ARCH_STRCPY	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRCPY /;"	d
__HAVE_ARCH_STRCPY	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRCPY$/;"	d
__HAVE_ARCH_STRLEN	arch/arc/include/asm/string.h	/^#define __HAVE_ARCH_STRLEN$/;"	d
__HAVE_ARCH_STRLEN	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRLEN	/;"	d
__HAVE_ARCH_STRLEN	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_STRLEN$/;"	d
__HAVE_ARCH_STRLEN	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRLEN /;"	d
__HAVE_ARCH_STRNCAT	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNCAT	/;"	d
__HAVE_ARCH_STRNCAT	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNCAT /;"	d
__HAVE_ARCH_STRNCMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNCMP	/;"	d
__HAVE_ARCH_STRNCMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNCMP$/;"	d
__HAVE_ARCH_STRNCMP	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNCMP /;"	d
__HAVE_ARCH_STRNCMP	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNCMP$/;"	d
__HAVE_ARCH_STRNCPY	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNCPY	/;"	d
__HAVE_ARCH_STRNCPY	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNCPY$/;"	d
__HAVE_ARCH_STRNCPY	arch/powerpc/include/asm/string.h	/^#define __HAVE_ARCH_STRNCPY$/;"	d
__HAVE_ARCH_STRNCPY	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNCPY /;"	d
__HAVE_ARCH_STRNCPY	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNCPY$/;"	d
__HAVE_ARCH_STRNICMP	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNICMP	/;"	d
__HAVE_ARCH_STRNICMP	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNICMP /;"	d
__HAVE_ARCH_STRNLEN	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRNLEN	/;"	d
__HAVE_ARCH_STRNLEN	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRNLEN /;"	d
__HAVE_ARCH_STRRCHR	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRRCHR	/;"	d
__HAVE_ARCH_STRRCHR	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRRCHR /;"	d
__HAVE_ARCH_STRSTR	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRSTR	/;"	d
__HAVE_ARCH_STRSTR	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRSTR /;"	d
__HAVE_ARCH_STRTOK	arch/blackfin/include/asm/string.h	/^#define __HAVE_ARCH_STRTOK	/;"	d
__HAVE_ARCH_STRTOK	arch/sh/include/asm/string.h	/^#define __HAVE_ARCH_STRTOK /;"	d
__HAVE_BUILTIN_BSWAP16__	include/linux/compiler-gcc.h	/^#define __HAVE_BUILTIN_BSWAP16__$/;"	d
__HAVE_BUILTIN_BSWAP16__	include/linux/compiler-intel.h	/^#define __HAVE_BUILTIN_BSWAP16__$/;"	d
__HAVE_BUILTIN_BSWAP32__	include/linux/compiler-gcc.h	/^#define __HAVE_BUILTIN_BSWAP32__$/;"	d
__HAVE_BUILTIN_BSWAP64__	include/linux/compiler-gcc.h	/^#define __HAVE_BUILTIN_BSWAP64__$/;"	d
__HI6220_ALWAYSON_H__	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^#define __HI6220_ALWAYSON_H__$/;"	d
__HI6220_H__	arch/arm/include/asm/arch-hi6220/hi6220.h	/^#define __HI6220_H__$/;"	d
__HI6553_PMIC_H__	include/power/hi6553_pmic.h	/^#define __HI6553_PMIC_H__$/;"	d
__HIGHSPEED_ENV_SPEC_H	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^#define __HIGHSPEED_ENV_SPEC_H$/;"	d
__HIKEY_H	include/configs/hikey.h	/^#define __HIKEY_H$/;"	d
__HW_SHA_H	include/hw_sha.h	/^#define __HW_SHA_H$/;"	d
__I2C_EEPROM	include/i2c_eeprom.h	/^#define __I2C_EEPROM$/;"	d
__I2S_H__	include/i2s.h	/^#define __I2S_H__$/;"	d
__I2S_REGS_H__	arch/arm/mach-exynos/include/mach/i2s-regs.h	/^#define __I2S_REGS_H__$/;"	d
__IB62x0_H	board/raidsonic/ib62x0/ib62x0.h	/^#define __IB62x0_H$/;"	d
__ICONNECT_H	board/iomega/iconnect/iconnect.h	/^#define __ICONNECT_H$/;"	d
__ICS_CLK_H_	board/freescale/common/ics307_clk.h	/^#define __ICS_CLK_H_	/;"	d
__IDT8T49N222A_SERDES_CLK_H_	board/freescale/common/idt8t49n222a_serdes_clk.h	/^#define __IDT8T49N222A_SERDES_CLK_H_	/;"	d
__IGEP00X0_H	include/configs/omap3_igep00x0.h	/^#define __IGEP00X0_H$/;"	d
__IMAGE_H__	include/image.h	/^#define __IMAGE_H__$/;"	d
__IMMAP_512x__	arch/powerpc/include/asm/immap_512x.h	/^#define __IMMAP_512x__$/;"	d
__IMMAP_520X__	arch/m68k/include/asm/immap_520x.h	/^#define __IMMAP_520X__$/;"	d
__IMMAP_5227X__	arch/m68k/include/asm/immap_5227x.h	/^#define __IMMAP_5227X__$/;"	d
__IMMAP_5235__	arch/m68k/include/asm/immap_5235.h	/^#define __IMMAP_5235__$/;"	d
__IMMAP_5249__	arch/m68k/include/asm/immap_5249.h	/^#define __IMMAP_5249__$/;"	d
__IMMAP_5253__	arch/m68k/include/asm/immap_5253.h	/^#define __IMMAP_5253__$/;"	d
__IMMAP_5271__	arch/m68k/include/asm/immap_5271.h	/^#define __IMMAP_5271__$/;"	d
__IMMAP_5272__	arch/m68k/include/asm/immap_5272.h	/^#define __IMMAP_5272__$/;"	d
__IMMAP_5275__	arch/m68k/include/asm/immap_5275.h	/^#define __IMMAP_5275__$/;"	d
__IMMAP_5282__	arch/m68k/include/asm/immap_5282.h	/^#define __IMMAP_5282__$/;"	d
__IMMAP_5301X__	arch/m68k/include/asm/immap_5301x.h	/^#define __IMMAP_5301X__$/;"	d
__IMMAP_5307__	arch/m68k/include/asm/immap_5307.h	/^#define __IMMAP_5307__$/;"	d
__IMMAP_5329__	arch/m68k/include/asm/immap_5329.h	/^#define __IMMAP_5329__$/;"	d
__IMMAP_5441X__	arch/m68k/include/asm/immap_5441x.h	/^#define __IMMAP_5441X__$/;"	d
__IMMAP_5445X__	arch/m68k/include/asm/immap_5445x.h	/^#define __IMMAP_5445X__$/;"	d
__IMMAP_547x_8x__	arch/m68k/include/asm/immap_547x_8x.h	/^#define __IMMAP_547x_8x__$/;"	d
__IMMAP_5XX__	arch/powerpc/include/asm/5xx_immap.h	/^#define __IMMAP_5XX__$/;"	d
__IMMAP_82XX__	arch/powerpc/include/asm/immap_8260.h	/^#define __IMMAP_82XX__$/;"	d
__IMMAP_83xx__	arch/powerpc/include/asm/immap_83xx.h	/^#define __IMMAP_83xx__$/;"	d
__IMMAP_85xx__	arch/powerpc/include/asm/immap_85xx.h	/^#define __IMMAP_85xx__$/;"	d
__IMMAP_86xx__	arch/powerpc/include/asm/immap_86xx.h	/^#define __IMMAP_86xx__$/;"	d
__IMMAP_8XX__	arch/powerpc/include/asm/8xx_immap.h	/^#define __IMMAP_8XX__$/;"	d
__IMMAP_H	arch/m68k/include/asm/immap.h	/^#define __IMMAP_H$/;"	d
__IMMAP_QE_H__	include/linux/immap_qe.h	/^#define __IMMAP_QE_H__$/;"	d
__IMX27LITE_COMMON_CONFIG_H	include/configs/imx27lite-common.h	/^#define __IMX27LITE_COMMON_CONFIG_H$/;"	d
__IMX6QLD_ICORE_CONFIG_H	include/configs/imx6qdl_icore.h	/^#define __IMX6QLD_ICORE_CONFIG_H$/;"	d
__IMX6_SPL_CONFIG_H	include/configs/imx6_spl.h	/^#define __IMX6_SPL_CONFIG_H$/;"	d
__IMX_RDC_H__	arch/arm/include/asm/arch-mx6/imx-rdc.h	/^#define __IMX_RDC_H__$/;"	d
__IMX_RDC_H__	arch/arm/include/asm/arch-mx7/imx-rdc.h	/^#define __IMX_RDC_H__$/;"	d
__IMX_REGS_H__	arch/arm/include/asm/arch-mxs/imx-regs.h	/^#define __IMX_REGS_H__$/;"	d
__IMX_REGS_LCDIF_H__	arch/arm/include/asm/imx-common/regs-lcdif.h	/^#define __IMX_REGS_LCDIF_H__$/;"	d
__IMX_SATA_H_	arch/arm/include/asm/imx-common/sata.h	/^#define __IMX_SATA_H_$/;"	d
__IMX_VIDEO_H_	arch/arm/include/asm/imx-common/video.h	/^#define __IMX_VIDEO_H_$/;"	d
__IN	arch/x86/include/asm/io.h	/^#define __IN(/;"	d
__IN1	arch/x86/include/asm/io.h	/^#define __IN1(/;"	d
__IN2	arch/x86/include/asm/io.h	/^#define __IN2(/;"	d
__INCLUDE_BOUNCEBUF_H__	include/bouncebuf.h	/^#define __INCLUDE_BOUNCEBUF_H__$/;"	d
__INLINE_BITOPS	arch/powerpc/include/asm/bitops.h	/^#define __INLINE_BITOPS	/;"	d
__INPLL	drivers/video/ati_radeon_fb.h	/^static inline u32 __INPLL(struct radeonfb_info *rinfo, u32 addr)$/;"	f	typeref:typename:u32
__INS	arch/x86/include/asm/io.h	/^#define __INS(/;"	d
__INS	arch/x86/include/asm/io.h	/^__INS(b)$/;"	f
__INSIDE_MSYS__	tools/mingw_support.h	/^#define __INSIDE_MSYS__	/;"	d
__INTCTRL_H__	arch/m68k/include/asm/coldfire/intctrl.h	/^#define __INTCTRL_H__$/;"	d
__IOMUX_MX25_H__	arch/arm/include/asm/arch-mx25/iomux-mx25.h	/^#define __IOMUX_MX25_H__$/;"	d
__IOMUX_MX35_H__	arch/arm/include/asm/arch-mx35/iomux-mx35.h	/^#define __IOMUX_MX35_H__$/;"	d
__IOMUX_MX51_H__	arch/arm/include/asm/arch-mx5/iomux-mx51.h	/^#define __IOMUX_MX51_H__$/;"	d
__IOMUX_MX53_H__	arch/arm/include/asm/arch-mx5/iomux-mx53.h	/^#define __IOMUX_MX53_H__$/;"	d
__IOMUX_VF610_H__	arch/arm/include/asm/arch-vf610/iomux-vf610.h	/^#define __IOMUX_VF610_H__$/;"	d
__IOTRACE_H	include/iotrace.h	/^#define __IOTRACE_H$/;"	d
__IPROC_COMMON_CONFIGS_H	arch/arm/include/asm/iproc-common/configs.h	/^#define __IPROC_COMMON_CONFIGS_H$/;"	d
__IPU_PIXFMT_H__	include/ipu_pixfmt.h	/^#define __IPU_PIXFMT_H__$/;"	d
__IPU_REGS_INCLUDED__	drivers/video/ipu_regs.h	/^#define __IPU_REGS_INCLUDED__$/;"	d
__I_LOCK	fs/ubifs/ubifs.h	/^#define __I_LOCK	/;"	d
__I_SYNC	fs/ubifs/ubifs.h	/^#define __I_SYNC	/;"	d
__JOBDESC_H	drivers/crypto/fsl/jobdesc.h	/^#define __JOBDESC_H$/;"	d
__JR_H	drivers/crypto/fsl/jr.h	/^#define __JR_H$/;"	d
__KEYBOARD_H	include/keyboard.h	/^#define __KEYBOARD_H$/;"	d
__KEYMILE_COMMON_H	board/keymile/common/common.h	/^#define __KEYMILE_COMMON_H$/;"	d
__KGDB_H__	include/kgdb.h	/^#define __KGDB_H__$/;"	d
__KIRKWOOD_GPIO_H	arch/arm/mach-kirkwood/include/mach/gpio.h	/^#define __KIRKWOOD_GPIO_H$/;"	d
__KIRKWOOD_MPP_H	arch/arm/mach-kirkwood/include/mach/mpp.h	/^#define __KIRKWOOD_MPP_H$/;"	d
__KOELSCH_H	include/configs/koelsch.h	/^#define __KOELSCH_H$/;"	d
__KONA_COMMON_CLK_H	arch/arm/include/asm/kona-common/clk.h	/^#define __KONA_COMMON_CLK_H$/;"	d
__KONA_SDHCI_H	arch/arm/include/asm/kona-common/kona_sdhci.h	/^#define __KONA_SDHCI_H$/;"	d
__KW_SPI_H__	arch/arm/include/asm/arch-mvebu/spi.h	/^#define __KW_SPI_H__$/;"	d
__KZM9G_H	include/configs/kzm9g.h	/^#define __KZM9G_H$/;"	d
__LAGER_H	include/configs/lager.h	/^#define __LAGER_H$/;"	d
__LCDC_H__	arch/m68k/include/asm/coldfire/lcd.h	/^#define __LCDC_H__$/;"	d
__LCDVIDEO_H__	include/lcdvideo.h	/^#define __LCDVIDEO_H__$/;"	d
__LD9040_H_	include/ld9040.h	/^#define __LD9040_H_$/;"	d
__LDPAA_ETH_H	drivers/net/ldpaa_eth/ldpaa_eth.h	/^#define __LDPAA_ETH_H$/;"	d
__LDPAA_WRIOP_H	include/fsl-mc/ldpaa_wriop.h	/^#define __LDPAA_WRIOP_H$/;"	d
__LED_H	include/led.h	/^#define __LED_H$/;"	d
__LEON2_H__	arch/sparc/include/asm/leon2.h	/^#define __LEON2_H__$/;"	d
__LEON3_H__	arch/sparc/include/asm/leon3.h	/^#define __LEON3_H__$/;"	d
__LIBATA_H__	include/libata.h	/^#define __LIBATA_H__$/;"	d
__LINKER_LISTS_H__	include/linker_lists.h	/^#define __LINKER_LISTS_H__$/;"	d
__LINK_LOCAL_H__	net/link_local.h	/^#define __LINK_LOCAL_H__$/;"	d
__LINUX_COMPAT_H__	drivers/usb/musb-new/linux-compat.h	/^#define __LINUX_COMPAT_H__$/;"	d
__LINUX_COMPILER_H	include/linux/compiler.h	/^#define __LINUX_COMPILER_H$/;"	d
__LINUX_JFFS2_H__	include/jffs2/jffs2.h	/^#define __LINUX_JFFS2_H__$/;"	d
__LINUX_KBUILD_H	include/linux/kbuild.h	/^#define __LINUX_KBUILD_H$/;"	d
__LINUX_KCONFIG_H	include/linux/kconfig.h	/^#define __LINUX_KCONFIG_H$/;"	d
__LINUX_MBUS_H	include/linux/mbus.h	/^#define __LINUX_MBUS_H$/;"	d
__LINUX_MDIO_H__	include/linux/mdio.h	/^#define __LINUX_MDIO_H__$/;"	d
__LINUX_MII_H__	include/linux/mii.h	/^#define __LINUX_MII_H__$/;"	d
__LINUX_MTD_BBM_H	include/linux/mtd/bbm.h	/^#define __LINUX_MTD_BBM_H$/;"	d
__LINUX_MTD_NAND_FSL_UPM	include/linux/mtd/fsl_upm.h	/^#define __LINUX_MTD_NAND_FSL_UPM$/;"	d
__LINUX_MTD_NAND_H	include/linux/mtd/nand.h	/^#define __LINUX_MTD_NAND_H$/;"	d
__LINUX_MTD_NDFC_H	include/linux/mtd/ndfc.h	/^#define __LINUX_MTD_NDFC_H$/;"	d
__LINUX_MTD_ONENAND_H	include/linux/mtd/onenand.h	/^#define __LINUX_MTD_ONENAND_H$/;"	d
__LINUX_PS2MULT_H	include/ps2mult.h	/^#define __LINUX_PS2MULT_H$/;"	d
__LINUX_SIZES_H__	include/linux/sizes.h	/^#define __LINUX_SIZES_H__$/;"	d
__LINUX_STRINGIFY_H	include/linux/stringify.h	/^#define __LINUX_STRINGIFY_H$/;"	d
__LINUX_UBI_H__	include/linux/mtd/ubi.h	/^#define __LINUX_UBI_H__$/;"	d
__LINUX_USB_AT91_UDC_H__	include/linux/usb/at91_udc.h	/^#define __LINUX_USB_AT91_UDC_H__$/;"	d
__LINUX_USB_CH9_H	include/linux/usb/ch9.h	/^#define __LINUX_USB_CH9_H$/;"	d
__LINUX_USB_COMPOSITE_H	include/linux/usb/composite.h	/^#define	__LINUX_USB_COMPOSITE_H$/;"	d
__LINUX_USB_GADGET_H	include/linux/usb/gadget.h	/^#define __LINUX_USB_GADGET_H$/;"	d
__LINUX_USB_GADGET_PXA25X_H	drivers/usb/gadget/pxa25x_udc.h	/^#define __LINUX_USB_GADGET_PXA25X_H$/;"	d
__LINUX_USB_GADGET_USBA_UDC_H__	drivers/usb/gadget/atmel_usba_udc.h	/^#define __LINUX_USB_GADGET_USBA_UDC_H__$/;"	d
__LINUX_USB_MUSB_H	include/linux/usb/musb.h	/^#define __LINUX_USB_MUSB_H$/;"	d
__LINUX_USB_OTG_H	include/linux/usb/otg.h	/^#define __LINUX_USB_OTG_H$/;"	d
__LINUX_USB_USBA_H__	include/linux/usb/atmel_usba_udc.h	/^#define __LINUX_USB_USBA_H__$/;"	d
__LIN_COMPAT_H__	include/usb/lin_gadget_compat.h	/^#define __LIN_COMPAT_H__$/;"	d
__LITTLE_ENDIAN	include/configs/espt.h	/^#define __LITTLE_ENDIAN	/;"	d
__LITTLE_ENDIAN	include/configs/sh7763rdp.h	/^#define __LITTLE_ENDIAN	/;"	d
__LITTLE_ENDIAN	include/linux/byteorder/little_endian.h	/^#define __LITTLE_ENDIAN /;"	d
__LITTLE_ENDIAN_BITFIELD	include/linux/byteorder/little_endian.h	/^#define __LITTLE_ENDIAN_BITFIELD$/;"	d
__LITTLE_ENDIAN__	include/configs/ms7750se.h	/^#define __LITTLE_ENDIAN__	/;"	d
__LITTLE_ENDIAN__	include/configs/r2dplus.h	/^#define __LITTLE_ENDIAN__	/;"	d
__LITTLE_ENDIAN__	include/configs/r7780mp.h	/^#define __LITTLE_ENDIAN__ /;"	d
__LS1012AQDS_H__	include/configs/ls1012aqds.h	/^#define __LS1012AQDS_H__$/;"	d
__LS1012ARDB_H__	include/configs/ls1012afrdm.h	/^#define __LS1012ARDB_H__$/;"	d
__LS1012ARDB_H__	include/configs/ls1012ardb.h	/^#define __LS1012ARDB_H__$/;"	d
__LS1012A_COMMON_H	include/configs/ls1012a_common.h	/^#define __LS1012A_COMMON_H$/;"	d
__LS1021AQDS_QIXIS_H__	board/freescale/ls1021aqds/ls1021aqds_qixis.h	/^#define __LS1021AQDS_QIXIS_H__$/;"	d
__LS1043AQDS_H__	include/configs/ls1043aqds.h	/^#define __LS1043AQDS_H__$/;"	d
__LS1043AQDS_QIXIS_H__	board/freescale/ls1012aqds/ls1012aqds_qixis.h	/^#define __LS1043AQDS_QIXIS_H__$/;"	d
__LS1043AQDS_QIXIS_H__	board/freescale/ls1043aqds/ls1043aqds_qixis.h	/^#define __LS1043AQDS_QIXIS_H__$/;"	d
__LS1043ARDB_H__	include/configs/ls1043ardb.h	/^#define __LS1043ARDB_H__$/;"	d
__LS1043A_COMMON_H	include/configs/ls1043a_common.h	/^#define __LS1043A_COMMON_H$/;"	d
__LS1046AQDS_H__	include/configs/ls1046aqds.h	/^#define __LS1046AQDS_H__$/;"	d
__LS1046AQDS_QIXIS_H__	board/freescale/ls1046aqds/ls1046aqds_qixis.h	/^#define __LS1046AQDS_QIXIS_H__$/;"	d
__LS1046ARDB_H__	include/configs/ls1046ardb.h	/^#define __LS1046ARDB_H__$/;"	d
__LS1046A_COMMON_H	include/configs/ls1046a_common.h	/^#define __LS1046A_COMMON_H$/;"	d
__LS2_COMMON_H	include/configs/ls2080a_common.h	/^#define __LS2_COMMON_H$/;"	d
__LS2_EMU_H	include/configs/ls2080a_emu.h	/^#define __LS2_EMU_H$/;"	d
__LS2_QDS_H	include/configs/ls2080aqds.h	/^#define __LS2_QDS_H$/;"	d
__LS2_QDS_QIXIS_H__	board/freescale/ls2080aqds/ls2080aqds_qixis.h	/^#define __LS2_QDS_QIXIS_H__$/;"	d
__LS2_RDB_H	include/configs/ls2080ardb.h	/^#define __LS2_RDB_H$/;"	d
__LS2_RDB_QIXIS_H__	board/freescale/ls2080ardb/ls2080ardb_qixis.h	/^#define __LS2_RDB_QIXIS_H__$/;"	d
__LS2_SIMU_H	include/configs/ls2080a_simu.h	/^#define __LS2_SIMU_H$/;"	d
__LSXL_H	board/buffalo/lsxl/lsxl.h	/^#define __LSXL_H$/;"	d
__LTC3676_PMIC_H_	include/power/ltc3676_pmic.h	/^#define __LTC3676_PMIC_H_$/;"	d
__LXT971A_H__	include/lxt971a.h	/^#define __LXT971A_H__$/;"	d
__LYNXKDI_H__	include/lynxkdi.h	/^#define __LYNXKDI_H__$/;"	d
__LZMADEC_H__FAKE__	include/lzma/LzmaDec.h	/^#define __LZMADEC_H__FAKE__$/;"	d
__LZMATOOLS_H__FAKE__	include/lzma/LzmaTools.h	/^#define __LZMATOOLS_H__FAKE__$/;"	d
__LZMA_DEC_H	lib/lzma/LzmaDec.h	/^#define __LZMA_DEC_H$/;"	d
__LZMA_TOOL_H__	lib/lzma/LzmaTools.h	/^#define __LZMA_TOOL_H__$/;"	d
__LZO_H__	include/linux/lzo.h	/^#define __LZO_H__$/;"	d
__M28_INIT_H__	arch/arm/cpu/arm926ejs/mxs/mxs_init.h	/^#define	__M28_INIT_H__$/;"	d
__M520X__	arch/m68k/include/asm/m520x.h	/^#define __M520X__$/;"	d
__M5275_H__	arch/m68k/include/asm/m5275.h	/^#define	__M5275_H__$/;"	d
__M53EVK_CONFIG_H__	include/configs/m53evk.h	/^#define __M53EVK_CONFIG_H__$/;"	d
__MA5D4EVK_CONFIG_H__	include/configs/ma5d4evk.h	/^#define __MA5D4EVK_CONFIG_H__$/;"	d
__MACH_CDEF_BLACKFIN__	arch/blackfin/include/asm/blackfin_cdef.h	/^#define __MACH_CDEF_BLACKFIN__$/;"	d
__MACH_DEF_BLACKFIN__	arch/blackfin/include/asm/blackfin_def.h	/^#define __MACH_DEF_BLACKFIN__$/;"	d
__MACH_GLOB_BLACKFIN__	arch/blackfin/include/asm/blackfin.h	/^#define __MACH_GLOB_BLACKFIN__$/;"	d
__MACH_INIT_H	arch/arm/mach-uniphier/init.h	/^#define __MACH_INIT_H$/;"	d
__MACH_IOMUX_MX23_H__	arch/arm/include/asm/arch-mxs/iomux-mx23.h	/^#define __MACH_IOMUX_MX23_H__$/;"	d
__MACH_IOMUX_MX28_H__	arch/arm/include/asm/arch-mxs/iomux-mx28.h	/^#define __MACH_IOMUX_MX28_H__$/;"	d
__MACH_IOMUX_V3_H__	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define __MACH_IOMUX_V3_H__$/;"	d
__MACH_MVEBU_GPIO_H	arch/arm/mach-mvebu/include/mach/gpio.h	/^#define __MACH_MVEBU_GPIO_H$/;"	d
__MACH_MXS_IOMUX_H__	arch/arm/include/asm/arch-mxs/iomux.h	/^#define __MACH_MXS_IOMUX_H__$/;"	d
__MACH_SOC_INFO_H__	arch/arm/mach-uniphier/soc-info.h	/^#define __MACH_SOC_INFO_H__$/;"	d
__MACRO_H__	arch/sh/include/asm/macro.h	/^#define __MACRO_H__$/;"	d
__MALLOC_H__	include/malloc.h	/^#define __MALLOC_H__$/;"	d
__MANROLAND_COMMON_H	include/configs/manroland/common.h	/^#define __MANROLAND_COMMON_H$/;"	d
__MANROLAND_MPC52XX__COMMON_H	include/configs/manroland/mpc5200-common.h	/^#define __MANROLAND_MPC52XX__COMMON_H$/;"	d
__MAPMEM_H	include/mapmem.h	/^#define __MAPMEM_H$/;"	d
__MAX17042_FG_H_	include/power/max17042_fg.h	/^#define __MAX17042_FG_H_$/;"	d
__MAX77686_H_	include/power/max77686_pmic.h	/^#define __MAX77686_H_$/;"	d
__MAX77693_FG_H_	include/power/max77693_fg.h	/^#define __MAX77693_FG_H_$/;"	d
__MAX77693_MUIC_H_	include/power/max77693_muic.h	/^#define __MAX77693_MUIC_H_$/;"	d
__MAX77693_PMIC_H_	include/power/max77693_pmic.h	/^#define __MAX77693_PMIC_H_$/;"	d
__MAX77696_PMIC_H__	include/power/max77696_pmic.h	/^#define __MAX77696_PMIC_H__$/;"	d
__MAX8997_MUIC_H_	include/power/max8997_muic.h	/^#define __MAX8997_MUIC_H_$/;"	d
__MAX8997_PMIC_H_	include/power/max8997_pmic.h	/^#define __MAX8997_PMIC_H_$/;"	d
__MAX8998_PMIC_H_	include/power/max8998_pmic.h	/^#define __MAX8998_PMIC_H_$/;"	d
__MC13783_H__	include/mc13783.h	/^#define __MC13783_H__$/;"	d
__MC13892_H__	include/mc13892.h	/^#define __MC13892_H__$/;"	d
__MC34704_H__	include/mc34704.h	/^#define __MC34704_H__$/;"	d
__MCF5227X__	arch/m68k/include/asm/m5227x.h	/^#define __MCF5227X__$/;"	d
__MCF5441X__	arch/m68k/include/asm/m5441x.h	/^#define __MCF5441X__$/;"	d
__MCF5445X__	arch/m68k/include/asm/m5445x.h	/^#define __MCF5445X__$/;"	d
__MCFRTC_H__	arch/m68k/include/asm/rtc.h	/^#define __MCFRTC_H__$/;"	d
__MDHA_H__	arch/m68k/include/asm/coldfire/mdha.h	/^#define __MDHA_H__$/;"	d
__MEMAC_H__	include/fsl_memac.h	/^#define __MEMAC_H__$/;"	d
__MEMCFG_H__	arch/sparc/cpu/leon3/memcfg.h	/^#define __MEMCFG_H__$/;"	d
__MENU_H__	include/menu.h	/^#define __MENU_H__$/;"	d
__MESON_GXBB_COMMON_CONFIG_H	include/configs/meson-gxbb-common.h	/^#define __MESON_GXBB_COMMON_CONFIG_H$/;"	d
__MESON_SM_H__	arch/arm/include/asm/arch-meson/sm.h	/^#define __MESON_SM_H__$/;"	d
__MICROBLAZE_BYTEORDER_H__	arch/microblaze/include/asm/byteorder.h	/^#define __MICROBLAZE_BYTEORDER_H__$/;"	d
__MICROBLAZE_CACHE_H__	arch/microblaze/include/asm/cache.h	/^#define __MICROBLAZE_CACHE_H__$/;"	d
__MICROBLAZE_IO_H__	arch/microblaze/include/asm/io.h	/^#define __MICROBLAZE_IO_H__$/;"	d
__MICROBLAZE_POSIX_TYPES_H__	arch/microblaze/include/asm/posix_types.h	/^#define __MICROBLAZE_POSIX_TYPES_H__$/;"	d
__MICROBLAZE_PTRACE_H__	arch/microblaze/include/asm/ptrace.h	/^#define __MICROBLAZE_PTRACE_H__$/;"	d
__MICROBLAZE_STRING_H__	arch/microblaze/include/asm/string.h	/^#define __MICROBLAZE_STRING_H__$/;"	d
__MICROBLAZE_SYSTEM_H__	arch/microblaze/include/asm/system.h	/^#define __MICROBLAZE_SYSTEM_H__$/;"	d
__MICROCHIP_DDR2_REGS_H	drivers/ddr/microchip/ddr2_regs.h	/^#define __MICROCHIP_DDR2_REGS_H$/;"	d
__MICROCHIP_DDR2_TIMING_H	drivers/ddr/microchip/ddr2_timing.h	/^#define __MICROCHIP_DDR2_TIMING_H$/;"	d
__MICROCHIP_PIC32_DDR_H	arch/mips/mach-pic32/include/mach/ddr.h	/^#define __MICROCHIP_PIC32_DDR_H$/;"	d
__MICROCHIP_PIC32_ETH_H_	drivers/net/pic32_eth.h	/^#define __MICROCHIP_PIC32_ETH_H_$/;"	d
__MIGO_R_H	include/configs/MigoR.h	/^#define __MIGO_R_H$/;"	d
__MIPS_ASM_CM_H__	arch/mips/include/asm/cm.h	/^#define __MIPS_ASM_CM_H__$/;"	d
__MIPS_CACHE_H__	arch/mips/include/asm/cache.h	/^#define __MIPS_CACHE_H__$/;"	d
__MISC_H	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^#define __MISC_H$/;"	d
__MPC5121_COMMON_H	include/configs/mpc5121-common.h	/^#define __MPC5121_COMMON_H$/;"	d
__MPC512X_FEC_H	drivers/net/mpc512x_fec.h	/^#define __MPC512X_FEC_H$/;"	d
__MPC5XXX_FEC_H	drivers/net/mpc5xxx_fec.h	/^#define __MPC5XXX_FEC_H$/;"	d
__MPC5XXX_SDMA_H	include/mpc5xxx_sdma.h	/^#define __MPC5XXX_SDMA_H$/;"	d
__MPC5XX_H__	include/mpc5xx.h	/^#define __MPC5XX_H__$/;"	d
__MPC8260_H__	include/mpc8260.h	/^#define __MPC8260_H__$/;"	d
__MPC8308_H_	board/gdsys/mpc8308/mpc8308.h	/^#define __MPC8308_H_$/;"	d
__MPC83XX_H__	include/mpc83xx.h	/^#define __MPC83XX_H__$/;"	d
__MPC85XX_MP_H_	arch/powerpc/cpu/mpc85xx/mp.h	/^#define __MPC85XX_MP_H_$/;"	d
__MPC85xx_H__	include/mpc85xx.h	/^#define __MPC85xx_H__$/;"	d
__MPC86xx_H__	include/mpc86xx.h	/^#define __MPC86xx_H__$/;"	d
__MPCXX_H__	include/mpc8xx.h	/^#define __MPCXX_H__$/;"	d
__MPR2_H	include/configs/mpr2.h	/^#define __MPR2_H$/;"	d
__MS7720SE_H	include/configs/ms7720se.h	/^#define __MS7720SE_H$/;"	d
__MS7722SE_H	include/configs/ms7722se.h	/^#define __MS7722SE_H$/;"	d
__MS7750SE_H	include/configs/ms7750se.h	/^#define __MS7750SE_H$/;"	d
__MSC01_H__	include/msc01.h	/^#define __MSC01_H__$/;"	d
__MTD_ABI_H__	include/mtd/mtd-abi.h	/^#define __MTD_ABI_H__$/;"	d
__MTD_DOC2000_H__	include/linux/mtd/doc2000.h	/^#define __MTD_DOC2000_H__$/;"	d
__MTD_FLASHCHIP_H__	include/linux/mtd/flashchip.h	/^#define __MTD_FLASHCHIP_H__$/;"	d
__MTD_MTD_H__	include/linux/mtd/mtd.h	/^#define __MTD_MTD_H__$/;"	d
__MTD_NAND_BCH_H__	include/linux/mtd/nand_bch.h	/^#define __MTD_NAND_BCH_H__$/;"	d
__MTD_NAND_ECC_H__	include/linux/mtd/nand_ecc.h	/^#define __MTD_NAND_ECC_H__$/;"	d
__MUSB_CORE_H__	drivers/usb/musb-new/musb_core.h	/^#define __MUSB_CORE_H__$/;"	d
__MUSB_DMA_H__	drivers/usb/musb-new/musb_dma.h	/^#define __MUSB_DMA_H__$/;"	d
__MUSB_GADGET_H	drivers/usb/musb-new/musb_gadget.h	/^#define __MUSB_GADGET_H$/;"	d
__MUSB_HCD_H__	drivers/usb/musb/musb_hcd.h	/^#define __MUSB_HCD_H__$/;"	d
__MUSB_HDRC_DEFS_H__	drivers/usb/musb/musb_core.h	/^#define __MUSB_HDRC_DEFS_H__$/;"	d
__MUSB_LINUX_DEBUG_H__	drivers/usb/musb-new/musb_debug.h	/^#define __MUSB_LINUX_DEBUG_H__$/;"	d
__MUSB_LINUX_PLATFORM_ARCH_H__	drivers/usb/musb-new/musb_io.h	/^#define __MUSB_LINUX_PLATFORM_ARCH_H__$/;"	d
__MUSB_OMAP243X_H__	drivers/usb/musb-new/omap2430.h	/^#define __MUSB_OMAP243X_H__$/;"	d
__MUSB_REGS_H__	drivers/usb/musb-new/musb_regs.h	/^#define __MUSB_REGS_H__$/;"	d
__MUSB_UBOOT_H__	drivers/usb/musb-new/musb_uboot.h	/^#define __MUSB_UBOOT_H__$/;"	d
__MV886352_H	include/mv88e6352.h	/^#define __MV886352_H$/;"	d
__MVEBU_MMC_H__	include/mvebu_mmc.h	/^#define __MVEBU_MMC_H__$/;"	d
__MVGBE_H__	drivers/net/mvgbe.h	/^#define __MVGBE_H__$/;"	d
__MVGPIO_H__	drivers/gpio/mvgpio.h	/^#define __MVGPIO_H__$/;"	d
__MVMFP_H	include/mvmfp.h	/^#define __MVMFP_H$/;"	d
__MX23_REGS_CLKCTRL_H__	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^#define __MX23_REGS_CLKCTRL_H__$/;"	d
__MX23_REGS_POWER_H__	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^#define __MX23_REGS_POWER_H__$/;"	d
__MX27_REGS_RTC_H__	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^#define __MX27_REGS_RTC_H__$/;"	d
__MX28_GPIO_H__	arch/arm/include/asm/arch-mxs/gpio.h	/^#define	__MX28_GPIO_H__$/;"	d
__MX28_REGS_BCH_H__	arch/arm/include/asm/imx-common/regs-bch.h	/^#define __MX28_REGS_BCH_H__$/;"	d
__MX28_REGS_CLKCTRL_H__	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^#define __MX28_REGS_CLKCTRL_H__$/;"	d
__MX28_REGS_DIGCTL_H__	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^#define __MX28_REGS_DIGCTL_H__$/;"	d
__MX28_REGS_GPMI_H__	arch/arm/include/asm/imx-common/regs-gpmi.h	/^#define __MX28_REGS_GPMI_H__$/;"	d
__MX28_REGS_I2C_H__	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^#define __MX28_REGS_I2C_H__$/;"	d
__MX28_REGS_LRADC_H__	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^#define __MX28_REGS_LRADC_H__$/;"	d
__MX28_REGS_OCOTP_H__	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^#define __MX28_REGS_OCOTP_H__$/;"	d
__MX28_REGS_PINCTRL_H__	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^#define __MX28_REGS_PINCTRL_H__$/;"	d
__MX28_REGS_POWER_H__	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^#define __MX28_REGS_POWER_H__$/;"	d
__MX28_REGS_RTC_H__	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^#define __MX28_REGS_RTC_H__$/;"	d
__MX28_REGS_SSP_H__	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^#define __MX28_REGS_SSP_H__$/;"	d
__MX28_REGS_TIMROT_H__	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^#define __MX28_REGS_TIMROT_H__$/;"	d
__MX5_VIDEO_H	arch/arm/include/asm/imx-common/mx5_video.h	/^#define __MX5_VIDEO_H$/;"	d
__MX6CUBOXI_CONFIG_H	include/configs/mx6cuboxi.h	/^#define __MX6CUBOXI_CONFIG_H$/;"	d
__MX6QSABREAUTO_CONFIG_H	include/configs/mx6qsabreauto.h	/^#define __MX6QSABREAUTO_CONFIG_H$/;"	d
__MX6QSABRESD_CONFIG_H	include/configs/mx6sabresd.h	/^#define __MX6QSABRESD_CONFIG_H$/;"	d
__MX6QSABRE_COMMON_CONFIG_H	include/configs/mx6sabre_common.h	/^#define __MX6QSABRE_COMMON_CONFIG_H$/;"	d
__MX6SX_RDC_H__	arch/arm/include/asm/arch-mx6/mx6sx_rdc.h	/^#define __MX6SX_RDC_H__$/;"	d
__MX6ULLEVK_CONFIG_H	include/configs/mx6ullevk.h	/^#define __MX6ULLEVK_CONFIG_H$/;"	d
__MX6UL_14X14_EVK_CONFIG_H	include/configs/mx6ul_14x14_evk.h	/^#define __MX6UL_14X14_EVK_CONFIG_H$/;"	d
__MX6_COMMON_H	include/configs/mx6_common.h	/^#define __MX6_COMMON_H$/;"	d
__MX7D_RDC_H__	arch/arm/include/asm/arch-mx7/mx7d_rdc.h	/^#define __MX7D_RDC_H__$/;"	d
__MX7D_SABRESD_CONFIG_H	include/configs/mx7dsabresd.h	/^#define __MX7D_SABRESD_CONFIG_H$/;"	d
__MX7_COMMON_H	include/configs/mx7_common.h	/^#define __MX7_COMMON_H$/;"	d
__MXC_HDMI_H__	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^#define __MXC_HDMI_H__$/;"	d
__MXC_NAND_H	drivers/mtd/nand/mxc_nand.h	/^#define __MXC_NAND_H$/;"	d
__MXC_SPI_H_	arch/arm/include/asm/imx-common/spi.h	/^#define __MXC_SPI_H_$/;"	d
__MXSSB_H__	tools/mxsimage.h	/^#define __MXSSB_H__$/;"	d
__MXS_REGS_BASE_H__	arch/arm/include/asm/arch-mxs/regs-base.h	/^#define __MXS_REGS_BASE_H__$/;"	d
__MXS_REGS_COMMON_H__	arch/arm/include/asm/imx-common/regs-common.h	/^#define __MXS_REGS_COMMON_H__$/;"	d
__MXS_SYS_PROTO_H__	arch/arm/include/asm/arch-mxs/sys_proto.h	/^#define __MXS_SYS_PROTO_H__$/;"	d
__MY_PCMCIA_GCRX_CXOE	include/pcmcia.h	/^#define __MY_PCMCIA_GCRX_CXOE	/;"	d
__MY_PCMCIA_GCRX_CXRESET	include/pcmcia.h	/^#define __MY_PCMCIA_GCRX_CXRESET	/;"	d
__NAMEVAL_H__	fs/yaffs2/yaffs_nameval.h	/^#define __NAMEVAL_H__$/;"	d
__NAND_RST_CMD	include/configs/p1_p2_rdb_pc.h	/^#define __NAND_RST_CMD	/;"	d
__NA_	arch/arm/include/asm/imx-common/iomux-v3.h	/^#define __NA_	/;"	d
__NDW	arch/arc/lib/libgcc2.h	/^#define __NDW(/;"	d
__NE2000_BASE_H__	drivers/net/ne2000_base.h	/^#define __NE2000_BASE_H__$/;"	d
__NET_H__	include/net.h	/^#define __NET_H__$/;"	d
__NET_RAND_H__	net/net_rand.h	/^#define __NET_RAND_H__$/;"	d
__NFDBITS	include/linux/posix_types.h	/^#define __NFDBITS	/;"	d
__NFS_H__	net/nfs.h	/^#define __NFS_H__$/;"	d
__NOR_RST_CMD	include/configs/p1_p2_rdb_pc.h	/^#define __NOR_RST_CMD	/;"	d
__NSA310S_H	board/zyxel/nsa310s/nsa310s.h	/^#define __NSA310S_H$/;"	d
__NW	arch/arc/lib/libgcc2.h	/^#define __NW(/;"	d
__O2D_CONFIG_H	include/configs/o2dnt-common.h	/^#define __O2D_CONFIG_H$/;"	d
__ODROIDU3_SETUP__	board/samsung/odroid/setup.h	/^#define __ODROIDU3_SETUP__$/;"	d
__OMAP3EVM_CONFIG_H	include/configs/omap3_evm.h	/^#define __OMAP3EVM_CONFIG_H$/;"	d
__OMAP3_CAIRO_CONFIG_H	include/configs/omap3_cairo.h	/^#define __OMAP3_CAIRO_CONFIG_H$/;"	d
__OMAP_HARDWARE_H	arch/arm/include/asm/arch-omap4/hardware.h	/^#define __OMAP_HARDWARE_H$/;"	d
__OMAP_HARDWARE_H	arch/arm/include/asm/arch-omap5/hardware.h	/^#define __OMAP_HARDWARE_H$/;"	d
__OMAP_PIPE3_PHY_H	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^#define __OMAP_PIPE3_PHY_H$/;"	d
__ONENAND_REG_H	include/linux/mtd/onenand_regs.h	/^#define __ONENAND_REG_H$/;"	d
__OPENRD_BASE_H	board/Marvell/openrd/openrd.h	/^#define __OPENRD_BASE_H$/;"	d
__OS_H__	include/os.h	/^#define __OS_H__$/;"	d
__OS_SUPPORT_H_	tools/os_support.h	/^#define __OS_SUPPORT_H_$/;"	d
__OUT	arch/x86/include/asm/io.h	/^#define __OUT(/;"	d
__OUT1	arch/x86/include/asm/io.h	/^#define __OUT1(/;"	d
__OUT2	arch/x86/include/asm/io.h	/^#define __OUT2(/;"	d
__OUTPLL	drivers/video/ati_radeon_fb.h	/^static inline void __OUTPLL(struct radeonfb_info *rinfo, unsigned int index,$/;"	f	typeref:typename:void
__OUTPLLP	drivers/video/ati_radeon_fb.h	/^static inline void __OUTPLLP(struct radeonfb_info *rinfo, unsigned int index,$/;"	f	typeref:typename:void
__OUTS	arch/x86/include/asm/io.h	/^#define __OUTS(/;"	d
__P	include/bedbug/bedbug.h	/^#define __P(/;"	d
__P2WI_CC_CLK	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_CC_CLK(/;"	d
__P2WI_CC_CLK	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_CC_CLK(/;"	d
__P2WI_CC_CLK_DIV	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_CC_CLK_DIV(/;"	d
__P2WI_CC_CLK_DIV	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_CC_CLK_DIV(/;"	d
__P2WI_DATA_NUM_BYTES	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_DATA_NUM_BYTES(/;"	d
__P2WI_DATA_NUM_BYTES	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_DATA_NUM_BYTES(/;"	d
__P2WI_STAT_TRANS_ERR	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR(/;"	d
__P2WI_STAT_TRANS_ERR	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR(/;"	d
__P2WI_STAT_TRANS_ERR_BYTE_1	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_1 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_1	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_1 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_2	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_2 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_2	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_2 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_3	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_3 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_3	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_3 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_4	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_4 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_4	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_4 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_5	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_5 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_5	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_5 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_6	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_6 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_6	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_6 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_7	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_7 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_7	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_7 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_8	arch/arm/include/asm/arch-sunxi/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_8 /;"	d
__P2WI_STAT_TRANS_ERR_BYTE_8	arch/arm/include/asm/arch/p2wi.h	/^#define __P2WI_STAT_TRANS_ERR_BYTE_8 /;"	d
__PAMU_H	arch/powerpc/include/asm/fsl_pamu.h	/^#define __PAMU_H$/;"	d
__PASTE	include/linux/compiler.h	/^#define __PASTE(/;"	d
__PASTE_UART	arch/blackfin/include/asm/serial.h	/^#define __PASTE_UART(/;"	d
__PATI_H_	board/mpl/pati/pati.h	/^#define __PATI_H_	/;"	d
__PCA953X_H_	include/pca953x.h	/^#define __PCA953X_H_$/;"	d
__PCA9698_H_	include/pca9698.h	/^#define __PCA9698_H_$/;"	d
__PCIE_RST_CMD	include/configs/p1_p2_rdb_pc.h	/^#define __PCIE_RST_CMD	/;"	d
__PCI_EEPROM_H_	board/mpl/pati/pci_eeprom.h	/^#define __PCI_EEPROM_H_	/;"	d
__PCI_MSC01_H__	include/pci_msc01.h	/^#define __PCI_MSC01_H__$/;"	d
__PCM058_CONFIG_H	include/configs/pcm058.h	/^#define __PCM058_CONFIG_H$/;"	d
__PFC_R8A7790_H__	arch/arm/mach-rmobile/pfc-r8a7790.h	/^#define __PFC_R8A7790_H__$/;"	d
__PFUZE100_PMIC_H_	include/power/pfuze100_pmic.h	/^#define __PFUZE100_PMIC_H_$/;"	d
__PFUZE3000_PMIC_H_	include/power/pfuze3000_pmic.h	/^#define __PFUZE3000_PMIC_H_$/;"	d
__PFUZE_BOARD_HELPER__	board/freescale/common/pfuze.h	/^#define __PFUZE_BOARD_HELPER__$/;"	d
__PIC32MZDASK_CONFIG_H	include/configs/pic32mzdask.h	/^#define __PIC32MZDASK_CONFIG_H$/;"	d
__PIC32_REGS_H__	arch/mips/mach-pic32/include/mach/pic32.h	/^#define __PIC32_REGS_H__$/;"	d
__PICO_IMX6UL_CONFIG_H	include/configs/pico-imx6ul.h	/^#define __PICO_IMX6UL_CONFIG_H$/;"	d
__PINCTRL_EXYNOS__H_	drivers/pinctrl/exynos/pinctrl-exynos.h	/^#define __PINCTRL_EXYNOS__H_$/;"	d
__PINCTRL_H	include/dm/pinctrl.h	/^#define __PINCTRL_H$/;"	d
__PINCTRL_MESON_H__	drivers/pinctrl/meson/pinctrl-meson.h	/^#define __PINCTRL_MESON_H__$/;"	d
__PINCTRL_UNIPHIER_H__	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define __PINCTRL_UNIPHIER_H__$/;"	d
__PING_H__	net/ping.h	/^#define __PING_H__$/;"	d
__PIXIS_H_	board/freescale/common/pixis.h	/^#define __PIXIS_H_	/;"	d
__PLATINUM_CONFIG_H__	include/configs/platinum.h	/^#define __PLATINUM_CONFIG_H__$/;"	d
__PLATINUM_PICON_CONFIG_H__	include/configs/platinum_picon.h	/^#define __PLATINUM_PICON_CONFIG_H__$/;"	d
__PLATINUM_TITANIUM_CONFIG_H__	include/configs/platinum_titanium.h	/^#define __PLATINUM_TITANIUM_CONFIG_H__$/;"	d
__PLX9056_H_	board/mpl/pati/plx9056.h	/^#define __PLX9056_H_	/;"	d
__PMC440_H__	board/esd/pmc440/pmc440.h	/^#define __PMC440_H__$/;"	d
__POGO_E02_H	board/cloudengines/pogo_e02/pogo_e02.h	/^#define __POGO_E02_H$/;"	d
__PORTER_H	include/configs/porter.h	/^#define __PORTER_H$/;"	d
__POWER_AS3722_H__	include/power/as3722.h	/^#define __POWER_AS3722_H__$/;"	d
__POWER_BATTERY_H_	include/power/battery.h	/^#define __POWER_BATTERY_H_$/;"	d
__POWER_CHARGER_H_	include/power/power_chrg.h	/^#define __POWER_CHARGER_H_$/;"	d
__POWER_TPS62362_H__	include/power/tps62362.h	/^#define __POWER_TPS62362_H__$/;"	d
__POWER_TPS65217_H__	include/power/tps65217.h	/^#define __POWER_TPS65217_H__$/;"	d
__POWER_TPS65218_H__	include/power/tps65218.h	/^#define __POWER_TPS65218_H__$/;"	d
__POWER_TPS65910_H__	include/power/tps65910.h	/^#define __POWER_TPS65910_H__$/;"	d
__PPC405_H__	arch/powerpc/include/asm/ppc405.h	/^#define __PPC405_H__$/;"	d
__PPC440_H__	arch/powerpc/include/asm/ppc440.h	/^#define __PPC440_H__$/;"	d
__PPC4XX_H__	arch/powerpc/include/asm/ppc4xx.h	/^#define __PPC4XX_H__$/;"	d
__PPC4xx_CONFIG_H	arch/powerpc/include/asm/ppc4xx_config.h	/^#define __PPC4xx_CONFIG_H$/;"	d
__PPCENV__	common/env_embedded.c	/^#  define __PPCENV__	/;"	d	file:
__PPCENV__	common/env_embedded.c	/^env_t redundand_environment __PPCENV__ = {$/;"	v	typeref:typename:env_t redundand_environment
__PPCENV__	include/env_default.h	/^env_t environment __PPCENV__ = {$/;"	v	typeref:typename:env_t environment
__PPCTEXT__	common/env_embedded.c	/^#  define __PPCTEXT__	/;"	d	file:
__PPCTEXT__	common/env_embedded.c	/^unsigned long env_size __PPCTEXT__ = sizeof(env_t);$/;"	v	typeref:typename:unsigned long env_size
__PRCM_APB0_RATIO	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_APB0_RATIO(/;"	d
__PRCM_APB0_RATIO	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_APB0_RATIO(/;"	d
__PRCM_APB0_RATIO_DIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_APB0_RATIO_DIV(/;"	d
__PRCM_APB0_RATIO_DIV	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_APB0_RATIO_DIV(/;"	d
__PRCM_CLK_MOD0_M	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_MOD0_M(/;"	d
__PRCM_CLK_MOD0_M	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_MOD0_M(/;"	d
__PRCM_CLK_MOD0_M_X	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_MOD0_M_X(/;"	d
__PRCM_CLK_MOD0_M_X	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_MOD0_M_X(/;"	d
__PRCM_CLK_MOD0_N_X	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_MOD0_N_X(/;"	d
__PRCM_CLK_MOD0_N_X	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_MOD0_N_X(/;"	d
__PRCM_CLK_OUTD_M	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_M(/;"	d
__PRCM_CLK_OUTD_M	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_M(/;"	d
__PRCM_CLK_OUTD_M_X	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_M_X(/;"	d
__PRCM_CLK_OUTD_M_X	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_M_X(/;"	d
__PRCM_CLK_OUTD_N	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_N(/;"	d
__PRCM_CLK_OUTD_N	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_N(/;"	d
__PRCM_CLK_OUTD_N_X	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_N_X(/;"	d
__PRCM_CLK_OUTD_N_X	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_N_X(/;"	d
__PRCM_CLK_OUTD_SRC_ERR	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_ERR /;"	d
__PRCM_CLK_OUTD_SRC_ERR	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_ERR /;"	d
__PRCM_CLK_OUTD_SRC_HOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_HOSC /;"	d
__PRCM_CLK_OUTD_SRC_HOSC	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_HOSC /;"	d
__PRCM_CLK_OUTD_SRC_LOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_LOSC /;"	d
__PRCM_CLK_OUTD_SRC_LOSC	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_LOSC /;"	d
__PRCM_CLK_OUTD_SRC_LOSC2	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_LOSC2 /;"	d
__PRCM_CLK_OUTD_SRC_LOSC2	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_LOSC2 /;"	d
__PRCM_CLK_OUTD_SRC_SEL	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_SEL(/;"	d
__PRCM_CLK_OUTD_SRC_SEL	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CLK_OUTD_SRC_SEL(/;"	d
__PRCM_CPUS_CFG_CLK_SRC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC(/;"	d
__PRCM_CPUS_CFG_CLK_SRC	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC(/;"	d
__PRCM_CPUS_CFG_CLK_SRC_HOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_HOSC /;"	d
__PRCM_CPUS_CFG_CLK_SRC_HOSC	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_HOSC /;"	d
__PRCM_CPUS_CFG_CLK_SRC_LOSC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_LOSC /;"	d
__PRCM_CPUS_CFG_CLK_SRC_LOSC	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_LOSC /;"	d
__PRCM_CPUS_CFG_CLK_SRC_PDIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_PDIV /;"	d
__PRCM_CPUS_CFG_CLK_SRC_PDIV	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_PDIV /;"	d
__PRCM_CPUS_CFG_CLK_SRC_PLL6	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_PLL6 /;"	d
__PRCM_CPUS_CFG_CLK_SRC_PLL6	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_CLK_SRC_PLL6 /;"	d
__PRCM_CPUS_CFG_POST	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_POST(/;"	d
__PRCM_CPUS_CFG_POST	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_POST(/;"	d
__PRCM_CPUS_CFG_POST_DIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_POST_DIV(/;"	d
__PRCM_CPUS_CFG_POST_DIV	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_POST_DIV(/;"	d
__PRCM_CPUS_CFG_PRE	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_PRE(/;"	d
__PRCM_CPUS_CFG_PRE	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_PRE(/;"	d
__PRCM_CPUS_CFG_PRE_DIV	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_CPUS_CFG_PRE_DIV(/;"	d
__PRCM_CPUS_CFG_PRE_DIV	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_CPUS_CFG_PRE_DIV(/;"	d
__PRCM_PLL_CTRL_HOSC_CLK_0	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_0 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_0	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_0 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_1	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_1 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_1	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_1 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_2	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_2 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_2	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_2 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_3	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_3 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_3	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_3 /;"	d
__PRCM_PLL_CTRL_HOSC_CLK_SEL	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_SEL(/;"	d
__PRCM_PLL_CTRL_HOSC_CLK_SEL	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_HOSC_CLK_SEL(/;"	d
__PRCM_PLL_CTRL_INT_PLL_IN_SEL	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_INT_PLL_IN_SEL(/;"	d
__PRCM_PLL_CTRL_INT_PLL_IN_SEL	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_INT_PLL_IN_SEL(/;"	d
__PRCM_PLL_CTRL_USB_CLK_0	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_0 /;"	d
__PRCM_PLL_CTRL_USB_CLK_0	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_0 /;"	d
__PRCM_PLL_CTRL_USB_CLK_1	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_1 /;"	d
__PRCM_PLL_CTRL_USB_CLK_1	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_1 /;"	d
__PRCM_PLL_CTRL_USB_CLK_2	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_2 /;"	d
__PRCM_PLL_CTRL_USB_CLK_2	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_2 /;"	d
__PRCM_PLL_CTRL_USB_CLK_3	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_3 /;"	d
__PRCM_PLL_CTRL_USB_CLK_3	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_3 /;"	d
__PRCM_PLL_CTRL_USB_CLK_SRC	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_SRC(/;"	d
__PRCM_PLL_CTRL_USB_CLK_SRC	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_USB_CLK_SRC(/;"	d
__PRCM_PLL_CTRL_VDD_LDO_OUT	arch/arm/include/asm/arch-sunxi/prcm.h	/^#define __PRCM_PLL_CTRL_VDD_LDO_OUT(/;"	d
__PRCM_PLL_CTRL_VDD_LDO_OUT	arch/arm/include/asm/arch/prcm.h	/^#define __PRCM_PLL_CTRL_VDD_LDO_OUT(/;"	d
__PRI64_PREFIX	include/inttypes.h	/^#  define __PRI64_PREFIX	/;"	d
__PRI64_PREFIX	include/inttypes.h	/^# define __PRI64_PREFIX	/;"	d
__PRIPTR_PREFIX	include/inttypes.h	/^#  define __PRIPTR_PREFIX	/;"	d
__PRIPTR_PREFIX	include/inttypes.h	/^#  define __PRIPTR_PREFIX$/;"	d
__PRIPTR_PREFIX	include/inttypes.h	/^# define __PRIPTR_PREFIX	/;"	d
__PXA270X_UDC_H__	include/usb/pxa27x_udc.h	/^#define __PXA270X_UDC_H__$/;"	d
__PXA_H__	arch/arm/include/asm/arch-pxa/pxa.h	/^#define	__PXA_H__$/;"	d
__QEMU_PPCE500_H	include/configs/qemu-ppce500.h	/^#define __QEMU_PPCE500_H$/;"	d
__QE_H__	include/fsl_qe.h	/^#define __QE_H__$/;"	d
__QIXIS_H_	board/freescale/common/qixis.h	/^#define __QIXIS_H_$/;"	d
__QOS_H__	board/renesas/alt/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/blanche/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/gose/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/koelsch/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/lager/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/porter/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/silk/qos.h	/^#define __QOS_H__$/;"	d
__QOS_H__	board/renesas/stout/qos.h	/^#define __QOS_H__$/;"	d
__QSPI_H__	arch/m68k/include/asm/coldfire/qspi.h	/^#define __QSPI_H__$/;"	d
__R0P7734_H	include/configs/r0p7734.h	/^#define __R0P7734_H$/;"	d
__R7780RP_H	include/configs/r7780mp.h	/^#define __R7780RP_H$/;"	d
__R8A66597_H__	drivers/usb/host/r8a66597.h	/^#define __R8A66597_H__$/;"	d
__RAM_H	include/ram.h	/^#define __RAM_H$/;"	d
__RARP_H__	net/rarp.h	/^#define __RARP_H__$/;"	d
__RC4_H	include/rc4.h	/^#define __RC4_H$/;"	d
__RCAR_GEN2_COMMON_H	include/configs/rcar-gen2-common.h	/^#define __RCAR_GEN2_COMMON_H$/;"	d
__RCAR_GEN3_COMMON_H	include/configs/rcar-gen3-common.h	/^#define __RCAR_GEN3_COMMON_H$/;"	d
__RDC_SEMA_H__	arch/arm/include/asm/imx-common/rdc-sema.h	/^#define __RDC_SEMA_H__$/;"	d
__READABLE	arch/mips/include/asm/pgtable-bits.h	/^#define __READABLE	/;"	d
__READ_ONCE	include/linux/compiler.h	/^#define __READ_ONCE(/;"	d
__READ_ONCE_SIZE	include/linux/compiler.h	/^#define __READ_ONCE_SIZE	/;"	d
__REBOOT_MODE_H	arch/arm/include/asm/arch-rockchip/boot_mode.h	/^#define __REBOOT_MODE_H$/;"	d
__REDWOOD_H_	board/amcc/redwood/redwood.h	/^#define __REDWOOD_H_$/;"	d
__REG	arch/arm/include/asm/arch-imx/imx-regs.h	/^#  define __REG(/;"	d
__REG	arch/arm/include/asm/arch-imx/imx-regs.h	/^# define __REG(/;"	d
__REG	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define __REG(/;"	d
__REG	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define __REG(/;"	d
__REG	drivers/serial/serial_mxc.c	/^#define __REG(/;"	d	file:
__REG16	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define __REG16(/;"	d
__REG16	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define __REG16(/;"	d
__REG2	arch/arm/include/asm/arch-imx/imx-regs.h	/^#  define __REG2(/;"	d
__REG2	arch/arm/include/asm/arch-imx/imx-regs.h	/^# define __REG2(/;"	d
__REG32	drivers/net/tsi108_eth.c	/^#define __REG32(/;"	d	file:
__REG8	arch/arm/include/asm/arch-mx31/imx-regs.h	/^#define __REG8(/;"	d
__REG8	arch/arm/include/asm/arch-mx5/imx-regs.h	/^#define __REG8(/;"	d
__REGMAP_H	include/regmap.h	/^#define __REGMAP_H$/;"	d
__REGS_APBH_H__	arch/arm/include/asm/imx-common/regs-apbh.h	/^#define __REGS_APBH_H__$/;"	d
__REGS_MMC_H__	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^#define __REGS_MMC_H__$/;"	d
__REGS_UART_H__	arch/arm/include/asm/arch-pxa/regs-uart.h	/^#define	__REGS_UART_H__$/;"	d
__REGS_USBPHY_H__	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^#define __REGS_USBPHY_H__$/;"	d
__REGS_USBPHY_H__	arch/arm/include/asm/imx-common/regs-usbphy.h	/^#define __REGS_USBPHY_H__$/;"	d
__REGS_USB_H__	arch/arm/include/asm/arch-mxs/regs-usb.h	/^#define __REGS_USB_H__$/;"	d
__REGS_USB_H__	arch/arm/include/asm/arch-pxa/regs-usb.h	/^#define __REGS_USB_H__$/;"	d
__RIOTBOARD_CONFIG_H	include/configs/embestmx6boards.h	/^#define __RIOTBOARD_CONFIG_H$/;"	d
__RK_SPI_H	drivers/spi/rk_spi.h	/^#define __RK_SPI_H$/;"	d
__RN5T567_PMIC_H_	include/power/rn5t567_pmic.h	/^#define __RN5T567_PMIC_H_$/;"	d
__RNG_H__	arch/m68k/include/asm/coldfire/rng.h	/^#define __RNG_H__$/;"	d
__RSA_CAAM_H	drivers/crypto/fsl/rsa_caam.h	/^#define __RSA_CAAM_H$/;"	d
__RSK7203_H	include/configs/rsk7203.h	/^#define __RSK7203_H$/;"	d
__RSK7264_H	include/configs/rsk7264.h	/^#define __RSK7264_H$/;"	d
__RSK7269_H	include/configs/rsk7269.h	/^#define __RSK7269_H$/;"	d
__S2MPS11__H__	include/power/s2mps11.h	/^#define __S2MPS11__H__$/;"	d
__S3C2400_H__	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^#define __S3C2400_H__$/;"	d
__S3C2410_H__	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^#define __S3C2410_H__$/;"	d
__S3C2440_H__	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^#define __S3C2440_H__$/;"	d
__S3C24X0_H__	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^#define __S3C24X0_H__$/;"	d
__S5M8767_H_	include/power/s5m8767.h	/^#define __S5M8767_H_$/;"	d
__SALVATOR_X_H	include/configs/salvator-x.h	/^#define __SALVATOR_X_H$/;"	d
__SAMA5D2_H	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define __SAMA5D2_H$/;"	d
__SAMA5D4_H	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define __SAMA5D4_H$/;"	d
__SAMA5_BOOT_H	arch/arm/mach-at91/include/mach/sama5_boot.h	/^#define __SAMA5_BOOT_H$/;"	d
__SAMA5_MATRIX_H	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^#define __SAMA5_MATRIX_H$/;"	d
__SAMA5_SFR_H	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^#define __SAMA5_SFR_H$/;"	d
__SAMSUNG_MISC_COMMON_H__	include/samsung/misc.h	/^#define __SAMSUNG_MISC_COMMON_H__$/;"	d
__SAMSUNG_ONENAND_H__	include/linux/mtd/samsung_onenand.h	/^#define __SAMSUNG_ONENAND_H__$/;"	d
__SAMSUNG_USB_PHY_UBOOT_H_	include/samsung-usb-phy-uboot.h	/^#define __SAMSUNG_USB_PHY_UBOOT_H_$/;"	d
__SANDBOX_ASM_IO_H	arch/sandbox/include/asm/io.h	/^#define __SANDBOX_ASM_IO_H$/;"	d
__SANDBOX_BLOCK_DEV__	include/sandboxblockdev.h	/^#define __SANDBOX_BLOCK_DEV__$/;"	d
__SANDBOX_CACHE_H__	arch/sandbox/include/asm/cache.h	/^#define __SANDBOX_CACHE_H__$/;"	d
__SANDBOX_CLK_H	arch/sandbox/include/asm/clk.h	/^#define __SANDBOX_CLK_H$/;"	d
__SANDBOX_FS__	include/sandboxfs.h	/^#define __SANDBOX_FS__$/;"	d
__SANDBOX_GETOPT_H	arch/sandbox/include/asm/getopt.h	/^#define __SANDBOX_GETOPT_H$/;"	d
__SANDBOX_MBOX_H	arch/sandbox/include/asm/mbox.h	/^#define __SANDBOX_MBOX_H$/;"	d
__SANDBOX_POWER_DOMAIN_H	arch/sandbox/include/asm/power-domain.h	/^#define __SANDBOX_POWER_DOMAIN_H$/;"	d
__SANDBOX_RESET_H	arch/sandbox/include/asm/reset.h	/^#define __SANDBOX_RESET_H$/;"	d
__SANDBOX_SDL_H	arch/sandbox/include/asm/sdl.h	/^#define __SANDBOX_SDL_H$/;"	d
__SANDBOX_SECTIONS_H	arch/sandbox/include/asm/sections.h	/^#define __SANDBOX_SECTIONS_H$/;"	d
__SANDBOX_SOUND_H	arch/sandbox/include/asm/sound.h	/^#define __SANDBOX_SOUND_H$/;"	d
__SANDBOX_SPL_CONFIG_H	include/configs/sandbox_spl.h	/^#define __SANDBOX_SPL_CONFIG_H$/;"	d
__SANDBOX_STATE_H	arch/sandbox/include/asm/state.h	/^#define __SANDBOX_STATE_H$/;"	d
__SATA_H__	include/sata.h	/^#define __SATA_H__$/;"	d
__SDHCI_HW_H	include/sdhci.h	/^#define __SDHCI_HW_H$/;"	d
__SDMA_H	arch/arm/include/asm/arch-omap3/dma.h	/^#define __SDMA_H$/;"	d
__SDRAM_CONFIG_H	board/terasic/de0-nano-soc/qts/sdram_config.h	/^#define __SDRAM_CONFIG_H$/;"	d
__SD_RST_CMD	include/configs/p1_p2_rdb_pc.h	/^#define __SD_RST_CMD	/;"	d
__SECO_COMMON_MX6_H	board/seco/common/mx6.h	/^#define __SECO_COMMON_MX6_H$/;"	d
__SECURE	arch/arm/mach-uniphier/reset.c	/^#define __SECURE	/;"	d	file:
__SECURE	arch/arm/mach-uniphier/reset.c	/^#define __SECURE$/;"	d	file:
__SECURE_MX6Q_H__	arch/arm/include/asm/imx-common/hab.h	/^#define __SECURE_MX6Q_H__$/;"	d
__SEC_FIRMWARE_H_	arch/arm/include/asm/armv8/sec_firmware.h	/^#define __SEC_FIRMWARE_H_$/;"	d
__SERIAL_H__	include/serial.h	/^#define __SERIAL_H__$/;"	d
__SERIAL_STM32_H	include/dm/platform_data/serial_stm32.h	/^#define __SERIAL_STM32_H$/;"	d
__SERIAL_STM32x7_H	include/dm/platform_data/serial_stm32x7.h	/^#define __SERIAL_STM32x7_H$/;"	d
__SH7752EVB_H	include/configs/sh7752evb.h	/^#define __SH7752EVB_H$/;"	d
__SH7753EVB_H	include/configs/sh7753evb.h	/^#define __SH7753EVB_H$/;"	d
__SH7757LCR_H	include/configs/sh7757lcr.h	/^#define __SH7757LCR_H$/;"	d
__SH7763RDP_H	include/configs/sh7763rdp.h	/^#define __SH7763RDP_H$/;"	d
__SH7785LCR_H	include/configs/sh7785lcr.h	/^#define __SH7785LCR_H$/;"	d
__SHEEVAPLUG_H	board/Marvell/sheevaplug/sheevaplug.h	/^#define __SHEEVAPLUG_H$/;"	d
__SHMIN_H	include/configs/shmin.h	/^#define __SHMIN_H$/;"	d
__SH_PFC_H	include/sh_pfc.h	/^#define __SH_PFC_H$/;"	d
__SH_SPI_H__	drivers/spi/sh_spi.h	/^#define __SH_SPI_H__$/;"	d
__SH_TMU_H	include/sh_tmu.h	/^#define __SH_TMU_H$/;"	d
__SIGNAL_FRAMESIZE	arch/powerpc/include/asm/ptrace.h	/^#define __SIGNAL_FRAMESIZE	/;"	d
__SILK_H	include/configs/silk.h	/^#define __SILK_H$/;"	d
__SKHA_H__	arch/m68k/include/asm/coldfire/skha.h	/^#define __SKHA_H__$/;"	d
__SLEEP_H	board/freescale/common/sleep.h	/^#define __SLEEP_H$/;"	d
__SLOW_DOWN_IO	arch/x86/include/asm/io.h	/^#define __SLOW_DOWN_IO /;"	d
__SNTP_H__	net/sntp.h	/^#define __SNTP_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/altera/arria5-socdk/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/denx/mcvevk/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/ebv/socrates/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/is1/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/samtec/vining_fpga/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/sr1500/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_IOCSR_CONFIG_H__	board/terasic/sockit/qts/iocsr_config.h	/^#define __SOCFPGA_IOCSR_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/altera/arria5-socdk/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/altera/cyclone5-socdk/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/denx/mcvevk/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/ebv/socrates/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/is1/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/samtec/vining_fpga/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/sr1500/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/terasic/de0-nano-soc/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PINMUX_CONFIG_H__	board/terasic/sockit/qts/pinmux_config.h	/^#define __SOCFPGA_PINMUX_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/altera/arria5-socdk/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/altera/cyclone5-socdk/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/denx/mcvevk/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/ebv/socrates/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/is1/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/samtec/vining_fpga/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/sr1500/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_PLL_CONFIG_H__	board/terasic/sockit/qts/pll_config.h	/^#define __SOCFPGA_PLL_CONFIG_H__$/;"	d
__SOCFPGA_SCU_H__	arch/arm/mach-socfpga/include/mach/scu.h	/^#define __SOCFPGA_SCU_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/altera/arria5-socdk/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/altera/cyclone5-socdk/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/denx/mcvevk/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/ebv/socrates/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/is1/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/samtec/vining_fpga/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/sr1500/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOCFPGA_SDRAM_CONFIG_H__	board/terasic/sockit/qts/sdram_config.h	/^#define __SOCFPGA_SDRAM_CONFIG_H__$/;"	d
__SOC_ROCKCHIP_RK3399_GRF_H__	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^#define __SOC_ROCKCHIP_RK3399_GRF_H__$/;"	d
__SOFT_SWITCH_H__	arch/blackfin/include/asm/soft_switch.h	/^#define __SOFT_SWITCH_H__$/;"	d
__SOUND_ARCH_H__	arch/arm/mach-exynos/include/mach/sound.h	/^#define __SOUND_ARCH_H__$/;"	d
__SOUND_H__	include/sound.h	/^#define __SOUND_H__$/;"	d
__SPARC_ASMMACRO_H__	arch/sparc/include/asm/asmmacro.h	/^#define __SPARC_ASMMACRO_H__$/;"	d
__SPARC_CACHE_H__	arch/sparc/include/asm/cache.h	/^#define __SPARC_CACHE_H__$/;"	d
__SPARC_IRQ_H__	arch/sparc/include/asm/irq.h	/^#define __SPARC_IRQ_H__$/;"	d
__SPARC_MACHINES_H__	arch/sparc/include/asm/machines.h	/^#define __SPARC_MACHINES_H__$/;"	d
__SPARC_OPENPROM_H__	arch/sparc/include/asm/prom.h	/^#define __SPARC_OPENPROM_H__$/;"	d
__SPARC_POSIX_TYPES_H__	arch/sparc/include/asm/posix_types.h	/^#define __SPARC_POSIX_TYPES_H__$/;"	d
__SPARC_PSR_H__	arch/sparc/include/asm/psr.h	/^#define __SPARC_PSR_H__$/;"	d
__SPARC_PTRACE_H__	arch/sparc/include/asm/ptrace.h	/^#define __SPARC_PTRACE_H__$/;"	d
__SPARC_SRMMU_H__	arch/sparc/include/asm/srmmu.h	/^#define __SPARC_SRMMU_H__$/;"	d
__SPARC_STACK_H__	arch/sparc/include/asm/stack.h	/^#define __SPARC_STACK_H__$/;"	d
__SPARC_WINMACRO_H__	arch/sparc/include/asm/winmacro.h	/^#define __SPARC_WINMACRO_H__$/;"	d
__SPEAR_EMI_H__	arch/arm/include/asm/arch-spear/spr_emi.h	/^#define __SPEAR_EMI_H__$/;"	d
__SPI_RST_CMD	include/configs/p1_p2_rdb_pc.h	/^#define __SPI_RST_CMD	/;"	d
__SPR_DEFS_H__	arch/arm/include/asm/arch-spear/spr_defs.h	/^#define __SPR_DEFS_H__$/;"	d
__SSI_H__	arch/m68k/include/asm/coldfire/ssi.h	/^#define __SSI_H__$/;"	d
__STB_INCLUDE_STB_TRUETYPE_H__	drivers/video/stb_truetype.h	/^#define __STB_INCLUDE_STB_TRUETYPE_H__$/;"	d
__STDC_FORMAT_MACROS	include/common.h	/^#define __STDC_FORMAT_MACROS$/;"	d
__STDC_LIMIT_MACROS	scripts/kconfig/zconf.lex.c	/^#define __STDC_LIMIT_MACROS /;"	d	file:
__STDLIB_H_	include/stdlib.h	/^#define __STDLIB_H_$/;"	d
__STD_C	include/malloc.h	/^#define __STD_C /;"	d
__STM32_DEFS_H__	arch/arm/include/asm/arch-stm32f4/stm32_defs.h	/^#define __STM32_DEFS_H__$/;"	d
__STM32_DEFS_H__	arch/arm/include/asm/arch-stm32f7/stm32_defs.h	/^#define __STM32_DEFS_H__$/;"	d
__STOUT_H	include/configs/stout.h	/^#define __STOUT_H$/;"	d
__STR	arch/mips/include/asm/mipsregs.h	/^#define __STR(/;"	d
__STV0991_DEFS_H__	arch/arm/include/asm/arch-stv0991/stv0991_defs.h	/^#define __STV0991_DEFS_H__$/;"	d
__SUNXI_RSB_H	arch/arm/include/asm/arch-sunxi/rsb.h	/^#define __SUNXI_RSB_H$/;"	d
__SUNXI_RSB_H	arch/arm/include/asm/arch/rsb.h	/^#define __SUNXI_RSB_H$/;"	d
__SWAB_64_THRU_32__	arch/arc/include/asm/byteorder.h	/^	#define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/arm/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/avr32/include/asm/byteorder.h	/^# define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/blackfin/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/microblaze/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/mips/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/nds32/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/nios2/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/sandbox/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/sparc/include/asm/byteorder.h	/^#define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/x86/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SWAB_64_THRU_32__	arch/xtensa/include/asm/byteorder.h	/^#  define __SWAB_64_THRU_32__$/;"	d
__SW_BOOT_BANK1	include/configs/ls1012ardb.h	/^#define __SW_BOOT_BANK1	/;"	d
__SW_BOOT_BANK2	include/configs/ls1012ardb.h	/^#define __SW_BOOT_BANK2	/;"	d
__SW_BOOT_EMU	include/configs/ls1012ardb.h	/^#define __SW_BOOT_EMU	/;"	d
__SW_BOOT_MASK	include/configs/ls1012ardb.h	/^#define __SW_BOOT_MASK	/;"	d
__SW_BOOT_MASK	include/configs/p1_p2_rdb_pc.h	/^#define __SW_BOOT_MASK	/;"	d
__SW_BOOT_NAND	include/configs/p1_p2_rdb_pc.h	/^#define __SW_BOOT_NAND	/;"	d
__SW_BOOT_NOR	include/configs/p1_p2_rdb_pc.h	/^#define __SW_BOOT_NOR	/;"	d
__SW_BOOT_PCIE	include/configs/p1_p2_rdb_pc.h	/^#define __SW_BOOT_PCIE	/;"	d
__SW_BOOT_SD	include/configs/p1_p2_rdb_pc.h	/^#define __SW_BOOT_SD	/;"	d
__SW_BOOT_SPI	include/configs/p1_p2_rdb_pc.h	/^#define __SW_BOOT_SPI	/;"	d
__SW_REV_A	include/configs/ls1012ardb.h	/^#define __SW_REV_A	/;"	d
__SW_REV_B	include/configs/ls1012ardb.h	/^#define __SW_REV_B	/;"	d
__SW_REV_MASK	include/configs/ls1012ardb.h	/^#define __SW_REV_MASK	/;"	d
__SX151X_H_	include/sx151x.h	/^#define __SX151X_H_$/;"	d
__SYSCON_H	include/syscon.h	/^#define __SYSCON_H$/;"	d
__SYSCTRL_H	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^#define __SYSCTRL_H$/;"	d
__SYSMAP_H	arch/arm/include/asm/iproc-common/sysmap.h	/^#define __SYSMAP_H$/;"	d
__SYSRESET_H	include/sysreset.h	/^#define __SYSRESET_H$/;"	d
__T1024QDS_H	include/configs/T102xQDS.h	/^#define __T1024QDS_H$/;"	d
__T1024QDS_QIXIS_H__	board/freescale/t102xqds/t102xqds_qixis.h	/^#define __T1024QDS_QIXIS_H__$/;"	d
__T1024RDB_H	include/configs/T102xRDB.h	/^#define __T1024RDB_H$/;"	d
__T1024_RDB_H__	board/freescale/t102xrdb/t102xrdb.h	/^#define __T1024_RDB_H__$/;"	d
__T102x_QDS_H__	board/freescale/t102xqds/t102xqds.h	/^#define __T102x_QDS_H__$/;"	d
__T1040QDS_QIXIS_H__	board/freescale/t1040qds/t1040qds_qixis.h	/^#define __T1040QDS_QIXIS_H__$/;"	d
__T1040_QDS_H__	board/freescale/t1040qds/t1040qds.h	/^#define __T1040_QDS_H__$/;"	d
__T104x_RDB_H__	board/freescale/t104xrdb/t104xrdb.h	/^#define __T104x_RDB_H__$/;"	d
__T2080RDB_H	include/configs/T208xRDB.h	/^#define __T2080RDB_H$/;"	d
__T208xQDS_H	include/configs/T208xQDS.h	/^#define __T208xQDS_H$/;"	d
__T208xQDS_QIXIS_H__	board/freescale/t208xqds/t208xqds_qixis.h	/^#define __T208xQDS_QIXIS_H__$/;"	d
__T4020QDS_QIXIS_H__	board/freescale/t4qds/t4240qds_qixis.h	/^#define __T4020QDS_QIXIS_H__$/;"	d
__T4QDS_H	include/configs/t4qds.h	/^#define __T4QDS_H$/;"	d
__T4RDB_H__	board/freescale/t4rdb/t4rdb.h	/^#define __T4RDB_H__$/;"	d
__TAM3517_H	include/configs/tam3517-common.h	/^#define __TAM3517_H$/;"	d
__TBS2910_CONFIG_H	include/configs/tbs2910.h	/^#define __TBS2910_CONFIG_H$/;"	d
__TCA642X_H_	include/tca642x.h	/^#define __TCA642X_H_$/;"	d
__TEGRA_COMMON_POST_H	include/configs/tegra-common-post.h	/^#define __TEGRA_COMMON_POST_H$/;"	d
__TEGRA_MMC_H_	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^#define __TEGRA_MMC_H_$/;"	d
__TEST_ENV_H__	include/test/env.h	/^#define __TEST_ENV_H__$/;"	d
__TEST_OVERLAY_H__	include/test/overlay.h	/^#define __TEST_OVERLAY_H__$/;"	d
__TEST_SUITES_H__	include/test/suites.h	/^#define __TEST_SUITES_H__$/;"	d
__TEST_TEST_H	include/test/test.h	/^#define __TEST_TEST_H$/;"	d
__TEST_UT_H	include/test/ut.h	/^#define __TEST_UT_H$/;"	d
__TFTP_H__	include/net/tftp.h	/^#define __TFTP_H__$/;"	d
__TGEC_H__	include/fsl_tgec.h	/^#define __TGEC_H__$/;"	d
__THOR_H_	include/thor.h	/^#define __THOR_H_$/;"	d
__THUNDERX_88XX_H__	include/configs/thunderx_88xx.h	/^#define __THUNDERX_88XX_H__$/;"	d
__THUNDERX_SVC_H__	include/cavium/thunderx_svc.h	/^#define __THUNDERX_SVC_H__$/;"	d
__TIMER_H	arch/arm/include/asm/iproc-common/timer.h	/^#define __TIMER_H$/;"	d
__TIMESTAMP_H__	include/timestamp.h	/^#define	__TIMESTAMP_H__$/;"	d
__TIZEN_LOGO_16BPP_GZIP__	lib/tizen/tizen_logo_16bpp_gzip.h	/^#define __TIZEN_LOGO_16BPP_GZIP__$/;"	d
__TIZEN_LOGO_16BPP__	lib/tizen/tizen_logo_16bpp.h	/^#define __TIZEN_LOGO_16BPP__$/;"	d
__TI_KEYSTONE_SERDES_H__	arch/arm/include/asm/ti-common/keystone_serdes.h	/^#define __TI_KEYSTONE_SERDES_H__$/;"	d
__TI_USB_PHY_UBOOT_H_	include/ti-usb-phy-uboot.h	/^#define __TI_USB_PHY_UBOOT_H_$/;"	d
__TPM_H	include/tpm.h	/^#define __TPM_H$/;"	d
__TPS65090_PMIC_H_	include/power/tps65090.h	/^#define __TPS65090_PMIC_H_$/;"	d
__TQMA6_BB__	board/tqc/tqma6/tqma6_bb.h	/^#define __TQMA6_BB__$/;"	d
__TRACE_H	include/trace.h	/^#define __TRACE_H$/;"	d
__TSEC_H	include/tsec.h	/^#define __TSEC_H$/;"	d
__TYPES_H__FAKE__	include/lzma/LzmaTypes.h	/^#define __TYPES_H__FAKE__$/;"	d
__TZPC_H_	arch/arm/mach-exynos/include/mach/tzpc.h	/^#define __TZPC_H_$/;"	d
__UBIFS_DEBUG_H__	fs/ubifs/debug.h	/^#define __UBIFS_DEBUG_H__$/;"	d
__UBIFS_H__	fs/ubifs/ubifs.h	/^#define __UBIFS_H__$/;"	d
__UBIFS_KEY_H__	fs/ubifs/key.h	/^#define __UBIFS_KEY_H__$/;"	d
__UBIFS_MEDIA_H__	fs/ubifs/ubifs-media.h	/^#define __UBIFS_MEDIA_H__$/;"	d
__UBIFS_MISC_H__	fs/ubifs/misc.h	/^#define __UBIFS_MISC_H__$/;"	d
__UBIFS_UBOOT_H__	include/ubifs_uboot.h	/^#define __UBIFS_UBOOT_H__$/;"	d
__UBI_DEBUG_H__	drivers/mtd/ubi/debug.h	/^#define __UBI_DEBUG_H__$/;"	d
__UBI_MEDIA_H__	drivers/mtd/ubi/ubi-media.h	/^#define __UBI_MEDIA_H__$/;"	d
__UBI_UBI_H__	drivers/mtd/ubi/ubi.h	/^#define __UBI_UBI_H__$/;"	d
__UBI_USER_H__	include/mtd/ubi-user.h	/^#define __UBI_USER_H__$/;"	d
__UBOOT_ONENAND_H	include/onenand_uboot.h	/^#define __UBOOT_ONENAND_H$/;"	d
__UBOOT_SL811_H	drivers/usb/host/sl811.h	/^#define __UBOOT_SL811_H$/;"	d
__UBOOT_UBISPL_H	include/ubispl.h	/^#define __UBOOT_UBISPL_H$/;"	d
__UBOOT_UBI_H	include/ubi_uboot.h	/^#define __UBOOT_UBI_H$/;"	d
__UBOOT_UBI_WRAPPER_H	drivers/mtd/ubispl/ubi-wrapper.h	/^#define __UBOOT_UBI_WRAPPER_H$/;"	d
__UCCF_H__	drivers/qe/uccf.h	/^#define __UCCF_H__$/;"	d
__UCP1020_H__	board/Arcturus/ucp1020/ucp1020.h	/^#define __UCP1020_H__$/;"	d
__UEC_H__	drivers/qe/uec.h	/^#define __UEC_H__$/;"	d
__UEC_PHY_H__	drivers/qe/uec_phy.h	/^#define __UEC_PHY_H__$/;"	d
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	} __UNION_ANON;$/;"	m	struct:mrq_clk_request	typeref:union:mrq_clk_request::__anonb38d4241050a
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	} __UNION_ANON;$/;"	m	struct:mrq_clk_response	typeref:union:mrq_clk_response::__anonb38d4241060a
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	} __UNION_ANON;$/;"	m	struct:mrq_debugfs_request	typeref:union:mrq_debugfs_request::__anonb38d4241010a
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	} __UNION_ANON;$/;"	m	struct:mrq_debugfs_response	typeref:union:mrq_debugfs_response::__anonb38d4241020a
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	} __UNION_ANON;$/;"	m	struct:mrq_thermal_bpmp_to_host_request	typeref:union:mrq_thermal_bpmp_to_host_request::__anonb38d4241080a
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	} __UNION_ANON;$/;"	m	struct:mrq_thermal_host_to_bpmp_request	typeref:union:mrq_thermal_host_to_bpmp_request::__anonb38d4241070a
__UNION_ANON	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^#define __UNION_ANON$/;"	d
__UNIPHIER_PINCTRL_GROUP	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define __UNIPHIER_PINCTRL_GROUP(/;"	d
__UNIPHIER_PINMUX_FUNCTION	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^#define __UNIPHIER_PINMUX_FUNCTION(/;"	d
__UNIQUE_ID	include/linux/compiler-gcc.h	/^#define __UNIQUE_ID(/;"	d
__UNIQUE_ID	include/linux/compiler.h	/^# define __UNIQUE_ID(/;"	d
__UPM_TABLE_H	board/socrates/upm_table.h	/^#define __UPM_TABLE_H$/;"	d
__USBDCORE_EP0_H__	drivers/usb/gadget/ep0.h	/^#define __USBDCORE_EP0_H__$/;"	d
__USBDCORE_H__	include/usbdevice.h	/^#define __USBDCORE_H__$/;"	d
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__ashlsi3_20	arch/sh/lib/ashlsi3.S	/^__ashlsi3_20:$/;"	l
__ashlsi3_21	arch/sh/lib/ashlsi3.S	/^__ashlsi3_21:$/;"	l
__ashlsi3_22	arch/sh/lib/ashlsi3.S	/^__ashlsi3_22:$/;"	l
__ashlsi3_23	arch/sh/lib/ashlsi3.S	/^__ashlsi3_23:$/;"	l
__ashlsi3_24	arch/sh/lib/ashlsi3.S	/^__ashlsi3_24:$/;"	l
__ashlsi3_25	arch/sh/lib/ashlsi3.S	/^__ashlsi3_25:$/;"	l
__ashlsi3_26	arch/sh/lib/ashlsi3.S	/^__ashlsi3_26:$/;"	l
__ashlsi3_27	arch/sh/lib/ashlsi3.S	/^__ashlsi3_27:$/;"	l
__ashlsi3_28	arch/sh/lib/ashlsi3.S	/^__ashlsi3_28:$/;"	l
__ashlsi3_29	arch/sh/lib/ashlsi3.S	/^__ashlsi3_29:$/;"	l
__ashlsi3_3	arch/sh/lib/ashlsi3.S	/^__ashlsi3_3:$/;"	l
__ashlsi3_30	arch/sh/lib/ashlsi3.S	/^__ashlsi3_30:$/;"	l
__ashlsi3_31	arch/sh/lib/ashlsi3.S	/^__ashlsi3_31:$/;"	l
__ashlsi3_4	arch/sh/lib/ashlsi3.S	/^__ashlsi3_4:$/;"	l
__ashlsi3_5	arch/sh/lib/ashlsi3.S	/^__ashlsi3_5:$/;"	l
__ashlsi3_6	arch/sh/lib/ashlsi3.S	/^__ashlsi3_6:$/;"	l
__ashlsi3_7	arch/sh/lib/ashlsi3.S	/^__ashlsi3_7:$/;"	l
__ashlsi3_8	arch/sh/lib/ashlsi3.S	/^__ashlsi3_8:$/;"	l
__ashlsi3_9	arch/sh/lib/ashlsi3.S	/^__ashlsi3_9:$/;"	l
__ashlsi3_table	arch/sh/lib/ashlsi3.S	/^__ashlsi3_table:$/;"	l
__ashrdi3	arch/arc/lib/libgcc2.c	/^__ashrdi3(DWtype u, shift_count_type b)$/;"	f	typeref:typename:DWtype
__ashrdi3	arch/mips/lib/ashrdi3.c	/^long long __ashrdi3(long long u, word_type b)$/;"	f	typeref:typename:long long
__ashrdi3	arch/nios2/lib/libgcc.c	/^__ashrdi3 (DWtype u, word_type b)$/;"	f	typeref:typename:DWtype
__ashrdi3	arch/powerpc/lib/_ashrdi3.S	/^__ashrdi3:$/;"	l
__ashrdi3	arch/sh/lib/ashrdi3.c	/^long long __ashrdi3(long long u, word_type b)$/;"	f	typeref:typename:long long
__ashrsi3	arch/sh/lib/ashrsi3.S	/^__ashrsi3:$/;"	l
__asm_arch_cpu_h	arch/x86/include/asm/arch-broadwell/cpu.h	/^#define __asm_arch_cpu_h$/;"	d
__asm_arch_iomap_h	arch/x86/include/asm/arch-broadwell/iomap.h	/^#define __asm_arch_iomap_h$/;"	d
__asm_arch_rcba_h	arch/x86/include/asm/arch-broadwell/rcb.h	/^#define __asm_arch_rcba_h$/;"	d
__asm_pch_common_h	arch/x86/include/asm/pch_common.h	/^#define __asm_pch_common_h$/;"	d
__asm_rtc_h	arch/sandbox/include/asm/rtc.h	/^#define __asm_rtc_h$/;"	d
__asm_spl_h	arch/sandbox/include/asm/spl.h	/^#define __asm_spl_h$/;"	d
__asmeq	arch/arm/include/asm/system.h	/^#define __asmeq(/;"	d
__assert_fail	lib/tiny-printf.c	/^void __assert_fail(const char *assertion, const char *file, unsigned line,$/;"	f	typeref:typename:void
__assert_fail	lib/vsprintf.c	/^void __assert_fail(const char *assertion, const char *file, unsigned line,$/;"	f	typeref:typename:void
__assume_aligned	include/linux/compiler-gcc.h	/^#define __assume_aligned(/;"	d
__assume_aligned	include/linux/compiler.h	/^#define __assume_aligned(/;"	d
__ata_port_freeze	drivers/block/sata_dwc.c	/^static void __ata_port_freeze(struct ata_port *ap)$/;"	f	typeref:typename:void	file:
__ata_qc_complete	drivers/block/sata_dwc.c	/^static void __ata_qc_complete(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
__ata_qc_from_tag	drivers/block/sata_dwc.c	/^struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap,$/;"	f	typeref:struct:ata_queued_cmd *
__attribute_const__	include/linux/compiler-gcc.h	/^#define __attribute_const__	/;"	d
__attribute_const__	include/linux/compiler.h	/^# define __attribute_const__	/;"	d
__base	arch/arm/cpu/pxa/start.S	/^	.set	__base, 0$/;"	d
__base	arch/arm/cpu/pxa/start.S	/^	.set	__base, __base + 1$/;"	d
__be16	include/linux/types.h	/^typedef __u16 __bitwise __be16;$/;"	t	typeref:typename:__u16 __bitwise
__be16_to_cpu	include/linux/byteorder/big_endian.h	/^#define __be16_to_cpu(/;"	d
__be16_to_cpu	include/linux/byteorder/little_endian.h	/^#define __be16_to_cpu(/;"	d
__be16_to_cpup	include/linux/byteorder/big_endian.h	/^static inline __u16 __be16_to_cpup(const __be16 *p)$/;"	f	typeref:typename:__u16
__be16_to_cpup	include/linux/byteorder/little_endian.h	/^static inline __u16 __be16_to_cpup(const __be16 *p)$/;"	f	typeref:typename:__u16
__be16_to_cpus	include/linux/byteorder/big_endian.h	/^#define __be16_to_cpus(/;"	d
__be16_to_cpus	include/linux/byteorder/little_endian.h	/^#define __be16_to_cpus(/;"	d
__be32	include/linux/types.h	/^typedef __u32 __bitwise __be32;$/;"	t	typeref:typename:__u32 __bitwise
__be32_to_cpu	include/linux/byteorder/big_endian.h	/^#define __be32_to_cpu(/;"	d
__be32_to_cpu	include/linux/byteorder/little_endian.h	/^#define __be32_to_cpu(/;"	d
__be32_to_cpup	include/linux/byteorder/big_endian.h	/^static inline __u32 __be32_to_cpup(const __be32 *p)$/;"	f	typeref:typename:__u32
__be32_to_cpup	include/linux/byteorder/little_endian.h	/^static inline __u32 __be32_to_cpup(const __be32 *p)$/;"	f	typeref:typename:__u32
__be32_to_cpus	include/linux/byteorder/big_endian.h	/^#define __be32_to_cpus(/;"	d
__be32_to_cpus	include/linux/byteorder/little_endian.h	/^#define __be32_to_cpus(/;"	d
__be64	include/linux/types.h	/^typedef __u64 __bitwise __be64;$/;"	t	typeref:typename:__u64 __bitwise
__be64_to_cpu	include/linux/byteorder/big_endian.h	/^#define __be64_to_cpu(/;"	d
__be64_to_cpu	include/linux/byteorder/little_endian.h	/^#define __be64_to_cpu(/;"	d
__be64_to_cpup	include/linux/byteorder/big_endian.h	/^static inline __u64 __be64_to_cpup(const __be64 *p)$/;"	f	typeref:typename:__u64
__be64_to_cpup	include/linux/byteorder/little_endian.h	/^static inline __u64 __be64_to_cpup(const __be64 *p)$/;"	f	typeref:typename:__u64
__be64_to_cpus	include/linux/byteorder/big_endian.h	/^#define __be64_to_cpus(/;"	d
__be64_to_cpus	include/linux/byteorder/little_endian.h	/^#define __be64_to_cpus(/;"	d
__before_dc_op	arch/arc/lib/cache.c	/^static unsigned int __before_dc_op(const int op)$/;"	f	typeref:typename:unsigned int	file:
__before_slc_op	arch/arc/lib/cache.c	/^static unsigned int __before_slc_op(const int op)$/;"	f	typeref:typename:unsigned int	file:
__bi_cli	arch/mips/include/asm/bitops.h	/^#define __bi_cli(/;"	d
__bi_flags	arch/mips/include/asm/bitops.h	/^#define __bi_flags /;"	d
__bi_flags	arch/mips/include/asm/bitops.h	/^#define __bi_flags$/;"	d
__bi_restore_flags	arch/mips/include/asm/bitops.h	/^#define __bi_restore_flags(/;"	d
__bi_save_and_cli	arch/mips/include/asm/bitops.h	/^#define __bi_save_and_cli(/;"	d
__bi_save_flags	arch/mips/include/asm/bitops.h	/^#define __bi_save_flags(/;"	d
__bitwise	include/linux/types.h	/^#define __bitwise /;"	d
__bitwise	include/linux/types.h	/^#define __bitwise$/;"	d
__bitwise__	include/linux/types.h	/^#define __bitwise__ /;"	d
__bitwise__	include/linux/types.h	/^#define __bitwise__$/;"	d
__board_assert_mem_reset	include/fsl_ddr_sdram.h	/^static void __board_assert_mem_reset(void)$/;"	f	typeref:typename:void
__board_deassert_mem_reset	include/fsl_ddr_sdram.h	/^static void __board_deassert_mem_reset(void)$/;"	f	typeref:typename:void
__board_nand_init	drivers/mtd/nand/denali.c	/^static int __board_nand_init(void)$/;"	f	typeref:typename:int	file:
__board_need_mem_reset	include/fsl_ddr_sdram.h	/^static int __board_need_mem_reset(void)$/;"	f	typeref:typename:int
__board_pcie_card_present	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int __board_pcie_card_present(int port)$/;"	f	typeref:typename:int
__board_pcie_first	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int __board_pcie_first(void)$/;"	f	typeref:typename:int
__board_pcie_last	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int __board_pcie_last(void)$/;"	f	typeref:typename:int
__board_pcie_setup_port	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^void __board_pcie_setup_port(int port, int rootpoint)$/;"	f	typeref:typename:void
__board_reset	arch/powerpc/cpu/mpc85xx/cpu.c	/^__board_reset(void)$/;"	f	typeref:typename:void	file:
__board_reset	arch/powerpc/cpu/mpc86xx/cpu.c	/^__board_reset(void)$/;"	f	typeref:typename:void	file:
__board_serdes_name	drivers/pci/fsl_pci_init.c	/^static const char *__board_serdes_name(enum srds_prtcl device)$/;"	f	typeref:typename:const char *	file:
__board_show_activity	arch/powerpc/lib/interrupts.c	/^void __board_show_activity (ulong dummy)$/;"	f	typeref:typename:void
__board_usb_init	drivers/usb/host/xhci-fsl.c	/^__weak int __board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:__weak int
__board_usb_init	drivers/usb/host/xhci-omap.c	/^__weak int __board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:__weak int
__board_validate_screen	drivers/video/sm501.c	/^void __board_validate_screen (unsigned int base)$/;"	f	typeref:typename:void
__board_video_get_fb	drivers/video/sm501.c	/^unsigned int __board_video_get_fb (void)$/;"	f	typeref:typename:unsigned int
__board_video_init	drivers/video/omap3_dss.c	/^int __board_video_init(void)$/;"	f	typeref:typename:int
__board_video_init	drivers/video/sm501.c	/^unsigned int __board_video_init (void)$/;"	f	typeref:typename:unsigned int
__bootpg_addr	arch/powerpc/cpu/mpc85xx/release.S	/^__bootpg_addr:$/;"	l
__branch_check__	include/linux/compiler.h	/^#define __branch_check__(/;"	d
__bss_base	arch/arm/cpu/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	arch/arm/mach-zynq/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	board/birdland/bav335x/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	board/cirrus/edb93xx/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	board/compulab/cm_t335/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	board/freescale/mx31ads/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	board/ti/am335x/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	board/vscom/baltos/u-boot.lds	/^		__bss_base = .;$/;"	s
__bss_base	u-boot.lds	/^  __bss_base = .;$/;"	s
__bss_end	arch/arc/cpu/u-boot.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/arm1136/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^		__bss_end = .;$/;"	s	section:.bss
__bss_end	arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/armv7/am33xx/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/armv7/omap-common/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/armv7/sunxi/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/cpu/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/lib/sections.c	/^char __bss_end[0] __attribute__((section(".__bss_end")));$/;"	v	typeref:typename:char[0]
__bss_end	arch/arm/mach-at91/arm926ejs/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/mach-at91/armv7/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/arm/mach-zynq/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/avr32/cpu/u-boot.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/blackfin/cpu/u-boot.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/blackfin/lib/sections.c	/^char __bss_end[0] __attribute__((section(".__bss_end")));$/;"	v	typeref:typename:char[0]
__bss_end	arch/m68k/cpu/u-boot.lds	/^	__bss_end = . ;$/;"	s
__bss_end	arch/microblaze/cpu/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/microblaze/cpu/u-boot.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/mips/cpu/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/mips/cpu/u-boot.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/nds32/cpu/n1213/u-boot.lds	/^		__bss_end = .;$/;"	s	section:.bss
__bss_end	arch/nios2/cpu/u-boot.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc83xx/u-boot-spl.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	__bss_end = .;$/;"	s
__bss_end	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/powerpc/cpu/ppc4xx/u-boot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	arch/sh/cpu/u-boot.lds	/^	PROVIDE (__bss_end = .);$/;"	s	assignment:provide
__bss_end	arch/sparc/cpu/u-boot.lds	/^	__bss_end = . ;$/;"	s
__bss_end	arch/x86/cpu/u-boot.lds	/^		__bss_end = .;$/;"	s
__bss_end	board/Barix/ipam390/u-boot-spl-ipam390.lds	/^		__bss_end = .;$/;"	s
__bss_end	board/amcc/canyonlands/u-boot-ram.lds	/^  __bss_end = . ;$/;"	s
__bss_end	board/amcc/sequoia/u-boot-ram.lds	/^  __bss_end = . ;$/;"	s
__bss_end	board/davinci/da8xxevm/u-boot-spl-da850evm.lds	/^		__bss_end = .;$/;"	s
__bss_end	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (__bss_end = .);$/;"	s
__bss_end	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (__bss_end = .);$/;"	s
__bss_end	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (__bss_end = .);$/;"	s
__bss_end	board/samsung/common/exynos-uboot-spl.lds	/^		__bss_end = .;$/;"	s
__bss_end	board/tqc/tqm8xx/u-boot.lds	/^  __bss_end = . ;$/;"	s
__bss_end	examples/standalone/nds32.lds	/^	__bss_end = .;$/;"	s
__bss_end	examples/standalone/sparc.lds	/^	__bss_end = .;$/;"	s
__bss_end	spl/u-boot-spl.lds	/^  __bss_end = .;$/;"	s
__bss_len	arch/blackfin/cpu/u-boot.lds	/^	__bss_len = SIZEOF(.bss);$/;"	s
__bss_limit	arch/arm/cpu/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	arch/arm/mach-zynq/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	board/birdland/bav335x/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	board/cirrus/edb93xx/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	board/compulab/cm_t335/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	board/freescale/mx31ads/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	board/ti/am335x/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	board/vscom/baltos/u-boot.lds	/^		 __bss_limit = .;$/;"	s
__bss_limit	u-boot.lds	/^   __bss_limit = .;$/;"	s
__bss_size	arch/arm/cpu/u-boot-spl.lds	/^	__bss_size = __bss_end - __bss_start;$/;"	s
__bss_start	arch/arc/cpu/u-boot.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/arm1136/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^		__bss_start = .;$/;"	s	section:.bss
__bss_start	arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/armv7/am33xx/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/armv7/omap-common/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/armv7/sunxi/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/cpu/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/lib/sections.c	/^char __bss_start[0] __attribute__((section(".__bss_start")));$/;"	v	typeref:typename:char[0]
__bss_start	arch/arm/mach-at91/arm926ejs/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/mach-at91/armv7/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/arm/mach-zynq/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/avr32/cpu/u-boot.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/blackfin/cpu/u-boot.lds	/^	__bss_start = ADDR(.bss);$/;"	s
__bss_start	arch/blackfin/lib/sections.c	/^char __bss_start[0] __attribute__((section(".__bss_start")));$/;"	v	typeref:typename:char[0]
__bss_start	arch/m68k/cpu/u-boot.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/microblaze/cpu/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/microblaze/cpu/u-boot.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/mips/cpu/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/mips/cpu/u-boot.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/nds32/cpu/n1213/u-boot.lds	/^		__bss_start = .;$/;"	s	section:.bss
__bss_start	arch/nios2/cpu/u-boot.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc83xx/u-boot-spl.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/ppc4xx/u-boot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	arch/sandbox/cpu/u-boot-spl.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/sandbox/cpu/u-boot.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/sh/cpu/u-boot.lds	/^	PROVIDE (__bss_start = .);$/;"	s	assignment:provide
__bss_start	arch/sparc/cpu/u-boot.lds	/^	__bss_start = .;$/;"	s
__bss_start	arch/x86/cpu/u-boot.lds	/^		__bss_start = .;$/;"	s
__bss_start	board/Barix/ipam390/u-boot-spl-ipam390.lds	/^		__bss_start = .;$/;"	s
__bss_start	board/amcc/canyonlands/u-boot-ram.lds	/^  __bss_start = .;$/;"	s
__bss_start	board/amcc/sequoia/u-boot-ram.lds	/^  __bss_start = .;$/;"	s
__bss_start	board/davinci/da8xxevm/u-boot-spl-da850evm.lds	/^		__bss_start = .;$/;"	s
__bss_start	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (__bss_start = .);$/;"	s	assignment:provide
__bss_start	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (__bss_start = .);$/;"	s	assignment:provide
__bss_start	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (__bss_start = .);$/;"	s	assignment:provide
__bss_start	board/samsung/common/exynos-uboot-spl.lds	/^		__bss_start = .;$/;"	s
__bss_start	board/tqc/tqm8xx/u-boot.lds	/^  __bss_start = .;$/;"	s
__bss_start	examples/standalone/mips.lds	/^	__bss_start = .;$/;"	s
__bss_start	examples/standalone/mips64.lds	/^	__bss_start = .;$/;"	s
__bss_start	examples/standalone/nds32.lds	/^	__bss_start = .;$/;"	s
__bss_start	examples/standalone/sparc.lds	/^	__bss_start = .;$/;"	s
__bss_start	spl/u-boot-spl.lds	/^  __bss_start = .;$/;"	s
__build	tools/Makefile	/^__build:	$(LOGO-y) $(LICENSE-y)$/;"	t
__build_one_by_one	Makefile	/^__build_one_by_one:$/;"	t
__builtin_bswap16	include/linux/compiler-intel.h	/^#define __builtin_bswap16 /;"	d
__builtin_warning	include/linux/compiler.h	/^# define __builtin_warning(/;"	d
__bus_fault_entry	arch/arm/lib/vectors_m.S	/^__bus_fault_entry:$/;"	l
__bus_to_virt	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __bus_to_virt(/;"	d
__bus_to_virt__is_a_macro	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __bus_to_virt__is_a_macro$/;"	d
__cache_line_loop	arch/arc/lib/cache.c	/^static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,$/;"	f	typeref:typename:void	file:
__cacheline_aligned	arch/blackfin/include/asm/cache.h	/^#define __cacheline_aligned	/;"	d
__cacheline_aligned	arch/blackfin/include/asm/cache.h	/^#define __cacheline_aligned$/;"	d
__cacheline_aligned	arch/powerpc/include/asm/cache.h	/^#define __cacheline_aligned	/;"	d
__cacheline_aligned	arch/powerpc/include/asm/cache.h	/^#define __cacheline_aligned /;"	d
__cacheline_aligned	post/cpu/ppc4xx/ether.c	/^static volatile mal_desc_t rx __cacheline_aligned;$/;"	v	typeref:typename:volatile mal_desc_t rx	file:
__cacheline_aligned	post/cpu/ppc4xx/ether.c	/^static volatile mal_desc_t tx __cacheline_aligned;$/;"	v	typeref:typename:volatile mal_desc_t tx	file:
__cat	tools/imagetool.h	/^#define __cat(/;"	d
__chan	common/xyzModem.c	/^  hal_virtual_comm_table_t *__chan;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:hal_virtual_comm_table_t *	file:
__change_bit	arch/arm/include/asm/bitops.h	/^static inline void __change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
__change_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ void __change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
__change_bit	arch/microblaze/include/asm/bitops.h	/^static inline void __change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
__change_bit	arch/mips/include/asm/bitops.h	/^static __inline__ void __change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
__change_bit	arch/nds32/include/asm/bitops.h	/^static inline void __change_bit(int nr, void *addr)$/;"	f	typeref:typename:void
__change_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline void __change_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
__change_bit	arch/sandbox/include/asm/bitops.h	/^static inline void __change_bit(int nr, void *addr)$/;"	f	typeref:typename:void
__change_bit	arch/x86/include/asm/bitops.h	/^static __inline__ void __change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
__chk_io_ptr	include/linux/compiler.h	/^# define __chk_io_ptr(/;"	d
__chk_user_ptr	include/linux/compiler.h	/^# define __chk_user_ptr(/;"	d
__clear_altbank	board/freescale/common/ngpixis.c	/^void __clear_altbank(void)$/;"	f	typeref:typename:void
__clear_bit	arch/microblaze/include/asm/bitops.h	/^#define __clear_bit(/;"	d
__clear_bit	arch/nds32/include/asm/bitops.h	/^static inline void __clear_bit(int nr, void *addr)$/;"	f	typeref:typename:void
__clear_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline void __clear_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
__clear_bit	include/linux/bitops.h	/^# define __clear_bit /;"	d
__clf	arch/arm/include/asm/proc-armv/system.h	/^#define __clf(/;"	d
__clf	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void __clf(void)$/;"	f	typeref:typename:void
__cli	arch/microblaze/include/asm/system.h	/^#define __cli(/;"	d
__cli	arch/mips/include/asm/system.h	/^__cli(void)$/;"	f	typeref:typename:void
__clz_tab	arch/nios2/lib/libgcc.c	/^const UQItype __clz_tab[256] =$/;"	v	typeref:typename:const UQItype[256]
__cmpdi2	arch/nios2/lib/libgcc.c	/^__cmpdi2 (DWtype a, DWtype b)$/;"	f	typeref:typename:word_type
__cmpxchg	arch/sh/include/asm/system.h	/^static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,$/;"	f	typeref:typename:unsigned long
__cmpxchg_u32	arch/sh/include/asm/system.h	/^static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,$/;"	f	typeref:typename:unsigned long
__cold	include/linux/compiler-gcc.h	/^#define __cold	/;"	d
__cold	include/linux/compiler.h	/^#define __cold$/;"	d
__combo_phy_reg_read	board/highbank/ahci.c	/^static u32 __combo_phy_reg_read(u8 phy, u8 dev, u32 addr)$/;"	f	typeref:typename:u32	file:
__combo_phy_reg_write	board/highbank/ahci.c	/^static void __combo_phy_reg_write(u8 phy, u8 dev, u32 addr, u32 data)$/;"	f	typeref:typename:void	file:
__compiler_offsetof	include/linux/compiler-gcc.h	/^#define __compiler_offsetof(/;"	d
__compiletime_assert	include/linux/compiler.h	/^#define __compiletime_assert(/;"	d
__compiletime_error	include/linux/compiler-gcc.h	/^# define __compiletime_error(/;"	d
__compiletime_error	include/linux/compiler.h	/^# define __compiletime_error(/;"	d
__compiletime_error_fallback	include/linux/compiler.h	/^#  define __compiletime_error_fallback(/;"	d
__compiletime_error_fallback	include/linux/compiler.h	/^# define __compiletime_error_fallback(/;"	d
__compiletime_object_size	include/linux/compiler-gcc.h	/^# define __compiletime_object_size(/;"	d
__compiletime_object_size	include/linux/compiler.h	/^# define __compiletime_object_size(/;"	d
__compiletime_warning	include/linux/compiler-gcc.h	/^# define __compiletime_warning(/;"	d
__compiletime_warning	include/linux/compiler.h	/^# define __compiletime_warning(/;"	d
__cond_lock	include/linux/compiler.h	/^# define __cond_lock(/;"	d
__config_enabled	include/linux/kconfig.h	/^#define __config_enabled(/;"	d
__config_val	include/linux/kconfig.h	/^#define __config_val(/;"	d
__constant_be16_to_cpu	include/linux/byteorder/big_endian.h	/^#define __constant_be16_to_cpu(/;"	d
__constant_be16_to_cpu	include/linux/byteorder/little_endian.h	/^#define __constant_be16_to_cpu(/;"	d
__constant_be32_to_cpu	include/linux/byteorder/big_endian.h	/^#define __constant_be32_to_cpu(/;"	d
__constant_be32_to_cpu	include/linux/byteorder/little_endian.h	/^#define __constant_be32_to_cpu(/;"	d
__constant_be64_to_cpu	include/linux/byteorder/big_endian.h	/^#define __constant_be64_to_cpu(/;"	d
__constant_be64_to_cpu	include/linux/byteorder/little_endian.h	/^#define __constant_be64_to_cpu(/;"	d
__constant_cpu_to_be16	include/linux/byteorder/big_endian.h	/^#define __constant_cpu_to_be16(/;"	d
__constant_cpu_to_be16	include/linux/byteorder/little_endian.h	/^#define __constant_cpu_to_be16(/;"	d
__constant_cpu_to_be32	include/linux/byteorder/big_endian.h	/^#define __constant_cpu_to_be32(/;"	d
__constant_cpu_to_be32	include/linux/byteorder/little_endian.h	/^#define __constant_cpu_to_be32(/;"	d
__constant_cpu_to_be64	include/linux/byteorder/big_endian.h	/^#define __constant_cpu_to_be64(/;"	d
__constant_cpu_to_be64	include/linux/byteorder/little_endian.h	/^#define __constant_cpu_to_be64(/;"	d
__constant_cpu_to_le16	include/linux/byteorder/big_endian.h	/^#define __constant_cpu_to_le16(/;"	d
__constant_cpu_to_le16	include/linux/byteorder/little_endian.h	/^#define __constant_cpu_to_le16(/;"	d
__constant_cpu_to_le32	include/linux/byteorder/big_endian.h	/^#define __constant_cpu_to_le32(/;"	d
__constant_cpu_to_le32	include/linux/byteorder/little_endian.h	/^#define __constant_cpu_to_le32(/;"	d
__constant_cpu_to_le64	include/linux/byteorder/big_endian.h	/^#define __constant_cpu_to_le64(/;"	d
__constant_cpu_to_le64	include/linux/byteorder/little_endian.h	/^#define __constant_cpu_to_le64(/;"	d
__constant_htonl	include/linux/byteorder/big_endian.h	/^#define __constant_htonl(/;"	d
__constant_htonl	include/linux/byteorder/little_endian.h	/^#define __constant_htonl(/;"	d
__constant_htons	include/linux/byteorder/big_endian.h	/^#define __constant_htons(/;"	d
__constant_htons	include/linux/byteorder/little_endian.h	/^#define __constant_htons(/;"	d
__constant_le16_to_cpu	include/linux/byteorder/big_endian.h	/^#define __constant_le16_to_cpu(/;"	d
__constant_le16_to_cpu	include/linux/byteorder/little_endian.h	/^#define __constant_le16_to_cpu(/;"	d
__constant_le32_to_cpu	include/linux/byteorder/big_endian.h	/^#define __constant_le32_to_cpu(/;"	d
__constant_le32_to_cpu	include/linux/byteorder/little_endian.h	/^#define __constant_le32_to_cpu(/;"	d
__constant_le64_to_cpu	include/linux/byteorder/big_endian.h	/^#define __constant_le64_to_cpu(/;"	d
__constant_le64_to_cpu	include/linux/byteorder/little_endian.h	/^#define __constant_le64_to_cpu(/;"	d
__constant_ntohl	include/linux/byteorder/big_endian.h	/^#define __constant_ntohl(/;"	d
__constant_ntohl	include/linux/byteorder/little_endian.h	/^#define __constant_ntohl(/;"	d
__constant_ntohs	include/linux/byteorder/big_endian.h	/^#define __constant_ntohs(/;"	d
__constant_ntohs	include/linux/byteorder/little_endian.h	/^#define __constant_ntohs(/;"	d
__constant_test_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int __constant_test_bit(int nr, const volatile void *addr)$/;"	f	typeref:typename:int
__constant_test_bit	arch/microblaze/include/asm/bitops.h	/^static inline int __constant_test_bit(int nr, const volatile void *addr)$/;"	f	typeref:typename:int
__cpld_read	board/freescale/p2041rdb/cpld.c	/^static u8 __cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8	file:
__cpld_reset	board/freescale/p2041rdb/cpld.c	/^void __cpld_reset(void)$/;"	f	typeref:typename:void
__cpld_set_altbank	board/freescale/p2041rdb/cpld.c	/^void __cpld_set_altbank(void)$/;"	f	typeref:typename:void
__cpld_set_defbank	board/freescale/p2041rdb/cpld.c	/^void __cpld_set_defbank(void)$/;"	f	typeref:typename:void
__cpld_write	board/freescale/p2041rdb/cpld.c	/^static void __cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void	file:
__cpu_to_be16	include/linux/byteorder/big_endian.h	/^#define __cpu_to_be16(/;"	d
__cpu_to_be16	include/linux/byteorder/little_endian.h	/^#define __cpu_to_be16(/;"	d
__cpu_to_be16p	include/linux/byteorder/big_endian.h	/^static inline __be16 __cpu_to_be16p(const __u16 *p)$/;"	f	typeref:typename:__be16
__cpu_to_be16p	include/linux/byteorder/little_endian.h	/^static inline __be16 __cpu_to_be16p(const __u16 *p)$/;"	f	typeref:typename:__be16
__cpu_to_be16s	include/linux/byteorder/big_endian.h	/^#define __cpu_to_be16s(/;"	d
__cpu_to_be16s	include/linux/byteorder/little_endian.h	/^#define __cpu_to_be16s(/;"	d
__cpu_to_be32	include/linux/byteorder/big_endian.h	/^#define __cpu_to_be32(/;"	d
__cpu_to_be32	include/linux/byteorder/little_endian.h	/^#define __cpu_to_be32(/;"	d
__cpu_to_be32p	include/linux/byteorder/big_endian.h	/^static inline __be32 __cpu_to_be32p(const __u32 *p)$/;"	f	typeref:typename:__be32
__cpu_to_be32p	include/linux/byteorder/little_endian.h	/^static inline __be32 __cpu_to_be32p(const __u32 *p)$/;"	f	typeref:typename:__be32
__cpu_to_be32s	include/linux/byteorder/big_endian.h	/^#define __cpu_to_be32s(/;"	d
__cpu_to_be32s	include/linux/byteorder/little_endian.h	/^#define __cpu_to_be32s(/;"	d
__cpu_to_be64	include/linux/byteorder/big_endian.h	/^#define __cpu_to_be64(/;"	d
__cpu_to_be64	include/linux/byteorder/little_endian.h	/^#define __cpu_to_be64(/;"	d
__cpu_to_be64p	include/linux/byteorder/big_endian.h	/^static inline __be64 __cpu_to_be64p(const __u64 *p)$/;"	f	typeref:typename:__be64
__cpu_to_be64p	include/linux/byteorder/little_endian.h	/^static inline __be64 __cpu_to_be64p(const __u64 *p)$/;"	f	typeref:typename:__be64
__cpu_to_be64s	include/linux/byteorder/big_endian.h	/^#define __cpu_to_be64s(/;"	d
__cpu_to_be64s	include/linux/byteorder/little_endian.h	/^#define __cpu_to_be64s(/;"	d
__cpu_to_le16	include/linux/byteorder/big_endian.h	/^#define __cpu_to_le16(/;"	d
__cpu_to_le16	include/linux/byteorder/little_endian.h	/^#define __cpu_to_le16(/;"	d
__cpu_to_le16p	include/linux/byteorder/big_endian.h	/^static inline __le16 __cpu_to_le16p(const __u16 *p)$/;"	f	typeref:typename:__le16
__cpu_to_le16p	include/linux/byteorder/little_endian.h	/^static inline __le16 __cpu_to_le16p(const __u16 *p)$/;"	f	typeref:typename:__le16
__cpu_to_le16s	include/linux/byteorder/big_endian.h	/^#define __cpu_to_le16s(/;"	d
__cpu_to_le16s	include/linux/byteorder/little_endian.h	/^#define __cpu_to_le16s(/;"	d
__cpu_to_le32	include/linux/byteorder/big_endian.h	/^#define __cpu_to_le32(/;"	d
__cpu_to_le32	include/linux/byteorder/little_endian.h	/^#define __cpu_to_le32(/;"	d
__cpu_to_le32p	include/linux/byteorder/big_endian.h	/^static inline __le32 __cpu_to_le32p(const __u32 *p)$/;"	f	typeref:typename:__le32
__cpu_to_le32p	include/linux/byteorder/little_endian.h	/^static inline __le32 __cpu_to_le32p(const __u32 *p)$/;"	f	typeref:typename:__le32
__cpu_to_le32s	include/linux/byteorder/big_endian.h	/^#define __cpu_to_le32s(/;"	d
__cpu_to_le32s	include/linux/byteorder/little_endian.h	/^#define __cpu_to_le32s(/;"	d
__cpu_to_le64	include/linux/byteorder/big_endian.h	/^#define __cpu_to_le64(/;"	d
__cpu_to_le64	include/linux/byteorder/little_endian.h	/^#define __cpu_to_le64(/;"	d
__cpu_to_le64p	include/linux/byteorder/big_endian.h	/^static inline __le64 __cpu_to_le64p(const __u64 *p)$/;"	f	typeref:typename:__le64
__cpu_to_le64p	include/linux/byteorder/little_endian.h	/^static inline __le64 __cpu_to_le64p(const __u64 *p)$/;"	f	typeref:typename:__le64
__cpu_to_le64s	include/linux/byteorder/big_endian.h	/^#define __cpu_to_le64s(/;"	d
__cpu_to_le64s	include/linux/byteorder/little_endian.h	/^#define __cpu_to_le64s(/;"	d
__cyg_profile_func_enter	lib/trace.c	/^void __attribute__((no_instrument_function)) __cyg_profile_func_enter($/;"	f	typeref:typename:void
__cyg_profile_func_exit	lib/trace.c	/^void __attribute__((no_instrument_function)) __cyg_profile_func_exit($/;"	f	typeref:typename:void
__data_end	arch/microblaze/cpu/u-boot-spl.lds	/^		__data_end = .;$/;"	s
__data_end	arch/microblaze/cpu/u-boot.lds	/^		__data_end = .;$/;"	s
__data_end	arch/x86/cpu/u-boot.lds	/^	__data_end = .;$/;"	s
__data_end	examples/standalone/sparc.lds	/^	__data_end = .;$/;"	s
__data_l1_len	arch/blackfin/cpu/u-boot.lds	/^	__data_l1_len = SIZEOF(.data_l1);$/;"	s
__data_l1_lma	arch/blackfin/cpu/u-boot.lds	/^	__data_l1_lma = LOADADDR(.data_l1);$/;"	s
__data_start	arch/microblaze/cpu/u-boot-spl.lds	/^		__data_start = .;$/;"	s
__data_start	arch/microblaze/cpu/u-boot.lds	/^		__data_start = .;$/;"	s
__davinci_spi_claim_bus	drivers/spi/davinci_spi.c	/^static int __davinci_spi_claim_bus(struct davinci_spi_slave *ds, int cs)$/;"	f	typeref:typename:int	file:
__davinci_spi_release_bus	drivers/spi/davinci_spi.c	/^static int __davinci_spi_release_bus(struct davinci_spi_slave *ds)$/;"	f	typeref:typename:int	file:
__davinci_spi_xfer	drivers/spi/davinci_spi.c	/^static int __davinci_spi_xfer(struct davinci_spi_slave *ds,$/;"	f	typeref:typename:int	file:
__dc_entire_op	arch/arc/lib/cache.c	/^#define __dc_entire_op(/;"	d	file:
__dc_entire_op	arch/arc/lib/cache.c	/^static inline void __dc_entire_op(const int cacheop)$/;"	f	typeref:typename:void	file:
__dc_line_op	arch/arc/lib/cache.c	/^#define __dc_line_op(/;"	d	file:
__dc_line_op	arch/arc/lib/cache.c	/^static inline void __dc_line_op(unsigned long paddr, unsigned long sz,$/;"	f	typeref:typename:void	file:
__ddr_clktr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^u32 __ddr_clktr(u32 default_val)$/;"	f	typeref:typename:u32
__ddr_clktr	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^u32 __ddr_clktr(u32 default_val)$/;"	f	typeref:typename:u32
__ddr_rdss_opt	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^u32 __ddr_rdss_opt(u32 default_val)$/;"	f	typeref:typename:u32
__ddr_scan_option	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^struct sdram_timing *__ddr_scan_option(struct sdram_timing *default_val)$/;"	f	typeref:struct:sdram_timing *
__ddr_wrdtr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^u32 __ddr_wrdtr(u32 default_val)$/;"	f	typeref:typename:u32
__ddr_wrdtr	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^u32 __ddr_wrdtr(u32 default_val)$/;"	f	typeref:typename:u32
__ddrphy_training	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int __ddrphy_training(void __iomem *phy_base,$/;"	f	typeref:typename:int	file:
__def_board_ft_fman_fixup_port	drivers/net/fm/init.c	/^__def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,$/;"	f	typeref:typename:void	file:
__def_eth_init	net/eth_legacy.c	/^static int __def_eth_init(bd_t *bis)$/;"	f	typeref:typename:int	file:
__def_musb_init	drivers/usb/musb/blackfin_usb.c	/^static void __def_musb_init(void)$/;"	f	typeref:typename:void	file:
__del__	scripts/fill_scrapyard.py	/^    def __del__(self):$/;"	m	class:TmpFile
__del__	tools/buildman/builder.py	/^    def __del__(self):$/;"	m	class:Builder
__del__	tools/genboardscfg.py	/^    def __del__(self):$/;"	m	class:KconfigScanner
__del__	tools/moveconfig.py	/^    def __del__(self):$/;"	m	class:ReferenceSource
__del__	tools/moveconfig.py	/^    def __del__(self):$/;"	m	class:Slot
__delay	arch/blackfin/include/asm/delay.h	/^static __inline__ void __delay(unsigned long loops)$/;"	f	typeref:typename:void
__deprecated	include/linux/compiler-gcc.h	/^#define __deprecated	/;"	d
__deprecated	include/linux/compiler.h	/^# define __deprecated	/;"	d
__deprecated	include/linux/compiler.h	/^#define __deprecated$/;"	d
__deprecated	include/linux/usb/musb.h	/^	struct musb_hdrc_eps_bits *eps_bits __deprecated;$/;"	m	struct:musb_hdrc_config	typeref:struct:musb_hdrc_eps_bits * eps_bits
__deprecated	include/linux/usb/musb.h	/^	u8		dma_channels __deprecated; \/* number of dma channels *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8 dma_channels
__deprecated	include/linux/usb/musb.h	/^	u8		dma_req_chan __deprecated; \/* bitmask for required dma channels *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8 dma_req_chan
__deprecated	include/linux/usb/musb.h	/^	u8		vendor_ctrl __deprecated; \/* vendor control reg width *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8 vendor_ctrl
__deprecated	include/linux/usb/musb.h	/^	u8		vendor_stat __deprecated; \/* vendor status reg witdh *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8 vendor_stat
__deprecated	include/linux/usb/musb.h	/^#define __deprecated$/;"	d
__deprecated_for_modules	include/linux/compiler.h	/^#define __deprecated_for_modules /;"	d
__deprecated_for_modules	include/linux/compiler.h	/^#define __deprecated_for_modules$/;"	d
__devinit	include/linux/compat.h	/^#define __devinit$/;"	d
__devinitconst	drivers/usb/musb-new/musb_dsps.c	/^static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {$/;"	v	typeref:typename:const struct dsps_musb_wrapper ti81xx_driver_data	file:
__devinitconst	include/linux/compat.h	/^#define __devinitconst$/;"	d
__devinitdata	include/linux/compat.h	/^#define __devinitdata$/;"	d
__devres_alloc	drivers/core/devres.c	/^void *__devres_alloc(dr_release_t release, size_t size, gfp_t gfp,$/;"	f	typeref:typename:void *
__dfu_get_alt	drivers/usb/gadget/f_dfu.c	/^static int __dfu_get_alt(struct usb_function *f, unsigned intf)$/;"	f	typeref:typename:int	file:
__div0	arch/arm/lib/div0.c	/^void __div0 (void)$/;"	f	typeref:typename:void
__div64_32	lib/div64.c	/^uint32_t notrace __div64_32(uint64_t *n, uint32_t base)$/;"	f	typeref:typename:uint32_t notrace
__divdi3	arch/nios2/lib/libgcc.c	/^__divdi3 (DWtype u, DWtype v)$/;"	f	typeref:typename:DWtype
__divsi3	arch/arc/lib/libgcc2.c	/^__divsi3(long a, long b)$/;"	f	typeref:typename:long
__divsi3	arch/nios2/lib/libgcc.c	/^__divsi3 (SItype a, SItype b)$/;"	f	typeref:typename:SItype
__dma_map_single	drivers/mmc/uniphier-sd.c	/^static dma_addr_t __dma_map_single(void *ptr, size_t size,$/;"	f	typeref:typename:dma_addr_t	file:
__dma_unmap_single	drivers/mmc/uniphier-sd.c	/^static void __dma_unmap_single(dma_addr_t addr, size_t size,$/;"	f	typeref:typename:void	file:
__do_irq	arch/x86/cpu/interrupts.c	/^void __do_irq(int irq)$/;"	f	typeref:typename:void
__dqsgd_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void __dqsgd_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__dqsgd_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void __dqsgd_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__dw_i2c_init	drivers/i2c/designware_i2c.c	/^static void __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
__dw_i2c_read	drivers/i2c/designware_i2c.c	/^static int __dw_i2c_read(struct i2c_regs *i2c_base, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
__dw_i2c_set_bus_speed	drivers/i2c/designware_i2c.c	/^static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,$/;"	f	typeref:typename:unsigned int	file:
__dw_i2c_write	drivers/i2c/designware_i2c.c	/^static int __dw_i2c_write(struct i2c_regs *i2c_base, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
__dwc3_cleanup_done_trbs	drivers/usb/dwc3/gadget.c	/^static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,$/;"	f	typeref:typename:int	file:
__dwc3_ep0_do_control_data	drivers/usb/dwc3/ep0.c	/^static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
__dwc3_ep0_do_control_status	drivers/usb/dwc3/ep0.c	/^static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)$/;"	f	typeref:typename:void	file:
__dwc3_gadget_ep0_queue	drivers/usb/dwc3/ep0.c	/^static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,$/;"	f	typeref:typename:int	file:
__dwc3_gadget_ep0_set_halt	drivers/usb/dwc3/ep0.c	/^int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)$/;"	f	typeref:typename:int
__dwc3_gadget_ep_disable	drivers/usb/dwc3/gadget.c	/^static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)$/;"	f	typeref:typename:int	file:
__dwc3_gadget_ep_enable	drivers/usb/dwc3/gadget.c	/^static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,$/;"	f	typeref:typename:int	file:
__dwc3_gadget_ep_queue	drivers/usb/dwc3/gadget.c	/^static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)$/;"	f	typeref:typename:int	file:
__dwc3_gadget_ep_set_halt	drivers/usb/dwc3/gadget.c	/^int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)$/;"	f	typeref:typename:int
__dwc3_gadget_kick_transfer	drivers/usb/dwc3/gadget.c	/^static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,$/;"	f	typeref:typename:int	file:
__dwc3_gadget_start_isoc	drivers/usb/dwc3/gadget.c	/^static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
__early_param	arch/nds32/include/asm/setup.h	/^#define __early_param(/;"	d
__ebp	arch/x86/include/asm/setjmp.h	/^	unsigned int __ebp;$/;"	m	struct:jmp_buf_data	typeref:typename:unsigned int
__ebx	arch/x86/include/asm/setjmp.h	/^	unsigned int __ebx;$/;"	m	struct:jmp_buf_data	typeref:typename:unsigned int
__edata_l1	arch/blackfin/cpu/u-boot.lds	/^		__edata_l1 = .;$/;"	s
__edi	arch/x86/include/asm/setjmp.h	/^	unsigned int __edi;$/;"	m	struct:jmp_buf_data	typeref:typename:unsigned int
__edma3_transfer	drivers/dma/ti-edma3.c	/^void __edma3_transfer(unsigned long edma3_base_addr, unsigned int edma_slot_num,$/;"	f	typeref:typename:void
__eeprom_field_print_bin	common/eeprom/eeprom_field.c	/^static void __eeprom_field_print_bin(const struct eeprom_field *field,$/;"	f	typeref:typename:void	file:
__eeprom_field_update_bin	common/eeprom/eeprom_field.c	/^static int __eeprom_field_update_bin(struct eeprom_field *field,$/;"	f	typeref:typename:int	file:
__eeprom_field_update_bin_delim	common/eeprom/eeprom_field.c	/^static int __eeprom_field_update_bin_delim(struct eeprom_field *field,$/;"	f	typeref:typename:int	file:
__eeprom_layout_assign	common/eeprom/eeprom_layout.c	/^__weak void __eeprom_layout_assign(struct eeprom_layout *layout,$/;"	f	typeref:typename:__weak void
__efi_runtime	include/efi_loader.h	/^#define __efi_runtime /;"	d
__efi_runtime	include/efi_loader.h	/^#define __efi_runtime$/;"	d
__efi_runtime_data	include/efi_loader.h	/^#define __efi_runtime_data /;"	d
__efi_runtime_data	include/efi_loader.h	/^#define __efi_runtime_data$/;"	d
__efi_runtime_rel_start	arch/arm/cpu/armv8/u-boot.lds	/^                __efi_runtime_rel_start = .;$/;"	s	section:.efi_runtime_rel
__efi_runtime_rel_start	arch/arm/lib/sections.c	/^char __efi_runtime_rel_start[0] __attribute__((section(".__efi_runtime_rel_start")));$/;"	v	typeref:typename:char[0]
__efi_runtime_rel_start	arch/x86/lib/sections.c	/^char __efi_runtime_rel_start[0]$/;"	v	typeref:typename:char[0]
__efi_runtime_rel_stop	arch/arm/cpu/armv8/u-boot.lds	/^                __efi_runtime_rel_stop = .;$/;"	s	section:.efi_runtime_rel
__efi_runtime_rel_stop	arch/arm/lib/sections.c	/^char __efi_runtime_rel_stop[0] __attribute__((section(".__efi_runtime_rel_stop")));$/;"	v	typeref:typename:char[0]
__efi_runtime_rel_stop	arch/x86/lib/sections.c	/^char __efi_runtime_rel_stop[0]$/;"	v	typeref:typename:char[0]
__efi_runtime_start	arch/arm/cpu/armv8/u-boot.lds	/^                __efi_runtime_start = .;$/;"	s	section:.efi_runtime
__efi_runtime_start	arch/arm/lib/sections.c	/^char __efi_runtime_start[0] __attribute__((section(".__efi_runtime_start")));$/;"	v	typeref:typename:char[0]
__efi_runtime_start	arch/x86/lib/sections.c	/^char __efi_runtime_start[0] __attribute__((section(".__efi_runtime_start")));$/;"	v	typeref:typename:char[0]
__efi_runtime_stop	arch/arm/cpu/armv8/u-boot.lds	/^                __efi_runtime_stop = .;$/;"	s	section:.efi_runtime
__efi_runtime_stop	arch/arm/lib/sections.c	/^char __efi_runtime_stop[0] __attribute__((section(".__efi_runtime_stop")));$/;"	v	typeref:typename:char[0]
__efi_runtime_stop	arch/x86/lib/sections.c	/^char __efi_runtime_stop[0] __attribute__((section(".__efi_runtime_stop")));$/;"	v	typeref:typename:char[0]
__eip	arch/x86/include/asm/setjmp.h	/^	unsigned int __eip;$/;"	m	struct:jmp_buf_data	typeref:typename:unsigned int
__enable_i2c_clk	drivers/i2c/mxc_i2c.c	/^int __enable_i2c_clk(unsigned char enable, unsigned i2c_num)$/;"	f	typeref:typename:int
__enable_vbus	drivers/usb/musb/davinci.c	/^void __enable_vbus(void)$/;"	f	typeref:typename:void
__end	arch/microblaze/cpu/u-boot-spl.lds	/^	__end = . ;$/;"	s
__end	arch/microblaze/cpu/u-boot.lds	/^	__end = . ;$/;"	s
__enter__	test/py/multiplexed_log.py	/^    def __enter__(self):$/;"	m	class:SectionCtxMgr
__enter__	test/py/u_boot_console_base.py	/^    def __enter__(self):$/;"	m	class:ConsoleDisableCheck
__enter__	test/py/u_boot_console_base.py	/^    def __enter__(self):$/;"	m	class:ConsoleSetupTimeout
__enter__	tools/patman/tout.py	/^def __enter__():$/;"	f
__enter__	tools/rkmux.py	/^    def __enter__(self):$/;"	m	class:Printer
__esi	arch/x86/include/asm/setjmp.h	/^	unsigned int __esi;$/;"	m	struct:jmp_buf_data	typeref:typename:unsigned int
__esp	arch/x86/include/asm/setjmp.h	/^	unsigned int __esp;$/;"	m	struct:jmp_buf_data	typeref:typename:unsigned int
__etext_l1	arch/blackfin/cpu/u-boot.lds	/^		__etext_l1 = .;$/;"	s
__ex_table	arch/m68k/cpu/u-boot.lds	/^	__ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	__ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	board/amcc/canyonlands/u-boot-ram.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	board/amcc/sequoia/u-boot-ram.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__ex_table	board/tqc/tqm8xx/u-boot.lds	/^  __ex_table : { *(__ex_table) }$/;"	S
__exit	include/linux/compat.h	/^#define __exit$/;"	d
__exit__	test/py/multiplexed_log.py	/^    def __exit__(self, extype, value, traceback):$/;"	m	class:SectionCtxMgr
__exit__	test/py/u_boot_console_base.py	/^    def __exit__(self, extype, value, traceback):$/;"	m	class:ConsoleDisableCheck
__exit__	test/py/u_boot_console_base.py	/^    def __exit__(self, extype, value, traceback):$/;"	m	class:ConsoleSetupTimeout
__exit__	tools/patman/tout.py	/^def __exit__(unused1, unused2, unused3):$/;"	f
__exit__	tools/rkmux.py	/^    def __exit__(self, type, value, traceback):$/;"	m	class:Printer
__expr_eliminate_eq	scripts/kconfig/expr.c	/^static void __expr_eliminate_eq(enum expr_type type, struct expr **ep1, struct expr **ep2)$/;"	f	typeref:typename:void	file:
__externC	include/crc.h	/^#  define __externC /;"	d
__fdt_set_hdr	include/libfdt.h	/^#define __fdt_set_hdr(/;"	d
__fdtdec_h	include/fdtdec.h	/^#define __fdtdec_h$/;"	d
__ffs	arch/m68k/include/asm/bitops.h	/^#define __ffs(/;"	d
__ffs	arch/x86/include/asm/bitops.h	/^static inline unsigned long __ffs(unsigned long word)$/;"	f	typeref:typename:unsigned long
__ffs	include/asm-generic/bitops/__ffs.h	/^static __always_inline unsigned long __ffs(unsigned long word)$/;"	f	typeref:typename:__always_inline unsigned long
__ffs64	include/linux/bitops.h	/^static inline unsigned long __ffs64(u64 word)$/;"	f	typeref:typename:unsigned long
__fixup_entries	arch/m68k/cpu/u-boot.lds	/^	__fixup_entries = (. - _FIXUP_TABLE_)>>2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_)>>2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;$/;"	s
__fixup_entries	board/amcc/canyonlands/u-boot-ram.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_)>>2;$/;"	s
__fixup_entries	board/amcc/sequoia/u-boot-ram.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_)>>2;$/;"	s
__fixup_entries	board/tqc/tqm8xx/u-boot.lds	/^  __fixup_entries = (. - _FIXUP_TABLE_)>>2;$/;"	s
__flash_cmd_reset	drivers/mtd/cfi_flash.c	/^static void __flash_cmd_reset(flash_info_t *info)$/;"	f	typeref:typename:void	file:
__flash_detect_cfi	drivers/mtd/cfi_flash.c	/^static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)$/;"	f	typeref:typename:int	file:
__flash_get_bank_size	common/fdt_support.c	/^u32 __flash_get_bank_size(int cs, int idx)$/;"	f	typeref:typename:u32
__fls	include/asm-generic/bitops/__fls.h	/^static __always_inline unsigned long __fls(unsigned long word)$/;"	f	typeref:typename:__always_inline unsigned long
__flush_dcache	arch/nios2/lib/cache.c	/^static void __flush_dcache(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void	file:
__flush_dcache_all	arch/nios2/lib/cache.c	/^static void __flush_dcache_all(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void	file:
__flush_icache	arch/nios2/lib/cache.c	/^static void __flush_icache(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void	file:
__force	include/linux/compiler.h	/^# define __force	/;"	d
__force	include/linux/compiler.h	/^# define __force$/;"	d
__fsg_is_set	drivers/usb/gadget/f_mass_storage.c	/^static inline int __fsg_is_set(struct fsg_common *common,$/;"	f	typeref:typename:int	file:
__fsl_ddr_sdram	drivers/ddr/fsl/main.c	/^phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo)$/;"	f	typeref:typename:phys_size_t
__fsl_ddr_set_lawbar	drivers/ddr/fsl/util.c	/^__fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params,$/;"	f	typeref:typename:void
__fsl_serdes__init	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^static void __fsl_serdes__init(void)$/;"	f	typeref:typename:void	file:
__fswab16	include/linux/byteorder/swab.h	/^static __inline__ __attribute__((const)) __u16 __fswab16(__u16 x)$/;"	f	typeref:typename:__u16
__fswab32	include/linux/byteorder/swab.h	/^static __inline__ __attribute__((const)) __u32 __fswab32(__u32 x)$/;"	f	typeref:typename:__u32
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__ft_board_setup	arch/powerpc/cpu/ppc4xx/fdt.c	/^int __ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
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__get_unaligned_be32	include/linux/unaligned/be_byteshift.h	/^static inline u32 __get_unaligned_be32(const u8 *p)$/;"	f	typeref:typename:u32
__get_unaligned_be64	include/linux/unaligned/be_byteshift.h	/^static inline u64 __get_unaligned_be64(const u8 *p)$/;"	f	typeref:typename:u64
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__get_unaligned_cpu64	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u64 __get_unaligned_cpu64(const u8 *p)$/;"	f	typeref:typename:u64
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__got2_entries	arch/m68k/cpu/u-boot.lds	/^	__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;$/;"	s
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__got2_entries	board/tqc/tqm8xx/u-boot.lds	/^  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;$/;"	s
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__gpio_direction_input	drivers/gpio/adi_gpio2.c	/^static inline void __gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:void	file:
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__i2c_init	drivers/i2c/fsl_i2c.c	/^static void __i2c_init(const struct fsl_i2c_base *base, int speed, int$/;"	f	typeref:typename:void	file:
__i2c_probe_chip	drivers/i2c/fsl_i2c.c	/^__i2c_probe_chip(const struct fsl_i2c_base *base, uchar chip)$/;"	f	typeref:typename:int	file:
__i2c_probe_chip	drivers/i2c/mv_i2c.c	/^static int __i2c_probe_chip(struct mv_i2c *base, uchar chip)$/;"	f	typeref:typename:int	file:
__i2c_read	drivers/i2c/fsl_i2c.c	/^__i2c_read(const struct fsl_i2c_base *base, u8 chip_addr, u8 *offset, int olen,$/;"	f	typeref:typename:int	file:
__i2c_read	drivers/i2c/mv_i2c.c	/^static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen,$/;"	f	typeref:typename:int	file:
__i2c_read_data	drivers/i2c/fsl_i2c.c	/^__i2c_read_data(const struct fsl_i2c_base *base, u8 *data, int length)$/;"	f	typeref:typename:int	file:
__i2c_set_bus_speed	drivers/i2c/fsl_i2c.c	/^static unsigned int __i2c_set_bus_speed(const struct fsl_i2c_base *base,$/;"	f	typeref:typename:unsigned int	file:
__i2c_write	drivers/i2c/fsl_i2c.c	/^__i2c_write(const struct fsl_i2c_base *base, u8 chip_addr, u8 *offset, int olen,$/;"	f	typeref:typename:int	file:
__i2c_write	drivers/i2c/mv_i2c.c	/^static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,$/;"	f	typeref:typename:int	file:
__i2c_write_data	drivers/i2c/fsl_i2c.c	/^__i2c_write_data(const struct fsl_i2c_base *base, u8 *data, int length)$/;"	f	typeref:typename:int	file:
__i_nlink	fs/ubifs/ubifs.h	/^		unsigned int __i_nlink;$/;"	m	union:inode::__anonf648d084020a	typeref:typename:unsigned int
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__idt_handler	arch/x86/lib/bios_asm.S	/^__idt_handler:$/;"	l
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__ilog2	arch/arm/include/asm/bitops.h	/^static inline int __ilog2(unsigned int x)$/;"	f	typeref:typename:int
__ilog2	arch/mips/mach-au1x00/include/mach/au1x00.h	/^static __inline__ int __ilog2(unsigned int x)$/;"	f	typeref:typename:int
__ilog2	arch/powerpc/include/asm/bitops.h	/^static __inline__ int __ilog2(unsigned int x)$/;"	f	typeref:typename:int
__ilog2	arch/x86/include/asm/bitops.h	/^static inline int __ilog2(unsigned int x)$/;"	f	typeref:typename:int
__ilog2_roundup_64	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static inline int __ilog2_roundup_64(uint64_t val)$/;"	f	typeref:typename:int	file:
__ilog2_u32	include/linux/log2.h	/^int __ilog2_u32(u32 n)$/;"	f	typeref:typename:int
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__image_copy_end	arch/arm/cpu/armv7/sunxi/u-boot-spl.lds	/^	__image_copy_end = .;$/;"	s
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__image_copy_end	arch/mips/cpu/u-boot-spl.lds	/^	__image_copy_end = .;$/;"	s
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__kernel_gid16_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned short __kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/mips/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned short __kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid16_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid32_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned int		__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned int		__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned int __kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_gid32_t;$/;"	t	typeref:typename:int
__kernel_gid32_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned int		__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned int		__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid32_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned int		__kernel_gid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned int __kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_gid_t;$/;"	t	typeref:typename:int
__kernel_gid_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_gid_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_gid_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ino64_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned long long __kernel_ino64_t;$/;"	t	typeref:typename:unsigned long long
__kernel_ino64_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned long long __kernel_ino64_t;$/;"	t	typeref:typename:unsigned long long
__kernel_ino_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned long		__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned long		__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned long __kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_ino_t;$/;"	t	typeref:typename:unsigned int
__kernel_ino_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/mips/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned long		__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_ino_t;$/;"	t	typeref:typename:unsigned int
__kernel_ino_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned long		__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_ino_t;$/;"	t	typeref:typename:unsigned int
__kernel_ino_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned long	__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ino_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned long		__kernel_ino_t;$/;"	t	typeref:typename:unsigned long
__kernel_ipc_pid_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned int __kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned int
__kernel_ipc_pid_t	arch/m68k/include/asm/posix_types.h	/^typedef short             __kernel_ipc_pid_t;$/;"	t	typeref:typename:short
__kernel_ipc_pid_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned short	__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_ipc_pid_t;$/;"	t	typeref:typename:int
__kernel_ipc_pid_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/powerpc/include/asm/posix_types.h	/^typedef short             __kernel_ipc_pid_t;$/;"	t	typeref:typename:short
__kernel_ipc_pid_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/sparc/include/asm/posix_types.h	/^typedef short __kernel_ipc_pid_t;$/;"	t	typeref:typename:short
__kernel_ipc_pid_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_ipc_pid_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_ipc_pid_t;$/;"	t	typeref:typename:unsigned short
__kernel_key_t	include/linux/posix_types.h	/^typedef int __kernel_key_t;$/;"	t	typeref:typename:int
__kernel_loff_t	arch/arc/include/asm/posix_types.h	/^typedef long long		__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/arm/include/asm/posix_types.h	/^typedef long long		__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/avr32/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/blackfin/include/asm/posix_types.h	/^typedef long long __kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/m68k/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/microblaze/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/mips/include/asm/posix_types.h	/^typedef long long      __kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/nds32/include/asm/posix_types.h	/^typedef long long		__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/nios2/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/openrisc/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/powerpc/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/sandbox/include/asm/posix_types.h	/^typedef long long		__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/sh/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/sparc/include/asm/posix_types.h	/^typedef long long __kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/x86/include/asm/posix_types.h	/^typedef long long	__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_loff_t	arch/xtensa/include/asm/posix_types.h	/^typedef long long		__kernel_loff_t;$/;"	t	typeref:typename:long long
__kernel_mode_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned short __kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_mode_t;$/;"	t	typeref:typename:unsigned int
__kernel_mode_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_mode_t;$/;"	t	typeref:typename:unsigned int
__kernel_mode_t	arch/mips/include/asm/posix_types.h	/^typedef unsigned int	__kernel_mode_t;$/;"	t	typeref:typename:unsigned int
__kernel_mode_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_mode_t;$/;"	t	typeref:typename:unsigned int
__kernel_mode_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_mode_t;$/;"	t	typeref:typename:unsigned int
__kernel_mode_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_mode_t;$/;"	t	typeref:typename:unsigned int
__kernel_mode_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_mode_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_mode_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned short __kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned short	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned int
__kernel_nlink_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_nlink_t;$/;"	t	typeref:typename:int
__kernel_nlink_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned int
__kernel_nlink_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned short __kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_nlink_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_nlink_t;$/;"	t	typeref:typename:unsigned short
__kernel_off_t	arch/arc/include/asm/posix_types.h	/^typedef long			__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/arm/include/asm/posix_types.h	/^typedef long			__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/avr32/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/blackfin/include/asm/posix_types.h	/^typedef long __kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/m68k/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/microblaze/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/mips/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/nds32/include/asm/posix_types.h	/^typedef long			__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/nios2/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/openrisc/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/powerpc/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/sandbox/include/asm/posix_types.h	/^typedef long			__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/sh/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/sparc/include/asm/posix_types.h	/^typedef long __kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/x86/include/asm/posix_types.h	/^typedef long		__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_off_t	arch/xtensa/include/asm/posix_types.h	/^typedef long			__kernel_off_t;$/;"	t	typeref:typename:long
__kernel_old_dev_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_dev_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_dev_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_dev_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned short __kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_old_gid_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/mips/include/asm/posix_types.h	/^typedef __kernel_gid_t	__kernel_old_gid_t;$/;"	t	typeref:typename:__kernel_gid_t
__kernel_old_gid_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_old_gid_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_old_gid_t;$/;"	t	typeref:typename:unsigned int
__kernel_old_gid_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_gid_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_gid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned short __kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_old_uid_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/mips/include/asm/posix_types.h	/^typedef __kernel_uid_t	__kernel_old_uid_t;$/;"	t	typeref:typename:__kernel_uid_t
__kernel_old_uid_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_old_uid_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_old_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_old_uid_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_old_uid_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_old_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_pid_t	arch/arc/include/asm/posix_types.h	/^typedef int			__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/arm/include/asm/posix_types.h	/^typedef int			__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/avr32/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/blackfin/include/asm/posix_types.h	/^typedef int __kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/m68k/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/microblaze/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/nds32/include/asm/posix_types.h	/^typedef int			__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/nios2/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/openrisc/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/powerpc/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/sandbox/include/asm/posix_types.h	/^typedef int			__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/sh/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/sparc/include/asm/posix_types.h	/^typedef int __kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/x86/include/asm/posix_types.h	/^typedef int		__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_pid_t	arch/xtensa/include/asm/posix_types.h	/^typedef int			__kernel_pid_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/arc/include/asm/posix_types.h	/^typedef int			__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/arm/include/asm/posix_types.h	/^typedef int			__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/arm/include/asm/posix_types.h	/^typedef long			__kernel_ptrdiff_t;$/;"	t	typeref:typename:long
__kernel_ptrdiff_t	arch/avr32/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/blackfin/include/asm/posix_types.h	/^typedef int __kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/m68k/include/asm/posix_types.h	/^typedef long		__kernel_ptrdiff_t;$/;"	t	typeref:typename:long
__kernel_ptrdiff_t	arch/microblaze/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/mips/include/asm/posix_types.h	/^typedef long		__kernel_ptrdiff_t;$/;"	t	typeref:typename:long
__kernel_ptrdiff_t	arch/nds32/include/asm/posix_types.h	/^typedef int			__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/nios2/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/openrisc/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/powerpc/include/asm/posix_types.h	/^typedef long		__kernel_ptrdiff_t;$/;"	t	typeref:typename:long
__kernel_ptrdiff_t	arch/sandbox/include/asm/posix_types.h	/^typedef int			__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/sandbox/include/asm/posix_types.h	/^typedef long			__kernel_ptrdiff_t;$/;"	t	typeref:typename:long
__kernel_ptrdiff_t	arch/sh/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/sparc/include/asm/posix_types.h	/^typedef long __kernel_ptrdiff_t;$/;"	t	typeref:typename:long
__kernel_ptrdiff_t	arch/x86/include/asm/posix_types.h	/^typedef int		__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_ptrdiff_t	arch/xtensa/include/asm/posix_types.h	/^typedef int			__kernel_ptrdiff_t;$/;"	t	typeref:typename:int
__kernel_sighandler_t	include/linux/posix_types.h	/^typedef void (*__kernel_sighandler_t)(int);$/;"	t	typeref:typename:void (*)(int)
__kernel_size_t	arch/arc/include/asm/posix_types.h	/^typedef __SIZE_TYPE__		__kernel_size_t;$/;"	t	typeref:typename:__SIZE_TYPE__
__kernel_size_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned int		__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned int		__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned long		__kernel_size_t;$/;"	t	typeref:typename:unsigned long
__kernel_size_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned long	__kernel_size_t;$/;"	t	typeref:typename:unsigned long
__kernel_size_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned long __kernel_size_t;$/;"	t	typeref:typename:unsigned long
__kernel_size_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/microblaze/include/asm/posix_types.h	/^typedef __SIZE_TYPE__  __kernel_size_t;$/;"	t	typeref:typename:__SIZE_TYPE__
__kernel_size_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/mips/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/mips/include/asm/posix_types.h	/^typedef unsigned long	__kernel_size_t;$/;"	t	typeref:typename:unsigned long
__kernel_size_t	arch/nds32/include/asm/posix_types.h	/^typedef __SIZE_TYPE__		__kernel_size_t;$/;"	t	typeref:typename:__SIZE_TYPE__
__kernel_size_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned int		__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/nios2/include/asm/posix_types.h	/^typedef __SIZE_TYPE__	__kernel_size_t;$/;"	t	typeref:typename:__SIZE_TYPE__
__kernel_size_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned long	__kernel_size_t;$/;"	t	typeref:typename:unsigned long
__kernel_size_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned int		__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned long		__kernel_size_t;$/;"	t	typeref:typename:unsigned long
__kernel_size_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned int	__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_size_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned int		__kernel_size_t;$/;"	t	typeref:typename:unsigned int
__kernel_ssize_t	arch/arc/include/asm/posix_types.h	/^typedef int			__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/arm/include/asm/posix_types.h	/^typedef int			__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/arm/include/asm/posix_types.h	/^typedef long			__kernel_ssize_t;$/;"	t	typeref:typename:long
__kernel_ssize_t	arch/avr32/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/blackfin/include/asm/posix_types.h	/^typedef long __kernel_ssize_t;$/;"	t	typeref:typename:long
__kernel_ssize_t	arch/m68k/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/microblaze/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/mips/include/asm/posix_types.h	/^typedef long		__kernel_ssize_t;$/;"	t	typeref:typename:long
__kernel_ssize_t	arch/nds32/include/asm/posix_types.h	/^typedef int			__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/nios2/include/asm/posix_types.h	/^typedef long		__kernel_ssize_t;$/;"	t	typeref:typename:long
__kernel_ssize_t	arch/openrisc/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/powerpc/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/sandbox/include/asm/posix_types.h	/^typedef int			__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/sandbox/include/asm/posix_types.h	/^typedef long			__kernel_ssize_t;$/;"	t	typeref:typename:long
__kernel_ssize_t	arch/sh/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/sparc/include/asm/posix_types.h	/^typedef int __kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/x86/include/asm/posix_types.h	/^typedef int		__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_ssize_t	arch/xtensa/include/asm/posix_types.h	/^typedef int			__kernel_ssize_t;$/;"	t	typeref:typename:int
__kernel_suseconds_t	arch/arc/include/asm/posix_types.h	/^typedef long			__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/arm/include/asm/posix_types.h	/^typedef long			__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/avr32/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/blackfin/include/asm/posix_types.h	/^typedef long __kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/m68k/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/microblaze/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/mips/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/nds32/include/asm/posix_types.h	/^typedef long			__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/nios2/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/openrisc/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/powerpc/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/sandbox/include/asm/posix_types.h	/^typedef long			__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/sh/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/sparc/include/asm/posix_types.h	/^typedef long __kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/x86/include/asm/posix_types.h	/^typedef long		__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_suseconds_t	arch/xtensa/include/asm/posix_types.h	/^typedef long			__kernel_suseconds_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/arc/include/asm/posix_types.h	/^typedef long			__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/arm/include/asm/posix_types.h	/^typedef long			__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/avr32/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/blackfin/include/asm/posix_types.h	/^typedef long __kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/m68k/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/microblaze/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/mips/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/nds32/include/asm/posix_types.h	/^typedef long			__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/nios2/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/openrisc/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/powerpc/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/sandbox/include/asm/posix_types.h	/^typedef long			__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/sh/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/sparc/include/asm/posix_types.h	/^typedef long __kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/x86/include/asm/posix_types.h	/^typedef long		__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_time_t	arch/xtensa/include/asm/posix_types.h	/^typedef long			__kernel_time_t;$/;"	t	typeref:typename:long
__kernel_timer_t	arch/avr32/include/asm/posix_types.h	/^typedef int		__kernel_timer_t;$/;"	t	typeref:typename:int
__kernel_timer_t	arch/blackfin/include/asm/posix_types.h	/^typedef int __kernel_timer_t;$/;"	t	typeref:typename:int
__kernel_timer_t	arch/sh/include/asm/posix_types.h	/^typedef int		__kernel_timer_t;$/;"	t	typeref:typename:int
__kernel_uid16_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned short __kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/mips/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned short __kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid16_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid16_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid32_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned int		__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned int		__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned int __kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_uid32_t;$/;"	t	typeref:typename:int
__kernel_uid32_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned int		__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned int		__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid32_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned int		__kernel_uid32_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/arc/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/arm/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/avr32/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/blackfin/include/asm/posix_types.h	/^typedef unsigned int __kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/m68k/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/microblaze/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/mips/include/asm/posix_types.h	/^typedef int		__kernel_uid_t;$/;"	t	typeref:typename:int
__kernel_uid_t	arch/nds32/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/nios2/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/openrisc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/powerpc/include/asm/posix_types.h	/^typedef unsigned int	__kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/sandbox/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/sh/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/sparc/include/asm/posix_types.h	/^typedef unsigned int __kernel_uid_t;$/;"	t	typeref:typename:unsigned int
__kernel_uid_t	arch/x86/include/asm/posix_types.h	/^typedef unsigned short	__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kernel_uid_t	arch/xtensa/include/asm/posix_types.h	/^typedef unsigned short		__kernel_uid_t;$/;"	t	typeref:typename:unsigned short
__kprobes	include/linux/compiler.h	/^# define __kprobes	/;"	d
__kprobes	include/linux/compiler.h	/^# define __kprobes$/;"	d
__large_struct	arch/sh/include/asm/cache.h	/^struct __large_struct { unsigned long buf[100]; };$/;"	s
__last	arch/mips/include/asm/ptrace.h	/^	unsigned long __last[0];$/;"	m	struct:pt_regs	typeref:typename:unsigned long[0]
__lbc_sdram_init	arch/powerpc/cpu/mpc8xxx/fsl_lbc.c	/^static void __lbc_sdram_init(void)$/;"	f	typeref:typename:void	file:
__lcall_instr	arch/x86/lib/bios_asm.S	/^__lcall_instr = PTR_TO_REAL_MODE(.)$/;"	d
__ldiv_t_defined	board/mpl/mip405/mip405.c	/^# define __ldiv_t_defined	/;"	d	file:
__ldiv_t_defined	board/mpl/pip405/pip405.c	/^# define __ldiv_t_defined	/;"	d	file:
__ldiv_t_defined	disk/part_mac.c	/^# define __ldiv_t_defined	/;"	d	file:
__le16	include/linux/types.h	/^typedef __u16 __bitwise __le16;$/;"	t	typeref:typename:__u16 __bitwise
__le16_to_cpu	include/linux/byteorder/big_endian.h	/^#define __le16_to_cpu(/;"	d
__le16_to_cpu	include/linux/byteorder/little_endian.h	/^#define __le16_to_cpu(/;"	d
__le16_to_cpup	include/linux/byteorder/big_endian.h	/^static inline __u16 __le16_to_cpup(const __le16 *p)$/;"	f	typeref:typename:__u16
__le16_to_cpup	include/linux/byteorder/little_endian.h	/^static inline __u16 __le16_to_cpup(const __le16 *p)$/;"	f	typeref:typename:__u16
__le16_to_cpus	include/linux/byteorder/big_endian.h	/^#define __le16_to_cpus(/;"	d
__le16_to_cpus	include/linux/byteorder/little_endian.h	/^#define __le16_to_cpus(/;"	d
__le32	include/linux/types.h	/^typedef __u32 __bitwise __le32;$/;"	t	typeref:typename:__u32 __bitwise
__le32_to_cpu	include/linux/byteorder/big_endian.h	/^#define __le32_to_cpu(/;"	d
__le32_to_cpu	include/linux/byteorder/little_endian.h	/^#define __le32_to_cpu(/;"	d
__le32_to_cpup	include/linux/byteorder/big_endian.h	/^static inline __u32 __le32_to_cpup(const __le32 *p)$/;"	f	typeref:typename:__u32
__le32_to_cpup	include/linux/byteorder/little_endian.h	/^static inline __u32 __le32_to_cpup(const __le32 *p)$/;"	f	typeref:typename:__u32
__le32_to_cpus	include/linux/byteorder/big_endian.h	/^#define __le32_to_cpus(/;"	d
__le32_to_cpus	include/linux/byteorder/little_endian.h	/^#define __le32_to_cpus(/;"	d
__le64	include/linux/types.h	/^typedef __u64 __bitwise __le64;$/;"	t	typeref:typename:__u64 __bitwise
__le64_to_cpu	include/linux/byteorder/big_endian.h	/^#define __le64_to_cpu(/;"	d
__le64_to_cpu	include/linux/byteorder/little_endian.h	/^#define __le64_to_cpu(/;"	d
__le64_to_cpup	include/linux/byteorder/big_endian.h	/^static inline __u64 __le64_to_cpup(const __le64 *p)$/;"	f	typeref:typename:__u64
__le64_to_cpup	include/linux/byteorder/little_endian.h	/^static inline __u64 __le64_to_cpup(const __le64 *p)$/;"	f	typeref:typename:__u64
__le64_to_cpus	include/linux/byteorder/big_endian.h	/^#define __le64_to_cpus(/;"	d
__le64_to_cpus	include/linux/byteorder/little_endian.h	/^#define __le64_to_cpus(/;"	d
__led_blink	cmd/led.c	/^void __weak __led_blink(led_id_t mask, int freq)$/;"	f	typeref:typename:void __weak
__led_blink	drivers/misc/pca9551_led.c	/^void __led_blink(led_id_t mask, int freq)$/;"	f	typeref:typename:void
__led_init	arch/arm/cpu/arm920t/ep93xx/led.c	/^void __led_init(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_init	arch/powerpc/include/asm/status_led.h	/^static inline void __led_init (led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_init	board/BuS/eb_cpu5282/eb_cpu5282.c	/^void __led_init(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_init	board/corscience/tricorder/led.c	/^void __led_init(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_init	board/motionpro/motionpro.c	/^void __led_init(led_id_t regaddr, int state)$/;"	f	typeref:typename:void
__led_init	board/ti/beagle/led.c	/^void __led_init (led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_init	drivers/misc/gpio_led.c	/^void __led_init(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_init	drivers/misc/pca9551_led.c	/^void __led_init(led_id_t id, int state)$/;"	f	typeref:typename:void
__led_init	include/configs/v38b.h	/^#define __led_init(/;"	d
__led_set	arch/arm/cpu/arm920t/ep93xx/led.c	/^void __led_set(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	arch/powerpc/include/asm/status_led.h	/^static inline void __led_set (led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	board/BuS/eb_cpu5282/eb_cpu5282.c	/^void __led_set(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	board/corscience/tricorder/led.c	/^void __led_set(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	board/motionpro/motionpro.c	/^void __led_set(led_id_t regaddr, int state)$/;"	f	typeref:typename:void
__led_set	board/ti/beagle/led.c	/^void __led_set (led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	drivers/misc/gpio_led.c	/^void __led_set(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	drivers/misc/pca9551_led.c	/^void __led_set(led_id_t mask, int state)$/;"	f	typeref:typename:void
__led_set	include/configs/v38b.h	/^#define __led_set(/;"	d
__led_toggle	arch/arm/cpu/arm920t/ep93xx/led.c	/^void __led_toggle(led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	arch/powerpc/include/asm/status_led.h	/^static inline void __led_toggle (led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	board/BuS/eb_cpu5282/eb_cpu5282.c	/^void __led_toggle(led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	board/corscience/tricorder/led.c	/^void __led_toggle(led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	board/motionpro/motionpro.c	/^void __led_toggle(led_id_t regaddr)$/;"	f	typeref:typename:void
__led_toggle	board/ti/beagle/led.c	/^void __led_toggle (led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	drivers/misc/gpio_led.c	/^void __led_toggle(led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	drivers/misc/pca9551_led.c	/^void __led_toggle(led_id_t mask)$/;"	f	typeref:typename:void
__led_toggle	include/configs/v38b.h	/^#define __led_toggle(/;"	d
__linux_crc8_h	include/linux/crc8.h	/^#define __linux_crc8_h$/;"	d
__linux_video_edid_h__	arch/x86/include/asm/video/edid.h	/^#define __linux_video_edid_h__$/;"	d
__list_add	include/linux/list.h	/^static inline void __list_add(struct list_head *new,$/;"	f	typeref:typename:void
__list_add	scripts/kconfig/list.h	/^static inline void __list_add(struct list_head *_new,$/;"	f	typeref:typename:void
__list_cut_position	include/linux/list.h	/^static inline void __list_cut_position(struct list_head *list,$/;"	f	typeref:typename:void
__list_del	include/linux/list.h	/^static inline void __list_del(struct list_head *prev, struct list_head *next)$/;"	f	typeref:typename:void
__list_del	scripts/kconfig/list.h	/^static inline void __list_del(struct list_head *prev, struct list_head *next)$/;"	f	typeref:typename:void
__list_for_each	include/linux/list.h	/^#define __list_for_each(/;"	d
__list_splice	include/linux/list.h	/^static inline void __list_splice(const struct list_head *list,$/;"	f	typeref:typename:void
__ll_B	arch/blackfin/lib/muldi3.c	/^#define __ll_B /;"	d	file:
__ll_B	arch/m68k/lib/muldi3.c	/^#define __ll_B /;"	d	file:
__ll_B	arch/microblaze/lib/muldi3.c	/^#define __ll_B /;"	d	file:
__ll_B	arch/nios2/lib/longlong.h	/^#define __ll_B /;"	d
__ll_highpart	arch/blackfin/lib/muldi3.c	/^#define __ll_highpart(/;"	d	file:
__ll_highpart	arch/m68k/lib/muldi3.c	/^#define __ll_highpart(/;"	d	file:
__ll_highpart	arch/microblaze/lib/muldi3.c	/^#define __ll_highpart(/;"	d	file:
__ll_highpart	arch/nios2/lib/longlong.h	/^#define __ll_highpart(/;"	d
__ll_lowpart	arch/blackfin/lib/muldi3.c	/^#define __ll_lowpart(/;"	d	file:
__ll_lowpart	arch/m68k/lib/muldi3.c	/^#define __ll_lowpart(/;"	d	file:
__ll_lowpart	arch/microblaze/lib/muldi3.c	/^#define __ll_lowpart(/;"	d	file:
__ll_lowpart	arch/nios2/lib/longlong.h	/^#define __ll_lowpart(/;"	d
__lmb_alloc_base	lib/lmb.c	/^phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align, phys_addr_t max_add/;"	f	typeref:typename:phys_addr_t
__logbuffer_base	cmd/log.c	/^unsigned long __logbuffer_base(void)$/;"	f	typeref:typename:unsigned long
__lshrdi3	arch/arc/lib/libgcc2.c	/^__lshrdi3(DWtype u, shift_count_type b)$/;"	f	typeref:typename:DWtype
__lshrdi3	arch/m68k/lib/lshrdi3.c	/^DItype __lshrdi3 (DItype u, word_type b)$/;"	f	typeref:typename:DItype
__lshrdi3	arch/mips/lib/lshrdi3.c	/^long long __lshrdi3(long long u, word_type b)$/;"	f	typeref:typename:long long
__lshrdi3	arch/nios2/lib/libgcc.c	/^__lshrdi3 (DWtype u, word_type b)$/;"	f	typeref:typename:DWtype
__lshrdi3	arch/powerpc/lib/_lshrdi3.S	/^__lshrdi3:$/;"	l
__lshrdi3	arch/sh/lib/lshrdi3.c	/^long long __lshrdi3(long long u, word_type b)$/;"	f	typeref:typename:long long
__lshrsi3	arch/sh/lib/lshrsi3.S	/^__lshrsi3:$/;"	l
__lshrsi3_0	arch/sh/lib/lshrsi3.S	/^__lshrsi3_0:$/;"	l
__lshrsi3_1	arch/sh/lib/lshrsi3.S	/^__lshrsi3_1:$/;"	l
__lshrsi3_10	arch/sh/lib/lshrsi3.S	/^__lshrsi3_10:$/;"	l
__lshrsi3_11	arch/sh/lib/lshrsi3.S	/^__lshrsi3_11:$/;"	l
__lshrsi3_12	arch/sh/lib/lshrsi3.S	/^__lshrsi3_12:$/;"	l
__lshrsi3_13	arch/sh/lib/lshrsi3.S	/^__lshrsi3_13:$/;"	l
__lshrsi3_14	arch/sh/lib/lshrsi3.S	/^__lshrsi3_14:$/;"	l
__lshrsi3_15	arch/sh/lib/lshrsi3.S	/^__lshrsi3_15:$/;"	l
__lshrsi3_16	arch/sh/lib/lshrsi3.S	/^__lshrsi3_16:$/;"	l
__lshrsi3_17	arch/sh/lib/lshrsi3.S	/^__lshrsi3_17:$/;"	l
__lshrsi3_18	arch/sh/lib/lshrsi3.S	/^__lshrsi3_18:$/;"	l
__lshrsi3_19	arch/sh/lib/lshrsi3.S	/^__lshrsi3_19:$/;"	l
__lshrsi3_2	arch/sh/lib/lshrsi3.S	/^__lshrsi3_2:$/;"	l
__lshrsi3_20	arch/sh/lib/lshrsi3.S	/^__lshrsi3_20:$/;"	l
__lshrsi3_21	arch/sh/lib/lshrsi3.S	/^__lshrsi3_21:$/;"	l
__lshrsi3_22	arch/sh/lib/lshrsi3.S	/^__lshrsi3_22:$/;"	l
__lshrsi3_23	arch/sh/lib/lshrsi3.S	/^__lshrsi3_23:$/;"	l
__lshrsi3_24	arch/sh/lib/lshrsi3.S	/^__lshrsi3_24:$/;"	l
__lshrsi3_25	arch/sh/lib/lshrsi3.S	/^__lshrsi3_25:$/;"	l
__lshrsi3_26	arch/sh/lib/lshrsi3.S	/^__lshrsi3_26:$/;"	l
__lshrsi3_27	arch/sh/lib/lshrsi3.S	/^__lshrsi3_27:$/;"	l
__lshrsi3_28	arch/sh/lib/lshrsi3.S	/^__lshrsi3_28:$/;"	l
__lshrsi3_29	arch/sh/lib/lshrsi3.S	/^__lshrsi3_29:$/;"	l
__lshrsi3_3	arch/sh/lib/lshrsi3.S	/^__lshrsi3_3:$/;"	l
__lshrsi3_30	arch/sh/lib/lshrsi3.S	/^__lshrsi3_30:$/;"	l
__lshrsi3_31	arch/sh/lib/lshrsi3.S	/^__lshrsi3_31:$/;"	l
__lshrsi3_4	arch/sh/lib/lshrsi3.S	/^__lshrsi3_4:$/;"	l
__lshrsi3_5	arch/sh/lib/lshrsi3.S	/^__lshrsi3_5:$/;"	l
__lshrsi3_6	arch/sh/lib/lshrsi3.S	/^__lshrsi3_6:$/;"	l
__lshrsi3_7	arch/sh/lib/lshrsi3.S	/^__lshrsi3_7:$/;"	l
__lshrsi3_8	arch/sh/lib/lshrsi3.S	/^__lshrsi3_8:$/;"	l
__lshrsi3_9	arch/sh/lib/lshrsi3.S	/^__lshrsi3_9:$/;"	l
__lshrsi3_table	arch/sh/lib/lshrsi3.S	/^__lshrsi3_table:$/;"	l
__m	arch/sh/include/asm/cache.h	/^#define __m(/;"	d
__maybe_unused	arch/arm/mach-mvebu/mbus.c	/^armada_370_xp_mbus_data __maybe_unused = {$/;"	v	typeref:typename:const struct mvebu_mbus_soc_data armada_370_xp_mbus_data	file:
__maybe_unused	arch/arm/mach-mvebu/mbus.c	/^kirkwood_mbus_data __maybe_unused = {$/;"	v	typeref:typename:const struct mvebu_mbus_soc_data kirkwood_mbus_data	file:
__maybe_unused	common/image.c	/^# define __maybe_unused	/;"	d	file:
__maybe_unused	include/linux/compiler-gcc.h	/^#define __maybe_unused	/;"	d
__maybe_unused	include/linux/compiler.h	/^# define __maybe_unused	/;"	d
__maybe_weak	drivers/mtd/cfi_flash.c	/^#define __maybe_weak /;"	d	file:
__mdelay	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure __mdelay(u32 ms)$/;"	f	typeref:typename:void __secure	file:
__mdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void __mdl_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__mdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void __mdl_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__mem_ioswabb	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define __mem_ioswabb(/;"	d
__mem_ioswabl	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define __mem_ioswabl(/;"	d
__mem_ioswabq	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define __mem_ioswabq(/;"	d
__mem_ioswabw	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define __mem_ioswabw(/;"	d
__mem_pci	include/configs/r2dplus.h	/^#define __mem_pci$/;"	d
__mem_pci	include/configs/r7780mp.h	/^#define __mem_pci$/;"	d
__mii_init	arch/powerpc/cpu/mpc8xx/fec.c	/^static void __mii_init(void)$/;"	f	typeref:typename:void	file:
__mii_init	drivers/net/mcfmii.c	/^void __mii_init(void)$/;"	f	typeref:typename:void
__mm_fault_entry	arch/arm/lib/vectors_m.S	/^__mm_fault_entry:$/;"	l
__moddi3	arch/nios2/lib/libgcc.c	/^__moddi3 (DWtype u, DWtype v)$/;"	f	typeref:typename:DWtype
__modsi3	arch/arc/lib/libgcc2.c	/^__modsi3(long a, long b)$/;"	f	typeref:typename:long
__modsi3	arch/nios2/lib/libgcc.c	/^__modsi3 (SItype a, SItype b)$/;"	f	typeref:typename:SItype
__module_get	include/linux/compat.h	/^#define __module_get(/;"	d
__monitor_end	arch/xtensa/cpu/u-boot.lds	/^  __monitor_end = .;$/;"	s
__monitor_start	arch/xtensa/cpu/u-boot.lds	/^  __monitor_start = CONFIG_SYS_TEXT_ADDR;$/;"	s
__morecore	include/malloc.h	/^Void_t *(*__morecore)() = __default_morecore_init;$/;"	v	typeref:typename:Void_t * (*)()
__morecore	include/malloc.h	/^Void_t *(*__morecore)(ptrdiff_t) = __default_morecore_init;$/;"	v	typeref:typename:Void_t * (*)(ptrdiff_t)
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__raw_readb	arch/x86/include/asm/io.h	/^#define __raw_readb /;"	d
__raw_readb	arch/xtensa/include/asm/io.h	/^#define __raw_readb /;"	d
__raw_readl	arch/arc/include/asm/io.h	/^static inline u32 __raw_readl(const volatile void __iomem *addr)$/;"	f	typeref:typename:u32
__raw_readl	arch/arm/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/avr32/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/blackfin/include/asm/io.h	/^#define __raw_readl /;"	d
__raw_readl	arch/m68k/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/microblaze/include/asm/io.h	/^#define __raw_readl /;"	d
__raw_readl	arch/nds32/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/nios2/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/openrisc/include/asm/io.h	/^#define __raw_readl /;"	d
__raw_readl	arch/powerpc/include/asm/io.h	/^static inline unsigned int __raw_readl(const volatile void __iomem *addr)$/;"	f	typeref:typename:unsigned int
__raw_readl	arch/sh/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/sparc/include/asm/io.h	/^#define __raw_readl(/;"	d
__raw_readl	arch/x86/include/asm/io.h	/^#define __raw_readl /;"	d
__raw_readl	arch/xtensa/include/asm/io.h	/^#define __raw_readl /;"	d
__raw_readq	arch/arm/include/asm/io.h	/^#define __raw_readq(/;"	d
__raw_readq	arch/sparc/include/asm/io.h	/^#define __raw_readq(/;"	d
__raw_readq	board/cm-bf537e/gpio_cfi_flash.c	/^#define __raw_readq(/;"	d	file:
__raw_readsb	arch/arc/include/asm/io.h	/^static inline int __raw_readsb(unsigned int addr, void *data, int bytelen)$/;"	f	typeref:typename:int
__raw_readsb	arch/arm/include/asm/io.h	/^static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)$/;"	f	typeref:typename:void
__raw_readsl	arch/arc/include/asm/io.h	/^static inline int __raw_readsl(unsigned int addr, void *data, int longlen)$/;"	f	typeref:typename:int
__raw_readsl	arch/arm/include/asm/io.h	/^static inline void __raw_readsl(unsigned long addr, void *data, int longlen)$/;"	f	typeref:typename:void
__raw_readsw	arch/arc/include/asm/io.h	/^static inline int __raw_readsw(unsigned int addr, void *data, int wordlen)$/;"	f	typeref:typename:int
__raw_readsw	arch/arm/include/asm/io.h	/^static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)$/;"	f	typeref:typename:void
__raw_readw	arch/arc/include/asm/io.h	/^static inline u16 __raw_readw(const volatile void __iomem *addr)$/;"	f	typeref:typename:u16
__raw_readw	arch/arm/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/avr32/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/blackfin/include/asm/io.h	/^#define __raw_readw /;"	d
__raw_readw	arch/m68k/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/microblaze/include/asm/io.h	/^#define __raw_readw /;"	d
__raw_readw	arch/nds32/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/nios2/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/openrisc/include/asm/io.h	/^#define __raw_readw /;"	d
__raw_readw	arch/powerpc/include/asm/io.h	/^static inline unsigned short __raw_readw(const volatile void __iomem *addr)$/;"	f	typeref:typename:unsigned short
__raw_readw	arch/sh/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/sparc/include/asm/io.h	/^#define __raw_readw(/;"	d
__raw_readw	arch/x86/include/asm/io.h	/^#define __raw_readw /;"	d
__raw_readw	arch/xtensa/include/asm/io.h	/^#define __raw_readw /;"	d
__raw_writeb	arch/arc/include/asm/io.h	/^static inline void __raw_writeb(u8 b, volatile void __iomem *addr)$/;"	f	typeref:typename:void
__raw_writeb	arch/arm/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/avr32/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/blackfin/include/asm/io.h	/^#define __raw_writeb /;"	d
__raw_writeb	arch/m68k/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/microblaze/include/asm/io.h	/^#define __raw_writeb /;"	d
__raw_writeb	arch/nds32/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/nios2/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/openrisc/include/asm/io.h	/^#define __raw_writeb /;"	d
__raw_writeb	arch/powerpc/include/asm/io.h	/^static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)$/;"	f	typeref:typename:void
__raw_writeb	arch/sh/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/sparc/include/asm/io.h	/^#define __raw_writeb(/;"	d
__raw_writeb	arch/x86/include/asm/io.h	/^#define __raw_writeb /;"	d
__raw_writeb	arch/xtensa/include/asm/io.h	/^#define __raw_writeb /;"	d
__raw_writel	arch/arc/include/asm/io.h	/^static inline void __raw_writel(u32 w, volatile void __iomem *addr)$/;"	f	typeref:typename:void
__raw_writel	arch/arm/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/avr32/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/blackfin/include/asm/io.h	/^#define __raw_writel /;"	d
__raw_writel	arch/m68k/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/microblaze/include/asm/io.h	/^#define __raw_writel /;"	d
__raw_writel	arch/nds32/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/nios2/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/openrisc/include/asm/io.h	/^#define __raw_writel /;"	d
__raw_writel	arch/powerpc/include/asm/io.h	/^static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)$/;"	f	typeref:typename:void
__raw_writel	arch/sh/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/sparc/include/asm/io.h	/^#define __raw_writel(/;"	d
__raw_writel	arch/x86/include/asm/io.h	/^#define __raw_writel /;"	d
__raw_writel	arch/xtensa/include/asm/io.h	/^#define __raw_writel /;"	d
__raw_writeq	arch/arm/include/asm/io.h	/^#define __raw_writeq(/;"	d
__raw_writeq	arch/sparc/include/asm/io.h	/^#define __raw_writeq(/;"	d
__raw_writeq	board/cm-bf537e/gpio_cfi_flash.c	/^#define __raw_writeq(/;"	d	file:
__raw_writesb	arch/arc/include/asm/io.h	/^static inline int __raw_writesb(unsigned int addr, void *data, int bytelen)$/;"	f	typeref:typename:int
__raw_writesb	arch/arm/include/asm/io.h	/^static inline void __raw_writesb(unsigned long addr, const void *data,$/;"	f	typeref:typename:void
__raw_writesl	arch/arc/include/asm/io.h	/^static inline int __raw_writesl(unsigned int addr, void *data, int longlen)$/;"	f	typeref:typename:int
__raw_writesl	arch/arm/include/asm/io.h	/^static inline void __raw_writesl(unsigned long addr, const void *data,$/;"	f	typeref:typename:void
__raw_writesw	arch/arc/include/asm/io.h	/^static inline int __raw_writesw(unsigned int addr, void *data, int wordlen)$/;"	f	typeref:typename:int
__raw_writesw	arch/arm/include/asm/io.h	/^static inline void __raw_writesw(unsigned long addr, const void *data,$/;"	f	typeref:typename:void
__raw_writew	arch/arc/include/asm/io.h	/^static inline void __raw_writew(u16 s, volatile void __iomem *addr)$/;"	f	typeref:typename:void
__raw_writew	arch/arm/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/avr32/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/blackfin/include/asm/io.h	/^#define __raw_writew /;"	d
__raw_writew	arch/m68k/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/microblaze/include/asm/io.h	/^#define __raw_writew /;"	d
__raw_writew	arch/nds32/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/nios2/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/openrisc/include/asm/io.h	/^#define __raw_writew /;"	d
__raw_writew	arch/powerpc/include/asm/io.h	/^static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)$/;"	f	typeref:typename:void
__raw_writew	arch/sh/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/sparc/include/asm/io.h	/^#define __raw_writew(/;"	d
__raw_writew	arch/x86/include/asm/io.h	/^#define __raw_writew /;"	d
__raw_writew	arch/xtensa/include/asm/io.h	/^#define __raw_writew /;"	d
__rb_change_child	include/linux/rbtree_augmented.h	/^__rb_change_child(struct rb_node *old, struct rb_node *new,$/;"	f	typeref:typename:void
__rb_color	include/linux/rbtree_augmented.h	/^#define __rb_color(/;"	d
__rb_erase_augmented	include/linux/rbtree_augmented.h	/^__rb_erase_augmented(struct rb_node *node, struct rb_root *root,$/;"	f	typeref:typename:__always_inline struct rb_node *
__rb_erase_color	lib/rbtree.c	/^void __rb_erase_color(struct rb_node *parent, struct rb_root *root,$/;"	f	typeref:typename:void
__rb_insert	lib/rbtree.c	/^__rb_insert(struct rb_node *node, struct rb_root *root,$/;"	f	typeref:typename:__always_inline void	file:
__rb_insert_augmented	lib/rbtree.c	/^void __rb_insert_augmented(struct rb_node *node, struct rb_root *root,$/;"	f	typeref:typename:void
__rb_is_black	include/linux/rbtree_augmented.h	/^#define __rb_is_black(/;"	d
__rb_is_red	include/linux/rbtree_augmented.h	/^#define __rb_is_red(/;"	d
__rb_parent	include/linux/rbtree_augmented.h	/^#define __rb_parent(/;"	d
__rb_parent_color	include/linux/rbtree.h	/^	unsigned long  __rb_parent_color;$/;"	m	struct:rb_node	typeref:typename:unsigned long
__rb_rotate_set_parents	lib/rbtree.c	/^__rb_rotate_set_parents(struct rb_node *old, struct rb_node *new,$/;"	f	typeref:typename:void	file:
__rbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void __rbdl_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__rbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void __rbdl_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__rcu	include/linux/compiler.h	/^# define __rcu	/;"	d
__rcu	include/linux/compiler.h	/^# define __rcu$/;"	d
__read_32bit_c0_ctrl_register	arch/mips/include/asm/mipsregs.h	/^#define __read_32bit_c0_ctrl_register(/;"	d
__read_32bit_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __read_32bit_c0_register(/;"	d
__read_32bit_c0_register	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define __read_32bit_c0_register(/;"	d	file:
__read_64bit_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __read_64bit_c0_register(/;"	d
__read_64bit_c0_split	arch/mips/include/asm/mipsregs.h	/^#define __read_64bit_c0_split(/;"	d
__read_once_size	include/linux/compiler.h	/^void __read_once_size(const volatile void *p, void *res, int size)$/;"	f	typeref:typename:__always_inline void
__read_once_size_nocheck	include/linux/compiler.h	/^void __read_once_size_nocheck(const volatile void *p, void *res, int size)$/;"	f	typeref:typename:__always_inline void
__read_once_size_nocheck	include/linux/compiler.h	/^void __read_once_size_nocheck(const volatile void *p, void *res, int size)$/;"	f	typeref:typename:__no_sanitize_address __maybe_unused void
__read_prefetch_aligned	drivers/mtd/nand/omap_gpmc.c	/^static int __read_prefetch_aligned(struct nand_chip *chip, uint32_t *buf, int len)$/;"	f	typeref:typename:int	file:
__read_ulong_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __read_ulong_c0_register(/;"	d
__readx_32bit_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __readx_32bit_c0_register(/;"	d
__real_cntfrq	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^__real_cntfrq:$/;"	l
__realmode_idt	arch/x86/lib/bios_asm.S	/^__realmode_idt = PTR_TO_REAL_MODE(.)$/;"	d
__realmode_interrupt	arch/x86/lib/bios_asm.S	/^__realmode_interrupt:$/;"	l
__realmode_ss	arch/x86/lib/bios_asm.S	/^__realmode_ss = PTR_TO_REAL_MODE(.)$/;"	d
__recalibrate_iodelay	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads,$/;"	f	typeref:typename:void
__recalibrate_iodelay_end	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^void __recalibrate_iodelay_end(int ret)$/;"	f	typeref:typename:void
__recalibrate_iodelay_start	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^int __recalibrate_iodelay_start(void)$/;"	f	typeref:typename:int
__registers	arch/x86/lib/bios_asm.S	/^__registers = PTR_TO_REAL_MODE(.)$/;"	d
__rel_dyn_end	arch/arc/cpu/u-boot.lds	/^	__rel_dyn_end = .;$/;"	s
__rel_dyn_end	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^		__rel_dyn_end = .;$/;"	s	section:.rel.dyn
__rel_dyn_end	arch/arm/cpu/u-boot-spl.lds	/^		__rel_dyn_end = .;$/;"	s	section:.rel.dyn
__rel_dyn_end	arch/arm/lib/sections.c	/^char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));$/;"	v	typeref:typename:char[0]
__rel_dyn_end	arch/mips/cpu/u-boot.lds	/^		__rel_dyn_end = .;$/;"	s	section:.rel.dyn
__rel_dyn_end	arch/nds32/cpu/n1213/u-boot.lds	/^		__rel_dyn_end = .;$/;"	s	section:.rela.dyn
__rel_dyn_end	arch/x86/cpu/u-boot.lds	/^	__rel_dyn_end = .;$/;"	s
__rel_dyn_end	board/Barix/ipam390/u-boot-spl-ipam390.lds	/^		__rel_dyn_end = .;$/;"	s
__rel_dyn_end	board/davinci/da8xxevm/u-boot-spl-da850evm.lds	/^		__rel_dyn_end = .;$/;"	s
__rel_dyn_start	arch/arc/cpu/u-boot.lds	/^	__rel_dyn_start = .;$/;"	s
__rel_dyn_start	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^		__rel_dyn_start = .;$/;"	s	section:.rel.dyn
__rel_dyn_start	arch/arm/cpu/u-boot-spl.lds	/^		__rel_dyn_start = .;$/;"	s	section:.rel.dyn
__rel_dyn_start	arch/arm/lib/sections.c	/^char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start")));$/;"	v	typeref:typename:char[0]
__rel_dyn_start	arch/mips/cpu/u-boot.lds	/^		__rel_dyn_start = .;$/;"	s	section:.rel.dyn
__rel_dyn_start	arch/nds32/cpu/n1213/u-boot.lds	/^		__rel_dyn_start = .;$/;"	s	section:.rela.dyn
__rel_dyn_start	arch/x86/cpu/u-boot.lds	/^	__rel_dyn_start = .;$/;"	s
__rel_dyn_start	board/Barix/ipam390/u-boot-spl-ipam390.lds	/^		__rel_dyn_start = .;$/;"	s
__rel_dyn_start	board/davinci/da8xxevm/u-boot-spl-da850evm.lds	/^		__rel_dyn_start = .;$/;"	s
__release	include/linux/compiler.h	/^# define __release(/;"	d
__releases	include/linux/compiler.h	/^# define __releases(/;"	d
__reloc_end	arch/xtensa/cpu/u-boot.lds	/^  __reloc_end = .;$/;"	s
__reloc_table_end	arch/xtensa/cpu/u-boot.lds	/^    __reloc_table_end = ABSOLUTE(.);$/;"	s
__reloc_table_start	arch/xtensa/cpu/u-boot.lds	/^    __reloc_table_start = ABSOLUTE(.);$/;"	s
__request_mem_region	include/linux/ioport.h	/^#define __request_mem_region(/;"	d
__reserved	arch/avr32/include/asm/hmatrix-common.h	/^	u32	__reserved[3];$/;"	m	struct:hmatrix_regs	typeref:typename:u32[3]
__reserved	drivers/i2c/i2c-uniphier-f.c	/^	u32 __reserved;			\/* no register at offset 0x08 *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
__reserved1	tools/zynqimage.c	/^	uint32_t __reserved1; \/* 0x38 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
__reserved1	tools/zynqmpimage.c	/^	uint32_t __reserved1[27]; \/* 0x4c *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t[27]	file:
__reserved2	drivers/i2c/i2c-uniphier-f.c	/^	u32 __reserved2;		\/* no register at offset 0x30 *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
__reserved2	tools/zynqimage.c	/^	uint32_t __reserved2; \/* 0x44 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
__reserved3	tools/zynqimage.c	/^	uint32_t __reserved3[21]; \/* 0x4c *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t[21]	file:
__reserved4	tools/zynqimage.c	/^	uint32_t __reserved4[8]; \/* 0x8a0 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t[8]	file:
__reserved4	tools/zynqmpimage.c	/^	uint32_t __reserved4[66]; \/* 0x9c0 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t[66]	file:
__reserved_0	drivers/net/cpsw.c	/^	u32	__reserved_0;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
__reserved_0	drivers/net/cpsw.c	/^	u32	__reserved_0[2];$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32[2]	file:
__reserved_1	drivers/net/cpsw.c	/^	u32	__reserved_1;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
__reserved_1	drivers/net/cpsw.c	/^	u32	__reserved_1[20];$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32[20]	file:
__reset	arch/openrisc/cpu/start.S	/^__reset:$/;"	l
__restore_flags	arch/microblaze/include/asm/system.h	/^#define __restore_flags(/;"	d
__restore_flags	arch/mips/include/asm/system.h	/^#define __restore_flags(/;"	d
__rmobile_get_cpu_rev_fraction	arch/arm/mach-rmobile/cpu_info.c	/^static u32 __rmobile_get_cpu_rev_fraction(void)$/;"	f	typeref:typename:u32	file:
__rmobile_get_cpu_rev_integer	arch/arm/mach-rmobile/cpu_info.c	/^static u32 __rmobile_get_cpu_rev_integer(void)$/;"	f	typeref:typename:u32	file:
__rmobile_get_cpu_type	arch/arm/mach-rmobile/cpu_info.c	/^static u32 __rmobile_get_cpu_type(void)$/;"	f	typeref:typename:u32	file:
__rodata_end	arch/microblaze/cpu/u-boot-spl.lds	/^		__rodata_end = .;$/;"	s
__rodata_end	arch/microblaze/cpu/u-boot.lds	/^		__rodata_end = .;$/;"	s
__rodata_end	examples/standalone/sparc.lds	/^	__rodata_end = .;$/;"	s
__rodata_start	arch/microblaze/cpu/u-boot-spl.lds	/^		__rodata_start = .;$/;"	s
__rodata_start	arch/microblaze/cpu/u-boot.lds	/^		__rodata_start = .;$/;"	s
__round_mask	include/linux/kernel.h	/^#define __round_mask(/;"	d
__round_mask	tools/mxsboot.c	/^#define __round_mask(/;"	d	file:
__rounddown_pow_of_two	include/linux/log2.h	/^unsigned long __rounddown_pow_of_two(unsigned long n)$/;"	f	typeref:typename:unsigned long
__roundup_pow_of_two	include/linux/log2.h	/^unsigned long __roundup_pow_of_two(unsigned long n)$/;"	f	typeref:typename:unsigned long
__rsv0	drivers/serial/serial_uniphier.c	/^	u32 __rsv0;$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
__rsv1	drivers/serial/serial_uniphier.c	/^	u32 __rsv1;$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
__rtc_def_h	include/rtc_def.h	/^#define __rtc_def_h$/;"	d
__s16	arch/arc/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/arm/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/avr32/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/blackfin/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/m68k/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/microblaze/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/mips/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/nds32/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/nios2/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/openrisc/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/powerpc/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/sandbox/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/sh/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/sparc/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/x86/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s16	arch/xtensa/include/asm/types.h	/^typedef __signed__ short __s16;$/;"	t	typeref:typename:__signed__ short
__s32	arch/arc/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/arm/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/avr32/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/blackfin/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/m68k/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/microblaze/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/mips/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/nds32/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/nios2/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/openrisc/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/powerpc/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/sandbox/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/sh/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/sparc/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/x86/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s32	arch/xtensa/include/asm/types.h	/^typedef __signed__ int __s32;$/;"	t	typeref:typename:__signed__ int
__s64	arch/arc/include/asm/types.h	/^typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/arm/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/avr32/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/blackfin/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/m68k/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/microblaze/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/mips/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/mips/include/asm/types.h	/^typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/nds32/include/asm/types.h	/^typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/nios2/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/openrisc/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/powerpc/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/sandbox/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/sh/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/sparc/include/asm/types.h	/^typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/x86/include/asm/types.h	/^__extension__ typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s64	arch/xtensa/include/asm/types.h	/^typedef __signed__ long long __s64;$/;"	t	typeref:typename:__signed__ long long
__s8	arch/arc/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/arm/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/avr32/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/blackfin/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/m68k/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/microblaze/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/mips/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/nds32/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/nios2/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/openrisc/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/powerpc/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/sandbox/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/sh/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/sparc/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/x86/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__s8	arch/xtensa/include/asm/types.h	/^typedef __signed__ char __s8;$/;"	t	typeref:typename:__signed__ char
__safe	include/linux/compiler.h	/^# define __safe	/;"	d
__safe	include/linux/compiler.h	/^# define __safe$/;"	d
__same_type	include/linux/compiler.h	/^# define __same_type(/;"	d
__sata_initialize	common/sata.c	/^int __sata_initialize(void)$/;"	f	typeref:typename:int
__sata_stop	common/sata.c	/^__weak int __sata_stop(void)$/;"	f	typeref:typename:__weak int
__save_and_cli	arch/mips/include/asm/system.h	/^#define __save_and_cli(/;"	d
__save_flags	arch/microblaze/include/asm/system.h	/^#define __save_flags(/;"	d
__save_flags	arch/mips/include/asm/system.h	/^#define __save_flags(/;"	d
__save_flags_cli	arch/microblaze/include/asm/system.h	/^#define __save_flags_cli(/;"	d
__save_flags_sti	arch/microblaze/include/asm/system.h	/^#define __save_flags_sti(/;"	d
__scanf	include/linux/compiler-gcc.h	/^#define __scanf(/;"	d
__schedule_ubi_work	drivers/mtd/ubi/wl.c	/^static void __schedule_ubi_work(struct ubi_device *ubi, struct ubi_work *wrk)$/;"	f	typeref:typename:void	file:
__sdata_l1	arch/blackfin/cpu/u-boot.lds	/^		__sdata_l1 = .;$/;"	s
__sdivsi3	arch/sh/lib/udivsi3_i4i-Os.S	/^	.set	__sdivsi3, __sdivsi3_i4i$/;"	d
__sdivsi3	arch/sh/lib/udivsi3_i4i.S	/^	.set	__sdivsi3, __sdivsi3_i4i$/;"	d
__sdivsi3_i4	arch/sh/lib/udivsi3_i4i-Os.S	/^	.set	__sdivsi3_i4, __sdivsi3_i4i$/;"	d
__sdivsi3_i4	arch/sh/lib/udivsi3_i4i.S	/^	.set	__sdivsi3_i4, __sdivsi3_i4i$/;"	d
__sdivsi3_i4i	arch/sh/lib/udivsi3_i4i-Os.S	/^__sdivsi3_i4i:$/;"	l
__sdivsi3_i4i	arch/sh/lib/udivsi3_i4i.S	/^__sdivsi3_i4i:$/;"	l
__second_half_boot_page	arch/powerpc/cpu/mpc85xx/release.S	/^__second_half_boot_page:$/;"	l
__secondary_boot_code_size	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^__secondary_boot_code_size:$/;"	l
__secondary_reset_vector	arch/powerpc/cpu/mpc85xx/release.S	/^__secondary_reset_vector:$/;"	l
__secondary_start_code_end	arch/powerpc/cpu/mpc85xx/release.S	/^__secondary_start_code_end:$/;"	l
__secondary_start_page	arch/powerpc/cpu/mpc85xx/release.S	/^__secondary_start_page:$/;"	l
__secondary_start_page	arch/powerpc/cpu/mpc86xx/release.S	/^__secondary_start_page:$/;"	l
__section	include/linux/compiler.h	/^# define __section(/;"	d
__secure	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^#define __secure /;"	d	file:
__secure	arch/arm/include/asm/secure.h	/^#define __secure /;"	d
__secure_data	arch/arm/include/asm/secure.h	/^#define __secure_data /;"	d
__secure_data	arch/arm/mach-uniphier/arm32/psci.c	/^u32 uniphier_psci_holding_pen_release __secure_data = 0xffffffff;$/;"	v	typeref:typename:u32 uniphier_psci_holding_pen_release
__secure_end	arch/arm/lib/sections.c	/^char __secure_end[0] __attribute__((section(".__secure_end")));$/;"	v	typeref:typename:char[0]
__secure_stack_end	arch/arm/lib/sections.c	/^char __secure_stack_end[0] __attribute__((section(".__secure_stack_end")));$/;"	v	typeref:typename:char[0]
__secure_stack_start	arch/arm/lib/sections.c	/^char __secure_stack_start[0] __attribute__((section(".__secure_stack_start")));$/;"	v	typeref:typename:char[0]
__secure_start	arch/arm/lib/sections.c	/^char __secure_start[0] __attribute__((section(".__secure_start")));$/;"	v	typeref:typename:char[0]
__serdes_get_first_lane	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static int __serdes_get_first_lane(uint32_t prtcl, enum srds_prtcl device)$/;"	f	typeref:typename:int	file:
__serdes_get_lane_count	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static uint32_t __serdes_get_lane_count(uint32_t prtcl, enum srds_prtcl device,$/;"	f	typeref:typename:uint32_t	file:
__serdes_reset_rx	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static void __serdes_reset_rx(serdes_corenet_t *regs,$/;"	f	typeref:typename:void	file:
__serial_bcm283x_mu_h	include/dm/platform_data/serial_bcm283x_mu.h	/^#define __serial_bcm283x_mu_h$/;"	d
__serial_coldfire_h	include/dm/platform_data/serial_coldfire.h	/^#define __serial_coldfire_h$/;"	d
__serial_early_set_baud	arch/blackfin/include/asm/serial.h	/^	call __serial_early_set_baud;$/;"	v	typeref:typename:call
__serial_mxc_h	include/dm/platform_data/serial_mxc.h	/^#define __serial_mxc_h$/;"	d
__serial_pl01x_h	include/dm/platform_data/serial_pl01x.h	/^#define __serial_pl01x_h$/;"	d
__serial_sh_h	include/dm/platform_data/serial_sh.h	/^#define __serial_sh_h$/;"	d
__set_altbank	board/freescale/common/ngpixis.c	/^void __set_altbank(void)$/;"	f	typeref:typename:void
__set_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ void __set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
__set_bit	arch/microblaze/include/asm/bitops.h	/^static inline void __set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
__set_bit	arch/mips/include/asm/bitops.h	/^static __inline__ void __set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
__set_bit	arch/nds32/include/asm/bitops.h	/^static inline void __set_bit(int nr, void *addr)$/;"	f	typeref:typename:void
__set_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline void __set_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
__set_bit	arch/x86/include/asm/bitops.h	/^static __inline__ void __set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
__set_bit	include/linux/bitops.h	/^# define __set_bit /;"	d
__set_blinking	drivers/gpio/kw_gpio.c	/^static void __set_blinking(unsigned pin, int blink)$/;"	f	typeref:typename:void	file:
__set_direction	drivers/gpio/kw_gpio.c	/^void __set_direction(unsigned pin, int input)$/;"	f	typeref:typename:void
__set_errno	include/errno.h	/^#define __set_errno(/;"	d
__set_errno	include/search.h	/^#define __set_errno(/;"	d
__set_led	board/buffalo/lsxl/lsxl.c	/^static void __set_led(int blink_alarm, int blink_info, int blink_power,$/;"	f	typeref:typename:void	file:
__set_level	drivers/gpio/kw_gpio.c	/^static void __set_level(unsigned pin, int high)$/;"	f	typeref:typename:void	file:
__setattr__	tools/patman/series.py	/^    def __setattr__(self, name, value):$/;"	m	class:Series
__setjmp_h	arch/x86/include/asm/setjmp.h	/^#define __setjmp_h$/;"	d
__setup_pcat_compatibility	arch/x86/lib/zimage.c	/^void __setup_pcat_compatibility(void)$/;"	f	typeref:typename:void
__sighandler_t	arch/powerpc/include/asm/signal.h	/^typedef void (*__sighandler_t)(int);$/;"	t	typeref:typename:void (*)(int)
__silicon_if_H	drivers/ddr/marvell/a38x/silicon_if.h	/^#define __silicon_if_H$/;"	d
__slc_entire_op	arch/arc/lib/cache.c	/^#define __slc_entire_op(/;"	d	file:
__slc_entire_op	arch/arc/lib/cache.c	/^static inline void __slc_entire_op(const int cacheop)$/;"	f	typeref:typename:void	file:
__slc_line_loop	arch/arc/lib/cache.c	/^static inline void __slc_line_loop(unsigned long paddr, unsigned long sz,$/;"	f	typeref:typename:void	file:
__slc_line_op	arch/arc/lib/cache.c	/^#define __slc_line_op(/;"	d	file:
__slc_line_op	arch/arc/lib/cache.c	/^static inline void __slc_line_op(unsigned long paddr, unsigned long sz,$/;"	f	typeref:typename:void	file:
__slots__	tools/buildman/kconfiglib.py	/^    __slots__ = ['filename', 'lines', 'length', 'linenr']$/;"	v	class:_FileFeed	file:
__slots__	tools/buildman/kconfiglib.py	/^    __slots__ = ['items', 'length', 'i']$/;"	v	class:_Feed	file:
__smc911x_reg_read	drivers/net/smc911x.h	/^static inline u32 __smc911x_reg_read(struct eth_device *dev, u32 offset)$/;"	f	typeref:typename:u32
__smc911x_reg_write	drivers/net/smc911x.h	/^static inline void __smc911x_reg_write(struct eth_device *dev,$/;"	f	typeref:typename:void
__soc_serdes_init	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static void __soc_serdes_init(void)$/;"	f	typeref:typename:void	file:
__space0__	drivers/spi/xilinx_spi.c	/^	u32 __space0__[7];$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32[7]	file:
__space1__	drivers/spi/xilinx_spi.c	/^	u32 __space1__;$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
__space2__	drivers/spi/xilinx_spi.c	/^	u32 __space2__[5];$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32[5]	file:
__space3__	drivers/spi/xilinx_spi.c	/^	u32 __space3__[7];$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32[7]	file:
__spd_ddr_init_hang	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^void __spd_ddr_init_hang (void)$/;"	f	typeref:typename:void
__spd_ddr_init_hang	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^void __spd_ddr_init_hang (void)$/;"	f	typeref:typename:void
__spd_ddr_init_hang	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^void __spd_ddr_init_hang(void)$/;"	f	typeref:typename:void
__spd_ddr_init_hang	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^void __spd_ddr_init_hang(void)$/;"	f	typeref:typename:void
__spin_table	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^__spin_table:$/;"	l
__spin_table	arch/powerpc/cpu/mpc85xx/release.S	/^__spin_table:$/;"	l
__spin_table_addr	arch/powerpc/cpu/mpc85xx/release.S	/^__spin_table_addr:$/;"	l
__spin_table_end	arch/powerpc/cpu/mpc85xx/release.S	/^__spin_table_end:$/;"	l
__spinner	tools/kwboot.c	/^__spinner(void)$/;"	f	typeref:typename:void	file:
__stack	arch/x86/lib/bios_asm.S	/^__stack = PTR_TO_REAL_MODE(.)$/;"	d
__start	board/Barix/ipam390/u-boot-spl-ipam390.lds	/^	__start = .;$/;"	s
__start	board/davinci/da8xxevm/u-boot-spl-da850evm.lds	/^	__start = .;$/;"	s
__start	examples/api/crt0.S	/^__start:$/;"	l
__start___ex_table	arch/m68k/cpu/u-boot.lds	/^	__start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	__start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	board/amcc/canyonlands/u-boot-ram.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	board/amcc/sequoia/u-boot-ram.lds	/^  __start___ex_table = .;$/;"	s
__start___ex_table	board/tqc/tqm8xx/u-boot.lds	/^  __start___ex_table = .;$/;"	s
__start_image_type	tools/imagetool.h	/^struct image_type_params **__start_image_type, **__stop_image_type;$/;"	v	typeref:struct:image_type_params **
__step_assign_addresses	drivers/ddr/fsl/main.c	/^static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:unsigned long long	file:
__stext_l1	arch/blackfin/cpu/u-boot.lds	/^		__stext_l1 = .;$/;"	s
__stf	arch/arm/include/asm/proc-armv/system.h	/^#define __stf(/;"	d
__stf	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void __stf(void)$/;"	f	typeref:typename:void
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__sti	arch/mips/include/asm/system.h	/^__sti(void)$/;"	f	typeref:typename:void
__stop___ex_table	arch/m68k/cpu/u-boot.lds	/^	__stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	__stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	board/amcc/canyonlands/u-boot-ram.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	board/amcc/sequoia/u-boot-ram.lds	/^  __stop___ex_table = .;$/;"	s
__stop___ex_table	board/tqc/tqm8xx/u-boot.lds	/^  __stop___ex_table = .;$/;"	s
__stop_image_type	tools/imagetool.h	/^struct image_type_params **__start_image_type, **__stop_image_type;$/;"	v	typeref:struct:image_type_params **
__str__	tools/buildman/board.py	/^    def __str__(self):$/;"	m	class:Expr
__str__	tools/buildman/board.py	/^    def __str__(self):$/;"	m	class:Term
__str__	tools/buildman/kconfiglib.py	/^    def __str__(self):$/;"	m	class:Choice
__str__	tools/buildman/kconfiglib.py	/^    def __str__(self):$/;"	m	class:Comment
__str__	tools/buildman/kconfiglib.py	/^    def __str__(self):$/;"	m	class:Config
__str__	tools/buildman/kconfiglib.py	/^    def __str__(self):$/;"	m	class:Menu
__str__	tools/buildman/kconfiglib.py	/^    def __str__(self):$/;"	m	class:Symbol
__str__	tools/patman/terminal.py	/^    def __str__(self):$/;"	m	class:PrintLine
__str__	tools/rkmux.py	/^    def __str__(self):$/;"	m	class:RegField
__stringify	include/linux/stringify.h	/^#define __stringify(/;"	d
__stringify_1	include/linux/stringify.h	/^#define __stringify_1(/;"	d
__sum16	include/linux/types.h	/^typedef __u16 __bitwise __sum16;$/;"	t	typeref:typename:__u16 __bitwise
__sw16	arch/m68k/include/asm/byteorder.h	/^#define __sw16(/;"	d
__sw32	arch/m68k/include/asm/byteorder.h	/^#define __sw32(/;"	d
__swab16	include/linux/byteorder/swab.h	/^#  define __swab16(/;"	d
__swab16p	include/linux/byteorder/swab.h	/^static __inline__ __u16 __swab16p(const __u16 *x)$/;"	f	typeref:typename:__u16
__swab16s	include/linux/byteorder/swab.h	/^static __inline__ void __swab16s(__u16 *addr)$/;"	f	typeref:typename:void
__swab32	include/linux/byteorder/swab.h	/^#  define __swab32(/;"	d
__swab32p	include/linux/byteorder/swab.h	/^static __inline__ __u32 __swab32p(const __u32 *x)$/;"	f	typeref:typename:__u32
__swab32s	include/linux/byteorder/swab.h	/^static __inline__ void __swab32s(__u32 *addr)$/;"	f	typeref:typename:void
__swab64	include/linux/byteorder/swab.h	/^#  define __swab64(/;"	d
__swab64p	include/linux/byteorder/swab.h	/^static __inline__ __u64 __swab64p(const __u64 *x)$/;"	f	typeref:typename:__u64
__swab64s	include/linux/byteorder/swab.h	/^static __inline__ void __swab64s(__u64 *addr)$/;"	f	typeref:typename:void
__swap_16	include/usb.h	/^#define __swap_16(/;"	d
__swap_32	include/usb.h	/^#define __swap_32(/;"	d
__swizzle_addr_b	arch/mips/include/asm/mach-generic/mangle-port.h	/^#define __swizzle_addr_b(/;"	d
__swizzle_addr_l	arch/mips/include/asm/mach-generic/mangle-port.h	/^#define __swizzle_addr_l(/;"	d
__swizzle_addr_q	arch/mips/include/asm/mach-generic/mangle-port.h	/^#define __swizzle_addr_q(/;"	d
__swizzle_addr_w	arch/mips/include/asm/mach-generic/mangle-port.h	/^#define __swizzle_addr_w(/;"	d
__syntax	common/cli_hush.c	/^static void __syntax(char *file, int line) {$/;"	f	typeref:typename:void	file:
__tag	arch/arm/include/asm/setup.h	/^#define __tag /;"	d
__tag	arch/avr32/include/asm/setup.h	/^#define __tag /;"	d
__tag	arch/nds32/include/asm/setup.h	/^#define __tag /;"	d
__tagtable	arch/arm/include/asm/setup.h	/^#define __tagtable(/;"	d
__tagtable	arch/avr32/include/asm/setup.h	/^#define __tagtable(/;"	d
__tagtable	arch/nds32/include/asm/setup.h	/^#define __tagtable(/;"	d
__test_and_change_bit	arch/arm/include/asm/bitops.h	/^static inline int __test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_change_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int __test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_change_bit	arch/microblaze/include/asm/bitops.h	/^static inline int __test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_change_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int __test_and_change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
__test_and_change_bit	arch/nds32/include/asm/bitops.h	/^static inline int __test_and_change_bit(int nr, void *addr)$/;"	f	typeref:typename:int
__test_and_change_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline int __test_and_change_bit(int nr,$/;"	f	typeref:typename:int
__test_and_change_bit	arch/sandbox/include/asm/bitops.h	/^static inline int __test_and_change_bit(int nr, void *addr)$/;"	f	typeref:typename:int
__test_and_change_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int __test_and_change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/arm/include/asm/bitops.h	/^static inline int __test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int __test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/microblaze/include/asm/bitops.h	/^static inline int __test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/nds32/include/asm/bitops.h	/^static inline int __test_and_clear_bit(int nr, void *addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/sandbox/include/asm/bitops.h	/^static inline int __test_and_clear_bit(int nr, void *addr)$/;"	f	typeref:typename:int
__test_and_clear_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/arm/include/asm/bitops.h	/^static inline int __test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int __test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/microblaze/include/asm/bitops.h	/^static inline int __test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int __test_and_set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/nds32/include/asm/bitops.h	/^static inline int __test_and_set_bit(int nr, void *addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/sandbox/include/asm/bitops.h	/^static inline int __test_and_set_bit(int nr, void *addr)$/;"	f	typeref:typename:int
__test_and_set_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int __test_and_set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
__test_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int __test_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__test_bit	arch/microblaze/include/asm/bitops.h	/^static inline int __test_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
__text_end	arch/arc/cpu/u-boot.lds	/^	__text_end = .;$/;"	s
__text_end	arch/microblaze/cpu/u-boot-spl.lds	/^		__text_end = .;$/;"	s
__text_end	arch/microblaze/cpu/u-boot.lds	/^		__text_end = .;$/;"	s
__text_end	arch/mips/cpu/u-boot.lds	/^		__text_end = .;$/;"	s	section:.text
__text_end	examples/standalone/sparc.lds	/^	__text_end = .;$/;"	s
__text_l1_len	arch/blackfin/cpu/u-boot.lds	/^	__text_l1_len = SIZEOF(.text_l1);$/;"	s
__text_l1_lma	arch/blackfin/cpu/u-boot.lds	/^	__text_l1_lma = LOADADDR(.text_l1);$/;"	s
__text_start	arch/arc/cpu/u-boot.lds	/^	__text_start = .;$/;"	s
__text_start	arch/microblaze/cpu/u-boot-spl.lds	/^		__text_start = .;$/;"	s
__text_start	arch/microblaze/cpu/u-boot.lds	/^		__text_start = .;$/;"	s
__text_start	arch/mips/cpu/u-boot.lds	/^		__text_start = .;$/;"	s	section:.text
__text_start	arch/x86/cpu/u-boot.lds	/^	__text_start = .;$/;"	s
__ti_qspi_claim_bus	drivers/spi/ti_qspi.c	/^static int __ti_qspi_claim_bus(struct ti_qspi_priv *priv, int cs)$/;"	f	typeref:typename:int	file:
__ti_qspi_release_bus	drivers/spi/ti_qspi.c	/^static void __ti_qspi_release_bus(struct ti_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
__ti_qspi_set_mode	drivers/spi/ti_qspi.c	/^static int __ti_qspi_set_mode(struct ti_qspi_priv *priv, unsigned int mode)$/;"	f	typeref:typename:int	file:
__ti_qspi_setup_memorymap	drivers/spi/ti_qspi.c	/^static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv,$/;"	f	typeref:typename:void	file:
__ti_qspi_xfer	drivers/spi/ti_qspi.c	/^static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
__timer_get_boot_us	common/bootstage.c	/^ulong __timer_get_boot_us(void)$/;"	f	typeref:typename:ulong
__tm_gmtoff	include/linux/time.h	/^    long int __tm_gmtoff;         \/* Seconds east of UTC.  *\/$/;"	m	struct:tm	typeref:typename:long int
__tm_zone	include/linux/time.h	/^    __const char *__tm_zone;      \/* Timezone abbreviation.  *\/$/;"	m	struct:tm	typeref:typename:__const char *
__to_cpu	arch/mips/include/asm/io.h	/^#define __to_cpu(/;"	d
__tolower	include/linux/ctype.h	/^static inline unsigned char __tolower(unsigned char c)$/;"	f	typeref:typename:unsigned char
__toupper	include/linux/ctype.h	/^static inline unsigned char __toupper(unsigned char c)$/;"	f	typeref:typename:unsigned char
__tpm_internal_h	drivers/tpm/tpm_internal.h	/^#define __tpm_internal_h$/;"	d
__trace_if	include/linux/compiler.h	/^#define __trace_if(/;"	d
__twsi_i2c_init	drivers/i2c/mvtwsi.c	/^static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,$/;"	f	typeref:typename:void	file:
__twsi_i2c_probe_chip	drivers/i2c/mvtwsi.c	/^static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,$/;"	f	typeref:typename:int	file:
__twsi_i2c_read	drivers/i2c/mvtwsi.c	/^static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,$/;"	f	typeref:typename:int	file:
__twsi_i2c_set_bus_speed	drivers/i2c/mvtwsi.c	/^static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,$/;"	f	typeref:typename:uint	file:
__twsi_i2c_write	drivers/i2c/mvtwsi.c	/^static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,$/;"	f	typeref:typename:int	file:
__u16	arch/arc/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/arm/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/avr32/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/blackfin/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/m68k/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/microblaze/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/mips/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/nds32/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/nios2/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/openrisc/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/powerpc/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/sandbox/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/sh/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/sparc/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/x86/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	arch/xtensa/include/asm/types.h	/^typedef unsigned short __u16;$/;"	t	typeref:typename:unsigned short
__u16	include/compiler.h	/^typedef uint16_t __u16;$/;"	t	typeref:typename:uint16_t
__u32	arch/arc/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/arm/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/avr32/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/blackfin/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/m68k/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/microblaze/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/mips/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/nds32/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/nios2/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/openrisc/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/powerpc/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/sandbox/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/sh/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/sparc/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/x86/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	arch/xtensa/include/asm/types.h	/^typedef unsigned int __u32;$/;"	t	typeref:typename:unsigned int
__u32	include/compiler.h	/^typedef uint32_t __u32;$/;"	t	typeref:typename:uint32_t
__u64	arch/arc/include/asm/types.h	/^typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/arm/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/avr32/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/blackfin/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/m68k/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/microblaze/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/mips/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/mips/include/asm/types.h	/^typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/nds32/include/asm/types.h	/^typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/nios2/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/openrisc/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/powerpc/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/sandbox/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/sh/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/sparc/include/asm/types.h	/^typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/x86/include/asm/types.h	/^__extension__ typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u64	arch/xtensa/include/asm/types.h	/^typedef unsigned long long __u64;$/;"	t	typeref:typename:unsigned long long
__u8	arch/arc/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/arm/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/avr32/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/blackfin/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/m68k/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/microblaze/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/mips/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/nds32/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/nios2/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/openrisc/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/powerpc/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/sandbox/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/sh/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/sparc/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/x86/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	arch/xtensa/include/asm/types.h	/^typedef unsigned char __u8;$/;"	t	typeref:typename:unsigned char
__u8	include/compiler.h	/^typedef uint8_t __u8;$/;"	t	typeref:typename:uint8_t
__u_boot_sandbox_option_count	arch/sandbox/include/asm/sections.h	/^static inline size_t __u_boot_sandbox_option_count(void)$/;"	f	typeref:typename:size_t
__u_boot_sandbox_option_end	arch/sandbox/cpu/u-boot-spl.lds	/^	__u_boot_sandbox_option_end = .;$/;"	s
__u_boot_sandbox_option_end	arch/sandbox/cpu/u-boot.lds	/^	__u_boot_sandbox_option_end = .;$/;"	s
__u_boot_sandbox_option_start	arch/sandbox/cpu/u-boot-spl.lds	/^	__u_boot_sandbox_option_start = .;$/;"	s
__u_boot_sandbox_option_start	arch/sandbox/cpu/u-boot.lds	/^	__u_boot_sandbox_option_start = .;$/;"	s
__ucmpdi2	arch/nios2/lib/libgcc.c	/^__ucmpdi2 (DWtype a, DWtype b)$/;"	f	typeref:typename:word_type
__udelay	arch/arm/cpu/arm920t/ep93xx/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm920t/imx/timer.c	/^void __udelay (unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^void __udelay (unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm926ejs/armada100/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm926ejs/mx27/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm926ejs/mxs/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm926ejs/omap/timer.c	/^void __udelay (unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/arm926ejs/spear/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/arch_timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/iproc-common/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/ls102xa/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/omap-common/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/s5p-common/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/stv0991/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/sunxi/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/armv7/vf610/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/cpu/sa1100/timer.c	/^void __udelay (unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/imx-common/syscounter.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-at91/arm920t/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-davinci/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-orion5x/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-rmobile/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-stm32/stm32f1/timer.c	/^void __udelay(ulong usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-stm32/stm32f4/timer.c	/^void __udelay(ulong usec)$/;"	f	typeref:typename:void
__udelay	arch/arm/mach-stm32/stm32f7/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/avr32/cpu/interrupts.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/blackfin/cpu/interrupts.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/blackfin/include/asm/delay.h	/^static __inline__ void __udelay(unsigned long usecs)$/;"	f	typeref:typename:void
__udelay	arch/m68k/cpu/mcf547x_8x/slicetimer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/m68k/lib/time.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/microblaze/cpu/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/nds32/cpu/n1213/ag101/timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/openrisc/lib/timer.c	/^void __udelay(ulong usec)$/;"	f	typeref:typename:void
__udelay	arch/powerpc/lib/time.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/sandbox/cpu/cpu.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/sh/lib/time_sh2.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	arch/xtensa/lib/time.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	board/armltd/integrator/timer.c	/^void __udelay (unsigned long usec)$/;"	f	typeref:typename:void
__udelay	drivers/timer/tsc_timer.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	examples/api/libgenwrap.c	/^void __udelay(unsigned long usec)$/;"	f	typeref:typename:void
__udelay	lib/time.c	/^void __weak __udelay(unsigned long usec)$/;"	f	typeref:typename:void __weak
__udiv_qrnnd_16	arch/sh/lib/udiv_qrnnd.S	/^__udiv_qrnnd_16:$/;"	l
__udiv_qrnnd_c	arch/nios2/lib/longlong.h	/^#define __udiv_qrnnd_c(/;"	d
__udivdi3	arch/nios2/lib/libgcc.c	/^__udivdi3 (UDWtype n, UDWtype d)$/;"	f	typeref:typename:UDWtype
__udivmoddi4	arch/nios2/lib/libgcc.c	/^__udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp)$/;"	f	typeref:typename:UDWtype
__udivsi3	arch/arc/lib/libgcc2.c	/^__udivsi3(long a, long b)$/;"	f	typeref:typename:long
__udivsi3	arch/nios2/lib/libgcc.c	/^__udivsi3 (SItype a, SItype b)$/;"	f	typeref:typename:SItype
__udivsi3	arch/sh/lib/udivsi3.S	/^__udivsi3:$/;"	l
__udivsi3_i4	arch/sh/lib/udivsi3_i4i-Os.S	/^	.set	__udivsi3_i4, __udivsi3_i4i$/;"	d
__udivsi3_i4	arch/sh/lib/udivsi3_i4i.S	/^	.set	__udivsi3_i4, __udivsi3_i4i$/;"	d
__udivsi3_i4i	arch/sh/lib/udivsi3_i4i-Os.S	/^__udivsi3_i4i:$/;"	l
__udivsi3_i4i	arch/sh/lib/udivsi3_i4i.S	/^__udivsi3_i4i:$/;"	l
__ulpi_reset_wait	drivers/usb/ulpi/ulpi.c	/^static int __ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)$/;"	f	typeref:typename:int	file:
__umoddi3	arch/nios2/lib/libgcc.c	/^__umoddi3 (UDWtype u, UDWtype v)$/;"	f	typeref:typename:UDWtype
__umodsi3	arch/arc/lib/libgcc2.c	/^__umodsi3(long a, long b)$/;"	f	typeref:typename:long
__umodsi3	arch/nios2/lib/libgcc.c	/^__umodsi3 (SItype a, SItype b)$/;"	f	typeref:typename:SItype
__umulsidi3	arch/blackfin/lib/muldi3.c	/^#define __umulsidi3(/;"	d	file:
__umulsidi3	arch/m68k/lib/muldi3.c	/^#define __umulsidi3(/;"	d	file:
__umulsidi3	arch/microblaze/lib/muldi3.c	/^#define __umulsidi3(/;"	d	file:
__umulsidi3	arch/nios2/lib/longlong.h	/^#define __umulsidi3(/;"	d
__una_u16	arch/sh/include/asm/unaligned-sh4a.h	/^struct __una_u16 { u16 x __attribute__((packed)); };$/;"	s
__una_u32	arch/sh/include/asm/unaligned-sh4a.h	/^struct __una_u32 { u32 x __attribute__((packed)); };$/;"	s
__una_u64	arch/sh/include/asm/unaligned-sh4a.h	/^struct __una_u64 { u64 x __attribute__((packed)); };$/;"	s
__unused1	include/linux/stat.h	/^	unsigned long	__unused1;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused1	include/linux/stat.h	/^	unsigned long  __unused1;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused2	include/linux/stat.h	/^	unsigned long	__unused2;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused2	include/linux/stat.h	/^	unsigned long  __unused2;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused3	include/linux/stat.h	/^	unsigned long	__unused3;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused3	include/linux/stat.h	/^	unsigned long  __unused3;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused4	include/linux/stat.h	/^	unsigned long	__unused4;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused4	include/linux/stat.h	/^	unsigned long  __unused4;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused5	include/linux/stat.h	/^	unsigned long	__unused5;$/;"	m	struct:stat	typeref:typename:unsigned long
__unused5	include/linux/stat.h	/^	unsigned long  __unused5;$/;"	m	struct:stat	typeref:typename:unsigned long
__usage_fault_entry	arch/arm/lib/vectors_m.S	/^__usage_fault_entry:$/;"	l
__usbtty_puts	drivers/serial/usbtty.c	/^static void __usbtty_puts (const char *str, int len)$/;"	f	typeref:typename:void	file:
__used	include/linux/compiler-gcc.h	/^# define __used	/;"	d
__used	include/linux/compiler-gcc.h	/^#define __used	/;"	d
__used	include/linux/compiler.h	/^# define __used	/;"	d
__used	tools/imagetool.h	/^#  define __used	/;"	d
__user	include/linux/compiler.h	/^# define __user	/;"	d
__user	include/linux/compiler.h	/^# define __user$/;"	d
__user	tools/env/fw_env.c	/^# define  __user	/;"	d	file:
__uses_spiboot2	board/renesas/sh7752evb/spi-boot.c	/^#define __uses_spiboot2	/;"	d	file:
__uses_spiboot2	board/renesas/sh7753evb/spi-boot.c	/^#define __uses_spiboot2	/;"	d	file:
__uses_spiboot2	board/renesas/sh7757lcr/spi-boot.c	/^#define __uses_spiboot2	/;"	d	file:
__va	arch/sparc/cpu/leon2/prom.c	/^#define __va(/;"	d	file:
__va	arch/sparc/cpu/leon3/prom.c	/^#define __va(/;"	d	file:
__verify_pcpu_ptr	drivers/net/mvpp2.c	/^#define __verify_pcpu_ptr(/;"	d	file:
__video_console_h	include/video_console.h	/^#define __video_console_h$/;"	d
__virt_to_bus	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __virt_to_bus(/;"	d
__virt_to_bus__is_a_macro	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __virt_to_bus__is_a_macro$/;"	d
__virt_to_phys	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __virt_to_phys(/;"	d
__virt_to_phys__is_a_macro	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define __virt_to_phys__is_a_macro$/;"	d
__visible	include/linux/compiler-gcc.h	/^#define __visible	/;"	d
__visible	include/linux/compiler.h	/^#define __visible$/;"	d
__vmalloc	include/linux/compat.h	/^#define __vmalloc(/;"	d
__wbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void __wbdl_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__wbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void __wbdl_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__weak	include/linux/compiler-gcc.h	/^#define __weak	/;"	d
__wld_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void __wld_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__wld_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void __wld_dump(void __iomem *dx_base)$/;"	f	typeref:typename:void	file:
__write_32bit_c0_ctrl_register	arch/mips/include/asm/mipsregs.h	/^#define __write_32bit_c0_ctrl_register(/;"	d
__write_32bit_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __write_32bit_c0_register(/;"	d
__write_64bit_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __write_64bit_c0_register(/;"	d
__write_64bit_c0_split	arch/mips/include/asm/mipsregs.h	/^#define __write_64bit_c0_split(/;"	d
__write_once_size	include/linux/compiler.h	/^static __always_inline void __write_once_size(volatile void *p, void *res, int size)$/;"	f	typeref:typename:__always_inline void
__write_ulong_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __write_ulong_c0_register(/;"	d
__writex_32bit_c0_register	arch/mips/include/asm/mipsregs.h	/^#define __writex_32bit_c0_register(/;"	d
__wsum	include/linux/types.h	/^typedef __u32 __bitwise __wsum;$/;"	t	typeref:typename:__u32 __bitwise
__xchg	arch/arm/include/asm/proc-armv/system.h	/^static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)$/;"	f	typeref:typename:unsigned long
__xchg	arch/blackfin/include/asm/system.h	/^static inline unsigned long __xchg(unsigned long x, volatile void *ptr,$/;"	f	typeref:typename:unsigned long
__xchg	arch/microblaze/include/asm/system.h	/^static inline unsigned long __xchg(unsigned long with,$/;"	f	typeref:typename:unsigned long
__xchg	arch/mips/include/asm/system.h	/^__xchg(unsigned long x, volatile void * ptr, int size)$/;"	f	typeref:typename:unsigned long
__xchg	arch/sh/include/asm/system.h	/^#define __xchg(/;"	d
__xchg	arch/x86/cpu/lapic.c	/^static inline unsigned long __xchg(unsigned long x, volatile void *ptr,$/;"	f	typeref:typename:unsigned long	file:
__xchg_dummy	arch/blackfin/include/asm/system.h	/^struct __xchg_dummy {$/;"	s
__xchg_dummy	arch/x86/cpu/lapic.c	/^struct __xchg_dummy	{ unsigned long a[100]; };$/;"	s	file:
__xg	arch/blackfin/include/asm/system.h	/^#define __xg(/;"	d
__xg	arch/x86/cpu/lapic.c	/^#define __xg(/;"	d	file:
__zynq_clk_cpu_get_parent	arch/arm/mach-zynq/clk.c	/^static int __zynq_clk_cpu_get_parent(unsigned int srcsel)$/;"	f	typeref:typename:int	file:
__zynq_clk_periph_get_parent	arch/arm/mach-zynq/clk.c	/^static enum zynq_clk __zynq_clk_periph_get_parent(u32 srcsel)$/;"	f	typeref:enum:zynq_clk	file:
__zynq_clk_pll_get_rate	arch/arm/mach-zynq/clk.c	/^static unsigned long __zynq_clk_pll_get_rate(u32 *addr)$/;"	f	typeref:typename:unsigned long	file:
_adc_channels_single_shot	drivers/adc/adc-uclass.c	/^static int _adc_channels_single_shot(struct udevice *dev,$/;"	f	typeref:typename:int	file:
_after_flashbar_copy	arch/m68k/cpu/mcf52x2/start.S	/^_after_flashbar_copy:$/;"	l
_all	Makefile	/^$(filter-out _all sub-make $(CURDIR)\/Makefile, $(MAKECMDGOALS)) _all: sub-make$/;"	t
_all	Makefile	/^_all: all$/;"	t
_all	Makefile	/^_all: modules$/;"	t
_all	Makefile	/^_all:$/;"	t
_arm64_header	board/qualcomm/dragonboard410c/head.S	/^_arm64_header:$/;"	l
_asm_arch_me_h	arch/x86/include/asm/arch-broadwell/me.h	/^#define _asm_arch_me_h$/;"	d
_atomic_spin_lock_irqsave	arch/nios2/include/asm/bitops/atomic.h	/^#  define _atomic_spin_lock_irqsave(/;"	d
_atomic_spin_lock_irqsave	arch/nios2/include/asm/bitops/atomic.h	/^#define _atomic_spin_lock_irqsave(/;"	d
_atomic_spin_unlock_irqrestore	arch/nios2/include/asm/bitops/atomic.h	/^#  define _atomic_spin_unlock_irqrestore(/;"	d
_atomic_spin_unlock_irqrestore	arch/nios2/include/asm/bitops/atomic.h	/^#define _atomic_spin_unlock_irqrestore(/;"	d
_ax88180_link_state	drivers/net/ax88180.h	/^typedef enum _ax88180_link_state {$/;"	g
_bfin_readX	arch/blackfin/include/asm/blackfin_local.h	/^#define _bfin_readX(/;"	d
_bfin_writeX	arch/blackfin/include/asm/blackfin_local.h	/^#define _bfin_writeX(/;"	d
_block_isbad	include/linux/mtd/mtd.h	/^	int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)
_block_isreserved	include/linux/mtd/mtd.h	/^	int (*_block_isreserved) (struct mtd_info *mtd, loff_t ofs);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)
_block_markbad	include/linux/mtd/mtd.h	/^	int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)
_boot_bit_mask	arch/arm/mach-keystone/include/mach/psc_defs.h	/^static inline u32 _boot_bit_mask(u32 x, u32 y)$/;"	f	typeref:typename:u32
_bss_end	arch/openrisc/cpu/u-boot.lds	/^		_bss_end = .;$/;"	s
_bss_end	arch/sh/cpu/sh2/start.S	/^._bss_end:		.long	bss_end$/;"	l
_bss_end	arch/sh/cpu/sh3/start.S	/^._bss_end:		.long	bss_end$/;"	l
_bss_end	arch/sh/cpu/sh4/start.S	/^._bss_end:		.long	bss_end$/;"	l
_bss_end_ofs	arch/arm/cpu/armv8/start.S	/^_bss_end_ofs:$/;"	l
_bss_start	arch/openrisc/cpu/u-boot.lds	/^		_bss_start = .;$/;"	s
_bss_start	arch/sh/cpu/sh2/start.S	/^._bss_start:		.long	bss_start$/;"	l
_bss_start	arch/sh/cpu/sh3/start.S	/^._bss_start:		.long	bss_start$/;"	l
_bss_start	arch/sh/cpu/sh4/start.S	/^._bss_start:		.long	bss_start$/;"	l
_bss_start	board/renesas/sh7757lcr/lowlevel_init.S	/^_bss_start:	.long	bss_start$/;"	l
_bss_start_ofs	arch/arm/cpu/armv8/start.S	/^_bss_start_ofs:$/;"	l
_buck_set_enable	drivers/power/regulator/rk808.c	/^static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)$/;"	f	typeref:typename:int	file:
_buck_set_value	drivers/power/regulator/rk808.c	/^static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)$/;"	f	typeref:typename:int	file:
_build_dep	tools/buildman/kconfiglib.py	/^    def _build_dep(self):$/;"	m	class:Config
_byp	arch/powerpc/cpu/mpc8260/speed.c	/^#define _byp	/;"	d	file:
_byp	arch/powerpc/cpu/mpc83xx/speed.c	/^	_byp,$/;"	e	enum:__anon6ec4fb040103	file:
_c2_addr	arch/arm/mach-exynos/sec_boot.S	/^_c2_addr:$/;"	l
_cache_ret	tools/buildman/kconfiglib.py	/^    def _cache_ret(self, selection):$/;"	m	class:Choice
_clean_up_path	tools/buildman/kconfiglib.py	/^def _clean_up_path(path):$/;"	f
_comment	tools/buildman/kconfiglib.py	/^def _comment(s):$/;"	f
_compare_and_overwrite_entry	lib/hashtable.c	/^static inline int _compare_and_overwrite_entry(ENTRY item, ACTION action,$/;"	f	typeref:typename:int	file:
_compiletime_assert	include/linux/compiler.h	/^#define _compiletime_assert(/;"	d
_config_enabled	include/linux/kconfig.h	/^#define _config_enabled(/;"	d
_config_val	include/linux/kconfig.h	/^#define _config_val(/;"	d
_configured	arch/arm/mach-tegra/gpu.c	/^static bool _configured;$/;"	v	typeref:typename:bool	file:
_copy_flash	arch/m68k/cpu/mcf52x2/start.S	/^_copy_flash:$/;"	l
_cpsw_halt	drivers/net/cpsw.c	/^static void _cpsw_halt(struct cpsw_priv *priv)$/;"	f	typeref:typename:void	file:
_cpsw_init	drivers/net/cpsw.c	/^static int _cpsw_init(struct cpsw_priv *priv, u8 *enetaddr)$/;"	f	typeref:typename:int	file:
_cpsw_recv	drivers/net/cpsw.c	/^static int _cpsw_recv(struct cpsw_priv *priv, uchar **pkt)$/;"	f	typeref:typename:int	file:
_cpsw_register	drivers/net/cpsw.c	/^int _cpsw_register(struct cpsw_priv *priv)$/;"	f	typeref:typename:int
_cpsw_send	drivers/net/cpsw.c	/^static int _cpsw_send(struct cpsw_priv *priv, void *packet, int length)$/;"	f	typeref:typename:int	file:
_cpu_state	arch/arm/mach-exynos/sec_boot.S	/^_cpu_state:$/;"	l
_crc8	lib/crc8.c	/^static unsigned char _crc8(unsigned short data)$/;"	f	typeref:typename:unsigned char	file:
_create_MFDCR	arch/powerpc/cpu/ppc4xx/dcr.S	/^_create_MFDCR:$/;"	l
_create_MTDCR	arch/powerpc/cpu/ppc4xx/dcr.S	/^_create_MTDCR:$/;"	l
_ctype	lib/ctype.c	/^const unsigned char _ctype[] = {$/;"	v	typeref:typename:const unsigned char[]
_cur	arch/nios2/cpu/start.S	/^_cur:	movhi	r5, %hi(_cur - _start)$/;"	l
_cur	arch/openrisc/cpu/start.S	/^_cur:$/;"	l
_cv_	include/usbdevice.h	/^#define _cv_(/;"	d
_data	arch/avr32/cpu/u-boot.lds	/^	_data = .;$/;"	s
_data	arch/nios2/cpu/u-boot.lds	/^	_data = .;$/;"	s
_data_abort	arch/arm/lib/vectors.S	/^_data_abort:		.word data_abort$/;"	l
_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart.c	/^void _debug_uart_init(void)$/;"	f	typeref:typename:void
_debug_uart_init	arch/sparc/cpu/leon3/serial.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/altera_jtag_uart.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/altera_uart.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/arm_dcc.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/atmel_usart.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/ns16550.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_ar933x.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_efi.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_linflexuart.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_meson.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_mvebu_a3700.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_pic32.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_pl01x.c	/^static void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_s5p.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_xuartlite.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	drivers/serial/serial_zynq.c	/^static inline void _debug_uart_init(void)$/;"	f	typeref:typename:void	file:
_debug_uart_init	lib/efi/efi_stub.c	/^void _debug_uart_init(void)$/;"	f	typeref:typename:void
_debug_uart_putc	arch/arm/mach-uniphier/debug-uart/debug-uart.c	/^static void _debug_uart_putc(int c)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	arch/sparc/cpu/leon3/serial.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/altera_jtag_uart.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/altera_uart.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/arm_dcc.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/atmel_usart.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/ns16550.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_ar933x.c	/^static inline void _debug_uart_putc(int c)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_efi.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_linflexuart.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_meson.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_mvebu_a3700.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_pic32.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_pl01x.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_s5p.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_xuartlite.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	drivers/serial/serial_zynq.c	/^static inline void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_debug_uart_putc	lib/efi/efi_stub.c	/^static void _debug_uart_putc(int ch)$/;"	f	typeref:typename:void	file:
_default_settings	tools/patman/settings.py	/^_default_settings = {$/;"	v
_deindent	tools/buildman/kconfiglib.py	/^def _deindent(line, indent):$/;"	f
_determine_actual_symbols	tools/buildman/kconfiglib.py	/^    def _determine_actual_symbols(self):$/;"	m	class:Choice
_device_find_global_by_of_offset	drivers/core/device.c	/^static struct udevice *_device_find_global_by_of_offset(struct udevice *parent,$/;"	f	typeref:struct:udevice *	file:
_devres_alloc	include/dm/device.h	/^#define _devres_alloc(/;"	d
_disp_h_pulse	arch/arm/include/asm/arch-tegra/dc.h	/^struct _disp_h_pulse {$/;"	s
_disp_v_pulse0	arch/arm/include/asm/arch-tegra/dc.h	/^struct _disp_v_pulse0 {$/;"	s
_disp_v_pulse2	arch/arm/include/asm/arch-tegra/dc.h	/^struct _disp_v_pulse2 {$/;"	s
_dist_code	lib/zlib/trees.c	/^uch _dist_code[DIST_CODE_LEN];$/;"	v	typeref:typename:uch[]
_dist_code	lib/zlib/trees.h	/^const uch ZLIB_INTERNAL _dist_code[DIST_CODE_LEN] = {$/;"	v	typeref:typename:const uch ZLIB_INTERNAL[]
_dm_gpio_free	drivers/gpio/gpio-uclass.c	/^int _dm_gpio_free(struct udevice *dev, uint offset)$/;"	f	typeref:typename:int
_dm_pci_bus_to_phys	drivers/pci/pci-uclass.c	/^static int _dm_pci_bus_to_phys(struct udevice *ctlr,$/;"	f	typeref:typename:int	file:
_dm_pci_phys_to_bus	drivers/pci/pci-uclass.c	/^int _dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr,$/;"	f	typeref:typename:int
_dm_test_eth_rotate1	test/dm/eth.c	/^static int _dm_test_eth_rotate1(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
_dm_test_eth_rotate2	test/dm/eth.c	/^static int _dm_test_eth_rotate2(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
_dm_test_net_retry	test/dm/eth.c	/^static int _dm_test_net_retry(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
_do_bad_error	arch/arm/cpu/armv8/exceptions.S	/^_do_bad_error:$/;"	l
_do_bad_fiq	arch/arm/cpu/armv8/exceptions.S	/^_do_bad_fiq:$/;"	l
_do_bad_irq	arch/arm/cpu/armv8/exceptions.S	/^_do_bad_irq:$/;"	l
_do_bad_sync	arch/arm/cpu/armv8/exceptions.S	/^_do_bad_sync:$/;"	l
_do_env_set	cmd/nvedit.c	/^static int _do_env_set(int flag, int argc, char * const argv[], int env_flag)$/;"	f	typeref:typename:int	file:
_do_error	arch/arm/cpu/armv8/exceptions.S	/^_do_error:$/;"	l
_do_fiq	arch/arm/cpu/armv8/exceptions.S	/^_do_fiq:$/;"	l
_do_help	common/command.c	/^int _do_help(cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int
_do_irq	arch/arm/cpu/armv8/exceptions.S	/^_do_irq:$/;"	l
_do_sync	arch/arm/cpu/armv8/exceptions.S	/^_do_sync:$/;"	l
_dsp_mfhi	arch/mips/include/asm/mipsregs.h	/^#define _dsp_mfhi(/;"	d
_dsp_mflo	arch/mips/include/asm/mipsregs.h	/^#define _dsp_mflo(/;"	d
_dsp_mfxxx	arch/mips/include/asm/mipsregs.h	/^#define _dsp_mfxxx(/;"	d
_dsp_mthi	arch/mips/include/asm/mipsregs.h	/^#define _dsp_mthi(/;"	d
_dsp_mtlo	arch/mips/include/asm/mipsregs.h	/^#define _dsp_mtlo(/;"	d
_dsp_mtxxx	arch/mips/include/asm/mipsregs.h	/^#define _dsp_mtxxx(/;"	d
_dspic_read	board/liebherr/lwmon5/kbd.c	/^int _dspic_read(ushort reg, ushort *data)$/;"	f	typeref:typename:int
_dt_ucode_base_size	arch/x86/cpu/intel_common/car.S	/^_dt_ucode_base_size:$/;"	l
_dt_ucode_base_size	arch/x86/lib/fsp/fsp_car.S	/^_dt_ucode_base_size:$/;"	l
_dump_bfin_trace_buffer	arch/blackfin/cpu/traps.c	/^static void _dump_bfin_trace_buffer(void)$/;"	f	typeref:typename:void	file:
_dw_eth_halt	drivers/net/designware.c	/^static void _dw_eth_halt(struct dw_eth_dev *priv)$/;"	f	typeref:typename:void	file:
_dw_eth_init	drivers/net/designware.c	/^static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)$/;"	f	typeref:typename:int	file:
_dw_eth_recv	drivers/net/designware.c	/^static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)$/;"	f	typeref:typename:int	file:
_dw_eth_send	drivers/net/designware.c	/^static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)$/;"	f	typeref:typename:int	file:
_dw_free_pkt	drivers/net/designware.c	/^static int _dw_free_pkt(struct dw_eth_dev *priv)$/;"	f	typeref:typename:int	file:
_dw_write_hwaddr	drivers/net/designware.c	/^static int _dw_write_hwaddr(struct dw_eth_dev *priv, u8 *mac_id)$/;"	f	typeref:typename:int	file:
_e1000_disable	drivers/net/e1000.c	/^_e1000_disable(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
_e1000_init	drivers/net/e1000.c	/^_e1000_init(struct e1000_hw *hw, unsigned char enetaddr[6])$/;"	f	typeref:typename:int	file:
_e1000_poll	drivers/net/e1000.c	/^_e1000_poll(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
_e1000_transmit	drivers/net/e1000.c	/^static int _e1000_transmit(struct e1000_hw *hw, void *txpacket, int length)$/;"	f	typeref:typename:int	file:
_ebss	arch/m68k/cpu/u-boot.lds	/^		_ebss = .;$/;"	s
_ecode	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_ecode = .);$/;"	s	assignment:provide
_ecode	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_ecode = .);$/;"	s	assignment:provide
_ecode	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_ecode = .);$/;"	s	assignment:provide
_ecode	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_ecode = .);$/;"	s	assignment:provide
_edata	arch/avr32/cpu/u-boot.lds	/^	_edata = .;$/;"	s
_edata	arch/m68k/cpu/u-boot.lds	/^	_edata = .;$/;"	s
_edata	arch/nios2/cpu/u-boot.lds	/^	_edata = .;$/;"	s
_edata	arch/openrisc/cpu/u-boot.lds	/^		_edata = .;$/;"	s
_edata	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	_edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	_edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  _edata  =  .;$/;"	s
_edata	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_edata = .);$/;"	s	assignment:provide
_edata	arch/sparc/cpu/u-boot.lds	/^	_edata	=	.;$/;"	s
_edata	board/amcc/canyonlands/u-boot-ram.lds	/^  _edata  =  .;$/;"	s
_edata	board/amcc/sequoia/u-boot-ram.lds	/^  _edata  =  .;$/;"	s
_edata	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_edata = .);$/;"	s	assignment:provide
_edata	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_edata = .);$/;"	s	assignment:provide
_edata	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_edata = .);$/;"	s	assignment:provide
_edata	board/tqc/tqm8xx/u-boot.lds	/^  _edata  =  .;$/;"	s
_egot	arch/avr32/cpu/u-boot.lds	/^	_egot = .;$/;"	s
_egot	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_egot = .);$/;"	s	assignment:provide
_egot	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_egot = .);$/;"	s	assignment:provide
_egot	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_egot = .);$/;"	s	assignment:provide
_egot	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_egot = .);$/;"	s	assignment:provide
_ehci_create_int_queue	drivers/usb/host/ehci-hcd.c	/^static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,$/;"	f	typeref:struct:int_queue *	file:
_ehci_destroy_int_queue	drivers/usb/host/ehci-hcd.c	/^static int _ehci_destroy_int_queue(struct usb_device *dev,$/;"	f	typeref:typename:int	file:
_ehci_poll_int_queue	drivers/usb/host/ehci-hcd.c	/^static void *_ehci_poll_int_queue(struct usb_device *dev,$/;"	f	typeref:typename:void *	file:
_ehci_submit_bulk_msg	drivers/usb/host/ehci-hcd.c	/^static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
_ehci_submit_control_msg	drivers/usb/host/ehci-hcd.c	/^static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
_ehci_submit_int_msg	drivers/usb/host/ehci-hcd.c	/^static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
_emac_desc	drivers/net/davinci_emac.h	/^typedef volatile struct _emac_desc$/;"	s
_enable_actlr_smp	arch/arm/mach-rmobile/lowlevel_init_ca15.S	/^_enable_actlr_smp: \/* R8A7794 only (CA7) *\/$/;"	l
_enc28j60_h	drivers/net/enc28j60.h	/^#define _enc28j60_h$/;"	d
_end	arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds	/^	_end = .;$/;"	s
_end	arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds	/^	_end = .;$/;"	s
_end	arch/arm/cpu/armv7/sunxi/u-boot-spl.lds	/^	_end = .;$/;"	s
_end	arch/arm/cpu/armv8/u-boot.lds	/^	_end = .;$/;"	s
_end	arch/arm/lib/sections.c	/^char _end[0] __attribute__((section(".__end")));$/;"	v	typeref:typename:char[0]
_end	arch/arm/mach-zynq/u-boot-spl.lds	/^	_end = .;$/;"	s
_end	arch/mips/cpu/u-boot.lds	/^	_end = .;$/;"	s
_end	arch/nds32/cpu/n1213/u-boot.lds	/^	_end = .;$/;"	s
_end	arch/nios2/cpu/u-boot.lds	/^	_end = .;$/;"	s
_end	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  _end = .;$/;"	s
_end	arch/x86/cpu/u-boot.lds	/^	_end = .;$/;"	s
_end	board/amcc/canyonlands/u-boot-ram.lds	/^  _end = .;$/;"	s
_end	board/qualcomm/dragonboard410c/u-boot.lds	/^	_end = .;$/;"	s
_end	examples/standalone/mips.lds	/^	_end = .;$/;"	s
_end	examples/standalone/mips64.lds	/^	_end = .;$/;"	s
_end	examples/standalone/nds32.lds	/^	_end = .;$/;"	s
_end	examples/standalone/sparc.lds	/^	_end = .;$/;"	s
_end	spl/u-boot-spl.lds	/^ _end = .;$/;"	s
_end_of_vectors	arch/powerpc/cpu/mpc512x/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc5xx/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc5xxx/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc8260/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc83xx/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc85xx/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc86xx/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/mpc8xx/start.S	/^_end_of_vectors:$/;"	l
_end_of_vectors	arch/powerpc/cpu/ppc4xx/start.S	/^_end_of_vectors:$/;"	l
_end_ofs	arch/arm/cpu/armv8/start.S	/^_end_ofs:$/;"	l
_endtext	arch/openrisc/cpu/u-boot.lds	/^		_endtext = .;$/;"	s
_env_flags_validate_type	common/env_flags.c	/^static int _env_flags_validate_type(const char *value,$/;"	f	typeref:typename:int	file:
_eq_to_sym	tools/buildman/kconfiglib.py	/^    def _eq_to_sym(self, eq):$/;"	m	class:Config
_erase	include/linux/mtd/mtd.h	/^	int (*_erase) (struct mtd_info *mtd, struct erase_info *instr);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,struct erase_info * instr)
_erotext	arch/m68k/cpu/u-boot.lds	/^	_erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  _erotext = .;$/;"	s
_erotext	board/amcc/canyonlands/u-boot-ram.lds	/^  _erotext = .;$/;"	s
_erotext	board/amcc/sequoia/u-boot-ram.lds	/^  _erotext = .;$/;"	s
_erotext	board/tqc/tqm8xx/u-boot.lds	/^  _erotext = .;$/;"	s
_escape	test/py/multiplexed_log.py	/^    def _escape(self, data):$/;"	m	class:Logfile
_etext	arch/avr32/cpu/u-boot.lds	/^	_etext = .;$/;"	s
_etext	arch/m68k/cpu/u-boot.lds	/^	_etext = .;$/;"	s
_etext	arch/nios2/cpu/u-boot.lds	/^	_etext = .;$/;"	s
_etext	arch/openrisc/cpu/u-boot.lds	/^		_etext = .;$/;"	s
_etext	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  _etext = .;$/;"	s
_etext	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^    _etext = .;$/;"	s
_etext	arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds	/^	_etext = .;$/;"	s
_etext	arch/powerpc/cpu/mpc85xx/u-boot-spl.lds	/^	_etext = .;$/;"	s
_etext	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^    _etext = .;$/;"	s
_etext	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^    _etext = .;$/;"	s
_etext	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^    _etext = .;$/;"	s
_etext	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_etext = .);$/;"	s	assignment:provide
_etext	arch/sparc/cpu/u-boot.lds	/^	_etext = .;$/;"	s
_etext	board/amcc/canyonlands/u-boot-ram.lds	/^  _etext = .;$/;"	s
_etext	board/amcc/sequoia/u-boot-ram.lds	/^  _etext = .;$/;"	s
_etext	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_etext = .);$/;"	s	assignment:provide
_etext	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_etext = .);$/;"	s	assignment:provide
_etext	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_etext = .);$/;"	s	assignment:provide
_etext	board/tqc/tqm8xx/u-boot.lds	/^  _etext = .;$/;"	s
_eval_expr	tools/buildman/kconfiglib.py	/^    def _eval_expr(self, expr):$/;"	m	class:Config
_eval_expr_rec	tools/buildman/kconfiglib.py	/^    def _eval_expr_rec(self, expr):$/;"	m	class:Config
_eval_max	tools/buildman/kconfiglib.py	/^    def _eval_max(self, e1, e2):$/;"	m	class:Config
_eval_min	tools/buildman/kconfiglib.py	/^    def _eval_min(self, e1, e2):$/;"	m	class:Config
_evba	arch/avr32/cpu/start.S	/^_evba:$/;"	l
_exc_handler	arch/m68k/cpu/mcf5227x/start.S	/^_exc_handler:$/;"	l
_exc_handler	arch/m68k/cpu/mcf523x/start.S	/^_exc_handler:$/;"	l
_exc_handler	arch/m68k/cpu/mcf52x2/start.S	/^_exc_handler:$/;"	l
_exc_handler	arch/m68k/cpu/mcf530x/start.S	/^_exc_handler:$/;"	l
_exc_handler	arch/m68k/cpu/mcf532x/start.S	/^_exc_handler:$/;"	l
_exc_handler	arch/m68k/cpu/mcf5445x/start.S	/^_exc_handler:$/;"	l
_exc_handler	arch/m68k/cpu/mcf547x_8x/start.S	/^_exc_handler:$/;"	l
_except_end	arch/nios2/cpu/start.S	/^_except_end:$/;"	l
_except_start	arch/nios2/cpu/start.S	/^_except_start:$/;"	l
_exception	arch/nios2/cpu/exceptions.S	/^_exception:$/;"	l
_exception	arch/powerpc/cpu/mpc512x/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc5xx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc5xxx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc8260/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc83xx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc85xx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc86xx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/mpc8xx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception	arch/powerpc/cpu/ppc4xx/traps.c	/^static void _exception(int signr, struct pt_regs *regs)$/;"	f	typeref:typename:void	file:
_exception_handler	arch/microblaze/cpu/exception.c	/^void _exception_handler (void)$/;"	f	typeref:typename:void
_exception_handler	arch/openrisc/cpu/start.S	/^_exception_handler:$/;"	l
_exception_return	arch/nios2/cpu/exceptions.S	/^_exception_return:$/;"	l
_exit_init_l2_a15	arch/arm/mach-rmobile/lowlevel_init_ca15.S	/^_exit_init_l2_a15:$/;"	l
_expand_sym_refs	tools/buildman/kconfiglib.py	/^    def _expand_sym_refs(self, s):$/;"	m	class:Config
_expr_depends_on	tools/buildman/kconfiglib.py	/^    def _expr_depends_on(self, expr, sym):$/;"	m	class:Config
_expr_to_str	tools/buildman/kconfiglib.py	/^def _expr_to_str(expr):$/;"	f
_expr_to_str_rec	tools/buildman/kconfiglib.py	/^def _expr_to_str_rec(expr):$/;"	f
_expr_val_str	tools/buildman/kconfiglib.py	/^    def _expr_val_str(self, expr, no_value_str="(none)",$/;"	m	class:Config
_exynos_mipi_dsi_clear_frame_done	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
_exynos_mipi_dsi_get_frame_done_status	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device$/;"	f	typeref:typename:unsigned int
_f	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
_fault	arch/m68k/cpu/mcf5227x/start.S	/^_fault:$/;"	l
_fault	arch/m68k/cpu/mcf523x/start.S	/^_fault:$/;"	l
_fault	arch/m68k/cpu/mcf52x2/start.S	/^_fault:$/;"	l
_fault	arch/m68k/cpu/mcf530x/start.S	/^_fault:$/;"	l
_fault	arch/m68k/cpu/mcf532x/start.S	/^_fault:$/;"	l
_fault	arch/m68k/cpu/mcf5445x/start.S	/^_fault:$/;"	l
_fault	arch/m68k/cpu/mcf547x_8x/start.S	/^_fault:$/;"	l
_fb_nand_erase	common/fb_nand.c	/^static int _fb_nand_erase(struct mtd_info *mtd, struct part_info *part)$/;"	f	typeref:typename:int	file:
_fb_nand_write	common/fb_nand.c	/^static int _fb_nand_write(struct mtd_info *mtd, struct part_info *part,$/;"	f	typeref:typename:int	file:
_fcode	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_fcode = .);$/;"	s	assignment:provide
_fcode	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_fcode = .);$/;"	s	assignment:provide
_fcode	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_fcode = .);$/;"	s	assignment:provide
_fcode	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_fcode = .);$/;"	s	assignment:provide
_fdata	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_fdata = .);$/;"	s	assignment:provide
_fdata	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_fdata = .);$/;"	s	assignment:provide
_fdata	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_fdata = .);$/;"	s	assignment:provide
_fdata	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_fdata = .);$/;"	s	assignment:provide
_fdt_add_property	lib/libfdt/fdt_rw.c	/^static int _fdt_add_property(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int	file:
_fdt_blocks_misordered	lib/libfdt/fdt_rw.c	/^static int _fdt_blocks_misordered(const void *fdt,$/;"	f	typeref:typename:int	file:
_fdt_check_node_offset	lib/libfdt/fdt.c	/^int _fdt_check_node_offset(const void *fdt, int offset)$/;"	f	typeref:typename:int
_fdt_check_prop_offset	lib/libfdt/fdt.c	/^int _fdt_check_prop_offset(const void *fdt, int offset)$/;"	f	typeref:typename:int
_fdt_data_size	lib/libfdt/fdt_rw.c	/^static inline int _fdt_data_size(void *fdt)$/;"	f	typeref:typename:int	file:
_fdt_find_add_string	lib/libfdt/fdt_rw.c	/^static int _fdt_find_add_string(void *fdt, const char *s)$/;"	f	typeref:typename:int	file:
_fdt_find_add_string	lib/libfdt/fdt_sw.c	/^static int _fdt_find_add_string(void *fdt, const char *s)$/;"	f	typeref:typename:int	file:
_fdt_find_string	lib/libfdt/fdt.c	/^const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)$/;"	f	typeref:typename:const char *
_fdt_grab_space	lib/libfdt/fdt_sw.c	/^static void *_fdt_grab_space(void *fdt, size_t len)$/;"	f	typeref:typename:void *	file:
_fdt_mem_rsv	lib/libfdt/libfdt_internal.h	/^static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)$/;"	f	typeref:typename:const struct fdt_reserve_entry *
_fdt_mem_rsv_w	lib/libfdt/libfdt_internal.h	/^static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)$/;"	f	typeref:struct:fdt_reserve_entry *
_fdt_node_end_offset	lib/libfdt/fdt_wip.c	/^int _fdt_node_end_offset(void *fdt, int offset)$/;"	f	typeref:typename:int
_fdt_nodename_eq	lib/libfdt/fdt_ro.c	/^static int _fdt_nodename_eq(const void *fdt, int offset,$/;"	f	typeref:typename:int	file:
_fdt_nop_region	lib/libfdt/fdt_wip.c	/^static void _fdt_nop_region(void *start, int len)$/;"	f	typeref:typename:void	file:
_fdt_offset_ptr	lib/libfdt/libfdt_internal.h	/^static inline const void *_fdt_offset_ptr(const void *fdt, int offset)$/;"	f	typeref:typename:const void *
_fdt_offset_ptr_w	lib/libfdt/libfdt_internal.h	/^static inline void *_fdt_offset_ptr_w(void *fdt, int offset)$/;"	f	typeref:typename:void *
_fdt_packblocks	lib/libfdt/fdt_rw.c	/^static void _fdt_packblocks(const char *old, char *new,$/;"	f	typeref:typename:void	file:
_fdt_resize_property	lib/libfdt/fdt_rw.c	/^static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int	file:
_fdt_rw_check_header	lib/libfdt/fdt_rw.c	/^static int _fdt_rw_check_header(void *fdt)$/;"	f	typeref:typename:int	file:
_fdt_splice	lib/libfdt/fdt_rw.c	/^static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen)$/;"	f	typeref:typename:int	file:
_fdt_splice_mem_rsv	lib/libfdt/fdt_rw.c	/^static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,$/;"	f	typeref:typename:int	file:
_fdt_splice_string	lib/libfdt/fdt_rw.c	/^static int _fdt_splice_string(void *fdt, int newlen)$/;"	f	typeref:typename:int	file:
_fdt_splice_struct	lib/libfdt/fdt_rw.c	/^static int _fdt_splice_struct(void *fdt, void *p,$/;"	f	typeref:typename:int	file:
_fdt_string_eq	lib/libfdt/fdt_ro.c	/^static int _fdt_string_eq(const void *fdt, int stroffset,$/;"	f	typeref:typename:int	file:
_fdt_sw_check_header	lib/libfdt/fdt_sw.c	/^static int _fdt_sw_check_header(void *fdt)$/;"	f	typeref:typename:int	file:
_fgot	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_fgot = .);$/;"	s	assignment:provide
_fgot	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_fgot = .);$/;"	s	assignment:provide
_fgot	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_fgot = .);$/;"	s	assignment:provide
_fgot	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_fgot = .);$/;"	s	assignment:provide
_fiq	arch/arm/lib/vectors.S	/^_fiq:			.word fiq$/;"	l
_flashbar_setup	arch/m68k/cpu/mcf52x2/start.S	/^_flashbar_setup:$/;"	l
_flashbar_setup_end	arch/m68k/cpu/mcf52x2/start.S	/^_flashbar_setup_end:$/;"	l
_from_hex	common/xyzModem.c	/^_from_hex (char c)$/;"	f	typeref:typename:int	file:
_ftext	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_ftext = .);$/;"	s	assignment:provide
_ftext	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_ftext = .);$/;"	s	assignment:provide
_ftext	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_ftext = .);$/;"	s	assignment:provide
_ftext	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_ftext = .);$/;"	s	assignment:provide
_gd	arch/microblaze/cpu/start.S	/^_gd:$/;"	l
_gd_init	arch/sh/cpu/sh2/start.S	/^._gd_init:		.long	(_sh_start - GENERATED_GBL_DATA_SIZE)$/;"	l
_gd_init	arch/sh/cpu/sh3/start.S	/^._gd_init:		.long	(_sh_start - GENERATED_GBL_DATA_SIZE)$/;"	l
_gd_init	arch/sh/cpu/sh4/start.S	/^._gd_init:		.long	(_sh_start - GENERATED_GBL_DATA_SIZE)$/;"	l
_get_dependent	tools/buildman/kconfiglib.py	/^    def _get_dependent(self):$/;"	m	class:Symbol
_get_device	include/linux/mtd/mtd.h	/^	int (*_get_device) (struct mtd_info *mtd);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd)
_get_expr_syms	tools/buildman/kconfiglib.py	/^def _get_expr_syms(expr):$/;"	f
_get_expr_syms_rec	tools/buildman/kconfiglib.py	/^def _get_expr_syms_rec(expr, res):$/;"	f
_get_fact_prot_info	include/linux/mtd/mtd.h	/^	int (*_get_fact_prot_info) (struct mtd_info *mtd, size_t len,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,size_t len,size_t * retlen,struct otp_info * buf)
_get_gpio_direction	drivers/gpio/omap_gpio.c	/^static int _get_gpio_direction(const struct gpio_bank *bank, int gpio)$/;"	f	typeref:typename:int	file:
_get_gpio_value	drivers/gpio/omap_gpio.c	/^static int _get_gpio_value(const struct gpio_bank *bank, int gpio)$/;"	f	typeref:typename:int	file:
_get_keyword	tools/buildman/kconfiglib.py	/^_get_keyword = \\$/;"	v
_get_new_blk_no	fs/ext4/ext4_common.c	/^static int _get_new_blk_no(unsigned char *buffer)$/;"	f	typeref:typename:int	file:
_get_new_inode_no	fs/ext4/ext4_common.c	/^static int _get_new_inode_no(unsigned char *buffer)$/;"	f	typeref:typename:int	file:
_get_node	fs/ext4/ext4_journal.c	/^static struct revoke_blk_list *_get_node(void)$/;"	f	typeref:struct:revoke_blk_list *	file:
_get_sclk	arch/blackfin/lib/clocks.c	/^static u_long _get_sclk(u_long *cache)$/;"	f	typeref:typename:u_long	file:
_get_sym_or_choice_str	tools/buildman/kconfiglib.py	/^    def _get_sym_or_choice_str(self, sc):$/;"	m	class:Config
_get_unmapped_area	include/linux/mtd/mtd.h	/^	unsigned long (*_get_unmapped_area) (struct mtd_info *mtd,$/;"	m	struct:mtd_info	typeref:typename:unsigned long (*)(struct mtd_info * mtd,unsigned long len,unsigned long offset,unsigned long flags)
_get_user_prot_info	include/linux/mtd/mtd.h	/^	int (*_get_user_prot_info) (struct mtd_info *mtd, size_t len,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,size_t len,size_t * retlen,struct otp_info * buf)
_get_visibility	tools/buildman/kconfiglib.py	/^def _get_visibility(sc):$/;"	f
_gic_state	arch/arm/mach-exynos/sec_boot.S	/^_gic_state:$/;"	l
_global_priv_dm_test_state	test/dm/test-main.c	/^static struct dm_test_state _global_priv_dm_test_state;$/;"	v	typeref:struct:dm_test_state	file:
_glue	drivers/usb/musb-new/omap2430.c	/^struct omap2430_glue		*_glue;$/;"	v	typeref:struct:omap2430_glue *
_go_to_speed	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^_go_to_speed: .word go_to_speed$/;"	l
_got	arch/avr32/cpu/u-boot.lds	/^	_got = .;$/;"	s
_got_end	arch/microblaze/cpu/u-boot.lds	/^		_got_end = .;$/;"	s
_got_start	arch/microblaze/cpu/u-boot.lds	/^		_got_start = .;$/;"	s
_gp	arch/mips/cpu/u-boot.lds	/^	_gp = ALIGN(16) + 0x7ff0;$/;"	s
_gp	examples/standalone/mips.lds	/^	_gp = ALIGN(16) + 0x7ff0;$/;"	s
_gp	examples/standalone/mips64.lds	/^	_gp = ALIGN(16) + 0x7ff0;$/;"	s
_gpio_request_by_name_nodev	drivers/gpio/gpio-uclass.c	/^static int _gpio_request_by_name_nodev(const void *blob, int node,$/;"	f	typeref:typename:int	file:
_gpt_entry	include/part_efi.h	/^typedef struct _gpt_entry {$/;"	s
_gpt_entry_attributes	include/part_efi.h	/^typedef union _gpt_entry_attributes {$/;"	u
_gpt_header	include/part_efi.h	/^typedef struct _gpt_header {$/;"	s
_greth_bd	drivers/net/greth.h	/^typedef struct _greth_bd {$/;"	s
_greth_bd	include/grlib/greth.h	/^typedef struct _greth_bd {$/;"	s
_greth_regs	drivers/net/greth.h	/^typedef struct _greth_regs {$/;"	s
_greth_regs	include/grlib/greth.h	/^typedef struct _greth_regs {$/;"	s
_gt64120	board/imgtec/malta/lowlevel_init.S	/^_gt64120:$/;"	l
_hardreset	arch/sparc/cpu/leon2/start.S	/^_hardreset:$/;"	l
_hardreset	arch/sparc/cpu/leon3/start.S	/^_hardreset:$/;"	l
_has_auto_menu_dep_on	tools/buildman/kconfiglib.py	/^    def _has_auto_menu_dep_on(self, on):$/;"	m	class:Symbol
_hdelete	lib/hashtable.c	/^static void _hdelete(const char *key, struct hsearch_data *htab, ENTRY *ep,$/;"	f	typeref:typename:void	file:
_hotplug_addr	arch/arm/mach-exynos/sec_boot.S	/^_hotplug_addr:$/;"	l
_hrcw_table	arch/powerpc/cpu/mpc8260/start.S	/^_hrcw_table:$/;"	l
_hw_exception_handler	arch/microblaze/cpu/exception.c	/^void _hw_exception_handler (void)$/;"	f	typeref:typename:void
_hwerr	arch/sparc/cpu/leon2/start.S	/^_hwerr:$/;"	l
_hwerr	arch/sparc/cpu/leon3/start.S	/^_hwerr:$/;"	l
_i2c_bus_reset	drivers/i2c/ppc4xx_i2c.c	/^static void _i2c_bus_reset(struct i2c_adapter *adap)$/;"	f	typeref:typename:void	file:
_i2c_init	drivers/i2c/lpc32xx_i2c.c	/^static void _i2c_init(struct i2c_adapter *adap,$/;"	f	typeref:typename:void	file:
_i2c_transfer	drivers/i2c/ppc4xx_i2c.c	/^static int _i2c_transfer(struct i2c_adapter *adap,$/;"	f	typeref:typename:int	file:
_ich6_gpio_set_direction	drivers/gpio/intel_ich6_gpio.c	/^static int _ich6_gpio_set_direction(uint16_t base, unsigned offset, int dir)$/;"	f	typeref:typename:int	file:
_ich6_gpio_set_value	drivers/gpio/intel_ich6_gpio.c	/^static int _ich6_gpio_set_value(uint16_t base, unsigned offset, int value)$/;"	f	typeref:typename:int	file:
_id_keyword_re_match	tools/buildman/kconfiglib.py	/^_id_keyword_re_match = re.compile(r"\\s*([\\w.\/-]+)\\s*").match$/;"	v
_image_binary_end	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^	.dynsym _image_binary_end : { *(.dynsym) }$/;"	S
_image_binary_end	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	arch/arm/cpu/armv8/u-boot-spl.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	arch/arm/cpu/u-boot-spl.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	arch/arm/cpu/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	arch/arm/mach-zynq/u-boot-spl.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	arch/arm/mach-zynq/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	board/amcc/canyonlands/u-boot-ram.lds	/^  _image_binary_end = .;$/;"	s
_image_binary_end	board/birdland/bav335x/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	board/cirrus/edb93xx/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	board/compulab/cm_t335/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	board/freescale/mx31ads/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	board/ti/am335x/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	board/vscom/baltos/u-boot.lds	/^	_image_binary_end = .;$/;"	s
_image_binary_end	u-boot.lds	/^ _image_binary_end = .;$/;"	s
_image_copy_start	board/amcc/canyonlands/u-boot-ram.lds	/^    _image_copy_start = .;$/;"	s	section:.text
_in16r	arch/sparc/cpu/leon3/usb_uhci.c	/^unsigned short _in16r(unsigned int address)$/;"	f	typeref:typename:unsigned short
_in32r	arch/sparc/cpu/leon3/usb_uhci.c	/^unsigned int _in32r(unsigned int address)$/;"	f	typeref:typename:unsigned int
_indentation	tools/buildman/kconfiglib.py	/^def _indentation(line):$/;"	f
_index	arch/xtensa/cpu/start.S	/^	.set	_index, 0$/;"	d
_index	arch/xtensa/cpu/start.S	/^	.set	_index, _index + 1$/;"	d
_init	arch/sh/cpu/sh2/start.S	/^_init:$/;"	l
_initial_token_re_match	tools/buildman/kconfiglib.py	/^_initial_token_re_match = re.compile(r"[^\\w]*(\\w+)\\s*").match$/;"	v
_initialize_dtt	cmd/dtt.c	/^static void _initialize_dtt(void)$/;"	f	typeref:typename:void	file:
_input_send_keycodes	drivers/input/input.c	/^static int _input_send_keycodes(struct input_config *config, int keycode[],$/;"	f	typeref:typename:int	file:
_insb	arch/m68k/include/asm/io.h	/^static inline void _insb(volatile u8 * port, void *buf, int ns)$/;"	f	typeref:typename:void
_insl	arch/m68k/include/asm/io.h	/^static inline void _insl(volatile u32 * port, void *buf, int nl)$/;"	f	typeref:typename:void
_insl_ns	arch/m68k/include/asm/io.h	/^static inline void _insl_ns(volatile u32 * port, void *buf, int nl)$/;"	f	typeref:typename:void
_insw	arch/m68k/include/asm/io.h	/^static inline void _insw(volatile u16 * port, void *buf, int ns)$/;"	f	typeref:typename:void
_insw	arch/sandbox/include/asm/io.h	/^static inline void _insw(volatile u16 *port, void *buf, int ns)$/;"	f	typeref:typename:void
_insw_ns	arch/m68k/include/asm/io.h	/^static inline void _insw_ns(volatile u16 * port, void *buf, int ns)$/;"	f	typeref:typename:void
_int_handler	arch/m68k/cpu/mcf5227x/start.S	/^_int_handler:$/;"	l
_int_handler	arch/m68k/cpu/mcf523x/start.S	/^_int_handler:$/;"	l
_int_handler	arch/m68k/cpu/mcf52x2/start.S	/^_int_handler:$/;"	l
_int_handler	arch/m68k/cpu/mcf530x/start.S	/^_int_handler:$/;"	l
_int_handler	arch/m68k/cpu/mcf532x/start.S	/^_int_handler:$/;"	l
_int_handler	arch/m68k/cpu/mcf5445x/start.S	/^_int_handler:$/;"	l
_int_handler	arch/m68k/cpu/mcf547x_8x/start.S	/^_int_handler:$/;"	l
_intel_me_status	arch/x86/cpu/intel_common/me_status.c	/^static void _intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)$/;"	f	typeref:typename:void	file:
_internal_error	tools/buildman/kconfiglib.py	/^def _internal_error(msg):$/;"	f
_interrupt_handler	arch/microblaze/cpu/irq.S	/^_interrupt_handler:$/;"	l
_intersperse	tools/buildman/kconfiglib.py	/^def _intersperse(lst, op):$/;"	f
_invalidate	tools/buildman/kconfiglib.py	/^    def _invalidate(self):$/;"	m	class:Choice
_invalidate	tools/buildman/kconfiglib.py	/^    def _invalidate(self):$/;"	m	class:Symbol
_invalidate_all	tools/buildman/kconfiglib.py	/^    def _invalidate_all(self):$/;"	m	class:Config
_invalidate_dependent	tools/buildman/kconfiglib.py	/^    def _invalidate_dependent(self):$/;"	m	class:Symbol
_irq	arch/arm/lib/vectors.S	/^_irq:			.word irq$/;"	l
_irq_entry	arch/sparc/cpu/leon2/start.S	/^_irq_entry:$/;"	l
_irq_entry	arch/sparc/cpu/leon3/start.S	/^_irq_entry:$/;"	l
_is_base_n	tools/buildman/kconfiglib.py	/^def _is_base_n(s, n):$/;"	f
_is_hex	common/xyzModem.c	/^_is_hex (char c)$/;"	f	typeref:typename:bool	file:
_is_locked	include/linux/mtd/mtd.h	/^	int (*_is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs,uint64_t len)
_ivt	arch/arc/cpu/arcv1/ivt.S	/^_ivt:$/;"	l
_l	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
_led_display_h_	include/led-display.h	/^#define _led_display_h_$/;"	d
_legacy_mbr	include/part_efi.h	/^typedef struct _legacy_mbr {$/;"	s
_length_code	lib/zlib/trees.c	/^uch _length_code[MAX_MATCH-MIN_MATCH+1];$/;"	v	typeref:typename:uch[]
_length_code	lib/zlib/trees.h	/^const uch ZLIB_INTERNAL _length_code[MAX_MATCH-MIN_MATCH+1]= {$/;"	v	typeref:typename:const uch ZLIB_INTERNAL[]
_lines	tools/buildman/kconfiglib.py	/^def _lines(*args):$/;"	f
_linflex_serial_getc	drivers/serial/serial_linflexuart.c	/^static int _linflex_serial_getc(struct linflex_fsl *base)$/;"	f	typeref:typename:int	file:
_linflex_serial_init	drivers/serial/serial_linflexuart.c	/^static int _linflex_serial_init(struct linflex_fsl *base)$/;"	f	typeref:typename:int	file:
_linflex_serial_putc	drivers/serial/serial_linflexuart.c	/^static int _linflex_serial_putc(struct linflex_fsl *base, const char c)$/;"	f	typeref:typename:int	file:
_linflex_serial_setbrg	drivers/serial/serial_linflexuart.c	/^static void _linflex_serial_setbrg(struct linflex_fsl *base, int baudrate)$/;"	f	typeref:typename:void	file:
_load_addr	arch/sparc/cpu/u-boot.lds	/^		_load_addr = .;$/;"	s	section:.text
_local_inet_start	arch/sandbox/cpu/eth-raw-os.c	/^static int _local_inet_start(struct eth_sandbox_raw_priv *priv)$/;"	f	typeref:typename:int	file:
_lock	include/linux/mtd/mtd.h	/^	int (*_lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs,uint64_t len)
_lock_user_prot_reg	include/linux/mtd/mtd.h	/^	int (*_lock_user_prot_reg) (struct mtd_info *mtd, loff_t from,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,size_t len)
_loop	arch/arm/mach-tegra/psci.S	/^_loop:	wfi$/;"	l
_loop_forever	arch/arm/cpu/arm926ejs/omap/reset.S	/^_loop_forever:$/;"	l
_loop_forever	arch/arm/cpu/armv7/kona-common/reset.S	/^_loop_forever:$/;"	l
_loop_forever	arch/arm/mach-s5pc1xx/reset.S	/^_loop_forever:$/;"	l
_loop_forever	arch/arm/mach-tegra/lowlevel_init.S	/^_loop_forever:$/;"	l
_loop_forever	arch/arm/mach-versatile/reset.S	/^_loop_forever:$/;"	l
_lowlevel_init	arch/sh/cpu/sh2/start.S	/^._lowlevel_init:	.long	(lowlevel_init - (100b + 4))$/;"	l
_lowlevel_init	arch/sh/cpu/sh3/start.S	/^._lowlevel_init:	.long	(lowlevel_init - (100b + 4))$/;"	l
_lowlevel_init	arch/sh/cpu/sh4/start.S	/^._lowlevel_init:	.long	(lowlevel_init - (100b + 4))$/;"	l
_lpuart32_serial_getc	drivers/serial/serial_lpuart.c	/^static int _lpuart32_serial_getc(struct lpuart_fsl *base)$/;"	f	typeref:typename:int	file:
_lpuart32_serial_init	drivers/serial/serial_lpuart.c	/^static int _lpuart32_serial_init(struct lpuart_fsl *base)$/;"	f	typeref:typename:int	file:
_lpuart32_serial_putc	drivers/serial/serial_lpuart.c	/^static void _lpuart32_serial_putc(struct lpuart_fsl *base, const char c)$/;"	f	typeref:typename:void	file:
_lpuart32_serial_setbrg	drivers/serial/serial_lpuart.c	/^static void _lpuart32_serial_setbrg(struct lpuart_fsl *base, int baudrate)$/;"	f	typeref:typename:void	file:
_lpuart32_serial_tstc	drivers/serial/serial_lpuart.c	/^static int _lpuart32_serial_tstc(struct lpuart_fsl *base)$/;"	f	typeref:typename:int	file:
_lpuart_serial_getc	drivers/serial/serial_lpuart.c	/^static int _lpuart_serial_getc(struct lpuart_fsl *base)$/;"	f	typeref:typename:int	file:
_lpuart_serial_init	drivers/serial/serial_lpuart.c	/^static int _lpuart_serial_init(struct lpuart_fsl *base)$/;"	f	typeref:typename:int	file:
_lpuart_serial_putc	drivers/serial/serial_lpuart.c	/^static void _lpuart_serial_putc(struct lpuart_fsl *base, const char c)$/;"	f	typeref:typename:void	file:
_lpuart_serial_setbrg	drivers/serial/serial_lpuart.c	/^static void _lpuart_serial_setbrg(struct lpuart_fsl *base, int baudrate)$/;"	f	typeref:typename:void	file:
_lpuart_serial_tstc	drivers/serial/serial_lpuart.c	/^static int _lpuart_serial_tstc(struct lpuart_fsl *base)$/;"	f	typeref:typename:int	file:
_ls102x_psci_supported_table	arch/arm/cpu/armv7/ls102xa/psci.S	/^_ls102x_psci_supported_table:$/;"	l
_lsr_read	arch/blackfin/include/asm/serial1.h	/^#define _lsr_read(/;"	d
_lsr_read	arch/blackfin/include/asm/serial4.h	/^#define _lsr_read(/;"	d
_lsr_write	arch/blackfin/include/asm/serial1.h	/^#define _lsr_write(/;"	d
_lsr_write	arch/blackfin/include/asm/serial4.h	/^#define _lsr_write(/;"	d
_macb_eth_initialize	drivers/net/macb.c	/^static void _macb_eth_initialize(struct macb_device *macb)$/;"	f	typeref:typename:void	file:
_macb_halt	drivers/net/macb.c	/^static void _macb_halt(struct macb_device *macb)$/;"	f	typeref:typename:void	file:
_macb_init	drivers/net/macb.c	/^static int _macb_init(struct udevice *dev, const char *name)$/;"	f	typeref:typename:int	file:
_macb_recv	drivers/net/macb.c	/^static int _macb_recv(struct macb_device *macb, uchar **packetp)$/;"	f	typeref:typename:int	file:
_macb_send	drivers/net/macb.c	/^static int _macb_send(struct macb_device *macb, const char *name, void *packet,$/;"	f	typeref:typename:int	file:
_macb_write_hwaddr	drivers/net/macb.c	/^static int _macb_write_hwaddr(struct macb_device *macb, unsigned char *enetaddr)$/;"	f	typeref:typename:int	file:
_machine	arch/powerpc/include/asm/processor.h	/^#define _machine /;"	d
_machine_restart	arch/mips/cpu/cpu.c	/^void __weak _machine_restart(void)$/;"	f	typeref:typename:void __weak
_machine_restart	arch/mips/mach-ath79/reset.c	/^void _machine_restart(void)$/;"	f	typeref:typename:void
_machine_restart	arch/mips/mach-pic32/reset.c	/^void _machine_restart(void)$/;"	f	typeref:typename:void
_machine_restart	board/imgtec/malta/malta.c	/^void _machine_restart(void)$/;"	f	typeref:typename:void
_machine_restart	board/micronas/vct/vct.c	/^void _machine_restart(void)$/;"	f	typeref:typename:void
_make_and	tools/buildman/kconfiglib.py	/^def _make_and(e1, e2):$/;"	f
_make_block_conf	tools/buildman/kconfiglib.py	/^def _make_block_conf(block, append_fn):$/;"	f
_make_conf	tools/buildman/kconfiglib.py	/^    def _make_conf(self, append_fn):$/;"	m	class:Choice
_make_conf	tools/buildman/kconfiglib.py	/^    def _make_conf(self, append_fn):$/;"	m	class:Comment
_make_conf	tools/buildman/kconfiglib.py	/^    def _make_conf(self, append_fn):$/;"	m	class:Menu
_make_conf	tools/buildman/kconfiglib.py	/^    def _make_conf(self, append_fn):$/;"	m	class:Symbol
_make_or	tools/buildman/kconfiglib.py	/^def _make_or(e1, e2):$/;"	f
_mal_h_	arch/powerpc/include/asm/ppc4xx-mal.h	/^#define _mal_h_$/;"	d
_memcmp	arch/blackfin/lib/memcmp.S	/^_memcmp:$/;"	l
_memcpy_ASM	arch/blackfin/lib/memcpy.S	/^_memcpy_ASM:$/;"	l
_memmove	arch/blackfin/lib/memmove.S	/^_memmove:$/;"	l
_memset	arch/blackfin/lib/memset.S	/^_memset:$/;"	l
_menu	scripts/kconfig/qconf.h	/^	struct menu *_menu;$/;"	m	class:ConfigInfoView	typeref:struct:menu *
_menu_init	scripts/kconfig/menu.c	/^void _menu_init(void)$/;"	f	typeref:typename:void
_miiphy_h_	include/miiphy.h	/^#define _miiphy_h_$/;"	d
_monitor_vectors	arch/arm/cpu/armv7/nonsec_virt.S	/^_monitor_vectors:$/;"	l
_msc01	board/imgtec/malta/lowlevel_init.S	/^_msc01:$/;"	l
_musb_create_int_queue	drivers/usb/musb-new/musb_uboot.c	/^static struct int_queue *_musb_create_int_queue(struct musb_host_data *host,$/;"	f	typeref:struct:int_queue *	file:
_musb_destroy_int_queue	drivers/usb/musb-new/musb_uboot.c	/^static int _musb_destroy_int_queue(struct musb_host_data *host,$/;"	f	typeref:typename:int	file:
_musb_poll_int_queue	drivers/usb/musb-new/musb_uboot.c	/^static void *_musb_poll_int_queue(struct musb_host_data *host,$/;"	f	typeref:typename:void *	file:
_musb_reset_root_port	drivers/usb/musb-new/musb_uboot.c	/^static int _musb_reset_root_port(struct musb_host_data *host,$/;"	f	typeref:typename:int	file:
_musb_submit_bulk_msg	drivers/usb/musb-new/musb_uboot.c	/^static int _musb_submit_bulk_msg(struct musb_host_data *host,$/;"	f	typeref:typename:int	file:
_musb_submit_control_msg	drivers/usb/musb-new/musb_uboot.c	/^static int _musb_submit_control_msg(struct musb_host_data *host,$/;"	f	typeref:typename:int	file:
_musb_submit_int_msg	drivers/usb/musb-new/musb_uboot.c	/^static int _musb_submit_int_msg(struct musb_host_data *host,$/;"	f	typeref:typename:int	file:
_mxc_nand_enable_hwecc	drivers/mtd/nand/mxc_nand.c	/^static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)$/;"	f	typeref:typename:void	file:
_nextprop	lib/libfdt/fdt_ro.c	/^static int _nextprop(const void *fdt, int offset)$/;"	f	typeref:typename:int	file:
_nmi_trap	arch/sparc/cpu/leon2/start.S	/^_nmi_trap:$/;"	l
_nmi_trap	arch/sparc/cpu/leon3/start.S	/^_nmi_trap:$/;"	l
_no_vector_reloc	arch/openrisc/cpu/start.S	/^_no_vector_reloc:$/;"	l
_nomem_ahbmctrl_init	arch/sparc/cpu/leon3/memcfg_low.S	/^_nomem_ahbmctrl_init:$/;"	l
_nomem_amba_init	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_amba_init:$/;"	l
_nomem_amba_scan	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_amba_scan:$/;"	l
_nomem_amba_scan_gaisler_ahb2ahb_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_amba_scan_gaisler_ahb2ahb_bridge:$/;"	l
_nomem_amba_scan_gaisler_l2cache_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_amba_scan_gaisler_l2cache_bridge:$/;"	l
_nomem_ambapp_find_buses	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_ambapp_find_buses:$/;"	l
_nomem_find_ahb	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_find_ahb:$/;"	l
_nomem_find_ahb_bus	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_find_ahb_bus:$/;"	l
_nomem_find_apb	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_find_apb:$/;"	l
_nomem_find_apb_bus	arch/sparc/cpu/leon3/ambapp_low.S	/^_nomem_find_apb_bus:$/;"	l
_nomem_mctrl_init	arch/sparc/cpu/leon3/memcfg_low.S	/^_nomem_mctrl_init:$/;"	l
_nomem_memory_ctrl_init	arch/sparc/cpu/leon3/memcfg_low.S	/^_nomem_memory_ctrl_init:$/;"	l
_nonprint	test/py/multiplexed_log.py	/^    _nonprint = ('%' + ''.join(chr(c) for c in range(0, 32) if c not in (9, 10)) +$/;"	v	class:Logfile
_not_used	arch/arm/lib/vectors.S	/^_not_used:		.word not_used$/;"	l
_note	test/py/multiplexed_log.py	/^    def _note(self, note_type, msg, anchor=None):$/;"	m	class:Logfile
_ns2clk	board/st/stm32f429-discovery/stm32f429-discovery.c	/^static inline u32 _ns2clk(u32 ns, u32 freq)$/;"	f	typeref:typename:u32	file:
_ns2clk	board/st/stm32f746-disco/stm32f746-disco.c	/^static inline u32 _ns2clk(u32 ns, u32 freq)$/;"	f	typeref:typename:u32	file:
_off	arch/powerpc/cpu/mpc8260/speed.c	/^#define _off	/;"	d	file:
_off	arch/powerpc/cpu/mpc83xx/speed.c	/^	_off,$/;"	e	enum:__anon6ec4fb040103	file:
_ohci_create_int_queue	drivers/usb/host/ohci-hcd.c	/^static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,$/;"	f	typeref:struct:int_queue *	file:
_ohci_destroy_int_queue	drivers/usb/host/ohci-hcd.c	/^static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
_ohci_poll_int_queue	drivers/usb/host/ohci-hcd.c	/^static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,$/;"	f	typeref:typename:void *	file:
_ohci_submit_control_msg	drivers/usb/host/ohci-hcd.c	/^static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
_omap3_spi_claim_bus	drivers/spi/omap3_spi.c	/^static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv)$/;"	f	typeref:typename:void	file:
_omap3_spi_set_mode	drivers/spi/omap3_spi.c	/^static void _omap3_spi_set_mode(struct omap3_spi_priv *priv)$/;"	f	typeref:typename:void	file:
_omap3_spi_set_speed	drivers/spi/omap3_spi.c	/^static void _omap3_spi_set_speed(struct omap3_spi_priv *priv)$/;"	f	typeref:typename:void	file:
_omap3_spi_set_wordlen	drivers/spi/omap3_spi.c	/^static void _omap3_spi_set_wordlen(struct omap3_spi_priv *priv)$/;"	f	typeref:typename:void	file:
_out16r	arch/sparc/cpu/leon3/usb_uhci.c	/^void _out16r(unsigned int address, unsigned short data)$/;"	f	typeref:typename:void
_out32r	arch/sparc/cpu/leon3/usb_uhci.c	/^void _out32r(unsigned int address, unsigned int data)$/;"	f	typeref:typename:void
_outsb	arch/m68k/include/asm/io.h	/^static inline void _outsb(volatile u8 * port, const void *buf, int ns)$/;"	f	typeref:typename:void
_outsl	arch/m68k/include/asm/io.h	/^static inline void _outsl(volatile u32 * port, const void *buf, int nl)$/;"	f	typeref:typename:void
_outsl_ns	arch/m68k/include/asm/io.h	/^static inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)$/;"	f	typeref:typename:void
_outsw	arch/m68k/include/asm/io.h	/^static inline void _outsw(volatile u16 * port, const void *buf, int ns)$/;"	f	typeref:typename:void
_outsw	arch/sandbox/include/asm/io.h	/^static inline void _outsw(volatile u16 *port, const void *buf, int ns)$/;"	f	typeref:typename:void
_outsw_ns	arch/m68k/include/asm/io.h	/^static inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)$/;"	f	typeref:typename:void
_pad	drivers/net/ag7xxx.c	/^	u32	_pad[5];$/;"	m	struct:ag7xxx_dma_desc	typeref:typename:u32[5]	file:
_pad	drivers/spi/ich.h	/^	uint64_t _pad;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint64_t
_pad2	arch/x86/include/asm/bootparam.h	/^	__u8	_pad2[3];$/;"	m	struct:setup_header	typeref:typename:__u8[3]
_pad2	arch/x86/include/asm/bootparam.h	/^	__u8  _pad2[4];					\/* 0x054 *\/$/;"	m	struct:boot_params	typeref:typename:__u8[4]
_pad3	arch/x86/include/asm/bootparam.h	/^	__u8  _pad3[16];				\/* 0x070 *\/$/;"	m	struct:boot_params	typeref:typename:__u8[16]
_pad4	arch/x86/include/asm/bootparam.h	/^	__u8  _pad4[144];				\/* 0x0b0 *\/$/;"	m	struct:boot_params	typeref:typename:__u8[144]
_pad6	arch/x86/include/asm/bootparam.h	/^	__u8  _pad6[6];					\/* 0x1eb *\/$/;"	m	struct:boot_params	typeref:typename:__u8[6]
_pad7	arch/x86/include/asm/bootparam.h	/^	__u8  _pad7[0x290-0x1f1-sizeof(struct setup_header)];$/;"	m	struct:boot_params	typeref:typename:__u8[]
_pad8	arch/x86/include/asm/bootparam.h	/^	__u8  _pad8[48];				\/* 0xcd0 *\/$/;"	m	struct:boot_params	typeref:typename:__u8[48]
_pad9	arch/x86/include/asm/bootparam.h	/^	__u8  _pad9[276];				\/* 0xeec *\/$/;"	m	struct:boot_params	typeref:typename:__u8[276]
_pad_0x104_0x107	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x104_0x107;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
_pad_0x10_0x3c	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	_pad_0x10_0x3c[12];	\/* 0x10 *\/$/;"	m	struct:scu_registers	typeref:typename:u32[12]
_pad_0x11c_0x13f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x11c_0x13f[9];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[9]
_pad_0x140_0x3fc	drivers/usb/host/dwc2.h	/^	u32			_pad_0x140_0x3fc[176];$/;"	m	struct:dwc2_core_regs	typeref:typename:u32[176]
_pad_0x170_0x3ff	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x170_0x3ff[164];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[164]
_pad_0x18_0x3f	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	_pad_0x18_0x3f[10];$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32[10]
_pad_0x1c_0x82c	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	_pad_0x1c_0x82c[517];$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32[517]
_pad_0x1fd4_0x1fe0	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x1fd4_0x1fe0[3];$/;"	m	struct:nic301_registers	typeref:typename:u32[3]
_pad_0x2000_0x2008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2000_0x2008[2];$/;"	m	struct:nic301_registers	typeref:typename:u32[2]
_pad_0x2000c_0x20044	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2000c_0x20044[14];$/;"	m	struct:nic301_registers	typeref:typename:u32[14]
_pad_0x20048_0x21008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x20048_0x21008[1008];$/;"	m	struct:nic301_registers	typeref:typename:u32[1008]
_pad_0x200c_0x3008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x200c_0x3008[1023];$/;"	m	struct:nic301_registers	typeref:typename:u32[1023]
_pad_0x2100c_0x21108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2100c_0x21108[63];$/;"	m	struct:nic301_registers	typeref:typename:u32[63]
_pad_0x2110c_0x22008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2110c_0x22008[959];$/;"	m	struct:nic301_registers	typeref:typename:u32[959]
_pad_0x2200c_0x22044	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2200c_0x22044[14];$/;"	m	struct:nic301_registers	typeref:typename:u32[14]
_pad_0x22048_0x23008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x22048_0x23008[1008];$/;"	m	struct:nic301_registers	typeref:typename:u32[1008]
_pad_0x2300c_0x23040	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2300c_0x23040[13];$/;"	m	struct:nic301_registers	typeref:typename:u32[13]
_pad_0x23044_0x23108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x23044_0x23108[49];$/;"	m	struct:nic301_registers	typeref:typename:u32[49]
_pad_0x2310c_0x24008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2310c_0x24008[959];$/;"	m	struct:nic301_registers	typeref:typename:u32[959]
_pad_0x2400c_0x24040	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2400c_0x24040[13];$/;"	m	struct:nic301_registers	typeref:typename:u32[13]
_pad_0x24044_0x24108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x24044_0x24108[49];$/;"	m	struct:nic301_registers	typeref:typename:u32[49]
_pad_0x2410c_0x25008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2410c_0x25008[959];$/;"	m	struct:nic301_registers	typeref:typename:u32[959]
_pad_0x24_0x28	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x24_0x28[1];$/;"	m	struct:nic301_registers	typeref:typename:u32[1]
_pad_0x2500c_0x25108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2500c_0x25108[63];$/;"	m	struct:nic301_registers	typeref:typename:u32[63]
_pad_0x2510c_0x26008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2510c_0x26008[959];$/;"	m	struct:nic301_registers	typeref:typename:u32[959]
_pad_0x2600c_0x26108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2600c_0x26108[63];$/;"	m	struct:nic301_registers	typeref:typename:u32[63]
_pad_0x2610c_0x27008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2610c_0x27008[959];$/;"	m	struct:nic301_registers	typeref:typename:u32[959]
_pad_0x2700c_0x27040	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2700c_0x27040[13];$/;"	m	struct:nic301_registers	typeref:typename:u32[13]
_pad_0x27044_0x27108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x27044_0x27108[49];$/;"	m	struct:nic301_registers	typeref:typename:u32[49]
_pad_0x2710c_0x42024	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x2710c_0x42024[27590];$/;"	m	struct:nic301_registers	typeref:typename:u32[27590]
_pad_0x2c_0x2f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x2c_0x2f;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
_pad_0x300c_0x4008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x300c_0x4008[1023];$/;"	m	struct:nic301_registers	typeref:typename:u32[1023]
_pad_0x30_0x80	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x30_0x80[20];$/;"	m	struct:nic301_registers	typeref:typename:u32[20]
_pad_0x34_0x3f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x34_0x3f[3];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[3]
_pad_0x34_0x40	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	_pad_0x34_0x40[3];$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32[3]
_pad_0x38_0x40	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	_pad_0x38_0x40[2];$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32[2]
_pad_0x400c_0x5008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x400c_0x5008[1023];$/;"	m	struct:nic301_registers	typeref:typename:u32[1023]
_pad_0x40c	drivers/usb/host/dwc2.h	/^	u32			_pad_0x40c;$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
_pad_0x4202c_0x42100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4202c_0x42100[53];$/;"	m	struct:nic301_registers	typeref:typename:u32[53]
_pad_0x420_0x43c	drivers/usb/host/dwc2.h	/^	u32			_pad_0x420_0x43c[8];$/;"	m	struct:dwc2_core_regs	typeref:typename:u32[8]
_pad_0x4210c_0x43100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4210c_0x43100[1021];$/;"	m	struct:nic301_registers	typeref:typename:u32[1021]
_pad_0x4310c_0x44028	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4310c_0x44028[967];$/;"	m	struct:nic301_registers	typeref:typename:u32[967]
_pad_0x4402c_0x44100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4402c_0x44100[53];$/;"	m	struct:nic301_registers	typeref:typename:u32[53]
_pad_0x4410c_0x45100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4410c_0x45100[1021];$/;"	m	struct:nic301_registers	typeref:typename:u32[1021]
_pad_0x444_0x4fc	drivers/usb/host/dwc2.h	/^	u32			_pad_0x444_0x4fc[47];$/;"	m	struct:dwc2_core_regs	typeref:typename:u32[47]
_pad_0x44_0x4f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x44_0x4f[3];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[3]
_pad_0x4510c_0x46040	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4510c_0x46040[973];$/;"	m	struct:nic301_registers	typeref:typename:u32[973]
_pad_0x46044_0x46100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x46044_0x46100[47];$/;"	m	struct:nic301_registers	typeref:typename:u32[47]
_pad_0x4610c_0x47100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4610c_0x47100[1021];$/;"	m	struct:nic301_registers	typeref:typename:u32[1021]
_pad_0x4710c_0x48100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4710c_0x48100[1021];$/;"	m	struct:nic301_registers	typeref:typename:u32[1021]
_pad_0x4810c_0x49100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4810c_0x49100[1021];$/;"	m	struct:nic301_registers	typeref:typename:u32[1021]
_pad_0x48_0x50	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	_pad_0x48_0x50[2];$/;"	m	struct:scu_registers	typeref:typename:u32[2]
_pad_0x4910c_0x4a028	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4910c_0x4a028[967];$/;"	m	struct:nic301_registers	typeref:typename:u32[967]
_pad_0x4_0x8	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4_0x8[1];$/;"	m	struct:nic301_registers	typeref:typename:u32[1]
_pad_0x4a02c_0x4a100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4a02c_0x4a100[53];$/;"	m	struct:nic301_registers	typeref:typename:u32[53]
_pad_0x4a10c_0x4b100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4a10c_0x4b100[1021];$/;"	m	struct:nic301_registers	typeref:typename:u32[1021]
_pad_0x4b10c_0x4c028	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4b10c_0x4c028[967];$/;"	m	struct:nic301_registers	typeref:typename:u32[967]
_pad_0x4c02c_0x4c100	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x4c02c_0x4c100[53];$/;"	m	struct:nic301_registers	typeref:typename:u32[53]
_pad_0x4f0_0x4ff	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x4f0_0x4ff[4];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[4]
_pad_0x500c_0x6008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x500c_0x6008[1023];$/;"	m	struct:nic301_registers	typeref:typename:u32[1023]
_pad_0x58_0x9c	drivers/usb/host/dwc2.h	/^	u32			_pad_0x58_0x9c[42];$/;"	m	struct:dwc2_core_regs	typeref:typename:u32[42]
_pad_0x5c_0x5f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x5c_0x5f;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
_pad_0x600c_0x7008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x600c_0x7008[1023];$/;"	m	struct:nic301_registers	typeref:typename:u32[1023]
_pad_0x68_0x6f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x68_0x6f[2];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[2]
_pad_0x6f4	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x6f4;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
_pad_0x6fc_0x700	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x6fc_0x700[2];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[2]
_pad_0x700_0xe00	drivers/usb/host/dwc2.h	/^	u32			_pad_0x700_0xe00[448];$/;"	m	struct:dwc2_core_regs	typeref:typename:u32[448]
_pad_0x700c_0x7108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x700c_0x7108[63];$/;"	m	struct:nic301_registers	typeref:typename:u32[63]
_pad_0x70c_0x710	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x70c_0x710[2];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[2]
_pad_0x710c_0x8008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x710c_0x8008[959];$/;"	m	struct:nic301_registers	typeref:typename:u32[959]
_pad_0x718_0x720	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x718_0x720[3];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[3]
_pad_0x734	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x734;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
_pad_0x78_0x7f	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x78_0x7f[2];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[2]
_pad_0x800c_0x8108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x800c_0x8108[63];$/;"	m	struct:nic301_registers	typeref:typename:u32[63]
_pad_0x810c_0xa008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0x810c_0xa008[1983];$/;"	m	struct:nic301_registers	typeref:typename:u32[1983]
_pad_0x848	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	_pad_0x848;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
_pad_0x854_0x85c	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	_pad_0x854_0x85c[3];$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32[3]
_pad_0x864_0x868	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	_pad_0x864_0x868[2];$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32[2]
_pad_0x8_0xf	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0x8_0xf[2];$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[2]
_pad_0xa00c_0xa044	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0xa00c_0xa044[14];$/;"	m	struct:nic301_registers	typeref:typename:u32[14]
_pad_0xa048_0xb008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0xa048_0xb008[1008];$/;"	m	struct:nic301_registers	typeref:typename:u32[1008]
_pad_0xa0_0xbf	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	_pad_0xa0_0xbf[8];		\/* 0xa0 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[8]
_pad_0xa4_0x1fd0	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0xa4_0x1fd0[1995];$/;"	m	struct:nic301_registers	typeref:typename:u32[1995]
_pad_0xb00c_0xb108	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0xb00c_0xb108[63];$/;"	m	struct:nic301_registers	typeref:typename:u32[63]
_pad_0xb10c_0x20008	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	_pad_0xb10c_0x20008[21439];$/;"	m	struct:nic301_registers	typeref:typename:u32[21439]
_pad_0xe8_0x200	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	_pad_0xe8_0x200[70];$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32[70]
_page_cachable_default	arch/mips/include/asm/mach-generic/ioremap.h	/^#define _page_cachable_default	/;"	d
_panic_write	include/linux/mtd/mtd.h	/^	int (*_panic_write) (struct mtd_info *mtd, loff_t to, size_t len,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)
_param_word	drivers/video/ipu_common.c	/^#define _param_word(/;"	d	file:
_parse_block	tools/buildman/kconfiglib.py	/^    def _parse_block(self, line_feeder, end_marker, parent, deps,$/;"	m	class:Config
_parse_error	tools/buildman/kconfiglib.py	/^def _parse_error(s, msg, filename, linenr):$/;"	f
_parse_expr	tools/buildman/kconfiglib.py	/^    def _parse_expr(self, feed, cur_item, line, filename=None, linenr=None,$/;"	m	class:Config
_parse_expr_rec	tools/buildman/kconfiglib.py	/^    def _parse_expr_rec(self, feed):$/;"	m	class:Config
_parse_factor	tools/buildman/kconfiglib.py	/^    def _parse_factor(self, feed):$/;"	m	class:Config
_parse_file	tools/buildman/kconfiglib.py	/^    def _parse_file(self, filename, parent, deps, visible_if_deps, res=None):$/;"	m	class:Config
_parse_or_term	tools/buildman/kconfiglib.py	/^    def _parse_or_term(self, feed):$/;"	m	class:Config
_parse_properties	tools/buildman/kconfiglib.py	/^    def _parse_properties(self, line_feeder, stmt, deps, visible_if_deps):$/;"	m	class:Config
_pnum	tools/kwboot.c	/^	uint8_t _pnum;$/;"	m	struct:kwboot_block	typeref:typename:uint8_t	file:
_point	include/linux/mtd/mtd.h	/^	int (*_point) (struct mtd_info *mtd, loff_t from, size_t len,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,void ** virt,resource_size_t * phys)
_post_h	arch/x86/include/asm/post.h	/^#define _post_h$/;"	d
_prefetch_abort	arch/arm/lib/vectors.S	/^_prefetch_abort:	.word prefetch_abort$/;"	l
_psci_table	arch/arm/cpu/armv7/psci.S	/^_psci_table:$/;"	l
_psci_vectors	arch/arm/cpu/armv7/psci.S	/^_psci_vectors:$/;"	l
_pte	arch/powerpc/include/asm/mmu.h	/^typedef struct _pte {$/;"	s
_put_device	include/linux/mtd/mtd.h	/^	void (*_put_device) (struct mtd_info *mtd);$/;"	m	struct:mtd_info	typeref:typename:void (*)(struct mtd_info * mtd)
_pwm_h_	include/pwm.h	/^#define _pwm_h_$/;"	d
_pwm_imx_util_h_	drivers/pwm/pwm-imx-util.h	/^#define _pwm_imx_util_h_$/;"	d
_qm_init	drivers/dma/keystone_nav.c	/^int _qm_init(struct qm_config *cfg)$/;"	f	typeref:typename:int
_radeon_engine_idle	drivers/video/ati_radeon_fb.h	/^static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)$/;"	f	typeref:typename:void
_radeon_fifo_wait	drivers/video/ati_radeon_fb.h	/^static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)$/;"	f	typeref:typename:void
_raw_packet_start	arch/sandbox/cpu/eth-raw-os.c	/^static int _raw_packet_start(const char *ifname, unsigned char *ethmac,$/;"	f	typeref:typename:int	file:
_read	include/linux/mtd/mtd.h	/^	int (*_read) (struct mtd_info *mtd, loff_t from, size_t len,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)
_read_32bit_cp1_register	arch/mips/include/asm/mipsregs.h	/^#define _read_32bit_cp1_register(/;"	d
_read_fact_prot_reg	include/linux/mtd/mtd.h	/^	int (*_read_fact_prot_reg) (struct mtd_info *mtd, loff_t from,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)
_read_oob	include/linux/mtd/mtd.h	/^	int (*_read_oob) (struct mtd_info *mtd, loff_t from,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,struct mtd_oob_ops * ops)
_read_user_prot_reg	include/linux/mtd/mtd.h	/^	int (*_read_user_prot_reg) (struct mtd_info *mtd, loff_t from,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)
_reboot	include/linux/mtd/mtd.h	/^	void (*_reboot) (struct mtd_info *mtd);$/;"	m	struct:mtd_info	typeref:typename:void (*)(struct mtd_info * mtd)
_reloc	arch/nios2/cpu/start.S	/^_reloc:$/;"	l
_reloc_dst	arch/sh/cpu/sh2/start.S	/^._reloc_dst:		.long	reloc_dst$/;"	l
_reloc_dst	arch/sh/cpu/sh3/start.S	/^._reloc_dst:		.long	reloc_dst$/;"	l
_reloc_dst	arch/sh/cpu/sh4/start.S	/^._reloc_dst:		.long	reloc_dst$/;"	l
_reloc_dst_end	arch/sh/cpu/sh2/start.S	/^._reloc_dst_end:	.long	reloc_dst_end$/;"	l
_reloc_dst_end	arch/sh/cpu/sh3/start.S	/^._reloc_dst_end:	.long	reloc_dst_end$/;"	l
_reloc_dst_end	arch/sh/cpu/sh4/start.S	/^._reloc_dst_end:	.long	reloc_dst_end$/;"	l
_reloc_vectors	arch/openrisc/cpu/start.S	/^_reloc_vectors:$/;"	l
_relocate	arch/x86/lib/efi/reloc_ia32.c	/^efi_status_t _relocate(long ldbase, Elf32_Dyn *dyn, efi_handle_t image,$/;"	f	typeref:typename:efi_status_t
_relocate	arch/x86/lib/efi/reloc_x86_64.c	/^efi_status_t _relocate(long ldbase, Elf64_Dyn *dyn, efi_handle_t image,$/;"	f	typeref:typename:efi_status_t
_res0	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	_res0;$/;"	m	struct:descr_mem_setup_reg	typeref:typename:u32
_res_04	arch/arm/mach-keystone/msmc.c	/^	u32	_res_04;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
_res_2c	arch/arm/mach-keystone/msmc.c	/^	u32	_res_2c;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
_res_58	arch/arm/mach-keystone/msmc.c	/^	u32	_res_58;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
_res_94_c0	arch/arm/mach-keystone/msmc.c	/^	u32	_res_94_c0[12];$/;"	m	struct:msms_regs	typeref:typename:u32[12]	file:
_res_d0_1fc	arch/arm/mach-keystone/msmc.c	/^	u32	_res_d0_1fc[76];$/;"	m	struct:msms_regs	typeref:typename:u32[76]	file:
_reserved	drivers/spi/altera_spi.c	/^	u32	_reserved;$/;"	m	struct:altera_spi_regs	typeref:typename:u32	file:
_reserved	include/linux/screen_info.h	/^	__u8  _reserved[6];	\/* 0x3a *\/$/;"	m	struct:screen_info	typeref:typename:__u8[6]
_reserved0	drivers/spi/ich.h	/^	uint32_t _reserved0;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
_reserved1	drivers/spi/ich.h	/^	uint32_t _reserved1[3];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t[3]
_reserved2	drivers/spi/ich.h	/^	uint32_t _reserved2[2];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t[2]
_reserved3	drivers/spi/ich.h	/^	uint8_t _reserved3[12];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t[12]
_reserved4	drivers/spi/ich.h	/^	uint8_t _reserved4[8];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t[8]
_reserved5	drivers/spi/ich.h	/^	uint8_t _reserved5[4];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t[4]
_reserved6	drivers/spi/ich.h	/^	uint8_t _reserved6[28];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t[28]
_reserved_0_	drivers/usb/host/ehci.h	/^	uint32_t _reserved_0_;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
_reserved_1_	drivers/usb/host/ehci.h	/^	uint32_t _reserved_1_[6];$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t[6]
_reset_reloc	arch/sparc/cpu/leon2/start.S	/^_reset_reloc:$/;"	l
_reset_reloc	arch/sparc/cpu/leon3/start.S	/^_reset_reloc:$/;"	l
_resume	include/linux/mtd/mtd.h	/^	void (*_resume) (struct mtd_info *mtd);$/;"	m	struct:mtd_info	typeref:typename:void (*)(struct mtd_info * mtd)
_rev	include/configs/tam3517-common.h	/^	unsigned char _rev[100];$/;"	m	struct:tam3517_module_info	typeref:typename:unsigned char[100]
_rproc_dev_is_probed	drivers/remoteproc/rproc-uclass.c	/^static int _rproc_dev_is_probed(struct udevice *dev,$/;"	f	typeref:typename:int	file:
_rproc_name_is_unique	drivers/remoteproc/rproc-uclass.c	/^static int _rproc_name_is_unique(struct udevice *dev,$/;"	f	typeref:typename:int	file:
_rproc_ops_wrapper	drivers/remoteproc/rproc-uclass.c	/^static int _rproc_ops_wrapper(int id, enum rproc_ops op)$/;"	f	typeref:typename:int	file:
_rproc_probe_dev	drivers/remoteproc/rproc-uclass.c	/^static int _rproc_probe_dev(struct udevice *dev,$/;"	f	typeref:typename:int	file:
_rsrv32_2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint _rsrv32_2[25];			\/* _0x59C - 0x5FC *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[25]
_rsv32	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	u32 _rsv32[4];                  \/*                    0x560-0x56c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:u32[4]
_rsv32_1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	u32 _rsv32_1[7];		\/*                      0x574-58c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:u32[7]
_sbss	arch/m68k/cpu/u-boot.lds	/^		_sbss = .;$/;"	s
_sdata	arch/openrisc/cpu/u-boot.lds	/^		_sdata = .;$/;"	s
_secure_monitor	arch/arm/cpu/armv7/nonsec_virt.S	/^_secure_monitor:$/;"	l
_serial_early_init	drivers/serial/serial_bfin.c	/^void _serial_early_init(void)$/;"	f	typeref:typename:void
_serial_early_set_baud	drivers/serial/serial_bfin.c	/^void _serial_early_set_baud(uint32_t baud)$/;"	f	typeref:typename:void
_serial_getc	drivers/serial/serial-uclass.c	/^static int _serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
_serial_getc	drivers/serial/serial_ns16550.c	/^static int _serial_getc(const int port)$/;"	f	typeref:typename:int	file:
_serial_getc	drivers/serial/serial_s3c24x0.c	/^static int _serial_getc(const int dev_index)$/;"	f	typeref:typename:int	file:
_serial_putc	drivers/serial/serial-uclass.c	/^static void _serial_putc(struct udevice *dev, char ch)$/;"	f	typeref:typename:void	file:
_serial_putc	drivers/serial/serial_ns16550.c	/^static void _serial_putc(const char c, const int port)$/;"	f	typeref:typename:void	file:
_serial_putc	drivers/serial/serial_s3c24x0.c	/^static void _serial_putc(const char c, const int dev_index)$/;"	f	typeref:typename:void	file:
_serial_puts	drivers/serial/serial-uclass.c	/^static void _serial_puts(struct udevice *dev, const char *str)$/;"	f	typeref:typename:void	file:
_serial_puts	drivers/serial/serial_ns16550.c	/^static void _serial_puts(const char *s, const int port)$/;"	f	typeref:typename:void	file:
_serial_puts	drivers/serial/serial_s3c24x0.c	/^static void _serial_puts(const char *s, const int dev_index)$/;"	f	typeref:typename:void	file:
_serial_setbrg	drivers/serial/serial_ns16550.c	/^static void _serial_setbrg(const int port)$/;"	f	typeref:typename:void	file:
_serial_setbrg	drivers/serial/serial_s3c24x0.c	/^static void _serial_setbrg(const int dev_index)$/;"	f	typeref:typename:void	file:
_serial_tstc	drivers/serial/serial-uclass.c	/^static int _serial_tstc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
_serial_tstc	drivers/serial/serial_ns16550.c	/^static int _serial_tstc(const int port)$/;"	f	typeref:typename:int	file:
_serial_tstc	drivers/serial/serial_s3c24x0.c	/^static int _serial_tstc(const int dev_index)$/;"	f	typeref:typename:int	file:
_set_gpio_dataout	drivers/gpio/omap_gpio.c	/^static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio,$/;"	f	typeref:typename:void	file:
_set_gpio_direction	drivers/gpio/omap_gpio.c	/^static void _set_gpio_direction(const struct gpio_bank *bank, int gpio,$/;"	f	typeref:typename:void	file:
_set_re_match	tools/buildman/kconfiglib.py	/^_set_re_match = re.compile(r"CONFIG_(\\w+)=(.*)").match$/;"	v
_set_user_value_no_invalidate	tools/buildman/kconfiglib.py	/^    def _set_user_value_no_invalidate(self, v, suppress_load_warnings):$/;"	m	class:Symbol
_sh_start	arch/sh/cpu/sh2/start.S	/^_sh_start:$/;"	l
_sh_start	arch/sh/cpu/sh3/start.S	/^_sh_start:$/;"	l
_sh_start	arch/sh/cpu/sh4/start.S	/^_sh_start:$/;"	l
_showDebug	scripts/kconfig/qconf.h	/^	bool _showDebug;$/;"	m	class:ConfigInfoView	typeref:typename:bool
_slot_	include/pcmcia.h	/^# define _slot_	/;"	d
_smc_psci	arch/arm/cpu/armv7/psci.S	/^_smc_psci:$/;"	l
_software_interrupt	arch/arm/lib/vectors.S	/^_software_interrupt:	.word software_interrupt$/;"	l
_spi_cs_activate	drivers/spi/kirkwood_spi.c	/^static void _spi_cs_activate(struct kwspi_registers *reg)$/;"	f	typeref:typename:void	file:
_spi_cs_deactivate	drivers/spi/kirkwood_spi.c	/^static void _spi_cs_deactivate(struct kwspi_registers *reg)$/;"	f	typeref:typename:void	file:
_spi_xfer	drivers/spi/kirkwood_spi.c	/^static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
_spi_xfer	drivers/spi/omap3_spi.c	/^static int _spi_xfer(struct omap3_spi_priv *priv, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
_spiboot_main	board/renesas/sh7752evb/lowlevel_init.S	/^_spiboot_main:	.long	(spiboot_main - (100b + 4))$/;"	l
_spiboot_main	board/renesas/sh7753evb/lowlevel_init.S	/^_spiboot_main:	.long	(spiboot_main - (100b + 4))$/;"	l
_spiboot_main	board/renesas/sh7757lcr/lowlevel_init.S	/^_spiboot_main:	.long	(spiboot_main - (100b + 4))$/;"	l
_stack_ilram	board/renesas/sh7752evb/lowlevel_init.S	/^_stack_ilram:	.long	0xe5204000$/;"	l
_stack_ilram	board/renesas/sh7753evb/lowlevel_init.S	/^_stack_ilram:	.long	0xe5204000$/;"	l
_stack_init	arch/sh/cpu/sh2/start.S	/^._stack_init:	.long	(_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)$/;"	l
_stack_init	arch/sh/cpu/sh3/start.S	/^._stack_init:	.long	(_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)$/;"	l
_stack_init	arch/sh/cpu/sh4/start.S	/^._stack_init:		.long	(_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)$/;"	l
_start	arch/arm/cpu/armv8/start.S	/^_start:$/;"	l
_start	arch/arm/lib/vectors.S	/^_start:$/;"	l
_start	arch/avr32/cpu/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf5227x/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf523x/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf52x2/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf530x/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf532x/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf5445x/start.S	/^_start:$/;"	l
_start	arch/m68k/cpu/mcf547x_8x/start.S	/^_start:$/;"	l
_start	arch/microblaze/cpu/start.S	/^_start:$/;"	l
_start	arch/nds32/cpu/n1213/start.S	/^_start:	j	reset$/;"	l
_start	arch/nios2/cpu/start.S	/^_start:$/;"	l
_start	arch/openrisc/cpu/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc512x/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc5xx/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc5xxx/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc8260/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc83xx/start.S	/^_start: \/* time t 0 *\/$/;"	l
_start	arch/powerpc/cpu/mpc85xx/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc86xx/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/mpc8xx/start.S	/^_start:$/;"	l
_start	arch/powerpc/cpu/ppc4xx/start.S	/^_start:$/;"	l
_start	arch/sh/cpu/u-boot.lds	/^	PROVIDE (_start = .);$/;"	s	assignment:provide
_start	arch/sparc/cpu/leon2/start.S	/^_start:$/;"	l
_start	arch/sparc/cpu/leon3/start.S	/^_start:$/;"	l
_start	arch/x86/cpu/start.S	/^_start:$/;"	l
_start	arch/x86/lib/efi/crt0-efi-ia32.S	/^_start:$/;"	l
_start	arch/x86/lib/efi/crt0-efi-x86_64.S	/^_start:$/;"	l
_start	arch/xtensa/cpu/start.S	/^_start:$/;"	l
_start	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (_start = .);$/;"	s	assignment:provide
_start	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (_start = .);$/;"	s	assignment:provide
_start	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (_start = .);$/;"	s	assignment:provide
_start	examples/api/crt0.S	/^_start:$/;"	l
_start_440	arch/powerpc/cpu/ppc4xx/start.S	/^_start_440:$/;"	l
_start_cont	arch/powerpc/cpu/mpc85xx/start.S	/^_start_cont:$/;"	l
_start_e500	arch/powerpc/cpu/mpc85xx/start.S	/^_start_e500:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc512x/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc5xx/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc5xxx/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc8260/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc83xx/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc85xx/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc86xx/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/mpc8xx/start.S	/^_start_of_vectors:$/;"	l
_start_of_vectors	arch/powerpc/cpu/ppc4xx/start.S	/^_start_of_vectors:$/;"	l
_start_pci	board/mpl/mip405/init.S	/^_start_pci:$/;"	l
_start_pci	board/mpl/pip405/init.S	/^_start_pci:$/;"	l
_stats	drivers/block/blkcache.c	/^static struct block_cache_stats _stats = {$/;"	v	typeref:struct:block_cache_stats	file:
_stderr_msg	tools/buildman/kconfiglib.py	/^def _stderr_msg(msg, filename, linenr):$/;"	f
_stext	arch/openrisc/cpu/u-boot.lds	/^		_stext = .;$/;"	s
_str_val	tools/buildman/kconfiglib.py	/^def _str_val(obj):$/;"	f
_submit_bulk_msg	drivers/usb/host/dwc2.c	/^int _submit_bulk_msg(struct dwc2_priv *priv, struct usb_device *dev,$/;"	f	typeref:typename:int
_submit_control_msg	drivers/usb/host/dwc2.c	/^static int _submit_control_msg(struct dwc2_priv *priv, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
_submit_int_msg	drivers/usb/host/dwc2.c	/^int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev,$/;"	f	typeref:typename:int
_sun8i_emac_eth_init	drivers/net/sun8i_emac.c	/^static int _sun8i_emac_eth_init(struct emac_eth_dev *priv, u8 *enetaddr)$/;"	f	typeref:typename:int	file:
_sun8i_emac_eth_send	drivers/net/sun8i_emac.c	/^static int _sun8i_emac_eth_send(struct emac_eth_dev *priv, void *packet,$/;"	f	typeref:typename:int	file:
_sun8i_eth_recv	drivers/net/sun8i_emac.c	/^static int _sun8i_eth_recv(struct emac_eth_dev *priv, uchar **packetp)$/;"	f	typeref:typename:int	file:
_sun8i_free_pkt	drivers/net/sun8i_emac.c	/^static int _sun8i_free_pkt(struct emac_eth_dev *priv)$/;"	f	typeref:typename:int	file:
_sun8i_write_hwaddr	drivers/net/sun8i_emac.c	/^static int _sun8i_write_hwaddr(struct emac_eth_dev *priv, u8 *mac_id)$/;"	f	typeref:typename:int	file:
_sunxi_emac_eth_init	drivers/net/sunxi_emac.c	/^static int _sunxi_emac_eth_init(struct emac_eth_dev *priv, u8 *enetaddr)$/;"	f	typeref:typename:int	file:
_sunxi_emac_eth_recv	drivers/net/sunxi_emac.c	/^static int _sunxi_emac_eth_recv(struct emac_eth_dev *priv, void *packet)$/;"	f	typeref:typename:int	file:
_sunxi_emac_eth_send	drivers/net/sunxi_emac.c	/^static int _sunxi_emac_eth_send(struct emac_eth_dev *priv, void *packet,$/;"	f	typeref:typename:int	file:
_sunxi_nand_lookup_timing	drivers/mtd/nand/sunxi_nand.c	/^static int _sunxi_nand_lookup_timing(const s32 *lut, int lut_size, u32 duration,$/;"	f	typeref:typename:int	file:
_suspend	include/linux/mtd/mtd.h	/^	int (*_suspend) (struct mtd_info *mtd);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd)
_swapl	arch/xtensa/include/asm/io.h	/^static inline unsigned int _swapl(unsigned int v)$/;"	f	typeref:typename:unsigned int
_swapw	arch/xtensa/include/asm/io.h	/^static inline unsigned short _swapw(unsigned short v)$/;"	f	typeref:typename:unsigned short
_switch_addr	arch/arm/mach-exynos/sec_boot.S	/^_switch_addr:$/;"	l
_sym_lookup	tools/buildman/kconfiglib.py	/^    def _sym_lookup(self, name, for_eval=False):$/;"	m	class:Config
_sym_ref_re_search	tools/buildman/kconfiglib.py	/^_sym_ref_re_search = re.compile(r"\\$[A-Za-z0-9_]+").search$/;"	v
_sym_str_string	tools/buildman/kconfiglib.py	/^def _sym_str_string(sym_or_str):$/;"	f
_sync	include/linux/mtd/mtd.h	/^	void (*_sync) (struct mtd_info *mtd);$/;"	m	struct:mtd_info	typeref:typename:void (*)(struct mtd_info * mtd)
_sys_clock_freq	arch/arm/mach-tegra/psci.S	/^_sys_clock_freq:$/;"	l
_tegra_dp_channel_eq	drivers/video/tegra124/dp.c	/^static int _tegra_dp_channel_eq(struct tegra_dp_priv *dp, u32 pe[4],$/;"	f	typeref:typename:int	file:
_tegra_dp_clk_recovery	drivers/video/tegra124/dp.c	/^static int _tegra_dp_clk_recovery(struct tegra_dp_priv *dp, u32 pe[4],$/;"	f	typeref:typename:int	file:
_tegra_dp_lower_link_config	drivers/video/tegra124/dp.c	/^static int _tegra_dp_lower_link_config(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
_terminate_stream	test/py/multiplexed_log.py	/^    def _terminate_stream(self):$/;"	m	class:Logfile
_testGit	tools/buildman/test.py	/^    def _testGit(self):$/;"	m	class:TestBuild
_text	arch/avr32/cpu/u-boot.lds	/^	_text = .;$/;"	s
_text	arch/sparc/cpu/u-boot.lds	/^		_text = .;$/;"	s	section:.text
_tfp410_config	board/tqc/tqm5200/tqm5200.c	/^typedef struct _tfp410_config {$/;"	s	file:
_tokenization_error	tools/buildman/kconfiglib.py	/^def _tokenization_error(s, filename, linenr):$/;"	f
_tokenize	tools/buildman/kconfiglib.py	/^    def _tokenize(self, s, for_eval, filename=None, linenr=None):$/;"	m	class:Config
_tolower	common/xyzModem.c	/^_tolower (char c)$/;"	f	typeref:typename:char	file:
_tr_align	lib/zlib/trees.c	/^void ZLIB_INTERNAL _tr_align(s)$/;"	f
_tr_flush_block	lib/zlib/trees.c	/^void ZLIB_INTERNAL _tr_flush_block(s, buf, stored_len, last)$/;"	f
_tr_init	lib/zlib/trees.c	/^void ZLIB_INTERNAL _tr_init(s)$/;"	f
_tr_stored_block	lib/zlib/trees.c	/^void ZLIB_INTERNAL _tr_stored_block(s, buf, stored_len, last)$/;"	f
_tr_tally	lib/zlib/trees.c	/^int ZLIB_INTERNAL _tr_tally (s, dist, lc)$/;"	f
_tr_tally_dist	lib/zlib/deflate.h	/^# define _tr_tally_dist(/;"	d
_tr_tally_lit	lib/zlib/deflate.h	/^# define _tr_tally_lit(/;"	d
_trap_table	arch/sparc/cpu/leon2/start.S	/^_trap_table:$/;"	l
_trap_table	arch/sparc/cpu/leon3/start.S	/^_trap_table:$/;"	l
_tsi148_h	include/tsi148.h	/^#define _tsi148_h$/;"	d
_u_boot_sandbox_getopt	arch/sandbox/cpu/u-boot-spl.lds	/^	_u_boot_sandbox_getopt : { *(.u_boot_sandbox_getopt) }$/;"	S
_u_boot_sandbox_getopt	arch/sandbox/cpu/u-boot.lds	/^	_u_boot_sandbox_getopt : { *(.u_boot_sandbox_getopt) }$/;"	S
_uart_zynq_serial_init	drivers/serial/serial_zynq.c	/^static void _uart_zynq_serial_init(struct uart_zynq *regs)$/;"	f	typeref:typename:void	file:
_uart_zynq_serial_putc	drivers/serial/serial_zynq.c	/^static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c)$/;"	f	typeref:typename:int	file:
_uart_zynq_serial_setbrg	drivers/serial/serial_zynq.c	/^static void _uart_zynq_serial_setbrg(struct uart_zynq *regs,$/;"	f	typeref:typename:void	file:
_umips_dsp_mfhi	arch/mips/include/asm/mipsregs.h	/^#define _umips_dsp_mfhi(/;"	d
_umips_dsp_mflo	arch/mips/include/asm/mipsregs.h	/^#define _umips_dsp_mflo(/;"	d
_umips_dsp_mfxxx	arch/mips/include/asm/mipsregs.h	/^#define _umips_dsp_mfxxx(/;"	d
_umips_dsp_mthi	arch/mips/include/asm/mipsregs.h	/^#define _umips_dsp_mthi(/;"	d
_umips_dsp_mtlo	arch/mips/include/asm/mipsregs.h	/^#define _umips_dsp_mtlo(/;"	d
_umips_dsp_mtxxx	arch/mips/include/asm/mipsregs.h	/^#define _umips_dsp_mtxxx(/;"	d
_undefined_instruction	arch/arm/lib/vectors.S	/^_undefined_instruction:	.word undefined_instruction$/;"	l
_universe_h	include/universe.h	/^#define _universe_h$/;"	d
_unk	arch/powerpc/cpu/mpc8260/speed.c	/^#define _unk	/;"	d	file:
_unk	arch/powerpc/cpu/mpc83xx/speed.c	/^	_unk,$/;"	e	enum:__anon6ec4fb040103	file:
_unlock	include/linux/mtd/mtd.h	/^	int (*_unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs,uint64_t len)
_unpoint	include/linux/mtd/mtd.h	/^	int (*_unpoint) (struct mtd_info *mtd, loff_t from, size_t len);$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,size_t len)
_unset_re_match	tools/buildman/kconfiglib.py	/^_unset_re_match = re.compile(r"# CONFIG_(\\w+) is not set").match$/;"	v
_unset_user_value	tools/buildman/kconfiglib.py	/^    def _unset_user_value(self):$/;"	m	class:Choice
_unset_user_value_no_recursive_invalidate	tools/buildman/kconfiglib.py	/^    def _unset_user_value_no_recursive_invalidate(self):$/;"	m	class:Symbol
_unused	arch/powerpc/include/asm/sigcontext.h	/^	unsigned long	_unused[4];$/;"	m	struct:sigcontext_struct	typeref:typename:unsigned long[4]
_uswap_64	include/compiler.h	/^#define _uswap_64(/;"	d
_vectors	arch/m68k/cpu/mcf5227x/start.S	/^_vectors:$/;"	l
_vectors	arch/m68k/cpu/mcf523x/start.S	/^_vectors:$/;"	l
_vectors	arch/m68k/cpu/mcf52x2/start.S	/^_vectors:$/;"	l
_vectors	arch/m68k/cpu/mcf530x/start.S	/^_vectors:$/;"	l
_vectors	arch/m68k/cpu/mcf532x/start.S	/^_vectors:$/;"	l
_vectors	arch/m68k/cpu/mcf5445x/start.S	/^_vectors:$/;"	l
_vectors	arch/m68k/cpu/mcf547x_8x/start.S	/^_vectors:$/;"	l
_vprintf	lib/tiny-printf.c	/^int _vprintf(struct printf_info *info, const char *fmt, va_list va)$/;"	f	typeref:typename:int
_warn	tools/buildman/kconfiglib.py	/^    def _warn(self, msg, filename=None, linenr=None):$/;"	m	class:Config
_window_overflow	arch/sparc/cpu/leon2/start.S	/^_window_overflow:$/;"	l
_window_overflow	arch/sparc/cpu/leon3/start.S	/^_window_overflow:$/;"	l
_window_underflow	arch/sparc/cpu/leon2/start.S	/^_window_underflow:$/;"	l
_window_underflow	arch/sparc/cpu/leon3/start.S	/^_window_underflow:$/;"	l
_write	include/linux/mtd/mtd.h	/^	int (*_write) (struct mtd_info *mtd, loff_t to, size_t len,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)
_write_32bit_cp1_register	arch/mips/include/asm/mipsregs.h	/^#define _write_32bit_cp1_register(/;"	d
_write_oob	include/linux/mtd/mtd.h	/^	int (*_write_oob) (struct mtd_info *mtd, loff_t to,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t to,struct mtd_oob_ops * ops)
_write_user_prot_reg	include/linux/mtd/mtd.h	/^	int (*_write_user_prot_reg) (struct mtd_info *mtd, loff_t to,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,u_char * buf)
_writev	include/linux/mtd/mtd.h	/^	int (*_writev) (struct mtd_info *mtd, const struct kvec *vecs,$/;"	m	struct:mtd_info	typeref:typename:int (*)(struct mtd_info * mtd,const struct kvec * vecs,unsigned long count,loff_t to,size_t * retlen)
_x1	arch/powerpc/cpu/mpc83xx/speed.c	/^	_x1,$/;"	e	enum:__anon6ec4fb040103	file:
_x2	arch/powerpc/cpu/mpc83xx/speed.c	/^	_x2,$/;"	e	enum:__anon6ec4fb040103	file:
_x4	arch/powerpc/cpu/mpc83xx/speed.c	/^	_x4,$/;"	e	enum:__anon6ec4fb040103	file:
_x8	arch/powerpc/cpu/mpc83xx/speed.c	/^	_x8,$/;"	e	enum:__anon6ec4fb040103	file:
_x86boot_start	arch/x86/cpu/start.S	/^_x86boot_start:$/;"	l
_xhci_alloc_device	drivers/usb/host/xhci.c	/^int _xhci_alloc_device(struct usb_device *udev)$/;"	f	typeref:typename:int
_xhci_submit_bulk_msg	drivers/usb/host/xhci.c	/^static int _xhci_submit_bulk_msg(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
_xhci_submit_control_msg	drivers/usb/host/xhci.c	/^static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
_xhci_submit_int_msg	drivers/usb/host/xhci.c	/^static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
`u-boot-test-console`	test/py/README.md	/^#### `u-boot-test-console`$/;"	t	subsection:U-Boot pytest suite""Testing real hardware""Hook scripts
`u-boot-test-flash`	test/py/README.md	/^#### `u-boot-test-flash`$/;"	t	subsection:U-Boot pytest suite""Testing real hardware""Hook scripts
`u-boot-test-reset`	test/py/README.md	/^#### `u-boot-test-reset`$/;"	t	subsection:U-Boot pytest suite""Testing real hardware""Hook scripts
a	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32	a;$/;"	m	struct:at91_priority	typeref:typename:u32
a	arch/blackfin/include/asm/system.h	/^	unsigned long a[100];$/;"	m	struct:__xchg_dummy	typeref:typename:unsigned long[100]
a	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^		__u32	a;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
a	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^		__u32	a;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
a	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^		__u32 a;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
a	arch/x86/cpu/lapic.c	/^struct __xchg_dummy	{ unsigned long a[100]; };$/;"	m	struct:__xchg_dummy	typeref:typename:unsigned long[100]	file:
a	arch/x86/lib/physmem.c	/^	uint64_t a:1;      \/* accessed *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
a	drivers/crypto/fsl/rsa_caam.h	/^	const uint8_t *a;		\/* Signature as byte array *\/$/;"	m	struct:pk_in_params	typeref:typename:const uint8_t *
a	drivers/tpm/tpm_tis.h	/^	__be32 a;$/;"	m	struct:timeout_t	typeref:typename:__be32
a	drivers/usb/host/ohci-s3c24xx.h	/^		__u32 a;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
a	drivers/usb/host/ohci.h	/^		__u32	a;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
a0	arch/m68k/include/asm/ptrace.h	/^	ulong a0;$/;"	m	struct:pt_regs	typeref:typename:ulong
a0	arch/mips/include/asm/regdef.h	/^#define a0	/;"	d
a0	arch/sh/include/asm/ptrace.h	/^	unsigned long	a0;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
a0	drivers/net/ne2000_base.h	/^	u8 a0, a1, a2;$/;"	m	struct:hw_info_t	typeref:typename:u8
a0g	arch/sh/include/asm/ptrace.h	/^	unsigned long	a0g;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
a0txcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	a0txcr;	\/* Port Arbitration 0 Tx CR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
a0w	arch/blackfin/include/asm/ptrace.h	/^	long a0w;$/;"	m	struct:pt_regs	typeref:typename:long
a0x	arch/blackfin/include/asm/ptrace.h	/^	long a0x;$/;"	m	struct:pt_regs	typeref:typename:long
a1	arch/m68k/include/asm/ptrace.h	/^	ulong a1;$/;"	m	struct:pt_regs	typeref:typename:ulong
a1	arch/mips/include/asm/regdef.h	/^#define a1	/;"	d
a1	arch/sh/include/asm/ptrace.h	/^	unsigned long	a1;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
a1	drivers/net/ne2000_base.h	/^	u8 a0, a1, a2;$/;"	m	struct:hw_info_t	typeref:typename:u8
a1g	arch/sh/include/asm/ptrace.h	/^	unsigned long	a1g;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
a1txcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	a1txcr;	\/* Port Arbitration 1 Tx CR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
a1w	arch/blackfin/include/asm/ptrace.h	/^	long a1w;$/;"	m	struct:pt_regs	typeref:typename:long
a1x	arch/blackfin/include/asm/ptrace.h	/^	long a1x;$/;"	m	struct:pt_regs	typeref:typename:long
a2	arch/m68k/include/asm/ptrace.h	/^	ulong a2;$/;"	m	struct:pt_regs	typeref:typename:ulong
a2	arch/mips/include/asm/regdef.h	/^#define a2	/;"	d
a2	drivers/net/ne2000_base.h	/^	u8 a0, a1, a2;$/;"	m	struct:hw_info_t	typeref:typename:u8
a2txcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	a2txcr;	\/* Port Arbitration 2 Tx CR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
a3	arch/m68k/include/asm/ptrace.h	/^	ulong a3;$/;"	m	struct:pt_regs	typeref:typename:ulong
a3	arch/mips/include/asm/regdef.h	/^#define a3	/;"	d
a32	arch/x86/cpu/start16.S	/^#define a32	/;"	d	file:
a38x_board_round_trip_delay_array	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^struct trip_delay_element a38x_board_round_trip_delay_array[] = {$/;"	v	typeref:struct:trip_delay_element[]
a38x_bw_per_freq	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static u8 a38x_bw_per_freq[DDR_FREQ_LIMIT] = {$/;"	v	typeref:typename:u8[]	file:
a38x_package_round_trip_delay_array	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static struct trip_delay_element a38x_package_round_trip_delay_array[] = {$/;"	v	typeref:struct:trip_delay_element[]	file:
a38x_rate_per_freq	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static u8 a38x_rate_per_freq[DDR_FREQ_LIMIT] = {$/;"	v	typeref:typename:u8[]	file:
a38x_silicon_delay_offset	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static int a38x_silicon_delay_offset[] = {$/;"	v	typeref:typename:int[]	file:
a38x_vco_freq_per_sar	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static u16 a38x_vco_freq_per_sar[] = {$/;"	v	typeref:typename:u16[]	file:
a4	arch/m68k/include/asm/ptrace.h	/^	ulong a4;$/;"	m	struct:pt_regs	typeref:typename:ulong
a4	arch/mips/include/asm/regdef.h	/^#define a4	/;"	d
a4m072_status2code	board/a4m072/a4m072.c	/^static int a4m072_status2code(int status, char *buf)$/;"	f	typeref:typename:int	file:
a5	arch/m68k/include/asm/ptrace.h	/^	ulong a5;$/;"	m	struct:pt_regs	typeref:typename:ulong
a5	arch/mips/include/asm/regdef.h	/^#define a5	/;"	d
a53_perf_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_con[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
a53_perf_int_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_int_status;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_rd_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_rd_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_rd_latency_samp_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_rd_latency_samp_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_rd_laterncy_acc_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_rd_laterncy_acc_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_rd_max_latency_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_rd_max_latency_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_rd_mon_end	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_rd_mon_end;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_rd_mon_st	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_rd_mon_st;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_working_cnt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_working_cnt;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_wr_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_wr_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_wr_mon_end	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_wr_mon_end;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a53_perf_wr_mon_st	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a53_perf_wr_mon_st;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a6	arch/m68k/include/asm/ptrace.h	/^	ulong a6;$/;"	m	struct:pt_regs	typeref:typename:ulong
a6	arch/mips/include/asm/regdef.h	/^#define a6	/;"	d
a7	arch/mips/include/asm/regdef.h	/^#define a7	/;"	d
a72_perf_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_con[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
a72_perf_int_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_int_status;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_rd_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_rd_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_rd_latency_samp_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_rd_latency_samp_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_rd_laterncy_acc_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_rd_laterncy_acc_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_rd_max_latency_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_rd_max_latency_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_rd_mon_end	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_rd_mon_end;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_rd_mon_st	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_rd_mon_st;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_working_cnt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_working_cnt;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_wr_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_wr_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_wr_mon_end	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_wr_mon_end;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a72_perf_wr_mon_st	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 a72_perf_wr_mon_st;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
a7rcr0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 a7rcr0;$/;"	m	struct:src	typeref:typename:u32
a7rcr1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 a7rcr1;$/;"	m	struct:src	typeref:typename:u32
a:hover	test/py/multiplexed_log.css	/^a:hover {$/;"	s
a:link	test/py/multiplexed_log.css	/^a:link {$/;"	s
a:visited	test/py/multiplexed_log.css	/^a:visited {$/;"	s
aRING	include/fat.h	/^#define aRING	/;"	d
a_100mscfg	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_100mscfg;			\/* 0x500f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_16550_uart_0	arch/nios2/dts/10m50_devboard.dts	/^		a_16550_uart_0: serial@18001600 {$/;"	l	label:sopc0
a_2scfg0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_2scfg0;			\/* 0x5010 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_2scfg1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_2scfg1;			\/* 0x5011 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_5scfg0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_5scfg0;			\/* 0x5012 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_5scfg1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_5scfg1;			\/* 0x5013 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_adr	include/mtd/cfi_flash.h	/^	u16	a_adr;			\/* unaligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u16
a_alt_hnp_support	include/linux/usb/gadget.h	/^	unsigned			a_alt_hnp_support:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
a_apiintclr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_apiintclr;			\/* 0x5006 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_apiintmsk	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_apiintmsk;			\/* 0x5008 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_apiintstat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_apiintstat;		\/* 0x5007 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_argument	tools/fdtgrep.c	/^#define a_argument /;"	d	file:
a_b	cmd/load.c	/^static char a_b[24];$/;"	v	typeref:typename:char[24]	file:
a_b_cnt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 a_b_cnt;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
a_delay	arch/arm/include/asm/arch-omap5/sys_proto.h	/^	u16 a_delay;$/;"	m	struct:iodelay_cfg_entry	typeref:typename:u16
a_hdcpcfg0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_hdcpcfg0;			\/* 0x5000 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_hdcpcfg1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_hdcpcfg1;			\/* 0x5001 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_hdcpobs0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_hdcpobs0;			\/* 0x5002 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_hdcpobs1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_hdcpobs1;			\/* 0x5003 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_hdcpobs2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_hdcpobs2;			\/* 0x5004 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_hdcpobs3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_hdcpobs3;			\/* 0x5005 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_hnp_support	include/linux/usb/gadget.h	/^	unsigned			a_hnp_support:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
a_i2chsetup	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_i2chsetup;			\/* 0x5018 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_id	include/mtd/cfi_flash.h	/^	u16	a_id;			\/* unaligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u16
a_ilog	lib/bch.c	/^static inline int a_ilog(struct bch_control *bch, unsigned int x)$/;"	f	typeref:typename:int	file:
a_intsetup	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_intsetup;			\/* 0x5019 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_log	lib/bch.c	/^static inline int a_log(struct bch_control *bch, unsigned int x)$/;"	f	typeref:typename:int	file:
a_log_tab	include/linux/bch.h	/^	uint16_t       *a_log_tab;$/;"	m	struct:bch_control	typeref:typename:uint16_t *
a_oesswcfg	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_oesswcfg;			\/* 0x500a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_ops	fs/ubifs/ubifs.h	/^	const struct address_space_operations *a_ops;	\/* methods *\/$/;"	m	struct:address_space	typeref:typename:const struct address_space_operations *
a_pow	lib/bch.c	/^static inline unsigned int a_pow(struct bch_control *bch, int i)$/;"	f	typeref:typename:unsigned int	file:
a_pow_tab	include/linux/bch.h	/^	uint16_t       *a_pow_tab;$/;"	m	struct:bch_control	typeref:typename:uint16_t *
a_presetup	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_presetup;			\/* 0x501a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_sfrsetup	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_sfrsetup;			\/* 0x5017 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_siz	drivers/crypto/fsl/rsa_caam.h	/^	uint32_t a_siz;		\/* size of a[] in number of bytes *\/$/;"	m	struct:pk_in_params	typeref:typename:uint32_t
a_srm_base	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_srm_base;			\/* 0x5020 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_srmctrl	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_srmctrl;			\/* 0x5016 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_srmverlsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_srmverlsb;			\/* 0x5014 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_srmvermsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_srmvermsb;			\/* 0x5015 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_timer1setup0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_timer1setup0;		\/* 0x500b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_timer1setup1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_timer1setup1;		\/* 0x500c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_timer2setup0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_timer2setup0;		\/* 0x500d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_timer2setup1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_timer2setup1;		\/* 0x500e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_vidpolcfg	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 a_vidpolcfg;			\/* 0x5009 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
a_wait_bcon	drivers/usb/musb-new/musb_core.h	/^	int			a_wait_bcon;	\/* VBUS timeout in msecs *\/$/;"	m	struct:musb	typeref:typename:int
aaa_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 aaa_word(u16 d)$/;"	f	typeref:typename:u16
aad_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 aad_word(u16 d)$/;"	f	typeref:typename:u16
aam_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 aam_word(u8 d)$/;"	f	typeref:typename:u16
aas_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 aas_word(u16 d)$/;"	f	typeref:typename:u16
aasr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32		aasr;		\/* 0x08 MC Abort Address Status Reg *\/$/;"	m	struct:at91_mc	typeref:typename:u32
ab1cr	arch/arm/include/asm/ti-common/davinci_nand.h	/^			uint32_t ab1cr;$/;"	m	struct:davinci_emif_regs::__anonece7fe9a010a::__anonece7fe9a0208	typeref:typename:uint32_t
ab2cr	arch/arm/include/asm/ti-common/davinci_nand.h	/^			uint32_t ab2cr;$/;"	m	struct:davinci_emif_regs::__anonece7fe9a010a::__anonece7fe9a0208	typeref:typename:uint32_t
ab3cr	arch/arm/include/asm/ti-common/davinci_nand.h	/^			uint32_t ab3cr;$/;"	m	struct:davinci_emif_regs::__anonece7fe9a010a::__anonece7fe9a0208	typeref:typename:uint32_t
ab4cr	arch/arm/include/asm/ti-common/davinci_nand.h	/^			uint32_t ab4cr;$/;"	m	struct:davinci_emif_regs::__anonece7fe9a010a::__anonece7fe9a0208	typeref:typename:uint32_t
abb_dspeve	arch/arm/dts/dra7.dtsi	/^		abb_dspeve: regulator-abb-dspeve {$/;"	l
abb_gpu	arch/arm/dts/dra7.dtsi	/^		abb_gpu: regulator-abb-gpu {$/;"	l
abb_ivahd	arch/arm/dts/dra7.dtsi	/^		abb_ivahd: regulator-abb-ivahd {$/;"	l
abb_mpu	arch/arm/dts/dra7.dtsi	/^		abb_mpu: regulator-abb-mpu {$/;"	l
abb_setup	arch/arm/cpu/armv7/omap-common/abb.c	/^void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control,$/;"	f	typeref:typename:void
abb_setup_ldovbb	arch/arm/cpu/armv7/omap-common/abb.c	/^__weak s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)$/;"	f	typeref:typename:__weak s8
abb_setup_ldovbb	arch/arm/cpu/armv7/omap5/abb.c	/^s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)$/;"	f	typeref:typename:s8
abb_setup_timings	arch/arm/cpu/armv7/omap-common/abb.c	/^static void abb_setup_timings(u32 setup)$/;"	f	typeref:typename:void	file:
abb_tx_done_mask	arch/arm/include/asm/omap_common.h	/^	u32 abb_tx_done_mask;$/;"	m	struct:volts	typeref:typename:u32
abbrev_spec	cmd/flash.c	/^abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl)$/;"	f	typeref:typename:int	file:
abcdsr1	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	abcdsr1;	\/* 0x70 Peripheral ABCD Select Register 1 *\/$/;"	m	struct:at91_port	typeref:typename:u32
abcdsr2	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	abcdsr2;	\/* 0x74 Peripheral ABCD Select Register 2 *\/$/;"	m	struct:at91_port	typeref:typename:u32
abcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	abcr;		\/* 0x1000 - MCM CCB Address Configuration Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
abe	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *abe;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
abe_24m_fclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_24m_fclk: abe_24m_fclk {$/;"	l
abe_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_clk: abe_clk {$/;"	l
abe_dpll_bypass_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_dpll_bypass_clk_mux: abe_dpll_bypass_clk_mux {$/;"	l
abe_dpll_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_dpll_clk_mux: abe_dpll_clk_mux {$/;"	l
abe_dpll_params_32k_196608khz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params abe_dpll_params_32k_196608khz = {$/;"	v	typeref:typename:const struct dpll_params	file:
abe_dpll_params_32k_196608khz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params abe_dpll_params_32k_196608khz = {$/;"	v	typeref:typename:const struct dpll_params	file:
abe_dpll_params_sysclk2_361267khz	arch/arm/cpu/armv7/omap5/hw_data.c	/^		abe_dpll_params_sysclk2_361267khz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
abe_dpll_params_sysclk_196608khz	arch/arm/cpu/armv7/omap4/hw_data.c	/^		abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
abe_dpll_params_sysclk_196608khz	arch/arm/cpu/armv7/omap5/hw_data.c	/^		abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
abe_dpll_sys_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_dpll_sys_clk_mux: abe_dpll_sys_clk_mux {$/;"	l
abe_giclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_giclk_div: abe_giclk_div {$/;"	l
abe_lp_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_lp_clk_div: abe_lp_clk_div {$/;"	l
abe_sys_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	abe_sys_clk_div: abe_sys_clk_div {$/;"	l
abi	arch/mips/include/asm/processor.h	/^	struct mips_abi *abi;$/;"	m	struct:thread_struct	typeref:struct:mips_abi *
abi_entry	arch/xtensa/include/asm/asmmacro.h	/^#define abi_entry	/;"	d
abi_entry	arch/xtensa/include/asm/asmmacro.h	/^#define abi_entry$/;"	d
abi_ret	arch/xtensa/include/asm/asmmacro.h	/^#define abi_ret	/;"	d
abistcfg	include/fsl_usb.h	/^	u32	abistcfg;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
abiststs	include/fsl_usb.h	/^	u32	abiststs;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
abncr	arch/arm/include/asm/ti-common/davinci_nand.h	/^		uint32_t abncr[4];$/;"	m	union:davinci_emif_regs::__anonece7fe9a010a	typeref:typename:uint32_t[4]
abort	arch/arm/cpu/armv7/omap3/board.c	/^void abort(void)$/;"	f	typeref:typename:void
abort	include/ACEX1K.h	/^	Altera_abort_fn		abort;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_abort_fn
abort	include/ACEX1K.h	/^	Altera_abort_fn		abort;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_abort_fn
abort	include/altera.h	/^	Altera_abort_fn abort;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_abort_fn
abort	include/spartan2.h	/^	xilinx_abort_fn	abort;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_abort_fn
abort	include/spartan3.h	/^	xilinx_abort_fn	abort;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_abort_fn
abort	include/spartan3.h	/^	xilinx_abort_fn abort;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_abort_fn
abort	include/virtex2.h	/^	xilinx_abort_fn	abort;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_abort_fn
abort_td	drivers/usb/host/xhci-ring.c	/^static void abort_td(struct usb_device *udev, int ep_index)$/;"	f	typeref:typename:void	file:
abortboot	common/autoboot.c	/^static int abortboot(int bootdelay)$/;"	f	typeref:typename:int	file:
abortdma	drivers/net/armada100_fec.c	/^static void abortdma(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
about1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="about1">$/;"	i
abs	include/linux/kernel.h	/^#define abs(/;"	d
abs64	include/linux/kernel.h	/^#define abs64(/;"	d
abs_l	arch/arc/lib/_millicodethunk.S	/^#define abs_l /;"	d	file:
absr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	absr;		\/* 0x78 AB Select Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
abstract_control	include/usbdescriptors.h	/^		struct usb_class_abstract_control_descriptor abstract_control;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_abstract_control_descriptor
abstractfileid	disk/part_iso.h	/^	char					abstractfileid[37]; \/* abstract file identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[37]
abstractfileid	disk/part_iso.h	/^	char					abstractfileid[37]; \/* abstract file identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[37]
abtsc	include/commproc.h	/^	ushort	abtsc;		\/* abort sequence counter *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
abuf	drivers/i2c/adi_i2c.c	/^	u8 *abuf;		\/* addr buffer *\/$/;"	m	struct:adi_i2c_msg	typeref:typename:u8 *	file:
ac	include/sja1000.h	/^	u8 ac;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
ac97	arch/arm/dts/at91sam9263.dtsi	/^			ac97: sound@fffa0000 {$/;"	l
ac97	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ac97;	\/*0x084*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
ac97_clk	arch/arm/dts/at91sam9263.dtsi	/^					ac97_clk: ac97_clk {$/;"	l
ac97_clk	arch/arm/dts/at91sam9g45.dtsi	/^					ac97_clk: ac97_clk {$/;"	l
ac97_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ac97_clk: clk@01c200bc {$/;"	l
ac97_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ac97_clk_cfg;	\/* 0xbc *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ac97_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ac97_clk_cfg;	\/* 0xbc *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ac_bias	drivers/video/da8xx-fb.h	/^	int ac_bias;$/;"	m	struct:lcd_ctrl_config	typeref:typename:int
ac_bias_intrpt	drivers/video/da8xx-fb.h	/^	int ac_bias_intrpt;$/;"	m	struct:lcd_ctrl_config	typeref:typename:int
ac_err_mask	drivers/block/sata_dwc.c	/^static unsigned int ac_err_mask(u8 status)$/;"	f	typeref:typename:unsigned int	file:
ac_present_ap	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		ac_present_ap: ac-present-ap {$/;"	l
ac_rom_init	board/altera/arria5-socdk/qts/sdram_config.h	/^const u32 ac_rom_init[] ={$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/altera/cyclone5-socdk/qts/sdram_config.h	/^const u32 ac_rom_init[] ={$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/denx/mcvevk/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/ebv/socrates/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/is1/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/samtec/vining_fpga/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/sr1500/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/terasic/de0-nano-soc/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_rom_init	board/terasic/sockit/qts/sdram_config.h	/^const u32 ac_rom_init[] = {$/;"	v	typeref:typename:const u32[]
ac_timings	arch/arm/cpu/armv7/omap5/sdram.c	/^static const struct lpddr2_ac_timings *ac_timings[MAX_NUM_SPEEDBINS] = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings * []	file:
ac_timings	arch/arm/include/asm/emif.h	/^	const struct lpddr2_ac_timings **ac_timings;$/;"	m	struct:lpddr2_device_timings	typeref:typename:const struct lpddr2_ac_timings **
acadd	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 acadd;$/;"	m	struct:ssi	typeref:typename:u32
acadia_gpio_init	board/amcc/acadia/acadia.c	/^static void acadia_gpio_init(void)$/;"	f	typeref:typename:void	file:
acbdlr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 acbdlr;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acbdlr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 acbdlr[10];		\/* 0x40 AC bit delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[10]
acbdlr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 acbdlr;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acbdlr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 acbdlr[10];		\/* 0x40 AC bit delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[10]
acc	drivers/video/mx3fb.c	/^	u32	acc;$/;"	m	struct:pixel_fmt_cfg	typeref:typename:u32	file:
acc_clock	include/linux/mtd/samsung_onenand.h	/^	unsigned int	acc_clock;	\/* 0x01C0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
acc_reg	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 acc_reg;		\/* MBAR_ETH + 0x10C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
accclkreq	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 accclkreq;          \/* 0x0204 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
accel	include/linux/fb.h	/^	__u32 accel;			\/* Indicate to driver which	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u32
accel_flags	include/linux/fb.h	/^	__u32 accel_flags;		\/* (OBSOLETE) see fb_info.flags *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
access	arch/x86/cpu/interrupts.c	/^	u8	access;$/;"	m	struct:idt_entry	typeref:typename:u8	file:
access	drivers/net/cpsw.c	/^		u32		access;$/;"	m	struct:cpsw_mdio_regs::__anon0b90ad170108	typeref:typename:u32	file:
access	drivers/tpm/tpm_tis_lpc.c	/^	u32 access;$/;"	m	struct:tpm_locality	typeref:typename:u32	file:
access_align	include/linux/fb.h	/^	u32 access_align;	\/* alignment per read\/write (bits)	*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
access_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t access_ctrl;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
access_ctrl	drivers/net/mvgbe.h	/^	u16 access_ctrl;	\/*Access ctrl register. see above macros *\/$/;"	m	struct:mvgbe_winparam	typeref:typename:u16
access_ctrl_root_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t access_ctrl_root_clr;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
access_ctrl_root_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t access_ctrl_root_set;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
access_ctrl_root_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t access_ctrl_root_tog;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
access_hreg	board/gdsys/p1022/controlcenterd-id.c	/^static struct h_reg *access_hreg(uint8_t spec, enum access_mode mode)$/;"	f	typeref:struct:h_reg *	file:
access_mask	drivers/spmi/spmi-sandbox.c	/^	u8 access_mask;$/;"	m	struct:sandbox_emul_fake_regs	typeref:typename:u8	file:
access_mode	board/gdsys/p1022/controlcenterd-id.c	/^enum access_mode {$/;"	g	file:
access_size	arch/x86/include/asm/acpi_table.h	/^	u8 access_size;	\/* Access size *\/$/;"	m	struct:acpi_gen_regaddr	typeref:typename:u8
access_size	include/ec_commands.h	/^	uint32_t access_size;$/;"	m	struct:ec_response_pstore_info	typeref:typename:uint32_t
accuracy	include/efi.h	/^	u32 accuracy;$/;"	m	struct:efi_time_cap	typeref:typename:u32
acdat	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 acdat;$/;"	m	struct:ssi	typeref:typename:u32
acdllcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 acdllcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
acdllcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 acdllcr;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acdllcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 acdllcr;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ace_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ace_clk_cfg;	\/* 0x148 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ace_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ace_clk_cfg;	\/* 0x148 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ace_readw	drivers/block/systemace.c	/^static u16 ace_readw(unsigned off)$/;"	f	typeref:typename:u16	file:
ace_sha_hash_digest	drivers/crypto/ace_sha.c	/^int ace_sha_hash_digest(const unsigned char *pbuf, unsigned int buf_len,$/;"	f	typeref:typename:int
ace_writew	drivers/block/systemace.c	/^static void ace_writew(u16 val, unsigned off)$/;"	f	typeref:typename:void	file:
acgr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 acgr;	\/*0x1024*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
aciocr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 aciocr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
aciocr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 aciocr;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
aciocr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 aciocr;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
aciocr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 aciocr;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
aciocr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 aciocr[6];		\/* 0x68 AC IO configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[6]
aciocr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 aciocr;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
aciocr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 aciocr;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
aciocr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 aciocr;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
aciocr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 aciocr[6];		\/* 0x68 AC IO configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[6]
ack	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 ack;$/;"	m	struct:emi_regs	typeref:typename:u32
ack	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 ack;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
ack	drivers/usb/gadget/f_thor.h	/^	s32 ack;		\/* ack *\/$/;"	m	struct:rsp_box	typeref:typename:s32
ack	drivers/usb/gadget/f_thor.h	/^	s32 ack;		\/* response id (= request id) *\/$/;"	m	struct:data_rsp_box	typeref:typename:s32
ack	drivers/usb/gadget/rndis.h	/^	int			(*ack)(struct eth_device *);$/;"	m	struct:rndis_params	typeref:typename:int (*)(struct eth_device *)
ack0	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 ack0;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
ack1	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 ack1;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
ack2	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 ack2;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
ack3	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 ack3;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
ack_data	arch/x86/include/asm/me_common.h	/^	u32 ack_data:3;$/;"	m	struct:me_hfs	typeref:typename:u32:3
ack_interrupt	drivers/qe/uec_phy.h	/^	int (*ack_interrupt) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:int (*)(struct uec_mii_info * mii_info)
acknack	drivers/i2c/mv_i2c.c	/^	u8 acknack;$/;"	m	struct:mv_i2c_msg	typeref:typename:u8	file:
ackpend	drivers/usb/musb-new/musb_core.h	/^	u16			ackpend;		\/* ep0 *\/$/;"	m	struct:musb	typeref:typename:u16
acl	include/ext_common.h	/^	__le32 acl;$/;"	m	struct:ext2_inode	typeref:typename:__le32
aclcdlr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 aclcdlr;		\/* 0x3c AC local calibrated delay line reg *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
aclcdlr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 aclcdlr;		\/* 0x3c AC local calibrated delay line reg *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acm_config_desc	drivers/serial/usbtty.c	/^struct acm_config_desc {$/;"	s	file:
acm_configuration_descriptors	drivers/serial/usbtty.c	/^static struct acm_config_desc acm_configuration_descriptors[NUM_CONFIGS] = {$/;"	v	typeref:struct:acm_config_desc[]	file:
acm_descriptor	drivers/usb/gadget/ether.c	/^static const struct usb_cdc_acm_descriptor acm_descriptor = {$/;"	v	typeref:typename:const struct usb_cdc_acm_descriptor	file:
acmd	drivers/block/fsl_sata.h	/^	u8 acmd[SATA_HC_CMD_DESC_ACMD_SIZE];$/;"	m	struct:cmd_desc	typeref:typename:u8[]
acmd	drivers/mmc/ftsdc010_mci.c	/^	uint32_t acmd;$/;"	m	struct:ftsdc010_chip	typeref:typename:uint32_t	file:
acmd12errsts	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	acmd12errsts;	\/* _AUTO_CMD12_ERR_STATUS_0 15:00 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
acmdlr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 acmdlr;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acmdlr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 acmdlr;		\/* 0x38 AC master delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acmdlr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 acmdlr;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acmdlr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 acmdlr;		\/* 0x38 AC master delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
acmr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 acmr;	\/* Audio clock mux *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
acnt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int acnt;$/;"	m	struct:edma3_slot_config	typeref:typename:int
acodec	arch/arm/dts/tegra124-nyan.dtsi	/^		acodec: audio-codec@10 {$/;"	l
acorn	arch/arm/include/asm/setup.h	/^		struct tag_acorn	acorn;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_acorn
acp	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	acp;$/;"	m	struct:nic301_registers	typeref:typename:u32
acp_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	acp_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
acp_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	acp_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
acp_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned acp_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
acpi_add_table	arch/x86/lib/acpi_table.c	/^static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)$/;"	f	typeref:typename:void	file:
acpi_address_space_size	arch/x86/include/asm/acpi_table.h	/^enum acpi_address_space_size {$/;"	g
acpi_address_space_type	arch/x86/include/asm/acpi_table.h	/^enum acpi_address_space_type {$/;"	g
acpi_apic_types	arch/x86/include/asm/acpi_table.h	/^enum acpi_apic_types {$/;"	g
acpi_create_facs	arch/x86/lib/acpi_table.c	/^static void acpi_create_facs(struct acpi_facs *facs)$/;"	f	typeref:typename:void	file:
acpi_create_fadt	arch/x86/cpu/baytrail/acpi.c	/^void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,$/;"	f	typeref:typename:void
acpi_create_fadt	arch/x86/cpu/quark/acpi.c	/^void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,$/;"	f	typeref:typename:void
acpi_create_gnvs	arch/x86/cpu/baytrail/acpi.c	/^void acpi_create_gnvs(struct acpi_global_nvs *gnvs)$/;"	f	typeref:typename:void
acpi_create_gnvs	arch/x86/cpu/quark/acpi.c	/^void acpi_create_gnvs(struct acpi_global_nvs *gnvs)$/;"	f	typeref:typename:void
acpi_create_madt	arch/x86/lib/acpi_table.c	/^static void acpi_create_madt(struct acpi_madt *madt)$/;"	f	typeref:typename:void	file:
acpi_create_madt_ioapic	arch/x86/lib/acpi_table.c	/^int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,$/;"	f	typeref:typename:int
acpi_create_madt_irq_overrides	arch/x86/cpu/baytrail/acpi.c	/^static int acpi_create_madt_irq_overrides(u32 current)$/;"	f	typeref:typename:int	file:
acpi_create_madt_irq_overrides	arch/x86/cpu/quark/acpi.c	/^static int acpi_create_madt_irq_overrides(u32 current)$/;"	f	typeref:typename:int	file:
acpi_create_madt_irqoverride	arch/x86/lib/acpi_table.c	/^int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,$/;"	f	typeref:typename:int
acpi_create_madt_lapic	arch/x86/lib/acpi_table.c	/^static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,$/;"	f	typeref:typename:int	file:
acpi_create_madt_lapic_nmi	arch/x86/lib/acpi_table.c	/^int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,$/;"	f	typeref:typename:int
acpi_create_madt_lapics	arch/x86/lib/acpi_table.c	/^int acpi_create_madt_lapics(u32 current)$/;"	f	typeref:typename:int
acpi_create_mcfg	arch/x86/lib/acpi_table.c	/^static void acpi_create_mcfg(struct acpi_mcfg *mcfg)$/;"	f	typeref:typename:void	file:
acpi_create_mcfg_mmconfig	arch/x86/lib/acpi_table.c	/^static int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig,$/;"	f	typeref:typename:int	file:
acpi_disable	arch/x86/include/asm/acpi_table.h	/^	u8 acpi_disable;$/;"	m	struct:acpi_fadt	typeref:typename:u8
acpi_enable	arch/x86/include/asm/acpi_table.h	/^	u8 acpi_enable;$/;"	m	struct:acpi_fadt	typeref:typename:u8
acpi_facs	arch/x86/include/asm/acpi_table.h	/^struct acpi_facs {$/;"	s
acpi_fadt	arch/x86/include/asm/acpi_table.h	/^struct __packed acpi_fadt {$/;"	s
acpi_fill_header	arch/x86/lib/acpi_table.c	/^void acpi_fill_header(struct acpi_table_header *header, char *signature)$/;"	f	typeref:typename:void
acpi_fill_madt	arch/x86/cpu/baytrail/acpi.c	/^u32 acpi_fill_madt(u32 current)$/;"	f	typeref:typename:u32
acpi_fill_madt	arch/x86/cpu/quark/acpi.c	/^u32 acpi_fill_madt(u32 current)$/;"	f	typeref:typename:u32
acpi_fill_mcfg	arch/x86/lib/acpi_table.c	/^static u32 acpi_fill_mcfg(u32 current)$/;"	f	typeref:typename:u32	file:
acpi_gen_regaddr	arch/x86/include/asm/acpi_table.h	/^struct acpi_gen_regaddr {$/;"	s
acpi_global_nvs	arch/x86/include/asm/arch-baytrail/global_nvs.h	/^struct __packed acpi_global_nvs {$/;"	s
acpi_global_nvs	arch/x86/include/asm/arch-quark/global_nvs.h	/^struct __packed acpi_global_nvs {$/;"	s
acpi_handle	drivers/block/sata_dwc.h	/^	acpi_handle		acpi_handle;$/;"	m	struct:ata_device	typeref:typename:acpi_handle
acpi_madt	arch/x86/include/asm/acpi_table.h	/^struct acpi_madt {$/;"	s
acpi_madt_ioapic	arch/x86/include/asm/acpi_table.h	/^struct acpi_madt_ioapic {$/;"	s
acpi_madt_irqoverride	arch/x86/include/asm/acpi_table.h	/^struct __packed acpi_madt_irqoverride {$/;"	s
acpi_madt_lapic	arch/x86/include/asm/acpi_table.h	/^struct acpi_madt_lapic {$/;"	s
acpi_madt_lapic_nmi	arch/x86/include/asm/acpi_table.h	/^struct __packed acpi_madt_lapic_nmi {$/;"	s
acpi_mcfg	arch/x86/include/asm/acpi_table.h	/^struct acpi_mcfg {$/;"	s
acpi_mcfg_mmconfig	arch/x86/include/asm/acpi_table.h	/^struct acpi_mcfg_mmconfig {$/;"	s
acpi_pm_profile	arch/x86/include/asm/acpi_table.h	/^enum acpi_pm_profile {$/;"	g
acpi_rsdp	arch/x86/include/asm/acpi_table.h	/^struct acpi_rsdp {$/;"	s
acpi_rsdt	arch/x86/include/asm/acpi_table.h	/^struct acpi_rsdt {$/;"	s
acpi_table_header	arch/x86/include/asm/acpi_table.h	/^struct acpi_table_header {$/;"	s
acpi_write_rsdp	arch/x86/lib/acpi_table.c	/^static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,$/;"	f	typeref:typename:void	file:
acpi_write_rsdt	arch/x86/lib/acpi_table.c	/^static void acpi_write_rsdt(struct acpi_rsdt *rsdt)$/;"	f	typeref:typename:void	file:
acpi_write_xsdt	arch/x86/lib/acpi_table.c	/^static void acpi_write_xsdt(struct acpi_xsdt *xsdt)$/;"	f	typeref:typename:void	file:
acpi_xsdt	arch/x86/include/asm/acpi_table.h	/^struct acpi_xsdt {$/;"	s
acpu_vote_msk0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_vote_msk0;	\/*0x920*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acpu_vote_msk1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_vote_msk1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acpu_votedis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_votedis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acpu_voteen	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_voteen;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acpu_votestat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_votestat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acpu_votestat0_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_votestat0_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acpu_votestat1_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 acpu_votestat1_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
acr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 acr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
acr	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	acr;			\/* 0x54 *\/$/;"	m	struct:scu_registers	typeref:typename:u32
acr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 acr;$/;"	m	struct:ssi	typeref:typename:u32
acr	arch/m68k/include/asm/immap_5445x.h	/^		u32 acr;	\/* Arbiter Control Register *\/$/;"	m	union:pci_arbiter::__anona4dddf1d010a	typeref:typename:u32
acr	arch/m68k/include/asm/immap_547x_8x.h	/^		u32 acr;	\/* Arbiter Control *\/$/;"	m	union:pci_arbiter::__anond54bd45a010a	typeref:typename:u32
acr	arch/powerpc/include/asm/immap_512x.h	/^		volatile u8	acr;$/;"	m	union:psc512x::__anond569131d030a	typeref:typename:volatile u8
acr	arch/powerpc/include/asm/immap_512x.h	/^	u32 acr;		\/* Arbiter Configuration Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
acr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 acr;		\/* Arbiter Configuration Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
acr	drivers/i2c/at91_i2c.h	/^	u32 acr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
acr	drivers/mtd/stm32_flash.h	/^	u32 acr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
acr	include/mpc5xxx.h	/^		volatile u8	acr;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b030a	typeref:typename:volatile u8
act2pden	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 act2pden;		\/* 0x84: EMC_ACT2PDEN *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
act8846	arch/arm/dts/rk3288-evb.dtsi	/^	act8846: act8846@5a {$/;"	l
act8846	arch/arm/dts/rk3288-firefly.dtsi	/^	act8846: act8846@5a {$/;"	l
act8846	arch/arm/dts/rk3288-rock2-som.dtsi	/^	act8846: act8846@5a {$/;"	l
act8846_bind	drivers/power/pmic/act8846.c	/^static int act8846_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
act8846_ids	drivers/power/pmic/act8846.c	/^static const struct udevice_id act8846_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
act8846_ops	drivers/power/pmic/act8846.c	/^static struct dm_pmic_ops act8846_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
act8846_read	drivers/power/pmic/act8846.c	/^static int act8846_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
act8846_reg_count	drivers/power/pmic/act8846.c	/^static int act8846_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
act8846_reg_ops	drivers/power/regulator/act8846.c	/^static const struct dm_regulator_ops act8846_reg_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
act8846_reg_probe	drivers/power/regulator/act8846.c	/^static int act8846_reg_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
act8846_reg_table	include/power/act8846_pmic.h	/^struct  act8846_reg_table {$/;"	s
act8846_write	drivers/power/pmic/act8846.c	/^static int act8846_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
act_altsetting	include/usb.h	/^	__u8	act_altsetting;$/;"	m	struct:usb_interface	typeref:typename:__u8
act_len	include/usb.h	/^	int act_len;			\/* transferred bytes *\/$/;"	m	struct:usb_device	typeref:typename:int
actime	fs/yaffs2/yaffsfs.h	/^	unsigned long actime;$/;"	m	struct:yaffs_utimbuf	typeref:typename:unsigned long
action	board/micronas/vct/scc.h	/^		u32 action:4;	\/* DMA Command encoding			*\/$/;"	m	struct:scc_cmd::__anon903167320108	typeref:typename:u32:4
action	common/usb_storage.c	/^	int		action;			\/* what to do *\/$/;"	m	struct:us_data	typeref:typename:int	file:
action	test/py/multiplexed_log.py	/^    def action(self, msg):$/;"	m	class:Logfile
activate	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 activate;$/;"	m	struct:rk3288_msch	typeref:typename:u32
activate	include/linux/fb.h	/^	__u32 activate;			\/* see FB_ACTIVATE_*		*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
activate_0_and_1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	activate_0_and_1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
activate_0_and_1_wait1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	activate_0_and_1_wait1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
activate_0_and_1_wait2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	activate_0_and_1_wait2;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
activate_1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	activate_1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
activate_delay_us	drivers/spi/rk_spi.c	/^	uint activate_delay_us;		\/* Delay to wait after activate *\/$/;"	m	struct:rockchip_spi_platdata	typeref:typename:uint	file:
activate_deselect_after_run_alg	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 activate_select_before_run_alg = 1, activate_deselect_after_run_alg = 1,$/;"	v	typeref:typename:u32
activate_select_before_run_alg	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 activate_select_before_run_alg = 1, activate_deselect_after_run_alg = 1,$/;"	v	typeref:typename:u32
active	arch/arm/include/asm/imx-common/dma.h	/^	struct list_head active;$/;"	m	struct:mxs_dma_chan	typeref:struct:list_head
active	cmd/bootmenu.c	/^	int active;			\/* active menu entry *\/$/;"	m	struct:bootmenu_data	typeref:typename:int	file:
active	drivers/i2c/s3c24x0_i2c.h	/^	bool active;	\/* port is active and available *\/$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:bool
active	drivers/usb/gadget/pxa25x_udc.h	/^						active:1;$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
active	include/ec_commands.h	/^			uint8_t active;		\/* still active *\/$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670708	typeref:typename:uint8_t
active	include/linux/ethtool.h	/^	__u32	active;$/;"	m	struct:ethtool_get_features_block	typeref:typename:__u32
active	include/linux/mtd/nand.h	/^	struct nand_chip *active;$/;"	m	struct:nand_hw_control	typeref:struct:nand_chip *
active_channel	drivers/adc/exynos-adc.c	/^	int active_channel;$/;"	m	struct:exynos_adc_priv	typeref:typename:int	file:
active_channel_mask	drivers/adc/sandbox.c	/^	int active_channel_mask;$/;"	m	struct:sandbox_adc_priv	typeref:typename:int	file:
active_count	drivers/video/tegra124/sor.h	/^	u32	active_count;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
active_flag	tools/env/fw_env.c	/^static unsigned char active_flag = 1;$/;"	v	typeref:typename:unsigned char	file:
active_frac	drivers/video/tegra124/sor.h	/^	u32	active_frac;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
active_line_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_line_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_line_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_line_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_line_sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_line_sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_line_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_line_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_ln_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_ln_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_ln_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_ln_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_ln_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_ln_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_ln_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_ln_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_num	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 active_num;			\/* 0x124 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
active_num	arch/arm/include/asm/arch/display.h	/^	u32 active_num;			\/* 0x124 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
active_num	arch/arm/include/asm/imx-common/dma.h	/^	unsigned int active_num;$/;"	m	struct:mxs_dma_chan	typeref:typename:unsigned int
active_phy_addr	drivers/net/davinci_emac.c	/^static u_int8_t	active_phy_addr[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];$/;"	v	typeref:typename:u_int8_t[]	file:
active_pix_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_pix_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_pix_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_pix_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_pix_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_pix_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_pix_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	active_pix_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
active_pixel_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_pixel_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_pixel_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_pixel_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_pixel_sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_pixel_sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_pixel_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	active_pixel_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
active_rank	drivers/ddr/altera/sequencer.h	/^	u32	active_rank;$/;"	m	struct:socfpga_sdr_scc_mgr	typeref:typename:u32
active_slave	include/cpsw.h	/^	u32	active_slave;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
active_status	board/micronas/vct/scc.h	/^		u32 active_status:1;	\/* 1=active  0=reset		*\/$/;"	m	struct:scc_softwareconfiguration::__anon903167320408	typeref:typename:u32:1
active_suspend	drivers/usb/gadget/at91_udc.h	/^	unsigned			active_suspend:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
active_tag	drivers/block/sata_dwc.h	/^	unsigned int		active_tag;$/;"	m	struct:ata_link	typeref:typename:unsigned int
active_windowing	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 active_windowing;$/;"	m	struct:dram_para	typeref:typename:u32
active_windowing	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 active_windowing;$/;"	m	struct:dram_para	typeref:typename:u32
activepolarity	drivers/video/tegra124/sor.h	/^	u32	activepolarity;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
actl_8bit	arch/x86/include/asm/irq.h	/^	bool actl_8bit;$/;"	m	struct:irq_router	typeref:typename:bool
actl_addr	arch/x86/include/asm/irq.h	/^	int actl_addr;$/;"	m	struct:irq_router	typeref:typename:int
acttoact	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 acttoact:6;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:6
actual	include/linux/usb/gadget.h	/^	unsigned		actual;$/;"	m	struct:usb_request	typeref:typename:unsigned
actual_bytes_transferred	drivers/net/altera_tse.h	/^	u16 actual_bytes_transferred;\/* bytes transferred by DMA *\/$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u16
actual_len	drivers/usb/musb-new/musb_dma.h	/^	size_t			actual_len;$/;"	m	struct:dma_channel	typeref:typename:size_t
actual_length	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int actual_length;$/;"	m	struct:__anon08a6674e0108	typeref:typename:int
actual_length	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int actual_length;$/;"	m	struct:__anonb10e26e60108	typeref:typename:int
actual_length	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int actual_length;$/;"	m	struct:__anond5d032300108	typeref:typename:int
actual_length	drivers/usb/host/isp116x.h	/^	int actual_length;	\/* (return) actual transfer length *\/$/;"	m	struct:__anon2695f18b0108	typeref:typename:int
actual_length	drivers/usb/host/ohci-s3c24xx.h	/^	int actual_length;$/;"	m	struct:urb_priv	typeref:typename:int
actual_length	drivers/usb/host/ohci.h	/^	int actual_length;$/;"	m	struct:__anone9fd91320108	typeref:typename:int
actual_length	drivers/usb/musb-new/usb-compat.h	/^	u32 actual_length;		\/* (return) actual transfer length *\/$/;"	m	struct:urb	typeref:typename:u32
actual_length	include/usbdevice.h	/^	unsigned int actual_length;$/;"	m	struct:urb	typeref:typename:unsigned int
actual_phy_addr	arch/powerpc/cpu/mpc8xx/fec.c	/^	int actual_phy_addr;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
acx	arch/mips/include/asm/ptrace.h	/^	unsigned long acx;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
ad_pll	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^struct ad_pll {$/;"	s	file:
adap_emac	drivers/net/davinci_emac.c	/^static volatile emac_regs	*adap_emac = (emac_regs *)EMAC_BASE_ADDR;$/;"	v	typeref:typename:volatile emac_regs *	file:
adap_ewrap	drivers/net/davinci_emac.c	/^static volatile ewrap_regs	*adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR;$/;"	v	typeref:typename:volatile ewrap_regs *	file:
adap_mdio	drivers/net/davinci_emac.c	/^static volatile mdio_regs	*adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR;$/;"	v	typeref:typename:volatile mdio_regs *	file:
adapter	include/i2c.h	/^	int	adapter;$/;"	m	struct:i2c_bus_hose	typeref:typename:int
adate	include/fat.h	/^	__u16	adate;		\/* Last access date *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
adc	arch/arm/dts/zynq-7000.dtsi	/^		adc: adc@f8007100 {$/;"	l	label:amba
adc0	arch/arm/dts/at91sam9260.dtsi	/^			adc0: adc@fffe0000 {$/;"	l
adc0	arch/arm/dts/at91sam9g20.dtsi	/^			adc0: adc@fffe0000 {$/;"	l
adc0	arch/arm/dts/at91sam9g45.dtsi	/^			adc0: adc@fffb0000 {$/;"	l
adc0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t adc0;				\/* offset 0x0500 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
adc1	arch/arm/dts/imx6ull.dtsi	/^			adc1: adc@02198000 {$/;"	l	label:aips2
adc1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t adc1;				\/* offset 0x0510 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
adc_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 adc_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
adc_channel	include/adc.h	/^struct adc_channel {$/;"	s
adc_channel_data	drivers/adc/adc-uclass.c	/^int adc_channel_data(struct udevice *dev, int channel, unsigned int *data)$/;"	f	typeref:typename:int
adc_channel_single_shot	drivers/adc/adc-uclass.c	/^int adc_channel_single_shot(const char *name, int channel, unsigned int *data)$/;"	f	typeref:typename:int
adc_channel_test_data	test/dm/adc.c	/^struct adc_channel adc_channel_test_data[] = {$/;"	v	typeref:struct:adc_channel[]
adc_channels_data	drivers/adc/adc-uclass.c	/^int adc_channels_data(struct udevice *dev, unsigned int channel_mask,$/;"	f	typeref:typename:int
adc_channels_single_shot	drivers/adc/adc-uclass.c	/^int adc_channels_single_shot(const char *name, unsigned int channel_mask,$/;"	f	typeref:typename:int
adc_clk	arch/arm/dts/at91sam9260.dtsi	/^					adc_clk: adc_clk {$/;"	l
adc_clk	arch/arm/dts/at91sam9g45.dtsi	/^					adc_clk: adc_clk {$/;"	l
adc_clk	arch/arm/dts/sama5d2.dtsi	/^					adc_clk: adc_clk@40 {$/;"	l
adc_ctrl	include/twl6030.h	/^	u8 adc_ctrl;$/;"	m	struct:twl6030_data	typeref:typename:u8
adc_data_format	include/adc.h	/^enum adc_data_format {$/;"	g
adc_data_mask	drivers/adc/adc-uclass.c	/^int adc_data_mask(struct udevice *dev, unsigned int *data_mask)$/;"	f	typeref:typename:int
adc_enable	include/twl6030.h	/^	u8 adc_enable;$/;"	m	struct:twl6030_data	typeref:typename:u8
adc_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	adc_gfclk_mux: adc_gfclk_mux {$/;"	l
adc_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 adc_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
adc_op_clk	arch/arm/dts/at91sam9260.dtsi	/^		adc_op_clk: adc_op_clk{$/;"	l
adc_op_clk	arch/arm/dts/at91sam9g45.dtsi	/^		adc_op_clk: adc_op_clk{$/;"	l
adc_ops	include/adc.h	/^struct adc_ops {$/;"	s
adc_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	adc_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
adc_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	adc_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
adc_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	adc_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
adc_power_control	board/samsung/universal_c210/universal.c	/^static int adc_power_control(int on)$/;"	f	typeref:typename:int	file:
adc_pre_probe	drivers/adc/adc-uclass.c	/^static int adc_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
adc_rbase	include/twl6030.h	/^	u8 adc_rbase;$/;"	m	struct:twl6030_data	typeref:typename:u8
adc_start_channel	drivers/adc/adc-uclass.c	/^int adc_start_channel(struct udevice *dev, int channel)$/;"	f	typeref:typename:int
adc_start_channels	drivers/adc/adc-uclass.c	/^int adc_start_channels(struct udevice *dev, unsigned int channel_mask)$/;"	f	typeref:typename:int
adc_stop	drivers/adc/adc-uclass.c	/^int adc_stop(struct udevice *dev)$/;"	f	typeref:typename:int
adc_supply_enable	drivers/adc/adc-uclass.c	/^static int adc_supply_enable(struct udevice *dev)$/;"	f	typeref:typename:int	file:
adc_tsc_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	adc_tsc_fck: adc_tsc_fck {$/;"	l
adc_tsc_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	adc_tsc_fck: adc_tsc_fck {$/;"	l
adc_uclass_platdata	include/adc.h	/^struct adc_uclass_platdata {$/;"	s
adc_val	include/samsung/exynos5-dt-types.h	/^	int adc_val;$/;"	m	struct:odroid_rev_info	typeref:typename:int
adc_vdd_platdata_set	drivers/adc/adc-uclass.c	/^static int adc_vdd_platdata_set(struct udevice *dev)$/;"	f	typeref:typename:int	file:
adc_vdd_platdata_update	drivers/adc/adc-uclass.c	/^static int adc_vdd_platdata_update(struct udevice *dev)$/;"	f	typeref:typename:int	file:
adc_vdd_value	drivers/adc/adc-uclass.c	/^int adc_vdd_value(struct udevice *dev, int *uV)$/;"	f	typeref:typename:int
adc_vss_platdata_set	drivers/adc/adc-uclass.c	/^static int adc_vss_platdata_set(struct udevice *dev)$/;"	f	typeref:typename:int	file:
adc_vss_platdata_update	drivers/adc/adc-uclass.c	/^static int adc_vss_platdata_update(struct udevice *dev)$/;"	f	typeref:typename:int	file:
adc_vss_value	drivers/adc/adc-uclass.c	/^int adc_vss_value(struct udevice *dev, int *uV)$/;"	f	typeref:typename:int
adc_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 adc_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
adcclrint	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcclrint;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adcclrintpndnup	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcclrintpndnup;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adccon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adccon;$/;"	m	struct:s3c2400_adc	typeref:typename:u32
adccon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adccon;$/;"	m	struct:s3c2410_adc	typeref:typename:u32
adccon	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adccon;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adcdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adcdat;$/;"	m	struct:s3c2400_adc	typeref:typename:u32
adcdat0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adcdat0;$/;"	m	struct:s3c2410_adc	typeref:typename:u32
adcdat0	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcdat0;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adcdat1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adcdat1;$/;"	m	struct:s3c2410_adc	typeref:typename:u32
adcdat1	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcdat1;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adcdly	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adcdly;$/;"	m	struct:s3c2410_adc	typeref:typename:u32
adcdly	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcdly;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 adclk_ctrl;		\/* ADC Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
adclk_ctrl1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 adclk_ctrl1;	\/* ADC Clock Control1 Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
adcmux	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcmux;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adctsc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	adctsc;$/;"	m	struct:s3c2410_adc	typeref:typename:u32
adctsc	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adctsc;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
adctsr	arch/m68k/include/asm/immap_5441x.h	/^	u16 adctsr;		\/* 0x1C *\/$/;"	m	struct:ccm	typeref:typename:u16
adcupdn	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int adcupdn;$/;"	m	struct:s5p_adc	typeref:typename:unsigned int
add	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	unsigned long	add;	\/* gpio core base address	*\/$/;"	m	struct:__anon2654fafd0108	typeref:typename:unsigned long
add	include/ec_commands.h	/^		} add;$/;"	m	union:ec_params_keyscan_seq_ctrl::__anon71a6b267060a	typeref:struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670808
add	include/linux/mtd/mtd.h	/^	void (*add)(struct mtd_info *mtd);$/;"	m	struct:mtd_notifier	typeref:typename:void (*)(struct mtd_info * mtd)
add	tools/moveconfig.py	/^    def add(self, defconfig):$/;"	m	class:Slot
add	tools/moveconfig.py	/^    def add(self, defconfig):$/;"	m	class:Slots
addColumn	scripts/kconfig/qconf.h	/^	void addColumn(colIdx idx, const QString& label)$/;"	f	class:ConfigList	typeref:typename:void
addVal	board/esd/common/xilinx_jtag/lenval.c	/^void addVal( lenVal*    plvResVal,$/;"	f	typeref:typename:void
add_aeb	drivers/mtd/ubi/fastmap.c	/^static int add_aeb(struct ubi_attach_info *ai, struct list_head *list,$/;"	f	typeref:typename:int	file:
add_aliases	tools/fdtgrep.c	/^	int add_aliases;	\/* Add aliases node to output *\/$/;"	m	struct:display_info	typeref:typename:int	file:
add_args	arch/sandbox/cpu/os.c	/^static int add_args(char ***argvp, const char *add_args[], int count)$/;"	f	typeref:typename:int	file:
add_board_boot_modes	arch/arm/imx-common/cmd_bmode.c	/^void add_board_boot_modes(const struct boot_mode *p)$/;"	f	typeref:typename:void
add_bootstages_devicetree	common/bootstage.c	/^static int add_bootstages_devicetree(struct fdt_header *blob)$/;"	f	typeref:typename:int	file:
add_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 add_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
add_byte	scripts/kconfig/confdata.c	/^static int add_byte(int c, char **lineptr, size_t slen, size_t *n)$/;"	f	typeref:typename:int	file:
add_categories	scripts/get_maintainer.pl	/^sub add_categories {$/;"	s
add_content	tools/mkimage.c	/^static int add_content(int type, const char *fname)$/;"	f	typeref:typename:int	file:
add_corrupted	drivers/mtd/ubi/attach.c	/^static int add_corrupted(struct ubi_attach_info *ai, int pnum, int ec)$/;"	f	typeref:typename:int	file:
add_dataflash	drivers/mtd/spi/sf_dataflash.c	/^static int add_dataflash(struct udevice *dev, char *name, int nr_pages,$/;"	f	typeref:typename:int	file:
add_del_hash_entry	drivers/net/armada100_fec.c	/^static int add_del_hash_entry(struct armdfec_device *darmdfec, u32 mach,$/;"	f	typeref:typename:int	file:
add_dwmci	drivers/mmc/dw_mmc.c	/^int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)$/;"	f	typeref:typename:int
add_end_cmd	tools/pblimage.c	/^static void add_end_cmd(void)$/;"	f	typeref:typename:void	file:
add_entry_addr	lib/efi/efi_stub.c	/^static void add_entry_addr(struct efi_priv *priv, enum efi_entry_t type,$/;"	f	typeref:typename:void	file:
add_expr_deps	tools/buildman/kconfiglib.py	/^        def add_expr_deps(e, sym):$/;"	f	member:Config._build_dep	file:
add_fixed_resources	arch/x86/cpu/ivybridge/northbridge.c	/^static void add_fixed_resources(struct udevice *dev, int index)$/;"	f	typeref:typename:void	file:
add_flags	drivers/usb/host/xhci.h	/^	volatile __le32	add_flags;$/;"	m	struct:xhci_input_control_ctx	typeref:typename:volatile __le32
add_ftrace	lib/trace.c	/^static void __attribute__((no_instrument_function)) add_ftrace(void *func_ptr,$/;"	f	typeref:typename:void	file:
add_idx_dirt	fs/ubifs/tnc.c	/^static int add_idx_dirt(struct ubifs_info *c, int lnum, int dirt)$/;"	f	typeref:typename:int	file:
add_idx_minus_one	common/cli_readline.c	/^#define add_idx_minus_one(/;"	d	file:
add_ino	fs/ubifs/recovery.c	/^static int add_ino(struct ubifs_info *c, ino_t inum, loff_t i_size,$/;"	f	typeref:typename:int	file:
add_inode	fs/ubifs/debug.c	/^static struct fsck_inode *add_inode(struct ubifs_info *c,$/;"	f	typeref:struct:fsck_inode *	file:
add_ip_checksums	net/checksum.c	/^unsigned add_ip_checksums(unsigned offset, unsigned sum, unsigned new)$/;"	f	typeref:typename:unsigned
add_it	tools/rkmux.py	/^    def add_it(field):$/;"	f	function:process_file	file:
add_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 add_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
add_map	arch/arm/cpu/armv8/cache_v8.c	/^static void add_map(struct mm_region *map)$/;"	f	typeref:typename:void	file:
add_marker_len	drivers/mtd/nand/nand_bbt.c	/^static u32 add_marker_len(struct nand_bbt_descr *td)$/;"	f	typeref:typename:u32	file:
add_mtd_device	drivers/mtd/mtdcore.c	/^int add_mtd_device(struct mtd_info *mtd)$/;"	f	typeref:typename:int
add_mtd_partitions	drivers/mtd/mtdpart.c	/^int add_mtd_partitions(struct mtd_info *master,$/;"	f	typeref:typename:int
add_new_file	scripts/docproc.c	/^static struct symfile * add_new_file(char * filename)$/;"	f	typeref:struct:symfile *	file:
add_new_symbol	scripts/docproc.c	/^static void add_new_symbol(struct symfile *sym, char * symname)$/;"	f	typeref:typename:void	file:
add_node	fs/jffs2/jffs2_1pass.c	/^add_node(struct b_list *list)$/;"	f	typeref:struct:b_node *	file:
add_node	fs/jffs2/jffs2_nand_1pass.c	/^add_node(struct b_list *list, int size)$/;"	f	typeref:struct:b_node *	file:
add_node	fs/ubifs/log.c	/^static int add_node(struct ubifs_info *c, void *buf, int *lnum, int *offs,$/;"	f	typeref:typename:int	file:
add_pair_to_block	lib/bzip2/bzlib.c	/^void add_pair_to_block ( EState* s )$/;"	f	typeref:typename:void	file:
add_pnode_dirt	fs/ubifs/lpt.c	/^static void add_pnode_dirt(struct ubifs_info *c, struct ubifs_pnode *pnode)$/;"	f	typeref:typename:void	file:
add_pnode_dirt	fs/ubifs/lpt_commit.c	/^static void add_pnode_dirt(struct ubifs_info *c, struct ubifs_pnode *pnode)$/;"	f	typeref:typename:void	file:
add_record	common/iotrace.c	/^static void add_record(int flags, const void *ptr, ulong value)$/;"	f	typeref:typename:void	file:
add_replay_bud	fs/ubifs/replay.c	/^static int add_replay_bud(struct ubifs_info *c, int lnum, int offs, int jhead,$/;"	f	typeref:typename:int	file:
add_role	scripts/get_maintainer.pl	/^sub add_role {$/;"	s
add_round_key	lib/aes.c	/^static void add_round_key(u32 *state, u32 *key)$/;"	f	typeref:typename:void	file:
add_sdhci	drivers/mmc/sdhci.c	/^int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)$/;"	f	typeref:typename:int
add_size	fs/ubifs/debug.c	/^static int add_size(struct ubifs_info *c, struct ubifs_znode *znode, void *priv)$/;"	f	typeref:typename:int	file:
add_ssaaaa	arch/nios2/lib/longlong.h	/^#define add_ssaaaa(/;"	d
add_textbase	lib/trace.c	/^static void __attribute__((no_instrument_function)) add_textbase(void)$/;"	f	typeref:typename:void	file:
add_tlb_entry	arch/powerpc/cpu/ppc4xx/tlb.c	/^static int add_tlb_entry(u64 phys_addr,$/;"	f	typeref:typename:int	file:
add_to_list	drivers/mtd/ubi/attach.c	/^static int add_to_list(struct ubi_attach_info *ai, int pnum, int vol_id,$/;"	f	typeref:typename:int	file:
add_to_lpt_heap	fs/ubifs/lprops.c	/^static int add_to_lpt_heap(struct ubifs_info *c, struct ubifs_lprops *lprops,$/;"	f	typeref:typename:int	file:
add_vci	net/bootp.c	/^static u8 *add_vci(u8 *e)$/;"	f	typeref:typename:u8 *	file:
add_verify_data	include/image.h	/^	int (*add_verify_data)(struct image_sign_info *info, void *keydest);$/;"	m	struct:image_sig_algo	typeref:typename:int (*)(struct image_sign_info * info,void * keydest)
add_vol	drivers/mtd/ubi/fastmap.c	/^static struct ubi_ainf_volume *add_vol(struct ubi_attach_info *ai, int vol_id,$/;"	f	typeref:struct:ubi_ainf_volume *	file:
add_volume	drivers/mtd/ubi/attach.c	/^static struct ubi_ainf_volume *add_volume(struct ubi_attach_info *ai,$/;"	f	typeref:struct:ubi_ainf_volume *	file:
add_wait_queue	include/linux/compat.h	/^#define add_wait_queue(/;"	d
add_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 add_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
adda_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 adda_clk_cfg;	\/* 0x140 ADDA module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
adda_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 adda_clk_cfg;	\/* 0x140 ADDA module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
adddep	scripts/docproc.c	/^static void adddep(char * file)		   { printf("\\t%s", file); }$/;"	f	typeref:typename:void	file:
adddep2	scripts/docproc.c	/^static void adddep2(char * file, char * line)     { line = line; adddep(file); }$/;"	f	typeref:typename:void	file:
addend	lib/efi_loader/efi_runtime.c	/^	long addend;$/;"	m	struct:elf_rela	typeref:typename:long	file:
additional	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 additional;$/;"	m	struct:mx31_weim_cscr	typeref:typename:u32
additional	arch/arm/include/asm/arch-mx31/sys_proto.h	/^	u32 additional;$/;"	m	struct:mxc_weimcs	typeref:typename:u32
additional_len	drivers/usb/emul/sandbox_flash.c	/^	u8 additional_len;$/;"	m	struct:scsi_inquiry_resp	typeref:typename:u8	file:
additive_latency	include/common_timing_params.h	/^	unsigned int additive_latency;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
additive_latency_override	include/fsl_ddr_sdram.h	/^	unsigned int additive_latency_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
additive_latency_override_value	include/fsl_ddr_sdram.h	/^	unsigned int additive_latency_override_value;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
addr	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 addr;	\/* 0x10 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
addr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t addr;$/;"	m	struct:serial_i2c_request	typeref:typename:uint16_t
addr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t addr; \/* struct cpu_vhint_data * *\/$/;"	m	struct:mrq_cpu_vhint_request	typeref:typename:uint32_t
addr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t addr;$/;"	m	struct:mrq_query_tag_request	typeref:typename:uint32_t
addr	arch/arm/include/asm/arch/rsb.h	/^	u32 addr;	\/* 0x10 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
addr	arch/arm/include/asm/imx-common/video.h	/^	int	addr;$/;"	m	struct:display_info_t	typeref:typename:int
addr	arch/arm/include/asm/omap_common.h	/^	u32 addr;$/;"	m	struct:volts	typeref:typename:u32
addr	arch/avr32/include/asm/setup.h	/^	u32			addr;$/;"	m	struct:tag_mem_range	typeref:typename:u32
addr	arch/mips/mach-au1x00/au1x00_eth.c	/^	u32 addr;$/;"	m	struct:__anon03662d5e0108	typeref:typename:u32	file:
addr	arch/powerpc/cpu/mpc8260/i2c.c	/^	unsigned char *addr;$/;"	m	struct:I2C_BD	typeref:typename:unsigned char *	file:
addr	arch/powerpc/cpu/mpc8xx/i2c.c	/^	unsigned char *addr;$/;"	m	struct:I2C_BD	typeref:typename:unsigned char *	file:
addr	arch/powerpc/include/asm/arch-mpc85xx/gpio.h	/^	ulong addr;$/;"	m	struct:mpc85xx_gpio_plat	typeref:typename:ulong
addr	arch/powerpc/include/asm/fsl_law.h	/^	phys_addr_t addr;$/;"	m	struct:law_entry	typeref:typename:phys_addr_t
addr	arch/x86/include/asm/e820.h	/^	__u64 addr;	\/* start of memory segment *\/$/;"	m	struct:e820entry	typeref:typename:__u64
addr	arch/x86/include/asm/sfi.h	/^	u16	addr;$/;"	m	struct:sfi_device_table_entry	typeref:typename:u16
addr	board/LaCie/common/cpld-gpio-bus.h	/^	unsigned *addr;$/;"	m	struct:cpld_gpio_bus	typeref:typename:unsigned *
addr	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^	u8 addr;$/;"	m	struct:marvell_io_exp	typeref:typename:u8	file:
addr	board/bct-brettl2/smsc9303.c	/^	unsigned char addr;$/;"	m	struct:__anon648e74860208	typeref:typename:unsigned char	file:
addr	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	int addr;$/;"	m	struct:display_info_t	typeref:typename:int	file:
addr	board/esd/vme8349/caddy.h	/^	uint32_t addr;$/;"	m	struct:caddy_cmd	typeref:typename:uint32_t
addr	board/freescale/common/ngpixis.h	/^	u8 addr;$/;"	m	struct:ngpixis	typeref:typename:u8
addr	board/gdsys/mpc8308/hrcon.c	/^	u8 addr;$/;"	m	struct:__anonc2f835a20308	typeref:typename:u8	file:
addr	board/gdsys/mpc8308/strider.c	/^	u8 addr;$/;"	m	struct:__anonafccc0650308	typeref:typename:u8	file:
addr	board/motionpro/motionpro.c	/^	unsigned long addr;$/;"	m	struct:init_elem	typeref:typename:unsigned long	file:
addr	board/renesas/blanche/blanche.c	/^	u32	addr;	\/* register address *\/$/;"	m	struct:pin_db	typeref:typename:u32	file:
addr	board/solidrun/clearfog/clearfog.c	/^	u8 addr;$/;"	m	struct:marvell_io_exp	typeref:typename:u8	file:
addr	cmd/i2c.c	/^	uchar	addr;$/;"	m	struct:__anon1d2f36170108	typeref:typename:uchar	file:
addr	common/iotrace.c	/^	phys_addr_t addr;$/;"	m	struct:iotrace_record	typeref:typename:phys_addr_t	file:
addr	drivers/block/sata_sil.h	/^	__le64 addr;$/;"	m	struct:sil_sge	typeref:typename:__le64
addr	drivers/gpio/mpc85xx_gpio.c	/^	ulong addr;$/;"	m	struct:mpc85xx_gpio_data	typeref:typename:ulong	file:
addr	drivers/gpio/pca953x_gpio.c	/^	int addr;$/;"	m	struct:pca953x_info	typeref:typename:int	file:
addr	drivers/i2c/kona_i2c.c	/^	uint16_t addr;$/;"	m	struct:kona_i2c_msg	typeref:typename:uint16_t	file:
addr	drivers/i2c/muxes/pca954x.c	/^	u32 addr; \/* I2C mux address *\/$/;"	m	struct:pca954x_priv	typeref:typename:u32	file:
addr	drivers/mmc/sh_sdhi.c	/^	unsigned long addr;$/;"	m	struct:sh_sdhi_host	typeref:typename:unsigned long	file:
addr	drivers/mtd/nand/fsl_elbc_nand.c	/^	u8 __iomem *addr;        \/* Address of assigned FCM buffer        *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:u8 __iomem *	file:
addr	drivers/mtd/nand/fsl_ifc_nand.c	/^	void __iomem *addr;      \/* Address of assigned IFC buffer        *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:void __iomem *	file:
addr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 addr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
addr	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 addr;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
addr	drivers/mtd/nand/sunxi_nand.c	/^	u32 addr[2];$/;"	m	struct:sunxi_nand_chip	typeref:typename:u32[2]	file:
addr	drivers/mtd/pic32_flash.c	/^	struct pic32_reg_atomic addr;$/;"	m	struct:pic32_reg_nvm	typeref:struct:pic32_reg_atomic	file:
addr	drivers/net/at91_emac.c	/^	unsigned long addr, size;$/;"	m	struct:__anon5765bb0e0108	typeref:typename:unsigned long	file:
addr	drivers/net/ethoc.c	/^	u32 addr;$/;"	m	struct:ethoc_bd	typeref:typename:u32	file:
addr	drivers/net/greth.h	/^	unsigned int addr;	\/* Buffer address not changed by HW *\/$/;"	m	struct:_greth_bd	typeref:typename:unsigned int
addr	drivers/net/macb.c	/^	u32	addr;$/;"	m	struct:macb_dma_desc	typeref:typename:u32	file:
addr	drivers/net/sun8i_emac.c	/^	u32 addr;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
addr	drivers/net/zynq_gem.c	/^	u32 addr; \/* Next descriptor pointer *\/$/;"	m	struct:emac_bd	typeref:typename:u32	file:
addr	drivers/phy/marvell/comphy_a3700.c	/^	u16 addr;$/;"	m	struct:sgmii_phy_init_data_fix	typeref:typename:u16	file:
addr	drivers/spi/ich.h	/^	int addr;$/;"	m	struct:ich_spi_priv	typeref:typename:int
addr	drivers/usb/gadget/at91_udc.h	/^	u8				addr;$/;"	m	struct:at91_udc	typeref:typename:u8
addr	drivers/usb/gadget/atmel_usba_udc.h	/^	dma_addr_t addr;$/;"	m	struct:usba_dma_desc	typeref:typename:dma_addr_t
addr	drivers/usb/gadget/fotg210.c	/^	uint16_t                  addr;$/;"	m	struct:fotg210_chip	typeref:typename:uint16_t	file:
addr	drivers/video/fsl_diu_fb.c	/^	__le32 addr;$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
addr	fs/ubifs/ubifs.h	/^	void *addr;$/;"	m	struct:page	typeref:typename:void *
addr	include/ahci.h	/^	u32	addr;$/;"	m	struct:ahci_sg	typeref:typename:u32
addr	include/dataflash.h	/^	unsigned long addr;$/;"	m	struct:dataflash_addr	typeref:typename:unsigned long
addr	include/dwmmc.h	/^	u32 addr;$/;"	m	struct:dwmci_idmac	typeref:typename:u32
addr	include/ec_commands.h	/^	uint16_t addr; \/* 8-bit address (7-bit shifted << 1) *\/$/;"	m	struct:ec_params_i2c_read	typeref:typename:uint16_t
addr	include/ec_commands.h	/^	uint16_t addr; \/* 8-bit address (7-bit shifted << 1) *\/$/;"	m	struct:ec_params_i2c_write	typeref:typename:uint16_t
addr	include/efi.h	/^	u64 addr;$/;"	m	struct:efi_entry_hdr	typeref:typename:u64
addr	include/faraday/ftpci100.h	/^	unsigned int addr;$/;"	m	struct:pcibar	typeref:typename:unsigned int
addr	include/grlib/greth.h	/^	unsigned int addr;	\/* Buffer address not changed by HW *\/$/;"	m	struct:_greth_bd	typeref:typename:unsigned int
addr	include/i2c.h	/^	uint addr;$/;"	m	struct:i2c_msg	typeref:typename:uint
addr	include/linux/fb.h	/^	u8  *addr;		\/* pointer to memory			*\/$/;"	m	struct:fb_pixmap	typeref:typename:u8 *
addr	include/linux/mtd/mtd.h	/^	uint64_t addr;$/;"	m	struct:erase_info	typeref:typename:uint64_t
addr	include/phy.h	/^	int addr;$/;"	m	struct:phy_device	typeref:typename:int
addr	include/power/pmic.h	/^	unsigned char addr;$/;"	m	struct:p_i2c	typeref:typename:unsigned char
addr	include/qfw.h	/^	unsigned long addr;     \/* firmware file in-memory address *\/$/;"	m	struct:fw_file	typeref:typename:unsigned long
addr	include/vxworks.h	/^	u32 addr;	\/* last e820 table entry addr *\/$/;"	m	struct:e820info	typeref:typename:u32
addr	lib/efi/efi_stub.c	/^	uint64_t addr;$/;"	m	struct:desctab_info	typeref:typename:uint64_t	file:
addr	post/board/lwmon5/sysmon.c	/^	uint		addr;$/;"	m	struct:sysmon_table_s	typeref:typename:uint	file:
addr	tools/aisimage.h	/^	uint32_t addr;$/;"	m	struct:ais_cmd_jmpclose	typeref:typename:uint32_t
addr	tools/aisimage.h	/^	uint32_t addr;$/;"	m	struct:ais_cmd_load	typeref:typename:uint32_t
addr	tools/gdb/gdbsend.c	/^unsigned long addr = 0x10000UL;$/;"	v	typeref:typename:unsigned long
addr	tools/ifdtool.c	/^	unsigned int addr;$/;"	m	struct:input_file	typeref:typename:unsigned int	file:
addr	tools/imagetool.h	/^	unsigned int addr;$/;"	m	struct:image_tool_params	typeref:typename:unsigned int
addr	tools/imximage.h	/^	uint32_t addr; \/* Address to write to *\/$/;"	m	struct:__anon504a956c0108	typeref:typename:uint32_t
addr	tools/imximage.h	/^	uint32_t addr;$/;"	m	struct:__anon504a956c0708	typeref:typename:uint32_t
addr1	drivers/mtd/jedec_flash.c	/^	u32 addr1;$/;"	m	struct:unlock_addr	typeref:typename:u32	file:
addr2	drivers/mtd/jedec_flash.c	/^	u32 addr2;$/;"	m	struct:unlock_addr	typeref:typename:u32	file:
addr2info	common/flash.c	/^addr2info (ulong addr)$/;"	f	typeref:typename:flash_info_t *
addr_aligned	common/bouncebuf.c	/^static int addr_aligned(struct bounce_buffer *state)$/;"	f	typeref:typename:int	file:
addr_bfin_on_chip_mem	arch/blackfin/include/asm/blackfin_local.h	/^#  define addr_bfin_on_chip_mem(/;"	d
addr_bitfields	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t addr_bitfields;	\/* See P\/S PAACE_AF_* *\/$/;"	m	struct:paace	typeref:typename:uint32_t
addr_bytes	drivers/mtd/spi/sandbox.c	/^	uint addr_bytes, pad_addr_bytes;$/;"	m	struct:sandbox_spi_flash	typeref:typename:uint	file:
addr_capture	include/mpc5xxx.h	/^	volatile u32 addr_capture;	\/* XLB + 0x50 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
addr_cena	drivers/net/fsl-mc/dpio/qbman_sys.h	/^	void __iomem *addr_cena;$/;"	m	struct:qbman_swp_sys	typeref:typename:void __iomem *
addr_cinh	drivers/net/fsl-mc/dpio/qbman_sys.h	/^	void __iomem *addr_cinh;$/;"	m	struct:qbman_swp_sys	typeref:typename:void __iomem *
addr_ctl	drivers/power/regulator/act8846.c	/^static const u8 addr_ctl[] = {$/;"	v	typeref:typename:const u8[]	file:
addr_cycles	drivers/mtd/nand/arasan_nfc.c	/^	u8 addr_cycles;$/;"	m	struct:arasan_nand_command_format	typeref:typename:u8	file:
addr_cycles	drivers/mtd/nand/arasan_nfc.c	/^enum addr_cycles {$/;"	g	file:
addr_cycles	drivers/mtd/nand/sunxi_nand.c	/^	int addr_cycles;$/;"	m	struct:sunxi_nand_chip	typeref:typename:int	file:
addr_cycles	drivers/mtd/nand/sunxi_nand_spl.c	/^	int addr_cycles;$/;"	m	struct:nfc_config	typeref:typename:int	file:
addr_cycles	include/linux/mtd/nand.h	/^	u8 addr_cycles;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
addr_cycles	include/linux/mtd/nand.h	/^	u8 addr_cycles;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
addr_data	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 addr_data;			\/* 14: DVC_I2C_ADDR_DATA_REG *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
addr_data	tools/imximage.h	/^	dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];$/;"	m	struct:dcd_v2_cmd	typeref:typename:dcd_addr_data_t[]
addr_data	tools/imximage.h	/^	dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];$/;"	m	struct:__anon504a956c0308	typeref:typename:dcd_type_addr_data_t[]
addr_data3	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 addr_data3;			\/* 24: DVC_I2C_ADDR_DATA_REG_3 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
addr_dataflash	drivers/mtd/dataflash.c	/^int addr_dataflash (unsigned long addr)$/;"	f	typeref:typename:int
addr_flags	include/ec_commands.h	/^	uint16_t addr_flags;	\/* I2C slave address (7 or 10 bits) and flags *\/$/;"	m	struct:ec_params_i2c_passthru_msg	typeref:typename:uint16_t
addr_h_offset	arch/arm/include/asm/arch-tegra/dc.h	/^	uint addr_h_offset;		\/* _WINBUF_ADDR_H_OFFSET_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
addr_h_offset_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint addr_h_offset_ns;		\/* _WINBUF_ADDR_H_OFFSET_NS_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
addr_hash	include/fsl_ddr_sdram.h	/^	unsigned int addr_hash;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
addr_hi	include/ahci.h	/^	u32	addr_hi;$/;"	m	struct:ahci_sg	typeref:typename:u32
addr_hi	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 addr_hi;$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
addr_hi	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t addr_hi;$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
addr_hi	include/fsl_sec.h	/^	uint32_t addr_hi;	\/* Memory Address of start of buffer - hi *\/$/;"	m	struct:sg_entry	typeref:typename:uint32_t
addr_lo	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 addr_lo;$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
addr_lo	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t addr_lo;$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
addr_lo	include/fsl_sec.h	/^	uint32_t addr_lo;	\/* Memory Address - lo *\/$/;"	m	struct:sg_entry	typeref:typename:uint32_t
addr_mapping	include/ddr_spd.h	/^			uint8_t addr_mapping;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508	typeref:typename:uint8_t
addr_mapping	include/ddr_spd.h	/^			unsigned char addr_mapping;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0208	typeref:typename:unsigned char
addr_mask	drivers/net/pch_gbe.h	/^	u32 addr_mask;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
addr_match_1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 addr_match_1;		\/* 0x58 *\/$/;"	m	struct:pm	typeref:typename:u32
addr_match_2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 addr_match_2;		\/* 0x80 *\/$/;"	m	struct:pm	typeref:typename:u32
addr_mirroring	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 addr_mirroring;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
addr_probe	arch/powerpc/cpu/mpc5xxx/traps.c	/^int addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_probe	arch/powerpc/cpu/mpc8260/traps.c	/^int addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_probe	arch/powerpc/cpu/mpc83xx/traps.c	/^int addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_probe	arch/powerpc/cpu/mpc85xx/traps.c	/^int addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_probe	arch/powerpc/cpu/mpc86xx/traps.c	/^int addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_probe	arch/powerpc/cpu/mpc8xx/traps.c	/^int addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_probe	arch/powerpc/cpu/ppc4xx/traps.c	/^addr_probe(uint *addr)$/;"	f	typeref:typename:int
addr_reg	drivers/usb/host/isp116x.h	/^	u16 *addr_reg;$/;"	m	struct:isp116x	typeref:typename:u16 *
addr_reg	drivers/usb/musb-new/musb_host.h	/^	u8			addr_reg;	\/* device address register *\/$/;"	m	struct:musb_qh	typeref:typename:u8
addr_reg1	drivers/mtd/nand/tegra_nand.h	/^	u32	addr_reg1;	\/* offset 28h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
addr_reg2	drivers/mtd/nand/tegra_nand.h	/^	u32	addr_reg2;	\/* offset 2Ch *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
addr_spec	cmd/flash.c	/^addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)$/;"	f	typeref:typename:int	file:
addr_table_entry_t	drivers/net/armada100_fec.h	/^struct addr_table_entry_t {$/;"	s
addr_timeout	include/mpc5xxx.h	/^	volatile u32 addr_timeout;	\/* XLB + 0x58 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
addr_trans_enabled	arch/powerpc/cpu/mpc86xx/start.S	/^addr_trans_enabled:$/;"	l
addr_unlock1	include/flash.h	/^	ulong   addr_unlock1;		\/* unlock address 1 for AMD flash roms  *\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong
addr_unlock2	include/flash.h	/^	ulong   addr_unlock2;		\/* unlock address 2 for AMD flash roms  *\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong
addr_v_offset	arch/arm/include/asm/arch-tegra/dc.h	/^	uint addr_v_offset;		\/* _WINBUF_ADDR_V_OFFSET_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
addr_v_offset_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint addr_v_offset_ns;		\/* _WINBUF_ADDR_V_OFFSET_NS_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
addr_vol	drivers/power/regulator/act8846.c	/^static const u8 addr_vol[] = {$/;"	v	typeref:typename:const u8[]	file:
addr_win	drivers/ddr/marvell/a38x/xor.h	/^	struct addr_win addr_win;	\/* An address window *\/$/;"	m	struct:unit_win_info	typeref:struct:addr_win
addr_win	drivers/ddr/marvell/a38x/xor.h	/^struct addr_win {$/;"	s
address	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 address;	\/* I2C slave device address *\/$/;"	m	struct:i2c_trans_info	typeref:typename:u32
address	arch/arm/include/asm/imx-common/dma.h	/^		dma_addr_t	address;$/;"	m	union:mxs_dma_cmd::__anon172d065f040a	typeref:typename:dma_addr_t
address	arch/arm/include/asm/imx-common/dma.h	/^	dma_addr_t		address;$/;"	m	struct:mxs_dma_desc	typeref:typename:dma_addr_t
address	arch/arm/include/asm/processor.h	/^	u32			address;$/;"	m	struct:debug_entry	typeref:typename:u32
address	arch/arm/include/asm/processor.h	/^	unsigned long			address;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
address	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	u32 address;$/;"	m	struct:cpu_register	typeref:typename:u32	file:
address	arch/x86/cpu/interrupts.c	/^	unsigned long address;$/;"	m	struct:desc_ptr	typeref:typename:unsigned long	file:
address	drivers/i2c/i2c-cdns.c	/^	u32 address;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
address	drivers/i2c/zynq_i2c.c	/^	u32 address;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
address	drivers/mmc/rpmb.c	/^	unsigned short address;$/;"	m	struct:s_rpmb	typeref:typename:unsigned short	file:
address	drivers/usb/musb-new/musb_core.h	/^	u8			address;$/;"	m	struct:musb	typeref:typename:u8
address	include/ambapp.h	/^	unsigned int address;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:unsigned int
address	include/ambapp.h	/^	unsigned int address[4];$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned int[4]
address	include/atmel_hlcdc.h	/^	u32	address;$/;"	m	struct:lcd_dma_desc	typeref:typename:u32
address	include/fdt.h	/^	fdt64_t address;$/;"	m	struct:fdt_reserve_entry	typeref:typename:fdt64_t
address	include/qfw.h	/^	__be64 address;$/;"	m	struct:fw_cfg_dma_access	typeref:typename:__be64
address	include/stdio_dev.h	/^	void *address;			\/* Address of framebuffer		*\/$/;"	m	struct:__anon77b06a0f0108	typeref:typename:void *
address	include/usbdevice.h	/^	u8 address;		\/* current address (zero is default) *\/$/;"	m	struct:usb_device_instance	typeref:typename:u8
address	tools/mxsimage.h	/^		uint32_t	address;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960708	typeref:typename:uint32_t
address	tools/mxsimage.h	/^		uint32_t	address;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960808	typeref:typename:uint32_t
address	tools/mxsimage.h	/^		uint32_t	address;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960908	typeref:typename:uint32_t
address	tools/mxsimage.h	/^		uint32_t	address;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960a08	typeref:typename:uint32_t
address	tools/mxsimage.h	/^	uint32_t	address;$/;"	m	struct:sb_source_entry	typeref:typename:uint32_t
address	tools/zynqimage.c	/^	uint32_t address;$/;"	m	struct:zynq_reginit	typeref:typename:uint32_t	file:
address	tools/zynqmpimage.c	/^	uint32_t address;$/;"	m	struct:zynqmp_reginit	typeref:typename:uint32_t	file:
address0_high	drivers/net/dwc_eth_qos.c	/^	uint32_t address0_high;				\/* 0x300 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
address0_low	drivers/net/dwc_eth_qos.c	/^	uint32_t address0_low;				\/* 0x304 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
address_base	drivers/usb/gadget/mpc8xx_udc.c	/^static u32 address_base = STATE_NOT_READY;$/;"	v	typeref:typename:u32	file:
address_bits	drivers/net/e1000.h	/^	uint16_t address_bits;$/;"	m	struct:e1000_eeprom_info	typeref:typename:uint16_t
address_data	include/gdsys_fpga.h	/^	u16 address_data;$/;"	m	struct:ihs_mdio	typeref:typename:u16
address_map	lib/addr_map.c	/^} address_map[CONFIG_SYS_NUM_ADDR_MAP];$/;"	v	typeref:struct:__anon51f123940108[]
address_mode	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t address_mode;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
address_setup	tools/mxsboot.c	/^		uint8_t			address_setup;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
address_space	fs/ubifs/ubifs.h	/^struct address_space {$/;"	s
addresses	board/cobra5272/bdm/cobra5272_uboot.gdb	/^define addresses$/;"	d
addresses	common/fdt_support.c	/^	const char	*addresses;$/;"	m	struct:of_bus	typeref:typename:const char *	file:
addressfiltering	drivers/qe/uec.h	/^	u8   addressfiltering[64];\/* address filtering data structure *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8[64]
addressing	include/ddr_spd.h	/^	uint8_t addressing;		\/*  5 Addressing *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
addressing	include/ddr_spd.h	/^	unsigned char addressing;      \/*  5 SDRAM Addressing *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
addressing_table	arch/arm/cpu/armv7/omap-common/emif-common.c	/^const struct lpddr2_addressing addressing_table[] = {$/;"	v	typeref:typename:const struct lpddr2_addressing[]
addressing_table_index	arch/arm/cpu/armv7/omap-common/emif-common.c	/^s8 addressing_table_index(u8 type, u8 density, u8 width)$/;"	f	typeref:typename:s8
addrh	arch/x86/include/asm/acpi_table.h	/^	u32 addrh;	\/* Register address, high 32 bits *\/$/;"	m	struct:acpi_gen_regaddr	typeref:typename:u32
addrhigh	drivers/net/bcm-sf2-eth-gmac.c	/^	uint32_t	addrhigh;$/;"	m	struct:__anon2233d0570108	typeref:typename:uint32_t	file:
addrl	arch/x86/include/asm/acpi_table.h	/^	u32 addrl;	\/* Register address, low 32 bits *\/$/;"	m	struct:acpi_gen_regaddr	typeref:typename:u32
addrlen	drivers/mtd/mw_eeprom.c	/^static int addrlen;$/;"	v	typeref:typename:int	file:
addrlow	drivers/net/bcm-sf2-eth-gmac.c	/^	uint32_t	addrlow;$/;"	m	struct:__anon2233d0570108	typeref:typename:uint32_t	file:
addrmap	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 addrmap[7];	        \/* 0x200 address map register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[7]
addrmap	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 addrmap[7];	        \/* 0x200 address map register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[7]
addrmap_phys_to_virt	lib/addr_map.c	/^void *addrmap_phys_to_virt(phys_addr_t paddr)$/;"	f	typeref:typename:void *
addrmap_set_entry	lib/addr_map.c	/^void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr,$/;"	f	typeref:typename:void
addrmap_virt_to_phys	lib/addr_map.c	/^phys_addr_t addrmap_virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
addruart	arch/arm/include/debug/8250.S	/^		.macro	addruart, rp, rv, tmp$/;"	m
addruart_current	arch/arm/lib/debug.S	/^		.macro	addruart_current, rx, tmp1, tmp2$/;"	m
adfsdrives	arch/arm/include/asm/setup.h	/^	    unsigned char adfsdrives;		\/* 41 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned char
adfsdrives	arch/arm/include/asm/setup.h	/^	u8 adfsdrives;$/;"	m	struct:tag_acorn	typeref:typename:u8
adi_ether_buffer	drivers/net/bfin_mac.h	/^typedef struct adi_ether_buffer {$/;"	s
adi_ether_frame_buffer	drivers/net/bfin_mac.h	/^typedef struct adi_ether_frame_buffer {$/;"	s
adi_i2c_init	drivers/i2c/adi_i2c.c	/^static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
adi_i2c_msg	drivers/i2c/adi_i2c.c	/^struct adi_i2c_msg {$/;"	s	file:
adi_i2c_probe	drivers/i2c/adi_i2c.c	/^static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip)$/;"	f	typeref:typename:int	file:
adi_i2c_read	drivers/i2c/adi_i2c.c	/^static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
adi_i2c_setspeed	drivers/i2c/adi_i2c.c	/^static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed)$/;"	f	typeref:typename:uint	file:
adi_i2c_write	drivers/i2c/adi_i2c.c	/^static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
adidcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	adidcsr;	\/* Port Alt. Device ID CSR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
adidcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	adidcsr;	\/* 0xd0100 - Port 0 Alt. Device ID Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
adj_match_dir	scripts/kconfig/nconf.c	/^static void adj_match_dir(match_f *match_direction)$/;"	f	typeref:typename:void	file:
adjust_channel_params	drivers/usb/musb-new/musb_core.h	/^	int	(*adjust_channel_params)(struct dma_channel *channel,$/;"	m	struct:musb_platform_ops	typeref:typename:int (*)(struct dma_channel * channel,u16 packet_sz,u8 * mode,dma_addr_t * dma_addr,u32 * len)
adjust_core_voltage	board/kmc/kzm9g/kzm9g.c	/^void adjust_core_voltage(void)$/;"	f	typeref:typename:void
adjust_link	drivers/net/tsec.c	/^static void adjust_link(struct tsec_private *priv, struct phy_device *phydev)$/;"	f	typeref:typename:void	file:
adjust_link	drivers/qe/uec.c	/^static void adjust_link(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
adjust_lpt_heap	fs/ubifs/lprops.c	/^static void adjust_lpt_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap,$/;"	f	typeref:typename:void	file:
adjust_periph_pll	arch/arm/mach-tegra/clock.c	/^static int adjust_periph_pll(enum periph_id periph_id, int source,$/;"	f	typeref:typename:int	file:
adjust_sdram_tbs_8xx	arch/powerpc/cpu/mpc8xx/speed.c	/^int adjust_sdram_tbs_8xx (void)$/;"	f	typeref:typename:int
adjust_size_for_badblocks	cmd/nand.c	/^static void adjust_size_for_badblocks(loff_t *size, loff_t offset, int dev)$/;"	f	typeref:typename:void	file:
adjust_vdd	board/freescale/b4860qds/b4860qds.c	/^static int adjust_vdd(ulong vdd_override)$/;"	f	typeref:typename:int	file:
adjust_vdd	board/freescale/common/vid.c	/^int adjust_vdd(ulong vdd_override)$/;"	f	typeref:typename:int
adjust_vdd	board/freescale/t4qds/t4240qds.c	/^static int adjust_vdd(ulong vdd_override)$/;"	f	typeref:typename:int	file:
adler	include/u-boot/zlib.h	/^	uLong	adler;	\/* adler32 value of the uncompressed data *\/$/;"	m	struct:z_stream_s	typeref:typename:uLong
adler32	include/u-boot/zlib.h	/^#  define adler32 /;"	d
adler32	lib/zlib/adler32.c	/^uLong ZEXPORT adler32(uLong adler, const Bytef *buf, uInt len)$/;"	f	typeref:typename:uLong ZEXPORT
adll_calibration	drivers/ddr/marvell/a38x/ddr3_training.c	/^int adll_calibration(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
adll_shift_lock	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 adll_shift_lock[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
adll_shift_val	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 adll_shift_val[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
adma_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 adma_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
admaaddr	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned long	admaaddr;	\/* offset 58h-5Fh *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned long
admaerr	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	admaerr;	\/* offset 54h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
admaes	drivers/mmc/fsl_esdhc.c	/^	uint    admaes;		\/* ADMA error status register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
adp_cfg	include/linux/usb/dwc3.h	/^	u32 adp_cfg;$/;"	m	struct:dwc3	typeref:typename:u32
adp_cfg1	drivers/usb/host/ehci-mx6.c	/^	u32 adp_cfg1;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
adp_cfg2	drivers/usb/host/ehci-mx6.c	/^	u32 adp_cfg2;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
adp_ctl	include/linux/usb/dwc3.h	/^	u32 adp_ctl;$/;"	m	struct:dwc3	typeref:typename:u32
adp_evt	include/linux/usb/dwc3.h	/^	u32 adp_evt;$/;"	m	struct:dwc3	typeref:typename:u32
adp_evten	include/linux/usb/dwc3.h	/^	u32 adp_evten;$/;"	m	struct:dwc3	typeref:typename:u32
adp_status	drivers/usb/host/ehci-mx6.c	/^	u32 adp_status;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
adr	arch/m68k/include/asm/fsl_i2c.h	/^	u8 adr;		\/* I2C slave address *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
adr	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 adr;		\/* I2C slave address *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
adr	drivers/i2c/lpc32xx_i2c.c	/^	u32 adr;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
adr_cfg	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 adr_cfg;		\/* 0x10: EMC_ADR_CFG *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
adr_cfg1	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 adr_cfg1;		\/* 0x14: EMC_ADR_CFG_1 *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
adrcap	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 adrcap;		\/* 0x250 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
adrto	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 adrto;		\/* 0x258 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
adsaddr	drivers/mmc/fsl_esdhc.c	/^	uint    adsaddr;	\/* ADMA system address register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
adv	cmd/test.c	/^	int adv;$/;"	m	struct:__anone06382f90108	typeref:typename:int	file:
adv	include/fsl-mc/fsl_dpni.h	/^	} adv;$/;"	m	struct:dpni_cfg	typeref:struct:dpni_cfg::__anonf56ef98e0308
adv7511	arch/arm/dts/zynq-zc702.dts	/^			adv7511: hdmi-tx@39 {$/;"	l
adv7511	arch/arm/dts/zynq-zc706.dts	/^			adv7511: hdmi-tx@39 {$/;"	l
adv7611_i2c	board/gdsys/common/adv7611.c	/^int adv7611_i2c[] = CONFIG_SYS_ADV7611_I2C;$/;"	v	typeref:typename:int[]
adv7611_probe	board/gdsys/common/adv7611.c	/^int adv7611_probe(unsigned int screen)$/;"	f	typeref:typename:int
adv_learn	include/vsc9953.h	/^	u32	adv_learn;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
advertising	drivers/net/natsemi.c	/^static unsigned int advertising;$/;"	v	typeref:typename:unsigned int	file:
advertising	drivers/qe/uec_phy.h	/^	u32 advertising;$/;"	m	struct:uec_mii_info	typeref:typename:u32
advertising	include/linux/ethtool.h	/^	__u32	advertising;	\/* Features this interface advertises *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u32
advertising	include/phy.h	/^	u32 advertising;$/;"	m	struct:phy_device	typeref:typename:u32
advserest	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	advserest;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
aeadr	arch/powerpc/include/asm/immap_512x.h	/^	u32 aeadr;		\/* Arbiter Event Address Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
aeadr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 aeadr;		\/* Arbiter Event Address Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
aeatr	arch/powerpc/include/asm/immap_512x.h	/^	u32 aeatr;		\/* Arbiter Event Attributes Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
aeatr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 aeatr;		\/* Arbiter Event Attributes Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
aeb_slab_cache	drivers/mtd/ubi/ubi.h	/^	struct kmem_cache *aeb_slab_cache;$/;"	m	struct:ubi_attach_info	typeref:struct:kmem_cache *
aemif	arch/arm/dts/keystone.dtsi	/^		aemif: aemif@21000A00 {$/;"	l
aemif_config	arch/arm/include/asm/ti-common/ti-aemif.h	/^struct aemif_config {$/;"	s
aemif_configs	board/ti/ks2_evm/board.c	/^static struct aemif_config aemif_configs[] = {$/;"	v	typeref:struct:aemif_config[]	file:
aemif_configure	drivers/memory/ti-aemif.c	/^static void aemif_configure(int cs, struct aemif_config *cfg)$/;"	f	typeref:typename:void	file:
aemif_init	drivers/memory/ti-aemif.c	/^void aemif_init(int num_cs, struct aemif_config *config)$/;"	f	typeref:typename:void
aer	arch/powerpc/include/asm/immap_512x.h	/^	u32 aer;		\/* Arbiter Event Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
aer	arch/powerpc/include/asm/immap_83xx.h	/^	u32 aer;		\/* Arbiter Event Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
aerr	arch/powerpc/include/asm/immap_512x.h	/^	u32 aerr;		\/* Arbiter Event Response Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
aerr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 aerr;		\/* Arbiter Event Response Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
aes	arch/arm/dts/am33xx.dtsi	/^		aes: aes@53500000 {$/;"	l
aes	arch/arm/dts/am4372.dtsi	/^		aes: aes@53501000 {$/;"	l
aes0_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	aes0_fck: aes0_fck {$/;"	l
aes0_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	aes0_fck: aes0_fck {$/;"	l
aes_apply_cbc_chain_data	lib/aes.c	/^void aes_apply_cbc_chain_data(u8 *cbc_chain_data, u8 *src, u8 *dst)$/;"	f	typeref:typename:void
aes_cbc_decrypt_blocks	lib/aes.c	/^void aes_cbc_decrypt_blocks(u8 *key_exp, u8 *src, u8 *dst, u32 num_aes_blocks)$/;"	f	typeref:typename:void
aes_cbc_encrypt_blocks	lib/aes.c	/^void aes_cbc_encrypt_blocks(u8 *key_exp, u8 *src, u8 *dst, u32 num_aes_blocks)$/;"	f	typeref:typename:void
aes_clk	arch/arm/dts/sama5d2.dtsi	/^					aes_clk: aes_clk@9 {$/;"	l
aes_cnt	drivers/crypto/ace_sha.h	/^	unsigned int	aes_cnt[4];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[4]
aes_control	drivers/crypto/ace_sha.h	/^	unsigned int	aes_control;	\/* base + 0x200 *\/$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
aes_decrypt	lib/aes.c	/^void aes_decrypt(u8 *in, u8 *expkey, u8 *out)$/;"	f	typeref:typename:void
aes_encrypt	lib/aes.c	/^void aes_encrypt(u8 *in, u8 *expkey, u8 *out)$/;"	f	typeref:typename:void
aes_expand_key	lib/aes.c	/^void aes_expand_key(u8 *key, u8 *expkey)$/;"	f	typeref:typename:void
aes_flag	tools/env/fw_env.h	/^	int aes_flag; \/* Is AES encryption used? *\/$/;"	m	struct:env_opts	typeref:typename:int
aes_help_text	cmd/aes.c	/^static char aes_help_text[] =$/;"	v	typeref:typename:char[]	file:
aes_in	drivers/crypto/ace_sha.h	/^	unsigned int	aes_in[4];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[4]
aes_iv	drivers/crypto/ace_sha.h	/^	unsigned int	aes_iv[4];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[4]
aes_key	drivers/crypto/ace_sha.h	/^	unsigned int	aes_key[8];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[8]
aes_key	tools/env/fw_env.h	/^	uint8_t aes_key[AES_KEY_LENGTH];$/;"	m	struct:env_opts	typeref:typename:uint8_t[]
aes_out	drivers/crypto/ace_sha.h	/^	unsigned int	aes_out[4];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[4]
aes_status	drivers/crypto/ace_sha.h	/^	unsigned int	aes_status;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
aesb_clk	arch/arm/dts/sama5d2.dtsi	/^					aesb_clk: aesb_clk@10 {$/;"	l
aess_fclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	aess_fclk: aess_fclk {$/;"	l
aestdessha_clk	arch/arm/dts/at91sam9g45.dtsi	/^					aestdessha_clk: aestdessha_clk {$/;"	l
af	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_af	af;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_af
af	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_af	af;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_af
af	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_af	af;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_af
afc	drivers/spi/ich.h	/^	uint32_t afc;		\/* 0xc0 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
afi	drivers/pci/pci_tegra.c	/^	struct fdt_resource afi;$/;"	m	struct:tegra_pcie	typeref:struct:fdt_resource	file:
afi_pex2_ctrl	drivers/pci/pci_tegra.c	/^	unsigned long afi_pex2_ctrl;$/;"	m	struct:tegra_pcie_soc	typeref:typename:unsigned long	file:
afi_rate_ratio	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	afi_rate_ratio;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
afi_readl	drivers/pci/pci_tegra.c	/^static unsigned long afi_readl(struct tegra_pcie *pcie, unsigned long offset)$/;"	f	typeref:typename:unsigned long	file:
afi_rlat	drivers/ddr/altera/sequencer.h	/^	u32	afi_rlat;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
afi_wlat	drivers/ddr/altera/sequencer.h	/^	u32	afi_wlat;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
afi_writel	drivers/pci/pci_tegra.c	/^static void afi_writel(struct tegra_pcie *pcie, unsigned long value,$/;"	f	typeref:typename:void	file:
afp	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t afp;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
afr	drivers/gpio/stm32_gpio.c	/^	u32 afr[2];	\/* GPIO alternate function *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32[2]	file:
afs_image	cmd/armflash.c	/^struct afs_image {$/;"	s	file:
afs_images	cmd/armflash.c	/^static struct afs_image afs_images[MAX_IMAGES];$/;"	v	typeref:struct:afs_image[]	file:
afs_region	cmd/armflash.c	/^struct afs_region {$/;"	s	file:
after_calling_rom___pu_irom_hwcnfg_setup	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^after_calling_rom___pu_irom_hwcnfg_setup:$/;"	l
after_calling_rom___pu_irom_hwcnfg_setup	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^after_calling_rom___pu_irom_hwcnfg_setup:$/;"	l
ag7xxx_dma_clean_rx	drivers/net/ag7xxx.c	/^static void ag7xxx_dma_clean_rx(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ag7xxx_dma_clean_tx	drivers/net/ag7xxx.c	/^static void ag7xxx_dma_clean_tx(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ag7xxx_dma_desc	drivers/net/ag7xxx.c	/^struct ag7xxx_dma_desc {$/;"	s	file:
ag7xxx_eth_free_pkt	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_free_pkt(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
ag7xxx_eth_ids	drivers/net/ag7xxx.c	/^static const struct udevice_id ag7xxx_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ag7xxx_eth_ofdata_to_platdata	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_eth_ops	drivers/net/ag7xxx.c	/^static const struct eth_ops ag7xxx_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
ag7xxx_eth_probe	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_eth_recv	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
ag7xxx_eth_remove	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_eth_send	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ag7xxx_eth_start	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_eth_stop	drivers/net/ag7xxx.c	/^static void ag7xxx_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ag7xxx_eth_write_hwaddr	drivers/net/ag7xxx.c	/^static int ag7xxx_eth_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_get_phy_iface_offset	drivers/net/ag7xxx.c	/^static int ag7xxx_get_phy_iface_offset(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_hw_setup	drivers/net/ag7xxx.c	/^static void ag7xxx_hw_setup(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ag7xxx_mac_probe	drivers/net/ag7xxx.c	/^static int ag7xxx_mac_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_mdio_probe	drivers/net/ag7xxx.c	/^static int ag7xxx_mdio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_mdio_read	drivers/net/ag7xxx.c	/^static int ag7xxx_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
ag7xxx_mdio_rw	drivers/net/ag7xxx.c	/^static u16 ag7xxx_mdio_rw(struct mii_dev *bus, int addr, int reg, u32 val)$/;"	f	typeref:typename:u16	file:
ag7xxx_mdio_write	drivers/net/ag7xxx.c	/^static int ag7xxx_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
ag7xxx_mii_get_div	drivers/net/ag7xxx.c	/^static int ag7xxx_mii_get_div(void)$/;"	f	typeref:typename:int	file:
ag7xxx_mii_setup	drivers/net/ag7xxx.c	/^static int ag7xxx_mii_setup(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag7xxx_model	drivers/net/ag7xxx.c	/^enum ag7xxx_model {$/;"	g	file:
ag7xxx_switch_read	drivers/net/ag7xxx.c	/^static int ag7xxx_switch_read(struct mii_dev *bus, int addr, int reg, u16 *val)$/;"	f	typeref:typename:int	file:
ag7xxx_switch_reg_read	drivers/net/ag7xxx.c	/^static int ag7xxx_switch_reg_read(struct mii_dev *bus, int reg, u32 *val)$/;"	f	typeref:typename:int	file:
ag7xxx_switch_reg_write	drivers/net/ag7xxx.c	/^static int ag7xxx_switch_reg_write(struct mii_dev *bus, int reg, u32 val)$/;"	f	typeref:typename:int	file:
ag7xxx_switch_write	drivers/net/ag7xxx.c	/^static int ag7xxx_switch_write(struct mii_dev *bus, int addr, int reg, u16 val)$/;"	f	typeref:typename:int	file:
ag933x_phy_setup_common	drivers/net/ag7xxx.c	/^static int ag933x_phy_setup_common(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag933x_phy_setup_lan	drivers/net/ag7xxx.c	/^static int ag933x_phy_setup_lan(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag933x_phy_setup_reset_fin	drivers/net/ag7xxx.c	/^static int ag933x_phy_setup_reset_fin(struct udevice *dev, int port)$/;"	f	typeref:typename:int	file:
ag933x_phy_setup_reset_set	drivers/net/ag7xxx.c	/^static int ag933x_phy_setup_reset_set(struct udevice *dev, int port)$/;"	f	typeref:typename:int	file:
ag933x_phy_setup_wan	drivers/net/ag7xxx.c	/^static int ag933x_phy_setup_wan(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ag934x_phy_setup	drivers/net/ag7xxx.c	/^static int ag934x_phy_setup(struct udevice *dev)$/;"	f	typeref:typename:int	file:
age_cnt	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 age_cnt;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
age_cnt_limit	include/usb/ehci-ci.h	/^	u32	age_cnt_limit;	\/* 0x408 - Age Count Threshold *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
agen_ctrl	include/vsc9953.h	/^	u32	agen_ctrl;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
agent_handle	include/efi.h	/^	efi_handle_t agent_handle;$/;"	m	struct:efi_open_protocol_info_entry	typeref:typename:efi_handle_t
aggr_cfg	include/vsc9953.h	/^	u32	aggr_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
aggr_code_mode	drivers/net/vsc9953.c	/^enum aggr_code_mode {$/;"	g	file:
aggr_grp	include/ethsw.h	/^	int aggr_grp;$/;"	m	struct:ethsw_command_def	typeref:typename:int
aggr_tx_descs	drivers/net/mvpp2.c	/^	struct mvpp2_tx_desc *aggr_tx_descs;$/;"	m	struct:buffer_location	typeref:struct:mvpp2_tx_desc *	file:
aggr_txqs	drivers/net/mvpp2.c	/^	struct mvpp2_tx_queue *aggr_txqs;$/;"	m	struct:mvpp2	typeref:struct:mvpp2_tx_queue *	file:
agu_mode	board/micronas/vct/scc.h	/^		u32 agu_mode:1;		\/* AGU Mode			*\/$/;"	m	struct:scc_dma_cfg::__anon903167320208	typeref:typename:u32:1
ah	arch/arm/lib/ashldi3.S	/^#define ah /;"	d	file:
ah	arch/arm/lib/ashrdi3.S	/^#define ah /;"	d	file:
ah	arch/arm/lib/lshrdi3.S	/^#define ah /;"	d	file:
ah	drivers/bios_emulator/include/biosemu.h	/^	u8 ah, al;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
ah	drivers/bios_emulator/include/biosemu.h	/^	u8 ah;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
ahb	arch/arm/dts/sun4i-a10.dtsi	/^		ahb: ahb@01c20054 {$/;"	l
ahb	arch/arm/dts/sun5i.dtsi	/^		ahb: ahb@01c20054 {$/;"	l
ahb	arch/arm/dts/sun7i-a20.dtsi	/^		ahb: ahb@01c20054 {$/;"	l
ahb	arch/arm/dts/tegra114.dtsi	/^	ahb: ahb@6000c000 {$/;"	l
ahb	arch/arm/dts/tegra30.dtsi	/^	ahb: ahb@6000c000 {$/;"	l
ahb	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	} ahb[5];$/;"	m	struct:emc_regs	typeref:struct:emc_regs::emc_ahb_t[5]
ahb0	arch/arm/dts/sun6i-a31.dtsi	/^			ahb0: ahb0_clk {$/;"	l
ahb0	arch/arm/dts/sun8i-a23-a33.dtsi	/^			ahb0: ahb0_clk {$/;"	l
ahb0	arch/arm/dts/sun9i-a80.dtsi	/^		ahb0: clk@06000060 {$/;"	l
ahb0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb0_cfg;		\/* 0x60 ahb0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb0_cfg;		\/* 0x60 ahb0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb0_gates	arch/arm/dts/sun9i-a80.dtsi	/^		ahb0_gates: clk@06000580 {$/;"	l
ahb0_resets	arch/arm/dts/sun9i-a80.dtsi	/^		ahb0_resets: reset@060005a0 {$/;"	l
ahb1	arch/arm/dts/sun50i-a64.dtsi	/^		ahb1: ahb1_clk@1c20054 {$/;"	l
ahb1	arch/arm/dts/sun6i-a31.dtsi	/^		ahb1: ahb1@01c20054 {$/;"	l
ahb1	arch/arm/dts/sun8i-a23-a33.dtsi	/^		ahb1: ahb1_clk@01c20054 {$/;"	l
ahb1	arch/arm/dts/sun9i-a80.dtsi	/^		ahb1: clk@06000064 {$/;"	l
ahb1_apb1_div	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ahb1_apb1_div;	\/* 0x54 AHB1\/APB1 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb1_apb1_div	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb1_apb1_div;	\/* 0x54 AHB1\/APB1 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb1_apb1_div	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ahb1_apb1_div;	\/* 0x54 AHB1\/APB1 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb1_apb1_div	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb1_apb1_div;	\/* 0x54 AHB1\/APB1 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb1_cfg;		\/* 0x64 ahb1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb1_cfg;		\/* 0x64 ahb1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb1_gates	arch/arm/dts/sun6i-a31.dtsi	/^		ahb1_gates: clk@01c20060 {$/;"	l
ahb1_gates	arch/arm/dts/sun8i-a23.dtsi	/^		ahb1_gates: clk@01c20060 {$/;"	l
ahb1_gates	arch/arm/dts/sun8i-a33.dtsi	/^		ahb1_gates: clk@01c20060 {$/;"	l
ahb1_gates	arch/arm/dts/sun9i-a80.dtsi	/^		ahb1_gates: clk@06000584 {$/;"	l
ahb1_resets	arch/arm/dts/sun9i-a80.dtsi	/^		ahb1_resets: reset@060005a4 {$/;"	l
ahb1_rst	arch/arm/dts/sun6i-a31.dtsi	/^		ahb1_rst: reset@01c202c0 {$/;"	l
ahb1_rst	arch/arm/dts/sun8i-a23-a33.dtsi	/^		ahb1_rst: reset@01c202c0 {$/;"	l
ahb1enr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb1enr;	\/* RCC AHB1 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb1enr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb1enr;	\/* RCC AHB1 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb1lpenr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb1lpenr;	\/* RCC AHB1 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb1lpenr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb1lpenr;	\/* RCC AHB1 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb1rstr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb1rstr;	\/* RCC AHB1 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb1rstr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb1rstr;	\/* RCC AHB1 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb2	arch/arm/dts/sun50i-a64.dtsi	/^		ahb2: ahb2_clk@1c2005c {$/;"	l
ahb2	arch/arm/dts/sun9i-a80.dtsi	/^		ahb2: clk@06000068 {$/;"	l
ahb2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb2_cfg;		\/* 0x68 ahb2 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb2_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb2_cfg;		\/* 0x68 ahb2 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb2_div	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb2_div;		\/* 0x5c AHB2 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb2_div	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb2_div;		\/* 0x5c AHB2 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb2_gates	arch/arm/dts/sun9i-a80.dtsi	/^		ahb2_gates: clk@06000588 {$/;"	l
ahb2_resets	arch/arm/dts/sun9i-a80.dtsi	/^		ahb2_resets: reset@060005a8 {$/;"	l
ahb2enr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb2enr;	\/* RCC AHB2 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb2enr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb2enr;	\/* RCC AHB2 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb2lpenr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb2lpenr;	\/* RCC AHB2 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb2lpenr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb2lpenr;	\/* RCC AHB2 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb2rstr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb2rstr;	\/* RCC AHB2 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb2rstr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb2rstr;	\/* RCC AHB2 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb3enr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb3enr;	\/* RCC AHB3 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb3enr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb3enr;	\/* RCC AHB3 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb3lpenr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb3lpenr;	\/* RCC AHB3 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb3lpenr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb3lpenr;	\/* RCC AHB3 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb3rstr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 ahb3rstr;	\/* RCC AHB3 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb3rstr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 ahb3rstr;	\/* RCC AHB3 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahb_addr	drivers/mtd/onenand/samsung.c	/^	void __iomem	*ahb_addr;$/;"	m	struct:s3c_onenand	typeref:typename:void __iomem *	file:
ahb_arbitration_xbar_ctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 ahb_arbitration_xbar_ctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
ahb_bus_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 ahb_bus_ctr;	\/* 0x30 *\/$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
ahb_bus_index	arch/sparc/cpu/leon3/ambapp.c	/^	int			ahb_bus_index;$/;"	m	struct:ambapp_find_ahb_info	typeref:typename:int	file:
ahb_bus_index	arch/sparc/cpu/leon3/ambapp.c	/^	int			ahb_bus_index;$/;"	m	struct:ambapp_find_apb_info	typeref:typename:int	file:
ahb_bus_index	include/ambapp.h	/^	int ahb_bus_index;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:int
ahb_bus_index	include/ambapp.h	/^	int ahb_bus_index;$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:int
ahb_clk	drivers/mtd/nand/sunxi_nand.c	/^	struct clk *ahb_clk;$/;"	m	struct:sunxi_nfc	typeref:struct:clk *	file:
ahb_ctlr	arch/arm/include/asm/arch-tegra124/ahb.h	/^struct ahb_ctlr {$/;"	s
ahb_ctlr	arch/arm/include/asm/arch-tegra210/ahb.h	/^struct ahb_ctlr {$/;"	s
ahb_dma_bstaddr0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_bstaddr0;		\/* 0x360c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_bstaddr1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_bstaddr1;		\/* 0x360d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_bstaddr2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_bstaddr2;		\/* 0x360e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_bstaddr3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_bstaddr3;		\/* 0x360f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_buffint	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_buffint;		\/* 0x3618 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_buffmask	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_buffmask;		\/* 0x3619 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_buffpol	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_buffpol;		\/* 0x361a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_buffstat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_buffstat;		\/* 0x3617 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_conf0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_conf0;		\/* 0x3600 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_conf1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_conf1;		\/* 0x3616 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_int;			\/* 0x3613 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_mask	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_mask;		\/* 0x3614 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_mblength0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_mblength0;		\/* 0x3610 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_mblength1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_mblength1;		\/* 0x3611 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_pol	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_pol;			\/* 0x3615 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_regs	drivers/block/sata_dwc.c	/^struct ahb_dma_regs {$/;"	s	file:
ahb_dma_start	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_start;		\/* 0x3601 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_stat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_stat;		\/* 0x3612 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_stop	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_stop;		\/* 0x3602 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_stpaddr0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_stpaddr0;		\/* 0x3608 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_stpaddr1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_stpaddr1;		\/* 0x3609 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_stpaddr2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_stpaddr2;		\/* 0x360a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_stpaddr3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_stpaddr3;		\/* 0x360b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_straddr0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_straddr0;		\/* 0x3604 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_straddr1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_straddr1;		\/* 0x3605 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_straddr2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_straddr2;		\/* 0x3606 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_straddr3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_straddr3;		\/* 0x3607 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_dma_thrsld	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ahb_dma_thrsld;		\/* 0x3603 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ahb_freq	arch/mips/mach-ath79/ar934x/clk.c	/^	u16				ahb_freq;$/;"	m	struct:ar934x_clock_config	typeref:typename:u16	file:
ahb_gate0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ahb_gate0;		\/* 0x60 ahb module clock gating 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ahb_gate0;		\/* 0x60 ahb module clock gating 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb_gate0;		\/* 0x60 ahb module clock gating 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb_gate0;		\/* 0x580 AHB0 Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ahb_gate0;		\/* 0x60 ahb module clock gating 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ahb_gate0;		\/* 0x60 ahb module clock gating 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb_gate0;		\/* 0x60 ahb module clock gating 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate0	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb_gate0;		\/* 0x580 AHB0 Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ahb_gate1;		\/* 0x64 ahb module clock gating 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ahb_gate1;		\/* 0x64 ahb module clock gating 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb_gate1;		\/* 0x64 ahb module clock gating 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb_gate1;		\/* 0x584 AHB1 Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ahb_gate1;		\/* 0x64 ahb module clock gating 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ahb_gate1;		\/* 0x64 ahb module clock gating 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb_gate1;		\/* 0x64 ahb module clock gating 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate1	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb_gate1;		\/* 0x584 AHB1 Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate2	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb_gate2;		\/* 0x588 AHB2 Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate2	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb_gate2;		\/* 0x588 AHB2 Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_gate_mask	drivers/usb/host/ehci-sunxi.c	/^	int ahb_gate_mask; \/* Mask of ahb_gate0 clk gate bits for this hcd *\/$/;"	m	struct:ehci_sunxi_priv	typeref:typename:int	file:
ahb_gate_mask	drivers/usb/host/ohci-sunxi.c	/^	int ahb_gate_mask; \/* Mask of ahb_gate0 clk gate bits for this hcd *\/$/;"	m	struct:ohci_sunxi_priv	typeref:typename:int	file:
ahb_gates	arch/arm/dts/sun4i-a10.dtsi	/^		ahb_gates: clk@01c20060 {$/;"	l
ahb_gates	arch/arm/dts/sun5i-a10s.dtsi	/^		ahb_gates: clk@01c20060 {$/;"	l
ahb_gates	arch/arm/dts/sun5i-a13.dtsi	/^		ahb_gates: clk@01c20060 {$/;"	l
ahb_gates	arch/arm/dts/sun7i-a20.dtsi	/^		ahb_gates: clk@01c20060 {$/;"	l
ahb_mbar_no	arch/sparc/cpu/leon3/memcfg.h	/^	int ahb_mbar_no;		\/* MBAR to get register address from *\/$/;"	m	struct:ahbmctrl_setup	typeref:typename:int
ahb_mbus_cause_irq	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 ahb_mbus_cause_irq; \/* 0x20110 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
ahb_mbus_cause_irq	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 ahb_mbus_cause_irq; \/* 0x20110 *\/$/;"	m	struct:orion5x_cpu_registers	typeref:typename:u32
ahb_mbus_mask_irq	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 ahb_mbus_mask_irq; \/* 0x20114 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
ahb_mbus_mask_irq	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 ahb_mbus_mask_irq; \/* 0x20114 *\/$/;"	m	struct:orion5x_cpu_registers	typeref:typename:u32
ahb_mem_prefetch_cfg1	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahb_mem_prefetch_cfg1;	\/* _AHB_MEM_PREFETCH_CFG1_0,	f0h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg1	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahb_mem_prefetch_cfg1;	\/* _AHB_MEM_PREFETCH_CFG1_0,	f0h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg2	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahb_mem_prefetch_cfg2;	\/* _AHB_MEM_PREFETCH_CFG2_0,	f4h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg2	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahb_mem_prefetch_cfg2;	\/* _AHB_MEM_PREFETCH_CFG2_0,	f4h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg3	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahb_mem_prefetch_cfg3;	\/* _AHB_MEM_PREFETCH_CFG3_0,	e4h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg3	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahb_mem_prefetch_cfg3;	\/* _AHB_MEM_PREFETCH_CFG3_0,	e4h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg4	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahb_mem_prefetch_cfg4;	\/* _AHB_MEM_PREFETCH_CFG3_0,	e8h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg4	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahb_mem_prefetch_cfg4;	\/* _AHB_MEM_PREFETCH_CFG3_0,	e8h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg_x	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahb_mem_prefetch_cfg_x;	\/* _AHB_MEM_PREFETCH_CFG_X_0,	dch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_mem_prefetch_cfg_x	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahb_mem_prefetch_cfg_x;	\/* _AHB_MEM_PREFETCH_CFG_X_0,	dch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_pciconf	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^struct ahb_pciconf {$/;"	s
ahb_psc	arch/arm/mach-stm32/stm32f1/clock.c	/^	u8	ahb_psc;$/;"	m	struct:psc	typeref:typename:u8	file:
ahb_psc	arch/arm/mach-stm32/stm32f4/clock.c	/^	u8	ahb_psc;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
ahb_psc	arch/arm/mach-stm32/stm32f7/clock.c	/^	u8	ahb_psc;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
ahb_reset0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ahb_reset0_cfg;	\/* 0x2c0 AHB1 Reset 0 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb_reset0_cfg;	\/* 0x2c0 AHB1 Reset 0 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb_reset0_cfg;	\/* 0x5a0 AHB0 Software Reset Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset0_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ahb_reset0_cfg;	\/* 0x2c0 AHB1 Reset 0 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset0_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb_reset0_cfg;	\/* 0x2c0 AHB1 Reset 0 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb_reset0_cfg;	\/* 0x5a0 AHB0 Software Reset Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ahb_reset1_cfg;	\/* 0x2c4 AHB1 Reset 1 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb_reset1_cfg;	\/* 0x2c4 AHB1 Reset 1 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb_reset1_cfg;	\/* 0x5a4 AHB1 Software Reset Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset1_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ahb_reset1_cfg;	\/* 0x2c4 AHB1 Reset 1 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset1_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb_reset1_cfg;	\/* 0x2c4 AHB1 Reset 1 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb_reset1_cfg;	\/* 0x5a4 AHB1 Software Reset Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ahb_reset2_cfg;	\/* 0x2c8 AHB1 Reset 2 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb_reset2_cfg;	\/* 0x2c8 AHB1 Reset 2 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ahb_reset2_cfg;	\/* 0x5a8 AHB2 Software Reset Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset2_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ahb_reset2_cfg;	\/* 0x2c8 AHB1 Reset 2 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset2_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb_reset2_cfg;	\/* 0x2c8 AHB1 Reset 2 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset2_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ahb_reset2_cfg;	\/* 0x5a8 AHB2 Software Reset Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset3_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ahb_reset3_cfg;	\/* 0x2d0 AHB1 Reset 3 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_reset3_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ahb_reset3_cfg;	\/* 0x2d0 AHB1 Reset 3 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ahb_rst	arch/arm/dts/sun50i-a64.dtsi	/^		ahb_rst: reset@1c202c0 {$/;"	l
ahb_wrq_empty	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahb_wrq_empty;		\/* _AHB_WRQ_EMPTY_0,		c4h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahb_wrq_empty	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahb_wrq_empty;		\/* _AHB_WRQ_EMPTY_0,		c4h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahbbase	drivers/spi/cadence_qspi.h	/^	void		*ahbbase;$/;"	m	struct:cadence_spi_platdata	typeref:typename:void *
ahbbase	drivers/spi/cadence_qspi.h	/^	void		*ahbbase;$/;"	m	struct:cadence_spi_priv	typeref:typename:void *
ahbcom_pci_bridge	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^struct ahbcom_pci_bridge {$/;"	s
ahbconf_pci_bridge	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^struct ahbconf_pci_bridge {$/;"	s
ahbenr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 ahbenr;	\/* RCC AHB peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
ahbmctrl_setup	arch/sparc/cpu/leon3/memcfg.h	/^struct ahbmctrl_setup {$/;"	s
ahbpci_dct_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 ahbpci_dct_ctr;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
ahbpci_win1_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 ahbpci_win1_ctr;	\/* 0x10 *\/$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
ahbpci_win2_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 ahbpci_win2_ctr;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
ahbs	arch/arm/dts/sun9i-a80.dtsi	/^		ahbs: ahbs_clk {$/;"	l
ahbslvmem_status	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 ahbslvmem_status;		\/* _AHBSLVMEM_STATUS_0, f8h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahbslvmem_status	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 ahbslvmem_status;		\/* _AHBSLVMEM_STATUS_0, f8h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
ahbtr	drivers/block/ftide020.h	/^	unsigned int	ahbtr;		\/* 0x20 - AHB Timeout Reg	*\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
ahci	arch/arm/dts/sun4i-a10.dtsi	/^		ahci: sata@01c18000 {$/;"	l
ahci	arch/arm/dts/sun7i-a20.dtsi	/^		ahci: sata@01c18000 {$/;"	l
ahci_cmd_hdr	include/ahci.h	/^struct ahci_cmd_hdr {$/;"	s
ahci_dcache_flush_range	drivers/block/ahci.c	/^static void ahci_dcache_flush_range(unsigned long begin, unsigned long len)$/;"	f	typeref:typename:void	file:
ahci_dcache_flush_sata_cmd	drivers/block/ahci.c	/^static void ahci_dcache_flush_sata_cmd(struct ahci_ioports *pp)$/;"	f	typeref:typename:void	file:
ahci_dcache_invalidate_range	drivers/block/ahci.c	/^static void ahci_dcache_invalidate_range(unsigned long begin, unsigned long len)$/;"	f	typeref:typename:void	file:
ahci_device_data_io	drivers/block/ahci.c	/^static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf,$/;"	f	typeref:typename:int	file:
ahci_exec_ata_cmd	drivers/block/dwc_ahsata.c	/^static int ahci_exec_ata_cmd(struct ahci_probe_ent *probe_ent,$/;"	f	typeref:typename:int	file:
ahci_fill_cmd_slot	drivers/block/ahci.c	/^static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)$/;"	f	typeref:typename:void	file:
ahci_fill_cmd_slot	drivers/block/dwc_ahsata.c	/^static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 cmd_slot, u32 opts)$/;"	f	typeref:typename:void	file:
ahci_fill_sg	drivers/block/ahci.c	/^static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)$/;"	f	typeref:typename:int	file:
ahci_fill_sg	drivers/block/dwc_ahsata.c	/^static int ahci_fill_sg(struct ahci_probe_ent *probe_ent,$/;"	f	typeref:typename:int	file:
ahci_host_init	drivers/block/ahci.c	/^static int ahci_host_init(struct ahci_probe_ent *probe_ent)$/;"	f	typeref:typename:int	file:
ahci_host_init	drivers/block/dwc_ahsata.c	/^static int ahci_host_init(struct ahci_probe_ent *probe_ent)$/;"	f	typeref:typename:int	file:
ahci_init	drivers/block/ahci.c	/^int ahci_init(void __iomem *base)$/;"	f	typeref:typename:int
ahci_init_one	drivers/block/ahci.c	/^static int ahci_init_one(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ahci_init_one	drivers/block/dwc_ahsata.c	/^static int ahci_init_one(int pdev)$/;"	f	typeref:typename:int	file:
ahci_ioports	include/ahci.h	/^struct ahci_ioports {$/;"	s
ahci_link_up	board/highbank/ahci.c	/^int ahci_link_up(struct ahci_probe_ent *probe_ent, int port)$/;"	f	typeref:typename:int
ahci_link_up	drivers/block/ahci.c	/^int __weak ahci_link_up(struct ahci_probe_ent *probe_ent, u8 port)$/;"	f	typeref:typename:int __weak
ahci_mvebu_mbus_config	arch/arm/mach-mvebu/cpu.c	/^static void ahci_mvebu_mbus_config(void __iomem *base)$/;"	f	typeref:typename:void	file:
ahci_mvebu_regret_option	arch/arm/mach-mvebu/cpu.c	/^static void ahci_mvebu_regret_option(void __iomem *base)$/;"	f	typeref:typename:void	file:
ahci_port_base	arch/arm/mach-mvebu/sata.c	/^void __iomem *ahci_port_base(void __iomem *base, u32 port)$/;"	f	typeref:typename:void __iomem *
ahci_port_base	drivers/block/ahci.c	/^__weak void __iomem *ahci_port_base(void __iomem *base, u32 port)$/;"	f	typeref:typename:__weak void __iomem *
ahci_port_base	drivers/block/dwc_ahsata.c	/^static inline void __iomem *ahci_port_base(void __iomem *base, u32 port)$/;"	f	typeref:typename:void __iomem *	file:
ahci_port_start	drivers/block/ahci.c	/^static int ahci_port_start(u8 port)$/;"	f	typeref:typename:int	file:
ahci_port_start	drivers/block/dwc_ahsata.c	/^static int ahci_port_start(struct ahci_probe_ent *probe_ent,$/;"	f	typeref:typename:int	file:
ahci_print_info	drivers/block/ahci.c	/^static void ahci_print_info(struct ahci_probe_ent *probe_ent)$/;"	f	typeref:typename:void	file:
ahci_print_info	drivers/block/dwc_ahsata.c	/^static void ahci_print_info(struct ahci_probe_ent *probe_ent)$/;"	f	typeref:typename:void	file:
ahci_probe_ent	include/ahci.h	/^struct ahci_probe_ent {$/;"	s
ahci_pwr_pin_a	arch/arm/dts/sunxi-common-regulators.dtsi	/^	ahci_pwr_pin_a: ahci_pwr_pin@0 {$/;"	l
ahci_pwr_pin_a20_hummingbird	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin@0 {$/;"	l
ahci_pwr_pin_cubietruck	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {$/;"	l
ahci_pwr_pin_olimex_som_evb	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {$/;"	l
ahci_pwr_pin_olinuxinolime	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {$/;"	l
ahci_pwr_pin_olinuxinolime	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {$/;"	l
ahci_pwr_pin_olinuxinolime	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {$/;"	l
ahci_pwr_pin_pcduino3_nano	arch/arm/dts/sun7i-a20-pcduino3-nano.dts	/^	ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 {$/;"	l
ahci_reset	drivers/block/ahci.c	/^int ahci_reset(void __iomem *base)$/;"	f	typeref:typename:int
ahci_set_feature	drivers/block/dwc_ahsata.c	/^static void ahci_set_feature(u8 dev, u8 port)$/;"	f	typeref:typename:void	file:
ahci_setup_oobr	drivers/block/dwc_ahsata.c	/^static int ahci_setup_oobr(struct ahci_probe_ent *probe_ent,$/;"	f	typeref:typename:int	file:
ahci_setup_port	drivers/block/ahci.c	/^static void ahci_setup_port(struct ahci_ioports *port, void __iomem *base,$/;"	f	typeref:typename:void	file:
ahci_sg	include/ahci.h	/^struct ahci_sg {$/;"	s
aib	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 aib;	\/*0x03c*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
aic	arch/arm/dts/at91sam9260.dtsi	/^			aic: interrupt-controller@fffff000 {$/;"	l
aic	arch/arm/dts/at91sam9261.dtsi	/^			aic: interrupt-controller@fffff000 {$/;"	l
aic	arch/arm/dts/at91sam9263.dtsi	/^			aic: interrupt-controller@fffff000 {$/;"	l
aic	arch/arm/dts/at91sam9g45.dtsi	/^			aic: interrupt-controller@fffff000 {$/;"	l
aicar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	aicar;	\/* Assembly Information CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
aicar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	aicar;		\/* 0xc000c - Assembly Information Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
aicredir	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 aicredir;	\/* 0x54 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
aidcar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	aidcar;	\/* Assembly Identity CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
aidcar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	aidcar;		\/* 0xc0008 - Assembly Identity Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
aidr	arch/powerpc/include/asm/immap_512x.h	/^	u32 aidr;		\/* Arbiter Interrupt Definition Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
aidr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 aidr;		\/* Arbiter Interrupt Definition Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
aieee1	arch/sparc/include/asm/prom.h	/^	void *aieee1;		\/* XXX *\/$/;"	m	struct:linux_arguments_v0	typeref:typename:void *
aier	drivers/rtc/mpc5xxx.c	/^	volatile ulong	aier;	\/* MBAR+0x80C: alarm and interrupt enable register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
aifclk	drivers/sound/wm8994.c	/^	int aifclk[WM8994_MAX_AIF];	\/* audio interface clock in Hz   *\/$/;"	m	struct:wm8994_priv	typeref:typename:int[]	file:
aimdr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	aimdr;		\/* 0xB4 Additional INT Modes Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
aimer	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	aimer;		\/* 0xB0 Additional INT Modes Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
aimmr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	aimmr;		\/* 0xB8 Additional INT Modes Mask Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ain0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain0;$/;"	m	struct:pad_signals	typeref:typename:int
ain1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain1;$/;"	m	struct:pad_signals	typeref:typename:int
ain2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain2;$/;"	m	struct:pad_signals	typeref:typename:int
ain3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain3;$/;"	m	struct:pad_signals	typeref:typename:int
ain4	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain4;$/;"	m	struct:pad_signals	typeref:typename:int
ain5	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain5;$/;"	m	struct:pad_signals	typeref:typename:int
ain6	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain6;$/;"	m	struct:pad_signals	typeref:typename:int
ain7	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ain7;$/;"	m	struct:pad_signals	typeref:typename:int
ainx_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux ainx_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
aipi_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct aipi_regs {$/;"	s
aips0	arch/arm/dts/vf.dtsi	/^		aips0: aips-bus@40000000 {$/;"	l
aips1	arch/arm/dts/imx6dl.dtsi	/^		aips1: aips-bus@02000000 {$/;"	l
aips1	arch/arm/dts/imx6ull.dtsi	/^		aips1: aips-bus@02000000 {$/;"	l
aips1	arch/arm/dts/imx7.dtsi	/^		aips1: aips-bus@30000000 {$/;"	l
aips1	arch/arm/dts/vf.dtsi	/^		aips1: aips-bus@40080000 {$/;"	l
aips2	arch/arm/dts/imx6dl.dtsi	/^		aips2: aips-bus@02100000 {$/;"	l
aips2	arch/arm/dts/imx6ull.dtsi	/^		aips2: aips-bus@02100000 {$/;"	l
aips3	arch/arm/dts/imx6ull.dtsi	/^		aips3: aips-bus@02200000 {$/;"	l
aips3	arch/arm/dts/imx7.dtsi	/^		aips3: aips-bus@30800000 {$/;"	l
aips_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct aips_regs {$/;"	s
aips_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct aips_regs {$/;"	s
aipstz_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct aipstz_regs {$/;"	s
aipstz_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct aipstz_regs {$/;"	s
aircr	arch/arm/include/asm/armv7m.h	/^	uint32_t aircr;		\/* App Interrupt and Reset Control Register *\/$/;"	m	struct:v7m_scb	typeref:typename:uint32_t
ais_alloc_buffer	tools/aisimage.c	/^static uint32_t *ais_alloc_buffer(struct image_tool_params *params)$/;"	f	typeref:typename:uint32_t *	file:
ais_cmd_func	tools/aisimage.h	/^struct ais_cmd_func {$/;"	s
ais_cmd_jmpclose	tools/aisimage.h	/^struct ais_cmd_jmpclose {$/;"	s
ais_cmd_load	tools/aisimage.h	/^struct ais_cmd_load {$/;"	s
ais_copy_image	tools/aisimage.c	/^static uint32_t *ais_copy_image(struct image_tool_params *params,$/;"	f	typeref:typename:uint32_t *	file:
ais_file_cmd	tools/aisimage.h	/^enum ais_file_cmd {$/;"	g
ais_func_exec	tools/aisimage.c	/^static struct ais_func_exec {$/;"	s	file:
ais_func_table	tools/aisimage.c	/^} ais_func_table[] = {$/;"	v	typeref:struct:ais_func_exec[]
ais_header	tools/aisimage.h	/^struct ais_header {$/;"	s
ais_img_size	tools/aisimage.c	/^static uint32_t ais_img_size;$/;"	v	typeref:typename:uint32_t	file:
ais_insert_cmd_header	tools/aisimage.c	/^static uint32_t *ais_insert_cmd_header(uint32_t cmd, uint32_t nargs,$/;"	f	typeref:typename:uint32_t *	file:
aisimage_check_image_types	tools/aisimage.c	/^static int aisimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
aisimage_check_params	tools/aisimage.c	/^int aisimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
aisimage_cmds	tools/aisimage.c	/^static table_entry_t aisimage_cmds[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
aisimage_fld_types	tools/aisimage.h	/^enum aisimage_fld_types {$/;"	g
aisimage_generate	tools/aisimage.c	/^static int aisimage_generate(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
aisimage_print_header	tools/aisimage.c	/^static void aisimage_print_header(const void *hdr)$/;"	f	typeref:typename:void	file:
aisimage_set_header	tools/aisimage.c	/^static void aisimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
aisimage_verify_header	tools/aisimage.c	/^static int aisimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
ak8963	arch/arm/dts/rk3288-popmetal.dtsi	/^	ak8963: ak8963@0d {$/;"	l
al	arch/arm/lib/ashldi3.S	/^#define al /;"	d	file:
al	arch/arm/lib/ashrdi3.S	/^#define al /;"	d	file:
al	arch/arm/lib/lshrdi3.S	/^#define al /;"	d	file:
al	drivers/bios_emulator/include/biosemu.h	/^	u8 ah, al;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
al	drivers/bios_emulator/include/biosemu.h	/^	u8 al;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
alarm	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_alarm alarm;$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_alarm
alarm	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_alarm alarm;$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_alarm
alarm_control	board/keymile/common/common.h	/^	u8	alarm_control;	\/* Alarm output *\/$/;"	m	struct:bfticu_iomap	typeref:typename:u8
alarm_hour	drivers/rtc/ftrtc010.c	/^	unsigned int alarm_hour;	\/* 0x18 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
alarm_min	drivers/rtc/ftrtc010.c	/^	unsigned int alarm_min;		\/* 0x14 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
alarm_sec	drivers/rtc/ftrtc010.c	/^	unsigned int alarm_sec;		\/* 0x10 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
alarmday	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	alarmday;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
alarmhour	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	alarmhour;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
alarmminute	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	alarmminute;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
alarmmonth	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	alarmmonth; \/* 0x30 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
alarmsecond	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	alarmsecond; \/* 0x20 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
alarmyear	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	alarmyear;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
alc_mutex	drivers/mtd/ubi/ubi.h	/^	struct mutex alc_mutex;$/;"	m	struct:ubi_device	typeref:struct:mutex
ale	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 ale;$/;"	m	struct:at91_emac	typeref:typename:u32
ale_entries	include/cpsw.h	/^	int	ale_entries;	\/* ale table size			*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:int
ale_reg_ofs	include/cpsw.h	/^	u32	ale_reg_ofs;	\/* address lookup engine reg offset	*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
ale_regs	drivers/net/cpsw.c	/^	void				*ale_regs;$/;"	m	struct:cpsw_priv	typeref:typename:void *	file:
alen	drivers/i2c/adi_i2c.c	/^	int alen;		\/* addr length *\/$/;"	m	struct:adi_i2c_msg	typeref:typename:int	file:
alg_type	drivers/crypto/fsl/fsl_hash.c	/^	u32 alg_type;$/;"	m	struct:caam_hash_template	typeref:typename:u32	file:
algnerrc	drivers/net/e1000.h	/^	uint64_t algnerrc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
algo	include/image.h	/^	struct image_sig_algo *algo;	\/* Algorithm information *\/$/;"	m	struct:image_sign_info	typeref:struct:image_sig_algo *
algorithm_sel	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 algorithm_sel;		\/* 0x00c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
algorithm_sel	arch/arm/include/asm/arch/display.h	/^	u32 algorithm_sel;		\/* 0x00c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ali512x_cio_function	drivers/misc/ali512x.c	/^void ali512x_cio_function(int pin, int special, int inv, int input)$/;"	f	typeref:typename:void
ali512x_cio_in	drivers/misc/ali512x.c	/^int ali512x_cio_in(int pin)$/;"	f	typeref:typename:int
ali512x_cio_out	drivers/misc/ali512x.c	/^void ali512x_cio_out(int pin, int value)$/;"	f	typeref:typename:void
ali512x_init	drivers/misc/ali512x.c	/^void ali512x_init(void)$/;"	f	typeref:typename:void
ali512x_set_cio	drivers/misc/ali512x.c	/^void ali512x_set_cio(int enabled)$/;"	f	typeref:typename:void
ali512x_set_fdc	drivers/misc/ali512x.c	/^void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)$/;"	f	typeref:typename:void
ali512x_set_kbc	drivers/misc/ali512x.c	/^void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)$/;"	f	typeref:typename:void
ali512x_set_pp	drivers/misc/ali512x.c	/^void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)$/;"	f	typeref:typename:void
ali512x_set_rtc	drivers/misc/ali512x.c	/^void ali512x_set_rtc(int enabled, u16 io, u8 irq)$/;"	f	typeref:typename:void
ali512x_set_uart	drivers/misc/ali512x.c	/^void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)$/;"	f	typeref:typename:void
ali512x_set_uart2_irda	drivers/misc/ali512x.c	/^void ali512x_set_uart2_irda(int enabled)$/;"	f	typeref:typename:void
ali_write	drivers/misc/ali512x.c	/^static void ali_write(u8 index, u8 value)$/;"	f	typeref:typename:void	file:
alias	fs/yaffs2/yaffs_guts.h	/^	YCHAR *alias;$/;"	m	struct:yaffs_symlink_var	typeref:typename:YCHAR *
alias	fs/yaffs2/yaffs_guts.h	/^	YCHAR alias[YAFFS_MAX_ALIAS_LENGTH + 1];$/;"	m	struct:yaffs_obj_hdr	typeref:typename:YCHAR[]
alias	tools/patman/settings.py	/^alias = {}$/;"	v
alias_checksum	include/fat.h	/^	__u8	alias_checksum;\/* Checksum for 8.3 alias *\/$/;"	m	struct:dir_slot	typeref:typename:__u8
alien	drivers/mtd/ubi/ubi.h	/^	struct list_head alien;$/;"	m	struct:ubi_attach_info	typeref:struct:list_head
alien_peb_count	drivers/mtd/ubi/ubi.h	/^	int alien_peb_count;$/;"	m	struct:ubi_attach_info	typeref:typename:int
align	arch/xtensa/include/asm/ptrace.h	/^	int align[0] __aligned(16);$/;"	m	struct:pt_regs	typeref:typename:int[0]__aligned (16)
align	include/cbfs.h	/^	u32 align;$/;"	m	struct:cbfs_header	typeref:typename:u32
align	include/qfw.h	/^			__le32 align;$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0408	typeref:typename:__le32
align	include/video.h	/^	uint align;$/;"	m	struct:video_uc_platdata	typeref:typename:uint
aligned_OK	common/dlmalloc.c	/^#define aligned_OK(/;"	d	file:
aligned_be64	include/linux/types.h	/^#define aligned_be64 /;"	d
aligned_buffer	drivers/mmc/sdhci.c	/^void *aligned_buffer = (void *)CONFIG_FIXED_SDHCI_ALIGNED_BUFFER;$/;"	v	typeref:typename:void *
aligned_buffer	drivers/mmc/sdhci.c	/^void *aligned_buffer;$/;"	v	typeref:typename:void *
aligned_le64	include/linux/types.h	/^#define aligned_le64 /;"	d
aligned_u64	include/linux/types.h	/^#define aligned_u64 /;"	d
alignment	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 alignment;$/;"	m	struct:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a::__anon775fc5441508	typeref:typename:u32
alignment	doc/README.x86	/^alignment: 64 bytes, architecture: x86$/;"	l
alignment	drivers/mtd/ubi/ubi-media.h	/^	__be32  alignment;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__be32
alignment	drivers/mtd/ubi/ubi.h	/^	int alignment;$/;"	m	struct:ubi_volume	typeref:typename:int
alignment	include/linux/mtd/ubi.h	/^	int alignment;$/;"	m	struct:ubi_volume_info	typeref:typename:int
alignment	include/mtd/ubi-user.h	/^	__s32 alignment;$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s32
alive	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 alive;$/;"	m	struct:mdio_regs	typeref:typename:u32
alive	drivers/net/cpsw.c	/^	u32	alive;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
alive	post/board/pdm360ng/coproc_com.c	/^char alive[] = "$AL;38\\r\\n";$/;"	v	typeref:typename:char[]
all	Makefile	/^all:		$(ALL-y)$/;"	t
all	doc/README.x86	/^all set. For programming U-Boot we just need to program SPI-1 flash.$/;"	l
all	tools/fdtgrep.c	/^	int all;		\/* Display all properties\/nodes *\/$/;"	m	struct:display_info	typeref:typename:int	file:
allOpt	scripts/kconfig/qconf.h	/^	normalOpt = 0, allOpt, promptOpt$/;"	e	enum:optionMode
all_dimms_burst_lengths_bitmask	include/common_timing_params.h	/^	unsigned int all_dimms_burst_lengths_bitmask;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
all_dimms_burst_lengths_bitmask	include/fsl_ddr_sdram.h	/^	unsigned int all_dimms_burst_lengths_bitmask;$/;"	m	struct:memctl_options_partial_s	typeref:typename:unsigned int
all_dimms_ecc_capable	include/common_timing_params.h	/^	unsigned int all_dimms_ecc_capable;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
all_dimms_ecc_capable	include/fsl_ddr_sdram.h	/^	unsigned int all_dimms_ecc_capable;$/;"	m	struct:memctl_options_partial_s	typeref:typename:unsigned int
all_dimms_minimum_trcd_ps	include/fsl_ddr_sdram.h	/^	unsigned int all_dimms_minimum_trcd_ps;$/;"	m	struct:memctl_options_partial_s	typeref:typename:unsigned int
all_dimms_registered	include/common_timing_params.h	/^	unsigned int all_dimms_registered;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
all_dimms_registered	include/fsl_ddr_sdram.h	/^	unsigned int all_dimms_registered;$/;"	m	struct:memctl_options_partial_s	typeref:typename:unsigned int
all_dimms_tckmax_ps	include/fsl_ddr_sdram.h	/^	unsigned int all_dimms_tckmax_ps;$/;"	m	struct:memctl_options_partial_s	typeref:typename:unsigned int
all_dimms_unbuffered	include/common_timing_params.h	/^	unsigned int all_dimms_unbuffered;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
all_dimms_unbuffered	include/fsl_ddr_sdram.h	/^	unsigned int all_dimms_unbuffered;$/;"	m	struct:memctl_options_partial_s	typeref:typename:unsigned int
all_ff	fs/yaffs2/yaffs_packedtags1.c	/^static const u8 all_ff[20] = {$/;"	v	typeref:typename:const u8[20]	file:
all_gcs	fs/yaffs2/yaffs_guts.h	/^	u32 all_gcs;$/;"	m	struct:yaffs_dev	typeref:typename:u32
all_handles	include/efi.h	/^	all_handles,$/;"	e	enum:efi_locate_search_type
all_list	scripts/docproc.c	/^static char **all_list = NULL;$/;"	v	typeref:typename:char **	file:
all_list_len	scripts/docproc.c	/^static int all_list_len = 0;$/;"	v	typeref:typename:int	file:
all_mcast	drivers/net/ks8851_mll.c	/^	u16			all_mcast;$/;"	m	struct:ks_net	typeref:typename:u16	file:
alldefconfig	scripts/kconfig/conf.c	/^	alldefconfig,$/;"	e	enum:input_mode	file:
allmodconfig	scripts/kconfig/conf.c	/^	allmodconfig,$/;"	e	enum:input_mode	file:
allnoconfig	scripts/kconfig/conf.c	/^	allnoconfig,$/;"	e	enum:input_mode	file:
alloc	arch/arm/cpu/pxa/start.S	/^alloc:$/;"	l
alloc	arch/powerpc/include/asm/immap_85xx.h	/^		u32	alloc;	\/* partition allocation *\/$/;"	m	struct:cpc_corenet::__anondcd7518a0208	typeref:typename:u32
alloc	drivers/net/fm/fm.h	/^	void *alloc;$/;"	m	struct:fm_muram	typeref:typename:void *
alloc	include/qfw.h	/^		} alloc;$/;"	m	union:bios_linker_entry::__anona601a7fc030a	typeref:struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0408
alloc_ai	drivers/mtd/ubi/attach.c	/^static struct ubi_attach_info *alloc_ai(void)$/;"	f	typeref:struct:ubi_attach_info *	file:
alloc_block	fs/yaffs2/yaffs_guts.h	/^	int alloc_block;	\/* Current block being allocated off *\/$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:int
alloc_block	fs/yaffs2/yaffs_guts.h	/^	int alloc_block;	\/* Current block being allocated off *\/$/;"	m	struct:yaffs_dev	typeref:typename:int
alloc_block_finder	fs/yaffs2/yaffs_guts.h	/^	int alloc_block_finder;	\/* Used to search for next allocation block *\/$/;"	m	struct:yaffs_dev	typeref:typename:int
alloc_ch	drivers/dma/lpc32xx_dma.c	/^static u32 alloc_ch;$/;"	v	typeref:typename:u32	file:
alloc_chrdev_region	include/linux/compat.h	/^#define alloc_chrdev_region(/;"	d
alloc_device	include/usb.h	/^	int (*alloc_device)(struct udevice *bus, struct usb_device *udev);$/;"	m	struct:dm_usb_ops	typeref:typename:int (*)(struct udevice * bus,struct usb_device * udev)
alloc_double_indirect_block	fs/ext4/ext4_common.c	/^static void alloc_double_indirect_block(struct ext2_inode *file_inode,$/;"	f	typeref:typename:void	file:
alloc_ep_req	drivers/usb/gadget/f_thor.c	/^static struct usb_request *alloc_ep_req(struct usb_ep *ep, unsigned length)$/;"	f	typeref:struct:usb_request *	file:
alloc_fb	drivers/video/video-uclass.c	/^static ulong alloc_fb(struct udevice *dev, ulong *addrp)$/;"	f	typeref:typename:ulong	file:
alloc_func	include/u-boot/zlib.h	/^#  define alloc_func /;"	d
alloc_inode	fs/ubifs/ubifs.h	/^   	struct inode *(*alloc_inode)(struct super_block *sb);$/;"	m	struct:super_operations	typeref:struct:inode * (*)(struct super_block * sb)
alloc_len	drivers/usb/emul/sandbox_flash.c	/^	int alloc_len;$/;"	m	struct:sandbox_flash_priv	typeref:typename:int	file:
alloc_lpt_leb	fs/ubifs/lpt_commit.c	/^static int alloc_lpt_leb(struct ubifs_info *c, int *lnum)$/;"	f	typeref:typename:int	file:
alloc_nand_resource	drivers/mtd/nand/pxa3xx_nand.c	/^static int alloc_nand_resource(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:int	file:
alloc_page	fs/yaffs2/yaffs_guts.h	/^	u32 alloc_page;$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:u32
alloc_page	fs/yaffs2/yaffs_guts.h	/^	u32 alloc_page;$/;"	m	struct:yaffs_dev	typeref:typename:u32
alloc_priv	drivers/core/device.c	/^static void *alloc_priv(int size, uint flags)$/;"	f	typeref:typename:void *	file:
alloc_read_gpt_entries	disk/part_efi.c	/^static gpt_entry *alloc_read_gpt_entries(struct blk_desc *dev_desc,$/;"	f	typeref:typename:gpt_entry *	file:
alloc_request	drivers/usb/gadget/f_mass_storage.c	/^static int alloc_request(struct fsg_common *common, struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
alloc_request	include/linux/usb/gadget.h	/^	struct usb_request *(*alloc_request) (struct usb_ep *ep,$/;"	m	struct:usb_ep_ops	typeref:struct:usb_request * (*)(struct usb_ep * ep,gfp_t gfp_flags)
alloc_requests	drivers/usb/gadget/ether.c	/^static int alloc_requests(struct eth_dev *dev, unsigned n, gfp_t gfp_flags)$/;"	f	typeref:typename:int	file:
alloc_rx_buf	arch/powerpc/include/asm/ppc4xx-emac.h	/^    mal_desc_t		*alloc_rx_buf;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:mal_desc_t *
alloc_single_indirect_block	fs/ext4/ext4_common.c	/^static void alloc_single_indirect_block(struct ext2_inode *file_inode,$/;"	f	typeref:typename:void	file:
alloc_string	scripts/kconfig/zconf.lex.c	/^static void alloc_string(const char *str, int size)$/;"	f	typeref:typename:void	file:
alloc_super	fs/ubifs/super.c	/^static struct super_block *alloc_super(struct file_system_type *type, int flags)$/;"	f	typeref:struct:super_block *	file:
alloc_task_struct	arch/powerpc/include/asm/processor.h	/^#define alloc_task_struct(/;"	d
alloc_tnode_list	fs/yaffs2/yaffs_allocator.c	/^	struct yaffs_tnode_list *alloc_tnode_list;$/;"	m	struct:yaffs_allocator	typeref:struct:yaffs_tnode_list *	file:
alloc_triple_indirect_block	fs/ext4/ext4_common.c	/^static void alloc_triple_indirect_block(struct ext2_inode *file_inode,$/;"	f	typeref:typename:void	file:
alloc_tx_buf	arch/powerpc/include/asm/ppc4xx-emac.h	/^    mal_desc_t		*alloc_tx_buf;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:mal_desc_t *
alloc_ubifs_info	fs/ubifs/super.c	/^static struct ubifs_info *alloc_ubifs_info(struct ubi_volume_desc *ubi)$/;"	f	typeref:struct:ubifs_info *	file:
alloc_wbufs	fs/ubifs/super.c	/^static int alloc_wbufs(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
alloca	scripts/kconfig/zconf.tab.c	/^#    define alloca /;"	d	file:
alloca	tools/gdb/remote.c	/^#define alloca /;"	d	file:
allocate_buf	drivers/video/fsl_diu_fb.c	/^static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)$/;"	f	typeref:typename:int	file:
allocate_buffer	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_allocate_buffer	file:
allocate_fb	drivers/video/fsl_diu_fb.c	/^static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres,$/;"	f	typeref:struct:diu_ad *	file:
allocate_instance	drivers/usb/musb-new/musb_core.c	/^allocate_instance(struct device *dev,$/;"	f	typeref:struct:musb * __devinit	file:
allocate_partition	drivers/mtd/mtdpart.c	/^static struct mtd_part *allocate_partition(struct mtd_info *master,$/;"	f	typeref:struct:mtd_part *	file:
allocate_rx_buffer	drivers/net/uli526x.c	/^static void allocate_rx_buffer(struct uli526x_board_info *db)$/;"	f	typeref:typename:void	file:
allocated_obj_list	fs/yaffs2/yaffs_allocator.c	/^	struct yaffs_obj_list *allocated_obj_list;$/;"	m	struct:yaffs_allocator	typeref:struct:yaffs_obj_list *	file:
allocator	fs/yaffs2/yaffs_guts.h	/^	void *allocator;$/;"	m	struct:yaffs_dev	typeref:typename:void *
allow_ints	include/linux/apm_bios.h	/^	int			allow_ints;$/;"	m	struct:apm_info	typeref:typename:int
allow_maintenance	include/tpm.h	/^	u8	allow_maintenance;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
allow_repeats	include/input.h	/^	bool allow_repeats;		\/* Don't filter out repeats *\/$/;"	m	struct:input_config	typeref:typename:bool
allyesconfig	scripts/kconfig/conf.c	/^	allyesconfig,$/;"	e	enum:input_mode	file:
almdate	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	almdate;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
almhour	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	almhour;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
almmin	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	almmin;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
almmon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	almmon;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
almsec	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	almsec;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
almyear	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	almyear;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
alnctl	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	alnctl;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
alnctl	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	alnctl;		\/* 0x140 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
alnctl	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	alnctl;		\/* 40 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
alpha	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 alpha;$/;"	m	struct:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a::__anon775fc5442a08	typeref:typename:u32
alpha	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 alpha;$/;"	m	struct:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a::__anon775fc5442b08	typeref:typename:u32
alpha	drivers/video/mxcfb.h	/^	int alpha;$/;"	m	struct:mxcfb_gbl_alpha	typeref:typename:int
alpha_chan_en	drivers/video/ipu.h	/^		unsigned char alpha_chan_en;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0708	typeref:typename:unsigned char
alpha_chan_en	drivers/video/ipu.h	/^		unsigned char alpha_chan_en;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0908	typeref:typename:unsigned char
alpha_chan_en	drivers/video/mxc_ipuv3_fb.c	/^	unsigned char alpha_chan_en;$/;"	m	struct:mxcfb_info	typeref:typename:unsigned char	file:
alpha_in_dma	drivers/video/ipu.h	/^	u8 alpha_in_dma;$/;"	m	struct:ipu_channel	typeref:typename:u8
alpha_in_pixel	drivers/video/mxcfb.h	/^	int alpha_in_pixel;$/;"	m	struct:mxcfb_loc_alpha	typeref:typename:int
alpha_mem_len	drivers/video/mxc_ipuv3_fb.c	/^	uint32_t alpha_mem_len;$/;"	m	struct:mxcfb_info	typeref:typename:uint32_t	file:
alpha_mode	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_alpha_mode alpha_mode;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_alpha_mode	file:
alpha_phy_addr0	drivers/video/mxc_ipuv3_fb.c	/^	dma_addr_t alpha_phy_addr0;$/;"	m	struct:mxcfb_info	typeref:typename:dma_addr_t	file:
alpha_phy_addr0	drivers/video/mxcfb.h	/^	unsigned long alpha_phy_addr0;$/;"	m	struct:mxcfb_loc_alpha	typeref:typename:unsigned long
alpha_phy_addr1	drivers/video/mxc_ipuv3_fb.c	/^	dma_addr_t alpha_phy_addr1;$/;"	m	struct:mxcfb_info	typeref:typename:dma_addr_t	file:
alpha_phy_addr1	drivers/video/mxcfb.h	/^	unsigned long alpha_phy_addr1;$/;"	m	struct:mxcfb_loc_alpha	typeref:typename:unsigned long
alpha_virt_addr0	drivers/video/mxc_ipuv3_fb.c	/^	void *alpha_virt_addr0;$/;"	m	struct:mxcfb_info	typeref:typename:void *	file:
alpha_virt_addr1	drivers/video/mxc_ipuv3_fb.c	/^	void *alpha_virt_addr1;$/;"	m	struct:mxcfb_info	typeref:typename:void *	file:
alr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 alr;		\/* alarm register *\/$/;"	m	struct:rtclk83xx	typeref:typename:u32
alrm_day	arch/m68k/include/asm/rtc.h	/^	u32 alrm_day;		\/* 0x24 Days Alarm Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
alrm_hm	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 alrm_hm;$/;"	m	struct:rtc_regs	typeref:typename:u32
alrm_hm	arch/m68k/include/asm/rtc.h	/^	u32 alrm_hm;		\/* 0x08 Hours and Minutes Alarm Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
alrm_sec	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 alrm_sec;$/;"	m	struct:rtc_regs	typeref:typename:u32
alrm_sec	arch/m68k/include/asm/rtc.h	/^	u32 alrm_sec;		\/* 0x0C Seconds Alarm Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
also	doc/README.x86	/^also requires a Chipset Micro Code (CMC) state machine binary to be present in$/;"	l
alt	board/mpl/common/kbd.c	/^static unsigned char alt = 0;$/;"	v	typeref:typename:unsigned char	file:
alt	fs/ubifs/ubifs.h	/^	int alt;$/;"	m	struct:ubifs_znode	typeref:typename:int
alt	include/dfu.h	/^	int                     alt;$/;"	m	struct:dfu_entity	typeref:typename:int
alt_buf	drivers/mtd/nand/vf610_nfc.c	/^	enum vf610_nfc_alt_buf alt_buf;$/;"	m	struct:vf610_nfc	typeref:enum:vf610_nfc_alt_buf	file:
alt_ch_buf0_rdy	drivers/video/ipu_regs.h	/^	u32 alt_ch_buf0_rdy[2];$/;"	m	struct:ipu_stat	typeref:typename:u32[2]
alt_ch_buf1_rdy	drivers/video/ipu_regs.h	/^	u32 alt_ch_buf1_rdy[2];$/;"	m	struct:ipu_stat	typeref:typename:u32[2]
alt_ch_db_mode_sel	drivers/video/ipu_regs.h	/^	u32 alt_ch_db_mode_sel[2];$/;"	m	struct:ipu_cm	typeref:typename:u32[2]
alt_core_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	alt_core_clk,$/;"	e	enum:ext_clk_e
alt_cur_buf_0	drivers/video/ipu_regs.h	/^	u32 alt_cur_buf_0;$/;"	m	struct:ipu_stat	typeref:typename:u32
alt_cur_buf_1	drivers/video/ipu_regs.h	/^	u32 alt_cur_buf_1;$/;"	m	struct:ipu_stat	typeref:typename:u32
alt_gpi_smi_en	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 alt_gpi_smi_en;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
alt_gpi_smi_sts	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 alt_gpi_smi_sts;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
alt_mem_k	arch/x86/include/asm/bootparam.h	/^	__u32 alt_mem_k;				\/* 0x1e0 *\/$/;"	m	struct:boot_params	typeref:typename:__u32
alt_nb	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	gpio_select_t	alt_nb;	\/* Selected Alternate		*\/$/;"	m	struct:__anon2654fafd0108	typeref:typename:gpio_select_t
alt_num_cnt	drivers/dfu/dfu.c	/^static int alt_num_cnt;$/;"	v	typeref:typename:int	file:
alt_scramber_reset_cap	drivers/video/tegra124/sor.h	/^	int	alt_scramber_reset_cap; \/* true for eDP *\/$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
alt_sep_alpha	drivers/video/ipu_regs.h	/^	u32 alt_sep_alpha;$/;"	m	struct:ipu_idmac	typeref:typename:u32
alt_setting_num	drivers/usb/gadget/f_thor.c	/^static int alt_setting_num;$/;"	v	typeref:typename:int	file:
alt_sgdma_construct_descriptor	drivers/net/altera_tse.c	/^static inline void alt_sgdma_construct_descriptor($/;"	f	typeref:typename:void	file:
alt_sgdma_descriptor	drivers/net/altera_tse.h	/^struct alt_sgdma_descriptor {$/;"	s
alt_sgdma_registers	drivers/net/altera_tse.h	/^struct alt_sgdma_registers {$/;"	s
alt_sgdma_start_transfer	drivers/net/altera_tse.c	/^static int alt_sgdma_start_transfer(struct alt_sgdma_registers *regs,$/;"	f	typeref:typename:int	file:
alt_sgdma_wait_transfer	drivers/net/altera_tse.c	/^static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs)$/;"	f	typeref:typename:int	file:
alt_status	drivers/block/mxc_ata.c	/^	u32	alt_status;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
alt_tse_mac	drivers/net/altera_tse.h	/^struct alt_tse_mac {$/;"	s
altcar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	altcar;		\/* Alternate Configuration Attr *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
altcar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	altcar;		\/* Alternate Configuration Attr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
altcar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	altcar;		\/* 0x10 - Alternate Configuration Attribute Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
altcbar	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 altcbar;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
altcbar	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 altcbar;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
altcbar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 altcbar;		\/* Alternate configuration base address register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
altcbar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	altcbar;	\/* Alternate Configuration Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
altcbar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	altcbar;	\/* 0x8 - Alternate Configuration Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
altcbarh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	altcbarh;	\/* Alternate Configuration Base Addr High *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
altcbarl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	altcbarl;	\/* Alternate Configuration Base Addr Low *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
altclksrc	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 altclksrc;          \/* 0x0110 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
altera	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	struct socfpga_clock_manager_altera altera;$/;"	m	struct:socfpga_clock_manager	typeref:struct:socfpga_clock_manager_altera
altera_abort_fn	board/astro/mcf5373l/fpga.c	/^int altera_abort_fn(int cookie)$/;"	f	typeref:typename:int
altera_board_specific_func	include/altera.h	/^} altera_board_specific_func;$/;"	t	typeref:struct:__anond5297d870208
altera_config_fn	board/astro/mcf5373l/fpga.c	/^int altera_config_fn(int assert_config, int flush, int cookie)$/;"	f	typeref:typename:int
altera_desc_to_fpga	drivers/fpga/altera.c	/^altera_desc_to_fpga(Altera_desc *desc, const char *fn)$/;"	f	typeref:typename:const struct altera_fpga *	file:
altera_done_fn	board/astro/mcf5373l/fpga.c	/^int altera_done_fn(int cookie)$/;"	f	typeref:typename:int
altera_dump	drivers/fpga/altera.c	/^int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
altera_family	include/altera.h	/^enum altera_family {$/;"	g
altera_fns	board/astro/mcf5373l/fpga.c	/^Altera_CYC2_Passive_Serial_fns altera_fns = {$/;"	v	typeref:typename:Altera_CYC2_Passive_Serial_fns
altera_fpga	arch/arm/mach-socfpga/misc.c	/^static Altera_desc altera_fpga[] = {$/;"	v	typeref:typename:Altera_desc[]	file:
altera_fpga	board/astro/mcf5373l/fpga.c	/^Altera_desc altera_fpga[CONFIG_FPGA_COUNT] = {$/;"	v	typeref:typename:Altera_desc[]
altera_fpga	board/theadorable/fpga.c	/^static Altera_desc altera_fpga[] = {$/;"	v	typeref:typename:Altera_desc[]	file:
altera_fpga	drivers/fpga/altera.c	/^static const struct altera_fpga {$/;"	s	file:
altera_fpga	drivers/fpga/altera.c	/^} altera_fpga[] = {$/;"	v	typeref:typename:const struct altera_fpga[]
altera_iface	include/altera.h	/^enum altera_iface {$/;"	g
altera_info	drivers/fpga/altera.c	/^int altera_info(Altera_desc *desc)$/;"	f	typeref:typename:int
altera_jtag_mode	include/altera.h	/^	altera_jtag_mode,$/;"	e	enum:altera_iface
altera_jtaguart_getc	drivers/serial/altera_jtag_uart.c	/^static int altera_jtaguart_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_jtaguart_ids	drivers/serial/altera_jtag_uart.c	/^static const struct udevice_id altera_jtaguart_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_jtaguart_ofdata_to_platdata	drivers/serial/altera_jtag_uart.c	/^static int altera_jtaguart_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_jtaguart_ops	drivers/serial/altera_jtag_uart.c	/^static const struct dm_serial_ops altera_jtaguart_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
altera_jtaguart_pending	drivers/serial/altera_jtag_uart.c	/^static int altera_jtaguart_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
altera_jtaguart_platdata	drivers/serial/altera_jtag_uart.c	/^struct altera_jtaguart_platdata {$/;"	s	file:
altera_jtaguart_probe	drivers/serial/altera_jtag_uart.c	/^static int altera_jtaguart_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_jtaguart_putc	drivers/serial/altera_jtag_uart.c	/^static int altera_jtaguart_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
altera_jtaguart_regs	drivers/serial/altera_jtag_uart.c	/^struct altera_jtaguart_regs {$/;"	s	file:
altera_jtaguart_setbrg	drivers/serial/altera_jtag_uart.c	/^static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
altera_load	drivers/fpga/altera.c	/^int altera_load(Altera_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
altera_nios2_get_count	arch/nios2/cpu/cpu.c	/^static int altera_nios2_get_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_nios2_get_desc	arch/nios2/cpu/cpu.c	/^static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
altera_nios2_get_info	arch/nios2/cpu/cpu.c	/^static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info)$/;"	f	typeref:typename:int	file:
altera_nios2_ids	arch/nios2/cpu/cpu.c	/^static const struct udevice_id altera_nios2_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_nios2_ops	arch/nios2/cpu/cpu.c	/^static const struct cpu_ops altera_nios2_ops = {$/;"	v	typeref:typename:const struct cpu_ops	file:
altera_nios2_probe	arch/nios2/cpu/cpu.c	/^static int altera_nios2_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_pio_direction_input	drivers/gpio/altera_pio.c	/^static int altera_pio_direction_input(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:int	file:
altera_pio_direction_output	drivers/gpio/altera_pio.c	/^static int altera_pio_direction_output(struct udevice *dev, unsigned pin,$/;"	f	typeref:typename:int	file:
altera_pio_get_value	drivers/gpio/altera_pio.c	/^static int altera_pio_get_value(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:int	file:
altera_pio_ids	drivers/gpio/altera_pio.c	/^static const struct udevice_id altera_pio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_pio_ofdata_to_platdata	drivers/gpio/altera_pio.c	/^static int altera_pio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_pio_ops	drivers/gpio/altera_pio.c	/^static const struct dm_gpio_ops altera_pio_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
altera_pio_platdata	drivers/gpio/altera_pio.c	/^struct altera_pio_platdata {$/;"	s	file:
altera_pio_probe	drivers/gpio/altera_pio.c	/^static int altera_pio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_pio_regs	drivers/gpio/altera_pio.c	/^struct altera_pio_regs {$/;"	s	file:
altera_pio_set_value	drivers/gpio/altera_pio.c	/^static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val)$/;"	f	typeref:typename:int	file:
altera_post_fn	board/astro/mcf5373l/fpga.c	/^int altera_post_fn(int cookie)$/;"	f	typeref:typename:int
altera_pre_fn	board/astro/mcf5373l/fpga.c	/^int altera_pre_fn(int cookie)$/;"	f	typeref:typename:int
altera_qspi_erase	drivers/mtd/altera_qspi.c	/^static int altera_qspi_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int	file:
altera_qspi_get_locked_range	drivers/mtd/altera_qspi.c	/^static void altera_qspi_get_locked_range(struct mtd_info *mtd, loff_t *ofs,$/;"	f	typeref:typename:void	file:
altera_qspi_ids	drivers/mtd/altera_qspi.c	/^static const struct udevice_id altera_qspi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_qspi_lock	drivers/mtd/altera_qspi.c	/^static int altera_qspi_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
altera_qspi_ofdata_to_platdata	drivers/mtd/altera_qspi.c	/^static int altera_qspi_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_qspi_platdata	drivers/mtd/altera_qspi.c	/^struct altera_qspi_platdata {$/;"	s	file:
altera_qspi_probe	drivers/mtd/altera_qspi.c	/^static int altera_qspi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_qspi_read	drivers/mtd/altera_qspi.c	/^static int altera_qspi_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
altera_qspi_regs	drivers/mtd/altera_qspi.c	/^struct altera_qspi_regs {$/;"	s	file:
altera_qspi_sync	drivers/mtd/altera_qspi.c	/^static void altera_qspi_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
altera_qspi_unlock	drivers/mtd/altera_qspi.c	/^static int altera_qspi_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
altera_qspi_write	drivers/mtd/altera_qspi.c	/^static int altera_qspi_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
altera_spi_claim_bus	drivers/spi/altera_spi.c	/^static int altera_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_spi_ids	drivers/spi/altera_spi.c	/^static const struct udevice_id altera_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_spi_ofdata_to_platdata	drivers/spi/altera_spi.c	/^static int altera_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
altera_spi_ops	drivers/spi/altera_spi.c	/^static const struct dm_spi_ops altera_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
altera_spi_platdata	drivers/spi/altera_spi.c	/^struct altera_spi_platdata {$/;"	s	file:
altera_spi_priv	drivers/spi/altera_spi.c	/^struct altera_spi_priv {$/;"	s	file:
altera_spi_probe	drivers/spi/altera_spi.c	/^static int altera_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
altera_spi_regs	drivers/spi/altera_spi.c	/^struct altera_spi_regs {$/;"	s	file:
altera_spi_release_bus	drivers/spi/altera_spi.c	/^static int altera_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_spi_set_mode	drivers/spi/altera_spi.c	/^static int altera_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
altera_spi_set_speed	drivers/spi/altera_spi.c	/^static int altera_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
altera_spi_xfer	drivers/spi/altera_spi.c	/^static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
altera_status_fn	board/astro/mcf5373l/fpga.c	/^int altera_status_fn(int cookie)$/;"	f	typeref:typename:int
altera_sysid_ids	drivers/misc/altera_sysid.c	/^static const struct udevice_id altera_sysid_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_sysid_ofdata_to_platdata	drivers/misc/altera_sysid.c	/^static int altera_sysid_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_sysid_ops	drivers/misc/altera_sysid.c	/^static const struct misc_ops altera_sysid_ops = {$/;"	v	typeref:typename:const struct misc_ops	file:
altera_sysid_platdata	drivers/misc/altera_sysid.c	/^struct altera_sysid_platdata {$/;"	s	file:
altera_sysid_read	drivers/misc/altera_sysid.c	/^static int altera_sysid_read(struct udevice *dev,$/;"	f	typeref:typename:int	file:
altera_sysid_regs	drivers/misc/altera_sysid.c	/^struct altera_sysid_regs {$/;"	s	file:
altera_timer_get_count	drivers/timer/altera_timer.c	/^static int altera_timer_get_count(struct udevice *dev, u64 *count)$/;"	f	typeref:typename:int	file:
altera_timer_ids	drivers/timer/altera_timer.c	/^static const struct udevice_id altera_timer_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_timer_ofdata_to_platdata	drivers/timer/altera_timer.c	/^static int altera_timer_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_timer_ops	drivers/timer/altera_timer.c	/^static const struct timer_ops altera_timer_ops = {$/;"	v	typeref:typename:const struct timer_ops	file:
altera_timer_platdata	drivers/timer/altera_timer.c	/^struct altera_timer_platdata {$/;"	s	file:
altera_timer_probe	drivers/timer/altera_timer.c	/^static int altera_timer_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_timer_regs	drivers/timer/altera_timer.c	/^struct altera_timer_regs {$/;"	s	file:
altera_tse_free_pkt	drivers/net/altera_tse.c	/^static int altera_tse_free_pkt(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
altera_tse_free_pkt_msgdma	drivers/net/altera_tse.c	/^static int altera_tse_free_pkt_msgdma(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
altera_tse_free_pkt_sgdma	drivers/net/altera_tse.c	/^static int altera_tse_free_pkt_sgdma(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
altera_tse_ids	drivers/net/altera_tse.c	/^static const struct udevice_id altera_tse_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_tse_ofdata_to_platdata	drivers/net/altera_tse.c	/^static int altera_tse_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_tse_ops	drivers/net/altera_tse.c	/^static const struct eth_ops altera_tse_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
altera_tse_priv	drivers/net/altera_tse.h	/^struct altera_tse_priv {$/;"	s
altera_tse_probe	drivers/net/altera_tse.c	/^static int altera_tse_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_tse_recv	drivers/net/altera_tse.c	/^static int altera_tse_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
altera_tse_recv_msgdma	drivers/net/altera_tse.c	/^static int altera_tse_recv_msgdma(struct udevice *dev, int flags,$/;"	f	typeref:typename:int	file:
altera_tse_recv_sgdma	drivers/net/altera_tse.c	/^static int altera_tse_recv_sgdma(struct udevice *dev, int flags,$/;"	f	typeref:typename:int	file:
altera_tse_send	drivers/net/altera_tse.c	/^static int altera_tse_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
altera_tse_send_msgdma	drivers/net/altera_tse.c	/^static int altera_tse_send_msgdma(struct udevice *dev, void *packet,$/;"	f	typeref:typename:int	file:
altera_tse_send_sgdma	drivers/net/altera_tse.c	/^static int altera_tse_send_sgdma(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
altera_tse_start	drivers/net/altera_tse.c	/^static int altera_tse_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_tse_stop	drivers/net/altera_tse.c	/^static void altera_tse_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
altera_tse_stop_mac	drivers/net/altera_tse.c	/^static void altera_tse_stop_mac(struct altera_tse_priv *priv)$/;"	f	typeref:typename:void	file:
altera_tse_stop_msgdma	drivers/net/altera_tse.c	/^static void altera_tse_stop_msgdma(struct udevice *dev)$/;"	f	typeref:typename:void	file:
altera_tse_stop_sgdma	drivers/net/altera_tse.c	/^static void altera_tse_stop_sgdma(struct udevice *dev)$/;"	f	typeref:typename:void	file:
altera_tse_write_hwaddr	drivers/net/altera_tse.c	/^static int altera_tse_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_uart_getc	drivers/serial/altera_uart.c	/^static int altera_uart_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_uart_ids	drivers/serial/altera_uart.c	/^static const struct udevice_id altera_uart_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
altera_uart_ofdata_to_platdata	drivers/serial/altera_uart.c	/^static int altera_uart_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_uart_ops	drivers/serial/altera_uart.c	/^static const struct dm_serial_ops altera_uart_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
altera_uart_pending	drivers/serial/altera_uart.c	/^static int altera_uart_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
altera_uart_platdata	drivers/serial/altera_uart.c	/^struct altera_uart_platdata {$/;"	s	file:
altera_uart_probe	drivers/serial/altera_uart.c	/^static int altera_uart_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
altera_uart_putc	drivers/serial/altera_uart.c	/^static int altera_uart_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
altera_uart_regs	drivers/serial/altera_uart.c	/^struct altera_uart_regs {$/;"	s	file:
altera_uart_setbrg	drivers/serial/altera_uart.c	/^static int altera_uart_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
altera_validate	drivers/fpga/altera.c	/^static int altera_validate(Altera_desc *desc, const char *fn)$/;"	f	typeref:typename:int	file:
altera_write_fn	board/astro/mcf5373l/fpga.c	/^int altera_write_fn(const void *buf, size_t len, int flush, int cookie)$/;"	f	typeref:typename:int
alternate	arch/arm/include/asm/imx-common/dma.h	/^		unsigned long	alternate;$/;"	m	union:mxs_dma_cmd::__anon172d065f040a	typeref:typename:unsigned long
alternate	include/usbdevice.h	/^	u8 alternate;		\/* alternate flag *\/$/;"	m	struct:usb_device_instance	typeref:typename:u8
alternate_instance	drivers/serial/usbtty.c	/^static struct usb_alternate_instance alternate_instance[MAX_INTERFACES];$/;"	v	typeref:struct:usb_alternate_instance[]	file:
alternate_lba	include/part_efi.h	/^	__le64 alternate_lba;$/;"	m	struct:_gpt_header	typeref:typename:__le64
alternates	include/usbdevice.h	/^	int alternates;$/;"	m	struct:usb_interface_instance	typeref:typename:int
alternates_instance_array	include/usbdevice.h	/^	struct usb_alternate_instance *alternates_instance_array;$/;"	m	struct:usb_interface_instance	typeref:struct:usb_alternate_instance *
altname	tools/mxsimage.h	/^	const char	*altname;$/;"	m	struct:__anonc4848c960c08	typeref:typename:const char *
altr	arch/powerpc/include/asm/immap_512x.h	/^	u32	altr;		\/* Address Latch Timing Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
altsetting	drivers/usb/gadget/f_dfu.c	/^	u8				altsetting;$/;"	m	struct:f_dfu	typeref:typename:u8	file:
altstatus_addr	drivers/block/pata_bfin.h	/^	unsigned long altstatus_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
altstatus_addr	drivers/block/sata_dwc.h	/^	void __iomem		*altstatus_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
altstatus_addr	drivers/block/sata_sil3114.h	/^	unsigned long altstatus_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
always	board/samsung/origen/Makefile	/^always := $(hostprogs-y)$/;"	m
always	board/samsung/smdkv310/Makefile	/^always := $(hostprogs-y)$/;"	m
always	doc/DocBook/Makefile	/^always := $(hostprogs-y)$/;"	m
always	scripts/basic/Makefile	/^always		:= $(hostprogs-y)$/;"	m
always	scripts/kconfig/Makefile	/^always := dochecklxdialog$/;"	m
always	tools/Makefile	/^always := $(hostprogs-y)$/;"	m
always	tools/easylogo/Makefile	/^always := $(hostprogs-y)$/;"	m
always	tools/env/Makefile	/^always := fw_printenv$/;"	m
always	tools/gdb/Makefile	/^always := $(hostprogs-y)$/;"	m
always_check_erased	fs/yaffs2/yaffs_guts.h	/^	int always_check_erased;	\/* Force chunk erased check always on *\/$/;"	m	struct:yaffs_param	typeref:typename:int
always_on	include/power/regulator.h	/^	bool always_on;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:bool
alwayson_sc_regs	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^struct alwayson_sc_regs {$/;"	s
am	board/mpl/mip405/mip405.c	/^	unsigned char am;		\/* Address Mod (will be programmed as am-1) *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
am	include/sja1000.h	/^	u8 am;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
am335x_adc	arch/arm/dts/am33xx.dtsi	/^			am335x_adc: adc {$/;"	l	label:tscadc
am335x_baseboard_id	board/vscom/baltos/board.h	/^struct am335x_baseboard_id {$/;"	s
am335x_evm_audio_pins	arch/arm/dts/am335x-evm.dts	/^	am335x_evm_audio_pins: am335x_evm_audio_pins {$/;"	l
am335x_get_efuse_mpu_max_freq	arch/arm/cpu/armv7/am33xx/sys_info.c	/^int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)$/;"	f	typeref:typename:int
am335x_get_tps65910_mpu_vdd	arch/arm/cpu/armv7/am33xx/sys_info.c	/^int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)$/;"	f	typeref:typename:int
am335x_lcdhw	drivers/video/am335x-fb.c	/^struct am335x_lcdhw {$/;"	s	file:
am335x_lcdpanel	drivers/video/am335x-fb.h	/^struct am335x_lcdpanel {$/;"	s
am335x_nand_geometry	board/siemens/draco/board.c	/^struct am335x_nand_geometry {$/;"	s	file:
am335xfb_init	drivers/video/am335x-fb.c	/^int am335xfb_init(struct am335x_lcdpanel *panel)$/;"	f	typeref:typename:int
am33xx_gpio	arch/arm/cpu/armv7/am33xx/board.c	/^static const struct omap_gpio_platdata am33xx_gpio[] = {$/;"	v	typeref:typename:const struct omap_gpio_platdata[]	file:
am33xx_otg0_set_phy_power	arch/arm/cpu/armv7/am33xx/board.c	/^static void am33xx_otg0_set_phy_power(u8 on)$/;"	f	typeref:typename:void	file:
am33xx_otg1_set_phy_power	arch/arm/cpu/armv7/am33xx/board.c	/^static void am33xx_otg1_set_phy_power(u8 on)$/;"	f	typeref:typename:void	file:
am33xx_pinmux	arch/arm/dts/am33xx.dtsi	/^				am33xx_pinmux: pinmux@800 {$/;"	l	label:l4_wkup.scm
am33xx_serial	arch/arm/cpu/armv7/am33xx/board.c	/^static const struct ns16550_platdata am33xx_serial[] = {$/;"	v	typeref:typename:const struct ns16550_platdata[]	file:
am33xx_spl_board_init	arch/arm/cpu/armv7/am33xx/board.c	/^__weak void am33xx_spl_board_init(void)$/;"	f	typeref:typename:__weak void
am33xx_spl_board_init	board/BuR/brppt1/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/BuR/brxre1/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/birdland/bav335x/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/bosch/shc/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/compulab/cm_t335/spl.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/silica/pengwyn/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/tcl/sl50/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/ti/am335x/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_spl_board_init	board/vscom/baltos/board.c	/^void am33xx_spl_board_init(void)$/;"	f	typeref:typename:void
am33xx_usb_set_phy_power	arch/arm/cpu/armv7/am33xx/board.c	/^static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr)$/;"	f	typeref:typename:void	file:
am3517_evm_musb_init	board/compulab/cm_t3517/cm_t3517.c	/^static inline void am3517_evm_musb_init(void) {}$/;"	f	typeref:typename:void	file:
am3517_evm_musb_init	board/logicpd/am3517evm/am3517evm.c	/^#define am3517_evm_musb_init(/;"	d	file:
am3517_evm_musb_init	board/logicpd/am3517evm/am3517evm.c	/^static void am3517_evm_musb_init(void)$/;"	f	typeref:typename:void	file:
am3517_get_efuse_enetaddr	board/compulab/cm_t3517/cm_t3517.c	/^static inline int am3517_get_efuse_enetaddr(u8 *enetaddr) { return 1; }$/;"	f	typeref:typename:int	file:
am3517_get_efuse_enetaddr	board/compulab/cm_t3517/cm_t3517.c	/^static int am3517_get_efuse_enetaddr(u8 *enetaddr)$/;"	f	typeref:typename:int	file:
am35x_dmamask	drivers/usb/musb-new/am35x.c	/^static u64 am35x_dmamask = DMA_BIT_MASK(32);$/;"	v	typeref:typename:u64	file:
am35x_driver	drivers/usb/musb-new/am35x.c	/^static struct platform_driver am35x_driver = {$/;"	v	typeref:struct:platform_driver	file:
am35x_exit	drivers/usb/musb-new/am35x.c	/^static void __exit am35x_exit(void)$/;"	f	typeref:typename:void __exit	file:
am35x_glue	drivers/usb/musb-new/am35x.c	/^struct am35x_glue {$/;"	s	file:
am35x_init	drivers/usb/musb-new/am35x.c	/^static int __init am35x_init(void)$/;"	f	typeref:typename:int __init	file:
am35x_musb_clear_irq	arch/arm/cpu/armv7/omap3/am35x_musb.c	/^void am35x_musb_clear_irq(void)$/;"	f	typeref:typename:void
am35x_musb_disable	drivers/usb/musb-new/am35x.c	/^static void am35x_musb_disable(struct musb *musb)$/;"	f	typeref:typename:void	file:
am35x_musb_enable	drivers/usb/musb-new/am35x.c	/^static void am35x_musb_enable(struct musb *musb)$/;"	f	typeref:typename:void	file:
am35x_musb_exit	drivers/usb/musb-new/am35x.c	/^static int am35x_musb_exit(struct musb *musb)$/;"	f	typeref:typename:int	file:
am35x_musb_init	drivers/usb/musb-new/am35x.c	/^static int am35x_musb_init(struct musb *musb)$/;"	f	typeref:typename:int	file:
am35x_musb_interrupt	drivers/usb/musb-new/am35x.c	/^static irqreturn_t am35x_musb_interrupt(int irq, void *hci)$/;"	f	typeref:typename:irqreturn_t	file:
am35x_musb_phy_power	arch/arm/cpu/armv7/omap3/am35x_musb.c	/^void am35x_musb_phy_power(u8 on)$/;"	f	typeref:typename:void
am35x_musb_reset	arch/arm/cpu/armv7/omap3/am35x_musb.c	/^void am35x_musb_reset(void)$/;"	f	typeref:typename:void
am35x_musb_set_mode	drivers/usb/musb-new/am35x.c	/^static int am35x_musb_set_mode(struct musb *musb, u8 musb_mode)$/;"	f	typeref:typename:int	file:
am35x_musb_set_vbus	drivers/usb/musb-new/am35x.c	/^static void am35x_musb_set_vbus(struct musb *musb, int is_on)$/;"	f	typeref:typename:void	file:
am35x_musb_try_idle	drivers/usb/musb-new/am35x.c	/^static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)$/;"	f	typeref:typename:void	file:
am35x_ops	drivers/usb/musb-new/am35x.c	/^static const struct musb_platform_ops am35x_ops = {$/;"	v	typeref:typename:const struct musb_platform_ops	file:
am35x_pm_ops	drivers/usb/musb-new/am35x.c	/^static struct dev_pm_ops am35x_pm_ops = {$/;"	v	typeref:struct:dev_pm_ops	file:
am35x_probe	drivers/usb/musb-new/am35x.c	/^static int __devinit am35x_probe(struct platform_device *pdev)$/;"	f	typeref:typename:int __devinit	file:
am35x_remove	drivers/usb/musb-new/am35x.c	/^static int __devexit am35x_remove(struct platform_device *pdev)$/;"	f	typeref:typename:int __devexit	file:
am35x_resume	drivers/usb/musb-new/am35x.c	/^static int am35x_resume(struct device *dev)$/;"	f	typeref:typename:int	file:
am35x_scm_general	arch/arm/include/asm/arch-omap3/am35x_def.h	/^struct am35x_scm_general {$/;"	s
am35x_scm_general_regs	arch/arm/include/asm/arch-omap3/am35x_def.h	/^#define am35x_scm_general_regs /;"	d
am35x_suspend	drivers/usb/musb-new/am35x.c	/^static int am35x_suspend(struct device *dev)$/;"	f	typeref:typename:int	file:
am35x_usb_regs	drivers/usb/musb/am35x.h	/^#define am35x_usb_regs /;"	d
am35x_usb_regs	drivers/usb/musb/am35x.h	/^struct am35x_usb_regs {$/;"	s
am437x_enable_usb2_phy2	drivers/usb/phy/omap_usb_phy.c	/^static void am437x_enable_usb2_phy2(struct omap_xhci *omap)$/;"	f	typeref:typename:void	file:
am43xx_control_usb2phy1	arch/arm/dts/am4372.dtsi	/^		am43xx_control_usb2phy1: control-phy@44e10620 {$/;"	l
am43xx_control_usb2phy2	arch/arm/dts/am4372.dtsi	/^		am43xx_control_usb2phy2: control-phy@0x44e10628 {$/;"	l
am43xx_pinmux	arch/arm/dts/am4372.dtsi	/^				am43xx_pinmux: pinmux@800 {$/;"	l	label:l4_wkup.scm
am572x_idk_volts	board/ti/am57xx/board.c	/^struct vcores_data am572x_idk_volts = {$/;"	v	typeref:struct:vcores_data
amask	include/fsl_ifc.h	/^	u32 amask;$/;"	m	struct:fsl_ifc_amask	typeref:typename:u32
amask_cs	include/fsl_ifc.h	/^	struct fsl_ifc_amask amask_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT];$/;"	m	struct:fsl_ifc_fcm	typeref:struct:fsl_ifc_amask[]
amba	arch/arm/dts/zynq-7000.dtsi	/^	amba: amba {$/;"	l
amba	arch/arm/dts/zynqmp.dtsi	/^	amba: amba {$/;"	l
amba_ahbio_adr	include/ambapp.h	/^#define amba_ahbio_adr(/;"	d
amba_apb_mask	include/ambapp.h	/^#define amba_apb_mask(/;"	d
amba_apu	arch/arm/dts/zynqmp.dtsi	/^	amba_apu: amba_apu {$/;"	l
amba_base	drivers/spi/fsl_qspi.c	/^	fdt_addr_t amba_base;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:fdt_addr_t	file:
amba_base	drivers/spi/fsl_qspi.c	/^	u32 amba_base[FSL_QSPI_MAX_CHIPSELECT_NUM];$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32[]	file:
amba_bases	drivers/spi/fsl_qspi.c	/^static unsigned long amba_bases[] = {$/;"	v	typeref:typename:unsigned long[]	file:
amba_clk_cfg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 amba_clk_cfg;	\/* 0x24 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
amba_device	include/ambapp.h	/^#define amba_device(/;"	d
amba_iobar_start	include/ambapp.h	/^#define amba_iobar_start(/;"	d
amba_irq	include/ambapp.h	/^#define amba_irq(/;"	d
amba_membar_mask	include/ambapp.h	/^#define amba_membar_mask(/;"	d
amba_membar_start	include/ambapp.h	/^#define amba_membar_start(/;"	d
amba_membar_type	include/ambapp.h	/^#define amba_membar_type(/;"	d
amba_total_size	drivers/spi/fsl_qspi.c	/^	fdt_size_t amba_total_size;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:fdt_size_t	file:
amba_total_size	drivers/spi/fsl_qspi.c	/^	u32 amba_total_size;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
amba_vendor	include/ambapp.h	/^#define amba_vendor(/;"	d
amba_ver	include/ambapp.h	/^#define amba_ver(/;"	d
ambainit	arch/sparc/cpu/leon3/start.S	/^ambainit:$/;"	l
ambapp_ahb_count	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_ahb_count(struct ambapp_bus *abus, int vendor, int device, int type)$/;"	f	typeref:typename:int
ambapp_ahb_find	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_ahb_find(struct ambapp_bus *abus, int vendor, int device,$/;"	f	typeref:typename:int
ambapp_ahb_parse	arch/sparc/cpu/leon3/ambapp.c	/^void ambapp_ahb_parse(struct ambapp_find_ahb_info *info, ambapp_ahbdev *dev)$/;"	f	typeref:typename:void
ambapp_ahbdev	include/ambapp.h	/^} ambapp_ahbdev;$/;"	t	typeref:struct:__anonf7dda3ff0208
ambapp_ahbmst_count	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_ahbmst_count(struct ambapp_bus *abus, int vendor, int device)$/;"	f	typeref:typename:int
ambapp_ahbmst_find	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_ahbmst_find(struct ambapp_bus *abus, int vendor, int device,$/;"	f	typeref:typename:int
ambapp_ahbslv_count	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_ahbslv_count(struct ambapp_bus *abus, int vendor, int device)$/;"	f	typeref:typename:int
ambapp_ahbslv_find	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_ahbslv_find(struct ambapp_bus *abus, int vendor, int device,$/;"	f	typeref:typename:int
ambapp_apb_count	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_apb_count(struct ambapp_bus *abus, int vendor, int device)$/;"	f	typeref:typename:int
ambapp_apb_find	arch/sparc/cpu/leon3/ambapp.c	/^int ambapp_apb_find(struct ambapp_bus *abus, int vendor, int device,$/;"	f	typeref:typename:int
ambapp_apb_parse	arch/sparc/cpu/leon3/ambapp.c	/^void ambapp_apb_parse(struct ambapp_find_apb_info *info, ambapp_apbdev *dev)$/;"	f	typeref:typename:void
ambapp_apbdev	include/ambapp.h	/^} ambapp_apbdev;$/;"	t	typeref:struct:__anonf7dda3ff0108
ambapp_bus	include/ambapp.h	/^struct ambapp_bus {$/;"	s
ambapp_bus_freq	arch/sparc/cpu/leon3/ambapp.c	/^unsigned int ambapp_bus_freq(struct ambapp_bus *abus, int ahb_bus_index)$/;"	f	typeref:typename:unsigned int
ambapp_bus_init	arch/sparc/cpu/leon3/ambapp.c	/^void ambapp_bus_init($/;"	f	typeref:typename:void
ambapp_dev_apbuart	include/grlib/apbuart.h	/^} ambapp_dev_apbuart;$/;"	t	typeref:struct:__anon8f85467c0108
ambapp_dev_gptimer	include/grlib/gptimer.h	/^} ambapp_dev_gptimer;$/;"	t	typeref:struct:__anon98dc47250208
ambapp_dev_gptimer_element	include/grlib/gptimer.h	/^} ambapp_dev_gptimer_element;$/;"	t	typeref:struct:__anon98dc47250108
ambapp_dev_irqmp	include/grlib/irqmp.h	/^} ambapp_dev_irqmp;$/;"	t	typeref:struct:__anon9e5279760108
ambapp_device_id2desc	cmd/ambapp.c	/^char *ambapp_device_id2desc(int vendor, int id)$/;"	f	typeref:typename:char *
ambapp_device_id2str	cmd/ambapp.c	/^char *ambapp_device_id2str(int vendor, int id)$/;"	f	typeref:typename:char *
ambapp_device_name	cmd/ambapp.c	/^} ambapp_device_name;$/;"	t	typeref:struct:__anon3d6428ea0108	file:
ambapp_find_ahb	arch/sparc/cpu/leon3/ambapp_low_c.S	/^ambapp_find_ahb:$/;"	l
ambapp_find_ahb_info	arch/sparc/cpu/leon3/ambapp.c	/^struct ambapp_find_ahb_info {$/;"	s	file:
ambapp_find_apb	arch/sparc/cpu/leon3/ambapp_low_c.S	/^ambapp_find_apb:$/;"	l
ambapp_find_apb_info	arch/sparc/cpu/leon3/ambapp.c	/^struct ambapp_find_apb_info {$/;"	s	file:
ambapp_find_buses	arch/sparc/cpu/leon3/ambapp_low_c.S	/^ambapp_find_buses:$/;"	l
ambapp_get_dev	cmd/ambapp.c	/^static ambapp_device_name *ambapp_get_dev(ambapp_device_name *devs, int id)$/;"	f	typeref:typename:ambapp_device_name *	file:
ambapp_init_reloc	cmd/ambapp.c	/^int ambapp_init_reloc(void)$/;"	f	typeref:typename:int
ambapp_pnp_ahb	include/ambapp.h	/^struct ambapp_pnp_ahb {$/;"	s
ambapp_pnp_apb	include/ambapp.h	/^struct ambapp_pnp_apb {$/;"	s
ambapp_pnp_info	include/ambapp.h	/^struct ambapp_pnp_info {$/;"	s
ambapp_print_ahb	cmd/ambapp.c	/^void ambapp_print_ahb(ambapp_ahbdev *dev, int index)$/;"	f	typeref:typename:void
ambapp_print_apb	cmd/ambapp.c	/^void ambapp_print_apb(ambapp_apbdev *dev, int index)$/;"	f	typeref:typename:void
ambapp_type_names	cmd/ambapp.c	/^char *ambapp_type_names[4] = {$/;"	v	typeref:typename:char * [4]
ambapp_vendor_devnames	cmd/ambapp.c	/^} ambapp_vendor_devnames;$/;"	t	typeref:struct:__anon3d6428ea0208	file:
ambapp_vendor_id2str	cmd/ambapp.c	/^char *ambapp_vendor_id2str(int vendor)$/;"	f	typeref:typename:char *
amcgpio_en_reg	drivers/video/ati_radeon_fb.h	/^	u32		amcgpio_en_reg;$/;"	m	struct:radeon_regs	typeref:typename:u32
amcgpio_mask	drivers/video/ati_radeon_fb.h	/^	u32		amcgpio_mask;$/;"	m	struct:radeon_regs	typeref:typename:u32
amd_flash_info	drivers/mtd/jedec_flash.c	/^struct amd_flash_info {$/;"	s	file:
amem_cfg_ctrl	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 amem_cfg_ctrl;	\/* 0x50 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
amiga_part_geometry	disk/part_amiga.h	/^struct amiga_part_geometry$/;"	s
amp_tuning_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	amp_tuning_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
ampire_wvga	board/denx/m53evk/m53evk.c	/^static struct fb_videomode const ampire_wvga = {$/;"	v	typeref:struct:fb_videomode const	file:
amplifier_init	board/tqc/tqm5200/cmd_stk52xx.c	/^void amplifier_init(void)$/;"	f	typeref:typename:void
amr	arch/powerpc/include/asm/immap_512x.h	/^	u32 amr;		\/* Arbiter Mask Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
amr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 amr;		\/* Arbiter Mask Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
an_events	include/vsc9953.h	/^	u32	an_events;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
an_moved	include/vsc9953.h	/^	u32	an_moved;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
ana	include/vsc9953.h	/^	struct vsc9953_ana_ana	ana;$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_ana
ana0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana0;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
ana0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ana0;$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32
ana1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana1;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
ana1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ana1;$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32
ana2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana2;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
ana_misc0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc0;		\/* 0x150 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc0	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ana_misc0;$/;"	m	struct:anadig_reg	typeref:typename:u32
ana_misc0_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc0_clr;		\/* 0x158 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc0_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc0_set;		\/* 0x154 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc0_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc0_tog;		\/* 0x15c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc1;		\/* 0x160 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ana_misc1;$/;"	m	struct:anadig_reg	typeref:typename:u32
ana_misc1_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc1_clr;		\/* 0x168 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc1_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc1_set;		\/* 0x164 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc1_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc1_tog;		\/* 0x16c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc2;		\/* 0x170 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc2_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc2_clr;		\/* 0x178 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc2_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc2_set;		\/* 0x174 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_misc2_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ana_misc2_tog;		\/* 0x17c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
ana_tables	include/vsc9953.h	/^	struct vsc9953_ana_ana_tables	ana_tables;$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_ana_tables
anaccfg	include/fsl_usb.h	/^	u32	anaccfg;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
anadig_digprog	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 anadig_digprog;$/;"	m	struct:anadig_reg	typeref:typename:u32
anadig_reg	arch/arm/include/asm/arch-vf610/crm_regs.h	/^struct anadig_reg {$/;"	s
anadrv	include/fsl_usb.h	/^	u32	anadrv;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
anag_efil	include/vsc9953.h	/^	u32	anag_efil;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
analog_ctl1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	analog_ctl1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
analog_ctl2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	analog_ctl2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
analog_ctl3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	analog_ctl3;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
analog_ctl_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	analog_ctl_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
analog_debug_misc0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t analog_debug_misc0;		\/* offset 0x0260 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
analog_debug_misc0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t analog_debug_misc0_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
analog_debug_misc0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t analog_debug_misc0_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
analog_debug_misc0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t analog_debug_misc0_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
analog_pfd_480	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_480;			\/* 0x40f0 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_480_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_480_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_480_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_480_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_480_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_480_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_528	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_528;			\/* 0x4100 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_528_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_528_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_528_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_528_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pfd_528_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pfd_528_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528;			\/* 0x4030 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528_denom	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528_denom;		\/* 0x4060 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528_num	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528_num;			\/* 0x4050 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528_ss	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528_ss;			\/* 0x4040 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_528_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_528_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_audio	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_audio;			\/* 0x4070 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_audio_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_audio_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_audio_denom	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_audio_denom;		\/* 0x4090 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_audio_num	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_audio_num;		\/* 0x4080*\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_audio_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_audio_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_audio_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_audio_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_enet	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_enet;			\/* 0x40e0 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_enet_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_enet_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_enet_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_enet_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_enet_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_enet_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_sys	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_sys;			\/* 0x4000 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_sys_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_sys_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_sys_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_sys_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_sys_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_sys_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_video	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_video;			\/* 0x40a0 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_video_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_video_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_video_denom	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_video_denom;		\/* 0x40c0 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_video_num	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_video_num;		\/* 0x40b0 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_video_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_video_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_pll_video_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_pll_video_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_power_block	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum analog_power_block {$/;"	g
analog_power_block	arch/arm/mach-exynos/include/mach/dp_info.h	/^enum analog_power_block {$/;"	g
analog_reserved0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved0[4];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[4]
analog_reserved1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved1[3];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[3]
analog_reserved2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved2[3];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[3]
analog_reserved3	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved3[3];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[3]
analog_reserved4	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved4[3];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[3]
analog_reserved5	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved5[3];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[3]
analog_reserved6	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved6[3];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[3]
analog_reserved7	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_reserved7[7];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[7]
analog_usb1_pll_480_ctrl	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_usb1_pll_480_ctrl;		\/* 0x4010 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_usb1_pll_480_ctrl_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_usb1_pll_480_ctrl_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_usb1_pll_480_ctrl_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_usb1_pll_480_ctrl_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
analog_usb1_pll_480_ctrl_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 analog_usb1_pll_480_ctrl_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
anaprg	include/fsl_usb.h	/^	u32	anaprg;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
anar_adv_100F	drivers/net/ns8382x.c	/^	anar_adv_100F = 0x0100,$/;"	e	enum:anar_bits	file:
anar_adv_100H	drivers/net/ns8382x.c	/^	anar_adv_100H = 0x0080,$/;"	e	enum:anar_bits	file:
anar_adv_10F	drivers/net/ns8382x.c	/^	anar_adv_10F = 0x0040,$/;"	e	enum:anar_bits	file:
anar_adv_10H	drivers/net/ns8382x.c	/^	anar_adv_10H = 0x0020,$/;"	e	enum:anar_bits	file:
anar_bits	drivers/net/ns8382x.c	/^enum anar_bits {$/;"	g	file:
anar_ieee_8023	drivers/net/ns8382x.c	/^	anar_ieee_8023 = 0x0001,$/;"	e	enum:anar_bits	file:
anasts	include/fsl_usb.h	/^	u32	anasts;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
anatop	arch/arm/dts/imx6qdl.dtsi	/^			anatop: anatop@020c8000 {$/;"	l
anatop	arch/arm/dts/imx6ull.dtsi	/^			anatop: anatop@020c8000 {$/;"	l
anatop_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct anatop_regs {$/;"	s
anchor	drivers/mtd/ubi/ubi.h	/^	int anchor;$/;"	m	struct:ubi_work	typeref:typename:int
anchor	include/smbios.h	/^	u8 anchor[4];$/;"	m	struct:smbios_entry	typeref:typename:u8[4]
anchor_pebs_avalible	drivers/mtd/ubi/fastmap-wl.c	/^static int anchor_pebs_avalible(struct rb_root *root)$/;"	f	typeref:typename:int	file:
anchored	include/slre.h	/^	int		anchored;	\/* Must match from string start	*\/$/;"	m	struct:slre	typeref:typename:int
anchors	test/py/conftest.py	/^anchors = {}$/;"	v
and	doc/README.x86	/^and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0$/;"	l
and	doc/README.x86	/^and decompresses the stage to produce a coreboot rmodule. This is a simple$/;"	l
and_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 and_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
and_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 and_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
and_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 and_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
andes_pcu	include/andestech/andes_pcu.h	/^struct andes_pcu {$/;"	s
andr_img_hdr	include/android_image.h	/^struct andr_img_hdr {$/;"	s
andr_tmp_str	common/image-android.c	/^static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];$/;"	v	typeref:typename:char[]	file:
android_image_check_header	common/image-android.c	/^int android_image_check_header(const struct andr_img_hdr *hdr)$/;"	f	typeref:typename:int
android_image_get_end	common/image-android.c	/^ulong android_image_get_end(const struct andr_img_hdr *hdr)$/;"	f	typeref:typename:ulong
android_image_get_kernel	common/image-android.c	/^int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,$/;"	f	typeref:typename:int
android_image_get_kernel_addr	common/image-android.c	/^static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)$/;"	f	typeref:typename:ulong	file:
android_image_get_kload	common/image-android.c	/^ulong android_image_get_kload(const struct andr_img_hdr *hdr)$/;"	f	typeref:typename:ulong
android_image_get_ramdisk	common/image-android.c	/^int android_image_get_ramdisk(const struct andr_img_hdr *hdr,$/;"	f	typeref:typename:int
android_print_contents	common/image-android.c	/^void android_print_contents(const struct andr_img_hdr *hdr)$/;"	f	typeref:typename:void
annotate_reset	scripts/checkpatch.pl	/^sub annotate_reset {$/;"	s
annotate_values	scripts/checkpatch.pl	/^sub annotate_values {$/;"	s
announce_and_cleanup	arch/arm/lib/bootm.c	/^static void announce_and_cleanup(int fake)$/;"	f	typeref:typename:void	file:
announce_boot_device	common/spl/spl.c	/^static inline void announce_boot_device(u32 boot_device) { }$/;"	f	typeref:typename:void	file:
announce_boot_device	common/spl/spl.c	/^static void announce_boot_device(u32 boot_device)$/;"	f	typeref:typename:void	file:
announce_dram_init	common/board_f.c	/^static int announce_dram_init(void)$/;"	f	typeref:typename:int	file:
ansel	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic ansel;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
ansel	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic ansel;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
ansi_buf	drivers/video/cfb_console.c	/^static char ansi_buf[10];$/;"	v	typeref:typename:char[10]	file:
ansi_buf_size	drivers/video/cfb_console.c	/^static int ansi_buf_size;$/;"	v	typeref:typename:int	file:
ansi_colors_need_revert	drivers/video/cfb_console.c	/^static int ansi_colors_need_revert;$/;"	v	typeref:typename:int	file:
ansi_colour	drivers/serial/sandbox.c	/^static const char * const ansi_colour[] = {$/;"	v	typeref:typename:const char * const[]	file:
ansi_cursor_hidden	drivers/video/cfb_console.c	/^static int ansi_cursor_hidden;$/;"	v	typeref:typename:int	file:
answer	board/esd/vme8349/caddy.h	/^	struct caddy_answer answer[CMD_SIZE];$/;"	m	struct:caddy_interface	typeref:struct:caddy_answer[]
answer	board/esd/vme8349/caddy.h	/^	uint32_t answer;$/;"	m	struct:caddy_answer	typeref:typename:uint32_t
answer_in	board/esd/vme8349/caddy.h	/^	uint32_t answer_in;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
answer_out	board/esd/vme8349/caddy.h	/^	uint32_t answer_out;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
anx9804_init	drivers/video/anx9804.c	/^void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)$/;"	f	typeref:typename:void
anx9804_init	drivers/video/anx9804.h	/^static inline void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate,$/;"	f	typeref:typename:void
any_rec_flag	arch/arm/imx-common/hab.c	/^	bool	 any_rec_flag;$/;"	m	struct:record	typeref:typename:bool	file:
anyof	lib/slre.c	/^anyof(struct slre *r, const char **re)$/;"	f	typeref:typename:void	file:
ao_ctrl	arch/arm/dts/hi6220.dtsi	/^		ao_ctrl: ao_ctrl@f7800000 {$/;"	l
ao_sc	board/hisilicon/hikey/hikey.c	/^struct alwayson_sc_regs *ao_sc =$/;"	v	typeref:struct:alwayson_sc_regs *
aobus	arch/arm/dts/meson-gxbb.dtsi	/^		aobus: aobus@c8100000 {$/;"	l
aocfg0	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	aocfg0;		\/* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg0	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	aocfg0;		\/* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg0	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	aocfg0;		\/* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg1	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	aocfg1;		\/* 0x68: APB_MISC_GP_AOCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg1	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	aocfg1;		\/* 0x68: APB_MISC_GP_AOCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg1	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	aocfg1;		\/* 0x68: APB_MISC_GP_AOCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg1	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	aocfg1;		\/* 0x68: APB_MISC_GP_AOCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg1	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	aocfg1;		\/* 0x68: APB_MISC_GP_AOCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg2	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	aocfg2;		\/* 0x6C: APB_MISC_GP_AOCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg2	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	aocfg2;		\/* 0x6C: APB_MISC_GP_AOCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg2	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	aocfg2;		\/* 0x6c: APB_MISC_GP_AOCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg2	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	aocfg2;		\/* 0x6C: APB_MISC_GP_AOCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg2	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	aocfg2;		\/* 0x6c: APB_MISC_GP_AOCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg3	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	aocfg3;		\/* 0x1A0: APB_MISC_GP_AOCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg3	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	aocfg3;		\/* 0x1A0: APB_MISC_GP_AOCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aocfg3	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	aocfg3;		\/* 0x1A0: APB_MISC_GP_AOCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
aoi_size	drivers/video/fsl_diu_fb.c	/^	__le32 aoi_size;$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
ap	drivers/block/sata_dwc.c	/^static struct ata_port			ap;$/;"	v	typeref:struct:ata_port	file:
ap	drivers/block/sata_dwc.h	/^	struct ata_port		*ap;$/;"	m	struct:ata_link	typeref:struct:ata_port *
ap	drivers/block/sata_dwc.h	/^	struct ata_port		*ap;$/;"	m	struct:ata_queued_cmd	typeref:struct:ata_port *
ap20_is_odm_production_mode	arch/arm/mach-tegra/tegra20/warmboot.c	/^static int ap20_is_odm_production_mode(void)$/;"	f	typeref:typename:int	file:
ap20_is_production_mode	arch/arm/mach-tegra/tegra20/warmboot.c	/^static int ap20_is_production_mode(void)$/;"	f	typeref:typename:int	file:
ap_arg	arch/x86/include/asm/mp.h	/^	void *ap_arg;$/;"	m	struct:mp_flight_record	typeref:typename:void *
ap_call	arch/x86/include/asm/mp.h	/^	mp_callback_t ap_call;$/;"	m	struct:mp_flight_record	typeref:typename:mp_callback_t
ap_claim	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^	struct gpio_desc ap_claim;$/;"	m	struct:i2c_arbitrator_priv	typeref:struct:gpio_desc	file:
ap_count	arch/x86/cpu/sipi_vector.S	/^ap_count:$/;"	l
ap_count	arch/x86/include/asm/sipi.h	/^	atomic_t ap_count;$/;"	m	struct:sipi_params	typeref:typename:atomic_t
ap_do_flight_plan	arch/x86/cpu/mp_init.c	/^static void ap_do_flight_plan(struct udevice *cpu)$/;"	f	typeref:typename:void	file:
ap_en	include/fsl_ddr_sdram.h	/^	unsigned int ap_en;	\/* address parity enable for RDIMM\/DDR4-UDIMM *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
ap_init	arch/x86/cpu/mp_init.c	/^static void ap_init(unsigned int cpu_index)$/;"	f	typeref:typename:void	file:
ap_lid_int_l	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		ap_lid_int_l: ap-lid-int-l {$/;"	l
ap_start	arch/x86/cpu/sipi_vector.S	/^ap_start:$/;"	l
ap_start	arch/x86/include/asm/sipi.h	/^	u32 ap_start;$/;"	m	struct:sipi_params_16bit	typeref:typename:u32
ap_start16	arch/x86/cpu/sipi_vector.S	/^ap_start16:$/;"	l
ap_start16_code_end	arch/x86/cpu/sipi_vector.S	/^ap_start16_code_end:$/;"	l
ap_start_jmp	arch/x86/cpu/sipi_vector.S	/^ap_start_jmp:$/;"	l
ap_syscon	arch/arm/dts/armada-ap806.dtsi	/^			ap_syscon: system-controller@6f4000 {$/;"	l
ap_warm_reset_h	arch/arm/dts/rk3288-veyron.dtsi	/^		ap_warm_reset_h: ap-warm-reset-h {$/;"	l
apalis_t30_padctrl	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^static struct pmux_drvgrp_config apalis_t30_padctrl[] = {$/;"	v	typeref:struct:pmux_drvgrp_config[]
apb	arch/arm/dts/meson-gxbb.dtsi	/^		apb: apb@d0000000 {$/;"	l
apb0	arch/arm/dts/sun4i-a10.dtsi	/^		apb0: apb0@01c20054 {$/;"	l
apb0	arch/arm/dts/sun5i.dtsi	/^		apb0: apb0@01c20054 {$/;"	l
apb0	arch/arm/dts/sun6i-a31.dtsi	/^			apb0: apb0_clk {$/;"	l
apb0	arch/arm/dts/sun7i-a20.dtsi	/^		apb0: apb0@01c20054 {$/;"	l
apb0	arch/arm/dts/sun8i-a23-a33.dtsi	/^			apb0: apb0_clk {$/;"	l
apb0	arch/arm/dts/sun8i-h3.dtsi	/^		apb0: apb0_clk {$/;"	l
apb0	arch/arm/dts/sun9i-a80.dtsi	/^		apb0: clk@06000070 {$/;"	l
apb0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 apb0_cfg;		\/* 0x70 apb0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 apb0_cfg;		\/* 0x70 apb0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_gate	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 apb0_gate;		\/* 0x68 apb0 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_gate	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 apb0_gate;		\/* 0x590 APB0 Clock Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_gate	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 apb0_gate;		\/* 0x028 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
apb0_gate	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 apb0_gate;		\/* 0x68 apb0 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_gate	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 apb0_gate;		\/* 0x590 APB0 Clock Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_gate	arch/arm/include/asm/arch/prcm.h	/^	u32 apb0_gate;		\/* 0x028 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
apb0_gates	arch/arm/dts/sun4i-a10.dtsi	/^		apb0_gates: clk@01c20068 {$/;"	l
apb0_gates	arch/arm/dts/sun5i-a10s.dtsi	/^		apb0_gates: clk@01c20068 {$/;"	l
apb0_gates	arch/arm/dts/sun5i-a13.dtsi	/^		apb0_gates: clk@01c20068 {$/;"	l
apb0_gates	arch/arm/dts/sun6i-a31.dtsi	/^			apb0_gates: apb0_gates_clk {$/;"	l
apb0_gates	arch/arm/dts/sun7i-a20.dtsi	/^		apb0_gates: clk@01c20068 {$/;"	l
apb0_gates	arch/arm/dts/sun8i-a23-a33.dtsi	/^			apb0_gates: apb0_gates_clk {$/;"	l
apb0_gates	arch/arm/dts/sun8i-h3.dtsi	/^		apb0_gates: clk@01f01428 {$/;"	l
apb0_gates	arch/arm/dts/sun9i-a80.dtsi	/^		apb0_gates: clk@06000590 {$/;"	l
apb0_ratio	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 apb0_ratio;		\/* 0x00c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
apb0_ratio	arch/arm/include/asm/arch/prcm.h	/^	u32 apb0_ratio;		\/* 0x00c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
apb0_reset	arch/arm/dts/sun8i-h3.dtsi	/^		apb0_reset: reset@01f014b0 {$/;"	l
apb0_reset	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 apb0_reset;		\/* 0x0b0 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
apb0_reset	arch/arm/include/asm/arch/prcm.h	/^	u32 apb0_reset;		\/* 0x0b0 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
apb0_reset_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 apb0_reset_cfg;	\/* 0x5b0 Bus Software Reset Register 3 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_reset_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 apb0_reset_cfg;	\/* 0x5b0 Bus Software Reset Register 3 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb0_resets	arch/arm/dts/sun9i-a80.dtsi	/^		apb0_resets: reset@060005b0 {$/;"	l
apb0_rst	arch/arm/dts/sun6i-a31.dtsi	/^			apb0_rst: apb0_rst {$/;"	l
apb0_rst	arch/arm/dts/sun8i-a23-a33.dtsi	/^			apb0_rst: apb0_rst {$/;"	l
apb1	arch/arm/dts/sun4i-a10.dtsi	/^		apb1: clk@01c20058 {$/;"	l
apb1	arch/arm/dts/sun50i-a64.dtsi	/^		apb1: apb1_clk@1c20054 {$/;"	l
apb1	arch/arm/dts/sun5i.dtsi	/^		apb1: clk@01c20058 {$/;"	l
apb1	arch/arm/dts/sun6i-a31.dtsi	/^		apb1: apb1@01c20054 {$/;"	l
apb1	arch/arm/dts/sun7i-a20.dtsi	/^		apb1: clk@01c20058 {$/;"	l
apb1	arch/arm/dts/sun8i-a23-a33.dtsi	/^		apb1: apb1_clk@01c20054 {$/;"	l
apb1	arch/arm/dts/sun9i-a80.dtsi	/^		apb1: clk@06000074 {$/;"	l
apb1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 apb1_cfg;		\/* 0x74 apb1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 apb1_cfg;		\/* 0x74 apb1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_clk_div_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 apb1_clk_div_cfg;	\/* 0x58 apb1 clock dividor *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_clk_div_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 apb1_clk_div_cfg;	\/* 0x58 apb1 clock dividor *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 apb1_gate;		\/* 0x6c apb1 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 apb1_gate;		\/* 0x68 apb1 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 apb1_gate;		\/* 0x68 apb1 module clock gating 3 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 apb1_gate;		\/* 0x594 APB1 Clock Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 apb1_gate;		\/* 0x6c apb1 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 apb1_gate;		\/* 0x68 apb1 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 apb1_gate;		\/* 0x68 apb1 module clock gating 3 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gate	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 apb1_gate;		\/* 0x594 APB1 Clock Gating Register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_gates	arch/arm/dts/sun4i-a10.dtsi	/^		apb1_gates: clk@01c2006c {$/;"	l
apb1_gates	arch/arm/dts/sun5i-a10s.dtsi	/^		apb1_gates: clk@01c2006c {$/;"	l
apb1_gates	arch/arm/dts/sun5i-a13.dtsi	/^		apb1_gates: clk@01c2006c {$/;"	l
apb1_gates	arch/arm/dts/sun6i-a31.dtsi	/^		apb1_gates: clk@01c20068 {$/;"	l
apb1_gates	arch/arm/dts/sun7i-a20.dtsi	/^		apb1_gates: clk@01c2006c {$/;"	l
apb1_gates	arch/arm/dts/sun8i-a23-a33.dtsi	/^		apb1_gates: clk@01c20068 {$/;"	l
apb1_gates	arch/arm/dts/sun9i-a80.dtsi	/^		apb1_gates: clk@06000594 {$/;"	l
apb1_psc	arch/arm/mach-stm32/stm32f1/clock.c	/^	u8	apb1_psc;$/;"	m	struct:psc	typeref:typename:u8	file:
apb1_psc	arch/arm/mach-stm32/stm32f4/clock.c	/^	u8	apb1_psc;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
apb1_psc	arch/arm/mach-stm32/stm32f7/clock.c	/^	u8	apb1_psc;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
apb1_reset_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 apb1_reset_cfg;	\/* 0x2d0 APB1 Reset config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_reset_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 apb1_reset_cfg;	\/* 0x5b4 Bus Software Reset Register 4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_reset_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 apb1_reset_cfg;	\/* 0x2d0 APB1 Reset config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_reset_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 apb1_reset_cfg;	\/* 0x5b4 Bus Software Reset Register 4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb1_resets	arch/arm/dts/sun9i-a80.dtsi	/^		apb1_resets: reset@060005b4 {$/;"	l
apb1_rst	arch/arm/dts/sun50i-a64.dtsi	/^		apb1_rst: reset@1c202d0 {$/;"	l
apb1_rst	arch/arm/dts/sun6i-a31.dtsi	/^		apb1_rst: reset@01c202d0 {$/;"	l
apb1_rst	arch/arm/dts/sun8i-a23-a33.dtsi	/^		apb1_rst: reset@01c202d0 {$/;"	l
apb1enr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 apb1enr;	\/* RCC APB1 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1enr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 apb1enr;	\/* RCC APB1 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1enr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 apb1enr;	\/* RCC APB1 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1lpenr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 apb1lpenr;	\/* RCC APB1 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1lpenr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 apb1lpenr;	\/* RCC APB1 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1rstr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 apb1rstr;	\/* RCC APB1 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1rstr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 apb1rstr;	\/* RCC APB1 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb1rstr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 apb1rstr;	\/* RCC APB1 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2	arch/arm/dts/sun50i-a64.dtsi	/^		apb2: apb2_clk@1c20058 {$/;"	l
apb2	arch/arm/dts/sun6i-a31.dtsi	/^		apb2: clk@01c20058 {$/;"	l
apb2	arch/arm/dts/sun8i-a23-a33.dtsi	/^		apb2: clk@01c20058 {$/;"	l
apb2_div	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 apb2_div;		\/* 0x58 APB2 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_div	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 apb2_div;		\/* 0x58 APB2 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_div	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 apb2_div;		\/* 0x58 APB2 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_div	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 apb2_div;		\/* 0x58 APB2 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_gate	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 apb2_gate;		\/* 0x6c apb2 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_gate	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 apb2_gate;		\/* 0x6c apb2 module clock gating 4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_gate	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 apb2_gate;		\/* 0x6c apb2 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_gate	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 apb2_gate;		\/* 0x6c apb2 module clock gating 4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_gates	arch/arm/dts/sun6i-a31.dtsi	/^		apb2_gates: clk@01c2006c {$/;"	l
apb2_gates	arch/arm/dts/sun8i-a23-a33.dtsi	/^		apb2_gates: clk@01c2006c {$/;"	l
apb2_psc	arch/arm/mach-stm32/stm32f1/clock.c	/^	u8	apb2_psc;$/;"	m	struct:psc	typeref:typename:u8	file:
apb2_psc	arch/arm/mach-stm32/stm32f4/clock.c	/^	u8	apb2_psc;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
apb2_psc	arch/arm/mach-stm32/stm32f7/clock.c	/^	u8	apb2_psc;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
apb2_reset_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 apb2_reset_cfg;	\/* 0x2d8 APB2 Reset config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_reset_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 apb2_reset_cfg;	\/* 0x2d8 BUS Reset 4 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_reset_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 apb2_reset_cfg;	\/* 0x2d8 APB2 Reset config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_reset_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 apb2_reset_cfg;	\/* 0x2d8 BUS Reset 4 config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
apb2_rst	arch/arm/dts/sun50i-a64.dtsi	/^		apb2_rst: reset@1c202d8 {$/;"	l
apb2_rst	arch/arm/dts/sun6i-a31.dtsi	/^		apb2_rst: reset@01c202d8 {$/;"	l
apb2_rst	arch/arm/dts/sun8i-a23-a33.dtsi	/^		apb2_rst: reset@01c202d8 {$/;"	l
apb2enr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 apb2enr;	\/* RCC APB2 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2enr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 apb2enr;	\/* RCC APB2 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2enr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 apb2enr;	\/* RCC APB2 peripheral clock enable *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2lpenr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 apb2lpenr;	\/* RCC APB2 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2lpenr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 apb2lpenr;	\/* RCC APB2 periph clk enable in low pwr mode *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2rstr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 apb2rstr;	\/* RCC APB2 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2rstr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 apb2rstr;	\/* RCC APB2 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb2rstr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 apb2rstr;	\/* RCC APB2 peripheral reset *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
apb_misc_gp_ctlr	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^struct apb_misc_gp_ctlr {$/;"	s
apb_misc_gp_ctlr	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^struct apb_misc_gp_ctlr {$/;"	s
apb_misc_gp_ctlr	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^struct apb_misc_gp_ctlr {$/;"	s
apb_misc_gp_ctlr	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^struct apb_misc_gp_ctlr {$/;"	s
apb_misc_gp_ctlr	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^struct apb_misc_gp_ctlr {$/;"	s
apb_misc_gp_xm2cfga_padctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2cfga_padctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2cfgc_padctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2cfgc_padctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2cfgc_padctrl2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2cfgc_padctrl2;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2cfgd_padctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2cfgd_padctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2cfgd_padctrl2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2cfgd_padctrl2;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2clkcfg_padctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2clkcfg_padctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2comp_padctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2comp_padctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_gp_xm2vttgen_padctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 apb_misc_gp_xm2vttgen_padctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
apb_misc_pp_ctlr	arch/arm/include/asm/arch-tegra/apb_misc.h	/^struct apb_misc_pp_ctlr {$/;"	s
apbclk	arch/arc/dts/axs10x.dts	/^		apbclk: apbclk {$/;"	l
apbdma	arch/arm/dts/tegra114.dtsi	/^	apbdma: dma@6000a000 {$/;"	l
apbdma	arch/arm/dts/tegra124.dtsi	/^	apbdma: dma@60020000 {$/;"	l
apbdma	arch/arm/dts/tegra20.dtsi	/^	apbdma: dma@6000a000 {$/;"	l
apbdma	arch/arm/dts/tegra210.dtsi	/^	apbdma: dma@60020000 {$/;"	l
apbdma	arch/arm/dts/tegra30.dtsi	/^	apbdma: dma@6000a000 {$/;"	l
apbs	arch/arm/dts/sun9i-a80.dtsi	/^		apbs: clk@0800141c {$/;"	l
apbs_gates	arch/arm/dts/sun9i-a80.dtsi	/^		apbs_gates: clk@08001428 {$/;"	l
apbs_rst	arch/arm/dts/sun9i-a80.dtsi	/^		apbs_rst: reset@080014b0 {$/;"	l
apbuart_calc_scaler	arch/sparc/cpu/leon3/serial.c	/^static unsigned apbuart_calc_scaler(unsigned apbuart_freq, unsigned baud)$/;"	f	typeref:typename:unsigned	file:
apbwait	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t apbwait;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
apcr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 apcr;	\/*0x1000*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
aper_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 aper_clk_ctrl; \/* 0x12c *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
aperture_size	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t aperture_size;			\/* Offset 0x0044 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
apewarmrstst_reg	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 apewarmrstst_reg;   \/* 0x0514 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
apf27_devices_init	board/armadeus/apf27/apf27.c	/^static int apf27_devices_init(void)$/;"	f	typeref:typename:int	file:
apf27_fpga_setup	board/armadeus/apf27/fpga.c	/^void apf27_fpga_setup(void)$/;"	f	typeref:typename:void
apf27_iomux_init	board/armadeus/apf27/apf27.c	/^static void apf27_iomux_init(void)$/;"	f	typeref:typename:void	file:
apf27_port_init	board/armadeus/apf27/apf27.c	/^static void apf27_port_init(int port, u32 gpio_dr, u32 ocr1, u32 ocr2,$/;"	f	typeref:typename:void	file:
apf27_setup_csx	board/armadeus/apf27/apf27.c	/^static void apf27_setup_csx(void)$/;"	f	typeref:typename:void	file:
apf27_setup_port	board/armadeus/apf27/apf27.c	/^static void apf27_setup_port(void)$/;"	f	typeref:typename:void	file:
api	arch/powerpc/include/asm/mmu.h	/^	unsigned long api:5;$/;"	m	struct:_PTE	typeref:typename:unsigned long:5
api_init	api/api.c	/^void api_init(void)$/;"	f	typeref:typename:void
api_num	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	api_num;		\/* number of API entries *\/$/;"	m	struct:fsp_header	typeref:typename:u32
api_search_sig	examples/api/glue.c	/^int api_search_sig(struct api_signature **sig)$/;"	f	typeref:typename:int
api_signature	include/api_public.h	/^struct api_signature {$/;"	s
api_version	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 api_version;$/;"	m	struct:icc_header	typeref:typename:u32
apic_id	arch/x86/cpu/mp_init.c	/^	int apic_id;$/;"	m	struct:cpu_map	typeref:typename:int	file:
apic_id	arch/x86/include/asm/acpi_table.h	/^	u8 apic_id;		\/* Local APIC ID *\/$/;"	m	struct:acpi_madt_lapic	typeref:typename:u8
apic_id	arch/x86/include/asm/sfi.h	/^	u32	apic_id;$/;"	m	struct:sfi_cpu_table_entry	typeref:typename:u32
apic_wait_timeout	arch/x86/cpu/mp_init.c	/^static int apic_wait_timeout(int total_delay, const char *msg)$/;"	f	typeref:typename:int	file:
apl_s	drivers/mtd/cfi_flash.c	/^	struct apl_s {$/;"	s	function:flash_protect_default	file:
apll_b_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 apll_b_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
apll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	apll_con;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
apll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	apll_con;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
apll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l4;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l4;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l4;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l5;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l5;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l5;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l6;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l6;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l6;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l7;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l7;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l7;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con0_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l8;		\/* 0x1001100 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con0_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l8;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con0_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l8;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con0_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con0_l8;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l4;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l4;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l4;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l5;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l5;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l5;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l6;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l6;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l6;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l7;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l7;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l7;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_con1_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l8;		\/* 0x10011200 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_con1_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l8;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_con1_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l8;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_con1_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_con1_l8;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_init_cfg	drivers/clk/rockchip/clk_rk3036.c	/^static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);$/;"	v	typeref:typename:const struct pll_div	file:
apll_init_cfg	drivers/clk/rockchip/clk_rk3288.c	/^static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);$/;"	v	typeref:typename:const struct pll_div	file:
apll_l_1600_cfg	drivers/clk/rockchip/clk_rk3399.c	/^static const struct pll_div apll_l_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);$/;"	v	typeref:typename:const struct pll_div	file:
apll_l_600_cfg	drivers/clk/rockchip/clk_rk3399.c	/^static const struct pll_div apll_l_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);$/;"	v	typeref:typename:const struct pll_div	file:
apll_l_cfgs	drivers/clk/rockchip/clk_rk3399.c	/^static const struct pll_div *apll_l_cfgs[] = {$/;"	v	typeref:typename:const struct pll_div * []	file:
apll_l_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 apll_l_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
apll_l_frequencies	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^enum apll_l_frequencies {$/;"	g
apll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_lock;			\/* 0x10010000 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
apll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_lock;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
apll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_lock;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
apll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	apll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
apll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	apll_lock;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
apll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	apll_lock;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
apll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_mdiv;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
apll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
apll_pcie_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	apll_pcie_ck: apll_pcie_ck {$/;"	l
apll_pcie_clkvcoldo	arch/arm/dts/dra7xx-clocks.dtsi	/^	apll_pcie_clkvcoldo: apll_pcie_clkvcoldo {$/;"	l
apll_pcie_clkvcoldo_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	apll_pcie_clkvcoldo_div: apll_pcie_clkvcoldo_div {$/;"	l
apll_pcie_in_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 {$/;"	l
apll_pcie_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	apll_pcie_m2_ck: apll_pcie_m2_ck {$/;"	l
apll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_pdiv;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
apll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
apll_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
apll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_sdiv;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
apll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned apll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
apll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
apll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
apll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
apll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
apll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
apll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
apll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
apll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
apll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	apll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
apm_bios_info	arch/x86/include/asm/bootparam.h	/^	struct apm_bios_info apm_bios_info;		\/* 0x040 *\/$/;"	m	struct:boot_params	typeref:struct:apm_bios_info
apm_bios_info	include/linux/apm_bios.h	/^struct apm_bios_info {$/;"	s
apm_event_t	include/linux/apm_bios.h	/^typedef unsigned short	apm_event_t;$/;"	t	typeref:typename:unsigned short
apm_eventinfo_t	include/linux/apm_bios.h	/^typedef unsigned short	apm_eventinfo_t;$/;"	t	typeref:typename:unsigned short
apm_info	include/linux/apm_bios.h	/^struct apm_info {$/;"	s
apmask	drivers/gpio/mvgpio.h	/^	u32 apmask;	\/* Bitwise Mask of Edge Detect Register - 0x009C *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
apmr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $apmr  = $mbar - 1 + 0x00e$/;"	t
app	drivers/net/xilinx_ll_temac_sdma.h	/^		u32 app[5];		\/* application specific data *\/$/;"	m	union:cdmac_bd::__anona2a4323f010a	typeref:typename:u32[5]
app0	drivers/net/xilinx_axi_emac.c	/^	u32 app0;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
app1	drivers/net/xilinx_axi_emac.c	/^	u32 app1;	\/* TX start << 16 | insert *\/$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
app2	drivers/net/xilinx_axi_emac.c	/^	u32 app2;	\/* TX csum seed *\/$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
app2_code_jump_v	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^app2_code_jump_v:       .long 0x0$/;"	l
app2_code_jump_v	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^app2_code_jump_v:       .long 0x0$/;"	l
app3	drivers/net/xilinx_axi_emac.c	/^	u32 app3;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
app4	drivers/net/xilinx_axi_emac.c	/^	u32 app4;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
app_code_barker	tools/imximage.h	/^	uint32_t app_code_barker;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
app_code_csf	tools/imximage.h	/^	uint32_t app_code_csf;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
app_code_csf2	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^app_code_csf2:          .long 0x0$/;"	l
app_code_csf2	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^app_code_csf2:          .long 0x0$/;"	l
app_code_jump_vector	tools/imximage.h	/^	uint32_t app_code_jump_vector;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
app_dest_ptr	tools/imximage.h	/^	uint32_t app_dest_ptr;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
app_gd	lib/efi_loader/efi_boottime.c	/^static volatile void *efi_gd, *app_gd;$/;"	v	typeref:typename:volatile void *	file:
app_id	arch/x86/include/asm/me_common.h	/^	u32 app_id:8;$/;"	m	struct:mbp_item_header	typeref:typename:u32:8
app_startup	examples/standalone/stubs.c	/^void app_startup(char * const *argv)$/;"	f	typeref:typename:void
append	Makefile	/^append = cat $(filter-out $< $(PHONY), $^) >> $@$/;"	m
append	arch/arm/imx-common/Makefile	/^append = cat $(filter-out $< $(PHONY), $^) >> $@$/;"	m
append	cmd/pxe.c	/^	char *append;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
append	fs/yaffs2/yaffsfs.c	/^	u8 append:1;$/;"	m	struct:yaffsfs_FileDes	typeref:typename:u8:1	file:
append_cmd	drivers/crypto/fsl/desc_constr.h	/^static inline void append_cmd(u32 *desc, u32 command)$/;"	f	typeref:typename:void
append_cmd_data	drivers/crypto/fsl/desc_constr.h	/^static inline void append_cmd_data(u32 *desc, void *data, int len,$/;"	f	typeref:typename:void
append_cmd_ptr	drivers/crypto/fsl/desc_constr.h	/^static inline void append_cmd_ptr(u32 *desc, dma_addr_t ptr, int len,$/;"	f	typeref:typename:void
append_cmd_ptr_extlen	drivers/crypto/fsl/desc_constr.h	/^static inline void append_cmd_ptr_extlen(u32 *desc, dma_addr_t ptr,$/;"	f	typeref:typename:void
append_data	common/bootstage.c	/^static void append_data(char **ptrp, char *end, const void *data, int size)$/;"	f	typeref:typename:void	file:
append_data	drivers/crypto/fsl/desc_constr.h	/^static inline void append_data(u32 *desc, void *data, int len)$/;"	f	typeref:typename:void
append_ptr	drivers/crypto/fsl/desc_constr.h	/^static inline void append_ptr(u32 *desc, dma_addr_t ptr)$/;"	f	typeref:typename:void
append_string	scripts/kconfig/zconf.lex.c	/^static void append_string(const char *str, int size)$/;"	f	typeref:typename:void	file:
append_u32	drivers/crypto/fsl/desc_constr.h	/^#define append_u32 /;"	d
append_u64	drivers/crypto/fsl/desc_constr.h	/^static inline void append_u64(u32 *desc, u64 data)$/;"	f	typeref:typename:void
appid	disk/part_iso.h	/^	char					appid[128];		\/* application identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[128]
appid	disk/part_iso.h	/^	char					appid[128];		\/* application identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[128]
applet_name	common/cli_hush.c	/^#define applet_name /;"	d	file:
apply_a57_core_errata	arch/arm/cpu/armv8/start.S	/^apply_a57_core_errata:$/;"	l
apply_replay_entry	fs/ubifs/replay.c	/^static int apply_replay_entry(struct ubifs_info *c, struct replay_entry *r)$/;"	f	typeref:typename:int	file:
apply_replay_list	fs/ubifs/replay.c	/^static int apply_replay_list(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
apq8016_mem_map	arch/arm/mach-snapdragon/sysmap-apq8016.c	/^static struct mm_region apq8016_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
apr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 apr;		\/* 0x240 arbiter period register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
apr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 apr;		\/* 0x240 arbiter period register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
aprebit	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 aprebit;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
aprr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 aprr;	\/*0x1020*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
apsr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 apsr;	\/*0x1004*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
aptc	drivers/net/ftgmac100.h	/^	unsigned int	aptc;		\/* 0x34 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
aptc	drivers/net/ftmac100.h	/^	unsigned int	aptc;		\/* 0x2c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
aptc	drivers/net/ftmac110.h	/^	uint32_t aptc;   \/* 0x2C: Automatic Polling Timer Control Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
apu_base	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define apu_base /;"	d
apu_regs	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct apu_regs {$/;"	s
aq1202_driver	drivers/net/phy/aquantia.c	/^struct phy_driver aq1202_driver = {$/;"	v	typeref:struct:phy_driver
aq2104_driver	drivers/net/phy/aquantia.c	/^struct phy_driver aq2104_driver = {$/;"	v	typeref:struct:phy_driver
aqcsfrc	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short aqcsfrc;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
aqctla	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short aqctla;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
aqctlb	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short aqctlb;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
aqr105_driver	drivers/net/phy/aquantia.c	/^struct phy_driver aqr105_driver = {$/;"	v	typeref:struct:phy_driver
aqr106_driver	drivers/net/phy/aquantia.c	/^struct phy_driver aqr106_driver = {$/;"	v	typeref:struct:phy_driver
aqr107_driver	drivers/net/phy/aquantia.c	/^struct phy_driver aqr107_driver = {$/;"	v	typeref:struct:phy_driver
aqr405_driver	drivers/net/phy/aquantia.c	/^struct phy_driver aqr405_driver = {$/;"	v	typeref:struct:phy_driver
aqsfrc	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short aqsfrc;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
aquantia_config	drivers/net/phy/aquantia.c	/^int aquantia_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
aquantia_startup	drivers/net/phy/aquantia.c	/^int aquantia_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int
ar	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 ar;$/;"	m	struct:stm32_flash_bank_regs	typeref:typename:u32
ar	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 ar;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
ar	arch/arm/mach-at91/include/mach/at91_rtt.h	/^	u32	ar;	\/* Alarm Register  RW 0xFFFFFFFF *\/$/;"	m	struct:at91_rtt	typeref:typename:u32
ar	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 ar;			\/* 0x10 Address *\/$/;"	m	struct:qspi_ctrl	typeref:typename:u16
ar	arch/powerpc/include/asm/immap_512x.h	/^	u32 ar;		\/* Attributes Register *\/$/;"	m	struct:law512x	typeref:typename:u32
ar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ar;			\/* LBIU local access window attribute register *\/$/;"	m	struct:law83xx	typeref:typename:u32
ar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ar;$/;"	m	struct:pex_inbound_window	typeref:typename:u32
ar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ar;$/;"	m	struct:pex_outbound_window	typeref:typename:u32
ar100	arch/arm/dts/sun6i-a31.dtsi	/^			ar100: ar100_clk {$/;"	l
ar100	arch/arm/dts/sun8i-a23-a33.dtsi	/^			ar100: ar100_clk {$/;"	l
ar2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 ar2;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
ar2pden	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 ar2pden;		\/* 0x88: EMC_AR2PDEN *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
ar7xxx_eth_priv	drivers/net/ag7xxx.c	/^struct ar7xxx_eth_priv {$/;"	s	file:
ar8021_config	drivers/net/phy/atheros.c	/^static int ar8021_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ar8031_config	drivers/net/phy/atheros.c	/^static int ar8031_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ar8031_phy_fixup	board/freescale/mx6sabresd/mx6sabresd.c	/^static int ar8031_phy_fixup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ar8031_phy_fixup	board/wandboard/wandboard.c	/^static int ar8031_phy_fixup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ar8035_config	drivers/net/phy/atheros.c	/^static int ar8035_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ar933x_get_xtal	arch/mips/mach-ath79/ar933x/clk.c	/^static u32 ar933x_get_xtal(void)$/;"	f	typeref:typename:u32	file:
ar933x_pinctrl_get_periph_id	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static int ar933x_pinctrl_get_periph_id(struct udevice *dev,$/;"	f	typeref:typename:int	file:
ar933x_pinctrl_ids	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static const struct udevice_id ar933x_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ar933x_pinctrl_ops	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static struct pinctrl_ops ar933x_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
ar933x_pinctrl_priv	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^struct ar933x_pinctrl_priv {$/;"	s	file:
ar933x_pinctrl_probe	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static int ar933x_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ar933x_pinctrl_request	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static int ar933x_pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int	file:
ar933x_pinctrl_set_state_simple	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static int ar933x_pinctrl_set_state_simple(struct udevice *dev,$/;"	f	typeref:typename:int	file:
ar933x_serial_get_baud	drivers/serial/serial_ar933x.c	/^static u32 ar933x_serial_get_baud(u32 clk, u32 scale, u32 step)$/;"	f	typeref:typename:u32	file:
ar933x_serial_get_scale_step	drivers/serial/serial_ar933x.c	/^static void ar933x_serial_get_scale_step(u32 clk, u32 baud,$/;"	f	typeref:typename:void	file:
ar933x_serial_getc	drivers/serial/serial_ar933x.c	/^static int ar933x_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ar933x_serial_ids	drivers/serial/serial_ar933x.c	/^static const struct udevice_id ar933x_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ar933x_serial_ops	drivers/serial/serial_ar933x.c	/^static const struct dm_serial_ops ar933x_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
ar933x_serial_pending	drivers/serial/serial_ar933x.c	/^static int ar933x_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
ar933x_serial_priv	drivers/serial/serial_ar933x.c	/^struct ar933x_serial_priv {$/;"	s	file:
ar933x_serial_probe	drivers/serial/serial_ar933x.c	/^static int ar933x_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ar933x_serial_putc	drivers/serial/serial_ar933x.c	/^static int ar933x_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
ar933x_serial_setbrg	drivers/serial/serial_ar933x.c	/^static int ar933x_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
ar934x_clock_config	arch/mips/mach-ath79/ar934x/clk.c	/^static const struct ar934x_clock_config ar934x_clock_config[] = {$/;"	v	typeref:typename:const struct ar934x_clock_config[]	file:
ar934x_clock_config	arch/mips/mach-ath79/ar934x/clk.c	/^struct ar934x_clock_config {$/;"	s	file:
ar934x_cpupll_to_hz	arch/mips/mach-ath79/ar934x/clk.c	/^static u32 ar934x_cpupll_to_hz(const u32 regval)$/;"	f	typeref:typename:u32	file:
ar934x_ddr_init	arch/mips/mach-ath79/ar934x/ddr.c	/^void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)$/;"	f	typeref:typename:void
ar934x_ddrpll_to_hz	arch/mips/mach-ath79/ar934x/clk.c	/^static u32 ar934x_ddrpll_to_hz(const u32 regval)$/;"	f	typeref:typename:u32	file:
ar934x_get_xtal	arch/mips/mach-ath79/ar934x/clk.c	/^static u32 ar934x_get_xtal(void)$/;"	f	typeref:typename:u32	file:
ar934x_mem_config	arch/mips/mach-ath79/ar934x/ddr.c	/^static const struct ar934x_mem_config ar934x_mem_config[] = {$/;"	v	typeref:typename:const struct ar934x_mem_config[]	file:
ar934x_mem_config	arch/mips/mach-ath79/ar934x/ddr.c	/^struct ar934x_mem_config {$/;"	s	file:
ar934x_pll_config	arch/mips/mach-ath79/ar934x/clk.c	/^struct ar934x_pll_config {$/;"	s	file:
ar934x_pll_init	arch/mips/mach-ath79/ar934x/clk.c	/^void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)$/;"	f	typeref:typename:void
ar934x_srif_pll_cfg	arch/mips/mach-ath79/ar934x/clk.c	/^static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32 srif_val)$/;"	f	typeref:typename:void	file:
ar934x_update_clock	arch/mips/mach-ath79/ar934x/clk.c	/^static void ar934x_update_clock(void)$/;"	f	typeref:typename:void	file:
ar_data	include/net.h	/^	u8		ar_data[0];$/;"	m	struct:arp_hdr	typeref:typename:u8[0]
ar_done	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ar_done;		\/* MBAR_ETH + 0x090 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ar_hln	include/net.h	/^	u8		ar_hln;		\/* Length of hardware address	*\/$/;"	m	struct:arp_hdr	typeref:typename:u8
ar_hrd	include/net.h	/^	u16		ar_hrd;		\/* Format of hardware address	*\/$/;"	m	struct:arp_hdr	typeref:typename:u16
ar_op	include/net.h	/^	u16		ar_op;		\/* Operation			*\/$/;"	m	struct:arp_hdr	typeref:typename:u16
ar_pln	include/net.h	/^	u8		ar_pln;		\/* Length of protocol address	*\/$/;"	m	struct:arp_hdr	typeref:typename:u8
ar_pro	include/net.h	/^	u16		ar_pro;		\/* Format of protocol address	*\/$/;"	m	struct:arp_hdr	typeref:typename:u16
ar_sha	include/net.h	/^#define ar_sha	/;"	d
ar_spa	include/net.h	/^#define ar_spa	/;"	d
ar_tha	include/net.h	/^#define ar_tha	/;"	d
ar_tpa	include/net.h	/^#define ar_tpa	/;"	d
arasan_ecc_matrix	drivers/mtd/nand/arasan_nfc.c	/^struct arasan_ecc_matrix {$/;"	s	file:
arasan_nand_base	drivers/mtd/nand/arasan_nfc.c	/^#define arasan_nand_base /;"	d	file:
arasan_nand_cmd_function	drivers/mtd/nand/arasan_nfc.c	/^static void arasan_nand_cmd_function(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
arasan_nand_command_format	drivers/mtd/nand/arasan_nfc.c	/^struct arasan_nand_command_format {$/;"	s	file:
arasan_nand_commands	drivers/mtd/nand/arasan_nfc.c	/^static struct arasan_nand_command_format arasan_nand_commands[] = {$/;"	v	typeref:struct:arasan_nand_command_format[]	file:
arasan_nand_ecc_init	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_ecc_init(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
arasan_nand_enable_ecc	drivers/mtd/nand/arasan_nfc.c	/^static void arasan_nand_enable_ecc(void)$/;"	f	typeref:typename:void	file:
arasan_nand_erase	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd,$/;"	f	typeref:typename:int	file:
arasan_nand_fill_tx	drivers/mtd/nand/arasan_nfc.c	/^static void arasan_nand_fill_tx(const u8 *buf, int len)$/;"	f	typeref:typename:void	file:
arasan_nand_get_addrcycle	drivers/mtd/nand/arasan_nfc.c	/^static u8 arasan_nand_get_addrcycle(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
arasan_nand_info	drivers/mtd/nand/arasan_nfc.c	/^struct arasan_nand_info {$/;"	s	file:
arasan_nand_init	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)$/;"	f	typeref:typename:int	file:
arasan_nand_page	drivers/mtd/nand/arasan_nfc.c	/^static u8 arasan_nand_page(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
arasan_nand_read_buf	drivers/mtd/nand/arasan_nfc.c	/^static void arasan_nand_read_buf(struct mtd_info *mtd, u8 *buf, int size)$/;"	f	typeref:typename:void	file:
arasan_nand_read_byte	drivers/mtd/nand/arasan_nfc.c	/^static u8 arasan_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
arasan_nand_read_oob	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
arasan_nand_read_page	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_read_page(struct mtd_info *mtd, u8 *buf, u32 size)$/;"	f	typeref:typename:int	file:
arasan_nand_read_page_hwecc	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_read_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
arasan_nand_read_status	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_read_status(struct arasan_nand_command_format *curr_cmd,$/;"	f	typeref:typename:int	file:
arasan_nand_reset	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_reset(struct arasan_nand_command_format *curr_cmd)$/;"	f	typeref:typename:int	file:
arasan_nand_select_chip	drivers/mtd/nand/arasan_nfc.c	/^static void arasan_nand_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
arasan_nand_send_rdcmd	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_send_rdcmd(struct arasan_nand_command_format *curr_cmd,$/;"	f	typeref:typename:int	file:
arasan_nand_send_wrcmd	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_send_wrcmd(struct arasan_nand_command_format *curr_cmd,$/;"	f	typeref:typename:int	file:
arasan_nand_write_buf	drivers/mtd/nand/arasan_nfc.c	/^static void arasan_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)$/;"	f	typeref:typename:void	file:
arasan_nand_write_oob	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_write_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
arasan_nand_write_page_hwecc	drivers/mtd/nand/arasan_nfc.c	/^static int arasan_nand_write_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
arasan_sdhci_bind	drivers/mmc/zynq_sdhci.c	/^static int arasan_sdhci_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arasan_sdhci_ids	drivers/mmc/rockchip_sdhci.c	/^static const struct udevice_id arasan_sdhci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
arasan_sdhci_ids	drivers/mmc/zynq_sdhci.c	/^static const struct udevice_id arasan_sdhci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
arasan_sdhci_ofdata_to_platdata	drivers/mmc/rockchip_sdhci.c	/^static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arasan_sdhci_ofdata_to_platdata	drivers/mmc/zynq_sdhci.c	/^static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arasan_sdhci_plat	drivers/mmc/zynq_sdhci.c	/^struct arasan_sdhci_plat {$/;"	s	file:
arasan_sdhci_probe	drivers/mmc/rockchip_sdhci.c	/^static int arasan_sdhci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arasan_sdhci_probe	drivers/mmc/zynq_sdhci.c	/^static int arasan_sdhci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arb_chnl	drivers/spmi/spmi-msm.c	/^	phys_addr_t arb_chnl; \/* ARB channel mapping base *\/$/;"	m	struct:msm_spmi_priv	typeref:typename:phys_addr_t	file:
arb_icm_ml1	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml1;	\/* 0x7C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml2	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml2;	\/* 0x80 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml3	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml3;	\/* 0x84 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml4	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml4;	\/* 0x88 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml5	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml5;	\/* 0x8C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml6	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml6;	\/* 0x90 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml7	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml7;	\/* 0x94 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml8	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml8;	\/* 0x98 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arb_icm_ml9	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 arb_icm_ml9;	\/* 0x9C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
arbiter	arch/powerpc/include/asm/immap_512x.h	/^	arbiter512x_t		arbiter;	\/* CSB Arbiter *\/$/;"	m	struct:immap	typeref:typename:arbiter512x_t
arbiter	arch/powerpc/include/asm/immap_83xx.h	/^	arbiter83xx_t		arbiter;	\/* System Arbiter Registers *\/$/;"	m	struct:immap	typeref:typename:arbiter83xx_t
arbiter512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct arbiter512x {$/;"	s
arbiter512x_t	arch/powerpc/include/asm/immap_512x.h	/^} arbiter512x_t;$/;"	t	typeref:struct:arbiter512x
arbiter83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct arbiter83xx {$/;"	s
arbiter83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} arbiter83xx_t;$/;"	t	typeref:struct:arbiter83xx
arbiter_event_address	arch/powerpc/include/asm/global_data.h	/^	unsigned long arbiter_event_address;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
arbiter_event_attributes	arch/powerpc/include/asm/global_data.h	/^	unsigned long arbiter_event_attributes;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
arbitration_ahb_mem_wrque_mst_id	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_ahb_mem_wrque_mst_id;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_ahb_mem_wrque_mst_id	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_ahb_mem_wrque_mst_id;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_config	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 arbitration_config[BCT_SDRAM_ARB_CONFIG_WORDS];$/;"	m	struct:sdram_params	typeref:typename:u32[]
arbitration_cop_abort_addr	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_cop_abort_addr;	\/* _ARBITRATION_COP_ABORT_ADDR_0,108h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cop_abort_addr	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_cop_abort_addr;	\/* _ARBITRATION_COP_ABORT_ADDR_0,108h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cop_abort_info	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_cop_abort_info;	\/* _ARBITRATION_COP_ABORT_INFO_0,10ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cop_abort_info	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_cop_abort_info;	\/* _ARBITRATION_COP_ABORT_INFO_0,10ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cpu_abort_addr	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_cpu_abort_addr;	\/* _ARBITRATION_CPU_ABORT_ADDR_0,100h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cpu_abort_addr	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_cpu_abort_addr;	\/* _ARBITRATION_CPU_ABORT_ADDR_0,100h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cpu_abort_info	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_cpu_abort_info;	\/* _ARBITRATION_CPU_ABORT_INFO_0,104h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_cpu_abort_info	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_cpu_abort_info;	\/* _ARBITRATION_CPU_ABORT_INFO_0,104h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_disable	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_disable;	\/* _ARBITRATION_DISABLE_0,	04h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_disable	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_disable;	\/* _ARBITRATION_DISABLE_0,	04h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_priority_ctrl	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_priority_ctrl;	\/* _ARBITRATION_PRIORITY_CTRL_0,08h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_priority_ctrl	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_priority_ctrl;	\/* _ARBITRATION_PRIORITY_CTRL_0,08h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_usr_protect	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_usr_protect;	\/* _ARBITRATION_USR_PROTECT_0,	0ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_usr_protect	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_usr_protect;	\/* _ARBITRATION_USR_PROTECT_0,	0ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_xbar_ctrl	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 arbitration_xbar_ctrl;	\/* _ARBITRATION_XBAR_CTRL_0,	e0h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arbitration_xbar_ctrl	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 arbitration_xbar_ctrl;	\/* _ARBITRATION_XBAR_CTRL_0,	e0h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
arc_serial_getc	drivers/serial/serial_arc.c	/^static int arc_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arc_serial_ids	drivers/serial/serial_arc.c	/^static const struct udevice_id arc_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
arc_serial_ofdata_to_platdata	drivers/serial/serial_arc.c	/^static int arc_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arc_serial_ops	drivers/serial/serial_arc.c	/^static const struct dm_serial_ops arc_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
arc_serial_pending	drivers/serial/serial_arc.c	/^static int arc_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
arc_serial_platdata	drivers/serial/serial_arc.c	/^struct arc_serial_platdata {$/;"	s	file:
arc_serial_probe	drivers/serial/serial_arc.c	/^static int arc_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arc_serial_putc	drivers/serial/serial_arc.c	/^static int arc_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
arc_serial_regs	drivers/serial/serial_arc.c	/^struct arc_serial_regs {$/;"	s	file:
arc_serial_setbrg	drivers/serial/serial_arc.c	/^static int arc_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
arc_serial_tstc	drivers/serial/serial_arc.c	/^static int arc_serial_tstc(struct arc_serial_regs *const regs)$/;"	f	typeref:typename:int	file:
arch	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_arch	arch;$/;"	m	struct:ccsr_rio	typeref:struct:rio_arch
arch	board/freescale/common/ngpixis.h	/^	u8 arch;$/;"	m	struct:ngpixis	typeref:typename:u8
arch	board/freescale/common/qixis.h	/^	u8 arch;    \/* Board version information *\/$/;"	m	struct:qixis	typeref:typename:u8
arch	include/asm-generic/global_data.h	/^	struct arch_global_data arch;	\/* architecture-specific data *\/$/;"	m	struct:global_data	typeref:struct:arch_global_data
arch	include/image.h	/^	uint8_t		arch;			\/* CPU architecture *\/$/;"	m	struct:image_info	typeref:typename:uint8_t
arch	tools/imagetool.h	/^	int arch;$/;"	m	struct:image_tool_params	typeref:typename:int
arch-$(CONFIG_ARM64)	arch/arm/Makefile	/^arch-$(CONFIG_ARM64)		=-march=armv8-a$/;"	m
arch-$(CONFIG_CPU_ARM1136)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_ARM1136)	=-march=armv5$/;"	m
arch-$(CONFIG_CPU_ARM1176)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_ARM1176)	=-march=armv5t$/;"	m
arch-$(CONFIG_CPU_ARM720T)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_ARM720T)	=-march=armv4$/;"	m
arch-$(CONFIG_CPU_ARM920T)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_ARM920T)	=-march=armv4t$/;"	m
arch-$(CONFIG_CPU_ARM926EJS)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_ARM926EJS)	=-march=armv5te$/;"	m
arch-$(CONFIG_CPU_ARM946ES)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_ARM946ES)	=-march=armv5te$/;"	m
arch-$(CONFIG_CPU_PXA)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_PXA)		=$/;"	m
arch-$(CONFIG_CPU_SA1100)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_SA1100)	=-march=armv4$/;"	m
arch-$(CONFIG_CPU_V7)	arch/arm/Makefile	/^arch-$(CONFIG_CPU_V7)		=$(call cc-option, -march=armv7-a, \\$/;"	m
arch-dtbs	dts/Makefile	/^arch-dtbs:$/;"	t
arch-y	arch/arm/Makefile	/^arch-y := $(arch-y)$/;"	m
arch_align_stack	arch/arm/include/asm/system.h	/^#define arch_align_stack(/;"	d
arch_align_stack	arch/sh/include/asm/system.h	/^#define arch_align_stack(/;"	d
arch_auxiliary_core_check_up	arch/arm/cpu/armv7/mx6/soc.c	/^int arch_auxiliary_core_check_up(u32 core_id)$/;"	f	typeref:typename:int
arch_auxiliary_core_check_up	arch/arm/cpu/armv7/mx7/soc.c	/^int arch_auxiliary_core_check_up(u32 core_id)$/;"	f	typeref:typename:int
arch_auxiliary_core_up	arch/arm/cpu/armv7/mx6/soc.c	/^int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)$/;"	f	typeref:typename:int
arch_auxiliary_core_up	arch/arm/cpu/armv7/mx7/soc.c	/^int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)$/;"	f	typeref:typename:int
arch_clk_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^struct clk_lookup arch_clk_tbl[] = {$/;"	v	typeref:struct:clk_lookup[]
arch_clk_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^struct clk_lookup arch_clk_tbl[] = {$/;"	v	typeref:struct:clk_lookup[]
arch_clk_tbl_array_size	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^unsigned int arch_clk_tbl_array_size = ARRAY_SIZE(arch_clk_tbl);$/;"	v	typeref:typename:unsigned int
arch_clk_tbl_array_size	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^unsigned int arch_clk_tbl_array_size = ARRAY_SIZE(arch_clk_tbl);$/;"	v	typeref:typename:unsigned int
arch_cpu_init	arch/arc/lib/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/arm926ejs/armada100/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/arm926ejs/lpc32xx/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/arm926ejs/spear/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/armv7/ls102xa/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/armv7/mx6/soc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/armv7/mx7/soc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/armv7/s5p-common/cpu_info.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/armv7/vf610/generic.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/cpu/pxa/pxa2xx.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-at91/arm920t/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-at91/arm926ejs/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-at91/armv7/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-bcm283x/init.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-davinci/da850_lowlevel.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-keystone/init.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-kirkwood/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-mvebu/arm64-common.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-mvebu/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-orion5x/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-rmobile/cpu_info.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-rockchip/rk3288/rk3288.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-rockchip/rk3399/rk3399.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-socfpga/misc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-stm32/stm32f1/soc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-stm32/stm32f4/soc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-stm32/stm32f7/soc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/arm/mach-zynq/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/avr32/cpu/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/blackfin/cpu/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/mips/cpu/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/sparc/cpu/leon2/cpu_init.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/sparc/cpu/leon3/cpu_init.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/baytrail/valleyview.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/broadwell/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/coreboot/coreboot.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/efi/efi.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/ivybridge/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/ivybridge/ivybridge.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/qemu/qemu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/quark/quark.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/x86/cpu/queensbay/tnc.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	arch/xtensa/cpu/cpu.c	/^int arch_cpu_init(void)$/;"	f	typeref:typename:int
arch_cpu_init	common/board_f.c	/^__weak int arch_cpu_init(void)$/;"	f	typeref:typename:__weak int
arch_cpu_init_dm	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	arch/mips/mach-pic32/cpu.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	arch/nios2/cpu/cpu.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	arch/x86/cpu/baytrail/cpu.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	arch/x86/cpu/broadwell/cpu.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	arch/x86/cpu/ivybridge/cpu.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	arch/x86/cpu/quark/quark.c	/^int arch_cpu_init_dm(void)$/;"	f	typeref:typename:int
arch_cpu_init_dm	common/board_f.c	/^__weak int arch_cpu_init_dm(void)$/;"	f	typeref:typename:__weak int
arch_early_init_r	arch/arc/lib/cpu.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/arm/cpu/armv8/s32v234/cpu.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/arm/mach-mvebu/arm64-common.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/arm/mach-socfpga/misc.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/x86/cpu/qemu/qemu.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/x86/cpu/quark/quark.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	arch/x86/cpu/queensbay/tnc.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/advantech/som-db5800-som-6867/som-db5800-som-6867.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/coreboot/coreboot/coreboot.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/efi/efi-x86/efi.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/google/chromebook_link/link.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/google/chromebook_samus/samus.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/google/chromebox_panther/panther.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/intel/minnowmax/minnowmax.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_early_init_r	board/siemens/rut/board.c	/^int arch_early_init_r(void)$/;"	f	typeref:typename:int
arch_fixup_fdt	arch/arm/lib/bootm-fdt.c	/^int arch_fixup_fdt(void *blob)$/;"	f	typeref:typename:int
arch_fixup_fdt	arch/mips/lib/bootm.c	/^int arch_fixup_fdt(void *blob)$/;"	f	typeref:typename:int
arch_fixup_memory_node	arch/x86/lib/bootm.c	/^int arch_fixup_memory_node(void *blob)$/;"	f	typeref:typename:int
arch_flag	tools/pblimage.c	/^static int arch_flag;$/;"	v	typeref:typename:int	file:
arch_get_mdio_control	drivers/net/macb.c	/^void __weak arch_get_mdio_control(const char *name)$/;"	f	typeref:typename:void __weak
arch_get_page_table	arch/arm/cpu/armv8/cache_v8.c	/^u64 *__weak arch_get_page_table(void) {$/;"	f	typeref:typename:u64 * __weak
arch_get_sp	arch/mips/lib/bootm.c	/^static ulong arch_get_sp(void)$/;"	f	typeref:typename:ulong	file:
arch_global_data	arch/arc/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/arm/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/avr32/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/blackfin/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/m68k/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/microblaze/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/mips/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/nds32/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/nios2/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/openrisc/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/powerpc/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/sandbox/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/sh/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/sparc/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/x86/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_global_data	arch/xtensa/include/asm/global_data.h	/^struct arch_global_data {$/;"	s
arch_has_single_step	arch/blackfin/include/asm/ptrace.h	/^#define arch_has_single_step(/;"	d
arch_is_kernel_data	include/asm-generic/sections.h	/^static inline int arch_is_kernel_data(unsigned long addr)$/;"	f	typeref:typename:int
arch_is_kernel_text	include/asm-generic/sections.h	/^static inline int arch_is_kernel_text(unsigned long addr)$/;"	f	typeref:typename:int
arch_kgdb_breakpoint	arch/blackfin/lib/kgdb.h	/^static inline void arch_kgdb_breakpoint(void)$/;"	f	typeref:typename:void
arch_lmb_reserve	arch/arc/lib/bootm.c	/^void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
arch_lmb_reserve	arch/arm/lib/bootm.c	/^void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
arch_lmb_reserve	arch/m68k/lib/bootm.c	/^void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
arch_lmb_reserve	arch/mips/lib/bootm.c	/^void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
arch_lmb_reserve	arch/powerpc/lib/bootm.c	/^void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
arch_lmb_reserve	arch/sparc/lib/bootm.c	/^void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
arch_lmb_reserve	lib/lmb.c	/^__weak void arch_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:__weak void
arch_memory_failure_handle	arch/powerpc/cpu/mpc85xx/cpu.c	/^void arch_memory_failure_handle(void)$/;"	f	typeref:typename:void
arch_memory_failure_handle	post/drivers/memory.c	/^void arch_memory_failure_handle(void)$/;"	f	typeref:typename:void
arch_memory_test_advance	arch/powerpc/cpu/mpc85xx/cpu.c	/^int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_advance	post/drivers/memory.c	/^int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_cleanup	arch/powerpc/cpu/mpc85xx/cpu.c	/^int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_cleanup	post/drivers/memory.c	/^int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_prepare	arch/powerpc/cpu/mpc85xx/cpu.c	/^int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_prepare	board/keymile/km83xx/km83xx.c	/^int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_prepare	board/keymile/km_arm/km_arm.c	/^int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_memory_test_prepare	post/drivers/memory.c	/^int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/cpu/armv7/am33xx/board.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/cpu/armv7/mx7/soc.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/cpu/armv7/vf610/generic.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/mach-kirkwood/cpu.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/mach-mvebu/cpu.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/mach-orion5x/cpu.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/arm/mach-socfpga/misc.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/blackfin/cpu/cpu.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/x86/cpu/baytrail/valleyview.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/x86/cpu/coreboot/coreboot.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/x86/cpu/efi/efi.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	arch/x86/cpu/quark/quark.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	board/freescale/ls2080a/ls2080a.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	board/freescale/ls2080aqds/ls2080aqds.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	board/freescale/ls2080ardb/ls2080ardb.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	board/toradex/apalis_t30/apalis_t30.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	board/toradex/colibri_t20/colibri_t20.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_misc_init	board/toradex/colibri_t30/colibri_t30.c	/^int arch_misc_init(void)$/;"	f	typeref:typename:int
arch_phys_memset	arch/x86/lib/physmem.c	/^phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)$/;"	f	typeref:typename:phys_addr_t
arch_phys_memset	lib/physmem.c	/^phys_addr_t __weak arch_phys_memset(phys_addr_t s, int c, phys_size_t n)$/;"	f	typeref:typename:phys_addr_t __weak
arch_preboot_os	arch/arm/cpu/armv7/ls102xa/cpu.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	arch/arm/cpu/armv7/omap-common/boot-common.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	arch/arm/imx-common/cpu.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	arch/arm/mach-at91/arm926ejs/cpu.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	arch/arm/mach-at91/armv7/cpu.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	arch/m68k/cpu/mcf530x/cpu_init.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	board/bosch/shc/board.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	board/highbank/highbank.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	board/renesas/rcar-common/common.c	/^void arch_preboot_os(void)$/;"	f	typeref:typename:void
arch_preboot_os	common/bootm_os.c	/^__weak void arch_preboot_os(void)$/;"	f	typeref:typename:__weak void
arch_read_dma	include/qfw.h	/^	void (*arch_read_dma)(struct fw_cfg_dma_access *dma);$/;"	m	struct:fw_cfg_arch_ops	typeref:typename:void (*)(struct fw_cfg_dma_access * dma)
arch_read_pio	include/qfw.h	/^	void (*arch_read_pio)(uint16_t selector, uint32_t size,$/;"	m	struct:fw_cfg_arch_ops	typeref:typename:void (*)(uint16_t selector,uint32_t size,void * address)
arch_reserve_stacks	arch/arm/lib/stack.c	/^int arch_reserve_stacks(void)$/;"	f	typeref:typename:int
arch_reserve_stacks	arch/powerpc/lib/stack.c	/^int arch_reserve_stacks(void)$/;"	f	typeref:typename:int
arch_reserve_stacks	common/board_f.c	/^int arch_reserve_stacks(void)$/;"	f	typeref:typename:int
arch_setup_gd	arch/x86/cpu/cpu.c	/^void arch_setup_gd(gd_t *new_gd)$/;"	f	typeref:typename:void
arch_setup_gd	common/init/board_init.c	/^__weak void arch_setup_gd(struct global_data *gd_ptr)$/;"	f	typeref:typename:__weak void
arch_soc_init	arch/arm/cpu/armv7/ls102xa/soc.c	/^int arch_soc_init(void)$/;"	f	typeref:typename:int
arch_timer_init	arch/arm/mach-tegra/tegra114/clock.c	/^void arch_timer_init(void)$/;"	f	typeref:typename:void
arch_timer_init	arch/arm/mach-tegra/tegra124/clock.c	/^void arch_timer_init(void)$/;"	f	typeref:typename:void
arch_timer_init	arch/arm/mach-tegra/tegra20/clock.c	/^void arch_timer_init(void)$/;"	f	typeref:typename:void
arch_timer_init	arch/arm/mach-tegra/tegra210/clock.c	/^void arch_timer_init(void)$/;"	f	typeref:typename:void
arch_timer_init	arch/arm/mach-tegra/tegra30/clock.c	/^void arch_timer_init(void)$/;"	f	typeref:typename:void
archprepare	Makefile	/^archprepare: prepare1 scripts_basic$/;"	t
archprepare	arch/arm/config.mk	/^archprepare: checkthumb$/;"	t
archprepare	arch/powerpc/config.mk	/^archprepare: checkgcc4$/;"	t
arcuart0	arch/arc/dts/nsim.dts	/^	arcuart0: serial@0xc0fc1000 {$/;"	l
are	doc/README.x86	/^are supported:$/;"	l
area	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t area;$/;"	m	struct:mrq_write_trace_request	typeref:typename:uint32_t
area	arch/x86/include/asm/global_data.h	/^	struct memory_area area[CONFIG_NR_DRAM_BANKS];$/;"	m	struct:memory_info	typeref:struct:memory_area[]
area_list	board/atmel/at91sam9260ek/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/atmel/at91sam9261ek/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/atmel/at91sam9263ek/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/atmel/at91sam9rlek/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/calao/usb_a9263/usb_a9263.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/egnite/ethernut5/ethernut5.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/esd/meesc/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/ronetix/pm9261/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	board/ronetix/pm9263/partition.c	/^dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {$/;"	v	typeref:typename:dataflash_protect_t[]
area_list	include/dataflash.h	/^	dataflash_protect_t area_list[NB_DATAFLASH_AREA]; \/* area protection status *\/$/;"	m	struct:_AT91S_Dataflash	typeref:typename:dataflash_protect_t[]
aref_en	arch/arm/mach-exynos/clock_init.h	/^	unsigned aref_en;$/;"	m	struct:mem_timings	typeref:typename:unsigned
arefstatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int arefstatus;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
areg	arch/xtensa/include/asm/ptrace.h	/^	unsigned long areg[16];		\/* 128 (64) *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long[16]
arena	include/malloc.h	/^  int arena;    \/* total space allocated from system *\/$/;"	m	struct:mallinfo	typeref:typename:int
arg	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 arg;		\/* 0x1c argument *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
arg	arch/arm/include/asm/arch/mmc.h	/^	u32 arg;		\/* 0x1c argument *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
arg	arch/arm/include/asm/omap_mmc.h	/^	unsigned int arg;		\/* 0x108 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
arg	arch/m68k/lib/interrupts.c	/^	void *arg;$/;"	m	struct:interrupt_action	typeref:typename:void *	file:
arg	arch/microblaze/include/asm/microblaze_intc.h	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *
arg	arch/nds32/include/asm/setup.h	/^	const char *arg;$/;"	m	struct:early_params	typeref:typename:const char *
arg	arch/nios2/cpu/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/openrisc/cpu/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/mpc512x/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/mpc5xx/interrupts.c	/^	void *arg;$/;"	m	struct:interrupt_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/mpc8260/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/mpc83xx/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/mpc8xx/interrupts.c	/^	void *arg;$/;"	m	struct:interrupt_action	typeref:typename:void *	file:
arg	arch/powerpc/cpu/ppc4xx/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/sparc/cpu/leon2/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/sparc/cpu/leon2/prom.c	/^	char arg[256];$/;"	m	struct:leon_prom_info	typeref:typename:char[256]	file:
arg	arch/sparc/cpu/leon3/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	arch/sparc/cpu/leon3/prom.c	/^	char arg[256];$/;"	m	struct:leon_prom_info	typeref:typename:char[256]	file:
arg	arch/x86/lib/interrupts.c	/^	void *arg;$/;"	m	struct:irq_action	typeref:typename:void *	file:
arg	board/micronas/vct/scc.h	/^		u32 arg:8;	\/* SCC Debug Command Argument (#)	*\/$/;"	m	struct:scc_debug::__anon903167320308	typeref:typename:u32:8
arg	board/mpl/common/isa.c	/^	 void *arg;$/;"	m	struct:isa_irq_action	typeref:typename:void *	file:
arg	cmd/test.c	/^	int arg;$/;"	m	struct:__anone06382f90108	typeref:typename:int	file:
arg	drivers/crypto/fsl/jr.h	/^	void *arg;$/;"	m	struct:jr_info	typeref:typename:void *
arg	drivers/mmc/mxcmmc.c	/^	u32 arg;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
arg	examples/standalone/sched.c	/^	void *arg;$/;"	m	struct:lthread	typeref:typename:void *	file:
arg_off_size_onenand	cmd/onenand.c	/^static int arg_off_size_onenand(int argc, char * const argv[], ulong *off,$/;"	f	typeref:typename:int	file:
argc	arch/sandbox/include/asm/state.h	/^	int argc;			\/* Program arguments *\/$/;"	m	struct:sandbox_state	typeref:typename:int
argc	common/cli_hush.c	/^	int    argc;                            \/* number of program arguments *\/$/;"	m	struct:child_prog	typeref:typename:int	file:
argcnt	tools/aisimage.c	/^	uint32_t argcnt;$/;"	m	struct:ais_func_exec	typeref:typename:uint32_t	file:
argh	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	argh;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
argl	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	argl;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
argr	include/atmel_mci.h	/^	u32	argr;	\/* 0x10 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
args	arch/sparc/include/asm/prom.h	/^	char args[100];$/;"	m	struct:linux_arguments_v0	typeref:typename:char[100]
args	include/fdtdec.h	/^	uint32_t args[MAX_PHANDLE_ARGS];$/;"	m	struct:fdtdec_phandle_args	typeref:typename:uint32_t[]
args	test/py/test.py	/^args = ['py.test', os.path.dirname(__file__) + '\/tests']$/;"	v
args	tools/buildman/buildman	/^options, args = cmdline.ParseArgs()$/;"	v
args	tools/buildman/buildman.py	/^options, args = cmdline.ParseArgs()$/;"	v
args	tools/kwbimage.c	/^			unsigned int args[BINARY_MAX_ARGS];$/;"	m	struct:image_cfg_element::__anon9793d65d020a::__anon9793d65d0308	typeref:typename:unsigned int[]	file:
args	tools/patman/patman	/^        cover_fname, args = gitutil.CreatePatches(options.start, options.count,$/;"	v
args	tools/patman/patman.py	/^        cover_fname, args = gitutil.CreatePatches(options.start, options.count,$/;"	v
args_count	include/fdtdec.h	/^	int args_count;$/;"	m	struct:fdtdec_phandle_args	typeref:typename:int
argu	include/faraday/ftsdc010.h	/^	unsigned int	argu;		\/* 0x04 - argument reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
argument	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	argument;	\/* _ARGUMENT_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
argument	drivers/mmc/arm_pl180_mmci.h	/^	u32 argument;		\/* 0x08*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
argument	tools/mxsimage.h	/^		uint32_t	argument;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960908	typeref:typename:uint32_t
argument	tools/mxsimage.h	/^		uint32_t	argument;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960a08	typeref:typename:uint32_t
argv	arch/sandbox/include/asm/state.h	/^	char **argv;			\/* Command line arguments *\/$/;"	m	struct:sandbox_state	typeref:typename:char **
argv	arch/sparc/include/asm/prom.h	/^	char * const argv[8];$/;"	m	struct:linux_arguments_v0	typeref:typename:char * const[8]
argv	common/cli_hush.c	/^	char **argv;				\/* program name and arguments *\/$/;"	m	struct:child_prog	typeref:typename:char **	file:
argv_nonnull	common/cli_hush.c	/^	int *argv_nonnull;$/;"	m	struct:child_prog	typeref:typename:int *	file:
arithcomp	cmd/itest.c	/^static int arithcomp (char *s, char *t, int op, int w)$/;"	f	typeref:typename:int	file:
arm	arch/arm/include/asm/processor.h	/^	u32	arm;$/;"	m	union:debug_insn	typeref:typename:u32
arm2_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned arm2_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
arm_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 arm_clk_ctrl; \/* 0x120 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
arm_clk_ratios	arch/arm/mach-exynos/clock_init.h	/^struct arm_clk_ratios {$/;"	s
arm_clk_ratios	arch/arm/mach-exynos/clock_init_exynos5.c	/^struct arm_clk_ratios arm_clk_ratios[] = {$/;"	v	typeref:struct:arm_clk_ratios[]
arm_common_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_common_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_common_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_common_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_common_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_common_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_common_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_common_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_common_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_common_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_common_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core0_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core0_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core0_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core0_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_core1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core1_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_core2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core3_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core3_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core3_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core3_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core3_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core3_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core3_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_core3_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_core_freq	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 arm_core_freq;$/;"	m	struct:bootrom_sw_info	typeref:typename:u32
arm_cpu_l2_0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_cpu_l2_0_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_cpu_l2_0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_cpu_l2_0_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_cpu_l2_0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_cpu_l2_0_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_cpu_l2_1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_cpu_l2_1_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_cpu_l2_1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_cpu_l2_1_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_cpu_l2_1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_cpu_l2_1_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
arm_dcc_getc	drivers/serial/arm_dcc.c	/^static int arm_dcc_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
arm_dcc_ids	drivers/serial/arm_dcc.c	/^static const struct udevice_id arm_dcc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
arm_dcc_ops	drivers/serial/arm_dcc.c	/^static const struct dm_serial_ops arm_dcc_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
arm_dcc_pending	drivers/serial/arm_dcc.c	/^static int arm_dcc_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
arm_dcc_putc	drivers/serial/arm_dcc.c	/^static int arm_dcc_putc(struct udevice *dev, char ch)$/;"	f	typeref:typename:int	file:
arm_ema_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	arm_ema_ctrl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
arm_ema_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	arm_ema_status;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
arm_freq_mhz	arch/arm/mach-exynos/clock_init.h	/^	unsigned arm_freq_mhz;		\/* Frequency of ARM core in MHz *\/$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
arm_freq_mhz	arch/arm/mach-exynos/include/mach/spl.h	/^	unsigned	arm_freq_mhz;	\/* ARM Frequency in MHz *\/$/;"	m	struct:spl_machine_param	typeref:typename:unsigned
arm_init_before_mmu	arch/arm/cpu/armv7/cache_v7.c	/^void arm_init_before_mmu(void)$/;"	f	typeref:typename:void
arm_init_before_mmu	arch/arm/lib/cache-cp15.c	/^__weak void arm_init_before_mmu(void)$/;"	f	typeref:typename:__weak void
arm_init_domains	arch/arm/cpu/armv7/cache_v7.c	/^void arm_init_domains(void)$/;"	f	typeref:typename:void
arm_init_domains	arch/arm/cpu/armv7/omap-common/omap-cache.c	/^void arm_init_domains(void)$/;"	f	typeref:typename:void
arm_init_domains	arch/arm/lib/cache-cp15.c	/^__weak void arm_init_domains(void)$/;"	f	typeref:typename:__weak void
arm_intmux	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	arm_intmux;	\/* 0x18 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
arm_l2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_l2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_l2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_l2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_l2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_l2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_l2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
arm_l2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	arm_l2_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
arm_pl180_mmci_init	drivers/mmc/arm_pl180_mmci.c	/^int arm_pl180_mmci_init(struct pl180_mmc_host *host)$/;"	f	typeref:typename:int
arm_pl180_mmci_ops	drivers/mmc/arm_pl180_mmci.c	/^static const struct mmc_ops arm_pl180_mmci_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
arm_pll_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 arm_pll_ctrl; \/* 0x100 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
arm_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned arm_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
arm_speeds	board/ti/ks2_evm/board_k2g.c	/^static int arm_speeds[DEVSPEED_NUMSPDS] = {$/;"	v	typeref:typename:int[]	file:
arm_timer_clk	arch/arm/dts/uniphier-ld4.dtsi	/^		arm_timer_clk: arm_timer_clk {$/;"	l
arm_timer_clk	arch/arm/dts/uniphier-pro4.dtsi	/^		arm_timer_clk: arm_timer_clk {$/;"	l
arm_timer_clk	arch/arm/dts/uniphier-pro5.dtsi	/^		arm_timer_clk: arm_timer_clk {$/;"	l
arm_timer_clk	arch/arm/dts/uniphier-pxs2.dtsi	/^		arm_timer_clk: arm_timer_clk {$/;"	l
arm_timer_clk	arch/arm/dts/uniphier-sld3.dtsi	/^		arm_timer_clk: arm_timer_clk {$/;"	l
arm_timer_clk	arch/arm/dts/uniphier-sld8.dtsi	/^		arm_timer_clk: arm_timer_clk {$/;"	l
arm_z_header	arch/arm/lib/zimage.c	/^struct arm_z_header {$/;"	s	file:
arm_z_header	arch/sandbox/lib/bootm.c	/^struct arm_z_header {$/;"	s	file:
armada100_fec_register	drivers/net/armada100_fec.c	/^int armada100_fec_register(unsigned long base_addr)$/;"	f	typeref:typename:int
armada_370_xp_mbus_win_offset	arch/arm/mach-mvebu/mbus.c	/^static unsigned int armada_370_xp_mbus_win_offset(int win)$/;"	f	typeref:typename:unsigned int	file:
armclk_ema_ctrl_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_ema_ctrl_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
armclk_ema_status_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_ema_status_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
armclk_stopctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_stopctrl;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
armclk_stopctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_stopctrl;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
armclk_stopctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_stopctrl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
armclk_stopctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_stopctrl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
armclk_stopctrl_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	armclk_stopctrl_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
armcore	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^static unsigned long armcore(void)$/;"	f	typeref:typename:unsigned long	file:
armd1_sdram_base	arch/arm/cpu/arm926ejs/armada100/dram.c	/^u32 armd1_sdram_base(int chip_sel)$/;"	f	typeref:typename:u32
armd1_sdram_size	arch/arm/cpu/arm926ejs/armada100/dram.c	/^u32 armd1_sdram_size(int chip_sel)$/;"	f	typeref:typename:u32
armd1apb1_registers	arch/arm/include/asm/arch-armada100/cpu.h	/^struct armd1apb1_registers {$/;"	s
armd1apb2_registers	arch/arm/include/asm/arch-armada100/cpu.h	/^struct armd1apb2_registers {$/;"	s
armd1apmu_registers	arch/arm/include/asm/arch-armada100/cpu.h	/^struct armd1apmu_registers {$/;"	s
armd1cpu_registers	arch/arm/include/asm/arch-armada100/cpu.h	/^struct armd1cpu_registers {$/;"	s
armd1ddr_map_registers	arch/arm/cpu/arm926ejs/armada100/dram.c	/^struct armd1ddr_map_registers {$/;"	s	file:
armd1ddr_registers	arch/arm/cpu/arm926ejs/armada100/dram.c	/^struct armd1ddr_registers {$/;"	s	file:
armd1mpmu_registers	arch/arm/include/asm/arch-armada100/cpu.h	/^struct armd1mpmu_registers {$/;"	s
armd1tmr_registers	arch/arm/cpu/arm926ejs/armada100/timer.c	/^struct armd1tmr_registers {$/;"	s	file:
armd1usb_phy_reg	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^struct armd1usb_phy_reg {$/;"	s
armd_spi_slave	drivers/spi/armada100_spi.c	/^struct armd_spi_slave {$/;"	s	file:
armdbg_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 armdbg_ctr_reg;	\/* 0x4 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
armdfec_device	drivers/net/armada100_fec.h	/^struct armdfec_device {$/;"	s
armdfec_halt	drivers/net/armada100_fec.c	/^static void armdfec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
armdfec_init	drivers/net/armada100_fec.c	/^static int armdfec_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
armdfec_init_rx_desc_ring	drivers/net/armada100_fec.c	/^static void armdfec_init_rx_desc_ring(struct armdfec_device *darmdfec)$/;"	f	typeref:typename:void	file:
armdfec_phy_timeout	drivers/net/armada100_fec.c	/^static int armdfec_phy_timeout(u32 *reg, u32 flag, int cond)$/;"	f	typeref:typename:int	file:
armdfec_recv	drivers/net/armada100_fec.c	/^static int armdfec_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
armdfec_reg	drivers/net/armada100_fec.h	/^struct armdfec_reg {$/;"	s
armdfec_send	drivers/net/armada100_fec.c	/^static int armdfec_send(struct eth_device *dev, void *dataptr, int datasize)$/;"	f	typeref:typename:int	file:
armpll_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	armpll_clk, ddrpll_clk, iopll_clk,$/;"	e	enum:zynq_clk
armpll_clk_tab	arch/arm/cpu/armv7/iproc-common/armpll.c	/^struct armpll_parameters armpll_clk_tab[] = {$/;"	v	typeref:struct:armpll_parameters[]
armpll_config	arch/arm/cpu/armv7/iproc-common/armpll.c	/^uint32_t armpll_config(uint32_t clkmhz)$/;"	f	typeref:typename:uint32_t
armpll_parameters	arch/arm/cpu/armv7/iproc-common/armpll.c	/^struct armpll_parameters {$/;"	s	file:
armpllclk	arch/arm/dts/k2hk-clocks.dtsi	/^	armpllclk: armpllclk@2620370 {$/;"	l
armpllclk	arch/arm/dts/k2l-clocks.dtsi	/^	armpllclk: armpllclk@2620370 {$/;"	l
armv7_apply_memory_carveout	arch/arm/cpu/armv7/virt-dt.c	/^int armv7_apply_memory_carveout(u64 *start, u64 *size)$/;"	f	typeref:typename:int
armv7_boot_nonsec	arch/arm/lib/bootm.c	/^bool armv7_boot_nonsec(void)$/;"	f	typeref:typename:bool
armv7_boot_nonsec_default	arch/arm/lib/bootm.c	/^__weak bool armv7_boot_nonsec_default(void)$/;"	f	typeref:typename:__weak bool
armv7_boot_nonsec_default	board/armltd/vexpress/vexpress_tc2.c	/^bool armv7_boot_nonsec_default(void)$/;"	f	typeref:typename:bool
armv7_init_nonsec	arch/arm/cpu/armv7/virt-v7.c	/^int armv7_init_nonsec(void)$/;"	f	typeref:typename:int
arp_entry	arch/powerpc/include/asm/ppc4xx-emac.h	/^struct arp_entry {$/;"	s
arp_hdr	include/net.h	/^struct arp_hdr {$/;"	s
arp_init	net/arp.c	/^void arp_init(void)$/;"	f	typeref:typename:void
arp_ip	drivers/net/sandbox-raw.c	/^static struct in_addr arp_ip;$/;"	v	typeref:struct:in_addr	file:
arp_packet_handler	net/net.c	/^static rxhand_f *arp_packet_handler;$/;"	v	typeref:typename:rxhand_f *	file:
arp_raw_request	net/arp.c	/^void arp_raw_request(struct in_addr source_ip, const uchar *target_ethaddr,$/;"	f	typeref:typename:void
arp_receive	net/arp.c	/^void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len)$/;"	f	typeref:typename:void
arp_request	net/arp.c	/^void arp_request(void)$/;"	f	typeref:typename:void
arp_timeout_check	net/arp.c	/^int arp_timeout_check(void)$/;"	f	typeref:typename:int
arp_tx_packet	net/arp.c	/^static uchar   *arp_tx_packet;	\/* THE ARP transmit packet *\/$/;"	v	typeref:typename:uchar *	file:
arp_tx_packet_buf	net/arp.c	/^static uchar	arp_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];$/;"	v	typeref:typename:uchar[]	file:
arp_wait_packet_ethaddr	net/arp.c	/^uchar	       *arp_wait_packet_ethaddr;$/;"	v	typeref:typename:uchar *
arp_wait_timer_start	net/arp.c	/^ulong		arp_wait_timer_start;$/;"	v	typeref:typename:ulong
arp_wait_try	net/arp.c	/^int		arp_wait_try;$/;"	v	typeref:typename:int
arp_wait_tx_packet_size	net/arp.c	/^int		arp_wait_tx_packet_size;$/;"	v	typeref:typename:int
arr	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 arr;$/;"	m	struct:gpt_regs	typeref:typename:u32
arr	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 arr;$/;"	m	struct:gpt_regs	typeref:typename:u32
arr	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 arr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
arr	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 arr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
arr	fs/ubifs/ubifs.h	/^	struct ubifs_lprops **arr;$/;"	m	struct:ubifs_lpt_heap	typeref:struct:ubifs_lprops **
arr1	lib/bzip2/bzlib_private.h	/^      UInt32*  arr1;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32 *
arr2	lib/bzip2/bzlib_private.h	/^      UInt32*  arr2;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32 *
array_number	include/linux/edd.h	/^			__u32 array_number;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1008	typeref:typename:__u32
array_of_unicode_codepoints	drivers/video/stb_truetype.h	/^   int *array_of_unicode_codepoints;       \/\/ if non-zero, then this is an array of unicode co/;"	m	struct:__anonce392f790408	typeref:typename:int *
array_search	drivers/input/input.c	/^static int array_search(int *array, int count, int key)$/;"	f	typeref:typename:int	file:
arsr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 arsr;	\/*0x1028*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
as	doc/README.x86	/^as documented in the BIOS Writer Guide, including initialization of the CPU,$/;"	l
as3722_default	arch/arm/dts/tegra124-cei-tk1-som.dts	/^			as3722_default: pinmux {$/;"	l	label:pmic
as3722_default	arch/arm/dts/tegra124-jetson-tk1.dts	/^			as3722_default: pinmux {$/;"	l	label:pmic
as3722_default	arch/arm/dts/tegra124-nyan.dtsi	/^			as3722_default: pinmux {$/;"	l	label:pmic
as3722_get	drivers/power/as3722.c	/^int as3722_get(struct udevice **devp)$/;"	f	typeref:typename:int
as3722_gpio_configure	drivers/power/as3722.c	/^int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,$/;"	f	typeref:typename:int
as3722_gpio_direction_output	drivers/power/as3722.c	/^int as3722_gpio_direction_output(struct udevice *pmic, unsigned int gpio,$/;"	f	typeref:typename:int
as3722_gpio_set	drivers/power/as3722.c	/^static int as3722_gpio_set(struct udevice *pmic, unsigned int gpio,$/;"	f	typeref:typename:int	file:
as3722_init	drivers/power/as3722.c	/^int as3722_init(struct udevice **devp)$/;"	f	typeref:typename:int
as3722_ldo_enable	drivers/power/as3722.c	/^int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)$/;"	f	typeref:typename:int
as3722_ldo_set_voltage	drivers/power/as3722.c	/^int as3722_ldo_set_voltage(struct udevice *pmic, unsigned int ldo, u8 value)$/;"	f	typeref:typename:int
as3722_read	drivers/power/as3722.c	/^int as3722_read(struct udevice *pmic, u8 reg, u8 *value)$/;"	f	typeref:typename:int
as3722_read_id	drivers/power/as3722.c	/^static int as3722_read_id(struct udevice *pmic, u8 *id, u8 *revision)$/;"	f	typeref:typename:int	file:
as3722_sd_enable	drivers/power/as3722.c	/^int as3722_sd_enable(struct udevice *pmic, unsigned int sd)$/;"	f	typeref:typename:int
as3722_sd_set_voltage	drivers/power/as3722.c	/^int as3722_sd_set_voltage(struct udevice *pmic, unsigned int sd, u8 value)$/;"	f	typeref:typename:int
as3722_write	drivers/power/as3722.c	/^int as3722_write(struct udevice *pmic, u8 reg, u8 value)$/;"	f	typeref:typename:int
as_bus_params	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	struct bus_params as_bus_params[MAX_BUS_NUM];$/;"	m	struct:if_params	typeref:struct:bus_params[]
as_bytes	fs/yaffs2/yaffs_guts.h	/^	u8 as_bytes[8];$/;"	m	union:yaffs_tags_union	typeref:typename:u8[8]
as_tags	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_tags as_tags;$/;"	m	union:yaffs_tags_union	typeref:struct:yaffs_tags
ascii	include/linux/fb.h	/^	__u8  ascii[14];		\/* ? *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8[14]
ascii2unicode	include/efi_loader.h	/^static inline void ascii2unicode(u16 *unicode, const char *ascii)$/;"	f	typeref:typename:void
ascii2utf	drivers/usb/host/sl811-hcd.c	/^static int ascii2utf (char *s, u8 *utf, int utfmax)$/;"	f	typeref:typename:int	file:
asf_firmware_present	drivers/net/e1000.h	/^	uint32_t		asf_firmware_present;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
asfar	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 asfar;	\/*0x050 AIB Secure First Access Reg*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
ashrsi3_0	arch/sh/lib/ashrsi3.S	/^ashrsi3_0:$/;"	l
ashrsi3_1	arch/sh/lib/ashrsi3.S	/^ashrsi3_1:$/;"	l
ashrsi3_10	arch/sh/lib/ashrsi3.S	/^ashrsi3_10:$/;"	l
ashrsi3_11	arch/sh/lib/ashrsi3.S	/^ashrsi3_11:$/;"	l
ashrsi3_12	arch/sh/lib/ashrsi3.S	/^ashrsi3_12:$/;"	l
ashrsi3_13	arch/sh/lib/ashrsi3.S	/^ashrsi3_13:$/;"	l
ashrsi3_14	arch/sh/lib/ashrsi3.S	/^ashrsi3_14:$/;"	l
ashrsi3_15	arch/sh/lib/ashrsi3.S	/^ashrsi3_15:$/;"	l
ashrsi3_16	arch/sh/lib/ashrsi3.S	/^ashrsi3_16:$/;"	l
ashrsi3_17	arch/sh/lib/ashrsi3.S	/^ashrsi3_17:$/;"	l
ashrsi3_18	arch/sh/lib/ashrsi3.S	/^ashrsi3_18:$/;"	l
ashrsi3_19	arch/sh/lib/ashrsi3.S	/^ashrsi3_19:$/;"	l
ashrsi3_2	arch/sh/lib/ashrsi3.S	/^ashrsi3_2:$/;"	l
ashrsi3_20	arch/sh/lib/ashrsi3.S	/^ashrsi3_20:$/;"	l
ashrsi3_21	arch/sh/lib/ashrsi3.S	/^ashrsi3_21:$/;"	l
ashrsi3_22	arch/sh/lib/ashrsi3.S	/^ashrsi3_22:$/;"	l
ashrsi3_23	arch/sh/lib/ashrsi3.S	/^ashrsi3_23:$/;"	l
ashrsi3_24	arch/sh/lib/ashrsi3.S	/^ashrsi3_24:$/;"	l
ashrsi3_25	arch/sh/lib/ashrsi3.S	/^ashrsi3_25:$/;"	l
ashrsi3_26	arch/sh/lib/ashrsi3.S	/^ashrsi3_26:$/;"	l
ashrsi3_27	arch/sh/lib/ashrsi3.S	/^ashrsi3_27:$/;"	l
ashrsi3_28	arch/sh/lib/ashrsi3.S	/^ashrsi3_28:$/;"	l
ashrsi3_29	arch/sh/lib/ashrsi3.S	/^ashrsi3_29:$/;"	l
ashrsi3_3	arch/sh/lib/ashrsi3.S	/^ashrsi3_3:$/;"	l
ashrsi3_30	arch/sh/lib/ashrsi3.S	/^ashrsi3_30:$/;"	l
ashrsi3_31	arch/sh/lib/ashrsi3.S	/^ashrsi3_31:$/;"	l
ashrsi3_4	arch/sh/lib/ashrsi3.S	/^ashrsi3_4:$/;"	l
ashrsi3_5	arch/sh/lib/ashrsi3.S	/^ashrsi3_5:$/;"	l
ashrsi3_6	arch/sh/lib/ashrsi3.S	/^ashrsi3_6:$/;"	l
ashrsi3_7	arch/sh/lib/ashrsi3.S	/^ashrsi3_7:$/;"	l
ashrsi3_8	arch/sh/lib/ashrsi3.S	/^ashrsi3_8:$/;"	l
ashrsi3_9	arch/sh/lib/ashrsi3.S	/^ashrsi3_9:$/;"	l
ashrsi3_table	arch/sh/lib/ashrsi3.S	/^ashrsi3_table:$/;"	l
asir	drivers/rtc/mpc5xxx.c	/^	volatile ulong	asir;	\/* MBAR+0x818: alarm and stopwatch interrupt register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
asix_basic_reset	drivers/usb/eth/asix.c	/^static int asix_basic_reset(struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
asix_basic_reset	drivers/usb/eth/asix88179.c	/^static int asix_basic_reset(struct ueth_data *dev,$/;"	f	typeref:typename:int	file:
asix_dongle	drivers/usb/eth/asix.c	/^struct asix_dongle {$/;"	s	file:
asix_dongle	drivers/usb/eth/asix88179.c	/^struct asix_dongle {$/;"	s	file:
asix_dongles	drivers/usb/eth/asix.c	/^static const struct asix_dongle asix_dongles[] = {$/;"	v	typeref:typename:const struct asix_dongle[]	file:
asix_dongles	drivers/usb/eth/asix88179.c	/^static const struct asix_dongle asix_dongles[] = {$/;"	v	typeref:typename:const struct asix_dongle[]	file:
asix_eth_before_probe	drivers/usb/eth/asix.c	/^void asix_eth_before_probe(void)$/;"	f	typeref:typename:void
asix_eth_get_info	drivers/usb/eth/asix.c	/^int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss,$/;"	f	typeref:typename:int
asix_eth_id_table	drivers/usb/eth/asix.c	/^static const struct usb_device_id asix_eth_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
asix_eth_ops	drivers/usb/eth/asix.c	/^static const struct eth_ops asix_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
asix_eth_probe	drivers/usb/eth/asix.c	/^int asix_eth_probe(struct usb_device *dev, unsigned int ifnum,$/;"	f	typeref:typename:int
asix_eth_probe	drivers/usb/eth/asix.c	/^static int asix_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
asix_eth_recv	drivers/usb/eth/asix.c	/^int asix_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
asix_eth_send	drivers/usb/eth/asix.c	/^int asix_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
asix_eth_start	drivers/usb/eth/asix.c	/^static int asix_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
asix_eth_stop	drivers/usb/eth/asix.c	/^void asix_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void
asix_free_pkt	drivers/usb/eth/asix.c	/^static int asix_free_pkt(struct udevice *dev, uchar *packet, int packet_len)$/;"	f	typeref:typename:int	file:
asix_get_phy_addr	drivers/usb/eth/asix.c	/^static inline int asix_get_phy_addr(struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
asix_halt	drivers/usb/eth/asix.c	/^static void asix_halt(struct eth_device *eth)$/;"	f	typeref:typename:void	file:
asix_halt	drivers/usb/eth/asix88179.c	/^static void asix_halt(struct eth_device *eth)$/;"	f	typeref:typename:void	file:
asix_init	drivers/usb/eth/asix.c	/^static int asix_init(struct eth_device *eth, bd_t *bd)$/;"	f	typeref:typename:int	file:
asix_init	drivers/usb/eth/asix88179.c	/^static int asix_init(struct eth_device *eth, bd_t *bd)$/;"	f	typeref:typename:int	file:
asix_init_common	drivers/usb/eth/asix.c	/^static int asix_init_common(struct ueth_data *dev, uint8_t *enetaddr)$/;"	f	typeref:typename:int	file:
asix_init_common	drivers/usb/eth/asix88179.c	/^static int asix_init_common(struct ueth_data *dev,$/;"	f	typeref:typename:int	file:
asix_mdio_read	drivers/usb/eth/asix.c	/^static int asix_mdio_read(struct ueth_data *dev, int phy_id, int loc)$/;"	f	typeref:typename:int	file:
asix_mdio_write	drivers/usb/eth/asix.c	/^asix_mdio_write(struct ueth_data *dev, int phy_id, int loc, int val)$/;"	f	typeref:typename:void	file:
asix_private	drivers/usb/eth/asix.c	/^struct asix_private {$/;"	s	file:
asix_private	drivers/usb/eth/asix88179.c	/^struct asix_private {$/;"	s	file:
asix_read_cmd	drivers/usb/eth/asix.c	/^static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,$/;"	f	typeref:typename:int	file:
asix_read_cmd	drivers/usb/eth/asix88179.c	/^static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,$/;"	f	typeref:typename:int	file:
asix_read_mac	drivers/usb/eth/asix88179.c	/^static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr)$/;"	f	typeref:typename:int	file:
asix_read_mac_common	drivers/usb/eth/asix.c	/^static int asix_read_mac_common(struct ueth_data *dev,$/;"	f	typeref:typename:int	file:
asix_read_rx_ctl	drivers/usb/eth/asix.c	/^static u16 asix_read_rx_ctl(struct ueth_data *dev)$/;"	f	typeref:typename:u16	file:
asix_recv	drivers/usb/eth/asix.c	/^static int asix_recv(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
asix_recv	drivers/usb/eth/asix88179.c	/^static int asix_recv(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
asix_send	drivers/usb/eth/asix.c	/^static int asix_send(struct eth_device *eth, void *packet, int length)$/;"	f	typeref:typename:int	file:
asix_send	drivers/usb/eth/asix88179.c	/^static int asix_send(struct eth_device *eth, void *packet, int length)$/;"	f	typeref:typename:int	file:
asix_send_common	drivers/usb/eth/asix.c	/^static int asix_send_common(struct ueth_data *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
asix_send_common	drivers/usb/eth/asix88179.c	/^static int asix_send_common(struct ueth_data *dev,$/;"	f	typeref:typename:int	file:
asix_set_hw_mii	drivers/usb/eth/asix.c	/^static inline int asix_set_hw_mii(struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
asix_set_sw_mii	drivers/usb/eth/asix.c	/^static inline int asix_set_sw_mii(struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
asix_sw_reset	drivers/usb/eth/asix.c	/^static int asix_sw_reset(struct ueth_data *dev, u8 flags)$/;"	f	typeref:typename:int	file:
asix_wait_link	drivers/usb/eth/asix88179.c	/^static int asix_wait_link(struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
asix_write_cmd	drivers/usb/eth/asix.c	/^static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,$/;"	f	typeref:typename:int	file:
asix_write_cmd	drivers/usb/eth/asix88179.c	/^static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,$/;"	f	typeref:typename:int	file:
asix_write_gpio	drivers/usb/eth/asix.c	/^static int asix_write_gpio(struct ueth_data *dev, u16 value, int sleep)$/;"	f	typeref:typename:int	file:
asix_write_hwaddr	drivers/usb/eth/asix.c	/^int asix_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
asix_write_hwaddr	drivers/usb/eth/asix.c	/^static int asix_write_hwaddr(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
asix_write_hwaddr	drivers/usb/eth/asix88179.c	/^static int asix_write_hwaddr(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
asix_write_hwaddr_common	drivers/usb/eth/asix.c	/^static int asix_write_hwaddr_common(struct ueth_data *dev, uint8_t *enetaddr)$/;"	f	typeref:typename:int	file:
asix_write_mac	drivers/usb/eth/asix88179.c	/^static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr)$/;"	f	typeref:typename:int	file:
asix_write_medium_mode	drivers/usb/eth/asix.c	/^static int asix_write_medium_mode(struct ueth_data *dev, u16 mode)$/;"	f	typeref:typename:int	file:
asix_write_rx_ctl	drivers/usb/eth/asix.c	/^static int asix_write_rx_ctl(struct ueth_data *dev, u16 mode)$/;"	f	typeref:typename:int	file:
asl_l	arch/arc/lib/_millicodethunk.S	/^#define asl_l /;"	d	file:
aslc_id	arch/x86/include/asm/acpi_table.h	/^	char aslc_id[4];	\/* ASL compiler vendor ID *\/$/;"	m	struct:acpi_table_header	typeref:typename:char[4]
aslc_revision	arch/x86/include/asm/acpi_table.h	/^	u32 aslc_revision;	\/* ASL compiler revision number *\/$/;"	m	struct:acpi_table_header	typeref:typename:u32
asm_boot_nand_copy	arch/m68k/cpu/mcf5445x/start.S	/^asm_boot_nand_copy:$/;"	l
asm_delay	arch/m68k/cpu/mcf5445x/start.S	/^asm_delay:$/;"	l
asm_dram_init	arch/m68k/cpu/mcf5227x/start.S	/^asm_dram_init:$/;"	l
asm_dram_init	arch/m68k/cpu/mcf5445x/start.S	/^asm_dram_init:$/;"	l
asm_dspi_init	arch/m68k/cpu/mcf5445x/start.S	/^asm_dspi_init:$/;"	l
asm_dspi_rd_loop1	arch/m68k/cpu/mcf5227x/start.S	/^asm_dspi_rd_loop1:$/;"	l
asm_dspi_rd_loop1	arch/m68k/cpu/mcf5445x/start.S	/^asm_dspi_rd_loop1:$/;"	l
asm_dspi_rd_loop2	arch/m68k/cpu/mcf5227x/start.S	/^asm_dspi_rd_loop2:$/;"	l
asm_dspi_rd_loop2	arch/m68k/cpu/mcf5445x/start.S	/^asm_dspi_rd_loop2:$/;"	l
asm_dspi_rd_status	arch/m68k/cpu/mcf5227x/start.S	/^asm_dspi_rd_status:$/;"	l
asm_dspi_rd_status	arch/m68k/cpu/mcf5445x/start.S	/^asm_dspi_rd_status:$/;"	l
asm_dspi_wr_status	arch/m68k/cpu/mcf5227x/start.S	/^asm_dspi_wr_status:$/;"	l
asm_dspi_wr_status	arch/m68k/cpu/mcf5445x/start.S	/^asm_dspi_wr_status:$/;"	l
asm_error_str	common/bedbug.c	/^char *asm_error_str (int err)$/;"	f	typeref:typename:char *
asm_nand_chk_status	arch/m68k/cpu/mcf5445x/start.S	/^asm_nand_chk_status:$/;"	l
asm_nand_copy	arch/m68k/cpu/mcf5445x/start.S	/^asm_nand_copy:$/;"	l
asm_nand_init	arch/m68k/cpu/mcf5445x/start.S	/^asm_nand_init:$/;"	l
asm_nand_read	arch/m68k/cpu/mcf5445x/start.S	/^asm_nand_read:$/;"	l
asm_realmode_buffer	arch/x86/lib/bios_asm.S	/^asm_realmode_buffer:$/;"	l
asm_realmode_call	arch/x86/lib/bios_asm.S	/^asm_realmode_call:$/;"	l
asm_realmode_code	arch/x86/lib/bios_asm.S	/^asm_realmode_code:$/;"	l
asm_realmode_code_size	arch/x86/lib/bios_asm.S	/^asm_realmode_code_size:$/;"	l
asm_sbf_img_hdr	arch/m68k/cpu/mcf5227x/start.S	/^asm_sbf_img_hdr:$/;"	l
asm_sbf_img_hdr	arch/m68k/cpu/mcf5445x/start.S	/^asm_sbf_img_hdr:$/;"	l
asm_volatile_goto	include/linux/compiler-gcc.h	/^#define asm_volatile_goto(/;"	d
asmlinkage	arch/x86/include/asm/linkage.h	/^#define asmlinkage /;"	d
asmlinkage	include/linux/linkage.h	/^#define asmlinkage /;"	d
asmppc	common/bedbug.c	/^unsigned long asmppc (unsigned long memaddr, char *asm_buf, int *err)$/;"	f	typeref:typename:unsigned long
asn	board/siemens/common/factoryset.h	/^	uchar asn[MAX_STRING_LENGTH];$/;"	m	struct:factorysetcontainer	typeref:typename:uchar[]
aspect_vfreq	include/edid.h	/^		unsigned char aspect_vfreq;$/;"	m	struct:edid1_info::__anon4a0dc0440308	typeref:typename:unsigned char
asr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32		asr;		\/* 0x04 MC Abort Status Register *\/$/;"	m	struct:at91_mc	typeref:typename:u32
asr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	asr;		\/* 0x70 Select A Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
asr	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 asr;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
asr	arch/m68k/include/asm/immap_5275.h	/^	u32 asr;$/;"	m	struct:usb	typeref:typename:u32
asr	arch/m68k/include/asm/immap_5445x.h	/^		u32 asr;	\/* Arbiter Status Register *\/$/;"	m	union:pci_arbiter::__anona4dddf1d010a	typeref:typename:u32
asr	arch/m68k/include/asm/immap_547x_8x.h	/^		u32 asr;	\/* Arbiter Status *\/$/;"	m	union:pci_arbiter::__anond54bd45a010a	typeref:typename:u32
asrc	arch/arm/dts/imx6qdl.dtsi	/^				asrc: asrc@02034000 {$/;"	l
asrc	arch/arm/dts/imx6ull.dtsi	/^				asrc: asrc@02034000 {$/;"	l	label:aips1
assar	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 assar;	\/*0x054 AIB Secure Second Access Reg*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
assembler	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *assembler;$/;"	m	struct:sysinfo_t	typeref:typename:char *
assert	include/common.h	/^#define assert(/;"	d
assertSummary	tools/buildman/test.py	/^    def assertSummary(self, text, arch, plus, boards, ok=False):$/;"	m	class:TestBuild
assert_equal	test/image/test-imagetools.sh	/^assert_equal()$/;"	f
asserted	drivers/reset/sandbox-reset.c	/^	bool asserted;$/;"	m	struct:sandbox_reset_signal	typeref:typename:bool	file:
asset_tag	include/smbios.h	/^	u8 asset_tag;$/;"	m	struct:smbios_type4	typeref:typename:u8
asset_tag_number	include/smbios.h	/^	u8 asset_tag_number;$/;"	m	struct:smbios_type2	typeref:typename:u8
asset_tag_number	include/smbios.h	/^	u8 asset_tag_number;$/;"	m	struct:smbios_type3	typeref:typename:u8
assign	include/ioports.h	/^	int		assign;$/;"	m	struct:__anonc67861fe0308	typeref:typename:int
assign_aeb_to_av	drivers/mtd/ubi/fastmap.c	/^static void assign_aeb_to_av(struct ubi_attach_info *ai,$/;"	f	typeref:typename:void	file:
assign_aeb_to_av	drivers/mtd/ubispl/ubispl.c	/^static int assign_aeb_to_av(struct ubi_scan_info *ubi, u32 pnum, u32 lnum,$/;"	f	typeref:typename:int	file:
assigned_cs	drivers/mtd/nand/sunxi_nand.c	/^	unsigned long assigned_cs;$/;"	m	struct:sunxi_nfc	typeref:typename:unsigned long	file:
astat	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 astat;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
astat	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 astat;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
astat	arch/blackfin/include/asm/ptrace.h	/^	long astat;$/;"	m	struct:pt_regs	typeref:typename:long
astatus	net/nfs.h	/^			uint32_t astatus;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780308	typeref:typename:uint32_t
astro5373l_altera_load	board/astro/mcf5373l/fpga.c	/^int astro5373l_altera_load(void)$/;"	f	typeref:typename:int
astro5373l_xilinx_load	board/astro/mcf5373l/fpga.c	/^int astro5373l_xilinx_load(void)$/;"	f	typeref:typename:int
astro_get_char	board/astro/mcf5373l/mcf5373l.c	/^int astro_get_char(void)$/;"	f	typeref:typename:int
astro_is_char	board/astro/mcf5373l/mcf5373l.c	/^int astro_is_char(void)$/;"	f	typeref:typename:int
astro_put_char	board/astro/mcf5373l/mcf5373l.c	/^void astro_put_char(char ch)$/;"	f	typeref:typename:void
asym_pause	include/phy.h	/^	int asym_pause;$/;"	m	struct:fixed_link	typeref:typename:int
asym_pause	include/phy.h	/^	int asym_pause;$/;"	m	struct:phy_device	typeref:typename:int
async	drivers/usb/musb-new/musb_core.h	/^	dma_addr_t		async;$/;"	m	struct:musb	typeref:typename:dma_addr_t
async	drivers/video/ipu_regs.h	/^	struct ipu_com_async async[2];$/;"	m	struct:ipu_dp	typeref:struct:ipu_com_async[2]
async_list_addr	arch/arm/include/asm/arch-tegra/usb.h	/^	uint async_list_addr;$/;"	m	struct:usb_ctlr	typeref:typename:uint
async_sdr_features	include/linux/mtd/nand.h	/^	u8 async_sdr_features;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
async_sdr_speed_grade	include/linux/mtd/nand.h	/^	__le16 async_sdr_speed_grade;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
async_timing_mode	include/linux/mtd/nand.h	/^	__le16 async_timing_mode;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
async_tt_sts	arch/arm/include/asm/arch-tegra/usb.h	/^	uint async_tt_sts;$/;"	m	struct:usb_ctlr	typeref:typename:uint
asynch_allowed	common/usb.c	/^static int asynch_allowed;$/;"	v	typeref:typename:int	file:
asynch_allowed	drivers/usb/host/usb-uclass.c	/^static bool asynch_allowed;$/;"	v	typeref:typename:bool	file:
asynclistaddr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 asynclistaddr;	\/* asynclistaddr *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
asysnclistaddr	arch/arm/include/asm/ehci-omap.h	/^	u32 asysnclistaddr;	\/* 0x28 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
at32ap_cpu_bootstrap	arch/avr32/cpu/start.S	/^at32ap_cpu_bootstrap:$/;"	l
at32ap_low_level_init	arch/avr32/cpu/start.S	/^at32ap_low_level_init:$/;"	l
at91_bfc	arch/arm/mach-at91/include/mach/at91_mc.h	/^typedef struct at91_bfc {$/;"	s
at91_bfc_t	arch/arm/mach-at91/include/mach/at91_mc.h	/^} at91_bfc_t;$/;"	t	typeref:struct:at91_bfc
at91_calc_i2c_clock	drivers/i2c/at91_i2c.c	/^static void at91_calc_i2c_clock(struct udevice *dev, int i2c_clk)$/;"	f	typeref:typename:void	file:
at91_can_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_can_hw_init(void)$/;"	f	typeref:typename:void
at91_clk_of_xlate	drivers/clk/at91/pmc.c	/^int at91_clk_of_xlate(struct clk *clk, struct fdtdec_phandle_args *args)$/;"	f	typeref:typename:int
at91_clk_probe	drivers/clk/at91/pmc.c	/^int at91_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int
at91_clk_sub_device_bind	drivers/clk/at91/pmc.c	/^int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)$/;"	f	typeref:typename:int
at91_clock_init	arch/arm/mach-at91/arm920t/clock.c	/^int at91_clock_init(unsigned long main_clock)$/;"	f	typeref:typename:int
at91_clock_init	arch/arm/mach-at91/arm926ejs/clock.c	/^int at91_clock_init(unsigned long main_clock)$/;"	f	typeref:typename:int
at91_clock_init	arch/arm/mach-at91/armv7/clock.c	/^int at91_clock_init(unsigned long main_clock)$/;"	f	typeref:typename:int
at91_cs	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^typedef struct	at91_cs {$/;"	s
at91_cs	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^struct at91_cs {$/;"	s
at91_cs_t	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^} at91_cs_t;$/;"	t	typeref:struct:at91_cs
at91_css_to_rate	arch/arm/mach-at91/arm920t/clock.c	/^static unsigned long at91_css_to_rate(unsigned long css)$/;"	f	typeref:typename:unsigned long	file:
at91_css_to_rate	arch/arm/mach-at91/arm926ejs/clock.c	/^static unsigned long at91_css_to_rate(unsigned long css)$/;"	f	typeref:typename:unsigned long	file:
at91_css_to_rate	arch/arm/mach-at91/armv7/clock.c	/^static unsigned long at91_css_to_rate(unsigned long css)$/;"	f	typeref:typename:unsigned long	file:
at91_dbu	arch/arm/mach-at91/include/mach/at91_dbu.h	/^typedef struct at91_dbu {$/;"	s
at91_dbu_t	arch/arm/mach-at91/include/mach/at91_dbu.h	/^} at91_dbu_t;$/;"	t	typeref:struct:at91_dbu
at91_disable_wdt	arch/arm/mach-at91/spl.c	/^void at91_disable_wdt(void) { }$/;"	f	typeref:typename:void
at91_disable_wdt	arch/arm/mach-at91/spl.c	/^void at91_disable_wdt(void)$/;"	f	typeref:typename:void
at91_ebi	arch/arm/mach-at91/include/mach/at91_mc.h	/^typedef struct at91_ebi {$/;"	s
at91_ebi_t	arch/arm/mach-at91/include/mach/at91_mc.h	/^} at91_ebi_t;$/;"	t	typeref:struct:at91_ebi
at91_eefc	arch/arm/mach-at91/include/mach/at91_eefc.h	/^typedef struct at91_eefc {$/;"	s
at91_eefc_t	arch/arm/mach-at91/include/mach/at91_eefc.h	/^} at91_eefc_t;$/;"	t	typeref:struct:at91_eefc
at91_emac	arch/arm/mach-at91/include/mach/at91_emac.h	/^typedef struct at91_emac {$/;"	s
at91_emac_t	arch/arm/mach-at91/include/mach/at91_emac.h	/^} at91_emac_t;$/;"	t	typeref:struct:at91_emac
at91_enable_periph_generated_clk	arch/arm/mach-at91/armv7/clock.c	/^int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)$/;"	f	typeref:typename:int
at91_ep	drivers/usb/gadget/at91_udc.h	/^struct at91_ep {$/;"	s
at91_ep_alloc_request	drivers/usb/gadget/at91_udc.c	/^at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)$/;"	f	typeref:struct:usb_request *	file:
at91_ep_dequeue	drivers/usb/gadget/at91_udc.c	/^static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:int	file:
at91_ep_disable	drivers/usb/gadget/at91_udc.c	/^static int at91_ep_disable (struct usb_ep * _ep)$/;"	f	typeref:typename:int	file:
at91_ep_enable	drivers/usb/gadget/at91_udc.c	/^static int at91_ep_enable(struct usb_ep *_ep,$/;"	f	typeref:typename:int	file:
at91_ep_free_request	drivers/usb/gadget/at91_udc.c	/^static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:void	file:
at91_ep_ops	drivers/usb/gadget/at91_udc.c	/^static const struct usb_ep_ops at91_ep_ops = {$/;"	v	typeref:typename:const struct usb_ep_ops	file:
at91_ep_queue	drivers/usb/gadget/at91_udc.c	/^static int at91_ep_queue(struct usb_ep *_ep,$/;"	f	typeref:typename:int	file:
at91_ep_set_halt	drivers/usb/gadget/at91_udc.c	/^static int at91_ep_set_halt(struct usb_ep *_ep, int value)$/;"	f	typeref:typename:int	file:
at91_get_frame	drivers/usb/gadget/at91_udc.c	/^static int at91_get_frame(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
at91_get_gpio_value	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_get_gpio_value(/;"	d
at91_get_periph_generated_clk	arch/arm/mach-at91/armv7/clock.c	/^u32 at91_get_periph_generated_clk(u32 id)$/;"	f	typeref:typename:u32
at91_get_pio_value	drivers/gpio/at91_gpio.c	/^int at91_get_pio_value(unsigned port, unsigned pin)$/;"	f	typeref:typename:int
at91_get_port_output	drivers/gpio/at91_gpio.c	/^static bool at91_get_port_output(struct at91_port *at91_port, int offset)$/;"	f	typeref:typename:bool	file:
at91_get_port_value	drivers/gpio/at91_gpio.c	/^static int at91_get_port_value(struct at91_port *at91_port, int offset)$/;"	f	typeref:typename:int	file:
at91_gmac_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_gmac_hw_init(void)$/;"	f	typeref:typename:void
at91_gpbr	arch/arm/mach-at91/include/mach/at91_gpbr.h	/^typedef struct at91_gpbr {$/;"	s
at91_gpbr_t	arch/arm/mach-at91/include/mach/at91_gpbr.h	/^} at91_gpbr_t;$/;"	t	typeref:struct:at91_gpbr
at91_gpio_direction_input	drivers/gpio/at91_gpio.c	/^static int at91_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
at91_gpio_direction_output	drivers/gpio/at91_gpio.c	/^static int at91_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
at91_gpio_get_function	drivers/gpio/at91_gpio.c	/^static int at91_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
at91_gpio_get_value	drivers/gpio/at91_gpio.c	/^static int at91_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
at91_gpio_probe	drivers/gpio/at91_gpio.c	/^static int at91_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
at91_gpio_set_value	drivers/gpio/at91_gpio.c	/^static int at91_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
at91_gpio_to_pin	arch/arm/mach-at91/include/mach/gpio.h	/^static inline unsigned at91_gpio_to_pin(unsigned gpio)$/;"	f	typeref:typename:unsigned
at91_gpio_to_port	arch/arm/mach-at91/include/mach/gpio.h	/^static inline unsigned at91_gpio_to_port(unsigned gpio)$/;"	f	typeref:typename:unsigned
at91_i2c_bus	drivers/i2c/at91_i2c.h	/^struct at91_i2c_bus {$/;"	s
at91_i2c_enable_clk	drivers/i2c/at91_i2c.c	/^static int at91_i2c_enable_clk(struct udevice *dev)$/;"	f	typeref:typename:int	file:
at91_i2c_get_bus_speed	drivers/i2c/at91_i2c.c	/^int at91_i2c_get_bus_speed(struct udevice *dev)$/;"	f	typeref:typename:int
at91_i2c_ids	drivers/i2c/at91_i2c.c	/^static const struct udevice_id at91_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
at91_i2c_ofdata_to_platdata	drivers/i2c/at91_i2c.c	/^static int at91_i2c_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
at91_i2c_ops	drivers/i2c/at91_i2c.c	/^static const struct dm_i2c_ops at91_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
at91_i2c_pdata	drivers/i2c/at91_i2c.h	/^struct at91_i2c_pdata {$/;"	s
at91_i2c_probe	drivers/i2c/at91_i2c.c	/^static int at91_i2c_probe(struct udevice *dev, uint chip, uint chip_flags)$/;"	f	typeref:typename:int	file:
at91_i2c_regs	drivers/i2c/at91_i2c.h	/^struct at91_i2c_regs {$/;"	s
at91_i2c_set_bus_speed	drivers/i2c/at91_i2c.c	/^static int at91_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
at91_i2c_xfer	drivers/i2c/at91_i2c.c	/^static int at91_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)$/;"	f	typeref:typename:int	file:
at91_i2c_xfer_msg	drivers/i2c/at91_i2c.c	/^static int at91_i2c_xfer_msg(struct at91_i2c_bus *bus, struct i2c_msg *msg)$/;"	f	typeref:typename:int	file:
at91_is_recovery	board/siemens/taurus/taurus.c	/^static int at91_is_recovery(void)$/;"	f	typeref:typename:int	file:
at91_lcd_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_lcd_hw_init(void)$/;"	f	typeref:typename:void
at91_lcd_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_lcd_hw_init(void)$/;"	f	typeref:typename:void
at91_macb_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_macb_hw_init(void)$/;"	f	typeref:typename:void
at91_macb_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_macb_hw_init(void)$/;"	f	typeref:typename:void
at91_macb_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_macb_hw_init(void)$/;"	f	typeref:typename:void
at91_macb_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_macb_hw_init(void)$/;"	f	typeref:typename:void
at91_macb_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_macb_hw_init(void)$/;"	f	typeref:typename:void
at91_master_clk_get_rate	drivers/clk/at91/clk-master.c	/^static ulong at91_master_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
at91_master_clk_match	drivers/clk/at91/clk-master.c	/^static const struct udevice_id at91_master_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
at91_master_clk_ops	drivers/clk/at91/clk-master.c	/^static struct clk_ops at91_master_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
at91_matrix	arch/arm/mach-at91/include/mach/at91_matrix.h	/^typedef struct at91_matrix {$/;"	s
at91_matrix	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^struct at91_matrix {$/;"	s
at91_matrix	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^struct at91_matrix {$/;"	s
at91_matrix	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^struct at91_matrix {$/;"	s
at91_matrix	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^struct at91_matrix {$/;"	s
at91_matrix	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^struct at91_matrix {$/;"	s
at91_matrix	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^struct at91_matrix {$/;"	s
at91_matrix_t	arch/arm/mach-at91/include/mach/at91_matrix.h	/^} at91_matrix_t;$/;"	t	typeref:struct:at91_matrix
at91_mc	arch/arm/mach-at91/include/mach/at91_mc.h	/^typedef struct at91_mc {$/;"	s
at91_mc_t	arch/arm/mach-at91/include/mach/at91_mc.h	/^} at91_mc_t;$/;"	t	typeref:struct:at91_mc
at91_mci_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mci_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mci_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mci_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mci_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mci_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mci_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_mci_hw_init(void)$/;"	f	typeref:typename:void
at91_mck_init	arch/arm/mach-at91/arm926ejs/clock.c	/^void at91_mck_init(u32 mckr)$/;"	f	typeref:typename:void
at91_mck_init	arch/arm/mach-at91/armv7/clock.c	/^void at91_mck_init(u32 mckr)$/;"	f	typeref:typename:void
at91_nand_hwcontrol	drivers/mtd/nand/atmel_nand.c	/^static void at91_nand_hwcontrol(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
at91_nand_ready	drivers/mtd/nand/atmel_nand.c	/^static int at91_nand_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
at91_nand_wait_ready	drivers/mtd/nand/atmel_nand.c	/^int at91_nand_wait_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int
at91_pdc	arch/arm/mach-at91/include/mach/at91_pdc.h	/^typedef struct at91_pdc {$/;"	s
at91_pdc_t	arch/arm/mach-at91/include/mach/at91_pdc.h	/^} at91_pdc_t;$/;"	t	typeref:struct:at91_pdc
at91_periph_clk_disable	arch/arm/mach-at91/clock.c	/^void at91_periph_clk_disable(int id)$/;"	f	typeref:typename:void
at91_periph_clk_enable	arch/arm/mach-at91/clock.c	/^void at91_periph_clk_enable(int id)$/;"	f	typeref:typename:void
at91_phy_reset	arch/arm/mach-at91/phy.c	/^void at91_phy_reset(void)$/;"	f	typeref:typename:void
at91_pio	arch/arm/mach-at91/include/mach/at91_pio.h	/^typedef union at91_pio {$/;"	u
at91_pio_get_port	drivers/gpio/at91_gpio.c	/^static struct at91_port *at91_pio_get_port(unsigned port)$/;"	f	typeref:struct:at91_port *	file:
at91_pio_t	arch/arm/mach-at91/include/mach/at91_pio.h	/^} at91_pio_t;$/;"	t	typeref:union:at91_pio
at91_pios	arch/arm/mach-at91/include/mach/gpio.h	/^static unsigned long at91_pios[] = {$/;"	v	typeref:typename:unsigned long[]
at91_pit	arch/arm/mach-at91/include/mach/at91_pit.h	/^typedef struct at91_pit {$/;"	s
at91_pit_t	arch/arm/mach-at91/include/mach/at91_pit.h	/^} at91_pit_t;$/;"	t	typeref:struct:at91_pit
at91_pll_calc	arch/arm/mach-at91/arm920t/clock.c	/^static unsigned at91_pll_calc(unsigned main_freq, unsigned out_freq)$/;"	f	typeref:typename:unsigned	file:
at91_pll_calc	arch/arm/mach-at91/arm926ejs/clock.c	/^static unsigned at91_pll_calc(unsigned main_freq, unsigned out_freq)$/;"	f	typeref:typename:unsigned	file:
at91_pll_rate	arch/arm/mach-at91/arm920t/clock.c	/^static u32 at91_pll_rate(u32 freq, u32 reg)$/;"	f	typeref:typename:u32	file:
at91_pll_rate	arch/arm/mach-at91/arm926ejs/clock.c	/^static u32 at91_pll_rate(u32 freq, u32 reg)$/;"	f	typeref:typename:u32	file:
at91_pll_rate	arch/arm/mach-at91/armv7/clock.c	/^static u32 at91_pll_rate(u32 freq, u32 reg)$/;"	f	typeref:typename:u32	file:
at91_plla_init	arch/arm/mach-at91/arm926ejs/clock.c	/^void at91_plla_init(u32 pllar)$/;"	f	typeref:typename:void
at91_plla_init	arch/arm/mach-at91/armv7/clock.c	/^void at91_plla_init(u32 pllar)$/;"	f	typeref:typename:void
at91_pllb_clk_disable	arch/arm/mach-at91/arm920t/clock.c	/^int at91_pllb_clk_disable(void)$/;"	f	typeref:typename:int
at91_pllb_clk_disable	arch/arm/mach-at91/arm926ejs/clock.c	/^int at91_pllb_clk_disable(void)$/;"	f	typeref:typename:int
at91_pllb_clk_enable	arch/arm/mach-at91/arm920t/clock.c	/^int at91_pllb_clk_enable(u32 pllbr)$/;"	f	typeref:typename:int
at91_pllb_clk_enable	arch/arm/mach-at91/arm926ejs/clock.c	/^int at91_pllb_clk_enable(u32 pllbr)$/;"	f	typeref:typename:int
at91_pllb_init	arch/arm/mach-at91/arm926ejs/clock.c	/^void at91_pllb_init(u32 pllbr)$/;"	f	typeref:typename:void
at91_pllb_usb_init	arch/arm/include/asm/global_data.h	/^	unsigned long	at91_pllb_usb_init;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
at91_pllicpr_init	arch/arm/mach-at91/clock.c	/^void at91_pllicpr_init(u32 icpr)$/;"	f	typeref:typename:void
at91_pmc	arch/arm/mach-at91/include/mach/at91_pmc.h	/^typedef struct at91_pmc {$/;"	s
at91_pmc_core_probe	drivers/clk/at91/pmc.c	/^int at91_pmc_core_probe(struct udevice *dev)$/;"	f	typeref:typename:int
at91_pmc_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_init	board/atmel/sama5d3xek/sama5d3xek.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_init	board/atmel/sama5d4ek/sama5d4ek.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_init	board/denx/ma5d4evk/ma5d4evk.c	/^void at91_pmc_init(void)$/;"	f	typeref:typename:void
at91_pmc_match	drivers/clk/at91/pmc.c	/^static const struct udevice_id at91_pmc_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
at91_pmc_t	arch/arm/mach-at91/include/mach/at91_pmc.h	/^} at91_pmc_t;$/;"	t	typeref:struct:at91_pmc
at91_port	arch/arm/mach-at91/include/mach/at91_pio.h	/^typedef struct at91_port {$/;"	s
at91_port_platdata	arch/arm/mach-at91/include/mach/gpio.h	/^struct at91_port_platdata {$/;"	s
at91_port_priv	drivers/gpio/at91_gpio.c	/^struct at91_port_priv {$/;"	s	file:
at91_port_t	arch/arm/mach-at91/include/mach/at91_pio.h	/^} at91_port_t;$/;"	t	typeref:struct:at91_port
at91_priority	arch/arm/mach-at91/include/mach/at91_matrix.h	/^typedef struct at91_priority {$/;"	s
at91_priority_t	arch/arm/mach-at91/include/mach/at91_matrix.h	/^} at91_priority_t;$/;"	t	typeref:struct:at91_priority
at91_pullup	drivers/usb/gadget/at91_udc.c	/^static int at91_pullup(struct usb_gadget *gadget, int is_on)$/;"	f	typeref:typename:int	file:
at91_request	drivers/usb/gadget/at91_udc.h	/^struct at91_request {$/;"	s
at91_rstc	arch/arm/mach-at91/include/mach/at91_rstc.h	/^typedef struct at91_rstc {$/;"	s
at91_rstc_t	arch/arm/mach-at91/include/mach/at91_rstc.h	/^} at91_rstc_t;$/;"	t	typeref:struct:at91_rstc
at91_rtt	arch/arm/mach-at91/include/mach/at91_rtt.h	/^typedef struct at91_rtt {$/;"	s
at91_rtt_t	arch/arm/mach-at91/include/mach/at91_rtt.h	/^} at91_rtt_t;$/;"	t	typeref:struct:at91_rtt
at91_sckc_match	drivers/clk/at91/sckc.c	/^static const struct udevice_id at91_sckc_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
at91_sdram_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_sdram_hw_init(void)$/;"	f	typeref:typename:void
at91_sdramc	arch/arm/mach-at91/include/mach/at91_mc.h	/^typedef struct at91_sdramc {$/;"	s
at91_sdramc_t	arch/arm/mach-at91/include/mach/at91_mc.h	/^} at91_sdramc_t;$/;"	t	typeref:struct:at91_sdramc
at91_serial0_hw_init	arch/arm/mach-at91/arm920t/at91rm9200_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial0_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_serial0_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm920t/at91rm9200_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial1_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_serial1_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm920t/at91rm9200_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial2_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_serial2_hw_init(void)$/;"	f	typeref:typename:void
at91_serial3_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_serial3_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm920t/at91rm9200_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_seriald_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_seriald_hw_init(void)$/;"	f	typeref:typename:void
at91_set_A_periph	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_set_A_periph(/;"	d
at91_set_B_periph	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_set_B_periph(/;"	d
at91_set_GPIO_periph	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_set_GPIO_periph(/;"	d
at91_set_a_periph	drivers/gpio/at91_gpio.c	/^int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_b_periph	drivers/gpio/at91_gpio.c	/^int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_c_periph	drivers/gpio/at91_gpio.c	/^int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_d_periph	drivers/gpio/at91_gpio.c	/^int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_gpio_input	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_set_gpio_input(/;"	d
at91_set_gpio_output	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_set_gpio_output(/;"	d
at91_set_gpio_value	arch/arm/mach-at91/include/mach/gpio.h	/^#define at91_set_gpio_value(/;"	d
at91_set_pio_debounce	drivers/gpio/at91_gpio.c	/^int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div)$/;"	f	typeref:typename:int
at91_set_pio_deglitch	drivers/gpio/at91_gpio.c	/^int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)$/;"	f	typeref:typename:int
at91_set_pio_disable_schmitt_trig	drivers/gpio/at91_gpio.c	/^int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin)$/;"	f	typeref:typename:int
at91_set_pio_input	drivers/gpio/at91_gpio.c	/^int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_pio_multi_drive	drivers/gpio/at91_gpio.c	/^int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)$/;"	f	typeref:typename:int
at91_set_pio_output	drivers/gpio/at91_gpio.c	/^int at91_set_pio_output(unsigned port, u32 pin, int value)$/;"	f	typeref:typename:int
at91_set_pio_periph	drivers/gpio/at91_gpio.c	/^int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_pio_pulldown	drivers/gpio/at91_gpio.c	/^int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on)$/;"	f	typeref:typename:int
at91_set_pio_pullup	drivers/gpio/at91_gpio.c	/^int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)$/;"	f	typeref:typename:int
at91_set_pio_value	drivers/gpio/at91_gpio.c	/^int at91_set_pio_value(unsigned port, unsigned pin, int value)$/;"	f	typeref:typename:int
at91_set_port_input	drivers/gpio/at91_gpio.c	/^static void at91_set_port_input(struct at91_port *at91_port, int offset,$/;"	f	typeref:typename:void	file:
at91_set_port_output	drivers/gpio/at91_gpio.c	/^static void at91_set_port_output(struct at91_port *at91_port, int offset,$/;"	f	typeref:typename:void	file:
at91_set_port_pullup	drivers/gpio/at91_gpio.c	/^static void at91_set_port_pullup(struct at91_port *at91_port, unsigned offset,$/;"	f	typeref:typename:void	file:
at91_set_port_value	drivers/gpio/at91_gpio.c	/^static void at91_set_port_value(struct at91_port *at91_port, int offset,$/;"	f	typeref:typename:void	file:
at91_set_selfpowered	drivers/usb/gadget/at91_udc.c	/^static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on)$/;"	f	typeref:typename:int	file:
at91_slow_clk_enable	drivers/clk/at91/clk-slow.c	/^static int at91_slow_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
at91_slow_clk_get_rate	drivers/clk/at91/clk-slow.c	/^static ulong at91_slow_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
at91_slow_clk_match	drivers/clk/at91/clk-slow.c	/^static const struct udevice_id at91_slow_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
at91_slow_clk_ops	drivers/clk/at91/clk-slow.c	/^static struct clk_ops at91_slow_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
at91_smc	arch/arm/mach-at91/include/mach/at91_mc.h	/^typedef struct at91_smc {$/;"	s
at91_smc	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^typedef struct	at91_smc {$/;"	s
at91_smc	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^struct at91_smc {$/;"	s
at91_smc_t	arch/arm/mach-at91/include/mach/at91_mc.h	/^} at91_smc_t;$/;"	t	typeref:struct:at91_smc
at91_smc_t	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^} at91_smc_t;$/;"	t	typeref:struct:at91_smc
at91_spi	arch/arm/mach-at91/include/mach/at91_spi.h	/^typedef struct at91_spi {$/;"	s
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi0_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_spi0_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^void at91_spi1_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c	/^void at91_spi1_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_spi1_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^void at91_spi1_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^void at91_spi1_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi1_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_spi1_hw_init(unsigned long cs_mask)$/;"	f	typeref:typename:void
at91_spi_t	arch/arm/mach-at91/include/mach/at91_spi.h	/^} at91_spi_t;$/;"	t	typeref:struct:at91_spi
at91_spl_board_init	arch/arm/mach-at91/spl_at91.c	/^void __weak at91_spl_board_init(void)$/;"	f	typeref:typename:void __weak
at91_spl_board_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void at91_spl_board_init(void)$/;"	f	typeref:typename:void
at91_spl_board_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void at91_spl_board_init(void)$/;"	f	typeref:typename:void
at91_spl_board_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void at91_spl_board_init(void)$/;"	f	typeref:typename:void
at91_spl_board_init	board/mini-box/picosam9g45/picosam9g45.c	/^void at91_spl_board_init(void)$/;"	f	typeref:typename:void
at91_spl_board_init	board/siemens/smartweb/smartweb.c	/^void at91_spl_board_init(void)$/;"	f	typeref:typename:void
at91_st	arch/arm/mach-at91/include/mach/at91_st.h	/^typedef struct at91_st {$/;"	s
at91_st_t	arch/arm/mach-at91/include/mach/at91_st.h	/^} at91_st_t ;$/;"	t	typeref:struct:at91_st
at91_start	drivers/usb/gadget/at91_udc.c	/^static int at91_start(struct usb_gadget *gadget,$/;"	f	typeref:typename:int	file:
at91_stop	drivers/usb/gadget/at91_udc.c	/^static int at91_stop(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
at91_system_clk_bind	drivers/clk/at91/clk-system.c	/^static int at91_system_clk_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
at91_system_clk_disable	arch/arm/mach-at91/clock.c	/^void at91_system_clk_disable(int sys_clk)$/;"	f	typeref:typename:void
at91_system_clk_enable	arch/arm/mach-at91/clock.c	/^void at91_system_clk_enable(int sys_clk)$/;"	f	typeref:typename:void
at91_system_clk_match	drivers/clk/at91/clk-system.c	/^static const struct udevice_id at91_system_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
at91_tc	arch/arm/mach-at91/include/mach/at91_tc.h	/^typedef struct at91_tc {$/;"	s
at91_tc_t	arch/arm/mach-at91/include/mach/at91_tc.h	/^} at91_tc_t;$/;"	t	typeref:struct:at91_tc
at91_tcc	arch/arm/mach-at91/include/mach/at91_tc.h	/^typedef struct at91_tcc {$/;"	s
at91_tcc_t	arch/arm/mach-at91/include/mach/at91_tc.h	/^} at91_tcc_t;$/;"	t	typeref:struct:at91_tcc
at91_udc	drivers/usb/gadget/at91_udc.h	/^struct at91_udc {$/;"	s
at91_udc_caps	drivers/usb/gadget/at91_udc.h	/^struct at91_udc_caps {$/;"	s
at91_udc_data	include/linux/usb/at91_udc.h	/^struct at91_udc_data {$/;"	s
at91_udc_irq	drivers/usb/gadget/at91_udc.c	/^static irqreturn_t at91_udc_irq(struct at91_udc *udc)$/;"	f	typeref:typename:irqreturn_t	file:
at91_udc_ops	drivers/usb/gadget/at91_udc.c	/^static const struct usb_gadget_ops at91_udc_ops = {$/;"	v	typeref:typename:const struct usb_gadget_ops	file:
at91_udc_probe	drivers/usb/gadget/at91_udc.c	/^int at91_udc_probe(struct at91_udc_data *pdata)$/;"	f	typeref:typename:int
at91_udp_hw_init	arch/arm/mach-at91/armv7/sama5d2_devices.c	/^void at91_udp_hw_init(void)$/;"	f	typeref:typename:void
at91_udp_hw_init	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^void at91_udp_hw_init(void)$/;"	f	typeref:typename:void
at91_udp_hw_init	arch/arm/mach-at91/armv7/sama5d4_devices.c	/^void at91_udp_hw_init(void)$/;"	f	typeref:typename:void
at91_udp_hw_init	board/siemens/corvus/board.c	/^void at91_udp_hw_init(void)$/;"	f	typeref:typename:void
at91_udp_hw_init	board/siemens/smartweb/smartweb.c	/^void at91_udp_hw_init(void)$/;"	f	typeref:typename:void
at91_udp_hw_init	board/siemens/taurus/taurus.c	/^void at91_udp_hw_init(void)$/;"	f	typeref:typename:void
at91_udp_read	drivers/usb/gadget/at91_udc.c	/^#define at91_udp_read(/;"	d	file:
at91_udp_write	drivers/usb/gadget/at91_udc.c	/^#define at91_udp_write(/;"	d	file:
at91_uhp_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c	/^void at91_uhp_hw_init(void)$/;"	f	typeref:typename:void
at91_uhp_hw_init	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^void at91_uhp_hw_init(void)$/;"	f	typeref:typename:void
at91_upll_clk_disable	arch/arm/mach-at91/clock.c	/^int at91_upll_clk_disable(void)$/;"	f	typeref:typename:int
at91_upll_clk_enable	arch/arm/mach-at91/clock.c	/^int at91_upll_clk_enable(void)$/;"	f	typeref:typename:int
at91_usb_clk_init	arch/arm/mach-at91/clock.c	/^void at91_usb_clk_init(u32 value)$/;"	f	typeref:typename:void
at91_vbus_session	drivers/usb/gadget/at91_udc.c	/^static int at91_vbus_session(struct usb_gadget *gadget, int is_active)$/;"	f	typeref:typename:int	file:
at91_wait_for_xfer	drivers/i2c/at91_i2c.c	/^static int at91_wait_for_xfer(struct at91_i2c_bus *bus, u32 status)$/;"	f	typeref:typename:int	file:
at91_wakeup	drivers/usb/gadget/at91_udc.c	/^static int at91_wakeup(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
at91_wdt	arch/arm/mach-at91/include/mach/at91_wdt.h	/^typedef struct at91_wdt {$/;"	s
at91_wdt_settimeout	drivers/watchdog/at91sam9_wdt.c	/^static int at91_wdt_settimeout(unsigned int timeout)$/;"	f	typeref:typename:int	file:
at91_wdt_t	arch/arm/mach-at91/include/mach/at91_wdt.h	/^} at91_wdt_t;$/;"	t	typeref:struct:at91_wdt
at91emac_DisableMDIO	drivers/net/at91_emac.c	/^void at91emac_DisableMDIO(at91_emac_t *at91mac)$/;"	f	typeref:typename:void
at91emac_EnableMDIO	drivers/net/at91_emac.c	/^void at91emac_EnableMDIO(at91_emac_t *at91mac)$/;"	f	typeref:typename:void
at91emac_UpdateLinkSpeed	drivers/net/at91_emac.c	/^int at91emac_UpdateLinkSpeed(at91_emac_t *emac)$/;"	f	typeref:typename:int
at91emac_halt	drivers/net/at91_emac.c	/^static void at91emac_halt(struct eth_device *netdev)$/;"	f	typeref:typename:void	file:
at91emac_init	drivers/net/at91_emac.c	/^static int at91emac_init(struct eth_device *netdev, bd_t *bd)$/;"	f	typeref:typename:int	file:
at91emac_mii_read	drivers/net/at91_emac.c	/^int at91emac_mii_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int
at91emac_mii_write	drivers/net/at91_emac.c	/^int at91emac_mii_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int
at91emac_phy_init	drivers/net/at91_emac.c	/^static int at91emac_phy_init(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
at91emac_phy_reset	drivers/net/at91_emac.c	/^static int at91emac_phy_reset(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
at91emac_read	drivers/net/at91_emac.c	/^int  at91emac_read(at91_emac_t *at91mac, unsigned char addr,$/;"	f	typeref:typename:int
at91emac_recv	drivers/net/at91_emac.c	/^static int at91emac_recv(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
at91emac_register	drivers/net/at91_emac.c	/^int at91emac_register(bd_t *bis, unsigned long iobase)$/;"	f	typeref:typename:int
at91emac_send	drivers/net/at91_emac.c	/^static int at91emac_send(struct eth_device *netdev, void *packet, int length)$/;"	f	typeref:typename:int	file:
at91emac_write	drivers/net/at91_emac.c	/^int  at91emac_write(at91_emac_t *at91mac, unsigned char addr,$/;"	f	typeref:typename:int
at91emac_write_hwaddr	drivers/net/at91_emac.c	/^static int at91emac_write_hwaddr(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
at91rm9200_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata at91rm9200_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
at91rm9200_udc_caps	drivers/usb/gadget/at91_udc.c	/^static const struct at91_udc_caps at91rm9200_udc_caps = {$/;"	v	typeref:typename:const struct at91_udc_caps	file:
at91rm9200_udc_init	drivers/usb/gadget/at91_udc.c	/^static int at91rm9200_udc_init(struct at91_udc *udc)$/;"	f	typeref:typename:int	file:
at91rm9200_udc_pullup	drivers/usb/gadget/at91_udc.c	/^static void at91rm9200_udc_pullup(struct at91_udc *udc, int is_on)$/;"	f	typeref:typename:void	file:
at91sam9260_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata at91sam9260_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
at91sam9260_plat	arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c	/^static const struct at91_port_platdata at91sam9260_plat[] = {$/;"	v	typeref:typename:const struct at91_port_platdata[]	file:
at91sam9260_plat	arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c	/^static const struct at91_port_platdata at91sam9260_plat[] = {$/;"	v	typeref:typename:const struct at91_port_platdata[]	file:
at91sam9260_serial_plat	board/bluewater/gurnard/gurnard.c	/^static struct atmel_serial_platdata at91sam9260_serial_plat = {$/;"	v	typeref:struct:atmel_serial_platdata	file:
at91sam9260_serial_plat	board/bluewater/snapper9260/snapper9260.c	/^static struct atmel_serial_platdata at91sam9260_serial_plat = {$/;"	v	typeref:struct:atmel_serial_platdata	file:
at91sam9260_serial_plat	board/siemens/corvus/board.c	/^static struct atmel_serial_platdata at91sam9260_serial_plat = {$/;"	v	typeref:struct:atmel_serial_platdata	file:
at91sam9260_serial_plat	board/siemens/smartweb/smartweb.c	/^static struct atmel_serial_platdata at91sam9260_serial_plat = {$/;"	v	typeref:struct:atmel_serial_platdata	file:
at91sam9260_serial_plat	board/siemens/taurus/taurus.c	/^static struct atmel_serial_platdata at91sam9260_serial_plat = {$/;"	v	typeref:struct:atmel_serial_platdata	file:
at91sam9260_udc_caps	drivers/usb/gadget/at91_udc.c	/^static const struct at91_udc_caps at91sam9260_udc_caps = {$/;"	v	typeref:typename:const struct at91_udc_caps	file:
at91sam9260_udc_init	drivers/usb/gadget/at91_udc.c	/^static int at91sam9260_udc_init(struct at91_udc *udc)$/;"	f	typeref:typename:int	file:
at91sam9260_udc_pullup	drivers/usb/gadget/at91_udc.c	/^static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on)$/;"	f	typeref:typename:void	file:
at91sam9260ek_macb_hw_init	board/atmel/at91sam9260ek/at91sam9260ek.c	/^static void at91sam9260ek_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9260ek_nand_hw_init	board/atmel/at91sam9260ek/at91sam9260ek.c	/^static void at91sam9260ek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9261_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata at91sam9261_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
at91sam9261_udc_caps	drivers/usb/gadget/at91_udc.c	/^static const struct at91_udc_caps at91sam9261_udc_caps = {$/;"	v	typeref:typename:const struct at91_udc_caps	file:
at91sam9261_udc_init	drivers/usb/gadget/at91_udc.c	/^static int at91sam9261_udc_init(struct at91_udc *udc)$/;"	f	typeref:typename:int	file:
at91sam9261_udc_pullup	drivers/usb/gadget/at91_udc.c	/^static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on)$/;"	f	typeref:typename:void	file:
at91sam9261ek_dm9000_hw_init	board/atmel/at91sam9261ek/at91sam9261ek.c	/^static void at91sam9261ek_dm9000_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9261ek_lcd_hw_init	board/atmel/at91sam9261ek/at91sam9261ek.c	/^static void at91sam9261ek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9261ek_nand_hw_init	board/atmel/at91sam9261ek/at91sam9261ek.c	/^static void at91sam9261ek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9263_udc_caps	drivers/usb/gadget/at91_udc.c	/^static const struct at91_udc_caps at91sam9263_udc_caps = {$/;"	v	typeref:typename:const struct at91_udc_caps	file:
at91sam9263_udc_init	drivers/usb/gadget/at91_udc.c	/^static int at91sam9263_udc_init(struct at91_udc *udc)$/;"	f	typeref:typename:int	file:
at91sam9263ek_lcd_hw_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^static void at91sam9263ek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9263ek_macb_hw_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^static void at91sam9263ek_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9263ek_nand_hw_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^static void at91sam9263ek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9g10_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata at91sam9g10_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
at91sam9g20_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata at91sam9g20_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
at91sam9g45_lcd_hw_init	board/bluewater/gurnard/gurnard.c	/^static void at91sam9g45_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9g45_slowclock_init	board/bluewater/gurnard/gurnard.c	/^void at91sam9g45_slowclock_init(void)$/;"	f	typeref:typename:void
at91sam9m10g45ek_lcd_hw_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^static void at91sam9m10g45ek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9m10g45ek_macb_hw_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^static void at91sam9m10g45ek_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9m10g45ek_nand_hw_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void at91sam9m10g45ek_nand_hw_init(void)$/;"	f	typeref:typename:void
at91sam9m10g45ek_usb_hw_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^static void at91sam9m10g45ek_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9n12ek_ks8851_hw_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void at91sam9n12ek_ks8851_hw_init(void)$/;"	f	typeref:typename:void
at91sam9n12ek_nand_hw_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^static void at91sam9n12ek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9n12ek_usb_hw_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void at91sam9n12ek_usb_hw_init(void)$/;"	f	typeref:typename:void
at91sam9rlek_lcd_hw_init	board/atmel/at91sam9rlek/at91sam9rlek.c	/^static void at91sam9rlek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9rlek_nand_hw_init	board/atmel/at91sam9rlek/at91sam9rlek.c	/^static void at91sam9rlek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9x5_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata at91sam9x5_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
at91sam9x5ek_lcd_hw_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^static void at91sam9x5ek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
at91sam9x5ek_nand_hw_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^static void at91sam9x5ek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
at_eof	common/xyzModem.c	/^  bool crc_mode, at_eof, tx_ack;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:bool	file:
at_state	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_at_state	*at_state;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_at_state *
at_state	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct tdt_state_info at_state;$/;"	m	struct:me_bios_payload	typeref:struct:tdt_state_info
ata	include/linux/edd.h	/^		} __attribute__ ((packed)) ata;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0908
ata_addr	drivers/block/sata_mv.c	/^	u32 ata_addr;		\/* DW5 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
ata_addr_exp	drivers/block/sata_mv.c	/^	u32 ata_addr_exp;	\/* DW6 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
ata_busy_wait	drivers/block/sata_dwc.c	/^static u8 ata_busy_wait(struct ata_port *ap,$/;"	f	typeref:typename:u8	file:
ata_check_altstatus	drivers/block/sata_dwc.c	/^static u8 ata_check_altstatus(struct ata_port *ap)$/;"	f	typeref:typename:u8	file:
ata_check_status	drivers/block/sata_dwc.c	/^static u8 ata_check_status(struct ata_port *ap)$/;"	f	typeref:typename:u8	file:
ata_cmd_feat	drivers/block/sata_mv.c	/^	u32 ata_cmd_feat;	\/* DW4 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
ata_completion_errors	drivers/block/sata_dwc.h	/^enum ata_completion_errors {$/;"	g
ata_control	drivers/block/mxc_ata.c	/^	u32	ata_control;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
ata_dev_classify	drivers/block/libata.c	/^u32 ata_dev_classify(u32 sig)$/;"	f	typeref:typename:u32
ata_dev_init_params	drivers/block/sata_dwc.c	/^static unsigned int ata_dev_init_params(struct ata_device *dev,$/;"	f	typeref:typename:unsigned int	file:
ata_dev_read_id	drivers/block/sata_dwc.c	/^static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,$/;"	f	typeref:typename:int	file:
ata_dev_read_sectors	drivers/block/sata_dwc.c	/^static int ata_dev_read_sectors(unsigned char *pdata, unsigned long datalen,$/;"	f	typeref:typename:int	file:
ata_dev_select	drivers/block/sata_dwc.c	/^static void ata_dev_select(struct ata_port *ap, unsigned int device,$/;"	f	typeref:typename:void	file:
ata_dev_set_feature	drivers/block/sata_dwc.c	/^static unsigned int ata_dev_set_feature(struct ata_device *dev,$/;"	f	typeref:typename:unsigned int	file:
ata_dev_typed	include/libata.h	/^enum ata_dev_typed {$/;"	g
ata_dev_write_sectors	drivers/block/sata_dwc.c	/^static int ata_dev_write_sectors(unsigned char* pdata, unsigned long datalen,$/;"	f	typeref:typename:int	file:
ata_device	drivers/block/sata_dwc.c	/^static struct ata_device		ata_device;$/;"	v	typeref:struct:ata_device	file:
ata_device	drivers/block/sata_dwc.h	/^struct ata_device {$/;"	s
ata_device_type	drivers/block/fsl_sata.h	/^	int		ata_device_type;	\/* device type *\/$/;"	m	struct:fsl_sata	typeref:typename:int
ata_drive_40wire	include/libata.h	/^static inline int ata_drive_40wire(const u16 *dev_id)$/;"	f	typeref:typename:int
ata_drive_40wire_relaxed	include/libata.h	/^static inline int ata_drive_40wire_relaxed(const u16 *dev_id)$/;"	f	typeref:typename:int
ata_dump_id	drivers/block/libata.c	/^void ata_dump_id(u16 *id)$/;"	f	typeref:typename:void
ata_exec_command	drivers/block/sata_dwc.c	/^static void ata_exec_command(struct ata_port *ap,$/;"	f	typeref:typename:void	file:
ata_exec_internal	drivers/block/sata_dwc.c	/^unsigned ata_exec_internal(struct ata_device *dev,$/;"	f	typeref:typename:unsigned
ata_host	drivers/block/sata_dwc.h	/^struct ata_host {$/;"	s
ata_hsm_move	drivers/block/sata_dwc.c	/^static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,$/;"	f	typeref:typename:int	file:
ata_hsm_qc_complete	drivers/block/sata_dwc.c	/^static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)$/;"	f	typeref:typename:void	file:
ata_id_c_string	drivers/block/libata.c	/^void ata_id_c_string(const u16 *id, unsigned char *s,$/;"	f	typeref:typename:void
ata_id_cdb_intr	include/libata.h	/^#define ata_id_cdb_intr(/;"	d
ata_id_current_chs_valid	include/libata.h	/^static inline int ata_id_current_chs_valid(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_dipm	drivers/block/sata_dwc.c	/^static int ata_id_has_dipm(const u16 *id)$/;"	f	typeref:typename:int	file:
ata_id_has_dma	include/libata.h	/^#define ata_id_has_dma(/;"	d
ata_id_has_dword_io	include/libata.h	/^static inline int ata_id_has_dword_io(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_flush	include/libata.h	/^static inline int ata_id_has_flush(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_flush_ext	include/libata.h	/^static inline int ata_id_has_flush_ext(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_fua	include/libata.h	/^static inline int ata_id_has_fua(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_hipm	drivers/block/sata_dwc.c	/^static int ata_id_has_hipm(const u16 *id)$/;"	f	typeref:typename:int	file:
ata_id_has_iordy	include/libata.h	/^#define ata_id_has_iordy(/;"	d
ata_id_has_lba	include/libata.h	/^#define ata_id_has_lba(/;"	d
ata_id_has_lba48	include/libata.h	/^static inline int ata_id_has_lba48(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_ncq	include/libata.h	/^#define ata_id_has_ncq(/;"	d
ata_id_has_pm	include/libata.h	/^static inline int ata_id_has_pm(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_tpm	include/libata.h	/^static inline int ata_id_has_tpm(const u16 *id)$/;"	f	typeref:typename:int
ata_id_has_wcache	include/libata.h	/^static inline int ata_id_has_wcache(const u16 *id)$/;"	f	typeref:typename:int
ata_id_hpa_enabled	include/libata.h	/^static inline int ata_id_hpa_enabled(const u16 *id)$/;"	f	typeref:typename:int
ata_id_iordy_disable	include/libata.h	/^#define ata_id_iordy_disable(/;"	d
ata_id_is_ata	include/libata.h	/^#define ata_id_is_ata(/;"	d
ata_id_is_cfa	include/libata.h	/^static inline int ata_id_is_cfa(const u16 *id)$/;"	f	typeref:typename:int
ata_id_is_sata	include/libata.h	/^static inline int ata_id_is_sata(const u16 *id)$/;"	f	typeref:typename:int
ata_id_major_version	include/libata.h	/^static inline unsigned int ata_id_major_version(const u16 *id)$/;"	f	typeref:typename:unsigned int
ata_id_n_sectors	drivers/block/libata.c	/^u64 ata_id_n_sectors(u16 *id)$/;"	f	typeref:typename:u64
ata_id_queue_depth	include/libata.h	/^#define ata_id_queue_depth(/;"	d
ata_id_rahead_enabled	include/libata.h	/^static inline int ata_id_rahead_enabled(const u16 *id)$/;"	f	typeref:typename:int
ata_id_removeable	include/libata.h	/^#define ata_id_removeable(/;"	d
ata_id_strcpy	drivers/block/ahci.c	/^static char *ata_id_strcpy(u16 *target, u16 *src, int len)$/;"	f	typeref:typename:char *	file:
ata_id_string	drivers/block/libata.c	/^static void ata_id_string(const u16 *id, unsigned char *s,$/;"	f	typeref:typename:void	file:
ata_id_u32	include/libata.h	/^#define ata_id_u32(/;"	d
ata_id_u64	include/libata.h	/^#define ata_id_u64(/;"	d
ata_id_wcache_enabled	include/libata.h	/^static inline int ata_id_wcache_enabled(const u16 *id)$/;"	f	typeref:typename:int
ata_io_flush	drivers/block/ahci.c	/^static int ata_io_flush(u8 port)$/;"	f	typeref:typename:int	file:
ata_ioctls	include/libata.h	/^enum ata_ioctls {$/;"	g
ata_ioports	drivers/block/pata_bfin.h	/^struct ata_ioports {$/;"	s
ata_ioports	drivers/block/sata_dwc.h	/^struct ata_ioports {$/;"	s
ata_irq_on	drivers/block/sata_dwc.c	/^static u8 ata_irq_on(struct ata_port *ap)$/;"	f	typeref:typename:u8	file:
ata_is_atapi	include/libata.h	/^static inline int ata_is_atapi(u8 prot)$/;"	f	typeref:typename:int
ata_is_data	include/libata.h	/^static inline int ata_is_data(u8 prot)$/;"	f	typeref:typename:int
ata_is_dma	include/libata.h	/^static inline int ata_is_dma(u8 prot)$/;"	f	typeref:typename:int
ata_is_ncq	include/libata.h	/^static inline int ata_is_ncq(u8 prot)$/;"	f	typeref:typename:int
ata_is_nodata	include/libata.h	/^static inline int ata_is_nodata(u8 prot)$/;"	f	typeref:typename:int
ata_is_pio	include/libata.h	/^static inline int ata_is_pio(u8 prot)$/;"	f	typeref:typename:int
ata_link	drivers/block/sata_dwc.h	/^struct ata_link {$/;"	s
ata_low_level_rw	drivers/block/sata_mv.c	/^static u32 ata_low_level_rw(int dev, lbaint_t blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:u32	file:
ata_low_level_rw_lba28	drivers/block/dwc_ahsata.c	/^u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:u32
ata_low_level_rw_lba28	drivers/block/fsl_sata.c	/^static u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt,$/;"	f	typeref:typename:u32	file:
ata_low_level_rw_lba48	drivers/block/dwc_ahsata.c	/^u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:u32
ata_low_level_rw_lba48	drivers/block/fsl_sata.c	/^static u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:u32	file:
ata_mmio_data_xfer	drivers/block/sata_dwc.c	/^static void ata_mmio_data_xfer(struct ata_device *dev, unsigned char *buf,$/;"	f	typeref:typename:void	file:
ata_mode	drivers/block/pata_bfin.h	/^	unsigned int ata_mode;$/;"	m	struct:ata_port	typeref:typename:unsigned int
ata_ok	include/libata.h	/^static inline int ata_ok(u8 status)$/;"	f	typeref:typename:int
ata_pio_queue_task	drivers/block/sata_dwc.c	/^static void ata_pio_queue_task(struct ata_port *ap,$/;"	f	typeref:typename:void	file:
ata_pio_sector	drivers/block/sata_dwc.c	/^static void ata_pio_sector(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
ata_pio_sectors	drivers/block/sata_dwc.c	/^static void ata_pio_sectors(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
ata_pio_task	drivers/block/sata_dwc.c	/^static void ata_pio_task(struct ata_port *arg_ap)$/;"	f	typeref:typename:void	file:
ata_port	drivers/block/pata_bfin.h	/^struct ata_port {$/;"	s
ata_port	drivers/block/sata_dwc.h	/^struct ata_port {$/;"	s
ata_port_freeze	drivers/block/sata_dwc.c	/^static int ata_port_freeze(struct ata_port *ap)$/;"	f	typeref:typename:int	file:
ata_port_info	drivers/block/sata_dwc.h	/^struct ata_port_info {$/;"	s
ata_port_stats	drivers/block/sata_dwc.h	/^struct ata_port_stats {$/;"	s
ata_probe_timeout	drivers/block/sata_dwc.c	/^static int ata_probe_timeout = (ATA_TMOUT_INTERNAL \/ 100);$/;"	v	typeref:typename:int	file:
ata_prot_flags	include/libata.h	/^static inline unsigned int ata_prot_flags(u8 prot)$/;"	f	typeref:typename:unsigned int
ata_qc_cb_t	drivers/block/sata_dwc.h	/^typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);$/;"	t	typeref:typename:void (*)(struct ata_queued_cmd * qc)
ata_qc_complete	drivers/block/sata_dwc.c	/^static void ata_qc_complete(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
ata_qc_free	drivers/block/sata_dwc.c	/^static void ata_qc_free(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
ata_qc_issue	drivers/block/sata_dwc.c	/^static void ata_qc_issue(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
ata_qc_issue_prot	drivers/block/sata_dwc.c	/^static unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:unsigned int	file:
ata_qc_reinit	drivers/block/sata_dwc.c	/^static void ata_qc_reinit(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
ata_queued_cmd	drivers/block/sata_dwc.h	/^struct ata_queued_cmd {$/;"	s
ata_scsiop_inquiry	drivers/block/ahci.c	/^static int ata_scsiop_inquiry(ccb *pccb)$/;"	f	typeref:typename:int	file:
ata_scsiop_read_capacity10	drivers/block/ahci.c	/^static int ata_scsiop_read_capacity10(ccb *pccb)$/;"	f	typeref:typename:int	file:
ata_scsiop_read_capacity16	drivers/block/ahci.c	/^static int ata_scsiop_read_capacity16(ccb *pccb)$/;"	f	typeref:typename:int	file:
ata_scsiop_read_write	drivers/block/ahci.c	/^static int ata_scsiop_read_write(ccb *pccb, u8 is_write)$/;"	f	typeref:typename:int	file:
ata_scsiop_test_unit_ready	drivers/block/ahci.c	/^static int ata_scsiop_test_unit_ready(ccb *pccb)$/;"	f	typeref:typename:int	file:
ata_sect_count	drivers/block/sata_mv.c	/^	u32 ata_sect_count;	\/* DW7 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
ata_std_dev_select	drivers/block/sata_dwc.c	/^static void ata_std_dev_select(struct ata_port *ap, unsigned int device)$/;"	f	typeref:typename:void	file:
ata_swap_buf_le16	drivers/block/libata.c	/^void ata_swap_buf_le16(u16 *buf, unsigned int buf_words)$/;"	f	typeref:typename:void
ata_tag_internal	drivers/block/sata_dwc.c	/^static unsigned int ata_tag_internal(unsigned int tag)$/;"	f	typeref:typename:unsigned int	file:
ata_taskfile	include/libata.h	/^struct ata_taskfile {$/;"	s
ata_tf_load	drivers/block/sata_dwc.c	/^static void ata_tf_load(struct ata_port *ap,$/;"	f	typeref:typename:void	file:
ata_tf_protocols	include/libata.h	/^enum ata_tf_protocols {$/;"	g
ata_tf_read	drivers/block/sata_dwc.c	/^static void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)$/;"	f	typeref:typename:void	file:
ata_tf_to_host	drivers/block/sata_dwc.c	/^static void ata_tf_to_host(struct ata_port *ap,$/;"	f	typeref:typename:void	file:
ata_wait_idle	drivers/block/sata_dwc.c	/^static u8 ata_wait_idle(struct ata_port *ap)$/;"	f	typeref:typename:u8	file:
ata_wait_register	drivers/block/fsl_sata.c	/^static int ata_wait_register(unsigned __iomem *addr, u32 mask,$/;"	f	typeref:typename:int	file:
ata_wait_register	drivers/block/sata_mv.c	/^static int ata_wait_register(u32 *addr, u32 mask, u32 val, u32 timeout_msec)$/;"	f	typeref:typename:int	file:
ata_wait_register	drivers/block/sata_sil.c	/^static u32 ata_wait_register(void *reg, u32 mask,$/;"	f	typeref:typename:u32	file:
ata_xfer_mask	drivers/block/sata_dwc.h	/^enum ata_xfer_mask {$/;"	g
atac	arch/m68k/include/asm/coldfire/ata.h	/^typedef struct atac {$/;"	s
atac_t	arch/m68k/include/asm/coldfire/ata.h	/^} atac_t;$/;"	t	typeref:struct:atac
atacsctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 atacsctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
atag	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 atag;$/;"	m	struct:ssi	typeref:typename:u32
ataid	drivers/block/ahci.c	/^u16 *ataid[AHCI_MAX_PORTS];$/;"	v	typeref:typename:u16 * []
atapi	include/linux/edd.h	/^		} __attribute__ ((packed)) atapi;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08
atapi_cdb_len	include/libata.h	/^static inline int atapi_cdb_len(const u16 *dev_id)$/;"	f	typeref:typename:int
atapi_command_packet_set	include/libata.h	/^static inline int atapi_command_packet_set(const u16 *dev_id)$/;"	f	typeref:typename:int
atapi_id_dmadir	include/libata.h	/^static inline int atapi_id_dmadir(const u16 *dev_id)$/;"	f	typeref:typename:int
atapi_inquiry	common/ide.c	/^static void atapi_inquiry(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void	file:
atapi_issue	common/ide.c	/^unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,$/;"	f	typeref:typename:unsigned char
atapi_issue_autoreq	common/ide.c	/^unsigned char atapi_issue_autoreq(int device,$/;"	f	typeref:typename:unsigned char
atapi_read	common/ide.c	/^ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong
atapi_wait_mask	common/ide.c	/^static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)$/;"	f	typeref:typename:uchar	file:
atb_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned atb_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
atcfg1	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	atcfg1;		\/* 0x70: APB_MISC_GP_ATCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg1	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	atcfg1;		\/* 0x70: APB_MISC_GP_ATCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg1	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	atcfg1;		\/* 0x70: APB_MISC_GP_ATCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg1	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	atcfg1;		\/* 0x70: APB_MISC_GP_ATCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg1	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	atcfg1;		\/* 0x70: APB_MISC_GP_ATCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg2	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	atcfg2;		\/* 0x74: APB_MISC_GP_ATCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg2	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	atcfg2;		\/* 0x74: APB_MISC_GP_ATCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg2	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	atcfg2;		\/* 0x74: APB_MISC_GP_ATCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg2	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	atcfg2;		\/* 0x74: APB_MISC_GP_ATCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg2	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	atcfg2;		\/* 0x74: APB_MISC_GP_ATCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg3	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	atcfg3;		\/* 0x78: APB_MISC_GP_ATCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg3	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	atcfg3;		\/* 0x78: APB_MISC_GP_ATCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg3	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	atcfg3;		\/* 0x78: APB_MISC_GP_ATCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg3	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	atcfg3;		\/* 0x78: APB_MISC_GP_ATCFG3PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg4	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	atcfg4;		\/* 0x7C: APB_MISC_GP_ATCFG4PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg4	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	atcfg4;		\/* 0x7C: APB_MISC_GP_ATCFG4PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg4	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	atcfg4;		\/* 0x7C: APB_MISC_GP_ATCFG4PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg4	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	atcfg4;		\/* 0x7C: APB_MISC_GP_ATCFG4PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg5	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	atcfg5;		\/* 0x80: APB_MISC_GP_ATCFG5PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg5	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	atcfg5;		\/* 0x80: APB_MISC_GP_ATCFG5PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg5	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	atcfg5;		\/* 0x80: APB_MISC_GP_ATCFG5PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg5	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	atcfg5;		\/* 0x80: APB_MISC_GP_ATCFG5PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg6	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	atcfg6;		\/* 0x194: APB_MISC_GP_ATCFG6PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg6	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	atcfg6;		\/* 0x194: APB_MISC_GP_ATCFG6PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atcfg6	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	atcfg6;		\/* 0x194: APB_MISC_GP_ATCFG6PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
atclk_stopctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	atclk_stopctrl;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
atclk_stopctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	atclk_stopctrl;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
ater	arch/powerpc/include/asm/immap_512x.h	/^	u32 ater;		\/* Arbiter Transfer Error Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
atf_dram_size	board/cavium/thunderx/atf.c	/^ssize_t atf_dram_size(unsigned int node)$/;"	f	typeref:typename:ssize_t
atf_env_count	board/cavium/thunderx/atf.c	/^ssize_t atf_env_count(void)$/;"	f	typeref:typename:ssize_t
atf_env_string	board/cavium/thunderx/atf.c	/^ssize_t atf_env_string(size_t index, char *str)$/;"	f	typeref:typename:ssize_t
atf_erase_nor	board/cavium/thunderx/atf.c	/^ssize_t atf_erase_nor(uintptr_t offset, size_t size)$/;"	f	typeref:typename:ssize_t
atf_get_part	board/cavium/thunderx/atf.c	/^ssize_t atf_get_part(struct storage_partition *part, unsigned int index)$/;"	f	typeref:typename:ssize_t
atf_get_pcount	board/cavium/thunderx/atf.c	/^ssize_t atf_get_pcount(void)$/;"	f	typeref:typename:ssize_t
atf_node_count	board/cavium/thunderx/atf.c	/^ssize_t atf_node_count(void)$/;"	f	typeref:typename:ssize_t
atf_print_part_table	board/cavium/thunderx/atf.c	/^static void atf_print_part_table(void)$/;"	f	typeref:typename:void	file:
atf_print_uid	board/cavium/thunderx/atf.c	/^static void atf_print_uid(void)$/;"	f	typeref:typename:void	file:
atf_print_ver	board/cavium/thunderx/atf.c	/^static void atf_print_ver(void)$/;"	f	typeref:typename:void	file:
atf_read_mmc	board/cavium/thunderx/atf.c	/^ssize_t atf_read_mmc(uintptr_t offset, void *buffer, size_t size)$/;"	f	typeref:typename:ssize_t
atf_read_nor	board/cavium/thunderx/atf.c	/^ssize_t atf_read_nor(uintptr_t offset, void *buffer, size_t size)$/;"	f	typeref:typename:ssize_t
atf_write_mmc	board/cavium/thunderx/atf.c	/^ssize_t atf_write_mmc(uintptr_t offset, const void *buffer, size_t size)$/;"	f	typeref:typename:ssize_t
atf_write_nor	board/cavium/thunderx/atf.c	/^ssize_t atf_write_nor(uintptr_t offset, const void *buffer, size_t size)$/;"	f	typeref:typename:ssize_t
ath79_cs_info	drivers/spi/ath79_spi.c	/^static int ath79_cs_info(struct udevice *bus, uint cs,$/;"	f	typeref:typename:int	file:
ath79_eth_reset	arch/mips/mach-ath79/reset.c	/^int ath79_eth_reset(void)$/;"	f	typeref:typename:int
ath79_get_bootstrap	arch/mips/mach-ath79/reset.c	/^u32 ath79_get_bootstrap(void)$/;"	f	typeref:typename:u32
ath79_soc_desc	arch/mips/mach-ath79/cpu.c	/^struct ath79_soc_desc {$/;"	s	file:
ath79_soc_type	arch/mips/mach-ath79/include/mach/ath79.h	/^enum ath79_soc_type {$/;"	g
ath79_spi_claim_bus	drivers/spi/ath79_spi.c	/^static int ath79_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ath79_spi_ids	drivers/spi/ath79_spi.c	/^static const struct udevice_id ath79_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ath79_spi_ops	drivers/spi/ath79_spi.c	/^static const struct dm_spi_ops ath79_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
ath79_spi_priv	drivers/spi/ath79_spi.c	/^struct ath79_spi_priv {$/;"	s	file:
ath79_spi_probe	drivers/spi/ath79_spi.c	/^static int ath79_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
ath79_spi_release_bus	drivers/spi/ath79_spi.c	/^static int ath79_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ath79_spi_set_mode	drivers/spi/ath79_spi.c	/^static int ath79_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
ath79_spi_set_speed	drivers/spi/ath79_spi.c	/^static int ath79_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
ath79_spi_xfer	drivers/spi/ath79_spi.c	/^static int ath79_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
ath79_usb_reset	arch/mips/mach-ath79/reset.c	/^int ath79_usb_reset(void)$/;"	f	typeref:typename:int
ati_radeon_id_family_table	drivers/video/ati_radeon_fb.c	/^static u16 ati_radeon_id_family_table[][2] = {$/;"	v	typeref:typename:u16[][2]	file:
ati_radeon_pci_ids	drivers/video/ati_radeon_fb.c	/^static struct pci_device_id ati_radeon_pci_ids[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
atibios_debug_mode	drivers/bios_emulator/atibios.c	/^static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,$/;"	f	typeref:typename:int	file:
atibios_set_vesa_mode	drivers/bios_emulator/atibios.c	/^static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,$/;"	f	typeref:typename:int	file:
atime	include/ext_common.h	/^	__le32 atime;$/;"	m	struct:ext2_inode	typeref:typename:__le32
atime	include/jffs2/jffs2.h	/^	__u32 atime;      \/* Last access time.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
atime_nsec	fs/ubifs/ubifs-media.h	/^	__le32 atime_nsec;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
atime_sec	fs/ubifs/ubifs-media.h	/^	__le64 atime_sec;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le64
atl	arch/arm/dts/dra7.dtsi	/^		atl: atl@4843c000 {$/;"	l
atl_active	drivers/usb/host/isp116x.h	/^	struct isp116x_ep *atl_active;$/;"	m	struct:isp116x	typeref:struct:isp116x_ep *
atl_buflen	drivers/usb/host/isp116x.h	/^	int atl_buflen;$/;"	m	struct:isp116x	typeref:typename:int
atl_bufshrt	drivers/usb/host/isp116x.h	/^	int atl_bufshrt;$/;"	m	struct:isp116x	typeref:typename:int
atl_clkin0_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	atl_clkin0_ck: atl_clkin0_ck {$/;"	l
atl_clkin1_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	atl_clkin1_ck: atl_clkin1_ck {$/;"	l
atl_clkin2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	atl_clkin2_ck: atl_clkin2_ck {$/;"	l
atl_clkin3_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	atl_clkin3_ck: atl_clkin3_ck {$/;"	l
atl_dpll_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	atl_dpll_clk_mux: atl_dpll_clk_mux {$/;"	l
atl_finishing	drivers/usb/host/isp116x.h	/^	int atl_finishing;$/;"	m	struct:isp116x	typeref:typename:int
atl_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	atl_gfclk_mux: atl_gfclk_mux {$/;"	l
atl_last_dir	drivers/usb/host/isp116x.h	/^	int atl_last_dir;$/;"	m	struct:isp116x	typeref:typename:int
atlclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int atlclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
atm_networking	include/usbdescriptors.h	/^		struct usb_class_atm_networking_descriptor atm_networking;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_atm_networking_descriptor
atmel	arch/arm/dts/am335x-rut.dts	/^	atmel: atmel_mxt_ts@4a {$/;"	l
atmel_check_image_type	tools/atmelimage.c	/^static int atmel_check_image_type(uint8_t type)$/;"	f	typeref:typename:int	file:
atmel_check_params	tools/atmelimage.c	/^static int atmel_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
atmel_df_pow2	examples/standalone/atmel_df_pow2.c	/^int atmel_df_pow2(int argc, char * const argv[])$/;"	f	typeref:typename:int
atmel_fb_init	drivers/video/atmel_lcdfb.c	/^static void atmel_fb_init(ulong addr, struct display_timing *timing, int bpix,$/;"	f	typeref:typename:void	file:
atmel_fb_lcd_bind	drivers/video/atmel_lcdfb.c	/^static int atmel_fb_lcd_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_fb_lcd_ids	drivers/video/atmel_lcdfb.c	/^static const struct udevice_id atmel_fb_lcd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
atmel_fb_lcd_probe	drivers/video/atmel_lcdfb.c	/^static int atmel_fb_lcd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_fb_ofdata_to_platdata	drivers/video/atmel_lcdfb.c	/^static int atmel_fb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_fb_priv	drivers/video/atmel_lcdfb.c	/^struct atmel_fb_priv {$/;"	s	file:
atmel_find_pmecc_parameter_in_token	tools/atmelimage.c	/^static int atmel_find_pmecc_parameter_in_token(const char *token)$/;"	f	typeref:typename:int	file:
atmel_hlcd_regs	include/atmel_hlcdc.h	/^struct atmel_hlcd_regs {$/;"	s
atmel_hwecc_nand_init_param	drivers/mtd/nand/atmel_nand.c	/^int atmel_hwecc_nand_init_param(struct nand_chip *nand, struct mtd_info *mtd)$/;"	f	typeref:typename:int
atmel_lcd_platdata	include/atmel_lcd.h	/^struct atmel_lcd_platdata {$/;"	s
atmel_matrix	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^struct atmel_matrix {$/;"	s
atmel_mci	include/atmel_mci.h	/^typedef struct atmel_mci {$/;"	s
atmel_mci_get_version	drivers/mmc/gen_atmel_mci.c	/^static unsigned int atmel_mci_get_version(struct atmel_mci *mci)$/;"	f	typeref:typename:unsigned int	file:
atmel_mci_init	drivers/mmc/gen_atmel_mci.c	/^int atmel_mci_init(void *regs)$/;"	f	typeref:typename:int
atmel_mci_ops	drivers/mmc/gen_atmel_mci.c	/^static const struct mmc_ops atmel_mci_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
atmel_mci_priv	drivers/mmc/gen_atmel_mci.c	/^struct atmel_mci_priv {$/;"	s	file:
atmel_mci_t	include/atmel_mci.h	/^} atmel_mci_t;$/;"	t	typeref:struct:atmel_mci
atmel_mpddr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^struct atmel_mpddr {$/;"	s
atmel_mpddr_op	arch/arm/mach-at91/mpddrc.c	/^static inline void atmel_mpddr_op(const struct atmel_mpddr *mpddr,$/;"	f	typeref:typename:void	file:
atmel_mpddrc_config	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^struct atmel_mpddrc_config {$/;"	s
atmel_nand_calculate	drivers/mtd/nand/atmel_nand.c	/^static int atmel_nand_calculate(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
atmel_nand_chip_init	drivers/mtd/nand/atmel_nand.c	/^int atmel_nand_chip_init(int devnum, ulong base_addr)$/;"	f	typeref:typename:int
atmel_nand_correct	drivers/mtd/nand/atmel_nand.c	/^static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
atmel_nand_host	drivers/mtd/nand/atmel_nand.c	/^struct atmel_nand_host {$/;"	s	file:
atmel_nand_hwctl	drivers/mtd/nand/atmel_nand.c	/^static void atmel_nand_hwctl(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void	file:
atmel_nand_pmecc_read_page	drivers/mtd/nand/atmel_nand.c	/^static int atmel_nand_pmecc_read_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
atmel_nand_pmecc_write_page	drivers/mtd/nand/atmel_nand.c	/^static int atmel_nand_pmecc_write_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
atmel_nand_read_page	drivers/mtd/nand/atmel_nand.c	/^static int atmel_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
atmel_oobinfo_large	drivers/mtd/nand/atmel_nand.c	/^static struct nand_ecclayout atmel_oobinfo_large = {$/;"	v	typeref:struct:nand_ecclayout	file:
atmel_oobinfo_small	drivers/mtd/nand/atmel_nand.c	/^static struct nand_ecclayout atmel_oobinfo_small = {$/;"	v	typeref:struct:nand_ecclayout	file:
atmel_parse_pmecc_params	tools/atmelimage.c	/^static int atmel_parse_pmecc_params(char *txt)$/;"	f	typeref:typename:int	file:
atmel_pinctrl_get_pinconf	drivers/pinctrl/pinctrl-at91-pio4.c	/^static u32 atmel_pinctrl_get_pinconf(const void *blob, int node)$/;"	f	typeref:typename:u32	file:
atmel_pinctrl_match	drivers/pinctrl/pinctrl-at91-pio4.c	/^static const struct udevice_id atmel_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
atmel_pinctrl_ops	drivers/pinctrl/pinctrl-at91-pio4.c	/^const struct pinctrl_ops atmel_pinctrl_ops  = {$/;"	v	typeref:typename:const struct pinctrl_ops
atmel_pinctrl_probe	drivers/pinctrl/pinctrl-at91-pio4.c	/^static int atmel_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_pinctrl_set_state	drivers/pinctrl/pinctrl-at91-pio4.c	/^static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)$/;"	f	typeref:typename:int	file:
atmel_pio4_bank_base	drivers/gpio/atmel_pio4.c	/^static struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,$/;"	f	typeref:struct:atmel_pio4_port *	file:
atmel_pio4_bank_base	drivers/pinctrl/pinctrl-at91-pio4.c	/^static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,$/;"	f	typeref:struct:atmel_pio4_port *	file:
atmel_pio4_bind	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_pio4_config_io_func	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_config_io_func(u32 port, u32 pin,$/;"	f	typeref:typename:int	file:
atmel_pio4_direction_input	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
atmel_pio4_direction_output	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_direction_output(struct udevice *dev,$/;"	f	typeref:typename:int	file:
atmel_pio4_get_function	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
atmel_pio4_get_pio_input	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_get_pio_input(u32 port, u32 pin)$/;"	f	typeref:typename:int
atmel_pio4_get_value	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
atmel_pio4_ids	drivers/gpio/atmel_pio4.c	/^static const struct udevice_id atmel_pio4_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
atmel_pio4_ops	drivers/gpio/atmel_pio4.c	/^static const struct dm_gpio_ops atmel_pio4_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
atmel_pio4_platdata	drivers/gpio/atmel_pio4.c	/^struct atmel_pio4_platdata {$/;"	s	file:
atmel_pio4_platdata	drivers/pinctrl/pinctrl-at91-pio4.c	/^struct atmel_pio4_platdata {$/;"	s	file:
atmel_pio4_port	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^struct atmel_pio4_port {$/;"	s
atmel_pio4_port_base	drivers/gpio/atmel_pio4.c	/^static struct atmel_pio4_port *atmel_pio4_port_base(u32 port)$/;"	f	typeref:struct:atmel_pio4_port *	file:
atmel_pio4_probe	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_pio4_set_a_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_b_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_c_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_d_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_e_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_f_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_g_periph	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_gpio	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_gpio(u32 port, u32 pin, u32 use_pullup)$/;"	f	typeref:typename:int
atmel_pio4_set_pio_output	drivers/gpio/atmel_pio4.c	/^int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)$/;"	f	typeref:typename:int
atmel_pio4_set_value	drivers/gpio/atmel_pio4.c	/^static int atmel_pio4_set_value(struct udevice *dev,$/;"	f	typeref:typename:int	file:
atmel_pioctrl_data	drivers/gpio/atmel_pio4.c	/^struct atmel_pioctrl_data {$/;"	s	file:
atmel_pmecc_core_init	drivers/mtd/nand/atmel_nand.c	/^static void atmel_pmecc_core_init(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
atmel_pmecc_nand_init_params	drivers/mtd/nand/atmel_nand.c	/^static int atmel_pmecc_nand_init_params(struct nand_chip *nand,$/;"	f	typeref:typename:int	file:
atmel_pmecc_oobinfo	drivers/mtd/nand/atmel_nand.c	/^static struct nand_ecclayout atmel_pmecc_oobinfo;$/;"	v	typeref:struct:nand_ecclayout	file:
atmel_print_header	tools/atmelimage.c	/^static void atmel_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
atmel_print_pmecc_header	tools/atmelimage.c	/^static void atmel_print_pmecc_header(const uint32_t word)$/;"	f	typeref:typename:void	file:
atmel_sama5d2_pioctrl_data	drivers/gpio/atmel_pio4.c	/^static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = {$/;"	v	typeref:typename:const struct atmel_pioctrl_data	file:
atmel_sdhci_bind	drivers/mmc/atmel_sdhci.c	/^static int atmel_sdhci_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_sdhci_ids	drivers/mmc/atmel_sdhci.c	/^static const struct udevice_id atmel_sdhci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
atmel_sdhci_init	drivers/mmc/atmel_sdhci.c	/^int atmel_sdhci_init(void *regbase, u32 id)$/;"	f	typeref:typename:int
atmel_sdhci_plat	drivers/mmc/atmel_sdhci.c	/^struct atmel_sdhci_plat {$/;"	s	file:
atmel_sdhci_probe	drivers/mmc/atmel_sdhci.c	/^static int atmel_sdhci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_serial_activate	drivers/serial/atmel_usart.c	/^static void atmel_serial_activate(atmel_usart3_t *usart)$/;"	f	typeref:typename:void	file:
atmel_serial_drv	drivers/serial/atmel_usart.c	/^static struct serial_device atmel_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
atmel_serial_getc	drivers/serial/atmel_usart.c	/^static int atmel_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_serial_getc	drivers/serial/atmel_usart.c	/^static int atmel_serial_getc(void)$/;"	f	typeref:typename:int	file:
atmel_serial_ids	drivers/serial/atmel_usart.c	/^static const struct udevice_id atmel_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
atmel_serial_init	drivers/serial/atmel_usart.c	/^static int atmel_serial_init(void)$/;"	f	typeref:typename:int	file:
atmel_serial_init_internal	drivers/serial/atmel_usart.c	/^static void atmel_serial_init_internal(atmel_usart3_t *usart)$/;"	f	typeref:typename:void	file:
atmel_serial_initialize	drivers/serial/atmel_usart.c	/^void atmel_serial_initialize(void)$/;"	f	typeref:typename:void
atmel_serial_ops	drivers/serial/atmel_usart.c	/^static const struct dm_serial_ops atmel_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
atmel_serial_pending	drivers/serial/atmel_usart.c	/^static int atmel_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
atmel_serial_platdata	arch/arm/mach-at91/include/mach/atmel_serial.h	/^struct atmel_serial_platdata {$/;"	s
atmel_serial_priv	drivers/serial/atmel_usart.c	/^struct atmel_serial_priv {$/;"	s	file:
atmel_serial_probe	drivers/serial/atmel_usart.c	/^static int atmel_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_serial_putc	drivers/serial/atmel_usart.c	/^static int atmel_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
atmel_serial_putc	drivers/serial/atmel_usart.c	/^static void atmel_serial_putc(char c)$/;"	f	typeref:typename:void	file:
atmel_serial_setbrg	drivers/serial/atmel_usart.c	/^int atmel_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
atmel_serial_setbrg	drivers/serial/atmel_usart.c	/^static void atmel_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
atmel_serial_setbrg_internal	drivers/serial/atmel_usart.c	/^static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id,$/;"	f	typeref:typename:void	file:
atmel_serial_tstc	drivers/serial/atmel_usart.c	/^static int atmel_serial_tstc(void)$/;"	f	typeref:typename:int	file:
atmel_set_header	tools/atmelimage.c	/^static void atmel_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
atmel_sfr	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^struct atmel_sfr {$/;"	s
atmel_spi_claim_bus	drivers/spi/atmel_spi.c	/^static int atmel_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_spi_cs_activate	drivers/spi/atmel_spi.c	/^static void atmel_spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
atmel_spi_cs_deactivate	drivers/spi/atmel_spi.c	/^static void atmel_spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
atmel_spi_enable_clk	drivers/spi/atmel_spi.c	/^static int atmel_spi_enable_clk(struct udevice *bus)$/;"	f	typeref:typename:int	file:
atmel_spi_ids	drivers/spi/atmel_spi.c	/^static const struct udevice_id atmel_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
atmel_spi_ops	drivers/spi/atmel_spi.c	/^static const struct dm_spi_ops atmel_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
atmel_spi_platdata	drivers/spi/atmel_spi.c	/^struct atmel_spi_platdata {$/;"	s	file:
atmel_spi_priv	drivers/spi/atmel_spi.c	/^struct atmel_spi_priv {$/;"	s	file:
atmel_spi_probe	drivers/spi/atmel_spi.c	/^static int atmel_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
atmel_spi_release_bus	drivers/spi/atmel_spi.c	/^static int atmel_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
atmel_spi_set_mode	drivers/spi/atmel_spi.c	/^static int atmel_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
atmel_spi_set_speed	drivers/spi/atmel_spi.c	/^static int atmel_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
atmel_spi_slave	drivers/spi/atmel_spi.h	/^struct atmel_spi_slave {$/;"	s
atmel_spi_xfer	drivers/spi/atmel_spi.c	/^static int atmel_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
atmel_usart3	drivers/serial/atmel_usart.h	/^typedef struct atmel_usart3 {$/;"	s
atmel_usart3_t	drivers/serial/atmel_usart.h	/^} atmel_usart3_t;$/;"	t	typeref:struct:atmel_usart3
atmel_usba_start	drivers/usb/gadget/atmel_usba_udc.c	/^static int atmel_usba_start(struct usba_udc *udc)$/;"	f	typeref:typename:int	file:
atmel_usba_stop	drivers/usb/gadget/atmel_usba_udc.c	/^static int atmel_usba_stop(struct usba_udc *udc)$/;"	f	typeref:typename:int	file:
atmel_verify_header	tools/atmelimage.c	/^static int atmel_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
atmel_vrec_header	tools/atmelimage.c	/^static int atmel_vrec_header(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
atmu	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_atmu	atmu;$/;"	m	struct:ccsr_rio	typeref:struct:rio_atmu
atmu_size	arch/powerpc/include/asm/fsl_srio.h	/^enum atmu_size {$/;"	g
atmu_size_bytes	arch/powerpc/include/asm/fsl_srio.h	/^#define atmu_size_bytes(/;"	d
atmu_size_mask	arch/powerpc/include/asm/fsl_srio.h	/^#define atmu_size_mask(/;"	d
atomic64_add	arch/arm/include/asm/atomic.h	/^static inline void atomic64_add(long i, volatile atomic64_t *v)$/;"	f	typeref:typename:void
atomic64_add	arch/arm/include/asm/atomic.h	/^static inline void atomic64_add(long long i, volatile atomic64_t *v)$/;"	f	typeref:typename:void
atomic64_dec	arch/arm/include/asm/atomic.h	/^static inline void atomic64_dec(volatile atomic64_t *v)$/;"	f	typeref:typename:void
atomic64_inc	arch/arm/include/asm/atomic.h	/^static inline void atomic64_inc(volatile atomic64_t *v)$/;"	f	typeref:typename:void
atomic64_read	arch/arm/include/asm/atomic.h	/^#define atomic64_read(/;"	d
atomic64_set	arch/arm/include/asm/atomic.h	/^#define atomic64_set(/;"	d
atomic64_sub	arch/arm/include/asm/atomic.h	/^static inline void atomic64_sub(long i, volatile atomic64_t *v)$/;"	f	typeref:typename:void
atomic64_sub	arch/arm/include/asm/atomic.h	/^static inline void atomic64_sub(long long i, volatile atomic64_t *v)$/;"	f	typeref:typename:void
atomic64_t	arch/arm/include/asm/atomic.h	/^typedef struct { volatile long counter; } atomic64_t;$/;"	t	typeref:struct:__anon78cc76970308
atomic64_t	arch/arm/include/asm/atomic.h	/^typedef struct { volatile long long counter; } atomic64_t;$/;"	t	typeref:struct:__anon78cc76970208
atomic_add	arch/arm/include/asm/atomic.h	/^static inline void atomic_add(int i, volatile atomic_t *v)$/;"	f	typeref:typename:void
atomic_add	arch/powerpc/include/asm/atomic.h	/^#define atomic_add(/;"	d
atomic_add	arch/x86/include/asm/atomic.h	/^static inline void atomic_add(int i, atomic_t *v)$/;"	f	typeref:typename:void
atomic_add	arch/xtensa/include/asm/atomic.h	/^static inline void atomic_add(int i, atomic_t *v)$/;"	f	typeref:typename:void
atomic_add_negative	arch/arm/include/asm/atomic.h	/^static inline int atomic_add_negative(int i, volatile atomic_t *v)$/;"	f	typeref:typename:int
atomic_add_return	arch/powerpc/include/asm/atomic.h	/^static __inline__ int atomic_add_return(int a, atomic_t *v)$/;"	f	typeref:typename:int
atomic_bitflags	drivers/usb/gadget/f_mass_storage.c	/^	unsigned long		atomic_bitflags;$/;"	m	struct:fsg_dev	typeref:typename:unsigned long	file:
atomic_clear_mask	arch/arm/include/asm/atomic.h	/^static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)$/;"	f	typeref:typename:void
atomic_clear_mask	arch/x86/include/asm/atomic.h	/^#define atomic_clear_mask(/;"	d
atomic_dec	arch/arm/include/asm/atomic.h	/^static inline void atomic_dec(volatile atomic_t *v)$/;"	f	typeref:typename:void
atomic_dec	arch/powerpc/include/asm/atomic.h	/^#define atomic_dec(/;"	d
atomic_dec	arch/x86/include/asm/atomic.h	/^static inline void atomic_dec(atomic_t *v)$/;"	f	typeref:typename:void
atomic_dec	arch/xtensa/include/asm/atomic.h	/^static inline void atomic_dec(atomic_t *v)$/;"	f	typeref:typename:void
atomic_dec_and_test	arch/arm/include/asm/atomic.h	/^static inline int atomic_dec_and_test(volatile atomic_t *v)$/;"	f	typeref:typename:int
atomic_dec_and_test	arch/powerpc/include/asm/atomic.h	/^#define atomic_dec_and_test(/;"	d
atomic_dec_return	arch/powerpc/include/asm/atomic.h	/^static __inline__ int atomic_dec_return(atomic_t *v)$/;"	f	typeref:typename:int
atomic_inc	arch/arm/include/asm/atomic.h	/^static inline void atomic_inc(volatile atomic_t *v)$/;"	f	typeref:typename:void
atomic_inc	arch/powerpc/include/asm/atomic.h	/^#define atomic_inc(/;"	d
atomic_inc	arch/x86/include/asm/atomic.h	/^static inline void atomic_inc(atomic_t *v)$/;"	f	typeref:typename:void
atomic_inc	arch/xtensa/include/asm/atomic.h	/^static inline void atomic_inc(atomic_t *v)$/;"	f	typeref:typename:void
atomic_inc_return	arch/powerpc/include/asm/atomic.h	/^static __inline__ int atomic_inc_return(atomic_t *v)$/;"	f	typeref:typename:int
atomic_inc_short	arch/x86/include/asm/atomic.h	/^static inline short int atomic_inc_short(short int *v)$/;"	f	typeref:typename:short int
atomic_long_add	include/asm-generic/atomic-long.h	/^static inline void atomic_long_add(long i, atomic_long_t *l)$/;"	f	typeref:typename:void
atomic_long_add_negative	include/asm-generic/atomic-long.h	/^static inline int atomic_long_add_negative(long i, atomic_long_t *l)$/;"	f	typeref:typename:int
atomic_long_add_return	include/asm-generic/atomic-long.h	/^static inline long atomic_long_add_return(long i, atomic_long_t *l)$/;"	f	typeref:typename:long
atomic_long_add_unless	include/asm-generic/atomic-long.h	/^static inline long atomic_long_add_unless(atomic_long_t *l, long a, long u)$/;"	f	typeref:typename:long
atomic_long_cmpxchg	include/asm-generic/atomic-long.h	/^#define atomic_long_cmpxchg(/;"	d
atomic_long_dec	include/asm-generic/atomic-long.h	/^static inline void atomic_long_dec(atomic_long_t *l)$/;"	f	typeref:typename:void
atomic_long_dec_and_test	include/asm-generic/atomic-long.h	/^static inline int atomic_long_dec_and_test(atomic_long_t *l)$/;"	f	typeref:typename:int
atomic_long_dec_return	include/asm-generic/atomic-long.h	/^static inline long atomic_long_dec_return(atomic_long_t *l)$/;"	f	typeref:typename:long
atomic_long_inc	include/asm-generic/atomic-long.h	/^static inline void atomic_long_inc(atomic_long_t *l)$/;"	f	typeref:typename:void
atomic_long_inc_and_test	include/asm-generic/atomic-long.h	/^static inline int atomic_long_inc_and_test(atomic_long_t *l)$/;"	f	typeref:typename:int
atomic_long_inc_not_zero	include/asm-generic/atomic-long.h	/^#define atomic_long_inc_not_zero(/;"	d
atomic_long_inc_return	include/asm-generic/atomic-long.h	/^static inline long atomic_long_inc_return(atomic_long_t *l)$/;"	f	typeref:typename:long
atomic_long_read	include/asm-generic/atomic-long.h	/^static inline long atomic_long_read(atomic_long_t *l)$/;"	f	typeref:typename:long
atomic_long_set	include/asm-generic/atomic-long.h	/^static inline void atomic_long_set(atomic_long_t *l, long i)$/;"	f	typeref:typename:void
atomic_long_sub	include/asm-generic/atomic-long.h	/^static inline void atomic_long_sub(long i, atomic_long_t *l)$/;"	f	typeref:typename:void
atomic_long_sub_and_test	include/asm-generic/atomic-long.h	/^static inline int atomic_long_sub_and_test(long i, atomic_long_t *l)$/;"	f	typeref:typename:int
atomic_long_sub_return	include/asm-generic/atomic-long.h	/^static inline long atomic_long_sub_return(long i, atomic_long_t *l)$/;"	f	typeref:typename:long
atomic_long_t	include/asm-generic/atomic-long.h	/^typedef atomic64_t atomic_long_t;$/;"	t	typeref:typename:atomic64_t
atomic_long_t	include/asm-generic/atomic-long.h	/^typedef atomic_t atomic_long_t;$/;"	t	typeref:typename:atomic_t
atomic_long_xchg	include/asm-generic/atomic-long.h	/^#define atomic_long_xchg(/;"	d
atomic_read	arch/arm/include/asm/atomic.h	/^#define atomic_read(/;"	d
atomic_read	arch/powerpc/include/asm/atomic.h	/^#define atomic_read(/;"	d
atomic_read	arch/x86/include/asm/atomic.h	/^static inline int atomic_read(const atomic_t *v)$/;"	f	typeref:typename:int
atomic_read	arch/xtensa/include/asm/atomic.h	/^#define atomic_read(/;"	d
atomic_read	drivers/usb/gadget/ether.c	/^#define atomic_read$/;"	d	file:
atomic_set	arch/arm/include/asm/atomic.h	/^#define atomic_set(/;"	d
atomic_set	arch/powerpc/include/asm/atomic.h	/^#define atomic_set(/;"	d
atomic_set	arch/x86/include/asm/atomic.h	/^static inline void atomic_set(atomic_t *v, int i)$/;"	f	typeref:typename:void
atomic_set	arch/xtensa/include/asm/atomic.h	/^#define atomic_set(/;"	d
atomic_set_mask	arch/x86/include/asm/atomic.h	/^#define atomic_set_mask(/;"	d
atomic_sub	arch/arm/include/asm/atomic.h	/^static inline void atomic_sub(int i, volatile atomic_t *v)$/;"	f	typeref:typename:void
atomic_sub	arch/powerpc/include/asm/atomic.h	/^#define atomic_sub(/;"	d
atomic_sub	arch/x86/include/asm/atomic.h	/^static inline void atomic_sub(int i, atomic_t *v)$/;"	f	typeref:typename:void
atomic_sub	arch/xtensa/include/asm/atomic.h	/^static inline void atomic_sub(int i, atomic_t *v)$/;"	f	typeref:typename:void
atomic_sub_and_test	arch/powerpc/include/asm/atomic.h	/^#define atomic_sub_and_test(/;"	d
atomic_sub_return	arch/powerpc/include/asm/atomic.h	/^static __inline__ int atomic_sub_return(int a, atomic_t *v)$/;"	f	typeref:typename:int
atomic_t	arch/arm/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	t	typeref:struct:__anon78cc76970108
atomic_t	arch/powerpc/include/asm/atomic.h	/^typedef struct { int counter; } atomic_t;$/;"	t	typeref:struct:__anon091730170208
atomic_t	arch/powerpc/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	t	typeref:struct:__anon091730170108
atomic_t	arch/x86/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	t	typeref:struct:__anon109c247d0108
atomic_t	arch/xtensa/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	t	typeref:struct:__anon7deea2ca0108
atr	arch/powerpc/include/asm/immap_512x.h	/^	u32 atr;		\/* Arbiter Timers Register *\/$/;"	m	struct:arbiter512x	typeref:typename:u32
atr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 atr;		\/* Arbiter Timers Register *\/$/;"	m	struct:arbiter83xx	typeref:typename:u32
atr	scripts/kconfig/lxdialog/dialog.h	/^	chtype atr;	\/* Color attribute *\/$/;"	m	struct:dialog_color	typeref:typename:chtype
ats_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ats_cfg;		\/* 0x80 ats clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ats_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ats_cfg;		\/* 0x80 ats clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
attach	include/video_bridge.h	/^	int (*attach)(struct udevice *dev);$/;"	m	struct:video_bridge_ops	typeref:typename:int (*)(struct udevice * dev)
attempt_to_open_file	test/py/u_boot_utils.py	/^def attempt_to_open_file(fn):$/;"	f
attempted	cmd/pxe.c	/^	int attempted;$/;"	m	struct:pxe_label	typeref:typename:int	file:
attention_done	common/usb_storage.c	/^	unsigned char	attention_done;		\/* force attn on first cmd *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
attr	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 attr;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
attr	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 attr;$/;"	m	struct:de_vi::__anon5efd7b530208	typeref:typename:u32
attr	arch/arm/include/asm/arch-sunxi/display2.h	/^	} attr[4];$/;"	m	struct:de_bld	typeref:struct:de_bld::__anon5efd7b530108[4]
attr	arch/arm/include/asm/arch/display2.h	/^		u32 attr;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
attr	arch/arm/include/asm/arch/display2.h	/^		u32 attr;$/;"	m	struct:de_vi::__anon279c75ef0208	typeref:typename:u32
attr	arch/arm/include/asm/arch/display2.h	/^	} attr[4];$/;"	m	struct:de_bld	typeref:struct:de_bld::__anon279c75ef0108[4]
attr	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u8 attr;$/;"	m	struct:mbus_win	typeref:typename:u8
attr	arch/m68k/include/asm/coldfire/edma.h	/^	u16 attr;		\/* 0x04 Transfer Attributes *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u16
attr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	attr;		\/* Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
attr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    attr;           \/* 0x24BF8 - DMA Attribute register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
attr	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			attr;$/;"	m	struct:ffs_file_header	typeref:typename:u8
attr	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			attr;$/;"	m	struct:ffs_file_header2	typeref:typename:u8
attr	arch/x86/include/asm/fsp/fsp_fv.h	/^	u32			attr;$/;"	m	struct:fv_header	typeref:typename:u32
attr	arch/x86/include/asm/fsp/fsp_hob.h	/^	u32			attr;$/;"	m	struct:hob_res_desc	typeref:typename:u32
attr	include/fat.h	/^	__u8	attr;		\/* Attribute bits *\/$/;"	m	struct:dir_entry	typeref:typename:__u8
attr	include/fat.h	/^	__u8	attr;		\/* Attribute byte *\/$/;"	m	struct:dir_slot	typeref:typename:__u8
attr	include/tsec.h	/^	u32	attr; \/* Default Attribute Register *\/$/;"	m	struct:tsec	typeref:typename:u32
attr_clear	scripts/kconfig/lxdialog/util.c	/^void attr_clear(WINDOW * win, int height, int width, chtype attr)$/;"	f	typeref:typename:void
attr_info	cmd/efi.c	/^static struct attr_info {$/;"	s	file:
attr_vol_alignment	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_alignment =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_corrupted	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_corrupted =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_data_bytes	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_data_bytes =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_name	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_name =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_reserved_ebs	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_reserved_ebs =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_type	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_type =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_upd_marker	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_upd_marker =$/;"	v	typeref:struct:device_attribute	file:
attr_vol_usable_eb_size	drivers/mtd/ubi/vmt.c	/^static struct device_attribute attr_vol_usable_eb_size =$/;"	v	typeref:struct:device_attribute	file:
attreli	arch/powerpc/include/asm/immap_85xx.h	/^	u32	attreli;	\/* Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
attreli	arch/powerpc/include/asm/immap_86xx.h	/^	uint    attreli;        \/* 0x24BFC - DMA Attribute extract length and index register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
attreli	include/tsec.h	/^	u32	attreli; \/* Default Attribute Extract Length and Index *\/$/;"	m	struct:tsec	typeref:typename:u32
attrib	arch/x86/include/asm/sfi.h	/^	u64	attrib;$/;"	m	struct:sfi_mem_entry	typeref:typename:u64
attrib	drivers/ddr/marvell/a38x/xor.h	/^	u8 attrib;		\/* chip select attributes *\/$/;"	m	struct:unit_win_info	typeref:typename:u8
attrib	drivers/net/mvgbe.h	/^	u16 attrib;		\/* BAR attrib. See above macros *\/$/;"	m	struct:mvgbe_winparam	typeref:typename:u16
attrib	include/linux/mtd/fsmc_nand.h	/^	u32 attrib;			\/* 0x4c *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
attribute	drivers/block/fsl_sata.h	/^	__le32 attribute;	\/* the attribute of command *\/$/;"	m	struct:cmd_hdr_entry	typeref:typename:__le32
attribute	include/efi.h	/^	u64 attribute;$/;"	m	struct:efi_mem_desc	typeref:typename:u64
attribute	include/efi_api.h	/^	s32 attribute;$/;"	m	struct:simple_text_output_mode	typeref:typename:s32
attributes	cmd/armflash.c	/^	u32 attributes;$/;"	m	struct:afs_image	typeref:typename:u32	file:
attributes	common/env_attr.c	/^	char *attributes;$/;"	m	struct:regex_callback_priv	typeref:typename:char *	file:
attributes	include/efi.h	/^	u32 attributes;$/;"	m	struct:efi_open_protocol_info_entry	typeref:typename:u32
attributes	include/part_efi.h	/^	gpt_entry_attributes attributes;$/;"	m	struct:_gpt_entry	typeref:typename:gpt_entry_attributes
attributes	scripts/kconfig/nconf.gui.c	/^attributes_t attributes[ATTR_MAX+1] = {0};$/;"	v	typeref:typename:attributes_t[]
attributes_t	scripts/kconfig/nconf.h	/^} attributes_t;$/;"	t	typeref:enum:__anon6c8863760103
attrs	arch/arm/include/asm/armv8/mmu.h	/^	u64 attrs;$/;"	m	struct:mm_region	typeref:typename:u64
au	include/mmc.h	/^	unsigned int au;		\/* In sectors *\/$/;"	m	struct:sd_ssr	typeref:typename:unsigned int
au1x00_enet_initialize	arch/mips/mach-au1x00/au1x00_eth.c	/^int au1x00_enet_initialize(bd_t *bis){$/;"	f	typeref:typename:int
au1x00_halt	arch/mips/mach-au1x00/au1x00_eth.c	/^static void au1x00_halt(struct eth_device* dev){$/;"	f	typeref:typename:void	file:
au1x00_init	arch/mips/mach-au1x00/au1x00_eth.c	/^static int au1x00_init(struct eth_device* dev, bd_t * bd){$/;"	f	typeref:typename:int	file:
au1x00_miiphy_read	arch/mips/mach-au1x00/au1x00_eth.c	/^int au1x00_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int
au1x00_miiphy_write	arch/mips/mach-au1x00/au1x00_eth.c	/^int au1x00_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int
au1x00_recv	arch/mips/mach-au1x00/au1x00_eth.c	/^static int au1x00_recv(struct eth_device* dev){$/;"	f	typeref:typename:int	file:
au1x00_send	arch/mips/mach-au1x00/au1x00_eth.c	/^static int au1x00_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
au1x00_serial_drv	arch/mips/mach-au1x00/au1x00_serial.c	/^static struct serial_device au1x00_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
au1x00_serial_getc	arch/mips/mach-au1x00/au1x00_serial.c	/^static int au1x00_serial_getc(void)$/;"	f	typeref:typename:int	file:
au1x00_serial_init	arch/mips/mach-au1x00/au1x00_serial.c	/^static int au1x00_serial_init(void)$/;"	f	typeref:typename:int	file:
au1x00_serial_initialize	arch/mips/mach-au1x00/au1x00_serial.c	/^void au1x00_serial_initialize(void)$/;"	f	typeref:typename:void
au1x00_serial_putc	arch/mips/mach-au1x00/au1x00_serial.c	/^static void au1x00_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
au1x00_serial_setbrg	arch/mips/mach-au1x00/au1x00_serial.c	/^static void au1x00_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
au1x00_serial_tstc	arch/mips/mach-au1x00/au1x00_serial.c	/^static int au1x00_serial_tstc(void)$/;"	f	typeref:typename:int	file:
au_ffs	arch/mips/mach-au1x00/include/mach/au1x00.h	/^static __inline__ int au_ffs(int x)$/;"	f	typeref:typename:int
au_ffz	arch/mips/mach-au1x00/include/mach/au1x00.h	/^static __inline__ int au_ffz(unsigned int x)$/;"	f	typeref:typename:int
au_readb	arch/mips/mach-au1x00/include/mach/au1x00.h	/^static inline u8 au_readb(unsigned long port)$/;"	f	typeref:typename:u8
au_readl	arch/mips/mach-au1x00/include/mach/au1x00.h	/^static inline u32 au_readl(unsigned long port)$/;"	f	typeref:typename:u32
au_readw	arch/mips/mach-au1x00/include/mach/au1x00.h	/^static inline u16 au_readw(unsigned long port)$/;"	f	typeref:typename:u16
au_sync	arch/mips/mach-au1x00/include/mach/au1x00.h	/^void static inline au_sync(void)$/;"	f	typeref:typename:void
au_sync_udelay	arch/mips/mach-au1x00/include/mach/au1x00.h	/^void static inline au_sync_udelay(int us)$/;"	f	typeref:typename:void
au_writeb	arch/mips/mach-au1x00/include/mach/au1x00.h	/^void static inline au_writeb(u8 val, int reg)$/;"	f	typeref:typename:void
au_writel	arch/mips/mach-au1x00/include/mach/au1x00.h	/^void static inline au_writel(u32 val, int reg)$/;"	f	typeref:typename:void
au_writew	arch/mips/mach-au1x00/include/mach/au1x00.h	/^void static inline au_writew(u16 val, int reg)$/;"	f	typeref:typename:void
aud_conf0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_conf0;			\/* 0x3100 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_conf0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_conf0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_conf0_hbr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_conf0_hbr;		\/* 0x3400 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_conf1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_conf1;			\/* 0x3101 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_conf1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_conf1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_conf2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_conf2;			\/* 0x3103 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_conf2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_conf2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_cts1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_cts1;			\/* 0x3203 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_cts1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_cts1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_cts2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_cts2;			\/* 0x3204 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_cts2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_cts2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_cts3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_cts3;			\/* 0x3205 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_cts3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_cts3;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_hbr_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_hbr_int;			\/* 0x3402 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_hbr_mask	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_hbr_mask;		\/* 0x3404 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_hbr_pol	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_hbr_pol;			\/* 0x3403 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_hbr_status	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_hbr_status;		\/* 0x3401 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_inputclkfs	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_inputclkfs;		\/* 0x3206 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_inputclkfs	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_inputclkfs;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_int;			\/* 0x3102 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_int	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_int;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_int1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_int1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_n1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_n1;			\/* 0x3200 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_n1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_n1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_n2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_n2;			\/* 0x3201 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_n2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_n2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_n3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_n3;			\/* 0x3202 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
aud_n3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 aud_n3;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
aud_spdifint	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 aud_spdifint;		\/* 0x3302 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
audio_active	arch/sandbox/cpu/sdl.c	/^	bool audio_active;$/;"	m	struct:sdl_info	typeref:typename:bool	file:
audio_codec_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 audio_codec_clk_cfg;	\/* 0x140 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
audio_codec_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 audio_codec_clk_cfg;	\/* 0x140 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
audio_data	arch/sandbox/cpu/sdl.c	/^	uint8_t *audio_data;$/;"	m	struct:sdl_info	typeref:typename:uint8_t *	file:
audio_endian	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	audio_endian;$/;"	m	struct:exynos4_sysreg	typeref:typename:unsigned int
audio_margin	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	audio_margin;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
audio_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t audio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
audio_pll_clk	include/i2s.h	/^	unsigned int audio_pll_clk;	\/* Audio pll frequency in Hz *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
audio_pll_frac	arch/arm/dts/sama5d2.dtsi	/^				audio_pll_frac: audiopll_fracck {$/;"	l	label:pmc
audio_pll_pad	arch/arm/dts/sama5d2.dtsi	/^				audio_pll_pad: audiopll_padck {$/;"	l	label:pmc
audio_pll_pmc	arch/arm/dts/sama5d2.dtsi	/^				audio_pll_pmc: audiopll_pmcck {$/;"	l	label:pmc
audio_pos	arch/sandbox/cpu/sdl.c	/^	uint audio_pos;$/;"	m	struct:sdl_info	typeref:typename:uint	file:
audio_sample_count	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 audio_sample_count;		\/* 0x310 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
audio_sample_count	arch/arm/include/asm/arch/display.h	/^	u32 audio_sample_count;		\/* 0x310 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
audio_size	arch/sandbox/cpu/sdl.c	/^	uint audio_size;$/;"	m	struct:sdl_info	typeref:typename:uint	file:
audio_tx_fifo	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 audio_tx_fifo;		\/* 0x400 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
audio_tx_fifo	arch/arm/include/asm/arch/display.h	/^	u32 audio_tx_fifo;		\/* 0x400 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
audiopll_ctrl	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_ctrl;	\/* offset 0x4A0 *\/$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_div2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_div2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_div3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_div3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_div4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_div4;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_div5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_div5;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_freq2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_freq2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_freq3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_freq3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_freq4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_freq4;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_freq5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_freq5;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audiopll_pwd	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int audiopll_pwd;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
audmux	arch/arm/dts/imx6qdl.dtsi	/^			audmux: audmux@021d8000 {$/;"	l
authenticate_image	arch/arm/imx-common/hab.c	/^uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)$/;"	f	typeref:typename:uint32_t
authenticate_module	arch/x86/include/asm/me_common.h	/^	u16 authenticate_module:1;$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
auto_age	include/vsc9953.h	/^	u32	auto_age;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
auto_bank_intlv	drivers/ddr/fsl/options.c	/^static inline unsigned int auto_bank_intlv(dimm_params_t *pdimm)$/;"	f	typeref:typename:unsigned int	file:
auto_cal_config	drivers/net/dwc_eth_qos.c	/^	uint32_t auto_cal_config;			\/* 0x8804 *\/$/;"	m	struct:eqos_tegra186_regs	typeref:typename:uint32_t	file:
auto_cal_status	drivers/net/dwc_eth_qos.c	/^	uint32_t auto_cal_status;			\/* 0x880c *\/$/;"	m	struct:eqos_tegra186_regs	typeref:typename:uint32_t	file:
auto_cfg_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 auto_cfg_reg;	\/* 0x0 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
auto_detect_debounce	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 auto_detect_debounce;	\/* 0x03c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_debounce	arch/arm/include/asm/arch/display.h	/^	u32 auto_detect_debounce;	\/* 0x03c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_dram_size	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static void auto_detect_dram_size(struct dram_para *para)$/;"	f	typeref:typename:void	file:
auto_detect_dram_size	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void auto_detect_dram_size(struct dram_para *para)$/;"	f	typeref:typename:void	file:
auto_detect_en	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 auto_detect_en;		\/* 0x030 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_en	arch/arm/include/asm/arch/display.h	/^	u32 auto_detect_en;		\/* 0x030 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_int_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 auto_detect_int_status;	\/* 0x034 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_int_status	arch/arm/include/asm/arch/display.h	/^	u32 auto_detect_int_status;	\/* 0x034 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 auto_detect_status;		\/* 0x038 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_detect_status	arch/arm/include/asm/arch/display.h	/^	u32 auto_detect_status;		\/* 0x038 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
auto_flush	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			auto_flush;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
auto_gate	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 auto_gate;			\/* 0x008 auto gating *\/$/;"	m	struct:sunxi_dma	typeref:typename:u32
auto_gate	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 auto_gate;			\/* 0x008 auto gating *\/$/;"	m	struct:sunxi_dma	typeref:typename:u32
auto_its	tools/imagetool.h	/^	bool auto_its;		\/* Automatically create the .its file *\/$/;"	m	struct:image_tool_params	typeref:typename:bool
auto_name	include/jffs2/load_kernel.h	/^	u8 auto_name;			\/* set to 1 for generated name *\/$/;"	m	struct:part_info	typeref:typename:u8
auto_neg	drivers/net/greth.c	/^	int auto_neg;		\/* Auto negotiate done *\/$/;"	m	struct:__anonb53b88540108	typeref:typename:int	file:
auto_negotiate	drivers/net/davinci_emac.h	/^	int	(*auto_negotiate)(int phy_addr);$/;"	m	struct:__anon759824920408	typeref:typename:int (*)(int phy_addr)
auto_park_seconds	disk/part_amiga.h	/^    u32 auto_park_seconds;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
auto_precharge	include/fsl_ddr_sdram.h	/^		unsigned int auto_precharge;$/;"	m	struct:memctl_options_s::cs_local_opts_s	typeref:typename:unsigned int
auto_self_refresh_en	include/fsl_ddr_sdram.h	/^	unsigned int auto_self_refresh_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
auto_set_timing_para	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static void auto_set_timing_para(struct dram_para *para)$/;"	f	typeref:typename:void	file:
auto_set_timing_para	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void auto_set_timing_para(struct dram_para *para)$/;"	f	typeref:typename:void	file:
auto_tune_stage	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^enum auto_tune_stage {$/;"	g
auto_unicode	fs/yaffs2/yaffs_guts.h	/^	int auto_unicode;$/;"	m	struct:yaffs_param	typeref:typename:int
auto_vertical_cnt	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			auto_vertical_cnt;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
autoboot_command	common/autoboot.c	/^void autoboot_command(const char *s)$/;"	f	typeref:typename:void
autoboot_command	include/autoboot.h	/^static inline void autoboot_command(const char *s)$/;"	f	typeref:typename:void
autoc12err	drivers/mmc/fsl_esdhc.c	/^	uint    autoc12err;	\/* Auto CMD error status register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
autocal	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	struct ddrautocal	 autocal;$/;"	m	struct:autocal_clks	typeref:struct:ddrautocal	file:
autocal_clks	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^struct autocal_clks {$/;"	s	file:
autocal_regs	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^struct autocal_regs {$/;"	s	file:
autocalcfg	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	autocalcfg;	\/* _AUTO_CAL_CONFIG_0,       1E4h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
autocalintval	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	autocalintval;	\/* _AUTO_CAL_INTERVAL_0,     1E8h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
autocalsts	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	autocalsts;	\/* _AUTO_CAL_STATUS_0,       1ECh *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
autoclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 autoclk_ctrl;	\/* Autoclock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
autoconf_is_old	Makefile	/^autoconf_is_old := $(shell find . -path .\/$(KCONFIG_CONFIG) -newer \\$/;"	m
automatic_wdt_reset_disable	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	automatic_wdt_reset_disable;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
automatic_wdt_reset_disable	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	automatic_wdt_reset_disable;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
autoneg	drivers/net/e1000.h	/^	uint8_t autoneg;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t
autoneg	drivers/qe/uec_phy.h	/^	int autoneg;$/;"	m	struct:uec_mii_info	typeref:typename:int
autoneg	include/linux/ethtool.h	/^	__u32	autoneg;$/;"	m	struct:ethtool_pauseparam	typeref:typename:__u32
autoneg	include/linux/ethtool.h	/^	__u8	autoneg;	\/* Enable or disable autonegotiation *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
autoneg	include/phy.h	/^	int autoneg;$/;"	m	struct:phy_device	typeref:typename:int
autoneg_advertised	drivers/net/e1000.h	/^	uint16_t autoneg_advertised;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
autoneg_failed	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		autoneg_failed;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
autoneg_failed	drivers/net/e1000.h	/^	uint32_t autoneg_failed;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
autooob	include/linux/mtd/onenand.h	/^	struct nand_oobinfo *autooob;$/;"	m	struct:onenand_chip	typeref:struct:nand_oobinfo *
autoreq	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	autoreq;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
autoreq	drivers/usb/musb/am35x.h	/^	u32	autoreq;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
autoresize	drivers/mtd/ubi/build.c	/^static int autoresize(struct ubi_device *ubi, int vol_id)$/;"	f	typeref:typename:int	file:
autoresize_vol_id	drivers/mtd/ubi/ubi.h	/^	int autoresize_vol_id;$/;"	m	struct:ubi_device	typeref:typename:int
autosave_regs	arch/arm/lib/interrupts_m.c	/^struct autosave_regs {$/;"	s	file:
aux	board/freescale/common/ngpixis.h	/^	u8 aux;$/;"	m	struct:ngpixis	typeref:typename:u8
aux	board/freescale/common/pixis.h	/^	u8 aux;$/;"	m	struct:pixis	typeref:typename:u8
aux	board/freescale/common/qixis.h	/^	u8 aux;         \/* Auxiliary Register,0x06 *\/$/;"	m	struct:qixis	typeref:typename:u8
aux1	board/freescale/common/pixis.h	/^	u8 aux1;$/;"	m	struct:pixis	typeref:typename:u8
aux2	board/freescale/common/pixis.h	/^	u8 aux2;$/;"	m	struct:pixis	typeref:typename:u8
aux2	board/freescale/common/qixis.h	/^	u8 aux2[4];	\/* Auxiliary Registers,0xE0 *\/$/;"	m	struct:qixis	typeref:typename:u8[4]
aux_ad	board/freescale/common/qixis.h	/^	u8 aux_ad;$/;"	m	struct:qixis	typeref:typename:u8
aux_addr_15_8	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_addr_15_8;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_addr_15_8	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_addr_15_8;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_addr_19_16	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_addr_19_16;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_addr_19_16	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_addr_19_16;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_addr_7_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_addr_7_0;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_addr_7_0	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_addr_7_0;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_ch_ctl1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_ch_ctl1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_ch_ctl2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_ch_ctl2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_ch_ctl_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_ch_ctl_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_ch_ctl_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_ch_ctl_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_ch_defer_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_ch_defer_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_ch_defer_dtl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_ch_defer_dtl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_ch_sta	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_ch_sta;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_ch_sta	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_ch_sta;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_da	board/freescale/common/qixis.h	/^	u8 aux_da;$/;"	m	struct:qixis	typeref:typename:u8
aux_div_clk_config	board/freescale/s32v234evb/clock.c	/^static void aux_div_clk_config(uintptr_t cgm_addr, u8 ac, u8 dc, u32 divider)$/;"	f	typeref:typename:void	file:
aux_err_num	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_err_num;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_err_num	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_err_num;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_free_irq	include/ps2mult.h	/^#define aux_free_irq(/;"	d
aux_hw_retry_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_hw_retry_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_rd_interval	drivers/video/tegra124/sor.h	/^	u8	aux_rd_interval;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u8
aux_request_irq	include/ps2mult.h	/^#define aux_request_irq(/;"	d
aux_rx_comm	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	aux_rx_comm;$/;"	m	struct:rk3288_edp	typeref:typename:u32
aux_rx_comm	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	aux_rx_comm;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
aux_source_clk_config	board/freescale/s32v234evb/clock.c	/^static void aux_source_clk_config(uintptr_t cgm_addr, u8 ac, u32 source)$/;"	f	typeref:typename:void	file:
auxclk0	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclk0;            \/* 0x0310 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclk1	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclk1;            \/* 0x0314 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclk2	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclk2;            \/* 0x0318 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclk3	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclk3;            \/* 0x031c *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclk4	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclk4;            \/* 0x0320 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclk5	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclk5;            \/* 0x0324 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclkreq0	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclkreq0;         \/* 0x0210 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclkreq1	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclkreq1;         \/* 0x0214 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclkreq2	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclkreq2;         \/* 0x0218 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclkreq3	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclkreq3;         \/* 0x021c *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclkreq4	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclkreq4;         \/* 0x0220 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
auxclkreq5	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 auxclkreq5;         \/* 0x0224 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
av_	common/dlmalloc.c	/^static mbinptr av_[NAV * 2 + 2] = {$/;"	v	typeref:typename:mbinptr[]	file:
avail	arch/sparc/cpu/leon2/prom.c	/^	struct linux_mlist_v0 avail;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0	file:
avail	arch/sparc/cpu/leon3/prom.c	/^	struct linux_mlist_v0 avail;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0	file:
avail	fs/ubifs/ubifs.h	/^	int avail;$/;"	m	struct:ubifs_wbuf	typeref:typename:int
avail_in	include/bzlib.h	/^      unsigned int avail_in;$/;"	m	struct:__anond8626de10108	typeref:typename:unsigned int
avail_in	include/u-boot/zlib.h	/^	uInt	avail_in; \/* number of bytes available at next_in *\/$/;"	m	struct:z_stream_s	typeref:typename:uInt
avail_in_expect	lib/bzip2/bzlib_private.h	/^      UInt32   avail_in_expect;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32
avail_orphs	fs/ubifs/orphan.c	/^static int avail_orphs(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
avail_out	include/bzlib.h	/^      unsigned int avail_out;$/;"	m	struct:__anond8626de10108	typeref:typename:unsigned int
avail_out	include/u-boot/zlib.h	/^	uInt	avail_out; \/* remaining free space at next_out *\/$/;"	m	struct:z_stream_s	typeref:typename:uInt
avail_p	arch/sparc/cpu/leon2/prom.c	/^	struct linux_mlist_v0 *avail_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0 *	file:
avail_p	arch/sparc/cpu/leon3/prom.c	/^	struct linux_mlist_v0 *avail_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0 *	file:
avail_pebs	drivers/mtd/ubi/ubi.h	/^	int avail_pebs;$/;"	m	struct:ubi_device	typeref:typename:int
available	arch/x86/include/asm/arch-ivybridge/me.h	/^	u8 available;$/;"	m	struct:mbp_fw_caps	typeref:typename:u8
available	arch/x86/include/asm/arch-ivybridge/me.h	/^	u8 available;$/;"	m	struct:mbp_plat_type	typeref:typename:u8
available	include/linux/ethtool.h	/^	__u32	available;$/;"	m	struct:ethtool_get_features_block	typeref:typename:__u32
available	tools/moveconfig.py	/^    def available(self):$/;"	m	class:Slots
avcc	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^			avcc: ldo2 {$/;"	l	label:axp209
avdd_1v05_run	arch/arm/dts/tegra124-cei-tk1-som.dts	/^				avdd_1v05_run: ldo0 {$/;"	l	label:pmic
avdd_1v05_run	arch/arm/dts/tegra124-jetson-tk1.dts	/^				avdd_1v05_run: ldo0 {$/;"	l	label:pmic
avdd_1v8_disp_en	arch/arm/dts/rk3288-jerry.dts	/^		avdd_1v8_disp_en: avdd-1v8-disp-en {$/;"	l
avi_info_frame	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 avi_info_frame[0x14];	\/* 0x080 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x14]
avi_info_frame	arch/arm/include/asm/arch/display.h	/^	u8 avi_info_frame[0x14];	\/* 0x080 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x14]
avid_start_stop_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 avid_start_stop_x;			\/* 0x90 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
avid_start_stop_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 avid_start_stop_y;			\/* 0x94 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
avl	arch/x86/lib/physmem.c	/^	uint64_t avl:3;    \/* available to software *\/$/;"	m	struct:pde	typeref:typename:uint64_t:3	file:
avl	arch/x86/lib/physmem.c	/^	uint64_t avl:3;$/;"	m	struct:pdpe	typeref:typename:uint64_t:3	file:
avoid_odt_overlap	drivers/ddr/fsl/ctrl_regs.c	/^static inline int avoid_odt_overlap(const dimm_params_t *dimm_params)$/;"	f	typeref:typename:int	file:
avp_ppcs_rd_coh_status	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 avp_ppcs_rd_coh_status;	\/* _AVP_PPCS_RD_COH_STATUS_0,	ech *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
avp_ppcs_rd_coh_status	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 avp_ppcs_rd_coh_status;	\/* _AVP_PPCS_RD_COH_STATUS_0,	ech *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
avpc_mccif_fifoctrl	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 avpc_mccif_fifoctrl;	\/* _AVPC_MCCIF_FIFOCTRL_0,	120h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
avpc_mccif_fifoctrl	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 avpc_mccif_fifoctrl;	\/* _AVPC_MCCIF_FIFOCTRL_0,	120h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
avr	arch/m68k/include/asm/immap_5307.h	/^	u8  avr;$/;"	m	struct:intctrl	typeref:typename:u8
avr32_cpuinfo	arch/avr32/include/asm/processor.h	/^struct avr32_cpuinfo {$/;"	s
avs	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_avs avs;$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_avs
avs	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_avs avs;$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_avs
avs_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 avs_clk_cfg;	\/* 0x144 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 avs_clk_cfg;	\/* 0x144 AVS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 avs_clk_cfg;	\/* 0x144 AVS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 avs_clk_cfg;	\/* 0x4d4 AVS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 avs_clk_cfg;	\/* 0x144 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 avs_clk_cfg;	\/* 0x144 AVS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 avs_clk_cfg;	\/* 0x144 AVS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
avs_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 avs_clk_cfg;	\/* 0x4d4 AVS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
aw0	drivers/video/ipu_regs.h	/^	u32 aw0;$/;"	m	struct:ipu_di	typeref:typename:u32
aw1	drivers/video/ipu_regs.h	/^	u32 aw1;$/;"	m	struct:ipu_di	typeref:typename:u32
await_bits_clear	arch/arm/mach-sunxi/dram_sun4i.c	/^static inline void await_bits_clear(u32 *reg, u32 mask)$/;"	f	typeref:typename:void	file:
await_bits_set	arch/arm/mach-sunxi/dram_sun4i.c	/^static inline void await_bits_set(u32 *reg, u32 mask)$/;"	f	typeref:typename:void	file:
await_completion	drivers/video/sunxi_display.c	/^static int await_completion(u32 *reg, u32 mask, u32 val)$/;"	f	typeref:typename:int	file:
awccr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	awccr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ax	drivers/bios_emulator/include/biosemu.h	/^	u16 ax, ax_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
ax	drivers/bios_emulator/include/biosemu.h	/^	u16 ax_hi, ax;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
ax88179_eth_before_probe	drivers/usb/eth/asix88179.c	/^void ax88179_eth_before_probe(void)$/;"	f	typeref:typename:void
ax88179_eth_get_info	drivers/usb/eth/asix88179.c	/^int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss,$/;"	f	typeref:typename:int
ax88179_eth_id_table	drivers/usb/eth/asix88179.c	/^static const struct usb_device_id ax88179_eth_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
ax88179_eth_ops	drivers/usb/eth/asix88179.c	/^static const struct eth_ops ax88179_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
ax88179_eth_probe	drivers/usb/eth/asix88179.c	/^int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum,$/;"	f	typeref:typename:int
ax88179_eth_probe	drivers/usb/eth/asix88179.c	/^static int ax88179_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ax88179_eth_recv	drivers/usb/eth/asix88179.c	/^int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
ax88179_eth_send	drivers/usb/eth/asix88179.c	/^int ax88179_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
ax88179_eth_start	drivers/usb/eth/asix88179.c	/^static int ax88179_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ax88179_eth_stop	drivers/usb/eth/asix88179.c	/^void ax88179_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void
ax88179_free_pkt	drivers/usb/eth/asix88179.c	/^static int ax88179_free_pkt(struct udevice *dev, uchar *packet, int packet_len)$/;"	f	typeref:typename:int	file:
ax88179_write_hwaddr	drivers/usb/eth/asix88179.c	/^int ax88179_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
ax88180_halt	drivers/net/ax88180.c	/^static void ax88180_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ax88180_init	drivers/net/ax88180.c	/^static int ax88180_init (struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int	file:
ax88180_initialize	drivers/net/ax88180.c	/^int ax88180_initialize (bd_t * bis)$/;"	f	typeref:typename:int
ax88180_link_state	drivers/net/ax88180.h	/^} ax88180_link_state;$/;"	t	typeref:enum:_ax88180_link_state
ax88180_mac_reset	drivers/net/ax88180.c	/^static void ax88180_mac_reset (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ax88180_mdio_check_complete	drivers/net/ax88180.c	/^static int ax88180_mdio_check_complete (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ax88180_mdio_read	drivers/net/ax88180.c	/^ax88180_mdio_read (struct eth_device *dev, unsigned long regaddr)$/;"	f	typeref:typename:unsigned short	file:
ax88180_mdio_write	drivers/net/ax88180.c	/^ax88180_mdio_write (struct eth_device *dev, unsigned long regaddr,$/;"	f	typeref:typename:void	file:
ax88180_media_config	drivers/net/ax88180.c	/^static void ax88180_media_config (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ax88180_phy_initial	drivers/net/ax88180.c	/^static int ax88180_phy_initial (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ax88180_phy_reset	drivers/net/ax88180.c	/^static int ax88180_phy_reset (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ax88180_poll_tx_complete	drivers/net/ax88180.c	/^static int ax88180_poll_tx_complete (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ax88180_private	drivers/net/ax88180.h	/^struct ax88180_private {$/;"	s
ax88180_read_mac_addr	drivers/net/ax88180.c	/^static void ax88180_read_mac_addr (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ax88180_recv	drivers/net/ax88180.c	/^static int ax88180_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ax88180_rx_handler	drivers/net/ax88180.c	/^static void ax88180_rx_handler (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ax88180_send	drivers/net/ax88180.c	/^static int ax88180_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ax88796_bitget	drivers/net/ax88796.c	/^static u8 ax88796_bitget(void)$/;"	f	typeref:typename:u8	file:
ax88796_bitset	drivers/net/ax88796.c	/^static void ax88796_bitset(u32 bit)$/;"	f	typeref:typename:void	file:
ax88796_eep_cmd	drivers/net/ax88796.c	/^static void ax88796_eep_cmd(u8 cmd)$/;"	f	typeref:typename:void	file:
ax88796_eep_getdata	drivers/net/ax88796.c	/^static u16 ax88796_eep_getdata(void)$/;"	f	typeref:typename:u16	file:
ax88796_eep_setaddr	drivers/net/ax88796.c	/^static void ax88796_eep_setaddr(u16 addr)$/;"	f	typeref:typename:void	file:
ax88796_mac_read	drivers/net/ax88796.c	/^static void ax88796_mac_read(u8 *buff)$/;"	f	typeref:typename:void	file:
ax_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 ax, ax_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
ax_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 ax_hi, ax;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
ax_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 ax_hi;$/;"	m	struct:__anon964d10140508	typeref:typename:u16
ax_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 ax_hi;$/;"	m	struct:__anon964d10140608	typeref:typename:u16
axe	arch/powerpc/include/asm/immap_512x.h	/^	axe512x_t		axe;		\/* AXE *\/$/;"	m	struct:immap	typeref:typename:axe512x_t
axe512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct axe512x {$/;"	s
axe512x_t	arch/powerpc/include/asm/immap_512x.h	/^} axe512x_t;$/;"	t	typeref:struct:axe512x
axi	arch/arm/dts/sun4i-a10.dtsi	/^		axi: axi@01c20054 {$/;"	l
axi	arch/arm/dts/sun50i-a64.dtsi	/^		axi: axi_clk@1c20050 {$/;"	l
axi	arch/arm/dts/sun5i.dtsi	/^		axi: axi@01c20054 {$/;"	l
axi	arch/arm/dts/sun6i-a31.dtsi	/^		axi: axi@01c20050 {$/;"	l
axi	arch/arm/dts/sun7i-a20.dtsi	/^		axi: axi@01c20054 {$/;"	l
axi	arch/arm/dts/sun8i-a23-a33.dtsi	/^		axi: axi_clk@01c20050 {$/;"	l
axi_bus	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	struct rk3036_service_sys *axi_bus;$/;"	m	struct:rk3036_sdram_priv	typeref:struct:rk3036_service_sys *	file:
axi_dma_init	drivers/net/xilinx_axi_emac.c	/^static void axi_dma_init(struct axidma_priv *priv)$/;"	f	typeref:typename:void	file:
axi_emac_ids	drivers/net/xilinx_axi_emac.c	/^static const struct udevice_id axi_emac_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
axi_emac_ofdata_to_platdata	drivers/net/xilinx_axi_emac.c	/^static int axi_emac_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
axi_emac_ops	drivers/net/xilinx_axi_emac.c	/^static const struct eth_ops axi_emac_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
axi_emac_probe	drivers/net/xilinx_axi_emac.c	/^static int axi_emac_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
axi_emac_remove	drivers/net/xilinx_axi_emac.c	/^static int axi_emac_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
axi_ethernet_init	drivers/net/xilinx_axi_emac.c	/^static int axi_ethernet_init(struct axidma_priv *priv)$/;"	f	typeref:typename:int	file:
axi_ethernetlite	arch/mips/dts/nexys4ddr.dts	/^	axi_ethernetlite: ethernet@10e00000 {$/;"	l
axi_freq	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 axi_freq;$/;"	m	struct:bootrom_sw_info	typeref:typename:u32
axi_gate	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 axi_gate;		\/* 0x5c axi module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
axi_gate	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 axi_gate;		\/* 0x5c axi module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
axi_gate	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 axi_gate;		\/* 0x5c axi module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
axi_gate	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 axi_gate;		\/* 0x5c axi module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
axi_gates	arch/arm/dts/sun4i-a10.dtsi	/^		axi_gates: clk@01c2005c {$/;"	l
axi_gates	arch/arm/dts/sun5i.dtsi	/^		axi_gates: clk@01c2005c {$/;"	l
axi_mode	drivers/net/calxedaxgmac.c	/^	u32 axi_mode;		\/* 0xf28 *\/$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
axi_regs	drivers/net/xilinx_axi_emac.c	/^struct axi_regs {$/;"	s	file:
axi_uart16550	arch/mips/dts/nexys4ddr.dts	/^	axi_uart16550: serial@10400000 {$/;"	l
axibus	drivers/net/designware.h	/^	u32 axibus;		\/* 0x28 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
axicc	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 axicc;	\/* AXI cache control *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
axicc	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 axicc;	\/* AXI cache control *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
axicif_fastsync0_cpuclk_to_mcclk	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync0_cpuclk_to_mcclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync0_cpuclk_to_mcclk	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync0_cpuclk_to_mcclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync0_mcclk_to_cpuclk	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync0_mcclk_to_cpuclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync0_mcclk_to_cpuclk	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync0_mcclk_to_cpuclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync1_cpuclk_to_mcclk	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync1_cpuclk_to_mcclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync1_cpuclk_to_mcclk	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync1_cpuclk_to_mcclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync1_mcclk_to_cpuclk	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync1_mcclk_to_cpuclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync1_mcclk_to_cpuclk	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync1_mcclk_to_cpuclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync2_cpuclk_to_mcclk	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync2_cpuclk_to_mcclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync2_cpuclk_to_mcclk	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync2_cpuclk_to_mcclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync2_mcclk_to_cpuclk	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync2_mcclk_to_cpuclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync2_mcclk_to_cpuclk	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync2_mcclk_to_cpuclk;$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync_ctrl	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync_ctrl;	\/* AXICIF_FASTSYNC_CTRL_0,	130h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync_ctrl	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync_ctrl;	\/* AXICIF_FASTSYNC_CTRL_0,	130h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync_statistics	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 axicif_fastsync_statistics;	\/* _AXICIF_FASTSYNC_STATISTICS_0,134h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axicif_fastsync_statistics	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 axicif_fastsync_statistics;	\/* _AXICIF_FASTSYNC_STATISTICS_0,134h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
axidma_bd	drivers/net/xilinx_axi_emac.c	/^struct axidma_bd {$/;"	s	file:
axidma_priv	drivers/net/xilinx_axi_emac.c	/^struct axidma_priv {$/;"	s	file:
axidma_reg	drivers/net/xilinx_axi_emac.c	/^struct axidma_reg {$/;"	s	file:
axiemac_free_pkt	drivers/net/xilinx_axi_emac.c	/^static int axiemac_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
axiemac_miiphy_read	drivers/net/xilinx_axi_emac.c	/^static int axiemac_miiphy_read(struct mii_dev *bus, int addr,$/;"	f	typeref:typename:int	file:
axiemac_miiphy_write	drivers/net/xilinx_axi_emac.c	/^static int axiemac_miiphy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
axiemac_phy_init	drivers/net/xilinx_axi_emac.c	/^static int axiemac_phy_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
axiemac_recv	drivers/net/xilinx_axi_emac.c	/^static int axiemac_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
axiemac_send	drivers/net/xilinx_axi_emac.c	/^static int axiemac_send(struct udevice *dev, void *ptr, int len)$/;"	f	typeref:typename:int	file:
axiemac_start	drivers/net/xilinx_axi_emac.c	/^static int axiemac_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
axiemac_stop	drivers/net/xilinx_axi_emac.c	/^static void axiemac_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
axiemac_write_hwaddr	drivers/net/xilinx_axi_emac.c	/^static int axiemac_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
axipc	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 axipc;	\/* AXI PROT control *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
axipc	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 axipc;	\/* AXI PROT control *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
axp152	arch/arm/dts/sun5i-a10s-auxtek-t003.dts	/^	axp152: pmic@30 {$/;"	l
axp152	arch/arm/dts/sun5i-a10s-auxtek-t004.dts	/^	axp152: pmic@30 {$/;"	l
axp152	arch/arm/dts/sun5i-a10s-mk802.dts	/^	axp152: pmic@30 {$/;"	l
axp152	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	axp152: pmic@30 {$/;"	l
axp152_mvolt_to_target	drivers/power/axp152.c	/^static u8 axp152_mvolt_to_target(int mvolt, int min, int max, int div)$/;"	f	typeref:typename:u8	file:
axp152_reg	include/axp152.h	/^enum axp152_reg {$/;"	g
axp209	arch/arm/dts/sun4i-a10-a1000.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-ba10-tvbox.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-cubieboard.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-gemei-g9.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-hyundai-a7hd.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-inet1.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-inet97fv2.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-inet9f-rev03.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-jesurun-q5.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-mini-xplus.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-mk802ii.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-pcduino.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-a10s-wobo-i5.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-a13-empire-electronix-d709.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-a13-hsg-h702.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-a13-inet-98v-rev2.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-a13-olinuxino.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-q8-common.dtsi	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-r8-chip.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-bananapi.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-bananapro.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-cubieboard2.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-icnova-swac.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-itead-ibox.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-m3.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-mk808c.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-orangepi.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-pcduino3-nano.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-pcduino3.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-wexler-tab7200.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts	/^	axp209: pmic@34 {$/;"	l
axp209	arch/arm/dts/sunxi-itead-core-common.dtsi	/^	axp209: pmic@34 {$/;"	l
axp209_mvolt_to_cfg	drivers/power/axp209.c	/^static u8 axp209_mvolt_to_cfg(int mvolt, int min, int max, int div)$/;"	f	typeref:typename:u8	file:
axp209_reg	include/axp209.h	/^enum axp209_reg {$/;"	g
axp221_mvolt_to_cfg	drivers/power/axp221.c	/^static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div)$/;"	f	typeref:typename:u8	file:
axp22x	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun6i-a31-m9.dts	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun6i-a31s-primo81.dts	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun6i-a31s-sina31s-core.dtsi	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun6i-reference-design-tablet.dtsi	/^	axp22x: pmic@68 {$/;"	l
axp22x	arch/arm/dts/sun8i-a33-olinuxino.dts	/^	axp22x: pmic@3a3 {$/;"	l
axp22x	arch/arm/dts/sun8i-a33-sinlinx-sina33.dts	/^	axp22x: pmic@3a3 {$/;"	l
axp22x	arch/arm/dts/sun8i-r16-parrot.dts	/^	axp22x: pmic@3a3 {$/;"	l
axp22x	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	axp22x: pmic@3a3 {$/;"	l
axp809	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^	axp809: pmic@3a3 {$/;"	l
axp809	arch/arm/dts/sun9i-a80-optimus.dts	/^	axp809: pmic@3a3 {$/;"	l
axp809_mvolt_to_cfg	drivers/power/axp809.c	/^static u8 axp809_mvolt_to_cfg(int mvolt, int min, int max, int div)$/;"	f	typeref:typename:u8	file:
axp818_mvolt_to_cfg	drivers/power/axp818.c	/^static u8 axp818_mvolt_to_cfg(int mvolt, int min, int max, int div)$/;"	f	typeref:typename:u8	file:
axp_get_gpio_ctrl_reg	drivers/gpio/axp_gpio.c	/^static u8 axp_get_gpio_ctrl_reg(unsigned pin)$/;"	f	typeref:typename:u8	file:
axp_get_sid	drivers/power/axp221.c	/^int axp_get_sid(unsigned int *sid)$/;"	f	typeref:typename:int
axp_gpio_direction_input	drivers/gpio/axp_gpio.c	/^static int axp_gpio_direction_input(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:int	file:
axp_gpio_direction_output	drivers/gpio/axp_gpio.c	/^static int axp_gpio_direction_output(struct udevice *dev, unsigned pin,$/;"	f	typeref:typename:int	file:
axp_gpio_get_value	drivers/gpio/axp_gpio.c	/^static int axp_gpio_get_value(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:int	file:
axp_gpio_init	arch/arm/include/asm/arch-sunxi/gpio.h	/^static inline int axp_gpio_init(void) { return 0; }$/;"	f	typeref:typename:int
axp_gpio_init	arch/arm/include/asm/arch/gpio.h	/^static inline int axp_gpio_init(void) { return 0; }$/;"	f	typeref:typename:int
axp_gpio_init	drivers/gpio/axp_gpio.c	/^int axp_gpio_init(void)$/;"	f	typeref:typename:int
axp_gpio_set_value	drivers/gpio/axp_gpio.c	/^static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)$/;"	f	typeref:typename:int	file:
axp_init	drivers/power/axp152.c	/^int axp_init(void)$/;"	f	typeref:typename:int
axp_init	drivers/power/axp209.c	/^int axp_init(void)$/;"	f	typeref:typename:int
axp_init	drivers/power/axp221.c	/^int axp_init(void)$/;"	f	typeref:typename:int
axp_init	drivers/power/axp809.c	/^int axp_init(void)$/;"	f	typeref:typename:int
axp_init	drivers/power/axp818.c	/^int axp_init(void)$/;"	f	typeref:typename:int
axp_set_aldo	drivers/power/axp809.c	/^int axp_set_aldo(int aldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo	drivers/power/axp818.c	/^int axp_set_aldo(int aldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo1	drivers/power/axp221.c	/^int axp_set_aldo1(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo1	drivers/power/axp809.c	/^int axp_set_aldo1(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo1	drivers/power/axp818.c	/^int axp_set_aldo1(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo2	drivers/power/axp152.c	/^int axp_set_aldo2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo2	drivers/power/axp209.c	/^int axp_set_aldo2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo2	drivers/power/axp221.c	/^int axp_set_aldo2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo2	drivers/power/axp809.c	/^int axp_set_aldo2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo2	drivers/power/axp818.c	/^int axp_set_aldo2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo3	drivers/power/axp209.c	/^int axp_set_aldo3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo3	drivers/power/axp221.c	/^int axp_set_aldo3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo3	drivers/power/axp809.c	/^int axp_set_aldo3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo3	drivers/power/axp818.c	/^int axp_set_aldo3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_aldo4	drivers/power/axp209.c	/^int axp_set_aldo4(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc1	drivers/power/axp221.c	/^int axp_set_dcdc1(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc1	drivers/power/axp809.c	/^int axp_set_dcdc1(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc1	drivers/power/axp818.c	/^int axp_set_dcdc1(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc2	drivers/power/axp152.c	/^int axp_set_dcdc2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc2	drivers/power/axp209.c	/^int axp_set_dcdc2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc2	drivers/power/axp221.c	/^int axp_set_dcdc2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc2	drivers/power/axp809.c	/^int axp_set_dcdc2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc2	drivers/power/axp818.c	/^int axp_set_dcdc2(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc3	drivers/power/axp152.c	/^int axp_set_dcdc3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc3	drivers/power/axp209.c	/^int axp_set_dcdc3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc3	drivers/power/axp221.c	/^int axp_set_dcdc3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc3	drivers/power/axp809.c	/^int axp_set_dcdc3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc3	drivers/power/axp818.c	/^int axp_set_dcdc3(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc4	drivers/power/axp152.c	/^int axp_set_dcdc4(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc4	drivers/power/axp221.c	/^int axp_set_dcdc4(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc4	drivers/power/axp809.c	/^int axp_set_dcdc4(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc5	drivers/power/axp221.c	/^int axp_set_dcdc5(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc5	drivers/power/axp809.c	/^int axp_set_dcdc5(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dcdc5	drivers/power/axp818.c	/^int axp_set_dcdc5(unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dldo	drivers/power/axp221.c	/^int axp_set_dldo(int dldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dldo	drivers/power/axp809.c	/^int axp_set_dldo(int dldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_dldo	drivers/power/axp818.c	/^int axp_set_dldo(int dldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_eldo	drivers/power/axp221.c	/^int axp_set_eldo(int eldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_eldo	drivers/power/axp809.c	/^int axp_set_eldo(int eldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_eldo	drivers/power/axp818.c	/^int axp_set_eldo(int eldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_fldo	drivers/power/axp818.c	/^int axp_set_fldo(int fldo_num, unsigned int mvolt)$/;"	f	typeref:typename:int
axp_set_sw	drivers/power/axp809.c	/^int axp_set_sw(bool on)$/;"	f	typeref:typename:int
axp_set_sw	drivers/power/axp818.c	/^int axp_set_sw(bool on)$/;"	f	typeref:typename:int
axs101_nand_hwcontrol	board/synopsys/axs10x/nand.c	/^static void axs101_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd,$/;"	f	typeref:typename:void	file:
axs101_nand_read_buf	board/synopsys/axs10x/nand.c	/^static void axs101_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
axs101_nand_read_byte	board/synopsys/axs10x/nand.c	/^static u_char axs101_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u_char	file:
axs101_nand_read_word	board/synopsys/axs10x/nand.c	/^static u16 axs101_nand_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:u16	file:
axs101_nand_write_buf	board/synopsys/axs10x/nand.c	/^static void axs101_nand_write_buf(struct mtd_info *mtd, const u_char *buf,$/;"	f	typeref:typename:void	file:
aync_ep	arch/m68k/include/asm/immap_5329.h	/^	u32 aync_ep;		\/* 0x158 Current Asynchronous List or Address at Endpoint List Address *\/$/;"	m	struct:usb_otg	typeref:typename:u32
azalia_config	arch/x86/cpu/baytrail/fsp_configs.c	/^const struct pch_azalia_config azalia_config = {$/;"	v	typeref:typename:const struct pch_azalia_config
azalia_config_ptr	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint32_t azalia_config_ptr;		\/* Offset 0x0030 *\/$/;"	m	struct:upd_region	typeref:typename:uint32_t
azalia_v_ci_enable	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t azalia_v_ci_enable:1;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t:1
azalia_verb_table	arch/x86/cpu/baytrail/fsp_configs.c	/^static const struct pch_azalia_verb_table azalia_verb_table[] = {$/;"	v	typeref:typename:const struct pch_azalia_verb_table[]	file:
azalia_verb_table	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	const struct pch_azalia_verb_table *azalia_verb_table;$/;"	m	struct:pch_azalia_config	typeref:typename:const struct pch_azalia_verb_table *
azalia_verb_table_num	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t azalia_verb_table_num;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t
b	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32	b;$/;"	m	struct:at91_priority	typeref:typename:u32
b	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^		__u32	b;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
b	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^		__u32	b;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
b	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^		__u32 b;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
b	drivers/crypto/fsl/rsa_caam.h	/^	uint8_t *b;		\/* Result exp. modulus in number of bytes *\/$/;"	m	struct:pk_in_params	typeref:typename:uint8_t *
b	drivers/tpm/tpm_tis.h	/^	__be32 b;$/;"	m	struct:timeout_t	typeref:typename:__be32
b	drivers/usb/host/ohci-s3c24xx.h	/^		__u32 b;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
b	drivers/usb/host/ohci.h	/^		__u32	b;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
b	examples/standalone/mem_to_mem_idma2intr.c	/^	dcmbits_t b;$/;"	m	union:dcmbitsu	typeref:typename:dcmbits_t	file:
b	examples/standalone/mem_to_mem_idma2intr.c	/^	ibdbits_t b;$/;"	m	union:ibdbitsu	typeref:typename:ibdbits_t	file:
b	include/ec_commands.h	/^	uint8_t r, g, b;$/;"	m	struct:rgb_s	typeref:typename:uint8_t
b	include/ext_common.h	/^	} b;$/;"	m	struct:ext2_inode	typeref:union:ext2_inode::__anon5bc84367010a
b	include/part_efi.h	/^	u8 b[16];$/;"	m	struct:__anon7effa4980108	typeref:typename:u8[16]
b	tools/easylogo/easylogo.c	/^	unsigned char b, g, r;$/;"	m	struct:__anonbf0fd82b0308	typeref:typename:unsigned char	file:
b	tools/easylogo/easylogo.c	/^	unsigned char r, g, b;$/;"	m	struct:__anonbf0fd82b0208	typeref:typename:unsigned char	file:
b0	arch/blackfin/include/asm/ptrace.h	/^	long b0;$/;"	m	struct:pt_regs	typeref:typename:long
b0	drivers/video/mx3fb.c	/^	u32	b0;$/;"	m	struct:pixel_fmt_cfg	typeref:typename:u32	file:
b0	include/ec_commands.h	/^	float b0;$/;"	m	struct:ec_params_tmp006_set_calibration	typeref:typename:float
b0	include/ec_commands.h	/^	float b0;$/;"	m	struct:ec_response_tmp006_get_calibration	typeref:typename:float
b1	arch/blackfin/include/asm/ptrace.h	/^	long b1;$/;"	m	struct:pt_regs	typeref:typename:long
b1	drivers/video/mx3fb.c	/^	u32	b1;$/;"	m	struct:pixel_fmt_cfg	typeref:typename:u32	file:
b1	include/ec_commands.h	/^	float b1;$/;"	m	struct:ec_params_tmp006_set_calibration	typeref:typename:float
b1	include/ec_commands.h	/^	float b1;$/;"	m	struct:ec_response_tmp006_get_calibration	typeref:typename:float
b2	arch/blackfin/include/asm/ptrace.h	/^	long b2;$/;"	m	struct:pt_regs	typeref:typename:long
b2	drivers/video/mx3fb.c	/^	u32	b2;$/;"	m	struct:pixel_fmt_cfg	typeref:typename:u32	file:
b2	include/ec_commands.h	/^	float b2;$/;"	m	struct:ec_params_tmp006_set_calibration	typeref:typename:float
b2	include/ec_commands.h	/^	float b2;$/;"	m	struct:ec_response_tmp006_get_calibration	typeref:typename:float
b2c_mult	arch/powerpc/cpu/mpc8260/speed.c	/^	int b2c_mult;$/;"	m	struct:__anon1baf12f90108	typeref:typename:int	file:
b3	arch/blackfin/include/asm/ptrace.h	/^	long b3;$/;"	m	struct:pt_regs	typeref:typename:long
bAlternateSetting	drivers/usb/host/ehci.h	/^	unsigned char	bAlternateSetting;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bAlternateSetting	include/linux/usb/ch9.h	/^	__u8  bAlternateSetting;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bAlternateSetting	include/usbdescriptors.h	/^	u8 bAlternateSetting;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bAuthKeyIndex	include/linux/usb/ch9.h	/^	__u8  bAuthKeyIndex;$/;"	m	struct:usb_encryption_descriptor	typeref:typename:__u8
bCBWFlags	include/usb_defs.h	/^	__u8		bCBWFlags;$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u8
bCBWLUN	include/usb_defs.h	/^	__u8		bCBWLUN;$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u8
bCDBLength	include/usb_defs.h	/^	__u8		bCDBLength;$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u8
bCSWStatus	include/usb_defs.h	/^	__u8		bCSWStatus;$/;"	m	struct:umass_bbb_csw	typeref:typename:__u8
bChannelIndex	include/linux/usb/cdc.h	/^	__u8	bChannelIndex;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
bChannelIndex	include/usbdescriptors.h	/^	u8 bChannelIndex;$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
bCharFormat	include/linux/usb/cdc.h	/^	__u8	bCharFormat;$/;"	m	struct:usb_cdc_line_coding	typeref:typename:__u8
bChild0	include/usbdescriptors.h	/^	u8 bChild0[0];$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8[0]
bChild0	include/usbdescriptors.h	/^	u8 bChild0[0];$/;"	m	struct:usb_class_protocol_unit_function_descriptor	typeref:typename:u8[0]
bChild0	include/usbdescriptors.h	/^	u8 bChild0[0];$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8[0]
bConfigurationValue	drivers/usb/host/ehci.h	/^	unsigned char	bConfigurationValue;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
bConfigurationValue	include/linux/usb/ch9.h	/^	__u8  bConfigurationValue;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
bConfigurationValue	include/linux/usb/composite.h	/^	u8			bConfigurationValue;$/;"	m	struct:usb_configuration	typeref:typename:u8
bConfigurationValue	include/usbdescriptors.h	/^	u8 bConfigurationValue;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
bCountryCode	include/linux/usb/ch9.h	/^	u8 bCountryCode;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bCountryCode	include/usbdescriptors.h	/^    u8	      bCountryCode;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bData	include/linux/usb/ch9.h	/^	u8 bData[0];$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u8[0]
bData	include/usbdescriptors.h	/^    u8		bData[0];$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u8[0]
bDataBits	include/linux/usb/cdc.h	/^	__u8	bDataBits;$/;"	m	struct:usb_cdc_line_coding	typeref:typename:__u8
bDataInterface	include/linux/usb/cdc.h	/^	__u8	bDataInterface;$/;"	m	struct:usb_cdc_call_mgmt_descriptor	typeref:typename:__u8
bDataInterface	include/usbdescriptors.h	/^	u8 bDataInterface;$/;"	m	struct:usb_class_call_management_descriptor	typeref:typename:u8
bDebugInEndpoint	include/linux/usb/ch9.h	/^	__u8  bDebugInEndpoint;$/;"	m	struct:usb_debug_descriptor	typeref:typename:__u8
bDebugOutEndpoint	include/linux/usb/ch9.h	/^	__u8  bDebugOutEndpoint;$/;"	m	struct:usb_debug_descriptor	typeref:typename:__u8
bDescriptorSubType	drivers/usb/gadget/f_thor.h	/^	__u8 bDescriptorSubType;$/;"	m	struct:usb_cdc_attribute_vendor_descriptor	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_acm_descriptor	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_call_mgmt_descriptor	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_country_functional_desc	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_header_desc	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_mdlm_desc	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_mdlm_detail_desc	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
bDescriptorSubType	include/linux/usb/cdc.h	/^	__u8	bDescriptorSubType;$/;"	m	struct:usb_cdc_union_desc	typeref:typename:__u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x00 *\/$/;"	m	struct:usb_class_header_function_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x01 *\/$/;"	m	struct:usb_class_call_management_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x02 *\/$/;"	m	struct:usb_class_abstract_control_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x03 *\/$/;"	m	struct:usb_class_direct_line_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x04 *\/$/;"	m	struct:usb_class_telephone_ringer_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x05 *\/$/;"	m	struct:usb_class_telephone_call_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x06 *\/$/;"	m	struct:usb_class_union_function_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x07 *\/$/;"	m	struct:usb_class_country_selection_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x08 *\/$/;"	m	struct:usb_class_telephone_operational_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x09 *\/$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x0a *\/$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x0b *\/$/;"	m	struct:usb_class_protocol_unit_function_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x0c *\/$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x0d *\/$/;"	m	struct:usb_class_multi_channel_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x0e *\/$/;"	m	struct:usb_class_capi_control_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x0f *\/$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x10 *\/$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x12 *\/$/;"	m	struct:usb_class_mdlm_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;	\/* 0x13 *\/$/;"	m	struct:usb_class_mdlmd_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;$/;"	m	struct:usb_class_function_descriptor	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;$/;"	m	struct:usb_class_function_descriptor_generic	typeref:typename:u8
bDescriptorSubtype	include/usbdescriptors.h	/^	u8 bDescriptorSubtype;$/;"	m	struct:usb_generic_descriptor	typeref:typename:u8
bDescriptorType	drivers/usb/gadget/f_dfu.h	/^	__u8				bDescriptorType;$/;"	m	struct:dfu_function_descriptor	typeref:typename:__u8
bDescriptorType	drivers/usb/gadget/f_thor.h	/^	__u8 bDescriptorType;$/;"	m	struct:usb_cdc_attribute_vendor_descriptor	typeref:typename:__u8
bDescriptorType	drivers/usb/host/ehci.h	/^	unsigned char	bDescriptorType;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
bDescriptorType	drivers/usb/host/ehci.h	/^	unsigned char	bDescriptorType;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_acm_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_call_mgmt_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_country_functional_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_header_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_mdlm_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_mdlm_detail_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/cdc.h	/^	__u8	bDescriptorType;$/;"	m	struct:usb_cdc_union_desc	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_bos_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_debug_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_descriptor_header	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_dev_cap_header	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_encryption_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_ext_cap_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_generic_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_key_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_otg_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_security_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_ss_container_id_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_ss_ep_comp_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_string_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	__u8  bDescriptorType;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__u8
bDescriptorType	include/linux/usb/ch9.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bDescriptorType	include/linux/usb/ch9.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u8
bDescriptorType	include/usb.h	/^	unsigned char  bDescriptorType;$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;	\/* 0x01 *\/$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;	\/* 0x03 *\/$/;"	m	struct:usb_string_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;	\/* 0x04 *\/$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;	\/* 0x2 *\/$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;	\/* 0x5 *\/$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_abstract_control_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_call_management_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_capi_control_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_country_selection_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_direct_line_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_function_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_function_descriptor_generic	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_header_function_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_mdlm_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_mdlmd_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_multi_channel_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_protocol_unit_function_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_telephone_call_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_telephone_operational_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_telephone_ringer_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_union_function_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_generic_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^	u8 bDescriptorType;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^    u8	      bDescriptorType;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bDescriptorType	include/usbdescriptors.h	/^    u8	      bDescriptorType;$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u8
bDescriptorType0	include/linux/usb/ch9.h	/^	u8 bDescriptorType0;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bDescriptorType0	include/usbdescriptors.h	/^    u8	      bDescriptorType0;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bDetailData	include/linux/usb/cdc.h	/^	__u8	bDetailData[0];$/;"	m	struct:usb_cdc_mdlm_detail_desc	typeref:typename:__u8[0]
bDetailData	include/usbdescriptors.h	/^	u8 bDetailData[0];$/;"	m	struct:usb_class_mdlmd_descriptor	typeref:typename:u8[0]
bDevCapabilityType	include/linux/usb/ch9.h	/^	__u8  bDevCapabilityType;$/;"	m	struct:usb_dev_cap_header	typeref:typename:__u8
bDevCapabilityType	include/linux/usb/ch9.h	/^	__u8  bDevCapabilityType;$/;"	m	struct:usb_ext_cap_descriptor	typeref:typename:__u8
bDevCapabilityType	include/linux/usb/ch9.h	/^	__u8  bDevCapabilityType;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__u8
bDevCapabilityType	include/linux/usb/ch9.h	/^	__u8  bDevCapabilityType;$/;"	m	struct:usb_ss_container_id_descriptor	typeref:typename:__u8
bDevCapabilityType	include/linux/usb/ch9.h	/^	__u8  bDevCapabilityType;$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bDeviceClass	include/linux/usb/ch9.h	/^	__u8  bDeviceClass;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bDeviceClass	include/linux/usb/ch9.h	/^	__u8  bDeviceClass;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bDeviceClass	include/usb.h	/^	u8 bDeviceClass;$/;"	m	struct:usb_device_id	typeref:typename:u8
bDeviceClass	include/usbdescriptors.h	/^	u8 bDeviceClass;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bDeviceClass	include/usbdescriptors.h	/^	u8 bDeviceClass;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bDeviceProtocol	include/linux/usb/ch9.h	/^	__u8  bDeviceProtocol;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bDeviceProtocol	include/linux/usb/ch9.h	/^	__u8  bDeviceProtocol;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bDeviceProtocol	include/usb.h	/^	u8 bDeviceProtocol;$/;"	m	struct:usb_device_id	typeref:typename:u8
bDeviceProtocol	include/usbdescriptors.h	/^	u8 bDeviceProtocol;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bDeviceProtocol	include/usbdescriptors.h	/^	u8 bDeviceProtocol;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bDeviceSubClass	include/linux/usb/ch9.h	/^	__u8  bDeviceSubClass;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bDeviceSubClass	include/linux/usb/ch9.h	/^	__u8  bDeviceSubClass;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bDeviceSubClass	include/usb.h	/^	u8 bDeviceSubClass;$/;"	m	struct:usb_device_id	typeref:typename:u8
bDeviceSubClass	include/usbdescriptors.h	/^	u8 bDeviceSubClass;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bDeviceSubClass	include/usbdescriptors.h	/^	u8 bDeviceSubClass;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bEncryptionType	include/linux/usb/ch9.h	/^	__u8  bEncryptionType;$/;"	m	struct:usb_encryption_descriptor	typeref:typename:__u8
bEncryptionValue	include/linux/usb/ch9.h	/^	__u8  bEncryptionValue;		\/* use in SET_ENCRYPTION *\/$/;"	m	struct:usb_encryption_descriptor	typeref:typename:__u8
bEndpointAddress	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	u8 bEndpointAddress;$/;"	m	struct:dwc2_ep	typeref:typename:u8
bEndpointAddress	drivers/usb/gadget/pxa25x_udc.h	/^	u8					bEndpointAddress;$/;"	m	struct:pxa25x_ep	typeref:typename:u8
bEndpointAddress	include/linux/usb/ch9.h	/^	__u8  bEndpointAddress;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bEndpointAddress	include/usbdescriptors.h	/^	u8 bEndpointAddress;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:u8
bEntityId	include/linux/usb/cdc.h	/^	__u8	bEntityId;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
bEntityId	include/usbdescriptors.h	/^	u8 bEntityId;$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8
bEntityId	include/usbdescriptors.h	/^	u8 bEntityId;$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
bEntityId	include/usbdescriptors.h	/^	u8 bEntityId;$/;"	m	struct:usb_class_protocol_unit_function_descriptor	typeref:typename:u8
bEntityId	include/usbdescriptors.h	/^	u8 bEntityId;$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bExtensionCode	include/usbdescriptors.h	/^	u8 bExtensionCode;$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8
bFirstInterface	include/linux/usb/ch9.h	/^	__u8  bFirstInterface;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bFunctionClass	include/linux/usb/ch9.h	/^	__u8  bFunctionClass;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_abstract_control_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_call_management_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_capi_control_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_country_selection_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_direct_line_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_function_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_function_descriptor_generic	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_header_function_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_mdlm_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_mdlmd_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_multi_channel_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_protocol_unit_function_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_telephone_call_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_telephone_operational_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_telephone_ringer_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_union_function_descriptor	typeref:typename:u8
bFunctionLength	include/usbdescriptors.h	/^	u8 bFunctionLength;$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bFunctionProtocol	include/linux/usb/ch9.h	/^	__u8  bFunctionProtocol;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bFunctionSubClass	include/linux/usb/ch9.h	/^	__u8  bFunctionSubClass;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bFunctionalitySupport	include/linux/usb/ch9.h	/^	__u8  bFunctionalitySupport;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__u8
bGUID	include/linux/usb/cdc.h	/^	__u8	bGUID[16];$/;"	m	struct:usb_cdc_mdlm_desc	typeref:typename:__u8[16]
bGUID	include/usbdescriptors.h	/^	u8 bGUID[16];$/;"	m	struct:usb_class_mdlm_descriptor	typeref:typename:u8[16]
bGuidDescriptorType	include/linux/usb/cdc.h	/^	__u8	bGuidDescriptorType;$/;"	m	struct:usb_cdc_mdlm_detail_desc	typeref:typename:__u8
bGuidDescriptorType	include/usbdescriptors.h	/^	u8 bGuidDescriptorType;$/;"	m	struct:usb_class_mdlmd_descriptor	typeref:typename:u8
bHubContrCurrent	include/usb.h	/^	unsigned char  bHubContrCurrent;$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char
bInterfaceClass	drivers/usb/host/ehci.h	/^	unsigned char	bInterfaceClass;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bInterfaceClass	include/linux/usb/ch9.h	/^	__u8  bInterfaceClass;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bInterfaceClass	include/usb.h	/^	u8 bInterfaceClass;$/;"	m	struct:usb_device_id	typeref:typename:u8
bInterfaceClass	include/usbdescriptors.h	/^	u8 bInterfaceClass;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bInterfaceCount	include/linux/usb/ch9.h	/^	__u8  bInterfaceCount;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bInterfaceNo	include/usbdescriptors.h	/^	u8 bInterfaceNo;$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bInterfaceNumber	drivers/usb/host/ehci.h	/^	unsigned char	bInterfaceNumber;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bInterfaceNumber	include/linux/usb/ch9.h	/^	__u8  bInterfaceNumber;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bInterfaceNumber	include/usb.h	/^	u8 bInterfaceNumber;$/;"	m	struct:usb_device_id	typeref:typename:u8
bInterfaceNumber	include/usbdescriptors.h	/^	u8 bInterfaceNumber;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bInterfaceProtocol	drivers/usb/host/ehci.h	/^	unsigned char	bInterfaceProtocol;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bInterfaceProtocol	include/linux/usb/ch9.h	/^	__u8  bInterfaceProtocol;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bInterfaceProtocol	include/usb.h	/^	u8 bInterfaceProtocol;$/;"	m	struct:usb_device_id	typeref:typename:u8
bInterfaceProtocol	include/usbdescriptors.h	/^	u8 bInterfaceProtocol;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bInterfaceSubClass	drivers/usb/host/ehci.h	/^	unsigned char	bInterfaceSubClass;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bInterfaceSubClass	include/linux/usb/ch9.h	/^	__u8  bInterfaceSubClass;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bInterfaceSubClass	include/usb.h	/^	u8 bInterfaceSubClass;$/;"	m	struct:usb_device_id	typeref:typename:u8
bInterfaceSubClass	include/usbdescriptors.h	/^	u8 bInterfaceSubClass;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bInterval	include/linux/usb/ch9.h	/^	__u8  bInterval;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bInterval	include/usbdescriptors.h	/^	u8 bInterval;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:u8
bKeyData	include/linux/usb/ch9.h	/^	__u8  bKeyData[0];$/;"	m	struct:usb_key_descriptor	typeref:typename:__u8[0]
bLength	drivers/usb/gadget/f_dfu.h	/^	__u8				bLength;$/;"	m	struct:dfu_function_descriptor	typeref:typename:__u8
bLength	drivers/usb/gadget/f_thor.h	/^	__u8 bLength;$/;"	m	struct:usb_cdc_attribute_vendor_descriptor	typeref:typename:__u8
bLength	drivers/usb/host/ehci.h	/^	unsigned char	bLength;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
bLength	drivers/usb/host/ehci.h	/^	unsigned char	bLength;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_acm_descriptor	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_call_mgmt_descriptor	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_country_functional_desc	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_header_desc	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_mdlm_desc	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_mdlm_detail_desc	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
bLength	include/linux/usb/cdc.h	/^	__u8	bLength;$/;"	m	struct:usb_cdc_union_desc	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_bos_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_debug_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_descriptor_header	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_dev_cap_header	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_encryption_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_ext_cap_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_generic_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_key_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_otg_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_security_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_ss_container_id_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_ss_ep_comp_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_string_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	__u8  bLength;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__u8
bLength	include/linux/usb/ch9.h	/^	u8 bLength;	\/* dummy *\/$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u8
bLength	include/linux/usb/ch9.h	/^	u8 bLength;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bLength	include/usb.h	/^	unsigned char  bLength;$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_generic_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^	u8 bLength;$/;"	m	struct:usb_string_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^    u8	      bLength;	\/* dummy *\/$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u8
bLength	include/usbdescriptors.h	/^    u8	      bLength;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bMasterInterface	include/usbdescriptors.h	/^	u8 bMasterInterface;$/;"	m	struct:usb_class_union_function_descriptor	typeref:typename:u8
bMasterInterface0	include/linux/usb/cdc.h	/^	__u8	bMasterInterface0;$/;"	m	struct:usb_cdc_union_desc	typeref:typename:__u8
bMaxBurst	include/linux/usb/ch9.h	/^	__u8  bMaxBurst;$/;"	m	struct:usb_ss_ep_comp_descriptor	typeref:typename:__u8
bMaxBurst	include/linux/usb/ch9.h	/^	__u8  bMaxBurst;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__u8
bMaxPacketSize0	include/linux/usb/ch9.h	/^	__u8  bMaxPacketSize0;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bMaxPacketSize0	include/linux/usb/ch9.h	/^	__u8  bMaxPacketSize0;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bMaxPacketSize0	include/usbdescriptors.h	/^	u8 bMaxPacketSize0;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bMaxPacketSize0	include/usbdescriptors.h	/^	u8 bMaxPacketSize0;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bMaxPower	include/linux/usb/ch9.h	/^	__u8  bMaxPower;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
bMaxPower	include/linux/usb/composite.h	/^	u8			bMaxPower;$/;"	m	struct:usb_configuration	typeref:typename:u8
bMaxPower	include/usbdescriptors.h	/^	u8 bMaxPower;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
bMaxSequence	include/linux/usb/ch9.h	/^	__u8  bMaxSequence;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__u8
bMessageNumber	include/linux/usb/ch9.h	/^	__u8 bMessageNumber;$/;"	m	struct:usb_handshake	typeref:typename:__u8
bNbrPorts	include/usb.h	/^	unsigned char  bNbrPorts;$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char
bNotificationType	include/linux/usb/cdc.h	/^	__u8	bNotificationType;$/;"	m	struct:usb_cdc_notification	typeref:typename:__u8
bNumConfigurations	include/linux/usb/ch9.h	/^	__u8  bNumConfigurations;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
bNumConfigurations	include/linux/usb/ch9.h	/^	__u8  bNumConfigurations;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bNumConfigurations	include/usbdescriptors.h	/^	u8 bNumConfigurations;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
bNumConfigurations	include/usbdescriptors.h	/^	u8 bNumConfigurations;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
bNumDescriptors	include/linux/usb/ch9.h	/^	u8 bNumDescriptors;	\/* 0x01 *\/$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bNumDescriptors	include/usbdescriptors.h	/^    u8	      bNumDescriptors;	\/* 0x01 *\/$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u8
bNumDeviceCaps	include/linux/usb/ch9.h	/^	__u8  bNumDeviceCaps;$/;"	m	struct:usb_bos_descriptor	typeref:typename:__u8
bNumEncryptionTypes	include/linux/usb/ch9.h	/^	__u8  bNumEncryptionTypes;$/;"	m	struct:usb_security_descriptor	typeref:typename:__u8
bNumEndpoints	drivers/usb/host/ehci.h	/^	unsigned char	bNumEndpoints;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
bNumEndpoints	include/linux/usb/ch9.h	/^	__u8  bNumEndpoints;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
bNumEndpoints	include/usbdescriptors.h	/^	u8 bNumEndpoints;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
bNumInterfaces	drivers/usb/host/ehci.h	/^	unsigned char	bNumInterfaces;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
bNumInterfaces	include/linux/usb/ch9.h	/^	__u8  bNumInterfaces;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
bNumInterfaces	include/usbdescriptors.h	/^	u8 bNumInterfaces;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
bNumRingerPatterns	include/usbdescriptors.h	/^	u8 bNumRingerPatterns;$/;"	m	struct:usb_class_telephone_ringer_descriptor	typeref:typename:u8
bNumberPowerFilters	include/linux/usb/cdc.h	/^	__u8	bNumberPowerFilters;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__u8
bNumberPowerFilters	include/usbdescriptors.h	/^	u8 bNumberPowerFilters;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u8
bOutInterfaceNo	include/usbdescriptors.h	/^	u8 bOutInterfaceNo;$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bOverTheAirInterval	include/linux/usb/ch9.h	/^	__u8  bOverTheAirInterval;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__u8
bParityType	include/linux/usb/cdc.h	/^	__u8	bParityType;$/;"	m	struct:usb_cdc_line_coding	typeref:typename:__u8
bPhysicalInterface	include/linux/usb/cdc.h	/^	__u8	bPhysicalInterface;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
bPhysicalInterface	include/usbdescriptors.h	/^	u8 bPhysicalInterface;$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
bProtocol	include/usbdescriptors.h	/^	u8 bProtocol;$/;"	m	struct:usb_class_protocol_unit_function_descriptor	typeref:typename:u8
bPwrOn2PwrGood	include/usb.h	/^	unsigned char  bPwrOn2PwrGood;$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned char
bRESERVED	include/linux/usb/ch9.h	/^	__u8  bRESERVED;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__u8
bRefresh	include/linux/usb/ch9.h	/^	__u8  bRefresh;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bRequest	include/linux/usb/ch9.h	/^	__u8 bRequest;$/;"	m	struct:usb_ctrlrequest	typeref:typename:__u8
bRequest	include/usbdevice.h	/^	u8 bRequest;$/;"	m	struct:usb_device_request	typeref:typename:u8
bRequestType	include/linux/usb/ch9.h	/^	__u8 bRequestType;$/;"	m	struct:usb_ctrlrequest	typeref:typename:__u8
bReserved	include/linux/usb/ch9.h	/^	__u8  bReserved;$/;"	m	struct:usb_key_descriptor	typeref:typename:__u8
bReserved	include/linux/usb/ch9.h	/^	__u8  bReserved;$/;"	m	struct:usb_ss_container_id_descriptor	typeref:typename:__u8
bReserved	include/linux/usb/ch9.h	/^	__u8  bReserved;$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bReserved	include/linux/usb/ch9.h	/^	__u8 bReserved;$/;"	m	struct:usb_handshake	typeref:typename:__u8
bRingerVolSeps	include/usbdescriptors.h	/^	u8 bRingerVolSeps;$/;"	m	struct:usb_class_telephone_ringer_descriptor	typeref:typename:u8
bSlaveInterface0	include/linux/usb/cdc.h	/^	__u8	bSlaveInterface0;$/;"	m	struct:usb_cdc_union_desc	typeref:typename:__u8
bSlaveInterface0	include/usbdescriptors.h	/^	u8 bSlaveInterface0;$/;"	m	struct:usb_class_union_function_descriptor	typeref:typename:u8
bState	drivers/usb/gadget/f_dfu.h	/^	__u8				bState;$/;"	m	struct:dfu_status	typeref:typename:__u8
bStatus	drivers/usb/gadget/f_dfu.h	/^	__u8				bStatus;$/;"	m	struct:dfu_status	typeref:typename:__u8
bStatus	include/linux/usb/ch9.h	/^	__u8 bStatus;$/;"	m	struct:usb_handshake	typeref:typename:__u8
bSynchAddress	include/linux/usb/ch9.h	/^	__u8  bSynchAddress;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bType	drivers/usb/gadget/storage_common.c	/^	u8	bType;$/;"	m	struct:interrupt_data	typeref:typename:u8	file:
bU1devExitLat	include/linux/usb/ch9.h	/^	__u8  bU1devExitLat;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__u8
bU2DevExitLat	include/linux/usb/ch9.h	/^	__le16 bU2DevExitLat;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__le16
bValue	drivers/usb/gadget/storage_common.c	/^	u8	bValue;$/;"	m	struct:interrupt_data	typeref:typename:u8	file:
b_DI_EN	drivers/net/bfin_mac.h	/^	u16 b_DI_EN:1;		\/* 7	Data interrupt enabled		*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:1
b_DI_SEL	drivers/net/bfin_mac.h	/^	u16 b_DI_SEL:1;		\/* 6	Data interrupt timing select	*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:1
b_DMA2D	drivers/net/bfin_mac.h	/^	u16 b_DMA2D:1;		\/* 4	DMA mode			*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:1
b_DMA_EN	drivers/net/bfin_mac.h	/^	u16 b_DMA_EN:1;		\/* 0	Enabled				*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:1
b_FLOW	drivers/net/bfin_mac.h	/^	u16 b_FLOW:3;		\/* 12:14Flow				*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:3
b_NDSIZE	drivers/net/bfin_mac.h	/^	u16 b_NDSIZE:4;		\/* 8:11	Flex descriptor size		*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:4
b_RESTART	drivers/net/bfin_mac.h	/^	u16 b_RESTART:1;	\/* 5	Retain FIFO			*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:1
b_WDSIZE	drivers/net/bfin_mac.h	/^	u16 b_WDSIZE:2;		\/* 2:3	Transfer word size		*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:2
b_WNR	drivers/net/bfin_mac.h	/^	u16 b_WNR:1;		\/* 1	Direction			*\/$/;"	m	struct:ADI_DMA_CONFIG_REG	typeref:typename:u16:1
b_addchr	common/cli_hush.c	/^static int b_addchr(o_string *o, int ch)$/;"	f	typeref:typename:int	file:
b_addqchr	common/cli_hush.c	/^static int b_addqchr(o_string *o, int ch, int quote)$/;"	f	typeref:typename:int	file:
b_adduint	common/cli_hush.c	/^static int b_adduint(o_string *o, unsigned int i)$/;"	f	typeref:typename:int	file:
b_buf	drivers/usb/gadget/ci_udc.h	/^	uint8_t *b_buf;$/;"	m	struct:ci_req	typeref:typename:uint8_t *
b_check_space	common/cli_hush.c	/^static int b_check_space(o_string *o, int len)$/;"	f	typeref:typename:int	file:
b_cm	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_cm:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_compr_info	fs/jffs2/jffs2_nand_private.h	/^struct b_compr_info {$/;"	s
b_compr_info	fs/jffs2/jffs2_private.h	/^struct b_compr_info {$/;"	s
b_dbo	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_dbo:2;$/;"	m	struct:ibdbits	typeref:typename:unsigned:2	file:
b_ddn	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_ddn:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_ddtb	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_ddtb:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_dgbl	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_dgbl:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_dinc	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_dinc:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_dirent	fs/jffs2/jffs2_nand_private.h	/^struct b_dirent {$/;"	s
b_dt	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_dt:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_erm	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_erm:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_fb	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_fb:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_free	common/cli_hush.c	/^static void b_free(o_string *o)$/;"	f	typeref:typename:void	file:
b_getch	common/cli_hush.c	/^#define b_getch(/;"	d	file:
b_hnp_enable	include/linux/usb/gadget.h	/^	unsigned			b_hnp_enable:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
b_inode	fs/jffs2/jffs2_nand_private.h	/^struct b_inode {$/;"	s
b_instruction	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t b_instruction;	\/* one intruction jumping to real code *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
b_instruction	arch/arm/include/asm/arch/spl.h	/^	uint32_t b_instruction;	\/* one intruction jumping to real code *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
b_interrupt	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_interrupt:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_jffs2_info	fs/jffs2/jffs2_nand_private.h	/^struct b_jffs2_info {$/;"	s
b_jffs2_info	fs/jffs2/jffs2_private.h	/^struct b_jffs2_info {$/;"	s
b_last	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_last:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_left	include/dfu.h	/^	long b_left;$/;"	m	struct:dfu_entity	typeref:typename:long
b_len	drivers/usb/gadget/ci_udc.h	/^	uint32_t b_len;$/;"	m	struct:ci_req	typeref:typename:uint32_t
b_list	fs/jffs2/jffs2_nand_private.h	/^struct b_list {$/;"	s
b_list	fs/jffs2/jffs2_private.h	/^struct b_list {$/;"	s
b_lists	fs/jffs2/jffs2_nand_private.h	/^struct b_lists {$/;"	s
b_lists	fs/jffs2/jffs2_private.h	/^struct b_lists {$/;"	s
b_lp	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_lp:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_max	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int b_max;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
b_max	include/mmc.h	/^	uint b_max;$/;"	m	struct:mmc_config	typeref:typename:uint
b_node	fs/jffs2/jffs2_nand_private.h	/^struct b_node {$/;"	s
b_node	fs/jffs2/jffs2_private.h	/^struct b_node {$/;"	s
b_peek	common/cli_hush.c	/^#define b_peek(/;"	d	file:
b_reset	common/cli_hush.c	/^static void b_reset(o_string *o)$/;"	f	typeref:typename:void	file:
b_resv1	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv1:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_resv1	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv1:3;$/;"	m	struct:dcmbits	typeref:typename:unsigned:3	file:
b_resv2	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv2:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_resv2	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv2:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_resv3	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv3:2;$/;"	m	struct:ibdbits	typeref:typename:unsigned:2	file:
b_resv4	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv4:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_resv5	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv5:2;$/;"	m	struct:ibdbits	typeref:typename:unsigned:2	file:
b_resv6	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv6:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_resv7	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_resv7:9;$/;"	m	struct:ibdbits	typeref:typename:unsigned:9	file:
b_sbo	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_sbo:2;$/;"	m	struct:ibdbits	typeref:typename:unsigned:2	file:
b_sd	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_sd:2;$/;"	m	struct:dcmbits	typeref:typename:unsigned:2	file:
b_sdn	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_sdn:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_sdtb	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_sdtb:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_sgbl	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_sgbl:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_sinc	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_sinc:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_siz	drivers/crypto/fsl/rsa_caam.h	/^	uint32_t b_siz;		\/* size of b[] in number of bytes *\/$/;"	m	struct:pk_in_params	typeref:typename:uint32_t
b_tc2	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_tc2:1;$/;"	m	struct:dcmbits	typeref:typename:unsigned:1	file:
b_valid	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_valid:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_wrap	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_wrap:1;$/;"	m	struct:ibdbits	typeref:typename:unsigned:1	file:
b_wrap	examples/standalone/mem_to_mem_idma2intr.c	/^	unsigned b_wrap:3;$/;"	m	struct:dcmbits	typeref:typename:unsigned:3	file:
ba_intlv_ctl	include/fsl_ddr_sdram.h	/^	unsigned int ba_intlv_ctl;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
backAction	scripts/kconfig/qconf.h	/^	Q3Action *backAction;$/;"	m	class:ConfigMainWindow	typeref:typename:Q3Action *
back_btn	scripts/kconfig/gconf.c	/^GtkWidget *back_btn = NULL;$/;"	v	typeref:typename:GtkWidget *
back_lines	scripts/kconfig/lxdialog/textbox.c	/^static void back_lines(int n)$/;"	f	typeref:typename:void	file:
back_porch	arch/arm/include/asm/arch-tegra/dc.h	/^	uint back_porch;		\/* _DISP_BACK_PORCH_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
back_porch	drivers/video/da8xx-fb.h	/^	int back_porch;$/;"	m	struct:lcd_sync_arg	typeref:typename:int
back_to_P1	arch/sh/cpu/sh3/cache.c	/^#define back_to_P1(/;"	d	file:
back_to_P1	arch/sh/cpu/sh4/cache.c	/^#define back_to_P1(/;"	d	file:
back_to_P1	arch/sh/include/asm/system.h	/^#define back_to_P1(/;"	d
backcolor	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 backcolor;			\/* 0x804 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
backcolor	arch/arm/include/asm/arch/display.h	/^	u32 backcolor;			\/* 0x804 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
backing_dev_info	fs/ubifs/ubifs.h	/^	struct backing_dev_info *backing_dev_info; \/* device readahead, etc *\/$/;"	m	struct:address_space	typeref:struct:backing_dev_info *
backing_dev_info	include/linux/mtd/mtd.h	/^	struct backing_dev_info *backing_dev_info;$/;"	m	struct:mtd_info	typeref:struct:backing_dev_info *
backlight	arch/arm/dts/exynos5250-snow.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/exynos5250-spring.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/exynos5420-peach-pit.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/exynos5800-peach-pi.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/rk3288-veyron.dtsi	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun4i-a10-inet1.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun5i-a13-empire-electronix-d709.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun5i-q8-common.dtsi	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/tegra124-nyan.dtsi	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/tegra20-colibri.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/tegra20-harmony.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/tegra20-seaboard.dts	/^	backlight: backlight {$/;"	l
backlight	arch/arm/dts/tegra20-ventana.dts	/^	backlight: backlight {$/;"	l
backlight	drivers/video/simple_panel.c	/^	struct udevice *backlight;$/;"	m	struct:simple_panel_priv	typeref:struct:udevice *	file:
backlight0	arch/arm/dts/am335x-pxm2.dtsi	/^	backlight0: backlight {$/;"	l
backlight0	arch/arm/dts/am335x-rut.dts	/^	backlight0: backlight {$/;"	l
backlight_enable	drivers/video/backlight-uclass.c	/^int backlight_enable(struct udevice *dev)$/;"	f	typeref:typename:int
backlight_get_ops	include/backlight.h	/^#define backlight_get_ops(/;"	d
backlight_lcd_off	board/bachmann/ot1200/ot1200.c	/^static void backlight_lcd_off(void)$/;"	f	typeref:typename:void	file:
backlight_ops	include/backlight.h	/^struct backlight_ops {$/;"	s
backlight_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
backlight_pads	board/aristainetos/aristainetos-v1.c	/^static iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
backlight_pads	board/aristainetos/aristainetos-v2.c	/^static iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
backlight_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
backlight_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
backlight_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
backlight_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const backlight_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
backlight_reg	arch/arm/dts/am335x-pxm2.dtsi	/^	backlight_reg: fixedregulator0 {$/;"	l
backlight_regulator	arch/arm/dts/rk3288-jerry.dts	/^	backlight_regulator: backlight-regulator {$/;"	l
backoff	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 backoff;		\/* MBAR_ETH + 0x0C8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
backspace	include/video_console.h	/^	int (*backspace)(struct udevice *dev);$/;"	m	struct:vidconsole_ops	typeref:typename:int (*)(struct udevice * dev)
backtitle	scripts/kconfig/lxdialog/dialog.h	/^	const char *backtitle;$/;"	m	struct:dialog_info	typeref:typename:const char *
backup	Makefile	/^backup:$/;"	t
backup_boot	include/fat.h	/^	__u16	backup_boot;	\/* Backup boot sector *\/$/;"	m	struct:boot_sector	typeref:typename:__u16
backup_pool	include/fsl-mc/fsl_dpni.h	/^		int		backup_pool;$/;"	m	struct:dpni_pools_cfg::__anonf56ef98e0408	typeref:typename:int
backup_t	board/mpl/common/common_util.h	/^} backup_t;$/;"	t	typeref:struct:__anondef55e280108
backwards_memcpy	arch/powerpc/lib/ppcstring.S	/^backwards_memcpy:$/;"	l
bad_allowed	drivers/mtd/ubi/ubi.h	/^	unsigned int bad_allowed:1;$/;"	m	struct:ubi_device	typeref:typename:unsigned int:1
bad_block	drivers/mtd/nand/fsl_ifc_spl.c	/^static inline int bad_block(uchar *marker, int port_size)$/;"	f	typeref:typename:int	file:
bad_block_fn	fs/yaffs2/yaffs_guts.h	/^	int (*bad_block_fn) (struct yaffs_dev *dev, int block_no);$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int block_no)
bad_block_list	disk/part_amiga.h	/^    u32 bad_block_list;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
bad_lun_okay	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		bad_lun_okay:1;$/;"	m	struct:fsg_common	typeref:typename:unsigned int:1	file:
bad_mode	arch/arc/lib/interrupts.c	/^void bad_mode(struct pt_regs *regs)$/;"	f	typeref:typename:void
bad_mode	arch/arm/lib/interrupts.c	/^void bad_mode (void)$/;"	f	typeref:typename:void
bad_mode	arch/arm/lib/interrupts_m.c	/^void bad_mode(void)$/;"	f	typeref:typename:void
bad_mode	arch/nds32/lib/interrupts.c	/^void bad_mode(void)$/;"	f	typeref:typename:void
bad_pattern_defs	test/py/u_boot_console_base.py	/^bad_pattern_defs = ($/;"	v
bad_peb_count	drivers/mtd/ubi/ubi-media.h	/^	__be32 bad_peb_count;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
bad_peb_count	drivers/mtd/ubi/ubi.h	/^	int bad_peb_count;$/;"	m	struct:ubi_attach_info	typeref:typename:int
bad_peb_count	drivers/mtd/ubi/ubi.h	/^	int bad_peb_count;$/;"	m	struct:ubi_device	typeref:typename:int
bad_peb_limit	drivers/mtd/ubi/ubi.h	/^	int bad_peb_limit;$/;"	m	struct:ubi_device	typeref:typename:int
bad_save_user_regs	arch/arm/lib/vectors.S	/^	.macro	bad_save_user_regs$/;"	m
bad_skip	include/dfu.h	/^	u32 bad_skip;	\/* for nand use *\/$/;"	m	struct:dfu_entity	typeref:typename:u32
badbit	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint badsrc, badtyp, badlen, badbit;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
badbits	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^badbits (uchar *bp, int n, ulong pat)$/;"	f	typeref:typename:ulong	file:
badblock	tools/mxsboot.c	/^	uint32_t		badblock[510];$/;"	m	struct:mx28_nand_bbt	typeref:typename:uint32_t[510]	file:
badblock_marker_byte	tools/mxsboot.c	/^	uint32_t		badblock_marker_byte;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
badblock_marker_start_bit	tools/mxsboot.c	/^	uint32_t		badblock_marker_start_bit;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
badblock_pattern	include/linux/mtd/bbm.h	/^	struct nand_bbt_descr *badblock_pattern;$/;"	m	struct:bbm_info	typeref:struct:nand_bbt_descr *
badblock_pattern	include/linux/mtd/nand.h	/^	struct nand_bbt_descr *badblock_pattern;$/;"	m	struct:nand_chip	typeref:struct:nand_bbt_descr *
badblockbits	include/linux/mtd/nand.h	/^	int badblockbits;$/;"	m	struct:nand_chip	typeref:typename:int
badblockpos	include/linux/mtd/bbm.h	/^	int badblockpos;$/;"	m	struct:bbm_info	typeref:typename:int
badblockpos	include/linux/mtd/nand.h	/^	int badblockpos;$/;"	m	struct:nand_chip	typeref:typename:int
badblocks	include/mtd/mtd-abi.h	/^	__u32 badblocks;$/;"	m	struct:mtd_ecc_stats	typeref:typename:__u32
badd	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t badd;$/;"	m	struct:mac_queue	typeref:typename:uint32_t
badlen	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint badsrc, badtyp, badlen, badbit;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
badsrc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint badsrc, badtyp, badlen, badbit;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
badtyp	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint badsrc, badtyp, badlen, badbit;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
baltos_set_console	board/vscom/baltos/board.c	/^static int baltos_set_console(void)$/;"	f	typeref:typename:int	file:
bam	drivers/video/mx3fb.c	/^	u32	bam:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
bam	drivers/video/mx3fb.c	/^	u32	bam:3;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:3	file:
bandgap	arch/arm/dts/dra7.dtsi	/^		bandgap: bandgap@4a0021e0 {$/;"	l
bank	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} bank[2];$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0408[2]
bank	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} bank[2];$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon58ea331d0408[2]
bank	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	} bank[3];$/;"	m	struct:iim_regs	typeref:struct:iim_regs::fuse_bank[3]
bank	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	} bank[2];$/;"	m	struct:iim_regs	typeref:struct:iim_regs::fuse_bank[2]
bank	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	} bank[3];$/;"	m	struct:iim_regs	typeref:struct:iim_regs::fuse_bank[3]
bank	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	} bank[3];$/;"	m	struct:iim_regs	typeref:struct:iim_regs::fuse_bank[3]
bank	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	} bank[4];$/;"	m	struct:iim_regs	typeref:struct:iim_regs::fuse_bank[4]
bank	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	} bank[0];$/;"	m	struct:ocotp_regs	typeref:struct:ocotp_regs::fuse_bank[0]
bank	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	} bank[16];$/;"	m	struct:ocotp_regs	typeref:struct:ocotp_regs::fuse_bank[16]
bank	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 bank;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
bank	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	} bank[16];$/;"	m	struct:ocotp_regs	typeref:struct:ocotp_regs::fuse_bank[16]
bank	arch/arm/include/asm/imx-common/hab.h	/^	int bank;$/;"	m	struct:imx_sec_config_fuse_t	typeref:typename:int
bank	arch/arm/include/asm/setup.h	/^	} bank[NR_BANKS];$/;"	m	struct:meminfo	typeref:struct:meminfo::__anon61e8c52b0608[]
bank	arch/arm/mach-exynos/include/mach/gpio.h	/^	char bank;		\/* bank name symbol *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:char
bank	arch/arm/mach-exynos/include/mach/sromc.h	/^	u8 bank;	\/* srom bank number *\/$/;"	m	struct:fdt_sromc	typeref:typename:u8
bank	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	char bank;		\/* bank name symbol *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:char
bank	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u8 bank;$/;"	m	struct:dram_para	typeref:typename:u8	file:
bank	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 bank;$/;"	m	struct:dram_para	typeref:typename:u8	file:
bank	arch/nds32/include/asm/setup.h	/^	} bank[NR_BANKS];$/;"	m	struct:meminfo	typeref:struct:meminfo::__anon553264350208[]
bank	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^	int bank;$/;"	m	struct:__anon0f7aec2e0108	typeref:typename:int	file:
bank	arch/powerpc/include/asm/fsl_lbc.h	/^	lbc_bank_t      bank[8];$/;"	m	struct:fsl_lbc	typeref:typename:lbc_bank_t[8]
bank	arch/powerpc/include/asm/immap_85xx.h	/^	} bank[2];$/;"	m	struct:serdes_corenet	typeref:struct:serdes_corenet::__anondcd7518a0608[2]
bank	arch/powerpc/include/asm/immap_85xx.h	/^	} bank[3];$/;"	m	struct:serdes_corenet	typeref:struct:serdes_corenet::__anondcd7518a0908[3]
bank	arch/x86/include/asm/arch-broadwell/gpio.h	/^	int bank;$/;"	m	struct:broadwell_bank_platdata	typeref:typename:int
bank	arch/xtensa/include/asm/bootparam.h	/^	struct meminfo bank[0];$/;"	m	struct:sysmem_info	typeref:struct:meminfo[0]
bank	board/mpl/pip405/pip405.c	/^	const unsigned char bank;$/;"	m	struct:__anonb110a3780308	typeref:typename:const unsigned char	file:
bank	drivers/gpio/dwapb_gpio.c	/^	int		bank;$/;"	m	struct:gpio_dwapb_platdata	typeref:typename:int	file:
bank	drivers/gpio/intel_broadwell_gpio.c	/^	int bank;$/;"	m	struct:broadwell_bank_priv	typeref:typename:int	file:
bank	drivers/gpio/rk_gpio.c	/^	int bank;$/;"	m	struct:rockchip_gpio_priv	typeref:typename:int	file:
bank	drivers/gpio/s5p_gpio.c	/^	struct s5p_gpio_bank *bank;$/;"	m	struct:exynos_bank_info	typeref:struct:s5p_gpio_bank *	file:
bank	drivers/gpio/s5p_gpio.c	/^	struct s5p_gpio_bank *bank;$/;"	m	struct:exynos_gpio_platdata	typeref:struct:s5p_gpio_bank *	file:
bank	drivers/gpio/tegra_gpio.c	/^	struct gpio_ctlr_bank *bank;$/;"	m	struct:tegra_gpio_platdata	typeref:struct:gpio_ctlr_bank *	file:
bank	drivers/gpio/tegra_gpio.c	/^	struct gpio_ctlr_bank *bank;$/;"	m	struct:tegra_port_info	typeref:struct:gpio_ctlr_bank *	file:
bank	drivers/misc/fsl_iim.c	/^	} bank[8];$/;"	m	struct:fsl_iim	typeref:struct:fsl_iim::__anon3d0f03620108[8]	file:
bank	drivers/mtd/nand/fsl_elbc_nand.c	/^	int bank;               \/* Chip select bank number           *\/$/;"	m	struct:fsl_elbc_mtd	typeref:typename:int	file:
bank	drivers/mtd/nand/fsl_ifc_nand.c	/^	int bank;               \/* Chip select bank number                *\/$/;"	m	struct:fsl_ifc_mtd	typeref:typename:int	file:
bank	drivers/net/enc28j60.c	/^	u8			bank;	\/* current bank in enc28j60 *\/$/;"	m	struct:enc_device	typeref:typename:u8	file:
bank	include/faraday/ftsmc020.h	/^	struct ftsmc020_bank bank[4];	\/* 0x00 - 0x1c *\/$/;"	m	struct:ftsmc020	typeref:struct:ftsmc020_bank[4]
bank0_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank0_bsr;	\/* 0x10 - Ext. Bank Base\/Size Reg 0 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank1_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank1_bsr;	\/* 0x14 - Ext. Bank Base\/Size Reg 1 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank2_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank2_bsr;	\/* 0x18 - Ext. Bank Base\/Size Reg 2 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank3_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank3_bsr;	\/* 0x1c - Ext. Bank Base\/Size Reg 3 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank4_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank4_bsr;	\/* 0x20 - Ext. Bank Base\/Size Reg 4 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank5_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank5_bsr;	\/* 0x24 - Ext. Bank Base\/Size Reg 5 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank6_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank6_bsr;	\/* 0x28 - Ext. Bank Base\/Size Reg 6 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank7_bsr	include/faraday/ftsdmc021.h	/^	unsigned int	bank7_bsr;	\/* 0x2c - Ext. Bank Base\/Size Reg 7 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
bank_addr_bits	include/fsl_ddr_dimm_params.h	/^	unsigned int bank_addr_bits;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
bank_base	drivers/mtd/st_smi.c	/^static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =$/;"	v	typeref:typename:ulong[]	file:
bank_bits	arch/avr32/include/asm/sdram.h	/^	uint8_t row_bits, col_bits, bank_bits;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
bank_count	drivers/gpio/pca953x_gpio.c	/^	int bank_count;$/;"	m	struct:pca953x_info	typeref:typename:int	file:
bank_curr	include/spi_flash.h	/^	u8 bank_curr;$/;"	m	struct:spi_flash	typeref:typename:u8
bank_dens	include/ddr_spd.h	/^	unsigned char bank_dens;   \/* 31 Density of each bank on module *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
bank_group_bits	include/fsl_ddr_dimm_params.h	/^	unsigned int bank_group_bits;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
bank_index	arch/arm/include/asm/arch-hi6220/gpio.h	/^	int bank_index;$/;"	m	struct:hikey_gpio_platdata	typeref:typename:int
bank_index	arch/arm/include/asm/omap_gpio.h	/^	int bank_index;$/;"	m	struct:omap_gpio_platdata	typeref:typename:int
bank_index	drivers/gpio/mxc_gpio.c	/^	int bank_index;$/;"	m	struct:mxc_gpio_plat	typeref:typename:int	file:
bank_locator	arch/x86/include/asm/global_data.h	/^	uint8_t bank_locator;$/;"	m	struct:dimm_info	typeref:typename:uint8_t
bank_lookup	arch/arm/imx-common/cpu.c	/^static const unsigned char bank_lookup[] = {3, 2};$/;"	v	typeref:typename:const unsigned char[]	file:
bank_max	drivers/gpio/zynq_gpio.c	/^	int bank_max[ZYNQMP_GPIO_MAX_BANK];$/;"	m	struct:zynq_platform_data	typeref:typename:int[]	file:
bank_min	drivers/gpio/zynq_gpio.c	/^	int bank_min[ZYNQMP_GPIO_MAX_BANK];$/;"	m	struct:zynq_platform_data	typeref:typename:int[]	file:
bank_name	arch/arm/mach-at91/include/mach/gpio.h	/^	const char *bank_name;$/;"	m	struct:at91_port_platdata	typeref:typename:const char *
bank_name	arch/x86/include/asm/arch-broadwell/gpio.h	/^	const char *bank_name;$/;"	m	struct:broadwell_bank_platdata	typeref:typename:const char *
bank_name	arch/x86/include/asm/gpio.h	/^	const char *bank_name;$/;"	m	struct:ich6_bank_platdata	typeref:typename:const char *
bank_name	drivers/gpio/altera_pio.c	/^	const char *bank_name;$/;"	m	struct:altera_pio_platdata	typeref:typename:const char *	file:
bank_name	drivers/gpio/gpio-uniphier.c	/^	char bank_name[16];$/;"	m	struct:uniphier_gpio_priv	typeref:typename:char[16]	file:
bank_name	drivers/gpio/pcf8575_gpio.c	/^	const char *bank_name;	\/* Name of the expander bank *\/$/;"	m	struct:pcf8575_chip	typeref:typename:const char *	file:
bank_name	drivers/gpio/s5p_gpio.c	/^	const char *bank_name;	\/* Name of port, e.g. 'gpa0" *\/$/;"	m	struct:exynos_gpio_platdata	typeref:typename:const char *	file:
bank_name	drivers/gpio/sunxi_gpio.c	/^	const char *bank_name;	\/* Name of bank, e.g. "B" *\/$/;"	m	struct:sunxi_gpio_platdata	typeref:typename:const char *	file:
bank_name	include/asm-generic/gpio.h	/^	const char *bank_name;$/;"	m	struct:gpio_dev_priv	typeref:typename:const char *
bank_num	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	u8 bank_num;$/;"	m	struct:rockchip_pin_bank	typeref:typename:u8	file:
bank_offset	arch/arm/mach-exynos/include/mach/gpio.h	/^	char bank_offset;	\/* offset of the first bank's pin *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:char
bank_offset	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	char bank_offset;	\/* offset of the first bank's pin *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:char
bank_param	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^struct bank_param {$/;"	s	file:
bank_read_cmd	include/spi_flash.h	/^	u8 bank_read_cmd;$/;"	m	struct:spi_flash	typeref:typename:u8
bank_regs	arch/arm/include/asm/arch-spear/spr_emi.h	/^	struct emi_bank_regs bank_regs[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	m	struct:emi_regs	typeref:struct:emi_bank_regs[]
bank_sel	board/freescale/p1010rdb/p1010rdb.c	/^	u8 bank_sel; \/* NOR Flash bank *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
bank_settings	include/linux/mtd/ndfc.h	/^	uint32_t	bank_settings;$/;"	m	struct:ndfc_chip_settings	typeref:typename:uint32_t
bank_size	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int bank_size;		\/* total number of pins in the bank *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:unsigned int
bank_size	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	u8 bank_size;		\/* total number of pins in the bank *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:u8
bank_size	include/vbe.h	/^	u8 bank_size;		\/* 22 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
bank_size_bytes	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^	unsigned long bank_size_bytes;$/;"	m	struct:bank_param	typeref:typename:unsigned long	file:
bank_write_cmd	include/spi_flash.h	/^	u8 bank_write_cmd;$/;"	m	struct:spi_flash	typeref:typename:u8
bankcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	bankcon[8];$/;"	m	struct:s3c24x0_memctl	typeref:typename:u32[8]
banks	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 banks;	\/* number of banks *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
banks	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 banks;	\/* number of banks *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u8
banks	board/esd/pmc440/sdram.c	/^	int banks;$/;"	m	struct:sdram_conf_s	typeref:typename:int	file:
banksize	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	banksize;$/;"	m	struct:s3c24x0_memctl	typeref:typename:u32
banksize	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^unsigned int banksize(unsigned char row_dens)$/;"	f	typeref:typename:unsigned int
banner	drivers/net/bcm-sf2-eth.c	/^static const char banner[] =$/;"	v	typeref:typename:const char[]	file:
bar	arch/powerpc/include/asm/immap_512x.h	/^	u32 bar;	\/* Base Addr Register *\/$/;"	m	struct:law512x	typeref:typename:u32
bar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 bar;		\/* LBIU local access window base address register *\/$/;"	m	struct:law83xx	typeref:typename:u32
bar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 bar;$/;"	m	struct:pex_outbound_window	typeref:typename:u32
bar	drivers/misc/swap_case.c	/^	u32 bar[2];$/;"	m	struct:swap_case_platdata	typeref:typename:u32[2]	file:
bar	drivers/net/mvgbe.h	/^	u32 bar;$/;"	m	struct:mvgbe_barsz	typeref:typename:u32
bar	include/api_public.h	/^	unsigned long		bar;$/;"	m	struct:sys_info	typeref:typename:unsigned long
bar	include/faraday/ftpci100.h	/^	struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1];$/;"	m	struct:pci_config	typeref:struct:pcibar[]
bar0	arch/m68k/include/asm/immap_5445x.h	/^	u32 bar0;		\/* 0x10 Base address register 0 Register *\/$/;"	m	struct:pci	typeref:typename:u32
bar0	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 bar0;		\/* 0x10 Base address register 0 *\/$/;"	m	struct:pci	typeref:typename:u32
bar1	arch/m68k/include/asm/immap_5445x.h	/^	u32 bar1;		\/* 0x14 Base address register 1 Register *\/$/;"	m	struct:pci	typeref:typename:u32
bar1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 bar1;		\/* 0x14 Base address register 1 *\/$/;"	m	struct:pci	typeref:typename:u32
bar2	arch/m68k/include/asm/immap_5445x.h	/^	u32 bar2;		\/* 0x18 Base address register 2 Register *\/$/;"	m	struct:pci	typeref:typename:u32
bar2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 bar2;		\/* 0x18 NA *\/$/;"	m	struct:pci	typeref:typename:u32
bar3	arch/m68k/include/asm/immap_5445x.h	/^	u32 bar3;		\/* 0x1c Base address register 3 Register *\/$/;"	m	struct:pci	typeref:typename:u32
bar3	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 bar3;		\/* 0x1c NA *\/$/;"	m	struct:pci	typeref:typename:u32
bar4	arch/m68k/include/asm/immap_5445x.h	/^	u32 bar4;		\/* 0x20 Base address register 4 Register *\/$/;"	m	struct:pci	typeref:typename:u32
bar4	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 bar4;		\/* 0x20 NA *\/$/;"	m	struct:pci	typeref:typename:u32
bar5	arch/m68k/include/asm/immap_5445x.h	/^	u32 bar5;		\/* 0x24 Base address register 5 Register *\/$/;"	m	struct:pci	typeref:typename:u32
bar5	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 bar5;		\/* 0x24 NA *\/$/;"	m	struct:pci	typeref:typename:u32
baracsize	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	baracsize;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
bare	drivers/net/mvgbe.h	/^	u32 bare;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
barh	arch/powerpc/include/asm/immap_83xx.h	/^	u32 barh;$/;"	m	struct:pex_inbound_window	typeref:typename:u32
barinfo	drivers/misc/swap_case.c	/^} barinfo[] = {$/;"	v	typeref:struct:pci_bar[]
barker	include/fsl_validate.h	/^	u8 barker[ESBC_BARKER_LEN];	\/* barker code *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u8[]
barker	tools/imximage.h	/^	uint32_t barker; \/* Barker for sanity check *\/$/;"	m	struct:__anon504a956c0208	typeref:typename:uint32_t
barker_code	board/freescale/common/fsl_validate.c	/^static const u8 barker_code[ESBC_BARKER_LEN] = { 0x12, 0x19, 0x20, 0x01 };$/;"	v	typeref:typename:const u8[]	file:
barker_code	board/freescale/common/fsl_validate.c	/^static const u8 barker_code[ESBC_BARKER_LEN] = { 0x68, 0x39, 0x27, 0x81 };$/;"	v	typeref:typename:const u8[]	file:
barl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 barl;$/;"	m	struct:pex_inbound_window	typeref:typename:u32
barmap	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	barmap;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
barrier	arch/x86/include/asm/mp.h	/^	atomic_t barrier;$/;"	m	struct:mp_flight_record	typeref:typename:atomic_t
barrier	include/linux/compiler-gcc.h	/^#define barrier(/;"	d
barrier	include/linux/compiler-intel.h	/^#define barrier(/;"	d
barrier	include/linux/compiler.h	/^# define barrier(/;"	d
barrier_data	include/linux/compiler-gcc.h	/^#define barrier_data(/;"	d
barrier_data	include/linux/compiler-intel.h	/^#define barrier_data(/;"	d
barrier_data	include/linux/compiler.h	/^# define barrier_data(/;"	d
barrier_wait	arch/x86/cpu/mp_init.c	/^static inline void barrier_wait(atomic_t *b)$/;"	f	typeref:typename:void	file:
barsz	drivers/net/mvgbe.h	/^	struct mvgbe_barsz barsz[6];$/;"	m	struct:mvgbe_registers	typeref:struct:mvgbe_barsz[6]
base	arch/arm/imx-common/iomux-v3.c	/^static void *base = (void *)IOMUXC_BASE_ADDR;$/;"	v	typeref:typename:void *	file:
base	arch/arm/include/asm/arch-hi6220/gpio.h	/^	u8 *base;	\/* address of registers in physical memory *\/$/;"	m	struct:gpio_bank	typeref:typename:u8 *
base	arch/arm/include/asm/arch-hi6220/gpio.h	/^	ulong base;     \/* address of registers in physical memory *\/$/;"	m	struct:hikey_gpio_platdata	typeref:typename:ulong
base	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t base;$/;"	m	struct:mrq_module_load_response	typeref:typename:uint32_t
base	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t base;$/;"	m	struct:mrq_module_mail_request	typeref:typename:uint32_t
base	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t base;$/;"	m	struct:mrq_module_unload_request	typeref:typename:uint32_t
base	arch/arm/include/asm/arch-vf610/gpio.h	/^	u32 base;$/;"	m	struct:vybrid_gpio_platdata	typeref:typename:u32
base	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	ulong base;$/;"	m	struct:mxc_i2c_bus	typeref:typename:ulong
base	arch/arm/include/asm/omap_gpio.h	/^	ulong base;	\/* address of registers in physical memory *\/$/;"	m	struct:omap_gpio_platdata	typeref:typename:ulong
base	arch/arm/include/asm/omap_gpio.h	/^	void *base;$/;"	m	struct:gpio_bank	typeref:typename:void *
base	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	unsigned long base;$/;"	m	struct:bcm2835_gpio_platdata	typeref:typename:unsigned long
base	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned long base;$/;"	m	struct:davinci_gpio_bank	typeref:typename:unsigned long
base	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int base;	\/* index of the first bank's pin in the enum *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:unsigned int
base	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 base;$/;"	m	struct:kwwin_registers	typeref:typename:u32
base	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 base;$/;"	m	struct:mbus_win	typeref:typename:u32
base	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 base;$/;"	m	struct:orion5x_ddr_addr_decode_registers	typeref:typename:u32
base	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 base;$/;"	m	struct:orion5x_win_registers	typeref:typename:u32
base	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_base_params base;$/;"	m	struct:rk3288_sdram_params	typeref:struct:rk3288_base_params	file:
base	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int base;	\/* index of the first bank's pin in the enum *\/$/;"	m	struct:gpio_name_num_table	typeref:typename:unsigned int
base	arch/arm/mach-snapdragon/clock-apq8016.c	/^	phys_addr_t base;$/;"	m	struct:msm_clk_priv	typeref:typename:phys_addr_t	file:
base	arch/arm/mach-sunxi/usb_phy.c	/^	ulong base;$/;"	m	struct:sunxi_usb_phy	typeref:typename:ulong	file:
base	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^	resource_size_t base;$/;"	m	struct:phy_param	typeref:typename:resource_size_t	file:
base	arch/arm/mach-uniphier/init.h	/^	unsigned long base;$/;"	m	struct:uniphier_dram_ch	typeref:typename:unsigned long
base	arch/arm/mach-uniphier/micro-support-card.c	/^	phys_addr_t base;$/;"	m	struct:memory_bank	typeref:typename:phys_addr_t	file:
base	arch/powerpc/cpu/mpc83xx/pcie.c	/^	u32 base;$/;"	m	struct:__anoncce71cd40108	typeref:typename:u32	file:
base	arch/powerpc/cpu/ppc4xx/tlb.c	/^	u64 base;$/;"	m	struct:region	typeref:typename:u64	file:
base	arch/powerpc/include/asm/fsl_i2c.h	/^	struct fsl_i2c_base __iomem *base;      \/* register base *\/$/;"	m	struct:fsl_i2c_dev	typeref:struct:fsl_i2c_base __iomem *
base	arch/x86/cpu/intel_common/lpc.c	/^		u32 base;$/;"	m	struct:lpc_common_early_init::reg_info	typeref:typename:u32	file:
base	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^		unsigned long long base;$/;"	m	struct:sysinfo_t::memrange	typeref:typename:unsigned long long
base	arch/x86/include/asm/coreboot_tables.h	/^	u64 base;$/;"	m	struct:cbmem_entry	typeref:typename:u64
base	arch/x86/include/asm/mrccache.h	/^	u32	base;$/;"	m	struct:mrc_region	typeref:typename:u32
base	arch/x86/lib/physmem.c	/^	uint64_t base:31;  \/* base address *\/$/;"	m	struct:pde	typeref:typename:uint64_t:31	file:
base	arch/x86/lib/physmem.c	/^	uint64_t base:40;$/;"	m	struct:pdpe	typeref:typename:uint64_t:40	file:
base	arch/x86/lib/sfi.c	/^	u32 base;$/;"	m	struct:table_info	typeref:typename:u32	file:
base	common/dlmalloc.c	/^	void* base;$/;"	m	struct:GmListElement	typeref:typename:void *	file:
base	drivers/block/systemace.c	/^static u32 base = CONFIG_SYS_SYSTEMACE_BASE;$/;"	v	typeref:typename:u32	file:
base	drivers/clk/uniphier/clk-uniphier-core.c	/^	void __iomem *base;$/;"	m	struct:uniphier_clk_priv	typeref:typename:void __iomem *	file:
base	drivers/core/simple-bus.c	/^	u32 base;$/;"	m	struct:simple_bus_plat	typeref:typename:u32	file:
base	drivers/dma/ti-edma3.c	/^	u32 base;$/;"	m	struct:ti_edma3_priv	typeref:typename:u32	file:
base	drivers/gpio/dwapb_gpio.c	/^	fdt_addr_t	base;$/;"	m	struct:gpio_dwapb_platdata	typeref:typename:fdt_addr_t	file:
base	drivers/gpio/gpio-uniphier.c	/^	void __iomem *base;$/;"	m	struct:uniphier_gpio_priv	typeref:typename:void __iomem *	file:
base	drivers/gpio/mpc85xx_gpio.c	/^	struct ccsr_gpio __iomem *base;$/;"	m	struct:mpc85xx_gpio_data	typeref:struct:ccsr_gpio __iomem *	file:
base	drivers/gpio/msm_gpio.c	/^	phys_addr_t base;$/;"	m	struct:msm_gpio_bank	typeref:typename:phys_addr_t	file:
base	drivers/gpio/omap_gpio.c	/^	void *base;	\/* address of registers in physical memory *\/$/;"	m	struct:gpio_bank	typeref:typename:void *	file:
base	drivers/gpio/zynq_gpio.c	/^	phys_addr_t base;$/;"	m	struct:zynq_gpio_privdata	typeref:typename:phys_addr_t	file:
base	drivers/i2c/intel_i2c.c	/^	u32 base;$/;"	m	struct:intel_i2c	typeref:typename:u32	file:
base	drivers/i2c/kona_i2c.c	/^	void *base;$/;"	m	struct:bcm_kona_i2c_dev	typeref:typename:void *	file:
base	drivers/i2c/mv_i2c.c	/^	struct mv_i2c *base;$/;"	m	struct:mv_i2c_priv	typeref:struct:mv_i2c *	file:
base	drivers/i2c/mvtwsi.c	/^	struct mvtwsi_registers *base;$/;"	m	struct:mvtwsi_i2c_dev	typeref:struct:mvtwsi_registers *	file:
base	drivers/i2c/sh_sh7734_i2c.c	/^static struct sh_i2c *base;$/;"	v	typeref:struct:sh_i2c *	file:
base	drivers/mmc/arm_pl180_mmci.h	/^	struct sdi_registers *base;$/;"	m	struct:pl180_mmc_host	typeref:struct:sdi_registers *
base	drivers/mmc/msm_sdhci.c	/^	void *base;$/;"	m	struct:msm_sdhc	typeref:typename:void *	file:
base	drivers/mmc/mxcmmc.c	/^	struct mxcmci_regs	*base;$/;"	m	struct:mxcmci_host	typeref:struct:mxcmci_regs *	file:
base	drivers/mmc/rockchip_sdhci.c	/^	void *base;$/;"	m	struct:rockchip_sdhc	typeref:typename:void *	file:
base	drivers/mtd/altera_qspi.c	/^	void *base;$/;"	m	struct:altera_qspi_platdata	typeref:typename:void *	file:
base	drivers/mtd/onenand/samsung.c	/^	void __iomem	*base;$/;"	m	struct:s3c_onenand	typeref:typename:void __iomem *	file:
base	drivers/net/ep93xx_eth.h	/^	struct rx_descriptor *base;$/;"	m	struct:rx_descriptor_queue	typeref:struct:rx_descriptor *
base	drivers/net/ep93xx_eth.h	/^	struct rx_status *base;$/;"	m	struct:rx_status_queue	typeref:struct:rx_status *
base	drivers/net/ep93xx_eth.h	/^	struct tx_descriptor *base;$/;"	m	struct:tx_descriptor_queue	typeref:struct:tx_descriptor *
base	drivers/net/ep93xx_eth.h	/^	struct tx_status *base;$/;"	m	struct:tx_status_queue	typeref:struct:tx_status *
base	drivers/net/fm/fm.h	/^	void *base; \/* MAC controller registers base address *\/$/;"	m	struct:fsl_enet_mac	typeref:typename:void *
base	drivers/net/fm/fm.h	/^	void *base;$/;"	m	struct:fm_muram	typeref:typename:void *
base	drivers/net/mvneta.c	/^	void __iomem *base;$/;"	m	struct:mvneta_port	typeref:typename:void __iomem *	file:
base	drivers/net/mvpp2.c	/^	void __iomem *base;$/;"	m	struct:mvpp2	typeref:typename:void __iomem *	file:
base	drivers/net/mvpp2.c	/^	void __iomem *base;$/;"	m	struct:mvpp2_port	typeref:typename:void __iomem *	file:
base	drivers/net/ne2000_base.h	/^	u8* base;$/;"	m	struct:dp83902a_priv_data	typeref:typename:u8 *
base	drivers/net/pcnet.c	/^	u32 base;$/;"	m	struct:pcnet_rx_head	typeref:typename:u32	file:
base	drivers/net/pcnet.c	/^	u32 base;$/;"	m	struct:pcnet_tx_head	typeref:typename:u32	file:
base	drivers/pci/pci_msc01.c	/^	void *base;$/;"	m	struct:msc01_pci_controller	typeref:typename:void *	file:
base	drivers/pci/pci_mvebu.c	/^	void __iomem *base;$/;"	m	struct:mvebu_pcie	typeref:typename:void __iomem *	file:
base	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	unsigned long base;$/;"	m	struct:exynos_pinctrl_priv	typeref:typename:unsigned long
base	drivers/pinctrl/nxp/pinctrl-imx.h	/^	void __iomem *base;$/;"	m	struct:imx_pinctrl_soc_info	typeref:typename:void __iomem *
base	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	void __iomem *base;$/;"	m	struct:uniphier_pinctrl_priv	typeref:typename:void __iomem *
base	drivers/reset/reset-uniphier.c	/^	void __iomem *base;$/;"	m	struct:uniphier_reset_priv	typeref:typename:void __iomem *	file:
base	drivers/serial/serial_msm.c	/^	phys_addr_t base;$/;"	m	struct:msm_serial_data	typeref:typename:phys_addr_t	file:
base	drivers/serial/serial_mvebu_a3700.c	/^	void __iomem *base;$/;"	m	struct:mvebu_platdata	typeref:typename:void __iomem *	file:
base	drivers/serial/serial_pic32.c	/^	void __iomem *base;$/;"	m	struct:pic32_uart_priv	typeref:typename:void __iomem *	file:
base	drivers/spi/ich.h	/^	void *base;		\/* Base of register set *\/$/;"	m	struct:ich_spi_priv	typeref:typename:void *
base	drivers/spi/mxc_spi.c	/^	unsigned long	base;$/;"	m	struct:mxc_spi_slave	typeref:typename:unsigned long	file:
base	drivers/spi/rk_spi.c	/^	fdt_addr_t base;$/;"	m	struct:rockchip_spi_platdata	typeref:typename:fdt_addr_t	file:
base	drivers/spi/tegra_spi.h	/^	ulong base;$/;"	m	struct:tegra_spi_platdata	typeref:typename:ulong
base	drivers/spi/ti_qspi.c	/^	struct ti_qspi_regs *base;$/;"	m	struct:ti_qspi_priv	typeref:struct:ti_qspi_regs *	file:
base	drivers/usb/dwc3/dwc3-omap.c	/^	void __iomem		*base;$/;"	m	struct:dwc3_omap	typeref:typename:void __iomem *	file:
base	drivers/usb/gadget/pxa25x_udc.h	/^	ulong					base;$/;"	m	struct:pxa25x_watchdog	typeref:typename:ulong
base	drivers/video/tegra124/dp.c	/^	ulong base;$/;"	m	struct:tegra_dp_plat	typeref:typename:ulong	file:
base	drivers/video/tegra124/sor.c	/^	void *base;$/;"	m	struct:tegra_dc_sor_data	typeref:typename:void *	file:
base	include/altera.h	/^	void			*base;$/;"	m	struct:__anond5297d870108	typeref:typename:void *
base	include/dm/platform_data/lpc32xx_hsuart.h	/^	unsigned long base;$/;"	m	struct:lpc32xx_hsuart_platdata	typeref:typename:unsigned long
base	include/dm/platform_data/serial_bcm283x_mu.h	/^	unsigned long base;$/;"	m	struct:bcm283x_mu_serial_platdata	typeref:typename:unsigned long
base	include/dm/platform_data/serial_coldfire.h	/^	unsigned long base;$/;"	m	struct:coldfire_serial_platdata	typeref:typename:unsigned long
base	include/dm/platform_data/serial_pl01x.h	/^	unsigned long base;$/;"	m	struct:pl01x_serial_platdata	typeref:typename:unsigned long
base	include/dm/platform_data/serial_sh.h	/^	unsigned long base;$/;"	m	struct:sh_serial_platdata	typeref:typename:unsigned long
base	include/dm/platform_data/serial_stm32.h	/^	struct stm32_usart *base;  \/* address of registers in physical memory *\/$/;"	m	struct:stm32_serial_platdata	typeref:struct:stm32_usart *
base	include/dm/platform_data/serial_stm32x7.h	/^	struct stm32_usart *base;  \/* address of registers in physical memory *\/$/;"	m	struct:stm32x7_serial_platdata	typeref:struct:stm32_usart *
base	include/dm/test.h	/^	uint32_t base;$/;"	m	struct:dm_test_pdata	typeref:typename:uint32_t
base	include/dwc3-omap-uboot.h	/^	void *base;$/;"	m	struct:dwc3_omap_device	typeref:typename:void *
base	include/dwc3-uboot.h	/^	unsigned long base;$/;"	m	struct:dwc3_device	typeref:typename:unsigned long
base	include/lattice.h	/^	void		*base;	\/* base interface address *\/$/;"	m	struct:__anon773a64540408	typeref:typename:void *
base	include/linux/mbus.h	/^		u32	base;$/;"	m	struct:mbus_dram_target_info::mbus_dram_window	typeref:typename:u32
base	include/linux/mtd/onenand.h	/^	void __iomem *base;$/;"	m	struct:onenand_chip	typeref:typename:void __iomem *
base	include/lmb.h	/^	phys_addr_t base;$/;"	m	struct:lmb_property	typeref:typename:phys_addr_t
base	include/ns16550.h	/^	unsigned long base;$/;"	m	struct:ns16550_platdata	typeref:typename:unsigned long
base	include/ram.h	/^	phys_addr_t base;$/;"	m	struct:ram_info	typeref:typename:phys_addr_t
base	include/regmap.h	/^	phys_addr_t base;$/;"	m	struct:regmap	typeref:typename:phys_addr_t
base	include/video.h	/^	ulong base;$/;"	m	struct:video_uc_platdata	typeref:typename:ulong
base	lib/bzip2/bzlib_private.h	/^      Int32    base   [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[][]
base	tools/ifdtool.h	/^	int base, limit, size;$/;"	m	struct:region_t	typeref:typename:int
base0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t base0;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
base1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t base1;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
base_add	include/dm/test.h	/^	int base_add;$/;"	m	struct:dm_test_uclass_perdev_priv	typeref:typename:int
base_addr	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	base_addr;$/;"	m	struct:descr_mem_setup_reg	typeref:typename:u32
base_addr	arch/arm/mach-at91/include/mach/atmel_serial.h	/^	uint32_t base_addr;$/;"	m	struct:atmel_serial_platdata	typeref:typename:uint32_t
base_addr	arch/arm/mach-at91/include/mach/gpio.h	/^	uint32_t base_addr;$/;"	m	struct:at91_port_platdata	typeref:typename:uint32_t
base_addr	arch/x86/include/asm/arch-broadwell/gpio.h	/^	uint16_t base_addr;$/;"	m	struct:broadwell_bank_platdata	typeref:typename:uint16_t
base_addr	arch/x86/include/asm/gpio.h	/^	uint16_t base_addr;$/;"	m	struct:ich6_bank_platdata	typeref:typename:uint16_t
base_addr	drivers/mmc/omap_hsmmc.c	/^	struct hsmmc *base_addr;$/;"	m	struct:omap_hsmmc_data	typeref:struct:hsmmc *	file:
base_addr	drivers/mtd/nand/atmel_nand.c	/^static ulong base_addr[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST;$/;"	v	typeref:typename:ulong[]	file:
base_addr	drivers/net/mvgbe.h	/^	u32 base_addr;		\/* Window base address in u32 form *\/$/;"	m	struct:mvgbe_winparam	typeref:typename:u32
base_addr	drivers/net/xilinx_ll_temac.c	/^	unsigned long		base_addr;$/;"	m	struct:ll_temac_info	typeref:typename:unsigned long	file:
base_addr	drivers/serial/serial_linflexuart.c	/^	struct linflex_fsl *base_addr;$/;"	m	struct:linflex_serial_platdata	typeref:struct:linflex_fsl *	file:
base_address	board/micronas/vct/scc.h	/^	u32 base_address;	\/* base address of the SCC unit reg shell*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
base_address	cmd/mem.c	/^static	ulong	base_address = 0;$/;"	v	typeref:typename:ulong	file:
base_address	drivers/mtd/nand/fsl_elbc_nand.c	/^static unsigned long base_address[CONFIG_SYS_MAX_NAND_DEVICE] =$/;"	v	typeref:typename:unsigned long[]	file:
base_address	drivers/mtd/nand/fsl_ifc_nand.c	/^static unsigned long base_address[CONFIG_SYS_MAX_NAND_DEVICE] =$/;"	v	typeref:typename:unsigned long[]	file:
base_address	drivers/mtd/nand/nand.c	/^static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST;$/;"	v	typeref:typename:ulong[]	file:
base_address	include/common_timing_params.h	/^	unsigned long long base_address;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned long long
base_address	include/fsl_ddr_dimm_params.h	/^	unsigned long long base_address;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned long long
base_address	include/i2s.h	/^	unsigned int base_address;	\/* I2S Register Base *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
base_address	include/linux/edd.h	/^			__u16 base_address;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0208	typeref:typename:__u16
base_address	include/mpc5xxx.h	/^	volatile u32 base_address;	\/* XLB + 0x6c *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
base_address_h	arch/x86/include/asm/acpi_table.h	/^	u32 base_address_h;$/;"	m	struct:acpi_mcfg_mmconfig	typeref:typename:u32
base_address_l	arch/x86/include/asm/acpi_table.h	/^	u32 base_address_l;$/;"	m	struct:acpi_mcfg_mmconfig	typeref:typename:u32
base_dist	lib/zlib/trees.c	/^local int base_dist[D_CODES];$/;"	v	typeref:typename:local int[]
base_dist	lib/zlib/trees.h	/^local const int base_dist[D_CODES] = {$/;"	v	typeref:typename:local const int[]
base_fdt	test/image/test-fit.py	/^base_fdt = '''$/;"	v
base_frequency_id_register	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 base_frequency_id_register;$/;"	m	struct:iou_scntr	typeref:typename:u32
base_frequency_id_register	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 base_frequency_id_register;$/;"	m	struct:iou_scntr_secure	typeref:typename:u32
base_glob	drivers/i2c/mv_i2c.c	/^static struct mv_i2c *base_glob;$/;"	v	typeref:struct:mv_i2c *	file:
base_gpio	drivers/gpio/tegra_gpio.c	/^	int base_gpio;		\/* Port number for this port (0, 1,.., n-1) *\/$/;"	m	struct:tegra_gpio_platdata	typeref:typename:int	file:
base_gpio	drivers/gpio/tegra_gpio.c	/^	int base_gpio;		\/* Port number for this port (0, 1,.., n-1) *\/$/;"	m	struct:tegra_port_info	typeref:typename:int	file:
base_height	board/gdsys/common/osd.c	/^unsigned int base_height;$/;"	v	typeref:typename:unsigned int
base_high	arch/x86/cpu/interrupts.c	/^	u16	base_high;$/;"	m	struct:idt_entry	typeref:typename:u16	file:
base_high	drivers/ddr/marvell/a38x/xor.h	/^	u32 base_high;		\/* 32bit base high      *\/$/;"	m	struct:addr_win	typeref:typename:u32
base_id	include/fsl-mc/fsl_dprc.h	/^	int base_id;$/;"	m	struct:dprc_res_ids_range_desc	typeref:typename:int
base_its	test/image/test-fit.py	/^base_its = '''$/;"	v
base_length	lib/zlib/trees.c	/^local int base_length[LENGTH_CODES];$/;"	v	typeref:typename:local int[]
base_length	lib/zlib/trees.h	/^local const int base_length[LENGTH_CODES] = {$/;"	v	typeref:typename:local const int[]
base_low	arch/x86/cpu/interrupts.c	/^	u16	base_low;$/;"	m	struct:idt_entry	typeref:typename:u16	file:
base_low	drivers/ddr/marvell/a38x/xor.h	/^	u32 base_low;		\/* 32bit base low       *\/$/;"	m	struct:addr_win	typeref:typename:u32
base_ms	cmd/sf.c	/^	unsigned base_ms;$/;"	m	struct:test_info	typeref:typename:unsigned	file:
base_offset	arch/arm/include/asm/omap_common.h	/^	u32 base_offset;$/;"	m	struct:pmic_data	typeref:typename:u32
base_offset	include/fsl-mc/fsl_dprc.h	/^	uint32_t base_offset;$/;"	m	struct:dprc_region_desc	typeref:typename:uint32_t
base_path	test/image/test-fit.py	/^base_path = os.path.dirname(sys.argv[0])$/;"	v
base_range	include/regmap.h	/^	struct regmap_range *range, base_range;$/;"	m	struct:regmap	typeref:struct:regmap_range
base_regs	drivers/serial/serial_pl01x.c	/^static struct pl01x_regs *base_regs __attribute__ ((section(".data")));$/;"	v	typeref:struct:pl01x_regs *	file:
base_script	test/image/test-fit.py	/^base_script = '''$/;"	v
base_time	arch/x86/cpu/coreboot/timestamp.c	/^	uint64_t	base_time;$/;"	m	struct:timestamp_table	typeref:typename:uint64_t	file:
base_time	drivers/rtc/i2c_rtc_emul.c	/^	long base_time;$/;"	m	struct:sandbox_i2c_rtc_plat_data	typeref:typename:long	file:
base_width	board/gdsys/common/osd.c	/^unsigned int base_width;$/;"	v	typeref:typename:unsigned int
basead	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 basead;		\/* 0x10 *\/$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
basead	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 basead;$/;"	m	struct:ahb_pciconf	typeref:typename:u32
baseaddr	arch/x86/include/asm/coreboot_tables.h	/^	u32 baseaddr;$/;"	m	struct:cb_serial	typeref:typename:u32
baseaddr	include/linux/usb/at91_udc.h	/^	unsigned long	baseaddr;$/;"	m	struct:at91_udc_data	typeref:typename:unsigned long
baseboard_data	arch/arm/dts/am335x-bone-common.dtsi	/^		baseboard_data: baseboard_data@0 {$/;"	l	label:baseboard_eeprom
baseboard_eeprom	arch/arm/dts/am335x-bone-common.dtsi	/^	baseboard_eeprom: baseboard_eeprom@50 {$/;"	l
baseline	drivers/video/console_truetype.c	/^	int baseline;$/;"	m	struct:console_tt_priv	typeref:typename:int	file:
basename	net/nfs.c	/^static char *basename(char *path)$/;"	f	typeref:typename:char *	file:
basic_init	drivers/video/tegra.c	/^static void basic_init(struct dc_cmd_reg *cmd)$/;"	f	typeref:typename:void	file:
basic_init_timer	drivers/video/tegra.c	/^static void basic_init_timer(struct dc_disp_reg *disp)$/;"	f	typeref:typename:void	file:
bat	include/power/pmic.h	/^	struct battery *bat;$/;"	m	struct:power_battery	typeref:struct:battery *
batl	arch/powerpc/include/asm/mmu.h	/^	BATL batl;		\/* Lower register *\/$/;"	m	struct:_BAT	typeref:typename:BATL
batl	arch/powerpc/include/asm/mmu.h	/^	P601_BATL batl;		\/* Lower register *\/$/;"	m	struct:_P601_BAT	typeref:typename:P601_BATL
battery	arch/arm/dts/cros-ec-sbs.dtsi	/^	battery: sbs-battery@b {$/;"	l
battery	arch/arm/dts/exynos5250-snow.dts	/^			battery: sbs-battery@b {$/;"	l	label:i2c_104
battery	arch/arm/dts/exynos5420-peach-pit.dts	/^			battery: sbs-battery@b {$/;"	l	label:i2c_tunnel
battery	arch/arm/dts/exynos5800-peach-pi.dts	/^			battery: sbs-battery@b {$/;"	l	label:i2c_tunnel
battery	arch/arm/dts/tegra124-nyan.dtsi	/^				battery: sbs-battery@b {$/;"	l	label:cros_ec
battery	include/power/battery.h	/^struct battery {$/;"	s
battery_charge	include/power/pmic.h	/^	int (*battery_charge) (struct pmic *bat);$/;"	m	struct:power_battery	typeref:typename:int (*)(struct pmic * bat)
battery_init	include/power/pmic.h	/^	int (*battery_init) (struct pmic *bat, struct pmic *p1,$/;"	m	struct:power_battery	typeref:typename:int (*)(struct pmic * bat,struct pmic * p1,struct pmic * p2,struct pmic * p3)
battery_threshold	include/ec_commands.h	/^	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[]
battery_trats	drivers/power/battery/bat_trats.c	/^static struct battery battery_trats;$/;"	v	typeref:struct:battery	file:
battery_trats	drivers/power/battery/bat_trats2.c	/^static struct battery battery_trats;$/;"	v	typeref:struct:battery	file:
batu	arch/powerpc/include/asm/mmu.h	/^	BATU batu;		\/* Upper register *\/$/;"	m	struct:_BAT	typeref:typename:BATU
batu	arch/powerpc/include/asm/mmu.h	/^	P601_BATU batu;		\/* Upper register *\/$/;"	m	struct:_P601_BAT	typeref:typename:P601_BATU
baud	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 baud;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
baud	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 baud;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
baud	arch/x86/include/asm/coreboot_tables.h	/^	u32 baud;$/;"	m	struct:cb_serial	typeref:typename:u32
baud	disk/part_amiga.h	/^    u32 baud;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
baud	drivers/serial/serial_bcm283x_mu.c	/^	u32 baud;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
baud	drivers/spi/bfin_spi.c	/^	u16 ctl, baud, flg;$/;"	m	struct:bfin_spi_slave	typeref:typename:u16	file:
baud	drivers/spi/pic32_spi.c	/^	struct pic32_reg_atomic baud;$/;"	m	struct:pic32_reg_spi	typeref:struct:pic32_reg_atomic	file:
baud_base	include/ps2mult.h	/^	int	baud_base;$/;"	m	struct:serial_state	typeref:typename:int
baud_rate_divider	drivers/serial/serial_zynq.c	/^	u32 baud_rate_divider; \/* 0x34 - Baud Rate Divider [7:0] *\/$/;"	m	struct:uart_zynq	typeref:typename:u32	file:
baud_rate_gen	drivers/serial/serial_zynq.c	/^	u32 baud_rate_gen; \/* 0x18 - Baud Rate Generator [15:0] *\/$/;"	m	struct:uart_zynq	typeref:typename:u32	file:
baudh	drivers/serial/serial_arc.c	/^	unsigned int baudh;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
baudl	drivers/serial/serial_arc.c	/^	unsigned int baudl;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
baudr	drivers/spi/rk_spi.h	/^	u32 baudr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
baudrate	drivers/i2c/mvtwsi.c	/^		u32 baudrate;	\/* When writing *\/$/;"	m	union:mvtwsi_registers::__anon726e98bb010a	typeref:typename:u32	file:
baudrate	drivers/i2c/mvtwsi.c	/^	u32 baudrate;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
baudrate	drivers/spi/cf_spi.c	/^	uint baudrate;$/;"	m	struct:cf_spi_slave	typeref:typename:uint	file:
baudrate	include/asm-generic/global_data.h	/^	unsigned int baudrate;$/;"	m	struct:global_data	typeref:typename:unsigned int
baudrate	include/dm/platform_data/serial_coldfire.h	/^	int baudrate;$/;"	m	struct:coldfire_serial_platdata	typeref:typename:int
baudrate_table	board/inka4x0/inkadiag.c	/^static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;$/;"	v	typeref:typename:const unsigned long[]	file:
baudrate_table	drivers/serial/serial-uclass.c	/^static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;$/;"	v	typeref:typename:const unsigned long[]	file:
baudrate_table	drivers/serial/serial.c	/^static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;$/;"	v	typeref:typename:const unsigned long[]	file:
baudrates	arch/sparc/cpu/leon2/prom.c	/^	int baudrates[2];$/;"	m	struct:leon_prom_info	typeref:typename:int[2]	file:
baudrates	arch/sparc/cpu/leon3/prom.c	/^	int baudrates[2];$/;"	m	struct:leon_prom_info	typeref:typename:int[2]	file:
bauds	drivers/serial/serial.c	/^static const int bauds[] = CONFIG_SYS_BAUDRATE_TABLE;$/;"	v	typeref:typename:const int[]	file:
baytrail_get_count	arch/x86/cpu/baytrail/cpu.c	/^static int baytrail_get_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
baytrail_get_info	arch/x86/cpu/baytrail/cpu.c	/^static int baytrail_get_info(struct udevice *dev, struct cpu_info *info)$/;"	f	typeref:typename:int	file:
bb_delay_wrap	drivers/net/phy/miiphybb.c	/^static int bb_delay_wrap(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
bb_get_mdio_wrap	drivers/net/phy/miiphybb.c	/^static int bb_get_mdio_wrap(struct bb_miiphy_bus *bus, int *v)$/;"	f	typeref:typename:int	file:
bb_marker_physical_offset	tools/mxsboot.c	/^	uint32_t		bb_marker_physical_offset;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
bb_mdio_active_wrap	drivers/net/phy/miiphybb.c	/^static int bb_mdio_active_wrap(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
bb_mdio_tristate_wrap	drivers/net/phy/miiphybb.c	/^static int bb_mdio_tristate_wrap(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
bb_mii_init_wrap	drivers/net/phy/miiphybb.c	/^static int bb_mii_init_wrap(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
bb_miiphy_bus	include/miiphy.h	/^struct bb_miiphy_bus {$/;"	s
bb_miiphy_buses	board/gdsys/405ep/iocon.c	/^struct bb_miiphy_bus bb_miiphy_buses[] = {$/;"	v	typeref:struct:bb_miiphy_bus[]
bb_miiphy_buses	board/gdsys/common/miiphybb.c	/^struct bb_miiphy_bus bb_miiphy_buses[] = {$/;"	v	typeref:struct:bb_miiphy_bus[]
bb_miiphy_buses	board/gdsys/mpc8308/hrcon.c	/^struct bb_miiphy_bus bb_miiphy_buses[] = {$/;"	v	typeref:struct:bb_miiphy_bus[]
bb_miiphy_buses	board/gdsys/mpc8308/strider.c	/^struct bb_miiphy_bus bb_miiphy_buses[] = {$/;"	v	typeref:struct:bb_miiphy_bus[]
bb_miiphy_buses	drivers/net/phy/miiphybb.c	/^struct bb_miiphy_bus bb_miiphy_buses[] = {$/;"	v	typeref:struct:bb_miiphy_bus[]
bb_miiphy_buses	drivers/net/sh_eth.c	/^struct bb_miiphy_bus bb_miiphy_buses[] = {$/;"	v	typeref:struct:bb_miiphy_bus[]
bb_miiphy_buses_num	board/gdsys/405ep/iocon.c	/^int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) \/$/;"	v	typeref:typename:int
bb_miiphy_buses_num	board/gdsys/common/miiphybb.c	/^int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) \/$/;"	v	typeref:typename:int
bb_miiphy_buses_num	board/gdsys/mpc8308/hrcon.c	/^int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) \/$/;"	v	typeref:typename:int
bb_miiphy_buses_num	board/gdsys/mpc8308/strider.c	/^int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) \/$/;"	v	typeref:typename:int
bb_miiphy_buses_num	drivers/net/phy/miiphybb.c	/^int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) \/$/;"	v	typeref:typename:int
bb_miiphy_buses_num	drivers/net/sh_eth.c	/^int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses);$/;"	v	typeref:typename:int
bb_miiphy_getbus	drivers/net/phy/miiphybb.c	/^static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname)$/;"	f	typeref:struct:bb_miiphy_bus *	file:
bb_miiphy_init	drivers/net/phy/miiphybb.c	/^void bb_miiphy_init(void)$/;"	f	typeref:typename:void
bb_miiphy_read	drivers/net/phy/miiphybb.c	/^int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg)$/;"	f	typeref:typename:int
bb_miiphy_write	drivers/net/phy/miiphybb.c	/^int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,$/;"	f	typeref:typename:int
bb_mode_string	fs/reiserfs/mode_string.c	/^const char *bb_mode_string(int mode)$/;"	f	typeref:typename:const char *
bb_per_lun	include/linux/mtd/nand.h	/^	__le16 bb_per_lun;$/;"	m	struct:jedec_ecc_info	typeref:typename:__le16
bb_per_lun	include/linux/mtd/nand.h	/^	__le16 bb_per_lun;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
bb_per_lun	include/linux/mtd/nand.h	/^	__le16 bb_per_lun;$/;"	m	struct:onfi_ext_ecc_info	typeref:typename:__le16
bb_set_mdc_wrap	drivers/net/phy/miiphybb.c	/^static int bb_set_mdc_wrap(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
bb_set_mdio_wrap	drivers/net/phy/miiphybb.c	/^static int bb_set_mdio_wrap(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
bbar	drivers/spi/ich.h	/^	int bbar;$/;"	m	struct:ich_spi_priv	typeref:typename:int
bbar	drivers/spi/ich.h	/^	uint32_t bbar;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint32_t
bbar	drivers/spi/ich.h	/^	uint32_t bbar;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
bbcr	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 bbcr;		\/* 0x4c BIU byte count *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
bbcr	arch/arm/include/asm/arch/mmc.h	/^	u32 bbcr;		\/* 0x4c BIU byte count *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
bbm	include/linux/mtd/onenand.h	/^	void *bbm;$/;"	m	struct:onenand_chip	typeref:typename:void *
bbm_info	include/linux/mtd/bbm.h	/^struct bbm_info {$/;"	s
bbt	include/linux/mtd/bbm.h	/^	uint8_t *bbt;$/;"	m	struct:bbm_info	typeref:typename:uint8_t *
bbt	include/linux/mtd/nand.h	/^	uint8_t *bbt;$/;"	m	struct:nand_chip	typeref:typename:uint8_t *
bbt_erase_shift	include/linux/mtd/bbm.h	/^	int bbt_erase_shift;$/;"	m	struct:bbm_info	typeref:typename:int
bbt_erase_shift	include/linux/mtd/nand.h	/^	int bbt_erase_shift;$/;"	m	struct:nand_chip	typeref:typename:int
bbt_get_entry	drivers/mtd/nand/nand_bbt.c	/^static inline uint8_t bbt_get_entry(struct nand_chip *chip, int block)$/;"	f	typeref:typename:uint8_t	file:
bbt_get_ver_offs	drivers/mtd/nand/nand_bbt.c	/^static u32 bbt_get_ver_offs(struct mtd_info *mtd, struct nand_bbt_descr *td)$/;"	f	typeref:typename:u32	file:
bbt_main_descr	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_bbt_descr bbt_main_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_main_descr	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_bbt_descr bbt_main_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_main_descr	drivers/mtd/nand/mxc_nand.c	/^static struct nand_bbt_descr bbt_main_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_main_descr	drivers/mtd/nand/nand_bbt.c	/^static struct nand_bbt_descr bbt_main_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_main_descr	drivers/mtd/nand/pxa3xx_nand.c	/^static struct nand_bbt_descr bbt_main_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_main_no_oob_descr	drivers/mtd/nand/nand_bbt.c	/^static struct nand_bbt_descr bbt_main_no_oob_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mark_entry	drivers/mtd/nand/nand_bbt.c	/^static inline void bbt_mark_entry(struct nand_chip *chip, int block,$/;"	f	typeref:typename:void	file:
bbt_md	include/linux/mtd/nand.h	/^	struct nand_bbt_descr *bbt_md;$/;"	m	struct:nand_chip	typeref:struct:nand_bbt_descr *
bbt_mirror_descr	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_bbt_descr bbt_mirror_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mirror_descr	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_bbt_descr bbt_mirror_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mirror_descr	drivers/mtd/nand/mxc_nand.c	/^static struct nand_bbt_descr bbt_mirror_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mirror_descr	drivers/mtd/nand/nand_bbt.c	/^static struct nand_bbt_descr bbt_mirror_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mirror_descr	drivers/mtd/nand/pxa3xx_nand.c	/^static struct nand_bbt_descr bbt_mirror_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mirror_no_oob_descr	drivers/mtd/nand/nand_bbt.c	/^static struct nand_bbt_descr bbt_mirror_no_oob_descr = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bbt_mirror_pattern	drivers/mtd/nand/pxa3xx_nand.c	/^static u8 bbt_mirror_pattern[] = {'1', 't', 'b', 'B', 'V', 'M' };$/;"	v	typeref:typename:u8[]	file:
bbt_options	include/linux/mtd/nand.h	/^	unsigned int bbt_options;$/;"	m	struct:nand_chip	typeref:typename:unsigned int
bbt_options	include/linux/mtd/nand.h	/^	unsigned int bbt_options;$/;"	m	struct:platform_nand_chip	typeref:typename:unsigned int
bbt_pattern	drivers/mtd/nand/bfin_nand.c	/^static uint8_t bbt_pattern[] = { 0xff };$/;"	v	typeref:typename:uint8_t[]	file:
bbt_pattern	drivers/mtd/nand/fsl_elbc_nand.c	/^static u8 bbt_pattern[] = {'B', 'b', 't', '0' };$/;"	v	typeref:typename:u8[]	file:
bbt_pattern	drivers/mtd/nand/fsl_ifc_nand.c	/^static u8 bbt_pattern[] = {'B', 'b', 't', '0' };$/;"	v	typeref:typename:u8[]	file:
bbt_pattern	drivers/mtd/nand/mxc_nand.c	/^static u8 bbt_pattern[] = {'B', 'b', 't', '0' };$/;"	v	typeref:typename:u8[]	file:
bbt_pattern	drivers/mtd/nand/nand_bbt.c	/^static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };$/;"	v	typeref:typename:uint8_t[]	file:
bbt_pattern	drivers/mtd/nand/pxa3xx_nand.c	/^static u8 bbt_pattern[] = {'M', 'V', 'B', 'b', 't', '0' };$/;"	v	typeref:typename:u8[]	file:
bbt_td	include/linux/mtd/nand.h	/^	struct nand_bbt_descr *bbt_td;$/;"	m	struct:nand_chip	typeref:struct:nand_bbt_descr *
bbt_wait	include/linux/mtd/onenand.h	/^	int (*bbt_wait) (struct mtd_info *mtd, int state);$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd,int state)
bbtblocks	include/mtd/mtd-abi.h	/^	__u32 bbtblocks;$/;"	m	struct:mtd_ecc_stats	typeref:typename:__u32
bbtskipbytes	drivers/mtd/nand/denali.h	/^	uint32_t bbtskipbytes;$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
bc	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 bc;			\/* 0x0C Byte counter *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
bc	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 bc;			\/* 0x0C Byte counter *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
bc	arch/arm/mach-exynos/include/mach/sromc.h	/^	unsigned int	bc[4];$/;"	m	struct:s5p_sromc	typeref:typename:unsigned int[4]
bc	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^	unsigned int	bc[6];$/;"	m	struct:s5p_sromc	typeref:typename:unsigned int[6]
bc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
bc	board/gdsys/common/cmd_ioloop.c	/^	u8 bc;$/;"	m	struct:io_generic_packet	typeref:typename:u8	file:
bc_cfg	include/linux/usb/dwc3.h	/^	u32 bc_cfg;$/;"	m	struct:dwc3	typeref:typename:u32
bc_evt	include/linux/usb/dwc3.h	/^	u32 bc_evt;$/;"	m	struct:dwc3	typeref:typename:u32
bc_evten	include/linux/usb/dwc3.h	/^	u32 bc_evten;$/;"	m	struct:dwc3	typeref:typename:u32
bc_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 bc_params_sn20[]		= {$/;"	v	typeref:typename:u16[]	file:
bcd2bin	include/bcd.h	/^static inline unsigned int bcd2bin(unsigned int val)$/;"	f	typeref:typename:unsigned int
bcdCDC	include/linux/usb/cdc.h	/^	__le16	bcdCDC;$/;"	m	struct:usb_cdc_header_desc	typeref:typename:__le16
bcdCDC	include/linux/usb/ch9.h	/^	u16 bcdCDC;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u16
bcdCDC	include/usbdescriptors.h	/^	u16 bcdCDC;$/;"	m	struct:usb_class_header_function_descriptor	typeref:typename:u16
bcdCDC	include/usbdescriptors.h	/^    u16	      bcdCDC;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u16
bcdDFUVersion	drivers/usb/gadget/f_dfu.h	/^	__le16				bcdDFUVersion;$/;"	m	struct:dfu_function_descriptor	typeref:typename:__le16
bcdDevice	drivers/usb/gadget/ether.c	/^static ushort bcdDevice;$/;"	v	typeref:typename:ushort	file:
bcdDevice	include/linux/usb/ch9.h	/^	__le16 bcdDevice;$/;"	m	struct:usb_device_descriptor	typeref:typename:__le16
bcdDevice	include/usbdescriptors.h	/^	u16 bcdDevice;$/;"	m	struct:usb_device_descriptor	typeref:typename:u16
bcdDevice_hi	include/usb.h	/^	u16 bcdDevice_hi;$/;"	m	struct:usb_device_id	typeref:typename:u16
bcdDevice_lo	include/usb.h	/^	u16 bcdDevice_lo;$/;"	m	struct:usb_device_id	typeref:typename:u16
bcdUSB	include/linux/usb/ch9.h	/^	__le16 bcdUSB;$/;"	m	struct:usb_device_descriptor	typeref:typename:__le16
bcdUSB	include/linux/usb/ch9.h	/^	__le16 bcdUSB;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:__le16
bcdUSB	include/usbdescriptors.h	/^	u16 bcdUSB;$/;"	m	struct:usb_device_descriptor	typeref:typename:u16
bcdUSB	include/usbdescriptors.h	/^	u16 bcdUSB;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u16
bcdVersion	include/linux/usb/cdc.h	/^	__le16	bcdVersion;$/;"	m	struct:usb_cdc_mdlm_desc	typeref:typename:__le16
bcdVersion	include/usbdescriptors.h	/^	u16 bcdVersion;$/;"	m	struct:usb_class_mdlm_descriptor	typeref:typename:u16
bcd_rev	include/smbios.h	/^	u8 bcd_rev;$/;"	m	struct:smbios_entry	typeref:typename:u8
bcddate	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcddate;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bcdday	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcdday;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bcdhour	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcdhour;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bcdmin	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcdmin;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bcdmon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcdmon;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bcdsec	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcdsec;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bcdyear	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	bcdyear;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
bch	drivers/mtd/nand/arasan_nfc.c	/^	u8 bch;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u8	file:
bch	drivers/mtd/nand/nand_bch.c	/^	struct bch_control   *bch;$/;"	m	struct:nand_bch_control	typeref:struct:bch_control *	file:
bch8_polynomial	drivers/mtd/nand/omap_gpmc.c	/^static u8  bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2,$/;"	v	typeref:typename:u8[]	file:
bch_alloc	lib/bch.c	/^static void *bch_alloc(size_t size, int *err)$/;"	f	typeref:typename:void *	file:
bch_config	drivers/mtd/nand/tegra_nand.h	/^	u32	bch_config;	\/* offset CCh *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
bch_control	include/linux/bch.h	/^struct bch_control {$/;"	s
bch_dec_result	drivers/mtd/nand/tegra_nand.h	/^	u32	bch_dec_result;	\/* offset D0h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
bch_dec_status_buf	drivers/mtd/nand/tegra_nand.h	/^	u32	bch_dec_status_buf;$/;"	m	struct:nand_ctlr	typeref:typename:u32
bch_level	include/linux/mtd/omap_elm.h	/^enum bch_level {$/;"	g
bch_res_0_3	include/linux/mtd/omap_gpmc.h	/^struct bch_res_0_3 {$/;"	s
bch_res_4_6	include/linux/mtd/omap_gpmc.h	/^struct bch_res_4_6 {$/;"	s
bch_result_0_3	include/linux/mtd/omap_gpmc.h	/^	struct bch_res_0_3 bch_result_0_3[GPMC_MAX_SECTORS]; \/* 0x240,0x250, *\/$/;"	m	struct:gpmc	typeref:struct:bch_res_0_3[]
bch_result_4_6	include/linux/mtd/omap_gpmc.h	/^	struct bch_res_4_6 bch_result_4_6[GPMC_MAX_SECTORS]; \/* 0x300,0x310, *\/$/;"	m	struct:gpmc	typeref:struct:bch_res_4_6[]
bch_result_x	include/linux/mtd/omap_gpmc.h	/^	u32 bch_result_x[3];$/;"	m	struct:bch_res_4_6	typeref:typename:u32[3]
bch_result_x	include/linux/mtd/omap_gpmc.h	/^	u32 bch_result_x[4];$/;"	m	struct:bch_res_0_3	typeref:typename:u32[4]
bchval	drivers/mtd/nand/arasan_nfc.c	/^	u8 bchval;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u8	file:
bcintcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 bcintcr;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
bcintmr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 bcintmr;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
bcintsr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 bcintsr;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
bclk_divs	drivers/sound/wm8994.c	/^static int bclk_divs[] = {$/;"	v	typeref:typename:int[]	file:
bcm2835_get_value	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio)$/;"	f	typeref:typename:int	file:
bcm2835_gpio_direction_input	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
bcm2835_gpio_direction_output	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
bcm2835_gpio_get_func_id	drivers/gpio/bcm2835_gpio.c	/^int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int
bcm2835_gpio_get_function	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
bcm2835_gpio_get_value	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
bcm2835_gpio_platdata	arch/arm/mach-bcm283x/include/mach/gpio.h	/^struct bcm2835_gpio_platdata {$/;"	s
bcm2835_gpio_probe	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bcm2835_gpio_regs	arch/arm/mach-bcm283x/include/mach/gpio.h	/^struct bcm2835_gpio_regs {$/;"	s
bcm2835_gpio_set_value	drivers/gpio/bcm2835_gpio.c	/^static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
bcm2835_gpios	drivers/gpio/bcm2835_gpio.c	/^struct bcm2835_gpios {$/;"	s	file:
bcm2835_mbox_call_prop	arch/arm/mach-bcm283x/mbox.c	/^int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer)$/;"	f	typeref:typename:int
bcm2835_mbox_call_raw	arch/arm/mach-bcm283x/mbox.c	/^int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)$/;"	f	typeref:typename:int
bcm2835_mbox_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_hdr {$/;"	s
bcm2835_mbox_regs	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_regs {$/;"	s
bcm2835_mbox_tag_allocate_buffer	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_allocate_buffer {$/;"	s
bcm2835_mbox_tag_alpha_mode	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_alpha_mode {$/;"	s
bcm2835_mbox_tag_blank_screen	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_blank_screen {$/;"	s
bcm2835_mbox_tag_depth	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_depth {$/;"	s
bcm2835_mbox_tag_get_arm_mem	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_arm_mem {$/;"	s
bcm2835_mbox_tag_get_board_rev	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_board_rev {$/;"	s
bcm2835_mbox_tag_get_board_serial	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_board_serial {$/;"	s
bcm2835_mbox_tag_get_clock_rate	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_clock_rate {$/;"	s
bcm2835_mbox_tag_get_mac_address	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_mac_address {$/;"	s
bcm2835_mbox_tag_get_palette	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_palette {$/;"	s
bcm2835_mbox_tag_get_power_state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_get_power_state {$/;"	s
bcm2835_mbox_tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_hdr {$/;"	s
bcm2835_mbox_tag_overscan	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_overscan {$/;"	s
bcm2835_mbox_tag_physical_w_h	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_physical_w_h {$/;"	s
bcm2835_mbox_tag_pitch	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_pitch {$/;"	s
bcm2835_mbox_tag_pixel_order	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_pixel_order {$/;"	s
bcm2835_mbox_tag_release_buffer	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_release_buffer {$/;"	s
bcm2835_mbox_tag_set_palette	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_set_palette {$/;"	s
bcm2835_mbox_tag_set_power_state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_set_power_state {$/;"	s
bcm2835_mbox_tag_test_palette	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_test_palette {$/;"	s
bcm2835_mbox_tag_virtual_offset	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_virtual_offset {$/;"	s
bcm2835_mbox_tag_virtual_w_h	arch/arm/mach-bcm283x/include/mach/mbox.h	/^struct bcm2835_mbox_tag_virtual_w_h {$/;"	s
bcm2835_ops	drivers/mmc/bcm2835_sdhci.c	/^static const struct sdhci_ops bcm2835_ops = {$/;"	v	typeref:typename:const struct sdhci_ops	file:
bcm2835_pitch	drivers/video/bcm2835.c	/^static u32 bcm2835_pitch;$/;"	v	typeref:typename:u32	file:
bcm2835_sdhci_host	drivers/mmc/bcm2835_sdhci.c	/^struct bcm2835_sdhci_host {$/;"	s	file:
bcm2835_sdhci_init	drivers/mmc/bcm2835_sdhci.c	/^int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)$/;"	f	typeref:typename:int
bcm2835_sdhci_raw_readl	drivers/mmc/bcm2835_sdhci.c	/^static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u32	file:
bcm2835_sdhci_raw_writel	drivers/mmc/bcm2835_sdhci.c	/^static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,$/;"	f	typeref:typename:void	file:
bcm2835_sdhci_readb	drivers/mmc/bcm2835_sdhci.c	/^static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u8	file:
bcm2835_sdhci_readl	drivers/mmc/bcm2835_sdhci.c	/^static u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u32	file:
bcm2835_sdhci_readw	drivers/mmc/bcm2835_sdhci.c	/^static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u16	file:
bcm2835_sdhci_writeb	drivers/mmc/bcm2835_sdhci.c	/^static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)$/;"	f	typeref:typename:void	file:
bcm2835_sdhci_writel	drivers/mmc/bcm2835_sdhci.c	/^static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg)$/;"	f	typeref:typename:void	file:
bcm2835_sdhci_writew	drivers/mmc/bcm2835_sdhci.c	/^static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg)$/;"	f	typeref:typename:void	file:
bcm2835_timer_regs	arch/arm/mach-bcm283x/include/mach/timer.h	/^struct bcm2835_timer_regs {$/;"	s
bcm2835_wdog_regs	arch/arm/mach-bcm283x/include/mach/wdog.h	/^struct bcm2835_wdog_regs {$/;"	s
bcm2837_mem_map	board/raspberrypi/rpi/rpi.c	/^static struct mm_region bcm2837_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
bcm283x_mu_priv	drivers/serial/serial_bcm283x_mu.c	/^struct bcm283x_mu_priv {$/;"	s	file:
bcm283x_mu_regs	drivers/serial/serial_bcm283x_mu.c	/^struct bcm283x_mu_regs {$/;"	s	file:
bcm283x_mu_serial_getc	drivers/serial/serial_bcm283x_mu.c	/^static int bcm283x_mu_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bcm283x_mu_serial_ops	drivers/serial/serial_bcm283x_mu.c	/^static const struct dm_serial_ops bcm283x_mu_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
bcm283x_mu_serial_pending	drivers/serial/serial_bcm283x_mu.c	/^static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
bcm283x_mu_serial_platdata	include/dm/platform_data/serial_bcm283x_mu.h	/^struct bcm283x_mu_serial_platdata {$/;"	s
bcm283x_mu_serial_probe	drivers/serial/serial_bcm283x_mu.c	/^static int bcm283x_mu_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bcm283x_mu_serial_putc	drivers/serial/serial_bcm283x_mu.c	/^static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)$/;"	f	typeref:typename:int	file:
bcm283x_mu_serial_setbrg	drivers/serial/serial_bcm283x_mu.c	/^static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
bcm5461_config	drivers/net/phy/broadcom.c	/^static int bcm5461_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm5482_config	drivers/net/phy/broadcom.c	/^static int bcm5482_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm5482_is_serdes	drivers/net/phy/broadcom.c	/^static int bcm5482_is_serdes(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm5482_parse_serdes_sr	drivers/net/phy/broadcom.c	/^static u32 bcm5482_parse_serdes_sr(struct phy_device *phydev)$/;"	f	typeref:typename:u32	file:
bcm5482_read_wirespeed	drivers/net/phy/broadcom.c	/^static u32 bcm5482_read_wirespeed(struct phy_device *phydev, u32 reg)$/;"	f	typeref:typename:u32	file:
bcm5482_startup	drivers/net/phy/broadcom.c	/^static int bcm5482_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm54xx_parse_status	drivers/net/phy/broadcom.c	/^static int bcm54xx_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm54xx_startup	drivers/net/phy/broadcom.c	/^static int bcm54xx_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm_clk_bus	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	bcm_clk_bus,$/;"	e	enum:bcm_clk_type
bcm_clk_bus	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	bcm_clk_bus,$/;"	e	enum:bcm_clk_type
bcm_clk_core	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	bcm_clk_core,$/;"	e	enum:bcm_clk_type
bcm_clk_core	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	bcm_clk_core,$/;"	e	enum:bcm_clk_type
bcm_clk_div	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct bcm_clk_div {$/;"	s
bcm_clk_div	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct bcm_clk_div {$/;"	s
bcm_clk_gate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct bcm_clk_gate {$/;"	s
bcm_clk_gate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct bcm_clk_gate {$/;"	s
bcm_clk_none	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	bcm_clk_none,		\/* undefined clock type *\/$/;"	e	enum:bcm_clk_type
bcm_clk_none	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	bcm_clk_none,		\/* undefined clock type *\/$/;"	e	enum:bcm_clk_type
bcm_clk_peri	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	bcm_clk_peri$/;"	e	enum:bcm_clk_type
bcm_clk_peri	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	bcm_clk_peri$/;"	e	enum:bcm_clk_type
bcm_clk_sel	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct bcm_clk_sel {$/;"	s
bcm_clk_sel	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct bcm_clk_sel {$/;"	s
bcm_clk_trig	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct bcm_clk_trig {$/;"	s
bcm_clk_trig	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct bcm_clk_trig {$/;"	s
bcm_clk_type	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^enum bcm_clk_type {$/;"	g
bcm_clk_type	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^enum bcm_clk_type {$/;"	g
bcm_cygnus_config	drivers/net/phy/broadcom.c	/^static int bcm_cygnus_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm_cygnus_startup	drivers/net/phy/broadcom.c	/^static int bcm_cygnus_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
bcm_init	drivers/qe/uec_phy.c	/^static int bcm_init(struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
bcm_kona_cmd_t	drivers/i2c/kona_i2c.c	/^enum bcm_kona_cmd_t {$/;"	g	file:
bcm_kona_i2c_assign_bus_speed	drivers/i2c/kona_i2c.c	/^static uint bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:uint	file:
bcm_kona_i2c_config_timing	drivers/i2c/kona_i2c.c	/^static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev *dev)$/;"	f	typeref:typename:void	file:
bcm_kona_i2c_dev	drivers/i2c/kona_i2c.c	/^struct bcm_kona_i2c_dev {$/;"	s	file:
bcm_kona_i2c_disable_clock	drivers/i2c/kona_i2c.c	/^static void bcm_kona_i2c_disable_clock(struct bcm_kona_i2c_dev *dev)$/;"	f	typeref:typename:void	file:
bcm_kona_i2c_do_addr	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_kona_i2c_enable_autosense	drivers/i2c/kona_i2c.c	/^static void bcm_kona_i2c_enable_autosense(struct bcm_kona_i2c_dev *dev)$/;"	f	typeref:typename:void	file:
bcm_kona_i2c_enable_clock	drivers/i2c/kona_i2c.c	/^static void bcm_kona_i2c_enable_clock(struct bcm_kona_i2c_dev *dev)$/;"	f	typeref:typename:void	file:
bcm_kona_i2c_init	drivers/i2c/kona_i2c.c	/^static void bcm_kona_i2c_init(struct bcm_kona_i2c_dev *dev)$/;"	f	typeref:typename:void	file:
bcm_kona_i2c_read_fifo	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_kona_i2c_read_fifo_single	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_kona_i2c_send_cmd_to_ctrl	drivers/i2c/kona_i2c.c	/^static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:void	file:
bcm_kona_i2c_write_byte	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data,$/;"	f	typeref:typename:int	file:
bcm_kona_i2c_write_fifo	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_kona_i2c_write_fifo_single	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_kona_i2c_xfer	drivers/i2c/kona_i2c.c	/^static int bcm_kona_i2c_xfer(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_kona_send_i2c_cmd	drivers/i2c/kona_i2c.c	/^static int bcm_kona_send_i2c_cmd(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:int	file:
bcm_otg_data	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^static struct dwc2_plat_otg_data bcm_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data	file:
bcm_otg_data	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^static struct dwc2_plat_otg_data bcm_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data	file:
bcm_sf2_eth_close	drivers/net/bcm-sf2-eth.c	/^static void bcm_sf2_eth_close(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
bcm_sf2_eth_init	drivers/net/bcm-sf2-eth.c	/^static int bcm_sf2_eth_init(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
bcm_sf2_eth_open	drivers/net/bcm-sf2-eth.c	/^static int bcm_sf2_eth_open(struct eth_device *dev, bd_t *bt)$/;"	f	typeref:typename:int	file:
bcm_sf2_eth_receive	drivers/net/bcm-sf2-eth.c	/^static int bcm_sf2_eth_receive(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
bcm_sf2_eth_register	drivers/net/bcm-sf2-eth.c	/^int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)$/;"	f	typeref:typename:int
bcm_sf2_eth_send	drivers/net/bcm-sf2-eth.c	/^static int bcm_sf2_eth_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
bcm_sf2_eth_write_hwaddr	drivers/net/bcm-sf2-eth.c	/^static int bcm_sf2_eth_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
bcnt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int bcnt;$/;"	m	struct:edma3_slot_config	typeref:typename:int
bcntrld	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int bcntrld;$/;"	m	struct:edma3_slot_config	typeref:typename:int
bcpl_strcpy	disk/part_amiga.c	/^static void bcpl_strcpy(char *to, char *from)$/;"	f	typeref:typename:void	file:
bcr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		bcr;	\/* 0xC0 TC Block Control Register *\/$/;"	m	struct:at91_tc	typeref:typename:u32
bcr	arch/m68k/include/asm/immap_5227x.h	/^	u32 bcr;		\/* 0x24 Burst Configuration *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
bcr	arch/m68k/include/asm/immap_5301x.h	/^	u8 bcr;			\/* 0x24 *\/$/;"	m	struct:scm2	typeref:typename:u8
bcr	arch/m68k/include/asm/immap_5329.h	/^	u32 bcr;		\/* 0x24 Burst Configuration Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
bcr	arch/m68k/include/asm/immap_5441x.h	/^	u32 bcr;		\/* 0x24 *\/$/;"	m	struct:scm	typeref:typename:u32
bcr	arch/m68k/include/asm/immap_5445x.h	/^	u8 bcr;			\/* 0x24 *\/$/;"	m	struct:scm2	typeref:typename:u8
bcr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	bcr;		\/* DMA byte count register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
bcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 bcr;		\/* Bread Crumb Register *\/$/;"	m	struct:clk512x	typeref:typename:u32
bcr	drivers/spi/ich.h	/^	int bcr;$/;"	m	struct:ich_spi_priv	typeref:typename:int
bcr	drivers/spi/ich.h	/^	uint32_t bcr;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
bcr0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bcr0;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
bcr1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bcr1;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
bcr2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bcr2;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
bcr3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bcr3;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
bcr6	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bcr6;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
bcr7	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bcr7;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
bcr_clust_cfg	arch/arc/lib/cache.c	/^		struct bcr_clust_cfg {$/;"	s	union:read_decode_cache_bcr_arcv2::__anon3b450cc2050a	file:
bcr_regs	arch/arm/mach-snapdragon/clock-apq8016.c	/^struct bcr_regs {$/;"	s	file:
bcsr0	board/freescale/mpc8560ads/mpc8560ads.c	/^	volatile unsigned char bcsr0;$/;"	m	struct:bcsr_	typeref:typename:volatile unsigned char	file:
bcsr1	board/freescale/mpc8560ads/mpc8560ads.c	/^	volatile unsigned char bcsr1;$/;"	m	struct:bcsr_	typeref:typename:volatile unsigned char	file:
bcsr2	board/freescale/mpc8560ads/mpc8560ads.c	/^	volatile unsigned char bcsr2;$/;"	m	struct:bcsr_	typeref:typename:volatile unsigned char	file:
bcsr3	board/freescale/mpc8560ads/mpc8560ads.c	/^	volatile unsigned char bcsr3;$/;"	m	struct:bcsr_	typeref:typename:volatile unsigned char	file:
bcsr4	board/freescale/mpc8560ads/mpc8560ads.c	/^	volatile unsigned char bcsr4;$/;"	m	struct:bcsr_	typeref:typename:volatile unsigned char	file:
bcsr5	board/freescale/mpc8560ads/mpc8560ads.c	/^	volatile unsigned char bcsr5;$/;"	m	struct:bcsr_	typeref:typename:volatile unsigned char	file:
bcsr_	board/freescale/mpc8560ads/mpc8560ads.c	/^typedef struct bcsr_ {$/;"	s	file:
bcsr_t	board/freescale/mpc8560ads/mpc8560ads.c	/^} bcsr_t;$/;"	t	typeref:struct:bcsr_	file:
bcu_tags	board/micronas/vct/bcu.h	/^enum bcu_tags {$/;"	g
bd	board/synopsys/axs10x/nand.c	/^static struct nand_bd *bd;	\/* DMA buffer descriptors	*\/$/;"	v	typeref:struct:nand_bd *	file:
bd	drivers/net/fec_mxc.h	/^	bd_t *bd;$/;"	m	struct:fec_priv	typeref:typename:bd_t *
bd	drivers/qe/uec.h	/^    qe_bd_t   bd[MAX_PREFETCHED_BDS]; \/* prefetched bd *\/$/;"	m	struct:uec_rx_prefetched_bds	typeref:typename:qe_bd_t[]
bd	include/asm-generic/global_data.h	/^	bd_t *bd;$/;"	m	struct:global_data	typeref:typename:bd_t *
bd	include/universe.h	/^	unsigned int bd;       \/* Bound       *\/$/;"	m	struct:_SLAVE_IMAGE	typeref:typename:unsigned int
bd82x6x_ahci_ids	arch/x86/cpu/ivybridge/sata.c	/^static const struct udevice_id bd82x6x_ahci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
bd82x6x_get_gpio_base	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int bd82x6x_get_gpio_base(struct udevice *dev, u32 *gbasep)$/;"	f	typeref:typename:int	file:
bd82x6x_ids	arch/x86/cpu/ivybridge/bd82x6x.c	/^static const struct udevice_id bd82x6x_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
bd82x6x_lpc_early_init	arch/x86/cpu/ivybridge/lpc.c	/^static int bd82x6x_lpc_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bd82x6x_lpc_ids	arch/x86/cpu/ivybridge/lpc.c	/^static const struct udevice_id bd82x6x_lpc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
bd82x6x_lpc_probe	arch/x86/cpu/ivybridge/lpc.c	/^static int bd82x6x_lpc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bd82x6x_northbridge_early_init	arch/x86/cpu/ivybridge/northbridge.c	/^static int bd82x6x_northbridge_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bd82x6x_northbridge_ids	arch/x86/cpu/ivybridge/northbridge.c	/^static const struct udevice_id bd82x6x_northbridge_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
bd82x6x_northbridge_probe	arch/x86/cpu/ivybridge/northbridge.c	/^static int bd82x6x_northbridge_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bd82x6x_pch_get_spi_base	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep)$/;"	f	typeref:typename:int	file:
bd82x6x_pch_ops	arch/x86/cpu/ivybridge/bd82x6x.c	/^static const struct pch_ops bd82x6x_pch_ops = {$/;"	v	typeref:typename:const struct pch_ops	file:
bd82x6x_probe	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int bd82x6x_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bd82x6x_sata_enable	arch/x86/cpu/ivybridge/sata.c	/^static void bd82x6x_sata_enable(struct udevice *dev)$/;"	f	typeref:typename:void	file:
bd82x6x_sata_init	arch/x86/cpu/ivybridge/sata.c	/^static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)$/;"	f	typeref:typename:void	file:
bd82x6x_sata_probe	arch/x86/cpu/ivybridge/sata.c	/^static int bd82x6x_sata_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bd82x6x_set_spi_protect	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int bd82x6x_set_spi_protect(struct udevice *dev, bool protect)$/;"	f	typeref:typename:int	file:
bd82x6x_video_ids	drivers/video/ivybridge_igd.c	/^static const struct udevice_id bd82x6x_video_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
bd82x6x_video_probe	drivers/video/ivybridge_igd.c	/^static int bd82x6x_video_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bdBase	drivers/net/mpc512x_fec.h	/^	mpc512x_buff_descs *bdBase;	\/* BD rings and recv buffer *\/$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:mpc512x_buff_descs *
bd_addr	board/nokia/rx51/tag_omap.h	/^	u8 bd_addr[6];$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8[6]
bd_info	arch/blackfin/include/asm/u-boot.h	/^typedef struct bd_info {$/;"	s
bd_info	arch/nds32/include/asm/u-boot.h	/^typedef struct bd_info {$/;"	s
bd_info	arch/openrisc/include/asm/u-boot.h	/^typedef struct bd_info {$/;"	s
bd_info	arch/xtensa/include/asm/u-boot.h	/^typedef struct bd_info {$/;"	s
bd_info	include/asm-generic/u-boot.h	/^typedef struct bd_info {$/;"	s
bd_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 bd_params_sn20[] = {0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67};$/;"	v	typeref:typename:u16[]	file:
bd_ram_ofs	include/cpsw.h	/^	u32	bd_ram_ofs;		\/* Buffer Descriptor RAM offset *\/$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
bd_ring_base	drivers/qe/uec.h	/^	u32    bd_ring_base; \/* pointer to BD ring base address *\/$/;"	m	struct:uec_send_queue_qd	typeref:typename:u32
bd_ring_base_hi	drivers/net/fm/fm.h	/^	u16 bd_ring_base_hi;$/;"	m	struct:fm_port_qd	typeref:typename:u16
bd_ring_base_lo	drivers/net/fm/fm.h	/^	u32 bd_ring_base_lo;$/;"	m	struct:fm_port_qd	typeref:typename:u32
bd_ring_size	drivers/net/fm/fm.h	/^	u16 bd_ring_size;$/;"	m	struct:fm_port_qd	typeref:typename:u16
bd_t	arch/blackfin/include/asm/u-boot.h	/^} bd_t;$/;"	t	typeref:struct:bd_info
bd_t	arch/nds32/include/asm/u-boot.h	/^} bd_t;$/;"	t	typeref:struct:bd_info
bd_t	arch/openrisc/include/asm/u-boot.h	/^} bd_t;$/;"	t	typeref:struct:bd_info
bd_t	arch/xtensa/include/asm/u-boot.h	/^} bd_t;$/;"	t	typeref:struct:bd_info
bd_t	include/asm-generic/u-boot.h	/^} bd_t;$/;"	t	typeref:struct:bd_info
bdata	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	bdata;		\/* _BUFFER_DATA_PORT_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
bdata	common/spl/spl.c	/^static bd_t bdata __attribute__ ((section(".data")));$/;"	v	typeref:typename:bd_t	file:
bdbaseptr	drivers/qe/uec.h	/^	u32   bdbaseptr;         \/* BD base pointer          *\/$/;"	m	struct:uec_rx_bd_queues_entry	typeref:typename:u32
bdcr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 bdcr;	\/* RCC Backup domain control *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
bdcr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 bdcr;	\/* RCC Backup domain control *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
bdcr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 bdcr;	\/* RCC Backup domain control *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
bdev	include/blk.h	/^	struct udevice *bdev;$/;"	m	struct:blk_desc	typeref:struct:udevice *
bdev_try_to_free_page	fs/ubifs/ubifs.h	/^	int (*bdev_try_to_free_page)(struct super_block*, struct page*, gfp_t);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct super_block *,struct page *,gfp_t)
bdf	arch/x86/include/asm/irq.h	/^	int bdf;$/;"	m	struct:pirq_routing	typeref:typename:int
bdf	arch/x86/include/asm/irq.h	/^	u32 bdf;$/;"	m	struct:irq_router	typeref:typename:u32
bdf	examples/standalone/mem_to_mem_idma2intr.c	/^volatile ibd_t *bdf;$/;"	v	typeref:typename:volatile ibd_t *
bdi	fs/ubifs/ubifs.h	/^	struct backing_dev_info bdi;$/;"	m	struct:ubifs_info	typeref:struct:backing_dev_info
bdidcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	bdidcsr;	\/* Base Device ID CSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
bdidcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	bdidcsr;	\/* 0xc0060 - Base Device ID Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
bdlc	arch/powerpc/include/asm/immap_512x.h	/^	bdlc512x_t		bdlc;		\/* BDLC *\/$/;"	m	struct:immap	typeref:typename:bdlc512x_t
bdlc512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct bdlc512x {$/;"	s
bdlc512x_t	arch/powerpc/include/asm/immap_512x.h	/^} bdlc512x_t;$/;"	t	typeref:struct:bdlc512x
bdlr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 bdlr[7];         \/* DATX8 bit delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[7]
bdlr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 bdlr[7];         \/* DATX8 bit delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[7]
bdlr6	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 bdlr6;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32
bdlr6	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 bdlr6;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32
bdptr	drivers/qe/uec.h	/^	u32   bdptr;             \/* BD pointer               *\/$/;"	m	struct:uec_rx_bd_queues_entry	typeref:typename:u32
bdrl	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 bdrl;$/;"	m	struct:linflex_fsl	typeref:typename:u32
bdrm	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 bdrm;$/;"	m	struct:linflex_fsl	typeref:typename:u32
bdw_port0123	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 bdw_port0123;	\/* 0x54: Bandwidth Port 0\/1\/2\/3 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
bdw_port4567	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 bdw_port4567;	\/* 0x58: Bandwidth Port 4\/5\/6\/7 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
be0	arch/arm/dts/sun5i-a13.dtsi	/^		be0: display-backend@01e60000 {$/;"	l
be0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 be0_clk_cfg;	\/* 0x104 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 be0_clk_cfg;	\/* 0x104 BE0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 be0_clk_cfg;	\/* 0x104 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 be0_clk_cfg;	\/* 0x104 BE0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be0_in	arch/arm/dts/sun5i-a13.dtsi	/^				be0_in: port@0 {$/;"	l	label:be0
be0_in_fe0	arch/arm/dts/sun5i-a13.dtsi	/^					be0_in_fe0: endpoint@0 {$/;"	l	label:be0.be0_in
be0_out	arch/arm/dts/sun5i-a13.dtsi	/^				be0_out: port@1 {$/;"	l	label:be0
be0_out_tcon0	arch/arm/dts/sun5i-a13.dtsi	/^					be0_out_tcon0: endpoint@0 {$/;"	l	label:be0.be0_out
be16_to_cpu	include/compiler.h	/^# define be16_to_cpu(/;"	d
be16_to_cpu	include/compiler.h	/^#define be16_to_cpu(/;"	d
be16_to_cpu	include/linux/byteorder/generic.h	/^#define be16_to_cpu /;"	d
be16_to_cpup	include/linux/byteorder/generic.h	/^#define be16_to_cpup /;"	d
be16_to_cpus	include/linux/byteorder/generic.h	/^#define be16_to_cpus /;"	d
be1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 be1_clk_cfg;	\/* 0x108 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 be1_clk_cfg;	\/* 0x108 BE1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 be1_clk_cfg;	\/* 0x108 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 be1_clk_cfg;	\/* 0x108 BE1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
be32_to_cpu	include/compiler.h	/^# define be32_to_cpu(/;"	d
be32_to_cpu	include/compiler.h	/^#define be32_to_cpu(/;"	d
be32_to_cpu	include/linux/byteorder/generic.h	/^#define be32_to_cpu /;"	d
be32_to_cpup	include/linux/byteorder/generic.h	/^#define be32_to_cpup /;"	d
be32_to_cpus	include/linux/byteorder/generic.h	/^#define be32_to_cpus /;"	d
be64	tools/relocate-rela.c	/^static inline uint64_t be64(uint64_t val)$/;"	f	typeref:typename:uint64_t	file:
be64_to_cpu	include/compiler.h	/^# define be64_to_cpu(/;"	d
be64_to_cpu	include/compiler.h	/^#define be64_to_cpu(/;"	d
be64_to_cpu	include/linux/byteorder/generic.h	/^#define be64_to_cpu /;"	d
be64_to_cpup	include/linux/byteorder/generic.h	/^#define be64_to_cpup /;"	d
be64_to_cpus	include/linux/byteorder/generic.h	/^#define be64_to_cpus /;"	d
be_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 be_params_sn20[] = {$/;"	v	typeref:typename:u16[]	file:
beagle_display_init	board/ti/beagle/beagle.c	/^static void beagle_display_init(void)$/;"	f	typeref:typename:void	file:
beagle_dvi_pup	board/ti/beagle/beagle.c	/^static void beagle_dvi_pup(void)$/;"	f	typeref:typename:void	file:
beagle_serial	board/ti/beagle/beagle.c	/^static const struct ns16550_platdata beagle_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
beagle_x15_emif1_ddr3_532mhz_emif_regs	board/ti/am57xx/board.c	/^static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {$/;"	v	typeref:typename:const struct emif_regs	file:
beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs	board/ti/am57xx/board.c	/^static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = {$/;"	v	typeref:typename:const u32[]	file:
beagle_x15_emif2_ddr3_532mhz_emif_regs	board/ti/am57xx/board.c	/^static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {$/;"	v	typeref:typename:const struct emif_regs	file:
beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs	board/ti/am57xx/board.c	/^static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {$/;"	v	typeref:typename:const u32[]	file:
beagle_x15_lisa_regs	board/ti/am57xx/board.c	/^static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs	file:
beagle_x15_volts	board/ti/am57xx/board.c	/^struct vcores_data beagle_x15_volts = {$/;"	v	typeref:struct:vcores_data
beb_rsvd_level	drivers/mtd/ubi/ubi.h	/^	int beb_rsvd_level;$/;"	m	struct:ubi_device	typeref:typename:int
beb_rsvd_pebs	drivers/mtd/ubi/ubi.h	/^	int beb_rsvd_pebs;$/;"	m	struct:ubi_device	typeref:typename:int
bedbug405_break_isr	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^void bedbug405_break_isr (struct pt_regs *regs)$/;"	f	typeref:typename:void
bedbug405_clear	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^int bedbug405_clear (int which_bp)$/;"	f	typeref:typename:int
bedbug405_do_break	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void
bedbug405_find_empty	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^int bedbug405_find_empty (void)$/;"	f	typeref:typename:int
bedbug405_init	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^void bedbug405_init (void)$/;"	f	typeref:typename:void
bedbug405_set	arch/powerpc/cpu/ppc4xx/bedbug_405.c	/^int bedbug405_set (int which_bp, unsigned long addr)$/;"	f	typeref:typename:int
bedbug603e_break_isr	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^void bedbug603e_break_isr( struct pt_regs *regs )$/;"	f	typeref:typename:void
bedbug603e_clear	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^int bedbug603e_clear( int which_bp )$/;"	f	typeref:typename:int
bedbug603e_do_break	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:void
bedbug603e_find_empty	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^int bedbug603e_find_empty( void )$/;"	f	typeref:typename:int
bedbug603e_init	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^void bedbug603e_init( void )$/;"	f	typeref:typename:void
bedbug603e_set	arch/powerpc/cpu/mpc8260/bedbug_603e.c	/^int bedbug603e_set( int which_bp, unsigned long addr )$/;"	f	typeref:typename:int
bedbug860_break_isr	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^void bedbug860_break_isr( struct pt_regs *regs )$/;"	f	typeref:typename:void
bedbug860_clear	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^int bedbug860_clear( int which_bp )$/;"	f	typeref:typename:int
bedbug860_do_break	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:void
bedbug860_find_empty	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^int bedbug860_find_empty( void )$/;"	f	typeref:typename:int
bedbug860_init	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^void bedbug860_init( void )$/;"	f	typeref:typename:void
bedbug860_set	arch/powerpc/cpu/mpc8xx/bedbug_860.c	/^int bedbug860_set( int which_bp, unsigned long addr )$/;"	f	typeref:typename:int
bedbug_init	cmd/bedbug.c	/^void bedbug_init (void)$/;"	f	typeref:typename:void
bedbug_main_loop	cmd/bedbug.c	/^void bedbug_main_loop (unsigned long addr, struct pt_regs *regs)$/;"	f	typeref:typename:void
bedbug_puts	cmd/bedbug.c	/^int bedbug_puts (const char *str)$/;"	f	typeref:typename:int
before_calling_rom___pu_irom_hwcnfg_setup	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^before_calling_rom___pu_irom_hwcnfg_setup:$/;"	l
before_calling_rom___pu_irom_hwcnfg_setup	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^before_calling_rom___pu_irom_hwcnfg_setup:$/;"	l
before_probe	drivers/usb/eth/usb_ether.c	/^	usb_eth_before_probe	before_probe; \/* optional *\/$/;"	m	struct:usb_eth_prob_dev	typeref:typename:usb_eth_before_probe	file:
begin	drivers/video/console_truetype.c	/^	u8 *begin;$/;"	m	struct:font_info	typeref:typename:u8 *	file:
begin	include/sh_pfc.h	/^	pinmux_enum_t begin;$/;"	m	struct:pinmux_range	typeref:typename:pinmux_enum_t
begin_reached	scripts/kconfig/lxdialog/textbox.c	/^static int begin_reached, end_reached, page_length;$/;"	v	typeref:typename:int	file:
being_created	fs/yaffs2/yaffs_guts.h	/^	u8 being_created:1;	\/* This object is still being created$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
bepi	arch/powerpc/include/asm/mmu.h	/^	unsigned long bepi:15;	\/* Effective page index (virtual address) *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:15
bepi	arch/powerpc/include/asm/mmu.h	/^	unsigned long long bepi:47;$/;"	m	struct:_BATU	typeref:typename:unsigned long long:47
bf	lib/tiny-printf.c	/^	char *bf;	\/* Digit buffer *\/$/;"	m	struct:printf_info	typeref:typename:char *	file:
bf_cfg_sel_20b	drivers/phy/marvell/comphy_a3700.h	/^#define bf_cfg_sel_20b	/;"	d
bf_mode_refdiv	drivers/phy/marvell/comphy_a3700.h	/^#define bf_mode_refdiv	/;"	d
bf_sel_bits_pcie_force	drivers/phy/marvell/comphy_a3700.h	/^#define bf_sel_bits_pcie_force	/;"	d
bf_soft_rst	drivers/phy/marvell/comphy_a3700.h	/^#define bf_soft_rst	/;"	d
bf_spread_spectrum_clock_en	drivers/phy/marvell/comphy_a3700.h	/^#define bf_spread_spectrum_clock_en	/;"	d
bf_use_max_pll_rate	drivers/phy/marvell/comphy_a3700.h	/^#define bf_use_max_pll_rate	/;"	d
bfc	arch/arm/mach-at91/include/mach/at91_mc.h	/^	at91_bfc_t	bfc;		\/* 0xC0 BFC User Interface *\/$/;"	m	struct:at91_mc	typeref:typename:at91_bfc_t
bfgencr	drivers/spi/fsl_qspi.h	/^	u32 bfgencr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
bfin_EMAC_halt	drivers/net/bfin_mac.c	/^static void bfin_EMAC_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
bfin_EMAC_init	drivers/net/bfin_mac.c	/^static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
bfin_EMAC_initialize	board/cm-bf537e/cm-bf537e.c	/^# define bfin_EMAC_initialize(/;"	d	file:
bfin_EMAC_initialize	board/cm-bf537u/cm-bf537u.c	/^# define bfin_EMAC_initialize(/;"	d	file:
bfin_EMAC_initialize	board/tcm-bf537/tcm-bf537.c	/^# define bfin_EMAC_initialize(/;"	d	file:
bfin_EMAC_initialize	drivers/net/bfin_mac.c	/^int bfin_EMAC_initialize(bd_t *bis)$/;"	f	typeref:typename:int
bfin_EMAC_recv	drivers/net/bfin_mac.c	/^static int bfin_EMAC_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
bfin_EMAC_send	drivers/net/bfin_mac.c	/^static int bfin_EMAC_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
bfin_EMAC_setup_addr	drivers/net/bfin_mac.c	/^static int bfin_EMAC_setup_addr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
bfin_anomaly_init	drivers/usb/musb/blackfin_usb.c	/^static void bfin_anomaly_init(void)$/;"	f	typeref:typename:void	file:
bfin_ata_busy_sleep	drivers/block/pata_bfin.c	/^static int bfin_ata_busy_sleep(struct ata_port *ap,$/;"	f	typeref:typename:int	file:
bfin_ata_busy_wait	drivers/block/pata_bfin.c	/^static inline u8 bfin_ata_busy_wait(struct ata_port *ap, unsigned int bits,$/;"	f	typeref:typename:u8	file:
bfin_ata_identify	drivers/block/pata_bfin.c	/^static void bfin_ata_identify(struct ata_port *ap, int dev)$/;"	f	typeref:typename:void	file:
bfin_ata_probe_port	drivers/block/pata_bfin.c	/^static int bfin_ata_probe_port(struct ata_port *ap)$/;"	f	typeref:typename:int	file:
bfin_ata_reset_port	drivers/block/pata_bfin.c	/^static int bfin_ata_reset_port(struct ata_port *ap)$/;"	f	typeref:typename:int	file:
bfin_ata_set_Feature_cmd	drivers/block/pata_bfin.c	/^static void bfin_ata_set_Feature_cmd(struct ata_port *ap, int dev)$/;"	f	typeref:typename:void	file:
bfin_bus_post_reset	drivers/block/pata_bfin.c	/^static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask)$/;"	f	typeref:typename:void	file:
bfin_bus_softreset	drivers/block/pata_bfin.c	/^static unsigned int bfin_bus_softreset(struct ata_port *ap,$/;"	f	typeref:typename:unsigned int	file:
bfin_check_altstatus	drivers/block/pata_bfin.c	/^static u8 bfin_check_altstatus(struct ata_port *ap)$/;"	f	typeref:typename:u8	file:
bfin_check_status	drivers/block/pata_bfin.c	/^static u8 bfin_check_status(struct ata_port *ap)$/;"	f	typeref:typename:u8	file:
bfin_config_atapi_gpio	drivers/block/pata_bfin.c	/^static int bfin_config_atapi_gpio(struct ata_port *ap)$/;"	f	typeref:typename:int	file:
bfin_core1_start	arch/blackfin/cpu/cpu.c	/^void bfin_core1_start(void)$/;"	f	typeref:typename:void
bfin_dev_select	drivers/block/pata_bfin.c	/^static void bfin_dev_select(struct ata_port *ap, unsigned int device)$/;"	f	typeref:typename:void	file:
bfin_devchk	drivers/block/pata_bfin.c	/^static unsigned int bfin_devchk(struct ata_port *ap,$/;"	f	typeref:typename:unsigned int	file:
bfin_dump	arch/blackfin/cpu/traps.c	/^void bfin_dump(struct pt_regs *regs)$/;"	f	typeref:typename:void
bfin_irq_clear	drivers/block/pata_bfin.c	/^static void bfin_irq_clear(struct ata_port *ap)$/;"	f	typeref:typename:void	file:
bfin_jtag_initialize	arch/blackfin/cpu/jtag-console.c	/^void bfin_jtag_initialize(void)$/;"	f	typeref:typename:void
bfin_logo	arch/blackfin/include/asm/bfin_logo_230x230_gzip.h	/^fastimage_t bfin_logo = {$/;"	v	typeref:typename:fastimage_t
bfin_logo	arch/blackfin/include/asm/bfin_logo_230x230_lzma.h	/^fastimage_t bfin_logo = {$/;"	v	typeref:typename:fastimage_t
bfin_logo	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_gzip.h	/^fastimage_t bfin_logo = {$/;"	v	typeref:typename:fastimage_t
bfin_logo	arch/blackfin/include/asm/bfin_logo_rgb565_230x230_lzma.h	/^fastimage_t bfin_logo = {$/;"	v	typeref:typename:fastimage_t
bfin_memory_map	arch/blackfin/cpu/traps.c	/^const struct memory_map const bfin_memory_map[] = {$/;"	v	typeref:typename:const struct memory_map const[]
bfin_miiphy_init	drivers/net/bfin_mac.c	/^static int bfin_miiphy_init(struct eth_device *dev, int *opmode)$/;"	f	typeref:typename:int	file:
bfin_miiphy_read	drivers/net/bfin_mac.c	/^static int bfin_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
bfin_miiphy_wait	drivers/net/bfin_mac.c	/^static int bfin_miiphy_wait(void)$/;"	f	typeref:typename:int	file:
bfin_miiphy_write	drivers/net/bfin_mac.c	/^static int bfin_miiphy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
bfin_mmc_cfg	drivers/mmc/bfin_sdh.c	/^static struct mmc_config bfin_mmc_cfg = {$/;"	v	typeref:struct:mmc_config	file:
bfin_mmc_init	drivers/mmc/bfin_sdh.c	/^int bfin_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
bfin_mmc_ops	drivers/mmc/bfin_sdh.c	/^static const struct mmc_ops bfin_mmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
bfin_mmr_serial	arch/blackfin/include/asm/serial1.h	/^struct bfin_mmr_serial {$/;"	s
bfin_mmr_serial	arch/blackfin/include/asm/serial4.h	/^struct bfin_mmr_serial {$/;"	s
bfin_musb_dma_regs	drivers/usb/musb/blackfin_usb.h	/^struct bfin_musb_dma_regs {$/;"	s
bfin_nfc_calculate_ecc	drivers/mtd/nand/bfin_nand.c	/^static int bfin_nfc_calculate_ecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
bfin_nfc_cmd_ctrl	drivers/mtd/nand/bfin_nand.c	/^static void bfin_nfc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
bfin_nfc_correct_data	drivers/mtd/nand/bfin_nand.c	/^static int bfin_nfc_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
bfin_nfc_correct_data_256	drivers/mtd/nand/bfin_nand.c	/^static int bfin_nfc_correct_data_256(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
bfin_nfc_devready	drivers/mtd/nand/bfin_nand.c	/^static int bfin_nfc_devready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
bfin_nfc_enable_hwecc	drivers/mtd/nand/bfin_nand.c	/^static void bfin_nfc_enable_hwecc(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void	file:
bfin_nfc_read_buf	drivers/mtd/nand/bfin_nand.c	/^static void bfin_nfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
bfin_nfc_read_byte	drivers/mtd/nand/bfin_nand.c	/^static uint8_t bfin_nfc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
bfin_nfc_write_buf	drivers/mtd/nand/bfin_nand.c	/^static void bfin_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
bfin_os_log_check	arch/blackfin/cpu/os_log.c	/^int bfin_os_log_check(void)$/;"	f	typeref:typename:int
bfin_os_log_dump	arch/blackfin/cpu/os_log.c	/^void bfin_os_log_dump(void)$/;"	f	typeref:typename:void
bfin_panic	arch/blackfin/cpu/traps.c	/^void bfin_panic(struct pt_regs *regs)$/;"	f	typeref:typename:void
bfin_poweron_retx	arch/blackfin/cpu/cpu.c	/^ulong bfin_poweron_retx;$/;"	v	typeref:typename:ulong
bfin_read	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_read(/;"	d
bfin_read16	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_read16(/;"	d
bfin_read32	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_read32(/;"	d
bfin_read8	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_read8(/;"	d
bfin_readPTR	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_readPTR(/;"	d
bfin_read_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_CONTROL(/;"	d
bfin_read_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_CONTROL(/;"	d
bfin_read_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_CONTROL(/;"	d
bfin_read_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_CONTROL(/;"	d
bfin_read_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_ADDR(/;"	d
bfin_read_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_ADDR(/;"	d
bfin_read_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_ADDR(/;"	d
bfin_read_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_ADDR(/;"	d
bfin_read_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_RXBUF(/;"	d
bfin_read_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_RXBUF(/;"	d
bfin_read_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_RXBUF(/;"	d
bfin_read_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_RXBUF(/;"	d
bfin_read_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_TXBUF(/;"	d
bfin_read_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_TXBUF(/;"	d
bfin_read_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_TXBUF(/;"	d
bfin_read_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_DEV_TXBUF(/;"	d
bfin_read_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_DMA_TFRCNT(/;"	d
bfin_read_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_DMA_TFRCNT(/;"	d
bfin_read_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_DMA_TFRCNT(/;"	d
bfin_read_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_DMA_TFRCNT(/;"	d
bfin_read_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_INT_MASK(/;"	d
bfin_read_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_INT_MASK(/;"	d
bfin_read_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_INT_MASK(/;"	d
bfin_read_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_INT_MASK(/;"	d
bfin_read_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_INT_STATUS(/;"	d
bfin_read_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_INT_STATUS(/;"	d
bfin_read_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_INT_STATUS(/;"	d
bfin_read_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_INT_STATUS(/;"	d
bfin_read_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_LINE_STATUS(/;"	d
bfin_read_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_LINE_STATUS(/;"	d
bfin_read_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_LINE_STATUS(/;"	d
bfin_read_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_LINE_STATUS(/;"	d
bfin_read_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_0(/;"	d
bfin_read_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_0(/;"	d
bfin_read_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_0(/;"	d
bfin_read_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_0(/;"	d
bfin_read_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_1(/;"	d
bfin_read_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_1(/;"	d
bfin_read_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_1(/;"	d
bfin_read_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_1(/;"	d
bfin_read_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_2(/;"	d
bfin_read_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_2(/;"	d
bfin_read_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_2(/;"	d
bfin_read_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_MULTI_TIM_2(/;"	d
bfin_read_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TFRCNT(/;"	d
bfin_read_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TFRCNT(/;"	d
bfin_read_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TFRCNT(/;"	d
bfin_read_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TFRCNT(/;"	d
bfin_read_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_0(/;"	d
bfin_read_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_0(/;"	d
bfin_read_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_0(/;"	d
bfin_read_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_0(/;"	d
bfin_read_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_1(/;"	d
bfin_read_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_1(/;"	d
bfin_read_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_1(/;"	d
bfin_read_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_PIO_TIM_1(/;"	d
bfin_read_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_REG_TIM_0(/;"	d
bfin_read_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_REG_TIM_0(/;"	d
bfin_read_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_REG_TIM_0(/;"	d
bfin_read_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_REG_TIM_0(/;"	d
bfin_read_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_SM_STATE(/;"	d
bfin_read_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_SM_STATE(/;"	d
bfin_read_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_SM_STATE(/;"	d
bfin_read_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_SM_STATE(/;"	d
bfin_read_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_STATUS(/;"	d
bfin_read_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_STATUS(/;"	d
bfin_read_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_STATUS(/;"	d
bfin_read_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_STATUS(/;"	d
bfin_read_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_TERMINATE(/;"	d
bfin_read_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_TERMINATE(/;"	d
bfin_read_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_TERMINATE(/;"	d
bfin_read_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_TERMINATE(/;"	d
bfin_read_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_read_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_read_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_read_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_read_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_0(/;"	d
bfin_read_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_0(/;"	d
bfin_read_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_0(/;"	d
bfin_read_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_0(/;"	d
bfin_read_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_1(/;"	d
bfin_read_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_1(/;"	d
bfin_read_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_1(/;"	d
bfin_read_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_1(/;"	d
bfin_read_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_2(/;"	d
bfin_read_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_2(/;"	d
bfin_read_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_2(/;"	d
bfin_read_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_2(/;"	d
bfin_read_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_3(/;"	d
bfin_read_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_3(/;"	d
bfin_read_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_3(/;"	d
bfin_read_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_ULTRA_TIM_3(/;"	d
bfin_read_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_read_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_read_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_read_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_read_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_ATAPI_XFER_LEN(/;"	d
bfin_read_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_ATAPI_XFER_LEN(/;"	d
bfin_read_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_ATAPI_XFER_LEN(/;"	d
bfin_read_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_ATAPI_XFER_LEN(/;"	d
bfin_read_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AA1(/;"	d
bfin_read_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AA1(/;"	d
bfin_read_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AA1(/;"	d
bfin_read_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AA1(/;"	d
bfin_read_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AA2(/;"	d
bfin_read_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AA2(/;"	d
bfin_read_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AA2(/;"	d
bfin_read_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AA2(/;"	d
bfin_read_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM00H(/;"	d
bfin_read_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM00H(/;"	d
bfin_read_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM00H(/;"	d
bfin_read_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM00H(/;"	d
bfin_read_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM00L(/;"	d
bfin_read_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM00L(/;"	d
bfin_read_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM00L(/;"	d
bfin_read_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM00L(/;"	d
bfin_read_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM01H(/;"	d
bfin_read_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM01H(/;"	d
bfin_read_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM01H(/;"	d
bfin_read_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM01H(/;"	d
bfin_read_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM01L(/;"	d
bfin_read_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM01L(/;"	d
bfin_read_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM01L(/;"	d
bfin_read_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM01L(/;"	d
bfin_read_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM02H(/;"	d
bfin_read_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM02H(/;"	d
bfin_read_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM02H(/;"	d
bfin_read_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM02H(/;"	d
bfin_read_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM02L(/;"	d
bfin_read_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM02L(/;"	d
bfin_read_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM02L(/;"	d
bfin_read_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM02L(/;"	d
bfin_read_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM03H(/;"	d
bfin_read_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM03H(/;"	d
bfin_read_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM03H(/;"	d
bfin_read_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM03H(/;"	d
bfin_read_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM03L(/;"	d
bfin_read_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM03L(/;"	d
bfin_read_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM03L(/;"	d
bfin_read_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM03L(/;"	d
bfin_read_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM04H(/;"	d
bfin_read_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM04H(/;"	d
bfin_read_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM04H(/;"	d
bfin_read_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM04H(/;"	d
bfin_read_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM04L(/;"	d
bfin_read_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM04L(/;"	d
bfin_read_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM04L(/;"	d
bfin_read_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM04L(/;"	d
bfin_read_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM05H(/;"	d
bfin_read_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM05H(/;"	d
bfin_read_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM05H(/;"	d
bfin_read_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM05H(/;"	d
bfin_read_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM05L(/;"	d
bfin_read_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM05L(/;"	d
bfin_read_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM05L(/;"	d
bfin_read_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM05L(/;"	d
bfin_read_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM06H(/;"	d
bfin_read_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM06H(/;"	d
bfin_read_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM06H(/;"	d
bfin_read_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM06H(/;"	d
bfin_read_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM06L(/;"	d
bfin_read_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM06L(/;"	d
bfin_read_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM06L(/;"	d
bfin_read_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM06L(/;"	d
bfin_read_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM07H(/;"	d
bfin_read_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM07H(/;"	d
bfin_read_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM07H(/;"	d
bfin_read_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM07H(/;"	d
bfin_read_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM07L(/;"	d
bfin_read_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM07L(/;"	d
bfin_read_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM07L(/;"	d
bfin_read_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM07L(/;"	d
bfin_read_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM08H(/;"	d
bfin_read_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM08H(/;"	d
bfin_read_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM08H(/;"	d
bfin_read_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM08H(/;"	d
bfin_read_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM08L(/;"	d
bfin_read_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM08L(/;"	d
bfin_read_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM08L(/;"	d
bfin_read_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM08L(/;"	d
bfin_read_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM09H(/;"	d
bfin_read_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM09H(/;"	d
bfin_read_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM09H(/;"	d
bfin_read_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM09H(/;"	d
bfin_read_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM09L(/;"	d
bfin_read_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM09L(/;"	d
bfin_read_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM09L(/;"	d
bfin_read_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM09L(/;"	d
bfin_read_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM10H(/;"	d
bfin_read_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM10H(/;"	d
bfin_read_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM10H(/;"	d
bfin_read_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM10H(/;"	d
bfin_read_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM10L(/;"	d
bfin_read_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM10L(/;"	d
bfin_read_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM10L(/;"	d
bfin_read_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM10L(/;"	d
bfin_read_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM11H(/;"	d
bfin_read_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM11H(/;"	d
bfin_read_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM11H(/;"	d
bfin_read_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM11H(/;"	d
bfin_read_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM11L(/;"	d
bfin_read_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM11L(/;"	d
bfin_read_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM11L(/;"	d
bfin_read_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM11L(/;"	d
bfin_read_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM12H(/;"	d
bfin_read_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM12H(/;"	d
bfin_read_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM12H(/;"	d
bfin_read_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM12H(/;"	d
bfin_read_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM12L(/;"	d
bfin_read_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM12L(/;"	d
bfin_read_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM12L(/;"	d
bfin_read_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM12L(/;"	d
bfin_read_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM13H(/;"	d
bfin_read_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM13H(/;"	d
bfin_read_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM13H(/;"	d
bfin_read_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM13H(/;"	d
bfin_read_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM13L(/;"	d
bfin_read_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM13L(/;"	d
bfin_read_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM13L(/;"	d
bfin_read_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM13L(/;"	d
bfin_read_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM14H(/;"	d
bfin_read_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM14H(/;"	d
bfin_read_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM14H(/;"	d
bfin_read_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM14H(/;"	d
bfin_read_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM14L(/;"	d
bfin_read_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM14L(/;"	d
bfin_read_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM14L(/;"	d
bfin_read_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM14L(/;"	d
bfin_read_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM15H(/;"	d
bfin_read_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM15H(/;"	d
bfin_read_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM15H(/;"	d
bfin_read_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM15H(/;"	d
bfin_read_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM15L(/;"	d
bfin_read_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM15L(/;"	d
bfin_read_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM15L(/;"	d
bfin_read_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM15L(/;"	d
bfin_read_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM16H(/;"	d
bfin_read_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM16H(/;"	d
bfin_read_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM16H(/;"	d
bfin_read_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM16H(/;"	d
bfin_read_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM16L(/;"	d
bfin_read_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM16L(/;"	d
bfin_read_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM16L(/;"	d
bfin_read_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM16L(/;"	d
bfin_read_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM17H(/;"	d
bfin_read_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM17H(/;"	d
bfin_read_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM17H(/;"	d
bfin_read_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM17H(/;"	d
bfin_read_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM17L(/;"	d
bfin_read_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM17L(/;"	d
bfin_read_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM17L(/;"	d
bfin_read_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM17L(/;"	d
bfin_read_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM18H(/;"	d
bfin_read_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM18H(/;"	d
bfin_read_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM18H(/;"	d
bfin_read_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM18H(/;"	d
bfin_read_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM18L(/;"	d
bfin_read_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM18L(/;"	d
bfin_read_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM18L(/;"	d
bfin_read_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM18L(/;"	d
bfin_read_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM19H(/;"	d
bfin_read_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM19H(/;"	d
bfin_read_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM19H(/;"	d
bfin_read_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM19H(/;"	d
bfin_read_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM19L(/;"	d
bfin_read_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM19L(/;"	d
bfin_read_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM19L(/;"	d
bfin_read_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM19L(/;"	d
bfin_read_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM20H(/;"	d
bfin_read_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM20H(/;"	d
bfin_read_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM20H(/;"	d
bfin_read_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM20H(/;"	d
bfin_read_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM20L(/;"	d
bfin_read_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM20L(/;"	d
bfin_read_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM20L(/;"	d
bfin_read_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM20L(/;"	d
bfin_read_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM21H(/;"	d
bfin_read_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM21H(/;"	d
bfin_read_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM21H(/;"	d
bfin_read_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM21H(/;"	d
bfin_read_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM21L(/;"	d
bfin_read_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM21L(/;"	d
bfin_read_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM21L(/;"	d
bfin_read_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM21L(/;"	d
bfin_read_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM22H(/;"	d
bfin_read_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM22H(/;"	d
bfin_read_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM22H(/;"	d
bfin_read_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM22H(/;"	d
bfin_read_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM22L(/;"	d
bfin_read_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM22L(/;"	d
bfin_read_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM22L(/;"	d
bfin_read_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM22L(/;"	d
bfin_read_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM23H(/;"	d
bfin_read_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM23H(/;"	d
bfin_read_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM23H(/;"	d
bfin_read_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM23H(/;"	d
bfin_read_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM23L(/;"	d
bfin_read_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM23L(/;"	d
bfin_read_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM23L(/;"	d
bfin_read_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM23L(/;"	d
bfin_read_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM24H(/;"	d
bfin_read_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM24H(/;"	d
bfin_read_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM24H(/;"	d
bfin_read_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM24H(/;"	d
bfin_read_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM24L(/;"	d
bfin_read_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM24L(/;"	d
bfin_read_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM24L(/;"	d
bfin_read_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM24L(/;"	d
bfin_read_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM25H(/;"	d
bfin_read_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM25H(/;"	d
bfin_read_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM25H(/;"	d
bfin_read_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM25H(/;"	d
bfin_read_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM25L(/;"	d
bfin_read_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM25L(/;"	d
bfin_read_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM25L(/;"	d
bfin_read_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM25L(/;"	d
bfin_read_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM26H(/;"	d
bfin_read_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM26H(/;"	d
bfin_read_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM26H(/;"	d
bfin_read_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM26H(/;"	d
bfin_read_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM26L(/;"	d
bfin_read_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM26L(/;"	d
bfin_read_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM26L(/;"	d
bfin_read_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM26L(/;"	d
bfin_read_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM27H(/;"	d
bfin_read_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM27H(/;"	d
bfin_read_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM27H(/;"	d
bfin_read_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM27H(/;"	d
bfin_read_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM27L(/;"	d
bfin_read_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM27L(/;"	d
bfin_read_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM27L(/;"	d
bfin_read_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM27L(/;"	d
bfin_read_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM28H(/;"	d
bfin_read_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM28H(/;"	d
bfin_read_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM28H(/;"	d
bfin_read_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM28H(/;"	d
bfin_read_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM28L(/;"	d
bfin_read_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM28L(/;"	d
bfin_read_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM28L(/;"	d
bfin_read_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM28L(/;"	d
bfin_read_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM29H(/;"	d
bfin_read_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM29H(/;"	d
bfin_read_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM29H(/;"	d
bfin_read_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM29H(/;"	d
bfin_read_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM29L(/;"	d
bfin_read_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM29L(/;"	d
bfin_read_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM29L(/;"	d
bfin_read_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM29L(/;"	d
bfin_read_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM30H(/;"	d
bfin_read_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM30H(/;"	d
bfin_read_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM30H(/;"	d
bfin_read_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM30H(/;"	d
bfin_read_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM30L(/;"	d
bfin_read_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM30L(/;"	d
bfin_read_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM30L(/;"	d
bfin_read_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM30L(/;"	d
bfin_read_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM31H(/;"	d
bfin_read_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM31H(/;"	d
bfin_read_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM31H(/;"	d
bfin_read_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM31H(/;"	d
bfin_read_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_AM31L(/;"	d
bfin_read_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_AM31L(/;"	d
bfin_read_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_AM31L(/;"	d
bfin_read_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_AM31L(/;"	d
bfin_read_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_CEC(/;"	d
bfin_read_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_CEC(/;"	d
bfin_read_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_CEC(/;"	d
bfin_read_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_CEC(/;"	d
bfin_read_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_CLOCK(/;"	d
bfin_read_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_CLOCK(/;"	d
bfin_read_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_CLOCK(/;"	d
bfin_read_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_CLOCK(/;"	d
bfin_read_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_CONTROL(/;"	d
bfin_read_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_CONTROL(/;"	d
bfin_read_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_CONTROL(/;"	d
bfin_read_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_CONTROL(/;"	d
bfin_read_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_DEBUG(/;"	d
bfin_read_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_DEBUG(/;"	d
bfin_read_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_DEBUG(/;"	d
bfin_read_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_DEBUG(/;"	d
bfin_read_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_ESR(/;"	d
bfin_read_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_ESR(/;"	d
bfin_read_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_ESR(/;"	d
bfin_read_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_ESR(/;"	d
bfin_read_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_EWR(/;"	d
bfin_read_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_EWR(/;"	d
bfin_read_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_EWR(/;"	d
bfin_read_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_EWR(/;"	d
bfin_read_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_GIF(/;"	d
bfin_read_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_GIF(/;"	d
bfin_read_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_GIF(/;"	d
bfin_read_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_GIF(/;"	d
bfin_read_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_GIM(/;"	d
bfin_read_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_GIM(/;"	d
bfin_read_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_GIM(/;"	d
bfin_read_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_GIM(/;"	d
bfin_read_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_GIS(/;"	d
bfin_read_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_GIS(/;"	d
bfin_read_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_GIS(/;"	d
bfin_read_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_GIS(/;"	d
bfin_read_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_INTR(/;"	d
bfin_read_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_INTR(/;"	d
bfin_read_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_INTR(/;"	d
bfin_read_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_INTR(/;"	d
bfin_read_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA0(/;"	d
bfin_read_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA0(/;"	d
bfin_read_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA0(/;"	d
bfin_read_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA0(/;"	d
bfin_read_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA1(/;"	d
bfin_read_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA1(/;"	d
bfin_read_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA1(/;"	d
bfin_read_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA1(/;"	d
bfin_read_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA2(/;"	d
bfin_read_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA2(/;"	d
bfin_read_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA2(/;"	d
bfin_read_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA2(/;"	d
bfin_read_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA3(/;"	d
bfin_read_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA3(/;"	d
bfin_read_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA3(/;"	d
bfin_read_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_DATA3(/;"	d
bfin_read_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID0(/;"	d
bfin_read_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID0(/;"	d
bfin_read_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID0(/;"	d
bfin_read_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID0(/;"	d
bfin_read_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID1(/;"	d
bfin_read_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID1(/;"	d
bfin_read_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID1(/;"	d
bfin_read_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_ID1(/;"	d
bfin_read_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_LENGTH(/;"	d
bfin_read_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_LENGTH(/;"	d
bfin_read_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_LENGTH(/;"	d
bfin_read_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_LENGTH(/;"	d
bfin_read_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB00_TIMESTAMP(/;"	d
bfin_read_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB00_TIMESTAMP(/;"	d
bfin_read_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB00_TIMESTAMP(/;"	d
bfin_read_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB00_TIMESTAMP(/;"	d
bfin_read_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA0(/;"	d
bfin_read_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA0(/;"	d
bfin_read_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA0(/;"	d
bfin_read_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA0(/;"	d
bfin_read_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA1(/;"	d
bfin_read_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA1(/;"	d
bfin_read_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA1(/;"	d
bfin_read_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA1(/;"	d
bfin_read_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA2(/;"	d
bfin_read_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA2(/;"	d
bfin_read_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA2(/;"	d
bfin_read_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA2(/;"	d
bfin_read_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA3(/;"	d
bfin_read_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA3(/;"	d
bfin_read_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA3(/;"	d
bfin_read_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_DATA3(/;"	d
bfin_read_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID0(/;"	d
bfin_read_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID0(/;"	d
bfin_read_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID0(/;"	d
bfin_read_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID0(/;"	d
bfin_read_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID1(/;"	d
bfin_read_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID1(/;"	d
bfin_read_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID1(/;"	d
bfin_read_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_ID1(/;"	d
bfin_read_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_LENGTH(/;"	d
bfin_read_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_LENGTH(/;"	d
bfin_read_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_LENGTH(/;"	d
bfin_read_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_LENGTH(/;"	d
bfin_read_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB01_TIMESTAMP(/;"	d
bfin_read_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB01_TIMESTAMP(/;"	d
bfin_read_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB01_TIMESTAMP(/;"	d
bfin_read_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB01_TIMESTAMP(/;"	d
bfin_read_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA0(/;"	d
bfin_read_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA0(/;"	d
bfin_read_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA0(/;"	d
bfin_read_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA0(/;"	d
bfin_read_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA1(/;"	d
bfin_read_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA1(/;"	d
bfin_read_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA1(/;"	d
bfin_read_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA1(/;"	d
bfin_read_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA2(/;"	d
bfin_read_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA2(/;"	d
bfin_read_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA2(/;"	d
bfin_read_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA2(/;"	d
bfin_read_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA3(/;"	d
bfin_read_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA3(/;"	d
bfin_read_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA3(/;"	d
bfin_read_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_DATA3(/;"	d
bfin_read_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID0(/;"	d
bfin_read_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID0(/;"	d
bfin_read_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID0(/;"	d
bfin_read_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID0(/;"	d
bfin_read_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID1(/;"	d
bfin_read_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID1(/;"	d
bfin_read_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID1(/;"	d
bfin_read_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_ID1(/;"	d
bfin_read_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_LENGTH(/;"	d
bfin_read_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_LENGTH(/;"	d
bfin_read_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_LENGTH(/;"	d
bfin_read_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_LENGTH(/;"	d
bfin_read_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB02_TIMESTAMP(/;"	d
bfin_read_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB02_TIMESTAMP(/;"	d
bfin_read_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB02_TIMESTAMP(/;"	d
bfin_read_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB02_TIMESTAMP(/;"	d
bfin_read_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA0(/;"	d
bfin_read_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA0(/;"	d
bfin_read_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA0(/;"	d
bfin_read_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA0(/;"	d
bfin_read_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA1(/;"	d
bfin_read_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA1(/;"	d
bfin_read_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA1(/;"	d
bfin_read_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA1(/;"	d
bfin_read_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA2(/;"	d
bfin_read_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA2(/;"	d
bfin_read_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA2(/;"	d
bfin_read_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA2(/;"	d
bfin_read_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA3(/;"	d
bfin_read_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA3(/;"	d
bfin_read_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA3(/;"	d
bfin_read_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_DATA3(/;"	d
bfin_read_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID0(/;"	d
bfin_read_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID0(/;"	d
bfin_read_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID0(/;"	d
bfin_read_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID0(/;"	d
bfin_read_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID1(/;"	d
bfin_read_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID1(/;"	d
bfin_read_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID1(/;"	d
bfin_read_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_ID1(/;"	d
bfin_read_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_LENGTH(/;"	d
bfin_read_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_LENGTH(/;"	d
bfin_read_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_LENGTH(/;"	d
bfin_read_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_LENGTH(/;"	d
bfin_read_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB03_TIMESTAMP(/;"	d
bfin_read_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB03_TIMESTAMP(/;"	d
bfin_read_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB03_TIMESTAMP(/;"	d
bfin_read_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB03_TIMESTAMP(/;"	d
bfin_read_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA0(/;"	d
bfin_read_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA0(/;"	d
bfin_read_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA0(/;"	d
bfin_read_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA0(/;"	d
bfin_read_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA1(/;"	d
bfin_read_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA1(/;"	d
bfin_read_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA1(/;"	d
bfin_read_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA1(/;"	d
bfin_read_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA2(/;"	d
bfin_read_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA2(/;"	d
bfin_read_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA2(/;"	d
bfin_read_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA2(/;"	d
bfin_read_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA3(/;"	d
bfin_read_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA3(/;"	d
bfin_read_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA3(/;"	d
bfin_read_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_DATA3(/;"	d
bfin_read_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID0(/;"	d
bfin_read_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID0(/;"	d
bfin_read_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID0(/;"	d
bfin_read_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID0(/;"	d
bfin_read_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID1(/;"	d
bfin_read_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID1(/;"	d
bfin_read_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID1(/;"	d
bfin_read_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_ID1(/;"	d
bfin_read_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_LENGTH(/;"	d
bfin_read_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_LENGTH(/;"	d
bfin_read_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_LENGTH(/;"	d
bfin_read_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_LENGTH(/;"	d
bfin_read_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB04_TIMESTAMP(/;"	d
bfin_read_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB04_TIMESTAMP(/;"	d
bfin_read_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB04_TIMESTAMP(/;"	d
bfin_read_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB04_TIMESTAMP(/;"	d
bfin_read_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA0(/;"	d
bfin_read_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA0(/;"	d
bfin_read_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA0(/;"	d
bfin_read_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA0(/;"	d
bfin_read_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA1(/;"	d
bfin_read_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA1(/;"	d
bfin_read_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA1(/;"	d
bfin_read_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA1(/;"	d
bfin_read_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA2(/;"	d
bfin_read_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA2(/;"	d
bfin_read_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA2(/;"	d
bfin_read_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA2(/;"	d
bfin_read_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA3(/;"	d
bfin_read_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA3(/;"	d
bfin_read_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA3(/;"	d
bfin_read_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_DATA3(/;"	d
bfin_read_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID0(/;"	d
bfin_read_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID0(/;"	d
bfin_read_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID0(/;"	d
bfin_read_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID0(/;"	d
bfin_read_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID1(/;"	d
bfin_read_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID1(/;"	d
bfin_read_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID1(/;"	d
bfin_read_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_ID1(/;"	d
bfin_read_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_LENGTH(/;"	d
bfin_read_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_LENGTH(/;"	d
bfin_read_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_LENGTH(/;"	d
bfin_read_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_LENGTH(/;"	d
bfin_read_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB05_TIMESTAMP(/;"	d
bfin_read_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB05_TIMESTAMP(/;"	d
bfin_read_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB05_TIMESTAMP(/;"	d
bfin_read_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB05_TIMESTAMP(/;"	d
bfin_read_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA0(/;"	d
bfin_read_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA0(/;"	d
bfin_read_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA0(/;"	d
bfin_read_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA0(/;"	d
bfin_read_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA1(/;"	d
bfin_read_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA1(/;"	d
bfin_read_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA1(/;"	d
bfin_read_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA1(/;"	d
bfin_read_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA2(/;"	d
bfin_read_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA2(/;"	d
bfin_read_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA2(/;"	d
bfin_read_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA2(/;"	d
bfin_read_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA3(/;"	d
bfin_read_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA3(/;"	d
bfin_read_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA3(/;"	d
bfin_read_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_DATA3(/;"	d
bfin_read_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID0(/;"	d
bfin_read_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID0(/;"	d
bfin_read_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID0(/;"	d
bfin_read_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID0(/;"	d
bfin_read_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID1(/;"	d
bfin_read_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID1(/;"	d
bfin_read_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID1(/;"	d
bfin_read_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_ID1(/;"	d
bfin_read_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_LENGTH(/;"	d
bfin_read_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_LENGTH(/;"	d
bfin_read_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_LENGTH(/;"	d
bfin_read_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_LENGTH(/;"	d
bfin_read_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB06_TIMESTAMP(/;"	d
bfin_read_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB06_TIMESTAMP(/;"	d
bfin_read_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB06_TIMESTAMP(/;"	d
bfin_read_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB06_TIMESTAMP(/;"	d
bfin_read_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA0(/;"	d
bfin_read_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA0(/;"	d
bfin_read_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA0(/;"	d
bfin_read_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA0(/;"	d
bfin_read_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA1(/;"	d
bfin_read_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA1(/;"	d
bfin_read_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA1(/;"	d
bfin_read_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA1(/;"	d
bfin_read_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA2(/;"	d
bfin_read_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA2(/;"	d
bfin_read_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA2(/;"	d
bfin_read_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA2(/;"	d
bfin_read_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA3(/;"	d
bfin_read_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA3(/;"	d
bfin_read_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA3(/;"	d
bfin_read_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_DATA3(/;"	d
bfin_read_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID0(/;"	d
bfin_read_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID0(/;"	d
bfin_read_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID0(/;"	d
bfin_read_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID0(/;"	d
bfin_read_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID1(/;"	d
bfin_read_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID1(/;"	d
bfin_read_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID1(/;"	d
bfin_read_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_ID1(/;"	d
bfin_read_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_LENGTH(/;"	d
bfin_read_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_LENGTH(/;"	d
bfin_read_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_LENGTH(/;"	d
bfin_read_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_LENGTH(/;"	d
bfin_read_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB07_TIMESTAMP(/;"	d
bfin_read_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB07_TIMESTAMP(/;"	d
bfin_read_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB07_TIMESTAMP(/;"	d
bfin_read_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB07_TIMESTAMP(/;"	d
bfin_read_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA0(/;"	d
bfin_read_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA0(/;"	d
bfin_read_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA0(/;"	d
bfin_read_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA0(/;"	d
bfin_read_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA1(/;"	d
bfin_read_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA1(/;"	d
bfin_read_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA1(/;"	d
bfin_read_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA1(/;"	d
bfin_read_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA2(/;"	d
bfin_read_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA2(/;"	d
bfin_read_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA2(/;"	d
bfin_read_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA2(/;"	d
bfin_read_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA3(/;"	d
bfin_read_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA3(/;"	d
bfin_read_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA3(/;"	d
bfin_read_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_DATA3(/;"	d
bfin_read_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID0(/;"	d
bfin_read_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID0(/;"	d
bfin_read_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID0(/;"	d
bfin_read_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID0(/;"	d
bfin_read_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID1(/;"	d
bfin_read_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID1(/;"	d
bfin_read_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID1(/;"	d
bfin_read_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_ID1(/;"	d
bfin_read_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_LENGTH(/;"	d
bfin_read_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_LENGTH(/;"	d
bfin_read_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_LENGTH(/;"	d
bfin_read_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_LENGTH(/;"	d
bfin_read_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB08_TIMESTAMP(/;"	d
bfin_read_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB08_TIMESTAMP(/;"	d
bfin_read_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB08_TIMESTAMP(/;"	d
bfin_read_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB08_TIMESTAMP(/;"	d
bfin_read_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA0(/;"	d
bfin_read_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA0(/;"	d
bfin_read_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA0(/;"	d
bfin_read_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA0(/;"	d
bfin_read_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA1(/;"	d
bfin_read_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA1(/;"	d
bfin_read_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA1(/;"	d
bfin_read_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA1(/;"	d
bfin_read_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA2(/;"	d
bfin_read_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA2(/;"	d
bfin_read_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA2(/;"	d
bfin_read_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA2(/;"	d
bfin_read_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA3(/;"	d
bfin_read_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA3(/;"	d
bfin_read_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA3(/;"	d
bfin_read_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_DATA3(/;"	d
bfin_read_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID0(/;"	d
bfin_read_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID0(/;"	d
bfin_read_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID0(/;"	d
bfin_read_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID0(/;"	d
bfin_read_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID1(/;"	d
bfin_read_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID1(/;"	d
bfin_read_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID1(/;"	d
bfin_read_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_ID1(/;"	d
bfin_read_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_LENGTH(/;"	d
bfin_read_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_LENGTH(/;"	d
bfin_read_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_LENGTH(/;"	d
bfin_read_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_LENGTH(/;"	d
bfin_read_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB09_TIMESTAMP(/;"	d
bfin_read_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB09_TIMESTAMP(/;"	d
bfin_read_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB09_TIMESTAMP(/;"	d
bfin_read_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB09_TIMESTAMP(/;"	d
bfin_read_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA0(/;"	d
bfin_read_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA0(/;"	d
bfin_read_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA0(/;"	d
bfin_read_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA0(/;"	d
bfin_read_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA1(/;"	d
bfin_read_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA1(/;"	d
bfin_read_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA1(/;"	d
bfin_read_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA1(/;"	d
bfin_read_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA2(/;"	d
bfin_read_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA2(/;"	d
bfin_read_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA2(/;"	d
bfin_read_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA2(/;"	d
bfin_read_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA3(/;"	d
bfin_read_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA3(/;"	d
bfin_read_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA3(/;"	d
bfin_read_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_DATA3(/;"	d
bfin_read_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID0(/;"	d
bfin_read_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID0(/;"	d
bfin_read_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID0(/;"	d
bfin_read_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID0(/;"	d
bfin_read_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID1(/;"	d
bfin_read_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID1(/;"	d
bfin_read_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID1(/;"	d
bfin_read_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_ID1(/;"	d
bfin_read_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_LENGTH(/;"	d
bfin_read_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_LENGTH(/;"	d
bfin_read_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_LENGTH(/;"	d
bfin_read_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_LENGTH(/;"	d
bfin_read_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB10_TIMESTAMP(/;"	d
bfin_read_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB10_TIMESTAMP(/;"	d
bfin_read_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB10_TIMESTAMP(/;"	d
bfin_read_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB10_TIMESTAMP(/;"	d
bfin_read_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA0(/;"	d
bfin_read_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA0(/;"	d
bfin_read_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA0(/;"	d
bfin_read_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA0(/;"	d
bfin_read_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA1(/;"	d
bfin_read_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA1(/;"	d
bfin_read_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA1(/;"	d
bfin_read_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA1(/;"	d
bfin_read_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA2(/;"	d
bfin_read_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA2(/;"	d
bfin_read_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA2(/;"	d
bfin_read_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA2(/;"	d
bfin_read_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA3(/;"	d
bfin_read_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA3(/;"	d
bfin_read_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA3(/;"	d
bfin_read_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_DATA3(/;"	d
bfin_read_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID0(/;"	d
bfin_read_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID0(/;"	d
bfin_read_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID0(/;"	d
bfin_read_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID0(/;"	d
bfin_read_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID1(/;"	d
bfin_read_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID1(/;"	d
bfin_read_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID1(/;"	d
bfin_read_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_ID1(/;"	d
bfin_read_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_LENGTH(/;"	d
bfin_read_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_LENGTH(/;"	d
bfin_read_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_LENGTH(/;"	d
bfin_read_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_LENGTH(/;"	d
bfin_read_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB11_TIMESTAMP(/;"	d
bfin_read_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB11_TIMESTAMP(/;"	d
bfin_read_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB11_TIMESTAMP(/;"	d
bfin_read_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB11_TIMESTAMP(/;"	d
bfin_read_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA0(/;"	d
bfin_read_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA0(/;"	d
bfin_read_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA0(/;"	d
bfin_read_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA0(/;"	d
bfin_read_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA1(/;"	d
bfin_read_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA1(/;"	d
bfin_read_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA1(/;"	d
bfin_read_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA1(/;"	d
bfin_read_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA2(/;"	d
bfin_read_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA2(/;"	d
bfin_read_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA2(/;"	d
bfin_read_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA2(/;"	d
bfin_read_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA3(/;"	d
bfin_read_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA3(/;"	d
bfin_read_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA3(/;"	d
bfin_read_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_DATA3(/;"	d
bfin_read_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID0(/;"	d
bfin_read_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID0(/;"	d
bfin_read_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID0(/;"	d
bfin_read_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID0(/;"	d
bfin_read_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID1(/;"	d
bfin_read_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID1(/;"	d
bfin_read_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID1(/;"	d
bfin_read_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_ID1(/;"	d
bfin_read_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_LENGTH(/;"	d
bfin_read_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_LENGTH(/;"	d
bfin_read_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_LENGTH(/;"	d
bfin_read_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_LENGTH(/;"	d
bfin_read_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB12_TIMESTAMP(/;"	d
bfin_read_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB12_TIMESTAMP(/;"	d
bfin_read_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB12_TIMESTAMP(/;"	d
bfin_read_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB12_TIMESTAMP(/;"	d
bfin_read_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA0(/;"	d
bfin_read_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA0(/;"	d
bfin_read_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA0(/;"	d
bfin_read_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA0(/;"	d
bfin_read_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA1(/;"	d
bfin_read_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA1(/;"	d
bfin_read_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA1(/;"	d
bfin_read_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA1(/;"	d
bfin_read_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA2(/;"	d
bfin_read_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA2(/;"	d
bfin_read_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA2(/;"	d
bfin_read_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA2(/;"	d
bfin_read_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA3(/;"	d
bfin_read_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA3(/;"	d
bfin_read_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA3(/;"	d
bfin_read_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_DATA3(/;"	d
bfin_read_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID0(/;"	d
bfin_read_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID0(/;"	d
bfin_read_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID0(/;"	d
bfin_read_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID0(/;"	d
bfin_read_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID1(/;"	d
bfin_read_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID1(/;"	d
bfin_read_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID1(/;"	d
bfin_read_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_ID1(/;"	d
bfin_read_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_LENGTH(/;"	d
bfin_read_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_LENGTH(/;"	d
bfin_read_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_LENGTH(/;"	d
bfin_read_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_LENGTH(/;"	d
bfin_read_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB13_TIMESTAMP(/;"	d
bfin_read_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB13_TIMESTAMP(/;"	d
bfin_read_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB13_TIMESTAMP(/;"	d
bfin_read_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB13_TIMESTAMP(/;"	d
bfin_read_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA0(/;"	d
bfin_read_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA0(/;"	d
bfin_read_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA0(/;"	d
bfin_read_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA0(/;"	d
bfin_read_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA1(/;"	d
bfin_read_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA1(/;"	d
bfin_read_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA1(/;"	d
bfin_read_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA1(/;"	d
bfin_read_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA2(/;"	d
bfin_read_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA2(/;"	d
bfin_read_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA2(/;"	d
bfin_read_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA2(/;"	d
bfin_read_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA3(/;"	d
bfin_read_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA3(/;"	d
bfin_read_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA3(/;"	d
bfin_read_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_DATA3(/;"	d
bfin_read_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID0(/;"	d
bfin_read_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID0(/;"	d
bfin_read_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID0(/;"	d
bfin_read_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID0(/;"	d
bfin_read_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID1(/;"	d
bfin_read_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID1(/;"	d
bfin_read_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID1(/;"	d
bfin_read_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_ID1(/;"	d
bfin_read_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_LENGTH(/;"	d
bfin_read_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_LENGTH(/;"	d
bfin_read_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_LENGTH(/;"	d
bfin_read_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_LENGTH(/;"	d
bfin_read_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB14_TIMESTAMP(/;"	d
bfin_read_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB14_TIMESTAMP(/;"	d
bfin_read_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB14_TIMESTAMP(/;"	d
bfin_read_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB14_TIMESTAMP(/;"	d
bfin_read_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA0(/;"	d
bfin_read_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA0(/;"	d
bfin_read_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA0(/;"	d
bfin_read_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA0(/;"	d
bfin_read_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA1(/;"	d
bfin_read_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA1(/;"	d
bfin_read_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA1(/;"	d
bfin_read_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA1(/;"	d
bfin_read_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA2(/;"	d
bfin_read_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA2(/;"	d
bfin_read_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA2(/;"	d
bfin_read_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA2(/;"	d
bfin_read_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA3(/;"	d
bfin_read_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA3(/;"	d
bfin_read_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA3(/;"	d
bfin_read_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_DATA3(/;"	d
bfin_read_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID0(/;"	d
bfin_read_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID0(/;"	d
bfin_read_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID0(/;"	d
bfin_read_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID0(/;"	d
bfin_read_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID1(/;"	d
bfin_read_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID1(/;"	d
bfin_read_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID1(/;"	d
bfin_read_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_ID1(/;"	d
bfin_read_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_LENGTH(/;"	d
bfin_read_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_LENGTH(/;"	d
bfin_read_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_LENGTH(/;"	d
bfin_read_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_LENGTH(/;"	d
bfin_read_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB15_TIMESTAMP(/;"	d
bfin_read_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB15_TIMESTAMP(/;"	d
bfin_read_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB15_TIMESTAMP(/;"	d
bfin_read_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB15_TIMESTAMP(/;"	d
bfin_read_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA0(/;"	d
bfin_read_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA0(/;"	d
bfin_read_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA0(/;"	d
bfin_read_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA0(/;"	d
bfin_read_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA1(/;"	d
bfin_read_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA1(/;"	d
bfin_read_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA1(/;"	d
bfin_read_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA1(/;"	d
bfin_read_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA2(/;"	d
bfin_read_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA2(/;"	d
bfin_read_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA2(/;"	d
bfin_read_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA2(/;"	d
bfin_read_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA3(/;"	d
bfin_read_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA3(/;"	d
bfin_read_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA3(/;"	d
bfin_read_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_DATA3(/;"	d
bfin_read_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID0(/;"	d
bfin_read_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID0(/;"	d
bfin_read_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID0(/;"	d
bfin_read_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID0(/;"	d
bfin_read_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID1(/;"	d
bfin_read_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID1(/;"	d
bfin_read_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID1(/;"	d
bfin_read_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_ID1(/;"	d
bfin_read_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_LENGTH(/;"	d
bfin_read_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_LENGTH(/;"	d
bfin_read_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_LENGTH(/;"	d
bfin_read_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_LENGTH(/;"	d
bfin_read_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB16_TIMESTAMP(/;"	d
bfin_read_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB16_TIMESTAMP(/;"	d
bfin_read_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB16_TIMESTAMP(/;"	d
bfin_read_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB16_TIMESTAMP(/;"	d
bfin_read_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA0(/;"	d
bfin_read_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA0(/;"	d
bfin_read_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA0(/;"	d
bfin_read_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA0(/;"	d
bfin_read_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA1(/;"	d
bfin_read_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA1(/;"	d
bfin_read_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA1(/;"	d
bfin_read_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA1(/;"	d
bfin_read_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA2(/;"	d
bfin_read_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA2(/;"	d
bfin_read_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA2(/;"	d
bfin_read_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA2(/;"	d
bfin_read_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA3(/;"	d
bfin_read_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA3(/;"	d
bfin_read_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA3(/;"	d
bfin_read_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_DATA3(/;"	d
bfin_read_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID0(/;"	d
bfin_read_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID0(/;"	d
bfin_read_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID0(/;"	d
bfin_read_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID0(/;"	d
bfin_read_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID1(/;"	d
bfin_read_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID1(/;"	d
bfin_read_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID1(/;"	d
bfin_read_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_ID1(/;"	d
bfin_read_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_LENGTH(/;"	d
bfin_read_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_LENGTH(/;"	d
bfin_read_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_LENGTH(/;"	d
bfin_read_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_LENGTH(/;"	d
bfin_read_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB17_TIMESTAMP(/;"	d
bfin_read_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB17_TIMESTAMP(/;"	d
bfin_read_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB17_TIMESTAMP(/;"	d
bfin_read_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB17_TIMESTAMP(/;"	d
bfin_read_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA0(/;"	d
bfin_read_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA0(/;"	d
bfin_read_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA0(/;"	d
bfin_read_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA0(/;"	d
bfin_read_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA1(/;"	d
bfin_read_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA1(/;"	d
bfin_read_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA1(/;"	d
bfin_read_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA1(/;"	d
bfin_read_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA2(/;"	d
bfin_read_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA2(/;"	d
bfin_read_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA2(/;"	d
bfin_read_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA2(/;"	d
bfin_read_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA3(/;"	d
bfin_read_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA3(/;"	d
bfin_read_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA3(/;"	d
bfin_read_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_DATA3(/;"	d
bfin_read_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID0(/;"	d
bfin_read_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID0(/;"	d
bfin_read_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID0(/;"	d
bfin_read_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID0(/;"	d
bfin_read_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID1(/;"	d
bfin_read_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID1(/;"	d
bfin_read_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID1(/;"	d
bfin_read_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_ID1(/;"	d
bfin_read_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_LENGTH(/;"	d
bfin_read_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_LENGTH(/;"	d
bfin_read_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_LENGTH(/;"	d
bfin_read_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_LENGTH(/;"	d
bfin_read_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB18_TIMESTAMP(/;"	d
bfin_read_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB18_TIMESTAMP(/;"	d
bfin_read_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB18_TIMESTAMP(/;"	d
bfin_read_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB18_TIMESTAMP(/;"	d
bfin_read_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA0(/;"	d
bfin_read_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA0(/;"	d
bfin_read_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA0(/;"	d
bfin_read_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA0(/;"	d
bfin_read_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA1(/;"	d
bfin_read_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA1(/;"	d
bfin_read_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA1(/;"	d
bfin_read_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA1(/;"	d
bfin_read_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA2(/;"	d
bfin_read_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA2(/;"	d
bfin_read_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA2(/;"	d
bfin_read_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA2(/;"	d
bfin_read_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA3(/;"	d
bfin_read_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA3(/;"	d
bfin_read_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA3(/;"	d
bfin_read_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_DATA3(/;"	d
bfin_read_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID0(/;"	d
bfin_read_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID0(/;"	d
bfin_read_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID0(/;"	d
bfin_read_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID0(/;"	d
bfin_read_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID1(/;"	d
bfin_read_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID1(/;"	d
bfin_read_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID1(/;"	d
bfin_read_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_ID1(/;"	d
bfin_read_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_LENGTH(/;"	d
bfin_read_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_LENGTH(/;"	d
bfin_read_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_LENGTH(/;"	d
bfin_read_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_LENGTH(/;"	d
bfin_read_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB19_TIMESTAMP(/;"	d
bfin_read_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB19_TIMESTAMP(/;"	d
bfin_read_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB19_TIMESTAMP(/;"	d
bfin_read_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB19_TIMESTAMP(/;"	d
bfin_read_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA0(/;"	d
bfin_read_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA0(/;"	d
bfin_read_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA0(/;"	d
bfin_read_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA0(/;"	d
bfin_read_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA1(/;"	d
bfin_read_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA1(/;"	d
bfin_read_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA1(/;"	d
bfin_read_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA1(/;"	d
bfin_read_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA2(/;"	d
bfin_read_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA2(/;"	d
bfin_read_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA2(/;"	d
bfin_read_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA2(/;"	d
bfin_read_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA3(/;"	d
bfin_read_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA3(/;"	d
bfin_read_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA3(/;"	d
bfin_read_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_DATA3(/;"	d
bfin_read_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID0(/;"	d
bfin_read_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID0(/;"	d
bfin_read_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID0(/;"	d
bfin_read_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID0(/;"	d
bfin_read_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID1(/;"	d
bfin_read_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID1(/;"	d
bfin_read_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID1(/;"	d
bfin_read_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_ID1(/;"	d
bfin_read_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_LENGTH(/;"	d
bfin_read_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_LENGTH(/;"	d
bfin_read_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_LENGTH(/;"	d
bfin_read_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_LENGTH(/;"	d
bfin_read_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB20_TIMESTAMP(/;"	d
bfin_read_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB20_TIMESTAMP(/;"	d
bfin_read_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB20_TIMESTAMP(/;"	d
bfin_read_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB20_TIMESTAMP(/;"	d
bfin_read_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA0(/;"	d
bfin_read_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA0(/;"	d
bfin_read_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA0(/;"	d
bfin_read_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA0(/;"	d
bfin_read_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA1(/;"	d
bfin_read_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA1(/;"	d
bfin_read_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA1(/;"	d
bfin_read_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA1(/;"	d
bfin_read_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA2(/;"	d
bfin_read_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA2(/;"	d
bfin_read_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA2(/;"	d
bfin_read_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA2(/;"	d
bfin_read_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA3(/;"	d
bfin_read_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA3(/;"	d
bfin_read_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA3(/;"	d
bfin_read_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_DATA3(/;"	d
bfin_read_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID0(/;"	d
bfin_read_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID0(/;"	d
bfin_read_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID0(/;"	d
bfin_read_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID0(/;"	d
bfin_read_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID1(/;"	d
bfin_read_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID1(/;"	d
bfin_read_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID1(/;"	d
bfin_read_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_ID1(/;"	d
bfin_read_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_LENGTH(/;"	d
bfin_read_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_LENGTH(/;"	d
bfin_read_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_LENGTH(/;"	d
bfin_read_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_LENGTH(/;"	d
bfin_read_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB21_TIMESTAMP(/;"	d
bfin_read_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB21_TIMESTAMP(/;"	d
bfin_read_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB21_TIMESTAMP(/;"	d
bfin_read_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB21_TIMESTAMP(/;"	d
bfin_read_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA0(/;"	d
bfin_read_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA0(/;"	d
bfin_read_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA0(/;"	d
bfin_read_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA0(/;"	d
bfin_read_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA1(/;"	d
bfin_read_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA1(/;"	d
bfin_read_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA1(/;"	d
bfin_read_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA1(/;"	d
bfin_read_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA2(/;"	d
bfin_read_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA2(/;"	d
bfin_read_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA2(/;"	d
bfin_read_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA2(/;"	d
bfin_read_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA3(/;"	d
bfin_read_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA3(/;"	d
bfin_read_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA3(/;"	d
bfin_read_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_DATA3(/;"	d
bfin_read_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID0(/;"	d
bfin_read_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID0(/;"	d
bfin_read_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID0(/;"	d
bfin_read_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID0(/;"	d
bfin_read_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID1(/;"	d
bfin_read_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID1(/;"	d
bfin_read_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID1(/;"	d
bfin_read_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_ID1(/;"	d
bfin_read_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_LENGTH(/;"	d
bfin_read_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_LENGTH(/;"	d
bfin_read_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_LENGTH(/;"	d
bfin_read_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_LENGTH(/;"	d
bfin_read_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB22_TIMESTAMP(/;"	d
bfin_read_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB22_TIMESTAMP(/;"	d
bfin_read_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB22_TIMESTAMP(/;"	d
bfin_read_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB22_TIMESTAMP(/;"	d
bfin_read_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA0(/;"	d
bfin_read_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA0(/;"	d
bfin_read_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA0(/;"	d
bfin_read_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA0(/;"	d
bfin_read_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA1(/;"	d
bfin_read_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA1(/;"	d
bfin_read_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA1(/;"	d
bfin_read_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA1(/;"	d
bfin_read_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA2(/;"	d
bfin_read_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA2(/;"	d
bfin_read_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA2(/;"	d
bfin_read_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA2(/;"	d
bfin_read_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA3(/;"	d
bfin_read_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA3(/;"	d
bfin_read_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA3(/;"	d
bfin_read_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_DATA3(/;"	d
bfin_read_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID0(/;"	d
bfin_read_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID0(/;"	d
bfin_read_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID0(/;"	d
bfin_read_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID0(/;"	d
bfin_read_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID1(/;"	d
bfin_read_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID1(/;"	d
bfin_read_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID1(/;"	d
bfin_read_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_ID1(/;"	d
bfin_read_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_LENGTH(/;"	d
bfin_read_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_LENGTH(/;"	d
bfin_read_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_LENGTH(/;"	d
bfin_read_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_LENGTH(/;"	d
bfin_read_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB23_TIMESTAMP(/;"	d
bfin_read_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB23_TIMESTAMP(/;"	d
bfin_read_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB23_TIMESTAMP(/;"	d
bfin_read_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB23_TIMESTAMP(/;"	d
bfin_read_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA0(/;"	d
bfin_read_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA0(/;"	d
bfin_read_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA0(/;"	d
bfin_read_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA0(/;"	d
bfin_read_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA1(/;"	d
bfin_read_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA1(/;"	d
bfin_read_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA1(/;"	d
bfin_read_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA1(/;"	d
bfin_read_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA2(/;"	d
bfin_read_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA2(/;"	d
bfin_read_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA2(/;"	d
bfin_read_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA2(/;"	d
bfin_read_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA3(/;"	d
bfin_read_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA3(/;"	d
bfin_read_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA3(/;"	d
bfin_read_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_DATA3(/;"	d
bfin_read_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID0(/;"	d
bfin_read_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID0(/;"	d
bfin_read_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID0(/;"	d
bfin_read_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID0(/;"	d
bfin_read_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID1(/;"	d
bfin_read_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID1(/;"	d
bfin_read_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID1(/;"	d
bfin_read_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_ID1(/;"	d
bfin_read_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_LENGTH(/;"	d
bfin_read_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_LENGTH(/;"	d
bfin_read_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_LENGTH(/;"	d
bfin_read_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_LENGTH(/;"	d
bfin_read_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB24_TIMESTAMP(/;"	d
bfin_read_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB24_TIMESTAMP(/;"	d
bfin_read_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB24_TIMESTAMP(/;"	d
bfin_read_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB24_TIMESTAMP(/;"	d
bfin_read_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA0(/;"	d
bfin_read_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA0(/;"	d
bfin_read_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA0(/;"	d
bfin_read_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA0(/;"	d
bfin_read_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA1(/;"	d
bfin_read_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA1(/;"	d
bfin_read_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA1(/;"	d
bfin_read_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA1(/;"	d
bfin_read_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA2(/;"	d
bfin_read_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA2(/;"	d
bfin_read_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA2(/;"	d
bfin_read_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA2(/;"	d
bfin_read_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA3(/;"	d
bfin_read_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA3(/;"	d
bfin_read_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA3(/;"	d
bfin_read_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_DATA3(/;"	d
bfin_read_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID0(/;"	d
bfin_read_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID0(/;"	d
bfin_read_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID0(/;"	d
bfin_read_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID0(/;"	d
bfin_read_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID1(/;"	d
bfin_read_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID1(/;"	d
bfin_read_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID1(/;"	d
bfin_read_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_ID1(/;"	d
bfin_read_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_LENGTH(/;"	d
bfin_read_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_LENGTH(/;"	d
bfin_read_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_LENGTH(/;"	d
bfin_read_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_LENGTH(/;"	d
bfin_read_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB25_TIMESTAMP(/;"	d
bfin_read_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB25_TIMESTAMP(/;"	d
bfin_read_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB25_TIMESTAMP(/;"	d
bfin_read_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB25_TIMESTAMP(/;"	d
bfin_read_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA0(/;"	d
bfin_read_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA0(/;"	d
bfin_read_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA0(/;"	d
bfin_read_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA0(/;"	d
bfin_read_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA1(/;"	d
bfin_read_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA1(/;"	d
bfin_read_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA1(/;"	d
bfin_read_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA1(/;"	d
bfin_read_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA2(/;"	d
bfin_read_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA2(/;"	d
bfin_read_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA2(/;"	d
bfin_read_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA2(/;"	d
bfin_read_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA3(/;"	d
bfin_read_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA3(/;"	d
bfin_read_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA3(/;"	d
bfin_read_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_DATA3(/;"	d
bfin_read_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID0(/;"	d
bfin_read_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID0(/;"	d
bfin_read_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID0(/;"	d
bfin_read_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID0(/;"	d
bfin_read_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID1(/;"	d
bfin_read_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID1(/;"	d
bfin_read_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID1(/;"	d
bfin_read_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_ID1(/;"	d
bfin_read_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_LENGTH(/;"	d
bfin_read_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_LENGTH(/;"	d
bfin_read_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_LENGTH(/;"	d
bfin_read_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_LENGTH(/;"	d
bfin_read_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB26_TIMESTAMP(/;"	d
bfin_read_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB26_TIMESTAMP(/;"	d
bfin_read_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB26_TIMESTAMP(/;"	d
bfin_read_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB26_TIMESTAMP(/;"	d
bfin_read_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA0(/;"	d
bfin_read_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA0(/;"	d
bfin_read_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA0(/;"	d
bfin_read_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA0(/;"	d
bfin_read_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA1(/;"	d
bfin_read_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA1(/;"	d
bfin_read_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA1(/;"	d
bfin_read_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA1(/;"	d
bfin_read_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA2(/;"	d
bfin_read_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA2(/;"	d
bfin_read_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA2(/;"	d
bfin_read_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA2(/;"	d
bfin_read_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA3(/;"	d
bfin_read_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA3(/;"	d
bfin_read_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA3(/;"	d
bfin_read_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_DATA3(/;"	d
bfin_read_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID0(/;"	d
bfin_read_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID0(/;"	d
bfin_read_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID0(/;"	d
bfin_read_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID0(/;"	d
bfin_read_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID1(/;"	d
bfin_read_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID1(/;"	d
bfin_read_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID1(/;"	d
bfin_read_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_ID1(/;"	d
bfin_read_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_LENGTH(/;"	d
bfin_read_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_LENGTH(/;"	d
bfin_read_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_LENGTH(/;"	d
bfin_read_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_LENGTH(/;"	d
bfin_read_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB27_TIMESTAMP(/;"	d
bfin_read_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB27_TIMESTAMP(/;"	d
bfin_read_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB27_TIMESTAMP(/;"	d
bfin_read_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB27_TIMESTAMP(/;"	d
bfin_read_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA0(/;"	d
bfin_read_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA0(/;"	d
bfin_read_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA0(/;"	d
bfin_read_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA0(/;"	d
bfin_read_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA1(/;"	d
bfin_read_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA1(/;"	d
bfin_read_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA1(/;"	d
bfin_read_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA1(/;"	d
bfin_read_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA2(/;"	d
bfin_read_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA2(/;"	d
bfin_read_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA2(/;"	d
bfin_read_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA2(/;"	d
bfin_read_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA3(/;"	d
bfin_read_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA3(/;"	d
bfin_read_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA3(/;"	d
bfin_read_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_DATA3(/;"	d
bfin_read_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID0(/;"	d
bfin_read_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID0(/;"	d
bfin_read_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID0(/;"	d
bfin_read_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID0(/;"	d
bfin_read_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID1(/;"	d
bfin_read_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID1(/;"	d
bfin_read_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID1(/;"	d
bfin_read_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_ID1(/;"	d
bfin_read_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_LENGTH(/;"	d
bfin_read_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_LENGTH(/;"	d
bfin_read_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_LENGTH(/;"	d
bfin_read_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_LENGTH(/;"	d
bfin_read_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB28_TIMESTAMP(/;"	d
bfin_read_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB28_TIMESTAMP(/;"	d
bfin_read_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB28_TIMESTAMP(/;"	d
bfin_read_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB28_TIMESTAMP(/;"	d
bfin_read_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA0(/;"	d
bfin_read_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA0(/;"	d
bfin_read_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA0(/;"	d
bfin_read_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA0(/;"	d
bfin_read_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA1(/;"	d
bfin_read_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA1(/;"	d
bfin_read_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA1(/;"	d
bfin_read_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA1(/;"	d
bfin_read_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA2(/;"	d
bfin_read_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA2(/;"	d
bfin_read_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA2(/;"	d
bfin_read_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA2(/;"	d
bfin_read_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA3(/;"	d
bfin_read_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA3(/;"	d
bfin_read_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA3(/;"	d
bfin_read_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_DATA3(/;"	d
bfin_read_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID0(/;"	d
bfin_read_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID0(/;"	d
bfin_read_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID0(/;"	d
bfin_read_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID0(/;"	d
bfin_read_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID1(/;"	d
bfin_read_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID1(/;"	d
bfin_read_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID1(/;"	d
bfin_read_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_ID1(/;"	d
bfin_read_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_LENGTH(/;"	d
bfin_read_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_LENGTH(/;"	d
bfin_read_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_LENGTH(/;"	d
bfin_read_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_LENGTH(/;"	d
bfin_read_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB29_TIMESTAMP(/;"	d
bfin_read_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB29_TIMESTAMP(/;"	d
bfin_read_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB29_TIMESTAMP(/;"	d
bfin_read_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB29_TIMESTAMP(/;"	d
bfin_read_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA0(/;"	d
bfin_read_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA0(/;"	d
bfin_read_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA0(/;"	d
bfin_read_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA0(/;"	d
bfin_read_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA1(/;"	d
bfin_read_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA1(/;"	d
bfin_read_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA1(/;"	d
bfin_read_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA1(/;"	d
bfin_read_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA2(/;"	d
bfin_read_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA2(/;"	d
bfin_read_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA2(/;"	d
bfin_read_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA2(/;"	d
bfin_read_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA3(/;"	d
bfin_read_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA3(/;"	d
bfin_read_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA3(/;"	d
bfin_read_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_DATA3(/;"	d
bfin_read_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID0(/;"	d
bfin_read_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID0(/;"	d
bfin_read_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID0(/;"	d
bfin_read_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID0(/;"	d
bfin_read_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID1(/;"	d
bfin_read_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID1(/;"	d
bfin_read_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID1(/;"	d
bfin_read_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_ID1(/;"	d
bfin_read_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_LENGTH(/;"	d
bfin_read_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_LENGTH(/;"	d
bfin_read_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_LENGTH(/;"	d
bfin_read_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_LENGTH(/;"	d
bfin_read_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB30_TIMESTAMP(/;"	d
bfin_read_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB30_TIMESTAMP(/;"	d
bfin_read_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB30_TIMESTAMP(/;"	d
bfin_read_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB30_TIMESTAMP(/;"	d
bfin_read_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA0(/;"	d
bfin_read_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA0(/;"	d
bfin_read_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA0(/;"	d
bfin_read_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA0(/;"	d
bfin_read_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA1(/;"	d
bfin_read_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA1(/;"	d
bfin_read_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA1(/;"	d
bfin_read_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA1(/;"	d
bfin_read_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA2(/;"	d
bfin_read_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA2(/;"	d
bfin_read_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA2(/;"	d
bfin_read_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA2(/;"	d
bfin_read_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA3(/;"	d
bfin_read_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA3(/;"	d
bfin_read_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA3(/;"	d
bfin_read_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_DATA3(/;"	d
bfin_read_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID0(/;"	d
bfin_read_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID0(/;"	d
bfin_read_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID0(/;"	d
bfin_read_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID0(/;"	d
bfin_read_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID1(/;"	d
bfin_read_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID1(/;"	d
bfin_read_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID1(/;"	d
bfin_read_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_ID1(/;"	d
bfin_read_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_LENGTH(/;"	d
bfin_read_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_LENGTH(/;"	d
bfin_read_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_LENGTH(/;"	d
bfin_read_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_LENGTH(/;"	d
bfin_read_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MB31_TIMESTAMP(/;"	d
bfin_read_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MB31_TIMESTAMP(/;"	d
bfin_read_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MB31_TIMESTAMP(/;"	d
bfin_read_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MB31_TIMESTAMP(/;"	d
bfin_read_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBIM1(/;"	d
bfin_read_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBIM1(/;"	d
bfin_read_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBIM1(/;"	d
bfin_read_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBIM1(/;"	d
bfin_read_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBIM2(/;"	d
bfin_read_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBIM2(/;"	d
bfin_read_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBIM2(/;"	d
bfin_read_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBIM2(/;"	d
bfin_read_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF1(/;"	d
bfin_read_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF1(/;"	d
bfin_read_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF1(/;"	d
bfin_read_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF1(/;"	d
bfin_read_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF2(/;"	d
bfin_read_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF2(/;"	d
bfin_read_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF2(/;"	d
bfin_read_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBRIF2(/;"	d
bfin_read_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBTD(/;"	d
bfin_read_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBTD(/;"	d
bfin_read_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBTD(/;"	d
bfin_read_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBTD(/;"	d
bfin_read_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF1(/;"	d
bfin_read_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF1(/;"	d
bfin_read_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF1(/;"	d
bfin_read_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF1(/;"	d
bfin_read_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF2(/;"	d
bfin_read_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF2(/;"	d
bfin_read_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF2(/;"	d
bfin_read_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MBTIF2(/;"	d
bfin_read_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MC1(/;"	d
bfin_read_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MC1(/;"	d
bfin_read_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MC1(/;"	d
bfin_read_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MC1(/;"	d
bfin_read_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MC2(/;"	d
bfin_read_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MC2(/;"	d
bfin_read_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MC2(/;"	d
bfin_read_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MC2(/;"	d
bfin_read_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MD1(/;"	d
bfin_read_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MD1(/;"	d
bfin_read_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MD1(/;"	d
bfin_read_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MD1(/;"	d
bfin_read_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_MD2(/;"	d
bfin_read_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_MD2(/;"	d
bfin_read_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_MD2(/;"	d
bfin_read_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_MD2(/;"	d
bfin_read_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_OPSS1(/;"	d
bfin_read_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_OPSS1(/;"	d
bfin_read_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_OPSS1(/;"	d
bfin_read_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_OPSS1(/;"	d
bfin_read_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_OPSS2(/;"	d
bfin_read_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_OPSS2(/;"	d
bfin_read_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_OPSS2(/;"	d
bfin_read_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_OPSS2(/;"	d
bfin_read_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_RFH1(/;"	d
bfin_read_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_RFH1(/;"	d
bfin_read_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_RFH1(/;"	d
bfin_read_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_RFH1(/;"	d
bfin_read_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_RFH2(/;"	d
bfin_read_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_RFH2(/;"	d
bfin_read_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_RFH2(/;"	d
bfin_read_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_RFH2(/;"	d
bfin_read_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_RML1(/;"	d
bfin_read_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_RML1(/;"	d
bfin_read_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_RML1(/;"	d
bfin_read_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_RML1(/;"	d
bfin_read_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_RML2(/;"	d
bfin_read_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_RML2(/;"	d
bfin_read_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_RML2(/;"	d
bfin_read_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_RML2(/;"	d
bfin_read_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_RMP1(/;"	d
bfin_read_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_RMP1(/;"	d
bfin_read_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_RMP1(/;"	d
bfin_read_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_RMP1(/;"	d
bfin_read_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_RMP2(/;"	d
bfin_read_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_RMP2(/;"	d
bfin_read_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_RMP2(/;"	d
bfin_read_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_RMP2(/;"	d
bfin_read_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_STATUS(/;"	d
bfin_read_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_STATUS(/;"	d
bfin_read_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_STATUS(/;"	d
bfin_read_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_STATUS(/;"	d
bfin_read_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TA1(/;"	d
bfin_read_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TA1(/;"	d
bfin_read_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TA1(/;"	d
bfin_read_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TA1(/;"	d
bfin_read_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TA2(/;"	d
bfin_read_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TA2(/;"	d
bfin_read_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TA2(/;"	d
bfin_read_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TA2(/;"	d
bfin_read_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TIMING(/;"	d
bfin_read_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TIMING(/;"	d
bfin_read_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TIMING(/;"	d
bfin_read_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TIMING(/;"	d
bfin_read_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TRR1(/;"	d
bfin_read_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TRR1(/;"	d
bfin_read_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TRR1(/;"	d
bfin_read_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TRR1(/;"	d
bfin_read_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TRR2(/;"	d
bfin_read_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TRR2(/;"	d
bfin_read_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TRR2(/;"	d
bfin_read_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TRR2(/;"	d
bfin_read_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TRS1(/;"	d
bfin_read_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TRS1(/;"	d
bfin_read_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TRS1(/;"	d
bfin_read_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TRS1(/;"	d
bfin_read_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_TRS2(/;"	d
bfin_read_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_TRS2(/;"	d
bfin_read_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_TRS2(/;"	d
bfin_read_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_TRS2(/;"	d
bfin_read_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_UCCNF(/;"	d
bfin_read_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_UCCNF(/;"	d
bfin_read_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_UCCNF(/;"	d
bfin_read_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_UCCNF(/;"	d
bfin_read_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_UCCNT(/;"	d
bfin_read_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_UCCNT(/;"	d
bfin_read_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_UCCNT(/;"	d
bfin_read_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_UCCNT(/;"	d
bfin_read_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CAN0_UCRC(/;"	d
bfin_read_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN0_UCRC(/;"	d
bfin_read_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN0_UCRC(/;"	d
bfin_read_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN0_UCRC(/;"	d
bfin_read_CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AA1(/;"	d
bfin_read_CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AA1(/;"	d
bfin_read_CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AA1(/;"	d
bfin_read_CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AA2(/;"	d
bfin_read_CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AA2(/;"	d
bfin_read_CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AA2(/;"	d
bfin_read_CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM00H(/;"	d
bfin_read_CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM00H(/;"	d
bfin_read_CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM00H(/;"	d
bfin_read_CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM00L(/;"	d
bfin_read_CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM00L(/;"	d
bfin_read_CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM00L(/;"	d
bfin_read_CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM01H(/;"	d
bfin_read_CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM01H(/;"	d
bfin_read_CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM01H(/;"	d
bfin_read_CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM01L(/;"	d
bfin_read_CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM01L(/;"	d
bfin_read_CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM01L(/;"	d
bfin_read_CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM02H(/;"	d
bfin_read_CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM02H(/;"	d
bfin_read_CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM02H(/;"	d
bfin_read_CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM02L(/;"	d
bfin_read_CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM02L(/;"	d
bfin_read_CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM02L(/;"	d
bfin_read_CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM03H(/;"	d
bfin_read_CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM03H(/;"	d
bfin_read_CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM03H(/;"	d
bfin_read_CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM03L(/;"	d
bfin_read_CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM03L(/;"	d
bfin_read_CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM03L(/;"	d
bfin_read_CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM04H(/;"	d
bfin_read_CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM04H(/;"	d
bfin_read_CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM04H(/;"	d
bfin_read_CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM04L(/;"	d
bfin_read_CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM04L(/;"	d
bfin_read_CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM04L(/;"	d
bfin_read_CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM05H(/;"	d
bfin_read_CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM05H(/;"	d
bfin_read_CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM05H(/;"	d
bfin_read_CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM05L(/;"	d
bfin_read_CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM05L(/;"	d
bfin_read_CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM05L(/;"	d
bfin_read_CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM06H(/;"	d
bfin_read_CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM06H(/;"	d
bfin_read_CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM06H(/;"	d
bfin_read_CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM06L(/;"	d
bfin_read_CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM06L(/;"	d
bfin_read_CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM06L(/;"	d
bfin_read_CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM07H(/;"	d
bfin_read_CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM07H(/;"	d
bfin_read_CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM07H(/;"	d
bfin_read_CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM07L(/;"	d
bfin_read_CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM07L(/;"	d
bfin_read_CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM07L(/;"	d
bfin_read_CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM08H(/;"	d
bfin_read_CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM08H(/;"	d
bfin_read_CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM08H(/;"	d
bfin_read_CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM08L(/;"	d
bfin_read_CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM08L(/;"	d
bfin_read_CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM08L(/;"	d
bfin_read_CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM09H(/;"	d
bfin_read_CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM09H(/;"	d
bfin_read_CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM09H(/;"	d
bfin_read_CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM09L(/;"	d
bfin_read_CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM09L(/;"	d
bfin_read_CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM09L(/;"	d
bfin_read_CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM10H(/;"	d
bfin_read_CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM10H(/;"	d
bfin_read_CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM10H(/;"	d
bfin_read_CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM10L(/;"	d
bfin_read_CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM10L(/;"	d
bfin_read_CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM10L(/;"	d
bfin_read_CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM11H(/;"	d
bfin_read_CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM11H(/;"	d
bfin_read_CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM11H(/;"	d
bfin_read_CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM11L(/;"	d
bfin_read_CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM11L(/;"	d
bfin_read_CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM11L(/;"	d
bfin_read_CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM12H(/;"	d
bfin_read_CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM12H(/;"	d
bfin_read_CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM12H(/;"	d
bfin_read_CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM12L(/;"	d
bfin_read_CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM12L(/;"	d
bfin_read_CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM12L(/;"	d
bfin_read_CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM13H(/;"	d
bfin_read_CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM13H(/;"	d
bfin_read_CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM13H(/;"	d
bfin_read_CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM13L(/;"	d
bfin_read_CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM13L(/;"	d
bfin_read_CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM13L(/;"	d
bfin_read_CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM14H(/;"	d
bfin_read_CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM14H(/;"	d
bfin_read_CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM14H(/;"	d
bfin_read_CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM14L(/;"	d
bfin_read_CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM14L(/;"	d
bfin_read_CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM14L(/;"	d
bfin_read_CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM15H(/;"	d
bfin_read_CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM15H(/;"	d
bfin_read_CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM15H(/;"	d
bfin_read_CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM15L(/;"	d
bfin_read_CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM15L(/;"	d
bfin_read_CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM15L(/;"	d
bfin_read_CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM16H(/;"	d
bfin_read_CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM16H(/;"	d
bfin_read_CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM16H(/;"	d
bfin_read_CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM16L(/;"	d
bfin_read_CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM16L(/;"	d
bfin_read_CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM16L(/;"	d
bfin_read_CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM17H(/;"	d
bfin_read_CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM17H(/;"	d
bfin_read_CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM17H(/;"	d
bfin_read_CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM17L(/;"	d
bfin_read_CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM17L(/;"	d
bfin_read_CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM17L(/;"	d
bfin_read_CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM18H(/;"	d
bfin_read_CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM18H(/;"	d
bfin_read_CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM18H(/;"	d
bfin_read_CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM18L(/;"	d
bfin_read_CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM18L(/;"	d
bfin_read_CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM18L(/;"	d
bfin_read_CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM19H(/;"	d
bfin_read_CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM19H(/;"	d
bfin_read_CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM19H(/;"	d
bfin_read_CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM19L(/;"	d
bfin_read_CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM19L(/;"	d
bfin_read_CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM19L(/;"	d
bfin_read_CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM20H(/;"	d
bfin_read_CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM20H(/;"	d
bfin_read_CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM20H(/;"	d
bfin_read_CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM20L(/;"	d
bfin_read_CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM20L(/;"	d
bfin_read_CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM20L(/;"	d
bfin_read_CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM21H(/;"	d
bfin_read_CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM21H(/;"	d
bfin_read_CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM21H(/;"	d
bfin_read_CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM21L(/;"	d
bfin_read_CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM21L(/;"	d
bfin_read_CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM21L(/;"	d
bfin_read_CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM22H(/;"	d
bfin_read_CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM22H(/;"	d
bfin_read_CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM22H(/;"	d
bfin_read_CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM22L(/;"	d
bfin_read_CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM22L(/;"	d
bfin_read_CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM22L(/;"	d
bfin_read_CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM23H(/;"	d
bfin_read_CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM23H(/;"	d
bfin_read_CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM23H(/;"	d
bfin_read_CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM23L(/;"	d
bfin_read_CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM23L(/;"	d
bfin_read_CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM23L(/;"	d
bfin_read_CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM24H(/;"	d
bfin_read_CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM24H(/;"	d
bfin_read_CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM24H(/;"	d
bfin_read_CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM24L(/;"	d
bfin_read_CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM24L(/;"	d
bfin_read_CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM24L(/;"	d
bfin_read_CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM25H(/;"	d
bfin_read_CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM25H(/;"	d
bfin_read_CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM25H(/;"	d
bfin_read_CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM25L(/;"	d
bfin_read_CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM25L(/;"	d
bfin_read_CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM25L(/;"	d
bfin_read_CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM26H(/;"	d
bfin_read_CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM26H(/;"	d
bfin_read_CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM26H(/;"	d
bfin_read_CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM26L(/;"	d
bfin_read_CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM26L(/;"	d
bfin_read_CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM26L(/;"	d
bfin_read_CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM27H(/;"	d
bfin_read_CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM27H(/;"	d
bfin_read_CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM27H(/;"	d
bfin_read_CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM27L(/;"	d
bfin_read_CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM27L(/;"	d
bfin_read_CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM27L(/;"	d
bfin_read_CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM28H(/;"	d
bfin_read_CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM28H(/;"	d
bfin_read_CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM28H(/;"	d
bfin_read_CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM28L(/;"	d
bfin_read_CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM28L(/;"	d
bfin_read_CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM28L(/;"	d
bfin_read_CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM29H(/;"	d
bfin_read_CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM29H(/;"	d
bfin_read_CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM29H(/;"	d
bfin_read_CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM29L(/;"	d
bfin_read_CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM29L(/;"	d
bfin_read_CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM29L(/;"	d
bfin_read_CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM30H(/;"	d
bfin_read_CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM30H(/;"	d
bfin_read_CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM30H(/;"	d
bfin_read_CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM30L(/;"	d
bfin_read_CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM30L(/;"	d
bfin_read_CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM30L(/;"	d
bfin_read_CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM31H(/;"	d
bfin_read_CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM31H(/;"	d
bfin_read_CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM31H(/;"	d
bfin_read_CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_AM31L(/;"	d
bfin_read_CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_AM31L(/;"	d
bfin_read_CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_AM31L(/;"	d
bfin_read_CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_CEC(/;"	d
bfin_read_CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_CEC(/;"	d
bfin_read_CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_CEC(/;"	d
bfin_read_CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_CLOCK(/;"	d
bfin_read_CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_CLOCK(/;"	d
bfin_read_CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_CLOCK(/;"	d
bfin_read_CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_CONTROL(/;"	d
bfin_read_CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_CONTROL(/;"	d
bfin_read_CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_CONTROL(/;"	d
bfin_read_CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_DEBUG(/;"	d
bfin_read_CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_DEBUG(/;"	d
bfin_read_CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_DEBUG(/;"	d
bfin_read_CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_ESR(/;"	d
bfin_read_CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_ESR(/;"	d
bfin_read_CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_ESR(/;"	d
bfin_read_CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_EWR(/;"	d
bfin_read_CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_EWR(/;"	d
bfin_read_CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_EWR(/;"	d
bfin_read_CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_GIF(/;"	d
bfin_read_CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_GIF(/;"	d
bfin_read_CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_GIF(/;"	d
bfin_read_CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_GIM(/;"	d
bfin_read_CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_GIM(/;"	d
bfin_read_CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_GIM(/;"	d
bfin_read_CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_GIS(/;"	d
bfin_read_CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_GIS(/;"	d
bfin_read_CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_GIS(/;"	d
bfin_read_CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_INTR(/;"	d
bfin_read_CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_INTR(/;"	d
bfin_read_CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_INTR(/;"	d
bfin_read_CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA0(/;"	d
bfin_read_CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA0(/;"	d
bfin_read_CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA0(/;"	d
bfin_read_CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA1(/;"	d
bfin_read_CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA1(/;"	d
bfin_read_CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA1(/;"	d
bfin_read_CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA2(/;"	d
bfin_read_CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA2(/;"	d
bfin_read_CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA2(/;"	d
bfin_read_CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA3(/;"	d
bfin_read_CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA3(/;"	d
bfin_read_CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_DATA3(/;"	d
bfin_read_CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_ID0(/;"	d
bfin_read_CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_ID0(/;"	d
bfin_read_CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_ID0(/;"	d
bfin_read_CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_ID1(/;"	d
bfin_read_CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_ID1(/;"	d
bfin_read_CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_ID1(/;"	d
bfin_read_CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_LENGTH(/;"	d
bfin_read_CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_LENGTH(/;"	d
bfin_read_CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_LENGTH(/;"	d
bfin_read_CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB00_TIMESTAMP(/;"	d
bfin_read_CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB00_TIMESTAMP(/;"	d
bfin_read_CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB00_TIMESTAMP(/;"	d
bfin_read_CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA0(/;"	d
bfin_read_CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA0(/;"	d
bfin_read_CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA0(/;"	d
bfin_read_CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA1(/;"	d
bfin_read_CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA1(/;"	d
bfin_read_CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA1(/;"	d
bfin_read_CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA2(/;"	d
bfin_read_CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA2(/;"	d
bfin_read_CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA2(/;"	d
bfin_read_CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA3(/;"	d
bfin_read_CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA3(/;"	d
bfin_read_CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_DATA3(/;"	d
bfin_read_CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_ID0(/;"	d
bfin_read_CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_ID0(/;"	d
bfin_read_CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_ID0(/;"	d
bfin_read_CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_ID1(/;"	d
bfin_read_CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_ID1(/;"	d
bfin_read_CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_ID1(/;"	d
bfin_read_CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_LENGTH(/;"	d
bfin_read_CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_LENGTH(/;"	d
bfin_read_CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_LENGTH(/;"	d
bfin_read_CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB01_TIMESTAMP(/;"	d
bfin_read_CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB01_TIMESTAMP(/;"	d
bfin_read_CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB01_TIMESTAMP(/;"	d
bfin_read_CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA0(/;"	d
bfin_read_CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA0(/;"	d
bfin_read_CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA0(/;"	d
bfin_read_CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA1(/;"	d
bfin_read_CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA1(/;"	d
bfin_read_CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA1(/;"	d
bfin_read_CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA2(/;"	d
bfin_read_CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA2(/;"	d
bfin_read_CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA2(/;"	d
bfin_read_CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA3(/;"	d
bfin_read_CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA3(/;"	d
bfin_read_CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_DATA3(/;"	d
bfin_read_CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_ID0(/;"	d
bfin_read_CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_ID0(/;"	d
bfin_read_CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_ID0(/;"	d
bfin_read_CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_ID1(/;"	d
bfin_read_CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_ID1(/;"	d
bfin_read_CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_ID1(/;"	d
bfin_read_CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_LENGTH(/;"	d
bfin_read_CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_LENGTH(/;"	d
bfin_read_CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_LENGTH(/;"	d
bfin_read_CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB02_TIMESTAMP(/;"	d
bfin_read_CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB02_TIMESTAMP(/;"	d
bfin_read_CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB02_TIMESTAMP(/;"	d
bfin_read_CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA0(/;"	d
bfin_read_CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA0(/;"	d
bfin_read_CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA0(/;"	d
bfin_read_CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA1(/;"	d
bfin_read_CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA1(/;"	d
bfin_read_CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA1(/;"	d
bfin_read_CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA2(/;"	d
bfin_read_CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA2(/;"	d
bfin_read_CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA2(/;"	d
bfin_read_CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA3(/;"	d
bfin_read_CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA3(/;"	d
bfin_read_CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_DATA3(/;"	d
bfin_read_CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_ID0(/;"	d
bfin_read_CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_ID0(/;"	d
bfin_read_CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_ID0(/;"	d
bfin_read_CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_ID1(/;"	d
bfin_read_CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_ID1(/;"	d
bfin_read_CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_ID1(/;"	d
bfin_read_CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_LENGTH(/;"	d
bfin_read_CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_LENGTH(/;"	d
bfin_read_CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_LENGTH(/;"	d
bfin_read_CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB03_TIMESTAMP(/;"	d
bfin_read_CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB03_TIMESTAMP(/;"	d
bfin_read_CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB03_TIMESTAMP(/;"	d
bfin_read_CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA0(/;"	d
bfin_read_CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA0(/;"	d
bfin_read_CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA0(/;"	d
bfin_read_CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA1(/;"	d
bfin_read_CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA1(/;"	d
bfin_read_CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA1(/;"	d
bfin_read_CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA2(/;"	d
bfin_read_CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA2(/;"	d
bfin_read_CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA2(/;"	d
bfin_read_CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA3(/;"	d
bfin_read_CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA3(/;"	d
bfin_read_CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_DATA3(/;"	d
bfin_read_CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_ID0(/;"	d
bfin_read_CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_ID0(/;"	d
bfin_read_CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_ID0(/;"	d
bfin_read_CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_ID1(/;"	d
bfin_read_CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_ID1(/;"	d
bfin_read_CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_ID1(/;"	d
bfin_read_CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_LENGTH(/;"	d
bfin_read_CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_LENGTH(/;"	d
bfin_read_CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_LENGTH(/;"	d
bfin_read_CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB04_TIMESTAMP(/;"	d
bfin_read_CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB04_TIMESTAMP(/;"	d
bfin_read_CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB04_TIMESTAMP(/;"	d
bfin_read_CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA0(/;"	d
bfin_read_CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA0(/;"	d
bfin_read_CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA0(/;"	d
bfin_read_CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA1(/;"	d
bfin_read_CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA1(/;"	d
bfin_read_CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA1(/;"	d
bfin_read_CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA2(/;"	d
bfin_read_CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA2(/;"	d
bfin_read_CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA2(/;"	d
bfin_read_CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA3(/;"	d
bfin_read_CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA3(/;"	d
bfin_read_CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_DATA3(/;"	d
bfin_read_CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_ID0(/;"	d
bfin_read_CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_ID0(/;"	d
bfin_read_CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_ID0(/;"	d
bfin_read_CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_ID1(/;"	d
bfin_read_CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_ID1(/;"	d
bfin_read_CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_ID1(/;"	d
bfin_read_CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_LENGTH(/;"	d
bfin_read_CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_LENGTH(/;"	d
bfin_read_CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_LENGTH(/;"	d
bfin_read_CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB05_TIMESTAMP(/;"	d
bfin_read_CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB05_TIMESTAMP(/;"	d
bfin_read_CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB05_TIMESTAMP(/;"	d
bfin_read_CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA0(/;"	d
bfin_read_CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA0(/;"	d
bfin_read_CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA0(/;"	d
bfin_read_CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA1(/;"	d
bfin_read_CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA1(/;"	d
bfin_read_CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA1(/;"	d
bfin_read_CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA2(/;"	d
bfin_read_CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA2(/;"	d
bfin_read_CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA2(/;"	d
bfin_read_CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA3(/;"	d
bfin_read_CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA3(/;"	d
bfin_read_CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_DATA3(/;"	d
bfin_read_CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_ID0(/;"	d
bfin_read_CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_ID0(/;"	d
bfin_read_CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_ID0(/;"	d
bfin_read_CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_ID1(/;"	d
bfin_read_CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_ID1(/;"	d
bfin_read_CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_ID1(/;"	d
bfin_read_CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_LENGTH(/;"	d
bfin_read_CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_LENGTH(/;"	d
bfin_read_CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_LENGTH(/;"	d
bfin_read_CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB06_TIMESTAMP(/;"	d
bfin_read_CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB06_TIMESTAMP(/;"	d
bfin_read_CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB06_TIMESTAMP(/;"	d
bfin_read_CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA0(/;"	d
bfin_read_CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA0(/;"	d
bfin_read_CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA0(/;"	d
bfin_read_CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA1(/;"	d
bfin_read_CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA1(/;"	d
bfin_read_CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA1(/;"	d
bfin_read_CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA2(/;"	d
bfin_read_CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA2(/;"	d
bfin_read_CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA2(/;"	d
bfin_read_CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA3(/;"	d
bfin_read_CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA3(/;"	d
bfin_read_CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_DATA3(/;"	d
bfin_read_CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_ID0(/;"	d
bfin_read_CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_ID0(/;"	d
bfin_read_CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_ID0(/;"	d
bfin_read_CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_ID1(/;"	d
bfin_read_CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_ID1(/;"	d
bfin_read_CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_ID1(/;"	d
bfin_read_CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_LENGTH(/;"	d
bfin_read_CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_LENGTH(/;"	d
bfin_read_CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_LENGTH(/;"	d
bfin_read_CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB07_TIMESTAMP(/;"	d
bfin_read_CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB07_TIMESTAMP(/;"	d
bfin_read_CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB07_TIMESTAMP(/;"	d
bfin_read_CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA0(/;"	d
bfin_read_CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA0(/;"	d
bfin_read_CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA0(/;"	d
bfin_read_CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA1(/;"	d
bfin_read_CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA1(/;"	d
bfin_read_CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA1(/;"	d
bfin_read_CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA2(/;"	d
bfin_read_CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA2(/;"	d
bfin_read_CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA2(/;"	d
bfin_read_CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA3(/;"	d
bfin_read_CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA3(/;"	d
bfin_read_CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_DATA3(/;"	d
bfin_read_CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_ID0(/;"	d
bfin_read_CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_ID0(/;"	d
bfin_read_CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_ID0(/;"	d
bfin_read_CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_ID1(/;"	d
bfin_read_CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_ID1(/;"	d
bfin_read_CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_ID1(/;"	d
bfin_read_CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_LENGTH(/;"	d
bfin_read_CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_LENGTH(/;"	d
bfin_read_CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_LENGTH(/;"	d
bfin_read_CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB08_TIMESTAMP(/;"	d
bfin_read_CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB08_TIMESTAMP(/;"	d
bfin_read_CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB08_TIMESTAMP(/;"	d
bfin_read_CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA0(/;"	d
bfin_read_CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA0(/;"	d
bfin_read_CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA0(/;"	d
bfin_read_CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA1(/;"	d
bfin_read_CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA1(/;"	d
bfin_read_CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA1(/;"	d
bfin_read_CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA2(/;"	d
bfin_read_CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA2(/;"	d
bfin_read_CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA2(/;"	d
bfin_read_CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA3(/;"	d
bfin_read_CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA3(/;"	d
bfin_read_CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_DATA3(/;"	d
bfin_read_CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_ID0(/;"	d
bfin_read_CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_ID0(/;"	d
bfin_read_CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_ID0(/;"	d
bfin_read_CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_ID1(/;"	d
bfin_read_CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_ID1(/;"	d
bfin_read_CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_ID1(/;"	d
bfin_read_CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_LENGTH(/;"	d
bfin_read_CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_LENGTH(/;"	d
bfin_read_CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_LENGTH(/;"	d
bfin_read_CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB09_TIMESTAMP(/;"	d
bfin_read_CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB09_TIMESTAMP(/;"	d
bfin_read_CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB09_TIMESTAMP(/;"	d
bfin_read_CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA0(/;"	d
bfin_read_CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA0(/;"	d
bfin_read_CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA0(/;"	d
bfin_read_CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA1(/;"	d
bfin_read_CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA1(/;"	d
bfin_read_CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA1(/;"	d
bfin_read_CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA2(/;"	d
bfin_read_CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA2(/;"	d
bfin_read_CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA2(/;"	d
bfin_read_CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA3(/;"	d
bfin_read_CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA3(/;"	d
bfin_read_CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_DATA3(/;"	d
bfin_read_CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_ID0(/;"	d
bfin_read_CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_ID0(/;"	d
bfin_read_CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_ID0(/;"	d
bfin_read_CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_ID1(/;"	d
bfin_read_CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_ID1(/;"	d
bfin_read_CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_ID1(/;"	d
bfin_read_CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_LENGTH(/;"	d
bfin_read_CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_LENGTH(/;"	d
bfin_read_CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_LENGTH(/;"	d
bfin_read_CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB10_TIMESTAMP(/;"	d
bfin_read_CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB10_TIMESTAMP(/;"	d
bfin_read_CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB10_TIMESTAMP(/;"	d
bfin_read_CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA0(/;"	d
bfin_read_CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA0(/;"	d
bfin_read_CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA0(/;"	d
bfin_read_CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA1(/;"	d
bfin_read_CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA1(/;"	d
bfin_read_CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA1(/;"	d
bfin_read_CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA2(/;"	d
bfin_read_CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA2(/;"	d
bfin_read_CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA2(/;"	d
bfin_read_CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA3(/;"	d
bfin_read_CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA3(/;"	d
bfin_read_CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_DATA3(/;"	d
bfin_read_CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_ID0(/;"	d
bfin_read_CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_ID0(/;"	d
bfin_read_CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_ID0(/;"	d
bfin_read_CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_ID1(/;"	d
bfin_read_CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_ID1(/;"	d
bfin_read_CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_ID1(/;"	d
bfin_read_CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_LENGTH(/;"	d
bfin_read_CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_LENGTH(/;"	d
bfin_read_CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_LENGTH(/;"	d
bfin_read_CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB11_TIMESTAMP(/;"	d
bfin_read_CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB11_TIMESTAMP(/;"	d
bfin_read_CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB11_TIMESTAMP(/;"	d
bfin_read_CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA0(/;"	d
bfin_read_CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA0(/;"	d
bfin_read_CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA0(/;"	d
bfin_read_CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA1(/;"	d
bfin_read_CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA1(/;"	d
bfin_read_CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA1(/;"	d
bfin_read_CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA2(/;"	d
bfin_read_CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA2(/;"	d
bfin_read_CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA2(/;"	d
bfin_read_CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA3(/;"	d
bfin_read_CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA3(/;"	d
bfin_read_CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_DATA3(/;"	d
bfin_read_CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_ID0(/;"	d
bfin_read_CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_ID0(/;"	d
bfin_read_CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_ID0(/;"	d
bfin_read_CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_ID1(/;"	d
bfin_read_CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_ID1(/;"	d
bfin_read_CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_ID1(/;"	d
bfin_read_CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_LENGTH(/;"	d
bfin_read_CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_LENGTH(/;"	d
bfin_read_CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_LENGTH(/;"	d
bfin_read_CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB12_TIMESTAMP(/;"	d
bfin_read_CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB12_TIMESTAMP(/;"	d
bfin_read_CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB12_TIMESTAMP(/;"	d
bfin_read_CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA0(/;"	d
bfin_read_CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA0(/;"	d
bfin_read_CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA0(/;"	d
bfin_read_CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA1(/;"	d
bfin_read_CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA1(/;"	d
bfin_read_CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA1(/;"	d
bfin_read_CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA2(/;"	d
bfin_read_CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA2(/;"	d
bfin_read_CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA2(/;"	d
bfin_read_CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA3(/;"	d
bfin_read_CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA3(/;"	d
bfin_read_CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_DATA3(/;"	d
bfin_read_CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_ID0(/;"	d
bfin_read_CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_ID0(/;"	d
bfin_read_CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_ID0(/;"	d
bfin_read_CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_ID1(/;"	d
bfin_read_CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_ID1(/;"	d
bfin_read_CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_ID1(/;"	d
bfin_read_CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_LENGTH(/;"	d
bfin_read_CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_LENGTH(/;"	d
bfin_read_CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_LENGTH(/;"	d
bfin_read_CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB13_TIMESTAMP(/;"	d
bfin_read_CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB13_TIMESTAMP(/;"	d
bfin_read_CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB13_TIMESTAMP(/;"	d
bfin_read_CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA0(/;"	d
bfin_read_CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA0(/;"	d
bfin_read_CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA0(/;"	d
bfin_read_CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA1(/;"	d
bfin_read_CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA1(/;"	d
bfin_read_CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA1(/;"	d
bfin_read_CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA2(/;"	d
bfin_read_CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA2(/;"	d
bfin_read_CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA2(/;"	d
bfin_read_CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA3(/;"	d
bfin_read_CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA3(/;"	d
bfin_read_CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_DATA3(/;"	d
bfin_read_CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_ID0(/;"	d
bfin_read_CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_ID0(/;"	d
bfin_read_CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_ID0(/;"	d
bfin_read_CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_ID1(/;"	d
bfin_read_CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_ID1(/;"	d
bfin_read_CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_ID1(/;"	d
bfin_read_CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_LENGTH(/;"	d
bfin_read_CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_LENGTH(/;"	d
bfin_read_CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_LENGTH(/;"	d
bfin_read_CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB14_TIMESTAMP(/;"	d
bfin_read_CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB14_TIMESTAMP(/;"	d
bfin_read_CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB14_TIMESTAMP(/;"	d
bfin_read_CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA0(/;"	d
bfin_read_CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA0(/;"	d
bfin_read_CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA0(/;"	d
bfin_read_CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA1(/;"	d
bfin_read_CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA1(/;"	d
bfin_read_CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA1(/;"	d
bfin_read_CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA2(/;"	d
bfin_read_CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA2(/;"	d
bfin_read_CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA2(/;"	d
bfin_read_CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA3(/;"	d
bfin_read_CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA3(/;"	d
bfin_read_CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_DATA3(/;"	d
bfin_read_CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_ID0(/;"	d
bfin_read_CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_ID0(/;"	d
bfin_read_CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_ID0(/;"	d
bfin_read_CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_ID1(/;"	d
bfin_read_CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_ID1(/;"	d
bfin_read_CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_ID1(/;"	d
bfin_read_CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_LENGTH(/;"	d
bfin_read_CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_LENGTH(/;"	d
bfin_read_CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_LENGTH(/;"	d
bfin_read_CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB15_TIMESTAMP(/;"	d
bfin_read_CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB15_TIMESTAMP(/;"	d
bfin_read_CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB15_TIMESTAMP(/;"	d
bfin_read_CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA0(/;"	d
bfin_read_CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA0(/;"	d
bfin_read_CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA0(/;"	d
bfin_read_CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA1(/;"	d
bfin_read_CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA1(/;"	d
bfin_read_CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA1(/;"	d
bfin_read_CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA2(/;"	d
bfin_read_CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA2(/;"	d
bfin_read_CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA2(/;"	d
bfin_read_CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA3(/;"	d
bfin_read_CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA3(/;"	d
bfin_read_CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_DATA3(/;"	d
bfin_read_CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_ID0(/;"	d
bfin_read_CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_ID0(/;"	d
bfin_read_CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_ID0(/;"	d
bfin_read_CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_ID1(/;"	d
bfin_read_CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_ID1(/;"	d
bfin_read_CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_ID1(/;"	d
bfin_read_CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_LENGTH(/;"	d
bfin_read_CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_LENGTH(/;"	d
bfin_read_CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_LENGTH(/;"	d
bfin_read_CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB16_TIMESTAMP(/;"	d
bfin_read_CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB16_TIMESTAMP(/;"	d
bfin_read_CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB16_TIMESTAMP(/;"	d
bfin_read_CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA0(/;"	d
bfin_read_CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA0(/;"	d
bfin_read_CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA0(/;"	d
bfin_read_CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA1(/;"	d
bfin_read_CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA1(/;"	d
bfin_read_CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA1(/;"	d
bfin_read_CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA2(/;"	d
bfin_read_CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA2(/;"	d
bfin_read_CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA2(/;"	d
bfin_read_CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA3(/;"	d
bfin_read_CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA3(/;"	d
bfin_read_CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_DATA3(/;"	d
bfin_read_CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_ID0(/;"	d
bfin_read_CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_ID0(/;"	d
bfin_read_CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_ID0(/;"	d
bfin_read_CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_ID1(/;"	d
bfin_read_CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_ID1(/;"	d
bfin_read_CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_ID1(/;"	d
bfin_read_CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_LENGTH(/;"	d
bfin_read_CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_LENGTH(/;"	d
bfin_read_CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_LENGTH(/;"	d
bfin_read_CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB17_TIMESTAMP(/;"	d
bfin_read_CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB17_TIMESTAMP(/;"	d
bfin_read_CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB17_TIMESTAMP(/;"	d
bfin_read_CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA0(/;"	d
bfin_read_CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA0(/;"	d
bfin_read_CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA0(/;"	d
bfin_read_CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA1(/;"	d
bfin_read_CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA1(/;"	d
bfin_read_CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA1(/;"	d
bfin_read_CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA2(/;"	d
bfin_read_CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA2(/;"	d
bfin_read_CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA2(/;"	d
bfin_read_CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA3(/;"	d
bfin_read_CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA3(/;"	d
bfin_read_CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_DATA3(/;"	d
bfin_read_CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_ID0(/;"	d
bfin_read_CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_ID0(/;"	d
bfin_read_CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_ID0(/;"	d
bfin_read_CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_ID1(/;"	d
bfin_read_CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_ID1(/;"	d
bfin_read_CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_ID1(/;"	d
bfin_read_CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_LENGTH(/;"	d
bfin_read_CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_LENGTH(/;"	d
bfin_read_CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_LENGTH(/;"	d
bfin_read_CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB18_TIMESTAMP(/;"	d
bfin_read_CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB18_TIMESTAMP(/;"	d
bfin_read_CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB18_TIMESTAMP(/;"	d
bfin_read_CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA0(/;"	d
bfin_read_CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA0(/;"	d
bfin_read_CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA0(/;"	d
bfin_read_CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA1(/;"	d
bfin_read_CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA1(/;"	d
bfin_read_CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA1(/;"	d
bfin_read_CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA2(/;"	d
bfin_read_CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA2(/;"	d
bfin_read_CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA2(/;"	d
bfin_read_CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA3(/;"	d
bfin_read_CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA3(/;"	d
bfin_read_CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_DATA3(/;"	d
bfin_read_CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_ID0(/;"	d
bfin_read_CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_ID0(/;"	d
bfin_read_CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_ID0(/;"	d
bfin_read_CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_ID1(/;"	d
bfin_read_CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_ID1(/;"	d
bfin_read_CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_ID1(/;"	d
bfin_read_CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_LENGTH(/;"	d
bfin_read_CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_LENGTH(/;"	d
bfin_read_CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_LENGTH(/;"	d
bfin_read_CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB19_TIMESTAMP(/;"	d
bfin_read_CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB19_TIMESTAMP(/;"	d
bfin_read_CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB19_TIMESTAMP(/;"	d
bfin_read_CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA0(/;"	d
bfin_read_CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA0(/;"	d
bfin_read_CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA0(/;"	d
bfin_read_CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA1(/;"	d
bfin_read_CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA1(/;"	d
bfin_read_CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA1(/;"	d
bfin_read_CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA2(/;"	d
bfin_read_CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA2(/;"	d
bfin_read_CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA2(/;"	d
bfin_read_CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA3(/;"	d
bfin_read_CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA3(/;"	d
bfin_read_CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_DATA3(/;"	d
bfin_read_CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_ID0(/;"	d
bfin_read_CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_ID0(/;"	d
bfin_read_CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_ID0(/;"	d
bfin_read_CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_ID1(/;"	d
bfin_read_CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_ID1(/;"	d
bfin_read_CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_ID1(/;"	d
bfin_read_CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_LENGTH(/;"	d
bfin_read_CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_LENGTH(/;"	d
bfin_read_CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_LENGTH(/;"	d
bfin_read_CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB20_TIMESTAMP(/;"	d
bfin_read_CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB20_TIMESTAMP(/;"	d
bfin_read_CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB20_TIMESTAMP(/;"	d
bfin_read_CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA0(/;"	d
bfin_read_CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA0(/;"	d
bfin_read_CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA0(/;"	d
bfin_read_CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA1(/;"	d
bfin_read_CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA1(/;"	d
bfin_read_CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA1(/;"	d
bfin_read_CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA2(/;"	d
bfin_read_CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA2(/;"	d
bfin_read_CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA2(/;"	d
bfin_read_CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA3(/;"	d
bfin_read_CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA3(/;"	d
bfin_read_CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_DATA3(/;"	d
bfin_read_CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_ID0(/;"	d
bfin_read_CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_ID0(/;"	d
bfin_read_CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_ID0(/;"	d
bfin_read_CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_ID1(/;"	d
bfin_read_CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_ID1(/;"	d
bfin_read_CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_ID1(/;"	d
bfin_read_CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_LENGTH(/;"	d
bfin_read_CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_LENGTH(/;"	d
bfin_read_CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_LENGTH(/;"	d
bfin_read_CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB21_TIMESTAMP(/;"	d
bfin_read_CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB21_TIMESTAMP(/;"	d
bfin_read_CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB21_TIMESTAMP(/;"	d
bfin_read_CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA0(/;"	d
bfin_read_CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA0(/;"	d
bfin_read_CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA0(/;"	d
bfin_read_CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA1(/;"	d
bfin_read_CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA1(/;"	d
bfin_read_CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA1(/;"	d
bfin_read_CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA2(/;"	d
bfin_read_CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA2(/;"	d
bfin_read_CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA2(/;"	d
bfin_read_CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA3(/;"	d
bfin_read_CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA3(/;"	d
bfin_read_CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_DATA3(/;"	d
bfin_read_CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_ID0(/;"	d
bfin_read_CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_ID0(/;"	d
bfin_read_CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_ID0(/;"	d
bfin_read_CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_ID1(/;"	d
bfin_read_CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_ID1(/;"	d
bfin_read_CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_ID1(/;"	d
bfin_read_CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_LENGTH(/;"	d
bfin_read_CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_LENGTH(/;"	d
bfin_read_CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_LENGTH(/;"	d
bfin_read_CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB22_TIMESTAMP(/;"	d
bfin_read_CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB22_TIMESTAMP(/;"	d
bfin_read_CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB22_TIMESTAMP(/;"	d
bfin_read_CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA0(/;"	d
bfin_read_CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA0(/;"	d
bfin_read_CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA0(/;"	d
bfin_read_CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA1(/;"	d
bfin_read_CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA1(/;"	d
bfin_read_CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA1(/;"	d
bfin_read_CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA2(/;"	d
bfin_read_CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA2(/;"	d
bfin_read_CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA2(/;"	d
bfin_read_CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA3(/;"	d
bfin_read_CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA3(/;"	d
bfin_read_CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_DATA3(/;"	d
bfin_read_CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_ID0(/;"	d
bfin_read_CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_ID0(/;"	d
bfin_read_CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_ID0(/;"	d
bfin_read_CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_ID1(/;"	d
bfin_read_CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_ID1(/;"	d
bfin_read_CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_ID1(/;"	d
bfin_read_CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_LENGTH(/;"	d
bfin_read_CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_LENGTH(/;"	d
bfin_read_CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_LENGTH(/;"	d
bfin_read_CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB23_TIMESTAMP(/;"	d
bfin_read_CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB23_TIMESTAMP(/;"	d
bfin_read_CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB23_TIMESTAMP(/;"	d
bfin_read_CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA0(/;"	d
bfin_read_CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA0(/;"	d
bfin_read_CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA0(/;"	d
bfin_read_CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA1(/;"	d
bfin_read_CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA1(/;"	d
bfin_read_CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA1(/;"	d
bfin_read_CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA2(/;"	d
bfin_read_CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA2(/;"	d
bfin_read_CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA2(/;"	d
bfin_read_CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA3(/;"	d
bfin_read_CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA3(/;"	d
bfin_read_CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_DATA3(/;"	d
bfin_read_CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_ID0(/;"	d
bfin_read_CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_ID0(/;"	d
bfin_read_CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_ID0(/;"	d
bfin_read_CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_ID1(/;"	d
bfin_read_CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_ID1(/;"	d
bfin_read_CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_ID1(/;"	d
bfin_read_CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_LENGTH(/;"	d
bfin_read_CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_LENGTH(/;"	d
bfin_read_CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_LENGTH(/;"	d
bfin_read_CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB24_TIMESTAMP(/;"	d
bfin_read_CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB24_TIMESTAMP(/;"	d
bfin_read_CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB24_TIMESTAMP(/;"	d
bfin_read_CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA0(/;"	d
bfin_read_CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA0(/;"	d
bfin_read_CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA0(/;"	d
bfin_read_CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA1(/;"	d
bfin_read_CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA1(/;"	d
bfin_read_CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA1(/;"	d
bfin_read_CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA2(/;"	d
bfin_read_CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA2(/;"	d
bfin_read_CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA2(/;"	d
bfin_read_CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA3(/;"	d
bfin_read_CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA3(/;"	d
bfin_read_CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_DATA3(/;"	d
bfin_read_CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_ID0(/;"	d
bfin_read_CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_ID0(/;"	d
bfin_read_CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_ID0(/;"	d
bfin_read_CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_ID1(/;"	d
bfin_read_CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_ID1(/;"	d
bfin_read_CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_ID1(/;"	d
bfin_read_CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_LENGTH(/;"	d
bfin_read_CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_LENGTH(/;"	d
bfin_read_CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_LENGTH(/;"	d
bfin_read_CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB25_TIMESTAMP(/;"	d
bfin_read_CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB25_TIMESTAMP(/;"	d
bfin_read_CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB25_TIMESTAMP(/;"	d
bfin_read_CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA0(/;"	d
bfin_read_CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA0(/;"	d
bfin_read_CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA0(/;"	d
bfin_read_CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA1(/;"	d
bfin_read_CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA1(/;"	d
bfin_read_CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA1(/;"	d
bfin_read_CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA2(/;"	d
bfin_read_CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA2(/;"	d
bfin_read_CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA2(/;"	d
bfin_read_CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA3(/;"	d
bfin_read_CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA3(/;"	d
bfin_read_CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_DATA3(/;"	d
bfin_read_CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_ID0(/;"	d
bfin_read_CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_ID0(/;"	d
bfin_read_CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_ID0(/;"	d
bfin_read_CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_ID1(/;"	d
bfin_read_CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_ID1(/;"	d
bfin_read_CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_ID1(/;"	d
bfin_read_CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_LENGTH(/;"	d
bfin_read_CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_LENGTH(/;"	d
bfin_read_CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_LENGTH(/;"	d
bfin_read_CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB26_TIMESTAMP(/;"	d
bfin_read_CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB26_TIMESTAMP(/;"	d
bfin_read_CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB26_TIMESTAMP(/;"	d
bfin_read_CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA0(/;"	d
bfin_read_CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA0(/;"	d
bfin_read_CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA0(/;"	d
bfin_read_CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA1(/;"	d
bfin_read_CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA1(/;"	d
bfin_read_CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA1(/;"	d
bfin_read_CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA2(/;"	d
bfin_read_CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA2(/;"	d
bfin_read_CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA2(/;"	d
bfin_read_CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA3(/;"	d
bfin_read_CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA3(/;"	d
bfin_read_CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_DATA3(/;"	d
bfin_read_CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_ID0(/;"	d
bfin_read_CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_ID0(/;"	d
bfin_read_CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_ID0(/;"	d
bfin_read_CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_ID1(/;"	d
bfin_read_CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_ID1(/;"	d
bfin_read_CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_ID1(/;"	d
bfin_read_CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_LENGTH(/;"	d
bfin_read_CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_LENGTH(/;"	d
bfin_read_CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_LENGTH(/;"	d
bfin_read_CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB27_TIMESTAMP(/;"	d
bfin_read_CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB27_TIMESTAMP(/;"	d
bfin_read_CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB27_TIMESTAMP(/;"	d
bfin_read_CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA0(/;"	d
bfin_read_CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA0(/;"	d
bfin_read_CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA0(/;"	d
bfin_read_CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA1(/;"	d
bfin_read_CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA1(/;"	d
bfin_read_CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA1(/;"	d
bfin_read_CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA2(/;"	d
bfin_read_CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA2(/;"	d
bfin_read_CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA2(/;"	d
bfin_read_CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA3(/;"	d
bfin_read_CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA3(/;"	d
bfin_read_CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_DATA3(/;"	d
bfin_read_CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_ID0(/;"	d
bfin_read_CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_ID0(/;"	d
bfin_read_CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_ID0(/;"	d
bfin_read_CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_ID1(/;"	d
bfin_read_CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_ID1(/;"	d
bfin_read_CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_ID1(/;"	d
bfin_read_CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_LENGTH(/;"	d
bfin_read_CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_LENGTH(/;"	d
bfin_read_CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_LENGTH(/;"	d
bfin_read_CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB28_TIMESTAMP(/;"	d
bfin_read_CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB28_TIMESTAMP(/;"	d
bfin_read_CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB28_TIMESTAMP(/;"	d
bfin_read_CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA0(/;"	d
bfin_read_CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA0(/;"	d
bfin_read_CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA0(/;"	d
bfin_read_CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA1(/;"	d
bfin_read_CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA1(/;"	d
bfin_read_CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA1(/;"	d
bfin_read_CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA2(/;"	d
bfin_read_CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA2(/;"	d
bfin_read_CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA2(/;"	d
bfin_read_CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA3(/;"	d
bfin_read_CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA3(/;"	d
bfin_read_CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_DATA3(/;"	d
bfin_read_CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_ID0(/;"	d
bfin_read_CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_ID0(/;"	d
bfin_read_CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_ID0(/;"	d
bfin_read_CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_ID1(/;"	d
bfin_read_CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_ID1(/;"	d
bfin_read_CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_ID1(/;"	d
bfin_read_CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_LENGTH(/;"	d
bfin_read_CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_LENGTH(/;"	d
bfin_read_CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_LENGTH(/;"	d
bfin_read_CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB29_TIMESTAMP(/;"	d
bfin_read_CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB29_TIMESTAMP(/;"	d
bfin_read_CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB29_TIMESTAMP(/;"	d
bfin_read_CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA0(/;"	d
bfin_read_CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA0(/;"	d
bfin_read_CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA0(/;"	d
bfin_read_CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA1(/;"	d
bfin_read_CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA1(/;"	d
bfin_read_CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA1(/;"	d
bfin_read_CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA2(/;"	d
bfin_read_CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA2(/;"	d
bfin_read_CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA2(/;"	d
bfin_read_CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA3(/;"	d
bfin_read_CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA3(/;"	d
bfin_read_CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_DATA3(/;"	d
bfin_read_CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_ID0(/;"	d
bfin_read_CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_ID0(/;"	d
bfin_read_CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_ID0(/;"	d
bfin_read_CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_ID1(/;"	d
bfin_read_CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_ID1(/;"	d
bfin_read_CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_ID1(/;"	d
bfin_read_CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_LENGTH(/;"	d
bfin_read_CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_LENGTH(/;"	d
bfin_read_CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_LENGTH(/;"	d
bfin_read_CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB30_TIMESTAMP(/;"	d
bfin_read_CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB30_TIMESTAMP(/;"	d
bfin_read_CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB30_TIMESTAMP(/;"	d
bfin_read_CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA0(/;"	d
bfin_read_CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA0(/;"	d
bfin_read_CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA0(/;"	d
bfin_read_CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA1(/;"	d
bfin_read_CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA1(/;"	d
bfin_read_CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA1(/;"	d
bfin_read_CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA2(/;"	d
bfin_read_CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA2(/;"	d
bfin_read_CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA2(/;"	d
bfin_read_CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA3(/;"	d
bfin_read_CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA3(/;"	d
bfin_read_CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_DATA3(/;"	d
bfin_read_CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_ID0(/;"	d
bfin_read_CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_ID0(/;"	d
bfin_read_CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_ID0(/;"	d
bfin_read_CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_ID1(/;"	d
bfin_read_CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_ID1(/;"	d
bfin_read_CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_ID1(/;"	d
bfin_read_CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_LENGTH(/;"	d
bfin_read_CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_LENGTH(/;"	d
bfin_read_CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_LENGTH(/;"	d
bfin_read_CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MB31_TIMESTAMP(/;"	d
bfin_read_CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MB31_TIMESTAMP(/;"	d
bfin_read_CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MB31_TIMESTAMP(/;"	d
bfin_read_CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBIM1(/;"	d
bfin_read_CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBIM1(/;"	d
bfin_read_CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBIM1(/;"	d
bfin_read_CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBIM2(/;"	d
bfin_read_CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBIM2(/;"	d
bfin_read_CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBIM2(/;"	d
bfin_read_CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBRIF1(/;"	d
bfin_read_CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBRIF1(/;"	d
bfin_read_CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBRIF1(/;"	d
bfin_read_CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBRIF2(/;"	d
bfin_read_CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBRIF2(/;"	d
bfin_read_CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBRIF2(/;"	d
bfin_read_CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBTD(/;"	d
bfin_read_CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBTD(/;"	d
bfin_read_CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBTD(/;"	d
bfin_read_CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBTIF1(/;"	d
bfin_read_CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBTIF1(/;"	d
bfin_read_CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBTIF1(/;"	d
bfin_read_CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MBTIF2(/;"	d
bfin_read_CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MBTIF2(/;"	d
bfin_read_CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MBTIF2(/;"	d
bfin_read_CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MC1(/;"	d
bfin_read_CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MC1(/;"	d
bfin_read_CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MC1(/;"	d
bfin_read_CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MC2(/;"	d
bfin_read_CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MC2(/;"	d
bfin_read_CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MC2(/;"	d
bfin_read_CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MD1(/;"	d
bfin_read_CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MD1(/;"	d
bfin_read_CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MD1(/;"	d
bfin_read_CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_MD2(/;"	d
bfin_read_CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_MD2(/;"	d
bfin_read_CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_MD2(/;"	d
bfin_read_CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_OPSS1(/;"	d
bfin_read_CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_OPSS1(/;"	d
bfin_read_CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_OPSS1(/;"	d
bfin_read_CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_OPSS2(/;"	d
bfin_read_CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_OPSS2(/;"	d
bfin_read_CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_OPSS2(/;"	d
bfin_read_CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_RFH1(/;"	d
bfin_read_CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_RFH1(/;"	d
bfin_read_CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_RFH1(/;"	d
bfin_read_CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_RFH2(/;"	d
bfin_read_CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_RFH2(/;"	d
bfin_read_CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_RFH2(/;"	d
bfin_read_CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_RML1(/;"	d
bfin_read_CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_RML1(/;"	d
bfin_read_CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_RML1(/;"	d
bfin_read_CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_RML2(/;"	d
bfin_read_CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_RML2(/;"	d
bfin_read_CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_RML2(/;"	d
bfin_read_CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_RMP1(/;"	d
bfin_read_CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_RMP1(/;"	d
bfin_read_CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_RMP1(/;"	d
bfin_read_CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_RMP2(/;"	d
bfin_read_CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_RMP2(/;"	d
bfin_read_CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_RMP2(/;"	d
bfin_read_CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_STATUS(/;"	d
bfin_read_CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_STATUS(/;"	d
bfin_read_CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_STATUS(/;"	d
bfin_read_CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TA1(/;"	d
bfin_read_CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TA1(/;"	d
bfin_read_CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TA1(/;"	d
bfin_read_CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TA2(/;"	d
bfin_read_CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TA2(/;"	d
bfin_read_CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TA2(/;"	d
bfin_read_CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TIMING(/;"	d
bfin_read_CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TIMING(/;"	d
bfin_read_CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TIMING(/;"	d
bfin_read_CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TRR1(/;"	d
bfin_read_CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TRR1(/;"	d
bfin_read_CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TRR1(/;"	d
bfin_read_CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TRR2(/;"	d
bfin_read_CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TRR2(/;"	d
bfin_read_CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TRR2(/;"	d
bfin_read_CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TRS1(/;"	d
bfin_read_CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TRS1(/;"	d
bfin_read_CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TRS1(/;"	d
bfin_read_CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_TRS2(/;"	d
bfin_read_CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_TRS2(/;"	d
bfin_read_CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_TRS2(/;"	d
bfin_read_CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_UCCNF(/;"	d
bfin_read_CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_UCCNF(/;"	d
bfin_read_CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_UCCNF(/;"	d
bfin_read_CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_UCCNT(/;"	d
bfin_read_CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_UCCNT(/;"	d
bfin_read_CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_UCCNT(/;"	d
bfin_read_CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CAN1_UCRC(/;"	d
bfin_read_CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CAN1_UCRC(/;"	d
bfin_read_CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CAN1_UCRC(/;"	d
bfin_read_CAN_AA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AA1(/;"	d
bfin_read_CAN_AA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AA1(/;"	d
bfin_read_CAN_AA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AA1(/;"	d
bfin_read_CAN_AA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AA2(/;"	d
bfin_read_CAN_AA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AA2(/;"	d
bfin_read_CAN_AA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AA2(/;"	d
bfin_read_CAN_AM00H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM00H(/;"	d
bfin_read_CAN_AM00H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM00H(/;"	d
bfin_read_CAN_AM00H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM00H(/;"	d
bfin_read_CAN_AM00L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM00L(/;"	d
bfin_read_CAN_AM00L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM00L(/;"	d
bfin_read_CAN_AM00L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM00L(/;"	d
bfin_read_CAN_AM01H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM01H(/;"	d
bfin_read_CAN_AM01H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM01H(/;"	d
bfin_read_CAN_AM01H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM01H(/;"	d
bfin_read_CAN_AM01L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM01L(/;"	d
bfin_read_CAN_AM01L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM01L(/;"	d
bfin_read_CAN_AM01L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM01L(/;"	d
bfin_read_CAN_AM02H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM02H(/;"	d
bfin_read_CAN_AM02H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM02H(/;"	d
bfin_read_CAN_AM02H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM02H(/;"	d
bfin_read_CAN_AM02L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM02L(/;"	d
bfin_read_CAN_AM02L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM02L(/;"	d
bfin_read_CAN_AM02L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM02L(/;"	d
bfin_read_CAN_AM03H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM03H(/;"	d
bfin_read_CAN_AM03H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM03H(/;"	d
bfin_read_CAN_AM03H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM03H(/;"	d
bfin_read_CAN_AM03L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM03L(/;"	d
bfin_read_CAN_AM03L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM03L(/;"	d
bfin_read_CAN_AM03L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM03L(/;"	d
bfin_read_CAN_AM04H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM04H(/;"	d
bfin_read_CAN_AM04H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM04H(/;"	d
bfin_read_CAN_AM04H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM04H(/;"	d
bfin_read_CAN_AM04L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM04L(/;"	d
bfin_read_CAN_AM04L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM04L(/;"	d
bfin_read_CAN_AM04L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM04L(/;"	d
bfin_read_CAN_AM05H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM05H(/;"	d
bfin_read_CAN_AM05H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM05H(/;"	d
bfin_read_CAN_AM05H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM05H(/;"	d
bfin_read_CAN_AM05L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM05L(/;"	d
bfin_read_CAN_AM05L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM05L(/;"	d
bfin_read_CAN_AM05L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM05L(/;"	d
bfin_read_CAN_AM06H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM06H(/;"	d
bfin_read_CAN_AM06H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM06H(/;"	d
bfin_read_CAN_AM06H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM06H(/;"	d
bfin_read_CAN_AM06L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM06L(/;"	d
bfin_read_CAN_AM06L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM06L(/;"	d
bfin_read_CAN_AM06L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM06L(/;"	d
bfin_read_CAN_AM07H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM07H(/;"	d
bfin_read_CAN_AM07H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM07H(/;"	d
bfin_read_CAN_AM07H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM07H(/;"	d
bfin_read_CAN_AM07L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM07L(/;"	d
bfin_read_CAN_AM07L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM07L(/;"	d
bfin_read_CAN_AM07L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM07L(/;"	d
bfin_read_CAN_AM08H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM08H(/;"	d
bfin_read_CAN_AM08H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM08H(/;"	d
bfin_read_CAN_AM08H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM08H(/;"	d
bfin_read_CAN_AM08L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM08L(/;"	d
bfin_read_CAN_AM08L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM08L(/;"	d
bfin_read_CAN_AM08L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM08L(/;"	d
bfin_read_CAN_AM09H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM09H(/;"	d
bfin_read_CAN_AM09H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM09H(/;"	d
bfin_read_CAN_AM09H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM09H(/;"	d
bfin_read_CAN_AM09L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM09L(/;"	d
bfin_read_CAN_AM09L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM09L(/;"	d
bfin_read_CAN_AM09L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM09L(/;"	d
bfin_read_CAN_AM10H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM10H(/;"	d
bfin_read_CAN_AM10H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM10H(/;"	d
bfin_read_CAN_AM10H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM10H(/;"	d
bfin_read_CAN_AM10L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM10L(/;"	d
bfin_read_CAN_AM10L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM10L(/;"	d
bfin_read_CAN_AM10L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM10L(/;"	d
bfin_read_CAN_AM11H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM11H(/;"	d
bfin_read_CAN_AM11H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM11H(/;"	d
bfin_read_CAN_AM11H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM11H(/;"	d
bfin_read_CAN_AM11L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM11L(/;"	d
bfin_read_CAN_AM11L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM11L(/;"	d
bfin_read_CAN_AM11L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM11L(/;"	d
bfin_read_CAN_AM12H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM12H(/;"	d
bfin_read_CAN_AM12H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM12H(/;"	d
bfin_read_CAN_AM12H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM12H(/;"	d
bfin_read_CAN_AM12L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM12L(/;"	d
bfin_read_CAN_AM12L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM12L(/;"	d
bfin_read_CAN_AM12L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM12L(/;"	d
bfin_read_CAN_AM13H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM13H(/;"	d
bfin_read_CAN_AM13H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM13H(/;"	d
bfin_read_CAN_AM13H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM13H(/;"	d
bfin_read_CAN_AM13L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM13L(/;"	d
bfin_read_CAN_AM13L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM13L(/;"	d
bfin_read_CAN_AM13L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM13L(/;"	d
bfin_read_CAN_AM14H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM14H(/;"	d
bfin_read_CAN_AM14H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM14H(/;"	d
bfin_read_CAN_AM14H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM14H(/;"	d
bfin_read_CAN_AM14L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM14L(/;"	d
bfin_read_CAN_AM14L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM14L(/;"	d
bfin_read_CAN_AM14L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM14L(/;"	d
bfin_read_CAN_AM15H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM15H(/;"	d
bfin_read_CAN_AM15H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM15H(/;"	d
bfin_read_CAN_AM15H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM15H(/;"	d
bfin_read_CAN_AM15L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM15L(/;"	d
bfin_read_CAN_AM15L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM15L(/;"	d
bfin_read_CAN_AM15L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM15L(/;"	d
bfin_read_CAN_AM16H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM16H(/;"	d
bfin_read_CAN_AM16H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM16H(/;"	d
bfin_read_CAN_AM16H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM16H(/;"	d
bfin_read_CAN_AM16L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM16L(/;"	d
bfin_read_CAN_AM16L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM16L(/;"	d
bfin_read_CAN_AM16L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM16L(/;"	d
bfin_read_CAN_AM17H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM17H(/;"	d
bfin_read_CAN_AM17H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM17H(/;"	d
bfin_read_CAN_AM17H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM17H(/;"	d
bfin_read_CAN_AM17L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM17L(/;"	d
bfin_read_CAN_AM17L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM17L(/;"	d
bfin_read_CAN_AM17L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM17L(/;"	d
bfin_read_CAN_AM18H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM18H(/;"	d
bfin_read_CAN_AM18H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM18H(/;"	d
bfin_read_CAN_AM18H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM18H(/;"	d
bfin_read_CAN_AM18L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM18L(/;"	d
bfin_read_CAN_AM18L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM18L(/;"	d
bfin_read_CAN_AM18L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM18L(/;"	d
bfin_read_CAN_AM19H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM19H(/;"	d
bfin_read_CAN_AM19H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM19H(/;"	d
bfin_read_CAN_AM19H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM19H(/;"	d
bfin_read_CAN_AM19L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM19L(/;"	d
bfin_read_CAN_AM19L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM19L(/;"	d
bfin_read_CAN_AM19L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM19L(/;"	d
bfin_read_CAN_AM20H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM20H(/;"	d
bfin_read_CAN_AM20H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM20H(/;"	d
bfin_read_CAN_AM20H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM20H(/;"	d
bfin_read_CAN_AM20L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM20L(/;"	d
bfin_read_CAN_AM20L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM20L(/;"	d
bfin_read_CAN_AM20L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM20L(/;"	d
bfin_read_CAN_AM21H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM21H(/;"	d
bfin_read_CAN_AM21H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM21H(/;"	d
bfin_read_CAN_AM21H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM21H(/;"	d
bfin_read_CAN_AM21L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM21L(/;"	d
bfin_read_CAN_AM21L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM21L(/;"	d
bfin_read_CAN_AM21L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM21L(/;"	d
bfin_read_CAN_AM22H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM22H(/;"	d
bfin_read_CAN_AM22H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM22H(/;"	d
bfin_read_CAN_AM22H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM22H(/;"	d
bfin_read_CAN_AM22L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM22L(/;"	d
bfin_read_CAN_AM22L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM22L(/;"	d
bfin_read_CAN_AM22L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM22L(/;"	d
bfin_read_CAN_AM23H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM23H(/;"	d
bfin_read_CAN_AM23H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM23H(/;"	d
bfin_read_CAN_AM23H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM23H(/;"	d
bfin_read_CAN_AM23L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM23L(/;"	d
bfin_read_CAN_AM23L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM23L(/;"	d
bfin_read_CAN_AM23L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM23L(/;"	d
bfin_read_CAN_AM24H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM24H(/;"	d
bfin_read_CAN_AM24H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM24H(/;"	d
bfin_read_CAN_AM24H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM24H(/;"	d
bfin_read_CAN_AM24L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM24L(/;"	d
bfin_read_CAN_AM24L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM24L(/;"	d
bfin_read_CAN_AM24L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM24L(/;"	d
bfin_read_CAN_AM25H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM25H(/;"	d
bfin_read_CAN_AM25H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM25H(/;"	d
bfin_read_CAN_AM25H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM25H(/;"	d
bfin_read_CAN_AM25L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM25L(/;"	d
bfin_read_CAN_AM25L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM25L(/;"	d
bfin_read_CAN_AM25L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM25L(/;"	d
bfin_read_CAN_AM26H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM26H(/;"	d
bfin_read_CAN_AM26H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM26H(/;"	d
bfin_read_CAN_AM26H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM26H(/;"	d
bfin_read_CAN_AM26L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM26L(/;"	d
bfin_read_CAN_AM26L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM26L(/;"	d
bfin_read_CAN_AM26L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM26L(/;"	d
bfin_read_CAN_AM27H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM27H(/;"	d
bfin_read_CAN_AM27H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM27H(/;"	d
bfin_read_CAN_AM27H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM27H(/;"	d
bfin_read_CAN_AM27L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM27L(/;"	d
bfin_read_CAN_AM27L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM27L(/;"	d
bfin_read_CAN_AM27L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM27L(/;"	d
bfin_read_CAN_AM28H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM28H(/;"	d
bfin_read_CAN_AM28H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM28H(/;"	d
bfin_read_CAN_AM28H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM28H(/;"	d
bfin_read_CAN_AM28L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM28L(/;"	d
bfin_read_CAN_AM28L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM28L(/;"	d
bfin_read_CAN_AM28L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM28L(/;"	d
bfin_read_CAN_AM29H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM29H(/;"	d
bfin_read_CAN_AM29H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM29H(/;"	d
bfin_read_CAN_AM29H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM29H(/;"	d
bfin_read_CAN_AM29L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM29L(/;"	d
bfin_read_CAN_AM29L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM29L(/;"	d
bfin_read_CAN_AM29L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM29L(/;"	d
bfin_read_CAN_AM30H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM30H(/;"	d
bfin_read_CAN_AM30H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM30H(/;"	d
bfin_read_CAN_AM30H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM30H(/;"	d
bfin_read_CAN_AM30L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM30L(/;"	d
bfin_read_CAN_AM30L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM30L(/;"	d
bfin_read_CAN_AM30L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM30L(/;"	d
bfin_read_CAN_AM31H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM31H(/;"	d
bfin_read_CAN_AM31H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM31H(/;"	d
bfin_read_CAN_AM31H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM31H(/;"	d
bfin_read_CAN_AM31L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_AM31L(/;"	d
bfin_read_CAN_AM31L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_AM31L(/;"	d
bfin_read_CAN_AM31L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_AM31L(/;"	d
bfin_read_CAN_CEC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_CEC(/;"	d
bfin_read_CAN_CEC	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_CEC(/;"	d
bfin_read_CAN_CEC	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_CEC(/;"	d
bfin_read_CAN_CLOCK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_CLOCK(/;"	d
bfin_read_CAN_CLOCK	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_CLOCK(/;"	d
bfin_read_CAN_CLOCK	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_CLOCK(/;"	d
bfin_read_CAN_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_CONTROL(/;"	d
bfin_read_CAN_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_CONTROL(/;"	d
bfin_read_CAN_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_CONTROL(/;"	d
bfin_read_CAN_DEBUG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_DEBUG(/;"	d
bfin_read_CAN_DEBUG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_DEBUG(/;"	d
bfin_read_CAN_DEBUG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_DEBUG(/;"	d
bfin_read_CAN_ESR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_ESR(/;"	d
bfin_read_CAN_ESR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_ESR(/;"	d
bfin_read_CAN_ESR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_ESR(/;"	d
bfin_read_CAN_EWR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_EWR(/;"	d
bfin_read_CAN_EWR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_EWR(/;"	d
bfin_read_CAN_EWR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_EWR(/;"	d
bfin_read_CAN_GIF	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_GIF(/;"	d
bfin_read_CAN_GIF	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_GIF(/;"	d
bfin_read_CAN_GIF	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_GIF(/;"	d
bfin_read_CAN_GIM	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_GIM(/;"	d
bfin_read_CAN_GIM	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_GIM(/;"	d
bfin_read_CAN_GIM	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_GIM(/;"	d
bfin_read_CAN_GIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_GIS(/;"	d
bfin_read_CAN_GIS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_GIS(/;"	d
bfin_read_CAN_GIS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_GIS(/;"	d
bfin_read_CAN_INTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_INTR(/;"	d
bfin_read_CAN_INTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_INTR(/;"	d
bfin_read_CAN_INTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_INTR(/;"	d
bfin_read_CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_DATA0(/;"	d
bfin_read_CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_DATA0(/;"	d
bfin_read_CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_DATA0(/;"	d
bfin_read_CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_DATA1(/;"	d
bfin_read_CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_DATA1(/;"	d
bfin_read_CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_DATA1(/;"	d
bfin_read_CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_DATA2(/;"	d
bfin_read_CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_DATA2(/;"	d
bfin_read_CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_DATA2(/;"	d
bfin_read_CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_DATA3(/;"	d
bfin_read_CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_DATA3(/;"	d
bfin_read_CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_DATA3(/;"	d
bfin_read_CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_ID0(/;"	d
bfin_read_CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_ID0(/;"	d
bfin_read_CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_ID0(/;"	d
bfin_read_CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_ID1(/;"	d
bfin_read_CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_ID1(/;"	d
bfin_read_CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_ID1(/;"	d
bfin_read_CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_LENGTH(/;"	d
bfin_read_CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_LENGTH(/;"	d
bfin_read_CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_LENGTH(/;"	d
bfin_read_CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB00_TIMESTAMP(/;"	d
bfin_read_CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB00_TIMESTAMP(/;"	d
bfin_read_CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB00_TIMESTAMP(/;"	d
bfin_read_CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_DATA0(/;"	d
bfin_read_CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_DATA0(/;"	d
bfin_read_CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_DATA0(/;"	d
bfin_read_CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_DATA1(/;"	d
bfin_read_CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_DATA1(/;"	d
bfin_read_CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_DATA1(/;"	d
bfin_read_CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_DATA2(/;"	d
bfin_read_CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_DATA2(/;"	d
bfin_read_CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_DATA2(/;"	d
bfin_read_CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_DATA3(/;"	d
bfin_read_CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_DATA3(/;"	d
bfin_read_CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_DATA3(/;"	d
bfin_read_CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_ID0(/;"	d
bfin_read_CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_ID0(/;"	d
bfin_read_CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_ID0(/;"	d
bfin_read_CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_ID1(/;"	d
bfin_read_CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_ID1(/;"	d
bfin_read_CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_ID1(/;"	d
bfin_read_CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_LENGTH(/;"	d
bfin_read_CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_LENGTH(/;"	d
bfin_read_CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_LENGTH(/;"	d
bfin_read_CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB01_TIMESTAMP(/;"	d
bfin_read_CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB01_TIMESTAMP(/;"	d
bfin_read_CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB01_TIMESTAMP(/;"	d
bfin_read_CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_DATA0(/;"	d
bfin_read_CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_DATA0(/;"	d
bfin_read_CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_DATA0(/;"	d
bfin_read_CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_DATA1(/;"	d
bfin_read_CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_DATA1(/;"	d
bfin_read_CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_DATA1(/;"	d
bfin_read_CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_DATA2(/;"	d
bfin_read_CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_DATA2(/;"	d
bfin_read_CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_DATA2(/;"	d
bfin_read_CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_DATA3(/;"	d
bfin_read_CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_DATA3(/;"	d
bfin_read_CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_DATA3(/;"	d
bfin_read_CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_ID0(/;"	d
bfin_read_CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_ID0(/;"	d
bfin_read_CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_ID0(/;"	d
bfin_read_CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_ID1(/;"	d
bfin_read_CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_ID1(/;"	d
bfin_read_CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_ID1(/;"	d
bfin_read_CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_LENGTH(/;"	d
bfin_read_CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_LENGTH(/;"	d
bfin_read_CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_LENGTH(/;"	d
bfin_read_CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB02_TIMESTAMP(/;"	d
bfin_read_CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB02_TIMESTAMP(/;"	d
bfin_read_CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB02_TIMESTAMP(/;"	d
bfin_read_CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_DATA0(/;"	d
bfin_read_CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_DATA0(/;"	d
bfin_read_CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_DATA0(/;"	d
bfin_read_CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_DATA1(/;"	d
bfin_read_CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_DATA1(/;"	d
bfin_read_CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_DATA1(/;"	d
bfin_read_CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_DATA2(/;"	d
bfin_read_CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_DATA2(/;"	d
bfin_read_CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_DATA2(/;"	d
bfin_read_CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_DATA3(/;"	d
bfin_read_CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_DATA3(/;"	d
bfin_read_CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_DATA3(/;"	d
bfin_read_CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_ID0(/;"	d
bfin_read_CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_ID0(/;"	d
bfin_read_CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_ID0(/;"	d
bfin_read_CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_ID1(/;"	d
bfin_read_CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_ID1(/;"	d
bfin_read_CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_ID1(/;"	d
bfin_read_CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_LENGTH(/;"	d
bfin_read_CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_LENGTH(/;"	d
bfin_read_CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_LENGTH(/;"	d
bfin_read_CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB03_TIMESTAMP(/;"	d
bfin_read_CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB03_TIMESTAMP(/;"	d
bfin_read_CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB03_TIMESTAMP(/;"	d
bfin_read_CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_DATA0(/;"	d
bfin_read_CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_DATA0(/;"	d
bfin_read_CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_DATA0(/;"	d
bfin_read_CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_DATA1(/;"	d
bfin_read_CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_DATA1(/;"	d
bfin_read_CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_DATA1(/;"	d
bfin_read_CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_DATA2(/;"	d
bfin_read_CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_DATA2(/;"	d
bfin_read_CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_DATA2(/;"	d
bfin_read_CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_DATA3(/;"	d
bfin_read_CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_DATA3(/;"	d
bfin_read_CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_DATA3(/;"	d
bfin_read_CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_ID0(/;"	d
bfin_read_CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_ID0(/;"	d
bfin_read_CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_ID0(/;"	d
bfin_read_CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_ID1(/;"	d
bfin_read_CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_ID1(/;"	d
bfin_read_CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_ID1(/;"	d
bfin_read_CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_LENGTH(/;"	d
bfin_read_CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_LENGTH(/;"	d
bfin_read_CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_LENGTH(/;"	d
bfin_read_CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB04_TIMESTAMP(/;"	d
bfin_read_CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB04_TIMESTAMP(/;"	d
bfin_read_CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB04_TIMESTAMP(/;"	d
bfin_read_CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_DATA0(/;"	d
bfin_read_CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_DATA0(/;"	d
bfin_read_CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_DATA0(/;"	d
bfin_read_CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_DATA1(/;"	d
bfin_read_CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_DATA1(/;"	d
bfin_read_CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_DATA1(/;"	d
bfin_read_CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_DATA2(/;"	d
bfin_read_CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_DATA2(/;"	d
bfin_read_CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_DATA2(/;"	d
bfin_read_CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_DATA3(/;"	d
bfin_read_CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_DATA3(/;"	d
bfin_read_CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_DATA3(/;"	d
bfin_read_CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_ID0(/;"	d
bfin_read_CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_ID0(/;"	d
bfin_read_CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_ID0(/;"	d
bfin_read_CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_ID1(/;"	d
bfin_read_CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_ID1(/;"	d
bfin_read_CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_ID1(/;"	d
bfin_read_CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_LENGTH(/;"	d
bfin_read_CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_LENGTH(/;"	d
bfin_read_CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_LENGTH(/;"	d
bfin_read_CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB05_TIMESTAMP(/;"	d
bfin_read_CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB05_TIMESTAMP(/;"	d
bfin_read_CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB05_TIMESTAMP(/;"	d
bfin_read_CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_DATA0(/;"	d
bfin_read_CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_DATA0(/;"	d
bfin_read_CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_DATA0(/;"	d
bfin_read_CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_DATA1(/;"	d
bfin_read_CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_DATA1(/;"	d
bfin_read_CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_DATA1(/;"	d
bfin_read_CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_DATA2(/;"	d
bfin_read_CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_DATA2(/;"	d
bfin_read_CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_DATA2(/;"	d
bfin_read_CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_DATA3(/;"	d
bfin_read_CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_DATA3(/;"	d
bfin_read_CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_DATA3(/;"	d
bfin_read_CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_ID0(/;"	d
bfin_read_CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_ID0(/;"	d
bfin_read_CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_ID0(/;"	d
bfin_read_CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_ID1(/;"	d
bfin_read_CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_ID1(/;"	d
bfin_read_CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_ID1(/;"	d
bfin_read_CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_LENGTH(/;"	d
bfin_read_CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_LENGTH(/;"	d
bfin_read_CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_LENGTH(/;"	d
bfin_read_CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB06_TIMESTAMP(/;"	d
bfin_read_CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB06_TIMESTAMP(/;"	d
bfin_read_CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB06_TIMESTAMP(/;"	d
bfin_read_CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_DATA0(/;"	d
bfin_read_CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_DATA0(/;"	d
bfin_read_CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_DATA0(/;"	d
bfin_read_CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_DATA1(/;"	d
bfin_read_CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_DATA1(/;"	d
bfin_read_CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_DATA1(/;"	d
bfin_read_CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_DATA2(/;"	d
bfin_read_CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_DATA2(/;"	d
bfin_read_CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_DATA2(/;"	d
bfin_read_CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_DATA3(/;"	d
bfin_read_CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_DATA3(/;"	d
bfin_read_CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_DATA3(/;"	d
bfin_read_CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_ID0(/;"	d
bfin_read_CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_ID0(/;"	d
bfin_read_CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_ID0(/;"	d
bfin_read_CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_ID1(/;"	d
bfin_read_CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_ID1(/;"	d
bfin_read_CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_ID1(/;"	d
bfin_read_CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_LENGTH(/;"	d
bfin_read_CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_LENGTH(/;"	d
bfin_read_CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_LENGTH(/;"	d
bfin_read_CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB07_TIMESTAMP(/;"	d
bfin_read_CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB07_TIMESTAMP(/;"	d
bfin_read_CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB07_TIMESTAMP(/;"	d
bfin_read_CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_DATA0(/;"	d
bfin_read_CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_DATA0(/;"	d
bfin_read_CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_DATA0(/;"	d
bfin_read_CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_DATA1(/;"	d
bfin_read_CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_DATA1(/;"	d
bfin_read_CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_DATA1(/;"	d
bfin_read_CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_DATA2(/;"	d
bfin_read_CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_DATA2(/;"	d
bfin_read_CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_DATA2(/;"	d
bfin_read_CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_DATA3(/;"	d
bfin_read_CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_DATA3(/;"	d
bfin_read_CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_DATA3(/;"	d
bfin_read_CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_ID0(/;"	d
bfin_read_CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_ID0(/;"	d
bfin_read_CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_ID0(/;"	d
bfin_read_CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_ID1(/;"	d
bfin_read_CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_ID1(/;"	d
bfin_read_CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_ID1(/;"	d
bfin_read_CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_LENGTH(/;"	d
bfin_read_CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_LENGTH(/;"	d
bfin_read_CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_LENGTH(/;"	d
bfin_read_CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB08_TIMESTAMP(/;"	d
bfin_read_CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB08_TIMESTAMP(/;"	d
bfin_read_CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB08_TIMESTAMP(/;"	d
bfin_read_CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_DATA0(/;"	d
bfin_read_CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_DATA0(/;"	d
bfin_read_CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_DATA0(/;"	d
bfin_read_CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_DATA1(/;"	d
bfin_read_CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_DATA1(/;"	d
bfin_read_CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_DATA1(/;"	d
bfin_read_CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_DATA2(/;"	d
bfin_read_CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_DATA2(/;"	d
bfin_read_CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_DATA2(/;"	d
bfin_read_CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_DATA3(/;"	d
bfin_read_CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_DATA3(/;"	d
bfin_read_CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_DATA3(/;"	d
bfin_read_CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_ID0(/;"	d
bfin_read_CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_ID0(/;"	d
bfin_read_CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_ID0(/;"	d
bfin_read_CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_ID1(/;"	d
bfin_read_CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_ID1(/;"	d
bfin_read_CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_ID1(/;"	d
bfin_read_CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_LENGTH(/;"	d
bfin_read_CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_LENGTH(/;"	d
bfin_read_CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_LENGTH(/;"	d
bfin_read_CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB09_TIMESTAMP(/;"	d
bfin_read_CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB09_TIMESTAMP(/;"	d
bfin_read_CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB09_TIMESTAMP(/;"	d
bfin_read_CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_DATA0(/;"	d
bfin_read_CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_DATA0(/;"	d
bfin_read_CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_DATA0(/;"	d
bfin_read_CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_DATA1(/;"	d
bfin_read_CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_DATA1(/;"	d
bfin_read_CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_DATA1(/;"	d
bfin_read_CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_DATA2(/;"	d
bfin_read_CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_DATA2(/;"	d
bfin_read_CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_DATA2(/;"	d
bfin_read_CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_DATA3(/;"	d
bfin_read_CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_DATA3(/;"	d
bfin_read_CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_DATA3(/;"	d
bfin_read_CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_ID0(/;"	d
bfin_read_CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_ID0(/;"	d
bfin_read_CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_ID0(/;"	d
bfin_read_CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_ID1(/;"	d
bfin_read_CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_ID1(/;"	d
bfin_read_CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_ID1(/;"	d
bfin_read_CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_LENGTH(/;"	d
bfin_read_CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_LENGTH(/;"	d
bfin_read_CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_LENGTH(/;"	d
bfin_read_CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB10_TIMESTAMP(/;"	d
bfin_read_CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB10_TIMESTAMP(/;"	d
bfin_read_CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB10_TIMESTAMP(/;"	d
bfin_read_CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_DATA0(/;"	d
bfin_read_CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_DATA0(/;"	d
bfin_read_CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_DATA0(/;"	d
bfin_read_CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_DATA1(/;"	d
bfin_read_CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_DATA1(/;"	d
bfin_read_CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_DATA1(/;"	d
bfin_read_CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_DATA2(/;"	d
bfin_read_CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_DATA2(/;"	d
bfin_read_CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_DATA2(/;"	d
bfin_read_CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_DATA3(/;"	d
bfin_read_CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_DATA3(/;"	d
bfin_read_CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_DATA3(/;"	d
bfin_read_CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_ID0(/;"	d
bfin_read_CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_ID0(/;"	d
bfin_read_CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_ID0(/;"	d
bfin_read_CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_ID1(/;"	d
bfin_read_CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_ID1(/;"	d
bfin_read_CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_ID1(/;"	d
bfin_read_CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_LENGTH(/;"	d
bfin_read_CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_LENGTH(/;"	d
bfin_read_CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_LENGTH(/;"	d
bfin_read_CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB11_TIMESTAMP(/;"	d
bfin_read_CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB11_TIMESTAMP(/;"	d
bfin_read_CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB11_TIMESTAMP(/;"	d
bfin_read_CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_DATA0(/;"	d
bfin_read_CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_DATA0(/;"	d
bfin_read_CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_DATA0(/;"	d
bfin_read_CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_DATA1(/;"	d
bfin_read_CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_DATA1(/;"	d
bfin_read_CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_DATA1(/;"	d
bfin_read_CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_DATA2(/;"	d
bfin_read_CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_DATA2(/;"	d
bfin_read_CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_DATA2(/;"	d
bfin_read_CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_DATA3(/;"	d
bfin_read_CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_DATA3(/;"	d
bfin_read_CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_DATA3(/;"	d
bfin_read_CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_ID0(/;"	d
bfin_read_CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_ID0(/;"	d
bfin_read_CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_ID0(/;"	d
bfin_read_CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_ID1(/;"	d
bfin_read_CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_ID1(/;"	d
bfin_read_CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_ID1(/;"	d
bfin_read_CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_LENGTH(/;"	d
bfin_read_CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_LENGTH(/;"	d
bfin_read_CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_LENGTH(/;"	d
bfin_read_CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB12_TIMESTAMP(/;"	d
bfin_read_CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB12_TIMESTAMP(/;"	d
bfin_read_CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB12_TIMESTAMP(/;"	d
bfin_read_CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_DATA0(/;"	d
bfin_read_CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_DATA0(/;"	d
bfin_read_CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_DATA0(/;"	d
bfin_read_CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_DATA1(/;"	d
bfin_read_CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_DATA1(/;"	d
bfin_read_CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_DATA1(/;"	d
bfin_read_CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_DATA2(/;"	d
bfin_read_CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_DATA2(/;"	d
bfin_read_CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_DATA2(/;"	d
bfin_read_CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_DATA3(/;"	d
bfin_read_CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_DATA3(/;"	d
bfin_read_CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_DATA3(/;"	d
bfin_read_CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_ID0(/;"	d
bfin_read_CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_ID0(/;"	d
bfin_read_CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_ID0(/;"	d
bfin_read_CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_ID1(/;"	d
bfin_read_CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_ID1(/;"	d
bfin_read_CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_ID1(/;"	d
bfin_read_CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_LENGTH(/;"	d
bfin_read_CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_LENGTH(/;"	d
bfin_read_CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_LENGTH(/;"	d
bfin_read_CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB13_TIMESTAMP(/;"	d
bfin_read_CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB13_TIMESTAMP(/;"	d
bfin_read_CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB13_TIMESTAMP(/;"	d
bfin_read_CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_DATA0(/;"	d
bfin_read_CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_DATA0(/;"	d
bfin_read_CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_DATA0(/;"	d
bfin_read_CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_DATA1(/;"	d
bfin_read_CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_DATA1(/;"	d
bfin_read_CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_DATA1(/;"	d
bfin_read_CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_DATA2(/;"	d
bfin_read_CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_DATA2(/;"	d
bfin_read_CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_DATA2(/;"	d
bfin_read_CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_DATA3(/;"	d
bfin_read_CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_DATA3(/;"	d
bfin_read_CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_DATA3(/;"	d
bfin_read_CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_ID0(/;"	d
bfin_read_CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_ID0(/;"	d
bfin_read_CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_ID0(/;"	d
bfin_read_CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_ID1(/;"	d
bfin_read_CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_ID1(/;"	d
bfin_read_CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_ID1(/;"	d
bfin_read_CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_LENGTH(/;"	d
bfin_read_CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_LENGTH(/;"	d
bfin_read_CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_LENGTH(/;"	d
bfin_read_CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB14_TIMESTAMP(/;"	d
bfin_read_CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB14_TIMESTAMP(/;"	d
bfin_read_CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB14_TIMESTAMP(/;"	d
bfin_read_CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_DATA0(/;"	d
bfin_read_CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_DATA0(/;"	d
bfin_read_CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_DATA0(/;"	d
bfin_read_CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_DATA1(/;"	d
bfin_read_CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_DATA1(/;"	d
bfin_read_CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_DATA1(/;"	d
bfin_read_CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_DATA2(/;"	d
bfin_read_CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_DATA2(/;"	d
bfin_read_CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_DATA2(/;"	d
bfin_read_CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_DATA3(/;"	d
bfin_read_CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_DATA3(/;"	d
bfin_read_CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_DATA3(/;"	d
bfin_read_CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_ID0(/;"	d
bfin_read_CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_ID0(/;"	d
bfin_read_CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_ID0(/;"	d
bfin_read_CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_ID1(/;"	d
bfin_read_CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_ID1(/;"	d
bfin_read_CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_ID1(/;"	d
bfin_read_CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_LENGTH(/;"	d
bfin_read_CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_LENGTH(/;"	d
bfin_read_CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_LENGTH(/;"	d
bfin_read_CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB15_TIMESTAMP(/;"	d
bfin_read_CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB15_TIMESTAMP(/;"	d
bfin_read_CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB15_TIMESTAMP(/;"	d
bfin_read_CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_DATA0(/;"	d
bfin_read_CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_DATA0(/;"	d
bfin_read_CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_DATA0(/;"	d
bfin_read_CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_DATA1(/;"	d
bfin_read_CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_DATA1(/;"	d
bfin_read_CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_DATA1(/;"	d
bfin_read_CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_DATA2(/;"	d
bfin_read_CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_DATA2(/;"	d
bfin_read_CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_DATA2(/;"	d
bfin_read_CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_DATA3(/;"	d
bfin_read_CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_DATA3(/;"	d
bfin_read_CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_DATA3(/;"	d
bfin_read_CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_ID0(/;"	d
bfin_read_CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_ID0(/;"	d
bfin_read_CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_ID0(/;"	d
bfin_read_CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_ID1(/;"	d
bfin_read_CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_ID1(/;"	d
bfin_read_CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_ID1(/;"	d
bfin_read_CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_LENGTH(/;"	d
bfin_read_CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_LENGTH(/;"	d
bfin_read_CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_LENGTH(/;"	d
bfin_read_CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB16_TIMESTAMP(/;"	d
bfin_read_CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB16_TIMESTAMP(/;"	d
bfin_read_CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB16_TIMESTAMP(/;"	d
bfin_read_CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_DATA0(/;"	d
bfin_read_CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_DATA0(/;"	d
bfin_read_CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_DATA0(/;"	d
bfin_read_CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_DATA1(/;"	d
bfin_read_CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_DATA1(/;"	d
bfin_read_CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_DATA1(/;"	d
bfin_read_CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_DATA2(/;"	d
bfin_read_CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_DATA2(/;"	d
bfin_read_CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_DATA2(/;"	d
bfin_read_CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_DATA3(/;"	d
bfin_read_CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_DATA3(/;"	d
bfin_read_CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_DATA3(/;"	d
bfin_read_CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_ID0(/;"	d
bfin_read_CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_ID0(/;"	d
bfin_read_CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_ID0(/;"	d
bfin_read_CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_ID1(/;"	d
bfin_read_CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_ID1(/;"	d
bfin_read_CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_ID1(/;"	d
bfin_read_CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_LENGTH(/;"	d
bfin_read_CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_LENGTH(/;"	d
bfin_read_CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_LENGTH(/;"	d
bfin_read_CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB17_TIMESTAMP(/;"	d
bfin_read_CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB17_TIMESTAMP(/;"	d
bfin_read_CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB17_TIMESTAMP(/;"	d
bfin_read_CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_DATA0(/;"	d
bfin_read_CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_DATA0(/;"	d
bfin_read_CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_DATA0(/;"	d
bfin_read_CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_DATA1(/;"	d
bfin_read_CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_DATA1(/;"	d
bfin_read_CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_DATA1(/;"	d
bfin_read_CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_DATA2(/;"	d
bfin_read_CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_DATA2(/;"	d
bfin_read_CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_DATA2(/;"	d
bfin_read_CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_DATA3(/;"	d
bfin_read_CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_DATA3(/;"	d
bfin_read_CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_DATA3(/;"	d
bfin_read_CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_ID0(/;"	d
bfin_read_CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_ID0(/;"	d
bfin_read_CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_ID0(/;"	d
bfin_read_CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_ID1(/;"	d
bfin_read_CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_ID1(/;"	d
bfin_read_CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_ID1(/;"	d
bfin_read_CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_LENGTH(/;"	d
bfin_read_CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_LENGTH(/;"	d
bfin_read_CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_LENGTH(/;"	d
bfin_read_CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB18_TIMESTAMP(/;"	d
bfin_read_CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB18_TIMESTAMP(/;"	d
bfin_read_CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB18_TIMESTAMP(/;"	d
bfin_read_CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_DATA0(/;"	d
bfin_read_CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_DATA0(/;"	d
bfin_read_CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_DATA0(/;"	d
bfin_read_CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_DATA1(/;"	d
bfin_read_CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_DATA1(/;"	d
bfin_read_CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_DATA1(/;"	d
bfin_read_CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_DATA2(/;"	d
bfin_read_CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_DATA2(/;"	d
bfin_read_CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_DATA2(/;"	d
bfin_read_CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_DATA3(/;"	d
bfin_read_CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_DATA3(/;"	d
bfin_read_CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_DATA3(/;"	d
bfin_read_CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_ID0(/;"	d
bfin_read_CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_ID0(/;"	d
bfin_read_CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_ID0(/;"	d
bfin_read_CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_ID1(/;"	d
bfin_read_CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_ID1(/;"	d
bfin_read_CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_ID1(/;"	d
bfin_read_CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_LENGTH(/;"	d
bfin_read_CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_LENGTH(/;"	d
bfin_read_CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_LENGTH(/;"	d
bfin_read_CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB19_TIMESTAMP(/;"	d
bfin_read_CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB19_TIMESTAMP(/;"	d
bfin_read_CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB19_TIMESTAMP(/;"	d
bfin_read_CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_DATA0(/;"	d
bfin_read_CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_DATA0(/;"	d
bfin_read_CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_DATA0(/;"	d
bfin_read_CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_DATA1(/;"	d
bfin_read_CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_DATA1(/;"	d
bfin_read_CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_DATA1(/;"	d
bfin_read_CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_DATA2(/;"	d
bfin_read_CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_DATA2(/;"	d
bfin_read_CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_DATA2(/;"	d
bfin_read_CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_DATA3(/;"	d
bfin_read_CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_DATA3(/;"	d
bfin_read_CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_DATA3(/;"	d
bfin_read_CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_ID0(/;"	d
bfin_read_CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_ID0(/;"	d
bfin_read_CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_ID0(/;"	d
bfin_read_CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_ID1(/;"	d
bfin_read_CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_ID1(/;"	d
bfin_read_CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_ID1(/;"	d
bfin_read_CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_LENGTH(/;"	d
bfin_read_CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_LENGTH(/;"	d
bfin_read_CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_LENGTH(/;"	d
bfin_read_CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB20_TIMESTAMP(/;"	d
bfin_read_CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB20_TIMESTAMP(/;"	d
bfin_read_CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB20_TIMESTAMP(/;"	d
bfin_read_CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_DATA0(/;"	d
bfin_read_CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_DATA0(/;"	d
bfin_read_CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_DATA0(/;"	d
bfin_read_CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_DATA1(/;"	d
bfin_read_CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_DATA1(/;"	d
bfin_read_CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_DATA1(/;"	d
bfin_read_CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_DATA2(/;"	d
bfin_read_CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_DATA2(/;"	d
bfin_read_CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_DATA2(/;"	d
bfin_read_CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_DATA3(/;"	d
bfin_read_CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_DATA3(/;"	d
bfin_read_CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_DATA3(/;"	d
bfin_read_CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_ID0(/;"	d
bfin_read_CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_ID0(/;"	d
bfin_read_CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_ID0(/;"	d
bfin_read_CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_ID1(/;"	d
bfin_read_CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_ID1(/;"	d
bfin_read_CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_ID1(/;"	d
bfin_read_CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_LENGTH(/;"	d
bfin_read_CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_LENGTH(/;"	d
bfin_read_CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_LENGTH(/;"	d
bfin_read_CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB21_TIMESTAMP(/;"	d
bfin_read_CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB21_TIMESTAMP(/;"	d
bfin_read_CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB21_TIMESTAMP(/;"	d
bfin_read_CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_DATA0(/;"	d
bfin_read_CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_DATA0(/;"	d
bfin_read_CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_DATA0(/;"	d
bfin_read_CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_DATA1(/;"	d
bfin_read_CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_DATA1(/;"	d
bfin_read_CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_DATA1(/;"	d
bfin_read_CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_DATA2(/;"	d
bfin_read_CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_DATA2(/;"	d
bfin_read_CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_DATA2(/;"	d
bfin_read_CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_DATA3(/;"	d
bfin_read_CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_DATA3(/;"	d
bfin_read_CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_DATA3(/;"	d
bfin_read_CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_ID0(/;"	d
bfin_read_CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_ID0(/;"	d
bfin_read_CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_ID0(/;"	d
bfin_read_CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_ID1(/;"	d
bfin_read_CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_ID1(/;"	d
bfin_read_CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_ID1(/;"	d
bfin_read_CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_LENGTH(/;"	d
bfin_read_CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_LENGTH(/;"	d
bfin_read_CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_LENGTH(/;"	d
bfin_read_CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB22_TIMESTAMP(/;"	d
bfin_read_CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB22_TIMESTAMP(/;"	d
bfin_read_CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB22_TIMESTAMP(/;"	d
bfin_read_CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_DATA0(/;"	d
bfin_read_CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_DATA0(/;"	d
bfin_read_CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_DATA0(/;"	d
bfin_read_CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_DATA1(/;"	d
bfin_read_CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_DATA1(/;"	d
bfin_read_CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_DATA1(/;"	d
bfin_read_CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_DATA2(/;"	d
bfin_read_CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_DATA2(/;"	d
bfin_read_CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_DATA2(/;"	d
bfin_read_CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_DATA3(/;"	d
bfin_read_CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_DATA3(/;"	d
bfin_read_CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_DATA3(/;"	d
bfin_read_CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_ID0(/;"	d
bfin_read_CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_ID0(/;"	d
bfin_read_CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_ID0(/;"	d
bfin_read_CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_ID1(/;"	d
bfin_read_CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_ID1(/;"	d
bfin_read_CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_ID1(/;"	d
bfin_read_CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_LENGTH(/;"	d
bfin_read_CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_LENGTH(/;"	d
bfin_read_CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_LENGTH(/;"	d
bfin_read_CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB23_TIMESTAMP(/;"	d
bfin_read_CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB23_TIMESTAMP(/;"	d
bfin_read_CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB23_TIMESTAMP(/;"	d
bfin_read_CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_DATA0(/;"	d
bfin_read_CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_DATA0(/;"	d
bfin_read_CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_DATA0(/;"	d
bfin_read_CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_DATA1(/;"	d
bfin_read_CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_DATA1(/;"	d
bfin_read_CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_DATA1(/;"	d
bfin_read_CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_DATA2(/;"	d
bfin_read_CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_DATA2(/;"	d
bfin_read_CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_DATA2(/;"	d
bfin_read_CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_DATA3(/;"	d
bfin_read_CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_DATA3(/;"	d
bfin_read_CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_DATA3(/;"	d
bfin_read_CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_ID0(/;"	d
bfin_read_CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_ID0(/;"	d
bfin_read_CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_ID0(/;"	d
bfin_read_CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_ID1(/;"	d
bfin_read_CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_ID1(/;"	d
bfin_read_CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_ID1(/;"	d
bfin_read_CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_LENGTH(/;"	d
bfin_read_CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_LENGTH(/;"	d
bfin_read_CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_LENGTH(/;"	d
bfin_read_CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB24_TIMESTAMP(/;"	d
bfin_read_CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB24_TIMESTAMP(/;"	d
bfin_read_CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB24_TIMESTAMP(/;"	d
bfin_read_CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_DATA0(/;"	d
bfin_read_CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_DATA0(/;"	d
bfin_read_CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_DATA0(/;"	d
bfin_read_CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_DATA1(/;"	d
bfin_read_CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_DATA1(/;"	d
bfin_read_CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_DATA1(/;"	d
bfin_read_CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_DATA2(/;"	d
bfin_read_CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_DATA2(/;"	d
bfin_read_CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_DATA2(/;"	d
bfin_read_CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_DATA3(/;"	d
bfin_read_CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_DATA3(/;"	d
bfin_read_CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_DATA3(/;"	d
bfin_read_CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_ID0(/;"	d
bfin_read_CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_ID0(/;"	d
bfin_read_CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_ID0(/;"	d
bfin_read_CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_ID1(/;"	d
bfin_read_CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_ID1(/;"	d
bfin_read_CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_ID1(/;"	d
bfin_read_CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_LENGTH(/;"	d
bfin_read_CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_LENGTH(/;"	d
bfin_read_CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_LENGTH(/;"	d
bfin_read_CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB25_TIMESTAMP(/;"	d
bfin_read_CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB25_TIMESTAMP(/;"	d
bfin_read_CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB25_TIMESTAMP(/;"	d
bfin_read_CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_DATA0(/;"	d
bfin_read_CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_DATA0(/;"	d
bfin_read_CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_DATA0(/;"	d
bfin_read_CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_DATA1(/;"	d
bfin_read_CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_DATA1(/;"	d
bfin_read_CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_DATA1(/;"	d
bfin_read_CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_DATA2(/;"	d
bfin_read_CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_DATA2(/;"	d
bfin_read_CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_DATA2(/;"	d
bfin_read_CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_DATA3(/;"	d
bfin_read_CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_DATA3(/;"	d
bfin_read_CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_DATA3(/;"	d
bfin_read_CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_ID0(/;"	d
bfin_read_CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_ID0(/;"	d
bfin_read_CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_ID0(/;"	d
bfin_read_CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_ID1(/;"	d
bfin_read_CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_ID1(/;"	d
bfin_read_CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_ID1(/;"	d
bfin_read_CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_LENGTH(/;"	d
bfin_read_CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_LENGTH(/;"	d
bfin_read_CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_LENGTH(/;"	d
bfin_read_CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB26_TIMESTAMP(/;"	d
bfin_read_CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB26_TIMESTAMP(/;"	d
bfin_read_CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB26_TIMESTAMP(/;"	d
bfin_read_CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_DATA0(/;"	d
bfin_read_CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_DATA0(/;"	d
bfin_read_CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_DATA0(/;"	d
bfin_read_CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_DATA1(/;"	d
bfin_read_CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_DATA1(/;"	d
bfin_read_CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_DATA1(/;"	d
bfin_read_CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_DATA2(/;"	d
bfin_read_CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_DATA2(/;"	d
bfin_read_CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_DATA2(/;"	d
bfin_read_CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_DATA3(/;"	d
bfin_read_CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_DATA3(/;"	d
bfin_read_CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_DATA3(/;"	d
bfin_read_CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_ID0(/;"	d
bfin_read_CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_ID0(/;"	d
bfin_read_CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_ID0(/;"	d
bfin_read_CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_ID1(/;"	d
bfin_read_CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_ID1(/;"	d
bfin_read_CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_ID1(/;"	d
bfin_read_CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_LENGTH(/;"	d
bfin_read_CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_LENGTH(/;"	d
bfin_read_CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_LENGTH(/;"	d
bfin_read_CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB27_TIMESTAMP(/;"	d
bfin_read_CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB27_TIMESTAMP(/;"	d
bfin_read_CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB27_TIMESTAMP(/;"	d
bfin_read_CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_DATA0(/;"	d
bfin_read_CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_DATA0(/;"	d
bfin_read_CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_DATA0(/;"	d
bfin_read_CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_DATA1(/;"	d
bfin_read_CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_DATA1(/;"	d
bfin_read_CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_DATA1(/;"	d
bfin_read_CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_DATA2(/;"	d
bfin_read_CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_DATA2(/;"	d
bfin_read_CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_DATA2(/;"	d
bfin_read_CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_DATA3(/;"	d
bfin_read_CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_DATA3(/;"	d
bfin_read_CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_DATA3(/;"	d
bfin_read_CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_ID0(/;"	d
bfin_read_CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_ID0(/;"	d
bfin_read_CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_ID0(/;"	d
bfin_read_CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_ID1(/;"	d
bfin_read_CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_ID1(/;"	d
bfin_read_CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_ID1(/;"	d
bfin_read_CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_LENGTH(/;"	d
bfin_read_CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_LENGTH(/;"	d
bfin_read_CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_LENGTH(/;"	d
bfin_read_CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB28_TIMESTAMP(/;"	d
bfin_read_CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB28_TIMESTAMP(/;"	d
bfin_read_CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB28_TIMESTAMP(/;"	d
bfin_read_CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_DATA0(/;"	d
bfin_read_CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_DATA0(/;"	d
bfin_read_CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_DATA0(/;"	d
bfin_read_CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_DATA1(/;"	d
bfin_read_CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_DATA1(/;"	d
bfin_read_CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_DATA1(/;"	d
bfin_read_CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_DATA2(/;"	d
bfin_read_CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_DATA2(/;"	d
bfin_read_CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_DATA2(/;"	d
bfin_read_CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_DATA3(/;"	d
bfin_read_CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_DATA3(/;"	d
bfin_read_CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_DATA3(/;"	d
bfin_read_CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_ID0(/;"	d
bfin_read_CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_ID0(/;"	d
bfin_read_CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_ID0(/;"	d
bfin_read_CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_ID1(/;"	d
bfin_read_CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_ID1(/;"	d
bfin_read_CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_ID1(/;"	d
bfin_read_CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_LENGTH(/;"	d
bfin_read_CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_LENGTH(/;"	d
bfin_read_CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_LENGTH(/;"	d
bfin_read_CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB29_TIMESTAMP(/;"	d
bfin_read_CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB29_TIMESTAMP(/;"	d
bfin_read_CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB29_TIMESTAMP(/;"	d
bfin_read_CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_DATA0(/;"	d
bfin_read_CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_DATA0(/;"	d
bfin_read_CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_DATA0(/;"	d
bfin_read_CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_DATA1(/;"	d
bfin_read_CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_DATA1(/;"	d
bfin_read_CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_DATA1(/;"	d
bfin_read_CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_DATA2(/;"	d
bfin_read_CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_DATA2(/;"	d
bfin_read_CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_DATA2(/;"	d
bfin_read_CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_DATA3(/;"	d
bfin_read_CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_DATA3(/;"	d
bfin_read_CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_DATA3(/;"	d
bfin_read_CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_ID0(/;"	d
bfin_read_CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_ID0(/;"	d
bfin_read_CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_ID0(/;"	d
bfin_read_CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_ID1(/;"	d
bfin_read_CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_ID1(/;"	d
bfin_read_CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_ID1(/;"	d
bfin_read_CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_LENGTH(/;"	d
bfin_read_CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_LENGTH(/;"	d
bfin_read_CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_LENGTH(/;"	d
bfin_read_CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB30_TIMESTAMP(/;"	d
bfin_read_CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB30_TIMESTAMP(/;"	d
bfin_read_CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB30_TIMESTAMP(/;"	d
bfin_read_CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_DATA0(/;"	d
bfin_read_CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_DATA0(/;"	d
bfin_read_CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_DATA0(/;"	d
bfin_read_CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_DATA1(/;"	d
bfin_read_CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_DATA1(/;"	d
bfin_read_CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_DATA1(/;"	d
bfin_read_CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_DATA2(/;"	d
bfin_read_CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_DATA2(/;"	d
bfin_read_CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_DATA2(/;"	d
bfin_read_CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_DATA3(/;"	d
bfin_read_CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_DATA3(/;"	d
bfin_read_CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_DATA3(/;"	d
bfin_read_CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_ID0(/;"	d
bfin_read_CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_ID0(/;"	d
bfin_read_CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_ID0(/;"	d
bfin_read_CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_ID1(/;"	d
bfin_read_CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_ID1(/;"	d
bfin_read_CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_ID1(/;"	d
bfin_read_CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_LENGTH(/;"	d
bfin_read_CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_LENGTH(/;"	d
bfin_read_CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_LENGTH(/;"	d
bfin_read_CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MB31_TIMESTAMP(/;"	d
bfin_read_CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MB31_TIMESTAMP(/;"	d
bfin_read_CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MB31_TIMESTAMP(/;"	d
bfin_read_CAN_MBIM1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBIM1(/;"	d
bfin_read_CAN_MBIM1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBIM1(/;"	d
bfin_read_CAN_MBIM1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBIM1(/;"	d
bfin_read_CAN_MBIM2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBIM2(/;"	d
bfin_read_CAN_MBIM2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBIM2(/;"	d
bfin_read_CAN_MBIM2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBIM2(/;"	d
bfin_read_CAN_MBRIF1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBRIF1(/;"	d
bfin_read_CAN_MBRIF1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBRIF1(/;"	d
bfin_read_CAN_MBRIF1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBRIF1(/;"	d
bfin_read_CAN_MBRIF2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBRIF2(/;"	d
bfin_read_CAN_MBRIF2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBRIF2(/;"	d
bfin_read_CAN_MBRIF2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBRIF2(/;"	d
bfin_read_CAN_MBTD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBTD(/;"	d
bfin_read_CAN_MBTD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBTD(/;"	d
bfin_read_CAN_MBTD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBTD(/;"	d
bfin_read_CAN_MBTIF1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBTIF1(/;"	d
bfin_read_CAN_MBTIF1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBTIF1(/;"	d
bfin_read_CAN_MBTIF1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBTIF1(/;"	d
bfin_read_CAN_MBTIF2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MBTIF2(/;"	d
bfin_read_CAN_MBTIF2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MBTIF2(/;"	d
bfin_read_CAN_MBTIF2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MBTIF2(/;"	d
bfin_read_CAN_MC1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MC1(/;"	d
bfin_read_CAN_MC1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MC1(/;"	d
bfin_read_CAN_MC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MC1(/;"	d
bfin_read_CAN_MC2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MC2(/;"	d
bfin_read_CAN_MC2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MC2(/;"	d
bfin_read_CAN_MC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MC2(/;"	d
bfin_read_CAN_MD1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MD1(/;"	d
bfin_read_CAN_MD1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MD1(/;"	d
bfin_read_CAN_MD1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MD1(/;"	d
bfin_read_CAN_MD2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_MD2(/;"	d
bfin_read_CAN_MD2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_MD2(/;"	d
bfin_read_CAN_MD2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_MD2(/;"	d
bfin_read_CAN_OPSS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_OPSS1(/;"	d
bfin_read_CAN_OPSS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_OPSS1(/;"	d
bfin_read_CAN_OPSS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_OPSS1(/;"	d
bfin_read_CAN_OPSS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_OPSS2(/;"	d
bfin_read_CAN_OPSS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_OPSS2(/;"	d
bfin_read_CAN_OPSS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_OPSS2(/;"	d
bfin_read_CAN_RFH1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_RFH1(/;"	d
bfin_read_CAN_RFH1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_RFH1(/;"	d
bfin_read_CAN_RFH1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_RFH1(/;"	d
bfin_read_CAN_RFH2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_RFH2(/;"	d
bfin_read_CAN_RFH2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_RFH2(/;"	d
bfin_read_CAN_RFH2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_RFH2(/;"	d
bfin_read_CAN_RML1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_RML1(/;"	d
bfin_read_CAN_RML1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_RML1(/;"	d
bfin_read_CAN_RML1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_RML1(/;"	d
bfin_read_CAN_RML2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_RML2(/;"	d
bfin_read_CAN_RML2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_RML2(/;"	d
bfin_read_CAN_RML2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_RML2(/;"	d
bfin_read_CAN_RMP1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_RMP1(/;"	d
bfin_read_CAN_RMP1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_RMP1(/;"	d
bfin_read_CAN_RMP1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_RMP1(/;"	d
bfin_read_CAN_RMP2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_RMP2(/;"	d
bfin_read_CAN_RMP2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_RMP2(/;"	d
bfin_read_CAN_RMP2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_RMP2(/;"	d
bfin_read_CAN_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_STATUS(/;"	d
bfin_read_CAN_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_STATUS(/;"	d
bfin_read_CAN_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_STATUS(/;"	d
bfin_read_CAN_TA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TA1(/;"	d
bfin_read_CAN_TA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TA1(/;"	d
bfin_read_CAN_TA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TA1(/;"	d
bfin_read_CAN_TA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TA2(/;"	d
bfin_read_CAN_TA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TA2(/;"	d
bfin_read_CAN_TA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TA2(/;"	d
bfin_read_CAN_TIMING	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TIMING(/;"	d
bfin_read_CAN_TIMING	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TIMING(/;"	d
bfin_read_CAN_TIMING	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TIMING(/;"	d
bfin_read_CAN_TRR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TRR1(/;"	d
bfin_read_CAN_TRR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TRR1(/;"	d
bfin_read_CAN_TRR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TRR1(/;"	d
bfin_read_CAN_TRR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TRR2(/;"	d
bfin_read_CAN_TRR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TRR2(/;"	d
bfin_read_CAN_TRR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TRR2(/;"	d
bfin_read_CAN_TRS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TRS1(/;"	d
bfin_read_CAN_TRS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TRS1(/;"	d
bfin_read_CAN_TRS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TRS1(/;"	d
bfin_read_CAN_TRS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_TRS2(/;"	d
bfin_read_CAN_TRS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_TRS2(/;"	d
bfin_read_CAN_TRS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_TRS2(/;"	d
bfin_read_CAN_UCCNF	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_UCCNF(/;"	d
bfin_read_CAN_UCCNF	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_UCCNF(/;"	d
bfin_read_CAN_UCCNF	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_UCCNF(/;"	d
bfin_read_CAN_UCCNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_UCCNT(/;"	d
bfin_read_CAN_UCCNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_UCCNT(/;"	d
bfin_read_CAN_UCCNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_UCCNT(/;"	d
bfin_read_CAN_UCRC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_UCRC(/;"	d
bfin_read_CAN_UCRC	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_UCRC(/;"	d
bfin_read_CAN_UCRC	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_UCRC(/;"	d
bfin_read_CAN_UCREG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_UCREG(/;"	d
bfin_read_CAN_UCREG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_UCREG(/;"	d
bfin_read_CAN_UCREG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_UCREG(/;"	d
bfin_read_CAN_VERSION	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_VERSION(/;"	d
bfin_read_CAN_VERSION	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_VERSION(/;"	d
bfin_read_CAN_VERSION	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_VERSION(/;"	d
bfin_read_CAN_VERSION2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CAN_VERSION2(/;"	d
bfin_read_CAN_VERSION2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CAN_VERSION2(/;"	d
bfin_read_CAN_VERSION2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CAN_VERSION2(/;"	d
bfin_read_CGU_CLKOUTSEL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_CGU_CLKOUTSEL(/;"	d
bfin_read_CGU_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_CGU_CTL(/;"	d
bfin_read_CGU_DIV	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_CGU_DIV(/;"	d
bfin_read_CGU_STAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_CGU_STAT(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CHIPID	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_CHIPID(/;"	d
bfin_read_CNT0_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_COMMAND(/;"	d
bfin_read_CNT0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_CONFIG(/;"	d
bfin_read_CNT0_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_COUNTER(/;"	d
bfin_read_CNT0_DEBOUNCE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_DEBOUNCE(/;"	d
bfin_read_CNT0_IMASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_IMASK(/;"	d
bfin_read_CNT0_MAX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_MAX(/;"	d
bfin_read_CNT0_MIN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_MIN(/;"	d
bfin_read_CNT0_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT0_STATUS(/;"	d
bfin_read_CNT1_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_COMMAND(/;"	d
bfin_read_CNT1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_CONFIG(/;"	d
bfin_read_CNT1_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_COUNTER(/;"	d
bfin_read_CNT1_DEBOUNCE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_DEBOUNCE(/;"	d
bfin_read_CNT1_IMASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_IMASK(/;"	d
bfin_read_CNT1_MAX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_MAX(/;"	d
bfin_read_CNT1_MIN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_MIN(/;"	d
bfin_read_CNT1_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_CNT1_STATUS(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_COMMAND(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_CONFIG(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_COUNTER(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_DEBOUNCE(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_IMASK(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_MAX(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_MIN(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_CNT_STATUS(/;"	d
bfin_read_DBGSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DBGSTAT(/;"	d
bfin_read_DCPLB_ADDR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR0(/;"	d
bfin_read_DCPLB_ADDR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR1(/;"	d
bfin_read_DCPLB_ADDR10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR10(/;"	d
bfin_read_DCPLB_ADDR11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR11(/;"	d
bfin_read_DCPLB_ADDR12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR12(/;"	d
bfin_read_DCPLB_ADDR13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR13(/;"	d
bfin_read_DCPLB_ADDR14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR14(/;"	d
bfin_read_DCPLB_ADDR15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR15(/;"	d
bfin_read_DCPLB_ADDR2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR2(/;"	d
bfin_read_DCPLB_ADDR3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR3(/;"	d
bfin_read_DCPLB_ADDR4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR4(/;"	d
bfin_read_DCPLB_ADDR5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR5(/;"	d
bfin_read_DCPLB_ADDR6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR6(/;"	d
bfin_read_DCPLB_ADDR7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR7(/;"	d
bfin_read_DCPLB_ADDR8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR8(/;"	d
bfin_read_DCPLB_ADDR9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_ADDR9(/;"	d
bfin_read_DCPLB_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA0(/;"	d
bfin_read_DCPLB_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA1(/;"	d
bfin_read_DCPLB_DATA10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA10(/;"	d
bfin_read_DCPLB_DATA11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA11(/;"	d
bfin_read_DCPLB_DATA12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA12(/;"	d
bfin_read_DCPLB_DATA13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA13(/;"	d
bfin_read_DCPLB_DATA14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA14(/;"	d
bfin_read_DCPLB_DATA15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA15(/;"	d
bfin_read_DCPLB_DATA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA2(/;"	d
bfin_read_DCPLB_DATA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA3(/;"	d
bfin_read_DCPLB_DATA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA4(/;"	d
bfin_read_DCPLB_DATA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA5(/;"	d
bfin_read_DCPLB_DATA6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA6(/;"	d
bfin_read_DCPLB_DATA7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA7(/;"	d
bfin_read_DCPLB_DATA8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA8(/;"	d
bfin_read_DCPLB_DATA9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_DATA9(/;"	d
bfin_read_DCPLB_FAULT_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_FAULT_ADDR(/;"	d
bfin_read_DCPLB_FAULT_STATUS	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DCPLB_FAULT_STATUS(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_CONFIG(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_CURR_ADDR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_CURR_DESC_PTR(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_CURR_X_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_CURR_Y_COUNT(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_IRQ_STATUS(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_START_ADDR(/;"	d
bfin_read_DMA0_TC_CNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_TC_CNT(/;"	d
bfin_read_DMA0_TC_PER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_TC_PER(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_X_COUNT(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_X_MODIFY(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_Y_COUNT(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA0_Y_MODIFY(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_CONFIG(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_CURR_ADDR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_CURR_DESC_PTR(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_CURR_X_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_CURR_Y_COUNT(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_IRQ_STATUS(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_START_ADDR(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_X_COUNT(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_X_MODIFY(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_Y_COUNT(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMA10_Y_MODIFY(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_CONFIG(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_CURR_ADDR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_CURR_DESC_PTR(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_CURR_X_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_CURR_Y_COUNT(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_IRQ_STATUS(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_START_ADDR(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_X_COUNT(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_X_MODIFY(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_Y_COUNT(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA11_Y_MODIFY(/;"	d
bfin_read_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_CONFIG(/;"	d
bfin_read_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_CONFIG(/;"	d
bfin_read_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_CONFIG(/;"	d
bfin_read_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_CONFIG(/;"	d
bfin_read_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_CONFIG(/;"	d
bfin_read_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_CONFIG(/;"	d
bfin_read_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_CURR_ADDR(/;"	d
bfin_read_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_CURR_ADDR(/;"	d
bfin_read_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_CURR_ADDR(/;"	d
bfin_read_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_CURR_ADDR(/;"	d
bfin_read_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_CURR_ADDR(/;"	d
bfin_read_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_CURR_ADDR(/;"	d
bfin_read_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_CURR_DESC_PTR(/;"	d
bfin_read_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_CURR_DESC_PTR(/;"	d
bfin_read_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_CURR_DESC_PTR(/;"	d
bfin_read_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_CURR_DESC_PTR(/;"	d
bfin_read_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_CURR_DESC_PTR(/;"	d
bfin_read_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_CURR_DESC_PTR(/;"	d
bfin_read_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_CURR_X_COUNT(/;"	d
bfin_read_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_CURR_X_COUNT(/;"	d
bfin_read_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_CURR_X_COUNT(/;"	d
bfin_read_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_CURR_X_COUNT(/;"	d
bfin_read_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_CURR_X_COUNT(/;"	d
bfin_read_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_CURR_X_COUNT(/;"	d
bfin_read_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_CURR_Y_COUNT(/;"	d
bfin_read_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_CURR_Y_COUNT(/;"	d
bfin_read_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_CURR_Y_COUNT(/;"	d
bfin_read_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_CURR_Y_COUNT(/;"	d
bfin_read_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_CURR_Y_COUNT(/;"	d
bfin_read_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_CURR_Y_COUNT(/;"	d
bfin_read_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_IRQ_STATUS(/;"	d
bfin_read_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_IRQ_STATUS(/;"	d
bfin_read_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_IRQ_STATUS(/;"	d
bfin_read_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_IRQ_STATUS(/;"	d
bfin_read_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_IRQ_STATUS(/;"	d
bfin_read_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_IRQ_STATUS(/;"	d
bfin_read_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_NEXT_DESC_PTR(/;"	d
bfin_read_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_NEXT_DESC_PTR(/;"	d
bfin_read_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_NEXT_DESC_PTR(/;"	d
bfin_read_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_NEXT_DESC_PTR(/;"	d
bfin_read_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_NEXT_DESC_PTR(/;"	d
bfin_read_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_NEXT_DESC_PTR(/;"	d
bfin_read_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_PERIPHERAL_MAP(/;"	d
bfin_read_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_PERIPHERAL_MAP(/;"	d
bfin_read_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_PERIPHERAL_MAP(/;"	d
bfin_read_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_PERIPHERAL_MAP(/;"	d
bfin_read_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_PERIPHERAL_MAP(/;"	d
bfin_read_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_PERIPHERAL_MAP(/;"	d
bfin_read_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_START_ADDR(/;"	d
bfin_read_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_START_ADDR(/;"	d
bfin_read_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_START_ADDR(/;"	d
bfin_read_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_START_ADDR(/;"	d
bfin_read_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_START_ADDR(/;"	d
bfin_read_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_START_ADDR(/;"	d
bfin_read_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_X_COUNT(/;"	d
bfin_read_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_X_COUNT(/;"	d
bfin_read_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_X_COUNT(/;"	d
bfin_read_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_X_COUNT(/;"	d
bfin_read_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_X_COUNT(/;"	d
bfin_read_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_X_COUNT(/;"	d
bfin_read_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_X_MODIFY(/;"	d
bfin_read_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_X_MODIFY(/;"	d
bfin_read_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_X_MODIFY(/;"	d
bfin_read_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_X_MODIFY(/;"	d
bfin_read_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_X_MODIFY(/;"	d
bfin_read_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_X_MODIFY(/;"	d
bfin_read_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_Y_COUNT(/;"	d
bfin_read_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_Y_COUNT(/;"	d
bfin_read_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_Y_COUNT(/;"	d
bfin_read_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_Y_COUNT(/;"	d
bfin_read_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_Y_COUNT(/;"	d
bfin_read_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_Y_COUNT(/;"	d
bfin_read_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA12_Y_MODIFY(/;"	d
bfin_read_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA12_Y_MODIFY(/;"	d
bfin_read_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA12_Y_MODIFY(/;"	d
bfin_read_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA12_Y_MODIFY(/;"	d
bfin_read_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA12_Y_MODIFY(/;"	d
bfin_read_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA12_Y_MODIFY(/;"	d
bfin_read_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_CONFIG(/;"	d
bfin_read_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_CONFIG(/;"	d
bfin_read_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_CONFIG(/;"	d
bfin_read_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_CONFIG(/;"	d
bfin_read_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_CONFIG(/;"	d
bfin_read_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_CONFIG(/;"	d
bfin_read_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_CURR_ADDR(/;"	d
bfin_read_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_CURR_ADDR(/;"	d
bfin_read_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_CURR_ADDR(/;"	d
bfin_read_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_CURR_ADDR(/;"	d
bfin_read_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_CURR_ADDR(/;"	d
bfin_read_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_CURR_ADDR(/;"	d
bfin_read_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_CURR_DESC_PTR(/;"	d
bfin_read_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_CURR_DESC_PTR(/;"	d
bfin_read_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_CURR_DESC_PTR(/;"	d
bfin_read_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_CURR_DESC_PTR(/;"	d
bfin_read_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_CURR_DESC_PTR(/;"	d
bfin_read_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_CURR_DESC_PTR(/;"	d
bfin_read_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_CURR_X_COUNT(/;"	d
bfin_read_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_CURR_X_COUNT(/;"	d
bfin_read_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_CURR_X_COUNT(/;"	d
bfin_read_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_CURR_X_COUNT(/;"	d
bfin_read_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_CURR_X_COUNT(/;"	d
bfin_read_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_CURR_X_COUNT(/;"	d
bfin_read_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_CURR_Y_COUNT(/;"	d
bfin_read_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_CURR_Y_COUNT(/;"	d
bfin_read_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_CURR_Y_COUNT(/;"	d
bfin_read_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_CURR_Y_COUNT(/;"	d
bfin_read_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_CURR_Y_COUNT(/;"	d
bfin_read_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_CURR_Y_COUNT(/;"	d
bfin_read_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_IRQ_STATUS(/;"	d
bfin_read_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_IRQ_STATUS(/;"	d
bfin_read_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_IRQ_STATUS(/;"	d
bfin_read_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_IRQ_STATUS(/;"	d
bfin_read_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_IRQ_STATUS(/;"	d
bfin_read_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_IRQ_STATUS(/;"	d
bfin_read_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_NEXT_DESC_PTR(/;"	d
bfin_read_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_NEXT_DESC_PTR(/;"	d
bfin_read_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_NEXT_DESC_PTR(/;"	d
bfin_read_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_NEXT_DESC_PTR(/;"	d
bfin_read_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_NEXT_DESC_PTR(/;"	d
bfin_read_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_NEXT_DESC_PTR(/;"	d
bfin_read_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_PERIPHERAL_MAP(/;"	d
bfin_read_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_PERIPHERAL_MAP(/;"	d
bfin_read_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_PERIPHERAL_MAP(/;"	d
bfin_read_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_PERIPHERAL_MAP(/;"	d
bfin_read_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_PERIPHERAL_MAP(/;"	d
bfin_read_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_PERIPHERAL_MAP(/;"	d
bfin_read_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_START_ADDR(/;"	d
bfin_read_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_START_ADDR(/;"	d
bfin_read_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_START_ADDR(/;"	d
bfin_read_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_START_ADDR(/;"	d
bfin_read_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_START_ADDR(/;"	d
bfin_read_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_START_ADDR(/;"	d
bfin_read_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_X_COUNT(/;"	d
bfin_read_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_X_COUNT(/;"	d
bfin_read_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_X_COUNT(/;"	d
bfin_read_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_X_COUNT(/;"	d
bfin_read_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_X_COUNT(/;"	d
bfin_read_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_X_COUNT(/;"	d
bfin_read_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_X_MODIFY(/;"	d
bfin_read_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_X_MODIFY(/;"	d
bfin_read_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_X_MODIFY(/;"	d
bfin_read_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_X_MODIFY(/;"	d
bfin_read_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_X_MODIFY(/;"	d
bfin_read_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_X_MODIFY(/;"	d
bfin_read_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_Y_COUNT(/;"	d
bfin_read_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_Y_COUNT(/;"	d
bfin_read_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_Y_COUNT(/;"	d
bfin_read_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_Y_COUNT(/;"	d
bfin_read_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_Y_COUNT(/;"	d
bfin_read_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_Y_COUNT(/;"	d
bfin_read_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA13_Y_MODIFY(/;"	d
bfin_read_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA13_Y_MODIFY(/;"	d
bfin_read_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA13_Y_MODIFY(/;"	d
bfin_read_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA13_Y_MODIFY(/;"	d
bfin_read_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA13_Y_MODIFY(/;"	d
bfin_read_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA13_Y_MODIFY(/;"	d
bfin_read_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_CONFIG(/;"	d
bfin_read_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_CONFIG(/;"	d
bfin_read_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_CONFIG(/;"	d
bfin_read_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_CONFIG(/;"	d
bfin_read_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_CONFIG(/;"	d
bfin_read_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_CONFIG(/;"	d
bfin_read_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_CURR_ADDR(/;"	d
bfin_read_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_CURR_ADDR(/;"	d
bfin_read_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_CURR_ADDR(/;"	d
bfin_read_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_CURR_ADDR(/;"	d
bfin_read_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_CURR_ADDR(/;"	d
bfin_read_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_CURR_ADDR(/;"	d
bfin_read_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_CURR_DESC_PTR(/;"	d
bfin_read_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_CURR_DESC_PTR(/;"	d
bfin_read_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_CURR_DESC_PTR(/;"	d
bfin_read_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_CURR_DESC_PTR(/;"	d
bfin_read_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_CURR_DESC_PTR(/;"	d
bfin_read_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_CURR_DESC_PTR(/;"	d
bfin_read_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_CURR_X_COUNT(/;"	d
bfin_read_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_CURR_X_COUNT(/;"	d
bfin_read_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_CURR_X_COUNT(/;"	d
bfin_read_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_CURR_X_COUNT(/;"	d
bfin_read_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_CURR_X_COUNT(/;"	d
bfin_read_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_CURR_X_COUNT(/;"	d
bfin_read_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_CURR_Y_COUNT(/;"	d
bfin_read_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_CURR_Y_COUNT(/;"	d
bfin_read_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_CURR_Y_COUNT(/;"	d
bfin_read_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_CURR_Y_COUNT(/;"	d
bfin_read_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_CURR_Y_COUNT(/;"	d
bfin_read_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_CURR_Y_COUNT(/;"	d
bfin_read_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_IRQ_STATUS(/;"	d
bfin_read_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_IRQ_STATUS(/;"	d
bfin_read_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_IRQ_STATUS(/;"	d
bfin_read_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_IRQ_STATUS(/;"	d
bfin_read_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_IRQ_STATUS(/;"	d
bfin_read_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_IRQ_STATUS(/;"	d
bfin_read_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_NEXT_DESC_PTR(/;"	d
bfin_read_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_NEXT_DESC_PTR(/;"	d
bfin_read_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_NEXT_DESC_PTR(/;"	d
bfin_read_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_NEXT_DESC_PTR(/;"	d
bfin_read_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_NEXT_DESC_PTR(/;"	d
bfin_read_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_NEXT_DESC_PTR(/;"	d
bfin_read_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_PERIPHERAL_MAP(/;"	d
bfin_read_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_PERIPHERAL_MAP(/;"	d
bfin_read_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_PERIPHERAL_MAP(/;"	d
bfin_read_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_PERIPHERAL_MAP(/;"	d
bfin_read_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_PERIPHERAL_MAP(/;"	d
bfin_read_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_PERIPHERAL_MAP(/;"	d
bfin_read_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_START_ADDR(/;"	d
bfin_read_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_START_ADDR(/;"	d
bfin_read_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_START_ADDR(/;"	d
bfin_read_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_START_ADDR(/;"	d
bfin_read_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_START_ADDR(/;"	d
bfin_read_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_START_ADDR(/;"	d
bfin_read_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_X_COUNT(/;"	d
bfin_read_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_X_COUNT(/;"	d
bfin_read_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_X_COUNT(/;"	d
bfin_read_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_X_COUNT(/;"	d
bfin_read_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_X_COUNT(/;"	d
bfin_read_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_X_COUNT(/;"	d
bfin_read_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_X_MODIFY(/;"	d
bfin_read_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_X_MODIFY(/;"	d
bfin_read_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_X_MODIFY(/;"	d
bfin_read_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_X_MODIFY(/;"	d
bfin_read_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_X_MODIFY(/;"	d
bfin_read_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_X_MODIFY(/;"	d
bfin_read_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_Y_COUNT(/;"	d
bfin_read_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_Y_COUNT(/;"	d
bfin_read_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_Y_COUNT(/;"	d
bfin_read_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_Y_COUNT(/;"	d
bfin_read_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_Y_COUNT(/;"	d
bfin_read_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_Y_COUNT(/;"	d
bfin_read_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA14_Y_MODIFY(/;"	d
bfin_read_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA14_Y_MODIFY(/;"	d
bfin_read_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA14_Y_MODIFY(/;"	d
bfin_read_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA14_Y_MODIFY(/;"	d
bfin_read_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA14_Y_MODIFY(/;"	d
bfin_read_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA14_Y_MODIFY(/;"	d
bfin_read_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_CONFIG(/;"	d
bfin_read_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_CONFIG(/;"	d
bfin_read_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_CONFIG(/;"	d
bfin_read_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_CONFIG(/;"	d
bfin_read_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_CONFIG(/;"	d
bfin_read_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_CONFIG(/;"	d
bfin_read_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_CURR_ADDR(/;"	d
bfin_read_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_CURR_ADDR(/;"	d
bfin_read_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_CURR_ADDR(/;"	d
bfin_read_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_CURR_ADDR(/;"	d
bfin_read_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_CURR_ADDR(/;"	d
bfin_read_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_CURR_ADDR(/;"	d
bfin_read_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_CURR_DESC_PTR(/;"	d
bfin_read_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_CURR_DESC_PTR(/;"	d
bfin_read_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_CURR_DESC_PTR(/;"	d
bfin_read_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_CURR_DESC_PTR(/;"	d
bfin_read_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_CURR_DESC_PTR(/;"	d
bfin_read_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_CURR_DESC_PTR(/;"	d
bfin_read_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_CURR_X_COUNT(/;"	d
bfin_read_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_CURR_X_COUNT(/;"	d
bfin_read_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_CURR_X_COUNT(/;"	d
bfin_read_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_CURR_X_COUNT(/;"	d
bfin_read_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_CURR_X_COUNT(/;"	d
bfin_read_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_CURR_X_COUNT(/;"	d
bfin_read_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_CURR_Y_COUNT(/;"	d
bfin_read_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_CURR_Y_COUNT(/;"	d
bfin_read_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_CURR_Y_COUNT(/;"	d
bfin_read_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_CURR_Y_COUNT(/;"	d
bfin_read_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_CURR_Y_COUNT(/;"	d
bfin_read_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_CURR_Y_COUNT(/;"	d
bfin_read_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_IRQ_STATUS(/;"	d
bfin_read_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_IRQ_STATUS(/;"	d
bfin_read_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_IRQ_STATUS(/;"	d
bfin_read_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_IRQ_STATUS(/;"	d
bfin_read_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_IRQ_STATUS(/;"	d
bfin_read_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_IRQ_STATUS(/;"	d
bfin_read_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_NEXT_DESC_PTR(/;"	d
bfin_read_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_NEXT_DESC_PTR(/;"	d
bfin_read_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_NEXT_DESC_PTR(/;"	d
bfin_read_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_NEXT_DESC_PTR(/;"	d
bfin_read_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_NEXT_DESC_PTR(/;"	d
bfin_read_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_NEXT_DESC_PTR(/;"	d
bfin_read_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_PERIPHERAL_MAP(/;"	d
bfin_read_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_PERIPHERAL_MAP(/;"	d
bfin_read_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_PERIPHERAL_MAP(/;"	d
bfin_read_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_PERIPHERAL_MAP(/;"	d
bfin_read_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_PERIPHERAL_MAP(/;"	d
bfin_read_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_PERIPHERAL_MAP(/;"	d
bfin_read_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_START_ADDR(/;"	d
bfin_read_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_START_ADDR(/;"	d
bfin_read_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_START_ADDR(/;"	d
bfin_read_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_START_ADDR(/;"	d
bfin_read_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_START_ADDR(/;"	d
bfin_read_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_START_ADDR(/;"	d
bfin_read_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_X_COUNT(/;"	d
bfin_read_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_X_COUNT(/;"	d
bfin_read_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_X_COUNT(/;"	d
bfin_read_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_X_COUNT(/;"	d
bfin_read_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_X_COUNT(/;"	d
bfin_read_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_X_COUNT(/;"	d
bfin_read_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_X_MODIFY(/;"	d
bfin_read_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_X_MODIFY(/;"	d
bfin_read_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_X_MODIFY(/;"	d
bfin_read_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_X_MODIFY(/;"	d
bfin_read_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_X_MODIFY(/;"	d
bfin_read_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_X_MODIFY(/;"	d
bfin_read_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_Y_COUNT(/;"	d
bfin_read_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_Y_COUNT(/;"	d
bfin_read_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_Y_COUNT(/;"	d
bfin_read_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_Y_COUNT(/;"	d
bfin_read_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_Y_COUNT(/;"	d
bfin_read_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_Y_COUNT(/;"	d
bfin_read_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA15_Y_MODIFY(/;"	d
bfin_read_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA15_Y_MODIFY(/;"	d
bfin_read_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA15_Y_MODIFY(/;"	d
bfin_read_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA15_Y_MODIFY(/;"	d
bfin_read_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA15_Y_MODIFY(/;"	d
bfin_read_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA15_Y_MODIFY(/;"	d
bfin_read_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_CONFIG(/;"	d
bfin_read_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_CONFIG(/;"	d
bfin_read_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_CONFIG(/;"	d
bfin_read_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_CONFIG(/;"	d
bfin_read_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_CONFIG(/;"	d
bfin_read_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_CONFIG(/;"	d
bfin_read_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_CURR_ADDR(/;"	d
bfin_read_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_CURR_ADDR(/;"	d
bfin_read_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_CURR_ADDR(/;"	d
bfin_read_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_CURR_ADDR(/;"	d
bfin_read_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_CURR_ADDR(/;"	d
bfin_read_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_CURR_ADDR(/;"	d
bfin_read_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_CURR_DESC_PTR(/;"	d
bfin_read_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_CURR_DESC_PTR(/;"	d
bfin_read_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_CURR_DESC_PTR(/;"	d
bfin_read_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_CURR_DESC_PTR(/;"	d
bfin_read_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_CURR_DESC_PTR(/;"	d
bfin_read_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_CURR_DESC_PTR(/;"	d
bfin_read_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_CURR_X_COUNT(/;"	d
bfin_read_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_CURR_X_COUNT(/;"	d
bfin_read_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_CURR_X_COUNT(/;"	d
bfin_read_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_CURR_X_COUNT(/;"	d
bfin_read_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_CURR_X_COUNT(/;"	d
bfin_read_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_CURR_X_COUNT(/;"	d
bfin_read_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_CURR_Y_COUNT(/;"	d
bfin_read_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_CURR_Y_COUNT(/;"	d
bfin_read_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_CURR_Y_COUNT(/;"	d
bfin_read_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_CURR_Y_COUNT(/;"	d
bfin_read_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_CURR_Y_COUNT(/;"	d
bfin_read_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_CURR_Y_COUNT(/;"	d
bfin_read_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_IRQ_STATUS(/;"	d
bfin_read_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_IRQ_STATUS(/;"	d
bfin_read_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_IRQ_STATUS(/;"	d
bfin_read_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_IRQ_STATUS(/;"	d
bfin_read_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_IRQ_STATUS(/;"	d
bfin_read_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_IRQ_STATUS(/;"	d
bfin_read_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_NEXT_DESC_PTR(/;"	d
bfin_read_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_NEXT_DESC_PTR(/;"	d
bfin_read_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_NEXT_DESC_PTR(/;"	d
bfin_read_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_NEXT_DESC_PTR(/;"	d
bfin_read_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_NEXT_DESC_PTR(/;"	d
bfin_read_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_NEXT_DESC_PTR(/;"	d
bfin_read_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_PERIPHERAL_MAP(/;"	d
bfin_read_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_PERIPHERAL_MAP(/;"	d
bfin_read_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_PERIPHERAL_MAP(/;"	d
bfin_read_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_PERIPHERAL_MAP(/;"	d
bfin_read_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_PERIPHERAL_MAP(/;"	d
bfin_read_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_PERIPHERAL_MAP(/;"	d
bfin_read_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_START_ADDR(/;"	d
bfin_read_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_START_ADDR(/;"	d
bfin_read_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_START_ADDR(/;"	d
bfin_read_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_START_ADDR(/;"	d
bfin_read_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_START_ADDR(/;"	d
bfin_read_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_START_ADDR(/;"	d
bfin_read_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_X_COUNT(/;"	d
bfin_read_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_X_COUNT(/;"	d
bfin_read_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_X_COUNT(/;"	d
bfin_read_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_X_COUNT(/;"	d
bfin_read_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_X_COUNT(/;"	d
bfin_read_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_X_COUNT(/;"	d
bfin_read_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_X_MODIFY(/;"	d
bfin_read_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_X_MODIFY(/;"	d
bfin_read_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_X_MODIFY(/;"	d
bfin_read_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_X_MODIFY(/;"	d
bfin_read_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_X_MODIFY(/;"	d
bfin_read_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_X_MODIFY(/;"	d
bfin_read_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_Y_COUNT(/;"	d
bfin_read_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_Y_COUNT(/;"	d
bfin_read_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_Y_COUNT(/;"	d
bfin_read_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_Y_COUNT(/;"	d
bfin_read_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_Y_COUNT(/;"	d
bfin_read_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_Y_COUNT(/;"	d
bfin_read_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA16_Y_MODIFY(/;"	d
bfin_read_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA16_Y_MODIFY(/;"	d
bfin_read_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA16_Y_MODIFY(/;"	d
bfin_read_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA16_Y_MODIFY(/;"	d
bfin_read_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA16_Y_MODIFY(/;"	d
bfin_read_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA16_Y_MODIFY(/;"	d
bfin_read_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_CONFIG(/;"	d
bfin_read_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_CONFIG(/;"	d
bfin_read_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_CONFIG(/;"	d
bfin_read_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_CONFIG(/;"	d
bfin_read_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_CONFIG(/;"	d
bfin_read_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_CONFIG(/;"	d
bfin_read_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_CURR_ADDR(/;"	d
bfin_read_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_CURR_ADDR(/;"	d
bfin_read_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_CURR_ADDR(/;"	d
bfin_read_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_CURR_ADDR(/;"	d
bfin_read_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_CURR_ADDR(/;"	d
bfin_read_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_CURR_ADDR(/;"	d
bfin_read_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_CURR_DESC_PTR(/;"	d
bfin_read_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_CURR_DESC_PTR(/;"	d
bfin_read_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_CURR_DESC_PTR(/;"	d
bfin_read_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_CURR_DESC_PTR(/;"	d
bfin_read_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_CURR_DESC_PTR(/;"	d
bfin_read_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_CURR_DESC_PTR(/;"	d
bfin_read_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_CURR_X_COUNT(/;"	d
bfin_read_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_CURR_X_COUNT(/;"	d
bfin_read_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_CURR_X_COUNT(/;"	d
bfin_read_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_CURR_X_COUNT(/;"	d
bfin_read_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_CURR_X_COUNT(/;"	d
bfin_read_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_CURR_X_COUNT(/;"	d
bfin_read_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_CURR_Y_COUNT(/;"	d
bfin_read_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_CURR_Y_COUNT(/;"	d
bfin_read_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_CURR_Y_COUNT(/;"	d
bfin_read_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_CURR_Y_COUNT(/;"	d
bfin_read_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_CURR_Y_COUNT(/;"	d
bfin_read_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_CURR_Y_COUNT(/;"	d
bfin_read_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_IRQ_STATUS(/;"	d
bfin_read_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_IRQ_STATUS(/;"	d
bfin_read_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_IRQ_STATUS(/;"	d
bfin_read_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_IRQ_STATUS(/;"	d
bfin_read_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_IRQ_STATUS(/;"	d
bfin_read_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_IRQ_STATUS(/;"	d
bfin_read_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_NEXT_DESC_PTR(/;"	d
bfin_read_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_NEXT_DESC_PTR(/;"	d
bfin_read_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_NEXT_DESC_PTR(/;"	d
bfin_read_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_NEXT_DESC_PTR(/;"	d
bfin_read_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_NEXT_DESC_PTR(/;"	d
bfin_read_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_NEXT_DESC_PTR(/;"	d
bfin_read_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_PERIPHERAL_MAP(/;"	d
bfin_read_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_PERIPHERAL_MAP(/;"	d
bfin_read_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_PERIPHERAL_MAP(/;"	d
bfin_read_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_PERIPHERAL_MAP(/;"	d
bfin_read_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_PERIPHERAL_MAP(/;"	d
bfin_read_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_PERIPHERAL_MAP(/;"	d
bfin_read_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_START_ADDR(/;"	d
bfin_read_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_START_ADDR(/;"	d
bfin_read_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_START_ADDR(/;"	d
bfin_read_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_START_ADDR(/;"	d
bfin_read_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_START_ADDR(/;"	d
bfin_read_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_START_ADDR(/;"	d
bfin_read_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_X_COUNT(/;"	d
bfin_read_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_X_COUNT(/;"	d
bfin_read_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_X_COUNT(/;"	d
bfin_read_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_X_COUNT(/;"	d
bfin_read_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_X_COUNT(/;"	d
bfin_read_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_X_COUNT(/;"	d
bfin_read_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_X_MODIFY(/;"	d
bfin_read_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_X_MODIFY(/;"	d
bfin_read_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_X_MODIFY(/;"	d
bfin_read_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_X_MODIFY(/;"	d
bfin_read_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_X_MODIFY(/;"	d
bfin_read_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_X_MODIFY(/;"	d
bfin_read_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_Y_COUNT(/;"	d
bfin_read_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_Y_COUNT(/;"	d
bfin_read_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_Y_COUNT(/;"	d
bfin_read_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_Y_COUNT(/;"	d
bfin_read_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_Y_COUNT(/;"	d
bfin_read_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_Y_COUNT(/;"	d
bfin_read_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA17_Y_MODIFY(/;"	d
bfin_read_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA17_Y_MODIFY(/;"	d
bfin_read_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA17_Y_MODIFY(/;"	d
bfin_read_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA17_Y_MODIFY(/;"	d
bfin_read_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA17_Y_MODIFY(/;"	d
bfin_read_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA17_Y_MODIFY(/;"	d
bfin_read_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_CONFIG(/;"	d
bfin_read_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_CONFIG(/;"	d
bfin_read_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_CONFIG(/;"	d
bfin_read_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_CONFIG(/;"	d
bfin_read_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_CONFIG(/;"	d
bfin_read_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_CONFIG(/;"	d
bfin_read_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_CURR_ADDR(/;"	d
bfin_read_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_CURR_ADDR(/;"	d
bfin_read_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_CURR_ADDR(/;"	d
bfin_read_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_CURR_ADDR(/;"	d
bfin_read_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_CURR_ADDR(/;"	d
bfin_read_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_CURR_ADDR(/;"	d
bfin_read_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_CURR_DESC_PTR(/;"	d
bfin_read_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_CURR_DESC_PTR(/;"	d
bfin_read_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_CURR_DESC_PTR(/;"	d
bfin_read_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_CURR_DESC_PTR(/;"	d
bfin_read_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_CURR_DESC_PTR(/;"	d
bfin_read_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_CURR_DESC_PTR(/;"	d
bfin_read_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_CURR_X_COUNT(/;"	d
bfin_read_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_CURR_X_COUNT(/;"	d
bfin_read_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_CURR_X_COUNT(/;"	d
bfin_read_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_CURR_X_COUNT(/;"	d
bfin_read_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_CURR_X_COUNT(/;"	d
bfin_read_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_CURR_X_COUNT(/;"	d
bfin_read_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_CURR_Y_COUNT(/;"	d
bfin_read_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_CURR_Y_COUNT(/;"	d
bfin_read_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_CURR_Y_COUNT(/;"	d
bfin_read_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_CURR_Y_COUNT(/;"	d
bfin_read_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_CURR_Y_COUNT(/;"	d
bfin_read_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_CURR_Y_COUNT(/;"	d
bfin_read_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_IRQ_STATUS(/;"	d
bfin_read_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_IRQ_STATUS(/;"	d
bfin_read_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_IRQ_STATUS(/;"	d
bfin_read_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_IRQ_STATUS(/;"	d
bfin_read_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_IRQ_STATUS(/;"	d
bfin_read_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_IRQ_STATUS(/;"	d
bfin_read_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_NEXT_DESC_PTR(/;"	d
bfin_read_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_NEXT_DESC_PTR(/;"	d
bfin_read_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_NEXT_DESC_PTR(/;"	d
bfin_read_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_NEXT_DESC_PTR(/;"	d
bfin_read_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_NEXT_DESC_PTR(/;"	d
bfin_read_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_NEXT_DESC_PTR(/;"	d
bfin_read_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_PERIPHERAL_MAP(/;"	d
bfin_read_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_PERIPHERAL_MAP(/;"	d
bfin_read_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_PERIPHERAL_MAP(/;"	d
bfin_read_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_PERIPHERAL_MAP(/;"	d
bfin_read_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_PERIPHERAL_MAP(/;"	d
bfin_read_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_PERIPHERAL_MAP(/;"	d
bfin_read_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_START_ADDR(/;"	d
bfin_read_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_START_ADDR(/;"	d
bfin_read_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_START_ADDR(/;"	d
bfin_read_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_START_ADDR(/;"	d
bfin_read_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_START_ADDR(/;"	d
bfin_read_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_START_ADDR(/;"	d
bfin_read_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_X_COUNT(/;"	d
bfin_read_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_X_COUNT(/;"	d
bfin_read_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_X_COUNT(/;"	d
bfin_read_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_X_COUNT(/;"	d
bfin_read_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_X_COUNT(/;"	d
bfin_read_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_X_COUNT(/;"	d
bfin_read_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_X_MODIFY(/;"	d
bfin_read_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_X_MODIFY(/;"	d
bfin_read_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_X_MODIFY(/;"	d
bfin_read_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_X_MODIFY(/;"	d
bfin_read_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_X_MODIFY(/;"	d
bfin_read_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_X_MODIFY(/;"	d
bfin_read_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_Y_COUNT(/;"	d
bfin_read_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_Y_COUNT(/;"	d
bfin_read_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_Y_COUNT(/;"	d
bfin_read_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_Y_COUNT(/;"	d
bfin_read_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_Y_COUNT(/;"	d
bfin_read_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_Y_COUNT(/;"	d
bfin_read_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA18_Y_MODIFY(/;"	d
bfin_read_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA18_Y_MODIFY(/;"	d
bfin_read_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA18_Y_MODIFY(/;"	d
bfin_read_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA18_Y_MODIFY(/;"	d
bfin_read_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA18_Y_MODIFY(/;"	d
bfin_read_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA18_Y_MODIFY(/;"	d
bfin_read_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_CONFIG(/;"	d
bfin_read_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_CONFIG(/;"	d
bfin_read_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_CONFIG(/;"	d
bfin_read_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_CONFIG(/;"	d
bfin_read_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_CONFIG(/;"	d
bfin_read_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_CONFIG(/;"	d
bfin_read_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_CURR_ADDR(/;"	d
bfin_read_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_CURR_ADDR(/;"	d
bfin_read_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_CURR_ADDR(/;"	d
bfin_read_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_CURR_ADDR(/;"	d
bfin_read_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_CURR_ADDR(/;"	d
bfin_read_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_CURR_ADDR(/;"	d
bfin_read_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_CURR_DESC_PTR(/;"	d
bfin_read_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_CURR_DESC_PTR(/;"	d
bfin_read_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_CURR_DESC_PTR(/;"	d
bfin_read_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_CURR_DESC_PTR(/;"	d
bfin_read_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_CURR_DESC_PTR(/;"	d
bfin_read_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_CURR_DESC_PTR(/;"	d
bfin_read_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_CURR_X_COUNT(/;"	d
bfin_read_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_CURR_X_COUNT(/;"	d
bfin_read_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_CURR_X_COUNT(/;"	d
bfin_read_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_CURR_X_COUNT(/;"	d
bfin_read_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_CURR_X_COUNT(/;"	d
bfin_read_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_CURR_X_COUNT(/;"	d
bfin_read_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_CURR_Y_COUNT(/;"	d
bfin_read_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_CURR_Y_COUNT(/;"	d
bfin_read_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_CURR_Y_COUNT(/;"	d
bfin_read_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_CURR_Y_COUNT(/;"	d
bfin_read_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_CURR_Y_COUNT(/;"	d
bfin_read_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_CURR_Y_COUNT(/;"	d
bfin_read_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_IRQ_STATUS(/;"	d
bfin_read_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_IRQ_STATUS(/;"	d
bfin_read_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_IRQ_STATUS(/;"	d
bfin_read_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_IRQ_STATUS(/;"	d
bfin_read_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_IRQ_STATUS(/;"	d
bfin_read_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_IRQ_STATUS(/;"	d
bfin_read_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_NEXT_DESC_PTR(/;"	d
bfin_read_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_NEXT_DESC_PTR(/;"	d
bfin_read_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_NEXT_DESC_PTR(/;"	d
bfin_read_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_NEXT_DESC_PTR(/;"	d
bfin_read_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_NEXT_DESC_PTR(/;"	d
bfin_read_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_NEXT_DESC_PTR(/;"	d
bfin_read_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_PERIPHERAL_MAP(/;"	d
bfin_read_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_PERIPHERAL_MAP(/;"	d
bfin_read_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_PERIPHERAL_MAP(/;"	d
bfin_read_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_PERIPHERAL_MAP(/;"	d
bfin_read_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_PERIPHERAL_MAP(/;"	d
bfin_read_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_PERIPHERAL_MAP(/;"	d
bfin_read_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_START_ADDR(/;"	d
bfin_read_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_START_ADDR(/;"	d
bfin_read_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_START_ADDR(/;"	d
bfin_read_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_START_ADDR(/;"	d
bfin_read_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_START_ADDR(/;"	d
bfin_read_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_START_ADDR(/;"	d
bfin_read_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_X_COUNT(/;"	d
bfin_read_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_X_COUNT(/;"	d
bfin_read_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_X_COUNT(/;"	d
bfin_read_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_X_COUNT(/;"	d
bfin_read_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_X_COUNT(/;"	d
bfin_read_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_X_COUNT(/;"	d
bfin_read_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_X_MODIFY(/;"	d
bfin_read_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_X_MODIFY(/;"	d
bfin_read_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_X_MODIFY(/;"	d
bfin_read_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_X_MODIFY(/;"	d
bfin_read_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_X_MODIFY(/;"	d
bfin_read_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_X_MODIFY(/;"	d
bfin_read_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_Y_COUNT(/;"	d
bfin_read_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_Y_COUNT(/;"	d
bfin_read_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_Y_COUNT(/;"	d
bfin_read_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_Y_COUNT(/;"	d
bfin_read_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_Y_COUNT(/;"	d
bfin_read_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_Y_COUNT(/;"	d
bfin_read_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA19_Y_MODIFY(/;"	d
bfin_read_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA19_Y_MODIFY(/;"	d
bfin_read_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA19_Y_MODIFY(/;"	d
bfin_read_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA19_Y_MODIFY(/;"	d
bfin_read_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA19_Y_MODIFY(/;"	d
bfin_read_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA19_Y_MODIFY(/;"	d
bfin_read_DMA1_0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_CONFIG(/;"	d
bfin_read_DMA1_0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_CURR_ADDR(/;"	d
bfin_read_DMA1_0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_CURR_X_COUNT(/;"	d
bfin_read_DMA1_0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_IRQ_STATUS(/;"	d
bfin_read_DMA1_0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_START_ADDR(/;"	d
bfin_read_DMA1_0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_X_COUNT(/;"	d
bfin_read_DMA1_0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_X_MODIFY(/;"	d
bfin_read_DMA1_0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_Y_COUNT(/;"	d
bfin_read_DMA1_0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_0_Y_MODIFY(/;"	d
bfin_read_DMA1_10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_CONFIG(/;"	d
bfin_read_DMA1_10_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_CURR_ADDR(/;"	d
bfin_read_DMA1_10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_CURR_X_COUNT(/;"	d
bfin_read_DMA1_10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_IRQ_STATUS(/;"	d
bfin_read_DMA1_10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_10_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_START_ADDR(/;"	d
bfin_read_DMA1_10_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_X_COUNT(/;"	d
bfin_read_DMA1_10_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_X_MODIFY(/;"	d
bfin_read_DMA1_10_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_Y_COUNT(/;"	d
bfin_read_DMA1_10_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_10_Y_MODIFY(/;"	d
bfin_read_DMA1_11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_CONFIG(/;"	d
bfin_read_DMA1_11_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_CURR_ADDR(/;"	d
bfin_read_DMA1_11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_CURR_X_COUNT(/;"	d
bfin_read_DMA1_11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_IRQ_STATUS(/;"	d
bfin_read_DMA1_11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_11_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_START_ADDR(/;"	d
bfin_read_DMA1_11_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_X_COUNT(/;"	d
bfin_read_DMA1_11_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_X_MODIFY(/;"	d
bfin_read_DMA1_11_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_Y_COUNT(/;"	d
bfin_read_DMA1_11_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_11_Y_MODIFY(/;"	d
bfin_read_DMA1_1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_CONFIG(/;"	d
bfin_read_DMA1_1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_CURR_ADDR(/;"	d
bfin_read_DMA1_1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_IRQ_STATUS(/;"	d
bfin_read_DMA1_1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_START_ADDR(/;"	d
bfin_read_DMA1_1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_X_COUNT(/;"	d
bfin_read_DMA1_1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_X_MODIFY(/;"	d
bfin_read_DMA1_1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_Y_COUNT(/;"	d
bfin_read_DMA1_1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_1_Y_MODIFY(/;"	d
bfin_read_DMA1_2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_CONFIG(/;"	d
bfin_read_DMA1_2_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_CURR_ADDR(/;"	d
bfin_read_DMA1_2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_CURR_X_COUNT(/;"	d
bfin_read_DMA1_2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_IRQ_STATUS(/;"	d
bfin_read_DMA1_2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_2_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_START_ADDR(/;"	d
bfin_read_DMA1_2_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_X_COUNT(/;"	d
bfin_read_DMA1_2_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_X_MODIFY(/;"	d
bfin_read_DMA1_2_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_Y_COUNT(/;"	d
bfin_read_DMA1_2_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_2_Y_MODIFY(/;"	d
bfin_read_DMA1_3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_CONFIG(/;"	d
bfin_read_DMA1_3_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_CURR_ADDR(/;"	d
bfin_read_DMA1_3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_CURR_X_COUNT(/;"	d
bfin_read_DMA1_3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_IRQ_STATUS(/;"	d
bfin_read_DMA1_3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_3_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_START_ADDR(/;"	d
bfin_read_DMA1_3_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_X_COUNT(/;"	d
bfin_read_DMA1_3_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_X_MODIFY(/;"	d
bfin_read_DMA1_3_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_Y_COUNT(/;"	d
bfin_read_DMA1_3_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_3_Y_MODIFY(/;"	d
bfin_read_DMA1_4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_CONFIG(/;"	d
bfin_read_DMA1_4_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_CURR_ADDR(/;"	d
bfin_read_DMA1_4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_CURR_X_COUNT(/;"	d
bfin_read_DMA1_4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_IRQ_STATUS(/;"	d
bfin_read_DMA1_4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_4_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_START_ADDR(/;"	d
bfin_read_DMA1_4_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_X_COUNT(/;"	d
bfin_read_DMA1_4_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_X_MODIFY(/;"	d
bfin_read_DMA1_4_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_Y_COUNT(/;"	d
bfin_read_DMA1_4_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_4_Y_MODIFY(/;"	d
bfin_read_DMA1_5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_CONFIG(/;"	d
bfin_read_DMA1_5_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_CURR_ADDR(/;"	d
bfin_read_DMA1_5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_CURR_X_COUNT(/;"	d
bfin_read_DMA1_5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_IRQ_STATUS(/;"	d
bfin_read_DMA1_5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_5_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_START_ADDR(/;"	d
bfin_read_DMA1_5_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_X_COUNT(/;"	d
bfin_read_DMA1_5_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_X_MODIFY(/;"	d
bfin_read_DMA1_5_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_Y_COUNT(/;"	d
bfin_read_DMA1_5_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_5_Y_MODIFY(/;"	d
bfin_read_DMA1_6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_CONFIG(/;"	d
bfin_read_DMA1_6_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_CURR_ADDR(/;"	d
bfin_read_DMA1_6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_CURR_X_COUNT(/;"	d
bfin_read_DMA1_6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_IRQ_STATUS(/;"	d
bfin_read_DMA1_6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_6_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_START_ADDR(/;"	d
bfin_read_DMA1_6_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_X_COUNT(/;"	d
bfin_read_DMA1_6_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_X_MODIFY(/;"	d
bfin_read_DMA1_6_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_Y_COUNT(/;"	d
bfin_read_DMA1_6_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_6_Y_MODIFY(/;"	d
bfin_read_DMA1_7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_CONFIG(/;"	d
bfin_read_DMA1_7_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_CURR_ADDR(/;"	d
bfin_read_DMA1_7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_CURR_X_COUNT(/;"	d
bfin_read_DMA1_7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_IRQ_STATUS(/;"	d
bfin_read_DMA1_7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_7_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_START_ADDR(/;"	d
bfin_read_DMA1_7_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_X_COUNT(/;"	d
bfin_read_DMA1_7_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_X_MODIFY(/;"	d
bfin_read_DMA1_7_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_Y_COUNT(/;"	d
bfin_read_DMA1_7_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_7_Y_MODIFY(/;"	d
bfin_read_DMA1_8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_CONFIG(/;"	d
bfin_read_DMA1_8_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_CURR_ADDR(/;"	d
bfin_read_DMA1_8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_CURR_X_COUNT(/;"	d
bfin_read_DMA1_8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_IRQ_STATUS(/;"	d
bfin_read_DMA1_8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_8_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_START_ADDR(/;"	d
bfin_read_DMA1_8_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_X_COUNT(/;"	d
bfin_read_DMA1_8_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_X_MODIFY(/;"	d
bfin_read_DMA1_8_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_Y_COUNT(/;"	d
bfin_read_DMA1_8_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_8_Y_MODIFY(/;"	d
bfin_read_DMA1_9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_CONFIG(/;"	d
bfin_read_DMA1_9_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_CURR_ADDR(/;"	d
bfin_read_DMA1_9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_CURR_X_COUNT(/;"	d
bfin_read_DMA1_9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_IRQ_STATUS(/;"	d
bfin_read_DMA1_9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_9_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_START_ADDR(/;"	d
bfin_read_DMA1_9_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_X_COUNT(/;"	d
bfin_read_DMA1_9_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_X_MODIFY(/;"	d
bfin_read_DMA1_9_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_Y_COUNT(/;"	d
bfin_read_DMA1_9_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_9_Y_MODIFY(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_CONFIG(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_CURR_ADDR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_CURR_DESC_PTR(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_CURR_X_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_CURR_Y_COUNT(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_IRQ_STATUS(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_START_ADDR(/;"	d
bfin_read_DMA1_TC_CNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_TC_CNT(/;"	d
bfin_read_DMA1_TC_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_TC_CNT(/;"	d
bfin_read_DMA1_TC_PER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_TC_PER(/;"	d
bfin_read_DMA1_TC_PER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA1_TC_PER(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_X_COUNT(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_X_MODIFY(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_Y_COUNT(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA1_Y_MODIFY(/;"	d
bfin_read_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_CONFIG(/;"	d
bfin_read_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_CONFIG(/;"	d
bfin_read_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_CONFIG(/;"	d
bfin_read_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_CONFIG(/;"	d
bfin_read_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_CONFIG(/;"	d
bfin_read_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_CURR_ADDR(/;"	d
bfin_read_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_CURR_ADDR(/;"	d
bfin_read_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_CURR_ADDR(/;"	d
bfin_read_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_CURR_ADDR(/;"	d
bfin_read_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_CURR_ADDR(/;"	d
bfin_read_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_CURR_DESC_PTR(/;"	d
bfin_read_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_CURR_DESC_PTR(/;"	d
bfin_read_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_CURR_DESC_PTR(/;"	d
bfin_read_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_CURR_DESC_PTR(/;"	d
bfin_read_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_CURR_DESC_PTR(/;"	d
bfin_read_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_CURR_X_COUNT(/;"	d
bfin_read_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_CURR_X_COUNT(/;"	d
bfin_read_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_CURR_X_COUNT(/;"	d
bfin_read_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_CURR_X_COUNT(/;"	d
bfin_read_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_CURR_X_COUNT(/;"	d
bfin_read_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_CURR_Y_COUNT(/;"	d
bfin_read_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_CURR_Y_COUNT(/;"	d
bfin_read_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_CURR_Y_COUNT(/;"	d
bfin_read_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_CURR_Y_COUNT(/;"	d
bfin_read_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_CURR_Y_COUNT(/;"	d
bfin_read_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_IRQ_STATUS(/;"	d
bfin_read_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_IRQ_STATUS(/;"	d
bfin_read_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_IRQ_STATUS(/;"	d
bfin_read_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_IRQ_STATUS(/;"	d
bfin_read_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_IRQ_STATUS(/;"	d
bfin_read_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_NEXT_DESC_PTR(/;"	d
bfin_read_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_NEXT_DESC_PTR(/;"	d
bfin_read_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_NEXT_DESC_PTR(/;"	d
bfin_read_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_NEXT_DESC_PTR(/;"	d
bfin_read_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_NEXT_DESC_PTR(/;"	d
bfin_read_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_PERIPHERAL_MAP(/;"	d
bfin_read_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_PERIPHERAL_MAP(/;"	d
bfin_read_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_PERIPHERAL_MAP(/;"	d
bfin_read_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_PERIPHERAL_MAP(/;"	d
bfin_read_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_PERIPHERAL_MAP(/;"	d
bfin_read_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_START_ADDR(/;"	d
bfin_read_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_START_ADDR(/;"	d
bfin_read_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_START_ADDR(/;"	d
bfin_read_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_START_ADDR(/;"	d
bfin_read_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_START_ADDR(/;"	d
bfin_read_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_X_COUNT(/;"	d
bfin_read_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_X_COUNT(/;"	d
bfin_read_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_X_COUNT(/;"	d
bfin_read_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_X_COUNT(/;"	d
bfin_read_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_X_COUNT(/;"	d
bfin_read_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_X_MODIFY(/;"	d
bfin_read_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_X_MODIFY(/;"	d
bfin_read_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_X_MODIFY(/;"	d
bfin_read_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_X_MODIFY(/;"	d
bfin_read_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_X_MODIFY(/;"	d
bfin_read_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_Y_COUNT(/;"	d
bfin_read_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_Y_COUNT(/;"	d
bfin_read_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_Y_COUNT(/;"	d
bfin_read_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_Y_COUNT(/;"	d
bfin_read_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_Y_COUNT(/;"	d
bfin_read_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA20_Y_MODIFY(/;"	d
bfin_read_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA20_Y_MODIFY(/;"	d
bfin_read_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA20_Y_MODIFY(/;"	d
bfin_read_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA20_Y_MODIFY(/;"	d
bfin_read_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA20_Y_MODIFY(/;"	d
bfin_read_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_CONFIG(/;"	d
bfin_read_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_CONFIG(/;"	d
bfin_read_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_CONFIG(/;"	d
bfin_read_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_CONFIG(/;"	d
bfin_read_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_CONFIG(/;"	d
bfin_read_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_CURR_ADDR(/;"	d
bfin_read_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_CURR_ADDR(/;"	d
bfin_read_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_CURR_ADDR(/;"	d
bfin_read_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_CURR_ADDR(/;"	d
bfin_read_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_CURR_ADDR(/;"	d
bfin_read_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_CURR_DESC_PTR(/;"	d
bfin_read_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_CURR_DESC_PTR(/;"	d
bfin_read_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_CURR_DESC_PTR(/;"	d
bfin_read_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_CURR_DESC_PTR(/;"	d
bfin_read_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_CURR_DESC_PTR(/;"	d
bfin_read_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_CURR_X_COUNT(/;"	d
bfin_read_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_CURR_X_COUNT(/;"	d
bfin_read_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_CURR_X_COUNT(/;"	d
bfin_read_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_CURR_X_COUNT(/;"	d
bfin_read_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_CURR_X_COUNT(/;"	d
bfin_read_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_CURR_Y_COUNT(/;"	d
bfin_read_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_CURR_Y_COUNT(/;"	d
bfin_read_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_CURR_Y_COUNT(/;"	d
bfin_read_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_CURR_Y_COUNT(/;"	d
bfin_read_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_CURR_Y_COUNT(/;"	d
bfin_read_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_IRQ_STATUS(/;"	d
bfin_read_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_IRQ_STATUS(/;"	d
bfin_read_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_IRQ_STATUS(/;"	d
bfin_read_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_IRQ_STATUS(/;"	d
bfin_read_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_IRQ_STATUS(/;"	d
bfin_read_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_NEXT_DESC_PTR(/;"	d
bfin_read_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_NEXT_DESC_PTR(/;"	d
bfin_read_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_NEXT_DESC_PTR(/;"	d
bfin_read_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_NEXT_DESC_PTR(/;"	d
bfin_read_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_NEXT_DESC_PTR(/;"	d
bfin_read_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_PERIPHERAL_MAP(/;"	d
bfin_read_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_PERIPHERAL_MAP(/;"	d
bfin_read_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_PERIPHERAL_MAP(/;"	d
bfin_read_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_PERIPHERAL_MAP(/;"	d
bfin_read_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_PERIPHERAL_MAP(/;"	d
bfin_read_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_START_ADDR(/;"	d
bfin_read_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_START_ADDR(/;"	d
bfin_read_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_START_ADDR(/;"	d
bfin_read_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_START_ADDR(/;"	d
bfin_read_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_START_ADDR(/;"	d
bfin_read_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_X_COUNT(/;"	d
bfin_read_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_X_COUNT(/;"	d
bfin_read_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_X_COUNT(/;"	d
bfin_read_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_X_COUNT(/;"	d
bfin_read_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_X_COUNT(/;"	d
bfin_read_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_X_MODIFY(/;"	d
bfin_read_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_X_MODIFY(/;"	d
bfin_read_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_X_MODIFY(/;"	d
bfin_read_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_X_MODIFY(/;"	d
bfin_read_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_X_MODIFY(/;"	d
bfin_read_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_Y_COUNT(/;"	d
bfin_read_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_Y_COUNT(/;"	d
bfin_read_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_Y_COUNT(/;"	d
bfin_read_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_Y_COUNT(/;"	d
bfin_read_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_Y_COUNT(/;"	d
bfin_read_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA21_Y_MODIFY(/;"	d
bfin_read_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA21_Y_MODIFY(/;"	d
bfin_read_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA21_Y_MODIFY(/;"	d
bfin_read_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA21_Y_MODIFY(/;"	d
bfin_read_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA21_Y_MODIFY(/;"	d
bfin_read_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_CONFIG(/;"	d
bfin_read_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_CONFIG(/;"	d
bfin_read_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_CONFIG(/;"	d
bfin_read_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_CONFIG(/;"	d
bfin_read_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_CONFIG(/;"	d
bfin_read_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_CURR_ADDR(/;"	d
bfin_read_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_CURR_ADDR(/;"	d
bfin_read_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_CURR_ADDR(/;"	d
bfin_read_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_CURR_ADDR(/;"	d
bfin_read_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_CURR_ADDR(/;"	d
bfin_read_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_CURR_DESC_PTR(/;"	d
bfin_read_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_CURR_DESC_PTR(/;"	d
bfin_read_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_CURR_DESC_PTR(/;"	d
bfin_read_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_CURR_DESC_PTR(/;"	d
bfin_read_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_CURR_DESC_PTR(/;"	d
bfin_read_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_CURR_X_COUNT(/;"	d
bfin_read_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_CURR_X_COUNT(/;"	d
bfin_read_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_CURR_X_COUNT(/;"	d
bfin_read_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_CURR_X_COUNT(/;"	d
bfin_read_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_CURR_X_COUNT(/;"	d
bfin_read_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_CURR_Y_COUNT(/;"	d
bfin_read_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_CURR_Y_COUNT(/;"	d
bfin_read_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_CURR_Y_COUNT(/;"	d
bfin_read_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_CURR_Y_COUNT(/;"	d
bfin_read_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_CURR_Y_COUNT(/;"	d
bfin_read_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_IRQ_STATUS(/;"	d
bfin_read_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_IRQ_STATUS(/;"	d
bfin_read_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_IRQ_STATUS(/;"	d
bfin_read_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_IRQ_STATUS(/;"	d
bfin_read_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_IRQ_STATUS(/;"	d
bfin_read_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_NEXT_DESC_PTR(/;"	d
bfin_read_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_NEXT_DESC_PTR(/;"	d
bfin_read_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_NEXT_DESC_PTR(/;"	d
bfin_read_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_NEXT_DESC_PTR(/;"	d
bfin_read_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_NEXT_DESC_PTR(/;"	d
bfin_read_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_PERIPHERAL_MAP(/;"	d
bfin_read_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_PERIPHERAL_MAP(/;"	d
bfin_read_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_PERIPHERAL_MAP(/;"	d
bfin_read_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_PERIPHERAL_MAP(/;"	d
bfin_read_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_PERIPHERAL_MAP(/;"	d
bfin_read_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_START_ADDR(/;"	d
bfin_read_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_START_ADDR(/;"	d
bfin_read_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_START_ADDR(/;"	d
bfin_read_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_START_ADDR(/;"	d
bfin_read_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_START_ADDR(/;"	d
bfin_read_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_X_COUNT(/;"	d
bfin_read_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_X_COUNT(/;"	d
bfin_read_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_X_COUNT(/;"	d
bfin_read_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_X_COUNT(/;"	d
bfin_read_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_X_COUNT(/;"	d
bfin_read_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_X_MODIFY(/;"	d
bfin_read_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_X_MODIFY(/;"	d
bfin_read_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_X_MODIFY(/;"	d
bfin_read_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_X_MODIFY(/;"	d
bfin_read_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_X_MODIFY(/;"	d
bfin_read_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_Y_COUNT(/;"	d
bfin_read_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_Y_COUNT(/;"	d
bfin_read_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_Y_COUNT(/;"	d
bfin_read_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_Y_COUNT(/;"	d
bfin_read_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_Y_COUNT(/;"	d
bfin_read_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA22_Y_MODIFY(/;"	d
bfin_read_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA22_Y_MODIFY(/;"	d
bfin_read_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA22_Y_MODIFY(/;"	d
bfin_read_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA22_Y_MODIFY(/;"	d
bfin_read_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA22_Y_MODIFY(/;"	d
bfin_read_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_CONFIG(/;"	d
bfin_read_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_CONFIG(/;"	d
bfin_read_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_CONFIG(/;"	d
bfin_read_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_CONFIG(/;"	d
bfin_read_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_CONFIG(/;"	d
bfin_read_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_CURR_ADDR(/;"	d
bfin_read_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_CURR_ADDR(/;"	d
bfin_read_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_CURR_ADDR(/;"	d
bfin_read_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_CURR_ADDR(/;"	d
bfin_read_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_CURR_ADDR(/;"	d
bfin_read_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_CURR_DESC_PTR(/;"	d
bfin_read_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_CURR_DESC_PTR(/;"	d
bfin_read_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_CURR_DESC_PTR(/;"	d
bfin_read_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_CURR_DESC_PTR(/;"	d
bfin_read_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_CURR_DESC_PTR(/;"	d
bfin_read_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_CURR_X_COUNT(/;"	d
bfin_read_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_CURR_X_COUNT(/;"	d
bfin_read_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_CURR_X_COUNT(/;"	d
bfin_read_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_CURR_X_COUNT(/;"	d
bfin_read_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_CURR_X_COUNT(/;"	d
bfin_read_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_CURR_Y_COUNT(/;"	d
bfin_read_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_CURR_Y_COUNT(/;"	d
bfin_read_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_CURR_Y_COUNT(/;"	d
bfin_read_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_CURR_Y_COUNT(/;"	d
bfin_read_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_CURR_Y_COUNT(/;"	d
bfin_read_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_IRQ_STATUS(/;"	d
bfin_read_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_IRQ_STATUS(/;"	d
bfin_read_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_IRQ_STATUS(/;"	d
bfin_read_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_IRQ_STATUS(/;"	d
bfin_read_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_IRQ_STATUS(/;"	d
bfin_read_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_NEXT_DESC_PTR(/;"	d
bfin_read_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_NEXT_DESC_PTR(/;"	d
bfin_read_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_NEXT_DESC_PTR(/;"	d
bfin_read_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_NEXT_DESC_PTR(/;"	d
bfin_read_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_NEXT_DESC_PTR(/;"	d
bfin_read_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_PERIPHERAL_MAP(/;"	d
bfin_read_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_PERIPHERAL_MAP(/;"	d
bfin_read_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_PERIPHERAL_MAP(/;"	d
bfin_read_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_PERIPHERAL_MAP(/;"	d
bfin_read_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_PERIPHERAL_MAP(/;"	d
bfin_read_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_START_ADDR(/;"	d
bfin_read_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_START_ADDR(/;"	d
bfin_read_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_START_ADDR(/;"	d
bfin_read_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_START_ADDR(/;"	d
bfin_read_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_START_ADDR(/;"	d
bfin_read_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_X_COUNT(/;"	d
bfin_read_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_X_COUNT(/;"	d
bfin_read_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_X_COUNT(/;"	d
bfin_read_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_X_COUNT(/;"	d
bfin_read_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_X_COUNT(/;"	d
bfin_read_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_X_MODIFY(/;"	d
bfin_read_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_X_MODIFY(/;"	d
bfin_read_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_X_MODIFY(/;"	d
bfin_read_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_X_MODIFY(/;"	d
bfin_read_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_X_MODIFY(/;"	d
bfin_read_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_Y_COUNT(/;"	d
bfin_read_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_Y_COUNT(/;"	d
bfin_read_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_Y_COUNT(/;"	d
bfin_read_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_Y_COUNT(/;"	d
bfin_read_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_Y_COUNT(/;"	d
bfin_read_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA23_Y_MODIFY(/;"	d
bfin_read_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA23_Y_MODIFY(/;"	d
bfin_read_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA23_Y_MODIFY(/;"	d
bfin_read_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA23_Y_MODIFY(/;"	d
bfin_read_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA23_Y_MODIFY(/;"	d
bfin_read_DMA2_0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_CONFIG(/;"	d
bfin_read_DMA2_0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_CURR_ADDR(/;"	d
bfin_read_DMA2_0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_CURR_X_COUNT(/;"	d
bfin_read_DMA2_0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_IRQ_STATUS(/;"	d
bfin_read_DMA2_0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_START_ADDR(/;"	d
bfin_read_DMA2_0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_X_COUNT(/;"	d
bfin_read_DMA2_0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_X_MODIFY(/;"	d
bfin_read_DMA2_0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_Y_COUNT(/;"	d
bfin_read_DMA2_0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_0_Y_MODIFY(/;"	d
bfin_read_DMA2_10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_CONFIG(/;"	d
bfin_read_DMA2_10_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_CURR_ADDR(/;"	d
bfin_read_DMA2_10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_CURR_X_COUNT(/;"	d
bfin_read_DMA2_10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_IRQ_STATUS(/;"	d
bfin_read_DMA2_10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_10_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_START_ADDR(/;"	d
bfin_read_DMA2_10_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_X_COUNT(/;"	d
bfin_read_DMA2_10_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_X_MODIFY(/;"	d
bfin_read_DMA2_10_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_Y_COUNT(/;"	d
bfin_read_DMA2_10_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_10_Y_MODIFY(/;"	d
bfin_read_DMA2_11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_CONFIG(/;"	d
bfin_read_DMA2_11_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_CURR_ADDR(/;"	d
bfin_read_DMA2_11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_CURR_X_COUNT(/;"	d
bfin_read_DMA2_11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_IRQ_STATUS(/;"	d
bfin_read_DMA2_11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_11_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_START_ADDR(/;"	d
bfin_read_DMA2_11_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_X_COUNT(/;"	d
bfin_read_DMA2_11_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_X_MODIFY(/;"	d
bfin_read_DMA2_11_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_Y_COUNT(/;"	d
bfin_read_DMA2_11_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_11_Y_MODIFY(/;"	d
bfin_read_DMA2_1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_CONFIG(/;"	d
bfin_read_DMA2_1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_CURR_ADDR(/;"	d
bfin_read_DMA2_1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_CURR_X_COUNT(/;"	d
bfin_read_DMA2_1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_IRQ_STATUS(/;"	d
bfin_read_DMA2_1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_START_ADDR(/;"	d
bfin_read_DMA2_1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_X_COUNT(/;"	d
bfin_read_DMA2_1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_X_MODIFY(/;"	d
bfin_read_DMA2_1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_Y_COUNT(/;"	d
bfin_read_DMA2_1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_1_Y_MODIFY(/;"	d
bfin_read_DMA2_2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_CONFIG(/;"	d
bfin_read_DMA2_2_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_CURR_ADDR(/;"	d
bfin_read_DMA2_2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_IRQ_STATUS(/;"	d
bfin_read_DMA2_2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_2_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_START_ADDR(/;"	d
bfin_read_DMA2_2_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_X_COUNT(/;"	d
bfin_read_DMA2_2_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_X_MODIFY(/;"	d
bfin_read_DMA2_2_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_Y_COUNT(/;"	d
bfin_read_DMA2_2_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_2_Y_MODIFY(/;"	d
bfin_read_DMA2_3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_CONFIG(/;"	d
bfin_read_DMA2_3_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_CURR_ADDR(/;"	d
bfin_read_DMA2_3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_CURR_X_COUNT(/;"	d
bfin_read_DMA2_3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_IRQ_STATUS(/;"	d
bfin_read_DMA2_3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_3_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_START_ADDR(/;"	d
bfin_read_DMA2_3_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_X_COUNT(/;"	d
bfin_read_DMA2_3_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_X_MODIFY(/;"	d
bfin_read_DMA2_3_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_Y_COUNT(/;"	d
bfin_read_DMA2_3_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_3_Y_MODIFY(/;"	d
bfin_read_DMA2_4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_CONFIG(/;"	d
bfin_read_DMA2_4_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_CURR_ADDR(/;"	d
bfin_read_DMA2_4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_CURR_X_COUNT(/;"	d
bfin_read_DMA2_4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_IRQ_STATUS(/;"	d
bfin_read_DMA2_4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_4_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_START_ADDR(/;"	d
bfin_read_DMA2_4_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_X_COUNT(/;"	d
bfin_read_DMA2_4_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_X_MODIFY(/;"	d
bfin_read_DMA2_4_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_Y_COUNT(/;"	d
bfin_read_DMA2_4_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_4_Y_MODIFY(/;"	d
bfin_read_DMA2_5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_CONFIG(/;"	d
bfin_read_DMA2_5_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_CURR_ADDR(/;"	d
bfin_read_DMA2_5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_CURR_X_COUNT(/;"	d
bfin_read_DMA2_5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_IRQ_STATUS(/;"	d
bfin_read_DMA2_5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_5_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_START_ADDR(/;"	d
bfin_read_DMA2_5_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_X_COUNT(/;"	d
bfin_read_DMA2_5_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_X_MODIFY(/;"	d
bfin_read_DMA2_5_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_Y_COUNT(/;"	d
bfin_read_DMA2_5_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_5_Y_MODIFY(/;"	d
bfin_read_DMA2_6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_CONFIG(/;"	d
bfin_read_DMA2_6_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_CURR_ADDR(/;"	d
bfin_read_DMA2_6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_CURR_X_COUNT(/;"	d
bfin_read_DMA2_6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_IRQ_STATUS(/;"	d
bfin_read_DMA2_6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_6_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_START_ADDR(/;"	d
bfin_read_DMA2_6_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_X_COUNT(/;"	d
bfin_read_DMA2_6_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_X_MODIFY(/;"	d
bfin_read_DMA2_6_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_Y_COUNT(/;"	d
bfin_read_DMA2_6_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_6_Y_MODIFY(/;"	d
bfin_read_DMA2_7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_CONFIG(/;"	d
bfin_read_DMA2_7_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_CURR_ADDR(/;"	d
bfin_read_DMA2_7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_CURR_X_COUNT(/;"	d
bfin_read_DMA2_7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_IRQ_STATUS(/;"	d
bfin_read_DMA2_7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_7_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_START_ADDR(/;"	d
bfin_read_DMA2_7_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_X_COUNT(/;"	d
bfin_read_DMA2_7_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_X_MODIFY(/;"	d
bfin_read_DMA2_7_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_Y_COUNT(/;"	d
bfin_read_DMA2_7_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_7_Y_MODIFY(/;"	d
bfin_read_DMA2_8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_CONFIG(/;"	d
bfin_read_DMA2_8_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_CURR_ADDR(/;"	d
bfin_read_DMA2_8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_CURR_X_COUNT(/;"	d
bfin_read_DMA2_8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_IRQ_STATUS(/;"	d
bfin_read_DMA2_8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_8_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_START_ADDR(/;"	d
bfin_read_DMA2_8_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_X_COUNT(/;"	d
bfin_read_DMA2_8_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_X_MODIFY(/;"	d
bfin_read_DMA2_8_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_Y_COUNT(/;"	d
bfin_read_DMA2_8_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_8_Y_MODIFY(/;"	d
bfin_read_DMA2_9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_CONFIG(/;"	d
bfin_read_DMA2_9_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_CURR_ADDR(/;"	d
bfin_read_DMA2_9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_CURR_X_COUNT(/;"	d
bfin_read_DMA2_9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_IRQ_STATUS(/;"	d
bfin_read_DMA2_9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_9_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_START_ADDR(/;"	d
bfin_read_DMA2_9_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_X_COUNT(/;"	d
bfin_read_DMA2_9_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_X_MODIFY(/;"	d
bfin_read_DMA2_9_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_Y_COUNT(/;"	d
bfin_read_DMA2_9_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_9_Y_MODIFY(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_CONFIG(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_CURR_ADDR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_CURR_DESC_PTR(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_CURR_X_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_CURR_Y_COUNT(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_IRQ_STATUS(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_NEXT_DESC_PTR(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_PERIPHERAL_MAP(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_START_ADDR(/;"	d
bfin_read_DMA2_TC_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_TC_CNT(/;"	d
bfin_read_DMA2_TC_PER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_DMA2_TC_PER(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_X_COUNT(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_X_MODIFY(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_Y_COUNT(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA2_Y_MODIFY(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_CONFIG(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_CURR_ADDR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_CURR_DESC_PTR(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_CURR_X_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_CURR_Y_COUNT(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_IRQ_STATUS(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_NEXT_DESC_PTR(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_PERIPHERAL_MAP(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_START_ADDR(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_X_COUNT(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_X_MODIFY(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_Y_COUNT(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA3_Y_MODIFY(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_CONFIG(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_CURR_ADDR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_CURR_DESC_PTR(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_CURR_X_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_CURR_Y_COUNT(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_IRQ_STATUS(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_NEXT_DESC_PTR(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_PERIPHERAL_MAP(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_START_ADDR(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_X_COUNT(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_X_MODIFY(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_Y_COUNT(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA4_Y_MODIFY(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_CONFIG(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_CURR_ADDR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_CURR_DESC_PTR(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_CURR_X_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_CURR_Y_COUNT(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_IRQ_STATUS(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_NEXT_DESC_PTR(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_PERIPHERAL_MAP(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_START_ADDR(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_X_COUNT(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_X_MODIFY(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_Y_COUNT(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA5_Y_MODIFY(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_CONFIG(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_CURR_ADDR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_CURR_DESC_PTR(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_CURR_X_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_CURR_Y_COUNT(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_IRQ_STATUS(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_NEXT_DESC_PTR(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_PERIPHERAL_MAP(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_START_ADDR(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_X_COUNT(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_X_MODIFY(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_Y_COUNT(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA6_Y_MODIFY(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_CONFIG(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_CURR_ADDR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_CURR_DESC_PTR(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_CURR_X_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_CURR_Y_COUNT(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_IRQ_STATUS(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_NEXT_DESC_PTR(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_PERIPHERAL_MAP(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_START_ADDR(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_X_COUNT(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_X_MODIFY(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_Y_COUNT(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA7_Y_MODIFY(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_CONFIG(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_CURR_ADDR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_CURR_DESC_PTR(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_CURR_X_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_CURR_Y_COUNT(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_IRQ_STATUS(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_NEXT_DESC_PTR(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_PERIPHERAL_MAP(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_START_ADDR(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_X_COUNT(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_X_MODIFY(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_Y_COUNT(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA8_Y_MODIFY(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_CONFIG(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_CURR_ADDR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_CURR_DESC_PTR(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_CURR_X_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_CURR_Y_COUNT(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_IRQ_STATUS(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_NEXT_DESC_PTR(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_PERIPHERAL_MAP(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_START_ADDR(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_X_COUNT(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_X_MODIFY(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_Y_COUNT(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMA9_Y_MODIFY(/;"	d
bfin_read_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMAC0_TCCNT(/;"	d
bfin_read_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMAC0_TCCNT(/;"	d
bfin_read_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMAC0_TCCNT(/;"	d
bfin_read_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMAC0_TCCNT(/;"	d
bfin_read_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMAC0_TCCNT(/;"	d
bfin_read_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMAC0_TCPER(/;"	d
bfin_read_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMAC0_TCPER(/;"	d
bfin_read_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMAC0_TCPER(/;"	d
bfin_read_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMAC0_TCPER(/;"	d
bfin_read_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMAC0_TCPER(/;"	d
bfin_read_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMAC1_PERIMUX(/;"	d
bfin_read_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMAC1_PERIMUX(/;"	d
bfin_read_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMAC1_PERIMUX(/;"	d
bfin_read_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMAC1_PERIMUX(/;"	d
bfin_read_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMAC1_PERIMUX(/;"	d
bfin_read_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMAC1_TCCNT(/;"	d
bfin_read_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMAC1_TCCNT(/;"	d
bfin_read_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMAC1_TCCNT(/;"	d
bfin_read_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMAC1_TCCNT(/;"	d
bfin_read_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMAC1_TCCNT(/;"	d
bfin_read_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_DMAC1_TCPER(/;"	d
bfin_read_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_DMAC1_TCPER(/;"	d
bfin_read_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_DMAC1_TCPER(/;"	d
bfin_read_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_DMAC1_TCPER(/;"	d
bfin_read_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_DMAC1_TCPER(/;"	d
bfin_read_DMAFLX0_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_CURXCOUNT(/;"	d
bfin_read_DMAFLX0_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_CURYCOUNT(/;"	d
bfin_read_DMAFLX0_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_DMACNFG(/;"	d
bfin_read_DMAFLX0_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_IRQSTAT(/;"	d
bfin_read_DMAFLX0_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_PMAP(/;"	d
bfin_read_DMAFLX0_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_XCOUNT(/;"	d
bfin_read_DMAFLX0_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_XMODIFY(/;"	d
bfin_read_DMAFLX0_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_YCOUNT(/;"	d
bfin_read_DMAFLX0_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX0_YMODIFY(/;"	d
bfin_read_DMAFLX1_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_CURXCOUNT(/;"	d
bfin_read_DMAFLX1_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_CURYCOUNT(/;"	d
bfin_read_DMAFLX1_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_DMACNFG(/;"	d
bfin_read_DMAFLX1_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_IRQSTAT(/;"	d
bfin_read_DMAFLX1_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_PMAP(/;"	d
bfin_read_DMAFLX1_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_XCOUNT(/;"	d
bfin_read_DMAFLX1_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_XMODIFY(/;"	d
bfin_read_DMAFLX1_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_YCOUNT(/;"	d
bfin_read_DMAFLX1_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX1_YMODIFY(/;"	d
bfin_read_DMAFLX2_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_CURXCOUNT(/;"	d
bfin_read_DMAFLX2_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_CURYCOUNT(/;"	d
bfin_read_DMAFLX2_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_DMACNFG(/;"	d
bfin_read_DMAFLX2_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_IRQSTAT(/;"	d
bfin_read_DMAFLX2_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_PMAP(/;"	d
bfin_read_DMAFLX2_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_XCOUNT(/;"	d
bfin_read_DMAFLX2_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_XMODIFY(/;"	d
bfin_read_DMAFLX2_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_YCOUNT(/;"	d
bfin_read_DMAFLX2_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX2_YMODIFY(/;"	d
bfin_read_DMAFLX3_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_CURXCOUNT(/;"	d
bfin_read_DMAFLX3_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_CURYCOUNT(/;"	d
bfin_read_DMAFLX3_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_DMACNFG(/;"	d
bfin_read_DMAFLX3_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_IRQSTAT(/;"	d
bfin_read_DMAFLX3_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_PMAP(/;"	d
bfin_read_DMAFLX3_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_XCOUNT(/;"	d
bfin_read_DMAFLX3_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_XMODIFY(/;"	d
bfin_read_DMAFLX3_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_YCOUNT(/;"	d
bfin_read_DMAFLX3_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX3_YMODIFY(/;"	d
bfin_read_DMAFLX4_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_CURXCOUNT(/;"	d
bfin_read_DMAFLX4_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_CURYCOUNT(/;"	d
bfin_read_DMAFLX4_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_DMACNFG(/;"	d
bfin_read_DMAFLX4_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_IRQSTAT(/;"	d
bfin_read_DMAFLX4_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_PMAP(/;"	d
bfin_read_DMAFLX4_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_XCOUNT(/;"	d
bfin_read_DMAFLX4_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_XMODIFY(/;"	d
bfin_read_DMAFLX4_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_YCOUNT(/;"	d
bfin_read_DMAFLX4_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX4_YMODIFY(/;"	d
bfin_read_DMAFLX5_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_CURXCOUNT(/;"	d
bfin_read_DMAFLX5_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_CURYCOUNT(/;"	d
bfin_read_DMAFLX5_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_DMACNFG(/;"	d
bfin_read_DMAFLX5_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_IRQSTAT(/;"	d
bfin_read_DMAFLX5_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_PMAP(/;"	d
bfin_read_DMAFLX5_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_XCOUNT(/;"	d
bfin_read_DMAFLX5_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_XMODIFY(/;"	d
bfin_read_DMAFLX5_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_YCOUNT(/;"	d
bfin_read_DMAFLX5_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX5_YMODIFY(/;"	d
bfin_read_DMAFLX6_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_CURXCOUNT(/;"	d
bfin_read_DMAFLX6_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_CURYCOUNT(/;"	d
bfin_read_DMAFLX6_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_DMACNFG(/;"	d
bfin_read_DMAFLX6_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_IRQSTAT(/;"	d
bfin_read_DMAFLX6_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_PMAP(/;"	d
bfin_read_DMAFLX6_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_XCOUNT(/;"	d
bfin_read_DMAFLX6_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_XMODIFY(/;"	d
bfin_read_DMAFLX6_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_YCOUNT(/;"	d
bfin_read_DMAFLX6_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX6_YMODIFY(/;"	d
bfin_read_DMAFLX7_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_CURXCOUNT(/;"	d
bfin_read_DMAFLX7_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_CURYCOUNT(/;"	d
bfin_read_DMAFLX7_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_DMACNFG(/;"	d
bfin_read_DMAFLX7_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_IRQSTAT(/;"	d
bfin_read_DMAFLX7_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_PMAP(/;"	d
bfin_read_DMAFLX7_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_XCOUNT(/;"	d
bfin_read_DMAFLX7_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_XMODIFY(/;"	d
bfin_read_DMAFLX7_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_YCOUNT(/;"	d
bfin_read_DMAFLX7_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMAFLX7_YMODIFY(/;"	d
bfin_read_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA_TC_CNT(/;"	d
bfin_read_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA_TC_CNT(/;"	d
bfin_read_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA_TC_CNT(/;"	d
bfin_read_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA_TC_CNT(/;"	d
bfin_read_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA_TC_CNT(/;"	d
bfin_read_DMA_TC_PER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_DMA_TC_PER(/;"	d
bfin_read_DMA_TC_PER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_DMA_TC_PER(/;"	d
bfin_read_DMA_TC_PER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_DMA_TC_PER(/;"	d
bfin_read_DMA_TC_PER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_DMA_TC_PER(/;"	d
bfin_read_DMA_TC_PER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_DMA_TC_PER(/;"	d
bfin_read_DMC0_CFG	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_CFG(/;"	d
bfin_read_DMC0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_CTL(/;"	d
bfin_read_DMC0_DLLCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_DLLCTL(/;"	d
bfin_read_DMC0_EMR1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_EMR1(/;"	d
bfin_read_DMC0_MR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_MR(/;"	d
bfin_read_DMC0_STAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_STAT(/;"	d
bfin_read_DMC0_TR0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_TR0(/;"	d
bfin_read_DMC0_TR1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_TR1(/;"	d
bfin_read_DMC0_TR2	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_DMC0_TR2(/;"	d
bfin_read_DMEM_CONTROL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DMEM_CONTROL(/;"	d
bfin_read_DSPID	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DSPID(/;"	d
bfin_read_DTEST_COMMAND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DTEST_COMMAND(/;"	d
bfin_read_DTEST_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DTEST_DATA0(/;"	d
bfin_read_DTEST_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_DTEST_DATA1(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_AMBCTL0(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_AMBCTL1(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_AMGCTL(/;"	d
bfin_read_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_ARBSTAT(/;"	d
bfin_read_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_ARBSTAT(/;"	d
bfin_read_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_ARBSTAT(/;"	d
bfin_read_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_ARBSTAT(/;"	d
bfin_read_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_ARBSTAT(/;"	d
bfin_read_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRACCT(/;"	d
bfin_read_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRACCT(/;"	d
bfin_read_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRACCT(/;"	d
bfin_read_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRACCT(/;"	d
bfin_read_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRACCT(/;"	d
bfin_read_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRARCT(/;"	d
bfin_read_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRARCT(/;"	d
bfin_read_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRARCT(/;"	d
bfin_read_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRARCT(/;"	d
bfin_read_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRARCT(/;"	d
bfin_read_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC0(/;"	d
bfin_read_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC0(/;"	d
bfin_read_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC0(/;"	d
bfin_read_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC0(/;"	d
bfin_read_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC0(/;"	d
bfin_read_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC1(/;"	d
bfin_read_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC1(/;"	d
bfin_read_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC1(/;"	d
bfin_read_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC1(/;"	d
bfin_read_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC1(/;"	d
bfin_read_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC2(/;"	d
bfin_read_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC2(/;"	d
bfin_read_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC2(/;"	d
bfin_read_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC2(/;"	d
bfin_read_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC2(/;"	d
bfin_read_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC3(/;"	d
bfin_read_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC3(/;"	d
bfin_read_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC3(/;"	d
bfin_read_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC3(/;"	d
bfin_read_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC3(/;"	d
bfin_read_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC4(/;"	d
bfin_read_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC4(/;"	d
bfin_read_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC4(/;"	d
bfin_read_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC4(/;"	d
bfin_read_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC4(/;"	d
bfin_read_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC5(/;"	d
bfin_read_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC5(/;"	d
bfin_read_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC5(/;"	d
bfin_read_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC5(/;"	d
bfin_read_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC5(/;"	d
bfin_read_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC6(/;"	d
bfin_read_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC6(/;"	d
bfin_read_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC6(/;"	d
bfin_read_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC6(/;"	d
bfin_read_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC6(/;"	d
bfin_read_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC7(/;"	d
bfin_read_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC7(/;"	d
bfin_read_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC7(/;"	d
bfin_read_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC7(/;"	d
bfin_read_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBRC7(/;"	d
bfin_read_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC0(/;"	d
bfin_read_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC0(/;"	d
bfin_read_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC0(/;"	d
bfin_read_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC0(/;"	d
bfin_read_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC0(/;"	d
bfin_read_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC1(/;"	d
bfin_read_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC1(/;"	d
bfin_read_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC1(/;"	d
bfin_read_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC1(/;"	d
bfin_read_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC1(/;"	d
bfin_read_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC2(/;"	d
bfin_read_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC2(/;"	d
bfin_read_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC2(/;"	d
bfin_read_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC2(/;"	d
bfin_read_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC2(/;"	d
bfin_read_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC3(/;"	d
bfin_read_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC3(/;"	d
bfin_read_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC3(/;"	d
bfin_read_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC3(/;"	d
bfin_read_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC3(/;"	d
bfin_read_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC4(/;"	d
bfin_read_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC4(/;"	d
bfin_read_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC4(/;"	d
bfin_read_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC4(/;"	d
bfin_read_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC4(/;"	d
bfin_read_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC5(/;"	d
bfin_read_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC5(/;"	d
bfin_read_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC5(/;"	d
bfin_read_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC5(/;"	d
bfin_read_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC5(/;"	d
bfin_read_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC6(/;"	d
bfin_read_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC6(/;"	d
bfin_read_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC6(/;"	d
bfin_read_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC6(/;"	d
bfin_read_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC6(/;"	d
bfin_read_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC7(/;"	d
bfin_read_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC7(/;"	d
bfin_read_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC7(/;"	d
bfin_read_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC7(/;"	d
bfin_read_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRBWC7(/;"	d
bfin_read_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL0(/;"	d
bfin_read_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL0(/;"	d
bfin_read_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL0(/;"	d
bfin_read_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL0(/;"	d
bfin_read_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL0(/;"	d
bfin_read_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL1(/;"	d
bfin_read_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL1(/;"	d
bfin_read_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL1(/;"	d
bfin_read_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL1(/;"	d
bfin_read_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL1(/;"	d
bfin_read_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL2(/;"	d
bfin_read_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL2(/;"	d
bfin_read_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL2(/;"	d
bfin_read_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL2(/;"	d
bfin_read_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL2(/;"	d
bfin_read_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL3(/;"	d
bfin_read_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL3(/;"	d
bfin_read_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL3(/;"	d
bfin_read_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL3(/;"	d
bfin_read_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRCTL3(/;"	d
bfin_read_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC0(/;"	d
bfin_read_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC0(/;"	d
bfin_read_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC0(/;"	d
bfin_read_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC0(/;"	d
bfin_read_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC0(/;"	d
bfin_read_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC1(/;"	d
bfin_read_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC1(/;"	d
bfin_read_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC1(/;"	d
bfin_read_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC1(/;"	d
bfin_read_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC1(/;"	d
bfin_read_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC2(/;"	d
bfin_read_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC2(/;"	d
bfin_read_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC2(/;"	d
bfin_read_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC2(/;"	d
bfin_read_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC2(/;"	d
bfin_read_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC3(/;"	d
bfin_read_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC3(/;"	d
bfin_read_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC3(/;"	d
bfin_read_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC3(/;"	d
bfin_read_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRGC3(/;"	d
bfin_read_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCCL(/;"	d
bfin_read_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCCL(/;"	d
bfin_read_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCCL(/;"	d
bfin_read_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCCL(/;"	d
bfin_read_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCCL(/;"	d
bfin_read_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCEN(/;"	d
bfin_read_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCEN(/;"	d
bfin_read_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCEN(/;"	d
bfin_read_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCEN(/;"	d
bfin_read_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRMCEN(/;"	d
bfin_read_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRQUE(/;"	d
bfin_read_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRQUE(/;"	d
bfin_read_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRQUE(/;"	d
bfin_read_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRQUE(/;"	d
bfin_read_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRQUE(/;"	d
bfin_read_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_DDRTACT(/;"	d
bfin_read_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_DDRTACT(/;"	d
bfin_read_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_DDRTACT(/;"	d
bfin_read_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_DDRTACT(/;"	d
bfin_read_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_DDRTACT(/;"	d
bfin_read_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_ERRADD(/;"	d
bfin_read_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_ERRADD(/;"	d
bfin_read_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_ERRADD(/;"	d
bfin_read_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_ERRADD(/;"	d
bfin_read_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_ERRADD(/;"	d
bfin_read_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_ERRMST(/;"	d
bfin_read_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_ERRMST(/;"	d
bfin_read_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_ERRMST(/;"	d
bfin_read_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_ERRMST(/;"	d
bfin_read_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_ERRMST(/;"	d
bfin_read_EBIU_FCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_EBIU_FCTL(/;"	d
bfin_read_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_FCTL(/;"	d
bfin_read_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_FCTL(/;"	d
bfin_read_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_FCTL(/;"	d
bfin_read_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_FCTL(/;"	d
bfin_read_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_FCTL(/;"	d
bfin_read_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_MBSCTL(/;"	d
bfin_read_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_MBSCTL(/;"	d
bfin_read_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_MBSCTL(/;"	d
bfin_read_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_MBSCTL(/;"	d
bfin_read_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_MBSCTL(/;"	d
bfin_read_EBIU_MODE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_EBIU_MODE(/;"	d
bfin_read_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_MODE(/;"	d
bfin_read_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_MODE(/;"	d
bfin_read_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_MODE(/;"	d
bfin_read_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_MODE(/;"	d
bfin_read_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_MODE(/;"	d
bfin_read_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EBIU_RSTCTL(/;"	d
bfin_read_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EBIU_RSTCTL(/;"	d
bfin_read_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EBIU_RSTCTL(/;"	d
bfin_read_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EBIU_RSTCTL(/;"	d
bfin_read_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EBIU_RSTCTL(/;"	d
bfin_read_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_SDBCTL(/;"	d
bfin_read_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_SDBCTL(/;"	d
bfin_read_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_SDBCTL(/;"	d
bfin_read_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_SDBCTL(/;"	d
bfin_read_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_SDBCTL(/;"	d
bfin_read_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_SDBCTL(/;"	d
bfin_read_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_SDGCTL(/;"	d
bfin_read_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_SDGCTL(/;"	d
bfin_read_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_SDGCTL(/;"	d
bfin_read_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_SDGCTL(/;"	d
bfin_read_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_SDGCTL(/;"	d
bfin_read_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_SDGCTL(/;"	d
bfin_read_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_SDRRC(/;"	d
bfin_read_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_SDRRC(/;"	d
bfin_read_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_SDRRC(/;"	d
bfin_read_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_SDRRC(/;"	d
bfin_read_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_SDRRC(/;"	d
bfin_read_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_SDRRC(/;"	d
bfin_read_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_EBIU_SDSTAT(/;"	d
bfin_read_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_EBIU_SDSTAT(/;"	d
bfin_read_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_EBIU_SDSTAT(/;"	d
bfin_read_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_EBIU_SDSTAT(/;"	d
bfin_read_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_EBIU_SDSTAT(/;"	d
bfin_read_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_EBIU_SDSTAT(/;"	d
bfin_read_EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_ADDRHI(/;"	d
bfin_read_EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_ADDRHI(/;"	d
bfin_read_EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_ADDRHI(/;"	d
bfin_read_EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_ADDRLO(/;"	d
bfin_read_EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_ADDRLO(/;"	d
bfin_read_EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_ADDRLO(/;"	d
bfin_read_EMAC_FLC	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_FLC(/;"	d
bfin_read_EMAC_FLC	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_FLC(/;"	d
bfin_read_EMAC_FLC	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_FLC(/;"	d
bfin_read_EMAC_HASHHI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_HASHHI(/;"	d
bfin_read_EMAC_HASHHI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_HASHHI(/;"	d
bfin_read_EMAC_HASHHI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_HASHHI(/;"	d
bfin_read_EMAC_HASHLO	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_HASHLO(/;"	d
bfin_read_EMAC_HASHLO	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_HASHLO(/;"	d
bfin_read_EMAC_HASHLO	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_HASHLO(/;"	d
bfin_read_EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_MMC_CTL(/;"	d
bfin_read_EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_MMC_CTL(/;"	d
bfin_read_EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_MMC_CTL(/;"	d
bfin_read_EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_MMC_RIRQE(/;"	d
bfin_read_EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_MMC_RIRQE(/;"	d
bfin_read_EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_MMC_RIRQE(/;"	d
bfin_read_EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_MMC_RIRQS(/;"	d
bfin_read_EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_MMC_RIRQS(/;"	d
bfin_read_EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_MMC_RIRQS(/;"	d
bfin_read_EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_MMC_TIRQE(/;"	d
bfin_read_EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_MMC_TIRQE(/;"	d
bfin_read_EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_MMC_TIRQE(/;"	d
bfin_read_EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_MMC_TIRQS(/;"	d
bfin_read_EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_MMC_TIRQS(/;"	d
bfin_read_EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_MMC_TIRQS(/;"	d
bfin_read_EMAC_OPMODE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_OPMODE(/;"	d
bfin_read_EMAC_OPMODE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_OPMODE(/;"	d
bfin_read_EMAC_OPMODE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_OPMODE(/;"	d
bfin_read_EMAC_PTP_ACCR	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ACCR(/;"	d
bfin_read_EMAC_PTP_ADDEND	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ADDEND(/;"	d
bfin_read_EMAC_PTP_ALARMHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ALARMHI(/;"	d
bfin_read_EMAC_PTP_ALARMLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ALARMLO(/;"	d
bfin_read_EMAC_PTP_CTL	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_CTL(/;"	d
bfin_read_EMAC_PTP_FOFF	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_FOFF(/;"	d
bfin_read_EMAC_PTP_FV1	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_FV1(/;"	d
bfin_read_EMAC_PTP_FV2	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_FV2(/;"	d
bfin_read_EMAC_PTP_FV3	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_FV3(/;"	d
bfin_read_EMAC_PTP_ID_OFF	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ID_OFF(/;"	d
bfin_read_EMAC_PTP_ID_SNAP	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ID_SNAP(/;"	d
bfin_read_EMAC_PTP_IE	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_IE(/;"	d
bfin_read_EMAC_PTP_ISTAT	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_ISTAT(/;"	d
bfin_read_EMAC_PTP_OFFSET	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_OFFSET(/;"	d
bfin_read_EMAC_PTP_PPS_PERIOD	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_PPS_PERIOD(/;"	d
bfin_read_EMAC_PTP_PPS_STARTHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_PPS_STARTHI(/;"	d
bfin_read_EMAC_PTP_PPS_STARTLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_PPS_STARTLO(/;"	d
bfin_read_EMAC_PTP_RXSNAPHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_RXSNAPHI(/;"	d
bfin_read_EMAC_PTP_RXSNAPLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_RXSNAPLO(/;"	d
bfin_read_EMAC_PTP_TIMEHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_TIMEHI(/;"	d
bfin_read_EMAC_PTP_TIMELO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_TIMELO(/;"	d
bfin_read_EMAC_PTP_TXSNAPHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_TXSNAPHI(/;"	d
bfin_read_EMAC_PTP_TXSNAPLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_read_EMAC_PTP_TXSNAPLO(/;"	d
bfin_read_EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_ALIGN(/;"	d
bfin_read_EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_ALIGN(/;"	d
bfin_read_EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_ALIGN(/;"	d
bfin_read_EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_ALLFRM(/;"	d
bfin_read_EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_ALLFRM(/;"	d
bfin_read_EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_ALLFRM(/;"	d
bfin_read_EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_ALLOCT(/;"	d
bfin_read_EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_ALLOCT(/;"	d
bfin_read_EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_ALLOCT(/;"	d
bfin_read_EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_BROAD(/;"	d
bfin_read_EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_BROAD(/;"	d
bfin_read_EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_BROAD(/;"	d
bfin_read_EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_DMAOVF(/;"	d
bfin_read_EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_DMAOVF(/;"	d
bfin_read_EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_DMAOVF(/;"	d
bfin_read_EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_EQ64(/;"	d
bfin_read_EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_EQ64(/;"	d
bfin_read_EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_EQ64(/;"	d
bfin_read_EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_FCS(/;"	d
bfin_read_EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_FCS(/;"	d
bfin_read_EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_FCS(/;"	d
bfin_read_EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_GE1024(/;"	d
bfin_read_EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_GE1024(/;"	d
bfin_read_EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_GE1024(/;"	d
bfin_read_EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LNERRI(/;"	d
bfin_read_EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LNERRI(/;"	d
bfin_read_EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LNERRI(/;"	d
bfin_read_EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LNERRO(/;"	d
bfin_read_EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LNERRO(/;"	d
bfin_read_EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LNERRO(/;"	d
bfin_read_EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LONG(/;"	d
bfin_read_EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LONG(/;"	d
bfin_read_EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LONG(/;"	d
bfin_read_EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LT1024(/;"	d
bfin_read_EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LT1024(/;"	d
bfin_read_EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LT1024(/;"	d
bfin_read_EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LT128(/;"	d
bfin_read_EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LT128(/;"	d
bfin_read_EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LT128(/;"	d
bfin_read_EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LT256(/;"	d
bfin_read_EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LT256(/;"	d
bfin_read_EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LT256(/;"	d
bfin_read_EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_LT512(/;"	d
bfin_read_EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_LT512(/;"	d
bfin_read_EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_LT512(/;"	d
bfin_read_EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_MACCTL(/;"	d
bfin_read_EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_MACCTL(/;"	d
bfin_read_EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_MACCTL(/;"	d
bfin_read_EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_MULTI(/;"	d
bfin_read_EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_MULTI(/;"	d
bfin_read_EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_MULTI(/;"	d
bfin_read_EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_OCTET(/;"	d
bfin_read_EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_OCTET(/;"	d
bfin_read_EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_OCTET(/;"	d
bfin_read_EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_OK(/;"	d
bfin_read_EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_OK(/;"	d
bfin_read_EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_OK(/;"	d
bfin_read_EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_OPCODE(/;"	d
bfin_read_EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_OPCODE(/;"	d
bfin_read_EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_OPCODE(/;"	d
bfin_read_EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_PAUSE(/;"	d
bfin_read_EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_PAUSE(/;"	d
bfin_read_EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_PAUSE(/;"	d
bfin_read_EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_SHORT(/;"	d
bfin_read_EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_SHORT(/;"	d
bfin_read_EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_SHORT(/;"	d
bfin_read_EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_TYPED(/;"	d
bfin_read_EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_TYPED(/;"	d
bfin_read_EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_TYPED(/;"	d
bfin_read_EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RXC_UNICST(/;"	d
bfin_read_EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RXC_UNICST(/;"	d
bfin_read_EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RXC_UNICST(/;"	d
bfin_read_EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RX_IRQE(/;"	d
bfin_read_EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RX_IRQE(/;"	d
bfin_read_EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RX_IRQE(/;"	d
bfin_read_EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RX_STAT(/;"	d
bfin_read_EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RX_STAT(/;"	d
bfin_read_EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RX_STAT(/;"	d
bfin_read_EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_RX_STKY(/;"	d
bfin_read_EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_RX_STKY(/;"	d
bfin_read_EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_RX_STKY(/;"	d
bfin_read_EMAC_STAADD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_STAADD(/;"	d
bfin_read_EMAC_STAADD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_STAADD(/;"	d
bfin_read_EMAC_STAADD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_STAADD(/;"	d
bfin_read_EMAC_STADAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_STADAT(/;"	d
bfin_read_EMAC_STADAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_STADAT(/;"	d
bfin_read_EMAC_STADAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_STADAT(/;"	d
bfin_read_EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_SYSCTL(/;"	d
bfin_read_EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_SYSCTL(/;"	d
bfin_read_EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_SYSCTL(/;"	d
bfin_read_EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_SYSTAT(/;"	d
bfin_read_EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_SYSTAT(/;"	d
bfin_read_EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_SYSTAT(/;"	d
bfin_read_EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_1COL(/;"	d
bfin_read_EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_1COL(/;"	d
bfin_read_EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_1COL(/;"	d
bfin_read_EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_ABORT(/;"	d
bfin_read_EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_ABORT(/;"	d
bfin_read_EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_ABORT(/;"	d
bfin_read_EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_ALLFRM(/;"	d
bfin_read_EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_ALLFRM(/;"	d
bfin_read_EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_ALLFRM(/;"	d
bfin_read_EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_ALLOCT(/;"	d
bfin_read_EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_ALLOCT(/;"	d
bfin_read_EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_ALLOCT(/;"	d
bfin_read_EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_BROAD(/;"	d
bfin_read_EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_BROAD(/;"	d
bfin_read_EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_BROAD(/;"	d
bfin_read_EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_CRSERR(/;"	d
bfin_read_EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_CRSERR(/;"	d
bfin_read_EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_CRSERR(/;"	d
bfin_read_EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_DEFER(/;"	d
bfin_read_EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_DEFER(/;"	d
bfin_read_EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_DEFER(/;"	d
bfin_read_EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_DMAUND(/;"	d
bfin_read_EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_DMAUND(/;"	d
bfin_read_EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_DMAUND(/;"	d
bfin_read_EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_EQ64(/;"	d
bfin_read_EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_EQ64(/;"	d
bfin_read_EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_EQ64(/;"	d
bfin_read_EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_GE1024(/;"	d
bfin_read_EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_GE1024(/;"	d
bfin_read_EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_GE1024(/;"	d
bfin_read_EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_GT1COL(/;"	d
bfin_read_EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_GT1COL(/;"	d
bfin_read_EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_GT1COL(/;"	d
bfin_read_EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_LATECL(/;"	d
bfin_read_EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_LATECL(/;"	d
bfin_read_EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_LATECL(/;"	d
bfin_read_EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_LT1024(/;"	d
bfin_read_EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_LT1024(/;"	d
bfin_read_EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_LT1024(/;"	d
bfin_read_EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_LT128(/;"	d
bfin_read_EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_LT128(/;"	d
bfin_read_EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_LT128(/;"	d
bfin_read_EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_LT256(/;"	d
bfin_read_EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_LT256(/;"	d
bfin_read_EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_LT256(/;"	d
bfin_read_EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_LT512(/;"	d
bfin_read_EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_LT512(/;"	d
bfin_read_EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_LT512(/;"	d
bfin_read_EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_MACCTL(/;"	d
bfin_read_EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_MACCTL(/;"	d
bfin_read_EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_MACCTL(/;"	d
bfin_read_EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_MULTI(/;"	d
bfin_read_EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_MULTI(/;"	d
bfin_read_EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_MULTI(/;"	d
bfin_read_EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_OCTET(/;"	d
bfin_read_EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_OCTET(/;"	d
bfin_read_EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_OCTET(/;"	d
bfin_read_EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_OK(/;"	d
bfin_read_EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_OK(/;"	d
bfin_read_EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_OK(/;"	d
bfin_read_EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_UNICST(/;"	d
bfin_read_EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_UNICST(/;"	d
bfin_read_EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_UNICST(/;"	d
bfin_read_EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_XS_COL(/;"	d
bfin_read_EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_XS_COL(/;"	d
bfin_read_EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_XS_COL(/;"	d
bfin_read_EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TXC_XS_DFR(/;"	d
bfin_read_EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TXC_XS_DFR(/;"	d
bfin_read_EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TXC_XS_DFR(/;"	d
bfin_read_EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TX_IRQE(/;"	d
bfin_read_EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TX_IRQE(/;"	d
bfin_read_EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TX_IRQE(/;"	d
bfin_read_EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TX_STAT(/;"	d
bfin_read_EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TX_STAT(/;"	d
bfin_read_EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TX_STAT(/;"	d
bfin_read_EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_TX_STKY(/;"	d
bfin_read_EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_TX_STKY(/;"	d
bfin_read_EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_TX_STKY(/;"	d
bfin_read_EMAC_VLAN1	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_VLAN1(/;"	d
bfin_read_EMAC_VLAN1	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_VLAN1(/;"	d
bfin_read_EMAC_VLAN1	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_VLAN1(/;"	d
bfin_read_EMAC_VLAN2	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_VLAN2(/;"	d
bfin_read_EMAC_VLAN2	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_VLAN2(/;"	d
bfin_read_EMAC_VLAN2	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_VLAN2(/;"	d
bfin_read_EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_CTL(/;"	d
bfin_read_EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_CTL(/;"	d
bfin_read_EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_CTL(/;"	d
bfin_read_EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCMD(/;"	d
bfin_read_EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCMD(/;"	d
bfin_read_EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCMD(/;"	d
bfin_read_EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCRC0(/;"	d
bfin_read_EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCRC0(/;"	d
bfin_read_EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCRC0(/;"	d
bfin_read_EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCRC1(/;"	d
bfin_read_EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCRC1(/;"	d
bfin_read_EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFCRC1(/;"	d
bfin_read_EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK0(/;"	d
bfin_read_EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK0(/;"	d
bfin_read_EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK0(/;"	d
bfin_read_EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK1(/;"	d
bfin_read_EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK1(/;"	d
bfin_read_EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK1(/;"	d
bfin_read_EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK2(/;"	d
bfin_read_EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK2(/;"	d
bfin_read_EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK2(/;"	d
bfin_read_EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK3(/;"	d
bfin_read_EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK3(/;"	d
bfin_read_EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFMSK3(/;"	d
bfin_read_EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_read_EMAC_WKUP_FFOFF(/;"	d
bfin_read_EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_read_EMAC_WKUP_FFOFF(/;"	d
bfin_read_EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_read_EMAC_WKUP_FFOFF(/;"	d
bfin_read_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_CLIP(/;"	d
bfin_read_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_CLIP(/;"	d
bfin_read_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_CLIP(/;"	d
bfin_read_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_CLIP(/;"	d
bfin_read_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_CLKDIV(/;"	d
bfin_read_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_CLKDIV(/;"	d
bfin_read_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_CLKDIV(/;"	d
bfin_read_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_CLKDIV(/;"	d
bfin_read_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_CONTROL(/;"	d
bfin_read_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_CONTROL(/;"	d
bfin_read_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_CONTROL(/;"	d
bfin_read_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_CONTROL(/;"	d
bfin_read_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_FRAME(/;"	d
bfin_read_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_FRAME(/;"	d
bfin_read_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_FRAME(/;"	d
bfin_read_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_FRAME(/;"	d
bfin_read_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_FS1P_AVPL(/;"	d
bfin_read_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_FS1P_AVPL(/;"	d
bfin_read_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_FS1P_AVPL(/;"	d
bfin_read_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_FS1P_AVPL(/;"	d
bfin_read_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_FS1W_HBL(/;"	d
bfin_read_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_FS1W_HBL(/;"	d
bfin_read_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_FS1W_HBL(/;"	d
bfin_read_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_FS1W_HBL(/;"	d
bfin_read_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_FS2P_LAVF(/;"	d
bfin_read_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_FS2P_LAVF(/;"	d
bfin_read_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_FS2P_LAVF(/;"	d
bfin_read_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_FS2P_LAVF(/;"	d
bfin_read_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_FS2W_LVB(/;"	d
bfin_read_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_FS2W_LVB(/;"	d
bfin_read_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_FS2W_LVB(/;"	d
bfin_read_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_FS2W_LVB(/;"	d
bfin_read_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_HCOUNT(/;"	d
bfin_read_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_HCOUNT(/;"	d
bfin_read_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_HCOUNT(/;"	d
bfin_read_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_HCOUNT(/;"	d
bfin_read_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_HDELAY(/;"	d
bfin_read_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_HDELAY(/;"	d
bfin_read_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_HDELAY(/;"	d
bfin_read_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_HDELAY(/;"	d
bfin_read_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_LINE(/;"	d
bfin_read_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_LINE(/;"	d
bfin_read_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_LINE(/;"	d
bfin_read_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_LINE(/;"	d
bfin_read_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_STATUS(/;"	d
bfin_read_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_STATUS(/;"	d
bfin_read_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_STATUS(/;"	d
bfin_read_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_STATUS(/;"	d
bfin_read_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_VCOUNT(/;"	d
bfin_read_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_VCOUNT(/;"	d
bfin_read_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_VCOUNT(/;"	d
bfin_read_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_VCOUNT(/;"	d
bfin_read_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI0_VDELAY(/;"	d
bfin_read_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI0_VDELAY(/;"	d
bfin_read_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI0_VDELAY(/;"	d
bfin_read_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI0_VDELAY(/;"	d
bfin_read_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_CLIP(/;"	d
bfin_read_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_CLIP(/;"	d
bfin_read_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_CLIP(/;"	d
bfin_read_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_CLIP(/;"	d
bfin_read_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_CLIP(/;"	d
bfin_read_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_CLKDIV(/;"	d
bfin_read_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_CLKDIV(/;"	d
bfin_read_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_CLKDIV(/;"	d
bfin_read_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_CLKDIV(/;"	d
bfin_read_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_CLKDIV(/;"	d
bfin_read_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_CONTROL(/;"	d
bfin_read_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_CONTROL(/;"	d
bfin_read_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_CONTROL(/;"	d
bfin_read_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_CONTROL(/;"	d
bfin_read_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_CONTROL(/;"	d
bfin_read_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_FRAME(/;"	d
bfin_read_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_FRAME(/;"	d
bfin_read_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_FRAME(/;"	d
bfin_read_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_FRAME(/;"	d
bfin_read_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_FRAME(/;"	d
bfin_read_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_FS1P_AVPL(/;"	d
bfin_read_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_FS1P_AVPL(/;"	d
bfin_read_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_FS1P_AVPL(/;"	d
bfin_read_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_FS1P_AVPL(/;"	d
bfin_read_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_FS1P_AVPL(/;"	d
bfin_read_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_FS1W_HBL(/;"	d
bfin_read_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_FS1W_HBL(/;"	d
bfin_read_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_FS1W_HBL(/;"	d
bfin_read_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_FS1W_HBL(/;"	d
bfin_read_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_FS1W_HBL(/;"	d
bfin_read_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_FS2P_LAVF(/;"	d
bfin_read_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_FS2P_LAVF(/;"	d
bfin_read_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_FS2P_LAVF(/;"	d
bfin_read_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_FS2P_LAVF(/;"	d
bfin_read_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_FS2P_LAVF(/;"	d
bfin_read_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_FS2W_LVB(/;"	d
bfin_read_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_FS2W_LVB(/;"	d
bfin_read_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_FS2W_LVB(/;"	d
bfin_read_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_FS2W_LVB(/;"	d
bfin_read_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_FS2W_LVB(/;"	d
bfin_read_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_HCOUNT(/;"	d
bfin_read_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_HCOUNT(/;"	d
bfin_read_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_HCOUNT(/;"	d
bfin_read_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_HCOUNT(/;"	d
bfin_read_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_HCOUNT(/;"	d
bfin_read_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_HDELAY(/;"	d
bfin_read_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_HDELAY(/;"	d
bfin_read_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_HDELAY(/;"	d
bfin_read_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_HDELAY(/;"	d
bfin_read_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_HDELAY(/;"	d
bfin_read_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_LINE(/;"	d
bfin_read_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_LINE(/;"	d
bfin_read_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_LINE(/;"	d
bfin_read_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_LINE(/;"	d
bfin_read_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_LINE(/;"	d
bfin_read_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_STATUS(/;"	d
bfin_read_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_STATUS(/;"	d
bfin_read_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_STATUS(/;"	d
bfin_read_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_STATUS(/;"	d
bfin_read_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_STATUS(/;"	d
bfin_read_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_VCOUNT(/;"	d
bfin_read_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_VCOUNT(/;"	d
bfin_read_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_VCOUNT(/;"	d
bfin_read_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_VCOUNT(/;"	d
bfin_read_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_VCOUNT(/;"	d
bfin_read_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI1_VDELAY(/;"	d
bfin_read_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI1_VDELAY(/;"	d
bfin_read_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI1_VDELAY(/;"	d
bfin_read_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI1_VDELAY(/;"	d
bfin_read_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI1_VDELAY(/;"	d
bfin_read_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_CLIP(/;"	d
bfin_read_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_CLIP(/;"	d
bfin_read_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_CLIP(/;"	d
bfin_read_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_CLIP(/;"	d
bfin_read_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_CLIP(/;"	d
bfin_read_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_CLKDIV(/;"	d
bfin_read_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_CLKDIV(/;"	d
bfin_read_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_CLKDIV(/;"	d
bfin_read_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_CLKDIV(/;"	d
bfin_read_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_CLKDIV(/;"	d
bfin_read_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_CONTROL(/;"	d
bfin_read_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_CONTROL(/;"	d
bfin_read_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_CONTROL(/;"	d
bfin_read_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_CONTROL(/;"	d
bfin_read_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_CONTROL(/;"	d
bfin_read_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_FRAME(/;"	d
bfin_read_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_FRAME(/;"	d
bfin_read_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_FRAME(/;"	d
bfin_read_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_FRAME(/;"	d
bfin_read_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_FRAME(/;"	d
bfin_read_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_FS1P_AVPL(/;"	d
bfin_read_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_FS1P_AVPL(/;"	d
bfin_read_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_FS1P_AVPL(/;"	d
bfin_read_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_FS1P_AVPL(/;"	d
bfin_read_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_FS1P_AVPL(/;"	d
bfin_read_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_FS1W_HBL(/;"	d
bfin_read_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_FS1W_HBL(/;"	d
bfin_read_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_FS1W_HBL(/;"	d
bfin_read_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_FS1W_HBL(/;"	d
bfin_read_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_FS1W_HBL(/;"	d
bfin_read_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_FS2P_LAVF(/;"	d
bfin_read_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_FS2P_LAVF(/;"	d
bfin_read_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_FS2P_LAVF(/;"	d
bfin_read_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_FS2P_LAVF(/;"	d
bfin_read_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_FS2P_LAVF(/;"	d
bfin_read_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_FS2W_LVB(/;"	d
bfin_read_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_FS2W_LVB(/;"	d
bfin_read_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_FS2W_LVB(/;"	d
bfin_read_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_FS2W_LVB(/;"	d
bfin_read_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_FS2W_LVB(/;"	d
bfin_read_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_HCOUNT(/;"	d
bfin_read_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_HCOUNT(/;"	d
bfin_read_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_HCOUNT(/;"	d
bfin_read_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_HCOUNT(/;"	d
bfin_read_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_HCOUNT(/;"	d
bfin_read_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_HDELAY(/;"	d
bfin_read_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_HDELAY(/;"	d
bfin_read_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_HDELAY(/;"	d
bfin_read_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_HDELAY(/;"	d
bfin_read_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_HDELAY(/;"	d
bfin_read_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_LINE(/;"	d
bfin_read_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_LINE(/;"	d
bfin_read_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_LINE(/;"	d
bfin_read_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_LINE(/;"	d
bfin_read_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_LINE(/;"	d
bfin_read_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_STATUS(/;"	d
bfin_read_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_STATUS(/;"	d
bfin_read_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_STATUS(/;"	d
bfin_read_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_STATUS(/;"	d
bfin_read_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_STATUS(/;"	d
bfin_read_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_VCOUNT(/;"	d
bfin_read_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_VCOUNT(/;"	d
bfin_read_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_VCOUNT(/;"	d
bfin_read_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_VCOUNT(/;"	d
bfin_read_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_VCOUNT(/;"	d
bfin_read_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_EPPI2_VDELAY(/;"	d
bfin_read_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_EPPI2_VDELAY(/;"	d
bfin_read_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_EPPI2_VDELAY(/;"	d
bfin_read_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_EPPI2_VDELAY(/;"	d
bfin_read_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_EPPI2_VDELAY(/;"	d
bfin_read_EVT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT0(/;"	d
bfin_read_EVT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT1(/;"	d
bfin_read_EVT10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT10(/;"	d
bfin_read_EVT11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT11(/;"	d
bfin_read_EVT12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT12(/;"	d
bfin_read_EVT13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT13(/;"	d
bfin_read_EVT14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT14(/;"	d
bfin_read_EVT15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT15(/;"	d
bfin_read_EVT2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT2(/;"	d
bfin_read_EVT3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT3(/;"	d
bfin_read_EVT4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT4(/;"	d
bfin_read_EVT5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT5(/;"	d
bfin_read_EVT6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT6(/;"	d
bfin_read_EVT7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT7(/;"	d
bfin_read_EVT8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT8(/;"	d
bfin_read_EVT9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT9(/;"	d
bfin_read_EVT_OVERRIDE	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_EVT_OVERRIDE(/;"	d
bfin_read_FIO0_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_BOTH(/;"	d
bfin_read_FIO0_DIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_DIR(/;"	d
bfin_read_FIO0_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_EDGE(/;"	d
bfin_read_FIO0_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_FLAG_C(/;"	d
bfin_read_FIO0_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_FLAG_D(/;"	d
bfin_read_FIO0_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_FLAG_S(/;"	d
bfin_read_FIO0_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_FLAG_T(/;"	d
bfin_read_FIO0_INEN	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_INEN(/;"	d
bfin_read_FIO0_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKA_C(/;"	d
bfin_read_FIO0_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKA_D(/;"	d
bfin_read_FIO0_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKA_S(/;"	d
bfin_read_FIO0_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKA_T(/;"	d
bfin_read_FIO0_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKB_C(/;"	d
bfin_read_FIO0_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKB_D(/;"	d
bfin_read_FIO0_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKB_S(/;"	d
bfin_read_FIO0_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_MASKB_T(/;"	d
bfin_read_FIO0_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO0_POLAR(/;"	d
bfin_read_FIO1_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_BOTH(/;"	d
bfin_read_FIO1_DIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_DIR(/;"	d
bfin_read_FIO1_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_EDGE(/;"	d
bfin_read_FIO1_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_FLAG_C(/;"	d
bfin_read_FIO1_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_FLAG_D(/;"	d
bfin_read_FIO1_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_FLAG_S(/;"	d
bfin_read_FIO1_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_FLAG_T(/;"	d
bfin_read_FIO1_INEN	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_INEN(/;"	d
bfin_read_FIO1_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKA_C(/;"	d
bfin_read_FIO1_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKA_D(/;"	d
bfin_read_FIO1_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKA_S(/;"	d
bfin_read_FIO1_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKA_T(/;"	d
bfin_read_FIO1_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKB_C(/;"	d
bfin_read_FIO1_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKB_D(/;"	d
bfin_read_FIO1_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKB_S(/;"	d
bfin_read_FIO1_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_MASKB_T(/;"	d
bfin_read_FIO1_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO1_POLAR(/;"	d
bfin_read_FIO2_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_BOTH(/;"	d
bfin_read_FIO2_DIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_DIR(/;"	d
bfin_read_FIO2_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_EDGE(/;"	d
bfin_read_FIO2_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_FLAG_C(/;"	d
bfin_read_FIO2_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_FLAG_D(/;"	d
bfin_read_FIO2_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_FLAG_S(/;"	d
bfin_read_FIO2_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_FLAG_T(/;"	d
bfin_read_FIO2_INEN	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_INEN(/;"	d
bfin_read_FIO2_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKA_C(/;"	d
bfin_read_FIO2_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKA_D(/;"	d
bfin_read_FIO2_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKA_S(/;"	d
bfin_read_FIO2_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKA_T(/;"	d
bfin_read_FIO2_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKB_C(/;"	d
bfin_read_FIO2_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKB_D(/;"	d
bfin_read_FIO2_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKB_S(/;"	d
bfin_read_FIO2_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_MASKB_T(/;"	d
bfin_read_FIO2_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_FIO2_POLAR(/;"	d
bfin_read_FIO_BOTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_BOTH(/;"	d
bfin_read_FIO_DIR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_DIR(/;"	d
bfin_read_FIO_EDGE	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_EDGE(/;"	d
bfin_read_FIO_FLAG_C	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_FLAG_C(/;"	d
bfin_read_FIO_FLAG_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_FLAG_D(/;"	d
bfin_read_FIO_FLAG_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_FLAG_S(/;"	d
bfin_read_FIO_FLAG_T	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_FLAG_T(/;"	d
bfin_read_FIO_INEN	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_INEN(/;"	d
bfin_read_FIO_MASKA_C	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKA_C(/;"	d
bfin_read_FIO_MASKA_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKA_D(/;"	d
bfin_read_FIO_MASKA_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKA_S(/;"	d
bfin_read_FIO_MASKA_T	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKA_T(/;"	d
bfin_read_FIO_MASKB_C	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKB_C(/;"	d
bfin_read_FIO_MASKB_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKB_D(/;"	d
bfin_read_FIO_MASKB_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKB_S(/;"	d
bfin_read_FIO_MASKB_T	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_MASKB_T(/;"	d
bfin_read_FIO_POLAR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_FIO_POLAR(/;"	d
bfin_read_FLASH_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_FLASH_CONTROL(/;"	d
bfin_read_FLASH_CONTROL_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_FLASH_CONTROL_CLEAR(/;"	d
bfin_read_FLASH_CONTROL_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_FLASH_CONTROL_SET(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_BCINIT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_BCOUNT(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_CONTROL(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_ECINIT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOUNT(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_ECOVERFLOW(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA0_ECURGENT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_BCINIT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_BCOUNT(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_CONTROL(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_ECINIT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOUNT(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_ECOVERFLOW(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HMDMA1_ECURGENT(/;"	d
bfin_read_HOST_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HOST_CONTROL(/;"	d
bfin_read_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HOST_CONTROL(/;"	d
bfin_read_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HOST_CONTROL(/;"	d
bfin_read_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HOST_CONTROL(/;"	d
bfin_read_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HOST_CONTROL(/;"	d
bfin_read_HOST_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HOST_STATUS(/;"	d
bfin_read_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HOST_STATUS(/;"	d
bfin_read_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HOST_STATUS(/;"	d
bfin_read_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HOST_STATUS(/;"	d
bfin_read_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HOST_STATUS(/;"	d
bfin_read_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_HOST_TIMEOUT(/;"	d
bfin_read_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_HOST_TIMEOUT(/;"	d
bfin_read_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_HOST_TIMEOUT(/;"	d
bfin_read_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_HOST_TIMEOUT(/;"	d
bfin_read_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_HOST_TIMEOUT(/;"	d
bfin_read_ICPLB_ADDR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR0(/;"	d
bfin_read_ICPLB_ADDR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR1(/;"	d
bfin_read_ICPLB_ADDR10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR10(/;"	d
bfin_read_ICPLB_ADDR11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR11(/;"	d
bfin_read_ICPLB_ADDR12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR12(/;"	d
bfin_read_ICPLB_ADDR13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR13(/;"	d
bfin_read_ICPLB_ADDR14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR14(/;"	d
bfin_read_ICPLB_ADDR15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR15(/;"	d
bfin_read_ICPLB_ADDR2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR2(/;"	d
bfin_read_ICPLB_ADDR3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR3(/;"	d
bfin_read_ICPLB_ADDR4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR4(/;"	d
bfin_read_ICPLB_ADDR5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR5(/;"	d
bfin_read_ICPLB_ADDR6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR6(/;"	d
bfin_read_ICPLB_ADDR7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR7(/;"	d
bfin_read_ICPLB_ADDR8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR8(/;"	d
bfin_read_ICPLB_ADDR9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_ADDR9(/;"	d
bfin_read_ICPLB_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA0(/;"	d
bfin_read_ICPLB_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA1(/;"	d
bfin_read_ICPLB_DATA10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA10(/;"	d
bfin_read_ICPLB_DATA11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA11(/;"	d
bfin_read_ICPLB_DATA12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA12(/;"	d
bfin_read_ICPLB_DATA13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA13(/;"	d
bfin_read_ICPLB_DATA14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA14(/;"	d
bfin_read_ICPLB_DATA15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA15(/;"	d
bfin_read_ICPLB_DATA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA2(/;"	d
bfin_read_ICPLB_DATA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA3(/;"	d
bfin_read_ICPLB_DATA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA4(/;"	d
bfin_read_ICPLB_DATA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA5(/;"	d
bfin_read_ICPLB_DATA6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA6(/;"	d
bfin_read_ICPLB_DATA7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA7(/;"	d
bfin_read_ICPLB_DATA8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA8(/;"	d
bfin_read_ICPLB_DATA9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_DATA9(/;"	d
bfin_read_ICPLB_FAULT_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_FAULT_ADDR(/;"	d
bfin_read_ICPLB_STATUS	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ICPLB_STATUS(/;"	d
bfin_read_ILAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ILAT(/;"	d
bfin_read_IMASK	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_IMASK(/;"	d
bfin_read_IMDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_CONFIG(/;"	d
bfin_read_IMDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_CURR_ADDR(/;"	d
bfin_read_IMDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_IMDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_IMDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_IMDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_IRQ_STATUS(/;"	d
bfin_read_IMDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_IMDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_START_ADDR(/;"	d
bfin_read_IMDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_X_COUNT(/;"	d
bfin_read_IMDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_X_MODIFY(/;"	d
bfin_read_IMDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_Y_COUNT(/;"	d
bfin_read_IMDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D0_Y_MODIFY(/;"	d
bfin_read_IMDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_CONFIG(/;"	d
bfin_read_IMDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_CURR_ADDR(/;"	d
bfin_read_IMDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_IMDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_IMDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_IMDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_IRQ_STATUS(/;"	d
bfin_read_IMDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_IMDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_START_ADDR(/;"	d
bfin_read_IMDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_X_COUNT(/;"	d
bfin_read_IMDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_X_MODIFY(/;"	d
bfin_read_IMDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_Y_COUNT(/;"	d
bfin_read_IMDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_D1_Y_MODIFY(/;"	d
bfin_read_IMDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_CONFIG(/;"	d
bfin_read_IMDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_CURR_ADDR(/;"	d
bfin_read_IMDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_IMDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_IMDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_IMDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_IRQ_STATUS(/;"	d
bfin_read_IMDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_IMDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_START_ADDR(/;"	d
bfin_read_IMDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_X_COUNT(/;"	d
bfin_read_IMDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_X_MODIFY(/;"	d
bfin_read_IMDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_Y_COUNT(/;"	d
bfin_read_IMDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S0_Y_MODIFY(/;"	d
bfin_read_IMDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_CONFIG(/;"	d
bfin_read_IMDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_CURR_ADDR(/;"	d
bfin_read_IMDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_IMDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_IMDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_IMDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_IRQ_STATUS(/;"	d
bfin_read_IMDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_IMDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_START_ADDR(/;"	d
bfin_read_IMDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_X_COUNT(/;"	d
bfin_read_IMDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_X_MODIFY(/;"	d
bfin_read_IMDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_Y_COUNT(/;"	d
bfin_read_IMDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_IMDMA_S1_Y_MODIFY(/;"	d
bfin_read_IMEM_CONTROL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_IMEM_CONTROL(/;"	d
bfin_read_IPEND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_IPEND(/;"	d
bfin_read_IPRIO	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_IPRIO(/;"	d
bfin_read_ITEST_COMMAND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ITEST_COMMAND(/;"	d
bfin_read_ITEST_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ITEST_DATA0(/;"	d
bfin_read_ITEST_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_ITEST_DATA1(/;"	d
bfin_read_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_KPAD_CTL(/;"	d
bfin_read_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_KPAD_CTL(/;"	d
bfin_read_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_KPAD_CTL(/;"	d
bfin_read_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_KPAD_CTL(/;"	d
bfin_read_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_KPAD_MSEL(/;"	d
bfin_read_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_KPAD_MSEL(/;"	d
bfin_read_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_KPAD_MSEL(/;"	d
bfin_read_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_KPAD_MSEL(/;"	d
bfin_read_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_KPAD_PRESCALE(/;"	d
bfin_read_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_KPAD_PRESCALE(/;"	d
bfin_read_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_KPAD_PRESCALE(/;"	d
bfin_read_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_KPAD_PRESCALE(/;"	d
bfin_read_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_KPAD_ROWCOL(/;"	d
bfin_read_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_KPAD_ROWCOL(/;"	d
bfin_read_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_KPAD_ROWCOL(/;"	d
bfin_read_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_KPAD_ROWCOL(/;"	d
bfin_read_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_KPAD_SOFTEVAL(/;"	d
bfin_read_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_KPAD_SOFTEVAL(/;"	d
bfin_read_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_KPAD_SOFTEVAL(/;"	d
bfin_read_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_KPAD_SOFTEVAL(/;"	d
bfin_read_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_KPAD_STAT(/;"	d
bfin_read_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_KPAD_STAT(/;"	d
bfin_read_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_KPAD_STAT(/;"	d
bfin_read_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_KPAD_STAT(/;"	d
bfin_read_MDMA0_D0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_CONFIG(/;"	d
bfin_read_MDMA0_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_CURR_ADDR(/;"	d
bfin_read_MDMA0_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA0_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA0_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA0_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA0_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA0_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA0_D0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_START_ADDR(/;"	d
bfin_read_MDMA0_D0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_X_COUNT(/;"	d
bfin_read_MDMA0_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_X_MODIFY(/;"	d
bfin_read_MDMA0_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_Y_COUNT(/;"	d
bfin_read_MDMA0_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D0_Y_MODIFY(/;"	d
bfin_read_MDMA0_D1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_CONFIG(/;"	d
bfin_read_MDMA0_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_CURR_ADDR(/;"	d
bfin_read_MDMA0_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA0_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA0_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA0_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA0_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA0_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA0_D1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_START_ADDR(/;"	d
bfin_read_MDMA0_D1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_X_COUNT(/;"	d
bfin_read_MDMA0_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_X_MODIFY(/;"	d
bfin_read_MDMA0_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_Y_COUNT(/;"	d
bfin_read_MDMA0_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_D1_Y_MODIFY(/;"	d
bfin_read_MDMA0_S0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_CONFIG(/;"	d
bfin_read_MDMA0_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_CURR_ADDR(/;"	d
bfin_read_MDMA0_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA0_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA0_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA0_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA0_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA0_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA0_S0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_START_ADDR(/;"	d
bfin_read_MDMA0_S0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_X_COUNT(/;"	d
bfin_read_MDMA0_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_X_MODIFY(/;"	d
bfin_read_MDMA0_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_Y_COUNT(/;"	d
bfin_read_MDMA0_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S0_Y_MODIFY(/;"	d
bfin_read_MDMA0_S1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_CONFIG(/;"	d
bfin_read_MDMA0_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_CURR_ADDR(/;"	d
bfin_read_MDMA0_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA0_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA0_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA0_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA0_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA0_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA0_S1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_START_ADDR(/;"	d
bfin_read_MDMA0_S1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_X_COUNT(/;"	d
bfin_read_MDMA0_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_X_MODIFY(/;"	d
bfin_read_MDMA0_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_Y_COUNT(/;"	d
bfin_read_MDMA0_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA0_S1_Y_MODIFY(/;"	d
bfin_read_MDMA1_D0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_CONFIG(/;"	d
bfin_read_MDMA1_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_CONFIG(/;"	d
bfin_read_MDMA1_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_ADDR(/;"	d
bfin_read_MDMA1_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_ADDR(/;"	d
bfin_read_MDMA1_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA1_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA1_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_D0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_START_ADDR(/;"	d
bfin_read_MDMA1_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_START_ADDR(/;"	d
bfin_read_MDMA1_D0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_X_COUNT(/;"	d
bfin_read_MDMA1_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_X_COUNT(/;"	d
bfin_read_MDMA1_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_X_MODIFY(/;"	d
bfin_read_MDMA1_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_X_MODIFY(/;"	d
bfin_read_MDMA1_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_Y_COUNT(/;"	d
bfin_read_MDMA1_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_Y_COUNT(/;"	d
bfin_read_MDMA1_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D0_Y_MODIFY(/;"	d
bfin_read_MDMA1_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D0_Y_MODIFY(/;"	d
bfin_read_MDMA1_D1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_CONFIG(/;"	d
bfin_read_MDMA1_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_CONFIG(/;"	d
bfin_read_MDMA1_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_ADDR(/;"	d
bfin_read_MDMA1_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_ADDR(/;"	d
bfin_read_MDMA1_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA1_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA1_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_D1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_START_ADDR(/;"	d
bfin_read_MDMA1_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_START_ADDR(/;"	d
bfin_read_MDMA1_D1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_X_COUNT(/;"	d
bfin_read_MDMA1_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_X_COUNT(/;"	d
bfin_read_MDMA1_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_X_MODIFY(/;"	d
bfin_read_MDMA1_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_X_MODIFY(/;"	d
bfin_read_MDMA1_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_Y_COUNT(/;"	d
bfin_read_MDMA1_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_Y_COUNT(/;"	d
bfin_read_MDMA1_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_D1_Y_MODIFY(/;"	d
bfin_read_MDMA1_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_D1_Y_MODIFY(/;"	d
bfin_read_MDMA1_S0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_CONFIG(/;"	d
bfin_read_MDMA1_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_CONFIG(/;"	d
bfin_read_MDMA1_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_ADDR(/;"	d
bfin_read_MDMA1_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_ADDR(/;"	d
bfin_read_MDMA1_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA1_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA1_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_S0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_START_ADDR(/;"	d
bfin_read_MDMA1_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_START_ADDR(/;"	d
bfin_read_MDMA1_S0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_X_COUNT(/;"	d
bfin_read_MDMA1_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_X_COUNT(/;"	d
bfin_read_MDMA1_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_X_MODIFY(/;"	d
bfin_read_MDMA1_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_X_MODIFY(/;"	d
bfin_read_MDMA1_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_Y_COUNT(/;"	d
bfin_read_MDMA1_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_Y_COUNT(/;"	d
bfin_read_MDMA1_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S0_Y_MODIFY(/;"	d
bfin_read_MDMA1_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S0_Y_MODIFY(/;"	d
bfin_read_MDMA1_S1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_CONFIG(/;"	d
bfin_read_MDMA1_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_CONFIG(/;"	d
bfin_read_MDMA1_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_ADDR(/;"	d
bfin_read_MDMA1_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_ADDR(/;"	d
bfin_read_MDMA1_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA1_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA1_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA1_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA1_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA1_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA1_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA1_S1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_START_ADDR(/;"	d
bfin_read_MDMA1_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_START_ADDR(/;"	d
bfin_read_MDMA1_S1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_X_COUNT(/;"	d
bfin_read_MDMA1_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_X_COUNT(/;"	d
bfin_read_MDMA1_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_X_MODIFY(/;"	d
bfin_read_MDMA1_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_X_MODIFY(/;"	d
bfin_read_MDMA1_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_Y_COUNT(/;"	d
bfin_read_MDMA1_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_Y_COUNT(/;"	d
bfin_read_MDMA1_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_MDMA1_S1_Y_MODIFY(/;"	d
bfin_read_MDMA1_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA1_S1_Y_MODIFY(/;"	d
bfin_read_MDMA2_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_CONFIG(/;"	d
bfin_read_MDMA2_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_CURR_ADDR(/;"	d
bfin_read_MDMA2_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA2_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA2_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA2_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA2_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA2_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA2_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_START_ADDR(/;"	d
bfin_read_MDMA2_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_X_COUNT(/;"	d
bfin_read_MDMA2_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_X_MODIFY(/;"	d
bfin_read_MDMA2_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_Y_COUNT(/;"	d
bfin_read_MDMA2_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D0_Y_MODIFY(/;"	d
bfin_read_MDMA2_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_CONFIG(/;"	d
bfin_read_MDMA2_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_CURR_ADDR(/;"	d
bfin_read_MDMA2_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA2_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA2_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA2_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA2_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA2_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA2_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_START_ADDR(/;"	d
bfin_read_MDMA2_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_X_COUNT(/;"	d
bfin_read_MDMA2_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_X_MODIFY(/;"	d
bfin_read_MDMA2_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_Y_COUNT(/;"	d
bfin_read_MDMA2_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_D1_Y_MODIFY(/;"	d
bfin_read_MDMA2_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_CONFIG(/;"	d
bfin_read_MDMA2_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_CURR_ADDR(/;"	d
bfin_read_MDMA2_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA2_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA2_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA2_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA2_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA2_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA2_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_START_ADDR(/;"	d
bfin_read_MDMA2_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_X_COUNT(/;"	d
bfin_read_MDMA2_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_X_MODIFY(/;"	d
bfin_read_MDMA2_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_Y_COUNT(/;"	d
bfin_read_MDMA2_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S0_Y_MODIFY(/;"	d
bfin_read_MDMA2_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_CONFIG(/;"	d
bfin_read_MDMA2_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_CURR_ADDR(/;"	d
bfin_read_MDMA2_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA2_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA2_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA2_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA2_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA2_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA2_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_START_ADDR(/;"	d
bfin_read_MDMA2_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_X_COUNT(/;"	d
bfin_read_MDMA2_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_X_MODIFY(/;"	d
bfin_read_MDMA2_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_Y_COUNT(/;"	d
bfin_read_MDMA2_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_MDMA2_S1_Y_MODIFY(/;"	d
bfin_read_MDMAFLX0_CURXCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_CURXCOUNT_D(/;"	d
bfin_read_MDMAFLX0_CURXCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_CURXCOUNT_S(/;"	d
bfin_read_MDMAFLX0_CURYCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_CURYCOUNT_D(/;"	d
bfin_read_MDMAFLX0_CURYCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_CURYCOUNT_S(/;"	d
bfin_read_MDMAFLX0_DMACNFG_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_DMACNFG_D(/;"	d
bfin_read_MDMAFLX0_DMACNFG_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_DMACNFG_S(/;"	d
bfin_read_MDMAFLX0_IRQSTAT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_IRQSTAT_D(/;"	d
bfin_read_MDMAFLX0_IRQSTAT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_IRQSTAT_S(/;"	d
bfin_read_MDMAFLX0_PMAP_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_PMAP_D(/;"	d
bfin_read_MDMAFLX0_PMAP_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_PMAP_S(/;"	d
bfin_read_MDMAFLX0_XCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_XCOUNT_D(/;"	d
bfin_read_MDMAFLX0_XCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_XCOUNT_S(/;"	d
bfin_read_MDMAFLX0_XMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_XMODIFY_D(/;"	d
bfin_read_MDMAFLX0_XMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_XMODIFY_S(/;"	d
bfin_read_MDMAFLX0_YCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_YCOUNT_D(/;"	d
bfin_read_MDMAFLX0_YCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_YCOUNT_S(/;"	d
bfin_read_MDMAFLX0_YMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_YMODIFY_D(/;"	d
bfin_read_MDMAFLX0_YMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX0_YMODIFY_S(/;"	d
bfin_read_MDMAFLX1_CURXCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_CURXCOUNT_D(/;"	d
bfin_read_MDMAFLX1_CURXCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_CURXCOUNT_S(/;"	d
bfin_read_MDMAFLX1_CURYCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_CURYCOUNT_D(/;"	d
bfin_read_MDMAFLX1_CURYCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_CURYCOUNT_S(/;"	d
bfin_read_MDMAFLX1_DMACNFG_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_DMACNFG_D(/;"	d
bfin_read_MDMAFLX1_DMACNFG_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_DMACNFG_S(/;"	d
bfin_read_MDMAFLX1_IRQSTAT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_IRQSTAT_D(/;"	d
bfin_read_MDMAFLX1_IRQSTAT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_IRQSTAT_S(/;"	d
bfin_read_MDMAFLX1_PMAP_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_PMAP_D(/;"	d
bfin_read_MDMAFLX1_PMAP_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_PMAP_S(/;"	d
bfin_read_MDMAFLX1_XCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_XCOUNT_D(/;"	d
bfin_read_MDMAFLX1_XCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_XCOUNT_S(/;"	d
bfin_read_MDMAFLX1_XMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_XMODIFY_D(/;"	d
bfin_read_MDMAFLX1_XMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_XMODIFY_S(/;"	d
bfin_read_MDMAFLX1_YCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_YCOUNT_D(/;"	d
bfin_read_MDMAFLX1_YCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_YCOUNT_S(/;"	d
bfin_read_MDMAFLX1_YMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_YMODIFY_D(/;"	d
bfin_read_MDMAFLX1_YMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMAFLX1_YMODIFY_S(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_CONFIG(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_ADDR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_IRQ_STATUS(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_START_ADDR(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_COUNT(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_X_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_COUNT(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D0_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_CONFIG(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_ADDR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_IRQ_STATUS(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_START_ADDR(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_COUNT(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_X_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_COUNT(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D1_Y_MODIFY(/;"	d
bfin_read_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_CONFIG(/;"	d
bfin_read_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_CONFIG(/;"	d
bfin_read_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_CONFIG(/;"	d
bfin_read_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_CONFIG(/;"	d
bfin_read_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_CONFIG(/;"	d
bfin_read_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_ADDR(/;"	d
bfin_read_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_ADDR(/;"	d
bfin_read_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_ADDR(/;"	d
bfin_read_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_ADDR(/;"	d
bfin_read_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_ADDR(/;"	d
bfin_read_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_IRQ_STATUS(/;"	d
bfin_read_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_IRQ_STATUS(/;"	d
bfin_read_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_IRQ_STATUS(/;"	d
bfin_read_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_IRQ_STATUS(/;"	d
bfin_read_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_IRQ_STATUS(/;"	d
bfin_read_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_START_ADDR(/;"	d
bfin_read_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_START_ADDR(/;"	d
bfin_read_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_START_ADDR(/;"	d
bfin_read_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_START_ADDR(/;"	d
bfin_read_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_START_ADDR(/;"	d
bfin_read_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_COUNT(/;"	d
bfin_read_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_COUNT(/;"	d
bfin_read_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_COUNT(/;"	d
bfin_read_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_COUNT(/;"	d
bfin_read_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_COUNT(/;"	d
bfin_read_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_MODIFY(/;"	d
bfin_read_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_MODIFY(/;"	d
bfin_read_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_MODIFY(/;"	d
bfin_read_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_MODIFY(/;"	d
bfin_read_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_X_MODIFY(/;"	d
bfin_read_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_COUNT(/;"	d
bfin_read_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_COUNT(/;"	d
bfin_read_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_COUNT(/;"	d
bfin_read_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_COUNT(/;"	d
bfin_read_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_COUNT(/;"	d
bfin_read_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_MODIFY(/;"	d
bfin_read_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_MODIFY(/;"	d
bfin_read_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_MODIFY(/;"	d
bfin_read_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_MODIFY(/;"	d
bfin_read_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D2_Y_MODIFY(/;"	d
bfin_read_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_CONFIG(/;"	d
bfin_read_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_CONFIG(/;"	d
bfin_read_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_CONFIG(/;"	d
bfin_read_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_CONFIG(/;"	d
bfin_read_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_CONFIG(/;"	d
bfin_read_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_ADDR(/;"	d
bfin_read_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_ADDR(/;"	d
bfin_read_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_ADDR(/;"	d
bfin_read_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_ADDR(/;"	d
bfin_read_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_ADDR(/;"	d
bfin_read_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_IRQ_STATUS(/;"	d
bfin_read_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_IRQ_STATUS(/;"	d
bfin_read_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_IRQ_STATUS(/;"	d
bfin_read_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_IRQ_STATUS(/;"	d
bfin_read_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_IRQ_STATUS(/;"	d
bfin_read_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_START_ADDR(/;"	d
bfin_read_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_START_ADDR(/;"	d
bfin_read_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_START_ADDR(/;"	d
bfin_read_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_START_ADDR(/;"	d
bfin_read_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_START_ADDR(/;"	d
bfin_read_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_COUNT(/;"	d
bfin_read_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_COUNT(/;"	d
bfin_read_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_COUNT(/;"	d
bfin_read_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_COUNT(/;"	d
bfin_read_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_COUNT(/;"	d
bfin_read_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_MODIFY(/;"	d
bfin_read_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_MODIFY(/;"	d
bfin_read_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_MODIFY(/;"	d
bfin_read_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_MODIFY(/;"	d
bfin_read_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_X_MODIFY(/;"	d
bfin_read_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_COUNT(/;"	d
bfin_read_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_COUNT(/;"	d
bfin_read_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_COUNT(/;"	d
bfin_read_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_COUNT(/;"	d
bfin_read_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_COUNT(/;"	d
bfin_read_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_MODIFY(/;"	d
bfin_read_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_MODIFY(/;"	d
bfin_read_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_MODIFY(/;"	d
bfin_read_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_MODIFY(/;"	d
bfin_read_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_D3_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_CONFIG(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_ADDR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_IRQ_STATUS(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_START_ADDR(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_COUNT(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_X_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_COUNT(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S0_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_CONFIG(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_ADDR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_IRQ_STATUS(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_START_ADDR(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_COUNT(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_X_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_COUNT(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S1_Y_MODIFY(/;"	d
bfin_read_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_CONFIG(/;"	d
bfin_read_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_CONFIG(/;"	d
bfin_read_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_CONFIG(/;"	d
bfin_read_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_CONFIG(/;"	d
bfin_read_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_CONFIG(/;"	d
bfin_read_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_ADDR(/;"	d
bfin_read_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_ADDR(/;"	d
bfin_read_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_ADDR(/;"	d
bfin_read_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_ADDR(/;"	d
bfin_read_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_ADDR(/;"	d
bfin_read_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_IRQ_STATUS(/;"	d
bfin_read_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_IRQ_STATUS(/;"	d
bfin_read_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_IRQ_STATUS(/;"	d
bfin_read_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_IRQ_STATUS(/;"	d
bfin_read_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_IRQ_STATUS(/;"	d
bfin_read_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_START_ADDR(/;"	d
bfin_read_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_START_ADDR(/;"	d
bfin_read_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_START_ADDR(/;"	d
bfin_read_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_START_ADDR(/;"	d
bfin_read_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_START_ADDR(/;"	d
bfin_read_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_COUNT(/;"	d
bfin_read_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_COUNT(/;"	d
bfin_read_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_COUNT(/;"	d
bfin_read_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_COUNT(/;"	d
bfin_read_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_COUNT(/;"	d
bfin_read_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_MODIFY(/;"	d
bfin_read_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_MODIFY(/;"	d
bfin_read_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_MODIFY(/;"	d
bfin_read_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_MODIFY(/;"	d
bfin_read_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_X_MODIFY(/;"	d
bfin_read_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_COUNT(/;"	d
bfin_read_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_COUNT(/;"	d
bfin_read_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_COUNT(/;"	d
bfin_read_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_COUNT(/;"	d
bfin_read_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_COUNT(/;"	d
bfin_read_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_MODIFY(/;"	d
bfin_read_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_MODIFY(/;"	d
bfin_read_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_MODIFY(/;"	d
bfin_read_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_MODIFY(/;"	d
bfin_read_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S2_Y_MODIFY(/;"	d
bfin_read_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_CONFIG(/;"	d
bfin_read_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_CONFIG(/;"	d
bfin_read_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_CONFIG(/;"	d
bfin_read_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_CONFIG(/;"	d
bfin_read_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_CONFIG(/;"	d
bfin_read_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_ADDR(/;"	d
bfin_read_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_ADDR(/;"	d
bfin_read_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_ADDR(/;"	d
bfin_read_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_ADDR(/;"	d
bfin_read_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_ADDR(/;"	d
bfin_read_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_read_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_read_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_IRQ_STATUS(/;"	d
bfin_read_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_IRQ_STATUS(/;"	d
bfin_read_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_IRQ_STATUS(/;"	d
bfin_read_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_IRQ_STATUS(/;"	d
bfin_read_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_IRQ_STATUS(/;"	d
bfin_read_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_read_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_read_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_START_ADDR(/;"	d
bfin_read_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_START_ADDR(/;"	d
bfin_read_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_START_ADDR(/;"	d
bfin_read_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_START_ADDR(/;"	d
bfin_read_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_START_ADDR(/;"	d
bfin_read_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_COUNT(/;"	d
bfin_read_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_COUNT(/;"	d
bfin_read_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_COUNT(/;"	d
bfin_read_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_COUNT(/;"	d
bfin_read_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_COUNT(/;"	d
bfin_read_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_MODIFY(/;"	d
bfin_read_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_MODIFY(/;"	d
bfin_read_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_MODIFY(/;"	d
bfin_read_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_MODIFY(/;"	d
bfin_read_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_X_MODIFY(/;"	d
bfin_read_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_COUNT(/;"	d
bfin_read_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_COUNT(/;"	d
bfin_read_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_COUNT(/;"	d
bfin_read_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_COUNT(/;"	d
bfin_read_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_COUNT(/;"	d
bfin_read_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_MODIFY(/;"	d
bfin_read_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_MODIFY(/;"	d
bfin_read_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_MODIFY(/;"	d
bfin_read_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_MODIFY(/;"	d
bfin_read_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MDMA_S3_Y_MODIFY(/;"	d
bfin_read_MXVR_AADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_AADDR(/;"	d
bfin_read_MXVR_ALLOC_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_0(/;"	d
bfin_read_MXVR_ALLOC_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_1(/;"	d
bfin_read_MXVR_ALLOC_10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_10(/;"	d
bfin_read_MXVR_ALLOC_11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_11(/;"	d
bfin_read_MXVR_ALLOC_12	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_12(/;"	d
bfin_read_MXVR_ALLOC_13	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_13(/;"	d
bfin_read_MXVR_ALLOC_14	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_14(/;"	d
bfin_read_MXVR_ALLOC_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_2(/;"	d
bfin_read_MXVR_ALLOC_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_3(/;"	d
bfin_read_MXVR_ALLOC_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_4(/;"	d
bfin_read_MXVR_ALLOC_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_5(/;"	d
bfin_read_MXVR_ALLOC_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_6(/;"	d
bfin_read_MXVR_ALLOC_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_7(/;"	d
bfin_read_MXVR_ALLOC_8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_8(/;"	d
bfin_read_MXVR_ALLOC_9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ALLOC_9(/;"	d
bfin_read_MXVR_APRB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_APRB_CURR_ADDR(/;"	d
bfin_read_MXVR_APRB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_APRB_START_ADDR(/;"	d
bfin_read_MXVR_APTB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_APTB_CURR_ADDR(/;"	d
bfin_read_MXVR_APTB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_APTB_START_ADDR(/;"	d
bfin_read_MXVR_AP_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_AP_CTL(/;"	d
bfin_read_MXVR_BLOCK_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_BLOCK_CNT(/;"	d
bfin_read_MXVR_CDRPLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CDRPLL_CTL(/;"	d
bfin_read_MXVR_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CLK_CTL(/;"	d
bfin_read_MXVR_CMRB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CMRB_CURR_ADDR(/;"	d
bfin_read_MXVR_CMRB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CMRB_START_ADDR(/;"	d
bfin_read_MXVR_CMTB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CMTB_CURR_ADDR(/;"	d
bfin_read_MXVR_CMTB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CMTB_START_ADDR(/;"	d
bfin_read_MXVR_CM_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CM_CTL(/;"	d
bfin_read_MXVR_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_CONFIG(/;"	d
bfin_read_MXVR_DELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DELAY(/;"	d
bfin_read_MXVR_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA0_CONFIG(/;"	d
bfin_read_MXVR_DMA0_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA0_COUNT(/;"	d
bfin_read_MXVR_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA0_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA0_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA0_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA0_START_ADDR(/;"	d
bfin_read_MXVR_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA1_CONFIG(/;"	d
bfin_read_MXVR_DMA1_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA1_COUNT(/;"	d
bfin_read_MXVR_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA1_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA1_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA1_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA1_START_ADDR(/;"	d
bfin_read_MXVR_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA2_CONFIG(/;"	d
bfin_read_MXVR_DMA2_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA2_COUNT(/;"	d
bfin_read_MXVR_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA2_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA2_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA2_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA2_START_ADDR(/;"	d
bfin_read_MXVR_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA3_CONFIG(/;"	d
bfin_read_MXVR_DMA3_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA3_COUNT(/;"	d
bfin_read_MXVR_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA3_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA3_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA3_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA3_START_ADDR(/;"	d
bfin_read_MXVR_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA4_CONFIG(/;"	d
bfin_read_MXVR_DMA4_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA4_COUNT(/;"	d
bfin_read_MXVR_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA4_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA4_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA4_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA4_START_ADDR(/;"	d
bfin_read_MXVR_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA5_CONFIG(/;"	d
bfin_read_MXVR_DMA5_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA5_COUNT(/;"	d
bfin_read_MXVR_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA5_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA5_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA5_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA5_START_ADDR(/;"	d
bfin_read_MXVR_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA6_CONFIG(/;"	d
bfin_read_MXVR_DMA6_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA6_COUNT(/;"	d
bfin_read_MXVR_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA6_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA6_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA6_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA6_START_ADDR(/;"	d
bfin_read_MXVR_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA7_CONFIG(/;"	d
bfin_read_MXVR_DMA7_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA7_COUNT(/;"	d
bfin_read_MXVR_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA7_CURR_ADDR(/;"	d
bfin_read_MXVR_DMA7_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA7_CURR_COUNT(/;"	d
bfin_read_MXVR_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_DMA7_START_ADDR(/;"	d
bfin_read_MXVR_FMPLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_FMPLL_CTL(/;"	d
bfin_read_MXVR_FRAME_CNT_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_FRAME_CNT_0(/;"	d
bfin_read_MXVR_FRAME_CNT_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_FRAME_CNT_1(/;"	d
bfin_read_MXVR_GADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_GADDR(/;"	d
bfin_read_MXVR_INT_EN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_INT_EN_0(/;"	d
bfin_read_MXVR_INT_EN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_INT_EN_1(/;"	d
bfin_read_MXVR_INT_STAT_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_INT_STAT_0(/;"	d
bfin_read_MXVR_INT_STAT_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_INT_STAT_1(/;"	d
bfin_read_MXVR_LADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_LADDR(/;"	d
bfin_read_MXVR_MAX_DELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_MAX_DELAY(/;"	d
bfin_read_MXVR_MAX_POSITION	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_MAX_POSITION(/;"	d
bfin_read_MXVR_PAT_DATA_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_PAT_DATA_0(/;"	d
bfin_read_MXVR_PAT_DATA_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_PAT_DATA_1(/;"	d
bfin_read_MXVR_PAT_EN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_PAT_EN_0(/;"	d
bfin_read_MXVR_PAT_EN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_PAT_EN_1(/;"	d
bfin_read_MXVR_PIN_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_PIN_CTL(/;"	d
bfin_read_MXVR_POSITION	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_POSITION(/;"	d
bfin_read_MXVR_ROUTING_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_0(/;"	d
bfin_read_MXVR_ROUTING_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_1(/;"	d
bfin_read_MXVR_ROUTING_10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_10(/;"	d
bfin_read_MXVR_ROUTING_11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_11(/;"	d
bfin_read_MXVR_ROUTING_12	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_12(/;"	d
bfin_read_MXVR_ROUTING_13	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_13(/;"	d
bfin_read_MXVR_ROUTING_14	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_14(/;"	d
bfin_read_MXVR_ROUTING_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_2(/;"	d
bfin_read_MXVR_ROUTING_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_3(/;"	d
bfin_read_MXVR_ROUTING_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_4(/;"	d
bfin_read_MXVR_ROUTING_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_5(/;"	d
bfin_read_MXVR_ROUTING_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_6(/;"	d
bfin_read_MXVR_ROUTING_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_7(/;"	d
bfin_read_MXVR_ROUTING_8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_8(/;"	d
bfin_read_MXVR_ROUTING_9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_ROUTING_9(/;"	d
bfin_read_MXVR_RRDB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_RRDB_CURR_ADDR(/;"	d
bfin_read_MXVR_RRDB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_RRDB_START_ADDR(/;"	d
bfin_read_MXVR_SCLK_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SCLK_CNT(/;"	d
bfin_read_MXVR_STATE_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_STATE_0(/;"	d
bfin_read_MXVR_STATE_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_STATE_1(/;"	d
bfin_read_MXVR_SYNC_LCHAN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_0(/;"	d
bfin_read_MXVR_SYNC_LCHAN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_1(/;"	d
bfin_read_MXVR_SYNC_LCHAN_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_2(/;"	d
bfin_read_MXVR_SYNC_LCHAN_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_3(/;"	d
bfin_read_MXVR_SYNC_LCHAN_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_4(/;"	d
bfin_read_MXVR_SYNC_LCHAN_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_5(/;"	d
bfin_read_MXVR_SYNC_LCHAN_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_6(/;"	d
bfin_read_MXVR_SYNC_LCHAN_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_MXVR_SYNC_LCHAN_7(/;"	d
bfin_read_NFC_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_ADDR(/;"	d
bfin_read_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_ADDR(/;"	d
bfin_read_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_ADDR(/;"	d
bfin_read_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_ADDR(/;"	d
bfin_read_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_ADDR(/;"	d
bfin_read_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_ADDR(/;"	d
bfin_read_NFC_CMD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_CMD(/;"	d
bfin_read_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_CMD(/;"	d
bfin_read_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_CMD(/;"	d
bfin_read_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_CMD(/;"	d
bfin_read_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_CMD(/;"	d
bfin_read_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_CMD(/;"	d
bfin_read_NFC_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_COUNT(/;"	d
bfin_read_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_COUNT(/;"	d
bfin_read_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_COUNT(/;"	d
bfin_read_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_COUNT(/;"	d
bfin_read_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_COUNT(/;"	d
bfin_read_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_COUNT(/;"	d
bfin_read_NFC_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_CTL(/;"	d
bfin_read_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_CTL(/;"	d
bfin_read_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_CTL(/;"	d
bfin_read_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_CTL(/;"	d
bfin_read_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_CTL(/;"	d
bfin_read_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_CTL(/;"	d
bfin_read_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_DATA_RD(/;"	d
bfin_read_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_DATA_RD(/;"	d
bfin_read_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_DATA_RD(/;"	d
bfin_read_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_DATA_RD(/;"	d
bfin_read_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_DATA_RD(/;"	d
bfin_read_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_DATA_RD(/;"	d
bfin_read_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_DATA_WR(/;"	d
bfin_read_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_DATA_WR(/;"	d
bfin_read_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_DATA_WR(/;"	d
bfin_read_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_DATA_WR(/;"	d
bfin_read_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_DATA_WR(/;"	d
bfin_read_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_DATA_WR(/;"	d
bfin_read_NFC_ECC0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_ECC0(/;"	d
bfin_read_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_ECC0(/;"	d
bfin_read_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_ECC0(/;"	d
bfin_read_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_ECC0(/;"	d
bfin_read_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_ECC0(/;"	d
bfin_read_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_ECC0(/;"	d
bfin_read_NFC_ECC1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_ECC1(/;"	d
bfin_read_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_ECC1(/;"	d
bfin_read_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_ECC1(/;"	d
bfin_read_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_ECC1(/;"	d
bfin_read_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_ECC1(/;"	d
bfin_read_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_ECC1(/;"	d
bfin_read_NFC_ECC2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_ECC2(/;"	d
bfin_read_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_ECC2(/;"	d
bfin_read_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_ECC2(/;"	d
bfin_read_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_ECC2(/;"	d
bfin_read_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_ECC2(/;"	d
bfin_read_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_ECC2(/;"	d
bfin_read_NFC_ECC3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_ECC3(/;"	d
bfin_read_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_ECC3(/;"	d
bfin_read_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_ECC3(/;"	d
bfin_read_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_ECC3(/;"	d
bfin_read_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_ECC3(/;"	d
bfin_read_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_ECC3(/;"	d
bfin_read_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_IRQMASK(/;"	d
bfin_read_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_IRQMASK(/;"	d
bfin_read_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_IRQMASK(/;"	d
bfin_read_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_IRQMASK(/;"	d
bfin_read_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_IRQMASK(/;"	d
bfin_read_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_IRQMASK(/;"	d
bfin_read_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_IRQSTAT(/;"	d
bfin_read_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_IRQSTAT(/;"	d
bfin_read_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_IRQSTAT(/;"	d
bfin_read_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_IRQSTAT(/;"	d
bfin_read_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_IRQSTAT(/;"	d
bfin_read_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_IRQSTAT(/;"	d
bfin_read_NFC_PGCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_PGCTL(/;"	d
bfin_read_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_PGCTL(/;"	d
bfin_read_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_PGCTL(/;"	d
bfin_read_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_PGCTL(/;"	d
bfin_read_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_PGCTL(/;"	d
bfin_read_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_PGCTL(/;"	d
bfin_read_NFC_READ	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_READ(/;"	d
bfin_read_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_READ(/;"	d
bfin_read_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_READ(/;"	d
bfin_read_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_READ(/;"	d
bfin_read_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_READ(/;"	d
bfin_read_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_READ(/;"	d
bfin_read_NFC_RST	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_RST(/;"	d
bfin_read_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_RST(/;"	d
bfin_read_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_RST(/;"	d
bfin_read_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_RST(/;"	d
bfin_read_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_RST(/;"	d
bfin_read_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_RST(/;"	d
bfin_read_NFC_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NFC_STAT(/;"	d
bfin_read_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_NFC_STAT(/;"	d
bfin_read_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_NFC_STAT(/;"	d
bfin_read_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_NFC_STAT(/;"	d
bfin_read_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_NFC_STAT(/;"	d
bfin_read_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_NFC_STAT(/;"	d
bfin_read_NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_NONGPIO_DRIVE(/;"	d
bfin_read_NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_NONGPIO_DRIVE(/;"	d
bfin_read_NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NONGPIO_DRIVE(/;"	d
bfin_read_NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_NONGPIO_HYSTERESIS(/;"	d
bfin_read_NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_NONGPIO_HYSTERESIS(/;"	d
bfin_read_NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NONGPIO_HYSTERESIS(/;"	d
bfin_read_NONGPIO_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_NONGPIO_SLEW(/;"	d
bfin_read_OTP_BEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_BEN(/;"	d
bfin_read_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_BEN(/;"	d
bfin_read_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_BEN(/;"	d
bfin_read_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_BEN(/;"	d
bfin_read_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_BEN(/;"	d
bfin_read_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_BEN(/;"	d
bfin_read_OTP_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_CONTROL(/;"	d
bfin_read_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_CONTROL(/;"	d
bfin_read_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_CONTROL(/;"	d
bfin_read_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_CONTROL(/;"	d
bfin_read_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_CONTROL(/;"	d
bfin_read_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_CONTROL(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_DATA0(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_DATA1(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_DATA2(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_DATA3(/;"	d
bfin_read_OTP_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_STATUS(/;"	d
bfin_read_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_STATUS(/;"	d
bfin_read_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_STATUS(/;"	d
bfin_read_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_STATUS(/;"	d
bfin_read_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_STATUS(/;"	d
bfin_read_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_STATUS(/;"	d
bfin_read_OTP_TIMING	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_OTP_TIMING(/;"	d
bfin_read_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_OTP_TIMING(/;"	d
bfin_read_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_OTP_TIMING(/;"	d
bfin_read_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_OTP_TIMING(/;"	d
bfin_read_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_OTP_TIMING(/;"	d
bfin_read_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_OTP_TIMING(/;"	d
bfin_read_PFCNTR0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PFCNTR0(/;"	d
bfin_read_PFCNTR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_PFCNTR0(/;"	d
bfin_read_PFCNTR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PFCNTR1(/;"	d
bfin_read_PFCNTR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_PFCNTR1(/;"	d
bfin_read_PFCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PFCTL(/;"	d
bfin_read_PFCTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_PFCTL(/;"	d
bfin_read_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_ASSIGN(/;"	d
bfin_read_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_ASSIGN(/;"	d
bfin_read_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_ASSIGN(/;"	d
bfin_read_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_ASSIGN(/;"	d
bfin_read_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_ASSIGN(/;"	d
bfin_read_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_CLEAR(/;"	d
bfin_read_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_CLEAR(/;"	d
bfin_read_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_CLEAR(/;"	d
bfin_read_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_CLEAR(/;"	d
bfin_read_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_CLEAR(/;"	d
bfin_read_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_SET(/;"	d
bfin_read_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_SET(/;"	d
bfin_read_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_SET(/;"	d
bfin_read_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_SET(/;"	d
bfin_read_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_EDGE_SET(/;"	d
bfin_read_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_CLEAR(/;"	d
bfin_read_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_CLEAR(/;"	d
bfin_read_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_CLEAR(/;"	d
bfin_read_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_CLEAR(/;"	d
bfin_read_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_CLEAR(/;"	d
bfin_read_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_SET(/;"	d
bfin_read_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_SET(/;"	d
bfin_read_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_SET(/;"	d
bfin_read_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_SET(/;"	d
bfin_read_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_INVERT_SET(/;"	d
bfin_read_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_IRQ(/;"	d
bfin_read_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_IRQ(/;"	d
bfin_read_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_IRQ(/;"	d
bfin_read_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_IRQ(/;"	d
bfin_read_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_IRQ(/;"	d
bfin_read_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_LATCH(/;"	d
bfin_read_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_LATCH(/;"	d
bfin_read_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_LATCH(/;"	d
bfin_read_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_LATCH(/;"	d
bfin_read_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_LATCH(/;"	d
bfin_read_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_MASK_CLEAR(/;"	d
bfin_read_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_MASK_CLEAR(/;"	d
bfin_read_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_MASK_CLEAR(/;"	d
bfin_read_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_MASK_CLEAR(/;"	d
bfin_read_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_MASK_CLEAR(/;"	d
bfin_read_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_MASK_SET(/;"	d
bfin_read_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_MASK_SET(/;"	d
bfin_read_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_MASK_SET(/;"	d
bfin_read_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_MASK_SET(/;"	d
bfin_read_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_MASK_SET(/;"	d
bfin_read_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT0_PINSTATE(/;"	d
bfin_read_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT0_PINSTATE(/;"	d
bfin_read_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT0_PINSTATE(/;"	d
bfin_read_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT0_PINSTATE(/;"	d
bfin_read_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT0_PINSTATE(/;"	d
bfin_read_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_ASSIGN(/;"	d
bfin_read_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_ASSIGN(/;"	d
bfin_read_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_ASSIGN(/;"	d
bfin_read_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_ASSIGN(/;"	d
bfin_read_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_ASSIGN(/;"	d
bfin_read_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_CLEAR(/;"	d
bfin_read_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_CLEAR(/;"	d
bfin_read_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_CLEAR(/;"	d
bfin_read_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_CLEAR(/;"	d
bfin_read_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_CLEAR(/;"	d
bfin_read_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_SET(/;"	d
bfin_read_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_SET(/;"	d
bfin_read_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_SET(/;"	d
bfin_read_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_SET(/;"	d
bfin_read_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_EDGE_SET(/;"	d
bfin_read_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_CLEAR(/;"	d
bfin_read_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_CLEAR(/;"	d
bfin_read_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_CLEAR(/;"	d
bfin_read_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_CLEAR(/;"	d
bfin_read_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_CLEAR(/;"	d
bfin_read_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_SET(/;"	d
bfin_read_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_SET(/;"	d
bfin_read_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_SET(/;"	d
bfin_read_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_SET(/;"	d
bfin_read_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_INVERT_SET(/;"	d
bfin_read_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_IRQ(/;"	d
bfin_read_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_IRQ(/;"	d
bfin_read_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_IRQ(/;"	d
bfin_read_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_IRQ(/;"	d
bfin_read_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_IRQ(/;"	d
bfin_read_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_LATCH(/;"	d
bfin_read_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_LATCH(/;"	d
bfin_read_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_LATCH(/;"	d
bfin_read_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_LATCH(/;"	d
bfin_read_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_LATCH(/;"	d
bfin_read_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_MASK_CLEAR(/;"	d
bfin_read_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_MASK_CLEAR(/;"	d
bfin_read_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_MASK_CLEAR(/;"	d
bfin_read_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_MASK_CLEAR(/;"	d
bfin_read_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_MASK_CLEAR(/;"	d
bfin_read_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_MASK_SET(/;"	d
bfin_read_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_MASK_SET(/;"	d
bfin_read_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_MASK_SET(/;"	d
bfin_read_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_MASK_SET(/;"	d
bfin_read_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_MASK_SET(/;"	d
bfin_read_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT1_PINSTATE(/;"	d
bfin_read_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT1_PINSTATE(/;"	d
bfin_read_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT1_PINSTATE(/;"	d
bfin_read_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT1_PINSTATE(/;"	d
bfin_read_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT1_PINSTATE(/;"	d
bfin_read_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_ASSIGN(/;"	d
bfin_read_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_ASSIGN(/;"	d
bfin_read_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_ASSIGN(/;"	d
bfin_read_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_ASSIGN(/;"	d
bfin_read_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_ASSIGN(/;"	d
bfin_read_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_CLEAR(/;"	d
bfin_read_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_CLEAR(/;"	d
bfin_read_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_CLEAR(/;"	d
bfin_read_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_CLEAR(/;"	d
bfin_read_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_CLEAR(/;"	d
bfin_read_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_SET(/;"	d
bfin_read_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_SET(/;"	d
bfin_read_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_SET(/;"	d
bfin_read_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_SET(/;"	d
bfin_read_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_EDGE_SET(/;"	d
bfin_read_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_CLEAR(/;"	d
bfin_read_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_CLEAR(/;"	d
bfin_read_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_CLEAR(/;"	d
bfin_read_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_CLEAR(/;"	d
bfin_read_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_CLEAR(/;"	d
bfin_read_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_SET(/;"	d
bfin_read_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_SET(/;"	d
bfin_read_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_SET(/;"	d
bfin_read_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_SET(/;"	d
bfin_read_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_INVERT_SET(/;"	d
bfin_read_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_IRQ(/;"	d
bfin_read_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_IRQ(/;"	d
bfin_read_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_IRQ(/;"	d
bfin_read_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_IRQ(/;"	d
bfin_read_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_IRQ(/;"	d
bfin_read_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_LATCH(/;"	d
bfin_read_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_LATCH(/;"	d
bfin_read_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_LATCH(/;"	d
bfin_read_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_LATCH(/;"	d
bfin_read_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_LATCH(/;"	d
bfin_read_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_MASK_CLEAR(/;"	d
bfin_read_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_MASK_CLEAR(/;"	d
bfin_read_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_MASK_CLEAR(/;"	d
bfin_read_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_MASK_CLEAR(/;"	d
bfin_read_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_MASK_CLEAR(/;"	d
bfin_read_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_MASK_SET(/;"	d
bfin_read_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_MASK_SET(/;"	d
bfin_read_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_MASK_SET(/;"	d
bfin_read_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_MASK_SET(/;"	d
bfin_read_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_MASK_SET(/;"	d
bfin_read_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT2_PINSTATE(/;"	d
bfin_read_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT2_PINSTATE(/;"	d
bfin_read_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT2_PINSTATE(/;"	d
bfin_read_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT2_PINSTATE(/;"	d
bfin_read_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT2_PINSTATE(/;"	d
bfin_read_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_ASSIGN(/;"	d
bfin_read_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_ASSIGN(/;"	d
bfin_read_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_ASSIGN(/;"	d
bfin_read_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_ASSIGN(/;"	d
bfin_read_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_ASSIGN(/;"	d
bfin_read_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_CLEAR(/;"	d
bfin_read_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_CLEAR(/;"	d
bfin_read_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_CLEAR(/;"	d
bfin_read_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_CLEAR(/;"	d
bfin_read_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_CLEAR(/;"	d
bfin_read_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_SET(/;"	d
bfin_read_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_SET(/;"	d
bfin_read_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_SET(/;"	d
bfin_read_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_SET(/;"	d
bfin_read_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_EDGE_SET(/;"	d
bfin_read_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_CLEAR(/;"	d
bfin_read_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_CLEAR(/;"	d
bfin_read_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_CLEAR(/;"	d
bfin_read_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_CLEAR(/;"	d
bfin_read_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_CLEAR(/;"	d
bfin_read_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_SET(/;"	d
bfin_read_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_SET(/;"	d
bfin_read_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_SET(/;"	d
bfin_read_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_SET(/;"	d
bfin_read_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_INVERT_SET(/;"	d
bfin_read_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_IRQ(/;"	d
bfin_read_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_IRQ(/;"	d
bfin_read_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_IRQ(/;"	d
bfin_read_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_IRQ(/;"	d
bfin_read_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_IRQ(/;"	d
bfin_read_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_LATCH(/;"	d
bfin_read_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_LATCH(/;"	d
bfin_read_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_LATCH(/;"	d
bfin_read_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_LATCH(/;"	d
bfin_read_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_LATCH(/;"	d
bfin_read_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_MASK_CLEAR(/;"	d
bfin_read_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_MASK_CLEAR(/;"	d
bfin_read_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_MASK_CLEAR(/;"	d
bfin_read_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_MASK_CLEAR(/;"	d
bfin_read_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_MASK_CLEAR(/;"	d
bfin_read_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_MASK_SET(/;"	d
bfin_read_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_MASK_SET(/;"	d
bfin_read_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_MASK_SET(/;"	d
bfin_read_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_MASK_SET(/;"	d
bfin_read_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_MASK_SET(/;"	d
bfin_read_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PINT3_PINSTATE(/;"	d
bfin_read_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PINT3_PINSTATE(/;"	d
bfin_read_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PINT3_PINSTATE(/;"	d
bfin_read_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PINT3_PINSTATE(/;"	d
bfin_read_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PINT3_PINSTATE(/;"	d
bfin_read_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_AHEND(/;"	d
bfin_read_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_AHEND(/;"	d
bfin_read_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_AHEND(/;"	d
bfin_read_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_AHEND(/;"	d
bfin_read_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_AHSTART(/;"	d
bfin_read_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_AHSTART(/;"	d
bfin_read_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_AHSTART(/;"	d
bfin_read_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_AHSTART(/;"	d
bfin_read_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_ATRANSP(/;"	d
bfin_read_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_ATRANSP(/;"	d
bfin_read_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_ATRANSP(/;"	d
bfin_read_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_ATRANSP(/;"	d
bfin_read_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_AVEND(/;"	d
bfin_read_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_AVEND(/;"	d
bfin_read_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_AVEND(/;"	d
bfin_read_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_AVEND(/;"	d
bfin_read_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_AVSTART(/;"	d
bfin_read_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_AVSTART(/;"	d
bfin_read_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_AVSTART(/;"	d
bfin_read_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_AVSTART(/;"	d
bfin_read_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_BHEND(/;"	d
bfin_read_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_BHEND(/;"	d
bfin_read_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_BHEND(/;"	d
bfin_read_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_BHEND(/;"	d
bfin_read_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_BHSTART(/;"	d
bfin_read_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_BHSTART(/;"	d
bfin_read_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_BHSTART(/;"	d
bfin_read_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_BHSTART(/;"	d
bfin_read_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_BTRANSP(/;"	d
bfin_read_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_BTRANSP(/;"	d
bfin_read_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_BTRANSP(/;"	d
bfin_read_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_BTRANSP(/;"	d
bfin_read_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_BVCON(/;"	d
bfin_read_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_BVCON(/;"	d
bfin_read_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_BVCON(/;"	d
bfin_read_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_BVCON(/;"	d
bfin_read_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_BVEND(/;"	d
bfin_read_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_BVEND(/;"	d
bfin_read_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_BVEND(/;"	d
bfin_read_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_BVEND(/;"	d
bfin_read_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_BVSTART(/;"	d
bfin_read_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_BVSTART(/;"	d
bfin_read_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_BVSTART(/;"	d
bfin_read_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_BVSTART(/;"	d
bfin_read_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_CCBIAS(/;"	d
bfin_read_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_CCBIAS(/;"	d
bfin_read_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_CCBIAS(/;"	d
bfin_read_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_CCBIAS(/;"	d
bfin_read_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_CTL(/;"	d
bfin_read_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_CTL(/;"	d
bfin_read_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_CTL(/;"	d
bfin_read_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_CTL(/;"	d
bfin_read_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_GUCON(/;"	d
bfin_read_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_GUCON(/;"	d
bfin_read_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_GUCON(/;"	d
bfin_read_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_GUCON(/;"	d
bfin_read_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_INTRSTAT(/;"	d
bfin_read_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_INTRSTAT(/;"	d
bfin_read_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_INTRSTAT(/;"	d
bfin_read_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_INTRSTAT(/;"	d
bfin_read_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_LPF(/;"	d
bfin_read_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_LPF(/;"	d
bfin_read_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_LPF(/;"	d
bfin_read_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_LPF(/;"	d
bfin_read_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_PPL(/;"	d
bfin_read_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_PPL(/;"	d
bfin_read_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_PPL(/;"	d
bfin_read_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_PPL(/;"	d
bfin_read_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_RYCON(/;"	d
bfin_read_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_RYCON(/;"	d
bfin_read_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_RYCON(/;"	d
bfin_read_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_RYCON(/;"	d
bfin_read_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PIXC_TC(/;"	d
bfin_read_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PIXC_TC(/;"	d
bfin_read_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PIXC_TC(/;"	d
bfin_read_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PIXC_TC(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/clock.h	/^# define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PLL_CTL(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/clock.h	/^# define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_DIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PLL_DIV(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PLL_LOCKCNT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PLL_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PLL_STAT(/;"	d
bfin_read_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA(/;"	d
bfin_read_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA(/;"	d
bfin_read_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA(/;"	d
bfin_read_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA(/;"	d
bfin_read_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA(/;"	d
bfin_read_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_CLEAR(/;"	d
bfin_read_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_CLEAR(/;"	d
bfin_read_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_CLEAR(/;"	d
bfin_read_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_CLEAR(/;"	d
bfin_read_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_CLEAR(/;"	d
bfin_read_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_DIR_CLEAR(/;"	d
bfin_read_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_DIR_CLEAR(/;"	d
bfin_read_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_DIR_CLEAR(/;"	d
bfin_read_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_DIR_CLEAR(/;"	d
bfin_read_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_DIR_CLEAR(/;"	d
bfin_read_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_DIR_SET(/;"	d
bfin_read_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_DIR_SET(/;"	d
bfin_read_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_DIR_SET(/;"	d
bfin_read_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_DIR_SET(/;"	d
bfin_read_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_DIR_SET(/;"	d
bfin_read_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_FER(/;"	d
bfin_read_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_FER(/;"	d
bfin_read_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_FER(/;"	d
bfin_read_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_FER(/;"	d
bfin_read_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_FER(/;"	d
bfin_read_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_INEN(/;"	d
bfin_read_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_INEN(/;"	d
bfin_read_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_INEN(/;"	d
bfin_read_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_INEN(/;"	d
bfin_read_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_INEN(/;"	d
bfin_read_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_MUX(/;"	d
bfin_read_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_MUX(/;"	d
bfin_read_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_MUX(/;"	d
bfin_read_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_MUX(/;"	d
bfin_read_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_MUX(/;"	d
bfin_read_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTA_SET(/;"	d
bfin_read_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTA_SET(/;"	d
bfin_read_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTA_SET(/;"	d
bfin_read_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTA_SET(/;"	d
bfin_read_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTA_SET(/;"	d
bfin_read_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB(/;"	d
bfin_read_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB(/;"	d
bfin_read_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB(/;"	d
bfin_read_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB(/;"	d
bfin_read_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB(/;"	d
bfin_read_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_CLEAR(/;"	d
bfin_read_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_CLEAR(/;"	d
bfin_read_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_CLEAR(/;"	d
bfin_read_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_CLEAR(/;"	d
bfin_read_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_CLEAR(/;"	d
bfin_read_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_DIR_CLEAR(/;"	d
bfin_read_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_DIR_CLEAR(/;"	d
bfin_read_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_DIR_CLEAR(/;"	d
bfin_read_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_DIR_CLEAR(/;"	d
bfin_read_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_DIR_CLEAR(/;"	d
bfin_read_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_DIR_SET(/;"	d
bfin_read_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_DIR_SET(/;"	d
bfin_read_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_DIR_SET(/;"	d
bfin_read_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_DIR_SET(/;"	d
bfin_read_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_DIR_SET(/;"	d
bfin_read_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_FER(/;"	d
bfin_read_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_FER(/;"	d
bfin_read_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_FER(/;"	d
bfin_read_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_FER(/;"	d
bfin_read_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_FER(/;"	d
bfin_read_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_INEN(/;"	d
bfin_read_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_INEN(/;"	d
bfin_read_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_INEN(/;"	d
bfin_read_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_INEN(/;"	d
bfin_read_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_INEN(/;"	d
bfin_read_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_MUX(/;"	d
bfin_read_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_MUX(/;"	d
bfin_read_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_MUX(/;"	d
bfin_read_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_MUX(/;"	d
bfin_read_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_MUX(/;"	d
bfin_read_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTB_SET(/;"	d
bfin_read_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTB_SET(/;"	d
bfin_read_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTB_SET(/;"	d
bfin_read_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTB_SET(/;"	d
bfin_read_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTB_SET(/;"	d
bfin_read_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC(/;"	d
bfin_read_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC(/;"	d
bfin_read_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC(/;"	d
bfin_read_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC(/;"	d
bfin_read_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC(/;"	d
bfin_read_PORTCIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO(/;"	d
bfin_read_PORTCIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO_CLEAR(/;"	d
bfin_read_PORTCIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO_DIR(/;"	d
bfin_read_PORTCIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO_FER(/;"	d
bfin_read_PORTCIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO_INEN(/;"	d
bfin_read_PORTCIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO_SET(/;"	d
bfin_read_PORTCIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTCIO_TOGGLE(/;"	d
bfin_read_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_CLEAR(/;"	d
bfin_read_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_CLEAR(/;"	d
bfin_read_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_CLEAR(/;"	d
bfin_read_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_CLEAR(/;"	d
bfin_read_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_CLEAR(/;"	d
bfin_read_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_DIR_CLEAR(/;"	d
bfin_read_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_DIR_CLEAR(/;"	d
bfin_read_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_DIR_CLEAR(/;"	d
bfin_read_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_DIR_CLEAR(/;"	d
bfin_read_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_DIR_CLEAR(/;"	d
bfin_read_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_DIR_SET(/;"	d
bfin_read_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_DIR_SET(/;"	d
bfin_read_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_DIR_SET(/;"	d
bfin_read_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_DIR_SET(/;"	d
bfin_read_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_DIR_SET(/;"	d
bfin_read_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_FER(/;"	d
bfin_read_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_FER(/;"	d
bfin_read_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_FER(/;"	d
bfin_read_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_FER(/;"	d
bfin_read_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_FER(/;"	d
bfin_read_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_INEN(/;"	d
bfin_read_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_INEN(/;"	d
bfin_read_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_INEN(/;"	d
bfin_read_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_INEN(/;"	d
bfin_read_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_INEN(/;"	d
bfin_read_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_MUX(/;"	d
bfin_read_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_MUX(/;"	d
bfin_read_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_MUX(/;"	d
bfin_read_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_MUX(/;"	d
bfin_read_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_MUX(/;"	d
bfin_read_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTC_SET(/;"	d
bfin_read_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTC_SET(/;"	d
bfin_read_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTC_SET(/;"	d
bfin_read_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTC_SET(/;"	d
bfin_read_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTC_SET(/;"	d
bfin_read_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD(/;"	d
bfin_read_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD(/;"	d
bfin_read_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD(/;"	d
bfin_read_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD(/;"	d
bfin_read_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD(/;"	d
bfin_read_PORTDIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO(/;"	d
bfin_read_PORTDIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO_CLEAR(/;"	d
bfin_read_PORTDIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO_DIR(/;"	d
bfin_read_PORTDIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO_FER(/;"	d
bfin_read_PORTDIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO_INEN(/;"	d
bfin_read_PORTDIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO_SET(/;"	d
bfin_read_PORTDIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTDIO_TOGGLE(/;"	d
bfin_read_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_CLEAR(/;"	d
bfin_read_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_CLEAR(/;"	d
bfin_read_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_CLEAR(/;"	d
bfin_read_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_CLEAR(/;"	d
bfin_read_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_CLEAR(/;"	d
bfin_read_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_DIR_CLEAR(/;"	d
bfin_read_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_DIR_CLEAR(/;"	d
bfin_read_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_DIR_CLEAR(/;"	d
bfin_read_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_DIR_CLEAR(/;"	d
bfin_read_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_DIR_CLEAR(/;"	d
bfin_read_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_DIR_SET(/;"	d
bfin_read_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_DIR_SET(/;"	d
bfin_read_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_DIR_SET(/;"	d
bfin_read_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_DIR_SET(/;"	d
bfin_read_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_DIR_SET(/;"	d
bfin_read_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_FER(/;"	d
bfin_read_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_FER(/;"	d
bfin_read_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_FER(/;"	d
bfin_read_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_FER(/;"	d
bfin_read_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_FER(/;"	d
bfin_read_PORTD_FER	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_PORTD_FER(/;"	d
bfin_read_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_INEN(/;"	d
bfin_read_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_INEN(/;"	d
bfin_read_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_INEN(/;"	d
bfin_read_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_INEN(/;"	d
bfin_read_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_INEN(/;"	d
bfin_read_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_MUX(/;"	d
bfin_read_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_MUX(/;"	d
bfin_read_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_MUX(/;"	d
bfin_read_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_MUX(/;"	d
bfin_read_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_MUX(/;"	d
bfin_read_PORTD_MUX	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_PORTD_MUX(/;"	d
bfin_read_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTD_SET(/;"	d
bfin_read_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTD_SET(/;"	d
bfin_read_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTD_SET(/;"	d
bfin_read_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTD_SET(/;"	d
bfin_read_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTD_SET(/;"	d
bfin_read_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE(/;"	d
bfin_read_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE(/;"	d
bfin_read_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE(/;"	d
bfin_read_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE(/;"	d
bfin_read_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE(/;"	d
bfin_read_PORTEIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO(/;"	d
bfin_read_PORTEIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO_CLEAR(/;"	d
bfin_read_PORTEIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO_DIR(/;"	d
bfin_read_PORTEIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO_FER(/;"	d
bfin_read_PORTEIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO_INEN(/;"	d
bfin_read_PORTEIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO_SET(/;"	d
bfin_read_PORTEIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTEIO_TOGGLE(/;"	d
bfin_read_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_CLEAR(/;"	d
bfin_read_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_CLEAR(/;"	d
bfin_read_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_CLEAR(/;"	d
bfin_read_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_CLEAR(/;"	d
bfin_read_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_CLEAR(/;"	d
bfin_read_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_DIR_CLEAR(/;"	d
bfin_read_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_DIR_CLEAR(/;"	d
bfin_read_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_DIR_CLEAR(/;"	d
bfin_read_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_DIR_CLEAR(/;"	d
bfin_read_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_DIR_CLEAR(/;"	d
bfin_read_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_DIR_SET(/;"	d
bfin_read_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_DIR_SET(/;"	d
bfin_read_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_DIR_SET(/;"	d
bfin_read_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_DIR_SET(/;"	d
bfin_read_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_DIR_SET(/;"	d
bfin_read_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_FER(/;"	d
bfin_read_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_FER(/;"	d
bfin_read_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_FER(/;"	d
bfin_read_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_FER(/;"	d
bfin_read_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_FER(/;"	d
bfin_read_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_INEN(/;"	d
bfin_read_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_INEN(/;"	d
bfin_read_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_INEN(/;"	d
bfin_read_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_INEN(/;"	d
bfin_read_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_INEN(/;"	d
bfin_read_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_MUX(/;"	d
bfin_read_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_MUX(/;"	d
bfin_read_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_MUX(/;"	d
bfin_read_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_MUX(/;"	d
bfin_read_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_MUX(/;"	d
bfin_read_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTE_SET(/;"	d
bfin_read_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTE_SET(/;"	d
bfin_read_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTE_SET(/;"	d
bfin_read_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTE_SET(/;"	d
bfin_read_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTE_SET(/;"	d
bfin_read_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF(/;"	d
bfin_read_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF(/;"	d
bfin_read_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF(/;"	d
bfin_read_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF(/;"	d
bfin_read_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF(/;"	d
bfin_read_PORTFIO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO(/;"	d
bfin_read_PORTFIO	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO(/;"	d
bfin_read_PORTFIO	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO(/;"	d
bfin_read_PORTFIO	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO(/;"	d
bfin_read_PORTFIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO(/;"	d
bfin_read_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_BOTH(/;"	d
bfin_read_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_BOTH(/;"	d
bfin_read_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_BOTH(/;"	d
bfin_read_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_BOTH(/;"	d
bfin_read_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_BOTH(/;"	d
bfin_read_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_CLEAR(/;"	d
bfin_read_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_CLEAR(/;"	d
bfin_read_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_CLEAR(/;"	d
bfin_read_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_CLEAR(/;"	d
bfin_read_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_CLEAR(/;"	d
bfin_read_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_DIR(/;"	d
bfin_read_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_DIR(/;"	d
bfin_read_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_DIR(/;"	d
bfin_read_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_DIR(/;"	d
bfin_read_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_DIR(/;"	d
bfin_read_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_EDGE(/;"	d
bfin_read_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_EDGE(/;"	d
bfin_read_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_EDGE(/;"	d
bfin_read_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_EDGE(/;"	d
bfin_read_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_EDGE(/;"	d
bfin_read_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_INEN(/;"	d
bfin_read_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_INEN(/;"	d
bfin_read_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_INEN(/;"	d
bfin_read_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_INEN(/;"	d
bfin_read_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_INEN(/;"	d
bfin_read_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKA(/;"	d
bfin_read_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKA(/;"	d
bfin_read_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKA(/;"	d
bfin_read_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKA(/;"	d
bfin_read_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKA(/;"	d
bfin_read_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKA_CLEAR(/;"	d
bfin_read_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKA_CLEAR(/;"	d
bfin_read_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKA_CLEAR(/;"	d
bfin_read_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKA_CLEAR(/;"	d
bfin_read_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKA_CLEAR(/;"	d
bfin_read_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKA_SET(/;"	d
bfin_read_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKA_SET(/;"	d
bfin_read_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKA_SET(/;"	d
bfin_read_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKA_SET(/;"	d
bfin_read_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKA_SET(/;"	d
bfin_read_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKB(/;"	d
bfin_read_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKB(/;"	d
bfin_read_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKB(/;"	d
bfin_read_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKB(/;"	d
bfin_read_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKB(/;"	d
bfin_read_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKB_CLEAR(/;"	d
bfin_read_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKB_CLEAR(/;"	d
bfin_read_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKB_CLEAR(/;"	d
bfin_read_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKB_CLEAR(/;"	d
bfin_read_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKB_CLEAR(/;"	d
bfin_read_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKB_SET(/;"	d
bfin_read_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKB_SET(/;"	d
bfin_read_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKB_SET(/;"	d
bfin_read_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKB_SET(/;"	d
bfin_read_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKB_SET(/;"	d
bfin_read_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_POLAR(/;"	d
bfin_read_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_POLAR(/;"	d
bfin_read_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_POLAR(/;"	d
bfin_read_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_POLAR(/;"	d
bfin_read_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_POLAR(/;"	d
bfin_read_PORTFIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_SET(/;"	d
bfin_read_PORTFIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_SET(/;"	d
bfin_read_PORTFIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_SET(/;"	d
bfin_read_PORTFIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_SET(/;"	d
bfin_read_PORTFIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_SET(/;"	d
bfin_read_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTFIO_TOGGLE(/;"	d
bfin_read_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTFIO_TOGGLE(/;"	d
bfin_read_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTFIO_TOGGLE(/;"	d
bfin_read_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTFIO_TOGGLE(/;"	d
bfin_read_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PORTFIO_TOGGLE(/;"	d
bfin_read_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_CLEAR(/;"	d
bfin_read_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_CLEAR(/;"	d
bfin_read_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_CLEAR(/;"	d
bfin_read_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_CLEAR(/;"	d
bfin_read_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_CLEAR(/;"	d
bfin_read_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_DIR_CLEAR(/;"	d
bfin_read_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_DIR_CLEAR(/;"	d
bfin_read_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_DIR_CLEAR(/;"	d
bfin_read_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_DIR_CLEAR(/;"	d
bfin_read_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_DIR_CLEAR(/;"	d
bfin_read_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_DIR_SET(/;"	d
bfin_read_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_DIR_SET(/;"	d
bfin_read_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_DIR_SET(/;"	d
bfin_read_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_DIR_SET(/;"	d
bfin_read_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_DIR_SET(/;"	d
bfin_read_PORTF_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTF_DRIVE(/;"	d
bfin_read_PORTF_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTF_DRIVE(/;"	d
bfin_read_PORTF_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTF_DRIVE(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_FER(/;"	d
bfin_read_PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTF_HYSTERESIS(/;"	d
bfin_read_PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTF_HYSTERESIS(/;"	d
bfin_read_PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTF_HYSTERESIS(/;"	d
bfin_read_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_INEN(/;"	d
bfin_read_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_INEN(/;"	d
bfin_read_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_INEN(/;"	d
bfin_read_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_INEN(/;"	d
bfin_read_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_INEN(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_MUX(/;"	d
bfin_read_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTF_SET(/;"	d
bfin_read_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTF_SET(/;"	d
bfin_read_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTF_SET(/;"	d
bfin_read_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTF_SET(/;"	d
bfin_read_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTF_SET(/;"	d
bfin_read_PORTF_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTF_SLEW(/;"	d
bfin_read_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG(/;"	d
bfin_read_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG(/;"	d
bfin_read_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG(/;"	d
bfin_read_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG(/;"	d
bfin_read_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG(/;"	d
bfin_read_PORTGIO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO(/;"	d
bfin_read_PORTGIO	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO(/;"	d
bfin_read_PORTGIO	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO(/;"	d
bfin_read_PORTGIO	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO(/;"	d
bfin_read_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_BOTH(/;"	d
bfin_read_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_BOTH(/;"	d
bfin_read_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_BOTH(/;"	d
bfin_read_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_BOTH(/;"	d
bfin_read_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_CLEAR(/;"	d
bfin_read_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_CLEAR(/;"	d
bfin_read_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_CLEAR(/;"	d
bfin_read_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_CLEAR(/;"	d
bfin_read_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_DIR(/;"	d
bfin_read_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_DIR(/;"	d
bfin_read_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_DIR(/;"	d
bfin_read_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_DIR(/;"	d
bfin_read_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_EDGE(/;"	d
bfin_read_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_EDGE(/;"	d
bfin_read_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_EDGE(/;"	d
bfin_read_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_EDGE(/;"	d
bfin_read_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_INEN(/;"	d
bfin_read_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_INEN(/;"	d
bfin_read_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_INEN(/;"	d
bfin_read_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_INEN(/;"	d
bfin_read_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKA(/;"	d
bfin_read_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKA(/;"	d
bfin_read_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKA(/;"	d
bfin_read_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKA(/;"	d
bfin_read_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKA_CLEAR(/;"	d
bfin_read_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKA_CLEAR(/;"	d
bfin_read_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKA_CLEAR(/;"	d
bfin_read_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKA_CLEAR(/;"	d
bfin_read_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKA_SET(/;"	d
bfin_read_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKA_SET(/;"	d
bfin_read_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKA_SET(/;"	d
bfin_read_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKA_SET(/;"	d
bfin_read_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKB(/;"	d
bfin_read_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKB(/;"	d
bfin_read_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKB(/;"	d
bfin_read_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKB(/;"	d
bfin_read_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKB_CLEAR(/;"	d
bfin_read_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKB_CLEAR(/;"	d
bfin_read_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKB_CLEAR(/;"	d
bfin_read_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKB_CLEAR(/;"	d
bfin_read_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKB_SET(/;"	d
bfin_read_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKB_SET(/;"	d
bfin_read_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKB_SET(/;"	d
bfin_read_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKB_SET(/;"	d
bfin_read_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_POLAR(/;"	d
bfin_read_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_POLAR(/;"	d
bfin_read_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_POLAR(/;"	d
bfin_read_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_POLAR(/;"	d
bfin_read_PORTGIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_SET(/;"	d
bfin_read_PORTGIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_SET(/;"	d
bfin_read_PORTGIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_SET(/;"	d
bfin_read_PORTGIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_SET(/;"	d
bfin_read_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTGIO_TOGGLE(/;"	d
bfin_read_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTGIO_TOGGLE(/;"	d
bfin_read_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTGIO_TOGGLE(/;"	d
bfin_read_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTGIO_TOGGLE(/;"	d
bfin_read_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_CLEAR(/;"	d
bfin_read_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_CLEAR(/;"	d
bfin_read_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_CLEAR(/;"	d
bfin_read_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_CLEAR(/;"	d
bfin_read_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_CLEAR(/;"	d
bfin_read_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_DIR_CLEAR(/;"	d
bfin_read_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_DIR_CLEAR(/;"	d
bfin_read_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_DIR_CLEAR(/;"	d
bfin_read_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_DIR_CLEAR(/;"	d
bfin_read_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_DIR_CLEAR(/;"	d
bfin_read_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_DIR_SET(/;"	d
bfin_read_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_DIR_SET(/;"	d
bfin_read_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_DIR_SET(/;"	d
bfin_read_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_DIR_SET(/;"	d
bfin_read_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_DIR_SET(/;"	d
bfin_read_PORTG_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTG_DRIVE(/;"	d
bfin_read_PORTG_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTG_DRIVE(/;"	d
bfin_read_PORTG_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTG_DRIVE(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_FER	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_PORTG_FER(/;"	d
bfin_read_PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTG_HYSTERESIS(/;"	d
bfin_read_PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTG_HYSTERESIS(/;"	d
bfin_read_PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTG_HYSTERESIS(/;"	d
bfin_read_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_INEN(/;"	d
bfin_read_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_INEN(/;"	d
bfin_read_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_INEN(/;"	d
bfin_read_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_INEN(/;"	d
bfin_read_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_INEN(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_MUX	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_PORTG_MUX(/;"	d
bfin_read_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTG_SET(/;"	d
bfin_read_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTG_SET(/;"	d
bfin_read_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTG_SET(/;"	d
bfin_read_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTG_SET(/;"	d
bfin_read_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTG_SET(/;"	d
bfin_read_PORTG_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTG_SLEW(/;"	d
bfin_read_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH(/;"	d
bfin_read_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH(/;"	d
bfin_read_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH(/;"	d
bfin_read_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH(/;"	d
bfin_read_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH(/;"	d
bfin_read_PORTHIO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO(/;"	d
bfin_read_PORTHIO	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO(/;"	d
bfin_read_PORTHIO	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO(/;"	d
bfin_read_PORTHIO	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO(/;"	d
bfin_read_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_BOTH(/;"	d
bfin_read_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_BOTH(/;"	d
bfin_read_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_BOTH(/;"	d
bfin_read_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_BOTH(/;"	d
bfin_read_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_CLEAR(/;"	d
bfin_read_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_CLEAR(/;"	d
bfin_read_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_CLEAR(/;"	d
bfin_read_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_CLEAR(/;"	d
bfin_read_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_DIR(/;"	d
bfin_read_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_DIR(/;"	d
bfin_read_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_DIR(/;"	d
bfin_read_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_DIR(/;"	d
bfin_read_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_EDGE(/;"	d
bfin_read_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_EDGE(/;"	d
bfin_read_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_EDGE(/;"	d
bfin_read_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_EDGE(/;"	d
bfin_read_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_INEN(/;"	d
bfin_read_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_INEN(/;"	d
bfin_read_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_INEN(/;"	d
bfin_read_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_INEN(/;"	d
bfin_read_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKA(/;"	d
bfin_read_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKA(/;"	d
bfin_read_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKA(/;"	d
bfin_read_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKA(/;"	d
bfin_read_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKA_CLEAR(/;"	d
bfin_read_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKA_CLEAR(/;"	d
bfin_read_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKA_CLEAR(/;"	d
bfin_read_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKA_CLEAR(/;"	d
bfin_read_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKA_SET(/;"	d
bfin_read_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKA_SET(/;"	d
bfin_read_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKA_SET(/;"	d
bfin_read_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKA_SET(/;"	d
bfin_read_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKB(/;"	d
bfin_read_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKB(/;"	d
bfin_read_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKB(/;"	d
bfin_read_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKB(/;"	d
bfin_read_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKB_CLEAR(/;"	d
bfin_read_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKB_CLEAR(/;"	d
bfin_read_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKB_CLEAR(/;"	d
bfin_read_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKB_CLEAR(/;"	d
bfin_read_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKB_SET(/;"	d
bfin_read_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKB_SET(/;"	d
bfin_read_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKB_SET(/;"	d
bfin_read_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKB_SET(/;"	d
bfin_read_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_read_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_POLAR(/;"	d
bfin_read_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_POLAR(/;"	d
bfin_read_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_POLAR(/;"	d
bfin_read_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_POLAR(/;"	d
bfin_read_PORTHIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_SET(/;"	d
bfin_read_PORTHIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_SET(/;"	d
bfin_read_PORTHIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_SET(/;"	d
bfin_read_PORTHIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_SET(/;"	d
bfin_read_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTHIO_TOGGLE(/;"	d
bfin_read_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTHIO_TOGGLE(/;"	d
bfin_read_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTHIO_TOGGLE(/;"	d
bfin_read_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTHIO_TOGGLE(/;"	d
bfin_read_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_CLEAR(/;"	d
bfin_read_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_CLEAR(/;"	d
bfin_read_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_CLEAR(/;"	d
bfin_read_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_CLEAR(/;"	d
bfin_read_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_CLEAR(/;"	d
bfin_read_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_DIR_CLEAR(/;"	d
bfin_read_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_DIR_CLEAR(/;"	d
bfin_read_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_DIR_CLEAR(/;"	d
bfin_read_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_DIR_CLEAR(/;"	d
bfin_read_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_DIR_CLEAR(/;"	d
bfin_read_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_DIR_SET(/;"	d
bfin_read_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_DIR_SET(/;"	d
bfin_read_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_DIR_SET(/;"	d
bfin_read_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_DIR_SET(/;"	d
bfin_read_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_DIR_SET(/;"	d
bfin_read_PORTH_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTH_DRIVE(/;"	d
bfin_read_PORTH_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTH_DRIVE(/;"	d
bfin_read_PORTH_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTH_DRIVE(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_FER(/;"	d
bfin_read_PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTH_HYSTERESIS(/;"	d
bfin_read_PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTH_HYSTERESIS(/;"	d
bfin_read_PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTH_HYSTERESIS(/;"	d
bfin_read_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_INEN(/;"	d
bfin_read_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_INEN(/;"	d
bfin_read_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_INEN(/;"	d
bfin_read_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_INEN(/;"	d
bfin_read_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_INEN(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_MUX(/;"	d
bfin_read_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTH_SET(/;"	d
bfin_read_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTH_SET(/;"	d
bfin_read_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTH_SET(/;"	d
bfin_read_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTH_SET(/;"	d
bfin_read_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTH_SET(/;"	d
bfin_read_PORTH_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PORTH_SLEW(/;"	d
bfin_read_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI(/;"	d
bfin_read_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI(/;"	d
bfin_read_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI(/;"	d
bfin_read_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI(/;"	d
bfin_read_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI(/;"	d
bfin_read_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_CLEAR(/;"	d
bfin_read_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_CLEAR(/;"	d
bfin_read_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_CLEAR(/;"	d
bfin_read_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_CLEAR(/;"	d
bfin_read_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_CLEAR(/;"	d
bfin_read_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_DIR_CLEAR(/;"	d
bfin_read_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_DIR_CLEAR(/;"	d
bfin_read_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_DIR_CLEAR(/;"	d
bfin_read_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_DIR_CLEAR(/;"	d
bfin_read_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_DIR_CLEAR(/;"	d
bfin_read_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_DIR_SET(/;"	d
bfin_read_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_DIR_SET(/;"	d
bfin_read_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_DIR_SET(/;"	d
bfin_read_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_DIR_SET(/;"	d
bfin_read_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_DIR_SET(/;"	d
bfin_read_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_FER(/;"	d
bfin_read_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_FER(/;"	d
bfin_read_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_FER(/;"	d
bfin_read_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_FER(/;"	d
bfin_read_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_FER(/;"	d
bfin_read_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_INEN(/;"	d
bfin_read_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_INEN(/;"	d
bfin_read_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_INEN(/;"	d
bfin_read_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_INEN(/;"	d
bfin_read_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_INEN(/;"	d
bfin_read_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_MUX(/;"	d
bfin_read_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_MUX(/;"	d
bfin_read_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_MUX(/;"	d
bfin_read_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_MUX(/;"	d
bfin_read_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_MUX(/;"	d
bfin_read_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTI_SET(/;"	d
bfin_read_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTI_SET(/;"	d
bfin_read_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTI_SET(/;"	d
bfin_read_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTI_SET(/;"	d
bfin_read_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTI_SET(/;"	d
bfin_read_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ(/;"	d
bfin_read_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ(/;"	d
bfin_read_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ(/;"	d
bfin_read_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ(/;"	d
bfin_read_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ(/;"	d
bfin_read_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_CLEAR(/;"	d
bfin_read_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_CLEAR(/;"	d
bfin_read_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_CLEAR(/;"	d
bfin_read_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_CLEAR(/;"	d
bfin_read_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_CLEAR(/;"	d
bfin_read_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_CLEAR(/;"	d
bfin_read_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_CLEAR(/;"	d
bfin_read_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_CLEAR(/;"	d
bfin_read_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_CLEAR(/;"	d
bfin_read_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_CLEAR(/;"	d
bfin_read_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_SET(/;"	d
bfin_read_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_SET(/;"	d
bfin_read_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_SET(/;"	d
bfin_read_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_SET(/;"	d
bfin_read_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_DIR_SET(/;"	d
bfin_read_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_FER(/;"	d
bfin_read_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_FER(/;"	d
bfin_read_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_FER(/;"	d
bfin_read_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_FER(/;"	d
bfin_read_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_FER(/;"	d
bfin_read_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_INEN(/;"	d
bfin_read_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_INEN(/;"	d
bfin_read_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_INEN(/;"	d
bfin_read_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_INEN(/;"	d
bfin_read_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_INEN(/;"	d
bfin_read_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_MUX(/;"	d
bfin_read_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_MUX(/;"	d
bfin_read_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_MUX(/;"	d
bfin_read_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_MUX(/;"	d
bfin_read_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_MUX(/;"	d
bfin_read_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_PORTJ_SET(/;"	d
bfin_read_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_PORTJ_SET(/;"	d
bfin_read_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_PORTJ_SET(/;"	d
bfin_read_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_PORTJ_SET(/;"	d
bfin_read_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_PORTJ_SET(/;"	d
bfin_read_PORT_MUX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PORT_MUX(/;"	d
bfin_read_PPI0_CONTROL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI0_CONTROL(/;"	d
bfin_read_PPI0_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI0_COUNT(/;"	d
bfin_read_PPI0_DELAY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI0_DELAY(/;"	d
bfin_read_PPI0_FRAME	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI0_FRAME(/;"	d
bfin_read_PPI0_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI0_STATUS(/;"	d
bfin_read_PPI1_CONTROL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI1_CONTROL(/;"	d
bfin_read_PPI1_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI1_COUNT(/;"	d
bfin_read_PPI1_DELAY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI1_DELAY(/;"	d
bfin_read_PPI1_FRAME	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI1_FRAME(/;"	d
bfin_read_PPI1_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_PPI1_STATUS(/;"	d
bfin_read_PPI_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PPI_CONTROL(/;"	d
bfin_read_PPI_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PPI_CONTROL(/;"	d
bfin_read_PPI_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PPI_CONTROL(/;"	d
bfin_read_PPI_CONTROL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PPI_CONTROL(/;"	d
bfin_read_PPI_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PPI_CONTROL(/;"	d
bfin_read_PPI_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PPI_CONTROL(/;"	d
bfin_read_PPI_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PPI_COUNT(/;"	d
bfin_read_PPI_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PPI_COUNT(/;"	d
bfin_read_PPI_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PPI_COUNT(/;"	d
bfin_read_PPI_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PPI_COUNT(/;"	d
bfin_read_PPI_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PPI_COUNT(/;"	d
bfin_read_PPI_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PPI_COUNT(/;"	d
bfin_read_PPI_DELAY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PPI_DELAY(/;"	d
bfin_read_PPI_DELAY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PPI_DELAY(/;"	d
bfin_read_PPI_DELAY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PPI_DELAY(/;"	d
bfin_read_PPI_DELAY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PPI_DELAY(/;"	d
bfin_read_PPI_DELAY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PPI_DELAY(/;"	d
bfin_read_PPI_DELAY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PPI_DELAY(/;"	d
bfin_read_PPI_FRAME	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PPI_FRAME(/;"	d
bfin_read_PPI_FRAME	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PPI_FRAME(/;"	d
bfin_read_PPI_FRAME	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PPI_FRAME(/;"	d
bfin_read_PPI_FRAME	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PPI_FRAME(/;"	d
bfin_read_PPI_FRAME	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PPI_FRAME(/;"	d
bfin_read_PPI_FRAME	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PPI_FRAME(/;"	d
bfin_read_PPI_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PPI_STATUS(/;"	d
bfin_read_PPI_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PPI_STATUS(/;"	d
bfin_read_PPI_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_PPI_STATUS(/;"	d
bfin_read_PPI_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_PPI_STATUS(/;"	d
bfin_read_PPI_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_PPI_STATUS(/;"	d
bfin_read_PPI_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_PPI_STATUS(/;"	d
bfin_read_PWM0_CHA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CHA(/;"	d
bfin_read_PWM0_CHAL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CHAL(/;"	d
bfin_read_PWM0_CHB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CHB(/;"	d
bfin_read_PWM0_CHBL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CHBL(/;"	d
bfin_read_PWM0_CHC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CHC(/;"	d
bfin_read_PWM0_CHCL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CHCL(/;"	d
bfin_read_PWM0_CTRL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_CTRL(/;"	d
bfin_read_PWM0_DT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_DT(/;"	d
bfin_read_PWM0_GATE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_GATE(/;"	d
bfin_read_PWM0_LSI	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_LSI(/;"	d
bfin_read_PWM0_SEG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_SEG(/;"	d
bfin_read_PWM0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_STAT(/;"	d
bfin_read_PWM0_STAT2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_STAT2(/;"	d
bfin_read_PWM0_SYNCWT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_SYNCWT(/;"	d
bfin_read_PWM0_TM	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM0_TM(/;"	d
bfin_read_PWM1_CHA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CHA(/;"	d
bfin_read_PWM1_CHAL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CHAL(/;"	d
bfin_read_PWM1_CHB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CHB(/;"	d
bfin_read_PWM1_CHBL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CHBL(/;"	d
bfin_read_PWM1_CHC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CHC(/;"	d
bfin_read_PWM1_CHCL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CHCL(/;"	d
bfin_read_PWM1_CTRL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_CTRL(/;"	d
bfin_read_PWM1_DT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_DT(/;"	d
bfin_read_PWM1_GATE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_GATE(/;"	d
bfin_read_PWM1_LSI	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_LSI(/;"	d
bfin_read_PWM1_SEG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_SEG(/;"	d
bfin_read_PWM1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_STAT(/;"	d
bfin_read_PWM1_STAT2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_STAT2(/;"	d
bfin_read_PWM1_SYNCWT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_SYNCWT(/;"	d
bfin_read_PWM1_TM	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_PWM1_TM(/;"	d
bfin_read_PWM_CHA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CHA(/;"	d
bfin_read_PWM_CHAL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CHAL(/;"	d
bfin_read_PWM_CHB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CHB(/;"	d
bfin_read_PWM_CHBL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CHBL(/;"	d
bfin_read_PWM_CHC	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CHC(/;"	d
bfin_read_PWM_CHCL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CHCL(/;"	d
bfin_read_PWM_CTRL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_CTRL(/;"	d
bfin_read_PWM_DT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_DT(/;"	d
bfin_read_PWM_GATE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_GATE(/;"	d
bfin_read_PWM_LSI	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_LSI(/;"	d
bfin_read_PWM_SEG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_SEG(/;"	d
bfin_read_PWM_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_STAT(/;"	d
bfin_read_PWM_STAT2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_STAT2(/;"	d
bfin_read_PWM_SYNCWT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_SYNCWT(/;"	d
bfin_read_PWM_TM	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_PWM_TM(/;"	d
bfin_read_RCU0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RCU0_CTL(/;"	d
bfin_read_RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_ARGUMENT(/;"	d
bfin_read_RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_ARGUMENT(/;"	d
bfin_read_RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_ARGUMENT(/;"	d
bfin_read_RSI_BLKSZ	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_BLKSZ(/;"	d
bfin_read_RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_CEATA_CONTROL(/;"	d
bfin_read_RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_CEATA_CONTROL(/;"	d
bfin_read_RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_CEATA_CONTROL(/;"	d
bfin_read_RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_CLK_CONTROL(/;"	d
bfin_read_RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_CLK_CONTROL(/;"	d
bfin_read_RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_CLK_CONTROL(/;"	d
bfin_read_RSI_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_COMMAND(/;"	d
bfin_read_RSI_COMMAND	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_COMMAND(/;"	d
bfin_read_RSI_COMMAND	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_COMMAND(/;"	d
bfin_read_RSI_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_CONFIG(/;"	d
bfin_read_RSI_CONFIG	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_CONFIG(/;"	d
bfin_read_RSI_CONFIG	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_CONFIG(/;"	d
bfin_read_RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_DATA_CNT(/;"	d
bfin_read_RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_DATA_CNT(/;"	d
bfin_read_RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_DATA_CNT(/;"	d
bfin_read_RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_DATA_CONTROL(/;"	d
bfin_read_RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_DATA_CONTROL(/;"	d
bfin_read_RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_DATA_CONTROL(/;"	d
bfin_read_RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_DATA_LGTH(/;"	d
bfin_read_RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_DATA_LGTH(/;"	d
bfin_read_RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_DATA_LGTH(/;"	d
bfin_read_RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_DATA_TIMER(/;"	d
bfin_read_RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_DATA_TIMER(/;"	d
bfin_read_RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_DATA_TIMER(/;"	d
bfin_read_RSI_EMASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_EMASK(/;"	d
bfin_read_RSI_EMASK	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_EMASK(/;"	d
bfin_read_RSI_EMASK	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_EMASK(/;"	d
bfin_read_RSI_ESTAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_ESTAT(/;"	d
bfin_read_RSI_ESTAT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_ESTAT(/;"	d
bfin_read_RSI_ESTAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_ESTAT(/;"	d
bfin_read_RSI_FIFO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_FIFO(/;"	d
bfin_read_RSI_FIFO	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_FIFO(/;"	d
bfin_read_RSI_FIFO	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_FIFO(/;"	d
bfin_read_RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_FIFO_CNT(/;"	d
bfin_read_RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_FIFO_CNT(/;"	d
bfin_read_RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_FIFO_CNT(/;"	d
bfin_read_RSI_MASK0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_MASK0(/;"	d
bfin_read_RSI_MASK0	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_MASK0(/;"	d
bfin_read_RSI_MASK0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_MASK0(/;"	d
bfin_read_RSI_MASK1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_MASK1(/;"	d
bfin_read_RSI_MASK1	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_MASK1(/;"	d
bfin_read_RSI_MASK1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_MASK1(/;"	d
bfin_read_RSI_PID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_PID0(/;"	d
bfin_read_RSI_PID0	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_PID0(/;"	d
bfin_read_RSI_PID0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_PID0(/;"	d
bfin_read_RSI_PID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_PID1(/;"	d
bfin_read_RSI_PID1	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_PID1(/;"	d
bfin_read_RSI_PID1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_PID1(/;"	d
bfin_read_RSI_PID2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_PID2(/;"	d
bfin_read_RSI_PID2	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_PID2(/;"	d
bfin_read_RSI_PID2	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_PID2(/;"	d
bfin_read_RSI_PID3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_PID3(/;"	d
bfin_read_RSI_PID3	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_PID3(/;"	d
bfin_read_RSI_PID3	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_PID3(/;"	d
bfin_read_RSI_PWR_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_PWR_CONTROL(/;"	d
bfin_read_RSI_PWR_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_PWR_CONTROL(/;"	d
bfin_read_RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_RD_WAIT_EN(/;"	d
bfin_read_RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_RD_WAIT_EN(/;"	d
bfin_read_RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_RD_WAIT_EN(/;"	d
bfin_read_RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_RESPONSE0(/;"	d
bfin_read_RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_RESPONSE0(/;"	d
bfin_read_RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_RESPONSE0(/;"	d
bfin_read_RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_RESPONSE1(/;"	d
bfin_read_RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_RESPONSE1(/;"	d
bfin_read_RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_RESPONSE1(/;"	d
bfin_read_RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_RESPONSE2(/;"	d
bfin_read_RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_RESPONSE2(/;"	d
bfin_read_RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_RESPONSE2(/;"	d
bfin_read_RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_RESPONSE3(/;"	d
bfin_read_RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_RESPONSE3(/;"	d
bfin_read_RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_RESPONSE3(/;"	d
bfin_read_RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_RESP_CMD(/;"	d
bfin_read_RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_RESP_CMD(/;"	d
bfin_read_RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_RESP_CMD(/;"	d
bfin_read_RSI_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_STATUS(/;"	d
bfin_read_RSI_STATUS	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_STATUS(/;"	d
bfin_read_RSI_STATUS	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_STATUS(/;"	d
bfin_read_RSI_STATUSCL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_RSI_STATUSCL(/;"	d
bfin_read_RSI_STATUSCL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_read_RSI_STATUSCL(/;"	d
bfin_read_RSI_STATUSCL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_RSI_STATUSCL(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_RTC_ALARM(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_RTC_ICTL(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_RTC_ISTAT(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_RTC_PREN(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_RTC_STAT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_RTC_SWCNT(/;"	d
bfin_read_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_ARGUMENT(/;"	d
bfin_read_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_ARGUMENT(/;"	d
bfin_read_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_ARGUMENT(/;"	d
bfin_read_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_ARGUMENT(/;"	d
bfin_read_SDH_BLK_SIZE	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_BLK_SIZE	/;"	d	file:
bfin_read_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_CFG(/;"	d
bfin_read_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_CFG(/;"	d
bfin_read_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_CFG(/;"	d
bfin_read_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_CFG(/;"	d
bfin_read_SDH_CFG	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_CFG	/;"	d	file:
bfin_read_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_CLK_CTL(/;"	d
bfin_read_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_CLK_CTL(/;"	d
bfin_read_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_CLK_CTL(/;"	d
bfin_read_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_CLK_CTL(/;"	d
bfin_read_SDH_CLK_CTL	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_CLK_CTL	/;"	d	file:
bfin_read_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_COMMAND(/;"	d
bfin_read_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_COMMAND(/;"	d
bfin_read_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_COMMAND(/;"	d
bfin_read_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_COMMAND(/;"	d
bfin_read_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_DATA_CNT(/;"	d
bfin_read_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_DATA_CNT(/;"	d
bfin_read_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_DATA_CNT(/;"	d
bfin_read_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_DATA_CNT(/;"	d
bfin_read_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_DATA_CTL(/;"	d
bfin_read_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_DATA_CTL(/;"	d
bfin_read_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_DATA_CTL(/;"	d
bfin_read_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_DATA_CTL(/;"	d
bfin_read_SDH_DATA_CTL	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_DATA_CTL	/;"	d	file:
bfin_read_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_DATA_LGTH(/;"	d
bfin_read_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_DATA_LGTH(/;"	d
bfin_read_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_DATA_LGTH(/;"	d
bfin_read_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_DATA_LGTH(/;"	d
bfin_read_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_DATA_TIMER(/;"	d
bfin_read_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_DATA_TIMER(/;"	d
bfin_read_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_DATA_TIMER(/;"	d
bfin_read_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_DATA_TIMER(/;"	d
bfin_read_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_E_MASK(/;"	d
bfin_read_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_E_MASK(/;"	d
bfin_read_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_E_MASK(/;"	d
bfin_read_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_E_MASK(/;"	d
bfin_read_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_E_STATUS(/;"	d
bfin_read_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_E_STATUS(/;"	d
bfin_read_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_E_STATUS(/;"	d
bfin_read_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_E_STATUS(/;"	d
bfin_read_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_FIFO(/;"	d
bfin_read_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_FIFO(/;"	d
bfin_read_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_FIFO(/;"	d
bfin_read_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_FIFO(/;"	d
bfin_read_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_FIFO_CNT(/;"	d
bfin_read_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_FIFO_CNT(/;"	d
bfin_read_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_FIFO_CNT(/;"	d
bfin_read_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_FIFO_CNT(/;"	d
bfin_read_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_MASK0(/;"	d
bfin_read_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_MASK0(/;"	d
bfin_read_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_MASK0(/;"	d
bfin_read_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_MASK0(/;"	d
bfin_read_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_MASK1(/;"	d
bfin_read_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_MASK1(/;"	d
bfin_read_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_MASK1(/;"	d
bfin_read_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_MASK1(/;"	d
bfin_read_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID0(/;"	d
bfin_read_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID0(/;"	d
bfin_read_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID0(/;"	d
bfin_read_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID0(/;"	d
bfin_read_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID1(/;"	d
bfin_read_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID1(/;"	d
bfin_read_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID1(/;"	d
bfin_read_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID1(/;"	d
bfin_read_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID2(/;"	d
bfin_read_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID2(/;"	d
bfin_read_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID2(/;"	d
bfin_read_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID2(/;"	d
bfin_read_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID3(/;"	d
bfin_read_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID3(/;"	d
bfin_read_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID3(/;"	d
bfin_read_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID3(/;"	d
bfin_read_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID4(/;"	d
bfin_read_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID4(/;"	d
bfin_read_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID4(/;"	d
bfin_read_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID4(/;"	d
bfin_read_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID5(/;"	d
bfin_read_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID5(/;"	d
bfin_read_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID5(/;"	d
bfin_read_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID5(/;"	d
bfin_read_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID6(/;"	d
bfin_read_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID6(/;"	d
bfin_read_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID6(/;"	d
bfin_read_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID6(/;"	d
bfin_read_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PID7(/;"	d
bfin_read_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PID7(/;"	d
bfin_read_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PID7(/;"	d
bfin_read_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PID7(/;"	d
bfin_read_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_PWR_CTL(/;"	d
bfin_read_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_PWR_CTL(/;"	d
bfin_read_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_PWR_CTL(/;"	d
bfin_read_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_PWR_CTL(/;"	d
bfin_read_SDH_PWR_CTL	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_PWR_CTL	/;"	d	file:
bfin_read_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_RD_WAIT_EN(/;"	d
bfin_read_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_RD_WAIT_EN(/;"	d
bfin_read_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_RD_WAIT_EN(/;"	d
bfin_read_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_RD_WAIT_EN(/;"	d
bfin_read_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE0(/;"	d
bfin_read_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE0(/;"	d
bfin_read_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE0(/;"	d
bfin_read_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE0(/;"	d
bfin_read_SDH_RESPONSE0	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_RESPONSE0	/;"	d	file:
bfin_read_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE1(/;"	d
bfin_read_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE1(/;"	d
bfin_read_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE1(/;"	d
bfin_read_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE1(/;"	d
bfin_read_SDH_RESPONSE1	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_RESPONSE1	/;"	d	file:
bfin_read_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE2(/;"	d
bfin_read_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE2(/;"	d
bfin_read_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE2(/;"	d
bfin_read_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE2(/;"	d
bfin_read_SDH_RESPONSE2	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_RESPONSE2	/;"	d	file:
bfin_read_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE3(/;"	d
bfin_read_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE3(/;"	d
bfin_read_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE3(/;"	d
bfin_read_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_RESPONSE3(/;"	d
bfin_read_SDH_RESPONSE3	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_RESPONSE3	/;"	d	file:
bfin_read_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_RESP_CMD(/;"	d
bfin_read_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_RESP_CMD(/;"	d
bfin_read_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_RESP_CMD(/;"	d
bfin_read_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_RESP_CMD(/;"	d
bfin_read_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_STATUS(/;"	d
bfin_read_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_STATUS(/;"	d
bfin_read_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_STATUS(/;"	d
bfin_read_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_STATUS(/;"	d
bfin_read_SDH_STATUS	drivers/mmc/bfin_sdh.c	/^# define bfin_read_SDH_STATUS	/;"	d	file:
bfin_read_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SDH_STATUS_CLR(/;"	d
bfin_read_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SDH_STATUS_CLR(/;"	d
bfin_read_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SDH_STATUS_CLR(/;"	d
bfin_read_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SDH_STATUS_CLR(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SECURE_CONTROL(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SECURE_STATUS(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SECURE_SYSSWT(/;"	d
bfin_read_SEC_CCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SEC_CCTL(/;"	d
bfin_read_SEC_FCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SEC_FCTL(/;"	d
bfin_read_SEC_GCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SEC_GCTL(/;"	d
bfin_read_SEC_SCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SEC_SCTL(/;"	d
bfin_read_SICA_IAR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR0(/;"	d
bfin_read_SICA_IAR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR1(/;"	d
bfin_read_SICA_IAR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR2(/;"	d
bfin_read_SICA_IAR3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR3(/;"	d
bfin_read_SICA_IAR4	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR4(/;"	d
bfin_read_SICA_IAR5	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR5(/;"	d
bfin_read_SICA_IAR6	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR6(/;"	d
bfin_read_SICA_IAR7	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IAR7(/;"	d
bfin_read_SICA_IMASK0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IMASK0(/;"	d
bfin_read_SICA_IMASK1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IMASK1(/;"	d
bfin_read_SICA_ISR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_ISR0(/;"	d
bfin_read_SICA_ISR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_ISR1(/;"	d
bfin_read_SICA_IWR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IWR0(/;"	d
bfin_read_SICA_IWR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_IWR1(/;"	d
bfin_read_SICA_RVECT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_RVECT(/;"	d
bfin_read_SICA_SWRST	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_SWRST(/;"	d
bfin_read_SICA_SYSCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICA_SYSCR(/;"	d
bfin_read_SICB_IAR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR0(/;"	d
bfin_read_SICB_IAR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR1(/;"	d
bfin_read_SICB_IAR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR2(/;"	d
bfin_read_SICB_IAR3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR3(/;"	d
bfin_read_SICB_IAR4	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR4(/;"	d
bfin_read_SICB_IAR5	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR5(/;"	d
bfin_read_SICB_IAR6	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR6(/;"	d
bfin_read_SICB_IAR7	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IAR7(/;"	d
bfin_read_SICB_IMASK0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IMASK0(/;"	d
bfin_read_SICB_IMASK1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IMASK1(/;"	d
bfin_read_SICB_ISR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_ISR0(/;"	d
bfin_read_SICB_ISR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_ISR1(/;"	d
bfin_read_SICB_IWR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IWR0(/;"	d
bfin_read_SICB_IWR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_IWR1(/;"	d
bfin_read_SICB_RVECT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_RVECT(/;"	d
bfin_read_SICB_SWRST	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_SWRST(/;"	d
bfin_read_SICB_SYSCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SICB_SYSCR(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR0(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR1(/;"	d
bfin_read_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR10(/;"	d
bfin_read_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR10(/;"	d
bfin_read_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR10(/;"	d
bfin_read_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR10(/;"	d
bfin_read_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR10(/;"	d
bfin_read_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR11(/;"	d
bfin_read_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR11(/;"	d
bfin_read_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR11(/;"	d
bfin_read_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR11(/;"	d
bfin_read_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR11(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR2(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR3(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR4(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR5(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR6(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR7(/;"	d
bfin_read_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR8(/;"	d
bfin_read_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR8(/;"	d
bfin_read_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR8(/;"	d
bfin_read_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR8(/;"	d
bfin_read_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR8(/;"	d
bfin_read_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IAR9(/;"	d
bfin_read_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IAR9(/;"	d
bfin_read_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IAR9(/;"	d
bfin_read_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IAR9(/;"	d
bfin_read_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IAR9(/;"	d
bfin_read_SIC_IMASK	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_IMASK(/;"	d
bfin_read_SIC_IMASK	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_IMASK(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IMASK0(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IMASK1(/;"	d
bfin_read_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IMASK2(/;"	d
bfin_read_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IMASK2(/;"	d
bfin_read_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IMASK2(/;"	d
bfin_read_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IMASK2(/;"	d
bfin_read_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IMASK2(/;"	d
bfin_read_SIC_ISR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_ISR(/;"	d
bfin_read_SIC_ISR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_ISR(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_ISR0(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_ISR1(/;"	d
bfin_read_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_ISR2(/;"	d
bfin_read_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_ISR2(/;"	d
bfin_read_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_ISR2(/;"	d
bfin_read_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_ISR2(/;"	d
bfin_read_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_ISR2(/;"	d
bfin_read_SIC_IWR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_IWR(/;"	d
bfin_read_SIC_IWR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_IWR(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IWR0(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IWR1(/;"	d
bfin_read_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SIC_IWR2(/;"	d
bfin_read_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SIC_IWR2(/;"	d
bfin_read_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SIC_IWR2(/;"	d
bfin_read_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SIC_IWR2(/;"	d
bfin_read_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SIC_IWR2(/;"	d
bfin_read_SIC_RVECT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SIC_RVECT(/;"	d
bfin_read_SIC_RVECT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SIC_RVECT(/;"	d
bfin_read_SIC_RVECT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SIC_RVECT(/;"	d
bfin_read_SIC_RVECT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SIC_RVECT(/;"	d
bfin_read_SIC_RVECT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SIC_RVECT(/;"	d
bfin_read_SMC_B0CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B0CTL(/;"	d
bfin_read_SMC_B0ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B0ETIM(/;"	d
bfin_read_SMC_B0TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B0TIM(/;"	d
bfin_read_SMC_B1CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B1CTL(/;"	d
bfin_read_SMC_B1ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B1ETIM(/;"	d
bfin_read_SMC_B1TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B1TIM(/;"	d
bfin_read_SMC_B2CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B2CTL(/;"	d
bfin_read_SMC_B2ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B2ETIM(/;"	d
bfin_read_SMC_B2TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B2TIM(/;"	d
bfin_read_SMC_B3CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B3CTL(/;"	d
bfin_read_SMC_B3ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B3ETIM(/;"	d
bfin_read_SMC_B3TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_B3TIM(/;"	d
bfin_read_SMC_GCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_GCTL(/;"	d
bfin_read_SMC_GSTAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SMC_GSTAT(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_BAUD(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_CTL(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_FLG(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_RDBR(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_SHADOW(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_STAT(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI0_TDBR(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_BAUD(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_CTL(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_FLG(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_RDBR(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_SHADOW(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_STAT(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI1_TDBR(/;"	d
bfin_read_SPI2_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_BAUD(/;"	d
bfin_read_SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_BAUD(/;"	d
bfin_read_SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_BAUD(/;"	d
bfin_read_SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_BAUD(/;"	d
bfin_read_SPI2_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_CTL(/;"	d
bfin_read_SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_CTL(/;"	d
bfin_read_SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_CTL(/;"	d
bfin_read_SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_CTL(/;"	d
bfin_read_SPI2_FLG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_FLG(/;"	d
bfin_read_SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_FLG(/;"	d
bfin_read_SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_FLG(/;"	d
bfin_read_SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_FLG(/;"	d
bfin_read_SPI2_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_RDBR(/;"	d
bfin_read_SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_RDBR(/;"	d
bfin_read_SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_RDBR(/;"	d
bfin_read_SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_RDBR(/;"	d
bfin_read_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_SHADOW(/;"	d
bfin_read_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_SHADOW(/;"	d
bfin_read_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_SHADOW(/;"	d
bfin_read_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_SHADOW(/;"	d
bfin_read_SPI2_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_STAT(/;"	d
bfin_read_SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_STAT(/;"	d
bfin_read_SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_STAT(/;"	d
bfin_read_SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_STAT(/;"	d
bfin_read_SPI2_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPI2_TDBR(/;"	d
bfin_read_SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPI2_TDBR(/;"	d
bfin_read_SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPI2_TDBR(/;"	d
bfin_read_SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPI2_TDBR(/;"	d
bfin_read_SPI_BAUD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_BAUD(/;"	d
bfin_read_SPI_BAUD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_BAUD(/;"	d
bfin_read_SPI_BAUD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_BAUD(/;"	d
bfin_read_SPI_BAUD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_BAUD(/;"	d
bfin_read_SPI_BAUD	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_SPI_BAUD(/;"	d
bfin_read_SPI_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_CTL(/;"	d
bfin_read_SPI_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_CTL(/;"	d
bfin_read_SPI_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_CTL(/;"	d
bfin_read_SPI_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_CTL(/;"	d
bfin_read_SPI_FLG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_FLG(/;"	d
bfin_read_SPI_FLG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_FLG(/;"	d
bfin_read_SPI_FLG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_FLG(/;"	d
bfin_read_SPI_FLG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_FLG(/;"	d
bfin_read_SPI_RDBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_RDBR(/;"	d
bfin_read_SPI_RDBR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_RDBR(/;"	d
bfin_read_SPI_RDBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_RDBR(/;"	d
bfin_read_SPI_RDBR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_RDBR(/;"	d
bfin_read_SPI_SHADOW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_SHADOW(/;"	d
bfin_read_SPI_SHADOW	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_SHADOW(/;"	d
bfin_read_SPI_SHADOW	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_SHADOW(/;"	d
bfin_read_SPI_SHADOW	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_SHADOW(/;"	d
bfin_read_SPI_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_STAT(/;"	d
bfin_read_SPI_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_STAT(/;"	d
bfin_read_SPI_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_STAT(/;"	d
bfin_read_SPI_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_STAT(/;"	d
bfin_read_SPI_TDBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPI_TDBR(/;"	d
bfin_read_SPI_TDBR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPI_TDBR(/;"	d
bfin_read_SPI_TDBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPI_TDBR(/;"	d
bfin_read_SPI_TDBR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPI_TDBR(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_CHNL(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MCMC1(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MCMC2(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MRCS0(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MRCS1(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MRCS2(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MRCS3(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MTCS0(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MTCS1(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MTCS2(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_MTCS3(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_RCLKDIV(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_RCR1(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_RCR2(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_RFSDIV(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_RX(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_STAT(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_TCLKDIV(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_TCR1(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_TCR2(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_TFSDIV(/;"	d
bfin_read_SPORT0_TX	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT0_TX(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_CHNL(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MCMC1(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MCMC2(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MRCS0(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MRCS1(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MRCS2(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MRCS3(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MTCS0(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MTCS1(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MTCS2(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_MTCS3(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_RCLKDIV(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_RCR1(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_RCR2(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_RFSDIV(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_RX	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_RX(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_STAT(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_TCLKDIV(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_TCR1(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_TCR2(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_SPORT1_TFSDIV(/;"	d
bfin_read_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_CHNL(/;"	d
bfin_read_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_CHNL(/;"	d
bfin_read_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_CHNL(/;"	d
bfin_read_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_CHNL(/;"	d
bfin_read_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_CHNL(/;"	d
bfin_read_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_CHNL(/;"	d
bfin_read_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MCMC1(/;"	d
bfin_read_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC1(/;"	d
bfin_read_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC1(/;"	d
bfin_read_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC1(/;"	d
bfin_read_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC1(/;"	d
bfin_read_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC1(/;"	d
bfin_read_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MCMC2(/;"	d
bfin_read_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC2(/;"	d
bfin_read_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC2(/;"	d
bfin_read_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC2(/;"	d
bfin_read_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC2(/;"	d
bfin_read_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MCMC2(/;"	d
bfin_read_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MRCS0(/;"	d
bfin_read_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS0(/;"	d
bfin_read_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS0(/;"	d
bfin_read_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS0(/;"	d
bfin_read_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS0(/;"	d
bfin_read_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS0(/;"	d
bfin_read_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MRCS1(/;"	d
bfin_read_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS1(/;"	d
bfin_read_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS1(/;"	d
bfin_read_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS1(/;"	d
bfin_read_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS1(/;"	d
bfin_read_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS1(/;"	d
bfin_read_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MRCS2(/;"	d
bfin_read_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS2(/;"	d
bfin_read_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS2(/;"	d
bfin_read_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS2(/;"	d
bfin_read_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS2(/;"	d
bfin_read_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS2(/;"	d
bfin_read_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MRCS3(/;"	d
bfin_read_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS3(/;"	d
bfin_read_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS3(/;"	d
bfin_read_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS3(/;"	d
bfin_read_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS3(/;"	d
bfin_read_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MRCS3(/;"	d
bfin_read_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MTCS0(/;"	d
bfin_read_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS0(/;"	d
bfin_read_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS0(/;"	d
bfin_read_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS0(/;"	d
bfin_read_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS0(/;"	d
bfin_read_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS0(/;"	d
bfin_read_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MTCS1(/;"	d
bfin_read_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS1(/;"	d
bfin_read_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS1(/;"	d
bfin_read_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS1(/;"	d
bfin_read_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS1(/;"	d
bfin_read_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS1(/;"	d
bfin_read_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MTCS2(/;"	d
bfin_read_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS2(/;"	d
bfin_read_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS2(/;"	d
bfin_read_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS2(/;"	d
bfin_read_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS2(/;"	d
bfin_read_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS2(/;"	d
bfin_read_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_MTCS3(/;"	d
bfin_read_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS3(/;"	d
bfin_read_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS3(/;"	d
bfin_read_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS3(/;"	d
bfin_read_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS3(/;"	d
bfin_read_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_MTCS3(/;"	d
bfin_read_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_RCLKDIV(/;"	d
bfin_read_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_RCLKDIV(/;"	d
bfin_read_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_RCLKDIV(/;"	d
bfin_read_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_RCLKDIV(/;"	d
bfin_read_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_RCLKDIV(/;"	d
bfin_read_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_RCLKDIV(/;"	d
bfin_read_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_RCR1(/;"	d
bfin_read_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_RCR1(/;"	d
bfin_read_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_RCR1(/;"	d
bfin_read_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_RCR1(/;"	d
bfin_read_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_RCR1(/;"	d
bfin_read_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_RCR1(/;"	d
bfin_read_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_RCR2(/;"	d
bfin_read_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_RCR2(/;"	d
bfin_read_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_RCR2(/;"	d
bfin_read_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_RCR2(/;"	d
bfin_read_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_RCR2(/;"	d
bfin_read_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_RCR2(/;"	d
bfin_read_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_RFSDIV(/;"	d
bfin_read_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_RFSDIV(/;"	d
bfin_read_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_RFSDIV(/;"	d
bfin_read_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_RFSDIV(/;"	d
bfin_read_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_RFSDIV(/;"	d
bfin_read_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_RFSDIV(/;"	d
bfin_read_SPORT2_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_RX(/;"	d
bfin_read_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_RX(/;"	d
bfin_read_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_RX(/;"	d
bfin_read_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_RX(/;"	d
bfin_read_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_RX(/;"	d
bfin_read_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_RX(/;"	d
bfin_read_SPORT2_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_STAT(/;"	d
bfin_read_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_STAT(/;"	d
bfin_read_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_STAT(/;"	d
bfin_read_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_STAT(/;"	d
bfin_read_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_STAT(/;"	d
bfin_read_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_STAT(/;"	d
bfin_read_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_TCLKDIV(/;"	d
bfin_read_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_TCLKDIV(/;"	d
bfin_read_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_TCLKDIV(/;"	d
bfin_read_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_TCLKDIV(/;"	d
bfin_read_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_TCLKDIV(/;"	d
bfin_read_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_TCLKDIV(/;"	d
bfin_read_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_TCR1(/;"	d
bfin_read_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_TCR1(/;"	d
bfin_read_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_TCR1(/;"	d
bfin_read_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_TCR1(/;"	d
bfin_read_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_TCR1(/;"	d
bfin_read_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_TCR1(/;"	d
bfin_read_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_TCR2(/;"	d
bfin_read_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_TCR2(/;"	d
bfin_read_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_TCR2(/;"	d
bfin_read_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_TCR2(/;"	d
bfin_read_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_TCR2(/;"	d
bfin_read_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_TCR2(/;"	d
bfin_read_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT2_TFSDIV(/;"	d
bfin_read_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT2_TFSDIV(/;"	d
bfin_read_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT2_TFSDIV(/;"	d
bfin_read_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT2_TFSDIV(/;"	d
bfin_read_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT2_TFSDIV(/;"	d
bfin_read_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT2_TFSDIV(/;"	d
bfin_read_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_CHNL(/;"	d
bfin_read_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_CHNL(/;"	d
bfin_read_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_CHNL(/;"	d
bfin_read_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_CHNL(/;"	d
bfin_read_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_CHNL(/;"	d
bfin_read_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_CHNL(/;"	d
bfin_read_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MCMC1(/;"	d
bfin_read_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC1(/;"	d
bfin_read_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC1(/;"	d
bfin_read_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC1(/;"	d
bfin_read_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC1(/;"	d
bfin_read_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC1(/;"	d
bfin_read_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MCMC2(/;"	d
bfin_read_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC2(/;"	d
bfin_read_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC2(/;"	d
bfin_read_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC2(/;"	d
bfin_read_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC2(/;"	d
bfin_read_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MCMC2(/;"	d
bfin_read_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MRCS0(/;"	d
bfin_read_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS0(/;"	d
bfin_read_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS0(/;"	d
bfin_read_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS0(/;"	d
bfin_read_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS0(/;"	d
bfin_read_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS0(/;"	d
bfin_read_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MRCS1(/;"	d
bfin_read_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS1(/;"	d
bfin_read_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS1(/;"	d
bfin_read_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS1(/;"	d
bfin_read_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS1(/;"	d
bfin_read_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS1(/;"	d
bfin_read_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MRCS2(/;"	d
bfin_read_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS2(/;"	d
bfin_read_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS2(/;"	d
bfin_read_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS2(/;"	d
bfin_read_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS2(/;"	d
bfin_read_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS2(/;"	d
bfin_read_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MRCS3(/;"	d
bfin_read_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS3(/;"	d
bfin_read_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS3(/;"	d
bfin_read_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS3(/;"	d
bfin_read_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS3(/;"	d
bfin_read_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MRCS3(/;"	d
bfin_read_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MTCS0(/;"	d
bfin_read_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS0(/;"	d
bfin_read_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS0(/;"	d
bfin_read_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS0(/;"	d
bfin_read_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS0(/;"	d
bfin_read_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS0(/;"	d
bfin_read_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MTCS1(/;"	d
bfin_read_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS1(/;"	d
bfin_read_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS1(/;"	d
bfin_read_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS1(/;"	d
bfin_read_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS1(/;"	d
bfin_read_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS1(/;"	d
bfin_read_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MTCS2(/;"	d
bfin_read_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS2(/;"	d
bfin_read_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS2(/;"	d
bfin_read_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS2(/;"	d
bfin_read_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS2(/;"	d
bfin_read_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS2(/;"	d
bfin_read_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_MTCS3(/;"	d
bfin_read_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS3(/;"	d
bfin_read_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS3(/;"	d
bfin_read_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS3(/;"	d
bfin_read_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS3(/;"	d
bfin_read_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_MTCS3(/;"	d
bfin_read_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_RCLKDIV(/;"	d
bfin_read_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_RCLKDIV(/;"	d
bfin_read_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_RCLKDIV(/;"	d
bfin_read_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_RCLKDIV(/;"	d
bfin_read_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_RCLKDIV(/;"	d
bfin_read_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_RCLKDIV(/;"	d
bfin_read_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_RCR1(/;"	d
bfin_read_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_RCR1(/;"	d
bfin_read_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_RCR1(/;"	d
bfin_read_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_RCR1(/;"	d
bfin_read_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_RCR1(/;"	d
bfin_read_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_RCR1(/;"	d
bfin_read_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_RCR2(/;"	d
bfin_read_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_RCR2(/;"	d
bfin_read_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_RCR2(/;"	d
bfin_read_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_RCR2(/;"	d
bfin_read_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_RCR2(/;"	d
bfin_read_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_RCR2(/;"	d
bfin_read_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_RFSDIV(/;"	d
bfin_read_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_RFSDIV(/;"	d
bfin_read_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_RFSDIV(/;"	d
bfin_read_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_RFSDIV(/;"	d
bfin_read_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_RFSDIV(/;"	d
bfin_read_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_RFSDIV(/;"	d
bfin_read_SPORT3_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_RX(/;"	d
bfin_read_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_RX(/;"	d
bfin_read_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_RX(/;"	d
bfin_read_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_RX(/;"	d
bfin_read_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_RX(/;"	d
bfin_read_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_RX(/;"	d
bfin_read_SPORT3_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_STAT(/;"	d
bfin_read_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_STAT(/;"	d
bfin_read_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_STAT(/;"	d
bfin_read_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_STAT(/;"	d
bfin_read_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_STAT(/;"	d
bfin_read_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_STAT(/;"	d
bfin_read_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_TCLKDIV(/;"	d
bfin_read_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_TCLKDIV(/;"	d
bfin_read_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_TCLKDIV(/;"	d
bfin_read_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_TCLKDIV(/;"	d
bfin_read_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_TCLKDIV(/;"	d
bfin_read_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_TCLKDIV(/;"	d
bfin_read_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_TCR1(/;"	d
bfin_read_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_TCR1(/;"	d
bfin_read_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_TCR1(/;"	d
bfin_read_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_TCR1(/;"	d
bfin_read_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_TCR1(/;"	d
bfin_read_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_TCR1(/;"	d
bfin_read_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_TCR2(/;"	d
bfin_read_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_TCR2(/;"	d
bfin_read_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_TCR2(/;"	d
bfin_read_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_TCR2(/;"	d
bfin_read_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_TCR2(/;"	d
bfin_read_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_TCR2(/;"	d
bfin_read_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SPORT3_TFSDIV(/;"	d
bfin_read_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_SPORT3_TFSDIV(/;"	d
bfin_read_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_SPORT3_TFSDIV(/;"	d
bfin_read_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_SPORT3_TFSDIV(/;"	d
bfin_read_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_SPORT3_TFSDIV(/;"	d
bfin_read_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_SPORT3_TFSDIV(/;"	d
bfin_read_SPT0_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_CHNL(/;"	d
bfin_read_SPT0_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MCMC1(/;"	d
bfin_read_SPT0_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MCMC2(/;"	d
bfin_read_SPT0_MRCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MRCS0(/;"	d
bfin_read_SPT0_MRCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MRCS1(/;"	d
bfin_read_SPT0_MRCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MRCS2(/;"	d
bfin_read_SPT0_MRCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MRCS3(/;"	d
bfin_read_SPT0_MTCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MTCS0(/;"	d
bfin_read_SPT0_MTCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MTCS1(/;"	d
bfin_read_SPT0_MTCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MTCS2(/;"	d
bfin_read_SPT0_MTCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_MTCS3(/;"	d
bfin_read_SPT0_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_RFSDIV(/;"	d
bfin_read_SPT0_RSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_RSCLKDIV(/;"	d
bfin_read_SPT0_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_RX(/;"	d
bfin_read_SPT0_RX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_RX_CONFIG0(/;"	d
bfin_read_SPT0_RX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_RX_CONFIG1(/;"	d
bfin_read_SPT0_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_STAT(/;"	d
bfin_read_SPT0_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_TFSDIV(/;"	d
bfin_read_SPT0_TSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_TSCLKDIV(/;"	d
bfin_read_SPT0_TX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_TX(/;"	d
bfin_read_SPT0_TX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_TX_CONFIG0(/;"	d
bfin_read_SPT0_TX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT0_TX_CONFIG1(/;"	d
bfin_read_SPT1_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_CHNL(/;"	d
bfin_read_SPT1_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MCMC1(/;"	d
bfin_read_SPT1_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MCMC2(/;"	d
bfin_read_SPT1_MRCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MRCS0(/;"	d
bfin_read_SPT1_MRCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MRCS1(/;"	d
bfin_read_SPT1_MRCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MRCS2(/;"	d
bfin_read_SPT1_MRCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MRCS3(/;"	d
bfin_read_SPT1_MTCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MTCS0(/;"	d
bfin_read_SPT1_MTCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MTCS1(/;"	d
bfin_read_SPT1_MTCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MTCS2(/;"	d
bfin_read_SPT1_MTCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_MTCS3(/;"	d
bfin_read_SPT1_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_RFSDIV(/;"	d
bfin_read_SPT1_RSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_RSCLKDIV(/;"	d
bfin_read_SPT1_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_RX(/;"	d
bfin_read_SPT1_RX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_RX_CONFIG0(/;"	d
bfin_read_SPT1_RX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_RX_CONFIG1(/;"	d
bfin_read_SPT1_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_STAT(/;"	d
bfin_read_SPT1_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_TFSDIV(/;"	d
bfin_read_SPT1_TSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_TSCLKDIV(/;"	d
bfin_read_SPT1_TX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_TX(/;"	d
bfin_read_SPT1_TX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_TX_CONFIG0(/;"	d
bfin_read_SPT1_TX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SPT1_TX_CONFIG1(/;"	d
bfin_read_SRAM_BASE_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_SRAM_BASE_ADDR(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SWRST	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define bfin_read_SWRST(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_SYSCR	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define bfin_read_SYSCR(/;"	d
bfin_read_TBUF	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TBUF(/;"	d
bfin_read_TBUF	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TBUF(/;"	d
bfin_read_TBUFCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TBUFCTL(/;"	d
bfin_read_TBUFCTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TBUFCTL(/;"	d
bfin_read_TBUFSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TBUFSTAT(/;"	d
bfin_read_TBUFSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TBUFSTAT(/;"	d
bfin_read_TCNTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TCNTL(/;"	d
bfin_read_TCOUNT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TCOUNT(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER0_CONFIG(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER0_COUNTER(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER0_PERIOD(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER0_WIDTH(/;"	d
bfin_read_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER10_CONFIG(/;"	d
bfin_read_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER10_CONFIG(/;"	d
bfin_read_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER10_CONFIG(/;"	d
bfin_read_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER10_CONFIG(/;"	d
bfin_read_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER10_CONFIG(/;"	d
bfin_read_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER10_COUNTER(/;"	d
bfin_read_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER10_COUNTER(/;"	d
bfin_read_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER10_COUNTER(/;"	d
bfin_read_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER10_COUNTER(/;"	d
bfin_read_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER10_COUNTER(/;"	d
bfin_read_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER10_PERIOD(/;"	d
bfin_read_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER10_PERIOD(/;"	d
bfin_read_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER10_PERIOD(/;"	d
bfin_read_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER10_PERIOD(/;"	d
bfin_read_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER10_PERIOD(/;"	d
bfin_read_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER10_WIDTH(/;"	d
bfin_read_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER10_WIDTH(/;"	d
bfin_read_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER10_WIDTH(/;"	d
bfin_read_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER10_WIDTH(/;"	d
bfin_read_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER10_WIDTH(/;"	d
bfin_read_TIMER11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER11_CONFIG(/;"	d
bfin_read_TIMER11_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER11_COUNTER(/;"	d
bfin_read_TIMER11_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER11_PERIOD(/;"	d
bfin_read_TIMER11_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER11_WIDTH(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER1_CONFIG(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER1_COUNTER(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER1_PERIOD(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER1_WIDTH(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER2_CONFIG(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER2_COUNTER(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER2_PERIOD(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER2_WIDTH(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER3_CONFIG(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER3_COUNTER(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER3_PERIOD(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER3_WIDTH(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER4_CONFIG(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER4_COUNTER(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER4_PERIOD(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER4_WIDTH(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER5_CONFIG(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER5_COUNTER(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER5_PERIOD(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER5_WIDTH(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER6_CONFIG(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER6_COUNTER(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER6_PERIOD(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER6_WIDTH(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER7_CONFIG(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER7_COUNTER(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER7_PERIOD(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER7_WIDTH(/;"	d
bfin_read_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER8_CONFIG(/;"	d
bfin_read_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER8_CONFIG(/;"	d
bfin_read_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER8_CONFIG(/;"	d
bfin_read_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER8_CONFIG(/;"	d
bfin_read_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER8_CONFIG(/;"	d
bfin_read_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER8_COUNTER(/;"	d
bfin_read_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER8_COUNTER(/;"	d
bfin_read_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER8_COUNTER(/;"	d
bfin_read_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER8_COUNTER(/;"	d
bfin_read_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER8_COUNTER(/;"	d
bfin_read_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER8_PERIOD(/;"	d
bfin_read_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER8_PERIOD(/;"	d
bfin_read_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER8_PERIOD(/;"	d
bfin_read_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER8_PERIOD(/;"	d
bfin_read_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER8_PERIOD(/;"	d
bfin_read_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER8_WIDTH(/;"	d
bfin_read_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER8_WIDTH(/;"	d
bfin_read_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER8_WIDTH(/;"	d
bfin_read_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER8_WIDTH(/;"	d
bfin_read_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER8_WIDTH(/;"	d
bfin_read_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER9_CONFIG(/;"	d
bfin_read_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER9_CONFIG(/;"	d
bfin_read_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER9_CONFIG(/;"	d
bfin_read_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER9_CONFIG(/;"	d
bfin_read_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER9_CONFIG(/;"	d
bfin_read_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER9_COUNTER(/;"	d
bfin_read_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER9_COUNTER(/;"	d
bfin_read_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER9_COUNTER(/;"	d
bfin_read_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER9_COUNTER(/;"	d
bfin_read_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER9_COUNTER(/;"	d
bfin_read_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER9_PERIOD(/;"	d
bfin_read_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER9_PERIOD(/;"	d
bfin_read_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER9_PERIOD(/;"	d
bfin_read_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER9_PERIOD(/;"	d
bfin_read_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER9_PERIOD(/;"	d
bfin_read_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER9_WIDTH(/;"	d
bfin_read_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER9_WIDTH(/;"	d
bfin_read_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER9_WIDTH(/;"	d
bfin_read_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER9_WIDTH(/;"	d
bfin_read_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TIMER9_WIDTH(/;"	d
bfin_read_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER_DISABLE(/;"	d
bfin_read_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER_DISABLE(/;"	d
bfin_read_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER_DISABLE(/;"	d
bfin_read_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER_DISABLE(/;"	d
bfin_read_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER_DISABLE(/;"	d
bfin_read_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER_DISABLE(/;"	d
bfin_read_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE0(/;"	d
bfin_read_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE0(/;"	d
bfin_read_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE0(/;"	d
bfin_read_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE0(/;"	d
bfin_read_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE0(/;"	d
bfin_read_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE1(/;"	d
bfin_read_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE1(/;"	d
bfin_read_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE1(/;"	d
bfin_read_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER_DISABLE1(/;"	d
bfin_read_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER_ENABLE(/;"	d
bfin_read_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER_ENABLE(/;"	d
bfin_read_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER_ENABLE(/;"	d
bfin_read_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER_ENABLE(/;"	d
bfin_read_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER_ENABLE(/;"	d
bfin_read_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER_ENABLE(/;"	d
bfin_read_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE0(/;"	d
bfin_read_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE0(/;"	d
bfin_read_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE0(/;"	d
bfin_read_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE0(/;"	d
bfin_read_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE0(/;"	d
bfin_read_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE1(/;"	d
bfin_read_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE1(/;"	d
bfin_read_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE1(/;"	d
bfin_read_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER_ENABLE1(/;"	d
bfin_read_TIMER_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TIMER_STATUS(/;"	d
bfin_read_TIMER_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TIMER_STATUS(/;"	d
bfin_read_TIMER_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TIMER_STATUS(/;"	d
bfin_read_TIMER_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_TIMER_STATUS(/;"	d
bfin_read_TIMER_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TIMER_STATUS(/;"	d
bfin_read_TIMER_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TIMER_STATUS(/;"	d
bfin_read_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TIMER_STATUS0(/;"	d
bfin_read_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER_STATUS0(/;"	d
bfin_read_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER_STATUS0(/;"	d
bfin_read_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER_STATUS0(/;"	d
bfin_read_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER_STATUS0(/;"	d
bfin_read_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TIMER_STATUS1(/;"	d
bfin_read_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TIMER_STATUS1(/;"	d
bfin_read_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TIMER_STATUS1(/;"	d
bfin_read_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TIMER_STATUS1(/;"	d
bfin_read_TMRS4_DISABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TMRS4_DISABLE(/;"	d
bfin_read_TMRS4_ENABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TMRS4_ENABLE(/;"	d
bfin_read_TMRS4_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TMRS4_STATUS(/;"	d
bfin_read_TMRS8_DISABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TMRS8_DISABLE(/;"	d
bfin_read_TMRS8_ENABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TMRS8_ENABLE(/;"	d
bfin_read_TMRS8_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_TMRS8_STATUS(/;"	d
bfin_read_TPERIOD	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TPERIOD(/;"	d
bfin_read_TSCALE	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_TSCALE(/;"	d
bfin_read_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_CLKDIV(/;"	d
bfin_read_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_CLKDIV(/;"	d
bfin_read_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_CLKDIV(/;"	d
bfin_read_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_CLKDIV(/;"	d
bfin_read_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_CLKDIV(/;"	d
bfin_read_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_CLKDIV(/;"	d
bfin_read_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_CONTROL(/;"	d
bfin_read_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_CONTROL(/;"	d
bfin_read_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_CONTROL(/;"	d
bfin_read_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_CONTROL(/;"	d
bfin_read_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_CONTROL(/;"	d
bfin_read_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_CONTROL(/;"	d
bfin_read_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_FIFO_CTL(/;"	d
bfin_read_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_CTL(/;"	d
bfin_read_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_CTL(/;"	d
bfin_read_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_CTL(/;"	d
bfin_read_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_CTL(/;"	d
bfin_read_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_CTL(/;"	d
bfin_read_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_FIFO_STAT(/;"	d
bfin_read_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_STAT(/;"	d
bfin_read_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_STAT(/;"	d
bfin_read_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_STAT(/;"	d
bfin_read_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_STAT(/;"	d
bfin_read_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_FIFO_STAT(/;"	d
bfin_read_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_INT_MASK(/;"	d
bfin_read_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_INT_MASK(/;"	d
bfin_read_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_INT_MASK(/;"	d
bfin_read_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_INT_MASK(/;"	d
bfin_read_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_INT_MASK(/;"	d
bfin_read_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_INT_MASK(/;"	d
bfin_read_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_INT_STAT(/;"	d
bfin_read_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_INT_STAT(/;"	d
bfin_read_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_INT_STAT(/;"	d
bfin_read_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_INT_STAT(/;"	d
bfin_read_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_INT_STAT(/;"	d
bfin_read_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_INT_STAT(/;"	d
bfin_read_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_MASTER_ADDR(/;"	d
bfin_read_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_ADDR(/;"	d
bfin_read_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_ADDR(/;"	d
bfin_read_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_ADDR(/;"	d
bfin_read_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_ADDR(/;"	d
bfin_read_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_ADDR(/;"	d
bfin_read_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_MASTER_CTL(/;"	d
bfin_read_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_CTL(/;"	d
bfin_read_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_CTL(/;"	d
bfin_read_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_CTL(/;"	d
bfin_read_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_CTL(/;"	d
bfin_read_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_CTL(/;"	d
bfin_read_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_MASTER_STAT(/;"	d
bfin_read_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_STAT(/;"	d
bfin_read_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_STAT(/;"	d
bfin_read_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_STAT(/;"	d
bfin_read_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_STAT(/;"	d
bfin_read_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_MASTER_STAT(/;"	d
bfin_read_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_RCV_DATA16(/;"	d
bfin_read_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA16(/;"	d
bfin_read_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA16(/;"	d
bfin_read_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA16(/;"	d
bfin_read_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA16(/;"	d
bfin_read_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA16(/;"	d
bfin_read_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_RCV_DATA8(/;"	d
bfin_read_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA8(/;"	d
bfin_read_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA8(/;"	d
bfin_read_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA8(/;"	d
bfin_read_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA8(/;"	d
bfin_read_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_RCV_DATA8(/;"	d
bfin_read_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_SLAVE_ADDR(/;"	d
bfin_read_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_ADDR(/;"	d
bfin_read_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_ADDR(/;"	d
bfin_read_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_ADDR(/;"	d
bfin_read_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_ADDR(/;"	d
bfin_read_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_ADDR(/;"	d
bfin_read_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_CTL(/;"	d
bfin_read_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_CTL(/;"	d
bfin_read_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_CTL(/;"	d
bfin_read_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_CTL(/;"	d
bfin_read_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_CTL(/;"	d
bfin_read_TWI0_SLAVE_CTRL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_SLAVE_CTRL(/;"	d
bfin_read_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_SLAVE_STAT(/;"	d
bfin_read_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_STAT(/;"	d
bfin_read_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_STAT(/;"	d
bfin_read_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_STAT(/;"	d
bfin_read_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_STAT(/;"	d
bfin_read_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_SLAVE_STAT(/;"	d
bfin_read_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_XMT_DATA16(/;"	d
bfin_read_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA16(/;"	d
bfin_read_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA16(/;"	d
bfin_read_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA16(/;"	d
bfin_read_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA16(/;"	d
bfin_read_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA16(/;"	d
bfin_read_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI0_XMT_DATA8(/;"	d
bfin_read_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA8(/;"	d
bfin_read_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA8(/;"	d
bfin_read_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA8(/;"	d
bfin_read_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA8(/;"	d
bfin_read_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI0_XMT_DATA8(/;"	d
bfin_read_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_CLKDIV(/;"	d
bfin_read_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_CLKDIV(/;"	d
bfin_read_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_CLKDIV(/;"	d
bfin_read_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_CLKDIV(/;"	d
bfin_read_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_CLKDIV(/;"	d
bfin_read_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_CONTROL(/;"	d
bfin_read_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_CONTROL(/;"	d
bfin_read_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_CONTROL(/;"	d
bfin_read_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_CONTROL(/;"	d
bfin_read_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_CONTROL(/;"	d
bfin_read_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_FIFO_CTL(/;"	d
bfin_read_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_CTL(/;"	d
bfin_read_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_CTL(/;"	d
bfin_read_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_CTL(/;"	d
bfin_read_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_CTL(/;"	d
bfin_read_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_FIFO_STAT(/;"	d
bfin_read_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_STAT(/;"	d
bfin_read_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_STAT(/;"	d
bfin_read_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_STAT(/;"	d
bfin_read_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_FIFO_STAT(/;"	d
bfin_read_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_INT_MASK(/;"	d
bfin_read_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_INT_MASK(/;"	d
bfin_read_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_INT_MASK(/;"	d
bfin_read_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_INT_MASK(/;"	d
bfin_read_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_INT_MASK(/;"	d
bfin_read_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_INT_STAT(/;"	d
bfin_read_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_INT_STAT(/;"	d
bfin_read_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_INT_STAT(/;"	d
bfin_read_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_INT_STAT(/;"	d
bfin_read_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_INT_STAT(/;"	d
bfin_read_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_MASTER_ADDR(/;"	d
bfin_read_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_ADDR(/;"	d
bfin_read_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_ADDR(/;"	d
bfin_read_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_ADDR(/;"	d
bfin_read_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_ADDR(/;"	d
bfin_read_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_MASTER_CTL(/;"	d
bfin_read_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_CTL(/;"	d
bfin_read_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_CTL(/;"	d
bfin_read_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_CTL(/;"	d
bfin_read_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_CTL(/;"	d
bfin_read_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_MASTER_STAT(/;"	d
bfin_read_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_STAT(/;"	d
bfin_read_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_STAT(/;"	d
bfin_read_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_STAT(/;"	d
bfin_read_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_MASTER_STAT(/;"	d
bfin_read_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_RCV_DATA16(/;"	d
bfin_read_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA16(/;"	d
bfin_read_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA16(/;"	d
bfin_read_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA16(/;"	d
bfin_read_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA16(/;"	d
bfin_read_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_RCV_DATA8(/;"	d
bfin_read_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA8(/;"	d
bfin_read_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA8(/;"	d
bfin_read_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA8(/;"	d
bfin_read_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_RCV_DATA8(/;"	d
bfin_read_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_SLAVE_ADDR(/;"	d
bfin_read_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_ADDR(/;"	d
bfin_read_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_ADDR(/;"	d
bfin_read_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_ADDR(/;"	d
bfin_read_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_ADDR(/;"	d
bfin_read_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_CTL(/;"	d
bfin_read_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_CTL(/;"	d
bfin_read_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_CTL(/;"	d
bfin_read_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_CTL(/;"	d
bfin_read_TWI1_SLAVE_CTRL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_SLAVE_CTRL(/;"	d
bfin_read_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_SLAVE_STAT(/;"	d
bfin_read_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_STAT(/;"	d
bfin_read_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_STAT(/;"	d
bfin_read_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_STAT(/;"	d
bfin_read_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_SLAVE_STAT(/;"	d
bfin_read_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_XMT_DATA16(/;"	d
bfin_read_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA16(/;"	d
bfin_read_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA16(/;"	d
bfin_read_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA16(/;"	d
bfin_read_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA16(/;"	d
bfin_read_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_TWI1_XMT_DATA8(/;"	d
bfin_read_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA8(/;"	d
bfin_read_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA8(/;"	d
bfin_read_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA8(/;"	d
bfin_read_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_TWI1_XMT_DATA8(/;"	d
bfin_read_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_CLKDIV(/;"	d
bfin_read_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_CLKDIV(/;"	d
bfin_read_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_CLKDIV(/;"	d
bfin_read_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_CLKDIV(/;"	d
bfin_read_TWI_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_CONTROL(/;"	d
bfin_read_TWI_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_CONTROL(/;"	d
bfin_read_TWI_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_CONTROL(/;"	d
bfin_read_TWI_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_CONTROL(/;"	d
bfin_read_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_FIFO_CTL(/;"	d
bfin_read_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_FIFO_CTL(/;"	d
bfin_read_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_FIFO_CTL(/;"	d
bfin_read_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_FIFO_CTL(/;"	d
bfin_read_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_FIFO_STAT(/;"	d
bfin_read_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_FIFO_STAT(/;"	d
bfin_read_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_FIFO_STAT(/;"	d
bfin_read_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_FIFO_STAT(/;"	d
bfin_read_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_INT_MASK(/;"	d
bfin_read_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_INT_MASK(/;"	d
bfin_read_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_INT_MASK(/;"	d
bfin_read_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_INT_MASK(/;"	d
bfin_read_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_INT_STAT(/;"	d
bfin_read_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_INT_STAT(/;"	d
bfin_read_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_INT_STAT(/;"	d
bfin_read_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_INT_STAT(/;"	d
bfin_read_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_MASTER_ADDR(/;"	d
bfin_read_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_MASTER_ADDR(/;"	d
bfin_read_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_MASTER_ADDR(/;"	d
bfin_read_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_MASTER_ADDR(/;"	d
bfin_read_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_MASTER_CTL(/;"	d
bfin_read_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_MASTER_CTL(/;"	d
bfin_read_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_MASTER_CTL(/;"	d
bfin_read_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_MASTER_CTL(/;"	d
bfin_read_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_MASTER_STAT(/;"	d
bfin_read_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_MASTER_STAT(/;"	d
bfin_read_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_MASTER_STAT(/;"	d
bfin_read_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_MASTER_STAT(/;"	d
bfin_read_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_RCV_DATA16(/;"	d
bfin_read_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_RCV_DATA16(/;"	d
bfin_read_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_RCV_DATA16(/;"	d
bfin_read_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_RCV_DATA16(/;"	d
bfin_read_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_RCV_DATA8(/;"	d
bfin_read_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_RCV_DATA8(/;"	d
bfin_read_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_RCV_DATA8(/;"	d
bfin_read_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_RCV_DATA8(/;"	d
bfin_read_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_SLAVE_ADDR(/;"	d
bfin_read_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_SLAVE_ADDR(/;"	d
bfin_read_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_SLAVE_ADDR(/;"	d
bfin_read_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_SLAVE_ADDR(/;"	d
bfin_read_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_SLAVE_CTL(/;"	d
bfin_read_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_SLAVE_CTL(/;"	d
bfin_read_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_SLAVE_CTL(/;"	d
bfin_read_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_SLAVE_CTL(/;"	d
bfin_read_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_SLAVE_STAT(/;"	d
bfin_read_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_SLAVE_STAT(/;"	d
bfin_read_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_SLAVE_STAT(/;"	d
bfin_read_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_SLAVE_STAT(/;"	d
bfin_read_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_XMT_DATA16(/;"	d
bfin_read_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_XMT_DATA16(/;"	d
bfin_read_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_XMT_DATA16(/;"	d
bfin_read_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_XMT_DATA16(/;"	d
bfin_read_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_TWI_XMT_DATA8(/;"	d
bfin_read_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_TWI_XMT_DATA8(/;"	d
bfin_read_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_TWI_XMT_DATA8(/;"	d
bfin_read_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_TWI_XMT_DATA8(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_DLH(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_DLL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_GCTL(/;"	d
bfin_read_UART0_IER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_IER(/;"	d
bfin_read_UART0_IER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_IER(/;"	d
bfin_read_UART0_IER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_IER(/;"	d
bfin_read_UART0_IER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_IER(/;"	d
bfin_read_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_IER_CLEAR(/;"	d
bfin_read_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_IER_CLEAR(/;"	d
bfin_read_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_IER_CLEAR(/;"	d
bfin_read_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_IER_CLEAR(/;"	d
bfin_read_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_IER_CLEAR(/;"	d
bfin_read_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_IER_CLEAR(/;"	d
bfin_read_UART0_IER_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_IER_SET(/;"	d
bfin_read_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_IER_SET(/;"	d
bfin_read_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_IER_SET(/;"	d
bfin_read_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_IER_SET(/;"	d
bfin_read_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_IER_SET(/;"	d
bfin_read_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_IER_SET(/;"	d
bfin_read_UART0_IIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_IIR(/;"	d
bfin_read_UART0_IIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_IIR(/;"	d
bfin_read_UART0_IIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_IIR(/;"	d
bfin_read_UART0_IIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_IIR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_LCR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_LSR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_MCR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_MSR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_RBR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_SCR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART0_THR(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_DLH(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_DLL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_GCTL(/;"	d
bfin_read_UART1_IER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_IER(/;"	d
bfin_read_UART1_IER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_IER(/;"	d
bfin_read_UART1_IER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_IER(/;"	d
bfin_read_UART1_IER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_IER(/;"	d
bfin_read_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_IER_CLEAR(/;"	d
bfin_read_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_IER_CLEAR(/;"	d
bfin_read_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_IER_CLEAR(/;"	d
bfin_read_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_IER_CLEAR(/;"	d
bfin_read_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_IER_CLEAR(/;"	d
bfin_read_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_IER_CLEAR(/;"	d
bfin_read_UART1_IER_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_IER_SET(/;"	d
bfin_read_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_IER_SET(/;"	d
bfin_read_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_IER_SET(/;"	d
bfin_read_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_IER_SET(/;"	d
bfin_read_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_IER_SET(/;"	d
bfin_read_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_IER_SET(/;"	d
bfin_read_UART1_IIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_IIR(/;"	d
bfin_read_UART1_IIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_IIR(/;"	d
bfin_read_UART1_IIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_IIR(/;"	d
bfin_read_UART1_IIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_IIR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_LCR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_LSR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_MCR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_MSR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_RBR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_SCR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART1_THR(/;"	d
bfin_read_UART2_DLH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_DLH(/;"	d
bfin_read_UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_DLH(/;"	d
bfin_read_UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_DLH(/;"	d
bfin_read_UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_DLH(/;"	d
bfin_read_UART2_DLL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_DLL(/;"	d
bfin_read_UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_DLL(/;"	d
bfin_read_UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_DLL(/;"	d
bfin_read_UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_DLL(/;"	d
bfin_read_UART2_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_GCTL(/;"	d
bfin_read_UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_GCTL(/;"	d
bfin_read_UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_GCTL(/;"	d
bfin_read_UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_GCTL(/;"	d
bfin_read_UART2_IER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_IER(/;"	d
bfin_read_UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_IER_CLEAR(/;"	d
bfin_read_UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_IER_CLEAR(/;"	d
bfin_read_UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_IER_CLEAR(/;"	d
bfin_read_UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_IER_SET(/;"	d
bfin_read_UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_IER_SET(/;"	d
bfin_read_UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_IER_SET(/;"	d
bfin_read_UART2_IIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_IIR(/;"	d
bfin_read_UART2_LCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_LCR(/;"	d
bfin_read_UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_LCR(/;"	d
bfin_read_UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_LCR(/;"	d
bfin_read_UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_LCR(/;"	d
bfin_read_UART2_LSR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_LSR(/;"	d
bfin_read_UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_LSR(/;"	d
bfin_read_UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_LSR(/;"	d
bfin_read_UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_LSR(/;"	d
bfin_read_UART2_MCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_MCR(/;"	d
bfin_read_UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_MCR(/;"	d
bfin_read_UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_MCR(/;"	d
bfin_read_UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_MCR(/;"	d
bfin_read_UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_MSR(/;"	d
bfin_read_UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_MSR(/;"	d
bfin_read_UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_MSR(/;"	d
bfin_read_UART2_RBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_RBR(/;"	d
bfin_read_UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_RBR(/;"	d
bfin_read_UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_RBR(/;"	d
bfin_read_UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_RBR(/;"	d
bfin_read_UART2_SCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_SCR(/;"	d
bfin_read_UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_SCR(/;"	d
bfin_read_UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_SCR(/;"	d
bfin_read_UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_SCR(/;"	d
bfin_read_UART2_THR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_UART2_THR(/;"	d
bfin_read_UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART2_THR(/;"	d
bfin_read_UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART2_THR(/;"	d
bfin_read_UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART2_THR(/;"	d
bfin_read_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_DLH(/;"	d
bfin_read_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_DLH(/;"	d
bfin_read_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_DLH(/;"	d
bfin_read_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_DLH(/;"	d
bfin_read_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_DLH(/;"	d
bfin_read_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_DLL(/;"	d
bfin_read_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_DLL(/;"	d
bfin_read_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_DLL(/;"	d
bfin_read_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_DLL(/;"	d
bfin_read_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_DLL(/;"	d
bfin_read_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_GCTL(/;"	d
bfin_read_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_GCTL(/;"	d
bfin_read_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_GCTL(/;"	d
bfin_read_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_GCTL(/;"	d
bfin_read_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_GCTL(/;"	d
bfin_read_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_IER_CLEAR(/;"	d
bfin_read_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_IER_CLEAR(/;"	d
bfin_read_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_IER_CLEAR(/;"	d
bfin_read_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_IER_CLEAR(/;"	d
bfin_read_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_IER_CLEAR(/;"	d
bfin_read_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_IER_SET(/;"	d
bfin_read_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_IER_SET(/;"	d
bfin_read_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_IER_SET(/;"	d
bfin_read_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_IER_SET(/;"	d
bfin_read_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_IER_SET(/;"	d
bfin_read_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_LCR(/;"	d
bfin_read_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_LCR(/;"	d
bfin_read_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_LCR(/;"	d
bfin_read_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_LCR(/;"	d
bfin_read_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_LCR(/;"	d
bfin_read_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_LSR(/;"	d
bfin_read_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_LSR(/;"	d
bfin_read_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_LSR(/;"	d
bfin_read_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_LSR(/;"	d
bfin_read_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_LSR(/;"	d
bfin_read_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_MCR(/;"	d
bfin_read_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_MCR(/;"	d
bfin_read_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_MCR(/;"	d
bfin_read_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_MCR(/;"	d
bfin_read_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_MCR(/;"	d
bfin_read_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_MSR(/;"	d
bfin_read_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_MSR(/;"	d
bfin_read_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_MSR(/;"	d
bfin_read_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_MSR(/;"	d
bfin_read_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_MSR(/;"	d
bfin_read_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_RBR(/;"	d
bfin_read_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_RBR(/;"	d
bfin_read_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_RBR(/;"	d
bfin_read_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_RBR(/;"	d
bfin_read_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_RBR(/;"	d
bfin_read_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_SCR(/;"	d
bfin_read_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_SCR(/;"	d
bfin_read_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_SCR(/;"	d
bfin_read_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_SCR(/;"	d
bfin_read_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_SCR(/;"	d
bfin_read_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_UART3_THR(/;"	d
bfin_read_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_UART3_THR(/;"	d
bfin_read_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_UART3_THR(/;"	d
bfin_read_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_UART3_THR(/;"	d
bfin_read_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_UART3_THR(/;"	d
bfin_read_UART_DLH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_DLH(/;"	d
bfin_read_UART_DLH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_DLH(/;"	d
bfin_read_UART_DLL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_DLL(/;"	d
bfin_read_UART_DLL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_DLL(/;"	d
bfin_read_UART_GBL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_GBL(/;"	d
bfin_read_UART_GCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_GCTL(/;"	d
bfin_read_UART_GCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_GCTL(/;"	d
bfin_read_UART_IER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_IER(/;"	d
bfin_read_UART_IER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_IER(/;"	d
bfin_read_UART_IIR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_IIR(/;"	d
bfin_read_UART_IIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_IIR(/;"	d
bfin_read_UART_LCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_LCR(/;"	d
bfin_read_UART_LCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_LCR(/;"	d
bfin_read_UART_LSR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_LSR(/;"	d
bfin_read_UART_LSR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_LSR(/;"	d
bfin_read_UART_MCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_MCR(/;"	d
bfin_read_UART_MCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_MCR(/;"	d
bfin_read_UART_MSR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_MSR(/;"	d
bfin_read_UART_RBR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_RBR(/;"	d
bfin_read_UART_RBR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_RBR(/;"	d
bfin_read_UART_SCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_SCR(/;"	d
bfin_read_UART_SCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_SCR(/;"	d
bfin_read_UART_THR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_UART_THR(/;"	d
bfin_read_UART_THR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_UART_THR(/;"	d
bfin_read_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_APHY_CALIB(/;"	d
bfin_read_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_APHY_CALIB(/;"	d
bfin_read_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_APHY_CALIB(/;"	d
bfin_read_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_APHY_CALIB(/;"	d
bfin_read_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_APHY_CALIB(/;"	d
bfin_read_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_APHY_CNTRL(/;"	d
bfin_read_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL(/;"	d
bfin_read_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL(/;"	d
bfin_read_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL(/;"	d
bfin_read_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL(/;"	d
bfin_read_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_USB_APHY_CNTRL(/;"	d
bfin_read_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_APHY_CNTRL2(/;"	d
bfin_read_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL2(/;"	d
bfin_read_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL2(/;"	d
bfin_read_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL2(/;"	d
bfin_read_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_APHY_CNTRL2(/;"	d
bfin_read_USB_COUNT0	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_COUNT0(/;"	d
bfin_read_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_COUNT0(/;"	d
bfin_read_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_COUNT0(/;"	d
bfin_read_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_COUNT0(/;"	d
bfin_read_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_COUNT0(/;"	d
bfin_read_USB_CSR0	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_CSR0(/;"	d
bfin_read_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_CSR0(/;"	d
bfin_read_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_CSR0(/;"	d
bfin_read_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_CSR0(/;"	d
bfin_read_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_CSR0(/;"	d
bfin_read_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA0_ADDRHIGH(/;"	d
bfin_read_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRHIGH(/;"	d
bfin_read_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRHIGH(/;"	d
bfin_read_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRHIGH(/;"	d
bfin_read_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRHIGH(/;"	d
bfin_read_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA0_ADDRLOW(/;"	d
bfin_read_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRLOW(/;"	d
bfin_read_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRLOW(/;"	d
bfin_read_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRLOW(/;"	d
bfin_read_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA0_ADDRLOW(/;"	d
bfin_read_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA0_CONTROL(/;"	d
bfin_read_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA0_CONTROL(/;"	d
bfin_read_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA0_CONTROL(/;"	d
bfin_read_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA0_CONTROL(/;"	d
bfin_read_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA0_CONTROL(/;"	d
bfin_read_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA0_COUNTHIGH(/;"	d
bfin_read_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTHIGH(/;"	d
bfin_read_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTHIGH(/;"	d
bfin_read_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTHIGH(/;"	d
bfin_read_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTHIGH(/;"	d
bfin_read_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA0_COUNTLOW(/;"	d
bfin_read_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTLOW(/;"	d
bfin_read_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTLOW(/;"	d
bfin_read_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTLOW(/;"	d
bfin_read_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA0_COUNTLOW(/;"	d
bfin_read_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA1_ADDRHIGH(/;"	d
bfin_read_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRHIGH(/;"	d
bfin_read_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRHIGH(/;"	d
bfin_read_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRHIGH(/;"	d
bfin_read_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRHIGH(/;"	d
bfin_read_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA1_ADDRLOW(/;"	d
bfin_read_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRLOW(/;"	d
bfin_read_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRLOW(/;"	d
bfin_read_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRLOW(/;"	d
bfin_read_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA1_ADDRLOW(/;"	d
bfin_read_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA1_CONTROL(/;"	d
bfin_read_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA1_CONTROL(/;"	d
bfin_read_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA1_CONTROL(/;"	d
bfin_read_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA1_CONTROL(/;"	d
bfin_read_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA1_CONTROL(/;"	d
bfin_read_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA1_COUNTHIGH(/;"	d
bfin_read_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTHIGH(/;"	d
bfin_read_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTHIGH(/;"	d
bfin_read_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTHIGH(/;"	d
bfin_read_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTHIGH(/;"	d
bfin_read_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA1_COUNTLOW(/;"	d
bfin_read_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTLOW(/;"	d
bfin_read_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTLOW(/;"	d
bfin_read_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTLOW(/;"	d
bfin_read_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA1_COUNTLOW(/;"	d
bfin_read_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA2_ADDRHIGH(/;"	d
bfin_read_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRHIGH(/;"	d
bfin_read_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRHIGH(/;"	d
bfin_read_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRHIGH(/;"	d
bfin_read_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRHIGH(/;"	d
bfin_read_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA2_ADDRLOW(/;"	d
bfin_read_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRLOW(/;"	d
bfin_read_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRLOW(/;"	d
bfin_read_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRLOW(/;"	d
bfin_read_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA2_ADDRLOW(/;"	d
bfin_read_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA2_CONTROL(/;"	d
bfin_read_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA2_CONTROL(/;"	d
bfin_read_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA2_CONTROL(/;"	d
bfin_read_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA2_CONTROL(/;"	d
bfin_read_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA2_CONTROL(/;"	d
bfin_read_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA2_COUNTHIGH(/;"	d
bfin_read_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTHIGH(/;"	d
bfin_read_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTHIGH(/;"	d
bfin_read_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTHIGH(/;"	d
bfin_read_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTHIGH(/;"	d
bfin_read_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA2_COUNTLOW(/;"	d
bfin_read_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTLOW(/;"	d
bfin_read_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTLOW(/;"	d
bfin_read_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTLOW(/;"	d
bfin_read_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA2_COUNTLOW(/;"	d
bfin_read_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA3_ADDRHIGH(/;"	d
bfin_read_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRHIGH(/;"	d
bfin_read_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRHIGH(/;"	d
bfin_read_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRHIGH(/;"	d
bfin_read_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRHIGH(/;"	d
bfin_read_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA3_ADDRLOW(/;"	d
bfin_read_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRLOW(/;"	d
bfin_read_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRLOW(/;"	d
bfin_read_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRLOW(/;"	d
bfin_read_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA3_ADDRLOW(/;"	d
bfin_read_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA3_CONTROL(/;"	d
bfin_read_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA3_CONTROL(/;"	d
bfin_read_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA3_CONTROL(/;"	d
bfin_read_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA3_CONTROL(/;"	d
bfin_read_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA3_CONTROL(/;"	d
bfin_read_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA3_COUNTHIGH(/;"	d
bfin_read_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTHIGH(/;"	d
bfin_read_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTHIGH(/;"	d
bfin_read_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTHIGH(/;"	d
bfin_read_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTHIGH(/;"	d
bfin_read_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA3_COUNTLOW(/;"	d
bfin_read_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTLOW(/;"	d
bfin_read_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTLOW(/;"	d
bfin_read_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTLOW(/;"	d
bfin_read_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA3_COUNTLOW(/;"	d
bfin_read_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA4_ADDRHIGH(/;"	d
bfin_read_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRHIGH(/;"	d
bfin_read_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRHIGH(/;"	d
bfin_read_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRHIGH(/;"	d
bfin_read_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRHIGH(/;"	d
bfin_read_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA4_ADDRLOW(/;"	d
bfin_read_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRLOW(/;"	d
bfin_read_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRLOW(/;"	d
bfin_read_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRLOW(/;"	d
bfin_read_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA4_ADDRLOW(/;"	d
bfin_read_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA4_CONTROL(/;"	d
bfin_read_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA4_CONTROL(/;"	d
bfin_read_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA4_CONTROL(/;"	d
bfin_read_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA4_CONTROL(/;"	d
bfin_read_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA4_CONTROL(/;"	d
bfin_read_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA4_COUNTHIGH(/;"	d
bfin_read_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTHIGH(/;"	d
bfin_read_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTHIGH(/;"	d
bfin_read_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTHIGH(/;"	d
bfin_read_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTHIGH(/;"	d
bfin_read_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA4_COUNTLOW(/;"	d
bfin_read_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTLOW(/;"	d
bfin_read_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTLOW(/;"	d
bfin_read_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTLOW(/;"	d
bfin_read_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA4_COUNTLOW(/;"	d
bfin_read_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA5_ADDRHIGH(/;"	d
bfin_read_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRHIGH(/;"	d
bfin_read_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRHIGH(/;"	d
bfin_read_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRHIGH(/;"	d
bfin_read_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRHIGH(/;"	d
bfin_read_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA5_ADDRLOW(/;"	d
bfin_read_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRLOW(/;"	d
bfin_read_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRLOW(/;"	d
bfin_read_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRLOW(/;"	d
bfin_read_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA5_ADDRLOW(/;"	d
bfin_read_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA5_CONTROL(/;"	d
bfin_read_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA5_CONTROL(/;"	d
bfin_read_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA5_CONTROL(/;"	d
bfin_read_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA5_CONTROL(/;"	d
bfin_read_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA5_CONTROL(/;"	d
bfin_read_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA5_COUNTHIGH(/;"	d
bfin_read_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTHIGH(/;"	d
bfin_read_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTHIGH(/;"	d
bfin_read_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTHIGH(/;"	d
bfin_read_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTHIGH(/;"	d
bfin_read_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA5_COUNTLOW(/;"	d
bfin_read_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTLOW(/;"	d
bfin_read_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTLOW(/;"	d
bfin_read_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTLOW(/;"	d
bfin_read_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA5_COUNTLOW(/;"	d
bfin_read_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA6_ADDRHIGH(/;"	d
bfin_read_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRHIGH(/;"	d
bfin_read_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRHIGH(/;"	d
bfin_read_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRHIGH(/;"	d
bfin_read_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRHIGH(/;"	d
bfin_read_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA6_ADDRLOW(/;"	d
bfin_read_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRLOW(/;"	d
bfin_read_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRLOW(/;"	d
bfin_read_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRLOW(/;"	d
bfin_read_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA6_ADDRLOW(/;"	d
bfin_read_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA6_CONTROL(/;"	d
bfin_read_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA6_CONTROL(/;"	d
bfin_read_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA6_CONTROL(/;"	d
bfin_read_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA6_CONTROL(/;"	d
bfin_read_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA6_CONTROL(/;"	d
bfin_read_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA6_COUNTHIGH(/;"	d
bfin_read_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTHIGH(/;"	d
bfin_read_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTHIGH(/;"	d
bfin_read_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTHIGH(/;"	d
bfin_read_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTHIGH(/;"	d
bfin_read_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA6_COUNTLOW(/;"	d
bfin_read_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTLOW(/;"	d
bfin_read_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTLOW(/;"	d
bfin_read_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTLOW(/;"	d
bfin_read_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA6_COUNTLOW(/;"	d
bfin_read_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA7_ADDRHIGH(/;"	d
bfin_read_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRHIGH(/;"	d
bfin_read_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRHIGH(/;"	d
bfin_read_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRHIGH(/;"	d
bfin_read_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRHIGH(/;"	d
bfin_read_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA7_ADDRLOW(/;"	d
bfin_read_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRLOW(/;"	d
bfin_read_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRLOW(/;"	d
bfin_read_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRLOW(/;"	d
bfin_read_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA7_ADDRLOW(/;"	d
bfin_read_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA7_CONTROL(/;"	d
bfin_read_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA7_CONTROL(/;"	d
bfin_read_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA7_CONTROL(/;"	d
bfin_read_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA7_CONTROL(/;"	d
bfin_read_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA7_CONTROL(/;"	d
bfin_read_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA7_COUNTHIGH(/;"	d
bfin_read_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTHIGH(/;"	d
bfin_read_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTHIGH(/;"	d
bfin_read_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTHIGH(/;"	d
bfin_read_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTHIGH(/;"	d
bfin_read_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA7_COUNTLOW(/;"	d
bfin_read_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTLOW(/;"	d
bfin_read_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTLOW(/;"	d
bfin_read_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTLOW(/;"	d
bfin_read_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA7_COUNTLOW(/;"	d
bfin_read_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_DMA_INTERRUPT(/;"	d
bfin_read_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_DMA_INTERRUPT(/;"	d
bfin_read_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_DMA_INTERRUPT(/;"	d
bfin_read_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_DMA_INTERRUPT(/;"	d
bfin_read_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_DMA_INTERRUPT(/;"	d
bfin_read_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_USB_DMA_INTERRUPT(/;"	d
bfin_read_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP0_FIFO(/;"	d
bfin_read_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP0_FIFO(/;"	d
bfin_read_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP0_FIFO(/;"	d
bfin_read_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP0_FIFO(/;"	d
bfin_read_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP0_FIFO(/;"	d
bfin_read_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP1_FIFO(/;"	d
bfin_read_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP1_FIFO(/;"	d
bfin_read_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP1_FIFO(/;"	d
bfin_read_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP1_FIFO(/;"	d
bfin_read_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP1_FIFO(/;"	d
bfin_read_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP2_FIFO(/;"	d
bfin_read_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP2_FIFO(/;"	d
bfin_read_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP2_FIFO(/;"	d
bfin_read_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP2_FIFO(/;"	d
bfin_read_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP2_FIFO(/;"	d
bfin_read_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP3_FIFO(/;"	d
bfin_read_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP3_FIFO(/;"	d
bfin_read_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP3_FIFO(/;"	d
bfin_read_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP3_FIFO(/;"	d
bfin_read_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP3_FIFO(/;"	d
bfin_read_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP4_FIFO(/;"	d
bfin_read_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP4_FIFO(/;"	d
bfin_read_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP4_FIFO(/;"	d
bfin_read_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP4_FIFO(/;"	d
bfin_read_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP4_FIFO(/;"	d
bfin_read_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP5_FIFO(/;"	d
bfin_read_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP5_FIFO(/;"	d
bfin_read_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP5_FIFO(/;"	d
bfin_read_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP5_FIFO(/;"	d
bfin_read_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP5_FIFO(/;"	d
bfin_read_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP6_FIFO(/;"	d
bfin_read_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP6_FIFO(/;"	d
bfin_read_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP6_FIFO(/;"	d
bfin_read_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP6_FIFO(/;"	d
bfin_read_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP6_FIFO(/;"	d
bfin_read_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP7_FIFO(/;"	d
bfin_read_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP7_FIFO(/;"	d
bfin_read_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP7_FIFO(/;"	d
bfin_read_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP7_FIFO(/;"	d
bfin_read_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP7_FIFO(/;"	d
bfin_read_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCOUNT(/;"	d
bfin_read_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCOUNT(/;"	d
bfin_read_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCOUNT(/;"	d
bfin_read_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCOUNT(/;"	d
bfin_read_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCOUNT(/;"	d
bfin_read_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCSR(/;"	d
bfin_read_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCSR(/;"	d
bfin_read_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCSR(/;"	d
bfin_read_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCSR(/;"	d
bfin_read_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXCSR(/;"	d
bfin_read_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_RXMAXP(/;"	d
bfin_read_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXMAXP(/;"	d
bfin_read_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXMAXP(/;"	d
bfin_read_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXMAXP(/;"	d
bfin_read_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXMAXP(/;"	d
bfin_read_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_RXTYPE(/;"	d
bfin_read_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXTYPE(/;"	d
bfin_read_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXTYPE(/;"	d
bfin_read_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXTYPE(/;"	d
bfin_read_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_RXTYPE(/;"	d
bfin_read_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCOUNT(/;"	d
bfin_read_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCOUNT(/;"	d
bfin_read_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCOUNT(/;"	d
bfin_read_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCOUNT(/;"	d
bfin_read_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCOUNT(/;"	d
bfin_read_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCSR(/;"	d
bfin_read_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCSR(/;"	d
bfin_read_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCSR(/;"	d
bfin_read_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCSR(/;"	d
bfin_read_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXCSR(/;"	d
bfin_read_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_TXMAXP(/;"	d
bfin_read_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXMAXP(/;"	d
bfin_read_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXMAXP(/;"	d
bfin_read_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXMAXP(/;"	d
bfin_read_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXMAXP(/;"	d
bfin_read_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI0_TXTYPE(/;"	d
bfin_read_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXTYPE(/;"	d
bfin_read_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXTYPE(/;"	d
bfin_read_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXTYPE(/;"	d
bfin_read_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI0_TXTYPE(/;"	d
bfin_read_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCOUNT(/;"	d
bfin_read_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCOUNT(/;"	d
bfin_read_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCOUNT(/;"	d
bfin_read_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCOUNT(/;"	d
bfin_read_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCOUNT(/;"	d
bfin_read_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCSR(/;"	d
bfin_read_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCSR(/;"	d
bfin_read_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCSR(/;"	d
bfin_read_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCSR(/;"	d
bfin_read_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXCSR(/;"	d
bfin_read_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_RXMAXP(/;"	d
bfin_read_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXMAXP(/;"	d
bfin_read_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXMAXP(/;"	d
bfin_read_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXMAXP(/;"	d
bfin_read_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXMAXP(/;"	d
bfin_read_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_RXTYPE(/;"	d
bfin_read_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXTYPE(/;"	d
bfin_read_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXTYPE(/;"	d
bfin_read_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXTYPE(/;"	d
bfin_read_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_RXTYPE(/;"	d
bfin_read_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCOUNT(/;"	d
bfin_read_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCOUNT(/;"	d
bfin_read_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCOUNT(/;"	d
bfin_read_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCOUNT(/;"	d
bfin_read_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCOUNT(/;"	d
bfin_read_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCSR(/;"	d
bfin_read_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCSR(/;"	d
bfin_read_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCSR(/;"	d
bfin_read_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCSR(/;"	d
bfin_read_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXCSR(/;"	d
bfin_read_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_TXMAXP(/;"	d
bfin_read_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXMAXP(/;"	d
bfin_read_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXMAXP(/;"	d
bfin_read_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXMAXP(/;"	d
bfin_read_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXMAXP(/;"	d
bfin_read_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI1_TXTYPE(/;"	d
bfin_read_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXTYPE(/;"	d
bfin_read_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXTYPE(/;"	d
bfin_read_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXTYPE(/;"	d
bfin_read_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI1_TXTYPE(/;"	d
bfin_read_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCOUNT(/;"	d
bfin_read_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCOUNT(/;"	d
bfin_read_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCOUNT(/;"	d
bfin_read_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCOUNT(/;"	d
bfin_read_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCOUNT(/;"	d
bfin_read_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCSR(/;"	d
bfin_read_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCSR(/;"	d
bfin_read_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCSR(/;"	d
bfin_read_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCSR(/;"	d
bfin_read_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXCSR(/;"	d
bfin_read_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_RXMAXP(/;"	d
bfin_read_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXMAXP(/;"	d
bfin_read_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXMAXP(/;"	d
bfin_read_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXMAXP(/;"	d
bfin_read_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXMAXP(/;"	d
bfin_read_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_RXTYPE(/;"	d
bfin_read_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXTYPE(/;"	d
bfin_read_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXTYPE(/;"	d
bfin_read_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXTYPE(/;"	d
bfin_read_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_RXTYPE(/;"	d
bfin_read_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCOUNT(/;"	d
bfin_read_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCOUNT(/;"	d
bfin_read_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCOUNT(/;"	d
bfin_read_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCOUNT(/;"	d
bfin_read_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCOUNT(/;"	d
bfin_read_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCSR(/;"	d
bfin_read_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCSR(/;"	d
bfin_read_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCSR(/;"	d
bfin_read_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCSR(/;"	d
bfin_read_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXCSR(/;"	d
bfin_read_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_TXMAXP(/;"	d
bfin_read_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXMAXP(/;"	d
bfin_read_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXMAXP(/;"	d
bfin_read_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXMAXP(/;"	d
bfin_read_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXMAXP(/;"	d
bfin_read_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI2_TXTYPE(/;"	d
bfin_read_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXTYPE(/;"	d
bfin_read_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXTYPE(/;"	d
bfin_read_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXTYPE(/;"	d
bfin_read_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI2_TXTYPE(/;"	d
bfin_read_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCOUNT(/;"	d
bfin_read_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCOUNT(/;"	d
bfin_read_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCOUNT(/;"	d
bfin_read_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCOUNT(/;"	d
bfin_read_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCOUNT(/;"	d
bfin_read_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCSR(/;"	d
bfin_read_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCSR(/;"	d
bfin_read_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCSR(/;"	d
bfin_read_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCSR(/;"	d
bfin_read_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXCSR(/;"	d
bfin_read_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_RXMAXP(/;"	d
bfin_read_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXMAXP(/;"	d
bfin_read_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXMAXP(/;"	d
bfin_read_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXMAXP(/;"	d
bfin_read_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXMAXP(/;"	d
bfin_read_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_RXTYPE(/;"	d
bfin_read_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXTYPE(/;"	d
bfin_read_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXTYPE(/;"	d
bfin_read_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXTYPE(/;"	d
bfin_read_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_RXTYPE(/;"	d
bfin_read_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCOUNT(/;"	d
bfin_read_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCOUNT(/;"	d
bfin_read_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCOUNT(/;"	d
bfin_read_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCOUNT(/;"	d
bfin_read_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCOUNT(/;"	d
bfin_read_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCSR(/;"	d
bfin_read_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCSR(/;"	d
bfin_read_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCSR(/;"	d
bfin_read_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCSR(/;"	d
bfin_read_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXCSR(/;"	d
bfin_read_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_TXMAXP(/;"	d
bfin_read_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXMAXP(/;"	d
bfin_read_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXMAXP(/;"	d
bfin_read_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXMAXP(/;"	d
bfin_read_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXMAXP(/;"	d
bfin_read_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI3_TXTYPE(/;"	d
bfin_read_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXTYPE(/;"	d
bfin_read_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXTYPE(/;"	d
bfin_read_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXTYPE(/;"	d
bfin_read_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI3_TXTYPE(/;"	d
bfin_read_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCOUNT(/;"	d
bfin_read_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCOUNT(/;"	d
bfin_read_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCOUNT(/;"	d
bfin_read_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCOUNT(/;"	d
bfin_read_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCOUNT(/;"	d
bfin_read_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCSR(/;"	d
bfin_read_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCSR(/;"	d
bfin_read_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCSR(/;"	d
bfin_read_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCSR(/;"	d
bfin_read_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXCSR(/;"	d
bfin_read_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_RXMAXP(/;"	d
bfin_read_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXMAXP(/;"	d
bfin_read_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXMAXP(/;"	d
bfin_read_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXMAXP(/;"	d
bfin_read_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXMAXP(/;"	d
bfin_read_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_RXTYPE(/;"	d
bfin_read_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXTYPE(/;"	d
bfin_read_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXTYPE(/;"	d
bfin_read_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXTYPE(/;"	d
bfin_read_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_RXTYPE(/;"	d
bfin_read_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCOUNT(/;"	d
bfin_read_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCOUNT(/;"	d
bfin_read_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCOUNT(/;"	d
bfin_read_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCOUNT(/;"	d
bfin_read_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCOUNT(/;"	d
bfin_read_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCSR(/;"	d
bfin_read_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCSR(/;"	d
bfin_read_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCSR(/;"	d
bfin_read_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCSR(/;"	d
bfin_read_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXCSR(/;"	d
bfin_read_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_TXMAXP(/;"	d
bfin_read_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXMAXP(/;"	d
bfin_read_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXMAXP(/;"	d
bfin_read_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXMAXP(/;"	d
bfin_read_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXMAXP(/;"	d
bfin_read_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI4_TXTYPE(/;"	d
bfin_read_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXTYPE(/;"	d
bfin_read_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXTYPE(/;"	d
bfin_read_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXTYPE(/;"	d
bfin_read_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI4_TXTYPE(/;"	d
bfin_read_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCOUNT(/;"	d
bfin_read_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCOUNT(/;"	d
bfin_read_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCOUNT(/;"	d
bfin_read_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCOUNT(/;"	d
bfin_read_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCOUNT(/;"	d
bfin_read_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCSR(/;"	d
bfin_read_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCSR(/;"	d
bfin_read_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCSR(/;"	d
bfin_read_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCSR(/;"	d
bfin_read_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXCSR(/;"	d
bfin_read_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_RXMAXP(/;"	d
bfin_read_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXMAXP(/;"	d
bfin_read_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXMAXP(/;"	d
bfin_read_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXMAXP(/;"	d
bfin_read_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXMAXP(/;"	d
bfin_read_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_RXTYPE(/;"	d
bfin_read_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXTYPE(/;"	d
bfin_read_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXTYPE(/;"	d
bfin_read_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXTYPE(/;"	d
bfin_read_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_RXTYPE(/;"	d
bfin_read_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCOUNT(/;"	d
bfin_read_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCOUNT(/;"	d
bfin_read_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCOUNT(/;"	d
bfin_read_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCOUNT(/;"	d
bfin_read_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCOUNT(/;"	d
bfin_read_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCSR(/;"	d
bfin_read_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCSR(/;"	d
bfin_read_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCSR(/;"	d
bfin_read_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCSR(/;"	d
bfin_read_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXCSR(/;"	d
bfin_read_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_TXMAXP(/;"	d
bfin_read_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXMAXP(/;"	d
bfin_read_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXMAXP(/;"	d
bfin_read_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXMAXP(/;"	d
bfin_read_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXMAXP(/;"	d
bfin_read_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI5_TXTYPE(/;"	d
bfin_read_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXTYPE(/;"	d
bfin_read_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXTYPE(/;"	d
bfin_read_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXTYPE(/;"	d
bfin_read_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI5_TXTYPE(/;"	d
bfin_read_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCOUNT(/;"	d
bfin_read_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCOUNT(/;"	d
bfin_read_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCOUNT(/;"	d
bfin_read_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCOUNT(/;"	d
bfin_read_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCOUNT(/;"	d
bfin_read_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCSR(/;"	d
bfin_read_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCSR(/;"	d
bfin_read_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCSR(/;"	d
bfin_read_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCSR(/;"	d
bfin_read_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXCSR(/;"	d
bfin_read_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_RXMAXP(/;"	d
bfin_read_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXMAXP(/;"	d
bfin_read_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXMAXP(/;"	d
bfin_read_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXMAXP(/;"	d
bfin_read_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXMAXP(/;"	d
bfin_read_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_RXTYPE(/;"	d
bfin_read_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXTYPE(/;"	d
bfin_read_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXTYPE(/;"	d
bfin_read_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXTYPE(/;"	d
bfin_read_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_RXTYPE(/;"	d
bfin_read_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCOUNT(/;"	d
bfin_read_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCOUNT(/;"	d
bfin_read_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCOUNT(/;"	d
bfin_read_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCOUNT(/;"	d
bfin_read_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCOUNT(/;"	d
bfin_read_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCSR(/;"	d
bfin_read_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCSR(/;"	d
bfin_read_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCSR(/;"	d
bfin_read_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCSR(/;"	d
bfin_read_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXCSR(/;"	d
bfin_read_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_TXMAXP(/;"	d
bfin_read_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXMAXP(/;"	d
bfin_read_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXMAXP(/;"	d
bfin_read_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXMAXP(/;"	d
bfin_read_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXMAXP(/;"	d
bfin_read_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI6_TXTYPE(/;"	d
bfin_read_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXTYPE(/;"	d
bfin_read_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXTYPE(/;"	d
bfin_read_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXTYPE(/;"	d
bfin_read_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI6_TXTYPE(/;"	d
bfin_read_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCOUNT(/;"	d
bfin_read_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCOUNT(/;"	d
bfin_read_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCOUNT(/;"	d
bfin_read_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCOUNT(/;"	d
bfin_read_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCOUNT(/;"	d
bfin_read_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCSR(/;"	d
bfin_read_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCSR(/;"	d
bfin_read_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCSR(/;"	d
bfin_read_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCSR(/;"	d
bfin_read_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXCSR(/;"	d
bfin_read_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_RXMAXP(/;"	d
bfin_read_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXMAXP(/;"	d
bfin_read_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXMAXP(/;"	d
bfin_read_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXMAXP(/;"	d
bfin_read_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXMAXP(/;"	d
bfin_read_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_RXTYPE(/;"	d
bfin_read_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXTYPE(/;"	d
bfin_read_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXTYPE(/;"	d
bfin_read_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXTYPE(/;"	d
bfin_read_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_RXTYPE(/;"	d
bfin_read_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCOUNT(/;"	d
bfin_read_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCOUNT(/;"	d
bfin_read_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCOUNT(/;"	d
bfin_read_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCOUNT(/;"	d
bfin_read_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCOUNT(/;"	d
bfin_read_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCSR(/;"	d
bfin_read_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCSR(/;"	d
bfin_read_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCSR(/;"	d
bfin_read_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCSR(/;"	d
bfin_read_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXCSR(/;"	d
bfin_read_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_read_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_TXMAXP(/;"	d
bfin_read_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXMAXP(/;"	d
bfin_read_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXMAXP(/;"	d
bfin_read_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXMAXP(/;"	d
bfin_read_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXMAXP(/;"	d
bfin_read_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_EP_NI7_TXTYPE(/;"	d
bfin_read_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXTYPE(/;"	d
bfin_read_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXTYPE(/;"	d
bfin_read_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXTYPE(/;"	d
bfin_read_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_EP_NI7_TXTYPE(/;"	d
bfin_read_USB_FADDR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_FADDR(/;"	d
bfin_read_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_FADDR(/;"	d
bfin_read_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_FADDR(/;"	d
bfin_read_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_FADDR(/;"	d
bfin_read_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_FADDR(/;"	d
bfin_read_USB_FRAME	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_FRAME(/;"	d
bfin_read_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_FRAME(/;"	d
bfin_read_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_FRAME(/;"	d
bfin_read_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_FRAME(/;"	d
bfin_read_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_FRAME(/;"	d
bfin_read_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_FS_EOF1(/;"	d
bfin_read_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_FS_EOF1(/;"	d
bfin_read_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_FS_EOF1(/;"	d
bfin_read_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_FS_EOF1(/;"	d
bfin_read_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_FS_EOF1(/;"	d
bfin_read_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_GLOBAL_CTL(/;"	d
bfin_read_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_GLOBAL_CTL(/;"	d
bfin_read_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_GLOBAL_CTL(/;"	d
bfin_read_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_GLOBAL_CTL(/;"	d
bfin_read_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_GLOBAL_CTL(/;"	d
bfin_read_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_GLOBINTR(/;"	d
bfin_read_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_GLOBINTR(/;"	d
bfin_read_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_GLOBINTR(/;"	d
bfin_read_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_GLOBINTR(/;"	d
bfin_read_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_GLOBINTR(/;"	d
bfin_read_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_HS_EOF1(/;"	d
bfin_read_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_HS_EOF1(/;"	d
bfin_read_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_HS_EOF1(/;"	d
bfin_read_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_HS_EOF1(/;"	d
bfin_read_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_HS_EOF1(/;"	d
bfin_read_USB_INDEX	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INDEX(/;"	d
bfin_read_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INDEX(/;"	d
bfin_read_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INDEX(/;"	d
bfin_read_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INDEX(/;"	d
bfin_read_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INDEX(/;"	d
bfin_read_USB_INTRRX	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INTRRX(/;"	d
bfin_read_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INTRRX(/;"	d
bfin_read_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INTRRX(/;"	d
bfin_read_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INTRRX(/;"	d
bfin_read_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INTRRX(/;"	d
bfin_read_USB_INTRRXE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INTRRXE(/;"	d
bfin_read_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INTRRXE(/;"	d
bfin_read_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INTRRXE(/;"	d
bfin_read_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INTRRXE(/;"	d
bfin_read_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INTRRXE(/;"	d
bfin_read_USB_INTRTX	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INTRTX(/;"	d
bfin_read_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INTRTX(/;"	d
bfin_read_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INTRTX(/;"	d
bfin_read_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INTRTX(/;"	d
bfin_read_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INTRTX(/;"	d
bfin_read_USB_INTRTXE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INTRTXE(/;"	d
bfin_read_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INTRTXE(/;"	d
bfin_read_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INTRTXE(/;"	d
bfin_read_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INTRTXE(/;"	d
bfin_read_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INTRTXE(/;"	d
bfin_read_USB_INTRUSB	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INTRUSB(/;"	d
bfin_read_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INTRUSB(/;"	d
bfin_read_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INTRUSB(/;"	d
bfin_read_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INTRUSB(/;"	d
bfin_read_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INTRUSB(/;"	d
bfin_read_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_INTRUSBE(/;"	d
bfin_read_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_INTRUSBE(/;"	d
bfin_read_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_INTRUSBE(/;"	d
bfin_read_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_INTRUSBE(/;"	d
bfin_read_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_INTRUSBE(/;"	d
bfin_read_USB_LINKINFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_LINKINFO(/;"	d
bfin_read_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_LINKINFO(/;"	d
bfin_read_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_LINKINFO(/;"	d
bfin_read_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_LINKINFO(/;"	d
bfin_read_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_LINKINFO(/;"	d
bfin_read_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_LS_EOF1(/;"	d
bfin_read_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_LS_EOF1(/;"	d
bfin_read_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_LS_EOF1(/;"	d
bfin_read_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_LS_EOF1(/;"	d
bfin_read_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_LS_EOF1(/;"	d
bfin_read_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_NAKLIMIT0(/;"	d
bfin_read_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_NAKLIMIT0(/;"	d
bfin_read_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_NAKLIMIT0(/;"	d
bfin_read_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_NAKLIMIT0(/;"	d
bfin_read_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_NAKLIMIT0(/;"	d
bfin_read_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_OTG_DEV_CTL(/;"	d
bfin_read_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_OTG_DEV_CTL(/;"	d
bfin_read_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_OTG_DEV_CTL(/;"	d
bfin_read_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_OTG_DEV_CTL(/;"	d
bfin_read_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_OTG_DEV_CTL(/;"	d
bfin_read_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_OTG_VBUS_IRQ(/;"	d
bfin_read_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_IRQ(/;"	d
bfin_read_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_IRQ(/;"	d
bfin_read_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_IRQ(/;"	d
bfin_read_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_IRQ(/;"	d
bfin_read_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_OTG_VBUS_MASK(/;"	d
bfin_read_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_MASK(/;"	d
bfin_read_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_MASK(/;"	d
bfin_read_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_MASK(/;"	d
bfin_read_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_OTG_VBUS_MASK(/;"	d
bfin_read_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_PHY_TEST(/;"	d
bfin_read_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_PHY_TEST(/;"	d
bfin_read_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_PHY_TEST(/;"	d
bfin_read_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_PHY_TEST(/;"	d
bfin_read_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_PHY_TEST(/;"	d
bfin_read_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_PLLOSC_CTRL(/;"	d
bfin_read_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_PLLOSC_CTRL(/;"	d
bfin_read_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_PLLOSC_CTRL(/;"	d
bfin_read_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_PLLOSC_CTRL(/;"	d
bfin_read_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_PLLOSC_CTRL(/;"	d
bfin_read_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_USB_PLLOSC_CTRL(/;"	d
bfin_read_USB_POWER	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_POWER(/;"	d
bfin_read_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_POWER(/;"	d
bfin_read_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_POWER(/;"	d
bfin_read_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_POWER(/;"	d
bfin_read_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_POWER(/;"	d
bfin_read_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_RXCOUNT(/;"	d
bfin_read_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_RXCOUNT(/;"	d
bfin_read_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_RXCOUNT(/;"	d
bfin_read_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_RXCOUNT(/;"	d
bfin_read_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_RXCOUNT(/;"	d
bfin_read_USB_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_RXCSR(/;"	d
bfin_read_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_RXCSR(/;"	d
bfin_read_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_RXCSR(/;"	d
bfin_read_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_RXCSR(/;"	d
bfin_read_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_RXCSR(/;"	d
bfin_read_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_RXINTERVAL(/;"	d
bfin_read_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_RXINTERVAL(/;"	d
bfin_read_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_RXINTERVAL(/;"	d
bfin_read_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_RXINTERVAL(/;"	d
bfin_read_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_RXINTERVAL(/;"	d
bfin_read_USB_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_RXTYPE(/;"	d
bfin_read_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_RXTYPE(/;"	d
bfin_read_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_RXTYPE(/;"	d
bfin_read_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_RXTYPE(/;"	d
bfin_read_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_RXTYPE(/;"	d
bfin_read_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_RX_MAX_PACKET(/;"	d
bfin_read_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_RX_MAX_PACKET(/;"	d
bfin_read_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_RX_MAX_PACKET(/;"	d
bfin_read_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_RX_MAX_PACKET(/;"	d
bfin_read_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_RX_MAX_PACKET(/;"	d
bfin_read_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_SRP_CLKDIV(/;"	d
bfin_read_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_SRP_CLKDIV(/;"	d
bfin_read_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_SRP_CLKDIV(/;"	d
bfin_read_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_SRP_CLKDIV(/;"	d
bfin_read_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_SRP_CLKDIV(/;"	d
bfin_read_USB_TESTMODE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_TESTMODE(/;"	d
bfin_read_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_TESTMODE(/;"	d
bfin_read_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_TESTMODE(/;"	d
bfin_read_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_TESTMODE(/;"	d
bfin_read_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_TESTMODE(/;"	d
bfin_read_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_TXCOUNT(/;"	d
bfin_read_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_TXCOUNT(/;"	d
bfin_read_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_TXCOUNT(/;"	d
bfin_read_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_TXCOUNT(/;"	d
bfin_read_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_TXCOUNT(/;"	d
bfin_read_USB_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_TXCSR(/;"	d
bfin_read_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_TXCSR(/;"	d
bfin_read_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_TXCSR(/;"	d
bfin_read_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_TXCSR(/;"	d
bfin_read_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_TXCSR(/;"	d
bfin_read_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_TXINTERVAL(/;"	d
bfin_read_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_TXINTERVAL(/;"	d
bfin_read_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_TXINTERVAL(/;"	d
bfin_read_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_TXINTERVAL(/;"	d
bfin_read_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_TXINTERVAL(/;"	d
bfin_read_USB_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_TXTYPE(/;"	d
bfin_read_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_TXTYPE(/;"	d
bfin_read_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_TXTYPE(/;"	d
bfin_read_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_TXTYPE(/;"	d
bfin_read_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_TXTYPE(/;"	d
bfin_read_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_TX_MAX_PACKET(/;"	d
bfin_read_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_TX_MAX_PACKET(/;"	d
bfin_read_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_TX_MAX_PACKET(/;"	d
bfin_read_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_TX_MAX_PACKET(/;"	d
bfin_read_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_TX_MAX_PACKET(/;"	d
bfin_read_USB_VPLEN	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_read_USB_VPLEN(/;"	d
bfin_read_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_USB_VPLEN(/;"	d
bfin_read_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_USB_VPLEN(/;"	d
bfin_read_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_USB_VPLEN(/;"	d
bfin_read_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_USB_VPLEN(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_VR_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_VR_CTL(/;"	d
bfin_read_WDOGA_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_WDOGA_CNT(/;"	d
bfin_read_WDOGA_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_WDOGA_CTL(/;"	d
bfin_read_WDOGA_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_WDOGA_STAT(/;"	d
bfin_read_WDOGB_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_WDOGB_CNT(/;"	d
bfin_read_WDOGB_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_WDOGB_CTL(/;"	d
bfin_read_WDOGB_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_read_WDOGB_STAT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_WDOG_CNT(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_WDOG_CTL(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WDOG_STAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_read_WDOG_STAT(/;"	d
bfin_read_WPDA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPDA0(/;"	d
bfin_read_WPDA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPDA1(/;"	d
bfin_read_WPDACNT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPDACNT0(/;"	d
bfin_read_WPDACNT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPDACNT1(/;"	d
bfin_read_WPDACTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPDACTL(/;"	d
bfin_read_WPIA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIA0(/;"	d
bfin_read_WPIA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIA1(/;"	d
bfin_read_WPIA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIA2(/;"	d
bfin_read_WPIA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIA3(/;"	d
bfin_read_WPIA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIA4(/;"	d
bfin_read_WPIA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIA5(/;"	d
bfin_read_WPIACNT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACNT0(/;"	d
bfin_read_WPIACNT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACNT1(/;"	d
bfin_read_WPIACNT2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACNT2(/;"	d
bfin_read_WPIACNT3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACNT3(/;"	d
bfin_read_WPIACNT4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACNT4(/;"	d
bfin_read_WPIACNT5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACNT5(/;"	d
bfin_read_WPIACTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPIACTL(/;"	d
bfin_read_WPSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_read_WPSTAT(/;"	d
bfin_read_emudat	arch/blackfin/cpu/jtag-console.c	/^static inline uint32_t bfin_read_emudat(void)$/;"	f	typeref:typename:uint32_t	file:
bfin_reset	arch/blackfin/cpu/reset.c	/^static void bfin_reset(void)$/;"	f	typeref:typename:void	file:
bfin_reset_boot_spi_cs	arch/blackfin/cpu/gpio.c	/^void bfin_reset_boot_spi_cs(unsigned short pin)$/;"	f	typeref:typename:void
bfin_revid	arch/blackfin/include/asm/blackfin_local.h	/^# define bfin_revid(/;"	d
bfin_sdh_init	drivers/mmc/bfin_sdh.c	/^static int bfin_sdh_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
bfin_sdh_request	drivers/mmc/bfin_sdh.c	/^static int bfin_sdh_request(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
bfin_sdh_set_ios	drivers/mmc/bfin_sdh.c	/^static void bfin_sdh_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
bfin_serial_initialize	drivers/serial/serial_bfin.c	/^void bfin_serial_initialize(void)$/;"	f	typeref:typename:void
bfin_serial_mem_device	drivers/serial/serial_bfin.c	/^struct serial_device bfin_serial_mem_device = {$/;"	v	typeref:struct:serial_device
bfin_set_piomode	drivers/block/pata_bfin.c	/^static void bfin_set_piomode(struct ata_port *ap, int pio_mode)$/;"	f	typeref:typename:void	file:
bfin_softreset	drivers/block/pata_bfin.c	/^static int bfin_softreset(struct ata_port *ap)$/;"	f	typeref:typename:int	file:
bfin_spi_regs	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^struct bfin_spi_regs {$/;"	s
bfin_spi_slave	drivers/spi/bfin_spi.c	/^struct bfin_spi_slave {$/;"	s	file:
bfin_spi_slave	drivers/spi/bfin_spi6xx.c	/^struct bfin_spi_slave {$/;"	s	file:
bfin_wait_for_irq	drivers/block/pata_bfin.c	/^static u8 bfin_wait_for_irq(struct ata_port *ap, unsigned int max)$/;"	f	typeref:typename:u8	file:
bfin_write	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_write(/;"	d
bfin_write16	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_write16(/;"	d
bfin_write32	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_write32(/;"	d
bfin_write8	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_write8(/;"	d
bfin_writePTR	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_writePTR(/;"	d
bfin_write_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_CONTROL(/;"	d
bfin_write_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_CONTROL(/;"	d
bfin_write_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_CONTROL(/;"	d
bfin_write_ATAPI_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_CONTROL(/;"	d
bfin_write_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_ADDR(/;"	d
bfin_write_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_ADDR(/;"	d
bfin_write_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_ADDR(/;"	d
bfin_write_ATAPI_DEV_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_ADDR(/;"	d
bfin_write_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_RXBUF(/;"	d
bfin_write_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_RXBUF(/;"	d
bfin_write_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_RXBUF(/;"	d
bfin_write_ATAPI_DEV_RXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_RXBUF(/;"	d
bfin_write_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_TXBUF(/;"	d
bfin_write_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_TXBUF(/;"	d
bfin_write_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_TXBUF(/;"	d
bfin_write_ATAPI_DEV_TXBUF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_DEV_TXBUF(/;"	d
bfin_write_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_DMA_TFRCNT(/;"	d
bfin_write_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_DMA_TFRCNT(/;"	d
bfin_write_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_DMA_TFRCNT(/;"	d
bfin_write_ATAPI_DMA_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_DMA_TFRCNT(/;"	d
bfin_write_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_INT_MASK(/;"	d
bfin_write_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_INT_MASK(/;"	d
bfin_write_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_INT_MASK(/;"	d
bfin_write_ATAPI_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_INT_MASK(/;"	d
bfin_write_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_INT_STATUS(/;"	d
bfin_write_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_INT_STATUS(/;"	d
bfin_write_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_INT_STATUS(/;"	d
bfin_write_ATAPI_INT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_INT_STATUS(/;"	d
bfin_write_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_LINE_STATUS(/;"	d
bfin_write_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_LINE_STATUS(/;"	d
bfin_write_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_LINE_STATUS(/;"	d
bfin_write_ATAPI_LINE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_LINE_STATUS(/;"	d
bfin_write_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_0(/;"	d
bfin_write_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_0(/;"	d
bfin_write_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_0(/;"	d
bfin_write_ATAPI_MULTI_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_0(/;"	d
bfin_write_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_1(/;"	d
bfin_write_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_1(/;"	d
bfin_write_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_1(/;"	d
bfin_write_ATAPI_MULTI_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_1(/;"	d
bfin_write_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_2(/;"	d
bfin_write_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_2(/;"	d
bfin_write_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_2(/;"	d
bfin_write_ATAPI_MULTI_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_MULTI_TIM_2(/;"	d
bfin_write_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TFRCNT(/;"	d
bfin_write_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TFRCNT(/;"	d
bfin_write_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TFRCNT(/;"	d
bfin_write_ATAPI_PIO_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TFRCNT(/;"	d
bfin_write_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_0(/;"	d
bfin_write_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_0(/;"	d
bfin_write_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_0(/;"	d
bfin_write_ATAPI_PIO_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_0(/;"	d
bfin_write_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_1(/;"	d
bfin_write_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_1(/;"	d
bfin_write_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_1(/;"	d
bfin_write_ATAPI_PIO_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_PIO_TIM_1(/;"	d
bfin_write_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_REG_TIM_0(/;"	d
bfin_write_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_REG_TIM_0(/;"	d
bfin_write_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_REG_TIM_0(/;"	d
bfin_write_ATAPI_REG_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_REG_TIM_0(/;"	d
bfin_write_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_SM_STATE(/;"	d
bfin_write_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_SM_STATE(/;"	d
bfin_write_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_SM_STATE(/;"	d
bfin_write_ATAPI_SM_STATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_SM_STATE(/;"	d
bfin_write_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_STATUS(/;"	d
bfin_write_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_STATUS(/;"	d
bfin_write_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_STATUS(/;"	d
bfin_write_ATAPI_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_STATUS(/;"	d
bfin_write_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_TERMINATE(/;"	d
bfin_write_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_TERMINATE(/;"	d
bfin_write_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_TERMINATE(/;"	d
bfin_write_ATAPI_TERMINATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_TERMINATE(/;"	d
bfin_write_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_write_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_write_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_write_ATAPI_UDMAOUT_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_UDMAOUT_TFRCNT(/;"	d
bfin_write_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_0(/;"	d
bfin_write_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_0(/;"	d
bfin_write_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_0(/;"	d
bfin_write_ATAPI_ULTRA_TIM_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_0(/;"	d
bfin_write_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_1(/;"	d
bfin_write_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_1(/;"	d
bfin_write_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_1(/;"	d
bfin_write_ATAPI_ULTRA_TIM_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_1(/;"	d
bfin_write_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_2(/;"	d
bfin_write_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_2(/;"	d
bfin_write_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_2(/;"	d
bfin_write_ATAPI_ULTRA_TIM_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_2(/;"	d
bfin_write_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_3(/;"	d
bfin_write_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_3(/;"	d
bfin_write_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_3(/;"	d
bfin_write_ATAPI_ULTRA_TIM_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_ULTRA_TIM_3(/;"	d
bfin_write_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_write_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_write_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_write_ATAPI_UMAIN_TFRCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_UMAIN_TFRCNT(/;"	d
bfin_write_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_ATAPI_XFER_LEN(/;"	d
bfin_write_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_ATAPI_XFER_LEN(/;"	d
bfin_write_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_ATAPI_XFER_LEN(/;"	d
bfin_write_ATAPI_XFER_LEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_ATAPI_XFER_LEN(/;"	d
bfin_write_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AA1(/;"	d
bfin_write_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AA1(/;"	d
bfin_write_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AA1(/;"	d
bfin_write_CAN0_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AA1(/;"	d
bfin_write_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AA2(/;"	d
bfin_write_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AA2(/;"	d
bfin_write_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AA2(/;"	d
bfin_write_CAN0_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AA2(/;"	d
bfin_write_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM00H(/;"	d
bfin_write_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM00H(/;"	d
bfin_write_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM00H(/;"	d
bfin_write_CAN0_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM00H(/;"	d
bfin_write_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM00L(/;"	d
bfin_write_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM00L(/;"	d
bfin_write_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM00L(/;"	d
bfin_write_CAN0_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM00L(/;"	d
bfin_write_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM01H(/;"	d
bfin_write_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM01H(/;"	d
bfin_write_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM01H(/;"	d
bfin_write_CAN0_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM01H(/;"	d
bfin_write_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM01L(/;"	d
bfin_write_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM01L(/;"	d
bfin_write_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM01L(/;"	d
bfin_write_CAN0_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM01L(/;"	d
bfin_write_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM02H(/;"	d
bfin_write_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM02H(/;"	d
bfin_write_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM02H(/;"	d
bfin_write_CAN0_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM02H(/;"	d
bfin_write_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM02L(/;"	d
bfin_write_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM02L(/;"	d
bfin_write_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM02L(/;"	d
bfin_write_CAN0_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM02L(/;"	d
bfin_write_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM03H(/;"	d
bfin_write_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM03H(/;"	d
bfin_write_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM03H(/;"	d
bfin_write_CAN0_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM03H(/;"	d
bfin_write_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM03L(/;"	d
bfin_write_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM03L(/;"	d
bfin_write_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM03L(/;"	d
bfin_write_CAN0_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM03L(/;"	d
bfin_write_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM04H(/;"	d
bfin_write_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM04H(/;"	d
bfin_write_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM04H(/;"	d
bfin_write_CAN0_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM04H(/;"	d
bfin_write_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM04L(/;"	d
bfin_write_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM04L(/;"	d
bfin_write_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM04L(/;"	d
bfin_write_CAN0_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM04L(/;"	d
bfin_write_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM05H(/;"	d
bfin_write_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM05H(/;"	d
bfin_write_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM05H(/;"	d
bfin_write_CAN0_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM05H(/;"	d
bfin_write_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM05L(/;"	d
bfin_write_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM05L(/;"	d
bfin_write_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM05L(/;"	d
bfin_write_CAN0_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM05L(/;"	d
bfin_write_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM06H(/;"	d
bfin_write_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM06H(/;"	d
bfin_write_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM06H(/;"	d
bfin_write_CAN0_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM06H(/;"	d
bfin_write_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM06L(/;"	d
bfin_write_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM06L(/;"	d
bfin_write_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM06L(/;"	d
bfin_write_CAN0_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM06L(/;"	d
bfin_write_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM07H(/;"	d
bfin_write_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM07H(/;"	d
bfin_write_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM07H(/;"	d
bfin_write_CAN0_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM07H(/;"	d
bfin_write_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM07L(/;"	d
bfin_write_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM07L(/;"	d
bfin_write_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM07L(/;"	d
bfin_write_CAN0_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM07L(/;"	d
bfin_write_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM08H(/;"	d
bfin_write_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM08H(/;"	d
bfin_write_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM08H(/;"	d
bfin_write_CAN0_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM08H(/;"	d
bfin_write_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM08L(/;"	d
bfin_write_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM08L(/;"	d
bfin_write_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM08L(/;"	d
bfin_write_CAN0_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM08L(/;"	d
bfin_write_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM09H(/;"	d
bfin_write_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM09H(/;"	d
bfin_write_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM09H(/;"	d
bfin_write_CAN0_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM09H(/;"	d
bfin_write_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM09L(/;"	d
bfin_write_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM09L(/;"	d
bfin_write_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM09L(/;"	d
bfin_write_CAN0_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM09L(/;"	d
bfin_write_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM10H(/;"	d
bfin_write_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM10H(/;"	d
bfin_write_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM10H(/;"	d
bfin_write_CAN0_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM10H(/;"	d
bfin_write_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM10L(/;"	d
bfin_write_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM10L(/;"	d
bfin_write_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM10L(/;"	d
bfin_write_CAN0_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM10L(/;"	d
bfin_write_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM11H(/;"	d
bfin_write_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM11H(/;"	d
bfin_write_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM11H(/;"	d
bfin_write_CAN0_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM11H(/;"	d
bfin_write_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM11L(/;"	d
bfin_write_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM11L(/;"	d
bfin_write_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM11L(/;"	d
bfin_write_CAN0_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM11L(/;"	d
bfin_write_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM12H(/;"	d
bfin_write_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM12H(/;"	d
bfin_write_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM12H(/;"	d
bfin_write_CAN0_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM12H(/;"	d
bfin_write_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM12L(/;"	d
bfin_write_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM12L(/;"	d
bfin_write_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM12L(/;"	d
bfin_write_CAN0_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM12L(/;"	d
bfin_write_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM13H(/;"	d
bfin_write_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM13H(/;"	d
bfin_write_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM13H(/;"	d
bfin_write_CAN0_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM13H(/;"	d
bfin_write_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM13L(/;"	d
bfin_write_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM13L(/;"	d
bfin_write_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM13L(/;"	d
bfin_write_CAN0_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM13L(/;"	d
bfin_write_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM14H(/;"	d
bfin_write_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM14H(/;"	d
bfin_write_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM14H(/;"	d
bfin_write_CAN0_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM14H(/;"	d
bfin_write_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM14L(/;"	d
bfin_write_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM14L(/;"	d
bfin_write_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM14L(/;"	d
bfin_write_CAN0_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM14L(/;"	d
bfin_write_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM15H(/;"	d
bfin_write_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM15H(/;"	d
bfin_write_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM15H(/;"	d
bfin_write_CAN0_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM15H(/;"	d
bfin_write_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM15L(/;"	d
bfin_write_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM15L(/;"	d
bfin_write_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM15L(/;"	d
bfin_write_CAN0_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM15L(/;"	d
bfin_write_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM16H(/;"	d
bfin_write_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM16H(/;"	d
bfin_write_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM16H(/;"	d
bfin_write_CAN0_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM16H(/;"	d
bfin_write_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM16L(/;"	d
bfin_write_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM16L(/;"	d
bfin_write_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM16L(/;"	d
bfin_write_CAN0_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM16L(/;"	d
bfin_write_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM17H(/;"	d
bfin_write_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM17H(/;"	d
bfin_write_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM17H(/;"	d
bfin_write_CAN0_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM17H(/;"	d
bfin_write_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM17L(/;"	d
bfin_write_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM17L(/;"	d
bfin_write_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM17L(/;"	d
bfin_write_CAN0_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM17L(/;"	d
bfin_write_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM18H(/;"	d
bfin_write_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM18H(/;"	d
bfin_write_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM18H(/;"	d
bfin_write_CAN0_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM18H(/;"	d
bfin_write_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM18L(/;"	d
bfin_write_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM18L(/;"	d
bfin_write_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM18L(/;"	d
bfin_write_CAN0_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM18L(/;"	d
bfin_write_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM19H(/;"	d
bfin_write_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM19H(/;"	d
bfin_write_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM19H(/;"	d
bfin_write_CAN0_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM19H(/;"	d
bfin_write_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM19L(/;"	d
bfin_write_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM19L(/;"	d
bfin_write_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM19L(/;"	d
bfin_write_CAN0_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM19L(/;"	d
bfin_write_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM20H(/;"	d
bfin_write_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM20H(/;"	d
bfin_write_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM20H(/;"	d
bfin_write_CAN0_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM20H(/;"	d
bfin_write_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM20L(/;"	d
bfin_write_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM20L(/;"	d
bfin_write_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM20L(/;"	d
bfin_write_CAN0_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM20L(/;"	d
bfin_write_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM21H(/;"	d
bfin_write_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM21H(/;"	d
bfin_write_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM21H(/;"	d
bfin_write_CAN0_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM21H(/;"	d
bfin_write_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM21L(/;"	d
bfin_write_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM21L(/;"	d
bfin_write_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM21L(/;"	d
bfin_write_CAN0_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM21L(/;"	d
bfin_write_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM22H(/;"	d
bfin_write_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM22H(/;"	d
bfin_write_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM22H(/;"	d
bfin_write_CAN0_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM22H(/;"	d
bfin_write_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM22L(/;"	d
bfin_write_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM22L(/;"	d
bfin_write_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM22L(/;"	d
bfin_write_CAN0_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM22L(/;"	d
bfin_write_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM23H(/;"	d
bfin_write_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM23H(/;"	d
bfin_write_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM23H(/;"	d
bfin_write_CAN0_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM23H(/;"	d
bfin_write_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM23L(/;"	d
bfin_write_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM23L(/;"	d
bfin_write_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM23L(/;"	d
bfin_write_CAN0_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM23L(/;"	d
bfin_write_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM24H(/;"	d
bfin_write_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM24H(/;"	d
bfin_write_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM24H(/;"	d
bfin_write_CAN0_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM24H(/;"	d
bfin_write_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM24L(/;"	d
bfin_write_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM24L(/;"	d
bfin_write_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM24L(/;"	d
bfin_write_CAN0_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM24L(/;"	d
bfin_write_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM25H(/;"	d
bfin_write_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM25H(/;"	d
bfin_write_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM25H(/;"	d
bfin_write_CAN0_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM25H(/;"	d
bfin_write_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM25L(/;"	d
bfin_write_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM25L(/;"	d
bfin_write_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM25L(/;"	d
bfin_write_CAN0_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM25L(/;"	d
bfin_write_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM26H(/;"	d
bfin_write_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM26H(/;"	d
bfin_write_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM26H(/;"	d
bfin_write_CAN0_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM26H(/;"	d
bfin_write_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM26L(/;"	d
bfin_write_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM26L(/;"	d
bfin_write_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM26L(/;"	d
bfin_write_CAN0_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM26L(/;"	d
bfin_write_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM27H(/;"	d
bfin_write_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM27H(/;"	d
bfin_write_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM27H(/;"	d
bfin_write_CAN0_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM27H(/;"	d
bfin_write_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM27L(/;"	d
bfin_write_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM27L(/;"	d
bfin_write_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM27L(/;"	d
bfin_write_CAN0_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM27L(/;"	d
bfin_write_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM28H(/;"	d
bfin_write_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM28H(/;"	d
bfin_write_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM28H(/;"	d
bfin_write_CAN0_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM28H(/;"	d
bfin_write_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM28L(/;"	d
bfin_write_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM28L(/;"	d
bfin_write_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM28L(/;"	d
bfin_write_CAN0_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM28L(/;"	d
bfin_write_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM29H(/;"	d
bfin_write_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM29H(/;"	d
bfin_write_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM29H(/;"	d
bfin_write_CAN0_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM29H(/;"	d
bfin_write_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM29L(/;"	d
bfin_write_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM29L(/;"	d
bfin_write_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM29L(/;"	d
bfin_write_CAN0_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM29L(/;"	d
bfin_write_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM30H(/;"	d
bfin_write_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM30H(/;"	d
bfin_write_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM30H(/;"	d
bfin_write_CAN0_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM30H(/;"	d
bfin_write_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM30L(/;"	d
bfin_write_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM30L(/;"	d
bfin_write_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM30L(/;"	d
bfin_write_CAN0_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM30L(/;"	d
bfin_write_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM31H(/;"	d
bfin_write_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM31H(/;"	d
bfin_write_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM31H(/;"	d
bfin_write_CAN0_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM31H(/;"	d
bfin_write_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_AM31L(/;"	d
bfin_write_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_AM31L(/;"	d
bfin_write_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_AM31L(/;"	d
bfin_write_CAN0_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_AM31L(/;"	d
bfin_write_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_CEC(/;"	d
bfin_write_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_CEC(/;"	d
bfin_write_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_CEC(/;"	d
bfin_write_CAN0_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_CEC(/;"	d
bfin_write_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_CLOCK(/;"	d
bfin_write_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_CLOCK(/;"	d
bfin_write_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_CLOCK(/;"	d
bfin_write_CAN0_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_CLOCK(/;"	d
bfin_write_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_CONTROL(/;"	d
bfin_write_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_CONTROL(/;"	d
bfin_write_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_CONTROL(/;"	d
bfin_write_CAN0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_CONTROL(/;"	d
bfin_write_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_DEBUG(/;"	d
bfin_write_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_DEBUG(/;"	d
bfin_write_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_DEBUG(/;"	d
bfin_write_CAN0_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_DEBUG(/;"	d
bfin_write_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_ESR(/;"	d
bfin_write_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_ESR(/;"	d
bfin_write_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_ESR(/;"	d
bfin_write_CAN0_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_ESR(/;"	d
bfin_write_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_EWR(/;"	d
bfin_write_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_EWR(/;"	d
bfin_write_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_EWR(/;"	d
bfin_write_CAN0_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_EWR(/;"	d
bfin_write_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_GIF(/;"	d
bfin_write_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_GIF(/;"	d
bfin_write_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_GIF(/;"	d
bfin_write_CAN0_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_GIF(/;"	d
bfin_write_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_GIM(/;"	d
bfin_write_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_GIM(/;"	d
bfin_write_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_GIM(/;"	d
bfin_write_CAN0_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_GIM(/;"	d
bfin_write_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_GIS(/;"	d
bfin_write_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_GIS(/;"	d
bfin_write_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_GIS(/;"	d
bfin_write_CAN0_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_GIS(/;"	d
bfin_write_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_INTR(/;"	d
bfin_write_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_INTR(/;"	d
bfin_write_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_INTR(/;"	d
bfin_write_CAN0_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_INTR(/;"	d
bfin_write_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA0(/;"	d
bfin_write_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA0(/;"	d
bfin_write_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA0(/;"	d
bfin_write_CAN0_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA0(/;"	d
bfin_write_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA1(/;"	d
bfin_write_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA1(/;"	d
bfin_write_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA1(/;"	d
bfin_write_CAN0_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA1(/;"	d
bfin_write_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA2(/;"	d
bfin_write_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA2(/;"	d
bfin_write_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA2(/;"	d
bfin_write_CAN0_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA2(/;"	d
bfin_write_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA3(/;"	d
bfin_write_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA3(/;"	d
bfin_write_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA3(/;"	d
bfin_write_CAN0_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_DATA3(/;"	d
bfin_write_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID0(/;"	d
bfin_write_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID0(/;"	d
bfin_write_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID0(/;"	d
bfin_write_CAN0_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID0(/;"	d
bfin_write_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID1(/;"	d
bfin_write_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID1(/;"	d
bfin_write_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID1(/;"	d
bfin_write_CAN0_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_ID1(/;"	d
bfin_write_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_LENGTH(/;"	d
bfin_write_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_LENGTH(/;"	d
bfin_write_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_LENGTH(/;"	d
bfin_write_CAN0_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_LENGTH(/;"	d
bfin_write_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB00_TIMESTAMP(/;"	d
bfin_write_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB00_TIMESTAMP(/;"	d
bfin_write_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB00_TIMESTAMP(/;"	d
bfin_write_CAN0_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB00_TIMESTAMP(/;"	d
bfin_write_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA0(/;"	d
bfin_write_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA0(/;"	d
bfin_write_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA0(/;"	d
bfin_write_CAN0_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA0(/;"	d
bfin_write_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA1(/;"	d
bfin_write_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA1(/;"	d
bfin_write_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA1(/;"	d
bfin_write_CAN0_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA1(/;"	d
bfin_write_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA2(/;"	d
bfin_write_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA2(/;"	d
bfin_write_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA2(/;"	d
bfin_write_CAN0_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA2(/;"	d
bfin_write_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA3(/;"	d
bfin_write_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA3(/;"	d
bfin_write_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA3(/;"	d
bfin_write_CAN0_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_DATA3(/;"	d
bfin_write_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID0(/;"	d
bfin_write_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID0(/;"	d
bfin_write_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID0(/;"	d
bfin_write_CAN0_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID0(/;"	d
bfin_write_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID1(/;"	d
bfin_write_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID1(/;"	d
bfin_write_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID1(/;"	d
bfin_write_CAN0_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_ID1(/;"	d
bfin_write_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_LENGTH(/;"	d
bfin_write_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_LENGTH(/;"	d
bfin_write_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_LENGTH(/;"	d
bfin_write_CAN0_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_LENGTH(/;"	d
bfin_write_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB01_TIMESTAMP(/;"	d
bfin_write_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB01_TIMESTAMP(/;"	d
bfin_write_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB01_TIMESTAMP(/;"	d
bfin_write_CAN0_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB01_TIMESTAMP(/;"	d
bfin_write_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA0(/;"	d
bfin_write_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA0(/;"	d
bfin_write_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA0(/;"	d
bfin_write_CAN0_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA0(/;"	d
bfin_write_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA1(/;"	d
bfin_write_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA1(/;"	d
bfin_write_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA1(/;"	d
bfin_write_CAN0_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA1(/;"	d
bfin_write_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA2(/;"	d
bfin_write_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA2(/;"	d
bfin_write_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA2(/;"	d
bfin_write_CAN0_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA2(/;"	d
bfin_write_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA3(/;"	d
bfin_write_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA3(/;"	d
bfin_write_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA3(/;"	d
bfin_write_CAN0_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_DATA3(/;"	d
bfin_write_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID0(/;"	d
bfin_write_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID0(/;"	d
bfin_write_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID0(/;"	d
bfin_write_CAN0_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID0(/;"	d
bfin_write_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID1(/;"	d
bfin_write_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID1(/;"	d
bfin_write_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID1(/;"	d
bfin_write_CAN0_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_ID1(/;"	d
bfin_write_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_LENGTH(/;"	d
bfin_write_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_LENGTH(/;"	d
bfin_write_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_LENGTH(/;"	d
bfin_write_CAN0_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_LENGTH(/;"	d
bfin_write_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB02_TIMESTAMP(/;"	d
bfin_write_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB02_TIMESTAMP(/;"	d
bfin_write_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB02_TIMESTAMP(/;"	d
bfin_write_CAN0_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB02_TIMESTAMP(/;"	d
bfin_write_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA0(/;"	d
bfin_write_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA0(/;"	d
bfin_write_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA0(/;"	d
bfin_write_CAN0_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA0(/;"	d
bfin_write_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA1(/;"	d
bfin_write_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA1(/;"	d
bfin_write_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA1(/;"	d
bfin_write_CAN0_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA1(/;"	d
bfin_write_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA2(/;"	d
bfin_write_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA2(/;"	d
bfin_write_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA2(/;"	d
bfin_write_CAN0_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA2(/;"	d
bfin_write_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA3(/;"	d
bfin_write_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA3(/;"	d
bfin_write_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA3(/;"	d
bfin_write_CAN0_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_DATA3(/;"	d
bfin_write_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID0(/;"	d
bfin_write_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID0(/;"	d
bfin_write_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID0(/;"	d
bfin_write_CAN0_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID0(/;"	d
bfin_write_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID1(/;"	d
bfin_write_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID1(/;"	d
bfin_write_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID1(/;"	d
bfin_write_CAN0_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_ID1(/;"	d
bfin_write_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_LENGTH(/;"	d
bfin_write_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_LENGTH(/;"	d
bfin_write_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_LENGTH(/;"	d
bfin_write_CAN0_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_LENGTH(/;"	d
bfin_write_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB03_TIMESTAMP(/;"	d
bfin_write_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB03_TIMESTAMP(/;"	d
bfin_write_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB03_TIMESTAMP(/;"	d
bfin_write_CAN0_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB03_TIMESTAMP(/;"	d
bfin_write_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA0(/;"	d
bfin_write_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA0(/;"	d
bfin_write_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA0(/;"	d
bfin_write_CAN0_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA0(/;"	d
bfin_write_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA1(/;"	d
bfin_write_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA1(/;"	d
bfin_write_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA1(/;"	d
bfin_write_CAN0_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA1(/;"	d
bfin_write_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA2(/;"	d
bfin_write_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA2(/;"	d
bfin_write_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA2(/;"	d
bfin_write_CAN0_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA2(/;"	d
bfin_write_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA3(/;"	d
bfin_write_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA3(/;"	d
bfin_write_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA3(/;"	d
bfin_write_CAN0_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_DATA3(/;"	d
bfin_write_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID0(/;"	d
bfin_write_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID0(/;"	d
bfin_write_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID0(/;"	d
bfin_write_CAN0_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID0(/;"	d
bfin_write_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID1(/;"	d
bfin_write_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID1(/;"	d
bfin_write_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID1(/;"	d
bfin_write_CAN0_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_ID1(/;"	d
bfin_write_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_LENGTH(/;"	d
bfin_write_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_LENGTH(/;"	d
bfin_write_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_LENGTH(/;"	d
bfin_write_CAN0_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_LENGTH(/;"	d
bfin_write_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB04_TIMESTAMP(/;"	d
bfin_write_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB04_TIMESTAMP(/;"	d
bfin_write_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB04_TIMESTAMP(/;"	d
bfin_write_CAN0_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB04_TIMESTAMP(/;"	d
bfin_write_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA0(/;"	d
bfin_write_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA0(/;"	d
bfin_write_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA0(/;"	d
bfin_write_CAN0_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA0(/;"	d
bfin_write_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA1(/;"	d
bfin_write_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA1(/;"	d
bfin_write_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA1(/;"	d
bfin_write_CAN0_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA1(/;"	d
bfin_write_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA2(/;"	d
bfin_write_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA2(/;"	d
bfin_write_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA2(/;"	d
bfin_write_CAN0_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA2(/;"	d
bfin_write_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA3(/;"	d
bfin_write_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA3(/;"	d
bfin_write_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA3(/;"	d
bfin_write_CAN0_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_DATA3(/;"	d
bfin_write_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID0(/;"	d
bfin_write_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID0(/;"	d
bfin_write_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID0(/;"	d
bfin_write_CAN0_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID0(/;"	d
bfin_write_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID1(/;"	d
bfin_write_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID1(/;"	d
bfin_write_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID1(/;"	d
bfin_write_CAN0_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_ID1(/;"	d
bfin_write_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_LENGTH(/;"	d
bfin_write_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_LENGTH(/;"	d
bfin_write_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_LENGTH(/;"	d
bfin_write_CAN0_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_LENGTH(/;"	d
bfin_write_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB05_TIMESTAMP(/;"	d
bfin_write_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB05_TIMESTAMP(/;"	d
bfin_write_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB05_TIMESTAMP(/;"	d
bfin_write_CAN0_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB05_TIMESTAMP(/;"	d
bfin_write_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA0(/;"	d
bfin_write_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA0(/;"	d
bfin_write_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA0(/;"	d
bfin_write_CAN0_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA0(/;"	d
bfin_write_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA1(/;"	d
bfin_write_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA1(/;"	d
bfin_write_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA1(/;"	d
bfin_write_CAN0_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA1(/;"	d
bfin_write_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA2(/;"	d
bfin_write_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA2(/;"	d
bfin_write_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA2(/;"	d
bfin_write_CAN0_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA2(/;"	d
bfin_write_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA3(/;"	d
bfin_write_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA3(/;"	d
bfin_write_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA3(/;"	d
bfin_write_CAN0_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_DATA3(/;"	d
bfin_write_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID0(/;"	d
bfin_write_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID0(/;"	d
bfin_write_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID0(/;"	d
bfin_write_CAN0_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID0(/;"	d
bfin_write_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID1(/;"	d
bfin_write_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID1(/;"	d
bfin_write_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID1(/;"	d
bfin_write_CAN0_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_ID1(/;"	d
bfin_write_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_LENGTH(/;"	d
bfin_write_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_LENGTH(/;"	d
bfin_write_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_LENGTH(/;"	d
bfin_write_CAN0_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_LENGTH(/;"	d
bfin_write_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB06_TIMESTAMP(/;"	d
bfin_write_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB06_TIMESTAMP(/;"	d
bfin_write_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB06_TIMESTAMP(/;"	d
bfin_write_CAN0_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB06_TIMESTAMP(/;"	d
bfin_write_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA0(/;"	d
bfin_write_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA0(/;"	d
bfin_write_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA0(/;"	d
bfin_write_CAN0_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA0(/;"	d
bfin_write_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA1(/;"	d
bfin_write_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA1(/;"	d
bfin_write_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA1(/;"	d
bfin_write_CAN0_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA1(/;"	d
bfin_write_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA2(/;"	d
bfin_write_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA2(/;"	d
bfin_write_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA2(/;"	d
bfin_write_CAN0_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA2(/;"	d
bfin_write_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA3(/;"	d
bfin_write_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA3(/;"	d
bfin_write_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA3(/;"	d
bfin_write_CAN0_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_DATA3(/;"	d
bfin_write_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID0(/;"	d
bfin_write_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID0(/;"	d
bfin_write_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID0(/;"	d
bfin_write_CAN0_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID0(/;"	d
bfin_write_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID1(/;"	d
bfin_write_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID1(/;"	d
bfin_write_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID1(/;"	d
bfin_write_CAN0_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_ID1(/;"	d
bfin_write_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_LENGTH(/;"	d
bfin_write_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_LENGTH(/;"	d
bfin_write_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_LENGTH(/;"	d
bfin_write_CAN0_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_LENGTH(/;"	d
bfin_write_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB07_TIMESTAMP(/;"	d
bfin_write_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB07_TIMESTAMP(/;"	d
bfin_write_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB07_TIMESTAMP(/;"	d
bfin_write_CAN0_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB07_TIMESTAMP(/;"	d
bfin_write_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA0(/;"	d
bfin_write_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA0(/;"	d
bfin_write_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA0(/;"	d
bfin_write_CAN0_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA0(/;"	d
bfin_write_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA1(/;"	d
bfin_write_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA1(/;"	d
bfin_write_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA1(/;"	d
bfin_write_CAN0_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA1(/;"	d
bfin_write_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA2(/;"	d
bfin_write_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA2(/;"	d
bfin_write_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA2(/;"	d
bfin_write_CAN0_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA2(/;"	d
bfin_write_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA3(/;"	d
bfin_write_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA3(/;"	d
bfin_write_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA3(/;"	d
bfin_write_CAN0_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_DATA3(/;"	d
bfin_write_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID0(/;"	d
bfin_write_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID0(/;"	d
bfin_write_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID0(/;"	d
bfin_write_CAN0_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID0(/;"	d
bfin_write_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID1(/;"	d
bfin_write_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID1(/;"	d
bfin_write_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID1(/;"	d
bfin_write_CAN0_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_ID1(/;"	d
bfin_write_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_LENGTH(/;"	d
bfin_write_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_LENGTH(/;"	d
bfin_write_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_LENGTH(/;"	d
bfin_write_CAN0_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_LENGTH(/;"	d
bfin_write_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB08_TIMESTAMP(/;"	d
bfin_write_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB08_TIMESTAMP(/;"	d
bfin_write_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB08_TIMESTAMP(/;"	d
bfin_write_CAN0_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB08_TIMESTAMP(/;"	d
bfin_write_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA0(/;"	d
bfin_write_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA0(/;"	d
bfin_write_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA0(/;"	d
bfin_write_CAN0_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA0(/;"	d
bfin_write_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA1(/;"	d
bfin_write_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA1(/;"	d
bfin_write_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA1(/;"	d
bfin_write_CAN0_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA1(/;"	d
bfin_write_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA2(/;"	d
bfin_write_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA2(/;"	d
bfin_write_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA2(/;"	d
bfin_write_CAN0_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA2(/;"	d
bfin_write_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA3(/;"	d
bfin_write_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA3(/;"	d
bfin_write_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA3(/;"	d
bfin_write_CAN0_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_DATA3(/;"	d
bfin_write_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID0(/;"	d
bfin_write_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID0(/;"	d
bfin_write_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID0(/;"	d
bfin_write_CAN0_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID0(/;"	d
bfin_write_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID1(/;"	d
bfin_write_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID1(/;"	d
bfin_write_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID1(/;"	d
bfin_write_CAN0_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_ID1(/;"	d
bfin_write_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_LENGTH(/;"	d
bfin_write_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_LENGTH(/;"	d
bfin_write_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_LENGTH(/;"	d
bfin_write_CAN0_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_LENGTH(/;"	d
bfin_write_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB09_TIMESTAMP(/;"	d
bfin_write_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB09_TIMESTAMP(/;"	d
bfin_write_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB09_TIMESTAMP(/;"	d
bfin_write_CAN0_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB09_TIMESTAMP(/;"	d
bfin_write_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA0(/;"	d
bfin_write_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA0(/;"	d
bfin_write_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA0(/;"	d
bfin_write_CAN0_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA0(/;"	d
bfin_write_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA1(/;"	d
bfin_write_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA1(/;"	d
bfin_write_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA1(/;"	d
bfin_write_CAN0_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA1(/;"	d
bfin_write_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA2(/;"	d
bfin_write_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA2(/;"	d
bfin_write_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA2(/;"	d
bfin_write_CAN0_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA2(/;"	d
bfin_write_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA3(/;"	d
bfin_write_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA3(/;"	d
bfin_write_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA3(/;"	d
bfin_write_CAN0_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_DATA3(/;"	d
bfin_write_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID0(/;"	d
bfin_write_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID0(/;"	d
bfin_write_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID0(/;"	d
bfin_write_CAN0_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID0(/;"	d
bfin_write_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID1(/;"	d
bfin_write_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID1(/;"	d
bfin_write_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID1(/;"	d
bfin_write_CAN0_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_ID1(/;"	d
bfin_write_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_LENGTH(/;"	d
bfin_write_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_LENGTH(/;"	d
bfin_write_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_LENGTH(/;"	d
bfin_write_CAN0_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_LENGTH(/;"	d
bfin_write_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB10_TIMESTAMP(/;"	d
bfin_write_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB10_TIMESTAMP(/;"	d
bfin_write_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB10_TIMESTAMP(/;"	d
bfin_write_CAN0_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB10_TIMESTAMP(/;"	d
bfin_write_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA0(/;"	d
bfin_write_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA0(/;"	d
bfin_write_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA0(/;"	d
bfin_write_CAN0_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA0(/;"	d
bfin_write_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA1(/;"	d
bfin_write_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA1(/;"	d
bfin_write_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA1(/;"	d
bfin_write_CAN0_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA1(/;"	d
bfin_write_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA2(/;"	d
bfin_write_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA2(/;"	d
bfin_write_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA2(/;"	d
bfin_write_CAN0_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA2(/;"	d
bfin_write_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA3(/;"	d
bfin_write_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA3(/;"	d
bfin_write_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA3(/;"	d
bfin_write_CAN0_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_DATA3(/;"	d
bfin_write_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID0(/;"	d
bfin_write_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID0(/;"	d
bfin_write_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID0(/;"	d
bfin_write_CAN0_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID0(/;"	d
bfin_write_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID1(/;"	d
bfin_write_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID1(/;"	d
bfin_write_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID1(/;"	d
bfin_write_CAN0_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_ID1(/;"	d
bfin_write_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_LENGTH(/;"	d
bfin_write_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_LENGTH(/;"	d
bfin_write_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_LENGTH(/;"	d
bfin_write_CAN0_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_LENGTH(/;"	d
bfin_write_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB11_TIMESTAMP(/;"	d
bfin_write_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB11_TIMESTAMP(/;"	d
bfin_write_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB11_TIMESTAMP(/;"	d
bfin_write_CAN0_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB11_TIMESTAMP(/;"	d
bfin_write_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA0(/;"	d
bfin_write_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA0(/;"	d
bfin_write_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA0(/;"	d
bfin_write_CAN0_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA0(/;"	d
bfin_write_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA1(/;"	d
bfin_write_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA1(/;"	d
bfin_write_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA1(/;"	d
bfin_write_CAN0_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA1(/;"	d
bfin_write_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA2(/;"	d
bfin_write_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA2(/;"	d
bfin_write_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA2(/;"	d
bfin_write_CAN0_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA2(/;"	d
bfin_write_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA3(/;"	d
bfin_write_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA3(/;"	d
bfin_write_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA3(/;"	d
bfin_write_CAN0_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_DATA3(/;"	d
bfin_write_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID0(/;"	d
bfin_write_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID0(/;"	d
bfin_write_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID0(/;"	d
bfin_write_CAN0_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID0(/;"	d
bfin_write_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID1(/;"	d
bfin_write_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID1(/;"	d
bfin_write_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID1(/;"	d
bfin_write_CAN0_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_ID1(/;"	d
bfin_write_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_LENGTH(/;"	d
bfin_write_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_LENGTH(/;"	d
bfin_write_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_LENGTH(/;"	d
bfin_write_CAN0_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_LENGTH(/;"	d
bfin_write_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB12_TIMESTAMP(/;"	d
bfin_write_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB12_TIMESTAMP(/;"	d
bfin_write_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB12_TIMESTAMP(/;"	d
bfin_write_CAN0_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB12_TIMESTAMP(/;"	d
bfin_write_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA0(/;"	d
bfin_write_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA0(/;"	d
bfin_write_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA0(/;"	d
bfin_write_CAN0_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA0(/;"	d
bfin_write_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA1(/;"	d
bfin_write_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA1(/;"	d
bfin_write_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA1(/;"	d
bfin_write_CAN0_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA1(/;"	d
bfin_write_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA2(/;"	d
bfin_write_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA2(/;"	d
bfin_write_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA2(/;"	d
bfin_write_CAN0_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA2(/;"	d
bfin_write_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA3(/;"	d
bfin_write_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA3(/;"	d
bfin_write_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA3(/;"	d
bfin_write_CAN0_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_DATA3(/;"	d
bfin_write_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID0(/;"	d
bfin_write_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID0(/;"	d
bfin_write_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID0(/;"	d
bfin_write_CAN0_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID0(/;"	d
bfin_write_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID1(/;"	d
bfin_write_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID1(/;"	d
bfin_write_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID1(/;"	d
bfin_write_CAN0_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_ID1(/;"	d
bfin_write_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_LENGTH(/;"	d
bfin_write_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_LENGTH(/;"	d
bfin_write_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_LENGTH(/;"	d
bfin_write_CAN0_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_LENGTH(/;"	d
bfin_write_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB13_TIMESTAMP(/;"	d
bfin_write_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB13_TIMESTAMP(/;"	d
bfin_write_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB13_TIMESTAMP(/;"	d
bfin_write_CAN0_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB13_TIMESTAMP(/;"	d
bfin_write_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA0(/;"	d
bfin_write_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA0(/;"	d
bfin_write_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA0(/;"	d
bfin_write_CAN0_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA0(/;"	d
bfin_write_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA1(/;"	d
bfin_write_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA1(/;"	d
bfin_write_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA1(/;"	d
bfin_write_CAN0_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA1(/;"	d
bfin_write_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA2(/;"	d
bfin_write_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA2(/;"	d
bfin_write_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA2(/;"	d
bfin_write_CAN0_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA2(/;"	d
bfin_write_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA3(/;"	d
bfin_write_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA3(/;"	d
bfin_write_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA3(/;"	d
bfin_write_CAN0_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_DATA3(/;"	d
bfin_write_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID0(/;"	d
bfin_write_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID0(/;"	d
bfin_write_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID0(/;"	d
bfin_write_CAN0_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID0(/;"	d
bfin_write_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID1(/;"	d
bfin_write_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID1(/;"	d
bfin_write_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID1(/;"	d
bfin_write_CAN0_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_ID1(/;"	d
bfin_write_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_LENGTH(/;"	d
bfin_write_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_LENGTH(/;"	d
bfin_write_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_LENGTH(/;"	d
bfin_write_CAN0_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_LENGTH(/;"	d
bfin_write_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB14_TIMESTAMP(/;"	d
bfin_write_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB14_TIMESTAMP(/;"	d
bfin_write_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB14_TIMESTAMP(/;"	d
bfin_write_CAN0_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB14_TIMESTAMP(/;"	d
bfin_write_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA0(/;"	d
bfin_write_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA0(/;"	d
bfin_write_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA0(/;"	d
bfin_write_CAN0_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA0(/;"	d
bfin_write_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA1(/;"	d
bfin_write_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA1(/;"	d
bfin_write_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA1(/;"	d
bfin_write_CAN0_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA1(/;"	d
bfin_write_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA2(/;"	d
bfin_write_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA2(/;"	d
bfin_write_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA2(/;"	d
bfin_write_CAN0_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA2(/;"	d
bfin_write_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA3(/;"	d
bfin_write_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA3(/;"	d
bfin_write_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA3(/;"	d
bfin_write_CAN0_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_DATA3(/;"	d
bfin_write_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID0(/;"	d
bfin_write_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID0(/;"	d
bfin_write_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID0(/;"	d
bfin_write_CAN0_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID0(/;"	d
bfin_write_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID1(/;"	d
bfin_write_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID1(/;"	d
bfin_write_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID1(/;"	d
bfin_write_CAN0_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_ID1(/;"	d
bfin_write_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_LENGTH(/;"	d
bfin_write_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_LENGTH(/;"	d
bfin_write_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_LENGTH(/;"	d
bfin_write_CAN0_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_LENGTH(/;"	d
bfin_write_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB15_TIMESTAMP(/;"	d
bfin_write_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB15_TIMESTAMP(/;"	d
bfin_write_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB15_TIMESTAMP(/;"	d
bfin_write_CAN0_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB15_TIMESTAMP(/;"	d
bfin_write_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA0(/;"	d
bfin_write_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA0(/;"	d
bfin_write_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA0(/;"	d
bfin_write_CAN0_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA0(/;"	d
bfin_write_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA1(/;"	d
bfin_write_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA1(/;"	d
bfin_write_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA1(/;"	d
bfin_write_CAN0_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA1(/;"	d
bfin_write_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA2(/;"	d
bfin_write_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA2(/;"	d
bfin_write_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA2(/;"	d
bfin_write_CAN0_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA2(/;"	d
bfin_write_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA3(/;"	d
bfin_write_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA3(/;"	d
bfin_write_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA3(/;"	d
bfin_write_CAN0_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_DATA3(/;"	d
bfin_write_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID0(/;"	d
bfin_write_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID0(/;"	d
bfin_write_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID0(/;"	d
bfin_write_CAN0_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID0(/;"	d
bfin_write_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID1(/;"	d
bfin_write_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID1(/;"	d
bfin_write_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID1(/;"	d
bfin_write_CAN0_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_ID1(/;"	d
bfin_write_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_LENGTH(/;"	d
bfin_write_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_LENGTH(/;"	d
bfin_write_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_LENGTH(/;"	d
bfin_write_CAN0_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_LENGTH(/;"	d
bfin_write_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB16_TIMESTAMP(/;"	d
bfin_write_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB16_TIMESTAMP(/;"	d
bfin_write_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB16_TIMESTAMP(/;"	d
bfin_write_CAN0_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB16_TIMESTAMP(/;"	d
bfin_write_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA0(/;"	d
bfin_write_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA0(/;"	d
bfin_write_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA0(/;"	d
bfin_write_CAN0_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA0(/;"	d
bfin_write_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA1(/;"	d
bfin_write_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA1(/;"	d
bfin_write_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA1(/;"	d
bfin_write_CAN0_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA1(/;"	d
bfin_write_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA2(/;"	d
bfin_write_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA2(/;"	d
bfin_write_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA2(/;"	d
bfin_write_CAN0_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA2(/;"	d
bfin_write_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA3(/;"	d
bfin_write_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA3(/;"	d
bfin_write_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA3(/;"	d
bfin_write_CAN0_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_DATA3(/;"	d
bfin_write_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID0(/;"	d
bfin_write_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID0(/;"	d
bfin_write_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID0(/;"	d
bfin_write_CAN0_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID0(/;"	d
bfin_write_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID1(/;"	d
bfin_write_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID1(/;"	d
bfin_write_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID1(/;"	d
bfin_write_CAN0_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_ID1(/;"	d
bfin_write_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_LENGTH(/;"	d
bfin_write_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_LENGTH(/;"	d
bfin_write_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_LENGTH(/;"	d
bfin_write_CAN0_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_LENGTH(/;"	d
bfin_write_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB17_TIMESTAMP(/;"	d
bfin_write_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB17_TIMESTAMP(/;"	d
bfin_write_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB17_TIMESTAMP(/;"	d
bfin_write_CAN0_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB17_TIMESTAMP(/;"	d
bfin_write_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA0(/;"	d
bfin_write_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA0(/;"	d
bfin_write_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA0(/;"	d
bfin_write_CAN0_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA0(/;"	d
bfin_write_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA1(/;"	d
bfin_write_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA1(/;"	d
bfin_write_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA1(/;"	d
bfin_write_CAN0_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA1(/;"	d
bfin_write_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA2(/;"	d
bfin_write_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA2(/;"	d
bfin_write_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA2(/;"	d
bfin_write_CAN0_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA2(/;"	d
bfin_write_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA3(/;"	d
bfin_write_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA3(/;"	d
bfin_write_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA3(/;"	d
bfin_write_CAN0_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_DATA3(/;"	d
bfin_write_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID0(/;"	d
bfin_write_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID0(/;"	d
bfin_write_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID0(/;"	d
bfin_write_CAN0_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID0(/;"	d
bfin_write_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID1(/;"	d
bfin_write_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID1(/;"	d
bfin_write_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID1(/;"	d
bfin_write_CAN0_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_ID1(/;"	d
bfin_write_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_LENGTH(/;"	d
bfin_write_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_LENGTH(/;"	d
bfin_write_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_LENGTH(/;"	d
bfin_write_CAN0_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_LENGTH(/;"	d
bfin_write_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB18_TIMESTAMP(/;"	d
bfin_write_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB18_TIMESTAMP(/;"	d
bfin_write_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB18_TIMESTAMP(/;"	d
bfin_write_CAN0_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB18_TIMESTAMP(/;"	d
bfin_write_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA0(/;"	d
bfin_write_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA0(/;"	d
bfin_write_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA0(/;"	d
bfin_write_CAN0_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA0(/;"	d
bfin_write_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA1(/;"	d
bfin_write_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA1(/;"	d
bfin_write_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA1(/;"	d
bfin_write_CAN0_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA1(/;"	d
bfin_write_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA2(/;"	d
bfin_write_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA2(/;"	d
bfin_write_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA2(/;"	d
bfin_write_CAN0_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA2(/;"	d
bfin_write_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA3(/;"	d
bfin_write_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA3(/;"	d
bfin_write_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA3(/;"	d
bfin_write_CAN0_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_DATA3(/;"	d
bfin_write_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID0(/;"	d
bfin_write_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID0(/;"	d
bfin_write_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID0(/;"	d
bfin_write_CAN0_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID0(/;"	d
bfin_write_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID1(/;"	d
bfin_write_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID1(/;"	d
bfin_write_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID1(/;"	d
bfin_write_CAN0_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_ID1(/;"	d
bfin_write_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_LENGTH(/;"	d
bfin_write_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_LENGTH(/;"	d
bfin_write_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_LENGTH(/;"	d
bfin_write_CAN0_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_LENGTH(/;"	d
bfin_write_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB19_TIMESTAMP(/;"	d
bfin_write_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB19_TIMESTAMP(/;"	d
bfin_write_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB19_TIMESTAMP(/;"	d
bfin_write_CAN0_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB19_TIMESTAMP(/;"	d
bfin_write_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA0(/;"	d
bfin_write_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA0(/;"	d
bfin_write_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA0(/;"	d
bfin_write_CAN0_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA0(/;"	d
bfin_write_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA1(/;"	d
bfin_write_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA1(/;"	d
bfin_write_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA1(/;"	d
bfin_write_CAN0_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA1(/;"	d
bfin_write_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA2(/;"	d
bfin_write_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA2(/;"	d
bfin_write_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA2(/;"	d
bfin_write_CAN0_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA2(/;"	d
bfin_write_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA3(/;"	d
bfin_write_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA3(/;"	d
bfin_write_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA3(/;"	d
bfin_write_CAN0_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_DATA3(/;"	d
bfin_write_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID0(/;"	d
bfin_write_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID0(/;"	d
bfin_write_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID0(/;"	d
bfin_write_CAN0_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID0(/;"	d
bfin_write_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID1(/;"	d
bfin_write_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID1(/;"	d
bfin_write_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID1(/;"	d
bfin_write_CAN0_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_ID1(/;"	d
bfin_write_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_LENGTH(/;"	d
bfin_write_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_LENGTH(/;"	d
bfin_write_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_LENGTH(/;"	d
bfin_write_CAN0_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_LENGTH(/;"	d
bfin_write_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB20_TIMESTAMP(/;"	d
bfin_write_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB20_TIMESTAMP(/;"	d
bfin_write_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB20_TIMESTAMP(/;"	d
bfin_write_CAN0_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB20_TIMESTAMP(/;"	d
bfin_write_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA0(/;"	d
bfin_write_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA0(/;"	d
bfin_write_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA0(/;"	d
bfin_write_CAN0_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA0(/;"	d
bfin_write_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA1(/;"	d
bfin_write_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA1(/;"	d
bfin_write_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA1(/;"	d
bfin_write_CAN0_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA1(/;"	d
bfin_write_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA2(/;"	d
bfin_write_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA2(/;"	d
bfin_write_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA2(/;"	d
bfin_write_CAN0_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA2(/;"	d
bfin_write_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA3(/;"	d
bfin_write_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA3(/;"	d
bfin_write_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA3(/;"	d
bfin_write_CAN0_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_DATA3(/;"	d
bfin_write_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID0(/;"	d
bfin_write_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID0(/;"	d
bfin_write_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID0(/;"	d
bfin_write_CAN0_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID0(/;"	d
bfin_write_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID1(/;"	d
bfin_write_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID1(/;"	d
bfin_write_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID1(/;"	d
bfin_write_CAN0_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_ID1(/;"	d
bfin_write_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_LENGTH(/;"	d
bfin_write_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_LENGTH(/;"	d
bfin_write_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_LENGTH(/;"	d
bfin_write_CAN0_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_LENGTH(/;"	d
bfin_write_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB21_TIMESTAMP(/;"	d
bfin_write_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB21_TIMESTAMP(/;"	d
bfin_write_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB21_TIMESTAMP(/;"	d
bfin_write_CAN0_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB21_TIMESTAMP(/;"	d
bfin_write_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA0(/;"	d
bfin_write_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA0(/;"	d
bfin_write_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA0(/;"	d
bfin_write_CAN0_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA0(/;"	d
bfin_write_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA1(/;"	d
bfin_write_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA1(/;"	d
bfin_write_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA1(/;"	d
bfin_write_CAN0_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA1(/;"	d
bfin_write_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA2(/;"	d
bfin_write_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA2(/;"	d
bfin_write_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA2(/;"	d
bfin_write_CAN0_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA2(/;"	d
bfin_write_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA3(/;"	d
bfin_write_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA3(/;"	d
bfin_write_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA3(/;"	d
bfin_write_CAN0_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_DATA3(/;"	d
bfin_write_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID0(/;"	d
bfin_write_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID0(/;"	d
bfin_write_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID0(/;"	d
bfin_write_CAN0_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID0(/;"	d
bfin_write_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID1(/;"	d
bfin_write_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID1(/;"	d
bfin_write_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID1(/;"	d
bfin_write_CAN0_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_ID1(/;"	d
bfin_write_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_LENGTH(/;"	d
bfin_write_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_LENGTH(/;"	d
bfin_write_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_LENGTH(/;"	d
bfin_write_CAN0_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_LENGTH(/;"	d
bfin_write_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB22_TIMESTAMP(/;"	d
bfin_write_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB22_TIMESTAMP(/;"	d
bfin_write_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB22_TIMESTAMP(/;"	d
bfin_write_CAN0_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB22_TIMESTAMP(/;"	d
bfin_write_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA0(/;"	d
bfin_write_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA0(/;"	d
bfin_write_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA0(/;"	d
bfin_write_CAN0_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA0(/;"	d
bfin_write_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA1(/;"	d
bfin_write_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA1(/;"	d
bfin_write_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA1(/;"	d
bfin_write_CAN0_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA1(/;"	d
bfin_write_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA2(/;"	d
bfin_write_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA2(/;"	d
bfin_write_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA2(/;"	d
bfin_write_CAN0_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA2(/;"	d
bfin_write_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA3(/;"	d
bfin_write_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA3(/;"	d
bfin_write_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA3(/;"	d
bfin_write_CAN0_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_DATA3(/;"	d
bfin_write_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID0(/;"	d
bfin_write_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID0(/;"	d
bfin_write_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID0(/;"	d
bfin_write_CAN0_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID0(/;"	d
bfin_write_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID1(/;"	d
bfin_write_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID1(/;"	d
bfin_write_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID1(/;"	d
bfin_write_CAN0_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_ID1(/;"	d
bfin_write_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_LENGTH(/;"	d
bfin_write_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_LENGTH(/;"	d
bfin_write_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_LENGTH(/;"	d
bfin_write_CAN0_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_LENGTH(/;"	d
bfin_write_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB23_TIMESTAMP(/;"	d
bfin_write_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB23_TIMESTAMP(/;"	d
bfin_write_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB23_TIMESTAMP(/;"	d
bfin_write_CAN0_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB23_TIMESTAMP(/;"	d
bfin_write_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA0(/;"	d
bfin_write_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA0(/;"	d
bfin_write_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA0(/;"	d
bfin_write_CAN0_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA0(/;"	d
bfin_write_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA1(/;"	d
bfin_write_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA1(/;"	d
bfin_write_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA1(/;"	d
bfin_write_CAN0_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA1(/;"	d
bfin_write_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA2(/;"	d
bfin_write_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA2(/;"	d
bfin_write_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA2(/;"	d
bfin_write_CAN0_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA2(/;"	d
bfin_write_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA3(/;"	d
bfin_write_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA3(/;"	d
bfin_write_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA3(/;"	d
bfin_write_CAN0_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_DATA3(/;"	d
bfin_write_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID0(/;"	d
bfin_write_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID0(/;"	d
bfin_write_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID0(/;"	d
bfin_write_CAN0_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID0(/;"	d
bfin_write_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID1(/;"	d
bfin_write_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID1(/;"	d
bfin_write_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID1(/;"	d
bfin_write_CAN0_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_ID1(/;"	d
bfin_write_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_LENGTH(/;"	d
bfin_write_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_LENGTH(/;"	d
bfin_write_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_LENGTH(/;"	d
bfin_write_CAN0_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_LENGTH(/;"	d
bfin_write_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB24_TIMESTAMP(/;"	d
bfin_write_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB24_TIMESTAMP(/;"	d
bfin_write_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB24_TIMESTAMP(/;"	d
bfin_write_CAN0_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB24_TIMESTAMP(/;"	d
bfin_write_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA0(/;"	d
bfin_write_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA0(/;"	d
bfin_write_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA0(/;"	d
bfin_write_CAN0_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA0(/;"	d
bfin_write_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA1(/;"	d
bfin_write_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA1(/;"	d
bfin_write_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA1(/;"	d
bfin_write_CAN0_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA1(/;"	d
bfin_write_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA2(/;"	d
bfin_write_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA2(/;"	d
bfin_write_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA2(/;"	d
bfin_write_CAN0_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA2(/;"	d
bfin_write_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA3(/;"	d
bfin_write_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA3(/;"	d
bfin_write_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA3(/;"	d
bfin_write_CAN0_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_DATA3(/;"	d
bfin_write_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID0(/;"	d
bfin_write_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID0(/;"	d
bfin_write_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID0(/;"	d
bfin_write_CAN0_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID0(/;"	d
bfin_write_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID1(/;"	d
bfin_write_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID1(/;"	d
bfin_write_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID1(/;"	d
bfin_write_CAN0_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_ID1(/;"	d
bfin_write_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_LENGTH(/;"	d
bfin_write_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_LENGTH(/;"	d
bfin_write_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_LENGTH(/;"	d
bfin_write_CAN0_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_LENGTH(/;"	d
bfin_write_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB25_TIMESTAMP(/;"	d
bfin_write_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB25_TIMESTAMP(/;"	d
bfin_write_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB25_TIMESTAMP(/;"	d
bfin_write_CAN0_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB25_TIMESTAMP(/;"	d
bfin_write_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA0(/;"	d
bfin_write_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA0(/;"	d
bfin_write_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA0(/;"	d
bfin_write_CAN0_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA0(/;"	d
bfin_write_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA1(/;"	d
bfin_write_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA1(/;"	d
bfin_write_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA1(/;"	d
bfin_write_CAN0_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA1(/;"	d
bfin_write_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA2(/;"	d
bfin_write_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA2(/;"	d
bfin_write_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA2(/;"	d
bfin_write_CAN0_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA2(/;"	d
bfin_write_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA3(/;"	d
bfin_write_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA3(/;"	d
bfin_write_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA3(/;"	d
bfin_write_CAN0_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_DATA3(/;"	d
bfin_write_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID0(/;"	d
bfin_write_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID0(/;"	d
bfin_write_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID0(/;"	d
bfin_write_CAN0_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID0(/;"	d
bfin_write_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID1(/;"	d
bfin_write_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID1(/;"	d
bfin_write_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID1(/;"	d
bfin_write_CAN0_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_ID1(/;"	d
bfin_write_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_LENGTH(/;"	d
bfin_write_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_LENGTH(/;"	d
bfin_write_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_LENGTH(/;"	d
bfin_write_CAN0_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_LENGTH(/;"	d
bfin_write_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB26_TIMESTAMP(/;"	d
bfin_write_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB26_TIMESTAMP(/;"	d
bfin_write_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB26_TIMESTAMP(/;"	d
bfin_write_CAN0_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB26_TIMESTAMP(/;"	d
bfin_write_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA0(/;"	d
bfin_write_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA0(/;"	d
bfin_write_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA0(/;"	d
bfin_write_CAN0_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA0(/;"	d
bfin_write_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA1(/;"	d
bfin_write_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA1(/;"	d
bfin_write_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA1(/;"	d
bfin_write_CAN0_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA1(/;"	d
bfin_write_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA2(/;"	d
bfin_write_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA2(/;"	d
bfin_write_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA2(/;"	d
bfin_write_CAN0_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA2(/;"	d
bfin_write_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA3(/;"	d
bfin_write_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA3(/;"	d
bfin_write_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA3(/;"	d
bfin_write_CAN0_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_DATA3(/;"	d
bfin_write_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID0(/;"	d
bfin_write_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID0(/;"	d
bfin_write_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID0(/;"	d
bfin_write_CAN0_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID0(/;"	d
bfin_write_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID1(/;"	d
bfin_write_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID1(/;"	d
bfin_write_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID1(/;"	d
bfin_write_CAN0_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_ID1(/;"	d
bfin_write_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_LENGTH(/;"	d
bfin_write_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_LENGTH(/;"	d
bfin_write_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_LENGTH(/;"	d
bfin_write_CAN0_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_LENGTH(/;"	d
bfin_write_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB27_TIMESTAMP(/;"	d
bfin_write_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB27_TIMESTAMP(/;"	d
bfin_write_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB27_TIMESTAMP(/;"	d
bfin_write_CAN0_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB27_TIMESTAMP(/;"	d
bfin_write_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA0(/;"	d
bfin_write_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA0(/;"	d
bfin_write_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA0(/;"	d
bfin_write_CAN0_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA0(/;"	d
bfin_write_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA1(/;"	d
bfin_write_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA1(/;"	d
bfin_write_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA1(/;"	d
bfin_write_CAN0_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA1(/;"	d
bfin_write_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA2(/;"	d
bfin_write_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA2(/;"	d
bfin_write_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA2(/;"	d
bfin_write_CAN0_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA2(/;"	d
bfin_write_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA3(/;"	d
bfin_write_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA3(/;"	d
bfin_write_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA3(/;"	d
bfin_write_CAN0_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_DATA3(/;"	d
bfin_write_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID0(/;"	d
bfin_write_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID0(/;"	d
bfin_write_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID0(/;"	d
bfin_write_CAN0_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID0(/;"	d
bfin_write_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID1(/;"	d
bfin_write_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID1(/;"	d
bfin_write_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID1(/;"	d
bfin_write_CAN0_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_ID1(/;"	d
bfin_write_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_LENGTH(/;"	d
bfin_write_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_LENGTH(/;"	d
bfin_write_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_LENGTH(/;"	d
bfin_write_CAN0_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_LENGTH(/;"	d
bfin_write_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB28_TIMESTAMP(/;"	d
bfin_write_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB28_TIMESTAMP(/;"	d
bfin_write_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB28_TIMESTAMP(/;"	d
bfin_write_CAN0_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB28_TIMESTAMP(/;"	d
bfin_write_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA0(/;"	d
bfin_write_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA0(/;"	d
bfin_write_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA0(/;"	d
bfin_write_CAN0_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA0(/;"	d
bfin_write_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA1(/;"	d
bfin_write_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA1(/;"	d
bfin_write_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA1(/;"	d
bfin_write_CAN0_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA1(/;"	d
bfin_write_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA2(/;"	d
bfin_write_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA2(/;"	d
bfin_write_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA2(/;"	d
bfin_write_CAN0_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA2(/;"	d
bfin_write_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA3(/;"	d
bfin_write_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA3(/;"	d
bfin_write_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA3(/;"	d
bfin_write_CAN0_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_DATA3(/;"	d
bfin_write_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID0(/;"	d
bfin_write_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID0(/;"	d
bfin_write_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID0(/;"	d
bfin_write_CAN0_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID0(/;"	d
bfin_write_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID1(/;"	d
bfin_write_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID1(/;"	d
bfin_write_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID1(/;"	d
bfin_write_CAN0_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_ID1(/;"	d
bfin_write_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_LENGTH(/;"	d
bfin_write_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_LENGTH(/;"	d
bfin_write_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_LENGTH(/;"	d
bfin_write_CAN0_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_LENGTH(/;"	d
bfin_write_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB29_TIMESTAMP(/;"	d
bfin_write_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB29_TIMESTAMP(/;"	d
bfin_write_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB29_TIMESTAMP(/;"	d
bfin_write_CAN0_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB29_TIMESTAMP(/;"	d
bfin_write_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA0(/;"	d
bfin_write_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA0(/;"	d
bfin_write_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA0(/;"	d
bfin_write_CAN0_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA0(/;"	d
bfin_write_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA1(/;"	d
bfin_write_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA1(/;"	d
bfin_write_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA1(/;"	d
bfin_write_CAN0_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA1(/;"	d
bfin_write_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA2(/;"	d
bfin_write_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA2(/;"	d
bfin_write_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA2(/;"	d
bfin_write_CAN0_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA2(/;"	d
bfin_write_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA3(/;"	d
bfin_write_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA3(/;"	d
bfin_write_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA3(/;"	d
bfin_write_CAN0_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_DATA3(/;"	d
bfin_write_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID0(/;"	d
bfin_write_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID0(/;"	d
bfin_write_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID0(/;"	d
bfin_write_CAN0_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID0(/;"	d
bfin_write_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID1(/;"	d
bfin_write_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID1(/;"	d
bfin_write_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID1(/;"	d
bfin_write_CAN0_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_ID1(/;"	d
bfin_write_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_LENGTH(/;"	d
bfin_write_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_LENGTH(/;"	d
bfin_write_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_LENGTH(/;"	d
bfin_write_CAN0_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_LENGTH(/;"	d
bfin_write_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB30_TIMESTAMP(/;"	d
bfin_write_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB30_TIMESTAMP(/;"	d
bfin_write_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB30_TIMESTAMP(/;"	d
bfin_write_CAN0_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB30_TIMESTAMP(/;"	d
bfin_write_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA0(/;"	d
bfin_write_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA0(/;"	d
bfin_write_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA0(/;"	d
bfin_write_CAN0_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA0(/;"	d
bfin_write_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA1(/;"	d
bfin_write_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA1(/;"	d
bfin_write_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA1(/;"	d
bfin_write_CAN0_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA1(/;"	d
bfin_write_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA2(/;"	d
bfin_write_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA2(/;"	d
bfin_write_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA2(/;"	d
bfin_write_CAN0_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA2(/;"	d
bfin_write_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA3(/;"	d
bfin_write_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA3(/;"	d
bfin_write_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA3(/;"	d
bfin_write_CAN0_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_DATA3(/;"	d
bfin_write_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID0(/;"	d
bfin_write_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID0(/;"	d
bfin_write_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID0(/;"	d
bfin_write_CAN0_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID0(/;"	d
bfin_write_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID1(/;"	d
bfin_write_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID1(/;"	d
bfin_write_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID1(/;"	d
bfin_write_CAN0_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_ID1(/;"	d
bfin_write_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_LENGTH(/;"	d
bfin_write_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_LENGTH(/;"	d
bfin_write_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_LENGTH(/;"	d
bfin_write_CAN0_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_LENGTH(/;"	d
bfin_write_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MB31_TIMESTAMP(/;"	d
bfin_write_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MB31_TIMESTAMP(/;"	d
bfin_write_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MB31_TIMESTAMP(/;"	d
bfin_write_CAN0_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MB31_TIMESTAMP(/;"	d
bfin_write_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBIM1(/;"	d
bfin_write_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBIM1(/;"	d
bfin_write_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBIM1(/;"	d
bfin_write_CAN0_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBIM1(/;"	d
bfin_write_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBIM2(/;"	d
bfin_write_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBIM2(/;"	d
bfin_write_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBIM2(/;"	d
bfin_write_CAN0_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBIM2(/;"	d
bfin_write_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF1(/;"	d
bfin_write_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF1(/;"	d
bfin_write_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF1(/;"	d
bfin_write_CAN0_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF1(/;"	d
bfin_write_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF2(/;"	d
bfin_write_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF2(/;"	d
bfin_write_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF2(/;"	d
bfin_write_CAN0_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBRIF2(/;"	d
bfin_write_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBTD(/;"	d
bfin_write_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBTD(/;"	d
bfin_write_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBTD(/;"	d
bfin_write_CAN0_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBTD(/;"	d
bfin_write_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF1(/;"	d
bfin_write_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF1(/;"	d
bfin_write_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF1(/;"	d
bfin_write_CAN0_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF1(/;"	d
bfin_write_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF2(/;"	d
bfin_write_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF2(/;"	d
bfin_write_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF2(/;"	d
bfin_write_CAN0_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MBTIF2(/;"	d
bfin_write_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MC1(/;"	d
bfin_write_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MC1(/;"	d
bfin_write_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MC1(/;"	d
bfin_write_CAN0_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MC1(/;"	d
bfin_write_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MC2(/;"	d
bfin_write_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MC2(/;"	d
bfin_write_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MC2(/;"	d
bfin_write_CAN0_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MC2(/;"	d
bfin_write_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MD1(/;"	d
bfin_write_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MD1(/;"	d
bfin_write_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MD1(/;"	d
bfin_write_CAN0_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MD1(/;"	d
bfin_write_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_MD2(/;"	d
bfin_write_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_MD2(/;"	d
bfin_write_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_MD2(/;"	d
bfin_write_CAN0_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_MD2(/;"	d
bfin_write_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_OPSS1(/;"	d
bfin_write_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_OPSS1(/;"	d
bfin_write_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_OPSS1(/;"	d
bfin_write_CAN0_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_OPSS1(/;"	d
bfin_write_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_OPSS2(/;"	d
bfin_write_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_OPSS2(/;"	d
bfin_write_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_OPSS2(/;"	d
bfin_write_CAN0_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_OPSS2(/;"	d
bfin_write_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_RFH1(/;"	d
bfin_write_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_RFH1(/;"	d
bfin_write_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_RFH1(/;"	d
bfin_write_CAN0_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_RFH1(/;"	d
bfin_write_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_RFH2(/;"	d
bfin_write_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_RFH2(/;"	d
bfin_write_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_RFH2(/;"	d
bfin_write_CAN0_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_RFH2(/;"	d
bfin_write_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_RML1(/;"	d
bfin_write_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_RML1(/;"	d
bfin_write_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_RML1(/;"	d
bfin_write_CAN0_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_RML1(/;"	d
bfin_write_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_RML2(/;"	d
bfin_write_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_RML2(/;"	d
bfin_write_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_RML2(/;"	d
bfin_write_CAN0_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_RML2(/;"	d
bfin_write_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_RMP1(/;"	d
bfin_write_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_RMP1(/;"	d
bfin_write_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_RMP1(/;"	d
bfin_write_CAN0_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_RMP1(/;"	d
bfin_write_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_RMP2(/;"	d
bfin_write_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_RMP2(/;"	d
bfin_write_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_RMP2(/;"	d
bfin_write_CAN0_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_RMP2(/;"	d
bfin_write_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_STATUS(/;"	d
bfin_write_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_STATUS(/;"	d
bfin_write_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_STATUS(/;"	d
bfin_write_CAN0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_STATUS(/;"	d
bfin_write_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TA1(/;"	d
bfin_write_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TA1(/;"	d
bfin_write_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TA1(/;"	d
bfin_write_CAN0_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TA1(/;"	d
bfin_write_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TA2(/;"	d
bfin_write_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TA2(/;"	d
bfin_write_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TA2(/;"	d
bfin_write_CAN0_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TA2(/;"	d
bfin_write_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TIMING(/;"	d
bfin_write_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TIMING(/;"	d
bfin_write_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TIMING(/;"	d
bfin_write_CAN0_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TIMING(/;"	d
bfin_write_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TRR1(/;"	d
bfin_write_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TRR1(/;"	d
bfin_write_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TRR1(/;"	d
bfin_write_CAN0_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TRR1(/;"	d
bfin_write_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TRR2(/;"	d
bfin_write_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TRR2(/;"	d
bfin_write_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TRR2(/;"	d
bfin_write_CAN0_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TRR2(/;"	d
bfin_write_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TRS1(/;"	d
bfin_write_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TRS1(/;"	d
bfin_write_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TRS1(/;"	d
bfin_write_CAN0_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TRS1(/;"	d
bfin_write_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_TRS2(/;"	d
bfin_write_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_TRS2(/;"	d
bfin_write_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_TRS2(/;"	d
bfin_write_CAN0_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_TRS2(/;"	d
bfin_write_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_UCCNF(/;"	d
bfin_write_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_UCCNF(/;"	d
bfin_write_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_UCCNF(/;"	d
bfin_write_CAN0_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_UCCNF(/;"	d
bfin_write_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_UCCNT(/;"	d
bfin_write_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_UCCNT(/;"	d
bfin_write_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_UCCNT(/;"	d
bfin_write_CAN0_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_UCCNT(/;"	d
bfin_write_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CAN0_UCRC(/;"	d
bfin_write_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN0_UCRC(/;"	d
bfin_write_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN0_UCRC(/;"	d
bfin_write_CAN0_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN0_UCRC(/;"	d
bfin_write_CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AA1(/;"	d
bfin_write_CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AA1(/;"	d
bfin_write_CAN1_AA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AA1(/;"	d
bfin_write_CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AA2(/;"	d
bfin_write_CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AA2(/;"	d
bfin_write_CAN1_AA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AA2(/;"	d
bfin_write_CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM00H(/;"	d
bfin_write_CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM00H(/;"	d
bfin_write_CAN1_AM00H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM00H(/;"	d
bfin_write_CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM00L(/;"	d
bfin_write_CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM00L(/;"	d
bfin_write_CAN1_AM00L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM00L(/;"	d
bfin_write_CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM01H(/;"	d
bfin_write_CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM01H(/;"	d
bfin_write_CAN1_AM01H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM01H(/;"	d
bfin_write_CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM01L(/;"	d
bfin_write_CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM01L(/;"	d
bfin_write_CAN1_AM01L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM01L(/;"	d
bfin_write_CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM02H(/;"	d
bfin_write_CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM02H(/;"	d
bfin_write_CAN1_AM02H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM02H(/;"	d
bfin_write_CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM02L(/;"	d
bfin_write_CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM02L(/;"	d
bfin_write_CAN1_AM02L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM02L(/;"	d
bfin_write_CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM03H(/;"	d
bfin_write_CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM03H(/;"	d
bfin_write_CAN1_AM03H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM03H(/;"	d
bfin_write_CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM03L(/;"	d
bfin_write_CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM03L(/;"	d
bfin_write_CAN1_AM03L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM03L(/;"	d
bfin_write_CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM04H(/;"	d
bfin_write_CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM04H(/;"	d
bfin_write_CAN1_AM04H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM04H(/;"	d
bfin_write_CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM04L(/;"	d
bfin_write_CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM04L(/;"	d
bfin_write_CAN1_AM04L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM04L(/;"	d
bfin_write_CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM05H(/;"	d
bfin_write_CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM05H(/;"	d
bfin_write_CAN1_AM05H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM05H(/;"	d
bfin_write_CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM05L(/;"	d
bfin_write_CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM05L(/;"	d
bfin_write_CAN1_AM05L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM05L(/;"	d
bfin_write_CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM06H(/;"	d
bfin_write_CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM06H(/;"	d
bfin_write_CAN1_AM06H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM06H(/;"	d
bfin_write_CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM06L(/;"	d
bfin_write_CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM06L(/;"	d
bfin_write_CAN1_AM06L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM06L(/;"	d
bfin_write_CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM07H(/;"	d
bfin_write_CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM07H(/;"	d
bfin_write_CAN1_AM07H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM07H(/;"	d
bfin_write_CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM07L(/;"	d
bfin_write_CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM07L(/;"	d
bfin_write_CAN1_AM07L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM07L(/;"	d
bfin_write_CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM08H(/;"	d
bfin_write_CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM08H(/;"	d
bfin_write_CAN1_AM08H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM08H(/;"	d
bfin_write_CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM08L(/;"	d
bfin_write_CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM08L(/;"	d
bfin_write_CAN1_AM08L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM08L(/;"	d
bfin_write_CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM09H(/;"	d
bfin_write_CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM09H(/;"	d
bfin_write_CAN1_AM09H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM09H(/;"	d
bfin_write_CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM09L(/;"	d
bfin_write_CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM09L(/;"	d
bfin_write_CAN1_AM09L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM09L(/;"	d
bfin_write_CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM10H(/;"	d
bfin_write_CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM10H(/;"	d
bfin_write_CAN1_AM10H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM10H(/;"	d
bfin_write_CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM10L(/;"	d
bfin_write_CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM10L(/;"	d
bfin_write_CAN1_AM10L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM10L(/;"	d
bfin_write_CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM11H(/;"	d
bfin_write_CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM11H(/;"	d
bfin_write_CAN1_AM11H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM11H(/;"	d
bfin_write_CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM11L(/;"	d
bfin_write_CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM11L(/;"	d
bfin_write_CAN1_AM11L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM11L(/;"	d
bfin_write_CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM12H(/;"	d
bfin_write_CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM12H(/;"	d
bfin_write_CAN1_AM12H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM12H(/;"	d
bfin_write_CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM12L(/;"	d
bfin_write_CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM12L(/;"	d
bfin_write_CAN1_AM12L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM12L(/;"	d
bfin_write_CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM13H(/;"	d
bfin_write_CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM13H(/;"	d
bfin_write_CAN1_AM13H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM13H(/;"	d
bfin_write_CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM13L(/;"	d
bfin_write_CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM13L(/;"	d
bfin_write_CAN1_AM13L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM13L(/;"	d
bfin_write_CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM14H(/;"	d
bfin_write_CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM14H(/;"	d
bfin_write_CAN1_AM14H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM14H(/;"	d
bfin_write_CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM14L(/;"	d
bfin_write_CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM14L(/;"	d
bfin_write_CAN1_AM14L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM14L(/;"	d
bfin_write_CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM15H(/;"	d
bfin_write_CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM15H(/;"	d
bfin_write_CAN1_AM15H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM15H(/;"	d
bfin_write_CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM15L(/;"	d
bfin_write_CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM15L(/;"	d
bfin_write_CAN1_AM15L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM15L(/;"	d
bfin_write_CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM16H(/;"	d
bfin_write_CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM16H(/;"	d
bfin_write_CAN1_AM16H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM16H(/;"	d
bfin_write_CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM16L(/;"	d
bfin_write_CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM16L(/;"	d
bfin_write_CAN1_AM16L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM16L(/;"	d
bfin_write_CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM17H(/;"	d
bfin_write_CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM17H(/;"	d
bfin_write_CAN1_AM17H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM17H(/;"	d
bfin_write_CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM17L(/;"	d
bfin_write_CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM17L(/;"	d
bfin_write_CAN1_AM17L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM17L(/;"	d
bfin_write_CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM18H(/;"	d
bfin_write_CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM18H(/;"	d
bfin_write_CAN1_AM18H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM18H(/;"	d
bfin_write_CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM18L(/;"	d
bfin_write_CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM18L(/;"	d
bfin_write_CAN1_AM18L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM18L(/;"	d
bfin_write_CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM19H(/;"	d
bfin_write_CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM19H(/;"	d
bfin_write_CAN1_AM19H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM19H(/;"	d
bfin_write_CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM19L(/;"	d
bfin_write_CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM19L(/;"	d
bfin_write_CAN1_AM19L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM19L(/;"	d
bfin_write_CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM20H(/;"	d
bfin_write_CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM20H(/;"	d
bfin_write_CAN1_AM20H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM20H(/;"	d
bfin_write_CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM20L(/;"	d
bfin_write_CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM20L(/;"	d
bfin_write_CAN1_AM20L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM20L(/;"	d
bfin_write_CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM21H(/;"	d
bfin_write_CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM21H(/;"	d
bfin_write_CAN1_AM21H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM21H(/;"	d
bfin_write_CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM21L(/;"	d
bfin_write_CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM21L(/;"	d
bfin_write_CAN1_AM21L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM21L(/;"	d
bfin_write_CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM22H(/;"	d
bfin_write_CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM22H(/;"	d
bfin_write_CAN1_AM22H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM22H(/;"	d
bfin_write_CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM22L(/;"	d
bfin_write_CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM22L(/;"	d
bfin_write_CAN1_AM22L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM22L(/;"	d
bfin_write_CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM23H(/;"	d
bfin_write_CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM23H(/;"	d
bfin_write_CAN1_AM23H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM23H(/;"	d
bfin_write_CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM23L(/;"	d
bfin_write_CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM23L(/;"	d
bfin_write_CAN1_AM23L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM23L(/;"	d
bfin_write_CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM24H(/;"	d
bfin_write_CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM24H(/;"	d
bfin_write_CAN1_AM24H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM24H(/;"	d
bfin_write_CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM24L(/;"	d
bfin_write_CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM24L(/;"	d
bfin_write_CAN1_AM24L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM24L(/;"	d
bfin_write_CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM25H(/;"	d
bfin_write_CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM25H(/;"	d
bfin_write_CAN1_AM25H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM25H(/;"	d
bfin_write_CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM25L(/;"	d
bfin_write_CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM25L(/;"	d
bfin_write_CAN1_AM25L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM25L(/;"	d
bfin_write_CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM26H(/;"	d
bfin_write_CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM26H(/;"	d
bfin_write_CAN1_AM26H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM26H(/;"	d
bfin_write_CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM26L(/;"	d
bfin_write_CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM26L(/;"	d
bfin_write_CAN1_AM26L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM26L(/;"	d
bfin_write_CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM27H(/;"	d
bfin_write_CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM27H(/;"	d
bfin_write_CAN1_AM27H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM27H(/;"	d
bfin_write_CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM27L(/;"	d
bfin_write_CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM27L(/;"	d
bfin_write_CAN1_AM27L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM27L(/;"	d
bfin_write_CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM28H(/;"	d
bfin_write_CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM28H(/;"	d
bfin_write_CAN1_AM28H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM28H(/;"	d
bfin_write_CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM28L(/;"	d
bfin_write_CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM28L(/;"	d
bfin_write_CAN1_AM28L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM28L(/;"	d
bfin_write_CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM29H(/;"	d
bfin_write_CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM29H(/;"	d
bfin_write_CAN1_AM29H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM29H(/;"	d
bfin_write_CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM29L(/;"	d
bfin_write_CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM29L(/;"	d
bfin_write_CAN1_AM29L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM29L(/;"	d
bfin_write_CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM30H(/;"	d
bfin_write_CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM30H(/;"	d
bfin_write_CAN1_AM30H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM30H(/;"	d
bfin_write_CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM30L(/;"	d
bfin_write_CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM30L(/;"	d
bfin_write_CAN1_AM30L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM30L(/;"	d
bfin_write_CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM31H(/;"	d
bfin_write_CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM31H(/;"	d
bfin_write_CAN1_AM31H	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM31H(/;"	d
bfin_write_CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_AM31L(/;"	d
bfin_write_CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_AM31L(/;"	d
bfin_write_CAN1_AM31L	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_AM31L(/;"	d
bfin_write_CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_CEC(/;"	d
bfin_write_CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_CEC(/;"	d
bfin_write_CAN1_CEC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_CEC(/;"	d
bfin_write_CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_CLOCK(/;"	d
bfin_write_CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_CLOCK(/;"	d
bfin_write_CAN1_CLOCK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_CLOCK(/;"	d
bfin_write_CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_CONTROL(/;"	d
bfin_write_CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_CONTROL(/;"	d
bfin_write_CAN1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_CONTROL(/;"	d
bfin_write_CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_DEBUG(/;"	d
bfin_write_CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_DEBUG(/;"	d
bfin_write_CAN1_DEBUG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_DEBUG(/;"	d
bfin_write_CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_ESR(/;"	d
bfin_write_CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_ESR(/;"	d
bfin_write_CAN1_ESR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_ESR(/;"	d
bfin_write_CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_EWR(/;"	d
bfin_write_CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_EWR(/;"	d
bfin_write_CAN1_EWR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_EWR(/;"	d
bfin_write_CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_GIF(/;"	d
bfin_write_CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_GIF(/;"	d
bfin_write_CAN1_GIF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_GIF(/;"	d
bfin_write_CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_GIM(/;"	d
bfin_write_CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_GIM(/;"	d
bfin_write_CAN1_GIM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_GIM(/;"	d
bfin_write_CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_GIS(/;"	d
bfin_write_CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_GIS(/;"	d
bfin_write_CAN1_GIS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_GIS(/;"	d
bfin_write_CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_INTR(/;"	d
bfin_write_CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_INTR(/;"	d
bfin_write_CAN1_INTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_INTR(/;"	d
bfin_write_CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA0(/;"	d
bfin_write_CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA0(/;"	d
bfin_write_CAN1_MB00_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA0(/;"	d
bfin_write_CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA1(/;"	d
bfin_write_CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA1(/;"	d
bfin_write_CAN1_MB00_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA1(/;"	d
bfin_write_CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA2(/;"	d
bfin_write_CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA2(/;"	d
bfin_write_CAN1_MB00_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA2(/;"	d
bfin_write_CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA3(/;"	d
bfin_write_CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA3(/;"	d
bfin_write_CAN1_MB00_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_DATA3(/;"	d
bfin_write_CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_ID0(/;"	d
bfin_write_CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_ID0(/;"	d
bfin_write_CAN1_MB00_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_ID0(/;"	d
bfin_write_CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_ID1(/;"	d
bfin_write_CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_ID1(/;"	d
bfin_write_CAN1_MB00_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_ID1(/;"	d
bfin_write_CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_LENGTH(/;"	d
bfin_write_CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_LENGTH(/;"	d
bfin_write_CAN1_MB00_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_LENGTH(/;"	d
bfin_write_CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB00_TIMESTAMP(/;"	d
bfin_write_CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB00_TIMESTAMP(/;"	d
bfin_write_CAN1_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB00_TIMESTAMP(/;"	d
bfin_write_CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA0(/;"	d
bfin_write_CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA0(/;"	d
bfin_write_CAN1_MB01_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA0(/;"	d
bfin_write_CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA1(/;"	d
bfin_write_CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA1(/;"	d
bfin_write_CAN1_MB01_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA1(/;"	d
bfin_write_CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA2(/;"	d
bfin_write_CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA2(/;"	d
bfin_write_CAN1_MB01_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA2(/;"	d
bfin_write_CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA3(/;"	d
bfin_write_CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA3(/;"	d
bfin_write_CAN1_MB01_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_DATA3(/;"	d
bfin_write_CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_ID0(/;"	d
bfin_write_CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_ID0(/;"	d
bfin_write_CAN1_MB01_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_ID0(/;"	d
bfin_write_CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_ID1(/;"	d
bfin_write_CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_ID1(/;"	d
bfin_write_CAN1_MB01_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_ID1(/;"	d
bfin_write_CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_LENGTH(/;"	d
bfin_write_CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_LENGTH(/;"	d
bfin_write_CAN1_MB01_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_LENGTH(/;"	d
bfin_write_CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB01_TIMESTAMP(/;"	d
bfin_write_CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB01_TIMESTAMP(/;"	d
bfin_write_CAN1_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB01_TIMESTAMP(/;"	d
bfin_write_CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA0(/;"	d
bfin_write_CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA0(/;"	d
bfin_write_CAN1_MB02_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA0(/;"	d
bfin_write_CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA1(/;"	d
bfin_write_CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA1(/;"	d
bfin_write_CAN1_MB02_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA1(/;"	d
bfin_write_CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA2(/;"	d
bfin_write_CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA2(/;"	d
bfin_write_CAN1_MB02_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA2(/;"	d
bfin_write_CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA3(/;"	d
bfin_write_CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA3(/;"	d
bfin_write_CAN1_MB02_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_DATA3(/;"	d
bfin_write_CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_ID0(/;"	d
bfin_write_CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_ID0(/;"	d
bfin_write_CAN1_MB02_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_ID0(/;"	d
bfin_write_CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_ID1(/;"	d
bfin_write_CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_ID1(/;"	d
bfin_write_CAN1_MB02_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_ID1(/;"	d
bfin_write_CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_LENGTH(/;"	d
bfin_write_CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_LENGTH(/;"	d
bfin_write_CAN1_MB02_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_LENGTH(/;"	d
bfin_write_CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB02_TIMESTAMP(/;"	d
bfin_write_CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB02_TIMESTAMP(/;"	d
bfin_write_CAN1_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB02_TIMESTAMP(/;"	d
bfin_write_CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA0(/;"	d
bfin_write_CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA0(/;"	d
bfin_write_CAN1_MB03_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA0(/;"	d
bfin_write_CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA1(/;"	d
bfin_write_CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA1(/;"	d
bfin_write_CAN1_MB03_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA1(/;"	d
bfin_write_CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA2(/;"	d
bfin_write_CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA2(/;"	d
bfin_write_CAN1_MB03_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA2(/;"	d
bfin_write_CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA3(/;"	d
bfin_write_CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA3(/;"	d
bfin_write_CAN1_MB03_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_DATA3(/;"	d
bfin_write_CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_ID0(/;"	d
bfin_write_CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_ID0(/;"	d
bfin_write_CAN1_MB03_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_ID0(/;"	d
bfin_write_CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_ID1(/;"	d
bfin_write_CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_ID1(/;"	d
bfin_write_CAN1_MB03_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_ID1(/;"	d
bfin_write_CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_LENGTH(/;"	d
bfin_write_CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_LENGTH(/;"	d
bfin_write_CAN1_MB03_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_LENGTH(/;"	d
bfin_write_CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB03_TIMESTAMP(/;"	d
bfin_write_CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB03_TIMESTAMP(/;"	d
bfin_write_CAN1_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB03_TIMESTAMP(/;"	d
bfin_write_CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA0(/;"	d
bfin_write_CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA0(/;"	d
bfin_write_CAN1_MB04_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA0(/;"	d
bfin_write_CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA1(/;"	d
bfin_write_CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA1(/;"	d
bfin_write_CAN1_MB04_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA1(/;"	d
bfin_write_CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA2(/;"	d
bfin_write_CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA2(/;"	d
bfin_write_CAN1_MB04_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA2(/;"	d
bfin_write_CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA3(/;"	d
bfin_write_CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA3(/;"	d
bfin_write_CAN1_MB04_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_DATA3(/;"	d
bfin_write_CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_ID0(/;"	d
bfin_write_CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_ID0(/;"	d
bfin_write_CAN1_MB04_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_ID0(/;"	d
bfin_write_CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_ID1(/;"	d
bfin_write_CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_ID1(/;"	d
bfin_write_CAN1_MB04_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_ID1(/;"	d
bfin_write_CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_LENGTH(/;"	d
bfin_write_CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_LENGTH(/;"	d
bfin_write_CAN1_MB04_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_LENGTH(/;"	d
bfin_write_CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB04_TIMESTAMP(/;"	d
bfin_write_CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB04_TIMESTAMP(/;"	d
bfin_write_CAN1_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB04_TIMESTAMP(/;"	d
bfin_write_CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA0(/;"	d
bfin_write_CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA0(/;"	d
bfin_write_CAN1_MB05_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA0(/;"	d
bfin_write_CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA1(/;"	d
bfin_write_CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA1(/;"	d
bfin_write_CAN1_MB05_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA1(/;"	d
bfin_write_CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA2(/;"	d
bfin_write_CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA2(/;"	d
bfin_write_CAN1_MB05_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA2(/;"	d
bfin_write_CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA3(/;"	d
bfin_write_CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA3(/;"	d
bfin_write_CAN1_MB05_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_DATA3(/;"	d
bfin_write_CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_ID0(/;"	d
bfin_write_CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_ID0(/;"	d
bfin_write_CAN1_MB05_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_ID0(/;"	d
bfin_write_CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_ID1(/;"	d
bfin_write_CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_ID1(/;"	d
bfin_write_CAN1_MB05_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_ID1(/;"	d
bfin_write_CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_LENGTH(/;"	d
bfin_write_CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_LENGTH(/;"	d
bfin_write_CAN1_MB05_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_LENGTH(/;"	d
bfin_write_CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB05_TIMESTAMP(/;"	d
bfin_write_CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB05_TIMESTAMP(/;"	d
bfin_write_CAN1_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB05_TIMESTAMP(/;"	d
bfin_write_CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA0(/;"	d
bfin_write_CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA0(/;"	d
bfin_write_CAN1_MB06_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA0(/;"	d
bfin_write_CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA1(/;"	d
bfin_write_CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA1(/;"	d
bfin_write_CAN1_MB06_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA1(/;"	d
bfin_write_CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA2(/;"	d
bfin_write_CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA2(/;"	d
bfin_write_CAN1_MB06_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA2(/;"	d
bfin_write_CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA3(/;"	d
bfin_write_CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA3(/;"	d
bfin_write_CAN1_MB06_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_DATA3(/;"	d
bfin_write_CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_ID0(/;"	d
bfin_write_CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_ID0(/;"	d
bfin_write_CAN1_MB06_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_ID0(/;"	d
bfin_write_CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_ID1(/;"	d
bfin_write_CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_ID1(/;"	d
bfin_write_CAN1_MB06_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_ID1(/;"	d
bfin_write_CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_LENGTH(/;"	d
bfin_write_CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_LENGTH(/;"	d
bfin_write_CAN1_MB06_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_LENGTH(/;"	d
bfin_write_CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB06_TIMESTAMP(/;"	d
bfin_write_CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB06_TIMESTAMP(/;"	d
bfin_write_CAN1_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB06_TIMESTAMP(/;"	d
bfin_write_CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA0(/;"	d
bfin_write_CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA0(/;"	d
bfin_write_CAN1_MB07_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA0(/;"	d
bfin_write_CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA1(/;"	d
bfin_write_CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA1(/;"	d
bfin_write_CAN1_MB07_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA1(/;"	d
bfin_write_CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA2(/;"	d
bfin_write_CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA2(/;"	d
bfin_write_CAN1_MB07_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA2(/;"	d
bfin_write_CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA3(/;"	d
bfin_write_CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA3(/;"	d
bfin_write_CAN1_MB07_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_DATA3(/;"	d
bfin_write_CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_ID0(/;"	d
bfin_write_CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_ID0(/;"	d
bfin_write_CAN1_MB07_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_ID0(/;"	d
bfin_write_CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_ID1(/;"	d
bfin_write_CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_ID1(/;"	d
bfin_write_CAN1_MB07_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_ID1(/;"	d
bfin_write_CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_LENGTH(/;"	d
bfin_write_CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_LENGTH(/;"	d
bfin_write_CAN1_MB07_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_LENGTH(/;"	d
bfin_write_CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB07_TIMESTAMP(/;"	d
bfin_write_CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB07_TIMESTAMP(/;"	d
bfin_write_CAN1_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB07_TIMESTAMP(/;"	d
bfin_write_CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA0(/;"	d
bfin_write_CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA0(/;"	d
bfin_write_CAN1_MB08_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA0(/;"	d
bfin_write_CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA1(/;"	d
bfin_write_CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA1(/;"	d
bfin_write_CAN1_MB08_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA1(/;"	d
bfin_write_CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA2(/;"	d
bfin_write_CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA2(/;"	d
bfin_write_CAN1_MB08_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA2(/;"	d
bfin_write_CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA3(/;"	d
bfin_write_CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA3(/;"	d
bfin_write_CAN1_MB08_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_DATA3(/;"	d
bfin_write_CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_ID0(/;"	d
bfin_write_CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_ID0(/;"	d
bfin_write_CAN1_MB08_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_ID0(/;"	d
bfin_write_CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_ID1(/;"	d
bfin_write_CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_ID1(/;"	d
bfin_write_CAN1_MB08_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_ID1(/;"	d
bfin_write_CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_LENGTH(/;"	d
bfin_write_CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_LENGTH(/;"	d
bfin_write_CAN1_MB08_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_LENGTH(/;"	d
bfin_write_CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB08_TIMESTAMP(/;"	d
bfin_write_CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB08_TIMESTAMP(/;"	d
bfin_write_CAN1_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB08_TIMESTAMP(/;"	d
bfin_write_CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA0(/;"	d
bfin_write_CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA0(/;"	d
bfin_write_CAN1_MB09_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA0(/;"	d
bfin_write_CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA1(/;"	d
bfin_write_CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA1(/;"	d
bfin_write_CAN1_MB09_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA1(/;"	d
bfin_write_CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA2(/;"	d
bfin_write_CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA2(/;"	d
bfin_write_CAN1_MB09_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA2(/;"	d
bfin_write_CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA3(/;"	d
bfin_write_CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA3(/;"	d
bfin_write_CAN1_MB09_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_DATA3(/;"	d
bfin_write_CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_ID0(/;"	d
bfin_write_CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_ID0(/;"	d
bfin_write_CAN1_MB09_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_ID0(/;"	d
bfin_write_CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_ID1(/;"	d
bfin_write_CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_ID1(/;"	d
bfin_write_CAN1_MB09_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_ID1(/;"	d
bfin_write_CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_LENGTH(/;"	d
bfin_write_CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_LENGTH(/;"	d
bfin_write_CAN1_MB09_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_LENGTH(/;"	d
bfin_write_CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB09_TIMESTAMP(/;"	d
bfin_write_CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB09_TIMESTAMP(/;"	d
bfin_write_CAN1_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB09_TIMESTAMP(/;"	d
bfin_write_CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA0(/;"	d
bfin_write_CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA0(/;"	d
bfin_write_CAN1_MB10_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA0(/;"	d
bfin_write_CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA1(/;"	d
bfin_write_CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA1(/;"	d
bfin_write_CAN1_MB10_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA1(/;"	d
bfin_write_CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA2(/;"	d
bfin_write_CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA2(/;"	d
bfin_write_CAN1_MB10_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA2(/;"	d
bfin_write_CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA3(/;"	d
bfin_write_CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA3(/;"	d
bfin_write_CAN1_MB10_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_DATA3(/;"	d
bfin_write_CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_ID0(/;"	d
bfin_write_CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_ID0(/;"	d
bfin_write_CAN1_MB10_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_ID0(/;"	d
bfin_write_CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_ID1(/;"	d
bfin_write_CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_ID1(/;"	d
bfin_write_CAN1_MB10_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_ID1(/;"	d
bfin_write_CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_LENGTH(/;"	d
bfin_write_CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_LENGTH(/;"	d
bfin_write_CAN1_MB10_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_LENGTH(/;"	d
bfin_write_CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB10_TIMESTAMP(/;"	d
bfin_write_CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB10_TIMESTAMP(/;"	d
bfin_write_CAN1_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB10_TIMESTAMP(/;"	d
bfin_write_CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA0(/;"	d
bfin_write_CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA0(/;"	d
bfin_write_CAN1_MB11_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA0(/;"	d
bfin_write_CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA1(/;"	d
bfin_write_CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA1(/;"	d
bfin_write_CAN1_MB11_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA1(/;"	d
bfin_write_CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA2(/;"	d
bfin_write_CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA2(/;"	d
bfin_write_CAN1_MB11_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA2(/;"	d
bfin_write_CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA3(/;"	d
bfin_write_CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA3(/;"	d
bfin_write_CAN1_MB11_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_DATA3(/;"	d
bfin_write_CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_ID0(/;"	d
bfin_write_CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_ID0(/;"	d
bfin_write_CAN1_MB11_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_ID0(/;"	d
bfin_write_CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_ID1(/;"	d
bfin_write_CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_ID1(/;"	d
bfin_write_CAN1_MB11_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_ID1(/;"	d
bfin_write_CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_LENGTH(/;"	d
bfin_write_CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_LENGTH(/;"	d
bfin_write_CAN1_MB11_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_LENGTH(/;"	d
bfin_write_CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB11_TIMESTAMP(/;"	d
bfin_write_CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB11_TIMESTAMP(/;"	d
bfin_write_CAN1_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB11_TIMESTAMP(/;"	d
bfin_write_CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA0(/;"	d
bfin_write_CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA0(/;"	d
bfin_write_CAN1_MB12_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA0(/;"	d
bfin_write_CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA1(/;"	d
bfin_write_CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA1(/;"	d
bfin_write_CAN1_MB12_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA1(/;"	d
bfin_write_CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA2(/;"	d
bfin_write_CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA2(/;"	d
bfin_write_CAN1_MB12_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA2(/;"	d
bfin_write_CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA3(/;"	d
bfin_write_CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA3(/;"	d
bfin_write_CAN1_MB12_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_DATA3(/;"	d
bfin_write_CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_ID0(/;"	d
bfin_write_CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_ID0(/;"	d
bfin_write_CAN1_MB12_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_ID0(/;"	d
bfin_write_CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_ID1(/;"	d
bfin_write_CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_ID1(/;"	d
bfin_write_CAN1_MB12_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_ID1(/;"	d
bfin_write_CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_LENGTH(/;"	d
bfin_write_CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_LENGTH(/;"	d
bfin_write_CAN1_MB12_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_LENGTH(/;"	d
bfin_write_CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB12_TIMESTAMP(/;"	d
bfin_write_CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB12_TIMESTAMP(/;"	d
bfin_write_CAN1_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB12_TIMESTAMP(/;"	d
bfin_write_CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA0(/;"	d
bfin_write_CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA0(/;"	d
bfin_write_CAN1_MB13_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA0(/;"	d
bfin_write_CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA1(/;"	d
bfin_write_CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA1(/;"	d
bfin_write_CAN1_MB13_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA1(/;"	d
bfin_write_CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA2(/;"	d
bfin_write_CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA2(/;"	d
bfin_write_CAN1_MB13_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA2(/;"	d
bfin_write_CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA3(/;"	d
bfin_write_CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA3(/;"	d
bfin_write_CAN1_MB13_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_DATA3(/;"	d
bfin_write_CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_ID0(/;"	d
bfin_write_CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_ID0(/;"	d
bfin_write_CAN1_MB13_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_ID0(/;"	d
bfin_write_CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_ID1(/;"	d
bfin_write_CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_ID1(/;"	d
bfin_write_CAN1_MB13_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_ID1(/;"	d
bfin_write_CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_LENGTH(/;"	d
bfin_write_CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_LENGTH(/;"	d
bfin_write_CAN1_MB13_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_LENGTH(/;"	d
bfin_write_CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB13_TIMESTAMP(/;"	d
bfin_write_CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB13_TIMESTAMP(/;"	d
bfin_write_CAN1_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB13_TIMESTAMP(/;"	d
bfin_write_CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA0(/;"	d
bfin_write_CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA0(/;"	d
bfin_write_CAN1_MB14_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA0(/;"	d
bfin_write_CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA1(/;"	d
bfin_write_CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA1(/;"	d
bfin_write_CAN1_MB14_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA1(/;"	d
bfin_write_CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA2(/;"	d
bfin_write_CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA2(/;"	d
bfin_write_CAN1_MB14_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA2(/;"	d
bfin_write_CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA3(/;"	d
bfin_write_CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA3(/;"	d
bfin_write_CAN1_MB14_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_DATA3(/;"	d
bfin_write_CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_ID0(/;"	d
bfin_write_CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_ID0(/;"	d
bfin_write_CAN1_MB14_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_ID0(/;"	d
bfin_write_CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_ID1(/;"	d
bfin_write_CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_ID1(/;"	d
bfin_write_CAN1_MB14_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_ID1(/;"	d
bfin_write_CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_LENGTH(/;"	d
bfin_write_CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_LENGTH(/;"	d
bfin_write_CAN1_MB14_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_LENGTH(/;"	d
bfin_write_CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB14_TIMESTAMP(/;"	d
bfin_write_CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB14_TIMESTAMP(/;"	d
bfin_write_CAN1_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB14_TIMESTAMP(/;"	d
bfin_write_CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA0(/;"	d
bfin_write_CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA0(/;"	d
bfin_write_CAN1_MB15_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA0(/;"	d
bfin_write_CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA1(/;"	d
bfin_write_CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA1(/;"	d
bfin_write_CAN1_MB15_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA1(/;"	d
bfin_write_CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA2(/;"	d
bfin_write_CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA2(/;"	d
bfin_write_CAN1_MB15_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA2(/;"	d
bfin_write_CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA3(/;"	d
bfin_write_CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA3(/;"	d
bfin_write_CAN1_MB15_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_DATA3(/;"	d
bfin_write_CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_ID0(/;"	d
bfin_write_CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_ID0(/;"	d
bfin_write_CAN1_MB15_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_ID0(/;"	d
bfin_write_CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_ID1(/;"	d
bfin_write_CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_ID1(/;"	d
bfin_write_CAN1_MB15_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_ID1(/;"	d
bfin_write_CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_LENGTH(/;"	d
bfin_write_CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_LENGTH(/;"	d
bfin_write_CAN1_MB15_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_LENGTH(/;"	d
bfin_write_CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB15_TIMESTAMP(/;"	d
bfin_write_CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB15_TIMESTAMP(/;"	d
bfin_write_CAN1_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB15_TIMESTAMP(/;"	d
bfin_write_CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA0(/;"	d
bfin_write_CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA0(/;"	d
bfin_write_CAN1_MB16_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA0(/;"	d
bfin_write_CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA1(/;"	d
bfin_write_CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA1(/;"	d
bfin_write_CAN1_MB16_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA1(/;"	d
bfin_write_CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA2(/;"	d
bfin_write_CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA2(/;"	d
bfin_write_CAN1_MB16_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA2(/;"	d
bfin_write_CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA3(/;"	d
bfin_write_CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA3(/;"	d
bfin_write_CAN1_MB16_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_DATA3(/;"	d
bfin_write_CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_ID0(/;"	d
bfin_write_CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_ID0(/;"	d
bfin_write_CAN1_MB16_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_ID0(/;"	d
bfin_write_CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_ID1(/;"	d
bfin_write_CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_ID1(/;"	d
bfin_write_CAN1_MB16_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_ID1(/;"	d
bfin_write_CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_LENGTH(/;"	d
bfin_write_CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_LENGTH(/;"	d
bfin_write_CAN1_MB16_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_LENGTH(/;"	d
bfin_write_CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB16_TIMESTAMP(/;"	d
bfin_write_CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB16_TIMESTAMP(/;"	d
bfin_write_CAN1_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB16_TIMESTAMP(/;"	d
bfin_write_CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA0(/;"	d
bfin_write_CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA0(/;"	d
bfin_write_CAN1_MB17_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA0(/;"	d
bfin_write_CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA1(/;"	d
bfin_write_CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA1(/;"	d
bfin_write_CAN1_MB17_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA1(/;"	d
bfin_write_CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA2(/;"	d
bfin_write_CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA2(/;"	d
bfin_write_CAN1_MB17_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA2(/;"	d
bfin_write_CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA3(/;"	d
bfin_write_CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA3(/;"	d
bfin_write_CAN1_MB17_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_DATA3(/;"	d
bfin_write_CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_ID0(/;"	d
bfin_write_CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_ID0(/;"	d
bfin_write_CAN1_MB17_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_ID0(/;"	d
bfin_write_CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_ID1(/;"	d
bfin_write_CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_ID1(/;"	d
bfin_write_CAN1_MB17_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_ID1(/;"	d
bfin_write_CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_LENGTH(/;"	d
bfin_write_CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_LENGTH(/;"	d
bfin_write_CAN1_MB17_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_LENGTH(/;"	d
bfin_write_CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB17_TIMESTAMP(/;"	d
bfin_write_CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB17_TIMESTAMP(/;"	d
bfin_write_CAN1_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB17_TIMESTAMP(/;"	d
bfin_write_CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA0(/;"	d
bfin_write_CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA0(/;"	d
bfin_write_CAN1_MB18_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA0(/;"	d
bfin_write_CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA1(/;"	d
bfin_write_CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA1(/;"	d
bfin_write_CAN1_MB18_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA1(/;"	d
bfin_write_CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA2(/;"	d
bfin_write_CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA2(/;"	d
bfin_write_CAN1_MB18_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA2(/;"	d
bfin_write_CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA3(/;"	d
bfin_write_CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA3(/;"	d
bfin_write_CAN1_MB18_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_DATA3(/;"	d
bfin_write_CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_ID0(/;"	d
bfin_write_CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_ID0(/;"	d
bfin_write_CAN1_MB18_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_ID0(/;"	d
bfin_write_CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_ID1(/;"	d
bfin_write_CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_ID1(/;"	d
bfin_write_CAN1_MB18_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_ID1(/;"	d
bfin_write_CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_LENGTH(/;"	d
bfin_write_CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_LENGTH(/;"	d
bfin_write_CAN1_MB18_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_LENGTH(/;"	d
bfin_write_CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB18_TIMESTAMP(/;"	d
bfin_write_CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB18_TIMESTAMP(/;"	d
bfin_write_CAN1_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB18_TIMESTAMP(/;"	d
bfin_write_CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA0(/;"	d
bfin_write_CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA0(/;"	d
bfin_write_CAN1_MB19_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA0(/;"	d
bfin_write_CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA1(/;"	d
bfin_write_CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA1(/;"	d
bfin_write_CAN1_MB19_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA1(/;"	d
bfin_write_CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA2(/;"	d
bfin_write_CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA2(/;"	d
bfin_write_CAN1_MB19_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA2(/;"	d
bfin_write_CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA3(/;"	d
bfin_write_CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA3(/;"	d
bfin_write_CAN1_MB19_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_DATA3(/;"	d
bfin_write_CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_ID0(/;"	d
bfin_write_CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_ID0(/;"	d
bfin_write_CAN1_MB19_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_ID0(/;"	d
bfin_write_CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_ID1(/;"	d
bfin_write_CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_ID1(/;"	d
bfin_write_CAN1_MB19_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_ID1(/;"	d
bfin_write_CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_LENGTH(/;"	d
bfin_write_CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_LENGTH(/;"	d
bfin_write_CAN1_MB19_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_LENGTH(/;"	d
bfin_write_CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB19_TIMESTAMP(/;"	d
bfin_write_CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB19_TIMESTAMP(/;"	d
bfin_write_CAN1_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB19_TIMESTAMP(/;"	d
bfin_write_CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA0(/;"	d
bfin_write_CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA0(/;"	d
bfin_write_CAN1_MB20_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA0(/;"	d
bfin_write_CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA1(/;"	d
bfin_write_CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA1(/;"	d
bfin_write_CAN1_MB20_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA1(/;"	d
bfin_write_CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA2(/;"	d
bfin_write_CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA2(/;"	d
bfin_write_CAN1_MB20_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA2(/;"	d
bfin_write_CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA3(/;"	d
bfin_write_CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA3(/;"	d
bfin_write_CAN1_MB20_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_DATA3(/;"	d
bfin_write_CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_ID0(/;"	d
bfin_write_CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_ID0(/;"	d
bfin_write_CAN1_MB20_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_ID0(/;"	d
bfin_write_CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_ID1(/;"	d
bfin_write_CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_ID1(/;"	d
bfin_write_CAN1_MB20_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_ID1(/;"	d
bfin_write_CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_LENGTH(/;"	d
bfin_write_CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_LENGTH(/;"	d
bfin_write_CAN1_MB20_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_LENGTH(/;"	d
bfin_write_CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB20_TIMESTAMP(/;"	d
bfin_write_CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB20_TIMESTAMP(/;"	d
bfin_write_CAN1_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB20_TIMESTAMP(/;"	d
bfin_write_CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA0(/;"	d
bfin_write_CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA0(/;"	d
bfin_write_CAN1_MB21_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA0(/;"	d
bfin_write_CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA1(/;"	d
bfin_write_CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA1(/;"	d
bfin_write_CAN1_MB21_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA1(/;"	d
bfin_write_CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA2(/;"	d
bfin_write_CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA2(/;"	d
bfin_write_CAN1_MB21_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA2(/;"	d
bfin_write_CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA3(/;"	d
bfin_write_CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA3(/;"	d
bfin_write_CAN1_MB21_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_DATA3(/;"	d
bfin_write_CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_ID0(/;"	d
bfin_write_CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_ID0(/;"	d
bfin_write_CAN1_MB21_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_ID0(/;"	d
bfin_write_CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_ID1(/;"	d
bfin_write_CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_ID1(/;"	d
bfin_write_CAN1_MB21_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_ID1(/;"	d
bfin_write_CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_LENGTH(/;"	d
bfin_write_CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_LENGTH(/;"	d
bfin_write_CAN1_MB21_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_LENGTH(/;"	d
bfin_write_CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB21_TIMESTAMP(/;"	d
bfin_write_CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB21_TIMESTAMP(/;"	d
bfin_write_CAN1_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB21_TIMESTAMP(/;"	d
bfin_write_CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA0(/;"	d
bfin_write_CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA0(/;"	d
bfin_write_CAN1_MB22_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA0(/;"	d
bfin_write_CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA1(/;"	d
bfin_write_CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA1(/;"	d
bfin_write_CAN1_MB22_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA1(/;"	d
bfin_write_CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA2(/;"	d
bfin_write_CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA2(/;"	d
bfin_write_CAN1_MB22_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA2(/;"	d
bfin_write_CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA3(/;"	d
bfin_write_CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA3(/;"	d
bfin_write_CAN1_MB22_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_DATA3(/;"	d
bfin_write_CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_ID0(/;"	d
bfin_write_CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_ID0(/;"	d
bfin_write_CAN1_MB22_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_ID0(/;"	d
bfin_write_CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_ID1(/;"	d
bfin_write_CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_ID1(/;"	d
bfin_write_CAN1_MB22_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_ID1(/;"	d
bfin_write_CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_LENGTH(/;"	d
bfin_write_CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_LENGTH(/;"	d
bfin_write_CAN1_MB22_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_LENGTH(/;"	d
bfin_write_CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB22_TIMESTAMP(/;"	d
bfin_write_CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB22_TIMESTAMP(/;"	d
bfin_write_CAN1_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB22_TIMESTAMP(/;"	d
bfin_write_CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA0(/;"	d
bfin_write_CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA0(/;"	d
bfin_write_CAN1_MB23_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA0(/;"	d
bfin_write_CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA1(/;"	d
bfin_write_CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA1(/;"	d
bfin_write_CAN1_MB23_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA1(/;"	d
bfin_write_CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA2(/;"	d
bfin_write_CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA2(/;"	d
bfin_write_CAN1_MB23_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA2(/;"	d
bfin_write_CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA3(/;"	d
bfin_write_CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA3(/;"	d
bfin_write_CAN1_MB23_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_DATA3(/;"	d
bfin_write_CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_ID0(/;"	d
bfin_write_CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_ID0(/;"	d
bfin_write_CAN1_MB23_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_ID0(/;"	d
bfin_write_CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_ID1(/;"	d
bfin_write_CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_ID1(/;"	d
bfin_write_CAN1_MB23_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_ID1(/;"	d
bfin_write_CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_LENGTH(/;"	d
bfin_write_CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_LENGTH(/;"	d
bfin_write_CAN1_MB23_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_LENGTH(/;"	d
bfin_write_CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB23_TIMESTAMP(/;"	d
bfin_write_CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB23_TIMESTAMP(/;"	d
bfin_write_CAN1_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB23_TIMESTAMP(/;"	d
bfin_write_CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA0(/;"	d
bfin_write_CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA0(/;"	d
bfin_write_CAN1_MB24_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA0(/;"	d
bfin_write_CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA1(/;"	d
bfin_write_CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA1(/;"	d
bfin_write_CAN1_MB24_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA1(/;"	d
bfin_write_CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA2(/;"	d
bfin_write_CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA2(/;"	d
bfin_write_CAN1_MB24_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA2(/;"	d
bfin_write_CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA3(/;"	d
bfin_write_CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA3(/;"	d
bfin_write_CAN1_MB24_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_DATA3(/;"	d
bfin_write_CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_ID0(/;"	d
bfin_write_CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_ID0(/;"	d
bfin_write_CAN1_MB24_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_ID0(/;"	d
bfin_write_CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_ID1(/;"	d
bfin_write_CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_ID1(/;"	d
bfin_write_CAN1_MB24_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_ID1(/;"	d
bfin_write_CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_LENGTH(/;"	d
bfin_write_CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_LENGTH(/;"	d
bfin_write_CAN1_MB24_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_LENGTH(/;"	d
bfin_write_CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB24_TIMESTAMP(/;"	d
bfin_write_CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB24_TIMESTAMP(/;"	d
bfin_write_CAN1_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB24_TIMESTAMP(/;"	d
bfin_write_CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA0(/;"	d
bfin_write_CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA0(/;"	d
bfin_write_CAN1_MB25_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA0(/;"	d
bfin_write_CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA1(/;"	d
bfin_write_CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA1(/;"	d
bfin_write_CAN1_MB25_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA1(/;"	d
bfin_write_CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA2(/;"	d
bfin_write_CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA2(/;"	d
bfin_write_CAN1_MB25_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA2(/;"	d
bfin_write_CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA3(/;"	d
bfin_write_CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA3(/;"	d
bfin_write_CAN1_MB25_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_DATA3(/;"	d
bfin_write_CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_ID0(/;"	d
bfin_write_CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_ID0(/;"	d
bfin_write_CAN1_MB25_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_ID0(/;"	d
bfin_write_CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_ID1(/;"	d
bfin_write_CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_ID1(/;"	d
bfin_write_CAN1_MB25_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_ID1(/;"	d
bfin_write_CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_LENGTH(/;"	d
bfin_write_CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_LENGTH(/;"	d
bfin_write_CAN1_MB25_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_LENGTH(/;"	d
bfin_write_CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB25_TIMESTAMP(/;"	d
bfin_write_CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB25_TIMESTAMP(/;"	d
bfin_write_CAN1_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB25_TIMESTAMP(/;"	d
bfin_write_CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA0(/;"	d
bfin_write_CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA0(/;"	d
bfin_write_CAN1_MB26_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA0(/;"	d
bfin_write_CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA1(/;"	d
bfin_write_CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA1(/;"	d
bfin_write_CAN1_MB26_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA1(/;"	d
bfin_write_CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA2(/;"	d
bfin_write_CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA2(/;"	d
bfin_write_CAN1_MB26_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA2(/;"	d
bfin_write_CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA3(/;"	d
bfin_write_CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA3(/;"	d
bfin_write_CAN1_MB26_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_DATA3(/;"	d
bfin_write_CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_ID0(/;"	d
bfin_write_CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_ID0(/;"	d
bfin_write_CAN1_MB26_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_ID0(/;"	d
bfin_write_CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_ID1(/;"	d
bfin_write_CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_ID1(/;"	d
bfin_write_CAN1_MB26_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_ID1(/;"	d
bfin_write_CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_LENGTH(/;"	d
bfin_write_CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_LENGTH(/;"	d
bfin_write_CAN1_MB26_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_LENGTH(/;"	d
bfin_write_CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB26_TIMESTAMP(/;"	d
bfin_write_CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB26_TIMESTAMP(/;"	d
bfin_write_CAN1_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB26_TIMESTAMP(/;"	d
bfin_write_CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA0(/;"	d
bfin_write_CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA0(/;"	d
bfin_write_CAN1_MB27_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA0(/;"	d
bfin_write_CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA1(/;"	d
bfin_write_CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA1(/;"	d
bfin_write_CAN1_MB27_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA1(/;"	d
bfin_write_CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA2(/;"	d
bfin_write_CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA2(/;"	d
bfin_write_CAN1_MB27_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA2(/;"	d
bfin_write_CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA3(/;"	d
bfin_write_CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA3(/;"	d
bfin_write_CAN1_MB27_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_DATA3(/;"	d
bfin_write_CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_ID0(/;"	d
bfin_write_CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_ID0(/;"	d
bfin_write_CAN1_MB27_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_ID0(/;"	d
bfin_write_CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_ID1(/;"	d
bfin_write_CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_ID1(/;"	d
bfin_write_CAN1_MB27_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_ID1(/;"	d
bfin_write_CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_LENGTH(/;"	d
bfin_write_CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_LENGTH(/;"	d
bfin_write_CAN1_MB27_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_LENGTH(/;"	d
bfin_write_CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB27_TIMESTAMP(/;"	d
bfin_write_CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB27_TIMESTAMP(/;"	d
bfin_write_CAN1_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB27_TIMESTAMP(/;"	d
bfin_write_CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA0(/;"	d
bfin_write_CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA0(/;"	d
bfin_write_CAN1_MB28_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA0(/;"	d
bfin_write_CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA1(/;"	d
bfin_write_CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA1(/;"	d
bfin_write_CAN1_MB28_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA1(/;"	d
bfin_write_CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA2(/;"	d
bfin_write_CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA2(/;"	d
bfin_write_CAN1_MB28_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA2(/;"	d
bfin_write_CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA3(/;"	d
bfin_write_CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA3(/;"	d
bfin_write_CAN1_MB28_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_DATA3(/;"	d
bfin_write_CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_ID0(/;"	d
bfin_write_CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_ID0(/;"	d
bfin_write_CAN1_MB28_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_ID0(/;"	d
bfin_write_CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_ID1(/;"	d
bfin_write_CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_ID1(/;"	d
bfin_write_CAN1_MB28_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_ID1(/;"	d
bfin_write_CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_LENGTH(/;"	d
bfin_write_CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_LENGTH(/;"	d
bfin_write_CAN1_MB28_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_LENGTH(/;"	d
bfin_write_CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB28_TIMESTAMP(/;"	d
bfin_write_CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB28_TIMESTAMP(/;"	d
bfin_write_CAN1_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB28_TIMESTAMP(/;"	d
bfin_write_CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA0(/;"	d
bfin_write_CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA0(/;"	d
bfin_write_CAN1_MB29_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA0(/;"	d
bfin_write_CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA1(/;"	d
bfin_write_CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA1(/;"	d
bfin_write_CAN1_MB29_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA1(/;"	d
bfin_write_CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA2(/;"	d
bfin_write_CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA2(/;"	d
bfin_write_CAN1_MB29_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA2(/;"	d
bfin_write_CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA3(/;"	d
bfin_write_CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA3(/;"	d
bfin_write_CAN1_MB29_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_DATA3(/;"	d
bfin_write_CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_ID0(/;"	d
bfin_write_CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_ID0(/;"	d
bfin_write_CAN1_MB29_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_ID0(/;"	d
bfin_write_CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_ID1(/;"	d
bfin_write_CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_ID1(/;"	d
bfin_write_CAN1_MB29_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_ID1(/;"	d
bfin_write_CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_LENGTH(/;"	d
bfin_write_CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_LENGTH(/;"	d
bfin_write_CAN1_MB29_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_LENGTH(/;"	d
bfin_write_CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB29_TIMESTAMP(/;"	d
bfin_write_CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB29_TIMESTAMP(/;"	d
bfin_write_CAN1_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB29_TIMESTAMP(/;"	d
bfin_write_CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA0(/;"	d
bfin_write_CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA0(/;"	d
bfin_write_CAN1_MB30_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA0(/;"	d
bfin_write_CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA1(/;"	d
bfin_write_CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA1(/;"	d
bfin_write_CAN1_MB30_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA1(/;"	d
bfin_write_CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA2(/;"	d
bfin_write_CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA2(/;"	d
bfin_write_CAN1_MB30_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA2(/;"	d
bfin_write_CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA3(/;"	d
bfin_write_CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA3(/;"	d
bfin_write_CAN1_MB30_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_DATA3(/;"	d
bfin_write_CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_ID0(/;"	d
bfin_write_CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_ID0(/;"	d
bfin_write_CAN1_MB30_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_ID0(/;"	d
bfin_write_CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_ID1(/;"	d
bfin_write_CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_ID1(/;"	d
bfin_write_CAN1_MB30_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_ID1(/;"	d
bfin_write_CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_LENGTH(/;"	d
bfin_write_CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_LENGTH(/;"	d
bfin_write_CAN1_MB30_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_LENGTH(/;"	d
bfin_write_CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB30_TIMESTAMP(/;"	d
bfin_write_CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB30_TIMESTAMP(/;"	d
bfin_write_CAN1_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB30_TIMESTAMP(/;"	d
bfin_write_CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA0(/;"	d
bfin_write_CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA0(/;"	d
bfin_write_CAN1_MB31_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA0(/;"	d
bfin_write_CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA1(/;"	d
bfin_write_CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA1(/;"	d
bfin_write_CAN1_MB31_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA1(/;"	d
bfin_write_CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA2(/;"	d
bfin_write_CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA2(/;"	d
bfin_write_CAN1_MB31_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA2(/;"	d
bfin_write_CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA3(/;"	d
bfin_write_CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA3(/;"	d
bfin_write_CAN1_MB31_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_DATA3(/;"	d
bfin_write_CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_ID0(/;"	d
bfin_write_CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_ID0(/;"	d
bfin_write_CAN1_MB31_ID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_ID0(/;"	d
bfin_write_CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_ID1(/;"	d
bfin_write_CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_ID1(/;"	d
bfin_write_CAN1_MB31_ID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_ID1(/;"	d
bfin_write_CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_LENGTH(/;"	d
bfin_write_CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_LENGTH(/;"	d
bfin_write_CAN1_MB31_LENGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_LENGTH(/;"	d
bfin_write_CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MB31_TIMESTAMP(/;"	d
bfin_write_CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MB31_TIMESTAMP(/;"	d
bfin_write_CAN1_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MB31_TIMESTAMP(/;"	d
bfin_write_CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBIM1(/;"	d
bfin_write_CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBIM1(/;"	d
bfin_write_CAN1_MBIM1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBIM1(/;"	d
bfin_write_CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBIM2(/;"	d
bfin_write_CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBIM2(/;"	d
bfin_write_CAN1_MBIM2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBIM2(/;"	d
bfin_write_CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBRIF1(/;"	d
bfin_write_CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBRIF1(/;"	d
bfin_write_CAN1_MBRIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBRIF1(/;"	d
bfin_write_CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBRIF2(/;"	d
bfin_write_CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBRIF2(/;"	d
bfin_write_CAN1_MBRIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBRIF2(/;"	d
bfin_write_CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBTD(/;"	d
bfin_write_CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBTD(/;"	d
bfin_write_CAN1_MBTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBTD(/;"	d
bfin_write_CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBTIF1(/;"	d
bfin_write_CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBTIF1(/;"	d
bfin_write_CAN1_MBTIF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBTIF1(/;"	d
bfin_write_CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MBTIF2(/;"	d
bfin_write_CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MBTIF2(/;"	d
bfin_write_CAN1_MBTIF2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MBTIF2(/;"	d
bfin_write_CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MC1(/;"	d
bfin_write_CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MC1(/;"	d
bfin_write_CAN1_MC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MC1(/;"	d
bfin_write_CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MC2(/;"	d
bfin_write_CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MC2(/;"	d
bfin_write_CAN1_MC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MC2(/;"	d
bfin_write_CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MD1(/;"	d
bfin_write_CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MD1(/;"	d
bfin_write_CAN1_MD1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MD1(/;"	d
bfin_write_CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_MD2(/;"	d
bfin_write_CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_MD2(/;"	d
bfin_write_CAN1_MD2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_MD2(/;"	d
bfin_write_CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_OPSS1(/;"	d
bfin_write_CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_OPSS1(/;"	d
bfin_write_CAN1_OPSS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_OPSS1(/;"	d
bfin_write_CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_OPSS2(/;"	d
bfin_write_CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_OPSS2(/;"	d
bfin_write_CAN1_OPSS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_OPSS2(/;"	d
bfin_write_CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_RFH1(/;"	d
bfin_write_CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_RFH1(/;"	d
bfin_write_CAN1_RFH1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_RFH1(/;"	d
bfin_write_CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_RFH2(/;"	d
bfin_write_CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_RFH2(/;"	d
bfin_write_CAN1_RFH2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_RFH2(/;"	d
bfin_write_CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_RML1(/;"	d
bfin_write_CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_RML1(/;"	d
bfin_write_CAN1_RML1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_RML1(/;"	d
bfin_write_CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_RML2(/;"	d
bfin_write_CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_RML2(/;"	d
bfin_write_CAN1_RML2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_RML2(/;"	d
bfin_write_CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_RMP1(/;"	d
bfin_write_CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_RMP1(/;"	d
bfin_write_CAN1_RMP1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_RMP1(/;"	d
bfin_write_CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_RMP2(/;"	d
bfin_write_CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_RMP2(/;"	d
bfin_write_CAN1_RMP2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_RMP2(/;"	d
bfin_write_CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_STATUS(/;"	d
bfin_write_CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_STATUS(/;"	d
bfin_write_CAN1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_STATUS(/;"	d
bfin_write_CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TA1(/;"	d
bfin_write_CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TA1(/;"	d
bfin_write_CAN1_TA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TA1(/;"	d
bfin_write_CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TA2(/;"	d
bfin_write_CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TA2(/;"	d
bfin_write_CAN1_TA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TA2(/;"	d
bfin_write_CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TIMING(/;"	d
bfin_write_CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TIMING(/;"	d
bfin_write_CAN1_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TIMING(/;"	d
bfin_write_CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TRR1(/;"	d
bfin_write_CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TRR1(/;"	d
bfin_write_CAN1_TRR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TRR1(/;"	d
bfin_write_CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TRR2(/;"	d
bfin_write_CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TRR2(/;"	d
bfin_write_CAN1_TRR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TRR2(/;"	d
bfin_write_CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TRS1(/;"	d
bfin_write_CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TRS1(/;"	d
bfin_write_CAN1_TRS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TRS1(/;"	d
bfin_write_CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_TRS2(/;"	d
bfin_write_CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_TRS2(/;"	d
bfin_write_CAN1_TRS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_TRS2(/;"	d
bfin_write_CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_UCCNF(/;"	d
bfin_write_CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_UCCNF(/;"	d
bfin_write_CAN1_UCCNF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_UCCNF(/;"	d
bfin_write_CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_UCCNT(/;"	d
bfin_write_CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_UCCNT(/;"	d
bfin_write_CAN1_UCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_UCCNT(/;"	d
bfin_write_CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CAN1_UCRC(/;"	d
bfin_write_CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CAN1_UCRC(/;"	d
bfin_write_CAN1_UCRC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CAN1_UCRC(/;"	d
bfin_write_CAN_AA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AA1(/;"	d
bfin_write_CAN_AA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AA1(/;"	d
bfin_write_CAN_AA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AA1(/;"	d
bfin_write_CAN_AA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AA2(/;"	d
bfin_write_CAN_AA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AA2(/;"	d
bfin_write_CAN_AA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AA2(/;"	d
bfin_write_CAN_AM00H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM00H(/;"	d
bfin_write_CAN_AM00H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM00H(/;"	d
bfin_write_CAN_AM00H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM00H(/;"	d
bfin_write_CAN_AM00L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM00L(/;"	d
bfin_write_CAN_AM00L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM00L(/;"	d
bfin_write_CAN_AM00L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM00L(/;"	d
bfin_write_CAN_AM01H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM01H(/;"	d
bfin_write_CAN_AM01H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM01H(/;"	d
bfin_write_CAN_AM01H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM01H(/;"	d
bfin_write_CAN_AM01L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM01L(/;"	d
bfin_write_CAN_AM01L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM01L(/;"	d
bfin_write_CAN_AM01L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM01L(/;"	d
bfin_write_CAN_AM02H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM02H(/;"	d
bfin_write_CAN_AM02H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM02H(/;"	d
bfin_write_CAN_AM02H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM02H(/;"	d
bfin_write_CAN_AM02L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM02L(/;"	d
bfin_write_CAN_AM02L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM02L(/;"	d
bfin_write_CAN_AM02L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM02L(/;"	d
bfin_write_CAN_AM03H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM03H(/;"	d
bfin_write_CAN_AM03H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM03H(/;"	d
bfin_write_CAN_AM03H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM03H(/;"	d
bfin_write_CAN_AM03L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM03L(/;"	d
bfin_write_CAN_AM03L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM03L(/;"	d
bfin_write_CAN_AM03L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM03L(/;"	d
bfin_write_CAN_AM04H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM04H(/;"	d
bfin_write_CAN_AM04H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM04H(/;"	d
bfin_write_CAN_AM04H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM04H(/;"	d
bfin_write_CAN_AM04L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM04L(/;"	d
bfin_write_CAN_AM04L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM04L(/;"	d
bfin_write_CAN_AM04L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM04L(/;"	d
bfin_write_CAN_AM05H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM05H(/;"	d
bfin_write_CAN_AM05H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM05H(/;"	d
bfin_write_CAN_AM05H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM05H(/;"	d
bfin_write_CAN_AM05L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM05L(/;"	d
bfin_write_CAN_AM05L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM05L(/;"	d
bfin_write_CAN_AM05L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM05L(/;"	d
bfin_write_CAN_AM06H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM06H(/;"	d
bfin_write_CAN_AM06H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM06H(/;"	d
bfin_write_CAN_AM06H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM06H(/;"	d
bfin_write_CAN_AM06L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM06L(/;"	d
bfin_write_CAN_AM06L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM06L(/;"	d
bfin_write_CAN_AM06L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM06L(/;"	d
bfin_write_CAN_AM07H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM07H(/;"	d
bfin_write_CAN_AM07H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM07H(/;"	d
bfin_write_CAN_AM07H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM07H(/;"	d
bfin_write_CAN_AM07L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM07L(/;"	d
bfin_write_CAN_AM07L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM07L(/;"	d
bfin_write_CAN_AM07L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM07L(/;"	d
bfin_write_CAN_AM08H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM08H(/;"	d
bfin_write_CAN_AM08H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM08H(/;"	d
bfin_write_CAN_AM08H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM08H(/;"	d
bfin_write_CAN_AM08L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM08L(/;"	d
bfin_write_CAN_AM08L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM08L(/;"	d
bfin_write_CAN_AM08L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM08L(/;"	d
bfin_write_CAN_AM09H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM09H(/;"	d
bfin_write_CAN_AM09H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM09H(/;"	d
bfin_write_CAN_AM09H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM09H(/;"	d
bfin_write_CAN_AM09L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM09L(/;"	d
bfin_write_CAN_AM09L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM09L(/;"	d
bfin_write_CAN_AM09L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM09L(/;"	d
bfin_write_CAN_AM10H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM10H(/;"	d
bfin_write_CAN_AM10H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM10H(/;"	d
bfin_write_CAN_AM10H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM10H(/;"	d
bfin_write_CAN_AM10L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM10L(/;"	d
bfin_write_CAN_AM10L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM10L(/;"	d
bfin_write_CAN_AM10L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM10L(/;"	d
bfin_write_CAN_AM11H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM11H(/;"	d
bfin_write_CAN_AM11H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM11H(/;"	d
bfin_write_CAN_AM11H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM11H(/;"	d
bfin_write_CAN_AM11L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM11L(/;"	d
bfin_write_CAN_AM11L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM11L(/;"	d
bfin_write_CAN_AM11L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM11L(/;"	d
bfin_write_CAN_AM12H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM12H(/;"	d
bfin_write_CAN_AM12H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM12H(/;"	d
bfin_write_CAN_AM12H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM12H(/;"	d
bfin_write_CAN_AM12L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM12L(/;"	d
bfin_write_CAN_AM12L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM12L(/;"	d
bfin_write_CAN_AM12L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM12L(/;"	d
bfin_write_CAN_AM13H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM13H(/;"	d
bfin_write_CAN_AM13H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM13H(/;"	d
bfin_write_CAN_AM13H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM13H(/;"	d
bfin_write_CAN_AM13L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM13L(/;"	d
bfin_write_CAN_AM13L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM13L(/;"	d
bfin_write_CAN_AM13L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM13L(/;"	d
bfin_write_CAN_AM14H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM14H(/;"	d
bfin_write_CAN_AM14H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM14H(/;"	d
bfin_write_CAN_AM14H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM14H(/;"	d
bfin_write_CAN_AM14L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM14L(/;"	d
bfin_write_CAN_AM14L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM14L(/;"	d
bfin_write_CAN_AM14L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM14L(/;"	d
bfin_write_CAN_AM15H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM15H(/;"	d
bfin_write_CAN_AM15H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM15H(/;"	d
bfin_write_CAN_AM15H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM15H(/;"	d
bfin_write_CAN_AM15L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM15L(/;"	d
bfin_write_CAN_AM15L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM15L(/;"	d
bfin_write_CAN_AM15L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM15L(/;"	d
bfin_write_CAN_AM16H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM16H(/;"	d
bfin_write_CAN_AM16H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM16H(/;"	d
bfin_write_CAN_AM16H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM16H(/;"	d
bfin_write_CAN_AM16L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM16L(/;"	d
bfin_write_CAN_AM16L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM16L(/;"	d
bfin_write_CAN_AM16L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM16L(/;"	d
bfin_write_CAN_AM17H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM17H(/;"	d
bfin_write_CAN_AM17H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM17H(/;"	d
bfin_write_CAN_AM17H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM17H(/;"	d
bfin_write_CAN_AM17L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM17L(/;"	d
bfin_write_CAN_AM17L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM17L(/;"	d
bfin_write_CAN_AM17L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM17L(/;"	d
bfin_write_CAN_AM18H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM18H(/;"	d
bfin_write_CAN_AM18H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM18H(/;"	d
bfin_write_CAN_AM18H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM18H(/;"	d
bfin_write_CAN_AM18L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM18L(/;"	d
bfin_write_CAN_AM18L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM18L(/;"	d
bfin_write_CAN_AM18L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM18L(/;"	d
bfin_write_CAN_AM19H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM19H(/;"	d
bfin_write_CAN_AM19H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM19H(/;"	d
bfin_write_CAN_AM19H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM19H(/;"	d
bfin_write_CAN_AM19L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM19L(/;"	d
bfin_write_CAN_AM19L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM19L(/;"	d
bfin_write_CAN_AM19L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM19L(/;"	d
bfin_write_CAN_AM20H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM20H(/;"	d
bfin_write_CAN_AM20H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM20H(/;"	d
bfin_write_CAN_AM20H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM20H(/;"	d
bfin_write_CAN_AM20L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM20L(/;"	d
bfin_write_CAN_AM20L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM20L(/;"	d
bfin_write_CAN_AM20L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM20L(/;"	d
bfin_write_CAN_AM21H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM21H(/;"	d
bfin_write_CAN_AM21H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM21H(/;"	d
bfin_write_CAN_AM21H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM21H(/;"	d
bfin_write_CAN_AM21L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM21L(/;"	d
bfin_write_CAN_AM21L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM21L(/;"	d
bfin_write_CAN_AM21L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM21L(/;"	d
bfin_write_CAN_AM22H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM22H(/;"	d
bfin_write_CAN_AM22H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM22H(/;"	d
bfin_write_CAN_AM22H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM22H(/;"	d
bfin_write_CAN_AM22L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM22L(/;"	d
bfin_write_CAN_AM22L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM22L(/;"	d
bfin_write_CAN_AM22L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM22L(/;"	d
bfin_write_CAN_AM23H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM23H(/;"	d
bfin_write_CAN_AM23H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM23H(/;"	d
bfin_write_CAN_AM23H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM23H(/;"	d
bfin_write_CAN_AM23L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM23L(/;"	d
bfin_write_CAN_AM23L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM23L(/;"	d
bfin_write_CAN_AM23L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM23L(/;"	d
bfin_write_CAN_AM24H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM24H(/;"	d
bfin_write_CAN_AM24H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM24H(/;"	d
bfin_write_CAN_AM24H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM24H(/;"	d
bfin_write_CAN_AM24L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM24L(/;"	d
bfin_write_CAN_AM24L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM24L(/;"	d
bfin_write_CAN_AM24L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM24L(/;"	d
bfin_write_CAN_AM25H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM25H(/;"	d
bfin_write_CAN_AM25H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM25H(/;"	d
bfin_write_CAN_AM25H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM25H(/;"	d
bfin_write_CAN_AM25L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM25L(/;"	d
bfin_write_CAN_AM25L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM25L(/;"	d
bfin_write_CAN_AM25L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM25L(/;"	d
bfin_write_CAN_AM26H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM26H(/;"	d
bfin_write_CAN_AM26H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM26H(/;"	d
bfin_write_CAN_AM26H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM26H(/;"	d
bfin_write_CAN_AM26L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM26L(/;"	d
bfin_write_CAN_AM26L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM26L(/;"	d
bfin_write_CAN_AM26L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM26L(/;"	d
bfin_write_CAN_AM27H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM27H(/;"	d
bfin_write_CAN_AM27H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM27H(/;"	d
bfin_write_CAN_AM27H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM27H(/;"	d
bfin_write_CAN_AM27L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM27L(/;"	d
bfin_write_CAN_AM27L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM27L(/;"	d
bfin_write_CAN_AM27L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM27L(/;"	d
bfin_write_CAN_AM28H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM28H(/;"	d
bfin_write_CAN_AM28H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM28H(/;"	d
bfin_write_CAN_AM28H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM28H(/;"	d
bfin_write_CAN_AM28L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM28L(/;"	d
bfin_write_CAN_AM28L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM28L(/;"	d
bfin_write_CAN_AM28L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM28L(/;"	d
bfin_write_CAN_AM29H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM29H(/;"	d
bfin_write_CAN_AM29H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM29H(/;"	d
bfin_write_CAN_AM29H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM29H(/;"	d
bfin_write_CAN_AM29L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM29L(/;"	d
bfin_write_CAN_AM29L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM29L(/;"	d
bfin_write_CAN_AM29L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM29L(/;"	d
bfin_write_CAN_AM30H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM30H(/;"	d
bfin_write_CAN_AM30H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM30H(/;"	d
bfin_write_CAN_AM30H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM30H(/;"	d
bfin_write_CAN_AM30L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM30L(/;"	d
bfin_write_CAN_AM30L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM30L(/;"	d
bfin_write_CAN_AM30L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM30L(/;"	d
bfin_write_CAN_AM31H	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM31H(/;"	d
bfin_write_CAN_AM31H	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM31H(/;"	d
bfin_write_CAN_AM31H	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM31H(/;"	d
bfin_write_CAN_AM31L	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_AM31L(/;"	d
bfin_write_CAN_AM31L	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_AM31L(/;"	d
bfin_write_CAN_AM31L	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_AM31L(/;"	d
bfin_write_CAN_CEC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_CEC(/;"	d
bfin_write_CAN_CEC	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_CEC(/;"	d
bfin_write_CAN_CEC	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_CEC(/;"	d
bfin_write_CAN_CLOCK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_CLOCK(/;"	d
bfin_write_CAN_CLOCK	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_CLOCK(/;"	d
bfin_write_CAN_CLOCK	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_CLOCK(/;"	d
bfin_write_CAN_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_CONTROL(/;"	d
bfin_write_CAN_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_CONTROL(/;"	d
bfin_write_CAN_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_CONTROL(/;"	d
bfin_write_CAN_DEBUG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_DEBUG(/;"	d
bfin_write_CAN_DEBUG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_DEBUG(/;"	d
bfin_write_CAN_DEBUG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_DEBUG(/;"	d
bfin_write_CAN_ESR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_ESR(/;"	d
bfin_write_CAN_ESR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_ESR(/;"	d
bfin_write_CAN_ESR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_ESR(/;"	d
bfin_write_CAN_EWR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_EWR(/;"	d
bfin_write_CAN_EWR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_EWR(/;"	d
bfin_write_CAN_EWR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_EWR(/;"	d
bfin_write_CAN_GIF	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_GIF(/;"	d
bfin_write_CAN_GIF	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_GIF(/;"	d
bfin_write_CAN_GIF	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_GIF(/;"	d
bfin_write_CAN_GIM	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_GIM(/;"	d
bfin_write_CAN_GIM	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_GIM(/;"	d
bfin_write_CAN_GIM	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_GIM(/;"	d
bfin_write_CAN_GIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_GIS(/;"	d
bfin_write_CAN_GIS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_GIS(/;"	d
bfin_write_CAN_GIS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_GIS(/;"	d
bfin_write_CAN_INTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_INTR(/;"	d
bfin_write_CAN_INTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_INTR(/;"	d
bfin_write_CAN_INTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_INTR(/;"	d
bfin_write_CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_DATA0(/;"	d
bfin_write_CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_DATA0(/;"	d
bfin_write_CAN_MB00_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_DATA0(/;"	d
bfin_write_CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_DATA1(/;"	d
bfin_write_CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_DATA1(/;"	d
bfin_write_CAN_MB00_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_DATA1(/;"	d
bfin_write_CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_DATA2(/;"	d
bfin_write_CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_DATA2(/;"	d
bfin_write_CAN_MB00_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_DATA2(/;"	d
bfin_write_CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_DATA3(/;"	d
bfin_write_CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_DATA3(/;"	d
bfin_write_CAN_MB00_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_DATA3(/;"	d
bfin_write_CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_ID0(/;"	d
bfin_write_CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_ID0(/;"	d
bfin_write_CAN_MB00_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_ID0(/;"	d
bfin_write_CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_ID1(/;"	d
bfin_write_CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_ID1(/;"	d
bfin_write_CAN_MB00_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_ID1(/;"	d
bfin_write_CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_LENGTH(/;"	d
bfin_write_CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_LENGTH(/;"	d
bfin_write_CAN_MB00_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_LENGTH(/;"	d
bfin_write_CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB00_TIMESTAMP(/;"	d
bfin_write_CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB00_TIMESTAMP(/;"	d
bfin_write_CAN_MB00_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB00_TIMESTAMP(/;"	d
bfin_write_CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_DATA0(/;"	d
bfin_write_CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_DATA0(/;"	d
bfin_write_CAN_MB01_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_DATA0(/;"	d
bfin_write_CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_DATA1(/;"	d
bfin_write_CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_DATA1(/;"	d
bfin_write_CAN_MB01_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_DATA1(/;"	d
bfin_write_CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_DATA2(/;"	d
bfin_write_CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_DATA2(/;"	d
bfin_write_CAN_MB01_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_DATA2(/;"	d
bfin_write_CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_DATA3(/;"	d
bfin_write_CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_DATA3(/;"	d
bfin_write_CAN_MB01_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_DATA3(/;"	d
bfin_write_CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_ID0(/;"	d
bfin_write_CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_ID0(/;"	d
bfin_write_CAN_MB01_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_ID0(/;"	d
bfin_write_CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_ID1(/;"	d
bfin_write_CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_ID1(/;"	d
bfin_write_CAN_MB01_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_ID1(/;"	d
bfin_write_CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_LENGTH(/;"	d
bfin_write_CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_LENGTH(/;"	d
bfin_write_CAN_MB01_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_LENGTH(/;"	d
bfin_write_CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB01_TIMESTAMP(/;"	d
bfin_write_CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB01_TIMESTAMP(/;"	d
bfin_write_CAN_MB01_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB01_TIMESTAMP(/;"	d
bfin_write_CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_DATA0(/;"	d
bfin_write_CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_DATA0(/;"	d
bfin_write_CAN_MB02_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_DATA0(/;"	d
bfin_write_CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_DATA1(/;"	d
bfin_write_CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_DATA1(/;"	d
bfin_write_CAN_MB02_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_DATA1(/;"	d
bfin_write_CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_DATA2(/;"	d
bfin_write_CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_DATA2(/;"	d
bfin_write_CAN_MB02_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_DATA2(/;"	d
bfin_write_CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_DATA3(/;"	d
bfin_write_CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_DATA3(/;"	d
bfin_write_CAN_MB02_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_DATA3(/;"	d
bfin_write_CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_ID0(/;"	d
bfin_write_CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_ID0(/;"	d
bfin_write_CAN_MB02_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_ID0(/;"	d
bfin_write_CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_ID1(/;"	d
bfin_write_CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_ID1(/;"	d
bfin_write_CAN_MB02_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_ID1(/;"	d
bfin_write_CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_LENGTH(/;"	d
bfin_write_CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_LENGTH(/;"	d
bfin_write_CAN_MB02_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_LENGTH(/;"	d
bfin_write_CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB02_TIMESTAMP(/;"	d
bfin_write_CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB02_TIMESTAMP(/;"	d
bfin_write_CAN_MB02_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB02_TIMESTAMP(/;"	d
bfin_write_CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_DATA0(/;"	d
bfin_write_CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_DATA0(/;"	d
bfin_write_CAN_MB03_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_DATA0(/;"	d
bfin_write_CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_DATA1(/;"	d
bfin_write_CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_DATA1(/;"	d
bfin_write_CAN_MB03_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_DATA1(/;"	d
bfin_write_CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_DATA2(/;"	d
bfin_write_CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_DATA2(/;"	d
bfin_write_CAN_MB03_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_DATA2(/;"	d
bfin_write_CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_DATA3(/;"	d
bfin_write_CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_DATA3(/;"	d
bfin_write_CAN_MB03_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_DATA3(/;"	d
bfin_write_CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_ID0(/;"	d
bfin_write_CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_ID0(/;"	d
bfin_write_CAN_MB03_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_ID0(/;"	d
bfin_write_CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_ID1(/;"	d
bfin_write_CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_ID1(/;"	d
bfin_write_CAN_MB03_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_ID1(/;"	d
bfin_write_CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_LENGTH(/;"	d
bfin_write_CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_LENGTH(/;"	d
bfin_write_CAN_MB03_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_LENGTH(/;"	d
bfin_write_CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB03_TIMESTAMP(/;"	d
bfin_write_CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB03_TIMESTAMP(/;"	d
bfin_write_CAN_MB03_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB03_TIMESTAMP(/;"	d
bfin_write_CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_DATA0(/;"	d
bfin_write_CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_DATA0(/;"	d
bfin_write_CAN_MB04_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_DATA0(/;"	d
bfin_write_CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_DATA1(/;"	d
bfin_write_CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_DATA1(/;"	d
bfin_write_CAN_MB04_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_DATA1(/;"	d
bfin_write_CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_DATA2(/;"	d
bfin_write_CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_DATA2(/;"	d
bfin_write_CAN_MB04_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_DATA2(/;"	d
bfin_write_CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_DATA3(/;"	d
bfin_write_CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_DATA3(/;"	d
bfin_write_CAN_MB04_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_DATA3(/;"	d
bfin_write_CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_ID0(/;"	d
bfin_write_CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_ID0(/;"	d
bfin_write_CAN_MB04_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_ID0(/;"	d
bfin_write_CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_ID1(/;"	d
bfin_write_CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_ID1(/;"	d
bfin_write_CAN_MB04_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_ID1(/;"	d
bfin_write_CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_LENGTH(/;"	d
bfin_write_CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_LENGTH(/;"	d
bfin_write_CAN_MB04_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_LENGTH(/;"	d
bfin_write_CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB04_TIMESTAMP(/;"	d
bfin_write_CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB04_TIMESTAMP(/;"	d
bfin_write_CAN_MB04_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB04_TIMESTAMP(/;"	d
bfin_write_CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_DATA0(/;"	d
bfin_write_CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_DATA0(/;"	d
bfin_write_CAN_MB05_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_DATA0(/;"	d
bfin_write_CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_DATA1(/;"	d
bfin_write_CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_DATA1(/;"	d
bfin_write_CAN_MB05_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_DATA1(/;"	d
bfin_write_CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_DATA2(/;"	d
bfin_write_CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_DATA2(/;"	d
bfin_write_CAN_MB05_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_DATA2(/;"	d
bfin_write_CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_DATA3(/;"	d
bfin_write_CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_DATA3(/;"	d
bfin_write_CAN_MB05_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_DATA3(/;"	d
bfin_write_CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_ID0(/;"	d
bfin_write_CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_ID0(/;"	d
bfin_write_CAN_MB05_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_ID0(/;"	d
bfin_write_CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_ID1(/;"	d
bfin_write_CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_ID1(/;"	d
bfin_write_CAN_MB05_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_ID1(/;"	d
bfin_write_CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_LENGTH(/;"	d
bfin_write_CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_LENGTH(/;"	d
bfin_write_CAN_MB05_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_LENGTH(/;"	d
bfin_write_CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB05_TIMESTAMP(/;"	d
bfin_write_CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB05_TIMESTAMP(/;"	d
bfin_write_CAN_MB05_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB05_TIMESTAMP(/;"	d
bfin_write_CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_DATA0(/;"	d
bfin_write_CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_DATA0(/;"	d
bfin_write_CAN_MB06_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_DATA0(/;"	d
bfin_write_CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_DATA1(/;"	d
bfin_write_CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_DATA1(/;"	d
bfin_write_CAN_MB06_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_DATA1(/;"	d
bfin_write_CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_DATA2(/;"	d
bfin_write_CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_DATA2(/;"	d
bfin_write_CAN_MB06_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_DATA2(/;"	d
bfin_write_CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_DATA3(/;"	d
bfin_write_CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_DATA3(/;"	d
bfin_write_CAN_MB06_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_DATA3(/;"	d
bfin_write_CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_ID0(/;"	d
bfin_write_CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_ID0(/;"	d
bfin_write_CAN_MB06_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_ID0(/;"	d
bfin_write_CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_ID1(/;"	d
bfin_write_CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_ID1(/;"	d
bfin_write_CAN_MB06_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_ID1(/;"	d
bfin_write_CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_LENGTH(/;"	d
bfin_write_CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_LENGTH(/;"	d
bfin_write_CAN_MB06_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_LENGTH(/;"	d
bfin_write_CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB06_TIMESTAMP(/;"	d
bfin_write_CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB06_TIMESTAMP(/;"	d
bfin_write_CAN_MB06_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB06_TIMESTAMP(/;"	d
bfin_write_CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_DATA0(/;"	d
bfin_write_CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_DATA0(/;"	d
bfin_write_CAN_MB07_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_DATA0(/;"	d
bfin_write_CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_DATA1(/;"	d
bfin_write_CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_DATA1(/;"	d
bfin_write_CAN_MB07_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_DATA1(/;"	d
bfin_write_CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_DATA2(/;"	d
bfin_write_CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_DATA2(/;"	d
bfin_write_CAN_MB07_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_DATA2(/;"	d
bfin_write_CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_DATA3(/;"	d
bfin_write_CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_DATA3(/;"	d
bfin_write_CAN_MB07_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_DATA3(/;"	d
bfin_write_CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_ID0(/;"	d
bfin_write_CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_ID0(/;"	d
bfin_write_CAN_MB07_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_ID0(/;"	d
bfin_write_CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_ID1(/;"	d
bfin_write_CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_ID1(/;"	d
bfin_write_CAN_MB07_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_ID1(/;"	d
bfin_write_CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_LENGTH(/;"	d
bfin_write_CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_LENGTH(/;"	d
bfin_write_CAN_MB07_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_LENGTH(/;"	d
bfin_write_CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB07_TIMESTAMP(/;"	d
bfin_write_CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB07_TIMESTAMP(/;"	d
bfin_write_CAN_MB07_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB07_TIMESTAMP(/;"	d
bfin_write_CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_DATA0(/;"	d
bfin_write_CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_DATA0(/;"	d
bfin_write_CAN_MB08_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_DATA0(/;"	d
bfin_write_CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_DATA1(/;"	d
bfin_write_CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_DATA1(/;"	d
bfin_write_CAN_MB08_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_DATA1(/;"	d
bfin_write_CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_DATA2(/;"	d
bfin_write_CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_DATA2(/;"	d
bfin_write_CAN_MB08_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_DATA2(/;"	d
bfin_write_CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_DATA3(/;"	d
bfin_write_CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_DATA3(/;"	d
bfin_write_CAN_MB08_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_DATA3(/;"	d
bfin_write_CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_ID0(/;"	d
bfin_write_CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_ID0(/;"	d
bfin_write_CAN_MB08_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_ID0(/;"	d
bfin_write_CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_ID1(/;"	d
bfin_write_CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_ID1(/;"	d
bfin_write_CAN_MB08_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_ID1(/;"	d
bfin_write_CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_LENGTH(/;"	d
bfin_write_CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_LENGTH(/;"	d
bfin_write_CAN_MB08_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_LENGTH(/;"	d
bfin_write_CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB08_TIMESTAMP(/;"	d
bfin_write_CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB08_TIMESTAMP(/;"	d
bfin_write_CAN_MB08_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB08_TIMESTAMP(/;"	d
bfin_write_CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_DATA0(/;"	d
bfin_write_CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_DATA0(/;"	d
bfin_write_CAN_MB09_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_DATA0(/;"	d
bfin_write_CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_DATA1(/;"	d
bfin_write_CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_DATA1(/;"	d
bfin_write_CAN_MB09_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_DATA1(/;"	d
bfin_write_CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_DATA2(/;"	d
bfin_write_CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_DATA2(/;"	d
bfin_write_CAN_MB09_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_DATA2(/;"	d
bfin_write_CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_DATA3(/;"	d
bfin_write_CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_DATA3(/;"	d
bfin_write_CAN_MB09_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_DATA3(/;"	d
bfin_write_CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_ID0(/;"	d
bfin_write_CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_ID0(/;"	d
bfin_write_CAN_MB09_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_ID0(/;"	d
bfin_write_CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_ID1(/;"	d
bfin_write_CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_ID1(/;"	d
bfin_write_CAN_MB09_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_ID1(/;"	d
bfin_write_CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_LENGTH(/;"	d
bfin_write_CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_LENGTH(/;"	d
bfin_write_CAN_MB09_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_LENGTH(/;"	d
bfin_write_CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB09_TIMESTAMP(/;"	d
bfin_write_CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB09_TIMESTAMP(/;"	d
bfin_write_CAN_MB09_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB09_TIMESTAMP(/;"	d
bfin_write_CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_DATA0(/;"	d
bfin_write_CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_DATA0(/;"	d
bfin_write_CAN_MB10_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_DATA0(/;"	d
bfin_write_CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_DATA1(/;"	d
bfin_write_CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_DATA1(/;"	d
bfin_write_CAN_MB10_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_DATA1(/;"	d
bfin_write_CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_DATA2(/;"	d
bfin_write_CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_DATA2(/;"	d
bfin_write_CAN_MB10_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_DATA2(/;"	d
bfin_write_CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_DATA3(/;"	d
bfin_write_CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_DATA3(/;"	d
bfin_write_CAN_MB10_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_DATA3(/;"	d
bfin_write_CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_ID0(/;"	d
bfin_write_CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_ID0(/;"	d
bfin_write_CAN_MB10_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_ID0(/;"	d
bfin_write_CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_ID1(/;"	d
bfin_write_CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_ID1(/;"	d
bfin_write_CAN_MB10_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_ID1(/;"	d
bfin_write_CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_LENGTH(/;"	d
bfin_write_CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_LENGTH(/;"	d
bfin_write_CAN_MB10_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_LENGTH(/;"	d
bfin_write_CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB10_TIMESTAMP(/;"	d
bfin_write_CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB10_TIMESTAMP(/;"	d
bfin_write_CAN_MB10_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB10_TIMESTAMP(/;"	d
bfin_write_CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_DATA0(/;"	d
bfin_write_CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_DATA0(/;"	d
bfin_write_CAN_MB11_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_DATA0(/;"	d
bfin_write_CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_DATA1(/;"	d
bfin_write_CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_DATA1(/;"	d
bfin_write_CAN_MB11_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_DATA1(/;"	d
bfin_write_CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_DATA2(/;"	d
bfin_write_CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_DATA2(/;"	d
bfin_write_CAN_MB11_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_DATA2(/;"	d
bfin_write_CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_DATA3(/;"	d
bfin_write_CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_DATA3(/;"	d
bfin_write_CAN_MB11_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_DATA3(/;"	d
bfin_write_CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_ID0(/;"	d
bfin_write_CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_ID0(/;"	d
bfin_write_CAN_MB11_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_ID0(/;"	d
bfin_write_CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_ID1(/;"	d
bfin_write_CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_ID1(/;"	d
bfin_write_CAN_MB11_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_ID1(/;"	d
bfin_write_CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_LENGTH(/;"	d
bfin_write_CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_LENGTH(/;"	d
bfin_write_CAN_MB11_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_LENGTH(/;"	d
bfin_write_CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB11_TIMESTAMP(/;"	d
bfin_write_CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB11_TIMESTAMP(/;"	d
bfin_write_CAN_MB11_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB11_TIMESTAMP(/;"	d
bfin_write_CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_DATA0(/;"	d
bfin_write_CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_DATA0(/;"	d
bfin_write_CAN_MB12_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_DATA0(/;"	d
bfin_write_CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_DATA1(/;"	d
bfin_write_CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_DATA1(/;"	d
bfin_write_CAN_MB12_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_DATA1(/;"	d
bfin_write_CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_DATA2(/;"	d
bfin_write_CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_DATA2(/;"	d
bfin_write_CAN_MB12_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_DATA2(/;"	d
bfin_write_CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_DATA3(/;"	d
bfin_write_CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_DATA3(/;"	d
bfin_write_CAN_MB12_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_DATA3(/;"	d
bfin_write_CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_ID0(/;"	d
bfin_write_CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_ID0(/;"	d
bfin_write_CAN_MB12_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_ID0(/;"	d
bfin_write_CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_ID1(/;"	d
bfin_write_CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_ID1(/;"	d
bfin_write_CAN_MB12_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_ID1(/;"	d
bfin_write_CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_LENGTH(/;"	d
bfin_write_CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_LENGTH(/;"	d
bfin_write_CAN_MB12_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_LENGTH(/;"	d
bfin_write_CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB12_TIMESTAMP(/;"	d
bfin_write_CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB12_TIMESTAMP(/;"	d
bfin_write_CAN_MB12_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB12_TIMESTAMP(/;"	d
bfin_write_CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_DATA0(/;"	d
bfin_write_CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_DATA0(/;"	d
bfin_write_CAN_MB13_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_DATA0(/;"	d
bfin_write_CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_DATA1(/;"	d
bfin_write_CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_DATA1(/;"	d
bfin_write_CAN_MB13_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_DATA1(/;"	d
bfin_write_CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_DATA2(/;"	d
bfin_write_CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_DATA2(/;"	d
bfin_write_CAN_MB13_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_DATA2(/;"	d
bfin_write_CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_DATA3(/;"	d
bfin_write_CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_DATA3(/;"	d
bfin_write_CAN_MB13_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_DATA3(/;"	d
bfin_write_CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_ID0(/;"	d
bfin_write_CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_ID0(/;"	d
bfin_write_CAN_MB13_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_ID0(/;"	d
bfin_write_CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_ID1(/;"	d
bfin_write_CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_ID1(/;"	d
bfin_write_CAN_MB13_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_ID1(/;"	d
bfin_write_CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_LENGTH(/;"	d
bfin_write_CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_LENGTH(/;"	d
bfin_write_CAN_MB13_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_LENGTH(/;"	d
bfin_write_CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB13_TIMESTAMP(/;"	d
bfin_write_CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB13_TIMESTAMP(/;"	d
bfin_write_CAN_MB13_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB13_TIMESTAMP(/;"	d
bfin_write_CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_DATA0(/;"	d
bfin_write_CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_DATA0(/;"	d
bfin_write_CAN_MB14_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_DATA0(/;"	d
bfin_write_CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_DATA1(/;"	d
bfin_write_CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_DATA1(/;"	d
bfin_write_CAN_MB14_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_DATA1(/;"	d
bfin_write_CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_DATA2(/;"	d
bfin_write_CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_DATA2(/;"	d
bfin_write_CAN_MB14_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_DATA2(/;"	d
bfin_write_CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_DATA3(/;"	d
bfin_write_CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_DATA3(/;"	d
bfin_write_CAN_MB14_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_DATA3(/;"	d
bfin_write_CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_ID0(/;"	d
bfin_write_CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_ID0(/;"	d
bfin_write_CAN_MB14_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_ID0(/;"	d
bfin_write_CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_ID1(/;"	d
bfin_write_CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_ID1(/;"	d
bfin_write_CAN_MB14_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_ID1(/;"	d
bfin_write_CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_LENGTH(/;"	d
bfin_write_CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_LENGTH(/;"	d
bfin_write_CAN_MB14_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_LENGTH(/;"	d
bfin_write_CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB14_TIMESTAMP(/;"	d
bfin_write_CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB14_TIMESTAMP(/;"	d
bfin_write_CAN_MB14_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB14_TIMESTAMP(/;"	d
bfin_write_CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_DATA0(/;"	d
bfin_write_CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_DATA0(/;"	d
bfin_write_CAN_MB15_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_DATA0(/;"	d
bfin_write_CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_DATA1(/;"	d
bfin_write_CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_DATA1(/;"	d
bfin_write_CAN_MB15_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_DATA1(/;"	d
bfin_write_CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_DATA2(/;"	d
bfin_write_CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_DATA2(/;"	d
bfin_write_CAN_MB15_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_DATA2(/;"	d
bfin_write_CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_DATA3(/;"	d
bfin_write_CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_DATA3(/;"	d
bfin_write_CAN_MB15_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_DATA3(/;"	d
bfin_write_CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_ID0(/;"	d
bfin_write_CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_ID0(/;"	d
bfin_write_CAN_MB15_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_ID0(/;"	d
bfin_write_CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_ID1(/;"	d
bfin_write_CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_ID1(/;"	d
bfin_write_CAN_MB15_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_ID1(/;"	d
bfin_write_CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_LENGTH(/;"	d
bfin_write_CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_LENGTH(/;"	d
bfin_write_CAN_MB15_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_LENGTH(/;"	d
bfin_write_CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB15_TIMESTAMP(/;"	d
bfin_write_CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB15_TIMESTAMP(/;"	d
bfin_write_CAN_MB15_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB15_TIMESTAMP(/;"	d
bfin_write_CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_DATA0(/;"	d
bfin_write_CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_DATA0(/;"	d
bfin_write_CAN_MB16_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_DATA0(/;"	d
bfin_write_CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_DATA1(/;"	d
bfin_write_CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_DATA1(/;"	d
bfin_write_CAN_MB16_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_DATA1(/;"	d
bfin_write_CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_DATA2(/;"	d
bfin_write_CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_DATA2(/;"	d
bfin_write_CAN_MB16_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_DATA2(/;"	d
bfin_write_CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_DATA3(/;"	d
bfin_write_CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_DATA3(/;"	d
bfin_write_CAN_MB16_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_DATA3(/;"	d
bfin_write_CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_ID0(/;"	d
bfin_write_CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_ID0(/;"	d
bfin_write_CAN_MB16_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_ID0(/;"	d
bfin_write_CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_ID1(/;"	d
bfin_write_CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_ID1(/;"	d
bfin_write_CAN_MB16_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_ID1(/;"	d
bfin_write_CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_LENGTH(/;"	d
bfin_write_CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_LENGTH(/;"	d
bfin_write_CAN_MB16_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_LENGTH(/;"	d
bfin_write_CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB16_TIMESTAMP(/;"	d
bfin_write_CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB16_TIMESTAMP(/;"	d
bfin_write_CAN_MB16_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB16_TIMESTAMP(/;"	d
bfin_write_CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_DATA0(/;"	d
bfin_write_CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_DATA0(/;"	d
bfin_write_CAN_MB17_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_DATA0(/;"	d
bfin_write_CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_DATA1(/;"	d
bfin_write_CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_DATA1(/;"	d
bfin_write_CAN_MB17_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_DATA1(/;"	d
bfin_write_CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_DATA2(/;"	d
bfin_write_CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_DATA2(/;"	d
bfin_write_CAN_MB17_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_DATA2(/;"	d
bfin_write_CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_DATA3(/;"	d
bfin_write_CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_DATA3(/;"	d
bfin_write_CAN_MB17_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_DATA3(/;"	d
bfin_write_CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_ID0(/;"	d
bfin_write_CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_ID0(/;"	d
bfin_write_CAN_MB17_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_ID0(/;"	d
bfin_write_CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_ID1(/;"	d
bfin_write_CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_ID1(/;"	d
bfin_write_CAN_MB17_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_ID1(/;"	d
bfin_write_CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_LENGTH(/;"	d
bfin_write_CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_LENGTH(/;"	d
bfin_write_CAN_MB17_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_LENGTH(/;"	d
bfin_write_CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB17_TIMESTAMP(/;"	d
bfin_write_CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB17_TIMESTAMP(/;"	d
bfin_write_CAN_MB17_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB17_TIMESTAMP(/;"	d
bfin_write_CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_DATA0(/;"	d
bfin_write_CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_DATA0(/;"	d
bfin_write_CAN_MB18_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_DATA0(/;"	d
bfin_write_CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_DATA1(/;"	d
bfin_write_CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_DATA1(/;"	d
bfin_write_CAN_MB18_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_DATA1(/;"	d
bfin_write_CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_DATA2(/;"	d
bfin_write_CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_DATA2(/;"	d
bfin_write_CAN_MB18_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_DATA2(/;"	d
bfin_write_CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_DATA3(/;"	d
bfin_write_CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_DATA3(/;"	d
bfin_write_CAN_MB18_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_DATA3(/;"	d
bfin_write_CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_ID0(/;"	d
bfin_write_CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_ID0(/;"	d
bfin_write_CAN_MB18_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_ID0(/;"	d
bfin_write_CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_ID1(/;"	d
bfin_write_CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_ID1(/;"	d
bfin_write_CAN_MB18_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_ID1(/;"	d
bfin_write_CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_LENGTH(/;"	d
bfin_write_CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_LENGTH(/;"	d
bfin_write_CAN_MB18_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_LENGTH(/;"	d
bfin_write_CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB18_TIMESTAMP(/;"	d
bfin_write_CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB18_TIMESTAMP(/;"	d
bfin_write_CAN_MB18_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB18_TIMESTAMP(/;"	d
bfin_write_CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_DATA0(/;"	d
bfin_write_CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_DATA0(/;"	d
bfin_write_CAN_MB19_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_DATA0(/;"	d
bfin_write_CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_DATA1(/;"	d
bfin_write_CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_DATA1(/;"	d
bfin_write_CAN_MB19_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_DATA1(/;"	d
bfin_write_CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_DATA2(/;"	d
bfin_write_CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_DATA2(/;"	d
bfin_write_CAN_MB19_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_DATA2(/;"	d
bfin_write_CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_DATA3(/;"	d
bfin_write_CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_DATA3(/;"	d
bfin_write_CAN_MB19_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_DATA3(/;"	d
bfin_write_CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_ID0(/;"	d
bfin_write_CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_ID0(/;"	d
bfin_write_CAN_MB19_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_ID0(/;"	d
bfin_write_CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_ID1(/;"	d
bfin_write_CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_ID1(/;"	d
bfin_write_CAN_MB19_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_ID1(/;"	d
bfin_write_CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_LENGTH(/;"	d
bfin_write_CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_LENGTH(/;"	d
bfin_write_CAN_MB19_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_LENGTH(/;"	d
bfin_write_CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB19_TIMESTAMP(/;"	d
bfin_write_CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB19_TIMESTAMP(/;"	d
bfin_write_CAN_MB19_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB19_TIMESTAMP(/;"	d
bfin_write_CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_DATA0(/;"	d
bfin_write_CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_DATA0(/;"	d
bfin_write_CAN_MB20_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_DATA0(/;"	d
bfin_write_CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_DATA1(/;"	d
bfin_write_CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_DATA1(/;"	d
bfin_write_CAN_MB20_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_DATA1(/;"	d
bfin_write_CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_DATA2(/;"	d
bfin_write_CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_DATA2(/;"	d
bfin_write_CAN_MB20_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_DATA2(/;"	d
bfin_write_CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_DATA3(/;"	d
bfin_write_CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_DATA3(/;"	d
bfin_write_CAN_MB20_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_DATA3(/;"	d
bfin_write_CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_ID0(/;"	d
bfin_write_CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_ID0(/;"	d
bfin_write_CAN_MB20_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_ID0(/;"	d
bfin_write_CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_ID1(/;"	d
bfin_write_CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_ID1(/;"	d
bfin_write_CAN_MB20_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_ID1(/;"	d
bfin_write_CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_LENGTH(/;"	d
bfin_write_CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_LENGTH(/;"	d
bfin_write_CAN_MB20_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_LENGTH(/;"	d
bfin_write_CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB20_TIMESTAMP(/;"	d
bfin_write_CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB20_TIMESTAMP(/;"	d
bfin_write_CAN_MB20_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB20_TIMESTAMP(/;"	d
bfin_write_CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_DATA0(/;"	d
bfin_write_CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_DATA0(/;"	d
bfin_write_CAN_MB21_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_DATA0(/;"	d
bfin_write_CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_DATA1(/;"	d
bfin_write_CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_DATA1(/;"	d
bfin_write_CAN_MB21_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_DATA1(/;"	d
bfin_write_CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_DATA2(/;"	d
bfin_write_CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_DATA2(/;"	d
bfin_write_CAN_MB21_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_DATA2(/;"	d
bfin_write_CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_DATA3(/;"	d
bfin_write_CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_DATA3(/;"	d
bfin_write_CAN_MB21_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_DATA3(/;"	d
bfin_write_CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_ID0(/;"	d
bfin_write_CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_ID0(/;"	d
bfin_write_CAN_MB21_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_ID0(/;"	d
bfin_write_CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_ID1(/;"	d
bfin_write_CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_ID1(/;"	d
bfin_write_CAN_MB21_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_ID1(/;"	d
bfin_write_CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_LENGTH(/;"	d
bfin_write_CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_LENGTH(/;"	d
bfin_write_CAN_MB21_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_LENGTH(/;"	d
bfin_write_CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB21_TIMESTAMP(/;"	d
bfin_write_CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB21_TIMESTAMP(/;"	d
bfin_write_CAN_MB21_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB21_TIMESTAMP(/;"	d
bfin_write_CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_DATA0(/;"	d
bfin_write_CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_DATA0(/;"	d
bfin_write_CAN_MB22_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_DATA0(/;"	d
bfin_write_CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_DATA1(/;"	d
bfin_write_CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_DATA1(/;"	d
bfin_write_CAN_MB22_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_DATA1(/;"	d
bfin_write_CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_DATA2(/;"	d
bfin_write_CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_DATA2(/;"	d
bfin_write_CAN_MB22_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_DATA2(/;"	d
bfin_write_CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_DATA3(/;"	d
bfin_write_CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_DATA3(/;"	d
bfin_write_CAN_MB22_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_DATA3(/;"	d
bfin_write_CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_ID0(/;"	d
bfin_write_CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_ID0(/;"	d
bfin_write_CAN_MB22_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_ID0(/;"	d
bfin_write_CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_ID1(/;"	d
bfin_write_CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_ID1(/;"	d
bfin_write_CAN_MB22_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_ID1(/;"	d
bfin_write_CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_LENGTH(/;"	d
bfin_write_CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_LENGTH(/;"	d
bfin_write_CAN_MB22_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_LENGTH(/;"	d
bfin_write_CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB22_TIMESTAMP(/;"	d
bfin_write_CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB22_TIMESTAMP(/;"	d
bfin_write_CAN_MB22_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB22_TIMESTAMP(/;"	d
bfin_write_CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_DATA0(/;"	d
bfin_write_CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_DATA0(/;"	d
bfin_write_CAN_MB23_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_DATA0(/;"	d
bfin_write_CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_DATA1(/;"	d
bfin_write_CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_DATA1(/;"	d
bfin_write_CAN_MB23_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_DATA1(/;"	d
bfin_write_CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_DATA2(/;"	d
bfin_write_CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_DATA2(/;"	d
bfin_write_CAN_MB23_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_DATA2(/;"	d
bfin_write_CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_DATA3(/;"	d
bfin_write_CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_DATA3(/;"	d
bfin_write_CAN_MB23_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_DATA3(/;"	d
bfin_write_CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_ID0(/;"	d
bfin_write_CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_ID0(/;"	d
bfin_write_CAN_MB23_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_ID0(/;"	d
bfin_write_CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_ID1(/;"	d
bfin_write_CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_ID1(/;"	d
bfin_write_CAN_MB23_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_ID1(/;"	d
bfin_write_CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_LENGTH(/;"	d
bfin_write_CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_LENGTH(/;"	d
bfin_write_CAN_MB23_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_LENGTH(/;"	d
bfin_write_CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB23_TIMESTAMP(/;"	d
bfin_write_CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB23_TIMESTAMP(/;"	d
bfin_write_CAN_MB23_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB23_TIMESTAMP(/;"	d
bfin_write_CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_DATA0(/;"	d
bfin_write_CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_DATA0(/;"	d
bfin_write_CAN_MB24_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_DATA0(/;"	d
bfin_write_CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_DATA1(/;"	d
bfin_write_CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_DATA1(/;"	d
bfin_write_CAN_MB24_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_DATA1(/;"	d
bfin_write_CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_DATA2(/;"	d
bfin_write_CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_DATA2(/;"	d
bfin_write_CAN_MB24_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_DATA2(/;"	d
bfin_write_CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_DATA3(/;"	d
bfin_write_CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_DATA3(/;"	d
bfin_write_CAN_MB24_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_DATA3(/;"	d
bfin_write_CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_ID0(/;"	d
bfin_write_CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_ID0(/;"	d
bfin_write_CAN_MB24_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_ID0(/;"	d
bfin_write_CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_ID1(/;"	d
bfin_write_CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_ID1(/;"	d
bfin_write_CAN_MB24_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_ID1(/;"	d
bfin_write_CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_LENGTH(/;"	d
bfin_write_CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_LENGTH(/;"	d
bfin_write_CAN_MB24_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_LENGTH(/;"	d
bfin_write_CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB24_TIMESTAMP(/;"	d
bfin_write_CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB24_TIMESTAMP(/;"	d
bfin_write_CAN_MB24_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB24_TIMESTAMP(/;"	d
bfin_write_CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_DATA0(/;"	d
bfin_write_CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_DATA0(/;"	d
bfin_write_CAN_MB25_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_DATA0(/;"	d
bfin_write_CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_DATA1(/;"	d
bfin_write_CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_DATA1(/;"	d
bfin_write_CAN_MB25_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_DATA1(/;"	d
bfin_write_CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_DATA2(/;"	d
bfin_write_CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_DATA2(/;"	d
bfin_write_CAN_MB25_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_DATA2(/;"	d
bfin_write_CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_DATA3(/;"	d
bfin_write_CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_DATA3(/;"	d
bfin_write_CAN_MB25_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_DATA3(/;"	d
bfin_write_CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_ID0(/;"	d
bfin_write_CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_ID0(/;"	d
bfin_write_CAN_MB25_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_ID0(/;"	d
bfin_write_CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_ID1(/;"	d
bfin_write_CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_ID1(/;"	d
bfin_write_CAN_MB25_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_ID1(/;"	d
bfin_write_CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_LENGTH(/;"	d
bfin_write_CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_LENGTH(/;"	d
bfin_write_CAN_MB25_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_LENGTH(/;"	d
bfin_write_CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB25_TIMESTAMP(/;"	d
bfin_write_CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB25_TIMESTAMP(/;"	d
bfin_write_CAN_MB25_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB25_TIMESTAMP(/;"	d
bfin_write_CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_DATA0(/;"	d
bfin_write_CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_DATA0(/;"	d
bfin_write_CAN_MB26_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_DATA0(/;"	d
bfin_write_CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_DATA1(/;"	d
bfin_write_CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_DATA1(/;"	d
bfin_write_CAN_MB26_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_DATA1(/;"	d
bfin_write_CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_DATA2(/;"	d
bfin_write_CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_DATA2(/;"	d
bfin_write_CAN_MB26_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_DATA2(/;"	d
bfin_write_CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_DATA3(/;"	d
bfin_write_CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_DATA3(/;"	d
bfin_write_CAN_MB26_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_DATA3(/;"	d
bfin_write_CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_ID0(/;"	d
bfin_write_CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_ID0(/;"	d
bfin_write_CAN_MB26_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_ID0(/;"	d
bfin_write_CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_ID1(/;"	d
bfin_write_CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_ID1(/;"	d
bfin_write_CAN_MB26_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_ID1(/;"	d
bfin_write_CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_LENGTH(/;"	d
bfin_write_CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_LENGTH(/;"	d
bfin_write_CAN_MB26_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_LENGTH(/;"	d
bfin_write_CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB26_TIMESTAMP(/;"	d
bfin_write_CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB26_TIMESTAMP(/;"	d
bfin_write_CAN_MB26_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB26_TIMESTAMP(/;"	d
bfin_write_CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_DATA0(/;"	d
bfin_write_CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_DATA0(/;"	d
bfin_write_CAN_MB27_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_DATA0(/;"	d
bfin_write_CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_DATA1(/;"	d
bfin_write_CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_DATA1(/;"	d
bfin_write_CAN_MB27_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_DATA1(/;"	d
bfin_write_CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_DATA2(/;"	d
bfin_write_CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_DATA2(/;"	d
bfin_write_CAN_MB27_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_DATA2(/;"	d
bfin_write_CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_DATA3(/;"	d
bfin_write_CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_DATA3(/;"	d
bfin_write_CAN_MB27_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_DATA3(/;"	d
bfin_write_CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_ID0(/;"	d
bfin_write_CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_ID0(/;"	d
bfin_write_CAN_MB27_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_ID0(/;"	d
bfin_write_CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_ID1(/;"	d
bfin_write_CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_ID1(/;"	d
bfin_write_CAN_MB27_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_ID1(/;"	d
bfin_write_CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_LENGTH(/;"	d
bfin_write_CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_LENGTH(/;"	d
bfin_write_CAN_MB27_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_LENGTH(/;"	d
bfin_write_CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB27_TIMESTAMP(/;"	d
bfin_write_CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB27_TIMESTAMP(/;"	d
bfin_write_CAN_MB27_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB27_TIMESTAMP(/;"	d
bfin_write_CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_DATA0(/;"	d
bfin_write_CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_DATA0(/;"	d
bfin_write_CAN_MB28_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_DATA0(/;"	d
bfin_write_CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_DATA1(/;"	d
bfin_write_CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_DATA1(/;"	d
bfin_write_CAN_MB28_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_DATA1(/;"	d
bfin_write_CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_DATA2(/;"	d
bfin_write_CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_DATA2(/;"	d
bfin_write_CAN_MB28_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_DATA2(/;"	d
bfin_write_CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_DATA3(/;"	d
bfin_write_CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_DATA3(/;"	d
bfin_write_CAN_MB28_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_DATA3(/;"	d
bfin_write_CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_ID0(/;"	d
bfin_write_CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_ID0(/;"	d
bfin_write_CAN_MB28_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_ID0(/;"	d
bfin_write_CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_ID1(/;"	d
bfin_write_CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_ID1(/;"	d
bfin_write_CAN_MB28_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_ID1(/;"	d
bfin_write_CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_LENGTH(/;"	d
bfin_write_CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_LENGTH(/;"	d
bfin_write_CAN_MB28_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_LENGTH(/;"	d
bfin_write_CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB28_TIMESTAMP(/;"	d
bfin_write_CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB28_TIMESTAMP(/;"	d
bfin_write_CAN_MB28_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB28_TIMESTAMP(/;"	d
bfin_write_CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_DATA0(/;"	d
bfin_write_CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_DATA0(/;"	d
bfin_write_CAN_MB29_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_DATA0(/;"	d
bfin_write_CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_DATA1(/;"	d
bfin_write_CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_DATA1(/;"	d
bfin_write_CAN_MB29_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_DATA1(/;"	d
bfin_write_CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_DATA2(/;"	d
bfin_write_CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_DATA2(/;"	d
bfin_write_CAN_MB29_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_DATA2(/;"	d
bfin_write_CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_DATA3(/;"	d
bfin_write_CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_DATA3(/;"	d
bfin_write_CAN_MB29_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_DATA3(/;"	d
bfin_write_CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_ID0(/;"	d
bfin_write_CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_ID0(/;"	d
bfin_write_CAN_MB29_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_ID0(/;"	d
bfin_write_CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_ID1(/;"	d
bfin_write_CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_ID1(/;"	d
bfin_write_CAN_MB29_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_ID1(/;"	d
bfin_write_CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_LENGTH(/;"	d
bfin_write_CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_LENGTH(/;"	d
bfin_write_CAN_MB29_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_LENGTH(/;"	d
bfin_write_CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB29_TIMESTAMP(/;"	d
bfin_write_CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB29_TIMESTAMP(/;"	d
bfin_write_CAN_MB29_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB29_TIMESTAMP(/;"	d
bfin_write_CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_DATA0(/;"	d
bfin_write_CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_DATA0(/;"	d
bfin_write_CAN_MB30_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_DATA0(/;"	d
bfin_write_CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_DATA1(/;"	d
bfin_write_CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_DATA1(/;"	d
bfin_write_CAN_MB30_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_DATA1(/;"	d
bfin_write_CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_DATA2(/;"	d
bfin_write_CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_DATA2(/;"	d
bfin_write_CAN_MB30_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_DATA2(/;"	d
bfin_write_CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_DATA3(/;"	d
bfin_write_CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_DATA3(/;"	d
bfin_write_CAN_MB30_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_DATA3(/;"	d
bfin_write_CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_ID0(/;"	d
bfin_write_CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_ID0(/;"	d
bfin_write_CAN_MB30_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_ID0(/;"	d
bfin_write_CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_ID1(/;"	d
bfin_write_CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_ID1(/;"	d
bfin_write_CAN_MB30_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_ID1(/;"	d
bfin_write_CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_LENGTH(/;"	d
bfin_write_CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_LENGTH(/;"	d
bfin_write_CAN_MB30_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_LENGTH(/;"	d
bfin_write_CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB30_TIMESTAMP(/;"	d
bfin_write_CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB30_TIMESTAMP(/;"	d
bfin_write_CAN_MB30_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB30_TIMESTAMP(/;"	d
bfin_write_CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_DATA0(/;"	d
bfin_write_CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_DATA0(/;"	d
bfin_write_CAN_MB31_DATA0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_DATA0(/;"	d
bfin_write_CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_DATA1(/;"	d
bfin_write_CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_DATA1(/;"	d
bfin_write_CAN_MB31_DATA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_DATA1(/;"	d
bfin_write_CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_DATA2(/;"	d
bfin_write_CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_DATA2(/;"	d
bfin_write_CAN_MB31_DATA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_DATA2(/;"	d
bfin_write_CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_DATA3(/;"	d
bfin_write_CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_DATA3(/;"	d
bfin_write_CAN_MB31_DATA3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_DATA3(/;"	d
bfin_write_CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_ID0(/;"	d
bfin_write_CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_ID0(/;"	d
bfin_write_CAN_MB31_ID0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_ID0(/;"	d
bfin_write_CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_ID1(/;"	d
bfin_write_CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_ID1(/;"	d
bfin_write_CAN_MB31_ID1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_ID1(/;"	d
bfin_write_CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_LENGTH(/;"	d
bfin_write_CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_LENGTH(/;"	d
bfin_write_CAN_MB31_LENGTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_LENGTH(/;"	d
bfin_write_CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MB31_TIMESTAMP(/;"	d
bfin_write_CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MB31_TIMESTAMP(/;"	d
bfin_write_CAN_MB31_TIMESTAMP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MB31_TIMESTAMP(/;"	d
bfin_write_CAN_MBIM1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBIM1(/;"	d
bfin_write_CAN_MBIM1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBIM1(/;"	d
bfin_write_CAN_MBIM1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBIM1(/;"	d
bfin_write_CAN_MBIM2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBIM2(/;"	d
bfin_write_CAN_MBIM2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBIM2(/;"	d
bfin_write_CAN_MBIM2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBIM2(/;"	d
bfin_write_CAN_MBRIF1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBRIF1(/;"	d
bfin_write_CAN_MBRIF1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBRIF1(/;"	d
bfin_write_CAN_MBRIF1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBRIF1(/;"	d
bfin_write_CAN_MBRIF2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBRIF2(/;"	d
bfin_write_CAN_MBRIF2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBRIF2(/;"	d
bfin_write_CAN_MBRIF2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBRIF2(/;"	d
bfin_write_CAN_MBTD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBTD(/;"	d
bfin_write_CAN_MBTD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBTD(/;"	d
bfin_write_CAN_MBTD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBTD(/;"	d
bfin_write_CAN_MBTIF1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBTIF1(/;"	d
bfin_write_CAN_MBTIF1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBTIF1(/;"	d
bfin_write_CAN_MBTIF1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBTIF1(/;"	d
bfin_write_CAN_MBTIF2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MBTIF2(/;"	d
bfin_write_CAN_MBTIF2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MBTIF2(/;"	d
bfin_write_CAN_MBTIF2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MBTIF2(/;"	d
bfin_write_CAN_MC1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MC1(/;"	d
bfin_write_CAN_MC1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MC1(/;"	d
bfin_write_CAN_MC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MC1(/;"	d
bfin_write_CAN_MC2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MC2(/;"	d
bfin_write_CAN_MC2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MC2(/;"	d
bfin_write_CAN_MC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MC2(/;"	d
bfin_write_CAN_MD1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MD1(/;"	d
bfin_write_CAN_MD1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MD1(/;"	d
bfin_write_CAN_MD1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MD1(/;"	d
bfin_write_CAN_MD2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_MD2(/;"	d
bfin_write_CAN_MD2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_MD2(/;"	d
bfin_write_CAN_MD2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_MD2(/;"	d
bfin_write_CAN_OPSS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_OPSS1(/;"	d
bfin_write_CAN_OPSS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_OPSS1(/;"	d
bfin_write_CAN_OPSS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_OPSS1(/;"	d
bfin_write_CAN_OPSS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_OPSS2(/;"	d
bfin_write_CAN_OPSS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_OPSS2(/;"	d
bfin_write_CAN_OPSS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_OPSS2(/;"	d
bfin_write_CAN_RFH1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_RFH1(/;"	d
bfin_write_CAN_RFH1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_RFH1(/;"	d
bfin_write_CAN_RFH1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_RFH1(/;"	d
bfin_write_CAN_RFH2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_RFH2(/;"	d
bfin_write_CAN_RFH2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_RFH2(/;"	d
bfin_write_CAN_RFH2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_RFH2(/;"	d
bfin_write_CAN_RML1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_RML1(/;"	d
bfin_write_CAN_RML1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_RML1(/;"	d
bfin_write_CAN_RML1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_RML1(/;"	d
bfin_write_CAN_RML2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_RML2(/;"	d
bfin_write_CAN_RML2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_RML2(/;"	d
bfin_write_CAN_RML2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_RML2(/;"	d
bfin_write_CAN_RMP1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_RMP1(/;"	d
bfin_write_CAN_RMP1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_RMP1(/;"	d
bfin_write_CAN_RMP1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_RMP1(/;"	d
bfin_write_CAN_RMP2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_RMP2(/;"	d
bfin_write_CAN_RMP2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_RMP2(/;"	d
bfin_write_CAN_RMP2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_RMP2(/;"	d
bfin_write_CAN_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_STATUS(/;"	d
bfin_write_CAN_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_STATUS(/;"	d
bfin_write_CAN_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_STATUS(/;"	d
bfin_write_CAN_TA1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TA1(/;"	d
bfin_write_CAN_TA1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TA1(/;"	d
bfin_write_CAN_TA1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TA1(/;"	d
bfin_write_CAN_TA2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TA2(/;"	d
bfin_write_CAN_TA2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TA2(/;"	d
bfin_write_CAN_TA2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TA2(/;"	d
bfin_write_CAN_TIMING	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TIMING(/;"	d
bfin_write_CAN_TIMING	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TIMING(/;"	d
bfin_write_CAN_TIMING	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TIMING(/;"	d
bfin_write_CAN_TRR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TRR1(/;"	d
bfin_write_CAN_TRR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TRR1(/;"	d
bfin_write_CAN_TRR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TRR1(/;"	d
bfin_write_CAN_TRR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TRR2(/;"	d
bfin_write_CAN_TRR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TRR2(/;"	d
bfin_write_CAN_TRR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TRR2(/;"	d
bfin_write_CAN_TRS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TRS1(/;"	d
bfin_write_CAN_TRS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TRS1(/;"	d
bfin_write_CAN_TRS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TRS1(/;"	d
bfin_write_CAN_TRS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_TRS2(/;"	d
bfin_write_CAN_TRS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_TRS2(/;"	d
bfin_write_CAN_TRS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_TRS2(/;"	d
bfin_write_CAN_UCCNF	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_UCCNF(/;"	d
bfin_write_CAN_UCCNF	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_UCCNF(/;"	d
bfin_write_CAN_UCCNF	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_UCCNF(/;"	d
bfin_write_CAN_UCCNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_UCCNT(/;"	d
bfin_write_CAN_UCCNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_UCCNT(/;"	d
bfin_write_CAN_UCCNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_UCCNT(/;"	d
bfin_write_CAN_UCRC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_UCRC(/;"	d
bfin_write_CAN_UCRC	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_UCRC(/;"	d
bfin_write_CAN_UCRC	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_UCRC(/;"	d
bfin_write_CAN_UCREG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_UCREG(/;"	d
bfin_write_CAN_UCREG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_UCREG(/;"	d
bfin_write_CAN_UCREG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_UCREG(/;"	d
bfin_write_CAN_VERSION	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_VERSION(/;"	d
bfin_write_CAN_VERSION	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_VERSION(/;"	d
bfin_write_CAN_VERSION	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_VERSION(/;"	d
bfin_write_CAN_VERSION2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CAN_VERSION2(/;"	d
bfin_write_CAN_VERSION2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CAN_VERSION2(/;"	d
bfin_write_CAN_VERSION2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CAN_VERSION2(/;"	d
bfin_write_CGU_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_CGU_CTL(/;"	d
bfin_write_CGU_DIV	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_CGU_DIV(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CHIPID	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_CHIPID(/;"	d
bfin_write_CNT0_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_COMMAND(/;"	d
bfin_write_CNT0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_CONFIG(/;"	d
bfin_write_CNT0_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_COUNTER(/;"	d
bfin_write_CNT0_DEBOUNCE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_DEBOUNCE(/;"	d
bfin_write_CNT0_IMASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_IMASK(/;"	d
bfin_write_CNT0_MAX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_MAX(/;"	d
bfin_write_CNT0_MIN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_MIN(/;"	d
bfin_write_CNT0_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT0_STATUS(/;"	d
bfin_write_CNT1_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_COMMAND(/;"	d
bfin_write_CNT1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_CONFIG(/;"	d
bfin_write_CNT1_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_COUNTER(/;"	d
bfin_write_CNT1_DEBOUNCE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_DEBOUNCE(/;"	d
bfin_write_CNT1_IMASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_IMASK(/;"	d
bfin_write_CNT1_MAX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_MAX(/;"	d
bfin_write_CNT1_MIN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_MIN(/;"	d
bfin_write_CNT1_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_CNT1_STATUS(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_COMMAND(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_CONFIG(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_COUNTER(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_DEBOUNCE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_DEBOUNCE(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_IMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_IMASK(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MAX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_MAX(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_MIN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_MIN(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_CNT_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_CNT_STATUS(/;"	d
bfin_write_DBGSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DBGSTAT(/;"	d
bfin_write_DCPLB_ADDR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR0(/;"	d
bfin_write_DCPLB_ADDR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR1(/;"	d
bfin_write_DCPLB_ADDR10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR10(/;"	d
bfin_write_DCPLB_ADDR11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR11(/;"	d
bfin_write_DCPLB_ADDR12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR12(/;"	d
bfin_write_DCPLB_ADDR13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR13(/;"	d
bfin_write_DCPLB_ADDR14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR14(/;"	d
bfin_write_DCPLB_ADDR15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR15(/;"	d
bfin_write_DCPLB_ADDR2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR2(/;"	d
bfin_write_DCPLB_ADDR3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR3(/;"	d
bfin_write_DCPLB_ADDR4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR4(/;"	d
bfin_write_DCPLB_ADDR5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR5(/;"	d
bfin_write_DCPLB_ADDR6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR6(/;"	d
bfin_write_DCPLB_ADDR7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR7(/;"	d
bfin_write_DCPLB_ADDR8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR8(/;"	d
bfin_write_DCPLB_ADDR9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_ADDR9(/;"	d
bfin_write_DCPLB_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA0(/;"	d
bfin_write_DCPLB_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA1(/;"	d
bfin_write_DCPLB_DATA10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA10(/;"	d
bfin_write_DCPLB_DATA11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA11(/;"	d
bfin_write_DCPLB_DATA12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA12(/;"	d
bfin_write_DCPLB_DATA13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA13(/;"	d
bfin_write_DCPLB_DATA14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA14(/;"	d
bfin_write_DCPLB_DATA15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA15(/;"	d
bfin_write_DCPLB_DATA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA2(/;"	d
bfin_write_DCPLB_DATA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA3(/;"	d
bfin_write_DCPLB_DATA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA4(/;"	d
bfin_write_DCPLB_DATA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA5(/;"	d
bfin_write_DCPLB_DATA6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA6(/;"	d
bfin_write_DCPLB_DATA7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA7(/;"	d
bfin_write_DCPLB_DATA8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA8(/;"	d
bfin_write_DCPLB_DATA9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_DATA9(/;"	d
bfin_write_DCPLB_FAULT_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_FAULT_ADDR(/;"	d
bfin_write_DCPLB_FAULT_STATUS	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DCPLB_FAULT_STATUS(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_CONFIG(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_CURR_ADDR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_CURR_DESC_PTR(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_CURR_X_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_CURR_Y_COUNT(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_IRQ_STATUS(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_START_ADDR(/;"	d
bfin_write_DMA0_TC_CNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_TC_CNT(/;"	d
bfin_write_DMA0_TC_PER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_TC_PER(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_X_COUNT(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_X_MODIFY(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_Y_COUNT(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA0_Y_MODIFY(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CONFIG	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_CONFIG(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_ADDR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_CURR_ADDR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_CURR_DESC_PTR(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_CURR_X_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_CURR_Y_COUNT(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_IRQ_STATUS(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_START_ADDR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_START_ADDR(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_X_COUNT(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_X_MODIFY	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_X_MODIFY(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_COUNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_Y_COUNT(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA10_Y_MODIFY	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMA10_Y_MODIFY(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_CONFIG(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_CURR_ADDR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_CURR_DESC_PTR(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_CURR_X_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_CURR_Y_COUNT(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_IRQ_STATUS(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_START_ADDR(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_X_COUNT(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_X_MODIFY(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_Y_COUNT(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA11_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA11_Y_MODIFY(/;"	d
bfin_write_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_CONFIG(/;"	d
bfin_write_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_CONFIG(/;"	d
bfin_write_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_CONFIG(/;"	d
bfin_write_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_CONFIG(/;"	d
bfin_write_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_CONFIG(/;"	d
bfin_write_DMA12_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_CONFIG(/;"	d
bfin_write_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_CURR_ADDR(/;"	d
bfin_write_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_CURR_ADDR(/;"	d
bfin_write_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_CURR_ADDR(/;"	d
bfin_write_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_CURR_ADDR(/;"	d
bfin_write_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_CURR_ADDR(/;"	d
bfin_write_DMA12_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_CURR_ADDR(/;"	d
bfin_write_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_CURR_DESC_PTR(/;"	d
bfin_write_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_CURR_DESC_PTR(/;"	d
bfin_write_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_CURR_DESC_PTR(/;"	d
bfin_write_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_CURR_DESC_PTR(/;"	d
bfin_write_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_CURR_DESC_PTR(/;"	d
bfin_write_DMA12_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_CURR_DESC_PTR(/;"	d
bfin_write_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_CURR_X_COUNT(/;"	d
bfin_write_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_CURR_X_COUNT(/;"	d
bfin_write_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_CURR_X_COUNT(/;"	d
bfin_write_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_CURR_X_COUNT(/;"	d
bfin_write_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_CURR_X_COUNT(/;"	d
bfin_write_DMA12_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_CURR_X_COUNT(/;"	d
bfin_write_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_CURR_Y_COUNT(/;"	d
bfin_write_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_CURR_Y_COUNT(/;"	d
bfin_write_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_CURR_Y_COUNT(/;"	d
bfin_write_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_CURR_Y_COUNT(/;"	d
bfin_write_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_CURR_Y_COUNT(/;"	d
bfin_write_DMA12_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_CURR_Y_COUNT(/;"	d
bfin_write_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_IRQ_STATUS(/;"	d
bfin_write_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_IRQ_STATUS(/;"	d
bfin_write_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_IRQ_STATUS(/;"	d
bfin_write_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_IRQ_STATUS(/;"	d
bfin_write_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_IRQ_STATUS(/;"	d
bfin_write_DMA12_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_IRQ_STATUS(/;"	d
bfin_write_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_NEXT_DESC_PTR(/;"	d
bfin_write_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_NEXT_DESC_PTR(/;"	d
bfin_write_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_NEXT_DESC_PTR(/;"	d
bfin_write_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_NEXT_DESC_PTR(/;"	d
bfin_write_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_NEXT_DESC_PTR(/;"	d
bfin_write_DMA12_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_NEXT_DESC_PTR(/;"	d
bfin_write_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_PERIPHERAL_MAP(/;"	d
bfin_write_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_PERIPHERAL_MAP(/;"	d
bfin_write_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_PERIPHERAL_MAP(/;"	d
bfin_write_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_PERIPHERAL_MAP(/;"	d
bfin_write_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_PERIPHERAL_MAP(/;"	d
bfin_write_DMA12_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_PERIPHERAL_MAP(/;"	d
bfin_write_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_START_ADDR(/;"	d
bfin_write_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_START_ADDR(/;"	d
bfin_write_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_START_ADDR(/;"	d
bfin_write_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_START_ADDR(/;"	d
bfin_write_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_START_ADDR(/;"	d
bfin_write_DMA12_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_START_ADDR(/;"	d
bfin_write_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_X_COUNT(/;"	d
bfin_write_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_X_COUNT(/;"	d
bfin_write_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_X_COUNT(/;"	d
bfin_write_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_X_COUNT(/;"	d
bfin_write_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_X_COUNT(/;"	d
bfin_write_DMA12_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_X_COUNT(/;"	d
bfin_write_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_X_MODIFY(/;"	d
bfin_write_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_X_MODIFY(/;"	d
bfin_write_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_X_MODIFY(/;"	d
bfin_write_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_X_MODIFY(/;"	d
bfin_write_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_X_MODIFY(/;"	d
bfin_write_DMA12_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_X_MODIFY(/;"	d
bfin_write_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_Y_COUNT(/;"	d
bfin_write_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_Y_COUNT(/;"	d
bfin_write_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_Y_COUNT(/;"	d
bfin_write_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_Y_COUNT(/;"	d
bfin_write_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_Y_COUNT(/;"	d
bfin_write_DMA12_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_Y_COUNT(/;"	d
bfin_write_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA12_Y_MODIFY(/;"	d
bfin_write_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA12_Y_MODIFY(/;"	d
bfin_write_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA12_Y_MODIFY(/;"	d
bfin_write_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA12_Y_MODIFY(/;"	d
bfin_write_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA12_Y_MODIFY(/;"	d
bfin_write_DMA12_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA12_Y_MODIFY(/;"	d
bfin_write_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_CONFIG(/;"	d
bfin_write_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_CONFIG(/;"	d
bfin_write_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_CONFIG(/;"	d
bfin_write_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_CONFIG(/;"	d
bfin_write_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_CONFIG(/;"	d
bfin_write_DMA13_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_CONFIG(/;"	d
bfin_write_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_CURR_ADDR(/;"	d
bfin_write_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_CURR_ADDR(/;"	d
bfin_write_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_CURR_ADDR(/;"	d
bfin_write_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_CURR_ADDR(/;"	d
bfin_write_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_CURR_ADDR(/;"	d
bfin_write_DMA13_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_CURR_ADDR(/;"	d
bfin_write_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_CURR_DESC_PTR(/;"	d
bfin_write_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_CURR_DESC_PTR(/;"	d
bfin_write_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_CURR_DESC_PTR(/;"	d
bfin_write_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_CURR_DESC_PTR(/;"	d
bfin_write_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_CURR_DESC_PTR(/;"	d
bfin_write_DMA13_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_CURR_DESC_PTR(/;"	d
bfin_write_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_CURR_X_COUNT(/;"	d
bfin_write_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_CURR_X_COUNT(/;"	d
bfin_write_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_CURR_X_COUNT(/;"	d
bfin_write_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_CURR_X_COUNT(/;"	d
bfin_write_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_CURR_X_COUNT(/;"	d
bfin_write_DMA13_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_CURR_X_COUNT(/;"	d
bfin_write_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_CURR_Y_COUNT(/;"	d
bfin_write_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_CURR_Y_COUNT(/;"	d
bfin_write_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_CURR_Y_COUNT(/;"	d
bfin_write_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_CURR_Y_COUNT(/;"	d
bfin_write_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_CURR_Y_COUNT(/;"	d
bfin_write_DMA13_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_CURR_Y_COUNT(/;"	d
bfin_write_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_IRQ_STATUS(/;"	d
bfin_write_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_IRQ_STATUS(/;"	d
bfin_write_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_IRQ_STATUS(/;"	d
bfin_write_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_IRQ_STATUS(/;"	d
bfin_write_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_IRQ_STATUS(/;"	d
bfin_write_DMA13_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_IRQ_STATUS(/;"	d
bfin_write_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_NEXT_DESC_PTR(/;"	d
bfin_write_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_NEXT_DESC_PTR(/;"	d
bfin_write_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_NEXT_DESC_PTR(/;"	d
bfin_write_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_NEXT_DESC_PTR(/;"	d
bfin_write_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_NEXT_DESC_PTR(/;"	d
bfin_write_DMA13_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_NEXT_DESC_PTR(/;"	d
bfin_write_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_PERIPHERAL_MAP(/;"	d
bfin_write_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_PERIPHERAL_MAP(/;"	d
bfin_write_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_PERIPHERAL_MAP(/;"	d
bfin_write_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_PERIPHERAL_MAP(/;"	d
bfin_write_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_PERIPHERAL_MAP(/;"	d
bfin_write_DMA13_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_PERIPHERAL_MAP(/;"	d
bfin_write_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_START_ADDR(/;"	d
bfin_write_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_START_ADDR(/;"	d
bfin_write_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_START_ADDR(/;"	d
bfin_write_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_START_ADDR(/;"	d
bfin_write_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_START_ADDR(/;"	d
bfin_write_DMA13_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_START_ADDR(/;"	d
bfin_write_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_X_COUNT(/;"	d
bfin_write_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_X_COUNT(/;"	d
bfin_write_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_X_COUNT(/;"	d
bfin_write_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_X_COUNT(/;"	d
bfin_write_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_X_COUNT(/;"	d
bfin_write_DMA13_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_X_COUNT(/;"	d
bfin_write_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_X_MODIFY(/;"	d
bfin_write_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_X_MODIFY(/;"	d
bfin_write_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_X_MODIFY(/;"	d
bfin_write_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_X_MODIFY(/;"	d
bfin_write_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_X_MODIFY(/;"	d
bfin_write_DMA13_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_X_MODIFY(/;"	d
bfin_write_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_Y_COUNT(/;"	d
bfin_write_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_Y_COUNT(/;"	d
bfin_write_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_Y_COUNT(/;"	d
bfin_write_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_Y_COUNT(/;"	d
bfin_write_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_Y_COUNT(/;"	d
bfin_write_DMA13_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_Y_COUNT(/;"	d
bfin_write_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA13_Y_MODIFY(/;"	d
bfin_write_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA13_Y_MODIFY(/;"	d
bfin_write_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA13_Y_MODIFY(/;"	d
bfin_write_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA13_Y_MODIFY(/;"	d
bfin_write_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA13_Y_MODIFY(/;"	d
bfin_write_DMA13_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA13_Y_MODIFY(/;"	d
bfin_write_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_CONFIG(/;"	d
bfin_write_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_CONFIG(/;"	d
bfin_write_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_CONFIG(/;"	d
bfin_write_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_CONFIG(/;"	d
bfin_write_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_CONFIG(/;"	d
bfin_write_DMA14_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_CONFIG(/;"	d
bfin_write_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_CURR_ADDR(/;"	d
bfin_write_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_CURR_ADDR(/;"	d
bfin_write_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_CURR_ADDR(/;"	d
bfin_write_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_CURR_ADDR(/;"	d
bfin_write_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_CURR_ADDR(/;"	d
bfin_write_DMA14_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_CURR_ADDR(/;"	d
bfin_write_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_CURR_DESC_PTR(/;"	d
bfin_write_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_CURR_DESC_PTR(/;"	d
bfin_write_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_CURR_DESC_PTR(/;"	d
bfin_write_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_CURR_DESC_PTR(/;"	d
bfin_write_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_CURR_DESC_PTR(/;"	d
bfin_write_DMA14_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_CURR_DESC_PTR(/;"	d
bfin_write_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_CURR_X_COUNT(/;"	d
bfin_write_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_CURR_X_COUNT(/;"	d
bfin_write_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_CURR_X_COUNT(/;"	d
bfin_write_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_CURR_X_COUNT(/;"	d
bfin_write_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_CURR_X_COUNT(/;"	d
bfin_write_DMA14_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_CURR_X_COUNT(/;"	d
bfin_write_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_CURR_Y_COUNT(/;"	d
bfin_write_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_CURR_Y_COUNT(/;"	d
bfin_write_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_CURR_Y_COUNT(/;"	d
bfin_write_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_CURR_Y_COUNT(/;"	d
bfin_write_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_CURR_Y_COUNT(/;"	d
bfin_write_DMA14_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_CURR_Y_COUNT(/;"	d
bfin_write_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_IRQ_STATUS(/;"	d
bfin_write_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_IRQ_STATUS(/;"	d
bfin_write_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_IRQ_STATUS(/;"	d
bfin_write_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_IRQ_STATUS(/;"	d
bfin_write_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_IRQ_STATUS(/;"	d
bfin_write_DMA14_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_IRQ_STATUS(/;"	d
bfin_write_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_NEXT_DESC_PTR(/;"	d
bfin_write_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_NEXT_DESC_PTR(/;"	d
bfin_write_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_NEXT_DESC_PTR(/;"	d
bfin_write_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_NEXT_DESC_PTR(/;"	d
bfin_write_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_NEXT_DESC_PTR(/;"	d
bfin_write_DMA14_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_NEXT_DESC_PTR(/;"	d
bfin_write_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_PERIPHERAL_MAP(/;"	d
bfin_write_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_PERIPHERAL_MAP(/;"	d
bfin_write_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_PERIPHERAL_MAP(/;"	d
bfin_write_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_PERIPHERAL_MAP(/;"	d
bfin_write_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_PERIPHERAL_MAP(/;"	d
bfin_write_DMA14_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_PERIPHERAL_MAP(/;"	d
bfin_write_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_START_ADDR(/;"	d
bfin_write_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_START_ADDR(/;"	d
bfin_write_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_START_ADDR(/;"	d
bfin_write_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_START_ADDR(/;"	d
bfin_write_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_START_ADDR(/;"	d
bfin_write_DMA14_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_START_ADDR(/;"	d
bfin_write_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_X_COUNT(/;"	d
bfin_write_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_X_COUNT(/;"	d
bfin_write_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_X_COUNT(/;"	d
bfin_write_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_X_COUNT(/;"	d
bfin_write_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_X_COUNT(/;"	d
bfin_write_DMA14_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_X_COUNT(/;"	d
bfin_write_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_X_MODIFY(/;"	d
bfin_write_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_X_MODIFY(/;"	d
bfin_write_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_X_MODIFY(/;"	d
bfin_write_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_X_MODIFY(/;"	d
bfin_write_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_X_MODIFY(/;"	d
bfin_write_DMA14_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_X_MODIFY(/;"	d
bfin_write_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_Y_COUNT(/;"	d
bfin_write_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_Y_COUNT(/;"	d
bfin_write_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_Y_COUNT(/;"	d
bfin_write_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_Y_COUNT(/;"	d
bfin_write_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_Y_COUNT(/;"	d
bfin_write_DMA14_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_Y_COUNT(/;"	d
bfin_write_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA14_Y_MODIFY(/;"	d
bfin_write_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA14_Y_MODIFY(/;"	d
bfin_write_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA14_Y_MODIFY(/;"	d
bfin_write_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA14_Y_MODIFY(/;"	d
bfin_write_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA14_Y_MODIFY(/;"	d
bfin_write_DMA14_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA14_Y_MODIFY(/;"	d
bfin_write_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_CONFIG(/;"	d
bfin_write_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_CONFIG(/;"	d
bfin_write_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_CONFIG(/;"	d
bfin_write_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_CONFIG(/;"	d
bfin_write_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_CONFIG(/;"	d
bfin_write_DMA15_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_CONFIG(/;"	d
bfin_write_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_CURR_ADDR(/;"	d
bfin_write_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_CURR_ADDR(/;"	d
bfin_write_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_CURR_ADDR(/;"	d
bfin_write_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_CURR_ADDR(/;"	d
bfin_write_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_CURR_ADDR(/;"	d
bfin_write_DMA15_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_CURR_ADDR(/;"	d
bfin_write_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_CURR_DESC_PTR(/;"	d
bfin_write_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_CURR_DESC_PTR(/;"	d
bfin_write_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_CURR_DESC_PTR(/;"	d
bfin_write_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_CURR_DESC_PTR(/;"	d
bfin_write_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_CURR_DESC_PTR(/;"	d
bfin_write_DMA15_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_CURR_DESC_PTR(/;"	d
bfin_write_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_CURR_X_COUNT(/;"	d
bfin_write_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_CURR_X_COUNT(/;"	d
bfin_write_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_CURR_X_COUNT(/;"	d
bfin_write_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_CURR_X_COUNT(/;"	d
bfin_write_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_CURR_X_COUNT(/;"	d
bfin_write_DMA15_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_CURR_X_COUNT(/;"	d
bfin_write_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_CURR_Y_COUNT(/;"	d
bfin_write_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_CURR_Y_COUNT(/;"	d
bfin_write_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_CURR_Y_COUNT(/;"	d
bfin_write_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_CURR_Y_COUNT(/;"	d
bfin_write_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_CURR_Y_COUNT(/;"	d
bfin_write_DMA15_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_CURR_Y_COUNT(/;"	d
bfin_write_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_IRQ_STATUS(/;"	d
bfin_write_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_IRQ_STATUS(/;"	d
bfin_write_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_IRQ_STATUS(/;"	d
bfin_write_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_IRQ_STATUS(/;"	d
bfin_write_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_IRQ_STATUS(/;"	d
bfin_write_DMA15_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_IRQ_STATUS(/;"	d
bfin_write_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_NEXT_DESC_PTR(/;"	d
bfin_write_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_NEXT_DESC_PTR(/;"	d
bfin_write_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_NEXT_DESC_PTR(/;"	d
bfin_write_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_NEXT_DESC_PTR(/;"	d
bfin_write_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_NEXT_DESC_PTR(/;"	d
bfin_write_DMA15_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_NEXT_DESC_PTR(/;"	d
bfin_write_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_PERIPHERAL_MAP(/;"	d
bfin_write_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_PERIPHERAL_MAP(/;"	d
bfin_write_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_PERIPHERAL_MAP(/;"	d
bfin_write_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_PERIPHERAL_MAP(/;"	d
bfin_write_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_PERIPHERAL_MAP(/;"	d
bfin_write_DMA15_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_PERIPHERAL_MAP(/;"	d
bfin_write_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_START_ADDR(/;"	d
bfin_write_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_START_ADDR(/;"	d
bfin_write_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_START_ADDR(/;"	d
bfin_write_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_START_ADDR(/;"	d
bfin_write_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_START_ADDR(/;"	d
bfin_write_DMA15_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_START_ADDR(/;"	d
bfin_write_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_X_COUNT(/;"	d
bfin_write_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_X_COUNT(/;"	d
bfin_write_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_X_COUNT(/;"	d
bfin_write_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_X_COUNT(/;"	d
bfin_write_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_X_COUNT(/;"	d
bfin_write_DMA15_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_X_COUNT(/;"	d
bfin_write_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_X_MODIFY(/;"	d
bfin_write_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_X_MODIFY(/;"	d
bfin_write_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_X_MODIFY(/;"	d
bfin_write_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_X_MODIFY(/;"	d
bfin_write_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_X_MODIFY(/;"	d
bfin_write_DMA15_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_X_MODIFY(/;"	d
bfin_write_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_Y_COUNT(/;"	d
bfin_write_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_Y_COUNT(/;"	d
bfin_write_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_Y_COUNT(/;"	d
bfin_write_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_Y_COUNT(/;"	d
bfin_write_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_Y_COUNT(/;"	d
bfin_write_DMA15_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_Y_COUNT(/;"	d
bfin_write_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA15_Y_MODIFY(/;"	d
bfin_write_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA15_Y_MODIFY(/;"	d
bfin_write_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA15_Y_MODIFY(/;"	d
bfin_write_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA15_Y_MODIFY(/;"	d
bfin_write_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA15_Y_MODIFY(/;"	d
bfin_write_DMA15_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA15_Y_MODIFY(/;"	d
bfin_write_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_CONFIG(/;"	d
bfin_write_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_CONFIG(/;"	d
bfin_write_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_CONFIG(/;"	d
bfin_write_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_CONFIG(/;"	d
bfin_write_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_CONFIG(/;"	d
bfin_write_DMA16_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_CONFIG(/;"	d
bfin_write_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_CURR_ADDR(/;"	d
bfin_write_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_CURR_ADDR(/;"	d
bfin_write_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_CURR_ADDR(/;"	d
bfin_write_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_CURR_ADDR(/;"	d
bfin_write_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_CURR_ADDR(/;"	d
bfin_write_DMA16_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_CURR_ADDR(/;"	d
bfin_write_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_CURR_DESC_PTR(/;"	d
bfin_write_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_CURR_DESC_PTR(/;"	d
bfin_write_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_CURR_DESC_PTR(/;"	d
bfin_write_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_CURR_DESC_PTR(/;"	d
bfin_write_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_CURR_DESC_PTR(/;"	d
bfin_write_DMA16_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_CURR_DESC_PTR(/;"	d
bfin_write_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_CURR_X_COUNT(/;"	d
bfin_write_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_CURR_X_COUNT(/;"	d
bfin_write_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_CURR_X_COUNT(/;"	d
bfin_write_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_CURR_X_COUNT(/;"	d
bfin_write_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_CURR_X_COUNT(/;"	d
bfin_write_DMA16_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_CURR_X_COUNT(/;"	d
bfin_write_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_CURR_Y_COUNT(/;"	d
bfin_write_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_CURR_Y_COUNT(/;"	d
bfin_write_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_CURR_Y_COUNT(/;"	d
bfin_write_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_CURR_Y_COUNT(/;"	d
bfin_write_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_CURR_Y_COUNT(/;"	d
bfin_write_DMA16_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_CURR_Y_COUNT(/;"	d
bfin_write_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_IRQ_STATUS(/;"	d
bfin_write_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_IRQ_STATUS(/;"	d
bfin_write_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_IRQ_STATUS(/;"	d
bfin_write_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_IRQ_STATUS(/;"	d
bfin_write_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_IRQ_STATUS(/;"	d
bfin_write_DMA16_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_IRQ_STATUS(/;"	d
bfin_write_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_NEXT_DESC_PTR(/;"	d
bfin_write_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_NEXT_DESC_PTR(/;"	d
bfin_write_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_NEXT_DESC_PTR(/;"	d
bfin_write_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_NEXT_DESC_PTR(/;"	d
bfin_write_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_NEXT_DESC_PTR(/;"	d
bfin_write_DMA16_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_NEXT_DESC_PTR(/;"	d
bfin_write_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_PERIPHERAL_MAP(/;"	d
bfin_write_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_PERIPHERAL_MAP(/;"	d
bfin_write_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_PERIPHERAL_MAP(/;"	d
bfin_write_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_PERIPHERAL_MAP(/;"	d
bfin_write_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_PERIPHERAL_MAP(/;"	d
bfin_write_DMA16_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_PERIPHERAL_MAP(/;"	d
bfin_write_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_START_ADDR(/;"	d
bfin_write_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_START_ADDR(/;"	d
bfin_write_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_START_ADDR(/;"	d
bfin_write_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_START_ADDR(/;"	d
bfin_write_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_START_ADDR(/;"	d
bfin_write_DMA16_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_START_ADDR(/;"	d
bfin_write_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_X_COUNT(/;"	d
bfin_write_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_X_COUNT(/;"	d
bfin_write_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_X_COUNT(/;"	d
bfin_write_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_X_COUNT(/;"	d
bfin_write_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_X_COUNT(/;"	d
bfin_write_DMA16_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_X_COUNT(/;"	d
bfin_write_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_X_MODIFY(/;"	d
bfin_write_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_X_MODIFY(/;"	d
bfin_write_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_X_MODIFY(/;"	d
bfin_write_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_X_MODIFY(/;"	d
bfin_write_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_X_MODIFY(/;"	d
bfin_write_DMA16_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_X_MODIFY(/;"	d
bfin_write_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_Y_COUNT(/;"	d
bfin_write_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_Y_COUNT(/;"	d
bfin_write_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_Y_COUNT(/;"	d
bfin_write_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_Y_COUNT(/;"	d
bfin_write_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_Y_COUNT(/;"	d
bfin_write_DMA16_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_Y_COUNT(/;"	d
bfin_write_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA16_Y_MODIFY(/;"	d
bfin_write_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA16_Y_MODIFY(/;"	d
bfin_write_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA16_Y_MODIFY(/;"	d
bfin_write_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA16_Y_MODIFY(/;"	d
bfin_write_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA16_Y_MODIFY(/;"	d
bfin_write_DMA16_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA16_Y_MODIFY(/;"	d
bfin_write_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_CONFIG(/;"	d
bfin_write_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_CONFIG(/;"	d
bfin_write_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_CONFIG(/;"	d
bfin_write_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_CONFIG(/;"	d
bfin_write_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_CONFIG(/;"	d
bfin_write_DMA17_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_CONFIG(/;"	d
bfin_write_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_CURR_ADDR(/;"	d
bfin_write_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_CURR_ADDR(/;"	d
bfin_write_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_CURR_ADDR(/;"	d
bfin_write_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_CURR_ADDR(/;"	d
bfin_write_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_CURR_ADDR(/;"	d
bfin_write_DMA17_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_CURR_ADDR(/;"	d
bfin_write_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_CURR_DESC_PTR(/;"	d
bfin_write_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_CURR_DESC_PTR(/;"	d
bfin_write_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_CURR_DESC_PTR(/;"	d
bfin_write_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_CURR_DESC_PTR(/;"	d
bfin_write_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_CURR_DESC_PTR(/;"	d
bfin_write_DMA17_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_CURR_DESC_PTR(/;"	d
bfin_write_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_CURR_X_COUNT(/;"	d
bfin_write_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_CURR_X_COUNT(/;"	d
bfin_write_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_CURR_X_COUNT(/;"	d
bfin_write_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_CURR_X_COUNT(/;"	d
bfin_write_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_CURR_X_COUNT(/;"	d
bfin_write_DMA17_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_CURR_X_COUNT(/;"	d
bfin_write_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_CURR_Y_COUNT(/;"	d
bfin_write_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_CURR_Y_COUNT(/;"	d
bfin_write_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_CURR_Y_COUNT(/;"	d
bfin_write_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_CURR_Y_COUNT(/;"	d
bfin_write_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_CURR_Y_COUNT(/;"	d
bfin_write_DMA17_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_CURR_Y_COUNT(/;"	d
bfin_write_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_IRQ_STATUS(/;"	d
bfin_write_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_IRQ_STATUS(/;"	d
bfin_write_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_IRQ_STATUS(/;"	d
bfin_write_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_IRQ_STATUS(/;"	d
bfin_write_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_IRQ_STATUS(/;"	d
bfin_write_DMA17_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_IRQ_STATUS(/;"	d
bfin_write_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_NEXT_DESC_PTR(/;"	d
bfin_write_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_NEXT_DESC_PTR(/;"	d
bfin_write_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_NEXT_DESC_PTR(/;"	d
bfin_write_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_NEXT_DESC_PTR(/;"	d
bfin_write_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_NEXT_DESC_PTR(/;"	d
bfin_write_DMA17_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_NEXT_DESC_PTR(/;"	d
bfin_write_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_PERIPHERAL_MAP(/;"	d
bfin_write_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_PERIPHERAL_MAP(/;"	d
bfin_write_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_PERIPHERAL_MAP(/;"	d
bfin_write_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_PERIPHERAL_MAP(/;"	d
bfin_write_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_PERIPHERAL_MAP(/;"	d
bfin_write_DMA17_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_PERIPHERAL_MAP(/;"	d
bfin_write_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_START_ADDR(/;"	d
bfin_write_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_START_ADDR(/;"	d
bfin_write_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_START_ADDR(/;"	d
bfin_write_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_START_ADDR(/;"	d
bfin_write_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_START_ADDR(/;"	d
bfin_write_DMA17_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_START_ADDR(/;"	d
bfin_write_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_X_COUNT(/;"	d
bfin_write_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_X_COUNT(/;"	d
bfin_write_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_X_COUNT(/;"	d
bfin_write_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_X_COUNT(/;"	d
bfin_write_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_X_COUNT(/;"	d
bfin_write_DMA17_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_X_COUNT(/;"	d
bfin_write_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_X_MODIFY(/;"	d
bfin_write_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_X_MODIFY(/;"	d
bfin_write_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_X_MODIFY(/;"	d
bfin_write_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_X_MODIFY(/;"	d
bfin_write_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_X_MODIFY(/;"	d
bfin_write_DMA17_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_X_MODIFY(/;"	d
bfin_write_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_Y_COUNT(/;"	d
bfin_write_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_Y_COUNT(/;"	d
bfin_write_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_Y_COUNT(/;"	d
bfin_write_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_Y_COUNT(/;"	d
bfin_write_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_Y_COUNT(/;"	d
bfin_write_DMA17_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_Y_COUNT(/;"	d
bfin_write_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA17_Y_MODIFY(/;"	d
bfin_write_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA17_Y_MODIFY(/;"	d
bfin_write_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA17_Y_MODIFY(/;"	d
bfin_write_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA17_Y_MODIFY(/;"	d
bfin_write_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA17_Y_MODIFY(/;"	d
bfin_write_DMA17_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA17_Y_MODIFY(/;"	d
bfin_write_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_CONFIG(/;"	d
bfin_write_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_CONFIG(/;"	d
bfin_write_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_CONFIG(/;"	d
bfin_write_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_CONFIG(/;"	d
bfin_write_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_CONFIG(/;"	d
bfin_write_DMA18_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_CONFIG(/;"	d
bfin_write_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_CURR_ADDR(/;"	d
bfin_write_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_CURR_ADDR(/;"	d
bfin_write_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_CURR_ADDR(/;"	d
bfin_write_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_CURR_ADDR(/;"	d
bfin_write_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_CURR_ADDR(/;"	d
bfin_write_DMA18_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_CURR_ADDR(/;"	d
bfin_write_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_CURR_DESC_PTR(/;"	d
bfin_write_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_CURR_DESC_PTR(/;"	d
bfin_write_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_CURR_DESC_PTR(/;"	d
bfin_write_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_CURR_DESC_PTR(/;"	d
bfin_write_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_CURR_DESC_PTR(/;"	d
bfin_write_DMA18_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_CURR_DESC_PTR(/;"	d
bfin_write_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_CURR_X_COUNT(/;"	d
bfin_write_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_CURR_X_COUNT(/;"	d
bfin_write_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_CURR_X_COUNT(/;"	d
bfin_write_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_CURR_X_COUNT(/;"	d
bfin_write_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_CURR_X_COUNT(/;"	d
bfin_write_DMA18_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_CURR_X_COUNT(/;"	d
bfin_write_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_CURR_Y_COUNT(/;"	d
bfin_write_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_CURR_Y_COUNT(/;"	d
bfin_write_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_CURR_Y_COUNT(/;"	d
bfin_write_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_CURR_Y_COUNT(/;"	d
bfin_write_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_CURR_Y_COUNT(/;"	d
bfin_write_DMA18_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_CURR_Y_COUNT(/;"	d
bfin_write_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_IRQ_STATUS(/;"	d
bfin_write_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_IRQ_STATUS(/;"	d
bfin_write_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_IRQ_STATUS(/;"	d
bfin_write_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_IRQ_STATUS(/;"	d
bfin_write_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_IRQ_STATUS(/;"	d
bfin_write_DMA18_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_IRQ_STATUS(/;"	d
bfin_write_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_NEXT_DESC_PTR(/;"	d
bfin_write_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_NEXT_DESC_PTR(/;"	d
bfin_write_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_NEXT_DESC_PTR(/;"	d
bfin_write_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_NEXT_DESC_PTR(/;"	d
bfin_write_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_NEXT_DESC_PTR(/;"	d
bfin_write_DMA18_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_NEXT_DESC_PTR(/;"	d
bfin_write_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_PERIPHERAL_MAP(/;"	d
bfin_write_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_PERIPHERAL_MAP(/;"	d
bfin_write_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_PERIPHERAL_MAP(/;"	d
bfin_write_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_PERIPHERAL_MAP(/;"	d
bfin_write_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_PERIPHERAL_MAP(/;"	d
bfin_write_DMA18_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_PERIPHERAL_MAP(/;"	d
bfin_write_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_START_ADDR(/;"	d
bfin_write_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_START_ADDR(/;"	d
bfin_write_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_START_ADDR(/;"	d
bfin_write_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_START_ADDR(/;"	d
bfin_write_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_START_ADDR(/;"	d
bfin_write_DMA18_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_START_ADDR(/;"	d
bfin_write_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_X_COUNT(/;"	d
bfin_write_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_X_COUNT(/;"	d
bfin_write_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_X_COUNT(/;"	d
bfin_write_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_X_COUNT(/;"	d
bfin_write_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_X_COUNT(/;"	d
bfin_write_DMA18_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_X_COUNT(/;"	d
bfin_write_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_X_MODIFY(/;"	d
bfin_write_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_X_MODIFY(/;"	d
bfin_write_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_X_MODIFY(/;"	d
bfin_write_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_X_MODIFY(/;"	d
bfin_write_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_X_MODIFY(/;"	d
bfin_write_DMA18_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_X_MODIFY(/;"	d
bfin_write_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_Y_COUNT(/;"	d
bfin_write_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_Y_COUNT(/;"	d
bfin_write_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_Y_COUNT(/;"	d
bfin_write_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_Y_COUNT(/;"	d
bfin_write_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_Y_COUNT(/;"	d
bfin_write_DMA18_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_Y_COUNT(/;"	d
bfin_write_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA18_Y_MODIFY(/;"	d
bfin_write_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA18_Y_MODIFY(/;"	d
bfin_write_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA18_Y_MODIFY(/;"	d
bfin_write_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA18_Y_MODIFY(/;"	d
bfin_write_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA18_Y_MODIFY(/;"	d
bfin_write_DMA18_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA18_Y_MODIFY(/;"	d
bfin_write_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_CONFIG(/;"	d
bfin_write_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_CONFIG(/;"	d
bfin_write_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_CONFIG(/;"	d
bfin_write_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_CONFIG(/;"	d
bfin_write_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_CONFIG(/;"	d
bfin_write_DMA19_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_CONFIG(/;"	d
bfin_write_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_CURR_ADDR(/;"	d
bfin_write_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_CURR_ADDR(/;"	d
bfin_write_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_CURR_ADDR(/;"	d
bfin_write_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_CURR_ADDR(/;"	d
bfin_write_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_CURR_ADDR(/;"	d
bfin_write_DMA19_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_CURR_ADDR(/;"	d
bfin_write_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_CURR_DESC_PTR(/;"	d
bfin_write_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_CURR_DESC_PTR(/;"	d
bfin_write_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_CURR_DESC_PTR(/;"	d
bfin_write_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_CURR_DESC_PTR(/;"	d
bfin_write_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_CURR_DESC_PTR(/;"	d
bfin_write_DMA19_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_CURR_DESC_PTR(/;"	d
bfin_write_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_CURR_X_COUNT(/;"	d
bfin_write_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_CURR_X_COUNT(/;"	d
bfin_write_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_CURR_X_COUNT(/;"	d
bfin_write_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_CURR_X_COUNT(/;"	d
bfin_write_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_CURR_X_COUNT(/;"	d
bfin_write_DMA19_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_CURR_X_COUNT(/;"	d
bfin_write_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_CURR_Y_COUNT(/;"	d
bfin_write_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_CURR_Y_COUNT(/;"	d
bfin_write_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_CURR_Y_COUNT(/;"	d
bfin_write_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_CURR_Y_COUNT(/;"	d
bfin_write_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_CURR_Y_COUNT(/;"	d
bfin_write_DMA19_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_CURR_Y_COUNT(/;"	d
bfin_write_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_IRQ_STATUS(/;"	d
bfin_write_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_IRQ_STATUS(/;"	d
bfin_write_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_IRQ_STATUS(/;"	d
bfin_write_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_IRQ_STATUS(/;"	d
bfin_write_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_IRQ_STATUS(/;"	d
bfin_write_DMA19_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_IRQ_STATUS(/;"	d
bfin_write_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_NEXT_DESC_PTR(/;"	d
bfin_write_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_NEXT_DESC_PTR(/;"	d
bfin_write_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_NEXT_DESC_PTR(/;"	d
bfin_write_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_NEXT_DESC_PTR(/;"	d
bfin_write_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_NEXT_DESC_PTR(/;"	d
bfin_write_DMA19_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_NEXT_DESC_PTR(/;"	d
bfin_write_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_PERIPHERAL_MAP(/;"	d
bfin_write_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_PERIPHERAL_MAP(/;"	d
bfin_write_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_PERIPHERAL_MAP(/;"	d
bfin_write_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_PERIPHERAL_MAP(/;"	d
bfin_write_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_PERIPHERAL_MAP(/;"	d
bfin_write_DMA19_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_PERIPHERAL_MAP(/;"	d
bfin_write_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_START_ADDR(/;"	d
bfin_write_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_START_ADDR(/;"	d
bfin_write_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_START_ADDR(/;"	d
bfin_write_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_START_ADDR(/;"	d
bfin_write_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_START_ADDR(/;"	d
bfin_write_DMA19_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_START_ADDR(/;"	d
bfin_write_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_X_COUNT(/;"	d
bfin_write_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_X_COUNT(/;"	d
bfin_write_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_X_COUNT(/;"	d
bfin_write_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_X_COUNT(/;"	d
bfin_write_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_X_COUNT(/;"	d
bfin_write_DMA19_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_X_COUNT(/;"	d
bfin_write_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_X_MODIFY(/;"	d
bfin_write_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_X_MODIFY(/;"	d
bfin_write_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_X_MODIFY(/;"	d
bfin_write_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_X_MODIFY(/;"	d
bfin_write_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_X_MODIFY(/;"	d
bfin_write_DMA19_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_X_MODIFY(/;"	d
bfin_write_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_Y_COUNT(/;"	d
bfin_write_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_Y_COUNT(/;"	d
bfin_write_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_Y_COUNT(/;"	d
bfin_write_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_Y_COUNT(/;"	d
bfin_write_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_Y_COUNT(/;"	d
bfin_write_DMA19_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_Y_COUNT(/;"	d
bfin_write_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA19_Y_MODIFY(/;"	d
bfin_write_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA19_Y_MODIFY(/;"	d
bfin_write_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA19_Y_MODIFY(/;"	d
bfin_write_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA19_Y_MODIFY(/;"	d
bfin_write_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA19_Y_MODIFY(/;"	d
bfin_write_DMA19_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA19_Y_MODIFY(/;"	d
bfin_write_DMA1_0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_CONFIG(/;"	d
bfin_write_DMA1_0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_CURR_ADDR(/;"	d
bfin_write_DMA1_0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_CURR_X_COUNT(/;"	d
bfin_write_DMA1_0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_IRQ_STATUS(/;"	d
bfin_write_DMA1_0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_START_ADDR(/;"	d
bfin_write_DMA1_0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_X_COUNT(/;"	d
bfin_write_DMA1_0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_X_MODIFY(/;"	d
bfin_write_DMA1_0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_Y_COUNT(/;"	d
bfin_write_DMA1_0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_0_Y_MODIFY(/;"	d
bfin_write_DMA1_10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_CONFIG(/;"	d
bfin_write_DMA1_10_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_CURR_ADDR(/;"	d
bfin_write_DMA1_10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_CURR_X_COUNT(/;"	d
bfin_write_DMA1_10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_IRQ_STATUS(/;"	d
bfin_write_DMA1_10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_10_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_START_ADDR(/;"	d
bfin_write_DMA1_10_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_X_COUNT(/;"	d
bfin_write_DMA1_10_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_X_MODIFY(/;"	d
bfin_write_DMA1_10_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_Y_COUNT(/;"	d
bfin_write_DMA1_10_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_10_Y_MODIFY(/;"	d
bfin_write_DMA1_11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_CONFIG(/;"	d
bfin_write_DMA1_11_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_CURR_ADDR(/;"	d
bfin_write_DMA1_11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_CURR_X_COUNT(/;"	d
bfin_write_DMA1_11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_IRQ_STATUS(/;"	d
bfin_write_DMA1_11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_11_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_START_ADDR(/;"	d
bfin_write_DMA1_11_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_X_COUNT(/;"	d
bfin_write_DMA1_11_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_X_MODIFY(/;"	d
bfin_write_DMA1_11_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_Y_COUNT(/;"	d
bfin_write_DMA1_11_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_11_Y_MODIFY(/;"	d
bfin_write_DMA1_1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_CONFIG(/;"	d
bfin_write_DMA1_1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_CURR_ADDR(/;"	d
bfin_write_DMA1_1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_IRQ_STATUS(/;"	d
bfin_write_DMA1_1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_START_ADDR(/;"	d
bfin_write_DMA1_1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_X_COUNT(/;"	d
bfin_write_DMA1_1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_X_MODIFY(/;"	d
bfin_write_DMA1_1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_Y_COUNT(/;"	d
bfin_write_DMA1_1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_1_Y_MODIFY(/;"	d
bfin_write_DMA1_2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_CONFIG(/;"	d
bfin_write_DMA1_2_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_CURR_ADDR(/;"	d
bfin_write_DMA1_2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_CURR_X_COUNT(/;"	d
bfin_write_DMA1_2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_IRQ_STATUS(/;"	d
bfin_write_DMA1_2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_2_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_START_ADDR(/;"	d
bfin_write_DMA1_2_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_X_COUNT(/;"	d
bfin_write_DMA1_2_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_X_MODIFY(/;"	d
bfin_write_DMA1_2_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_Y_COUNT(/;"	d
bfin_write_DMA1_2_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_2_Y_MODIFY(/;"	d
bfin_write_DMA1_3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_CONFIG(/;"	d
bfin_write_DMA1_3_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_CURR_ADDR(/;"	d
bfin_write_DMA1_3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_CURR_X_COUNT(/;"	d
bfin_write_DMA1_3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_IRQ_STATUS(/;"	d
bfin_write_DMA1_3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_3_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_START_ADDR(/;"	d
bfin_write_DMA1_3_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_X_COUNT(/;"	d
bfin_write_DMA1_3_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_X_MODIFY(/;"	d
bfin_write_DMA1_3_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_Y_COUNT(/;"	d
bfin_write_DMA1_3_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_3_Y_MODIFY(/;"	d
bfin_write_DMA1_4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_CONFIG(/;"	d
bfin_write_DMA1_4_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_CURR_ADDR(/;"	d
bfin_write_DMA1_4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_CURR_X_COUNT(/;"	d
bfin_write_DMA1_4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_IRQ_STATUS(/;"	d
bfin_write_DMA1_4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_4_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_START_ADDR(/;"	d
bfin_write_DMA1_4_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_X_COUNT(/;"	d
bfin_write_DMA1_4_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_X_MODIFY(/;"	d
bfin_write_DMA1_4_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_Y_COUNT(/;"	d
bfin_write_DMA1_4_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_4_Y_MODIFY(/;"	d
bfin_write_DMA1_5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_CONFIG(/;"	d
bfin_write_DMA1_5_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_CURR_ADDR(/;"	d
bfin_write_DMA1_5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_CURR_X_COUNT(/;"	d
bfin_write_DMA1_5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_IRQ_STATUS(/;"	d
bfin_write_DMA1_5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_5_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_START_ADDR(/;"	d
bfin_write_DMA1_5_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_X_COUNT(/;"	d
bfin_write_DMA1_5_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_X_MODIFY(/;"	d
bfin_write_DMA1_5_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_Y_COUNT(/;"	d
bfin_write_DMA1_5_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_5_Y_MODIFY(/;"	d
bfin_write_DMA1_6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_CONFIG(/;"	d
bfin_write_DMA1_6_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_CURR_ADDR(/;"	d
bfin_write_DMA1_6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_CURR_X_COUNT(/;"	d
bfin_write_DMA1_6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_IRQ_STATUS(/;"	d
bfin_write_DMA1_6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_6_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_START_ADDR(/;"	d
bfin_write_DMA1_6_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_X_COUNT(/;"	d
bfin_write_DMA1_6_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_X_MODIFY(/;"	d
bfin_write_DMA1_6_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_Y_COUNT(/;"	d
bfin_write_DMA1_6_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_6_Y_MODIFY(/;"	d
bfin_write_DMA1_7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_CONFIG(/;"	d
bfin_write_DMA1_7_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_CURR_ADDR(/;"	d
bfin_write_DMA1_7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_CURR_X_COUNT(/;"	d
bfin_write_DMA1_7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_IRQ_STATUS(/;"	d
bfin_write_DMA1_7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_7_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_START_ADDR(/;"	d
bfin_write_DMA1_7_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_X_COUNT(/;"	d
bfin_write_DMA1_7_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_X_MODIFY(/;"	d
bfin_write_DMA1_7_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_Y_COUNT(/;"	d
bfin_write_DMA1_7_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_7_Y_MODIFY(/;"	d
bfin_write_DMA1_8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_CONFIG(/;"	d
bfin_write_DMA1_8_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_CURR_ADDR(/;"	d
bfin_write_DMA1_8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_CURR_X_COUNT(/;"	d
bfin_write_DMA1_8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_IRQ_STATUS(/;"	d
bfin_write_DMA1_8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_8_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_START_ADDR(/;"	d
bfin_write_DMA1_8_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_X_COUNT(/;"	d
bfin_write_DMA1_8_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_X_MODIFY(/;"	d
bfin_write_DMA1_8_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_Y_COUNT(/;"	d
bfin_write_DMA1_8_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_8_Y_MODIFY(/;"	d
bfin_write_DMA1_9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_CONFIG(/;"	d
bfin_write_DMA1_9_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_CURR_ADDR(/;"	d
bfin_write_DMA1_9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_CURR_X_COUNT(/;"	d
bfin_write_DMA1_9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_IRQ_STATUS(/;"	d
bfin_write_DMA1_9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_9_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_START_ADDR(/;"	d
bfin_write_DMA1_9_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_X_COUNT(/;"	d
bfin_write_DMA1_9_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_X_MODIFY(/;"	d
bfin_write_DMA1_9_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_Y_COUNT(/;"	d
bfin_write_DMA1_9_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_9_Y_MODIFY(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_CONFIG(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_CURR_ADDR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_CURR_DESC_PTR(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_CURR_X_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_CURR_Y_COUNT(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_IRQ_STATUS(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_START_ADDR(/;"	d
bfin_write_DMA1_TC_CNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_TC_CNT(/;"	d
bfin_write_DMA1_TC_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_TC_CNT(/;"	d
bfin_write_DMA1_TC_PER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_TC_PER(/;"	d
bfin_write_DMA1_TC_PER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA1_TC_PER(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_X_COUNT(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_X_MODIFY(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_Y_COUNT(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA1_Y_MODIFY(/;"	d
bfin_write_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_CONFIG(/;"	d
bfin_write_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_CONFIG(/;"	d
bfin_write_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_CONFIG(/;"	d
bfin_write_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_CONFIG(/;"	d
bfin_write_DMA20_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_CONFIG(/;"	d
bfin_write_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_CURR_ADDR(/;"	d
bfin_write_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_CURR_ADDR(/;"	d
bfin_write_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_CURR_ADDR(/;"	d
bfin_write_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_CURR_ADDR(/;"	d
bfin_write_DMA20_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_CURR_ADDR(/;"	d
bfin_write_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_CURR_DESC_PTR(/;"	d
bfin_write_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_CURR_DESC_PTR(/;"	d
bfin_write_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_CURR_DESC_PTR(/;"	d
bfin_write_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_CURR_DESC_PTR(/;"	d
bfin_write_DMA20_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_CURR_DESC_PTR(/;"	d
bfin_write_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_CURR_X_COUNT(/;"	d
bfin_write_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_CURR_X_COUNT(/;"	d
bfin_write_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_CURR_X_COUNT(/;"	d
bfin_write_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_CURR_X_COUNT(/;"	d
bfin_write_DMA20_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_CURR_X_COUNT(/;"	d
bfin_write_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_CURR_Y_COUNT(/;"	d
bfin_write_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_CURR_Y_COUNT(/;"	d
bfin_write_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_CURR_Y_COUNT(/;"	d
bfin_write_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_CURR_Y_COUNT(/;"	d
bfin_write_DMA20_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_CURR_Y_COUNT(/;"	d
bfin_write_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_IRQ_STATUS(/;"	d
bfin_write_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_IRQ_STATUS(/;"	d
bfin_write_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_IRQ_STATUS(/;"	d
bfin_write_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_IRQ_STATUS(/;"	d
bfin_write_DMA20_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_IRQ_STATUS(/;"	d
bfin_write_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_NEXT_DESC_PTR(/;"	d
bfin_write_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_NEXT_DESC_PTR(/;"	d
bfin_write_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_NEXT_DESC_PTR(/;"	d
bfin_write_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_NEXT_DESC_PTR(/;"	d
bfin_write_DMA20_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_NEXT_DESC_PTR(/;"	d
bfin_write_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_PERIPHERAL_MAP(/;"	d
bfin_write_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_PERIPHERAL_MAP(/;"	d
bfin_write_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_PERIPHERAL_MAP(/;"	d
bfin_write_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_PERIPHERAL_MAP(/;"	d
bfin_write_DMA20_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_PERIPHERAL_MAP(/;"	d
bfin_write_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_START_ADDR(/;"	d
bfin_write_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_START_ADDR(/;"	d
bfin_write_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_START_ADDR(/;"	d
bfin_write_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_START_ADDR(/;"	d
bfin_write_DMA20_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_START_ADDR(/;"	d
bfin_write_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_X_COUNT(/;"	d
bfin_write_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_X_COUNT(/;"	d
bfin_write_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_X_COUNT(/;"	d
bfin_write_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_X_COUNT(/;"	d
bfin_write_DMA20_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_X_COUNT(/;"	d
bfin_write_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_X_MODIFY(/;"	d
bfin_write_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_X_MODIFY(/;"	d
bfin_write_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_X_MODIFY(/;"	d
bfin_write_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_X_MODIFY(/;"	d
bfin_write_DMA20_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_X_MODIFY(/;"	d
bfin_write_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_Y_COUNT(/;"	d
bfin_write_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_Y_COUNT(/;"	d
bfin_write_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_Y_COUNT(/;"	d
bfin_write_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_Y_COUNT(/;"	d
bfin_write_DMA20_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_Y_COUNT(/;"	d
bfin_write_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA20_Y_MODIFY(/;"	d
bfin_write_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA20_Y_MODIFY(/;"	d
bfin_write_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA20_Y_MODIFY(/;"	d
bfin_write_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA20_Y_MODIFY(/;"	d
bfin_write_DMA20_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA20_Y_MODIFY(/;"	d
bfin_write_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_CONFIG(/;"	d
bfin_write_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_CONFIG(/;"	d
bfin_write_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_CONFIG(/;"	d
bfin_write_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_CONFIG(/;"	d
bfin_write_DMA21_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_CONFIG(/;"	d
bfin_write_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_CURR_ADDR(/;"	d
bfin_write_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_CURR_ADDR(/;"	d
bfin_write_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_CURR_ADDR(/;"	d
bfin_write_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_CURR_ADDR(/;"	d
bfin_write_DMA21_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_CURR_ADDR(/;"	d
bfin_write_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_CURR_DESC_PTR(/;"	d
bfin_write_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_CURR_DESC_PTR(/;"	d
bfin_write_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_CURR_DESC_PTR(/;"	d
bfin_write_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_CURR_DESC_PTR(/;"	d
bfin_write_DMA21_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_CURR_DESC_PTR(/;"	d
bfin_write_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_CURR_X_COUNT(/;"	d
bfin_write_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_CURR_X_COUNT(/;"	d
bfin_write_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_CURR_X_COUNT(/;"	d
bfin_write_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_CURR_X_COUNT(/;"	d
bfin_write_DMA21_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_CURR_X_COUNT(/;"	d
bfin_write_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_CURR_Y_COUNT(/;"	d
bfin_write_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_CURR_Y_COUNT(/;"	d
bfin_write_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_CURR_Y_COUNT(/;"	d
bfin_write_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_CURR_Y_COUNT(/;"	d
bfin_write_DMA21_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_CURR_Y_COUNT(/;"	d
bfin_write_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_IRQ_STATUS(/;"	d
bfin_write_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_IRQ_STATUS(/;"	d
bfin_write_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_IRQ_STATUS(/;"	d
bfin_write_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_IRQ_STATUS(/;"	d
bfin_write_DMA21_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_IRQ_STATUS(/;"	d
bfin_write_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_NEXT_DESC_PTR(/;"	d
bfin_write_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_NEXT_DESC_PTR(/;"	d
bfin_write_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_NEXT_DESC_PTR(/;"	d
bfin_write_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_NEXT_DESC_PTR(/;"	d
bfin_write_DMA21_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_NEXT_DESC_PTR(/;"	d
bfin_write_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_PERIPHERAL_MAP(/;"	d
bfin_write_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_PERIPHERAL_MAP(/;"	d
bfin_write_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_PERIPHERAL_MAP(/;"	d
bfin_write_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_PERIPHERAL_MAP(/;"	d
bfin_write_DMA21_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_PERIPHERAL_MAP(/;"	d
bfin_write_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_START_ADDR(/;"	d
bfin_write_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_START_ADDR(/;"	d
bfin_write_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_START_ADDR(/;"	d
bfin_write_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_START_ADDR(/;"	d
bfin_write_DMA21_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_START_ADDR(/;"	d
bfin_write_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_X_COUNT(/;"	d
bfin_write_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_X_COUNT(/;"	d
bfin_write_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_X_COUNT(/;"	d
bfin_write_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_X_COUNT(/;"	d
bfin_write_DMA21_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_X_COUNT(/;"	d
bfin_write_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_X_MODIFY(/;"	d
bfin_write_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_X_MODIFY(/;"	d
bfin_write_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_X_MODIFY(/;"	d
bfin_write_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_X_MODIFY(/;"	d
bfin_write_DMA21_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_X_MODIFY(/;"	d
bfin_write_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_Y_COUNT(/;"	d
bfin_write_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_Y_COUNT(/;"	d
bfin_write_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_Y_COUNT(/;"	d
bfin_write_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_Y_COUNT(/;"	d
bfin_write_DMA21_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_Y_COUNT(/;"	d
bfin_write_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA21_Y_MODIFY(/;"	d
bfin_write_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA21_Y_MODIFY(/;"	d
bfin_write_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA21_Y_MODIFY(/;"	d
bfin_write_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA21_Y_MODIFY(/;"	d
bfin_write_DMA21_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA21_Y_MODIFY(/;"	d
bfin_write_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_CONFIG(/;"	d
bfin_write_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_CONFIG(/;"	d
bfin_write_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_CONFIG(/;"	d
bfin_write_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_CONFIG(/;"	d
bfin_write_DMA22_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_CONFIG(/;"	d
bfin_write_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_CURR_ADDR(/;"	d
bfin_write_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_CURR_ADDR(/;"	d
bfin_write_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_CURR_ADDR(/;"	d
bfin_write_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_CURR_ADDR(/;"	d
bfin_write_DMA22_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_CURR_ADDR(/;"	d
bfin_write_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_CURR_DESC_PTR(/;"	d
bfin_write_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_CURR_DESC_PTR(/;"	d
bfin_write_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_CURR_DESC_PTR(/;"	d
bfin_write_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_CURR_DESC_PTR(/;"	d
bfin_write_DMA22_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_CURR_DESC_PTR(/;"	d
bfin_write_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_CURR_X_COUNT(/;"	d
bfin_write_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_CURR_X_COUNT(/;"	d
bfin_write_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_CURR_X_COUNT(/;"	d
bfin_write_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_CURR_X_COUNT(/;"	d
bfin_write_DMA22_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_CURR_X_COUNT(/;"	d
bfin_write_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_CURR_Y_COUNT(/;"	d
bfin_write_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_CURR_Y_COUNT(/;"	d
bfin_write_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_CURR_Y_COUNT(/;"	d
bfin_write_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_CURR_Y_COUNT(/;"	d
bfin_write_DMA22_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_CURR_Y_COUNT(/;"	d
bfin_write_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_IRQ_STATUS(/;"	d
bfin_write_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_IRQ_STATUS(/;"	d
bfin_write_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_IRQ_STATUS(/;"	d
bfin_write_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_IRQ_STATUS(/;"	d
bfin_write_DMA22_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_IRQ_STATUS(/;"	d
bfin_write_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_NEXT_DESC_PTR(/;"	d
bfin_write_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_NEXT_DESC_PTR(/;"	d
bfin_write_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_NEXT_DESC_PTR(/;"	d
bfin_write_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_NEXT_DESC_PTR(/;"	d
bfin_write_DMA22_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_NEXT_DESC_PTR(/;"	d
bfin_write_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_PERIPHERAL_MAP(/;"	d
bfin_write_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_PERIPHERAL_MAP(/;"	d
bfin_write_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_PERIPHERAL_MAP(/;"	d
bfin_write_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_PERIPHERAL_MAP(/;"	d
bfin_write_DMA22_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_PERIPHERAL_MAP(/;"	d
bfin_write_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_START_ADDR(/;"	d
bfin_write_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_START_ADDR(/;"	d
bfin_write_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_START_ADDR(/;"	d
bfin_write_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_START_ADDR(/;"	d
bfin_write_DMA22_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_START_ADDR(/;"	d
bfin_write_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_X_COUNT(/;"	d
bfin_write_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_X_COUNT(/;"	d
bfin_write_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_X_COUNT(/;"	d
bfin_write_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_X_COUNT(/;"	d
bfin_write_DMA22_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_X_COUNT(/;"	d
bfin_write_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_X_MODIFY(/;"	d
bfin_write_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_X_MODIFY(/;"	d
bfin_write_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_X_MODIFY(/;"	d
bfin_write_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_X_MODIFY(/;"	d
bfin_write_DMA22_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_X_MODIFY(/;"	d
bfin_write_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_Y_COUNT(/;"	d
bfin_write_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_Y_COUNT(/;"	d
bfin_write_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_Y_COUNT(/;"	d
bfin_write_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_Y_COUNT(/;"	d
bfin_write_DMA22_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_Y_COUNT(/;"	d
bfin_write_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA22_Y_MODIFY(/;"	d
bfin_write_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA22_Y_MODIFY(/;"	d
bfin_write_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA22_Y_MODIFY(/;"	d
bfin_write_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA22_Y_MODIFY(/;"	d
bfin_write_DMA22_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA22_Y_MODIFY(/;"	d
bfin_write_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_CONFIG(/;"	d
bfin_write_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_CONFIG(/;"	d
bfin_write_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_CONFIG(/;"	d
bfin_write_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_CONFIG(/;"	d
bfin_write_DMA23_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_CONFIG(/;"	d
bfin_write_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_CURR_ADDR(/;"	d
bfin_write_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_CURR_ADDR(/;"	d
bfin_write_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_CURR_ADDR(/;"	d
bfin_write_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_CURR_ADDR(/;"	d
bfin_write_DMA23_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_CURR_ADDR(/;"	d
bfin_write_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_CURR_DESC_PTR(/;"	d
bfin_write_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_CURR_DESC_PTR(/;"	d
bfin_write_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_CURR_DESC_PTR(/;"	d
bfin_write_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_CURR_DESC_PTR(/;"	d
bfin_write_DMA23_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_CURR_DESC_PTR(/;"	d
bfin_write_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_CURR_X_COUNT(/;"	d
bfin_write_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_CURR_X_COUNT(/;"	d
bfin_write_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_CURR_X_COUNT(/;"	d
bfin_write_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_CURR_X_COUNT(/;"	d
bfin_write_DMA23_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_CURR_X_COUNT(/;"	d
bfin_write_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_CURR_Y_COUNT(/;"	d
bfin_write_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_CURR_Y_COUNT(/;"	d
bfin_write_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_CURR_Y_COUNT(/;"	d
bfin_write_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_CURR_Y_COUNT(/;"	d
bfin_write_DMA23_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_CURR_Y_COUNT(/;"	d
bfin_write_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_IRQ_STATUS(/;"	d
bfin_write_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_IRQ_STATUS(/;"	d
bfin_write_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_IRQ_STATUS(/;"	d
bfin_write_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_IRQ_STATUS(/;"	d
bfin_write_DMA23_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_IRQ_STATUS(/;"	d
bfin_write_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_NEXT_DESC_PTR(/;"	d
bfin_write_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_NEXT_DESC_PTR(/;"	d
bfin_write_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_NEXT_DESC_PTR(/;"	d
bfin_write_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_NEXT_DESC_PTR(/;"	d
bfin_write_DMA23_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_NEXT_DESC_PTR(/;"	d
bfin_write_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_PERIPHERAL_MAP(/;"	d
bfin_write_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_PERIPHERAL_MAP(/;"	d
bfin_write_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_PERIPHERAL_MAP(/;"	d
bfin_write_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_PERIPHERAL_MAP(/;"	d
bfin_write_DMA23_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_PERIPHERAL_MAP(/;"	d
bfin_write_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_START_ADDR(/;"	d
bfin_write_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_START_ADDR(/;"	d
bfin_write_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_START_ADDR(/;"	d
bfin_write_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_START_ADDR(/;"	d
bfin_write_DMA23_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_START_ADDR(/;"	d
bfin_write_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_X_COUNT(/;"	d
bfin_write_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_X_COUNT(/;"	d
bfin_write_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_X_COUNT(/;"	d
bfin_write_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_X_COUNT(/;"	d
bfin_write_DMA23_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_X_COUNT(/;"	d
bfin_write_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_X_MODIFY(/;"	d
bfin_write_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_X_MODIFY(/;"	d
bfin_write_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_X_MODIFY(/;"	d
bfin_write_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_X_MODIFY(/;"	d
bfin_write_DMA23_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_X_MODIFY(/;"	d
bfin_write_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_Y_COUNT(/;"	d
bfin_write_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_Y_COUNT(/;"	d
bfin_write_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_Y_COUNT(/;"	d
bfin_write_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_Y_COUNT(/;"	d
bfin_write_DMA23_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_Y_COUNT(/;"	d
bfin_write_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA23_Y_MODIFY(/;"	d
bfin_write_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA23_Y_MODIFY(/;"	d
bfin_write_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA23_Y_MODIFY(/;"	d
bfin_write_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA23_Y_MODIFY(/;"	d
bfin_write_DMA23_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA23_Y_MODIFY(/;"	d
bfin_write_DMA2_0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_CONFIG(/;"	d
bfin_write_DMA2_0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_CURR_ADDR(/;"	d
bfin_write_DMA2_0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_CURR_X_COUNT(/;"	d
bfin_write_DMA2_0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_IRQ_STATUS(/;"	d
bfin_write_DMA2_0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_START_ADDR(/;"	d
bfin_write_DMA2_0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_X_COUNT(/;"	d
bfin_write_DMA2_0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_X_MODIFY(/;"	d
bfin_write_DMA2_0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_Y_COUNT(/;"	d
bfin_write_DMA2_0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_0_Y_MODIFY(/;"	d
bfin_write_DMA2_10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_CONFIG(/;"	d
bfin_write_DMA2_10_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_CURR_ADDR(/;"	d
bfin_write_DMA2_10_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_10_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_CURR_X_COUNT(/;"	d
bfin_write_DMA2_10_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_10_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_IRQ_STATUS(/;"	d
bfin_write_DMA2_10_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_10_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_10_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_START_ADDR(/;"	d
bfin_write_DMA2_10_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_X_COUNT(/;"	d
bfin_write_DMA2_10_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_X_MODIFY(/;"	d
bfin_write_DMA2_10_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_Y_COUNT(/;"	d
bfin_write_DMA2_10_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_10_Y_MODIFY(/;"	d
bfin_write_DMA2_11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_CONFIG(/;"	d
bfin_write_DMA2_11_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_CURR_ADDR(/;"	d
bfin_write_DMA2_11_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_11_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_CURR_X_COUNT(/;"	d
bfin_write_DMA2_11_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_11_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_IRQ_STATUS(/;"	d
bfin_write_DMA2_11_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_11_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_11_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_START_ADDR(/;"	d
bfin_write_DMA2_11_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_X_COUNT(/;"	d
bfin_write_DMA2_11_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_X_MODIFY(/;"	d
bfin_write_DMA2_11_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_Y_COUNT(/;"	d
bfin_write_DMA2_11_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_11_Y_MODIFY(/;"	d
bfin_write_DMA2_1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_CONFIG(/;"	d
bfin_write_DMA2_1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_CURR_ADDR(/;"	d
bfin_write_DMA2_1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_CURR_X_COUNT(/;"	d
bfin_write_DMA2_1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_IRQ_STATUS(/;"	d
bfin_write_DMA2_1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_START_ADDR(/;"	d
bfin_write_DMA2_1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_X_COUNT(/;"	d
bfin_write_DMA2_1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_X_MODIFY(/;"	d
bfin_write_DMA2_1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_Y_COUNT(/;"	d
bfin_write_DMA2_1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_1_Y_MODIFY(/;"	d
bfin_write_DMA2_2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_CONFIG(/;"	d
bfin_write_DMA2_2_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_CURR_ADDR(/;"	d
bfin_write_DMA2_2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_IRQ_STATUS(/;"	d
bfin_write_DMA2_2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_2_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_START_ADDR(/;"	d
bfin_write_DMA2_2_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_X_COUNT(/;"	d
bfin_write_DMA2_2_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_X_MODIFY(/;"	d
bfin_write_DMA2_2_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_Y_COUNT(/;"	d
bfin_write_DMA2_2_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_2_Y_MODIFY(/;"	d
bfin_write_DMA2_3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_CONFIG(/;"	d
bfin_write_DMA2_3_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_CURR_ADDR(/;"	d
bfin_write_DMA2_3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_CURR_X_COUNT(/;"	d
bfin_write_DMA2_3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_IRQ_STATUS(/;"	d
bfin_write_DMA2_3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_3_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_START_ADDR(/;"	d
bfin_write_DMA2_3_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_X_COUNT(/;"	d
bfin_write_DMA2_3_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_X_MODIFY(/;"	d
bfin_write_DMA2_3_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_Y_COUNT(/;"	d
bfin_write_DMA2_3_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_3_Y_MODIFY(/;"	d
bfin_write_DMA2_4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_CONFIG(/;"	d
bfin_write_DMA2_4_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_CURR_ADDR(/;"	d
bfin_write_DMA2_4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_CURR_X_COUNT(/;"	d
bfin_write_DMA2_4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_IRQ_STATUS(/;"	d
bfin_write_DMA2_4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_4_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_START_ADDR(/;"	d
bfin_write_DMA2_4_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_X_COUNT(/;"	d
bfin_write_DMA2_4_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_X_MODIFY(/;"	d
bfin_write_DMA2_4_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_Y_COUNT(/;"	d
bfin_write_DMA2_4_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_4_Y_MODIFY(/;"	d
bfin_write_DMA2_5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_CONFIG(/;"	d
bfin_write_DMA2_5_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_CURR_ADDR(/;"	d
bfin_write_DMA2_5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_CURR_X_COUNT(/;"	d
bfin_write_DMA2_5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_IRQ_STATUS(/;"	d
bfin_write_DMA2_5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_5_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_START_ADDR(/;"	d
bfin_write_DMA2_5_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_X_COUNT(/;"	d
bfin_write_DMA2_5_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_X_MODIFY(/;"	d
bfin_write_DMA2_5_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_Y_COUNT(/;"	d
bfin_write_DMA2_5_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_5_Y_MODIFY(/;"	d
bfin_write_DMA2_6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_CONFIG(/;"	d
bfin_write_DMA2_6_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_CURR_ADDR(/;"	d
bfin_write_DMA2_6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_CURR_X_COUNT(/;"	d
bfin_write_DMA2_6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_IRQ_STATUS(/;"	d
bfin_write_DMA2_6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_6_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_START_ADDR(/;"	d
bfin_write_DMA2_6_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_X_COUNT(/;"	d
bfin_write_DMA2_6_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_X_MODIFY(/;"	d
bfin_write_DMA2_6_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_Y_COUNT(/;"	d
bfin_write_DMA2_6_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_6_Y_MODIFY(/;"	d
bfin_write_DMA2_7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_CONFIG(/;"	d
bfin_write_DMA2_7_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_CURR_ADDR(/;"	d
bfin_write_DMA2_7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_CURR_X_COUNT(/;"	d
bfin_write_DMA2_7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_IRQ_STATUS(/;"	d
bfin_write_DMA2_7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_7_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_START_ADDR(/;"	d
bfin_write_DMA2_7_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_X_COUNT(/;"	d
bfin_write_DMA2_7_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_X_MODIFY(/;"	d
bfin_write_DMA2_7_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_Y_COUNT(/;"	d
bfin_write_DMA2_7_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_7_Y_MODIFY(/;"	d
bfin_write_DMA2_8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_CONFIG(/;"	d
bfin_write_DMA2_8_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_CURR_ADDR(/;"	d
bfin_write_DMA2_8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_CURR_X_COUNT(/;"	d
bfin_write_DMA2_8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_IRQ_STATUS(/;"	d
bfin_write_DMA2_8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_8_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_START_ADDR(/;"	d
bfin_write_DMA2_8_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_X_COUNT(/;"	d
bfin_write_DMA2_8_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_X_MODIFY(/;"	d
bfin_write_DMA2_8_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_Y_COUNT(/;"	d
bfin_write_DMA2_8_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_8_Y_MODIFY(/;"	d
bfin_write_DMA2_9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_CONFIG(/;"	d
bfin_write_DMA2_9_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_CURR_ADDR(/;"	d
bfin_write_DMA2_9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_CURR_X_COUNT(/;"	d
bfin_write_DMA2_9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_IRQ_STATUS(/;"	d
bfin_write_DMA2_9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_9_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_START_ADDR(/;"	d
bfin_write_DMA2_9_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_X_COUNT(/;"	d
bfin_write_DMA2_9_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_X_MODIFY(/;"	d
bfin_write_DMA2_9_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_Y_COUNT(/;"	d
bfin_write_DMA2_9_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_9_Y_MODIFY(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_CONFIG(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_CURR_ADDR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_CURR_DESC_PTR(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_CURR_X_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_CURR_Y_COUNT(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_IRQ_STATUS(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_NEXT_DESC_PTR(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_PERIPHERAL_MAP(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_START_ADDR(/;"	d
bfin_write_DMA2_TC_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_TC_CNT(/;"	d
bfin_write_DMA2_TC_PER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_DMA2_TC_PER(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_X_COUNT(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_X_MODIFY(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_Y_COUNT(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA2_Y_MODIFY(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_CONFIG(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_CURR_ADDR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_CURR_DESC_PTR(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_CURR_X_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_CURR_Y_COUNT(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_IRQ_STATUS(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_NEXT_DESC_PTR(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_PERIPHERAL_MAP(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_START_ADDR(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_X_COUNT(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_X_MODIFY(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_Y_COUNT(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA3_Y_MODIFY(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_CONFIG(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_CURR_ADDR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_CURR_DESC_PTR(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_CURR_X_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_CURR_Y_COUNT(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_IRQ_STATUS(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_NEXT_DESC_PTR(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_PERIPHERAL_MAP(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_START_ADDR(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_X_COUNT(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_X_MODIFY(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_Y_COUNT(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA4_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA4_Y_MODIFY(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_CONFIG(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_CURR_ADDR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_CURR_DESC_PTR(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_CURR_X_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_CURR_Y_COUNT(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_IRQ_STATUS(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_NEXT_DESC_PTR(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_PERIPHERAL_MAP(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_START_ADDR(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_X_COUNT(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_X_MODIFY(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_Y_COUNT(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA5_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA5_Y_MODIFY(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_CONFIG(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_CURR_ADDR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_CURR_DESC_PTR(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_CURR_X_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_CURR_Y_COUNT(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_IRQ_STATUS(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_NEXT_DESC_PTR(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_PERIPHERAL_MAP(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_START_ADDR(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_X_COUNT(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_X_MODIFY(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_Y_COUNT(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA6_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA6_Y_MODIFY(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_CONFIG(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_CURR_ADDR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_CURR_DESC_PTR(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_CURR_X_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_CURR_Y_COUNT(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_IRQ_STATUS(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_NEXT_DESC_PTR(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_PERIPHERAL_MAP(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_START_ADDR(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_X_COUNT(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_X_MODIFY(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_Y_COUNT(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA7_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA7_Y_MODIFY(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_CONFIG(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_CURR_ADDR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_CURR_DESC_PTR(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_CURR_X_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_CURR_Y_COUNT(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_IRQ_STATUS(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_NEXT_DESC_PTR(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_PERIPHERAL_MAP(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_START_ADDR(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_X_COUNT(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_X_MODIFY(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_Y_COUNT(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA8_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA8_Y_MODIFY(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_CONFIG(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_CURR_ADDR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_CURR_DESC_PTR(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_CURR_X_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_CURR_Y_COUNT(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_IRQ_STATUS(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_NEXT_DESC_PTR(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_PERIPHERAL_MAP(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_START_ADDR(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_X_COUNT(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_X_MODIFY(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_Y_COUNT(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMA9_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMA9_Y_MODIFY(/;"	d
bfin_write_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMAC0_TCCNT(/;"	d
bfin_write_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMAC0_TCCNT(/;"	d
bfin_write_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMAC0_TCCNT(/;"	d
bfin_write_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMAC0_TCCNT(/;"	d
bfin_write_DMAC0_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMAC0_TCCNT(/;"	d
bfin_write_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMAC0_TCPER(/;"	d
bfin_write_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMAC0_TCPER(/;"	d
bfin_write_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMAC0_TCPER(/;"	d
bfin_write_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMAC0_TCPER(/;"	d
bfin_write_DMAC0_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMAC0_TCPER(/;"	d
bfin_write_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMAC1_PERIMUX(/;"	d
bfin_write_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMAC1_PERIMUX(/;"	d
bfin_write_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMAC1_PERIMUX(/;"	d
bfin_write_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMAC1_PERIMUX(/;"	d
bfin_write_DMAC1_PERIMUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMAC1_PERIMUX(/;"	d
bfin_write_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMAC1_TCCNT(/;"	d
bfin_write_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMAC1_TCCNT(/;"	d
bfin_write_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMAC1_TCCNT(/;"	d
bfin_write_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMAC1_TCCNT(/;"	d
bfin_write_DMAC1_TCCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMAC1_TCCNT(/;"	d
bfin_write_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_DMAC1_TCPER(/;"	d
bfin_write_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_DMAC1_TCPER(/;"	d
bfin_write_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_DMAC1_TCPER(/;"	d
bfin_write_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_DMAC1_TCPER(/;"	d
bfin_write_DMAC1_TCPER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_DMAC1_TCPER(/;"	d
bfin_write_DMAFLX0_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_CURXCOUNT(/;"	d
bfin_write_DMAFLX0_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_CURYCOUNT(/;"	d
bfin_write_DMAFLX0_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_DMACNFG(/;"	d
bfin_write_DMAFLX0_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_IRQSTAT(/;"	d
bfin_write_DMAFLX0_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_PMAP(/;"	d
bfin_write_DMAFLX0_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_XCOUNT(/;"	d
bfin_write_DMAFLX0_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_XMODIFY(/;"	d
bfin_write_DMAFLX0_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_YCOUNT(/;"	d
bfin_write_DMAFLX0_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX0_YMODIFY(/;"	d
bfin_write_DMAFLX1_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_CURXCOUNT(/;"	d
bfin_write_DMAFLX1_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_CURYCOUNT(/;"	d
bfin_write_DMAFLX1_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_DMACNFG(/;"	d
bfin_write_DMAFLX1_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_IRQSTAT(/;"	d
bfin_write_DMAFLX1_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_PMAP(/;"	d
bfin_write_DMAFLX1_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_XCOUNT(/;"	d
bfin_write_DMAFLX1_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_XMODIFY(/;"	d
bfin_write_DMAFLX1_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_YCOUNT(/;"	d
bfin_write_DMAFLX1_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX1_YMODIFY(/;"	d
bfin_write_DMAFLX2_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_CURXCOUNT(/;"	d
bfin_write_DMAFLX2_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_CURYCOUNT(/;"	d
bfin_write_DMAFLX2_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_DMACNFG(/;"	d
bfin_write_DMAFLX2_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_IRQSTAT(/;"	d
bfin_write_DMAFLX2_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_PMAP(/;"	d
bfin_write_DMAFLX2_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_XCOUNT(/;"	d
bfin_write_DMAFLX2_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_XMODIFY(/;"	d
bfin_write_DMAFLX2_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_YCOUNT(/;"	d
bfin_write_DMAFLX2_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX2_YMODIFY(/;"	d
bfin_write_DMAFLX3_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_CURXCOUNT(/;"	d
bfin_write_DMAFLX3_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_CURYCOUNT(/;"	d
bfin_write_DMAFLX3_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_DMACNFG(/;"	d
bfin_write_DMAFLX3_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_IRQSTAT(/;"	d
bfin_write_DMAFLX3_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_PMAP(/;"	d
bfin_write_DMAFLX3_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_XCOUNT(/;"	d
bfin_write_DMAFLX3_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_XMODIFY(/;"	d
bfin_write_DMAFLX3_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_YCOUNT(/;"	d
bfin_write_DMAFLX3_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX3_YMODIFY(/;"	d
bfin_write_DMAFLX4_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_CURXCOUNT(/;"	d
bfin_write_DMAFLX4_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_CURYCOUNT(/;"	d
bfin_write_DMAFLX4_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_DMACNFG(/;"	d
bfin_write_DMAFLX4_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_IRQSTAT(/;"	d
bfin_write_DMAFLX4_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_PMAP(/;"	d
bfin_write_DMAFLX4_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_XCOUNT(/;"	d
bfin_write_DMAFLX4_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_XMODIFY(/;"	d
bfin_write_DMAFLX4_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_YCOUNT(/;"	d
bfin_write_DMAFLX4_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX4_YMODIFY(/;"	d
bfin_write_DMAFLX5_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_CURXCOUNT(/;"	d
bfin_write_DMAFLX5_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_CURYCOUNT(/;"	d
bfin_write_DMAFLX5_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_DMACNFG(/;"	d
bfin_write_DMAFLX5_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_IRQSTAT(/;"	d
bfin_write_DMAFLX5_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_PMAP(/;"	d
bfin_write_DMAFLX5_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_XCOUNT(/;"	d
bfin_write_DMAFLX5_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_XMODIFY(/;"	d
bfin_write_DMAFLX5_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_YCOUNT(/;"	d
bfin_write_DMAFLX5_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX5_YMODIFY(/;"	d
bfin_write_DMAFLX6_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_CURXCOUNT(/;"	d
bfin_write_DMAFLX6_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_CURYCOUNT(/;"	d
bfin_write_DMAFLX6_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_DMACNFG(/;"	d
bfin_write_DMAFLX6_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_IRQSTAT(/;"	d
bfin_write_DMAFLX6_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_PMAP(/;"	d
bfin_write_DMAFLX6_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_XCOUNT(/;"	d
bfin_write_DMAFLX6_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_XMODIFY(/;"	d
bfin_write_DMAFLX6_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_YCOUNT(/;"	d
bfin_write_DMAFLX6_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX6_YMODIFY(/;"	d
bfin_write_DMAFLX7_CURXCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_CURXCOUNT(/;"	d
bfin_write_DMAFLX7_CURYCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_CURYCOUNT(/;"	d
bfin_write_DMAFLX7_DMACNFG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_DMACNFG(/;"	d
bfin_write_DMAFLX7_IRQSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_IRQSTAT(/;"	d
bfin_write_DMAFLX7_PMAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_PMAP(/;"	d
bfin_write_DMAFLX7_XCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_XCOUNT(/;"	d
bfin_write_DMAFLX7_XMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_XMODIFY(/;"	d
bfin_write_DMAFLX7_YCOUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_YCOUNT(/;"	d
bfin_write_DMAFLX7_YMODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMAFLX7_YMODIFY(/;"	d
bfin_write_DMA_CONFIG	drivers/mmc/bfin_sdh.c	/^# define bfin_write_DMA_CONFIG	/;"	d	file:
bfin_write_DMA_START_ADDR	drivers/mmc/bfin_sdh.c	/^# define bfin_write_DMA_START_ADDR	/;"	d	file:
bfin_write_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA_TC_CNT(/;"	d
bfin_write_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA_TC_CNT(/;"	d
bfin_write_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA_TC_CNT(/;"	d
bfin_write_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA_TC_CNT(/;"	d
bfin_write_DMA_TC_CNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA_TC_CNT(/;"	d
bfin_write_DMA_TC_PER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_DMA_TC_PER(/;"	d
bfin_write_DMA_TC_PER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_DMA_TC_PER(/;"	d
bfin_write_DMA_TC_PER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_DMA_TC_PER(/;"	d
bfin_write_DMA_TC_PER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_DMA_TC_PER(/;"	d
bfin_write_DMA_TC_PER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_DMA_TC_PER(/;"	d
bfin_write_DMA_X_COUNT	drivers/mmc/bfin_sdh.c	/^# define bfin_write_DMA_X_COUNT	/;"	d	file:
bfin_write_DMA_X_MODIFY	drivers/mmc/bfin_sdh.c	/^# define bfin_write_DMA_X_MODIFY	/;"	d	file:
bfin_write_DMC0_CFG	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_CFG(/;"	d
bfin_write_DMC0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_CTL(/;"	d
bfin_write_DMC0_DLLCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_DLLCTL(/;"	d
bfin_write_DMC0_EMR1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_EMR1(/;"	d
bfin_write_DMC0_MR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_MR(/;"	d
bfin_write_DMC0_STAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_STAT(/;"	d
bfin_write_DMC0_TR0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_TR0(/;"	d
bfin_write_DMC0_TR1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_TR1(/;"	d
bfin_write_DMC0_TR2	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_DMC0_TR2(/;"	d
bfin_write_DMEM_CONTROL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DMEM_CONTROL(/;"	d
bfin_write_DSPID	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DSPID(/;"	d
bfin_write_DTEST_COMMAND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DTEST_COMMAND(/;"	d
bfin_write_DTEST_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DTEST_DATA0(/;"	d
bfin_write_DTEST_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_DTEST_DATA1(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_AMBCTL0(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMBCTL1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_AMBCTL1(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_AMGCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_AMGCTL(/;"	d
bfin_write_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_ARBSTAT(/;"	d
bfin_write_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_ARBSTAT(/;"	d
bfin_write_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_ARBSTAT(/;"	d
bfin_write_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_ARBSTAT(/;"	d
bfin_write_EBIU_ARBSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_ARBSTAT(/;"	d
bfin_write_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRACCT(/;"	d
bfin_write_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRACCT(/;"	d
bfin_write_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRACCT(/;"	d
bfin_write_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRACCT(/;"	d
bfin_write_EBIU_DDRACCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRACCT(/;"	d
bfin_write_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRARCT(/;"	d
bfin_write_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRARCT(/;"	d
bfin_write_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRARCT(/;"	d
bfin_write_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRARCT(/;"	d
bfin_write_EBIU_DDRARCT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRARCT(/;"	d
bfin_write_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC0(/;"	d
bfin_write_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC0(/;"	d
bfin_write_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC0(/;"	d
bfin_write_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC0(/;"	d
bfin_write_EBIU_DDRBRC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC0(/;"	d
bfin_write_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC1(/;"	d
bfin_write_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC1(/;"	d
bfin_write_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC1(/;"	d
bfin_write_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC1(/;"	d
bfin_write_EBIU_DDRBRC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC1(/;"	d
bfin_write_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC2(/;"	d
bfin_write_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC2(/;"	d
bfin_write_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC2(/;"	d
bfin_write_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC2(/;"	d
bfin_write_EBIU_DDRBRC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC2(/;"	d
bfin_write_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC3(/;"	d
bfin_write_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC3(/;"	d
bfin_write_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC3(/;"	d
bfin_write_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC3(/;"	d
bfin_write_EBIU_DDRBRC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC3(/;"	d
bfin_write_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC4(/;"	d
bfin_write_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC4(/;"	d
bfin_write_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC4(/;"	d
bfin_write_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC4(/;"	d
bfin_write_EBIU_DDRBRC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC4(/;"	d
bfin_write_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC5(/;"	d
bfin_write_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC5(/;"	d
bfin_write_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC5(/;"	d
bfin_write_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC5(/;"	d
bfin_write_EBIU_DDRBRC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC5(/;"	d
bfin_write_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC6(/;"	d
bfin_write_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC6(/;"	d
bfin_write_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC6(/;"	d
bfin_write_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC6(/;"	d
bfin_write_EBIU_DDRBRC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC6(/;"	d
bfin_write_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC7(/;"	d
bfin_write_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC7(/;"	d
bfin_write_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC7(/;"	d
bfin_write_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC7(/;"	d
bfin_write_EBIU_DDRBRC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBRC7(/;"	d
bfin_write_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC0(/;"	d
bfin_write_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC0(/;"	d
bfin_write_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC0(/;"	d
bfin_write_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC0(/;"	d
bfin_write_EBIU_DDRBWC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC0(/;"	d
bfin_write_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC1(/;"	d
bfin_write_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC1(/;"	d
bfin_write_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC1(/;"	d
bfin_write_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC1(/;"	d
bfin_write_EBIU_DDRBWC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC1(/;"	d
bfin_write_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC2(/;"	d
bfin_write_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC2(/;"	d
bfin_write_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC2(/;"	d
bfin_write_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC2(/;"	d
bfin_write_EBIU_DDRBWC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC2(/;"	d
bfin_write_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC3(/;"	d
bfin_write_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC3(/;"	d
bfin_write_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC3(/;"	d
bfin_write_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC3(/;"	d
bfin_write_EBIU_DDRBWC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC3(/;"	d
bfin_write_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC4(/;"	d
bfin_write_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC4(/;"	d
bfin_write_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC4(/;"	d
bfin_write_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC4(/;"	d
bfin_write_EBIU_DDRBWC4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC4(/;"	d
bfin_write_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC5(/;"	d
bfin_write_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC5(/;"	d
bfin_write_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC5(/;"	d
bfin_write_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC5(/;"	d
bfin_write_EBIU_DDRBWC5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC5(/;"	d
bfin_write_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC6(/;"	d
bfin_write_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC6(/;"	d
bfin_write_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC6(/;"	d
bfin_write_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC6(/;"	d
bfin_write_EBIU_DDRBWC6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC6(/;"	d
bfin_write_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC7(/;"	d
bfin_write_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC7(/;"	d
bfin_write_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC7(/;"	d
bfin_write_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC7(/;"	d
bfin_write_EBIU_DDRBWC7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRBWC7(/;"	d
bfin_write_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL0(/;"	d
bfin_write_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL0(/;"	d
bfin_write_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL0(/;"	d
bfin_write_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL0(/;"	d
bfin_write_EBIU_DDRCTL0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL0(/;"	d
bfin_write_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL1(/;"	d
bfin_write_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL1(/;"	d
bfin_write_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL1(/;"	d
bfin_write_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL1(/;"	d
bfin_write_EBIU_DDRCTL1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL1(/;"	d
bfin_write_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL2(/;"	d
bfin_write_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL2(/;"	d
bfin_write_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL2(/;"	d
bfin_write_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL2(/;"	d
bfin_write_EBIU_DDRCTL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL2(/;"	d
bfin_write_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL3(/;"	d
bfin_write_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL3(/;"	d
bfin_write_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL3(/;"	d
bfin_write_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL3(/;"	d
bfin_write_EBIU_DDRCTL3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRCTL3(/;"	d
bfin_write_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC0(/;"	d
bfin_write_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC0(/;"	d
bfin_write_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC0(/;"	d
bfin_write_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC0(/;"	d
bfin_write_EBIU_DDRGC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC0(/;"	d
bfin_write_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC1(/;"	d
bfin_write_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC1(/;"	d
bfin_write_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC1(/;"	d
bfin_write_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC1(/;"	d
bfin_write_EBIU_DDRGC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC1(/;"	d
bfin_write_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC2(/;"	d
bfin_write_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC2(/;"	d
bfin_write_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC2(/;"	d
bfin_write_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC2(/;"	d
bfin_write_EBIU_DDRGC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC2(/;"	d
bfin_write_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC3(/;"	d
bfin_write_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC3(/;"	d
bfin_write_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC3(/;"	d
bfin_write_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC3(/;"	d
bfin_write_EBIU_DDRGC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRGC3(/;"	d
bfin_write_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCCL(/;"	d
bfin_write_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCCL(/;"	d
bfin_write_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCCL(/;"	d
bfin_write_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCCL(/;"	d
bfin_write_EBIU_DDRMCCL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCCL(/;"	d
bfin_write_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCEN(/;"	d
bfin_write_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCEN(/;"	d
bfin_write_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCEN(/;"	d
bfin_write_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCEN(/;"	d
bfin_write_EBIU_DDRMCEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRMCEN(/;"	d
bfin_write_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRQUE(/;"	d
bfin_write_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRQUE(/;"	d
bfin_write_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRQUE(/;"	d
bfin_write_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRQUE(/;"	d
bfin_write_EBIU_DDRQUE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRQUE(/;"	d
bfin_write_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_DDRTACT(/;"	d
bfin_write_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_DDRTACT(/;"	d
bfin_write_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_DDRTACT(/;"	d
bfin_write_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_DDRTACT(/;"	d
bfin_write_EBIU_DDRTACT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_DDRTACT(/;"	d
bfin_write_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_ERRADD(/;"	d
bfin_write_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_ERRADD(/;"	d
bfin_write_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_ERRADD(/;"	d
bfin_write_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_ERRADD(/;"	d
bfin_write_EBIU_ERRADD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_ERRADD(/;"	d
bfin_write_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_ERRMST(/;"	d
bfin_write_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_ERRMST(/;"	d
bfin_write_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_ERRMST(/;"	d
bfin_write_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_ERRMST(/;"	d
bfin_write_EBIU_ERRMST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_ERRMST(/;"	d
bfin_write_EBIU_FCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_EBIU_FCTL(/;"	d
bfin_write_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_FCTL(/;"	d
bfin_write_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_FCTL(/;"	d
bfin_write_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_FCTL(/;"	d
bfin_write_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_FCTL(/;"	d
bfin_write_EBIU_FCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_FCTL(/;"	d
bfin_write_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_MBSCTL(/;"	d
bfin_write_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_MBSCTL(/;"	d
bfin_write_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_MBSCTL(/;"	d
bfin_write_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_MBSCTL(/;"	d
bfin_write_EBIU_MBSCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_MBSCTL(/;"	d
bfin_write_EBIU_MODE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_EBIU_MODE(/;"	d
bfin_write_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_MODE(/;"	d
bfin_write_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_MODE(/;"	d
bfin_write_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_MODE(/;"	d
bfin_write_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_MODE(/;"	d
bfin_write_EBIU_MODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_MODE(/;"	d
bfin_write_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EBIU_RSTCTL(/;"	d
bfin_write_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EBIU_RSTCTL(/;"	d
bfin_write_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EBIU_RSTCTL(/;"	d
bfin_write_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EBIU_RSTCTL(/;"	d
bfin_write_EBIU_RSTCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EBIU_RSTCTL(/;"	d
bfin_write_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_SDBCTL(/;"	d
bfin_write_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_SDBCTL(/;"	d
bfin_write_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_SDBCTL(/;"	d
bfin_write_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_SDBCTL(/;"	d
bfin_write_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_SDBCTL(/;"	d
bfin_write_EBIU_SDBCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_SDBCTL(/;"	d
bfin_write_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_SDGCTL(/;"	d
bfin_write_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_SDGCTL(/;"	d
bfin_write_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_SDGCTL(/;"	d
bfin_write_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_SDGCTL(/;"	d
bfin_write_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_SDGCTL(/;"	d
bfin_write_EBIU_SDGCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_SDGCTL(/;"	d
bfin_write_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_SDRRC(/;"	d
bfin_write_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_SDRRC(/;"	d
bfin_write_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_SDRRC(/;"	d
bfin_write_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_SDRRC(/;"	d
bfin_write_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_SDRRC(/;"	d
bfin_write_EBIU_SDRRC	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_SDRRC(/;"	d
bfin_write_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_EBIU_SDSTAT(/;"	d
bfin_write_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_EBIU_SDSTAT(/;"	d
bfin_write_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_EBIU_SDSTAT(/;"	d
bfin_write_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_EBIU_SDSTAT(/;"	d
bfin_write_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_EBIU_SDSTAT(/;"	d
bfin_write_EBIU_SDSTAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_EBIU_SDSTAT(/;"	d
bfin_write_EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_ADDRHI(/;"	d
bfin_write_EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_ADDRHI(/;"	d
bfin_write_EMAC_ADDRHI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_ADDRHI(/;"	d
bfin_write_EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_ADDRLO(/;"	d
bfin_write_EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_ADDRLO(/;"	d
bfin_write_EMAC_ADDRLO	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_ADDRLO(/;"	d
bfin_write_EMAC_FLC	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_FLC(/;"	d
bfin_write_EMAC_FLC	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_FLC(/;"	d
bfin_write_EMAC_FLC	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_FLC(/;"	d
bfin_write_EMAC_HASHHI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_HASHHI(/;"	d
bfin_write_EMAC_HASHHI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_HASHHI(/;"	d
bfin_write_EMAC_HASHHI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_HASHHI(/;"	d
bfin_write_EMAC_HASHLO	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_HASHLO(/;"	d
bfin_write_EMAC_HASHLO	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_HASHLO(/;"	d
bfin_write_EMAC_HASHLO	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_HASHLO(/;"	d
bfin_write_EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_MMC_CTL(/;"	d
bfin_write_EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_MMC_CTL(/;"	d
bfin_write_EMAC_MMC_CTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_MMC_CTL(/;"	d
bfin_write_EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_MMC_RIRQE(/;"	d
bfin_write_EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_MMC_RIRQE(/;"	d
bfin_write_EMAC_MMC_RIRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_MMC_RIRQE(/;"	d
bfin_write_EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_MMC_RIRQS(/;"	d
bfin_write_EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_MMC_RIRQS(/;"	d
bfin_write_EMAC_MMC_RIRQS	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_MMC_RIRQS(/;"	d
bfin_write_EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_MMC_TIRQE(/;"	d
bfin_write_EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_MMC_TIRQE(/;"	d
bfin_write_EMAC_MMC_TIRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_MMC_TIRQE(/;"	d
bfin_write_EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_MMC_TIRQS(/;"	d
bfin_write_EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_MMC_TIRQS(/;"	d
bfin_write_EMAC_MMC_TIRQS	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_MMC_TIRQS(/;"	d
bfin_write_EMAC_OPMODE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_OPMODE(/;"	d
bfin_write_EMAC_OPMODE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_OPMODE(/;"	d
bfin_write_EMAC_OPMODE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_OPMODE(/;"	d
bfin_write_EMAC_PTP_ACCR	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ACCR(/;"	d
bfin_write_EMAC_PTP_ADDEND	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ADDEND(/;"	d
bfin_write_EMAC_PTP_ALARMHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ALARMHI(/;"	d
bfin_write_EMAC_PTP_ALARMLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ALARMLO(/;"	d
bfin_write_EMAC_PTP_CTL	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_CTL(/;"	d
bfin_write_EMAC_PTP_FOFF	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_FOFF(/;"	d
bfin_write_EMAC_PTP_FV1	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_FV1(/;"	d
bfin_write_EMAC_PTP_FV2	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_FV2(/;"	d
bfin_write_EMAC_PTP_FV3	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_FV3(/;"	d
bfin_write_EMAC_PTP_ID_OFF	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ID_OFF(/;"	d
bfin_write_EMAC_PTP_ID_SNAP	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ID_SNAP(/;"	d
bfin_write_EMAC_PTP_IE	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_IE(/;"	d
bfin_write_EMAC_PTP_ISTAT	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_ISTAT(/;"	d
bfin_write_EMAC_PTP_OFFSET	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_OFFSET(/;"	d
bfin_write_EMAC_PTP_PPS_PERIOD	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_PPS_PERIOD(/;"	d
bfin_write_EMAC_PTP_PPS_STARTHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_PPS_STARTHI(/;"	d
bfin_write_EMAC_PTP_PPS_STARTLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_PPS_STARTLO(/;"	d
bfin_write_EMAC_PTP_RXSNAPHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_RXSNAPHI(/;"	d
bfin_write_EMAC_PTP_RXSNAPLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_RXSNAPLO(/;"	d
bfin_write_EMAC_PTP_TIMEHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_TIMEHI(/;"	d
bfin_write_EMAC_PTP_TIMELO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_TIMELO(/;"	d
bfin_write_EMAC_PTP_TXSNAPHI	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_TXSNAPHI(/;"	d
bfin_write_EMAC_PTP_TXSNAPLO	arch/blackfin/include/asm/mach-bf518/BF518_cdef.h	/^#define bfin_write_EMAC_PTP_TXSNAPLO(/;"	d
bfin_write_EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_ALIGN(/;"	d
bfin_write_EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_ALIGN(/;"	d
bfin_write_EMAC_RXC_ALIGN	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_ALIGN(/;"	d
bfin_write_EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_ALLFRM(/;"	d
bfin_write_EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_ALLFRM(/;"	d
bfin_write_EMAC_RXC_ALLFRM	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_ALLFRM(/;"	d
bfin_write_EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_ALLOCT(/;"	d
bfin_write_EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_ALLOCT(/;"	d
bfin_write_EMAC_RXC_ALLOCT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_ALLOCT(/;"	d
bfin_write_EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_BROAD(/;"	d
bfin_write_EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_BROAD(/;"	d
bfin_write_EMAC_RXC_BROAD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_BROAD(/;"	d
bfin_write_EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_DMAOVF(/;"	d
bfin_write_EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_DMAOVF(/;"	d
bfin_write_EMAC_RXC_DMAOVF	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_DMAOVF(/;"	d
bfin_write_EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_EQ64(/;"	d
bfin_write_EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_EQ64(/;"	d
bfin_write_EMAC_RXC_EQ64	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_EQ64(/;"	d
bfin_write_EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_FCS(/;"	d
bfin_write_EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_FCS(/;"	d
bfin_write_EMAC_RXC_FCS	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_FCS(/;"	d
bfin_write_EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_GE1024(/;"	d
bfin_write_EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_GE1024(/;"	d
bfin_write_EMAC_RXC_GE1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_GE1024(/;"	d
bfin_write_EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LNERRI(/;"	d
bfin_write_EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LNERRI(/;"	d
bfin_write_EMAC_RXC_LNERRI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LNERRI(/;"	d
bfin_write_EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LNERRO(/;"	d
bfin_write_EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LNERRO(/;"	d
bfin_write_EMAC_RXC_LNERRO	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LNERRO(/;"	d
bfin_write_EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LONG(/;"	d
bfin_write_EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LONG(/;"	d
bfin_write_EMAC_RXC_LONG	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LONG(/;"	d
bfin_write_EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LT1024(/;"	d
bfin_write_EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LT1024(/;"	d
bfin_write_EMAC_RXC_LT1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LT1024(/;"	d
bfin_write_EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LT128(/;"	d
bfin_write_EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LT128(/;"	d
bfin_write_EMAC_RXC_LT128	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LT128(/;"	d
bfin_write_EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LT256(/;"	d
bfin_write_EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LT256(/;"	d
bfin_write_EMAC_RXC_LT256	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LT256(/;"	d
bfin_write_EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_LT512(/;"	d
bfin_write_EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_LT512(/;"	d
bfin_write_EMAC_RXC_LT512	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_LT512(/;"	d
bfin_write_EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_MACCTL(/;"	d
bfin_write_EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_MACCTL(/;"	d
bfin_write_EMAC_RXC_MACCTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_MACCTL(/;"	d
bfin_write_EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_MULTI(/;"	d
bfin_write_EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_MULTI(/;"	d
bfin_write_EMAC_RXC_MULTI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_MULTI(/;"	d
bfin_write_EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_OCTET(/;"	d
bfin_write_EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_OCTET(/;"	d
bfin_write_EMAC_RXC_OCTET	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_OCTET(/;"	d
bfin_write_EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_OK(/;"	d
bfin_write_EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_OK(/;"	d
bfin_write_EMAC_RXC_OK	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_OK(/;"	d
bfin_write_EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_OPCODE(/;"	d
bfin_write_EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_OPCODE(/;"	d
bfin_write_EMAC_RXC_OPCODE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_OPCODE(/;"	d
bfin_write_EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_PAUSE(/;"	d
bfin_write_EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_PAUSE(/;"	d
bfin_write_EMAC_RXC_PAUSE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_PAUSE(/;"	d
bfin_write_EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_SHORT(/;"	d
bfin_write_EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_SHORT(/;"	d
bfin_write_EMAC_RXC_SHORT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_SHORT(/;"	d
bfin_write_EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_TYPED(/;"	d
bfin_write_EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_TYPED(/;"	d
bfin_write_EMAC_RXC_TYPED	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_TYPED(/;"	d
bfin_write_EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RXC_UNICST(/;"	d
bfin_write_EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RXC_UNICST(/;"	d
bfin_write_EMAC_RXC_UNICST	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RXC_UNICST(/;"	d
bfin_write_EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RX_IRQE(/;"	d
bfin_write_EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RX_IRQE(/;"	d
bfin_write_EMAC_RX_IRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RX_IRQE(/;"	d
bfin_write_EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RX_STAT(/;"	d
bfin_write_EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RX_STAT(/;"	d
bfin_write_EMAC_RX_STAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RX_STAT(/;"	d
bfin_write_EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_RX_STKY(/;"	d
bfin_write_EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_RX_STKY(/;"	d
bfin_write_EMAC_RX_STKY	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_RX_STKY(/;"	d
bfin_write_EMAC_STAADD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_STAADD(/;"	d
bfin_write_EMAC_STAADD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_STAADD(/;"	d
bfin_write_EMAC_STAADD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_STAADD(/;"	d
bfin_write_EMAC_STADAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_STADAT(/;"	d
bfin_write_EMAC_STADAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_STADAT(/;"	d
bfin_write_EMAC_STADAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_STADAT(/;"	d
bfin_write_EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_SYSCTL(/;"	d
bfin_write_EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_SYSCTL(/;"	d
bfin_write_EMAC_SYSCTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_SYSCTL(/;"	d
bfin_write_EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_SYSTAT(/;"	d
bfin_write_EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_SYSTAT(/;"	d
bfin_write_EMAC_SYSTAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_SYSTAT(/;"	d
bfin_write_EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_1COL(/;"	d
bfin_write_EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_1COL(/;"	d
bfin_write_EMAC_TXC_1COL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_1COL(/;"	d
bfin_write_EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_ABORT(/;"	d
bfin_write_EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_ABORT(/;"	d
bfin_write_EMAC_TXC_ABORT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_ABORT(/;"	d
bfin_write_EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_ALLFRM(/;"	d
bfin_write_EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_ALLFRM(/;"	d
bfin_write_EMAC_TXC_ALLFRM	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_ALLFRM(/;"	d
bfin_write_EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_ALLOCT(/;"	d
bfin_write_EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_ALLOCT(/;"	d
bfin_write_EMAC_TXC_ALLOCT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_ALLOCT(/;"	d
bfin_write_EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_BROAD(/;"	d
bfin_write_EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_BROAD(/;"	d
bfin_write_EMAC_TXC_BROAD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_BROAD(/;"	d
bfin_write_EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_CRSERR(/;"	d
bfin_write_EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_CRSERR(/;"	d
bfin_write_EMAC_TXC_CRSERR	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_CRSERR(/;"	d
bfin_write_EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_DEFER(/;"	d
bfin_write_EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_DEFER(/;"	d
bfin_write_EMAC_TXC_DEFER	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_DEFER(/;"	d
bfin_write_EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_DMAUND(/;"	d
bfin_write_EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_DMAUND(/;"	d
bfin_write_EMAC_TXC_DMAUND	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_DMAUND(/;"	d
bfin_write_EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_EQ64(/;"	d
bfin_write_EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_EQ64(/;"	d
bfin_write_EMAC_TXC_EQ64	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_EQ64(/;"	d
bfin_write_EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_GE1024(/;"	d
bfin_write_EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_GE1024(/;"	d
bfin_write_EMAC_TXC_GE1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_GE1024(/;"	d
bfin_write_EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_GT1COL(/;"	d
bfin_write_EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_GT1COL(/;"	d
bfin_write_EMAC_TXC_GT1COL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_GT1COL(/;"	d
bfin_write_EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_LATECL(/;"	d
bfin_write_EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_LATECL(/;"	d
bfin_write_EMAC_TXC_LATECL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_LATECL(/;"	d
bfin_write_EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_LT1024(/;"	d
bfin_write_EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_LT1024(/;"	d
bfin_write_EMAC_TXC_LT1024	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_LT1024(/;"	d
bfin_write_EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_LT128(/;"	d
bfin_write_EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_LT128(/;"	d
bfin_write_EMAC_TXC_LT128	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_LT128(/;"	d
bfin_write_EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_LT256(/;"	d
bfin_write_EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_LT256(/;"	d
bfin_write_EMAC_TXC_LT256	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_LT256(/;"	d
bfin_write_EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_LT512(/;"	d
bfin_write_EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_LT512(/;"	d
bfin_write_EMAC_TXC_LT512	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_LT512(/;"	d
bfin_write_EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_MACCTL(/;"	d
bfin_write_EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_MACCTL(/;"	d
bfin_write_EMAC_TXC_MACCTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_MACCTL(/;"	d
bfin_write_EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_MULTI(/;"	d
bfin_write_EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_MULTI(/;"	d
bfin_write_EMAC_TXC_MULTI	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_MULTI(/;"	d
bfin_write_EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_OCTET(/;"	d
bfin_write_EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_OCTET(/;"	d
bfin_write_EMAC_TXC_OCTET	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_OCTET(/;"	d
bfin_write_EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_OK(/;"	d
bfin_write_EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_OK(/;"	d
bfin_write_EMAC_TXC_OK	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_OK(/;"	d
bfin_write_EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_UNICST(/;"	d
bfin_write_EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_UNICST(/;"	d
bfin_write_EMAC_TXC_UNICST	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_UNICST(/;"	d
bfin_write_EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_XS_COL(/;"	d
bfin_write_EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_XS_COL(/;"	d
bfin_write_EMAC_TXC_XS_COL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_XS_COL(/;"	d
bfin_write_EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TXC_XS_DFR(/;"	d
bfin_write_EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TXC_XS_DFR(/;"	d
bfin_write_EMAC_TXC_XS_DFR	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TXC_XS_DFR(/;"	d
bfin_write_EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TX_IRQE(/;"	d
bfin_write_EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TX_IRQE(/;"	d
bfin_write_EMAC_TX_IRQE	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TX_IRQE(/;"	d
bfin_write_EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TX_STAT(/;"	d
bfin_write_EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TX_STAT(/;"	d
bfin_write_EMAC_TX_STAT	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TX_STAT(/;"	d
bfin_write_EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_TX_STKY(/;"	d
bfin_write_EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_TX_STKY(/;"	d
bfin_write_EMAC_TX_STKY	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_TX_STKY(/;"	d
bfin_write_EMAC_VLAN1	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_VLAN1(/;"	d
bfin_write_EMAC_VLAN1	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_VLAN1(/;"	d
bfin_write_EMAC_VLAN1	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_VLAN1(/;"	d
bfin_write_EMAC_VLAN2	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_VLAN2(/;"	d
bfin_write_EMAC_VLAN2	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_VLAN2(/;"	d
bfin_write_EMAC_VLAN2	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_VLAN2(/;"	d
bfin_write_EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_CTL(/;"	d
bfin_write_EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_CTL(/;"	d
bfin_write_EMAC_WKUP_CTL	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_CTL(/;"	d
bfin_write_EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCMD(/;"	d
bfin_write_EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCMD(/;"	d
bfin_write_EMAC_WKUP_FFCMD	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCMD(/;"	d
bfin_write_EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCRC0(/;"	d
bfin_write_EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCRC0(/;"	d
bfin_write_EMAC_WKUP_FFCRC0	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCRC0(/;"	d
bfin_write_EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCRC1(/;"	d
bfin_write_EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCRC1(/;"	d
bfin_write_EMAC_WKUP_FFCRC1	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFCRC1(/;"	d
bfin_write_EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK0(/;"	d
bfin_write_EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK0(/;"	d
bfin_write_EMAC_WKUP_FFMSK0	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK0(/;"	d
bfin_write_EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK1(/;"	d
bfin_write_EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK1(/;"	d
bfin_write_EMAC_WKUP_FFMSK1	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK1(/;"	d
bfin_write_EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK2(/;"	d
bfin_write_EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK2(/;"	d
bfin_write_EMAC_WKUP_FFMSK2	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK2(/;"	d
bfin_write_EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK3(/;"	d
bfin_write_EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK3(/;"	d
bfin_write_EMAC_WKUP_FFMSK3	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFMSK3(/;"	d
bfin_write_EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf518/BF516_cdef.h	/^#define bfin_write_EMAC_WKUP_FFOFF(/;"	d
bfin_write_EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf527/BF526_cdef.h	/^#define bfin_write_EMAC_WKUP_FFOFF(/;"	d
bfin_write_EMAC_WKUP_FFOFF	arch/blackfin/include/asm/mach-bf537/BF536_cdef.h	/^#define bfin_write_EMAC_WKUP_FFOFF(/;"	d
bfin_write_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_CLIP(/;"	d
bfin_write_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_CLIP(/;"	d
bfin_write_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_CLIP(/;"	d
bfin_write_EPPI0_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_CLIP(/;"	d
bfin_write_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_CLKDIV(/;"	d
bfin_write_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_CLKDIV(/;"	d
bfin_write_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_CLKDIV(/;"	d
bfin_write_EPPI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_CLKDIV(/;"	d
bfin_write_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_CONTROL(/;"	d
bfin_write_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_CONTROL(/;"	d
bfin_write_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_CONTROL(/;"	d
bfin_write_EPPI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_CONTROL(/;"	d
bfin_write_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_FRAME(/;"	d
bfin_write_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_FRAME(/;"	d
bfin_write_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_FRAME(/;"	d
bfin_write_EPPI0_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_FRAME(/;"	d
bfin_write_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_FS1P_AVPL(/;"	d
bfin_write_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_FS1P_AVPL(/;"	d
bfin_write_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_FS1P_AVPL(/;"	d
bfin_write_EPPI0_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_FS1P_AVPL(/;"	d
bfin_write_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_FS1W_HBL(/;"	d
bfin_write_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_FS1W_HBL(/;"	d
bfin_write_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_FS1W_HBL(/;"	d
bfin_write_EPPI0_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_FS1W_HBL(/;"	d
bfin_write_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_FS2P_LAVF(/;"	d
bfin_write_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_FS2P_LAVF(/;"	d
bfin_write_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_FS2P_LAVF(/;"	d
bfin_write_EPPI0_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_FS2P_LAVF(/;"	d
bfin_write_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_FS2W_LVB(/;"	d
bfin_write_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_FS2W_LVB(/;"	d
bfin_write_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_FS2W_LVB(/;"	d
bfin_write_EPPI0_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_FS2W_LVB(/;"	d
bfin_write_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_HCOUNT(/;"	d
bfin_write_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_HCOUNT(/;"	d
bfin_write_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_HCOUNT(/;"	d
bfin_write_EPPI0_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_HCOUNT(/;"	d
bfin_write_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_HDELAY(/;"	d
bfin_write_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_HDELAY(/;"	d
bfin_write_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_HDELAY(/;"	d
bfin_write_EPPI0_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_HDELAY(/;"	d
bfin_write_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_LINE(/;"	d
bfin_write_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_LINE(/;"	d
bfin_write_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_LINE(/;"	d
bfin_write_EPPI0_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_LINE(/;"	d
bfin_write_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_STATUS(/;"	d
bfin_write_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_STATUS(/;"	d
bfin_write_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_STATUS(/;"	d
bfin_write_EPPI0_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_STATUS(/;"	d
bfin_write_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_VCOUNT(/;"	d
bfin_write_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_VCOUNT(/;"	d
bfin_write_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_VCOUNT(/;"	d
bfin_write_EPPI0_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_VCOUNT(/;"	d
bfin_write_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI0_VDELAY(/;"	d
bfin_write_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI0_VDELAY(/;"	d
bfin_write_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI0_VDELAY(/;"	d
bfin_write_EPPI0_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI0_VDELAY(/;"	d
bfin_write_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_CLIP(/;"	d
bfin_write_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_CLIP(/;"	d
bfin_write_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_CLIP(/;"	d
bfin_write_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_CLIP(/;"	d
bfin_write_EPPI1_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_CLIP(/;"	d
bfin_write_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_CLKDIV(/;"	d
bfin_write_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_CLKDIV(/;"	d
bfin_write_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_CLKDIV(/;"	d
bfin_write_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_CLKDIV(/;"	d
bfin_write_EPPI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_CLKDIV(/;"	d
bfin_write_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_CONTROL(/;"	d
bfin_write_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_CONTROL(/;"	d
bfin_write_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_CONTROL(/;"	d
bfin_write_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_CONTROL(/;"	d
bfin_write_EPPI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_CONTROL(/;"	d
bfin_write_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_FRAME(/;"	d
bfin_write_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_FRAME(/;"	d
bfin_write_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_FRAME(/;"	d
bfin_write_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_FRAME(/;"	d
bfin_write_EPPI1_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_FRAME(/;"	d
bfin_write_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_FS1P_AVPL(/;"	d
bfin_write_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_FS1P_AVPL(/;"	d
bfin_write_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_FS1P_AVPL(/;"	d
bfin_write_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_FS1P_AVPL(/;"	d
bfin_write_EPPI1_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_FS1P_AVPL(/;"	d
bfin_write_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_FS1W_HBL(/;"	d
bfin_write_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_FS1W_HBL(/;"	d
bfin_write_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_FS1W_HBL(/;"	d
bfin_write_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_FS1W_HBL(/;"	d
bfin_write_EPPI1_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_FS1W_HBL(/;"	d
bfin_write_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_FS2P_LAVF(/;"	d
bfin_write_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_FS2P_LAVF(/;"	d
bfin_write_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_FS2P_LAVF(/;"	d
bfin_write_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_FS2P_LAVF(/;"	d
bfin_write_EPPI1_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_FS2P_LAVF(/;"	d
bfin_write_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_FS2W_LVB(/;"	d
bfin_write_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_FS2W_LVB(/;"	d
bfin_write_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_FS2W_LVB(/;"	d
bfin_write_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_FS2W_LVB(/;"	d
bfin_write_EPPI1_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_FS2W_LVB(/;"	d
bfin_write_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_HCOUNT(/;"	d
bfin_write_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_HCOUNT(/;"	d
bfin_write_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_HCOUNT(/;"	d
bfin_write_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_HCOUNT(/;"	d
bfin_write_EPPI1_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_HCOUNT(/;"	d
bfin_write_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_HDELAY(/;"	d
bfin_write_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_HDELAY(/;"	d
bfin_write_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_HDELAY(/;"	d
bfin_write_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_HDELAY(/;"	d
bfin_write_EPPI1_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_HDELAY(/;"	d
bfin_write_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_LINE(/;"	d
bfin_write_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_LINE(/;"	d
bfin_write_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_LINE(/;"	d
bfin_write_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_LINE(/;"	d
bfin_write_EPPI1_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_LINE(/;"	d
bfin_write_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_STATUS(/;"	d
bfin_write_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_STATUS(/;"	d
bfin_write_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_STATUS(/;"	d
bfin_write_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_STATUS(/;"	d
bfin_write_EPPI1_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_STATUS(/;"	d
bfin_write_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_VCOUNT(/;"	d
bfin_write_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_VCOUNT(/;"	d
bfin_write_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_VCOUNT(/;"	d
bfin_write_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_VCOUNT(/;"	d
bfin_write_EPPI1_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_VCOUNT(/;"	d
bfin_write_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI1_VDELAY(/;"	d
bfin_write_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI1_VDELAY(/;"	d
bfin_write_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI1_VDELAY(/;"	d
bfin_write_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI1_VDELAY(/;"	d
bfin_write_EPPI1_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI1_VDELAY(/;"	d
bfin_write_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_CLIP(/;"	d
bfin_write_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_CLIP(/;"	d
bfin_write_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_CLIP(/;"	d
bfin_write_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_CLIP(/;"	d
bfin_write_EPPI2_CLIP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_CLIP(/;"	d
bfin_write_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_CLKDIV(/;"	d
bfin_write_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_CLKDIV(/;"	d
bfin_write_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_CLKDIV(/;"	d
bfin_write_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_CLKDIV(/;"	d
bfin_write_EPPI2_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_CLKDIV(/;"	d
bfin_write_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_CONTROL(/;"	d
bfin_write_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_CONTROL(/;"	d
bfin_write_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_CONTROL(/;"	d
bfin_write_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_CONTROL(/;"	d
bfin_write_EPPI2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_CONTROL(/;"	d
bfin_write_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_FRAME(/;"	d
bfin_write_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_FRAME(/;"	d
bfin_write_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_FRAME(/;"	d
bfin_write_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_FRAME(/;"	d
bfin_write_EPPI2_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_FRAME(/;"	d
bfin_write_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_FS1P_AVPL(/;"	d
bfin_write_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_FS1P_AVPL(/;"	d
bfin_write_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_FS1P_AVPL(/;"	d
bfin_write_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_FS1P_AVPL(/;"	d
bfin_write_EPPI2_FS1P_AVPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_FS1P_AVPL(/;"	d
bfin_write_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_FS1W_HBL(/;"	d
bfin_write_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_FS1W_HBL(/;"	d
bfin_write_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_FS1W_HBL(/;"	d
bfin_write_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_FS1W_HBL(/;"	d
bfin_write_EPPI2_FS1W_HBL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_FS1W_HBL(/;"	d
bfin_write_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_FS2P_LAVF(/;"	d
bfin_write_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_FS2P_LAVF(/;"	d
bfin_write_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_FS2P_LAVF(/;"	d
bfin_write_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_FS2P_LAVF(/;"	d
bfin_write_EPPI2_FS2P_LAVF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_FS2P_LAVF(/;"	d
bfin_write_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_FS2W_LVB(/;"	d
bfin_write_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_FS2W_LVB(/;"	d
bfin_write_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_FS2W_LVB(/;"	d
bfin_write_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_FS2W_LVB(/;"	d
bfin_write_EPPI2_FS2W_LVB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_FS2W_LVB(/;"	d
bfin_write_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_HCOUNT(/;"	d
bfin_write_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_HCOUNT(/;"	d
bfin_write_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_HCOUNT(/;"	d
bfin_write_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_HCOUNT(/;"	d
bfin_write_EPPI2_HCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_HCOUNT(/;"	d
bfin_write_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_HDELAY(/;"	d
bfin_write_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_HDELAY(/;"	d
bfin_write_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_HDELAY(/;"	d
bfin_write_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_HDELAY(/;"	d
bfin_write_EPPI2_HDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_HDELAY(/;"	d
bfin_write_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_LINE(/;"	d
bfin_write_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_LINE(/;"	d
bfin_write_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_LINE(/;"	d
bfin_write_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_LINE(/;"	d
bfin_write_EPPI2_LINE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_LINE(/;"	d
bfin_write_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_STATUS(/;"	d
bfin_write_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_STATUS(/;"	d
bfin_write_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_STATUS(/;"	d
bfin_write_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_STATUS(/;"	d
bfin_write_EPPI2_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_STATUS(/;"	d
bfin_write_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_VCOUNT(/;"	d
bfin_write_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_VCOUNT(/;"	d
bfin_write_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_VCOUNT(/;"	d
bfin_write_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_VCOUNT(/;"	d
bfin_write_EPPI2_VCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_VCOUNT(/;"	d
bfin_write_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_EPPI2_VDELAY(/;"	d
bfin_write_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_EPPI2_VDELAY(/;"	d
bfin_write_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_EPPI2_VDELAY(/;"	d
bfin_write_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_EPPI2_VDELAY(/;"	d
bfin_write_EPPI2_VDELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_EPPI2_VDELAY(/;"	d
bfin_write_EVT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT0(/;"	d
bfin_write_EVT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT1(/;"	d
bfin_write_EVT10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT10(/;"	d
bfin_write_EVT11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT11(/;"	d
bfin_write_EVT12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT12(/;"	d
bfin_write_EVT13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT13(/;"	d
bfin_write_EVT14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT14(/;"	d
bfin_write_EVT15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT15(/;"	d
bfin_write_EVT2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT2(/;"	d
bfin_write_EVT3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT3(/;"	d
bfin_write_EVT4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT4(/;"	d
bfin_write_EVT5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT5(/;"	d
bfin_write_EVT6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT6(/;"	d
bfin_write_EVT7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT7(/;"	d
bfin_write_EVT8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT8(/;"	d
bfin_write_EVT9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT9(/;"	d
bfin_write_EVT_OVERRIDE	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_EVT_OVERRIDE(/;"	d
bfin_write_FIO0_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_BOTH(/;"	d
bfin_write_FIO0_DIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_DIR(/;"	d
bfin_write_FIO0_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_EDGE(/;"	d
bfin_write_FIO0_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_FLAG_C(/;"	d
bfin_write_FIO0_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_FLAG_D(/;"	d
bfin_write_FIO0_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_FLAG_S(/;"	d
bfin_write_FIO0_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_FLAG_T(/;"	d
bfin_write_FIO0_INEN	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_INEN(/;"	d
bfin_write_FIO0_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKA_C(/;"	d
bfin_write_FIO0_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKA_D(/;"	d
bfin_write_FIO0_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKA_S(/;"	d
bfin_write_FIO0_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKA_T(/;"	d
bfin_write_FIO0_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKB_C(/;"	d
bfin_write_FIO0_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKB_D(/;"	d
bfin_write_FIO0_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKB_S(/;"	d
bfin_write_FIO0_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_MASKB_T(/;"	d
bfin_write_FIO0_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO0_POLAR(/;"	d
bfin_write_FIO1_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_BOTH(/;"	d
bfin_write_FIO1_DIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_DIR(/;"	d
bfin_write_FIO1_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_EDGE(/;"	d
bfin_write_FIO1_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_FLAG_C(/;"	d
bfin_write_FIO1_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_FLAG_D(/;"	d
bfin_write_FIO1_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_FLAG_S(/;"	d
bfin_write_FIO1_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_FLAG_T(/;"	d
bfin_write_FIO1_INEN	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_INEN(/;"	d
bfin_write_FIO1_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKA_C(/;"	d
bfin_write_FIO1_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKA_D(/;"	d
bfin_write_FIO1_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKA_S(/;"	d
bfin_write_FIO1_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKA_T(/;"	d
bfin_write_FIO1_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKB_C(/;"	d
bfin_write_FIO1_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKB_D(/;"	d
bfin_write_FIO1_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKB_S(/;"	d
bfin_write_FIO1_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_MASKB_T(/;"	d
bfin_write_FIO1_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO1_POLAR(/;"	d
bfin_write_FIO2_BOTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_BOTH(/;"	d
bfin_write_FIO2_DIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_DIR(/;"	d
bfin_write_FIO2_EDGE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_EDGE(/;"	d
bfin_write_FIO2_FLAG_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_FLAG_C(/;"	d
bfin_write_FIO2_FLAG_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_FLAG_D(/;"	d
bfin_write_FIO2_FLAG_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_FLAG_S(/;"	d
bfin_write_FIO2_FLAG_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_FLAG_T(/;"	d
bfin_write_FIO2_INEN	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_INEN(/;"	d
bfin_write_FIO2_MASKA_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKA_C(/;"	d
bfin_write_FIO2_MASKA_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKA_D(/;"	d
bfin_write_FIO2_MASKA_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKA_S(/;"	d
bfin_write_FIO2_MASKA_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKA_T(/;"	d
bfin_write_FIO2_MASKB_C	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKB_C(/;"	d
bfin_write_FIO2_MASKB_D	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKB_D(/;"	d
bfin_write_FIO2_MASKB_S	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKB_S(/;"	d
bfin_write_FIO2_MASKB_T	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_MASKB_T(/;"	d
bfin_write_FIO2_POLAR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_FIO2_POLAR(/;"	d
bfin_write_FIO_BOTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_BOTH(/;"	d
bfin_write_FIO_DIR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_DIR(/;"	d
bfin_write_FIO_EDGE	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_EDGE(/;"	d
bfin_write_FIO_FLAG_C	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_FLAG_C(/;"	d
bfin_write_FIO_FLAG_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_FLAG_D(/;"	d
bfin_write_FIO_FLAG_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_FLAG_S(/;"	d
bfin_write_FIO_FLAG_T	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_FLAG_T(/;"	d
bfin_write_FIO_INEN	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_INEN(/;"	d
bfin_write_FIO_MASKA_C	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKA_C(/;"	d
bfin_write_FIO_MASKA_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKA_D(/;"	d
bfin_write_FIO_MASKA_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKA_S(/;"	d
bfin_write_FIO_MASKA_T	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKA_T(/;"	d
bfin_write_FIO_MASKB_C	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKB_C(/;"	d
bfin_write_FIO_MASKB_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKB_D(/;"	d
bfin_write_FIO_MASKB_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKB_S(/;"	d
bfin_write_FIO_MASKB_T	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_MASKB_T(/;"	d
bfin_write_FIO_POLAR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_FIO_POLAR(/;"	d
bfin_write_FLASH_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_FLASH_CONTROL(/;"	d
bfin_write_FLASH_CONTROL_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_FLASH_CONTROL_CLEAR(/;"	d
bfin_write_FLASH_CONTROL_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_FLASH_CONTROL_SET(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_BCINIT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_BCOUNT(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_CONTROL(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_ECINIT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOUNT(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_ECOVERFLOW(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA0_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA0_ECURGENT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_BCINIT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_BCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_BCOUNT(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_CONTROL(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECINIT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_ECINIT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOUNT(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECOVERFLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_ECOVERFLOW(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HMDMA1_ECURGENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HMDMA1_ECURGENT(/;"	d
bfin_write_HOST_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HOST_CONTROL(/;"	d
bfin_write_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HOST_CONTROL(/;"	d
bfin_write_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HOST_CONTROL(/;"	d
bfin_write_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HOST_CONTROL(/;"	d
bfin_write_HOST_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HOST_CONTROL(/;"	d
bfin_write_HOST_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HOST_STATUS(/;"	d
bfin_write_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HOST_STATUS(/;"	d
bfin_write_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HOST_STATUS(/;"	d
bfin_write_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HOST_STATUS(/;"	d
bfin_write_HOST_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HOST_STATUS(/;"	d
bfin_write_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_HOST_TIMEOUT(/;"	d
bfin_write_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_HOST_TIMEOUT(/;"	d
bfin_write_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_HOST_TIMEOUT(/;"	d
bfin_write_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_HOST_TIMEOUT(/;"	d
bfin_write_HOST_TIMEOUT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_HOST_TIMEOUT(/;"	d
bfin_write_ICPLB_ADDR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR0(/;"	d
bfin_write_ICPLB_ADDR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR1(/;"	d
bfin_write_ICPLB_ADDR10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR10(/;"	d
bfin_write_ICPLB_ADDR11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR11(/;"	d
bfin_write_ICPLB_ADDR12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR12(/;"	d
bfin_write_ICPLB_ADDR13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR13(/;"	d
bfin_write_ICPLB_ADDR14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR14(/;"	d
bfin_write_ICPLB_ADDR15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR15(/;"	d
bfin_write_ICPLB_ADDR2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR2(/;"	d
bfin_write_ICPLB_ADDR3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR3(/;"	d
bfin_write_ICPLB_ADDR4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR4(/;"	d
bfin_write_ICPLB_ADDR5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR5(/;"	d
bfin_write_ICPLB_ADDR6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR6(/;"	d
bfin_write_ICPLB_ADDR7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR7(/;"	d
bfin_write_ICPLB_ADDR8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR8(/;"	d
bfin_write_ICPLB_ADDR9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_ADDR9(/;"	d
bfin_write_ICPLB_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA0(/;"	d
bfin_write_ICPLB_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA1(/;"	d
bfin_write_ICPLB_DATA10	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA10(/;"	d
bfin_write_ICPLB_DATA11	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA11(/;"	d
bfin_write_ICPLB_DATA12	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA12(/;"	d
bfin_write_ICPLB_DATA13	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA13(/;"	d
bfin_write_ICPLB_DATA14	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA14(/;"	d
bfin_write_ICPLB_DATA15	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA15(/;"	d
bfin_write_ICPLB_DATA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA2(/;"	d
bfin_write_ICPLB_DATA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA3(/;"	d
bfin_write_ICPLB_DATA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA4(/;"	d
bfin_write_ICPLB_DATA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA5(/;"	d
bfin_write_ICPLB_DATA6	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA6(/;"	d
bfin_write_ICPLB_DATA7	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA7(/;"	d
bfin_write_ICPLB_DATA8	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA8(/;"	d
bfin_write_ICPLB_DATA9	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_DATA9(/;"	d
bfin_write_ICPLB_FAULT_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_FAULT_ADDR(/;"	d
bfin_write_ICPLB_STATUS	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ICPLB_STATUS(/;"	d
bfin_write_ILAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ILAT(/;"	d
bfin_write_IMASK	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_IMASK(/;"	d
bfin_write_IMDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_CONFIG(/;"	d
bfin_write_IMDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_CURR_ADDR(/;"	d
bfin_write_IMDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_IMDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_IMDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_IMDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_IRQ_STATUS(/;"	d
bfin_write_IMDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_IMDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_START_ADDR(/;"	d
bfin_write_IMDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_X_COUNT(/;"	d
bfin_write_IMDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_X_MODIFY(/;"	d
bfin_write_IMDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_Y_COUNT(/;"	d
bfin_write_IMDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D0_Y_MODIFY(/;"	d
bfin_write_IMDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_CONFIG(/;"	d
bfin_write_IMDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_CURR_ADDR(/;"	d
bfin_write_IMDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_IMDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_IMDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_IMDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_IRQ_STATUS(/;"	d
bfin_write_IMDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_IMDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_START_ADDR(/;"	d
bfin_write_IMDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_X_COUNT(/;"	d
bfin_write_IMDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_X_MODIFY(/;"	d
bfin_write_IMDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_Y_COUNT(/;"	d
bfin_write_IMDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_D1_Y_MODIFY(/;"	d
bfin_write_IMDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_CONFIG(/;"	d
bfin_write_IMDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_CURR_ADDR(/;"	d
bfin_write_IMDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_IMDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_IMDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_IMDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_IRQ_STATUS(/;"	d
bfin_write_IMDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_IMDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_START_ADDR(/;"	d
bfin_write_IMDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_X_COUNT(/;"	d
bfin_write_IMDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_X_MODIFY(/;"	d
bfin_write_IMDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_Y_COUNT(/;"	d
bfin_write_IMDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S0_Y_MODIFY(/;"	d
bfin_write_IMDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_CONFIG(/;"	d
bfin_write_IMDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_CURR_ADDR(/;"	d
bfin_write_IMDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_IMDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_IMDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_IMDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_IRQ_STATUS(/;"	d
bfin_write_IMDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_IMDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_START_ADDR(/;"	d
bfin_write_IMDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_X_COUNT(/;"	d
bfin_write_IMDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_X_MODIFY(/;"	d
bfin_write_IMDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_Y_COUNT(/;"	d
bfin_write_IMDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_IMDMA_S1_Y_MODIFY(/;"	d
bfin_write_IMEM_CONTROL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_IMEM_CONTROL(/;"	d
bfin_write_IPEND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_IPEND(/;"	d
bfin_write_IPRIO	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_IPRIO(/;"	d
bfin_write_ITEST_COMMAND	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ITEST_COMMAND(/;"	d
bfin_write_ITEST_DATA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ITEST_DATA0(/;"	d
bfin_write_ITEST_DATA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_ITEST_DATA1(/;"	d
bfin_write_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_KPAD_CTL(/;"	d
bfin_write_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_KPAD_CTL(/;"	d
bfin_write_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_KPAD_CTL(/;"	d
bfin_write_KPAD_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_KPAD_CTL(/;"	d
bfin_write_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_KPAD_MSEL(/;"	d
bfin_write_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_KPAD_MSEL(/;"	d
bfin_write_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_KPAD_MSEL(/;"	d
bfin_write_KPAD_MSEL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_KPAD_MSEL(/;"	d
bfin_write_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_KPAD_PRESCALE(/;"	d
bfin_write_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_KPAD_PRESCALE(/;"	d
bfin_write_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_KPAD_PRESCALE(/;"	d
bfin_write_KPAD_PRESCALE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_KPAD_PRESCALE(/;"	d
bfin_write_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_KPAD_ROWCOL(/;"	d
bfin_write_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_KPAD_ROWCOL(/;"	d
bfin_write_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_KPAD_ROWCOL(/;"	d
bfin_write_KPAD_ROWCOL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_KPAD_ROWCOL(/;"	d
bfin_write_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_KPAD_SOFTEVAL(/;"	d
bfin_write_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_KPAD_SOFTEVAL(/;"	d
bfin_write_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_KPAD_SOFTEVAL(/;"	d
bfin_write_KPAD_SOFTEVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_KPAD_SOFTEVAL(/;"	d
bfin_write_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_KPAD_STAT(/;"	d
bfin_write_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_KPAD_STAT(/;"	d
bfin_write_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_KPAD_STAT(/;"	d
bfin_write_KPAD_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_KPAD_STAT(/;"	d
bfin_write_MDMA0_D0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_CONFIG(/;"	d
bfin_write_MDMA0_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_CURR_ADDR(/;"	d
bfin_write_MDMA0_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA0_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA0_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA0_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA0_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA0_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA0_D0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_START_ADDR(/;"	d
bfin_write_MDMA0_D0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_X_COUNT(/;"	d
bfin_write_MDMA0_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_X_MODIFY(/;"	d
bfin_write_MDMA0_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_Y_COUNT(/;"	d
bfin_write_MDMA0_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D0_Y_MODIFY(/;"	d
bfin_write_MDMA0_D1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_CONFIG(/;"	d
bfin_write_MDMA0_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_CURR_ADDR(/;"	d
bfin_write_MDMA0_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA0_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA0_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA0_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA0_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA0_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA0_D1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_START_ADDR(/;"	d
bfin_write_MDMA0_D1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_X_COUNT(/;"	d
bfin_write_MDMA0_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_X_MODIFY(/;"	d
bfin_write_MDMA0_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_Y_COUNT(/;"	d
bfin_write_MDMA0_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_D1_Y_MODIFY(/;"	d
bfin_write_MDMA0_S0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_CONFIG(/;"	d
bfin_write_MDMA0_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_CURR_ADDR(/;"	d
bfin_write_MDMA0_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA0_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA0_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA0_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA0_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA0_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA0_S0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_START_ADDR(/;"	d
bfin_write_MDMA0_S0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_X_COUNT(/;"	d
bfin_write_MDMA0_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_X_MODIFY(/;"	d
bfin_write_MDMA0_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_Y_COUNT(/;"	d
bfin_write_MDMA0_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S0_Y_MODIFY(/;"	d
bfin_write_MDMA0_S1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_CONFIG(/;"	d
bfin_write_MDMA0_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_CURR_ADDR(/;"	d
bfin_write_MDMA0_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA0_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA0_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA0_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA0_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA0_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA0_S1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_START_ADDR(/;"	d
bfin_write_MDMA0_S1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_X_COUNT(/;"	d
bfin_write_MDMA0_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_X_MODIFY(/;"	d
bfin_write_MDMA0_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_Y_COUNT(/;"	d
bfin_write_MDMA0_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA0_S1_Y_MODIFY(/;"	d
bfin_write_MDMA1_D0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_CONFIG(/;"	d
bfin_write_MDMA1_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_CONFIG(/;"	d
bfin_write_MDMA1_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_ADDR(/;"	d
bfin_write_MDMA1_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_ADDR(/;"	d
bfin_write_MDMA1_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA1_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA1_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_D0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_START_ADDR(/;"	d
bfin_write_MDMA1_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_START_ADDR(/;"	d
bfin_write_MDMA1_D0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_X_COUNT(/;"	d
bfin_write_MDMA1_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_X_COUNT(/;"	d
bfin_write_MDMA1_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_X_MODIFY(/;"	d
bfin_write_MDMA1_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_X_MODIFY(/;"	d
bfin_write_MDMA1_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_Y_COUNT(/;"	d
bfin_write_MDMA1_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_Y_COUNT(/;"	d
bfin_write_MDMA1_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D0_Y_MODIFY(/;"	d
bfin_write_MDMA1_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D0_Y_MODIFY(/;"	d
bfin_write_MDMA1_D1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_CONFIG(/;"	d
bfin_write_MDMA1_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_CONFIG(/;"	d
bfin_write_MDMA1_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_ADDR(/;"	d
bfin_write_MDMA1_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_ADDR(/;"	d
bfin_write_MDMA1_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA1_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA1_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_D1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_START_ADDR(/;"	d
bfin_write_MDMA1_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_START_ADDR(/;"	d
bfin_write_MDMA1_D1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_X_COUNT(/;"	d
bfin_write_MDMA1_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_X_COUNT(/;"	d
bfin_write_MDMA1_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_X_MODIFY(/;"	d
bfin_write_MDMA1_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_X_MODIFY(/;"	d
bfin_write_MDMA1_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_Y_COUNT(/;"	d
bfin_write_MDMA1_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_Y_COUNT(/;"	d
bfin_write_MDMA1_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_D1_Y_MODIFY(/;"	d
bfin_write_MDMA1_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_D1_Y_MODIFY(/;"	d
bfin_write_MDMA1_S0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_CONFIG(/;"	d
bfin_write_MDMA1_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_CONFIG(/;"	d
bfin_write_MDMA1_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_ADDR(/;"	d
bfin_write_MDMA1_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_ADDR(/;"	d
bfin_write_MDMA1_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA1_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA1_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_S0_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_START_ADDR(/;"	d
bfin_write_MDMA1_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_START_ADDR(/;"	d
bfin_write_MDMA1_S0_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_X_COUNT(/;"	d
bfin_write_MDMA1_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_X_COUNT(/;"	d
bfin_write_MDMA1_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_X_MODIFY(/;"	d
bfin_write_MDMA1_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_X_MODIFY(/;"	d
bfin_write_MDMA1_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_Y_COUNT(/;"	d
bfin_write_MDMA1_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_Y_COUNT(/;"	d
bfin_write_MDMA1_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S0_Y_MODIFY(/;"	d
bfin_write_MDMA1_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S0_Y_MODIFY(/;"	d
bfin_write_MDMA1_S1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_CONFIG(/;"	d
bfin_write_MDMA1_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_CONFIG(/;"	d
bfin_write_MDMA1_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_ADDR(/;"	d
bfin_write_MDMA1_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_ADDR(/;"	d
bfin_write_MDMA1_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA1_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA1_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA1_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA1_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA1_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA1_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA1_S1_START_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_START_ADDR(/;"	d
bfin_write_MDMA1_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_START_ADDR(/;"	d
bfin_write_MDMA1_S1_X_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_X_COUNT(/;"	d
bfin_write_MDMA1_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_X_COUNT(/;"	d
bfin_write_MDMA1_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_X_MODIFY(/;"	d
bfin_write_MDMA1_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_X_MODIFY(/;"	d
bfin_write_MDMA1_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_Y_COUNT(/;"	d
bfin_write_MDMA1_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_Y_COUNT(/;"	d
bfin_write_MDMA1_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_MDMA1_S1_Y_MODIFY(/;"	d
bfin_write_MDMA1_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA1_S1_Y_MODIFY(/;"	d
bfin_write_MDMA2_D0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_CONFIG(/;"	d
bfin_write_MDMA2_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_CURR_ADDR(/;"	d
bfin_write_MDMA2_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA2_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA2_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA2_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA2_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA2_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA2_D0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_START_ADDR(/;"	d
bfin_write_MDMA2_D0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_X_COUNT(/;"	d
bfin_write_MDMA2_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_X_MODIFY(/;"	d
bfin_write_MDMA2_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_Y_COUNT(/;"	d
bfin_write_MDMA2_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D0_Y_MODIFY(/;"	d
bfin_write_MDMA2_D1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_CONFIG(/;"	d
bfin_write_MDMA2_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_CURR_ADDR(/;"	d
bfin_write_MDMA2_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA2_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA2_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA2_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA2_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA2_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA2_D1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_START_ADDR(/;"	d
bfin_write_MDMA2_D1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_X_COUNT(/;"	d
bfin_write_MDMA2_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_X_MODIFY(/;"	d
bfin_write_MDMA2_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_Y_COUNT(/;"	d
bfin_write_MDMA2_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_D1_Y_MODIFY(/;"	d
bfin_write_MDMA2_S0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_CONFIG(/;"	d
bfin_write_MDMA2_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_CURR_ADDR(/;"	d
bfin_write_MDMA2_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA2_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA2_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA2_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA2_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA2_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA2_S0_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_START_ADDR(/;"	d
bfin_write_MDMA2_S0_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_X_COUNT(/;"	d
bfin_write_MDMA2_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_X_MODIFY(/;"	d
bfin_write_MDMA2_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_Y_COUNT(/;"	d
bfin_write_MDMA2_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S0_Y_MODIFY(/;"	d
bfin_write_MDMA2_S1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_CONFIG(/;"	d
bfin_write_MDMA2_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_CURR_ADDR(/;"	d
bfin_write_MDMA2_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA2_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA2_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA2_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA2_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA2_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA2_S1_START_ADDR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_START_ADDR(/;"	d
bfin_write_MDMA2_S1_X_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_X_COUNT(/;"	d
bfin_write_MDMA2_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_X_MODIFY(/;"	d
bfin_write_MDMA2_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_Y_COUNT(/;"	d
bfin_write_MDMA2_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_MDMA2_S1_Y_MODIFY(/;"	d
bfin_write_MDMAFLX0_CURXCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_CURXCOUNT_D(/;"	d
bfin_write_MDMAFLX0_CURXCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_CURXCOUNT_S(/;"	d
bfin_write_MDMAFLX0_CURYCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_CURYCOUNT_D(/;"	d
bfin_write_MDMAFLX0_CURYCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_CURYCOUNT_S(/;"	d
bfin_write_MDMAFLX0_DMACNFG_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_DMACNFG_D(/;"	d
bfin_write_MDMAFLX0_DMACNFG_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_DMACNFG_S(/;"	d
bfin_write_MDMAFLX0_IRQSTAT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_IRQSTAT_D(/;"	d
bfin_write_MDMAFLX0_IRQSTAT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_IRQSTAT_S(/;"	d
bfin_write_MDMAFLX0_PMAP_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_PMAP_D(/;"	d
bfin_write_MDMAFLX0_PMAP_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_PMAP_S(/;"	d
bfin_write_MDMAFLX0_XCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_XCOUNT_D(/;"	d
bfin_write_MDMAFLX0_XCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_XCOUNT_S(/;"	d
bfin_write_MDMAFLX0_XMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_XMODIFY_D(/;"	d
bfin_write_MDMAFLX0_XMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_XMODIFY_S(/;"	d
bfin_write_MDMAFLX0_YCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_YCOUNT_D(/;"	d
bfin_write_MDMAFLX0_YCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_YCOUNT_S(/;"	d
bfin_write_MDMAFLX0_YMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_YMODIFY_D(/;"	d
bfin_write_MDMAFLX0_YMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX0_YMODIFY_S(/;"	d
bfin_write_MDMAFLX1_CURXCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_CURXCOUNT_D(/;"	d
bfin_write_MDMAFLX1_CURXCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_CURXCOUNT_S(/;"	d
bfin_write_MDMAFLX1_CURYCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_CURYCOUNT_D(/;"	d
bfin_write_MDMAFLX1_CURYCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_CURYCOUNT_S(/;"	d
bfin_write_MDMAFLX1_DMACNFG_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_DMACNFG_D(/;"	d
bfin_write_MDMAFLX1_DMACNFG_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_DMACNFG_S(/;"	d
bfin_write_MDMAFLX1_IRQSTAT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_IRQSTAT_D(/;"	d
bfin_write_MDMAFLX1_IRQSTAT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_IRQSTAT_S(/;"	d
bfin_write_MDMAFLX1_PMAP_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_PMAP_D(/;"	d
bfin_write_MDMAFLX1_PMAP_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_PMAP_S(/;"	d
bfin_write_MDMAFLX1_XCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_XCOUNT_D(/;"	d
bfin_write_MDMAFLX1_XCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_XCOUNT_S(/;"	d
bfin_write_MDMAFLX1_XMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_XMODIFY_D(/;"	d
bfin_write_MDMAFLX1_XMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_XMODIFY_S(/;"	d
bfin_write_MDMAFLX1_YCOUNT_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_YCOUNT_D(/;"	d
bfin_write_MDMAFLX1_YCOUNT_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_YCOUNT_S(/;"	d
bfin_write_MDMAFLX1_YMODIFY_D	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_YMODIFY_D(/;"	d
bfin_write_MDMAFLX1_YMODIFY_S	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMAFLX1_YMODIFY_S(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_CONFIG(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_ADDR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_IRQ_STATUS(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_START_ADDR(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_COUNT(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_X_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_COUNT(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D0_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_CONFIG(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_ADDR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_IRQ_STATUS(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_START_ADDR(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_COUNT(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_X_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_COUNT(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D1_Y_MODIFY(/;"	d
bfin_write_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_CONFIG(/;"	d
bfin_write_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_CONFIG(/;"	d
bfin_write_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_CONFIG(/;"	d
bfin_write_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_CONFIG(/;"	d
bfin_write_MDMA_D2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_CONFIG(/;"	d
bfin_write_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_ADDR(/;"	d
bfin_write_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_ADDR(/;"	d
bfin_write_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_ADDR(/;"	d
bfin_write_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_ADDR(/;"	d
bfin_write_MDMA_D2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_ADDR(/;"	d
bfin_write_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_IRQ_STATUS(/;"	d
bfin_write_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_IRQ_STATUS(/;"	d
bfin_write_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_IRQ_STATUS(/;"	d
bfin_write_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_IRQ_STATUS(/;"	d
bfin_write_MDMA_D2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_IRQ_STATUS(/;"	d
bfin_write_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_START_ADDR(/;"	d
bfin_write_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_START_ADDR(/;"	d
bfin_write_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_START_ADDR(/;"	d
bfin_write_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_START_ADDR(/;"	d
bfin_write_MDMA_D2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_START_ADDR(/;"	d
bfin_write_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_COUNT(/;"	d
bfin_write_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_COUNT(/;"	d
bfin_write_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_COUNT(/;"	d
bfin_write_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_COUNT(/;"	d
bfin_write_MDMA_D2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_COUNT(/;"	d
bfin_write_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_MODIFY(/;"	d
bfin_write_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_MODIFY(/;"	d
bfin_write_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_MODIFY(/;"	d
bfin_write_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_MODIFY(/;"	d
bfin_write_MDMA_D2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_X_MODIFY(/;"	d
bfin_write_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_COUNT(/;"	d
bfin_write_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_COUNT(/;"	d
bfin_write_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_COUNT(/;"	d
bfin_write_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_COUNT(/;"	d
bfin_write_MDMA_D2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_COUNT(/;"	d
bfin_write_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_MODIFY(/;"	d
bfin_write_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_MODIFY(/;"	d
bfin_write_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_MODIFY(/;"	d
bfin_write_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_MODIFY(/;"	d
bfin_write_MDMA_D2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D2_Y_MODIFY(/;"	d
bfin_write_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_CONFIG(/;"	d
bfin_write_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_CONFIG(/;"	d
bfin_write_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_CONFIG(/;"	d
bfin_write_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_CONFIG(/;"	d
bfin_write_MDMA_D3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_CONFIG(/;"	d
bfin_write_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_ADDR(/;"	d
bfin_write_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_ADDR(/;"	d
bfin_write_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_ADDR(/;"	d
bfin_write_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_ADDR(/;"	d
bfin_write_MDMA_D3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_ADDR(/;"	d
bfin_write_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_IRQ_STATUS(/;"	d
bfin_write_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_IRQ_STATUS(/;"	d
bfin_write_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_IRQ_STATUS(/;"	d
bfin_write_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_IRQ_STATUS(/;"	d
bfin_write_MDMA_D3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_IRQ_STATUS(/;"	d
bfin_write_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_START_ADDR(/;"	d
bfin_write_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_START_ADDR(/;"	d
bfin_write_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_START_ADDR(/;"	d
bfin_write_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_START_ADDR(/;"	d
bfin_write_MDMA_D3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_START_ADDR(/;"	d
bfin_write_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_COUNT(/;"	d
bfin_write_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_COUNT(/;"	d
bfin_write_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_COUNT(/;"	d
bfin_write_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_COUNT(/;"	d
bfin_write_MDMA_D3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_COUNT(/;"	d
bfin_write_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_MODIFY(/;"	d
bfin_write_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_MODIFY(/;"	d
bfin_write_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_MODIFY(/;"	d
bfin_write_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_MODIFY(/;"	d
bfin_write_MDMA_D3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_X_MODIFY(/;"	d
bfin_write_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_COUNT(/;"	d
bfin_write_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_COUNT(/;"	d
bfin_write_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_COUNT(/;"	d
bfin_write_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_COUNT(/;"	d
bfin_write_MDMA_D3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_COUNT(/;"	d
bfin_write_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_MODIFY(/;"	d
bfin_write_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_MODIFY(/;"	d
bfin_write_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_MODIFY(/;"	d
bfin_write_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_MODIFY(/;"	d
bfin_write_MDMA_D3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_D3_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_CONFIG(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_ADDR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_IRQ_STATUS(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_START_ADDR(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_COUNT(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_X_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_COUNT(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S0_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S0_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_CONFIG(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_ADDR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_IRQ_STATUS(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_START_ADDR(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_COUNT(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_X_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_COUNT(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S1_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S1_Y_MODIFY(/;"	d
bfin_write_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_CONFIG(/;"	d
bfin_write_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_CONFIG(/;"	d
bfin_write_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_CONFIG(/;"	d
bfin_write_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_CONFIG(/;"	d
bfin_write_MDMA_S2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_CONFIG(/;"	d
bfin_write_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_ADDR(/;"	d
bfin_write_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_ADDR(/;"	d
bfin_write_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_ADDR(/;"	d
bfin_write_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_ADDR(/;"	d
bfin_write_MDMA_S2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_ADDR(/;"	d
bfin_write_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S2_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S2_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_IRQ_STATUS(/;"	d
bfin_write_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_IRQ_STATUS(/;"	d
bfin_write_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_IRQ_STATUS(/;"	d
bfin_write_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_IRQ_STATUS(/;"	d
bfin_write_MDMA_S2_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_IRQ_STATUS(/;"	d
bfin_write_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S2_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S2_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_START_ADDR(/;"	d
bfin_write_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_START_ADDR(/;"	d
bfin_write_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_START_ADDR(/;"	d
bfin_write_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_START_ADDR(/;"	d
bfin_write_MDMA_S2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_START_ADDR(/;"	d
bfin_write_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_COUNT(/;"	d
bfin_write_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_COUNT(/;"	d
bfin_write_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_COUNT(/;"	d
bfin_write_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_COUNT(/;"	d
bfin_write_MDMA_S2_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_COUNT(/;"	d
bfin_write_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_MODIFY(/;"	d
bfin_write_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_MODIFY(/;"	d
bfin_write_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_MODIFY(/;"	d
bfin_write_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_MODIFY(/;"	d
bfin_write_MDMA_S2_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_X_MODIFY(/;"	d
bfin_write_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_COUNT(/;"	d
bfin_write_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_COUNT(/;"	d
bfin_write_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_COUNT(/;"	d
bfin_write_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_COUNT(/;"	d
bfin_write_MDMA_S2_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_COUNT(/;"	d
bfin_write_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_MODIFY(/;"	d
bfin_write_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_MODIFY(/;"	d
bfin_write_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_MODIFY(/;"	d
bfin_write_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_MODIFY(/;"	d
bfin_write_MDMA_S2_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S2_Y_MODIFY(/;"	d
bfin_write_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_CONFIG(/;"	d
bfin_write_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_CONFIG(/;"	d
bfin_write_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_CONFIG(/;"	d
bfin_write_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_CONFIG(/;"	d
bfin_write_MDMA_S3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_CONFIG(/;"	d
bfin_write_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_ADDR(/;"	d
bfin_write_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_ADDR(/;"	d
bfin_write_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_ADDR(/;"	d
bfin_write_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_ADDR(/;"	d
bfin_write_MDMA_S3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_ADDR(/;"	d
bfin_write_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S3_CURR_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_DESC_PTR(/;"	d
bfin_write_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_X_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S3_CURR_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_CURR_Y_COUNT(/;"	d
bfin_write_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_IRQ_STATUS(/;"	d
bfin_write_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_IRQ_STATUS(/;"	d
bfin_write_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_IRQ_STATUS(/;"	d
bfin_write_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_IRQ_STATUS(/;"	d
bfin_write_MDMA_S3_IRQ_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_IRQ_STATUS(/;"	d
bfin_write_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S3_NEXT_DESC_PTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_NEXT_DESC_PTR(/;"	d
bfin_write_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S3_PERIPHERAL_MAP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_PERIPHERAL_MAP(/;"	d
bfin_write_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_START_ADDR(/;"	d
bfin_write_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_START_ADDR(/;"	d
bfin_write_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_START_ADDR(/;"	d
bfin_write_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_START_ADDR(/;"	d
bfin_write_MDMA_S3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_START_ADDR(/;"	d
bfin_write_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_COUNT(/;"	d
bfin_write_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_COUNT(/;"	d
bfin_write_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_COUNT(/;"	d
bfin_write_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_COUNT(/;"	d
bfin_write_MDMA_S3_X_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_COUNT(/;"	d
bfin_write_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_MODIFY(/;"	d
bfin_write_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_MODIFY(/;"	d
bfin_write_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_MODIFY(/;"	d
bfin_write_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_MODIFY(/;"	d
bfin_write_MDMA_S3_X_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_X_MODIFY(/;"	d
bfin_write_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_COUNT(/;"	d
bfin_write_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_COUNT(/;"	d
bfin_write_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_COUNT(/;"	d
bfin_write_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_COUNT(/;"	d
bfin_write_MDMA_S3_Y_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_COUNT(/;"	d
bfin_write_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_MODIFY(/;"	d
bfin_write_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_MODIFY(/;"	d
bfin_write_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_MODIFY(/;"	d
bfin_write_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_MODIFY(/;"	d
bfin_write_MDMA_S3_Y_MODIFY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MDMA_S3_Y_MODIFY(/;"	d
bfin_write_MXVR_AADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_AADDR(/;"	d
bfin_write_MXVR_ALLOC_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_0(/;"	d
bfin_write_MXVR_ALLOC_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_1(/;"	d
bfin_write_MXVR_ALLOC_10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_10(/;"	d
bfin_write_MXVR_ALLOC_11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_11(/;"	d
bfin_write_MXVR_ALLOC_12	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_12(/;"	d
bfin_write_MXVR_ALLOC_13	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_13(/;"	d
bfin_write_MXVR_ALLOC_14	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_14(/;"	d
bfin_write_MXVR_ALLOC_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_2(/;"	d
bfin_write_MXVR_ALLOC_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_3(/;"	d
bfin_write_MXVR_ALLOC_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_4(/;"	d
bfin_write_MXVR_ALLOC_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_5(/;"	d
bfin_write_MXVR_ALLOC_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_6(/;"	d
bfin_write_MXVR_ALLOC_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_7(/;"	d
bfin_write_MXVR_ALLOC_8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_8(/;"	d
bfin_write_MXVR_ALLOC_9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ALLOC_9(/;"	d
bfin_write_MXVR_APRB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_APRB_CURR_ADDR(/;"	d
bfin_write_MXVR_APRB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_APRB_START_ADDR(/;"	d
bfin_write_MXVR_APTB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_APTB_CURR_ADDR(/;"	d
bfin_write_MXVR_APTB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_APTB_START_ADDR(/;"	d
bfin_write_MXVR_AP_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_AP_CTL(/;"	d
bfin_write_MXVR_BLOCK_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_BLOCK_CNT(/;"	d
bfin_write_MXVR_CDRPLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CDRPLL_CTL(/;"	d
bfin_write_MXVR_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CLK_CTL(/;"	d
bfin_write_MXVR_CMRB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CMRB_CURR_ADDR(/;"	d
bfin_write_MXVR_CMRB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CMRB_START_ADDR(/;"	d
bfin_write_MXVR_CMTB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CMTB_CURR_ADDR(/;"	d
bfin_write_MXVR_CMTB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CMTB_START_ADDR(/;"	d
bfin_write_MXVR_CM_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CM_CTL(/;"	d
bfin_write_MXVR_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_CONFIG(/;"	d
bfin_write_MXVR_DELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DELAY(/;"	d
bfin_write_MXVR_DMA0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA0_CONFIG(/;"	d
bfin_write_MXVR_DMA0_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA0_COUNT(/;"	d
bfin_write_MXVR_DMA0_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA0_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA0_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA0_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA0_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA0_START_ADDR(/;"	d
bfin_write_MXVR_DMA1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA1_CONFIG(/;"	d
bfin_write_MXVR_DMA1_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA1_COUNT(/;"	d
bfin_write_MXVR_DMA1_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA1_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA1_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA1_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA1_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA1_START_ADDR(/;"	d
bfin_write_MXVR_DMA2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA2_CONFIG(/;"	d
bfin_write_MXVR_DMA2_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA2_COUNT(/;"	d
bfin_write_MXVR_DMA2_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA2_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA2_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA2_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA2_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA2_START_ADDR(/;"	d
bfin_write_MXVR_DMA3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA3_CONFIG(/;"	d
bfin_write_MXVR_DMA3_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA3_COUNT(/;"	d
bfin_write_MXVR_DMA3_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA3_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA3_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA3_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA3_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA3_START_ADDR(/;"	d
bfin_write_MXVR_DMA4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA4_CONFIG(/;"	d
bfin_write_MXVR_DMA4_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA4_COUNT(/;"	d
bfin_write_MXVR_DMA4_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA4_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA4_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA4_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA4_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA4_START_ADDR(/;"	d
bfin_write_MXVR_DMA5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA5_CONFIG(/;"	d
bfin_write_MXVR_DMA5_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA5_COUNT(/;"	d
bfin_write_MXVR_DMA5_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA5_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA5_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA5_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA5_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA5_START_ADDR(/;"	d
bfin_write_MXVR_DMA6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA6_CONFIG(/;"	d
bfin_write_MXVR_DMA6_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA6_COUNT(/;"	d
bfin_write_MXVR_DMA6_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA6_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA6_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA6_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA6_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA6_START_ADDR(/;"	d
bfin_write_MXVR_DMA7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA7_CONFIG(/;"	d
bfin_write_MXVR_DMA7_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA7_COUNT(/;"	d
bfin_write_MXVR_DMA7_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA7_CURR_ADDR(/;"	d
bfin_write_MXVR_DMA7_CURR_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA7_CURR_COUNT(/;"	d
bfin_write_MXVR_DMA7_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_DMA7_START_ADDR(/;"	d
bfin_write_MXVR_FMPLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_FMPLL_CTL(/;"	d
bfin_write_MXVR_FRAME_CNT_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_FRAME_CNT_0(/;"	d
bfin_write_MXVR_FRAME_CNT_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_FRAME_CNT_1(/;"	d
bfin_write_MXVR_GADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_GADDR(/;"	d
bfin_write_MXVR_INT_EN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_INT_EN_0(/;"	d
bfin_write_MXVR_INT_EN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_INT_EN_1(/;"	d
bfin_write_MXVR_INT_STAT_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_INT_STAT_0(/;"	d
bfin_write_MXVR_INT_STAT_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_INT_STAT_1(/;"	d
bfin_write_MXVR_LADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_LADDR(/;"	d
bfin_write_MXVR_MAX_DELAY	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_MAX_DELAY(/;"	d
bfin_write_MXVR_MAX_POSITION	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_MAX_POSITION(/;"	d
bfin_write_MXVR_PAT_DATA_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_PAT_DATA_0(/;"	d
bfin_write_MXVR_PAT_DATA_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_PAT_DATA_1(/;"	d
bfin_write_MXVR_PAT_EN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_PAT_EN_0(/;"	d
bfin_write_MXVR_PAT_EN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_PAT_EN_1(/;"	d
bfin_write_MXVR_PIN_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_PIN_CTL(/;"	d
bfin_write_MXVR_POSITION	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_POSITION(/;"	d
bfin_write_MXVR_ROUTING_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_0(/;"	d
bfin_write_MXVR_ROUTING_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_1(/;"	d
bfin_write_MXVR_ROUTING_10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_10(/;"	d
bfin_write_MXVR_ROUTING_11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_11(/;"	d
bfin_write_MXVR_ROUTING_12	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_12(/;"	d
bfin_write_MXVR_ROUTING_13	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_13(/;"	d
bfin_write_MXVR_ROUTING_14	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_14(/;"	d
bfin_write_MXVR_ROUTING_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_2(/;"	d
bfin_write_MXVR_ROUTING_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_3(/;"	d
bfin_write_MXVR_ROUTING_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_4(/;"	d
bfin_write_MXVR_ROUTING_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_5(/;"	d
bfin_write_MXVR_ROUTING_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_6(/;"	d
bfin_write_MXVR_ROUTING_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_7(/;"	d
bfin_write_MXVR_ROUTING_8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_8(/;"	d
bfin_write_MXVR_ROUTING_9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_ROUTING_9(/;"	d
bfin_write_MXVR_RRDB_CURR_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_RRDB_CURR_ADDR(/;"	d
bfin_write_MXVR_RRDB_START_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_RRDB_START_ADDR(/;"	d
bfin_write_MXVR_SCLK_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SCLK_CNT(/;"	d
bfin_write_MXVR_STATE_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_STATE_0(/;"	d
bfin_write_MXVR_STATE_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_STATE_1(/;"	d
bfin_write_MXVR_SYNC_LCHAN_0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_0(/;"	d
bfin_write_MXVR_SYNC_LCHAN_1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_1(/;"	d
bfin_write_MXVR_SYNC_LCHAN_2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_2(/;"	d
bfin_write_MXVR_SYNC_LCHAN_3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_3(/;"	d
bfin_write_MXVR_SYNC_LCHAN_4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_4(/;"	d
bfin_write_MXVR_SYNC_LCHAN_5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_5(/;"	d
bfin_write_MXVR_SYNC_LCHAN_6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_6(/;"	d
bfin_write_MXVR_SYNC_LCHAN_7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_MXVR_SYNC_LCHAN_7(/;"	d
bfin_write_NFC_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_ADDR(/;"	d
bfin_write_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_ADDR(/;"	d
bfin_write_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_ADDR(/;"	d
bfin_write_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_ADDR(/;"	d
bfin_write_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_ADDR(/;"	d
bfin_write_NFC_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_ADDR(/;"	d
bfin_write_NFC_CMD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_CMD(/;"	d
bfin_write_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_CMD(/;"	d
bfin_write_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_CMD(/;"	d
bfin_write_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_CMD(/;"	d
bfin_write_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_CMD(/;"	d
bfin_write_NFC_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_CMD(/;"	d
bfin_write_NFC_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_COUNT(/;"	d
bfin_write_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_COUNT(/;"	d
bfin_write_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_COUNT(/;"	d
bfin_write_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_COUNT(/;"	d
bfin_write_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_COUNT(/;"	d
bfin_write_NFC_COUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_COUNT(/;"	d
bfin_write_NFC_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_CTL(/;"	d
bfin_write_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_CTL(/;"	d
bfin_write_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_CTL(/;"	d
bfin_write_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_CTL(/;"	d
bfin_write_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_CTL(/;"	d
bfin_write_NFC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_CTL(/;"	d
bfin_write_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_DATA_RD(/;"	d
bfin_write_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_DATA_RD(/;"	d
bfin_write_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_DATA_RD(/;"	d
bfin_write_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_DATA_RD(/;"	d
bfin_write_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_DATA_RD(/;"	d
bfin_write_NFC_DATA_RD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_DATA_RD(/;"	d
bfin_write_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_DATA_WR(/;"	d
bfin_write_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_DATA_WR(/;"	d
bfin_write_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_DATA_WR(/;"	d
bfin_write_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_DATA_WR(/;"	d
bfin_write_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_DATA_WR(/;"	d
bfin_write_NFC_DATA_WR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_DATA_WR(/;"	d
bfin_write_NFC_ECC0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_ECC0(/;"	d
bfin_write_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_ECC0(/;"	d
bfin_write_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_ECC0(/;"	d
bfin_write_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_ECC0(/;"	d
bfin_write_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_ECC0(/;"	d
bfin_write_NFC_ECC0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_ECC0(/;"	d
bfin_write_NFC_ECC1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_ECC1(/;"	d
bfin_write_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_ECC1(/;"	d
bfin_write_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_ECC1(/;"	d
bfin_write_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_ECC1(/;"	d
bfin_write_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_ECC1(/;"	d
bfin_write_NFC_ECC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_ECC1(/;"	d
bfin_write_NFC_ECC2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_ECC2(/;"	d
bfin_write_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_ECC2(/;"	d
bfin_write_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_ECC2(/;"	d
bfin_write_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_ECC2(/;"	d
bfin_write_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_ECC2(/;"	d
bfin_write_NFC_ECC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_ECC2(/;"	d
bfin_write_NFC_ECC3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_ECC3(/;"	d
bfin_write_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_ECC3(/;"	d
bfin_write_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_ECC3(/;"	d
bfin_write_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_ECC3(/;"	d
bfin_write_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_ECC3(/;"	d
bfin_write_NFC_ECC3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_ECC3(/;"	d
bfin_write_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_IRQMASK(/;"	d
bfin_write_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_IRQMASK(/;"	d
bfin_write_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_IRQMASK(/;"	d
bfin_write_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_IRQMASK(/;"	d
bfin_write_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_IRQMASK(/;"	d
bfin_write_NFC_IRQMASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_IRQMASK(/;"	d
bfin_write_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_IRQSTAT(/;"	d
bfin_write_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_IRQSTAT(/;"	d
bfin_write_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_IRQSTAT(/;"	d
bfin_write_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_IRQSTAT(/;"	d
bfin_write_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_IRQSTAT(/;"	d
bfin_write_NFC_IRQSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_IRQSTAT(/;"	d
bfin_write_NFC_PGCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_PGCTL(/;"	d
bfin_write_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_PGCTL(/;"	d
bfin_write_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_PGCTL(/;"	d
bfin_write_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_PGCTL(/;"	d
bfin_write_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_PGCTL(/;"	d
bfin_write_NFC_PGCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_PGCTL(/;"	d
bfin_write_NFC_READ	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_READ(/;"	d
bfin_write_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_READ(/;"	d
bfin_write_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_READ(/;"	d
bfin_write_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_READ(/;"	d
bfin_write_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_READ(/;"	d
bfin_write_NFC_READ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_READ(/;"	d
bfin_write_NFC_RST	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_RST(/;"	d
bfin_write_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_RST(/;"	d
bfin_write_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_RST(/;"	d
bfin_write_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_RST(/;"	d
bfin_write_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_RST(/;"	d
bfin_write_NFC_RST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_RST(/;"	d
bfin_write_NFC_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NFC_STAT(/;"	d
bfin_write_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_NFC_STAT(/;"	d
bfin_write_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_NFC_STAT(/;"	d
bfin_write_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_NFC_STAT(/;"	d
bfin_write_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_NFC_STAT(/;"	d
bfin_write_NFC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_NFC_STAT(/;"	d
bfin_write_NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_NONGPIO_DRIVE(/;"	d
bfin_write_NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_NONGPIO_DRIVE(/;"	d
bfin_write_NONGPIO_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NONGPIO_DRIVE(/;"	d
bfin_write_NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_NONGPIO_HYSTERESIS(/;"	d
bfin_write_NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_NONGPIO_HYSTERESIS(/;"	d
bfin_write_NONGPIO_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NONGPIO_HYSTERESIS(/;"	d
bfin_write_NONGPIO_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_NONGPIO_SLEW(/;"	d
bfin_write_OTP_BEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_BEN(/;"	d
bfin_write_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_BEN(/;"	d
bfin_write_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_BEN(/;"	d
bfin_write_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_BEN(/;"	d
bfin_write_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_BEN(/;"	d
bfin_write_OTP_BEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_BEN(/;"	d
bfin_write_OTP_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_CONTROL(/;"	d
bfin_write_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_CONTROL(/;"	d
bfin_write_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_CONTROL(/;"	d
bfin_write_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_CONTROL(/;"	d
bfin_write_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_CONTROL(/;"	d
bfin_write_OTP_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_CONTROL(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_DATA0(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_DATA1(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_DATA2(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_DATA3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_DATA3(/;"	d
bfin_write_OTP_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_STATUS(/;"	d
bfin_write_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_STATUS(/;"	d
bfin_write_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_STATUS(/;"	d
bfin_write_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_STATUS(/;"	d
bfin_write_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_STATUS(/;"	d
bfin_write_OTP_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_STATUS(/;"	d
bfin_write_OTP_TIMING	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_OTP_TIMING(/;"	d
bfin_write_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_OTP_TIMING(/;"	d
bfin_write_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_OTP_TIMING(/;"	d
bfin_write_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_OTP_TIMING(/;"	d
bfin_write_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_OTP_TIMING(/;"	d
bfin_write_OTP_TIMING	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_OTP_TIMING(/;"	d
bfin_write_PFCNTR0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PFCNTR0(/;"	d
bfin_write_PFCNTR0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_PFCNTR0(/;"	d
bfin_write_PFCNTR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PFCNTR1(/;"	d
bfin_write_PFCNTR1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_PFCNTR1(/;"	d
bfin_write_PFCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PFCTL(/;"	d
bfin_write_PFCTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_PFCTL(/;"	d
bfin_write_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_ASSIGN(/;"	d
bfin_write_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_ASSIGN(/;"	d
bfin_write_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_ASSIGN(/;"	d
bfin_write_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_ASSIGN(/;"	d
bfin_write_PINT0_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_ASSIGN(/;"	d
bfin_write_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_CLEAR(/;"	d
bfin_write_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_CLEAR(/;"	d
bfin_write_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_CLEAR(/;"	d
bfin_write_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_CLEAR(/;"	d
bfin_write_PINT0_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_CLEAR(/;"	d
bfin_write_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_SET(/;"	d
bfin_write_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_SET(/;"	d
bfin_write_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_SET(/;"	d
bfin_write_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_SET(/;"	d
bfin_write_PINT0_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_EDGE_SET(/;"	d
bfin_write_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_CLEAR(/;"	d
bfin_write_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_CLEAR(/;"	d
bfin_write_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_CLEAR(/;"	d
bfin_write_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_CLEAR(/;"	d
bfin_write_PINT0_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_CLEAR(/;"	d
bfin_write_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_SET(/;"	d
bfin_write_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_SET(/;"	d
bfin_write_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_SET(/;"	d
bfin_write_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_SET(/;"	d
bfin_write_PINT0_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_INVERT_SET(/;"	d
bfin_write_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_IRQ(/;"	d
bfin_write_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_IRQ(/;"	d
bfin_write_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_IRQ(/;"	d
bfin_write_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_IRQ(/;"	d
bfin_write_PINT0_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_IRQ(/;"	d
bfin_write_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_LATCH(/;"	d
bfin_write_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_LATCH(/;"	d
bfin_write_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_LATCH(/;"	d
bfin_write_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_LATCH(/;"	d
bfin_write_PINT0_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_LATCH(/;"	d
bfin_write_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_MASK_CLEAR(/;"	d
bfin_write_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_MASK_CLEAR(/;"	d
bfin_write_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_MASK_CLEAR(/;"	d
bfin_write_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_MASK_CLEAR(/;"	d
bfin_write_PINT0_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_MASK_CLEAR(/;"	d
bfin_write_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_MASK_SET(/;"	d
bfin_write_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_MASK_SET(/;"	d
bfin_write_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_MASK_SET(/;"	d
bfin_write_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_MASK_SET(/;"	d
bfin_write_PINT0_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_MASK_SET(/;"	d
bfin_write_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT0_PINSTATE(/;"	d
bfin_write_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT0_PINSTATE(/;"	d
bfin_write_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT0_PINSTATE(/;"	d
bfin_write_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT0_PINSTATE(/;"	d
bfin_write_PINT0_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT0_PINSTATE(/;"	d
bfin_write_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_ASSIGN(/;"	d
bfin_write_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_ASSIGN(/;"	d
bfin_write_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_ASSIGN(/;"	d
bfin_write_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_ASSIGN(/;"	d
bfin_write_PINT1_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_ASSIGN(/;"	d
bfin_write_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_CLEAR(/;"	d
bfin_write_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_CLEAR(/;"	d
bfin_write_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_CLEAR(/;"	d
bfin_write_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_CLEAR(/;"	d
bfin_write_PINT1_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_CLEAR(/;"	d
bfin_write_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_SET(/;"	d
bfin_write_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_SET(/;"	d
bfin_write_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_SET(/;"	d
bfin_write_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_SET(/;"	d
bfin_write_PINT1_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_EDGE_SET(/;"	d
bfin_write_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_CLEAR(/;"	d
bfin_write_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_CLEAR(/;"	d
bfin_write_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_CLEAR(/;"	d
bfin_write_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_CLEAR(/;"	d
bfin_write_PINT1_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_CLEAR(/;"	d
bfin_write_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_SET(/;"	d
bfin_write_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_SET(/;"	d
bfin_write_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_SET(/;"	d
bfin_write_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_SET(/;"	d
bfin_write_PINT1_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_INVERT_SET(/;"	d
bfin_write_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_IRQ(/;"	d
bfin_write_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_IRQ(/;"	d
bfin_write_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_IRQ(/;"	d
bfin_write_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_IRQ(/;"	d
bfin_write_PINT1_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_IRQ(/;"	d
bfin_write_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_LATCH(/;"	d
bfin_write_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_LATCH(/;"	d
bfin_write_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_LATCH(/;"	d
bfin_write_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_LATCH(/;"	d
bfin_write_PINT1_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_LATCH(/;"	d
bfin_write_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_MASK_CLEAR(/;"	d
bfin_write_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_MASK_CLEAR(/;"	d
bfin_write_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_MASK_CLEAR(/;"	d
bfin_write_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_MASK_CLEAR(/;"	d
bfin_write_PINT1_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_MASK_CLEAR(/;"	d
bfin_write_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_MASK_SET(/;"	d
bfin_write_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_MASK_SET(/;"	d
bfin_write_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_MASK_SET(/;"	d
bfin_write_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_MASK_SET(/;"	d
bfin_write_PINT1_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_MASK_SET(/;"	d
bfin_write_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT1_PINSTATE(/;"	d
bfin_write_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT1_PINSTATE(/;"	d
bfin_write_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT1_PINSTATE(/;"	d
bfin_write_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT1_PINSTATE(/;"	d
bfin_write_PINT1_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT1_PINSTATE(/;"	d
bfin_write_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_ASSIGN(/;"	d
bfin_write_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_ASSIGN(/;"	d
bfin_write_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_ASSIGN(/;"	d
bfin_write_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_ASSIGN(/;"	d
bfin_write_PINT2_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_ASSIGN(/;"	d
bfin_write_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_CLEAR(/;"	d
bfin_write_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_CLEAR(/;"	d
bfin_write_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_CLEAR(/;"	d
bfin_write_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_CLEAR(/;"	d
bfin_write_PINT2_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_CLEAR(/;"	d
bfin_write_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_SET(/;"	d
bfin_write_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_SET(/;"	d
bfin_write_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_SET(/;"	d
bfin_write_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_SET(/;"	d
bfin_write_PINT2_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_EDGE_SET(/;"	d
bfin_write_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_CLEAR(/;"	d
bfin_write_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_CLEAR(/;"	d
bfin_write_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_CLEAR(/;"	d
bfin_write_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_CLEAR(/;"	d
bfin_write_PINT2_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_CLEAR(/;"	d
bfin_write_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_SET(/;"	d
bfin_write_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_SET(/;"	d
bfin_write_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_SET(/;"	d
bfin_write_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_SET(/;"	d
bfin_write_PINT2_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_INVERT_SET(/;"	d
bfin_write_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_IRQ(/;"	d
bfin_write_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_IRQ(/;"	d
bfin_write_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_IRQ(/;"	d
bfin_write_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_IRQ(/;"	d
bfin_write_PINT2_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_IRQ(/;"	d
bfin_write_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_LATCH(/;"	d
bfin_write_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_LATCH(/;"	d
bfin_write_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_LATCH(/;"	d
bfin_write_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_LATCH(/;"	d
bfin_write_PINT2_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_LATCH(/;"	d
bfin_write_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_MASK_CLEAR(/;"	d
bfin_write_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_MASK_CLEAR(/;"	d
bfin_write_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_MASK_CLEAR(/;"	d
bfin_write_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_MASK_CLEAR(/;"	d
bfin_write_PINT2_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_MASK_CLEAR(/;"	d
bfin_write_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_MASK_SET(/;"	d
bfin_write_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_MASK_SET(/;"	d
bfin_write_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_MASK_SET(/;"	d
bfin_write_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_MASK_SET(/;"	d
bfin_write_PINT2_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_MASK_SET(/;"	d
bfin_write_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT2_PINSTATE(/;"	d
bfin_write_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT2_PINSTATE(/;"	d
bfin_write_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT2_PINSTATE(/;"	d
bfin_write_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT2_PINSTATE(/;"	d
bfin_write_PINT2_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT2_PINSTATE(/;"	d
bfin_write_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_ASSIGN(/;"	d
bfin_write_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_ASSIGN(/;"	d
bfin_write_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_ASSIGN(/;"	d
bfin_write_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_ASSIGN(/;"	d
bfin_write_PINT3_ASSIGN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_ASSIGN(/;"	d
bfin_write_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_CLEAR(/;"	d
bfin_write_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_CLEAR(/;"	d
bfin_write_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_CLEAR(/;"	d
bfin_write_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_CLEAR(/;"	d
bfin_write_PINT3_EDGE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_CLEAR(/;"	d
bfin_write_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_SET(/;"	d
bfin_write_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_SET(/;"	d
bfin_write_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_SET(/;"	d
bfin_write_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_SET(/;"	d
bfin_write_PINT3_EDGE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_EDGE_SET(/;"	d
bfin_write_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_CLEAR(/;"	d
bfin_write_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_CLEAR(/;"	d
bfin_write_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_CLEAR(/;"	d
bfin_write_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_CLEAR(/;"	d
bfin_write_PINT3_INVERT_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_CLEAR(/;"	d
bfin_write_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_SET(/;"	d
bfin_write_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_SET(/;"	d
bfin_write_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_SET(/;"	d
bfin_write_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_SET(/;"	d
bfin_write_PINT3_INVERT_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_INVERT_SET(/;"	d
bfin_write_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_IRQ(/;"	d
bfin_write_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_IRQ(/;"	d
bfin_write_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_IRQ(/;"	d
bfin_write_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_IRQ(/;"	d
bfin_write_PINT3_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_IRQ(/;"	d
bfin_write_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_LATCH(/;"	d
bfin_write_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_LATCH(/;"	d
bfin_write_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_LATCH(/;"	d
bfin_write_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_LATCH(/;"	d
bfin_write_PINT3_LATCH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_LATCH(/;"	d
bfin_write_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_MASK_CLEAR(/;"	d
bfin_write_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_MASK_CLEAR(/;"	d
bfin_write_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_MASK_CLEAR(/;"	d
bfin_write_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_MASK_CLEAR(/;"	d
bfin_write_PINT3_MASK_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_MASK_CLEAR(/;"	d
bfin_write_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_MASK_SET(/;"	d
bfin_write_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_MASK_SET(/;"	d
bfin_write_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_MASK_SET(/;"	d
bfin_write_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_MASK_SET(/;"	d
bfin_write_PINT3_MASK_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_MASK_SET(/;"	d
bfin_write_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PINT3_PINSTATE(/;"	d
bfin_write_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PINT3_PINSTATE(/;"	d
bfin_write_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PINT3_PINSTATE(/;"	d
bfin_write_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PINT3_PINSTATE(/;"	d
bfin_write_PINT3_PINSTATE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PINT3_PINSTATE(/;"	d
bfin_write_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_AHEND(/;"	d
bfin_write_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_AHEND(/;"	d
bfin_write_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_AHEND(/;"	d
bfin_write_PIXC_AHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_AHEND(/;"	d
bfin_write_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_AHSTART(/;"	d
bfin_write_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_AHSTART(/;"	d
bfin_write_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_AHSTART(/;"	d
bfin_write_PIXC_AHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_AHSTART(/;"	d
bfin_write_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_ATRANSP(/;"	d
bfin_write_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_ATRANSP(/;"	d
bfin_write_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_ATRANSP(/;"	d
bfin_write_PIXC_ATRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_ATRANSP(/;"	d
bfin_write_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_AVEND(/;"	d
bfin_write_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_AVEND(/;"	d
bfin_write_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_AVEND(/;"	d
bfin_write_PIXC_AVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_AVEND(/;"	d
bfin_write_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_AVSTART(/;"	d
bfin_write_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_AVSTART(/;"	d
bfin_write_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_AVSTART(/;"	d
bfin_write_PIXC_AVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_AVSTART(/;"	d
bfin_write_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_BHEND(/;"	d
bfin_write_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_BHEND(/;"	d
bfin_write_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_BHEND(/;"	d
bfin_write_PIXC_BHEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_BHEND(/;"	d
bfin_write_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_BHSTART(/;"	d
bfin_write_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_BHSTART(/;"	d
bfin_write_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_BHSTART(/;"	d
bfin_write_PIXC_BHSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_BHSTART(/;"	d
bfin_write_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_BTRANSP(/;"	d
bfin_write_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_BTRANSP(/;"	d
bfin_write_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_BTRANSP(/;"	d
bfin_write_PIXC_BTRANSP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_BTRANSP(/;"	d
bfin_write_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_BVCON(/;"	d
bfin_write_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_BVCON(/;"	d
bfin_write_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_BVCON(/;"	d
bfin_write_PIXC_BVCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_BVCON(/;"	d
bfin_write_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_BVEND(/;"	d
bfin_write_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_BVEND(/;"	d
bfin_write_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_BVEND(/;"	d
bfin_write_PIXC_BVEND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_BVEND(/;"	d
bfin_write_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_BVSTART(/;"	d
bfin_write_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_BVSTART(/;"	d
bfin_write_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_BVSTART(/;"	d
bfin_write_PIXC_BVSTART	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_BVSTART(/;"	d
bfin_write_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_CCBIAS(/;"	d
bfin_write_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_CCBIAS(/;"	d
bfin_write_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_CCBIAS(/;"	d
bfin_write_PIXC_CCBIAS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_CCBIAS(/;"	d
bfin_write_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_CTL(/;"	d
bfin_write_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_CTL(/;"	d
bfin_write_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_CTL(/;"	d
bfin_write_PIXC_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_CTL(/;"	d
bfin_write_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_GUCON(/;"	d
bfin_write_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_GUCON(/;"	d
bfin_write_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_GUCON(/;"	d
bfin_write_PIXC_GUCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_GUCON(/;"	d
bfin_write_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_INTRSTAT(/;"	d
bfin_write_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_INTRSTAT(/;"	d
bfin_write_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_INTRSTAT(/;"	d
bfin_write_PIXC_INTRSTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_INTRSTAT(/;"	d
bfin_write_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_LPF(/;"	d
bfin_write_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_LPF(/;"	d
bfin_write_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_LPF(/;"	d
bfin_write_PIXC_LPF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_LPF(/;"	d
bfin_write_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_PPL(/;"	d
bfin_write_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_PPL(/;"	d
bfin_write_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_PPL(/;"	d
bfin_write_PIXC_PPL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_PPL(/;"	d
bfin_write_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_RYCON(/;"	d
bfin_write_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_RYCON(/;"	d
bfin_write_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_RYCON(/;"	d
bfin_write_PIXC_RYCON	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_RYCON(/;"	d
bfin_write_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PIXC_TC(/;"	d
bfin_write_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PIXC_TC(/;"	d
bfin_write_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PIXC_TC(/;"	d
bfin_write_PIXC_TC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PIXC_TC(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PLL_CTL(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_DIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PLL_DIV(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_LOCKCNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PLL_LOCKCNT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PLL_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PLL_STAT(/;"	d
bfin_write_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA(/;"	d
bfin_write_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA(/;"	d
bfin_write_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA(/;"	d
bfin_write_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA(/;"	d
bfin_write_PORTA	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA(/;"	d
bfin_write_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_CLEAR(/;"	d
bfin_write_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_CLEAR(/;"	d
bfin_write_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_CLEAR(/;"	d
bfin_write_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_CLEAR(/;"	d
bfin_write_PORTA_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_CLEAR(/;"	d
bfin_write_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_DIR_CLEAR(/;"	d
bfin_write_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_DIR_CLEAR(/;"	d
bfin_write_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_DIR_CLEAR(/;"	d
bfin_write_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_DIR_CLEAR(/;"	d
bfin_write_PORTA_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_DIR_CLEAR(/;"	d
bfin_write_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_DIR_SET(/;"	d
bfin_write_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_DIR_SET(/;"	d
bfin_write_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_DIR_SET(/;"	d
bfin_write_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_DIR_SET(/;"	d
bfin_write_PORTA_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_DIR_SET(/;"	d
bfin_write_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_FER(/;"	d
bfin_write_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_FER(/;"	d
bfin_write_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_FER(/;"	d
bfin_write_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_FER(/;"	d
bfin_write_PORTA_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_FER(/;"	d
bfin_write_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_INEN(/;"	d
bfin_write_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_INEN(/;"	d
bfin_write_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_INEN(/;"	d
bfin_write_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_INEN(/;"	d
bfin_write_PORTA_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_INEN(/;"	d
bfin_write_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_MUX(/;"	d
bfin_write_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_MUX(/;"	d
bfin_write_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_MUX(/;"	d
bfin_write_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_MUX(/;"	d
bfin_write_PORTA_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_MUX(/;"	d
bfin_write_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTA_SET(/;"	d
bfin_write_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTA_SET(/;"	d
bfin_write_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTA_SET(/;"	d
bfin_write_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTA_SET(/;"	d
bfin_write_PORTA_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTA_SET(/;"	d
bfin_write_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB(/;"	d
bfin_write_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB(/;"	d
bfin_write_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB(/;"	d
bfin_write_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB(/;"	d
bfin_write_PORTB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB(/;"	d
bfin_write_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_CLEAR(/;"	d
bfin_write_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_CLEAR(/;"	d
bfin_write_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_CLEAR(/;"	d
bfin_write_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_CLEAR(/;"	d
bfin_write_PORTB_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_CLEAR(/;"	d
bfin_write_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_DIR_CLEAR(/;"	d
bfin_write_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_DIR_CLEAR(/;"	d
bfin_write_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_DIR_CLEAR(/;"	d
bfin_write_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_DIR_CLEAR(/;"	d
bfin_write_PORTB_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_DIR_CLEAR(/;"	d
bfin_write_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_DIR_SET(/;"	d
bfin_write_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_DIR_SET(/;"	d
bfin_write_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_DIR_SET(/;"	d
bfin_write_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_DIR_SET(/;"	d
bfin_write_PORTB_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_DIR_SET(/;"	d
bfin_write_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_FER(/;"	d
bfin_write_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_FER(/;"	d
bfin_write_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_FER(/;"	d
bfin_write_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_FER(/;"	d
bfin_write_PORTB_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_FER(/;"	d
bfin_write_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_INEN(/;"	d
bfin_write_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_INEN(/;"	d
bfin_write_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_INEN(/;"	d
bfin_write_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_INEN(/;"	d
bfin_write_PORTB_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_INEN(/;"	d
bfin_write_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_MUX(/;"	d
bfin_write_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_MUX(/;"	d
bfin_write_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_MUX(/;"	d
bfin_write_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_MUX(/;"	d
bfin_write_PORTB_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_MUX(/;"	d
bfin_write_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTB_SET(/;"	d
bfin_write_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTB_SET(/;"	d
bfin_write_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTB_SET(/;"	d
bfin_write_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTB_SET(/;"	d
bfin_write_PORTB_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTB_SET(/;"	d
bfin_write_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC(/;"	d
bfin_write_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC(/;"	d
bfin_write_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC(/;"	d
bfin_write_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC(/;"	d
bfin_write_PORTC	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC(/;"	d
bfin_write_PORTCIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO(/;"	d
bfin_write_PORTCIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO_CLEAR(/;"	d
bfin_write_PORTCIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO_DIR(/;"	d
bfin_write_PORTCIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO_FER(/;"	d
bfin_write_PORTCIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO_INEN(/;"	d
bfin_write_PORTCIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO_SET(/;"	d
bfin_write_PORTCIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTCIO_TOGGLE(/;"	d
bfin_write_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_CLEAR(/;"	d
bfin_write_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_CLEAR(/;"	d
bfin_write_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_CLEAR(/;"	d
bfin_write_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_CLEAR(/;"	d
bfin_write_PORTC_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_CLEAR(/;"	d
bfin_write_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_DIR_CLEAR(/;"	d
bfin_write_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_DIR_CLEAR(/;"	d
bfin_write_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_DIR_CLEAR(/;"	d
bfin_write_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_DIR_CLEAR(/;"	d
bfin_write_PORTC_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_DIR_CLEAR(/;"	d
bfin_write_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_DIR_SET(/;"	d
bfin_write_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_DIR_SET(/;"	d
bfin_write_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_DIR_SET(/;"	d
bfin_write_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_DIR_SET(/;"	d
bfin_write_PORTC_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_DIR_SET(/;"	d
bfin_write_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_FER(/;"	d
bfin_write_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_FER(/;"	d
bfin_write_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_FER(/;"	d
bfin_write_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_FER(/;"	d
bfin_write_PORTC_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_FER(/;"	d
bfin_write_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_INEN(/;"	d
bfin_write_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_INEN(/;"	d
bfin_write_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_INEN(/;"	d
bfin_write_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_INEN(/;"	d
bfin_write_PORTC_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_INEN(/;"	d
bfin_write_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_MUX(/;"	d
bfin_write_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_MUX(/;"	d
bfin_write_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_MUX(/;"	d
bfin_write_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_MUX(/;"	d
bfin_write_PORTC_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_MUX(/;"	d
bfin_write_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTC_SET(/;"	d
bfin_write_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTC_SET(/;"	d
bfin_write_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTC_SET(/;"	d
bfin_write_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTC_SET(/;"	d
bfin_write_PORTC_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTC_SET(/;"	d
bfin_write_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD(/;"	d
bfin_write_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD(/;"	d
bfin_write_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD(/;"	d
bfin_write_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD(/;"	d
bfin_write_PORTD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD(/;"	d
bfin_write_PORTDIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO(/;"	d
bfin_write_PORTDIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO_CLEAR(/;"	d
bfin_write_PORTDIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO_DIR(/;"	d
bfin_write_PORTDIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO_FER(/;"	d
bfin_write_PORTDIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO_INEN(/;"	d
bfin_write_PORTDIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO_SET(/;"	d
bfin_write_PORTDIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTDIO_TOGGLE(/;"	d
bfin_write_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_CLEAR(/;"	d
bfin_write_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_CLEAR(/;"	d
bfin_write_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_CLEAR(/;"	d
bfin_write_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_CLEAR(/;"	d
bfin_write_PORTD_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_CLEAR(/;"	d
bfin_write_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_DIR_CLEAR(/;"	d
bfin_write_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_DIR_CLEAR(/;"	d
bfin_write_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_DIR_CLEAR(/;"	d
bfin_write_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_DIR_CLEAR(/;"	d
bfin_write_PORTD_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_DIR_CLEAR(/;"	d
bfin_write_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_DIR_SET(/;"	d
bfin_write_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_DIR_SET(/;"	d
bfin_write_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_DIR_SET(/;"	d
bfin_write_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_DIR_SET(/;"	d
bfin_write_PORTD_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_DIR_SET(/;"	d
bfin_write_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_FER(/;"	d
bfin_write_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_FER(/;"	d
bfin_write_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_FER(/;"	d
bfin_write_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_FER(/;"	d
bfin_write_PORTD_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_FER(/;"	d
bfin_write_PORTD_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_PORTD_FER_CLR(/;"	d
bfin_write_PORTD_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_PORTD_FER_SET(/;"	d
bfin_write_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_INEN(/;"	d
bfin_write_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_INEN(/;"	d
bfin_write_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_INEN(/;"	d
bfin_write_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_INEN(/;"	d
bfin_write_PORTD_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_INEN(/;"	d
bfin_write_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_MUX(/;"	d
bfin_write_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_MUX(/;"	d
bfin_write_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_MUX(/;"	d
bfin_write_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_MUX(/;"	d
bfin_write_PORTD_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_MUX(/;"	d
bfin_write_PORTD_MUX	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_PORTD_MUX(/;"	d
bfin_write_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTD_SET(/;"	d
bfin_write_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTD_SET(/;"	d
bfin_write_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTD_SET(/;"	d
bfin_write_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTD_SET(/;"	d
bfin_write_PORTD_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTD_SET(/;"	d
bfin_write_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE(/;"	d
bfin_write_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE(/;"	d
bfin_write_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE(/;"	d
bfin_write_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE(/;"	d
bfin_write_PORTE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE(/;"	d
bfin_write_PORTEIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO(/;"	d
bfin_write_PORTEIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO_CLEAR(/;"	d
bfin_write_PORTEIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO_DIR(/;"	d
bfin_write_PORTEIO_FER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO_FER(/;"	d
bfin_write_PORTEIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO_INEN(/;"	d
bfin_write_PORTEIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO_SET(/;"	d
bfin_write_PORTEIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTEIO_TOGGLE(/;"	d
bfin_write_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_CLEAR(/;"	d
bfin_write_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_CLEAR(/;"	d
bfin_write_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_CLEAR(/;"	d
bfin_write_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_CLEAR(/;"	d
bfin_write_PORTE_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_CLEAR(/;"	d
bfin_write_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_DIR_CLEAR(/;"	d
bfin_write_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_DIR_CLEAR(/;"	d
bfin_write_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_DIR_CLEAR(/;"	d
bfin_write_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_DIR_CLEAR(/;"	d
bfin_write_PORTE_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_DIR_CLEAR(/;"	d
bfin_write_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_DIR_SET(/;"	d
bfin_write_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_DIR_SET(/;"	d
bfin_write_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_DIR_SET(/;"	d
bfin_write_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_DIR_SET(/;"	d
bfin_write_PORTE_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_DIR_SET(/;"	d
bfin_write_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_FER(/;"	d
bfin_write_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_FER(/;"	d
bfin_write_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_FER(/;"	d
bfin_write_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_FER(/;"	d
bfin_write_PORTE_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_FER(/;"	d
bfin_write_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_INEN(/;"	d
bfin_write_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_INEN(/;"	d
bfin_write_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_INEN(/;"	d
bfin_write_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_INEN(/;"	d
bfin_write_PORTE_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_INEN(/;"	d
bfin_write_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_MUX(/;"	d
bfin_write_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_MUX(/;"	d
bfin_write_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_MUX(/;"	d
bfin_write_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_MUX(/;"	d
bfin_write_PORTE_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_MUX(/;"	d
bfin_write_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTE_SET(/;"	d
bfin_write_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTE_SET(/;"	d
bfin_write_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTE_SET(/;"	d
bfin_write_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTE_SET(/;"	d
bfin_write_PORTE_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTE_SET(/;"	d
bfin_write_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF(/;"	d
bfin_write_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF(/;"	d
bfin_write_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF(/;"	d
bfin_write_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF(/;"	d
bfin_write_PORTF	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF(/;"	d
bfin_write_PORTFIO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO(/;"	d
bfin_write_PORTFIO	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO(/;"	d
bfin_write_PORTFIO	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO(/;"	d
bfin_write_PORTFIO	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO(/;"	d
bfin_write_PORTFIO	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO(/;"	d
bfin_write_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_BOTH(/;"	d
bfin_write_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_BOTH(/;"	d
bfin_write_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_BOTH(/;"	d
bfin_write_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_BOTH(/;"	d
bfin_write_PORTFIO_BOTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_BOTH(/;"	d
bfin_write_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_CLEAR(/;"	d
bfin_write_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_CLEAR(/;"	d
bfin_write_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_CLEAR(/;"	d
bfin_write_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_CLEAR(/;"	d
bfin_write_PORTFIO_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_CLEAR(/;"	d
bfin_write_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_DIR(/;"	d
bfin_write_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_DIR(/;"	d
bfin_write_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_DIR(/;"	d
bfin_write_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_DIR(/;"	d
bfin_write_PORTFIO_DIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_DIR(/;"	d
bfin_write_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_EDGE(/;"	d
bfin_write_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_EDGE(/;"	d
bfin_write_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_EDGE(/;"	d
bfin_write_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_EDGE(/;"	d
bfin_write_PORTFIO_EDGE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_EDGE(/;"	d
bfin_write_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_INEN(/;"	d
bfin_write_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_INEN(/;"	d
bfin_write_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_INEN(/;"	d
bfin_write_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_INEN(/;"	d
bfin_write_PORTFIO_INEN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_INEN(/;"	d
bfin_write_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKA(/;"	d
bfin_write_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKA(/;"	d
bfin_write_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKA(/;"	d
bfin_write_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKA(/;"	d
bfin_write_PORTFIO_MASKA	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKA(/;"	d
bfin_write_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKA_CLEAR(/;"	d
bfin_write_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKA_CLEAR(/;"	d
bfin_write_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKA_CLEAR(/;"	d
bfin_write_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKA_CLEAR(/;"	d
bfin_write_PORTFIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKA_CLEAR(/;"	d
bfin_write_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKA_SET(/;"	d
bfin_write_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKA_SET(/;"	d
bfin_write_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKA_SET(/;"	d
bfin_write_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKA_SET(/;"	d
bfin_write_PORTFIO_MASKA_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKA_SET(/;"	d
bfin_write_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKB(/;"	d
bfin_write_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKB(/;"	d
bfin_write_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKB(/;"	d
bfin_write_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKB(/;"	d
bfin_write_PORTFIO_MASKB	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKB(/;"	d
bfin_write_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKB_CLEAR(/;"	d
bfin_write_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKB_CLEAR(/;"	d
bfin_write_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKB_CLEAR(/;"	d
bfin_write_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKB_CLEAR(/;"	d
bfin_write_PORTFIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKB_CLEAR(/;"	d
bfin_write_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKB_SET(/;"	d
bfin_write_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKB_SET(/;"	d
bfin_write_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKB_SET(/;"	d
bfin_write_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKB_SET(/;"	d
bfin_write_PORTFIO_MASKB_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKB_SET(/;"	d
bfin_write_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTFIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_POLAR(/;"	d
bfin_write_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_POLAR(/;"	d
bfin_write_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_POLAR(/;"	d
bfin_write_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_POLAR(/;"	d
bfin_write_PORTFIO_POLAR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_POLAR(/;"	d
bfin_write_PORTFIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_SET(/;"	d
bfin_write_PORTFIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_SET(/;"	d
bfin_write_PORTFIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_SET(/;"	d
bfin_write_PORTFIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_SET(/;"	d
bfin_write_PORTFIO_SET	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_SET(/;"	d
bfin_write_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTFIO_TOGGLE(/;"	d
bfin_write_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTFIO_TOGGLE(/;"	d
bfin_write_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTFIO_TOGGLE(/;"	d
bfin_write_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTFIO_TOGGLE(/;"	d
bfin_write_PORTFIO_TOGGLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PORTFIO_TOGGLE(/;"	d
bfin_write_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_CLEAR(/;"	d
bfin_write_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_CLEAR(/;"	d
bfin_write_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_CLEAR(/;"	d
bfin_write_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_CLEAR(/;"	d
bfin_write_PORTF_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_CLEAR(/;"	d
bfin_write_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_DIR_CLEAR(/;"	d
bfin_write_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_DIR_CLEAR(/;"	d
bfin_write_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_DIR_CLEAR(/;"	d
bfin_write_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_DIR_CLEAR(/;"	d
bfin_write_PORTF_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_DIR_CLEAR(/;"	d
bfin_write_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_DIR_SET(/;"	d
bfin_write_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_DIR_SET(/;"	d
bfin_write_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_DIR_SET(/;"	d
bfin_write_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_DIR_SET(/;"	d
bfin_write_PORTF_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_DIR_SET(/;"	d
bfin_write_PORTF_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTF_DRIVE(/;"	d
bfin_write_PORTF_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTF_DRIVE(/;"	d
bfin_write_PORTF_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTF_DRIVE(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_FER(/;"	d
bfin_write_PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTF_HYSTERESIS(/;"	d
bfin_write_PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTF_HYSTERESIS(/;"	d
bfin_write_PORTF_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTF_HYSTERESIS(/;"	d
bfin_write_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_INEN(/;"	d
bfin_write_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_INEN(/;"	d
bfin_write_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_INEN(/;"	d
bfin_write_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_INEN(/;"	d
bfin_write_PORTF_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_INEN(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_MUX(/;"	d
bfin_write_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTF_SET(/;"	d
bfin_write_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTF_SET(/;"	d
bfin_write_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTF_SET(/;"	d
bfin_write_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTF_SET(/;"	d
bfin_write_PORTF_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTF_SET(/;"	d
bfin_write_PORTF_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTF_SLEW(/;"	d
bfin_write_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG(/;"	d
bfin_write_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG(/;"	d
bfin_write_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG(/;"	d
bfin_write_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG(/;"	d
bfin_write_PORTG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG(/;"	d
bfin_write_PORTGIO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO(/;"	d
bfin_write_PORTGIO	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO(/;"	d
bfin_write_PORTGIO	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO(/;"	d
bfin_write_PORTGIO	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO(/;"	d
bfin_write_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_BOTH(/;"	d
bfin_write_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_BOTH(/;"	d
bfin_write_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_BOTH(/;"	d
bfin_write_PORTGIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_BOTH(/;"	d
bfin_write_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_CLEAR(/;"	d
bfin_write_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_CLEAR(/;"	d
bfin_write_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_CLEAR(/;"	d
bfin_write_PORTGIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_CLEAR(/;"	d
bfin_write_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_DIR(/;"	d
bfin_write_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_DIR(/;"	d
bfin_write_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_DIR(/;"	d
bfin_write_PORTGIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_DIR(/;"	d
bfin_write_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_EDGE(/;"	d
bfin_write_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_EDGE(/;"	d
bfin_write_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_EDGE(/;"	d
bfin_write_PORTGIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_EDGE(/;"	d
bfin_write_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_INEN(/;"	d
bfin_write_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_INEN(/;"	d
bfin_write_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_INEN(/;"	d
bfin_write_PORTGIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_INEN(/;"	d
bfin_write_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKA(/;"	d
bfin_write_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKA(/;"	d
bfin_write_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKA(/;"	d
bfin_write_PORTGIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKA(/;"	d
bfin_write_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKA_CLEAR(/;"	d
bfin_write_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKA_CLEAR(/;"	d
bfin_write_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKA_CLEAR(/;"	d
bfin_write_PORTGIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKA_CLEAR(/;"	d
bfin_write_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKA_SET(/;"	d
bfin_write_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKA_SET(/;"	d
bfin_write_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKA_SET(/;"	d
bfin_write_PORTGIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKA_SET(/;"	d
bfin_write_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKB(/;"	d
bfin_write_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKB(/;"	d
bfin_write_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKB(/;"	d
bfin_write_PORTGIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKB(/;"	d
bfin_write_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKB_CLEAR(/;"	d
bfin_write_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKB_CLEAR(/;"	d
bfin_write_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKB_CLEAR(/;"	d
bfin_write_PORTGIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKB_CLEAR(/;"	d
bfin_write_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKB_SET(/;"	d
bfin_write_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKB_SET(/;"	d
bfin_write_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKB_SET(/;"	d
bfin_write_PORTGIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKB_SET(/;"	d
bfin_write_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTGIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_POLAR(/;"	d
bfin_write_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_POLAR(/;"	d
bfin_write_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_POLAR(/;"	d
bfin_write_PORTGIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_POLAR(/;"	d
bfin_write_PORTGIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_SET(/;"	d
bfin_write_PORTGIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_SET(/;"	d
bfin_write_PORTGIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_SET(/;"	d
bfin_write_PORTGIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_SET(/;"	d
bfin_write_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTGIO_TOGGLE(/;"	d
bfin_write_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTGIO_TOGGLE(/;"	d
bfin_write_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTGIO_TOGGLE(/;"	d
bfin_write_PORTGIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTGIO_TOGGLE(/;"	d
bfin_write_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_CLEAR(/;"	d
bfin_write_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_CLEAR(/;"	d
bfin_write_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_CLEAR(/;"	d
bfin_write_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_CLEAR(/;"	d
bfin_write_PORTG_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_CLEAR(/;"	d
bfin_write_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_DIR_CLEAR(/;"	d
bfin_write_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_DIR_CLEAR(/;"	d
bfin_write_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_DIR_CLEAR(/;"	d
bfin_write_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_DIR_CLEAR(/;"	d
bfin_write_PORTG_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_DIR_CLEAR(/;"	d
bfin_write_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_DIR_SET(/;"	d
bfin_write_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_DIR_SET(/;"	d
bfin_write_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_DIR_SET(/;"	d
bfin_write_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_DIR_SET(/;"	d
bfin_write_PORTG_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_DIR_SET(/;"	d
bfin_write_PORTG_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTG_DRIVE(/;"	d
bfin_write_PORTG_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTG_DRIVE(/;"	d
bfin_write_PORTG_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTG_DRIVE(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_FER(/;"	d
bfin_write_PORTG_FER_CLR	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_PORTG_FER_CLR(/;"	d
bfin_write_PORTG_FER_SET	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_PORTG_FER_SET(/;"	d
bfin_write_PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTG_HYSTERESIS(/;"	d
bfin_write_PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTG_HYSTERESIS(/;"	d
bfin_write_PORTG_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTG_HYSTERESIS(/;"	d
bfin_write_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_INEN(/;"	d
bfin_write_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_INEN(/;"	d
bfin_write_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_INEN(/;"	d
bfin_write_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_INEN(/;"	d
bfin_write_PORTG_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_INEN(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_MUX	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_PORTG_MUX(/;"	d
bfin_write_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTG_SET(/;"	d
bfin_write_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTG_SET(/;"	d
bfin_write_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTG_SET(/;"	d
bfin_write_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTG_SET(/;"	d
bfin_write_PORTG_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTG_SET(/;"	d
bfin_write_PORTG_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTG_SLEW(/;"	d
bfin_write_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH(/;"	d
bfin_write_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH(/;"	d
bfin_write_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH(/;"	d
bfin_write_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH(/;"	d
bfin_write_PORTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH(/;"	d
bfin_write_PORTHIO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO(/;"	d
bfin_write_PORTHIO	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO(/;"	d
bfin_write_PORTHIO	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO(/;"	d
bfin_write_PORTHIO	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO(/;"	d
bfin_write_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_BOTH(/;"	d
bfin_write_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_BOTH(/;"	d
bfin_write_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_BOTH(/;"	d
bfin_write_PORTHIO_BOTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_BOTH(/;"	d
bfin_write_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_CLEAR(/;"	d
bfin_write_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_CLEAR(/;"	d
bfin_write_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_CLEAR(/;"	d
bfin_write_PORTHIO_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_CLEAR(/;"	d
bfin_write_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_DIR(/;"	d
bfin_write_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_DIR(/;"	d
bfin_write_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_DIR(/;"	d
bfin_write_PORTHIO_DIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_DIR(/;"	d
bfin_write_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_EDGE(/;"	d
bfin_write_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_EDGE(/;"	d
bfin_write_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_EDGE(/;"	d
bfin_write_PORTHIO_EDGE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_EDGE(/;"	d
bfin_write_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_INEN(/;"	d
bfin_write_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_INEN(/;"	d
bfin_write_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_INEN(/;"	d
bfin_write_PORTHIO_INEN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_INEN(/;"	d
bfin_write_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKA(/;"	d
bfin_write_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKA(/;"	d
bfin_write_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKA(/;"	d
bfin_write_PORTHIO_MASKA	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKA(/;"	d
bfin_write_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKA_CLEAR(/;"	d
bfin_write_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKA_CLEAR(/;"	d
bfin_write_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKA_CLEAR(/;"	d
bfin_write_PORTHIO_MASKA_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKA_CLEAR(/;"	d
bfin_write_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKA_SET(/;"	d
bfin_write_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKA_SET(/;"	d
bfin_write_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKA_SET(/;"	d
bfin_write_PORTHIO_MASKA_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKA_SET(/;"	d
bfin_write_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKA_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKA_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKB(/;"	d
bfin_write_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKB(/;"	d
bfin_write_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKB(/;"	d
bfin_write_PORTHIO_MASKB	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKB(/;"	d
bfin_write_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKB_CLEAR(/;"	d
bfin_write_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKB_CLEAR(/;"	d
bfin_write_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKB_CLEAR(/;"	d
bfin_write_PORTHIO_MASKB_CLEAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKB_CLEAR(/;"	d
bfin_write_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKB_SET(/;"	d
bfin_write_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKB_SET(/;"	d
bfin_write_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKB_SET(/;"	d
bfin_write_PORTHIO_MASKB_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKB_SET(/;"	d
bfin_write_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTHIO_MASKB_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_MASKB_TOGGLE(/;"	d
bfin_write_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_POLAR(/;"	d
bfin_write_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_POLAR(/;"	d
bfin_write_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_POLAR(/;"	d
bfin_write_PORTHIO_POLAR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_POLAR(/;"	d
bfin_write_PORTHIO_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_SET(/;"	d
bfin_write_PORTHIO_SET	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_SET(/;"	d
bfin_write_PORTHIO_SET	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_SET(/;"	d
bfin_write_PORTHIO_SET	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_SET(/;"	d
bfin_write_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTHIO_TOGGLE(/;"	d
bfin_write_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTHIO_TOGGLE(/;"	d
bfin_write_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTHIO_TOGGLE(/;"	d
bfin_write_PORTHIO_TOGGLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTHIO_TOGGLE(/;"	d
bfin_write_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_CLEAR(/;"	d
bfin_write_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_CLEAR(/;"	d
bfin_write_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_CLEAR(/;"	d
bfin_write_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_CLEAR(/;"	d
bfin_write_PORTH_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_CLEAR(/;"	d
bfin_write_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_DIR_CLEAR(/;"	d
bfin_write_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_DIR_CLEAR(/;"	d
bfin_write_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_DIR_CLEAR(/;"	d
bfin_write_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_DIR_CLEAR(/;"	d
bfin_write_PORTH_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_DIR_CLEAR(/;"	d
bfin_write_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_DIR_SET(/;"	d
bfin_write_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_DIR_SET(/;"	d
bfin_write_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_DIR_SET(/;"	d
bfin_write_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_DIR_SET(/;"	d
bfin_write_PORTH_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_DIR_SET(/;"	d
bfin_write_PORTH_DRIVE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTH_DRIVE(/;"	d
bfin_write_PORTH_DRIVE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTH_DRIVE(/;"	d
bfin_write_PORTH_DRIVE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTH_DRIVE(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_FER(/;"	d
bfin_write_PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTH_HYSTERESIS(/;"	d
bfin_write_PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTH_HYSTERESIS(/;"	d
bfin_write_PORTH_HYSTERESIS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTH_HYSTERESIS(/;"	d
bfin_write_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_INEN(/;"	d
bfin_write_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_INEN(/;"	d
bfin_write_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_INEN(/;"	d
bfin_write_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_INEN(/;"	d
bfin_write_PORTH_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_INEN(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_MUX(/;"	d
bfin_write_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTH_SET(/;"	d
bfin_write_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTH_SET(/;"	d
bfin_write_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTH_SET(/;"	d
bfin_write_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTH_SET(/;"	d
bfin_write_PORTH_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTH_SET(/;"	d
bfin_write_PORTH_SLEW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PORTH_SLEW(/;"	d
bfin_write_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI(/;"	d
bfin_write_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI(/;"	d
bfin_write_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI(/;"	d
bfin_write_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI(/;"	d
bfin_write_PORTI	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI(/;"	d
bfin_write_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_CLEAR(/;"	d
bfin_write_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_CLEAR(/;"	d
bfin_write_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_CLEAR(/;"	d
bfin_write_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_CLEAR(/;"	d
bfin_write_PORTI_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_CLEAR(/;"	d
bfin_write_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_DIR_CLEAR(/;"	d
bfin_write_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_DIR_CLEAR(/;"	d
bfin_write_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_DIR_CLEAR(/;"	d
bfin_write_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_DIR_CLEAR(/;"	d
bfin_write_PORTI_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_DIR_CLEAR(/;"	d
bfin_write_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_DIR_SET(/;"	d
bfin_write_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_DIR_SET(/;"	d
bfin_write_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_DIR_SET(/;"	d
bfin_write_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_DIR_SET(/;"	d
bfin_write_PORTI_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_DIR_SET(/;"	d
bfin_write_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_FER(/;"	d
bfin_write_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_FER(/;"	d
bfin_write_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_FER(/;"	d
bfin_write_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_FER(/;"	d
bfin_write_PORTI_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_FER(/;"	d
bfin_write_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_INEN(/;"	d
bfin_write_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_INEN(/;"	d
bfin_write_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_INEN(/;"	d
bfin_write_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_INEN(/;"	d
bfin_write_PORTI_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_INEN(/;"	d
bfin_write_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_MUX(/;"	d
bfin_write_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_MUX(/;"	d
bfin_write_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_MUX(/;"	d
bfin_write_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_MUX(/;"	d
bfin_write_PORTI_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_MUX(/;"	d
bfin_write_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTI_SET(/;"	d
bfin_write_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTI_SET(/;"	d
bfin_write_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTI_SET(/;"	d
bfin_write_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTI_SET(/;"	d
bfin_write_PORTI_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTI_SET(/;"	d
bfin_write_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ(/;"	d
bfin_write_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ(/;"	d
bfin_write_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ(/;"	d
bfin_write_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ(/;"	d
bfin_write_PORTJ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ(/;"	d
bfin_write_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_CLEAR(/;"	d
bfin_write_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_CLEAR(/;"	d
bfin_write_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_CLEAR(/;"	d
bfin_write_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_CLEAR(/;"	d
bfin_write_PORTJ_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_CLEAR(/;"	d
bfin_write_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_CLEAR(/;"	d
bfin_write_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_CLEAR(/;"	d
bfin_write_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_CLEAR(/;"	d
bfin_write_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_CLEAR(/;"	d
bfin_write_PORTJ_DIR_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_CLEAR(/;"	d
bfin_write_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_SET(/;"	d
bfin_write_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_SET(/;"	d
bfin_write_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_SET(/;"	d
bfin_write_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_SET(/;"	d
bfin_write_PORTJ_DIR_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_DIR_SET(/;"	d
bfin_write_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_FER(/;"	d
bfin_write_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_FER(/;"	d
bfin_write_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_FER(/;"	d
bfin_write_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_FER(/;"	d
bfin_write_PORTJ_FER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_FER(/;"	d
bfin_write_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_INEN(/;"	d
bfin_write_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_INEN(/;"	d
bfin_write_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_INEN(/;"	d
bfin_write_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_INEN(/;"	d
bfin_write_PORTJ_INEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_INEN(/;"	d
bfin_write_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_MUX(/;"	d
bfin_write_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_MUX(/;"	d
bfin_write_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_MUX(/;"	d
bfin_write_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_MUX(/;"	d
bfin_write_PORTJ_MUX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_MUX(/;"	d
bfin_write_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_PORTJ_SET(/;"	d
bfin_write_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_PORTJ_SET(/;"	d
bfin_write_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_PORTJ_SET(/;"	d
bfin_write_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_PORTJ_SET(/;"	d
bfin_write_PORTJ_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_PORTJ_SET(/;"	d
bfin_write_PORT_MUX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PORT_MUX(/;"	d
bfin_write_PPI0_CONTROL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI0_CONTROL(/;"	d
bfin_write_PPI0_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI0_COUNT(/;"	d
bfin_write_PPI0_DELAY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI0_DELAY(/;"	d
bfin_write_PPI0_FRAME	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI0_FRAME(/;"	d
bfin_write_PPI0_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI0_STATUS(/;"	d
bfin_write_PPI1_CONTROL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI1_CONTROL(/;"	d
bfin_write_PPI1_COUNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI1_COUNT(/;"	d
bfin_write_PPI1_DELAY	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI1_DELAY(/;"	d
bfin_write_PPI1_FRAME	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI1_FRAME(/;"	d
bfin_write_PPI1_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_PPI1_STATUS(/;"	d
bfin_write_PPI_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PPI_CONTROL(/;"	d
bfin_write_PPI_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PPI_CONTROL(/;"	d
bfin_write_PPI_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PPI_CONTROL(/;"	d
bfin_write_PPI_CONTROL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PPI_CONTROL(/;"	d
bfin_write_PPI_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PPI_CONTROL(/;"	d
bfin_write_PPI_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PPI_CONTROL(/;"	d
bfin_write_PPI_COUNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PPI_COUNT(/;"	d
bfin_write_PPI_COUNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PPI_COUNT(/;"	d
bfin_write_PPI_COUNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PPI_COUNT(/;"	d
bfin_write_PPI_COUNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PPI_COUNT(/;"	d
bfin_write_PPI_COUNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PPI_COUNT(/;"	d
bfin_write_PPI_COUNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PPI_COUNT(/;"	d
bfin_write_PPI_DELAY	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PPI_DELAY(/;"	d
bfin_write_PPI_DELAY	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PPI_DELAY(/;"	d
bfin_write_PPI_DELAY	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PPI_DELAY(/;"	d
bfin_write_PPI_DELAY	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PPI_DELAY(/;"	d
bfin_write_PPI_DELAY	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PPI_DELAY(/;"	d
bfin_write_PPI_DELAY	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PPI_DELAY(/;"	d
bfin_write_PPI_FRAME	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PPI_FRAME(/;"	d
bfin_write_PPI_FRAME	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PPI_FRAME(/;"	d
bfin_write_PPI_FRAME	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PPI_FRAME(/;"	d
bfin_write_PPI_FRAME	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PPI_FRAME(/;"	d
bfin_write_PPI_FRAME	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PPI_FRAME(/;"	d
bfin_write_PPI_FRAME	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PPI_FRAME(/;"	d
bfin_write_PPI_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PPI_STATUS(/;"	d
bfin_write_PPI_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PPI_STATUS(/;"	d
bfin_write_PPI_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_PPI_STATUS(/;"	d
bfin_write_PPI_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_PPI_STATUS(/;"	d
bfin_write_PPI_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_PPI_STATUS(/;"	d
bfin_write_PPI_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_PPI_STATUS(/;"	d
bfin_write_PWM0_CHA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CHA(/;"	d
bfin_write_PWM0_CHAL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CHAL(/;"	d
bfin_write_PWM0_CHB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CHB(/;"	d
bfin_write_PWM0_CHBL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CHBL(/;"	d
bfin_write_PWM0_CHC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CHC(/;"	d
bfin_write_PWM0_CHCL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CHCL(/;"	d
bfin_write_PWM0_CTRL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_CTRL(/;"	d
bfin_write_PWM0_DT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_DT(/;"	d
bfin_write_PWM0_GATE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_GATE(/;"	d
bfin_write_PWM0_LSI	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_LSI(/;"	d
bfin_write_PWM0_SEG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_SEG(/;"	d
bfin_write_PWM0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_STAT(/;"	d
bfin_write_PWM0_STAT2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_STAT2(/;"	d
bfin_write_PWM0_SYNCWT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_SYNCWT(/;"	d
bfin_write_PWM0_TM	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM0_TM(/;"	d
bfin_write_PWM1_CHA	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CHA(/;"	d
bfin_write_PWM1_CHAL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CHAL(/;"	d
bfin_write_PWM1_CHB	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CHB(/;"	d
bfin_write_PWM1_CHBL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CHBL(/;"	d
bfin_write_PWM1_CHC	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CHC(/;"	d
bfin_write_PWM1_CHCL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CHCL(/;"	d
bfin_write_PWM1_CTRL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_CTRL(/;"	d
bfin_write_PWM1_DT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_DT(/;"	d
bfin_write_PWM1_GATE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_GATE(/;"	d
bfin_write_PWM1_LSI	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_LSI(/;"	d
bfin_write_PWM1_SEG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_SEG(/;"	d
bfin_write_PWM1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_STAT(/;"	d
bfin_write_PWM1_STAT2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_STAT2(/;"	d
bfin_write_PWM1_SYNCWT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_SYNCWT(/;"	d
bfin_write_PWM1_TM	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_PWM1_TM(/;"	d
bfin_write_PWM_CHA	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CHA(/;"	d
bfin_write_PWM_CHAL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CHAL(/;"	d
bfin_write_PWM_CHB	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CHB(/;"	d
bfin_write_PWM_CHBL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CHBL(/;"	d
bfin_write_PWM_CHC	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CHC(/;"	d
bfin_write_PWM_CHCL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CHCL(/;"	d
bfin_write_PWM_CTRL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_CTRL(/;"	d
bfin_write_PWM_DT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_DT(/;"	d
bfin_write_PWM_GATE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_GATE(/;"	d
bfin_write_PWM_LSI	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_LSI(/;"	d
bfin_write_PWM_SEG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_SEG(/;"	d
bfin_write_PWM_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_STAT(/;"	d
bfin_write_PWM_STAT2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_STAT2(/;"	d
bfin_write_PWM_SYNCWT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_SYNCWT(/;"	d
bfin_write_PWM_TM	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_PWM_TM(/;"	d
bfin_write_RCU0_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RCU0_CTL(/;"	d
bfin_write_RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_ARGUMENT(/;"	d
bfin_write_RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_ARGUMENT(/;"	d
bfin_write_RSI_ARGUMENT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_ARGUMENT(/;"	d
bfin_write_RSI_BLKSZ	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_BLKSZ(/;"	d
bfin_write_RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_CEATA_CONTROL(/;"	d
bfin_write_RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_CEATA_CONTROL(/;"	d
bfin_write_RSI_CEATA_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_CEATA_CONTROL(/;"	d
bfin_write_RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_CLK_CONTROL(/;"	d
bfin_write_RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_CLK_CONTROL(/;"	d
bfin_write_RSI_CLK_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_CLK_CONTROL(/;"	d
bfin_write_RSI_COMMAND	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_COMMAND(/;"	d
bfin_write_RSI_COMMAND	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_COMMAND(/;"	d
bfin_write_RSI_COMMAND	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_COMMAND(/;"	d
bfin_write_RSI_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_CONFIG(/;"	d
bfin_write_RSI_CONFIG	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_CONFIG(/;"	d
bfin_write_RSI_CONFIG	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_CONFIG(/;"	d
bfin_write_RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_DATA_CNT(/;"	d
bfin_write_RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_DATA_CNT(/;"	d
bfin_write_RSI_DATA_CNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_DATA_CNT(/;"	d
bfin_write_RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_DATA_CONTROL(/;"	d
bfin_write_RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_DATA_CONTROL(/;"	d
bfin_write_RSI_DATA_CONTROL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_DATA_CONTROL(/;"	d
bfin_write_RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_DATA_LGTH(/;"	d
bfin_write_RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_DATA_LGTH(/;"	d
bfin_write_RSI_DATA_LGTH	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_DATA_LGTH(/;"	d
bfin_write_RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_DATA_TIMER(/;"	d
bfin_write_RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_DATA_TIMER(/;"	d
bfin_write_RSI_DATA_TIMER	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_DATA_TIMER(/;"	d
bfin_write_RSI_EMASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_EMASK(/;"	d
bfin_write_RSI_EMASK	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_EMASK(/;"	d
bfin_write_RSI_EMASK	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_EMASK(/;"	d
bfin_write_RSI_ESTAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_ESTAT(/;"	d
bfin_write_RSI_ESTAT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_ESTAT(/;"	d
bfin_write_RSI_ESTAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_ESTAT(/;"	d
bfin_write_RSI_FIFO	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_FIFO(/;"	d
bfin_write_RSI_FIFO	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_FIFO(/;"	d
bfin_write_RSI_FIFO	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_FIFO(/;"	d
bfin_write_RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_FIFO_CNT(/;"	d
bfin_write_RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_FIFO_CNT(/;"	d
bfin_write_RSI_FIFO_CNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_FIFO_CNT(/;"	d
bfin_write_RSI_MASK0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_MASK0(/;"	d
bfin_write_RSI_MASK0	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_MASK0(/;"	d
bfin_write_RSI_MASK0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_MASK0(/;"	d
bfin_write_RSI_MASK1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_MASK1(/;"	d
bfin_write_RSI_MASK1	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_MASK1(/;"	d
bfin_write_RSI_MASK1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_MASK1(/;"	d
bfin_write_RSI_PID0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_PID0(/;"	d
bfin_write_RSI_PID0	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_PID0(/;"	d
bfin_write_RSI_PID0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_PID0(/;"	d
bfin_write_RSI_PID1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_PID1(/;"	d
bfin_write_RSI_PID1	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_PID1(/;"	d
bfin_write_RSI_PID1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_PID1(/;"	d
bfin_write_RSI_PID2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_PID2(/;"	d
bfin_write_RSI_PID2	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_PID2(/;"	d
bfin_write_RSI_PID2	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_PID2(/;"	d
bfin_write_RSI_PID3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_PID3(/;"	d
bfin_write_RSI_PID3	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_PID3(/;"	d
bfin_write_RSI_PID3	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_PID3(/;"	d
bfin_write_RSI_PWR_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_PWR_CONTROL(/;"	d
bfin_write_RSI_PWR_CONTROL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_PWR_CONTROL(/;"	d
bfin_write_RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_RD_WAIT_EN(/;"	d
bfin_write_RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_RD_WAIT_EN(/;"	d
bfin_write_RSI_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_RD_WAIT_EN(/;"	d
bfin_write_RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_RESPONSE0(/;"	d
bfin_write_RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_RESPONSE0(/;"	d
bfin_write_RSI_RESPONSE0	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_RESPONSE0(/;"	d
bfin_write_RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_RESPONSE1(/;"	d
bfin_write_RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_RESPONSE1(/;"	d
bfin_write_RSI_RESPONSE1	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_RESPONSE1(/;"	d
bfin_write_RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_RESPONSE2(/;"	d
bfin_write_RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_RESPONSE2(/;"	d
bfin_write_RSI_RESPONSE2	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_RESPONSE2(/;"	d
bfin_write_RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_RESPONSE3(/;"	d
bfin_write_RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_RESPONSE3(/;"	d
bfin_write_RSI_RESPONSE3	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_RESPONSE3(/;"	d
bfin_write_RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_RESP_CMD(/;"	d
bfin_write_RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_RESP_CMD(/;"	d
bfin_write_RSI_RESP_CMD	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_RESP_CMD(/;"	d
bfin_write_RSI_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_STATUS(/;"	d
bfin_write_RSI_STATUS	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_STATUS(/;"	d
bfin_write_RSI_STATUS	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_STATUS(/;"	d
bfin_write_RSI_STATUSCL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_RSI_STATUSCL(/;"	d
bfin_write_RSI_STATUSCL	arch/blackfin/include/asm/mach-bf518/BF514_cdef.h	/^#define bfin_write_RSI_STATUSCL(/;"	d
bfin_write_RSI_STATUSCL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_RSI_STATUSCL(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ALARM	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_RTC_ALARM(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ICTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_RTC_ICTL(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_ISTAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_RTC_ISTAT(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_PREN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_RTC_PREN(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_RTC_STAT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_RTC_SWCNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_RTC_SWCNT(/;"	d
bfin_write_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_ARGUMENT(/;"	d
bfin_write_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_ARGUMENT(/;"	d
bfin_write_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_ARGUMENT(/;"	d
bfin_write_SDH_ARGUMENT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_ARGUMENT(/;"	d
bfin_write_SDH_ARGUMENT	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_ARGUMENT	/;"	d	file:
bfin_write_SDH_BLK_SIZE	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_BLK_SIZE	/;"	d	file:
bfin_write_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_CFG(/;"	d
bfin_write_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_CFG(/;"	d
bfin_write_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_CFG(/;"	d
bfin_write_SDH_CFG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_CFG(/;"	d
bfin_write_SDH_CFG	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_CFG	/;"	d	file:
bfin_write_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_CLK_CTL(/;"	d
bfin_write_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_CLK_CTL(/;"	d
bfin_write_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_CLK_CTL(/;"	d
bfin_write_SDH_CLK_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_CLK_CTL(/;"	d
bfin_write_SDH_CLK_CTL	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_CLK_CTL	/;"	d	file:
bfin_write_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_COMMAND(/;"	d
bfin_write_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_COMMAND(/;"	d
bfin_write_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_COMMAND(/;"	d
bfin_write_SDH_COMMAND	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_COMMAND(/;"	d
bfin_write_SDH_COMMAND	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_COMMAND	/;"	d	file:
bfin_write_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_DATA_CNT(/;"	d
bfin_write_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_DATA_CNT(/;"	d
bfin_write_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_DATA_CNT(/;"	d
bfin_write_SDH_DATA_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_DATA_CNT(/;"	d
bfin_write_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_DATA_CTL(/;"	d
bfin_write_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_DATA_CTL(/;"	d
bfin_write_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_DATA_CTL(/;"	d
bfin_write_SDH_DATA_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_DATA_CTL(/;"	d
bfin_write_SDH_DATA_CTL	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_DATA_CTL	/;"	d	file:
bfin_write_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_DATA_LGTH(/;"	d
bfin_write_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_DATA_LGTH(/;"	d
bfin_write_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_DATA_LGTH(/;"	d
bfin_write_SDH_DATA_LGTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_DATA_LGTH(/;"	d
bfin_write_SDH_DATA_LGTH	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_DATA_LGTH	/;"	d	file:
bfin_write_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_DATA_TIMER(/;"	d
bfin_write_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_DATA_TIMER(/;"	d
bfin_write_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_DATA_TIMER(/;"	d
bfin_write_SDH_DATA_TIMER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_DATA_TIMER(/;"	d
bfin_write_SDH_DATA_TIMER	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_DATA_TIMER	/;"	d	file:
bfin_write_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_E_MASK(/;"	d
bfin_write_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_E_MASK(/;"	d
bfin_write_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_E_MASK(/;"	d
bfin_write_SDH_E_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_E_MASK(/;"	d
bfin_write_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_E_STATUS(/;"	d
bfin_write_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_E_STATUS(/;"	d
bfin_write_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_E_STATUS(/;"	d
bfin_write_SDH_E_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_E_STATUS(/;"	d
bfin_write_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_FIFO(/;"	d
bfin_write_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_FIFO(/;"	d
bfin_write_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_FIFO(/;"	d
bfin_write_SDH_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_FIFO(/;"	d
bfin_write_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_FIFO_CNT(/;"	d
bfin_write_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_FIFO_CNT(/;"	d
bfin_write_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_FIFO_CNT(/;"	d
bfin_write_SDH_FIFO_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_FIFO_CNT(/;"	d
bfin_write_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_MASK0(/;"	d
bfin_write_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_MASK0(/;"	d
bfin_write_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_MASK0(/;"	d
bfin_write_SDH_MASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_MASK0(/;"	d
bfin_write_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_MASK1(/;"	d
bfin_write_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_MASK1(/;"	d
bfin_write_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_MASK1(/;"	d
bfin_write_SDH_MASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_MASK1(/;"	d
bfin_write_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID0(/;"	d
bfin_write_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID0(/;"	d
bfin_write_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID0(/;"	d
bfin_write_SDH_PID0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID0(/;"	d
bfin_write_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID1(/;"	d
bfin_write_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID1(/;"	d
bfin_write_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID1(/;"	d
bfin_write_SDH_PID1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID1(/;"	d
bfin_write_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID2(/;"	d
bfin_write_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID2(/;"	d
bfin_write_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID2(/;"	d
bfin_write_SDH_PID2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID2(/;"	d
bfin_write_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID3(/;"	d
bfin_write_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID3(/;"	d
bfin_write_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID3(/;"	d
bfin_write_SDH_PID3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID3(/;"	d
bfin_write_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID4(/;"	d
bfin_write_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID4(/;"	d
bfin_write_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID4(/;"	d
bfin_write_SDH_PID4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID4(/;"	d
bfin_write_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID5(/;"	d
bfin_write_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID5(/;"	d
bfin_write_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID5(/;"	d
bfin_write_SDH_PID5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID5(/;"	d
bfin_write_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID6(/;"	d
bfin_write_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID6(/;"	d
bfin_write_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID6(/;"	d
bfin_write_SDH_PID6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID6(/;"	d
bfin_write_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PID7(/;"	d
bfin_write_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PID7(/;"	d
bfin_write_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PID7(/;"	d
bfin_write_SDH_PID7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PID7(/;"	d
bfin_write_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_PWR_CTL(/;"	d
bfin_write_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_PWR_CTL(/;"	d
bfin_write_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_PWR_CTL(/;"	d
bfin_write_SDH_PWR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_PWR_CTL(/;"	d
bfin_write_SDH_PWR_CTL	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_PWR_CTL	/;"	d	file:
bfin_write_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_RD_WAIT_EN(/;"	d
bfin_write_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_RD_WAIT_EN(/;"	d
bfin_write_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_RD_WAIT_EN(/;"	d
bfin_write_SDH_RD_WAIT_EN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_RD_WAIT_EN(/;"	d
bfin_write_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE0(/;"	d
bfin_write_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE0(/;"	d
bfin_write_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE0(/;"	d
bfin_write_SDH_RESPONSE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE0(/;"	d
bfin_write_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE1(/;"	d
bfin_write_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE1(/;"	d
bfin_write_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE1(/;"	d
bfin_write_SDH_RESPONSE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE1(/;"	d
bfin_write_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE2(/;"	d
bfin_write_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE2(/;"	d
bfin_write_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE2(/;"	d
bfin_write_SDH_RESPONSE2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE2(/;"	d
bfin_write_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE3(/;"	d
bfin_write_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE3(/;"	d
bfin_write_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE3(/;"	d
bfin_write_SDH_RESPONSE3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_RESPONSE3(/;"	d
bfin_write_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_RESP_CMD(/;"	d
bfin_write_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_RESP_CMD(/;"	d
bfin_write_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_RESP_CMD(/;"	d
bfin_write_SDH_RESP_CMD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_RESP_CMD(/;"	d
bfin_write_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_STATUS(/;"	d
bfin_write_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_STATUS(/;"	d
bfin_write_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_STATUS(/;"	d
bfin_write_SDH_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_STATUS(/;"	d
bfin_write_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SDH_STATUS_CLR(/;"	d
bfin_write_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SDH_STATUS_CLR(/;"	d
bfin_write_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SDH_STATUS_CLR(/;"	d
bfin_write_SDH_STATUS_CLR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SDH_STATUS_CLR(/;"	d
bfin_write_SDH_STATUS_CLR	drivers/mmc/bfin_sdh.c	/^# define bfin_write_SDH_STATUS_CLR /;"	d	file:
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SECURE_CONTROL(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_STATUS	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SECURE_STATUS(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SECURE_SYSSWT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SECURE_SYSSWT(/;"	d
bfin_write_SEC_CCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SEC_CCTL(/;"	d
bfin_write_SEC_FCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SEC_FCTL(/;"	d
bfin_write_SEC_GCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SEC_GCTL(/;"	d
bfin_write_SEC_SCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SEC_SCTL(/;"	d
bfin_write_SICA_IAR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR0(/;"	d
bfin_write_SICA_IAR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR1(/;"	d
bfin_write_SICA_IAR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR2(/;"	d
bfin_write_SICA_IAR3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR3(/;"	d
bfin_write_SICA_IAR4	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR4(/;"	d
bfin_write_SICA_IAR5	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR5(/;"	d
bfin_write_SICA_IAR6	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR6(/;"	d
bfin_write_SICA_IAR7	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IAR7(/;"	d
bfin_write_SICA_IMASK0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IMASK0(/;"	d
bfin_write_SICA_IMASK1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IMASK1(/;"	d
bfin_write_SICA_ISR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_ISR0(/;"	d
bfin_write_SICA_ISR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_ISR1(/;"	d
bfin_write_SICA_IWR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IWR0(/;"	d
bfin_write_SICA_IWR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_IWR1(/;"	d
bfin_write_SICA_RVECT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_RVECT(/;"	d
bfin_write_SICA_SWRST	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_SWRST(/;"	d
bfin_write_SICA_SYSCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICA_SYSCR(/;"	d
bfin_write_SICB_IAR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR0(/;"	d
bfin_write_SICB_IAR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR1(/;"	d
bfin_write_SICB_IAR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR2(/;"	d
bfin_write_SICB_IAR3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR3(/;"	d
bfin_write_SICB_IAR4	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR4(/;"	d
bfin_write_SICB_IAR5	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR5(/;"	d
bfin_write_SICB_IAR6	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR6(/;"	d
bfin_write_SICB_IAR7	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IAR7(/;"	d
bfin_write_SICB_IMASK0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IMASK0(/;"	d
bfin_write_SICB_IMASK1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IMASK1(/;"	d
bfin_write_SICB_ISR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_ISR0(/;"	d
bfin_write_SICB_ISR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_ISR1(/;"	d
bfin_write_SICB_IWR0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IWR0(/;"	d
bfin_write_SICB_IWR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_IWR1(/;"	d
bfin_write_SICB_RVECT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_RVECT(/;"	d
bfin_write_SICB_SWRST	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_SWRST(/;"	d
bfin_write_SICB_SYSCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SICB_SYSCR(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR0(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR1(/;"	d
bfin_write_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR10(/;"	d
bfin_write_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR10(/;"	d
bfin_write_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR10(/;"	d
bfin_write_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR10(/;"	d
bfin_write_SIC_IAR10	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR10(/;"	d
bfin_write_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR11(/;"	d
bfin_write_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR11(/;"	d
bfin_write_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR11(/;"	d
bfin_write_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR11(/;"	d
bfin_write_SIC_IAR11	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR11(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR2(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR3(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR4	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR4(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR5	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR5(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR6	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR6(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR7	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR7(/;"	d
bfin_write_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR8(/;"	d
bfin_write_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR8(/;"	d
bfin_write_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR8(/;"	d
bfin_write_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR8(/;"	d
bfin_write_SIC_IAR8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR8(/;"	d
bfin_write_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IAR9(/;"	d
bfin_write_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IAR9(/;"	d
bfin_write_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IAR9(/;"	d
bfin_write_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IAR9(/;"	d
bfin_write_SIC_IAR9	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IAR9(/;"	d
bfin_write_SIC_IMASK	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_IMASK(/;"	d
bfin_write_SIC_IMASK	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_IMASK(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IMASK0(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IMASK1(/;"	d
bfin_write_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IMASK2(/;"	d
bfin_write_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IMASK2(/;"	d
bfin_write_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IMASK2(/;"	d
bfin_write_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IMASK2(/;"	d
bfin_write_SIC_IMASK2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IMASK2(/;"	d
bfin_write_SIC_ISR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_ISR(/;"	d
bfin_write_SIC_ISR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_ISR(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_ISR0(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_ISR1(/;"	d
bfin_write_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_ISR2(/;"	d
bfin_write_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_ISR2(/;"	d
bfin_write_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_ISR2(/;"	d
bfin_write_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_ISR2(/;"	d
bfin_write_SIC_ISR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_ISR2(/;"	d
bfin_write_SIC_IWR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_IWR(/;"	d
bfin_write_SIC_IWR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_IWR(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IWR0(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IWR1(/;"	d
bfin_write_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SIC_IWR2(/;"	d
bfin_write_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SIC_IWR2(/;"	d
bfin_write_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SIC_IWR2(/;"	d
bfin_write_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SIC_IWR2(/;"	d
bfin_write_SIC_IWR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SIC_IWR2(/;"	d
bfin_write_SIC_RVECT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SIC_RVECT(/;"	d
bfin_write_SIC_RVECT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SIC_RVECT(/;"	d
bfin_write_SIC_RVECT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SIC_RVECT(/;"	d
bfin_write_SIC_RVECT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SIC_RVECT(/;"	d
bfin_write_SIC_RVECT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SIC_RVECT(/;"	d
bfin_write_SMC_B0CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B0CTL(/;"	d
bfin_write_SMC_B0ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B0ETIM(/;"	d
bfin_write_SMC_B0TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B0TIM(/;"	d
bfin_write_SMC_B1CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B1CTL(/;"	d
bfin_write_SMC_B1ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B1ETIM(/;"	d
bfin_write_SMC_B1TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B1TIM(/;"	d
bfin_write_SMC_B2CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B2CTL(/;"	d
bfin_write_SMC_B2ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B2ETIM(/;"	d
bfin_write_SMC_B2TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B2TIM(/;"	d
bfin_write_SMC_B3CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B3CTL(/;"	d
bfin_write_SMC_B3ETIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B3ETIM(/;"	d
bfin_write_SMC_B3TIM	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_B3TIM(/;"	d
bfin_write_SMC_GCTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SMC_GCTL(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_BAUD(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_CTL(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_FLG(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_RDBR(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_SHADOW(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_STAT(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI0_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI0_TDBR(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_BAUD(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_CTL(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_FLG(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_RDBR(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_SHADOW(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_STAT(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI1_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI1_TDBR(/;"	d
bfin_write_SPI2_BAUD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_BAUD(/;"	d
bfin_write_SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_BAUD(/;"	d
bfin_write_SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_BAUD(/;"	d
bfin_write_SPI2_BAUD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_BAUD(/;"	d
bfin_write_SPI2_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_CTL(/;"	d
bfin_write_SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_CTL(/;"	d
bfin_write_SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_CTL(/;"	d
bfin_write_SPI2_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_CTL(/;"	d
bfin_write_SPI2_FLG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_FLG(/;"	d
bfin_write_SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_FLG(/;"	d
bfin_write_SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_FLG(/;"	d
bfin_write_SPI2_FLG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_FLG(/;"	d
bfin_write_SPI2_RDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_RDBR(/;"	d
bfin_write_SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_RDBR(/;"	d
bfin_write_SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_RDBR(/;"	d
bfin_write_SPI2_RDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_RDBR(/;"	d
bfin_write_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_SHADOW(/;"	d
bfin_write_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_SHADOW(/;"	d
bfin_write_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_SHADOW(/;"	d
bfin_write_SPI2_SHADOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_SHADOW(/;"	d
bfin_write_SPI2_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_STAT(/;"	d
bfin_write_SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_STAT(/;"	d
bfin_write_SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_STAT(/;"	d
bfin_write_SPI2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_STAT(/;"	d
bfin_write_SPI2_TDBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPI2_TDBR(/;"	d
bfin_write_SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPI2_TDBR(/;"	d
bfin_write_SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPI2_TDBR(/;"	d
bfin_write_SPI2_TDBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPI2_TDBR(/;"	d
bfin_write_SPI_BAUD	arch/blackfin/cpu/initcode.c	/^# define bfin_write_SPI_BAUD /;"	d	file:
bfin_write_SPI_BAUD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_BAUD(/;"	d
bfin_write_SPI_BAUD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_BAUD(/;"	d
bfin_write_SPI_BAUD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_BAUD(/;"	d
bfin_write_SPI_BAUD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_BAUD(/;"	d
bfin_write_SPI_BAUD	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_SPI_BAUD(/;"	d
bfin_write_SPI_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_CTL(/;"	d
bfin_write_SPI_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_CTL(/;"	d
bfin_write_SPI_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_CTL(/;"	d
bfin_write_SPI_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_CTL(/;"	d
bfin_write_SPI_FLG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_FLG(/;"	d
bfin_write_SPI_FLG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_FLG(/;"	d
bfin_write_SPI_FLG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_FLG(/;"	d
bfin_write_SPI_FLG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_FLG(/;"	d
bfin_write_SPI_RDBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_RDBR(/;"	d
bfin_write_SPI_RDBR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_RDBR(/;"	d
bfin_write_SPI_RDBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_RDBR(/;"	d
bfin_write_SPI_RDBR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_RDBR(/;"	d
bfin_write_SPI_SHADOW	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_SHADOW(/;"	d
bfin_write_SPI_SHADOW	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_SHADOW(/;"	d
bfin_write_SPI_SHADOW	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_SHADOW(/;"	d
bfin_write_SPI_SHADOW	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_SHADOW(/;"	d
bfin_write_SPI_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_STAT(/;"	d
bfin_write_SPI_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_STAT(/;"	d
bfin_write_SPI_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_STAT(/;"	d
bfin_write_SPI_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_STAT(/;"	d
bfin_write_SPI_TDBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPI_TDBR(/;"	d
bfin_write_SPI_TDBR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPI_TDBR(/;"	d
bfin_write_SPI_TDBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPI_TDBR(/;"	d
bfin_write_SPI_TDBR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPI_TDBR(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_CHNL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_CHNL(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MCMC1(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MCMC2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MCMC2(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MRCS0(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MRCS1(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MRCS2(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MRCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MRCS3(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MTCS0(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MTCS1(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MTCS2(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_MTCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_MTCS3(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_RCLKDIV(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_RCR1(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_RCR2(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_RFSDIV(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_RX	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_RX(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_STAT(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_TCLKDIV(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_TCR1(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_TCR2(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_TFSDIV(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT0_TX	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT0_TX(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_CHNL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_CHNL(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MCMC1(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MCMC2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MCMC2(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MRCS0(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MRCS1(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MRCS2(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MRCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MRCS3(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS0	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MTCS0(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MTCS1(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MTCS2(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_MTCS3	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_MTCS3(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_RCLKDIV(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_RCR1(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_RCR2(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_RFSDIV(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_RX	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_RX(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_STAT(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCLKDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_TCLKDIV(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR1	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_TCR1(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TCR2	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_TCR2(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TFSDIV	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_TFSDIV(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT1_TX	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_SPORT1_TX(/;"	d
bfin_write_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_CHNL(/;"	d
bfin_write_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_CHNL(/;"	d
bfin_write_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_CHNL(/;"	d
bfin_write_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_CHNL(/;"	d
bfin_write_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_CHNL(/;"	d
bfin_write_SPORT2_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_CHNL(/;"	d
bfin_write_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MCMC1(/;"	d
bfin_write_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC1(/;"	d
bfin_write_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC1(/;"	d
bfin_write_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC1(/;"	d
bfin_write_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC1(/;"	d
bfin_write_SPORT2_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC1(/;"	d
bfin_write_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MCMC2(/;"	d
bfin_write_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC2(/;"	d
bfin_write_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC2(/;"	d
bfin_write_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC2(/;"	d
bfin_write_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC2(/;"	d
bfin_write_SPORT2_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MCMC2(/;"	d
bfin_write_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MRCS0(/;"	d
bfin_write_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS0(/;"	d
bfin_write_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS0(/;"	d
bfin_write_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS0(/;"	d
bfin_write_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS0(/;"	d
bfin_write_SPORT2_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS0(/;"	d
bfin_write_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MRCS1(/;"	d
bfin_write_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS1(/;"	d
bfin_write_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS1(/;"	d
bfin_write_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS1(/;"	d
bfin_write_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS1(/;"	d
bfin_write_SPORT2_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS1(/;"	d
bfin_write_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MRCS2(/;"	d
bfin_write_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS2(/;"	d
bfin_write_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS2(/;"	d
bfin_write_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS2(/;"	d
bfin_write_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS2(/;"	d
bfin_write_SPORT2_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS2(/;"	d
bfin_write_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MRCS3(/;"	d
bfin_write_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS3(/;"	d
bfin_write_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS3(/;"	d
bfin_write_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS3(/;"	d
bfin_write_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS3(/;"	d
bfin_write_SPORT2_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MRCS3(/;"	d
bfin_write_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MTCS0(/;"	d
bfin_write_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS0(/;"	d
bfin_write_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS0(/;"	d
bfin_write_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS0(/;"	d
bfin_write_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS0(/;"	d
bfin_write_SPORT2_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS0(/;"	d
bfin_write_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MTCS1(/;"	d
bfin_write_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS1(/;"	d
bfin_write_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS1(/;"	d
bfin_write_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS1(/;"	d
bfin_write_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS1(/;"	d
bfin_write_SPORT2_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS1(/;"	d
bfin_write_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MTCS2(/;"	d
bfin_write_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS2(/;"	d
bfin_write_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS2(/;"	d
bfin_write_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS2(/;"	d
bfin_write_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS2(/;"	d
bfin_write_SPORT2_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS2(/;"	d
bfin_write_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_MTCS3(/;"	d
bfin_write_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS3(/;"	d
bfin_write_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS3(/;"	d
bfin_write_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS3(/;"	d
bfin_write_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS3(/;"	d
bfin_write_SPORT2_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_MTCS3(/;"	d
bfin_write_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_RCLKDIV(/;"	d
bfin_write_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_RCLKDIV(/;"	d
bfin_write_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_RCLKDIV(/;"	d
bfin_write_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_RCLKDIV(/;"	d
bfin_write_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_RCLKDIV(/;"	d
bfin_write_SPORT2_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_RCLKDIV(/;"	d
bfin_write_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_RCR1(/;"	d
bfin_write_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_RCR1(/;"	d
bfin_write_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_RCR1(/;"	d
bfin_write_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_RCR1(/;"	d
bfin_write_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_RCR1(/;"	d
bfin_write_SPORT2_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_RCR1(/;"	d
bfin_write_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_RCR2(/;"	d
bfin_write_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_RCR2(/;"	d
bfin_write_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_RCR2(/;"	d
bfin_write_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_RCR2(/;"	d
bfin_write_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_RCR2(/;"	d
bfin_write_SPORT2_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_RCR2(/;"	d
bfin_write_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_RFSDIV(/;"	d
bfin_write_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_RFSDIV(/;"	d
bfin_write_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_RFSDIV(/;"	d
bfin_write_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_RFSDIV(/;"	d
bfin_write_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_RFSDIV(/;"	d
bfin_write_SPORT2_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_RFSDIV(/;"	d
bfin_write_SPORT2_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_RX(/;"	d
bfin_write_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_RX(/;"	d
bfin_write_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_RX(/;"	d
bfin_write_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_RX(/;"	d
bfin_write_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_RX(/;"	d
bfin_write_SPORT2_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_RX(/;"	d
bfin_write_SPORT2_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_STAT(/;"	d
bfin_write_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_STAT(/;"	d
bfin_write_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_STAT(/;"	d
bfin_write_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_STAT(/;"	d
bfin_write_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_STAT(/;"	d
bfin_write_SPORT2_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_STAT(/;"	d
bfin_write_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_TCLKDIV(/;"	d
bfin_write_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_TCLKDIV(/;"	d
bfin_write_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_TCLKDIV(/;"	d
bfin_write_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_TCLKDIV(/;"	d
bfin_write_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_TCLKDIV(/;"	d
bfin_write_SPORT2_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_TCLKDIV(/;"	d
bfin_write_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_TCR1(/;"	d
bfin_write_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_TCR1(/;"	d
bfin_write_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_TCR1(/;"	d
bfin_write_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_TCR1(/;"	d
bfin_write_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_TCR1(/;"	d
bfin_write_SPORT2_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_TCR1(/;"	d
bfin_write_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_TCR2(/;"	d
bfin_write_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_TCR2(/;"	d
bfin_write_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_TCR2(/;"	d
bfin_write_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_TCR2(/;"	d
bfin_write_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_TCR2(/;"	d
bfin_write_SPORT2_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_TCR2(/;"	d
bfin_write_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_TFSDIV(/;"	d
bfin_write_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_TFSDIV(/;"	d
bfin_write_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_TFSDIV(/;"	d
bfin_write_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_TFSDIV(/;"	d
bfin_write_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_TFSDIV(/;"	d
bfin_write_SPORT2_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_TFSDIV(/;"	d
bfin_write_SPORT2_TX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT2_TX(/;"	d
bfin_write_SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT2_TX(/;"	d
bfin_write_SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT2_TX(/;"	d
bfin_write_SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT2_TX(/;"	d
bfin_write_SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT2_TX(/;"	d
bfin_write_SPORT2_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT2_TX(/;"	d
bfin_write_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_CHNL(/;"	d
bfin_write_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_CHNL(/;"	d
bfin_write_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_CHNL(/;"	d
bfin_write_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_CHNL(/;"	d
bfin_write_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_CHNL(/;"	d
bfin_write_SPORT3_CHNL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_CHNL(/;"	d
bfin_write_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MCMC1(/;"	d
bfin_write_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC1(/;"	d
bfin_write_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC1(/;"	d
bfin_write_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC1(/;"	d
bfin_write_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC1(/;"	d
bfin_write_SPORT3_MCMC1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC1(/;"	d
bfin_write_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MCMC2(/;"	d
bfin_write_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC2(/;"	d
bfin_write_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC2(/;"	d
bfin_write_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC2(/;"	d
bfin_write_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC2(/;"	d
bfin_write_SPORT3_MCMC2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MCMC2(/;"	d
bfin_write_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MRCS0(/;"	d
bfin_write_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS0(/;"	d
bfin_write_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS0(/;"	d
bfin_write_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS0(/;"	d
bfin_write_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS0(/;"	d
bfin_write_SPORT3_MRCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS0(/;"	d
bfin_write_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MRCS1(/;"	d
bfin_write_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS1(/;"	d
bfin_write_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS1(/;"	d
bfin_write_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS1(/;"	d
bfin_write_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS1(/;"	d
bfin_write_SPORT3_MRCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS1(/;"	d
bfin_write_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MRCS2(/;"	d
bfin_write_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS2(/;"	d
bfin_write_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS2(/;"	d
bfin_write_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS2(/;"	d
bfin_write_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS2(/;"	d
bfin_write_SPORT3_MRCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS2(/;"	d
bfin_write_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MRCS3(/;"	d
bfin_write_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS3(/;"	d
bfin_write_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS3(/;"	d
bfin_write_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS3(/;"	d
bfin_write_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS3(/;"	d
bfin_write_SPORT3_MRCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MRCS3(/;"	d
bfin_write_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MTCS0(/;"	d
bfin_write_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS0(/;"	d
bfin_write_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS0(/;"	d
bfin_write_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS0(/;"	d
bfin_write_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS0(/;"	d
bfin_write_SPORT3_MTCS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS0(/;"	d
bfin_write_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MTCS1(/;"	d
bfin_write_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS1(/;"	d
bfin_write_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS1(/;"	d
bfin_write_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS1(/;"	d
bfin_write_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS1(/;"	d
bfin_write_SPORT3_MTCS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS1(/;"	d
bfin_write_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MTCS2(/;"	d
bfin_write_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS2(/;"	d
bfin_write_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS2(/;"	d
bfin_write_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS2(/;"	d
bfin_write_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS2(/;"	d
bfin_write_SPORT3_MTCS2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS2(/;"	d
bfin_write_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_MTCS3(/;"	d
bfin_write_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS3(/;"	d
bfin_write_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS3(/;"	d
bfin_write_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS3(/;"	d
bfin_write_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS3(/;"	d
bfin_write_SPORT3_MTCS3	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_MTCS3(/;"	d
bfin_write_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_RCLKDIV(/;"	d
bfin_write_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_RCLKDIV(/;"	d
bfin_write_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_RCLKDIV(/;"	d
bfin_write_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_RCLKDIV(/;"	d
bfin_write_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_RCLKDIV(/;"	d
bfin_write_SPORT3_RCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_RCLKDIV(/;"	d
bfin_write_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_RCR1(/;"	d
bfin_write_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_RCR1(/;"	d
bfin_write_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_RCR1(/;"	d
bfin_write_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_RCR1(/;"	d
bfin_write_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_RCR1(/;"	d
bfin_write_SPORT3_RCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_RCR1(/;"	d
bfin_write_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_RCR2(/;"	d
bfin_write_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_RCR2(/;"	d
bfin_write_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_RCR2(/;"	d
bfin_write_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_RCR2(/;"	d
bfin_write_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_RCR2(/;"	d
bfin_write_SPORT3_RCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_RCR2(/;"	d
bfin_write_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_RFSDIV(/;"	d
bfin_write_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_RFSDIV(/;"	d
bfin_write_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_RFSDIV(/;"	d
bfin_write_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_RFSDIV(/;"	d
bfin_write_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_RFSDIV(/;"	d
bfin_write_SPORT3_RFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_RFSDIV(/;"	d
bfin_write_SPORT3_RX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_RX(/;"	d
bfin_write_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_RX(/;"	d
bfin_write_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_RX(/;"	d
bfin_write_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_RX(/;"	d
bfin_write_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_RX(/;"	d
bfin_write_SPORT3_RX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_RX(/;"	d
bfin_write_SPORT3_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_STAT(/;"	d
bfin_write_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_STAT(/;"	d
bfin_write_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_STAT(/;"	d
bfin_write_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_STAT(/;"	d
bfin_write_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_STAT(/;"	d
bfin_write_SPORT3_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_STAT(/;"	d
bfin_write_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_TCLKDIV(/;"	d
bfin_write_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_TCLKDIV(/;"	d
bfin_write_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_TCLKDIV(/;"	d
bfin_write_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_TCLKDIV(/;"	d
bfin_write_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_TCLKDIV(/;"	d
bfin_write_SPORT3_TCLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_TCLKDIV(/;"	d
bfin_write_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_TCR1(/;"	d
bfin_write_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_TCR1(/;"	d
bfin_write_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_TCR1(/;"	d
bfin_write_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_TCR1(/;"	d
bfin_write_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_TCR1(/;"	d
bfin_write_SPORT3_TCR1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_TCR1(/;"	d
bfin_write_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_TCR2(/;"	d
bfin_write_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_TCR2(/;"	d
bfin_write_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_TCR2(/;"	d
bfin_write_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_TCR2(/;"	d
bfin_write_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_TCR2(/;"	d
bfin_write_SPORT3_TCR2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_TCR2(/;"	d
bfin_write_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_TFSDIV(/;"	d
bfin_write_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_TFSDIV(/;"	d
bfin_write_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_TFSDIV(/;"	d
bfin_write_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_TFSDIV(/;"	d
bfin_write_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_TFSDIV(/;"	d
bfin_write_SPORT3_TFSDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_TFSDIV(/;"	d
bfin_write_SPORT3_TX	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SPORT3_TX(/;"	d
bfin_write_SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_SPORT3_TX(/;"	d
bfin_write_SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_SPORT3_TX(/;"	d
bfin_write_SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_SPORT3_TX(/;"	d
bfin_write_SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_SPORT3_TX(/;"	d
bfin_write_SPORT3_TX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_SPORT3_TX(/;"	d
bfin_write_SPT0_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_CHNL(/;"	d
bfin_write_SPT0_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MCMC1(/;"	d
bfin_write_SPT0_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MCMC2(/;"	d
bfin_write_SPT0_MRCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MRCS0(/;"	d
bfin_write_SPT0_MRCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MRCS1(/;"	d
bfin_write_SPT0_MRCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MRCS2(/;"	d
bfin_write_SPT0_MRCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MRCS3(/;"	d
bfin_write_SPT0_MTCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MTCS0(/;"	d
bfin_write_SPT0_MTCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MTCS1(/;"	d
bfin_write_SPT0_MTCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MTCS2(/;"	d
bfin_write_SPT0_MTCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_MTCS3(/;"	d
bfin_write_SPT0_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_RFSDIV(/;"	d
bfin_write_SPT0_RSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_RSCLKDIV(/;"	d
bfin_write_SPT0_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_RX(/;"	d
bfin_write_SPT0_RX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_RX_CONFIG0(/;"	d
bfin_write_SPT0_RX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_RX_CONFIG1(/;"	d
bfin_write_SPT0_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_STAT(/;"	d
bfin_write_SPT0_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_TFSDIV(/;"	d
bfin_write_SPT0_TSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_TSCLKDIV(/;"	d
bfin_write_SPT0_TX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_TX(/;"	d
bfin_write_SPT0_TX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_TX_CONFIG0(/;"	d
bfin_write_SPT0_TX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT0_TX_CONFIG1(/;"	d
bfin_write_SPT1_CHNL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_CHNL(/;"	d
bfin_write_SPT1_MCMC1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MCMC1(/;"	d
bfin_write_SPT1_MCMC2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MCMC2(/;"	d
bfin_write_SPT1_MRCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MRCS0(/;"	d
bfin_write_SPT1_MRCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MRCS1(/;"	d
bfin_write_SPT1_MRCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MRCS2(/;"	d
bfin_write_SPT1_MRCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MRCS3(/;"	d
bfin_write_SPT1_MTCS0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MTCS0(/;"	d
bfin_write_SPT1_MTCS1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MTCS1(/;"	d
bfin_write_SPT1_MTCS2	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MTCS2(/;"	d
bfin_write_SPT1_MTCS3	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_MTCS3(/;"	d
bfin_write_SPT1_RFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_RFSDIV(/;"	d
bfin_write_SPT1_RSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_RSCLKDIV(/;"	d
bfin_write_SPT1_RX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_RX(/;"	d
bfin_write_SPT1_RX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_RX_CONFIG0(/;"	d
bfin_write_SPT1_RX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_RX_CONFIG1(/;"	d
bfin_write_SPT1_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_STAT(/;"	d
bfin_write_SPT1_TFSDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_TFSDIV(/;"	d
bfin_write_SPT1_TSCLKDIV	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_TSCLKDIV(/;"	d
bfin_write_SPT1_TX	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_TX(/;"	d
bfin_write_SPT1_TX_CONFIG0	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_TX_CONFIG0(/;"	d
bfin_write_SPT1_TX_CONFIG1	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SPT1_TX_CONFIG1(/;"	d
bfin_write_SRAM_BASE_ADDR	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_SRAM_BASE_ADDR(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SWRST	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define bfin_write_SWRST(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf548/BF542_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf548/BF544_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf548/BF547_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf548/BF548_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf548/BF549_cdef.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_SYSCR	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define bfin_write_SYSCR(/;"	d
bfin_write_TBUF	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TBUF(/;"	d
bfin_write_TBUF	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TBUF(/;"	d
bfin_write_TBUFCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TBUFCTL(/;"	d
bfin_write_TBUFCTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TBUFCTL(/;"	d
bfin_write_TBUFSTAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TBUFSTAT(/;"	d
bfin_write_TBUFSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TBUFSTAT(/;"	d
bfin_write_TCNTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TCNTL(/;"	d
bfin_write_TCOUNT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TCOUNT(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER0_CONFIG(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER0_COUNTER(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER0_PERIOD(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER0_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER0_WIDTH(/;"	d
bfin_write_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER10_CONFIG(/;"	d
bfin_write_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER10_CONFIG(/;"	d
bfin_write_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER10_CONFIG(/;"	d
bfin_write_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER10_CONFIG(/;"	d
bfin_write_TIMER10_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER10_CONFIG(/;"	d
bfin_write_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER10_COUNTER(/;"	d
bfin_write_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER10_COUNTER(/;"	d
bfin_write_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER10_COUNTER(/;"	d
bfin_write_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER10_COUNTER(/;"	d
bfin_write_TIMER10_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER10_COUNTER(/;"	d
bfin_write_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER10_PERIOD(/;"	d
bfin_write_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER10_PERIOD(/;"	d
bfin_write_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER10_PERIOD(/;"	d
bfin_write_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER10_PERIOD(/;"	d
bfin_write_TIMER10_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER10_PERIOD(/;"	d
bfin_write_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER10_WIDTH(/;"	d
bfin_write_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER10_WIDTH(/;"	d
bfin_write_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER10_WIDTH(/;"	d
bfin_write_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER10_WIDTH(/;"	d
bfin_write_TIMER10_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER10_WIDTH(/;"	d
bfin_write_TIMER11_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER11_CONFIG(/;"	d
bfin_write_TIMER11_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER11_COUNTER(/;"	d
bfin_write_TIMER11_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER11_PERIOD(/;"	d
bfin_write_TIMER11_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER11_WIDTH(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER1_CONFIG(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER1_COUNTER(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER1_PERIOD(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER1_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER1_WIDTH(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER2_CONFIG(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER2_COUNTER(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER2_PERIOD(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER2_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER2_WIDTH(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER3_CONFIG(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER3_COUNTER(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER3_PERIOD(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER3_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER3_WIDTH(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER4_CONFIG(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER4_COUNTER(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER4_PERIOD(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER4_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER4_WIDTH(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER5_CONFIG(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER5_COUNTER(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER5_PERIOD(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER5_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER5_WIDTH(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER6_CONFIG(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER6_COUNTER(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER6_PERIOD(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER6_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER6_WIDTH(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER7_CONFIG(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER7_COUNTER(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER7_PERIOD(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER7_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER7_WIDTH(/;"	d
bfin_write_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER8_CONFIG(/;"	d
bfin_write_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER8_CONFIG(/;"	d
bfin_write_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER8_CONFIG(/;"	d
bfin_write_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER8_CONFIG(/;"	d
bfin_write_TIMER8_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER8_CONFIG(/;"	d
bfin_write_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER8_COUNTER(/;"	d
bfin_write_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER8_COUNTER(/;"	d
bfin_write_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER8_COUNTER(/;"	d
bfin_write_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER8_COUNTER(/;"	d
bfin_write_TIMER8_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER8_COUNTER(/;"	d
bfin_write_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER8_PERIOD(/;"	d
bfin_write_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER8_PERIOD(/;"	d
bfin_write_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER8_PERIOD(/;"	d
bfin_write_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER8_PERIOD(/;"	d
bfin_write_TIMER8_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER8_PERIOD(/;"	d
bfin_write_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER8_WIDTH(/;"	d
bfin_write_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER8_WIDTH(/;"	d
bfin_write_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER8_WIDTH(/;"	d
bfin_write_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER8_WIDTH(/;"	d
bfin_write_TIMER8_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER8_WIDTH(/;"	d
bfin_write_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER9_CONFIG(/;"	d
bfin_write_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER9_CONFIG(/;"	d
bfin_write_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER9_CONFIG(/;"	d
bfin_write_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER9_CONFIG(/;"	d
bfin_write_TIMER9_CONFIG	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER9_CONFIG(/;"	d
bfin_write_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER9_COUNTER(/;"	d
bfin_write_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER9_COUNTER(/;"	d
bfin_write_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER9_COUNTER(/;"	d
bfin_write_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER9_COUNTER(/;"	d
bfin_write_TIMER9_COUNTER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER9_COUNTER(/;"	d
bfin_write_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER9_PERIOD(/;"	d
bfin_write_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER9_PERIOD(/;"	d
bfin_write_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER9_PERIOD(/;"	d
bfin_write_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER9_PERIOD(/;"	d
bfin_write_TIMER9_PERIOD	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER9_PERIOD(/;"	d
bfin_write_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER9_WIDTH(/;"	d
bfin_write_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER9_WIDTH(/;"	d
bfin_write_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER9_WIDTH(/;"	d
bfin_write_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER9_WIDTH(/;"	d
bfin_write_TIMER9_WIDTH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TIMER9_WIDTH(/;"	d
bfin_write_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER_DISABLE(/;"	d
bfin_write_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER_DISABLE(/;"	d
bfin_write_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER_DISABLE(/;"	d
bfin_write_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER_DISABLE(/;"	d
bfin_write_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER_DISABLE(/;"	d
bfin_write_TIMER_DISABLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER_DISABLE(/;"	d
bfin_write_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE0(/;"	d
bfin_write_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE0(/;"	d
bfin_write_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE0(/;"	d
bfin_write_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE0(/;"	d
bfin_write_TIMER_DISABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE0(/;"	d
bfin_write_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE1(/;"	d
bfin_write_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE1(/;"	d
bfin_write_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE1(/;"	d
bfin_write_TIMER_DISABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER_DISABLE1(/;"	d
bfin_write_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER_ENABLE(/;"	d
bfin_write_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER_ENABLE(/;"	d
bfin_write_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER_ENABLE(/;"	d
bfin_write_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER_ENABLE(/;"	d
bfin_write_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER_ENABLE(/;"	d
bfin_write_TIMER_ENABLE	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER_ENABLE(/;"	d
bfin_write_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE0(/;"	d
bfin_write_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE0(/;"	d
bfin_write_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE0(/;"	d
bfin_write_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE0(/;"	d
bfin_write_TIMER_ENABLE0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE0(/;"	d
bfin_write_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE1(/;"	d
bfin_write_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE1(/;"	d
bfin_write_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE1(/;"	d
bfin_write_TIMER_ENABLE1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER_ENABLE1(/;"	d
bfin_write_TIMER_STATUS	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TIMER_STATUS(/;"	d
bfin_write_TIMER_STATUS	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TIMER_STATUS(/;"	d
bfin_write_TIMER_STATUS	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TIMER_STATUS(/;"	d
bfin_write_TIMER_STATUS	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_TIMER_STATUS(/;"	d
bfin_write_TIMER_STATUS	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TIMER_STATUS(/;"	d
bfin_write_TIMER_STATUS	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TIMER_STATUS(/;"	d
bfin_write_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TIMER_STATUS0(/;"	d
bfin_write_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER_STATUS0(/;"	d
bfin_write_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER_STATUS0(/;"	d
bfin_write_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER_STATUS0(/;"	d
bfin_write_TIMER_STATUS0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER_STATUS0(/;"	d
bfin_write_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TIMER_STATUS1(/;"	d
bfin_write_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TIMER_STATUS1(/;"	d
bfin_write_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TIMER_STATUS1(/;"	d
bfin_write_TIMER_STATUS1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TIMER_STATUS1(/;"	d
bfin_write_TMRS4_DISABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TMRS4_DISABLE(/;"	d
bfin_write_TMRS4_ENABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TMRS4_ENABLE(/;"	d
bfin_write_TMRS4_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TMRS4_STATUS(/;"	d
bfin_write_TMRS8_DISABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TMRS8_DISABLE(/;"	d
bfin_write_TMRS8_ENABLE	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TMRS8_ENABLE(/;"	d
bfin_write_TMRS8_STATUS	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_TMRS8_STATUS(/;"	d
bfin_write_TPERIOD	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TPERIOD(/;"	d
bfin_write_TSCALE	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_TSCALE(/;"	d
bfin_write_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_CLKDIV(/;"	d
bfin_write_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_CLKDIV(/;"	d
bfin_write_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_CLKDIV(/;"	d
bfin_write_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_CLKDIV(/;"	d
bfin_write_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_CLKDIV(/;"	d
bfin_write_TWI0_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_CLKDIV(/;"	d
bfin_write_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_CONTROL(/;"	d
bfin_write_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_CONTROL(/;"	d
bfin_write_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_CONTROL(/;"	d
bfin_write_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_CONTROL(/;"	d
bfin_write_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_CONTROL(/;"	d
bfin_write_TWI0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_CONTROL(/;"	d
bfin_write_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_FIFO_CTL(/;"	d
bfin_write_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_CTL(/;"	d
bfin_write_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_CTL(/;"	d
bfin_write_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_CTL(/;"	d
bfin_write_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_CTL(/;"	d
bfin_write_TWI0_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_CTL(/;"	d
bfin_write_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_FIFO_STAT(/;"	d
bfin_write_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_STAT(/;"	d
bfin_write_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_STAT(/;"	d
bfin_write_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_STAT(/;"	d
bfin_write_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_STAT(/;"	d
bfin_write_TWI0_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_FIFO_STAT(/;"	d
bfin_write_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_INT_MASK(/;"	d
bfin_write_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_INT_MASK(/;"	d
bfin_write_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_INT_MASK(/;"	d
bfin_write_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_INT_MASK(/;"	d
bfin_write_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_INT_MASK(/;"	d
bfin_write_TWI0_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_INT_MASK(/;"	d
bfin_write_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_INT_STAT(/;"	d
bfin_write_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_INT_STAT(/;"	d
bfin_write_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_INT_STAT(/;"	d
bfin_write_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_INT_STAT(/;"	d
bfin_write_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_INT_STAT(/;"	d
bfin_write_TWI0_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_INT_STAT(/;"	d
bfin_write_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_MASTER_ADDR(/;"	d
bfin_write_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_ADDR(/;"	d
bfin_write_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_ADDR(/;"	d
bfin_write_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_ADDR(/;"	d
bfin_write_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_ADDR(/;"	d
bfin_write_TWI0_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_ADDR(/;"	d
bfin_write_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_MASTER_CTL(/;"	d
bfin_write_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_CTL(/;"	d
bfin_write_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_CTL(/;"	d
bfin_write_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_CTL(/;"	d
bfin_write_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_CTL(/;"	d
bfin_write_TWI0_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_CTL(/;"	d
bfin_write_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_MASTER_STAT(/;"	d
bfin_write_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_STAT(/;"	d
bfin_write_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_STAT(/;"	d
bfin_write_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_STAT(/;"	d
bfin_write_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_STAT(/;"	d
bfin_write_TWI0_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_MASTER_STAT(/;"	d
bfin_write_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_RCV_DATA16(/;"	d
bfin_write_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA16(/;"	d
bfin_write_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA16(/;"	d
bfin_write_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA16(/;"	d
bfin_write_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA16(/;"	d
bfin_write_TWI0_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA16(/;"	d
bfin_write_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_RCV_DATA8(/;"	d
bfin_write_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA8(/;"	d
bfin_write_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA8(/;"	d
bfin_write_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA8(/;"	d
bfin_write_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA8(/;"	d
bfin_write_TWI0_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_RCV_DATA8(/;"	d
bfin_write_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_SLAVE_ADDR(/;"	d
bfin_write_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_ADDR(/;"	d
bfin_write_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_ADDR(/;"	d
bfin_write_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_ADDR(/;"	d
bfin_write_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_ADDR(/;"	d
bfin_write_TWI0_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_ADDR(/;"	d
bfin_write_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_CTL(/;"	d
bfin_write_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_CTL(/;"	d
bfin_write_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_CTL(/;"	d
bfin_write_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_CTL(/;"	d
bfin_write_TWI0_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_CTL(/;"	d
bfin_write_TWI0_SLAVE_CTRL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_SLAVE_CTRL(/;"	d
bfin_write_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_SLAVE_STAT(/;"	d
bfin_write_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_STAT(/;"	d
bfin_write_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_STAT(/;"	d
bfin_write_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_STAT(/;"	d
bfin_write_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_STAT(/;"	d
bfin_write_TWI0_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_SLAVE_STAT(/;"	d
bfin_write_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_XMT_DATA16(/;"	d
bfin_write_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA16(/;"	d
bfin_write_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA16(/;"	d
bfin_write_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA16(/;"	d
bfin_write_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA16(/;"	d
bfin_write_TWI0_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA16(/;"	d
bfin_write_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI0_XMT_DATA8(/;"	d
bfin_write_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA8(/;"	d
bfin_write_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA8(/;"	d
bfin_write_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA8(/;"	d
bfin_write_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA8(/;"	d
bfin_write_TWI0_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI0_XMT_DATA8(/;"	d
bfin_write_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_CLKDIV(/;"	d
bfin_write_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_CLKDIV(/;"	d
bfin_write_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_CLKDIV(/;"	d
bfin_write_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_CLKDIV(/;"	d
bfin_write_TWI1_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_CLKDIV(/;"	d
bfin_write_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_CONTROL(/;"	d
bfin_write_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_CONTROL(/;"	d
bfin_write_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_CONTROL(/;"	d
bfin_write_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_CONTROL(/;"	d
bfin_write_TWI1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_CONTROL(/;"	d
bfin_write_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_FIFO_CTL(/;"	d
bfin_write_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_CTL(/;"	d
bfin_write_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_CTL(/;"	d
bfin_write_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_CTL(/;"	d
bfin_write_TWI1_FIFO_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_CTL(/;"	d
bfin_write_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_FIFO_STAT(/;"	d
bfin_write_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_STAT(/;"	d
bfin_write_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_STAT(/;"	d
bfin_write_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_STAT(/;"	d
bfin_write_TWI1_FIFO_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_FIFO_STAT(/;"	d
bfin_write_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_INT_MASK(/;"	d
bfin_write_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_INT_MASK(/;"	d
bfin_write_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_INT_MASK(/;"	d
bfin_write_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_INT_MASK(/;"	d
bfin_write_TWI1_INT_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_INT_MASK(/;"	d
bfin_write_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_INT_STAT(/;"	d
bfin_write_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_INT_STAT(/;"	d
bfin_write_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_INT_STAT(/;"	d
bfin_write_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_INT_STAT(/;"	d
bfin_write_TWI1_INT_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_INT_STAT(/;"	d
bfin_write_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_MASTER_ADDR(/;"	d
bfin_write_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_ADDR(/;"	d
bfin_write_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_ADDR(/;"	d
bfin_write_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_ADDR(/;"	d
bfin_write_TWI1_MASTER_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_ADDR(/;"	d
bfin_write_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_MASTER_CTL(/;"	d
bfin_write_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_CTL(/;"	d
bfin_write_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_CTL(/;"	d
bfin_write_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_CTL(/;"	d
bfin_write_TWI1_MASTER_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_CTL(/;"	d
bfin_write_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_MASTER_STAT(/;"	d
bfin_write_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_STAT(/;"	d
bfin_write_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_STAT(/;"	d
bfin_write_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_STAT(/;"	d
bfin_write_TWI1_MASTER_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_MASTER_STAT(/;"	d
bfin_write_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_RCV_DATA16(/;"	d
bfin_write_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA16(/;"	d
bfin_write_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA16(/;"	d
bfin_write_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA16(/;"	d
bfin_write_TWI1_RCV_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA16(/;"	d
bfin_write_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_RCV_DATA8(/;"	d
bfin_write_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA8(/;"	d
bfin_write_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA8(/;"	d
bfin_write_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA8(/;"	d
bfin_write_TWI1_RCV_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_RCV_DATA8(/;"	d
bfin_write_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_SLAVE_ADDR(/;"	d
bfin_write_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_ADDR(/;"	d
bfin_write_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_ADDR(/;"	d
bfin_write_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_ADDR(/;"	d
bfin_write_TWI1_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_ADDR(/;"	d
bfin_write_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_CTL(/;"	d
bfin_write_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_CTL(/;"	d
bfin_write_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_CTL(/;"	d
bfin_write_TWI1_SLAVE_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_CTL(/;"	d
bfin_write_TWI1_SLAVE_CTRL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_SLAVE_CTRL(/;"	d
bfin_write_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_SLAVE_STAT(/;"	d
bfin_write_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_STAT(/;"	d
bfin_write_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_STAT(/;"	d
bfin_write_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_STAT(/;"	d
bfin_write_TWI1_SLAVE_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_SLAVE_STAT(/;"	d
bfin_write_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_XMT_DATA16(/;"	d
bfin_write_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA16(/;"	d
bfin_write_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA16(/;"	d
bfin_write_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA16(/;"	d
bfin_write_TWI1_XMT_DATA16	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA16(/;"	d
bfin_write_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_TWI1_XMT_DATA8(/;"	d
bfin_write_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA8(/;"	d
bfin_write_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA8(/;"	d
bfin_write_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA8(/;"	d
bfin_write_TWI1_XMT_DATA8	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_TWI1_XMT_DATA8(/;"	d
bfin_write_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_CLKDIV(/;"	d
bfin_write_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_CLKDIV(/;"	d
bfin_write_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_CLKDIV(/;"	d
bfin_write_TWI_CLKDIV	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_CLKDIV(/;"	d
bfin_write_TWI_CONTROL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_CONTROL(/;"	d
bfin_write_TWI_CONTROL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_CONTROL(/;"	d
bfin_write_TWI_CONTROL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_CONTROL(/;"	d
bfin_write_TWI_CONTROL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_CONTROL(/;"	d
bfin_write_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_FIFO_CTL(/;"	d
bfin_write_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_FIFO_CTL(/;"	d
bfin_write_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_FIFO_CTL(/;"	d
bfin_write_TWI_FIFO_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_FIFO_CTL(/;"	d
bfin_write_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_FIFO_STAT(/;"	d
bfin_write_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_FIFO_STAT(/;"	d
bfin_write_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_FIFO_STAT(/;"	d
bfin_write_TWI_FIFO_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_FIFO_STAT(/;"	d
bfin_write_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_INT_MASK(/;"	d
bfin_write_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_INT_MASK(/;"	d
bfin_write_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_INT_MASK(/;"	d
bfin_write_TWI_INT_MASK	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_INT_MASK(/;"	d
bfin_write_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_INT_STAT(/;"	d
bfin_write_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_INT_STAT(/;"	d
bfin_write_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_INT_STAT(/;"	d
bfin_write_TWI_INT_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_INT_STAT(/;"	d
bfin_write_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_MASTER_ADDR(/;"	d
bfin_write_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_MASTER_ADDR(/;"	d
bfin_write_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_MASTER_ADDR(/;"	d
bfin_write_TWI_MASTER_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_MASTER_ADDR(/;"	d
bfin_write_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_MASTER_CTL(/;"	d
bfin_write_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_MASTER_CTL(/;"	d
bfin_write_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_MASTER_CTL(/;"	d
bfin_write_TWI_MASTER_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_MASTER_CTL(/;"	d
bfin_write_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_MASTER_STAT(/;"	d
bfin_write_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_MASTER_STAT(/;"	d
bfin_write_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_MASTER_STAT(/;"	d
bfin_write_TWI_MASTER_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_MASTER_STAT(/;"	d
bfin_write_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_RCV_DATA16(/;"	d
bfin_write_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_RCV_DATA16(/;"	d
bfin_write_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_RCV_DATA16(/;"	d
bfin_write_TWI_RCV_DATA16	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_RCV_DATA16(/;"	d
bfin_write_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_RCV_DATA8(/;"	d
bfin_write_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_RCV_DATA8(/;"	d
bfin_write_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_RCV_DATA8(/;"	d
bfin_write_TWI_RCV_DATA8	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_RCV_DATA8(/;"	d
bfin_write_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_SLAVE_ADDR(/;"	d
bfin_write_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_SLAVE_ADDR(/;"	d
bfin_write_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_SLAVE_ADDR(/;"	d
bfin_write_TWI_SLAVE_ADDR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_SLAVE_ADDR(/;"	d
bfin_write_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_SLAVE_CTL(/;"	d
bfin_write_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_SLAVE_CTL(/;"	d
bfin_write_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_SLAVE_CTL(/;"	d
bfin_write_TWI_SLAVE_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_SLAVE_CTL(/;"	d
bfin_write_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_SLAVE_STAT(/;"	d
bfin_write_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_SLAVE_STAT(/;"	d
bfin_write_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_SLAVE_STAT(/;"	d
bfin_write_TWI_SLAVE_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_SLAVE_STAT(/;"	d
bfin_write_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_XMT_DATA16(/;"	d
bfin_write_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_XMT_DATA16(/;"	d
bfin_write_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_XMT_DATA16(/;"	d
bfin_write_TWI_XMT_DATA16	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_XMT_DATA16(/;"	d
bfin_write_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_TWI_XMT_DATA8(/;"	d
bfin_write_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_TWI_XMT_DATA8(/;"	d
bfin_write_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_TWI_XMT_DATA8(/;"	d
bfin_write_TWI_XMT_DATA8	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_TWI_XMT_DATA8(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_DLH(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_DLL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_GCTL(/;"	d
bfin_write_UART0_IER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_IER(/;"	d
bfin_write_UART0_IER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_IER(/;"	d
bfin_write_UART0_IER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_IER(/;"	d
bfin_write_UART0_IER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_IER(/;"	d
bfin_write_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_IER_CLEAR(/;"	d
bfin_write_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_IER_CLEAR(/;"	d
bfin_write_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_IER_CLEAR(/;"	d
bfin_write_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_IER_CLEAR(/;"	d
bfin_write_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_IER_CLEAR(/;"	d
bfin_write_UART0_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_IER_CLEAR(/;"	d
bfin_write_UART0_IER_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_IER_SET(/;"	d
bfin_write_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_IER_SET(/;"	d
bfin_write_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_IER_SET(/;"	d
bfin_write_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_IER_SET(/;"	d
bfin_write_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_IER_SET(/;"	d
bfin_write_UART0_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_IER_SET(/;"	d
bfin_write_UART0_IIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_IIR(/;"	d
bfin_write_UART0_IIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_IIR(/;"	d
bfin_write_UART0_IIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_IIR(/;"	d
bfin_write_UART0_IIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_IIR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_LCR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_LSR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_MCR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_MSR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_RBR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_SCR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART0_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART0_THR(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_DLH(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_DLL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_GCTL(/;"	d
bfin_write_UART1_IER	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_IER(/;"	d
bfin_write_UART1_IER	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_IER(/;"	d
bfin_write_UART1_IER	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_IER(/;"	d
bfin_write_UART1_IER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_IER(/;"	d
bfin_write_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_IER_CLEAR(/;"	d
bfin_write_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_IER_CLEAR(/;"	d
bfin_write_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_IER_CLEAR(/;"	d
bfin_write_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_IER_CLEAR(/;"	d
bfin_write_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_IER_CLEAR(/;"	d
bfin_write_UART1_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_IER_CLEAR(/;"	d
bfin_write_UART1_IER_SET	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_IER_SET(/;"	d
bfin_write_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_IER_SET(/;"	d
bfin_write_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_IER_SET(/;"	d
bfin_write_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_IER_SET(/;"	d
bfin_write_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_IER_SET(/;"	d
bfin_write_UART1_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_IER_SET(/;"	d
bfin_write_UART1_IIR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_IIR(/;"	d
bfin_write_UART1_IIR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_IIR(/;"	d
bfin_write_UART1_IIR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_IIR(/;"	d
bfin_write_UART1_IIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_IIR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_LCR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_LSR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_MCR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_MSR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_RBR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_SCR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART1_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART1_THR(/;"	d
bfin_write_UART2_DLH	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_DLH(/;"	d
bfin_write_UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_DLH(/;"	d
bfin_write_UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_DLH(/;"	d
bfin_write_UART2_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_DLH(/;"	d
bfin_write_UART2_DLL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_DLL(/;"	d
bfin_write_UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_DLL(/;"	d
bfin_write_UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_DLL(/;"	d
bfin_write_UART2_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_DLL(/;"	d
bfin_write_UART2_GCTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_GCTL(/;"	d
bfin_write_UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_GCTL(/;"	d
bfin_write_UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_GCTL(/;"	d
bfin_write_UART2_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_GCTL(/;"	d
bfin_write_UART2_IER	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_IER(/;"	d
bfin_write_UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_IER_CLEAR(/;"	d
bfin_write_UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_IER_CLEAR(/;"	d
bfin_write_UART2_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_IER_CLEAR(/;"	d
bfin_write_UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_IER_SET(/;"	d
bfin_write_UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_IER_SET(/;"	d
bfin_write_UART2_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_IER_SET(/;"	d
bfin_write_UART2_IIR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_IIR(/;"	d
bfin_write_UART2_LCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_LCR(/;"	d
bfin_write_UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_LCR(/;"	d
bfin_write_UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_LCR(/;"	d
bfin_write_UART2_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_LCR(/;"	d
bfin_write_UART2_LSR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_LSR(/;"	d
bfin_write_UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_LSR(/;"	d
bfin_write_UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_LSR(/;"	d
bfin_write_UART2_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_LSR(/;"	d
bfin_write_UART2_MCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_MCR(/;"	d
bfin_write_UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_MCR(/;"	d
bfin_write_UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_MCR(/;"	d
bfin_write_UART2_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_MCR(/;"	d
bfin_write_UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_MSR(/;"	d
bfin_write_UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_MSR(/;"	d
bfin_write_UART2_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_MSR(/;"	d
bfin_write_UART2_RBR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_RBR(/;"	d
bfin_write_UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_RBR(/;"	d
bfin_write_UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_RBR(/;"	d
bfin_write_UART2_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_RBR(/;"	d
bfin_write_UART2_SCR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_SCR(/;"	d
bfin_write_UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_SCR(/;"	d
bfin_write_UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_SCR(/;"	d
bfin_write_UART2_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_SCR(/;"	d
bfin_write_UART2_THR	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_UART2_THR(/;"	d
bfin_write_UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART2_THR(/;"	d
bfin_write_UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART2_THR(/;"	d
bfin_write_UART2_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART2_THR(/;"	d
bfin_write_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_DLH(/;"	d
bfin_write_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_DLH(/;"	d
bfin_write_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_DLH(/;"	d
bfin_write_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_DLH(/;"	d
bfin_write_UART3_DLH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_DLH(/;"	d
bfin_write_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_DLL(/;"	d
bfin_write_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_DLL(/;"	d
bfin_write_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_DLL(/;"	d
bfin_write_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_DLL(/;"	d
bfin_write_UART3_DLL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_DLL(/;"	d
bfin_write_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_GCTL(/;"	d
bfin_write_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_GCTL(/;"	d
bfin_write_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_GCTL(/;"	d
bfin_write_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_GCTL(/;"	d
bfin_write_UART3_GCTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_GCTL(/;"	d
bfin_write_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_IER_CLEAR(/;"	d
bfin_write_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_IER_CLEAR(/;"	d
bfin_write_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_IER_CLEAR(/;"	d
bfin_write_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_IER_CLEAR(/;"	d
bfin_write_UART3_IER_CLEAR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_IER_CLEAR(/;"	d
bfin_write_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_IER_SET(/;"	d
bfin_write_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_IER_SET(/;"	d
bfin_write_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_IER_SET(/;"	d
bfin_write_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_IER_SET(/;"	d
bfin_write_UART3_IER_SET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_IER_SET(/;"	d
bfin_write_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_LCR(/;"	d
bfin_write_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_LCR(/;"	d
bfin_write_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_LCR(/;"	d
bfin_write_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_LCR(/;"	d
bfin_write_UART3_LCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_LCR(/;"	d
bfin_write_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_LSR(/;"	d
bfin_write_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_LSR(/;"	d
bfin_write_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_LSR(/;"	d
bfin_write_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_LSR(/;"	d
bfin_write_UART3_LSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_LSR(/;"	d
bfin_write_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_MCR(/;"	d
bfin_write_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_MCR(/;"	d
bfin_write_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_MCR(/;"	d
bfin_write_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_MCR(/;"	d
bfin_write_UART3_MCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_MCR(/;"	d
bfin_write_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_MSR(/;"	d
bfin_write_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_MSR(/;"	d
bfin_write_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_MSR(/;"	d
bfin_write_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_MSR(/;"	d
bfin_write_UART3_MSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_MSR(/;"	d
bfin_write_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_RBR(/;"	d
bfin_write_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_RBR(/;"	d
bfin_write_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_RBR(/;"	d
bfin_write_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_RBR(/;"	d
bfin_write_UART3_RBR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_RBR(/;"	d
bfin_write_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_SCR(/;"	d
bfin_write_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_SCR(/;"	d
bfin_write_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_SCR(/;"	d
bfin_write_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_SCR(/;"	d
bfin_write_UART3_SCR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_SCR(/;"	d
bfin_write_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_UART3_THR(/;"	d
bfin_write_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_UART3_THR(/;"	d
bfin_write_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_UART3_THR(/;"	d
bfin_write_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_UART3_THR(/;"	d
bfin_write_UART3_THR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_UART3_THR(/;"	d
bfin_write_UART_DLH	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_DLH(/;"	d
bfin_write_UART_DLH	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_DLH(/;"	d
bfin_write_UART_DLL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_DLL(/;"	d
bfin_write_UART_DLL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_DLL(/;"	d
bfin_write_UART_GBL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_GBL(/;"	d
bfin_write_UART_GCTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_GCTL(/;"	d
bfin_write_UART_GCTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_GCTL(/;"	d
bfin_write_UART_IER	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_IER(/;"	d
bfin_write_UART_IER	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_IER(/;"	d
bfin_write_UART_IIR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_IIR(/;"	d
bfin_write_UART_IIR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_IIR(/;"	d
bfin_write_UART_LCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_LCR(/;"	d
bfin_write_UART_LCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_LCR(/;"	d
bfin_write_UART_LSR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_LSR(/;"	d
bfin_write_UART_LSR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_LSR(/;"	d
bfin_write_UART_MCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_MCR(/;"	d
bfin_write_UART_MCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_MCR(/;"	d
bfin_write_UART_MSR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_MSR(/;"	d
bfin_write_UART_RBR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_RBR(/;"	d
bfin_write_UART_RBR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_RBR(/;"	d
bfin_write_UART_SCR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_SCR(/;"	d
bfin_write_UART_SCR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_SCR(/;"	d
bfin_write_UART_THR	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_UART_THR(/;"	d
bfin_write_UART_THR	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_UART_THR(/;"	d
bfin_write_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_APHY_CALIB(/;"	d
bfin_write_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_APHY_CALIB(/;"	d
bfin_write_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_APHY_CALIB(/;"	d
bfin_write_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_APHY_CALIB(/;"	d
bfin_write_USB_APHY_CALIB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_APHY_CALIB(/;"	d
bfin_write_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_APHY_CNTRL(/;"	d
bfin_write_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL(/;"	d
bfin_write_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL(/;"	d
bfin_write_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL(/;"	d
bfin_write_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL(/;"	d
bfin_write_USB_APHY_CNTRL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_USB_APHY_CNTRL(/;"	d
bfin_write_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_APHY_CNTRL2(/;"	d
bfin_write_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL2(/;"	d
bfin_write_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL2(/;"	d
bfin_write_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL2(/;"	d
bfin_write_USB_APHY_CNTRL2	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_APHY_CNTRL2(/;"	d
bfin_write_USB_COUNT0	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_COUNT0(/;"	d
bfin_write_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_COUNT0(/;"	d
bfin_write_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_COUNT0(/;"	d
bfin_write_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_COUNT0(/;"	d
bfin_write_USB_COUNT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_COUNT0(/;"	d
bfin_write_USB_CSR0	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_CSR0(/;"	d
bfin_write_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_CSR0(/;"	d
bfin_write_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_CSR0(/;"	d
bfin_write_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_CSR0(/;"	d
bfin_write_USB_CSR0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_CSR0(/;"	d
bfin_write_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA0_ADDRHIGH(/;"	d
bfin_write_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRHIGH(/;"	d
bfin_write_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRHIGH(/;"	d
bfin_write_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRHIGH(/;"	d
bfin_write_USB_DMA0_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRHIGH(/;"	d
bfin_write_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA0_ADDRLOW(/;"	d
bfin_write_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRLOW(/;"	d
bfin_write_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRLOW(/;"	d
bfin_write_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRLOW(/;"	d
bfin_write_USB_DMA0_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA0_ADDRLOW(/;"	d
bfin_write_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA0_CONTROL(/;"	d
bfin_write_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA0_CONTROL(/;"	d
bfin_write_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA0_CONTROL(/;"	d
bfin_write_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA0_CONTROL(/;"	d
bfin_write_USB_DMA0_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA0_CONTROL(/;"	d
bfin_write_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA0_COUNTHIGH(/;"	d
bfin_write_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTHIGH(/;"	d
bfin_write_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTHIGH(/;"	d
bfin_write_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTHIGH(/;"	d
bfin_write_USB_DMA0_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTHIGH(/;"	d
bfin_write_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA0_COUNTLOW(/;"	d
bfin_write_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTLOW(/;"	d
bfin_write_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTLOW(/;"	d
bfin_write_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTLOW(/;"	d
bfin_write_USB_DMA0_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA0_COUNTLOW(/;"	d
bfin_write_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA1_ADDRHIGH(/;"	d
bfin_write_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRHIGH(/;"	d
bfin_write_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRHIGH(/;"	d
bfin_write_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRHIGH(/;"	d
bfin_write_USB_DMA1_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRHIGH(/;"	d
bfin_write_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA1_ADDRLOW(/;"	d
bfin_write_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRLOW(/;"	d
bfin_write_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRLOW(/;"	d
bfin_write_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRLOW(/;"	d
bfin_write_USB_DMA1_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA1_ADDRLOW(/;"	d
bfin_write_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA1_CONTROL(/;"	d
bfin_write_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA1_CONTROL(/;"	d
bfin_write_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA1_CONTROL(/;"	d
bfin_write_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA1_CONTROL(/;"	d
bfin_write_USB_DMA1_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA1_CONTROL(/;"	d
bfin_write_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA1_COUNTHIGH(/;"	d
bfin_write_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTHIGH(/;"	d
bfin_write_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTHIGH(/;"	d
bfin_write_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTHIGH(/;"	d
bfin_write_USB_DMA1_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTHIGH(/;"	d
bfin_write_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA1_COUNTLOW(/;"	d
bfin_write_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTLOW(/;"	d
bfin_write_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTLOW(/;"	d
bfin_write_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTLOW(/;"	d
bfin_write_USB_DMA1_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA1_COUNTLOW(/;"	d
bfin_write_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA2_ADDRHIGH(/;"	d
bfin_write_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRHIGH(/;"	d
bfin_write_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRHIGH(/;"	d
bfin_write_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRHIGH(/;"	d
bfin_write_USB_DMA2_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRHIGH(/;"	d
bfin_write_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA2_ADDRLOW(/;"	d
bfin_write_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRLOW(/;"	d
bfin_write_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRLOW(/;"	d
bfin_write_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRLOW(/;"	d
bfin_write_USB_DMA2_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA2_ADDRLOW(/;"	d
bfin_write_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA2_CONTROL(/;"	d
bfin_write_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA2_CONTROL(/;"	d
bfin_write_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA2_CONTROL(/;"	d
bfin_write_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA2_CONTROL(/;"	d
bfin_write_USB_DMA2_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA2_CONTROL(/;"	d
bfin_write_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA2_COUNTHIGH(/;"	d
bfin_write_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTHIGH(/;"	d
bfin_write_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTHIGH(/;"	d
bfin_write_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTHIGH(/;"	d
bfin_write_USB_DMA2_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTHIGH(/;"	d
bfin_write_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA2_COUNTLOW(/;"	d
bfin_write_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTLOW(/;"	d
bfin_write_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTLOW(/;"	d
bfin_write_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTLOW(/;"	d
bfin_write_USB_DMA2_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA2_COUNTLOW(/;"	d
bfin_write_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA3_ADDRHIGH(/;"	d
bfin_write_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRHIGH(/;"	d
bfin_write_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRHIGH(/;"	d
bfin_write_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRHIGH(/;"	d
bfin_write_USB_DMA3_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRHIGH(/;"	d
bfin_write_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA3_ADDRLOW(/;"	d
bfin_write_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRLOW(/;"	d
bfin_write_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRLOW(/;"	d
bfin_write_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRLOW(/;"	d
bfin_write_USB_DMA3_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA3_ADDRLOW(/;"	d
bfin_write_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA3_CONTROL(/;"	d
bfin_write_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA3_CONTROL(/;"	d
bfin_write_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA3_CONTROL(/;"	d
bfin_write_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA3_CONTROL(/;"	d
bfin_write_USB_DMA3_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA3_CONTROL(/;"	d
bfin_write_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA3_COUNTHIGH(/;"	d
bfin_write_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTHIGH(/;"	d
bfin_write_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTHIGH(/;"	d
bfin_write_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTHIGH(/;"	d
bfin_write_USB_DMA3_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTHIGH(/;"	d
bfin_write_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA3_COUNTLOW(/;"	d
bfin_write_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTLOW(/;"	d
bfin_write_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTLOW(/;"	d
bfin_write_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTLOW(/;"	d
bfin_write_USB_DMA3_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA3_COUNTLOW(/;"	d
bfin_write_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA4_ADDRHIGH(/;"	d
bfin_write_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRHIGH(/;"	d
bfin_write_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRHIGH(/;"	d
bfin_write_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRHIGH(/;"	d
bfin_write_USB_DMA4_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRHIGH(/;"	d
bfin_write_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA4_ADDRLOW(/;"	d
bfin_write_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRLOW(/;"	d
bfin_write_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRLOW(/;"	d
bfin_write_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRLOW(/;"	d
bfin_write_USB_DMA4_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA4_ADDRLOW(/;"	d
bfin_write_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA4_CONTROL(/;"	d
bfin_write_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA4_CONTROL(/;"	d
bfin_write_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA4_CONTROL(/;"	d
bfin_write_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA4_CONTROL(/;"	d
bfin_write_USB_DMA4_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA4_CONTROL(/;"	d
bfin_write_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA4_COUNTHIGH(/;"	d
bfin_write_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTHIGH(/;"	d
bfin_write_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTHIGH(/;"	d
bfin_write_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTHIGH(/;"	d
bfin_write_USB_DMA4_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTHIGH(/;"	d
bfin_write_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA4_COUNTLOW(/;"	d
bfin_write_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTLOW(/;"	d
bfin_write_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTLOW(/;"	d
bfin_write_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTLOW(/;"	d
bfin_write_USB_DMA4_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA4_COUNTLOW(/;"	d
bfin_write_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA5_ADDRHIGH(/;"	d
bfin_write_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRHIGH(/;"	d
bfin_write_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRHIGH(/;"	d
bfin_write_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRHIGH(/;"	d
bfin_write_USB_DMA5_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRHIGH(/;"	d
bfin_write_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA5_ADDRLOW(/;"	d
bfin_write_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRLOW(/;"	d
bfin_write_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRLOW(/;"	d
bfin_write_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRLOW(/;"	d
bfin_write_USB_DMA5_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA5_ADDRLOW(/;"	d
bfin_write_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA5_CONTROL(/;"	d
bfin_write_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA5_CONTROL(/;"	d
bfin_write_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA5_CONTROL(/;"	d
bfin_write_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA5_CONTROL(/;"	d
bfin_write_USB_DMA5_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA5_CONTROL(/;"	d
bfin_write_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA5_COUNTHIGH(/;"	d
bfin_write_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTHIGH(/;"	d
bfin_write_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTHIGH(/;"	d
bfin_write_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTHIGH(/;"	d
bfin_write_USB_DMA5_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTHIGH(/;"	d
bfin_write_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA5_COUNTLOW(/;"	d
bfin_write_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTLOW(/;"	d
bfin_write_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTLOW(/;"	d
bfin_write_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTLOW(/;"	d
bfin_write_USB_DMA5_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA5_COUNTLOW(/;"	d
bfin_write_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA6_ADDRHIGH(/;"	d
bfin_write_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRHIGH(/;"	d
bfin_write_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRHIGH(/;"	d
bfin_write_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRHIGH(/;"	d
bfin_write_USB_DMA6_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRHIGH(/;"	d
bfin_write_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA6_ADDRLOW(/;"	d
bfin_write_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRLOW(/;"	d
bfin_write_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRLOW(/;"	d
bfin_write_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRLOW(/;"	d
bfin_write_USB_DMA6_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA6_ADDRLOW(/;"	d
bfin_write_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA6_CONTROL(/;"	d
bfin_write_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA6_CONTROL(/;"	d
bfin_write_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA6_CONTROL(/;"	d
bfin_write_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA6_CONTROL(/;"	d
bfin_write_USB_DMA6_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA6_CONTROL(/;"	d
bfin_write_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA6_COUNTHIGH(/;"	d
bfin_write_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTHIGH(/;"	d
bfin_write_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTHIGH(/;"	d
bfin_write_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTHIGH(/;"	d
bfin_write_USB_DMA6_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTHIGH(/;"	d
bfin_write_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA6_COUNTLOW(/;"	d
bfin_write_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTLOW(/;"	d
bfin_write_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTLOW(/;"	d
bfin_write_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTLOW(/;"	d
bfin_write_USB_DMA6_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA6_COUNTLOW(/;"	d
bfin_write_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA7_ADDRHIGH(/;"	d
bfin_write_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRHIGH(/;"	d
bfin_write_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRHIGH(/;"	d
bfin_write_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRHIGH(/;"	d
bfin_write_USB_DMA7_ADDRHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRHIGH(/;"	d
bfin_write_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA7_ADDRLOW(/;"	d
bfin_write_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRLOW(/;"	d
bfin_write_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRLOW(/;"	d
bfin_write_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRLOW(/;"	d
bfin_write_USB_DMA7_ADDRLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA7_ADDRLOW(/;"	d
bfin_write_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA7_CONTROL(/;"	d
bfin_write_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA7_CONTROL(/;"	d
bfin_write_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA7_CONTROL(/;"	d
bfin_write_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA7_CONTROL(/;"	d
bfin_write_USB_DMA7_CONTROL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA7_CONTROL(/;"	d
bfin_write_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA7_COUNTHIGH(/;"	d
bfin_write_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTHIGH(/;"	d
bfin_write_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTHIGH(/;"	d
bfin_write_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTHIGH(/;"	d
bfin_write_USB_DMA7_COUNTHIGH	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTHIGH(/;"	d
bfin_write_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA7_COUNTLOW(/;"	d
bfin_write_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTLOW(/;"	d
bfin_write_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTLOW(/;"	d
bfin_write_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTLOW(/;"	d
bfin_write_USB_DMA7_COUNTLOW	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA7_COUNTLOW(/;"	d
bfin_write_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_DMA_INTERRUPT(/;"	d
bfin_write_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_DMA_INTERRUPT(/;"	d
bfin_write_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_DMA_INTERRUPT(/;"	d
bfin_write_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_DMA_INTERRUPT(/;"	d
bfin_write_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_DMA_INTERRUPT(/;"	d
bfin_write_USB_DMA_INTERRUPT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_USB_DMA_INTERRUPT(/;"	d
bfin_write_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP0_FIFO(/;"	d
bfin_write_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP0_FIFO(/;"	d
bfin_write_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP0_FIFO(/;"	d
bfin_write_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP0_FIFO(/;"	d
bfin_write_USB_EP0_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP0_FIFO(/;"	d
bfin_write_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP1_FIFO(/;"	d
bfin_write_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP1_FIFO(/;"	d
bfin_write_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP1_FIFO(/;"	d
bfin_write_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP1_FIFO(/;"	d
bfin_write_USB_EP1_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP1_FIFO(/;"	d
bfin_write_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP2_FIFO(/;"	d
bfin_write_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP2_FIFO(/;"	d
bfin_write_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP2_FIFO(/;"	d
bfin_write_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP2_FIFO(/;"	d
bfin_write_USB_EP2_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP2_FIFO(/;"	d
bfin_write_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP3_FIFO(/;"	d
bfin_write_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP3_FIFO(/;"	d
bfin_write_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP3_FIFO(/;"	d
bfin_write_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP3_FIFO(/;"	d
bfin_write_USB_EP3_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP3_FIFO(/;"	d
bfin_write_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP4_FIFO(/;"	d
bfin_write_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP4_FIFO(/;"	d
bfin_write_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP4_FIFO(/;"	d
bfin_write_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP4_FIFO(/;"	d
bfin_write_USB_EP4_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP4_FIFO(/;"	d
bfin_write_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP5_FIFO(/;"	d
bfin_write_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP5_FIFO(/;"	d
bfin_write_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP5_FIFO(/;"	d
bfin_write_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP5_FIFO(/;"	d
bfin_write_USB_EP5_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP5_FIFO(/;"	d
bfin_write_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP6_FIFO(/;"	d
bfin_write_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP6_FIFO(/;"	d
bfin_write_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP6_FIFO(/;"	d
bfin_write_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP6_FIFO(/;"	d
bfin_write_USB_EP6_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP6_FIFO(/;"	d
bfin_write_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP7_FIFO(/;"	d
bfin_write_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP7_FIFO(/;"	d
bfin_write_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP7_FIFO(/;"	d
bfin_write_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP7_FIFO(/;"	d
bfin_write_USB_EP7_FIFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP7_FIFO(/;"	d
bfin_write_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCOUNT(/;"	d
bfin_write_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCOUNT(/;"	d
bfin_write_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCOUNT(/;"	d
bfin_write_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCOUNT(/;"	d
bfin_write_USB_EP_NI0_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCOUNT(/;"	d
bfin_write_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCSR(/;"	d
bfin_write_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCSR(/;"	d
bfin_write_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCSR(/;"	d
bfin_write_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCSR(/;"	d
bfin_write_USB_EP_NI0_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXCSR(/;"	d
bfin_write_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_RXMAXP(/;"	d
bfin_write_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXMAXP(/;"	d
bfin_write_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXMAXP(/;"	d
bfin_write_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXMAXP(/;"	d
bfin_write_USB_EP_NI0_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXMAXP(/;"	d
bfin_write_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_RXTYPE(/;"	d
bfin_write_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXTYPE(/;"	d
bfin_write_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXTYPE(/;"	d
bfin_write_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXTYPE(/;"	d
bfin_write_USB_EP_NI0_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_RXTYPE(/;"	d
bfin_write_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCOUNT(/;"	d
bfin_write_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCOUNT(/;"	d
bfin_write_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCOUNT(/;"	d
bfin_write_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCOUNT(/;"	d
bfin_write_USB_EP_NI0_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCOUNT(/;"	d
bfin_write_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCSR(/;"	d
bfin_write_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCSR(/;"	d
bfin_write_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCSR(/;"	d
bfin_write_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCSR(/;"	d
bfin_write_USB_EP_NI0_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXCSR(/;"	d
bfin_write_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_TXMAXP(/;"	d
bfin_write_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXMAXP(/;"	d
bfin_write_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXMAXP(/;"	d
bfin_write_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXMAXP(/;"	d
bfin_write_USB_EP_NI0_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXMAXP(/;"	d
bfin_write_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI0_TXTYPE(/;"	d
bfin_write_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXTYPE(/;"	d
bfin_write_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXTYPE(/;"	d
bfin_write_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXTYPE(/;"	d
bfin_write_USB_EP_NI0_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI0_TXTYPE(/;"	d
bfin_write_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCOUNT(/;"	d
bfin_write_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCOUNT(/;"	d
bfin_write_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCOUNT(/;"	d
bfin_write_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCOUNT(/;"	d
bfin_write_USB_EP_NI1_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCOUNT(/;"	d
bfin_write_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCSR(/;"	d
bfin_write_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCSR(/;"	d
bfin_write_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCSR(/;"	d
bfin_write_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCSR(/;"	d
bfin_write_USB_EP_NI1_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXCSR(/;"	d
bfin_write_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_RXMAXP(/;"	d
bfin_write_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXMAXP(/;"	d
bfin_write_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXMAXP(/;"	d
bfin_write_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXMAXP(/;"	d
bfin_write_USB_EP_NI1_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXMAXP(/;"	d
bfin_write_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_RXTYPE(/;"	d
bfin_write_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXTYPE(/;"	d
bfin_write_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXTYPE(/;"	d
bfin_write_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXTYPE(/;"	d
bfin_write_USB_EP_NI1_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_RXTYPE(/;"	d
bfin_write_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCOUNT(/;"	d
bfin_write_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCOUNT(/;"	d
bfin_write_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCOUNT(/;"	d
bfin_write_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCOUNT(/;"	d
bfin_write_USB_EP_NI1_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCOUNT(/;"	d
bfin_write_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCSR(/;"	d
bfin_write_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCSR(/;"	d
bfin_write_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCSR(/;"	d
bfin_write_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCSR(/;"	d
bfin_write_USB_EP_NI1_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXCSR(/;"	d
bfin_write_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_TXMAXP(/;"	d
bfin_write_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXMAXP(/;"	d
bfin_write_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXMAXP(/;"	d
bfin_write_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXMAXP(/;"	d
bfin_write_USB_EP_NI1_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXMAXP(/;"	d
bfin_write_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI1_TXTYPE(/;"	d
bfin_write_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXTYPE(/;"	d
bfin_write_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXTYPE(/;"	d
bfin_write_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXTYPE(/;"	d
bfin_write_USB_EP_NI1_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI1_TXTYPE(/;"	d
bfin_write_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCOUNT(/;"	d
bfin_write_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCOUNT(/;"	d
bfin_write_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCOUNT(/;"	d
bfin_write_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCOUNT(/;"	d
bfin_write_USB_EP_NI2_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCOUNT(/;"	d
bfin_write_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCSR(/;"	d
bfin_write_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCSR(/;"	d
bfin_write_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCSR(/;"	d
bfin_write_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCSR(/;"	d
bfin_write_USB_EP_NI2_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXCSR(/;"	d
bfin_write_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_RXMAXP(/;"	d
bfin_write_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXMAXP(/;"	d
bfin_write_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXMAXP(/;"	d
bfin_write_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXMAXP(/;"	d
bfin_write_USB_EP_NI2_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXMAXP(/;"	d
bfin_write_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_RXTYPE(/;"	d
bfin_write_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXTYPE(/;"	d
bfin_write_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXTYPE(/;"	d
bfin_write_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXTYPE(/;"	d
bfin_write_USB_EP_NI2_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_RXTYPE(/;"	d
bfin_write_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCOUNT(/;"	d
bfin_write_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCOUNT(/;"	d
bfin_write_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCOUNT(/;"	d
bfin_write_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCOUNT(/;"	d
bfin_write_USB_EP_NI2_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCOUNT(/;"	d
bfin_write_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCSR(/;"	d
bfin_write_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCSR(/;"	d
bfin_write_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCSR(/;"	d
bfin_write_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCSR(/;"	d
bfin_write_USB_EP_NI2_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXCSR(/;"	d
bfin_write_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_TXMAXP(/;"	d
bfin_write_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXMAXP(/;"	d
bfin_write_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXMAXP(/;"	d
bfin_write_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXMAXP(/;"	d
bfin_write_USB_EP_NI2_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXMAXP(/;"	d
bfin_write_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI2_TXTYPE(/;"	d
bfin_write_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXTYPE(/;"	d
bfin_write_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXTYPE(/;"	d
bfin_write_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXTYPE(/;"	d
bfin_write_USB_EP_NI2_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI2_TXTYPE(/;"	d
bfin_write_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCOUNT(/;"	d
bfin_write_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCOUNT(/;"	d
bfin_write_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCOUNT(/;"	d
bfin_write_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCOUNT(/;"	d
bfin_write_USB_EP_NI3_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCOUNT(/;"	d
bfin_write_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCSR(/;"	d
bfin_write_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCSR(/;"	d
bfin_write_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCSR(/;"	d
bfin_write_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCSR(/;"	d
bfin_write_USB_EP_NI3_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXCSR(/;"	d
bfin_write_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_RXMAXP(/;"	d
bfin_write_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXMAXP(/;"	d
bfin_write_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXMAXP(/;"	d
bfin_write_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXMAXP(/;"	d
bfin_write_USB_EP_NI3_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXMAXP(/;"	d
bfin_write_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_RXTYPE(/;"	d
bfin_write_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXTYPE(/;"	d
bfin_write_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXTYPE(/;"	d
bfin_write_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXTYPE(/;"	d
bfin_write_USB_EP_NI3_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_RXTYPE(/;"	d
bfin_write_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCOUNT(/;"	d
bfin_write_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCOUNT(/;"	d
bfin_write_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCOUNT(/;"	d
bfin_write_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCOUNT(/;"	d
bfin_write_USB_EP_NI3_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCOUNT(/;"	d
bfin_write_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCSR(/;"	d
bfin_write_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCSR(/;"	d
bfin_write_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCSR(/;"	d
bfin_write_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCSR(/;"	d
bfin_write_USB_EP_NI3_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXCSR(/;"	d
bfin_write_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_TXMAXP(/;"	d
bfin_write_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXMAXP(/;"	d
bfin_write_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXMAXP(/;"	d
bfin_write_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXMAXP(/;"	d
bfin_write_USB_EP_NI3_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXMAXP(/;"	d
bfin_write_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI3_TXTYPE(/;"	d
bfin_write_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXTYPE(/;"	d
bfin_write_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXTYPE(/;"	d
bfin_write_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXTYPE(/;"	d
bfin_write_USB_EP_NI3_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI3_TXTYPE(/;"	d
bfin_write_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCOUNT(/;"	d
bfin_write_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCOUNT(/;"	d
bfin_write_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCOUNT(/;"	d
bfin_write_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCOUNT(/;"	d
bfin_write_USB_EP_NI4_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCOUNT(/;"	d
bfin_write_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCSR(/;"	d
bfin_write_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCSR(/;"	d
bfin_write_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCSR(/;"	d
bfin_write_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCSR(/;"	d
bfin_write_USB_EP_NI4_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXCSR(/;"	d
bfin_write_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_RXMAXP(/;"	d
bfin_write_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXMAXP(/;"	d
bfin_write_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXMAXP(/;"	d
bfin_write_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXMAXP(/;"	d
bfin_write_USB_EP_NI4_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXMAXP(/;"	d
bfin_write_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_RXTYPE(/;"	d
bfin_write_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXTYPE(/;"	d
bfin_write_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXTYPE(/;"	d
bfin_write_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXTYPE(/;"	d
bfin_write_USB_EP_NI4_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_RXTYPE(/;"	d
bfin_write_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCOUNT(/;"	d
bfin_write_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCOUNT(/;"	d
bfin_write_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCOUNT(/;"	d
bfin_write_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCOUNT(/;"	d
bfin_write_USB_EP_NI4_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCOUNT(/;"	d
bfin_write_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCSR(/;"	d
bfin_write_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCSR(/;"	d
bfin_write_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCSR(/;"	d
bfin_write_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCSR(/;"	d
bfin_write_USB_EP_NI4_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXCSR(/;"	d
bfin_write_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_TXMAXP(/;"	d
bfin_write_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXMAXP(/;"	d
bfin_write_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXMAXP(/;"	d
bfin_write_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXMAXP(/;"	d
bfin_write_USB_EP_NI4_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXMAXP(/;"	d
bfin_write_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI4_TXTYPE(/;"	d
bfin_write_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXTYPE(/;"	d
bfin_write_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXTYPE(/;"	d
bfin_write_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXTYPE(/;"	d
bfin_write_USB_EP_NI4_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI4_TXTYPE(/;"	d
bfin_write_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCOUNT(/;"	d
bfin_write_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCOUNT(/;"	d
bfin_write_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCOUNT(/;"	d
bfin_write_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCOUNT(/;"	d
bfin_write_USB_EP_NI5_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCOUNT(/;"	d
bfin_write_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCSR(/;"	d
bfin_write_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCSR(/;"	d
bfin_write_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCSR(/;"	d
bfin_write_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCSR(/;"	d
bfin_write_USB_EP_NI5_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXCSR(/;"	d
bfin_write_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_RXMAXP(/;"	d
bfin_write_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXMAXP(/;"	d
bfin_write_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXMAXP(/;"	d
bfin_write_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXMAXP(/;"	d
bfin_write_USB_EP_NI5_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXMAXP(/;"	d
bfin_write_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_RXTYPE(/;"	d
bfin_write_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXTYPE(/;"	d
bfin_write_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXTYPE(/;"	d
bfin_write_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXTYPE(/;"	d
bfin_write_USB_EP_NI5_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_RXTYPE(/;"	d
bfin_write_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCOUNT(/;"	d
bfin_write_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCOUNT(/;"	d
bfin_write_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCOUNT(/;"	d
bfin_write_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCOUNT(/;"	d
bfin_write_USB_EP_NI5_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCOUNT(/;"	d
bfin_write_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCSR(/;"	d
bfin_write_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCSR(/;"	d
bfin_write_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCSR(/;"	d
bfin_write_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCSR(/;"	d
bfin_write_USB_EP_NI5_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXCSR(/;"	d
bfin_write_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_TXMAXP(/;"	d
bfin_write_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXMAXP(/;"	d
bfin_write_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXMAXP(/;"	d
bfin_write_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXMAXP(/;"	d
bfin_write_USB_EP_NI5_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXMAXP(/;"	d
bfin_write_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI5_TXTYPE(/;"	d
bfin_write_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXTYPE(/;"	d
bfin_write_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXTYPE(/;"	d
bfin_write_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXTYPE(/;"	d
bfin_write_USB_EP_NI5_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI5_TXTYPE(/;"	d
bfin_write_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCOUNT(/;"	d
bfin_write_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCOUNT(/;"	d
bfin_write_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCOUNT(/;"	d
bfin_write_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCOUNT(/;"	d
bfin_write_USB_EP_NI6_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCOUNT(/;"	d
bfin_write_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCSR(/;"	d
bfin_write_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCSR(/;"	d
bfin_write_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCSR(/;"	d
bfin_write_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCSR(/;"	d
bfin_write_USB_EP_NI6_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXCSR(/;"	d
bfin_write_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_RXMAXP(/;"	d
bfin_write_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXMAXP(/;"	d
bfin_write_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXMAXP(/;"	d
bfin_write_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXMAXP(/;"	d
bfin_write_USB_EP_NI6_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXMAXP(/;"	d
bfin_write_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_RXTYPE(/;"	d
bfin_write_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXTYPE(/;"	d
bfin_write_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXTYPE(/;"	d
bfin_write_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXTYPE(/;"	d
bfin_write_USB_EP_NI6_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_RXTYPE(/;"	d
bfin_write_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCOUNT(/;"	d
bfin_write_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCOUNT(/;"	d
bfin_write_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCOUNT(/;"	d
bfin_write_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCOUNT(/;"	d
bfin_write_USB_EP_NI6_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCOUNT(/;"	d
bfin_write_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCSR(/;"	d
bfin_write_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCSR(/;"	d
bfin_write_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCSR(/;"	d
bfin_write_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCSR(/;"	d
bfin_write_USB_EP_NI6_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXCSR(/;"	d
bfin_write_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_TXMAXP(/;"	d
bfin_write_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXMAXP(/;"	d
bfin_write_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXMAXP(/;"	d
bfin_write_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXMAXP(/;"	d
bfin_write_USB_EP_NI6_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXMAXP(/;"	d
bfin_write_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI6_TXTYPE(/;"	d
bfin_write_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXTYPE(/;"	d
bfin_write_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXTYPE(/;"	d
bfin_write_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXTYPE(/;"	d
bfin_write_USB_EP_NI6_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI6_TXTYPE(/;"	d
bfin_write_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCOUNT(/;"	d
bfin_write_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCOUNT(/;"	d
bfin_write_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCOUNT(/;"	d
bfin_write_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCOUNT(/;"	d
bfin_write_USB_EP_NI7_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCOUNT(/;"	d
bfin_write_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCSR(/;"	d
bfin_write_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCSR(/;"	d
bfin_write_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCSR(/;"	d
bfin_write_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCSR(/;"	d
bfin_write_USB_EP_NI7_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXCSR(/;"	d
bfin_write_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_RXMAXP(/;"	d
bfin_write_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXMAXP(/;"	d
bfin_write_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXMAXP(/;"	d
bfin_write_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXMAXP(/;"	d
bfin_write_USB_EP_NI7_RXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXMAXP(/;"	d
bfin_write_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_RXTYPE(/;"	d
bfin_write_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXTYPE(/;"	d
bfin_write_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXTYPE(/;"	d
bfin_write_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXTYPE(/;"	d
bfin_write_USB_EP_NI7_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_RXTYPE(/;"	d
bfin_write_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCOUNT(/;"	d
bfin_write_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCOUNT(/;"	d
bfin_write_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCOUNT(/;"	d
bfin_write_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCOUNT(/;"	d
bfin_write_USB_EP_NI7_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCOUNT(/;"	d
bfin_write_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCSR(/;"	d
bfin_write_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCSR(/;"	d
bfin_write_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCSR(/;"	d
bfin_write_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCSR(/;"	d
bfin_write_USB_EP_NI7_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXCSR(/;"	d
bfin_write_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXINTERVAL(/;"	d
bfin_write_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_TXMAXP(/;"	d
bfin_write_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXMAXP(/;"	d
bfin_write_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXMAXP(/;"	d
bfin_write_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXMAXP(/;"	d
bfin_write_USB_EP_NI7_TXMAXP	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXMAXP(/;"	d
bfin_write_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_EP_NI7_TXTYPE(/;"	d
bfin_write_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXTYPE(/;"	d
bfin_write_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXTYPE(/;"	d
bfin_write_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXTYPE(/;"	d
bfin_write_USB_EP_NI7_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_EP_NI7_TXTYPE(/;"	d
bfin_write_USB_FADDR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_FADDR(/;"	d
bfin_write_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_FADDR(/;"	d
bfin_write_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_FADDR(/;"	d
bfin_write_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_FADDR(/;"	d
bfin_write_USB_FADDR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_FADDR(/;"	d
bfin_write_USB_FRAME	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_FRAME(/;"	d
bfin_write_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_FRAME(/;"	d
bfin_write_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_FRAME(/;"	d
bfin_write_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_FRAME(/;"	d
bfin_write_USB_FRAME	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_FRAME(/;"	d
bfin_write_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_FS_EOF1(/;"	d
bfin_write_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_FS_EOF1(/;"	d
bfin_write_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_FS_EOF1(/;"	d
bfin_write_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_FS_EOF1(/;"	d
bfin_write_USB_FS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_FS_EOF1(/;"	d
bfin_write_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_GLOBAL_CTL(/;"	d
bfin_write_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_GLOBAL_CTL(/;"	d
bfin_write_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_GLOBAL_CTL(/;"	d
bfin_write_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_GLOBAL_CTL(/;"	d
bfin_write_USB_GLOBAL_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_GLOBAL_CTL(/;"	d
bfin_write_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_GLOBINTR(/;"	d
bfin_write_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_GLOBINTR(/;"	d
bfin_write_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_GLOBINTR(/;"	d
bfin_write_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_GLOBINTR(/;"	d
bfin_write_USB_GLOBINTR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_GLOBINTR(/;"	d
bfin_write_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_HS_EOF1(/;"	d
bfin_write_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_HS_EOF1(/;"	d
bfin_write_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_HS_EOF1(/;"	d
bfin_write_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_HS_EOF1(/;"	d
bfin_write_USB_HS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_HS_EOF1(/;"	d
bfin_write_USB_INDEX	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INDEX(/;"	d
bfin_write_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INDEX(/;"	d
bfin_write_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INDEX(/;"	d
bfin_write_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INDEX(/;"	d
bfin_write_USB_INDEX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INDEX(/;"	d
bfin_write_USB_INTRRX	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INTRRX(/;"	d
bfin_write_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INTRRX(/;"	d
bfin_write_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INTRRX(/;"	d
bfin_write_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INTRRX(/;"	d
bfin_write_USB_INTRRX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INTRRX(/;"	d
bfin_write_USB_INTRRXE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INTRRXE(/;"	d
bfin_write_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INTRRXE(/;"	d
bfin_write_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INTRRXE(/;"	d
bfin_write_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INTRRXE(/;"	d
bfin_write_USB_INTRRXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INTRRXE(/;"	d
bfin_write_USB_INTRTX	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INTRTX(/;"	d
bfin_write_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INTRTX(/;"	d
bfin_write_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INTRTX(/;"	d
bfin_write_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INTRTX(/;"	d
bfin_write_USB_INTRTX	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INTRTX(/;"	d
bfin_write_USB_INTRTXE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INTRTXE(/;"	d
bfin_write_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INTRTXE(/;"	d
bfin_write_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INTRTXE(/;"	d
bfin_write_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INTRTXE(/;"	d
bfin_write_USB_INTRTXE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INTRTXE(/;"	d
bfin_write_USB_INTRUSB	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INTRUSB(/;"	d
bfin_write_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INTRUSB(/;"	d
bfin_write_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INTRUSB(/;"	d
bfin_write_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INTRUSB(/;"	d
bfin_write_USB_INTRUSB	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INTRUSB(/;"	d
bfin_write_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_INTRUSBE(/;"	d
bfin_write_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_INTRUSBE(/;"	d
bfin_write_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_INTRUSBE(/;"	d
bfin_write_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_INTRUSBE(/;"	d
bfin_write_USB_INTRUSBE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_INTRUSBE(/;"	d
bfin_write_USB_LINKINFO	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_LINKINFO(/;"	d
bfin_write_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_LINKINFO(/;"	d
bfin_write_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_LINKINFO(/;"	d
bfin_write_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_LINKINFO(/;"	d
bfin_write_USB_LINKINFO	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_LINKINFO(/;"	d
bfin_write_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_LS_EOF1(/;"	d
bfin_write_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_LS_EOF1(/;"	d
bfin_write_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_LS_EOF1(/;"	d
bfin_write_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_LS_EOF1(/;"	d
bfin_write_USB_LS_EOF1	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_LS_EOF1(/;"	d
bfin_write_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_NAKLIMIT0(/;"	d
bfin_write_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_NAKLIMIT0(/;"	d
bfin_write_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_NAKLIMIT0(/;"	d
bfin_write_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_NAKLIMIT0(/;"	d
bfin_write_USB_NAKLIMIT0	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_NAKLIMIT0(/;"	d
bfin_write_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_OTG_DEV_CTL(/;"	d
bfin_write_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_OTG_DEV_CTL(/;"	d
bfin_write_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_OTG_DEV_CTL(/;"	d
bfin_write_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_OTG_DEV_CTL(/;"	d
bfin_write_USB_OTG_DEV_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_OTG_DEV_CTL(/;"	d
bfin_write_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_OTG_VBUS_IRQ(/;"	d
bfin_write_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_IRQ(/;"	d
bfin_write_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_IRQ(/;"	d
bfin_write_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_IRQ(/;"	d
bfin_write_USB_OTG_VBUS_IRQ	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_IRQ(/;"	d
bfin_write_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_OTG_VBUS_MASK(/;"	d
bfin_write_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_MASK(/;"	d
bfin_write_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_MASK(/;"	d
bfin_write_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_MASK(/;"	d
bfin_write_USB_OTG_VBUS_MASK	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_OTG_VBUS_MASK(/;"	d
bfin_write_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_PHY_TEST(/;"	d
bfin_write_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_PHY_TEST(/;"	d
bfin_write_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_PHY_TEST(/;"	d
bfin_write_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_PHY_TEST(/;"	d
bfin_write_USB_PHY_TEST	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_PHY_TEST(/;"	d
bfin_write_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_PLLOSC_CTRL(/;"	d
bfin_write_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_PLLOSC_CTRL(/;"	d
bfin_write_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_PLLOSC_CTRL(/;"	d
bfin_write_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_PLLOSC_CTRL(/;"	d
bfin_write_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_PLLOSC_CTRL(/;"	d
bfin_write_USB_PLLOSC_CTRL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_USB_PLLOSC_CTRL(/;"	d
bfin_write_USB_POWER	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_POWER(/;"	d
bfin_write_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_POWER(/;"	d
bfin_write_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_POWER(/;"	d
bfin_write_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_POWER(/;"	d
bfin_write_USB_POWER	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_POWER(/;"	d
bfin_write_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_RXCOUNT(/;"	d
bfin_write_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_RXCOUNT(/;"	d
bfin_write_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_RXCOUNT(/;"	d
bfin_write_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_RXCOUNT(/;"	d
bfin_write_USB_RXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_RXCOUNT(/;"	d
bfin_write_USB_RXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_RXCSR(/;"	d
bfin_write_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_RXCSR(/;"	d
bfin_write_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_RXCSR(/;"	d
bfin_write_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_RXCSR(/;"	d
bfin_write_USB_RXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_RXCSR(/;"	d
bfin_write_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_RXINTERVAL(/;"	d
bfin_write_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_RXINTERVAL(/;"	d
bfin_write_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_RXINTERVAL(/;"	d
bfin_write_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_RXINTERVAL(/;"	d
bfin_write_USB_RXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_RXINTERVAL(/;"	d
bfin_write_USB_RXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_RXTYPE(/;"	d
bfin_write_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_RXTYPE(/;"	d
bfin_write_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_RXTYPE(/;"	d
bfin_write_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_RXTYPE(/;"	d
bfin_write_USB_RXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_RXTYPE(/;"	d
bfin_write_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_RX_MAX_PACKET(/;"	d
bfin_write_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_RX_MAX_PACKET(/;"	d
bfin_write_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_RX_MAX_PACKET(/;"	d
bfin_write_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_RX_MAX_PACKET(/;"	d
bfin_write_USB_RX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_RX_MAX_PACKET(/;"	d
bfin_write_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_SRP_CLKDIV(/;"	d
bfin_write_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_SRP_CLKDIV(/;"	d
bfin_write_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_SRP_CLKDIV(/;"	d
bfin_write_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_SRP_CLKDIV(/;"	d
bfin_write_USB_SRP_CLKDIV	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_SRP_CLKDIV(/;"	d
bfin_write_USB_TESTMODE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_TESTMODE(/;"	d
bfin_write_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_TESTMODE(/;"	d
bfin_write_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_TESTMODE(/;"	d
bfin_write_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_TESTMODE(/;"	d
bfin_write_USB_TESTMODE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_TESTMODE(/;"	d
bfin_write_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_TXCOUNT(/;"	d
bfin_write_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_TXCOUNT(/;"	d
bfin_write_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_TXCOUNT(/;"	d
bfin_write_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_TXCOUNT(/;"	d
bfin_write_USB_TXCOUNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_TXCOUNT(/;"	d
bfin_write_USB_TXCSR	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_TXCSR(/;"	d
bfin_write_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_TXCSR(/;"	d
bfin_write_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_TXCSR(/;"	d
bfin_write_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_TXCSR(/;"	d
bfin_write_USB_TXCSR	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_TXCSR(/;"	d
bfin_write_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_TXINTERVAL(/;"	d
bfin_write_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_TXINTERVAL(/;"	d
bfin_write_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_TXINTERVAL(/;"	d
bfin_write_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_TXINTERVAL(/;"	d
bfin_write_USB_TXINTERVAL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_TXINTERVAL(/;"	d
bfin_write_USB_TXTYPE	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_TXTYPE(/;"	d
bfin_write_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_TXTYPE(/;"	d
bfin_write_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_TXTYPE(/;"	d
bfin_write_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_TXTYPE(/;"	d
bfin_write_USB_TXTYPE	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_TXTYPE(/;"	d
bfin_write_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_TX_MAX_PACKET(/;"	d
bfin_write_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_TX_MAX_PACKET(/;"	d
bfin_write_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_TX_MAX_PACKET(/;"	d
bfin_write_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_TX_MAX_PACKET(/;"	d
bfin_write_USB_TX_MAX_PACKET	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_TX_MAX_PACKET(/;"	d
bfin_write_USB_VBUS_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_USB_VBUS_CTL(/;"	d
bfin_write_USB_VPLEN	arch/blackfin/include/asm/mach-bf527/BF524_cdef.h	/^#define bfin_write_USB_VPLEN(/;"	d
bfin_write_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_USB_VPLEN(/;"	d
bfin_write_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_USB_VPLEN(/;"	d
bfin_write_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_USB_VPLEN(/;"	d
bfin_write_USB_VPLEN	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_USB_VPLEN(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_VR_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_VR_CTL(/;"	d
bfin_write_WDOGA_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_WDOGA_CNT(/;"	d
bfin_write_WDOGA_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_WDOGA_CTL(/;"	d
bfin_write_WDOGA_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_WDOGA_STAT(/;"	d
bfin_write_WDOGB_CNT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_WDOGB_CNT(/;"	d
bfin_write_WDOGB_CTL	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_WDOGB_CTL(/;"	d
bfin_write_WDOGB_STAT	arch/blackfin/include/asm/mach-bf561/BF561_cdef.h	/^#define bfin_write_WDOGB_STAT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CNT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_WDOG_CNT(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_CTL	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_WDOG_CTL(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf506/BF504_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf518/BF512_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf527/BF522_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf533/BF531_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf537/BF534_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf538/BF538_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf561/def_local.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WDOG_STAT	arch/blackfin/include/asm/mach-bf609/BF609_cdef.h	/^#define bfin_write_WDOG_STAT(/;"	d
bfin_write_WPDA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPDA0(/;"	d
bfin_write_WPDA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPDA1(/;"	d
bfin_write_WPDACNT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPDACNT0(/;"	d
bfin_write_WPDACNT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPDACNT1(/;"	d
bfin_write_WPDACTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPDACTL(/;"	d
bfin_write_WPIA0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIA0(/;"	d
bfin_write_WPIA1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIA1(/;"	d
bfin_write_WPIA2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIA2(/;"	d
bfin_write_WPIA3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIA3(/;"	d
bfin_write_WPIA4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIA4(/;"	d
bfin_write_WPIA5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIA5(/;"	d
bfin_write_WPIACNT0	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACNT0(/;"	d
bfin_write_WPIACNT1	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACNT1(/;"	d
bfin_write_WPIACNT2	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACNT2(/;"	d
bfin_write_WPIACNT3	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACNT3(/;"	d
bfin_write_WPIACNT4	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACNT4(/;"	d
bfin_write_WPIACNT5	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACNT5(/;"	d
bfin_write_WPIACTL	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPIACTL(/;"	d
bfin_write_WPSTAT	arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h	/^#define bfin_write_WPSTAT(/;"	d
bfin_write_and	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_write_and(/;"	d
bfin_write_emudat	arch/blackfin/cpu/jtag-console.c	/^static inline uint32_t bfin_write_emudat(uint32_t emudat)$/;"	f	typeref:typename:uint32_t	file:
bfin_write_or	arch/blackfin/include/asm/blackfin_local.h	/^#define bfin_write_or(/;"	d
bfpr	drivers/spi/ich.h	/^	uint32_t bfpr;		\/* 0x00 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
bfrom_MemBoot	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static uint32_t (* const bfrom_MemBoot)(void *pBootStream, int32_t dFlags, int32_t dBlockCount, /;"	v	typeref:typename:uint32_t (* const)(void * pBootStream,int32_t dFlags,int32_t dBlockCount,ADI_BOOT_HOOK_FUNC * pCallHook)
bfrom_NandBoot	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static uint32_t (* const bfrom_NandBoot)(int32_t dNandAddress, int32_t dFlags, int32_t dBlockCou/;"	v	typeref:typename:uint32_t (* const)(int32_t dNandAddress,int32_t dFlags,int32_t dBlockCount,ADI_BOOT_HOOK_FUNC * pCallHook)
bfrom_OtpBoot	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static uint32_t (* const bfrom_OtpBoot)(int32_t dOtpAddress, int32_t dFlags, int32_t dBlockCount/;"	v	typeref:typename:uint32_t (* const)(int32_t dOtpAddress,int32_t dFlags,int32_t dBlockCount,ADI_BOOT_HOOK_FUNC * pCallHook)
bfrom_OtpCommand	arch/blackfin/include/asm/mach-common/bits/otp.h	/^static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)_BOOTROM_/;"	v	typeref:typename:uint32_t (* const)(uint32_t command,uint32_t value)
bfrom_OtpRead	arch/blackfin/include/asm/mach-common/bits/otp.h	/^static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) =/;"	v	typeref:typename:uint32_t (* const)(uint32_t page,uint32_t flags,uint64_t * page_content)
bfrom_OtpWrite	arch/blackfin/include/asm/mach-common/bits/otp.h	/^static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) /;"	v	typeref:typename:uint32_t (* const)(uint32_t page,uint32_t flags,uint64_t * page_content)
bfrom_SoftReset	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static inline void bfrom_SoftReset(void *new_stack)$/;"	f	typeref:typename:void
bfrom_SpiBoot	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static uint32_t (* const bfrom_SpiBoot)(int32_t dSpiAddress, int32_t dFlags, int32_t dBlockCount/;"	v	typeref:typename:uint32_t (* const)(int32_t dSpiAddress,int32_t dFlags,int32_t dBlockCount,ADI_BOOT_HOOK_FUNC * pCallHook)
bfrom_SysControl	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_sett/;"	v	typeref:typename:uint32_t (* const)(uint32_t action_flags,ADI_SYSCTRL_VALUES * power_settings,void * reserved)
bfrom_TwiBoot	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^static uint32_t (* const bfrom_TwiBoot)(int32_t dTwiAddress, int32_t dFlags, int32_t dBlockCount/;"	v	typeref:typename:uint32_t (* const)(int32_t dTwiAddress,int32_t dFlags,int32_t dBlockCount,ADI_BOOT_HOOK_FUNC * pCallHook)
bfs	include/i2s.h	/^	unsigned int bfs;		\/* Bit slock frame size *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
bfticu_iomap	board/keymile/common/common.h	/^struct bfticu_iomap {$/;"	s
bg	include/video_fb.h	/^    unsigned int bg;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
bg	scripts/kconfig/lxdialog/dialog.h	/^	int bg;		\/* background *\/$/;"	m	struct:dialog_color	typeref:typename:int
bg_block_id_csum	include/ext_common.h	/^	__le16 bg_block_id_csum;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_block_id_csum_high	include/ext_common.h	/^	__le16 bg_block_id_csum_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_bud_bytes	fs/ubifs/ubifs.h	/^	long long bg_bud_bytes;$/;"	m	struct:ubifs_info	typeref:typename:long long
bg_checksum	include/ext_common.h	/^	__le16 bg_checksum;	\/* crc16(s_uuid+group_num+group_desc)*\/$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_color	include/linux/fb.h	/^	__u32 bg_color;$/;"	m	struct:fb_image	typeref:typename:__u32
bg_color	include/linux/fb.h	/^	__u32 bg_color;$/;"	m	struct:fb_image_user	typeref:typename:__u32
bg_csc_type	drivers/video/ipu_disp.c	/^static enum csc_type_t fg_csc_type = CSC_NONE, bg_csc_type = CSC_NONE;$/;"	v	typeref:enum:csc_type_t	file:
bg_exclude_bitmap	include/ext_common.h	/^	__le32 bg_exclude_bitmap;$/;"	m	struct:ext2_block_group	typeref:typename:__le32
bg_exclude_bitmap_high	include/ext_common.h	/^	__le32 bg_exclude_bitmap_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le32
bg_flags	include/ext_common.h	/^	__le16 bg_flags;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_gcs	fs/yaffs2/yaffs_guts.h	/^	u32 bg_gcs;$/;"	m	struct:yaffs_dev	typeref:typename:u32
bg_inode_id_csum	include/ext_common.h	/^	__le16 bg_inode_id_csum;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_inode_id_csum_high	include/ext_common.h	/^	__le16 bg_inode_id_csum_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_itable_unused	include/ext_common.h	/^	__le16 bg_itable_unused; \/* Unused inodes count *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_itable_unused_high	include/ext_common.h	/^	__le16 bg_itable_unused_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
bg_reserved	include/ext_common.h	/^	__le32 bg_reserved;$/;"	m	struct:ext2_block_group	typeref:typename:__le32
bglut	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 bglut;	\/* Background Lookup Table *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
bglut	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 bglut[255];$/;"	m	struct:lcdbg_ctrl	typeref:typename:u32[255]
bgnd	drivers/video/fsl_dcu_fb.c	/^	u32 bgnd;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
bgnd	drivers/video/fsl_diu_fb.c	/^	__be32 bgnd;$/;"	m	struct:diu	typeref:typename:__be32	file:
bgnd_wb	drivers/video/fsl_diu_fb.c	/^	__be32 bgnd_wb;$/;"	m	struct:diu	typeref:typename:__be32	file:
bgr_t	tools/easylogo/easylogo.c	/^} bgr_t;$/;"	t	typeref:struct:__anonbf0fd82b0308	file:
bgt	fs/ubifs/ubifs.h	/^	struct task_struct *bgt;$/;"	m	struct:ubifs_info	typeref:struct:task_struct *
bgt_name	drivers/mtd/ubi/ubi.h	/^	char bgt_name[sizeof(UBI_BGT_NAME_PATTERN)+2];$/;"	m	struct:ubi_device	typeref:typename:char[]
bgt_name	fs/ubifs/ubifs.h	/^	char bgt_name[sizeof(BGT_NAME_PATTERN) + 9];$/;"	m	struct:ubifs_info	typeref:typename:char[]
bgt_thread	drivers/mtd/ubi/ubi.h	/^	struct task_struct *bgt_thread;$/;"	m	struct:ubi_device	typeref:struct:task_struct *
bgx	drivers/video/cfb_console.c	/^static u32 eorx, fgx, bgx;	\/* color pats *\/$/;"	v	typeref:typename:u32	file:
bh	drivers/bios_emulator/include/biosemu.h	/^	u8 bh, bl;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
bh	drivers/bios_emulator/include/biosemu.h	/^	u8 bh;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
bi	fs/ubifs/ubifs.h	/^	struct ubifs_budg_info bi;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_budg_info
biBitCount	board/esd/common/lcd.h	/^	unsigned short biBitCount;       \/* Number of bits per pixel *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned short
biClrImportant	board/esd/common/lcd.h	/^	unsigned int   biClrImportant;   \/* Number of important colors *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned int
biClrUsed	board/esd/common/lcd.h	/^	unsigned int   biClrUsed;        \/* Number of colors used *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned int
biCompression	board/esd/common/lcd.h	/^	unsigned int   biCompression;    \/* Type of compression to use *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned int
biHeight	board/esd/common/lcd.h	/^	int            biHeight;         \/* Height of image *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:int
biPlanes	board/esd/common/lcd.h	/^	unsigned short biPlanes;         \/* Number of color planes *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned short
biSize	board/esd/common/lcd.h	/^	unsigned int   biSize;           \/* Size of info header *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned int
biSizeImage	board/esd/common/lcd.h	/^	unsigned int   biSizeImage;      \/* Size of image data *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:unsigned int
biWidth	board/esd/common/lcd.h	/^	int            biWidth;          \/* Width of image *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:int
biXPelsPerMeter	board/esd/common/lcd.h	/^	int            biXPelsPerMeter;  \/* X pixels per meter *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:int
biYPelsPerMeter	board/esd/common/lcd.h	/^	int            biYPelsPerMeter;  \/* Y pixels per meter *\/$/;"	m	struct:__anon5a5858080208	typeref:typename:int
bi_arch_number	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_arch_number;	\/* unique id for this board *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_arch_number	arch/openrisc/include/asm/u-boot.h	/^	unsigned long	bi_arch_number;	\/* unique id for this board *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_arch_number	include/asm-generic/u-boot.h	/^	ulong	        bi_arch_number;	\/* unique id for this board *\/$/;"	m	struct:bd_info	typeref:typename:ulong
bi_arm_freq	include/asm-generic/u-boot.h	/^	unsigned long	bi_arm_freq; \/* arm frequency *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_bar	api/api_platform-powerpc.c	/^#define bi_bar	/;"	d	file:
bi_baudrate	arch/xtensa/include/asm/u-boot.h	/^	int		bi_baudrate;	\/* serial console baudrate *\/$/;"	m	struct:bd_info	typeref:typename:int
bi_board_name	arch/blackfin/include/asm/u-boot.h	/^	const char *bi_board_name;$/;"	m	struct:bd_info	typeref:typename:const char *
bi_board_number	include/asm-generic/u-boot.h	/^	unsigned long   bi_board_number;\/* ATAG_BOARDINFO *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_boot_params	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_boot_params;	\/* where this board expects params *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_boot_params	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_boot_params;	\/* where this board expects params *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_boot_params	arch/openrisc/include/asm/u-boot.h	/^	unsigned long	bi_boot_params;	\/* where this board expects params *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_boot_params	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_boot_params;	\/* where this board expects params *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_boot_params	include/asm-generic/u-boot.h	/^	ulong	        bi_boot_params;	\/* where this board expects params *\/$/;"	m	struct:bd_info	typeref:typename:ulong
bi_bootflags	include/asm-generic/u-boot.h	/^	unsigned long	bi_bootflags;	\/* boot \/ reboot flag (Unused) *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_brgfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_brgfreq;	\/* BRG_CLK Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_buf	lib/zlib/deflate.h	/^    ush bi_buf;$/;"	m	struct:internal_state	typeref:typename:ush
bi_busfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_busfreq;	\/* Bus Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_cclk	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_cclk;$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_cpmfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_cpmfreq;	\/* CPM_CLK Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_cpu	arch/blackfin/include/asm/u-boot.h	/^	const char *bi_cpu;$/;"	m	struct:bd_info	typeref:typename:const char *
bi_ddr_freq	include/asm-generic/u-boot.h	/^	unsigned long	bi_ddr_freq; \/* ddr frequency *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_dram	arch/nds32/include/asm/u-boot.h	/^	} bi_dram[CONFIG_NR_DRAM_BANKS];$/;"	m	struct:bd_info	typeref:struct:bd_info::__anond2dc725a0108[]
bi_dram	include/asm-generic/u-boot.h	/^	} bi_dram[CONFIG_NR_DRAM_BANKS];$/;"	m	struct:bd_info	typeref:struct:bd_info::__anon1afe92be0108[]
bi_dsp_freq	include/asm-generic/u-boot.h	/^	unsigned long	bi_dsp_freq; \/* dsp core frequency *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_enet1addr	include/asm-generic/u-boot.h	/^	unsigned char   bi_enet1addr[6];	\/* OLD: see README.enetaddr *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enet2addr	include/asm-generic/u-boot.h	/^	unsigned char	bi_enet2addr[6];	\/* OLD: see README.enetaddr *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enet3addr	include/asm-generic/u-boot.h	/^	unsigned char   bi_enet3addr[6];	\/* OLD: see README.enetaddr *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enet4addr	include/asm-generic/u-boot.h	/^	unsigned char   bi_enet4addr[6];	\/* OLD: see README.enetaddr *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enet5addr	include/asm-generic/u-boot.h	/^	unsigned char   bi_enet5addr[6];	\/* OLD: see README.enetaddr *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enetaddr	arch/blackfin/include/asm/u-boot.h	/^	unsigned char bi_enetaddr[6];$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enetaddr	arch/nds32/include/asm/u-boot.h	/^	unsigned char	bi_enetaddr[6];$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enetaddr	arch/xtensa/include/asm/u-boot.h	/^	unsigned char	bi_enetaddr[6];	\/* Ethernet adress *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_enetaddr	include/asm-generic/u-boot.h	/^	unsigned char	bi_enetaddr[6];	\/* OLD: see README.enetaddr *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_ethspeed	include/asm-generic/u-boot.h	/^	unsigned short	bi_ethspeed;	\/* Ethernet speed in Mbps *\/$/;"	m	struct:bd_info	typeref:typename:unsigned short
bi_flashoffset	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_flashoffset;	\/* reserved area for startup monitor *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashoffset	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_flashoffset; \/* reserved area for startup monitor *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashoffset	arch/openrisc/include/asm/u-boot.h	/^	unsigned long	bi_flashoffset;	\/* reserved area for startup monitor *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashoffset	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_flashoffset;	\/* offset to skip UBoot image *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashoffset	include/asm-generic/u-boot.h	/^	unsigned long	bi_flashoffset; \/* reserved area for startup monitor *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashsize	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_flashsize;	\/* size  of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashsize	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_flashsize;	\/* size	 of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashsize	arch/openrisc/include/asm/u-boot.h	/^	unsigned long	bi_flashsize;	\/* size  of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashsize	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_flashsize;	\/* size  of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashsize	include/asm-generic/u-boot.h	/^	unsigned long	bi_flashsize;	\/* size	 of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashstart	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_flashstart;	\/* start of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashstart	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_flashstart;	\/* start of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashstart	arch/openrisc/include/asm/u-boot.h	/^	unsigned long	bi_flashstart;	\/* start of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashstart	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_flashstart;	\/* start of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flashstart	include/asm-generic/u-boot.h	/^	unsigned long	bi_flashstart;	\/* start of FLASH memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flbfreq	include/asm-generic/u-boot.h	/^	unsigned long bi_flbfreq;	\/* Flexbus Freq in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_flush	lib/zlib/trees.c	/^local void bi_flush(s)$/;"	f
bi_iic_fast	include/asm-generic/u-boot.h	/^	int		bi_iic_fast[2];		\/* Use fast i2c mode *\/$/;"	m	struct:bd_info	typeref:typename:int[2]
bi_immr_base	include/asm-generic/u-boot.h	/^	unsigned long	bi_immr_base;	\/* base of IMMR register *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_immrbar	include/asm-generic/u-boot.h	/^	unsigned long	bi_immrbar;$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_inpfreq	include/asm-generic/u-boot.h	/^	unsigned long bi_inpfreq;	\/* input Freq in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_intfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_intfreq;	\/* Internal Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_ip_addr	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_ip_addr;	\/* IP Address *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_ip_addr	include/asm-generic/u-boot.h	/^	unsigned long	bi_ip_addr;	\/* IP Address *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_ipbfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_ipbfreq;	\/* IPB Bus Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_ipsfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_ipsfreq;	\/* IPS Bus Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_mbar_base	include/asm-generic/u-boot.h	/^	unsigned long	bi_mbar_base;	\/* base of internal registers *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memsize	arch/blackfin/include/asm/u-boot.h	/^	phys_size_t bi_memsize;		\/* size  of DRAM memory in bytes *\/$/;"	m	struct:bd_info	typeref:typename:phys_size_t
bi_memsize	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_memsize;	\/* size	 of DRAM memory in bytes *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memsize	arch/openrisc/include/asm/u-boot.h	/^	phys_size_t	bi_memsize;	\/* size of DRAM memory in bytes *\/$/;"	m	struct:bd_info	typeref:typename:phys_size_t
bi_memsize	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_memsize;	\/* size	 of DRAM memory in bytes *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memsize	include/asm-generic/u-boot.h	/^	phys_size_t	bi_memsize;	\/* size	 of DRAM memory in bytes *\/$/;"	m	struct:bd_info	typeref:typename:phys_size_t
bi_memstart	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_memstart;	\/* start of DRAM memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memstart	arch/nds32/include/asm/u-boot.h	/^	unsigned long	bi_memstart;	\/* start of DRAM memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memstart	arch/openrisc/include/asm/u-boot.h	/^	unsigned long	bi_memstart;	\/* start of DRAM memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memstart	arch/xtensa/include/asm/u-boot.h	/^	unsigned long	bi_memstart;	\/* start of DRAM memory VA *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_memstart	include/asm-generic/u-boot.h	/^	unsigned long	bi_memstart;	\/* start of DRAM memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_on	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	char bi_on;	\/* Bank interleaving enable *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:char
bi_opbfreq	include/asm-generic/u-boot.h	/^	unsigned int	bi_opbfreq;		\/* OPB clock in Hz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned int
bi_pci_busfreq	include/asm-generic/u-boot.h	/^	unsigned int	bi_pci_busfreq;	\/* PCI Bus speed, in Hz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned int
bi_pci_enetaddr	include/asm-generic/u-boot.h	/^	unsigned char	bi_pci_enetaddr[6];	\/* PCI Ethernet MAC address *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[6]
bi_pcifreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_pcifreq;	\/* PCI Bus Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_phy_id	include/asm-generic/u-boot.h	/^	unsigned char   bi_phy_id[4];   \/* PHY address for ATAG_ETHERNET *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[4]
bi_phymode	include/asm-generic/u-boot.h	/^	int		bi_phymode[1];          \/* Determines phy mode *\/$/;"	m	struct:bd_info	typeref:typename:int[1]
bi_phymode	include/asm-generic/u-boot.h	/^	int		bi_phymode[2];          \/* Determines phy mode *\/$/;"	m	struct:bd_info	typeref:typename:int[2]
bi_phymode	include/asm-generic/u-boot.h	/^	int		bi_phymode[4];          \/* Determines phy mode *\/$/;"	m	struct:bd_info	typeref:typename:int[4]
bi_phynum	include/asm-generic/u-boot.h	/^	int		bi_phynum[1];           \/* Determines phy mapping *\/$/;"	m	struct:bd_info	typeref:typename:int[1]
bi_phynum	include/asm-generic/u-boot.h	/^	int		bi_phynum[2];           \/* Determines phy mapping *\/$/;"	m	struct:bd_info	typeref:typename:int[2]
bi_phynum	include/asm-generic/u-boot.h	/^	int		bi_phynum[4];           \/* Determines phy mapping *\/$/;"	m	struct:bd_info	typeref:typename:int[4]
bi_plb_busfreq	include/asm-generic/u-boot.h	/^	unsigned int	bi_plb_busfreq;	\/* PLB Bus speed, in Hz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned int
bi_procfreq	include/asm-generic/u-boot.h	/^	unsigned int	bi_procfreq;	\/* CPU (Internal) Freq, in Hz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned int
bi_r_version	arch/blackfin/include/asm/u-boot.h	/^	const char *bi_r_version;$/;"	m	struct:bd_info	typeref:typename:const char *
bi_r_version	include/asm-generic/u-boot.h	/^	unsigned char	bi_r_version[32];	\/* Version of the ROM (AMCC) *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[32]
bi_reverse	lib/zlib/trees.c	/^local unsigned bi_reverse(value, len)$/;"	f
bi_s_version	include/asm-generic/u-boot.h	/^	unsigned char	bi_s_version[4];	\/* Version of this structure *\/$/;"	m	struct:bd_info	typeref:typename:unsigned char[4]
bi_sccfreq	include/asm-generic/u-boot.h	/^	unsigned long	bi_sccfreq;	\/* SCC_CLK Freq, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_sclk	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_sclk;$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_sramsize	include/asm-generic/u-boot.h	/^	unsigned long	bi_sramsize;	\/* size	 of SRAM memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_sramstart	include/asm-generic/u-boot.h	/^	unsigned long	bi_sramstart;	\/* start of SRAM memory *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_valid	lib/zlib/deflate.h	/^    int bi_valid;$/;"	m	struct:internal_state	typeref:typename:int
bi_vco	arch/blackfin/include/asm/u-boot.h	/^	unsigned long bi_vco;$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_vco	include/asm-generic/u-boot.h	/^	unsigned long	bi_vco;		\/* VCO Out from PLL, in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_vcofreq	include/asm-generic/u-boot.h	/^	unsigned long bi_vcofreq;	\/* vco Freq in MHz *\/$/;"	m	struct:bd_info	typeref:typename:unsigned long
bi_windup	lib/zlib/trees.c	/^local void bi_windup(s)$/;"	f
bibliofileid	disk/part_iso.h	/^	char					bibliofileid[37]; \/* bibliographic file identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[37]
bibliofileid	disk/part_iso.h	/^	char					bibliofileid[37]; \/* bibliographic file identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[37]
bidr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 bidr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
big_endian	board/dbau1x00/lowlevel_init.S	/^big_endian:$/;"	l
big_endian	board/pb1x00/lowlevel_init.S	/^big_endian:$/;"	l
big_endian	include/linux/usb/musb.h	/^	unsigned	big_endian:1;	\/* true if CPU uses big-endian *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned:1
big_lpt	fs/ubifs/ubifs.h	/^	unsigned int big_lpt:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
bin2bcd	include/bcd.h	/^static inline unsigned int bin2bcd(unsigned int val)$/;"	f	typeref:typename:unsigned int
bin_at	common/dlmalloc.c	/^#define bin_at(/;"	d	file:
bin_data_char	cmd/load.c	/^static void bin_data_char(char new_char)$/;"	f	typeref:typename:void	file:
bin_data_init	cmd/load.c	/^static void bin_data_init(void)$/;"	f	typeref:typename:void	file:
bin_format	drivers/fpga/zynqmppl.c	/^static const u32 bin_format[] = {$/;"	v	typeref:typename:const u32[]	file:
bin_format	drivers/fpga/zynqpl.c	/^static const u32 bin_format[] = {$/;"	v	typeref:typename:const u32[]	file:
bin_index	common/dlmalloc.c	/^#define bin_index(/;"	d	file:
bin_start_address	cmd/load.c	/^static char *bin_start_address;$/;"	v	typeref:typename:char *	file:
bin_to_mgray	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static u32 bin_to_mgray(int val)$/;"	f	typeref:typename:u32	file:
binary	cmd/immap.c	/^static void binary (char *label, uint value, int nbits)$/;"	f	typeref:typename:void	file:
binary	doc/README.x86	/^binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP$/;"	l
binary	tools/kwbimage.c	/^		} binary;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:struct:image_cfg_element::__anon9793d65d020a::__anon9793d65d0308	file:
binary_size_check	Makefile	/^binary_size_check: u-boot-nodtb.bin FORCE$/;"	t
binary_test	cmd/itest.c	/^static int binary_test(char *op, char *arg1, char *arg2, int w)$/;"	f	typeref:typename:int	file:
binblocks_r	common/dlmalloc.c	/^#define binblocks_r /;"	d	file:
binblocks_w	common/dlmalloc.c	/^#define binblocks_w /;"	d	file:
bind	include/dm/device.h	/^	int (*bind)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
bind	include/linux/usb/composite.h	/^	int			(*bind)(struct usb_composite_dev *);$/;"	m	struct:usb_composite_driver	typeref:typename:int (*)(struct usb_composite_dev *)
bind	include/linux/usb/composite.h	/^	int			(*bind)(struct usb_configuration *);$/;"	m	struct:usb_configuration	typeref:typename:int (*)(struct usb_configuration *)
bind	include/linux/usb/composite.h	/^	int			(*bind)(struct usb_configuration *,$/;"	m	struct:usb_function	typeref:typename:int (*)(struct usb_configuration *,struct usb_function *)
bind	include/linux/usb/gadget.h	/^	int			(*bind)(struct usb_gadget *);$/;"	m	struct:usb_gadget_driver	typeref:typename:int (*)(struct usb_gadget *)
bind_flag	test/dm/bus.c	/^	int bind_flag;$/;"	m	struct:dm_test_parent_platdata	typeref:typename:int	file:
bind_textdomain_codeset	scripts/kconfig/lkc.h	/^static inline char *bind_textdomain_codeset(const char *dn, char *c) { return c; }$/;"	f	typeref:typename:char *
bindtextdomain	scripts/kconfig/lkc.h	/^static inline void bindtextdomain(const char *name, const char *dir) {}$/;"	f	typeref:typename:void
bior	include/linux/immap_qe.h	/^	u32 bior;$/;"	m	struct:rsp	typeref:typename:u32
bios	include/linux/apm_bios.h	/^	struct apm_bios_info	bios;$/;"	m	struct:apm_info	typeref:struct:apm_bios_info
bios_5_scratch	drivers/video/ati_radeon_fb.h	/^	u32		bios_5_scratch;$/;"	m	struct:radeon_regs	typeref:typename:u32
bios_characteristics	include/smbios.h	/^	u64 bios_characteristics;$/;"	m	struct:smbios_type0	typeref:typename:u64
bios_characteristics_ext1	include/smbios.h	/^	u8 bios_characteristics_ext1;$/;"	m	struct:smbios_type0	typeref:typename:u8
bios_characteristics_ext2	include/smbios.h	/^	u8 bios_characteristics_ext2;$/;"	m	struct:smbios_type0	typeref:typename:u8
bios_linker_add_checksum	drivers/misc/qfw.c	/^static int bios_linker_add_checksum(struct bios_linker_entry *entry)$/;"	f	typeref:typename:int	file:
bios_linker_add_pointer	drivers/misc/qfw.c	/^static int bios_linker_add_pointer(struct bios_linker_entry *entry)$/;"	f	typeref:typename:int	file:
bios_linker_allocate	drivers/misc/qfw.c	/^static int bios_linker_allocate(struct bios_linker_entry *entry, u32 *addr)$/;"	f	typeref:typename:int	file:
bios_linker_entry	include/qfw.h	/^struct bios_linker_entry {$/;"	s
bios_major_release	include/smbios.h	/^	u8 bios_major_release;$/;"	m	struct:smbios_type0	typeref:typename:u8
bios_minor_release	include/smbios.h	/^	u8 bios_minor_release;$/;"	m	struct:smbios_type0	typeref:typename:u8
bios_msg_ack	arch/x86/include/asm/me_common.h	/^	u32 bios_msg_ack:4;$/;"	m	struct:me_hfs	typeref:typename:u32:4
bios_ptr	drivers/bios_emulator/atibios.c	/^static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,$/;"	f	typeref:typename:const void *	file:
bios_release_date	include/smbios.h	/^	u8 bios_release_date;$/;"	m	struct:smbios_type0	typeref:typename:u8
bios_rom_size	include/smbios.h	/^	u8 bios_rom_size;$/;"	m	struct:smbios_type0	typeref:typename:u8
bios_run_on_x86	arch/x86/lib/bios.c	/^void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode,$/;"	f	typeref:typename:void
bios_set_interrupt_handler	arch/x86/lib/bios.c	/^void bios_set_interrupt_handler(int intnum, int (*int_func)(void))$/;"	f	typeref:typename:void
bios_start_segment	include/smbios.h	/^	u16 bios_start_segment;$/;"	m	struct:smbios_type0	typeref:typename:u16
bios_ver	include/smbios.h	/^	u8 bios_ver;$/;"	m	struct:smbios_type0	typeref:typename:u8
biosemu_run	drivers/bios_emulator/atibios.c	/^int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,$/;"	f	typeref:typename:int
biosemu_set_interrupt_handler	drivers/bios_emulator/atibios.c	/^void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))$/;"	f	typeref:typename:void
biosemu_setup	drivers/bios_emulator/atibios.c	/^int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)$/;"	f	typeref:typename:int
biosmem_base	drivers/bios_emulator/include/biosemu.h	/^	ulong biosmem_base;$/;"	m	struct:__anon964d10140108	typeref:typename:ulong
biosmem_limit	drivers/bios_emulator/include/biosemu.h	/^	ulong biosmem_limit;$/;"	m	struct:__anon964d10140108	typeref:typename:ulong
bir	drivers/serial/serial_mxc.c	/^	u32 bir;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
bis	arch/powerpc/include/asm/ppc4xx-emac.h	/^    bd_t		*bis;	\/* for eth_init upon mal error *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:bd_t *
bist	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 bist[17];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[17]
bist	arch/x86/include/asm/global_data.h	/^	uint32_t bist;			\/* Built-in self test value *\/$/;"	m	struct:arch_global_data	typeref:typename:uint32_t
bist1_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist1_ctr_reg;	\/* 0xF4 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist1_rslt_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist1_rslt_reg;	\/* 0x108 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist2_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist2_ctr_reg;	\/* 0xF8 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist2_rslt_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist2_rslt_reg;	\/* 0x10C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist3_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist3_ctr_reg;	\/* 0xFC *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist3_rslt_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist3_rslt_reg;	\/* 0x110 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist4_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist4_ctr_reg;	\/* 0x100 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist4_rslt_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist4_rslt_reg;	\/* 0x114 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist5_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist5_ctr_reg;	\/* 0x104 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist5_rslt_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 bist5_rslt_reg;	\/* 0x118 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
bist_cr	drivers/block/mvsata_ide.c	/^	u32 bist_cr;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
bist_dw1	drivers/block/mvsata_ide.c	/^	u32 bist_dw1;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
bist_dw2	drivers/block/mvsata_ide.c	/^	u32 bist_dw2;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
bist_error_cnt	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	u32 bist_error_cnt;$/;"	m	struct:bist_result	typeref:typename:u32
bist_fail_high	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	u32 bist_fail_high;$/;"	m	struct:bist_result	typeref:typename:u32
bist_fail_low	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	u32 bist_fail_low;$/;"	m	struct:bist_result	typeref:typename:u32
bist_in_prog	arch/x86/include/asm/me_common.h	/^	u32 bist_in_prog:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
bist_in_progress	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 bist_in_progress:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
bist_last_fail_addr	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^	u32 bist_last_fail_addr;$/;"	m	struct:bist_result	typeref:typename:u32
bist_mode	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int bist_mode;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
bist_offset	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^static u32 bist_offset = 32;$/;"	v	typeref:typename:u32	file:
bist_pattern	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int bist_pattern;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
bist_result	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^struct bist_result {$/;"	s
bistafr	drivers/block/dwc_ahsata.c	/^	u32 bistafr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
bistar	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistar[3];		\/* 0x1d8 BIST address register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[3]
bistar	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistar[3];		\/* 0x1d8 BIST address register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[3]
bistar0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistar0;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistar0;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistar0;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistar0;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistar1;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistar1;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistar1;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistar1;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistar2;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistar2;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistar2;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistar2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistar2;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistber[4];		\/* 0x1f0 BIST bit error register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
bistber	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistber[4];		\/* 0x1f0 BIST bit error register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
bistber0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistber0;		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistber0;		\/* 0x130 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistber0;		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistber0;		\/* 0x130 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistber1;		\/* 0x130 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistber1;		\/* 0x134 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistber1;		\/* 0x130 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistber1;		\/* 0x134 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistber2;		\/* 0x134 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistber2;		\/* 0x138 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistber2;		\/* 0x134 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistber2;		\/* 0x138 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistber3;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistber3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistber3;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistcfg	include/fsl_usb.h	/^	u32	bistcfg;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
bistcr	drivers/block/dwc_ahsata.c	/^	u32 bistcr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
bistcr	drivers/block/sata_dwc.c	/^	u32 bistcr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
bistdecr	drivers/block/dwc_ahsata.c	/^	u32 bistdecr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
bistdecr	drivers/block/sata_dwc.c	/^	u32 bistdecr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
bistfctr	drivers/block/dwc_ahsata.c	/^	u32 bistfctr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
bistfctr	drivers/block/sata_dwc.c	/^	u32 bistfctr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
bistfwr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistfwr[3];		\/* 0x204 BIST fail word register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[3]
bistfwr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistfwr[3];		\/* 0x204 BIST fail word register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[3]
bistfwr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistfwr0;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistfwr0;		\/* 0x144 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistfwr0;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistfwr0;		\/* 0x144 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistfwr1;		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistfwr1;		\/* 0x148 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistfwr1;		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistfwr1;		\/* 0x148 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistfwr2;		\/* 0x14c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistfwr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistfwr2;		\/* 0x14c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistgsr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistgsr;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistgsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistgsr;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistgsr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistgsr;		\/* 0x1e8 BIST general status register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistgsr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistgsr;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistgsr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistgsr;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistgsr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistgsr;		\/* 0x1e8 BIST general status register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistlsr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistlsr;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistlsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistlsr;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistlsr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistlsr;		\/* 0x1d4 BIST LFSR seed register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistlsr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistlsr;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistlsr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistlsr;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistlsr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistlsr;		\/* 0x1d4 BIST LFSR seed register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistmskr[3];	\/* 0x1c8 BIST mask register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[3]
bistmskr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistmskr[3];	\/* 0x1c8 BIST mask register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[3]
bistmskr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistmskr0;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistmskr0;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistmskr0;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistmskr0;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistmskr1;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistmskr1;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistmskr1;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistmskr1;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistmskr2;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistmskr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistmskr2;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistrr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistrr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistrr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistrr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistrr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistrr;		\/* 0x1c0 BIST run register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistrr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistrr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistrr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistrr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistrr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistrr;		\/* 0x1c0 BIST run register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistsr	drivers/block/dwc_ahsata.c	/^	u32 bistsr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
bistsr	drivers/block/sata_dwc.c	/^	u32 bistsr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
biststs	include/fsl_usb.h	/^	u32	biststs;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
bistupdr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistupdr;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistupdr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistupdr;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistupdr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistupdr;		\/* 0x1e4 BIST user pattern data register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistupdr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistupdr;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistupdr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistupdr;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistupdr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistupdr;		\/* 0x1e4 BIST user pattern data register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistwcr;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistwcr;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistwcr;		\/* 0x1c4 BIST word count register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistwcr;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistwcr;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistwcr;		\/* 0x1c4 BIST word count register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcsr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistwcsr;		\/* 0x138 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistwcsr;		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcsr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistwcsr;		\/* 0x200 BIST word count status register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcsr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistwcsr;		\/* 0x138 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcsr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistwcsr;		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwcsr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistwcsr;		\/* 0x200 BIST word count status register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwer	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 bistwer;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwer	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bistwer;		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwer	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 bistwer;		\/* 0x1dc BIST word error register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwer	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 bistwer;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwer	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bistwer;		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bistwer	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 bistwer;		\/* 0x1dc BIST word error register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
bit	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 bit;		\/* trigger bit *\/$/;"	m	struct:bcm_clk_trig	typeref:typename:u32
bit	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 bit;		\/* trigger bit *\/$/;"	m	struct:bcm_clk_trig	typeref:typename:u32
bit	arch/x86/include/asm/coreboot_tables.h	/^	u32 bit;$/;"	m	struct:cb_cmos_entries	typeref:typename:u32
bit	board/gateworks/gw_ventana/ventana_eeprom.h	/^	int bit;		\/* bit within config *\/$/;"	m	struct:ventana_eeprom_config	typeref:typename:int
bit	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int bit;$/;"	m	struct:uniphier_clk_gate_data	typeref:typename:unsigned int
bit	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int bit;$/;"	m	struct:meson_pmx_group	typeref:typename:unsigned int
bit	drivers/reset/reset-uniphier.c	/^	unsigned int bit;$/;"	m	struct:uniphier_reset_data	typeref:typename:unsigned int	file:
bit	include/jffs2/mini_inflate.h	/^	unsigned char bit;   \/* 0 to 7 *\/$/;"	m	struct:bitstream	typeref:typename:unsigned char
bit_count	include/bmp_layout.h	/^	__u16	bit_count;$/;"	m	struct:bmp_header	typeref:typename:__u16
bit_offset	arch/x86/include/asm/acpi_table.h	/^	u8 bit_offset;	\/* Register bit offset *\/$/;"	m	struct:acpi_gen_regaddr	typeref:typename:u8
bit_or	arch/powerpc/include/asm/immap_512x.h	/^	int bit_or;		\/* or in the value instead of overwrite *\/$/;"	m	struct:iopin_t	typeref:typename:int
bit_width	arch/x86/include/asm/acpi_table.h	/^	u8 bit_width;	\/* Register size in bits *\/$/;"	m	struct:acpi_gen_regaddr	typeref:typename:u8
bitbang_phy_port	drivers/qe/uec_phy.c	/^static const char *bitbang_phy_port[] = {$/;"	v	typeref:typename:const char * []	file:
bitend	drivers/usb/phy/rockchip_usb2_phy.c	/^	unsigned int bitend;$/;"	m	struct:usb2phy_reg	typeref:typename:unsigned int	file:
biter	arch/m68k/include/asm/coldfire/edma.h	/^	u16 biter;		\/* 0x1C Minor Loop Lnk, Major Loop Cnt *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u16
bitfield_extract	include/bitfield.h	/^static inline uint bitfield_extract(uint reg_val, uint shift, uint width)$/;"	f	typeref:typename:uint
bitfield_extract_by_mask	include/bitfield.h	/^static inline uint bitfield_extract_by_mask(uint reg_val, uint mask)$/;"	f	typeref:typename:uint
bitfield_mask	include/bitfield.h	/^static inline uint bitfield_mask(uint shift, uint width)$/;"	f	typeref:typename:uint
bitfield_replace	include/bitfield.h	/^static inline uint bitfield_replace(uint reg_val, uint shift, uint width,$/;"	f	typeref:typename:uint
bitfield_replace_by_mask	include/bitfield.h	/^static inline uint bitfield_replace_by_mask(uint reg_val, uint mask,$/;"	f	typeref:typename:uint
bitfield_shift	include/bitfield.h	/^static inline uint bitfield_shift(uint mask)$/;"	f	typeref:typename:uint
bitflip_threshold	include/linux/mtd/mtd.h	/^	unsigned int bitflip_threshold;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
bitlen	cmd/spi.c	/^static int   		bitlen;$/;"	v	typeref:typename:int	file:
bitlen	include/power/pmic.h	/^	unsigned int bitlen;$/;"	m	struct:p_spi	typeref:typename:unsigned int
bitmap	arch/x86/include/asm/pirq_routing.h	/^		u16 bitmap;	\/* Available IRQs *\/$/;"	m	struct:irq_info::__packed	typeref:typename:u16
bitmap_s	tools/bmp_logo.c	/^typedef struct bitmap_s {		\/* bitmap description *\/$/;"	s	file:
bitmap_t	tools/bmp_logo.c	/^} bitmap_t;$/;"	t	typeref:struct:bitmap_s	file:
bitmap_zero	include/usb/lin_gadget_compat.h	/^static inline void bitmap_zero(unsigned long *dst, int nbits)$/;"	f	typeref:typename:void
bitrev16	lib/bitrev.c	/^u16 bitrev16(u16 x)$/;"	f	typeref:typename:u16
bitrev32	lib/bitrev.c	/^u32 bitrev32(u32 x)$/;"	f	typeref:typename:u32
bitrev8	include/linux/bitrev.h	/^static inline u8 bitrev8(u8 byte)$/;"	f	typeref:typename:u8
bits	board/micronas/vct/dcgu.h	/^	} bits;$/;"	m	union:dcgu_clk_en1	typeref:struct:dcgu_clk_en1::__anon7364447c0108
bits	board/micronas/vct/dcgu.h	/^	} bits;$/;"	m	union:dcgu_clk_en2	typeref:struct:dcgu_clk_en2::__anon7364447c0208
bits	board/micronas/vct/dcgu.h	/^	} bits;$/;"	m	union:dcgu_reset_unit1	typeref:struct:dcgu_reset_unit1::__anon7364447c0308
bits	board/micronas/vct/scc.h	/^	} bits;$/;"	m	union:scc_cmd	typeref:struct:scc_cmd::__anon903167320108
bits	board/micronas/vct/scc.h	/^	} bits;$/;"	m	union:scc_debug	typeref:struct:scc_debug::__anon903167320308
bits	board/micronas/vct/scc.h	/^	} bits;$/;"	m	union:scc_dma_cfg	typeref:struct:scc_dma_cfg::__anon903167320208
bits	board/micronas/vct/scc.h	/^	} bits;$/;"	m	union:scc_softwareconfiguration	typeref:struct:scc_softwareconfiguration::__anon903167320408
bits	include/bedbug/ppc.h	/^  unsigned int	bits;		\/* The number of bits used by this$/;"	m	struct:operand	typeref:typename:unsigned int
bits	include/jffs2/mini_inflate.h	/^	int bits;	 \/* maximum bit length *\/$/;"	m	struct:huffman_set	typeref:typename:int
bits	include/linux/usb/musb.h	/^	u8		bits;$/;"	m	struct:musb_hdrc_eps_bits	typeref:typename:u8
bits	include/u-boot/md5.h	/^	__u32 bits[2];$/;"	m	struct:MD5Context	typeref:typename:__u32[2]
bits	lib/zlib/inflate.h	/^    unsigned bits;              \/* number of bits in "in" *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
bits	lib/zlib/inftrees.h	/^    unsigned char bits;         \/* bits in this part of the code *\/$/;"	m	struct:__anon4cf584e10108	typeref:typename:unsigned char
bits_per_cell	include/linux/mtd/nand.h	/^	u8 bits_per_cell;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
bits_per_cell	include/linux/mtd/nand.h	/^	u8 bits_per_cell;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
bits_per_cell	include/linux/mtd/nand.h	/^	uint8_t bits_per_cell;$/;"	m	struct:nand_chip	typeref:typename:uint8_t
bits_per_pixel	arch/x86/include/asm/coreboot_tables.h	/^	u8 bits_per_pixel;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
bits_per_pixel	drivers/video/tegra124/sor.h	/^	u32	bits_per_pixel;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
bits_per_pixel	drivers/video/videomodes.h	/^	int bits_per_pixel;	\/* bpp *\/$/;"	m	struct:ctfb_vesa_modes	typeref:typename:int
bits_per_pixel	include/linux/fb.h	/^	__u32 bits_per_pixel;		\/* guess what			*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
bits_per_pixel	include/vbe.h	/^	u8 bits_per_pixel;	\/* 19 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
bits_per_word	drivers/spi/designware_spi.c	/^	int bits_per_word;$/;"	m	struct:dw_spi_priv	typeref:typename:int	file:
bits_per_word	drivers/spi/rk_spi.c	/^	u8 bits_per_word;		\/* max 16 bits per word *\/$/;"	m	struct:rockchip_spi_priv	typeref:typename:u8	file:
bits_sent	lib/zlib/deflate.h	/^    ulg bits_sent;      \/* bit length of compressed data sent mod 2^32 *\/$/;"	m	struct:internal_state	typeref:typename:ulg
bits_x_pixel	drivers/video/da8xx-fb.c	/^static int bits_x_pixel;$/;"	v	typeref:typename:int	file:
bitspersample	include/i2s.h	/^	unsigned int bitspersample;	\/* bits per sample *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
bitstart	drivers/usb/phy/rockchip_usb2_phy.c	/^	unsigned int bitstart;$/;"	m	struct:usb2phy_reg	typeref:typename:unsigned int	file:
bitstream	include/jffs2/mini_inflate.h	/^struct bitstream {$/;"	s
bitstream_type	include/fpga.h	/^} bitstream_type;$/;"	t	typeref:enum:__anon4d3ae96c0403
bk	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 bk;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
bk	common/dlmalloc.c	/^  struct malloc_chunk* bk;$/;"	m	struct:malloc_chunk	typeref:struct:malloc_chunk *	file:
bkcolor	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 bkcolor;$/;"	m	struct:de_bld	typeref:typename:u32
bkcolor	arch/arm/include/asm/arch/display2.h	/^	u32 bkcolor;$/;"	m	struct:de_bld	typeref:typename:u32
bl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 bl;$/;"	m	struct:rk3036_phy_timing	typeref:typename:u32
bl	arch/powerpc/include/asm/mmu.h	/^	unsigned long bl:11;	\/* Block size mask *\/$/;"	m	struct:_BATU	typeref:typename:unsigned long:11
bl	arch/powerpc/include/asm/mmu.h	/^	unsigned long bl:6;	\/* Block size mask *\/$/;"	m	struct:_P601_BATL	typeref:typename:unsigned long:6
bl	drivers/bios_emulator/include/biosemu.h	/^	u8 bh, bl;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
bl	drivers/bios_emulator/include/biosemu.h	/^	u8 bl;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
bl2_entry	board/gdsys/p1022/controlcenterd-id.c	/^static void(*bl2_entry)(void);$/;"	v	typeref:typename:void (*)(void)	file:
bl_count	lib/zlib/deflate.h	/^    ush bl_count[MAX_BITS+1];$/;"	m	struct:internal_state	typeref:typename:ush[]
bl_desc	lib/zlib/deflate.h	/^    struct tree_desc_s bl_desc;              \/* desc. for bit length tree *\/$/;"	m	struct:internal_state	typeref:struct:tree_desc_s
bl_en	arch/arm/dts/rk3288-miniarm.dtsi	/^		bl_en: bl-en {$/;"	l
bl_en	arch/arm/dts/rk3288-veyron.dtsi	/^		bl_en: bl-en {$/;"	l
bl_en_pin	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	bl_en_pin: bl_en_pin@0 {$/;"	l
bl_en_pin_dsrv9703c	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	bl_en_pin_dsrv9703c: bl_en_pin@0 {$/;"	l
bl_en_pin_inet	arch/arm/dts/sun4i-a10-inet1.dts	/^	bl_en_pin_inet: bl_en_pin@0 {$/;"	l
bl_en_pin_protab	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	bl_en_pin_protab: bl_en_pin@0 {$/;"	l
bl_enable_pin	arch/arm/dts/sun7i-a20-wexler-tab7200.dts	/^	bl_enable_pin: bl_enable_pin@0 {$/;"	l
bl_len	include/spl.h	/^	int bl_len;$/;"	m	struct:spl_load_info	typeref:typename:int
bl_order	lib/zlib/trees.c	/^local const uch bl_order[BL_CODES]$/;"	v	typeref:typename:local const uch[]
bl_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const bl_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
bl_pwr_en	arch/arm/dts/rk3288-jerry.dts	/^		bl_pwr_en: bl_pwr_en {$/;"	l
bl_tree	lib/zlib/deflate.h	/^    struct ct_data_s bl_tree[2*BL_CODES+1];  \/* Huffman tree for bit lengths *\/$/;"	m	struct:internal_state	typeref:struct:ct_data_s[]
black_level	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 black_level;			\/* 0x3C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
blank	drivers/video/da8xx-fb.c	/^	int blank;$/;"	m	struct:da8xx_fb_par	typeref:typename:int	file:
blank	drivers/video/mxc_ipuv3_fb.c	/^	int blank;$/;"	m	struct:mxcfb_info	typeref:typename:int	file:
blank_black_level	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 blank_black_level;		\/* 0x020 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
blank_black_level	arch/arm/include/asm/arch/display.h	/^	u32 blank_black_level;		\/* 0x020 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
blank_check	drivers/mtd/nand/tegra_nand.c	/^static int blank_check(u8 *buf, int len)$/;"	f	typeref:typename:int	file:
blank_idt_ptr	arch/x86/cpu/start.S	/^blank_idt_ptr:$/;"	l
blank_level	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 blank_level;			\/* 0x40 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
blank_string	arch/powerpc/cpu/ppc4xx/ecc.h	/^static void inline blank_string(int size)$/;"	f	typeref:typename:void
blank_string	board/gdsys/405ex/io64.c	/^static inline void blank_string(int size)$/;"	f	typeref:typename:void	file:
bld_mode	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 bld_mode[4];$/;"	m	struct:de_bld	typeref:typename:u32[4]
bld_mode	arch/arm/include/asm/arch/display2.h	/^	u32 bld_mode[4];$/;"	m	struct:de_bld	typeref:typename:u32[4]
blen	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^		uint32_t blen;$/;"	m	union:mac_queue::__anon57780116010a	typeref:typename:uint32_t
blend_1win	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_1win;		\/* _WIN_BLEND_1WIN_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_2win_x	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_2win_x;		\/* _WIN_BLEND_2WIN_X_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_2win_y	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_2win_y;		\/* _WIN_BLEND_2WIN_Y_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_3win_xy	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_3win_xy;		\/* _WIN_BLEND_3WIN_XY_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_alpha_1bit	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_alpha_1bit;		\/* _WINBUF_BLEND_ALPHA_1BIT_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_background_color	arch/arm/include/asm/arch-tegra/dc.h	/^	u32 blend_background_color;	\/* _DISP_BLEND_BACKGROUND_COLOR_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:u32
blend_layer_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_layer_ctrl;		\/* _WINBUF_BLEND_LAYER_CONTROL_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_match_select	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_match_select;	\/* _WINBUF_BLEND_MATCH_SELECT_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_nokey	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_nokey;		\/* _WIN_BLEND_NOKEY_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blend_nomatch_select	arch/arm/include/asm/arch-tegra/dc.h	/^	uint blend_nomatch_select;	\/* _WINBUF_BLEND_NOMATCH_SELECT_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
blink	arch/arc/include/asm/ptrace.h	/^	long blink;$/;"	m	struct:pt_regs	typeref:typename:long
blink	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 blink;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
blink_close	arch/powerpc/cpu/mpc8xx/video.c	/^static inline void blink_close (void)$/;"	f	typeref:typename:void	file:
blink_en	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 blink_en;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
blink_en	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 blink_en;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
blink_en	drivers/gpio/mvebu_gpio.c	/^	u32 blink_en;$/;"	m	struct:mvebu_gpio_regs	typeref:typename:u32	file:
blink_enabled	arch/powerpc/cpu/mpc8xx/video.c	/^static unsigned char blink_enabled = 0;$/;"	v	typeref:typename:unsigned char	file:
blink_handler	arch/powerpc/cpu/mpc8xx/video.c	/^static void blink_handler (void *arg)$/;"	f	typeref:typename:void	file:
blink_init	arch/powerpc/cpu/mpc8xx/video.c	/^static inline void blink_init (void)$/;"	f	typeref:typename:void	file:
blink_set	arch/powerpc/cpu/mpc8xx/video.c	/^int blink_set (int blink)$/;"	f	typeref:typename:int
blink_timer	arch/powerpc/cpu/mpc8xx/video.c	/^static timer_t blink_timer;$/;"	v	typeref:typename:timer_t	file:
blink_update	arch/powerpc/cpu/mpc8xx/video.c	/^static void blink_update (void)$/;"	f	typeref:typename:void	file:
blit_x	include/linux/fb.h	/^	u32 blit_x;		\/* supported bit block dimensions (1-32)*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
blit_y	include/linux/fb.h	/^	u32 blit_y;		\/* Format: blit_x = 1 << (width - 1)	*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
blk	arch/arm/include/asm/omap_mmc.h	/^	unsigned int blk;		\/* 0x104 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
blk	common/xyzModem.c	/^  unsigned char blk, cblk, crc1, crc2;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char	file:
blk_birth	include/zfs/spa.h	/^	uint64_t	blk_birth;	\/* transaction group at birth		*\/$/;"	m	struct:blkptr	typeref:typename:uint64_t
blk_bmaps	include/ext4fs.h	/^	unsigned char **blk_bmaps;$/;"	m	struct:ext_filesystem	typeref:typename:unsigned char **
blk_cksum	include/zfs/spa.h	/^	zio_cksum_t	blk_cksum;	\/* 256-bit checksum			*\/$/;"	m	struct:blkptr	typeref:typename:zio_cksum_t
blk_cnt	drivers/net/cpsw.c	/^	u32	blk_cnt;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
blk_cnt	drivers/net/cpsw.c	/^	u32	blk_cnt;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
blk_cnt	fs/ubifs/ubifs.h	/^	int blk_cnt;$/;"	m	struct:bu_info	typeref:typename:int
blk_count	disk/part_mac.h	/^	__u32	blk_count;	\/* number of blocks on device		*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u32
blk_create_device	drivers/block/blk-uclass.c	/^int blk_create_device(struct udevice *parent, const char *drv_name,$/;"	f	typeref:typename:int
blk_create_devicef	drivers/block/blk-uclass.c	/^int blk_create_devicef(struct udevice *parent, const char *drv_name,$/;"	f	typeref:typename:int
blk_derase	drivers/block/blk-uclass.c	/^unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long
blk_derase	include/blk.h	/^static inline ulong blk_derase(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:ulong
blk_desc	include/blk.h	/^struct blk_desc {$/;"	s
blk_dev	include/sandboxblockdev.h	/^	struct blk_desc blk_dev;$/;"	m	struct:host_block_dev	typeref:struct:blk_desc
blk_dread	drivers/block/blk-uclass.c	/^unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long
blk_dread	include/blk.h	/^static inline ulong blk_dread(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:ulong
blk_driver	include/blk.h	/^struct blk_driver {$/;"	s
blk_driver_lookup_type	drivers/block/blk_legacy.c	/^struct blk_driver *blk_driver_lookup_type(int if_type)$/;"	f	typeref:struct:blk_driver *
blk_driver_lookup_typename	drivers/block/blk_legacy.c	/^static struct blk_driver *blk_driver_lookup_typename(const char *if_typename)$/;"	f	typeref:struct:blk_driver *	file:
blk_dselect_hwpart	drivers/block/blk-uclass.c	/^int blk_dselect_hwpart(struct blk_desc *desc, int hwpart)$/;"	f	typeref:typename:int
blk_dselect_hwpart	drivers/block/blk_legacy.c	/^int blk_dselect_hwpart(struct blk_desc *desc, int hwpart)$/;"	f	typeref:typename:int
blk_dva	include/zfs/spa.h	/^	dva_t		blk_dva[SPA_DVAS_PER_BP]; \/* Data Virtual Addresses *\/$/;"	m	struct:blkptr	typeref:typename:dva_t[]
blk_dwrite	drivers/block/blk-uclass.c	/^unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long
blk_dwrite	include/blk.h	/^static inline ulong blk_dwrite(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:ulong
blk_fill	include/zfs/spa.h	/^	uint64_t	blk_fill;	\/* fill count				*\/$/;"	m	struct:blkptr	typeref:typename:uint64_t
blk_find_max_devnum	drivers/block/blk-uclass.c	/^int blk_find_max_devnum(enum if_type if_type)$/;"	f	typeref:typename:int
blk_first_device	drivers/block/blk-uclass.c	/^int blk_first_device(int if_type, struct udevice **devp)$/;"	f	typeref:typename:int
blk_free_space	fs/reiserfs/reiserfs_private.h	/^  __u16 blk_free_space;   \/* Block free space in bytes. *\/$/;"	m	struct:block_head	typeref:typename:__u16
blk_get_dev	disk/part.c	/^struct blk_desc *blk_get_dev(const char *ifname, int dev)$/;"	f	typeref:struct:blk_desc *
blk_get_dev	include/part.h	/^static inline struct blk_desc *blk_get_dev(const char *ifname, int dev)$/;"	f	typeref:struct:blk_desc *
blk_get_device	drivers/block/blk-uclass.c	/^int blk_get_device(int if_type, int devnum, struct udevice **devp)$/;"	f	typeref:typename:int
blk_get_device_by_str	disk/part.c	/^int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,$/;"	f	typeref:typename:int
blk_get_device_by_str	include/part.h	/^static inline int blk_get_device_by_str(const char *ifname, const char *dev_str,$/;"	f	typeref:typename:int
blk_get_device_part_str	disk/part.c	/^int blk_get_device_part_str(const char *ifname, const char *dev_part_str,$/;"	f	typeref:typename:int
blk_get_device_part_str	include/part.h	/^static inline int blk_get_device_part_str(const char *ifname,$/;"	f	typeref:typename:int
blk_get_devnum_by_type	drivers/block/blk-uclass.c	/^struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum)$/;"	f	typeref:struct:blk_desc *
blk_get_devnum_by_type	drivers/block/blk_legacy.c	/^struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum)$/;"	f	typeref:struct:blk_desc *
blk_get_devnum_by_typename	drivers/block/blk-uclass.c	/^struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum)$/;"	f	typeref:struct:blk_desc *
blk_get_devnum_by_typename	drivers/block/blk_legacy.c	/^struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum)$/;"	f	typeref:struct:blk_desc *
blk_get_ops	include/blk.h	/^#define blk_get_ops(/;"	d
blk_len	drivers/mmc/mxcmmc.c	/^	u32 blk_len;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
blk_level	fs/reiserfs/reiserfs_private.h	/^  __u16 blk_level;	  \/* Level of a block in the tree. *\/$/;"	m	struct:block_head	typeref:typename:__u16
blk_list_devices	drivers/block/blk-uclass.c	/^void blk_list_devices(enum if_type if_type)$/;"	f	typeref:typename:void
blk_list_devices	drivers/block/blk_legacy.c	/^void blk_list_devices(enum if_type if_type)$/;"	f	typeref:typename:void
blk_list_part	drivers/block/blk-uclass.c	/^int blk_list_part(enum if_type if_type)$/;"	f	typeref:typename:int
blk_list_part	drivers/block/blk_legacy.c	/^int blk_list_part(enum if_type if_type)$/;"	f	typeref:typename:int
blk_next_device	drivers/block/blk-uclass.c	/^int blk_next_device(struct udevice **devp)$/;"	f	typeref:typename:int
blk_nr_item	fs/reiserfs/reiserfs_private.h	/^  __u16 blk_nr_item;	  \/* Number of keys\/items in a block. *\/$/;"	m	struct:block_head	typeref:typename:__u16
blk_ops	include/blk.h	/^struct blk_ops {$/;"	s
blk_pad	include/zfs/spa.h	/^	uint64_t	blk_pad[2];	\/* Extra space for the future		*\/$/;"	m	struct:blkptr	typeref:typename:uint64_t[2]
blk_phys_birth	include/zfs/spa.h	/^	uint64_t	blk_phys_birth;	\/* txg when block was allocated		*\/$/;"	m	struct:blkptr	typeref:typename:uint64_t
blk_prepare_device	drivers/block/blk-uclass.c	/^int blk_prepare_device(struct udevice *dev)$/;"	f	typeref:typename:int
blk_print_device_num	drivers/block/blk-uclass.c	/^int blk_print_device_num(enum if_type if_type, int devnum)$/;"	f	typeref:typename:int
blk_print_device_num	drivers/block/blk_legacy.c	/^int blk_print_device_num(enum if_type if_type, int devnum)$/;"	f	typeref:typename:int
blk_print_part_devnum	drivers/block/blk-uclass.c	/^int blk_print_part_devnum(enum if_type if_type, int devnum)$/;"	f	typeref:typename:int
blk_print_part_devnum	drivers/block/blk_legacy.c	/^int blk_print_part_devnum(enum if_type if_type, int devnum)$/;"	f	typeref:typename:int
blk_prop	include/zfs/spa.h	/^	uint64_t	blk_prop;	\/* size, compression, type, etc		*\/$/;"	m	struct:blkptr	typeref:typename:uint64_t
blk_read_devnum	drivers/block/blk-uclass.c	/^ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,$/;"	f	typeref:typename:ulong
blk_read_devnum	drivers/block/blk_legacy.c	/^ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,$/;"	f	typeref:typename:ulong
blk_right_delim_key	fs/reiserfs/reiserfs_private.h	/^  struct key  blk_right_delim_key; \/* Right delimiting key for this block (supported for leaf l/;"	m	struct:block_head	typeref:struct:key
blk_rsp_timeo	tools/kwboot.c	/^static int blk_rsp_timeo = KWBOOT_BLK_RSP_TIMEO;$/;"	v	typeref:typename:int	file:
blk_select_hwpart	drivers/block/blk-uclass.c	/^int blk_select_hwpart(struct udevice *dev, int hwpart)$/;"	f	typeref:typename:int
blk_select_hwpart_devnum	drivers/block/blk-uclass.c	/^int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart)$/;"	f	typeref:typename:int
blk_select_hwpart_devnum	drivers/block/blk_legacy.c	/^int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart)$/;"	f	typeref:typename:int
blk_seq_num	drivers/usb/gadget/f_dfu.c	/^	int                             blk_seq_num;$/;"	m	struct:f_dfu	typeref:typename:int	file:
blk_show_device	drivers/block/blk-uclass.c	/^int blk_show_device(enum if_type if_type, int devnum)$/;"	f	typeref:typename:int
blk_show_device	drivers/block/blk_legacy.c	/^int blk_show_device(enum if_type if_type, int devnum)$/;"	f	typeref:typename:int
blk_size	disk/part_mac.h	/^	__u16	blk_size;	\/* block size of device			*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u16
blk_sz	include/sparse_format.h	/^  __le32	blk_sz;		\/* block size in bytes, must be a multiple of 4 (4096) *\/$/;"	m	struct:sparse_header	typeref:typename:__le32
blk_unbind_all	drivers/block/blk-uclass.c	/^int blk_unbind_all(int if_type)$/;"	f	typeref:typename:int
blk_write_devnum	drivers/block/blk-uclass.c	/^ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start,$/;"	f	typeref:typename:ulong
blk_write_devnum	drivers/block/blk_legacy.c	/^ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start,$/;"	f	typeref:typename:ulong
blkattr	drivers/mmc/fsl_esdhc.c	/^	uint    blkattr;	\/* Block attributes register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
blkc_configure	cmd/blkcache.c	/^static int blkc_configure(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
blkc_reloc	cmd/blkcache.c	/^static __maybe_unused void blkc_reloc(void)$/;"	f	typeref:typename:__maybe_unused void	file:
blkc_show	cmd/blkcache.c	/^static int blkc_show(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
blkcache_configure	drivers/block/blkcache.c	/^void blkcache_configure(unsigned blocks, unsigned entries)$/;"	f	typeref:typename:void
blkcache_fill	drivers/block/blkcache.c	/^void blkcache_fill(int iftype, int devnum,$/;"	f	typeref:typename:void
blkcache_fill	include/blk.h	/^static inline void blkcache_fill(int iftype, int dev,$/;"	f	typeref:typename:void
blkcache_invalidate	drivers/block/blkcache.c	/^void blkcache_invalidate(int iftype, int devnum)$/;"	f	typeref:typename:void
blkcache_invalidate	include/blk.h	/^static inline void blkcache_invalidate(int iftype, int dev) {}$/;"	f	typeref:typename:void
blkcache_read	drivers/block/blkcache.c	/^int blkcache_read(int iftype, int devnum,$/;"	f	typeref:typename:int
blkcache_read	include/blk.h	/^static inline int blkcache_read(int iftype, int dev,$/;"	f	typeref:typename:int
blkcache_stats	drivers/block/blkcache.c	/^void blkcache_stats(struct block_cache_stats *stats)$/;"	f	typeref:typename:void
blkcnt	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	blkcnt;		\/* _BLOCK_SIZE_BLOCK_COUNT_0 31:16 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
blkcnt	drivers/block/blkcache.c	/^	lbaint_t blkcnt;$/;"	m	struct:block_cache_node	typeref:typename:lbaint_t	file:
blkcnt_t	include/linux/compat.h	/^typedef u64 blkcnt_t;$/;"	t	typeref:typename:u64
blkcnt_t	include/linux/compat.h	/^typedef unsigned long blkcnt_t;$/;"	t	typeref:typename:unsigned long
blkgap	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	blkgap;		\/* _POWER_CONTROL_HOST_9 23:16 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
blklen	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	blklen;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
blknr	fs/ext4/ext4_journal.h	/^	int blknr;$/;"	m	struct:dirty_blocks	typeref:typename:int
blknr	fs/ext4/ext4_journal.h	/^	int blknr;$/;"	m	struct:journal_log	typeref:typename:int
blkptr	include/zfs/spa.h	/^typedef struct blkptr {$/;"	s
blkptr_t	include/zfs/spa.h	/^} blkptr_t;$/;"	t	typeref:struct:blkptr
blkr	include/atmel_mci.h	/^	u32	blkr;	\/* 0x18 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
blksize	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	blksize;	\/* _BLOCK_SIZE_BLOCK_COUNT_0 15:00 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
blksperchip	drivers/mtd/nand/denali.h	/^	uint32_t blksperchip;$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
blksz	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 blksz;		\/* 0x10 block size *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
blksz	arch/arm/include/asm/arch/mmc.h	/^	u32 blksz;		\/* 0x10 block size *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
blksz	drivers/block/blkcache.c	/^	unsigned long blksz;$/;"	m	struct:block_cache_node	typeref:typename:unsigned long	file:
blksz	include/blk.h	/^	unsigned long	blksz;		\/* block size *\/$/;"	m	struct:blk_desc	typeref:typename:unsigned long
blksz	include/ext4fs.h	/^	uint32_t blksz;$/;"	m	struct:ext_filesystem	typeref:typename:uint32_t
blksz	include/image-sparse.h	/^	lbaint_t	blksz;$/;"	m	struct:sparse_storage	typeref:typename:lbaint_t
blksz	include/part.h	/^	ulong	blksz;		\/* block size in bytes			*\/$/;"	m	struct:disk_partition	typeref:typename:ulong
blnr	cmd/fdc.c	/^	unsigned long	blnr;		\/* Logical block nr *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:unsigned long	file:
blob_decap	cmd/blob.c	/^__weak int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len)$/;"	f	typeref:typename:__weak int
blob_decap	drivers/crypto/fsl/fsl_blob.c	/^int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len)$/;"	f	typeref:typename:int
blob_dek	drivers/crypto/fsl/fsl_blob.c	/^int blob_dek(const u8 *src, u8 *dst, u8 len)$/;"	f	typeref:typename:int
blob_encap	cmd/blob.c	/^__weak int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len)$/;"	f	typeref:typename:__weak int
blob_encap	drivers/crypto/fsl/fsl_blob.c	/^int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len)$/;"	f	typeref:typename:int
blob_encap_dek	arch/arm/imx-common/cmd_dek.c	/^static int blob_encap_dek(const u8 *src, u8 *dst, u32 len)$/;"	f	typeref:typename:int	file:
blob_help_text	cmd/blob.c	/^static char blob_help_text[] =$/;"	v	typeref:typename:char[]	file:
block	disk/part_mac.h	/^	__u32	block;		\/* block number of starting block	*\/$/;"	m	struct:mac_driver_entry	typeref:typename:__u32
block	drivers/block/sata_dwc.c	/^	struct dmareg block;$/;"	m	struct:dma_interrupt_regs	typeref:struct:dmareg	file:
block	drivers/mtd/nand/denali.h	/^	uint32_t block;  \/* stored for future use *\/$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
block	fs/ext4/ext4_journal.h	/^	__be32 block;$/;"	m	struct:ext3_journal_block_tag	typeref:typename:__be32
block	fs/yaffs2/yaffs_summary.c	/^	unsigned block;		\/* Must be this block *\/$/;"	m	struct:yaffs_summary_header	typeref:typename:unsigned	file:
block	fs/yaffs2/yaffs_yaffs2.c	/^	int block;$/;"	m	struct:yaffs_block_index	typeref:typename:int	file:
block	include/ec_commands.h	/^	uint8_t block[EC_VBNV_BLOCK_SIZE];$/;"	m	struct:ec_params_vbnvcontext	typeref:typename:uint8_t[]
block	include/ec_commands.h	/^	uint8_t block[EC_VBNV_BLOCK_SIZE];$/;"	m	struct:ec_response_vbnvcontext	typeref:typename:uint8_t[]
block	include/fsl-mc/fsl_qbman_base.h	/^	const struct qbman_block_desc *block; \/* The QBMan instance *\/$/;"	m	struct:qbman_swp_desc	typeref:typename:const struct qbman_block_desc *
block	lib/bzip2/bzlib_private.h	/^      UChar*   block;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UChar *
block	tools/ublimage.h	/^	uint32_t	block;	\/*$/;"	m	struct:ubl_header	typeref:typename:uint32_t
block3_value	board/amcc/bamboo/bamboo.h	/^typedef enum block3_value { B3_V1,  B3_V2,  B3_V3,  B3_V4,  B3_V5,$/;"	g
block3_value_t	board/amcc/bamboo/bamboo.h	/^} block3_value_t;$/;"	t	typeref:enum:block3_value
blockCRC	lib/bzip2/bzlib_private.h	/^      UInt32   blockCRC;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32
blockNo	lib/bzip2/bzlib_private.h	/^      Int32    blockNo;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
blockRandomised	lib/bzip2/bzlib_private.h	/^      Bool     blockRandomised;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Bool
blockSize100k	lib/bzip2/bzlib_private.h	/^      Int32    blockSize100k;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
blockSize100k	lib/bzip2/bzlib_private.h	/^      Int32    blockSize100k;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
block_bad	fs/yaffs2/yaffs_guts.h	/^	unsigned block_bad;$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
block_bad	include/linux/mtd/nand.h	/^	int (*block_bad)(struct mtd_info *mtd, loff_t ofs);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)
block_buffer	disk/part_amiga.c	/^static unsigned char block_buffer[DEFAULT_SECTOR_SIZE];$/;"	v	typeref:typename:unsigned char[]	file:
block_bytes	disk/part_amiga.h	/^    u32 block_bytes;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
block_cache_node	drivers/block/blkcache.c	/^struct block_cache_node {$/;"	s	file:
block_cache_stats	include/blk.h	/^struct block_cache_stats {$/;"	s
block_cnt	fs/ubifs/ubifs.h	/^	int block_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
block_count	disk/part_mac.h	/^	__u32	block_count;	\/* number of blocks in partition	*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
block_count	drivers/mmc/rpmb.c	/^	unsigned short block_count;$/;"	m	struct:s_rpmb	typeref:typename:unsigned short	file:
block_count	include/api_public.h	/^			lbasize_t	block_count;	\/* no of blocks *\/$/;"	m	struct:device_info::__anonf417d2e6020a::__anonf417d2e60308	typeref:typename:lbasize_t
block_descriptor	lib/lz4_wrapper.c	/^		u8 block_descriptor;$/;"	m	union:lz4_frame_header::__anonc9492e16030a	typeref:typename:u8	file:
block_dev	include/mmc.h	/^	struct blk_desc block_dev;$/;"	m	struct:mmc	typeref:struct:blk_desc
block_dev	include/usb_mass_storage.h	/^	struct blk_desc block_dev;$/;"	m	struct:ums	typeref:struct:blk_desc
block_done	lib/zlib/deflate.c	/^    block_done,     \/* block flush performed *\/$/;"	e	enum:__anonaf16f3d10103	file:
block_drvr	include/part.h	/^struct block_drvr {$/;"	s
block_ec	drivers/mtd/ubi/ubi-media.h	/^	__be32 block_ec[UBI_FM_MAX_BLOCKS];$/;"	m	struct:ubi_fm_sb	typeref:typename:__be32[]
block_endurance	include/linux/mtd/nand.h	/^	__le16 block_endurance;$/;"	m	struct:jedec_ecc_info	typeref:typename:__le16
block_endurance	include/linux/mtd/nand.h	/^	__le16 block_endurance;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
block_endurance	include/linux/mtd/nand.h	/^	__le16 block_endurance;$/;"	m	struct:onfi_ext_ecc_info	typeref:typename:__le16
block_erase	include/blk.h	/^	unsigned long	(*block_erase)(struct blk_desc *block_dev,$/;"	m	struct:blk_desc	typeref:typename:unsigned long (*)(struct blk_desc * block_dev,lbaint_t start,lbaint_t blkcnt)
block_erase_timeout_max	include/mtd/cfi_flash.h	/^	u8	block_erase_timeout_max;$/;"	m	struct:cfi_qry	typeref:typename:u8
block_erase_timeout_typ	include/mtd/cfi_flash.h	/^	u8	block_erase_timeout_typ;$/;"	m	struct:cfi_qry	typeref:typename:u8
block_group_number	include/ext_common.h	/^	__le16 block_group_number;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
block_head	fs/reiserfs/reiserfs_private.h	/^struct block_head$/;"	s
block_header	disk/part_amiga.c	/^struct block_header$/;"	s	file:
block_id	include/ext_common.h	/^	__le32 block_id;	\/* Blocks bitmap block *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le32
block_id_high	include/ext_common.h	/^	__le32 block_id_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le32
block_info	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_block_info *block_info;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_block_info *
block_info_alt	fs/yaffs2/yaffs_guts.h	/^	unsigned block_info_alt:1;	\/* allocated using alternative alloc *\/$/;"	m	struct:yaffs_dev	typeref:typename:unsigned:1
block_io_disk_template	lib/efi_loader/efi_disk.c	/^static const struct efi_block_io block_io_disk_template = {$/;"	v	typeref:typename:const struct efi_block_io	file:
block_len	drivers/usb/emul/sandbox_flash.c	/^	u32 block_len;$/;"	m	struct:scsi_read_capacity_resp	typeref:typename:u32	file:
block_loc	drivers/mtd/ubi/ubi-media.h	/^	__be32 block_loc[UBI_FM_MAX_BLOCKS];$/;"	m	struct:ubi_fm_sb	typeref:typename:__be32[]
block_map	arch/x86/include/asm/fsp/fsp_fv.h	/^	struct fv_blkmap_entry	block_map[1];$/;"	m	struct:fv_header	typeref:struct:fv_blkmap_entry[1]
block_markbad	include/linux/mtd/nand.h	/^	int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)
block_markbad	include/linux/mtd/onenand.h	/^	int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)
block_offset	fs/yaffs2/yaffs_guts.h	/^	int block_offset;$/;"	m	struct:yaffs_dev	typeref:typename:int
block_per_track	disk/part_amiga.h	/^    u32 block_per_track;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
block_read	fs/reiserfs/reiserfs.c	/^block_read (unsigned int blockNr, int start, int len, char *buffer)$/;"	f	typeref:typename:int	file:
block_read	include/blk.h	/^	unsigned long	(*block_read)(struct blk_desc *block_dev,$/;"	m	struct:blk_desc	typeref:typename:unsigned long (*)(struct blk_desc * block_dev,lbaint_t start,lbaint_t blkcnt,void * buffer)
block_rev1	arch/powerpc/include/asm/fsl_pci.h	/^	u32	block_rev1;	\/* 0xbf8 - PCIE Block Revision register 1 *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
block_rev1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    block_rev1;	\/* 0x8bf8 - PEX Block Revision register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
block_rev2	arch/powerpc/include/asm/fsl_pci.h	/^	u32	block_rev2;	\/* 0xbfc - PCIE Block Revision register 2 *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
block_rev2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    block_rev2;	\/* 0x8bfc - PEX Block Revision register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
block_size	drivers/spi/cadence_qspi.h	/^	u32		block_size;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
block_size	include/api_public.h	/^			unsigned long	block_size;	\/* size of one block *\/$/;"	m	struct:device_info::__anonf417d2e6020a::__anonf417d2e60308	typeref:typename:unsigned long
block_size	include/efi_api.h	/^	u32 block_size;$/;"	m	struct:efi_block_io_media	typeref:typename:u32
block_start	lib/zlib/deflate.h	/^    long block_start;$/;"	m	struct:internal_state	typeref:typename:long
block_state	fs/yaffs2/yaffs_guts.h	/^	unsigned block_state:4;	\/* One of the above block states. *\/$/;"	m	struct:yaffs_block_info	typeref:typename:unsigned:4
block_state	lib/zlib/deflate.c	/^typedef block_state (*compress_func) OF((deflate_state *s, int flush));$/;"	t	typeref:typename:()(* compress_func)OF ((deflate_state * s,int flush))	file:
block_state	lib/zlib/deflate.c	/^} block_state;$/;"	t	typeref:enum:__anonaf16f3d10103	file:
block_state_name	fs/yaffs2/yaffs_verify.c	/^static const char * const block_state_name[] = {$/;"	v	typeref:typename:const char * const[]	file:
block_status	fs/yaffs2/yaffs_guts.h	/^	u8 block_status;$/;"	m	struct:yaffs_spare	typeref:typename:u8
block_write	include/blk.h	/^	unsigned long	(*block_write)(struct blk_desc *block_dev,$/;"	m	struct:blk_desc	typeref:typename:unsigned long (*)(struct blk_desc * block_dev,lbaint_t start,lbaint_t blkcnt,const void * buffer)
blockcnt	include/ext_common.h	/^	__le32 blockcnt;	\/* Blocks of either 512 or block_size bytes *\/$/;"	m	struct:ext2_inode	typeref:typename:__le32
blockid	tools/kwbimage.h	/^	uint8_t  blockid;		\/*0     *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint8_t
blockid	tools/kwbimage.h	/^	uint8_t  blockid;               \/* 0 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
blockinfo	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_vid_hdr		blockinfo[CONFIG_SPL_UBI_MAX_PEBS];$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_vid_hdr[]
blocking_notifier_call_chain	include/linux/compat.h	/^#define blocking_notifier_call_chain(/;"	d
blockpage	include/linux/mtd/onenand.h	/^	int blockpage;$/;"	m	struct:onenand_bufferram	typeref:typename:int
blocks	fs/reiserfs/reiserfs_private.h	/^  unsigned int blocks[MAX_HEIGHT];$/;"	m	struct:fsys_reiser_info	typeref:typename:unsigned int[]
blocks	include/cramfs/cramfs_fs.h	/^	u32 blocks;$/;"	m	struct:cramfs_info	typeref:typename:u32
blocks	include/ext_common.h	/^		} blocks;$/;"	m	union:ext2_inode::__anon5bc84367010a	typeref:struct:ext2_inode::__anon5bc84367010a::datablocks
blocks	include/mmc.h	/^	uint blocks;$/;"	m	struct:mmc_data	typeref:typename:uint
blocks_in_checkpt	fs/yaffs2/yaffs_guts.h	/^	int blocks_in_checkpt;$/;"	m	struct:yaffs_dev	typeref:typename:int
blocks_per_group	include/ext_common.h	/^	__le32 blocks_per_group;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
blocks_per_lun	include/linux/mtd/nand.h	/^	__le32 blocks_per_lun;$/;"	m	struct:nand_jedec_params	typeref:typename:__le32
blocks_per_lun	include/linux/mtd/nand.h	/^	__le32 blocks_per_lun;$/;"	m	struct:nand_onfi_params	typeref:typename:__le32
blocksize	fs/reiserfs/reiserfs_private.h	/^  __u16 blocksize;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u16
blocksize	include/fpga.h	/^	unsigned int blocksize;$/;"	m	struct:__anon4d3ae96c0308	typeref:typename:unsigned int
blocksize	include/mmc.h	/^	uint blocksize;$/;"	m	struct:mmc_data	typeref:typename:uint
blocksize	tools/kwbimage.h	/^	uint32_t blocksize;		\/*4-7   *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint32_t
blocksize	tools/kwbimage.h	/^	uint32_t blocksize;             \/* 4-7 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint32_t
blocksize_shift	fs/reiserfs/reiserfs_private.h	/^  __u8	blocksize_shift;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u8
blr	post/lib_powerpc/asm.S	/^blr$/;"	l
bltins	common/cli_hush.c	/^static struct built_in_command bltins[] = {$/;"	v	typeref:struct:built_in_command[]	file:
blue	include/bmp_layout.h	/^	__u8	blue;$/;"	m	struct:bmp_color_table_entry	typeref:typename:__u8
blue	include/ec_commands.h	/^			uint8_t led, red, green, blue;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::rgb	typeref:typename:uint8_t
blue	include/linux/fb.h	/^	__u16 *blue;$/;"	m	struct:fb_cmap	typeref:typename:__u16 *
blue	include/linux/fb.h	/^	__u16 *blue;$/;"	m	struct:fb_cmap_user	typeref:typename:__u16 *
blue	include/linux/fb.h	/^	struct fb_bitfield blue;$/;"	m	struct:fb_var_screeninfo	typeref:struct:fb_bitfield
blue_led_off	common/board_f.c	/^__weak void blue_led_off(void) {}$/;"	f	typeref:typename:__weak void
blue_led_off	drivers/misc/gpio_led.c	/^void blue_led_off(void)$/;"	f	typeref:typename:void
blue_led_on	common/board_f.c	/^__weak void blue_led_on(void) {}$/;"	f	typeref:typename:__weak void
blue_led_on	drivers/misc/gpio_led.c	/^void blue_led_on(void)$/;"	f	typeref:typename:void
blue_mask_pos	arch/x86/include/asm/coreboot_tables.h	/^	u8 blue_mask_pos;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
blue_mask_pos	include/vbe.h	/^	u8 blue_mask_pos;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
blue_mask_size	arch/x86/include/asm/coreboot_tables.h	/^	u8 blue_mask_size;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
blue_mask_size	include/vbe.h	/^	u8 blue_mask_size;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
blue_pos	arch/arm/include/asm/setup.h	/^	u8		blue_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
blue_pos	arch/nds32/include/asm/setup.h	/^	u8		blue_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
blue_pos	include/linux/screen_info.h	/^	__u8  blue_pos;		\/* 0x2b *\/$/;"	m	struct:screen_info	typeref:typename:__u8
blue_size	arch/arm/include/asm/setup.h	/^	u8		blue_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
blue_size	arch/nds32/include/asm/setup.h	/^	u8		blue_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
blue_size	include/linux/screen_info.h	/^	__u8  blue_size;	\/* 0x2a *\/$/;"	m	struct:screen_info	typeref:typename:__u8
bluelut	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	bluelut;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
bluetooth	board/nokia/rx51/tag_omap.h	/^		struct omap_bluetooth_config bluetooth;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_bluetooth_config
bluex	include/linux/fb.h	/^	__u32 bluex;$/;"	m	struct:fb_chroma	typeref:typename:__u32
bluey	include/linux/fb.h	/^	__u32 bluey;$/;"	m	struct:fb_chroma	typeref:typename:__u32
bm	drivers/i2c/i2c-uniphier-f.c	/^	u32 bm;				\/* bus monitor *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
bmATMDeviceStatistics	include/usbdescriptors.h	/^	u8 bmATMDeviceStatistics;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u8
bmAttributes	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	u8 bmAttributes;$/;"	m	struct:dwc2_ep	typeref:typename:u8
bmAttributes	drivers/usb/gadget/f_dfu.h	/^	__u8				bmAttributes;$/;"	m	struct:dfu_function_descriptor	typeref:typename:__u8
bmAttributes	drivers/usb/gadget/pxa25x_udc.h	/^	u8					bmAttributes;$/;"	m	struct:pxa25x_ep	typeref:typename:u8
bmAttributes	drivers/usb/host/ehci.h	/^	unsigned char	bmAttributes;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
bmAttributes	include/linux/usb/ch9.h	/^	__le32 bmAttributes;$/;"	m	struct:usb_ext_cap_descriptor	typeref:typename:__le32
bmAttributes	include/linux/usb/ch9.h	/^	__u8  bmAttributes;	\/* support for HNP, SRP, etc *\/$/;"	m	struct:usb_otg_descriptor	typeref:typename:__u8
bmAttributes	include/linux/usb/ch9.h	/^	__u8  bmAttributes;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
bmAttributes	include/linux/usb/ch9.h	/^	__u8  bmAttributes;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__u8
bmAttributes	include/linux/usb/ch9.h	/^	__u8  bmAttributes;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__u8
bmAttributes	include/linux/usb/ch9.h	/^	__u8  bmAttributes;$/;"	m	struct:usb_ss_ep_comp_descriptor	typeref:typename:__u8
bmAttributes	include/linux/usb/ch9.h	/^	__u8  bmAttributes;$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bmAttributes	include/linux/usb/composite.h	/^	u8			bmAttributes;$/;"	m	struct:usb_configuration	typeref:typename:u8
bmAttributes	include/usbdescriptors.h	/^	u8 bmAttributes;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
bmAttributes	include/usbdescriptors.h	/^	u8 bmAttributes;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:u8
bmBandGroup	include/linux/usb/ch9.h	/^	__le16 bmBandGroup;$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__le16
bmCapabilities	include/linux/usb/cdc.h	/^	__u8	bmCapabilities;$/;"	m	struct:usb_cdc_acm_descriptor	typeref:typename:__u8
bmCapabilities	include/linux/usb/cdc.h	/^	__u8	bmCapabilities;$/;"	m	struct:usb_cdc_call_mgmt_descriptor	typeref:typename:__u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_abstract_control_descriptor	typeref:typename:u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_call_management_descriptor	typeref:typename:u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_capi_control_descriptor	typeref:typename:u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_function_descriptor_generic	typeref:typename:u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_multi_channel_descriptor	typeref:typename:u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_telephone_call_descriptor	typeref:typename:u8
bmCapabilities	include/usbdescriptors.h	/^	u8 bmCapabilities;$/;"	m	struct:usb_class_telephone_operational_descriptor	typeref:typename:u8
bmCompAttributes	include/linux/usb/ch9.h	/^	__u8  bmCompAttributes;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__u8
bmDataCapabilities	include/usbdescriptors.h	/^	u8 bmDataCapabilities;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u8
bmEthernetStatistics	include/linux/usb/cdc.h	/^	__le32	bmEthernetStatistics;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__le32
bmEthernetStatistics	include/usbdescriptors.h	/^	u32 bmEthernetStatistics;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u32
bmFFITXPowerInfo	include/linux/usb/ch9.h	/^	__u8  bmFFITXPowerInfo;	\/* FFI power levels *\/$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bmOptions	include/usbdescriptors.h	/^	u8 bmOptions;$/;"	m	struct:usb_class_usb_terminal_descriptor	typeref:typename:u8
bmRequestType	include/linux/usb/cdc.h	/^	__u8	bmRequestType;$/;"	m	struct:usb_cdc_notification	typeref:typename:__u8
bmRequestType	include/usbdevice.h	/^	u8 bmRequestType;$/;"	m	struct:usb_device_request	typeref:typename:u8
bmTFITXPowerInfo	include/linux/usb/ch9.h	/^	__u8  bmTFITXPowerInfo;	\/* TFI power levels *\/$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__u8
bm_pool	drivers/net/mvpp2.c	/^	u32 *bm_pool[MVPP2_BM_POOLS_NUM];$/;"	m	struct:buffer_location	typeref:typename:u32 * []	file:
bm_pools	drivers/net/mvpp2.c	/^	struct mvpp2_bm_pool *bm_pools;$/;"	m	struct:mvpp2	typeref:struct:mvpp2_bm_pool *	file:
bmcinf	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	bmcinf[6];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[6]
bmcr_bits	drivers/net/ns8382x.c	/^enum bmcr_bits {$/;"	g	file:
bmcsr	include/usb/fusbh200.h	/^	uint32_t bmcsr;	\/* 0x40: Bus Monitor Control Status Register *\/$/;"	m	struct:fusbh200_regs	typeref:typename:uint32_t
bmctl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bmctl;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
bmdma_addr	drivers/block/pata_bfin.h	/^	unsigned long bmdma_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
bmdma_addr	drivers/block/sata_dwc.h	/^	void __iomem		*bmdma_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
bmdma_addr	drivers/block/sata_sil3114.h	/^	unsigned long bmdma_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
bmi_rx_port_disable	drivers/net/fm/eth.c	/^static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port)$/;"	f	typeref:typename:void	file:
bmi_rx_port_init	drivers/net/fm/eth.c	/^static void bmi_rx_port_init(struct fm_bmi_rx_port *rx_port)$/;"	f	typeref:typename:void	file:
bmi_tx_port_disable	drivers/net/fm/eth.c	/^static void bmi_tx_port_disable(struct fm_bmi_tx_port *tx_port)$/;"	f	typeref:typename:void	file:
bmi_tx_port_init	drivers/net/fm/eth.c	/^static void bmi_tx_port_init(struct fm_bmi_tx_port *tx_port)$/;"	f	typeref:typename:void	file:
bmier	include/usb/fusbh200.h	/^	uint32_t bmier; \/* 0x48: Bus Monitor Interrupt Enable Register *\/$/;"	m	struct:fusbh200_regs	typeref:typename:uint32_t
bmisr	include/usb/fusbh200.h	/^	uint32_t bmisr;	\/* 0x44: Bus Monitor Interrupt Status Register *\/$/;"	m	struct:fusbh200_regs	typeref:typename:uint32_t
bmp_color_table_entry	include/bmp_layout.h	/^struct __packed bmp_color_table_entry {$/;"	s
bmp_display	cmd/bmp.c	/^int bmp_display(ulong addr, int x, int y)$/;"	f	typeref:typename:int
bmp_header	include/bmp_layout.h	/^struct __packed bmp_header {$/;"	s
bmp_image	include/bmp_layout.h	/^struct bmp_image {$/;"	s
bmp_info	cmd/bmp.c	/^static int bmp_info(ulong addr)$/;"	f	typeref:typename:int	file:
bmp_logo_bitmap	board/bluewater/gurnard/splash_logo.h	/^unsigned char bmp_logo_bitmap[] = {$/;"	v	typeref:typename:unsigned char[]
bmp_logo_bitmap	include/bmp_logo_data.h	/^unsigned char bmp_logo_bitmap[] = {$/;"	v	typeref:typename:unsigned char[]
bmp_logo_palette	board/bluewater/gurnard/splash_logo.h	/^unsigned short bmp_logo_palette[] = {$/;"	v	typeref:typename:unsigned short[]
bmp_logo_palette	include/bmp_logo_data.h	/^unsigned short bmp_logo_palette[] = {$/;"	v	typeref:typename:unsigned short[]
bmp_reloc	cmd/bmp.c	/^void bmp_reloc(void) {$/;"	f	typeref:typename:void
bmr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		bmr;	\/* 0xC4 TC Block Mode Register *\/$/;"	m	struct:at91_tc	typeref:typename:u32
bmr	drivers/i2c/fti2c010.h	/^	uint32_t bmr; \/* 0x18: bus monitor register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
bmr	drivers/serial/serial_mxc.c	/^	u32 bmr;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
bmr1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 bmr1;$/;"	m	struct:src	typeref:typename:u32
bmr2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 bmr2;$/;"	m	struct:src	typeref:typename:u32
bmsts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bmsts;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
bmt	arch/m68k/include/asm/immap_520x.h	/^	u32 bmt;		\/* 0x50 bus monitor *\/$/;"	m	struct:scm1	typeref:typename:u32
bmt0	arch/m68k/include/asm/immap_5329.h	/^	u32 bmt0;		\/*0x54 Bus Monitor Timeout 0 *\/$/;"	m	struct:scm1_ctrl	typeref:typename:u32
bmt1	arch/m68k/include/asm/immap_5329.h	/^	u32 bmt1;		\/* 0x54 Bus Monitor Timeout 1 *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
bndm_en	drivers/video/ipu_regs.h	/^	u32 bndm_en[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
bnds	include/fsl_ddr_sdram.h	/^		unsigned int bnds;$/;"	m	struct:fsl_ddr_cfg_regs_s::__anon20eac7820108	typeref:typename:unsigned int
bo_enirq	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint32_t		bo_enirq;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint32_t	file:
bo_irq	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint32_t		bo_irq;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint32_t	file:
bo_offset_mask	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint32_t		bo_offset_mask;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint32_t	file:
bo_offset_offset	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint32_t		bo_offset_offset;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint32_t	file:
board	board/cadence/xtfpga/xtfpga.c	/^const char *board = "<unknown>";$/;"	v	typeref:typename:const char *
board	board/cadence/xtfpga/xtfpga.c	/^const char *board = "XT_AV110";$/;"	v	typeref:typename:const char *
board	board/cadence/xtfpga/xtfpga.c	/^const char *board = "XT_AV200";$/;"	v	typeref:typename:const char *
board	board/cadence/xtfpga/xtfpga.c	/^const char *board = "XT_AV60";$/;"	v	typeref:typename:const char *
board	board/cadence/xtfpga/xtfpga.c	/^const char *board = "XT_KC705";$/;"	v	typeref:typename:const char *
board	board/cadence/xtfpga/xtfpga.c	/^const char *board = "XT_ML605";$/;"	v	typeref:typename:const char *
board	doc/README.x86	/^board directory as vga.bin.$/;"	l
board	doc/README.x86	/^board directory.$/;"	l
board	drivers/usb/gadget/at91_udc.h	/^	struct at91_udc_data		board;$/;"	m	struct:at91_udc	typeref:struct:at91_udc_data
board	drivers/usb/host/isp116x.h	/^	struct isp116x_platform_data *board;$/;"	m	struct:isp116x	typeref:struct:isp116x_platform_data *
board_add_ram_info	arch/arm/mach-mvebu/dram.c	/^void board_add_ram_info(int use_default)$/;"	f	typeref:typename:void
board_add_ram_info	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^void board_add_ram_info(int use_default)$/;"	f	typeref:typename:void
board_add_ram_info	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^void board_add_ram_info(int use_default)$/;"	f	typeref:typename:void
board_add_ram_info	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^void board_add_ram_info(int use_default)$/;"	f	typeref:typename:void
board_add_ram_info	board/liebherr/lwmon5/sdram.c	/^void board_add_ram_info(int use_default)$/;"	f	typeref:typename:void
board_add_ram_info	common/board_f.c	/^__weak void board_add_ram_info(int use_default)$/;"	f	typeref:typename:__weak void
board_add_ram_info	drivers/ddr/fsl/util.c	/^void board_add_ram_info(int use_default)$/;"	f	typeref:typename:void
board_ahci_enable	arch/arm/mach-mvebu/sata.c	/^__weak int board_ahci_enable(void)$/;"	f	typeref:typename:__weak int
board_ahci_enable	board/Marvell/mvebu_db-88f3720/board.c	/^int board_ahci_enable(void)$/;"	f	typeref:typename:int
board_alert0	arch/arm/dts/am57xx-beagle-x15.dts	/^			board_alert0: board_alert {$/;"	l	label:board_thermal.board_trips
board_assert_mem_reset	board/freescale/common/qixis.c	/^void board_assert_mem_reset(void)$/;"	f	typeref:typename:void
board_assert_perst	board/intel/galileo/galileo.c	/^void board_assert_perst(void)$/;"	f	typeref:typename:void
board_backlight_brightness	board/liebherr/lwmon5/lwmon5.c	/^static void board_backlight_brightness(int brightness)$/;"	f	typeref:typename:void	file:
board_backlight_brightness	board/socrates/socrates.c	/^static void board_backlight_brightness(int br)$/;"	f	typeref:typename:void	file:
board_backlight_switch	board/liebherr/lwmon5/lwmon5.c	/^void board_backlight_switch(int flag)$/;"	f	typeref:typename:void
board_backlight_switch	board/socrates/socrates.c	/^void board_backlight_switch (int flag)$/;"	f	typeref:typename:void
board_bcsr	board/amcc/canyonlands/canyonlands.c	/^struct board_bcsr {$/;"	s	file:
board_boot_modes	board/advantech/dms-ba16/dms-ba16.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/bachmann/ot1200/ot1200.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/barco/platinum/platinum.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/barco/titanium/titanium.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/boundary/nitrogen6x/nitrogen6x.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/ccv/xpress/xpress.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/el/el6x/el6x.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/freescale/mx53evk/mx53evk.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/freescale/mx6sabresd/mx6sabresd.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/freescale/mx6ullevk/mx6ullevk.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/gateworks/gw_ventana/gw_ventana.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/ge/bx50v3/bx50v3.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/phytec/pcm058/pcm058.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/tbs/tbs2910/tbs2910.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/toradex/colibri_imx7/colibri_imx7.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/tqc/tqma6/tqma6_wru4.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_modes	board/wandboard/wandboard.c	/^static const struct boot_mode board_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
board_boot_order	board/chipspark/popmetal_rk3288/popmetal-rk3288.c	/^void board_boot_order(u32 *spl_boot_list)$/;"	f	typeref:typename:void
board_boot_order	board/compulab/cm_fx6/spl.c	/^void board_boot_order(u32 *spl_boot_list)$/;"	f	typeref:typename:void
board_boot_order	board/phytec/pcm058/pcm058.c	/^void board_boot_order(u32 *spl_boot_list)$/;"	f	typeref:typename:void
board_boot_order	board/rockchip/evb_rk3288/evb-rk3288.c	/^void board_boot_order(u32 *spl_boot_list)$/;"	f	typeref:typename:void
board_boot_order	board/rockchip/fennec_rk3288/fennec-rk3288.c	/^void board_boot_order(u32 *spl_boot_list)$/;"	f	typeref:typename:void
board_boot_order	common/spl/spl.c	/^__weak void board_boot_order(u32 *spl_boot_list)$/;"	f	typeref:typename:__weak void
board_cfb_skip	board/advantech/dms-ba16/dms-ba16.c	/^int board_cfb_skip(void)$/;"	f	typeref:typename:int
board_cfb_skip	board/aristainetos/aristainetos.c	/^int board_cfb_skip(void)$/;"	f	typeref:typename:int
board_cfb_skip	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_cfb_skip(void)$/;"	f	typeref:typename:int
board_cfb_skip	board/ge/bx50v3/bx50v3.c	/^int board_cfb_skip(void)$/;"	f	typeref:typename:int
board_cfb_skip	board/siemens/pxm2/board.c	/^int board_cfb_skip(void)$/;"	f	typeref:typename:int
board_cfb_skip	board/siemens/rut/board.c	/^int board_cfb_skip(void)$/;"	f	typeref:typename:int
board_cfb_skip	drivers/video/cfb_console.c	/^__weak int board_cfb_skip(void)$/;"	f	typeref:typename:__weak int
board_clock_init	board/samsung/odroid/odroid.c	/^static void board_clock_init(void)$/;"	f	typeref:typename:void	file:
board_clock_init	board/samsung/trats/trats.c	/^static void board_clock_init(void)$/;"	f	typeref:typename:void	file:
board_config_lanes_mux	board/freescale/p2041rdb/p2041rdb.c	/^void board_config_lanes_mux(void)$/;"	f	typeref:typename:void
board_config_serdes_mux	board/freescale/bsc9132qds/bsc9132qds.c	/^void board_config_serdes_mux(void)$/;"	f	typeref:typename:void
board_cooling_maps	arch/arm/dts/am57xx-beagle-x15.dts	/^		board_cooling_maps: cooling-maps {$/;"	l	label:board_thermal
board_cpld_init	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^void board_cpld_init(void)$/;"	f	typeref:typename:void
board_cpld_read	board/amcc/canyonlands/canyonlands.c	/^static inline int board_cpld_read(int offset)$/;"	f	typeref:typename:int	file:
board_cpld_version	board/amcc/kilauea/kilauea.c	/^static int board_cpld_version(void)$/;"	f	typeref:typename:int	file:
board_cpld_write	board/amcc/canyonlands/canyonlands.c	/^static inline void board_cpld_write(int offset, int data)$/;"	f	typeref:typename:void	file:
board_cpu_freq_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^u8 board_cpu_freq_get(void)$/;"	f	typeref:typename:u8
board_crit	arch/arm/dts/am57xx-beagle-x15.dts	/^			board_crit: board_crit {$/;"	l	label:board_thermal.board_trips
board_data	include/linux/usb/musb.h	/^	void		*board_data;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:void *
board_ddr_modes	board/theadorable/theadorable.c	/^static MV_DRAM_MODES board_ddr_modes[MV_DDR3_MODES_NUMBER] = {$/;"	v	typeref:typename:MV_DRAM_MODES[]	file:
board_deassert_mem_reset	board/freescale/common/qixis.c	/^void board_deassert_mem_reset(void)$/;"	f	typeref:typename:void
board_deassert_perst	board/intel/galileo/galileo.c	/^void board_deassert_perst(void)$/;"	f	typeref:typename:void
board_debug_uart_init	arch/x86/cpu/broadwell/sdram.c	/^void board_debug_uart_init(void)$/;"	f	typeref:typename:void
board_debug_uart_init	arch/x86/cpu/ivybridge/cpu.c	/^void board_debug_uart_init(void)$/;"	f	typeref:typename:void
board_debug_uart_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void board_debug_uart_init(void)$/;"	f	typeref:typename:void
board_debug_uart_init	board/qca/ap121/ap121.c	/^void board_debug_uart_init(void)$/;"	f	typeref:typename:void
board_debug_uart_init	board/qca/ap143/ap143.c	/^void board_debug_uart_init(void)$/;"	f	typeref:typename:void
board_debug_uart_init	include/debug_uart.h	/^static inline void board_debug_uart_init(void)$/;"	f	typeref:typename:void
board_detail	board/freescale/t4qds/t4240qds.c	/^void board_detail(void)$/;"	f	typeref:typename:void
board_detail	board/freescale/t4rdb/t4240rdb.c	/^void board_detail(void)$/;"	f	typeref:typename:void
board_detail	cmd/bdinfo.c	/^void __weak board_detail(void)$/;"	f	typeref:typename:void __weak
board_disp_init	drivers/video/mb862xx.c	/^static void board_disp_init (void)$/;"	f	typeref:typename:void	file:
board_early_init_f	arch/arm/cpu/armv7/am33xx/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	arch/arm/mach-tegra/board186.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	arch/arm/mach-tegra/board2.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	arch/x86/cpu/coreboot/coreboot.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	arch/x86/cpu/efi/efi.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Arcturus/ucp1020/ucp1020.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Barix/ipam390/ipam390.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/CarMediaLab/flea3/flea3.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/LaCie/net2big_v2/net2big_v2.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/LaCie/netspace_v2/netspace_v2.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/aspenite/aspenite.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/db-88f6720/db-88f6720.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/dreamplug/dreamplug.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/gplugd/gplugd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/guruplug/guruplug.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/mvebu_db-88f3720/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/mvebu_db-88f7040/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/openrd/openrd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Marvell/sheevaplug/sheevaplug.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Seagate/dockstar/dockstar.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Seagate/goflexhome/goflexhome.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Seagate/nas220/nas220.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Synology/ds109/ds109.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/Synology/ds414/ds414.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/advantech/dms-ba16/dms-ba16.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/advantech/som-db5800-som-6867/som-db5800-som-6867.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/acadia/acadia.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/bamboo/bamboo.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/bubinga/bubinga.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/canyonlands/canyonlands.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/katmai/katmai.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/kilauea/kilauea.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/luan/luan.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/makalu/makalu.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/redwood/redwood.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/sequoia/sequoia.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/walnut/walnut.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/yosemite/yosemite.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/amcc/yucca/yucca.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/aristainetos/aristainetos-v1.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/aristainetos/aristainetos-v2.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91rm9200ek/at91rm9200ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91sam9260ek/at91sam9260ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91sam9263ek/at91sam9263ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91sam9rlek/at91sam9rlek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/atngw100/atngw100.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/atngw100mkii/atngw100mkii.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/atstk1000/atstk1000.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/sama5d3xek/sama5d3xek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/atmel/sama5d4ek/sama5d4ek.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bachmann/ot1200/ot1200.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/barco/platinum/platinum.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/barco/titanium/titanium.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bf506f-ezkit/bf506f-ezkit.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bf518f-ezbrd/bf518f-ezbrd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bf548-ezkit/bf548-ezkit.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bf609-ezkit/bf609-ezkit.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bluegiga/apx4devkit/apx4devkit.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/bluewater/gurnard/gurnard.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/broadcom/bcm_ep/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/buffalo/lsxl/lsxl.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ccv/xpress/xpress.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/cirrus/edb93xx/edb93xx.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/cloudengines/pogo_e02/pogo_e02.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/cm-bf548/cm-bf548.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/creative/xfi3/xfi3.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/d-link/dns325/dns325.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/davinci/da8xxevm/da850evm.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/davinci/da8xxevm/omapl138_lcdk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/davinci/ea20/ea20.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/denx/m28evk/m28evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/denx/m53evk/m53evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/denx/ma5d4evk/ma5d4evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/dfi/dfi-bt700/dfi-bt700.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/el/el6x/el6x.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/embest/mx6boards/mx6boards.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/engicam/icorem6/icorem6.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/cpci2dp/cpci2dp.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/cpci405/cpci405.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/mecp5123/mecp5123.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/meesc/meesc.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/plu405/plu405.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/pmc405de/pmc405de.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/pmc440/pmc440.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/esd/vom405/vom405.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/bsc9131rdb/bsc9131rdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/bsc9132qds/bsc9132qds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/c29xpcie/c29xpcie.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/corenet_ds/corenet_ds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1012afrdm/ls1012afrdm.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1012aqds/ls1012aqds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1012ardb/ls1012ardb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1021aqds/ls1021aqds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1021atwr/ls1021atwr.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1043aqds/ls1043aqds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1043ardb/ls1043ardb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1046aqds/ls1046aqds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls1046ardb/ls1046ardb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls2080a/ls2080a.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls2080aqds/ls2080aqds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/ls2080ardb/ls2080ardb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc5121ads/mpc5121ads.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8313erdb/mpc8313erdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8315erdb/mpc8315erdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc832xemds/mpc832xemds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8349emds/mpc8349emds.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc837xemds/mpc837xemds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc837xerdb/mpc837xerdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8536ds/mpc8536ds.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8568mds/mpc8568mds.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8569mds/mpc8569mds.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx23evk/mx23evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx25pdk/mx25pdk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx28evk/mx28evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx31ads/mx31ads.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx31pdk/mx31pdk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx35pdk/mx35pdk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx51evk/mx51evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx53ard/mx53ard.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx53evk/mx53evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx53loco/mx53loco.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx53smd/mx53smd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6slevk/mx6slevk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx6ullevk/mx6ullevk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/p1010rdb/p1010rdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/p1022ds/p1022ds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/p1023rdb/p1023rdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/p1_twr/p1_twr.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/p2041rdb/p2041rdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/s32v234evb/s32v234evb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/t102xqds/t102xqds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/t102xrdb/t102xrdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/t1040qds/t1040qds.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/t104xrdb/t104xrdb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/freescale/vf610twr/vf610twr.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gateworks/gw_ventana/gw_ventana.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/405ep/405ep.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/405ex/405ex.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/dlvision/dlvision.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/gdppc440etx/gdppc440etx.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/intip/intip.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/mpc8308/mpc8308.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/gdsys/p1022/controlcenterd.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ge/bx50v3/bx50v3.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/google/chromebook_link/link.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/google/chromebook_samus/samus.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/google/chromebox_panther/panther.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/hisilicon/hikey/hikey.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/imgtec/malta/malta.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/imx31_phycore/imx31_phycore.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/in-circuit/grasshopper/grasshopper.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/intel/cougarcanyon2/cougarcanyon2.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/intel/crownbay/crownbay.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/intel/galileo/galileo.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/inversepath/usbarmory/usbarmory.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/iomega/iconnect/iconnect.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/jupiter/jupiter.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/keymile/km_arm/km_arm.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/keymile/kmp204x/kmp204x.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/kmc/kzm9g/kzm9g.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/kosagi/novena/novena.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/l+g/vinco/vinco.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/lego/ev3/legoev3.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/liebherr/lwmon5/lwmon5.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/maxbcm/maxbcm.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/micronas/vct/vct.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/mini-box/picosam9g45/picosam9g45.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/mosaixtech/icon/icon.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/mpl/mip405/mip405.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/mpl/pati/pati.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/mpl/pip405/pip405.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/mpl/vcma9/vcma9.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/openrisc/openrisc-generic/openrisc-generic.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/phytec/pcm052/pcm052.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/phytec/pcm058/pcm058.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ppcag/bg0900/bg0900.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/qca/ap121/ap121.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/qca/ap143/ap143.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/raidsonic/ib62x0/ib62x0.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/raspberrypi/rpi/rpi.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/alt/alt.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/blanche/blanche.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/gose/gose.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/koelsch/koelsch.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/lager/lager.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/porter/porter.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/salvator-x/salvator-x.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/silk/silk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/renesas/stout/stout.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ronetix/pm9261/pm9261.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ronetix/pm9263/pm9263.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ronetix/pm9g45/pm9g45.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/samsung/arndale/arndale.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/samsung/common/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/samsung/smdk2410/smdk2410.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/samsung/smdkv310/smdkv310.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/sandisk/sansa_fuze_plus/sfp.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/sbc8349/sbc8349.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/sbc8548/sbc8548.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/sbc8641d/sbc8641d.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/schulercontrol/sc_sps_1/sc_sps_1.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/seco/mx6quq7/mx6quq7.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/siemens/corvus/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/siemens/smartweb/smartweb.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/siemens/taurus/taurus.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/solidrun/clearfog/clearfog.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/spear/common/spr_misc.c	/^int board_early_init_f()$/;"	f	typeref:typename:int
board_early_init_f	board/sr1500/socfpga.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/st/stm32f429-discovery/stm32f429-discovery.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/st/stm32f746-disco/stm32f746-disco.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/st/stv0991/stv0991.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/synopsys/axs10x/axs10x.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/t3corp/t3corp.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/tbs/tbs2910/tbs2910.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/technologic/ts4800/ts4800.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/theadorable/theadorable.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ti/am57xx/board.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ti/dra7xx/evm.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ti/ks2_evm/board_k2e.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ti/ks2_evm/board_k2g.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ti/ks2_evm/board_k2hk.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ti/ks2_evm/board_k2l.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/timll/devkit3250/devkit3250.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/toradex/colibri_vf/colibri_vf.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/tplink/wdr4300/wdr4300.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/tqc/tqm5200/tqm5200.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/tqc/tqma6/tqma6.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/udoo/udoo.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/v38b/v38b.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/varisys/cyrus/cyrus.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/ve8313/ve8313.c	/^int board_early_init_f (void)$/;"	f	typeref:typename:int
board_early_init_f	board/wandboard/wandboard.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/warp/warp.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/warp7/warp7.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/woodburn/woodburn.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/work-microwave/work_92105/work_92105.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/xes/xpedite1000/xpedite1000.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_f	board/zyxel/nsa310s/nsa310s.c	/^int board_early_init_f(void)$/;"	f	typeref:typename:int
board_early_init_r	board/Arcturus/ucp1020/ucp1020.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/amcc/canyonlands/canyonlands.c	/^int board_early_init_r (void)$/;"	f	typeref:typename:int
board_early_init_r	board/atmel/atngw100/atngw100.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/atmel/atngw100mkii/atngw100mkii.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/atmel/atstk1000/atstk1000.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/canmb/canmb.c	/^int board_early_init_r (void)$/;"	f	typeref:typename:int
board_early_init_r	board/cm5200/cm5200.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/b4860qds/b4860qds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/bsc9132qds/bsc9132qds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/c29xpcie/c29xpcie.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/corenet_ds/corenet_ds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/mpc8313erdb/mpc8313erdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/mpc832xemds/mpc832xemds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/mpc837xemds/mpc837xemds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/mpc8536ds/mpc8536ds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/mpc8569mds/mpc8569mds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/mpc8572ds/mpc8572ds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/p1010rdb/p1010rdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/p1022ds/p1022ds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/p1023rdb/p1023rdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/p1_twr/p1_twr.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/p2041rdb/p2041rdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t102xqds/t102xqds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t102xrdb/t102xrdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t1040qds/t1040qds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t104xrdb/t104xrdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t208xqds/t208xqds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t208xrdb/t208xrdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t4qds/t4240emu.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t4qds/t4240qds.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/freescale/t4rdb/t4240rdb.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/gdsys/405ep/405ep.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/gdsys/405ex/405ex.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/gdsys/intip/intip.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/gdsys/mpc8308/mpc8308.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/gdsys/p1022/controlcenterd.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/ifm/o2dnt2/o2dnt2.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/in-circuit/grasshopper/grasshopper.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/intercontrol/digsy_mtc/digsy_mtc.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/jupiter/jupiter.c	/^int board_early_init_r (void)$/;"	f	typeref:typename:int
board_early_init_r	board/keymile/km82xx/km82xx.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/keymile/km83xx/km83xx.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/keymile/kmp204x/kmp204x.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/liebherr/lwmon5/lwmon5.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/mosaixtech/icon/icon.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/motionpro/motionpro.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/mpl/mip405/mip405.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/mpl/pip405/pip405.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/socrates/socrates.c	/^int board_early_init_r (void)$/;"	f	typeref:typename:int
board_early_init_r	board/t3corp/t3corp.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/tqc/tqm5200/tqm5200.c	/^int board_early_init_r (void)$/;"	f	typeref:typename:int
board_early_init_r	board/tqc/tqm834x/tqm834x.c	/^int board_early_init_r (void) {$/;"	f	typeref:typename:int
board_early_init_r	board/v38b/v38b.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/varisys/cyrus/cyrus.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/work-microwave/work_92105/work_92105.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/xes/xpedite517x/xpedite517x.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/xes/xpedite520x/xpedite520x.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/xes/xpedite537x/xpedite537x.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/xes/xpedite550x/xpedite550x.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_early_init_r	board/xilinx/zynqmp/zynqmp.c	/^int board_early_init_r(void)$/;"	f	typeref:typename:int
board_eeconfig	board/birdland/bav335x/board.h	/^struct board_eeconfig {$/;"	s
board_eeprom	board/freescale/common/sys_eeprom.c	/^	struct board_eeprom {$/;"	s	function:get_cpu_board_revision	file:
board_ehci_hcd_exit	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^int board_ehci_hcd_exit(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_exit	drivers/usb/host/ehci-mxs.c	/^int __weak board_ehci_hcd_exit(int port)$/;"	f	typeref:typename:int __weak
board_ehci_hcd_init	board/aristainetos/aristainetos.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/barco/platinum/platinum.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/barco/titanium/titanium.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/ccv/xpress/xpress.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/compulab/cm_fx6/cm_fx6.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/denx/m53evk/m53evk.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx51evk/mx51evk.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx53loco/mx53loco.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6slevk/mx6slevk.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/gateworks/gw_ventana/gw_ventana.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/toradex/colibri_vf/colibri_vf.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	board/tqc/tqma6/tqma6_wru4.c	/^int board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int
board_ehci_hcd_init	drivers/usb/host/ehci-mx5.c	/^int __weak board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int __weak
board_ehci_hcd_init	drivers/usb/host/ehci-mx6.c	/^int __weak board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int __weak
board_ehci_hcd_init	drivers/usb/host/ehci-mxs.c	/^int __weak board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int __weak
board_ehci_hcd_init	drivers/usb/host/ehci-vf.c	/^int __weak board_ehci_hcd_init(int port)$/;"	f	typeref:typename:int __weak
board_ehci_hcd_postinit	drivers/usb/host/ehci-mx5.c	/^void __weak board_ehci_hcd_postinit(struct usb_ehci *ehci, int port)$/;"	f	typeref:typename:void __weak
board_ehci_power	board/aristainetos/aristainetos.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/compulab/cm_fx6/cm_fx6.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/gateworks/gw_ventana/gw_ventana.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	board/tqc/tqma6/tqma6_wru4.c	/^int board_ehci_power(int port, int on)$/;"	f	typeref:typename:int
board_ehci_power	drivers/usb/host/ehci-mx6.c	/^int __weak board_ehci_power(int port, int on)$/;"	f	typeref:typename:int __weak
board_emac_count	board/amcc/kilauea/kilauea.c	/^int board_emac_count(void)$/;"	f	typeref:typename:int
board_emc_init	arch/arm/mach-tegra/emc.c	/^int board_emc_init(void)$/;"	f	typeref:typename:int
board_enable_audio_codec	board/samsung/common/exynos5-dt.c	/^static void board_enable_audio_codec(void)$/;"	f	typeref:typename:void	file:
board_eth_enable	board/st/stv0991/stv0991.c	/^int board_eth_enable(void)$/;"	f	typeref:typename:int
board_eth_init	arch/arm/mach-uniphier/micro-support-card.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/AndesTech/adp-ag101p/adp-ag101p.c	/^int board_eth_init(bd_t *bd)$/;"	f	typeref:typename:int
board_eth_init	board/Arcturus/ucp1020/ucp1020.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/Barix/ipam390/ipam390.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/BuR/common/common.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/Marvell/db-88f6720/db-88f6720.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/Marvell/gplugd/gplugd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/a4m072/a4m072.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/abilis/tb100/tb100.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/advantech/dms-ba16/dms-ba16.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/amcc/katmai/katmai.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/amcc/yucca/yucca.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/aristainetos/aristainetos-v1.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/aristainetos/aristainetos-v2.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/armltd/integrator/integrator.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/armltd/vexpress/vexpress_common.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/armltd/vexpress64/vexpress64.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91rm9200ek/at91rm9200ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91sam9260ek/at91sam9260ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91sam9261ek/at91sam9261ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/atngw100/atngw100.c	/^int board_eth_init(bd_t *bi)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/atngw100mkii/atngw100mkii.c	/^int board_eth_init(bd_t *bi)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/atstk1000/atstk1000.c	/^int board_eth_init(bd_t *bi)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/sama5d3xek/sama5d3xek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/atmel/sama5d4ek/sama5d4ek.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bachmann/ot1200/ot1200.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/barco/platinum/platinum.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/barco/titanium/titanium.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bct-brettl2/bct-brettl2.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf518f-ezbrd/bf518f-ezbrd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf526-ezbrd/bf526-ezbrd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf527-ezkit/bf527-ezkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf533-ezkit/bf533-ezkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf533-stamp/bf533-stamp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf537-minotaur/bf537-minotaur.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf537-pnav/bf537-pnav.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf537-srv1/bf537-srv1.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf537-stamp/bf537-stamp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf538f-ezkit/bf538f-ezkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf548-ezkit/bf548-ezkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf561-acvilon/bf561-acvilon.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf561-ezkit/bf561-ezkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bf609-ezkit/bf609-ezkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/birdland/bav335x/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/blackstamp/blackstamp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/blackvme/blackvme.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bluegiga/apx4devkit/apx4devkit.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bluewater/gurnard/gurnard.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bluewater/snapper9260/snapper9260.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/bosch/shc/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/br4/br4.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/broadcom/bcm_ep/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/calao/usb_a9263/usb_a9263.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cavium/thunderx/thunderx.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ccv/xpress/xpress.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cirrus/edb93xx/edb93xx.c	/^int board_eth_init(bd_t *bd)$/;"	f	typeref:typename:int
board_eth_init	board/cm-bf527/cm-bf527.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cm-bf533/cm-bf533.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cm-bf537e/cm-bf537e.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cm-bf537u/cm-bf537u.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cm-bf548/cm-bf548.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/cm-bf561/cm-bf561.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/compulab/cm_fx6/cm_fx6.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/compulab/cm_t335/cm_t335.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/compulab/cm_t35/cm_t35.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/compulab/cm_t3517/cm_t3517.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/compulab/cm_t43/cm_t43.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/compulab/cm_t54/cm_t54.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/creative/xfi3/xfi3.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/davinci/da8xxevm/da850evm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/davinci/da8xxevm/omapl138_lcdk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/davinci/ea20/ea20.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/denx/m28evk/m28evk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/denx/ma5d4evk/ma5d4evk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/dnp5370/dnp5370.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/egnite/ethernut5/ethernut5.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/el/el6x/el6x.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/embest/mx6boards/mx6boards.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/engicam/icorem6/icorem6.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/esd/meesc/meesc.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/esd/vme8349/vme8349.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/b4860qds/eth_b4860qds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/bsc9132qds/bsc9132qds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/c29xpcie/c29xpcie.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/corenet_ds/eth_hydra.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/corenet_ds/eth_p4080.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/corenet_ds/eth_superhydra.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1012afrdm/ls1012afrdm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1012aqds/ls1012aqds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1012ardb/ls1012ardb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1021aqds/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1021atwr/ls1021atwr.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1043aqds/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1043ardb/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1046aqds/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls1046ardb/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls2080a/ls2080a.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls2080aqds/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/ls2080ardb/eth_ls2080rdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/m5253demo/m5253demo.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8308rdb/mpc8308rdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8315erdb/mpc8315erdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc837xemds/mpc837xemds.c	/^int board_eth_init(bd_t *bd)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8536ds/mpc8536ds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8544ds/mpc8544ds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8548cds/mpc8548cds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8572ds/mpc8572ds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx28evk/mx28evk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx31ads/mx31ads.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx31pdk/mx31pdk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx35pdk/mx35pdk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx53ard/mx53ard.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6slevk/mx6slevk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/p1010rdb/p1010rdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/p1022ds/p1022ds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/p1023rdb/p1023rdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/p1_twr/p1_twr.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/p2041rdb/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t102xqds/eth_t102xqds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t102xrdb/eth_t102xrdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t1040qds/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t104xrdb/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t208xqds/eth_t208xqds.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t208xrdb/eth_t208xrdb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t4qds/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/freescale/t4rdb/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/gaisler/gr_ep2s60/gr_ep2s60.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/gateworks/gw_ventana/gw_ventana.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/gdsys/p1022/controlcenterd.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ge/bx50v3/bx50v3.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/gumstix/duovero/duovero.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/gumstix/pepper/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/h2200/h2200.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/highbank/highbank.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ibf-dsp561/ibf-dsp561.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/imgtec/malta/malta.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/imx31_phycore/imx31_phycore.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/in-circuit/grasshopper/grasshopper.c	/^int board_eth_init(bd_t *bi)$/;"	f	typeref:typename:int
board_eth_init	board/ip04/ip04.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ipek01/ipek01.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/isee/igep0033/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/isee/igep00x0/igep00x0.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/keymile/common/common.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/keymile/kmp204x/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/kmc/kzm9g/kzm9g.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/l+g/vinco/vinco.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/logicpd/am3517evm/am3517evm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/logicpd/omap3som/omap3logic.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/logicpd/zoom1/zoom1.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/micronas/vct/ebi_smc911x.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/micronas/vct/vct.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/mini-box/picosam9g45/picosam9g45.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/mpc8308_p1m/mpc8308_p1m.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/mpl/vcma9/vcma9.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ms7722se/ms7722se.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/omicron/calimain/calimain.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/openrisc/openrisc-generic/openrisc-generic.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/overo/overo.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/phytec/pcm051/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/phytec/pcm058/pcm058.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ppcag/bg0900/bg0900.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/pr1/pr1.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/qemu-mips/qemu-mips.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/MigoR/migo_r.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/alt/alt.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/ap325rxa/ap325rxa.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/blanche/blanche.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/gose/gose.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/koelsch/koelsch.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/lager/lager.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/porter/porter.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/r0p7734/r0p7734.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/r2dplus/r2dplus.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/r7780mp/r7780mp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/rsk7203/rsk7203.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/rsk7264/rsk7264.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/rsk7269/rsk7269.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/sh7785lcr/sh7785lcr.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/silk/silk.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/renesas/stout/stout.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ronetix/pm9261/pm9261.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ronetix/pm9263/pm9263.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ronetix/pm9g45/pm9g45.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/samsung/common/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/samsung/smdk2410/smdk2410.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/samsung/smdkc100/smdkc100.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/samsung/smdkv310/smdkv310.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/sandisk/sansa_fuze_plus/sfp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/sbc8548/sbc8548.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/schulercontrol/sc_sps_1/sc_sps_1.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/seco/mx6quq7/mx6quq7.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/shmin/shmin.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/siemens/corvus/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/siemens/draco/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/siemens/pxm2/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/siemens/rut/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/siemens/smartweb/smartweb.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/siemens/taurus/taurus.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/silica/pengwyn/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/solidrun/clearfog/clearfog.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/spear/spear300/spear300.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/spear/spear310/spear310.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/spear/spear320/spear320.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/spear/spear600/spear600.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/spear/x600/x600.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/st/stv0991/stv0991.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tbs/tbs2910/tbs2910.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tcl/sl50/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tcm-bf518/tcm-bf518.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tcm-bf537/tcm-bf537.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/technexion/twister/twister.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/technologic/ts4800/ts4800.c	/^int board_eth_init(bd_t *bd)$/;"	f	typeref:typename:int
board_eth_init	board/teejet/mt_ventoux/mt_ventoux.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/theadorable/theadorable.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/am335x/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/am43xx/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/am57xx/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/beagle/beagle.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/dra7xx/evm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/evm/evm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/ks2_evm/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/omap5_uevm/evm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/panda/panda.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/sdp4430/sdp.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/ti/ti814x/evm.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/timll/devkit8000/devkit8000.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/toradex/colibri_pxa270/colibri_pxa270.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tqc/tqm5200/tqm5200.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tqc/tqma6/tqma6_mba6.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/tqc/tqma6/tqma6_wru4.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/udoo/udoo.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/varisys/cyrus/eth.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/vscom/baltos/board.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/wandboard/wandboard.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_eth_init	board/xilinx/ppc440-generic/xilinx_ppc440_generic.c	/^int board_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
board_external_gpio_init	board/samsung/trats2/trats2.c	/^static void board_external_gpio_init(void)$/;"	f	typeref:typename:void	file:
board_fastboot_erase_partition_setup	common/fb_nand.c	/^__weak int board_fastboot_erase_partition_setup(char *name)$/;"	f	typeref:typename:__weak int
board_fastboot_write_partition_setup	common/fb_nand.c	/^__weak int board_fastboot_write_partition_setup(char *name)$/;"	f	typeref:typename:__weak int
board_final_cleanup	arch/x86/cpu/coreboot/coreboot.c	/^static void board_final_cleanup(void)$/;"	f	typeref:typename:void	file:
board_final_cleanup	arch/x86/cpu/cpu.c	/^__weak void board_final_cleanup(void)$/;"	f	typeref:typename:__weak void
board_final_cleanup	arch/x86/cpu/efi/efi.c	/^void board_final_cleanup(void)$/;"	f	typeref:typename:void
board_final_cleanup	arch/x86/cpu/quark/quark.c	/^void board_final_cleanup(void)$/;"	f	typeref:typename:void
board_final_cleanup	arch/x86/lib/fsp/fsp_common.c	/^void board_final_cleanup(void)$/;"	f	typeref:typename:void
board_fit_config_name_match	arch/arm/cpu/armv8/zynqmp/spl.c	/^int board_fit_config_name_match(const char *name)$/;"	f	typeref:typename:int
board_fit_config_name_match	arch/arm/mach-zynq/spl.c	/^int board_fit_config_name_match(const char *name)$/;"	f	typeref:typename:int
board_fit_config_name_match	board/ti/am335x/board.c	/^int board_fit_config_name_match(const char *name)$/;"	f	typeref:typename:int
board_fit_config_name_match	board/ti/am43xx/board.c	/^int board_fit_config_name_match(const char *name)$/;"	f	typeref:typename:int
board_fit_config_name_match	board/ti/am57xx/board.c	/^int board_fit_config_name_match(const char *name)$/;"	f	typeref:typename:int
board_fit_config_name_match	board/ti/dra7xx/evm.c	/^int board_fit_config_name_match(const char *name)$/;"	f	typeref:typename:int
board_fit_image_post_process	board/ti/am335x/board.c	/^void board_fit_image_post_process(void **p_image, size_t *p_size)$/;"	f	typeref:typename:void
board_fit_image_post_process	board/ti/am43xx/board.c	/^void board_fit_image_post_process(void **p_image, size_t *p_size)$/;"	f	typeref:typename:void
board_fit_image_post_process	board/ti/am57xx/board.c	/^void board_fit_image_post_process(void **p_image, size_t *p_size)$/;"	f	typeref:typename:void
board_fit_image_post_process	board/ti/dra7xx/evm.c	/^void board_fit_image_post_process(void **p_image, size_t *p_size)$/;"	f	typeref:typename:void
board_flash_get_legacy	board/AndesTech/adp-ag101p/adp-ag101p.c	/^ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)$/;"	f	typeref:typename:ulong
board_flash_get_legacy	board/freescale/m54455evb/m54455evb.c	/^ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)$/;"	f	typeref:typename:ulong
board_flash_get_legacy	board/gdsys/mpc8308/hrcon.c	/^ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)$/;"	f	typeref:typename:ulong
board_flash_get_legacy	board/gdsys/mpc8308/strider.c	/^ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)$/;"	f	typeref:typename:ulong
board_flash_get_legacy	board/mpl/vcma9/vcma9.c	/^ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)$/;"	f	typeref:typename:ulong
board_flash_get_legacy	board/samsung/smdk2410/smdk2410.c	/^ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)$/;"	f	typeref:typename:ulong
board_flash_get_legacy	board/shmin/shmin.c	/^ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)$/;"	f	typeref:typename:ulong
board_flash_read_memcpy	board/micronas/vct/ebi_nor_flash.c	/^void *board_flash_read_memcpy(void *dest, const void *src, size_t count)$/;"	f	typeref:typename:void *
board_flash_wp_on	board/xes/common/fsl_8xxx_misc.c	/^int board_flash_wp_on(void)$/;"	f	typeref:typename:int
board_flash_wp_on	common/board_r.c	/^__weak int board_flash_wp_on(void)$/;"	f	typeref:typename:__weak int
board_found	drivers/net/rtl8169.c	/^#define board_found /;"	d	file:
board_fpga_add	board/theadorable/fpga.c	/^void board_fpga_add(void)$/;"	f	typeref:typename:void
board_fpga_read	board/amcc/canyonlands/canyonlands.c	/^static inline int board_fpga_read(int offset)$/;"	f	typeref:typename:int	file:
board_fpga_write	board/amcc/canyonlands/canyonlands.c	/^static inline void board_fpga_write(int offset, int data)$/;"	f	typeref:typename:void	file:
board_ft_fman_fixup_port	board/freescale/b4860qds/eth_b4860qds.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/corenet_ds/eth_hydra.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/corenet_ds/eth_p4080.c	/^void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/corenet_ds/eth_superhydra.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/ls1043aqds/eth.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/ls1046aqds/eth.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/p2041rdb/eth.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/t102xqds/eth_t102xqds.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/t102xrdb/eth_t102xrdb.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/t1040qds/eth.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/t208xqds/eth_t208xqds.c	/^void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:void
board_ft_fman_fixup_port	board/freescale/t4qds/eth.c	/^void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,$/;"	f	typeref:typename:void
board_get_cros_ec_dev	common/cros_ec.c	/^struct cros_ec_dev *board_get_cros_ec_dev(void)$/;"	f	typeref:struct:cros_ec_dev *
board_get_ddr_arbiter_params	drivers/ddr/microchip/ddr2.c	/^const struct ddr2_arbiter_params *__weak board_get_ddr_arbiter_params(void)$/;"	f	typeref:typename:const struct ddr2_arbiter_params * __weak
board_get_enetaddr	board/intercontrol/digsy_mtc/digsy_mtc.c	/^void board_get_enetaddr (uchar * enet)$/;"	f	typeref:typename:void
board_get_enetaddr	board/v38b/ethaddr.c	/^void board_get_enetaddr(uchar *enetaddr)$/;"	f	typeref:typename:void
board_get_height	board/mosaixtech/icon/icon.c	/^int board_get_height(void)$/;"	f	typeref:typename:int
board_get_height	board/tqc/tqm5200/tqm5200.c	/^int board_get_height (void)$/;"	f	typeref:typename:int
board_get_regs	board/ipek01/ipek01.c	/^const gdc_regs *board_get_regs (void)$/;"	f	typeref:typename:const gdc_regs *
board_get_regs	board/liebherr/lwmon5/lwmon5.c	/^const gdc_regs *board_get_regs(void)$/;"	f	typeref:typename:const gdc_regs *
board_get_regs	board/mosaixtech/icon/icon.c	/^const SMI_REGS *board_get_regs(void)$/;"	f	typeref:typename:const SMI_REGS *
board_get_regs	board/socrates/socrates.c	/^const gdc_regs *board_get_regs (void)$/;"	f	typeref:typename:const gdc_regs *
board_get_regs	board/tqc/tqm5200/tqm5200.c	/^const SMI_REGS *board_get_regs (void)$/;"	f	typeref:typename:const SMI_REGS *
board_get_revision	board/samsung/common/exynos5-dt.c	/^int board_get_revision(void)$/;"	f	typeref:typename:int
board_get_usable_ram_top	arch/arm/mach-tegra/board2.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/arm/mach-tegra/tegra186/nvtboot_mem.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/cpu/broadwell/sdram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/cpu/coreboot/sdram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/cpu/efi/sdram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/cpu/ivybridge/sdram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/cpu/qemu/dram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/cpu/quark/dram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/lib/efi/efi.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/lib/fsp/fsp_dram.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	arch/x86/lib/init_helpers.c	/^__weak ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:__weak ulong
board_get_usable_ram_top	board/armadeus/apf27/apf27.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	board/imgtec/boston/ddr.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	common/board_f.c	/^__weak ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:__weak ulong
board_get_usable_ram_top	drivers/video/sunxi_display.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_usable_ram_top	drivers/video/sunxi_display2.c	/^ulong board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
board_get_width	board/mosaixtech/icon/icon.c	/^int board_get_width(void)$/;"	f	typeref:typename:int
board_get_width	board/tqc/tqm5200/tqm5200.c	/^int board_get_width (void)$/;"	f	typeref:typename:int
board_gmac_hw_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^static void board_gmac_hw_init(void)$/;"	f	typeref:typename:void	file:
board_gmac_hw_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^static void board_gmac_hw_init(void)$/;"	f	typeref:typename:void	file:
board_gpio_init	arch/arm/mach-davinci/da850_lowlevel.c	/^void board_gpio_init(void)$/;"	f	typeref:typename:void
board_gpio_init	arch/arm/mach-davinci/dm365_lowlevel.c	/^void board_gpio_init(void)$/;"	f	typeref:typename:void
board_gpio_init	board/Arcturus/ucp1020/ucp1020.c	/^void board_gpio_init(void)$/;"	f	typeref:typename:void
board_gpio_init	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^void board_gpio_init(void)$/;"	f	typeref:typename:void
board_gpio_init	board/samsung/odroid/odroid.c	/^static void board_gpio_init(void)$/;"	f	typeref:typename:void	file:
board_hwconfig	common/hwconfig.c	/^const char board_hwconfig[] __attribute__((weak)) = "";$/;"	v	typeref:typename:const char[]
board_i2c_init	drivers/i2c/i2c-uclass-compat.c	/^void board_i2c_init(const void *blob)$/;"	f	typeref:typename:void
board_i2c_init	drivers/i2c/s3c24x0_i2c.c	/^void board_i2c_init(const void *blob)$/;"	f	typeref:typename:void
board_i8042_skip	drivers/input/i8042.c	/^int __weak board_i8042_skip(void)$/;"	f	typeref:typename:int __weak
board_id	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	u32 board_id;$/;"	m	struct:board_wakeup_gpio	typeref:typename:u32
board_id	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t board_id;	\/* board layout (use x8 or x16 memory) *\/$/;"	m	struct:mrc_params	typeref:typename:uint32_t
board_id	board/amcc/canyonlands/canyonlands.c	/^	u8	board_id;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
board_id	board/logicpd/omap3som/omap3logic.c	/^static struct board_id {$/;"	s	file:
board_id_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^static u32 board_id_get(void)$/;"	f	typeref:typename:u32	file:
board_ids	board/samsung/common/exynos5-dt-types.c	/^static const struct udevice_id board_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
board_info	drivers/net/dm9000x.c	/^typedef struct board_info {$/;"	s	file:
board_info_t	drivers/net/dm9000x.c	/^} board_info_t;$/;"	t	typeref:struct:board_info	file:
board_init	arch/arm/mach-rockchip/rk3036-board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	arch/arm/mach-rockchip/rk3288-board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	arch/arm/mach-socfpga/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	arch/arm/mach-tegra/board186.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	arch/arm/mach-tegra/board2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	arch/arm/mach-uniphier/board_init.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/8dtech/eco5pk/eco5pk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/AndesTech/adp-ag101p/adp-ag101p.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Barix/ipam390/ipam390.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/BuR/brppt1/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/BuR/brxre1/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/CarMediaLab/flea3/flea3.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/LaCie/edminiv2/edminiv2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/LaCie/net2big_v2/net2big_v2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/LaCie/netspace_v2/netspace_v2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/aspenite/aspenite.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/db-88f6720/db-88f6720.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/dreamplug/dreamplug.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/gplugd/gplugd.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/guruplug/guruplug.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/mvebu_db-88f3720/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/mvebu_db-88f7040/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/openrd/openrd.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Marvell/sheevaplug/sheevaplug.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Seagate/dockstar/dockstar.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Seagate/goflexhome/goflexhome.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Seagate/nas220/nas220.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Synology/ds109/ds109.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/Synology/ds414/ds414.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/advantech/dms-ba16/dms-ba16.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/amazon/kc1/kc1.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/amlogic/odroid-c2/odroid-c2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/aristainetos/aristainetos.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/armadeus/apf27/apf27.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/armltd/integrator/integrator.c	/^int board_init (void)$/;"	f	typeref:typename:int
board_init	board/armltd/vexpress/vexpress_common.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/armltd/vexpress64/vexpress64.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91rm9200ek/at91rm9200ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9260ek/at91sam9260ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9261ek/at91sam9261ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9rlek/at91sam9rlek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/sama5d3xek/sama5d3xek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/atmel/sama5d4ek/sama5d4ek.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/bachmann/ot1200/ot1200.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/barco/platinum/platinum.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/barco/titanium/titanium.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/birdland/bav335x/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/bluegiga/apx4devkit/apx4devkit.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/bluewater/gurnard/gurnard.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/bluewater/snapper9260/snapper9260.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/bosch/shc/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/broadcom/bcm_ep/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/buffalo/lsxl/lsxl.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/calao/usb_a9263/usb_a9263.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/cavium/thunderx/thunderx.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ccv/xpress/xpress.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/cirrus/edb93xx/edb93xx.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/cloudengines/pogo_e02/pogo_e02.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/compulab/cm_fx6/cm_fx6.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/compulab/cm_t335/cm_t335.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/compulab/cm_t35/cm_t35.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/compulab/cm_t3517/cm_t3517.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/compulab/cm_t43/cm_t43.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/compulab/cm_t54/cm_t54.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/corscience/tricorder/tricorder.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/creative/xfi3/xfi3.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/d-link/dns325/dns325.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/davinci/da8xxevm/da850evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/davinci/da8xxevm/omapl138_lcdk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/davinci/ea20/ea20.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/denx/m28evk/m28evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/denx/m53evk/m53evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/denx/ma5d4evk/ma5d4evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/egnite/ethernut5/ethernut5.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/el/el6x/el6x.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/embest/mx6boards/mx6boards.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/engicam/icorem6/icorem6.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/esd/meesc/meesc.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/espt/espt.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1012afrdm/ls1012afrdm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1012aqds/ls1012aqds.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1012ardb/ls1012ardb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1021aqds/ls1021aqds.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1021atwr/ls1021atwr.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1043aqds/ls1043aqds.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1043ardb/ls1043ardb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1046aqds/ls1046aqds.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls1046ardb/ls1046ardb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls2080a/ls2080a.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls2080aqds/ls2080aqds.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/ls2080ardb/ls2080ardb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx23evk/mx23evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx25pdk/mx25pdk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx28evk/mx28evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx31ads/mx31ads.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx31pdk/mx31pdk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx35pdk/mx35pdk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx51evk/mx51evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx53ard/mx53ard.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx53evk/mx53evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx53loco/mx53loco.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx53smd/mx53smd.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6slevk/mx6slevk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx6ullevk/mx6ullevk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/s32v234evb/s32v234evb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/freescale/vf610twr/vf610twr.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/gateworks/gw_ventana/gw_ventana.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ge/bx50v3/bx50v3.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/gumstix/duovero/duovero.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/gumstix/pepper/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/h2200/h2200.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/highbank/highbank.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/hisilicon/hikey/hikey.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/htkw/mcx/mcx.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/imx31_phycore/imx31_phycore.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/inversepath/usbarmory/usbarmory.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/iomega/iconnect/iconnect.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/isee/igep0033/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/isee/igep00x0/igep00x0.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/keymile/km_arm/km_arm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/kmc/kzm9g/kzm9g.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/kosagi/novena/novena.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/l+g/vinco/vinco.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/lego/ev3/legoev3.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/lg/sniper/sniper.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/logicpd/am3517evm/am3517evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/logicpd/omap3som/omap3logic.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/logicpd/zoom1/zoom1.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/maxbcm/maxbcm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/mini-box/picosam9g45/picosam9g45.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/mpl/vcma9/vcma9.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/mpr2/mpr2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ms7720se/ms7720se.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ms7722se/ms7722se.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ms7750se/ms7750se.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/nokia/rx51/rx51.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/omicron/calimain/calimain.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/overo/common.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/pandora/pandora.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/phytec/pcm051/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/phytec/pcm052/pcm052.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/phytec/pcm058/pcm058.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ppcag/bg0900/bg0900.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/qualcomm/dragonboard410c/dragonboard410c.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/quipos/cairo/cairo.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/raidsonic/ib62x0/ib62x0.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/raspberrypi/rpi/rpi.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/MigoR/migo_r.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/alt/alt.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/ap325rxa/ap325rxa.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/blanche/blanche.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/ecovec/ecovec.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/gose/gose.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/koelsch/koelsch.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/lager/lager.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/porter/porter.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/r0p7734/r0p7734.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/r2dplus/r2dplus.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/r7780mp/r7780mp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/rsk7203/rsk7203.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/rsk7264/rsk7264.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/rsk7269/rsk7269.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/salvator-x/salvator-x.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/sh7752evb/sh7752evb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/sh7753evb/sh7753evb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/sh7757lcr/sh7757lcr.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/sh7763rdp/sh7763rdp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/sh7785lcr/sh7785lcr.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/silk/silk.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/renesas/stout/stout.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/rockchip/evb_rk3399/evb-rk3399.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ronetix/pm9261/pm9261.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ronetix/pm9263/pm9263.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ronetix/pm9g45/pm9g45.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/samsung/arndale/arndale.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/samsung/common/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/samsung/goni/goni.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/samsung/smdk2410/smdk2410.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/samsung/smdkc100/smdkc100.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/samsung/smdkv310/smdkv310.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/sandisk/sansa_fuze_plus/sfp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/schulercontrol/sc_sps_1/sc_sps_1.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/seco/mx6quq7/mx6quq7.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/shmin/shmin.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/siemens/common/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/siemens/corvus/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/siemens/smartweb/smartweb.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/siemens/taurus/taurus.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/silica/pengwyn/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/solidrun/clearfog/clearfog.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/spear/spear300/spear300.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/spear/spear310/spear310.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/spear/spear320/spear320.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/spear/spear600/spear600.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/spear/x600/x600.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/st/stm32f429-discovery/stm32f429-discovery.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/st/stm32f746-disco/stm32f746-disco.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/st/stv0991/stv0991.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/sunxi/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/syteco/zmx25/zmx25.c	/^int board_init()$/;"	f	typeref:typename:int
board_init	board/tbs/tbs2910/tbs2910.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/tcl/sl50/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/technexion/tao3530/tao3530.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/technexion/twister/twister.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/technologic/ts4800/ts4800.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/teejet/mt_ventoux/mt_ventoux.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/theadorable/theadorable.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/am335x/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/am3517crane/am3517crane.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/am43xx/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/am57xx/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/beagle/beagle.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/dra7xx/evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/evm/evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/ks2_evm/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/omap5_uevm/evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/panda/panda.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/sdp4430/sdp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/ti814x/evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/ti/ti816x/evm.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/timll/devkit3250/devkit3250.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/timll/devkit8000/devkit8000.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/toradex/colibri_pxa270/colibri_pxa270.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/toradex/colibri_vf/colibri_vf.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/tqc/tqma6/tqma6.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/udoo/udoo.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/vscom/baltos/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/wandboard/wandboard.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/warp/warp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/warp7/warp7.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/woodburn/woodburn.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/work-microwave/work_92105/work_92105.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/xilinx/zynq/board.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/xilinx/zynqmp/zynqmp.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/zipitz2/zipitz2.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	board/zyxel/nsa310s/nsa310s.c	/^int board_init(void)$/;"	f	typeref:typename:int
board_init	include/dwmmc.h	/^	void (*board_init)(struct dwmci_host *host);$/;"	m	struct:dwmci_host	typeref:typename:void (*)(struct dwmci_host * host)
board_init_ddr	board/siemens/draco/board.c	/^static void board_init_ddr(void)$/;"	f	typeref:typename:void	file:
board_init_ddr	board/siemens/pxm2/board.c	/^static void board_init_ddr(void)$/;"	f	typeref:typename:void	file:
board_init_ddr	board/siemens/rut/board.c	/^static void board_init_ddr(void)$/;"	f	typeref:typename:void	file:
board_init_enetaddr	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static void board_init_enetaddr(uchar *mac_addr)$/;"	f	typeref:typename:void	file:
board_init_enetaddr	board/bf526-ezbrd/bf526-ezbrd.c	/^static void board_init_enetaddr(uchar *mac_addr)$/;"	f	typeref:typename:void	file:
board_init_enetaddr	board/bf527-ezkit/bf527-ezkit.c	/^static void board_init_enetaddr(uchar *mac_addr)$/;"	f	typeref:typename:void	file:
board_init_enetaddr	board/bf537-stamp/bf537-stamp.c	/^static void board_init_enetaddr(uchar *mac_addr)$/;"	f	typeref:typename:void	file:
board_init_enetaddr	board/cm-bf527/cm-bf527.c	/^static void board_init_enetaddr(uchar *mac_addr)$/;"	f	typeref:typename:void	file:
board_init_enetaddr	board/dnp5370/dnp5370.c	/^static void board_init_enetaddr(uchar *mac_addr)$/;"	f	typeref:typename:void	file:
board_init_f	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^inline void board_init_f(unsigned long bootflag)$/;"	f	typeref:typename:void
board_init_f	arch/arm/cpu/arm926ejs/spear/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/cpu/armv7/am33xx/board.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/cpu/armv7/omap3/board.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/cpu/armv8/fsl-layerscape/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/cpu/armv8/zynqmp/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/lib/spl.c	/^void __weak board_init_f(ulong dummy)$/;"	f	typeref:typename:void __weak
board_init_f	arch/arm/mach-at91/spl_at91.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-at91/spl_atmel.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-exynos/spl_boot.c	/^void board_init_f(unsigned long bootflag)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-mvebu/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-rockchip/rk3036-board-spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-rockchip/rk3288-board-spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-socfpga/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-sunxi/board.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/arm/mach-zynq/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	arch/powerpc/cpu/mpc5xxx/spl_boot.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	arch/powerpc/cpu/ppc4xx/spl_boot.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	arch/sandbox/cpu/spl.c	/^void board_init_f(ulong flag)$/;"	f	typeref:typename:void
board_init_f	board/Arcturus/ucp1020/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/Arcturus/ucp1020/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/armadeus/apf27/apf27.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/bachmann/ot1200/ot1200_spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/barco/platinum/spl_picon.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/barco/platinum/spl_titanium.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/ccv/xpress/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/compulab/cm_fx6/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/el/el6x/el6x.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/engicam/icorem6/icorem6.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/b4860qds/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/bsc9131rdb/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/bsc9132qds/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/c29xpcie/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/c29xpcie/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/ls1021aqds/ls1021aqds.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/ls1021atwr/ls1021atwr.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mpc8313erdb/mpc8313erdb.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mpc8315erdb/mpc8315erdb.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mx31pdk/mx31pdk.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mx6sabresd/mx6sabresd.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mx6slevk/mx6slevk.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/freescale/p1010rdb/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/p1010rdb/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/p1022ds/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/p1022ds/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/p1_p2_rdb_pc/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/p1_p2_rdb_pc/spl_minimal.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t102xqds/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t102xrdb/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t104xrdb/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t208xqds/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t208xrdb/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t4qds/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/freescale/t4rdb/spl.c	/^void board_init_f(ulong bootflag)$/;"	f	typeref:typename:void
board_init_f	board/gateworks/gw_ventana/gw_ventana_spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/kosagi/novena/novena_spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/phytec/pcm058/pcm058.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/udoo/udoo_spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/wandboard/spl.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	board/woodburn/woodburn.c	/^void board_init_f(ulong dummy)$/;"	f	typeref:typename:void
board_init_f	common/board_f.c	/^void board_init_f(ulong boot_flags)$/;"	f	typeref:typename:void
board_init_f_alloc_reserve	common/init/board_init.c	/^ulong board_init_f_alloc_reserve(ulong top)$/;"	f	typeref:typename:ulong
board_init_f_init_reserve	common/init/board_init.c	/^void board_init_f_init_reserve(ulong base)$/;"	f	typeref:typename:void
board_init_f_r	common/board_f.c	/^void board_init_f_r(void)$/;"	f	typeref:typename:void
board_init_f_r_trampoline	arch/x86/cpu/start.S	/^board_init_f_r_trampoline:$/;"	l
board_init_finished	board/barco/platinum/platinum.c	/^void board_init_finished(void)$/;"	f	typeref:typename:void
board_init_gpio	board/barco/platinum/platinum.c	/^void board_init_gpio(void)$/;"	f	typeref:typename:void
board_init_gpmi_nand	board/barco/platinum/platinum.c	/^void board_init_gpmi_nand(void)$/;"	f	typeref:typename:void
board_init_i2c	board/barco/platinum/platinum.c	/^void board_init_i2c(void)$/;"	f	typeref:typename:void
board_init_i2c	board/samsung/trats2/trats2.c	/^static void board_init_i2c(void)$/;"	f	typeref:typename:void	file:
board_init_ll	board/bluegiga/apx4devkit/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/creative/xfi3/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/denx/m28evk/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/freescale/mx23evk/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/freescale/mx28evk/iomux.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/olimex/mx23_olinuxino/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/ppcag/bg0900/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/sandisk/sansa_fuze_plus/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_ll	board/schulercontrol/sc_sps_1/spl_boot.c	/^void board_init_ll(const uint32_t arg, const uint32_t *resptr)$/;"	f	typeref:typename:void
board_init_r	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^inline void board_init_r(gd_t *id, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	arch/arm/mach-exynos/spl_boot.c	/^void board_init_r(gd_t *id, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	arch/arm/mach-rockchip/rk3036-board-spl.c	/^void board_init_r(gd_t *id, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/Arcturus/ucp1020/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/Arcturus/ucp1020/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/b4860qds/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/bsc9131rdb/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/bsc9132qds/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/c29xpcie/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/c29xpcie/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/mpc8313erdb/mpc8313erdb.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/mpc8315erdb/mpc8315erdb.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/p1010rdb/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/p1010rdb/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/p1022ds/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/p1022ds/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/p1_p2_rdb_pc/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/p1_p2_rdb_pc/spl_minimal.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t102xqds/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t102xrdb/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t104xrdb/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t208xqds/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t208xrdb/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t4qds/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	board/freescale/t4rdb/spl.c	/^void board_init_r(gd_t *gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	common/board_r.c	/^void board_init_r(gd_t *new_gd, ulong dest_addr)$/;"	f	typeref:typename:void
board_init_r	common/spl/spl.c	/^void board_init_r(gd_t *dummy1, ulong dummy2)$/;"	f	typeref:typename:void
board_init_spi	board/barco/platinum/platinum.c	/^void board_init_spi(void)$/;"	f	typeref:typename:void
board_init_uart	board/barco/platinum/platinum.c	/^void board_init_uart(void)$/;"	f	typeref:typename:void
board_init_uart_f	arch/arm/mach-tegra/board.c	/^void board_init_uart_f(void)$/;"	f	typeref:typename:void
board_init_unreloc	arch/sparc/cpu/leon2/start.S	/^board_init_unreloc:$/;"	l
board_init_unreloc	arch/sparc/cpu/leon3/start.S	/^board_init_unreloc:$/;"	l
board_init_usb	board/barco/platinum/platinum.c	/^void board_init_usb(void)$/;"	f	typeref:typename:void
board_is_am572x_evm	board/ti/am57xx/board.c	/^#define board_is_am572x_evm(/;"	d	file:
board_is_am572x_idk	board/ti/am57xx/board.c	/^#define board_is_am572x_idk(/;"	d	file:
board_is_b_sample	board/bosch/shc/board.h	/^static inline int board_is_b_sample(void)$/;"	f	typeref:typename:int
board_is_bbg1	board/ti/am335x/board.h	/^static inline int board_is_bbg1(void)$/;"	f	typeref:typename:int
board_is_bone	board/ti/am335x/board.h	/^static inline int board_is_bone(void)$/;"	f	typeref:typename:int
board_is_bone	board/vscom/baltos/board.h	/^static inline int board_is_bone(struct am335x_baseboard_id *header)$/;"	f	typeref:typename:int
board_is_bone_lt	board/ti/am335x/board.h	/^static inline int board_is_bone_lt(void)$/;"	f	typeref:typename:int
board_is_bone_lt	board/vscom/baltos/board.h	/^static inline int board_is_bone_lt(struct am335x_baseboard_id *header)$/;"	f	typeref:typename:int
board_is_c3_sample	board/bosch/shc/board.h	/^static inline int board_is_c3_sample(void)$/;"	f	typeref:typename:int
board_is_c_sample	board/bosch/shc/board.h	/^static inline int board_is_c_sample(void)$/;"	f	typeref:typename:int
board_is_dra72x_evm	board/ti/dra7xx/evm.c	/^#define board_is_dra72x_evm(/;"	d	file:
board_is_dra72x_revc_or_later	board/ti/dra7xx/evm.c	/^#define board_is_dra72x_revc_or_later(/;"	d	file:
board_is_dra74x_evm	board/ti/dra7xx/evm.c	/^#define board_is_dra74x_evm(/;"	d	file:
board_is_dra74x_revh_or_later	board/ti/dra7xx/evm.c	/^#define board_is_dra74x_revh_or_later(/;"	d	file:
board_is_eposevm	board/ti/am43xx/board.h	/^static inline int board_is_eposevm(void)$/;"	f	typeref:typename:int
board_is_evm	board/ti/am43xx/board.h	/^static inline int board_is_evm(void)$/;"	f	typeref:typename:int
board_is_evm_12_or_later	board/ti/am43xx/board.h	/^static inline int board_is_evm_12_or_later(void)$/;"	f	typeref:typename:int
board_is_evm_14_or_later	board/ti/am43xx/board.h	/^static inline int board_is_evm_14_or_later(void)$/;"	f	typeref:typename:int
board_is_evm_15_or_later	board/ti/am335x/board.h	/^static inline int board_is_evm_15_or_later(void)$/;"	f	typeref:typename:int
board_is_evm_15_or_later	board/vscom/baltos/board.h	/^static inline int board_is_evm_15_or_later(struct am335x_baseboard_id *header)$/;"	f	typeref:typename:int
board_is_evm_sk	board/ti/am335x/board.h	/^static inline int board_is_evm_sk(void)$/;"	f	typeref:typename:int
board_is_evm_sk	board/vscom/baltos/board.h	/^static inline int board_is_evm_sk(struct am335x_baseboard_id *header)$/;"	f	typeref:typename:int
board_is_generic	board/samsung/common/exynos5-dt-types.c	/^bool board_is_generic(void)$/;"	f	typeref:typename:bool
board_is_gp_evm	board/ti/am335x/board.h	/^static inline int board_is_gp_evm(void)$/;"	f	typeref:typename:int
board_is_gp_evm	board/vscom/baltos/board.h	/^static inline int board_is_gp_evm(struct am335x_baseboard_id *header)$/;"	f	typeref:typename:int
board_is_gpevm	board/ti/am43xx/board.h	/^static inline int board_is_gpevm(void)$/;"	f	typeref:typename:int
board_is_hsevm	board/ti/am43xx/board.h	/^static inline int board_is_hsevm(void)$/;"	f	typeref:typename:int
board_is_icev2	board/ti/am335x/board.h	/^static inline int board_is_icev2(void)$/;"	f	typeref:typename:int
board_is_idk	board/ti/am335x/board.h	/^static inline int board_is_idk(void)$/;"	f	typeref:typename:int
board_is_idk	board/ti/am43xx/board.h	/^static inline int board_is_idk(void)$/;"	f	typeref:typename:int
board_is_idk	board/vscom/baltos/board.h	/^static inline int board_is_idk(struct am335x_baseboard_id *header)$/;"	f	typeref:typename:int
board_is_odroidxu3	board/samsung/common/exynos5-dt-types.c	/^bool board_is_odroidxu3(void)$/;"	f	typeref:typename:bool
board_is_odroidxu4	board/samsung/common/exynos5-dt-types.c	/^bool board_is_odroidxu4(void)$/;"	f	typeref:typename:bool
board_is_series	board/bosch/shc/board.h	/^static inline int board_is_series(void)$/;"	f	typeref:typename:int
board_is_sk	board/ti/am43xx/board.h	/^static inline int board_is_sk(void)$/;"	f	typeref:typename:int
board_is_x15	board/ti/am57xx/board.c	/^#define board_is_x15(/;"	d	file:
board_ksz_init	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static bool board_ksz_init(void)$/;"	f	typeref:typename:bool	file:
board_late_init	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	arch/arm/mach-rockchip/rk3036-board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	arch/arm/mach-rockchip/rk3288-board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	arch/arm/mach-tegra/board186.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	arch/arm/mach-tegra/board2.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	arch/arm/mach-uniphier/board_late_init.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/BuR/brppt1/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/BuR/brxre1/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/Marvell/mvebu_db-88f7040/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/advantech/dms-ba16/dms-ba16.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/aristainetos/aristainetos-v2.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/atmel/sama5d3xek/sama5d3xek.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/birdland/bav335x/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/bluewater/gurnard/gurnard.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/bosch/shc/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ccv/xpress/xpress.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/davinci/ea20/ea20.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/el/el6x/el6x.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/embest/mx6boards/mx6boards.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/ls1021aqds/ls1021aqds.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/ls1021atwr/ls1021atwr.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx25pdk/mx25pdk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx31pdk/mx31pdk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx35pdk/mx35pdk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx51evk/mx51evk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx53evk/mx53evk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx53loco/mx53loco.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx6ullevk/mx6ullevk.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ge/bx50v3/bx50v3.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/htkw/mcx/mcx.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/imx31_phycore/imx31_phycore.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/keymile/km_arm/km_arm.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/kosagi/novena/novena.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/logicpd/omap3som/omap3logic.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/mpl/vcma9/vcma9.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ms7750se/ms7750se.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/phytec/pcm058/pcm058.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/renesas/ecovec/ecovec.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/renesas/r0p7734/r0p7734.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/renesas/r2dplus/r2dplus.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/renesas/sh7752evb/sh7752evb.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/renesas/sh7753evb/sh7753evb.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/renesas/sh7757lcr/sh7757lcr.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/samsung/common/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/samtec/vining_fpga/socfpga.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/sandbox/sandbox.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/siemens/draco/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/siemens/pxm2/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/siemens/rut/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/spear/x600/x600.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/syteco/zmx25/zmx25.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/tcl/sl50/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/theadorable/theadorable.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ti/am335x/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ti/am43xx/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ti/am57xx/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/ti/dra7xx/evm.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/toradex/colibri_vf/colibri_vf.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/tqc/tqma6/tqma6.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/udoo/udoo.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/vscom/baltos/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/wandboard/wandboard.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/warp/warp.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/warp7/warp7.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/xilinx/microblaze-generic/microblaze-generic.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/xilinx/zynq/board.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_late_init	board/xilinx/zynqmp/zynqmp.c	/^int board_late_init(void)$/;"	f	typeref:typename:int
board_lcd_hw_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^static void board_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
board_lmb_reserve	lib/lmb.c	/^__weak void board_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:__weak void
board_map_oprom_vendev	drivers/pci/pci_rom.c	/^__weak uint32_t board_map_oprom_vendev(uint32_t vendev)$/;"	f	typeref:typename:__weak uint32_t
board_map_oprom_vendev	drivers/video/broadwell_igd.c	/^u32 board_map_oprom_vendev(u32 vendev)$/;"	f	typeref:typename:u32
board_map_oprom_vendev	drivers/video/ivybridge_igd.c	/^uint32_t board_map_oprom_vendev(uint32_t vendev)$/;"	f	typeref:typename:uint32_t
board_mem_de_reset	include/fsl_ddr.h	/^	void (*board_mem_de_reset)(void);$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:void (*)(void)
board_mem_reset	include/fsl_ddr.h	/^	void (*board_mem_reset)(void);$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:void (*)(void)
board_mem_sleep_setup	board/freescale/common/arm_sleep.c	/^void __weak board_mem_sleep_setup(void)$/;"	f	typeref:typename:void __weak
board_mem_sleep_setup	board/freescale/common/mpc85xx_sleep.c	/^void __weak board_mem_sleep_setup(void)$/;"	f	typeref:typename:void __weak
board_mem_sleep_setup	board/freescale/ls1021aqds/ddr.c	/^void board_mem_sleep_setup(void)$/;"	f	typeref:typename:void
board_mem_sleep_setup	board/freescale/t102xqds/ddr.c	/^void board_mem_sleep_setup(void)$/;"	f	typeref:typename:void
board_mem_sleep_setup	board/freescale/t102xrdb/ddr.c	/^void board_mem_sleep_setup(void)$/;"	f	typeref:typename:void
board_mem_sleep_setup	board/freescale/t1040qds/ddr.c	/^void board_mem_sleep_setup(void)$/;"	f	typeref:typename:void
board_mem_sleep_setup	board/freescale/t104xrdb/ddr.c	/^void board_mem_sleep_setup(void)$/;"	f	typeref:typename:void
board_memctl_options	board/xes/xpedite517x/ddr.c	/^typedef struct board_memctl_options {$/;"	s	file:
board_memctl_options	board/xes/xpedite537x/ddr.c	/^typedef struct board_memctl_options {$/;"	s	file:
board_memctl_options_t	board/xes/xpedite517x/ddr.c	/^} board_memctl_options_t;$/;"	t	typeref:struct:board_memctl_options	file:
board_memctl_options_t	board/xes/xpedite537x/ddr.c	/^} board_memctl_options_t;$/;"	t	typeref:struct:board_memctl_options	file:
board_mmc_get_env_dev	arch/arm/cpu/armv7/mx6/soc.c	/^__weak int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:__weak int
board_mmc_get_env_dev	arch/arm/cpu/armv7/mx7/soc.c	/^__weak int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:__weak int
board_mmc_get_env_dev	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/freescale/mx6slevk/mx6slevk.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/freescale/mx6ullevk/mx6ullevk.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/phytec/pcm058/pcm058.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_dev	board/tbs/tbs2910/tbs2910.c	/^int board_mmc_get_env_dev(int devno)$/;"	f	typeref:typename:int
board_mmc_get_env_part	arch/arm/cpu/armv7/mx6/soc.c	/^__weak int board_mmc_get_env_part(int devno)$/;"	f	typeref:typename:__weak int
board_mmc_get_env_part	board/tbs/tbs2910/tbs2910.c	/^int board_mmc_get_env_part(int devno)$/;"	f	typeref:typename:int
board_mmc_getcd	board/advantech/dms-ba16/dms-ba16.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/aristainetos/aristainetos.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/bachmann/ot1200/ot1200.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/barco/platinum/platinum.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/barco/titanium/titanium.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/ccv/xpress/xpress.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/compulab/cm_fx6/common.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/compulab/cm_t35/cm_t35.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/denx/m53evk/m53evk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/egnite/ethernut5/ethernut5.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/el/el6x/el6x.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/embest/mx6boards/mx6boards.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/engicam/icorem6/icorem6.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx25pdk/mx25pdk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx35pdk/mx35pdk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx51evk/mx51evk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx53ard/mx53ard.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx53evk/mx53evk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx53loco/mx53loco.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx53smd/mx53smd.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6slevk/mx6slevk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/s32v234evb/s32v234evb.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/t102xrdb/spl.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/t102xrdb/t102xrdb.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/freescale/vf610twr/vf610twr.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/gateworks/gw_ventana/gw_ventana.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/ge/bx50v3/bx50v3.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/inversepath/usbarmory/usbarmory.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/kosagi/novena/novena.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/kosagi/novena/novena_spl.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/phytec/pcm052/pcm052.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/phytec/pcm058/pcm058.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/seco/mx6quq7/mx6quq7.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/tbs/tbs2910/tbs2910.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/technologic/ts4800/ts4800.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/toradex/colibri_vf/colibri_vf.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/tqc/tqma6/tqma6.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/udoo/udoo.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/wandboard/wandboard.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/warp/warp.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/warp7/warp7.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	board/woodburn/woodburn.c	/^int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getcd	drivers/mmc/mmc.c	/^__weak int board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:__weak int
board_mmc_getwp	board/freescale/t102xrdb/spl.c	/^int board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getwp	board/freescale/t102xrdb/t102xrdb.c	/^int board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getwp	board/kosagi/novena/novena.c	/^int board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getwp	board/tqc/tqma6/tqma6.c	/^int board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
board_mmc_getwp	drivers/mmc/mmc.c	/^__weak int board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:__weak int
board_mmc_init	arch/arm/cpu/armv7/omap-common/boot-common.c	/^__weak int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:__weak int
board_mmc_init	arch/arm/mach-kirkwood/cpu.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	arch/arm/mach-mvebu/cpu.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/AndesTech/adp-ag101p/adp-ag101p.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/BuR/common/common.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/advantech/dms-ba16/dms-ba16.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/amazon/kc1/kc1.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/aristainetos/aristainetos.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/at91sam9260ek/at91sam9260ek.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/at91sam9rlek/at91sam9rlek.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/sama5d3xek/sama5d3xek.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/atmel/sama5d4ek/sama5d4ek.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/bachmann/ot1200/ot1200.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/barco/platinum/platinum.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/barco/titanium/titanium.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/bf518f-ezbrd/bf518f-ezbrd.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/bf548-ezkit/bf548-ezkit.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/bf609-ezkit/bf609-ezkit.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/bluegiga/apx4devkit/apx4devkit.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/bosch/shc/board.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ccv/xpress/xpress.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/cirrus/edb93xx/edb93xx.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/compulab/cm_fx6/cm_fx6.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/compulab/cm_fx6/spl.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/compulab/cm_t35/cm_t35.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/compulab/cm_t3517/cm_t3517.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/compulab/cm_t54/cm_t54.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/corscience/tricorder/tricorder.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/creative/xfi3/xfi3.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/davinci/da8xxevm/da850evm.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/davinci/da8xxevm/omapl138_lcdk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/denx/m28evk/m28evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/denx/m53evk/m53evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/denx/ma5d4evk/ma5d4evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/egnite/ethernut5/ethernut5.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/el/el6x/el6x.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/embest/mx6boards/mx6boards.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/engicam/icorem6/icorem6.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/ls1021aqds/ls1021aqds.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/ls1021atwr/ls1021atwr.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mpc8308rdb/mpc8308rdb.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mpc837xemds/mpc837xemds.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mpc837xerdb/mpc837xerdb.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mpc8569mds/mpc8569mds.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx23evk/mx23evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx25pdk/mx25pdk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx28evk/mx28evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx35pdk/mx35pdk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx51evk/mx51evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx53ard/mx53ard.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx53evk/mx53evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx53loco/mx53loco.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx53smd/mx53smd.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6qarm2/mx6qarm2.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6slevk/mx6slevk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/p1010rdb/p1010rdb.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/s32v234evb/s32v234evb.c	/^int board_mmc_init(bd_t * bis)$/;"	f	typeref:typename:int
board_mmc_init	board/freescale/vf610twr/vf610twr.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/gateworks/gw_ventana/gw_ventana.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/gdsys/mpc8308/hrcon.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/gdsys/mpc8308/strider.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/ge/bx50v3/bx50v3.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/gumstix/duovero/duovero.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/hisilicon/hikey/hikey.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/htkw/mcx/mcx.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/inversepath/usbarmory/usbarmory.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/isee/igep00x0/igep00x0.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/kosagi/novena/novena.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/kosagi/novena/novena_spl.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/l+g/vinco/vinco.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/lego/ev3/legoev3.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/lg/sniper/sniper.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/logicpd/am3517evm/am3517evm.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/logicpd/omap3som/omap3logic.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/logicpd/zoom1/zoom1.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/mini-box/picosam9g45/picosam9g45.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/nokia/rx51/rx51.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/overo/overo.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/pandora/pandora.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/phytec/pcm052/pcm052.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/phytec/pcm058/pcm058.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/quipos/cairo/cairo.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/raspberrypi/rpi/rpi.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/alt/alt.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/blanche/blanche.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/gose/gose.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/koelsch/koelsch.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/lager/lager.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/porter/porter.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/sh7752evb/sh7752evb.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/sh7753evb/sh7753evb.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/sh7757lcr/sh7757lcr.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/silk/silk.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/renesas/stout/stout.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/samsung/arndale/arndale.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/samsung/common/board.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/samsung/goni/goni.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/samsung/smdkv310/smdkv310.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/sandisk/sansa_fuze_plus/sfp.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/schulercontrol/sc_sps_1/sc_sps_1.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/seco/mx6quq7/mx6quq7.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/siemens/taurus/taurus.c	/^int board_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
board_mmc_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/sunxi/board.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/synopsys/axs10x/axs10x.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/tbs/tbs2910/tbs2910.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/tcm-bf518/tcm-bf518.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/technexion/tao3530/tao3530.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/technexion/twister/twister.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/technologic/ts4800/ts4800.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/teejet/mt_ventoux/mt_ventoux.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/am3517crane/am3517crane.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/am57xx/board.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/beagle/beagle.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/dra7xx/evm.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/evm/evm.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/ks2_evm/board_k2g.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/omap5_uevm/evm.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/panda/panda.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/sdp4430/sdp.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/ti/ti814x/evm.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/timll/devkit8000/devkit8000.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/toradex/colibri_pxa270/colibri_pxa270.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/toradex/colibri_vf/colibri_vf.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/tqc/tqma6/tqma6.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/udoo/udoo.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/wandboard/wandboard.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/warp/warp.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/warp7/warp7.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/woodburn/woodburn.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	board/zipitz2/zipitz2.c	/^int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
board_mmc_init	drivers/mmc/mmc.c	/^__weak int board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:__weak int
board_mmc_power_init	board/amazon/kc1/kc1.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/compulab/cm_t35/cm_t35.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/corscience/tricorder/tricorder.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/gumstix/duovero/duovero.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/isee/igep00x0/igep00x0.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/lg/sniper/sniper.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/logicpd/omap3som/omap3logic.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/logicpd/zoom1/zoom1.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/nokia/rx51/rx51.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/overo/overo.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/pandora/pandora.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/technexion/tao3530/tao3530.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/ti/beagle/beagle.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/ti/evm/evm.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/ti/panda/panda.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/ti/sdp4430/sdp.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	board/timll/devkit8000/devkit8000.c	/^void board_mmc_power_init(void)$/;"	f	typeref:typename:void
board_mmc_power_init	drivers/mmc/mmc.c	/^__weak void board_mmc_power_init(void)$/;"	f	typeref:typename:__weak void
board_mode	drivers/usb/musb-new/musb_core.h	/^	u8 board_mode;		\/* enum musb_mode *\/$/;"	m	struct:musb	typeref:typename:u8
board_modules_scan	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^static int board_modules_scan(void)$/;"	f	typeref:typename:int	file:
board_mtdparts_default	board/isee/igep00x0/igep00x0.c	/^void board_mtdparts_default(const char **mtdids, const char **mtdparts)$/;"	f	typeref:typename:void
board_musb_init	board/bf527-ezkit/bf527-ezkit.c	/^void board_musb_init(void)$/;"	f	typeref:typename:void
board_musb_init	board/bf548-ezkit/bf548-ezkit.c	/^void board_musb_init(void)$/;"	f	typeref:typename:void
board_mux	include/fsl-mc/ldpaa_wriop.h	/^	u8 board_mux;$/;"	m	struct:wriop_dpmac_info	typeref:typename:u8
board_mux_lane	board/freescale/t102xrdb/t102xrdb.c	/^static void board_mux_lane(void)$/;"	f	typeref:typename:void	file:
board_mux_lane_to_slot	board/freescale/t102xqds/t102xqds.c	/^static int board_mux_lane_to_slot(void)$/;"	f	typeref:typename:int	file:
board_mux_setup	board/freescale/t102xqds/t102xqds.c	/^static void board_mux_setup(void)$/;"	f	typeref:typename:void	file:
board_mxsfb_system_setup	board/sandisk/sansa_fuze_plus/sfp.c	/^void board_mxsfb_system_setup(void)$/;"	f	typeref:typename:void
board_name	board/corscience/tricorder/tricorder-eeprom.c	/^		char board_name[TRICORDER_BOARD_NAME_LENGTH];$/;"	m	struct:handle_eeprom_v0::tricorder_eeprom_v0	typeref:typename:char[]	file:
board_name	board/corscience/tricorder/tricorder-eeprom.h	/^	char board_name[TRICORDER_BOARD_NAME_LENGTH];$/;"	m	struct:tricorder_eeprom	typeref:typename:char[]
board_nand_cs_init	board/siemens/draco/board.c	/^static void board_nand_cs_init(void)$/;"	f	typeref:typename:void	file:
board_nand_hw_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^static void board_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
board_nand_init	board/esd/common/esd405ep_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	board/freescale/m5329evb/nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	board/freescale/m5373evb/nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	board/socrates/nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	board/spear/spear300/spear300.c	/^void board_nand_init()$/;"	f	typeref:typename:void
board_nand_init	board/spear/spear310/spear310.c	/^void board_nand_init()$/;"	f	typeref:typename:void
board_nand_init	board/spear/spear320/spear320.c	/^void board_nand_init()$/;"	f	typeref:typename:void
board_nand_init	board/spear/spear600/spear600.c	/^void board_nand_init()$/;"	f	typeref:typename:void
board_nand_init	board/spear/x600/x600.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	board/sunxi/board.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	board/synopsys/axs10x/nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	board/xes/common/actl_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/arasan_nfc.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/atmel_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/atmel_nand.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/bfin_nand.c	/^int board_nand_init(struct nand_chip *chip)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/davinci_nand.c	/^int board_nand_init(struct nand_chip *chip)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/denali.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/fsl_elbc_nand.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/fsl_ifc_nand.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/kb9202_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/kirkwood_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/kmeter1_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/lpc32xx_nand_slc.c	/^int board_nand_init(struct nand_chip *lpc32xx_chip)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/mpc5121_nfc.c	/^int board_nand_init(struct nand_chip *chip)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/mxc_nand.c	/^int board_nand_init(struct nand_chip *this)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/mxs_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/nand_plat.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/ndfc.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/omap_gpmc.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/pxa3xx_nand.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/s3c2410_nand.c	/^int board_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
board_nand_init	drivers/mtd/nand/tegra_nand.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_init	drivers/mtd/nand/vf610_nfc.c	/^void board_nand_init(void)$/;"	f	typeref:typename:void
board_nand_select_device	drivers/mtd/nand/mpc5121_nfc.c	/^void board_nand_select_device(struct nand_chip *nand, int chip)$/;"	f	typeref:typename:void
board_nand_select_device	drivers/mtd/nand/ndfc.c	/^void board_nand_select_device(struct nand_chip *nand, int chip)$/;"	f	typeref:typename:void
board_need_mem_reset	board/freescale/t1040qds/t1040qds.c	/^int board_need_mem_reset(void)$/;"	f	typeref:typename:int
board_need_mem_reset	include/fsl_ddr.h	/^	int (*board_need_mem_reset)(void);$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:int (*)(void)
board_netphy_reset	drivers/net/pic32_eth.c	/^void __weak board_netphy_reset(void *dev)$/;"	f	typeref:typename:void __weak
board_number	arch/avr32/include/asm/setup.h	/^	u32	board_number;$/;"	m	struct:tag_boardinfo	typeref:typename:u32
board_pci_fixup_dev	board/gateworks/gw_ventana/gw_ventana.c	/^void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:void
board_pci_fixup_irq	board/amcc/sequoia/sequoia.c	/^void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:void
board_pci_fixup_irq	board/esd/pmc440/pmc440.c	/^void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:void
board_pci_host_broken	board/freescale/mpc837xemds/mpc837xemds.c	/^int board_pci_host_broken(void)$/;"	f	typeref:typename:int
board_pcie_card_present	board/amcc/katmai/katmai.c	/^int board_pcie_card_present(int port)$/;"	f	typeref:typename:int
board_pcie_card_present	board/amcc/yucca/yucca.c	/^int board_pcie_card_present(int port)$/;"	f	typeref:typename:int
board_pcie_first	board/amcc/canyonlands/canyonlands.c	/^int board_pcie_first(void)$/;"	f	typeref:typename:int
board_pcie_last	board/amcc/kilauea/kilauea.c	/^int board_pcie_last(void)$/;"	f	typeref:typename:int
board_pcie_last	board/mosaixtech/icon/icon.c	/^int board_pcie_last(void)$/;"	f	typeref:typename:int
board_pcie_last	board/t3corp/t3corp.c	/^int board_pcie_last(void)$/;"	f	typeref:typename:int
board_pcie_setup_port	board/amcc/yucca/yucca.c	/^void board_pcie_setup_port(int port, int rootpoint)$/;"	f	typeref:typename:void
board_phy_config	board/Arcturus/ucp1020/ucp1020.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/advantech/dms-ba16/dms-ba16.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/aristainetos/aristainetos-v2.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/atmel/sama5d3xek/sama5d3xek.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/barco/platinum/platinum.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/barco/titanium/titanium.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/ccv/xpress/xpress.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/compulab/cm_fx6/cm_fx6.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/compulab/cm_t43/cm_t43.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/el/el6x/el6x.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/embest/mx6boards/mx6boards.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/corenet_ds/eth_p4080.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/mpc8544ds/mpc8544ds.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/s32v234evb/s32v234evb.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/freescale/vf610twr/vf610twr.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/gateworks/gw_ventana/gw_ventana.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/ge/bx50v3/bx50v3.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/keymile/kmp204x/eth.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/maxbcm/maxbcm.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/phytec/pcm052/pcm052.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/renesas/koelsch/koelsch.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/renesas/lager/lager.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/renesas/porter/porter.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/renesas/stout/stout.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/seco/mx6quq7/mx6quq7.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/spear/x600/x600.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/toradex/colibri_imx7/colibri_imx7.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/toradex/colibri_vf/colibri_vf.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/tqc/tqma6/tqma6_mba6.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/udoo/udoo.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	board/wandboard/wandboard.c	/^int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
board_phy_config	drivers/net/phy/phy.c	/^__weak int board_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:__weak int
board_phy_init	board/compulab/cm_t335/cm_t335.c	/^static void board_phy_init(void)$/;"	f	typeref:typename:void	file:
board_phy_init	board/compulab/cm_t43/cm_t43.c	/^static void board_phy_init(void)$/;"	f	typeref:typename:void	file:
board_pll_init_f	board/amcc/acadia/pll.c	/^void board_pll_init_f(void)$/;"	f	typeref:typename:void
board_postclk_init	arch/arm/cpu/armv7/mx6/soc.c	/^int board_postclk_init(void)$/;"	f	typeref:typename:int
board_postclk_init	board/cadence/xtfpga/xtfpga.c	/^int board_postclk_init(void)$/;"	f	typeref:typename:int
board_postclk_init	board/liebherr/lwmon5/kbd.c	/^int board_postclk_init (void)$/;"	f	typeref:typename:int
board_power_init	board/samsung/trats/trats.c	/^static void board_power_init(void)$/;"	f	typeref:typename:void	file:
board_prepare_usb	board/qualcomm/dragonboard410c/dragonboard410c.c	/^int board_prepare_usb(enum usb_init_type type)$/;"	f	typeref:typename:int
board_prepare_usb	drivers/usb/host/ehci-msm.c	/^int __weak board_prepare_usb(enum usb_init_type type)$/;"	f	typeref:typename:int __weak
board_qspi_enable	board/st/stv0991/stv0991.c	/^int board_qspi_enable(void)$/;"	f	typeref:typename:int
board_qspi_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_qspi_init(void)$/;"	f	typeref:typename:int
board_qspi_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_qspi_init(void)$/;"	f	typeref:typename:int
board_qspi_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static int board_qspi_init(void)$/;"	f	typeref:typename:int	file:
board_qspi_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_qspi_init(void)$/;"	f	typeref:typename:int
board_reserve_ram_top	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^phys_size_t board_reserve_ram_top(phys_size_t ram_size)$/;"	f	typeref:typename:phys_size_t
board_reserve_ram_top	common/board_f.c	/^__weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)$/;"	f	typeref:typename:__weak phys_size_t
board_reset	arch/arm/mach-at91/arm920t/reset.c	/^void  __attribute__((weak)) board_reset(void)$/;"	f	typeref:typename:void
board_reset	board/amcc/yosemite/yosemite.c	/^void board_reset(void)$/;"	f	typeref:typename:void
board_reset	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^void board_reset(void)$/;"	f	typeref:typename:void
board_reset	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^void board_reset(void)$/;"	f	typeref:typename:void
board_reset	board/freescale/p1010rdb/p1010rdb.c	/^void board_reset(void)$/;"	f	typeref:typename:void
board_reset	board/liebherr/lwmon5/lwmon5.c	/^void board_reset(void)$/;"	f	typeref:typename:void
board_reset	board/sbc8641d/sbc8641d.c	/^void board_reset(void)$/;"	f	typeref:typename:void
board_retimer_ds125df111_init	board/freescale/t102xqds/t102xqds.c	/^void board_retimer_ds125df111_init(void)$/;"	f	typeref:typename:void
board_retimer_init	board/freescale/ls1043aqds/ls1043aqds.c	/^void board_retimer_init(void)$/;"	f	typeref:typename:void
board_rev	board/compulab/common/eeprom.c	/^static u32 board_rev;$/;"	v	typeref:typename:u32	file:
board_rev	board/lego/ev3/legoev3.c	/^u8 board_rev;$/;"	v	typeref:typename:u8
board_rev	board/samsung/trats/trats.c	/^unsigned int board_rev;$/;"	v	typeref:typename:unsigned int
board_rev	board/samsung/trats2/trats2.c	/^static unsigned int board_rev = -1;$/;"	v	typeref:typename:unsigned int	file:
board_rev	board/samsung/universal_c210/universal.c	/^unsigned int board_rev;$/;"	v	typeref:typename:unsigned int
board_rev	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^enum board_rev {$/;"	g
board_rev	include/samsung/exynos5-dt-types.h	/^	int board_rev;$/;"	m	struct:odroid_rev_info	typeref:typename:int
board_rev_gpios	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		board_rev_gpios;	\/* Board revision GPIOs *\/$/;"	m	struct:spl_machine_param	typeref:typename:u32
board_revision	board/esd/pmc405de/pmc405de.c	/^static int board_revision(void)$/;"	f	typeref:typename:int	file:
board_revision	board/esd/pmc440/pmc440.c	/^static int board_revision(void)$/;"	f	typeref:typename:int	file:
board_run_command	arch/sandbox/cpu/start.c	/^int board_run_command(const char *cmdline)$/;"	f	typeref:typename:int
board_run_command	board/inversepath/usbarmory/usbarmory.c	/^int board_run_command(const char *cmdline)$/;"	f	typeref:typename:int
board_sat_r_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^__weak u8 board_sat_r_get(u8 dev_num, u8 reg)$/;"	f	typeref:typename:__weak u8
board_sat_r_get	board/Synology/ds414/ds414.c	/^u8 board_sat_r_get(u8 dev_num, u8 reg)$/;"	f	typeref:typename:u8
board_sat_r_get	board/theadorable/theadorable.c	/^u8 board_sat_r_get(u8 dev_num, u8 reg)$/;"	f	typeref:typename:u8
board_scan_options	board/t3corp/t3corp.c	/^static struct sdram_timing board_scan_options[] = {$/;"	v	typeref:struct:sdram_timing[]	file:
board_sdmmc_voltage_init	board/avionic-design/common/tamonten-ng.c	/^void board_sdmmc_voltage_init(void)$/;"	f	typeref:typename:void
board_sdmmc_voltage_init	board/nvidia/cardhu/cardhu.c	/^void board_sdmmc_voltage_init(void)$/;"	f	typeref:typename:void
board_sdmmc_voltage_init	board/nvidia/dalmore/dalmore.c	/^void board_sdmmc_voltage_init(void)$/;"	f	typeref:typename:void
board_sdrc_timings	arch/arm/include/asm/arch-omap3/sys_proto.h	/^struct board_sdrc_timings {$/;"	s
board_serdes_cfg_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^__weak MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode)$/;"	f	typeref:typename:__weak MV_BIN_SERDES_CFG *
board_serdes_cfg_get	board/Synology/ds414/ds414.c	/^MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode)$/;"	f	typeref:typename:MV_BIN_SERDES_CFG *
board_serdes_cfg_get	board/maxbcm/maxbcm.c	/^MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode)$/;"	f	typeref:typename:MV_BIN_SERDES_CFG *
board_serdes_cfg_get	board/theadorable/theadorable.c	/^MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode)$/;"	f	typeref:typename:MV_BIN_SERDES_CFG *
board_serdes_conf	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^typedef struct board_serdes_conf {$/;"	s
board_serdes_map	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^static struct serdes_map board_serdes_map[] = {$/;"	v	typeref:struct:serdes_map[]	file:
board_serdes_map	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^static struct serdes_map board_serdes_map[] = {$/;"	v	typeref:struct:serdes_map[]	file:
board_serdes_map	board/solidrun/clearfog/clearfog.c	/^static struct serdes_map board_serdes_map[] = {$/;"	v	typeref:struct:serdes_map[]	file:
board_serdes_name	board/freescale/p1022ds/p1022ds.c	/^const char *board_serdes_name(enum srds_prtcl device)$/;"	f	typeref:typename:const char *
board_serdes_name	board/gdsys/p1022/controlcenterd.c	/^const char *board_serdes_name(enum srds_prtcl device)$/;"	f	typeref:typename:const char *
board_serial	board/corscience/tricorder/tricorder-eeprom.c	/^		char board_serial[TRICORDER_BOARD_SERIAL_LENGTH];$/;"	m	struct:handle_eeprom_v0::tricorder_eeprom_v0	typeref:typename:char[]	file:
board_serial	board/corscience/tricorder/tricorder-eeprom.h	/^	char board_serial[TRICORDER_BOARD_SERIAL_LENGTH];$/;"	m	struct:tricorder_eeprom	typeref:typename:char[]
board_set_power	drivers/usb/musb-new/musb_core.h	/^	int			(*board_set_power)(int state);$/;"	m	struct:musb	typeref:typename:int (*)(int state)
board_setup_sdram	board/CarMediaLab/flea3/flea3.c	/^static void board_setup_sdram(void)$/;"	f	typeref:typename:void	file:
board_setup_sdram	board/woodburn/woodburn.c	/^static void board_setup_sdram(void)$/;"	f	typeref:typename:void	file:
board_setup_sdram_bank	board/CarMediaLab/flea3/flea3.c	/^static void board_setup_sdram_bank(u32 start_address)$/;"	f	typeref:typename:void	file:
board_should_load_oprom	drivers/pci/pci_rom.c	/^__weak bool board_should_load_oprom(struct udevice *dev)$/;"	f	typeref:typename:__weak bool
board_should_run_oprom	drivers/pci/pci_rom.c	/^__weak bool board_should_run_oprom(struct udevice *dev)$/;"	f	typeref:typename:__weak bool
board_show_activity	board/a4m072/a4m072.c	/^void board_show_activity(ulong timestamp)$/;"	f	typeref:typename:void
board_show_dram	cmd/mem.c	/^__weak void board_show_dram(phys_size_t size)$/;"	f	typeref:typename:__weak void
board_sleep_prepare	board/freescale/common/arm_sleep.c	/^void __weak board_sleep_prepare(void)$/;"	f	typeref:typename:void __weak
board_sleep_prepare	board/freescale/common/mpc85xx_sleep.c	/^void __weak board_sleep_prepare(void)$/;"	f	typeref:typename:void __weak
board_sleep_prepare	board/freescale/ls1021aqds/ls1021aqds.c	/^void board_sleep_prepare(void)$/;"	f	typeref:typename:void
board_sleep_prepare	board/freescale/ls1021atwr/ls1021atwr.c	/^void board_sleep_prepare(void)$/;"	f	typeref:typename:void
board_specific_parameters	board/freescale/b4860qds/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/corenet_ds/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/ls1021aqds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls1043aqds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls1043ardb/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls1046aqds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls1046ardb/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls2080a/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls2080aqds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/ls2080ardb/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/mpc8349emds/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/mpc8572ds/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/mpc8641hpcn/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/p1022ds/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/p2041rdb/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/t102xqds/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/t102xrdb/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/freescale/t1040qds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/t104xrdb/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/t208xqds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/t208xrdb/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/t4qds/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/freescale/t4rdb/ddr.h	/^struct board_specific_parameters {$/;"	s
board_specific_parameters	board/varisys/cyrus/ddr.c	/^struct board_specific_parameters {$/;"	s	file:
board_specific_parameters	board/xes/xpedite550x/ddr.c	/^const board_specific_parameters_t board_specific_parameters[][20] = {$/;"	v	typeref:typename:const board_specific_parameters_t[][20]
board_specific_parameters_t	board/xes/xpedite550x/ddr.c	/^} board_specific_parameters_t;$/;"	t	typeref:struct:__anon6cdf34da0108	file:
board_spi0_hw_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^static void board_spi0_hw_init(void)$/;"	f	typeref:typename:void	file:
board_spi_claim_bus	board/keymile/km_arm/km_arm.c	/^int board_spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
board_spi_claim_bus	drivers/spi/kirkwood_spi.c	/^__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/advantech/dms-ba16/dms-ba16.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/aristainetos/aristainetos-v1.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/aristainetos/aristainetos-v2.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/bachmann/ot1200/ot1200.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/boundary/nitrogen6x/nitrogen6x.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/compulab/cm_fx6/common.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/el/el6x/el6x.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/embest/mx6boards/mx6boards.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/freescale/mx6sabresd/mx6sabresd.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/freescale/mx6slevk/mx6slevk.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/gateworks/gw_ventana/gw_ventana.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/ge/bx50v3/bx50v3.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/phytec/pcm058/pcm058.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	board/tqc/tqma6/tqma6.c	/^int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:int
board_spi_cs_gpio	drivers/spi/mxc_spi.c	/^__weak int board_spi_cs_gpio(unsigned bus, unsigned cs)$/;"	f	typeref:typename:__weak int
board_spi_release_bus	board/keymile/km_arm/km_arm.c	/^void board_spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
board_spi_release_bus	drivers/spi/kirkwood_spi.c	/^__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
board_status	board/amcc/canyonlands/canyonlands.c	/^	u8	board_status;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
board_string	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	char *board_string;$/;"	m	struct:__anon6aa74aa60108	typeref:typename:char *
board_string	arch/arm/include/asm/arch-omap4/sys_proto.h	/^	char *board_string;$/;"	m	struct:omap_sysinfo	typeref:typename:char *
board_string	arch/arm/include/asm/arch-omap5/sys_proto.h	/^	char *board_string;$/;"	m	struct:omap_sysinfo	typeref:typename:char *
board_string	arch/arm/mach-rmobile/include/mach/sys_proto.h	/^	char *board_string;$/;"	m	struct:rmobile_sysinfo	typeref:typename:char *
board_thermal	arch/arm/dts/am57xx-beagle-x15.dts	/^	board_thermal: board_thermal {$/;"	l
board_ti_get_config	board/ti/common/board_detect.c	/^char * __maybe_unused board_ti_get_config(void)$/;"	f	typeref:typename:char * __maybe_unused
board_ti_get_emif1_size	board/ti/common/board_detect.c	/^u64 __maybe_unused board_ti_get_emif1_size(void)$/;"	f	typeref:typename:u64 __maybe_unused
board_ti_get_emif2_size	board/ti/common/board_detect.c	/^u64 __maybe_unused board_ti_get_emif2_size(void)$/;"	f	typeref:typename:u64 __maybe_unused
board_ti_get_emif_size	board/ti/dra7xx/evm.c	/^#define board_ti_get_emif_size(/;"	d	file:
board_ti_get_eth_mac_addr	board/ti/common/board_detect.c	/^board_ti_get_eth_mac_addr(int index,$/;"	f	typeref:typename:void __maybe_unused
board_ti_get_name	board/ti/common/board_detect.c	/^char * __maybe_unused board_ti_get_name(void)$/;"	f	typeref:typename:char * __maybe_unused
board_ti_get_rev	board/ti/common/board_detect.c	/^char * __maybe_unused board_ti_get_rev(void)$/;"	f	typeref:typename:char * __maybe_unused
board_ti_is	board/ti/common/board_detect.c	/^bool __maybe_unused board_ti_is(char *name_tag)$/;"	f	typeref:typename:bool __maybe_unused
board_ti_rev_is	board/ti/common/board_detect.c	/^bool __maybe_unused board_ti_rev_is(char *rev_tag, int cmp_len)$/;"	f	typeref:typename:bool __maybe_unused
board_topology_map	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^static struct hws_topology_map board_topology_map = {$/;"	v	typeref:struct:hws_topology_map	file:
board_topology_map	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^static struct hws_topology_map board_topology_map = {$/;"	v	typeref:struct:hws_topology_map	file:
board_topology_map	board/solidrun/clearfog/clearfog.c	/^static struct hws_topology_map board_topology_map = {$/;"	v	typeref:struct:hws_topology_map	file:
board_trace_arr	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^	struct trip_delay_element *board_trace_arr;$/;"	m	struct:hws_tip_static_config_info	typeref:struct:trip_delay_element *
board_trips	arch/arm/dts/am57xx-beagle-x15.dts	/^		board_trips: trips {$/;"	l	label:board_thermal
board_turn_off_led	board/phytec/pcm058/pcm058.c	/^void board_turn_off_led(void)$/;"	f	typeref:typename:void
board_type	arch/blackfin/include/asm/global_data.h	/^	unsigned long board_type;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
board_type	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	enum board_type board_type;$/;"	m	struct:pei_data	typeref:enum:board_type
board_type	arch/x86/include/asm/arch-broadwell/pei_data.h	/^enum board_type {$/;"	g
board_type	board/birdland/bav335x/board.h	/^enum board_type {UNKNOWN, BAV335A, BAV335B};$/;"	g
board_type	board/embest/mx6boards/mx6boards.c	/^static int board_type = -1;$/;"	v	typeref:typename:int	file:
board_type	board/gateworks/gw_ventana/gw_ventana.c	/^static int board_type;$/;"	v	typeref:typename:int	file:
board_type	include/asm-generic/global_data.h	/^	unsigned long board_type;$/;"	m	struct:global_data	typeref:typename:unsigned long
board_type	include/samsung/exynos5-dt-types.h	/^	int board_type;$/;"	m	struct:odroid_rev_info	typeref:typename:int
board_type	include/smbios.h	/^	u8 board_type;$/;"	m	struct:smbios_type2	typeref:typename:u8
board_uart0_hw_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^static void board_uart0_hw_init(void)$/;"	f	typeref:typename:void	file:
board_uart1_hw_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^static void board_uart1_hw_init(void)$/;"	f	typeref:typename:void	file:
board_uart_init	board/hisilicon/hikey/hikey.c	/^int board_uart_init(void)$/;"	f	typeref:typename:int
board_uart_init	board/samsung/arndale/arndale.c	/^static int board_uart_init(void)$/;"	f	typeref:typename:int	file:
board_uart_init	board/samsung/common/board.c	/^static int board_uart_init(void)$/;"	f	typeref:typename:int	file:
board_uart_init	board/samsung/smdkv310/smdkv310.c	/^static int board_uart_init(void)$/;"	f	typeref:typename:int	file:
board_uart_init	board/st/stv0991/stv0991.c	/^int board_uart_init(void)$/;"	f	typeref:typename:int
board_udc_data	board/siemens/smartweb/smartweb.c	/^struct at91_udc_data board_udc_data  = {$/;"	v	typeref:struct:at91_udc_data
board_udc_data	board/siemens/taurus/taurus.c	/^struct at91_udc_data board_udc_data  = {$/;"	v	typeref:struct:at91_udc_data
board_usb_cleanup	arch/arm/mach-rockchip/rk3036-board.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	arch/arm/mach-rockchip/rk3288-board.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/amcc/canyonlands/canyonlands.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/esd/pmc440/pmc440.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/h2200/h2200.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/samsung/common/board.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/samsung/goni/goni.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/ti/am43xx/board.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/ti/am57xx/board.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/ti/dra7xx/evm.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/ti/omap5_uevm/evm.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/toradex/colibri_pxa270/colibri_pxa270.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/xilinx/zynqmp/zynqmp.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	board/zipitz2/zipitz2.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_cleanup	common/usb.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:__weak int
board_usb_cleanup	drivers/usb/gadget/g_dnl.c	/^int board_usb_cleanup(int index, enum usb_init_type init)$/;"	f	typeref:typename:__weak int
board_usb_hw_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^static void board_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
board_usb_hw_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^static void board_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
board_usb_init	arch/arm/mach-rockchip/rk3036-board.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	arch/arm/mach-rockchip/rk3288-board.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	arch/arm/mach-socfpga/board.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/amcc/canyonlands/canyonlands.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/esd/pmc440/pmc440.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/h2200/h2200.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/hisilicon/hikey/hikey.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/arndale/arndale.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/common/exynos5-dt.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/goni/goni.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/odroid/odroid.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/origen/origen.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/trats/trats.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/trats2/trats2.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/samsung/universal_c210/universal.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/ti/am43xx/board.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/ti/am57xx/board.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/ti/dra7xx/evm.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/ti/omap5_uevm/evm.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/toradex/colibri_pxa270/colibri_pxa270.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/xilinx/zynqmp/zynqmp.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	board/zipitz2/zipitz2.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:int
board_usb_init	common/usb.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:__weak int
board_usb_init	drivers/usb/gadget/g_dnl.c	/^int board_usb_init(int index, enum usb_init_type init)$/;"	f	typeref:typename:__weak int
board_usb_phy_mode	board/ccv/xpress/xpress.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/compulab/cm_fx6/cm_fx6.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/freescale/mx6slevk/mx6slevk.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/toradex/colibri_vf/colibri_vf.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/warp/warp.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	board/warp7/warp7.c	/^int board_usb_phy_mode(int port)$/;"	f	typeref:typename:int
board_usb_phy_mode	drivers/usb/host/ehci-mx6.c	/^int __weak board_usb_phy_mode(int port)$/;"	f	typeref:typename:int __weak
board_usb_phy_mode	drivers/usb/host/ehci-vf.c	/^int __weak board_usb_phy_mode(int port)$/;"	f	typeref:typename:int __weak
board_validate_screen	board/tqc/tqm5200/tqm5200.c	/^void board_validate_screen (unsigned int base)$/;"	f	typeref:typename:void
board_vdd_drop_compensation	board/freescale/common/vid.c	/^int __weak board_vdd_drop_compensation(void)$/;"	f	typeref:typename:int __weak
board_version	board/corscience/tricorder/tricorder-eeprom.c	/^		char board_version[TRICORDER_BOARD_VERSION_LENGTH];$/;"	m	struct:handle_eeprom_v0::tricorder_eeprom_v0	typeref:typename:char[]	file:
board_version	board/corscience/tricorder/tricorder-eeprom.h	/^	char board_version[TRICORDER_BOARD_VERSION_LENGTH];$/;"	m	struct:tricorder_eeprom	typeref:typename:char[]
board_version	include/ec_commands.h	/^	uint16_t board_version;  \/* A monotonously incrementing number. *\/$/;"	m	struct:ec_response_board_version	typeref:typename:uint16_t
board_video_get_fb	board/tqc/tqm5200/tqm5200.c	/^unsigned int board_video_get_fb (void)$/;"	f	typeref:typename:unsigned int
board_video_init	board/htkw/mcx/mcx.c	/^int board_video_init(void)$/;"	f	typeref:typename:int
board_video_init	board/ipek01/ipek01.c	/^unsigned int board_video_init (void)$/;"	f	typeref:typename:unsigned int
board_video_init	board/liebherr/lwmon5/lwmon5.c	/^unsigned int board_video_init(void)$/;"	f	typeref:typename:unsigned int
board_video_init	board/siemens/pxm2/board.c	/^static int board_video_init(void)$/;"	f	typeref:typename:int	file:
board_video_init	board/siemens/rut/board.c	/^static int board_video_init(void)$/;"	f	typeref:typename:int	file:
board_video_init	board/socrates/socrates.c	/^unsigned int board_video_init (void)$/;"	f	typeref:typename:unsigned int
board_video_init	board/teejet/mt_ventoux/mt_ventoux.c	/^int board_video_init(void)$/;"	f	typeref:typename:int
board_video_init	board/theadorable/theadorable.c	/^int board_video_init(void)$/;"	f	typeref:typename:int
board_video_init	board/tqc/tqm5200/tqm5200.c	/^unsigned int board_video_init (void)$/;"	f	typeref:typename:unsigned int
board_video_init	drivers/video/mvebu_lcd.c	/^int __weak board_video_init(void)$/;"	f	typeref:typename:int __weak
board_video_skip	arch/arm/imx-common/video.c	/^int board_video_skip(void)$/;"	f	typeref:typename:int
board_video_skip	board/compulab/cm_fx6/cm_fx6.c	/^int board_video_skip(void)$/;"	f	typeref:typename:int
board_video_skip	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int board_video_skip(void)$/;"	f	typeref:typename:int
board_video_skip	board/denx/m53evk/m53evk.c	/^int board_video_skip(void)$/;"	f	typeref:typename:int
board_video_skip	board/freescale/mx51evk/mx51evk_video.c	/^int board_video_skip(void)$/;"	f	typeref:typename:int
board_video_skip	board/freescale/mx53loco/mx53loco_video.c	/^int board_video_skip(void)$/;"	f	typeref:typename:int
board_video_skip	drivers/video/cfb_console.c	/^__weak int board_video_skip(void)$/;"	f	typeref:typename:__weak int
board_wakeup_gpio	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^struct board_wakeup_gpio {$/;"	s
board_xhci_config	board/Marvell/mvebu_db-88f7040/board.c	/^int board_xhci_config(void)$/;"	f	typeref:typename:int
board_xhci_enable	board/Marvell/mvebu_db-88f3720/board.c	/^int board_xhci_enable(void)$/;"	f	typeref:typename:int
board_xhci_enable	board/Marvell/mvebu_db-88f7040/board.c	/^int board_xhci_enable(void)$/;"	f	typeref:typename:int
board_xhci_enable	drivers/usb/host/xhci-mvebu.c	/^__weak int board_xhci_enable(void)$/;"	f	typeref:typename:__weak int
boardinfo	arch/avr32/include/asm/setup.h	/^		struct tag_boardinfo boardinfo;$/;"	m	union:tag::__anon5c2aea39010a	typeref:struct:tag_boardinfo
boards	board/logicpd/omap3som/omap3logic.c	/^} boards[2][2] = {$/;"	v	typeref:struct:board_id[2][2]
boards	tools/buildman/func_test.py	/^boards = [$/;"	v
boards	tools/buildman/test.py	/^boards = [$/;"	v
boardtype	board/mpl/mip405/mip405.c	/^	unsigned char boardtype; \/* Board revision and Population Options *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
boardtype	board/mpl/pati/pati.c	/^	unsigned short boardtype; \/* Board revision and Population Options *\/$/;"	m	struct:__anon377858d00108	typeref:typename:unsigned short	file:
boco_clear_bits	board/keymile/km_arm/fpga_config.c	/^static int boco_clear_bits(u8 reg, u8 flags)$/;"	f	typeref:typename:int	file:
boco_set_bits	board/keymile/km_arm/fpga_config.c	/^static int boco_set_bits(u8 reg, u8 flags)$/;"	f	typeref:typename:int	file:
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_allocate_buffer	typeref:union:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_alpha_mode	typeref:union:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_blank_screen	typeref:union:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_depth	typeref:union:bcm2835_mbox_tag_depth::__anon775fc544230a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_arm_mem	typeref:union:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_board_rev	typeref:union:bcm2835_mbox_tag_get_board_rev::__anon775fc544010a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_board_serial	typeref:union:bcm2835_mbox_tag_get_board_serial::__anon775fc544070a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_clock_rate	typeref:union:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_mac_address	typeref:union:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_palette	typeref:union:bcm2835_mbox_tag_get_palette::__anon775fc544350a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_get_power_state	typeref:union:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_overscan	typeref:union:bcm2835_mbox_tag_overscan::__anon775fc544320a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_physical_w_h	typeref:union:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_pitch	typeref:union:bcm2835_mbox_tag_pitch::__anon775fc5442c0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_pixel_order	typeref:union:bcm2835_mbox_tag_pixel_order::__anon775fc544260a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_release_buffer	typeref:union:bcm2835_mbox_tag_release_buffer::__anon775fc544170a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_set_palette	typeref:union:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_set_power_state	typeref:union:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_test_palette	typeref:union:bcm2835_mbox_tag_test_palette::__anon775fc544380a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_virtual_offset	typeref:union:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a
body	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	} body;$/;"	m	struct:bcm2835_mbox_tag_virtual_w_h	typeref:union:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a
body	doc/DocBook/docbook.css	/^body {$/;"	s
body	test/py/multiplexed_log.css	/^body {$/;"	s
bone_norcape_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux bone_norcape_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
bool_invert	scripts/get_maintainer.pl	/^sub bool_invert {$/;"	s
boot	include/efi.h	/^	struct efi_boot_services *boot;$/;"	m	struct:efi_priv	typeref:struct:efi_boot_services *
boot	tools/mxsimage.c	/^	unsigned int			boot:1;$/;"	m	struct:sb_section_ctx	typeref:typename:unsigned int:1	file:
boot_267_nand	board/amcc/acadia/cmd_acadia.c	/^static u8 boot_267_nand[] = {$/;"	v	typeref:typename:u8[]	file:
boot_267_nor	board/amcc/acadia/cmd_acadia.c	/^static u8 boot_267_nor[] = {$/;"	v	typeref:typename:u8[]	file:
boot_addr_sel	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 boot_addr_sel;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
boot_bd_t_linux	arch/powerpc/lib/bootm.c	/^static int boot_bd_t_linux(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_block_size	include/cbfs.h	/^	u32 boot_block_size;$/;"	m	struct:cbfs_header	typeref:typename:u32
boot_blocks	disk/part_amiga.h	/^    u32 boot_blocks;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
boot_body_linux	arch/powerpc/lib/bootm.c	/^static int boot_body_linux(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_buf_size	include/linux/mtd/samsung_onenand.h	/^	unsigned int	boot_buf_size;	\/* 0x00A0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
boot_cfg1	board/freescale/t208xrdb/cpld.h	/^	u8 boot_cfg1;		\/* 0x17 - Boot configuration register 1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_cfg2	board/freescale/t208xrdb/cpld.h	/^	u8 boot_cfg2;		\/* 0x18 - Boot configuration register 2 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_cksum	disk/part_mac.h	/^	__u32	boot_cksum;	\/* boot code checksum			*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_cmdline_linux	arch/powerpc/lib/bootm.c	/^static int boot_cmdline_linux(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_code	include/part_efi.h	/^	u8 boot_code[440];$/;"	m	struct:_legacy_mbr	typeref:typename:u8[440]
boot_cold	arch/powerpc/cpu/mpc512x/start.S	/^boot_cold:$/;"	l
boot_cold	arch/powerpc/cpu/mpc86xx/start.S	/^boot_cold:$/;"	l
boot_config1	board/freescale/t102xrdb/cpld.h	/^	u8 boot_config1;	\/* 0x19 - Boot config override register*\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_config1	board/freescale/t104xrdb/cpld.h	/^	u8 boot_config1;	\/* 0x19 - Boot config override register*\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_config2	board/freescale/t102xrdb/cpld.h	/^	u8 boot_config2;	\/* 0x1A - Boot config override register*\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_config2	board/freescale/t104xrdb/cpld.h	/^	u8 boot_config2;	\/* 0x1A - Boot config override register*\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_cpuid_phys	include/fdt.h	/^	fdt32_t boot_cpuid_phys;	 \/* Which physical CPU id we're$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
boot_data	tools/imximage.h	/^	boot_data_t boot_data;$/;"	m	struct:__anon504a956c0d08	typeref:typename:boot_data_t
boot_data	tools/mxsimage.h	/^	uint32_t	boot_data;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
boot_data2	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^boot_data2:             .long 0x0$/;"	l
boot_data2	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^boot_data2:             .long 0x0$/;"	l
boot_data2_ptr	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^boot_data2_ptr:         .long 0x0$/;"	l
boot_data2_ptr	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^boot_data2_ptr:         .long 0x0$/;"	l
boot_data_ptr	tools/imximage.h	/^	uint32_t boot_data_ptr;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
boot_data_t	tools/imximage.h	/^} boot_data_t;$/;"	t	typeref:struct:__anon504a956c0b08
boot_dev	arch/sparc/include/asm/prom.h	/^	char boot_dev[2];$/;"	m	struct:linux_arguments_v0	typeref:typename:char[2]
boot_dev	common/spl/spl.c	/^	u32 boot_dev;$/;"	m	struct:boot_device_name	typeref:typename:u32	file:
boot_dev_ctrl	arch/sparc/include/asm/prom.h	/^	int boot_dev_ctrl;$/;"	m	struct:linux_arguments_v0	typeref:typename:int
boot_dev_instance	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u8 boot_dev_instance;$/;"	m	struct:bootrom_sw_info	typeref:typename:u8
boot_dev_type	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u8 boot_dev_type;$/;"	m	struct:bootrom_sw_info	typeref:typename:u8
boot_dev_unit	arch/sparc/include/asm/prom.h	/^	int boot_dev_unit;$/;"	m	struct:linux_arguments_v0	typeref:typename:int
boot_device	arch/arm/include/asm/arch-am33xx/omap.h	/^	unsigned char boot_device;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
boot_device	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char boot_device;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
boot_device	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned char boot_device;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
boot_device	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned char boot_device;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
boot_device	arch/arm/include/asm/imx-common/boot_mode.h	/^enum boot_device {$/;"	g
boot_device	include/spl.h	/^	uint boot_device;$/;"	m	struct:spl_boot_device	typeref:typename:uint
boot_device	include/spl.h	/^	uint boot_device;$/;"	m	struct:spl_image_loader	typeref:typename:uint
boot_device_descriptor	arch/arm/include/asm/arch-am33xx/omap.h	/^	unsigned int boot_device_descriptor;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_device_descriptor	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int boot_device_descriptor;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_device_descriptor	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned int boot_device_descriptor;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_device_descriptor	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned int boot_device_descriptor;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_device_info	arch/arm/mach-uniphier/boot-mode/boot-device.h	/^struct boot_device_info {$/;"	s
boot_device_name	common/spl/spl.c	/^struct boot_device_name {$/;"	s	file:
boot_device_name	include/spl.h	/^	const char *boot_device_name;$/;"	m	struct:spl_boot_device	typeref:typename:const char *
boot_device_table	arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c	/^static struct boot_device_info boot_device_table[] = {$/;"	v	typeref:struct:boot_device_info[]	file:
boot_device_table	arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c	/^struct boot_device_info boot_device_table[] = {$/;"	v	typeref:struct:boot_device_info[]
boot_device_table	arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c	/^static struct boot_device_info boot_device_table[] = {$/;"	v	typeref:struct:boot_device_info[]	file:
boot_device_table	arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c	/^static struct boot_device_info boot_device_table[] = {$/;"	v	typeref:struct:boot_device_info[]	file:
boot_device_table	arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c	/^static struct boot_device_info boot_device_table[] = {$/;"	v	typeref:struct:boot_device_info[]	file:
boot_devices	arch/arm/cpu/armv7/omap3/boot.c	/^static u32 boot_devices[] = {$/;"	v	typeref:typename:u32[]	file:
boot_devices	arch/arm/cpu/armv7/omap4/boot.c	/^static u32 boot_devices[] = {$/;"	v	typeref:typename:u32[]	file:
boot_devices	arch/arm/cpu/armv7/omap5/boot.c	/^static u32 boot_devices[] = {$/;"	v	typeref:typename:u32[]	file:
boot_entry	disk/part_mac.h	/^	__u32	boot_entry;	\/* boot code entry point		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_entry2	disk/part_mac.h	/^	__u32	boot_entry2;	\/* reserved				*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_entry_map	arch/powerpc/cpu/mpc85xx/mp.c	/^static u8 boot_entry_map[4] = {$/;"	v	typeref:typename:u8[4]	file:
boot_fdt_add_mem_rsv_regions	common/image-fdt.c	/^void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)$/;"	f	typeref:typename:void
boot_file_head	arch/arm/include/asm/arch-sunxi/spl.h	/^struct boot_file_head {$/;"	s
boot_file_head	arch/arm/include/asm/arch/spl.h	/^struct boot_file_head {$/;"	s
boot_flag	arch/x86/include/asm/bootparam.h	/^	__u16	boot_flag;$/;"	m	struct:setup_header	typeref:typename:__u16
boot_get_cmdline	common/image.c	/^int boot_get_cmdline(struct lmb *lmb, ulong *cmd_start, ulong *cmd_end)$/;"	f	typeref:typename:int
boot_get_fdt	common/image-fdt.c	/^int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,$/;"	f	typeref:typename:int
boot_get_fpga	common/image.c	/^int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,$/;"	f	typeref:typename:int
boot_get_kbd	common/image.c	/^int boot_get_kbd(struct lmb *lmb, bd_t **kbd)$/;"	f	typeref:typename:int
boot_get_kernel	common/bootm.c	/^static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:const void *	file:
boot_get_loadable	common/image.c	/^int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,$/;"	f	typeref:typename:int
boot_get_ramdisk	common/image.c	/^int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,$/;"	f	typeref:typename:int
boot_get_setup	common/image.c	/^int boot_get_setup(bootm_headers_t *images, uint8_t arch,$/;"	f	typeref:typename:int
boot_get_setup_fit	common/image-fit.c	/^int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,$/;"	f	typeref:typename:int
boot_img	tools/mksunxiboot.c	/^struct boot_img {$/;"	s	file:
boot_ind	disk/part_dos.h	/^	unsigned char boot_ind;		\/* 0x80 - active			*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
boot_ind	disk/part_iso.h	/^	unsigned char	boot_ind;			\/* Boot indicator 0x88=bootable 0=not bootable *\/$/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char
boot_ind	include/part_efi.h	/^	u8 boot_ind;		\/* 0x80 - active *\/$/;"	m	struct:partition	typeref:typename:u8
boot_is_swapped	arch/arm/mach-uniphier/sbc/sbc-regs.h	/^static inline int boot_is_swapped(void)$/;"	f	typeref:typename:int
boot_jump_linux	arch/arc/lib/bootm.c	/^static void boot_jump_linux(bootm_headers_t *images, int flag)$/;"	f	typeref:typename:void	file:
boot_jump_linux	arch/arm/lib/bootm.c	/^static void boot_jump_linux(bootm_headers_t *images, int flag)$/;"	f	typeref:typename:void	file:
boot_jump_linux	arch/mips/lib/bootm.c	/^static void boot_jump_linux(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_jump_linux	arch/powerpc/lib/bootm.c	/^static void boot_jump_linux(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_jump_linux	arch/x86/lib/bootm.c	/^static int boot_jump_linux(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_jump_vxworks	arch/arm/lib/bootm.c	/^void boot_jump_vxworks(bootm_headers_t *images)$/;"	f	typeref:typename:void
boot_jump_vxworks	arch/powerpc/lib/bootm.c	/^void boot_jump_vxworks(bootm_headers_t *images)$/;"	f	typeref:typename:void
boot_linux	arch/microblaze/cpu/spl.c	/^bool boot_linux;$/;"	v	typeref:typename:bool
boot_linux_kernel	arch/x86/lib/bootm.c	/^int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit)$/;"	f	typeref:typename:int
boot_load	disk/part_mac.h	/^	__u32	boot_load;	\/* boot code load address		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_load2	disk/part_mac.h	/^	__u32	boot_load2;	\/* reserved				*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_map	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 boot_map;		\/* Boot Map Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
boot_mask	arch/arm/include/asm/arch-mxs/sys_proto.h	/^	uint8_t boot_mask;$/;"	m	struct:mxs_pair	typeref:typename:uint8_t
boot_media	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t boot_media;		\/* written here by the boot ROM *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
boot_media	arch/arm/include/asm/arch/spl.h	/^	uint32_t boot_media;		\/* written here by the boot ROM *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
boot_media	disk/part_iso.h	/^	unsigned char	boot_media;		\/* boot Media Type: 0=no Emulation, 1=1.2MB floppy, 2=1.44MB floppy/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char
boot_message	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int boot_message;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_message	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned int boot_message;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_message	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned int boot_message;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
boot_mode	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 boot_mode; \/* 0x200 *\/$/;"	m	struct:crlapb_regs	typeref:typename:u32
boot_mode	arch/arm/include/asm/imx-common/boot_mode.h	/^struct boot_mode {$/;"	s
boot_mode	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 boot_mode; \/* 0x25c *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
boot_mode	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int boot_mode;$/;"	m	struct:pei_data	typeref:typename:int
boot_mode	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u32 boot_mode;$/;"	m	struct:fspinit_rtbuf	typeref:typename:u32
boot_mode	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int boot_mode;$/;"	m	struct:pei_data	typeref:typename:int
boot_mode	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t boot_mode;		\/* BM_COLD, BM_FAST, BM_WARM, BM_S3 *\/$/;"	m	struct:mrc_params	typeref:typename:uint32_t
boot_mode	arch/x86/include/asm/fsp/fsp_api.h	/^	u32			boot_mode;$/;"	m	struct:fsp_cfg_common	typeref:typename:u32
boot_mode	arch/x86/include/asm/fsp/fsp_api.h	/^	u32	boot_mode;	\/* Current system boot mode *\/$/;"	m	struct:common_buf	typeref:typename:u32
boot_mode	tools/kwbimage.c	/^struct boot_mode {$/;"	s	file:
boot_mode_apply	arch/arm/cpu/armv7/mx5/soc.c	/^void boot_mode_apply(unsigned cfg_val)$/;"	f	typeref:typename:void
boot_mode_apply	arch/arm/imx-common/init.c	/^void boot_mode_apply(unsigned cfg_val)$/;"	f	typeref:typename:void
boot_mode_idx	arch/arm/include/asm/arch-mxs/sys_proto.h	/^	uint8_t		boot_mode_idx;$/;"	m	struct:mxs_spl_data	typeref:typename:uint8_t
boot_mode_ptr	board/nokia/rx51/rx51.c	/^static char *boot_mode_ptr;$/;"	v	typeref:typename:char *	file:
boot_modes	tools/kwbimage.c	/^struct boot_mode boot_modes[] = {$/;"	v	typeref:struct:boot_mode[]
boot_name_table	common/spl/spl.c	/^struct boot_device_name boot_name_table[] = {$/;"	v	typeref:struct:boot_device_name[]
boot_on	include/power/regulator.h	/^	bool boot_on;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:bool
boot_options_present	arch/x86/include/asm/me_common.h	/^	u32 boot_options_present:1;$/;"	m	struct:me_hfs	typeref:typename:u32:1
boot_or	board/freescale/t208xrdb/cpld.h	/^	u8 boot_or;		\/* 0x16 - Boot config override register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_os	common/bootm_os.c	/^static boot_os_fn *boot_os[] = {$/;"	v	typeref:typename:boot_os_fn * []	file:
boot_os_fn	include/bootm.h	/^typedef int boot_os_fn(int flag, int argc, char * const argv[],$/;"	t	typeref:typename:int ()(int flag,int argc,char * const argv[],bootm_headers_t * images)
boot_override	board/freescale/t102xrdb/cpld.h	/^	u8 boot_override;	\/* 0x18 - Boot override register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_override	board/freescale/t104xrdb/cpld.h	/^	u8 boot_override;	\/* 0x18 - Boot override register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
boot_pads	arch/arm/include/asm/arch-mxs/sys_proto.h	/^	uint8_t	boot_pads;$/;"	m	struct:mxs_pair	typeref:typename:uint8_t
boot_params	arch/x86/include/asm/bootparam.h	/^struct boot_params {$/;"	s
boot_params_ptr	common/spl/spl.c	/^u32 *boot_params_ptr = NULL;$/;"	v	typeref:typename:u32 *
boot_patch	tools/mxsboot.c	/^	uint32_t		boot_patch;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
boot_path	arch/x86/include/asm/arch-quark/mrc.h	/^	uint16_t boot_path;$/;"	m	struct:mem_init	typeref:typename:uint16_t
boot_pin_ctrl	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 boot_pin_ctrl; \/* 0x250 *\/$/;"	m	struct:crlapb_regs	typeref:typename:u32
boot_prep_linux	arch/arc/lib/bootm.c	/^static void boot_prep_linux(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_prep_linux	arch/arm/lib/bootm.c	/^static void boot_prep_linux(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_prep_linux	arch/mips/lib/bootm.c	/^static void boot_prep_linux(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_prep_linux	arch/powerpc/lib/bootm.c	/^static void boot_prep_linux(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_prep_linux	arch/x86/lib/bootm.c	/^static int boot_prep_linux(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_prep_vxworks	arch/arm/lib/bootm.c	/^void boot_prep_vxworks(bootm_headers_t *images)$/;"	f	typeref:typename:void
boot_prep_vxworks	arch/powerpc/lib/bootm.c	/^void boot_prep_vxworks(bootm_headers_t *images)$/;"	f	typeref:typename:void
boot_priority	disk/part_amiga.h	/^    s32 boot_priority;$/;"	m	struct:amiga_part_geometry	typeref:typename:s32
boot_ramdisk_high	common/image.c	/^int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,$/;"	f	typeref:typename:int
boot_read_bitfield	arch/arm/mach-keystone/include/mach/psc_defs.h	/^static inline u32 boot_read_bitfield(u32 z, u32 x, u32 y)$/;"	f	typeref:typename:u32
boot_reason	board/nokia/rx51/tag_omap.h	/^		struct omap_boot_reason_config boot_reason;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_boot_reason_config
boot_reason_ptr	board/nokia/rx51/rx51.c	/^static char *boot_reason_ptr;$/;"	v	typeref:typename:char *	file:
boot_reloc_fdt	arch/mips/lib/bootm.c	/^static int boot_reloc_fdt(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_reloc_ramdisk	arch/mips/lib/bootm.c	/^static int boot_reloc_ramdisk(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_relocate_fdt	common/image-fdt.c	/^int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size)$/;"	f	typeref:typename:int
boot_sector	include/fat.h	/^typedef struct boot_sector {$/;"	s
boot_sector	include/fat.h	/^} boot_sector;$/;"	t	typeref:struct:boot_sector
boot_selected_os	common/bootm_os.c	/^int boot_selected_os(int argc, char * const argv[], int state,$/;"	f	typeref:typename:int
boot_set_bitfield	arch/arm/mach-keystone/include/mach/psc_defs.h	/^static inline u32 boot_set_bitfield(u32 z, u32 f, u32 x, u32 y)$/;"	f	typeref:typename:u32
boot_setup_fdt	arch/mips/lib/bootm.c	/^static int boot_setup_fdt(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
boot_size	disk/part_mac.h	/^	__u32	boot_size;	\/* size of boot code, in bytes		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_source	arch/arm/mach-exynos/include/mach/spl.h	/^	unsigned	boot_source;	\/* Boot device *\/$/;"	m	struct:spl_machine_param	typeref:typename:unsigned
boot_start	disk/part_mac.h	/^	__u32	boot_start;	\/* first block of boot code		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
boot_start	include/mpc5xxx.h	/^	volatile u32	boot_start;	\/* 0x004c *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
boot_start_lmb	common/bootm.c	/^static inline void boot_start_lmb(bootm_headers_t *images) { }$/;"	f	typeref:typename:void	file:
boot_start_lmb	common/bootm.c	/^static void boot_start_lmb(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
boot_status	include/smbios.h	/^	u8 boot_status;$/;"	m	struct:smbios_type32	typeref:typename:u8
boot_stop	include/mpc5xxx.h	/^	volatile u32	boot_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
boot_temp_check	board/samsung/common/board.c	/^static void boot_temp_check(void)$/;"	f	typeref:typename:void	file:
boot_unattempted_labels	cmd/pxe.c	/^static void boot_unattempted_labels(cmd_tbl_t *cmdtp, struct pxe_menu *cfg)$/;"	f	typeref:typename:void	file:
bootable	include/part.h	/^	int	bootable;	\/* Active\/Bootable flag is set		*\/$/;"	m	struct:disk_partition	typeref:typename:int
bootargs	arch/sparc/cpu/leon2/prom.c	/^	struct linux_arguments_v0 bootargs;$/;"	m	struct:leon_prom_info	typeref:struct:linux_arguments_v0	file:
bootargs	arch/sparc/cpu/leon3/prom.c	/^	struct linux_arguments_v0 bootargs;$/;"	m	struct:leon_prom_info	typeref:struct:linux_arguments_v0	file:
bootargs	arch/sparc/include/asm/prom.h	/^	char **bootargs;$/;"	m	struct:linux_bootargs_v2	typeref:typename:char **
bootargs_p	arch/sparc/cpu/leon2/prom.c	/^	struct linux_arguments_v0 *bootargs_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_arguments_v0 *	file:
bootargs_p	arch/sparc/cpu/leon3/prom.c	/^	struct linux_arguments_v0 *bootargs_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_arguments_v0 *	file:
bootcfg	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	bootcfg;	\/* 0x14 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
bootcfg1	board/freescale/c29xpcie/cpld.h	/^	u8 bootcfg1;	\/* 0x18 - Boot configure 1 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
bootcfg2	board/freescale/c29xpcie/cpld.h	/^	u8 bootcfg2;	\/* 0x19 - Boot configure 2 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
bootcfg3	board/freescale/c29xpcie/cpld.h	/^	u8 bootcfg3;	\/* 0x1a - Boot configure 3 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
bootcfg4	board/freescale/c29xpcie/cpld.h	/^	u8 bootcfg4;	\/* 0x1b - Boot configure 4 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
bootcode	disk/part_amiga.c	/^static struct bootcode_block bootcode = {0};$/;"	v	typeref:struct:bootcode_block	file:
bootcode_block	disk/part_amiga.h	/^    u32 bootcode_block;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
bootcode_block	disk/part_amiga.h	/^struct bootcode_block$/;"	s
bootcount_load	drivers/bootcount/bootcount.c	/^__weak ulong bootcount_load(void)$/;"	f	typeref:typename:__weak ulong
bootcount_load	drivers/bootcount/bootcount_at91.c	/^ulong bootcount_load(void)$/;"	f	typeref:typename:ulong
bootcount_load	drivers/bootcount/bootcount_blackfin.c	/^ulong bootcount_load(void)$/;"	f	typeref:typename:ulong
bootcount_load	drivers/bootcount/bootcount_davinci.c	/^ulong bootcount_load(void)$/;"	f	typeref:typename:ulong
bootcount_load	drivers/bootcount/bootcount_env.c	/^ulong bootcount_load(void)$/;"	f	typeref:typename:ulong
bootcount_load	drivers/bootcount/bootcount_i2c.c	/^ulong bootcount_load(void)$/;"	f	typeref:typename:ulong
bootcount_load	drivers/bootcount/bootcount_ram.c	/^ulong bootcount_load(void)$/;"	f	typeref:typename:ulong
bootcount_store	drivers/bootcount/bootcount.c	/^__weak void bootcount_store(ulong a)$/;"	f	typeref:typename:__weak void
bootcount_store	drivers/bootcount/bootcount_at91.c	/^void bootcount_store(ulong a)$/;"	f	typeref:typename:void
bootcount_store	drivers/bootcount/bootcount_blackfin.c	/^void bootcount_store(ulong cnt)$/;"	f	typeref:typename:void
bootcount_store	drivers/bootcount/bootcount_davinci.c	/^void bootcount_store(ulong a)$/;"	f	typeref:typename:void
bootcount_store	drivers/bootcount/bootcount_env.c	/^void bootcount_store(ulong a)$/;"	f	typeref:typename:void
bootcount_store	drivers/bootcount/bootcount_i2c.c	/^void bootcount_store(ulong a)$/;"	f	typeref:typename:void
bootcount_store	drivers/bootcount/bootcount_ram.c	/^void bootcount_store(ulong a)$/;"	f	typeref:typename:void
bootdelay_process	common/autoboot.c	/^const char *bootdelay_process(void)$/;"	f	typeref:typename:const char *
bootdelay_process	include/autoboot.h	/^static inline const char *bootdelay_process(void)$/;"	f	typeref:typename:const char *
bootdevice_selected	board/amcc/redwood/redwood.c	/^static int bootdevice_selected(void)$/;"	f	typeref:typename:int	file:
bootefi_device_obj	cmd/bootefi.c	/^static struct efi_object bootefi_device_obj = {$/;"	v	typeref:struct:efi_object	file:
bootefi_device_path	cmd/bootefi.c	/^static struct efi_device_path_file_path bootefi_device_path[] = {$/;"	v	typeref:struct:efi_device_path_file_path[]	file:
bootefi_help_text	cmd/bootefi.c	/^static char bootefi_help_text[] =$/;"	v	typeref:typename:char[]	file:
bootefi_image_path	cmd/bootefi.c	/^static struct efi_device_path_file_path bootefi_image_path[] = {$/;"	v	typeref:struct:efi_device_path_file_path[]	file:
bootefi_open_dp	cmd/bootefi.c	/^static efi_status_t EFIAPI bootefi_open_dp(void *handle, efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
bootfrom	tools/kwbimage.c	/^		unsigned int bootfrom;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
booti_help_text	cmd/booti.c	/^static char booti_help_text[] =$/;"	v	typeref:typename:char[]	file:
booti_setup	cmd/booti.c	/^static int booti_setup(bootm_headers_t *images)$/;"	f	typeref:typename:int	file:
booti_start	cmd/booti.c	/^static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
bootinfo	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	bootinfo;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
bootlocptrh	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	bootlocptrh;	\/* Boot location pointer high-order addr *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
bootlocptrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	bootlocptrl;	\/* Boot location pointer low-order addr *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
bootm_announce_and_cleanup	arch/x86/lib/bootm.c	/^void bootm_announce_and_cleanup(void)$/;"	f	typeref:typename:void
bootm_argv	board/inversepath/usbarmory/usbarmory.c	/^static char *bootm_argv[] = {$/;"	v	typeref:typename:char * []	file:
bootm_decomp_image	common/bootm.c	/^int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,$/;"	f	typeref:typename:int
bootm_disable_interrupts	common/bootm.c	/^ulong bootm_disable_interrupts(void)$/;"	f	typeref:typename:ulong
bootm_find_images	common/bootm.c	/^int bootm_find_images(int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
bootm_find_os	common/bootm.c	/^static int bootm_find_os(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
bootm_find_other	common/bootm.c	/^static int bootm_find_other(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
bootm_headers	include/image.h	/^typedef struct bootm_headers {$/;"	s
bootm_headers_t	include/image.h	/^} bootm_headers_t;$/;"	t	typeref:struct:bootm_headers
bootm_help_text	cmd/bootm.c	/^static char bootm_help_text[] =$/;"	v	typeref:typename:char[]	file:
bootm_host_load_image	common/bootm.c	/^static int bootm_host_load_image(const void *fit, int req_image_type)$/;"	f	typeref:typename:int	file:
bootm_host_load_images	common/bootm.c	/^int bootm_host_load_images(const void *fit, int cfg_noffset)$/;"	f	typeref:typename:int
bootm_load_os	common/bootm.c	/^static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,$/;"	f	typeref:typename:int	file:
bootm_maybe_autostart	cmd/bootm.c	/^int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd)$/;"	f	typeref:typename:int
bootm_maybe_autostart	include/command.h	/^static inline int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd)$/;"	f	typeref:typename:int
bootm_os_get_boot_func	common/bootm_os.c	/^boot_os_fn *bootm_os_get_boot_func(int os)$/;"	f	typeref:typename:boot_os_fn *
bootm_start	common/bootm.c	/^static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
bootmenu_autoboot_loop	cmd/bootmenu.c	/^static void bootmenu_autoboot_loop(struct bootmenu_data *menu,$/;"	f	typeref:typename:void	file:
bootmenu_choice_entry	cmd/bootmenu.c	/^static char *bootmenu_choice_entry(void *data)$/;"	f	typeref:typename:char *	file:
bootmenu_create	cmd/bootmenu.c	/^static struct bootmenu_data *bootmenu_create(int delay)$/;"	f	typeref:struct:bootmenu_data *	file:
bootmenu_data	cmd/bootmenu.c	/^struct bootmenu_data {$/;"	s	file:
bootmenu_destroy	cmd/bootmenu.c	/^static void bootmenu_destroy(struct bootmenu_data *menu)$/;"	f	typeref:typename:void	file:
bootmenu_entry	cmd/bootmenu.c	/^struct bootmenu_entry {$/;"	s	file:
bootmenu_getoption	cmd/bootmenu.c	/^static char *bootmenu_getoption(unsigned short int n)$/;"	f	typeref:typename:char *	file:
bootmenu_key	cmd/bootmenu.c	/^enum bootmenu_key {$/;"	g	file:
bootmenu_loop	cmd/bootmenu.c	/^static void bootmenu_loop(struct bootmenu_data *menu,$/;"	f	typeref:typename:void	file:
bootmenu_print_entry	cmd/bootmenu.c	/^static void bootmenu_print_entry(void *data)$/;"	f	typeref:typename:void	file:
bootmenu_show	cmd/bootmenu.c	/^static void bootmenu_show(int delay)$/;"	f	typeref:typename:void	file:
bootmodeclr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bootmodeclr;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
bootor	board/freescale/c29xpcie/cpld.h	/^	u8 bootor;	\/* 0x17 - Boot configure override Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
bootp_add_id	net/bootp.c	/^static void bootp_add_id(ulong id)$/;"	f	typeref:typename:void	file:
bootp_extended	net/bootp.c	/^static int bootp_extended(u8 *e)$/;"	f	typeref:typename:int	file:
bootp_handler	net/bootp.c	/^static void bootp_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
bootp_hdr	net/bootp.h	/^struct bootp_hdr {$/;"	s
bootp_ids	net/bootp.c	/^u32		bootp_ids[CONFIG_BOOTP_ID_CACHE_SIZE];$/;"	v	typeref:typename:u32[]
bootp_match_id	net/bootp.c	/^static bool bootp_match_id(ulong id)$/;"	f	typeref:typename:bool	file:
bootp_num_ids	net/bootp.c	/^unsigned int	bootp_num_ids;$/;"	v	typeref:typename:unsigned int
bootp_process_vendor	net/bootp.c	/^static void bootp_process_vendor(u8 *ext, int size)$/;"	f	typeref:typename:void	file:
bootp_process_vendor_field	net/bootp.c	/^static void bootp_process_vendor_field(u8 *ext)$/;"	f	typeref:typename:void	file:
bootp_request	net/bootp.c	/^void bootp_request(void)$/;"	f	typeref:typename:void
bootp_reset	net/bootp.c	/^void bootp_reset(void)$/;"	f	typeref:typename:void
bootp_start	net/bootp.c	/^ulong		bootp_start;$/;"	v	typeref:typename:ulong
bootp_timeout	net/bootp.c	/^ulong		bootp_timeout;$/;"	v	typeref:typename:ulong
bootp_timeout_handler	net/bootp.c	/^static void bootp_timeout_handler(void)$/;"	f	typeref:typename:void	file:
bootp_try	net/bootp.c	/^int		bootp_try;$/;"	v	typeref:typename:int
bootpath	arch/sparc/include/asm/prom.h	/^	char **bootpath;$/;"	m	struct:linux_bootargs_v2	typeref:typename:char **
bootram_command	drivers/mtd/onenand/samsung.c	/^	int		bootram_command;$/;"	m	struct:s3c_onenand	typeref:typename:int	file:
bootretry_dont_retry	common/bootretry.c	/^void bootretry_dont_retry(void)$/;"	f	typeref:typename:void
bootretry_dont_retry	include/bootretry.h	/^static inline void bootretry_dont_retry(void)$/;"	f	typeref:typename:void
bootretry_init_cmd_timeout	common/bootretry.c	/^void bootretry_init_cmd_timeout(void)$/;"	f	typeref:typename:void
bootretry_init_cmd_timeout	include/bootretry.h	/^static inline void bootretry_init_cmd_timeout(void)$/;"	f	typeref:typename:void
bootretry_reset_cmd_timeout	common/bootretry.c	/^void bootretry_reset_cmd_timeout(void)$/;"	f	typeref:typename:void
bootretry_reset_cmd_timeout	include/bootretry.h	/^static inline void bootretry_reset_cmd_timeout(void)$/;"	f	typeref:typename:void
bootretry_tstc_timeout	common/bootretry.c	/^int bootretry_tstc_timeout(void)$/;"	f	typeref:typename:int
bootretry_tstc_timeout	include/bootretry.h	/^static inline int bootretry_tstc_timeout(void)$/;"	f	typeref:typename:int
bootrom_bbt	drivers/mtd/nand/bfin_nand.c	/^static struct nand_bbt_descr bootrom_bbt = {$/;"	v	typeref:struct:nand_bbt_descr	file:
bootrom_ecclayout	drivers/mtd/nand/bfin_nand.c	/^static struct nand_ecclayout bootrom_ecclayout = {$/;"	v	typeref:struct:nand_ecclayout	file:
bootrom_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	bootrom_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
bootrom_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	bootrom_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
bootrom_stash	arch/arm/mach-at91/spl.c	/^} bootrom_stash __attribute__((section(".data")));$/;"	v	typeref:struct:__anon9379ac550108
bootrom_sw_info	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct bootrom_sw_info {$/;"	s
bootsect_kludge	arch/x86/include/asm/bootparam.h	/^	__u32	bootsect_kludge;$/;"	m	struct:setup_header	typeref:typename:__u32
bootstage_accum	common/bootstage.c	/^uint32_t bootstage_accum(enum bootstage_id id)$/;"	f	typeref:typename:uint32_t
bootstage_accum	include/bootstage.h	/^static inline uint32_t bootstage_accum(enum bootstage_id id)$/;"	f	typeref:typename:uint32_t
bootstage_add_record	common/bootstage.c	/^ulong bootstage_add_record(enum bootstage_id id, const char *name,$/;"	f	typeref:typename:ulong
bootstage_add_record	include/bootstage.h	/^static inline ulong bootstage_add_record(enum bootstage_id id,$/;"	f	typeref:typename:ulong
bootstage_error	common/bootstage.c	/^ulong bootstage_error(enum bootstage_id id)$/;"	f	typeref:typename:ulong
bootstage_error	include/bootstage.h	/^static inline ulong bootstage_error(enum bootstage_id id)$/;"	f	typeref:typename:ulong
bootstage_fdt_add_report	common/bootstage.c	/^int bootstage_fdt_add_report(void)$/;"	f	typeref:typename:int
bootstage_flags	include/bootstage.h	/^enum bootstage_flags {$/;"	g
bootstage_hdr	common/bootstage.c	/^struct bootstage_hdr {$/;"	s	file:
bootstage_id	include/bootstage.h	/^enum bootstage_id {$/;"	g
bootstage_mark	common/bootstage.c	/^ulong bootstage_mark(enum bootstage_id id)$/;"	f	typeref:typename:ulong
bootstage_mark	include/bootstage.h	/^static inline ulong bootstage_mark(enum bootstage_id id)$/;"	f	typeref:typename:ulong
bootstage_mark_code	common/bootstage.c	/^ulong bootstage_mark_code(const char *file, const char *func, int linenum)$/;"	f	typeref:typename:ulong
bootstage_mark_code	include/bootstage.h	/^static inline ulong bootstage_mark_code(const char *file, const char *func,$/;"	f	typeref:typename:ulong
bootstage_mark_name	common/bootstage.c	/^ulong bootstage_mark_name(enum bootstage_id id, const char *name)$/;"	f	typeref:typename:ulong
bootstage_mark_name	include/bootstage.h	/^static inline ulong bootstage_mark_name(enum bootstage_id id, const char *name)$/;"	f	typeref:typename:ulong
bootstage_record	common/bootstage.c	/^struct bootstage_record {$/;"	s	file:
bootstage_relocate	common/bootstage.c	/^int bootstage_relocate(void)$/;"	f	typeref:typename:int
bootstage_relocate	include/bootstage.h	/^static inline int bootstage_relocate(void)$/;"	f	typeref:typename:int
bootstage_report	common/bootstage.c	/^void bootstage_report(void)$/;"	f	typeref:typename:void
bootstage_start	common/bootstage.c	/^uint32_t bootstage_start(enum bootstage_id id, const char *name)$/;"	f	typeref:typename:uint32_t
bootstage_start	include/bootstage.h	/^static inline uint32_t bootstage_start(enum bootstage_id id, const char *name)$/;"	f	typeref:typename:uint32_t
bootstage_stash	common/bootstage.c	/^int bootstage_stash(void *base, int size)$/;"	f	typeref:typename:int
bootstage_stash	include/bootstage.h	/^static inline int bootstage_stash(void *base, int size)$/;"	f	typeref:typename:int
bootstage_unstash	common/bootstage.c	/^int bootstage_unstash(void *base, int size)$/;"	f	typeref:typename:int
bootstage_unstash	include/bootstage.h	/^static inline int bootstage_unstash(void *base, int size)$/;"	f	typeref:typename:int
bootstrap_char	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char bootstrap_char[] = { 'A', 'B', 'C', 'B', 'D', 'E', 'x', 'F' };$/;"	v	typeref:typename:char[]	file:
bootstrap_char	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };$/;"	v	typeref:typename:char[]	file:
bootstrap_char	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', \\$/;"	v	typeref:typename:char[]	file:
bootstrap_char	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G' };$/;"	v	typeref:typename:char[]	file:
bootstrap_char	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };$/;"	v	typeref:typename:char[]	file:
bootstrap_char	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char bootstrap_char[] = { 'A', 'B', 'C', 'D'};$/;"	v	typeref:typename:char[]	file:
bootstrap_eeprom_read	board/esd/pmc440/pmc440.c	/^static int bootstrap_eeprom_read(unsigned dev_addr, unsigned offset,$/;"	f	typeref:typename:int	file:
bootstrap_eeprom_write	board/esd/pmc440/pmc440.c	/^int bootstrap_eeprom_write(unsigned dev_addr, unsigned offset,$/;"	f	typeref:typename:int
bootstrap_option	arch/powerpc/cpu/ppc4xx/cpu.c	/^static int bootstrap_option(void)$/;"	f	typeref:typename:int	file:
bootstrap_str	arch/powerpc/cpu/ppc4xx/cpu.c	/^static char *bootstrap_str[] = {$/;"	v	typeref:typename:char * []	file:
bootsts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bootsts;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
boottime	include/efi_api.h	/^	struct efi_boot_services *boottime;$/;"	m	struct:efi_system_table	typeref:struct:efi_boot_services *
bootup_state	include/smbios.h	/^	u8 bootup_state;$/;"	m	struct:smbios_type3	typeref:typename:u8
bootz_help_text	cmd/bootz.c	/^static char bootz_help_text[] =$/;"	v	typeref:typename:char[]	file:
bootz_setup	arch/arm/lib/zimage.c	/^int bootz_setup(ulong image, ulong *start, ulong *end)$/;"	f	typeref:typename:int
bootz_setup	arch/sandbox/lib/bootm.c	/^int bootz_setup(ulong image, ulong *start, ulong *end)$/;"	f	typeref:typename:int
bootz_setup	cmd/bootz.c	/^int __weak bootz_setup(ulong image, ulong *start, ulong *end)$/;"	f	typeref:typename:int __weak
bootz_setup	common/spl/spl.c	/^int __weak bootz_setup(ulong image, ulong *start, ulong *end)$/;"	f	typeref:typename:int __weak
bootz_start	cmd/bootz.c	/^static int bootz_start(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
bopts_ctrl	board/xes/xpedite517x/ddr.c	/^static struct board_memctl_options bopts_ctrl[][2] = {$/;"	v	typeref:struct:board_memctl_options[][2]	file:
bopts_ctrl	board/xes/xpedite537x/ddr.c	/^static struct board_memctl_options bopts_ctrl[][2] = {$/;"	v	typeref:struct:board_memctl_options[][2]	file:
bor	include/linux/immap_qe.h	/^	u32 bor;$/;"	m	struct:rsp	typeref:typename:u32
border	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color border;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
border_color	arch/arm/include/asm/arch-tegra/dc.h	/^	uint border_color;		\/* _DISP_BORDER_COLOR_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
bosch_check_reset_pin	board/bosch/shc/board.c	/^static void bosch_check_reset_pin(void)$/;"	f	typeref:typename:void	file:
bot_haddr	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 bot_haddr;$/;"	m	struct:de_ui	typeref:typename:u32
bot_haddr	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 bot_haddr[3];		\/* dc *\/$/;"	m	struct:de_vi	typeref:typename:u32[3]
bot_haddr	arch/arm/include/asm/arch/display2.h	/^	u32 bot_haddr;$/;"	m	struct:de_ui	typeref:typename:u32
bot_haddr	arch/arm/include/asm/arch/display2.h	/^	u32 bot_haddr[3];		\/* dc *\/$/;"	m	struct:de_vi	typeref:typename:u32[3]
bot_laddr	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 bot_laddr;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
bot_laddr	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 bot_laddr[3];$/;"	m	struct:de_vi::__anon5efd7b530208	typeref:typename:u32[3]
bot_laddr	arch/arm/include/asm/arch/display2.h	/^		u32 bot_laddr;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
bot_laddr	arch/arm/include/asm/arch/display2.h	/^		u32 bot_laddr[3];$/;"	m	struct:de_vi::__anon279c75ef0208	typeref:typename:u32[3]
both	arch/blackfin/include/asm/gpio.h	/^	unsigned short both;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
bothedge	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 bothedge;$/;"	m	struct:rcar_gpio	typeref:typename:u32
bottom	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 bottom;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443308	typeref:typename:u32
bottom	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 bottom;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443408	typeref:typename:u32
bottom_up_buf	fs/ubifs/ubifs.h	/^	int *bottom_up_buf;$/;"	m	struct:ubifs_info	typeref:typename:int *
bottom_y	drivers/video/stb_truetype.h	/^   int x,y,bottom_y;$/;"	m	struct:__anonce392f790f08	typeref:typename:int
bounce_buffer	include/bouncebuf.h	/^	void *bounce_buffer;$/;"	m	struct:bounce_buffer	typeref:typename:void *
bounce_buffer	include/bouncebuf.h	/^struct bounce_buffer {$/;"	s
bounce_buffer_start	common/bouncebuf.c	/^int bounce_buffer_start(struct bounce_buffer *state, void *data,$/;"	f	typeref:typename:int
bounce_buffer_stop	common/bouncebuf.c	/^int bounce_buffer_stop(struct bounce_buffer *state)$/;"	f	typeref:typename:int
boundary	include/linux/mtd/onenand.h	/^	unsigned int boundary[MAX_DIES];$/;"	m	struct:onenand_chip	typeref:typename:unsigned int[]
bp	arch/arm/include/asm/processor.h	/^	struct debug_entry	bp[2];$/;"	m	struct:debug_info	typeref:struct:debug_entry[2]
bp_chaddr	net/bootp.h	/^	u8		bp_chaddr[16];	\/* Client hardware address	*\/$/;"	m	struct:bootp_hdr	typeref:typename:u8[16]
bp_ciaddr	net/bootp.h	/^	struct in_addr	bp_ciaddr;	\/* Client IP address		*\/$/;"	m	struct:bootp_hdr	typeref:struct:in_addr
bp_config0_r	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config0_r;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config0_w	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config0_w;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config1_r	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config1_r;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config1_w	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config1_w;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config2_r	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config2_r;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config2_w	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config2_w;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config3_r	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config3_r;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_config3_w	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_config3_w;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_control0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_control0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_control1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_control1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_control2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_control2;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_control3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int bp_control3;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
bp_file	net/bootp.h	/^	char		bp_file[128];	\/* Boot file name		*\/$/;"	m	struct:bootp_hdr	typeref:typename:char[128]
bp_giaddr	net/bootp.h	/^	struct in_addr	bp_giaddr;	\/* Gateway IP address		*\/$/;"	m	struct:bootp_hdr	typeref:struct:in_addr
bp_hlen	net/bootp.h	/^	u8		bp_hlen;	\/* Hardware address length	*\/$/;"	m	struct:bootp_hdr	typeref:typename:u8
bp_hops	net/bootp.h	/^	u8		bp_hops;	\/* Hop count (gateway thing)	*\/$/;"	m	struct:bootp_hdr	typeref:typename:u8
bp_htype	net/bootp.h	/^	u8		bp_htype;	\/* Hardware type		*\/$/;"	m	struct:bootp_hdr	typeref:typename:u8
bp_id	net/bootp.h	/^	u32		bp_id;		\/* Transaction ID		*\/$/;"	m	struct:bootp_hdr	typeref:typename:u32
bp_op	net/bootp.h	/^	u8		bp_op;		\/* Operation			*\/$/;"	m	struct:bootp_hdr	typeref:typename:u8
bp_secs	net/bootp.h	/^	u16		bp_secs;	\/* Seconds since boot		*\/$/;"	m	struct:bootp_hdr	typeref:typename:u16
bp_siaddr	net/bootp.h	/^	struct in_addr	bp_siaddr;	\/* Server IP address		*\/$/;"	m	struct:bootp_hdr	typeref:struct:in_addr
bp_sname	net/bootp.h	/^	char		bp_sname[64];	\/* Server host name		*\/$/;"	m	struct:bootp_hdr	typeref:typename:char[64]
bp_spare1	net/bootp.h	/^	u16		bp_spare1;	\/* Alignment			*\/$/;"	m	struct:bootp_hdr	typeref:typename:u16
bp_tag	arch/xtensa/include/asm/bootparam.h	/^struct bp_tag {$/;"	s
bp_tag_next	arch/xtensa/include/asm/bootparam.h	/^#define bp_tag_next(/;"	d
bp_vend	net/bootp.h	/^	char		bp_vend[OPT_FIELD_SIZE]; \/* Vendor information	*\/$/;"	m	struct:bootp_hdr	typeref:typename:char[]
bp_yiaddr	net/bootp.h	/^	struct in_addr	bp_yiaddr;	\/* Your (client) IP address	*\/$/;"	m	struct:bootp_hdr	typeref:struct:in_addr
bpctr	include/tsi148.h	/^	unsigned int bpctr;                   \/* 0x43c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
bpdcr	include/linux/immap_qe.h	/^	u32 bpdcr;		\/* Breakpoint debug command register *\/$/;"	m	struct:dbg	typeref:typename:u32
bpdiv	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	bpdiv;		\/* 0x12c *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
bpdiv	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	bpdiv;		\/* 2c *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
bpdmr	include/linux/immap_qe.h	/^	u32 bpdmr;		\/* Breakpoint debug mask register *\/$/;"	m	struct:dbg	typeref:typename:u32
bpdsr	include/linux/immap_qe.h	/^	u32 bpdsr;		\/* Breakpoint debug status register *\/$/;"	m	struct:dbg	typeref:typename:u32
bpemr	include/linux/immap_qe.h	/^	u32 bpemr;		\/* Breakpoint exit mode register *\/$/;"	m	struct:dbg	typeref:typename:u32
bpgtr	include/tsi148.h	/^	unsigned int bpgtr;                   \/* 0x438         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
bph	drivers/usb/dwc3/core.h	/^	u32		bph;$/;"	m	struct:dwc3_trb	typeref:typename:u32
bpid	include/fsl-mc/fsl_dpbp.h	/^	uint16_t bpid;$/;"	m	struct:dpbp_attr	typeref:typename:uint16_t
bpid_offset	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 bpid_offset;$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
bpid_offset	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t bpid_offset;$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
bpid_offset	include/fsl_sec.h	/^	uint32_t bpid_offset;$/;"	m	struct:sg_entry	typeref:typename:uint32_t
bpix	include/dm/test.h	/^	int bpix;$/;"	m	struct:sandbox_sdl_plat	typeref:typename:int
bpix	include/video.h	/^	enum video_log2_bpp bpix;$/;"	m	struct:video_priv	typeref:enum:video_log2_bpp
bpix	lib/efi_loader/efi_gop.c	/^	u32 bpix;$/;"	m	struct:efi_gop_obj	typeref:typename:u32	file:
bpl	drivers/usb/dwc3/core.h	/^	u32		bpl;$/;"	m	struct:dwc3_trb	typeref:typename:u32
bpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bpll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
bpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bpll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
bpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
bpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bpll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
bpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bpll_lock;			\/* 0x10030010 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
bpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bpll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
bpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned bpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
bpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned bpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
bpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned bpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
bpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bplluser_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bplluser_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bplluser_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bplluser_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bplluser_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bplluser_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bplluser_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
bplluser_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	bplluser_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
bpmp	arch/arm/dts/tegra186.dtsi	/^	bpmp: bpmp {$/;"	l
bpmp_bus_id	drivers/i2c/tegra186_bpmp_i2c.c	/^	uint32_t bpmp_bus_id;$/;"	m	struct:tegra186_bpmp_i2c	typeref:typename:uint32_t	file:
bpmp_i2c	arch/arm/dts/tegra186.dtsi	/^		bpmp_i2c: i2c {$/;"	l	label:bpmp
bpp	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	bpp;		\/* Bits per pixel *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
bpp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 bpp;$/;"	m	struct:bcm2835_mbox_tag_depth::__anon775fc544230a::__anon775fc5442408	typeref:typename:u32
bpp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 bpp;$/;"	m	struct:bcm2835_mbox_tag_depth::__anon775fc544230a::__anon775fc5442508	typeref:typename:u32
bpp	drivers/video/am335x-fb.h	/^	unsigned int	bpp;		\/* bits per pixel *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
bpp	drivers/video/da8xx-fb.h	/^	int bpp;$/;"	m	struct:lcd_ctrl_config	typeref:typename:int
bpp	drivers/video/mx3fb.c	/^	u32	bpp:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
bpp	drivers/video/mx3fb.c	/^	u32	bpp:3;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:3	file:
bpp	include/video_easylogo.h	/^	int		bpp;$/;"	m	struct:__anon1a9c56c70108	typeref:typename:int
bpp	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
bpp_to_pixfmt	drivers/video/mxc_ipuv3_fb.c	/^static uint32_t bpp_to_pixfmt(struct fb_info *fbi)$/;"	f	typeref:typename:uint32_t	file:
bpr	drivers/net/ftgmac100.h	/^	unsigned int	bpr;		\/* 0x6c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
bpr	drivers/net/ftmac100.h	/^	unsigned int	bpr;		\/* 0x9c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
bpr	drivers/net/ftmac110.h	/^	uint32_t bpr;    \/* 0x9C: Back Pressure Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
bprc	drivers/net/e1000.h	/^	uint64_t bprc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
bprmir	include/linux/immap_qe.h	/^	u32 bprmir;		\/* Breakpoint request mode immediate register *\/$/;"	m	struct:dbg	typeref:typename:u32
bprmrr0	include/linux/immap_qe.h	/^	u32 bprmrr0;		\/* Breakpoint request mode risc register 0 *\/$/;"	m	struct:dbg	typeref:typename:u32
bprmrr1	include/linux/immap_qe.h	/^	u32 bprmrr1;		\/* Breakpoint request mode risc register 1 *\/$/;"	m	struct:dbg	typeref:typename:u32
bprmsr	include/linux/immap_qe.h	/^	u32 bprmsr;		\/* Breakpoint request mode serial register *\/$/;"	m	struct:dbg	typeref:typename:u32
bprmtr0	include/linux/immap_qe.h	/^	u32 bprmtr0;		\/* Breakpoint request mode trb register 0 *\/$/;"	m	struct:dbg	typeref:typename:u32
bprmtr1	include/linux/immap_qe.h	/^	u32 bprmtr1;		\/* Breakpoint request mode trb register 1 *\/$/;"	m	struct:dbg	typeref:typename:u32
bprth	board/keymile/common/common.h	/^	unsigned char	bprth;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
bprtl	board/keymile/common/common.h	/^	unsigned char	bprtl;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
bps_led	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 bps_led;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
bps_out	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 bps_out;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
bptc	drivers/net/e1000.h	/^	uint64_t bptc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
bptcr00	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr00;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr01	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr01;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr02	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr02;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr03	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr03;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr04	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr04;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr05	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr05;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr06	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr06;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr07	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr07;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr08	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr08;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr09	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr09;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr10	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr10;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr11	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr11;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr12	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr12;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr13	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr13;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr14	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr14;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr15	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr15;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr16	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr16;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr17	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr17;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr18	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr18;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr19	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr19;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr20	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr20;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr21	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr21;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr22	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr22;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr23	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr23;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr24	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr24;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr25	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr25;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr26	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr26;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr27	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr27;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr28	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr28;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr29	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr29;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr30	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr30;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptcr31	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bptcr31;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bptr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	bptr;		\/* Boot Page Translation *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
bptr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	bptr;		\/* 0x20 - Boot Page Translation Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
br	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     br;$/;"	m	struct:lbc_bank	typeref:typename:u32
br	include/pcmcia.h	/^	ulong	br;$/;"	m	struct:__anone7bb971b0108	typeref:typename:ulong
br_rest	arch/arm/mach-exynos/include/mach/uart.h	/^union br_rest {$/;"	u
br_rest	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^union br_rest {$/;"	u
br_summaryscreen	board/BuR/common/common.c	/^void br_summaryscreen(void)$/;"	f	typeref:typename:void
br_summaryscreen_printdtb	board/BuR/common/common.c	/^static void br_summaryscreen_printdtb(char *prefix,$/;"	f	typeref:typename:void	file:
br_summaryscreen_printenv	board/BuR/common/common.c	/^static void br_summaryscreen_printenv(char *prefix,$/;"	f	typeref:typename:void	file:
branch_bx	arch/arm/mach-exynos/include/mach/system.h	/^#define branch_bx(/;"	d
branch_to_self	board/freescale/common/fsl_validate.c	/^void branch_to_self(void)$/;"	f	typeref:typename:void
branches	fs/ubifs/ubifs-media.h	/^	__u8 branches[];$/;"	m	struct:ubifs_idx_node	typeref:typename:__u8[]
branches	fs/ubifs/ubifs-media.h	/^	char branches[];$/;"	m	struct:ubifs_idx_node	typeref:typename:char[]
brbqosconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int brbqosconfig;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
brbqosconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int brbqosconfig;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
brbrsvconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int brbrsvconfig;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
brbrsvconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int brbrsvconfig;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
brbrsvcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int brbrsvcontrol;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
brc	drivers/serial/serial_mxc.c	/^	u32 brc;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
brcmf	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	brcmf: bcrmf@1 {$/;"	l
brcmf	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	brcmf: bcrmf@1 {$/;"	l
brcmf	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	brcmf: bcrmf@1 {$/;"	l
brcmf	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	brcmf: bcrmf@1 {$/;"	l
brcmf	arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts	/^	brcmf: bcrmf@1 {$/;"	l
brcmf	arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts	/^	brcmf: bcrmf@1 {$/;"	l
brcorenbr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 brcorenbr;			\/* 0x090 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
brd_mux_lane_to_slot	board/freescale/t208xqds/t208xqds.c	/^int brd_mux_lane_to_slot(void)$/;"	f	typeref:typename:int
brdcfg	board/freescale/common/qixis.h	/^	u8 brdcfg[16];  \/* Board Configuration Register,0x50 *\/$/;"	m	struct:qixis	typeref:typename:u8[16]
brdcfg0	board/freescale/common/ngpixis.h	/^	u8 brdcfg0;$/;"	m	struct:ngpixis	typeref:typename:u8
brdcfg0	board/freescale/common/pixis.h	/^	u8 brdcfg0;$/;"	m	struct:pixis	typeref:typename:u8
brdcfg1	board/freescale/common/ngpixis.h	/^	u8 brdcfg1;	\/* On some boards, this register is called 'dma' *\/$/;"	m	struct:ngpixis	typeref:typename:u8
brdcfg1	board/freescale/common/pixis.h	/^	u8 brdcfg1;$/;"	m	struct:pixis	typeref:typename:u8
brdcfg2	board/freescale/common/ngpixis.h	/^	u8 brdcfg2;$/;"	m	struct:ngpixis	typeref:typename:u8
brdcrmb	include/mpc5xxx.h	/^	volatile u32	brdcrmb;	\/* 0x0008 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
break_isr	include/bedbug/type.h	/^	void (*break_isr) (struct pt_regs *);$/;"	m	struct:__anon3619a6480108	typeref:typename:void (*)(struct pt_regs *)
breakpoint	common/kgdb.c	/^breakpoint(void)$/;"	f	typeref:typename:void
breserved	include/usbdescriptors.h	/^	u8 breserved;$/;"	m	struct:usb_qualifier_descriptor	typeref:typename:u8
brg	include/linux/immap_qe.h	/^	qe_brg_t brg;		\/* brg *\/$/;"	m	struct:qe_immap	typeref:typename:qe_brg_t
brg_clk	arch/arm/include/asm/global_data.h	/^	u32 brg_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
brg_clk	arch/powerpc/include/asm/global_data.h	/^	u32 brg_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
brg_clk	arch/powerpc/include/asm/global_data.h	/^	unsigned long brg_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
brg_map	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static unsigned char brg_map[] = {$/;"	v	typeref:typename:unsigned char[]	file:
brg_mod_reset	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	brg_mod_reset;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
brgc1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc1;$/;"	m	struct:ccsr_cpm_brg1	typeref:typename:u32
brgc1	include/linux/immap_qe.h	/^	u32 brgc1;		\/* BRG1 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc10	include/linux/immap_qe.h	/^	u32 brgc10;		\/* BRG10 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc11	include/linux/immap_qe.h	/^	u32 brgc11;		\/* BRG11 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc12	include/linux/immap_qe.h	/^	u32 brgc12;		\/* BRG12 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc13	include/linux/immap_qe.h	/^	u32 brgc13;		\/* BRG13 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc14	include/linux/immap_qe.h	/^	u32 brgc14;		\/* BRG14 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc15	include/linux/immap_qe.h	/^	u32 brgc15;		\/* BRG15 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc16	include/linux/immap_qe.h	/^	u32 brgc16;		\/* BRG16 configuration register *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc2;$/;"	m	struct:ccsr_cpm_brg1	typeref:typename:u32
brgc2	include/linux/immap_qe.h	/^	u32 brgc2;		\/* BRG2 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc3;$/;"	m	struct:ccsr_cpm_brg1	typeref:typename:u32
brgc3	include/linux/immap_qe.h	/^	u32 brgc3;		\/* BRG3 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc4;$/;"	m	struct:ccsr_cpm_brg1	typeref:typename:u32
brgc4	include/linux/immap_qe.h	/^	u32 brgc4;		\/* BRG4 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc5;$/;"	m	struct:ccsr_cpm_brg2	typeref:typename:u32
brgc5	include/linux/immap_qe.h	/^	u32 brgc5;		\/* BRG5 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc6;$/;"	m	struct:ccsr_cpm_brg2	typeref:typename:u32
brgc6	include/linux/immap_qe.h	/^	u32 brgc6;		\/* BRG6 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc7;$/;"	m	struct:ccsr_cpm_brg2	typeref:typename:u32
brgc7	include/linux/immap_qe.h	/^	u32 brgc7;		\/* BRG7 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brgc8;$/;"	m	struct:ccsr_cpm_brg2	typeref:typename:u32
brgc8	include/linux/immap_qe.h	/^	u32 brgc8;		\/* BRG8 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgc9	include/linux/immap_qe.h	/^	u32 brgc9;		\/* BRG9 configuration register  *\/$/;"	m	struct:qe_brg	typeref:typename:u32
brgr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	brgr;	\/* Baud Rate Generator Register RW *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
brgr	drivers/serial/atmel_usart.h	/^	u32	brgr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
bridge	arch/powerpc/include/asm/immap_83xx.h	/^	struct pex_csb_bridge bridge;$/;"	m	struct:pex83xx	typeref:struct:pex_csb_bridge
bridge_in	arch/arm/dts/exynos5250-snow.dts	/^					bridge_in: endpoint {$/;"	l
bridge_in	arch/arm/dts/exynos5250-spring.dts	/^				bridge_in: endpoint {$/;"	l
bridge_in	arch/arm/dts/exynos5420-peach-pit.dts	/^					bridge_in: endpoint {$/;"	l
bridge_out	arch/arm/dts/exynos5250-snow.dts	/^					bridge_out: endpoint {$/;"	l	label:ptn3460
bridge_out	arch/arm/dts/exynos5250-spring.dts	/^				bridge_out: endpoint {$/;"	l
bridge_out	arch/arm/dts/exynos5420-peach-pit.dts	/^					bridge_out: endpoint {$/;"	l
bridge_silicon_revision	arch/x86/cpu/ivybridge/northbridge.c	/^int bridge_silicon_revision(struct udevice *dev)$/;"	f	typeref:typename:int
bright_bl_off_fixed	include/ec_commands.h	/^	uint8_t bright_bl_off_fixed[2];		\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2]
bright_bl_on_max	include/ec_commands.h	/^	uint8_t bright_bl_on_max[2];		\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2]
bright_bl_on_min	include/ec_commands.h	/^	uint8_t bright_bl_on_min[2];		\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2]
brightness	arch/arm/mach-exynos/include/mach/pwm_backlight.h	/^	int brightness;$/;"	m	struct:pwm_backlight_data	typeref:typename:int
brightness	include/ec_commands.h	/^		} brightness, seq, demo;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::num
brightness	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
brightness	include/ec_commands.h	/^	uint8_t brightness[EC_LED_COLOR_COUNT];$/;"	m	struct:ec_params_led_control	typeref:typename:uint8_t[]
brightness_range	include/ec_commands.h	/^	uint8_t brightness_range[EC_LED_COLOR_COUNT];$/;"	m	struct:ec_response_led_control	typeref:typename:uint8_t[]
broadcast_address	include/efi_api.h	/^	struct efi_mac_address broadcast_address;$/;"	m	struct:efi_simple_network_mode	typeref:struct:efi_mac_address
broadwell_ahci_ids	arch/x86/cpu/broadwell/sata.c	/^static const struct udevice_id broadwell_ahci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broadwell_bank_platdata	arch/x86/include/asm/arch-broadwell/gpio.h	/^struct broadwell_bank_platdata {$/;"	s
broadwell_bank_priv	drivers/gpio/intel_broadwell_gpio.c	/^struct broadwell_bank_priv {$/;"	s	file:
broadwell_early_init	drivers/video/broadwell_igd.c	/^static int broadwell_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_fill_pei_data	arch/x86/cpu/broadwell/sdram.c	/^void broadwell_fill_pei_data(struct pei_data *pei_data)$/;"	f	typeref:typename:void
broadwell_get_count	arch/x86/cpu/broadwell/cpu.c	/^static int broadwell_get_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_get_gpio_base	arch/x86/cpu/broadwell/pch.c	/^static int broadwell_get_gpio_base(struct udevice *dev, u32 *gbasep)$/;"	f	typeref:typename:int	file:
broadwell_get_info	arch/x86/cpu/broadwell/cpu.c	/^static int broadwell_get_info(struct udevice *dev, struct cpu_info *info)$/;"	f	typeref:typename:int	file:
broadwell_gpio_direction_input	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
broadwell_gpio_direction_output	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
broadwell_gpio_get_function	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
broadwell_gpio_get_value	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
broadwell_gpio_ofdata_to_platdata	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_gpio_probe	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_gpio_request	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_request(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
broadwell_gpio_set_value	drivers/gpio/intel_broadwell_gpio.c	/^static int broadwell_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
broadwell_igd_ids	drivers/video/broadwell_igd.c	/^static const struct udevice_id broadwell_igd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broadwell_igd_int15_handler	drivers/video/broadwell_igd.c	/^static int broadwell_igd_int15_handler(void)$/;"	f	typeref:typename:int	file:
broadwell_igd_ofdata_to_platdata	drivers/video/broadwell_igd.c	/^static int broadwell_igd_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_igd_ops	drivers/video/broadwell_igd.c	/^static const struct video_ops broadwell_igd_ops = {$/;"	v	typeref:typename:const struct video_ops	file:
broadwell_igd_plat	drivers/video/broadwell_igd.c	/^struct broadwell_igd_plat {$/;"	s	file:
broadwell_igd_priv	drivers/video/broadwell_igd.c	/^struct broadwell_igd_priv {$/;"	s	file:
broadwell_igd_probe	drivers/video/broadwell_igd.c	/^static int broadwell_igd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_init	arch/x86/cpu/broadwell/cpu.c	/^int broadwell_init(struct udevice *dev)$/;"	f	typeref:typename:int
broadwell_late_init	drivers/video/broadwell_igd.c	/^static int broadwell_late_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_lpc_early_init	arch/x86/cpu/broadwell/lpc.c	/^static int broadwell_lpc_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_lpc_ids	arch/x86/cpu/broadwell/lpc.c	/^static const struct udevice_id broadwell_lpc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broadwell_lpc_probe	arch/x86/cpu/broadwell/lpc.c	/^static int broadwell_lpc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_northbridge_early_init	arch/x86/cpu/broadwell/northbridge.c	/^static int broadwell_northbridge_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_northbridge_ids	arch/x86/cpu/broadwell/northbridge.c	/^static const struct udevice_id broadwell_northbridge_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broadwell_northbridge_probe	arch/x86/cpu/broadwell/northbridge.c	/^static int broadwell_northbridge_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_pch_early_init	arch/x86/cpu/broadwell/pch.c	/^static int broadwell_pch_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_pch_get_spi_base	arch/x86/cpu/broadwell/pch.c	/^static int broadwell_pch_get_spi_base(struct udevice *dev, ulong *sbasep)$/;"	f	typeref:typename:int	file:
broadwell_pch_ids	arch/x86/cpu/broadwell/pch.c	/^static const struct udevice_id broadwell_pch_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broadwell_pch_init	arch/x86/cpu/broadwell/pch.c	/^static int broadwell_pch_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_pch_ops	arch/x86/cpu/broadwell/pch.c	/^static const struct pch_ops broadwell_pch_ops = {$/;"	v	typeref:typename:const struct pch_ops	file:
broadwell_pch_probe	arch/x86/cpu/broadwell/pch.c	/^static int broadwell_pch_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_pinctrl_commit	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^static void broadwell_pinctrl_commit(struct pch_lp_gpio_regs *regs,$/;"	f	typeref:typename:void	file:
broadwell_pinctrl_lookup_phandle	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^static int broadwell_pinctrl_lookup_phandle(struct pin_info *conf,$/;"	f	typeref:typename:int	file:
broadwell_pinctrl_match	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^static const struct udevice_id broadwell_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broadwell_pinctrl_probe	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^static int broadwell_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_pinctrl_read_configs	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^static int broadwell_pinctrl_read_configs(struct udevice *dev,$/;"	f	typeref:typename:int	file:
broadwell_pinctrl_read_pins	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^static int broadwell_pinctrl_read_pins(struct udevice *dev,$/;"	f	typeref:typename:int	file:
broadwell_sata_enable	arch/x86/cpu/broadwell/sata.c	/^static int broadwell_sata_enable(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_sata_init	arch/x86/cpu/broadwell/sata.c	/^static void broadwell_sata_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
broadwell_sata_ofdata_to_platdata	arch/x86/cpu/broadwell/sata.c	/^static int broadwell_sata_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_sata_probe	arch/x86/cpu/broadwell/sata.c	/^static int broadwell_sata_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
broadwell_set_spi_protect	arch/x86/cpu/broadwell/pch.c	/^static int broadwell_set_spi_protect(struct udevice *dev, bool protect)$/;"	f	typeref:typename:int	file:
broadwell_syscon_ids	arch/x86/cpu/broadwell/sdram.c	/^static const struct udevice_id broadwell_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
broc	drivers/net/ftmac100.h	/^	unsigned int	broc;		\/* 0xec *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
bromtimcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bromtimcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bromtimcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 bromtimcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
browsed	scripts/kconfig/gconf.c	/^static struct menu *browsed; \/\/ browsed node for SPLIT view$/;"	v	typeref:struct:menu *	file:
brpn	arch/powerpc/include/asm/mmu.h	/^	unsigned long brpn:15;	\/* Real page index (physical address) *\/$/;"	m	struct:_P601_BATL	typeref:typename:unsigned long:15
brpn	arch/powerpc/include/asm/mmu.h	/^	unsigned long long brpn:47;$/;"	m	struct:_BATL	typeref:typename:unsigned long long:47
brr	drivers/gpio/stm32_gpio.c	/^	u32 brr;	\/* GPIO port bit reset *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
brr	drivers/serial/serial_stm32.c	/^	u32 brr;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
brr	drivers/serial/serial_stm32x7.h	/^	u32 brr;$/;"	m	struct:stm32_usart	typeref:typename:u32
brr	include/mpc5xxx.h	/^	volatile u8 brr;		\/* SPI + 0x0F04 *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
brrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	brrl;		\/* Boot release *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
brrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 brrl;			\/* 0x060 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
brrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	brrl;		\/* Boot release *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
brrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	brrl;		\/* Boot release *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
brru	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 brru;			\/* 0x064 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
brst	drivers/i2c/i2c-uniphier-f.c	/^	u32 brst;			\/* bus reset *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
brst	drivers/i2c/i2c-uniphier.c	/^	u32 brst;			\/* bus reset *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
bs	include/universe.h	/^	unsigned int bs;       \/* Base        *\/$/;"	m	struct:_SLAVE_IMAGE	typeref:typename:unsigned int
bsBuff	lib/bzip2/bzlib_private.h	/^      UInt32   bsBuff;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32
bsBuff	lib/bzip2/bzlib_private.h	/^      UInt32   bsBuff;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32
bsFinishWrite	lib/bzip2/bzlib_compress.c	/^void bsFinishWrite ( EState* s )$/;"	f	typeref:typename:void	file:
bsLive	lib/bzip2/bzlib_private.h	/^      Int32    bsLive;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
bsLive	lib/bzip2/bzlib_private.h	/^      Int32    bsLive;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
bsNEEDW	lib/bzip2/bzlib_compress.c	/^#define bsNEEDW(/;"	d	file:
bsPutUChar	lib/bzip2/bzlib_compress.c	/^void bsPutUChar ( EState* s, UChar c )$/;"	f	typeref:typename:void	file:
bsPutUInt32	lib/bzip2/bzlib_compress.c	/^void bsPutUInt32 ( EState* s, UInt32 u )$/;"	f	typeref:typename:void	file:
bsW	lib/bzip2/bzlib_compress.c	/^void bsW ( EState* s, Int32 n, UInt32 v )$/;"	f	typeref:typename:void	file:
bs_clkgen0	drivers/video/ipu_regs.h	/^	u32 bs_clkgen0;$/;"	m	struct:ipu_di	typeref:typename:u32
bs_clkgen1	drivers/video/ipu_regs.h	/^	u32 bs_clkgen1;$/;"	m	struct:ipu_di	typeref:typename:u32
bs_max_pll_rate	drivers/phy/marvell/comphy_a3700.h	/^#define bs_max_pll_rate	/;"	d
bs_phy_pu_pll	drivers/phy/marvell/comphy_a3700.h	/^#define bs_phy_pu_pll	/;"	d
bs_phyctrl_frm_pin	drivers/phy/marvell/comphy_a3700.h	/^#define bs_phyctrl_frm_pin	/;"	d
bs_phyintf_40bit	drivers/phy/marvell/comphy_a3700.h	/^#define bs_phyintf_40bit	/;"	d
bs_pll_ready_tx	drivers/phy/marvell/comphy_a3700.h	/^#define bs_pll_ready_tx	/;"	d
bs_rxd_inv	drivers/phy/marvell/comphy_a3700.h	/^#define bs_rxd_inv	/;"	d
bs_txd_inv	drivers/phy/marvell/comphy_a3700.h	/^#define bs_txd_inv	/;"	d
bsc1_apb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock bsc1_apb_clk = {$/;"	v	typeref:struct:bus_clock	file:
bsc1_apb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock bsc1_apb_clk = {$/;"	v	typeref:struct:bus_clock	file:
bsc1_apb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data bsc1_apb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
bsc1_apb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data bsc1_apb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
bsc1_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock bsc1_clk = {$/;"	v	typeref:struct:peri_clock	file:
bsc1_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock bsc1_clk = {$/;"	v	typeref:struct:peri_clock	file:
bsc1_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data bsc1_data = {$/;"	v	typeref:struct:peri_clk_data	file:
bsc1_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data bsc1_data = {$/;"	v	typeref:struct:peri_clk_data	file:
bsc2_apb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock bsc2_apb_clk = {$/;"	v	typeref:struct:bus_clock	file:
bsc2_apb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock bsc2_apb_clk = {$/;"	v	typeref:struct:bus_clock	file:
bsc2_apb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data bsc2_apb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
bsc2_apb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data bsc2_apb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
bsc2_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock bsc2_clk = {$/;"	v	typeref:struct:peri_clock	file:
bsc2_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock bsc2_clk = {$/;"	v	typeref:struct:peri_clock	file:
bsc2_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data bsc2_data = {$/;"	v	typeref:struct:peri_clk_data	file:
bsc2_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data bsc2_data = {$/;"	v	typeref:struct:peri_clk_data	file:
bsc3_apb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock bsc3_apb_clk = {$/;"	v	typeref:struct:bus_clock	file:
bsc3_apb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock bsc3_apb_clk = {$/;"	v	typeref:struct:bus_clock	file:
bsc3_apb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data bsc3_apb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
bsc3_apb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data bsc3_apb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
bsc3_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock bsc3_clk = {$/;"	v	typeref:struct:peri_clock	file:
bsc3_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock bsc3_clk = {$/;"	v	typeref:struct:peri_clock	file:
bsc3_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data bsc3_data = {$/;"	v	typeref:struct:peri_clk_data	file:
bsc3_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data bsc3_data = {$/;"	v	typeref:struct:peri_clk_data	file:
bsc_init	board/ms7722se/lowlevel_init.S	/^bsc_init:$/;"	l
bsc_init	board/renesas/MigoR/lowlevel_init.S	/^bsc_init:$/;"	l
bsc_init	board/renesas/sh7763rdp/lowlevel_init.S	/^bsc_init:$/;"	l
bsel_str	arch/arm/mach-socfpga/misc.c	/^} bsel_str[] = {$/;"	v	typeref:struct:__anon0d396cd60108[]
bsmcr	include/andestech/andes_pcu.h	/^	unsigned int	bsmcr;		\/* 0x80 - BSM Controrl *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
bsmst	include/andestech/andes_pcu.h	/^	unsigned int	bsmst;		\/* 0x84 - BSM Status *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
bsp_arg	arch/x86/include/asm/mp.h	/^	void *bsp_arg;$/;"	m	struct:mp_flight_record	typeref:typename:void *
bsp_call	arch/x86/include/asm/mp.h	/^	mp_callback_t bsp_call;$/;"	m	struct:mp_flight_record	typeref:typename:mp_callback_t
bsp_do_flight_plan	arch/x86/cpu/mp_init.c	/^static int bsp_do_flight_plan(struct udevice *cpu, struct mp_params *mp_params)$/;"	f	typeref:typename:int	file:
bsp_init_before_ap_bringup	arch/x86/cpu/broadwell/cpu.c	/^static int bsp_init_before_ap_bringup(struct udevice *dev)$/;"	f	typeref:typename:int	file:
bsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	bsr;		\/* 0x74 Select B Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
bsr	include/linux/immap_qe.h	/^	u32 bsr;$/;"	m	struct:rsp	typeref:typename:u32
bsrr	drivers/gpio/stm32_gpio.c	/^	u32 bsrr;	\/* GPIO port bit set\/reset *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
bss_begin	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t bss_begin;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
bss_end	arch/sh/cpu/u-boot.lds	/^	PROVIDE (bss_end = .);$/;"	s	assignment:provide
bss_end	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t bss_end;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
bss_end	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (bss_end = .);$/;"	s
bss_end	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (bss_end = .);$/;"	s
bss_end	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (bss_end = .);$/;"	s
bss_start	arch/sh/cpu/u-boot.lds	/^	PROVIDE (bss_start = .);$/;"	s	assignment:provide
bss_start	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (bss_start = .);$/;"	s	assignment:provide
bss_start	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (bss_start = .);$/;"	s	assignment:provide
bss_start	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (bss_start = .);$/;"	s	assignment:provide
bss_storage	tools/easylogo/easylogo.c	/^static bool bss_storage = false;$/;"	v	typeref:typename:bool	file:
bstamp_wss_data	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 bstamp_wss_data;			\/* 0x4C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
bstlen	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 bstlen;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
bstopre	include/fsl_ddr_sdram.h	/^	unsigned int bstopre;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
bstr_print	disk/part_amiga.c	/^static void bstr_print(char *string)$/;"	f	typeref:typename:void	file:
bstrar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	bstrar;		\/* Boot space translation attributes *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
bstrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	bstrh;		\/* Boot space translation high *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
bstrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	bstrl;		\/* Boot space translation Low *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
bsts	drivers/i2c/i2c-uniphier.c	/^	u32 bsts;			\/* bus status monitor *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
bswcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 bswcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
bt_dev_wake_awake	arch/arm/dts/rk3288-veyron.dtsi	/^		bt_dev_wake_awake: bt-dev-wake-awake {$/;"	l
bt_dev_wake_sleep	arch/arm/dts/rk3288-veyron.dtsi	/^		bt_dev_wake_sleep: bt-dev-wake-sleep {$/;"	l
bt_enable_l	arch/arm/dts/rk3288-veyron.dtsi	/^		bt_enable_l: bt-enable-l {$/;"	l
bt_regulator	arch/arm/dts/rk3288-veyron.dtsi	/^	bt_regulator: bt-regulator {$/;"	l
bt_sysclk	board/nokia/rx51/tag_omap.h	/^	u8 bt_sysclk;$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8
bt_uart	board/nokia/rx51/tag_omap.h	/^	u8 bt_uart;$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8
bt_wakeup_gpio	board/nokia/rx51/tag_omap.h	/^	u8 bt_wakeup_gpio;$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8
bta	arch/arc/include/asm/ptrace.h	/^	long bta;$/;"	m	struct:pt_regs	typeref:typename:long
bta_timeout	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			bta_timeout;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
btn_dialog	scripts/kconfig/nconf.gui.c	/^int btn_dialog(WINDOW *main_window, const char *msg, int btn_num, ...)$/;"	f	typeref:typename:int
btr0	include/sja1000.h	/^	u8 btr0;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
btr1	include/sja1000.h	/^	u8 btr1;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
bu	fs/ubifs/ubifs.h	/^	struct bu_info bu;$/;"	m	struct:ubifs_info	typeref:struct:bu_info
bu_info	fs/ubifs/ubifs.h	/^struct bu_info {$/;"	s
bu_init	fs/ubifs/super.c	/^static void bu_init(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
bu_mutex	fs/ubifs/ubifs.h	/^	struct mutex bu_mutex;$/;"	m	struct:ubifs_info	typeref:struct:mutex
buck1_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck1_reg: BUCK1 {$/;"	l
buck1_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck1_reg: BUCK1 {$/;"	l
buck1_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			buck1_reg: BUCK1 {$/;"	l
buck1_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck1_reg: BUCK1 {$/;"	l	label:max77686
buck1_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck1_reg: BUCK1 {$/;"	l
buck2	arch/sandbox/dts/sandbox_pmic.dtsi	/^	buck2: buck2 {$/;"	l
buck2_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck2_reg: BUCK2 {$/;"	l
buck2_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck2_reg: BUCK2 {$/;"	l
buck2_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			buck2_reg: BUCK2 {$/;"	l
buck2_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck2_reg: BUCK2 {$/;"	l	label:max77686
buck2_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck2_reg: BUCK2 {$/;"	l
buck3_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck3_reg: BUCK3 {$/;"	l
buck3_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck3_reg: BUCK3 {$/;"	l
buck3_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			buck3_reg: BUCK3 {$/;"	l
buck3_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck3_reg: BUCK3 {$/;"	l	label:max77686
buck3_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck3_reg: BUCK3 {$/;"	l
buck4_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck4_reg: BUCK4 {$/;"	l
buck4_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck4_reg: BUCK4 {$/;"	l
buck4_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			buck4_reg: BUCK4 {$/;"	l
buck4_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck4_reg: BUCK4 {$/;"	l	label:max77686
buck4_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck4_reg: BUCK4 {$/;"	l
buck5_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck5_reg: BUCK5 {$/;"	l
buck5_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck5_reg: BUCK5 {$/;"	l
buck5_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			buck5_reg: BUCK5 {$/;"	l
buck5_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck5_reg: BUCK5 {$/;"	l	label:max77686
buck5_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck5_reg: BUCK5 {$/;"	l
buck6_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck6_reg: BUCK6 {$/;"	l
buck6_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck6_reg: BUCK6 {$/;"	l
buck6_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck6_reg: BUCK6 {$/;"	l	label:max77686
buck6_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck6_reg: BUCK6 {$/;"	l
buck7_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck7_reg: BUCK7 {$/;"	l
buck7_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck7_reg: BUCK7 {$/;"	l
buck7_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck7_reg: BUCK7 {$/;"	l	label:max77686
buck8_reg	arch/arm/dts/exynos4412-odroid.dts	/^				buck8_reg: BUCK8 {$/;"	l
buck8_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck8_reg: BUCK8 {$/;"	l
buck8_reg	arch/arm/dts/exynos5250-snow.dts	/^			buck8_reg: BUCK8 {$/;"	l	label:max77686
buck9_reg	arch/arm/dts/exynos4412-trats2.dts	/^				buck9_reg: BUCK9 {$/;"	l
buck9_reg	arch/arm/dts/exynos5250-spring.dts	/^			buck9_reg: BUCK9 {$/;"	l
buck_current_range	drivers/power/regulator/sandbox.c	/^static struct output_range buck_current_range[] = {$/;"	v	typeref:struct:output_range[]	file:
buck_get_current	drivers/power/regulator/sandbox.c	/^static int buck_get_current(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_get_enable	drivers/power/regulator/lp873x_regulator.c	/^static bool buck_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
buck_get_enable	drivers/power/regulator/max77686.c	/^static bool buck_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
buck_get_enable	drivers/power/regulator/rk808.c	/^static bool buck_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
buck_get_enable	drivers/power/regulator/s5m8767.c	/^static bool buck_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
buck_get_enable	drivers/power/regulator/sandbox.c	/^static bool buck_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
buck_get_mode	drivers/power/regulator/max77686.c	/^static int buck_get_mode(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_get_value	drivers/power/regulator/lp873x_regulator.c	/^static int buck_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_get_value	drivers/power/regulator/max77686.c	/^static int buck_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_get_value	drivers/power/regulator/rk808.c	/^static int buck_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_get_value	drivers/power/regulator/s5m8767.c	/^static int buck_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_get_voltage	drivers/power/regulator/sandbox.c	/^static int buck_get_voltage(struct udevice *dev)$/;"	f	typeref:typename:int	file:
buck_param	drivers/power/regulator/s5m8767.c	/^static const struct s5m8767_para buck_param[] = {$/;"	v	typeref:typename:const struct s5m8767_para[]	file:
buck_set_current	drivers/power/regulator/sandbox.c	/^static int buck_set_current(struct udevice *dev, int uA)$/;"	f	typeref:typename:int	file:
buck_set_enable	drivers/power/regulator/lp873x_regulator.c	/^static int buck_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
buck_set_enable	drivers/power/regulator/max77686.c	/^static int buck_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
buck_set_enable	drivers/power/regulator/rk808.c	/^static int buck_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
buck_set_enable	drivers/power/regulator/s5m8767.c	/^static int buck_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
buck_set_enable	drivers/power/regulator/sandbox.c	/^static int buck_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
buck_set_mode	drivers/power/regulator/max77686.c	/^static int buck_set_mode(struct udevice *dev, int mode)$/;"	f	typeref:typename:int	file:
buck_set_value	drivers/power/regulator/lp873x_regulator.c	/^static int buck_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
buck_set_value	drivers/power/regulator/max77686.c	/^static int buck_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
buck_set_value	drivers/power/regulator/rk808.c	/^static int buck_set_value(struct udevice *dev, int uvolt)$/;"	f	typeref:typename:int	file:
buck_set_value	drivers/power/regulator/s5m8767.c	/^static int buck_set_value(struct udevice *dev, int uv)$/;"	f	typeref:typename:int	file:
buck_set_voltage	drivers/power/regulator/sandbox.c	/^static int buck_set_voltage(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
buck_v1	drivers/power/regulator/s5m8767.c	/^static const struct sec_voltage_desc buck_v1 = {$/;"	v	typeref:typename:const struct sec_voltage_desc	file:
buck_v2	drivers/power/regulator/s5m8767.c	/^static const struct sec_voltage_desc buck_v2 = {$/;"	v	typeref:typename:const struct sec_voltage_desc	file:
buck_v3	drivers/power/regulator/s5m8767.c	/^static const struct sec_voltage_desc buck_v3 = {$/;"	v	typeref:typename:const struct sec_voltage_desc	file:
buck_voltage_range	drivers/power/regulator/sandbox.c	/^static struct output_range buck_voltage_range[] = {$/;"	v	typeref:struct:output_range[]	file:
bucket_finder	fs/yaffs2/yaffs_guts.h	/^	u32 bucket_finder;$/;"	m	struct:yaffs_dev	typeref:typename:u32
bud	fs/ubifs/replay.c	/^	struct ubifs_bud *bud;$/;"	m	struct:bud_entry	typeref:struct:ubifs_bud *	file:
bud_bytes	fs/ubifs/ubifs.h	/^	long long bud_bytes;$/;"	m	struct:ubifs_info	typeref:typename:long long
bud_entry	fs/ubifs/replay.c	/^struct bud_entry {$/;"	s	file:
bud_wbuf_callback	fs/ubifs/super.c	/^static int bud_wbuf_callback(struct ubifs_info *c, int lnum, int free, int pad)$/;"	f	typeref:typename:int	file:
buds	fs/ubifs/ubifs.h	/^	struct rb_root buds;$/;"	m	struct:ubifs_info	typeref:struct:rb_root
buds_list	fs/ubifs/ubifs.h	/^	struct list_head buds_list;$/;"	m	struct:ubifs_jhead	typeref:struct:list_head
buds_lock	fs/ubifs/ubifs.h	/^	spinlock_t buds_lock;$/;"	m	struct:ubifs_info	typeref:typename:spinlock_t
buf	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short buf;             \/* 0x94 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
buf	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short buf;	\/* 0x14 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
buf	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short buf;		\/* 0x94 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
buf	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short buf;		\/* 0x94 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
buf	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u8 *buf;$/;"	m	struct:i2c_trans_info	typeref:typename:u8 *
buf	arch/sh/include/asm/cache.h	/^struct __large_struct { unsigned long buf[100]; };$/;"	m	struct:__large_struct	typeref:typename:unsigned long[100]
buf	board/gdsys/common/osd.c	/^u16 *buf;$/;"	v	typeref:typename:u16 *
buf	cmd/log.c	/^static char buf[1024];$/;"	v	typeref:typename:char[1024]	file:
buf	common/spl/spl_ymodem.c	/^	char *buf;$/;"	m	struct:ymodem_fit_info	typeref:typename:char *	file:
buf	drivers/i2c/adi_i2c.c	/^	u8 *buf;		\/* pointer to msg data *\/$/;"	m	struct:adi_i2c_msg	typeref:typename:u8 *	file:
buf	drivers/i2c/kona_i2c.c	/^	uint8_t *buf;$/;"	m	struct:kona_i2c_msg	typeref:typename:uint8_t *	file:
buf	drivers/mtd/nand/denali.h	/^	struct nand_buf buf;$/;"	m	struct:denali_nand_info	typeref:struct:nand_buf
buf	drivers/mtd/nand/denali.h	/^	uint8_t buf[DENALI_BUF_SIZE];$/;"	m	struct:nand_buf	typeref:typename:uint8_t[]
buf	drivers/net/dc2114x.c	/^	u32 buf;$/;"	m	struct:de4x5_desc	typeref:typename:u32	file:
buf	drivers/spi/davinci_spi.c	/^	dv_reg	buf;		\/* 0x40 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
buf	drivers/spi/pic32_spi.c	/^	struct pic32_reg_atomic buf;$/;"	m	struct:pic32_reg_spi	typeref:struct:pic32_reg_atomic	file:
buf	drivers/usb/dwc3/core.h	/^	void			*buf;$/;"	m	struct:dwc3_event_buffer	typeref:typename:void *
buf	drivers/usb/gadget/rndis.h	/^	u8			*buf;$/;"	m	struct:rndis_resp_t	typeref:typename:u8 *
buf	drivers/usb/gadget/storage_common.c	/^	char				buf[FSG_BUFLEN];$/;"	m	struct:fsg_buffhd	typeref:typename:char[]	file:
buf	examples/api/demo.c	/^static char buf[BUF_SZ];$/;"	v	typeref:typename:char[]	file:
buf	fs/ext4/ext4_journal.h	/^	char *buf;$/;"	m	struct:dirty_blocks	typeref:typename:char *
buf	fs/ext4/ext4_journal.h	/^	char *buf;$/;"	m	struct:journal_log	typeref:typename:char *
buf	fs/ubifs/ubifs.h	/^	void *buf;$/;"	m	struct:bu_info	typeref:typename:void *
buf	fs/ubifs/ubifs.h	/^	void *buf;$/;"	m	struct:ubifs_scan_leb	typeref:typename:void *
buf	fs/ubifs/ubifs.h	/^	void *buf;$/;"	m	struct:ubifs_wbuf	typeref:typename:void *
buf	include/ec_commands.h	/^	uint8_t buf[32];$/;"	m	struct:ec_params_test_protocol	typeref:typename:uint8_t[32]
buf	include/ec_commands.h	/^	uint8_t buf[32];$/;"	m	struct:ec_response_test_protocol	typeref:typename:uint8_t[32]
buf	include/eeprom_field.h	/^	unsigned char *buf;$/;"	m	struct:eeprom_field	typeref:typename:unsigned char *
buf	include/i2c.h	/^	u8 *buf;$/;"	m	struct:i2c_msg	typeref:typename:u8 *
buf	include/linux/usb/gadget.h	/^	void			*buf;$/;"	m	struct:usb_request	typeref:typename:void *
buf	include/logbuff.h	/^	unsigned char	buf[0];$/;"	m	struct:__anon50fce6f30108	typeref:typename:unsigned char[0]
buf	include/power/pmic.h	/^	unsigned char *buf;$/;"	m	struct:p_i2c	typeref:typename:unsigned char *
buf	include/tpm.h	/^	u8 buf[TPM_DEV_BUFSIZE + sizeof(u8)];  \/* Max buffer size + addr *\/$/;"	m	struct:tpm_chip_priv	typeref:typename:u8[]
buf	include/u-boot/md5.h	/^	__u32 buf[4];$/;"	m	struct:MD5Context	typeref:typename:__u32[4]
buf	lib/bzip2/bzlib.c	/^      Char      buf[BZ_MAX_UNUSED];$/;"	m	struct:__anonb9ba2b050108	typeref:typename:Char[]	file:
buf	lib/lzma/LzmaDec.h	/^  const Byte *buf;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:const Byte *
buf	lib/lzma/Types.h	/^  Byte buf[LookToRead_BUF_SIZE];$/;"	m	struct:__anonf2a2f1b90808	typeref:typename:Byte[]
buf	scripts/kconfig/lxdialog/textbox.c	/^static char *buf;$/;"	v	typeref:typename:char *	file:
buf0cr	drivers/spi/fsl_qspi.h	/^	u32 buf0cr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
buf0ind	drivers/spi/fsl_qspi.h	/^	u32 buf0ind;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
buf1_addr	drivers/net/calxedaxgmac.c	/^	__le32 buf1_addr;		\/* Buffer 1 Address Pointer *\/$/;"	m	struct:xgmac_dma_desc	typeref:typename:__le32	file:
buf1cr	drivers/spi/fsl_qspi.h	/^	u32 buf1cr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
buf1ind	drivers/spi/fsl_qspi.h	/^	u32 buf1ind;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
buf2_addr	drivers/net/calxedaxgmac.c	/^	__le32 buf2_addr;		\/* Buffer 2 Address Pointer *\/$/;"	m	struct:xgmac_dma_desc	typeref:typename:__le32	file:
buf2cr	drivers/spi/fsl_qspi.h	/^	u32 buf2cr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
buf2ind	drivers/spi/fsl_qspi.h	/^	u32 buf2ind;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
buf3cr	drivers/spi/fsl_qspi.h	/^	u32 buf3cr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
bufN	lib/bzip2/bzlib.c	/^      Int32     bufN;$/;"	m	struct:__anonb9ba2b050108	typeref:typename:Int32	file:
buf_Haddr	drivers/net/rtl8169.c	/^	u32 buf_Haddr;$/;"	m	struct:RxDesc	typeref:typename:u32	file:
buf_Haddr	drivers/net/rtl8169.c	/^	u32 buf_Haddr;$/;"	m	struct:TxDesc	typeref:typename:u32	file:
buf_addr	drivers/mtd/nand/mxc_nand.h	/^	u16 buf_addr;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
buf_addr	drivers/net/rtl8169.c	/^	u32 buf_addr;$/;"	m	struct:RxDesc	typeref:typename:u32	file:
buf_addr	drivers/net/rtl8169.c	/^	u32 buf_addr;$/;"	m	struct:TxDesc	typeref:typename:u32	file:
buf_addr	drivers/net/sun8i_emac.c	/^	u32 buf_addr;$/;"	m	struct:emac_dma_desc	typeref:typename:u32	file:
buf_align	include/linux/fb.h	/^	u32 buf_align;		\/* byte alignment of each bitmap	*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
buf_amount	include/linux/mtd/samsung_onenand.h	/^	unsigned int	buf_amount;	\/* 0x00B0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
buf_cookie	drivers/net/mvneta.c	/^	u32  buf_cookie;	\/* cookie for access to RX buffer in rx path *\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u32	file:
buf_cookie	drivers/net/mvpp2.c	/^	u32 buf_cookie;		\/* cookie for access to RX buffer in rx path *\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u32	file:
buf_cookie	drivers/net/mvpp2.c	/^	u32 buf_cookie;		\/* cookie for access to TX buffer in tx path *\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u32	file:
buf_count	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		buf_count;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
buf_data	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	buf_data[16];$/;"	m	struct:rk3288_edp	typeref:typename:u32[16]
buf_data	drivers/mtd/nand/arasan_nfc.c	/^static u8 buf_data[READ_BUFF_SIZE];$/;"	v	typeref:typename:u8[]	file:
buf_data0	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	buf_data0;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
buf_data_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	buf_data_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
buf_dataport	drivers/mtd/nand/arasan_nfc.c	/^	u32 buf_dataport;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
buf_dump	drivers/mtd/ubi/crc32.c	/^buf_dump(char const *prefix, unsigned char const *buf, size_t len)$/;"	f	typeref:typename:void	file:
buf_free	lib/circbuf.c	/^int buf_free (circbuf_t * buf)$/;"	f	typeref:typename:int
buf_index	drivers/mtd/nand/arasan_nfc.c	/^static u32 buf_index;$/;"	v	typeref:typename:u32	file:
buf_init	lib/circbuf.c	/^int buf_init (circbuf_t * buf, unsigned int size)$/;"	f	typeref:typename:int
buf_layout	include/fsl-mc/fsl_mc_private.h	/^	struct dpni_buffer_layout buf_layout;$/;"	m	struct:fsl_dpni_obj	typeref:struct:dpni_buffer_layout
buf_len	drivers/net/xilinx_ll_temac_sdma.h	/^	u32 buf_len;			\/* Buffer Length *\/$/;"	m	struct:cdmac_bd	typeref:typename:u32
buf_len	fs/ubifs/ubifs.h	/^	int buf_len;$/;"	m	struct:bu_info	typeref:typename:int
buf_length	drivers/net/pcnet.c	/^	s16 buf_length;$/;"	m	struct:pcnet_rx_head	typeref:typename:s16	file:
buf_mem_type	disk/part_amiga.h	/^    u32 buf_mem_type;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
buf_mutex	drivers/mtd/ubi/ubi.h	/^	struct mutex buf_mutex;$/;"	m	struct:ubi_device	typeref:struct:mutex
buf_num	drivers/net/mvpp2.c	/^	int buf_num;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:int	file:
buf_offset	drivers/mtd/nand/vf610_nfc.c	/^	uint buf_offset;$/;"	m	struct:vf610_nfc	typeref:typename:uint	file:
buf_phys_addr	drivers/net/mvneta.c	/^	u32  buf_phys_addr;	\/* Physical addr of transmitted buffer	*\/$/;"	m	struct:mvneta_tx_desc	typeref:typename:u32	file:
buf_phys_addr	drivers/net/mvneta.c	/^	u32  buf_phys_addr;	\/* Physical address of the buffer	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u32	file:
buf_phys_addr	drivers/net/mvpp2.c	/^	u32 buf_phys_addr;	\/* physical addr of transmitted buffer	*\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u32	file:
buf_phys_addr	drivers/net/mvpp2.c	/^	u32 buf_phys_addr;	\/* physical address of the buffer	*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u32	file:
buf_pool	drivers/net/uli526x.c	/^static char buf_pool[TX_BUF_ALLOC * TX_DESC_CNT + 4];$/;"	v	typeref:typename:char[]	file:
buf_pool_dma_ptr	drivers/net/uli526x.c	/^	dma_addr_t buf_pool_dma_ptr;	\/* Tx buffer pool memory *\/$/;"	m	struct:uli526x_board_info	typeref:typename:dma_addr_t	file:
buf_pool_dma_start	drivers/net/uli526x.c	/^	dma_addr_t buf_pool_dma_start;	\/* Tx buffer pool align dword *\/$/;"	m	struct:uli526x_board_info	typeref:typename:dma_addr_t	file:
buf_pool_ptr	drivers/net/uli526x.c	/^	unsigned char *buf_pool_ptr;	\/* Tx buffer pool memory *\/$/;"	m	struct:uli526x_board_info	typeref:typename:unsigned char *	file:
buf_pool_start	drivers/net/uli526x.c	/^	unsigned char *buf_pool_start;	\/* Tx buffer pool align dword *\/$/;"	m	struct:uli526x_board_info	typeref:typename:unsigned char *	file:
buf_pop	lib/circbuf.c	/^int buf_pop (circbuf_t * buf, char *dest, unsigned int len)$/;"	f	typeref:typename:int
buf_ptr	drivers/net/armada100_fec.h	/^	u8 *buf_ptr;		\/* Descriptor buffer pointer *\/$/;"	m	struct:rx_desc	typeref:typename:u8 *
buf_ptr	drivers/net/armada100_fec.h	/^	u8 *buf_ptr;		\/* pointer to buffer for this descriptor *\/$/;"	m	struct:tx_desc	typeref:typename:u8 *
buf_ptr	drivers/net/mvgbe.h	/^	u8 *buf_ptr;		\/* Descriptor buffer pointer *\/$/;"	m	struct:mvgbe_rxdesc	typeref:typename:u8 *
buf_ptr	drivers/net/mvgbe.h	/^	u8 *buf_ptr;		\/* Descriptor buffer ptr *\/$/;"	m	struct:mvgbe_txdesc	typeref:typename:u8 *
buf_ptr_hi	drivers/net/fm/fm.h	/^	u16 buf_ptr_hi;$/;"	m	struct:fm_port_bd	typeref:typename:u16
buf_ptr_lo	drivers/net/fm/fm.h	/^	u32 buf_ptr_lo;$/;"	m	struct:fm_port_bd	typeref:typename:u32
buf_push	lib/circbuf.c	/^int buf_push (circbuf_t * buf, const char *src, unsigned int len)$/;"	f	typeref:typename:int
buf_size	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 buf_size;$/;"	m	struct:bcm2835_mbox_hdr	typeref:typename:u32
buf_size	drivers/mtd/nand/mxc_nand.h	/^	u16 buf_size;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
buf_size	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		buf_size;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
buf_size	drivers/net/armada100_fec.h	/^	u16 buf_size;		\/* Buffer size *\/$/;"	m	struct:rx_desc	typeref:typename:u16
buf_size	drivers/net/calxedaxgmac.c	/^	__le32 buf_size;$/;"	m	struct:xgmac_dma_desc	typeref:typename:__le32	file:
buf_size	drivers/net/mvgbe.h	/^	u16 buf_size;		\/* Buffer size *\/$/;"	m	struct:mvgbe_rxdesc	typeref:typename:u16
buf_size	drivers/net/mvpp2.c	/^	int buf_size;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:int	file:
buf_size	include/ata.h	/^	unsigned short	buf_size;	\/* 512 byte increments; 0 = not_specified *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
buf_start	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		buf_start;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
buf_stride	arch/arm/include/asm/arch-tegra/dc.h	/^	uint buf_stride;		\/* _WIN_BUF_STRIDE_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
buf_type	include/ata.h	/^	unsigned short	buf_type;$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
buf_write_timeout_max	include/mtd/cfi_flash.h	/^	u8	buf_write_timeout_max;$/;"	m	struct:cfi_qry	typeref:typename:u8
buf_write_timeout_typ	include/mtd/cfi_flash.h	/^	u8	buf_write_timeout_typ;$/;"	m	struct:cfi_qry	typeref:typename:u8
buff	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u8 buff[32768]; \/* controller's serial data buffer *\/$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u8[32768]	file:
buff	drivers/usb/emul/sandbox_flash.c	/^	u8 buff[512];$/;"	m	struct:sandbox_flash_priv	typeref:typename:u8[512]	file:
buff_full	board/mpl/pati/pati.c	/^int buff_full=0;$/;"	v	typeref:typename:int
buff_len	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	buff_len;$/;"	m	struct:rx_buff_desc	typeref:typename:u32
buff_len	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 buff_len;$/;"	m	struct:qm_host_desc	typeref:typename:u32
buff_off_len	drivers/net/davinci_emac.h	/^	u_int32_t	buff_off_len;	\/* Buffer Offset(MSW) and Length(LSW) *\/$/;"	m	struct:_emac_desc	typeref:typename:u_int32_t
buff_ptr	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 buff_ptr;$/;"	m	struct:qm_host_desc	typeref:typename:u32
buff_ptr	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u8	*buff_ptr;$/;"	m	struct:rx_buff_desc	typeref:typename:u8 *
buff_used	drivers/usb/emul/sandbox_flash.c	/^	int buff_used;$/;"	m	struct:sandbox_flash_priv	typeref:typename:int	file:
buffer	arch/arm/include/asm/imx-common/dma.h	/^	void			*buffer;$/;"	m	struct:mxs_dma_desc	typeref:typename:void *
buffer	arch/powerpc/include/asm/immap_512x.h	/^	} buffer;$/;"	m	struct:psc512x	typeref:union:psc512x::__anond569131d020a
buffer	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long buffer;	\/* pointer to data buffer (LE) *\/$/;"	m	struct:__anon66fd0d690108	typeref:typename:unsigned long
buffer	board/mpl/common/usb_uhci.h	/^	unsigned long buffer;   \/* pointer to data buffer (LE) *\/$/;"	m	struct:__anon0a2b4c740108	typeref:typename:unsigned long
buffer	cmd/ubi.c	/^static char buffer[80];$/;"	v	typeref:typename:char[80]	file:
buffer	drivers/gpio/74x164_gpio.c	/^	u8 *buffer;$/;"	m	struct:gen_74x164_priv	typeref:typename:u8 *	file:
buffer	drivers/net/davinci_emac.h	/^	u_int8_t	*buffer;	\/* Pointer to data buffer *\/$/;"	m	struct:_emac_desc	typeref:typename:u_int8_t *
buffer	drivers/usb/host/ehci.h	/^		void *buffer;$/;"	m	union:QH::__anond2a9fae8010a	typeref:typename:void *
buffer	drivers/usb/host/xhci.h	/^	__le64	buffer;$/;"	m	struct:xhci_transfer_event	typeref:typename:__le64
buffer	fs/yaffs2/yaffs_guts.h	/^	u8 *buffer;$/;"	m	struct:yaffs_buffer	typeref:typename:u8 *
buffer	include/mpc5xxx.h	/^	} buffer;$/;"	m	struct:mpc5xxx_psc	typeref:union:mpc5xxx_psc::__anon151a8a6b020a
buffer	include/u-boot/sha1.h	/^    unsigned char buffer[64];	\/*!< data block being processed *\/$/;"	m	struct:__anoncf962b200108	typeref:typename:unsigned char[64]
buffer	include/u-boot/sha256.h	/^	uint8_t buffer[64];$/;"	m	struct:__anon0de293ec0108	typeref:typename:uint8_t[64]
buffer	include/usbdevice.h	/^	u8* buffer;$/;"	m	struct:urb	typeref:typename:u8 *
buffer	scripts/kconfig/zconf.lex.c	/^struct buffer {$/;"	s	file:
buffer	tools/socfpgaimage.c	/^static uint8_t buffer[PADDED_SIZE];$/;"	v	typeref:typename:uint8_t[]	file:
buffer_16	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	buffer_16;$/;"	m	union:psc512x::__anond569131d020a	typeref:typename:volatile u16
buffer_16	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	buffer_16;$/;"	m	union:psc512x::__anond569131d050a	typeref:typename:volatile u16
buffer_16	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	buffer_16;$/;"	m	union:psc512x::__anond569131d060a	typeref:typename:volatile u16
buffer_16	include/mpc5xxx.h	/^		volatile u16	buffer_16;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b020a	typeref:typename:volatile u16
buffer_32	arch/powerpc/include/asm/immap_512x.h	/^		volatile u32	buffer_32;$/;"	m	union:psc512x::__anond569131d020a	typeref:typename:volatile u32
buffer_32	arch/powerpc/include/asm/immap_512x.h	/^		volatile u32	buffer_32;$/;"	m	union:psc512x::__anond569131d050a	typeref:typename:volatile u32
buffer_32	arch/powerpc/include/asm/immap_512x.h	/^		volatile u32	buffer_32;$/;"	m	union:psc512x::__anond569131d060a	typeref:typename:volatile u32
buffer_32	include/mpc5xxx.h	/^		volatile u32	buffer_32;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b020a	typeref:typename:volatile u32
buffer_8	arch/powerpc/include/asm/immap_512x.h	/^		volatile u8	buffer_8;$/;"	m	union:psc512x::__anond569131d020a	typeref:typename:volatile u8
buffer_8	arch/powerpc/include/asm/immap_512x.h	/^		volatile u8	buffer_8;$/;"	m	union:psc512x::__anond569131d050a	typeref:typename:volatile u8
buffer_8	arch/powerpc/include/asm/immap_512x.h	/^		volatile u8	buffer_8;$/;"	m	union:psc512x::__anond569131d060a	typeref:typename:volatile u8
buffer_8	include/mpc5xxx.h	/^		volatile u8	buffer_8;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b020a	typeref:typename:volatile u8
buffer_access	drivers/mmc/mxcmmc.c	/^	u32 buffer_access;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
buffer_addr	drivers/net/e1000.h	/^	uint64_t buffer_addr;	\/* Address of the descriptor's buffer address *\/$/;"	m	struct:e1000_data_desc	typeref:typename:uint64_t
buffer_addr	drivers/net/e1000.h	/^	uint64_t buffer_addr;	\/* Address of the descriptor's data buffer *\/$/;"	m	struct:e1000_rx_desc	typeref:typename:uint64_t
buffer_addr	drivers/net/e1000.h	/^	uint64_t buffer_addr;	\/* Address of the descriptor's data buffer *\/$/;"	m	struct:e1000_tx_desc	typeref:typename:uint64_t
buffer_addr	drivers/net/pch_gbe.h	/^	u32 buffer_addr;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u32
buffer_addr	drivers/net/pch_gbe.h	/^	u32 buffer_addr;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u32
buffer_addr_mode	arch/arm/include/asm/arch-tegra/dc.h	/^	uint buffer_addr_mode;		\/* _WIN_BUFFER_ADDR_MODE_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
buffer_body	drivers/misc/cbmem_console.c	/^	u8  buffer_body[0];$/;"	m	struct:cbmem_console	typeref:typename:u8[0]	file:
buffer_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint buffer_ctrl;		\/* _WIN_BUFFER_CONTROL_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
buffer_cursor	drivers/misc/cbmem_console.c	/^	u32 buffer_cursor;$/;"	m	struct:cbmem_console	typeref:typename:u32	file:
buffer_data	include/usbdevice.h	/^	u16 buffer_data[URB_BUF_SIZE];	\/* data received (OUT) or being sent (IN) *\/$/;"	m	struct:urb	typeref:typename:u16[]
buffer_data_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	buffer_data_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
buffer_depth	arch/x86/include/asm/me_common.h	/^	u32 buffer_depth:8;$/;"	m	struct:mei_csr	typeref:typename:u32:8
buffer_descriptor	drivers/qe/uec.h	/^typedef struct buffer_descriptor {$/;"	s
buffer_id	board/micronas/vct/scc.h	/^		u32 buffer_id:8;	\/* DMA Buffer Identifier	*\/$/;"	m	struct:scc_dma_cfg::__anon903167320208	typeref:typename:u32:8
buffer_length	include/usbdevice.h	/^	unsigned int buffer_length;$/;"	m	struct:urb	typeref:typename:unsigned int
buffer_list_0	board/micronas/vct/scc.c	/^static u32 buffer_list_0[] = { 6, 120, 121, 122, 123, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_1	board/micronas/vct/scc.c	/^static u32 buffer_list_1[] = { 6, 120, 121, 122, 123, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_10	board/micronas/vct/scc.c	/^static u32 buffer_list_10[] = { 5, 124, 125, 126, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_11	board/micronas/vct/scc.c	/^static u32 buffer_list_11[] = { 5, 124, 125, 126, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_12	board/micronas/vct/scc.c	/^static u32 buffer_list_12[] = { 6, 132, 133, 134, 135, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_13	board/micronas/vct/scc.c	/^static u32 buffer_list_13[] = { 6, 132, 133, 134, 135, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_14	board/micronas/vct/scc.c	/^static u32 buffer_list_14[] = { 4, 137, 138, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_15	board/micronas/vct/scc.c	/^static u32 buffer_list_15[] = { 6, 136, 136, 137, 138, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_16	board/micronas/vct/scc.c	/^static u32 buffer_list_16[] = { 6, 106, 108, 109, 107, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_17	board/micronas/vct/scc.c	/^static u32 buffer_list_17[] = { 6, 106, 110, 107, 111, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_18	board/micronas/vct/scc.c	/^static u32 buffer_list_18[] = { 6, 106, 113, 107, 114, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_19	board/micronas/vct/scc.c	/^static u32 buffer_list_19[] = { 3, 112, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_2	board/micronas/vct/scc.c	/^static u32 buffer_list_2[] = { 5, 124, 125, 126, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_20	board/micronas/vct/scc.c	/^static u32 buffer_list_20[] = { 35, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_21	board/micronas/vct/scc.c	/^static u32 buffer_list_21[] = { 27, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_22	board/micronas/vct/scc.c	/^static u32 buffer_list_22[] = { 81, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_23	board/micronas/vct/scc.c	/^static u32 buffer_list_23[] = { 29, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_24	board/micronas/vct/scc.c	/^static u32 buffer_list_24[] = { 6, 90, 91, 92, 93, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_25	board/micronas/vct/scc.c	/^static u32 buffer_list_25[] = { 18, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,$/;"	v	typeref:typename:u32[]	file:
buffer_list_26	board/micronas/vct/scc.c	/^static u32 buffer_list_26[] = { 5, 94, 95, 96, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_27	board/micronas/vct/scc.c	/^static u32 buffer_list_27[] = { 5, 97, 98, 99, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_28	board/micronas/vct/scc.c	/^static u32 buffer_list_28[] = { 5, 100, 101, 102, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_29	board/micronas/vct/scc.c	/^static u32 buffer_list_29[] = { 5, 103, 104, 105, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_3	board/micronas/vct/scc.c	/^static u32 buffer_list_3[] = { 5, 124, 125, 126, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_30	board/micronas/vct/scc.c	/^static u32 buffer_list_30[] = { 10, 108, 109, 110, 111, 113, 114, 116, 117,$/;"	v	typeref:typename:u32[]	file:
buffer_list_31	board/micronas/vct/scc.c	/^static u32 buffer_list_31[] = { 13, 106, 107, 108, 109, 110, 111, 113, 114,$/;"	v	typeref:typename:u32[]	file:
buffer_list_32	board/micronas/vct/scc.c	/^static u32 buffer_list_32[] = { 13, 106, 107, 108, 109, 110, 111, 113, 114,$/;"	v	typeref:typename:u32[]	file:
buffer_list_33	board/micronas/vct/scc.c	/^static u32 buffer_list_33[] = { 27, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_34	board/micronas/vct/scc.c	/^static u32 buffer_list_34[] = { 27, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_35	board/micronas/vct/scc.c	/^static u32 buffer_list_35[] = { 28, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_36	board/micronas/vct/scc.c	/^static u32 buffer_list_36[] = { 28, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_37	board/micronas/vct/scc.c	/^static u32 buffer_list_37[] = { 27, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_38	board/micronas/vct/scc.c	/^static u32 buffer_list_38[] = { 29, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_39	board/micronas/vct/scc.c	/^static u32 buffer_list_39[] = { 91, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,$/;"	v	typeref:typename:u32[]	file:
buffer_list_4	board/micronas/vct/scc.c	/^static u32 buffer_list_4[] = { 5, 124, 125, 126, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_40	board/micronas/vct/scc.c	/^static u32 buffer_list_40[] = { 0 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_5	board/micronas/vct/scc.c	/^static u32 buffer_list_5[] = { 3, 127, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_6	board/micronas/vct/scc.c	/^static u32 buffer_list_6[] = { 3, 127, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_7	board/micronas/vct/scc.c	/^static u32 buffer_list_7[] = { 6, 128, 129, 130, 131, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_8	board/micronas/vct/scc.c	/^static u32 buffer_list_8[] = { 6, 128, 129, 130, 131, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_list_9	board/micronas/vct/scc.c	/^static u32 buffer_list_9[] = { 5, 124, 125, 126, 139, 140 };$/;"	v	typeref:typename:u32[]	file:
buffer_loc	drivers/net/mvneta.c	/^static struct buffer_location buffer_loc;$/;"	v	typeref:struct:buffer_location	file:
buffer_loc	drivers/net/mvpp2.c	/^static struct buffer_location buffer_loc;$/;"	v	typeref:struct:buffer_location	file:
buffer_location	drivers/net/mvneta.c	/^struct buffer_location {$/;"	s	file:
buffer_location	drivers/net/mvpp2.c	/^struct buffer_location {$/;"	s	file:
buffer_map_state	drivers/usb/musb-new/musb_gadget.h	/^enum buffer_map_state {$/;"	g
buffer_ptr0	board/synopsys/axs10x/nand.c	/^	uint32_t buffer_ptr0;	\/* DES2 *\/$/;"	m	struct:nand_bd	typeref:typename:uint32_t	file:
buffer_ptr1	board/synopsys/axs10x/nand.c	/^	uint32_t buffer_ptr1;	\/* DES3 *\/$/;"	m	struct:nand_bd	typeref:typename:uint32_t	file:
buffer_read_ptr	arch/x86/include/asm/me_common.h	/^	u32 buffer_read_ptr:8;$/;"	m	struct:mei_csr	typeref:typename:u32:8
buffer_size	drivers/misc/cbmem_console.c	/^	u32 buffer_size;$/;"	m	struct:cbmem_console	typeref:typename:u32	file:
buffer_size	include/flash.h	/^	ushort	buffer_size;		\/* # of bytes in write buffer		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
buffer_size	include/fsl-mc/fsl_dpni.h	/^		uint16_t	buffer_size;$/;"	m	struct:dpni_pools_cfg::__anonf56ef98e0408	typeref:typename:uint16_t
buffer_surface_kind	arch/arm/include/asm/arch-tegra/dc.h	/^	uint buffer_surface_kind;	\/* DC_WIN_BUFFER_SURFACE_KIND *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
buffer_tag	board/micronas/vct/scc.h	/^	u32 buffer_tag:8;	\/* mem buf tag, assigned to this DMA	*\/$/;"	m	struct:scc_dma_state	typeref:typename:u32:8
buffer_tag_list	board/micronas/vct/scc.h	/^	u32 *buffer_tag_list;	\/* list of the buffer tags available	*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32 *
buffer_type	board/micronas/vct/scc.h	/^		u32 buffer_type:1;	\/* Defines type of mem buffers	*\/$/;"	m	struct:scc_dma_cfg::__anon903167320208	typeref:typename:u32:1
buffer_write_ptr	arch/x86/include/asm/me_common.h	/^	u32 buffer_write_ptr:8;$/;"	m	struct:mei_csr	typeref:typename:u32:8
buffer_write_time	include/linux/mtd/flashchip.h	/^	int buffer_write_time;$/;"	m	struct:flchip	typeref:typename:int
buffer_write_time_max	include/linux/mtd/flashchip.h	/^	int buffer_write_time_max;$/;"	m	struct:flchip	typeref:typename:int
buffer_write_tout	include/flash.h	/^	ulong	buffer_write_tout;	\/* maximum buffer write timeout		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong
buffered_block	fs/yaffs2/yaffs_guts.h	/^	int buffered_block;	\/* Which block is buffered here? *\/$/;"	m	struct:yaffs_dev	typeref:typename:int
bufferram	include/linux/mtd/onenand.h	/^	struct onenand_bufferram bufferram[MAX_BUFFERRAM];$/;"	m	struct:onenand_chip	typeref:struct:onenand_bufferram[]
bufferram_index	include/linux/mtd/onenand.h	/^	unsigned int bufferram_index;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
buffers	include/linux/mtd/nand.h	/^	struct nand_buffers *buffers;$/;"	m	struct:nand_chip	typeref:struct:nand_buffers *
buffhds	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_buffhd	buffhds[FSG_NUM_BUFFERS];$/;"	m	struct:fsg_common	typeref:struct:fsg_buffhd[]	file:
bufnum_mask	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int bufnum_mask; \/* bufnum = page & bufnum_mask *\/$/;"	m	struct:fsl_ifc_mtd	typeref:typename:unsigned int	file:
bufp	common/xyzModem.c	/^  unsigned char pkt[1024], *bufp;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char *	file:
bufptr	drivers/net/natsemi.c	/^	u32 bufptr;$/;"	m	struct:_BufferDesc	typeref:typename:u32	file:
bufptr	drivers/net/ns8382x.c	/^	u32 bufptr;$/;"	m	struct:_BufferDesc	typeref:typename:u32	file:
bufptr	include/tsec.h	/^	uint32_t bufptr;	\/* Buffer Pointer *\/$/;"	m	struct:rxbd8	typeref:typename:uint32_t
bufptr	include/tsec.h	/^	uint32_t bufptr;	\/* Buffer Pointer *\/$/;"	m	struct:txbd8	typeref:typename:uint32_t
bufs	drivers/net/lpc32xx_eth.c	/^	struct lpc32xx_eth_buffers *bufs;$/;"	m	struct:lpc32xx_eth_device	typeref:struct:lpc32xx_eth_buffers *	file:
bufsiz	include/linux/usb/composite.h	/^	unsigned			bufsiz;$/;"	m	struct:usb_composite_dev	typeref:typename:unsigned
bufsize	board/gdsys/common/osd.c	/^size_t bufsize;$/;"	v	typeref:typename:size_t
bufsize	drivers/fpga/lattice.c	/^static unsigned long bufsize;$/;"	v	typeref:typename:unsigned long	file:
bufstat	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short bufstat;         \/* 0xC0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
bufstat	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short bufstat;		\/* 0xC0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
bufstat	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short bufstat;		\/* 0xC0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
bug_ctx	cmd/bedbug.c	/^CPU_DEBUG_CTX bug_ctx;		\/* Bedbug context structure    *\/$/;"	v	typeref:typename:CPU_DEBUG_CTX
build	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *build;$/;"	m	struct:sysinfo_t	typeref:typename:char *
build	board/hisilicon/hikey/build-tf.mak	/^build: have-crosscompiler FORCE$/;"	t
build	board/keymile/common/common.h	/^	u8	build;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
build-dir	Makefile	/^        build-dir  = $(KBUILD_EXTMOD)$(if $(zap-slash),\/$(zap-slash))$/;"	m
build-dir	Makefile	/^        build-dir  = $(patsubst %\/,%,$(dir $@))$/;"	m
build_bl_tree	lib/zlib/trees.c	/^local int build_bl_tree(s)$/;"	f
build_command_line	arch/x86/lib/zimage.c	/^static void build_command_line(char *command_line, int auto_boot)$/;"	f	typeref:typename:void	file:
build_conf	scripts/kconfig/mconf.c	/^static void build_conf(struct menu *menu)$/;"	f	typeref:typename:void	file:
build_conf	scripts/kconfig/nconf.c	/^static void build_conf(struct menu *menu)$/;"	f	typeref:typename:void	file:
build_deg2_base	lib/bch.c	/^static int build_deg2_base(struct bch_control *bch)$/;"	f	typeref:typename:int	file:
build_docproc	scripts/Makefile	/^build_docproc: $(obj)\/docproc$/;"	t
build_gf_tables	drivers/mtd/nand/atmel_nand.c	/^static int build_gf_tables(int mm, unsigned int poly,$/;"	f	typeref:typename:int	file:
build_gf_tables	lib/bch.c	/^static int build_gf_tables(struct bch_control *bch, unsigned int poly)$/;"	f	typeref:typename:int	file:
build_header	tools/socfpgaimage.c	/^static void build_header(uint8_t *buf, uint8_t version, uint8_t flags,$/;"	f	typeref:typename:void	file:
build_main_index	doc/DocBook/Makefile	/^build_main_index = rm -rf $(main_idx); \\$/;"	m
build_mod8_tables	lib/bch.c	/^static void build_mod8_tables(struct bch_control *bch, const uint32_t *g)$/;"	f	typeref:typename:void	file:
build_pagetable	arch/x86/cpu/cpu.c	/^static void build_pagetable(uint32_t *pgtable)$/;"	f	typeref:typename:void	file:
build_tree	lib/zlib/trees.c	/^local void build_tree(s, desc)$/;"	f
build_types	scripts/checkpatch.pl	/^sub build_types {$/;"	s
build_uboot	test/common.sh	/^build_uboot() {$/;"	f
build_vendor_name	arch/x86/cpu/cpu.c	/^static int build_vendor_name(char *vendor_name)$/;"	f	typeref:typename:int	file:
build_version	arch/x86/include/asm/arch-broadwell/me.h	/^	u32	build_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
build_version	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 build_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
built_in_command	common/cli_hush.c	/^struct built_in_command {$/;"	s	file:
builtin_cd	common/cli_hush.c	/^static int builtin_cd(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_env	common/cli_hush.c	/^static int builtin_env(struct child_prog *dummy)$/;"	f	typeref:typename:int	file:
builtin_eval	common/cli_hush.c	/^static int builtin_eval(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_exec	common/cli_hush.c	/^static int builtin_exec(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_exit	common/cli_hush.c	/^static int builtin_exit(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_export	common/cli_hush.c	/^static int builtin_export(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_fg_bg	common/cli_hush.c	/^static int builtin_fg_bg(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_flash_types	drivers/mtd/nand/pxa3xx_nand.c	/^static struct pxa3xx_nand_flash builtin_flash_types[] = {$/;"	v	typeref:struct:pxa3xx_nand_flash[]	file:
builtin_help	common/cli_hush.c	/^static int builtin_help(struct child_prog *dummy)$/;"	f	typeref:typename:int	file:
builtin_jobs	common/cli_hush.c	/^static int builtin_jobs(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_not_written	common/cli_hush.c	/^static int builtin_not_written(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_pwd	common/cli_hush.c	/^static int builtin_pwd(struct child_prog *dummy)$/;"	f	typeref:typename:int	file:
builtin_read	common/cli_hush.c	/^static int builtin_read(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_set	common/cli_hush.c	/^static int builtin_set(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_shift	common/cli_hush.c	/^static int builtin_shift(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_source	common/cli_hush.c	/^static int builtin_source(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_umask	common/cli_hush.c	/^static int builtin_umask(struct child_prog *child)$/;"	f	typeref:typename:int	file:
builtin_unset	common/cli_hush.c	/^static int builtin_unset(struct child_prog *child)$/;"	f	typeref:typename:int	file:
bulk	include/usb.h	/^	int (*bulk)(struct udevice *bus, struct usb_device *udev,$/;"	m	struct:dm_usb_ops	typeref:typename:int (*)(struct udevice * bus,struct usb_device * udev,unsigned long pipe,void * buffer,int length)
bulk_combine	drivers/usb/musb-new/musb_core.h	/^	unsigned		bulk_combine:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
bulk_cs_wrap	drivers/usb/gadget/storage_common.c	/^struct bulk_cs_wrap {$/;"	s	file:
bulk_ep	drivers/usb/musb-new/musb_core.h	/^	struct musb_hw_ep	*bulk_ep;$/;"	m	struct:musb	typeref:struct:musb_hw_ep *
bulk_in	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_ep		*bulk_in;$/;"	m	struct:fsg_dev	typeref:struct:usb_ep *	file:
bulk_in_complete	drivers/usb/gadget/f_mass_storage.c	/^static void bulk_in_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
bulk_in_enabled	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		bulk_in_enabled:1;$/;"	m	struct:fsg_dev	typeref:typename:unsigned int:1	file:
bulk_out	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_ep		*bulk_out;$/;"	m	struct:fsg_dev	typeref:struct:usb_ep *	file:
bulk_out_complete	drivers/usb/gadget/f_mass_storage.c	/^static void bulk_out_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
bulk_out_enabled	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		bulk_out_enabled:1;$/;"	m	struct:fsg_dev	typeref:typename:unsigned int:1	file:
bulk_out_intended_length	drivers/usb/gadget/storage_common.c	/^	unsigned int			bulk_out_intended_length;$/;"	m	struct:fsg_buffhd	typeref:typename:unsigned int	file:
bulk_out_maxpacket	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		bulk_out_maxpacket;$/;"	m	struct:fsg_common	typeref:typename:unsigned int	file:
bulk_read	fs/ubifs/ubifs.h	/^	unsigned int bulk_read:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
bulk_read	fs/ubifs/ubifs.h	/^	unsigned int bulk_read:1;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int:1
bulk_read	fs/ubifs/ubifs.h	/^	unsigned int bulk_read:2;$/;"	m	struct:ubifs_mount_opts	typeref:typename:unsigned int:2
bulk_split	drivers/usb/musb-new/musb_core.h	/^	unsigned		bulk_split:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
burst_count	drivers/tpm/tpm_tis_lpc.c	/^static u16 burst_count(u32 status)$/;"	f	typeref:typename:u16	file:
burst_len	include/linux/mtd/samsung_onenand.h	/^	unsigned int	burst_len;	\/* 0x0010 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
burst_length	include/fsl_ddr_sdram.h	/^	unsigned int burst_length;	\/* BL4, OTF and BL8 *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
burst_lengths_bitmask	include/fsl_ddr_dimm_params.h	/^	unsigned int burst_lengths_bitmask;	\/* BL=4 bit 2, BL=8 = bit 3 *\/$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
burst_phase	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 burst_phase;		\/* 0x110 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
burst_phase	arch/arm/include/asm/arch/display.h	/^	u32 burst_phase;		\/* 0x110 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
burst_refresh_num	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 burst_refresh_num;	\/* 0x74: EMC_BURST_REFRESH_NUM *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
burst_seq_num	drivers/net/altera_tse.h	/^	u32 burst_seq_num;$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
burst_size	arch/arm/include/asm/arch-tegra/usb.h	/^	uint burst_size;$/;"	m	struct:usb_ctlr	typeref:typename:uint
burst_width	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 burst_width;		\/* 0x114 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
burst_width	arch/arm/include/asm/arch/display.h	/^	u32 burst_width;		\/* 0x114 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
burstl	include/ddr_spd.h	/^	unsigned char burstl;      \/* 16 Burst Lengths Supported *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
burstl	include/ddr_spd.h	/^	unsigned char burstl;      \/* 16 Burst Lengths Supported *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
burstl	include/spd.h	/^	unsigned char burstl;      \/* 16 Burst Lengths Supported *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
burstlen	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 burstlen:3;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:3
burstsize	arch/m68k/include/asm/immap_5329.h	/^	u32 burstsize;		\/* 0x160 Master Interface Data Burst Size *\/$/;"	m	struct:usb_otg	typeref:typename:u32
burstsize	include/usb/ehci-ci.h	/^	u32	burstsize;	\/* 0x160 - Programmable Burst Size *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
bus	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	struct udevice *bus;$/;"	m	struct:mxc_i2c_bus	typeref:struct:udevice *
bus	arch/arm/include/asm/imx-common/video.h	/^	int	bus;$/;"	m	struct:display_info_t	typeref:typename:int
bus	arch/x86/include/asm/acpi_table.h	/^	u8 bus;			\/* ISA (0) *\/$/;"	m	struct:acpi_madt_irqoverride	typeref:typename:u8
bus	arch/x86/include/asm/pirq_routing.h	/^	u8 bus;			\/* Bus number *\/$/;"	m	struct:irq_info	typeref:typename:u8
bus	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	int bus;$/;"	m	struct:display_info_t	typeref:typename:int	file:
bus	board/gdsys/mpc8308/hrcon.c	/^	u8 bus;$/;"	m	struct:__anonc2f835a20308	typeref:typename:u8	file:
bus	board/gdsys/mpc8308/strider.c	/^	u8 bus;$/;"	m	struct:__anonafccc0650308	typeref:typename:u8	file:
bus	cmd/i2c.c	/^	uchar	bus;$/;"	m	struct:__anon1d2f36170108	typeref:typename:uchar	file:
bus	cmd/spi.c	/^static unsigned int	bus;$/;"	v	typeref:typename:unsigned int	file:
bus	cmd/tsi148.c	/^	int           bus;$/;"	m	struct:_TSI148_DEV	typeref:typename:int	file:
bus	cmd/universe.c	/^	int            bus;$/;"	m	struct:_UNI_DEV	typeref:typename:int	file:
bus	drivers/mtd/spi/sandbox.c	/^	int bus;$/;"	m	struct:sandbox_spi_flash_plat_data	typeref:typename:int	file:
bus	drivers/net/ag7xxx.c	/^	struct mii_dev		*bus;$/;"	m	struct:ar7xxx_eth_priv	typeref:struct:mii_dev *	file:
bus	drivers/net/altera_tse.h	/^	struct mii_dev *bus;$/;"	m	struct:altera_tse_priv	typeref:struct:mii_dev *
bus	drivers/net/cpsw.c	/^	struct mii_dev			*bus;$/;"	m	struct:cpsw_priv	typeref:struct:mii_dev *	file:
bus	drivers/net/designware.h	/^	struct mii_dev *bus;$/;"	m	struct:dw_eth_dev	typeref:struct:mii_dev *
bus	drivers/net/ethoc.c	/^	struct mii_dev *bus;$/;"	m	struct:ethoc	typeref:struct:mii_dev *	file:
bus	drivers/net/fec_mxc.h	/^	struct mii_dev *bus;$/;"	m	struct:fec_priv	typeref:struct:mii_dev *
bus	drivers/net/fm/fm.h	/^	struct mii_dev *bus;$/;"	m	struct:fm_eth	typeref:struct:mii_dev *
bus	drivers/net/macb.c	/^	struct mii_dev		*bus;$/;"	m	struct:macb_device	typeref:struct:mii_dev *	file:
bus	drivers/net/mvneta.c	/^	struct mii_dev *bus;$/;"	m	struct:mvneta_port	typeref:struct:mii_dev *	file:
bus	drivers/net/mvpp2.c	/^	struct mii_dev *bus;$/;"	m	struct:mvpp2	typeref:struct:mii_dev *	file:
bus	drivers/net/pch_gbe.h	/^	struct mii_dev *bus;$/;"	m	struct:pch_gbe_priv	typeref:struct:mii_dev *
bus	drivers/net/sun8i_emac.c	/^	struct mii_dev *bus;$/;"	m	struct:emac_eth_dev	typeref:struct:mii_dev *	file:
bus	drivers/net/sunxi_emac.c	/^	struct mii_dev *bus;$/;"	m	struct:emac_eth_dev	typeref:struct:mii_dev *	file:
bus	drivers/net/xilinx_axi_emac.c	/^	struct mii_dev *bus;$/;"	m	struct:axidma_priv	typeref:struct:mii_dev *	file:
bus	drivers/net/xilinx_emaclite.c	/^	struct mii_dev *bus;$/;"	m	struct:xemaclite	typeref:struct:mii_dev *	file:
bus	drivers/net/xilinx_ll_temac.h	/^	struct mii_dev		*bus;$/;"	m	struct:ll_temac	typeref:struct:mii_dev *
bus	drivers/net/zynq_gem.c	/^	struct mii_dev *bus;$/;"	m	struct:zynq_gem_priv	typeref:struct:mii_dev *	file:
bus	include/bios_emul.h	/^	int bus;$/;"	m	struct:__anoneb05efed0108	typeref:typename:int
bus	include/faraday/ftpci100.h	/^	unsigned int bus;$/;"	m	struct:pci_config	typeref:typename:unsigned int
bus	include/fm_eth.h	/^	struct mii_dev *bus;$/;"	m	struct:fm_eth_info	typeref:struct:mii_dev *
bus	include/fsl-mc/ldpaa_wriop.h	/^	struct mii_dev *bus;$/;"	m	struct:wriop_dpmac_info	typeref:struct:mii_dev *
bus	include/linux/edd.h	/^			__u8 bus;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0308	typeref:typename:__u8
bus	include/pci.h	/^	struct udevice *bus;$/;"	m	struct:pci_controller	typeref:struct:udevice *
bus	include/pci.h	/^	unsigned int bus;			\/* Bus number, or PCI_ANY_ID *\/$/;"	m	struct:pci_config_table	typeref:typename:unsigned int
bus	include/phy.h	/^	struct mii_dev *bus;$/;"	m	struct:phy_device	typeref:struct:mii_dev *
bus	include/power/pmic.h	/^	unsigned char bus;$/;"	m	struct:pmic	typeref:typename:unsigned char
bus	include/s6e63d6.h	/^	unsigned int bus;$/;"	m	struct:s6e63d6	typeref:typename:unsigned int
bus	include/tsec.h	/^	struct mii_dev *bus;$/;"	m	struct:tsec_private	typeref:struct:mii_dev *
bus	include/usbdevice.h	/^	struct usb_bus_instance *bus;	\/* which bus interface driver *\/$/;"	m	struct:usb_device_instance	typeref:struct:usb_bus_instance *
bus	include/vsc9953.h	/^	struct mii_dev	*bus;$/;"	m	struct:vsc9953_port_info	typeref:struct:mii_dev *
bus0_pll_con	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	bus0_pll_con[2];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[2]	file:
bus1_pll_con	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	bus1_pll_con[2];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[2]	file:
bus2core	arch/powerpc/cpu/mpc5xxx/speed.c	/^static int bus2core[] = {$/;"	v	typeref:typename:int[]	file:
bus_act_mask	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u8 bus_act_mask;$/;"	m	struct:hws_topology_map	typeref:typename:u8
bus_act_timeout	include/mpc5xxx.h	/^	volatile u32 bus_act_timeout;	\/* XLB + 0x60 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
bus_cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 bus_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
bus_cfg	arch/arm/include/asm/arch/display2.h	/^	u32 bus_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
bus_clk	drivers/spi/fsl_dspi.c	/^	uint bus_clk;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
bus_clk	drivers/spi/fsl_qspi.c	/^	u32 bus_clk;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
bus_clk	include/asm-generic/global_data.h	/^	unsigned long bus_clk;$/;"	m	struct:global_data	typeref:typename:unsigned long
bus_clk_data	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct bus_clk_data {$/;"	s
bus_clk_data	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct bus_clk_data {$/;"	s
bus_clk_enable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static int bus_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
bus_clk_enable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static int bus_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
bus_clk_get_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static unsigned long bus_clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long	file:
bus_clk_get_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static unsigned long bus_clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long	file:
bus_clk_ops	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^struct clk_ops bus_clk_ops = {$/;"	v	typeref:struct:clk_ops
bus_clk_ops	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^struct clk_ops bus_clk_ops = {$/;"	v	typeref:struct:clk_ops
bus_clk_rate	drivers/i2c/at91_i2c.h	/^	ulong bus_clk_rate;$/;"	m	struct:at91_i2c_bus	typeref:typename:ulong
bus_clk_rate	drivers/spi/atmel_spi.c	/^	ulong bus_clk_rate;$/;"	m	struct:atmel_spi_priv	typeref:typename:ulong	file:
bus_clock	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct bus_clock {$/;"	s
bus_clock	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct bus_clock {$/;"	s
bus_cntl	drivers/video/ati_radeon_fb.h	/^	u32		bus_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
bus_end_window	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u8 bus_end_window[NUM_OF_CENTRAL_TYPES][MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][][]
bus_errs	include/mpc5xxx.h	/^	volatile u8 bus_errs;		\/* GPIO + 0x3e *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
bus_freq	arch/x86/cpu/baytrail/cpu.c	/^static unsigned bus_freq(void)$/;"	f	typeref:typename:unsigned	file:
bus_gate4	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 bus_gate4;          \/* 0x70 gate 4 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
bus_gate4	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 bus_gate4;          \/* 0x70 gate 4 module clock gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
bus_gates	arch/arm/dts/sun50i-a64.dtsi	/^		bus_gates: bus_gates_clk@1c20060 {$/;"	l
bus_hz	include/dwmmc.h	/^	unsigned int bus_hz;$/;"	m	struct:dwmci_host	typeref:typename:unsigned int
bus_i2c_init	drivers/i2c/mxc_i2c.c	/^void bus_i2c_init(int index, int speed, int unused,$/;"	f	typeref:typename:void
bus_i2c_read	drivers/i2c/mxc_i2c.c	/^static int bus_i2c_read(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr,$/;"	f	typeref:typename:int	file:
bus_i2c_set_bus_speed	drivers/i2c/mxc_i2c.c	/^static int bus_i2c_set_bus_speed(struct mxc_i2c_bus *i2c_bus, int speed)$/;"	f	typeref:typename:int	file:
bus_i2c_write	drivers/i2c/mxc_i2c.c	/^static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr,$/;"	f	typeref:typename:int	file:
bus_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t bus_id;$/;"	m	struct:cmd_i2c_xfer_request	typeref:typename:uint32_t
bus_id	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int			bus_id;$/;"	m	struct:mipi_dsim_lcd_device	typeref:typename:int
bus_id	drivers/video/exynos/exynos_mipi_dsi.c	/^	int				bus_id;$/;"	m	struct:mipi_dsim_ddi	typeref:typename:int	file:
bus_info	include/linux/ethtool.h	/^	char	bus_info[ETHTOOL_BUSINFO_LEN];	\/* Bus info for this IF. *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:char[]
bus_initialized	drivers/i2c/mv_i2c.c	/^static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];$/;"	v	typeref:typename:unsigned int[]	file:
bus_instance	drivers/serial/usbtty.c	/^static struct usb_bus_instance bus_instance[1];$/;"	v	typeref:struct:usb_bus_instance[1]	file:
bus_lower	include/pci.h	/^	pci_addr_t bus_lower;$/;"	m	struct:pci_region	typeref:typename:pci_addr_t
bus_num	arch/powerpc/cpu/mpc512x/i2c.c	/^static unsigned int bus_num __attribute__ ((section (".data"))) = 0;$/;"	v	typeref:typename:unsigned int	file:
bus_num	drivers/i2c/s3c24x0_i2c.h	/^	int bus_num;	\/* i2c bus number *\/$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:int
bus_params	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^struct bus_params {$/;"	s
bus_shift	drivers/mmc/sh_sdhi.c	/^	int bus_shift;$/;"	m	struct:sh_sdhi_host	typeref:typename:int	file:
bus_sig_capture	include/mpc5xxx.h	/^	volatile u32 bus_sig_capture;	\/* XLB + 0x54 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
bus_speed	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32	bus_speed;$/;"	m	struct:board_serdes_conf	typeref:typename:u32
bus_speed_cfg	drivers/i2c/kona_i2c.c	/^struct bus_speed_cfg {$/;"	s	file:
bus_speed_index	drivers/i2c/kona_i2c.c	/^enum bus_speed_index {$/;"	g	file:
bus_start	include/pci.h	/^	pci_addr_t bus_start;	\/* Start on the bus *\/$/;"	m	struct:pci_region	typeref:typename:pci_addr_t
bus_start_window	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u8 bus_start_window[NUM_OF_CENTRAL_TYPES][MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][][]
bus_to_phys	arch/arm/mach-bcm283x/phys2bus.c	/^unsigned long bus_to_phys(unsigned long bus)$/;"	f	typeref:typename:unsigned long
bus_to_phys	drivers/block/sym53c8xx.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	drivers/net/e1000.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	drivers/net/eepro100.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	drivers/net/natsemi.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	drivers/net/ns8382x.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	drivers/net/rtl8139.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	drivers/net/rtl8169.c	/^#define bus_to_phys(/;"	d	file:
bus_to_phys	include/phys2bus.h	/^static inline unsigned long bus_to_phys(unsigned long bus)$/;"	f	typeref:typename:unsigned long
bus_to_virt	arch/mips/include/asm/io.h	/^#define bus_to_virt /;"	d
bus_type	drivers/net/e1000.h	/^	e1000_bus_type bus_type;$/;"	m	struct:e1000_hw	typeref:typename:e1000_bus_type
bus_width	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 bus_width;$/;"	m	struct:dram_para	typeref:typename:u32
bus_width	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 bus_width;$/;"	m	struct:dram_para	typeref:typename:u32
bus_width	arch/arm/mach-sunxi/dram_sun6i.c	/^	u8 bus_width;$/;"	m	struct:dram_sun6i_para	typeref:typename:u8	file:
bus_width	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u8 bus_width;$/;"	m	struct:dram_para	typeref:typename:u8	file:
bus_width	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 bus_width;$/;"	m	struct:dram_para	typeref:typename:u8	file:
bus_width	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^	u8 bus_width;$/;"	m	struct:dram_para	typeref:typename:u8	file:
bus_width	arch/arm/mach-sunxi/dram_sun9i.c	/^	u8 bus_width;$/;"	m	struct:dram_sun9i_para	typeref:typename:u8	file:
bus_width	arch/x86/include/asm/global_data.h	/^	uint8_t bus_width;$/;"	m	struct:dimm_info	typeref:typename:uint8_t
bus_width	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	enum hws_bus_width bus_width;$/;"	m	struct:if_params	typeref:enum:hws_bus_width
bus_width	drivers/mmc/fsl_esdhc.c	/^	unsigned int bus_width;$/;"	m	struct:fsl_esdhc_priv	typeref:typename:unsigned int	file:
bus_width	drivers/mmc/sh_mmcif.h	/^	int			bus_width;$/;"	m	struct:sh_mmcif_host	typeref:typename:int
bus_width	drivers/net/ks8851_mll.c	/^	int			bus_width;$/;"	m	struct:ks_net	typeref:typename:int	file:
bus_width	include/ddr_spd.h	/^	uint8_t bus_width;		\/* 13 Module Memory Bus Width *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
bus_width	include/ddr_spd.h	/^	unsigned char bus_width;       \/*  8 Module Memory Bus Width *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
bus_width	include/mmc.h	/^	uint bus_width;$/;"	m	struct:mmc	typeref:typename:uint
bus_width	include/sdhci.h	/^	int bus_width;$/;"	m	struct:sdhci_host	typeref:typename:int
buscrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 buscrc;		\/* 0x06C *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
busctl	drivers/usb/musb-new/musb_core.h	/^	u8 devctl, busctl, misc;$/;"	m	struct:musb_context_registers	typeref:typename:u8
busdevfn	cmd/tsi148.c	/^	pci_dev_t     busdevfn;$/;"	m	struct:_TSI148_DEV	typeref:typename:pci_dev_t	file:
busdevfn	cmd/universe.c	/^	pci_dev_t      busdevfn;$/;"	m	struct:_UNI_DEV	typeref:typename:pci_dev_t	file:
busdmac_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 busdmac_con[2];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[2]
buses	include/ambapp.h	/^	int		buses;		\/* Number of buses *\/$/;"	m	struct:ambapp_bus	typeref:typename:int
busmem_base	drivers/bios_emulator/include/biosemu.h	/^	ulong busmem_base;$/;"	m	struct:__anon964d10140108	typeref:typename:ulong
busmode	drivers/net/calxedaxgmac.c	/^	u32 busmode;		\/* 0xf00 *\/$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
busmode	drivers/net/designware.h	/^	u32 busmode;		\/* 0x00 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
busno	board/gateworks/gw_ventana/gw_ventana.c	/^	unsigned short busno; \/* subbordinate busno *\/$/;"	m	struct:pci_dev	typeref:typename:unsigned short	file:
busnum	test/dm/i2c.c	/^static const int busnum;$/;"	v	typeref:typename:const int	file:
bustmstrarb	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t bustmstrarb;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
busto	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 busto;		\/* 0x260 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
buswidth	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 buswidth;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
buswidth	drivers/mmc/mxsmmc.c	/^	uint32_t		buswidth;$/;"	m	struct:mxsmmc_priv	typeref:typename:uint32_t	file:
buswidth	include/dwmmc.h	/^	int buswidth;$/;"	m	struct:dwmci_host	typeref:typename:int
busy	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		atomic_t busy;$/;"	m	struct:qbman_swp::__anonadc6216b0208	typeref:typename:atomic_t
busy	drivers/usb/musb-new/musb_gadget.h	/^	u8				busy;$/;"	m	struct:musb_ep	typeref:typename:u8
busy	include/spartan2.h	/^	xilinx_busy_fn	busy;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_busy_fn
busy	include/spartan3.h	/^	xilinx_busy_fn	busy;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_busy_fn
busy	include/virtex2.h	/^	xilinx_busy_fn	busy;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_busy_fn
busy_indicator	drivers/usb/gadget/f_mass_storage.c	/^static void busy_indicator(void)$/;"	f	typeref:typename:void	file:
busy_slot	drivers/usb/dwc3/core.h	/^	u32			busy_slot;$/;"	m	struct:dwc3_ep	typeref:typename:u32
busycr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 busycr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
busycr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 busycr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
busyuart	arch/arm/include/debug/8250.S	/^		.macro	busyuart,rd,rx$/;"	m
button1	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button1">$/;"	i
button2	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button2">$/;"	i
button3	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button3">$/;"	i
button4	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button4">$/;"	i
button5	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button5">$/;"	i
button6	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button6">$/;"	i
button7	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button7">$/;"	i
button8	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolButton" id="button8">$/;"	i
button_active	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color button_active;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
button_inactive	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color button_inactive;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
button_input	board/kosagi/novena/novena.c	/^static struct input_config button_input;$/;"	v	typeref:struct:input_config	file:
button_key	board/boundary/nitrogen6x/nitrogen6x.c	/^struct button_key {$/;"	s	file:
button_key_active	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color button_key_active;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
button_key_inactive	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color button_key_inactive;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
button_label_active	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color button_label_active;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
button_label_inactive	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color button_label_inactive;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
button_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const button_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
button_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t button_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
button_pio	arch/nios2/dts/10m50_devboard.dts	/^		button_pio: gpio@180014c0 {$/;"	l	label:sopc0
button_post_test	arch/blackfin/lib/post.c	/^int button_post_test(int flags)$/;"	f	typeref:typename:int
buttons	board/boundary/nitrogen6x/nitrogen6x.c	/^static struct button_key const buttons[] = {$/;"	v	typeref:struct:button_key const[]	file:
buzzer_turn_off	board/inka4x0/inkadiag.c	/^static void buzzer_turn_off(void)$/;"	f	typeref:typename:void	file:
buzzer_turn_on	board/inka4x0/inkadiag.c	/^static void buzzer_turn_on(unsigned int freq)$/;"	f	typeref:typename:void	file:
bw	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 bw;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
bw	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 bw;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
bw	arch/arm/mach-exynos/include/mach/sromc.h	/^	unsigned int	bw;$/;"	m	struct:s5p_sromc	typeref:typename:unsigned int
bw	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^	unsigned int	bw;$/;"	m	struct:s5p_sromc	typeref:typename:unsigned int
bwPollTimeout	drivers/usb/gadget/f_dfu.h	/^	__u8				bwPollTimeout[3];$/;"	m	struct:dfu_status	typeref:typename:__u8[3]
bw_limit	arch/blackfin/include/asm/dma.h	/^	u32 bw_limit;		\/* DMA Bandwidth Limit Count *\/$/;"	m	struct:dma_register	typeref:typename:u32
bw_monitor	arch/blackfin/include/asm/dma.h	/^	u32 bw_monitor;		\/* DMA Bandwidth Monitor Count *\/$/;"	m	struct:dma_register	typeref:typename:u32
bw_per_freq	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 bw_per_freq;$/;"	m	struct:hws_tip_freq_config_info	typeref:typename:u8
bw_wdw_cfg	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 bw_wdw_cfg;            \/* 0x100 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
bw_wdw_cfg	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 bw_wdw_cfg;            \/* 0x100 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bwcr;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 bwcr;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 bwcr;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 bwcr;		\/* 0x90 bandwidth control register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bwcr;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 bwcr;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 bwcr;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 bwcr;		\/* 0x90 bandwidth control register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 bwctr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 bwctr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 bwctr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 bwctr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 bwctr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 bwctr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
bwctrl	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int bwctrl;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
bwr	include/faraday/ftsdc010.h	/^	unsigned int	bwr;		\/* 0x3c - bus width reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
bwr	include/spartan3.h	/^	xilinx_bwr_fn	bwr; \/* block write function *\/$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_bwr_fn
bwratio	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 bwratio:1;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:1
bwscon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	bwscon;$/;"	m	struct:s3c24x0_memctl	typeref:typename:u32
bx	arch/powerpc/cpu/mpc8xx/video.c	/^			bx:2,		\/* Blank *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:2	file:
bx	drivers/bios_emulator/include/biosemu.h	/^	u16 bx, bx_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
bx	drivers/bios_emulator/include/biosemu.h	/^	u16 bx_hi, bx;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
bx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 bx, bx_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
bx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 bx_hi, bx;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
bx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 bx_hi;$/;"	m	struct:__anon964d10140508	typeref:typename:u16
bx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 bx_hi;$/;"	m	struct:__anon964d10140608	typeref:typename:u16
by_protocol	include/efi.h	/^	by_protocol$/;"	e	enum:efi_locate_search_type
by_register_notify	include/efi.h	/^	by_register_notify,$/;"	e	enum:efi_locate_search_type
bypass	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 bypass;			\/* 0x008 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
bypass	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 bypass:1;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:1
bypass	arch/arm/include/asm/arch/display.h	/^	u32 bypass;			\/* 0x008 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
bypass	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	bypass;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
bypass	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	bypass;$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32
bypass_dpll	arch/arm/cpu/armv7/am33xx/clock.c	/^static void bypass_dpll(const struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:void	file:
bypass_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void bypass_dpll(u32 const base)$/;"	f	typeref:typename:void
bypass_enable	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 bypass_enable;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
bypass_main_pll	arch/arm/mach-keystone/clock.c	/^static inline void bypass_main_pll(const struct pll_init_data *data)$/;"	f	typeref:typename:void	file:
bypass_smmu	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^void bypass_smmu(void)$/;"	f	typeref:typename:void
byt_config	drivers/i2c/designware_i2c.c	/^static struct dw_scl_sda_cfg byt_config = {$/;"	v	typeref:struct:dw_scl_sda_cfg	file:
byte	drivers/net/lan91c96.h	/^typedef unsigned char			byte;$/;"	t	typeref:typename:unsigned char
byte	drivers/net/mvpp2.c	/^	u8  byte[MVPP2_PRS_SRAM_WORDS * 4];$/;"	m	union:mvpp2_prs_sram_entry	typeref:typename:u8[]	file:
byte	drivers/net/mvpp2.c	/^	u8  byte[MVPP2_PRS_TCAM_WORDS * 4];$/;"	m	union:mvpp2_prs_tcam_entry	typeref:typename:u8[]	file:
byte	drivers/net/smc91111.h	/^typedef unsigned char			byte;$/;"	t	typeref:typename:unsigned char
byte	drivers/usb/host/ohci-s3c24xx.c	/^		__u8 byte[16];$/;"	m	union:ohci_submit_rh_msg::__anon1f109079010a	typeref:typename:__u8[16]	file:
byte40_table_ps	drivers/ddr/fsl/ddr1_dimm_params.c	/^static unsigned int byte40_table_ps[8] = {$/;"	v	typeref:typename:unsigned int[8]	file:
byte40_table_ps	drivers/ddr/fsl/ddr2_dimm_params.c	/^static unsigned int byte40_table_ps[8] = {$/;"	v	typeref:typename:unsigned int[8]	file:
byteReverse	lib/md5.c	/^byteReverse(unsigned char *buf, unsigned longs)$/;"	f	typeref:typename:void	file:
byte_cnt	drivers/ddr/marvell/axp/xor.h	/^	u32 byte_cnt;		\/* Size of source block part represented by the descriptor *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
byte_cnt	drivers/net/armada100_fec.h	/^	u16 byte_cnt;		\/* Descriptor buffer byte count *\/$/;"	m	struct:rx_desc	typeref:typename:u16
byte_cnt	drivers/net/armada100_fec.h	/^	u16 byte_cnt;		\/* buffer byte count *\/$/;"	m	struct:tx_desc	typeref:typename:u16
byte_cnt	drivers/net/mvgbe.h	/^	u16 byte_cnt;		\/* Descriptor buffer byte count *\/$/;"	m	struct:mvgbe_rxdesc	typeref:typename:u16
byte_cnt	drivers/net/mvgbe.h	/^	u16 byte_cnt;		\/* Descriptor buffer byte count *\/$/;"	m	struct:mvgbe_txdesc	typeref:typename:u16
byte_count	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	byte_count;$/;"	m	struct:qm_reg_queue	typeref:typename:u32
byte_count	drivers/net/mvpp2.c	/^	u16 byte_count;$/;"	m	struct:mvpp2_buff_hdr	typeref:typename:u16	file:
byte_lane_mask	arch/x86/cpu/quark/mrc_util.c	/^uint32_t byte_lane_mask(struct mrc_params *mrc_params)$/;"	f	typeref:typename:uint32_t
byte_mask	include/dataflash.h	/^	int byte_mask;				\/* byte mask in command *\/$/;"	m	struct:_AT91S_Dataflash	typeref:typename:int
byte_per_page	include/linux/mtd/nand.h	/^	__le32 byte_per_page;$/;"	m	struct:nand_jedec_params	typeref:typename:__le32
byte_per_page	include/linux/mtd/nand.h	/^	__le32 byte_per_page;$/;"	m	struct:nand_onfi_params	typeref:typename:__le32
byte_rev_table	lib/bitrev.c	/^const u8 byte_rev_table[256] = {$/;"	v	typeref:typename:const u8[256]
byte_swap	arch/arm/include/asm/arch-tegra/dc.h	/^	uint byte_swap;			\/* _WIN_BYTE_SWAP_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
byte_to_binary_mask	board/freescale/common/qixis.c	/^const char *byte_to_binary_mask(u8 val, u8 mask, char *buf)$/;"	f	typeref:typename:const char *
bytecnt	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 bytecnt;		\/* 0x14 byte count *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
bytecnt	arch/arm/include/asm/arch/mmc.h	/^	u32 bytecnt;		\/* 0x14 byte count *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
bytecount_eot	drivers/block/sata_mv.c	/^	u32 bytecount_eot;$/;"	m	struct:eprd	typeref:typename:u32	file:
bytereverse	drivers/mtd/ubi/crc32.c	/^static void bytereverse(unsigned char *buf, size_t len)$/;"	f	typeref:typename:void	file:
bytes	arch/powerpc/cpu/mpc512x/ide.c	/^		}bytes;$/;"	m	union:ide_preinit::__anond3b5d05a020a	typeref:struct:ide_preinit::__anond3b5d05a020a::__anond3b5d05a0308	file:
bytes	cmd/sf.c	/^	int bytes;$/;"	m	struct:test_info	typeref:typename:int	file:
bytes	drivers/mtd/nand/mxc_nand.c	/^				uint8_t bytes[4];$/;"	m	union:mxc_nand_read_buf::__anon3deb00d0040a	typeref:typename:uint8_t[4]	file:
bytes	drivers/mtd/nand/mxc_nand.c	/^				uint8_t bytes[4];$/;"	m	union:mxc_nand_write_buf::__anon3deb00d0030a	typeref:typename:uint8_t[4]	file:
bytes	drivers/mtd/nand/mxc_nand.c	/^			uint8_t bytes[2];$/;"	m	union:mxc_nand_read_word::__anon3deb00d0020a	typeref:typename:uint8_t[2]	file:
bytes	drivers/mtd/nand/mxc_nand.c	/^		uint8_t bytes[2];$/;"	m	union:mxc_nand_read_byte::__anon3deb00d0010a	typeref:typename:uint8_t[2]	file:
bytes	drivers/usb/gadget/pxa25x_udc.h	/^		unsigned long		bytes;$/;"	m	struct:udc_stats::ep0stats	typeref:typename:unsigned long
bytes	drivers/usb/host/xhci.h	/^	u8 *bytes;$/;"	m	struct:xhci_container_ctx	typeref:typename:u8 *
bytes	drivers/usb/musb-new/musb_gadget.c	/^	unsigned		bytes;$/;"	m	struct:free_record	typeref:typename:unsigned	file:
bytes	include/linux/mtd/nand.h	/^	int bytes;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
bytes	include/mtd/ubi-user.h	/^	__s32 bytes;$/;"	m	struct:ubi_leb_change_req	typeref:typename:__s32
bytes	include/mtd/ubi-user.h	/^	__s64 bytes;$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s64
bytes	include/mtd/ubi-user.h	/^	__s64 bytes;$/;"	m	struct:ubi_rsvol_req	typeref:typename:__s64
bytes_per_char_h	arch/arm/include/asm/setup.h	/^	    unsigned char bytes_per_char_h;	\/* 42 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned char
bytes_per_char_v	arch/arm/include/asm/setup.h	/^	    unsigned char bytes_per_char_v;	\/* 43 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned char
bytes_per_line	arch/x86/include/asm/coreboot_tables.h	/^	u32 bytes_per_line;$/;"	m	struct:cb_framebuffer	typeref:typename:u32
bytes_per_pixel	drivers/video/ipu_common.c	/^uint32_t bytes_per_pixel(uint32_t fmt)$/;"	f	typeref:typename:uint32_t
bytes_per_scanline	include/vbe.h	/^	u16 bytes_per_scanline;	\/* 10 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
bytes_per_second	cmd/sf.c	/^static ulong bytes_per_second(unsigned int len, ulong start_ms)$/;"	f	typeref:typename:ulong	file:
bytes_per_sector	include/linux/edd.h	/^	__u16 bytes_per_sector;$/;"	m	struct:edd_device_params	typeref:typename:__u16
bytes_str_to_int	drivers/mtd/ubi/build.c	/^static int __init bytes_str_to_int(const char *str)$/;"	f	typeref:typename:int __init	file:
bytes_to_receive	drivers/spi/zynq_qspi.c	/^	int bytes_to_receive;$/;"	m	struct:zynq_qspi_priv	typeref:typename:int	file:
bytes_to_transfer	drivers/net/altera_tse.h	/^	u16 bytes_to_transfer; \/* the number of bytes to transfer *\/$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u16
bytes_to_transfer	drivers/spi/zynq_qspi.c	/^	int bytes_to_transfer;$/;"	m	struct:zynq_qspi_priv	typeref:typename:int	file:
bytes_transferred	drivers/net/altera_tse.h	/^	u32 bytes_transferred;$/;"	m	struct:msgdma_response	typeref:typename:u32
bytesin	drivers/spi/ich.h	/^	uint32_t bytesin;$/;"	m	struct:spi_trans	typeref:typename:uint32_t
bytesout	drivers/spi/ich.h	/^	uint32_t bytesout;$/;"	m	struct:spi_trans	typeref:typename:uint32_t
bzFile	lib/bzip2/bzlib.c	/^   bzFile;$/;"	t	typeref:struct:__anonb9ba2b050108	file:
bz_config_ok	lib/bzip2/bzlib.c	/^int bz_config_ok ( void )$/;"	f	typeref:typename:int	file:
bz_internal_error	lib/bzip2/bzlib.c	/^void bz_internal_error(int errcode)$/;"	f	typeref:typename:void
bz_stream	include/bzlib.h	/^   bz_stream;$/;"	t	typeref:struct:__anond8626de10108
bzalloc	include/bzlib.h	/^      void *(*bzalloc)(void *,int,int);$/;"	m	struct:__anond8626de10108	typeref:typename:void * (*)(void *,int,int)
bzerrorstrings	lib/bzip2/bzlib.c	/^static char *bzerrorstrings[] = {$/;"	v	typeref:typename:char * []	file:
bzfree	include/bzlib.h	/^      void (*bzfree)(void *,void *);$/;"	m	struct:__anond8626de10108	typeref:typename:void (*)(void *,void *)
bzip2_compressed	test/compression.c	/^static const char bzip2_compressed[] =$/;"	v	typeref:typename:const char[]	file:
bzip2_compressed_size	test/compression.c	/^static const unsigned long bzip2_compressed_size = 240;$/;"	v	typeref:typename:const unsigned long	file:
bzopen_or_bzdopen	lib/bzip2/bzlib.c	/^BZFILE * bzopen_or_bzdopen$/;"	f	typeref:typename:BZFILE *	file:
c	arch/arc/lib/cache.c	/^			unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2050a::bcr_clust_cfg	typeref:typename:unsigned int:1	file:
c	arch/powerpc/include/asm/mmu.h	/^	unsigned long c:1;	\/* Changed *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
c	drivers/tpm/tpm_tis.h	/^	__be32 c;$/;"	m	struct:timeout_t	typeref:typename:__be32
c	fs/ubifs/ubifs.h	/^	struct ubifs_info *c;$/;"	m	struct:ubifs_wbuf	typeref:struct:ubifs_info *
c	lib/bch.c	/^	unsigned int   c[2];$/;"	m	struct:gf_poly_deg1	typeref:typename:unsigned int[2]	file:
c	lib/bch.c	/^	unsigned int c[0];   \/* polynomial terms *\/$/;"	m	struct:gf_poly	typeref:typename:unsigned int[0]	file:
c	tools/pblimage.c	/^	char c[4];$/;"	m	union:__anon5825b7b7010a	typeref:typename:char[4]	file:
c0	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 c0;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
c0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 c0_cfg;		\/* 0x54 cpu cluster 0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 c0_cfg;		\/* 0x54 cpu cluster 0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c0_tuning_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 c0_tuning_cfg;	\/* 0x250 pll c0cpu# tuning register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c0_tuning_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 c0_tuning_cfg;	\/* 0x250 pll c0cpu# tuning register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c0miscen	drivers/net/davinci_emac.h	/^	dv_reg		c0miscen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0miscstat	drivers/net/davinci_emac.h	/^	dv_reg		c0miscstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0rxen	drivers/net/davinci_emac.h	/^	dv_reg		c0rxen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0rximax	drivers/net/davinci_emac.h	/^	dv_reg		c0rximax;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0rxstat	drivers/net/davinci_emac.h	/^	dv_reg		c0rxstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0rxthreshen	drivers/net/davinci_emac.h	/^	dv_reg		c0rxthreshen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0rxthreshstat	drivers/net/davinci_emac.h	/^	dv_reg		c0rxthreshstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0txen	drivers/net/davinci_emac.h	/^	dv_reg		c0txen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0tximax	drivers/net/davinci_emac.h	/^	dv_reg		c0tximax;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c0txstat	drivers/net/davinci_emac.h	/^	dv_reg		c0txstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 c1;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
c1	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c1;			\/* 0x70 Context 1 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c10	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c10;		\/* 0x94 Context 10 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c11	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c11;		\/* 0x98 Context 11 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c12	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c12;		\/* 0x9C Context 12 - 5235, 5271, 5272 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c128_w	arch/sh/lib/udivsi3_i4i.S	/^c128_w:$/;"	l
c1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 c1_cfg;		\/* 0x58 cpu cluster 1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 c1_cfg;		\/* 0x58 cpu cluster 1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c1_tuning_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 c1_tuning_cfg;	\/* 0x254 pll c1cpu# tuning register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c1_tuning_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 c1_tuning_cfg;	\/* 0x254 pll c1cpu# tuning register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
c1miscen	drivers/net/davinci_emac.h	/^	dv_reg		c1miscen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1miscstat	drivers/net/davinci_emac.h	/^	dv_reg		c1miscstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 c1rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
c1rxen	drivers/net/davinci_emac.h	/^	dv_reg		c1rxen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1rximax	drivers/net/davinci_emac.h	/^	dv_reg		c1rximax;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1rxstat	drivers/net/davinci_emac.h	/^	dv_reg		c1rxstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1rxthreshen	drivers/net/davinci_emac.h	/^	dv_reg		c1rxthreshen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1rxthreshstat	drivers/net/davinci_emac.h	/^	dv_reg		c1rxthreshstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1txen	drivers/net/davinci_emac.h	/^	dv_reg		c1txen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1tximax	drivers/net/davinci_emac.h	/^	dv_reg		c1tximax;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c1txstat	drivers/net/davinci_emac.h	/^	dv_reg		c1txstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 c2;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
c2	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c2;			\/* 0x74 Context 2 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c2c_config	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	c2c_config;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
c2c_monitor	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	c2c_monitor;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
c2c_state	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	c2c_state;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
c2cclkm	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 c2cclkm;            \/* 0x011c *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
c2cclkreq	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 c2cclkreq;          \/* 0x0234 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
c2crstctrl	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 c2crstctrl;         \/* 0x041c *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
c2cwarmrstst_reg	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 c2cwarmrstst_reg;   \/* 0x051C *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
c2miscen	drivers/net/davinci_emac.h	/^	dv_reg		c2miscen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2miscstat	drivers/net/davinci_emac.h	/^	dv_reg		c2miscstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 c2rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
c2rxen	drivers/net/davinci_emac.h	/^	dv_reg		c2rxen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2rximax	drivers/net/davinci_emac.h	/^	dv_reg		c2rximax;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2rxstat	drivers/net/davinci_emac.h	/^	dv_reg		c2rxstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2rxthreshen	drivers/net/davinci_emac.h	/^	dv_reg		c2rxthreshen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2rxthreshstat	drivers/net/davinci_emac.h	/^	dv_reg		c2rxthreshstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2txen	drivers/net/davinci_emac.h	/^	dv_reg		c2txen;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2tximax	drivers/net/davinci_emac.h	/^	dv_reg		c2tximax;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c2txstat	drivers/net/davinci_emac.h	/^	dv_reg		c2txstat;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
c3	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 c3;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
c3	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c3;			\/* 0x78 Context 3 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c4	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c4;			\/* 0x7C Context 4 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c5	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c5;			\/* 0x80 Context 5 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c6	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c6;			\/* 0x84 Context 6 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c7	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c7;			\/* 0x88 Context 7 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c8	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c8;			\/* 0x8C Context 8 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
c9	arch/m68k/include/asm/coldfire/skha.h	/^	u32 c9;			\/* 0x90 Context 9 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
cALLOc	common/dlmalloc.c	/^Void_t* cALLOc(size_t n, size_t elem_size)$/;"	f	typeref:typename:Void_t *
cALLOc	include/malloc.h	/^# define cALLOc	/;"	d
cALLOc	include/malloc.h	/^#define cALLOc	/;"	d
cESC	lib/efi_loader/efi_console.c	/^#define cESC /;"	d	file:
c_dr_green_prio_0	include/vsc9953.h	/^	u32	c_dr_green_prio_0;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_1	include/vsc9953.h	/^	u32	c_dr_green_prio_1;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_2	include/vsc9953.h	/^	u32	c_dr_green_prio_2;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_3	include/vsc9953.h	/^	u32	c_dr_green_prio_3;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_4	include/vsc9953.h	/^	u32	c_dr_green_prio_4;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_5	include/vsc9953.h	/^	u32	c_dr_green_prio_5;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_6	include/vsc9953.h	/^	u32	c_dr_green_prio_6;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_green_prio_7	include/vsc9953.h	/^	u32	c_dr_green_prio_7;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_local	include/vsc9953.h	/^	u32	c_dr_local;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_tail	include/vsc9953.h	/^	u32	c_dr_tail;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_0	include/vsc9953.h	/^	u32	c_dr_yellow_prio_0;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_1	include/vsc9953.h	/^	u32	c_dr_yellow_prio_1;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_2	include/vsc9953.h	/^	u32	c_dr_yellow_prio_2;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_3	include/vsc9953.h	/^	u32	c_dr_yellow_prio_3;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_4	include/vsc9953.h	/^	u32	c_dr_yellow_prio_4;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_5	include/vsc9953.h	/^	u32	c_dr_yellow_prio_5;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_6	include/vsc9953.h	/^	u32	c_dr_yellow_prio_6;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_dr_yellow_prio_7	include/vsc9953.h	/^	u32	c_dr_yellow_prio_7;$/;"	m	struct:vsc9953_drop_cntrs	typeref:typename:u32
c_flags	Makefile	/^c_flags := $(KBUILD_CFLAGS) $(cpp_flags)$/;"	m
c_handler	arch/x86/cpu/sipi_vector.S	/^c_handler:$/;"	l
c_handler	arch/x86/include/asm/sipi.h	/^	u32 c_handler;$/;"	m	struct:sipi_params	typeref:typename:u32
c_mask	include/commproc.h	/^	ulong	c_mask;		\/* CRC constant *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
c_mtd_name	drivers/mtd/cfi_mtd.c	/^static char c_mtd_name[16];$/;"	v	typeref:typename:char[16]	file:
c_p_r	arch/sparc/cpu/leon3/usb_uhci.h	/^	int c_p_r[8];		\/* C_PORT_RESET *\/$/;"	m	struct:virt_root_hub	typeref:typename:int[8]
c_p_r	board/mpl/common/usb_uhci.h	/^	int c_p_r[8];             \/* C_PORT_RESET *\/$/;"	m	struct:virt_root_hub	typeref:typename:int[8]
c_payload	tools/mxsimage.c	/^	struct sb_command		c_payload;$/;"	m	struct:sb_cmd_ctx	typeref:struct:sb_command	file:
c_phase	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 c_phase;				\/* 0x2C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
c_pres	include/commproc.h	/^	ulong	c_pres;		\/* CRC preset *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
c_runtime_cpu_setup	arch/arm/cpu/arm1136/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/arm1176/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/arm720t/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/arm920t/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/arm926ejs/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/arm946es/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/armv7m/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/pxa/start.S	/^c_runtime_cpu_setup:$/;"	l
c_runtime_cpu_setup	arch/arm/cpu/sa1100/start.S	/^c_runtime_cpu_setup:$/;"	l
c_rx_bc	include/vsc9953.h	/^	u32	c_rx_bc;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_cat_drop	include/vsc9953.h	/^	u32	c_rx_cat_drop;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_control	include/vsc9953.h	/^	u32	c_rx_control;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_crc	include/vsc9953.h	/^	u32	c_rx_crc;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_frag	include/vsc9953.h	/^	u32	c_rx_frag;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_0	include/vsc9953.h	/^	u32	c_rx_green_prio_0;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_1	include/vsc9953.h	/^	u32	c_rx_green_prio_1;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_2	include/vsc9953.h	/^	u32	c_rx_green_prio_2;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_3	include/vsc9953.h	/^	u32	c_rx_green_prio_3;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_4	include/vsc9953.h	/^	u32	c_rx_green_prio_4;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_5	include/vsc9953.h	/^	u32	c_rx_green_prio_5;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_6	include/vsc9953.h	/^	u32	c_rx_green_prio_6;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_green_prio_7	include/vsc9953.h	/^	u32	c_rx_green_prio_7;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_jabber	include/vsc9953.h	/^	u32	c_rx_jabber;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_long	include/vsc9953.h	/^	u32	c_rx_long;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_mc	include/vsc9953.h	/^	u32	c_rx_mc;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_oct	include/vsc9953.h	/^	u32	c_rx_oct;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_pause	include/vsc9953.h	/^	u32	c_rx_pause;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_0	include/vsc9953.h	/^	u32	c_rx_red_prio_0;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_1	include/vsc9953.h	/^	u32	c_rx_red_prio_1;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_2	include/vsc9953.h	/^	u32	c_rx_red_prio_2;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_3	include/vsc9953.h	/^	u32	c_rx_red_prio_3;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_4	include/vsc9953.h	/^	u32	c_rx_red_prio_4;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_5	include/vsc9953.h	/^	u32	c_rx_red_prio_5;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_6	include/vsc9953.h	/^	u32	c_rx_red_prio_6;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_red_prio_7	include/vsc9953.h	/^	u32	c_rx_red_prio_7;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_short	include/vsc9953.h	/^	u32	c_rx_short;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_symbol_err	include/vsc9953.h	/^	u32	c_rx_symbol_err;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_1024_1526	include/vsc9953.h	/^	u32	c_rx_sz_1024_1526;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_128_255	include/vsc9953.h	/^	u32	c_rx_sz_128_255;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_256_511	include/vsc9953.h	/^	u32	c_rx_sz_256_511;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_512_1023	include/vsc9953.h	/^	u32	c_rx_sz_512_1023;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_64	include/vsc9953.h	/^	u32	c_rx_sz_64;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_65_127	include/vsc9953.h	/^	u32	c_rx_sz_65_127;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_sz_jumbo	include/vsc9953.h	/^	u32	c_rx_sz_jumbo;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_uc	include/vsc9953.h	/^	u32	c_rx_uc;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_0	include/vsc9953.h	/^	u32	c_rx_yellow_prio_0;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_1	include/vsc9953.h	/^	u32	c_rx_yellow_prio_1;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_2	include/vsc9953.h	/^	u32	c_rx_yellow_prio_2;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_3	include/vsc9953.h	/^	u32	c_rx_yellow_prio_3;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_4	include/vsc9953.h	/^	u32	c_rx_yellow_prio_4;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_5	include/vsc9953.h	/^	u32	c_rx_yellow_prio_5;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_6	include/vsc9953.h	/^	u32	c_rx_yellow_prio_6;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_rx_yellow_prio_7	include/vsc9953.h	/^	u32	c_rx_yellow_prio_7;$/;"	m	struct:vsc9953_rx_cntrs	typeref:typename:u32
c_tx_aged	include/vsc9953.h	/^	u32	c_tx_aged;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_bc	include/vsc9953.h	/^	u32	c_tx_bc;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_col	include/vsc9953.h	/^	u32	c_tx_col;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_drop	include/vsc9953.h	/^	u32	c_tx_drop;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_0	include/vsc9953.h	/^	u32	c_tx_green_prio_0;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_1	include/vsc9953.h	/^	u32	c_tx_green_prio_1;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_2	include/vsc9953.h	/^	u32	c_tx_green_prio_2;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_3	include/vsc9953.h	/^	u32	c_tx_green_prio_3;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_4	include/vsc9953.h	/^	u32	c_tx_green_prio_4;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_5	include/vsc9953.h	/^	u32	c_tx_green_prio_5;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_6	include/vsc9953.h	/^	u32	c_tx_green_prio_6;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_green_prio_7	include/vsc9953.h	/^	u32	c_tx_green_prio_7;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_mc	include/vsc9953.h	/^	u32	c_tx_mc;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_oct	include/vsc9953.h	/^	u32	c_tx_oct;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_pause	include/vsc9953.h	/^	u32	c_tx_pause;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_1024_1526	include/vsc9953.h	/^	u32	c_tx_sz_1024_1526;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_128_255	include/vsc9953.h	/^	u32	c_tx_sz_128_255;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_256_511	include/vsc9953.h	/^	u32	c_tx_sz_256_511;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_512_1023	include/vsc9953.h	/^	u32	c_tx_sz_512_1023;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_64	include/vsc9953.h	/^	u32	c_tx_sz_64;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_65_127	include/vsc9953.h	/^	u32	c_tx_sz_65_127;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_sz_jumbo	include/vsc9953.h	/^	u32	c_tx_sz_jumbo;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_uc	include/vsc9953.h	/^	u32	c_tx_uc;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_0	include/vsc9953.h	/^	u32	c_tx_yellow_prio_0;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_1	include/vsc9953.h	/^	u32	c_tx_yellow_prio_1;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_2	include/vsc9953.h	/^	u32	c_tx_yellow_prio_2;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_3	include/vsc9953.h	/^	u32	c_tx_yellow_prio_3;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_4	include/vsc9953.h	/^	u32	c_tx_yellow_prio_4;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_5	include/vsc9953.h	/^	u32	c_tx_yellow_prio_5;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_6	include/vsc9953.h	/^	u32	c_tx_yellow_prio_6;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
c_tx_yellow_prio_7	include/vsc9953.h	/^	u32	c_tx_yellow_prio_7;$/;"	m	struct:vsc9953_tx_cntrs	typeref:typename:u32
ca_delay	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u32 ca_delay;$/;"	v	typeref:typename:u32
ca_hold	include/ddr_spd.h	/^	unsigned char ca_hold;     \/* 33 Addr + Cmd Hold Time After Clk *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
ca_hold	include/ddr_spd.h	/^	unsigned char ca_hold;     \/* 33 Addr+Cmd Hold Time After Clk (tIH) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
ca_hold	include/spd.h	/^	unsigned char ca_hold;     \/* 33 Cmd and Addr signal input hold time *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
ca_setup	include/ddr_spd.h	/^	unsigned char ca_setup;    \/* 32 Addr + Cmd Setup Time Before Clk *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
ca_setup	include/ddr_spd.h	/^	unsigned char ca_setup;    \/* 32 Addr+Cmd Setup Time Before Clk (tIS) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
ca_setup	include/spd.h	/^	unsigned char ca_setup;    \/* 32 Cmd + Addr signal input setup time *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
caam_get_era	drivers/crypto/fsl/sec.c	/^static u8 caam_get_era(void)$/;"	f	typeref:typename:u8	file:
caam_hash	drivers/crypto/fsl/fsl_hash.c	/^int caam_hash(const unsigned char *pbuf, unsigned int buf_len,$/;"	f	typeref:typename:int
caam_hash_algos	drivers/crypto/fsl/fsl_hash.c	/^enum caam_hash_algos {$/;"	g	file:
caam_hash_finish	drivers/crypto/fsl/fsl_hash.c	/^static int caam_hash_finish(void *hash_ctx, void *dest_buf,$/;"	f	typeref:typename:int	file:
caam_hash_init	drivers/crypto/fsl/fsl_hash.c	/^static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo)$/;"	f	typeref:typename:int	file:
caam_hash_template	drivers/crypto/fsl/fsl_hash.c	/^struct caam_hash_template {$/;"	s	file:
caam_hash_update	drivers/crypto/fsl/fsl_hash.c	/^static int caam_hash_update(void *hash_ctx, const void *buf,$/;"	f	typeref:typename:int	file:
caam_jr_strstatus	drivers/crypto/fsl/error.c	/^void caam_jr_strstatus(u32 status)$/;"	f	typeref:typename:void
caam_page_alloc	drivers/crypto/fsl/jobdesc.c	/^int caam_page_alloc(uint8_t page_num, uint8_t partition_num)$/;"	f	typeref:typename:int
cable_length	drivers/net/e1000.h	/^	e1000_cable_length cable_length;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_cable_length
cable_polarity	drivers/net/e1000.h	/^	e1000_rev_polarity cable_polarity;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_rev_polarity
cacal_config0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cacal_config0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
cacal_config1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cacal_config1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
cacal_status	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cacal_status;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
cache	drivers/block/blkcache.c	/^	char *cache;$/;"	m	struct:block_cache_node	typeref:typename:char *	file:
cache	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_cache *cache;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_cache *
cache	include/linux/bch.h	/^	int            *cache;$/;"	m	struct:bch_control	typeref:typename:int *
cache_control	arch/sh/cpu/sh3/cache.c	/^int cache_control(unsigned int cmd)$/;"	f	typeref:typename:int
cache_control	arch/sh/cpu/sh4/cache.c	/^int cache_control(unsigned int cmd)$/;"	f	typeref:typename:int
cache_count	drivers/serial/serial_bfin.c	/^static size_t cache_count;$/;"	v	typeref:typename:size_t	file:
cache_disable	arch/arm/lib/cache-cp15.c	/^static void cache_disable(uint32_t cache_bit)$/;"	f	typeref:typename:void	file:
cache_enable	arch/arm/lib/cache-cp15.c	/^static void cache_enable(uint32_t cache_bit)$/;"	f	typeref:typename:void	file:
cache_find	drivers/block/blkcache.c	/^static struct block_cache_node *cache_find(int iftype, int devnum,$/;"	f	typeref:struct:block_cache_node *	file:
cache_flush	arch/arm/cpu/arm11/cpu.c	/^static void cache_flush(void)$/;"	f	typeref:typename:void	file:
cache_flush	arch/arm/cpu/arm920t/cpu.c	/^static void cache_flush (void)$/;"	f	typeref:typename:void	file:
cache_flush	arch/arm/cpu/arm926ejs/cpu.c	/^static void cache_flush (void)$/;"	f	typeref:typename:void	file:
cache_flush	arch/arm/cpu/arm946es/cpu.c	/^static void cache_flush (void)$/;"	f	typeref:typename:void	file:
cache_flush	arch/arm/cpu/pxa/pxa2xx.c	/^static void cache_flush(void)$/;"	f	typeref:typename:void	file:
cache_flush	arch/arm/cpu/sa1100/cpu.c	/^static void cache_flush (void)$/;"	f	typeref:typename:void	file:
cache_hits	fs/yaffs2/yaffs_guts.h	/^	u32 cache_hits;$/;"	m	struct:yaffs_dev	typeref:typename:u32
cache_init	arch/arc/lib/cache.c	/^void cache_init(void)$/;"	f	typeref:typename:void
cache_init	arch/openrisc/cpu/cache.c	/^int cache_init(void)$/;"	f	typeref:typename:int
cache_inv	arch/arm/mach-mvebu/lowlevel_spl.S	/^	cache_inv:$/;"	l
cache_last_use	fs/yaffs2/yaffs_guts.h	/^	int cache_last_use;$/;"	m	struct:yaffs_dev	typeref:typename:int
cache_line	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 cache_line;$/;"	m	struct:ahb_pciconf	typeref:typename:u32
cache_loop	arch/mips/lib/cache.c	/^#define cache_loop(/;"	d	file:
cache_loop	arch/mips/lib/cache_init.S	/^	.macro cache_loop	curr, end, line_sz, op$/;"	m
cache_post_check	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_check:$/;"	l
cache_post_ddisable	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_ddisable:$/;"	l
cache_post_dinvalidate	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_dinvalidate:$/;"	l
cache_post_dinvalidate	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_dinvalidate:$/;"	l
cache_post_disable	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_disable:$/;"	l
cache_post_dstore	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_dstore:$/;"	l
cache_post_dtouch	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_dtouch:$/;"	l
cache_post_dwb	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_dwb:$/;"	l
cache_post_dwt	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_dwt:$/;"	l
cache_post_idisable	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_idisable:$/;"	l
cache_post_ienable	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_ienable:$/;"	l
cache_post_iinvalidate	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_iinvalidate:$/;"	l
cache_post_iinvalidate	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_iinvalidate:$/;"	l
cache_post_ilock	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_ilock:$/;"	l
cache_post_iunlock	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_iunlock:$/;"	l
cache_post_memset	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_memset:$/;"	l
cache_post_test	post/cpu/mpc8xx/cache.c	/^int cache_post_test (int flags)$/;"	f	typeref:typename:int
cache_post_test	post/cpu/ppc4xx/cache.c	/^int cache_post_test (int flags)$/;"	f	typeref:typename:int
cache_post_test1	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test1:$/;"	l
cache_post_test1	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test1:$/;"	l
cache_post_test2	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test2:$/;"	l
cache_post_test2	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test2:$/;"	l
cache_post_test3	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test3:$/;"	l
cache_post_test3	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test3:$/;"	l
cache_post_test4	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test4:$/;"	l
cache_post_test4	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test4:$/;"	l
cache_post_test5	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test5:$/;"	l
cache_post_test5	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test5:$/;"	l
cache_post_test5_1	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test5_1:$/;"	l
cache_post_test5_2	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test5_2:$/;"	l
cache_post_test5_data	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test5_data:$/;"	l
cache_post_test5_reloc	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test5_reloc:$/;"	l
cache_post_test5_reloc	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test5_reloc:$/;"	l
cache_post_test6	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test6:$/;"	l
cache_post_test6	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test6:$/;"	l
cache_post_test6_1	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test6_1:$/;"	l
cache_post_test6_2	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test6_2:$/;"	l
cache_post_test6_data	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test6_data:$/;"	l
cache_post_test6_reloc	post/cpu/mpc8xx/cache_8xx.S	/^cache_post_test6_reloc:$/;"	l
cache_post_test6_reloc	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test6_reloc:$/;"	l
cache_post_test_inst	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_test_inst:$/;"	l
cache_post_wb	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_wb:$/;"	l
cache_post_wt	post/cpu/ppc4xx/cache_4xx.S	/^cache_post_wt:$/;"	l
cache_t	arch/nds32/include/asm/cache.h	/^enum cache_t {ICACHE, DCACHE};$/;"	g
cache_wback_all	arch/sh/cpu/sh3/cache.c	/^static inline void cache_wback_all(void)$/;"	f	typeref:typename:void	file:
cache_wback_all	arch/sh/cpu/sh4/cache.c	/^static inline void cache_wback_all(void)$/;"	f	typeref:typename:void	file:
cached	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define cached(/;"	d
cached_dclk	arch/blackfin/lib/clocks.c	/^static u_long cached_sclk0, cached_sclk1, cached_dclk;$/;"	v	typeref:typename:u_long	file:
cached_imr1	board/mpl/common/isa.c	/^#define cached_imr1	/;"	d	file:
cached_imr2	board/mpl/common/isa.c	/^#define cached_imr2	/;"	d	file:
cached_irq_mask	board/mpl/common/isa.c	/^static unsigned int cached_irq_mask = 0xfff9;$/;"	v	typeref:typename:unsigned int	file:
cached_lsr	drivers/serial/serial_bfin.c	/^static uart_lsr_t cached_lsr[256];$/;"	v	typeref:typename:uart_lsr_t[256]	file:
cached_rbr	drivers/serial/serial_bfin.c	/^static uart_lsr_t cached_rbr[256];$/;"	v	typeref:typename:uart_lsr_t[256]	file:
cached_sclk	arch/blackfin/lib/clocks.c	/^static u_long cached_sclk_pll_div, cached_sclk;$/;"	v	typeref:typename:u_long	file:
cached_sclk0	arch/blackfin/lib/clocks.c	/^static u_long cached_sclk0, cached_sclk1, cached_dclk;$/;"	v	typeref:typename:u_long	file:
cached_sclk1	arch/blackfin/lib/clocks.c	/^static u_long cached_sclk0, cached_sclk1, cached_dclk;$/;"	v	typeref:typename:u_long	file:
cached_sclk_pll_div	arch/blackfin/lib/clocks.c	/^static u_long cached_sclk_pll_div, cached_sclk;$/;"	v	typeref:typename:u_long	file:
cached_slots	fs/reiserfs/reiserfs_private.h	/^  __u16 cached_slots;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u16
cachehere	board/dbau1x00/lowlevel_init.S	/^cachehere:$/;"	l
cacheloop	board/dbau1x00/lowlevel_init.S	/^cacheloop:$/;"	l
caches_init	examples/standalone/test_burst_lib.S	/^caches_init:$/;"	l
cacrr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cacrr;	\/* 0x0010*\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cacrr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cacrr;$/;"	m	struct:clkctl	typeref:typename:u32
cacrr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cacrr;	\/* 0x0010*\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cacrr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cacrr;$/;"	m	struct:ccm_reg	typeref:typename:u32
caddr_t	include/linux/types.h	/^typedef __kernel_caddr_t	caddr_t;$/;"	t	typeref:typename:__kernel_caddr_t
caddy_answer	board/esd/vme8349/caddy.h	/^struct caddy_answer {$/;"	s
caddy_cmd	board/esd/vme8349/caddy.h	/^struct caddy_cmd {$/;"	s
caddy_cmds	board/esd/vme8349/caddy.h	/^enum caddy_cmds {$/;"	g
caddy_interface	board/esd/vme8349/caddy.c	/^static struct caddy_interface *caddy_interface;$/;"	v	typeref:struct:caddy_interface *	file:
caddy_interface	board/esd/vme8349/caddy.h	/^struct caddy_interface {$/;"	s
cadence_qspi_apb_chipselect	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_chipselect(void *reg_base,$/;"	f	typeref:typename:void
cadence_qspi_apb_cmd2addr	drivers/spi/cadence_qspi_apb.c	/^static unsigned int cadence_qspi_apb_cmd2addr(const unsigned char *addr_buf,$/;"	f	typeref:typename:unsigned int	file:
cadence_qspi_apb_command_read	drivers/spi/cadence_qspi_apb.c	/^int cadence_qspi_apb_command_read(void *reg_base,$/;"	f	typeref:typename:int
cadence_qspi_apb_command_write	drivers/spi/cadence_qspi_apb.c	/^int cadence_qspi_apb_command_write(void *reg_base, unsigned int cmdlen,$/;"	f	typeref:typename:int
cadence_qspi_apb_config_baudrate_div	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_config_baudrate_div(void *reg_base,$/;"	f	typeref:typename:void
cadence_qspi_apb_controller_disable	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_controller_disable(void *reg_base)$/;"	f	typeref:typename:void
cadence_qspi_apb_controller_enable	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_controller_enable(void *reg_base)$/;"	f	typeref:typename:void
cadence_qspi_apb_controller_init	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_controller_init(struct cadence_spi_platdata *plat)$/;"	f	typeref:typename:void
cadence_qspi_apb_delay	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_delay(void *reg_base,$/;"	f	typeref:typename:void
cadence_qspi_apb_enter_xip	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy)$/;"	f	typeref:typename:void
cadence_qspi_apb_exec_flash_cmd	drivers/spi/cadence_qspi_apb.c	/^static int cadence_qspi_apb_exec_flash_cmd(void *reg_base,$/;"	f	typeref:typename:int	file:
cadence_qspi_apb_indirect_read_execute	drivers/spi/cadence_qspi_apb.c	/^int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,$/;"	f	typeref:typename:int
cadence_qspi_apb_indirect_read_setup	drivers/spi/cadence_qspi_apb.c	/^int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,$/;"	f	typeref:typename:int
cadence_qspi_apb_indirect_write_execute	drivers/spi/cadence_qspi_apb.c	/^int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,$/;"	f	typeref:typename:int
cadence_qspi_apb_indirect_write_setup	drivers/spi/cadence_qspi_apb.c	/^int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,$/;"	f	typeref:typename:int
cadence_qspi_apb_readdata_capture	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_readdata_capture(void *reg_base,$/;"	f	typeref:typename:void
cadence_qspi_apb_set_clk_mode	drivers/spi/cadence_qspi_apb.c	/^void cadence_qspi_apb_set_clk_mode(void *reg_base,$/;"	f	typeref:typename:void
cadence_qspi_get_rd_sram_level	drivers/spi/cadence_qspi_apb.c	/^static u32 cadence_qspi_get_rd_sram_level(struct cadence_spi_platdata *plat)$/;"	f	typeref:typename:u32	file:
cadence_qspi_wait_for_data	drivers/spi/cadence_qspi_apb.c	/^static int cadence_qspi_wait_for_data(struct cadence_spi_platdata *plat)$/;"	f	typeref:typename:int	file:
cadence_qspi_wait_idle	drivers/spi/cadence_qspi_apb.c	/^static unsigned int cadence_qspi_wait_idle(void *reg_base)$/;"	f	typeref:typename:unsigned int	file:
cadence_spi_ids	drivers/spi/cadence_qspi.c	/^static const struct udevice_id cadence_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cadence_spi_ofdata_to_platdata	drivers/spi/cadence_qspi.c	/^static int cadence_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
cadence_spi_ops	drivers/spi/cadence_qspi.c	/^static const struct dm_spi_ops cadence_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
cadence_spi_platdata	drivers/spi/cadence_qspi.h	/^struct cadence_spi_platdata {$/;"	s
cadence_spi_priv	drivers/spi/cadence_qspi.h	/^struct cadence_spi_priv {$/;"	s
cadence_spi_probe	drivers/spi/cadence_qspi.c	/^static int cadence_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
cadence_spi_set_mode	drivers/spi/cadence_qspi.c	/^static int cadence_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
cadence_spi_set_speed	drivers/spi/cadence_qspi.c	/^static int cadence_spi_set_speed(struct udevice *bus, uint hz)$/;"	f	typeref:typename:int	file:
cadence_spi_write_speed	drivers/spi/cadence_qspi.c	/^static int cadence_spi_write_speed(struct udevice *bus, uint hz)$/;"	f	typeref:typename:int	file:
cadence_spi_xfer	drivers/spi/cadence_qspi.c	/^static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
cadmus_reg	board/freescale/common/cadmus.c	/^typedef struct cadmus_reg {$/;"	s	file:
cadmus_reg_t	board/freescale/common/cadmus.c	/^} cadmus_reg_t;$/;"	t	typeref:struct:cadmus_reg	file:
cae	arch/m68k/include/asm/immap_5301x.h	/^	u8 cae;			\/* 0x04 Center Align Enable *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cairo_serial	board/quipos/cairo/cairo.c	/^static const struct ns16550_platdata cairo_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
cal	board/mpl/mip405/mip405.c	/^	unsigned char cal;		\/* cas Latency (will be programmend as cal-1) *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
cal	board/mpl/pati/pati.c	/^	unsigned char cal;		\/* cas Latency  0:CAL=2 1:CAL=3 *\/$/;"	m	struct:__anon377858d00108	typeref:typename:unsigned char	file:
cal_debug_info	drivers/ddr/altera/sequencer.h	/^	u32	cal_debug_info;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
cal_drvdn	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvdn:5;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:5	file:
cal_drvdn	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvdn:5;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:5	file:
cal_drvdn_slwr	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvdn_slwr:2;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:2	file:
cal_drvdn_slwr	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvdn_slwr:2;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:2	file:
cal_drvup	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvup:5;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:5	file:
cal_drvup	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvup:5;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:5	file:
cal_drvup_slwf	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvup_slwf:2;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:2	file:
cal_drvup_slwf	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cal_drvup_slwf:2;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:2	file:
cal_indextable	board/mpl/pip405/pip405.c	/^static const unsigned char cal_indextable[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
cal_mr4	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 cal_mr4;		\/* 0x2c: Calibration and MR4 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
cal_status	drivers/ddr/altera/sequencer.h	/^	u32	cal_status;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
calc_borrow_chain	drivers/bios_emulator/x86emu/prim_ops.c	/^static void calc_borrow_chain(int bits, u32 d, u32 s, u32 res, int set_carry)$/;"	f	typeref:typename:void	file:
calc_carry_chain	drivers/bios_emulator/x86emu/prim_ops.c	/^static void calc_carry_chain(int bits, u32 d, u32 s, u32 res, int set_carry)$/;"	f	typeref:typename:void	file:
calc_cnt	fs/ubifs/debug.c	/^	int calc_cnt;$/;"	m	struct:fsck_inode	typeref:typename:int	file:
calc_cs_num	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int calc_cs_num(u32 dev_num, u32 if_id, u32 *cs_num)$/;"	f	typeref:typename:int	file:
calc_data_growth	fs/ubifs/budget.c	/^static int calc_data_growth(const struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
calc_dd_growth	fs/ubifs/budget.c	/^static int calc_dd_growth(const struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
calc_dflt_lpt_geom	fs/ubifs/lpt.c	/^static int calc_dflt_lpt_geom(struct ubifs_info *c, int *main_lebs,$/;"	f	typeref:typename:int	file:
calc_div	arch/arm/cpu/armv7/mx5/clock.c	/^#define calc_div(/;"	d	file:
calc_esbchdr_esbc_hash	board/freescale/common/fsl_validate.c	/^static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:int	file:
calc_fbsize	drivers/video/atmel_lcdfb.c	/^ulong calc_fbsize(void)$/;"	f	typeref:typename:ulong
calc_fbsize	drivers/video/da8xx-fb.c	/^#define calc_fbsize(/;"	d	file:
calc_fbsize	drivers/video/mpc8xx_lcd.c	/^ulong calc_fbsize (void)$/;"	f	typeref:typename:ulong
calc_fbsize	drivers/video/mx3fb.c	/^ulong calc_fbsize(void)$/;"	f	typeref:typename:ulong
calc_fbsize	drivers/video/pxa_lcd.c	/^ulong calc_fbsize (void)$/;"	f	typeref:typename:ulong
calc_idx_growth	fs/ubifs/budget.c	/^static int calc_idx_growth(const struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
calc_idx_sz	fs/ubifs/ubifs.h	/^	unsigned long long calc_idx_sz;$/;"	m	struct:ubifs_info	typeref:typename:unsigned long long
calc_img_key_hash	board/freescale/common/fsl_validate.c	/^static int calc_img_key_hash(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:int	file:
calc_needed_buswidth	drivers/usb/host/sl811-hcd.c	/^static int calc_needed_buswidth(int bytes, int need_preamble)$/;"	f	typeref:typename:int	file:
calc_nnode_num	fs/ubifs/lpt.c	/^static int calc_nnode_num(int row, int col)$/;"	f	typeref:typename:int	file:
calc_nnode_num_from_parent	fs/ubifs/lpt.c	/^static int calc_nnode_num_from_parent(const struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
calc_pll_params	arch/arm/cpu/armv7/mx5/clock.c	/^static int calc_pll_params(u32 ref, u32 target, struct pll_param *pll)$/;"	f	typeref:typename:int	file:
calc_pnode_num_from_parent	fs/ubifs/lpt.c	/^static int calc_pnode_num_from_parent(const struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
calc_shifts	fs/yaffs2/yaffs_guts.c	/^static inline u32 calc_shifts(u32 x)$/;"	f	typeref:typename:u32	file:
calc_shifts_ceiling	fs/yaffs2/yaffs_guts.c	/^static inline u32 calc_shifts_ceiling(u32 x)$/;"	f	typeref:typename:u32	file:
calc_size	board/esd/cpci405/flash.c	/^unsigned long calc_size(unsigned long size)$/;"	f	typeref:typename:unsigned long
calc_sz	fs/ubifs/debug.c	/^	long long calc_sz;$/;"	m	struct:fsck_inode	typeref:typename:long long	file:
calc_tick	drivers/i2c/mvtwsi.c	/^inline uint calc_tick(uint speed)$/;"	f	typeref:typename:uint
calc_xcnt	fs/ubifs/debug.c	/^	long long calc_xcnt;$/;"	m	struct:fsck_inode	typeref:typename:long long	file:
calc_xnms	fs/ubifs/debug.c	/^	long long calc_xnms;$/;"	m	struct:fsck_inode	typeref:typename:long long	file:
calc_xsz	fs/ubifs/debug.c	/^	long long calc_xsz;$/;"	m	struct:fsck_inode	typeref:typename:long long	file:
calculate	include/image.h	/^	int (*calculate)(const char *name,$/;"	m	struct:checksum_algo	typeref:typename:int (*)(const char * name,const struct image_region region[],int region_count,uint8_t * checksum)
calculate	include/linux/mtd/nand.h	/^	int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,const uint8_t * dat,uint8_t * ecc_code)
calculate_cmp_img_sig	board/freescale/common/fsl_validate.c	/^static int calculate_cmp_img_sig(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:int	file:
calculate_delay	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^static u32 calculate_delay(u32 base, u16 offset, u16 den)$/;"	f	typeref:typename:u32	file:
calculate_hash	common/image-fit.c	/^int calculate_hash(const void *data, int data_len, const char *algo,$/;"	f	typeref:typename:int
calculate_mc_private_ram_params	drivers/net/fsl-mc/mc.c	/^static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,$/;"	f	typeref:typename:int	file:
calculate_next_voltage	drivers/power/tps6586x.c	/^static int calculate_next_voltage(int voltage, int target, int step)$/;"	f	typeref:typename:int	file:
calculate_sign	include/image.h	/^	const EVP_MD *(*calculate_sign)(void);$/;"	m	struct:checksum_algo	typeref:typename:const EVP_MD * (*)(void)
calculatedBlockCRC	lib/bzip2/bzlib_private.h	/^      UInt32   calculatedBlockCRC;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32
calculatedCombinedCRC	lib/bzip2/bzlib_private.h	/^      UInt32   calculatedCombinedCRC;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32
calib_lfifo_offset	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	calib_lfifo_offset;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
calib_vfifo_offset	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	calib_vfifo_offset;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
calibrate_24mhz_bclk	arch/x86/cpu/broadwell/cpu.c	/^static int calibrate_24mhz_bclk(void)$/;"	f	typeref:typename:int	file:
calibrate_iodelay	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^static int calibrate_iodelay(u32 base)$/;"	f	typeref:typename:int	file:
calibrate_pll	board/freescale/b4860qds/b4860qds.c	/^static int calibrate_pll(serdes_corenet_t *srds_regs, int pll_num)$/;"	f	typeref:typename:int	file:
calibration	drivers/fpga/lattice.c	/^void calibration(void)$/;"	f	typeref:typename:void
calibration_update_control	drivers/ddr/marvell/a38x/ddr3_training.c	/^u8 calibration_update_control;	\/* 2 external only, 1 is internal only *\/$/;"	v	typeref:typename:u8
calimain_get_osc_freq	board/omicron/calimain/calimain.c	/^int calimain_get_osc_freq(void)$/;"	f	typeref:typename:int
call	include/misc.h	/^	int (*call)(struct udevice *dev, int msgid, void *tx_msg, int tx_size,$/;"	m	struct:misc_ops	typeref:typename:int (*)(struct udevice * dev,int msgid,void * tx_msg,int tx_size,void * rx_msg,int rx_size)
call	net/nfs.h	/^		} call;$/;"	m	union:rpc_t::__anon8c947878010a	typeref:struct:rpc_t::__anon8c947878010a::__anon8c9478780208
call	tools/mxsimage.h	/^	} call;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960a08
call_accum	lib/trace.c	/^	uintptr_t *call_accum;$/;"	m	struct:trace_hdr	typeref:typename:uintptr_t *	file:
call_board_init_f	arch/nds32/cpu/n1213/start.S	/^call_board_init_f:$/;"	l
call_board_init_r	arch/nds32/cpu/n1213/start.S	/^call_board_init_r:$/;"	l
call_bootm	cmd/spl.c	/^static int call_bootm(int argc, char * const argv[], const char *subcommand[])$/;"	f	typeref:typename:int	file:
call_count	include/trace.h	/^	uint32_t call_count;		\/* Number of times called *\/$/;"	m	struct:trace_output_func	typeref:typename:uint32_t
call_count	lib/trace.c	/^	u64 call_count;		\/* Total number of tracked function calls *\/$/;"	m	struct:trace_hdr	typeref:typename:u64	file:
call_count	tools/proftool.c	/^	unsigned long call_count;$/;"	m	struct:func_info	typeref:typename:unsigned long	file:
call_count	tools/proftool.c	/^int call_count;$/;"	v	typeref:typename:int
call_list	tools/proftool.c	/^struct trace_call *call_list;$/;"	v	typeref:struct:trace_call *
call_management	include/usbdescriptors.h	/^		struct usb_class_call_management_descriptor call_management;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_call_management_descriptor
call_mgmt_descriptor	drivers/usb/gadget/ether.c	/^static const struct usb_cdc_call_mgmt_descriptor call_mgmt_descriptor = {$/;"	v	typeref:typename:const struct usb_cdc_call_mgmt_descriptor	file:
callback	arch/sandbox/include/asm/getopt.h	/^	int (*callback)(struct sandbox_state *state, const char *opt);$/;"	m	struct:sandbox_cmdline_option	typeref:typename:int (*)(struct sandbox_state * state,const char * opt)
callback	drivers/crypto/fsl/jr.h	/^	void (*callback)(uint32_t status, void *arg);$/;"	m	struct:jr_info	typeref:typename:void (*)(uint32_t status,void * arg)
callback	include/env_callback.h	/^	int (*callback)(const char *name, const char *value, enum env_op op,$/;"	m	struct:env_clbk_tbl	typeref:typename:int (*)(const char * name,const char * value,enum env_op op,int flags)
callback	include/linux/mtd/mtd.h	/^	void (*callback) (struct erase_info *self);$/;"	m	struct:erase_info	typeref:typename:void (*)(struct erase_info * self)
callback	include/search.h	/^	int (*callback)(const char *name, const char *value, enum env_op op,$/;"	m	struct:entry	typeref:typename:int (*)(const char * name,const char * value,enum env_op op,int flags)
callback_head	include/linux/compat.h	/^struct callback_head {$/;"	s
callback_list	common/env_callback.c	/^static const char *callback_list;$/;"	v	typeref:typename:const char *	file:
caller	include/trace.h	/^	uint32_t caller;	\/* Caller function offset *\/$/;"	m	struct:trace_call	typeref:typename:uint32_t
callers_pc	arch/sparc/include/asm/ptrace.h	/^	unsigned long callers_pc;$/;"	m	struct:sparc_stackf	typeref:typename:unsigned long
calloc	common/malloc_simple.c	/^void *calloc(size_t nmemb, size_t elem_size)$/;"	f	typeref:typename:void *
calloc	include/malloc.h	/^#pragma weak calloc /;"	d
callout.graphics	doc/DocBook/stylesheet.xsl	/^<param name="callout.graphics">0<\/param>$/;"	p
calls_no	api/api.c	/^static int calls_no;$/;"	v	typeref:typename:int	file:
calls_table	api/api.c	/^static cfp_t calls_table[API_MAXCALL] = { NULL, };$/;"	v	typeref:typename:cfp_t[]	file:
calxeda_eth_dev	drivers/net/calxedaxgmac.c	/^struct calxeda_eth_dev {$/;"	s	file:
calxedaxgmac_initialize	drivers/net/calxedaxgmac.c	/^int calxedaxgmac_initialize(u32 id, ulong base_addr)$/;"	f	typeref:typename:int
cam0_data0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data0;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data1;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data2;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data3;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data4	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data4;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data5	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data5;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data6	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data6;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data7	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data7;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data8	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data8;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_data9	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_data9;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_field	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_field;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_hd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_hd;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_pclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_pclk;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_vd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_vd;$/;"	m	struct:pad_signals	typeref:typename:int
cam0_wen	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam0_wen;$/;"	m	struct:pad_signals	typeref:typename:int
cam1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cam1;		\/* Carry Mask One *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
cam1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	cam1;		\/* 0x24738 - Carry Mask Register One *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
cam1	include/fsl_dtsec.h	/^	u32	cam1;		\/* carry register 1 mask *\/$/;"	m	struct:dtsec	typeref:typename:u32
cam1	include/tsec.h	/^	u32	cam1;		\/* Carry Register One Mask *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
cam1_data0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data0;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data1;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data2;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data3;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data4	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data4;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data5	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data5;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data6	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data6;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data7	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data7;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data8	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data8;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_data9	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_data9;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_field	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_field;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_hd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_hd;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_pclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_pclk;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_vd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_vd;$/;"	m	struct:pad_signals	typeref:typename:int
cam1_wen	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int cam1_wen;$/;"	m	struct:pad_signals	typeref:typename:int
cam2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cam2;		\/* Carry Mask Two *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
cam2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	cam2;		\/* 0x2473c - Carry Mask Register Two *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
cam2	include/fsl_dtsec.h	/^	u32	cam2;		\/* carry register 2 mask *\/$/;"	m	struct:dtsec	typeref:typename:u32
cam2	include/tsec.h	/^	u32	cam2;		\/* Carry Register Two Mask *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
cam_1v8_reg	arch/arm/dts/tegra30-cardhu.dts	/^		cam_1v8_reg: regulator@1 {$/;"	l
cam_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cam_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cam_i2c	arch/arm/dts/tegra186.dtsi	/^	cam_i2c: i2c@3180000 {$/;"	l
cam_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cam_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cam_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cam_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cam_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cam_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
camdivn	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	camdivn;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
camera_control	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	camera_control;$/;"	m	struct:exynos4_sysreg	typeref:typename:unsigned int
can	arch/arm/dts/at91sam9263.dtsi	/^			can: can@fffac000 {$/;"	l
can0	arch/arm/dts/socfpga.dtsi	/^		can0: can@ffc00000 {$/;"	l
can0	arch/arm/dts/zynq-7000.dtsi	/^		can0: can@e0008000 {$/;"	l	label:amba
can0	arch/arm/dts/zynqmp.dtsi	/^		can0: can@ff060000 {$/;"	l	label:amba
can0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	can0_aper_clk, can1_aper_clk, i2c0_aper_clk, i2c1_aper_clk,$/;"	e	enum:zynq_clk
can0_clk	arch/arm/dts/sama5d2.dtsi	/^					can0_clk: can0_clk@56 {$/;"	l
can0_clk	arch/arm/dts/socfpga.dtsi	/^					can0_clk: can0_clk {$/;"	l
can0_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	fclk0_clk, fclk1_clk, fclk2_clk, fclk3_clk, can0_clk, can1_clk,$/;"	e	enum:zynq_clk
can0_gclk	arch/arm/dts/sama5d2.dtsi	/^					can0_gclk: can0_gclk@56 {$/;"	l
can1	arch/arm/dts/imx6qdl.dtsi	/^			can1: flexcan@02090000 {$/;"	l
can1	arch/arm/dts/socfpga.dtsi	/^		can1: can@ffc01000 {$/;"	l
can1	arch/arm/dts/zynq-7000.dtsi	/^		can1: can@e0009000 {$/;"	l	label:amba
can1	arch/arm/dts/zynqmp.dtsi	/^		can1: can@ff070000 {$/;"	l	label:amba
can1	arch/powerpc/include/asm/immap_83xx.h	/^	u8			can1[0x1000];	\/* Flexcan 1 *\/$/;"	m	struct:immap	typeref:typename:u8[0x1000]
can1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	can0_aper_clk, can1_aper_clk, i2c0_aper_clk, i2c1_aper_clk,$/;"	e	enum:zynq_clk
can1_clk	arch/arm/dts/sama5d2.dtsi	/^					can1_clk: can1_clk@57 {$/;"	l
can1_clk	arch/arm/dts/socfpga.dtsi	/^					can1_clk: can1_clk {$/;"	l
can1_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	fclk0_clk, fclk1_clk, fclk2_clk, fclk3_clk, can0_clk, can1_clk,$/;"	e	enum:zynq_clk
can1_gclk	arch/arm/dts/sama5d2.dtsi	/^					can1_gclk: can1_gclk@57 {$/;"	l
can2	arch/arm/dts/imx6qdl.dtsi	/^			can2: flexcan@02094000 {$/;"	l
can2	arch/powerpc/include/asm/immap_83xx.h	/^	u8			can2[0x1000];	\/* Flexcan 2 *\/$/;"	m	struct:immap	typeref:typename:u8[0x1000]
can3	arch/powerpc/include/asm/immap_83xx.h	/^	u8			can3[0x1000];	\/* Flexcan 3 *\/$/;"	m	struct:immap	typeref:typename:u8[0x1000]
can3_usb2_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 can3_usb2_mux;	\/* CAN3 and USB2 Selection *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
can4	arch/powerpc/include/asm/immap_83xx.h	/^	u8			can4[0x1000];	\/* Flexcan 4 *\/$/;"	m	struct:immap	typeref:typename:u8[0x1000]
can_bulk_combine	drivers/usb/musb-new/musb_core.h	/^#define	can_bulk_combine(/;"	d
can_bulk_split	drivers/usb/musb-new/musb_core.h	/^#define	can_bulk_split(/;"	d
can_clk	arch/arm/dts/at91sam9263.dtsi	/^					can_clk: can_clk {$/;"	l
can_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 can_clk_ctrl; \/* 0x15c *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
can_ctrl	arch/m68k/include/asm/coldfire/flexcan.h	/^typedef struct can_ctrl {$/;"	s
can_dbg_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 can_dbg_ctrl;$/;"	m	struct:sysconf83xx	typeref:typename:u32
can_detect_long_mode	arch/x86/cpu/cpu.c	/^static bool can_detect_long_mode(void)$/;"	f	typeref:typename:bool	file:
can_dma	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				can_dma:1;$/;"	m	struct:usba_ep	typeref:typename:unsigned int:1
can_dma	include/linux/usb/atmel_usba_udc.h	/^	int can_dma;$/;"	m	struct:usba_ep_data	typeref:typename:int
can_init	board/tqc/tqm5200/cmd_stk52xx.c	/^int can_init(void)$/;"	f	typeref:typename:int
can_isoc	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				can_isoc:1;$/;"	m	struct:usba_ep	typeref:typename:unsigned int:1
can_isoc	include/linux/usb/atmel_usba_udc.h	/^	int can_isoc;$/;"	m	struct:usba_ep_data	typeref:typename:int
can_line_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 can_line_freq;	\/* offset 0x40 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
can_merge	include/libfdt.h	/^	int can_merge;		\/* 1 if we can merge with previous region *\/$/;"	m	struct:fdt_region_state	typeref:typename:int
can_mioclk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 can_mioclk_ctrl; \/* 0x160 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
can_msg_t	arch/m68k/include/asm/coldfire/flexcan.h	/^} can_msg_t;$/;"	t	typeref:struct:can_msgbuf_ctrl
can_msgbuf_ctrl	arch/m68k/include/asm/coldfire/flexcan.h	/^typedef struct can_msgbuf_ctrl {$/;"	s
can_read_dcc	drivers/serial/arm_dcc.c	/^#define can_read_dcc(/;"	d	file:
can_stall	drivers/usb/gadget/f_mass_storage.c	/^	char			can_stall;$/;"	m	struct:fsg_config	typeref:typename:char	file:
can_stall	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		can_stall:1;$/;"	m	struct:fsg_common	typeref:typename:unsigned int:1	file:
can_t	arch/m68k/include/asm/coldfire/flexcan.h	/^} can_t;$/;"	t	typeref:struct:can_ctrl
can_use_rp	fs/ubifs/budget.c	/^static int can_use_rp(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
can_write_dcc	drivers/serial/arm_dcc.c	/^#define can_write_dcc(/;"	d	file:
canbtr0	include/mpc5xxx.h	/^	volatile u8  canbtr0;           \/* MSCAN + 0x04 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canbtr1	include/mpc5xxx.h	/^	volatile u8  canbtr1;           \/* MSCAN + 0x05 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cancel_out	arch/arm/cpu/armv7/omap-common/utils.c	/^void cancel_out(u32 *num, u32 *den, u32 den_limit)$/;"	f	typeref:typename:void
cancel_wbuf_timer_nolock	fs/ubifs/io.c	/^static void cancel_wbuf_timer_nolock(struct ubifs_wbuf *wbuf)$/;"	f	typeref:typename:void	file:
canctl0	include/mpc5xxx.h	/^	volatile u8  canctl0;           \/* MSCAN + 0x00 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canctl1	include/mpc5xxx.h	/^	volatile u8  canctl1;           \/* MSCAN + 0x01 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canex_ctrl	arch/m68k/include/asm/immap_5227x.h	/^typedef struct canex_ctrl {$/;"	s
canex_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct canex_ctrl {$/;"	s
canex_ctrl	arch/m68k/include/asm/immap_5253.h	/^typedef struct canex_ctrl {$/;"	s
canex_ctrl	arch/m68k/include/asm/immap_5282.h	/^typedef struct canex_ctrl {$/;"	s
canex_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct canex_ctrl {$/;"	s
canex_ctrl	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct canex_ctrl {$/;"	s
canex_t	arch/m68k/include/asm/immap_5227x.h	/^} canex_t;$/;"	t	typeref:struct:canex_ctrl
canex_t	arch/m68k/include/asm/immap_5235.h	/^} canex_t;$/;"	t	typeref:struct:canex_ctrl
canex_t	arch/m68k/include/asm/immap_5253.h	/^} canex_t;$/;"	t	typeref:struct:canex_ctrl
canex_t	arch/m68k/include/asm/immap_5282.h	/^} canex_t;$/;"	t	typeref:struct:canex_ctrl
canex_t	arch/m68k/include/asm/immap_5329.h	/^} canex_t;$/;"	t	typeref:struct:canex_ctrl
canex_t	arch/m68k/include/asm/immap_547x_8x.h	/^} canex_t;$/;"	t	typeref:struct:canex_ctrl
canidac	include/mpc5xxx.h	/^	volatile u8  canidac;           \/* MSCAN + 0x15 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar0	include/mpc5xxx.h	/^	volatile u8  canidar0;          \/* MSCAN + 0x20 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar1	include/mpc5xxx.h	/^	volatile u8  canidar1;          \/* MSCAN + 0x21 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar2	include/mpc5xxx.h	/^	volatile u8  canidar2;          \/* MSCAN + 0x24 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar3	include/mpc5xxx.h	/^	volatile u8  canidar3;          \/* MSCAN + 0x25 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar4	include/mpc5xxx.h	/^	volatile u8  canidar4;          \/* MSCAN + 0x30 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar5	include/mpc5xxx.h	/^	volatile u8  canidar5;          \/* MSCAN + 0x31 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar6	include/mpc5xxx.h	/^	volatile u8  canidar6;          \/* MSCAN + 0x34 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidar7	include/mpc5xxx.h	/^	volatile u8  canidar7;          \/* MSCAN + 0x35 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr0	include/mpc5xxx.h	/^	volatile u8  canidmr0;          \/* MSCAN + 0x28 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr1	include/mpc5xxx.h	/^	volatile u8  canidmr1;          \/* MSCAN + 0x29 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr2	include/mpc5xxx.h	/^	volatile u8  canidmr2;          \/* MSCAN + 0x2C *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr3	include/mpc5xxx.h	/^	volatile u8  canidmr3;          \/* MSCAN + 0x2D *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr4	include/mpc5xxx.h	/^	volatile u8  canidmr4;          \/* MSCAN + 0x38 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr5	include/mpc5xxx.h	/^	volatile u8  canidmr5;          \/* MSCAN + 0x39 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr6	include/mpc5xxx.h	/^	volatile u8  canidmr6;          \/* MSCAN + 0x3C *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canidmr7	include/mpc5xxx.h	/^	volatile u8  canidmr7;          \/* MSCAN + 0x3D *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canrflg	include/mpc5xxx.h	/^	volatile u8  canrflg;           \/* MSCAN + 0x08 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canrier	include/mpc5xxx.h	/^	volatile u8  canrier;           \/* MSCAN + 0x09 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canrxerr	include/mpc5xxx.h	/^	volatile u8  canrxerr;          \/* MSCAN + 0x1C *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
canrxfg	include/mpc5xxx.h	/^	struct mscan_buffer canrxfg;    \/* MSCAN + 0x40 *\/    \/* Foreground receive buffer *\/$/;"	m	struct:mpc5xxx_mscan	typeref:struct:mscan_buffer
cantaak	include/mpc5xxx.h	/^	volatile u8  cantaak;           \/* MSCAN + 0x11 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cantarq	include/mpc5xxx.h	/^	volatile u8  cantarq;           \/* MSCAN + 0x10 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cantbsel	include/mpc5xxx.h	/^	volatile u8  cantbsel;          \/* MSCAN + 0x14 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cantflg	include/mpc5xxx.h	/^	volatile u8  cantflg;           \/* MSCAN + 0x0C *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cantier	include/mpc5xxx.h	/^	volatile u8  cantier;           \/* MSCAN + 0x0D *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cantxerr	include/mpc5xxx.h	/^	volatile u8  cantxerr;          \/* MSCAN + 0x1D *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u8
cantxfg	include/mpc5xxx.h	/^	struct mscan_buffer cantxfg;    \/* MSCAN + 0x60 *\/    \/* Foreground transmit buffer *\/$/;"	m	struct:mpc5xxx_mscan	typeref:struct:mscan_buffer
canyonlands_sata_init	board/amcc/canyonlands/canyonlands.c	/^static void canyonlands_sata_init(int board_type)$/;"	f	typeref:typename:void	file:
cap	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 cap;		\/* Capture internal counter *\/$/;"	m	struct:gptmr	typeref:typename:u16
cap	drivers/block/dwc_ahsata.c	/^	u32 cap;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
cap	drivers/tpm/tpm_tis.h	/^	__be32 cap;$/;"	m	struct:tpm_getcap_params_in	typeref:typename:__be32
cap	drivers/tpm/tpm_tis.h	/^	union cap_t cap;$/;"	m	struct:tpm_getcap_params_out	typeref:union:cap_t
cap	include/ahci.h	/^	u32	cap;	\/* cache of HOST_CAP register *\/$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
cap	include/slre.h	/^struct cap {$/;"	s
cap0_trig_cntl	drivers/video/ati_radeon_fb.h	/^	u32		cap0_trig_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
cap1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cap1;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int
cap1_trig_cntl	drivers/video/ati_radeon_fb.h	/^	u32		cap1_trig_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
cap2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cap2;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int
cap2	drivers/block/dwc_ahsata.c	/^	u32 cap2;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
cap3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cap3;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int
cap4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cap4;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int
cap_length	arch/arm/include/asm/arch-tegra/usb.h	/^	u16 cap_length;$/;"	m	struct:usb_ctlr	typeref:typename:u16
cap_size	drivers/tpm/tpm_tis.h	/^	__be32 cap_size;$/;"	m	struct:tpm_getcap_params_out	typeref:typename:__be32
cap_t	drivers/tpm/tpm_tis.h	/^union cap_t {$/;"	u
capa	arch/arm/include/asm/omap_mmc.h	/^	unsigned int capa;		\/* 0x140 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
capabilities	include/linux/screen_info.h	/^	__u32 capabilities;     \/* 0x36 *\/$/;"	m	struct:screen_info	typeref:typename:__u32
capabilities	include/vbe.h	/^	u32 capabilities;$/;"	m	struct:vbe_info	typeref:typename:u32
capability	include/ata.h	/^	unsigned char	capability;	\/* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
capacitor	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^	u32 capacitor;$/;"	m	struct:clk_synth	typeref:typename:u32
capacity	include/fsl_ddr_dimm_params.h	/^	unsigned long long capacity;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned long long
capacity	include/mmc.h	/^	u64 capacity;$/;"	m	struct:mmc	typeref:typename:u64
capacity	include/power/battery.h	/^	unsigned int capacity;$/;"	m	struct:battery	typeref:typename:unsigned int
capacity_boot	include/mmc.h	/^	u64 capacity_boot;$/;"	m	struct:mmc	typeref:typename:u64
capacity_gp	include/mmc.h	/^	u64 capacity_gp[4];$/;"	m	struct:mmc	typeref:typename:u64[4]
capacity_rpmb	include/mmc.h	/^	u64 capacity_rpmb;$/;"	m	struct:mmc	typeref:typename:u64
capacity_user	include/mmc.h	/^	u64 capacity_user;$/;"	m	struct:mmc	typeref:typename:u64
capareg	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	capareg;	\/* _CAPABILITIES_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
cape0_data	arch/arm/dts/am335x-bone-common.dtsi	/^		cape0_data: cape_data@0 {$/;"	l	label:cape_eeprom0
cape1_data	arch/arm/dts/am335x-bone-common.dtsi	/^		cape1_data: cape_data@0 {$/;"	l	label:cape_eeprom1
cape2_data	arch/arm/dts/am335x-bone-common.dtsi	/^		cape2_data: cape_data@0 {$/;"	l	label:cape_eeprom2
cape3_data	arch/arm/dts/am335x-bone-common.dtsi	/^		cape3_data: cape_data@0 {$/;"	l	label:cape_eeprom3
cape_eeprom0	arch/arm/dts/am335x-bone-common.dtsi	/^	cape_eeprom0: cape_eeprom0@54 {$/;"	l
cape_eeprom1	arch/arm/dts/am335x-bone-common.dtsi	/^	cape_eeprom1: cape_eeprom1@55 {$/;"	l
cape_eeprom2	arch/arm/dts/am335x-bone-common.dtsi	/^	cape_eeprom2: cape_eeprom2@56 {$/;"	l
cape_eeprom3	arch/arm/dts/am335x-bone-common.dtsi	/^	cape_eeprom3: cape_eeprom3@57 {$/;"	l
capi_control	include/usbdescriptors.h	/^		struct usb_class_capi_control_descriptor capi_control;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_capi_control_descriptor
capi_name	fs/ubifs/ubifs.h	/^	const char *capi_name;$/;"	m	struct:ubifs_compressor	typeref:typename:const char *
caplength	arch/m68k/include/asm/immap_5329.h	/^	u8 caplength;		\/* 0x100 Capability Register Length *\/$/;"	m	struct:usb_otg	typeref:typename:u8
caplength	include/usb/ehci-ci.h	/^	u8	caplength;	\/* 0x100 - Capability Register Length *\/$/;"	m	struct:usb_ehci	typeref:typename:u8
caps	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int caps;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
caps	drivers/mmc/uniphier-sd.c	/^	u32 caps;$/;"	m	struct:uniphier_sd_priv	typeref:typename:u32	file:
caps	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	unsigned caps;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:unsigned
caps	drivers/usb/gadget/at91_udc.h	/^	const struct at91_udc_caps	*caps;$/;"	m	struct:at91_udc	typeref:typename:const struct at91_udc_caps *
caps	include/dwmmc.h	/^	unsigned int caps;$/;"	m	struct:dwmci_host	typeref:typename:unsigned int
caps_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 caps_0;$/;"	m	struct:dma4	typeref:typename:u32
caps_2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 caps_2;$/;"	m	struct:dma4	typeref:typename:u32
caps_3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 caps_3;$/;"	m	struct:dma4	typeref:typename:u32
caps_4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 caps_4;$/;"	m	struct:dma4	typeref:typename:u32
caps_lock	board/mpl/common/kbd.c	/^static unsigned char caps_lock = 0;$/;"	v	typeref:typename:unsigned char	file:
caps_sku	arch/x86/include/asm/me_common.h	/^	struct mefwcaps_sku caps_sku;$/;"	m	struct:me_fwcaps	typeref:struct:mefwcaps_sku
capt	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 capt[2];	\/* input capture 1-2 *\/$/;"	m	struct:gpt_regs	typeref:typename:u32[2]
capt	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 capt[2];	\/* input capture 1-2 *\/$/;"	m	struct:gpt_regs	typeref:typename:u32[2]
capture_address	arch/powerpc/include/asm/immap_83xx.h	/^	u32 capture_address;	\/* Memory Error Address Capture *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
capture_address	include/fsl_immap.h	/^	u32	capture_address;	\/* Error Addr Capture *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
capture_attributes	arch/powerpc/include/asm/immap_83xx.h	/^	u32 capture_attributes;	\/* Memory Error Attributes Capture *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
capture_attributes	include/fsl_immap.h	/^	u32	capture_attributes;	\/* Error Attrs Capture *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
capture_data_hi	arch/powerpc/include/asm/immap_83xx.h	/^	u32 capture_data_hi;	\/* Memory Data Path Read Capture High *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
capture_data_hi	include/fsl_immap.h	/^	u32	capture_data_hi;	\/* Data Path Read Capture High *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
capture_data_lo	arch/powerpc/include/asm/immap_83xx.h	/^	u32 capture_data_lo;	\/* Memory Data Path Read Capture Low *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
capture_data_lo	include/fsl_immap.h	/^	u32	capture_data_lo;	\/* Data Path Read Capture Low *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
capture_ecc	arch/powerpc/include/asm/immap_83xx.h	/^	u32 capture_ecc;	\/* Memory Data Path Read Capture ECC *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
capture_ecc	include/fsl_immap.h	/^	u32	capture_ecc;		\/* Data Path Read Capture ECC *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
capture_ext_address	arch/powerpc/include/asm/immap_83xx.h	/^	u32 capture_ext_address;\/* Memory Error Extended Address Capture *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
capture_ext_address	include/fsl_immap.h	/^	u32	capture_ext_address;	\/* Error Extended Addr Capture *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
capture_fe	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u32 capture_fe;$/;"	m	struct:gpt_regs	typeref:typename:u32
capture_re	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u32 capture_re;$/;"	m	struct:gpt_regs	typeref:typename:u32
car	arch/m68k/include/asm/immap_5445x.h	/^	u32 car;		\/* 0xf8 Configuration Address Register *\/$/;"	m	struct:pci	typeref:typename:u32
car	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 car;		\/* 0xf8 Configuration Address *\/$/;"	m	struct:pci	typeref:typename:u32
car	drivers/block/fsl_sata.h	/^	u32 car;		\/* Command active register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
car1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	car1;		\/* Carry One *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
car1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	car1;		\/* 0x24730 - Carry Register One *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
car1	include/fsl_dtsec.h	/^	u32	car1;		\/* carry register 1 *\/$/;"	m	struct:dtsec	typeref:typename:u32
car1	include/tsec.h	/^	u32	car1;		\/* Carry Register One *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
car2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	car2;		\/* Carry Two *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
car2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	car2;		\/* 0x24734 - Carry Register Two *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
car2	include/fsl_dtsec.h	/^	u32	car2;		\/* carry register 2 *\/$/;"	m	struct:dtsec	typeref:typename:u32
car2	include/tsec.h	/^	u32	car2;		\/* Carry Register Two *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
car5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} car5xx_t;$/;"	t	typeref:struct:clk_and_reset
car8260_t	arch/powerpc/include/asm/immap_8260.h	/^} car8260_t;$/;"	t	typeref:struct:clk_and_reset
car8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} car8xx_t;$/;"	t	typeref:struct:clk_and_reset
car_colir	arch/powerpc/include/asm/5xx_immap.h	/^	ushort car_colir;$/;"	m	struct:clk_and_reset	typeref:typename:ushort
car_init	arch/x86/cpu/coreboot/car.S	/^car_init:$/;"	l
car_init	arch/x86/cpu/intel_common/car.S	/^car_init:$/;"	l
car_init	arch/x86/cpu/qemu/car.S	/^car_init:$/;"	l
car_init	arch/x86/cpu/quark/car.S	/^car_init:$/;"	l
car_init	arch/x86/lib/efi/car.S	/^car_init:$/;"	l
car_init	arch/x86/lib/fsp/fsp_car.S	/^car_init:$/;"	l
car_init_done	arch/x86/lib/fsp/fsp_car.S	/^car_init_done:$/;"	l
car_init_fail	arch/x86/lib/fsp/fsp_car.S	/^car_init_fail:$/;"	l
car_init_ret	arch/x86/cpu/start.S	/^car_init_ret:$/;"	l
car_init_start	arch/x86/lib/fsp/fsp_car.S	/^car_init_start:$/;"	l
car_plprcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint car_plprcr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_plprcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	car_plprcr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_res7a	arch/powerpc/include/asm/5xx_immap.h	/^	ushort car_res7a;$/;"	m	struct:clk_and_reset	typeref:typename:ushort
car_res7b	arch/powerpc/include/asm/5xx_immap.h	/^	ushort car_res7b;$/;"	m	struct:clk_and_reset	typeref:typename:ushort
car_res7c	arch/powerpc/include/asm/5xx_immap.h	/^	ushort car_res7c;$/;"	m	struct:clk_and_reset	typeref:typename:ushort
car_rmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	car_rmr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_rsr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort car_rsr;$/;"	m	struct:clk_and_reset	typeref:typename:ushort
car_rsr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	car_rsr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_rsr	arch/powerpc/include/asm/immap_8260.h	/^	uint	car_rsr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_sccr	arch/powerpc/include/asm/5xx_immap.h	/^	uint car_sccr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_sccr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	car_sccr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_sccr	arch/powerpc/include/asm/immap_8260.h	/^	uint	car_sccr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_scmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	car_scmr;$/;"	m	struct:clk_and_reset	typeref:typename:uint
car_uninit	arch/x86/cpu/intel_common/car.S	/^car_uninit:$/;"	l
car_vsrmcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort car_vsrmcr;$/;"	m	struct:clk_and_reset	typeref:typename:ushort
card_caps	include/mmc.h	/^	uint card_caps;$/;"	m	struct:mmc	typeref:typename:uint
card_error	board/astro/mcf5373l/astro.h	/^	unsigned char card_error;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
card_id	board/astro/mcf5373l/astro.h	/^typedef struct card_id {$/;"	s
card_id_t	board/astro/mcf5373l/astro.h	/^} card_id_t;$/;"	t	typeref:struct:card_id
card_init	drivers/video/mb862xx.c	/^unsigned int card_init (void)$/;"	f	typeref:typename:unsigned int
card_select	drivers/mmc/arm_pl180_mmci.h	/^	u32 card_select;	\/* 0x44*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
card_type	board/astro/mcf5373l/astro.h	/^	char card_type;$/;"	m	struct:card_id	typeref:typename:char
card_type	include/faraday/ftsdc010.h	/^	unsigned int card_type;		\/* Card type *\/$/;"	m	struct:mmc_host	typeref:typename:unsigned int
cardhu_padctrl	board/nvidia/cardhu/pinmux-config-cardhu.h	/^static struct pmux_drvgrp_config cardhu_padctrl[] = {$/;"	v	typeref:struct:pmux_drvgrp_config[]
cardnum	drivers/net/e1000.h	/^	unsigned int cardnum;$/;"	m	struct:e1000_hw	typeref:typename:unsigned int
cark	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct cark {$/;"	s
cark	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct cark {$/;"	s
cark8xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} cark8xx_t;$/;"	t	typeref:struct:cark
cark8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} cark8xx_t;$/;"	t	typeref:struct:cark
cark_plprcrk	arch/powerpc/include/asm/5xx_immap.h	/^	uint	cark_plprcrk;$/;"	m	struct:cark	typeref:typename:uint
cark_plprcrk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cark_plprcrk;$/;"	m	struct:cark	typeref:typename:uint
cark_rsrk	arch/powerpc/include/asm/5xx_immap.h	/^	uint	cark_rsrk;$/;"	m	struct:cark	typeref:typename:uint
cark_rsrk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cark_rsrk;$/;"	m	struct:cark	typeref:typename:uint
cark_sccrk	arch/powerpc/include/asm/5xx_immap.h	/^	uint	cark_sccrk;$/;"	m	struct:cark	typeref:typename:uint
cark_sccrk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cark_sccrk;$/;"	m	struct:cark	typeref:typename:uint
carkit_ctrl	include/usb/ulpi.h	/^	u8	carkit_ctrl;		\/* 0x19 Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_ctrl_clear	include/usb/ulpi.h	/^	u8	carkit_ctrl_clear;	\/* 0x1B Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_ctrl_set	include/usb/ulpi.h	/^	u8	carkit_ctrl_set;	\/* 0x1A Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_ie	include/usb/ulpi.h	/^	u8	carkit_ie;		\/* 0x1D Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_ie_clear	include/usb/ulpi.h	/^	u8	carkit_ie_clear;	\/* 0x1F Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_ie_set	include/usb/ulpi.h	/^	u8	carkit_ie_set;		\/* 0x1E Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_int_delay	include/usb/ulpi.h	/^	u8	carkit_int_delay;$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_int_latch	include/usb/ulpi.h	/^	u8	carkit_int_latch;$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_int_status	include/usb/ulpi.h	/^	u8	carkit_int_status;$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_pulse_ctrl	include/usb/ulpi.h	/^	u8	carkit_pulse_ctrl;		\/* 0x22 Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_pulse_ctrl_clear	include/usb/ulpi.h	/^	u8	carkit_pulse_ctrl_clear;	\/* 0x24 Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carkit_pulse_ctrl_set	include/usb/ulpi.h	/^	u8	carkit_pulse_ctrl_set;		\/* 0x23 Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
carriersenseertx	drivers/qe/uec.h	/^	u32  carriersenseertx;   \/* carrier sense error *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
carveout_size	arch/arm/mach-tegra/board2.c	/^static ulong carveout_size(void)$/;"	f	typeref:typename:ulong	file:
cas	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 cas;$/;"	m	struct:dram_para	typeref:typename:u32
cas	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 cas;$/;"	m	struct:dram_para	typeref:typename:u32
cas	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 cas;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
cas	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
cas_l	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u8 cas_l;$/;"	m	struct:if_params	typeref:typename:u8
cas_lat	include/ddr_spd.h	/^	unsigned char cas_lat;     \/* 18 CAS# Latencies Supported *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
cas_lat	include/ddr_spd.h	/^	unsigned char cas_lat;     \/* 18 CAS# Latencies Supported *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
cas_lat	include/spd.h	/^	unsigned char cas_lat;     \/* 18 CAS# Latencies Supported *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
cas_latancy	arch/arm/mach-keystone/ddr3_spd.c	/^static u8 cas_latancy(u16 temp)$/;"	f	typeref:typename:u8	file:
cas_latency_override	include/fsl_ddr_sdram.h	/^	unsigned int cas_latency_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
cas_latency_override_value	include/fsl_ddr_sdram.h	/^	unsigned int cas_latency_override_value;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
cas_latency_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^struct cl_val_per_freq cas_latency_table[] = {$/;"	v	typeref:struct:cl_val_per_freq[]
cas_wl	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u8 cas_wl;$/;"	m	struct:if_params	typeref:typename:u8
cas_write_latency_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^struct cl_val_per_freq cas_write_latency_table[] = {$/;"	v	typeref:struct:cl_val_per_freq[]
caseF	arch/powerpc/lib/kgdb.c	/^#define caseF(/;"	d	file:
case_USAGE_COMMON_FLAGS	tools/fdtgrep.c	/^#define case_USAGE_COMMON_FLAGS /;"	d	file:
caslat_b1	include/ddr_spd.h	/^	uint8_t caslat_b1;		\/* 20 CAS latencies, 1st byte *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
caslat_b2	include/ddr_spd.h	/^	uint8_t caslat_b2;		\/* 21 CAS latencies, 2nd byte *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
caslat_b3	include/ddr_spd.h	/^	uint8_t caslat_b3;		\/* 22 CAS latencies, 3rd byte *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
caslat_b4	include/ddr_spd.h	/^	uint8_t caslat_b4;		\/* 23 CAS latencies, 4th byte *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
caslat_lin	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 caslat_lin;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
caslat_lowest_derated	include/fsl_ddr_dimm_params.h	/^	unsigned int caslat_lowest_derated;	\/* Derated CAS latency *\/$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
caslat_lsb	include/ddr_spd.h	/^	unsigned char caslat_lsb;      \/* 14 CAS Latencies Supported,$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
caslat_msb	include/ddr_spd.h	/^	unsigned char caslat_msb;      \/* 15 CAS Latencies Supported,$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
caslat_x	include/fsl_ddr_dimm_params.h	/^	unsigned int caslat_x;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
caslat_x_minus_1	include/fsl_ddr_dimm_params.h	/^	unsigned int caslat_x_minus_1;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
caslat_x_minus_2	include/fsl_ddr_dimm_params.h	/^	unsigned int caslat_x_minus_2;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
cat_vet	scripts/checkpatch.pl	/^sub cat_vet {$/;"	s
catr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 catr[2];		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
catr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 catr[2];		\/* 0xec CA training register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
catr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 catr[2];		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
catr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 catr[2];		\/* 0xec CA training register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
catr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 catr0;		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 catr0;		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 catr0;		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 catr0;		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 catr1;		\/* 0xec *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 catr1;		\/* 0xec *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 catr1;		\/* 0xec *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
catr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 catr1;		\/* 0xec *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
cb	drivers/usb/gadget/f_fastboot.c	/^	void (*cb)(struct usb_ep *ep, struct usb_request *req);$/;"	m	struct:cmd_dispatch_info	typeref:typename:void (*)(struct usb_ep * ep,struct usb_request * req)	file:
cb2year	drivers/rtc/m41t60.c	/^static unsigned cb2year(unsigned const cb)$/;"	f	typeref:typename:unsigned	file:
cb_boot	drivers/usb/gadget/f_fastboot.c	/^static void cb_boot(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_cbmem_tab	arch/x86/include/asm/coreboot_tables.h	/^struct cb_cbmem_tab {$/;"	s
cb_cmos_checksum	arch/x86/include/asm/coreboot_tables.h	/^struct	cb_cmos_checksum {$/;"	s
cb_cmos_defaults	arch/x86/include/asm/coreboot_tables.h	/^struct cb_cmos_defaults {$/;"	s
cb_cmos_entries	arch/x86/include/asm/coreboot_tables.h	/^struct cb_cmos_entries {$/;"	s
cb_cmos_enums	arch/x86/include/asm/coreboot_tables.h	/^struct cb_cmos_enums {$/;"	s
cb_cmos_option_table	arch/x86/include/asm/coreboot_tables.h	/^struct cb_cmos_option_table {$/;"	s
cb_console	arch/x86/include/asm/coreboot_tables.h	/^struct cb_console {$/;"	s
cb_continue	drivers/usb/gadget/f_fastboot.c	/^static void cb_continue(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_data	arch/powerpc/cpu/mpc8260/i2c.c	/^	void *cb_data;		\/* private data to be passed  *\/$/;"	m	struct:i2c_state	typeref:typename:void *	file:
cb_download	drivers/usb/gadget/f_fastboot.c	/^static void cb_download(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_erase	drivers/usb/gadget/f_fastboot.c	/^static void cb_erase(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_fdt	arch/x86/include/asm/coreboot_tables.h	/^struct cb_fdt {$/;"	s
cb_flash	drivers/usb/gadget/f_fastboot.c	/^static void cb_flash(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_forward	arch/x86/include/asm/coreboot_tables.h	/^struct cb_forward {$/;"	s
cb_framebuffer	arch/x86/include/asm/coreboot_tables.h	/^struct cb_framebuffer {$/;"	s
cb_getvar	drivers/usb/gadget/f_fastboot.c	/^static void cb_getvar(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_gpio	arch/x86/include/asm/coreboot_tables.h	/^struct cb_gpio {$/;"	s
cb_gpios	arch/x86/include/asm/coreboot_tables.h	/^struct cb_gpios {$/;"	s
cb_header	arch/x86/include/asm/coreboot_tables.h	/^struct cb_header {$/;"	s
cb_hwrpb	arch/x86/include/asm/coreboot_tables.h	/^struct cb_hwrpb {$/;"	s
cb_mainboard	arch/x86/include/asm/coreboot_tables.h	/^struct cb_mainboard {$/;"	s
cb_memory	arch/x86/include/asm/coreboot_tables.h	/^struct cb_memory {$/;"	s
cb_memory_range	arch/x86/include/asm/coreboot_tables.h	/^struct cb_memory_range {$/;"	s
cb_oem	drivers/usb/gadget/f_fastboot.c	/^static void cb_oem(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_parse_cbmem_cons	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_cbmem_cons(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_framebuffer	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_framebuffer(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_gpios	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_gpios(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_header	arch/x86/cpu/coreboot/tables.c	/^static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)$/;"	f	typeref:typename:int	file:
cb_parse_memory	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_serial	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_string	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_string(unsigned char *ptr, char **info)$/;"	f	typeref:typename:void	file:
cb_parse_tstamp	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_tstamp(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_vbnv	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_vbnv(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_parse_vdat	arch/x86/cpu/coreboot/tables.c	/^static void cb_parse_vdat(unsigned char *ptr, struct sysinfo_t *info)$/;"	f	typeref:typename:void	file:
cb_reboot	drivers/usb/gadget/f_fastboot.c	/^static void cb_reboot(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
cb_record	arch/x86/include/asm/coreboot_tables.h	/^struct cb_record {$/;"	s
cb_serial	arch/x86/include/asm/coreboot_tables.h	/^struct cb_serial {$/;"	s
cb_string	arch/x86/include/asm/coreboot_tables.h	/^struct cb_string {$/;"	s
cb_table_add_entry	arch/x86/lib/coreboot_table.c	/^static u32 cb_table_add_entry(struct cb_header *cbh, struct cb_record *cbr)$/;"	f	typeref:typename:u32	file:
cb_table_finalize	arch/x86/lib/coreboot_table.c	/^static void cb_table_finalize(struct cb_header *cbh)$/;"	f	typeref:typename:void	file:
cb_table_init	arch/x86/lib/coreboot_table.c	/^static void cb_table_init(struct cb_header *cbh)$/;"	f	typeref:typename:void	file:
cb_vbnv	arch/x86/include/asm/coreboot_tables.h	/^struct cb_vbnv {$/;"	s
cb_vdat	arch/x86/include/asm/coreboot_tables.h	/^struct cb_vdat {$/;"	s
cba_priority	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 cba_priority;	\/* 0x320 *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32
cbal	include/tsi148.h	/^	unsigned int cbal;                    \/* 0x410         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
cbar	include/tsi148.h	/^	unsigned int cbar;                    \/* 0xffc         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
cbau	include/tsi148.h	/^	unsigned int cbau;                    \/* 0x40c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
cbc_mac	tools/mxsimage.h	/^	uint8_t		cbc_mac[SB_BLOCK_SIZE];$/;"	m	struct:sb_key_dictionary_key	typeref:typename:uint8_t[]
cbcdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cbcdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cbcdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cbcdr;$/;"	m	struct:clkctl	typeref:typename:u32
cbcdr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cbcdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cbcmr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cbcmr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cbcmr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cbcmr;$/;"	m	struct:clkctl	typeref:typename:u32
cbcmr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cbcmr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cbcr	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 cbcr;		\/* 0x48 CIU byte count *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
cbcr	arch/arm/include/asm/arch/mmc.h	/^	u32 cbcr;		\/* 0x48 CIU byte count *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
cbd_bufaddr	arch/m68k/include/asm/fec.h	/^	uint cbd_bufaddr;	\/* Buffer address in host memory *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:uint
cbd_bufaddr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	cbd_bufaddr;	\/* Buffer address in host memory *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:uint
cbd_bufaddr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	cbd_bufaddr;	\/* Buffer address in host memory *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:uint
cbd_bufaddr	include/commproc.h	/^	uint	cbd_bufaddr;	\/* Buffer address in host memory *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:uint
cbd_datlen	arch/m68k/include/asm/fec.h	/^	ushort cbd_datlen;	\/* Data length in buffer *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_datlen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	cbd_datlen;	\/* Data length in buffer *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_datlen	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	cbd_datlen;	\/* Data length in buffer *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_datlen	include/commproc.h	/^	ushort	cbd_datlen;	\/* Data length in buffer *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_sc	arch/m68k/include/asm/fec.h	/^	ushort cbd_sc;		\/* Status and Control *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_sc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	cbd_sc;		\/* Status and Control *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_sc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	cbd_sc;		\/* Status and Control *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_sc	include/commproc.h	/^	ushort	cbd_sc;		\/* Status and Control *\/$/;"	m	struct:cpm_buf_desc	typeref:typename:ushort
cbd_t	arch/m68k/include/asm/fec.h	/^} cbd_t;$/;"	t	typeref:struct:cpm_buf_desc
cbd_t	arch/powerpc/include/asm/cpm_8260.h	/^} cbd_t;$/;"	t	typeref:struct:cpm_buf_desc
cbd_t	arch/powerpc/include/asm/cpm_85xx.h	/^} cbd_t;$/;"	t	typeref:struct:cpm_buf_desc
cbd_t	include/commproc.h	/^} cbd_t;$/;"	t	typeref:struct:cpm_buf_desc
cbda	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 cbda;		\/* 0x94 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
cbda	arch/arm/include/asm/arch/mmc.h	/^	u32 cbda;		\/* 0x94 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
cbfs_cachenode	include/cbfs.h	/^struct cbfs_cachenode {$/;"	s
cbfs_fileheader	include/cbfs.h	/^struct cbfs_fileheader {$/;"	s
cbfs_filetype	include/cbfs.h	/^enum cbfs_filetype {$/;"	g
cbfs_header	fs/cbfs/cbfs.c	/^static struct cbfs_header cbfs_header;$/;"	v	typeref:struct:cbfs_header	file:
cbfs_header	include/cbfs.h	/^struct cbfs_header {$/;"	s
cbfs_result	include/cbfs.h	/^enum cbfs_result {$/;"	g
cbl	drivers/block/sata_dwc.h	/^	unsigned int		cbl;$/;"	m	struct:ata_port	typeref:typename:unsigned int
cblk	common/xyzModem.c	/^  unsigned char blk, cblk, crc1, crc2;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char	file:
cbmem_cons	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	void	*cbmem_cons;$/;"	m	struct:sysinfo_t	typeref:typename:void *
cbmem_console	drivers/misc/cbmem_console.c	/^struct cbmem_console {$/;"	s	file:
cbmem_console_p	drivers/misc/cbmem_console.c	/^static struct cbmem_console *cbmem_console_p;$/;"	v	typeref:struct:cbmem_console *	file:
cbmem_entry	arch/x86/include/asm/coreboot_tables.h	/^struct cbmem_entry {$/;"	s
cbmem_tab	arch/x86/include/asm/coreboot_tables.h	/^	void *cbmem_tab;$/;"	m	struct:cb_cbmem_tab	typeref:typename:void *
cbmemc_init	drivers/misc/cbmem_console.c	/^int cbmemc_init(void)$/;"	f	typeref:typename:int
cbmemc_putc	drivers/misc/cbmem_console.c	/^void cbmemc_putc(struct stdio_dev *dev, char data)$/;"	f	typeref:typename:void
cbmemc_puts	drivers/misc/cbmem_console.c	/^void cbmemc_puts(struct stdio_dev *dev, const char *str)$/;"	f	typeref:typename:void
cbmux_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux cbmux_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
cbr_level	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 cbr_level;			\/* 0x10c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cbr_level	arch/arm/include/asm/arch/display.h	/^	u32 cbr_level;			\/* 0x10c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cbuf	fs/ubifs/ubifs.h	/^	void *cbuf;$/;"	m	struct:ubifs_info	typeref:typename:void *
cbuint64	arch/x86/include/asm/coreboot_tables.h	/^struct cbuint64 {$/;"	s
cbus	arch/arm/dts/meson-gxbb.dtsi	/^		cbus: cbus@c1100000 {$/;"	l
cbus	board/nokia/rx51/tag_omap.h	/^		struct omap_cbus_config cbus;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_cbus_config
cc	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 cc;		\/* 0x04 clock control *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
cc	arch/arm/include/asm/arch/p2wi.h	/^	u32 cc;		\/* 0x04 clock control *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
cc	arch/blackfin/cpu/start.S	/^	cc = r4 == r5;$/;"	d
cc	arch/blackfin/cpu/start.S	/^	cc = r5 < r3 (iu);$/;"	d
cc	fs/ubifs/ubifs.h	/^	struct crypto_comp *cc;$/;"	m	struct:ubifs_compressor	typeref:struct:crypto_comp *
cc	tools/patman/patman	/^                cc = cc.strip()$/;"	v
cc	tools/patman/patman.py	/^                cc = cc.strip()$/;"	v
cc_carr_wss_carr	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 cc_carr_wss_carr;			\/* 0x28 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
cc_file	tools/patman/patman	/^    cc_file = series.MakeCcFile(options.process_tags, cover_fname,$/;"	v
cc_file	tools/patman/patman.py	/^    cc_file = series.MakeCcFile(options.process_tags, cover_fname,$/;"	v
cc_to_error	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^static int cc_to_error[16] = {$/;"	v	typeref:typename:int[16]
cc_to_error	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^static int cc_to_error[16] = {$/;"	v	typeref:typename:int[16]
cc_to_error	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^static int cc_to_error[16] = {$/;"	v	typeref:typename:int[16]
cc_to_error	drivers/usb/host/ohci-hcd.c	/^static int cc_to_error[16] = {$/;"	v	typeref:typename:int[16]	file:
cc_to_error	drivers/usb/host/ohci-s3c24xx.h	/^static int cc_to_error[16] = {$/;"	v	typeref:typename:int[16]
cc_to_string	drivers/usb/host/ohci-hcd.c	/^static const char *cc_to_string[16] = {$/;"	v	typeref:typename:const char * [16]	file:
ccb	include/scsi.h	/^}ccb;$/;"	t	typeref:struct:SCSI_cmd_block
ccbvid	include/fsl_sec.h	/^	u32	ccbvid;		\/* CHA Cluster Block Version ID Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
ccc_ctl	drivers/block/dwc_ahsata.c	/^	u32 ccc_ctl;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
ccc_ports	drivers/block/dwc_ahsata.c	/^	u32 ccc_ports;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
cccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 cccr;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cccr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 cccr;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cccr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cccr;$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
cccr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cccr;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
cccr	arch/powerpc/include/asm/immap_512x.h	/^	u32 cccr;		\/* CFM Clock Control Register *\/$/;"	m	struct:clk512x	typeref:typename:u32
ccdm_compute_self_hash	board/gdsys/p1022/controlcenterd-id.c	/^int ccdm_compute_self_hash(void)$/;"	f	typeref:typename:int
ccdm_hang	board/gdsys/p1022/controlcenterd-id.c	/^static void ccdm_hang(void)$/;"	f	typeref:typename:void	file:
ccdm_mmc_read	board/gdsys/p1022/controlcenterd-id.c	/^static int ccdm_mmc_read(struct mmc *mmc, u64 src, u8 *dst, int size)$/;"	f	typeref:typename:int	file:
ccdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 ccdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccdr;$/;"	m	struct:clkctl	typeref:typename:u32
ccdr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 ccdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccen	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ccen;$/;"	m	struct:dma4_chan	typeref:typename:u32
ccer	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccer;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccer	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccer;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccer	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccer;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccflags	scripts/kconfig/lxdialog/check-lxdialog.sh	/^ccflags()$/;"	f
ccflags-y	drivers/bios_emulator/Makefile	/^ccflags-y := -I$(srctree)\/$(src) -I$(srctree)\/$(src)\/include \\$/;"	m
ccflags-y	drivers/usb/musb-new/Makefile	/^ccflags-y := $(call cc-option,-Wno-unused-variable) \\$/;"	m
ccflags-y	fs/yaffs2/Makefile	/^ccflags-y = -DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM \\$/;"	m
ccflags-y	post/lib_powerpc/fpu/Makefile	/^ccflags-y := -mhard-float -fkeep-inline-functions$/;"	m
ccfn	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ccfn;$/;"	m	struct:dma4_chan	typeref:typename:u32
ccgr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ccgr;$/;"	m	struct:mxc_ccm_ccgr	typeref:typename:uint32_t
ccgr0	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr0;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr0	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr0;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr1;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr1;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr10	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr10;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr11	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr11;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr2;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr2	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr2;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr3	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr3;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr3	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr3;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr4	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr4;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr4;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr5	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr5;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr5	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr5;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr6	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr6;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr6	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr6;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr7	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccgr7;$/;"	m	struct:clkctl	typeref:typename:u32
ccgr7	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr7;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr8	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr8;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr9	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccgr9;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccgr_array	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	struct mxc_ccm_ccgr ccgr_array[191];	\/* offset 0x4000 *\/$/;"	m	struct:mxc_ccm_reg	typeref:struct:mxc_ccm_ccgr[191]
ccgr_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ccgr_clr;$/;"	m	struct:mxc_ccm_ccgr	typeref:typename:uint32_t
ccgr_init	board/bachmann/ot1200/ot1200.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/barco/platinum/platinum.h	/^static inline void ccgr_init(void)$/;"	f	typeref:typename:void
ccgr_init	board/ccv/xpress/spl.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/el/el6x/el6x.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/engicam/icorem6/icorem6.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/freescale/mx6sabresd/mx6sabresd.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/freescale/mx6slevk/mx6slevk.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/kosagi/novena/novena_spl.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/phytec/pcm058/pcm058.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/udoo/udoo_spl.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_init	board/wandboard/spl.c	/^static void ccgr_init(void)$/;"	f	typeref:typename:void	file:
ccgr_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ccgr_set;$/;"	m	struct:mxc_ccm_ccgr	typeref:typename:uint32_t
ccgr_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ccgr_tog;$/;"	m	struct:mxc_ccm_ccgr	typeref:typename:uint32_t
cci	arch/arm/dts/zynqmp.dtsi	/^		cci: cci@fd6e0000 {$/;"	l	label:amba
cci400_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 cci400_cfg;		\/* 0x78 cci400 clock configuration A83T only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cci400_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 cci400_cfg;		\/* 0x78 cci400 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cci400_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 cci400_cfg;		\/* 0x78 cci400 clock configuration A83T only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cci400_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 cci400_cfg;		\/* 0x78 cci400 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cci400_clk	arch/arm/dts/sun9i-a80.dtsi	/^		cci400_clk: clk@06000078 {$/;"	l
cci400_config	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 cci400_config[3];      \/* 0x200 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[3]
cci400_config	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 cci400_config[3];      \/* 0x200 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[3]
cci400_status	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 cci400_status[2];      \/* 0x20c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[2]
cci400_status	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 cci400_status[2];      \/* 0x20c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[2]
cci500_init	arch/arm/mach-uniphier/arm64/arm-cci500.c	/^void cci500_init(unsigned int nr_slaves)$/;"	f	typeref:typename:void
cci_cfg	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cci_cfg;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
cciccrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 cciccrc;		\/* 0x050 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
ccm	arch/m68k/include/asm/immap_5227x.h	/^typedef struct ccm {$/;"	s
ccm	arch/m68k/include/asm/immap_5441x.h	/^typedef struct ccm {$/;"	s
ccm	arch/m68k/include/asm/immap_5445x.h	/^typedef struct ccm {$/;"	s
ccm_anatop	arch/arm/cpu/armv7/mx7/clock.c	/^struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *)$/;"	v	typeref:struct:mxc_ccm_anatop_reg *
ccm_ctrl	arch/m68k/include/asm/immap_520x.h	/^typedef struct ccm_ctrl {$/;"	s
ccm_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct ccm_ctrl {$/;"	s
ccm_ctrl	arch/m68k/include/asm/immap_5301x.h	/^typedef struct ccm_ctrl {$/;"	s
ccm_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct ccm_ctrl {$/;"	s
ccm_reg	arch/arm/cpu/armv7/mx7/clock.c	/^struct mxc_ccm_reg *ccm_reg = (struct mxc_ccm_reg *)CCM_BASE_ADDR;$/;"	v	typeref:struct:mxc_ccm_reg *
ccm_reg	arch/arm/include/asm/arch-vf610/crm_regs.h	/^struct ccm_reg {$/;"	s
ccm_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct ccm_regs {$/;"	s
ccm_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct ccm_regs {$/;"	s
ccm_resv0	arch/m68k/include/asm/immap_5441x.h	/^	u8 ccm_resv0[0x4];	\/* 0x00 *\/$/;"	m	struct:ccm	typeref:typename:u8[0x4]
ccm_resv0	arch/m68k/include/asm/immap_5445x.h	/^	u8 ccm_resv0[0x4];$/;"	m	struct:ccm	typeref:typename:u8[0x4]
ccm_t	arch/m68k/include/asm/immap_520x.h	/^} ccm_t;$/;"	t	typeref:struct:ccm_ctrl
ccm_t	arch/m68k/include/asm/immap_5227x.h	/^} ccm_t;$/;"	t	typeref:struct:ccm
ccm_t	arch/m68k/include/asm/immap_5235.h	/^} ccm_t;$/;"	t	typeref:struct:ccm_ctrl
ccm_t	arch/m68k/include/asm/immap_5301x.h	/^} ccm_t;$/;"	t	typeref:struct:ccm_ctrl
ccm_t	arch/m68k/include/asm/immap_5329.h	/^} ccm_t;$/;"	t	typeref:struct:ccm_ctrl
ccm_t	arch/m68k/include/asm/immap_5441x.h	/^} ccm_t;$/;"	t	typeref:struct:ccm
ccm_t	arch/m68k/include/asm/immap_5445x.h	/^} ccm_t;$/;"	t	typeref:struct:ccm
ccmr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ccmr;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ccmr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ccmr;	\/* Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ccmr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 ccmr;		\/* 0x14 Color Cursor Mapping Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
ccmr1	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccmr1;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccmr1	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccmr1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccmr1	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccmr1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccmr2	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccmr2;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccmr2	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccmr2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccmr2	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccmr2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccnt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int ccnt;$/;"	m	struct:edma3_slot_config	typeref:typename:int
ccnt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 ccnt;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
ccnt_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ccnt_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
ccnt_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ccnt_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
ccnt_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ccnt_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
ccnt_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ccnt_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
cconf0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cconf0;$/;"	m	struct:rcar_s3c	typeref:typename:u32
cconf1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cconf1;$/;"	m	struct:rcar_s3c	typeref:typename:u32
cconf2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cconf2;$/;"	m	struct:rcar_s3c	typeref:typename:u32
cconf3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cconf3;$/;"	m	struct:rcar_s3c	typeref:typename:u32
ccosr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 ccosr;	\/* 0x0060 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccosr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccosr;$/;"	m	struct:clkctl	typeref:typename:u32
ccosr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 ccosr;	\/* 0x0060 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccosr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccosr;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccowr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccowr;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccpgr0	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccpgr0;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccpgr1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccpgr1;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccpgr2	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccpgr2;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccpgr3	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccpgr3;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccpr	arch/m68k/include/asm/immap_5445x.h	/^	u32 ccpr;		\/* 0x28 Cardbus CIS Pointer Register *\/$/;"	m	struct:pci	typeref:typename:u32
ccpr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 ccpr;		\/* 0x28 Cardbus CIS Pointer *\/$/;"	m	struct:pci	typeref:typename:u32
ccr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ccr;		\/* 0x004 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
ccr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 ccr;		\/* Capture Control Register	*\/$/;"	m	struct:timer_regs	typeref:typename:u32
ccr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 ccr;	\/* 0x0000 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccr;$/;"	m	struct:clkctl	typeref:typename:u32
ccr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 ccr;	\/* 0x0000 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ccr;$/;"	m	struct:dma4_chan	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 ccr;		\/* 0x00 controller configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 ccr;	\/* 0x04 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccr;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 ccr;		\/* 0x00 controller configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 ccr;		\/* 0x04 controller configuration register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ccr	arch/arm/include/asm/arch/rsb.h	/^	u32 ccr;	\/* 0x04 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
ccr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		ccr[52];	\/* 0x110 - 0x1E0 Chip Configuration *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[52]
ccr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		ccr;	\/* 0x00 Channel Control Register *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
ccr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 ccr;$/;"	m	struct:ssi	typeref:typename:u32
ccr	arch/m68k/include/asm/immap_520x.h	/^	u16 ccr;		\/* 0x00 Chip Cfg *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
ccr	arch/m68k/include/asm/immap_5227x.h	/^	u16 ccr;		\/* Chip Configuration (Rd-only) *\/$/;"	m	struct:ccm	typeref:typename:u16
ccr	arch/m68k/include/asm/immap_5235.h	/^	u16 ccr;		\/* 0x04 Chip configuration register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
ccr	arch/m68k/include/asm/immap_5301x.h	/^	u16 ccr;		\/* 0x00 Chip Cfg *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
ccr	arch/m68k/include/asm/immap_5329.h	/^	u16 ccr;		\/* 0x00 Chip configuration register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
ccr	arch/m68k/include/asm/immap_5441x.h	/^	u16 ccr;		\/* 0x04 Chip Configuration *\/$/;"	m	struct:ccm	typeref:typename:u16
ccr	arch/m68k/include/asm/immap_5445x.h	/^	u16 ccr;		\/* Chip Configuration Register (256 TEPBGA, Read-only) *\/$/;"	m	struct:ccm	typeref:typename:u16
ccr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	ccr;		\/* PSC + 0x20 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
ccr	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG ccr;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
ccr	drivers/block/fsl_sata.h	/^	u32 ccr;		\/* Command completed register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
ccr	include/faraday/ftsdc010.h	/^	unsigned int	ccr;		\/* 0x38 - clock contorl reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
ccr	include/mpc5xxx.h	/^	volatile u16	ccr;		\/* PSC + 0x20 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
ccr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	ccr;		\/* Controller Configuration *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
ccr1	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccr1;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccr1	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccr1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr1	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccr1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr2	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccr2;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccr2	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccr2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr2	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccr2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr3	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccr3;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccr3	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccr3;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr3	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccr3;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr4	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 ccr4;$/;"	m	struct:gpt_regs	typeref:typename:u32
ccr4	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 ccr4;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr4	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 ccr4;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
ccr_settings	include/linux/mtd/ndfc.h	/^	uint32_t	ccr_settings;$/;"	m	struct:ndfc_controller_settings	typeref:typename:uint32_t
ccrir	arch/m68k/include/asm/immap_5445x.h	/^	u32 ccrir;		\/* 0x08 Class Code \/ Revision Id Register *\/$/;"	m	struct:pci	typeref:typename:u32
ccrir	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 ccrir;		\/* 0x08 Class Code \/ Revision Id *\/$/;"	m	struct:pci	typeref:typename:u32
ccscr	include/mpc5xxx.h	/^	volatile u32	ccscr;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
ccsr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ccsr;		\/* 0x00C *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
ccsr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 ccsr;	\/* Clock Control Status Register *\/$/;"	m	struct:pll_regs	typeref:typename:u32
ccsr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 ccsr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccsr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ccsr;$/;"	m	struct:clkctl	typeref:typename:u32
ccsr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 ccsr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ccsr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ccsr;$/;"	m	struct:ccm_reg	typeref:typename:u32
ccsr_ahci	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^struct ccsr_ahci {$/;"	s
ccsr_ahci	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_ahci {$/;"	s
ccsr_bman	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_bman {$/;"	s
ccsr_bman_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_bman_t;$/;"	t	typeref:struct:ccsr_bman
ccsr_cci400	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct ccsr_cci400 {$/;"	s
ccsr_cci400	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_cci400 {$/;"	s
ccsr_clk	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct ccsr_clk {$/;"	s
ccsr_clk	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_clk {$/;"	s
ccsr_clk	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_clk {$/;"	s
ccsr_clk_cluster_group	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^struct ccsr_clk_cluster_group {$/;"	s
ccsr_clk_ctrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^struct ccsr_clk_ctrl {$/;"	s
ccsr_clk_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_clk_t;$/;"	t	typeref:struct:ccsr_clk
ccsr_cluster_l2	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_cluster_l2 {$/;"	s
ccsr_cpm	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm {$/;"	s
ccsr_cpm_brg1	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_brg1 {$/;"	s
ccsr_cpm_brg1_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_brg1_t;$/;"	t	typeref:struct:ccsr_cpm_brg1
ccsr_cpm_brg2	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_brg2 {$/;"	s
ccsr_cpm_brg2_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_brg2_t;$/;"	t	typeref:struct:ccsr_cpm_brg2
ccsr_cpm_cp	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_cp {$/;"	s
ccsr_cpm_cp_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_cp_t;$/;"	t	typeref:struct:ccsr_cpm_cp
ccsr_cpm_fcc1	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_fcc1 {$/;"	s
ccsr_cpm_fcc1_ext	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_fcc1_ext {$/;"	s
ccsr_cpm_fcc1_ext_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_fcc1_ext_t;$/;"	t	typeref:struct:ccsr_cpm_fcc1_ext
ccsr_cpm_fcc1_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_fcc1_t;$/;"	t	typeref:struct:ccsr_cpm_fcc1
ccsr_cpm_fcc2	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_fcc2 {$/;"	s
ccsr_cpm_fcc2_ext	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_fcc2_ext {$/;"	s
ccsr_cpm_fcc2_ext_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_fcc2_ext_t;$/;"	t	typeref:struct:ccsr_cpm_fcc2_ext
ccsr_cpm_fcc2_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_fcc2_t;$/;"	t	typeref:struct:ccsr_cpm_fcc2
ccsr_cpm_fcc3	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_fcc3 {$/;"	s
ccsr_cpm_fcc3_ext	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_fcc3_ext {$/;"	s
ccsr_cpm_fcc3_ext_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_fcc3_ext_t;$/;"	t	typeref:struct:ccsr_cpm_fcc3_ext
ccsr_cpm_fcc3_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_fcc3_t;$/;"	t	typeref:struct:ccsr_cpm_fcc3
ccsr_cpm_i2c	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_i2c {$/;"	s
ccsr_cpm_i2c_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_i2c_t;$/;"	t	typeref:struct:ccsr_cpm_i2c
ccsr_cpm_intctl	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_intctl {$/;"	s
ccsr_cpm_intctl_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_intctl_t;$/;"	t	typeref:struct:ccsr_cpm_intctl
ccsr_cpm_iop	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_iop {$/;"	s
ccsr_cpm_iop_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_iop_t;$/;"	t	typeref:struct:ccsr_cpm_iop
ccsr_cpm_iram	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_iram {$/;"	s
ccsr_cpm_iram_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_iram_t;$/;"	t	typeref:struct:ccsr_cpm_iram
ccsr_cpm_mux	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_mux {$/;"	s
ccsr_cpm_mux_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_mux_t;$/;"	t	typeref:struct:ccsr_cpm_mux
ccsr_cpm_scc	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_scc {$/;"	s
ccsr_cpm_scc_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_scc_t;$/;"	t	typeref:struct:ccsr_cpm_scc
ccsr_cpm_sdma	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_sdma {$/;"	s
ccsr_cpm_sdma_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_sdma_t;$/;"	t	typeref:struct:ccsr_cpm_sdma
ccsr_cpm_siu	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_siu {$/;"	s
ccsr_cpm_siu_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_siu_t;$/;"	t	typeref:struct:ccsr_cpm_siu
ccsr_cpm_spi	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_spi {$/;"	s
ccsr_cpm_spi_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_spi_t;$/;"	t	typeref:struct:ccsr_cpm_spi
ccsr_cpm_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_t;$/;"	t	typeref:struct:ccsr_cpm
ccsr_cpm_timer	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_timer {$/;"	s
ccsr_cpm_timer_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_timer_t;$/;"	t	typeref:struct:ccsr_cpm_timer
ccsr_cpm_tmp1	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_tmp1 {$/;"	s
ccsr_cpm_tmp1_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_tmp1_t;$/;"	t	typeref:struct:ccsr_cpm_tmp1
ccsr_cpm_tmp2	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_tmp2 {$/;"	s
ccsr_cpm_tmp2_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_tmp2_t;$/;"	t	typeref:struct:ccsr_cpm_tmp2
ccsr_cpm_tmp3	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_cpm_tmp3 {$/;"	s
ccsr_cpm_tmp3_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_cpm_tmp3_t;$/;"	t	typeref:struct:ccsr_cpm_tmp3
ccsr_ddr	include/fsl_immap.h	/^struct ccsr_ddr {$/;"	s
ccsr_dma	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_dma {$/;"	s
ccsr_dma	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_dma {$/;"	s
ccsr_dma_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_dma_t;$/;"	t	typeref:struct:ccsr_dma
ccsr_dma_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_dma_t;$/;"	t	typeref:struct:ccsr_dma
ccsr_duart	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_duart {$/;"	s
ccsr_duart	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_duart {$/;"	s
ccsr_duart_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_duart_t;$/;"	t	typeref:struct:ccsr_duart
ccsr_duart_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_duart_t;$/;"	t	typeref:struct:ccsr_duart
ccsr_espi	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_espi {$/;"	s
ccsr_espi_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_espi_t;$/;"	t	typeref:struct:ccsr_espi
ccsr_fman	include/fsl_fman.h	/^typedef struct ccsr_fman {$/;"	s
ccsr_fman_t	include/fsl_fman.h	/^} ccsr_fman_t;$/;"	t	typeref:struct:ccsr_fman
ccsr_fsl_pci_t	arch/powerpc/include/asm/fsl_pci.h	/^} ccsr_fsl_pci_t;$/;"	t	typeref:struct:ccsr_pci
ccsr_gpio	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_gpio {$/;"	s
ccsr_gpio	drivers/gpio/mpc85xx_gpio.c	/^struct ccsr_gpio {$/;"	s	file:
ccsr_gpio_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_gpio_t;$/;"	t	typeref:struct:ccsr_gpio
ccsr_gur	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct ccsr_gur {$/;"	s
ccsr_gur	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^struct ccsr_gur {$/;"	s
ccsr_gur	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_gur {$/;"	s
ccsr_gur	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_gur {$/;"	s
ccsr_gur	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_gur {$/;"	s
ccsr_gur_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_gur_t;$/;"	t	typeref:struct:ccsr_gur
ccsr_gur_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_gur_t;$/;"	t	typeref:struct:ccsr_gur
ccsr_ht	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_ht {$/;"	s
ccsr_ht_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_ht_t;$/;"	t	typeref:struct:ccsr_ht
ccsr_i2c	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_i2c {$/;"	s
ccsr_i2c	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_i2c {$/;"	s
ccsr_i2c_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_i2c_t;$/;"	t	typeref:struct:ccsr_i2c
ccsr_i2c_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_i2c_t;$/;"	t	typeref:struct:ccsr_i2c
ccsr_l2cache	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_l2cache {$/;"	s
ccsr_l2cache_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_l2cache_t;$/;"	t	typeref:struct:ccsr_l2cache
ccsr_local	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_local {$/;"	s
ccsr_local_ecm	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_local_ecm {$/;"	s
ccsr_local_ecm_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_local_ecm_t;$/;"	t	typeref:struct:ccsr_local_ecm
ccsr_local_mcm	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_local_mcm {$/;"	s
ccsr_local_mcm_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_local_mcm_t;$/;"	t	typeref:struct:ccsr_local_mcm
ccsr_local_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_local_t;$/;"	t	typeref:struct:ccsr_local
ccsr_pamu	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_pamu {$/;"	s
ccsr_pci	arch/powerpc/include/asm/fsl_pci.h	/^typedef struct ccsr_pci {$/;"	s
ccsr_pcix	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_pcix {$/;"	s
ccsr_pcix_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_pcix_t;$/;"	t	typeref:struct:ccsr_pcix
ccsr_pex	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_pex {$/;"	s
ccsr_pex_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_pex_t;$/;"	t	typeref:struct:ccsr_pex
ccsr_pic	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_pic {$/;"	s
ccsr_pic	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_pic {$/;"	s
ccsr_pic_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_pic_t;$/;"	t	typeref:struct:ccsr_pic
ccsr_pic_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_pic_t;$/;"	t	typeref:struct:ccsr_pic
ccsr_pman	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_pman {$/;"	s
ccsr_pme	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_pme {$/;"	s
ccsr_pme_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_pme_t;$/;"	t	typeref:struct:ccsr_pme
ccsr_qman	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_qman {$/;"	s
ccsr_qman_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_qman_t;$/;"	t	typeref:struct:ccsr_qman
ccsr_raide	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_raide {$/;"	s
ccsr_rcpm	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_rcpm {$/;"	s
ccsr_rcpm	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_rcpm {$/;"	s
ccsr_rcpm_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_rcpm_t;$/;"	t	typeref:struct:ccsr_rcpm
ccsr_reg_bar	include/fsl-mc/fsl_qbman_base.h	/^	void *ccsr_reg_bar; \/* CCSR register map *\/$/;"	m	struct:qbman_block_desc	typeref:typename:void *
ccsr_reset	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^struct ccsr_reset {$/;"	s
ccsr_rio	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_rio {$/;"	s
ccsr_rio	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_rio {$/;"	s
ccsr_rio_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_rio_t;$/;"	t	typeref:struct:ccsr_rio
ccsr_rman	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_rman {$/;"	s
ccsr_scfg	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct ccsr_scfg {$/;"	s
ccsr_scfg	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_scfg {$/;"	s
ccsr_scfg	arch/powerpc/include/asm/immap_85xx.h	/^struct ccsr_scfg {$/;"	s
ccsr_sec	include/fsl_sec.h	/^typedef struct ccsr_sec {$/;"	s
ccsr_sec_mon_regs	include/fsl_sec_mon.h	/^struct ccsr_sec_mon_regs {$/;"	s
ccsr_sec_t	include/fsl_sec.h	/^} ccsr_sec_t;$/;"	t	typeref:struct:ccsr_sec
ccsr_serdes	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct ccsr_serdes {$/;"	s
ccsr_serdes	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct ccsr_serdes {$/;"	s
ccsr_sfp_regs	include/fsl_sfp.h	/^struct ccsr_sfp_regs {$/;"	s
ccsr_tsec	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct ccsr_tsec {$/;"	s
ccsr_tsec	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_tsec {$/;"	s
ccsr_tsec_t	arch/powerpc/include/asm/immap_85xx.h	/^} ccsr_tsec_t;$/;"	t	typeref:struct:ccsr_tsec
ccsr_tsec_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_tsec_t;$/;"	t	typeref:struct:ccsr_tsec
ccsr_usb_phy	include/fsl_usb.h	/^struct ccsr_usb_phy {$/;"	s
ccsr_usb_port_ctrl	include/fsl_usb.h	/^struct ccsr_usb_port_ctrl {$/;"	s
ccsr_wdt	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct ccsr_wdt {$/;"	s
ccsr_wdt_t	arch/powerpc/include/asm/immap_86xx.h	/^} ccsr_wdt_t;$/;"	t	typeref:struct:ccsr_wdt
ccsrar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ccsrar;		\/* CCSR Attr *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
ccsrbar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ccsrbar;	\/* CCSR Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
ccsrbar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ccsrbar;	\/* 0x0 - Control Configuration Status Registers Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
ccsrbarh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ccsrbarh;	\/* CCSR Base Addr High *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
ccsrbarl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ccsrbarl;	\/* CCSR Base Addr Low *\/$/;"	m	struct:ccsr_local	typeref:typename:u32
cctl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cctl;	\/* Clock Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ccu	arch/arm/dts/sun8i-h3.dtsi	/^		ccu: clock@01c20000 {$/;"	l
ccu_clk_enable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static int ccu_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
ccu_clk_enable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static int ccu_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
ccu_clk_get_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static unsigned long ccu_clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long	file:
ccu_clk_get_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static unsigned long ccu_clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long	file:
ccu_clk_mgr_base	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long ccu_clk_mgr_base;$/;"	m	struct:clk	typeref:typename:unsigned long
ccu_clk_mgr_base	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long ccu_clk_mgr_base;$/;"	m	struct:clk	typeref:typename:unsigned long
ccu_clk_ops	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^struct clk_ops ccu_clk_ops = {$/;"	v	typeref:struct:clk_ops
ccu_clk_ops	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^struct clk_ops ccu_clk_ops = {$/;"	v	typeref:struct:clk_ops
ccu_clock	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct ccu_clock {$/;"	s
ccu_clock	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct ccu_clock {$/;"	s
ccu_sec_switch	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ccu_sec_switch;	\/* 0x2f0 CCU Security Switch, H3 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ccu_sec_switch	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ccu_sec_switch;	\/* 0x2f0 CCU Security Switch, H3 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cd	post/lib_powerpc/cr.c	/^    ulong cd;$/;"	m	struct:cpu_post_cr_s3	typeref:typename:ulong	file:
cd_count	common/console.c	/^int cd_count[MAX_FILES];$/;"	v	typeref:typename:int[]
cd_gpio	drivers/mmc/fsl_esdhc.c	/^	struct gpio_desc cd_gpio;$/;"	m	struct:fsl_esdhc_priv	typeref:struct:gpio_desc	file:
cd_gpio	drivers/mmc/omap_hsmmc.c	/^	int cd_gpio;$/;"	m	struct:omap_hsmmc_data	typeref:typename:int	file:
cd_gpio	drivers/mmc/omap_hsmmc.c	/^	struct gpio_desc cd_gpio;	\/* Change Detect GPIO *\/$/;"	m	struct:omap_hsmmc_data	typeref:struct:gpio_desc	file:
cd_gpio	drivers/mmc/tegra_mmc.c	/^	struct gpio_desc cd_gpio;	\/* Change Detect GPIO *\/$/;"	m	struct:tegra_mmc_priv	typeref:struct:gpio_desc	file:
cd_gpio	include/sdhci.h	/^	struct gpio_desc cd_gpio;		\/* Card Detect GPIO *\/$/;"	m	struct:sdhci_host	typeref:struct:gpio_desc
cd_inverted	drivers/mmc/omap_hsmmc.c	/^	bool cd_inverted;$/;"	m	struct:omap_hsmmc_data	typeref:typename:bool	file:
cda	drivers/block/fsl_sata.h	/^	__le32 cda;		\/* Command Descriptor Address,$/;"	m	struct:cmd_hdr_entry	typeref:typename:__le32
cdac	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cdac;$/;"	m	struct:dma4_chan	typeref:typename:u32
cdar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	cdar;		\/* DMA current descriptor address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
cdate	include/fat.h	/^	__u16	cdate;		\/* Creation date *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
cdb	drivers/block/sata_dwc.h	/^	u8			cdb[ATAPI_CDB_LEN];$/;"	m	struct:ata_queued_cmd	typeref:typename:u8[]
cdb_len	drivers/block/sata_dwc.h	/^	unsigned int		cdb_len;$/;"	m	struct:ata_device	typeref:typename:unsigned int
cdc	drivers/usb/gadget/ether.c	/^	unsigned		cdc:1;$/;"	m	struct:eth_dev	typeref:typename:unsigned:1	file:
cdc_active	drivers/usb/gadget/ether.c	/^#define	cdc_active(/;"	d	file:
cdc_filter	drivers/usb/gadget/ether.c	/^	u16			cdc_filter;$/;"	m	struct:eth_dev	typeref:typename:u16	file:
cdc_recv_setup	include/usbdevice.h	/^	int (*cdc_recv_setup)(struct usb_device_request *request, struct urb *urb);$/;"	m	struct:usb_device_instance	typeref:typename:int (*)(struct usb_device_request * request,struct urb * urb)
cdcdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cdcdr;	\/* 0x0030 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cdcdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cdcdr;$/;"	m	struct:clkctl	typeref:typename:u32
cdcdr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cdcdr;	\/* 0x0030 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cdce706	arch/xtensa/dts/xtfpga.dtsi	/^			cdce706: clock-synth@69 {$/;"	l	label:i2c0
cdce913_data	board/ti/am335x/board.c	/^static struct clk_synth cdce913_data = {$/;"	v	typeref:struct:clk_synth	file:
cdclk	drivers/video/broadwell_igd.c	/^	int cdclk;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
cdcr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cdcr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cdcr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cdcr;$/;"	m	struct:clkctl	typeref:typename:u32
cdcr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cdcr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cddslpclrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cddslpclrr;	\/* Core Domain Deep Sleep Clear Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cddslpsetr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cddslpsetr;	\/* Core Domain Deep Sleep Set Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cddslsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cddslsr;	\/* Core Domain Deep Sleep Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cde	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 cde;$/;"	m	struct:at91_emac	typeref:typename:u32
cdebug	scripts/kconfig/zconf.tab.c	/^int cdebug = PRINTD;$/;"	v	typeref:typename:int
cdel	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cdel;$/;"	m	struct:dma4_chan	typeref:typename:u32
cdes_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 cdes_data;		\/* MBAR_ETH + 0x1EC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
cdet_gpio	drivers/usb/host/ehci-vf.c	/^	struct gpio_desc cdet_gpio;$/;"	m	struct:ehci_vf_priv_data	typeref:struct:gpio_desc	file:
cdev	arch/arm/cpu/armv7/am33xx/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/BuR/common/common.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/birdland/bav335x/board.c	/^static __maybe_unused struct ctrl_dev *cdev =$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/bosch/shc/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/compulab/cm_t43/cm_t43.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/gumstix/pepper/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/isee/igep0033/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/phytec/pcm051/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/siemens/common/factoryset.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/silica/pengwyn/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/tcl/sl50/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/ti/am335x/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/ti/am43xx/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/ti/ti814x/evm.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	board/vscom/baltos/board.c	/^static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;$/;"	v	typeref:struct:ctrl_dev *	file:
cdev	drivers/mtd/ubi/ubi.h	/^	struct cdev cdev;$/;"	m	struct:ubi_device	typeref:struct:cdev
cdev	drivers/mtd/ubi/ubi.h	/^	struct cdev cdev;$/;"	m	struct:ubi_volume	typeref:struct:cdev
cdev	include/linux/compat.h	/^struct cdev {$/;"	s
cdev	include/linux/mtd/ubi.h	/^	dev_t cdev;$/;"	m	struct:ubi_device_info	typeref:typename:dev_t
cdev	include/linux/mtd/ubi.h	/^	dev_t cdev;$/;"	m	struct:ubi_volume_info	typeref:typename:dev_t
cdev	include/linux/usb/composite.h	/^	struct usb_composite_dev	*cdev;$/;"	m	struct:usb_configuration	typeref:struct:usb_composite_dev *
cdev1cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	cdev1cfg;	\/* 0x84: APB_MISC_GP_CDEV1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev1cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	cdev1cfg;	\/* 0x84: APB_MISC_GP_CDEV1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev1cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	cdev1cfg;	\/* 0x84: APB_MISC_GP_CDEV1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev1cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	cdev1cfg;	\/* 0x84: APB_MISC_GP_CDEV1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev2cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	cdev2cfg;	\/* 0x88: APB_MISC_GP_CDEV2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev2cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	cdev2cfg;	\/* 0x88: APB_MISC_GP_CDEV2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev2cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	cdev2cfg;	\/* 0x88: APB_MISC_GP_CDEV2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev2cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	cdev2cfg;	\/* 0x88: APB_MISC_GP_CDEV2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdev_add	include/linux/compat.h	/^#define cdev_add(/;"	d
cdev_del	include/linux/compat.h	/^#define cdev_del(/;"	d
cdev_init	include/linux/compat.h	/^#define cdev_init(/;"	d
cdevcfg1	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	cdevcfg1;	\/* 0x78: APB_MISC_GP_CDEV1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdevcfg2	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	cdevcfg2;	\/* 0x7C: APB_MISC_GP_CDEV2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cdfl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cdfl;$/;"	m	struct:dma4_chan	typeref:typename:u32
cdhipr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cdhipr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cdhipr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cdhipr;$/;"	m	struct:clkctl	typeref:typename:u32
cdhipr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cdhipr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cdly1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cdly1;	\/* Delay Line 1 configuration debug *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cdly2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cdly2;	\/* delay line 2 configuration debug *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cdly3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cdly3;	\/* delay line 3 configuration debug *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cdly4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cdly4;	\/* delay line 4 configuration debug *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cdly5	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cdly5;	\/* delay line 5 configuration debug *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cdlyl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cdlyl;	\/* delay line cycle length debug *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cdmac_bd	drivers/net/xilinx_ll_temac_sdma.h	/^struct cdmac_bd {$/;"	s
cdne	arch/m68k/include/asm/coldfire/edma.h	/^	u8 cdne;		\/* 0x1F Clear DONE Status Bit *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
cdns_i2c_calc_divs	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk,$/;"	f	typeref:typename:int	file:
cdns_i2c_debug_status	drivers/i2c/i2c-cdns.c	/^static void cdns_i2c_debug_status(struct cdns_i2c_regs *cdns_i2c)$/;"	f	typeref:typename:void	file:
cdns_i2c_of_match	drivers/i2c/i2c-cdns.c	/^static const struct udevice_id cdns_i2c_of_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cdns_i2c_ofdata_to_platdata	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cdns_i2c_ops	drivers/i2c/i2c-cdns.c	/^static const struct dm_i2c_ops cdns_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
cdns_i2c_probe_chip	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_probe_chip(struct udevice *bus, uint chip_addr,$/;"	f	typeref:typename:int	file:
cdns_i2c_read_data	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,$/;"	f	typeref:typename:int	file:
cdns_i2c_regs	drivers/i2c/i2c-cdns.c	/^struct cdns_i2c_regs {$/;"	s	file:
cdns_i2c_set_bus_speed	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
cdns_i2c_wait	drivers/i2c/i2c-cdns.c	/^static u32 cdns_i2c_wait(struct cdns_i2c_regs *cdns_i2c, u32 mask)$/;"	f	typeref:typename:u32	file:
cdns_i2c_write_data	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,$/;"	f	typeref:typename:int	file:
cdns_i2c_xfer	drivers/i2c/i2c-cdns.c	/^static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
cdozcrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdozcrl;	\/* Core Doze Control *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdozpcrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdozpcrl;	\/* Core Doze Previous Control *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdozpsrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdozpsrl;	\/* Core Doze Previous Status *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdozsrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdozsrl;	\/* Core Doze Status *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdp_appliance_vlan	net/cdp.c	/^ushort cdp_appliance_vlan;$/;"	v	typeref:typename:ushort
cdp_compute_csum	net/cdp.c	/^static ushort cdp_compute_csum(const uchar *buff, ushort len)$/;"	f	typeref:typename:ushort	file:
cdp_native_vlan	net/cdp.c	/^ushort cdp_native_vlan;$/;"	v	typeref:typename:ushort
cdp_ok	net/cdp.c	/^static int cdp_ok;$/;"	v	typeref:typename:int	file:
cdp_receive	net/cdp.c	/^void cdp_receive(const uchar *pkt, unsigned len)$/;"	f	typeref:typename:void
cdp_send_trigger	net/cdp.c	/^static int cdp_send_trigger(void)$/;"	f	typeref:typename:int	file:
cdp_seq	net/cdp.c	/^static int cdp_seq;$/;"	v	typeref:typename:int	file:
cdp_snap_hdr	net/cdp.c	/^static const uchar cdp_snap_hdr[8] = {$/;"	v	typeref:typename:const uchar[8]	file:
cdp_start	net/cdp.c	/^void cdp_start(void)$/;"	f	typeref:typename:void
cdp_timeout_handler	net/cdp.c	/^static void cdp_timeout_handler(void)$/;"	f	typeref:typename:void	file:
cdp_update_env	cmd/net.c	/^static void cdp_update_env(void)$/;"	f	typeref:typename:void	file:
cdpwrensr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdpwrensr;	\/* Core Domain Power Enable Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdpwrokclrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdpwrokclrr;	\/* Core Domain Power OK Clear Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdpwroksetr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cdpwroksetr;	\/* Core Domain Power OK Set Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cdr	arch/m68k/include/asm/immap_5227x.h	/^	u16 cdr;		\/* Clock Divider *\/$/;"	m	struct:ccm	typeref:typename:u16
cdr	arch/m68k/include/asm/immap_5301x.h	/^	u16 cdr;		\/* 0x0C Clock divider *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
cdr	arch/m68k/include/asm/immap_5329.h	/^	u16 cdr;		\/* 0x0C Clock divider register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
cdr	arch/m68k/include/asm/immap_5445x.h	/^	u16 cdr;		\/* Clock Divider Register *\/$/;"	m	struct:ccm	typeref:typename:u16
cdr	drivers/i2c/fti2c010.h	/^	uint32_t cdr; \/* 0x08: clock division register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
cdr	drivers/rtc/mpc5xxx.c	/^	volatile ulong	cdr;	\/* MBAR+0x814: current data register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
cdr	include/sja1000.h	/^	u8 cdr;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
cdrh	arch/m68k/include/asm/immap_5441x.h	/^	u16 cdrh;		\/* 0x10 Clock Divider *\/$/;"	m	struct:ccm	typeref:typename:u16
cdrl	arch/m68k/include/asm/immap_5441x.h	/^	u16 cdrl;		\/* 0x12 Clock Divider *\/$/;"	m	struct:ccm	typeref:typename:u16
cdrom	drivers/usb/gadget/f_mass_storage.c	/^		char cdrom;$/;"	m	struct:fsg_config::fsg_lun_config	typeref:typename:char	file:
cdrom	drivers/usb/gadget/storage_common.c	/^	unsigned int	cdrom:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
cds_pci_fixup	board/freescale/common/cds_pci_ft.c	/^static void cds_pci_fixup(void *blob)$/;"	f	typeref:typename:void	file:
cdsa	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cdsa;$/;"	m	struct:dma4_chan	typeref:typename:u32
ce	drivers/video/cfb_console.c	/^	} ce;				\/* color entry *\/$/;"	m	struct:palette	typeref:union:palette::__anon447d1c47010a	file:
ce_arg	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_arg;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_arg_cmd12	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_arg_cmd12;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_block_set	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_block_set;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_buf_acc	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_buf_acc;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_clk_ctrl	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_clk_ctrl;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_cmd_ctrl	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_cmd_ctrl;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_cmd_set	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_cmd_set;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_data	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_data;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_host_sts1	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_host_sts1;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_host_sts2	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_host_sts2;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_int	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_int;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_int_mask	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_int_mask;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_resp0	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_resp0;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_resp1	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_resp1;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_resp2	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_resp2;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_resp3	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_resp3;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_resp_cmd12	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_resp_cmd12;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
ce_version	drivers/mmc/sh_mmcif.h	/^	unsigned long ce_version;$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long
cec_addr_h	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_addr_h;			\/* 0x7d06 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_addr_l	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_addr_l;			\/* 0x7d05 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_ctrl	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_ctrl;			\/* 0x7d00 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_int;			\/* 0x7d04 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_lock	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_lock;			\/* 0x7d30 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_mask	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_mask;			\/* 0x7d02 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_polarity	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_polarity;		\/* 0x7d03 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_cnt	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_cnt;			\/* 0x7d08 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data0;		\/* 0x7d20 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data1;		\/* 0x7d21 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data10;		\/* 0x7d2a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data11;		\/* 0x7d2b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data12;		\/* 0x7d2c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data13;		\/* 0x7d2d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data14;		\/* 0x7d2e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data15;		\/* 0x7d2f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data2;		\/* 0x7d22 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data3;		\/* 0x7d23 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data4;		\/* 0x7d24 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data5;		\/* 0x7d25 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data6;		\/* 0x7d26 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data7;		\/* 0x7d27 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data8;		\/* 0x7d28 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_rx_data9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_rx_data9;		\/* 0x7d29 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_stat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_stat;			\/* 0x7d01 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_cnt	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_cnt;			\/* 0x7d07 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data0;		\/* 0x7d10 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data1;		\/* 0x7d11 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data10;		\/* 0x7d1a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data11;		\/* 0x7d1b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data12;		\/* 0x7d1c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data13;		\/* 0x7d1d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data14;		\/* 0x7d1e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data15;		\/* 0x7d1f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data2;		\/* 0x7d12 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data3;		\/* 0x7d13 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data4;		\/* 0x7d14 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data5;		\/* 0x7d15 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data6;		\/* 0x7d16 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data7;		\/* 0x7d17 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data8;		\/* 0x7d18 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_tx_data9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_tx_data9;		\/* 0x7d19 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
cec_wkupctrl	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 cec_wkupctrl;		\/* 0x7d31 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ceccfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	ceccfg;		\/* 0x138: APB_MISC_GP_CECCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
ceccfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	ceccfg;		\/* 0x138: APB_MISC_GP_CECCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
ceccfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	ceccfg;		\/* 0x138: APB_MISC_GP_CECCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
ceccr	include/linux/immap_qe.h	/^	u32 ceccr;		\/* QE controller configuration register *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cecdr	include/linux/immap_qe.h	/^	u32 cecdr;		\/* QE command data register *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cecount0	drivers/qe/uec.h	/^	u16  cecount0;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount1	drivers/qe/uec.h	/^	u16  cecount1;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount2	drivers/qe/uec.h	/^	u16  cecount2;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount3	drivers/qe/uec.h	/^	u16  cecount3;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount4	drivers/qe/uec.h	/^	u16  cecount4;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount5	drivers/qe/uec.h	/^	u16  cecount5;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount6	drivers/qe/uec.h	/^	u16  cecount6;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecount7	drivers/qe/uec.h	/^	u16  cecount7;         \/* QE  packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cecr	include/linux/immap_qe.h	/^	u32 cecr;		\/* QE command register *\/$/;"	m	struct:cp_qe	typeref:typename:u32
ceei	arch/m68k/include/asm/coldfire/edma.h	/^	u8 ceei;		\/* 0x1B Clear En Error Interrupt Request *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
ceexe1	include/linux/immap_qe.h	/^	u16 ceexe1;		\/* QE external request 1 event register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexe2	include/linux/immap_qe.h	/^	u16 ceexe2;		\/* QE external request 2 event register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexe3	include/linux/immap_qe.h	/^	u16 ceexe3;		\/* QE external request 3 event register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexe4	include/linux/immap_qe.h	/^	u16 ceexe4;		\/* QE external request 4 event register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexm1	include/linux/immap_qe.h	/^	u16 ceexm1;		\/* QE external request 1 mask register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexm2	include/linux/immap_qe.h	/^	u16 ceexm2;		\/* QE external request 2 mask register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexm3	include/linux/immap_qe.h	/^	u16 ceexm3;		\/* QE external request 3 mask register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
ceexm4	include/linux/immap_qe.h	/^	u16 ceexm4;		\/* QE external request 4 mask register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
cefuse_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	cefuse_fck: cefuse_fck {$/;"	l
ceh	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 ceh;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
cei_tk1_som_drvgrps	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^static const struct pmux_drvgrp_config cei_tk1_som_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
cei_tk1_som_gpio_inits	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^static const struct tegra_gpio_config cei_tk1_som_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
cei_tk1_som_mipipadctrlgrps	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^static const struct pmux_mipipadctrlgrp_config cei_tk1_som_mipipadctrlgrps[] = {$/;"	v	typeref:typename:const struct pmux_mipipadctrlgrp_config[]
cei_tk1_som_pingrps	board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h	/^static const struct pmux_pingrp_config cei_tk1_som_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
cekp_used	include/tpm.h	/^	u8	cekp_used;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
cell	include/linux/mtd/mtd.h	/^	unsigned cell;$/;"	m	struct:erase_info	typeref:typename:unsigned
cell_character0	include/power/fg_battery_cell_params.h	/^u16 cell_character0[16] = {$/;"	v	typeref:typename:u16[16]
cell_character1	include/power/fg_battery_cell_params.h	/^u16 cell_character1[16] = {$/;"	v	typeref:typename:u16[16]
cell_character2	include/power/fg_battery_cell_params.h	/^u16 cell_character2[16] = {$/;"	v	typeref:typename:u16[16]
cell_type	tools/mxsboot.c	/^	uint32_t		cell_type;			\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
cen	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cen;$/;"	m	struct:dma4_chan	typeref:typename:u32
cena	drivers/net/fsl-mc/dpio/qbman_sys.h	/^	void *cena;$/;"	m	struct:qbman_swp_sys	typeref:typename:void *
cena_bar	include/fsl-mc/fsl_qbman_base.h	/^	void *cena_bar; \/* Cache-enabled portal register map *\/$/;"	m	struct:qbman_swp_desc	typeref:typename:void *
center_dq_windows	drivers/ddr/altera/sequencer.c	/^static void center_dq_windows(const int write, int *left_edge, int *right_edge,$/;"	f	typeref:typename:void	file:
center_item	scripts/kconfig/nconf.c	/^static void center_item(int selected_index, int *last_top_row)$/;"	f	typeref:typename:void	file:
central_seq_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
central_seq_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
central_seq_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
central_seq_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
central_seq_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
central_seq_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
central_seq_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
central_seq_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
central_seq_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
central_seq_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
central_seq_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
central_seq_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	central_seq_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
centralization_high_limit	drivers/ddr/marvell/axp/ddr3_dqs.c	/^static int centralization_high_limit[MAX_PUP_NUM] = { 0 };$/;"	v	typeref:typename:int[]	file:
centralization_low_limit	drivers/ddr/marvell/axp/ddr3_dqs.c	/^static int centralization_low_limit[MAX_PUP_NUM] = { 0 };$/;"	v	typeref:typename:int[]	file:
centralization_state	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u8 centralization_state[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
century	arch/x86/include/asm/acpi_table.h	/^	u8 century;$/;"	m	struct:acpi_fadt	typeref:typename:u8
cer	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 cer;	\/* Timer count enable reg *\/$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
cer	drivers/block/fsl_sata.h	/^	u32 cer;		\/* Command error register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
cercr	include/linux/immap_qe.h	/^	u16 cercr;		\/* QE RAM control register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
cerq	arch/m68k/include/asm/coldfire/edma.h	/^	u8 cerq;		\/* 0x19 Clear Enable Request *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
cerr	arch/m68k/include/asm/coldfire/edma.h	/^	u8 cerr;		\/* 0x1D Clear Error *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
ceter	include/linux/immap_qe.h	/^	u16 ceter;		\/* QE timer event register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
cetmr	include/linux/immap_qe.h	/^	u16 cetmr;		\/* QE timers mask register *\/$/;"	m	struct:cp_qe	typeref:typename:u16
cetscr	include/linux/immap_qe.h	/^	u32 cetscr;		\/* QE time-stamp timer control register *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cetsr1	include/linux/immap_qe.h	/^	u32 cetsr1;		\/* QE time-stamp register 1 *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cetsr2	include/linux/immap_qe.h	/^	u32 cetsr2;		\/* QE time-stamp register 2 *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cevter	include/linux/immap_qe.h	/^	u32 cevter;		\/* QE virtual tasks event register *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cevtmr	include/linux/immap_qe.h	/^	u32 cevtmr;		\/* QE virtual tasks mask register *\/$/;"	m	struct:cp_qe	typeref:typename:u32
cexterr	drivers/net/e1000.h	/^	uint64_t cexterr;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
cf_advanced_caps	include/ata.h	/^	unsigned short	cf_advanced_caps;$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cf_dcache_status	arch/m68k/lib/cache.c	/^volatile int *cf_dcache_status = (int *)DCACHE_STATUS;$/;"	v	typeref:typename:volatile int *
cf_icache_status	arch/m68k/lib/cache.c	/^volatile int *cf_icache_status = (int *)ICACHE_STATUS;$/;"	v	typeref:typename:volatile int *
cf_ide_init	board/bf533-stamp/ide-cf.c	/^void cf_ide_init(void)$/;"	f	typeref:typename:void
cf_ide_init	board/bf537-stamp/ide-cf.c	/^void cf_ide_init(void)$/;"	f	typeref:typename:void
cf_inb	board/bf533-stamp/ide-cf.c	/^unsigned char cf_inb(volatile unsigned char *addr)$/;"	f	typeref:typename:unsigned char
cf_inb	board/bf537-stamp/ide-cf.c	/^unsigned char cf_inb(volatile unsigned char *addr)$/;"	f	typeref:typename:unsigned char
cf_insw	board/bf533-stamp/ide-cf.c	/^void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)$/;"	f	typeref:typename:void
cf_insw	board/bf537-stamp/ide-cf.c	/^void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)$/;"	f	typeref:typename:void
cf_outb	board/bf533-stamp/ide-cf.c	/^void cf_outb(unsigned char val, volatile unsigned char *addr)$/;"	f	typeref:typename:void
cf_outb	board/bf537-stamp/ide-cf.c	/^void cf_outb(unsigned char val, volatile unsigned char *addr)$/;"	f	typeref:typename:void
cf_outsw	board/bf533-stamp/ide-cf.c	/^void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)$/;"	f	typeref:typename:void
cf_outsw	board/bf537-stamp/ide-cf.c	/^void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)$/;"	f	typeref:typename:void
cf_qspi_slave	drivers/spi/cf_qspi.c	/^struct cf_qspi_slave {$/;"	s	file:
cf_spi_slave	drivers/spi/cf_spi.c	/^struct cf_spi_slave {$/;"	s	file:
cfadr	arch/m68k/include/asm/immap_520x.h	/^	u32 cfadr;		\/* 0x70 *\/$/;"	m	struct:scm2	typeref:typename:u32
cfadr	arch/m68k/include/asm/immap_5227x.h	/^	u32 cfadr;		\/* 0x00 Core Fault Address *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
cfadr	arch/m68k/include/asm/immap_5301x.h	/^	u32 cfadr;		\/* 0x70 *\/$/;"	m	struct:scm2	typeref:typename:u32
cfadr	arch/m68k/include/asm/immap_5329.h	/^	u32 cfadr;		\/* 0x70 Core Fault Address Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
cfadr	arch/m68k/include/asm/immap_5441x.h	/^	u32 cfadr;		\/* 0x70 *\/$/;"	m	struct:scm	typeref:typename:u32
cfadr	arch/m68k/include/asm/immap_5445x.h	/^	u32 cfadr;		\/* 0x70 *\/$/;"	m	struct:scm2	typeref:typename:u32
cfatr	arch/m68k/include/asm/immap_520x.h	/^	u8 cfatr;		\/* 0x77 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfatr	arch/m68k/include/asm/immap_5227x.h	/^	u8 cfatr;		\/* 0x07 Core Fault Attributes *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cfatr	arch/m68k/include/asm/immap_5301x.h	/^	u8 cfatr;		\/* 0x77 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfatr	arch/m68k/include/asm/immap_5329.h	/^	u8 cfatr;		\/* 0x77 Core Fault Attributes Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cfatr	arch/m68k/include/asm/immap_5441x.h	/^	u8 cfatr;		\/* 0x77 *\/$/;"	m	struct:scm	typeref:typename:u8
cfatr	arch/m68k/include/asm/immap_5445x.h	/^	u8 cfatr;		\/* 0x77 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfb_do_flush_cache	drivers/video/cfb_console.c	/^static int cfb_do_flush_cache;$/;"	v	typeref:typename:int	file:
cfb_fb_is_in_dram	drivers/video/cfb_console.c	/^static int cfb_fb_is_in_dram(void)$/;"	f	typeref:typename:int	file:
cfb_video_putc	drivers/video/cfb_console.c	/^static void cfb_video_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void	file:
cfb_video_puts	drivers/video/cfb_console.c	/^static void cfb_video_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
cfcrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 cfcrc;		\/* 0x0F0 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
cfdtr	arch/m68k/include/asm/immap_520x.h	/^	u32 cfdtr;		\/* 0x7C *\/$/;"	m	struct:scm2	typeref:typename:u32
cfdtr	arch/m68k/include/asm/immap_5227x.h	/^	u32 cfdtr;		\/* 0x08 Core Fault Data *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
cfdtr	arch/m68k/include/asm/immap_5301x.h	/^	u32 cfdtr;		\/* 0x7C *\/$/;"	m	struct:scm2	typeref:typename:u32
cfdtr	arch/m68k/include/asm/immap_5329.h	/^	u32 cfdtr;		\/* 0x7C Core Fault Data Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
cfdtr	arch/m68k/include/asm/immap_5441x.h	/^	u32 cfdtr;		\/* 0x7C *\/$/;"	m	struct:scm	typeref:typename:u32
cfdtr	arch/m68k/include/asm/immap_5445x.h	/^	u32 cfdtr;		\/* 0x7C *\/$/;"	m	struct:scm2	typeref:typename:u32
cfg	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 cfg;	\/* 0x10604 *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
cfg	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 cfg;$/;"	m	struct:cspi_regs	typeref:typename:u32
cfg	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cfg;$/;"	m	struct:cspi_regs	typeref:typename:u32
cfg	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 cfg;$/;"	m	struct:cspi_regs	typeref:typename:u32
cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	} cfg[4];			\/* 00 *\/$/;"	m	struct:de_ui	typeref:struct:de_ui::__anon5efd7b530308[4]
cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	} cfg[4];$/;"	m	struct:de_vi	typeref:struct:de_vi::__anon5efd7b530208[4]
cfg	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 cfg[3];$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32[3]
cfg	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 cfg[4];$/;"	m	struct:sunxi_gpio	typeref:typename:u32[4]
cfg	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 cfg;		\/* 0x14 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
cfg	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 cfg;		\/* 0x00: EMC_CFG *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
cfg	arch/arm/include/asm/arch/display2.h	/^	} cfg[4];			\/* 00 *\/$/;"	m	struct:de_ui	typeref:struct:de_ui::__anon279c75ef0308[4]
cfg	arch/arm/include/asm/arch/display2.h	/^	} cfg[4];$/;"	m	struct:de_vi	typeref:struct:de_vi::__anon279c75ef0208[4]
cfg	arch/arm/include/asm/arch/gpio.h	/^	u32 cfg[3];$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32[3]
cfg	arch/arm/include/asm/arch/gpio.h	/^	u32 cfg[4];$/;"	m	struct:sunxi_gpio	typeref:typename:u32[4]
cfg	arch/arm/include/asm/arch/watchdog.h	/^	u32 cfg;		\/* 0x14 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
cfg	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 cfg;$/;"	m	struct:at91_emac	typeref:typename:u32
cfg	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	struct mmc_config cfg;$/;"	m	struct:davinci_mmc	typeref:struct:mmc_config
cfg	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	cfg;$/;"	m	struct:scu_registers	typeref:typename:u32
cfg	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 cfg; \/* 0x8 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
cfg	arch/blackfin/include/asm/dma.h	/^	u16 cfg;$/;"	m	struct:dmasg	typeref:typename:u16
cfg	arch/blackfin/include/asm/dma.h	/^	u16 cfg;$/;"	m	struct:dmasg_large	typeref:typename:u16
cfg	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cfg;		\/* 0x240 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
cfg	arch/powerpc/include/asm/immap_512x.h	/^	ddr512x_config_t cfg;$/;"	m	struct:sdram_conf_s	typeref:typename:ddr512x_config_t
cfg	drivers/block/sata_dwc.c	/^	struct dmareg cfg;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
cfg	drivers/mmc/arm_pl180_mmci.h	/^	struct mmc_config cfg;$/;"	m	struct:pl180_mmc_host	typeref:struct:mmc_config
cfg	drivers/mmc/atmel_sdhci.c	/^	struct mmc_config cfg;$/;"	m	struct:atmel_sdhci_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/exynos_dw_mmc.c	/^	struct mmc_config cfg;$/;"	m	struct:exynos_mmc_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/fsl_esdhc.c	/^	struct mmc_config cfg;$/;"	m	struct:fsl_esdhc_priv	typeref:struct:mmc_config	file:
cfg	drivers/mmc/ftsdc010_mci.c	/^	struct mmc_config cfg;	\/* mmc configuration *\/$/;"	m	struct:ftsdc010_chip	typeref:struct:mmc_config	file:
cfg	drivers/mmc/gen_atmel_mci.c	/^	struct mmc_config	cfg;$/;"	m	struct:atmel_mci_priv	typeref:struct:mmc_config	file:
cfg	drivers/mmc/msm_sdhci.c	/^	struct mmc_config cfg;$/;"	m	struct:msm_sdhc_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/mxsmmc.c	/^	struct mmc_config	cfg;	\/* mmc configuration *\/$/;"	m	struct:mxsmmc_priv	typeref:struct:mmc_config	file:
cfg	drivers/mmc/omap_hsmmc.c	/^	struct mmc_config cfg;$/;"	m	struct:omap_hsmmc_data	typeref:struct:mmc_config	file:
cfg	drivers/mmc/rockchip_dw_mmc.c	/^	struct mmc_config cfg;$/;"	m	struct:rockchip_mmc_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/rockchip_sdhci.c	/^	struct mmc_config cfg;$/;"	m	struct:rockchip_sdhc_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/s3c_sdi.c	/^	struct mmc_config	cfg;$/;"	m	struct:s3cmmc_priv	typeref:struct:mmc_config	file:
cfg	drivers/mmc/s5p_sdhci.c	/^	struct mmc_config cfg;$/;"	m	struct:s5p_sdhci_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/sandbox_mmc.c	/^	struct mmc_config cfg;$/;"	m	struct:sandbox_mmc_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/socfpga_dw_mmc.c	/^	struct mmc_config cfg;$/;"	m	struct:socfpga_dwmci_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/sunxi_mmc.c	/^	struct mmc_config cfg;$/;"	m	struct:sunxi_mmc_host	typeref:struct:mmc_config	file:
cfg	drivers/mmc/tegra_mmc.c	/^	struct mmc_config cfg;	\/* mmc configuration *\/$/;"	m	struct:tegra_mmc_priv	typeref:struct:mmc_config	file:
cfg	drivers/mmc/uniphier-sd.c	/^	struct mmc_config cfg;$/;"	m	struct:uniphier_sd_plat	typeref:struct:mmc_config	file:
cfg	drivers/mmc/zynq_sdhci.c	/^	struct mmc_config cfg;$/;"	m	struct:arasan_sdhci_plat	typeref:struct:mmc_config	file:
cfg	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 cfg;		\/* 0x00 PMECC Configuration Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
cfg	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 cfg;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
cfg	drivers/spi/mvebu_a3700_spi.c	/^	u32 cfg;	\/* 0x10604 *\/$/;"	m	struct:spi_reg	typeref:typename:u32	file:
cfg	include/atmel_mci.h	/^	u32	cfg;	\/* 0x54 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
cfg	include/dwmmc.h	/^	struct mmc_config cfg;$/;"	m	struct:dwmci_host	typeref:struct:mmc_config
cfg	include/fsl_esdhc.h	/^	struct mmc_config cfg;$/;"	m	struct:fsl_esdhc_cfg	typeref:struct:mmc_config
cfg	include/mmc.h	/^	const struct mmc_config *cfg;	\/* provided configuration *\/$/;"	m	struct:mmc	typeref:typename:const struct mmc_config *
cfg	include/mpc5xxx.h	/^	volatile u32	cfg;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
cfg	include/mvebu_mmc.h	/^	struct mmc_config cfg;$/;"	m	struct:mvebu_mmc_cfg	typeref:struct:mmc_config
cfg	include/qfw.h	/^	struct fw_cfg_file cfg; \/* firmware file information *\/$/;"	m	struct:fw_file	typeref:struct:fw_cfg_file
cfg	include/sdhci.h	/^	struct mmc_config cfg;$/;"	m	struct:sdhci_host	typeref:struct:mmc_config
cfg0	arch/arm/imx-common/cpu.c	/^	uint32_t	cfg0;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
cfg0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cfg0; 	\/* configuration 0 *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cfg0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 cfg0;$/;"	m	struct:esdc_regs	typeref:typename:u32
cfg0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 cfg0;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
cfg0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 cfg0;			\/* 0x004 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cfg0	arch/arm/include/asm/arch/display.h	/^	u32 cfg0;			\/* 0x004 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cfg0	arch/powerpc/include/asm/immap_85xx.h	/^			u32	cfg0;		\/* cfg register 0 *\/$/;"	m	struct:ccsr_raide::__anondcd7518a0c08::__anondcd7518a0d08	typeref:typename:u32
cfg0_phys	drivers/pci/pcie_layerscape.c	/^	u64 cfg0_phys;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
cfg0_size	drivers/pci/pcie_layerscape.c	/^	u64 cfg0_size;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
cfg1	arch/arm/imx-common/cpu.c	/^	uint32_t	cfg1;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
cfg1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cfg1; 	\/* configuration 1 *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
cfg1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 cfg1;$/;"	m	struct:esdc_regs	typeref:typename:u32
cfg1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 cfg1;$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32
cfg1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 cfg1;			\/* 0x138 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cfg1	arch/arm/include/asm/arch/display.h	/^	u32 cfg1;			\/* 0x138 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cfg1	arch/m68k/include/asm/immap_520x.h	/^	u32 cfg1;		\/* 0x08 Cfg 1 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cfg1	arch/m68k/include/asm/immap_5301x.h	/^	u32 cfg1;		\/* 0x08 Cfg 1 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cfg1	arch/m68k/include/asm/immap_5329.h	/^	u32 cfg1;		\/* 0x08 Configuration register 1 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cfg1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cfg1;		\/* 0x08 *\/$/;"	m	struct:sdram	typeref:typename:u32
cfg1	arch/powerpc/include/asm/immap_85xx.h	/^			u32	cfg1;		\/* cfg register 1 *\/$/;"	m	struct:ccsr_raide::__anondcd7518a0c08::__anondcd7518a0d08	typeref:typename:u32
cfg1	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic cfg1; \/* 0x200*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
cfg1_phys	drivers/pci/pcie_layerscape.c	/^	u64 cfg1_phys;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
cfg1_size	drivers/pci/pcie_layerscape.c	/^	u64 cfg1_size;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
cfg2	arch/arm/imx-common/cpu.c	/^	uint32_t	cfg2;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
cfg2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cfg2;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
cfg2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 cfg2;$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32
cfg2	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 cfg2;			\/* 0x13c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cfg2	arch/arm/include/asm/arch/display.h	/^	u32 cfg2;			\/* 0x13c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
cfg2	arch/m68k/include/asm/immap_520x.h	/^	u32 cfg2;		\/* 0x0C Cfg 2 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cfg2	arch/m68k/include/asm/immap_5301x.h	/^	u32 cfg2;		\/* 0x0C Cfg 2 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cfg2	arch/m68k/include/asm/immap_5329.h	/^	u32 cfg2;		\/* 0x0C Configuration register 2 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cfg2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cfg2;		\/* 0x0c *\/$/;"	m	struct:sdram	typeref:typename:u32
cfg2	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic cfg2; \/* 0x210*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
cfg2fuser0clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t cfg2fuser0clk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
cfg3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cfg3;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
cfg3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 cfg3;$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32
cfg4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cfg4;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
cfg4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 cfg4;$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32
cfg5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cfg5;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
cfg6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cfg6;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
cfg_a	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	cfg_a;$/;"	m	struct:rx_chan_regs	typeref:typename:u32
cfg_a	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	cfg_a;$/;"	m	struct:tx_chan_regs	typeref:typename:u32
cfg_addr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	cfg_addr;	\/* 0x000 - PCI Configuration Address Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
cfg_addr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cfg_addr;	\/* PCIX Configuration Addr *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
cfg_addr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	cfg_addr;	\/* 0x8000 - PEX Configuration Address Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
cfg_addr	include/pci.h	/^	volatile unsigned int *cfg_addr;$/;"	m	struct:pci_controller	typeref:typename:volatile unsigned int *
cfg_b	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	cfg_b;$/;"	m	struct:tx_chan_regs	typeref:typename:u32
cfg_base	drivers/pci/pcie_xilinx.c	/^	void *cfg_base;$/;"	m	struct:xilinx_pcie	typeref:typename:void *	file:
cfg_clk	arch/arm/dts/socfpga.dtsi	/^					cfg_clk: cfg_clk {$/;"	l
cfg_ctl	arch/arm/include/asm/arch-tegra/apb_misc.h	/^	u32	cfg_ctl;	\/* 0x24 *\/$/;"	m	struct:apb_misc_pp_ctlr	typeref:typename:u32
cfg_data	arch/powerpc/include/asm/fsl_pci.h	/^	u32	cfg_data;	\/* 0x004 - PCI Configuration Data Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
cfg_data	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cfg_data;	\/* PCIX Configuration Data *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
cfg_data	arch/powerpc/include/asm/immap_86xx.h	/^	uint	cfg_data;	\/* 0x8004 - PEX Configuration Data Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
cfg_data	include/pci.h	/^	volatile unsigned char *cfg_data;$/;"	m	struct:pci_controller	typeref:typename:volatile unsigned char *
cfg_entry	drivers/soc/keystone/keystone_serdes.c	/^struct cfg_entry {$/;"	s	file:
cfg_filename	tools/mxsimage.c	/^	char				*cfg_filename;$/;"	m	struct:sb_image_ctx	typeref:typename:char *	file:
cfg_h2f_usr0_clk	arch/arm/dts/socfpga.dtsi	/^						cfg_h2f_usr0_clk: cfg_h2f_usr0_clk {$/;"	l	label:main_pll
cfg_pad1	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad1;		\/* offset 0x200 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_pad2	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad2;		\/* offset 0x204 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_pad3	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad3;		\/* offset 0x208 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_pad4	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad4;		\/* offset 0x20c *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_pad5	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad5;		\/* offset 0x210 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_pad6	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad6;		\/* offset 0x214 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_pad7	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 cfg_pad7;		\/* offset 0x218 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
cfg_rcgr	arch/arm/mach-snapdragon/clock-apq8016.c	/^	uintptr_t cfg_rcgr;$/;"	m	struct:bcr_regs	typeref:typename:uintptr_t	file:
cfg_rcw_src	board/freescale/t4rdb/cpld.h	/^	u8 cfg_rcw_src;	\/* 0x06 - RCW Source Location Control Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cfg_rcw_src1	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 cfg_rcw_src1;	\/* Reset config word 1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cfg_rcw_src1	board/freescale/ls1043ardb/cpld.h	/^	u8 cfg_rcw_src1;	\/* 0x5 - Reset config word 1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cfg_rcw_src1	board/freescale/ls1046ardb/cpld.h	/^	u8 cfg_rcw_src1;	\/* 0x5 - RCW Source Location POR Regsiter 1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cfg_rcw_src2	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 cfg_rcw_src2;	\/* Reset config word 2 *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cfg_rcw_src2	board/freescale/ls1043ardb/cpld.h	/^	u8 cfg_rcw_src2;	\/* 0x6 - Reset config word 1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cfg_rcw_src2	board/freescale/ls1046ardb/cpld.h	/^	u8 cfg_rcw_src2;	\/* 0x6 - RCW Source Location POR Regsiter 2 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cfg_read	arch/m68k/cpu/mcf5445x/pci.c	/^#define cfg_read(/;"	d	file:
cfg_read	arch/m68k/cpu/mcf547x_8x/pci.c	/^#define cfg_read(/;"	d	file:
cfg_read	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define cfg_read(/;"	d	file:
cfg_read	drivers/pci/pci_indirect.c	/^#define cfg_read(/;"	d	file:
cfg_read_err	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define cfg_read_err(/;"	d	file:
cfg_reg	drivers/spi/mxc_spi.c	/^	u32		cfg_reg;$/;"	m	struct:mxc_spi_slave	typeref:typename:u32	file:
cfg_region_off	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	cfg_region_off;		\/* configuration region offset *\/$/;"	m	struct:fsp_header	typeref:typename:u32
cfg_region_size	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	cfg_region_size;	\/* configuration region size *\/$/;"	m	struct:fsp_header	typeref:typename:u32
cfg_regs	include/sh_pfc.h	/^	struct pinmux_cfg_reg *cfg_regs;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_cfg_reg *
cfg_seq	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^struct cfg_seq {$/;"	s
cfg_seq_size	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u8 cfg_seq_size;$/;"	m	struct:cfg_seq	typeref:typename:u8
cfg_simulate_spd_eeprom	board/amcc/bamboo/bamboo.c	/^const unsigned char cfg_simulate_spd_eeprom[128] = {$/;"	v	typeref:typename:const unsigned char[128]
cfg_val	arch/arm/include/asm/imx-common/boot_mode.h	/^	unsigned cfg_val;$/;"	m	struct:boot_mode	typeref:typename:unsigned
cfg_video_init	drivers/video/cfb_console.c	/^static int cfg_video_init(void)$/;"	f	typeref:typename:int	file:
cfg_wb0	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 cfg_wb0:8;$/;"	m	struct:fbio_spare_reg::__anon24552f890308	typeref:typename:u32:8	file:
cfg_write	arch/m68k/cpu/mcf5445x/pci.c	/^#define cfg_write(/;"	d	file:
cfg_write	arch/m68k/cpu/mcf547x_8x/pci.c	/^#define cfg_write(/;"	d	file:
cfg_write	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define cfg_write(/;"	d	file:
cfg_write	drivers/pci/pci_indirect.c	/^#define cfg_write(/;"	d	file:
cfg_write_err	arch/powerpc/cpu/mpc83xx/pcie.c	/^#define cfg_write_err(/;"	d	file:
cfgchip0	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cfgchip0;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
cfgchip1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cfgchip1;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
cfgchip2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cfgchip2;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
cfgchip3	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cfgchip3;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
cfgchip4	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cfgchip4;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
cfgflag	arch/m68k/include/asm/immap_5329.h	/^	u32 cfgflag;		\/* 0x180 Configure Flag Register *\/$/;"	m	struct:usb_otg	typeref:typename:u32
cfglck	arch/arm/mach-keystone/msmc.c	/^	u32	cfglck;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
cfglckstat	arch/arm/mach-keystone/msmc.c	/^	u32	cfglckstat;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
cfgn	tools/kwbimage.c	/^static int cfgn;$/;"	v	typeref:typename:int	file:
cfgr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cfgr;	\/* RCC clock configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cfgr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 cfgr;	\/* RCC clock configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cfgr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 cfgr;	\/* RCC clock configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cfgr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	cfgr;		\/* 0x04 Configuration Register *\/$/;"	m	struct:at91_ebi	typeref:typename:u32
cfgr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 cfgr;		\/* 0x04 PIO Configuration Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
cfgram	arch/m68k/include/asm/immap_5275.h	/^	u8 cfgram[1024];$/;"	m	struct:usb	typeref:typename:u8[1024]
cfgs	drivers/soc/keystone/keystone_serdes.c	/^static struct cfg_entry cfgs[] = {$/;"	v	typeref:struct:cfg_entry[]	file:
cfgs2fuser0clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	cfgs2fuser0clk;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
cfgulck	arch/arm/mach-keystone/msmc.c	/^	u32	cfgulck;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
cfi_flash_64m	arch/nios2/dts/3c120_devboard.dts	/^		cfi_flash_64m: flash@0x0 {$/;"	l
cfi_flash_bank_addr	arch/arm/mach-uniphier/micro-support-card.c	/^phys_addr_t cfi_flash_bank_addr(int i)$/;"	f	typeref:typename:phys_addr_t
cfi_flash_bank_addr	board/liebherr/lwmon5/lwmon5.c	/^phys_addr_t cfi_flash_bank_addr(int bank)$/;"	f	typeref:typename:phys_addr_t
cfi_flash_bank_addr	drivers/mtd/cfi_flash.c	/^__weak phys_addr_t cfi_flash_bank_addr(int i)$/;"	f	typeref:typename:__weak phys_addr_t
cfi_flash_bank_addr	drivers/mtd/cfi_flash.c	/^phys_addr_t cfi_flash_bank_addr(int i)$/;"	f	typeref:typename:phys_addr_t
cfi_flash_bank_size	arch/arm/mach-uniphier/micro-support-card.c	/^unsigned long cfi_flash_bank_size(int i)$/;"	f	typeref:typename:unsigned long
cfi_flash_bank_size	drivers/mtd/cfi_flash.c	/^__weak unsigned long cfi_flash_bank_size(int i)$/;"	f	typeref:typename:__weak unsigned long
cfi_flash_base	drivers/mtd/cfi_flash.c	/^static phys_addr_t cfi_flash_base[CFI_MAX_FLASH_BANKS];$/;"	v	typeref:typename:phys_addr_t[]	file:
cfi_flash_config_reg	drivers/mtd/cfi_flash.c	/^static u16 cfi_flash_config_reg(int i)$/;"	f	typeref:typename:u16	file:
cfi_flash_ids	drivers/mtd/cfi_flash.c	/^static const struct udevice_id cfi_flash_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cfi_flash_init_dm	drivers/mtd/cfi_flash.c	/^static void cfi_flash_init_dm(void)$/;"	f	typeref:typename:void	file:
cfi_flash_num_flash_banks	drivers/mtd/cfi_flash.c	/^int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;$/;"	v	typeref:typename:int
cfi_flash_probe	drivers/mtd/cfi_flash.c	/^static int cfi_flash_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cfi_flash_set_config_reg	drivers/mtd/cfi_flash.c	/^static void cfi_flash_set_config_reg(u32 base, u16 val)$/;"	f	typeref:typename:void	file:
cfi_mtd_erase	drivers/mtd/cfi_mtd.c	/^static int cfi_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int	file:
cfi_mtd_info	drivers/mtd/cfi_mtd.c	/^static struct mtd_info cfi_mtd_info[CFI_MAX_FLASH_BANKS];$/;"	v	typeref:struct:mtd_info[]	file:
cfi_mtd_init	drivers/mtd/cfi_mtd.c	/^int cfi_mtd_init(void)$/;"	f	typeref:typename:int
cfi_mtd_lock	drivers/mtd/cfi_mtd.c	/^static int cfi_mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
cfi_mtd_names	drivers/mtd/cfi_mtd.c	/^static char cfi_mtd_names[CFI_MAX_FLASH_BANKS][16];$/;"	v	typeref:typename:char[][16]	file:
cfi_mtd_read	drivers/mtd/cfi_mtd.c	/^static int cfi_mtd_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
cfi_mtd_set_erasesize	drivers/mtd/cfi_mtd.c	/^static int cfi_mtd_set_erasesize(struct mtd_info *mtd, flash_info_t *fi)$/;"	f	typeref:typename:int	file:
cfi_mtd_sync	drivers/mtd/cfi_mtd.c	/^static void cfi_mtd_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
cfi_mtd_unlock	drivers/mtd/cfi_mtd.c	/^static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
cfi_mtd_write	drivers/mtd/cfi_mtd.c	/^static int cfi_mtd_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
cfi_offset	include/flash.h	/^	ushort	cfi_offset;		\/* offset for cfi query			*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
cfi_pri_hdr	include/mtd/cfi_flash.h	/^struct cfi_pri_hdr {$/;"	s
cfi_protect_bugfix	drivers/mtd/cfi_flash.c	/^static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)$/;"	f	typeref:typename:int	file:
cfi_qry	include/mtd/cfi_flash.h	/^struct cfi_qry {$/;"	s
cfi_reverse_geometry	drivers/mtd/cfi_flash.c	/^static void cfi_reverse_geometry(struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
cfi_version	include/flash.h	/^	ushort	cfi_version;		\/* cfi version				*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
cfier	arch/m68k/include/asm/immap_520x.h	/^	u8 cfier;		\/* 0x75 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfier	arch/m68k/include/asm/immap_5227x.h	/^	u8 cfier;		\/* 0x05 Core Fault Interrupt Enable *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cfier	arch/m68k/include/asm/immap_5301x.h	/^	u8 cfier;		\/* 0x75 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfier	arch/m68k/include/asm/immap_5329.h	/^	u8 cfier;		\/* 0x75 Core Fault Interrupt Enable Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cfier	arch/m68k/include/asm/immap_5441x.h	/^	u8 cfier;		\/* 0x75 *\/$/;"	m	struct:scm	typeref:typename:u8
cfier	arch/m68k/include/asm/immap_5445x.h	/^	u8 cfier;		\/* 0x75 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfis	drivers/block/fsl_sata.h	/^	u8 cfis[SATA_HC_CMD_DESC_CFIS_SIZE];$/;"	m	struct:cmd_desc	typeref:typename:u8[]
cfiword_t	include/mtd/cfi_flash.h	/^} cfiword_t;$/;"	t	typeref:union:__anonbda7ff61010a
cflag	drivers/bios_emulator/include/biosemu.h	/^	u16 cflag, cflag_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
cflag	drivers/bios_emulator/include/biosemu.h	/^	u16 cflag_hi, cflag;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
cflag	drivers/bios_emulator/include/biosemu.h	/^	u32 cflag;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
cflag_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 cflag, cflag_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
cflag_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 cflag_hi, cflag;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
cflags	lib/libfdt/setup.py	/^    cflags = [flag for flag in cflags.split(' ') if flag]$/;"	v
cflags	lib/libfdt/setup.py	/^cflags = sys.argv[1]$/;"	v
cfloc	arch/m68k/include/asm/immap_520x.h	/^	u8 cfloc;		\/* 0x76 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfloc	arch/m68k/include/asm/immap_5227x.h	/^	u8 cfloc;		\/* 0x06 Core Fault Location *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cfloc	arch/m68k/include/asm/immap_5301x.h	/^	u8 cfloc;		\/* 0x76 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfloc	arch/m68k/include/asm/immap_5329.h	/^	u8 cfloc;		\/* 0x76 Core Fault Location Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cfloc	arch/m68k/include/asm/immap_5441x.h	/^	u8 cfloc;		\/* 0x76 *\/$/;"	m	struct:scm	typeref:typename:u8
cfloc	arch/m68k/include/asm/immap_5445x.h	/^	u8 cfloc;		\/* 0x76 *\/$/;"	m	struct:scm2	typeref:typename:u8
cfm	arch/powerpc/include/asm/immap_512x.h	/^	cfm512x_t		cfm;		\/* Clock Frequency Measurement *\/$/;"	m	struct:immap	typeref:typename:cfm512x_t
cfm512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct cfm512x {$/;"	s
cfm512x_t	arch/powerpc/include/asm/immap_512x.h	/^} cfm512x_t;$/;"	t	typeref:struct:cfm512x
cfn	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cfn;$/;"	m	struct:dma4_chan	typeref:typename:u32
cfp_t	api/api.c	/^typedef	int (*cfp_t)(va_list argp);$/;"	t	typeref:typename:int (*)(va_list argp)	file:
cfr	include/faraday/ftsdmc021.h	/^	unsigned int	cfr;		\/* 0x104 - Controller Feature Reg *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
cfr1	arch/powerpc/include/asm/immap_83xx.h	/^	u8 cfr1;		\/* Timer1\/2 Configuration *\/$/;"	m	struct:gtm83xx	typeref:typename:u8
cfr2	arch/powerpc/include/asm/immap_83xx.h	/^	u8 cfr2;		\/* Timer3\/4 Configuration *\/$/;"	m	struct:gtm83xx	typeref:typename:u8
cfree	common/dlmalloc.c	/^void cfree(Void_t *mem)$/;"	f	typeref:typename:void
cfree	include/malloc.h	/^#pragma weak cfree /;"	d
cfs_enable_1	include/ata.h	/^	unsigned short  cfs_enable_1;	\/* command set-feature enabled *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cfs_enable_2	include/ata.h	/^	unsigned short  cfs_enable_2;	\/* command set-feature enabled *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cfspi_claim_bus	arch/m68k/cpu/mcf5227x/cpu_init.c	/^int cfspi_claim_bus(uint bus, uint cs)$/;"	f	typeref:typename:int
cfspi_claim_bus	arch/m68k/cpu/mcf5445x/cpu_init.c	/^int cfspi_claim_bus(uint bus, uint cs)$/;"	f	typeref:typename:int
cfspi_cs_activate	drivers/spi/cf_qspi.c	/^void cfspi_cs_activate(uint bus, uint cs, uint cs_active_high)$/;"	f	typeref:typename:void
cfspi_cs_deactivate	drivers/spi/cf_qspi.c	/^void cfspi_cs_deactivate(uint bus, uint cs, uint cs_active_high)$/;"	f	typeref:typename:void
cfspi_init	drivers/spi/cf_spi.c	/^static void cfspi_init(void)$/;"	f	typeref:typename:void	file:
cfspi_port_conf	arch/m68k/cpu/mcf5227x/cpu_init.c	/^void cfspi_port_conf(void)$/;"	f	typeref:typename:void
cfspi_port_conf	arch/m68k/cpu/mcf52x2/cpu_init.c	/^void cfspi_port_conf(void)$/;"	f	typeref:typename:void
cfspi_port_conf	arch/m68k/cpu/mcf5445x/cpu_init.c	/^void cfspi_port_conf(void)$/;"	f	typeref:typename:void
cfspi_release_bus	arch/m68k/cpu/mcf5227x/cpu_init.c	/^void cfspi_release_bus(uint bus, uint cs)$/;"	f	typeref:typename:void
cfspi_release_bus	arch/m68k/cpu/mcf5445x/cpu_init.c	/^void cfspi_release_bus(uint bus, uint cs)$/;"	f	typeref:typename:void
cfspi_rx	drivers/spi/cf_spi.c	/^static u16 cfspi_rx(void)$/;"	f	typeref:typename:u16	file:
cfspi_setup_slave	drivers/spi/cf_spi.c	/^static struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave,$/;"	f	typeref:struct:spi_slave *	file:
cfspi_tx	drivers/spi/cf_spi.c	/^static void cfspi_tx(u32 ctrl, u16 data)$/;"	f	typeref:typename:void	file:
cfspi_xfer	drivers/spi/cf_spi.c	/^static int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,$/;"	f	typeref:typename:int	file:
cfsse	include/ata.h	/^	unsigned short  cfsse;		\/* command set-feature supported extensions *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cftab	lib/bzip2/bzlib_private.h	/^      Int32    cftab[257];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[257]
cftabCopy	lib/bzip2/bzlib_private.h	/^      Int32    cftabCopy[257];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[257]
cg_status0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cg_status0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cg_status1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cg_status1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cg_status2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cg_status2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cg_status3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cg_status3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cg_status4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cg_status4;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cga_pll1	arch/arm/dts/ls1021a.dtsi	/^			cga_pll1: pll@800 {$/;"	l	label:clockgen
cgcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cgcontrol;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
cgencrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cgencrl;	\/* Core general control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
cgensrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cgensrl;	\/* Core general status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
cgpr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cgpr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cgpr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cgpr;$/;"	m	struct:clkctl	typeref:typename:u32
cgpr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cgpr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cgpr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cgpr;$/;"	m	struct:ccm_reg	typeref:typename:u32
cgr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cgr0;	\/* Clock Gating Control 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 cgr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
cgr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 cgr0;	\/* Clock Gating Control 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cgr1;	\/* Clock Gating Control 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgr1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 cgr1;$/;"	m	struct:clock_control_regs	typeref:typename:u32
cgr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 cgr1;	\/* Clock Gating Control 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cgr2;	\/* Clock Gating Control 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgr2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 cgr2;$/;"	m	struct:clock_control_regs	typeref:typename:u32
cgr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 cgr2;	\/* Clock Gating Control 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 cgr3;	\/* Clock Gating Control 3 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cgu_enable_1	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cgu_enable_1;	\/* offset 0x8c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
cgu_enable_2	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cgu_enable_2;	\/* offset 0x90 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
cgu_h264_pulse	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cgu_h264_pulse;	\/* offset 0x98 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
cgu_isp_pulse	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cgu_isp_pulse;	\/* offset 0x94 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
cgu_osif_pulse	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cgu_osif_pulse;	\/* offset 0x9c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
cgu_ren_pulse	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cgu_ren_pulse;	\/* offset 0xa0 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
ch	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	struct s3c24x0_spi_channel	ch[S3C24X0_SPI_CHANNELS];$/;"	m	struct:s3c24x0_spi	typeref:struct:s3c24x0_spi_channel[]
ch	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	struct s3c24x0_timer	ch[4];$/;"	m	struct:s3c24x0_timers	typeref:struct:s3c24x0_timer[4]
ch	arch/arm/include/asm/imx-common/regs-apbh.h	/^	} ch[16];$/;"	m	union:mxs_apbh_regs::__anon335713a6040a	typeref:struct:mxs_apbh_regs::__anon335713a6040a::__anon335713a60508[16]
ch	arch/arm/include/asm/imx-common/regs-apbh.h	/^	} ch[8];$/;"	m	union:mxs_apbh_regs::__anon335713a6010a	typeref:struct:mxs_apbh_regs::__anon335713a6010a::__anon335713a60208[8]
ch	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_sdram_channel ch[2];$/;"	m	struct:rk3288_sdram_params	typeref:struct:rk3288_sdram_channel[2]	file:
ch	arch/arm/mach-uniphier/bcu/bcu-ld4.c	/^#define ch(/;"	d	file:
ch	arch/arm/mach-uniphier/bcu/bcu-sld3.c	/^#define ch(/;"	d	file:
ch	drivers/bios_emulator/include/biosemu.h	/^	u8 ch, cl;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
ch	drivers/bios_emulator/include/biosemu.h	/^	u8 ch;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
ch	drivers/mmc/sh_sdhi.c	/^	int ch;$/;"	m	struct:sh_sdhi_host	typeref:typename:int	file:
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_cs_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_data_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_dent_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_idx_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_ino_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_mst_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_orph_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_pad_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_ref_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_sb_node	typeref:struct:ubifs_ch
ch	fs/ubifs/ubifs-media.h	/^	struct ubifs_ch ch;$/;"	m	struct:ubifs_trun_node	typeref:struct:ubifs_ch
ch	include/gdsys_fpga.h	/^	struct ihs_fpga_channel ch[32];		\/* 0x0400 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_fpga_channel[32]
ch0_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_addr;			\/* 0x020 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_addr	arch/arm/include/asm/arch/display.h	/^	u32 ch0_addr;			\/* 0x020 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_control	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_control;				\/* 0x1100 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_horzcoef0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_horzcoef0[32];		\/* 0x400 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch0_horzcoef0	arch/arm/include/asm/arch/display.h	/^	u32 ch0_horzcoef0[32];		\/* 0x400 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch0_horzcoef1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_horzcoef1[32];		\/* 0x480 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch0_horzcoef1	arch/arm/include/asm/arch/display.h	/^	u32 ch0_horzcoef1[32];		\/* 0x480 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch0_horzfact	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_horzfact;		\/* 0x108 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horzfact	arch/arm/include/asm/arch/display.h	/^	u32 ch0_horzfact;		\/* 0x108 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horzphase	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_horzphase;		\/* 0x110 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horzphase	arch/arm/include/asm/arch/display.h	/^	u32 ch0_horzphase;		\/* 0x110 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horztapoffset0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_horztapoffset0;		\/* 0x120 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horztapoffset0	arch/arm/include/asm/arch/display.h	/^	u32 ch0_horztapoffset0;		\/* 0x120 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horztapoffset1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_horztapoffset1;		\/* 0x124 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_horztapoffset1	arch/arm/include/asm/arch/display.h	/^	u32 ch0_horztapoffset1;		\/* 0x124 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_insize	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_insize;			\/* 0x100 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_insize	arch/arm/include/asm/arch/display.h	/^	u32 ch0_insize;			\/* 0x100 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_offset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_offset;			\/* 0x030 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_offset	arch/arm/include/asm/arch/display.h	/^	u32 ch0_offset;			\/* 0x030 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_outsize	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_outsize;		\/* 0x104 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_outsize	arch/arm/include/asm/arch/display.h	/^	u32 ch0_outsize;		\/* 0x104 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_rx_control	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_rx_control;			\/* 0x1108 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_rxdesc_list_address	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_rxdesc_list_address;		\/* 0x111c *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_rxdesc_list_haddress	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_rxdesc_list_haddress;		\/* 0x1118 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_rxdesc_ring_length	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_rxdesc_ring_length;		\/* 0x1130 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_rxdesc_tail_pointer	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_rxdesc_tail_pointer;		\/* 0x1128 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_stride;			\/* 0x040 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_stride	arch/arm/include/asm/arch/display.h	/^	u32 ch0_stride;			\/* 0x040 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_tx_control	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_tx_control;			\/* 0x1104 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_txdesc_list_address	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_txdesc_list_address;		\/* 0x1114 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_txdesc_list_haddress	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_txdesc_list_haddress;		\/* 0x1110 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_txdesc_ring_length	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_txdesc_ring_length;		\/* 0x112c *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_txdesc_tail_pointer	drivers/net/dwc_eth_qos.c	/^	uint32_t ch0_txdesc_tail_pointer;		\/* 0x1120 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
ch0_vertcoef	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_vertcoef[32];		\/* 0x500 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch0_vertcoef	arch/arm/include/asm/arch/display.h	/^	u32 ch0_vertcoef[32];		\/* 0x500 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch0_vertfact	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_vertfact;		\/* 0x10c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_vertfact	arch/arm/include/asm/arch/display.h	/^	u32 ch0_vertfact;		\/* 0x10c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_vertphase0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_vertphase0;		\/* 0x114 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_vertphase0	arch/arm/include/asm/arch/display.h	/^	u32 ch0_vertphase0;		\/* 0x114 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_vertphase1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_vertphase1;		\/* 0x118 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_vertphase1	arch/arm/include/asm/arch/display.h	/^	u32 ch0_vertphase1;		\/* 0x118 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_verttapoffset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch0_verttapoffset;		\/* 0x128 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch0_verttapoffset	arch/arm/include/asm/arch/display.h	/^	u32 ch0_verttapoffset;		\/* 0x128 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_addr;			\/* 0x024 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_addr	arch/arm/include/asm/arch/display.h	/^	u32 ch1_addr;			\/* 0x024 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horzcoef0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_horzcoef0[32];		\/* 0x600 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch1_horzcoef0	arch/arm/include/asm/arch/display.h	/^	u32 ch1_horzcoef0[32];		\/* 0x600 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch1_horzcoef1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_horzcoef1[32];		\/* 0x680 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch1_horzcoef1	arch/arm/include/asm/arch/display.h	/^	u32 ch1_horzcoef1[32];		\/* 0x680 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch1_horzfact	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_horzfact;		\/* 0x208 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horzfact	arch/arm/include/asm/arch/display.h	/^	u32 ch1_horzfact;		\/* 0x208 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horzphase	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_horzphase;		\/* 0x210 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horzphase	arch/arm/include/asm/arch/display.h	/^	u32 ch1_horzphase;		\/* 0x210 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horztapoffset0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_horztapoffset0;		\/* 0x220 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horztapoffset0	arch/arm/include/asm/arch/display.h	/^	u32 ch1_horztapoffset0;		\/* 0x220 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horztapoffset1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_horztapoffset1;		\/* 0x224 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_horztapoffset1	arch/arm/include/asm/arch/display.h	/^	u32 ch1_horztapoffset1;		\/* 0x224 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_insize	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_insize;			\/* 0x200 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_insize	arch/arm/include/asm/arch/display.h	/^	u32 ch1_insize;			\/* 0x200 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_offset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_offset;			\/* 0x034 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_offset	arch/arm/include/asm/arch/display.h	/^	u32 ch1_offset;			\/* 0x034 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_outsize	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_outsize;		\/* 0x204 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_outsize	arch/arm/include/asm/arch/display.h	/^	u32 ch1_outsize;		\/* 0x204 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_stride;			\/* 0x044 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_stride	arch/arm/include/asm/arch/display.h	/^	u32 ch1_stride;			\/* 0x044 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_vertcoef	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_vertcoef[32];		\/* 0x700 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch1_vertcoef	arch/arm/include/asm/arch/display.h	/^	u32 ch1_vertcoef[32];		\/* 0x700 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32[32]
ch1_vertfact	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_vertfact;		\/* 0x20c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_vertfact	arch/arm/include/asm/arch/display.h	/^	u32 ch1_vertfact;		\/* 0x20c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_vertphase0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_vertphase0;		\/* 0x214 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_vertphase0	arch/arm/include/asm/arch/display.h	/^	u32 ch1_vertphase0;		\/* 0x214 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_vertphase1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_vertphase1;		\/* 0x218 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_vertphase1	arch/arm/include/asm/arch/display.h	/^	u32 ch1_vertphase1;		\/* 0x218 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_verttapoffset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch1_verttapoffset;		\/* 0x228 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1_verttapoffset	arch/arm/include/asm/arch/display.h	/^	u32 ch1_verttapoffset;		\/* 0x228 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch1fix_88e1518	board/gdsys/common/phy.c	/^struct mii_setupcmd ch1fix_88e1518[] = {$/;"	v	typeref:struct:mii_setupcmd[]
ch2_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch2_addr;			\/* 0x028 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch2_addr	arch/arm/include/asm/arch/display.h	/^	u32 ch2_addr;			\/* 0x028 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch2_offset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch2_offset;			\/* 0x038 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch2_offset	arch/arm/include/asm/arch/display.h	/^	u32 ch2_offset;			\/* 0x038 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch2_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch2_stride;			\/* 0x048 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch2_stride	arch/arm/include/asm/arch/display.h	/^	u32 ch2_stride;			\/* 0x048 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch3_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch3_addr;			\/* 0x050 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch3_addr	arch/arm/include/asm/arch/display.h	/^	u32 ch3_addr;			\/* 0x050 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch3_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch3_stride;			\/* 0x0d4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch3_stride	arch/arm/include/asm/arch/display.h	/^	u32 ch3_stride;			\/* 0x0d4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch4_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch4_addr;			\/* 0x054 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch4_addr	arch/arm/include/asm/arch/display.h	/^	u32 ch4_addr;			\/* 0x054 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch4_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch4_stride;			\/* 0x0d8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch4_stride	arch/arm/include/asm/arch/display.h	/^	u32 ch4_stride;			\/* 0x0d8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch5_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch5_addr;			\/* 0x058 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch5_addr	arch/arm/include/asm/arch/display.h	/^	u32 ch5_addr;			\/* 0x058 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch5_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ch5_stride;			\/* 0x0dc *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch5_stride	arch/arm/include/asm/arch/display.h	/^	u32 ch5_stride;			\/* 0x0dc *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
ch7301_i2c	board/gdsys/common/ch7301.c	/^int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C;$/;"	v	typeref:typename:int[]
ch7301_probe	board/gdsys/common/ch7301.c	/^int ch7301_probe(unsigned screen, bool power)$/;"	f	typeref:typename:int
ch_buf0_rdy	drivers/video/ipu_regs.h	/^	u32 ch_buf0_rdy[2];$/;"	m	struct:ipu_stat	typeref:typename:u32[2]
ch_buf1_rdy	drivers/video/ipu_regs.h	/^	u32 ch_buf1_rdy[2];$/;"	m	struct:ipu_stat	typeref:typename:u32[2]
ch_buf2_rdy	drivers/video/ipu_regs.h	/^	u32 ch_buf2_rdy[2];$/;"	m	struct:ipu_stat	typeref:typename:u32[2]
ch_busy	drivers/video/ipu_regs.h	/^	u32 ch_busy[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
ch_cfg	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		ch_cfg;		\/* 0x00 *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
ch_db_mode_sel	drivers/video/ipu_regs.h	/^	u32 ch_db_mode_sel[2];$/;"	m	struct:ipu_cm	typeref:typename:u32[2]
ch_en	drivers/video/ipu_regs.h	/^	u32 ch_en[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
ch_flags	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char ch_flags;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
ch_flags	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned char ch_flags;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
ch_flags	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned char ch_flags;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
ch_lnum	drivers/mtd/ubi/ubi.h	/^	int ch_lnum;$/;"	m	struct:ubi_volume	typeref:typename:int
ch_pri	drivers/video/ipu_regs.h	/^	u32 ch_pri[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
ch_settings	tools/omapimage.h	/^struct ch_settings {$/;"	s
ch_toc	tools/omapimage.h	/^struct ch_toc {$/;"	s
ch_trb_mode_sel	drivers/video/ipu_regs.h	/^	u32 ch_trb_mode_sel[2];$/;"	m	struct:ipu_cm	typeref:typename:u32[2]
cha_id_list	drivers/crypto/fsl/error.c	/^static const char * const cha_id_list[] = {$/;"	v	typeref:typename:const char * const[]	file:
challenge	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t challenge;$/;"	m	struct:mrq_ping_request	typeref:typename:uint32_t
challenge	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t challenge;$/;"	m	struct:mrq_threaded_ping_request	typeref:typename:uint32_t
chan	arch/arm/include/asm/arch-omap3/cpu.h	/^	struct dma4_chan chan[32];$/;"	m	struct:dma4	typeref:struct:dma4_chan[32]
chan	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct chan_info chan[2];$/;"	m	struct:dram_info	typeref:struct:chan_info[2]	file:
chan	arch/arm/mach-sunxi/dram_sun6i.c	/^	u8 chan;$/;"	m	struct:dram_sun6i_para	typeref:typename:u8	file:
chan	arch/arm/mach-sunxi/dram_sun9i.c	/^	u8 chan;$/;"	m	struct:dram_sun9i_para	typeref:typename:u8	file:
chan	drivers/mailbox/sandbox-mbox-test.c	/^	struct mbox_chan chan;$/;"	m	struct:sandbox_mbox_test	typeref:struct:mbox_chan	file:
chan	include/xyzModem.h	/^    int   chan;$/;"	m	struct:__anon582e218b0108	typeref:typename:int
chan_enable	drivers/dma/lpc32xx_dma.c	/^	u32 chan_enable;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
chan_info	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^struct chan_info {$/;"	s	file:
chan_param_mem	drivers/video/mx3fb.c	/^union chan_param_mem {$/;"	u	file:
chan_param_mem_interleaved	drivers/video/mx3fb.c	/^struct chan_param_mem_interleaved {$/;"	s	file:
chan_param_mem_planar	drivers/video/mx3fb.c	/^struct chan_param_mem_planar {$/;"	s	file:
chan_read	drivers/net/cpsw.c	/^#define chan_read(/;"	d	file:
chan_read_ptr	drivers/net/cpsw.c	/^#define chan_read_ptr(/;"	d	file:
chan_regs	drivers/block/sata_dwc.c	/^	struct dma_chan_regs	chan_regs[DMA_NUM_CHAN_REGS];$/;"	m	struct:ahb_dma_regs	typeref:struct:dma_chan_regs[]	file:
chan_write	drivers/net/cpsw.c	/^#define chan_write(/;"	d	file:
chance	fs/ubifs/debug.c	/^static inline int chance(unsigned int n, unsigned int out_of)$/;"	f	typeref:typename:int	file:
change	drivers/usb/emul/sandbox_hub.c	/^	int change[SANDBOX_NUM_PORTS];$/;"	m	struct:sandbox_hub_priv	typeref:typename:int[]	file:
changeMenu	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::changeMenu(struct menu *menu)$/;"	f	class:ConfigMainWindow	typeref:typename:void
changeValue	scripts/kconfig/qconf.cc	/^void ConfigList::changeValue(ConfigItem* item)$/;"	f	class:ConfigList	typeref:typename:void
change_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ void change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
change_bit	arch/microblaze/include/asm/bitops.h	/^static inline void change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
change_bit	arch/mips/include/asm/bitops.h	/^change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
change_bit	arch/mips/include/asm/bitops.h	/^static __inline__ void change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
change_bit	arch/nios2/include/asm/bitops/atomic.h	/^static inline void change_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
change_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ void change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
change_bit	arch/sh/include/asm/bitops.h	/^static inline void change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
change_bit	arch/x86/include/asm/bitops.h	/^static __inline__ void change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
change_category	fs/ubifs/lprops.c	/^static void change_category(struct ubifs_info *c, struct ubifs_lprops *lprops)$/;"	f	typeref:typename:void	file:
change_ok	include/search.h	/^	int (*change_ok)(const ENTRY *__item, const char *newval, enum env_op,$/;"	m	struct:hsearch_data	typeref:typename:int (*)(const ENTRY * __item,const char * newval,enum env_op,int flag)
change_phy_interface_mode	drivers/qe/uec_phy.c	/^void change_phy_interface_mode (struct eth_device *dev,$/;"	f	typeref:typename:void
change_refresh_period	arch/x86/cpu/quark/smc.c	/^void change_refresh_period(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
change_sym_value	scripts/kconfig/gconf.c	/^static void change_sym_value(struct menu *menu, gint col)$/;"	f	typeref:typename:void	file:
change_tlb	arch/powerpc/cpu/ppc4xx/tlb.c	/^void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value)$/;"	f	typeref:typename:void
changing_leb	drivers/mtd/ubi/ubi.h	/^	unsigned int changing_leb:1;$/;"	m	struct:ubi_volume	typeref:typename:unsigned int:1
channel	board/nokia/rx51/tag_omap.h	/^	u8 channel;$/;"	m	struct:omap_sti_console_config	typeref:typename:u8
channel	drivers/i2c/muxes/i2c-mux-uclass.c	/^	uint channel;$/;"	m	struct:i2c_mux_bus	typeref:typename:uint	file:
channel	drivers/spi/omap3_spi.c	/^	struct mcspi_channel channel[4];$/;"	m	struct:mcspi	typeref:struct:mcspi_channel[4]	file:
channel	drivers/video/pwm_backlight.c	/^	uint channel;$/;"	m	struct:pwm_backlight_priv	typeref:typename:uint	file:
channel	include/i2c.h	/^	uint8_t		channel;$/;"	m	struct:i2c_next_hop	typeref:typename:uint8_t
channel	include/linux/edd.h	/^			__u8 channel;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0308	typeref:typename:__u8
channel_2_dma	drivers/video/ipu_common.c	/^static inline uint32_t channel_2_dma(ipu_channel_t ch, ipu_buffer_t type)$/;"	f	typeref:typename:uint32_t	file:
channel_abort	drivers/usb/musb-new/musb_dma.h	/^	int			(*channel_abort)(struct dma_channel *);$/;"	m	struct:dma_controller	typeref:typename:int (*)(struct dma_channel *)
channel_alloc	drivers/usb/musb-new/musb_dma.h	/^	struct dma_channel	*(*channel_alloc)(struct dma_controller *,$/;"	m	struct:dma_controller	typeref:struct:dma_channel * (*)(struct dma_controller *,struct musb_hw_ep *,u8 is_tx)
channel_arbitration	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t channel_arbitration;$/;"	m	struct:dma_regs	typeref:typename:uint32_t
channel_conf	arch/arm/include/asm/ehci-omap.h	/^	u32 channel_conf;	\/* 0x40 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
channel_data	include/adc.h	/^	int (*channel_data)(struct udevice *dev, int channel,$/;"	m	struct:adc_ops	typeref:typename:int (*)(struct udevice * dev,int channel,unsigned int * data)
channel_enables	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t channel_enables;	\/* 1 only *\/$/;"	m	struct:mrc_params	typeref:typename:uint32_t
channel_fifo_len	drivers/crypto/fsl/sec.c	/^		u32 channel_fifo_len;$/;"	m	struct:fdt_fixup_crypto_node::sec_rev_prop	typeref:typename:u32	file:
channel_map	drivers/spmi/spmi-msm.c	/^	uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];$/;"	m	struct:msm_spmi_priv	typeref:typename:uint8_t[][]	file:
channel_mask	include/adc.h	/^	unsigned int channel_mask;$/;"	m	struct:adc_uclass_platdata	typeref:typename:unsigned int
channel_mode	include/fsl-mc/fsl_dpio.h	/^	enum dpio_channel_mode	channel_mode;$/;"	m	struct:dpio_cfg	typeref:enum:dpio_channel_mode
channel_mode	include/fsl-mc/fsl_dpio.h	/^	enum dpio_channel_mode channel_mode;$/;"	m	struct:dpio_attr	typeref:enum:dpio_channel_mode
channel_num	arch/x86/include/asm/global_data.h	/^	uint8_t channel_num;$/;"	m	struct:dimm_info	typeref:typename:uint8_t
channel_program	drivers/usb/musb-new/musb_dma.h	/^	int			(*channel_program)(struct dma_channel *channel,$/;"	m	struct:dma_controller	typeref:typename:int (*)(struct dma_channel * channel,u16 maxpacket,u8 mode,dma_addr_t dma_addr,u32 length)
channel_release	drivers/usb/musb-new/musb_dma.h	/^	void			(*channel_release)(struct dma_channel *);$/;"	m	struct:dma_controller	typeref:typename:void (*)(struct dma_channel *)
channel_size	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t channel_size[NUM_CHANNELS];$/;"	m	struct:mrc_params	typeref:typename:uint32_t[]
channel_sts	drivers/serial/serial_zynq.c	/^	u32 channel_sts; \/* 0x2c - Channel Status [11:0] *\/$/;"	m	struct:uart_zynq	typeref:typename:u32	file:
channel_width	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t channel_width;		\/* x16 only *\/$/;"	m	struct:mrc_params	typeref:typename:uint32_t
channels	include/cpsw.h	/^	int	channels;	\/* number of cpdma channels (symmetric)	*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:int
channels	include/i2s.h	/^	unsigned int channels;		\/* audio channels *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
channels_data	include/adc.h	/^	int (*channels_data)(struct udevice *dev, unsigned int channel_mask,$/;"	m	struct:adc_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int channel_mask,struct adc_channel * channels)
chans	drivers/mailbox/sandbox-mbox.c	/^	struct sandbox_mbox_chan chans[SANDBOX_MBOX_CHANNELS];$/;"	m	struct:sandbox_mbox	typeref:struct:sandbox_mbox_chan[]	file:
chanum_ls	include/fsl_sec.h	/^	u32	chanum_ls;	\/* CHA Number Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
chanum_ms	include/fsl_sec.h	/^	u32	chanum_ms;	\/* CHA Number Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
char2ledval	arch/arm/mach-uniphier/micro-support-card.c	/^static u8 char2ledval(char c)$/;"	f	typeref:typename:u8	file:
char_fcr	drivers/serial/serial_uniphier.c	/^	u32 char_fcr;		\/* Charactor \/ FIFO Control Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
char_gen_chars	board/work-microwave/work_92105/work_92105_display.c	/^static u8 char_gen_chars[] = {$/;"	v	typeref:typename:u8[]	file:
charbit	drivers/spi/cf_spi.c	/^	int charbit;$/;"	m	struct:cf_spi_slave	typeref:typename:int	file:
charbit	drivers/spi/fsl_dspi.c	/^	uint charbit;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
chardata_for_range	drivers/video/stb_truetype.h	/^   stbtt_packedchar *chardata_for_range; \/\/ output$/;"	m	struct:__anonce392f790408	typeref:typename:stbtt_packedchar *
charf	include/u-boot/zlib.h	/^#  define charf /;"	d
charf	include/u-boot/zlib.h	/^typedef char  FAR charf;$/;"	t	typeref:typename:char FAR
charge_pump_5v0_reg	arch/arm/dts/tegra30-apalis.dts	/^		charge_pump_5v0_reg: regulator@101 {$/;"	l
chargepump_5v_reg	arch/arm/dts/tegra30-beaver.dts	/^		chargepump_5v_reg: regulator@1 {$/;"	l
charger	arch/arm/dts/tegra124-nyan.dtsi	/^				charger: bq24735@9 {$/;"	l	label:cros_ec
charloop	arch/arc/lib/strcpy-700.S	/^charloop:$/;"	l
charon_last_stage_init	board/tqc/tqm5200/tqm5200.c	/^static int charon_last_stage_init(void)$/;"	f	typeref:typename:int	file:
chars	include/logbuff.h	/^			unsigned long	chars;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30308	typeref:typename:unsigned long
chars	include/logbuff.h	/^			unsigned long	chars;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30408	typeref:typename:unsigned long
chars_buf	drivers/serial/serial_msm.c	/^	uint32_t chars_buf; \/* buffered chars *\/$/;"	m	struct:msm_serial_data	typeref:typename:uint32_t	file:
chars_cnt	drivers/serial/serial_msm.c	/^	unsigned chars_cnt; \/* number of buffered chars *\/$/;"	m	struct:msm_serial_data	typeref:typename:unsigned	file:
chassis_handle	include/smbios.h	/^	u16 chassis_handle;$/;"	m	struct:smbios_type2	typeref:typename:u16
chassis_location	include/smbios.h	/^	u8 chassis_location;$/;"	m	struct:smbios_type2	typeref:typename:u8
chassis_type	include/smbios.h	/^	u8 chassis_type;$/;"	m	struct:smbios_type3	typeref:typename:u8
chavid_ls	include/fsl_sec.h	/^	u32	chavid_ls;	\/* CHA Version ID Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
chavid_ms	include/fsl_sec.h	/^	u32	chavid_ms;	\/* CHA Version ID Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
chba	drivers/block/fsl_sata.h	/^	u32 chba;		\/* Command header base address *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
chconf	drivers/spi/omap3_spi.c	/^	unsigned int chconf;		\/* 0x2C, 0x40, 0x54, 0x68 *\/$/;"	m	struct:mcspi_channel	typeref:typename:unsigned int	file:
chctrl	drivers/spi/omap3_spi.c	/^	unsigned int chctrl;		\/* 0x34, 0x48, 0x5C, 0x70 *\/$/;"	m	struct:mcspi_channel	typeref:typename:unsigned int	file:
chda	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 chda;		\/* 0x90 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
chda	arch/arm/include/asm/arch/mmc.h	/^	u32 chda;		\/* 0x90 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
check	drivers/bios_emulator/include/x86emu/regs.h	/^	int check;$/;"	m	struct:__anon39451e6d0808	typeref:typename:int
check	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		} check;$/;"	m	struct:qbman_swp::__anonadc6216b0108	typeref:enum:qbman_swp::__anonadc6216b0108::swp_mc_check
check	lib/list_sort.c	/^static int __init check(struct debug_el *ela, struct debug_el *elb)$/;"	f	typeref:typename:int __init	file:
check	lib/zlib/inflate.h	/^    unsigned long check;        \/* protected copy of check value *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned long
check	scripts/kconfig/lxdialog/check-lxdialog.sh	/^check() {$/;"	f
check	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color check;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
check	tools/buildman/kconfiglib.py	/^    def check(self, token):$/;"	m	class:_Feed
check-lxdialog	scripts/kconfig/Makefile	/^check-lxdialog  := $(srctree)\/$(src)\/lxdialog\/check-lxdialog.sh$/;"	m
checkBlockOk	fs/yaffs2/yaffs_nandif.h	/^	int (*checkBlockOk)(struct yaffs_dev *dev, unsigned blockId);$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev,unsigned blockId)
checkDDRStatClkEn2	arch/arm/mach-davinci/lowlevel_init.S	/^checkDDRStatClkEn2:$/;"	l
checkDDRStatClkStop	arch/arm/mach-davinci/lowlevel_init.S	/^checkDDRStatClkStop:$/;"	l
checkDDRStatClkStop2	arch/arm/mach-davinci/lowlevel_init.S	/^checkDDRStatClkStop2:$/;"	l
checkDicSize	lib/lzma/LzmaDec.h	/^  UInt32 checkDicSize;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:UInt32
checkGemStatClkStop	arch/arm/mach-davinci/lowlevel_init.S	/^checkGemStatClkStop:$/;"	l
checkStatClkEn2	arch/arm/mach-davinci/lowlevel_init.S	/^checkStatClkEn2:$/;"	l
checkStatClkStop	arch/arm/mach-davinci/lowlevel_init.S	/^checkStatClkStop:$/;"	l
checkStatClkStop2	arch/arm/mach-davinci/lowlevel_init.S	/^checkStatClkStop2:$/;"	l
checkStatClkStopGem	arch/arm/mach-davinci/lowlevel_init.S	/^checkStatClkStopGem:$/;"	l
check_CPU	arch/powerpc/cpu/mpc8xx/cpu.c	/^static int check_CPU (long clock, uint pvr, uint immr)$/;"	f	typeref:typename:int	file:
check_absolute_file	scripts/checkpatch.pl	/^sub check_absolute_file {$/;"	s
check_ackbr	drivers/i2c/sh_sh7734_i2c.c	/^static int check_ackbr(struct sh_i2c *base)$/;"	f	typeref:typename:int	file:
check_address_valid	drivers/spmi/spmi-sandbox.c	/^static bool check_address_valid(int usid, int pid, int off)$/;"	f	typeref:typename:bool	file:
check_and_invalidate_dcache_range	drivers/mmc/fsl_esdhc.c	/^static void check_and_invalidate_dcache_range$/;"	f	typeref:typename:void	file:
check_attached	include/video_bridge.h	/^	int (*check_attached)(struct udevice *dev);$/;"	m	struct:video_bridge_ops	typeref:typename:int (*)(struct udevice * dev)
check_attaching_info	drivers/mtd/ubi/vtbl.c	/^static int check_attaching_info(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
check_av	drivers/mtd/ubi/vtbl.c	/^static int check_av(const struct ubi_volume *vol,$/;"	f	typeref:typename:int	file:
check_bbsy	drivers/i2c/sh_sh7734_i2c.c	/^static int check_bbsy(struct sh_i2c *base)$/;"	f	typeref:typename:int	file:
check_binary_download	tools/gdb/remote.c	/^check_binary_download (CORE_ADDR addr)$/;"	f	typeref:typename:void	file:
check_blknr_for_revoke	fs/ext4/ext4_journal.c	/^int check_blknr_for_revoke(long int blknr, int sequence_no)$/;"	f	typeref:typename:int
check_block_size	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^check_block_size:$/;"	l
check_bls_ex	arch/x86/cpu/quark/mrc_util.c	/^uint32_t check_bls_ex(struct mrc_params *mrc_params, uint32_t address)$/;"	f	typeref:typename:uint32_t
check_boco2	board/keymile/km_arm/fpga_config.c	/^static int check_boco2(void)$/;"	f	typeref:typename:int	file:
check_boot_mode	board/samsung/common/misc.c	/^void check_boot_mode(void)$/;"	f	typeref:typename:void
check_bulk_or_isoc	drivers/usb/host/r8a66597.h	/^#define check_bulk_or_isoc(/;"	d
check_button_status	board/bosch/shc/board.c	/^static void check_button_status(void)$/;"	f	typeref:typename:void	file:
check_bytes8	lib/string.c	/^static void *check_bytes8(const u8 *start, u8 value, unsigned int bytes)$/;"	f	typeref:typename:void *	file:
check_cache_range	arch/arm/lib/cache.c	/^int check_cache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:int
check_card_is_absent	drivers/pcmcia/tqm8xx_pcmcia.c	/^static inline int check_card_is_absent(int slot)$/;"	f	typeref:typename:int	file:
check_channel	drivers/adc/adc-uclass.c	/^static int check_channel(struct udevice *dev, int value, bool number_or_mask,$/;"	f	typeref:typename:int	file:
check_chunk	common/dlmalloc.c	/^#define check_chunk(/;"	d	file:
check_clean	test/fs/fs-test.sh	/^function check_clean() {$/;"	f
check_clean_directory	tools/moveconfig.py	/^def check_clean_directory():$/;"	f
check_command	drivers/usb/gadget/f_mass_storage.c	/^static int check_command(struct fsg_common *common, int cmnd_size,$/;"	f	typeref:typename:int	file:
check_conf	scripts/kconfig/conf.c	/^static void check_conf(struct menu *menu)$/;"	f	typeref:typename:void	file:
check_corruption	drivers/mtd/ubi/attach.c	/^static int check_corruption(struct ubi_device *ubi, struct ubi_vid_hdr *vid_hdr,$/;"	f	typeref:typename:int	file:
check_cpu_devices	arch/x86/cpu/mp_init.c	/^static int check_cpu_devices(int expected_cpus)$/;"	f	typeref:typename:int	file:
check_cpu_version	arch/powerpc/cpu/mpc5xx/cpu.c	/^static int check_cpu_version (long clock, uint pvr, uint immr)$/;"	f	typeref:typename:int	file:
check_create	drivers/mtd/nand/nand_bbt.c	/^static int check_create(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)$/;"	f	typeref:typename:int	file:
check_data	drivers/fpga/zynqmppl.c	/^static void *check_data(u8 *buf, size_t bsize, u32 *swap)$/;"	f	typeref:typename:void *	file:
check_data	drivers/fpga/zynqpl.c	/^static void *check_data(u8 *buf, size_t bsize, u32 *swap)$/;"	f	typeref:typename:void *	file:
check_defconfig	tools/moveconfig.py	/^    def check_defconfig(self):$/;"	m	class:KconfigParser
check_device	board/v38b/ethaddr.c	/^static int check_device()$/;"	f	typeref:typename:int	file:
check_device_busy	drivers/i2c/i2c-uniphier-f.c	/^static int check_device_busy(struct uniphier_fi2c_regs __iomem *regs)$/;"	f	typeref:typename:int	file:
check_device_config	tools/env/fw_env.c	/^static int check_device_config(int dev)$/;"	f	typeref:typename:int	file:
check_done_bit	board/renesas/ap325rxa/cpld-ap325rxa.c	/^static void check_done_bit(void)$/;"	f	typeref:typename:void	file:
check_dup_entry	arch/x86/cpu/irq.c	/^static struct irq_info *check_dup_entry(struct irq_info *slot_base,$/;"	f	typeref:struct:irq_info *	file:
check_dup_entry	arch/x86/lib/mpspec.c	/^static bool check_dup_entry(struct mpc_config_intsrc *intsrc_base,$/;"	f	typeref:typename:bool	file:
check_ecc_error	drivers/mtd/nand/tegra_nand.c	/^static int check_ecc_error(struct nand_ctlr *reg, u8 *databuf,$/;"	f	typeref:typename:int	file:
check_enetaddr	board/buffalo/lsxl/lsxl.c	/^void check_enetaddr(void)$/;"	f	typeref:typename:void
check_env	board/mpl/common/common_util.c	/^void check_env(void)$/;"	f	typeref:typename:void
check_env_old_size	board/mpl/common/common_util.c	/^int check_env_old_size(ulong oldsize)$/;"	f	typeref:typename:int
check_erratum_a007212	arch/powerpc/cpu/mpc85xx/cmd_errata.c	/^static void check_erratum_a007212(void)$/;"	f	typeref:typename:void	file:
check_erratum_a4580	arch/powerpc/cpu/mpc85xx/cmd_errata.c	/^static void check_erratum_a4580(uint32_t svr)$/;"	f	typeref:typename:void	file:
check_erratum_a4849	arch/powerpc/cpu/mpc85xx/cmd_errata.c	/^static void check_erratum_a4849(uint32_t svr)$/;"	f	typeref:typename:void	file:
check_error	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static int check_error(void)$/;"	f	typeref:typename:int	file:
check_for_keys	drivers/input/cros_ec_keyb.c	/^static int check_for_keys(struct udevice *dev, struct key_matrix_key *keys,$/;"	f	typeref:typename:int	file:
check_for_keys	drivers/input/tegra-kbc.c	/^static void check_for_keys(struct tegra_kbd_priv *priv)$/;"	f	typeref:typename:void	file:
check_for_lock	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^inline u32 check_for_lock(u32 const base)$/;"	f	typeref:typename:u32
check_free_chunk	common/dlmalloc.c	/^#define check_free_chunk(/;"	d	file:
check_free_space	fs/ubifs/super.c	/^static int check_free_space(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
check_frequency	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void check_frequency(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
check_frequency	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void check_frequency(unsigned long *dimm_ranks,$/;"	f	typeref:typename:void	file:
check_fsl_memctl_config_regs	drivers/ddr/fsl/ctrl_regs.c	/^check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:unsigned int
check_functions	tools/proftool.c	/^static void check_functions(void)$/;"	f	typeref:typename:void	file:
check_get_hexval	tools/pblimage.c	/^static void check_get_hexval(char *token)$/;"	f	typeref:typename:void	file:
check_gpio	arch/blackfin/cpu/gpio.c	/^inline int check_gpio(unsigned gpio)$/;"	f	typeref:typename:int
check_gpio	drivers/gpio/adi_gpio2.c	/^inline int check_gpio(unsigned gpio)$/;"	f	typeref:typename:int
check_gpio	drivers/gpio/omap_gpio.c	/^static int check_gpio(int gpio)$/;"	f	typeref:typename:int	file:
check_gpio	drivers/gpio/zynq_gpio.c	/^static int check_gpio(unsigned gpio, struct udevice *dev)$/;"	f	typeref:typename:int	file:
check_header	drivers/fpga/zynqmppl.c	/^static u32 check_header(const void *buf)$/;"	f	typeref:typename:u32	file:
check_header	drivers/fpga/zynqpl.c	/^static u32 check_header(const void *buf)$/;"	f	typeref:typename:u32	file:
check_hibernation	arch/blackfin/cpu/initcode.c	/^check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool put_into_srfs)$/;"	f	typeref:typename:void	file:
check_hmac	board/gdsys/p1022/controlcenterd-id.c	/^static int check_hmac(struct key_program *hmac,$/;"	f	typeref:typename:int	file:
check_hw_revision	board/samsung/trats/trats.c	/^static void check_hw_revision(void)$/;"	f	typeref:typename:void	file:
check_hw_revision	board/samsung/trats2/trats2.c	/^static void check_hw_revision(void)$/;"	f	typeref:typename:void	file:
check_hw_revision	board/samsung/universal_c210/universal.c	/^static void check_hw_revision(void)$/;"	f	typeref:typename:void	file:
check_icsr_bits	drivers/i2c/sh_sh7734_i2c.c	/^static int check_icsr_bits(struct sh_i2c *base, u8 bits)$/;"	f	typeref:typename:int	file:
check_ide_device	cmd/pcmcia.c	/^int check_ide_device (int slot)$/;"	f	typeref:typename:int
check_ide_device	drivers/pcmcia/ti_pci1410a.c	/^static int check_ide_device(int slot, int ide_base_bus)$/;"	f	typeref:typename:int	file:
check_ie	board/freescale/common/fsl_validate.c	/^static u32 check_ie(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:u32	file:
check_image_type	tools/imagetool.h	/^	int (*check_image_type) (uint8_t);$/;"	m	struct:image_type_params	typeref:typename:int (*)(uint8_t)
check_info	fs/ubifs/orphan.c	/^struct check_info {$/;"	s	file:
check_inodes	fs/ubifs/debug.c	/^static int check_inodes(struct ubifs_info *c, struct fsck_data *fsckd)$/;"	f	typeref:typename:int	file:
check_interleaving_options	drivers/ddr/fsl/options.c	/^void check_interleaving_options(fsl_ddr_info_t *pinfo)$/;"	f	typeref:typename:void
check_interrupt	drivers/usb/host/r8a66597.h	/^#define check_interrupt(/;"	d
check_inuse_chunk	common/dlmalloc.c	/^#define check_inuse_chunk(/;"	d	file:
check_ivc_params	arch/arm/mach-tegra/ivc.c	/^static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,$/;"	f	typeref:typename:int	file:
check_keys	board/samsung/common/misc.c	/^static int check_keys(void)$/;"	f	typeref:typename:int	file:
check_leaf	fs/ubifs/debug.c	/^static int check_leaf(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int	file:
check_leds	drivers/input/keyboard.c	/^static int check_leds(int ret)$/;"	f	typeref:typename:int	file:
check_limit	arch/blackfin/lib/cmd_cache_dump.c	/^static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, siz/;"	f	typeref:typename:int	file:
check_lpt_crc	fs/ubifs/lpt.c	/^static int check_lpt_crc(const struct ubifs_info *c, void *buf, int len)$/;"	f	typeref:typename:int	file:
check_lpt_free	fs/ubifs/ubifs.h	/^	int check_lpt_free;$/;"	m	struct:ubifs_info	typeref:typename:int
check_lpt_type	fs/ubifs/lpt.c	/^static int check_lpt_type(const struct ubifs_info *c, uint8_t **addr,$/;"	f	typeref:typename:int	file:
check_malloced_chunk	common/dlmalloc.c	/^#define check_malloced_chunk(/;"	d	file:
check_match	lib/zlib/deflate.c	/^#  define check_match(/;"	d	file:
check_match	lib/zlib/deflate.c	/^local void check_match(s, start, match, length)$/;"	f
check_md5	test/fs/fs-test.sh	/^check_md5() {$/;"	f
check_mem_region	include/linux/ioport.h	/^#define check_mem_region(/;"	d
check_mem_type	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void check_mem_type(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
check_mem_type	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void check_mem_type(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
check_member	include/common.h	/^#define check_member(/;"	d
check_mmc_autodetect	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static int check_mmc_autodetect(void)$/;"	f	typeref:typename:int	file:
check_offs_len	drivers/mtd/nand/nand_base.c	/^static int check_offs_len(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
check_orphan	fs/ubifs/orphan.c	/^struct check_orphan {$/;"	s	file:
check_overflow	fs/fat/fat_write.c	/^static int check_overflow(fsdata *mydata, __u32 clustnum, loff_t size)$/;"	f	typeref:typename:int	file:
check_params	tools/imagetool.h	/^	int (*check_params) (struct image_tool_params *);$/;"	m	struct:image_type_params	typeref:typename:int (*)(struct image_tool_params *)
check_pattern	drivers/mtd/nand/nand_bbt.c	/^static int check_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)$/;"	f	typeref:typename:int	file:
check_pattern	drivers/mtd/nand/nand_util.c	/^static int check_pattern(const u_char *buf, u_char patt, int size)$/;"	f	typeref:typename:int	file:
check_pattern_no_oob	drivers/mtd/nand/nand_bbt.c	/^static int check_pattern_no_oob(uint8_t *buf, struct nand_bbt_descr *td)$/;"	f	typeref:typename:int	file:
check_pll_locks	board/freescale/b4860qds/b4860qds.c	/^static int check_pll_locks(serdes_corenet_t *srds_regs, int pll_num)$/;"	f	typeref:typename:int	file:
check_pll_status	board/freescale/common/idt8t49n222a_serdes_clk.c	/^static int check_pll_status(u8 idt_addr)$/;"	f	typeref:typename:int	file:
check_pool_label	fs/zfs/zfs.c	/^check_pool_label(struct zfs_data *data)$/;"	f	typeref:typename:int	file:
check_power_mode	drivers/block/sata_sil3114.c	/^static u8 check_power_mode (int num)$/;"	f	typeref:typename:u8	file:
check_power_switch	board/buffalo/lsxl/lsxl.c	/^static void check_power_switch(void)$/;"	f	typeref:typename:void	file:
check_prereq	test/fs/fs-test.sh	/^function check_prereq() {$/;"	f
check_push_button	board/buffalo/lsxl/lsxl.c	/^static void check_push_button(void)$/;"	f	typeref:typename:void	file:
check_rank_number	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void check_rank_number(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
check_rdrf	drivers/i2c/sh_sh7734_i2c.c	/^static int check_rdrf(struct sh_i2c *base)$/;"	f	typeref:typename:int	file:
check_read_ecc	drivers/mtd/nand/fsl_ifc_nand.c	/^static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,$/;"	f	typeref:typename:int	file:
check_read_ecc	drivers/mtd/nand/fsl_ifc_spl.c	/^static inline int check_read_ecc(uchar *buf, u32 *eccstat,$/;"	f	typeref:typename:int	file:
check_reg	drivers/power/power_core.c	/^int check_reg(struct pmic *p, u32 reg)$/;"	f	typeref:typename:int
check_region	include/linux/ioport.h	/^static inline int __deprecated check_region(resource_size_t s,$/;"	f	typeref:typename:int __deprecated
check_reply_packet	net/bootp.c	/^static int check_reply_packet(uchar *pkt, unsigned dest, unsigned src,$/;"	f	typeref:typename:int	file:
check_reserved	drivers/gpio/gpio-uclass.c	/^static int check_reserved(const struct gpio_desc *desc, const char *func)$/;"	f	typeref:typename:int	file:
check_results	test/fs/fs-test.sh	/^function check_results() {$/;"	f
check_results	test/trace/test-trace.sh	/^check_results() {$/;"	f
check_return_section	scripts/kernel-doc	/^sub check_return_section {$/;"	s
check_rw_coarse	arch/x86/cpu/quark/mrc_util.c	/^uint32_t check_rw_coarse(struct mrc_params *mrc_params, uint32_t address)$/;"	f	typeref:typename:uint32_t
check_rx_done	drivers/net/bcm-sf2-eth.h	/^	int (*check_rx_done)(struct eth_dma *dma, uint8_t *buf);$/;"	m	struct:eth_dma	typeref:typename:int (*)(struct eth_dma * dma,uint8_t * buf)
check_sata_dev_state	drivers/block/sata_dwc.c	/^static int check_sata_dev_state(void)$/;"	f	typeref:typename:int	file:
check_sections	scripts/kernel-doc	/^sub check_sections($$$$$$) {$/;"	s
check_selected	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color check_selected;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
check_serdes_pll_locks	board/freescale/b4860qds/b4860qds.c	/^static int check_serdes_pll_locks(void)$/;"	f	typeref:typename:int	file:
check_short_pattern	drivers/mtd/nand/nand_bbt.c	/^static int check_short_pattern(uint8_t *buf, struct nand_bbt_descr *td)$/;"	f	typeref:typename:int	file:
check_short_pattern	drivers/mtd/onenand/onenand_bbt.c	/^static int check_short_pattern(uint8_t * buf, int len, int paglen,$/;"	f	typeref:typename:int	file:
check_signature	arch/arm/include/asm/io.h	/^#define check_signature(/;"	d
check_signature	arch/arm/include/asm/io.h	/^check_signature(unsigned long io_addr, const unsigned char *signature,$/;"	f	typeref:typename:int
check_signature	arch/nds32/include/asm/io.h	/^check_signature(unsigned long io_addr, const unsigned char *signature,$/;"	f	typeref:typename:int
check_signature	arch/sh/include/asm/io.h	/^#define check_signature(/;"	d
check_signature	arch/sh/include/asm/io.h	/^check_signature(unsigned long io_addr, const unsigned char *signature,$/;"	f	typeref:typename:int
check_signature	arch/x86/include/asm/io.h	/^static inline int check_signature(unsigned long io_addr,$/;"	f	typeref:typename:int
check_skip_len	drivers/mtd/nand/nand_util.c	/^static int check_skip_len(struct mtd_info *mtd, loff_t offset, size_t length,$/;"	f	typeref:typename:int	file:
check_soc_version	board/freescale/mx35pdk/lowlevel_init.S	/^.macro check_soc_version ret, tmp$/;"	m
check_srk	board/freescale/common/fsl_validate.c	/^static u32 check_srk(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:u32	file:
check_stall	drivers/usb/musb/musb_hcd.c	/^static u8 check_stall(u8 ep, u8 dir_out)$/;"	f	typeref:typename:u8	file:
check_status	drivers/usb/host/ohci-hcd.c	/^static void check_status(td_t *td_list)$/;"	f	typeref:typename:void	file:
check_stdin	scripts/kconfig/conf.c	/^static void check_stdin(void)$/;"	f	typeref:typename:void	file:
check_stop	drivers/i2c/sh_sh7734_i2c.c	/^static int check_stop(struct sh_i2c *base)$/;"	f	typeref:typename:int	file:
check_sum	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t check_sum;	\/* generated by PC *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
check_sum	arch/arm/include/asm/arch/spl.h	/^	uint32_t check_sum;	\/* generated by PC *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
check_tdre	drivers/i2c/sh_sh7734_i2c.c	/^static int check_tdre(struct sh_i2c *base)$/;"	f	typeref:typename:int	file:
check_tend	drivers/i2c/sh_sh7734_i2c.c	/^static int check_tend(struct sh_i2c *base, int stop)$/;"	f	typeref:typename:int	file:
check_top	scripts/kconfig/symbol.c	/^} *check_top;$/;"	v	typeref:struct:dep_stack *
check_top_directory	tools/genboardscfg.py	/^def check_top_directory():$/;"	f
check_top_directory	tools/moveconfig.py	/^def check_top_directory():$/;"	f
check_trace_config	tools/proftool.c	/^static void check_trace_config(void)$/;"	f	typeref:typename:void	file:
check_trace_config_line	tools/proftool.c	/^static void check_trace_config_line(struct trace_configline_info *item)$/;"	f	typeref:typename:void	file:
check_tx_done	drivers/net/bcm-sf2-eth.h	/^	bool (*check_tx_done)(struct eth_dma *dma);$/;"	m	struct:eth_dma	typeref:typename:bool (*)(struct eth_dma * dma)
check_type_include	tools/fdtgrep.c	/^static int check_type_include(void *priv, int type, const char *data, int size)$/;"	f	typeref:typename:int	file:
check_usb_device_connecting	drivers/usb/host/r8a66597-hcd.c	/^static int check_usb_device_connecting(struct r8a66597 *r8a66597)$/;"	f	typeref:typename:int	file:
check_val	arch/arm/cpu/armv8/zynqmp/slcr.c	/^	u32 check_val;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:u32	file:
check_val	arch/arm/mach-zynq/slcr.c	/^	u32 check_val;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:u32	file:
check_value	drivers/mtd/nand/sunxi_nand_spl.c	/^static inline int check_value(int offset, int expected_bits,$/;"	f	typeref:typename:int	file:
check_value_inner	drivers/mtd/nand/sunxi_nand_spl.c	/^static int check_value_inner(int offset, int expected_bits,$/;"	f	typeref:typename:int	file:
check_value_negated	drivers/mtd/nand/sunxi_nand_spl.c	/^static inline int check_value_negated(int offset, int unexpected_bits,$/;"	f	typeref:typename:int	file:
check_version	include/cros_ec.h	/^	int (*check_version)(struct udevice *dev);$/;"	m	struct:dm_cros_ec_ops	typeref:typename:int (*)(struct udevice * dev)
check_vidconsole_output	test/dm/video.c	/^static int check_vidconsole_output(struct unit_test_state *uts, int rot,$/;"	f	typeref:typename:int	file:
check_void_in_dentry	fs/ext4/ext4_common.c	/^static int check_void_in_dentry(struct ext2_dirent *dir, char *filename)$/;"	f	typeref:typename:int	file:
check_volt_table	drivers/power/regulator/act8846.c	/^static int check_volt_table(const u16 *volt_table, int uvolt)$/;"	f	typeref:typename:int	file:
check_volt_type	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void check_volt_type(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
check_voltage	cmd/otp.c	/^static int check_voltage(void)$/;"	f	typeref:typename:int	file:
check_voltage_type	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void check_voltage_type(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
check_voltage_type	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void check_voltage_type(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
check_volume_empty	fs/ubifs/super.c	/^static int check_volume_empty(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
check_write_ready	board/renesas/ap325rxa/cpld-ap325rxa.c	/^static int check_write_ready(void)$/;"	f	typeref:typename:int	file:
check_x	scripts/kconfig/lxdialog/checklist.c	/^static int list_width, check_x, item_x;$/;"	v	typeref:typename:int	file:
checkarmreloc	Makefile	/^checkarmreloc: u-boot$/;"	t
checkboard	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	arch/arm/cpu/armv7/omap3/board.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	arch/arm/mach-rmobile/board.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	arch/arm/mach-tegra/board2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	arch/arm/mach-uniphier/micro-support-card.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	arch/nios2/cpu/cpu.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/Arcturus/ucp1020/ucp1020.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/BuS/eb_cpu5282/eb_cpu5282.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/Marvell/db-88f6720/db-88f6720.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/Synology/ds414/ds414.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/a3m071/a3m071.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/a4m072/a4m072.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/advantech/dms-ba16/dms-ba16.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/acadia/acadia.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/bamboo/bamboo.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/bubinga/bubinga.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/canyonlands/canyonlands.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/katmai/katmai.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/amcc/kilauea/kilauea.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/amcc/luan/luan.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/makalu/makalu.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/amcc/redwood/redwood.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/sequoia/sequoia.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/walnut/walnut.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/yosemite/yosemite.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/amcc/yucca/yucca.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/aristainetos/aristainetos.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/armadeus/apf27/apf27.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/astro/mcf5373l/mcf5373l.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bachmann/ot1200/ot1200.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/barco/platinum/platinum.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/barco/titanium/titanium.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bct-brettl2/bct-brettl2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf506f-ezkit/bf506f-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf518f-ezbrd/bf518f-ezbrd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf525-ucr2/bf525-ucr2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf526-ezbrd/bf526-ezbrd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf527-ad7160-eval/bf527-ad7160-eval.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf527-ezkit/bf527-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf527-sdp/bf527-sdp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf533-ezkit/bf533-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf533-stamp/bf533-stamp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf537-minotaur/bf537-minotaur.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf537-pnav/bf537-pnav.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf537-srv1/bf537-srv1.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf537-stamp/bf537-stamp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf538f-ezkit/bf538f-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf548-ezkit/bf548-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf561-acvilon/bf561-acvilon.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf561-ezkit/bf561-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/bf609-ezkit/bf609-ezkit.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/blackstamp/blackstamp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/blackvme/blackvme.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/boundary/nitrogen6x/nitrogen6x.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/br4/br4.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cadence/xtfpga/xtfpga.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/canmb/canmb.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/ccv/xpress/xpress.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm-bf527/cm-bf527.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm-bf533/cm-bf533.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm-bf537e/cm-bf537e.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm-bf537u/cm-bf537u.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm-bf548/cm-bf548.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm-bf561/cm-bf561.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cm5200/cm5200.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/cobra5272/cobra5272.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/compulab/cm_fx6/cm_fx6.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/davedenx/aria/aria.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/dbau1x00/dbau1x00.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/denx/m53evk/m53evk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/dnp5370/dnp5370.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/el/el6x/el6x.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/embest/mx6boards/mx6boards.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/cpci2dp/cpci2dp.c	/^int checkboard (void)$/;"	f	typeref:typename:int
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checkboard	board/esd/mecp5123/mecp5123.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/meesc/meesc.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/plu405/plu405.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/pmc405de/pmc405de.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/pmc440/pmc440.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/vme8349/vme8349.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/esd/vom405/vom405.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/espt/espt.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/b4860qds/b4860qds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/bsc9131rdb/bsc9131rdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/bsc9132qds/bsc9132qds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/c29xpcie/c29xpcie.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/corenet_ds/corenet_ds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1012afrdm/ls1012afrdm.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1012aqds/ls1012aqds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1012ardb/ls1012ardb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1021aqds/ls1021aqds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1021atwr/ls1021atwr.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1043aqds/ls1043aqds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1043ardb/ls1043ardb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1046aqds/ls1046aqds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls1046ardb/ls1046ardb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls2080aqds/ls2080aqds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/ls2080ardb/ls2080ardb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5208evbe/m5208evbe.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m52277evb/m52277evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5235evb/m5235evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5249evb/m5249evb.c	/^int checkboard (void) {$/;"	f	typeref:typename:int
checkboard	board/freescale/m5253demo/m5253demo.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5253evbe/m5253evbe.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5272c3/m5272c3.c	/^int checkboard (void) {$/;"	f	typeref:typename:int
checkboard	board/freescale/m5275evb/m5275evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5282evb/m5282evb.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m53017evb/m53017evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5329evb/m5329evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m5373evb/m5373evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m54418twr/m54418twr.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m54451evb/m54451evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m54455evb/m54455evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m547xevb/m547xevb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/m548xevb/m548xevb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc5121ads/mpc5121ads.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8308rdb/mpc8308rdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8313erdb/mpc8313erdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8315erdb/mpc8315erdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8323erdb/mpc8323erdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc832xemds/mpc832xemds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8349emds/mpc8349emds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8349itx/mpc8349itx.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc837xemds/mpc837xemds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc837xerdb/mpc837xerdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8536ds/mpc8536ds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8540ads/mpc8540ads.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8541cds/mpc8541cds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8544ds/mpc8544ds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8548cds/mpc8548cds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8555cds/mpc8555cds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8560ads/mpc8560ads.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8568mds/mpc8568mds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8569mds/mpc8569mds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8572ds/mpc8572ds.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx25pdk/mx25pdk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx31ads/mx31ads.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx31pdk/mx31pdk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx51evk/mx51evk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx53ard/mx53ard.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx53evk/mx53evk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx53loco/mx53loco.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx53smd/mx53smd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6qarm2/mx6qarm2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6sabresd/mx6sabresd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6slevk/mx6slevk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx6ullevk/mx6ullevk.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/p1010rdb/p1010rdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/p1022ds/p1022ds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/p1023rdb/p1023rdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/p1_twr/p1_twr.c	/^int checkboard(void)$/;"	f	typeref:typename:int
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checkboard	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/s32v234evb/s32v234evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
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checkboard	board/freescale/t102xrdb/t102xrdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
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checkboard	board/freescale/t104xrdb/t104xrdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
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checkboard	board/freescale/t208xrdb/t208xrdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
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checkboard	board/freescale/t4qds/t4240qds.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/t4rdb/t4240rdb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/freescale/vf610twr/vf610twr.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gaisler/gr_ep2s60/gr_ep2s60.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gaisler/grsim/grsim.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gaisler/grsim_leon2/grsim_leon2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gateworks/gw_ventana/gw_ventana.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/405ep/dlvision-10g.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/405ep/io.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/405ep/iocon.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/405ep/neo.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/405ex/io64.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/dlvision/dlvision.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/gdppc440etx/gdppc440etx.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/intip/intip.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/mpc8308/hrcon.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/gdsys/mpc8308/strider.c	/^int checkboard(void)$/;"	f	typeref:typename:int
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checkboard	board/ibf-dsp561/ibf-dsp561.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ids/ids8313/ids8313.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ifm/ac14xx/ac14xx.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ifm/o2dnt2/o2dnt2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/imgtec/boston/checkboard.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/imgtec/malta/malta.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/imx31_phycore/imx31_phycore.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/inka4x0/inka4x0.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/intercontrol/digsy_mtc/digsy_mtc.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/inversepath/usbarmory/usbarmory.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ip04/ip04.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ipek01/ipek01.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/jupiter/jupiter.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/keymile/km82xx/km82xx.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/keymile/km83xx/km83xx.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/keymile/kmp204x/kmp204x.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/kosagi/novena/novena.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/liebherr/lwmon5/lwmon5.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/maxbcm/maxbcm.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/microchip/pic32mzda/pic32mzda.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/micronas/vct/vct.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/mosaixtech/icon/icon.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/motionpro/motionpro.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/mpc8308_p1m/mpc8308_p1m.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/mpl/mip405/mip405.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/mpl/pati/pati.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/mpl/pip405/pip405.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/mpl/vcma9/vcma9.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/mpr2/mpr2.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ms7720se/ms7720se.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ms7722se/ms7722se.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ms7750se/ms7750se.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/munices/munices.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/openrisc/openrisc-generic/openrisc-generic.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/pb1x00/pb1x00.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/pdm360ng/pdm360ng.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/phytec/pcm030/pcm030.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/phytec/pcm052/pcm052.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/pr1/pr1.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/qemu-mips/qemu-mips.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/MigoR/migo_r.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/ap325rxa/ap325rxa.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/ecovec/ecovec.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/r0p7734/r0p7734.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/r2dplus/r2dplus.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/r7780mp/r7780mp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/rsk7203/rsk7203.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/rsk7264/rsk7264.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/rsk7269/rsk7269.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/sh7752evb/sh7752evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/sh7753evb/sh7753evb.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/sh7757lcr/sh7757lcr.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/sh7763rdp/sh7763rdp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/renesas/sh7785lcr/sh7785lcr.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ronetix/pm9261/pm9261.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/ronetix/pm9263/pm9263.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/samsung/arndale/arndale.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/samsung/common/board.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/samsung/goni/goni.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/samsung/smdkc100/smdkc100.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/samsung/smdkv310/smdkv310.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/sbc8349/sbc8349.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/sbc8548/sbc8548.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/sbc8641d/sbc8641d.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/seco/mx6quq7/mx6quq7.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/shmin/shmin.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/socrates/socrates.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/solidrun/clearfog/clearfog.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/sysam/amcore/amcore.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/t3corp/t3corp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/tbs/tbs2910/tbs2910.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/tcm-bf518/tcm-bf518.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/tcm-bf537/tcm-bf537.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/technologic/ts4800/ts4800.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/theadorable/theadorable.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/toradex/colibri_imx7/colibri_imx7.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/toradex/colibri_vf/colibri_vf.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/tqc/tqm5200/tqm5200.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/tqc/tqm834x/tqm834x.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/tqc/tqm8xx/tqm8xx.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/tqc/tqma6/tqma6.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/udoo/udoo.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/v38b/v38b.c	/^int checkboard (void)$/;"	f	typeref:typename:int
checkboard	board/varisys/cyrus/cyrus.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/ve8313/ve8313.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/wandboard/wandboard.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/warp/warp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/warp7/warp7.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/xes/common/board.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/xes/xpedite1000/xpedite1000.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/xilinx/ppc405-generic/xilinx_ppc405_generic.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/xilinx/ppc440-generic/xilinx_ppc440_generic.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/xilinx/zynq/board.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	board/xilinx/zynqmp/zynqmp.c	/^int checkboard(void)$/;"	f	typeref:typename:int
checkboard	common/board_info.c	/^int __weak checkboard(void)$/;"	f	typeref:typename:int __weak
checkcpu	arch/m68k/cpu/mcf5227x/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/m68k/cpu/mcf523x/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/m68k/cpu/mcf52x2/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/m68k/cpu/mcf530x/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/m68k/cpu/mcf532x/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/m68k/cpu/mcf5445x/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/m68k/cpu/mcf547x_8x/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/openrisc/cpu/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc512x/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc5xx/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc5xxx/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc8260/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc83xx/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc85xx/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc86xx/cpu.c	/^checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/mpc8xx/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/powerpc/cpu/ppc4xx/cpu.c	/^int checkcpu (void)$/;"	f	typeref:typename:int
checkcpu	arch/sh/cpu/sh2/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/sh/cpu/sh3/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/sh/cpu/sh4/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/sparc/cpu/leon2/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkcpu	arch/sparc/cpu/leon3/cpu.c	/^int checkcpu(void)$/;"	f	typeref:typename:int
checkdcache	arch/openrisc/cpu/cache.c	/^int checkdcache(void)$/;"	f	typeref:typename:int
checkdcache	arch/powerpc/cpu/mpc8xx/cpu.c	/^int checkdcache (void)$/;"	f	typeref:typename:int
checkdtc	Makefile	/^checkdtc:$/;"	t
checked	drivers/mtd/ubi/ubi.h	/^	unsigned int checked:1;$/;"	m	struct:ubi_volume	typeref:typename:unsigned int:1
checkgcc4	arch/powerpc/config.mk	/^checkgcc4:$/;"	t
checkicache	arch/openrisc/cpu/cache.c	/^int checkicache(void)$/;"	f	typeref:typename:int
checkicache	arch/powerpc/cpu/mpc8xx/cpu.c	/^int checkicache (void)$/;"	f	typeref:typename:int
checking_wrmsrl	arch/x86/include/asm/msr.h	/^#define checking_wrmsrl(/;"	d
checkinstructions	arch/openrisc/cpu/cpu.c	/^static void checkinstructions(void)$/;"	f	typeref:typename:void	file:
checkinterval	include/ext_common.h	/^	__le32 checkinterval;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
checkjobs	common/cli_hush.c	/^static int checkjobs(struct pipe* fg_pipe)$/;"	f	typeref:typename:int	file:
checkpoint_blocks_required	fs/yaffs2/yaffs_guts.h	/^	int checkpoint_blocks_required;	\/* Number of blocks needed to store$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_block_list	fs/yaffs2/yaffs_guts.h	/^	int *checkpt_block_list;$/;"	m	struct:yaffs_dev	typeref:typename:int *
checkpt_buffer	fs/yaffs2/yaffs_guts.h	/^	u8 *checkpt_buffer;$/;"	m	struct:yaffs_dev	typeref:typename:u8 *
checkpt_byte_count	fs/yaffs2/yaffs_guts.h	/^	int checkpt_byte_count;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_byte_offs	fs/yaffs2/yaffs_guts.h	/^	int checkpt_byte_offs;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_cur_block	fs/yaffs2/yaffs_guts.h	/^	int checkpt_cur_block;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_cur_chunk	fs/yaffs2/yaffs_guts.h	/^	int checkpt_cur_chunk;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_max_blocks	fs/yaffs2/yaffs_guts.h	/^	int checkpt_max_blocks;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_next_block	fs/yaffs2/yaffs_guts.h	/^	int checkpt_next_block;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_open_write	fs/yaffs2/yaffs_guts.h	/^	int checkpt_open_write;$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_page_seq	fs/yaffs2/yaffs_guts.h	/^	int checkpt_page_seq;	\/* running sequence number of checkpt pages *\/$/;"	m	struct:yaffs_dev	typeref:typename:int
checkpt_sum	fs/yaffs2/yaffs_guts.h	/^	u32 checkpt_sum;$/;"	m	struct:yaffs_dev	typeref:typename:u32
checkpt_xor	fs/yaffs2/yaffs_guts.h	/^	u32 checkpt_xor;$/;"	m	struct:yaffs_dev	typeref:typename:u32
checkstack	Makefile	/^checkstack:$/;"	t
checksum	arch/x86/cpu/intel_common/microcode.c	/^	uint checksum;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
checksum	arch/x86/include/asm/acpi_table.h	/^	u8 checksum;		\/* Checksum of the first 20 bytes *\/$/;"	m	struct:acpi_rsdp	typeref:typename:u8
checksum	arch/x86/include/asm/acpi_table.h	/^	volatile u8 checksum;	\/* To make sum of entire table == 0 *\/$/;"	m	struct:acpi_table_header	typeref:typename:volatile u8
checksum	arch/x86/include/asm/fsp/fsp_ffs.h	/^	} checksum;$/;"	m	union:ffs_integrity	typeref:struct:ffs_integrity::__anon07b9b4bf0108
checksum	arch/x86/include/asm/fsp/fsp_fv.h	/^	u16			checksum;$/;"	m	struct:fv_header	typeref:typename:u16
checksum	arch/x86/include/asm/mrccache.h	/^	u32	checksum;	\/* IP style checksum *\/$/;"	m	struct:mrc_data_container	typeref:typename:u32
checksum	arch/x86/include/asm/pirq_routing.h	/^	u8 checksum;		\/* Modulo 256 checksum must give zero *\/$/;"	m	struct:irq_routing_table	typeref:typename:u8
checksum	include/api_public.h	/^	uint32_t	checksum;		\/* checksum of this sig struct *\/$/;"	m	struct:api_signature	typeref:typename:uint32_t
checksum	include/cbfs.h	/^	u32 checksum;$/;"	m	struct:cbfs_cachenode	typeref:typename:u32
checksum	include/cbfs.h	/^	u32 checksum;$/;"	m	struct:cbfs_fileheader	typeref:typename:u32
checksum	include/ec_commands.h	/^	uint8_t checksum;$/;"	m	struct:ec_host_request	typeref:typename:uint8_t
checksum	include/ec_commands.h	/^	uint8_t checksum;$/;"	m	struct:ec_host_response	typeref:typename:uint8_t
checksum	include/ec_commands.h	/^	uint8_t checksum;$/;"	m	struct:ec_lpc_host_args	typeref:typename:uint8_t
checksum	include/edid.h	/^	unsigned char checksum;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
checksum	include/image.h	/^	struct checksum_algo *checksum;$/;"	m	struct:image_sig_algo	typeref:struct:checksum_algo *
checksum	include/linux/edd.h	/^	__u8 checksum;$/;"	m	struct:edd_device_params	typeref:typename:__u8
checksum	include/net.h	/^	u16		checksum;$/;"	m	struct:icmp_hdr	typeref:typename:u16
checksum	include/smbios.h	/^	u8 checksum;$/;"	m	struct:smbios_entry	typeref:typename:u8
checksum	tools/kwbimage.h	/^	uint8_t               checksum;$/;"	m	struct:ext_hdr_v0	typeref:typename:uint8_t
checksum	tools/kwbimage.h	/^	uint8_t  checksum;		\/*31    *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint8_t
checksum	tools/kwbimage.h	/^	uint8_t  checksum;              \/* 1F *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
checksum	tools/mxsboot.c	/^	uint32_t		checksum;$/;"	m	struct:mx28_nand_dbbt	typeref:typename:uint32_t	file:
checksum	tools/mxsboot.c	/^	uint32_t		checksum;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
checksum	tools/mxsimage.h	/^		uint8_t		checksum;$/;"	m	struct:sb_command::__anonc4848c960308	typeref:typename:uint8_t
checksum	tools/socfpgaimage.c	/^	uint16_t checksum;$/;"	m	struct:socfpga_header	typeref:typename:uint16_t	file:
checksum	tools/zynqimage.c	/^	uint32_t checksum; \/* 0x48 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
checksum	tools/zynqmpimage.c	/^	uint32_t checksum; \/* 0x48 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
checksum16	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u16	checksum16;$/;"	m	union:ffs_integrity	typeref:typename:u16
checksum_algo	include/image.h	/^struct checksum_algo {$/;"	s
checksum_algos	common/image-sig.c	/^struct checksum_algo checksum_algos[] = {$/;"	v	typeref:struct:checksum_algo[]
checksum_len	include/image.h	/^	const int checksum_len;$/;"	m	struct:checksum_algo	typeref:typename:const int
checksum_type	include/ext_common.h	/^	uint8_t checksum_type;$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t
checkthumb	arch/arm/config.mk	/^checkthumb:$/;"	t
checkval	lib/fdtdec_test.c	/^static int checkval(const char *oper_name, int expected, int value)$/;"	f	typeref:typename:int	file:
chi	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 chi;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
chien_search	lib/bch.c	/^static int chien_search(struct bch_control *bch, unsigned int len,$/;"	f	typeref:typename:int	file:
child	common/cli_hush.c	/^	struct child_prog *child;$/;"	m	struct:p_context	typeref:struct:child_prog *	file:
child	include/linux/ioport.h	/^	struct resource *parent, *sibling, *child;$/;"	m	struct:resource	typeref:struct:resource *
child_cnt	fs/ubifs/ubifs-media.h	/^	__le16 child_cnt;$/;"	m	struct:ubifs_idx_node	typeref:typename:__le16
child_cnt	fs/ubifs/ubifs.h	/^	int child_cnt;$/;"	m	struct:ubifs_znode	typeref:typename:int
child_count	scripts/kconfig/mconf.c	/^static int child_count;$/;"	v	typeref:typename:int	file:
child_count	scripts/kconfig/nconf.c	/^static int child_count;$/;"	v	typeref:typename:int	file:
child_dprc_id	drivers/net/fsl-mc/mc.c	/^int child_dprc_id;$/;"	v	typeref:typename:int
child_head	include/dm/device.h	/^	struct list_head child_head;$/;"	m	struct:udevice	typeref:struct:list_head
child_phys_hi	arch/sparc/include/asm/prom.h	/^	unsigned int child_phys_hi;	\/* Only certain bits are encoded here. *\/$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
child_phys_hi	arch/sparc/include/asm/prom.h	/^	unsigned int child_phys_hi;$/;"	m	struct:linux_prom_ebus_ranges	typeref:typename:unsigned int
child_phys_lo	arch/sparc/include/asm/prom.h	/^	unsigned int child_phys_lo;$/;"	m	struct:linux_prom_ebus_ranges	typeref:typename:unsigned int
child_phys_lo	arch/sparc/include/asm/prom.h	/^	unsigned int child_phys_lo;$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
child_phys_mid	arch/sparc/include/asm/prom.h	/^	unsigned int child_phys_mid;$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
child_post_bind	include/dm/device.h	/^	int (*child_post_bind)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
child_post_bind	include/dm/uclass.h	/^	int (*child_post_bind)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
child_post_remove	include/dm/device.h	/^	int (*child_post_remove)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
child_pre_probe	include/dm/device.h	/^	int (*child_pre_probe)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
child_pre_probe	include/dm/uclass.h	/^	int (*child_pre_probe)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
child_prog	common/cli_hush.c	/^struct child_prog {$/;"	s	file:
children	fs/yaffs2/yaffs_guts.h	/^	struct list_head children;	\/* list of child links *\/$/;"	m	struct:yaffs_dir_var	typeref:struct:list_head
children	include/usb.h	/^	struct usb_device *children[USB_MAXCHILDREN];$/;"	m	struct:usb_device	typeref:struct:usb_device * []
chip	arch/arm/include/asm/arch-vf610/gpio.h	/^	unsigned int chip;$/;"	m	struct:vybrid_gpio_platdata	typeref:typename:unsigned int
chip	arch/mips/mach-ath79/cpu.c	/^	const char *chip;$/;"	m	struct:ath79_soc_desc	typeref:typename:const char *	file:
chip	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^	u8 chip;$/;"	m	struct:marvell_io_exp	typeref:typename:u8	file:
chip	board/siemens/draco/board.h	/^	struct chip_data chip;$/;"	m	struct:draco_baseboard_id	typeref:struct:chip_data
chip	board/solidrun/clearfog/clearfog.c	/^	u8 chip;$/;"	m	struct:marvell_io_exp	typeref:typename:u8	file:
chip	drivers/gpio/pca953x.c	/^	uint8_t chip;$/;"	m	struct:pca953x_chip_ngpio	typeref:typename:uint8_t	file:
chip	drivers/gpio/vybrid_gpio.c	/^	unsigned int chip;$/;"	m	struct:vybrid_gpios	typeref:typename:unsigned int	file:
chip	drivers/mtd/nand/fsl_elbc_nand.c	/^	struct nand_chip chip;$/;"	m	struct:fsl_elbc_mtd	typeref:struct:nand_chip	file:
chip	drivers/mtd/nand/fsl_ifc_nand.c	/^	struct nand_chip chip;$/;"	m	struct:fsl_ifc_mtd	typeref:struct:nand_chip	file:
chip	drivers/mtd/nand/mpc5121_nfc.c	/^	struct nand_chip chip;$/;"	m	struct:mpc5121_nfc_prv	typeref:struct:nand_chip	file:
chip	drivers/mtd/nand/pxa3xx_nand.c	/^	struct nand_chip	chip;$/;"	m	struct:pxa3xx_nand_host	typeref:struct:nand_chip	file:
chip	drivers/mtd/nand/vf610_nfc.c	/^	struct nand_chip chip;$/;"	m	struct:vf610_nfc	typeref:struct:nand_chip	file:
chip	drivers/usb/gadget/fotg210.c	/^	struct fotg210_chip                  *chip;$/;"	m	struct:fotg210_ep	typeref:struct:fotg210_chip *	file:
chip	include/i2c.h	/^	uint8_t		chip;$/;"	m	struct:i2c_next_hop	typeref:typename:uint8_t
chip	include/linux/mtd/doc2000.h	/^	char floor, chip;$/;"	m	struct:Nand	typeref:typename:char
chip	include/linux/mtd/nand.h	/^	struct platform_nand_chip chip;$/;"	m	struct:platform_nand_data	typeref:struct:platform_nand_chip
chip	post/board/lwmon5/sysmon.c	/^	uchar	chip;$/;"	m	struct:sysmon_s	typeref:typename:uchar	file:
chip	test/dm/i2c.c	/^static const int chip = 0x2c;$/;"	v	typeref:typename:const int	file:
chip0status	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int chip0status;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
chip1status	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int chip1status;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
chip_21_errata	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^chip_21_errata(void)$/;"	f	typeref:typename:void
chip_TWL6030	include/twl6030.h	/^	chip_TWL6030,$/;"	e	enum:twl603x_chip_type
chip_TWL6032	include/twl6030.h	/^	chip_TWL6032,$/;"	e	enum:twl603x_chip_type
chip_TWL603X_cnt	include/twl6030.h	/^	chip_TWL603X_cnt$/;"	e	enum:twl603x_chip_type
chip_addr	include/i2c.h	/^	uint chip_addr;$/;"	m	struct:dm_i2c_chip	typeref:typename:uint
chip_board_rev	drivers/ddr/marvell/a38x/ddr3_init.c	/^	u8 chip_board_rev;$/;"	m	struct:dram_modes	typeref:typename:u8	file:
chip_board_rev	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	int chip_board_rev;$/;"	m	struct:dram_modes	typeref:typename:int
chip_configuration_unlock	arch/arm/mach-keystone/init.c	/^void chip_configuration_unlock(void)$/;"	f	typeref:typename:void
chip_data	arch/arm/include/asm/arch-spear/spr_defs.h	/^struct chip_data {$/;"	s
chip_data	board/siemens/draco/board.h	/^struct chip_data {$/;"	s
chip_delay	include/linux/mtd/fsl_upm.h	/^	int chip_delay;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
chip_delay	include/linux/mtd/nand.h	/^	int chip_delay;$/;"	m	struct:nand_chip	typeref:typename:int
chip_delay	include/linux/mtd/nand.h	/^	int chip_delay;$/;"	m	struct:platform_nand_chip	typeref:typename:int
chip_erase_timeout_max	include/mtd/cfi_flash.h	/^	u8	chip_erase_timeout_max;$/;"	m	struct:cfi_qry	typeref:typename:u8
chip_erase_timeout_typ	include/mtd/cfi_flash.h	/^	u8	chip_erase_timeout_typ;$/;"	m	struct:cfi_qry	typeref:typename:u8
chip_id	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 chip_id;		\/* Chip Id Reg *\/$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
chip_id	board/xilinx/zynqmp/zynqmp.c	/^static int chip_id(void)$/;"	f	typeref:typename:int	file:
chip_id	drivers/ddr/marvell/a38x/ddr3_init.c	/^	u8 chip_id;$/;"	m	struct:dram_modes	typeref:typename:u8	file:
chip_id	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u8 chip_id;$/;"	m	struct:dram_modes	typeref:typename:u8
chip_id	drivers/mtd/nand/pxa3xx_nand.h	/^	uint32_t	chip_id;$/;"	m	struct:pxa3xx_nand_flash	typeref:typename:uint32_t
chip_id	drivers/net/ks8851_mll.h	/^struct chip_id {$/;"	s
chip_id	drivers/net/smc911x.h	/^struct chip_id {$/;"	s
chip_id	drivers/net/uli526x.c	/^	u32 chip_id;	\/* Chip vendor\/Device ID *\/$/;"	m	struct:uli526x_board_info	typeref:typename:u32	file:
chip_id1	board/freescale/t208xrdb/cpld.h	/^	u8 chip_id1;		\/* 0x00 - Chip ID1 register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
chip_id1	board/freescale/t4rdb/cpld.h	/^	u8 chip_id1;	\/* 0x00 - CPLD Chip ID1 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
chip_id2	board/freescale/t208xrdb/cpld.h	/^	u8 chip_id2;		\/* 0x01 - Chip ID2 register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
chip_id2	board/freescale/t4rdb/cpld.h	/^	u8 chip_id2;	\/* 0x01 - CPLD Chip ID2 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
chip_id_addr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 chip_id_addr;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
chip_id_det_pin	arch/arm/dts/sun5i-r8-chip.dts	/^	chip_id_det_pin: chip_id_det_pin@0 {$/;"	l
chip_ids	drivers/net/ks8851_mll.c	/^static const struct chip_id chip_ids[] =  {$/;"	v	typeref:typename:const struct chip_id[]	file:
chip_ids	drivers/net/smc911x.h	/^static const struct chip_id chip_ids[] =  {$/;"	v	typeref:typename:const struct chip_id[]
chip_list	drivers/i2c/fti2c010.c	/^static struct fti2c010_chip chip_list[] = {$/;"	v	typeref:struct:fti2c010_chip[]	file:
chip_lock	include/linux/mtd/onenand.h	/^	spinlock_t chip_lock;$/;"	m	struct:onenand_chip	typeref:typename:spinlock_t
chip_name	drivers/tpm/tpm_tis_infineon.c	/^static const char * const chip_name[] = {$/;"	v	typeref:typename:const char * const[]	file:
chip_nr	include/linux/mtd/fsl_upm.h	/^	int chip_nr;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
chip_num	tools/mxsboot.c	/^	uint32_t		chip_num;$/;"	m	struct:mx28_sd_drive_info	typeref:typename:uint32_t	file:
chip_offset	include/linux/mtd/fsl_upm.h	/^	int chip_offset;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
chip_offset	include/linux/mtd/nand.h	/^	int chip_offset;$/;"	m	struct:platform_nand_chip	typeref:typename:int
chip_probe	include/linux/mtd/onenand.h	/^	int (*chip_probe)(struct mtd_info *mtd);$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd)
chip_regs	include/vsc9953.h	/^	struct vsc9953_chip_regs	chip_regs;$/;"	m	struct:vsc9953_devcpu_gcb	typeref:struct:vsc9953_chip_regs
chip_select	drivers/mtd/altera_qspi.c	/^	u32	chip_select;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
chip_select_map	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^static struct cs_element chip_select_map[] = {$/;"	v	typeref:struct:cs_element[]	file:
chip_serdes_phy_config	drivers/phy/marvell/comphy.h	/^struct chip_serdes_phy_config {$/;"	s
chip_shift	include/linux/mtd/nand.h	/^	int chip_shift;$/;"	m	struct:nand_chip	typeref:typename:int
chip_size	include/ddr_spd.h	/^	unsigned char chip_size;   \/*  1 Total # bytes of SPD memory device *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
chip_size	include/ddr_spd.h	/^	unsigned char chip_size;   \/*  1 Total # bytes of SPD memory device *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
chip_size	include/spd.h	/^	unsigned char chip_size;   \/*  1 Total # bytes of SPD memory device *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
chip_tag	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int chip_tag;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
chip_type	board/nokia/rx51/tag_omap.h	/^	u8 chip_type;$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8
chip_type	board/nokia/rx51/tag_omap.h	/^	u8 chip_type;$/;"	m	struct:omap_wlan_cx3110x_config	typeref:typename:u8
chip_type	drivers/gpio/pca953x_gpio.c	/^	int chip_type;$/;"	m	struct:pca953x_info	typeref:typename:int	file:
chip_type	drivers/tpm/tpm_tis.h	/^	ulong chip_type;$/;"	m	struct:tpm_chip	typeref:typename:ulong
chip_type	include/twl6030.h	/^	u8 chip_type;$/;"	m	struct:twl6030_data	typeref:typename:u8
chip_vbus_pin	arch/arm/dts/sun5i-r8-chip.dts	/^	chip_vbus_pin: chip_vbus_pin@0 {$/;"	l
chip_wifi_reg_on_pin	arch/arm/dts/sun5i-r8-chip.dts	/^	chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {$/;"	l
chipclk1	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk1: chipclk1 {$/;"	l
chipclk112	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk112: chipclk112 {$/;"	l
chipclk12	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk12: chipclk12 {$/;"	l
chipclk124	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk124: chipclk124 {$/;"	l
chipclk13	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk13: chipclk13 {$/;"	l
chipclk14	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk14: chipclk14 {$/;"	l
chipclk16	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk16: chipclk16 {$/;"	l
chipclk1rstiso	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk1rstiso: chipclk1rstiso {$/;"	l
chipclk1rstiso112	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk1rstiso112: chipclk1rstiso112 {$/;"	l
chipclk1rstiso13	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk1rstiso13: chipclk1rstiso13 {$/;"	l
chipclk1rstiso14	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk1rstiso14: chipclk1rstiso14 {$/;"	l
chipclk1rstiso16	arch/arm/dts/keystone-clocks.dtsi	/^	chipclk1rstiso16: chipclk1rstiso16 {$/;"	l
chipd_id	include/vsc9953.h	/^	u32	chipd_id;$/;"	m	struct:vsc9953_chip_regs	typeref:typename:u32
chipid	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t chipid;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
chipid1	board/freescale/c29xpcie/cpld.h	/^	u8 chipid1;	\/* 0x0 - CPLD Chip ID1 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
chipid2	board/freescale/c29xpcie/cpld.h	/^	u8 chipid2;	\/* 0x1 - CPLD Chip ID2 Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
chips	drivers/mtd/nand/fsl_elbc_nand.c	/^	struct fsl_elbc_mtd *chips[MAX_BANKS];$/;"	m	struct:fsl_elbc_ctrl	typeref:struct:fsl_elbc_mtd * []	file:
chips	drivers/mtd/nand/fsl_ifc_nand.c	/^	struct fsl_ifc_mtd *chips[MAX_BANKS];$/;"	m	struct:fsl_ifc_ctrl	typeref:struct:fsl_ifc_mtd * []	file:
chips	drivers/mtd/nand/sunxi_nand.c	/^	struct list_head chips;$/;"	m	struct:sunxi_nfc	typeref:struct:list_head	file:
chips	drivers/video/ct69000.c	/^static const struct ctfb_chips_properties chips[] = {$/;"	v	typeref:typename:const struct ctfb_chips_properties[]	file:
chips	include/linux/mtd/doc2000.h	/^	struct Nand *chips;$/;"	m	struct:DiskOnChip	typeref:struct:Nand *
chips_per_channel	arch/arm/mach-exynos/clock_init.h	/^	uint8_t chips_per_channel;	\/* number of chips per channel *\/$/;"	m	struct:mem_timings	typeref:typename:uint8_t
chips_to_configure	arch/arm/mach-exynos/clock_init.h	/^	uint8_t chips_to_configure;	\/* number of chips to configure *\/$/;"	m	struct:mem_timings	typeref:typename:uint8_t
chipsel	drivers/mtd/nand/mpc5121_nfc.c	/^	int chipsel;$/;"	m	struct:mpc5121_nfc_prv	typeref:typename:int	file:
chipset	drivers/net/rtl8169.c	/^	int chipset;$/;"	m	struct:rtl8169_private	typeref:typename:int	file:
chipset_power_state	arch/x86/include/asm/arch-broadwell/pm.h	/^struct chipset_power_state {$/;"	s
chipshift	include/linux/mtd/doc2000.h	/^	int chipshift;$/;"	m	struct:DiskOnChip	typeref:typename:int
chipsig	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	chipsig;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
chipsig_clr	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	chipsig_clr;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
chipsize	include/linux/mtd/nand.h	/^	uint64_t chipsize;$/;"	m	struct:nand_chip	typeref:typename:uint64_t
chipsize	include/linux/mtd/nand.h	/^	unsigned int chipsize;$/;"	m	struct:nand_flash_dev	typeref:typename:unsigned int
chipsize	include/linux/mtd/onenand.h	/^	unsigned int chipsize;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
chipstatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int chipstatus;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
chipstatus_ch0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int chipstatus_ch0;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
chipstatus_ch1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int chipstatus_ch1;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
chipstmxptclk	arch/arm/dts/keystone-clocks.dtsi	/^	chipstmxptclk: chipstmxptclk {$/;"	l
chipwidth	include/flash.h	/^	uchar	chipwidth;		\/* the width of the chip		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:uchar
chk1	cmd/load.c	/^static int chk1(char *buffer)$/;"	f	typeref:typename:int	file:
chk_data_crc	fs/ubifs/ubifs.h	/^	unsigned int chk_data_crc:2;$/;"	m	struct:ubifs_mount_opts	typeref:typename:unsigned int:2
chk_fastmap	drivers/mtd/ubi/ubi.h	/^	unsigned int chk_fastmap:1;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:1
chk_fs	fs/ubifs/debug.h	/^	unsigned int chk_fs:1;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int:1
chk_fs	fs/ubifs/debug.h	/^	unsigned int chk_fs:1;$/;"	m	struct:ubifs_global_debug_info	typeref:typename:unsigned int:1
chk_gen	drivers/mtd/ubi/ubi.h	/^	unsigned int chk_gen:1;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:1
chk_gen	fs/ubifs/debug.h	/^	unsigned int chk_gen:1;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int:1
chk_gen	fs/ubifs/debug.h	/^	unsigned int chk_gen:1;$/;"	m	struct:ubifs_global_debug_info	typeref:typename:unsigned int:1
chk_index	fs/ubifs/debug.h	/^	unsigned int chk_index:1;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int:1
chk_index	fs/ubifs/debug.h	/^	unsigned int chk_index:1;$/;"	m	struct:ubifs_global_debug_info	typeref:typename:unsigned int:1
chk_io	drivers/mtd/ubi/ubi.h	/^	unsigned int chk_io:1;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:1
chk_lprops	fs/ubifs/debug.h	/^	unsigned int chk_lprops:1;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int:1
chk_lprops	fs/ubifs/debug.h	/^	unsigned int chk_lprops:1;$/;"	m	struct:ubifs_global_debug_info	typeref:typename:unsigned int:1
chk_lpt_lebs	fs/ubifs/debug.h	/^	int chk_lpt_lebs;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
chk_lpt_sz	fs/ubifs/debug.h	/^	long long chk_lpt_sz;$/;"	m	struct:ubifs_debug_info	typeref:typename:long long
chk_lpt_sz2	fs/ubifs/debug.h	/^	long long chk_lpt_sz2;$/;"	m	struct:ubifs_debug_info	typeref:typename:long long
chk_lpt_wastage	fs/ubifs/debug.h	/^	long long chk_lpt_wastage;$/;"	m	struct:ubifs_debug_info	typeref:typename:long long
chk_orph	fs/ubifs/debug.h	/^	unsigned int chk_orph:1;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int:1
chk_orph	fs/ubifs/debug.h	/^	unsigned int chk_orph:1;$/;"	m	struct:ubifs_global_debug_info	typeref:typename:unsigned int:1
chk_sum	disk/part_amiga.c	/^    s32 chk_sum;$/;"	m	struct:block_header	typeref:typename:s32	file:
chk_sum	disk/part_amiga.h	/^    s32   chk_sum;$/;"	m	struct:bootcode_block	typeref:typename:s32
chk_sum	disk/part_amiga.h	/^    s32 chk_sum;$/;"	m	struct:partition_block	typeref:typename:s32
chk_sum	disk/part_amiga.h	/^    s32 chk_sum;$/;"	m	struct:rigid_disk_block	typeref:typename:s32
chk_sum	disk/part_iso.h	/^	unsigned char chk_sum[2];	\/* Check sum (all words must be zero)  *\/$/;"	m	struct:iso_val_entry	typeref:typename:unsigned char[2]
chksum	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 chksum[2];        \/* 0x4E *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[2]
chnum	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int chnum;$/;"	m	struct:edma3_channel_config	typeref:typename:int
choice	scripts/kconfig/zconf.y	/^choice: T_CHOICE word_opt T_EOL$/;"	l
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choice04ede3cf0204	lib/efi/Kconfig	/^choice$/;"	C
choice07312ef30104	arch/Kconfig	/^choice$/;"	C
choice08bc65400104	dts/Kconfig	/^choice$/;"	C	menu:Device Tree Control
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choice097e41480104	arch/arm/cpu/armv7/am33xx/Kconfig	/^choice$/;"	C
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choice334d94630104	drivers/serial/Kconfig	/^choice$/;"	C	menu:Serial drivers
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choice3e84a7cc0304	board/tqc/tqma6/Kconfig	/^choice$/;"	C
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choice431e3c1d0104	arch/mips/mach-ath79/Kconfig	/^choice$/;"	C	menu:QCA/Atheros 7xxx/9xxx platforms
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choice9b416b3d0304	arch/arm/mach-exynos/Kconfig	/^choice$/;"	C
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choice9e1fa8550104	arch/arm/mach-davinci/Kconfig	/^choice$/;"	C
choiceNoPix	scripts/kconfig/qconf.h	/^	QPixmap choiceYesPix, choiceNoPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
choiceYesPix	scripts/kconfig/qconf.h	/^	QPixmap choiceYesPix, choiceNoPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
choice_block	scripts/kconfig/zconf.y	/^choice_block:$/;"	l
choice_end	scripts/kconfig/zconf.y	/^choice_end: end$/;"	l
choice_entry	scripts/kconfig/zconf.y	/^choice_entry: choice choice_option_list$/;"	l	typeref:typename:menu
choice_option	scripts/kconfig/zconf.y	/^choice_option: T_DEFAULT T_WORD if_expr T_EOL$/;"	l
choice_option	scripts/kconfig/zconf.y	/^choice_option: T_OPTIONAL T_EOL$/;"	l
choice_option	scripts/kconfig/zconf.y	/^choice_option: T_PROMPT prompt if_expr T_EOL$/;"	l
choice_option	scripts/kconfig/zconf.y	/^choice_option: T_TYPE prompt_stmt_opt T_EOL$/;"	l
choice_option_list	scripts/kconfig/zconf.y	/^choice_option_list:$/;"	l
choice_stmt	scripts/kconfig/zconf.y	/^choice_stmt: choice_entry choice_block choice_end$/;"	l
choicea93523a50104	arch/powerpc/cpu/mpc5xxx/Kconfig	/^choice$/;"	C	menu:mpc5xxx CPU
choiceab6fbbff0104	arch/arm/cpu/armv7/mx6/Kconfig	/^choice$/;"	C
choiceab7e29c80104	board/cadence/xtfpga/Kconfig	/^choice$/;"	C
choicebc89bc280104	arch/m68k/Kconfig	/^choice$/;"	C	menu:M68000 architecture
choicebcdb41430104	board/sunxi/Kconfig	/^choice$/;"	C
choicebcdb41430204	board/sunxi/Kconfig	/^choice$/;"	C
choicebcdb41430304	board/sunxi/Kconfig	/^choice$/;"	C
choicebe9bc59a0104	board/advantech/Kconfig	/^choice$/;"	C
choicec40c90d10104	board/dbau1x00/Kconfig	/^choice$/;"	C	menu:dbau1x00 board options
choicec671bd160104	board/seco/Kconfig	/^choice$/;"	C
choicec671bd160204	board/seco/Kconfig	/^choice$/;"	C
choicec671bd160304	board/seco/Kconfig	/^choice$/;"	C
choicec8ba732b0104	arch/arm/mach-orion5x/Kconfig	/^choice$/;"	C
choiced0b1a2100104	board/congatec/Kconfig	/^choice$/;"	C
choiced115656e0104	arch/arm/mach-tegra/tegra20/Kconfig	/^choice$/;"	C
choiced2e20b500104	arch/powerpc/cpu/mpc8xx/Kconfig	/^choice$/;"	C	menu:mpc8xx CPU
choiced4351f5b0104	arch/mips/Kconfig	/^choice$/;"	C	menu:MIPS architecture
choiced4351f5b0204	arch/mips/Kconfig	/^choice$/;"	C	menu:MIPS architecture
choiced4351f5b0304	arch/mips/Kconfig	/^choice$/;"	C	menu:MIPS architecture
choiced4ee1e2d0104	drivers/usb/Kconfig	/^choice$/;"	C
choiced51ff68f0104	arch/arm/mach-tegra/tegra30/Kconfig	/^choice$/;"	C
choiced71808250104	arch/arm/cpu/armv7/omap4/Kconfig	/^choice$/;"	C
choiceda2881060104	arch/powerpc/cpu/mpc86xx/Kconfig	/^choice$/;"	C	menu:mpc86xx CPU
choicede88a50d0104	drivers/usb/dwc3/Kconfig	/^choice$/;"	C
choicee1e20a3b0104	arch/arm/mach-uniphier/Kconfig	/^choice$/;"	C
choicee81d234a0104	arch/microblaze/Kconfig	/^choice$/;"	C	menu:MicroBlaze architecture
choicee9c481760104	arch/arm/mach-integrator/Kconfig	/^choice$/;"	C	menu:Integrator Options
choicee9c481760204	arch/arm/mach-integrator/Kconfig	/^choice$/;"	C	menu:Integrator Options
choiceea2bb93d0104	arch/sh/Kconfig	/^choice$/;"	C	menu:SuperH architecture
choiceea9c8f640104	board/advantech/dms-ba16/Kconfig	/^choice$/;"	C
choiceec2bc0df0104	board/Arcturus/ucp1020/Kconfig	/^choice$/;"	C
choicef0c1115c0104	arch/blackfin/Kconfig	/^choice$/;"	C	menu:Blackfin architecture
choicef20e67690104	arch/arm/mach-keystone/Kconfig	/^choice$/;"	C
choicef4d9e1b10104	arch/mips/mach-pic32/Kconfig	/^choice$/;"	C	menu:Microchip PIC32 platforms
choicef4d9e1b10204	arch/mips/mach-pic32/Kconfig	/^choice$/;"	C	menu:Microchip PIC32 platforms
choicef6fc79380104	arch/powerpc/cpu/mpc8260/Kconfig	/^choice$/;"	C	menu:mpc8260 CPU
chrg	include/power/pmic.h	/^	struct pmic *chrg, *fg, *muic;$/;"	m	struct:power_battery	typeref:struct:pmic *
chrg	include/power/pmic.h	/^	struct power_chrg *chrg;$/;"	m	struct:pmic	typeref:struct:power_chrg *
chrg_bat_present	include/power/pmic.h	/^	int (*chrg_bat_present) (struct pmic *p);$/;"	m	struct:power_chrg	typeref:typename:int (*)(struct pmic * p)
chrg_state	include/power/pmic.h	/^	int (*chrg_state) (struct pmic *p, int state, int current);$/;"	m	struct:power_chrg	typeref:typename:int (*)(struct pmic * p,int state,int current)
chrg_type	include/power/pmic.h	/^	int (*chrg_type) (struct pmic *p);$/;"	m	struct:power_chrg	typeref:typename:int (*)(struct pmic * p)
chroma	include/linux/fb.h	/^	struct fb_chroma chroma;$/;"	m	struct:fb_monspecs	typeref:struct:fb_chroma
chroma_blue	drivers/video/fsl_dcu_fb.c	/^	u32 chroma_blue;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
chroma_bw_gain	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 chroma_bw_gain;		\/* 0x128 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
chroma_bw_gain	arch/arm/include/asm/arch/display.h	/^	u32 chroma_bw_gain;		\/* 0x128 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
chroma_freq	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 chroma_freq;		\/* 0x010 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
chroma_freq	arch/arm/include/asm/arch/display.h	/^	u32 chroma_freq;		\/* 0x010 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
chroma_green	drivers/video/fsl_dcu_fb.c	/^	u32 chroma_green;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
chroma_red	drivers/video/fsl_dcu_fb.c	/^	u32 chroma_red;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
chsccdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 chsccdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
chsccdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	chsccdr;$/;"	m	struct:clkctl	typeref:typename:u32
chsccdr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 chsccdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
chstat	drivers/spi/omap3_spi.c	/^	unsigned int chstat;		\/* 0x30, 0x44, 0x58, 0x6C *\/$/;"	m	struct:mcspi_channel	typeref:typename:unsigned int	file:
chunk.quietly	doc/DocBook/stylesheet.xsl	/^<param name="chunk.quietly">1<\/param>$/;"	p
chunk2mem	common/dlmalloc.c	/^#define chunk2mem(/;"	d	file:
chunk_at_offset	common/dlmalloc.c	/^#define chunk_at_offset(/;"	d	file:
chunk_bit_stride	fs/yaffs2/yaffs_guts.h	/^	int chunk_bit_stride;	\/* Number of bytes of chunk_bits per block.$/;"	m	struct:yaffs_dev	typeref:typename:int
chunk_bits	fs/yaffs2/yaffs_guts.h	/^	u8 *chunk_bits;		\/* bitmap of chunks in use *\/$/;"	m	struct:yaffs_dev	typeref:typename:u8 *
chunk_bits_alt	fs/yaffs2/yaffs_guts.h	/^	unsigned chunk_bits_alt:1;	\/* allocated using alternative alloc *\/$/;"	m	struct:yaffs_dev	typeref:typename:unsigned:1
chunk_data_size	drivers/mtd/nand/mxs_nand.c	/^static int chunk_data_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE;$/;"	v	typeref:typename:int	file:
chunk_div	fs/yaffs2/yaffs_guts.h	/^	u32 chunk_div;		\/* Divisor after shifting: 1 for 2^n sizes *\/$/;"	m	struct:yaffs_dev	typeref:typename:u32
chunk_error_strikes	fs/yaffs2/yaffs_guts.h	/^	u32 chunk_error_strikes:3;	\/* How many times we've had ecc etc$/;"	m	struct:yaffs_block_info	typeref:typename:u32:3
chunk_grp_bits	fs/yaffs2/yaffs_guts.h	/^	u16 chunk_grp_bits;	\/* Number of bits that need to be resolved if$/;"	m	struct:yaffs_dev	typeref:typename:u16
chunk_grp_size	fs/yaffs2/yaffs_guts.h	/^	u16 chunk_grp_size;	\/* == 2^^chunk_grp_bits *\/$/;"	m	struct:yaffs_dev	typeref:typename:u16
chunk_hdr_sz	include/sparse_format.h	/^  __le16	chunk_hdr_sz;	\/* 12 bytes for first revision of the file format *\/$/;"	m	struct:sparse_header	typeref:typename:__le16
chunk_header	include/sparse_format.h	/^typedef struct chunk_header {$/;"	s
chunk_header_t	include/sparse_format.h	/^} chunk_header_t;$/;"	t	typeref:struct:chunk_header
chunk_id	fs/yaffs2/yaffs_guts.h	/^	int chunk_id;$/;"	m	struct:yaffs_cache	typeref:typename:int
chunk_id	fs/yaffs2/yaffs_guts.h	/^	unsigned chunk_id:20;$/;"	m	struct:yaffs_tags	typeref:typename:unsigned:20
chunk_id	fs/yaffs2/yaffs_guts.h	/^	unsigned chunk_id;	\/* If 0 this is a header, else a data chunk *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
chunk_id	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned chunk_id:20;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:20
chunk_id	fs/yaffs2/yaffs_packedtags2.h	/^	unsigned chunk_id;$/;"	m	struct:yaffs_packed_tags2_tags_only	typeref:typename:unsigned
chunk_id	fs/yaffs2/yaffs_summary.c	/^	unsigned chunk_id;$/;"	m	struct:yaffs_summary_tags	typeref:typename:unsigned	file:
chunk_is_mmapped	common/dlmalloc.c	/^#define chunk_is_mmapped(/;"	d	file:
chunk_mask	fs/yaffs2/yaffs_guts.h	/^	u32 chunk_mask;		\/* Mask to use for power-of-2 case *\/$/;"	m	struct:yaffs_dev	typeref:typename:u32
chunk_msg	drivers/usb/host/dwc2.c	/^int chunk_msg(struct dwc2_priv *priv, struct usb_device *dev,$/;"	f	typeref:typename:int
chunk_offset	fs/yaffs2/yaffs_guts.h	/^	int chunk_offset;$/;"	m	struct:yaffs_dev	typeref:typename:int
chunk_shift	fs/yaffs2/yaffs_guts.h	/^	u32 chunk_shift;	\/* Shift value *\/$/;"	m	struct:yaffs_dev	typeref:typename:u32
chunk_size	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		chunk_size;	\/* split commands chunk size *\/$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
chunk_size	include/hash.h	/^	int chunk_size;				\/* Watchdog chunk size *\/$/;"	m	struct:hash_algo	typeref:typename:int
chunk_sz	include/sparse_format.h	/^  __le32	chunk_sz;	\/* in blocks in output image *\/$/;"	m	struct:chunk_header	typeref:typename:__le32
chunk_type	include/sparse_format.h	/^  __le16	chunk_type;	\/* 0xCAC1 -> raw; 0xCAC2 -> fill; 0xCAC3 -> don't care *\/$/;"	m	struct:chunk_header	typeref:typename:__le16
chunk_used	fs/yaffs2/yaffs_guts.h	/^	unsigned chunk_used;	\/*  Status of the chunk: used or unused *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
chunks_per_block	fs/yaffs2/yaffs_guts.h	/^	int chunks_per_block;	\/* does not need to be a power of 2 *\/$/;"	m	struct:yaffs_param	typeref:typename:int
chunks_per_summary	fs/yaffs2/yaffs_guts.h	/^	int chunks_per_summary;$/;"	m	struct:yaffs_dev	typeref:typename:int
chunksize	common/dlmalloc.c	/^#define chunksize(/;"	d	file:
ci	drivers/block/dwc_ahsata.c	/^	u32 ci;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
ci_bounce	drivers/usb/gadget/ci_udc.c	/^static int ci_bounce(struct ci_req *ci_req, int in)$/;"	f	typeref:typename:int	file:
ci_correctable	include/zfs/zio_checksum.h	/^	int		ci_correctable;	\/* number of correctable bits	*\/$/;"	m	struct:zio_checksum_info	typeref:typename:int
ci_debounce	drivers/usb/gadget/ci_udc.c	/^static void ci_debounce(struct ci_req *ci_req, int in)$/;"	f	typeref:typename:void	file:
ci_drv	drivers/usb/gadget/ci_udc.h	/^struct ci_drv {$/;"	s
ci_eck	include/zfs/zio_checksum.h	/^	int		ci_eck;		\/* uses zio embedded checksum? *\/$/;"	m	struct:zio_checksum_info	typeref:typename:int
ci_ep	drivers/usb/gadget/ci_udc.h	/^struct ci_ep {$/;"	s
ci_ep_alloc_request	drivers/usb/gadget/ci_udc.c	/^ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)$/;"	f	typeref:struct:usb_request *	file:
ci_ep_dequeue	drivers/usb/gadget/ci_udc.c	/^static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:int	file:
ci_ep_disable	drivers/usb/gadget/ci_udc.c	/^static int ci_ep_disable(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
ci_ep_enable	drivers/usb/gadget/ci_udc.c	/^static int ci_ep_enable(struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
ci_ep_free_request	drivers/usb/gadget/ci_udc.c	/^static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
ci_ep_init	drivers/usb/gadget/ci_udc.c	/^static const struct usb_ep ci_ep_init[5] = {$/;"	v	typeref:typename:const struct usb_ep[5]	file:
ci_ep_ops	drivers/usb/gadget/ci_udc.c	/^static struct usb_ep_ops ci_ep_ops = {$/;"	v	typeref:struct:usb_ep_ops	file:
ci_ep_queue	drivers/usb/gadget/ci_udc.c	/^static int ci_ep_queue(struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
ci_ep_submit_next_request	drivers/usb/gadget/ci_udc.c	/^static void ci_ep_submit_next_request(struct ci_ep *ci_ep)$/;"	f	typeref:typename:void	file:
ci_flush_qh	drivers/usb/gadget/ci_udc.c	/^static void ci_flush_qh(int ep_num)$/;"	f	typeref:typename:void	file:
ci_flush_qtd	drivers/usb/gadget/ci_udc.c	/^static void ci_flush_qtd(int ep_num)$/;"	f	typeref:typename:void	file:
ci_flush_td	drivers/usb/gadget/ci_udc.c	/^static void ci_flush_td(struct ept_queue_item *td)$/;"	f	typeref:typename:void	file:
ci_func	include/zfs/zio_checksum.h	/^	zio_checksum_t	*ci_func; \/* checksum function for each byteorder *\/$/;"	m	struct:zio_checksum_info	typeref:typename:zio_checksum_t *
ci_get_qh	drivers/usb/gadget/ci_udc.c	/^static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in)$/;"	f	typeref:struct:ept_queue_head *	file:
ci_get_qtd	drivers/usb/gadget/ci_udc.c	/^static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in)$/;"	f	typeref:struct:ept_queue_item *	file:
ci_invalidate_qh	drivers/usb/gadget/ci_udc.c	/^static void ci_invalidate_qh(int ep_num)$/;"	f	typeref:typename:void	file:
ci_invalidate_qtd	drivers/usb/gadget/ci_udc.c	/^static void ci_invalidate_qtd(int ep_num)$/;"	f	typeref:typename:void	file:
ci_invalidate_td	drivers/usb/gadget/ci_udc.c	/^static void ci_invalidate_td(struct ept_queue_item *td)$/;"	f	typeref:typename:void	file:
ci_name	include/zfs/zio_checksum.h	/^	char		*ci_name;	\/* descriptive name *\/$/;"	m	struct:zio_checksum_info	typeref:typename:char *
ci_pullup	drivers/usb/gadget/ci_udc.c	/^static int ci_pullup(struct usb_gadget *gadget, int is_on)$/;"	f	typeref:typename:int	file:
ci_req	drivers/usb/gadget/ci_udc.h	/^struct ci_req {$/;"	s
ci_rlm_avg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ci_rlm_avg;	\/* Initiator Read Latency Monitor Avg *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
ci_rlm_cfg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ci_rlm_cfg;	\/* Initiator Read Latency Monitor Cfg *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
ci_sched_cfg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ci_sched_cfg;	\/* Initiator Scheduling Configuration *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
ci_udc	drivers/usb/gadget/ci_udc.h	/^struct ci_udc {$/;"	s
ci_udc_ops	drivers/usb/gadget/ci_udc.c	/^static struct usb_gadget_ops ci_udc_ops = {$/;"	v	typeref:struct:usb_gadget_ops	file:
ci_udc_probe	drivers/usb/gadget/ci_udc.c	/^static int ci_udc_probe(void)$/;"	f	typeref:typename:int	file:
cic_init	arch/arm/mach-keystone/ddr3.c	/^static void cic_init(u32 base)$/;"	f	typeref:typename:void	file:
cic_map_cic_to_gic	arch/arm/mach-keystone/ddr3.c	/^static void cic_map_cic_to_gic(u32 base, u32 chan_num, u32 irq_num)$/;"	f	typeref:typename:void	file:
cicr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cicr;$/;"	m	struct:dma4_chan	typeref:typename:u32
cid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cid[4];			\/* Component ID *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32[4]
cid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cid[4];			\/* Component ID *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32[4]
cid	include/mmc.h	/^	uint cid[4];$/;"	m	struct:mmc	typeref:typename:uint[4]
cidr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	cidr;	\/* Chip ID Register RO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
cie	arch/microblaze/include/asm/microblaze_intc.h	/^	int cie; \/* clear interrupt enable bits *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
cimr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cimr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cimr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cimr;$/;"	m	struct:clkctl	typeref:typename:u32
cimr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cimr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cimr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cimr;$/;"	m	struct:ccm_reg	typeref:typename:u32
cimr0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 cimr0;		\/* 0x1D Clear Interrupt Mask *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
cimr1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 cimr1;		\/* 0x1D Clear Interrupt Mask *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
cinh_bar	include/fsl-mc/fsl_qbman_base.h	/^	void *cinh_bar; \/* Cache-inhibited portal register map *\/$/;"	m	struct:qbman_swp_desc	typeref:typename:void *
cint	arch/m68k/include/asm/coldfire/edma.h	/^	u8 cint;		\/* 0x1C Clear Interrupt Enable *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
cipher_ctx	tools/mxsimage.c	/^	EVP_CIPHER_CTX			cipher_ctx;$/;"	m	struct:sb_image_ctx	typeref:typename:EVP_CIPHER_CTX	file:
cir	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cir;	\/* RCC clock interrupt *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cir	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 cir;	\/* RCC clock interrupt *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cir	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 cir;	\/* RCC clock interrupt *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cir	arch/m68k/include/asm/immap_520x.h	/^	u16 cir;		\/* 0x06 Chip ID *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
cir	arch/m68k/include/asm/immap_5227x.h	/^	u16 cir;		\/* Chip Identification (Rd-only) *\/$/;"	m	struct:ccm	typeref:typename:u16
cir	arch/m68k/include/asm/immap_5235.h	/^	u16 cir;		\/* 0x0a Chip identification register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
cir	arch/m68k/include/asm/immap_5301x.h	/^	u16 cir;		\/* 0x06 Chip ID *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
cir	arch/m68k/include/asm/immap_5329.h	/^	u16 cir;		\/* 0x06 Chip identification register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
cir	arch/m68k/include/asm/immap_5441x.h	/^	u16 cir;		\/* 0x0A Chip Identification *\/$/;"	m	struct:ccm	typeref:typename:u16
cir	arch/m68k/include/asm/immap_5445x.h	/^	u16 cir;		\/* Chip Identification Register (Read-only) *\/$/;"	m	struct:ccm	typeref:typename:u16
cir	include/mpc5xxx.h	/^	volatile u32 cir;		\/* GPT + Timer# * 0x10 + 0x04 *\/$/;"	m	struct:mpc5xxx_gpt	typeref:typename:volatile u32
cir_cfg	include/vsc9953.h	/^	u32	cir_cfg;$/;"	m	struct:vsc9953_qsys_hsch	typeref:typename:u32
cir_state	include/vsc9953.h	/^	u32	cir_state;$/;"	m	struct:vsc9953_qsys_hsch	typeref:typename:u32
circbuf	include/circbuf.h	/^typedef struct circbuf {$/;"	s
circbuf_t	include/circbuf.h	/^} circbuf_t;$/;"	t	typeref:struct:circbuf
cis8201_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver cis8201_driver = {$/;"	v	typeref:struct:phy_driver	file:
cis8204_config	drivers/net/phy/vitesse.c	/^static int cis8204_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
cis8204_driver	drivers/net/phy/vitesse.c	/^static struct phy_driver cis8204_driver = {$/;"	v	typeref:struct:phy_driver	file:
cisr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cisr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cisr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cisr;$/;"	m	struct:clkctl	typeref:typename:u32
cisr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cisr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cisr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cisr;$/;"	m	struct:ccm_reg	typeref:typename:u32
cisr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cisr0;		\/* Critical IRQ Summary 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
cisr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	cisr0;		\/* 0x41330 - Critical Interrupt Summary Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
cisr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cisr1;		\/* Critical IRQ Summary 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
cisr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	cisr1;		\/* 0x41340 - Critical Interrupt Summary Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
citer	arch/m68k/include/asm/coldfire/edma.h	/^	u16 citer;		\/* 0x14 Cur Minor Loop Link, Major Loop Cnt *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u16
ck	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 ck;$/;"	m	struct:dram_sun9i_timing	typeref:typename:u32	file:
ck_cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ck_cfg;$/;"	m	struct:de_bld	typeref:typename:u32
ck_cfg	arch/arm/include/asm/arch/display2.h	/^	u32 ck_cfg;$/;"	m	struct:de_bld	typeref:typename:u32
ck_ctl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ck_ctl;			\/* b0 *\/$/;"	m	struct:de_bld	typeref:typename:u32
ck_ctl	arch/arm/include/asm/arch/display2.h	/^	u32 ck_ctl;			\/* b0 *\/$/;"	m	struct:de_bld	typeref:typename:u32
ck_delay	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u32 ck_delay = (u32)-1, ck_delay_16 = (u32)-1;$/;"	v	typeref:typename:u32
ck_delay	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	u32 ck_delay;$/;"	m	struct:ddr3_device_info	typeref:typename:u32
ck_delay	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^	u32 ck_delay;		\/* CK Delay  (m_sec) *\/$/;"	m	struct:trip_delay_element	typeref:typename:u32
ck_delay	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u32 ck_delay;$/;"	m	struct:tune_train_params	typeref:typename:u32
ck_delay_16	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u32 ck_delay = (u32)-1, ck_delay_16 = (u32)-1;$/;"	v	typeref:typename:u32
ck_delay_16	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u32 ck_delay_16;$/;"	m	struct:tune_train_params	typeref:typename:u32
ck_max	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ck_max[4];			\/* c0 *\/$/;"	m	struct:de_bld	typeref:typename:u32[4]
ck_max	arch/arm/include/asm/arch/display2.h	/^	u32 ck_max[4];			\/* c0 *\/$/;"	m	struct:de_bld	typeref:typename:u32[4]
ck_min	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ck_min[4];			\/* e0 *\/$/;"	m	struct:de_bld	typeref:typename:u32[4]
ck_min	arch/arm/include/asm/arch/display2.h	/^	u32 ck_min[4];			\/* e0 *\/$/;"	m	struct:de_bld	typeref:typename:u32[4]
ckcnt	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	unsigned char ckcnt;$/;"	m	struct:mfgdata	typeref:typename:unsigned char	file:
ckctl	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	ckctl;		\/* 54 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
cke_inactive	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u32 cke_inactive;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u32
cken	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cken;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
cken	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	cken;		\/* 0x148 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
cken	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	cken;		\/* 48 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
ckil	arch/arm/dts/imx6ull.dtsi	/^		ckil: clock@0 {$/;"	l
ckmax_b	drivers/video/fsl_diu_fb.c	/^	__le32 ckmax_b:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
ckmax_g	drivers/video/fsl_diu_fb.c	/^	__le32 ckmax_g:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
ckmax_r	drivers/video/fsl_diu_fb.c	/^	__le32 ckmax_r:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
ckmin_b	drivers/video/fsl_diu_fb.c	/^	__le32 ckmin_b:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
ckmin_g	drivers/video/fsl_diu_fb.c	/^	__le32 ckmin_g:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
ckmin_r	drivers/video/fsl_diu_fb.c	/^	__le32 ckmin_r:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
cks	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 cks;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
cks	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 cks;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
ckscr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 ckscr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
cksre	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 cksre;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
cksrx	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 cksrx;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
ckstat	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ckstat;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
ckstat	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	ckstat;		\/* 0x14c *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
ckstat	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	ckstat;		\/* 4c *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
cksum	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	unsigned char cksum;$/;"	m	struct:mfgdata	typeref:typename:unsigned char	file:
cksum	include/ddr_spd.h	/^	unsigned char cksum;       \/* 63 Checksum for bytes 0-62 *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
cksum	include/ddr_spd.h	/^	unsigned char cksum;       \/* 63 Checksum for bytes 0-62 *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
cksum	include/qfw.h	/^		} cksum;$/;"	m	union:bios_linker_entry::__anona601a7fc030a	typeref:struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0608
cksum	include/spd.h	/^	unsigned char cksum;       \/* 63 Checksum for bytes 0-62 *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
ckvol_mutex	drivers/mtd/ubi/ubi.h	/^	struct mutex ckvol_mutex;$/;"	m	struct:ubi_device	typeref:struct:mutex
cl	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
cl	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t cl;$/;"	m	struct:dram_params	typeref:typename:uint8_t
cl	drivers/bios_emulator/include/biosemu.h	/^	u8 ch, cl;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
cl	drivers/bios_emulator/include/biosemu.h	/^	u8 cl;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
cl	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 cl;$/;"	m	struct:dram_info	typeref:typename:u32
cl_al	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 cl_al;$/;"	m	struct:rk3036_phy_timing	typeref:typename:u32
cl_cwl_numentries	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 cl_cwl_numentries;$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
cl_cwl_table	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_cl_cwl_timing *cl_cwl_table;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_cl_cwl_timing *	file:
cl_eeprom_bus	board/compulab/common/eeprom.c	/^static int cl_eeprom_bus;$/;"	v	typeref:typename:int	file:
cl_eeprom_get_board_rev	board/compulab/common/eeprom.c	/^u32 cl_eeprom_get_board_rev(uint eeprom_bus)$/;"	f	typeref:typename:u32
cl_eeprom_get_board_rev	board/compulab/common/eeprom.h	/^static inline u32 cl_eeprom_get_board_rev(uint eeprom_bus)$/;"	f	typeref:typename:u32
cl_eeprom_get_product_name	board/compulab/common/eeprom.c	/^int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus)$/;"	f	typeref:typename:int
cl_eeprom_get_product_name	board/compulab/common/eeprom.h	/^static inline int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus)$/;"	f	typeref:typename:int
cl_eeprom_layout	board/compulab/common/eeprom.c	/^static int cl_eeprom_layout; \/* Implicitly LAYOUT_INVALID *\/$/;"	v	typeref:typename:int	file:
cl_eeprom_read	board/compulab/common/eeprom.c	/^static int cl_eeprom_read(uint offset, uchar *buf, int len)$/;"	f	typeref:typename:int	file:
cl_eeprom_read_mac_addr	board/compulab/common/eeprom.c	/^int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus)$/;"	f	typeref:typename:int
cl_eeprom_read_mac_addr	board/compulab/common/eeprom.h	/^static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus)$/;"	f	typeref:typename:int
cl_eeprom_setup	board/compulab/common/eeprom.c	/^static int cl_eeprom_setup(uint eeprom_bus)$/;"	f	typeref:typename:int	file:
cl_magic	include/linux/screen_info.h	/^	__u16 cl_magic, cl_offset; \/* 0x20 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
cl_mask_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u8 cl_mask_table[] = {$/;"	v	typeref:typename:u8[]
cl_offset	include/linux/screen_info.h	/^	__u16 cl_magic, cl_offset; \/* 0x20 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
cl_omap3_smc911x_gpmc_net_config	board/compulab/common/omap3_smc911x.c	/^static u32 cl_omap3_smc911x_gpmc_net_config[GPMC_MAX_REG] = {$/;"	v	typeref:typename:u32[]	file:
cl_omap3_smc911x_init	board/compulab/common/common.h	/^static inline int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,$/;"	f	typeref:typename:int
cl_omap3_smc911x_init	board/compulab/common/omap3_smc911x.c	/^int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,$/;"	f	typeref:typename:int
cl_omap3_smc911x_reset_net_chip	board/compulab/common/omap3_smc911x.c	/^static inline int cl_omap3_smc911x_reset_net_chip(int gpio) { return 0; }$/;"	f	typeref:typename:int	file:
cl_omap3_smc911x_reset_net_chip	board/compulab/common/omap3_smc911x.c	/^static int cl_omap3_smc911x_reset_net_chip(int gpio)$/;"	f	typeref:typename:int	file:
cl_omap3_smc911x_setup_net_chip_gmpc	board/compulab/common/omap3_smc911x.c	/^static void cl_omap3_smc911x_setup_net_chip_gmpc(int cs, u32 base_addr)$/;"	f	typeref:typename:void	file:
cl_pause_quanta	include/fsl_memac.h	/^	u32	cl_pause_quanta[4]; \/* CL01-CL67 pause quanta register *\/$/;"	m	struct:memac	typeref:typename:u32[4]
cl_pause_thresh	include/fsl_memac.h	/^	u32	cl_pause_thresh[4]; \/* CL01-CL67 pause thresh register *\/$/;"	m	struct:memac	typeref:typename:u32[4]
cl_print_pcb_info	board/compulab/common/common.c	/^void cl_print_pcb_info(void)$/;"	f	typeref:typename:void
cl_usb_hub_deinit	board/compulab/common/common.c	/^void cl_usb_hub_deinit(int gpio)$/;"	f	typeref:typename:void
cl_usb_hub_deinit	board/compulab/common/common.h	/^static inline void cl_usb_hub_deinit(int gpio) {}$/;"	f	typeref:typename:void
cl_usb_hub_init	board/compulab/common/common.c	/^int cl_usb_hub_init(int gpio, const char *label)$/;"	f	typeref:typename:int
cl_usb_hub_init	board/compulab/common/common.h	/^static inline int cl_usb_hub_init(int gpio, const char *label)$/;"	f	typeref:typename:int
cl_val	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 cl_val[DDR_FREQ_LIMIT];$/;"	m	struct:cl_val_per_freq	typeref:typename:u8[]
cl_val_per_freq	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct cl_val_per_freq {$/;"	s
claa_wvga	board/freescale/mx51evk/mx51evk_video.c	/^static struct fb_videomode const claa_wvga = {$/;"	v	typeref:struct:fb_videomode const	file:
claa_wvga	board/freescale/mx53loco/mx53loco_video.c	/^static struct fb_videomode const claa_wvga = {$/;"	v	typeref:struct:fb_videomode const	file:
clabdar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	clabdar;	\/* DMA current List - alternate base descriptor address Register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
claim_bus	include/spi.h	/^	int (*claim_bus)(struct udevice *dev);$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * dev)
clamp	include/linux/kernel.h	/^#define clamp(/;"	d
clamp_release	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure clamp_release(u32 __maybe_unused *clamp)$/;"	f	typeref:typename:void __secure	file:
clamp_set	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure clamp_set(u32 __maybe_unused *clamp)$/;"	f	typeref:typename:void __secure	file:
clamp_t	include/linux/kernel.h	/^#define clamp_t(/;"	d
clamp_tbl	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 clamp_tbl[] = { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 };$/;"	v	typeref:typename:u32[]
clamp_val	include/linux/kernel.h	/^#define clamp_val(/;"	d
class	board/gateworks/gw_ventana/gw_ventana.c	/^	unsigned short class;$/;"	m	struct:pci_dev	typeref:typename:unsigned short	file:
class_arb0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 class_arb0;		\/* 0xD0 *\/$/;"	m	struct:sms	typeref:typename:u32
class_create	include/linux/compat.h	/^#define class_create(/;"	d
class_create_file	include/linux/compat.h	/^#define class_create_file(/;"	d
class_destroy	include/linux/compat.h	/^#define class_destroy(/;"	d
class_hi	include/pci_rom.h	/^	uint16_t class_hi;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
class_lo	include/pci_rom.h	/^	uint8_t class_lo;$/;"	m	struct:pci_rom_data	typeref:typename:uint8_t
class_register	include/linux/compat.h	/^#define class_register(/;"	d
class_remove_file	include/linux/compat.h	/^#define class_remove_file(/;"	d
class_unregister	include/linux/compat.h	/^#define class_unregister(/;"	d
classd_clk	arch/arm/dts/sama5d2.dtsi	/^					classd_clk: classd_clk@59 {$/;"	l
classd_gclk	arch/arm/dts/sama5d2.dtsi	/^					classd_gclk: classd_gclk@59 {$/;"	l
clb	drivers/block/dwc_ahsata.c	/^	u32 clb;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
clbss_l	arch/nds32/cpu/n1213/start.S	/^clbss_l:$/;"	l
clbu	drivers/block/dwc_ahsata.c	/^	u32 clbu;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
clcd_synth_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 clcd_synth_clk;	\/* 0x5C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
clean	Makefile	/^clean: $(clean-dirs)$/;"	t
clean	Makefile	/^clean: rm-dirs  := $(CLEAN_DIRS)$/;"	t
clean	Makefile	/^clean: rm-files := $(CLEAN_FILES)$/;"	t
clean-dirs	Makefile	/^clean-dirs	:= $(foreach f,$(u-boot-alldirs),$(if $(wildcard $(srctree)\/$f\/Makefile),$f))$/;"	m
clean-dirs	Makefile	/^clean-dirs      := $(addprefix _clean_, $(clean-dirs) doc\/DocBook)$/;"	m
clean-dirs	doc/DocBook/Makefile	/^clean-dirs := $(patsubst %.xml,%,$(DOCBOOKS)) man$/;"	m
clean-dirs	tools/Makefile	/^clean-dirs := lib common$/;"	m
clean-files	arch/arc/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/arm/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/blackfin/cpu/Makefile	/^clean-files := init.lds$/;"	m
clean-files	arch/microblaze/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/mips/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/nios2/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/powerpc/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/sandbox/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/x86/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	arch/xtensa/dts/Makefile	/^clean-files := *.dtb$/;"	m
clean-files	doc/DocBook/Makefile	/^clean-files := $(DOCBOOKS) \\$/;"	m
clean-files	dts/Makefile	/^clean-files := dt.dtb.S$/;"	m
clean-files	examples/standalone/Makefile	/^clean-files  := *.srec *.bin$/;"	m
clean-files	scripts/kconfig/Makefile	/^clean-files	:= qconf.moc .tmp_qtcheck .tmp_gtkcheck$/;"	m
cleanTbdNum	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 cleanTbdNum;	\/* the number of available transmit BDs *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
cleanTbdNum	drivers/net/mpc512x_fec.h	/^	u16 cleanTbdNum;		\/* the number of available transmit BDs *\/$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:u16
cleanTbdNum	drivers/net/mpc5xxx_fec.h	/^	uint16 cleanTbdNum;		\/* the number of available transmit BDs *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:uint16
clean_an_unclean_leb	fs/ubifs/recovery.c	/^static int clean_an_unclean_leb(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
clean_buf	fs/ubifs/recovery.c	/^static void clean_buf(const struct ubifs_info *c, void **buf, int lnum,$/;"	f	typeref:typename:void	file:
clean_file_emails	scripts/get_maintainer.pl	/^sub clean_file_emails {$/;"	s
clean_items	scripts/kconfig/nconf.c	/^static void clean_items(void)$/;"	f	typeref:typename:void	file:
clean_space_tabs	scripts/cleanpatch	/^sub clean_space_tabs($)$/;"	s
clean_up	scripts/kconfig/merge_config.sh	/^clean_up() {$/;"	f
clean_zn_cnt	fs/ubifs/ubifs.h	/^	atomic_long_t clean_zn_cnt;$/;"	m	struct:ubifs_info	typeref:typename:atomic_long_t
cleancache_poolid	fs/ubifs/ubifs.h	/^	int cleancache_poolid;$/;"	m	struct:super_block	typeref:typename:int
cleandocs	doc/DocBook/Makefile	/^cleandocs:$/;"	t
cleanup	include/tpm.h	/^	int (*cleanup)(struct udevice *dev);$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev)
cleanup	test/image/test-imagetools.sh	/^cleanup()$/;"	f
cleanup	test/py/conftest.py	/^def cleanup():$/;"	f
cleanup_before_linux	arch/arc/lib/bootm.c	/^static int cleanup_before_linux(void)$/;"	f	typeref:typename:int	file:
cleanup_before_linux	arch/arm/cpu/arm11/cpu.c	/^int cleanup_before_linux (void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/arm720t/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/arm920t/cpu.c	/^int cleanup_before_linux (void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/arm926ejs/cpu.c	/^int cleanup_before_linux (void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/arm946es/cpu.c	/^int cleanup_before_linux (void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/armv7/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/armv7m/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/armv8/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/pxa/pxa2xx.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/arm/cpu/sa1100/cpu.c	/^int cleanup_before_linux (void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/nds32/cpu/n1213/ag101/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/openrisc/cpu/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/sandbox/cpu/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/sh/cpu/sh2/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/sh/cpu/sh3/cpu.c	/^int cleanup_before_linux(void)$/;"	f	typeref:typename:int
cleanup_before_linux	arch/sh/cpu/sh4/cpu.c	/^int cleanup_before_linux (void)$/;"	f	typeref:typename:int
cleanup_before_linux_select	arch/arm/cpu/armv7/cpu.c	/^int cleanup_before_linux_select(int flags)$/;"	f	typeref:typename:int
cleanup_before_linux_select	arch/sandbox/cpu/cpu.c	/^int cleanup_before_linux_select(int flags)$/;"	f	typeref:typename:int
cleanup_extra_options	tools/moveconfig.py	/^def cleanup_extra_options(configs, options):$/;"	f
cleanup_headers	tools/moveconfig.py	/^def cleanup_headers(configs, options):$/;"	f
cleanup_mtd	drivers/mtd/mtdcore.c	/^static void __exit cleanup_mtd(void)$/;"	f	typeref:typename:void __exit	file:
cleanup_one_extra_option	tools/moveconfig.py	/^def cleanup_one_extra_option(defconfig_path, configs, options):$/;"	f
cleanup_one_header	tools/moveconfig.py	/^def cleanup_one_header(header_path, patterns, options):$/;"	f
cleanup_spawn	test/py/u_boot_console_base.py	/^    def cleanup_spawn(self):$/;"	m	class:ConsoleBase
clear	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t clear;$/;"	m	struct:timer	typeref:typename:uint32_t
clear	include/bedbug/type.h	/^	int (*clear) (int);$/;"	m	struct:__anon3619a6480108	typeref:typename:int (*)(int)
clear	include/gdsys_fpga.h	/^	u16 clear;$/;"	m	struct:ihs_gpio	typeref:typename:u16
clear	include/serial.h	/^	int (*clear)(struct udevice *dev);$/;"	m	struct:dm_serial_ops	typeref:typename:int (*)(struct udevice * dev)
clear_altbank	board/freescale/common/pixis.c	/^static void clear_altbank(void)$/;"	f	typeref:typename:void	file:
clear_and_enable_ecc	post/cpu/ppc4xx/denali_ecc.c	/^inline static void clear_and_enable_ecc(void)$/;"	f	typeref:typename:void	file:
clear_binblock	common/dlmalloc.c	/^#define clear_binblock(/;"	d	file:
clear_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ void clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
clear_bit	arch/microblaze/include/asm/bitops.h	/^static inline void clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
clear_bit	arch/mips/include/asm/bitops.h	/^clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
clear_bit	arch/mips/include/asm/bitops.h	/^static __inline__ void clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
clear_bit	arch/nios2/include/asm/bitops/atomic.h	/^static inline void clear_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
clear_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ void clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
clear_bit	arch/sh/include/asm/bitops.h	/^static inline void clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
clear_bit	arch/x86/include/asm/bitops.h	/^static __inline__ void clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
clear_bit	drivers/mmc/davinci_mmc.c	/^#define clear_bit(/;"	d	file:
clear_bit	drivers/usb/gadget/f_mass_storage.c	/^inline void clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
clear_bl_bit	arch/sh/include/asm/irqflags.h	/^static inline void clear_bl_bit(void)$/;"	f	typeref:typename:void
clear_bss	arch/arc/lib/relocate.c	/^int clear_bss(void)$/;"	f	typeref:typename:int
clear_bss	arch/m68k/cpu/mcf5227x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/m68k/cpu/mcf523x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/m68k/cpu/mcf52x2/start.S	/^clear_bss:$/;"	l
clear_bss	arch/m68k/cpu/mcf530x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/m68k/cpu/mcf532x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/m68k/cpu/mcf5445x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/m68k/cpu/mcf547x_8x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/microblaze/cpu/start.S	/^clear_bss:$/;"	l
clear_bss	arch/nds32/cpu/n1213/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc512x/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc5xx/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc5xxx/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc8260/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc83xx/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc85xx/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/mpc8xx/start.S	/^clear_bss:$/;"	l
clear_bss	arch/powerpc/cpu/ppc4xx/start.S	/^clear_bss:$/;"	l
clear_bss	arch/x86/lib/relocate.c	/^int clear_bss(void)$/;"	f	typeref:typename:int
clear_bss	arch/xtensa/lib/relocate.c	/^int clear_bss(void)$/;"	f	typeref:typename:int
clear_callback	common/env_callback.c	/^static int clear_callback(ENTRY *entry)$/;"	f	typeref:typename:int	file:
clear_ctrlc	common/console.c	/^void clear_ctrlc(void)$/;"	f	typeref:typename:void
clear_ddr_tlbs	arch/powerpc/cpu/mpc85xx/tlb.c	/^void clear_ddr_tlbs(unsigned int memsize_in_meg)$/;"	f	typeref:typename:void
clear_ddr_tlbs_phys	arch/powerpc/cpu/mpc85xx/tlb.c	/^void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)$/;"	f	typeref:typename:void
clear_dqs_enable	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	clear_dqs_enable;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
clear_dsim_frame_done	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim);$/;"	m	struct:mipi_dsim_master_ops	typeref:typename:int (*)(struct mipi_dsim_device * dsim)
clear_env_values	board/mpl/common/common_util.c	/^void clear_env_values(void)$/;"	f	typeref:typename:void
clear_ep_state	drivers/usb/gadget/pxa25x_udc.c	/^static inline void clear_ep_state(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
clear_error	drivers/misc/mxc_ocotp.c	/^static void clear_error(struct ocotp_regs *regs)$/;"	f	typeref:typename:void	file:
clear_fatent	fs/fat/fat_write.c	/^static int clear_fatent(fsdata *mydata, __u32 entry)$/;"	f	typeref:typename:int	file:
clear_feature_flag	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^int clear_feature_flag;$/;"	v	typeref:typename:int
clear_feature_num	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static u8 clear_feature_num;$/;"	v	typeref:typename:u8	file:
clear_fifo	drivers/spi/sh_spi.c	/^static void clear_fifo(struct sh_spi *ss)$/;"	f	typeref:typename:void	file:
clear_flags	common/env_flags.c	/^static int clear_flags(ENTRY *entry)$/;"	f	typeref:typename:int	file:
clear_interrupt	drivers/mtd/nand/denali.c	/^static inline void clear_interrupt(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
clear_interrupts	drivers/mtd/nand/denali.c	/^static void clear_interrupts(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
clear_inuse	common/dlmalloc.c	/^#define clear_inuse(/;"	d	file:
clear_inuse_bit_at_offset	common/dlmalloc.c	/^#define clear_inuse_bit_at_offset(/;"	d	file:
clear_irq	arch/arm/include/asm/omap_musb.h	/^	void (*clear_irq)(void);$/;"	m	struct:omap_musb_board_data	typeref:typename:void (*)(void)
clear_last_remainder	common/dlmalloc.c	/^#define clear_last_remainder /;"	d	file:
clear_ldo_ramp	arch/arm/cpu/armv7/mx6/soc.c	/^static void clear_ldo_ramp(void)$/;"	f	typeref:typename:void	file:
clear_loop	arch/arm/lib/crt0_64.S	/^clear_loop:$/;"	l
clear_mmdc_ch_mask	arch/arm/cpu/armv7/mx6/soc.c	/^static void clear_mmdc_ch_mask(void)$/;"	f	typeref:typename:void	file:
clear_mtrrs	arch/x86/cpu/intel_common/car.S	/^clear_mtrrs:$/;"	l
clear_nlink	fs/ubifs/super.c	/^void clear_nlink(struct inode *inode)$/;"	f	typeref:typename:void
clear_pointers	arch/x86/cpu/quark/mrc_util.c	/^void clear_pointers(void)$/;"	f	typeref:typename:void
clear_self_refresh	arch/x86/cpu/quark/smc.c	/^void clear_self_refresh(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
clear_sr	drivers/spi/armada100_spi.c	/^	u32 clear_sr;$/;"	m	struct:armd_spi_slave	typeref:typename:u32	file:
clear_status	drivers/misc/fsl_iim.c	/^static void clear_status(struct fsl_iim *regs)$/;"	f	typeref:typename:void	file:
clear_tlbs	arch/powerpc/cpu/mpc86xx/start.S	/^clear_tlbs:$/;"	l
clear_update_marker	drivers/mtd/ubi/upd.c	/^static int clear_update_marker(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int	file:
clear_window	arch/sparc/cpu/leon2/start.S	/^clear_window:$/;"	l
clear_window	arch/sparc/cpu/leon3/start.S	/^clear_window:$/;"	l
clear_write_error	drivers/rtc/imxdi.c	/^static void clear_write_error(void)$/;"	f	typeref:typename:void	file:
cleardataout	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int cleardataout;	\/* 0x90 *\/$/;"	m	struct:gpio	typeref:typename:unsigned int
clearfog_dsa0_clk_pins	arch/arm/dts/armada-388-clearfog.dts	/^				clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {$/;"	l
clearfog_dsa0_pins	arch/arm/dts/armada-388-clearfog.dts	/^				clearfog_dsa0_pins: clearfog-dsa0-pins {$/;"	l
clearfog_i2c1_pins	arch/arm/dts/armada-388-clearfog.dts	/^				clearfog_i2c1_pins: i2c1-pins {$/;"	l
clearfog_sdhci_cd_pins	arch/arm/dts/armada-388-clearfog.dts	/^				clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {$/;"	l
clearfog_sdhci_pins	arch/arm/dts/armada-388-clearfog.dts	/^				clearfog_sdhci_pins: clearfog-sdhci-pins {$/;"	l
clearfog_spi1_cs_pins	arch/arm/dts/armada-388-clearfog.dts	/^				clearfog_spi1_cs_pins: spi1-cs-pins {$/;"	l
cli	arch/microblaze/include/asm/system.h	/^#define cli(/;"	d
cli	arch/mips/include/asm/system.h	/^#  define cli(/;"	d
cli_init	common/cli.c	/^void cli_init(void)$/;"	f	typeref:typename:void
cli_loop	common/cli.c	/^void cli_loop(void)$/;"	f	typeref:typename:void
cli_process_fdt	common/cli.c	/^bool cli_process_fdt(const char **cmdp)$/;"	f	typeref:typename:bool
cli_process_fdt	include/cli.h	/^static inline bool cli_process_fdt(const char **cmdp)$/;"	f	typeref:typename:bool
cli_readline	common/cli_readline.c	/^int cli_readline(const char *const prompt)$/;"	f	typeref:typename:int
cli_readline_into_buffer	common/cli_readline.c	/^int cli_readline_into_buffer(const char *const prompt, char *buffer,$/;"	f	typeref:typename:int
cli_secure_boot_cmd	common/cli.c	/^void cli_secure_boot_cmd(const char *cmd)$/;"	f	typeref:typename:void
cli_secure_boot_cmd	include/cli.h	/^static inline void cli_secure_boot_cmd(const char *cmd)$/;"	f	typeref:typename:void
cli_simple_loop	common/cli_simple.c	/^void cli_simple_loop(void)$/;"	f	typeref:typename:void
cli_simple_parse_line	common/cli_simple.c	/^int cli_simple_parse_line(char *line, char *argv[])$/;"	f	typeref:typename:int
cli_simple_process_macros	common/cli_simple.c	/^void cli_simple_process_macros(const char *input, char *output)$/;"	f	typeref:typename:void
cli_simple_run_command	common/cli_simple.c	/^int cli_simple_run_command(const char *cmd, int flag)$/;"	f	typeref:typename:int
cli_simple_run_command_list	common/cli_simple.c	/^int cli_simple_run_command_list(char *cmd, int flag)$/;"	f	typeref:typename:int
client	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 client;$/;"	m	struct:dfx_access	typeref:typename:u8
client_address	arch/x86/include/asm/me_common.h	/^	u32 client_address:8;$/;"	m	struct:mei_header	typeref:typename:u32:8
clk	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	arch/arm/cpu/arm926ejs/lpc32xx/cpu.c	/^static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^static struct clk_pm_regs    *clk  = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	arch/arm/cpu/arm926ejs/lpc32xx/dram.c	/^static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^static struct clk_pm_regs *clk    = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk *clk;$/;"	m	struct:clk_lookup	typeref:struct:clk *
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:bus_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:ccu_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:peri_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:ref_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:refclk	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct clk {$/;"	s
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk *clk;$/;"	m	struct:clk_lookup	typeref:struct:clk *
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:bus_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:ccu_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:peri_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:ref_clock	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk clk;$/;"	m	struct:refclk	typeref:struct:clk
clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct clk {$/;"	s
clk	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 clk;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
clk	arch/arm/include/asm/arch/display2.h	/^	u32 clk;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
clk	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	enum ks2_serdes_clock clk;$/;"	m	struct:ks2_serdes	typeref:enum:ks2_serdes_clock
clk	arch/arm/mach-zynq/clk.c	/^struct clk {$/;"	s	file:
clk	arch/m68k/include/asm/immap_5301x.h	/^	u8 clk;			\/* 0x02 Clock Select *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
clk	arch/powerpc/include/asm/immap_512x.h	/^	clk512x_t		clk;		\/* Clock Module *\/$/;"	m	struct:immap	typeref:typename:clk512x_t
clk	arch/powerpc/include/asm/immap_83xx.h	/^	clk83xx_t		clk;		\/* System Clock Module *\/$/;"	m	struct:immap	typeref:typename:clk83xx_t
clk	board/timll/devkit3250/devkit3250.c	/^static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	board/work-microwave/work_92105/work_92105.c	/^static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk	drivers/i2c/i2c-uniphier.c	/^	u32 clk;			\/* clock frequency control *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
clk	drivers/i2c/omap24xx_i2c.c	/^	struct udevice *clk;$/;"	m	struct:omap_i2c	typeref:struct:udevice *	file:
clk	drivers/i2c/rk_i2c.c	/^	struct clk clk;$/;"	m	struct:rk_i2c	typeref:struct:clk	file:
clk	drivers/i2c/tegra_i2c.c	/^	struct clk		clk;$/;"	m	struct:i2c_bus	typeref:struct:clk	file:
clk	drivers/mmc/rockchip_dw_mmc.c	/^	struct clk clk;$/;"	m	struct:rockchip_dwmmc_priv	typeref:struct:clk	file:
clk	drivers/mmc/sh_mmcif.h	/^	unsigned int		clk;$/;"	m	struct:sh_mmcif_host	typeref:typename:unsigned int
clk	drivers/mmc/tegra_mmc.c	/^	struct clk clk;$/;"	m	struct:tegra_mmc_priv	typeref:struct:clk	file:
clk	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 clk;		\/* 0x10 PMECC Clock Control Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
clk	drivers/mtd/nand/mpc5121_nfc.c	/^	struct clk *clk;$/;"	m	struct:mpc5121_nfc_prv	typeref:struct:clk *	file:
clk	drivers/mtd/nand/pxa3xx_nand.c	/^	struct clk		*clk;$/;"	m	struct:pxa3xx_nand_info	typeref:struct:clk *	file:
clk	drivers/soc/keystone/keystone_serdes.c	/^	enum ks2_serdes_clock clk;$/;"	m	struct:cfg_entry	typeref:enum:ks2_serdes_clock	file:
clk	drivers/spi/rk_spi.c	/^	struct clk clk;$/;"	m	struct:rockchip_spi_priv	typeref:struct:clk	file:
clk	drivers/usb/gadget/pxa25x_udc.h	/^	struct clk				*clk;$/;"	m	struct:pxa25x_udc	typeref:struct:clk *
clk	drivers/usb/musb-new/am35x.c	/^	struct clk		*clk;$/;"	m	struct:am35x_glue	typeref:struct:clk *	file:
clk	drivers/video/ipu.h	/^struct clk {$/;"	s
clk	include/ACEX1K.h	/^	Altera_clk_fn		clk;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_clk_fn
clk	include/altera.h	/^	Altera_clk_fn clk;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_clk_fn
clk	include/clk.h	/^struct clk {$/;"	s
clk	include/dm/platform_data/serial_sh.h	/^	unsigned int clk;$/;"	m	struct:sh_serial_platdata	typeref:typename:unsigned int
clk	include/power/pmic.h	/^	unsigned int clk;$/;"	m	struct:p_spi	typeref:typename:unsigned int
clk	include/spartan2.h	/^	xilinx_clk_fn	clk;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_clk_fn
clk	include/spartan2.h	/^	xilinx_clk_fn	clk;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_clk_fn
clk	include/spartan3.h	/^	xilinx_clk_fn	clk;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_clk_fn
clk	include/spartan3.h	/^	xilinx_clk_fn	clk;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_clk_fn
clk	include/virtex2.h	/^	xilinx_clk_fn	clk;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_clk_fn
clk	include/virtex2.h	/^	xilinx_clk_fn	clk;$/;"	m	struct:__anoncbf344e20208	typeref:typename:xilinx_clk_fn
clk0_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk0_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk0_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk0_en;		\/*0x200*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk0_sel	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk0_sel;		\/*0x400*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk0_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk0_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk100	arch/arm/dts/zynqmp-clk.dtsi	/^	clk100: clk100 {$/;"	l
clk10_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk10_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk10_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk10_en;		\/*0x260*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk10_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk10_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk125	arch/arm/dts/zynqmp-clk.dtsi	/^	clk125: clk125 {$/;"	l
clk12_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk12_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk12_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk12_en;		\/*0x270*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk12_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk12_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk16m	arch/arm/dts/tegra30-apalis.dts	/^		clk16m: clk@1 {$/;"	l
clk1_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk1_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk1_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk1_en;		\/*0x210*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk1_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk1_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk200	arch/arm/dts/zynqmp-clk.dtsi	/^	clk200: clk200 {$/;"	l
clk250	arch/arm/dts/zynqmp-clk.dtsi	/^	clk250: clk250 {$/;"	l
clk2_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk2_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk2_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk2_en;		\/*0x220*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk2_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk2_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk300	arch/arm/dts/zynqmp-clk.dtsi	/^	clk300: clk300 {$/;"	l
clk32k	arch/arm/dts/at91sam9260.dtsi	/^				clk32k: slck {$/;"	l	label:pmc
clk32k	arch/arm/dts/at91sam9g45.dtsi	/^				clk32k: slck {$/;"	l
clk32k	arch/arm/dts/sama5d2.dtsi	/^				clk32k: slowck {$/;"	l
clk32k_in	arch/arm/dts/tegra114-dalmore.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra124-jetson-tk1.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra124-nyan.dtsi	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra124-venice2.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-colibri.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-harmony.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-paz00.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-seaboard.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-tamonten.dtsi	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-trimslice.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-ventana.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra20-whistler.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra210-e2220-1170.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra210-p2371-0000.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra210-p2371-2180.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra210-p2571.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra30-apalis.dts	/^		clk32k_in: clk@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra30-beaver.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra30-cardhu.dts	/^		clk32k_in: clock@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra30-colibri.dts	/^		clk32k_in: clk@0 {$/;"	l
clk32k_in	arch/arm/dts/tegra30-tamonten.dtsi	/^		clk32k_in: clk@0 {$/;"	l
clk3_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk3_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk3_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk3_en;		\/*0x230*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk3_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk3_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk4_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 clk4_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
clk4_en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 clk4_en;		\/*0x630*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
clk4_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 clk4_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
clk512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct clk512x {$/;"	s
clk512x_t	arch/powerpc/include/asm/immap_512x.h	/^} clk512x_t;$/;"	t	typeref:struct:clk512x
clk54	arch/xtensa/dts/xtfpga.dtsi	/^		clk54: clk54 {$/;"	l
clk5_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 clk5_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
clk5_en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 clk5_en;		\/*0x63c*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
clk5_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 clk5_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
clk600	arch/arm/dts/zynqmp-clk.dtsi	/^	clk600: clk600 {$/;"	l
clk83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct clk83xx {$/;"	s
clk83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} clk83xx_t;$/;"	t	typeref:struct:clk83xx
clk8_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk8_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk8_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk8_en;		\/*0x240*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk8_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk8_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk9_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk9_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk9_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk9_en;		\/*0x250*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk9_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clk9_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clk_1wire	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 clk_1wire;		\/* 0x050 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
clk_1wire	arch/arm/include/asm/arch/prcm.h	/^	u32 clk_1wire;		\/* 0x050 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
clk_24mhz	arch/arm/dts/am33xx-clocks.dtsi	/^	clk_24mhz: clk_24mhz {$/;"	l
clk_24mhz	arch/arm/dts/am43xx-clocks.dtsi	/^	clk_24mhz: clk_24mhz {$/;"	l
clk_24mhz_clkdm	arch/arm/dts/am33xx-clocks.dtsi	/^	clk_24mhz_clkdm: clk_24mhz_clkdm {$/;"	l
clk_32768_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	clk_32768_ck: clk_32768_ck {$/;"	l
clk_32768_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	clk_32768_ck: clk_32768_ck {$/;"	l
clk_32k	arch/arm/dts/tegra20-whistler.dts	/^			clk_32k: clock {$/;"	l
clk_32k_mosc_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	clk_32k_mosc_ck: clk_32k_mosc_ck {$/;"	l
clk_32k_rtc	arch/arm/dts/am437x-idk-evm.dts	/^	clk_32k_rtc: clk_32k_rtc {$/;"	l
clk_32k_tpm_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	clk_32k_tpm_ck: clk_32k_tpm_ck {$/;"	l
clk_621_true	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 clk_621_true; \/* 0x1c4 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
clk_access	include/ddr_spd.h	/^	unsigned char clk_access;  \/* 10 SDRAM Access from Clk @ CL=X (tAC) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
clk_access	include/ddr_spd.h	/^	unsigned char clk_access;  \/* 10 SDRAM Access from Clk @ CL=X (tAC) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
clk_access	include/spd.h	/^	unsigned char clk_access;  \/* 10 SDRAM Access from Clock at CL=X *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
clk_access2	include/ddr_spd.h	/^	unsigned char clk_access2; \/* 24 SDRAM Access from Clk @ CL=X-1 (tAC) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
clk_access2	include/ddr_spd.h	/^	unsigned char clk_access2; \/* 24 SDRAM Access from$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
clk_access2	include/spd.h	/^	unsigned char clk_access2; \/* 24 SDRAM Access from Clock at CL=X-1 *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
clk_access3	include/ddr_spd.h	/^	unsigned char clk_access3; \/* 26 Max Access from Clk @ CL=X-1 (tAC) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
clk_access3	include/ddr_spd.h	/^	unsigned char clk_access3; \/* 26 Max Access from Clk @ CL=X-2 (tAC) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
clk_access3	include/spd.h	/^	unsigned char clk_access3; \/* 26 Max Access from Clock at CL=X-2 *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
clk_act	drivers/mtd/nand/mxc_nand.c	/^	int				clk_act;$/;"	m	struct:mxc_nand_host	typeref:typename:int	file:
clk_adjust	board/freescale/b4860qds/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/corenet_ds/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/ls1021aqds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls1043aqds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls1043ardb/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls1046aqds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls1046ardb/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls2080a/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls2080aqds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/ls2080ardb/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/mpc8349emds/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/mpc8572ds/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/mpc8641hpcn/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/p1022ds/ddr.c	/^	u32 clk_adjust;		\/* Range: 0-8 *\/$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/p2041rdb/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/t102xqds/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/t102xrdb/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/freescale/t1040qds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/t104xrdb/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/t208xqds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/t208xrdb/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/t4qds/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/freescale/t4rdb/ddr.h	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
clk_adjust	board/varisys/cyrus/ddr.c	/^	u32 clk_adjust;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
clk_adjust	board/xes/xpedite517x/ddr.c	/^	uint8_t clk_adjust;$/;"	m	struct:board_memctl_options	typeref:typename:uint8_t	file:
clk_adjust	board/xes/xpedite537x/ddr.c	/^	uint8_t clk_adjust;$/;"	m	struct:board_memctl_options	typeref:typename:uint8_t	file:
clk_adjust	board/xes/xpedite550x/ddr.c	/^	unsigned char clk_adjust;$/;"	m	struct:__anon6cdf34da0108	typeref:typename:unsigned char	file:
clk_adjust	include/fsl_ddr_sdram.h	/^	unsigned int clk_adjust;		\/* *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
clk_afi	drivers/pci/pci_tegra.c	/^	struct clk clk_afi;$/;"	m	struct:tegra_pcie	typeref:struct:clk	file:
clk_and_reset	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct clk_and_reset {$/;"	s
clk_and_reset	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct clk_and_reset {$/;"	s
clk_and_reset	arch/powerpc/include/asm/immap_8260.h	/^typedef struct clk_and_reset {$/;"	s
clk_base	board/freescale/common/qixis.h	/^	u8 clk_base[2];	\/* Clock Frequency Base Reg *\/$/;"	m	struct:qixis	typeref:typename:u8[2]
clk_bcr_update	arch/arm/mach-snapdragon/clock-apq8016.c	/^static void clk_bcr_update(phys_addr_t apps_cmd_rgcr)$/;"	f	typeref:typename:void	file:
clk_bit_info	arch/arm/mach-exynos/clock.c	/^struct clk_bit_info {$/;"	s	file:
clk_boston	arch/mips/dts/img,boston.dts	/^	clk_boston: clock {$/;"	l
clk_boston	drivers/clk/clk_boston.c	/^struct clk_boston {$/;"	s	file:
clk_boston_get_rate	drivers/clk/clk_boston.c	/^static ulong clk_boston_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
clk_boston_match	drivers/clk/clk_boston.c	/^static const struct udevice_id clk_boston_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
clk_boston_ofdata_to_platdata	drivers/clk/clk_boston.c	/^static int clk_boston_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
clk_boston_ops	drivers/clk/clk_boston.c	/^const struct clk_ops clk_boston_ops = {$/;"	v	typeref:typename:const struct clk_ops
clk_bsc_enable	arch/arm/cpu/armv7/bcm235xx/clk-bsc.c	/^int clk_bsc_enable(void *base)$/;"	f	typeref:typename:int
clk_bsc_enable	arch/arm/cpu/armv7/bcm281xx/clk-bsc.c	/^int clk_bsc_enable(void *base)$/;"	f	typeref:typename:int
clk_bsc_enable	arch/arm/cpu/armv7/kona-common/clk-stubs.c	/^int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)$/;"	f	typeref:typename:int __weak
clk_bus	include/api_public.h	/^	unsigned long		clk_bus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
clk_ccgr_index	arch/arm/include/asm/arch-mx7/clock.h	/^enum clk_ccgr_index {$/;"	g
clk_cntl_index	drivers/video/ati_radeon_fb.h	/^	u32		clk_cntl_index;$/;"	m	struct:radeon_regs	typeref:typename:u32
clk_cpu	include/api_public.h	/^	unsigned long		clk_cpu;$/;"	m	struct:sys_info	typeref:typename:unsigned long
clk_ctrl	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 clk_ctrl;	\/* Timer clk control reg *\/$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
clk_ctrl	drivers/spi/ti_qspi.c	/^	u32 clk_ctrl;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
clk_cycle	drivers/i2c/s3c24x0_i2c.h	/^	unsigned clk_cycle;$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:unsigned
clk_cycle	include/ddr_spd.h	/^	unsigned char clk_cycle;   \/*  9 SDRAM Cycle time @ CL=X *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
clk_cycle	include/ddr_spd.h	/^	unsigned char clk_cycle;   \/*  9 SDRAM Cycle time @ CL=X *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
clk_cycle	include/spd.h	/^	unsigned char clk_cycle;   \/*  9 SDRAM Cycle time at CL=X *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
clk_cycle2	include/ddr_spd.h	/^	unsigned char clk_cycle2;  \/* 23 Min SDRAM Cycle time @ CL=X-0.5 *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
clk_cycle2	include/ddr_spd.h	/^	unsigned char clk_cycle2;  \/* 23 Min SDRAM Cycle time @ CL=X-1 *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
clk_cycle2	include/spd.h	/^	unsigned char clk_cycle2;  \/* 23 Min SDRAM Cycle time at CL=X-1 *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
clk_cycle3	include/ddr_spd.h	/^	unsigned char clk_cycle3;  \/* 25 Min SDRAM Cycle time @ CL=X-1 *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
clk_cycle3	include/ddr_spd.h	/^	unsigned char clk_cycle3;  \/* 25 Min SDRAM Cycle time @ CL=X-2 *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
clk_cycle3	include/spd.h	/^	unsigned char clk_cycle3;  \/* 25 Min SDRAM Cycle time at CL=X-2 *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
clk_dev_ops	drivers/clk/clk-uclass.c	/^static inline struct clk_ops *clk_dev_ops(struct udevice *dev)$/;"	f	typeref:struct:clk_ops *	file:
clk_disable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^void clk_disable(struct clk *c)$/;"	f	typeref:typename:void
clk_disable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^void clk_disable(struct clk *c)$/;"	f	typeref:typename:void
clk_disable	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_disable_request clk_disable;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_disable_request
clk_disable	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_disable_response clk_disable;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_disable_response
clk_disable	drivers/clk/clk-uclass.c	/^int clk_disable(struct clk *clk)$/;"	f	typeref:typename:int
clk_disable	drivers/video/ipu_common.c	/^void clk_disable(struct clk *clk)$/;"	f	typeref:typename:void
clk_div	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 clk_div;			\/* 6C: I2C_I2C_CLOCK_DIVISOR *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
clk_div	drivers/i2c/s3c24x0_i2c.h	/^	unsigned clk_div;$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:unsigned
clk_dspd	board/freescale/common/qixis.h	/^	u8 clk_dspd[3];$/;"	m	struct:qixis	typeref:typename:u8[3]
clk_e	arch/arm/mach-keystone/include/mach/clock.h	/^enum clk_e {$/;"	g
clk_ena	drivers/video/da8xx-fb.c	/^	u32	clk_ena;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
clk_enable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^int clk_enable(struct clk *c)$/;"	f	typeref:typename:int
clk_enable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^int clk_enable(struct clk *c)$/;"	f	typeref:typename:int
clk_enable	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_enable_request clk_enable;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_enable_request
clk_enable	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_enable_response clk_enable;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_enable_response
clk_enable	drivers/clk/clk-uclass.c	/^int clk_enable(struct clk *clk)$/;"	f	typeref:typename:int
clk_enable	drivers/video/ipu_common.c	/^void clk_enable(struct clk *clk)$/;"	f	typeref:typename:void
clk_enable_cbc	arch/arm/mach-snapdragon/clock-apq8016.c	/^static void clk_enable_cbc(phys_addr_t cbcr)$/;"	f	typeref:typename:void	file:
clk_enable_gpll0	arch/arm/mach-snapdragon/clock-apq8016.c	/^static void clk_enable_gpll0(phys_addr_t base)$/;"	f	typeref:typename:void	file:
clk_eth_enable	arch/arm/cpu/armv7/bcm235xx/clk-eth.c	/^int clk_eth_enable(void)$/;"	f	typeref:typename:int
clk_eth_enable	arch/arm/cpu/armv7/bcm281xx/clk-eth.c	/^int clk_eth_enable(void)$/;"	f	typeref:typename:int
clk_fixed	arch/sandbox/dts/test.dts	/^	clk_fixed: clk-fixed {$/;"	l
clk_fixed_rate	drivers/clk/clk_fixed_rate.c	/^struct clk_fixed_rate {$/;"	s	file:
clk_fixed_rate_get_rate	drivers/clk/clk_fixed_rate.c	/^static ulong clk_fixed_rate_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
clk_fixed_rate_match	drivers/clk/clk_fixed_rate.c	/^static const struct udevice_id clk_fixed_rate_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
clk_fixed_rate_ofdata_to_platdata	drivers/clk/clk_fixed_rate.c	/^static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
clk_fixed_rate_ops	drivers/clk/clk_fixed_rate.c	/^const struct clk_ops clk_fixed_rate_ops = {$/;"	v	typeref:typename:const struct clk_ops
clk_free	drivers/clk/clk-uclass.c	/^int clk_free(struct clk *clk)$/;"	f	typeref:typename:int
clk_freq	board/freescale/common/qixis.h	/^	u8 clk_freq[6];	\/* Clock Measurement Registers *\/$/;"	m	struct:qixis	typeref:typename:u8[6]
clk_gate_ip_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clk_gate_ip_cpu;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clk_get	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^struct clk *clk_get(const char *con_id)$/;"	f	typeref:struct:clk *
clk_get	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^struct clk *clk_get(const char *con_id)$/;"	f	typeref:struct:clk *
clk_get	arch/arm/mach-davinci/cpu.c	/^int clk_get(enum davinci_clk_ids id)$/;"	f	typeref:typename:int
clk_get	board/siemens/pxm2/board.c	/^int clk_get(int clk)$/;"	f	typeref:typename:int
clk_get	board/siemens/rut/board.c	/^int clk_get(int clk)$/;"	f	typeref:typename:int
clk_get_all_info	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_all_info_request clk_get_all_info;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_get_all_info_request
clk_get_all_info	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_all_info_response clk_get_all_info;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_get_all_info_response
clk_get_and_enable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^int clk_get_and_enable(char *clkstr)$/;"	f	typeref:typename:int
clk_get_and_enable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^int clk_get_and_enable(char *clkstr)$/;"	f	typeref:typename:int
clk_get_by_index	drivers/clk/clk-uclass.c	/^int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)$/;"	f	typeref:typename:int
clk_get_by_index	include/clk.h	/^static inline int clk_get_by_index(struct udevice *dev, int index,$/;"	f	typeref:typename:int
clk_get_by_index_platdata	drivers/clk/clk-uclass.c	/^int clk_get_by_index_platdata(struct udevice *dev, int index,$/;"	f	typeref:typename:int
clk_get_by_name	drivers/clk/clk-uclass.c	/^int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)$/;"	f	typeref:typename:int
clk_get_by_name	include/clk.h	/^static inline int clk_get_by_name(struct udevice *dev, const char *name,$/;"	f	typeref:typename:int
clk_get_cpu_rate	arch/mips/mach-pic32/cpu.c	/^static ulong clk_get_cpu_rate(void)$/;"	f	typeref:typename:ulong	file:
clk_get_divider	arch/arm/mach-tegra/clock.c	/^static int clk_get_divider(unsigned divider_bits, unsigned long parent_rate,$/;"	f	typeref:typename:int	file:
clk_get_divisor	arch/arm/include/asm/arch-rockchip/clock.h	/^static inline u32 clk_get_divisor(ulong input_rate, uint output_rate)$/;"	f	typeref:typename:u32
clk_get_max_clk_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_max_clk_id_request clk_get_max_clk_id;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_get_max_clk_id_request
clk_get_max_clk_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_max_clk_id_response clk_get_max_clk_id;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_get_max_clk_id_response
clk_get_parent	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_parent_request clk_get_parent;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_get_parent_request
clk_get_parent	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_parent_response clk_get_parent;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_get_parent_response
clk_get_parent	drivers/video/ipu_common.c	/^struct clk *clk_get_parent(struct clk *clk)$/;"	f	typeref:struct:clk *
clk_get_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^unsigned long clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long
clk_get_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^unsigned long clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long
clk_get_rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_rate_request clk_get_rate;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_get_rate_request
clk_get_rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_get_rate_response clk_get_rate;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_get_rate_response
clk_get_rate	drivers/clk/clk-uclass.c	/^ulong clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong
clk_get_rate	drivers/video/ipu_common.c	/^u32 clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:u32
clk_get_usecount	drivers/video/ipu_common.c	/^int clk_get_usecount(struct clk *clk)$/;"	f	typeref:typename:int
clk_gpio	board/nokia/rx51/tag_omap.h	/^	s16 clk_gpio;$/;"	m	struct:omap_cbus_config	typeref:typename:s16
clk_help_text	cmd/clk.c	/^static char clk_help_text[] =$/;"	v	typeref:typename:char[]	file:
clk_hi	drivers/i2c/lpc32xx_i2c.c	/^	u32 clk_hi;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
clk_id	drivers/i2c/omap24xx_i2c.c	/^	int clk_id;$/;"	m	struct:omap_i2c	typeref:typename:int	file:
clk_id_to_periph_id	arch/arm/mach-tegra/tegra114/clock.c	/^enum periph_id clk_id_to_periph_id(int clk_id)$/;"	f	typeref:enum:periph_id
clk_id_to_periph_id	arch/arm/mach-tegra/tegra124/clock.c	/^enum periph_id clk_id_to_periph_id(int clk_id)$/;"	f	typeref:enum:periph_id
clk_id_to_periph_id	arch/arm/mach-tegra/tegra20/clock.c	/^enum periph_id clk_id_to_periph_id(int clk_id)$/;"	f	typeref:enum:periph_id
clk_id_to_periph_id	arch/arm/mach-tegra/tegra210/clock.c	/^enum periph_id clk_id_to_periph_id(int clk_id)$/;"	f	typeref:enum:periph_id
clk_id_to_periph_id	arch/arm/mach-tegra/tegra30/clock.c	/^enum periph_id clk_id_to_periph_id(int clk_id)$/;"	f	typeref:enum:periph_id
clk_in_26m	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong clk_in_26m(void)$/;"	f	typeref:typename:ulong	file:
clk_in_32k	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong clk_in_32k(void)$/;"	f	typeref:typename:ulong	file:
clk_index	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u8 clk_index;		\/* current selected index in parent_sel[] *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u8
clk_index	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u8 clk_index;		\/* current selected index in parent_sel[] *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u8
clk_init	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^int clk_init(void)$/;"	f	typeref:typename:int
clk_init	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^int clk_init(void)$/;"	f	typeref:typename:int
clk_init	arch/avr32/cpu/at32ap700x/clk.c	/^void clk_init(void)$/;"	f	typeref:typename:void
clk_init_sdc	arch/arm/mach-snapdragon/clock-apq8016.c	/^static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)$/;"	f	typeref:typename:int	file:
clk_init_uart	arch/arm/mach-snapdragon/clock-apq8016.c	/^static int clk_init_uart(struct msm_clk_priv *priv)$/;"	f	typeref:typename:int	file:
clk_ipu_disable	drivers/video/ipu_common.c	/^static void clk_ipu_disable(struct clk *clk)$/;"	f	typeref:typename:void	file:
clk_ipu_enable	drivers/video/ipu_common.c	/^static int clk_ipu_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
clk_ir	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 clk_ir;		\/* 0x054 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
clk_ir	arch/arm/include/asm/arch/prcm.h	/^	u32 clk_ir;		\/* 0x054 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
clk_is_enabled	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_is_enabled_request clk_is_enabled;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_is_enabled_request
clk_is_enabled	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_is_enabled_response clk_is_enabled;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_is_enabled_response
clk_lo	drivers/i2c/lpc32xx_i2c.c	/^	u32 clk_lo;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
clk_lookup	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct clk_lookup {$/;"	s
clk_lookup	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct clk_lookup {$/;"	s
clk_m_get_rate	arch/arm/mach-tegra/clock.c	/^unsigned int __weak clk_m_get_rate(unsigned int parent_rate)$/;"	f	typeref:typename:unsigned int __weak
clk_m_get_rate	arch/arm/mach-tegra/tegra210/clock.c	/^unsigned int clk_m_get_rate(unsigned parent_rate)$/;"	f	typeref:typename:unsigned int
clk_master_bus	drivers/net/dwc_eth_qos.c	/^	struct clk clk_master_bus;$/;"	m	struct:eqos_priv	typeref:struct:clk	file:
clk_max	arch/arm/mach-zynq/include/mach/clk.h	/^	smc_aper_clk, swdt_clk, dbg_trc_clk, dbg_apb_clk, clk_max};$/;"	e	enum:zynq_clk
clk_max_div	drivers/i2c/at91_i2c.h	/^	unsigned clk_max_div;$/;"	m	struct:at91_i2c_pdata	typeref:typename:unsigned
clk_misc0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t clk_misc0;			\/* offset 0x0170 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
clk_misc0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t clk_misc0_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
clk_misc0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t clk_misc0_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
clk_misc0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t clk_misc0_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
clk_mode	drivers/serial/serial_sh.h	/^	enum sh_clk_mode clk_mode;	\/* clock mode *\/$/;"	m	struct:uart_port	typeref:enum:sh_clk_mode
clk_mode	include/dm/platform_data/serial_sh.h	/^	enum sh_clk_mode clk_mode;$/;"	m	struct:sh_serial_platdata	typeref:enum:sh_clk_mode
clk_mul	include/sdhci.h	/^	unsigned int clk_mul;   \/* Clock Multiplier value *\/$/;"	m	struct:sdhci_host	typeref:typename:unsigned int
clk_of_xlate_default	drivers/clk/clk-uclass.c	/^static int clk_of_xlate_default(struct clk *clk,$/;"	f	typeref:typename:int	file:
clk_off	drivers/usb/gadget/at91_udc.c	/^static void clk_off(struct at91_udc *udc)$/;"	f	typeref:typename:void	file:
clk_offset	drivers/i2c/at91_i2c.h	/^	unsigned clk_offset;$/;"	m	struct:at91_i2c_pdata	typeref:typename:unsigned
clk_on	drivers/usb/gadget/at91_udc.c	/^static void clk_on(struct at91_udc *udc)$/;"	f	typeref:typename:void	file:
clk_ops	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct clk_ops {$/;"	s
clk_ops	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct clk_ops {$/;"	s
clk_ops	include/clk-uclass.h	/^struct clk_ops {$/;"	s
clk_out_a	arch/arm/dts/sun7i-a20.dtsi	/^		clk_out_a: clk@01c201f0 {$/;"	l
clk_out_a_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			clk_out_a_pins_a: clk_out_a@0 {$/;"	l	label:pio
clk_out_b	arch/arm/dts/sun7i-a20.dtsi	/^		clk_out_b: clk@01c201f4 {$/;"	l
clk_out_b_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			clk_out_b_pins_a: clk_out_b@0 {$/;"	l	label:pio
clk_outd	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 clk_outd;		\/* 0x0f0 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
clk_outd	arch/arm/include/asm/arch/prcm.h	/^	u32 clk_outd;		\/* 0x0f0 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
clk_output_a	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 clk_output_a;	\/* 0x180 clk_output_a *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
clk_output_a	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 clk_output_a;	\/* 0x180 clk_output_a *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
clk_output_b	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 clk_output_b;	\/* 0x184 clk_output_a *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
clk_output_b	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 clk_output_b;	\/* 0x184 clk_output_a *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
clk_pex	drivers/pci/pci_tegra.c	/^	struct clk clk_pex;$/;"	m	struct:tegra_pcie	typeref:struct:clk	file:
clk_pin_capacitance_typ	include/linux/mtd/nand.h	/^	__le16 clk_pin_capacitance_typ;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
clk_pin_capacitance_typ	include/linux/mtd/nand.h	/^	__le16 clk_pin_capacitance_typ;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
clk_pll	arch/arm/include/asm/arch-tegra/clk_rst.h	/^struct clk_pll {$/;"	s
clk_pll_info	arch/arm/include/asm/arch-tegra/clock.h	/^struct clk_pll_info {$/;"	s
clk_pll_simple	arch/arm/include/asm/arch-tegra/clk_rst.h	/^struct clk_pll_simple {$/;"	s
clk_pll_table	arch/arm/mach-tegra/cpu.h	/^struct clk_pll_table {$/;"	s
clk_pllm	arch/arm/include/asm/arch-tegra/clk_rst.h	/^struct clk_pllm {$/;"	s
clk_pm_regs	arch/arm/include/asm/arch-lpc32xx/clk.h	/^struct clk_pm_regs {$/;"	s
clk_pol	drivers/video/ipu.h	/^	unsigned clk_pol:1;	\/* true = rising edge *\/$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
clk_ptp_ref	drivers/net/dwc_eth_qos.c	/^	struct clk clk_ptp_ref;$/;"	m	struct:eqos_priv	typeref:struct:clk	file:
clk_pwr	drivers/usb/host/ohci-lpc32xx.c	/^static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE;$/;"	v	typeref:struct:clk_pm_regs *	file:
clk_rate	drivers/mmc/mxcmmc.c	/^	u32 clk_rate;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
clk_rate	drivers/mtd/nand/sunxi_nand.c	/^	unsigned long clk_rate;$/;"	m	struct:sunxi_nand_chip	typeref:typename:unsigned long	file:
clk_rate	drivers/mtd/nand/sunxi_nand.c	/^	unsigned long clk_rate;$/;"	m	struct:sunxi_nfc	typeref:typename:unsigned long	file:
clk_rate	drivers/spi/pic32_spi.c	/^	ulong			clk_rate;$/;"	m	struct:pic32_spi_priv	typeref:typename:ulong	file:
clk_rc32k_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	clk_rc32k_ck: clk_rc32k_ck {$/;"	l
clk_rc32k_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	clk_rc32k_ck: clk_rc32k_ck {$/;"	l
clk_rcg_set_rate_mnd	arch/arm/mach-snapdragon/clock-apq8016.c	/^static void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,$/;"	f	typeref:typename:void	file:
clk_request	drivers/clk/clk-uclass.c	/^int clk_request(struct udevice *dev, struct clk *clk)$/;"	f	typeref:typename:int
clk_reset	drivers/video/da8xx-fb.c	/^	u32	clk_reset;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
clk_root_index	arch/arm/include/asm/arch-mx7/clock.h	/^enum clk_root_index {$/;"	g
clk_root_map	arch/arm/include/asm/arch-mx7/clock.h	/^struct clk_root_map {$/;"	s
clk_root_setting	arch/arm/include/asm/arch-mx7/clock.h	/^struct clk_root_setting {$/;"	s
clk_root_src	arch/arm/include/asm/arch-mx7/clock.h	/^enum clk_root_src {$/;"	g
clk_root_type	arch/arm/include/asm/arch-mx7/clock.h	/^enum clk_root_type {$/;"	g
clk_round_rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_round_rate_request clk_round_rate;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_round_rate_request
clk_round_rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_round_rate_response clk_round_rate;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_round_rate_response
clk_round_rate	drivers/video/ipu_common.c	/^long clk_round_rate(struct clk *clk, unsigned long rate)$/;"	f	typeref:typename:long
clk_rst_ctlr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^struct clk_rst_ctlr {$/;"	s
clk_rsvd	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t clk_rsvd;			\/* offset 0x0180 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
clk_rx	drivers/net/dwc_eth_qos.c	/^	struct clk clk_rx;$/;"	m	struct:eqos_priv	typeref:struct:clk	file:
clk_sandbox	arch/sandbox/dts/test.dts	/^	clk_sandbox: clk-sbox {$/;"	l
clk_sdio_enable	arch/arm/cpu/armv7/bcm235xx/clk-sdio.c	/^int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)$/;"	f	typeref:typename:int
clk_sdio_enable	arch/arm/cpu/armv7/bcm281xx/clk-sdio.c	/^int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)$/;"	f	typeref:typename:int
clk_sdio_enable	arch/arm/cpu/armv7/kona-common/clk-stubs.c	/^int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)$/;"	f	typeref:typename:int __weak
clk_set_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^struct clk_set_clr {$/;"	s
clk_set_parent	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_set_parent_request clk_set_parent;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_set_parent_request
clk_set_parent	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_set_parent_response clk_set_parent;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_set_parent_response
clk_set_parent	drivers/video/ipu_common.c	/^int clk_set_parent(struct clk *clk, struct clk *parent)$/;"	f	typeref:typename:int
clk_set_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^int clk_set_rate(struct clk *c, unsigned long rate)$/;"	f	typeref:typename:int
clk_set_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^int clk_set_rate(struct clk *c, unsigned long rate)$/;"	f	typeref:typename:int
clk_set_rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_set_rate_request clk_set_rate;$/;"	m	union:mrq_clk_request::__anonb38d4241050a	typeref:struct:cmd_clk_set_rate_request
clk_set_rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_clk_set_rate_response clk_set_rate;$/;"	m	union:mrq_clk_response::__anonb38d4241060a	typeref:struct:cmd_clk_set_rate_response
clk_set_rate	drivers/clk/clk-uclass.c	/^ulong clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong
clk_set_rate	drivers/video/ipu_common.c	/^int clk_set_rate(struct clk *clk, unsigned long rate)$/;"	f	typeref:typename:int
clk_slave_bus	drivers/net/dwc_eth_qos.c	/^	struct clk clk_slave_bus;$/;"	m	struct:eqos_priv	typeref:struct:clk	file:
clk_spd	board/freescale/common/qixis.h	/^	u8 clk_spd;$/;"	m	struct:qixis	typeref:typename:u8
clk_spd2	board/freescale/common/qixis.h	/^	u8 clk_spd2[2];  \/* SYSCLK clock Speed Register,0x30 *\/$/;"	m	struct:qixis	typeref:typename:u8[2]
clk_src	drivers/phy/marvell/comphy.h	/^	bool clk_src;$/;"	m	struct:comphy_map	typeref:typename:bool
clk_synth	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^struct clk_synth {$/;"	s
clk_synthesizer_reg_read	arch/arm/cpu/armv7/am33xx/clk_synthesizer.c	/^static int clk_synthesizer_reg_read(int addr, uint8_t *buf)$/;"	f	typeref:typename:int	file:
clk_synthesizer_reg_write	arch/arm/cpu/armv7/am33xx/clk_synthesizer.c	/^static int clk_synthesizer_reg_write(int addr, uint8_t val)$/;"	f	typeref:typename:int	file:
clk_tx	drivers/net/dwc_eth_qos.c	/^	struct clk clk_tx;$/;"	m	struct:eqos_priv	typeref:struct:clk	file:
clk_usb_otg_enable	arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c	/^int clk_usb_otg_enable(void *base)$/;"	f	typeref:typename:int
clk_usb_otg_enable	arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c	/^int clk_usb_otg_enable(void *base)$/;"	f	typeref:typename:int
clk_usb_otg_enable	arch/arm/cpu/armv7/kona-common/clk-stubs.c	/^int __weak clk_usb_otg_enable(void *base)$/;"	f	typeref:typename:int __weak
clkaemif	arch/arm/dts/keystone-clocks.dtsi	/^	clkaemif: clkaemif {$/;"	l
clkaemifspi	arch/arm/dts/keystone-clocks.dtsi	/^	clkaemifspi: clkaemifspi {$/;"	l
clkaif	arch/arm/dts/k2hk-clocks.dtsi	/^	clkaif: clkaif {$/;"	l
clkbcp	arch/arm/dts/k2hk-clocks.dtsi	/^	clkbcp: clkbcp {$/;"	l
clkbcp	arch/arm/dts/k2l-clocks.dtsi	/^	clkbcp: clkbcp {$/;"	l
clkc	arch/arm/dts/dragonboard410c.dts	/^		clkc: qcom,gcc@1800000 {$/;"	l
clkc	arch/arm/dts/meson-gxbb.dtsi	/^			clkc: clock-controller@0 {$/;"	l	label:hiubus
clkc	arch/arm/dts/zynq-7000.dtsi	/^			clkc: clkc@100 {$/;"	l	label:amba.slcr
clkc_enable	drivers/video/am335x-fb.c	/^	unsigned int		clkc_enable;		\/* 0x6C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
clkc_reset	drivers/video/am335x-fb.c	/^	unsigned int		clkc_reset;		\/* 0x70 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
clkcfg8bit1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clkcfg8bit1;	\/*0x494*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clkcfg8bit2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 clkcfg8bit2;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
clkcghwacsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 clkcghwacsr; \/* Clock generator n hardware accelerator *\/$/;"	m	struct:ccsr_clk::__anon245f04be0208	typeref:typename:u32
clkcgnhwacsr	arch/powerpc/include/asm/immap_85xx.h	/^		u32 clkcgnhwacsr;\/* clock generator n hardware accelerator *\/$/;"	m	struct:ccsr_clk::__anondcd7518a0408	typeref:typename:u32
clkcncsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 clkcncsr;	\/* core cluster n clock control status *\/$/;"	m	struct:ccsr_clk::__anon245f04be0208	typeref:typename:u32
clkcncsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	} clkcncsr[8];$/;"	m	struct:ccsr_clk_ctrl	typeref:struct:ccsr_clk_ctrl::__anon245f08ff0408[8]
clkcncsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 clkcncsr;	\/* core cluster n clock control status *\/$/;"	m	struct:ccsr_clk::__anon58ea331d0208	typeref:typename:u32
clkcncsr	arch/powerpc/include/asm/immap_85xx.h	/^		u32 clkcncsr;	\/* core cluster n clock control status *\/$/;"	m	struct:ccsr_clk::__anondcd7518a0408	typeref:typename:u32
clkcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	clkcon;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
clkcon	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	clkcon;		\/* _CLOCK_CONTROL_0 15:00 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
clkconfig	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkconfig;$/;"	m	struct:pwmss_regs	typeref:typename:unsigned int
clkcpgmac	arch/arm/dts/keystone-clocks.dtsi	/^	clkcpgmac: clkcpgmac {$/;"	l
clkcr	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 clkcr;		\/* 0x04 clock control *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
clkcr	arch/arm/include/asm/arch/mmc.h	/^	u32 clkcr;		\/* 0x04 clock control *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
clkcsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} clkcsr[4];$/;"	m	struct:ccsr_clk	typeref:struct:ccsr_clk::__anon245f04be0208[4]
clkcsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} clkcsr[2];$/;"	m	struct:ccsr_clk	typeref:struct:ccsr_clk::__anon58ea331d0208[2]
clkcsr	arch/powerpc/include/asm/immap_85xx.h	/^	} clkcsr[12];$/;"	m	struct:ccsr_clk	typeref:struct:ccsr_clk::__anondcd7518a0408[12]
clkctl	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct clkctl {$/;"	s
clkctrl	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int clkctrl;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
clkctrl	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	clkctrl;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
clkctrl_regs	drivers/misc/mxs_ocotp.c	/^static struct mxs_clkctrl_regs *clkctrl_regs =$/;"	v	typeref:struct:mxs_clkctrl_regs *	file:
clkdcoldodpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkdcoldodpllper;	\/* offset 0x614 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkdcoldodpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkdcoldodpllper;	\/* offset 0x7c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkddr30	arch/arm/dts/keystone-clocks.dtsi	/^	clkddr30: clkddr30 {$/;"	l
clkddr31	arch/arm/dts/k2hk-clocks.dtsi	/^	clkddr31: clkddr31 {$/;"	l
clkdebugsstrc	arch/arm/dts/keystone-clocks.dtsi	/^	clkdebugsstrc: clkdebugsstrc {$/;"	l
clkdfeiqnsys	arch/arm/dts/k2l-clocks.dtsi	/^	clkdfeiqnsys: clkdfeiqnsys {$/;"	l
clkdfepd0	arch/arm/dts/k2l-clocks.dtsi	/^	clkdfepd0: clkdfepd0 {$/;"	l
clkdfepd1	arch/arm/dts/k2l-clocks.dtsi	/^	clkdfepd1: clkdfepd1 {$/;"	l
clkdiv	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 clkdiv;$/;"	m	struct:i2c_regs	typeref:typename:u32
clkdiv	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 clkdiv;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
clkdiv	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^#define clkdiv(/;"	d	file:
clkdiv2_ratio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv2_ratio;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv2_stat0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv2_stat0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv32k_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	clkdiv32k_ck: clkdiv32k_ck {$/;"	l
clkdiv32k_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	clkdiv32k_ck: clkdiv32k_ck {$/;"	l
clkdiv32k_ick	arch/arm/dts/am33xx-clocks.dtsi	/^	clkdiv32k_ick: clkdiv32k_ick {$/;"	l
clkdiv32k_ick	arch/arm/dts/am43xx-clocks.dtsi	/^	clkdiv32k_ick: clkdiv32k_ick {$/;"	l
clkdiv4_ratio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv4_ratio;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv4_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv4_stat;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l1_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l1_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l2_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l2_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l3_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l3_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l4_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l4_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l5_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l5_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l6_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l6_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l7;		\/* 0x10011304 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l7_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l7_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l8;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_iem_l8_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkdiv_iem_l8_kfc;		\/* 0x10039300 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkdiv_init	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int clkdiv_init;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
clkdivn	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	clkdivn;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
clkdvdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	clkdvdr;	\/* Clock Divide register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
clkdvdr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	clkdvdr;	\/* 0xe0800 - Clock Divide register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
clkdxb	arch/arm/dts/k2hk-clocks.dtsi	/^	clkdxb: clkdxb {$/;"	l
clken	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 clken;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
clken	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 clken;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
clken	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 clken;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
clken	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 clken;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
clken	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 clken;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
clken	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 clken;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
clken2_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clken2_pll;	        \/* 0xd04 *\/$/;"	m	struct:prcm	typeref:typename:u32
clken_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clken_pll;		\/* 0xd00 *\/$/;"	m	struct:prcm	typeref:typename:u32
clken_pll_iva2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clken_pll_iva2;	\/* 0x04 *\/$/;"	m	struct:prcm	typeref:typename:u32
clken_pll_mpu	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clken_pll_mpu;	\/* 0x904 *\/$/;"	m	struct:prcm	typeref:typename:u32
clkfftc0	arch/arm/dts/k2hk-clocks.dtsi	/^	clkfftc0: clkfftc0 {$/;"	l
clkfftc0	arch/arm/dts/k2l-clocks.dtsi	/^	clkfftc0: clkfftc0 {$/;"	l
clkfftc1	arch/arm/dts/k2hk-clocks.dtsi	/^	clkfftc1: clkfftc1 {$/;"	l
clkfftc1	arch/arm/dts/k2l-clocks.dtsi	/^	clkfftc1: clkfftc1 {$/;"	l
clkfftc2	arch/arm/dts/k2hk-clocks.dtsi	/^	clkfftc2: clkfftc2 {$/;"	l
clkfftc3	arch/arm/dts/k2hk-clocks.dtsi	/^	clkfftc3: clkfftc3 {$/;"	l
clkfftc4	arch/arm/dts/k2hk-clocks.dtsi	/^	clkfftc4: clkfftc4 {$/;"	l
clkfftc5	arch/arm/dts/k2hk-clocks.dtsi	/^	clkfftc5: clkfftc5 {$/;"	l
clkgate_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 clkgate_con[35];$/;"	m	struct:rk3399_cru	typeref:typename:u32[35]
clkgem0	arch/arm/dts/keystone-clocks.dtsi	/^	clkgem0: clkgem0 {$/;"	l
clkgem1	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem1: clkgem1 {$/;"	l
clkgem1	arch/arm/dts/k2l-clocks.dtsi	/^	clkgem1: clkgem1 {$/;"	l
clkgem2	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem2: clkgem2 {$/;"	l
clkgem2	arch/arm/dts/k2l-clocks.dtsi	/^	clkgem2: clkgem2 {$/;"	l
clkgem3	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem3: clkgem3 {$/;"	l
clkgem3	arch/arm/dts/k2l-clocks.dtsi	/^	clkgem3: clkgem3 {$/;"	l
clkgem4	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem4: clkgem4 {$/;"	l
clkgem5	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem5: clkgem5 {$/;"	l
clkgem6	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem6: clkgem6 {$/;"	l
clkgem7	arch/arm/dts/k2hk-clocks.dtsi	/^	clkgem7: clkgem7 {$/;"	l
clkgpio	arch/arm/dts/keystone-clocks.dtsi	/^	clkgpio: clkgpio {$/;"	l
clkhyperlink0	arch/arm/dts/k2e-clocks.dtsi	/^	clkhyperlink0: clkhyperlink0 {$/;"	l
clkhyperlink0	arch/arm/dts/k2hk-clocks.dtsi	/^	clkhyperlink0: clkhyperlink0 {$/;"	l
clkhyperlink1	arch/arm/dts/k2hk-clocks.dtsi	/^	clkhyperlink1: clkhyperlink1 {$/;"	l
clki2c	arch/arm/dts/keystone-clocks.dtsi	/^	clki2c: clki2c {$/;"	l
clkid_2_register	arch/arm/mach-zynq/clk.c	/^static u32 *clkid_2_register(enum zynq_clk id)$/;"	f	typeref:typename:u32 *	file:
clkidle_en	drivers/video/ipu.h	/^	unsigned clkidle_en:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
clkin	include/linux/usb/musb.h	/^	unsigned char   clkin;$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned char
clkiqnail	arch/arm/dts/k2l-clocks.dtsi	/^	clkiqnail: clkiqnail {$/;"	l
clkkeymgr	arch/arm/dts/keystone-clocks.dtsi	/^	clkkeymgr: clkkeymgr {$/;"	l
clklcdcpixelclk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clklcdcpixelclk;	\/* offset 0x34 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clkmoddpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllcore;	\/* offset 0x520 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllcore;	\/* offset 0x90 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllddr;	\/* offset 0x5A0 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllddr;	\/* offset 0x94 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddplldisp	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddplldisp;	\/* offset 0x620 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddplldisp	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddplldisp;	\/* offset 0x98 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllmpu;	\/* offset 0x560 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllmpu;	\/* offset 0x88 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllper;	\/* offset 0x5E0 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmoddpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkmoddpllper;	\/* offset 0x8c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkmode	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 clkmode;		\/* Clock Mode Register		*\/$/;"	m	struct:uart_ctrl_regs	typeref:typename:u32
clkmodrst0	arch/arm/dts/keystone-clocks.dtsi	/^	clkmodrst0: clkmodrst0 {$/;"	l
clkocr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	clkocr;		\/* Clock out select *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
clkocr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	clkocr;		\/* 0xe0e00 - Clock out select register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
clkosr	arch/arm/dts/k2l-clocks.dtsi	/^	clkosr: clkosr {$/;"	l
clkout	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	clkout;		\/* 0x24 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
clkout2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	clkout2_ck: clkout2_ck {$/;"	l
clkout2_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	clkout2_clk: clkout2_clk {$/;"	l
clkout2_div_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	clkout2_div_ck: clkout2_div_ck {$/;"	l
clkout2_pin	arch/arm/dts/am335x-bone-common.dtsi	/^	clkout2_pin: pinmux_clkout2_pin {$/;"	l
clkout2_pin	arch/arm/dts/am335x-evm.dts	/^	clkout2_pin: pinmux_clkout2_pin {$/;"	l
clkout2_pin	arch/arm/dts/am335x-evmsk.dts	/^	clkout2_pin: pinmux_clkout2_pin {$/;"	l
clkout2_pin	arch/arm/dts/am335x-pxm2.dtsi	/^	clkout2_pin: pinmux_clkout2_pin {$/;"	l
clkout2_pin	arch/arm/dts/am335x-rut.dts	/^	clkout2_pin: pinmux_clkout2_pin {$/;"	l
clkout_cmu_acp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_acp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_acp_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_acp_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cdrex;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cdrex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_cdrex_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cdrex_div_stat;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_cdrex_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cdrex_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_core	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_core;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_core_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_core_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_cperi	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cperi;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_cperi_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cperi_div_stat;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu;		\/* 0x10010a00 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_cmu_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_cpu_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu_div_stat;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_cmu_cpu_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu_div_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_cpu_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu_div_stat;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_cpu_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_cpu_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_dmc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_cmu_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_dmc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_dmc_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_dmc_div_stat;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_cmu_dmc_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_dmc_div_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_g2d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_g2d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_g2d_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_g2d_div_stat;	\/* 0x10018a04 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_isp;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_isp;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_isp_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_isp_div_stat;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_isp_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_isp_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_ispd_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_ispd_div_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_kfc_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_kfc_div_stat;	\/* 0x10038a04 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_lex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_lex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_lex_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_lex_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_r0x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_r0x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_r0x_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_r0x_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_r1x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_r1x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_r1x_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_r1x_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_cmu_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_cmu_top_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top_div_stat;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_cmu_top_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top_div_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_cmu_top_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top_div_stat;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_cmu_top_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_cmu_top_div_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
clkout_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_leftbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_leftbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_leftbus_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_leftbus_div_stat;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_leftbus_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_leftbus_div_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_rightbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_rightbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_rightbus_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_rightbus_div_stat;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
clkout_rightbus_div_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_rightbus_div_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
clkout_top_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_top_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_top_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_top_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_top_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_top_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_top_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_top_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkout_top_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	clkout_top_version;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
clkoutmux0_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	clkoutmux0_clk_mux: clkoutmux0_clk_mux {$/;"	l
clkoutmux1_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	clkoutmux1_clk_mux: clkoutmux1_clk_mux {$/;"	l
clkoutmux2_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	clkoutmux2_clk_mux: clkoutmux2_clk_mux {$/;"	l
clkpa	arch/arm/dts/keystone-clocks.dtsi	/^	clkpa: clkpa {$/;"	l
clkpcie	arch/arm/dts/keystone-clocks.dtsi	/^	clkpcie: clkpcie {$/;"	l
clkpcie1	arch/arm/dts/k2e-clocks.dtsi	/^	clkpcie1: clkpcie1 {$/;"	l
clkpcie1	arch/arm/dts/k2l-clocks.dtsi	/^	clkpcie1: clkpcie1 {$/;"	l
clkpcsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	clkpcsr;	\/* 0xa00 Platform clock domain control\/status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
clkpcsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	clkpcsr;	\/* 0xa00 Platform clock domain control\/status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
clkrac	arch/arm/dts/k2l-clocks.dtsi	/^	clkrac: clkrac {$/;"	l
clkrac01	arch/arm/dts/k2hk-clocks.dtsi	/^	clkrac01: clkrac01 {$/;"	l
clkrac23	arch/arm/dts/k2hk-clocks.dtsi	/^	clkrac23: clkrac23 {$/;"	l
clkreq	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int clkreq;$/;"	m	struct:pad_signals	typeref:typename:int
clkrt	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	clkrt;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
clks	arch/arm/dts/imx6qdl.dtsi	/^			clks: ccm@020c4000 {$/;"	l
clks	arch/arm/dts/imx6ull.dtsi	/^			clks: ccm@020c4000 {$/;"	l
clks	arch/arm/mach-zynq/clk.c	/^static struct clk clks[clk_max];$/;"	v	typeref:struct:clk[]	file:
clks	drivers/clk/clk_sandbox_test.c	/^	struct clk clks[SANDBOX_CLK_TEST_ID_COUNT];$/;"	m	struct:sandbox_clk_test	typeref:struct:clk[]	file:
clksa	arch/arm/dts/keystone-clocks.dtsi	/^	clksa: clksa {$/;"	l
clksel	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel;		\/* 0xd40 *\/$/;"	m	struct:prm	typeref:typename:u32
clksel	include/dwmmc.h	/^	void (*clksel)(struct dwmci_host *host);$/;"	m	struct:dwmci_host	typeref:typename:void (*)(struct dwmci_host * host)
clksel1_emu	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel1_emu;	\/* 0x1140 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel1_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel1_pll;	\/* 0xd40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel1_pll_iva2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel1_pll_iva2 ;	\/* 0x40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel1_pll_mpu	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel1_pll_mpu;	\/* 0x940 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel2_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel2_pll;	\/* 0xd44 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel2_pll_iva2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel2_pll_iva2;	\/* 0x44 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel2_pll_mpu	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel2_pll_mpu;	\/* 0x944 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel3_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel3_pll;	\/* 0xd48 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel4_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel4_pll;	\/* 0xd4c *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel5_pll	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel5_pll;	\/* 0xd50 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel_cam	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel_cam;		\/* 0xf40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 clksel_con[108];$/;"	m	struct:rk3399_cru	typeref:typename:u32[108]
clksel_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel_core;	\/* 0xa40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel_dss	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel_dss;		\/* 0xe40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel_en	drivers/video/ipu.h	/^	unsigned clksel_en:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
clksel_gfx	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel_gfx;		\/* 0xb40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel_per	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel_per;		\/* 0x1040 *\/$/;"	m	struct:prcm	typeref:typename:u32
clksel_wkup	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksel_wkup;	\/* 0xc40 *\/$/;"	m	struct:prcm	typeref:typename:u32
clkseldpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllcore;	\/* offset 0x52C *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllcore;	\/* offset 0x68 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllddr;	\/* offset 0x40 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllddr;	\/* offset 0x5AC *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldplldisp	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldplldisp;	\/* offset 0x54 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldplldisp	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldplldisp;	\/* offset 0x62C *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllmpu;	\/* offset 0x2c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllmpu;	\/* offset 0x56c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllper;	\/* offset 0x5EC *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkseldpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkseldpllper;	\/* offset 0x9c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
clkselmacclk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkselmacclk;	\/* offset 0x34 *\/ $/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clkset1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t clkset1;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
clkset2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t clkset2;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
clksetuptime	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 clksetuptime;       \/* 0x0100 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
clkslow	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	clkslow;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
clkspi	arch/arm/dts/keystone-clocks.dtsi	/^	clkspi: clkspi {$/;"	l
clksr	arch/arm/dts/keystone-clocks.dtsi	/^	clksr: clksr {$/;"	l
clksrc_ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clksrc_ctrl;	\/* 0x1270 *\/$/;"	m	struct:prm	typeref:typename:u32
clksrio	arch/arm/dts/k2hk-clocks.dtsi	/^	clksrio: clksrio {$/;"	l
clkstatus	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkstatus;$/;"	m	struct:pwmss_regs	typeref:typename:unsigned int
clkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clkstctrl;		\/* offset 0x4 *\/$/;"	m	struct:cm_rtc	typeref:typename:unsigned int
clktac	arch/arm/dts/k2hk-clocks.dtsi	/^	clktac: clktac {$/;"	l
clktac	arch/arm/dts/k2l-clocks.dtsi	/^	clktac: clktac {$/;"	l
clktcp3d0	arch/arm/dts/k2hk-clocks.dtsi	/^	clktcp3d0: clktcp3d0 {$/;"	l
clktcp3d0	arch/arm/dts/k2l-clocks.dtsi	/^	clktcp3d0: clktcp3d0 {$/;"	l
clktcp3d1	arch/arm/dts/k2hk-clocks.dtsi	/^	clktcp3d1: clktcp3d1 {$/;"	l
clktcp3d1	arch/arm/dts/k2l-clocks.dtsi	/^	clktcp3d1: clktcp3d1 {$/;"	l
clktcp3d2	arch/arm/dts/k2hk-clocks.dtsi	/^	clktcp3d2: clktcp3d2 {$/;"	l
clktcp3d3	arch/arm/dts/k2hk-clocks.dtsi	/^	clktcp3d3: clktcp3d3 {$/;"	l
clktetbtrc	arch/arm/dts/keystone-clocks.dtsi	/^	clktetbtrc: clktetbtrc {$/;"	l
clktimer15	arch/arm/dts/keystone-clocks.dtsi	/^	clktimer15: clktimer15 {$/;"	l
clktimer1clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer1clk;	\/* offset 0x28 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer2clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer2clk;	\/* offset 0x04 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer2clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer2clk;	\/* offset 0x08 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer3clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer3clk;	\/* offset 0x0C *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer4clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer4clk;	\/* offset 0x10 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer5clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer5clk;	\/* offset 0x18 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer6clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer6clk;	\/* offset 0x1C *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktimer7clk	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int clktimer7clk;	\/* offset 0x04 *\/$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
clktr	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 clktr;$/;"	m	struct:sdram_timing_clks	typeref:typename:u32	file:
clktr	arch/powerpc/include/asm/ppc4xx-sdram.h	/^	u32 clktr;$/;"	m	struct:sdram_timing	typeref:typename:u32
clktsip	arch/arm/dts/k2hk-clocks.dtsi	/^	clktsip: clktsip {$/;"	l
clktunectrlstatus	drivers/mmc/fsl_esdhc.c	/^	uint    clktunectrlstatus;$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
clkuart0	arch/arm/dts/keystone-clocks.dtsi	/^	clkuart0: clkuart0 {$/;"	l
clkuart1	arch/arm/dts/keystone-clocks.dtsi	/^	clkuart1: clkuart1 {$/;"	l
clkuart2	arch/arm/dts/k2l-clocks.dtsi	/^	clkuart2: clkuart2 {$/;"	l
clkuart3	arch/arm/dts/k2l-clocks.dtsi	/^	clkuart3: clkuart3 {$/;"	l
clkusb	arch/arm/dts/keystone-clocks.dtsi	/^	clkusb: clkusb {$/;"	l
clkusb1	arch/arm/dts/k2e-clocks.dtsi	/^	clkusb1: clkusb1 {$/;"	l
clkusim	arch/arm/dts/keystone-clocks.dtsi	/^	clkusim: clkusim {$/;"	l
clkvcp0	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp0: clkvcp0 {$/;"	l
clkvcp0	arch/arm/dts/k2l-clocks.dtsi	/^	clkvcp0: clkvcp0 {$/;"	l
clkvcp1	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp1: clkvcp1 {$/;"	l
clkvcp1	arch/arm/dts/k2l-clocks.dtsi	/^	clkvcp1: clkvcp1 {$/;"	l
clkvcp2	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp2: clkvcp2 {$/;"	l
clkvcp2	arch/arm/dts/k2l-clocks.dtsi	/^	clkvcp2: clkvcp2 {$/;"	l
clkvcp3	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp3: clkvcp3 {$/;"	l
clkvcp3	arch/arm/dts/k2l-clocks.dtsi	/^	clkvcp3: clkvcp3 {$/;"	l
clkvcp4	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp4: clkvcp4 {$/;"	l
clkvcp5	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp5: clkvcp5 {$/;"	l
clkvcp6	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp6: clkvcp6 {$/;"	l
clkvcp7	arch/arm/dts/k2hk-clocks.dtsi	/^	clkvcp7: clkvcp7 {$/;"	l
clkwdtimer0	arch/arm/dts/keystone-clocks.dtsi	/^	clkwdtimer0: clkwdtimer0 {$/;"	l
clkwdtimer1	arch/arm/dts/keystone-clocks.dtsi	/^	clkwdtimer1: clkwdtimer1 {$/;"	l
clkwdtimer2	arch/arm/dts/keystone-clocks.dtsi	/^	clkwdtimer2: clkwdtimer2 {$/;"	l
clkwdtimer3	arch/arm/dts/keystone-clocks.dtsi	/^	clkwdtimer3: clkwdtimer3 {$/;"	l
clkxge	arch/arm/dts/k2e-clocks.dtsi	/^	clkxge: clkxge {$/;"	l
clkxge	arch/arm/dts/k2hk-clocks.dtsi	/^	clkxge: clkxge {$/;"	l
clmask0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 clmask0;		\/* 0x1E Current Level Mask *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
cln_mkr	include/jffs2/jffs2.h	/^	__u32 cln_mkr;	\/* clean marker size, 0 = no cleanmarker *\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
clndar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	clndar;		\/* DMA current link descriptor address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
clnk_ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 clnk_ctrl;$/;"	m	struct:dma4_chan	typeref:typename:u32
clo	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 clo;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
clock	arch/arm/dts/exynos4210.dtsi	/^	clock: clock-controller@10030000 {$/;"	l
clock	arch/arm/dts/exynos4x12.dtsi	/^	clock: clock-controller@10030000 {$/;"	l
clock	arch/arm/include/asm/arch-stm32f1/stm32.h	/^enum clock {$/;"	g
clock	arch/arm/include/asm/arch-stm32f4/stm32.h	/^enum clock {$/;"	g
clock	arch/arm/include/asm/arch-stm32f7/stm32.h	/^enum clock {$/;"	g
clock	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 clock;$/;"	m	struct:dram_para	typeref:typename:u32
clock	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 clock;$/;"	m	struct:dram_para	typeref:typename:u32
clock	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 clock;$/;"	m	struct:dram_para	typeref:typename:u32
clock	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 clock;$/;"	m	struct:dram_para	typeref:typename:u32
clock	arch/avr32/include/asm/setup.h	/^		struct tag_clock clock;$/;"	m	union:tag::__anon5c2aea39010a	typeref:struct:tag_clock
clock	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 clock;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
clock	arch/blackfin/include/asm/serial4.h	/^	u32 clock;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
clock	arch/mips/dts/pic32mzda.dtsi	/^	clock: clk@1f801200 {$/;"	l
clock	board/amcc/luan/epld.h	/^    unsigned char  clock;		\/* clock status, PCI-X clock control *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
clock	board/nokia/rx51/tag_omap.h	/^		struct omap_clock_config clock;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_clock_config
clock	drivers/mmc/arm_pl180_mmci.h	/^	u32 clock;		\/* 0x04*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
clock	drivers/mmc/mxcmmc.c	/^	int			clock;$/;"	m	struct:mxcmci_host	typeref:typename:int	file:
clock	drivers/mmc/tegra_mmc.c	/^	unsigned int clock;	\/* Current clock (MHz) *\/$/;"	m	struct:tegra_mmc_priv	typeref:typename:unsigned int	file:
clock	drivers/spi/bfin_spi6xx.c	/^	u32 control, clock;$/;"	m	struct:bfin_spi_slave	typeref:typename:u32	file:
clock	drivers/spi/mvebu_a3700_spi.c	/^	unsigned int clock;$/;"	m	struct:mvebu_spi_platdata	typeref:typename:unsigned int	file:
clock	include/dm/platform_data/serial_bcm283x_mu.h	/^	unsigned int clock;$/;"	m	struct:bcm283x_mu_serial_platdata	typeref:typename:unsigned int
clock	include/dm/platform_data/serial_pl01x.h	/^	unsigned int clock;$/;"	m	struct:pl01x_serial_platdata	typeref:typename:unsigned int
clock	include/dm/platform_data/serial_stm32x7.h	/^	unsigned int clock;$/;"	m	struct:stm32x7_serial_platdata	typeref:typename:unsigned int
clock	include/dwmmc.h	/^	unsigned int clock;$/;"	m	struct:dwmci_host	typeref:typename:unsigned int
clock	include/faraday/ftsdc010.h	/^	unsigned int clock;		\/* Current clock (MHz) *\/$/;"	m	struct:mmc_host	typeref:typename:unsigned int
clock	include/linux/usb/musb.h	/^	const char	*clock;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:const char *
clock	include/mmc.h	/^	uint clock;$/;"	m	struct:mmc	typeref:typename:uint
clock	include/ns16550.h	/^	int clock;$/;"	m	struct:ns16550_platdata	typeref:typename:int
clock	include/sdhci.h	/^	unsigned int clock;$/;"	m	struct:sdhci_host	typeref:typename:unsigned int
clock_1GHz	board/freescale/mx53loco/mx53loco.c	/^static void clock_1GHz(void)$/;"	f	typeref:typename:void	file:
clock_adjust_periph_pll_div	arch/arm/mach-tegra/clock.c	/^unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,$/;"	f	typeref:typename:unsigned
clock_calc_best_scalar	arch/arm/mach-exynos/clock.c	/^static int clock_calc_best_scalar(unsigned int main_scaler_bits,$/;"	f	typeref:typename:int	file:
clock_cfg	include/vsc9953.h	/^	u32	clock_cfg;$/;"	m	struct:vsc9953_dev_gmii_port_mode	typeref:typename:u32
clock_cntl_index	drivers/video/ati_radeon_fb.h	/^	u32		clock_cntl_index;$/;"	m	struct:radeon_regs	typeref:typename:u32
clock_control_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct clock_control_regs {$/;"	s
clock_decode_periph_id	arch/arm/mach-tegra/clock.c	/^int clock_decode_periph_id(const void *blob, int node)$/;"	f	typeref:typename:int
clock_disable	arch/arm/mach-tegra/clock.c	/^void clock_disable(enum periph_id clkid)$/;"	f	typeref:typename:void
clock_early_init	arch/arm/mach-tegra/tegra114/clock.c	/^void clock_early_init(void)$/;"	f	typeref:typename:void
clock_early_init	arch/arm/mach-tegra/tegra124/clock.c	/^void clock_early_init(void)$/;"	f	typeref:typename:void
clock_early_init	arch/arm/mach-tegra/tegra20/clock.c	/^void clock_early_init(void)$/;"	f	typeref:typename:void
clock_early_init	arch/arm/mach-tegra/tegra210/clock.c	/^void clock_early_init(void)$/;"	f	typeref:typename:void
clock_early_init	arch/arm/mach-tegra/tegra30/clock.c	/^void clock_early_init(void)$/;"	f	typeref:typename:void
clock_enable	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_enable(enum clk_ccgr_index index, bool enable)$/;"	f	typeref:typename:int
clock_enable	arch/arm/mach-tegra/clock.c	/^void clock_enable(enum periph_id clkid)$/;"	f	typeref:typename:void
clock_enable	include/mpc5xxx.h	/^	volatile u32	clock_enable;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
clock_enable_coresight	arch/arm/mach-tegra/cpu.c	/^void clock_enable_coresight(int enable)$/;"	f	typeref:typename:void
clock_enables	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 clock_enables;$/;"	m	struct:icc_clock_enables_msg	typeref:typename:u32
clock_enter_limp	arch/m68k/cpu/mcf5227x/speed.c	/^void clock_enter_limp(int lpdiv)$/;"	f	typeref:typename:void
clock_enter_limp	arch/m68k/cpu/mcf5445x/speed.c	/^void clock_enter_limp(int lpdiv)$/;"	f	typeref:typename:void
clock_event	arch/arm/dts/keystone.dtsi	/^		clock_event: timer@22f0000 {$/;"	l
clock_exit_limp	arch/m68k/cpu/mcf5227x/speed.c	/^void clock_exit_limp(void)$/;"	f	typeref:typename:void
clock_exit_limp	arch/m68k/cpu/mcf532x/speed.c	/^int clock_exit_limp(void)$/;"	f	typeref:typename:int
clock_exit_limp	arch/m68k/cpu/mcf5445x/speed.c	/^void clock_exit_limp(void)$/;"	f	typeref:typename:void
clock_external_output	arch/arm/mach-tegra/clock.c	/^int clock_external_output(int clk_id)$/;"	f	typeref:typename:int
clock_flags	arch/avr32/include/asm/setup.h	/^	u32	clock_flags;	\/* Special features *\/$/;"	m	struct:tag_clock	typeref:typename:u32
clock_frequency	drivers/i2c/at91_i2c.h	/^	u32 clock_frequency;$/;"	m	struct:at91_i2c_bus	typeref:typename:u32
clock_frequency	drivers/i2c/s3c24x0_i2c.h	/^	unsigned clock_frequency;$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:unsigned
clock_get	arch/arm/mach-stm32/stm32f1/clock.c	/^unsigned long clock_get(enum clock clck)$/;"	f	typeref:typename:unsigned long
clock_get	arch/arm/mach-stm32/stm32f4/clock.c	/^unsigned long clock_get(enum clock clck)$/;"	f	typeref:typename:unsigned long
clock_get	arch/arm/mach-stm32/stm32f7/clock.c	/^unsigned long clock_get(enum clock clck)$/;"	f	typeref:typename:unsigned long
clock_get_autopostdiv	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_get_autopostdiv(enum clk_root_index clock_id, enum root_auto_div *div,$/;"	f	typeref:typename:int
clock_get_mem_selection	arch/arm/mach-exynos/clock_init_exynos5.c	/^static void clock_get_mem_selection(enum ddr_mode *mem_type,$/;"	f	typeref:typename:void	file:
clock_get_mem_timings	arch/arm/mach-exynos/clock_init_exynos5.c	/^struct mem_timings *clock_get_mem_timings(void)$/;"	f	typeref:struct:mem_timings *
clock_get_mipi_pll	arch/arm/mach-sunxi/clock_sun6i.c	/^unsigned int clock_get_mipi_pll(void)$/;"	f	typeref:typename:unsigned int
clock_get_osc_bypass	arch/arm/mach-tegra/clock.c	/^int clock_get_osc_bypass(void)$/;"	f	typeref:typename:int
clock_get_osc_freq	arch/arm/mach-tegra/tegra114/clock.c	/^enum clock_osc_freq clock_get_osc_freq(void)$/;"	f	typeref:enum:clock_osc_freq
clock_get_osc_freq	arch/arm/mach-tegra/tegra124/clock.c	/^enum clock_osc_freq clock_get_osc_freq(void)$/;"	f	typeref:enum:clock_osc_freq
clock_get_osc_freq	arch/arm/mach-tegra/tegra20/clock.c	/^enum clock_osc_freq clock_get_osc_freq(void)$/;"	f	typeref:enum:clock_osc_freq
clock_get_osc_freq	arch/arm/mach-tegra/tegra210/clock.c	/^enum clock_osc_freq clock_get_osc_freq(void)$/;"	f	typeref:enum:clock_osc_freq
clock_get_osc_freq	arch/arm/mach-tegra/tegra30/clock.c	/^enum clock_osc_freq clock_get_osc_freq(void)$/;"	f	typeref:enum:clock_osc_freq
clock_get_periph_parent	arch/arm/mach-tegra/clock.c	/^enum clock_id clock_get_periph_parent(enum periph_id periph_id)$/;"	f	typeref:enum:clock_id
clock_get_periph_rate	arch/arm/mach-exynos/clock.c	/^unsigned long clock_get_periph_rate(int peripheral)$/;"	f	typeref:typename:unsigned long
clock_get_periph_rate	arch/arm/mach-tegra/clock.c	/^unsigned long clock_get_periph_rate(enum periph_id periph_id,$/;"	f	typeref:typename:unsigned long
clock_get_pll3	arch/arm/mach-sunxi/clock_sun4i.c	/^unsigned int clock_get_pll3(void)$/;"	f	typeref:typename:unsigned int
clock_get_pll3	arch/arm/mach-sunxi/clock_sun6i.c	/^unsigned int clock_get_pll3(void)$/;"	f	typeref:typename:unsigned int
clock_get_pll4_periph0	arch/arm/mach-sunxi/clock_sun9i.c	/^unsigned int clock_get_pll4_periph0(void)$/;"	f	typeref:typename:unsigned int
clock_get_pll5p	arch/arm/mach-sunxi/clock_sun4i.c	/^unsigned int clock_get_pll5p(void)$/;"	f	typeref:typename:unsigned int
clock_get_pll6	arch/arm/mach-sunxi/clock_sun4i.c	/^unsigned int clock_get_pll6(void)$/;"	f	typeref:typename:unsigned int
clock_get_pll6	arch/arm/mach-sunxi/clock_sun6i.c	/^unsigned int clock_get_pll6(void)$/;"	f	typeref:typename:unsigned int
clock_get_pll6	arch/arm/mach-sunxi/clock_sun8i_a83t.c	/^unsigned int clock_get_pll6(void)$/;"	f	typeref:typename:unsigned int
clock_get_postdiv	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div)$/;"	f	typeref:typename:int
clock_get_prediv	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div)$/;"	f	typeref:typename:int
clock_get_rate	arch/arm/mach-tegra/clock.c	/^unsigned clock_get_rate(enum clock_id clkid)$/;"	f	typeref:typename:unsigned
clock_get_simple_pll	arch/arm/mach-tegra/clock.c	/^__weak struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid)$/;"	f	typeref:typename:__weak struct clk_pll_simple *
clock_get_simple_pll	arch/arm/mach-tegra/tegra124/clock.c	/^struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid)$/;"	f	typeref:struct:clk_pll_simple *
clock_get_src	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src)$/;"	f	typeref:typename:int
clock_get_target_val	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_get_target_val(enum clk_root_index clock_id, u32 *val)$/;"	f	typeref:typename:int
clock_hz	arch/avr32/include/asm/setup.h	/^	u64	clock_hz;	\/* Clock speed in Hz *\/$/;"	m	struct:tag_clock	typeref:typename:u64
clock_id	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^enum clock_id {$/;"	g
clock_id	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^enum clock_id {$/;"	g
clock_id	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^enum clock_id {$/;"	g
clock_id	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^enum clock_id {$/;"	g
clock_id	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^enum clock_id {$/;"	g
clock_id	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 clock_id;$/;"	m	struct:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a::__anon775fc5441208	typeref:typename:u32
clock_id	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 clock_id;$/;"	m	struct:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a::__anon775fc5441308	typeref:typename:u32
clock_id	arch/avr32/include/asm/setup.h	/^	u32	clock_id;	\/* Which clock are we talking about? *\/$/;"	m	struct:tag_clock	typeref:typename:u32
clock_id_is_pll	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^#define clock_id_is_pll(/;"	d
clock_id_is_pll	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^#define clock_id_is_pll(/;"	d
clock_id_is_pll	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^#define clock_id_is_pll(/;"	d
clock_id_is_pll	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^#define clock_id_is_pll(/;"	d
clock_id_is_pll	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^#define clock_id_is_pll(/;"	d
clock_in	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int clock_in;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
clock_init	arch/arm/cpu/armv7/mx7/clock.c	/^void clock_init(void)$/;"	f	typeref:typename:void
clock_init	arch/arm/mach-sunxi/clock.c	/^int clock_init(void)$/;"	f	typeref:typename:int
clock_init	arch/arm/mach-tegra/clock.c	/^void clock_init(void)$/;"	f	typeref:typename:void
clock_init	board/freescale/s32v234evb/clock.c	/^void clock_init(void)$/;"	f	typeref:typename:void
clock_init	board/freescale/vf610twr/vf610twr.c	/^static void clock_init(void)$/;"	f	typeref:typename:void	file:
clock_init	board/phytec/pcm052/pcm052.c	/^static void clock_init(void)$/;"	f	typeref:typename:void	file:
clock_init	board/toradex/colibri_vf/colibri_vf.c	/^static void clock_init(void)$/;"	f	typeref:typename:void	file:
clock_init_dp_clock	arch/arm/mach-exynos/clock_init_exynos5.c	/^void clock_init_dp_clock(void)$/;"	f	typeref:typename:void
clock_init_safe	arch/arm/mach-sunxi/clock_sun4i.c	/^void clock_init_safe(void)$/;"	f	typeref:typename:void
clock_init_safe	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_init_safe(void)$/;"	f	typeref:typename:void
clock_init_safe	arch/arm/mach-sunxi/clock_sun8i_a83t.c	/^void clock_init_safe(void)$/;"	f	typeref:typename:void
clock_init_safe	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_init_safe(void)$/;"	f	typeref:typename:void
clock_init_sec	arch/arm/mach-sunxi/clock.c	/^__weak void clock_init_sec(void)$/;"	f	typeref:typename:__weak void
clock_init_sec	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_init_sec(void)$/;"	f	typeref:typename:void
clock_init_uart	arch/arm/mach-sunxi/clock_sun4i.c	/^void clock_init_uart(void)$/;"	f	typeref:typename:void
clock_init_uart	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_init_uart(void)$/;"	f	typeref:typename:void
clock_init_uart	arch/arm/mach-sunxi/clock_sun8i_a83t.c	/^void clock_init_uart(void)$/;"	f	typeref:typename:void
clock_init_uart	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_init_uart(void)$/;"	f	typeref:typename:void
clock_limp	arch/m68k/cpu/mcf532x/speed.c	/^int clock_limp(int div)$/;"	f	typeref:typename:int
clock_ll_get_source_bits	arch/arm/mach-tegra/clock.c	/^static int clock_ll_get_source_bits(enum periph_id periph_id, int mux_bits)$/;"	f	typeref:typename:int	file:
clock_ll_read_pll	arch/arm/mach-tegra/clock.c	/^int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn,$/;"	f	typeref:typename:int
clock_ll_set_source	arch/arm/mach-tegra/clock.c	/^void clock_ll_set_source(enum periph_id periph_id, unsigned source)$/;"	f	typeref:typename:void
clock_ll_set_source_bits	arch/arm/mach-tegra/clock.c	/^int clock_ll_set_source_bits(enum periph_id periph_id, int mux_bits,$/;"	f	typeref:typename:int
clock_ll_set_source_divisor	arch/arm/mach-tegra/clock.c	/^void clock_ll_set_source_divisor(enum periph_id periph_id, unsigned source,$/;"	f	typeref:typename:void
clock_ll_start_uart	arch/arm/mach-tegra/clock.c	/^void clock_ll_start_uart(enum periph_id periph_id)$/;"	f	typeref:typename:void
clock_manager_base	arch/arm/mach-socfpga/clock_manager.c	/^static const struct socfpga_clock_manager *clock_manager_base =$/;"	v	typeref:typename:const struct socfpga_clock_manager *	file:
clock_manager_base	drivers/mmc/socfpga_dw_mmc.c	/^static const struct socfpga_clock_manager *clock_manager_base =$/;"	v	typeref:typename:const struct socfpga_clock_manager *	file:
clock_mask	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 clock_mask;$/;"	m	struct:icc_clock_enables_msg	typeref:typename:u32
clock_max	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int clock_max;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
clock_min	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int clock_min;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
clock_osc_freq	arch/arm/include/asm/arch-tegra/clock.h	/^enum clock_osc_freq {$/;"	g
clock_pci_eeprom	board/mpl/pati/cmd_pati.c	/^static void clock_pci_eeprom(void)$/;"	f	typeref:typename:void	file:
clock_peric1	arch/arm/dts/exynos7420.dtsi	/^	clock_peric1: clock-controller@14c80000 {$/;"	l
clock_periph_id_isvalid	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^#define clock_periph_id_isvalid(/;"	d
clock_periph_id_isvalid	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^#define clock_periph_id_isvalid(/;"	d
clock_periph_id_isvalid	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^#define clock_periph_id_isvalid(/;"	d
clock_periph_id_isvalid	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^#define clock_periph_id_isvalid(/;"	d
clock_periph_id_isvalid	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^#define clock_periph_id_isvalid(/;"	d
clock_periph_type	arch/arm/mach-tegra/tegra114/clock.c	/^static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {$/;"	g	file:
clock_periph_type	arch/arm/mach-tegra/tegra124/clock.c	/^static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {$/;"	g	file:
clock_periph_type	arch/arm/mach-tegra/tegra20/clock.c	/^static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {$/;"	g	file:
clock_periph_type	arch/arm/mach-tegra/tegra210/clock.c	/^static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {$/;"	g	file:
clock_periph_type	arch/arm/mach-tegra/tegra30/clock.c	/^static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {$/;"	g	file:
clock_pll	arch/m68k/cpu/mcf532x/speed.c	/^int clock_pll(int fsys, int flags)$/;"	f	typeref:typename:int
clock_rate	include/timer.h	/^	unsigned long clock_rate;$/;"	m	struct:timer_dev_priv	typeref:typename:unsigned long
clock_recovery_m_value_type	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum clock_recovery_m_value_type {$/;"	g
clock_ref	include/lynxkdi.h	/^	uint32_t	clock_ref;	\/* Time reference		*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint32_t
clock_root_cfg	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,$/;"	f	typeref:typename:int
clock_root_enabled	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_root_enabled(enum clk_root_index clock_id)$/;"	f	typeref:typename:int
clock_select	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	clock_select;$/;"	m	union:psc512x::__anond569131d010a	typeref:typename:volatile u16
clock_select	include/mpc5xxx.h	/^		volatile u16	clock_select;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b010a	typeref:typename:volatile u16
clock_seq_hi_and_reserved	include/uuid.h	/^	unsigned char clock_seq_hi_and_reserved;$/;"	m	struct:uuid	typeref:typename:unsigned char
clock_seq_low	include/uuid.h	/^	unsigned char clock_seq_low;$/;"	m	struct:uuid	typeref:typename:unsigned char
clock_set_autopostdiv	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,$/;"	f	typeref:typename:int
clock_set_de_mod_clock	arch/arm/mach-sunxi/clock_sun4i.c	/^void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz)$/;"	f	typeref:typename:void
clock_set_de_mod_clock	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz)$/;"	f	typeref:typename:void
clock_set_display_rate	arch/arm/mach-tegra/tegra124/clock.c	/^u32 clock_set_display_rate(u32 frequency)$/;"	f	typeref:typename:u32
clock_set_enable	arch/arm/mach-tegra/tegra114/clock.c	/^void clock_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
clock_set_enable	arch/arm/mach-tegra/tegra124/clock.c	/^void clock_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
clock_set_enable	arch/arm/mach-tegra/tegra20/clock.c	/^void clock_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
clock_set_enable	arch/arm/mach-tegra/tegra210/clock.c	/^void clock_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
clock_set_enable	arch/arm/mach-tegra/tegra30/clock.c	/^void clock_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
clock_set_mipi_pll	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_mipi_pll(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll1	arch/arm/mach-sunxi/clock_sun4i.c	/^void clock_set_pll1(unsigned int hz)$/;"	f	typeref:typename:void
clock_set_pll1	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_pll1(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll1	arch/arm/mach-sunxi/clock_sun8i_a83t.c	/^void clock_set_pll1(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll1	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_set_pll1(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll10	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_pll10(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll11	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_pll11(unsigned int clk, bool sigma_delta_enable)$/;"	f	typeref:typename:void
clock_set_pll12	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_set_pll12(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll2	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_set_pll2(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll3	arch/arm/mach-sunxi/clock_sun4i.c	/^void clock_set_pll3(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll3	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_pll3(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll3_factors	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_pll3_factors(int m, int n)$/;"	f	typeref:typename:void
clock_set_pll4	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_set_pll4(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll5	arch/arm/mach-sunxi/clock_sun6i.c	/^void clock_set_pll5(unsigned int clk, bool sigma_delta_enable)$/;"	f	typeref:typename:void
clock_set_pll5	arch/arm/mach-sunxi/clock_sun8i_a83t.c	/^void clock_set_pll5(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pll6	arch/arm/mach-sunxi/clock_sun9i.c	/^void clock_set_pll6(unsigned int clk)$/;"	f	typeref:typename:void
clock_set_pllout	arch/arm/mach-tegra/clock.c	/^int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout, unsigned rate)$/;"	f	typeref:typename:int
clock_set_postdiv	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div)$/;"	f	typeref:typename:int
clock_set_prediv	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div)$/;"	f	typeref:typename:int
clock_set_rate	arch/arm/mach-tegra/clock.c	/^int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon)$/;"	f	typeref:typename:int
clock_set_src	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src)$/;"	f	typeref:typename:int
clock_set_target_val	arch/arm/cpu/armv7/mx7/clock_slice.c	/^int clock_set_target_val(enum clk_root_index clock_id, u32 val)$/;"	f	typeref:typename:int
clock_set_up_plldp	arch/arm/mach-tegra/tegra124/clock.c	/^void clock_set_up_plldp(void)$/;"	f	typeref:typename:void
clock_setup	arch/arm/cpu/armv7/stv0991/clock.c	/^void clock_setup(int peripheral)$/;"	f	typeref:typename:void
clock_setup	arch/arm/mach-stm32/stm32f4/clock.c	/^void clock_setup(int peripheral)$/;"	f	typeref:typename:void
clock_setup	arch/arm/mach-stm32/stm32f7/clock.c	/^void clock_setup(int peripheral)$/;"	f	typeref:typename:void
clock_sor_enable_edp_clock	arch/arm/mach-tegra/tegra124/clock.c	/^void clock_sor_enable_edp_clock(void)$/;"	f	typeref:typename:void
clock_source	arch/arm/mach-tegra/tegra114/clock.c	/^static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {$/;"	g	file:
clock_source	arch/arm/mach-tegra/tegra124/clock.c	/^static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {$/;"	g	file:
clock_source	arch/arm/mach-tegra/tegra20/clock.c	/^static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX] = {$/;"	g	file:
clock_source	arch/arm/mach-tegra/tegra210/clock.c	/^static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {$/;"	g	file:
clock_source	arch/arm/mach-tegra/tegra30/clock.c	/^static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {$/;"	g	file:
clock_start_periph_pll	arch/arm/mach-tegra/clock.c	/^unsigned clock_start_periph_pll(enum periph_id periph_id,$/;"	f	typeref:typename:unsigned
clock_start_pll	arch/arm/mach-tegra/clock.c	/^unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn,$/;"	f	typeref:typename:unsigned long
clock_state	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t clock_state;$/;"	m	struct:mrq_pg_update_state_request	typeref:typename:uint32_t
clock_status	board/micronas/vct/scc.h	/^		u32 clock_status:1;	\/* clock on\/off			*\/$/;"	m	struct:scc_softwareconfiguration::__anon903167320408	typeref:typename:u32:1
clock_t	include/linux/types.h	/^typedef __kernel_clock_t	clock_t;$/;"	t	typeref:typename:__kernel_clock_t
clock_top0	arch/arm/dts/exynos7420.dtsi	/^	clock_top0: clock-controller@105d0000 {$/;"	l
clock_topc	arch/arm/dts/exynos7420.dtsi	/^	clock_topc: clock-controller@10570000 {$/;"	l
clock_twi_onoff	arch/arm/mach-sunxi/clock.c	/^int clock_twi_onoff(int port, int state)$/;"	f	typeref:typename:int
clock_twi_onoff	arch/arm/mach-sunxi/clock_sun4i.c	/^int clock_twi_onoff(int port, int state)$/;"	f	typeref:typename:int
clock_twi_onoff	arch/arm/mach-sunxi/clock_sun9i.c	/^int clock_twi_onoff(int port, int state)$/;"	f	typeref:typename:int
clock_type_id	arch/arm/mach-tegra/tegra114/clock.c	/^enum clock_type_id {$/;"	g	file:
clock_type_id	arch/arm/mach-tegra/tegra124/clock.c	/^enum clock_type_id {$/;"	g	file:
clock_type_id	arch/arm/mach-tegra/tegra20/clock.c	/^enum clock_type_id {$/;"	g	file:
clock_type_id	arch/arm/mach-tegra/tegra210/clock.c	/^enum clock_type_id {$/;"	g	file:
clock_type_id	arch/arm/mach-tegra/tegra30/clock.c	/^enum clock_type_id {$/;"	g	file:
clock_type_id_isvalid	arch/arm/include/asm/arch-tegra/clock.h	/^#define clock_type_id_isvalid(/;"	d
clock_type_id_isvalid	arch/arm/mach-tegra/clock.c	/^#define clock_type_id_isvalid(/;"	d	file:
clock_verify	arch/arm/mach-tegra/clock.c	/^int clock_verify(void)$/;"	f	typeref:typename:int
clocked	drivers/usb/gadget/at91_udc.h	/^	unsigned			clocked:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
clockgen	arch/arm/dts/fsl-ls1012a.dtsi	/^		clockgen: clocking@1ee1000 {$/;"	l
clockgen	arch/arm/dts/fsl-ls1043a.dtsi	/^		clockgen: clocking@1ee1000 {$/;"	l
clockgen	arch/arm/dts/fsl-ls1046a.dtsi	/^		clockgen: clocking@1ee1000 {$/;"	l
clockgen	arch/arm/dts/ls1021a.dtsi	/^		clockgen: clocking@1ee1000 {$/;"	l
clocks	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	const char *clocks[];	\/* must be last; use CLOCKS() to declare *\/$/;"	m	struct:peri_clk_data	typeref:typename:const char * []
clocks	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	const char *clocks[];	\/* must be last; use CLOCKS() to declare *\/$/;"	m	struct:peri_clk_data	typeref:typename:const char * []
clocks	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	struct sdram_timing_clks clocks;$/;"	m	struct:autocal_clks	typeref:struct:sdram_timing_clks	file:
close	drivers/qe/uec_phy.h	/^	void (*close) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:void (*)(struct uec_mii_info * mii_info)
close	fs/fs.c	/^	void (*close)(void);$/;"	m	struct:fstype_info	typeref:typename:void (*)(void)	file:
close	include/tpm.h	/^	int (*close)(struct udevice *dev);$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev)
close	test/py/multiplexed_log.py	/^    def close(self):$/;"	m	class:Logfile
close	test/py/multiplexed_log.py	/^    def close(self):$/;"	m	class:LogfileStream
close	test/py/multiplexed_log.py	/^    def close(self):$/;"	m	class:RunAndLog
close	test/py/u_boot_console_base.py	/^    def close(self):$/;"	m	class:ConsoleBase
close	test/py/u_boot_spawn.py	/^    def close(self):$/;"	m	class:Spawn
closeEvent	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::closeEvent(QCloseEvent* e)$/;"	f	class:ConfigMainWindow	typeref:typename:void
close_all	common/cli_hush.c	/^static void close_all(void)$/;"	f	typeref:typename:void	file:
close_cfg_super_IO	board/mpl/common/isa.c	/^void close_cfg_super_IO(int address)$/;"	f	typeref:typename:void
close_me	common/cli_hush.c	/^struct close_me {$/;"	s	file:
close_me_head	common/cli_hush.c	/^static struct close_me *close_me_head;$/;"	v	typeref:struct:close_me *	file:
close_port	arch/powerpc/cpu/mpc512x/serial.c	/^int close_port(int num)$/;"	f	typeref:typename:int
clpcl10clrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	clpcl10clrr;	\/* Cluster PCL30 Clear Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
clpcl10psr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	clpcl10psr;	\/* Cluster PCL30 Prev Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
clpcl10setr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 clpcl10setr;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
clpcl10setr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	clpcl10setr;	\/* Cluster PCL30 Set Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
clpcl10sr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	clpcl10sr;	\/* Cluster PCL10 Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
clpcr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 clpcr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
clpcr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	clpcr;$/;"	m	struct:clkctl	typeref:typename:u32
clpcr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 clpcr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
clpcr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 clpcr;$/;"	m	struct:ccm_reg	typeref:typename:u32
clr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t clr;$/;"	m	struct:mrq_trace_modify_request	typeref:typename:uint32_t
clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint clr;$/;"	m	struct:clk_set_clr	typeref:typename:uint
clr	arch/mips/mach-pic32/include/mach/pic32.h	/^	u32 clr;$/;"	m	struct:pic32_reg_atomic	typeref:typename:u32
clr	include/faraday/ftsdc010.h	/^	unsigned int	clr;		\/* 0x2c - clear reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
clr_bss	arch/sparc/cpu/leon2/start.S	/^clr_bss:$/;"	l
clr_bss	arch/sparc/cpu/leon3/start.S	/^clr_bss:$/;"	l
clr_data	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int clr_data;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
clr_falling	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int clr_falling;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
clr_rising	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int clr_rising;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
clrbits	arch/arc/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/arm/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/m68k/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/nds32/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/nios2/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/powerpc/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/sh/include/asm/io.h	/^#define clrbits(/;"	d
clrbits	arch/x86/include/asm/io.h	/^#define clrbits(/;"	d
clrbits_8	arch/arc/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/arm/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/m68k/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/nds32/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/nios2/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/powerpc/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/sh/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_8	arch/x86/include/asm/io.h	/^#define clrbits_8(/;"	d
clrbits_be16	arch/arc/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/arm/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/m68k/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/nds32/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/nios2/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/powerpc/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/sh/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be16	arch/x86/include/asm/io.h	/^#define clrbits_be16(/;"	d
clrbits_be32	arch/arc/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/arm/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/m68k/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/nds32/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/nios2/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/powerpc/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/sh/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_be32	arch/x86/include/asm/io.h	/^#define clrbits_be32(/;"	d
clrbits_le16	arch/arc/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/arm/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/m68k/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/nds32/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/nios2/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/powerpc/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/sh/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le16	arch/x86/include/asm/io.h	/^#define clrbits_le16(/;"	d
clrbits_le32	arch/arc/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/arm/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/m68k/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/nds32/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/nios2/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/powerpc/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/sh/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrbits_le32	arch/x86/include/asm/io.h	/^#define clrbits_le32(/;"	d
clrio	arch/x86/include/asm/io.h	/^#define clrio(/;"	d
clrio_16	arch/x86/include/asm/io.h	/^#define clrio_16(/;"	d
clrio_32	arch/x86/include/asm/io.h	/^#define clrio_32(/;"	d
clrio_8	arch/x86/include/asm/io.h	/^#define clrio_8(/;"	d
clrset_post_state	drivers/usb/emul/sandbox_hub.c	/^static int clrset_post_state(struct udevice *hub, int port, int clear, int set)$/;"	f	typeref:typename:int	file:
clrset_spare_register	arch/arm/cpu/armv7/omap5/prcm-regs.c	/^void clrset_spare_register(u8 spare_type, u32 clear_bits, u32 set_bits)$/;"	f	typeref:typename:void
clrsetbits	arch/arc/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/arm/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/m68k/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/nds32/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/nios2/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/powerpc/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/sh/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	arch/x86/include/asm/io.h	/^#define clrsetbits(/;"	d
clrsetbits	board/micronas/vct/gpio.c	/^static void clrsetbits(u32 addr, u32 and_mask, u32 or_mask)$/;"	f	typeref:typename:void	file:
clrsetbits_8	arch/arc/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/arm/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/m68k/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/nds32/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/nios2/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/powerpc/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/sh/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_8	arch/x86/include/asm/io.h	/^#define clrsetbits_8(/;"	d
clrsetbits_be16	arch/arc/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/arm/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/m68k/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/nds32/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/nios2/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/powerpc/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/sh/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be16	arch/x86/include/asm/io.h	/^#define clrsetbits_be16(/;"	d
clrsetbits_be32	arch/arc/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/arm/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/m68k/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/nds32/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/nios2/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/powerpc/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/sh/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_be32	arch/x86/include/asm/io.h	/^#define clrsetbits_be32(/;"	d
clrsetbits_le16	arch/arc/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/arm/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/m68k/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/nds32/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/nios2/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/powerpc/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/sh/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le16	arch/x86/include/asm/io.h	/^#define clrsetbits_le16(/;"	d
clrsetbits_le32	arch/arc/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/arm/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/m68k/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/nds32/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/nios2/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/powerpc/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/sh/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetbits_le32	arch/x86/include/asm/io.h	/^#define clrsetbits_le32(/;"	d
clrsetio	arch/x86/include/asm/io.h	/^#define clrsetio(/;"	d
clrsetio_16	arch/x86/include/asm/io.h	/^#define clrsetio_16(/;"	d
clrsetio_32	arch/x86/include/asm/io.h	/^#define clrsetio_32(/;"	d
clrsetio_8	arch/x86/include/asm/io.h	/^#define clrsetio_8(/;"	d
clrt	drivers/net/lpc32xx_eth.c	/^	u32 clrt;		\/* Collision Window \/ Retry register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
clrt	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic clrt; \/* 0x240*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
cls_lt_ht_bist	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 cls_lt_ht_bist;$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
clstime	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint clstime, nsent, ntxerr, nrcvd, nrxerr;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uint	file:
clust_size	include/fat.h	/^	__u16	clust_size;	\/* Size of clusters in sectors *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u16
cluster1_clk	arch/arm/dts/ls1021a.dtsi	/^			cluster1_clk: clk0c0@0 {$/;"	l	label:clockgen
cluster_control	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 cluster_control;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cluster_control	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cluster_control;	\/* offset 0x2c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cluster_control	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cluster_control;	\/* offset 0x2c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cluster_control	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 cluster_control;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cluster_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t cluster_id; \/* enum cluster_id *\/$/;"	m	struct:mrq_cpu_vhint_request	typeref:typename:uint32_t
cluster_size	include/fat.h	/^	__u8	cluster_size;	\/* Sectors\/cluster *\/$/;"	m	struct:boot_sector	typeref:typename:__u8
clusterpmcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 clusterpmcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
cm0config	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0config;		\/* offset 0x00C *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm0configclk	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0configclk;	\/* offset 0x010 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm0csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0csratio;	\/* offset 0x01C *\/$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int
cm0csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0csratio;	\/* offset 0x01C *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm0iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0iclkout;	\/* offset 0x02C *\/$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int
cm0iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0iclkout;	\/* offset 0x02C *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm0ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0ioctl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
cm0ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm0ioctl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
cm11_qa_hw_id	board/cm5200/cm5200.h	/^static char *cm11_qa_hw_id[HW_ID_ELEM_COUNT] = {$/;"	v	typeref:typename:char * []
cm1_abe_aess_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_aess_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_dmic_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_dmic_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_l4abe_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_l4abe_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_mcasp_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_mcasp_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_mcbsp1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_mcbsp1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_mcbsp2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_mcbsp2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_mcbsp3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_mcbsp3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_pdm_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_pdm_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_slimbus_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_slimbus_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_timer5_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_timer5_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_timer6_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_timer6_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_timer7_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_timer7_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_timer8_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_timer8_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_abe_wdt3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm1_abe_wdt3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm1_qa_hw_id	board/cm5200/cm5200.h	/^static char *cm1_qa_hw_id[HW_ID_ELEM_COUNT] = {$/;"	v	typeref:typename:char * []
cm1config	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1config;		\/* offset 0x040 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm1configclk	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1configclk;	\/* offset 0x044 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm1csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1csratio;	\/* offset 0x050 *\/$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int
cm1csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1csratio;	\/* offset 0x050 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm1iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1iclkout;	\/* offset 0x060 *\/$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int
cm1iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1iclkout;	\/* offset 0x060 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm1ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1ioctl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
cm1ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm1ioctl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
cm2config	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2config;		\/* offset 0x074 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm2configclk	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2configclk;	\/* offset 0x078 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm2csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2csratio;	\/* offset 0x084 *\/$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int
cm2csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2csratio;	\/* offset 0x084 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm2iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2iclkout;	\/* offset 0x094 *\/$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int
cm2iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2iclkout;	\/* offset 0x094 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
cm2ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2ioctl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
cm2ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int cm2ioctl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
cm5200_fwupdate	board/cm5200/fwupdate.c	/^void cm5200_fwupdate(void)$/;"	f	typeref:typename:void
cm_abe_pll_ref_clksel	arch/arm/include/asm/omap_common.h	/^	u32 cm_abe_pll_ref_clksel;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_abe_pll_sys_clksel	arch/arm/include/asm/omap_common.h	/^	u32 cm_abe_pll_sys_clksel;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_alwon	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^struct cm_alwon {$/;"	s
cm_autoidle_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_autoidle_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_autoidle_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_autoidle_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_autoidle_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_autoidle_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_basic_init	arch/arm/mach-socfpga/clock_manager.c	/^void cm_basic_init(const struct cm_config * const cfg)$/;"	f	typeref:typename:void
cm_bypclk_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_bypclk_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_bypclk_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_bypclk_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_c2c_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_c2c_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_c2c_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_c2c_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_c2c_modem_icr_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_c2c_modem_icr_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_c2c_sad2d_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_c2c_sad2d_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_c2c_sad2d_fw_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_c2c_sad2d_fw_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_c2c_staticdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_c2c_staticdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_csi1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_csi1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_csi2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_csi2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_fdif_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_fdif_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_iss_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_iss_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_lvdsrx_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_lvdsrx_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_vip1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_vip1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_vip2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_vip2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_cam_vip3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_cam_vip3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkdcoldo_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkdcoldo_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_apll_pcie	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_apll_pcie;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_clkmode_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_clkmode_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_clkmode_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_dsp	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_dsp;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_gmac	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_gmac;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_pcie_ref	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_pcie_ref;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkmode_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkmode_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkout1_ctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cm_clkout1_ctrl;$/;"	m	struct:cm_device_inst	typeref:typename:unsigned int
cm_clksel_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_clksel_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_clksel_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_clksel_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_mpu_m3_iss_root	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_mpu_m3_iss_root;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clksel_usb_60mhz	arch/arm/include/asm/omap_common.h	/^	u32 cm_clksel_usb_60mhz;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_clkvcoldo_apll_pcie	arch/arm/include/asm/omap_common.h	/^	u32 cm_clkvcoldo_apll_pcie;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_config	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^struct cm_config {$/;"	s
cm_core	arch/arm/dts/dra7.dtsi	/^			cm_core: cm_core@8000 {$/;"	l	label:l4_cfg
cm_core_aon	arch/arm/dts/dra7.dtsi	/^			cm_core_aon: cm_core_aon@5000 {$/;"	l	label:l4_cfg
cm_core_aon_clockdomains	arch/arm/dts/dra7.dtsi	/^				cm_core_aon_clockdomains: clockdomains {$/;"	l	label:l4_cfg.cm_core_aon
cm_core_aon_clocks	arch/arm/dts/dra7.dtsi	/^				cm_core_aon_clocks: clocks {$/;"	l	label:l4_cfg.cm_core_aon
cm_core_clockdomains	arch/arm/dts/dra7.dtsi	/^				cm_core_clockdomains: clockdomains {$/;"	l	label:l4_cfg.cm_core
cm_core_clocks	arch/arm/dts/dra7.dtsi	/^				cm_core_clocks: clocks {$/;"	l	label:l4_cfg.cm_core
cm_core_dvfs_current	arch/arm/include/asm/omap_common.h	/^	u32 cm_core_dvfs_current;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_core_dvfs_perf1	arch/arm/include/asm/omap_common.h	/^	u32 cm_core_dvfs_perf1;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_core_dvfs_perf2	arch/arm/include/asm/omap_common.h	/^	u32 cm_core_dvfs_perf2;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_core_dvfs_perf3	arch/arm/include/asm/omap_common.h	/^	u32 cm_core_dvfs_perf3;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_core_dvfs_perf4	arch/arm/include/asm/omap_common.h	/^	u32 cm_core_dvfs_perf4;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_coreaon_bandgap_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_coreaon_bandgap_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_coreaon_io_srcomp_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_coreaon_io_srcomp_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_coreaon_l3init_60m_gfclk_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_coreaon_l3init_60m_gfclk_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_coreaon_usb_phy1_core_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_coreaon_usb_phy1_core_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_coreaon_usb_phy2_core_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_coreaon_usb_phy2_core_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_coreaon_usb_phy3_core_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_coreaon_usb_phy3_core_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_csr	board/freescale/common/cadmus.c	/^    u_char cm_csr;		\/* General control\/status *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_def	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^struct cm_def {$/;"	s
cm_default_cfg	arch/arm/mach-socfpga/wrap_pll_config.c	/^static const struct cm_config cm_default_cfg = {$/;"	v	typeref:typename:const struct cm_config	file:
cm_device	arch/arm/cpu/armv7/am33xx/emif4.c	/^static struct cm_device_inst *cm_device =$/;"	v	typeref:struct:cm_device_inst *	file:
cm_device_inst	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct cm_device_inst {$/;"	s
cm_div_h11_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h11_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h11_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h11_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h11_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h11_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h11_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h11_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h12_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h12_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h12_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h12_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h12_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h12_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h12_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h12_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h13_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h13_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h13_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h13_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h13_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h13_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h14_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h14_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h14_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h14_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h21_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h21_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_h21_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h21_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h22_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h22_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_h22_dpllcore	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h22_dpllcore;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h23_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h23_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_h23_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h23_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_h24_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h24_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_h24_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_h24_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_apll_pcie	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_apll_pcie;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_div_m2_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m2_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m2_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m2_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m2_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m3_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_div_m3_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m3_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m3_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m3_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m3_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m3_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m3_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m3_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m3_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m4_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_div_m4_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m4_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m4_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m4_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m4_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m4_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m4_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m4_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m4_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m4_h11_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m4_h11_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m5_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_div_m5_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m5_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m5_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m5_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m5_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m5_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m5_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m5_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m5_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m5_h12_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m5_h12_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m6_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_div_m6_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m6_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m6_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m6_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m6_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m6_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m6_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m6_h13_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m6_h13_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_div_m7_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m7_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m7_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m7_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_div_m7_h14_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_div_m7_h14_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_dll_ctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cm_dll_ctrl;$/;"	m	struct:cm_device_inst	typeref:typename:unsigned int
cm_dll_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_dll_ctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_dma	board/freescale/common/cadmus.c	/^    u_char cm_dma;		\/* DMA control *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_dpll	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct cm_dpll {$/;"	s
cm_dsp_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_dsp_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_dsp_dsp_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_dsp_dsp_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_dss_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_dss_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_dss_dss_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_dss_dss_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_emu_override_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_emu_override_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_emu_override_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_emu_override_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_erattr0	include/fsl_ifc.h	/^	u32 cm_erattr0;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
cm_erattr1	include/fsl_ifc.h	/^	u32 cm_erattr1;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
cm_evter_en	include/fsl_ifc.h	/^	u32 cm_evter_en;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
cm_evter_intr_en	include/fsl_ifc.h	/^	u32 cm_evter_intr_en;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
cm_evter_stat	include/fsl_ifc.h	/^	u32 cm_evter_stat;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
cm_fx6_calib_q	board/compulab/cm_fx6/spl.c	/^static struct mx6_mmdc_calibration cm_fx6_calib_q = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
cm_fx6_calib_s	board/compulab/cm_fx6/spl.c	/^static struct mx6_mmdc_calibration cm_fx6_calib_s = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
cm_fx6_ddr3_cfg_q	board/compulab/cm_fx6/spl.c	/^static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_q = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
cm_fx6_ddr3_cfg_s	board/compulab/cm_fx6/spl.c	/^static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_s = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
cm_fx6_enable_hdmi	board/compulab/cm_fx6/cm_fx6.c	/^static void cm_fx6_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
cm_fx6_issd_gpios	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_issd_gpios[] = {$/;"	v	typeref:typename:int[]	file:
cm_fx6_mxc_serial_plat	board/compulab/cm_fx6/cm_fx6.c	/^static struct mxc_serial_platdata cm_fx6_mxc_serial_plat = {$/;"	v	typeref:struct:mxc_serial_platdata	file:
cm_fx6_sata_power	board/compulab/cm_fx6/cm_fx6.c	/^static void cm_fx6_sata_power(int on)$/;"	f	typeref:typename:void	file:
cm_fx6_set_ecspi_iomux	board/compulab/cm_fx6/common.c	/^void cm_fx6_set_ecspi_iomux(void)$/;"	f	typeref:typename:void
cm_fx6_set_usdhc_iomux	board/compulab/cm_fx6/common.c	/^void cm_fx6_set_usdhc_iomux(void)$/;"	f	typeref:typename:void
cm_fx6_setup_display	board/compulab/cm_fx6/cm_fx6.c	/^static inline void cm_fx6_setup_display(void) {}$/;"	f	typeref:typename:void	file:
cm_fx6_setup_display	board/compulab/cm_fx6/cm_fx6.c	/^static void cm_fx6_setup_display(void)$/;"	f	typeref:typename:void	file:
cm_fx6_setup_ecspi	board/compulab/cm_fx6/cm_fx6.c	/^int cm_fx6_setup_ecspi(void) { return 0; }$/;"	f	typeref:typename:int
cm_fx6_setup_ecspi	board/compulab/cm_fx6/cm_fx6.c	/^int cm_fx6_setup_ecspi(void)$/;"	f	typeref:typename:int
cm_fx6_setup_ecspi	board/compulab/cm_fx6/spl.c	/^static void cm_fx6_setup_ecspi(void) { }$/;"	f	typeref:typename:void	file:
cm_fx6_setup_ecspi	board/compulab/cm_fx6/spl.c	/^static void cm_fx6_setup_ecspi(void)$/;"	f	typeref:typename:void	file:
cm_fx6_setup_gpmi_nand	board/compulab/cm_fx6/cm_fx6.c	/^static void cm_fx6_setup_gpmi_nand(void) {}$/;"	f	typeref:typename:void	file:
cm_fx6_setup_gpmi_nand	board/compulab/cm_fx6/cm_fx6.c	/^static void cm_fx6_setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
cm_fx6_setup_i2c	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_i2c(void) { return 0; }$/;"	f	typeref:typename:int	file:
cm_fx6_setup_i2c	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_i2c(void)$/;"	f	typeref:typename:int	file:
cm_fx6_setup_issd	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_issd(void) { return 0; }$/;"	f	typeref:typename:int	file:
cm_fx6_setup_issd	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_issd(void)$/;"	f	typeref:typename:int	file:
cm_fx6_setup_one_i2c	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_one_i2c(int busnum, struct i2c_pads_info *pads)$/;"	f	typeref:typename:int	file:
cm_fx6_setup_uart	board/compulab/cm_fx6/spl.c	/^static void cm_fx6_setup_uart(void)$/;"	f	typeref:typename:void	file:
cm_fx6_setup_usb_host	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_usb_host(void) { return 0; }$/;"	f	typeref:typename:int	file:
cm_fx6_setup_usb_host	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_usb_host(void)$/;"	f	typeref:typename:int	file:
cm_fx6_setup_usb_otg	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_usb_otg(void) { return 0; }$/;"	f	typeref:typename:int	file:
cm_fx6_setup_usb_otg	board/compulab/cm_fx6/cm_fx6.c	/^static int cm_fx6_setup_usb_otg(void)$/;"	f	typeref:typename:int	file:
cm_fx6_spl_dram_init	board/compulab/cm_fx6/spl.c	/^static int cm_fx6_spl_dram_init(void)$/;"	f	typeref:typename:int	file:
cm_fx6_splash_locations	board/compulab/cm_fx6/cm_fx6.c	/^static struct splash_location cm_fx6_splash_locations[] = {$/;"	v	typeref:struct:splash_location[]	file:
cm_fx6_sysinfo_q	board/compulab/cm_fx6/spl.c	/^static struct mx6_ddr_sysinfo cm_fx6_sysinfo_q = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
cm_fx6_sysinfo_s	board/compulab/cm_fx6/spl.c	/^static struct mx6_ddr_sysinfo cm_fx6_sysinfo_s = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
cm_get_default_config	arch/arm/mach-socfpga/wrap_pll_config.c	/^const struct cm_config * const cm_get_default_config(void)$/;"	f	typeref:typename:const struct cm_config * const
cm_get_f2s_per_ref_clk_hz	arch/arm/mach-socfpga/wrap_pll_config.c	/^const unsigned int cm_get_f2s_per_ref_clk_hz(void)$/;"	f	typeref:typename:const unsigned int
cm_get_f2s_sdr_ref_clk_hz	arch/arm/mach-socfpga/wrap_pll_config.c	/^const unsigned int cm_get_f2s_sdr_ref_clk_hz(void)$/;"	f	typeref:typename:const unsigned int
cm_get_l4_sp_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^unsigned int cm_get_l4_sp_clk_hz(void)$/;"	f	typeref:typename:unsigned int
cm_get_main_vco_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^static unsigned int cm_get_main_vco_clk_hz(void)$/;"	f	typeref:typename:unsigned int	file:
cm_get_mmc_controller_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^unsigned int cm_get_mmc_controller_clk_hz(void)$/;"	f	typeref:typename:unsigned int
cm_get_mpu_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^unsigned long cm_get_mpu_clk_hz(void)$/;"	f	typeref:typename:unsigned long
cm_get_osc_clk_hz	arch/arm/mach-socfpga/wrap_pll_config.c	/^const unsigned int cm_get_osc_clk_hz(const int osc)$/;"	f	typeref:typename:const unsigned int
cm_get_per_vco_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^static unsigned int cm_get_per_vco_clk_hz(void)$/;"	f	typeref:typename:unsigned int	file:
cm_get_qspi_controller_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^unsigned int cm_get_qspi_controller_clk_hz(void)$/;"	f	typeref:typename:unsigned int
cm_get_sdram_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^unsigned long cm_get_sdram_clk_hz(void)$/;"	f	typeref:typename:unsigned long
cm_get_spi_controller_clk_hz	arch/arm/mach-socfpga/clock_manager.c	/^unsigned int cm_get_spi_controller_clk_hz(void)$/;"	f	typeref:typename:unsigned int
cm_gmac_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_gmac_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_gmac_gmac_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_gmac_gmac_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_hsclk	board/freescale/common/cadmus.c	/^    u_char cm_hsclk;		\/* High speed clock *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_hsxclk	board/freescale/common/cadmus.c	/^    u_char cm_hsxclk;		\/* High speed clock extended *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_idlest_apll_pcie	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_apll_pcie;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 cm_idlest_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_idlest_dpll	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll;$/;"	m	struct:dpll_regs	typeref:typename:u32
cm_idlest_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_idlest_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_idlest_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ipu_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_ipu_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ipu_i2c5_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_ipu_i2c5_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_iva_dvfs_current	arch/arm/include/asm/omap_common.h	/^	u32 cm_iva_dvfs_current;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_iva_dvfs_perf_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_iva_dvfs_perf_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_iva_dvfs_perf_ivahd	arch/arm/include/asm/omap_common.h	/^	u32 cm_iva_dvfs_perf_ivahd;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_iva_dvfs_perf_tesla	arch/arm/include/asm/omap_common.h	/^	u32 cm_iva_dvfs_perf_tesla;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ivahd_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_ivahd_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ivahd_ivahd_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_ivahd_ivahd_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ivahd_sl2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_ivahd_sl2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_1_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_1_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_1_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_1_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_1_l3_1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_1_l3_1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_2_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_2_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_2_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_2_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_2_l3_2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_2_l3_2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_2_ocmc_ram_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_2_ocmc_ram_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3_gpmc_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3_gpmc_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_fsusb_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_fsusb_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_hsi_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_hsi_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_hsmmc1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_hsmmc1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_hsmmc2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_hsmmc2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_hsusbhost_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_hsusbhost_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_hsusbotg_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_hsusbotg_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_hsusbtll_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_hsusbtll_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_ocp2scp1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_ocp2scp1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_ocp2scp3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_ocp2scp3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_p1500_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_p1500_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_sata_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_sata_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_usb_otg_ss1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_usb_otg_ss1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_usb_otg_ss2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_usb_otg_ss2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3init_usbphy_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3init_usbphy_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3instr_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3instr_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3instr_intrconn_wp1_clkct	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3instr_intrconn_wp1_clkct;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3instr_intrconn_wp1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3instr_intrconn_wp1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3instr_l3_3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3instr_l3_3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3instr_l3_instr_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3instr_l3_instr_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3main1_tptc1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3main1_tptc1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l3main1_tptc2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l3main1_tptc2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4cfg_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4cfg_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4cfg_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4cfg_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4cfg_hw_sem_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4cfg_hw_sem_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4cfg_l4_cfg_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4cfg_l4_cfg_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4cfg_mailbox_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4cfg_mailbox_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4cfg_sar_rom_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4cfg_sar_rom_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_adc_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_adc_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_elm_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_elm_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio5_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio5_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio6_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio6_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio7_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio7_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gpio8_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gpio8_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gptimer10_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gptimer10_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gptimer11_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gptimer11_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gptimer2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gptimer2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gptimer3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gptimer3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gptimer4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gptimer4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_gptimer9_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_gptimer9_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_hdq1w_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_hdq1w_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_hecc1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_hecc1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_hecc2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_hecc2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_i2c1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_i2c1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_i2c2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_i2c2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_i2c3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_i2c3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_i2c4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_i2c4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_i2c5_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_i2c5_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_l4per_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_l4per_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcasp2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcasp2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcasp3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcasp3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcbsp4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcbsp4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcspi1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcspi1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcspi2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcspi2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcspi3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcspi3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mcspi4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mcspi4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mgate_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mgate_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mmcsd3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mmcsd3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mmcsd4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mmcsd4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_mmcsd5_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_mmcsd5_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_msprohg_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_msprohg_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_qspi_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_qspi_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_slimbus2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_slimbus2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_uart1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_uart1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_uart2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_uart2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_uart3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_uart3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_uart4_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_uart4_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_uart5_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_uart5_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4per_uart6_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4per_uart6_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_aes1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_aes1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_aes2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_aes2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_cryptodma_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_cryptodma_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_des3des_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_des3des_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_pkaeip29_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_pkaeip29_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_rng_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_rng_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_sha2md51_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_sha2md51_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_l4sec_staticdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_l4sec_staticdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_led	board/freescale/common/cadmus.c	/^    u_char cm_led;		\/* LED data *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_memif_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_dll_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_dll_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_dll_h_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_dll_h_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_dmm_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_dmm_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_emif_1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_emif_1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_emif_2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_emif_2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_emif_fw_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_emif_fw_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_emif_h1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_emif_h1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_memif_emif_h2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_memif_emif_h2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_mpu_m3_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_mpu_m3_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_mpu_m3_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_mpu_m3_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_mpu_m3_mpu_m3_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_mpu_m3_mpu_m3_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_mpu_m3_staticdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_mpu_m3_staticdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_mpu_mpu_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_mpu_mpu_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_pci	board/freescale/common/cadmus.c	/^    u_char cm_pci;		\/* PCI control\/status *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_perpll	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct cm_perpll {$/;"	s
cm_pll	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^struct cm_pll {$/;"	s	file:
cm_print_clock_quick_summary	arch/arm/mach-socfpga/clock_manager.c	/^static void cm_print_clock_quick_summary(void)$/;"	f	typeref:typename:void	file:
cm_remap	board/armltd/integrator/lowlevel_init.S	/^cm_remap:$/;"	l
cm_reserved	board/freescale/common/cadmus.c	/^    u_char cm_reserved[248];	\/* Total 256 bytes *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char[248]	file:
cm_rst	board/freescale/common/cadmus.c	/^    u_char cm_rst;		\/* Reset control *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_rtc	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct cm_rtc {$/;"	s
cm_scale_fclk	arch/arm/include/asm/omap_common.h	/^	u32 cm_scale_fclk;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sdma_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_sdma_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sdma_dynamicdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_sdma_dynamicdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sdma_sdma_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_sdma_sdma_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sdma_staticdep	arch/arm/include/asm/omap_common.h	/^	u32 cm_sdma_staticdep;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sgx_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_sgx_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sgx_sgx_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_sgx_sgx_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_shadow_freq_config1	arch/arm/include/asm/omap_common.h	/^	u32 cm_shadow_freq_config1;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_ddrphy	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_ddrphy;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_deltamstep_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_deltamstep_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_abe	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_abe;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_core	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_core;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_iva	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_iva;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_mpu	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_per	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_per;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_unipro	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_unipro;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_ssc_modfreqdiv_dpll_usb	arch/arm/include/asm/omap_common.h	/^	u32 cm_ssc_modfreqdiv_dpll_usb;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_sys_clksel	arch/arm/include/asm/omap_common.h	/^	u32 cm_sys_clksel;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_t3517_handle_mac_address	board/compulab/cm_t3517/cm_t3517.c	/^static int cm_t3517_handle_mac_address(void)$/;"	f	typeref:typename:int	file:
cm_t3517_init_emac	board/compulab/cm_t3517/cm_t3517.c	/^static inline int cm_t3517_init_emac(bd_t *bis) { return 0; }$/;"	f	typeref:typename:int	file:
cm_t3517_init_emac	board/compulab/cm_t3517/cm_t3517.c	/^static inline int cm_t3517_init_emac(bd_t *bis)$/;"	f	typeref:typename:int	file:
cm_t3517_musb_board_data	board/compulab/cm_t3517/cm_t3517.c	/^static struct omap_musb_board_data cm_t3517_musb_board_data = {$/;"	v	typeref:struct:omap_musb_board_data	file:
cm_t3517_musb_config	board/compulab/cm_t3517/cm_t3517.c	/^static struct musb_hdrc_config cm_t3517_musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
cm_t3517_musb_init	board/compulab/cm_t3517/cm_t3517.c	/^static void cm_t3517_musb_init(void)$/;"	f	typeref:typename:void	file:
cm_t3517_musb_pdata	board/compulab/cm_t3517/cm_t3517.c	/^static struct musb_hdrc_platform_data cm_t3517_musb_pdata = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
cm_t3517_usbhs_bdata	board/compulab/cm_t3517/cm_t3517.c	/^static struct omap_usbhs_board_data cm_t3517_usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
cm_t35_set_muxconf	board/compulab/cm_t35/cm_t35.c	/^static void cm_t35_set_muxconf(void)$/;"	f	typeref:typename:void	file:
cm_t3730_set_muxconf	board/compulab/cm_t35/cm_t35.c	/^static void cm_t3730_set_muxconf(void)$/;"	f	typeref:typename:void	file:
cm_t3x_reset_net_chip	board/compulab/cm_t35/cm_t35.c	/^static inline int cm_t3x_reset_net_chip(int gpio) { return 0; }$/;"	f	typeref:typename:int	file:
cm_t3x_reset_net_chip	board/compulab/cm_t35/cm_t35.c	/^static int cm_t3x_reset_net_chip(int gpio)$/;"	f	typeref:typename:int	file:
cm_t3x_set_common_muxconf	board/compulab/cm_t35/cm_t35.c	/^static void cm_t3x_set_common_muxconf(void)$/;"	f	typeref:typename:void	file:
cm_t54_palmas_regulator_set	board/compulab/cm_t54/cm_t54.c	/^static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval)$/;"	f	typeref:typename:int	file:
cm_ver	board/freescale/common/cadmus.c	/^    u_char cm_ver;		\/* Board version *\/$/;"	m	struct:cadmus_reg	typeref:typename:u_char	file:
cm_wait_for_fsm	arch/arm/mach-socfpga/clock_manager.c	/^static void cm_wait_for_fsm(void)$/;"	f	typeref:typename:void	file:
cm_wait_for_lock	arch/arm/mach-socfpga/clock_manager.c	/^static void cm_wait_for_lock(uint32_t mask)$/;"	f	typeref:typename:void	file:
cm_wkup_bandgap_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_bandgap_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_clkstctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_clkstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_gpio1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_gpio1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_gptimer12_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_gptimer12_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_gptimer1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_gptimer1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_keyboard_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_keyboard_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_l4wkup_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_l4wkup_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_rtc_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_rtc_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_sarram_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_sarram_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_synctimer_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_synctimer_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_usim_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_usim_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_wdtimer1_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_wdtimer1_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkup_wdtimer2_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkup_wdtimer2_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkupaon_io_srcomp_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkupaon_io_srcomp_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkupaon_scrm_clkctrl	arch/arm/include/asm/omap_common.h	/^	u32 cm_wkupaon_scrm_clkctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
cm_wkuppll	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct cm_wkuppll {$/;"	s
cm_write_bypass	arch/arm/mach-socfpga/clock_manager.c	/^static void cm_write_bypass(uint32_t val)$/;"	f	typeref:typename:void	file:
cm_write_ctrl	arch/arm/mach-socfpga/clock_manager.c	/^static void cm_write_ctrl(uint32_t val)$/;"	f	typeref:typename:void	file:
cm_write_with_phase	arch/arm/mach-socfpga/clock_manager.c	/^static void cm_write_with_phase(uint32_t value,$/;"	f	typeref:typename:void	file:
cmalwon	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^const struct cm_alwon *cmalwon = (struct cm_alwon *)CM_ALWON_BASE;$/;"	v	typeref:typename:const struct cm_alwon *
cmalwon	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^const struct cm_alwon *cmalwon = (struct cm_alwon *)CM_ALWON_BASE;$/;"	v	typeref:typename:const struct cm_alwon *
cmap	include/lcd.h	/^	ushort	*cmap;		\/* Pointer to the colormap *\/$/;"	m	struct:vidinfo	typeref:typename:ushort *
cmap	include/linux/fb.h	/^	struct fb_cmap cmap;		\/* Current cmap *\/$/;"	m	struct:fb_info	typeref:struct:fb_cmap
cmap	include/linux/fb.h	/^	struct fb_cmap cmap;	\/* color map info *\/$/;"	m	struct:fb_image	typeref:struct:fb_cmap
cmap	include/linux/fb.h	/^	struct fb_cmap_user cmap;	\/* color map info *\/$/;"	m	struct:fb_image_user	typeref:struct:fb_cmap_user
cmap	include/video.h	/^	ushort *cmap;$/;"	m	struct:video_priv	typeref:typename:ushort *
cmcnt	arch/sh/lib/time_sh2.c	/^static vu_long cmcnt = 0;$/;"	v	typeref:typename:vu_long	file:
cmd	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	cmd;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
cmd	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 cmd;		\/* 0x18 command *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
cmd	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 cmd;	\/* 0x2c *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
cmd	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t cmd;$/;"	m	struct:mrq_debugfs_request	typeref:typename:uint32_t
cmd	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t cmd;$/;"	m	struct:mrq_i2c_request	typeref:typename:uint32_t
cmd	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t cmd;$/;"	m	struct:mrq_reset_request	typeref:typename:uint32_t
cmd	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t cmd;$/;"	m	struct:mrq_trace_iter_request	typeref:typename:uint32_t
cmd	arch/arm/include/asm/arch-tegra/dc.h	/^	struct dc_cmd_reg cmd;		\/* CMD register 0x000 ~ 0x43 *\/$/;"	m	struct:dc_ctlr	typeref:struct:dc_cmd_reg
cmd	arch/arm/include/asm/arch/mmc.h	/^	u32 cmd;		\/* 0x18 command *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
cmd	arch/arm/include/asm/arch/rsb.h	/^	u32 cmd;	\/* 0x2c *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
cmd	arch/arm/include/asm/imx-common/dma.h	/^	struct mxs_dma_cmd	cmd;$/;"	m	struct:mxs_dma_desc	typeref:struct:mxs_dma_cmd
cmd	arch/arm/include/asm/omap_mmc.h	/^	unsigned int cmd;		\/* 0x10C *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
cmd	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	cmd;		\/* 38 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
cmd	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 cmd;		\/* 0x08 Command *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
cmd	arch/m68k/include/asm/immap_5329.h	/^	u32 cmd;		\/* 0x140 USB Command *\/$/;"	m	struct:usb_otg	typeref:typename:u32
cmd	arch/sandbox/include/asm/state.h	/^	const char *cmd;		\/* Command to execute *\/$/;"	m	struct:sandbox_state	typeref:typename:const char *
cmd	board/esd/vme8349/caddy.h	/^	struct caddy_cmd cmd[CMD_SIZE];$/;"	m	struct:caddy_interface	typeref:struct:caddy_cmd[]
cmd	board/esd/vme8349/caddy.h	/^	uint32_t cmd;$/;"	m	struct:caddy_cmd	typeref:typename:uint32_t
cmd	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 cmd;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
cmd	board/micronas/vct/scc.h	/^		u32 cmd:4;	\/* SCC Debug Command Register		*\/$/;"	m	struct:scc_debug::__anon903167320308	typeref:typename:u32:4
cmd	cmd/fdc.c	/^	uchar		cmd[16];	\/* cmd desc *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:uchar[16]	file:
cmd	cmd/fdc.c	/^static FDC_COMMAND_STRUCT cmd; \/* global command struct *\/$/;"	v	typeref:typename:FDC_COMMAND_STRUCT	file:
cmd	common/cli_hush.c	/^	char *cmd;					\/* name *\/$/;"	m	struct:built_in_command	typeref:typename:char *	file:
cmd	drivers/block/dwc_ahsata.c	/^	u32 cmd;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
cmd	drivers/mmc/mxcmmc.c	/^	struct mmc_cmd		*cmd;$/;"	m	struct:mxcmci_host	typeref:struct:mmc_cmd *	file:
cmd	drivers/mmc/mxcmmc.c	/^	u32 cmd;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
cmd	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 cmd;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
cmd	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 cmd;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
cmd	drivers/mtd/nand/sunxi_nand.c	/^	u8 cmd[2];$/;"	m	struct:sunxi_nand_chip	typeref:typename:u8[2]	file:
cmd	drivers/mtd/spi/sandbox.c	/^	uint cmd;$/;"	m	struct:sandbox_spi_flash	typeref:typename:uint	file:
cmd	drivers/net/e1000.h	/^			uint8_t cmd;	\/* *\/$/;"	m	struct:e1000_data_desc::__anon7fc273451a0a::__anon7fc273451b08	typeref:typename:uint8_t
cmd	drivers/net/e1000.h	/^			uint8_t cmd;	\/* Descriptor control *\/$/;"	m	struct:e1000_tx_desc::__anon7fc27345100a::__anon7fc273451108	typeref:typename:uint8_t
cmd	drivers/spi/ich.h	/^	uint8_t cmd[ICH_MAX_CMD_LEN];$/;"	m	struct:spi_trans	typeref:typename:uint8_t[]
cmd	drivers/spi/ti_qspi.c	/^	u32 cmd;$/;"	m	struct:ti_qspi_priv	typeref:typename:u32	file:
cmd	drivers/spi/ti_qspi.c	/^	u32 cmd;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
cmd	drivers/usb/emul/sandbox_flash.c	/^	u8 cmd;$/;"	m	struct:scsi_read10_req	typeref:typename:u8	file:
cmd	drivers/usb/gadget/f_fastboot.c	/^	char *cmd;$/;"	m	struct:cmd_dispatch_info	typeref:typename:char *	file:
cmd	drivers/video/scf0403_lcd.c	/^	struct scf0403_cmd cmd;$/;"	m	struct:scf0403_initseq_entry	typeref:struct:scf0403_cmd	file:
cmd	drivers/video/scf0403_lcd.c	/^	u16 cmd;$/;"	m	struct:scf0403_cmd	typeref:typename:u16	file:
cmd	include/command.h	/^	int		(*cmd)(struct cmd_tbl_s *, int, int, char * const []);$/;"	m	struct:cmd_tbl_s	typeref:typename:int (*)(struct cmd_tbl_s *,int,int,char * const[])
cmd	include/ec_commands.h	/^	uint8_t cmd;		      \/* Command (see enum lightbar_command) *\/$/;"	m	struct:ec_params_lightbar	typeref:typename:uint8_t
cmd	include/ec_commands.h	/^	uint8_t cmd;	\/* Command to send (enum ec_keyscan_seq_cmd) *\/$/;"	m	struct:ec_params_keyscan_seq_ctrl	typeref:typename:uint8_t
cmd	include/ec_commands.h	/^	uint8_t cmd;             \/* enum ec_vboot_hash_cmd *\/$/;"	m	struct:ec_params_vboot_hash	typeref:typename:uint8_t
cmd	include/ec_commands.h	/^	uint8_t cmd;           \/* enum ec_reboot_cmd *\/$/;"	m	struct:ec_params_reboot_ec	typeref:typename:uint8_t
cmd	include/ec_commands.h	/^	uint8_t cmd;      \/* Command to check *\/$/;"	m	struct:ec_params_get_cmd_versions	typeref:typename:uint8_t
cmd	include/faraday/ftsdc010.h	/^	unsigned int	cmd;		\/* 0x00 - command reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
cmd	include/linux/ethtool.h	/^	__u32	cmd;		\/* ETHTOOL_GPERMADDR *\/$/;"	m	struct:ethtool_perm_addr	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;		\/* ETHTOOL_GSSET_INFO *\/$/;"	m	struct:ethtool_sset_info	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;		\/* ETHTOOL_GSTATS *\/$/;"	m	struct:ethtool_stats	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;		\/* ETHTOOL_GSTRINGS *\/$/;"	m	struct:ethtool_gstrings	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;		\/* ETHTOOL_TEST *\/$/;"	m	struct:ethtool_test	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;	\/* ETHTOOL_{G,S}COALESCE *\/$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;	\/* ETHTOOL_{G,S}PAUSEPARAM *\/$/;"	m	struct:ethtool_pauseparam	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;	\/* ETHTOOL_{G,S}RINGPARAM *\/$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_cmd	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_drvinfo	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_eeprom	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_flash	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_gfeatures	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_regs	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_rxfh_indir	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_sfeatures	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_value	typeref:typename:__u32
cmd	include/linux/ethtool.h	/^	__u32	cmd;$/;"	m	struct:ethtool_wolinfo	typeref:typename:__u32
cmd	include/post.h	/^	char *cmd;$/;"	m	struct:post_test	typeref:typename:char *
cmd	include/scsi.h	/^	unsigned char		cmd[16];					\/* command				   *\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char[16]
cmd	post/lib_powerpc/andi.c	/^    ulong cmd;$/;"	m	struct:cpu_post_andi_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/cmp.c	/^    ulong cmd;$/;"	m	struct:cpu_post_cmp_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/cmpi.c	/^    ulong cmd;$/;"	m	struct:cpu_post_cmpi_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/cr.c	/^    ulong cmd;$/;"	m	struct:cpu_post_cr_s4	typeref:typename:ulong	file:
cmd	post/lib_powerpc/load.c	/^    ulong cmd;$/;"	m	struct:cpu_post_load_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/rlwimi.c	/^    ulong cmd;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/rlwinm.c	/^    ulong cmd;$/;"	m	struct:cpu_post_rlwinm_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/rlwnm.c	/^    ulong cmd;$/;"	m	struct:cpu_post_rlwnm_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/srawi.c	/^    ulong cmd;$/;"	m	struct:cpu_post_srawi_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/store.c	/^    ulong cmd;$/;"	m	struct:cpu_post_store_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/three.c	/^    ulong cmd;$/;"	m	struct:cpu_post_three_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/threei.c	/^    ulong cmd;$/;"	m	struct:cpu_post_threei_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/threex.c	/^    ulong cmd;$/;"	m	struct:cpu_post_threex_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/two.c	/^    ulong cmd;$/;"	m	struct:cpu_post_two_s	typeref:typename:ulong	file:
cmd	post/lib_powerpc/twox.c	/^    ulong cmd;$/;"	m	struct:cpu_post_twox_s	typeref:typename:ulong	file:
cmd	tools/aisimage.h	/^	uint32_t cmd;$/;"	m	struct:ais_cmd_func	typeref:typename:uint32_t
cmd	tools/aisimage.h	/^	uint32_t cmd;$/;"	m	struct:ais_cmd_jmpclose	typeref:typename:uint32_t
cmd	tools/aisimage.h	/^	uint32_t cmd;$/;"	m	struct:ais_cmd_load	typeref:typename:uint32_t
cmd	tools/mxsimage.c	/^	char				*cmd;$/;"	m	struct:sb_cmd_list	typeref:typename:char *	file:
cmd	tools/mxsimage.c	/^	struct sb_cmd_ctx		*cmd;$/;"	m	struct:sb_cmd_ctx	typeref:struct:sb_cmd_ctx *	file:
cmd	tools/patman/patman	/^        cmd = gitutil.EmailPatches(series, cover_fname, args,$/;"	v
cmd	tools/patman/patman	/^    cmd = ''$/;"	v
cmd	tools/patman/patman.py	/^        cmd = gitutil.EmailPatches(series, cover_fname, args,$/;"	v
cmd	tools/patman/patman.py	/^    cmd = ''$/;"	v
cmd0csdelay	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd0csdelay;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd0csforce	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd0csforce;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd0csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd0csratio;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd0iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd0iclkout;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd1	drivers/mtd/nand/arasan_nfc.c	/^	u8 cmd1;$/;"	m	struct:arasan_nand_command_format	typeref:typename:u8	file:
cmd10	drivers/ddr/microchip/ddr2_regs.h	/^	u32 cmd10[16];$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32[16]
cmd1csdelay	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd1csdelay;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd1csforce	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd1csforce;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd1csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd1csratio;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd1iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd1iclkout;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd2	drivers/mtd/nand/arasan_nfc.c	/^	u8 cmd2;$/;"	m	struct:arasan_nand_command_format	typeref:typename:u8	file:
cmd20	drivers/ddr/microchip/ddr2_regs.h	/^	u32 cmd20[16];$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32[16]
cmd2csdelay	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd2csdelay;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd2csforce	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd2csforce;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd2csratio	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd2csratio;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd2iclkout	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long cmd2iclkout;$/;"	m	struct:cmd_control	typeref:typename:unsigned long
cmd_addr	drivers/block/pata_bfin.h	/^	unsigned long cmd_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
cmd_addr	drivers/block/sata_dwc.h	/^	void __iomem		*cmd_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
cmd_addr	drivers/block/sata_sil3114.h	/^	unsigned long cmd_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
cmd_addr	include/ahci.h	/^	void __iomem	*cmd_addr;$/;"	m	struct:ahci_ioports	typeref:typename:void __iomem *
cmd_addr0	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_addr0;			\/* 04: I2C_I2C_CMD_ADDR0 *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
cmd_addr0	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_addr0;			\/* 44: DVC_I2C_CMD_ADDR0 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
cmd_addr1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_addr1;			\/* 08: I2C_I2C_CMD_DATA1 *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
cmd_addr1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_addr1;			\/* 48: DVC_I2C_CMD_ADDR1 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
cmd_age_cnt	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 cmd_age_cnt;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
cmd_and_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t cmd_and_id;$/;"	m	struct:mrq_clk_request	typeref:typename:uint32_t
cmd_and_length	drivers/net/e1000.h	/^	uint32_t cmd_and_length;	\/* *\/$/;"	m	struct:e1000_context_desc	typeref:typename:uint32_t
cmd_auto_complete	common/command.c	/^int cmd_auto_complete(const char *const prompt, char *buf, int *np, int *colp)$/;"	f	typeref:typename:int
cmd_beep	board/tqc/tqm5200/cmd_stk52xx.c	/^static int cmd_beep(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cmd_blkc_sub	cmd/blkcache.c	/^static cmd_tbl_t cmd_blkc_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_bmp_sub	cmd/bmp.c	/^static cmd_tbl_t cmd_bmp_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_bootm_sub	cmd/bootm.c	/^static cmd_tbl_t cmd_bootm_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_bootstage_sub	cmd/bootstage.c	/^static cmd_tbl_t cmd_bootstage_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_buf	drivers/mtd/nand/mxs_nand.c	/^	uint8_t		*cmd_buf;$/;"	m	struct:mxs_nand_info	typeref:typename:uint8_t *	file:
cmd_buf	drivers/spi/cadence_qspi.h	/^	u8		cmd_buf[32];$/;"	m	struct:cadence_spi_priv	typeref:typename:u8[32]
cmd_buf	drivers/spi/fsl_espi.c	/^	u8		cmd_buf[16];$/;"	m	struct:fsl_spi_slave	typeref:typename:u8[16]	file:
cmd_call	common/command.c	/^static int cmd_call(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cmd_cat	Makefile	/^cmd_cat = cat $(filter-out $(PHONY), $^) > $@$/;"	m
cmd_cc_eth-raw-os.o	arch/sandbox/cpu/Makefile	/^cmd_cc_eth-raw-os.o = $(CC) $(filter-out -nostdinc, \\$/;"	m
cmd_cc_os.o	arch/sandbox/cpu/Makefile	/^cmd_cc_os.o = $(CC) $(filter-out -nostdinc, \\$/;"	m
cmd_ch_conf_3	drivers/video/ipu_regs.h	/^	u32 cmd_ch_conf_3;$/;"	m	struct:ipu_dc	typeref:typename:u32
cmd_ch_conf_4	drivers/video/ipu_regs.h	/^	u32 cmd_ch_conf_4;$/;"	m	struct:ipu_dc	typeref:typename:u32
cmd_clk_disable_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_disable_request {$/;"	s
cmd_clk_disable_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_disable_response {$/;"	s
cmd_clk_enable_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_enable_request {$/;"	s
cmd_clk_enable_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_enable_response {$/;"	s
cmd_clk_get_all_info_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_all_info_request {$/;"	s
cmd_clk_get_all_info_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_all_info_response {$/;"	s
cmd_clk_get_max_clk_id_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_max_clk_id_request {$/;"	s
cmd_clk_get_max_clk_id_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_max_clk_id_response {$/;"	s
cmd_clk_get_parent_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_parent_request {$/;"	s
cmd_clk_get_parent_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_parent_response {$/;"	s
cmd_clk_get_rate_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_rate_request {$/;"	s
cmd_clk_get_rate_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_get_rate_response {$/;"	s
cmd_clk_is_enabled_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_is_enabled_request {$/;"	s
cmd_clk_is_enabled_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_is_enabled_response {$/;"	s
cmd_clk_round_rate_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_round_rate_request {$/;"	s
cmd_clk_round_rate_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_round_rate_response {$/;"	s
cmd_clk_set_parent_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_set_parent_request {$/;"	s
cmd_clk_set_parent_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_set_parent_response {$/;"	s
cmd_clk_set_rate_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_set_rate_request {$/;"	s
cmd_clk_set_rate_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_clk_set_rate_response {$/;"	s
cmd_clk_sub	cmd/clk.c	/^static cmd_tbl_t cmd_clk_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_complete	drivers/mtd/nand/pxa3xx_nand.c	/^	int			cmd_complete, dev_ready;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
cmd_control	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct cmd_control {$/;"	s
cmd_copy	Makefile	/^      cmd_copy = cp $< $@$/;"	m
cmd_cpp_cfg	Makefile	/^cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \\$/;"	m
cmd_cpp_cfg	arch/arm/imx-common/Makefile	/^      cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $<$/;"	m
cmd_cpp_lds	Makefile	/^cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \\$/;"	m
cmd_cpu_sub	cmd/cpu.c	/^static cmd_tbl_t cmd_cpu_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_crosstools_strip	tools/Makefile	/^      cmd_crosstools_strip = $(STRIP) $^; touch $@$/;"	m
cmd_crosstools_strip	tools/env/Makefile	/^      cmd_crosstools_strip = $(STRIP) $^; touch $@$/;"	m
cmd_ctrl	include/linux/mtd/nand.h	/^	void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);$/;"	m	struct:nand_chip	typeref:typename:void (*)(struct mtd_info * mtd,int dat,unsigned int ctrl)
cmd_ctrl	include/linux/mtd/nand.h	/^	void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);$/;"	m	struct:platform_nand_ctrl	typeref:typename:void (*)(struct mtd_info * mtd,int dat,unsigned int ctrl)
cmd_cycles	drivers/mtd/nand/sunxi_nand.c	/^	int cmd_cycles;$/;"	m	struct:sunxi_nand_chip	typeref:typename:int	file:
cmd_dat_cont	drivers/mmc/mxcmmc.c	/^	u32 cmd_dat_cont;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
cmd_data1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_data1;			\/* 0C: I2C_I2C_CMD_DATA2 *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
cmd_data1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_data1;			\/* 4C: DVC_I2C_CMD_DATA1 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
cmd_data2	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_data2;			\/* 10: DVC_I2C_CMD_DATA2 *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
cmd_data2	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cmd_data2;			\/* 50: DVC_I2C_CMD_DATA2 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
cmd_db2html	doc/DocBook/Makefile	/^      cmd_db2html = xmlto html $(XMLTOFLAGS) -o $(patsubst %.html,%,$@) $< && \\$/;"	m
cmd_db2man	doc/DocBook/Makefile	/^      cmd_db2man = if grep -q refentry $<; then xmlto man $(XMLTOFLAGS) -o $(obj)\/man $< ; fi$/;"	m
cmd_db2pdf	doc/DocBook/Makefile	/^      cmd_db2pdf = $(subst TYPE,pdf, $($(PDF_METHOD)template))$/;"	m
cmd_db2ps	doc/DocBook/Makefile	/^      cmd_db2ps = $(subst TYPE,ps, $($(PS_METHOD)template))$/;"	m
cmd_debugfs_dumpdir_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_debugfs_dumpdir_request {$/;"	s
cmd_debugfs_dumpdir_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_debugfs_dumpdir_response {$/;"	s
cmd_debugfs_fileop_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_debugfs_fileop_request {$/;"	s
cmd_debugfs_fileop_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_debugfs_fileop_response {$/;"	s
cmd_desc	drivers/block/fsl_sata.h	/^	cmd_desc_t	*cmd_desc;		\/* aligned address of command descriptor *\/$/;"	m	struct:fsl_sata	typeref:typename:cmd_desc_t *
cmd_desc	drivers/block/fsl_sata.h	/^typedef struct cmd_desc {$/;"	s
cmd_desc_offset	drivers/block/fsl_sata.h	/^	void		*cmd_desc_offset;	\/* alloc address of command descriptor *\/$/;"	m	struct:fsl_sata	typeref:typename:void *
cmd_desc_t	drivers/block/fsl_sata.h	/^} __attribute__ ((packed)) cmd_desc_t;$/;"	t	typeref:struct:cmd_desc
cmd_disp	board/intercontrol/digsy_mtc/cmd_disp.c	/^static int cmd_disp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cmd_dispatch_info	drivers/usb/gadget/f_fastboot.c	/^static const struct cmd_dispatch_info cmd_dispatch_info[] = {$/;"	v	typeref:typename:const struct cmd_dispatch_info[]	file:
cmd_dispatch_info	drivers/usb/gadget/f_fastboot.c	/^struct cmd_dispatch_info {$/;"	s	file:
cmd_docproc	doc/DocBook/Makefile	/^      cmd_docproc = SRCTREE=$(srctree)\/ $(DOCPROC) doc $< >$@$/;"	m
cmd_ds4510	drivers/misc/ds4510.c	/^cmd_tbl_t cmd_ds4510[] = {$/;"	v	typeref:typename:cmd_tbl_t[]
cmd_efipayload	Makefile	/^cmd_efipayload = $(OBJCOPY) -I binary -O $(EFIPAYLOAD_BFDTARGET) -B $(EFIPAYLOAD_BFDARCH) $< $@$/;"	m
cmd_env_sub	cmd/nvedit.c	/^static cmd_tbl_t cmd_env_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_erase_sector	include/flash.h	/^	uchar   cmd_erase_sector;	\/* vendor specific erase sect. command	*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:uchar
cmd_fifo	drivers/block/ftide020.h	/^	unsigned int	cmd_fifo;	\/* 0x04 - R: Status Reg, W: CMD_FIFO *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
cmd_fig2eps	doc/DocBook/Makefile	/^      cmd_fig2eps = fig2dev -Leps $< $@$/;"	m
cmd_fig2png	doc/DocBook/Makefile	/^      cmd_fig2png = fig2dev -Lpng $< $@$/;"	m
cmd_files	Makefile	/^cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))$/;"	m
cmd_fkt	board/cm5200/cmd_cm5200.c	/^static int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cmd_fkt	board/tqc/tqm5200/cmd_stk52xx.c	/^int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
cmd_func_offset	cmd/ethsw.c	/^	int cmd_func_offset;$/;"	m	struct:keywords_to_function	typeref:typename:int	file:
cmd_function	include/ethsw.h	/^	int (*cmd_function)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_def	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
cmd_get_data_size	common/command.c	/^int cmd_get_data_size(char* arg, int default_size)$/;"	f	typeref:typename:int
cmd_hdr	drivers/block/fsl_sata.h	/^	cmd_hdr_tbl_t	*cmd_hdr;		\/* aligned address of command header table *\/$/;"	m	struct:fsl_sata	typeref:typename:cmd_hdr_tbl_t *
cmd_hdr_entry	drivers/block/fsl_sata.h	/^typedef struct cmd_hdr_entry {$/;"	s
cmd_hdr_entry_t	drivers/block/fsl_sata.h	/^} __attribute__ ((packed)) cmd_hdr_entry_t;$/;"	t	typeref:struct:cmd_hdr_entry
cmd_hdr_tbl	drivers/block/fsl_sata.h	/^typedef struct cmd_hdr_tbl {$/;"	s
cmd_hdr_tbl_offset	drivers/block/fsl_sata.h	/^	void		*cmd_hdr_tbl_offset;	\/* alloc address of command header table *\/$/;"	m	struct:fsl_sata	typeref:typename:void *
cmd_hdr_tbl_t	drivers/block/fsl_sata.h	/^} __attribute__ ((packed)) cmd_hdr_tbl_t;$/;"	t	typeref:struct:cmd_hdr_tbl
cmd_head	tools/mxsimage.c	/^	struct sb_cmd_ctx		*cmd_head;$/;"	m	struct:sb_section_ctx	typeref:struct:sb_cmd_ctx *	file:
cmd_host_sub	cmd/host.c	/^static cmd_tbl_t cmd_host_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_i2c_set_bus_num	cmd/i2c.c	/^static int cmd_i2c_set_bus_num(unsigned int busnum)$/;"	f	typeref:typename:int	file:
cmd_i2c_sub	cmd/i2c.c	/^static cmd_tbl_t cmd_i2c_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_i2c_xfer_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_i2c_xfer_request {$/;"	s
cmd_i2c_xfer_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_i2c_xfer_response {$/;"	s
cmd_ifdtool	Makefile	/^cmd_ifdtool  = $(IFDTOOL) -c -r $(CONFIG_ROM_SIZE) u-boot.tmp;$/;"	m
cmd_in	board/esd/vme8349/caddy.h	/^	uint32_t cmd_in;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
cmd_inkadiag_sub	board/inka4x0/inkadiag.c	/^cmd_tbl_t cmd_inkadiag_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]
cmd_issued	drivers/block/sata_dwc.c	/^	int			cmd_issued[SATA_DWC_QCMD_MAX];$/;"	m	struct:sata_dwc_device_port	typeref:typename:int[]	file:
cmd_keyword	cmd/ethsw.c	/^	enum ethsw_keyword_id cmd_keyword[ETHSW_MAX_CMD_PARAMS];$/;"	m	struct:keywords_to_function	typeref:enum:ethsw_keyword_id[]	file:
cmd_keyword	cmd/ethsw.c	/^	int cmd_keyword[ETHSW_MAX_CMD_PARAMS];$/;"	m	struct:keywords_optional	typeref:typename:int[]	file:
cmd_keywords_check	cmd/ethsw.c	/^static void cmd_keywords_check(struct ethsw_command_def *parsed_cmd,$/;"	f	typeref:typename:void	file:
cmd_keywords_nr	include/ethsw.h	/^	int cmd_keywords_nr;$/;"	m	struct:ethsw_command_def	typeref:typename:int
cmd_keywords_opt_check	cmd/ethsw.c	/^static void cmd_keywords_opt_check(const struct ethsw_command_def *parsed_cmd,$/;"	f	typeref:typename:void	file:
cmd_lcd_brightness	board/pdm360ng/pdm360ng.c	/^static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
cmd_ldr	Makefile	/^cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \\$/;"	m
cmd_len	drivers/spi/cadence_qspi.h	/^	size_t		cmd_len;$/;"	m	struct:cadence_spi_priv	typeref:typename:size_t
cmd_len	drivers/spi/fsl_espi.c	/^	size_t		cmd_len;$/;"	m	struct:fsl_spi_slave	typeref:typename:size_t	file:
cmd_len	drivers/spi/ich.h	/^	int cmd_len;$/;"	m	struct:spi_trans	typeref:typename:int
cmd_line_ptr	arch/x86/include/asm/bootparam.h	/^	__u32	cmd_line_ptr;$/;"	m	struct:setup_header	typeref:typename:__u32
cmd_link_demo	examples/api/Makefile	/^cmd_link_demo = $(LD) --gc-sections -Ttext $(LOAD_ADDR) -o $@ $(filter-out $(PHONY), $^) $(PLATF/;"	m
cmd_link_elf	examples/standalone/Makefile	/^      cmd_link_elf = $(LD) $(LDFLAGS) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \\$/;"	m
cmd_link_init	arch/blackfin/cpu/Makefile	/^      cmd_link_init = $(LD) $(LDFLAGS) -T $^ -o $@$/;"	m
cmd_link_lib	examples/standalone/Makefile	/^      cmd_link_lib = $(LD) $(ld_flags) -r -o $@ $(filter $(LIBOBJS), $^)$/;"	m
cmd_mkalign_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^cmd_mkalign_mxs =							\\$/;"	m
cmd_mkcsfreq_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^cmd_mkcsfreq_mxs =							\\$/;"	m
cmd_mkcst_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^cmd_mkcst_mxs = cst -o $@ < $^						\\$/;"	m
cmd_mkimage	Makefile	/^cmd_mkimage = $(objtree)\/tools\/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \\$/;"	m
cmd_mkivt_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^cmd_mkivt_mxs =								\\$/;"	m
cmd_mkomapsecimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^cmd_mkomapsecimg = $(TI_SECURE_DEV_PKG)\/scripts\/create-boot-image.sh \\$/;"	m
cmd_mkomapsecimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^cmd_mkomapsecimg = echo "WARNING: TI_SECURE_DEV_PKG environment" \\$/;"	m
cmd_mkomapsecimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^cmd_mkomapsecimg = echo "WARNING:" \\$/;"	m
cmd_mmc	cmd/mmc.c	/^static cmd_tbl_t cmd_mmc[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_moc	scripts/kconfig/Makefile	/^      cmd_moc = $(KC_QT_MOC) -i $< -o $@$/;"	m
cmd_mtc	board/intercontrol/digsy_mtc/cmd_mtc.c	/^int cmd_mtc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
cmd_mtc_sub	board/intercontrol/digsy_mtc/cmd_mtc.c	/^cmd_tbl_t cmd_mtc_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]
cmd_objcopy	Makefile	/^cmd_objcopy = $(OBJCOPY) --gap-fill=0xff $(OBJCOPYFLAGS) \\$/;"	m
cmd_omapsecureimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^cmd_omapsecureimg = $(TI_SECURE_DEV_PKG)\/scripts\/secure-binary-image.sh \\$/;"	m
cmd_omapsecureimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^cmd_omapsecureimg = echo "WARNING: TI_SECURE_DEV_PKG environment" \\$/;"	m
cmd_omapsecureimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^cmd_omapsecureimg = echo "WARNING:" \\$/;"	m
cmd_onenand_sub	cmd/onenand.c	/^static cmd_tbl_t cmd_onenand_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_opt_def	cmd/ethsw.c	/^} cmd_opt_def[] = {$/;"	v	typeref:struct:keywords_optional[]
cmd_out	board/esd/vme8349/caddy.h	/^	uint32_t cmd_out;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
cmd_pad_cat	Makefile	/^cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@$/;"	m
cmd_pad_cat	arch/arm/imx-common/Makefile	/^cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@$/;"	m
cmd_pca953x	drivers/gpio/pca953x.c	/^cmd_tbl_t cmd_pca953x[] = {$/;"	v	typeref:typename:cmd_tbl_t[]
cmd_phase	drivers/usb/emul/sandbox_flash.c	/^enum cmd_phase {$/;"	g	file:
cmd_phase	drivers/usb/emul/sandbox_keyb.c	/^enum cmd_phase {$/;"	g	file:
cmd_pll_data	arch/arm/mach-keystone/cmd_clock.c	/^struct pll_init_data cmd_pll_data = {$/;"	v	typeref:struct:pll_init_data
cmd_process	common/command.c	/^enum command_ret_t cmd_process(int flag, int argc, char * const argv[],$/;"	f	typeref:enum:command_ret_t
cmd_process_error	common/command.c	/^int cmd_process_error(cmd_tbl_t *cmdtp, int err)$/;"	f	typeref:typename:int
cmd_pxe_sub	cmd/pxe.c	/^static cmd_tbl_t cmd_pxe_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_queue_len	drivers/mtd/nand/mxs_nand.c	/^	uint32_t	cmd_queue_len;$/;"	m	struct:mxs_nand_info	typeref:typename:uint32_t	file:
cmd_rcgr	arch/arm/mach-snapdragon/clock-apq8016.c	/^	uintptr_t cmd_rcgr;$/;"	m	struct:bcr_regs	typeref:typename:uintptr_t	file:
cmd_read	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,$/;"	m	struct:mipi_dsim_master_ops	typeref:typename:int (*)(struct mipi_dsim_device * dsim,unsigned int data_id,unsigned int data0,unsigned int data1)
cmd_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 cmd_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
cmd_reg1	drivers/mtd/nand/tegra_nand.h	/^	u32	cmd_reg1;	\/* offset 20h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
cmd_reg2	drivers/mtd/nand/tegra_nand.h	/^	u32	cmd_reg2;	\/* offset 24h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
cmd_reg_cache	drivers/net/ks8851_mll.c	/^	u16			cmd_reg_cache;$/;"	m	struct:ks_net	typeref:typename:u16	file:
cmd_reg_cache_int	drivers/net/ks8851_mll.c	/^	u16			cmd_reg_cache_int;$/;"	m	struct:ks_net	typeref:typename:u16	file:
cmd_remoteproc_sub	cmd/remoteproc.c	/^static cmd_tbl_t cmd_remoteproc_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_reset	include/flash.h	/^	ushort	cmd_reset;		\/* vendor specific reset command	*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
cmd_ring	drivers/usb/host/xhci.h	/^	struct xhci_ring *cmd_ring;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_ring *
cmd_rmdirs	Makefile	/^      cmd_rmdirs = rm -rf $(rm-dirs)$/;"	m
cmd_rmfiles	Makefile	/^      cmd_rmfiles = rm -f $(rm-files)$/;"	m
cmd_rpmb	cmd/mmc.c	/^static cmd_tbl_t cmd_rpmb[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_slot	drivers/block/fsl_sata.h	/^	cmd_hdr_entry_t cmd_slot[SATA_HC_MAX_CMD];$/;"	m	struct:cmd_hdr_tbl	typeref:typename:cmd_hdr_entry_t[]
cmd_slot	include/ahci.h	/^	struct ahci_cmd_hdr	*cmd_slot;$/;"	m	struct:ahci_ioports	typeref:struct:ahci_cmd_hdr *
cmd_smap	Makefile	/^cmd_smap = \\$/;"	m
cmd_socboot	Makefile	/^cmd_socboot = cat	spl\/u-boot-spl.sfp spl\/u-boot-spl.sfp	\\$/;"	m
cmd_sound	board/tqc/tqm5200/cmd_stk52xx.c	/^static int cmd_sound(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cmd_sound_sub	cmd/sound.c	/^static cmd_tbl_t cmd_sound_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_spl_export_sub	cmd/spl.c	/^static cmd_tbl_t cmd_spl_export_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_spl_sub	cmd/spl.c	/^static cmd_tbl_t cmd_spl_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_sts	drivers/net/armada100_fec.h	/^	u32 cmd_sts;		\/* Command\/status field *\/$/;"	m	struct:tx_desc	typeref:typename:u32
cmd_sts	drivers/net/armada100_fec.h	/^	u32 cmd_sts;		\/* Descriptor command status *\/$/;"	m	struct:rx_desc	typeref:typename:u32
cmd_sts	drivers/net/mvgbe.h	/^	u32 cmd_sts;		\/* Descriptor command status *\/$/;"	m	struct:mvgbe_rxdesc	typeref:typename:u32
cmd_sts	drivers/net/mvgbe.h	/^	u32 cmd_sts;		\/* Descriptor command status *\/$/;"	m	struct:mvgbe_txdesc	typeref:typename:u32
cmd_sym	Makefile	/^      cmd_sym ?= $(OBJDUMP) -t $< > $@$/;"	m
cmd_table	tools/aisimage.c	/^} cmd_table[] = {$/;"	v	typeref:struct:cmd_table_t[]
cmd_table_t	tools/aisimage.c	/^static struct cmd_table_t {$/;"	s	file:
cmd_tail	tools/mxsimage.c	/^	struct sb_cmd_ctx		*cmd_tail;$/;"	m	struct:sb_section_ctx	typeref:struct:sb_cmd_ctx *	file:
cmd_tbl	include/ahci.h	/^	ulong	cmd_tbl;$/;"	m	struct:ahci_ioports	typeref:typename:ulong
cmd_tbl_s	include/command.h	/^struct cmd_tbl_s {$/;"	s
cmd_tbl_sg	include/ahci.h	/^	struct ahci_sg		*cmd_tbl_sg;$/;"	m	struct:ahci_ioports	typeref:struct:ahci_sg *
cmd_tbl_t	include/command.h	/^typedef struct cmd_tbl_s	cmd_tbl_t;$/;"	t	typeref:struct:cmd_tbl_s
cmd_tca642x	drivers/gpio/tca642x.c	/^cmd_tbl_t cmd_tca642x[] = {$/;"	v	typeref:typename:cmd_tbl_t[]
cmd_thermal_get_num_zones_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_thermal_get_num_zones_response {$/;"	s
cmd_thermal_get_temp_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_thermal_get_temp_request {$/;"	s
cmd_thermal_get_temp_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_thermal_get_temp_response {$/;"	s
cmd_thermal_host_trip_reached_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_thermal_host_trip_reached_request {$/;"	s
cmd_thermal_query_abi_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_thermal_query_abi_request {$/;"	s
cmd_thermal_set_trip_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cmd_thermal_set_trip_request {$/;"	s
cmd_to_keywords	include/ethsw.h	/^	int cmd_to_keywords[ETHSW_MAX_CMD_PARAMS];$/;"	m	struct:ethsw_command_def	typeref:typename:int[]
cmd_trb	drivers/usb/host/xhci.h	/^	volatile __le64 cmd_trb;$/;"	m	struct:xhci_event_cmd	typeref:typename:volatile __le64
cmd_type	drivers/block/fsl_sata.h	/^enum cmd_type {$/;"	g
cmd_u-boot-nand-spl_imx	arch/arm/imx-common/Makefile	/^cmd_u-boot-nand-spl_imx = (printf '\\000\\000\\000\\000\\106\\103\\102\\040\\001' && \\$/;"	m
cmd_u-boot-spl	arch/sandbox/config.mk	/^cmd_u-boot-spl = (cd $(obj) && $(CC) -o $(SPL_BIN) -Wl,-T u-boot-spl.lds \\$/;"	m
cmd_u-boot__	Makefile	/^      cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \\$/;"	m
cmd_u-boot__	arch/sandbox/config.mk	/^cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds \\$/;"	m
cmd_u-boot_payload	Makefile	/^      cmd_u-boot_payload ?= $(LD) $(LDFLAGS_EFI_PAYLOAD) -o $@ \\$/;"	m
cmd_ubifs_umount	cmd/ubifs.c	/^void cmd_ubifs_umount(void)$/;"	f	typeref:typename:void
cmd_usage	common/command.c	/^int cmd_usage(const cmd_tbl_t *cmdtp)$/;"	f	typeref:typename:int
cmd_ut_sub	test/cmd_ut.c	/^static cmd_tbl_t cmd_ut_sub[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
cmd_val0	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 cmd_val0;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
cmd_val1	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 cmd_val1;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
cmd_val2	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 cmd_val2;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
cmd_wav	board/tqc/tqm5200/cmd_stk52xx.c	/^static int cmd_wav(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cmd_wrap	tools/Makefile	/^cmd_wrap = echo "\\#include <..\/$(patsubst $(obj)\/%,%,$@)>" >$@$/;"	m
cmd_write	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,$/;"	m	struct:mipi_dsim_master_ops	typeref:typename:int (*)(struct mipi_dsim_device * dsim,unsigned int data_id,const unsigned char * data0,unsigned int data1)
cmd_yaffs_dev_ls	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_dev_ls(void)$/;"	f	typeref:typename:void
cmd_yaffs_devconfig	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_devconfig(char *_mp, int flash_dev,$/;"	f	typeref:typename:void
cmd_yaffs_ls	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_ls(const char *mountpt, int longlist)$/;"	f	typeref:typename:void
cmd_yaffs_mkdir	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_mkdir(const char *dir)$/;"	f	typeref:typename:void
cmd_yaffs_mount	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_mount(char *mp)$/;"	f	typeref:typename:void
cmd_yaffs_mread_file	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_mread_file(char *fn, char *addr)$/;"	f	typeref:typename:void
cmd_yaffs_mv	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_mv(const char *oldPath, const char *newPath)$/;"	f	typeref:typename:void
cmd_yaffs_mwrite_file	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_mwrite_file(char *fn, char *addr, int size)$/;"	f	typeref:typename:void
cmd_yaffs_read_file	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_read_file(char *fn)$/;"	f	typeref:typename:void
cmd_yaffs_rm	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_rm(const char *path)$/;"	f	typeref:typename:void
cmd_yaffs_rmdir	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_rmdir(const char *dir)$/;"	f	typeref:typename:void
cmd_yaffs_tracemask	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_tracemask(unsigned set, unsigned mask)$/;"	f	typeref:typename:void
cmd_yaffs_umount	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_umount(char *mp)$/;"	f	typeref:typename:void
cmd_yaffs_write_file	fs/yaffs2/yaffs_uboot_glue.c	/^void cmd_yaffs_write_file(char *yaffsName, char bval, int sizeOfFile)$/;"	f	typeref:typename:void
cmd_zobjcopy	Makefile	/^cmd_zobjcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@$/;"	m
cmdarg	drivers/mmc/fsl_esdhc.c	/^	uint    cmdarg;		\/* Command argument register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
cmdarg	include/mmc.h	/^	uint cmdarg;$/;"	m	struct:mmc_cmd	typeref:typename:uint
cmdat	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	cmdat;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
cmdat	drivers/mmc/mxcmmc.c	/^	unsigned int		cmdat;$/;"	m	struct:mxcmci_host	typeref:typename:unsigned int	file:
cmdbuf	common/cli_hush.c	/^	char *cmdbuf;				\/* buffer various argv's point into *\/$/;"	m	struct:pipe	typeref:typename:char *	file:
cmddelay	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	cmddelay;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
cmdedit_set_initial_prompt	common/cli_hush.c	/^static inline void cmdedit_set_initial_prompt(void)$/;"	f	typeref:typename:void	file:
cmdef	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^const struct cm_def *cmdef = (struct cm_def *)CM_DEFAULT_BASE;$/;"	v	typeref:typename:const struct cm_def *
cmdef	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^const struct cm_def *cmdef = (struct cm_def *)CM_DEFAULT_BASE;$/;"	v	typeref:typename:const struct cm_def *
cmdfunc	include/linux/mtd/nand.h	/^	void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,$/;"	m	struct:nand_chip	typeref:typename:void (*)(struct mtd_info * mtd,unsigned command,int column,int page_addr)
cmdidx	include/mmc.h	/^	ushort cmdidx;$/;"	m	struct:mmc_cmd	typeref:typename:ushort
cmdissue	drivers/ddr/microchip/ddr2_regs.h	/^	u32 cmdissue;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
cmdlen	cmd/fdc.c	/^	uchar		cmdlen;		\/* cmd length *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:uchar	file:
cmdlen	include/scsi.h	/^	unsigned char		cmdlen;						\/* command len				*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char
cmdline	arch/arm/include/asm/setup.h	/^		struct tag_cmdline	cmdline;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_cmdline
cmdline	arch/arm/include/asm/setup.h	/^	char	cmdline[1];	\/* this is the minimum size *\/$/;"	m	struct:tag_cmdline	typeref:typename:char[1]
cmdline	arch/avr32/include/asm/setup.h	/^		struct tag_cmdline cmdline;$/;"	m	union:tag::__anon5c2aea39010a	typeref:struct:tag_cmdline
cmdline	arch/avr32/include/asm/setup.h	/^	char	cmdline[1];	\/* this is the minimum size *\/$/;"	m	struct:tag_cmdline	typeref:typename:char[1]
cmdline	arch/nds32/include/asm/setup.h	/^		struct tag_cmdline	cmdline;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_cmdline
cmdline	arch/nds32/include/asm/setup.h	/^	char	cmdline[COMMAND_LINE_SIZE];$/;"	m	struct:tag_cmdline	typeref:typename:char[]
cmdline	include/android_image.h	/^	char cmdline[ANDR_BOOT_ARGS_SIZE];$/;"	m	struct:andr_img_hdr	typeref:typename:char[]
cmdline	scripts/basic/fixdep.c	/^char *cmdline;$/;"	v	typeref:typename:char *
cmdline_end	include/image.h	/^	ulong		cmdline_end;$/;"	m	struct:bootm_headers	typeref:typename:ulong
cmdline_size	arch/x86/include/asm/bootparam.h	/^	__u32	cmdline_size;$/;"	m	struct:setup_header	typeref:typename:__u32
cmdline_start	include/image.h	/^	ulong		cmdline_start;$/;"	m	struct:bootm_headers	typeref:typename:ulong
cmdname	tools/imagetool.h	/^	char *cmdname;$/;"	m	struct:image_tool_params	typeref:typename:char *
cmdpll	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;$/;"	v	typeref:struct:cm_dpll * const
cmdpll	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;$/;"	v	typeref:struct:cm_dpll * const
cmdr	include/atmel_mci.h	/^	u32	cmdr;	\/* 0x14 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
cmdreg	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	cmdreg;		\/* _CMD_XFER_MODE_0 31:16 cmd reg *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
cmdrsp0	drivers/mmc/fsl_esdhc.c	/^	uint    cmdrsp0;	\/* Command response 0 register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
cmdrsp1	drivers/mmc/fsl_esdhc.c	/^	uint    cmdrsp1;	\/* Command response 1 register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
cmdrsp2	drivers/mmc/fsl_esdhc.c	/^	uint    cmdrsp2;	\/* Command response 2 register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
cmdrsp3	drivers/mmc/fsl_esdhc.c	/^	uint    cmdrsp3;	\/* Command response 3 register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
cmds	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 cmds;	\/* port 0\/1 CMD status error *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
cmds	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cmds;	\/* port 0\/1 CMD status error *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
cmdset_amd_init	drivers/mtd/cfi_flash.c	/^static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:int	file:
cmdset_amd_read_jedec_ids	drivers/mtd/cfi_flash.c	/^static void cmdset_amd_read_jedec_ids(flash_info_t *info)$/;"	f	typeref:typename:void	file:
cmdset_intel_init	drivers/mtd/cfi_flash.c	/^static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:int	file:
cmdset_intel_read_jedec_ids	drivers/mtd/cfi_flash.c	/^static void cmdset_intel_read_jedec_ids(flash_info_t *info)$/;"	f	typeref:typename:void	file:
cmdstat	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 cmdstat;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
cmdstat	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 cmdstat;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
cmdstaten	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 cmdstaten;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
cmdstaten	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 cmdstaten;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
cmdstatus	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	cmdstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
cmdstatus	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	cmdstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
cmdstatus	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 cmdstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
cmdstatus	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 cmdstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
cmdstatus	drivers/usb/host/ohci.h	/^	__u32	cmdstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
cmdsts	drivers/net/natsemi.c	/^	vu_long cmdsts;$/;"	m	struct:_BufferDesc	typeref:typename:vu_long	file:
cmdsts	drivers/net/ns8382x.c	/^	vu_long cmdsts;$/;"	m	struct:_BufferDesc	typeref:typename:vu_long	file:
cmdtstat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 cmdtstat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
cmdtstat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 cmdtstat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
cmdtstaten	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 cmdtstaten;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
cmeor	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cmeor;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cmeor	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cmeor;$/;"	m	struct:clkctl	typeref:typename:u32
cmeor	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cmeor;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cmeor0	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cmeor0;$/;"	m	struct:ccm_reg	typeref:typename:u32
cmeor1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cmeor1;$/;"	m	struct:ccm_reg	typeref:typename:u32
cmeor2	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cmeor2;$/;"	m	struct:ccm_reg	typeref:typename:u32
cmeor3	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cmeor3;$/;"	m	struct:ccm_reg	typeref:typename:u32
cmeor4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cmeor4;$/;"	m	struct:ccm_reg	typeref:typename:u32
cmeor5	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cmeor5;$/;"	m	struct:ccm_reg	typeref:typename:u32
cmncr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cmncr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cmncr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cmncr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cmnd	drivers/usb/gadget/f_mass_storage.c	/^	u8			cmnd[MAX_COMMAND_SIZE];$/;"	m	struct:fsg_common	typeref:typename:u8[]	file:
cmnd_size	drivers/usb/gadget/f_mass_storage.c	/^	int			cmnd_size;$/;"	m	struct:fsg_common	typeref:typename:int	file:
cmnd_sts	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 cmnd_sts;$/;"	m	struct:ahb_pciconf	typeref:typename:u32
cmnd_sts	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 cmnd_sts;$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
cmos_checksum_location	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	u32 cmos_checksum_location;$/;"	m	struct:sysinfo_t	typeref:typename:u32
cmos_range_end	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	u32 cmos_range_end;$/;"	m	struct:sysinfo_t	typeref:typename:u32
cmos_range_start	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	u32 cmos_range_start;$/;"	m	struct:sysinfo_t	typeref:typename:u32
cmp	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cmp[3]; 	\/* output compare 1-3 *\/$/;"	m	struct:gpt_regs	typeref:typename:u32[3]
cmp	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 cmp[3];	\/* output compare 1-3 *\/$/;"	m	struct:gpt_regs	typeref:typename:u32[3]
cmp	lib/list_sort.c	/^static int __init cmp(void *priv, struct list_head *a, struct list_head *b)$/;"	f	typeref:typename:int __init	file:
cmp_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 cmp_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
cmp_h	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 cmp_h;$/;"	m	struct:globaltimer	typeref:typename:u32
cmp_l	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 cmp_l; \/* 0x10 *\/$/;"	m	struct:globaltimer	typeref:typename:u32
cmp_label	arch/blackfin/cpu/gpio.c	/^#define cmp_label(/;"	d	file:
cmp_label	arch/blackfin/cpu/gpio.c	/^static int cmp_label(unsigned short ident, const char *label)$/;"	f	typeref:typename:int	file:
cmp_label	drivers/gpio/adi_gpio2.c	/^static int cmp_label(unsigned short ident, const char *label)$/;"	f	typeref:typename:int	file:
cmp_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 cmp_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
cmp_loop	board/kmc/kzm9g/kzm9g.c	/^static int cmp_loop(u32 *addr, u32 data, u32 cmp)$/;"	f	typeref:typename:int	file:
cmp_times	test/dm/rtc.c	/^static int cmp_times(struct rtc_time *expect, struct rtc_time *time, bool show)$/;"	f	typeref:typename:int	file:
cmp_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 cmp_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
cmpa	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short cmpa;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
cmpahr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short cmpahr;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
cmpb	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short cmpb;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
cmpctl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short cmpctl;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
cmper	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;$/;"	v	typeref:struct:cm_perpll * const
cmper	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;$/;"	v	typeref:struct:cm_perpll * const
cmpkey	lib/hashtable.c	/^static int cmpkey(const void *p1, const void *p2)$/;"	f	typeref:typename:int	file:
cmpll	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^const struct cm_pll *cmpll = (struct cm_pll *)CM_PLL_BASE;$/;"	v	typeref:typename:const struct cm_pll *
cmpr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cmpr;	\/* Compare register *\/$/;"	m	struct:epit_regs	typeref:typename:u32
cmpxchg	arch/sh/include/asm/system.h	/^#define cmpxchg(/;"	d
cmr	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 cmr;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
cmr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		cmr;	\/* 0x04 Channel Mode Register *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
cmr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 cmr;		\/* 0x08 Command *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
cmr	include/sja1000.h	/^	u8 cmr;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
cmrtc	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^struct cm_rtc *const cmrtc = (struct cm_rtc *)CM_RTC;$/;"	v	typeref:struct:cm_rtc * const
cms	board/freescale/common/qixis.h	/^	u8 cms[2];	\/* Core Management Space Address Register, 0xD8 *\/$/;"	m	struct:qixis	typeref:typename:u8[2]
cms_sysadr_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 cms_sysadr_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
cmt	fs/ubifs/ubifs.h	/^	unsigned cmt:1;$/;"	m	struct:ubifs_lpt_lprops	typeref:typename:unsigned:1
cmt	fs/ubifs/ubifs.h	/^	unsigned cmt:1;$/;"	m	struct:ubifs_orphan	typeref:typename:unsigned:1
cmt0_timer	arch/sh/lib/time_sh2.c	/^static vu_long cmt0_timer;$/;"	v	typeref:typename:vu_long	file:
cmt_bud_bytes	fs/ubifs/ubifs.h	/^	long long cmt_bud_bytes;$/;"	m	struct:ubifs_info	typeref:typename:long long
cmt_clock_enable	arch/sh/cpu/sh2/cpu.c	/^#define cmt_clock_enable(/;"	d	file:
cmt_no	fs/ubifs/ubifs-media.h	/^	__le64 cmt_no;$/;"	m	struct:ubifs_cs_node	typeref:typename:__le64
cmt_no	fs/ubifs/ubifs-media.h	/^	__le64 cmt_no;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
cmt_no	fs/ubifs/ubifs-media.h	/^	__le64 cmt_no;$/;"	m	struct:ubifs_orph_node	typeref:typename:__le64
cmt_no	fs/ubifs/ubifs.h	/^	unsigned long long cmt_no;$/;"	m	struct:ubifs_info	typeref:typename:unsigned long long
cmt_orphans	fs/ubifs/ubifs.h	/^	int cmt_orphans;$/;"	m	struct:ubifs_info	typeref:typename:int
cmt_state	fs/ubifs/ubifs.h	/^	int cmt_state;$/;"	m	struct:ubifs_info	typeref:typename:int
cmt_timer_start	arch/sh/lib/time_sh2.c	/^static void cmt_timer_start(unsigned int timer)$/;"	f	typeref:typename:void	file:
cmt_timer_stop	arch/sh/lib/time_sh2.c	/^static void cmt_timer_stop(unsigned int timer)$/;"	f	typeref:typename:void	file:
cmt_wq	fs/ubifs/ubifs.h	/^	wait_queue_head_t cmt_wq;$/;"	m	struct:ubifs_info	typeref:typename:wait_queue_head_t
cmu	drivers/soc/keystone/keystone_serdes.c	/^	struct serdes_cfg cmu[SERDES_CMU_CFG_NUM];$/;"	m	struct:cfg_entry	typeref:struct:serdes_cfg[]	file:
cmu1_qa_hw_id	board/cm5200/cm5200.h	/^static char *cmu1_qa_hw_id[HW_ID_ELEM_COUNT] = {$/;"	v	typeref:typename:char * []
cmu_aclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_aclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_aclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_aclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_aclkstop_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_cdrex_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cdrex_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cdrex_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cdrex_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cdrex_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cdrex_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cdrex_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cdrex_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cdrex_spare4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cdrex_spare4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cdrex_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cdrex_version;		\/* 0x10033ff0 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_clkstop_cam_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_cam_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_disp1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_disp1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_disp1_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_fsys2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_fsys_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_fsys_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g2d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g2d_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g2d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g2d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g2d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g2d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g2d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g2d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_g3d_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_gps_alive_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gps_alive_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_gps_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gps_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_gscl_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_isp_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_isp_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_isp_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_lcd0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_lcd0_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_lcd1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_lcd1_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mau_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_maudio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_maudio_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_mfc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_clkstop_msc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_msc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_msc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_msc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_msc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_msc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_msc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_msc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_peric_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_peric_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_peric_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_peric_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_peric_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_peric_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_peric_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_peric_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_psgen_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_psgen_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_psgen_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_psgen_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_psgen_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_psgen_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_psgen_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_psgen_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_tv_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_tv_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_clkstop_wcore_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_wcore_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_wcore_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_wcore_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_wcore_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_wcore_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_clkstop_wcore_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_clkstop_wcore_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cperi_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_spare8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_spare8;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cperi_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cperi_version;		\/* 0x10017ff0 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cpu_aclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_aclkstop_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_aclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_aclkstop_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_aclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_aclkstop_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_aclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_aclkstop_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_sclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_sclkstop_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_sclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_sclkstop_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_sclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_sclkstop_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_sclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_cpu_sclkstop_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_cpu_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cpu_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cpu_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cpu_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cpu_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cpu_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cpu_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cpu_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cpu_spare4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cpu_spare4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_cpu_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_cpu_version;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_g2d_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_g2d_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_g2d_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_g2d_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_g2d_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_g2d_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_g2d_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_g2d_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_g2d_spare4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_g2d_spare4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_g2d_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_g2d_version;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_isp_spar0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spar0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
cmu_isp_spar1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spar1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
cmu_isp_spar2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spar2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
cmu_isp_spar3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spar3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
cmu_isp_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_isp_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_isp_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_isp_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_isp_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_isp_version;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_kfc_aclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_kfc_aclkstop_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_kfc_aclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_kfc_aclkstop_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_kfc_aclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_kfc_aclkstop_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_kfc_aclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_kfc_aclkstop_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_kfc_spare0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_kfc_spare0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_kfc_spare1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_kfc_spare1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_kfc_spare2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_kfc_spare2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_kfc_spare3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_kfc_spare3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_kfc_spare4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_kfc_spare4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_kfc_version	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cmu_kfc_version;		\/* 0x1003bff0 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cmu_reset_cam_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_cam_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_disp1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_disp1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_disp1_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_fsys2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_fsys_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_fsys_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g2d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g2d_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g2d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g2d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g2d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g2d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g2d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g2d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_g3d_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_gps_alive_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gps_alive_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_gps_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gps_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_gscl_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_isp_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_isp_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_isp_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_lcd0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_lcd0_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_lcd1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_lcd1_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mau_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_maudio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_maudio_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_mfc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_msc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_msc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_msc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_msc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_msc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_msc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_msc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_msc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_peric_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_peric_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_peric_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_peric_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_peric_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_peric_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_peric_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_peric_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_psgen_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_psgen_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_psgen_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_psgen_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_psgen_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_psgen_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_psgen_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_psgen_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_reset_tv_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_tv_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_reset_wcore_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_wcore_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_wcore_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_wcore_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_wcore_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_wcore_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_reset_wcore_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_reset_wcore_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cmu_sclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sclkstop_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sclkstop_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_coreblk_toppwr_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_coreblk_toppwr_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_coreblk_toppwr_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_coreblk_toppwr_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_coreblk_toppwr_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_coreblk_toppwr_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_disp1_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_disp1_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_disp1_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_disp1_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_disp1_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_disp1_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_fsys2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_fsys2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_fsys2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_fsys2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_fsys2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_fsys2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_fsys_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_fsys_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_fsys_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_fsys_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_fsys_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_fsys_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g2d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g2d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g2d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g2d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g2d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g2d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g3d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g3d_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g3d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g3d_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g3d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_g3d_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_gscl_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_isp_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_isp_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_isp_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_isp_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_isp_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_isp_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mau_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mau_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mau_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mau_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mau_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mau_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mfc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mfc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mfc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mfc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mfc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_mfc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cmu_sysclk_msc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_msc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_msc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_msc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_msc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_msc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_peric_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_peric_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_peric_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_peric_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_peric_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_peric_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_psgen_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_psgen_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_psgen_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_psgen_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_psgen_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_psgen_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_toppwr_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_toppwr_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_toppwr_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_toppwr_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_toppwr_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_toppwr_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_toppwr_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_toppwr_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_wcore_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_wcore_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_wcore_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_wcore_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmu_sysclk_wcore_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cmu_sysclk_wcore_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cmucrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 cmucrc;		\/* 0x0F8 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
cmwkup	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;$/;"	v	typeref:struct:cm_wkuppll * const
cmwkup	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;$/;"	v	typeref:struct:cm_wkuppll * const
cmx_fcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	cmx_fcr;$/;"	m	struct:cpmux	typeref:typename:uint
cmx_scr	arch/powerpc/include/asm/immap_8260.h	/^	uint	cmx_scr;$/;"	m	struct:cpmux	typeref:typename:uint
cmx_si1cr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	cmx_si1cr;$/;"	m	struct:cpmux	typeref:typename:u_char
cmx_si2cr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	cmx_si2cr;$/;"	m	struct:cpmux	typeref:typename:u_char
cmx_smr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	cmx_smr;$/;"	m	struct:cpmux	typeref:typename:u_char
cmx_uar	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cmx_uar;$/;"	m	struct:cpmux	typeref:typename:ushort
cmxfcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cmxfcr;$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u32
cmxfcr_mask	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	ulong cmxfcr_mask;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cmxfcr_mask	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	ulong cmxfcr_mask;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cmxfcr_value	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	ulong cmxfcr_value;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cmxfcr_value	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	ulong cmxfcr_value;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cmxgcr	include/linux/immap_qe.h	/^	u32 cmxgcr;		\/* CMX general clock route register    *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxscr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cmxscr;$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u32
cmxsi1cr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	cmxsi1cr;$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u8
cmxsi1cr_h	include/linux/immap_qe.h	/^	u32 cmxsi1cr_h;		\/* CMX SI1 clock route high register   *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxsi1cr_l	include/linux/immap_qe.h	/^	u32 cmxsi1cr_l;		\/* CMX SI1 clock route low register    *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxsi1syr	include/linux/immap_qe.h	/^	u32 cmxsi1syr;		\/* CMX SI1 SYNC route register         *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxsi2cr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	cmxsi2cr;$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u8
cmxuar	arch/powerpc/include/asm/immap_85xx.h	/^	u16	cmxuar;$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u16
cmxucr1	include/linux/immap_qe.h	/^	u32 cmxucr1;		\/* CMX UCC1, UCC3 clock route register *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxucr2	include/linux/immap_qe.h	/^	u32 cmxucr2;		\/* CMX UCC5, UCC7 clock route register *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxucr3	include/linux/immap_qe.h	/^	u32 cmxucr3;		\/* CMX UCC2, UCC4 clock route register *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxucr4	include/linux/immap_qe.h	/^	u32 cmxucr4;		\/* CMX UCC6, UCC8 clock route register *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cmxupcr	include/linux/immap_qe.h	/^	u32 cmxupcr;		\/* CMX UPC clock route register        *\/$/;"	m	struct:qe_mux	typeref:typename:u32
cnapcrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cnapcrl;	\/* Core Nap Control *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cnapsrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cnapsrl;	\/* Core Nap Status *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cncon	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic cncon;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
cncon	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic cncon;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
cnext	fs/ubifs/ubifs.h	/^	struct ubifs_cnode *cnext;$/;"	m	struct:ubifs_cnode	typeref:struct:ubifs_cnode *
cnext	fs/ubifs/ubifs.h	/^	struct ubifs_cnode *cnext;$/;"	m	struct:ubifs_nnode	typeref:struct:ubifs_cnode *
cnext	fs/ubifs/ubifs.h	/^	struct ubifs_cnode *cnext;$/;"	m	struct:ubifs_pnode	typeref:struct:ubifs_cnode *
cnext	fs/ubifs/ubifs.h	/^	struct ubifs_orphan *cnext;$/;"	m	struct:ubifs_orphan	typeref:struct:ubifs_orphan *
cnext	fs/ubifs/ubifs.h	/^	struct ubifs_znode *cnext;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_znode *
cnext	fs/ubifs/ubifs.h	/^	struct ubifs_znode *cnext;$/;"	m	struct:ubifs_znode	typeref:struct:ubifs_znode *
cnfg	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cnfg;			\/* 00: I2C_I2C_CNFG *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
cnfg	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 cnfg;			\/* 40: DVC_I2C_CNFG *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
cnode	fs/ubifs/lpt.c	/^		struct ubifs_cnode *cnode;$/;"	m	union:lpt_scan_node::__anonbef95ef6020a	typeref:struct:ubifs_cnode *	file:
cnode	fs/ubifs/lpt.c	/^		struct ubifs_cnode cnode;$/;"	m	union:lpt_scan_node::__anonbef95ef6010a	typeref:struct:ubifs_cnode	file:
cnode	fs/ubifs/ubifs.h	/^		struct ubifs_cnode *cnode;$/;"	m	union:ubifs_nbranch::__anonf648d0840e0a	typeref:struct:ubifs_cnode *
cnpd	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic cnpd;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
cnpd	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic cnpd;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
cnpu	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic cnpu;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
cnpu	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic cnpu;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
cnr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cnr;	\/* Counter Register *\/$/;"	m	struct:pwm_regs	typeref:typename:u32
cnr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cnr;	\/* Counter register *\/$/;"	m	struct:epit_regs	typeref:typename:u32
cnr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cnr;$/;"	m	struct:pwm_regs	typeref:typename:u32
cnr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 cnr;		\/* control register *\/$/;"	m	struct:rtclk83xx	typeref:typename:u32
cnr1	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cnr1;		\/* Timer1 Counter Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cnr2	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cnr2;		\/* Timer2 Counter Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cnr3	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cnr3;		\/* Timer3 Counter Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cnr4	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cnr4;		\/* Timer4 Counter Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cnt	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short cnt;             \/* 0x98 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
cnt	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short cnt;	\/* 0x18 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
cnt	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short cnt;		\/* 0x98 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
cnt	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short cnt;		\/* 0x98 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
cnt	arch/arm/include/asm/arch-rockchip/pwm.h	/^	u32 cnt;$/;"	m	struct:rk3288_pwm	typeref:typename:u32
cnt	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 cnt;$/;"	m	struct:gpt_regs	typeref:typename:u32
cnt	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 cnt;$/;"	m	struct:gpt_regs	typeref:typename:u32
cnt	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 cnt;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
cnt	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 cnt;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
cnt	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 cnt;$/;"	m	struct:gptmr	typeref:typename:u16
cnt	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cnt;		\/* 0x08 *\/$/;"	m	struct:slt	typeref:typename:u32
cnt	drivers/block/sata_sil.h	/^	__le32 cnt;$/;"	m	struct:sil_sge	typeref:typename:__le32
cnt	drivers/misc/status_led.c	/^	int cnt;$/;"	m	struct:__anonb49c34f70108	typeref:typename:int	file:
cnt	fs/ubifs/ubifs.h	/^	int cnt;$/;"	m	struct:bu_info	typeref:typename:int
cnt	fs/ubifs/ubifs.h	/^	int cnt;$/;"	m	struct:ubifs_lpt_heap	typeref:typename:int
cnt	include/dwmmc.h	/^	u32 cnt;$/;"	m	struct:dwmci_idmac	typeref:typename:u32
cnt	include/lmb.h	/^	unsigned long cnt;$/;"	m	struct:lmb_region	typeref:typename:unsigned long
cnt	include/sh_pfc.h	/^	unsigned long *cnt;$/;"	m	struct:pinmux_cfg_reg	typeref:typename:unsigned long *
cnt0	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 cnt0;		\/* 0x84 *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
cnt0	arch/arm/include/asm/arch/timer.h	/^	u32 cnt0;		\/* 0x84 *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
cnt0	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt0;		\/* 0x0C Channel 0 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt1	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 cnt1;		\/* 0x88 *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
cnt1	arch/arm/include/asm/arch/timer.h	/^	u32 cnt1;		\/* 0x88 *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
cnt1	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt1;		\/* 0x0D Channel 1 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt2	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt2;		\/* 0x0E Channel 2 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt3	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt3;		\/* 0x0F Channel 3 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt4	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt4;		\/* 0x10 Channel 4 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt5	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt5;		\/* 0x11 Channel 5 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt6	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt6;		\/* 0x12 Channel 6 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt64	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_64cnt cnt64;	\/* 0xa0 *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_64cnt
cnt64	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_64cnt cnt64;	\/* 0xa0 *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_64cnt
cnt64_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 cnt64_ctrl;		\/* 0x280 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cnt64_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 cnt64_ctrl;		\/* 0x280 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cnt64_high	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 cnt64_high;		\/* 0x288 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cnt64_high	arch/arm/include/asm/arch/cpucfg.h	/^	u32 cnt64_high;		\/* 0x288 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cnt64_low	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 cnt64_low;		\/* 0x284 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cnt64_low	arch/arm/include/asm/arch/cpucfg.h	/^	u32 cnt64_low;		\/* 0x284 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cnt7	arch/m68k/include/asm/immap_5301x.h	/^	u8 cnt7;		\/* 0x13 Channel 7 Counter *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cnt_h	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 cnt_h;$/;"	m	struct:globaltimer	typeref:typename:u32
cnt_l	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 cnt_l; \/* 0x00 *\/$/;"	m	struct:globaltimer	typeref:typename:u32
cnt_lock	fs/ubifs/ubifs.h	/^	spinlock_t cnt_lock;$/;"	m	struct:ubifs_info	typeref:typename:spinlock_t
cnt_write	arch/sh/cpu/sh4/watchdog.c	/^static void cnt_write(unsigned char value)$/;"	f	typeref:typename:void	file:
cntcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cntcr;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cntcr;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcr	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 cntcr;		\/* 0x00: SYSCTR0_CNTCR Counter Control *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcr	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 cntcr;		\/* 0x00: SYSCTR0_CNTCR Counter Control *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcr	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 cntcr;		\/* 0x00: SYSCTR0_CNTCR Counter Control *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcr	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntcr;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcv0	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 cntcv0;		\/* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcv0	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 cntcv0;		\/* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcv0	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 cntcv0;		\/* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcv1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cntcv1;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcv1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cntcv1;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcv1	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 cntcv1;		\/* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcv1	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 cntcv1;		\/* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcv1	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 cntcv1;		\/* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntcv1	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntcv1;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcv2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cntcv2;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcv2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cntcv2;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntcv2	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntcv2;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntenc_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntenc_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
cntenc_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntenc_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
cntenc_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntenc_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
cntenc_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntenc_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
cntens_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntens_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
cntens_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntens_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
cntens_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntens_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
cntens_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int cntens_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
cntfid0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cntfid0;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntfid0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cntfid0;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntfid0	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 cntfid0;		\/* 0x20: SYSCTR0_CNTFID0 Freq Table Entry *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntfid0	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 cntfid0;		\/* 0x20: SYSCTR0_CNTFID0 Freq Table Entry *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntfid0	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 cntfid0;		\/* 0x20: SYSCTR0_CNTFID0 Freq Table Entry *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntfid0	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntfid0;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntfid1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cntfid1;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntfid1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cntfid1;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntfid1	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 cntfid1;		\/* 0x24: SYSCTR0_CNTFID1 Freq Table End *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntfid1	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 cntfid1;		\/* 0x24: SYSCTR0_CNTFID1 Freq Table End *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntfid1	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 cntfid1;		\/* 0x24: SYSCTR0_CNTFID1 Freq Table End *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntfid1	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntfid1;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntfid2	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntfid2;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntl	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 cntl;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
cntl	drivers/serial/serial_bcm283x_mu.c	/^	u32 cntl;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
cntr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cntr;$/;"	m	struct:gpc	typeref:typename:u32
cntr	arch/m68k/include/asm/immap_520x.h	/^	u16 cntr;		\/* 0x04 Count *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
cntr	arch/m68k/include/asm/immap_5235.h	/^	u16 cntr;		\/* 0x04 Count register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
cntr	arch/m68k/include/asm/immap_5329.h	/^	u16 cntr;		\/* 0x04 Count register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
cntr_1us	arch/arm/include/asm/arch-tegra/tegra.h	/^	unsigned int cntr_1us;$/;"	m	struct:timerus	typeref:typename:unsigned int
cntrl	drivers/net/xilinx_axi_emac.c	/^	u32 cntrl;	\/* Control *\/$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
cntsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cntsr;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cntsr;$/;"	m	struct:sctr_regs	typeref:typename:u32
cntsr	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 cntsr;		\/* 0x04: SYSCTR0_CNTSR Counter Status *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntsr	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 cntsr;		\/* 0x04: SYSCTR0_CNTSR Counter Status *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntsr	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 cntsr;		\/* 0x04: SYSCTR0_CNTSR Counter Status *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32
cntsr	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 cntsr;$/;"	m	struct:sctr_regs	typeref:typename:u32
cnvrt2	cmd/date.c	/^static int cnvrt2 (const char *str, int *valp)$/;"	f	typeref:typename:int	file:
co	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 co;$/;"	m	struct:wdog_regs	typeref:typename:u32
coalesce	drivers/usb/eth/r8152.h	/^	u32 coalesce;$/;"	m	struct:r8152	typeref:typename:u32
code	arch/arm/lib/zimage.c	/^	uint32_t	code[9];$/;"	m	struct:arm_z_header	typeref:typename:uint32_t[9]	file:
code	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 code;$/;"	m	struct:bcm2835_mbox_hdr	typeref:typename:u32
code	arch/sandbox/lib/bootm.c	/^	uint32_t	code[9];$/;"	m	struct:arm_z_header	typeref:typename:uint32_t[9]	file:
code	board/gdsys/p1022/controlcenterd-id.c	/^	uint8_t code[];$/;"	m	struct:key_program	typeref:typename:uint8_t[]	file:
code	common/cli_hush.c	/^	int code;$/;"	m	struct:reserved_combo	typeref:typename:int	file:
code	fs/yaffs2/yaffs_error.c	/^	int code;$/;"	m	struct:error_entry	typeref:typename:int	file:
code	include/ec_commands.h	/^	uint16_t code;$/;"	m	struct:ec_response_port80_last_boot	typeref:typename:uint16_t
code	include/net.h	/^	u8		code;$/;"	m	struct:icmp_hdr	typeref:typename:u8
code	include/slre.h	/^	unsigned char	code[256];$/;"	m	struct:slre	typeref:typename:unsigned char[256]
code	lib/bzip2/bzlib_private.h	/^      Int32    code    [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32[][]
code	lib/lzma/LzmaDec.h	/^  UInt32 range, code;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:UInt32
code	lib/zlib/deflate.h	/^        ush  code;       \/* bit string *\/$/;"	m	union:ct_data_s::__anonaf16f3d6010a	typeref:typename:ush
code	lib/zlib/inftrees.h	/^} code;$/;"	t	typeref:struct:__anon4cf584e10108
code	tools/mksunxiboot.c	/^	char code[SRAM_LOAD_MAX_SIZE];$/;"	m	struct:boot_img	typeref:typename:char[]	file:
code0	cmd/booti.c	/^	uint32_t	code0;		\/* Executable code *\/$/;"	m	struct:Image_header	typeref:typename:uint32_t	file:
code1	cmd/booti.c	/^	uint32_t	code1;		\/* Executable code *\/$/;"	m	struct:Image_header	typeref:typename:uint32_t	file:
code32_start	arch/x86/include/asm/bootparam.h	/^	__u32	code32_start;$/;"	m	struct:setup_header	typeref:typename:__u32
code32start	arch/x86/cpu/start16.S	/^code32start:$/;"	l
code64	arch/x86/cpu/call64.S	/^code64:$/;"	l
code_acquire_bpid	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);$/;"	v	typeref:struct:qb_attr_code	file:
code_acquire_num	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);$/;"	v	typeref:struct:qb_attr_code	file:
code_acquire_r_num	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);$/;"	v	typeref:struct:qb_attr_code	file:
code_base	arch/arm/mach-exynos/sec_boot.S	/^code_base:$/;"	l
code_build_number	arch/x86/include/asm/me_common.h	/^	u16 code_build_number;$/;"	m	struct:me_fw_version	typeref:typename:u16
code_count	include/jffs2/mini_inflate.h	/^	int  code_count[8];$/;"	m	struct:bitstream	typeref:typename:int[8]
code_crc	board/gdsys/p1022/controlcenterd-id.c	/^	uint32_t code_crc;$/;"	m	struct:key_program	typeref:typename:uint32_t	file:
code_dqrr_response	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);$/;"	v	typeref:struct:qb_attr_code	file:
code_dqrr_stat	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);$/;"	v	typeref:struct:qb_attr_code	file:
code_dqrr_verb	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);$/;"	v	typeref:struct:qb_attr_code	file:
code_end	arch/arm/mach-exynos/sec_boot.S	/^code_end:$/;"	l
code_eq_cmd	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_orp_en	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_qd_bin	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_qd_en	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_qd_pri	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_rsp_lo	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_rsp_stash	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);$/;"	v	typeref:struct:qb_attr_code	file:
code_eq_tgt_id	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);$/;"	v	typeref:struct:qb_attr_code	file:
code_first	include/jffs2/mini_inflate.h	/^	int  code_first[8];$/;"	m	struct:bitstream	typeref:typename:int[8]
code_generic_rslt	drivers/net/fsl-mc/dpio/qbman_portal.c	/^struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);$/;"	v	typeref:struct:qb_attr_code
code_generic_verb	drivers/net/fsl-mc/dpio/qbman_portal.c	/^struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);$/;"	v	typeref:struct:qb_attr_code
code_hot_fix	arch/x86/include/asm/me_common.h	/^	u16 code_hot_fix;$/;"	m	struct:me_fw_version	typeref:typename:u16
code_length	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 code_length;	\/* length of the code *\/$/;"	m	struct:wb_header	typeref:typename:u32
code_lengths	include/jffs2/mini_inflate.h	/^	int  code_lengths[19];$/;"	m	struct:bitstream	typeref:typename:int[19]
code_major	arch/x86/include/asm/me_common.h	/^	u16 code_major;$/;"	m	struct:me_fw_version	typeref:typename:u16
code_minor	arch/x86/include/asm/me_common.h	/^	u16 code_minor;$/;"	m	struct:me_fw_version	typeref:typename:u16
code_offset	include/fsl_qe.h	/^		u32 code_offset;\/* Offset of the actual microcode *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u32
code_pos	include/jffs2/mini_inflate.h	/^	int  code_pos[8];$/;"	m	struct:bitstream	typeref:typename:int[8]
code_pull_dct	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_dqsource	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_dt	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_numframes	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_rls	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_rsp_lo	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_stash	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);$/;"	v	typeref:struct:qb_attr_code	file:
code_pull_token	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);$/;"	v	typeref:struct:qb_attr_code	file:
code_release_bpid	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);$/;"	v	typeref:struct:qb_attr_code	file:
code_release_set_me	drivers/net/fsl-mc/dpio/qbman_portal.c	/^static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);$/;"	v	typeref:struct:qb_attr_code	file:
code_sdqcr_dct	drivers/net/fsl-mc/dpio/qbman_portal.c	/^struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);$/;"	v	typeref:struct:qb_attr_code
code_sdqcr_fc	drivers/net/fsl-mc/dpio/qbman_portal.c	/^struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);$/;"	v	typeref:struct:qb_attr_code
code_sdqcr_tok	drivers/net/fsl-mc/dpio/qbman_portal.c	/^struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);$/;"	v	typeref:struct:qb_attr_code
code_size	board/gdsys/p1022/controlcenterd-id.c	/^	uint32_t code_size;$/;"	m	struct:key_program	typeref:typename:uint32_t	file:
code_size	include/slre.h	/^	int		code_size;$/;"	m	struct:slre	typeref:typename:int
code_size	tools/proftool.c	/^	unsigned long code_size;$/;"	m	struct:func_info	typeref:typename:unsigned long	file:
code_symbols	include/jffs2/mini_inflate.h	/^	int  code_symbols[19];$/;"	m	struct:bitstream	typeref:typename:int[19]
codec	arch/arm/dts/sun4i-a10.dtsi	/^		codec: codec@01c22c00 {$/;"	l
codec	arch/arm/dts/sun5i.dtsi	/^		codec: codec@01c22c00 {$/;"	l
codec	arch/arm/dts/sun7i-a20.dtsi	/^		codec: codec@01c22c00 {$/;"	l
codec_clk	arch/arm/dts/sun4i-a10.dtsi	/^		codec_clk: clk@01c20140 {$/;"	l
codec_clk	arch/arm/dts/sun5i.dtsi	/^		codec_clk: clk@01c20140 {$/;"	l
codec_clk	arch/arm/dts/sun7i-a20.dtsi	/^		codec_clk: clk@01c20140 {$/;"	l
codec_init	drivers/sound/sound-i2s.c	/^static int codec_init(const void *blob, struct i2stx_info *pi2s_tx)$/;"	f	typeref:typename:int	file:
codec_pa_pin	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	codec_pa_pin: codec_pa_pin@0 {$/;"	l
codec_pa_pin	arch/arm/dts/sun4i-a10-gemei-g9.dts	/^	codec_pa_pin: codec_pa_pin@0 {$/;"	l
codec_pa_pin	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	codec_pa_pin: codec_pa_pin@0 {$/;"	l
codec_pa_pin	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	codec_pa_pin: codec_pa_pin@0 {$/;"	l
codec_pa_pin	arch/arm/dts/sun7i-a20-wexler-tab7200.dts	/^	codec_pa_pin: codec_pa_pin@0 {$/;"	l
codec_type	include/sound.h	/^	enum en_sound_codec codec_type;$/;"	m	struct:sound_codec_info	typeref:enum:en_sound_codec
codeccr	arch/m68k/include/asm/immap_5301x.h	/^	u16 codeccr;		\/* 0x16 Codec Control *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
codes	include/jffs2/mini_inflate.h	/^	struct huffman_set codes;$/;"	m	struct:bitstream	typeref:struct:huffman_set
codes	lib/zlib/inflate.h	/^    code codes[ENOUGH];         \/* space for code tables *\/$/;"	m	struct:inflate_state	typeref:typename:code[]
codetype	lib/zlib/inftrees.h	/^} codetype;$/;"	t	typeref:enum:__anon4cf584e10203
codeword_size	include/linux/mtd/nand.h	/^	u8 codeword_size;$/;"	m	struct:jedec_ecc_info	typeref:typename:u8
codeword_size	include/linux/mtd/nand.h	/^	u8 codeword_size;$/;"	m	struct:onfi_ext_ecc_info	typeref:typename:u8
codr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	codr;		\/* 0x34 Clear Output Data Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
codr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 codr;		\/* 0x14 PIO Clear Output Data Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
coeff	drivers/video/ipu_disp.c	/^	const int (*coeff)[5][3];$/;"	m	struct:dp_csc_param_t	typeref:typename:const int (*)[5]	file:
coherency_required	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t coherency_required; \/* See PAACE_DA_* *\/$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310208	typeref:typename:uint8_t
col	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 col;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
col	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 col;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
col	board/mpl/pip405/pip405.c	/^	const unsigned char col;$/;"	m	struct:__anonb110a3780308	typeref:typename:const unsigned char	file:
col	board/tqc/tqm834x/tqm834x.c	/^		long col;$/;"	m	struct:get_ddr_bank_size::__anon959caf850108	typeref:typename:long	file:
col	drivers/misc/cros_ec_sandbox.c	/^	int col;	\/* key matrix column *\/$/;"	m	struct:ec_keymatrix_entry	typeref:typename:int	file:
col	include/ec_commands.h	/^	uint8_t col;$/;"	m	struct:ec_params_mkbp_simulate_key	typeref:typename:uint8_t
col	include/key_matrix.h	/^	uint8_t col;	\/* column number (0 = first) *\/$/;"	m	struct:key_matrix_key	typeref:typename:uint8_t
col	tools/patman/patman	/^    col = terminal.Color()$/;"	v
col	tools/patman/patman.py	/^    col = terminal.Color()$/;"	v
col0	include/fsl_ifc.h	/^	u32 col0;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
col1	include/fsl_ifc.h	/^	u32 col1;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
col2	include/fsl_ifc.h	/^	u32 col2;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
col3	include/fsl_ifc.h	/^	u32 col3;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
colIdx	scripts/kconfig/qconf.h	/^enum colIdx {$/;"	g
colMap	scripts/kconfig/qconf.h	/^	int colMap[colNr];$/;"	m	class:ConfigList	typeref:typename:int[]
colNr	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
colRevMap	scripts/kconfig/qconf.h	/^	int colRevMap[colNr];$/;"	m	class:ConfigList	typeref:typename:int[]
col_addr	drivers/mtd/nand/mxc_nand.c	/^	uint16_t			col_addr;$/;"	m	struct:mxc_nand_host	typeref:typename:uint16_t	file:
col_addr_cycles	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		col_addr_cycles;$/;"	m	struct:pxa3xx_nand_host	typeref:typename:unsigned int	file:
col_bits	arch/avr32/include/asm/sdram.h	/^	uint8_t row_bits, col_bits, bank_bits;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
col_cfg	include/tegra-kbc.h	/^	u32 col_cfg[3];$/;"	m	struct:kbc_tegra	typeref:typename:u32[3]
col_lookup	arch/arm/imx-common/cpu.c	/^static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9};$/;"	v	typeref:typename:const unsigned char[]	file:
col_parity	fs/yaffs2/yaffs_ecc.h	/^	unsigned char col_parity;$/;"	m	struct:yaffs_ecc_other	typeref:typename:unsigned char
col_sz	arch/arm/include/asm/emif.h	/^	u8	col_sz[2]; \/* One entry each for x32 and x16 *\/$/;"	m	struct:lpddr2_addressing	typeref:typename:u8[2]
coladdr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 coladdr;	\/* col address bits (9-12) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
coladdr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 coladdr;	\/* col address bits (9-12) *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u8
colbar	drivers/video/fsl_dcu_fb.c	/^	u32 colbar[8];$/;"	m	struct:dcu_reg	typeref:typename:u32[8]	file:
colc	drivers/net/e1000.h	/^	uint64_t colc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
cold_reset	include/linux/mtd/samsung_onenand.h	/^	unsigned int	cold_reset;	\/* 0x02A0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
coldfire_serial_getc	drivers/serial/mcfuart.c	/^static int coldfire_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
coldfire_serial_ops	drivers/serial/mcfuart.c	/^static const struct dm_serial_ops coldfire_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
coldfire_serial_pending	drivers/serial/mcfuart.c	/^static int coldfire_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
coldfire_serial_platdata	include/dm/platform_data/serial_coldfire.h	/^struct coldfire_serial_platdata {$/;"	s
coldfire_serial_probe	drivers/serial/mcfuart.c	/^static int coldfire_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
coldfire_serial_putc	drivers/serial/mcfuart.c	/^static int coldfire_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
coldfire_serial_setbrg	drivers/serial/mcfuart.c	/^int coldfire_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
colibri_t30_padctrl	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^static struct pmux_drvgrp_config colibri_t30_padctrl[] = {$/;"	v	typeref:struct:pmux_drvgrp_config[]
colibri_vf_cr_settings	board/toradex/colibri_vf/colibri_vf.c	/^static struct ddrmc_cr_setting colibri_vf_cr_settings[] = {$/;"	v	typeref:struct:ddrmc_cr_setting[]	file:
collect	include/ec_commands.h	/^		} collect;$/;"	m	union:ec_params_keyscan_seq_ctrl::__anon71a6b267060a	typeref:struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670908
collect	include/ec_commands.h	/^		} collect;$/;"	m	union:ec_result_keyscan_seq_ctrl::__anon71a6b2670a0a	typeref:struct:ec_result_keyscan_seq_ctrl::__anon71a6b2670a0a::__anon71a6b2670b08
collect_files	scripts/setlocalversion	/^collect_files()$/;"	f
collect_langs	drivers/usb/gadget/composite.c	/^static void collect_langs(struct usb_gadget_strings **sp, __le16 *buf)$/;"	f	typeref:typename:void	file:
collisions	include/linux/netdevice.h	/^	unsigned long	collisions;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
color	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 color;$/;"	m	struct:dma4_chan	typeref:typename:u32
color	include/ec_commands.h	/^	struct rgb_s color[8];			\/* 0-3 are Google colors *\/$/;"	m	struct:lightbar_params	typeref:struct:rgb_s[8]
color	include/linux/fb.h	/^	__u32 color;$/;"	m	struct:fb_fillrect	typeref:typename:__u32
color	scripts/kconfig/gconf.c	/^GdkColor color;$/;"	v	typeref:typename:GdkColor
color_blue_cb	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	color_blue_cb;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
color_burst	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 color_burst;		\/* 0x100 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
color_burst	arch/arm/include/asm/arch/display.h	/^	u32 color_burst;		\/* 0x100 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
color_characteristics	include/edid.h	/^	unsigned char color_characteristics[10];$/;"	m	struct:edid1_info	typeref:typename:unsigned char[10]
color_coefficient	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum color_coefficient {$/;"	g
color_depth	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum color_depth {$/;"	g
color_depth	arch/arm/include/asm/arch-tegra/dc.h	/^	uint color_depth;		\/* _WIN_COLOR_DEPTH_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
color_depth	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int color_depth;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
color_depth	include/vbe.h	/^	u8 color_depth;	\/* color depth in bits per pixel *\/$/;"	m	struct:vbe_screen_info	typeref:typename:u8
color_depth	include/vbe.h	/^	u8 color_depth;$/;"	m	struct:vbe_screen_info_input	typeref:typename:u8
color_green_y	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	color_green_y;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
color_key	drivers/video/mxcfb.h	/^	__u32 color_key;$/;"	m	struct:mxcfb_color_key	typeref:typename:__u32
color_key0_lower	arch/arm/include/asm/arch-tegra/dc.h	/^	uint color_key0_lower;		\/* _DISP_COLOR_KEY0_LOWER_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
color_key0_upper	arch/arm/include/asm/arch-tegra/dc.h	/^	uint color_key0_upper;		\/* _DISP_COLOR_KEY0_UPPER_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
color_key1_lower	arch/arm/include/asm/arch-tegra/dc.h	/^	uint color_key1_lower;		\/* _DISP_COLOR_KEY1_LOWER_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
color_key1_upper	arch/arm/include/asm/arch-tegra/dc.h	/^	uint color_key1_upper;		\/* _DISP_COLOR_KEY1_UPPER_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
color_key_4rgb	drivers/video/ipu_disp.c	/^static int color_key_4rgb = 1;$/;"	v	typeref:typename:int	file:
color_key_config	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 color_key_config;		\/* 0x888 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
color_key_config	arch/arm/include/asm/arch/display.h	/^	u32 color_key_config;		\/* 0x888 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
color_key_max	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 color_key_max;		\/* 0x880 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
color_key_max	arch/arm/include/asm/arch/display.h	/^	u32 color_key_max;		\/* 0x880 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
color_key_min	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 color_key_min;		\/* 0x884 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
color_key_min	arch/arm/include/asm/arch/display.h	/^	u32 color_key_min;		\/* 0x884 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
color_palette	arch/arm/include/asm/arch-tegra/dc.h	/^	uint color_palette;		\/* _WINC_COLOR_PALETTE_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
color_red_cr	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	color_red_cr;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
color_setup	scripts/kconfig/lxdialog/util.c	/^static void color_setup(const char *theme)$/;"	f	typeref:typename:void	file:
color_space	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum color_space {$/;"	g
color_space	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int color_space;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
color_table	include/bmp_layout.h	/^	struct bmp_color_table_entry color_table[0];$/;"	m	struct:bmp_image	typeref:struct:bmp_color_table_entry[0]
color_text	tools/moveconfig.py	/^def color_text(color_enabled, color, string):$/;"	f
colorbar	drivers/video/fsl_diu_fb.c	/^	__be32 colorbar[8];$/;"	m	struct:diu	typeref:typename:__be32[8]	file:
colorgaincon	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int colorgaincon;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
colors	include/stdio_dev.h	/^	uchar	colors;			\/* Colors number or color depth		*\/$/;"	m	struct:__anon77b06a0f0108	typeref:typename:uchar
colors_important	include/bmp_layout.h	/^	__u32	colors_important;$/;"	m	struct:bmp_header	typeref:typename:__u32
colors_used	include/bmp_layout.h	/^	__u32	colors_used;$/;"	m	struct:bmp_header	typeref:typename:__u32
colour	drivers/serial/sandbox.c	/^	int colour;	\/* Text colour to use for output, -1 for none *\/$/;"	m	struct:sandbox_serial_platdata	typeref:typename:int	file:
colour	include/dm-demo.h	/^	const char *colour;$/;"	m	struct:dm_demo_pdata	typeref:typename:const char *
colour	tools/fdtgrep.c	/^	int colour;		\/* Display output in ANSI colour *\/$/;"	m	struct:display_info	typeref:typename:int	file:
colour_bg	include/video.h	/^	int colour_bg;$/;"	m	struct:video_priv	typeref:typename:int
colour_fg	include/video.h	/^	int colour_fg;$/;"	m	struct:video_priv	typeref:typename:int
coloured_LED_init	board/atmel/at91rm9200ek/led.c	/^void coloured_LED_init (void)$/;"	f	typeref:typename:void
coloured_LED_init	board/atmel/at91sam9260ek/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/atmel/at91sam9261ek/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/atmel/at91sam9263ek/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/atmel/at91sam9m10g45ek/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/atmel/at91sam9rlek/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/mini-box/picosam9g45/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/ronetix/pm9261/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/ronetix/pm9263/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	board/st/stm32f429-discovery/led.c	/^void coloured_LED_init(void)$/;"	f	typeref:typename:void
coloured_LED_init	common/board_f.c	/^__weak void coloured_LED_init(void) {}$/;"	f	typeref:typename:__weak void
cols	include/ec_commands.h	/^	uint32_t cols;$/;"	m	struct:ec_response_mkbp_info	typeref:typename:uint32_t
cols	include/lcd_console.h	/^	short cols, rows;$/;"	m	struct:console_t	typeref:typename:short
cols	include/video_console.h	/^	int cols;$/;"	m	struct:vidconsole_priv	typeref:typename:int
column	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int column;     \/* Saved column from SEQIN               *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
column	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int column;     \/* Saved column from SEQIN               *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
column	drivers/mtd/nand/mpc5121_nfc.c	/^	uint column;$/;"	m	struct:mpc5121_nfc_prv	typeref:typename:uint	file:
column2index	scripts/kconfig/gconf.c	/^static gint column2index(GtkTreeViewColumn * column)$/;"	f	typeref:typename:gint	file:
column_bits	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t column_bits[NUM_CHANNELS];$/;"	m	struct:mrc_params	typeref:typename:uint32_t[]
column_parity_table	fs/yaffs2/yaffs_ecc.c	/^static const unsigned char column_parity_table[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
com	arch/arm/include/asm/arch-tegra/dc.h	/^	struct dc_com_reg com;		\/* COM register 0x300 ~ 0x329 *\/$/;"	m	struct:dc_ctlr	typeref:struct:dc_com_reg
com	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_impl_common	com;$/;"	m	struct:rio_implement	typeref:struct:rio_impl_common
com	arch/powerpc/include/asm/immap_85xx.h	/^	u32	com;		\/* eSPI command *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32
com	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u32 com;	\/* command register *\/$/;"	m	struct:spi8xxx	typeref:typename:u32
com_conf_async	drivers/video/ipu_regs.h	/^	u32 com_conf_async;$/;"	m	struct:ipu_com_async	typeref:typename:u32
com_conf_sync	drivers/video/ipu_regs.h	/^	u32 com_conf_sync;$/;"	m	struct:ipu_dp	typeref:typename:u32
combinedCRC	lib/bzip2/bzlib_private.h	/^      UInt32   combinedCRC;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32
combiner	arch/arm/dts/exynos4.dtsi	/^	combiner: interrupt-controller@10440000 {$/;"	l
combiner	arch/arm/dts/exynos4210.dtsi	/^	combiner: interrupt-controller@10440000 {$/;"	l
combiner	arch/arm/dts/exynos5.dtsi	/^	combiner: interrupt-controller@10440000 {$/;"	l
combo_phy_read	board/highbank/ahci.c	/^static u32 combo_phy_read(u8 phy, u32 addr)$/;"	f	typeref:typename:u32	file:
combo_phy_write	board/highbank/ahci.c	/^static void combo_phy_write(u8 phy, u32 addr, u32 data)$/;"	f	typeref:typename:void	file:
comlane	drivers/soc/keystone/keystone_serdes.c	/^	struct serdes_cfg comlane[SERDES_COMLANE_CFG_NUM];$/;"	m	struct:cfg_entry	typeref:struct:serdes_cfg[]	file:
comm	include/linux/mtd/fsmc_nand.h	/^	u32 comm;			\/* 0x48 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
comm_dir	include/fsl_qe.h	/^typedef enum comm_dir {$/;"	g
comm_dir_e	include/fsl_qe.h	/^} comm_dir_e;$/;"	t	typeref:enum:comm_dir
comm_max	include/u-boot/zlib.h	/^	uInt	comm_max; \/* space at comment (only when reading header) *\/$/;"	m	struct:gz_header_s	typeref:typename:uInt
comm_proc	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct comm_proc {$/;"	s
comm_proc	arch/powerpc/include/asm/immap_8260.h	/^typedef struct comm_proc {$/;"	s
command	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	command;	\/* PSC + 0x08 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
command	arch/x86/include/asm/ist.h	/^	__u32 command;$/;"	m	struct:ist_info	typeref:typename:__u32
command	arch/x86/include/asm/me_common.h	/^	u32 command:7;$/;"	m	struct:mkhi_header	typeref:typename:u32:7
command	cmd/bootmenu.c	/^	char *command;			\/* hush command of entry *\/$/;"	m	struct:bootmenu_entry	typeref:typename:char *	file:
command	drivers/block/mxc_ata.c	/^	u32	command;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
command	drivers/misc/swap_case.c	/^	u16 command;$/;"	m	struct:swap_case_platdata	typeref:typename:u16	file:
command	drivers/mmc/arm_pl180_mmci.h	/^	u32 command;		\/* 0x0c*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
command	drivers/mtd/nand/tegra_nand.h	/^	u32	command;	\/* offset 00h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
command	drivers/mtd/spi/sf_dataflash.c	/^	uint8_t			command[16];$/;"	m	struct:dataflash	typeref:typename:uint8_t[16]	file:
command	drivers/net/eepro100.c	/^	volatile u16 command;$/;"	m	struct:TxFD	typeref:typename:volatile u16	file:
command	drivers/net/eepro100.c	/^	volatile u16 command;$/;"	m	struct:descriptor	typeref:typename:volatile u16	file:
command	drivers/net/lpc32xx_eth.c	/^	u32 command;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
command	drivers/net/mvneta.c	/^	u32  command;		\/* Options used by HW for packet transmitting.*\/$/;"	m	struct:mvneta_tx_desc	typeref:typename:u32	file:
command	drivers/net/mvpp2.c	/^	u32 command;		\/* Options used by HW for packet transmitting.*\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u32	file:
command	drivers/spi/tegra20_sflash.c	/^	u32 command;	\/* SPI_COMMAND_0 register  *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
command	drivers/spi/tegra20_slink.c	/^	u32 command;	\/* SLINK_COMMAND_0 register  *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
command	include/cros_ec.h	/^	int (*command)(struct udevice *dev, uint8_t cmd, int cmd_version,$/;"	m	struct:dm_cros_ec_ops	typeref:typename:int (*)(struct udevice * dev,uint8_t cmd,int cmd_version,const uint8_t * dout,int dout_len,uint8_t ** dinp,int din_len)
command	include/dataflash.h	/^	unsigned char command[8];$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned char[8]
command	include/ec_commands.h	/^	uint16_t command;$/;"	m	struct:ec_host_request	typeref:typename:uint16_t
command	include/fis.h	/^	u8 command;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
command	include/fis.h	/^	u8 command;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
command	include/libata.h	/^	u8			command;	\/* IO operation *\/$/;"	m	struct:ata_taskfile	typeref:typename:u8
command	include/linux/mtd/onenand.h	/^	int (*command) (struct mtd_info *mtd, int cmd, loff_t address,$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd,int cmd,loff_t address,size_t len)
command	include/mpc5xxx.h	/^	volatile u8	command;	\/* PSC + 0x08 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
command	include/qfw.h	/^	__le32 command;$/;"	m	struct:bios_linker_entry	typeref:typename:__le32
command1	drivers/spi/tegra114_spi.c	/^	u32 command1;	\/* 000:SPI_COMMAND1 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
command1	drivers/spi/tegra210_qspi.c	/^	u32 command1;	\/* 000:QSPI_COMMAND1 register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
command2	drivers/spi/tegra114_spi.c	/^	u32 command2;	\/* 004:SPI_COMMAND2 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
command2	drivers/spi/tegra20_slink.c	/^	u32 command2;	\/* SLINK_COMMAND2_0 reg *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
command2	drivers/spi/tegra210_qspi.c	/^	u32 command2;	\/* 004:QSPI_COMMAND2 register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
command_addr	drivers/block/pata_bfin.h	/^	unsigned long command_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
command_addr	drivers/block/sata_dwc.h	/^	void __iomem		*command_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
command_addr	drivers/block/sata_sil3114.h	/^	unsigned long command_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
command_byte	drivers/input/ps2mult.c	/^static u_char command_byte = 0;$/;"	v	typeref:typename:u_char	file:
command_config	drivers/net/altera_tse.h	/^	u32 command_config;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
command_config	include/fsl_memac.h	/^	u32	command_config;	\/* Control and configuration register *\/$/;"	m	struct:memac	typeref:typename:u32
command_config	include/fsl_tgec.h	/^	u32	command_config;	\/* Control and configuration register *\/$/;"	m	struct:tgec	typeref:typename:u32
command_def_init	cmd/ethsw.c	/^static void command_def_init(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:void	file:
command_ret_t	include/command.h	/^enum command_ret_t {$/;"	g
command_set_1	include/ata.h	/^	unsigned short  command_set_1;	\/* bits 0:Smart 1:Security 2:Removable 3:PM *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
command_set_2	include/ata.h	/^	unsigned short	command_set_2;	\/* bits 14:Smart Enabled 13:0 zero 10:lba48 support*\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
command_version	include/ec_commands.h	/^	uint8_t command_version;$/;"	m	struct:ec_host_request	typeref:typename:uint8_t
command_version	include/ec_commands.h	/^	uint8_t command_version;$/;"	m	struct:ec_lpc_host_args	typeref:typename:uint8_t
commandline	arch/arm/include/asm/setup.h	/^    char commandline[COMMAND_LINE_SIZE];$/;"	m	struct:param_struct	typeref:typename:char[]
comment	include/u-boot/zlib.h	/^	Bytef	*comment; \/* pointer to zero-terminated comment or Z_NULL *\/$/;"	m	struct:gz_header_s	typeref:typename:Bytef *
comment	scripts/kconfig/zconf.y	/^comment: T_COMMENT prompt T_EOL$/;"	l
comment	tools/imagetool.h	/^	const char *comment;	\/* Comment to add to signature node *\/$/;"	m	struct:image_tool_params	typeref:typename:const char *
comment_block	scripts/mailmapper	/^comment_block = []$/;"	v
comment_stmt	scripts/kconfig/zconf.y	/^comment_stmt: comment depends_list$/;"	l
commit_log	tools/buildman/func_test.py	/^commit_log = ["""commit 7f6b8315d18f683c5181d0c3694818c1b2a20dcd$/;"	v
commit_orphans	fs/ubifs/orphan.c	/^static int commit_orphans(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
commit_sem	fs/ubifs/ubifs.h	/^	struct rw_semaphore commit_sem;$/;"	m	struct:ubifs_info	typeref:struct:rw_semaphore
commit_shortlog	tools/buildman/func_test.py	/^commit_shortlog = """4aca821 patman: Avoid changing the order of tags$/;"	v
commits	tools/buildman/test.py	/^commits = [$/;"	v
commits_per_name	scripts/mailmapper	/^commits_per_name = {}$/;"	v
committed_rate	include/fsl-mc/fsl_dprc.h	/^	uint32_t committed_rate;$/;"	m	struct:dprc_connection_cfg	typeref:typename:uint32_t
common	arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h	/^	struct common_buf	common;	\/* FSP common runtime data structure *\/$/;"	m	struct:fspinit_rtbuf	typeref:struct:common_buf
common	arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h	/^	struct fsp_cfg_common	common;$/;"	m	struct:fsp_config_data	typeref:struct:fsp_cfg_common
common	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	struct fsp_cfg_common common;$/;"	m	struct:fsp_config_data	typeref:struct:fsp_cfg_common
common	arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h	/^	struct common_buf	common;	\/* FSP common runtime data structure *\/$/;"	m	struct:fspinit_rtbuf	typeref:struct:common_buf
common	arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h	/^	struct fsp_cfg_common	common;$/;"	m	struct:fsp_config_data	typeref:struct:fsp_cfg_common
common	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_common	*common;$/;"	m	struct:fsg_dev	typeref:struct:fsg_common *	file:
common	include/linux/immap_qe.h	/^		ucc_common_t common;$/;"	m	union:ucc::__anon6b5f4d76010a	typeref:typename:ucc_common_t
common	include/vsc9953.h	/^	struct vsc9953_ana_common	common;$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_common
common	include/vsc9953.h	/^	struct vsc9953_rew_common	common;$/;"	m	struct:vsc9953_rew_reg	typeref:struct:vsc9953_rew_common
common_buf	arch/x86/include/asm/fsp/fsp_api.h	/^struct common_buf {$/;"	s
common_diskboot	cmd/disk.c	/^int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc,$/;"	f	typeref:typename:int
common_int_mask1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_mask1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_mask2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_mask2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_mask3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_mask3;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_mask4	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_mask4;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_mask_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_mask_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_mask_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_mask_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_mask_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_mask_3;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_mask_4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_mask_4;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_sta1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_sta1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_sta2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_sta2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_sta3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_sta3;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_sta4	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	common_int_sta4;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
common_int_sta_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_sta_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_sta_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_sta_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_sta_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_sta_3;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_int_sta_4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	common_int_sta_4;$/;"	m	struct:rk3288_edp	typeref:typename:u32
common_phys_selectors_pex_by4_lanes	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u8 common_phys_selectors_pex_by4_lanes[] = { 0x1, 0x2, 0x2, 0x2 };$/;"	v	typeref:typename:u8[]
common_sata_init	arch/x86/cpu/ivybridge/sata.c	/^static void common_sata_init(struct udevice *dev, unsigned int port_map)$/;"	f	typeref:typename:void	file:
common_stmt	scripts/kconfig/zconf.y	/^common_stmt:$/;"	l
common_timing_params	include/fsl_ddr.h	/^	common_timing_params_t common_timing_params[CONFIG_SYS_NUM_DDR_CTLRS];$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:common_timing_params_t[]
common_timing_params_t	include/common_timing_params.h	/^} common_timing_params_t;$/;"	t	typeref:struct:__anon844677010108
community_ports	include/vsc9953.h	/^	u32	community_ports;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
comp	include/image.h	/^	uint8_t		comp, type, os;		\/* compression, type of image, os type *\/$/;"	m	struct:image_info	typeref:typename:uint8_t
comp	tools/imagetool.h	/^	int comp;$/;"	m	struct:image_tool_params	typeref:typename:int
comp_desc	drivers/usb/dwc3/core.h	/^	const struct usb_ss_ep_comp_descriptor *comp_desc;$/;"	m	struct:dwc3_ep	typeref:typename:const struct usb_ss_ep_comp_descriptor *
comp_desc	include/linux/usb/gadget.h	/^	const struct usb_ss_ep_comp_descriptor	*comp_desc;$/;"	m	struct:usb_ep	typeref:typename:const struct usb_ss_ep_comp_descriptor *
comp_id_0	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	comp_id_0;			\/* 0x1FF0 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
comp_id_1	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	comp_id_1;$/;"	m	struct:nic301_registers	typeref:typename:u32
comp_id_2	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	comp_id_2;$/;"	m	struct:nic301_registers	typeref:typename:u32
comp_id_3	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	comp_id_3;$/;"	m	struct:nic301_registers	typeref:typename:u32
comp_int	arch/arm/dts/rk3288-popmetal.dtsi	/^		comp_int: comp-int {$/;"	l
comp_mutex	fs/ubifs/ubifs.h	/^	struct mutex *comp_mutex;$/;"	m	struct:ubifs_compressor	typeref:struct:mutex *
comp_t	tools/easylogo/easylogo.c	/^enum comp_t {$/;"	g	file:
comp_version	board/siemens/common/factoryset.h	/^	uchar comp_version[MAX_STRING_LENGTH];$/;"	m	struct:factorysetcontainer	typeref:typename:uchar[]
companion	include/usb.h	/^	bool companion;$/;"	m	struct:usb_bus_priv	typeref:typename:bool
companion_device_count	drivers/usb/host/usb-uclass.c	/^	int companion_device_count;$/;"	m	struct:usb_uclass_priv	typeref:typename:int	file:
compare	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u32 compare;$/;"	m	struct:gpt_regs	typeref:typename:u32
compare_dirents	fs/jffs2/jffs2_1pass.c	/^static int compare_dirents(struct b_node *new, struct b_node *old)$/;"	f	typeref:typename:int	file:
compare_dirents	fs/jffs2/jffs2_nand_1pass.c	/^static int compare_dirents(struct b_node *new, struct b_node *old)$/;"	f	typeref:typename:int	file:
compare_guid	arch/x86/lib/fsp/fsp_support.c	/^static bool compare_guid(const struct efi_guid *guid1,$/;"	f	typeref:typename:bool	file:
compare_inodes	fs/jffs2/jffs2_1pass.c	/^static int compare_inodes(struct b_node *new, struct b_node *old)$/;"	f	typeref:typename:int	file:
compare_inodes	fs/jffs2/jffs2_nand_1pass.c	/^static int compare_inodes(struct b_node *new, struct b_node *old)$/;"	f	typeref:typename:int	file:
compare_magic	board/liebherr/lwmon5/kbd.c	/^static int compare_magic (uchar *kbd_data, uchar *str)$/;"	f	typeref:typename:int	file:
compare_pattern_v1	drivers/ddr/marvell/axp/ddr3_sdram.c	/^static void compare_pattern_v1(u32 uj, u32 *pup, u32 *pattern,$/;"	f	typeref:typename:void	file:
compare_pattern_v2	drivers/ddr/marvell/axp/ddr3_sdram.c	/^static void compare_pattern_v2(u32 uj, u32 *pup, u32 *pattern)$/;"	f	typeref:typename:void	file:
compat	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	const char *compat;$/;"	m	struct:liodn_id_table	typeref:typename:const char *
compat	arch/powerpc/include/asm/fsl_liodn.h	/^	const char * compat;$/;"	m	struct:liodn_id_table	typeref:typename:const char *
compat	arch/powerpc/include/asm/fsl_liodn.h	/^	const char *compat[2];$/;"	m	struct:fman_liodn_id_table	typeref:typename:const char * [2]
compat	arch/sandbox/include/asm/state.h	/^	const char *compat;$/;"	m	struct:sandbox_state_io	typeref:typename:const char *
compat	arch/x86/cpu/call32.S	/^compat:$/;"	l
compat	drivers/mtd/ubi/ubi-media.h	/^	__u8    compat;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8
compat	drivers/mtd/ubi/ubi.h	/^	int compat;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
compat	include/mtd_node.h	/^	const char *compat;	\/* compatible string *\/$/;"	m	struct:node_info	typeref:typename:const char *
compat_getline	scripts/kconfig/confdata.c	/^static ssize_t compat_getline(char **lineptr, size_t *n, FILE *stream)$/;"	f	typeref:typename:ssize_t	file:
compat_names	lib/fdtdec.c	/^static const char * const compat_names[COMPAT_COUNT] = {$/;"	v	typeref:typename:const char * const[]	file:
compat_offset	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	phys_addr_t compat_offset;$/;"	m	struct:liodn_id_table	typeref:typename:phys_addr_t
compat_offset	arch/powerpc/include/asm/fsl_liodn.h	/^	phys_addr_t compat_offset;$/;"	m	struct:fman_liodn_id_table	typeref:typename:phys_addr_t
compat_offset	arch/powerpc/include/asm/fsl_liodn.h	/^	phys_addr_t compat_offset;$/;"	m	struct:liodn_id_table	typeref:typename:phys_addr_t
compat_offset	include/fm_eth.h	/^	u32 compat_offset;$/;"	m	struct:fm_eth_info	typeref:typename:u32
compat_usb_fsl	drivers/usb/common/fsl-dt-fixup.c	/^static const char * const compat_usb_fsl[] = {$/;"	v	typeref:typename:const char * const[]	file:
compatible	arch/arm/mach-uniphier/boards.c	/^	const char *compatible;$/;"	m	struct:uniphier_board_id	typeref:typename:const char *	file:
compatible	drivers/usb/phy/rockchip_usb2_phy.c	/^	char		compatible[128];$/;"	m	struct:rockchip_usb2_phy_dt_id	typeref:typename:char[128]	file:
compatible	include/dm/device.h	/^	const char *compatible;$/;"	m	struct:udevice_id	typeref:typename:const char *
comphy	arch/arm/dts/armada-37xx.dtsi	/^			comphy: comphy@18300 {$/;"	l
comphy_a3700_init	drivers/phy/marvell/comphy.h	/^static inline int comphy_a3700_init(struct chip_serdes_phy_config *ptr_chip_cfg,$/;"	f	typeref:typename:int
comphy_a3700_init	drivers/phy/marvell/comphy_a3700.c	/^int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg,$/;"	f	typeref:typename:int
comphy_base_addr	drivers/phy/marvell/comphy.h	/^	void __iomem *comphy_base_addr;$/;"	m	struct:chip_serdes_phy_config	typeref:typename:void __iomem *
comphy_cp110	arch/arm/dts/armada-cp110-master.dtsi	/^			comphy_cp110: comphy@441000 {$/;"	l
comphy_cp110_init	drivers/phy/marvell/comphy.h	/^static inline int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,$/;"	f	typeref:typename:int
comphy_cp110_init	drivers/phy/marvell/comphy_cp110.c	/^int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,$/;"	f	typeref:typename:int
comphy_dedicated_phys_init	drivers/phy/marvell/comphy_a3700.c	/^void comphy_dedicated_phys_init(void)$/;"	f	typeref:typename:void
comphy_dedicated_phys_init	drivers/phy/marvell/comphy_cp110.c	/^void comphy_dedicated_phys_init(void)$/;"	f	typeref:typename:void
comphy_emmc_power_up	drivers/phy/marvell/comphy_a3700.c	/^static int comphy_emmc_power_up(void)$/;"	f	typeref:typename:int	file:
comphy_ids	drivers/phy/marvell/comphy_core.c	/^static const struct udevice_id comphy_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
comphy_index	drivers/phy/marvell/comphy.h	/^	u32 comphy_index;$/;"	m	struct:chip_serdes_phy_config	typeref:typename:u32
comphy_kr_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_kr_power_up(u32 lane, void __iomem *hpipe_base,$/;"	f	typeref:typename:int	file:
comphy_lanes_count	drivers/phy/marvell/comphy.h	/^	u32 comphy_lanes_count;$/;"	m	struct:chip_serdes_phy_config	typeref:typename:u32
comphy_map	drivers/phy/marvell/comphy.h	/^struct comphy_map {$/;"	s
comphy_mux_bitcount	drivers/phy/marvell/comphy.h	/^	u32 comphy_mux_bitcount;$/;"	m	struct:chip_serdes_phy_config	typeref:typename:u32
comphy_mux_check_config	drivers/phy/marvell/comphy_mux.c	/^static void comphy_mux_check_config(struct comphy_mux_data *mux_data,$/;"	f	typeref:typename:void	file:
comphy_mux_cp110_init	drivers/phy/marvell/comphy_cp110.c	/^static void comphy_mux_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,$/;"	f	typeref:typename:void	file:
comphy_mux_data	drivers/phy/marvell/comphy.h	/^struct comphy_mux_data {$/;"	s
comphy_mux_get_mux_value	drivers/phy/marvell/comphy_mux.c	/^static u32 comphy_mux_get_mux_value(struct comphy_mux_data *mux_data,$/;"	f	typeref:typename:u32	file:
comphy_mux_init	drivers/phy/marvell/comphy_mux.c	/^void comphy_mux_init(struct chip_serdes_phy_config *chip_cfg,$/;"	f	typeref:typename:void
comphy_mux_options	drivers/phy/marvell/comphy.h	/^struct comphy_mux_options {$/;"	s
comphy_mux_reg_write	drivers/phy/marvell/comphy_mux.c	/^static void comphy_mux_reg_write(struct comphy_mux_data *mux_data,$/;"	f	typeref:typename:void	file:
comphy_pcie_power_up	drivers/phy/marvell/comphy_a3700.c	/^static int comphy_pcie_power_up(u32 speed, u32 invert)$/;"	f	typeref:typename:int	file:
comphy_pcie_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_pcie_power_up(u32 lane, u32 pcie_width,$/;"	f	typeref:typename:int	file:
comphy_poll_reg	drivers/phy/marvell/comphy_a3700.c	/^static u32 comphy_poll_reg(void *addr, u32 val, u32 mask, u32 timeout,$/;"	f	typeref:typename:u32	file:
comphy_print	drivers/phy/marvell/comphy_core.c	/^void comphy_print(struct chip_serdes_phy_config *chip_cfg,$/;"	f	typeref:typename:void
comphy_probe	drivers/phy/marvell/comphy_core.c	/^static int comphy_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
comphy_rxauii_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base,$/;"	f	typeref:typename:int	file:
comphy_sata_power_up	drivers/phy/marvell/comphy_a3700.c	/^static int comphy_sata_power_up(void)$/;"	f	typeref:typename:int	file:
comphy_sata_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base,$/;"	f	typeref:typename:int	file:
comphy_sgmii_phy_init	drivers/phy/marvell/comphy_a3700.c	/^static void comphy_sgmii_phy_init(u32 lane, u32 speed)$/;"	f	typeref:typename:void	file:
comphy_sgmii_power_up	drivers/phy/marvell/comphy_a3700.c	/^static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert)$/;"	f	typeref:typename:int	file:
comphy_sgmii_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed,$/;"	f	typeref:typename:int	file:
comphy_usb2_power_up	drivers/phy/marvell/comphy_a3700.c	/^static int comphy_usb2_power_up(u8 usb32)$/;"	f	typeref:typename:int	file:
comphy_usb3_power_up	drivers/phy/marvell/comphy_a3700.c	/^static int comphy_usb3_power_up(u32 type, u32 speed, u32 invert)$/;"	f	typeref:typename:int	file:
comphy_usb3_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_usb3_power_up(u32 lane, void __iomem *hpipe_base,$/;"	f	typeref:typename:int	file:
comphy_utmi_phy_config	drivers/phy/marvell/comphy_cp110.c	/^static void comphy_utmi_phy_config(u32 utmi_index, void __iomem *utmi_base_addr,$/;"	f	typeref:typename:void	file:
comphy_utmi_phy_init	drivers/phy/marvell/comphy_cp110.c	/^static void comphy_utmi_phy_init(u32 utmi_phy_count,$/;"	f	typeref:typename:void	file:
comphy_utmi_power_down	drivers/phy/marvell/comphy_cp110.c	/^static void comphy_utmi_power_down(u32 utmi_index, void __iomem *utmi_base_addr,$/;"	f	typeref:typename:void	file:
comphy_utmi_power_up	drivers/phy/marvell/comphy_cp110.c	/^static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,$/;"	f	typeref:typename:int	file:
compile	lib/slre.c	/^compile(struct slre *r, const char **re)$/;"	f	typeref:typename:void	file:
compile_by	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *compile_by;$/;"	m	struct:sysinfo_t	typeref:typename:char *
compile_domain	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *compile_domain;$/;"	m	struct:sysinfo_t	typeref:typename:char *
compile_host	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *compile_host;$/;"	m	struct:sysinfo_t	typeref:typename:char *
compile_sandbox	test/fs/fs-test.sh	/^function compile_sandbox() {$/;"	f
compile_time	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *compile_time;$/;"	m	struct:sysinfo_t	typeref:typename:char *
compiler	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *compiler;$/;"	m	struct:sysinfo_t	typeref:typename:char *
compiletime_assert	include/linux/compiler.h	/^#define compiletime_assert(/;"	d
compiletime_assert_atomic_type	include/linux/compiler.h	/^#define compiletime_assert_atomic_type(/;"	d
compl_do_reset	drivers/usb/gadget/f_fastboot.c	/^static void compl_do_reset(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
complete	drivers/usb/musb-new/usb-compat.h	/^	usb_complete_t complete;	\/* (in) completion routine *\/$/;"	m	struct:urb	typeref:typename:usb_complete_t
complete	include/command.h	/^	int		(*complete)(int argc, char * const argv[], char last_char, int maxv, char *cmdv[]);$/;"	m	struct:cmd_tbl_s	typeref:typename:int (*)(int argc,char * const argv[],char last_char,int maxv,char * cmdv[])
complete	include/linux/usb/gadget.h	/^	void			(*complete)(struct usb_ep *ep,$/;"	m	struct:usb_request	typeref:typename:void (*)(struct usb_ep * ep,struct usb_request * req)
complete_cmdv	common/command.c	/^static int complete_cmdv(int argc, char * const argv[], char last_char, int maxv, char *cmdv[])$/;"	f	typeref:typename:int	file:
complete_code	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int complete_code;	\/* indicate pending complete interrupt *\/$/;"	m	struct:edma3_channel_config	typeref:typename:int
complete_rx	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void complete_rx(struct dwc2_udc *dev, u8 ep_num)$/;"	f	typeref:typename:void	file:
complete_tx	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void complete_tx(struct dwc2_udc *dev, u8 ep_num)$/;"	f	typeref:typename:void	file:
completion	drivers/usb/gadget/f_mass_storage.c	/^struct completion {int x; };$/;"	s	file:
complsb	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	complsb;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
compmsb	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	compmsb; \/* 0x50 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
component	board/nokia/rx51/tag_omap.h	/^	char component[12];$/;"	m	struct:omap_version_config	typeref:typename:char[12]
component_density	tools/ifdtool.h	/^enum component_density {$/;"	g
component_version	tools/mxsimage.h	/^			component_version;$/;"	m	struct:sb_boot_image_header	typeref:struct:sb_boot_image_version
compose_hostname	board/cm5200/cm5200.c	/^static void compose_hostname(hw_id_t hw_id, char *buf)$/;"	f	typeref:typename:void	file:
compose_module_name	board/cm5200/cm5200.c	/^static void compose_module_name(hw_id_t hw_id, char *buf)$/;"	f	typeref:typename:void	file:
composite	drivers/usb/gadget/composite.c	/^static struct usb_composite_driver *composite;$/;"	v	typeref:struct:usb_composite_driver *	file:
composite_bind	drivers/usb/gadget/composite.c	/^static int composite_bind(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
composite_disconnect	drivers/usb/gadget/composite.c	/^static void composite_disconnect(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
composite_driver	drivers/usb/gadget/composite.c	/^static struct usb_gadget_driver composite_driver = {$/;"	v	typeref:struct:usb_gadget_driver	file:
composite_resume	drivers/usb/gadget/composite.c	/^composite_resume(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
composite_setup	drivers/usb/gadget/composite.c	/^composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
composite_setup_complete	drivers/usb/gadget/composite.c	/^static void composite_setup_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
composite_suspend	drivers/usb/gadget/composite.c	/^composite_suspend(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
composite_unbind	drivers/usb/gadget/composite.c	/^static void composite_unbind(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
composite_video_modes	drivers/video/sunxi_display.c	/^const struct ctfb_res_modes composite_video_modes[2] = {$/;"	v	typeref:typename:const struct ctfb_res_modes[2]
compr	include/jffs2/jffs2.h	/^	__u8 compr;       \/* Compression algorithm used *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u8
compr_info	fs/jffs2/jffs2_nand_private.h	/^	struct b_compr_info compr_info[JFFS2_NUM_COMPR];$/;"	m	struct:b_jffs2_info	typeref:struct:b_compr_info[]
compr_info	fs/jffs2/jffs2_private.h	/^	struct b_compr_info compr_info[JFFS2_NUM_COMPR];$/;"	m	struct:b_jffs2_info	typeref:struct:b_compr_info[]
compr_init	fs/ubifs/ubifs.c	/^static int __init compr_init(struct ubifs_compressor *compr)$/;"	f	typeref:typename:int __init	file:
compr_names	fs/jffs2/jffs2_1pass.c	/^static char *compr_names[] = {$/;"	v	typeref:typename:char * []	file:
compr_names	fs/jffs2/jffs2_nand_1pass.c	/^static char *compr_names[] = {$/;"	v	typeref:typename:char * []	file:
compr_sum	fs/jffs2/jffs2_nand_private.h	/^	u32 compr_sum;$/;"	m	struct:b_compr_info	typeref:typename:u32
compr_sum	fs/jffs2/jffs2_private.h	/^	u32 compr_sum;$/;"	m	struct:b_compr_info	typeref:typename:u32
compr_type	fs/ubifs/ubifs-media.h	/^	__le16 compr_type;$/;"	m	struct:ubifs_data_node	typeref:typename:__le16
compr_type	fs/ubifs/ubifs-media.h	/^	__le16 compr_type;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le16
compr_type	fs/ubifs/ubifs.h	/^	int compr_type;$/;"	m	struct:ubifs_compressor	typeref:typename:int
compr_type	fs/ubifs/ubifs.h	/^	unsigned int compr_type:2;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int:2
compr_type	fs/ubifs/ubifs.h	/^	unsigned int compr_type:2;$/;"	m	struct:ubifs_mount_opts	typeref:typename:unsigned int:2
compress	include/u-boot/zlib.h	/^#  define compress /;"	d
compress2	include/u-boot/zlib.h	/^#  define compress2 /;"	d
compressBound	include/u-boot/zlib.h	/^#  define compressBound /;"	d
compress_algo	include/fdtdec.h	/^	enum fmap_compress_t compress_algo;	\/* Compression type *\/$/;"	m	struct:fmap_entry	typeref:enum:fmap_compress_t
compress_block	lib/zlib/trees.c	/^local void compress_block(s, ltree, dtree)$/;"	f
compress_frame_buffer	test/dm/video.c	/^static int compress_frame_buffer(struct udevice *dev)$/;"	f	typeref:typename:int	file:
compress_using_bzip2	test/compression.c	/^static int compress_using_bzip2(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
compress_using_gzip	test/compression.c	/^static int compress_using_gzip(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
compress_using_lz4	test/compression.c	/^static int compress_using_lz4(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
compress_using_lzma	test/compression.c	/^static int compress_using_lzma(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
compress_using_lzo	test/compression.c	/^static int compress_using_lzo(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
compress_using_none	test/compression.c	/^static int compress_using_none(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
compressed_len	lib/zlib/deflate.h	/^    ulg compressed_len; \/* total bit length of compressed file mod 2^32 *\/$/;"	m	struct:internal_state	typeref:typename:ulg
compression	include/bmp_layout.h	/^	__u32	compression;$/;"	m	struct:bmp_header	typeref:typename:__u32
compression	tools/easylogo/easylogo.c	/^static enum comp_t compression = COMP_NONE;$/;"	v	typeref:enum:comp_t	file:
compression_info	include/ext_common.h	/^	__le32 compression_info;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
compressor	fs/ubifs/ubifs.c	/^	int compressor;$/;"	m	struct:crypto_comp	typeref:typename:int	file:
computeSignal	arch/powerpc/lib/kgdb.c	/^computeSignal(unsigned int tt)$/;"	f	typeref:typename:int	file:
compute_and	board/gdsys/p1022/controlcenterd-id.c	/^static void *compute_and(void *_dst, const void *_src, size_t n)$/;"	f	typeref:typename:void *	file:
compute_cas_latency	drivers/ddr/fsl/lc_common_dimm_params.c	/^compute_cas_latency(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int	file:
compute_cas_write_latency	drivers/ddr/fsl/ctrl_regs.c	/^static inline unsigned int compute_cas_write_latency($/;"	f	typeref:typename:unsigned int	file:
compute_crc	cmd/armflash.c	/^static u32 compute_crc(ulong start, u32 len)$/;"	f	typeref:typename:u32	file:
compute_derated_DDR1_CAS_latency	drivers/ddr/fsl/ddr1_dimm_params.c	/^compute_derated_DDR1_CAS_latency(unsigned int mclk_ps)$/;"	f	typeref:typename:unsigned int
compute_derated_DDR2_CAS_latency	drivers/ddr/fsl/ddr2_dimm_params.c	/^compute_derated_DDR2_CAS_latency(unsigned int mclk_ps)$/;"	f	typeref:typename:unsigned int
compute_dimm_parameters	include/fsl_ddr.h	/^compute_dimm_parameters(const unsigned int ctrl_num,$/;"	f	typeref:typename:int
compute_dsp_cpumask	arch/powerpc/cpu/mpc8xxx/cpu.c	/^u32 compute_dsp_cpumask(void)$/;"	f	typeref:typename:u32
compute_error_locator_polynomial	lib/bch.c	/^static int compute_error_locator_polynomial(struct bch_control *bch,$/;"	f	typeref:typename:int	file:
compute_extend	board/gdsys/p1022/controlcenterd-id.c	/^static void *compute_extend(void *_dst, const void *_src, size_t n)$/;"	f	typeref:typename:void *	file:
compute_fsl_memctl_config_regs	drivers/ddr/fsl/ctrl_regs.c	/^compute_fsl_memctl_config_regs(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int
compute_generator_polynomial	lib/bch.c	/^static uint32_t *compute_generator_polynomial(struct bch_control *bch)$/;"	f	typeref:typename:uint32_t *	file:
compute_ip_checksum	net/checksum.c	/^unsigned compute_ip_checksum(const void *vptr, unsigned nbytes)$/;"	f	typeref:typename:unsigned
compute_lowest_common_dimm_parameters	drivers/ddr/fsl/lc_common_dimm_params.c	/^compute_lowest_common_dimm_parameters(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int
compute_or	board/gdsys/p1022/controlcenterd-id.c	/^static void *compute_or(void *_dst, const void *_src, size_t n)$/;"	f	typeref:typename:void *	file:
compute_ppc_cpumask	arch/powerpc/cpu/mpc8xxx/cpu.c	/^#define compute_ppc_cpumask(/;"	d	file:
compute_ppc_cpumask	arch/powerpc/cpu/mpc8xxx/cpu.c	/^u32 compute_ppc_cpumask(void)$/;"	f	typeref:typename:u32
compute_ranksize	drivers/ddr/fsl/ddr1_dimm_params.c	/^compute_ranksize(unsigned int mem_type, unsigned char row_dens)$/;"	f	typeref:typename:unsigned long long	file:
compute_ranksize	drivers/ddr/fsl/ddr2_dimm_params.c	/^compute_ranksize(unsigned int mem_type, unsigned char row_dens)$/;"	f	typeref:typename:unsigned long long	file:
compute_ranksize	drivers/ddr/fsl/ddr3_dimm_params.c	/^compute_ranksize(const ddr3_spd_eeprom_t *spd)$/;"	f	typeref:typename:unsigned long long	file:
compute_ranksize	drivers/ddr/fsl/ddr4_dimm_params.c	/^compute_ranksize(const struct ddr4_spd_eeprom_s *spd)$/;"	f	typeref:typename:unsigned long long	file:
compute_rtr	arch/powerpc/cpu/ppc4xx/sdram.c	/^static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)$/;"	f	typeref:typename:ulong	file:
compute_sdtr1	arch/powerpc/cpu/ppc4xx/sdram.c	/^static ulong compute_sdtr1(ulong speed)$/;"	f	typeref:typename:ulong	file:
compute_second_stage_hash	board/gdsys/p1022/controlcenterd-id.c	/^static int compute_second_stage_hash(struct h_reg *dst)$/;"	f	typeref:typename:int	file:
compute_self_hash	board/gdsys/p1022/controlcenterd-id.c	/^static int compute_self_hash(struct h_reg *dst)$/;"	f	typeref:typename:int	file:
compute_syndromes	lib/bch.c	/^static void compute_syndromes(struct bch_control *bch, uint32_t *ecc,$/;"	f	typeref:typename:void	file:
compute_tckmax_from_spd_ps	drivers/ddr/fsl/ddr1_dimm_params.c	/^compute_tckmax_from_spd_ps(unsigned int byte43)$/;"	f	typeref:typename:unsigned int	file:
compute_trace_bk_mod	lib/bch.c	/^static void compute_trace_bk_mod(struct bch_control *bch, int k,$/;"	f	typeref:typename:void	file:
compute_trc_ps_from_spd	drivers/ddr/fsl/ddr1_dimm_params.c	/^compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc)$/;"	f	typeref:typename:unsigned int	file:
compute_trc_ps_from_spd	drivers/ddr/fsl/ddr2_dimm_params.c	/^compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc)$/;"	f	typeref:typename:unsigned int	file:
compute_trfc_ps_from_spd	drivers/ddr/fsl/ddr1_dimm_params.c	/^compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc)$/;"	f	typeref:typename:unsigned int	file:
compute_trfc_ps_from_spd	drivers/ddr/fsl/ddr2_dimm_params.c	/^compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc)$/;"	f	typeref:typename:unsigned int	file:
compute_xor	board/gdsys/p1022/controlcenterd-id.c	/^static void *compute_xor(void *_dst, const void *_src, size_t n)$/;"	f	typeref:typename:void *	file:
con	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short con;             \/* 0xA4 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
con	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short con;	\/* 0x24 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
con	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short con;		\/* 0xA4 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
con	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short con;		\/* 0xA4 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
con	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 con;$/;"	m	struct:i2c_regs	typeref:typename:u32
con	arch/arm/include/asm/omap_mmc.h	/^	unsigned int con;		\/* 0x2C *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
con	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int	con;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
con	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int	con;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
con	include/i2s.h	/^	unsigned int con;	\/* base + 0 , Control register *\/$/;"	m	struct:i2s_reg	typeref:typename:unsigned int
con	include/logbuff.h	/^			unsigned long	con;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30308	typeref:typename:unsigned long
con0	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^		unsigned int con0;$/;"	m	struct:rk3036_cru::rk3036_pll	typeref:typename:unsigned int
con0	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^		u32 con0;$/;"	m	struct:rk3288_cru::rk3288_pll	typeref:typename:u32
con1	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^		unsigned int con1;$/;"	m	struct:rk3036_cru::rk3036_pll	typeref:typename:unsigned int
con1	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^		u32 con1;$/;"	m	struct:rk3288_cru::rk3288_pll	typeref:typename:u32
con1	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int con1;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
con1	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic con1; \/* 0x00 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
con2	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^		unsigned int con2;$/;"	m	struct:rk3036_cru::rk3036_pll	typeref:typename:unsigned int
con2	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^		u32 con2;$/;"	m	struct:rk3288_cru::rk3288_pll	typeref:typename:u32
con2	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int con2;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
con2	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic con2; \/* 0x10 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
con3	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^		unsigned int con3;$/;"	m	struct:rk3036_cru::rk3036_pll	typeref:typename:unsigned int
con3	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^		u32 con3;$/;"	m	struct:rk3288_cru::rk3288_pll	typeref:typename:u32
con_id	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	const char *con_id;$/;"	m	struct:clk_lookup	typeref:typename:const char *
con_id	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	const char *con_id;$/;"	m	struct:clk_lookup	typeref:typename:const char *
con_in	drivers/serial/serial_efi.c	/^	struct efi_simple_input_interface *con_in;$/;"	m	struct:serial_efi_priv	typeref:struct:efi_simple_input_interface *	file:
con_in	include/efi_api.h	/^	struct efi_simple_input_interface *con_in;$/;"	m	struct:efi_system_table	typeref:struct:efi_simple_input_interface *
con_in_handle	include/efi_api.h	/^	unsigned long con_in_handle;$/;"	m	struct:efi_system_table	typeref:typename:unsigned long
con_out	drivers/serial/serial_efi.c	/^	struct efi_simple_text_output_protocol *con_out;$/;"	m	struct:serial_efi_priv	typeref:struct:efi_simple_text_output_protocol *	file:
con_out	include/efi_api.h	/^	struct efi_simple_text_output_protocol *con_out;$/;"	m	struct:efi_system_table	typeref:struct:efi_simple_text_output_protocol *
con_out_handle	include/efi_api.h	/^	unsigned long con_out_handle;$/;"	m	struct:efi_system_table	typeref:typename:unsigned long
concat_block_isbad	drivers/mtd/mtdconcat.c	/^static int concat_block_isbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
concat_block_markbad	drivers/mtd/mtdconcat.c	/^static int concat_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
concat_dev_erase	drivers/mtd/mtdconcat.c	/^static int concat_dev_erase(struct mtd_info *mtd, struct erase_info *erase)$/;"	f	typeref:typename:int	file:
concat_erase	drivers/mtd/mtdconcat.c	/^static int concat_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int	file:
concat_erase_callback	drivers/mtd/mtdconcat.c	/^static void concat_erase_callback(struct erase_info *instr)$/;"	f	typeref:typename:void	file:
concat_get_unmapped_area	drivers/mtd/mtdconcat.c	/^static unsigned long concat_get_unmapped_area(struct mtd_info *mtd,$/;"	f	typeref:typename:unsigned long	file:
concat_lock	drivers/mtd/mtdconcat.c	/^static int concat_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
concat_read	drivers/mtd/mtdconcat.c	/^concat_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
concat_read_oob	drivers/mtd/mtdconcat.c	/^concat_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)$/;"	f	typeref:typename:int	file:
concat_resume	drivers/mtd/mtdconcat.c	/^static void concat_resume(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
concat_suspend	drivers/mtd/mtdconcat.c	/^static int concat_suspend(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
concat_sync	drivers/mtd/mtdconcat.c	/^static void concat_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
concat_unlock	drivers/mtd/mtdconcat.c	/^static int concat_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
concat_write	drivers/mtd/mtdconcat.c	/^concat_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
concat_write_oob	drivers/mtd/mtdconcat.c	/^concat_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops)$/;"	f	typeref:typename:int	file:
concat_writev	drivers/mtd/mtdconcat.c	/^concat_writev(struct mtd_info *mtd, const struct kvec *vecs,$/;"	f	typeref:typename:int	file:
concontrol	arch/arm/mach-exynos/clock_init.h	/^	unsigned concontrol;$/;"	m	struct:mem_timings	typeref:typename:unsigned
concontrol	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned concontrol;$/;"	m	struct:mem_timings	typeref:typename:unsigned
concontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int concontrol;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
concontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int concontrol;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
concontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int concontrol;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
cond_resched	include/linux/compat.h	/^#define cond_resched(/;"	d
condition	drivers/i2c/mv_i2c.c	/^	u8 condition;$/;"	m	struct:mv_i2c_msg	typeref:typename:u8	file:
condition_codes	arch/arm/include/asm/proc-armv/ptrace.h	/^#define condition_codes(/;"	d
conf	drivers/net/designware.h	/^	u32 conf;		\/* 0x00 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
conf	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*conf;$/;"	m	struct:musb_hw_ep	typeref:typename:void __iomem *
conf	drivers/video/ipu_regs.h	/^	u32 conf;$/;"	m	struct:ipu_cm	typeref:typename:u32
conf	drivers/video/ipu_regs.h	/^	u32 conf;$/;"	m	struct:ipu_idmac	typeref:typename:u32
conf	include/faraday/ftpci100.h	/^	unsigned int conf;		\/* 0x28 - PCI Configuration *\/$/;"	m	struct:ftpci100_ahbc	typeref:typename:unsigned int
conf	include/ioports.h	/^    unsigned char conf:1;	\/* if 1, configure this port *\/$/;"	m	struct:__anonc67861fe0208	typeref:typename:unsigned char:1
conf	scripts/kconfig/conf.c	/^static void conf(struct menu *menu)$/;"	f	typeref:typename:void	file:
conf	scripts/kconfig/mconf.c	/^static void conf(struct menu *menu, struct menu *active_menu)$/;"	f	typeref:typename:void	file:
conf	scripts/kconfig/nconf.c	/^static void conf(struct menu *menu)$/;"	f	typeref:typename:void	file:
conf-objs	scripts/kconfig/Makefile	/^conf-objs	:= conf.o  zconf.tab.o$/;"	m
conf_a	arch/x86/include/asm/arch-broadwell/gpio.h	/^		u32 conf_a;$/;"	m	struct:pch_lp_gpio_regs::__anond5044f050108	typeref:typename:u32
conf_arbiter	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 conf_arbiter;	\/* 0x44: Configuration Arbiter Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
conf_askvalue	scripts/kconfig/conf.c	/^static int conf_askvalue(struct symbol *sym, const char *def)$/;"	f	typeref:typename:int	file:
conf_b	arch/x86/include/asm/arch-broadwell/gpio.h	/^		u32 conf_b;$/;"	m	struct:pch_lp_gpio_regs::__anond5044f050108	typeref:typename:u32
conf_changed	scripts/kconfig/gconf.c	/^static void conf_changed(void)$/;"	f	typeref:typename:void	file:
conf_changed	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::conf_changed(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
conf_changed_callback	scripts/kconfig/confdata.c	/^static void (*conf_changed_callback)(void);$/;"	v	typeref:typename:void (*)(void)	file:
conf_choice	scripts/kconfig/conf.c	/^static int conf_choice(struct menu *menu)$/;"	f	typeref:typename:int	file:
conf_choice	scripts/kconfig/mconf.c	/^static void conf_choice(struct menu *menu)$/;"	f	typeref:typename:void	file:
conf_choice	scripts/kconfig/nconf.c	/^static void conf_choice(struct menu *menu)$/;"	f	typeref:typename:void	file:
conf_cnt	scripts/kconfig/conf.c	/^static int conf_cnt;$/;"	v	typeref:typename:int	file:
conf_def_mode	scripts/kconfig/lkc.h	/^enum conf_def_mode {$/;"	g
conf_default_message_callback	scripts/kconfig/confdata.c	/^static void conf_default_message_callback(const char *fmt, va_list ap)$/;"	f	typeref:typename:void	file:
conf_defname	scripts/kconfig/confdata.c	/^const char conf_defname[] = "arch\/$ARCH\/defconfig";$/;"	v	typeref:typename:const char[]
conf_disp_pll	board/siemens/pxm2/board.c	/^static int conf_disp_pll(int m, int n)$/;"	f	typeref:typename:int	file:
conf_disp_pll	board/siemens/rut/board.c	/^static int conf_disp_pll(int m, int n)$/;"	f	typeref:typename:int	file:
conf_expand_value	scripts/kconfig/confdata.c	/^static char *conf_expand_value(const char *in)$/;"	f	typeref:typename:char *	file:
conf_filename	scripts/kconfig/confdata.c	/^static const char *conf_filename;$/;"	v	typeref:typename:const char *	file:
conf_get_autoconfig_name	scripts/kconfig/confdata.c	/^const char *conf_get_autoconfig_name(void)$/;"	f	typeref:typename:const char *
conf_get_changed	scripts/kconfig/confdata.c	/^bool conf_get_changed(void)$/;"	f	typeref:typename:bool
conf_get_configname	scripts/kconfig/confdata.c	/^const char *conf_get_configname(void)$/;"	f	typeref:typename:const char *
conf_get_default_confname	scripts/kconfig/confdata.c	/^char *conf_get_default_confname(void)$/;"	f	typeref:typename:char *
conf_lineno	scripts/kconfig/confdata.c	/^static int conf_lineno, conf_warnings, conf_unsaved;$/;"	v	typeref:typename:int	file:
conf_load	scripts/kconfig/mconf.c	/^static void conf_load(void)$/;"	f	typeref:typename:void	file:
conf_load	scripts/kconfig/nconf.c	/^static void conf_load(void)$/;"	f	typeref:typename:void	file:
conf_message	scripts/kconfig/confdata.c	/^static void conf_message(const char *fmt, ...)$/;"	f	typeref:typename:void	file:
conf_message_callback	scripts/kconfig/confdata.c	/^static void (*conf_message_callback) (const char *fmt, va_list ap) =$/;"	v	typeref:typename:void (*)(const char * fmt,va_list ap)	file:
conf_message_callback	scripts/kconfig/mconf.c	/^static void conf_message_callback(const char *fmt, va_list ap)$/;"	f	typeref:typename:void	file:
conf_message_callback	scripts/kconfig/nconf.c	/^static void conf_message_callback(const char *fmt, va_list ap)$/;"	f	typeref:typename:void	file:
conf_params	drivers/pinctrl/pinctrl-at91-pio4.c	/^static const struct pinconf_param conf_params[] = {$/;"	v	typeref:typename:const struct pinconf_param[]	file:
conf_parse	scripts/kconfig/zconf.tab.c	/^void conf_parse(const char *name)$/;"	f	typeref:typename:void
conf_printer	scripts/kconfig/confdata.c	/^struct conf_printer {$/;"	s	file:
conf_read	scripts/kconfig/confdata.c	/^int conf_read(const char *name)$/;"	f	typeref:typename:int
conf_read_simple	scripts/kconfig/confdata.c	/^int conf_read_simple(const char *name, int def)$/;"	f	typeref:typename:int
conf_save	scripts/kconfig/mconf.c	/^static void conf_save(void)$/;"	f	typeref:typename:void	file:
conf_save	scripts/kconfig/nconf.c	/^static void conf_save(void)$/;"	f	typeref:typename:void	file:
conf_set_all_new_symbols	scripts/kconfig/confdata.c	/^bool conf_set_all_new_symbols(enum conf_def_mode mode)$/;"	f	typeref:typename:bool
conf_set_changed_callback	scripts/kconfig/confdata.c	/^void conf_set_changed_callback(void (*fn)(void))$/;"	f	typeref:typename:void
conf_set_message_callback	scripts/kconfig/confdata.c	/^void conf_set_message_callback(void (*fn) (const char *fmt, va_list ap))$/;"	f	typeref:typename:void
conf_set_sym_val	scripts/kconfig/confdata.c	/^static int conf_set_sym_val(struct symbol *sym, int def, int def_flags, char *p)$/;"	f	typeref:typename:int	file:
conf_split_config	scripts/kconfig/confdata.c	/^static int conf_split_config(void)$/;"	f	typeref:typename:int	file:
conf_string	scripts/kconfig/conf.c	/^static int conf_string(struct menu *menu)$/;"	f	typeref:typename:int	file:
conf_string	scripts/kconfig/mconf.c	/^static void conf_string(struct menu *menu)$/;"	f	typeref:typename:void	file:
conf_string	scripts/kconfig/nconf.c	/^static void conf_string(struct menu *menu)$/;"	f	typeref:typename:void	file:
conf_sym	scripts/kconfig/conf.c	/^static int conf_sym(struct menu *menu)$/;"	f	typeref:typename:int	file:
conf_unsaved	scripts/kconfig/confdata.c	/^static int conf_lineno, conf_warnings, conf_unsaved;$/;"	v	typeref:typename:int	file:
conf_usage	scripts/kconfig/conf.c	/^static void conf_usage(const char *progname)$/;"	f	typeref:typename:void	file:
conf_warning	scripts/kconfig/confdata.c	/^static void conf_warning(const char *fmt, ...)$/;"	f	typeref:typename:void	file:
conf_warnings	scripts/kconfig/confdata.c	/^static int conf_lineno, conf_warnings, conf_unsaved;$/;"	v	typeref:typename:int	file:
conf_write	scripts/kconfig/confdata.c	/^int conf_write(const char *name)$/;"	f	typeref:typename:int
conf_write_autoconf	scripts/kconfig/confdata.c	/^int conf_write_autoconf(void)$/;"	f	typeref:typename:int
conf_write_defconfig	scripts/kconfig/confdata.c	/^int conf_write_defconfig(const char *filename)$/;"	f	typeref:typename:int
conf_write_heading	scripts/kconfig/confdata.c	/^conf_write_heading(FILE *fp, struct conf_printer *printer, void *printer_arg)$/;"	f	typeref:typename:void	file:
conf_write_symbol	scripts/kconfig/confdata.c	/^static void conf_write_symbol(FILE *fp, struct symbol *sym,$/;"	f	typeref:typename:void	file:
config	Makefile	/^config: scripts_basic outputmakefile FORCE$/;"	t
config	arch/arc/lib/cache.c	/^			unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;$/;"	m	struct:read_decode_cache_bcr::__anon3b450cc2060a::__anon3b450cc20708	typeref:typename:unsigned int:4	file:
config	arch/arm/cpu/armv7/mx6/soc.c	/^	u32	config;$/;"	m	struct:scu_regs	typeref:typename:u32	file:
config	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 config;	\/* Static memory configuration               *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
config	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 config;		\/* Configures operation of the EMC           *\/$/;"	m	struct:emc_regs	typeref:typename:u32
config	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 config;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
config	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 config;				\/* 0x44 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
config	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 config;$/;"	m	struct:bcm2835_mbox_regs	typeref:typename:u32
config	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	config;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
config	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 config;	\/*0x20100 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
config	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 config;	\/*0x20100 *\/$/;"	m	struct:orion5x_cpu_registers	typeref:typename:u32
config	arch/arm/mach-tegra/xusb-padctl-common.h	/^	struct tegra_xusb_padctl_config config;$/;"	m	struct:tegra_xusb_padctl	typeref:struct:tegra_xusb_padctl_config
config	arch/blackfin/include/asm/dma.h	/^	u32 config;		\/* DMA Configuration register *\/$/;"	m	struct:dma_register	typeref:typename:u32
config	arch/powerpc/cpu/mpc512x/ide.c	/^		u32 config;$/;"	m	union:ide_preinit::__anond3b5d05a020a	typeref:typename:u32	file:
config	arch/powerpc/include/asm/fsl_pci.h	/^	u32	config;		\/* 0x014 - PCIE CONFIG Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
config	arch/x86/include/asm/arch-broadwell/gpio.h	/^	} config[GPIO_BANKS * GPIO_PER_BANK];$/;"	m	struct:pch_lp_gpio_regs	typeref:struct:pch_lp_gpio_regs::__anond5044f050108[]
config	arch/x86/include/asm/coreboot_tables.h	/^	u32 config;$/;"	m	struct:cb_cmos_entries	typeref:typename:u32
config	arch/x86/include/asm/irq.h	/^	int config;$/;"	m	struct:irq_router	typeref:typename:int
config	board/birdland/bav335x/board.h	/^	char config[32];$/;"	m	struct:board_eeconfig	typeref:typename:char[32]
config	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 config[8];        \/* 0x42: loading options *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[8]
config	board/ti/common/board_detect.h	/^	char config[DRA7_EEPROM_HDR_CONFIG_LEN];$/;"	m	struct:dra7_eeprom	typeref:typename:char[]
config	board/ti/common/board_detect.h	/^	char config[TI_EEPROM_HDR_CONFIG_LEN + 1];$/;"	m	struct:ti_common_eeprom	typeref:typename:char[]
config	board/ti/common/board_detect.h	/^	char config[TI_EEPROM_HDR_CONFIG_LEN];$/;"	m	struct:ti_am_eeprom	typeref:typename:char[]
config	board/vscom/baltos/board.h	/^	char config[32];$/;"	m	struct:am335x_baseboard_id	typeref:typename:char[32]
config	doc/README.x86	/^config                         0x7476c0   raw          6075$/;"	l
config	drivers/dma/lpc32xx_dma.c	/^	u32 config;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
config	drivers/input/keyboard.c	/^static struct input_config config;$/;"	v	typeref:struct:input_config	file:
config	drivers/mtd/ftsmc020.c	/^	unsigned int	config;$/;"	m	struct:ftsmc020_config	typeref:typename:unsigned int	file:
config	drivers/mtd/nand/mxc_nand.h	/^	u16 config;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
config	drivers/mtd/nand/tegra_nand.c	/^	struct fdt_nand config;$/;"	m	struct:nand_drv	typeref:struct:fdt_nand	file:
config	drivers/mtd/nand/tegra_nand.h	/^	u32	config;		\/* offset 10h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
config	drivers/net/ag7xxx.c	/^	u32	config;$/;"	m	struct:ag7xxx_dma_desc	typeref:typename:u32	file:
config	drivers/net/calxedaxgmac.c	/^	u32 config;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
config	drivers/net/dwc_eth_qos.c	/^	const struct eqos_config *config;$/;"	m	struct:eqos_priv	typeref:typename:const struct eqos_config *	file:
config	drivers/pinctrl/pinctrl_pic32.c	/^	u32 config;	\/* one of PIN_CONFIG_* *\/$/;"	m	struct:pic32_pin_config	typeref:typename:u32	file:
config	drivers/usb/eth/mcs7830.c	/^	uint8_t config;$/;"	m	struct:mcs7830_private	typeref:typename:uint8_t	file:
config	drivers/usb/gadget/ci_udc.h	/^	unsigned config;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
config	drivers/usb/gadget/ether.c	/^	u8			config;$/;"	m	struct:eth_dev	typeref:typename:u8	file:
config	drivers/usb/gadget/f_dfu.c	/^	u8				config;$/;"	m	struct:f_dfu	typeref:typename:u8	file:
config	drivers/usb/host/ehci-hcd.c	/^	struct usb_linux_config_descriptor config;$/;"	m	struct:descriptor	typeref:struct:usb_linux_config_descriptor	file:
config	drivers/usb/host/xhci.c	/^	struct usb_config_descriptor config;$/;"	m	struct:descriptor	typeref:struct:usb_config_descriptor	file:
config	drivers/usb/musb-new/musb_core.h	/^	struct musb_hdrc_config	*config;$/;"	m	struct:musb	typeref:struct:musb_hdrc_config *
config	include/ACEX1K.h	/^	Altera_config_fn	config;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_config_fn
config	include/ACEX1K.h	/^	Altera_config_fn	config;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_config_fn
config	include/altera.h	/^	Altera_config_fn config;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_config_fn
config	include/ata.h	/^	unsigned short	config;		\/* lots of obsolete bit flags *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
config	include/ddr_spd.h	/^	unsigned char config;      \/* 11 DIMM Configuration type *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
config	include/ddr_spd.h	/^	unsigned char config;      \/* 11 DIMM Configuration type *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
config	include/ec_commands.h	/^	struct ec_mkbp_config config;$/;"	m	struct:ec_params_mkbp_set_config	typeref:struct:ec_mkbp_config
config	include/ec_commands.h	/^	struct ec_mkbp_config config;$/;"	m	struct:ec_response_mkbp_get_config	typeref:struct:ec_mkbp_config
config	include/fsl_ddr_sdram.h	/^		unsigned int config;$/;"	m	struct:fsl_ddr_cfg_regs_s::__anon20eac7820108	typeref:typename:unsigned int
config	include/grlib/gptimer.h	/^	volatile unsigned int config;$/;"	m	struct:__anon98dc47250208	typeref:typename:volatile unsigned int
config	include/linux/mtd/omap_gpmc.h	/^	u32 config;		\/* 0x50 *\/$/;"	m	struct:gpmc	typeref:typename:u32
config	include/linux/usb/composite.h	/^	struct usb_configuration	*config;$/;"	m	struct:usb_composite_dev	typeref:struct:usb_configuration *
config	include/linux/usb/composite.h	/^	struct usb_configuration	*config;$/;"	m	struct:usb_function	typeref:struct:usb_configuration *
config	include/linux/usb/musb.h	/^	struct musb_hdrc_config	*config;$/;"	m	struct:musb_hdrc_platform_data	typeref:struct:musb_hdrc_config *
config	include/mpc5xxx.h	/^	volatile u32 config;		\/* XLB + 0x40 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
config	include/phy.h	/^	int (*config)(struct phy_device *phydev);$/;"	m	struct:phy_driver	typeref:typename:int (*)(struct phy_device * phydev)
config	include/spd.h	/^	unsigned char config;      \/* 11 DIMM Configuration type *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
config	include/usb.h	/^	struct usb_config config; \/* config descriptor *\/$/;"	m	struct:usb_device	typeref:struct:usb_config
config	lib/zlib/deflate.c	/^} config;$/;"	t	typeref:struct:config_s	file:
config	scripts/kconfig/Makefile	/^config: $(obj)\/conf$/;"	t
config-targets	Makefile	/^                config-targets := 1$/;"	m
config-targets	Makefile	/^config-targets := 0$/;"	m
config0	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	config0;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
config0	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 config0;		\/* Configuration information for the SDRAM   *\/$/;"	m	struct:emc_regs	typeref:typename:u32
config0_id	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 config0_id;			\/* 0x004 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
config1	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 config1;		\/* Configuration information for the SDRAM   *\/$/;"	m	struct:emc_regs	typeref:typename:u32
config1	arch/mips/mach-ath79/ar934x/ddr.c	/^	u32	config1;$/;"	m	struct:ar934x_mem_config	typeref:typename:u32	file:
config1	board/cm5200/cm5200.h	/^	ulong config1;$/;"	m	struct:__anonb595836f0408	typeref:typename:ulong
config1	drivers/mtd/nand/mxc_nand.h	/^	u16 config1;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
config1	drivers/mtd/nand/mxc_nand.h	/^	u32 config1;$/;"	m	struct:mxc_nand_regs	typeref:typename:u32
config1	include/fsl_usb.h	/^	u32     config1;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
config1	include/linux/mtd/omap_gpmc.h	/^	u32 config1;		\/* 0x00 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
config1	include/mpc5xxx.h	/^	volatile u32	config1;$/;"	m	struct:mpc5xxx_sdram	typeref:typename:volatile u32
config1_id	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 config1_id;			\/* 0x005 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
config2	arch/mips/mach-ath79/ar934x/ddr.c	/^	u32	config2;$/;"	m	struct:ar934x_mem_config	typeref:typename:u32	file:
config2	board/cm5200/cm5200.h	/^	ulong config2;$/;"	m	struct:__anonb595836f0408	typeref:typename:ulong
config2	drivers/mtd/nand/mxc_nand.h	/^	u16 config2;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
config2	drivers/mtd/nand/mxc_nand.h	/^	u32 config2;$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32
config2	include/fsl_usb.h	/^	u32     config2;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
config2	include/linux/mtd/omap_gpmc.h	/^	u32 config2;		\/* 0x04 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
config2	include/mpc5xxx.h	/^	volatile u32	config2;$/;"	m	struct:mpc5xxx_sdram	typeref:typename:volatile u32
config2_id	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 config2_id;			\/* 0x006 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
config3	drivers/mtd/nand/mxc_nand.h	/^	u32 config3;$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32
config3	include/fsl_usb.h	/^	u32     config3;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
config3	include/linux/mtd/omap_gpmc.h	/^	u32 config3;		\/* 0x08 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
config3_id	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 config3_id;			\/* 0x007 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
config4	include/fsl_usb.h	/^	u32     config4;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
config4	include/linux/mtd/omap_gpmc.h	/^	u32 config4;		\/* 0x0C *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
config5	include/fsl_usb.h	/^	u32     config5;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
config5	include/linux/mtd/omap_gpmc.h	/^	u32 config5;		\/* 0x10 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
config6	include/linux/mtd/omap_gpmc.h	/^	u32 config6;		\/* 0x14 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
config7	include/linux/mtd/omap_gpmc.h	/^	u32 config7;		\/* 0x18 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
configAddress	drivers/bios_emulator/include/biosemu.h	/^	u32 configAddress;$/;"	m	struct:__anon964d10140108	typeref:typename:u32
configApp	scripts/kconfig/qconf.cc	/^static QApplication *configApp;$/;"	v	typeref:typename:QApplication *	file:
configList	scripts/kconfig/qconf.h	/^	ConfigList *configList;$/;"	m	class:ConfigMainWindow	typeref:typename:ConfigList *
configSettings	scripts/kconfig/qconf.cc	/^static ConfigSettings *configSettings;$/;"	v	typeref:typename:ConfigSettings *	file:
configView	scripts/kconfig/qconf.h	/^	ConfigView *configView;$/;"	m	class:ConfigMainWindow	typeref:typename:ConfigView *
config_2	include/fsl_ddr_sdram.h	/^		unsigned int config_2;$/;"	m	struct:fsl_ddr_cfg_regs_s::__anon20eac7820108	typeref:typename:unsigned int
config_8260_ioports	arch/powerpc/cpu/mpc8260/cpu_init.c	/^static void config_8260_ioports (volatile immap_t * immr)$/;"	f	typeref:typename:void	file:
config_8560_ioports	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void config_8560_ioports (volatile ccsr_cpm_t * cpm)$/;"	f	typeref:typename:void
config_address	arch/powerpc/include/asm/immap_512x.h	/^	u32 config_address;$/;"	m	struct:pciconf512x	typeref:typename:u32
config_address	arch/powerpc/include/asm/immap_83xx.h	/^	u32 config_address;$/;"	m	struct:pciconf83xx	typeref:typename:u32
config_aneg	drivers/qe/uec_phy.h	/^	int (*config_aneg) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:int (*)(struct uec_mii_info * mii_info)
config_backside_crossbar_mux	board/freescale/t4qds/t4240qds.c	/^int config_backside_crossbar_mux(void)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls1021aqds/ls1021aqds.c	/^int config_board_mux(int ctrl_type)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^int config_board_mux(void)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls1043aqds/ls1043aqds.c	/^int config_board_mux(int ctrl_type)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls1043ardb/ls1043ardb.c	/^int config_board_mux(void)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls1046aqds/ls1046aqds.c	/^int config_board_mux(int ctrl_type)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls1046ardb/ls1046ardb.c	/^void config_board_mux(void)$/;"	f	typeref:typename:void
config_board_mux	board/freescale/ls2080aqds/ls2080aqds.c	/^int config_board_mux(int ctrl_type)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/ls2080ardb/ls2080ardb.c	/^int config_board_mux(int ctrl_type)$/;"	f	typeref:typename:int
config_board_mux	board/freescale/p1010rdb/p1010rdb.c	/^int config_board_mux(int ctrl_type)$/;"	f	typeref:typename:int
config_branch_prediction	arch/arm/mach-exynos/spl_boot.c	/^static int config_branch_prediction(int set_cr_z)$/;"	f	typeref:typename:int	file:
config_buf	drivers/usb/gadget/composite.c	/^static int config_buf(struct usb_configuration *config,$/;"	f	typeref:typename:int	file:
config_buf	drivers/usb/gadget/ether.c	/^config_buf(struct usb_gadget *g, u8 *buf, u8 type, unsigned index, int is_otg)$/;"	f	typeref:typename:int	file:
config_cache	arch/arm/mach-tegra/cache.c	/^void config_cache(void)$/;"	f	typeref:typename:void
config_ch	drivers/dma/lpc32xx_dma.c	/^	u32 config_ch;$/;"	m	struct:dmac_chan_reg	typeref:typename:u32	file:
config_clock	drivers/usb/host/ehci-tegra.c	/^static void config_clock(const u32 timing[])$/;"	f	typeref:typename:void	file:
config_cmd_ctrl	arch/arm/cpu/armv7/am33xx/ddr.c	/^void config_cmd_ctrl(const struct cmd_control *cmd, int nr)$/;"	f	typeref:typename:void
config_core_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static int config_core_clk(u32 ref, u32 freq)$/;"	f	typeref:typename:int	file:
config_data	arch/powerpc/include/asm/immap_512x.h	/^	u32 config_data;$/;"	m	struct:pciconf512x	typeref:typename:u32
config_data	arch/powerpc/include/asm/immap_83xx.h	/^	u32 config_data;$/;"	m	struct:pciconf83xx	typeref:typename:u32
config_data_eye_leveling_samples	arch/arm/cpu/armv7/omap4/hwinit.c	/^void config_data_eye_leveling_samples(u32 emif_base)$/;"	f	typeref:typename:void
config_data_eye_leveling_samples	arch/arm/cpu/armv7/omap5/hwinit.c	/^void config_data_eye_leveling_samples(u32 emif_base)$/;"	f	typeref:typename:void
config_ddr	arch/arm/cpu/armv7/am33xx/emif4.c	/^void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs,$/;"	f	typeref:typename:void
config_ddr_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static int config_ddr_clk(u32 emi_clk)$/;"	f	typeref:typename:int	file:
config_ddr_data	arch/arm/cpu/armv7/am33xx/ddr.c	/^void config_ddr_data(const struct ddr_data *data, int nr)$/;"	f	typeref:typename:void
config_ddr_phy	arch/arm/cpu/armv7/am33xx/ddr.c	/^void config_ddr_phy(const struct emif_regs *regs, int nr)$/;"	f	typeref:typename:void
config_desc	drivers/usb/gadget/composite.c	/^static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)$/;"	f	typeref:typename:int	file:
config_device	include/pci.h	/^	void (*config_device)(struct pci_controller* hose, pci_dev_t dev,$/;"	m	struct:pci_config_table	typeref:typename:void (*)(struct pci_controller * hose,pci_dev_t dev,struct pci_config_table *)
config_dmm	arch/arm/cpu/armv7/am33xx/emif4.c	/^void config_dmm(const struct dmm_lisa_map_regs *regs)$/;"	f	typeref:typename:void
config_enabled	include/linux/kconfig.h	/^#define config_enabled(/;"	d
config_entry_start	scripts/kconfig/zconf.y	/^config_entry_start: T_CONFIG T_WORD T_EOL$/;"	l
config_etseccm_source	board/freescale/ls1021aqds/ls1021aqds.c	/^void config_etseccm_source(int etsec_gtx_125_mux)$/;"	f	typeref:typename:void
config_fifo	drivers/usb/musb/musb_core.c	/^# define config_fifo(/;"	d	file:
config_file	tools/env/fw_env.h	/^	char *config_file;$/;"	m	struct:env_opts	typeref:typename:char *
config_flag	include/usb/ehci-ci.h	/^	u32	config_flag;	\/* 0x180 - Configured Flag Register *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
config_frontside_crossbar_vsc3316	board/freescale/t4qds/t4240qds.c	/^int config_frontside_crossbar_vsc3316(void)$/;"	f	typeref:typename:int
config_func_info	drivers/ddr/marvell/a38x/ddr3_debug.c	/^struct hws_tip_config_func_db config_func_info[HWS_MAX_DEVICE_NUM];$/;"	v	typeref:struct:hws_tip_config_func_db[]
config_genmii_advert	drivers/qe/uec_phy.c	/^static void config_genmii_advert (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:void	file:
config_hub_port	drivers/usb/musb/musb_hcd.c	/^static void config_hub_port(struct usb_device *dev, u8 ep)$/;"	f	typeref:typename:void	file:
config_id	arch/x86/include/asm/coreboot_tables.h	/^	u32 config_id;$/;"	m	struct:cb_cmos_entries	typeref:typename:u32
config_id	arch/x86/include/asm/coreboot_tables.h	/^	u32 config_id;$/;"	m	struct:cb_cmos_enums	typeref:typename:u32
config_instance	drivers/serial/usbtty.c	/^static struct usb_configuration_instance config_instance[NUM_CONFIGS];$/;"	v	typeref:struct:usb_configuration_instance[]	file:
config_int	include/gdsys_fpga.h	/^	u16 config_int;$/;"	m	struct:ihs_fpga_channel	typeref:typename:u16
config_int	include/gdsys_fpga.h	/^	u16 config_int;$/;"	m	struct:ihs_fpga_hicb	typeref:typename:u16
config_intr	drivers/qe/uec_phy.h	/^	int (*config_intr) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:int (*)(struct uec_mii_info * mii_info)
config_io_ctrl	arch/arm/cpu/armv7/am33xx/ddr.c	/^void config_io_ctrl(const struct ctrl_ioregs *ioregs)$/;"	f	typeref:typename:void
config_kbc_gpio	drivers/input/tegra-kbc.c	/^static void config_kbc_gpio(struct tegra_kbd_priv *priv, struct kbc_tegra *kbc)$/;"	f	typeref:typename:void	file:
config_list	board/amcc/bamboo/bamboo.h	/^typedef enum config_list {  IIC_CORE,$/;"	g
config_list	board/amcc/yucca/yucca.h	/^typedef enum config_list {$/;"	g
config_list_t	board/amcc/yucca/yucca.h	/^} config_list_t;$/;"	t	typeref:enum:config_list
config_mailmap	scripts/mailmapper	/^    config_mailmap = ''$/;"	v
config_mailmap	scripts/mailmapper	/^config_mailmap = config_mailmap.rstrip()$/;"	v
config_mmdc	board/freescale/s32v234evb/lpddr2.c	/^void config_mmdc(uint8_t module)$/;"	f	typeref:typename:void
config_module	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^static int config_module;$/;"	v	typeref:typename:int	file:
config_nfc_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static int config_nfc_clk(u32 nfc_clk)$/;"	f	typeref:typename:int	file:
config_on_ebc_cs4_is_small_flash	board/amcc/bamboo/bamboo.c	/^unsigned char config_on_ebc_cs4_is_small_flash(void)$/;"	f	typeref:typename:unsigned char
config_option	scripts/kconfig/zconf.y	/^config_option: T_DEFAULT expr if_expr T_EOL$/;"	l
config_option	scripts/kconfig/zconf.y	/^config_option: T_PROMPT prompt if_expr T_EOL$/;"	l
config_option	scripts/kconfig/zconf.y	/^config_option: T_RANGE symbol symbol if_expr T_EOL$/;"	l
config_option	scripts/kconfig/zconf.y	/^config_option: T_SELECT T_WORD if_expr T_EOL$/;"	l
config_option	scripts/kconfig/zconf.y	/^config_option: T_TYPE prompt_stmt_opt T_EOL$/;"	l
config_option_list	scripts/kconfig/zconf.y	/^config_option_list:$/;"	l
config_pamu	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn)$/;"	f	typeref:typename:int
config_pcie_mode	arch/arm/mach-keystone/init.c	/^static void config_pcie_mode(int pcie_port,  enum pci_mode mode)$/;"	f	typeref:typename:void	file:
config_periph_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static int config_periph_clk(u32 ref, u32 freq)$/;"	f	typeref:typename:int	file:
config_pin	drivers/gpio/db8500_gpio.c	/^static void config_pin(unsigned long cfg)$/;"	f	typeref:typename:void	file:
config_pll_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static int config_pll_clk(enum pll_clocks index, struct pll_param *pll_param)$/;"	f	typeref:typename:int	file:
config_qe_ioports	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^static void config_qe_ioports(void)$/;"	f	typeref:typename:void	file:
config_qe_ioports	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^static void config_qe_ioports(void)$/;"	f	typeref:typename:void	file:
config_reg_helper	drivers/gpio/sh_pfc.c	/^static void config_reg_helper(struct pinmux_info *gpioc,$/;"	f	typeref:typename:void	file:
config_s	lib/zlib/deflate.c	/^typedef struct config_s {$/;"	s	file:
config_sd_carddetect	board/hisilicon/hikey/hikey.c	/^static int config_sd_carddetect(void)$/;"	f	typeref:typename:int	file:
config_sdram	arch/arm/cpu/armv7/am33xx/ddr.c	/^void config_sdram(const struct emif_regs *regs, int nr)$/;"	f	typeref:typename:void
config_sdram_emif4d5	arch/arm/cpu/armv7/am33xx/ddr.c	/^void config_sdram_emif4d5(const struct emif_regs *regs, int nr)$/;"	f	typeref:typename:void
config_selection	board/amcc/yucca/yucca.h	/^typedef enum config_selection {$/;"	g
config_selection_t	board/amcc/yucca/yucca.h	/^} config_selection_t;$/;"	t	typeref:enum:config_selection
config_serdes1_refclks	board/freescale/b4860qds/b4860qds.c	/^int config_serdes1_refclks(void)$/;"	f	typeref:typename:int
config_serdes2_refclks	board/freescale/b4860qds/b4860qds.c	/^int config_serdes2_refclks(void)$/;"	f	typeref:typename:int
config_serdes_mux	board/freescale/ls1021aqds/ls1021aqds.c	/^int config_serdes_mux(void)$/;"	f	typeref:typename:int
config_serdes_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^int config_serdes_mux(void)$/;"	f	typeref:typename:int
config_serdes_mux	board/freescale/ls1043aqds/ls1043aqds.c	/^int config_serdes_mux(void)$/;"	f	typeref:typename:int
config_serdes_mux	board/freescale/ls1046aqds/ls1046aqds.c	/^int config_serdes_mux(void)$/;"	f	typeref:typename:int
config_status	drivers/net/tsi108_eth.c	/^	vuint32 config_status;	\/* Configuration\/Status. *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
config_stmt	scripts/kconfig/zconf.y	/^config_stmt: config_entry_start config_option_list$/;"	l
config_switch_bit	board/bf609-ezkit/soft_switch.c	/^int config_switch_bit(int addr, int port, int bit, int dir, uchar value)$/;"	f	typeref:typename:int
config_table	include/pci.h	/^	struct pci_config_table *config_table;$/;"	m	struct:pci_controller	typeref:struct:pci_config_table *
config_type	drivers/ddr/marvell/axp/ddr3_init.h	/^typedef enum config_type {$/;"	g
config_val	include/linux/kconfig.h	/^#define config_val(/;"	d
config_validity	board/amcc/bamboo/bamboo.h	/^typedef enum config_validity { CONFIG_IS_VALID,$/;"	g
config_validity_t	board/amcc/bamboo/bamboo.h	/^} config_validity_t;$/;"	t	typeref:enum:config_validity
config_vtp	arch/arm/cpu/armv7/am33xx/emif4.c	/^static void config_vtp(int nr)$/;"	f	typeref:typename:void	file:
configdata	drivers/usb/musb/musb_core.h	/^	u8	configdata;$/;"	m	struct:musb_ep0_regs	typeref:typename:u8
configfiles	scripts/kconfig/Makefile	/^configfiles=$(wildcard $(srctree)\/kernel\/configs\/$@ $(srctree)\/arch\/$(SRCARCH)\/configs\/$@/;"	m
configflag	arch/arm/include/asm/ehci-omap.h	/^	u32 configflag;		\/* 0x50 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
configflag	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 configflag;		\/* configflag *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
configno	include/usb.h	/^	int configno;			\/* selected config number *\/$/;"	m	struct:usb_device	typeref:typename:int
configno	include/usb.h	/^	int configno;$/;"	m	struct:usb_dev_platdata	typeref:typename:int
confignr	drivers/usb/gadget/rndis.h	/^	u8			confignr;$/;"	m	struct:rndis_params	typeref:typename:u8
configs	include/linux/usb/composite.h	/^	struct list_head		configs;$/;"	m	struct:usb_composite_dev	typeref:struct:list_head
configs	tools/atmelimage.c	/^static const char * const configs[] = {$/;"	v	typeref:typename:const char * const[]	file:
configuration	doc/README.x86	/^configuration during the 'make menuconfig' process.$/;"	l
configuration	drivers/net/dwc_eth_qos.c	/^	uint32_t configuration;				\/* 0x000 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
configuration	drivers/usb/eth/mcs7830.c	/^	uint8_t configuration;$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t	file:
configuration	include/usbdescriptors.h	/^		struct usb_configuration_descriptor configuration;$/;"	m	union:usb_descriptor::__anon028dca6a010a	typeref:struct:usb_configuration_descriptor
configuration	include/usbdevice.h	/^	u8 configuration;	\/* current show configuration (zero is default) *\/$/;"	m	struct:usb_device_instance	typeref:typename:u8
configuration_desc	drivers/serial/usbtty.c	/^	struct usb_configuration_descriptor configuration_desc;$/;"	m	struct:acm_config_desc	typeref:struct:usb_configuration_descriptor	file:
configuration_desc	drivers/serial/usbtty.c	/^	struct usb_configuration_descriptor configuration_desc;$/;"	m	struct:gserial_config_desc	typeref:struct:usb_configuration_descriptor	file:
configuration_descriptor	drivers/serial/usbtty.c	/^static struct usb_configuration_descriptor	*configuration_descriptor = 0;$/;"	v	typeref:struct:usb_configuration_descriptor *	file:
configuration_descriptor	include/usbdevice.h	/^	struct usb_configuration_descriptor *configuration_descriptor;$/;"	m	struct:usb_configuration_instance	typeref:struct:usb_configuration_descriptor *
configuration_done	drivers/usb/gadget/f_thor.h	/^	unsigned char configuration_done;$/;"	m	struct:thor_dev	typeref:typename:unsigned char
configuration_get_cmap	drivers/video/atmel_hlcdfb.c	/^ushort *configuration_get_cmap(void)$/;"	f	typeref:typename:ushort *
configuration_get_cmap	drivers/video/atmel_lcdfb.c	/^ushort *configuration_get_cmap(void)$/;"	f	typeref:typename:ushort *
configuration_get_cmap	drivers/video/mpc8xx_lcd.c	/^ushort *configuration_get_cmap(void)$/;"	f	typeref:typename:ushort *
configuration_get_cmap	drivers/video/pxa_lcd.c	/^ushort *configuration_get_cmap(void)$/;"	f	typeref:typename:ushort *
configuration_get_cmap	include/lcd.h	/^static __maybe_unused ushort *configuration_get_cmap(void)$/;"	f	typeref:typename:__maybe_unused ushort *
configuration_instance_array	include/usbdevice.h	/^	struct usb_configuration_instance *configuration_instance_array;$/;"	m	struct:usb_device_instance	typeref:struct:usb_configuration_instance *
configuration_reg	include/tca642x.h	/^	uint8_t configuration_reg;$/;"	m	struct:tca642x_bank_info	typeref:typename:uint8_t
configuration_table	lib/zlib/deflate.c	/^local const config configuration_table[10] = {$/;"	v	typeref:typename:local const config[10]
configuration_table	lib/zlib/deflate.c	/^local const config configuration_table[2] = {$/;"	v	typeref:typename:local const config[2]
configurations	include/usbdevice.h	/^	int configurations;$/;"	m	struct:usb_device_instance	typeref:typename:int
configure_2nd_sram_as_l2_cache	arch/arm/mach-at91/atmel_sfr.c	/^void configure_2nd_sram_as_l2_cache(void)$/;"	f	typeref:typename:void
configure_aif_clock	drivers/sound/wm8994.c	/^static int configure_aif_clock(struct wm8994_priv *wm8994, int aif)$/;"	f	typeref:typename:int	file:
configure_c_states	arch/x86/cpu/broadwell/cpu.c	/^static void configure_c_states(void)$/;"	f	typeref:typename:void	file:
configure_c_states	arch/x86/cpu/ivybridge/model_206ax.c	/^static void configure_c_states(void)$/;"	f	typeref:typename:void	file:
configure_clocks	arch/arm/mach-stm32/stm32f1/clock.c	/^int configure_clocks(void)$/;"	f	typeref:typename:int
configure_clocks	arch/arm/mach-stm32/stm32f4/clock.c	/^int configure_clocks(void)$/;"	f	typeref:typename:int
configure_clocks	arch/arm/mach-stm32/stm32f7/clock.c	/^int configure_clocks(void)$/;"	f	typeref:typename:int
configure_dca_cap	arch/x86/cpu/broadwell/cpu.c	/^static void configure_dca_cap(void)$/;"	f	typeref:typename:void	file:
configure_dca_cap	arch/x86/cpu/ivybridge/model_206ax.c	/^static void configure_dca_cap(void)$/;"	f	typeref:typename:void	file:
configure_emmc	arch/arm/mach-rockchip/rk3288-board-spl.c	/^static int configure_emmc(struct udevice *pinctrl)$/;"	f	typeref:typename:int	file:
configure_gbit_phy	board/gdsys/405ep/io.c	/^int configure_gbit_phy(unsigned char addr)$/;"	f	typeref:typename:int
configure_gbit_phy	board/gdsys/405ex/io64.c	/^int configure_gbit_phy(char *bus, unsigned char addr)$/;"	f	typeref:typename:int
configure_irq_trigger	arch/x86/lib/i8259.c	/^void configure_irq_trigger(int int_num, bool is_level_triggered)$/;"	f	typeref:typename:void
configure_l2_actlr	arch/arm/mach-exynos/common_setup.h	/^static inline void configure_l2_actlr(void)$/;"	f	typeref:typename:void
configure_l2_ctlr	arch/arm/mach-exynos/common_setup.h	/^static inline void configure_l2_ctlr(void)$/;"	f	typeref:typename:void
configure_l2ctlr	arch/arm/mach-rockchip/rk3288-board-spl.c	/^static void configure_l2ctlr(void)$/;"	f	typeref:typename:void	file:
configure_main_pll	arch/arm/mach-keystone/clock.c	/^void configure_main_pll(const struct pll_init_data *data)$/;"	f	typeref:typename:void
configure_mca	arch/x86/cpu/broadwell/cpu.c	/^static void configure_mca(void)$/;"	f	typeref:typename:void	file:
configure_mca	arch/x86/cpu/ivybridge/model_206ax.c	/^static void configure_mca(void)$/;"	f	typeref:typename:void	file:
configure_misc	arch/x86/cpu/broadwell/cpu.c	/^static void configure_misc(void)$/;"	f	typeref:typename:void	file:
configure_misc	arch/x86/cpu/ivybridge/model_206ax.c	/^static void configure_misc(void)$/;"	f	typeref:typename:void	file:
configure_module_pin_mux	arch/arm/cpu/armv7/am33xx/mux.c	/^void configure_module_pin_mux(struct module_pin_mux *mod_pin_mux)$/;"	f	typeref:typename:void
configure_mpu_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void configure_mpu_dpll(void)$/;"	f	typeref:typename:void
configure_mr	arch/arm/cpu/armv7/am33xx/ddr.c	/^static void configure_mr(int nr, u32 cs)$/;"	f	typeref:typename:void	file:
configure_mult_div	arch/arm/mach-keystone/clock.c	/^static void configure_mult_div(const struct pll_init_data *data)$/;"	f	typeref:typename:void	file:
configure_pch_power_sharing	arch/x86/cpu/broadwell/cpu.c	/^static void configure_pch_power_sharing(void)$/;"	f	typeref:typename:void	file:
configure_pin_mux	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^static inline void configure_pin_mux(struct pin_cfg *pin_mux)$/;"	f	typeref:typename:void
configure_ppc440ep_pins	board/amcc/bamboo/bamboo.c	/^void configure_ppc440ep_pins(void)$/;"	f	typeref:typename:void
configure_rgmii	board/freescale/mpc8548cds/mpc8548cds.c	/^void configure_rgmii(void)$/;"	f	typeref:typename:void
configure_secondary_pll	arch/arm/mach-keystone/clock.c	/^void configure_secondary_pll(const struct pll_init_data *data)$/;"	f	typeref:typename:void
configure_thermal_target	arch/x86/cpu/broadwell/cpu.c	/^static void configure_thermal_target(struct udevice *dev)$/;"	f	typeref:typename:void	file:
configure_thermal_target	arch/x86/cpu/ivybridge/model_206ax.c	/^static int configure_thermal_target(struct udevice *dev)$/;"	f	typeref:typename:int	file:
configure_vsc3316_3308	board/freescale/b4860qds/b4860qds.c	/^int configure_vsc3316_3308(void)$/;"	f	typeref:typename:int
configure_wait	net/link_local.c	/^static void configure_wait(void)$/;"	f	typeref:typename:void	file:
confirm_key_prog	cmd/mmc.c	/^static int confirm_key_prog(void)$/;"	f	typeref:typename:int	file:
confirm_prog	cmd/fuse.c	/^static int confirm_prog(void)$/;"	f	typeref:typename:int	file:
confirm_yesno	common/console.c	/^int confirm_yesno(void)$/;"	f	typeref:typename:int
conflicts	net/link_local.c	/^static unsigned conflicts;$/;"	v	typeref:typename:unsigned	file:
conn	board/mpl/pati/pati.c	/^int conn=0;$/;"	v	typeref:typename:int
connect_timeout	include/usb.h	/^	ulong connect_timeout;		\/* Device connection timeout in ms *\/$/;"	m	struct:usb_hub_device	typeref:typename:ulong
connection_info_t	include/xyzModem.h	/^} connection_info_t;$/;"	t	typeref:struct:__anon582e218b0108
connection_version	include/linux/apm_bios.h	/^	unsigned short		connection_version;$/;"	m	struct:apm_info	typeref:typename:unsigned short
cons	common/lcd_console.c	/^static struct console_t cons;$/;"	v	typeref:struct:console_t	file:
console	include/linux/fb.h	/^	__u32 console;$/;"	m	struct:fb_con2fbmap	typeref:typename:__u32
console	test/py/conftest.py	/^console = None$/;"	v
console_assign	common/console.c	/^int console_assign(int file, const char *devname)$/;"	f	typeref:typename:int
console_back	arch/powerpc/cpu/mpc8xx/video.c	/^static inline void console_back (void)$/;"	f	typeref:typename:void	file:
console_back	common/lcd_console.c	/^static inline void console_back(void)$/;"	f	typeref:typename:void	file:
console_back	drivers/video/cfb_console.c	/^static void console_back(void)$/;"	f	typeref:typename:void	file:
console_buffer	common/cli_readline.c	/^char console_buffer[CONFIG_SYS_CBSIZE + 1];	\/* console I\/O buffer	*\/$/;"	v	typeref:typename:char[]
console_calc_rowcol	common/lcd_console.c	/^void console_calc_rowcol(struct console_t *pcons, u32 sizex, u32 sizey)$/;"	f	typeref:typename:void
console_calc_rowcol_rot	common/lcd_console_rotation.c	/^static void console_calc_rowcol_rot(struct console_t *pcons)$/;"	f	typeref:typename:void	file:
console_clear	drivers/video/cfb_console.c	/^static void console_clear(void)$/;"	f	typeref:typename:void	file:
console_clear_line	drivers/video/cfb_console.c	/^static void console_clear_line(int line, int begin, int end)$/;"	f	typeref:typename:void	file:
console_col	arch/powerpc/cpu/mpc8xx/video.c	/^	console_col = 0,		\/* Cursor col *\/$/;"	v	typeref:typename:int	file:
console_col	drivers/video/cfb_console.c	/^static int console_col;		\/* cursor col *\/$/;"	v	typeref:typename:int	file:
console_columns	lib/efi_loader/efi_console.c	/^static int console_columns = 80;$/;"	v	typeref:typename:int	file:
console_cr	drivers/video/cfb_console.c	/^static void console_cr(void)$/;"	f	typeref:typename:void	file:
console_cursor	drivers/video/cfb_console.c	/^void console_cursor(int state)$/;"	f	typeref:typename:void
console_cursor_down	drivers/video/cfb_console.c	/^static void console_cursor_down(int n)$/;"	f	typeref:typename:void	file:
console_cursor_fix	drivers/video/cfb_console.c	/^static void console_cursor_fix(void)$/;"	f	typeref:typename:void	file:
console_cursor_is_visible	drivers/video/cfb_console.c	/^static inline int console_cursor_is_visible(void)$/;"	f	typeref:typename:int	file:
console_cursor_left	drivers/video/cfb_console.c	/^static void console_cursor_left(int n)$/;"	f	typeref:typename:void	file:
console_cursor_right	drivers/video/cfb_console.c	/^static void console_cursor_right(int n)$/;"	f	typeref:typename:void	file:
console_cursor_set_position	drivers/video/cfb_console.c	/^static void console_cursor_set_position(int row, int col)$/;"	f	typeref:typename:void	file:
console_cursor_up	drivers/video/cfb_console.c	/^static void console_cursor_up(int n)$/;"	f	typeref:typename:void	file:
console_devices	common/console.c	/^struct stdio_dev **console_devices[MAX_FILES];$/;"	v	typeref:struct:stdio_dev ** []
console_doenv	common/console.c	/^static inline void console_doenv(int file, struct stdio_dev *dev)$/;"	f	typeref:typename:void	file:
console_getc	common/console.c	/^static inline int console_getc(int file)$/;"	f	typeref:typename:int	file:
console_getc	common/console.c	/^static int console_getc(int file)$/;"	f	typeref:typename:int	file:
console_in	include/asm-generic/global_data.h	/^	struct membuff console_in;	\/* console input *\/$/;"	m	struct:global_data	typeref:struct:membuff
console_init_f	common/console.c	/^int console_init_f(void)$/;"	f	typeref:typename:int
console_init_r	common/console.c	/^int console_init_r(void)$/;"	f	typeref:typename:int
console_loglevel	cmd/log.c	/^static unsigned console_loglevel = 3;$/;"	v	typeref:typename:unsigned	file:
console_move_rows_1	drivers/video/console_rotate.c	/^static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc,$/;"	f	typeref:typename:int	file:
console_move_rows_2	drivers/video/console_rotate.c	/^static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,$/;"	f	typeref:typename:int	file:
console_move_rows_3	drivers/video/console_rotate.c	/^static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,$/;"	f	typeref:typename:int	file:
console_moverow0	common/lcd_console.c	/^static inline void console_moverow0(struct console_t *pcons,$/;"	f	typeref:typename:void	file:
console_moverow180	common/lcd_console_rotation.c	/^static inline void console_moverow180(struct console_t *pcons,$/;"	f	typeref:typename:void	file:
console_moverow270	common/lcd_console_rotation.c	/^static inline void console_moverow270(struct console_t *pcons,$/;"	f	typeref:typename:void	file:
console_moverow90	common/lcd_console_rotation.c	/^static inline void console_moverow90(struct console_t *pcons,$/;"	f	typeref:typename:void	file:
console_newline	arch/powerpc/cpu/mpc8xx/video.c	/^static inline void console_newline (void)$/;"	f	typeref:typename:void	file:
console_newline	common/lcd_console.c	/^static inline void console_newline(void)$/;"	f	typeref:typename:void	file:
console_newline	drivers/video/cfb_console.c	/^static void console_newline(int n)$/;"	f	typeref:typename:void	file:
console_normal_move_rows	drivers/video/console_normal.c	/^static int console_normal_move_rows(struct udevice *dev, uint rowdst,$/;"	f	typeref:typename:int	file:
console_normal_ops	drivers/video/console_normal.c	/^struct vidconsole_ops console_normal_ops = {$/;"	v	typeref:struct:vidconsole_ops
console_normal_probe	drivers/video/console_normal.c	/^static int console_normal_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
console_normal_putc_xy	drivers/video/console_normal.c	/^static int console_normal_putc_xy(struct udevice *dev, uint x_frac, uint y,$/;"	f	typeref:typename:int	file:
console_normal_set_row	drivers/video/console_normal.c	/^static int console_normal_set_row(struct udevice *dev, uint row, int clr)$/;"	f	typeref:typename:int	file:
console_ops_1	drivers/video/console_rotate.c	/^struct vidconsole_ops console_ops_1 = {$/;"	v	typeref:struct:vidconsole_ops
console_ops_2	drivers/video/console_rotate.c	/^struct vidconsole_ops console_ops_2 = {$/;"	v	typeref:struct:vidconsole_ops
console_ops_3	drivers/video/console_rotate.c	/^struct vidconsole_ops console_ops_3 = {$/;"	v	typeref:struct:vidconsole_ops
console_out	include/asm-generic/global_data.h	/^	struct membuff console_out;	\/* console output *\/$/;"	m	struct:global_data	typeref:struct:membuff
console_previousline	drivers/video/cfb_console.c	/^static void console_previousline(int n)$/;"	f	typeref:typename:void	file:
console_probe_1_3	drivers/video/console_rotate.c	/^static int console_probe_1_3(struct udevice *dev)$/;"	f	typeref:typename:int	file:
console_probe_2	drivers/video/console_rotate.c	/^static int console_probe_2(struct udevice *dev)$/;"	f	typeref:typename:int	file:
console_putc	common/console.c	/^static inline void console_putc(int file, const char c)$/;"	f	typeref:typename:void	file:
console_putc	common/console.c	/^static void console_putc(int file, const char c)$/;"	f	typeref:typename:void	file:
console_putc_xy_1	drivers/video/console_rotate.c	/^static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)$/;"	f	typeref:typename:int	file:
console_putc_xy_2	drivers/video/console_rotate.c	/^static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)$/;"	f	typeref:typename:int	file:
console_putc_xy_3	drivers/video/console_rotate.c	/^static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)$/;"	f	typeref:typename:int	file:
console_puts	common/console.c	/^static inline void console_puts(int file, const char *s)$/;"	f	typeref:typename:void	file:
console_puts	common/console.c	/^static void console_puts(int file, const char *s)$/;"	f	typeref:typename:void	file:
console_puts_noserial	common/console.c	/^static inline void console_puts_noserial(int file, const char *s)$/;"	f	typeref:typename:void	file:
console_puts_noserial	common/console.c	/^static void console_puts_noserial(int file, const char *s)$/;"	f	typeref:typename:void	file:
console_record_init	common/console.c	/^int console_record_init(void)$/;"	f	typeref:typename:int
console_record_reset	common/console.c	/^void console_record_reset(void)$/;"	f	typeref:typename:void
console_record_reset_enable	common/console.c	/^void console_record_reset_enable(void)$/;"	f	typeref:typename:void
console_row	arch/powerpc/cpu/mpc8xx/video.c	/^	console_row = 0,		\/* Cursor row *\/$/;"	v	typeref:typename:int	file:
console_row	drivers/video/cfb_console.c	/^static int console_row;		\/* cursor row *\/$/;"	v	typeref:typename:int	file:
console_rows	lib/efi_loader/efi_console.c	/^static int console_rows = 24;$/;"	v	typeref:typename:int	file:
console_scrollup	arch/powerpc/cpu/mpc8xx/video.c	/^static void console_scrollup (void)$/;"	f	typeref:typename:void	file:
console_scrollup	drivers/video/cfb_console.c	/^static void console_scrollup(void)$/;"	f	typeref:typename:void	file:
console_set_row_1	drivers/video/console_rotate.c	/^static int console_set_row_1(struct udevice *dev, uint row, int clr)$/;"	f	typeref:typename:int	file:
console_set_row_2	drivers/video/console_rotate.c	/^static int console_set_row_2(struct udevice *dev, uint row, int clr)$/;"	f	typeref:typename:int	file:
console_set_row_3	drivers/video/console_rotate.c	/^static int console_set_row_3(struct udevice *dev, uint row, int clr)$/;"	f	typeref:typename:int	file:
console_setfile	common/console.c	/^static int console_setfile(int file, struct stdio_dev * dev)$/;"	f	typeref:typename:int	file:
console_setrow0	common/lcd_console.c	/^static inline void console_setrow0(struct console_t *pcons, u32 row, int clr)$/;"	f	typeref:typename:void	file:
console_setrow180	common/lcd_console_rotation.c	/^static inline void console_setrow180(struct console_t *pcons, u32 row, int clr)$/;"	f	typeref:typename:void	file:
console_setrow270	common/lcd_console_rotation.c	/^static inline void console_setrow270(struct console_t *pcons, u32 row, int clr)$/;"	f	typeref:typename:void	file:
console_setrow90	common/lcd_console_rotation.c	/^static inline void console_setrow90(struct console_t *pcons, u32 row, int clr)$/;"	f	typeref:typename:void	file:
console_size_queried	lib/efi_loader/efi_console.c	/^static bool console_size_queried;$/;"	v	typeref:typename:bool	file:
console_speed	board/nokia/rx51/tag_omap.h	/^	u32 console_speed;$/;"	m	struct:omap_serial_console_config	typeref:typename:u32
console_swap_colors	drivers/video/cfb_console.c	/^static void console_swap_colors(void)$/;"	f	typeref:typename:void	file:
console_t	include/lcd_console.h	/^struct console_t {$/;"	s
console_truetype_backspace	drivers/video/console_truetype.c	/^static int console_truetype_backspace(struct udevice *dev)$/;"	f	typeref:typename:int	file:
console_truetype_entry_start	drivers/video/console_truetype.c	/^static int console_truetype_entry_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
console_truetype_erase	drivers/video/console_truetype.c	/^static int console_truetype_erase(struct udevice *dev, int xstart, int ystart,$/;"	f	typeref:typename:int	file:
console_truetype_find_font	drivers/video/console_truetype.c	/^static u8 *console_truetype_find_font(void)$/;"	f	typeref:typename:u8 *	file:
console_truetype_move_rows	drivers/video/console_truetype.c	/^static int console_truetype_move_rows(struct udevice *dev, uint rowdst,$/;"	f	typeref:typename:int	file:
console_truetype_ops	drivers/video/console_truetype.c	/^struct vidconsole_ops console_truetype_ops = {$/;"	v	typeref:struct:vidconsole_ops
console_truetype_probe	drivers/video/console_truetype.c	/^static int console_truetype_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
console_truetype_putc_xy	drivers/video/console_truetype.c	/^static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,$/;"	f	typeref:typename:int	file:
console_truetype_set_row	drivers/video/console_truetype.c	/^static int console_truetype_set_row(struct udevice *dev, uint row, int clr)$/;"	f	typeref:typename:int	file:
console_tstc	common/console.c	/^static inline int console_tstc(int file)$/;"	f	typeref:typename:int	file:
console_tstc	common/console.c	/^static int console_tstc(int file)$/;"	f	typeref:typename:int	file:
console_tt_priv	drivers/video/console_truetype.c	/^struct console_tt_priv {$/;"	s	file:
console_uart	board/nokia/rx51/tag_omap.h	/^	u8 console_uart;$/;"	m	struct:omap_serial_console_config	typeref:typename:u8
console_update_silent	common/console.c	/^static void console_update_silent(void)$/;"	f	typeref:typename:void	file:
consolidate	fs/ubifs/orphan.c	/^static int consolidate(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
const	include/u-boot/zlib.h	/^#    define const /;"	d
constant_test_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int constant_test_bit(int nr, const volatile void * addr)$/;"	f	typeref:typename:int
constk	drivers/video/mxcfb.h	/^	int constk[16];$/;"	m	struct:mxcfb_gamma	typeref:typename:int[16]
constraint	cmd/regulator.c	/^static int constraint(const char *name, int val, const char *val_name)$/;"	f	typeref:typename:int	file:
construct_img_encoded_hash_second	board/freescale/common/fsl_validate.c	/^static void construct_img_encoded_hash_second(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:void	file:
construct_pamu_addr_table	arch/powerpc/cpu/mpc8xxx/pamu_table.c	/^void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries)$/;"	f	typeref:typename:void
construct_pll_config	drivers/video/ssd2828.c	/^static u32 construct_pll_config(u32 desired_pll_freq_kbps,$/;"	f	typeref:typename:u32	file:
construct_urb	drivers/usb/musb-new/musb_uboot.c	/^static void construct_urb(struct urb *urb, struct usb_host_endpoint *hep,$/;"	f	typeref:typename:void	file:
consume_symbol	scripts/docproc.c	/^static void consume_symbol(const char *sym)$/;"	f	typeref:typename:void	file:
cont_syncpt_vsync	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cont_syncpt_vsync;		\/* _CMD_CONT_SYNCPT_VSYNC_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
container_id	include/fsl-mc/fsl_dprc.h	/^	int container_id;$/;"	m	struct:dprc_attributes	typeref:typename:int
container_of	include/linux/kernel.h	/^#define container_of(/;"	d
container_of	scripts/kconfig/list.h	/^#define container_of(/;"	d
content	board/gumstix/pepper/board.h	/^	unsigned char content;$/;"	m	struct:pepper_board_id	typeref:typename:unsigned char
content	board/overo/overo.c	/^	unsigned char content;$/;"	m	struct:__anona18b42d20108	typeref:typename:unsigned char	file:
content	board/ti/beagle/beagle.c	/^	unsigned char content;$/;"	m	struct:__anon1bf8eac80108	typeref:typename:unsigned char	file:
content	fs/ext4/ext4_journal.h	/^	char *content;		\/* revoke block itself *\/$/;"	m	struct:revoke_blk_list	typeref:typename:char *
content_head	tools/imagetool.h	/^	struct content_info *content_head;	\/* List of files to include *\/$/;"	m	struct:image_tool_params	typeref:struct:content_info *
content_info	tools/imagetool.h	/^struct content_info {$/;"	s
content_tail	tools/imagetool.h	/^	struct content_info *content_tail;$/;"	m	struct:image_tool_params	typeref:struct:content_info *
contents	arch/arm/imx-common/hab.c	/^	uint8_t  contents[MAX_RECORD_BYTES];\/* Record Data *\/$/;"	m	struct:record	typeref:typename:uint8_t[]	file:
contentsContextMenuEvent	scripts/kconfig/qconf.cc	/^void ConfigInfoView::contentsContextMenuEvent(QContextMenuEvent *e)$/;"	f	class:ConfigInfoView	typeref:typename:void
contentsMouseDoubleClickEvent	scripts/kconfig/qconf.cc	/^void ConfigList::contentsMouseDoubleClickEvent(QMouseEvent* e)$/;"	f	class:ConfigList	typeref:typename:void
contentsMouseMoveEvent	scripts/kconfig/qconf.cc	/^void ConfigList::contentsMouseMoveEvent(QMouseEvent* e)$/;"	f	class:ConfigList	typeref:typename:void
contentsMousePressEvent	scripts/kconfig/qconf.cc	/^void ConfigList::contentsMousePressEvent(QMouseEvent* e)$/;"	f	class:ConfigList	typeref:typename:void
contentsMouseReleaseEvent	scripts/kconfig/qconf.cc	/^void ConfigList::contentsMouseReleaseEvent(QMouseEvent* e)$/;"	f	class:ConfigList	typeref:typename:void
context	arch/x86/include/asm/ptrace.h	/^	} context;$/;"	m	struct:irq_regs	typeref:union:irq_regs::__anonee9aafbf010a
context	drivers/usb/musb-new/musb_core.h	/^	struct musb_context_registers context;$/;"	m	struct:musb	typeref:struct:musb_context_registers
context	examples/standalone/sched.c	/^	uchar context[CTX_SIZE];$/;"	m	struct:lthread	typeref:typename:uchar[]	file:
context	include/linux/usb/gadget.h	/^	void			*context;$/;"	m	struct:usb_request	typeref:typename:void *
contextMenuEvent	scripts/kconfig/qconf.cc	/^void ConfigList::contextMenuEvent(QContextMenuEvent *e)$/;"	f	class:ConfigList	typeref:typename:void
contextSaveSpace	include/MCD_dma.h	/^	u32 contextSaveSpace;	\/* context save space start *\/$/;"	m	struct:__anon0c34f9b30108	typeref:typename:u32
context_reg	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 context_reg;		\/* MBAR_ETH + 0x104 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
context_save_struct	arch/arm/include/asm/proc-armv/processor.h	/^struct context_save_struct {$/;"	s
continuation	arch/x86/include/asm/fsp/fsp_api.h	/^	fsp_continuation_f	continuation;$/;"	m	struct:fsp_init_params	typeref:typename:fsp_continuation_f
contr_stat	include/scsi.h	/^	unsigned long		contr_stat;				\/* Controller Status	*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned long
control	arch/arm/imx-common/timer.c	/^	unsigned int control;$/;"	m	struct:mxc_gpt	typeref:typename:unsigned int	file:
control	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t control;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
control	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t control;$/;"	m	struct:timer	typeref:typename:uint32_t
control	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 control;	\/* Control register for AHB                  *\/$/;"	m	struct:emc_regs::emc_ahb_t	typeref:typename:u32
control	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 control;		\/* Controls dyn memory operation             *\/$/;"	m	struct:emc_regs	typeref:typename:u32
control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 control;				\/* 0x40 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 control;				\/* 0x40 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
control	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 control;$/;"	m	struct:emi_bank_regs	typeref:typename:u32
control	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u32 control;$/;"	m	struct:gpt_regs	typeref:typename:u32
control	arch/arm/include/asm/arch-tegra/pwm.h	/^	uint control;		\/* Control register *\/$/;"	m	struct:pwm_ctlr	typeref:typename:uint
control	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	struct i2c_control control;	\/* 50 ~ 68 *\/$/;"	m	struct:i2c_ctlr	typeref:struct:i2c_control
control	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	struct i2c_control control;	\/* 60 ~ 78 *\/$/;"	m	struct:dvc_ctlr	typeref:struct:i2c_control
control	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	control;$/;"	m	struct:rx_flow_regs	typeref:typename:u32
control	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 control;$/;"	m	struct:mdio_regs	typeref:typename:u32
control	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg	control;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
control	arch/arm/mach-zynq/timer.c	/^	u32 control; \/* Timer Control Register *\/$/;"	m	struct:scu_timer	typeref:typename:u32	file:
control	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 control;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
control	arch/blackfin/include/asm/serial4.h	/^	u32 control;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
control	arch/microblaze/include/asm/microblaze_timer.h	/^	int control; \/* control\/statuc register TCSR *\/$/;"	m	struct:microblaze_timer_t	typeref:typename:int
control	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	control;$/;"	m	struct:ohci_regs	typeref:typename:__u32
control	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	control;$/;"	m	struct:ohci_regs	typeref:typename:__u32
control	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 control;$/;"	m	struct:ohci_regs	typeref:typename:__u32
control	board/cm5200/cm5200.h	/^	ulong control;$/;"	m	struct:__anonb595836f0408	typeref:typename:ulong
control	board/esd/pmc405de/pmc405de.c	/^	u8 control;$/;"	m	struct:pmc405de_cpld	typeref:typename:u8	file:
control	board/gdsys/p1022/controlcenterd.c	/^	u32 control;		\/* 0x0020 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u32	file:
control	disk/part_amiga.h	/^    u32 control;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
control	drivers/dma/lpc32xx_dma.c	/^	u32 control;$/;"	m	struct:dmac_chan_reg	typeref:typename:u32	file:
control	drivers/i2c/i2c-cdns.c	/^	u32 control;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
control	drivers/i2c/mvtwsi.c	/^	u32 control;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
control	drivers/i2c/tegra_i2c.c	/^	struct i2c_control	*control;$/;"	m	struct:i2c_bus	typeref:struct:i2c_control *	file:
control	drivers/i2c/zynq_i2c.c	/^	u32 control;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
control	drivers/mtd/nand/omap_gpmc.c	/^	struct bch_control *control;$/;"	m	struct:omap_nand_info	typeref:struct:bch_control *	file:
control	drivers/net/altera_tse.h	/^	u32 control;		\/* Read\/Write *\/$/;"	m	struct:msgdma_csr	typeref:typename:u32
control	drivers/net/altera_tse.h	/^	u32 control;		\/* characteristics of the transfer *\/$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
control	drivers/net/altera_tse.h	/^	u32 control;$/;"	m	struct:alt_sgdma_registers	typeref:typename:u32
control	drivers/net/cpsw.c	/^	u32	control;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
control	drivers/net/cpsw.c	/^	u32	control;$/;"	m	struct:cpsw_regs	typeref:typename:u32	file:
control	drivers/net/eepro100.c	/^	volatile u16 control;$/;"	m	struct:RxFD	typeref:typename:volatile u16	file:
control	drivers/net/greth.h	/^	volatile unsigned int control;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
control	drivers/net/lpc32xx_eth.c	/^	u32 control;		\/* Descriptor command status *\/$/;"	m	struct:lpc32xx_eth_rxdesc	typeref:typename:u32	file:
control	drivers/net/lpc32xx_eth.c	/^	u32 control;		\/* Descriptor control *\/$/;"	m	struct:lpc32xx_eth_txdesc	typeref:typename:u32	file:
control	drivers/net/xilinx_axi_emac.c	/^	u32 control; \/* DMACR *\/$/;"	m	struct:axidma_reg	typeref:typename:u32	file:
control	drivers/serial/altera_jtag_uart.c	/^	u32	control;		\/* Control register *\/$/;"	m	struct:altera_jtaguart_regs	typeref:typename:u32	file:
control	drivers/serial/altera_uart.c	/^	u32	control;	\/* Control reg *\/$/;"	m	struct:altera_uart_regs	typeref:typename:u32	file:
control	drivers/serial/serial_meson.c	/^	u32 control;$/;"	m	struct:meson_uart	typeref:typename:u32	file:
control	drivers/serial/serial_xuartlite.c	/^	unsigned int control;$/;"	m	struct:uartlite	typeref:typename:unsigned int	file:
control	drivers/serial/serial_zynq.c	/^	u32 control; \/* 0x0 - Control Register [8:0] *\/$/;"	m	struct:uart_zynq	typeref:typename:u32	file:
control	drivers/spi/altera_spi.c	/^	u32	control;$/;"	m	struct:altera_spi_regs	typeref:typename:u32	file:
control	drivers/spi/bfin_spi6xx.c	/^	u32 control, clock;$/;"	m	struct:bfin_spi_slave	typeref:typename:u32	file:
control	drivers/spi/ich.h	/^	int control;$/;"	m	struct:ich_spi_priv	typeref:typename:int
control	drivers/timer/altera_timer.c	/^	u32	control;	\/* Timer control reg *\/$/;"	m	struct:altera_timer_regs	typeref:typename:u32	file:
control	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 control;$/;"	m	struct:ohci_regs	typeref:typename:__u32
control	drivers/usb/host/ohci.h	/^	__u32	control;$/;"	m	struct:ohci_regs	typeref:typename:__u32
control	drivers/usb/host/xhci.h	/^	volatile __le32 control;$/;"	m	struct:xhci_link_trb	typeref:typename:volatile __le32
control	drivers/usb/musb-new/musb_core.h	/^	struct list_head	control;	\/* of musb_qh *\/$/;"	m	struct:musb	typeref:struct:list_head
control	drivers/usb/musb-new/musb_dsps.c	/^	u16	control;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
control	drivers/usb/musb/am35x.h	/^	u32	control;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
control	include/atmel_hlcdc.h	/^	u32	control;$/;"	m	struct:lcd_dma_desc	typeref:typename:u32
control	include/cpsw.h	/^	void	(*control)(int enabled);$/;"	m	struct:cpsw_platform_data	typeref:typename:void (*)(int enabled)
control	include/fis.h	/^	u8 control;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
control	include/fis.h	/^	u8 control;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
control	include/gdsys_fpga.h	/^	u16 control;		\/* 0x0010 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
control	include/gdsys_fpga.h	/^	u16 control;$/;"	m	struct:ihs_mdio	typeref:typename:u16
control	include/gdsys_fpga.h	/^	u16 control;$/;"	m	struct:ihs_osd	typeref:typename:u16
control	include/grlib/greth.h	/^	volatile unsigned int control;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
control	include/qfw.h	/^	__be32 control;$/;"	m	struct:fw_cfg_dma_access	typeref:typename:__be32
control	include/tegra-kbc.h	/^	u32 control;$/;"	m	struct:kbc_tegra	typeref:typename:u32
control	include/usb.h	/^	int (*control)(struct udevice *bus, struct usb_device *udev,$/;"	m	struct:dm_usb_ops	typeref:typename:int (*)(struct udevice * bus,struct usb_device * udev,unsigned long pipe,void * buffer,int length,struct devrequest * setup)
control	include/usb/ehci-ci.h	/^	u32	control;	\/* 0x500 - Control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
control0	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned control0;$/;"	m	struct:mem_timings	typeref:typename:unsigned
control1	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned control1;$/;"	m	struct:mem_timings	typeref:typename:unsigned
control2	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned control2;$/;"	m	struct:mem_timings	typeref:typename:unsigned
control_c2c	arch/arm/include/asm/omap_common.h	/^	u32 control_c2c;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_camera_rx	arch/arm/include/asm/omap_common.h	/^	u32 control_camera_rx;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ckobuffer	arch/arm/include/asm/omap_common.h	/^	u32 control_ckobuffer;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_control_io1	arch/arm/include/asm/omap_common.h	/^	u32 control_core_control_io1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_control_io2	arch/arm/include/asm/omap_common.h	/^	u32 control_core_control_io2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_control_spare_r	arch/arm/include/asm/omap_common.h	/^	u32 control_core_control_spare_r;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_control_spare_r_c0	arch/arm/include/asm/omap_common.h	/^	u32 control_core_control_spare_r_c0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_control_spare_rw	arch/arm/include/asm/omap_common.h	/^	u32 control_core_control_spare_rw;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mac_id_0_hi	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mac_id_0_hi;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mac_id_0_lo	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mac_id_0_lo;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mac_id_1_hi	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mac_id_1_hi;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mac_id_1_lo	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mac_id_1_lo;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mmr_lock1	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mmr_lock1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mmr_lock2	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mmr_lock2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mmr_lock3	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mmr_lock3;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mmr_lock4	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mmr_lock4;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_core_mmr_lock5	arch/arm/include/asm/omap_common.h	/^	u32 control_core_mmr_lock5;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddr3ch1_0	arch/arm/include/asm/omap_common.h	/^	u32 control_ddr3ch1_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddr3ch2_0	arch/arm/include/asm/omap_common.h	/^	u32 control_ddr3ch2_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddr_control_ext_0	arch/arm/include/asm/omap_common.h	/^	u32 control_ddr_control_ext_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrch1_0	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrch1_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrch1_1	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrch1_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrch2_0	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrch2_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrch2_1	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrch2_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrio_0	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrio_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrio_1	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrio_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ddrio_2	arch/arm/include/asm/omap_common.h	/^	u32 control_ddrio_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_dsiphy	arch/arm/include/asm/omap_common.h	/^	u32 control_dsiphy;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_1	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_10	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_10;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_11	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_11;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_12	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_12;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_13	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_13;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_2	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_3	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_3;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_4	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_4;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_5	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_5;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_6	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_6;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_7	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_7;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_8	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_8;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_efuse_9	arch/arm/include/asm/omap_common.h	/^	u32 control_efuse_9;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_emif1_sdram_config_ext	arch/arm/include/asm/omap_common.h	/^	u32 control_emif1_sdram_config_ext;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_emif2_sdram_config_ext	arch/arm/include/asm/omap_common.h	/^	u32 control_emif2_sdram_config_ext;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ep	drivers/usb/musb-new/musb_core.h	/^#define control_ep	/;"	d
control_flags	drivers/block/sata_mv.c	/^	u32 control_flags;	\/* DW2 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
control_hdmi_1	arch/arm/include/asm/omap_common.h	/^	u32 control_hdmi_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_hdmi_tx_phy	arch/arm/include/asm/omap_common.h	/^	u32 control_hdmi_tx_phy;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_hsi	arch/arm/include/asm/omap_common.h	/^	u32 control_hsi;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_hyst_1	arch/arm/include/asm/omap_common.h	/^	u32 control_hyst_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_i2c_0	arch/arm/include/asm/omap_common.h	/^	u32 control_i2c_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_i2c_2	arch/arm/include/asm/omap_common.h	/^	u32 control_i2c_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_id_code	arch/arm/include/asm/omap_common.h	/^	u32 control_id_code;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_intf	drivers/usb/gadget/ether.c	/^control_intf = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
control_io_rdata	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int control_io_rdata;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
control_ldosram_core_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_ldosram_core_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ldosram_iva_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_ldosram_iva_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_ldosram_mpu_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_ldosram_mpu_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2ch1_0	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2ch1_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2ch1_1	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2ch1_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io1_0	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io1_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io1_1	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io1_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io1_2	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io1_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io1_3	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io1_3;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io2_0	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io2_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io2_1	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io2_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io2_2	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io2_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_lpddr2io2_3	arch/arm/include/asm/omap_common.h	/^	u32 control_lpddr2io2_3;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_mcbsplp	arch/arm/include/asm/omap_common.h	/^	u32 control_mcbsplp;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_paconf_global	arch/arm/include/asm/omap_common.h	/^	u32 control_paconf_global;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_paconf_mode	arch/arm/include/asm/omap_common.h	/^	u32 control_paconf_mode;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_pad	drivers/net/altera_tse.h	/^	u32 control_pad[3];$/;"	m	struct:alt_sgdma_registers	typeref:typename:u32[3]
control_padconf_core_base	arch/arm/include/asm/omap_common.h	/^	u32 control_padconf_core_base;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_padconf_mode	arch/arm/include/asm/omap_common.h	/^	u32 control_padconf_mode;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_padconf_wkup_base	arch/arm/include/asm/omap_common.h	/^	u32 control_padconf_wkup_base;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_pbias	arch/arm/include/asm/omap_common.h	/^	u32 control_pbias;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_pbiaslite	arch/arm/include/asm/omap_common.h	/^	u32 control_pbiaslite;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_phy_power_sata	arch/arm/include/asm/omap_common.h	/^	u32 control_phy_power_sata;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_phy_power_usb	arch/arm/include/asm/omap_common.h	/^	u32 control_phy_power_usb;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_port_emif1_lpddr2_nvm_config	arch/arm/include/asm/omap_common.h	/^	u32 control_port_emif1_lpddr2_nvm_config;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_port_emif1_sdram_config	arch/arm/include/asm/omap_common.h	/^	u32 control_port_emif1_sdram_config;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_port_emif2_sdram_config	arch/arm/include/asm/omap_common.h	/^	u32 control_port_emif2_sdram_config;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_prog_io	arch/arm/include/asm/arch-omap3/omap.h	/^struct control_prog_io {$/;"	s
control_smart1io_padconf_0	arch/arm/include/asm/omap_common.h	/^	u32 control_smart1io_padconf_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart1io_padconf_1	arch/arm/include/asm/omap_common.h	/^	u32 control_smart1io_padconf_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart1io_padconf_2	arch/arm/include/asm/omap_common.h	/^	u32 control_smart1io_padconf_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart1nopmio_padconf_0	arch/arm/include/asm/omap_common.h	/^	u32 control_smart1nopmio_padconf_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart1nopmio_padconf_1	arch/arm/include/asm/omap_common.h	/^	u32 control_smart1nopmio_padconf_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart2io_padconf_0	arch/arm/include/asm/omap_common.h	/^	u32 control_smart2io_padconf_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart2io_padconf_1	arch/arm/include/asm/omap_common.h	/^	u32 control_smart2io_padconf_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart2io_padconf_2	arch/arm/include/asm/omap_common.h	/^	u32 control_smart2io_padconf_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart3io_padconf_0	arch/arm/include/asm/omap_common.h	/^	u32 control_smart3io_padconf_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_smart3io_padconf_1	arch/arm/include/asm/omap_common.h	/^	u32 control_smart3io_padconf_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_srcomp_code_latch	arch/arm/include/asm/omap_common.h	/^	u32 control_srcomp_code_latch;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_srcomp_east_side	arch/arm/include/asm/omap_common.h	/^	u32 control_srcomp_east_side;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_srcomp_east_side_wkup	arch/arm/include/asm/omap_common.h	/^	u32 control_srcomp_east_side_wkup;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_srcomp_north_side	arch/arm/include/asm/omap_common.h	/^	u32 control_srcomp_north_side;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_srcomp_south_side	arch/arm/include/asm/omap_common.h	/^	u32 control_srcomp_south_side;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_srcomp_west_side	arch/arm/include/asm/omap_common.h	/^	u32 control_srcomp_west_side;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_status	arch/arm/include/asm/omap_common.h	/^	u32 control_status;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_std_fuse_die_id_0	arch/arm/include/asm/omap_common.h	/^	u32 control_std_fuse_die_id_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_std_fuse_die_id_1	arch/arm/include/asm/omap_common.h	/^	u32 control_std_fuse_die_id_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_std_fuse_die_id_2	arch/arm/include/asm/omap_common.h	/^	u32 control_std_fuse_die_id_2;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_std_fuse_die_id_3	arch/arm/include/asm/omap_common.h	/^	u32 control_std_fuse_die_id_3;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_std_fuse_opp_bgap	arch/arm/include/asm/omap_common.h	/^	u32 control_std_fuse_opp_bgap;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_uniportm	arch/arm/include/asm/omap_common.h	/^	u32 control_uniportm;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_usb2phycore	arch/arm/include/asm/omap_common.h	/^	u32 control_usb2phycore;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_usbb_hsic_control	arch/arm/include/asm/omap_common.h	/^	u32 control_usbb_hsic_control;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_usbotghs_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_usbotghs_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_control_spare_r	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_control_spare_r;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_control_spare_r_c0	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_control_spare_r_c0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_control_spare_rw	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_control_spare_rw;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_ldovbb_eve_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_ldovbb_eve_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_ldovbb_gpu_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_ldovbb_gpu_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_ldovbb_iva_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_ldovbb_iva_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_ldovbb_mm_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_ldovbb_mm_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_wkup_ldovbb_mpu_voltage_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 control_wkup_ldovbb_mpu_voltage_ctrl;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
control_xtal_oscillator	arch/arm/include/asm/omap_common.h	/^	u32 control_xtal_oscillator;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
controlclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int controlclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
controller	drivers/mtd/nand/fsl_elbc_nand.c	/^	struct nand_hw_control controller;$/;"	m	struct:fsl_elbc_ctrl	typeref:struct:nand_hw_control	file:
controller	drivers/mtd/nand/fsl_ifc_nand.c	/^	struct nand_hw_control controller;$/;"	m	struct:fsl_ifc_ctrl	typeref:struct:nand_hw_control	file:
controller	drivers/mtd/nand/pxa3xx_nand.c	/^	struct nand_hw_control	controller;$/;"	m	struct:pxa3xx_nand_info	typeref:struct:nand_hw_control	file:
controller	drivers/mtd/nand/sunxi_nand.c	/^	struct nand_hw_control controller;$/;"	m	struct:sunxi_nfc	typeref:struct:nand_hw_control	file:
controller	drivers/usb/gadget/at91_udc.c	/^static struct at91_udc *controller;$/;"	v	typeref:struct:at91_udc *	file:
controller	drivers/usb/gadget/atmel_usba_udc.c	/^static struct usba_udc controller = {$/;"	v	typeref:struct:usba_udc	file:
controller	drivers/usb/gadget/ci_udc.c	/^static struct ci_drv controller = {$/;"	v	typeref:struct:ci_drv	file:
controller	drivers/usb/gadget/fotg210.c	/^static struct fotg210_chip controller = {$/;"	v	typeref:struct:fotg210_chip	file:
controller	drivers/usb/musb-new/musb_core.h	/^	struct device		*controller;$/;"	m	struct:musb	typeref:struct:device *
controller	include/linux/mtd/nand.h	/^	struct nand_hw_control *controller;$/;"	m	struct:nand_chip	typeref:struct:nand_hw_control *
controller	include/usb.h	/^	void *controller;		\/* hardware controller private data *\/$/;"	m	struct:usb_device	typeref:typename:void *
controller_data	drivers/video/da8xx-fb.h	/^	void *controller_data;$/;"	m	struct:da8xx_lcdc_platform_data	typeref:typename:void *
controller_dev	include/usb.h	/^	struct udevice *controller_dev;	\/* Pointer to associated controller *\/$/;"	m	struct:usb_device	typeref:struct:udevice *
controller_handle	include/efi.h	/^	efi_handle_t controller_handle;$/;"	m	struct:efi_open_protocol_info_entry	typeref:typename:efi_handle_t
controller_name	arch/x86/include/asm/sfi.h	/^	char	controller_name[SFI_NAME_LEN];$/;"	m	struct:sfi_gpio_table_entry	typeref:typename:char[]
controller_product	disk/part_amiga.h	/^    char controller_product[16];$/;"	m	struct:rigid_disk_block	typeref:typename:char[16]
controller_revision	disk/part_amiga.h	/^    char controller_revision[4];$/;"	m	struct:rigid_disk_block	typeref:typename:char[4]
controller_vendor	disk/part_amiga.h	/^    char controller_vendor[8];$/;"	m	struct:rigid_disk_block	typeref:typename:char[8]
controlling_tty	common/cli_hush.c	/^void controlling_tty(int check_pgrp)$/;"	f	typeref:typename:void
conv_ascii	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void conv_ascii(unsigned char *dst, unsigned char *src, int len)$/;"	f	typeref:typename:void	file:
conv_of_platdata	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int conv_of_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
conv_rate	drivers/hwmon/adm1021.c	/^		uint conv_rate:3;	\/* conversion rate *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:3	file:
conversion_mode	drivers/adc/sandbox.c	/^	int conversion_mode;$/;"	m	struct:sandbox_adc_priv	typeref:typename:int	file:
conversion_status	drivers/adc/sandbox.c	/^	int conversion_status;$/;"	m	struct:sandbox_adc_priv	typeref:typename:int	file:
convert_bcd_hundredths_to_cycle_time_ps	drivers/ddr/fsl/ddr1_dimm_params.c	/^convert_bcd_hundredths_to_cycle_time_ps(unsigned int spd_val)$/;"	f	typeref:typename:unsigned int	file:
convert_bcd_hundredths_to_cycle_time_ps	drivers/ddr/fsl/ddr2_dimm_params.c	/^convert_bcd_hundredths_to_cycle_time_ps(unsigned int spd_val)$/;"	f	typeref:typename:unsigned int	file:
convert_bcd_tenths_to_cycle_time_ps	drivers/ddr/fsl/ddr1_dimm_params.c	/^convert_bcd_tenths_to_cycle_time_ps(unsigned int spd_val)$/;"	f	typeref:typename:unsigned int	file:
convert_bcd_tenths_to_cycle_time_ps	drivers/ddr/fsl/ddr2_dimm_params.c	/^convert_bcd_tenths_to_cycle_time_ps(unsigned int spd_val)$/;"	f	typeref:typename:unsigned int	file:
convert_char	board/keymile/common/ivm.c	/^static char convert_char(char c)$/;"	f	typeref:typename:char	file:
convert_dev_id	drivers/ddr/marvell/a38x/ddr3_debug.c	/^static char *convert_dev_id(u32 dev_id)$/;"	f	typeref:typename:char *	file:
convert_flash_bank	board/freescale/ls1021atwr/ls1021atwr.c	/^static void convert_flash_bank(char bank)$/;"	f	typeref:typename:void	file:
convert_freq	drivers/ddr/marvell/a38x/ddr3_debug.c	/^static char *convert_freq(enum hws_ddr_freq freq)$/;"	f	typeref:typename:char *	file:
convert_mem_size	drivers/ddr/marvell/a38x/ddr3_debug.c	/^static char *convert_mem_size(u32 dev_id)$/;"	f	typeref:typename:char *	file:
convert_pointer	include/efi_api.h	/^	efi_status_t (*convert_pointer)(unsigned long dbg, void **address);$/;"	m	struct:efi_runtime_services	typeref:typename:efi_status_t (*)(unsigned long dbg,void ** address)
convert_serdes_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^static void convert_serdes_mux(int type, int need_reset)$/;"	f	typeref:typename:void	file:
convert_to_fb_videomode	drivers/video/exynos/exynos_mipi_dsi_common.c	/^static void convert_to_fb_videomode(struct fb_videomode *mode1,$/;"	f	typeref:typename:void	file:
convert_vars	scripts/kconfig/streamline_config.pl	/^sub convert_vars {$/;"	s
cookie	include/altera.h	/^	int			cookie;$/;"	m	struct:__anond5297d870108	typeref:typename:int
cookie	include/api_public.h	/^	void	*cookie;$/;"	m	struct:device_info	typeref:typename:void *
cookie	include/lattice.h	/^	int		cookie;	\/* implementation specific cookie *\/$/;"	m	struct:__anon773a64540408	typeref:typename:int
cookie	include/xilinx.h	/^	int cookie;		\/* implementation specific cookie *\/$/;"	m	struct:__anon15c234ca0308	typeref:typename:int
coord	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 coord;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
coord	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 coord;$/;"	m	struct:de_vi::__anon5efd7b530208	typeref:typename:u32
coord	arch/arm/include/asm/arch/display2.h	/^		u32 coord;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
coord	arch/arm/include/asm/arch/display2.h	/^		u32 coord;$/;"	m	struct:de_vi::__anon279c75ef0208	typeref:typename:u32
cop_csr	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 cop_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cop_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cop_csr;		\/* offset 0x0c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cop_csr	arch/arm/include/asm/arch-tegra20/flow.h	/^	u32	cop_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cop_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cop_csr;		\/* offset 0x0c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cop_csr	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 cop_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
coprocessor_post_test	post/board/pdm360ng/coproc_com.c	/^int coprocessor_post_test(int flags)$/;"	f	typeref:typename:int
copy	include/linux/rbtree_augmented.h	/^	void (*copy)(struct rb_node *old, struct rb_node *new);$/;"	m	struct:rb_augment_callbacks	typeref:typename:void (*)(struct rb_node * old,struct rb_node * new)
copy_abort_end	arch/arm/lib/memcpy.S	/^	.macro	copy_abort_end$/;"	m
copy_abort_preamble	arch/arm/lib/memcpy.S	/^	.macro	copy_abort_preamble$/;"	m
copy_args	common/bootm_os.c	/^static void copy_args(char *dest, int argc, char * const argv[], char delim)$/;"	f	typeref:typename:void	file:
copy_block	lib/zlib/trees.c	/^local void copy_block(s, buf, len, header)$/;"	f
copy_code_end	board/nokia/rx51/lowlevel_init.S	/^copy_code_end:$/;"	l
copy_code_loop	board/nokia/rx51/lowlevel_init.S	/^copy_code_loop:$/;"	l
copy_code_start	board/nokia/rx51/lowlevel_init.S	/^copy_code_start:$/;"	l
copy_config	drivers/usb/gadget/ep0.c	/^void copy_config (struct urb *urb, void *data, int max_length,$/;"	f	typeref:typename:void
copy_exception_trampoline	arch/nios2/cpu/cpu.c	/^static void copy_exception_trampoline(void)$/;"	f	typeref:typename:void	file:
copy_fdt	cmd/bootefi.c	/^static void *copy_fdt(void *fdt)$/;"	f	typeref:typename:void *	file:
copy_file	tools/mkimage.c	/^copy_file (int ifd, const char *datafile, int pad)$/;"	f	typeref:typename:void	file:
copy_filename	net/net.c	/^void copy_filename(char *dst, const char *src, int size)$/;"	f	typeref:typename:void
copy_flag	drivers/mtd/ubi/ubi-media.h	/^	__u8    copy_flag;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8
copy_flag	drivers/mtd/ubi/ubi.h	/^	unsigned int copy_flag:1;$/;"	m	struct:ubi_ainf_peb	typeref:typename:unsigned int:1
copy_from_eeprom	examples/standalone/smc91111_eeprom.c	/^void copy_from_eeprom (struct eth_device *dev)$/;"	f	typeref:typename:void
copy_from_eeprom	examples/standalone/smc911x_eeprom.c	/^static void copy_from_eeprom(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
copy_from_user	lib/linux_compat.c	/^unsigned long copy_from_user(void *dest, const void *src,$/;"	f	typeref:typename:unsigned long
copy_input_until_stop	lib/bzip2/bzlib.c	/^Bool copy_input_until_stop ( EState* s )$/;"	f	typeref:typename:Bool	file:
copy_kernel_end	board/nokia/rx51/lowlevel_init.S	/^copy_kernel_end:$/;"	l
copy_kernel_loop	board/nokia/rx51/lowlevel_init.S	/^copy_kernel_loop:$/;"	l
copy_kernel_start	board/nokia/rx51/lowlevel_init.S	/^copy_kernel_start:$/;"	l
copy_loop	arch/arm/lib/relocate.S	/^copy_loop:$/;"	l
copy_loop	arch/arm/lib/relocate_64.S	/^copy_loop:$/;"	l
copy_loop	arch/nds32/cpu/n1213/start.S	/^copy_loop:$/;"	l
copy_old_env	board/mpl/common/common_util.c	/^void copy_old_env(ulong size)$/;"	f	typeref:typename:void
copy_output_until_stop	lib/bzip2/bzlib.c	/^Bool copy_output_until_stop ( EState* s )$/;"	f	typeref:typename:Bool	file:
copy_pirq_routing_table	arch/x86/lib/pirq_routing.c	/^u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt)$/;"	f	typeref:typename:u32
copy_plugin_code	tools/imximage.c	/^static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)$/;"	f	typeref:typename:void	file:
copy_segments	arch/arm/include/asm/processor.h	/^#define copy_segments(/;"	d
copy_segments	arch/powerpc/include/asm/processor.h	/^#define copy_segments(/;"	d
copy_spacing	scripts/checkpatch.pl	/^sub copy_spacing {$/;"	s
copy_spd	arch/x86/cpu/ivybridge/sdram.c	/^static int copy_spd(struct udevice *dev, struct pei_data *peid)$/;"	f	typeref:typename:int	file:
copy_to_reg	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void copy_to_reg(u32 *dest, const u32 *src, u32 n)$/;"	f	typeref:typename:void	file:
copy_to_reg	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void copy_to_reg(u32 *dest, const u32 *src, u32 n)$/;"	f	typeref:typename:void	file:
copy_to_unicode	drivers/usb/emul/usb-emul-uclass.c	/^static int copy_to_unicode(char *buff, int length, const char *str)$/;"	f	typeref:typename:int	file:
copy_uboot_end	board/nokia/rx51/lowlevel_init.S	/^copy_uboot_end:$/;"	l
copy_uboot_loop_left	board/nokia/rx51/lowlevel_init.S	/^copy_uboot_loop_left:$/;"	l
copy_uboot_loop_right	board/nokia/rx51/lowlevel_init.S	/^copy_uboot_loop_right:$/;"	l
copy_uboot_start	board/nokia/rx51/lowlevel_init.S	/^copy_uboot_start:$/;"	l
copy_uboot_to_ram	arch/arc/lib/relocate.c	/^int copy_uboot_to_ram(void)$/;"	f	typeref:typename:int
copy_uboot_to_ram	arch/arm/mach-exynos/spl_boot.c	/^void copy_uboot_to_ram(void)$/;"	f	typeref:typename:void
copy_uboot_to_ram	arch/x86/lib/relocate.c	/^int copy_uboot_to_ram(void)$/;"	f	typeref:typename:int
copy_vec	board/armltd/integrator/lowlevel_init.S	/^copy_vec:$/;"	l
copy_znode	fs/ubifs/tnc.c	/^static struct ubifs_znode *copy_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
copyex	arch/arm/cpu/arm920t/start.S	/^copyex:$/;"	l
copyr	disk/part_iso.h	/^	char					copyr[37];		\/* copyright string *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[37]
copyr	disk/part_iso.h	/^	char					copyr[37];		\/* copyright string *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[37]
core	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *core;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
core	arch/arm/include/asm/omap_common.h	/^	struct volts core;$/;"	m	struct:vcores_data	typeref:struct:volts
core	arch/arm/include/asm/setup.h	/^		struct tag_core		core;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_core
core	arch/avr32/include/asm/setup.h	/^		struct tag_core core;$/;"	m	union:tag::__anon5c2aea39010a	typeref:struct:tag_core
core	arch/nds32/include/asm/setup.h	/^		struct tag_core		core;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_core
core0_sft_rst	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 core0_sft_rst;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
core0sftrstsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 core0sftrstsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
core1_sft_rst	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 core1_sft_rst;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
core_36x_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^core_36x_dpll_param:$/;"	l
core_3v3_compensation	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 core_3v3_compensation;	\/* 0xEC *\/$/;"	m	struct:misc_regs	typeref:typename:u32
core_card	board/imgtec/malta/malta.c	/^enum core_card {$/;"	g	file:
core_clk	arch/powerpc/include/asm/global_data.h	/^	u32 core_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
core_clk_data	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct core_clk_data {$/;"	s
core_clk_data	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct core_clk_data {$/;"	s
core_count	include/smbios.h	/^	u8 core_count;$/;"	m	struct:smbios_type4	typeref:typename:u8
core_count2	include/smbios.h	/^	u16 core_count2;$/;"	m	struct:smbios_type4	typeref:typename:u16
core_crit	arch/arm/dts/omap5-core-thermal.dtsi	/^		core_crit: core_crit {$/;"	l	label:core_thermal
core_csb_ratio	arch/powerpc/cpu/mpc83xx/speed.c	/^	mult_t core_csb_ratio;$/;"	m	struct:__anon6ec4fb040208	typeref:typename:mult_t	file:
core_dpll_out_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	core_dpll_out_dclk_div: core_dpll_out_dclk_div {$/;"	l
core_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^core_dpll_param:$/;"	l
core_dpll_params_1600mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params core_dpll_params_1600mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_2128mhz_ddr266	arch/arm/cpu/armv7/omap5/hw_data.c	/^			core_dpll_params_2128mhz_ddr266[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_2128mhz_ddr266_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^			core_dpll_params_2128mhz_ddr266_es2[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_2128mhz_ddr532	arch/arm/cpu/armv7/omap5/hw_data.c	/^			core_dpll_params_2128mhz_ddr532[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_2128mhz_ddr532_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^			core_dpll_params_2128mhz_ddr532_es2[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_2128mhz_dra7xx	arch/arm/cpu/armv7/omap5/hw_data.c	/^		core_dpll_params_2128mhz_dra7xx[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_es1_1524mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params core_dpll_params_es1_1524mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_dpll_params_es2_1600mhz_ddr200mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^		core_dpll_params_es2_1600mhz_ddr200mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
core_enabled	include/smbios.h	/^	u8 core_enabled;$/;"	m	struct:smbios_type4	typeref:typename:u8
core_enabled2	include/smbios.h	/^	u16 core_enabled2;$/;"	m	struct:smbios_type4	typeref:typename:u16
core_init	arch/arm/include/asm/arch-mx35/lowlevel_macro.S	/^.macro core_init$/;"	m
core_intmsk	drivers/usb/musb/am35x.h	/^	u32	core_intmsk;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_intmskclr	drivers/usb/musb/am35x.h	/^	u32	core_intmskclr;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_intmskset	drivers/usb/musb/am35x.h	/^	u32	core_intmskset;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_intsrc	drivers/usb/musb/am35x.h	/^	u32	core_intsrc;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_intsrcclr	drivers/usb/musb/am35x.h	/^	u32	core_intsrcclr;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_intsrcmsked	drivers/usb/musb/am35x.h	/^	u32	core_intsrcmsked;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_intsrcset	drivers/usb/musb/am35x.h	/^	u32	core_intsrcset;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
core_ir	arch/x86/include/asm/arch-quark/quark.h	/^	u16	core_ir;$/;"	m	struct:quark_rcba	typeref:typename:u16
core_list_t	board/amcc/bamboo/bamboo.h	/^} core_list_t;$/;"	t	typeref:enum:config_list
core_opmode	drivers/net/calxedaxgmac.c	/^	u32 core_opmode;	\/* 0x400 *\/$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
core_padconf_array	board/amazon/kc1/kc1.h	/^const struct pad_conf_entry core_padconf_array[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential	board/compulab/cm_t54/mux.c	/^const struct pad_conf_entry core_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential	board/gumstix/duovero/duovero_mux_data.h	/^const struct pad_conf_entry core_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential	board/ti/omap5_uevm/mux_data.h	/^const struct pad_conf_entry core_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential	board/ti/panda/panda_mux_data.h	/^const struct pad_conf_entry core_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential	board/ti/sdp4430/sdp4430_mux_data.h	/^const struct pad_conf_entry core_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential_am572x_idk	board/ti/am57xx/mux_data.h	/^const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_essential_x15	board/ti/am57xx/mux_data.h	/^const struct pad_conf_entry core_padconf_array_essential_x15[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_padconf_array_non_essential	board/gumstix/duovero/duovero_mux_data.h	/^const struct pad_conf_entry core_padconf_array_non_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
core_pll_config	board/ti/ks2_evm/board_k2e.c	/^static struct pll_init_data core_pll_config[NUM_SPDS] = {$/;"	v	typeref:struct:pll_init_data[]	file:
core_pll_config	board/ti/ks2_evm/board_k2hk.c	/^static struct pll_init_data core_pll_config[NUM_SPDS] = {$/;"	v	typeref:struct:pll_init_data[]	file:
core_pll_config	board/ti/ks2_evm/board_k2l.c	/^static struct pll_init_data core_pll_config[NUM_SPDS] = {$/;"	v	typeref:struct:pll_init_data[]	file:
core_pwrdn_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 core_pwrdn_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
core_pwrup_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 core_pwrup_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
core_selection	board/amcc/bamboo/bamboo.h	/^typedef enum core_selection { CORE_NOT_SELECTED, CORE_SELECTED} core_selection_t;$/;"	g
core_selection_t	board/amcc/bamboo/bamboo.h	/^typedef enum core_selection { CORE_NOT_SELECTED, CORE_SELECTED} core_selection_t;$/;"	t	typeref:enum:core_selection
core_sft_rst	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 core_sft_rst[4];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[4]
core_spin	arch/arm/mach-keystone/cmd_mon.c	/^static void core_spin(void)$/;"	f	typeref:typename:void	file:
core_status	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 core_status;	\/* 0x090 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
core_thermal	arch/arm/dts/omap5-core-thermal.dtsi	/^core_thermal: core_thermal {$/;"	l
core_to_pos	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^static int core_to_pos(int nr)$/;"	f	typeref:typename:int	file:
coreaon_clkdm	arch/arm/dts/dra7xx-clocks.dtsi	/^	coreaon_clkdm: coreaon_clkdm {$/;"	l
corebcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 corebcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
coreboot_video_ids	drivers/video/coreboot.c	/^static const struct udevice_id coreboot_video_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
coreboot_video_probe	drivers/video/coreboot.c	/^static int coreboot_video_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
coreclk	arch/arm/dts/armada-375.dtsi	/^			coreclk: mvebu-sar@e8204 {$/;"	l
coreclk	arch/arm/dts/armada-38x.dtsi	/^			coreclk: mvebu-sar@18600 {$/;"	l
coreclk	arch/arm/dts/armada-xp.dtsi	/^			coreclk: mvebu-sar@18230 {$/;"	l
corecnf_t	arch/powerpc/cpu/mpc8260/speed.c	/^} corecnf_t;$/;"	t	typeref:struct:__anon1baf12f90108	file:
corecnf_t	arch/powerpc/cpu/mpc83xx/speed.c	/^} corecnf_t;$/;"	t	typeref:struct:__anon6ec4fb040208	file:
corecnf_tab	arch/powerpc/cpu/mpc8260/speed.c	/^corecnf_t corecnf_tab[] = {$/;"	v	typeref:typename:corecnf_t[]
corecnf_tab	arch/powerpc/cpu/mpc83xx/speed.c	/^static corecnf_t corecnf_tab[] = {$/;"	v	typeref:typename:corecnf_t[]	file:
coredisrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     coredisrl;      \/* lower portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	coredisrl;	\/* lower portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     coredisrl;      \/* lower portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	coredisrl;	\/* lower portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisru	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     coredisru;      \/* uppper portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisru	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	coredisru;	\/* uppper portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisru	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     coredisru;      \/* uppper portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredisru	arch/powerpc/include/asm/immap_85xx.h	/^	u32	coredisru;	\/* uppper portion for support of 64 cores *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
coredivclk	arch/arm/dts/armada-370-xp.dtsi	/^			coredivclk: corediv-clock@18740 {$/;"	l
coredivclk	arch/arm/dts/armada-375.dtsi	/^			coredivclk: corediv-clock@e8250 {$/;"	l
coredivclk	arch/arm/dts/armada-38x.dtsi	/^			coredivclk: clock@e4250 {$/;"	l
coreid	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 coreid;$/;"	m	struct:rk3288_msch	typeref:typename:u32
coreintr_clear	drivers/usb/musb-new/musb_dsps.c	/^	u16	coreintr_clear;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
coreintr_set	drivers/usb/musb-new/musb_dsps.c	/^	u16	coreintr_set;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
coreintr_status	drivers/usb/musb-new/musb_dsps.c	/^	u16	coreintr_status;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
corenet_tb_init	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^static void corenet_tb_init(void)$/;"	f	typeref:typename:void	file:
coresrencr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 coresrencr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
coresrencr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 coresrencr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
corr	drivers/mtd/ubi/ubi.h	/^	struct list_head corr;$/;"	m	struct:ubi_attach_info	typeref:struct:list_head
corr_peb_count	drivers/mtd/ubi/ubi.h	/^	int corr_peb_count;$/;"	m	struct:ubi_attach_info	typeref:typename:int
corr_peb_count	drivers/mtd/ubi/ubi.h	/^	int corr_peb_count;$/;"	m	struct:ubi_device	typeref:typename:int
correct	include/linux/compiler.h	/^			unsigned long correct;$/;"	m	struct:ftrace_branch_data::__anonaf531ce8010a::__anonaf531ce80208	typeref:typename:unsigned long
correct	include/linux/mtd/nand.h	/^	int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,uint8_t * dat,uint8_t * read_ecc,uint8_t * calc_ecc)
correct_parent_keys	fs/ubifs/tnc.c	/^static void correct_parent_keys(const struct ubifs_info *c,$/;"	f	typeref:typename:void	file:
corrected	include/mtd/mtd-abi.h	/^	__u32 corrected;$/;"	m	struct:mtd_ecc_stats	typeref:typename:__u32
corrupt	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			corrupt[UBI_FM_BM_SIZE];$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long[]
corrupt_data	fs/ubifs/debug.c	/^static int corrupt_data(const struct ubifs_info *c, const void *buf,$/;"	f	typeref:typename:int	file:
corrupted	drivers/mtd/ubi/ubi.h	/^	unsigned int corrupted:1;$/;"	m	struct:ubi_volume	typeref:typename:unsigned int:1
corrupted	include/linux/mtd/ubi.h	/^	int corrupted;$/;"	m	struct:ubi_volume_info	typeref:typename:int
cortex_rev	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^u32 cortex_rev(void)$/;"	f	typeref:typename:u32
cortina_reg_cfg	drivers/net/phy/cortina.c	/^struct cortina_reg_config cortina_reg_cfg[] = {$/;"	v	typeref:struct:cortina_reg_config[]
cortina_reg_config	include/cortina.h	/^struct cortina_reg_config {$/;"	s
corvus_macb_hw_init	board/siemens/corvus/board.c	/^static void corvus_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
corvus_nand_hw_init	board/siemens/corvus/board.c	/^static void corvus_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
corvus_request_gpio	board/siemens/corvus/board.c	/^static void corvus_request_gpio(void)$/;"	f	typeref:typename:void	file:
cosr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 cosr;$/;"	m	struct:clock_control_regs	typeref:typename:u32
cosr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 cosr;	\/* Clock out source *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
count	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 count[3];	\/* Timer count registers *\/$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
count	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u32 count;$/;"	m	struct:gpt_regs	typeref:typename:u32
count	arch/microblaze/include/asm/microblaze_intc.h	/^	int count; \/* number of interrupt *\/$/;"	m	struct:irq_action	typeref:typename:int
count	arch/nios2/cpu/interrupts.c	/^	int count;$/;"	m	struct:irq_action	typeref:typename:int	file:
count	arch/openrisc/cpu/interrupts.c	/^	int count;$/;"	m	struct:irq_action	typeref:typename:int	file:
count	arch/powerpc/cpu/mpc512x/interrupts.c	/^	ulong count;$/;"	m	struct:irq_action	typeref:typename:ulong	file:
count	arch/powerpc/cpu/mpc5xx/interrupts.c	/^	int count;$/;"	m	struct:interrupt_action	typeref:typename:int	file:
count	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^	ulong count;$/;"	m	struct:irq_action	typeref:typename:ulong	file:
count	arch/powerpc/cpu/mpc8260/interrupts.c	/^	ulong count;$/;"	m	struct:irq_action	typeref:typename:ulong	file:
count	arch/powerpc/cpu/mpc83xx/interrupts.c	/^	ulong count;$/;"	m	struct:irq_action	typeref:typename:ulong	file:
count	arch/powerpc/cpu/ppc4xx/interrupts.c	/^	int count;$/;"	m	struct:irq_action	typeref:typename:int	file:
count	arch/sparc/cpu/leon2/interrupts.c	/^	unsigned int count;$/;"	m	struct:irq_action	typeref:typename:unsigned int	file:
count	arch/sparc/cpu/leon3/interrupts.c	/^	unsigned int count;$/;"	m	struct:irq_action	typeref:typename:unsigned int	file:
count	arch/x86/include/asm/coreboot_tables.h	/^	u32 count;$/;"	m	struct:cb_gpios	typeref:typename:u32
count	arch/x86/lib/interrupts.c	/^	unsigned int count;$/;"	m	struct:irq_action	typeref:typename:unsigned int	file:
count	arch/x86/lib/sfi.c	/^	int count;$/;"	m	struct:table_info	typeref:typename:int	file:
count	board/mpl/common/isa.c	/^	 int count;$/;"	m	struct:isa_irq_action	typeref:typename:int	file:
count	cmd/bootmenu.c	/^	int count;			\/* total count of menu entries *\/$/;"	m	struct:bootmenu_data	typeref:typename:int	file:
count	common/bootstage.c	/^	uint32_t count;		\/* Number of records *\/$/;"	m	struct:bootstage_hdr	typeref:typename:uint32_t	file:
count	common/image.c	/^	int count;$/;"	m	struct:table_info	typeref:typename:int	file:
count	drivers/net/eepro100.c	/^	volatile s32 count;$/;"	m	struct:TxFD	typeref:typename:volatile s32	file:
count	drivers/net/eepro100.c	/^	volatile u32 count;$/;"	m	struct:RxFD	typeref:typename:volatile u32	file:
count	drivers/net/mvpp2.c	/^	int count;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:int	file:
count	drivers/net/mvpp2.c	/^	int count;$/;"	m	struct:mvpp2_txq_pcpu	typeref:typename:int	file:
count	drivers/usb/dwc3/core.h	/^	unsigned int		count;$/;"	m	struct:dwc3_event_buffer	typeref:typename:unsigned int
count	drivers/usb/gadget/f_thor.h	/^	s32 count;		\/* response data id *\/$/;"	m	struct:data_rsp_box	typeref:typename:s32
count	drivers/usb/host/isp116x.h	/^	u16 count;$/;"	m	struct:ptd	typeref:typename:u16
count	drivers/video/scf0403_lcd.c	/^	int count;$/;"	m	struct:scf0403_cmd	typeref:typename:int	file:
count	fs/yaffs2/yaffs_guts.h	/^	int count;$/;"	m	struct:yaffs_obj_bucket	typeref:typename:int
count	fs/yaffs2/yaffsfs.c	/^	int count;		\/* Number of handles accessing this inode *\/$/;"	m	struct:yaffsfs_Inode	typeref:typename:int	file:
count	include/fsl_qe.h	/^		u32 count;	\/* Number of 32-bit words of the code *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u32
count	include/fsl_qe.h	/^	u8 count;		\/* Number of microcode[] structures *\/$/;"	m	struct:qe_firmware	typeref:typename:u8
count	include/jffs2/mini_inflate.h	/^	int *count;	 \/* the number of codes of this bit length *\/$/;"	m	struct:huffman_set	typeref:typename:int *
count	include/libfdt.h	/^	int count;			\/* Numnber of regions found *\/$/;"	m	struct:fdt_region_state	typeref:typename:int
count	include/linux/fb.h	/^	__u32 count;			\/* counter of retraces since boot *\/$/;"	m	struct:fb_vblank	typeref:typename:__u32
count	include/mtd/ubi-user.h	/^	__s32 count;$/;"	m	struct:ubi_rnvol_req	typeref:typename:__s32
count	test/dm/bus.c	/^	int count;$/;"	m	struct:dm_test_parent_platdata	typeref:typename:int	file:
count	tools/image-host.c	/^	int count;$/;"	m	struct:strlist	typeref:typename:int	file:
count	tools/mxsimage.h	/^		uint32_t	count;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960708	typeref:typename:uint32_t
count	tools/mxsimage.h	/^		uint32_t	count;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960808	typeref:typename:uint32_t
count0	drivers/usb/musb/musb_core.h	/^	u16	count0;$/;"	m	struct:musb_ep0_regs	typeref:typename:u16
count_blk_devices	test/dm/blk.c	/^static int count_blk_devices(void)$/;"	f	typeref:typename:int	file:
count_cells	common/fdt_support.c	/^	void		(*count_cells)(const void *blob, int parentoffset,$/;"	m	struct:of_bus	typeref:typename:void (*)(const void * blob,int parentoffset,int * addrc,int * sizec)	file:
count_configs	drivers/usb/gadget/composite.c	/^static int count_configs(struct usb_composite_dev *cdev, unsigned type)$/;"	f	typeref:typename:int	file:
count_ctrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 count_ctrl;			\/* Count Control *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
count_ctrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 count_ctrl;			\/* Count Control *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
count_fastmap_pebs	drivers/mtd/ubi/fastmap.c	/^static int count_fastmap_pebs(struct ubi_attach_info *ai)$/;"	f	typeref:typename:int	file:
count_leading_zeros	arch/nios2/lib/longlong.h	/^#define count_leading_zeros(/;"	d
count_lsb_zeroes	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static inline int count_lsb_zeroes(unsigned long val)$/;"	f	typeref:typename:int	file:
count_required_pts	arch/arm/cpu/armv8/cache_v8.c	/^static int count_required_pts(u64 addr, int level, u64 maxaddr)$/;"	f	typeref:typename:int	file:
count_trailing_zeros	arch/nios2/lib/longlong.h	/^#define count_trailing_zeros(/;"	d
count_usb_devices	test/dm/usb.c	/^static int count_usb_devices(void)$/;"	f	typeref:typename:int	file:
count_written_bits	drivers/mtd/nand/fsmc_nand.c	/^static int count_written_bits(uint8_t *buff, int size, int max_bits)$/;"	f	typeref:typename:int	file:
count_written_bits	drivers/mtd/nand/vf610_nfc.c	/^static inline int count_written_bits(uint8_t *buff, int size, int max_bits)$/;"	f	typeref:typename:int	file:
countbits	drivers/mtd/nand/nand_ecc.c	/^static inline int countbits(uint32_t byte)$/;"	f	typeref:typename:int	file:
counter	arch/arm/imx-common/timer.c	/^	unsigned int counter;$/;"	m	struct:mxc_gpt	typeref:typename:unsigned int	file:
counter	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 counter;		\/* Counter Value Register		*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
counter	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 counter;	\/* counter *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
counter	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 counter;	\/* counter *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
counter	arch/arm/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	m	struct:__anon78cc76970108	typeref:typename:volatile int
counter	arch/arm/include/asm/atomic.h	/^typedef struct { volatile long counter; } atomic64_t;$/;"	m	struct:__anon78cc76970308	typeref:typename:volatile long
counter	arch/arm/include/asm/atomic.h	/^typedef struct { volatile long long counter; } atomic64_t;$/;"	m	struct:__anon78cc76970208	typeref:typename:volatile long long
counter	arch/arm/mach-zynq/timer.c	/^	u32 counter; \/* Timer Counter Register *\/$/;"	m	struct:scu_timer	typeref:typename:u32	file:
counter	arch/microblaze/include/asm/microblaze_timer.h	/^	int counter; \/* timer\/counter register *\/$/;"	m	struct:microblaze_timer_t	typeref:typename:int
counter	arch/powerpc/include/asm/atomic.h	/^typedef struct { int counter; } atomic_t;$/;"	m	struct:__anon091730170208	typeref:typename:int
counter	arch/powerpc/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	m	struct:__anon091730170108	typeref:typename:volatile int
counter	arch/x86/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	m	struct:__anon109c247d0108	typeref:typename:volatile int
counter	arch/xtensa/include/asm/atomic.h	/^typedef struct { volatile int counter; } atomic_t;$/;"	m	struct:__anon7deea2ca0108	typeref:typename:volatile int
counter	cmd/immap.c	/^static int counter;$/;"	v	typeref:typename:int	file:
counter	drivers/qe/uec.h	/^	u32   counter;$/;"	m	struct:uec_rx_interrupt_coalescing_entry	typeref:typename:u32
counter	fs/ubifs/ubifs.h	/^	struct percpu_counter	counter[SB_FREEZE_LEVELS];$/;"	m	struct:sb_writers	typeref:struct:percpu_counter[]
counter32k	arch/arm/dts/am4372.dtsi	/^		counter32k: counter@44e86000 {$/;"	l
counter32k	arch/arm/dts/dra7.dtsi	/^			counter32k: counter@4000 {$/;"	l	label:l4_wkup
counter_control_register	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 counter_control_register;$/;"	m	struct:iou_scntr	typeref:typename:u32
counter_control_register	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 counter_control_register;$/;"	m	struct:iou_scntr_secure	typeref:typename:u32
counter_ctrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 counter_ctrl;	\/* Counter Control *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0c08	typeref:typename:u32
counter_ctrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 counter_ctrl;	\/* Counter Control *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0808	typeref:typename:u32
counter_value0	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 counter_value0;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
counter_value1	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 counter_value1;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
counterid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 counterid[12];$/;"	m	struct:sctr_regs	typeref:typename:u32[12]
counterid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 counterid[12];$/;"	m	struct:sctr_regs	typeref:typename:u32[12]
counterid	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 counterid[12];	\/* 0xFD0 - 0xFxx CounterID regs, RO *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[12]
counterid	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 counterid[12];	\/* 0xFD0 - 0xFxx CounterID regs, RO *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[12]
counterid	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 counterid[12];	\/* 0xFD0 - 0xFxx CounterID regs, RO *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[12]
counterid	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 counterid[1];$/;"	m	struct:sctr_regs	typeref:typename:u32[1]
country_selection	include/usbdescriptors.h	/^		struct usb_class_country_selection_descriptor country_selection;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_country_selection_descriptor
counts	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	counts;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
cover_fname	tools/patman/patman	/^        cover_fname, args = gitutil.CreatePatches(options.start, options.count,$/;"	v
cover_fname	tools/patman/patman.py	/^        cover_fname, args = gitutil.CreatePatches(options.start, options.count,$/;"	v
cp	drivers/net/cpsw.c	/^	void			*hdp, *cp, *rxfree;$/;"	m	struct:cpdma_chan	typeref:typename:void *	file:
cp	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile cpm8xx_t *cp = 0;$/;"	v	typeref:typename:volatile cpm8xx_t *	file:
cp	include/linux/immap_qe.h	/^	cp_qe_t cp;		\/* Communications Processor *\/$/;"	m	struct:qe_immap	typeref:typename:cp_qe_t
cp0_baduaddr	arch/mips/include/asm/processor.h	/^	unsigned long cp0_baduaddr;	\/* Last kernel fault accessing USEG *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
cp0_badvaddr	arch/mips/include/asm/processor.h	/^	unsigned long cp0_badvaddr;	\/* Last user fault *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
cp0_badvaddr	arch/mips/include/asm/ptrace.h	/^	unsigned long cp0_badvaddr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
cp0_cause	arch/mips/include/asm/ptrace.h	/^	unsigned long cp0_cause;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
cp0_epc	arch/mips/include/asm/ptrace.h	/^	unsigned long cp0_epc;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
cp0_status	arch/mips/include/asm/processor.h	/^	unsigned long cp0_status;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
cp0_status	arch/mips/include/asm/ptrace.h	/^	unsigned long cp0_status;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
cp0cfg0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0cfg0;		\/* Processor 0 Configuration 0 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0cfg1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0cfg1;		\/* Processor 0 Configuration 1 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0cfg2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0cfg2;		\/* Processor 0 Configuration 2 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0cfg3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0cfg3;		\/* Processor 0 Configuration 3 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0count	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0count;		\/* Processor 0 Count Register                   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0master	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0master;		\/* Processor 0 Master Number Register   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0num	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0num;		\/* Processor 0 Number Register                  *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp0type	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp0type;		\/* Processor 0 Type Register                    *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp110_comphy_phy_mux_data	drivers/phy/marvell/comphy_cp110.c	/^struct comphy_mux_data cp110_comphy_phy_mux_data[] = {$/;"	v	typeref:struct:comphy_mux_data[]
cp110_comphy_pipe_mux_data	drivers/phy/marvell/comphy_cp110.c	/^struct comphy_mux_data cp110_comphy_pipe_mux_data[] = {$/;"	v	typeref:struct:comphy_mux_data[]
cp15_read_cntp_ctl	arch/arm/cpu/armv7/sunxi/psci.c	/^static u32 __secure cp15_read_cntp_ctl(void)$/;"	f	typeref:typename:u32 __secure	file:
cp15_read_scr	arch/arm/cpu/armv7/sunxi/psci.c	/^static u32 __secure cp15_read_scr(void)$/;"	f	typeref:typename:u32 __secure	file:
cp15_write_cntp_ctl	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure cp15_write_cntp_ctl(u32 val)$/;"	f	typeref:typename:void __secure	file:
cp15_write_cntp_tval	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure cp15_write_cntp_tval(u32 tval)$/;"	f	typeref:typename:void __secure	file:
cp15_write_scr	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure cp15_write_scr(u32 scr)$/;"	f	typeref:typename:void __secure	file:
cp1cfg0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1cfg0;		\/* Processor 1 Configuration 0 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1cfg1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1cfg1;		\/* Processor 1 Configuration 1 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1cfg2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1cfg2;		\/* Processor 1 Configuration 2 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1cfg3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1cfg3;		\/* Processor 1 Configuration 3 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1count	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1count;		\/* Processor 1 Count Register                   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1master	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1master;		\/* Processor 1 Master Number Register   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1num	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1num;		\/* Processor 1 Number Register                  *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp1type	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cp1type;		\/* Processor 1 Type Register                    *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cp_5v_reg	arch/arm/dts/tegra30-cardhu.dts	/^		cp_5v_reg: regulator@2 {$/;"	l
cp_addr	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	cp_addr;$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short
cp_brgc1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_brgc1;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_brgc2	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_brgc2;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_brgc3	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_brgc3;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_brgc4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_brgc4;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_cpcr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_cpcr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_cpcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	cp_cpcr;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_cpmcr1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_cpmcr1;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_cpmcr2	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_cpmcr2;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_cpmcr3	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_cpmcr3;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_cpmcr4	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_cpmcr4;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_cptr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_cptr;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_ctrl	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	cp_ctrl;$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short
cp_data	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	cp_data;$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short
cp_delay	arch/arm/lib/cache-cp15.c	/^static void cp_delay (void)$/;"	f	typeref:typename:void	file:
cp_dparam	arch/powerpc/include/asm/8xx_immap.h	/^		u_char	cp_dparam[0x400];$/;"	m	union:comm_proc::__anon1cf308b5010a	typeref:typename:u_char[0x400]
cp_dparam16	arch/powerpc/include/asm/8xx_immap.h	/^		u16	cp_dparam16[0x200];$/;"	m	union:comm_proc::__anon1cf308b5010a	typeref:typename:u16[0x200]
cp_dpmem	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_dpmem[0x1C00];	\/* BD \/ Data \/ ucode *\/$/;"	m	struct:comm_proc	typeref:typename:u_char[0x1C00]
cp_fec	arch/powerpc/include/asm/8xx_immap.h	/^#define cp_fec	/;"	d
cp_fec1	arch/powerpc/include/asm/8xx_immap.h	/^#define cp_fec1	/;"	d
cp_fec2	arch/powerpc/include/asm/8xx_immap.h	/^	fec_t	cp_fec2;$/;"	m	struct:comm_proc	typeref:typename:fec_t
cp_pbdat	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_pbdat;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_pbdir	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_pbdir;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_pbodr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_pbodr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_pbpar	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_pbpar;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_pedat	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_pedat;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_pedir	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_pedir;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_peodr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_peodr;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_pepar	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_pepar;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_peso	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_peso;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_pipc	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_pipc;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_ptpr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_ptpr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_qe	include/linux/immap_qe.h	/^typedef struct cp_qe {$/;"	s
cp_qe_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) cp_qe_t;$/;"	t	typeref:struct:cp_qe
cp_rccr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_rccr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_rccr	arch/powerpc/include/asm/immap_8260.h	/^	uint	cp_rccr;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_rmds	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_rmds;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_rter	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_rter;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_rter	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cp_rter;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_rtmr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_rtmr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_rtmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cp_rtmr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_rtscr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cp_rtscr;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_rtsr	arch/powerpc/include/asm/immap_8260.h	/^	uint	cp_rtsr;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_scc	arch/powerpc/include/asm/8xx_immap.h	/^	scc_t	cp_scc[4];$/;"	m	struct:comm_proc	typeref:typename:scc_t[4]
cp_sicmr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_sicmr;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_sicr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_sicr;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_sigmr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_sigmr;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_simode	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_simode;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_siram	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_siram[0x200];$/;"	m	struct:comm_proc	typeref:typename:u_char[0x200]
cp_sirp	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cp_sirp;$/;"	m	struct:comm_proc	typeref:typename:uint
cp_sistr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_sistr;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_smc	arch/powerpc/include/asm/8xx_immap.h	/^	smc_t	cp_smc[2];$/;"	m	struct:comm_proc	typeref:typename:smc_t[2]
cp_spcom	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_spcom;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_spie	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_spie;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_spim	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_spim;$/;"	m	struct:comm_proc	typeref:typename:u_char
cp_spmode	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cp_spmode;$/;"	m	struct:comm_proc	typeref:typename:ushort
cp_vcram	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	cp_vcram[0x100];$/;"	m	struct:comm_proc	typeref:typename:u_char[0x100]
cpc_corenet	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct cpc_corenet {$/;"	s
cpc_corenet_t	arch/powerpc/include/asm/immap_85xx.h	/^} cpc_corenet_t;$/;"	t	typeref:struct:cpc_corenet
cpcaptecc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcaptecc;	\/* capture ECC *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpccaptdatahi	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpccaptdatahi;	\/* capture data high *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpccaptdatalo	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpccaptdatalo;	\/* capture data low *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpccfg0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpccfg0;	\/* Configuration register *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpccsr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32 	cpccsr0;	\/* Config\/status reg *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpce	drivers/video/rockchip/rk_hdmi.c	/^	u32 cpce;$/;"	m	struct:hdmi_mpll_config	typeref:typename:u32	file:
cpce0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpce0;		\/* Core Parity Checking Enable Register 0                               *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpcerraddr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerraddr;	\/* error address *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrattr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrattr;	\/* error attribute *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrctl;	\/* error control *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrdet	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrdet;	\/* error detect *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrdis	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrdis;	\/* error disable *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerreaddr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerreaddr;	\/* error extended address *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrinjctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrinjctl;	\/* Error injection control *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrinjhi	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrinjhi;	\/* Error injection high *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrinjlo	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrinjlo;	\/* Error injection lo *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcerrinten	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcerrinten;	\/* errir interrupt enable *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcewabr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcewabr0;	\/* External write base reg 0 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcewabr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcewabr1;	\/* External write base reg 1 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcewcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcewcr0;	\/* External Write reg 0 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcewcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcewcr1;	\/* External Write reg 1 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpchdbcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpchdbcr0;	\/* hardware debug control register 0 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpci405_host	board/esd/cpci405/cpci405.c	/^int cpci405_host(void)$/;"	f	typeref:typename:int
cpci405_pci_fixup_irq	board/esd/cpci405/cpci405.c	/^void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:void
cpci405_version	board/esd/cpci405/cpci405.c	/^int cpci405_version(void)$/;"	f	typeref:typename:int
cpcon	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 cpcon:4;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:4
cpcon	arch/arm/mach-tegra/cpu.h	/^	u8	cpcon;$/;"	m	struct:clk_pll_table	typeref:typename:u8
cpcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcr;$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u32
cpcsrcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcsrcr0;	\/* SRAM control reg 0 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpcsrcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpcsrcr1;	\/* SRAM control reg 1 *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32
cpdat	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpdat;$/;"	m	struct:par_io	typeref:typename:u32
cpdir1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpdir1;$/;"	m	struct:par_io	typeref:typename:u32
cpdir2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpdir2;$/;"	m	struct:par_io	typeref:typename:u32
cpdma_chan	drivers/net/cpsw.c	/^struct cpdma_chan {$/;"	s	file:
cpdma_desc	drivers/net/cpsw.c	/^struct cpdma_desc {$/;"	s	file:
cpdma_desc_alloc	drivers/net/cpsw.c	/^static struct cpdma_desc *cpdma_desc_alloc(struct cpsw_priv *priv)$/;"	f	typeref:struct:cpdma_desc *	file:
cpdma_desc_free	drivers/net/cpsw.c	/^static void cpdma_desc_free(struct cpsw_priv *priv, struct cpdma_desc *desc)$/;"	f	typeref:typename:void	file:
cpdma_process	drivers/net/cpsw.c	/^static int cpdma_process(struct cpsw_priv *priv, struct cpdma_chan *chan,$/;"	f	typeref:typename:int	file:
cpdma_reg_ofs	include/cpsw.h	/^	u32	cpdma_reg_ofs;	\/* cpdma register offset		*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
cpdma_rx_chan_map	drivers/net/cpsw.c	/^	u32	cpdma_rx_chan_map;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
cpdma_submit	drivers/net/cpsw.c	/^static int cpdma_submit(struct cpsw_priv *priv, struct cpdma_chan *chan,$/;"	f	typeref:typename:int	file:
cpdma_tx_pri_map	drivers/net/cpsw.c	/^	u32	cpdma_tx_pri_map;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
cpgmac0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cpgmac0clkctrl;	\/* offset 0x14 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
cpgmac0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cpgmac0clkctrl;	\/* offset 0xB20 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
cpgxxcs4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cpgxxcs4;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
cphy_disable_overrides	board/highbank/ahci.c	/^void cphy_disable_overrides(void)$/;"	f	typeref:typename:void
cphy_disable_port_overrides	board/highbank/ahci.c	/^static void cphy_disable_port_overrides(u8 port)$/;"	f	typeref:typename:void	file:
cphy_override_lane	board/highbank/ahci.c	/^static void cphy_override_lane(u8 port)$/;"	f	typeref:typename:void	file:
cphy_spread_spectrum_override	board/highbank/ahci.c	/^static void cphy_spread_spectrum_override(u8 phy, u8 lane, u32 val)$/;"	f	typeref:typename:void	file:
cphy_tx_attenuation_override	board/highbank/ahci.c	/^static void cphy_tx_attenuation_override(u8 phy, u8 lane)$/;"	f	typeref:typename:void	file:
cpic8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} cpic8xx_t;$/;"	t	typeref:struct:cpm_ic
cpic_cicr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cpic_cicr;$/;"	m	struct:cpm_ic	typeref:typename:uint
cpic_cimr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cpic_cimr;$/;"	m	struct:cpm_ic	typeref:typename:uint
cpic_cipr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cpic_cipr;$/;"	m	struct:cpm_ic	typeref:typename:uint
cpic_cisr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	cpic_cisr;$/;"	m	struct:cpm_ic	typeref:typename:uint
cpic_civr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpic_civr;$/;"	m	struct:cpm_ic	typeref:typename:ushort
cplb_page_size	cmd/cplbinfo.c	/^static const char *cplb_page_size(uint32_t data)$/;"	f	typeref:typename:const char *	file:
cpld	arch/arm/dts/fsl-ls1043a-rdb.dts	/^		cpld: board-control@2,0 {$/;"	l
cpld	board/freescale/p2041rdb/cpld.h	/^#define cpld /;"	d
cpld_cmd	board/freescale/c29xpcie/cpld.c	/^int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
cpld_cmd	board/freescale/p2041rdb/cpld.c	/^int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
cpld_data	board/freescale/c29xpcie/cpld.h	/^struct cpld_data {$/;"	s
cpld_data	board/freescale/ls1021atwr/ls1021atwr.c	/^struct cpld_data {$/;"	s	file:
cpld_data	board/freescale/ls1043ardb/cpld.h	/^struct cpld_data {$/;"	s
cpld_data	board/freescale/ls1046ardb/cpld.h	/^struct cpld_data {$/;"	s
cpld_data	board/freescale/p1010rdb/p1010rdb.c	/^struct cpld_data {$/;"	s	file:
cpld_data	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^struct cpld_data {$/;"	s	file:
cpld_data	board/freescale/p2041rdb/cpld.h	/^typedef struct cpld_data {$/;"	s
cpld_data	board/freescale/t102xrdb/cpld.h	/^struct cpld_data {$/;"	s
cpld_data	board/freescale/t104xrdb/cpld.h	/^struct cpld_data {$/;"	s
cpld_data	board/freescale/t208xrdb/cpld.h	/^struct cpld_data {$/;"	s
cpld_data	board/freescale/t4rdb/cpld.h	/^struct cpld_data {$/;"	s
cpld_data_t	board/freescale/p2041rdb/cpld.h	/^} __attribute__ ((packed)) cpld_data_t;$/;"	t	typeref:struct:cpld_data
cpld_data_t	board/freescale/t102xrdb/cpld.h	/^} cpld_data_t;$/;"	v	typeref:struct:cpld_data
cpld_data_t	board/freescale/t104xrdb/cpld.h	/^} cpld_data_t;$/;"	v	typeref:struct:cpld_data
cpld_data_t	board/freescale/t208xrdb/cpld.h	/^} cpld_data_t;$/;"	v	typeref:struct:cpld_data
cpld_dump_regs	board/freescale/c29xpcie/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_dump_regs	board/freescale/ls1043ardb/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_dump_regs	board/freescale/ls1046ardb/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_dump_regs	board/freescale/p2041rdb/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_dump_regs	board/freescale/t102xrdb/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_dump_regs	board/freescale/t104xrdb/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_dump_regs	board/freescale/t4rdb/cpld.c	/^static void cpld_dump_regs(void)$/;"	f	typeref:typename:void	file:
cpld_gpio_bus	board/LaCie/common/cpld-gpio-bus.h	/^struct cpld_gpio_bus {$/;"	s
cpld_gpio_bus	board/LaCie/net2big_v2/net2big_v2.c	/^static struct cpld_gpio_bus cpld_gpio_bus = {$/;"	v	typeref:struct:cpld_gpio_bus	file:
cpld_gpio_bus_addr	board/LaCie/net2big_v2/net2big_v2.c	/^static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 };$/;"	v	typeref:typename:unsigned[]	file:
cpld_gpio_bus_data	board/LaCie/net2big_v2/net2big_v2.c	/^static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 };$/;"	v	typeref:typename:unsigned[]	file:
cpld_gpio_bus_enable_select	board/LaCie/common/cpld-gpio-bus.c	/^static void cpld_gpio_bus_enable_select(struct cpld_gpio_bus *bus)$/;"	f	typeref:typename:void	file:
cpld_gpio_bus_set_addr	board/LaCie/common/cpld-gpio-bus.c	/^static void cpld_gpio_bus_set_addr(struct cpld_gpio_bus *bus, unsigned addr)$/;"	f	typeref:typename:void	file:
cpld_gpio_bus_set_data	board/LaCie/common/cpld-gpio-bus.c	/^static void cpld_gpio_bus_set_data(struct cpld_gpio_bus *bus, unsigned data)$/;"	f	typeref:typename:void	file:
cpld_gpio_bus_write	board/LaCie/common/cpld-gpio-bus.c	/^void cpld_gpio_bus_write(struct cpld_gpio_bus *bus,$/;"	f	typeref:typename:void
cpld_init	board/renesas/stout/cpld.c	/^void cpld_init(void)$/;"	f	typeref:typename:void
cpld_read	board/freescale/ls1043ardb/cpld.c	/^u8 cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8
cpld_read	board/freescale/ls1046ardb/cpld.c	/^u8 cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8
cpld_read	board/freescale/t102xrdb/cpld.c	/^u8 cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8
cpld_read	board/freescale/t104xrdb/cpld.c	/^u8 cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8
cpld_read	board/freescale/t208xrdb/cpld.c	/^u8 cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8
cpld_read	board/freescale/t4rdb/cpld.c	/^u8 cpld_read(unsigned int reg)$/;"	f	typeref:typename:u8
cpld_read	board/renesas/stout/cpld.c	/^static u32 cpld_read(u8 addr)$/;"	f	typeref:typename:u32	file:
cpld_reset_cmd	board/freescale/ls1021atwr/ls1021atwr.c	/^static int cpld_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
cpld_rev	board/amcc/canyonlands/canyonlands.c	/^	u8	cpld_rev;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
cpld_rev_bit	board/freescale/ls1043ardb/cpld.c	/^void cpld_rev_bit(unsigned char *value)$/;"	f	typeref:typename:void
cpld_rev_bit	board/freescale/ls1046ardb/cpld.c	/^void cpld_rev_bit(unsigned char *value)$/;"	f	typeref:typename:void
cpld_rev_major	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 cpld_rev_major;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cpld_rev_minor	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 cpld_rev_minor;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cpld_revision	board/esd/pmc405de/pmc405de.c	/^static int cpld_revision(void)$/;"	f	typeref:typename:int	file:
cpld_set_altbank	board/freescale/c29xpcie/cpld.c	/^void cpld_set_altbank(u8 banksel)$/;"	f	typeref:typename:void
cpld_set_altbank	board/freescale/ls1043ardb/cpld.c	/^void cpld_set_altbank(void)$/;"	f	typeref:typename:void
cpld_set_altbank	board/freescale/ls1046ardb/cpld.c	/^void cpld_set_altbank(void)$/;"	f	typeref:typename:void
cpld_set_altbank	board/freescale/t102xrdb/cpld.c	/^void cpld_set_altbank(void)$/;"	f	typeref:typename:void
cpld_set_altbank	board/freescale/t104xrdb/cpld.c	/^void cpld_set_altbank(void)$/;"	f	typeref:typename:void
cpld_set_altbank	board/freescale/t208xrdb/cpld.c	/^void cpld_set_altbank(void)$/;"	f	typeref:typename:void
cpld_set_altbank	board/freescale/t4rdb/cpld.c	/^void cpld_set_altbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/c29xpcie/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/ls1043ardb/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/ls1046ardb/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/t102xrdb/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/t104xrdb/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/t208xrdb/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_defbank	board/freescale/t4rdb/cpld.c	/^void cpld_set_defbank(void)$/;"	f	typeref:typename:void
cpld_set_nand	board/freescale/ls1043ardb/cpld.c	/^void cpld_set_nand(void)$/;"	f	typeref:typename:void
cpld_set_sd	board/freescale/ls1043ardb/cpld.c	/^void cpld_set_sd(void)$/;"	f	typeref:typename:void
cpld_set_sd	board/freescale/ls1046ardb/cpld.c	/^void cpld_set_sd(void)$/;"	f	typeref:typename:void
cpld_show	board/freescale/ls1021atwr/ls1021atwr.c	/^void cpld_show(void)$/;"	f	typeref:typename:void
cpld_ver	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 cpld_ver;		\/* cpld revision *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cpld_ver	board/freescale/ls1043ardb/cpld.h	/^	u8 cpld_ver;		\/* 0x0 - CPLD Major Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver	board/freescale/ls1046ardb/cpld.h	/^	u8 cpld_ver;		\/* 0x0 - CPLD Major Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver	board/freescale/p1010rdb/p1010rdb.c	/^	u8 cpld_ver; \/* cpld revision *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cpld_ver	board/freescale/p2041rdb/cpld.h	/^	u8 cpld_ver;		\/* 0x0 - CPLD Major Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver	board/freescale/t102xrdb/cpld.h	/^	u8 cpld_ver;		\/* 0x00 - CPLD Major Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver	board/freescale/t104xrdb/cpld.h	/^	u8 cpld_ver;		\/* 0x00 - CPLD Major Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver_sub	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 cpld_ver_sub;	\/* cpld sub revision *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
cpld_ver_sub	board/freescale/ls1043ardb/cpld.h	/^	u8 cpld_ver_sub;	\/* 0x1 - CPLD Minor Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver_sub	board/freescale/ls1046ardb/cpld.h	/^	u8 cpld_ver_sub;	\/* 0x1 - CPLD Minor Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver_sub	board/freescale/p2041rdb/cpld.h	/^	u8 cpld_ver_sub;	\/* 0x1 - CPLD Minor Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver_sub	board/freescale/t102xrdb/cpld.h	/^	u8 cpld_ver_sub;	\/* 0x01 - CPLD Minor Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_ver_sub	board/freescale/t104xrdb/cpld.h	/^	u8 cpld_ver_sub;	\/* 0x01 - CPLD Minor Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpld_write	board/freescale/ls1043ardb/cpld.c	/^void cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
cpld_write	board/freescale/ls1046ardb/cpld.c	/^void cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
cpld_write	board/freescale/t102xrdb/cpld.c	/^void cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
cpld_write	board/freescale/t104xrdb/cpld.c	/^void cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
cpld_write	board/freescale/t208xrdb/cpld.c	/^void cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
cpld_write	board/freescale/t4rdb/cpld.c	/^void cpld_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
cpld_write	board/renesas/stout/cpld.c	/^static void cpld_write(u8 addr, u32 data)$/;"	f	typeref:typename:void	file:
cpldver	board/freescale/c29xpcie/cpld.h	/^	u8 cpldver;	\/* 0x3 - Software Version Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
cpll_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 cpll_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
cpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpll_con0;			\/* 10020120 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
cpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
cpll_init_cfg	drivers/clk/rockchip/clk_rk3288.c	/^static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);$/;"	v	typeref:typename:const struct pll_div	file:
cpll_init_cfg	drivers/clk/rockchip/clk_rk3399.c	/^static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);$/;"	v	typeref:typename:const struct pll_div	file:
cpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpll_lock;			\/* 10020020 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
cpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned cpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
cpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned cpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
cpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned cpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
cpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
cpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cpm8260_t	arch/powerpc/include/asm/immap_8260.h	/^} cpm8260_t;$/;"	t	typeref:struct:comm_proc
cpm8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} cpm8xx_t;$/;"	t	typeref:struct:comm_proc
cpm_buf_desc	arch/m68k/include/asm/fec.h	/^typedef struct cpm_buf_desc {$/;"	s
cpm_buf_desc	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct cpm_buf_desc {$/;"	s
cpm_buf_desc	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct cpm_buf_desc {$/;"	s
cpm_buf_desc	include/commproc.h	/^typedef struct cpm_buf_desc {$/;"	s
cpm_clk	arch/powerpc/include/asm/global_data.h	/^	unsigned long cpm_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
cpm_cr_enet_page	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	ulong cpm_cr_enet_page;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cpm_cr_enet_page	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	ulong cpm_cr_enet_page;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cpm_cr_enet_sblock	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	ulong cpm_cr_enet_sblock;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cpm_cr_enet_sblock	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	ulong cpm_cr_enet_sblock;$/;"	m	struct:ether_fcc_info_s	typeref:typename:ulong	file:
cpm_error_interrupt	arch/powerpc/cpu/mpc8xx/interrupts.c	/^static void cpm_error_interrupt (void *dummy)$/;"	f	typeref:typename:void	file:
cpm_i2c0	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_i2c0: i2c@701000 {$/;"	l
cpm_i2c1	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_i2c1: i2c@701100 {$/;"	l
cpm_ic	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct cpm_ic {$/;"	s
cpm_interrupt	arch/powerpc/cpu/mpc8xx/interrupts.c	/^static void cpm_interrupt (void *regs)$/;"	f	typeref:typename:void	file:
cpm_interrupt_init	arch/powerpc/cpu/mpc8xx/interrupts.c	/^static void cpm_interrupt_init (void)$/;"	f	typeref:typename:void	file:
cpm_load_patch	arch/powerpc/cpu/mpc8xx/upatch.c	/^void cpm_load_patch (volatile immap_t *immr)$/;"	f	typeref:typename:void
cpm_pcie0	arch/arm/dts/armada-cp110-master.dtsi	/^		cpm_pcie0: pcie@f2600000 {$/;"	l
cpm_pcie1	arch/arm/dts/armada-cp110-master.dtsi	/^		cpm_pcie1: pcie@f2620000 {$/;"	l
cpm_pcie2	arch/arm/dts/armada-cp110-master.dtsi	/^		cpm_pcie2: pcie@f2640000 {$/;"	l
cpm_sata0	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_sata0: sata@540000 {$/;"	l
cpm_spi0	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_spi0: spi@700600 {$/;"	l
cpm_spi1	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_spi1: spi@700680 {$/;"	l
cpm_syscon0	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_syscon0: system-controller@440000 {$/;"	l
cpm_timers	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct cpm_timers {$/;"	s
cpm_timers	arch/powerpc/include/asm/immap_8260.h	/^typedef struct cpm_timers {$/;"	s
cpm_usb3_0	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_usb3_0: usb3@500000 {$/;"	l
cpm_usb3_1	arch/arm/dts/armada-cp110-master.dtsi	/^			cpm_usb3_1: usb3@510000 {$/;"	l
cpm_vec	examples/standalone/timer.c	/^  int		 cpm_vec;	\/* CPM Interrupt Vector for this timer	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:int	file:
cpm_vecs	arch/powerpc/cpu/mpc8xx/interrupts.c	/^static struct interrupt_action cpm_vecs[CPMVEC_NR];$/;"	v	typeref:struct:interrupt_action[]	file:
cpmac_drv_send	drivers/net/keystone_net.c	/^int32_t cpmac_drv_send(u32 *buffer, int num_bytes, int slave_port_num)$/;"	f	typeref:typename:int32_t
cpmcimrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpmcimrl;	\/* Core PM Critical IRQ Masking *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cpmf_mult	arch/powerpc/cpu/mpc512x/speed.c	/^static int cpmf_mult[][2] = {$/;"	v	typeref:typename:int[][2]	file:
cpmimrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpmimrl;	\/* Core PM IRQ Masking *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cpmmcimrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpmmcimrl;	\/* Core PM Machine Check IRQ Masking *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cpmnmimrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpmnmimrl;	\/* Core PM NMI Masking *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cpmt_tcn1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcn1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn1	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcn1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn2	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcn2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn2	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcn2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn3	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcn3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn3	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcn3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn4	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcn4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcn4	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcn4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcr1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr1	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcr1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr2	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcr2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr2	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcr2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr3	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcr3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr3	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcr3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr4	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tcr4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tcr4	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tcr4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_ter1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter1	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_ter1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter2	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_ter2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter2	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_ter2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter3	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_ter3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter3	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_ter3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter4	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_ter4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_ter4	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_ter4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tgcr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tgcr;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tgcr1	arch/powerpc/include/asm/immap_8260.h	/^	u_char	cpmt_tgcr1;$/;"	m	struct:cpm_timers	typeref:typename:u_char
cpmt_tgcr2	arch/powerpc/include/asm/immap_8260.h	/^	u_char	cpmt_tgcr2;$/;"	m	struct:cpm_timers	typeref:typename:u_char
cpmt_tmr1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tmr1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr1	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tmr1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr2	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tmr2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr2	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tmr2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr3	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tmr3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr3	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tmr3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr4	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_tmr4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_tmr4	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_tmr4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_trr1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr1	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_trr1;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr2	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_trr2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr2	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_trr2;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr3	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_trr3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr3	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_trr3;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr4	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	cpmt_trr4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmt_trr4	arch/powerpc/include/asm/immap_8260.h	/^	ushort	cpmt_trr4;$/;"	m	struct:cpm_timers	typeref:typename:ushort
cpmtimer8260_t	arch/powerpc/include/asm/immap_8260.h	/^} cpmtimer8260_t;$/;"	t	typeref:struct:cpm_timers
cpmtimer8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} cpmtimer8xx_t;$/;"	t	typeref:struct:cpm_timers
cpmux	arch/powerpc/include/asm/immap_8260.h	/^typedef struct cpmux {$/;"	s
cpmux_t	arch/powerpc/include/asm/immap_8260.h	/^} cpmux_t;$/;"	t	typeref:struct:cpmux
cpo	board/freescale/b4860qds/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/corenet_ds/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/mpc8349emds/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/mpc8572ds/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/mpc8641hpcn/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/p1022ds/ddr.c	/^	u32 cpo;		\/* Range: 2-31 *\/$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/p2041rdb/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/freescale/t4qds/ddr.h	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
cpo	board/varisys/cyrus/ddr.c	/^	u32 cpo;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
cpo	board/xes/xpedite550x/ddr.c	/^	unsigned char cpo;$/;"	m	struct:__anon6cdf34da0108	typeref:typename:unsigned char	file:
cpo_override	board/freescale/ls1021aqds/ddr.h	/^	u32 cpo_override;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
cpo_override	board/freescale/ls1043aqds/ddr.h	/^	u32 cpo_override;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
cpo_override	board/freescale/ls1043ardb/ddr.h	/^	u32 cpo_override;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
cpo_override	board/xes/xpedite517x/ddr.c	/^	uint8_t cpo_override;$/;"	m	struct:board_memctl_options	typeref:typename:uint8_t	file:
cpo_override	board/xes/xpedite537x/ddr.c	/^	uint8_t cpo_override;$/;"	m	struct:board_memctl_options	typeref:typename:uint8_t	file:
cpo_override	include/fsl_ddr_sdram.h	/^	unsigned int cpo_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
cpodr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cpodr;$/;"	m	struct:par_io	typeref:typename:u32
cport_rdwr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_rdwr;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
cport_rdwr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_rdwr;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
cport_rmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_rmap;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
cport_rmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_rmap;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
cport_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_width;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
cport_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_width;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
cport_wmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_wmap;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
cport_wmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	cport_wmap;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
cpp_flags	Makefile	/^cpp_flags := $(KBUILD_CPPFLAGS) $(PLATFORM_CPPFLAGS) $(UBOOTINCLUDE) \\$/;"	m
cppar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cppar1;$/;"	m	struct:par_io	typeref:typename:u32
cppar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cppar2;$/;"	m	struct:par_io	typeref:typename:u32
cppdsr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cppdsr;$/;"	m	struct:ccm_reg	typeref:typename:u32
cppi41dma	arch/arm/dts/am33xx.dtsi	/^			cppi41dma: dma-controller@47402000 {$/;"	l	label:usb
cpr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int cpr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
cpr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 cpr;		\/* 0x0C Cursor Position Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
cpr	arch/m68k/include/asm/immap_5445x.h	/^	u32 cpr;		\/* 0x34 Capabilities Pointer Register *\/$/;"	m	struct:pci	typeref:typename:u32
cpr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cpr;		\/* 0x34 Capabilities Pointer *\/$/;"	m	struct:pci	typeref:typename:u32
cpr1	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cpr1;		\/* Timer1 Capture Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cpr2	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cpr2;		\/* Timer2 Capture Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cpr3	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cpr3;		\/* Timer3 Capture Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cpr4	arch/powerpc/include/asm/immap_83xx.h	/^	u16 cpr4;		\/* Timer4 Capture Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
cprBase	include/video_fb.h	/^    unsigned int cprBase;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
cpsr	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long cpsr;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
cpsr	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	cpsr;$/;"	m	struct:scu_registers	typeref:typename:u32
cpsr	arch/arm/mach-sunxi/board.c	/^	uint32_t cpsr;$/;"	m	struct:fel_stash	typeref:typename:uint32_t	file:
cpsr	drivers/spi/lpc32xx_ssp.c	/^	u32 cpsr;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
cpsw_125mhz_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	cpsw_125mhz_gclk: cpsw_125mhz_gclk {$/;"	l
cpsw_125mhz_gclk	arch/arm/dts/am43xx-clocks.dtsi	/^	cpsw_125mhz_gclk: cpsw_125mhz_gclk {$/;"	l
cpsw_50m_clkdiv	arch/arm/dts/am43xx-clocks.dtsi	/^	cpsw_50m_clkdiv: cpsw_50m_clkdiv {$/;"	l
cpsw_5m_clkdiv	arch/arm/dts/am43xx-clocks.dtsi	/^	cpsw_5m_clkdiv: cpsw_5m_clkdiv {$/;"	l
cpsw_ale_add_mcast	drivers/net/cpsw.c	/^static int cpsw_ale_add_mcast(struct cpsw_priv *priv, const u8 *addr,$/;"	f	typeref:typename:int	file:
cpsw_ale_add_ucast	drivers/net/cpsw.c	/^static int cpsw_ale_add_ucast(struct cpsw_priv *priv, const u8 *addr,$/;"	f	typeref:typename:int	file:
cpsw_ale_clear	drivers/net/cpsw.c	/^#define cpsw_ale_clear(/;"	d	file:
cpsw_ale_control	drivers/net/cpsw.c	/^static inline void cpsw_ale_control(struct cpsw_priv *priv, int bit, int val)$/;"	f	typeref:typename:void	file:
cpsw_ale_enable	drivers/net/cpsw.c	/^#define cpsw_ale_enable(/;"	d	file:
cpsw_ale_find_ageable	drivers/net/cpsw.c	/^static int cpsw_ale_find_ageable(struct cpsw_priv *priv)$/;"	f	typeref:typename:int	file:
cpsw_ale_get_addr	drivers/net/cpsw.c	/^static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)$/;"	f	file:
cpsw_ale_get_field	drivers/net/cpsw.c	/^static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)$/;"	f	typeref:typename:int	file:
cpsw_ale_match_addr	drivers/net/cpsw.c	/^static int cpsw_ale_match_addr(struct cpsw_priv *priv, const u8 *addr)$/;"	f	typeref:typename:int	file:
cpsw_ale_match_free	drivers/net/cpsw.c	/^static int cpsw_ale_match_free(struct cpsw_priv *priv)$/;"	f	typeref:typename:int	file:
cpsw_ale_port_state	drivers/net/cpsw.c	/^enum cpsw_ale_port_state {$/;"	g	file:
cpsw_ale_port_state	drivers/net/cpsw.c	/^static inline void cpsw_ale_port_state(struct cpsw_priv *priv, int port,$/;"	f	typeref:typename:void	file:
cpsw_ale_read	drivers/net/cpsw.c	/^static int cpsw_ale_read(struct cpsw_priv *priv, int idx, u32 *ale_entry)$/;"	f	typeref:typename:int	file:
cpsw_ale_set_addr	drivers/net/cpsw.c	/^static inline void cpsw_ale_set_addr(u32 *ale_entry, const u8 *addr)$/;"	f	typeref:typename:void	file:
cpsw_ale_set_field	drivers/net/cpsw.c	/^static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,$/;"	f	typeref:typename:void	file:
cpsw_ale_vlan_aware	drivers/net/cpsw.c	/^#define cpsw_ale_vlan_aware(/;"	d	file:
cpsw_ale_write	drivers/net/cpsw.c	/^static int cpsw_ale_write(struct cpsw_priv *priv, int idx, u32 *ale_entry)$/;"	f	typeref:typename:int	file:
cpsw_am33xx_cm_get_macid	drivers/net/cpsw-common.c	/^static int cpsw_am33xx_cm_get_macid(struct udevice *dev, u16 offset, int slave,$/;"	f	typeref:typename:int	file:
cpsw_base	include/cpsw.h	/^	u32	cpsw_base;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
cpsw_control	board/BuR/common/common.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/birdland/bav335x/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/bosch/shc/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/compulab/cm_t335/cm_t335.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/compulab/cm_t43/cm_t43.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/gumstix/pepper/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/isee/igep0033/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/phytec/pcm051/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/siemens/draco/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/siemens/pxm2/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/siemens/rut/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/silica/pengwyn/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/tcl/sl50/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/ti/am335x/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/ti/am43xx/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/ti/am57xx/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/ti/dra7xx/evm.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/ti/ti814x/evm.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_control	board/vscom/baltos/board.c	/^static void cpsw_control(int enabled)$/;"	f	typeref:typename:void	file:
cpsw_cpts_rft_clk	arch/arm/dts/am33xx-clocks.dtsi	/^	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {$/;"	l
cpsw_cpts_rft_clk	arch/arm/dts/am43xx-clocks.dtsi	/^	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {$/;"	l
cpsw_data	board/BuR/common/common.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/birdland/bav335x/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/bosch/shc/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/compulab/cm_t335/cm_t335.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/compulab/cm_t43/cm_t43.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/gumstix/pepper/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/isee/igep0033/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/phytec/pcm051/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/siemens/draco/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/siemens/pxm2/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/siemens/rut/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/silica/pengwyn/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/tcl/sl50/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/ti/am335x/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/ti/am43xx/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/ti/am57xx/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/ti/dra7xx/evm.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/ti/ti814x/evm.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_data	board/vscom/baltos/board.c	/^static struct cpsw_platform_data cpsw_data = {$/;"	v	typeref:struct:cpsw_platform_data	file:
cpsw_default	arch/arm/dts/am335x-bone-common.dtsi	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am335x-draco.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am335x-evm.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am335x-evmsk.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am335x-icev2.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am335x-pxm2.dtsi	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am335x-rut.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am437x-gp-evm.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am437x-idk-evm.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am437x-sk-evm.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/am43x-epos-evm.dts	/^		cpsw_default: cpsw_default {$/;"	l
cpsw_default	arch/arm/dts/dra7-evm.dts	/^	cpsw_default: cpsw_default {$/;"	l
cpsw_emac0	arch/arm/dts/am33xx.dtsi	/^			cpsw_emac0: slave@4a100200 {$/;"	l	label:mac
cpsw_emac0	arch/arm/dts/am4372.dtsi	/^			cpsw_emac0: slave@4a100200 {$/;"	l	label:mac
cpsw_emac0	arch/arm/dts/dra7.dtsi	/^			cpsw_emac0: slave@48480200 {$/;"	l	label:mac
cpsw_emac1	arch/arm/dts/am33xx.dtsi	/^			cpsw_emac1: slave@4a100300 {$/;"	l	label:mac
cpsw_emac1	arch/arm/dts/am4372.dtsi	/^			cpsw_emac1: slave@4a100300 {$/;"	l	label:mac
cpsw_emac1	arch/arm/dts/dra7.dtsi	/^			cpsw_emac1: slave@48480300 {$/;"	l	label:mac
cpsw_eth_free_pkt	drivers/net/cpsw.c	/^static int cpsw_eth_free_pkt(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
cpsw_eth_ids	drivers/net/cpsw.c	/^static const struct udevice_id cpsw_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cpsw_eth_ofdata_to_platdata	drivers/net/cpsw.c	/^static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpsw_eth_ops	drivers/net/cpsw.c	/^static const struct eth_ops cpsw_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
cpsw_eth_probe	drivers/net/cpsw.c	/^static int cpsw_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpsw_eth_recv	drivers/net/cpsw.c	/^static int cpsw_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
cpsw_eth_send	drivers/net/cpsw.c	/^static int cpsw_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
cpsw_eth_start	drivers/net/cpsw.c	/^static int cpsw_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpsw_eth_stop	drivers/net/cpsw.c	/^static void cpsw_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
cpsw_get_addr_by_node	drivers/net/cpsw.c	/^static inline fdt_addr_t cpsw_get_addr_by_node(const void *fdt, int node)$/;"	f	typeref:typename:fdt_addr_t	file:
cpsw_get_slave_port	drivers/net/cpsw.c	/^static inline u32  cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)$/;"	f	typeref:typename:u32	file:
cpsw_gmii_sel_am3352	drivers/net/cpsw.c	/^static void cpsw_gmii_sel_am3352(struct cpsw_priv *priv,$/;"	f	typeref:typename:void	file:
cpsw_gmii_sel_dra7xx	drivers/net/cpsw.c	/^static void cpsw_gmii_sel_dra7xx(struct cpsw_priv *priv,$/;"	f	typeref:typename:void	file:
cpsw_halt	drivers/net/cpsw.c	/^static void cpsw_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
cpsw_host_regs	drivers/net/cpsw.c	/^struct cpsw_host_regs {$/;"	s	file:
cpsw_init	drivers/net/cpsw.c	/^static int cpsw_init(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
cpsw_mdio_init	drivers/net/cpsw.c	/^static void cpsw_mdio_init(const char *name, u32 mdio_base, u32 div)$/;"	f	typeref:typename:void	file:
cpsw_mdio_read	drivers/net/cpsw.c	/^static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,$/;"	f	typeref:typename:int	file:
cpsw_mdio_regs	drivers/net/cpsw.c	/^struct cpsw_mdio_regs {$/;"	s	file:
cpsw_mdio_write	drivers/net/cpsw.c	/^static int cpsw_mdio_write(struct mii_dev *bus, int phy_id, int dev_addr,$/;"	f	typeref:typename:int	file:
cpsw_phy_init	drivers/net/cpsw.c	/^static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave)$/;"	f	typeref:typename:int	file:
cpsw_phy_sel	drivers/net/cpsw.c	/^static void cpsw_phy_sel(struct cpsw_priv *priv, const char *compat,$/;"	f	typeref:typename:void	file:
cpsw_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	cpsw_pins_default: cpsw_pins_default {$/;"	l
cpsw_pins_sleep	arch/arm/dts/am57xx-beagle-x15.dts	/^	cpsw_pins_sleep: cpsw_pins_sleep {$/;"	l
cpsw_platform_data	include/cpsw.h	/^struct cpsw_platform_data {$/;"	s
cpsw_priv	drivers/net/cpsw.c	/^struct cpsw_priv {$/;"	s	file:
cpsw_recv	drivers/net/cpsw.c	/^static int cpsw_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
cpsw_register	drivers/net/cpsw.c	/^int cpsw_register(struct cpsw_platform_data *data)$/;"	f	typeref:typename:int
cpsw_regs	drivers/net/cpsw.c	/^struct cpsw_regs {$/;"	s	file:
cpsw_send	drivers/net/cpsw.c	/^static int cpsw_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
cpsw_set_slave_mac	drivers/net/cpsw.c	/^static void cpsw_set_slave_mac(struct cpsw_slave *slave,$/;"	f	typeref:typename:void	file:
cpsw_slave	board/compulab/cm_t335/cm_t335.c	/^static struct cpsw_slave_data cpsw_slave = {$/;"	v	typeref:struct:cpsw_slave_data	file:
cpsw_slave	drivers/net/cpsw.c	/^struct cpsw_slave {$/;"	s	file:
cpsw_slave_data	include/cpsw.h	/^struct cpsw_slave_data {$/;"	s
cpsw_slave_init	drivers/net/cpsw.c	/^static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)$/;"	f	typeref:typename:void	file:
cpsw_slave_regs	drivers/net/cpsw.c	/^struct cpsw_slave_regs {$/;"	s	file:
cpsw_slave_setup	drivers/net/cpsw.c	/^static void cpsw_slave_setup(struct cpsw_slave *slave, int slave_num,$/;"	f	typeref:typename:void	file:
cpsw_slave_update_link	drivers/net/cpsw.c	/^static void cpsw_slave_update_link(struct cpsw_slave *slave,$/;"	f	typeref:typename:void	file:
cpsw_slaves	board/BuR/common/common.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/birdland/bav335x/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/bosch/shc/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/compulab/cm_t43/cm_t43.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/gumstix/pepper/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/isee/igep0033/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/phytec/pcm051/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/siemens/draco/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/siemens/pxm2/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/siemens/rut/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/silica/pengwyn/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/tcl/sl50/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/ti/am335x/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/ti/am43xx/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/ti/am57xx/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/ti/dra7xx/evm.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/ti/ti814x/evm.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_slaves	board/vscom/baltos/board.c	/^static struct cpsw_slave_data cpsw_slaves[] = {$/;"	v	typeref:struct:cpsw_slave_data[]	file:
cpsw_sleep	arch/arm/dts/am335x-bone-common.dtsi	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am335x-draco.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am335x-evm.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am335x-evmsk.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am335x-icev2.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am335x-pxm2.dtsi	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am335x-rut.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am437x-gp-evm.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am437x-idk-evm.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am437x-sk-evm.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/am43x-epos-evm.dts	/^		cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sleep	arch/arm/dts/dra7-evm.dts	/^	cpsw_sleep: cpsw_sleep {$/;"	l
cpsw_sliver_regs	drivers/net/cpsw.c	/^struct cpsw_sliver_regs {$/;"	s	file:
cpsw_update_link	drivers/net/cpsw.c	/^static int cpsw_update_link(struct cpsw_priv *priv)$/;"	f	typeref:typename:int	file:
cpswclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cpswclkstctrl;	\/* offset 0x144 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
cpswclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int cpswclkstctrl;	\/* offset 0xB00 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
cpt_pm_init	arch/x86/cpu/ivybridge/lpc.c	/^static void cpt_pm_init(struct udevice *pch)$/;"	f	typeref:typename:void	file:
cpu	arch/arm/dts/am4372.dtsi	/^		cpu: cpu@0 {$/;"	l
cpu	arch/arm/dts/sun4i-a10.dtsi	/^		cpu: cpu@01c20054 {$/;"	l
cpu	arch/arm/dts/sun50i-a64.dtsi	/^		cpu: cpu_clk@1c20050 {$/;"	l
cpu	arch/arm/dts/sun5i.dtsi	/^		cpu: cpu@01c20054 {$/;"	l
cpu	arch/arm/dts/sun6i-a31.dtsi	/^		cpu: cpu@01c20050 {$/;"	l
cpu	arch/arm/dts/sun7i-a20.dtsi	/^		cpu: cpu@01c20054 {$/;"	l
cpu	arch/arm/dts/sun8i-a23-a33.dtsi	/^		cpu: cpu_clk@01c20050 {$/;"	l
cpu	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	struct sunxi_cpucfg_cpu cpu[4];		\/* 0x040 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:struct:sunxi_cpucfg_cpu[4]
cpu	arch/arm/include/asm/arch/cpucfg.h	/^	struct sunxi_cpucfg_cpu cpu[4];		\/* 0x040 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:struct:sunxi_cpucfg_cpu[4]
cpu	arch/nios2/dts/10m50_devboard.dts	/^		cpu: cpu@0 {$/;"	l
cpu	arch/nios2/dts/3c120_devboard.dts	/^		cpu: cpu@0x0 {$/;"	l
cpu	arch/powerpc/include/asm/global_data.h	/^	void *cpu;$/;"	m	struct:arch_global_data	typeref:typename:void *
cpu	drivers/net/mvpp2.c	/^	int cpu;$/;"	m	struct:mvpp2_txq_pcpu	typeref:typename:int	file:
cpu0	arch/arm/dts/dra72x.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/dra74x.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/hi6220.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/imx6q.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/imx6ull.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/meson-gxbb.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/rk3036.dtsi	/^		cpu0: cpu@f00 {$/;"	l
cpu0	arch/arm/dts/rk3288.dtsi	/^		cpu0: cpu@500 {$/;"	l
cpu0	arch/arm/dts/sun4i-a10.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/sun5i.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/sun6i-a31.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/sun7i-a20.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/sun9i-a80.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/uniphier-ld11.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0	arch/arm/dts/uniphier-ld20.dtsi	/^		cpu0: cpu@0 {$/;"	l
cpu0_cfg	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpu0_cfg;		\/* 0x010 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu0_cfg	arch/arm/include/asm/arch/prcm.h	/^	u32 cpu0_cfg;		\/* 0x010 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu1	arch/arm/dts/hi6220.dtsi	/^		cpu1: cpu@1 {$/;"	l
cpu1	arch/arm/dts/meson-gxbb.dtsi	/^		cpu1: cpu@1 {$/;"	l
cpu1	arch/arm/dts/rk3036.dtsi	/^		cpu1: cpu@f01 {$/;"	l
cpu1	arch/arm/dts/sun9i-a80.dtsi	/^		cpu1: cpu@1 {$/;"	l
cpu1	arch/arm/dts/uniphier-ld11.dtsi	/^		cpu1: cpu@1 {$/;"	l
cpu1	arch/arm/dts/uniphier-ld20.dtsi	/^		cpu1: cpu@1 {$/;"	l
cpu1_cfg	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpu1_cfg;		\/* 0x014 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu1_cfg	arch/arm/include/asm/arch/prcm.h	/^	u32 cpu1_cfg;		\/* 0x014 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu1_csr	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 cpu1_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu1_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cpu1_csr;		\/* offset 0x18 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu1_csr	arch/arm/include/asm/arch-tegra20/flow.h	/^	u32	cpu1_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu1_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cpu1_csr;		\/* offset 0x18 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu1_csr	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 cpu1_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu1_pwr_clamp	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 cpu1_pwr_clamp;	\/* 0x1b0 sun7i only *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cpu1_pwr_clamp	arch/arm/include/asm/arch/cpucfg.h	/^	u32 cpu1_pwr_clamp;	\/* 0x1b0 sun7i only *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cpu1_pwroff	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 cpu1_pwroff;	\/* 0x1b4 sun7i only *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cpu1_pwroff	arch/arm/include/asm/arch/cpucfg.h	/^	u32 cpu1_pwroff;	\/* 0x1b4 sun7i only *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
cpu2	arch/arm/dts/hi6220.dtsi	/^		cpu2: cpu@2 {$/;"	l
cpu2	arch/arm/dts/meson-gxbb.dtsi	/^		cpu2: cpu@2 {$/;"	l
cpu2	arch/arm/dts/sun9i-a80.dtsi	/^		cpu2: cpu@2 {$/;"	l
cpu2	arch/arm/dts/uniphier-ld20.dtsi	/^		cpu2: cpu@100 {$/;"	l
cpu2_cfg	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpu2_cfg;		\/* 0x018 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu2_cfg	arch/arm/include/asm/arch/prcm.h	/^	u32 cpu2_cfg;		\/* 0x018 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu2_csr	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 cpu2_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu2_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cpu2_csr;		\/* offset 0x20 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu2_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cpu2_csr;		\/* offset 0x20 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu2_csr	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 cpu2_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu3	arch/arm/dts/hi6220.dtsi	/^		cpu3: cpu@3 {$/;"	l
cpu3	arch/arm/dts/meson-gxbb.dtsi	/^		cpu3: cpu@3 {$/;"	l
cpu3	arch/arm/dts/sun9i-a80.dtsi	/^		cpu3: cpu@3 {$/;"	l
cpu3	arch/arm/dts/uniphier-ld20.dtsi	/^		cpu3: cpu@101 {$/;"	l
cpu3_cfg	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpu3_cfg;		\/* 0x01c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu3_cfg	arch/arm/include/asm/arch/prcm.h	/^	u32 cpu3_cfg;		\/* 0x01c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu3_csr	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 cpu3_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu3_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cpu3_csr;		\/* offset 0x28 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu3_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cpu3_csr;		\/* offset 0x28 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu3_csr	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 cpu3_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu4	arch/arm/dts/hi6220.dtsi	/^		cpu4: cpu@100 {$/;"	l
cpu4	arch/arm/dts/sun9i-a80.dtsi	/^		cpu4: cpu@100 {$/;"	l
cpu5	arch/arm/dts/hi6220.dtsi	/^		cpu5: cpu@101 {$/;"	l
cpu5	arch/arm/dts/sun9i-a80.dtsi	/^		cpu5: cpu@101 {$/;"	l
cpu6	arch/arm/dts/hi6220.dtsi	/^		cpu6: cpu@102 {$/;"	l
cpu6	arch/arm/dts/sun9i-a80.dtsi	/^		cpu6: cpu@102 {$/;"	l
cpu7	arch/arm/dts/hi6220.dtsi	/^		cpu7: cpu@103 {$/;"	l
cpu7	arch/arm/dts/sun9i-a80.dtsi	/^		cpu7: cpu@103 {$/;"	l
cpu_1x_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	cpu_6or4x_clk, cpu_3or2x_clk, cpu_2x_clk, cpu_1x_clk,$/;"	e	enum:zynq_clk
cpu_2x_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	cpu_6or4x_clk, cpu_3or2x_clk, cpu_2x_clk, cpu_1x_clk,$/;"	e	enum:zynq_clk
cpu_3or2x_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	cpu_6or4x_clk, cpu_3or2x_clk, cpu_2x_clk, cpu_1x_clk,$/;"	e	enum:zynq_clk
cpu_6or4x_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	cpu_6or4x_clk, cpu_3or2x_clk, cpu_2x_clk, cpu_1x_clk,$/;"	e	enum:zynq_clk
cpu_ahb_apb0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 cpu_ahb_apb0_cfg;	\/* 0x54 cpu,ahb and apb0 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_ahb_apb0_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 cpu_ahb_apb0_cfg;	\/* 0x54 cpu,ahb and apb0 divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_alert0	arch/arm/dts/omap4-cpu-thermal.dtsi	/^                cpu_alert0: cpu_alert {$/;"	l	label:cpu_thermal.cpu_trips
cpu_alert0	arch/arm/dts/rk3288-thermal.dtsi	/^		cpu_alert0: cpu_alert0 {$/;"	l	label:cpu_thermal
cpu_alert0	arch/arm/dts/sun4i-a10.dtsi	/^				cpu_alert0: cpu_alert0 {$/;"	l
cpu_alert0	arch/arm/dts/sun5i-a13.dtsi	/^				cpu_alert0: cpu_alert0 {$/;"	l
cpu_alert0	arch/arm/dts/sun6i-a31.dtsi	/^				cpu_alert0: cpu_alert0 {$/;"	l
cpu_alert0	arch/arm/dts/sun7i-a20.dtsi	/^				cpu_alert0: cpu_alert0 {$/;"	l
cpu_alert1	arch/arm/dts/am57xx-beagle-x15.dts	/^	cpu_alert1: cpu_alert1 {$/;"	l
cpu_alert1	arch/arm/dts/rk3288-thermal.dtsi	/^		cpu_alert1: cpu_alert1 {$/;"	l	label:cpu_thermal
cpu_attrib	arch/arm/mach-mvebu/include/mach/cpu.h	/^enum cpu_attrib {$/;"	g
cpu_axi_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 cpu_axi_cfg;	\/* 0x50 CPU\/AXI divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_axi_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 cpu_axi_cfg;	\/* 0x50 CPU\/AXI divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_axi_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 cpu_axi_cfg;	\/* 0x50 CPU\/AXI divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_axi_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 cpu_axi_cfg;	\/* 0x50 CPU\/AXI divide ratio *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_b0	arch/arm/dts/rk3399.dtsi	/^		cpu_b0: cpu@100 {$/;"	l
cpu_b1	arch/arm/dts/rk3399.dtsi	/^		cpu_b1: cpu@101 {$/;"	l
cpu_backlight	drivers/video/broadwell_igd.c	/^	int cpu_backlight;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
cpu_broadwell_priv	arch/x86/cpu/broadwell/cpu.c	/^struct cpu_broadwell_priv {$/;"	s	file:
cpu_bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 cpu_bwcr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cpu_bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 cpu_bwcr;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cpu_cache_initialization	arch/arm/cpu/armv7/cpu.c	/^void __weak cpu_cache_initialization(void){}$/;"	f	typeref:typename:void __weak
cpu_call32	arch/x86/cpu/call32.S	/^cpu_call32:$/;"	l
cpu_call64	arch/x86/cpu/call64.S	/^cpu_call64:$/;"	l
cpu_cfg	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 cpu_cfg;$/;"	m	struct:sunxi_timer_reg	typeref:typename:u32
cpu_cfg	arch/arm/include/asm/arch/timer.h	/^	u32 cpu_cfg;$/;"	m	struct:sunxi_timer_reg	typeref:typename:u32
cpu_clk	arch/xtensa/include/asm/global_data.h	/^	unsigned long cpu_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
cpu_clk	include/asm-generic/global_data.h	/^	unsigned long cpu_clk;		\/* CPU clock in Hz!		*\/$/;"	m	struct:global_data	typeref:typename:unsigned long
cpu_clk_rate_hz	arch/arm/include/asm/global_data.h	/^	unsigned long	cpu_clk_rate_hz;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
cpu_clk_source	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 cpu_clk_source;	\/* 0x50 cpu clk source configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_clk_source	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 cpu_clk_source;	\/* 0x50 cpu clk source configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
cpu_cmd	cmd/mp.c	/^cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
cpu_common_init	arch/x86/cpu/intel_common/cpu.c	/^int cpu_common_init(void)$/;"	f	typeref:typename:int
cpu_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 cpu_con[3];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[3]
cpu_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 cpu_con[5];$/;"	m	struct:rk3288_grf	typeref:typename:u32[5]
cpu_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 cpu_con[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
cpu_con0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int cpu_con0;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
cpu_con1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int cpu_con1;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
cpu_con2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int cpu_con2;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
cpu_con3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int cpu_con3;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
cpu_conf	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 cpu_conf;		\/* CPU Conf Reg *\/$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
cpu_config_tdp_levels	arch/x86/cpu/broadwell/cpu.c	/^int cpu_config_tdp_levels(void)$/;"	f	typeref:typename:int
cpu_config_tdp_levels	arch/x86/cpu/ivybridge/model_206ax.c	/^int cpu_config_tdp_levels(void)$/;"	f	typeref:typename:int
cpu_cooling_maps	arch/arm/dts/omap4-cpu-thermal.dtsi	/^	cpu_cooling_maps: cooling-maps {$/;"	l	label:cpu_thermal
cpu_core_init	arch/x86/cpu/broadwell/cpu.c	/^static void cpu_core_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
cpu_crit	arch/arm/dts/omap4-cpu-thermal.dtsi	/^                cpu_crit: cpu_crit {$/;"	l	label:cpu_thermal.cpu_trips
cpu_crit	arch/arm/dts/rk3288-thermal.dtsi	/^		cpu_crit: cpu_crit {$/;"	l	label:cpu_thermal
cpu_crit	arch/arm/dts/sun4i-a10.dtsi	/^				cpu_crit: cpu_crit {$/;"	l
cpu_crit	arch/arm/dts/sun5i-a13.dtsi	/^				cpu_crit: cpu_crit {$/;"	l
cpu_crit	arch/arm/dts/sun6i-a31.dtsi	/^				cpu_crit: cpu_crit {$/;"	l
cpu_crit	arch/arm/dts/sun7i-a20.dtsi	/^				cpu_crit: cpu_crit {$/;"	l
cpu_csr	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 cpu_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cpu_csr;		\/* offset 0x08 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_csr	arch/arm/include/asm/arch-tegra20/flow.h	/^	u32	cpu_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cpu_csr;		\/* offset 0x08 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_csr	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 cpu_csr;$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_ctrl_mask	arch/arm/cpu/armv7/mx6/mp.c	/^static uint32_t cpu_ctrl_mask[MAX_CPUS] = {$/;"	v	typeref:typename:uint32_t[]	file:
cpu_data	arch/avr32/include/asm/processor.h	/^#define cpu_data /;"	d
cpu_ddr_ratios	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u32 cpu_ddr_ratios[FAB_OPT][CLK_CPU] =$/;"	v	typeref:typename:u32[][]
cpu_device_id	arch/x86/cpu/cpu.c	/^struct cpu_device_id {$/;"	s	file:
cpu_disable	arch/arm/cpu/armv7/mx6/mp.c	/^int cpu_disable(int nr)$/;"	f	typeref:typename:int
cpu_disable	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int cpu_disable(int nr)$/;"	f	typeref:typename:int
cpu_disable	arch/arm/cpu/armv8/zynqmp/mp.c	/^int cpu_disable(int nr)$/;"	f	typeref:typename:int
cpu_disable	arch/powerpc/cpu/mpc85xx/mp.c	/^int cpu_disable(int nr)$/;"	f	typeref:typename:int
cpu_disable	arch/powerpc/cpu/mpc86xx/mp.c	/^int cpu_disable(int nr)$/;"	f	typeref:typename:int
cpu_disable_paging_pae	arch/x86/cpu/cpu.c	/^void cpu_disable_paging_pae(void)$/;"	f	typeref:typename:void
cpu_dsp_mask	arch/powerpc/cpu/mpc8xxx/cpu.c	/^__weak u32 cpu_dsp_mask(void)$/;"	f	typeref:typename:__weak u32
cpu_dspi_claim_bus	drivers/spi/fsl_dspi.c	/^__weak int cpu_dspi_claim_bus(uint bus, uint cs)$/;"	f	typeref:typename:__weak int
cpu_dspi_port_conf	drivers/spi/fsl_dspi.c	/^__weak void cpu_dspi_port_conf(void)$/;"	f	typeref:typename:__weak void
cpu_dspi_release_bus	drivers/spi/fsl_dspi.c	/^__weak void cpu_dspi_release_bus(uint bus, uint cs)$/;"	f	typeref:typename:__weak void
cpu_early_init	arch/powerpc/cpu/mpc512x/start.S	/^cpu_early_init:$/;"	l
cpu_enable_paging_pae	arch/x86/cpu/cpu.c	/^void cpu_enable_paging_pae(ulong cr3)$/;"	f	typeref:typename:void
cpu_eth_init	arch/arm/cpu/arm1136/mx35/generic.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/arm926ejs/lpc32xx/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/arm926ejs/mx25/generic.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/arm926ejs/mx27/generic.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/armv7/ls102xa/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/armv7/omap3/emac.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/armv7/vf610/generic.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/cpu/armv8/s32v234/generic.c	/^int cpu_eth_init(bd_t * bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/imx-common/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/mach-davinci/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/mach-kirkwood/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/mach-orion5x/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/arm/mach-rmobile/emac.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/m68k/cpu/mcf523x/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/m68k/cpu/mcf52x2/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/m68k/cpu/mcf532x/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/m68k/cpu/mcf5445x/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/m68k/cpu/mcf547x_8x/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/mips/mach-au1x00/au1x00_eth.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/mpc512x/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/mpc5xxx/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/mpc8260/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/mpc83xx/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/mpc8xx/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/mpc8xxx/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/powerpc/cpu/ppc4xx/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/sh/cpu/sh4/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/sparc/cpu/leon2/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_eth_init	arch/sparc/cpu/leon3/cpu.c	/^int cpu_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_fab_clk_to_hclk	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u32 cpu_fab_clk_to_hclk[FAB_OPT][CLK_CPU] =$/;"	v	typeref:typename:u32[][]
cpu_feature_name	cmd/cpu.c	/^static const char *cpu_feature_name[CPU_FEAT_COUNT] = {$/;"	v	typeref:typename:const char * []	file:
cpu_force	include/grlib/irqmp.h	/^	volatile unsigned int cpu_force[16];$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int[16]
cpu_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 cpu_freq;		\/* offset 0x0 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
cpu_freq	arch/mips/mach-ath79/ar934x/clk.c	/^	u16				cpu_freq;$/;"	m	struct:ar934x_clock_config	typeref:typename:u16	file:
cpu_freq	arch/sparc/cpu/leon3/cpu.c	/^int cpu_freq(void)$/;"	f	typeref:typename:int
cpu_freq	drivers/ddr/marvell/a38x/ddr3_init.c	/^	u8 cpu_freq;$/;"	m	struct:dram_modes	typeref:typename:u8	file:
cpu_freq	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u8 cpu_freq;$/;"	m	struct:dram_modes	typeref:typename:u8
cpu_freq	include/cpu.h	/^	ulong cpu_freq;$/;"	m	struct:cpu_info	typeref:typename:ulong
cpu_fwd_bpdu_cfg	include/vsc9953.h	/^	u32	cpu_fwd_bpdu_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
cpu_fwd_ccm_cfg	include/vsc9953.h	/^	u32	cpu_fwd_ccm_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
cpu_fwd_cfg	include/vsc9953.h	/^	u32	cpu_fwd_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
cpu_fwd_garp_cfg	include/vsc9953.h	/^	u32	cpu_fwd_garp_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
cpu_get_count	drivers/cpu/cpu-uclass.c	/^int cpu_get_count(struct udevice *dev)$/;"	f	typeref:typename:int
cpu_get_desc	drivers/cpu/cpu-uclass.c	/^int cpu_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int
cpu_get_family_model	arch/x86/cpu/cpu.c	/^u32 cpu_get_family_model(void)$/;"	f	typeref:typename:u32
cpu_get_info	drivers/cpu/cpu-uclass.c	/^int cpu_get_info(struct udevice *dev, struct cpu_info *info)$/;"	f	typeref:typename:int
cpu_get_name	arch/x86/cpu/cpu.c	/^char *cpu_get_name(char *name)$/;"	f	typeref:typename:char *
cpu_get_ops	include/cpu.h	/^#define cpu_get_ops(/;"	d
cpu_get_sp	arch/x86/include/asm/processor.h	/^static inline ulong cpu_get_sp(void)$/;"	f	typeref:typename:ulong
cpu_get_stepping	arch/x86/cpu/cpu.c	/^u32 cpu_get_stepping(void)$/;"	f	typeref:typename:u32
cpu_get_vendor	drivers/cpu/cpu-uclass.c	/^int cpu_get_vendor(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int
cpu_group_map	include/vsc9953.h	/^	u32	cpu_group_map;$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32
cpu_has_64bit	arch/x86/cpu/cpu.c	/^int cpu_has_64bit(void)$/;"	f	typeref:typename:int
cpu_has_64bit_addresses	arch/mips/include/asm/cpu-features.h	/^# define cpu_has_64bit_addresses	/;"	d
cpu_has_64bits	arch/mips/include/asm/cpu-features.h	/^# define cpu_has_64bits	/;"	d
cpu_help_text	cmd/mp.c	/^static char cpu_help_text[] =$/;"	v	typeref:typename:char[]	file:
cpu_hlt	arch/x86/include/asm/processor.h	/^static inline __attribute__((always_inline)) void cpu_hlt(void)$/;"	f	typeref:typename:void
cpu_hwconfig	common/hwconfig.c	/^const char cpu_hwconfig[] __attribute__((weak)) = "";$/;"	v	typeref:typename:const char[]
cpu_hz	arch/avr32/include/asm/global_data.h	/^	unsigned long cpu_hz;		\/* cpu core clock frequency *\/$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
cpu_id	include/cpu.h	/^	int cpu_id;$/;"	m	struct:cpu_platdata	typeref:typename:int
cpu_info	include/cpu.h	/^struct cpu_info {$/;"	s
cpu_init	arch/sh/cpu/sh2/cpu.c	/^int cpu_init(void)$/;"	f	typeref:typename:int
cpu_init	arch/sh/cpu/sh3/cpu.c	/^int cpu_init(void)$/;"	f	typeref:typename:int
cpu_init	arch/sh/cpu/sh4/cpu.c	/^int cpu_init (void)$/;"	f	typeref:typename:int
cpu_init_crit	arch/arm/cpu/arm1136/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/arm1176/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/arm720t/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/arm920t/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/arm926ejs/spear/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/arm926ejs/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/arm946es/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/pxa/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/arm/cpu/sa1100/start.S	/^cpu_init_crit:$/;"	l
cpu_init_crit	arch/nds32/cpu/n1213/start.S	/^cpu_init_crit:$/;"	l
cpu_init_early_f	arch/powerpc/cpu/mpc85xx/cpu_init_early.c	/^void cpu_init_early_f(void *fdt)$/;"	f	typeref:typename:void
cpu_init_f	arch/blackfin/cpu/cpu.c	/^void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf5227x/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf523x/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf52x2/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf530x/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf532x/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf5445x/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/m68k/cpu/mcf547x_8x/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc512x/cpu_init.c	/^void cpu_init_f (volatile immap_t * im)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc5xx/cpu_init.c	/^void cpu_init_f (volatile immap_t * immr)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc5xxx/cpu_init.c	/^void cpu_init_f (void)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc8260/cpu_init.c	/^void cpu_init_f (volatile immap_t * immr)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^void cpu_init_f (volatile immap_t * im)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc83xx/spl_minimal.c	/^void cpu_init_f (volatile immap_t * im)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^ulong cpu_init_f(void)$/;"	f	typeref:typename:ulong
cpu_init_f	arch/powerpc/cpu/mpc85xx/spl_minimal.c	/^ulong cpu_init_f(void)$/;"	f	typeref:typename:ulong
cpu_init_f	arch/powerpc/cpu/mpc86xx/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/mpc8xx/cpu_init.c	/^void cpu_init_f (volatile immap_t * immr)$/;"	f	typeref:typename:void
cpu_init_f	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^cpu_init_f (void)$/;"	f	typeref:typename:void
cpu_init_f	arch/sparc/cpu/leon2/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_f	arch/sparc/cpu/leon3/cpu_init.c	/^void cpu_init_f(void)$/;"	f	typeref:typename:void
cpu_init_interrupts	arch/x86/cpu/interrupts.c	/^int cpu_init_interrupts(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf5227x/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf523x/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf52x2/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf530x/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf532x/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf5445x/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/m68k/cpu/mcf547x_8x/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc512x/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc5xx/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc5xxx/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc8260/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc86xx/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/mpc8xx/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^int cpu_init_r (void)$/;"	f	typeref:typename:int
cpu_init_r	arch/sparc/cpu/leon2/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/sparc/cpu/leon3/cpu_init.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_r	arch/x86/cpu/cpu.c	/^int cpu_init_r(void)$/;"	f	typeref:typename:int
cpu_init_unreloc	arch/sparc/cpu/leon2/start.S	/^cpu_init_unreloc:$/;"	l
cpu_init_unreloc	arch/sparc/cpu/leon3/start.S	/^cpu_init_unreloc:$/;"	l
cpu_is_at91sam9g15	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define cpu_is_at91sam9g15(/;"	d
cpu_is_at91sam9g25	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define cpu_is_at91sam9g25(/;"	d
cpu_is_at91sam9g35	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define cpu_is_at91sam9g35(/;"	d
cpu_is_at91sam9x25	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define cpu_is_at91sam9x25(/;"	d
cpu_is_at91sam9x35	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define cpu_is_at91sam9x35(/;"	d
cpu_is_at91sam9x5	arch/arm/mach-at91/include/mach/at91sam9x5.h	/^#define cpu_is_at91sam9x5(/;"	d
cpu_is_da830	arch/arm/mach-davinci/include/mach/hardware.h	/^static inline int cpu_is_da830(void)$/;"	f	typeref:typename:int
cpu_is_da850	arch/arm/mach-davinci/include/mach/hardware.h	/^static inline int cpu_is_da850(void)$/;"	f	typeref:typename:int
cpu_is_k2e	arch/arm/mach-keystone/include/mach/hardware.h	/^static inline u8 cpu_is_k2e(void)$/;"	f	typeref:typename:u8
cpu_is_k2g	arch/arm/mach-keystone/include/mach/hardware.h	/^static inline u8 cpu_is_k2g(void)$/;"	f	typeref:typename:u8
cpu_is_k2hk	arch/arm/mach-keystone/include/mach/hardware.h	/^static inline u8 cpu_is_k2hk(void)$/;"	f	typeref:typename:u8
cpu_is_k2l	arch/arm/mach-keystone/include/mach/hardware.h	/^static inline u8 cpu_is_k2l(void)$/;"	f	typeref:typename:u8
cpu_is_le	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^cpu_is_le:$/;"	l
cpu_is_pxa25x	arch/arm/cpu/pxa/cpuinfo.c	/^int cpu_is_pxa25x(void)$/;"	f	typeref:typename:int
cpu_is_pxa27x	arch/arm/cpu/pxa/cpuinfo.c	/^int cpu_is_pxa27x(void)$/;"	f	typeref:typename:int
cpu_is_pxa27xm	arch/arm/cpu/pxa/cpuinfo.c	/^int cpu_is_pxa27xm(void)$/;"	f	typeref:typename:int
cpu_is_sama5d2	arch/arm/mach-at91/include/mach/sama5d2.h	/^#define cpu_is_sama5d2(/;"	d
cpu_is_sama5d2	drivers/net/macb.c	/^#define cpu_is_sama5d2(/;"	d	file:
cpu_is_sama5d3	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define cpu_is_sama5d3(/;"	d
cpu_is_sama5d31	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define cpu_is_sama5d31(/;"	d
cpu_is_sama5d33	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define cpu_is_sama5d33(/;"	d
cpu_is_sama5d34	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define cpu_is_sama5d34(/;"	d
cpu_is_sama5d35	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define cpu_is_sama5d35(/;"	d
cpu_is_sama5d36	arch/arm/mach-at91/include/mach/sama5d3.h	/^#define cpu_is_sama5d36(/;"	d
cpu_is_sama5d4	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define cpu_is_sama5d4(/;"	d
cpu_is_sama5d4	drivers/net/macb.c	/^#define cpu_is_sama5d4(/;"	d	file:
cpu_is_sama5d41	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define cpu_is_sama5d41(/;"	d
cpu_is_sama5d42	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define cpu_is_sama5d42(/;"	d
cpu_is_sama5d43	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define cpu_is_sama5d43(/;"	d
cpu_is_sama5d44	arch/arm/mach-at91/include/mach/sama5d4.h	/^#define cpu_is_sama5d44(/;"	d
cpu_is_ult	arch/x86/cpu/broadwell/pch.c	/^bool cpu_is_ult(void)$/;"	f	typeref:typename:bool
cpu_jump_to_64bit	arch/x86/cpu/cpu.c	/^int cpu_jump_to_64bit(ulong setup_base, ulong target)$/;"	f	typeref:typename:int
cpu_l0	arch/arm/dts/rk3399.dtsi	/^		cpu_l0: cpu@0 {$/;"	l
cpu_l1	arch/arm/dts/rk3399.dtsi	/^		cpu_l1: cpu@1 {$/;"	l
cpu_l2	arch/arm/dts/rk3399.dtsi	/^		cpu_l2: cpu@2 {$/;"	l
cpu_l2c_spd	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 cpu_l2c_spd;	\/* CPU L2cache Speed Conf *\/$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
cpu_l3	arch/arm/dts/rk3399.dtsi	/^		cpu_l3: cpu@3 {$/;"	l
cpu_map	arch/x86/cpu/mp_init.c	/^struct cpu_map {$/;"	s	file:
cpu_mask	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^u32 cpu_mask(void)$/;"	f	typeref:typename:u32
cpu_mask	arch/arm/cpu/armv8/s32v234/cpu.c	/^u32 cpu_mask(void)$/;"	f	typeref:typename:u32
cpu_mask	arch/powerpc/cpu/mpc8xxx/cpu.c	/^__weak u32 cpu_mask(void)$/;"	f	typeref:typename:__weak u32
cpu_mask	board/freescale/qemu-ppce500/qemu-ppce500.c	/^u32 cpu_mask(void)$/;"	f	typeref:typename:u32
cpu_mask	include/grlib/irqmp.h	/^	volatile unsigned int cpu_mask[16];$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int[16]
cpu_mmc_init	arch/arm/cpu/arm1136/mx35/generic.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/cpu/arm926ejs/mx25/generic.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/cpu/arm926ejs/mx27/generic.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/cpu/armv7/am33xx/board.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/cpu/armv7/ls102xa/cpu.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/cpu/armv7/vf610/generic.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/arm/imx-common/cpu.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/avr32/cpu/mmc.c	/^int cpu_mmc_init(bd_t *bd)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/powerpc/cpu/mpc83xx/cpu.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/powerpc/cpu/mpc85xx/cpu.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/x86/cpu/baytrail/valleyview.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/x86/cpu/quark/quark.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	arch/x86/cpu/queensbay/topcliff.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	board/armltd/vexpress/vexpress_common.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	board/bluewater/gurnard/gurnard.c	/^int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
cpu_mmc_init	drivers/mmc/mmc.c	/^__weak int cpu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:__weak int
cpu_modes	arch/avr32/cpu/exception.c	/^static const char * const cpu_modes[8] = {$/;"	v	typeref:typename:const char * const[8]	file:
cpu_mp_lmb_reserve	arch/powerpc/cpu/mpc85xx/mp.c	/^void cpu_mp_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
cpu_mp_lmb_reserve	arch/powerpc/cpu/mpc86xx/mp.c	/^void cpu_mp_lmb_reserve(struct lmb *lmb)$/;"	f	typeref:typename:void
cpu_name	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^void cpu_name(char *name)$/;"	f	typeref:typename:void
cpu_name	arch/arm/mach-rmobile/cpu_info.c	/^	u8 cpu_name[10];$/;"	m	struct:__anon8ce67d240108	typeref:typename:u8[10]	file:
cpu_num_dspcores	arch/powerpc/cpu/mpc8xxx/cpu.c	/^__weak int cpu_num_dspcores(void)$/;"	f	typeref:typename:__weak int
cpu_numcores	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int cpu_numcores(void)$/;"	f	typeref:typename:int
cpu_numcores	arch/arm/cpu/armv8/s32v234/cpu.c	/^int cpu_numcores(void)$/;"	f	typeref:typename:int
cpu_numcores	arch/powerpc/cpu/mpc8xxx/cpu.c	/^__weak int cpu_numcores(void)$/;"	f	typeref:typename:__weak int
cpu_numcores	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int cpu_numcores(void)$/;"	f	typeref:typename:int
cpu_ops	include/cpu.h	/^struct cpu_ops {$/;"	s
cpu_platdata	include/cpu.h	/^struct cpu_platdata {$/;"	s
cpu_pll	arch/mips/mach-ath79/ar934x/clk.c	/^	struct ar934x_pll_config	cpu_pll;$/;"	m	struct:ar934x_clock_config	typeref:struct:ar934x_pll_config	file:
cpu_pos_mask	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^u32 cpu_pos_mask(void)$/;"	f	typeref:typename:u32
cpu_post_andi_s	post/lib_powerpc/andi.c	/^static struct cpu_post_andi_s$/;"	s	file:
cpu_post_andi_size	post/lib_powerpc/andi.c	/^static unsigned int cpu_post_andi_size = ARRAY_SIZE(cpu_post_andi_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_andi_table	post/lib_powerpc/andi.c	/^} cpu_post_andi_table[] =$/;"	v	typeref:struct:cpu_post_andi_s[]
cpu_post_cmp_s	post/lib_powerpc/cmp.c	/^static struct cpu_post_cmp_s$/;"	s	file:
cpu_post_cmp_size	post/lib_powerpc/cmp.c	/^static unsigned int cpu_post_cmp_size = ARRAY_SIZE(cpu_post_cmp_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_cmp_table	post/lib_powerpc/cmp.c	/^} cpu_post_cmp_table[] =$/;"	v	typeref:struct:cpu_post_cmp_s[]
cpu_post_cmpi_s	post/lib_powerpc/cmpi.c	/^static struct cpu_post_cmpi_s$/;"	s	file:
cpu_post_cmpi_size	post/lib_powerpc/cmpi.c	/^static unsigned int cpu_post_cmpi_size = ARRAY_SIZE(cpu_post_cmpi_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_cmpi_table	post/lib_powerpc/cmpi.c	/^} cpu_post_cmpi_table[] =$/;"	v	typeref:struct:cpu_post_cmpi_s[]
cpu_post_complex_1_asm	post/lib_powerpc/asm.S	/^cpu_post_complex_1_asm:$/;"	l
cpu_post_complex_1_done	post/lib_powerpc/asm.S	/^cpu_post_complex_1_done:$/;"	l
cpu_post_complex_1_loop	post/lib_powerpc/asm.S	/^cpu_post_complex_1_loop:$/;"	l
cpu_post_complex_2_asm	post/lib_powerpc/asm.S	/^cpu_post_complex_2_asm:$/;"	l
cpu_post_complex_2_loop	post/lib_powerpc/asm.S	/^cpu_post_complex_2_loop:$/;"	l
cpu_post_cr_s2	post/lib_powerpc/cr.c	/^static struct cpu_post_cr_s2 {$/;"	s	file:
cpu_post_cr_s3	post/lib_powerpc/cr.c	/^static struct cpu_post_cr_s3 {$/;"	s	file:
cpu_post_cr_s4	post/lib_powerpc/cr.c	/^static struct cpu_post_cr_s4 {$/;"	s	file:
cpu_post_cr_size1	post/lib_powerpc/cr.c	/^static unsigned int cpu_post_cr_size1 = ARRAY_SIZE(cpu_post_cr_table1);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_cr_size2	post/lib_powerpc/cr.c	/^static unsigned int cpu_post_cr_size2 = ARRAY_SIZE(cpu_post_cr_table2);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_cr_size3	post/lib_powerpc/cr.c	/^static unsigned int cpu_post_cr_size3 = ARRAY_SIZE(cpu_post_cr_table3);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_cr_size4	post/lib_powerpc/cr.c	/^static unsigned int cpu_post_cr_size4 = ARRAY_SIZE(cpu_post_cr_table4);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_cr_table1	post/lib_powerpc/cr.c	/^static ulong cpu_post_cr_table1[] =$/;"	v	typeref:typename:ulong[]	file:
cpu_post_cr_table2	post/lib_powerpc/cr.c	/^} cpu_post_cr_table2[] =$/;"	v	typeref:struct:cpu_post_cr_s2[]
cpu_post_cr_table3	post/lib_powerpc/cr.c	/^} cpu_post_cr_table3[] =$/;"	v	typeref:struct:cpu_post_cr_s3[]
cpu_post_cr_table4	post/lib_powerpc/cr.c	/^} cpu_post_cr_table4[] =$/;"	v	typeref:struct:cpu_post_cr_s4[]
cpu_post_exec_02	post/lib_powerpc/asm.S	/^cpu_post_exec_02:$/;"	l
cpu_post_exec_04	post/lib_powerpc/asm.S	/^cpu_post_exec_04:$/;"	l
cpu_post_exec_11	post/lib_powerpc/asm.S	/^cpu_post_exec_11:$/;"	l
cpu_post_exec_11w	post/lib_powerpc/asm.S	/^cpu_post_exec_11w:$/;"	l
cpu_post_exec_12	post/lib_powerpc/asm.S	/^cpu_post_exec_12:$/;"	l
cpu_post_exec_12w	post/lib_powerpc/asm.S	/^cpu_post_exec_12w:$/;"	l
cpu_post_exec_21	post/lib_powerpc/asm.S	/^cpu_post_exec_21:$/;"	l
cpu_post_exec_21w	post/lib_powerpc/asm.S	/^cpu_post_exec_21w:$/;"	l
cpu_post_exec_21x	post/lib_powerpc/asm.S	/^cpu_post_exec_21x:$/;"	l
cpu_post_exec_22	post/lib_powerpc/asm.S	/^cpu_post_exec_22:$/;"	l
cpu_post_exec_22w	post/lib_powerpc/asm.S	/^cpu_post_exec_22w:$/;"	l
cpu_post_exec_31	post/lib_powerpc/asm.S	/^cpu_post_exec_31:$/;"	l
cpu_post_load_s	post/lib_powerpc/load.c	/^static struct cpu_post_load_s$/;"	s	file:
cpu_post_load_size	post/lib_powerpc/load.c	/^static unsigned int cpu_post_load_size = ARRAY_SIZE(cpu_post_load_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_load_table	post/lib_powerpc/load.c	/^} cpu_post_load_table[] =$/;"	v	typeref:struct:cpu_post_load_s[]
cpu_post_makecr	post/lib_powerpc/cpu.c	/^ulong cpu_post_makecr (long v)$/;"	f	typeref:typename:ulong
cpu_post_rlwimi_s	post/lib_powerpc/rlwimi.c	/^static struct cpu_post_rlwimi_s$/;"	s	file:
cpu_post_rlwimi_size	post/lib_powerpc/rlwimi.c	/^static unsigned int cpu_post_rlwimi_size = ARRAY_SIZE(cpu_post_rlwimi_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_rlwimi_table	post/lib_powerpc/rlwimi.c	/^} cpu_post_rlwimi_table[] =$/;"	v	typeref:struct:cpu_post_rlwimi_s[]
cpu_post_rlwinm_s	post/lib_powerpc/rlwinm.c	/^static struct cpu_post_rlwinm_s$/;"	s	file:
cpu_post_rlwinm_size	post/lib_powerpc/rlwinm.c	/^static unsigned int cpu_post_rlwinm_size = ARRAY_SIZE(cpu_post_rlwinm_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_rlwinm_table	post/lib_powerpc/rlwinm.c	/^} cpu_post_rlwinm_table[] =$/;"	v	typeref:struct:cpu_post_rlwinm_s[]
cpu_post_rlwnm_s	post/lib_powerpc/rlwnm.c	/^static struct cpu_post_rlwnm_s$/;"	s	file:
cpu_post_rlwnm_size	post/lib_powerpc/rlwnm.c	/^static unsigned int cpu_post_rlwnm_size = ARRAY_SIZE(cpu_post_rlwnm_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_rlwnm_table	post/lib_powerpc/rlwnm.c	/^} cpu_post_rlwnm_table[] =$/;"	v	typeref:struct:cpu_post_rlwnm_s[]
cpu_post_srawi_s	post/lib_powerpc/srawi.c	/^static struct cpu_post_srawi_s$/;"	s	file:
cpu_post_srawi_size	post/lib_powerpc/srawi.c	/^static unsigned int cpu_post_srawi_size = ARRAY_SIZE(cpu_post_srawi_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_srawi_table	post/lib_powerpc/srawi.c	/^} cpu_post_srawi_table[] =$/;"	v	typeref:struct:cpu_post_srawi_s[]
cpu_post_store_s	post/lib_powerpc/store.c	/^static struct cpu_post_store_s$/;"	s	file:
cpu_post_store_size	post/lib_powerpc/store.c	/^static unsigned int cpu_post_store_size = ARRAY_SIZE(cpu_post_store_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_store_table	post/lib_powerpc/store.c	/^} cpu_post_store_table[] =$/;"	v	typeref:struct:cpu_post_store_s[]
cpu_post_test	post/lib_powerpc/cpu.c	/^int cpu_post_test (int flags)$/;"	f	typeref:typename:int
cpu_post_test_andi	post/lib_powerpc/andi.c	/^int cpu_post_test_andi (void)$/;"	f	typeref:typename:int
cpu_post_test_b	post/lib_powerpc/b.c	/^int cpu_post_test_b (void)$/;"	f	typeref:typename:int
cpu_post_test_bc	post/lib_powerpc/b.c	/^static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi,$/;"	f	typeref:typename:int	file:
cpu_post_test_cmp	post/lib_powerpc/cmp.c	/^int cpu_post_test_cmp (void)$/;"	f	typeref:typename:int
cpu_post_test_cmpi	post/lib_powerpc/cmpi.c	/^int cpu_post_test_cmpi (void)$/;"	f	typeref:typename:int
cpu_post_test_complex	post/lib_powerpc/complex.c	/^int cpu_post_test_complex (void)$/;"	f	typeref:typename:int
cpu_post_test_complex_1	post/lib_powerpc/complex.c	/^static int cpu_post_test_complex_1 (void)$/;"	f	typeref:typename:int	file:
cpu_post_test_complex_2	post/lib_powerpc/complex.c	/^static int cpu_post_test_complex_2 (void)$/;"	f	typeref:typename:int	file:
cpu_post_test_cr	post/lib_powerpc/cr.c	/^int cpu_post_test_cr (void)$/;"	f	typeref:typename:int
cpu_post_test_load	post/lib_powerpc/load.c	/^int cpu_post_test_load (void)$/;"	f	typeref:typename:int
cpu_post_test_multi	post/lib_powerpc/multi.c	/^int cpu_post_test_multi(void)$/;"	f	typeref:typename:int
cpu_post_test_rlwimi	post/lib_powerpc/rlwimi.c	/^int cpu_post_test_rlwimi (void)$/;"	f	typeref:typename:int
cpu_post_test_rlwinm	post/lib_powerpc/rlwinm.c	/^int cpu_post_test_rlwinm (void)$/;"	f	typeref:typename:int
cpu_post_test_rlwnm	post/lib_powerpc/rlwnm.c	/^int cpu_post_test_rlwnm (void)$/;"	f	typeref:typename:int
cpu_post_test_srawi	post/lib_powerpc/srawi.c	/^int cpu_post_test_srawi (void)$/;"	f	typeref:typename:int
cpu_post_test_store	post/lib_powerpc/store.c	/^int cpu_post_test_store (void)$/;"	f	typeref:typename:int
cpu_post_test_string	post/lib_powerpc/string.c	/^int cpu_post_test_string (void)$/;"	f	typeref:typename:int
cpu_post_test_three	post/lib_powerpc/three.c	/^int cpu_post_test_three (void)$/;"	f	typeref:typename:int
cpu_post_test_threei	post/lib_powerpc/threei.c	/^int cpu_post_test_threei (void)$/;"	f	typeref:typename:int
cpu_post_test_threex	post/lib_powerpc/threex.c	/^int cpu_post_test_threex (void)$/;"	f	typeref:typename:int
cpu_post_test_two	post/lib_powerpc/two.c	/^int cpu_post_test_two (void)$/;"	f	typeref:typename:int
cpu_post_test_twox	post/lib_powerpc/twox.c	/^int cpu_post_test_twox (void)$/;"	f	typeref:typename:int
cpu_post_three_s	post/lib_powerpc/three.c	/^static struct cpu_post_three_s$/;"	s	file:
cpu_post_three_size	post/lib_powerpc/three.c	/^static unsigned int cpu_post_three_size = ARRAY_SIZE(cpu_post_three_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_three_table	post/lib_powerpc/three.c	/^} cpu_post_three_table[] =$/;"	v	typeref:struct:cpu_post_three_s[]
cpu_post_threei_s	post/lib_powerpc/threei.c	/^static struct cpu_post_threei_s$/;"	s	file:
cpu_post_threei_size	post/lib_powerpc/threei.c	/^static unsigned int cpu_post_threei_size = ARRAY_SIZE(cpu_post_threei_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_threei_table	post/lib_powerpc/threei.c	/^} cpu_post_threei_table[] =$/;"	v	typeref:struct:cpu_post_threei_s[]
cpu_post_threex_s	post/lib_powerpc/threex.c	/^static struct cpu_post_threex_s$/;"	s	file:
cpu_post_threex_size	post/lib_powerpc/threex.c	/^static unsigned int cpu_post_threex_size = ARRAY_SIZE(cpu_post_threex_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_threex_table	post/lib_powerpc/threex.c	/^} cpu_post_threex_table[] =$/;"	v	typeref:struct:cpu_post_threex_s[]
cpu_post_two_s	post/lib_powerpc/two.c	/^static struct cpu_post_two_s$/;"	s	file:
cpu_post_two_size	post/lib_powerpc/two.c	/^static unsigned int cpu_post_two_size = ARRAY_SIZE(cpu_post_two_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_two_table	post/lib_powerpc/two.c	/^} cpu_post_two_table[] =$/;"	v	typeref:struct:cpu_post_two_s[]
cpu_post_twox_s	post/lib_powerpc/twox.c	/^static struct cpu_post_twox_s$/;"	s	file:
cpu_post_twox_size	post/lib_powerpc/twox.c	/^static unsigned int cpu_post_twox_size = ARRAY_SIZE(cpu_post_twox_table);$/;"	v	typeref:typename:unsigned int	file:
cpu_post_twox_table	post/lib_powerpc/twox.c	/^} cpu_post_twox_table[] =$/;"	v	typeref:struct:cpu_post_twox_s[]
cpu_properties	arch/sparc/cpu/leon2/prom.c	/^	struct property cpu_properties[7];$/;"	m	struct:leon_prom_info	typeref:struct:property[7]	file:
cpu_properties	arch/sparc/cpu/leon3/prom.c	/^	struct property cpu_properties[7];$/;"	m	struct:leon_prom_info	typeref:struct:property[7]	file:
cpu_pwr_clamp	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpu_pwr_clamp[4];	\/* 0x140 but first one is actually unused *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32[4]
cpu_pwr_clamp	arch/arm/include/asm/arch/prcm.h	/^	u32 cpu_pwr_clamp[4];	\/* 0x140 but first one is actually unused *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32[4]
cpu_pwr_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 cpu_pwr_csr;	\/* offset 0x38 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_pwr_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 cpu_pwr_csr;	\/* offset 0x38 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
cpu_pwroff	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpu_pwroff;		\/* 0x100 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu_pwroff	arch/arm/include/asm/arch/prcm.h	/^	u32 cpu_pwroff;		\/* 0x100 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpu_qemu_get_count	arch/x86/cpu/qemu/cpu.c	/^static int cpu_qemu_get_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpu_qemu_get_desc	arch/x86/cpu/qemu/cpu.c	/^int cpu_qemu_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int
cpu_qemu_ids	arch/x86/cpu/qemu/cpu.c	/^static const struct udevice_id cpu_qemu_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cpu_qemu_ops	arch/x86/cpu/qemu/cpu.c	/^static const struct cpu_ops cpu_qemu_ops = {$/;"	v	typeref:typename:const struct cpu_ops	file:
cpu_r5_ctrl	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 cpu_r5_ctrl; \/* 0x90 *\/$/;"	m	struct:crlapb_regs	typeref:typename:u32
cpu_register	arch/powerpc/cpu/ppc4xx/reginfo.c	/^struct cpu_register {$/;"	s	file:
cpu_relax	arch/arm/include/asm/processor.h	/^#define cpu_relax(/;"	d
cpu_relax	arch/avr32/include/asm/processor.h	/^#define cpu_relax(/;"	d
cpu_relax	arch/mips/include/asm/processor.h	/^#define cpu_relax(/;"	d
cpu_release	arch/arm/cpu/armv7/mx6/mp.c	/^int cpu_release(int nr, int argc, char *const argv[])$/;"	f	typeref:typename:int
cpu_release	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int cpu_release(int nr, int argc, char * const argv[])$/;"	f	typeref:typename:int
cpu_release	arch/arm/cpu/armv8/zynqmp/mp.c	/^int cpu_release(int nr, int argc, char * const argv[])$/;"	f	typeref:typename:int
cpu_release	arch/powerpc/cpu/mpc85xx/mp.c	/^int cpu_release(int nr, int argc, char * const argv[])$/;"	f	typeref:typename:int
cpu_release	arch/powerpc/cpu/mpc86xx/mp.c	/^int cpu_release(int nr, int argc, char * const argv[])$/;"	f	typeref:typename:int
cpu_replaced_sts	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 cpu_replaced_sts:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
cpu_replaced_sts	arch/x86/include/asm/me_common.h	/^	u32 cpu_replaced_sts:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
cpu_replaced_valid	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 cpu_replaced_valid:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
cpu_replaced_valid	arch/x86/include/asm/me_common.h	/^	u32 cpu_replaced_valid:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
cpu_reset	arch/arm/cpu/armv7/mx6/mp.c	/^int cpu_reset(int nr)$/;"	f	typeref:typename:int
cpu_reset	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int cpu_reset(int nr)$/;"	f	typeref:typename:int
cpu_reset	arch/arm/cpu/armv8/zynqmp/mp.c	/^int cpu_reset(int nr)$/;"	f	typeref:typename:int
cpu_reset	arch/powerpc/cpu/mpc85xx/mp.c	/^int cpu_reset(int nr)$/;"	f	typeref:typename:int
cpu_reset	arch/powerpc/cpu/mpc86xx/mp.c	/^int cpu_reset(int nr)$/;"	f	typeref:typename:int
cpu_reset	arch/sparc/cpu/leon2/cpu.c	/^void cpu_reset(void)$/;"	f	typeref:typename:void
cpu_reset	arch/sparc/cpu/leon3/cpu.c	/^void cpu_reset(void)$/;"	f	typeref:typename:void
cpu_reset_mask	arch/arm/cpu/armv7/mx6/mp.c	/^static uint32_t cpu_reset_mask[MAX_CPUS] = {$/;"	v	typeref:typename:uint32_t[]	file:
cpu_revision	arch/arm/mach-keystone/include/mach/hardware.h	/^static inline u8 cpu_revision(void)$/;"	f	typeref:typename:u8
cpu_revs	arch/arm/cpu/armv7/am33xx/sys_info.c	/^static char *cpu_revs[] = {$/;"	v	typeref:typename:char * []	file:
cpu_rls_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 cpu_rls_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
cpu_run_reference_code	arch/x86/cpu/broadwell/refcode.c	/^int cpu_run_reference_code(void)$/;"	f	typeref:typename:int
cpu_secondary_init_r	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void cpu_secondary_init_r(void)$/;"	f	typeref:typename:void
cpu_secondary_init_r	common/board_r.c	/^__weak void cpu_secondary_init_r(void)$/;"	f	typeref:typename:__weak void
cpu_set_flex_ratio_to_tdp_nominal	arch/x86/cpu/intel_common/cpu.c	/^int cpu_set_flex_ratio_to_tdp_nominal(void)$/;"	f	typeref:typename:int
cpu_set_power_limits	arch/x86/cpu/broadwell/cpu.c	/^void cpu_set_power_limits(int power_limit_1_time)$/;"	f	typeref:typename:void
cpu_speed	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 cpu_speed;        \/* 0x2E: (33.333 * n) MHz *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
cpu_sram_spd	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 cpu_sram_spd;	\/* CPU SRAM Speed Reg *\/$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
cpu_status	arch/arm/cpu/armv7/mx6/mp.c	/^int cpu_status(int nr)$/;"	f	typeref:typename:int
cpu_status	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int cpu_status(int nr)$/;"	f	typeref:typename:int
cpu_status	arch/arm/cpu/armv8/zynqmp/mp.c	/^int cpu_status(int nr)$/;"	f	typeref:typename:int
cpu_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 cpu_status[6];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[6]
cpu_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpu_status;		\/* 0x10011410 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cpu_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpu_status;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
cpu_status	arch/powerpc/cpu/mpc85xx/mp.c	/^int cpu_status(int nr)$/;"	f	typeref:typename:int
cpu_status	arch/powerpc/cpu/mpc86xx/mp.c	/^int cpu_status(int nr)$/;"	f	typeref:typename:int
cpu_status0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int cpu_status0;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
cpu_status0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 cpu_status0;$/;"	m	struct:rk3288_grf	typeref:typename:u32
cpu_status1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int cpu_status1;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
cpu_status_all	cmd/mp.c	/^static int cpu_status_all(void)$/;"	f	typeref:typename:int	file:
cpu_status_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	cpu_status_kfc;		\/* 0x10039410 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
cpu_sync_pipeline	arch/avr32/include/asm/processor.h	/^#define cpu_sync_pipeline(/;"	d
cpu_target	arch/arm/mach-mvebu/include/mach/cpu.h	/^enum cpu_target {$/;"	g
cpu_thermal	arch/arm/dts/omap4-cpu-thermal.dtsi	/^cpu_thermal: cpu_thermal {$/;"	l
cpu_thermal	arch/arm/dts/rk3288-thermal.dtsi	/^cpu_thermal: cpu_thermal {$/;"	l
cpu_to__	arch/mips/include/asm/io.h	/^#define cpu_to__(/;"	d
cpu_to_be16	include/compiler.h	/^# define cpu_to_be16(/;"	d
cpu_to_be16	include/compiler.h	/^#define cpu_to_be16(/;"	d
cpu_to_be16	include/linux/byteorder/generic.h	/^#define cpu_to_be16 /;"	d
cpu_to_be16p	include/linux/byteorder/generic.h	/^#define cpu_to_be16p /;"	d
cpu_to_be16s	include/linux/byteorder/generic.h	/^#define cpu_to_be16s /;"	d
cpu_to_be32	include/compiler.h	/^# define cpu_to_be32(/;"	d
cpu_to_be32	include/compiler.h	/^#define cpu_to_be32(/;"	d
cpu_to_be32	include/linux/byteorder/generic.h	/^#define cpu_to_be32 /;"	d
cpu_to_be32p	include/linux/byteorder/generic.h	/^#define cpu_to_be32p /;"	d
cpu_to_be32s	include/linux/byteorder/generic.h	/^#define cpu_to_be32s /;"	d
cpu_to_be64	include/compiler.h	/^# define cpu_to_be64(/;"	d
cpu_to_be64	include/compiler.h	/^#define cpu_to_be64(/;"	d
cpu_to_be64	include/linux/byteorder/generic.h	/^#define cpu_to_be64 /;"	d
cpu_to_be64p	include/linux/byteorder/generic.h	/^#define cpu_to_be64p /;"	d
cpu_to_be64s	include/linux/byteorder/generic.h	/^#define cpu_to_be64s /;"	d
cpu_to_bus	arch/arm/mach-keystone/keystone.c	/^int cpu_to_bus(u32 *ptr, u32 length)$/;"	f	typeref:typename:int
cpu_to_fdt32	include/libfdt_env.h	/^#define cpu_to_fdt32(/;"	d
cpu_to_fdt64	include/libfdt_env.h	/^#define cpu_to_fdt64(/;"	d
cpu_to_hc32	drivers/usb/host/ehci.h	/^#define cpu_to_hc32(/;"	d
cpu_to_je16	drivers/mtd/nand/nand_util.c	/^#define cpu_to_je16(/;"	d	file:
cpu_to_je32	drivers/mtd/nand/nand_util.c	/^#define cpu_to_je32(/;"	d	file:
cpu_to_le16	include/compiler.h	/^# define cpu_to_le16(/;"	d
cpu_to_le16	include/compiler.h	/^#define cpu_to_le16(/;"	d
cpu_to_le16	include/linux/byteorder/generic.h	/^#define cpu_to_le16 /;"	d
cpu_to_le16p	include/linux/byteorder/generic.h	/^#define cpu_to_le16p /;"	d
cpu_to_le16s	include/linux/byteorder/generic.h	/^#define cpu_to_le16s /;"	d
cpu_to_le32	include/compiler.h	/^# define cpu_to_le32(/;"	d
cpu_to_le32	include/compiler.h	/^#define cpu_to_le32(/;"	d
cpu_to_le32	include/linux/byteorder/generic.h	/^#define cpu_to_le32 /;"	d
cpu_to_le32p	include/linux/byteorder/generic.h	/^#define cpu_to_le32p /;"	d
cpu_to_le32s	include/linux/byteorder/generic.h	/^#define cpu_to_le32s /;"	d
cpu_to_le64	include/compiler.h	/^# define cpu_to_le64(/;"	d
cpu_to_le64	include/compiler.h	/^#define cpu_to_le64(/;"	d
cpu_to_le64	include/linux/byteorder/generic.h	/^#define cpu_to_le64 /;"	d
cpu_to_le64p	include/linux/byteorder/generic.h	/^#define cpu_to_le64p /;"	d
cpu_to_le64s	include/linux/byteorder/generic.h	/^#define cpu_to_le64s /;"	d
cpu_to_uimage	include/image.h	/^#define cpu_to_uimage(/;"	d
cpu_to_zfs16	include/zfs_common.h	/^#define cpu_to_zfs16(/;"	d
cpu_to_zfs32	include/zfs_common.h	/^#define cpu_to_zfs32(/;"	d
cpu_to_zfs64	include/zfs_common.h	/^#define cpu_to_zfs64(/;"	d
cpu_trips	arch/arm/dts/omap4-cpu-thermal.dtsi	/^	cpu_trips: trips {$/;"	l	label:cpu_thermal
cpu_type	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^struct cpu_type {$/;"	s
cpu_type	arch/arm/include/asm/imx-common/sys_proto.h	/^#define cpu_type(/;"	d
cpu_type	arch/arm/mach-rmobile/cpu_info.c	/^	u16 cpu_type;$/;"	m	struct:__anon8ce67d240108	typeref:typename:u16	file:
cpu_type	arch/powerpc/cpu/mpc83xx/cpu.c	/^	const struct cpu_type {$/;"	s	function:checkcpu	file:
cpu_type	arch/powerpc/include/asm/processor.h	/^struct cpu_type {$/;"	s
cpu_type	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 cpu_type;         \/* 0x2F: 7=imx6q, 8=imx6dl *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
cpu_type_list	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^static struct cpu_type cpu_type_list[] = {$/;"	v	typeref:struct:cpu_type[]
cpu_type_list	arch/powerpc/cpu/mpc8xxx/cpu.c	/^static struct cpu_type cpu_type_list[] = {$/;"	v	typeref:struct:cpu_type[]	file:
cpu_type_unknown	arch/powerpc/cpu/mpc8xxx/cpu.c	/^static struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 0);$/;"	v	typeref:struct:cpu_type	file:
cpu_vendor_name	arch/x86/cpu/cpu.c	/^const char *cpu_vendor_name(int vendor)$/;"	f	typeref:typename:const char *
cpu_vhint_data	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct cpu_vhint_data {$/;"	s
cpu_warning	arch/powerpc/cpu/mpc8xx/cpu.c	/^static char *cpu_warning = "\\n         " \\$/;"	v	typeref:typename:char *	file:
cpu_winen	arch/arm/mach-mvebu/include/mach/cpu.h	/^enum cpu_winen {$/;"	g
cpu_x86_baytrail_ids	arch/x86/cpu/baytrail/cpu.c	/^static const struct udevice_id cpu_x86_baytrail_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cpu_x86_baytrail_ops	arch/x86/cpu/baytrail/cpu.c	/^static const struct cpu_ops cpu_x86_baytrail_ops = {$/;"	v	typeref:typename:const struct cpu_ops	file:
cpu_x86_baytrail_probe	arch/x86/cpu/baytrail/cpu.c	/^static int cpu_x86_baytrail_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpu_x86_bind	arch/x86/cpu/cpu_x86.c	/^int cpu_x86_bind(struct udevice *dev)$/;"	f	typeref:typename:int
cpu_x86_broadwell_ids	arch/x86/cpu/broadwell/cpu.c	/^static const struct udevice_id cpu_x86_broadwell_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cpu_x86_broadwell_ops	arch/x86/cpu/broadwell/cpu.c	/^static const struct cpu_ops cpu_x86_broadwell_ops = {$/;"	v	typeref:typename:const struct cpu_ops	file:
cpu_x86_broadwell_probe	arch/x86/cpu/broadwell/cpu.c	/^static int cpu_x86_broadwell_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpu_x86_get_count	arch/x86/cpu/cpu_x86.c	/^static int cpu_x86_get_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpu_x86_get_desc	arch/x86/cpu/cpu_x86.c	/^int cpu_x86_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int
cpu_x86_get_vendor	arch/x86/cpu/cpu_x86.c	/^int cpu_x86_get_vendor(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int
cpu_x86_ids	arch/x86/cpu/cpu_x86.c	/^static const struct udevice_id cpu_x86_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cpu_x86_model_206ax_ids	arch/x86/cpu/ivybridge/model_206ax.c	/^static const struct udevice_id cpu_x86_model_206ax_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cpu_x86_model_206ax_ops	arch/x86/cpu/ivybridge/model_206ax.c	/^static const struct cpu_ops cpu_x86_model_206ax_ops = {$/;"	v	typeref:typename:const struct cpu_ops	file:
cpu_x86_model_206ax_probe	arch/x86/cpu/ivybridge/model_206ax.c	/^static int cpu_x86_model_206ax_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cpu_x86_ops	arch/x86/cpu/cpu_x86.c	/^static const struct cpu_ops cpu_x86_ops = {$/;"	v	typeref:typename:const struct cpu_ops	file:
cpuclk	arch/arm/dts/armada-xp.dtsi	/^			cpuclk: clock-complex@18700 {$/;"	l
cpucount0	drivers/qe/uec.h	/^	u16  cpucount0;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount1	drivers/qe/uec.h	/^	u16  cpucount1;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount2	drivers/qe/uec.h	/^	u16  cpucount2;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount3	drivers/qe/uec.h	/^	u16  cpucount3;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount4	drivers/qe/uec.h	/^	u16  cpucount4;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount5	drivers/qe/uec.h	/^	u16  cpucount5;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount6	drivers/qe/uec.h	/^	u16  cpucount6;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpucount7	drivers/qe/uec.h	/^	u16  cpucount7;        \/* CPU packet counter *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
cpud_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned cpud_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
cpuflags-$(CONFIG_LEON2)	arch/sparc/config.mk	/^cpuflags-$(CONFIG_LEON2) := -mcpu=leon$/;"	m
cpuflags-$(CONFIG_LEON3)	arch/sparc/config.mk	/^cpuflags-$(CONFIG_LEON3) := -mcpu=leon3$/;"	m
cpuflags-$(CONFIG_M5208)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5208)	:= -mcpu=5208$/;"	m
cpuflags-$(CONFIG_M52277)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M52277)	:= -mcpu=52277 -fPIC$/;"	m
cpuflags-$(CONFIG_M5235)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5235)	:= -mcpu=5235 -fPIC$/;"	m
cpuflags-$(CONFIG_M5249)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5249)	:= -mcpu=5249$/;"	m
cpuflags-$(CONFIG_M5253)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5253)	:= -mcpu=5253$/;"	m
cpuflags-$(CONFIG_M5271)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5271)	:= -mcpu=5271$/;"	m
cpuflags-$(CONFIG_M5272)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5272)	:= -mcpu=5272$/;"	m
cpuflags-$(CONFIG_M5275)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5275)	:= -mcpu=5275$/;"	m
cpuflags-$(CONFIG_M5282)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5282)	:= -mcpu=5282$/;"	m
cpuflags-$(CONFIG_M5307)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_M5307)	:= -mcpu=5307$/;"	m
cpuflags-$(CONFIG_MCF5301x)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_MCF5301x)	:= -mcpu=53015 -fPIC$/;"	m
cpuflags-$(CONFIG_MCF532x)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_MCF532x)	:= -mcpu=5329 -fPIC$/;"	m
cpuflags-$(CONFIG_MCF5441x)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_MCF5441x)	:= -mcpu=54418 -fPIC$/;"	m
cpuflags-$(CONFIG_MCF5445x)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_MCF5445x)	:= -mcpu=54455 -fPIC$/;"	m
cpuflags-$(CONFIG_MCF547x_8x)	arch/m68k/Makefile	/^cpuflags-$(CONFIG_MCF547x_8x)	:= -mcpu=5485 -fPIC$/;"	m
cpufreq	arch/arm/include/asm/arch-spear/spr_defs.h	/^	int cpufreq;$/;"	m	struct:chip_data	typeref:typename:int
cpuid	arch/arm/include/asm/armv7m.h	/^	uint32_t cpuid;		\/* CPUID Base Register *\/$/;"	m	struct:v7m_scb	typeref:typename:uint32_t
cpuid	arch/x86/include/asm/cpu.h	/^static inline struct cpuid_result cpuid(int op)$/;"	f	typeref:struct:cpuid_result
cpuid_eax	arch/x86/include/asm/cpu.h	/^static inline unsigned int cpuid_eax(unsigned int op)$/;"	f	typeref:typename:unsigned int
cpuid_ebx	arch/x86/include/asm/cpu.h	/^static inline unsigned int cpuid_ebx(unsigned int op)$/;"	f	typeref:typename:unsigned int
cpuid_ecx	arch/x86/include/asm/cpu.h	/^static inline unsigned int cpuid_ecx(unsigned int op)$/;"	f	typeref:typename:unsigned int
cpuid_edx	arch/x86/include/asm/cpu.h	/^static inline unsigned int cpuid_edx(unsigned int op)$/;"	f	typeref:typename:unsigned int
cpuid_ext	arch/x86/include/asm/cpu.h	/^static inline struct cpuid_result cpuid_ext(int op, unsigned ecx)$/;"	f	typeref:struct:cpuid_result
cpuid_result	arch/x86/include/asm/cpu.h	/^struct cpuid_result {$/;"	s
cpuidle	arch/arm/dts/rk3288.dtsi	/^	cpuidle: cpuidle {$/;"	l
cpuinfo_x86	arch/x86/cpu/cpu.c	/^struct cpuinfo_x86 {$/;"	s	file:
cpuintc	arch/mips/dts/nexys4ddr.dts	/^	cpuintc: interrupt-controller@0 {$/;"	l
cpumask_next	include/common.h	/^static inline int cpumask_next(int cpu, unsigned int mask)$/;"	f	typeref:typename:int
cpuq_8021_cfg	include/vsc9953.h	/^	u32	cpuq_8021_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
cpuq_cfg	include/vsc9953.h	/^	u32	cpuq_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
cpus_cfg	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 cpus_cfg;		\/* 0x000 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpus_cfg	arch/arm/include/asm/arch/prcm.h	/^	u32 cpus_cfg;		\/* 0x000 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
cpus_clk	arch/arm/dts/sun9i-a80.dtsi	/^		cpus_clk: clk@08001410 {$/;"	l
cpus_entered	arch/x86/include/asm/mp.h	/^	atomic_t cpus_entered;$/;"	m	struct:mp_flight_record	typeref:typename:atomic_t
cpuspeed	arch/arm/cpu/sa1100/start.S	/^cpuspeed:		.word   CONFIG_SYS_CPUSPEED$/;"	l
cpxcfg0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxcfg0;		\/* Processor x Configuration 0 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxcfg0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxcfg0;$/;"	m	struct:mscm	typeref:typename:u32
cpxcfg1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxcfg1;		\/* Processor x Configuration 1 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxcfg1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxcfg1;$/;"	m	struct:mscm	typeref:typename:u32
cpxcfg2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxcfg2;		\/* Processor x Configuration 2 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxcfg2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxcfg2;$/;"	m	struct:mscm	typeref:typename:u32
cpxcfg3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxcfg3;		\/* Processor x Configuration 3 Register *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxcfg3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxcfg3;$/;"	m	struct:mscm	typeref:typename:u32
cpxcount	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxcount;		\/* Processor x Count Register                   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxcount	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxcount;$/;"	m	struct:mscm	typeref:typename:u32
cpxmaster	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxmaster;		\/* Processor x Master Number Register   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxmaster	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxmaster;$/;"	m	struct:mscm	typeref:typename:u32
cpxnum	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxnum;		\/* Processor x Number Register                  *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxnum	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxnum;$/;"	m	struct:mscm	typeref:typename:u32
cpxtype	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cpxtype;		\/* Processor x Type Register                    *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
cpxtype	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cpxtype;$/;"	m	struct:mscm	typeref:typename:u32
cqpmp	drivers/block/fsl_sata.h	/^	u32 cqpmp;		\/* Port number queue register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
cqr	drivers/block/fsl_sata.h	/^	u32 cqr;		\/* Command queue register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 cr[4];		\/* Capture Registers		*\/$/;"	m	struct:timer_regs	typeref:typename:u32[4]
cr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cr;	\/* Control Register *\/$/;"	m	struct:pwm_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cr;	\/* Control register *\/$/;"	m	struct:epit_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	cr;$/;"	m	struct:pwm_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cr;$/;"	m	struct:wdog_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cr;		\/* RCC clock control *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cr;$/;"	m	struct:stm32_flash_bank_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cr;$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 cr;		\/* RCC clock control *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 cr;$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 cr;		\/* RCC clock control *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 cr;			\/* 0x00 control register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 cr;              \/* impedance control register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
cr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cr[162];$/;"	m	struct:ddrmr_regs	typeref:typename:u32[162]
cr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 cr;			\/* 0x00 control register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 cr;              \/* impedance control register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
cr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 cr;			\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	cr;	\/* Control Register WO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	cr; 	\/* 0x08 SDRAMC Configuration Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91_rstc.h	/^	u32	cr;	\/* Reset Controller Control Register *\/$/;"	m	struct:at91_rstc	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		cr;		\/* 0x00 Control Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	cr;$/;"	m	struct:at91_st	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91_wdt.h	/^	u32	cr;$/;"	m	struct:at91_wdt	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	cr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 cr;			\/* 0x08: Configuration Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
cr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 cr;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
cr	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	cr;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
cr	arch/arm/mach-sunxi/board.c	/^	uint32_t cr;$/;"	m	struct:fel_stash	typeref:typename:uint32_t	file:
cr	arch/m68k/include/asm/coldfire/ata.h	/^	u8 cr;			\/* 0x24 *\/$/;"	m	struct:atac	typeref:typename:u8
cr	arch/m68k/include/asm/coldfire/edma.h	/^	u32 cr;			\/* 0x00 Control Register *\/$/;"	m	struct:edma_ctrl	typeref:typename:u32
cr	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 cr;			\/* 0x04 Control *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
cr	arch/m68k/include/asm/coldfire/rng.h	/^	u32 cr;			\/* 0x00 Control *\/$/;"	m	struct:rng_ctrl	typeref:typename:u32
cr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 cr;			\/* 0x04 Control *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
cr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 cr;$/;"	m	struct:ssi	typeref:typename:u32
cr	arch/m68k/include/asm/fsl_i2c.h	/^	u8 cr;		\/* I2C control redister	*\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
cr	arch/m68k/include/asm/immap_520x.h	/^	u16 cr;			\/* 0x00 Control *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
cr	arch/m68k/include/asm/immap_520x.h	/^	u8 cr;			\/* 0x02 Control *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
cr	arch/m68k/include/asm/immap_5235.h	/^	u16 cr;			\/* 0x00 Control register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
cr	arch/m68k/include/asm/immap_5329.h	/^	u16 cr;			\/* 0x00 Control register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
cr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cr;			\/* 0x04 *\/$/;"	m	struct:slt	typeref:typename:u32
cr	arch/m68k/include/asm/rtc.h	/^	u32 cr;			\/* 0x10 Control Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
cr	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
cr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^	unsigned long cr;$/;"	m	struct:bank_param	typeref:typename:unsigned long	file:
cr	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 cr;		\/* I2C control redister	*\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
cr	drivers/block/ftide020.h	/^	unsigned int	cr;		\/* 0x08 - Control Reg		*\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
cr	drivers/i2c/at91_i2c.h	/^	u32 cr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
cr	drivers/i2c/fti2c010.h	/^	uint32_t cr;  \/* 0x00: control register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
cr	drivers/i2c/i2c-uniphier-f.c	/^	u32 cr;				\/* control register *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
cr	drivers/mtd/stm32_flash.h	/^	u32 cr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
cr	drivers/rtc/ftrtc010.c	/^	unsigned int cr;		\/* 0x20 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
cr	drivers/serial/atmel_usart.h	/^	u32	cr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
cr	drivers/spi/zynq_qspi.c	/^	u32 cr;		\/* 0x00 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
cr	drivers/spi/zynq_spi.c	/^	u32 cr;		\/* 0x00 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
cr	include/andestech/andes_pcu.h	/^	unsigned int	cr;		\/* PCSx Configuration (clock scaling) *\/$/;"	m	struct:pcs	typeref:typename:unsigned int
cr	include/atmel_mci.h	/^	u32	cr;	\/* 0x00 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
cr	include/faraday/ftahbc020s.h	/^	unsigned int	cr;		\/* 0x88	- Ctrl Reg *\/$/;"	m	struct:ftahbc02s	typeref:typename:unsigned int
cr	include/faraday/ftsmc020.h	/^	unsigned int    cr;$/;"	m	struct:ftsmc020_bank	typeref:typename:unsigned int
cr	include/faraday/fttmr010.h	/^	unsigned int	cr;			\/* 0x30 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
cr	include/sja1000.h	/^	u8 cr;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
cr	post/lib_powerpc/cmp.c	/^    ulong cr;$/;"	m	struct:cpu_post_cmp_s	typeref:typename:ulong	file:
cr	post/lib_powerpc/cmpi.c	/^    ulong cr;$/;"	m	struct:cpu_post_cmpi_s	typeref:typename:ulong	file:
cr	post/lib_powerpc/cr.c	/^    ulong cr;$/;"	m	struct:cpu_post_cr_s2	typeref:typename:ulong	file:
cr	post/lib_powerpc/cr.c	/^    ulong cr;$/;"	m	struct:cpu_post_cr_s3	typeref:typename:ulong	file:
cr	post/lib_powerpc/cr.c	/^    ulong cr;$/;"	m	struct:cpu_post_cr_s4	typeref:typename:ulong	file:
cr0	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 cr0;$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cr0	drivers/spi/armada100_spi.c	/^	u32 cr0, cr1;$/;"	m	struct:armd_spi_slave	typeref:typename:u32	file:
cr0	drivers/spi/lpc32xx_ssp.c	/^	u32 cr0;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
cr00	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr00;		\/* 0x00 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr01	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr01;		\/* 0x04 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr02	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr02;		\/* 0x08 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr03	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr03;		\/* 0x0C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr04	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr04;		\/* 0x10 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr05	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr05;		\/* 0x14 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr06	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr06;		\/* 0x18 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr07	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr07;		\/* 0x1C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr08	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr08;		\/* 0x20 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr09	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr09;		\/* 0x24 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr0_data	drivers/net/uli526x.c	/^	u32 cr0_data;$/;"	m	struct:uli526x_board_info	typeref:typename:u32	file:
cr1	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 cr1;$/;"	m	struct:gpt_regs	typeref:typename:u32
cr1	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 cr1;   \/* power control register 1 *\/$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
cr1	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 cr1;$/;"	m	struct:gpt_regs	typeref:typename:u32
cr1	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 cr1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
cr1	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 cr1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
cr1	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 cr1;$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cr1	arch/m68k/include/asm/immap_5445x.h	/^	u32 cr1;		\/* 0x0c Configuration 1 Register *\/$/;"	m	struct:pci	typeref:typename:u32
cr1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cr1;		\/* 0x0c Configuration 1 *\/$/;"	m	struct:pci	typeref:typename:u32
cr1	drivers/serial/serial_mxc.c	/^	u32 cr1;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
cr1	drivers/serial/serial_stm32.c	/^	u32 cr1;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
cr1	drivers/serial/serial_stm32x7.h	/^	u32 cr1;$/;"	m	struct:stm32_usart	typeref:typename:u32
cr1	drivers/spi/armada100_spi.c	/^	u32 cr0, cr1;$/;"	m	struct:armd_spi_slave	typeref:typename:u32	file:
cr1	drivers/spi/lpc32xx_ssp.c	/^	u32 cr1;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
cr1	drivers/spi/sh_spi.h	/^	unsigned long cr1;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
cr1	include/faraday/ftsdmc021.h	/^	unsigned int	cr1;		\/* 0x08 - SDRAM Configuration Reg 1 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
cr1	include/mpc5xxx.h	/^	volatile u8 cr1;		\/* SPI + 0x0F00 *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
cr10	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr10;		\/* 0x28 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr11	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr11;		\/* 0x2C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr12	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr12;		\/* 0x30 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr13	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr13;		\/* 0x34 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr14	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr14;		\/* 0x38 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr15	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr15;		\/* 0x3C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr15_data	drivers/net/uli526x.c	/^	u32 cr15_data;$/;"	m	struct:uli526x_board_info	typeref:typename:u32	file:
cr16	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr16;		\/* 0x40 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr17	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr17;		\/* 0x44 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr18	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr18;		\/* 0x48 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr19	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr19;		\/* 0x4C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 cr2;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
cr2	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 cr2;$/;"	m	struct:gpt_regs	typeref:typename:u32
cr2	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 cr2;   \/* power control register 2 *\/$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
cr2	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 cr2;$/;"	m	struct:gpt_regs	typeref:typename:u32
cr2	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 cr2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
cr2	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 cr2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
cr2	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 cr2;$/;"	m	struct:pwm_ctrl	typeref:typename:u8
cr2	arch/m68k/include/asm/immap_5445x.h	/^	u32 cr2;		\/* 0x3c Configuration Register 2 *\/$/;"	m	struct:pci	typeref:typename:u32
cr2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cr2;		\/* 0x3c Configuration 2 *\/$/;"	m	struct:pci	typeref:typename:u32
cr2	drivers/serial/serial_mxc.c	/^	u32 cr2;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
cr2	drivers/serial/serial_stm32.c	/^	u32 cr2;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
cr2	drivers/serial/serial_stm32x7.h	/^	u32 cr2;$/;"	m	struct:stm32_usart	typeref:typename:u32
cr2	drivers/spi/sh_spi.h	/^	unsigned long cr2;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
cr2	include/faraday/ftsdmc021.h	/^	unsigned int	cr2;		\/* 0x0c - SDRAM Configuration Reg 2 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
cr2	include/mpc5xxx.h	/^	volatile u8 cr2;		\/* SPI + 0x0F01 *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
cr20	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr20;		\/* 0x50 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr21	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr21;		\/* 0x54 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr22	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr22;		\/* 0x58 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr23	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr23;		\/* 0x5C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr24	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr24;		\/* 0x60 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr25	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr25;		\/* 0x64 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr26	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr26;		\/* 0x68 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr27	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr27;		\/* 0x6C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr28	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr28;		\/* 0x70 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr29	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr29;		\/* 0x74 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr3	drivers/serial/serial_mxc.c	/^	u32 cr3;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
cr3	drivers/serial/serial_stm32.c	/^	u32 cr3;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
cr3	drivers/serial/serial_stm32x7.h	/^	u32 cr3;$/;"	m	struct:stm32_usart	typeref:typename:u32
cr3	drivers/spi/sh_spi.h	/^	unsigned long cr3;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
cr30	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr30;		\/* 0x78 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr31	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr31;		\/* 0x7C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr32	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr32;		\/* 0x80 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr33	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr33;		\/* 0x84 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr34	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr34;		\/* 0x88 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr35	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr35;		\/* 0x8C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr36	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr36;		\/* 0x90 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr37	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr37;		\/* 0x94 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr38	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr38;		\/* 0x98 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr39	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr39;		\/* 0x9C *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr4	drivers/serial/serial_mxc.c	/^	u32 cr4;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
cr4	drivers/spi/sh_spi.h	/^	unsigned long cr4;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
cr40	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr40;		\/* 0xA0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr41	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr41;		\/* 0xA4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr42	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr42;		\/* 0xA8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr43	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr43;		\/* 0xAC *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr44	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr44;		\/* 0xB0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr45	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr45;		\/* 0xB4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr46	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr46;		\/* 0xB8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr47	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr47;		\/* 0xBC *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr48	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr48;		\/* 0xC0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr49	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr49;		\/* 0xC4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr50	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr50;		\/* 0xC8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr51	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr51;		\/* 0xCC *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr52	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr52;		\/* 0xD0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr53	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr53;		\/* 0xD4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr54	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr54;		\/* 0xD8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr55	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr55;		\/* 0xDC *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr56	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr56;		\/* 0xE0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr57	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr57;		\/* 0xE4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr58	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr58;		\/* 0xE8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr59	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr59;		\/* 0xEC *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr5_data	drivers/net/uli526x.c	/^	u32 cr5_data;$/;"	m	struct:uli526x_board_info	typeref:typename:u32	file:
cr60	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr60;		\/* 0xF0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr61	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr61;		\/* 0xF4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr62	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr62;		\/* 0xF8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr63	arch/m68k/include/asm/immap_5441x.h	/^	u32 cr63;		\/* 0xFC *\/$/;"	m	struct:sdramc	typeref:typename:u32
cr6_data	drivers/net/uli526x.c	/^	u32 cr6_data;$/;"	m	struct:uli526x_board_info	typeref:typename:u32	file:
cr7_data	drivers/net/uli526x.c	/^	u32 cr7_data;$/;"	m	struct:uli526x_board_info	typeref:typename:u32	file:
cr_capbase	drivers/usb/host/ehci.h	/^	uint32_t cr_capbase;$/;"	m	struct:ehci_hccr	typeref:typename:uint32_t
cr_capbase	drivers/usb/host/xhci.h	/^	uint32_t cr_capbase;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cr_dboff	drivers/usb/host/xhci.h	/^	uint32_t cr_dboff;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cr_hccparams	drivers/usb/host/ehci.h	/^	uint32_t cr_hccparams;$/;"	m	struct:ehci_hccr	typeref:typename:uint32_t
cr_hccparams	drivers/usb/host/xhci.h	/^	uint32_t cr_hccparams;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cr_hcsp_portrt	drivers/usb/host/ehci.h	/^	uint8_t cr_hcsp_portrt[8];$/;"	m	struct:ehci_hccr	typeref:typename:uint8_t[8]
cr_hcsparams	drivers/usb/host/ehci.h	/^	uint32_t cr_hcsparams;$/;"	m	struct:ehci_hccr	typeref:typename:uint32_t
cr_hcsparams1	drivers/usb/host/xhci.h	/^	uint32_t cr_hcsparams1;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cr_hcsparams2	drivers/usb/host/xhci.h	/^	uint32_t cr_hcsparams2;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cr_hcsparams3	drivers/usb/host/xhci.h	/^	uint32_t cr_hcsparams3;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cr_loop	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int cr_loop[4];$/;"	m	struct:edp_link_train_info	typeref:typename:unsigned int[4]
cr_rnum	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	int	cr_rnum; \/* CR register ; -1 for last entry *\/$/;"	m	struct:ddrmc_cr_setting	typeref:typename:int
cr_rtsoff	drivers/usb/host/xhci.h	/^	uint32_t cr_rtsoff;$/;"	m	struct:xhci_hccr	typeref:typename:uint32_t
cram_bcr_write	board/amcc/acadia/memory.c	/^static void cram_bcr_write(u32 wr_val)$/;"	f	typeref:typename:void	file:
cramfs_check	cmd/jffs2.c	/^#define cramfs_check(/;"	d	file:
cramfs_check	fs/cramfs/cramfs.c	/^int cramfs_check (struct part_info *info)$/;"	f	typeref:typename:int
cramfs_info	cmd/jffs2.c	/^#define cramfs_info(/;"	d	file:
cramfs_info	fs/cramfs/cramfs.c	/^int cramfs_info (struct part_info *info)$/;"	f	typeref:typename:int
cramfs_info	include/cramfs/cramfs_fs.h	/^struct cramfs_info {$/;"	s
cramfs_inode	include/cramfs/cramfs_fs.h	/^struct cramfs_inode {$/;"	s
cramfs_list_inode	fs/cramfs/cramfs.c	/^static int cramfs_list_inode (struct part_info *info, unsigned long offset)$/;"	f	typeref:typename:int	file:
cramfs_load	cmd/jffs2.c	/^#define cramfs_load(/;"	d	file:
cramfs_load	fs/cramfs/cramfs.c	/^int cramfs_load (char *loadoffset, struct part_info *info, char *filename)$/;"	f	typeref:typename:int
cramfs_ls	cmd/jffs2.c	/^#define cramfs_ls(/;"	d	file:
cramfs_ls	fs/cramfs/cramfs.c	/^int cramfs_ls (struct part_info *info, char *filename)$/;"	f	typeref:typename:int
cramfs_memset	fs/jffs2/mini_inflate.c	/^inline void cramfs_memset(int *s, const int c, size n)$/;"	f	typeref:typename:void
cramfs_read_super	fs/cramfs/cramfs.c	/^static int cramfs_read_super (struct part_info *info)$/;"	f	typeref:typename:int	file:
cramfs_resolve	fs/cramfs/cramfs.c	/^static unsigned long cramfs_resolve (unsigned long begin, unsigned long offset,$/;"	f	typeref:typename:unsigned long	file:
cramfs_super	include/cramfs/cramfs_fs.h	/^struct cramfs_super {$/;"	s
cramfs_uncompress	fs/cramfs/cramfs.c	/^static int cramfs_uncompress (unsigned long begin, unsigned long offset,$/;"	f	typeref:typename:int	file:
cramfs_uncompress_block	fs/cramfs/uncompress.c	/^int cramfs_uncompress_block (void *dst, void *src, int srclen)$/;"	f	typeref:typename:int
cramfs_uncompress_exit	fs/cramfs/uncompress.c	/^int cramfs_uncompress_exit (void)$/;"	f	typeref:typename:int
cramfs_uncompress_init	fs/cramfs/uncompress.c	/^int cramfs_uncompress_init (void)$/;"	f	typeref:typename:int
crat	include/tsi148.h	/^	unsigned int crat;                    \/* 0x420         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
crbptr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	crbptr;		\/* Current RX Buffer Desc Ptr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
crbptr	include/tsec.h	/^	u32	crbptr;		\/* Current Receive Buffer Pointer *\/$/;"	m	struct:tsec	typeref:typename:u32
crbptrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	crbptrh;	\/* Current RX Buffer Desc Ptr High *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
crc	board/freescale/common/sys_eeprom.c	/^	u32 crc;          \/* 0x72        CRC32 checksum *\/$/;"	m	struct:eeprom	typeref:typename:u32	file:
crc	board/freescale/common/sys_eeprom.c	/^	u32 crc;          \/* 0xfc - 0xff CRC32 checksum *\/$/;"	m	struct:eeprom	typeref:typename:u32	file:
crc	board/varisys/common/sys_eeprom.c	/^	u32 crc;          \/* x+1         CRC32 checksum *\/$/;"	m	struct:eeprom	typeref:typename:u32	file:
crc	drivers/mtd/ubi/ubi-media.h	/^	__be32  crc;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__be32
crc	fs/ubifs/ubifs-media.h	/^	__le32 crc;$/;"	m	struct:ubifs_ch	typeref:typename:__le32
crc	include/cramfs/cramfs_fs.h	/^	u32 crc;$/;"	m	struct:cramfs_info	typeref:typename:u32
crc	include/ddr_spd.h	/^			uint8_t crc[2];$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508	typeref:typename:uint8_t[2]
crc	include/ddr_spd.h	/^			uint8_t crc[2];$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t[2]
crc	include/ddr_spd.h	/^			uint8_t crc[2];$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t[2]
crc	include/ddr_spd.h	/^	uint8_t crc[2];			\/* 126-127 SPD CRC *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[2]
crc	include/ddr_spd.h	/^	unsigned char crc[2];          \/* 126-127 SPD CRC *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[2]
crc	include/dfu.h	/^	u32 crc;$/;"	m	struct:dfu_entity	typeref:typename:u32
crc	include/environment.h	/^	uint32_t	crc;		\/* CRC32 over data bytes	*\/$/;"	m	struct:environment_s	typeref:typename:uint32_t
crc	include/linux/mtd/nand.h	/^	__le16 crc;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
crc	include/linux/mtd/nand.h	/^	__le16 crc;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
crc	include/linux/mtd/nand.h	/^	__le16 crc;$/;"	m	struct:onfi_ext_param_page	typeref:typename:__le16
crc	tools/env/fw_env.c	/^	uint32_t		*crc;$/;"	m	struct:environment	typeref:typename:uint32_t *	file:
crc	tools/env/fw_env.c	/^	uint32_t	crc;	\/* CRC32 over data bytes    *\/$/;"	m	struct:env_image_redundant	typeref:typename:uint32_t	file:
crc	tools/env/fw_env.c	/^	uint32_t	crc;	\/* CRC32 over data bytes    *\/$/;"	m	struct:env_image_single	typeref:typename:uint32_t	file:
crc1	common/xyzModem.c	/^  unsigned char blk, cblk, crc1, crc2;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char	file:
crc16	common/ddr_spd.c	/^crc16(char *ptr, int count)$/;"	f	typeref:typename:int	file:
crc16	fs/ubifs/crc16.c	/^u16 crc16(u16 crc, u8 const *buffer, size_t len)$/;"	f	typeref:typename:u16
crc16_byte	fs/ubifs/crc16.h	/^static inline u16 crc16_byte(u16 crc, const u8 data)$/;"	f	typeref:typename:u16
crc16_ccitt	lib/crc16.c	/^uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *buf, int len)$/;"	f	typeref:typename:uint16_t
crc16_tab	lib/crc16.c	/^static const uint16_t crc16_tab[] = {$/;"	v	typeref:typename:const uint16_t[]	file:
crc16_table	fs/ext4/crc16.c	/^static __u16 const crc16_table[256] = {$/;"	v	typeref:typename:__u16 const[256]	file:
crc16_table	fs/ubifs/crc16.c	/^u16 const crc16_table[256] = {$/;"	v	typeref:typename:u16 const[256]
crc2	common/xyzModem.c	/^  unsigned char blk, cblk, crc1, crc2;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char	file:
crc32	board/corscience/tricorder/tricorder-eeprom.c	/^		uint32_t crc32;$/;"	m	struct:handle_eeprom_v0::tricorder_eeprom_v0	typeref:typename:uint32_t	file:
crc32	board/corscience/tricorder/tricorder-eeprom.h	/^	uint32_t crc32;$/;"	m	struct:tricorder_eeprom	typeref:typename:uint32_t
crc32	common/iotrace.c	/^	u32 crc32;$/;"	m	struct:iotrace	typeref:typename:u32	file:
crc32	include/efi.h	/^	u32 crc32;$/;"	m	struct:efi_table_hdr	typeref:typename:u32
crc32	include/linux/crc32.h	/^#define crc32(/;"	d
crc32	include/u-boot/zlib.h	/^#  define crc32 /;"	d
crc32	lib/crc32.c	/^uint32_t ZEXPORT crc32 (uint32_t crc, const Bytef *p, uInt len)$/;"	f	typeref:typename:uint32_t ZEXPORT
crc32	tools/mxsimage.h	/^		uint32_t	crc32;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960708	typeref:typename:uint32_t
crc32_be	drivers/mtd/ubi/crc32.c	/^u32 __attribute_pure__ crc32_be(u32 crc, unsigned char const *p, size_t len)$/;"	f	typeref:typename:u32 __attribute_pure__
crc32_le	drivers/mtd/ubi/crc32.c	/^u32 crc32_le(u32 crc, unsigned char const *p, size_t len)$/;"	f	typeref:typename:u32
crc32_no_comp	lib/crc32.c	/^uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len)$/;"	f	typeref:typename:uint32_t ZEXPORT
crc32_result	drivers/ddr/marvell/axp/xor.h	/^	u32 crc32_result;	\/* Result of CRC-32 calculation *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
crc32_wd	lib/crc32.c	/^uint32_t ZEXPORT crc32_wd (uint32_t crc,$/;"	f	typeref:typename:uint32_t ZEXPORT
crc32_wd_buf	lib/crc32.c	/^void crc32_wd_buf(const unsigned char *input, unsigned int ilen,$/;"	f	typeref:typename:void
crc32table_be	drivers/mtd/ubi/crc32table.h	/^static const u32 crc32table_be[] = {$/;"	v	typeref:typename:const u32[]
crc32table_le	drivers/mtd/ubi/crc32table.h	/^static const u32 crc32table_le[] = {$/;"	v	typeref:typename:const u32[]
crc7	lib/crc7.c	/^u8 crc7(u8 crc, const u8 *buffer, size_t len)$/;"	f	typeref:typename:u8
crc7_byte	include/linux/crc7.h	/^static inline u8 crc7_byte(u8 crc, u8 data)$/;"	f	typeref:typename:u8
crc7_syndrome_table	lib/crc7.c	/^const u8 crc7_syndrome_table[256] = {$/;"	v	typeref:typename:const u8[256]
crc8	drivers/tpm/tpm_tis_sandbox.c	/^	uint8_t crc8;$/;"	m	struct:rollback_space_kernel	typeref:typename:uint8_t	file:
crc8	lib/crc8.c	/^unsigned int crc8(unsigned int crc, const unsigned char *vptr, int len)$/;"	f	typeref:typename:unsigned int
crc_addr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     crc_addr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
crc_addr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 crc_addr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
crc_addr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 crc_addr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
crc_aud_sync_clk_rate	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_aud_sync_clk_rate;	\/* _AUDIO_SYNC_CLK_RATE_0,0x38 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_audio_sync_clk_i2s0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_audio_sync_clk_i2s0;	\/* _AUDIO_SYNC_CLK_I2S0_0, 0x4A0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_audio_sync_clk_i2s1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_audio_sync_clk_i2s1;	\/* _AUDIO_SYNC_CLK_I2S1_0, 0x4A4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_audio_sync_clk_i2s2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_audio_sync_clk_i2s2;	\/* _AUDIO_SYNC_CLK_I2S2_0, 0x4A8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_audio_sync_clk_i2s3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_audio_sync_clk_i2s3;	\/* _AUDIO_SYNC_CLK_I2S3_0, 0x4AC *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_audio_sync_clk_i2s4	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_audio_sync_clk_i2s4;	\/* _AUDIO_SYNC_CLK_I2S4_0, 0x4B0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_audio_sync_clk_spdif	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_audio_sync_clk_spdif;	\/* _AUDIO_SYNC_CLK_SPDIF_0, 0x4B4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cclk_brst_pol	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cclk_brst_pol;		\/* _CCLK_BURST_POLICY_0, 0x20 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cclkg_brst_pol	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cclkg_brst_pol;	\/* _CCLKG_BURST_POLICY_0,   0x368 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cclklp_brst_pol	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cclklp_brst_pol;	\/* _CCLKLP_BURST_POLICY_0,  0x370 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_checksum	arch/arm/include/asm/arch-tegra/dc.h	/^	uint crc_checksum;		\/* _COM_CRC_CHECKSUM_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
crc_checksum_latched	arch/arm/include/asm/arch-tegra/dc.h	/^	uint crc_checksum_latched;	\/* _COM_CRC_CHECKSUM_LATCHED_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
crc_clk_cpu_cmplx	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpu_cmplx;		\/* _CLK_CPU_CMPLX_0,	0x4C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpu_cmplx_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpu_cmplx_clr;	\/* _CLK_CPU_CMPLX_SET_0,    0x34c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpu_cmplx_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpu_cmplx_set;	\/* _CLK_CPU_CMPLX_SET_0,    0x348 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpu_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpu_misc;		\/* _CLK_CPU_MISC_0, 0x53C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpug_cmplx	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpug_cmplx;	\/* _CLK_CPUG_CMPLX_0,       0x378 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpug_cmplx_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpug_cmplx_clr;	\/* _CLK_CPUG_CMPLX_CLR_0,  0x464 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpug_cmplx_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpug_cmplx_set;	\/* _CLK_CPUG_CMPLX_SET_0,  0x460 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpug_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpug_misc;		\/* _CLK_CPUG_MISC_0, 0x540 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpulp_cmplx	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpulp_cmplx;	\/* _CLK_CPULP_CMPLX_0,      0x37C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpulp_cmplx_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpulp_cmplx_clr;	\/* _CLK_CPULP_CMPLX_CLR_0, 0x46C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpulp_cmplx_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpulp_cmplx_set;	\/* _CLK_CPULP_CMPLX_SET_0, 0x468 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_cpulp_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_cpulp_misc;	\/* _CLK_CPULP_MISC_0, 0x544 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_enb_ex	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_set_clr crc_clk_enb_ex[TEGRA_CLK_REGS];$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_set_clr[]
crc_clk_enb_ex_vw	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_set_clr crc_clk_enb_ex_vw[TEGRA_CLK_REGS_VW];$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_set_clr[]
crc_clk_enb_x_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_enb_x_clr;		\/* _CLK_ENB_X_CLR_0,	0x288 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_enb_x_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_enb_x_set;		\/* _CLK_ENB_X_SET_0,	0x284 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_enb_y_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_enb_y_clr;		\/* _CLK_ENB_Y_CLR_0,	0x2a0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_enb_y_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_enb_y_set;		\/* _CLK_ENB_Y_SET_0,	0x29c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_mask_arm	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_mask_arm;		\/* _CLK_MASK_ARM_0,	0x44 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_out_enb	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_out_enb[TEGRA_CLK_REGS];	\/* _CLK_OUT_ENB_L\/H\/U_0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_clk_out_enb_vw	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_out_enb_vw[TEGRA_CLK_REGS_VW]; \/* _CLK_OUT_ENB_V\/W_0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_clk_out_enb_x	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_out_enb_x;		\/* _CLK_OUT_ENB_X_0,	0x280 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_out_enb_y	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_out_enb_y;		\/* _CLK_OUT_ENB_Y_0,	0x298 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_clk_src	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_src[TEGRA_CLK_SOURCES]; \/*_I2S1_0...	0x100-1fc *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_clk_src_vw	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_src_vw[TEGRA_CLK_SOURCES_VW];	\/* 0x3B0-0x42C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_clk_src_x	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_src_x[TEGRA_CLK_SOURCES_X]; \/* XUSB, etc, 0x600-0x67C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_clk_src_y	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_src_y[TEGRA_CLK_SOURCES_Y]; \/* SPARE1, etc, 0x694-0x6D8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_clk_sys_rate	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_clk_sys_rate;		\/* _CLK_SYSTEM_RATE_0,	0x30 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_con	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	crc_con;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
crc_cop_clk_skip_plcy	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cop_clk_skip_plcy;	\/* _COP_CLK_SKIP_POLICY_0,0x40 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cpu_cmplx_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cpu_cmplx_clr;		\/* _RST_CPU_CMPLX_CLR_0,    0x344 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cpu_cmplx_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cpu_cmplx_set;		\/* _RST_CPU_CMPLX_SET_0,    0x340 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cpu_cmplx_status	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cpu_cmplx_status;	\/* _CPU_CMPLX_STATUS_0,    0x470 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cpu_softrst_ctrl	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cpu_softrst_ctrl;	\/* _CPU_SOFTRST_CTRL_0,     0x380 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cpu_softrst_ctrl1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cpu_softrst_ctrl1;	\/* _CPU_SOFTRST_CTRL1_0,    0x384 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_cpu_softrst_ctrl2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_cpu_softrst_ctrl2;	\/* _CPU_SOFTRST_CTRL2_0,    0x388 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint crc_ctrl;			\/* _COM_CRC_CONTROL_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
crc_dfll_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_dfll_base;		\/* _DFLL_BASE_0,	0x2f4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_dma_desc	drivers/ddr/marvell/axp/xor.h	/^struct crc_dma_desc {$/;"	s
crc_intmask	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_intmask;		\/* __INTMASK_0,         0x47C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_intstatus	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_intstatus;		\/* __INTSTATUS_0,       0x478 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_misc_clk_enb	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_misc_clk_enb;		\/* _MISC_CLK_ENB_0,	0x48 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_mode	common/xyzModem.c	/^  bool crc_mode, at_eof, tx_ack;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:bool	file:
crc_osc_ctrl	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_osc_ctrl;		\/* _OSC_CTRL_0,		0x50 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_osc_freq_det	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_osc_freq_det;		\/* _OSC_FREQ_DET_0,	0x58 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_osc_freq_det_stat	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_osc_freq_det_stat;	\/* _OSC_FREQ_DET_STATUS_0,0x5C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pcie_pll_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pcie_pll_cfg0;		\/* _PCIE_PLL_CFG0_0,	0x498 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pll	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_pll crc_pll[TEGRA_CLK_PLLS];	\/* PLLs from 0x80 to 0xdc *\/$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_pll[]
crc_pll_lfsr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pll_lfsr;		\/* _PLL_LFSR_0,		0x54 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pll_simple	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_pll_simple crc_pll_simple[TEGRA_CLK_SIMPLE_PLLS];$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_pll_simple[]
crc_pllc2_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc2_base;		\/* _PLLC2_BASE_0, 0x4E8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc2_misc0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc2_misc0;		\/* _PLLC2_MISC_0_0, 0x4EC *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc2_misc1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc2_misc1;		\/* _PLLC2_MISC_1_0, 0x4F0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc2_misc2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc2_misc2;		\/* _PLLC2_MISC_2_0, 0x4F4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc2_misc3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc2_misc3;		\/* _PLLC2_MISC_3_0, 0x4F8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc3_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc3_base;		\/* _PLLC3_BASE_0, 0x4FC *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc3_misc0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc3_misc0;		\/* _PLLC3_MISC_0_0, 0x500 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc3_misc1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc3_misc1;		\/* _PLLC3_MISC_1_0, 0x504 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc3_misc2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc3_misc2;		\/* _PLLC3_MISC_2_0, 0x508 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllc3_misc3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllc3_misc3;		\/* _PLLC3_MISC_3_0, 0x50C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_plld2_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_plld2_base;		\/* _PLLD2_BASE_0, 0x4B8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_plld2_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_plld2_misc;		\/* _PLLD2_MISC_0, 0x4BC *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_plld2_ss_cfg	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	u32 crc_plld2_ss_cfg;		\/* _PLLD2_SS_CFG            0x570 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:u32
crc_plldp_ss_cfg	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	u32 crc_plldp_ss_cfg;		\/* _PLLDP_SS_CFG, 0x598 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:u32
crc_plle_aux	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_plle_aux;		\/* _PLLE_AUX_0,		0x48C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_plle_aux1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_plle_aux1;		\/* _PLLE_AUX1_0, 0x524 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllp_reshift	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllp_reshift;		\/* _PLLP_RESHIFT_0, 0x528 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllrefe_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllrefe_base;		\/* _PLLREFE_BASE_0, 0x4C4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllrefe_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllrefe_misc;		\/* _PLLREFE_MISC_0, 0x4C8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllu_hw_pwrdn_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllu_hw_pwrdn_cfg0;	\/* _PLLU_HW_PWRDN_CFG0_0, 0x530 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllx_hw_ctrl_cfg	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllx_hw_ctrl_cfg;	\/* _PLLX_HW_CTRL_CFG_0, 0x548 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllx_hw_ctrl_status	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllx_hw_ctrl_status;	\/* _PLLX_HW_CTRL_STATUS_0, 0x550 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllx_misc1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllx_misc1;		\/* _PLLX_MISC_1_0, 0x510 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllx_misc2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllx_misc2;		\/* _PLLX_MISC_2_0, 0x514 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllx_misc3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllx_misc3;		\/* _PLLX_MISC_3_0, 0x518 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pllx_sw_ramp_cfg	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_pllx_sw_ramp_cfg;	\/* _PLLX_SW_RAMP_CFG_0, 0x54C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_pos	drivers/video/fsl_dcu_fb.c	/^	u32 crc_pos;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
crc_prog_audio_dly_clk	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_prog_audio_dly_clk;	\/* _PROG_AUDIO_DLY_CLK_0, 0x49C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_prog_dly_clk	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_prog_dly_clk;		\/* _PROG_DLY_CLK_0,	0x34 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_reserved0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved0;		\/* reserved_0,		0x1C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_reserved1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved1;		\/* reserved_1,		0x3C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_reserved10	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved10;		\/* _reserved_10,	0xF8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_reserved11	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved11;		\/* _reserved_11,	0xFC *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_reserved2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved2[8];		\/* reserved_2[8],	0x60-7C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[8]
crc_reserved20	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved20[32];	\/* _reserved_20,	0x200-27c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[32]
crc_reserved21	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved21[17];	\/* _reserved_21,	0x2b0-2f0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[17]
crc_reserved22	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved22[2];		\/* _reserved_22,	0x2f8-2fc *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[2]
crc_reserved30	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved30[2];		\/* _reserved_30,	0x318, 0x31c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[2]
crc_reserved31	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved31[2];		\/* _reserved_31,	0x338, 0x33c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[2]
crc_reserved32	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved32[2];		\/* _reserved_32,      0x350,0x354 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[2]
crc_reserved33	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved33[9];		\/* _reserved_33,        0x38c-3ac *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[9]
crc_reserved40	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved40[1];		\/* _reserved_40,        0x474 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[1]
crc_reserved51	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved51[1];		\/* _reserved_51, 0x538 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[1]
crc_reserved52	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved52[1];		\/* _reserved_52, 0x554 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[1]
crc_reserved61	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_reserved61[5];	\/* _reserved_61, 0x680 - 0x690 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[5]
crc_reset_id	arch/arm/include/asm/arch-tegra/clock.h	/^enum crc_reset_id {$/;"	g
crc_result	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	crc_result;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
crc_result2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	crc_result2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
crc_rst_cpu	arch/arm/include/asm/arch-tegra/clock.h	/^	crc_rst_cpu = 1,$/;"	e	enum:crc_reset_id
crc_rst_cpug_cmplx_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_cpug_cmplx_clr;	\/* _RST_CPUG_CMPLX_CLR_0,  0x454 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_cpug_cmplx_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_cpug_cmplx_set;	\/* _RST_CPUG_CMPLX_SET_0,  0x450 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_cpulp_cmplx_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_cpulp_cmplx_clr;	\/* _RST_CPULP_CMPLX_CLR_0, 0x45C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_cpulp_cmplx_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_cpulp_cmplx_set;	\/* _RST_CPULP_CMPLX_SET_0, 0x458 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_de	arch/arm/include/asm/arch-tegra/clock.h	/^	crc_rst_de = 1 << 4,	\/* What is de? *\/$/;"	e	enum:crc_reset_id
crc_rst_debug	arch/arm/include/asm/arch-tegra/clock.h	/^	crc_rst_debug = 1 << 12,$/;"	e	enum:crc_reset_id
crc_rst_dev	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_dev[TEGRA_CLK_REGS];	\/* _RST_DEVICES_L\/H\/U_0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_rst_dev_ex	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_set_clr crc_rst_dev_ex[TEGRA_CLK_REGS];$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_set_clr[]
crc_rst_dev_ex_vw	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_set_clr crc_rst_dev_ex_vw[TEGRA_CLK_REGS_VW];$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_set_clr[]
crc_rst_dev_vw	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_dev_vw[TEGRA_CLK_REGS_VW]; \/* _RST_DEVICES_V\/W_0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[]
crc_rst_dev_x_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_dev_x_clr;		\/* _RST_DEV_X_CLR_0,	0x294 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_dev_x_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_dev_x_set;		\/* _RST_DEV_X_SET_0,	0x290 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_dev_y_clr	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_dev_y_clr;		\/* _RST_DEV_Y_CLR_0,	0x2ac *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_dev_y_set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_dev_y_set;		\/* _RST_DEV_Y_SET_0,	0x2a8 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_devices_x	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_devices_x;		\/* _RST_DEVICES_X_0,	0x28c *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_devices_y	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_devices_y;		\/* _RST_DEVICES_Y_0,	0x2a4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_src	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_rst_src;			\/* _RST_SOURCE_0,0x00 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_rst_watchdog	arch/arm/include/asm/arch-tegra/clock.h	/^	crc_rst_watchdog = 1 << 8,$/;"	e	enum:crc_reset_id
crc_sata_pll_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_sata_pll_cfg0;		\/* _SATA_PLL_CFG0_0,	0x490 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_sata_pll_cfg1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_sata_pll_cfg1;		\/* _SATA_PLL_CFG1_0,	0x494 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_sclk_brst_pol	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_sclk_brst_pol;		\/* _SCLK_BURST_POLICY_0, 0x28 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_spare_reg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_spare_reg0;		\/* _SPARE_REG0_0, 0x55C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_super_cclk_div	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_super_cclk_div;	\/* _SUPER_CCLK_DIVIDER_0,0x24 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_super_cclkg_div	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_super_cclkg_div;	\/* _SUPER_CCLKG_DIVIDER_0,  0x36C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_super_cclkp_div	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_super_cclkp_div;	\/* _SUPER_CCLKLP_DIVIDER_0, 0x374 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_super_gr3d_clk_div	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_super_gr3d_clk_div;	\/* _SUPER_GR3D_CLK_DIVIDER_0, 0x558 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_super_sclk_div	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_super_sclk_div;	\/* _SUPER_SCLK_DIVIDER_0,0x2C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_table	lib/crc32.c	/^local const uint32_t crc_table[256] = {$/;"	v	typeref:typename:local const uint32_t[256]
crc_table	lib/crc32.c	/^local uint32_t crc_table[256];$/;"	v	typeref:typename:local uint32_t[256]
crc_table	tools/pbl_crc32.c	/^static uint32_t crc_table[256];$/;"	v	typeref:typename:uint32_t[256]	file:
crc_table_empty	lib/crc32.c	/^local int crc_table_empty = 1;$/;"	v	typeref:typename:local int
crc_table_valid	tools/pbl_crc32.c	/^static int crc_table_valid;$/;"	v	typeref:typename:int	file:
crc_utmip_pll_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_utmip_pll_cfg0;	\/* _UTMIP_PLL_CFG0_0,	0x480 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_utmip_pll_cfg1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_utmip_pll_cfg1;	\/* _UTMIP_PLL_CFG1_0,	0x484 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_utmip_pll_cfg2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_utmip_pll_cfg2;	\/* _UTMIP_PLL_CFG2_0,	0x488 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_utmip_pll_cfg3	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_utmip_pll_cfg3;	\/* _UTMIP_PLL_CFG3_0, 0x4C0 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_utmipll_hw_pwrdn_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_utmipll_hw_pwrdn_cfg0;	\/* _UTMIPLL_HW_PWRDN_CFG0_0, 0x52C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_val	drivers/video/fsl_dcu_fb.c	/^	u32 crc_val;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
crc_value	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     crc_value;$/;"	m	struct:ocotp_regs	typeref:typename:u32
crc_value	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 crc_value;$/;"	m	struct:ocotp_regs	typeref:typename:u32
crc_value	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 crc_value;$/;"	m	struct:ocotp_regs	typeref:typename:u32
crc_xusb_pll_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_xusb_pll_cfg0;		\/* _XUSB_PLL_CFG0_0, 0x534 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_xusbio_pll_cfg0	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_xusbio_pll_cfg0;	\/* _XUSBIO_PLL_CFG0_0, 0x51C *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crc_xusbio_pll_cfg1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crc_xusbio_pll_cfg1;	\/* _XUSBIO_PLL_CFG0_1, 0x520 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint
crcec	include/commproc.h	/^	ushort	crcec;		\/* CRC error counter *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
crcer_ftl	drivers/net/ftmac100.h	/^	unsigned int	crcer_ftl;	\/* 0xe4 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
crcerrs	drivers/net/e1000.h	/^	uint64_t crcerrs;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
crdr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 crdr;	\/* CCM Reset and Debug *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
cread_add_char	common/cli_readline.c	/^static void cread_add_char(char ichar, int insert, unsigned long *num,$/;"	f	typeref:typename:void	file:
cread_add_str	common/cli_readline.c	/^static void cread_add_str(char *str, int strsize, int insert,$/;"	f	typeref:typename:void	file:
cread_add_to_hist	common/cli_readline.c	/^static void cread_add_to_hist(char *line)$/;"	f	typeref:typename:void	file:
cread_line	common/cli_readline.c	/^static int cread_line(const char *const prompt, char *buf, unsigned int *len,$/;"	f	typeref:typename:int	file:
cread_print_hist_list	common/cli_readline.c	/^static void cread_print_hist_list(void)$/;"	f	typeref:typename:void	file:
creat_sqnum	fs/ubifs/ubifs-media.h	/^	__le64 creat_sqnum;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le64
creat_sqnum	fs/ubifs/ubifs.h	/^	unsigned long long creat_sqnum;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned long long
createPopupMenu	scripts/kconfig/qconf.cc	/^Q3PopupMenu* ConfigInfoView::createPopupMenu(const QPoint& pos)$/;"	f	class:ConfigInfoView	typeref:typename:Q3PopupMenu *
create_bbt	drivers/mtd/nand/nand_bbt.c	/^static int create_bbt(struct mtd_info *mtd, uint8_t *buf,$/;"	f	typeref:typename:int	file:
create_bbt	drivers/mtd/onenand/onenand_bbt.c	/^static int create_bbt(struct mtd_info *mtd, uint8_t * buf,$/;"	f	typeref:typename:int	file:
create_call_list	cmd/trace.c	/^static int create_call_list(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
create_ccsr_l2_tlb	arch/powerpc/cpu/mpc85xx/start.S	/^create_ccsr_l2_tlb:$/;"	l
create_ccsr_new_tlb	arch/powerpc/cpu/mpc85xx/start.S	/^create_ccsr_new_tlb:$/;"	l
create_ccsr_old_tlb	arch/powerpc/cpu/mpc85xx/start.S	/^create_ccsr_old_tlb:$/;"	l
create_children	test/dm/core.c	/^static int create_children(struct unit_test_state *uts, struct udevice *parent,$/;"	f	typeref:typename:int	file:
create_default_filesystem	fs/ubifs/sb.c	/^static int create_default_filesystem(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
create_empty_lvol	drivers/mtd/ubi/vtbl.c	/^static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_vtbl_record *	file:
create_event_ex	include/efi_api.h	/^	void *create_event_ex;$/;"	m	struct:efi_boot_services	typeref:typename:void *
create_files	test/fs/fs-test.sh	/^function create_files() {$/;"	f
create_files	test/image/test-imagetools.sh	/^create_files()$/;"	f
create_fit_image	test/image/test-imagetools.sh	/^create_fit_image()$/;"	f
create_func_list	cmd/trace.c	/^static int create_func_list(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
create_image	test/fs/fs-test.sh	/^function create_image() {$/;"	f
create_init_ram_area	arch/powerpc/cpu/mpc85xx/start.S	/^create_init_ram_area:$/;"	l
create_int_queue	drivers/usb/host/ehci-hcd.c	/^struct int_queue *create_int_queue(struct usb_device *dev,$/;"	f	typeref:struct:int_queue *
create_int_queue	drivers/usb/host/ohci-hcd.c	/^struct int_queue *create_int_queue(struct usb_device *dev,$/;"	f	typeref:struct:int_queue *
create_int_queue	drivers/usb/host/usb-uclass.c	/^struct int_queue *create_int_queue(struct usb_device *udev,$/;"	f	typeref:struct:int_queue *
create_int_queue	drivers/usb/musb-new/musb_uboot.c	/^struct int_queue *create_int_queue(struct usb_device *dev,$/;"	f	typeref:struct:int_queue *
create_int_queue	include/usb.h	/^	struct int_queue * (*create_int_queue)(struct udevice *bus,$/;"	m	struct:dm_usb_ops	typeref:struct:int_queue * (*)(struct udevice * bus,struct usb_device * udev,unsigned long pipe,int queuesize,int elementsize,void * buffer,int interval)
create_keymap	drivers/input/key_matrix.c	/^static uchar *create_keymap(struct key_matrix *config, u32 *data, int len,$/;"	f	typeref:typename:uchar *	file:
create_lookup_table	drivers/mtd/nand/atmel_nand.c	/^static uint16_t *create_lookup_table(int sector_size)$/;"	f	typeref:typename:uint16_t *	file:
create_mtd_concat	drivers/mtd/nand/nand.c	/^static void create_mtd_concat(void)$/;"	f	typeref:typename:void	file:
create_multi_image	test/image/test-imagetools.sh	/^create_multi_image()$/;"	f
create_parameterlist	scripts/kernel-doc	/^sub create_parameterlist($$$) {$/;"	s
create_phy_by_mask	drivers/net/phy/phy.c	/^static struct phy_device *create_phy_by_mask(struct mii_dev *bus,$/;"	f	typeref:struct:phy_device *	file:
create_pipe	include/usb.h	/^#define create_pipe(/;"	d
create_pirq_routing_table	arch/x86/cpu/irq.c	/^static int create_pirq_routing_table(struct udevice *dev)$/;"	f	typeref:typename:int	file:
create_proc_files	drivers/usb/gadget/dwc2_udc_otg.c	/^#define create_proc_files(/;"	d	file:
create_proto3_request	drivers/misc/cros_ec.c	/^static int create_proto3_request(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int	file:
create_request_auth	lib/tpm.c	/^static uint32_t create_request_auth(const void *request, size_t request_len0,$/;"	f	typeref:typename:uint32_t	file:
create_table	arch/arm/cpu/armv8/cache_v8.c	/^static u64 *create_table(void)$/;"	f	typeref:typename:u64 *	file:
create_temp_law	arch/powerpc/cpu/mpc85xx/start.S	/^create_temp_law:$/;"	l
create_tlb0_entry	arch/powerpc/cpu/mpc85xx/start.S	/^	.macro	create_tlb0_entry esel ts tsize epn wimg rpn perm phy_high scratch$/;"	m
create_tlb1_entry	arch/powerpc/cpu/mpc85xx/start.S	/^	.macro	create_tlb1_entry esel ts tsize epn wimg rpn perm phy_high scratch$/;"	m
create_usage	arch/arm/imx-common/cmd_bmode.c	/^static int create_usage(char *dest)$/;"	f	typeref:typename:int	file:
create_vtbl	drivers/mtd/ubi/vtbl.c	/^static int create_vtbl(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int	file:
creationdate	disk/part_iso.h	/^	unsigned char creationdate[17]; \/* creation date *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[17]
creationdate	disk/part_iso.h	/^	unsigned char creationdate[17]; \/* creation date *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[17]
creator_id	arch/x86/include/asm/sfi.h	/^	uint32_t creator_id;$/;"	m	struct:sfi_xsdt_header	typeref:typename:uint32_t
creator_os	include/ext_common.h	/^	__le32 creator_os;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
creator_revision	arch/x86/include/asm/sfi.h	/^	uint32_t creator_revision;$/;"	m	struct:sfi_xsdt_header	typeref:typename:uint32_t
creg	drivers/usb/gadget/at91_udc.h	/^	void __iomem			*creg;$/;"	m	struct:at91_ep	typeref:typename:void __iomem *
crfapb_base	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define crfapb_base /;"	d
crfapb_regs	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct crfapb_regs {$/;"	s
crgat	include/tsi148.h	/^	unsigned int crgat;                   \/* 0x414         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
crh	drivers/gpio/stm32_gpio.c	/^	u32 crh;	\/* GPIO port configuration high *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
crit_return	arch/powerpc/cpu/ppc4xx/start.S	/^crit_return:$/;"	l
crit_status	include/mpc5xxx.h	/^	volatile u32	crit_status;	\/* INTR + 0x28 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
critical	drivers/thermal/imx_thermal.c	/^	int critical;$/;"	m	struct:thermal_data	typeref:typename:int	file:
crl	drivers/gpio/stm32_gpio.c	/^	u32 crl;	\/* GPIO port configuration low *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
crlapb_base	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define crlapb_base /;"	d
crlapb_regs	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct crlapb_regs {$/;"	s
crnr_ls	include/fsl_sec.h	/^	u32	crnr_ls;	\/* CHA Revision Number Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
crnr_ms	include/fsl_sec.h	/^	u32	crnr_ms;	\/* CHA Revision Number Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
crol	include/tsi148.h	/^	unsigned int crol;                    \/* 0x41c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
cros_ec	arch/arm/dts/exynos5250-snow.dts	/^			cros_ec: embedded-controller {$/;"	l	label:i2c_104
cros_ec	arch/arm/dts/exynos5250-spring.dts	/^	cros_ec: embedded-controller {$/;"	l
cros_ec	arch/arm/dts/exynos5420-peach-pit.dts	/^	cros_ec: cros-ec@0 {$/;"	l
cros_ec	arch/arm/dts/exynos5800-peach-pi.dts	/^	cros_ec: cros-ec@0 {$/;"	l
cros_ec	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	cros_ec: ec@0 {$/;"	l
cros_ec	arch/arm/dts/tegra124-nyan.dtsi	/^		cros_ec: cros-ec@0 {$/;"	l
cros_ec	arch/sandbox/dts/sandbox.dts	/^	cros_ec: cros-ec@0 {$/;"	l
cros_ec_calc_checksum	drivers/misc/cros_ec.c	/^int cros_ec_calc_checksum(const uint8_t *data, int size)$/;"	f	typeref:typename:int
cros_ec_check_keyboard	drivers/misc/cros_ec_sandbox.c	/^void cros_ec_check_keyboard(struct cros_ec_dev *dev)$/;"	f	typeref:typename:void
cros_ec_check_version	drivers/misc/cros_ec.c	/^static int cros_ec_check_version(struct cros_ec_dev *dev)$/;"	f	typeref:typename:int	file:
cros_ec_clear_host_events	drivers/misc/cros_ec.c	/^int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events)$/;"	f	typeref:typename:int
cros_ec_data_is_erased	drivers/misc/cros_ec.c	/^static int cros_ec_data_is_erased(const uint32_t *data, int size)$/;"	f	typeref:typename:int	file:
cros_ec_decode_ec_flash	drivers/misc/cros_ec.c	/^int cros_ec_decode_ec_flash(const void *blob, int node,$/;"	f	typeref:typename:int
cros_ec_decode_region	drivers/misc/cros_ec.c	/^int cros_ec_decode_region(int argc, char * const argv[])$/;"	f	typeref:typename:int
cros_ec_dev	include/cros_ec.h	/^struct cros_ec_dev {$/;"	s
cros_ec_dump_data	drivers/misc/cros_ec.c	/^void cros_ec_dump_data(const char *name, int cmd, const uint8_t *data, int len)$/;"	f	typeref:typename:void
cros_ec_flash_erase	drivers/misc/cros_ec.c	/^int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, uint32_t size)$/;"	f	typeref:typename:int
cros_ec_flash_offset	drivers/misc/cros_ec.c	/^int cros_ec_flash_offset(struct cros_ec_dev *dev, enum ec_flash_region region,$/;"	f	typeref:typename:int
cros_ec_flash_protect	drivers/misc/cros_ec.c	/^int cros_ec_flash_protect(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int
cros_ec_flash_read	drivers/misc/cros_ec.c	/^int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset,$/;"	f	typeref:typename:int
cros_ec_flash_read_block	drivers/misc/cros_ec.c	/^static int cros_ec_flash_read_block(struct cros_ec_dev *dev, uint8_t *data,$/;"	f	typeref:typename:int	file:
cros_ec_flash_update_rw	drivers/misc/cros_ec.c	/^int cros_ec_flash_update_rw(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int
cros_ec_flash_write	drivers/misc/cros_ec.c	/^int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data,$/;"	f	typeref:typename:int
cros_ec_flash_write_block	drivers/misc/cros_ec.c	/^static int cros_ec_flash_write_block(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int	file:
cros_ec_flash_write_burst_size	drivers/misc/cros_ec.c	/^static int cros_ec_flash_write_burst_size(struct cros_ec_dev *dev)$/;"	f	typeref:typename:int	file:
cros_ec_get_error	common/cros_ec.c	/^int cros_ec_get_error(void)$/;"	f	typeref:typename:int
cros_ec_get_host_events	drivers/misc/cros_ec.c	/^int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr)$/;"	f	typeref:typename:int
cros_ec_get_ldo	drivers/misc/cros_ec.c	/^int cros_ec_get_ldo(struct udevice *dev, uint8_t index, uint8_t *state)$/;"	f	typeref:typename:int
cros_ec_i2c_bus	drivers/i2c/cros_ec_tunnel.c	/^struct cros_ec_i2c_bus {$/;"	s	file:
cros_ec_i2c_command	drivers/misc/cros_ec_i2c.c	/^static int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd,$/;"	f	typeref:typename:int	file:
cros_ec_i2c_ids	drivers/i2c/cros_ec_ldo.c	/^static const struct udevice_id cros_ec_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_i2c_ids	drivers/i2c/cros_ec_tunnel.c	/^static const struct udevice_id cros_ec_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_i2c_ofdata_to_platdata	drivers/i2c/cros_ec_tunnel.c	/^static int cros_ec_i2c_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cros_ec_i2c_ops	drivers/i2c/cros_ec_ldo.c	/^static const struct dm_i2c_ops cros_ec_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
cros_ec_i2c_ops	drivers/i2c/cros_ec_tunnel.c	/^static const struct dm_i2c_ops cros_ec_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
cros_ec_i2c_set_bus_speed	drivers/i2c/cros_ec_tunnel.c	/^static int cros_ec_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
cros_ec_i2c_tunnel	drivers/misc/cros_ec.c	/^int cros_ec_i2c_tunnel(struct udevice *dev, int port, struct i2c_msg *in,$/;"	f	typeref:typename:int
cros_ec_i2c_xfer	drivers/i2c/cros_ec_tunnel.c	/^static int cros_ec_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
cros_ec_ids	drivers/misc/cros_ec_i2c.c	/^static const struct udevice_id cros_ec_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_ids	drivers/misc/cros_ec_lpc.c	/^static const struct udevice_id cros_ec_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_ids	drivers/misc/cros_ec_sandbox.c	/^static const struct udevice_id cros_ec_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_ids	drivers/misc/cros_ec_spi.c	/^static const struct udevice_id cros_ec_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_info	drivers/misc/cros_ec.c	/^int cros_ec_info(struct cros_ec_dev *dev, struct ec_response_mkbp_info *info)$/;"	f	typeref:typename:int
cros_ec_interrupt_pending	drivers/misc/cros_ec.c	/^int cros_ec_interrupt_pending(struct udevice *dev)$/;"	f	typeref:typename:int
cros_ec_invalidate_hash	drivers/misc/cros_ec.c	/^static int cros_ec_invalidate_hash(struct cros_ec_dev *dev)$/;"	f	typeref:typename:int	file:
cros_ec_kbc_check	drivers/input/cros_ec_keyb.c	/^int cros_ec_kbc_check(struct input_config *input)$/;"	f	typeref:typename:int
cros_ec_kbd_ids	drivers/input/cros_ec_keyb.c	/^static const struct udevice_id cros_ec_kbd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
cros_ec_kbd_ops	drivers/input/cros_ec_keyb.c	/^static const struct keyboard_ops cros_ec_kbd_ops = {$/;"	v	typeref:typename:const struct keyboard_ops	file:
cros_ec_kbd_probe	drivers/input/cros_ec_keyb.c	/^static int cros_ec_kbd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cros_ec_keyb_decode_fdt	drivers/input/cros_ec_keyb.c	/^static int cros_ec_keyb_decode_fdt(const void *blob, int node,$/;"	f	typeref:typename:int	file:
cros_ec_keyb_priv	drivers/input/cros_ec_keyb.c	/^struct cros_ec_keyb_priv {$/;"	s	file:
cros_ec_keyscan	drivers/misc/cros_ec_sandbox.c	/^static int cros_ec_keyscan(struct ec_state *ec, uint8_t *scan)$/;"	f	typeref:typename:int	file:
cros_ec_ldo_set_bus_speed	drivers/i2c/cros_ec_ldo.c	/^static int cros_ec_ldo_set_bus_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
cros_ec_ldo_tunnel	arch/arm/dts/exynos5250-spring.dts	/^		cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {$/;"	l	label:cros_ec
cros_ec_ldo_xfer	drivers/i2c/cros_ec_ldo.c	/^static int cros_ec_ldo_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
cros_ec_lpc_check_version	drivers/misc/cros_ec_lpc.c	/^static int cros_ec_lpc_check_version(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cros_ec_lpc_command	drivers/misc/cros_ec_lpc.c	/^int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version,$/;"	f	typeref:typename:int
cros_ec_lpc_init	drivers/misc/cros_ec_lpc.c	/^int cros_ec_lpc_init(struct cros_ec_dev *dev, const void *blob)$/;"	f	typeref:typename:int
cros_ec_ops	drivers/misc/cros_ec_i2c.c	/^static struct dm_cros_ec_ops cros_ec_ops = {$/;"	v	typeref:struct:dm_cros_ec_ops	file:
cros_ec_ops	drivers/misc/cros_ec_lpc.c	/^static struct dm_cros_ec_ops cros_ec_ops = {$/;"	v	typeref:struct:dm_cros_ec_ops	file:
cros_ec_ops	drivers/misc/cros_ec_sandbox.c	/^struct dm_cros_ec_ops cros_ec_ops = {$/;"	v	typeref:struct:dm_cros_ec_ops
cros_ec_ops	drivers/misc/cros_ec_spi.c	/^static struct dm_cros_ec_ops cros_ec_ops = {$/;"	v	typeref:struct:dm_cros_ec_ops	file:
cros_ec_probe	drivers/misc/cros_ec_i2c.c	/^static int cros_ec_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cros_ec_probe	drivers/misc/cros_ec_lpc.c	/^static int cros_ec_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cros_ec_probe	drivers/misc/cros_ec_sandbox.c	/^int cros_ec_probe(struct udevice *dev)$/;"	f	typeref:typename:int
cros_ec_probe	drivers/misc/cros_ec_spi.c	/^static int cros_ec_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
cros_ec_read_build_info	drivers/misc/cros_ec.c	/^int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp)$/;"	f	typeref:typename:int
cros_ec_read_current_image	drivers/misc/cros_ec.c	/^int cros_ec_read_current_image(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int
cros_ec_read_flashinfo	drivers/misc/cros_ec.c	/^int cros_ec_read_flashinfo(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int
cros_ec_read_hash	drivers/misc/cros_ec.c	/^int cros_ec_read_hash(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int
cros_ec_read_id	drivers/misc/cros_ec.c	/^int cros_ec_read_id(struct cros_ec_dev *dev, char *id, int maxlen)$/;"	f	typeref:typename:int
cros_ec_read_state	drivers/misc/cros_ec_sandbox.c	/^static int cros_ec_read_state(const void *blob, int node)$/;"	f	typeref:typename:int	file:
cros_ec_read_vbnvcontext	drivers/misc/cros_ec.c	/^int cros_ec_read_vbnvcontext(struct cros_ec_dev *dev, uint8_t *block)$/;"	f	typeref:typename:int
cros_ec_read_version	drivers/misc/cros_ec.c	/^int cros_ec_read_version(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int
cros_ec_reboot	drivers/misc/cros_ec.c	/^int cros_ec_reboot(struct cros_ec_dev *dev, enum ec_reboot_cmd cmd,$/;"	f	typeref:typename:int
cros_ec_register	drivers/misc/cros_ec.c	/^int cros_ec_register(struct udevice *dev)$/;"	f	typeref:typename:int
cros_ec_sandbox_packet	drivers/misc/cros_ec_sandbox.c	/^int cros_ec_sandbox_packet(struct udevice *udev, int out_bytes, int in_bytes)$/;"	f	typeref:typename:int
cros_ec_scan_keyboard	drivers/misc/cros_ec.c	/^int cros_ec_scan_keyboard(struct udevice *dev, struct mbkp_keyscan *scan)$/;"	f	typeref:typename:int
cros_ec_set_ldo	drivers/misc/cros_ec.c	/^int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state)$/;"	f	typeref:typename:int
cros_ec_spi_command	drivers/misc/cros_ec_spi.c	/^int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version,$/;"	f	typeref:typename:int
cros_ec_spi_packet	drivers/misc/cros_ec_spi.c	/^int cros_ec_spi_packet(struct udevice *udev, int out_bytes, int in_bytes)$/;"	f	typeref:typename:int
cros_ec_test	drivers/misc/cros_ec.c	/^int cros_ec_test(struct cros_ec_dev *dev)$/;"	f	typeref:typename:int
cros_ec_wait_on_hash_done	drivers/misc/cros_ec.c	/^static int cros_ec_wait_on_hash_done(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int	file:
cros_ec_write_state	drivers/misc/cros_ec_sandbox.c	/^static int cros_ec_write_state(void *blob, int node)$/;"	f	typeref:typename:int	file:
cros_ec_write_vbnvcontext	drivers/misc/cros_ec.c	/^int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block)$/;"	f	typeref:typename:int
cross_tools	Makefile	/^cross_tools: export CROSS_BUILD_TOOLS=y$/;"	t
cross_tools	Makefile	/^cross_tools: tools ;$/;"	t
crossbar_mpu	arch/arm/dts/dra7.dtsi	/^		crossbar_mpu: crossbar@4a002a48 {$/;"	l
crou	include/tsi148.h	/^	unsigned int crou;                    \/* 0x418         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
crpb	drivers/block/sata_mv.c	/^struct crpb {$/;"	s	file:
crpb_alloc	drivers/block/sata_mv.c	/^	void *crpb_alloc;$/;"	m	struct:mv_priv	typeref:typename:void *	file:
crq	drivers/usb/gadget/atmel_usba_udc.c	/^			struct usb_ctrlrequest crq;$/;"	m	union:usba_control_irq::__anon9e4ca2d0010a	typeref:struct:usb_ctrlrequest	file:
crqb	drivers/block/sata_mv.c	/^struct crqb {$/;"	s	file:
crqb_alloc	drivers/block/sata_mv.c	/^	void *crqb_alloc;$/;"	m	struct:mv_priv	typeref:typename:void *	file:
crr	include/faraday/ftsdmc021.h	/^	unsigned int	crr;		\/* 0x100 - Controller Revision Reg *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
crs1	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 crs1;		\/* 0x110 Control Register Slave 1 *\/$/;"	m	struct:xbs	typeref:typename:u32
crs4	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 crs4;		\/* 0x410 Control Register Slave 4 *\/$/;"	m	struct:xbs	typeref:typename:u32
crs6	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 crs6;		\/* 0x610 Control Register Slave 6 *\/$/;"	m	struct:xbs	typeref:typename:u32
crs7	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 crs7;		\/* 0x710 Control Register Slave 7 *\/$/;"	m	struct:xbs	typeref:typename:u32
crs_reserved_50	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint crs_reserved_50[7];	\/* _reserved_50, 0x4CC-0x4E4 *\/$/;"	m	struct:clk_rst_ctlr	typeref:typename:uint[7]
crsr	arch/m68k/include/asm/immap_5235.h	/^	u8 crsr;		\/* 0x10 Core Reset Status Register *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
crsr	arch/m68k/include/asm/immap_5275.h	/^	u8 crsr;$/;"	m	struct:sys_ctrl	typeref:typename:u8
crsr	arch/m68k/include/asm/immap_5282.h	/^	u8 crsr;$/;"	m	struct:scm_ctrl	typeref:typename:u8
crstsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	crstsr[12];$/;"	m	struct:ccsr_gur	typeref:typename:u32[12]
crstsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	crstsr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
crtc2_gen_cntl	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_gen_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_h_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_h_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_h_total_disp	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_h_total_disp;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_offset	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_offset;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_offset_cntl	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_offset_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_pitch	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_pitch;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_v_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_v_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc2_v_total_disp	drivers/video/ati_radeon_fb.h	/^	u32		crtc2_v_total_disp;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_ext_cntl	drivers/video/ati_radeon_fb.h	/^	u32		crtc_ext_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_gen_cntl	drivers/video/ati_radeon_fb.h	/^	u32		crtc_gen_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_h_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		crtc_h_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_h_total_disp	drivers/video/ati_radeon_fb.h	/^	u32		crtc_h_total_disp;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_more_cntl	drivers/video/ati_radeon_fb.h	/^	u32		crtc_more_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_offset	drivers/video/ati_radeon_fb.h	/^	u32		crtc_offset;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_offset_cntl	drivers/video/ati_radeon_fb.h	/^	u32		crtc_offset_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_pitch	drivers/video/ati_radeon_fb.h	/^	u32		crtc_pitch;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_v_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		crtc_v_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtc_v_total_disp	drivers/video/ati_radeon_fb.h	/^	u32		crtc_v_total_disp;$/;"	m	struct:radeon_regs	typeref:typename:u32
crtr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	crtr;$/;"	m	struct:at91_st	typeref:typename:u32
cru	arch/arm/dts/rk3036.dtsi	/^	cru: clock-controller@20000000 {$/;"	l
cru	arch/arm/dts/rk3288.dtsi	/^	cru: clock-controller@ff760000 {$/;"	l
cru	arch/arm/dts/rk3399.dtsi	/^	cru: clock-controller@ff760000 {$/;"	l
cru	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	struct rk3036_cru *cru;$/;"	m	struct:rk3036_clk_priv	typeref:struct:rk3036_cru *
cru	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	struct rk3288_cru *cru;$/;"	m	struct:rk3288_clk_priv	typeref:struct:rk3288_cru *
cru	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	struct rk3399_cru *cru;$/;"	m	struct:rk3399_clk_priv	typeref:struct:rk3399_cru *
cru	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	struct rk3036_cru *cru;$/;"	m	struct:rk3036_sdram_priv	typeref:struct:rk3036_cru *	file:
cru	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_cru *cru;$/;"	m	struct:dram_info	typeref:struct:rk3288_cru *	file:
cru_clkgate_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_clkgate_con[11];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[11]
cru_clkgate_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_clkgate_con[19];$/;"	m	struct:rk3288_cru	typeref:typename:u32[19]
cru_clksel_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_clksel_con[35];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[35]
cru_clksel_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_clksel_con[43];$/;"	m	struct:rk3288_cru	typeref:typename:u32[43]
cru_emmc_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_emmc_con[2];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[2]
cru_emmc_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_emmc_con[2];$/;"	m	struct:rk3288_cru	typeref:typename:u32[2]
cru_glb_cnt_th	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_glb_cnt_th;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_glb_cnt_th	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_glb_cnt_th;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_glb_rst_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_glb_rst_con;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_glb_rst_st	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_glb_rst_st;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_glb_srst_fst_value	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_glb_srst_fst_value;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_glb_srst_fst_value	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_glb_srst_fst_value;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_glb_srst_snd_value	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_glb_srst_snd_value;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_glb_srst_snd_value	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_glb_srst_snd_value;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_misc_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_misc_con;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_misc_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_misc_con;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_mode_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_mode_con;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_mode_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_mode_con;$/;"	m	struct:rk3288_cru	typeref:typename:u32
cru_pll_mask_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_pll_mask_con;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_rst_st	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_rst_st;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
cru_sdio0_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_sdio0_con[2];$/;"	m	struct:rk3288_cru	typeref:typename:u32[2]
cru_sdio1_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_sdio1_con[2];$/;"	m	struct:rk3288_cru	typeref:typename:u32[2]
cru_sdio_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_sdio_con[2];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[2]
cru_sdmmc_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_sdmmc_con[2];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[2]
cru_sdmmc_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_sdmmc_con[2];$/;"	m	struct:rk3288_cru	typeref:typename:u32[2]
cru_softrst_con	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int cru_softrst_con[9];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[9]
cru_softrst_con	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 cru_softrst_con[12];$/;"	m	struct:rk3288_cru	typeref:typename:u32[12]
crypto	arch/arm/dts/imx6qdl.dtsi	/^			crypto: caam@2100000 {$/;"	l
crypto	arch/arm/dts/sun4i-a10.dtsi	/^		crypto: crypto-engine@01c15000 {$/;"	l
crypto	arch/arm/dts/sun6i-a31.dtsi	/^		crypto: crypto-engine@01c15000 {$/;"	l
crypto	arch/arm/dts/sun7i-a20.dtsi	/^		crypto: crypto-engine@01c15000 {$/;"	l
crypto	arch/arm/dts/sun8i-a33.dtsi	/^		crypto: crypto-engine@01c15000 {$/;"	l
crypto_alloc_comp	fs/ubifs/ubifs.c	/^*crypto_alloc_comp(const char *alg_name, u32 type, u32 mask)$/;"	f	typeref:struct:crypto_comp *	file:
crypto_comp	fs/ubifs/ubifs.c	/^struct crypto_comp {$/;"	s	file:
crypto_comp_decompress	fs/ubifs/ubifs.c	/^crypto_comp_decompress(const struct ubifs_info *c, struct crypto_comp *tfm,$/;"	f	typeref:typename:int	file:
crypto_sram0	arch/arm/dts/armada-375.dtsi	/^		crypto_sram0: sa-sram0 {$/;"	l
crypto_sram1	arch/arm/dts/armada-375.dtsi	/^		crypto_sram1: sa-sram1 {$/;"	l
crystal_freq_sel_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	crystal_freq_sel_ck: crystal_freq_sel_ck {$/;"	l
cs	arch/arm/cpu/arm926ejs/armada100/dram.c	/^	u32	cs;	\/* Memory Address Map Register -CS *\/$/;"	m	struct:armd1ddr_map_registers	typeref:typename:u32	file:
cs	arch/arm/include/asm/arch-omap3/cpu.h	/^	struct sdrc_cs cs[2];	\/* 0x80 || 0xB0 *\/$/;"	m	struct:sdrc	typeref:struct:sdrc_cs[2]
cs	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^	at91_cs_t	cs[8];$/;"	m	struct:at91_smc	typeref:typename:at91_cs_t[8]
cs	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	struct at91_cs cs[4];$/;"	m	struct:at91_smc	typeref:struct:at91_cs[4]
cs	arch/arm/mach-bcm283x/include/mach/timer.h	/^	u32 cs;$/;"	m	struct:bcm2835_timer_regs	typeref:typename:u32
cs	arch/x86/lib/bios.h	/^	u16 offset, cs;$/;"	m	struct:realmode_idt	typeref:typename:u16
cs	arch/x86/lib/bios.h	/^	uint32_t cs;$/;"	m	struct:eregs	typeref:typename:uint32_t
cs	board/atmel/at91sam9260ek/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/atmel/at91sam9261ek/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/atmel/at91sam9263ek/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/atmel/at91sam9rlek/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/calao/usb_a9263/usb_a9263.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/egnite/ethernut5/ethernut5.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/esd/meesc/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/ronetix/pm9261/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	board/ronetix/pm9263/partition.c	/^struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {$/;"	v	typeref:struct:dataflash_addr[]
cs	cmd/spi.c	/^static unsigned int	cs;$/;"	v	typeref:typename:unsigned int	file:
cs	drivers/bios_emulator/include/biosemu.h	/^	u16 cs;$/;"	m	struct:__anon964d10140808	typeref:typename:u16
cs	drivers/mtd/nand/omap_gpmc.c	/^	uint8_t cs;$/;"	m	struct:omap_nand_info	typeref:typename:uint8_t	file:
cs	drivers/mtd/nand/pxa3xx_nand.c	/^	int			cs;$/;"	m	struct:pxa3xx_nand_host	typeref:typename:int	file:
cs	drivers/mtd/nand/pxa3xx_nand.c	/^	int			cs;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
cs	drivers/mtd/nand/sunxi_nand.c	/^	u8 cs;$/;"	m	struct:sunxi_nand_chip_sel	typeref:typename:u8	file:
cs	drivers/mtd/spi/sandbox.c	/^	int cs;$/;"	m	struct:sandbox_spi_flash_plat_data	typeref:typename:int	file:
cs	drivers/mtd/spi/sandbox.c	/^	unsigned int cs;	\/* Chip select we are attached to *\/$/;"	m	struct:sandbox_spi_flash	typeref:typename:unsigned int	file:
cs	drivers/pci/pci_tegra.c	/^	struct fdt_resource cs;$/;"	m	struct:tegra_pcie	typeref:struct:fdt_resource	file:
cs	drivers/spi/designware_spi.c	/^	u8 cs;			\/* chip select pin *\/$/;"	m	struct:dw_spi_priv	typeref:typename:u8	file:
cs	drivers/spi/omap3_spi.c	/^	unsigned int cs;$/;"	m	struct:omap3_spi_priv	typeref:typename:unsigned int	file:
cs	drivers/spi/soft_spi.c	/^	struct gpio_desc cs;$/;"	m	struct:soft_spi_platdata	typeref:struct:gpio_desc	file:
cs	drivers/spi/zynq_qspi.c	/^	u8 cs;$/;"	m	struct:zynq_qspi_priv	typeref:typename:u8	file:
cs	drivers/spi/zynq_spi.c	/^	u8 cs;$/;"	m	struct:zynq_spi_priv	typeref:typename:u8	file:
cs	include/dataflash.h	/^	int cs;$/;"	m	struct:_AT91S_Dataflash	typeref:typename:int
cs	include/dataflash.h	/^	int cs;$/;"	m	struct:dataflash_addr	typeref:typename:int
cs	include/fsl_ddr_sdram.h	/^	} cs[CONFIG_CHIP_SELECTS_PER_CTRL];$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:struct:fsl_ddr_cfg_regs_s::__anon20eac7820108[]
cs	include/linux/mbus.h	/^	} cs[4];$/;"	m	struct:mbus_dram_target_info	typeref:struct:mbus_dram_target_info::mbus_dram_window[4]
cs	include/linux/mtd/omap_gpmc.h	/^	struct gpmc_cs cs[8];	\/* 0x60, 0x90, .. *\/$/;"	m	struct:gpmc	typeref:struct:gpmc_cs[8]
cs	include/power/pmic.h	/^	unsigned int cs;$/;"	m	struct:p_spi	typeref:typename:unsigned int
cs	include/s6e63d6.h	/^	unsigned int cs;$/;"	m	struct:s6e63d6	typeref:typename:unsigned int
cs	include/spartan2.h	/^	xilinx_cs_fn	cs;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_cs_fn
cs	include/spartan3.h	/^	xilinx_cs_fn	cs;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_cs_fn
cs	include/spi.h	/^	unsigned int cs;$/;"	m	struct:dm_spi_slave_platdata	typeref:typename:unsigned int
cs	include/virtex2.h	/^	xilinx_cs_fn	cs;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_cs_fn
cs	post/lib_powerpc/cr.c	/^    ulong cs;$/;"	m	struct:cpu_post_cr_s3	typeref:typename:ulong	file:
cs0	arch/m68k/include/asm/immap_520x.h	/^	u32 cs0;		\/* 0x110 Chip Select 0 Cfg *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cs0	arch/m68k/include/asm/immap_5301x.h	/^	u32 cs0;		\/* 0x110 Chip Select 0 Cfg *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cs0	arch/m68k/include/asm/immap_5329.h	/^	u32 cs0;		\/* 0x110 Chip Select 0 Configuration *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cs0_bnds	include/fsl_immap.h	/^	u32	cs0_bnds;		\/* Chip Select 0 Memory Bounds *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs0_cfg	include/mpc5xxx.h	/^	volatile u32	cs0_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs0_config	include/fsl_immap.h	/^	u32	cs0_config;		\/* Chip Select Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs0_config_2	include/fsl_immap.h	/^	u32	cs0_config_2;		\/* Chip Select Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs0_device_details	arch/arm/include/asm/emif.h	/^	const struct lpddr2_device_details *cs0_device_details;$/;"	m	struct:emif_device_details	typeref:typename:const struct lpddr2_device_details *
cs0_device_timings	arch/arm/include/asm/emif.h	/^	const struct lpddr2_device_timings *cs0_device_timings;$/;"	m	struct:emif_device_details	typeref:typename:const struct lpddr2_device_timings *
cs0_row	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 cs0_row;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
cs0_row	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 cs0_row;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
cs0_start	include/mpc5xxx.h	/^	volatile u32	cs0_start;	\/* 0x0004 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs0_stop	include/mpc5xxx.h	/^	volatile u32	cs0_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs0a	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs0a;	\/* Chip Select 0 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs0bcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs0bcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs0bcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs0bcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs0bstctl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cs0bstctl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cs0btph	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cs0btph;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cs0cfg	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cs0cfg;		\/* 0x20 *\/$/;"	m	struct:siu	typeref:typename:u32
cs0ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cs0ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cs0gcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs0gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs0gcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs0gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs0gcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs0gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs0gcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs0gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs0l	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs0l;	\/* Chip Select 0 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs0rcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs0rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs0rcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs0rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs0rcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs0rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs0rcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs0rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs0u	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs0u;	\/* Chip Select 0 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs0wcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs0wcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs0wcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs0wcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs0wcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs0wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs0wcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs0wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs0wcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs0wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs0wcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs0wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs0wcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs0wcr2;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs1	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u8 cs1;$/;"	m	struct:dram_para	typeref:typename:u8	file:
cs1	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 cs1;$/;"	m	struct:dram_para	typeref:typename:u8	file:
cs1	arch/m68k/include/asm/immap_520x.h	/^	u32 cs1;		\/* 0x114 Chip Select 1 Cfg *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cs1	arch/m68k/include/asm/immap_5301x.h	/^	u32 cs1;		\/* 0x114 Chip Select 1 Cfg *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cs1	arch/m68k/include/asm/immap_5329.h	/^	u32 cs1;		\/* 0x114 Chip Select 1 Configuration *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
cs1_bnds	include/fsl_immap.h	/^	u32	cs1_bnds;		\/* Chip Select 1 Memory Bounds *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs1_cfg	include/mpc5xxx.h	/^	volatile u32	cs1_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs1_config	include/fsl_immap.h	/^	u32	cs1_config;		\/* Chip Select Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs1_config_2	include/fsl_immap.h	/^	u32	cs1_config_2;		\/* Chip Select Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs1_device_details	arch/arm/include/asm/emif.h	/^	const struct lpddr2_device_details *cs1_device_details;$/;"	m	struct:emif_device_details	typeref:typename:const struct lpddr2_device_details *
cs1_device_timings	arch/arm/include/asm/emif.h	/^	const struct lpddr2_device_timings *cs1_device_timings;$/;"	m	struct:emif_device_details	typeref:typename:const struct lpddr2_device_timings *
cs1_mirror	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	char cs1_mirror;\/* enable address mirror (0|1) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:char
cs1_row	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 cs1_row;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
cs1_row	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 cs1_row;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
cs1_start	include/mpc5xxx.h	/^	volatile u32	cs1_start;	\/* 0x000c *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs1_stop	include/mpc5xxx.h	/^	volatile u32	cs1_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs1a	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs1a;	\/* Chip Select 1 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs1cdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cs1cdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cs1cdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1cdr;$/;"	m	struct:clkctl	typeref:typename:u32
cs1cdr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cs1cdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cs1cfg	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cs1cfg;		\/* 0x24 *\/$/;"	m	struct:siu	typeref:typename:u32
cs1ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cs1ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cs1gcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs1gcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs1gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs1gcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs1gcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs1gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs1gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cs1gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cs1l	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs1l;	\/* Chip Select 1 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs1rcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs1rcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs1rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs1rcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs1rcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs1rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs1u	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs1u;	\/* Chip Select 1 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs1wcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs1wcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs1wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs1wcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs1wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs1wcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs1wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2_bnds	include/fsl_immap.h	/^	u32	cs2_bnds;		\/* Chip Select 2 Memory Bounds *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs2_cfg	include/mpc5xxx.h	/^	volatile u32	cs2_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs2_config	include/fsl_immap.h	/^	u32	cs2_config;		\/* Chip Select Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs2_config_2	include/fsl_immap.h	/^	u32	cs2_config_2;		\/* Chip Select Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs2_start	include/mpc5xxx.h	/^	volatile u32	cs2_start;	\/* 0x0014 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs2_stop	include/mpc5xxx.h	/^	volatile u32	cs2_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs2a	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs2a;	\/* Chip Select 2 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs2bcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs2bcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs2bcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs2bcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs2cdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cs2cdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cs2cdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2cdr;$/;"	m	struct:clkctl	typeref:typename:u32
cs2cdr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cs2cdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cs2cfg	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cs2cfg;		\/* 0x28 *\/$/;"	m	struct:siu	typeref:typename:u32
cs2gcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs2gcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs2gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs2gcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2gcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs2gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2l	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs2l;	\/* Chip Select 2 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs2rcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs2rcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs2rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs2rcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2rcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs2rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2u	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs2u;	\/* Chip Select 2 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs2wcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs2wcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs2wcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs2wcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs2wcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs2wcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs2wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs2wcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs2wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2wcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs2wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs2wcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs2wcr2;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs3_bnds	include/fsl_immap.h	/^	u32	cs3_bnds;		\/* Chip Select 3 Memory Bounds *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs3_cfg	include/mpc5xxx.h	/^	volatile u32	cs3_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs3_config	include/fsl_immap.h	/^	u32	cs3_config;		\/* Chip Select Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs3_config_2	include/fsl_immap.h	/^	u32	cs3_config_2;		\/* Chip Select Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
cs3_start	include/mpc5xxx.h	/^	volatile u32	cs3_start;	\/* 0x001c *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs3_stop	include/mpc5xxx.h	/^	volatile u32	cs3_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs3a	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs3a;	\/* Chip Select 3 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs3cfg	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 cs3cfg;		\/* 0x2C *\/$/;"	m	struct:siu	typeref:typename:u32
cs3gcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs3gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs3gcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs3gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs3gcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs3gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs3gcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs3gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs3l	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs3l;	\/* Chip Select 3 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs3rcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs3rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs3rcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs3rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs3rcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs3rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs3rcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs3rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs3u	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs3u;	\/* Chip Select 3 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs3wcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs3wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs3wcr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs3wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs3wcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs3wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs3wcr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 cs3wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs4340_config	drivers/net/phy/cortina.c	/^int cs4340_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
cs4340_driver	drivers/net/phy/cortina.c	/^struct phy_driver cs4340_driver = {$/;"	v	typeref:struct:phy_driver
cs4340_phy_init	drivers/net/phy/cortina.c	/^int cs4340_phy_init(struct phy_device *phydev)$/;"	f	typeref:typename:int
cs4340_probe	drivers/net/phy/cortina.c	/^int cs4340_probe(struct phy_device *phydev)$/;"	f	typeref:typename:int
cs4340_startup	drivers/net/phy/cortina.c	/^int cs4340_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int
cs4340_upload_firmware	drivers/net/phy/cortina.c	/^void cs4340_upload_firmware(struct phy_device *phydev)$/;"	f	typeref:typename:void
cs4_cfg	include/mpc5xxx.h	/^	volatile u32	cs4_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs4_start	include/mpc5xxx.h	/^	volatile u32	cs4_start;	\/* 0x0024 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs4_stop	include/mpc5xxx.h	/^	volatile u32	cs4_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs4a	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs4a;	\/* Chip Select 4 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs4bcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs4bcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs4bcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs4bcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs4gcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs4gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs4gcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs4gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs4l	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs4l;	\/* Chip Select 4 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs4rcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs4rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs4rcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs4rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs4u	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs4u;	\/* Chip Select 4 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs4wcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs4wcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs4wcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs4wcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs4wcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs4wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs4wcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs4wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs4wcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs4wcr2;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs5_cfg	include/mpc5xxx.h	/^	volatile u32	cs5_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs5_start	include/mpc5xxx.h	/^	volatile u32	cs5_start;	\/* 0x002c *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs5_stop	include/mpc5xxx.h	/^	volatile u32	cs5_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs5a	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs5a;	\/* Chip Select 5 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs5abcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs5abcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs5abcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs5abcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs5awcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs5awcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs5awcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs5awcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs5bbcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs5bbcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs5bbcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs5bbcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs5bwcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs5bwcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs5bwcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs5bwcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs5gcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs5gcr1;$/;"	m	struct:weim	typeref:typename:u32
cs5gcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs5gcr2;$/;"	m	struct:weim	typeref:typename:u32
cs5l	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs5l;	\/* Chip Select 5 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs5rcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs5rcr1;$/;"	m	struct:weim	typeref:typename:u32
cs5rcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs5rcr2;$/;"	m	struct:weim	typeref:typename:u32
cs5u	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cs5u;	\/* Chip Select 5 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cs5wcr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs5wcr1;$/;"	m	struct:weim	typeref:typename:u32
cs5wcr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cs5wcr2;$/;"	m	struct:weim	typeref:typename:u32
cs6_cfg	include/mpc5xxx.h	/^	volatile u32	cs6_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs6_start	include/mpc5xxx.h	/^	volatile u32	cs6_start;	\/* 0x0058 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs6_stop	include/mpc5xxx.h	/^	volatile u32	cs6_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs6abcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs6abcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs6abcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs6abcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs6awcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 cs6awcr;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
cs6awcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs6awcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs6bbcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs6bbcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs6bwcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs6bwcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs7_cfg	include/mpc5xxx.h	/^	volatile u32	cs7_cfg;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs7_start	include/mpc5xxx.h	/^	volatile u32	cs7_start;	\/* 0x0060 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs7_stop	include/mpc5xxx.h	/^	volatile u32	cs7_stop;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
cs7abcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs7abcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs7awcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 cs7awcr;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
cs8900_chksum	board/mpl/vcma9/cmd_vcma9.c	/^static uchar cs8900_chksum(ushort data)$/;"	f	typeref:typename:uchar	file:
cs8900_e2prom_read	drivers/net/cs8900.c	/^int cs8900_e2prom_read(struct eth_device *dev,$/;"	f	typeref:typename:int
cs8900_e2prom_ready	drivers/net/cs8900.c	/^static void cs8900_e2prom_ready(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
cs8900_e2prom_write	drivers/net/cs8900.c	/^int cs8900_e2prom_write(struct eth_device *dev, u8 addr, u16 value)$/;"	f	typeref:typename:int
cs8900_get_enetaddr	drivers/net/cs8900.c	/^void cs8900_get_enetaddr(struct eth_device *dev)$/;"	f	typeref:typename:void
cs8900_halt	drivers/net/cs8900.c	/^void cs8900_halt(struct eth_device *dev)$/;"	f	typeref:typename:void
cs8900_init	drivers/net/cs8900.c	/^static int cs8900_init(struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int	file:
cs8900_initialize	drivers/net/cs8900.c	/^int cs8900_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
cs8900_priv	drivers/net/cs8900.h	/^struct cs8900_priv {$/;"	s
cs8900_recv	drivers/net/cs8900.c	/^static int cs8900_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
cs8900_reginit	drivers/net/cs8900.c	/^static void cs8900_reginit(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
cs8900_regs	drivers/net/cs8900.h	/^struct cs8900_regs {$/;"	s
cs8900_reset	drivers/net/cs8900.c	/^static void cs8900_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
cs8900_send	drivers/net/cs8900.c	/^static int cs8900_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
cs_activate	arch/sandbox/include/asm/spi.h	/^	void (*cs_activate)(void *priv);$/;"	m	struct:sandbox_spi_emu_ops	typeref:typename:void (*)(void * priv)
cs_bcr	arch/powerpc/include/asm/immap_512x.h	/^	u32	cs_bcr;		\/* Chip Select Burst Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
cs_bitmask	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u8 cs_bitmask;$/;"	m	struct:bus_params	typeref:typename:u8
cs_br0	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br0;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br1	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br1;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br2	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br2;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br3	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br3;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br4	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br4;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br5	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br5;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br6	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br6;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_br7	arch/m68k/include/asm/immap_5272.h	/^	uint cs_br7;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_burst	include/mpc5xxx.h	/^	volatile u32	cs_burst;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs_cbe_value	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 cs_cbe_value;$/;"	m	struct:hws_cs_config_info	typeref:typename:u32
cs_cfg	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cs_cfg;		\/* 0x40 *\/$/;"	m	struct:sdrc	typeref:typename:u32
cs_cfg	arch/powerpc/include/asm/immap_512x.h	/^	u32	cs_cfg[8];	\/* Chip Select N Configuration Registers$/;"	m	struct:lpc512x	typeref:typename:u32[8]
cs_change	drivers/spi/zynq_qspi.c	/^	unsigned cs_change:1;$/;"	m	struct:zynq_qspi_priv	typeref:typename:unsigned:1	file:
cs_config	arch/powerpc/include/asm/immap_83xx.h	/^	u32 cs_config[4];	\/* Chip Select x Configuration *\/$/;"	m	struct:ddr83xx	typeref:typename:u32[4]
cs_cr	arch/powerpc/include/asm/immap_512x.h	/^	u32	cs_cr;		\/* Chip Select Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
cs_ctlr	arch/m68k/include/asm/immap_5272.h	/^typedef struct cs_ctlr {$/;"	s
cs_ctrl	include/mpc5xxx.h	/^	volatile u32	cs_ctrl;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs_dccr	arch/powerpc/include/asm/immap_512x.h	/^	u32	cs_dccr;	\/* Chip Select Deadcycle Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
cs_deactivate	arch/sandbox/include/asm/spi.h	/^	void (*cs_deactivate)(void *priv);$/;"	m	struct:sandbox_spi_emu_ops	typeref:typename:void (*)(void * priv)
cs_deadcycle	include/mpc5xxx.h	/^	volatile u32	cs_deadcycle;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
cs_density	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 cs_density;	\/* density per chip select (Gb) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
cs_element	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct cs_element {$/;"	s
cs_ena	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 cs_ena;$/;"	m	struct:dram_info	typeref:typename:u32
cs_gpio	drivers/spi/pic32_spi.c	/^	struct gpio_desc	cs_gpio;$/;"	m	struct:pic32_spi_priv	typeref:struct:gpio_desc	file:
cs_gpios	drivers/spi/atmel_spi.c	/^	struct gpio_desc cs_gpios[MAX_CS_COUNT];$/;"	m	struct:atmel_spi_priv	typeref:struct:gpio_desc[]	file:
cs_hccr	arch/powerpc/include/asm/immap_512x.h	/^	u32	cs_hccr;	\/* Chip Select Holdcycle Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
cs_index	include/linux/mbus.h	/^		u8	cs_index;$/;"	m	struct:mbus_dram_target_info::mbus_dram_window	typeref:typename:u8
cs_info	include/spi.h	/^	int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * bus,uint cs,struct spi_cs_info * info)
cs_lat	include/ddr_spd.h	/^	unsigned char cs_lat;      \/* 19 CS# Latency *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
cs_lat	include/spd.h	/^	unsigned char cs_lat;      \/* 19 CS# Latency *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
cs_local_opts	include/fsl_ddr_sdram.h	/^	} cs_local_opts[CONFIG_CHIP_SELECTS_PER_CTRL];$/;"	m	struct:memctl_options_s	typeref:struct:memctl_options_s::cs_local_opts_s[]
cs_local_opts_s	include/fsl_ddr_sdram.h	/^	struct cs_local_opts_s {$/;"	s	struct:memctl_options_s
cs_lock	fs/ubifs/ubifs.h	/^	spinlock_t cs_lock;$/;"	m	struct:ubifs_info	typeref:typename:spinlock_t
cs_mask2_num	drivers/ddr/marvell/a38x/ddr3_training.c	/^static u8 cs_mask2_num[] = { 0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3 };$/;"	v	typeref:typename:u8[]	file:
cs_mask_reg	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 cs_mask_reg[] = {$/;"	v	typeref:typename:u8[]
cs_nand	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int cs_nand;    \/* On which chipsel NAND is connected	  *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
cs_next	drivers/mtd/nand/omap_gpmc.c	/^static uint8_t cs_next;$/;"	v	typeref:typename:uint8_t	file:
cs_num	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 cs_num;$/;"	m	struct:cs_element	typeref:typename:u8
cs_or0	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or0;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or1	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or1;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or2	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or2;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or3	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or3;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or4	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or4;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or5	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or5;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or6	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or6;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_or7	arch/m68k/include/asm/immap_5272.h	/^	uint cs_or7;$/;"	m	struct:cs_ctlr	typeref:typename:uint
cs_pins	drivers/spi/bfin_spi.c	/^static const unsigned short cs_pins[][7] = {$/;"	v	typeref:typename:const unsigned short[][7]	file:
cs_pins	drivers/spi/bfin_spi6xx.c	/^static const unsigned short cs_pins[][7] = {$/;"	v	typeref:typename:const unsigned short[][7]	file:
cs_pol	drivers/spi/bfin_spi6xx.c	/^	int cs_pol;$/;"	m	struct:bfin_spi_slave	typeref:typename:int	file:
cs_reg	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		cs_reg;		\/* 0x0c *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
cs_reg_value	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 cs_reg_value;$/;"	m	struct:hws_cs_config_info	typeref:typename:u32
cs_setup	drivers/video/exynos/exynos_fb.c	/^	unsigned int cs_setup;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
cs_setup	include/exynos_lcd.h	/^	unsigned int cs_setup;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
cs_spi_mpp_back	drivers/spi/kirkwood_spi.c	/^static u32 cs_spi_mpp_back[2];$/;"	v	typeref:typename:u32[2]	file:
cs_sqnum	fs/ubifs/ubifs.h	/^	unsigned long long cs_sqnum;$/;"	m	struct:ubifs_info	typeref:typename:unsigned long long
cs_sr	arch/powerpc/include/asm/immap_512x.h	/^	u32	cs_sr;		\/* Chip Select Status Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
cs_status	include/mpc5xxx.h	/^	volatile u32	cs_status;$/;"	m	struct:mpc5xxx_lpb	typeref:typename:volatile u32
csa	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		csa;$/;"	m	struct:at91_matrix	typeref:typename:u32
csa	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		csa[2];$/;"	m	struct:at91_matrix	typeref:typename:u32[2]
csa	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32 	csa;		\/* 0x00 Chip Select Assignment Register *\/$/;"	m	struct:at91_ebi	typeref:typename:u32
csac	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 csac;$/;"	m	struct:dma4_chan	typeref:typename:u32
csar0	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar0;		\/* Chip-select Address *\/$/;"	m	struct:fbcs	typeref:typename:u32
csar0	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar0;      \/* Chip-select Address *\/$/;"	m	struct:fbcs	typeref:typename:u16
csar0	arch/m68k/include/asm/immap_5307.h	/^	u16 csar0;      \/* Chip-select Address *\/$/;"	m	struct:csm	typeref:typename:u16
csar1	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar1;$/;"	m	struct:fbcs	typeref:typename:u32
csar1	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar1;$/;"	m	struct:fbcs	typeref:typename:u16
csar1	arch/m68k/include/asm/immap_5307.h	/^	u16 csar1;$/;"	m	struct:csm	typeref:typename:u16
csar2	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar2;$/;"	m	struct:fbcs	typeref:typename:u32
csar2	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar2;$/;"	m	struct:fbcs	typeref:typename:u16
csar2	arch/m68k/include/asm/immap_5307.h	/^	u16 csar2;$/;"	m	struct:csm	typeref:typename:u16
csar3	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar3;$/;"	m	struct:fbcs	typeref:typename:u32
csar3	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar3;$/;"	m	struct:fbcs	typeref:typename:u16
csar3	arch/m68k/include/asm/immap_5307.h	/^	u16 csar3;$/;"	m	struct:csm	typeref:typename:u16
csar4	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar4;$/;"	m	struct:fbcs	typeref:typename:u32
csar4	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar4;$/;"	m	struct:fbcs	typeref:typename:u16
csar4	arch/m68k/include/asm/immap_5307.h	/^	u16 csar4;$/;"	m	struct:csm	typeref:typename:u16
csar5	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar5;$/;"	m	struct:fbcs	typeref:typename:u32
csar5	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar5;$/;"	m	struct:fbcs	typeref:typename:u16
csar5	arch/m68k/include/asm/immap_5307.h	/^	u16 csar5;$/;"	m	struct:csm	typeref:typename:u16
csar6	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar6;$/;"	m	struct:fbcs	typeref:typename:u32
csar6	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar6;$/;"	m	struct:fbcs	typeref:typename:u16
csar6	arch/m68k/include/asm/immap_5307.h	/^	u16 csar6;$/;"	m	struct:csm	typeref:typename:u16
csar7	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csar7;$/;"	m	struct:fbcs	typeref:typename:u32
csar7	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 csar7;$/;"	m	struct:fbcs	typeref:typename:u16
csar7	arch/m68k/include/asm/immap_5307.h	/^	u16 csar7;$/;"	m	struct:csm	typeref:typename:u16
csb_clk	arch/powerpc/include/asm/global_data.h	/^	u32 csb_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
csbnds	arch/powerpc/include/asm/immap_83xx.h	/^	ddr_cs_bnds_t csbnds[4];\/* Chip Select x Memory Bounds *\/$/;"	m	struct:ddr83xx	typeref:typename:ddr_cs_bnds_t[4]
csbnds	arch/powerpc/include/asm/immap_83xx.h	/^	u32 csbnds;$/;"	m	struct:ddr_cs_bnds	typeref:typename:u32
csbr0	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr0 = $mbar - 1 + 0x040$/;"	t
csbr1	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr1 = $mbar - 1 + 0x048$/;"	t
csbr2	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr2 = $mbar - 1 + 0x050$/;"	t
csbr3	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr3 = $mbar - 1 + 0x058$/;"	t
csbr4	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr4 = $mbar - 1 + 0x060$/;"	t
csbr5	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr5 = $mbar - 1 + 0x068$/;"	t
csbr6	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr6 = $mbar - 1 + 0x070$/;"	t
csbr7	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csbr7 = $mbar - 1 + 0x078$/;"	t
csc_cfg	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_cfg;			\/* 0x4100 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_cfg	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 csc_cfg;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
csc_coef	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	} csc_coef[3][4];$/;"	m	struct:rk3288_hdmi	typeref:struct:rk3288_hdmi::__anonae42e8fa0108[3][4]
csc_coef00	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef00;			\/* 0x070 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef00	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef00;			\/* 0x070 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef01	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef01;			\/* 0x074 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef01	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef01;			\/* 0x074 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef02	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef02;			\/* 0x078 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef02	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef02;			\/* 0x078 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef03	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef03;			\/* 0x07c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef03	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef03;			\/* 0x07c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef10	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef10;			\/* 0x080 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef10	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef10;			\/* 0x080 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef11	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef11;			\/* 0x084 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef11	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef11;			\/* 0x084 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef12	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef12;			\/* 0x088 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef12	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef12;			\/* 0x088 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef13	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef13;			\/* 0x08c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef13	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef13;			\/* 0x08c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef20	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef20;			\/* 0x090 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef20	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef20;			\/* 0x090 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef21	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef21;			\/* 0x094 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef21	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef21;			\/* 0x094 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef22	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef22;			\/* 0x098 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef22	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef22;			\/* 0x098 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef23	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_coef23;			\/* 0x09c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef23	arch/arm/include/asm/arch/display.h	/^	u32 csc_coef23;			\/* 0x09c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
csc_coef_a1_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a1_lsb;		\/* 0x4103 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a1_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a1_msb;		\/* 0x4102 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a2_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a2_lsb;		\/* 0x4105 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a2_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a2_msb;		\/* 0x4104 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a3_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a3_lsb;		\/* 0x4107 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a3_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a3_msb;		\/* 0x4106 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a4_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a4_lsb;		\/* 0x4109 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_a4_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_a4_msb;		\/* 0x4108 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b1_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b1_lsb;		\/* 0x410b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b1_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b1_msb;		\/* 0x410a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b2_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b2_lsb;		\/* 0x410d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b2_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b2_msb;		\/* 0x410c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b3_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b3_lsb;		\/* 0x410f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b3_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b3_msb;		\/* 0x410e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b4_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b4_lsb;		\/* 0x4111 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_b4_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_b4_msb;		\/* 0x4110 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c1_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c1_lsb;		\/* 0x4113 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c1_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c1_msb;		\/* 0x4112 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c2_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c2_lsb;		\/* 0x4115 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c2_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c2_msb;		\/* 0x4114 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c3_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c3_lsb;		\/* 0x4117 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c3_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c3_msb;		\/* 0x4116 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c4_lsb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c4_lsb;		\/* 0x4119 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coef_c4_msb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_coef_c4_msb;		\/* 0x4118 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_coeff_default	drivers/video/rockchip/rk_hdmi.c	/^static const u32 csc_coeff_default[3][4] = {$/;"	v	typeref:typename:const u32[3][4]	file:
csc_kub	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kub;			\/* _WINC_CSC_KUB_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_kug	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kug;			\/* _WINC_CSC_KUG_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_kur	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kur;			\/* _WINC_CSC_KUR_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_kvb	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kvb;			\/* _WINC_CSC_KVB_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_kvg	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kvg;			\/* _WINC_CSC_KVG_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_kvr	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kvr;			\/* _WINC_CSC_KVR_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_kyrgb	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_kyrgb;			\/* _WINC_CSC_KYRGB_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csc_reg0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_reg0;			\/* 0x040 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg0	arch/arm/include/asm/arch/display.h	/^	u32 csc_reg0;			\/* 0x040 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_reg1;			\/* 0x044 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg1	arch/arm/include/asm/arch/display.h	/^	u32 csc_reg1;			\/* 0x044 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg2	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_reg2;			\/* 0x048 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg2	arch/arm/include/asm/arch/display.h	/^	u32 csc_reg2;			\/* 0x048 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg3	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 csc_reg3;			\/* 0x04c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_reg3	arch/arm/include/asm/arch/display.h	/^	u32 csc_reg3;			\/* 0x04c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
csc_scale	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 csc_scale;			\/* 0x4101 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
csc_scale	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 csc_scale;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
csc_sync	drivers/video/ipu_regs.h	/^	u32 csc_sync[2];$/;"	m	struct:ipu_dp	typeref:typename:u32[2]
csc_type_t	drivers/video/ipu_disp.c	/^enum csc_type_t {$/;"	g	file:
csc_yof	arch/arm/include/asm/arch-tegra/dc.h	/^	uint csc_yof;			\/* _WINC_CSC_YOF_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
csca_sync	drivers/video/ipu_regs.h	/^	u32 csca_sync[4];$/;"	m	struct:ipu_dp	typeref:typename:u32[4]
cscdr1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cscdr1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cscdr1;$/;"	m	struct:clkctl	typeref:typename:u32
cscdr1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cscdr1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cscdr1;$/;"	m	struct:ccm_reg	typeref:typename:u32
cscdr2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cscdr2;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cscdr2;$/;"	m	struct:clkctl	typeref:typename:u32
cscdr2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cscdr2;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr2	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cscdr2;$/;"	m	struct:ccm_reg	typeref:typename:u32
cscdr3	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cscdr3;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr3	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cscdr3;$/;"	m	struct:clkctl	typeref:typename:u32
cscdr3	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cscdr3;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr3	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cscdr3;$/;"	m	struct:ccm_reg	typeref:typename:u32
cscdr4	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cscdr4;	\/* 0x0040 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr4	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cscdr4;$/;"	m	struct:clkctl	typeref:typename:u32
cscdr4	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cscdr4;	\/* 0x0040 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscdr4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cscdr4;$/;"	m	struct:ccm_reg	typeref:typename:u32
cscmr1	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cscmr1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscmr1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cscmr1;$/;"	m	struct:clkctl	typeref:typename:u32
cscmr1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cscmr1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscmr1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cscmr1;$/;"	m	struct:ccm_reg	typeref:typename:u32
cscmr2	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cscmr2;	\/* 0x0020 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscmr2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cscmr2;$/;"	m	struct:clkctl	typeref:typename:u32
cscmr2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 cscmr2;	\/* 0x0020 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cscmr2	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 cscmr2;$/;"	m	struct:ccm_reg	typeref:typename:u32
cscope	Makefile	/^cscope:$/;"	t
cscr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 cscr;	\/* Clock Source Control Register *\/$/;"	m	struct:pll_regs	typeref:typename:u32
cscr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	struct mx31_weim_cscr cscr[6];$/;"	m	struct:mx31_weim	typeref:struct:mx31_weim_cscr[6]
cscr0	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr0;		\/* Chip-select Control *\/$/;"	m	struct:fbcs	typeref:typename:u32
cscr0	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr0;      \/* Chip-select Control *\/$/;"	m	struct:fbcs	typeref:typename:u16
cscr0	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr0;      \/* Chip-select Control *\/$/;"	m	struct:csm	typeref:typename:u16
cscr0a	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr0a;	\/* Chip Select 0 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr0l	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr0l;	\/* Chip Select 0 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr0u	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr0u;	\/* Chip Select 0 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr1	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr1;$/;"	m	struct:fbcs	typeref:typename:u32
cscr1	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr1;$/;"	m	struct:fbcs	typeref:typename:u16
cscr1	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr1;$/;"	m	struct:csm	typeref:typename:u16
cscr1a	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr1a;	\/* Chip Select 1 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr1l	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr1l;	\/* Chip Select 1 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr1u	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr1u;	\/* Chip Select 1 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr2	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr2;$/;"	m	struct:fbcs	typeref:typename:u32
cscr2	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr2;$/;"	m	struct:fbcs	typeref:typename:u16
cscr2	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr2;$/;"	m	struct:csm	typeref:typename:u16
cscr2a	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr2a;	\/* Chip Select 2 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr2l	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr2l;	\/* Chip Select 2 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr2u	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr2u;	\/* Chip Select 2 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr3	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr3;$/;"	m	struct:fbcs	typeref:typename:u32
cscr3	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr3;$/;"	m	struct:fbcs	typeref:typename:u16
cscr3	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr3;$/;"	m	struct:csm	typeref:typename:u16
cscr3a	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr3a;	\/* Chip Select 3 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr3l	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr3l;	\/* Chip Select 3 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr3u	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr3u;	\/* Chip Select 3 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr4	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr4;$/;"	m	struct:fbcs	typeref:typename:u32
cscr4	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr4;$/;"	m	struct:fbcs	typeref:typename:u16
cscr4	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr4;$/;"	m	struct:csm	typeref:typename:u16
cscr4a	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr4a;	\/* Chip Select 4 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr4l	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr4l;	\/* Chip Select 4 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr4u	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr4u;	\/* Chip Select 4 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr5	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr5;$/;"	m	struct:fbcs	typeref:typename:u32
cscr5	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr5;$/;"	m	struct:fbcs	typeref:typename:u16
cscr5	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr5;$/;"	m	struct:csm	typeref:typename:u16
cscr5a	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr5a;	\/* Chip Select 5 Addition Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr5l	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr5l;	\/* Chip Select 5 Lower Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr5u	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 cscr5u;	\/* Chip Select 5 Upper Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
cscr6	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr6;$/;"	m	struct:fbcs	typeref:typename:u32
cscr6	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr6;$/;"	m	struct:fbcs	typeref:typename:u16
cscr6	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr6;$/;"	m	struct:csm	typeref:typename:u16
cscr7	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 cscr7;$/;"	m	struct:fbcs	typeref:typename:u32
cscr7	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 cscr7;$/;"	m	struct:fbcs	typeref:typename:u16
cscr7	arch/m68k/include/asm/immap_5307.h	/^	u16 cscr7;$/;"	m	struct:csm	typeref:typename:u16
csctrl_t	arch/m68k/include/asm/immap_5272.h	/^} csctrl_t;$/;"	t	typeref:struct:cs_ctlr
csd	include/mmc.h	/^	uint csd[4];$/;"	m	struct:mmc	typeref:typename:uint[4]
csdp	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 csdp;$/;"	m	struct:dma4_chan	typeref:typename:u32
cse	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 cse;$/;"	m	struct:at91_emac	typeref:typename:u32
cseg	include/linux/apm_bios.h	/^	__u16	cseg;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
cseg_16	include/linux/apm_bios.h	/^	__u16	cseg_16;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
cseg_16_len	include/linux/apm_bios.h	/^	__u16	cseg_16_len;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
cseg_len	include/linux/apm_bios.h	/^	__u16	cseg_len;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
csel	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 csel;$/;"	m	struct:dma4_chan	typeref:typename:u32
csel	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 csel;		\/* 0x2e0 controller select register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
csel	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 csel;		\/* 0x2e0 controller select register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
csf	tools/imximage.h	/^	uint32_t csf;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
csf	tools/mxsimage.h	/^	uint32_t	csf;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
csf_default	include/ata.h	/^	unsigned short  csf_default;	\/* command set-feature default *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
csf_ptr	tools/imximage.c	/^static uint32_t *csf_ptr;$/;"	v	typeref:typename:uint32_t *	file:
csfl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 csfl;$/;"	m	struct:dma4_chan	typeref:typename:u32
csfo	include/ata.h	/^	unsigned short  csfo;		\/* current set features options$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
csi	arch/arm/dts/imx6ull.dtsi	/^			csi: csi@021c4000 {$/;"	l
csi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 csi0_clk_cfg;	\/* 0x134 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 csi0_clk_cfg;	\/* 0x134 CSI0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 csi0_clk_cfg;	\/* 0x4c4 CSI0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 csi0_clk_cfg;	\/* 0x134 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 csi0_clk_cfg;	\/* 0x134 CSI0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi0_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 csi0_clk_cfg;	\/* 0x4c4 CSI0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 csi1_clk_cfg;	\/* 0x138 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 csi1_clk_cfg;	\/* 0x138 CSI1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 csi1_clk_cfg;	\/* 0x4c8 CSI1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 csi1_clk_cfg;	\/* 0x138 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 csi1_clk_cfg;	\/* 0x138 CSI1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi1_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 csi1_clk_cfg;	\/* 0x4c8 CSI1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 csi_clk_cfg;	\/* 0x134 CSI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 csi_clk_cfg;	\/* 0x134 CSI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi_isp_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 csi_isp_clk_cfg;	\/* 0x120 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi_isp_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 csi_isp_clk_cfg;	\/* 0x4c0 CSI ISP module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi_isp_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 csi_isp_clk_cfg;	\/* 0x120 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csi_isp_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 csi_isp_clk_cfg;	\/* 0x4c0 CSI ISP module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
csize	fs/jffs2/jffs2_nand_private.h	/^	u32 csize;$/;"	m	struct:b_inode	typeref:typename:u32
csize	include/jffs2/jffs2.h	/^	__u32 csize;      \/* (Compressed) data size *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
csize_list	board/micronas/vct/scc.h	/^	u32 *csize_list;	\/* list of the valid CSIZE values	*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32 *
csize_list_0	board/micronas/vct/scc.c	/^static u32 csize_list_0[] = { 2, 0, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_1	board/micronas/vct/scc.c	/^static u32 csize_list_1[] = { 2, 0, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_10	board/micronas/vct/scc.c	/^static u32 csize_list_10[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_11	board/micronas/vct/scc.c	/^static u32 csize_list_11[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_12	board/micronas/vct/scc.c	/^static u32 csize_list_12[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_13	board/micronas/vct/scc.c	/^static u32 csize_list_13[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_14	board/micronas/vct/scc.c	/^static u32 csize_list_14[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_15	board/micronas/vct/scc.c	/^static u32 csize_list_15[] = { 1, 4 };$/;"	v	typeref:typename:u32[]	file:
csize_list_16	board/micronas/vct/scc.c	/^static u32 csize_list_16[] = { 3, 0, 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_17	board/micronas/vct/scc.c	/^static u32 csize_list_17[] = { 3, 0, 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_18	board/micronas/vct/scc.c	/^static u32 csize_list_18[] = { 3, 0, 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_19	board/micronas/vct/scc.c	/^static u32 csize_list_19[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_2	board/micronas/vct/scc.c	/^static u32 csize_list_2[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_20	board/micronas/vct/scc.c	/^static u32 csize_list_20[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_21	board/micronas/vct/scc.c	/^static u32 csize_list_21[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_22	board/micronas/vct/scc.c	/^static u32 csize_list_22[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_23	board/micronas/vct/scc.c	/^static u32 csize_list_23[] = { 1, 3 };$/;"	v	typeref:typename:u32[]	file:
csize_list_24	board/micronas/vct/scc.c	/^static u32 csize_list_24[] = { 1, 3 };$/;"	v	typeref:typename:u32[]	file:
csize_list_25	board/micronas/vct/scc.c	/^static u32 csize_list_25[] = { 1, 3 };$/;"	v	typeref:typename:u32[]	file:
csize_list_26	board/micronas/vct/scc.c	/^static u32 csize_list_26[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_27	board/micronas/vct/scc.c	/^static u32 csize_list_27[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_28	board/micronas/vct/scc.c	/^static u32 csize_list_28[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_29	board/micronas/vct/scc.c	/^static u32 csize_list_29[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_3	board/micronas/vct/scc.c	/^static u32 csize_list_3[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_30	board/micronas/vct/scc.c	/^static u32 csize_list_30[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_31	board/micronas/vct/scc.c	/^static u32 csize_list_31[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_32	board/micronas/vct/scc.c	/^static u32 csize_list_32[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_33	board/micronas/vct/scc.c	/^static u32 csize_list_33[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_34	board/micronas/vct/scc.c	/^static u32 csize_list_34[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_35	board/micronas/vct/scc.c	/^static u32 csize_list_35[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_36	board/micronas/vct/scc.c	/^static u32 csize_list_36[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_37	board/micronas/vct/scc.c	/^static u32 csize_list_37[] = { 2, 0, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_38	board/micronas/vct/scc.c	/^static u32 csize_list_38[] = { 1, 2 };$/;"	v	typeref:typename:u32[]	file:
csize_list_39	board/micronas/vct/scc.c	/^static u32 csize_list_39[] = { 1, 3 };$/;"	v	typeref:typename:u32[]	file:
csize_list_4	board/micronas/vct/scc.c	/^static u32 csize_list_4[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_40	board/micronas/vct/scc.c	/^static u32 csize_list_40[] = { 1, 3 };$/;"	v	typeref:typename:u32[]	file:
csize_list_5	board/micronas/vct/scc.c	/^static u32 csize_list_5[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_6	board/micronas/vct/scc.c	/^static u32 csize_list_6[] = { 1, 0 };$/;"	v	typeref:typename:u32[]	file:
csize_list_7	board/micronas/vct/scc.c	/^static u32 csize_list_7[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_8	board/micronas/vct/scc.c	/^static u32 csize_list_8[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csize_list_9	board/micronas/vct/scc.c	/^static u32 csize_list_9[] = { 1, 1 };$/;"	v	typeref:typename:u32[]	file:
csl	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
csm	arch/m68k/include/asm/immap_5307.h	/^typedef struct csm {$/;"	s
csm_t	arch/m68k/include/asm/immap_5307.h	/^} csm_t;$/;"	t	typeref:struct:csm
csmode	arch/powerpc/include/asm/immap_85xx.h	/^	u32	csmode[4];	\/* 0x2c: sSPI CS0\/1\/2\/3 mode *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32[4]
csmr0	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr0;		\/* Chip-select Mask *\/$/;"	m	struct:fbcs	typeref:typename:u32
csmr0	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr0;      \/* Chip-select Mask *\/$/;"	m	struct:fbcs	typeref:typename:u32
csmr0	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr0;      \/* Chip-select Mask *\/$/;"	m	struct:csm	typeref:typename:u32
csmr1	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr1;$/;"	m	struct:fbcs	typeref:typename:u32
csmr1	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr1;$/;"	m	struct:fbcs	typeref:typename:u32
csmr1	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr1;$/;"	m	struct:csm	typeref:typename:u32
csmr2	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr2;$/;"	m	struct:fbcs	typeref:typename:u32
csmr2	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr2;$/;"	m	struct:fbcs	typeref:typename:u32
csmr2	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr2;$/;"	m	struct:csm	typeref:typename:u32
csmr3	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr3;$/;"	m	struct:fbcs	typeref:typename:u32
csmr3	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr3;$/;"	m	struct:fbcs	typeref:typename:u32
csmr3	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr3;$/;"	m	struct:csm	typeref:typename:u32
csmr4	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr4;$/;"	m	struct:fbcs	typeref:typename:u32
csmr4	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr4;$/;"	m	struct:fbcs	typeref:typename:u32
csmr4	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr4;$/;"	m	struct:csm	typeref:typename:u32
csmr5	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr5;$/;"	m	struct:fbcs	typeref:typename:u32
csmr5	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr5;$/;"	m	struct:fbcs	typeref:typename:u32
csmr5	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr5;$/;"	m	struct:csm	typeref:typename:u32
csmr6	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr6;$/;"	m	struct:fbcs	typeref:typename:u32
csmr6	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr6;$/;"	m	struct:fbcs	typeref:typename:u32
csmr6	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr6;$/;"	m	struct:csm	typeref:typename:u32
csmr7	arch/m68k/include/asm/coldfire/flexbus.h	/^	u32 csmr7;$/;"	m	struct:fbcs	typeref:typename:u32
csmr7	arch/m68k/include/asm/coldfire/flexbus.h	/^    u32 csmr7;$/;"	m	struct:fbcs	typeref:typename:u32
csmr7	arch/m68k/include/asm/immap_5307.h	/^	u32 csmr7;$/;"	m	struct:csm	typeref:typename:u32
cso	drivers/net/e1000.h	/^			uint8_t cso;	\/* Checksum offset *\/$/;"	m	struct:e1000_tx_desc::__anon7fc27345100a::__anon7fc273451108	typeref:typename:uint8_t
csor	include/fsl_ifc.h	/^	u32 csor;$/;"	m	struct:fsl_ifc_csor	typeref:typename:u32
csor0	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor0 = $mbar - 1 + 0x044$/;"	t
csor1	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor1 = $mbar - 1 + 0x04c$/;"	t
csor2	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor2 = $mbar - 1 + 0x054$/;"	t
csor3	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor3 = $mbar - 1 + 0x05c$/;"	t
csor4	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor4 = $mbar - 1 + 0x064$/;"	t
csor5	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor5 = $mbar - 1 + 0x06c$/;"	t
csor6	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor6 = $mbar - 1 + 0x074$/;"	t
csor7	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $csor7 = $mbar - 1 + 0x07c$/;"	t
csor_cs	include/fsl_ifc.h	/^	struct fsl_ifc_csor csor_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT];$/;"	m	struct:fsl_ifc_fcm	typeref:struct:fsl_ifc_csor[]
csor_ext	include/fsl_ifc.h	/^	u32 csor_ext;$/;"	m	struct:fsl_ifc_csor	typeref:typename:u32
cspi_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct cspi_regs {$/;"	s
cspi_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct cspi_regs {$/;"	s
cspi_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct cspi_regs {$/;"	s
cspi_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct cspi_regs {$/;"	s
cspi_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct cspi_regs {$/;"	s
cspi_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct cspi_regs {$/;"	s
cspr	include/fsl_ifc.h	/^	u32 cspr;$/;"	m	struct:fsl_ifc_cspr	typeref:typename:u32
cspr_cs	include/fsl_ifc.h	/^	struct fsl_ifc_cspr cspr_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT];$/;"	m	struct:fsl_ifc_fcm	typeref:struct:fsl_ifc_cspr[]
cspr_ext	include/fsl_ifc.h	/^	u32 cspr_ext;$/;"	m	struct:fsl_ifc_cspr	typeref:typename:u32
cspwcr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cspwcr0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cspwcr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cspwcr1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
csr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u32	csr;$/;"	m	struct:ccsr_clk_cluster_group::__anon245f08ff0208	typeref:typename:u32
csr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u32 csr;	\/* core cluster n clock control status *\/$/;"	m	struct:ccsr_clk_ctrl::__anon245f08ff0408	typeref:typename:u32
csr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 csr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
csr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	csr;$/;"	m	struct:clkctl	typeref:typename:u32
csr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 csr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
csr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 csr;$/;"	m	struct:dma4_chan	typeref:typename:u32
csr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 csr;	\/* RCC clock control & status *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
csr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 csr;$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
csr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 csr;	\/* RCC clock control & status *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
csr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 csr;$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
csr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 csr;	\/* RCC clock control & status *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
csr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 csr;		\/* 0x0c controller status register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
csr	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 csr;$/;"	m	struct:ccm_reg	typeref:typename:u32
csr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 csr;		\/* 0x0c controller status register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
csr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	csr[8]; 	\/* 0x00 SDRAMC Mode Register *\/$/;"	m	struct:at91_smc	typeref:typename:u32[8]
csr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		csr[4];		\/* 0x30 Chip Select Register 0-3 *\/$/;"	m	struct:at91_spi	typeref:typename:u32[4]
csr	arch/m68k/include/asm/coldfire/edma.h	/^	u16 csr;		\/* 0x1E Control and Status *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u16
csr	board/freescale/common/ngpixis.h	/^	u8 csr;$/;"	m	struct:ngpixis	typeref:typename:u8
csr	board/freescale/common/pixis.h	/^	u8 csr;$/;"	m	struct:pixis	typeref:typename:u8
csr	drivers/serial/atmel_usart.h	/^	u32	csr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
csr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	csr;		\/* Controller Status *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
csr0	drivers/usb/musb/musb_core.h	/^	u16	csr0;$/;"	m	struct:musb_ep0_regs	typeref:typename:u16
csr1	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 csr1;  \/* power control\/status register 2 *\/$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
csr2	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 csr2;  \/* power control\/status register 2 *\/$/;"	m	struct:stm32_pwr_regs	typeref:typename:u32
csr2	board/freescale/common/pixis.h	/^	u8 csr2;$/;"	m	struct:pixis	typeref:typename:u8
csr_in32	arch/mips/include/asm/io.h	/^#define csr_in32(/;"	d
csr_out32	arch/mips/include/asm/io.h	/^#define csr_out32(/;"	d
csr_read	arch/sh/cpu/sh4/watchdog.c	/^static unsigned char csr_read(void)$/;"	f	typeref:typename:unsigned char	file:
csr_write	arch/sh/cpu/sh4/watchdog.c	/^static void csr_write(unsigned char value)$/;"	f	typeref:typename:void	file:
csrbcr	include/tsi148.h	/^	unsigned int csrbcr;                  \/* 0xff4         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
csrbsr	include/tsi148.h	/^	unsigned int csrbsr;                  \/* 0xff8         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
css	drivers/net/e1000.h	/^			uint8_t css;	\/* Checksum start *\/$/;"	m	struct:e1000_tx_desc::__anon7fc27345120a::__anon7fc273451308	typeref:typename:uint8_t
cssa	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 cssa;$/;"	m	struct:dma4_chan	typeref:typename:u32
cssys_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cssys_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cssys_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cssys_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cssys_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cssys_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cssys_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cssys_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
cssys_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	cssys_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
cst_cnt	arch/x86/include/asm/acpi_table.h	/^	u8 cst_cnt;$/;"	m	struct:acpi_fadt	typeref:typename:u8
csta	include/fsl_sec.h	/^	u32	csta;		\/* CAAM Status Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
cstat	arch/arm/cpu/armv7/am33xx/sys_info.c	/^struct ctrl_stat *cstat = (struct ctrl_stat *)CTRL_BASE;$/;"	v	typeref:struct:ctrl_stat *
csu	arch/arm/dts/imx6ull.dtsi	/^			csu: csu@021c0000 {$/;"	l
csu_base	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define csu_base /;"	d
csu_cslx_access	include/fsl_csu.h	/^enum csu_cslx_access {$/;"	g
csu_cslx_ind	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^enum csu_cslx_ind {$/;"	g
csu_cslx_ind	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^enum csu_cslx_ind {$/;"	g
csu_dma	include/xilinx.h	/^	csu_dma,		\/* csu_dma interface (zynqmp) *\/$/;"	e	enum:__anon15c234ca0103
csu_ns_dev	include/fsl_csu.h	/^struct csu_ns_dev {$/;"	s
csu_regs	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct csu_regs {$/;"	s
csum	arch/x86/include/asm/sfi.h	/^	u8	csum;$/;"	m	struct:sfi_table_header	typeref:typename:u8
csum	drivers/net/e1000.h	/^	uint16_t csum;		\/* Packet checksum *\/$/;"	m	struct:e1000_rx_desc	typeref:typename:uint16_t
csum	tools/kwboot.c	/^	uint8_t csum;$/;"	m	struct:kwboot_block	typeref:typename:uint8_t	file:
csumResult	include/MCD_dma.h	/^	u32 csumResult;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:u32
csuscfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	csuscfg;	\/* 0x80: APB_MISC_GP_CSUSCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
csuscfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	csuscfg;	\/* 0x8C: APB_MISC_GP_CSUSCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
cswcr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cswcr0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cswcr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 cswcr1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
cswl_override	include/fsl_ddr_sdram.h	/^	unsigned int cswl_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
csx_pin	drivers/video/ssd2828.h	/^	int csx_pin;$/;"	m	struct:ssd2828_config	typeref:typename:int
csync	arch/blackfin/include/asm/blackfin_local.h	/^#define csync(/;"	d
ctDispRegs	drivers/video/ct69000.c	/^ctDispRegs (unsigned short index, int from, int to)$/;"	f	typeref:typename:void	file:
ctLoadRegs	drivers/video/ct69000.c	/^ctLoadRegs (unsigned short index, CT_CFG_TABLE * regTab)$/;"	f	typeref:typename:void	file:
ctRead	drivers/video/ct69000.c	/^ctRead (unsigned short index)$/;"	f	typeref:typename:unsigned char	file:
ctRead_i	drivers/video/ct69000.c	/^ctRead_i (unsigned short index, char reg)$/;"	f	typeref:typename:unsigned char	file:
ctWrite	drivers/video/ct69000.c	/^ctWrite (unsigned short index, unsigned char val)$/;"	f	typeref:typename:void	file:
ctWrite_i	drivers/video/ct69000.c	/^ctWrite_i (unsigned short index, char reg, char val)$/;"	f	typeref:typename:void	file:
ct_data	lib/zlib/deflate.h	/^} FAR ct_data;$/;"	t	typeref:struct:ct_data_s FAR
ct_data_s	lib/zlib/deflate.h	/^typedef struct ct_data_s {$/;"	s
ctags	Makefile	/^tags ctags:$/;"	t
ctar	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 ctar[8];	\/* 0x0C - 0x28 *\/$/;"	m	struct:dspi	typeref:typename:u32[8]
ctar	include/fsl_dspi.h	/^	u32 ctar[8];	\/* 0x0C - 0x28 *\/$/;"	m	struct:dspi	typeref:typename:u32[8]
ctar_val	drivers/spi/fsl_dspi.c	/^	uint ctar_val[FSL_DSPI_MAX_CHIPSELECT];$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint[]	file:
ctbclkselrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctbclkselrl;	\/* Core Time Base Clock Select *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ctbenrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctbenrl;	\/* Core Time Base Enable *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ctbenrl	arch/powerpc/include/asm/immap_85xx.h	/^#define ctbenrl /;"	d
ctbhltcrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctbhltcrl;	\/* Core Time Base Halt Control *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ctbptr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctbptr;		\/* Current TX Buffer Desc Ptr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ctbptr	include/tsec.h	/^	u32	ctbptr;		\/* Current TxBD Pointer *\/$/;"	m	struct:tsec	typeref:typename:u32
ctbptrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctbptrh;	\/* Current TX Buffer Desc Ptr High *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ctcr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 ctcr;		\/* Count Control Register	*\/$/;"	m	struct:timer_regs	typeref:typename:u32
ctcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctcsr;	\/* Component Tag CSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
ctcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ctcsr;		\/* 0xc006c - Component Tag Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ctcwr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 ctcwr;		\/* 0x1C8 *\/$/;"	m	struct:fecdma	typeref:typename:u32
ctermm2	board/esd/cpci405/cpci405.c	/^int ctermm2(void)$/;"	f	typeref:typename:int
ctfb	drivers/video/ati_radeon_fb.c	/^GraphicDevice ctfb;$/;"	v	typeref:typename:GraphicDevice
ctfb	drivers/video/ct69000.c	/^GraphicDevice ctfb;$/;"	v	typeref:typename:GraphicDevice
ctfb_chips_properties	drivers/video/ct69000.c	/^struct ctfb_chips_properties {$/;"	s	file:
ctfb_res_modes	drivers/video/videomodes.h	/^struct ctfb_res_modes {$/;"	s
ctfb_vesa_modes	drivers/video/videomodes.h	/^struct ctfb_vesa_modes {$/;"	s
ctime	include/ext_common.h	/^	__le32 ctime;$/;"	m	struct:ext2_inode	typeref:typename:__le32
ctime	include/fat.h	/^	__u16	ctime;		\/* Creation time *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
ctime	include/jffs2/jffs2.h	/^	__u32 ctime;      \/* Change time.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
ctime_ms	include/fat.h	/^	__u8	ctime_ms;	\/* Creation time, milliseconds *\/$/;"	m	struct:dir_entry	typeref:typename:__u8
ctime_nsec	fs/ubifs/ubifs-media.h	/^	__le32 ctime_nsec;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
ctime_sec	fs/ubifs/ubifs-media.h	/^	__le64 ctime_sec;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le64
ctl	arch/arm/imx-common/cpu.c	/^	uint32_t	ctl;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
ctl	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 ctl;$/;"	m	struct:globaltimer	typeref:typename:u32
ctl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ctl;	\/* Control Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ctl;$/;"	m	struct:de_glb	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 ctl;		\/* 0x00 Control *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 ctl;$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 ctl;		\/* 0x100 *\/$/;"	m	struct:sunxi_rtc	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 ctl;		\/* 0x80 *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 ctl;		\/* 0xa0 *\/$/;"	m	struct:sunxi_64cnt	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 ctl;$/;"	m	struct:sunxi_timer	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 ctl;		\/* 0x00 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
ctl	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 ctl;		\/* 0x10 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
ctl	arch/arm/include/asm/arch/display2.h	/^	u32 ctl;$/;"	m	struct:de_glb	typeref:typename:u32
ctl	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 ctl;		\/* 0x00 Control *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
ctl	arch/arm/include/asm/arch/gpio.h	/^	u32 ctl;$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32
ctl	arch/arm/include/asm/arch/timer.h	/^	u32 ctl;		\/* 0x100 *\/$/;"	m	struct:sunxi_rtc	typeref:typename:u32
ctl	arch/arm/include/asm/arch/timer.h	/^	u32 ctl;		\/* 0x80 *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
ctl	arch/arm/include/asm/arch/timer.h	/^	u32 ctl;		\/* 0xa0 *\/$/;"	m	struct:sunxi_64cnt	typeref:typename:u32
ctl	arch/arm/include/asm/arch/timer.h	/^	u32 ctl;$/;"	m	struct:sunxi_timer	typeref:typename:u32
ctl	arch/arm/include/asm/arch/watchdog.h	/^	u32 ctl;		\/* 0x00 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
ctl	arch/arm/include/asm/arch/watchdog.h	/^	u32 ctl;		\/* 0x10 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
ctl	arch/arm/include/asm/ti-common/keystone_net.h	/^	u_int32_t ctl;		\/* Control bitfield *\/$/;"	m	struct:mac_sl_cfg	typeref:typename:u_int32_t
ctl	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 ctl;$/;"	m	struct:at91_emac	typeref:typename:u32
ctl	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	ctl;		\/* 00 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
ctl	arch/m68k/include/asm/immap_5301x.h	/^	u8 ctl;			\/* 0x05 Ctrl *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
ctl	drivers/block/sata_dwc.c	/^	struct dmareg ctl;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
ctl	drivers/block/sata_dwc.h	/^	u8			ctl;$/;"	m	struct:ata_port	typeref:typename:u8
ctl	drivers/net/sunxi_emac.c	/^	u32 ctl;	\/* 0x00 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
ctl	drivers/net/xilinx_ll_temac.h	/^	u32 ctl;	\/* Control *\/$/;"	m	struct:temac_reg	typeref:typename:u32
ctl	drivers/reset/sandbox-reset-test.c	/^	struct reset_ctl ctl;$/;"	m	struct:sandbox_reset_test	typeref:struct:reset_ctl	file:
ctl	drivers/spi/bfin_spi.c	/^	u16 ctl, baud, flg;$/;"	m	struct:bfin_spi_slave	typeref:typename:u16	file:
ctl	include/libata.h	/^	u8			ctl;		\/* control reg *\/$/;"	m	struct:ata_taskfile	typeref:typename:u8
ctl	include/universe.h	/^	unsigned int ctl;      \/* Control     *\/$/;"	m	struct:_SLAVE_IMAGE	typeref:typename:unsigned int
ctl0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ctl0; 	\/* control 0 *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
ctl0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ctl0;$/;"	m	struct:esdc_regs	typeref:typename:u32
ctl1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ctl1; 	\/* control 1 *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
ctl1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ctl1;$/;"	m	struct:esdc_regs	typeref:typename:u32
ctl_addr	drivers/block/pata_bfin.h	/^	unsigned long ctl_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
ctl_addr	drivers/block/sata_dwc.h	/^	void __iomem		*ctl_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
ctl_addr	drivers/block/sata_sil3114.h	/^	unsigned long ctl_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
ctl_command_active	drivers/input/ps2mult.c	/^static int ctl_command_active = 0;$/;"	v	typeref:typename:int	file:
ctl_id	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u8 ctl_id;$/;"	m	struct:pmux_pingrp_desc	typeref:typename:u8
ctl_led	board/freescale/common/qixis.h	/^	u8 ctl_led;$/;"	m	struct:qixis	typeref:typename:u8
ctl_prog_io1	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned int ctl_prog_io1;	\/* 0x448 *\/$/;"	m	struct:t2	typeref:typename:unsigned int
ctl_reg	drivers/block/pata_bfin.h	/^	unsigned char ctl_reg;$/;"	m	struct:ata_port	typeref:typename:unsigned char
ctl_reg	drivers/block/sata_sil3114.h	/^	unsigned char ctl_reg;$/;"	m	struct:sata_port	typeref:typename:unsigned char
ctl_sys	board/freescale/common/qixis.h	/^	u8 ctl_sys;$/;"	m	struct:qixis	typeref:typename:u8
ctlr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	ctlr;		\/* PSC + 0x1c *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
ctlr	include/mpc5xxx.h	/^	volatile u8	ctlr;		\/* PSC + 0x1c *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
ctlr	include/pci.h	/^	struct udevice *ctlr;$/;"	m	struct:pci_controller	typeref:struct:udevice *
ctlr_list	post/cpu/mpc8xx/ether.c	/^static int ctlr_list[][2] = { {CTLR_SCC, 1} };$/;"	v	typeref:typename:int[][2]	file:
ctlr_list	post/cpu/mpc8xx/ether.c	/^static int ctlr_list[][2] = { };$/;"	v	typeref:typename:int[][2]	file:
ctlr_list	post/cpu/mpc8xx/uart.c	/^static int ctlr_list[][2] = { };$/;"	v	typeref:typename:int[][2]	file:
ctlr_list	post/cpu/mpc8xx/uart.c	/^static int ctlr_list[][2] =$/;"	v	typeref:typename:int[][2]	file:
ctlr_name	post/cpu/mpc8xx/ether.c	/^static char *ctlr_name[1] = { "SCC" };$/;"	v	typeref:typename:char * [1]	file:
ctlr_name	post/cpu/mpc8xx/uart.c	/^static char *ctlr_name[2] = { "SMC", "SCC" };$/;"	v	typeref:typename:char * [2]	file:
ctlr_proc	post/cpu/mpc8xx/ether.c	/^} ctlr_proc[1];$/;"	v	typeref:struct:__anon27059ff10108[1]
ctlr_proc	post/cpu/mpc8xx/uart.c	/^} ctlr_proc[2];$/;"	v	typeref:struct:__anon0de951550108[2]
ctor	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 ctor;	\/* 0x0050 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ctor	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ctor;$/;"	m	struct:clkctl	typeref:typename:u32
ctor	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 ctor;	\/* 0x0050 *\/$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
ctor	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 ctor;$/;"	m	struct:ccm_reg	typeref:typename:u32
ctpr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctpr;		\/* Current Task Priority *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ctpr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ctpr;		\/* 0x40080 - Current Task Priority Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ctpr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ctpr0;		\/* Current Task Priority for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ctpr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ctpr0;		\/* 0x60080 - Current Task Priority Register for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ctpr_ls	include/fsl_sec.h	/^	u32	ctpr_ls;	\/* Compile Time Parameters Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
ctpr_ms	include/fsl_sec.h	/^	u32	ctpr_ms;	\/* Compile Time Parameters Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
ctr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int ctr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
ctr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ctr;		\/* counter value field register *\/$/;"	m	struct:rtclk83xx	typeref:typename:u32
ctr	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG ctr;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
ctr	drivers/rtc/mpc5xxx.c	/^	volatile ulong	ctr;	\/* MBAR+0x810: current time register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
ctr_addr	drivers/usb/host/xhci-fsl.c	/^unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR;$/;"	v	typeref:typename:unsigned long[]
ctr_addr	drivers/usb/host/xhci-zynqmp.c	/^unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;$/;"	v	typeref:typename:unsigned long[]
ctrd0	drivers/block/ftide020.h	/^	unsigned int	ctrd0;		\/* 0x10 - Command Timing Reg Device 0 *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
ctrd1	drivers/block/ftide020.h	/^	unsigned int	ctrd1;		\/* 0x18 - Command Timing Reg Device 1 *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
ctrl	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;$/;"	v	typeref:struct:uart_ctrl_regs *	file:
ctrl	arch/arm/cpu/armv7/mx6/soc.c	/^	u32	ctrl;$/;"	m	struct:scu_regs	typeref:typename:u32	file:
ctrl	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct omap_sys_ctrl_regs const **ctrl =$/;"	v	typeref:struct:omap_sys_ctrl_regs const **
ctrl	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct omap_sys_ctrl_regs const **ctrl =$/;"	v	typeref:struct:omap_sys_ctrl_regs const **
ctrl	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 ctrl;		\/* Controls operation of the EMC             *\/$/;"	m	struct:emc_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 ctrl;		\/* Control Register		*\/$/;"	m	struct:hsuart_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 ctrl;		\/* Control Register		*\/$/;"	m	struct:uart_ctrl_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 ctrl;		\/* Control Register			*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 ctrl;	\/* 0x10600 *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ctrl;   	\/* control *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:cspi_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:cspi_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ctrl;	\/* control *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:cspi_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 ctrl;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:cspi_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ctrl;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:cspi_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	ctrl[4];		\/* Control *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
ctrl	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:cspi_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^struct ctrl {$/;"	s
ctrl	arch/arm/include/asm/arch-rockchip/pwm.h	/^	u32 ctrl;$/;"	m	struct:rk3288_pwm	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 ctrl;		\/* base + 0x4 *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ctrl;			\/* 0x00 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ctrl;			\/* 0x004 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ctrl;			\/* 0x00 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ctrl;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 ctrl;	\/* 0x00 control *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 ctrl;	\/* 0x00 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 ctrl;			\/* 10: DVC_I2C_CTRL_REG *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
ctrl	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ctrl;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 ctrl;		\/* base + 0x4 *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/display.h	/^	u32 ctrl;			\/* 0x00 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/display.h	/^	u32 ctrl;			\/* 0x004 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/display2.h	/^	u32 ctrl;			\/* 0x00 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/display2.h	/^	u32 ctrl;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/p2wi.h	/^	u32 ctrl;	\/* 0x00 control *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/arch/rsb.h	/^	u32 ctrl;	\/* 0x00 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
ctrl	arch/arm/include/asm/armv7m.h	/^	uint32_t ctrl;		\/* Control Register *\/$/;"	m	struct:v7m_mpu	typeref:typename:uint32_t
ctrl	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	ctrl; \/* 0x40 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
ctrl	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 ctrl;$/;"	m	struct:kwwin_registers	typeref:typename:u32
ctrl	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 ctrl;$/;"	m	struct:orion5x_win_registers	typeref:typename:u32
ctrl	arch/arm/mach-orion5x/timer.c	/^	u32 ctrl;	\/* Timer control reg *\/$/;"	m	struct:orion5x_tmr_registers	typeref:typename:u32	file:
ctrl	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	ctrl;$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32
ctrl	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	ctrl;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
ctrl	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	ctrl;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
ctrl	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	ctrl;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
ctrl	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	ctrl;			\/* 0x00 *\/$/;"	m	struct:scu_registers	typeref:typename:u32
ctrl	arch/arm/mach-socfpga/include/mach/timer.h	/^	u32	ctrl;$/;"	m	struct:socfpga_timer	typeref:typename:u32
ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ctrl; \/* 0x0 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
ctrl	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 ctrl;		\/* 0x04 Control *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
ctrl	arch/m68k/include/asm/coldfire/flexcan.h	/^	u8 ctrl;		\/* 0x01 Control *\/$/;"	m	struct:can_msgbuf_ctrl	typeref:typename:u8
ctrl	arch/m68k/include/asm/immap_520x.h	/^	u32 ctrl;		\/* 0x04 Ctrl *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
ctrl	arch/m68k/include/asm/immap_5301x.h	/^	u32 ctrl;		\/* 0x04 Ctrl *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
ctrl	arch/m68k/include/asm/immap_5329.h	/^	u32 ctrl;		\/* 0x04 Control register *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
ctrl	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 ctrl;		\/* 0x04 *\/$/;"	m	struct:sdram	typeref:typename:u32
ctrl	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ctrl;$/;"	m	struct:gptmr	typeref:typename:u8
ctrl	arch/powerpc/include/asm/ppc4xx-mal.h	/^  short	 ctrl;		    \/* MAL \/ Commac status control bits *\/$/;"	m	struct:__anonf209d9e80108	typeref:typename:short
ctrl	board/esd/pmc440/pmc440.h	/^	u32 ctrl;$/;"	m	struct:pmc440_fifo_s	typeref:typename:u32
ctrl	board/mpl/common/kbd.c	/^static unsigned char ctrl = 0;$/;"	v	typeref:typename:unsigned char	file:
ctrl	drivers/block/sata_sil.h	/^	__le16 ctrl;$/;"	m	struct:sil_prb	typeref:typename:__le16
ctrl	drivers/i2c/lpc32xx_i2c.c	/^	u32 ctrl;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
ctrl	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 ctrl;		\/* 0x14 PMECC Control Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
ctrl	drivers/mtd/nand/fsl_elbc_nand.c	/^	struct fsl_elbc_ctrl *ctrl;$/;"	m	struct:fsl_elbc_mtd	typeref:struct:fsl_elbc_ctrl *	file:
ctrl	drivers/mtd/nand/fsl_ifc_nand.c	/^	struct fsl_ifc_ctrl *ctrl;$/;"	m	struct:fsl_ifc_mtd	typeref:struct:fsl_ifc_ctrl *	file:
ctrl	drivers/mtd/nand/kirkwood_nand.c	/^	u32 ctrl;	\/* 0x10470 *\/$/;"	m	struct:kwnandf_registers	typeref:typename:u32	file:
ctrl	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 ctrl;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
ctrl	drivers/mtd/pic32_flash.c	/^	struct pic32_reg_atomic ctrl;$/;"	m	struct:pic32_reg_nvm	typeref:struct:pic32_reg_atomic	file:
ctrl	drivers/net/ftmac110.h	/^	uint64_t ctrl;$/;"	m	struct:ftmac110_desc	typeref:typename:uint64_t
ctrl	drivers/net/macb.c	/^	u32	ctrl;$/;"	m	struct:macb_dma_desc	typeref:typename:u32	file:
ctrl	drivers/spi/mvebu_a3700_spi.c	/^	u32 ctrl;	\/* 0x10600 *\/$/;"	m	struct:spi_reg	typeref:typename:u32	file:
ctrl	drivers/spi/pic32_spi.c	/^	struct pic32_reg_atomic ctrl;$/;"	m	struct:pic32_reg_spi	typeref:struct:pic32_reg_atomic	file:
ctrl	drivers/spi/tegra20_slink.c	/^	struct tegra30_spi_priv *ctrl;$/;"	m	struct:tegra_spi_slave	typeref:struct:tegra30_spi_priv *	file:
ctrl	drivers/usb/dwc3/core.h	/^	u32		ctrl;$/;"	m	struct:dwc3_trb	typeref:typename:u32
ctrl	drivers/usb/eth/asix88179.c	/^	unsigned char ctrl, timer_l, timer_h, size, ifg;$/;"	m	struct:__anond17683530108	typeref:typename:unsigned char	file:
ctrl	drivers/usb/gadget/atmel_usba_udc.h	/^	u32					ctrl;$/;"	m	struct:usba_request	typeref:typename:u32
ctrl	drivers/usb/gadget/atmel_usba_udc.h	/^	u32 ctrl;$/;"	m	struct:usba_dma_desc	typeref:typename:u32
ctrl	drivers/usb/gadget/ci_udc.h	/^	struct ehci_ctrl		*ctrl;$/;"	m	struct:ci_drv	typeref:struct:ehci_ctrl *
ctrl	drivers/usb/host/ehci-exynos.c	/^	struct ehci_ctrl ctrl;$/;"	m	struct:exynos_ehci	typeref:struct:ehci_ctrl	file:
ctrl	drivers/usb/host/ehci-generic.c	/^	struct ehci_ctrl ctrl;$/;"	m	struct:generic_ehci	typeref:struct:ehci_ctrl	file:
ctrl	drivers/usb/host/ehci-msm.c	/^	struct ehci_ctrl ctrl; \/* Needed by EHCI *\/$/;"	m	struct:msm_ehci_priv	typeref:struct:ehci_ctrl	file:
ctrl	drivers/usb/host/ehci-mx6.c	/^	struct ehci_ctrl ctrl;$/;"	m	struct:ehci_mx6_priv_data	typeref:struct:ehci_ctrl	file:
ctrl	drivers/usb/host/ehci-mx6.c	/^	u32	ctrl[4];	\/* otg\/host1-3 *\/$/;"	m	struct:usbnc_regs	typeref:typename:u32[4]	file:
ctrl	drivers/usb/host/ehci-vf.c	/^	struct ehci_ctrl ctrl;$/;"	m	struct:ehci_vf_priv_data	typeref:struct:ehci_ctrl	file:
ctrl	drivers/usb/host/xhci-exynos5.c	/^	struct xhci_ctrl ctrl;$/;"	m	struct:exynos_xhci	typeref:struct:xhci_ctrl	file:
ctrl	drivers/usb/host/xhci-mvebu.c	/^	struct xhci_ctrl ctrl;	\/* Needs to come first in this struct! *\/$/;"	m	struct:mvebu_xhci	typeref:struct:xhci_ctrl	file:
ctrl	drivers/usb/host/xhci-rockchip.c	/^	struct xhci_ctrl ctrl;$/;"	m	struct:rockchip_xhci	typeref:struct:xhci_ctrl	file:
ctrl	drivers/video/am335x-fb.c	/^	unsigned int		ctrl;			\/* 0x04 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
ctrl	drivers/video/da8xx-fb.c	/^	u32	ctrl;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
ctrl	include/ec_commands.h	/^			uint8_t ctrl, reg, value;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::reg	typeref:typename:uint8_t
ctrl	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 ctrl;$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
ctrl	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t ctrl;$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
ctrl	include/fsl_usb.h	/^	u32	ctrl;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
ctrl	include/grlib/apbuart.h	/^	volatile unsigned int ctrl;$/;"	m	struct:__anon8f85467c0108	typeref:typename:volatile unsigned int
ctrl	include/grlib/gptimer.h	/^	volatile unsigned int ctrl;$/;"	m	struct:__anon98dc47250108	typeref:typename:volatile unsigned int
ctrl	include/linux/mtd/fsmc_nand.h	/^	u32 ctrl;			\/* 0x00 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
ctrl	include/linux/mtd/nand.h	/^	struct platform_nand_ctrl ctrl;$/;"	m	struct:platform_nand_data	typeref:struct:platform_nand_ctrl
ctrl	include/mpc5xxx.h	/^	volatile u32	ctrl;		\/* INTR + 0x10 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
ctrl	include/mpc5xxx.h	/^	volatile u32	ctrl;$/;"	m	struct:mpc5xxx_sdram	typeref:typename:volatile u32
ctrl0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 ctrl0;		\/*0x0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
ctrl0	drivers/net/sunxi_emac.c	/^	u32 ctrl0;$/;"	m	struct:sunxi_sramc_regs	typeref:typename:u32	file:
ctrl1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl1;		\/*0x0*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 ctrl1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
ctrl1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 ctrl1;			\/* 00: DVC_CTRL_REG1 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
ctrl1	drivers/net/bcm-sf2-eth-gmac.c	/^	uint32_t	ctrl1;$/;"	m	struct:__anon2233d0570108	typeref:typename:uint32_t	file:
ctrl1	drivers/net/sunxi_emac.c	/^	u32 ctrl1;$/;"	m	struct:sunxi_sramc_regs	typeref:typename:u32	file:
ctrl1	drivers/usb/host/ehci-mx6.c	/^	u32 ctrl1;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
ctrl10	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl10;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl12	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl12;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl13	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl13;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl14	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl14;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl2;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 ctrl2;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
ctrl2	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 ctrl2;			\/* 04: DVC_CTRL_REG2 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
ctrl2	drivers/net/bcm-sf2-eth-gmac.c	/^	uint32_t	ctrl2;$/;"	m	struct:__anon2233d0570108	typeref:typename:uint32_t	file:
ctrl2	drivers/spi/pic32_spi.c	/^	struct pic32_reg_atomic ctrl2;$/;"	m	struct:pic32_reg_spi	typeref:struct:pic32_reg_atomic	file:
ctrl2	drivers/usb/host/ehci-mx6.c	/^	u32 ctrl2;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
ctrl3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl3;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl3	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 ctrl3;			\/* 08: DVC_CTRL_REG3 *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
ctrl4	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl4;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl5	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl5;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl6	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl6;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl8	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl8;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl9	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ctrl9;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ctrl_24m	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ctrl_24m;			\/* offset 0x0000 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ctrl_24m_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ctrl_24m_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ctrl_24m_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ctrl_24m_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ctrl_24m_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ctrl_24m_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ctrl_addr	drivers/net/xilinx_ll_temac.c	/^	unsigned long		ctrl_addr;$/;"	m	struct:ll_temac_info	typeref:typename:unsigned long	file:
ctrl_adll	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 ctrl_adll[MAX_CS_NUM * MAX_INTERFACE_NUM * MAX_BUS_NUM];$/;"	v	typeref:typename:u32[]
ctrl_barrier	arch/sh/include/asm/system.h	/^#define ctrl_barrier(/;"	d
ctrl_base	arch/arm/cpu/armv7/omap3/sys_info.c	/^static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;$/;"	v	typeref:struct:ctrl *	file:
ctrl_base	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*ctrl_base;$/;"	m	struct:musb	typeref:typename:void __iomem *
ctrl_bstlen	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_bstlen;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	ctrl_cfg;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
ctrl_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	ctrl_cfg;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
ctrl_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     ctrl_clr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_clr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ctrl_clr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_clr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ctrl_clr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_core_sma_sw_0	arch/arm/include/asm/omap_common.h	/^	u32 ctrl_core_sma_sw_0;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
ctrl_core_sma_sw_1	arch/arm/include/asm/omap_common.h	/^	u32 ctrl_core_sma_sw_1;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
ctrl_ddr3ch	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_ddr3ch;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_ddr_ctrl_ext_0	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_ddr_ctrl_ext_0;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_ddrch	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_ddrch;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_ddrio_0	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_ddrio_0;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_ddrio_1	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_ddrio_1;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_ddrio_2	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_ddrio_2;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_dev	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct ctrl_dev {$/;"	s
ctrl_dll_on	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_dll_on;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_emif_sdram_config_ext	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_emif_sdram_config_ext;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_emif_sdram_config_ext_final	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_emif_sdram_config_ext_final;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_force	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_force;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_h8s	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	ctrl_h8s;$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short
ctrl_high_speed_serdes_phy_config	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int ctrl_high_speed_serdes_phy_config(void)$/;"	f	typeref:typename:int
ctrl_id	arch/arm/include/asm/arch-omap3/cpu.h	/^struct ctrl_id {$/;"	s
ctrl_inc	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_inc;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_ioregs	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ctrl_ioregs {$/;"	s
ctrl_ioregs	arch/arm/include/asm/arch-omap5/omap.h	/^struct ctrl_ioregs {$/;"	s
ctrl_lpddr2ch	arch/arm/include/asm/arch-omap5/omap.h	/^	u32 ctrl_lpddr2ch;$/;"	m	struct:ctrl_ioregs	typeref:typename:u32
ctrl_mod_mmap	drivers/spi/ti_qspi.c	/^	void *ctrl_mod_mmap;$/;"	m	struct:ti_qspi_priv	typeref:typename:void *	file:
ctrl_model_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^u16 ctrl_model_get(void)$/;"	f	typeref:typename:u16
ctrl_name	board/nokia/rx51/tag_omap.h	/^	char ctrl_name[16];$/;"	m	struct:omap_lcd_config	typeref:typename:char[16]
ctrl_omap_stat	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ctrl_omap_stat;	\/* 0x44C *\/$/;"	m	struct:ctrl	typeref:typename:u32
ctrl_ord	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 ctrl_ord;			\/* Control Override *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
ctrl_ord	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ctrl_ord;			\/* Control Override *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
ctrl_rdlat	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_rdlat;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_ref	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_ref;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_reg	drivers/spi/mxc_spi.c	/^	u32		ctrl_reg;$/;"	m	struct:mxc_spi_slave	typeref:typename:u32	file:
ctrl_reg	include/power/regulator.h	/^	u8 ctrl_reg;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:u8
ctrl_req	drivers/usb/dwc3/core.h	/^	struct usb_ctrlrequest	*ctrl_req;$/;"	m	struct:dwc3	typeref:struct:usb_ctrlrequest *
ctrl_req_addr	drivers/usb/dwc3/core.h	/^	dma_addr_t		ctrl_req_addr;$/;"	m	struct:dwc3	typeref:typename:dma_addr_t
ctrl_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ctrl_set;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_set	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ctrl_set;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_set	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ctrl_set;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_start	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_start;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_start_point	arch/arm/mach-exynos/clock_init.h	/^	unsigned ctrl_start_point;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ctrl_stat	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct ctrl_stat {$/;"	s
ctrl_stat	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 ctrl_stat;	\/*0x20104 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
ctrl_stat	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 ctrl_stat;	\/*0x20104 *\/$/;"	m	struct:orion5x_cpu_registers	typeref:typename:u32
ctrl_sweepres	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 ctrl_sweepres[ADLL_LENGTH][MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u32[][][]
ctrl_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ctrl_tog;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_tog	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ctrl_tog;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_tog	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ctrl_tog;$/;"	m	struct:ocotp_regs	typeref:typename:u32
ctrl_val	arch/x86/include/asm/sfi.h	/^	u32	ctrl_val;	\/* value to write to PERF_CTL *\/$/;"	m	struct:sfi_freq_table_entry	typeref:typename:u32
ctrl_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	ctrl_width;	\/* 0x60 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
ctrl_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	ctrl_width;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
ctrla	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ctrla;		\/* 0x9C || 0xC4 *\/$/;"	m	struct:sdrc_actim	typeref:typename:u32
ctrla	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 ctrla;$/;"	m	struct:board_sdrc_timings	typeref:typename:u32
ctrla	board/esd/pmc440/pmc440.h	/^	u32 ctrla;$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
ctrladdr	drivers/net/xilinx_ll_temac.h	/^	phys_addr_t		ctrladdr;$/;"	m	struct:ll_temac	typeref:typename:phys_addr_t
ctrlb	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ctrlb;		\/* 0xA0 || 0xC8 *\/$/;"	m	struct:sdrc_actim	typeref:typename:u32
ctrlb	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 ctrlb;$/;"	m	struct:board_sdrc_timings	typeref:typename:u32
ctrlb	board/esd/pmc440/pmc440.h	/^	u32 ctrlb;$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
ctrlc	common/console.c	/^int ctrlc(void)$/;"	f	typeref:typename:int
ctrlc	examples/standalone/mem_to_mem_idma2intr.c	/^int ctrlc (void)$/;"	f	typeref:typename:int
ctrlc	test/py/u_boot_console_base.py	/^    def ctrlc(self):$/;"	m	class:ConsoleBase
ctrlc_disabled	common/console.c	/^static int ctrlc_disabled = 0;	\/* see disable_ctrl() *\/$/;"	v	typeref:typename:int	file:
ctrlc_was_pressed	common/console.c	/^static int ctrlc_was_pressed = 0;$/;"	v	typeref:typename:int	file:
ctrldescl	drivers/video/fsl_dcu_fb.c	/^	u32 ctrldescl[DCU_LAYER_MAX_NUM][16];$/;"	m	struct:dcu_reg	typeref:typename:u32[][16]	file:
ctrldssegment	arch/arm/include/asm/ehci-omap.h	/^	u32 ctrldssegment;	\/* 0x20 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
ctrldssegment	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 ctrldssegment;	\/* ctrldssegment *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
ctrlhalt	drivers/net/xilinx_ll_temac.h	/^	int			(*ctrlhalt) (struct eth_device *);$/;"	m	struct:ll_temac	typeref:typename:int (*)(struct eth_device *)
ctrlinit	drivers/net/xilinx_ll_temac.h	/^	int			(*ctrlinit) (struct eth_device *);$/;"	m	struct:ll_temac	typeref:typename:int (*)(struct eth_device *)
ctrlr	drivers/usb/musb/davinci.h	/^	u32	ctrlr;$/;"	m	struct:davinci_usb_regs	typeref:typename:u32
ctrlr0	drivers/spi/rk_spi.h	/^	u32 ctrlr0;$/;"	m	struct:rockchip_spi	typeref:typename:u32
ctrlr1	drivers/spi/rk_spi.h	/^	u32 ctrlr1;$/;"	m	struct:rockchip_spi	typeref:typename:u32
ctrlreq_in_data_phase	drivers/usb/musb/musb_hcd.c	/^static int ctrlreq_in_data_phase(struct usb_device *dev, u32 len, void *buffer)$/;"	f	typeref:typename:int	file:
ctrlreq_in_status_phase	drivers/usb/musb/musb_hcd.c	/^static int ctrlreq_in_status_phase(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
ctrlreq_out_data_phase	drivers/usb/musb/musb_hcd.c	/^static int ctrlreq_out_data_phase(struct usb_device *dev, u32 len, void *buffer)$/;"	f	typeref:typename:int	file:
ctrlreq_out_status_phase	drivers/usb/musb/musb_hcd.c	/^static int ctrlreq_out_status_phase(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
ctrlreq_setup_phase	drivers/usb/musb/musb_hcd.c	/^static int ctrlreq_setup_phase(struct usb_device *dev, struct devrequest *setup)$/;"	f	typeref:typename:int	file:
ctrlreset	drivers/net/xilinx_ll_temac.h	/^	int			(*ctrlreset) (struct eth_device *);$/;"	m	struct:ll_temac	typeref:typename:int (*)(struct eth_device *)
ctrphs	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int ctrphs;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int
cts	drivers/video/rockchip/rk_hdmi.c	/^	u32 cts;$/;"	m	struct:tmds_n_cts	typeref:typename:u32	file:
ctur	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	ctur;		\/* PSC + 0x18 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
ctur	include/mpc5xxx.h	/^	volatile u8	ctur;		\/* PSC + 0x18 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
ctx	drivers/usb/host/xhci-fsl.c	/^	struct fsl_xhci ctx;$/;"	m	struct:xhci_fsl_priv	typeref:struct:fsl_xhci	file:
ctx1	arch/x86/include/asm/ptrace.h	/^		} ctx1;$/;"	m	union:irq_regs::__anonee9aafbf010a	typeref:struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0208
ctx2	arch/x86/include/asm/ptrace.h	/^		} ctx2;$/;"	m	union:irq_regs::__anonee9aafbf010a	typeref:struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0308
ctx_block	scripts/checkpatch.pl	/^sub ctx_block {$/;"	s
ctx_block_get	scripts/checkpatch.pl	/^sub ctx_block_get {$/;"	s
ctx_block_level	scripts/checkpatch.pl	/^sub ctx_block_level {$/;"	s
ctx_block_outer	scripts/checkpatch.pl	/^sub ctx_block_outer {$/;"	s
ctx_has_comment	scripts/checkpatch.pl	/^sub ctx_has_comment {$/;"	s
ctx_locate_comment	scripts/checkpatch.pl	/^sub ctx_locate_comment {$/;"	s
ctx_statement	scripts/checkpatch.pl	/^sub ctx_statement {$/;"	s
ctx_statement_block	scripts/checkpatch.pl	/^sub ctx_statement_block {$/;"	s
ctx_statement_full	scripts/checkpatch.pl	/^sub ctx_statement_full {$/;"	s
ctx_statement_level	scripts/checkpatch.pl	/^sub ctx_statement_level {$/;"	s
ctx_str	arch/arm/imx-common/hab.c	/^char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\\n",$/;"	v	typeref:typename:char * []
ctx_table	arch/sparc/cpu/leon2/prom.c	/^	unsigned int ctx_table[256];$/;"	m	struct:__anon686d3e2f0108	typeref:typename:unsigned int[256]	file:
ctx_table	arch/sparc/cpu/leon3/prom.c	/^	unsigned int ctx_table[256];$/;"	m	struct:__anon54af13100108	typeref:typename:unsigned int[256]	file:
ctxsw	arch/arm/include/asm/arch-tegra/dc.h	/^	uint ctxsw;			\/* _CMD_CTXSW_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
cumulative_wait_counter0	arch/powerpc/include/asm/immap_512x.h	/^	u32 cumulative_wait_counter0;$/;"	m	struct:ddr512x	typeref:typename:u32
cumulative_wait_counter1	arch/powerpc/include/asm/immap_512x.h	/^	u32 cumulative_wait_counter1;$/;"	m	struct:ddr512x	typeref:typename:u32
cumulative_wait_counter2	arch/powerpc/include/asm/immap_512x.h	/^	u32 cumulative_wait_counter2;$/;"	m	struct:ddr512x	typeref:typename:u32
cumulative_wait_counter3	arch/powerpc/include/asm/immap_512x.h	/^	u32 cumulative_wait_counter3;$/;"	m	struct:ddr512x	typeref:typename:u32
cumulative_wait_counter4	arch/powerpc/include/asm/immap_512x.h	/^	u32 cumulative_wait_counter4;$/;"	m	struct:ddr512x	typeref:typename:u32
cur	lib/linux_compat.c	/^struct p_current cur = {$/;"	v	typeref:struct:p_current
cur_amba_base	drivers/spi/fsl_qspi.c	/^	u32 cur_amba_base;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
cur_buf	drivers/video/ipu_regs.h	/^	u32 cur_buf[2];$/;"	m	struct:ipu_stat	typeref:typename:u32[2]
cur_busnum	drivers/i2c/i2c-uclass-compat.c	/^static int cur_busnum __attribute__((section(".data")));$/;"	v	typeref:typename:int	file:
cur_capacity0	include/ata.h	/^	unsigned short	cur_capacity0;	\/* logical total sectors on drive *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cur_capacity1	include/ata.h	/^	unsigned short	cur_capacity1;	\/*  (2 words, misaligned int)     *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cur_category	tools/mkimage.c	/^static enum ih_category cur_category;$/;"	v	typeref:enum:ih_category	file:
cur_chip	drivers/mtd/nand/mxs_nand.c	/^	int		cur_chip;$/;"	m	struct:mxs_nand_info	typeref:typename:int	file:
cur_cs	drivers/spi/davinci_spi.c	/^	u8 cur_cs;	   \/* CS of current slave *\/$/;"	m	struct:davinci_spi_slave	typeref:typename:u8	file:
cur_cyls	include/ata.h	/^	unsigned short	cur_cyls;	\/* logical cylinders *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cur_dev	fs/fat/fat.c	/^static struct blk_desc *cur_dev;$/;"	v	typeref:struct:blk_desc *	file:
cur_dev_num	drivers/mmc/mmc_legacy.c	/^static int cur_dev_num = -1;$/;"	v	typeref:typename:int	file:
cur_gpt	arch/arm/imx-common/timer.c	/^static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;$/;"	v	typeref:struct:mxc_gpt *	file:
cur_heads	include/ata.h	/^	unsigned short	cur_heads;	\/* logical heads *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cur_i2c_bus	include/asm-generic/global_data.h	/^	int		cur_i2c_bus;	\/* current used i2c bus *\/$/;"	m	struct:global_data	typeref:typename:int
cur_ipu_alpha_buf	drivers/video/mxc_ipuv3_fb.c	/^	uint32_t cur_ipu_alpha_buf;$/;"	m	struct:mxcfb_info	typeref:typename:uint32_t	file:
cur_ipu_buf	drivers/video/mxc_ipuv3_fb.c	/^	uint32_t cur_ipu_buf;$/;"	m	struct:mxcfb_info	typeref:typename:uint32_t	file:
cur_item	include/ec_commands.h	/^			uint8_t cur_item;$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670708	typeref:typename:uint8_t
cur_map_async	drivers/video/ipu_regs.h	/^	u32 cur_map_async;$/;"	m	struct:ipu_com_async	typeref:typename:u32
cur_map_sync	drivers/video/ipu_regs.h	/^	u32 cur_map_sync;$/;"	m	struct:ipu_dp	typeref:typename:u32
cur_part_info	fs/fat/fat.c	/^static disk_partition_t cur_part_info;$/;"	v	typeref:typename:disk_partition_t	file:
cur_pit	arch/arm/cpu/armv7/vf610/timer.c	/^static struct pit_reg *cur_pit = (struct pit_reg *)PIT_BASE_ADDR;$/;"	v	typeref:struct:pit_reg *	file:
cur_pos_alt	drivers/video/ipu_regs.h	/^	u32 cur_pos_alt;$/;"	m	struct:ipu_dp	typeref:typename:u32
cur_pos_async	drivers/video/ipu_regs.h	/^	u32 cur_pos_async;$/;"	m	struct:ipu_com_async	typeref:typename:u32
cur_pos_sync	drivers/video/ipu_regs.h	/^	u32 cur_pos_sync;$/;"	m	struct:ipu_dp	typeref:typename:u32
cur_rx	drivers/net/ethoc.c	/^	u32 cur_rx;$/;"	m	struct:ethoc	typeref:typename:u32	file:
cur_rx	drivers/net/natsemi.c	/^static unsigned int cur_rx;$/;"	v	typeref:typename:unsigned int	file:
cur_rx	drivers/net/ns8382x.c	/^static unsigned int cur_rx;$/;"	v	typeref:typename:unsigned int	file:
cur_rx	drivers/net/pcnet.c	/^	int cur_rx;$/;"	m	struct:pcnet_priv	typeref:typename:int	file:
cur_rx	drivers/net/rtl8139.c	/^static unsigned int cur_rx,cur_tx;$/;"	v	typeref:typename:unsigned int	file:
cur_rx	drivers/net/rtl8169.c	/^	unsigned long cur_rx;	\/* Index into the Rx descriptor buffer of next Rx pkt. *\/$/;"	m	struct:rtl8169_private	typeref:typename:unsigned long	file:
cur_rx_index	drivers/net/bcm-sf2-eth.h	/^	int cur_rx_index;$/;"	m	struct:eth_dma	typeref:typename:int
cur_rxbd	drivers/net/fm/fm.h	/^	void *cur_rxbd;			\/* current Rx BD *\/$/;"	m	struct:fm_eth	typeref:typename:void *
cur_sectors	include/ata.h	/^	unsigned short	cur_sectors;	\/* logical sectors per track *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cur_seqid	drivers/spi/fsl_qspi.c	/^	u32 cur_seqid;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
cur_serial_dev	include/asm-generic/global_data.h	/^	struct udevice *cur_serial_dev;	\/* current serial device *\/$/;"	m	struct:global_data	typeref:struct:udevice *
cur_speed	drivers/spi/ich.h	/^	ulong cur_speed;	\/* Current bus speed *\/$/;"	m	struct:ich_spi_priv	typeref:typename:ulong
cur_stage	drivers/ddr/altera/sequencer.h	/^	u32 cur_stage;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
cur_tx	drivers/net/ethoc.c	/^	u32 cur_tx;$/;"	m	struct:ethoc	typeref:typename:u32	file:
cur_tx	drivers/net/pcnet.c	/^	int cur_tx;$/;"	m	struct:pcnet_priv	typeref:typename:int	file:
cur_tx	drivers/net/rtl8139.c	/^static unsigned int cur_rx,cur_tx;$/;"	v	typeref:typename:unsigned int	file:
cur_tx	drivers/net/rtl8169.c	/^	unsigned long cur_tx;	\/* Index into the Tx descriptor buffer of next Rx pkt. *\/$/;"	m	struct:rtl8169_private	typeref:typename:unsigned long	file:
cur_tx_index	drivers/net/bcm-sf2-eth.h	/^	int cur_tx_index;$/;"	m	struct:eth_dma	typeref:typename:int
cur_txbd	drivers/net/fm/fm.h	/^	void *cur_txbd;			\/* current Tx BD *\/$/;"	m	struct:fm_eth	typeref:typename:void *
curadd	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t curadd;$/;"	m	struct:mac_queue	typeref:typename:uint32_t
curadr	include/linux/mtd/doc2000.h	/^	unsigned long curadr;$/;"	m	struct:Nand	typeref:typename:unsigned long
curbytes	drivers/block/sata_dwc.h	/^	unsigned int		curbytes;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
curchip	include/linux/mtd/doc2000.h	/^	int curchip;$/;"	m	struct:DiskOnChip	typeref:typename:int
curfloor	include/linux/mtd/doc2000.h	/^	int curfloor;$/;"	m	struct:DiskOnChip	typeref:typename:int
curlen	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^			uint16_t curlen;$/;"	m	union:mac_queue::__anon57780116010a::__anon57780116020a	typeref:typename:uint16_t
curmode	include/linux/mtd/doc2000.h	/^	unsigned char curmode;$/;"	m	struct:Nand	typeref:typename:unsigned char
curptr	arch/sparc/cpu/leon2/start.S	/^#define curptr /;"	d	file:
curptr	arch/sparc/cpu/leon3/start.S	/^#define curptr /;"	d	file:
curr	drivers/video/rockchip/rk_hdmi.c	/^	u32 curr;$/;"	m	struct:hdmi_mpll_config	typeref:typename:u32	file:
curr	scripts/kconfig/expr.h	/^	struct symbol_value curr;$/;"	m	struct:symbol	typeref:struct:symbol_value
currBlockNo	lib/bzip2/bzlib_private.h	/^      Int32    currBlockNo;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
currBufDesc	include/MCD_dma.h	/^	MCD_bufDesc *currBufDesc;$/;"	m	struct:MCD_XferProg_struct	typeref:typename:MCD_bufDesc *
currPtr	include/MCD_dma.h	/^	u32 currPtr;$/;"	m	struct:dmaRegs_s	typeref:typename:u32
curr_addr	arch/blackfin/include/asm/dma.h	/^	void *curr_addr;	\/* DMA Current Address Pointer register *\/$/;"	m	struct:dma_register	typeref:typename:void *
curr_blkno	include/ext4fs.h	/^	long int curr_blkno;$/;"	m	struct:ext_filesystem	typeref:typename:long int
curr_bw_limit	arch/blackfin/include/asm/dma.h	/^	u32 curr_bw_limit;	\/* DMA curr Bandwidth Limit Count *\/$/;"	m	struct:dma_register	typeref:typename:u32
curr_bw_monitor	arch/blackfin/include/asm/dma.h	/^	u32 curr_bw_monitor;	\/* DMA curr Bandwidth Monitor Count *\/$/;"	m	struct:dma_register	typeref:typename:u32
curr_clk	drivers/mmc/gen_atmel_mci.c	/^	unsigned int		curr_clk;$/;"	m	struct:atmel_mci_priv	typeref:typename:unsigned int	file:
curr_cmd	drivers/mtd/nand/arasan_nfc.c	/^static struct arasan_nand_command_format *curr_cmd;$/;"	v	typeref:struct:arasan_nand_command_format *	file:
curr_col	include/lcd_console.h	/^	short curr_col, curr_row;$/;"	m	struct:console_t	typeref:typename:short
curr_desc_ptr	arch/blackfin/include/asm/dma.h	/^	void *curr_desc_ptr;	\/* DMA Curr Descriptor Pointer register *\/$/;"	m	struct:dma_register	typeref:typename:void *
curr_dev_and_platdata	cmd/regulator.c	/^static int curr_dev_and_platdata(struct udevice **devp,$/;"	f	typeref:typename:int	file:
curr_device	cmd/ide.c	/^static int curr_device = -1;$/;"	v	typeref:typename:int	file:
curr_device	cmd/mmc.c	/^static int curr_device = -1;$/;"	v	typeref:typename:int	file:
curr_eth_dev	drivers/usb/eth/asix.c	/^static int curr_eth_dev; \/* index for name of next device detected *\/$/;"	v	typeref:typename:int	file:
curr_eth_dev	drivers/usb/eth/asix88179.c	/^static int curr_eth_dev; \/* index for name of next device detected *\/$/;"	v	typeref:typename:int	file:
curr_eth_dev	drivers/usb/eth/r8152.c	/^static int curr_eth_dev; \/* index for name of next device detected *\/$/;"	v	typeref:typename:int	file:
curr_eth_dev	drivers/usb/eth/smsc95xx.c	/^static int curr_eth_dev; \/* index for name of next device detected *\/$/;"	v	typeref:typename:int	file:
curr_inode_no	include/ext4fs.h	/^	int curr_inode_no;$/;"	m	struct:ext_filesystem	typeref:typename:int
curr_read_lat	drivers/ddr/altera/sequencer.h	/^	uint32_t curr_read_lat;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
curr_row	include/lcd_console.h	/^	short curr_col, curr_row;$/;"	m	struct:console_t	typeref:typename:short
curr_urb	drivers/usb/host/ohci-hcd.c	/^	int curr_urb;$/;"	m	struct:int_queue	typeref:typename:int	file:
curr_val	arch/arm/mach-socfpga/include/mach/timer.h	/^	u32	curr_val;$/;"	m	struct:socfpga_timer	typeref:typename:u32
curr_x_count	arch/blackfin/include/asm/dma.h	/^	u32 curr_x_count;	\/* DMA Current x-count register *\/$/;"	m	struct:dma_register	typeref:typename:u32
curr_y_count	arch/blackfin/include/asm/dma.h	/^	u32 curr_y_count;	\/* DMA Current y-count register *\/$/;"	m	struct:dma_register	typeref:typename:u32
currdev	cmd/pmic.c	/^static struct udevice *currdev;$/;"	v	typeref:struct:udevice *	file:
currdev	cmd/regulator.c	/^static struct udevice *currdev;$/;"	v	typeref:struct:udevice *	file:
current	drivers/net/ep93xx_eth.h	/^	struct rx_descriptor *current;$/;"	m	struct:rx_descriptor_queue	typeref:struct:rx_descriptor *
current	drivers/net/ep93xx_eth.h	/^	struct tx_descriptor *current;$/;"	m	struct:tx_descriptor_queue	typeref:struct:tx_descriptor *
current	drivers/net/ep93xx_eth.h	/^	volatile struct rx_status *current;$/;"	m	struct:rx_status_queue	typeref:typename:volatile struct rx_status *
current	drivers/net/ep93xx_eth.h	/^	volatile struct tx_status *current;$/;"	m	struct:tx_status_queue	typeref:typename:volatile struct tx_status *
current	drivers/net/xilinx_axi_emac.c	/^	u32 current; \/* CURDESC *\/$/;"	m	struct:axidma_reg	typeref:typename:u32	file:
current	drivers/usb/gadget/ci_udc.h	/^	unsigned current;	\/* read-only *\/$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
current	drivers/usb/host/ehci-hcd.c	/^	struct QH *current;$/;"	m	struct:int_queue	typeref:struct:QH *	file:
current	lib/linux_compat.c	/^__maybe_unused struct p_current *current = &cur;$/;"	v	typeref:struct:p_current *
current	net/eth-uclass.c	/^	struct udevice *current;$/;"	m	struct:eth_uclass_priv	typeref:struct:udevice *	file:
current	scripts/kconfig/gconf.c	/^static struct menu *current; \/\/ current node for SINGLE view$/;"	v	typeref:struct:menu *	file:
current	test/dm/regulator.c	/^	int current;$/;"	m	struct:setting	typeref:typename:int	file:
current0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t current0;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
current1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t current1;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
currentPointer	include/mpc5xxx.h	/^	volatile u32 currentPointer;	\/* SDMA + 0x04 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
current_address	include/efi_api.h	/^	struct efi_mac_address current_address;$/;"	m	struct:efi_simple_network_mode	typeref:struct:efi_mac_address
current_bp	include/bedbug/type.h	/^	int current_bp;$/;"	m	struct:__anon3619a6480108	typeref:typename:int
current_buf	scripts/kconfig/zconf.lex.c	/^struct buffer *current_buf;$/;"	v	typeref:struct:buffer *
current_bus	drivers/i2c/mv_i2c.c	/^static unsigned int current_bus;$/;"	v	typeref:typename:unsigned int	file:
current_bus	drivers/i2c/sh_sh7734_i2c.c	/^static unsigned int current_bus;$/;"	v	typeref:typename:unsigned int	file:
current_busno	include/pci.h	/^	int current_busno;$/;"	m	struct:pci_controller	typeref:typename:int
current_cpu_data	arch/avr32/include/asm/processor.h	/^#define current_cpu_data /;"	d
current_el	arch/arm/include/asm/system.h	/^static inline unsigned int current_el(void)$/;"	f	typeref:typename:unsigned int
current_entry	scripts/kconfig/zconf.tab.c	/^static struct menu *current_menu, *current_entry;$/;"	v	typeref:struct:menu *	file:
current_epnum	drivers/usb/musb-new/musb_gadget.h	/^	u8				current_epnum;$/;"	m	struct:musb_ep	typeref:typename:u8
current_file	scripts/kconfig/menu.c	/^struct file *current_file;$/;"	v	typeref:struct:file *
current_filesystem	fs/fat/file.c	/^static int current_filesystem = FSTYPE_NONE;$/;"	v	typeref:typename:int	file:
current_fs_time	fs/ubifs/ubifs.h	/^static struct timespec current_fs_time(struct super_block *sb)$/;"	f	typeref:struct:timespec
current_ih	fs/reiserfs/reiserfs_private.h	/^  struct item_head *current_ih;$/;"	m	struct:fsys_reiser_info	typeref:struct:item_head *
current_image	drivers/misc/cros_ec_sandbox.c	/^	enum ec_current_image current_image;$/;"	m	struct:ec_state	typeref:enum:ec_current_image	file:
current_image	include/ec_commands.h	/^	uint32_t current_image;  \/* One of ec_current_image *\/$/;"	m	struct:ec_response_get_version	typeref:typename:uint32_t
current_instructions	scripts/kconfig/nconf.c	/^const char *current_instructions = menu_instructions;$/;"	v	typeref:typename:const char *
current_item	fs/reiserfs/reiserfs_private.h	/^  char *current_item;$/;"	m	struct:fsys_reiser_info	typeref:typename:char *
current_mallinfo	common/dlmalloc.c	/^static struct mallinfo current_mallinfo = {  0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };$/;"	v	typeref:struct:mallinfo	file:
current_menu	scripts/kconfig/mconf.c	/^static struct menu *current_menu;$/;"	v	typeref:struct:menu *	file:
current_menu	scripts/kconfig/nconf.c	/^static struct menu *current_menu;$/;"	v	typeref:struct:menu *	file:
current_menu	scripts/kconfig/zconf.tab.c	/^static struct menu *current_menu, *current_entry;$/;"	v	typeref:struct:menu *	file:
current_mii	common/miiphyutil.c	/^static struct mii_dev *current_mii;$/;"	v	typeref:struct:mii_dev *	file:
current_mtd_dev	cmd/jffs2.c	/^struct mtd_device *current_mtd_dev = NULL;$/;"	v	typeref:struct:mtd_device *
current_mtd_dev	cmd/mtdparts.c	/^struct mtd_device *current_mtd_dev = NULL;$/;"	v	typeref:struct:mtd_device *
current_mtd_partnum	cmd/jffs2.c	/^u8 current_mtd_partnum = 0;$/;"	v	typeref:typename:u8
current_mtd_partnum	cmd/mtdparts.c	/^u8 current_mtd_partnum = 0;$/;"	v	typeref:typename:u8
current_part	fs/jffs2/jffs2_1pass.c	/^static struct part_info *current_part;$/;"	v	typeref:struct:part_info *	file:
current_pmevent	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 current_pmevent:4;$/;"	m	struct:me_hfs2	typeref:typename:u32:4
current_pmevent	arch/x86/include/asm/me_common.h	/^	u32 current_pmevent:4;$/;"	m	struct:me_gmes	typeref:typename:u32:4
current_pos	scripts/kconfig/zconf.lex.c	/^} current_pos;$/;"	v	typeref:struct:__anonb93376940108
current_save	cmd/mtdparts.c	/^static void current_save(void)$/;"	f	typeref:typename:void	file:
current_speed	include/smbios.h	/^	u16 current_speed;$/;"	m	struct:smbios_type4	typeref:typename:u16
current_state	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 current_state:8;$/;"	m	struct:me_hfs2	typeref:typename:u32:8
current_state	arch/x86/include/asm/me_common.h	/^	u32 current_state:8;$/;"	m	struct:me_gmes	typeref:typename:u32:8
current_state	drivers/remoteproc/sandbox_testproc.c	/^	enum sandbox_state current_state;$/;"	m	struct:sandbox_test_devdata	typeref:enum:sandbox_state	file:
current_system	include/ec_commands.h	/^	uint16_t current_system;$/;"	m	struct:ec_response_power_info	typeref:typename:uint16_t
current_temp	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 current_temp;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
current_text_addr	arch/arm/include/asm/processor.h	/^#define current_text_addr(/;"	d
current_text_addr	arch/avr32/include/asm/processor.h	/^#define current_text_addr(/;"	d
current_text_addr	arch/mips/include/asm/processor.h	/^#define current_text_addr(/;"	d
current_text_addr	arch/powerpc/include/asm/processor.h	/^#define current_text_addr(/;"	d
current_tid	examples/standalone/sched.c	/^static volatile int current_tid = MASTER_THREAD;$/;"	v	typeref:typename:volatile int	file:
current_trb	drivers/usb/dwc3/core.h	/^	unsigned		current_trb;$/;"	m	struct:dwc3_ep	typeref:typename:unsigned
current_uberblock	fs/zfs/zfs.c	/^	uberblock_t current_uberblock;$/;"	m	struct:zfs_data	typeref:typename:uberblock_t	file:
current_valid_window	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u16 current_valid_window[MAX_BUS_NUM][MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u16[][]
current_vref	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u8 current_vref[MAX_BUS_NUM][MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u8[][]
currhostrxbuffaddr	drivers/net/designware.h	/^	u32 currhostrxbuffaddr;	\/* 0x54 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
currhostrxdesc	drivers/net/designware.h	/^	u32 currhostrxdesc;	\/* 0x4c *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
currhosttxbuffaddr	drivers/net/designware.h	/^	u32 currhosttxbuffaddr;	\/* 0x50 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
currhosttxdesc	drivers/net/designware.h	/^	u32 currhosttxdesc;	\/* 0x48 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
currticks	drivers/net/rtl8169.c	/^#define currticks(/;"	d	file:
curs_pos	drivers/video/fsl_diu_fb.c	/^	__be32 curs_pos;$/;"	m	struct:diu	typeref:typename:__be32	file:
curses_item_index	scripts/kconfig/nconf.c	/^static int curses_item_index(void)$/;"	f	typeref:typename:int	file:
curses_menu	scripts/kconfig/nconf.c	/^static MENU *curses_menu;$/;"	v	typeref:typename:MENU *	file:
curses_menu_items	scripts/kconfig/nconf.c	/^static ITEM *curses_menu_items[MAX_MENU_ITEMS];$/;"	v	typeref:typename:ITEM * []	file:
cursor	drivers/video/fsl_diu_fb.c	/^	__be32 cursor;$/;"	m	struct:diu	typeref:typename:__be32	file:
cursor_background	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cursor_background;		\/* _DISP_CURSOR_BACKGROUND_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
cursor_column	include/efi_api.h	/^	s32 cursor_column;$/;"	m	struct:simple_text_output_mode	typeref:typename:s32
cursor_foreground	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cursor_foreground;		\/* _DISP_CURSOR_FOREGROUND_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
cursor_pos	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cursor_pos;		\/* _DISP_CURSOR_POSITION_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
cursor_pos_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cursor_pos_ns;		\/* _DISP_CURSOR_POSITION_NS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
cursor_row	include/efi_api.h	/^	s32 cursor_row;$/;"	m	struct:simple_text_output_mode	typeref:typename:s32
cursor_start_addr	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cursor_start_addr;		\/* _DISP_CURSOR_START_ADDR_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
cursor_start_addr_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint cursor_start_addr_ns;	\/* _DISP_CURSOR_START_ADDR_NS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
cursor_state	drivers/video/cfb_console.c	/^static int __maybe_unused cursor_state;$/;"	v	typeref:typename:int __maybe_unused	file:
cursor_visible	include/efi_api.h	/^	bool cursor_visible;$/;"	m	struct:simple_text_output_mode	typeref:typename:bool
cust	include/ddr_spd.h	/^	unsigned char cust[80];        \/* 176-255 Open for Customer Use *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[80]
cust_emi_para	board/spear/common/spr_misc.c	/^struct cust_emi_para {$/;"	s	file:
custefuse_sys_gfclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	custefuse_sys_gfclk_div: custefuse_sys_gfclk_div {$/;"	l
custefuseclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int custefuseclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
custom	include/ambapp.h	/^	const unsigned int	custom[3];$/;"	m	struct:ambapp_pnp_ahb	typeref:typename:const unsigned int[3]
customer	include/configs/tam3517-common.h	/^	char customer[48];$/;"	m	struct:tam3517_module_info	typeref:typename:char[48]
cv	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		cv;	\/* 0x10 Counter Value *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
cval0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cval0;$/;"	m	struct:pit_reg	typeref:typename:u32
cval0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval0;$/;"	m	struct:pit_reg	typeref:typename:u32
cval1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cval1;$/;"	m	struct:pit_reg	typeref:typename:u32
cval1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval1;$/;"	m	struct:pit_reg	typeref:typename:u32
cval2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cval2;$/;"	m	struct:pit_reg	typeref:typename:u32
cval2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval2;$/;"	m	struct:pit_reg	typeref:typename:u32
cval3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cval3;$/;"	m	struct:pit_reg	typeref:typename:u32
cval3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval3;$/;"	m	struct:pit_reg	typeref:typename:u32
cval4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cval4;$/;"	m	struct:pit_reg	typeref:typename:u32
cval4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval4;$/;"	m	struct:pit_reg	typeref:typename:u32
cval5	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 cval5;$/;"	m	struct:pit_reg	typeref:typename:u32
cval5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval5;$/;"	m	struct:pit_reg	typeref:typename:u32
cval6	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval6;$/;"	m	struct:pit_reg	typeref:typename:u32
cval7	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 cval7;$/;"	m	struct:pit_reg	typeref:typename:u32
cvtspeed	tools/gdb/serial.c	/^cvtspeed(char *str)$/;"	f	typeref:typename:speed_t
cvwr	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 cvwr;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
cwaitsrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	cwaitsrl;	\/* Core Wait Status *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
cwcr	arch/m68k/include/asm/immap_520x.h	/^	u16 cwcr;		\/* 0x16 *\/$/;"	m	struct:scm2	typeref:typename:u16
cwcr	arch/m68k/include/asm/immap_5227x.h	/^	u16 cwcr;		\/* 0x06 Core Watchdog Control *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u16
cwcr	arch/m68k/include/asm/immap_5235.h	/^	u8 cwcr;		\/* 0x11 Core Watchdog Control Register *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
cwcr	arch/m68k/include/asm/immap_5275.h	/^	u8 cwcr;$/;"	m	struct:sys_ctrl	typeref:typename:u8
cwcr	arch/m68k/include/asm/immap_5282.h	/^	u8 cwcr;$/;"	m	struct:scm_ctrl	typeref:typename:u8
cwcr	arch/m68k/include/asm/immap_5301x.h	/^	u16 cwcr;		\/* 0x16 *\/$/;"	m	struct:scm2	typeref:typename:u16
cwcr	arch/m68k/include/asm/immap_5329.h	/^	u16 cwcr;		\/* 0x16 Core Watchdog Control Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u16
cwcr	arch/m68k/include/asm/immap_5441x.h	/^	u16 cwcr;		\/* 0x16 *\/$/;"	m	struct:scm	typeref:typename:u16
cwcr	arch/m68k/include/asm/immap_5445x.h	/^	u16 cwcr;		\/* 0x16 *\/$/;"	m	struct:scm2	typeref:typename:u16
cwd	common/cli_hush.c	/^static const char *cwd;$/;"	v	typeref:typename:const char *	file:
cwdr	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 cwdr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
cwdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	cwdr;$/;"	m	struct:clkctl	typeref:typename:u32
cwgr	drivers/i2c/at91_i2c.h	/^	u32 cwgr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
cwgr_val	drivers/i2c/at91_i2c.h	/^	u32 cwgr_val;$/;"	m	struct:at91_i2c_bus	typeref:typename:u32
cwhb	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 cwhb;		\/* 0x10 Cursor Width Height and Blink Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
cwl	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 cwl;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
cwl	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 cwl;$/;"	m	struct:dram_info	typeref:typename:u32
cwl_mask_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u8 cwl_mask_table[] = {$/;"	v	typeref:typename:u8[]
cwsr	arch/m68k/include/asm/immap_520x.h	/^	u8 cwsr;		\/* 0x1B *\/$/;"	m	struct:scm2	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5227x.h	/^	u8 cwsr;		\/* 0x0B Core Watchdog Service *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5235.h	/^	u8 cwsr;		\/* 0x13 Core Watchdog Service Register *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5275.h	/^	u8 cwsr;$/;"	m	struct:sys_ctrl	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5282.h	/^	u8 cwsr;$/;"	m	struct:scm_ctrl	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5301x.h	/^	u8 cwsr;		\/* 0x1B *\/$/;"	m	struct:scm2	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5329.h	/^	u8 cwsr;		\/* 0x1B Core Watchdog Service Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5441x.h	/^	u8 cwsr;		\/* 0x1B *\/$/;"	m	struct:scm	typeref:typename:u8
cwsr	arch/m68k/include/asm/immap_5445x.h	/^	u8 cwsr;		\/* 0x1B *\/$/;"	m	struct:scm2	typeref:typename:u8
cx	drivers/bios_emulator/include/biosemu.h	/^	u16 cx, cx_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
cx	drivers/bios_emulator/include/biosemu.h	/^	u16 cx_hi, cx;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
cx	drivers/video/stb_truetype.h	/^      stbtt_vertex_type x,y,cx,cy;$/;"	m	struct:__anonce392f790608	typeref:typename:stbtt_vertex_type
cx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 cx, cx_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
cx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 cx_hi, cx;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
cx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 cx_hi;$/;"	m	struct:__anon964d10140508	typeref:typename:u16
cx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 cx_hi;$/;"	m	struct:__anon964d10140608	typeref:typename:u16
cxfifo	include/usb/fotg210.h	/^	uint32_t cxfifo;\/* 0x120: CX FIFO Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
cy	drivers/video/stb_truetype.h	/^      stbtt_vertex_type x,y,cx,cy;$/;"	m	struct:__anonce392f790608	typeref:typename:stbtt_vertex_type
cyc	drivers/i2c/i2c-uniphier-f.c	/^	u32 cyc;			\/* clock cycle control *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
cycle	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^	u32	cycle;		\/* 0x08 SMC Cycle Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
cycle	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	u32	cycle;		\/* 0x608 SMC Cycle Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
cycle_counter	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 cycle_counter;		\/* Cycle counter *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
cycle_counter	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 cycle_counter;		\/* Cycle counter *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
cycle_state	drivers/usb/host/xhci.h	/^	volatile u32		cycle_state;$/;"	m	struct:xhci_ring	typeref:typename:volatile u32
cyg_int32	common/xyzModem.c	/^typedef int cyg_int32;$/;"	t	typeref:typename:int	file:
cyl	disk/part_dos.h	/^	unsigned char cyl;		\/* starting cylinder			*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
cyl	include/part_efi.h	/^	u8 cyl;			\/* starting cylinder *\/$/;"	m	struct:partition	typeref:typename:u8
cyl_blocks	disk/part_amiga.h	/^    u32 cyl_blocks;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
cylinders	disk/part_amiga.h	/^    u32 cylinders;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
cylinders	drivers/block/sata_dwc.h	/^	u16			cylinders;$/;"	m	struct:ata_device	typeref:typename:u16
cyls	include/ata.h	/^	unsigned short	cyls;		\/* "physical" cyls *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
cyrus_phy_tuning	board/varisys/cyrus/eth.c	/^static void cyrus_phy_tuning(int phy)$/;"	f	typeref:typename:void	file:
d	arch/x86/lib/physmem.c	/^	uint64_t d:1;      \/* dirty *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
d	drivers/tpm/tpm_tis.h	/^	__be32 d;$/;"	m	struct:timeout_t	typeref:typename:__be32
d	fs/jffs2/summary.h	/^	struct jffs2_sum_dirent_flash d;$/;"	m	union:jffs2_sum_flash	typeref:struct:jffs2_sum_dirent_flash
d	fs/jffs2/summary.h	/^	struct jffs2_sum_dirent_mem d;$/;"	m	union:jffs2_sum_mem	typeref:struct:jffs2_sum_dirent_mem
d	include/jffs2/jffs2.h	/^	struct jffs2_raw_dirent d;$/;"	m	union:jffs2_node_union	typeref:struct:jffs2_raw_dirent
d0	arch/m68k/include/asm/ptrace.h	/^	ulong d0;$/;"	m	struct:pt_regs	typeref:typename:ulong
d02ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d02ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d02ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d02ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d03ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d03ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d03ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d03ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d0hi	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG d0hi;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
d0lo	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG d0lo;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
d1	arch/m68k/include/asm/ptrace.h	/^	ulong d1;$/;"	m	struct:pt_regs	typeref:typename:ulong
d1hi	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG d1hi;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
d1lo	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG d1lo;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
d2	arch/m68k/include/asm/ptrace.h	/^	ulong d2;$/;"	m	struct:pt_regs	typeref:typename:ulong
d20d21_ir	arch/x86/include/asm/arch-quark/quark.h	/^	u16	d20d21_ir;$/;"	m	struct:quark_rcba	typeref:typename:u16
d23_ir	arch/x86/include/asm/arch-quark/quark.h	/^	u16	d23_ir;$/;"	m	struct:quark_rcba	typeref:typename:u16
d23ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d23ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d23ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d23ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d24ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d24ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d24ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d24ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d25ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d25ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d25ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d25ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d26ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d26ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d26ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d26ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d27ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d27ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d27ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d27ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d3	arch/m68k/include/asm/ptrace.h	/^	ulong d3;$/;"	m	struct:pt_regs	typeref:typename:ulong
d31ip	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	d31ip;$/;"	m	struct:tnc_rcba	typeref:typename:u32
d31ir	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	d31ir;$/;"	m	struct:tnc_rcba	typeref:typename:u16
d4	arch/m68k/include/asm/ptrace.h	/^	ulong d4;$/;"	m	struct:pt_regs	typeref:typename:ulong
d5	arch/m68k/include/asm/ptrace.h	/^	ulong d5;$/;"	m	struct:pt_regs	typeref:typename:ulong
d6	arch/m68k/include/asm/ptrace.h	/^	ulong d6;$/;"	m	struct:pt_regs	typeref:typename:ulong
d7	arch/m68k/include/asm/ptrace.h	/^	ulong d7;$/;"	m	struct:pt_regs	typeref:typename:ulong
dArgument	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dArgument;$/;"	m	struct:ADI_BOOT_HEADER	typeref:typename:int32_t
dBlockCode	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dBlockCode;$/;"	m	struct:ADI_BOOT_HEADER	typeref:typename:int32_t
dBlockCount	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dBlockCount;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dByteCount	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dByteCount;$/;"	m	struct:ADI_BOOT_BUFFER	typeref:typename:int32_t
dByteCount	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dByteCount;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dByteCount	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dByteCount;$/;"	m	struct:ADI_BOOT_HEADER	typeref:typename:int32_t
dCBWDataTransferLength	include/usb_defs.h	/^	__u32		dCBWDataTransferLength;$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u32
dCBWSignature	include/usb_defs.h	/^	__u32		dCBWSignature;$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u32
dCBWTag	include/usb_defs.h	/^	__u32		dCBWTag;$/;"	m	struct:umass_bbb_cbw	typeref:typename:__u32
dCSWDataResidue	include/usb_defs.h	/^	__u32		dCSWDataResidue;$/;"	m	struct:umass_bbb_csw	typeref:typename:__u32
dCSWSignature	include/usb_defs.h	/^	__u32		dCSWSignature;$/;"	m	struct:umass_bbb_csw	typeref:typename:__u32
dCSWTag	include/usb_defs.h	/^	__u32		dCSWTag;$/;"	m	struct:umass_bbb_csw	typeref:typename:__u32
dClock	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dClock;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dControlValue	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dControlValue;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dFlags	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dFlags;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dLogByteCount	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dLogByteCount;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dReserved2	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dReserved2;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dTempByteCount	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dTempByteCount;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
dUserLong	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int32_t dUserLong;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int32_t
d_alepena	include/linux/usb/dwc3.h	/^	u32 d_alepena;$/;"	m	struct:dwc3	typeref:typename:u32
d_alias	fs/ubifs/ubifs.h	/^	struct list_head d_alias;	\/* inode alias list *\/$/;"	m	struct:dentry	typeref:struct:list_head
d_buf	lib/zlib/deflate.h	/^    ushf *d_buf;$/;"	m	struct:internal_state	typeref:typename:ushf *
d_cfg	include/linux/usb/dwc3.h	/^	u32 d_cfg;$/;"	m	struct:dwc3	typeref:typename:u32
d_clk	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 d_clk;$/;"	m	struct:sar_freq_modes	typeref:typename:u32
d_code	lib/zlib/deflate.h	/^#define d_code(/;"	d
d_conf	board/keymile/common/common.h	/^	u8	d_conf;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
d_cookie	fs/ubifs/ubifs.h	/^	struct dcookie_struct *d_cookie; \/* cookie, if any *\/$/;"	m	struct:dentry	typeref:struct:dcookie_struct *
d_ctl	include/linux/usb/dwc3.h	/^	u32 d_ctl;$/;"	m	struct:dwc3	typeref:typename:u32
d_depcmd	include/linux/usb/dwc3.h	/^	u32 d_depcmd;$/;"	m	struct:d_physical_endpoint	typeref:typename:u32
d_depcmdpar0	include/linux/usb/dwc3.h	/^	u32 d_depcmdpar0;$/;"	m	struct:d_physical_endpoint	typeref:typename:u32
d_depcmdpar1	include/linux/usb/dwc3.h	/^	u32 d_depcmdpar1;$/;"	m	struct:d_physical_endpoint	typeref:typename:u32
d_depcmdpar2	include/linux/usb/dwc3.h	/^	u32 d_depcmdpar2;$/;"	m	struct:d_physical_endpoint	typeref:typename:u32
d_desc	lib/zlib/deflate.h	/^    struct tree_desc_s d_desc;               \/* desc. for distance tree *\/$/;"	m	struct:internal_state	typeref:struct:tree_desc_s
d_dont_use	fs/yaffs2/yaffsfs.h	/^	unsigned d_dont_use;		\/* debug: not for public consumption *\/$/;"	m	struct:yaffs_dirent	typeref:typename:unsigned
d_evten	include/linux/usb/dwc3.h	/^	u32 d_evten;$/;"	m	struct:dwc3	typeref:typename:u32
d_flags	fs/ubifs/ubifs.h	/^	unsigned int d_flags;		\/* protected by d_lock *\/$/;"	m	struct:dentry	typeref:typename:unsigned int
d_fsdata	fs/ubifs/ubifs.h	/^	void *d_fsdata;			\/* fs-specific data *\/$/;"	m	struct:dentry	typeref:typename:void *
d_gcmd	include/linux/usb/dwc3.h	/^	u32 d_gcmd;$/;"	m	struct:dwc3	typeref:typename:u32
d_gcmdpar	include/linux/usb/dwc3.h	/^	u32 d_gcmdpar;$/;"	m	struct:dwc3	typeref:typename:u32
d_hash	fs/ubifs/ubifs.h	/^	struct hlist_node d_hash;	\/* lookup hash list *\/$/;"	m	struct:dentry	typeref:struct:hlist_node
d_id	include/faraday/ftpci100.h	/^	unsigned short d_id;				\/* device id *\/$/;"	m	struct:pci_config	typeref:typename:unsigned short
d_iname	fs/ubifs/ubifs.h	/^	unsigned char d_iname[DNAME_INLINE_LEN_MIN];	\/* small names *\/$/;"	m	struct:dentry	typeref:typename:unsigned char[]
d_ino	fs/yaffs2/yaffsfs.h	/^	long d_ino;			\/* inode number *\/$/;"	m	struct:yaffs_dirent	typeref:typename:long
d_inode	fs/ubifs/ubifs.h	/^	struct inode *d_inode;		\/* Where the name belongs to - NULL is$/;"	m	struct:dentry	typeref:struct:inode *
d_llue	include/universe.h	/^	unsigned int d_llue;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
d_lock	fs/ubifs/ubifs.h	/^	spinlock_t d_lock;		\/* per dentry lock *\/$/;"	m	struct:dentry	typeref:typename:spinlock_t
d_lru	fs/ubifs/ubifs.h	/^	struct list_head d_lru;		\/* LRU list *\/$/;"	m	struct:dentry	typeref:struct:list_head
d_mask_ca	board/keymile/common/common.h	/^	u8	d_mask_ca;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
d_mounted	fs/ubifs/ubifs.h	/^	int d_mounted;$/;"	m	struct:dentry	typeref:typename:int
d_name	fs/ubifs/ubifs.h	/^	struct qstr d_name;$/;"	m	struct:dentry	typeref:struct:qstr
d_name	fs/yaffs2/yaffsfs.h	/^	YCHAR d_name[NAME_MAX+1];	\/* file name (null-terminated) *\/$/;"	m	struct:yaffs_dirent	typeref:typename:YCHAR[]
d_off	fs/yaffs2/yaffsfs.h	/^	off_t d_off;			\/* offset to this dirent *\/$/;"	m	struct:yaffs_dirent	typeref:typename:off_t
d_parent	fs/ubifs/ubifs.h	/^	struct dentry *d_parent;	\/* parent directory *\/$/;"	m	struct:dentry	typeref:struct:dentry *
d_phy_ep_cmd	include/linux/usb/dwc3.h	/^	struct d_physical_endpoint d_phy_ep_cmd[32];$/;"	m	struct:dwc3	typeref:struct:d_physical_endpoint[32]
d_physical_endpoint	include/linux/usb/dwc3.h	/^struct d_physical_endpoint {$/;"	s
d_pll_del	board/keymile/common/common.h	/^	u8	d_pll_del;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
d_ptr	include/elf.h	/^		Elf32_Addr	d_ptr;	\/* program virtual address *\/$/;"	m	union:__anona52b83e50708::__anona52b83e5080a	typeref:typename:Elf32_Addr
d_ptr	include/elf.h	/^		Elf64_Addr d_ptr;$/;"	m	union:__anona52b83e50908::__anona52b83e50a0a	typeref:typename:Elf64_Addr
d_reclen	fs/yaffs2/yaffsfs.h	/^	unsigned short d_reclen;	\/* length of this dirent *\/$/;"	m	struct:yaffs_dirent	typeref:typename:unsigned short
d_sb	fs/ubifs/ubifs.h	/^	struct super_block *d_sb;	\/* The root of the dentry tree *\/$/;"	m	struct:dentry	typeref:struct:super_block *
d_size	fs/ubifs/recovery.c	/^	loff_t d_size;$/;"	m	struct:size_entry	typeref:typename:loff_t	file:
d_sts	include/linux/usb/dwc3.h	/^	u32 d_sts;$/;"	m	struct:dwc3	typeref:typename:u32
d_subdirs	fs/ubifs/ubifs.h	/^	struct list_head d_subdirs;	\/* our children *\/$/;"	m	struct:dentry	typeref:struct:list_head
d_tag	include/elf.h	/^	Elf32_Sword	d_tag;		\/* controls meaning of d_val *\/$/;"	m	struct:__anona52b83e50708	typeref:typename:Elf32_Sword
d_tag	include/elf.h	/^	Elf64_Sxword d_tag;		\/* entry tag value *\/$/;"	m	struct:__anona52b83e50908	typeref:typename:Elf64_Sxword
d_time	fs/ubifs/ubifs.h	/^	unsigned long d_time;		\/* used by d_revalidate *\/$/;"	m	struct:dentry	typeref:typename:unsigned long
d_type	fs/yaffs2/yaffsfs.h	/^	YUCHAR d_type;			\/* type of this record *\/$/;"	m	struct:yaffs_dirent	typeref:typename:YUCHAR
d_un	include/elf.h	/^	} d_un;$/;"	m	struct:__anona52b83e50708	typeref:union:__anona52b83e50708::__anona52b83e5080a
d_un	include/elf.h	/^	} d_un;$/;"	m	struct:__anona52b83e50908	typeref:union:__anona52b83e50908::__anona52b83e50a0a
d_val	include/elf.h	/^		Elf32_Word	d_val;	\/* Multiple meanings - see d_tag *\/$/;"	m	union:__anona52b83e50708::__anona52b83e5080a	typeref:typename:Elf32_Word
d_val	include/elf.h	/^		Elf64_Xword d_val;$/;"	m	union:__anona52b83e50908::__anona52b83e50a0a	typeref:typename:Elf64_Xword
da850_ddr_setup	arch/arm/mach-davinci/da850_lowlevel.c	/^static int da850_ddr_setup(void)$/;"	f	typeref:typename:int	file:
da850_pll_init	arch/arm/mach-davinci/da850_lowlevel.c	/^static int da850_pll_init(struct davinci_pllc_regs *reg, unsigned long pllmult)$/;"	f	typeref:typename:int	file:
da850_waitloop	arch/arm/mach-davinci/da850_lowlevel.c	/^static void da850_waitloop(unsigned long loopcnt)$/;"	f	typeref:typename:void	file:
da8xx_configure_lpsc_items	arch/arm/mach-davinci/misc.c	/^int da8xx_configure_lpsc_items(const struct lpsc_resource *item,$/;"	f	typeref:typename:int
da8xx_fb_fix	drivers/video/da8xx-fb.c	/^static struct fb_fix_screeninfo da8xx_fb_fix = {$/;"	v	typeref:struct:fb_fix_screeninfo	file:
da8xx_fb_info	drivers/video/da8xx-fb.c	/^static struct fb_info *da8xx_fb_info;$/;"	v	typeref:struct:fb_info *	file:
da8xx_fb_par	drivers/video/da8xx-fb.c	/^struct da8xx_fb_par {$/;"	s	file:
da8xx_fb_reg_base	drivers/video/da8xx-fb.c	/^static struct da8xx_lcd_regs *da8xx_fb_reg_base;$/;"	v	typeref:struct:da8xx_lcd_regs *	file:
da8xx_fb_var	drivers/video/da8xx-fb.c	/^static struct fb_var_screeninfo da8xx_fb_var = {$/;"	v	typeref:struct:fb_var_screeninfo	file:
da8xx_lcd_cfg	drivers/video/da8xx-fb.c	/^const struct lcd_ctrl_config *da8xx_lcd_cfg;$/;"	v	typeref:typename:const struct lcd_ctrl_config *
da8xx_lcd_regs	drivers/video/da8xx-fb.c	/^struct da8xx_lcd_regs {$/;"	s	file:
da8xx_lcdc_platform_data	drivers/video/da8xx-fb.h	/^struct da8xx_lcdc_platform_data {$/;"	s
da8xx_panel	drivers/video/da8xx-fb.h	/^struct da8xx_panel {$/;"	s
da8xx_usb_regs	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^#define da8xx_usb_regs /;"	d
da8xx_usb_regs	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^struct da8xx_usb_regs {$/;"	s
da8xx_video_init	drivers/video/da8xx-fb.c	/^void da8xx_video_init(const struct da8xx_panel *panel,$/;"	f	typeref:typename:void
daa_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 daa_byte(u8 d)$/;"	f	typeref:typename:u8
dac2_cntl	drivers/video/ati_radeon_fb.h	/^	u32		dac2_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
dac_b__dac_c	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 dac_b__dac_c;			\/* 0xC8 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
dac_cfg0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 dac_cfg0;			\/* 0x008 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
dac_cfg0	arch/arm/include/asm/arch/display.h	/^	u32 dac_cfg0;			\/* 0x008 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
dac_cntl	drivers/video/ati_radeon_fb.h	/^	u32		dac_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
dac_crt_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint dac_crt_ctrl;		\/* _DISP_DAC_CRT_CTRL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
dac_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dac_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
dacr0	arch/m68k/include/asm/immap_5235.h	/^	u32 dacr0;		\/* 0x08 address and control register 0 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
dacr0	arch/m68k/include/asm/immap_5307.h	/^	u32 dacr0;$/;"	m	struct:sdramctrl	typeref:typename:u32
dacr1	arch/m68k/include/asm/immap_5235.h	/^	u32 dacr1;		\/* 0x10 address and control register 1 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
dacr1	arch/m68k/include/asm/immap_5307.h	/^	u32 dacr1;$/;"	m	struct:sdramctrl	typeref:typename:u32
dactsr	arch/m68k/include/asm/immap_5441x.h	/^	u16 dactsr;		\/* 0x1E *\/$/;"	m	struct:ccm	typeref:typename:u16
dad	lib/zlib/deflate.h	/^        ush  dad;        \/* father node in Huffman tree *\/$/;"	m	union:ct_data_s::__anonaf16f3d6020a	typeref:typename:ush
daddr	arch/m68k/include/asm/coldfire/edma.h	/^	u32 daddr;		\/* 0x10 Destination address *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u32
daddr_t	include/linux/types.h	/^typedef __kernel_daddr_t	daddr_t;$/;"	t	typeref:typename:__kernel_daddr_t
daint	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 daint; \/* Device All Endpoints Interrupt *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
daintmsk	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 daintmsk; \/* Device All Endpoints Interrupt Mask *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
dalmore_padctrl	board/nvidia/dalmore/pinmux-config-dalmore.h	/^static struct pmux_drvgrp_config dalmore_padctrl[] = {$/;"	v	typeref:struct:pmux_drvgrp_config[]
dap1cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dap1cfg;	\/* 0x90: APB_MISC_GP_DAP1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap1cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dap1cfg;	\/* 0x90: APB_MISC_GP_DAP1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap1cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	dap1cfg;	\/* 0x84: APB_MISC_GP_DAP1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap1cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dap1cfg;	\/* 0x90: APB_MISC_GP_DAP1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap1cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	dap1cfg;	\/* 0x90: APB_MISC_GP_DAP1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap2cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dap2cfg;	\/* 0x94: APB_MISC_GP_DAP2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap2cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dap2cfg;	\/* 0x94: APB_MISC_GP_DAP2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap2cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	dap2cfg;	\/* 0x88: APB_MISC_GP_DAP2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap2cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dap2cfg;	\/* 0x94: APB_MISC_GP_DAP2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap2cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	dap2cfg;	\/* 0x94: APB_MISC_GP_DAP2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap3cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dap3cfg;	\/* 0x98: APB_MISC_GP_DAP3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap3cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dap3cfg;	\/* 0x98: APB_MISC_GP_DAP3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap3cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	dap3cfg;	\/* 0x8C: APB_MISC_GP_DAP3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap3cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dap3cfg;	\/* 0x98: APB_MISC_GP_DAP3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap3cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	dap3cfg;	\/* 0x98: APB_MISC_GP_DAP3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap4cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dap4cfg;	\/* 0x9C: APB_MISC_GP_DAP4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap4cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dap4cfg;	\/* 0x9C: APB_MISC_GP_DAP4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap4cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	dap4cfg;	\/* 0x90: APB_MISC_GP_DAP4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap4cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dap4cfg;	\/* 0x9C: APB_MISC_GP_DAP4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap4cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	dap4cfg;	\/* 0x9C: APB_MISC_GP_DAP4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap5cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dap5cfg;	\/* 0x198: APB_MISC_GP_DAP5CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap5cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dap5cfg;	\/* 0x198: APB_MISC_GP_DAP5CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap5cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dap5cfg;	\/* 0x198: APB_MISC_GP_DAP5CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dap_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dap_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
dap_fn_mod2	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dap_fn_mod2;$/;"	m	struct:nic301_registers	typeref:typename:u32
dap_fn_mod_ahb	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dap_fn_mod_ahb;$/;"	m	struct:nic301_registers	typeref:typename:u32
dap_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dap_read_qos;			\/* 0x42100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
dap_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dap_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
dar	arch/m68k/include/asm/immap_5275.h	/^	u32 dar;$/;"	m	struct:dma_ctrl	typeref:typename:u32
dar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	dar;		\/* DMA destination address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
dar	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG dar;		\/* Fault registers *\/$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
dar	drivers/block/sata_dwc.c	/^	struct dmareg dar;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
dar	include/fsl_sec.h	/^	u32	dar;		\/* DECO Avail Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
dark_wm	fs/ubifs/ubifs.h	/^	int dark_wm;$/;"	m	struct:ubifs_info	typeref:typename:int
darrow	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color darrow;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
das_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 das_byte(u8 d)$/;"	f	typeref:typename:u8
dat	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 dat;$/;"	m	struct:sunxi_gpio	typeref:typename:u32
dat	arch/arm/include/asm/arch/gpio.h	/^	u32 dat;$/;"	m	struct:sunxi_gpio	typeref:typename:u32
dat	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int dat;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
dat	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int	dat;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
dat	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int	dat;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
dat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 dat;		\/* data register *\/$/;"	m	struct:gpio83xx	typeref:typename:u32
dat0	drivers/spi/davinci_spi.c	/^	dv_reg	dat0;		\/* 0x38 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
dat1	drivers/spi/davinci_spi.c	/^	dv_reg	dat1;		\/* 0x3c *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
dat_gpio	board/nokia/rx51/tag_omap.h	/^	s16 dat_gpio;$/;"	m	struct:omap_cbus_config	typeref:typename:s16
dat_shadow	drivers/gpio/mpc85xx_gpio.c	/^	u32 dat_shadow;$/;"	m	struct:mpc85xx_gpio_data	typeref:typename:u32	file:
data	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bus_clk_data *data;$/;"	m	struct:bus_clock	typeref:struct:bus_clk_data *
data	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct peri_clk_data *data;$/;"	m	struct:peri_clock	typeref:struct:peri_clk_data *
data	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bus_clk_data *data;$/;"	m	struct:bus_clock	typeref:struct:bus_clk_data *
data	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct peri_clk_data *data;$/;"	m	struct:peri_clock	typeref:struct:peri_clk_data *
data	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short data;            \/* 0x9C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
data	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 data;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
data	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 data;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
data	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     data;$/;"	m	struct:ocotp_regs	typeref:typename:u32
data	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short data;	\/* 0x1C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
data	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short data;		\/* 0x9C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
data	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short data;		\/* 0x9C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
data	arch/arm/include/asm/arch-stv0991/gpio.h	/^	u32 data;		\/* offset 0x0 *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
data	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 data;	\/* 0x1c *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
data	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t data[EMPTY_ARRAY];$/;"	m	struct:mrq_module_mail_request	typeref:typename:uint8_t[]
data	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t data[EMPTY_ARRAY];$/;"	m	struct:mrq_module_mail_response	typeref:typename:uint8_t[]
data	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t data[];$/;"	m	struct:serial_i2c_request	typeref:typename:uint8_t[]
data	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 data;$/;"	m	struct:ocotp_regs	typeref:typename:u32
data	arch/arm/include/asm/arch/rsb.h	/^	u32 data;	\/* 0x1c *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
data	arch/arm/include/asm/imx-common/dma.h	/^	unsigned long		data;$/;"	m	struct:mxs_dma_cmd	typeref:typename:unsigned long
data	arch/arm/include/asm/omap_mmc.h	/^	unsigned int data;		\/* 0x120 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
data	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 data[1024];$/;"	m	struct:bcm2835_mbox_tag_get_palette::__anon775fc544350a::__anon775fc5443708	typeref:typename:u32[1024]
data	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 data[256];$/;"	m	struct:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a::__anon775fc5443c08	typeref:typename:u32[256]
data	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 data[256];$/;"	m	struct:bcm2835_mbox_tag_test_palette::__anon775fc544380a::__anon775fc5443908	typeref:typename:u32[256]
data	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u32 data[MAX_DATA_ARRAY];	\/* data array *\/$/;"	m	struct:op_params	typeref:typename:u32[]
data	arch/blackfin/include/asm/gpio.h	/^	unsigned short data;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
data	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short data;$/;"	m	struct:gpio_port_s	typeref:typename:unsigned short
data	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short data;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
data	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long data;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
data	arch/m68k/include/asm/coldfire/flexcan.h	/^	u8 data[8];		\/* 0x06 8 Byte Data Field *\/$/;"	m	struct:can_msgbuf_ctrl	typeref:typename:u8[8]
data	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 data;$/;"	m	struct:td	typeref:typename:__u32
data	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 data;$/;"	m	struct:td	typeref:typename:__u32
data	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 data;$/;"	m	struct:td	typeref:typename:__u32
data	arch/powerpc/include/asm/5xx_immap.h	/^	       u_char data[8];$/;"	m	struct:tcan::__anon8cdce8f20108	typeref:typename:u_char[8]
data	arch/x86/cpu/intel_common/microcode.c	/^	const void *data;$/;"	m	struct:microcode_update	typeref:typename:const void *	file:
data	arch/x86/include/asm/bootparam.h	/^	__u8 data[0];$/;"	m	struct:setup_data	typeref:typename:__u8[0]
data	arch/x86/include/asm/mrccache.h	/^	u8	data[0];	\/* Variable size, platform\/run time dependent *\/$/;"	m	struct:mrc_data_container	typeref:typename:u8[0]
data	arch/xtensa/include/asm/bootparam.h	/^	unsigned long data[0];	\/* data *\/$/;"	m	struct:bp_tag	typeref:typename:unsigned long[0]
data	board/LaCie/common/cpld-gpio-bus.h	/^	unsigned *data;$/;"	m	struct:cpld_gpio_bus	typeref:typename:unsigned *
data	board/esd/pmc440/pmc440.h	/^	u32 data;$/;"	m	struct:pmc440_fifo_s	typeref:typename:u32
data	board/freescale/common/ngpixis.h	/^	u8 data;$/;"	m	struct:ngpixis	typeref:typename:u8
data	board/gdsys/common/phy.c	/^	u16 data;$/;"	m	struct:mii_setupcmd	typeref:typename:u16	file:
data	board/imgtec/malta/superio.c	/^	u8 data;$/;"	m	struct:__anon9f50c37a0108	typeref:typename:u8	file:
data	board/motionpro/motionpro.c	/^	char *data;$/;"	m	struct:init_elem	typeref:typename:char *	file:
data	board/zipitz2/zipitz2.c	/^	unsigned short	data;$/;"	m	struct:__anonddc6b5340108	typeref:typename:unsigned short	file:
data	common/cli_hush.c	/^	char *data;$/;"	m	struct:__anon62a9299d0508	typeref:typename:char *	file:
data	common/menu.c	/^	void *data;$/;"	m	struct:menu_item	typeref:typename:void *	file:
data	disk/part_mac.h	/^	__u32	data;		\/* reserved				*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u32
data	drivers/adc/sandbox.c	/^	unsigned int data[4];$/;"	m	struct:sandbox_adc_priv	typeref:typename:unsigned int[4]	file:
data	drivers/clk/uniphier/clk-uniphier-core.c	/^	const struct uniphier_clk_data *data;$/;"	m	struct:uniphier_clk_priv	typeref:typename:const struct uniphier_clk_data *	file:
data	drivers/core/devres.c	/^	unsigned long long		data[];$/;"	m	struct:devres	typeref:typename:unsigned long long[]	file:
data	drivers/gpio/altera_pio.c	/^	u32	data;			\/* Data register *\/$/;"	m	struct:altera_pio_regs	typeref:typename:u32	file:
data	drivers/i2c/i2c-cdns.c	/^	u32 data;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
data	drivers/i2c/mv_i2c.c	/^	u8 data;$/;"	m	struct:mv_i2c_msg	typeref:typename:u8	file:
data	drivers/i2c/mvtwsi.c	/^	u32 data;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
data	drivers/i2c/zynq_i2c.c	/^	u32 data;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
data	drivers/misc/i2c_eeprom_emul.c	/^	uint8_t *data;$/;"	m	struct:sandbox_i2c_flash	typeref:typename:uint8_t *	file:
data	drivers/mmc/mxcmmc.c	/^	struct mmc_data		*data;$/;"	m	struct:mxcmci_host	typeref:struct:mmc_data *	file:
data	drivers/mmc/rpmb.c	/^	unsigned char data[RPMB_SZ_DATA];$/;"	m	struct:s_rpmb	typeref:typename:unsigned char[]	file:
data	drivers/mmc/sh_mmcif.h	/^	struct mmc_data		*data;$/;"	m	struct:sh_mmcif_host	typeref:struct:mmc_data *
data	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u8 data[32768]; \/* NAND's raw data buffer *\/$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u8[32768]	file:
data	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 data;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
data	drivers/mtd/pic32_flash.c	/^	struct pic32_reg_atomic data;$/;"	m	struct:pic32_reg_nvm	typeref:struct:pic32_reg_atomic	file:
data	drivers/mtd/spi/sandbox.c	/^	const struct spi_flash_params *data;$/;"	m	struct:sandbox_spi_flash	typeref:typename:const struct spi_flash_params *	file:
data	drivers/net/bfin_mac.c	/^	u16 data;$/;"	m	union:__anon82b289e9010a	typeref:typename:u16	file:
data	drivers/net/cpsw.c	/^	struct cpsw_platform_data	data;$/;"	m	struct:cpsw_priv	typeref:struct:cpsw_platform_data	file:
data	drivers/net/cpsw.c	/^	struct cpsw_slave_data		*data;$/;"	m	struct:cpsw_slave	typeref:struct:cpsw_slave_data *	file:
data	drivers/net/e1000.h	/^		uint32_t data;$/;"	m	union:e1000_context_desc::__anon7fc27345180a	typeref:typename:uint32_t
data	drivers/net/e1000.h	/^		uint32_t data;$/;"	m	union:e1000_data_desc::__anon7fc273451a0a	typeref:typename:uint32_t
data	drivers/net/e1000.h	/^		uint32_t data;$/;"	m	union:e1000_data_desc::__anon7fc273451c0a	typeref:typename:uint32_t
data	drivers/net/e1000.h	/^		uint32_t data;$/;"	m	union:e1000_tx_desc::__anon7fc27345100a	typeref:typename:uint32_t
data	drivers/net/e1000.h	/^		uint32_t data;$/;"	m	union:e1000_tx_desc::__anon7fc27345120a	typeref:typename:uint32_t
data	drivers/net/eepro100.c	/^	volatile u8 data[PKTSIZE_ALIGN];$/;"	m	struct:RxFD	typeref:typename:volatile u8[]	file:
data	drivers/net/mpc5xxx_fec.c	/^    uint8 data[1500];           \/* actual data *\/$/;"	m	struct:__anone13c4dc40108	typeref:typename:uint8[1500]	file:
data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 data;			\/* MBAR_ETH + 0x1FC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
data	drivers/net/mvpp2.c	/^	u32 data;$/;"	m	struct:mvpp2_cls_lookup_entry	typeref:typename:u32	file:
data	drivers/net/mvpp2.c	/^	u32 data[MVPP2_CLS_FLOWS_TBL_DATA_WORDS];$/;"	m	struct:mvpp2_cls_flow_entry	typeref:typename:u32[]	file:
data	drivers/net/ne2000_base.h	/^	u8* data;$/;"	m	struct:dp83902a_priv_data	typeref:typename:u8 *
data	drivers/pinctrl/meson/pinctrl-meson.h	/^	struct meson_pinctrl_data *data;$/;"	m	struct:meson_pinctrl	typeref:struct:meson_pinctrl_data *
data	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	unsigned long data;$/;"	m	struct:uniphier_pinctrl_pin	typeref:typename:unsigned long
data	drivers/power/exynos-tmu.c	/^	struct tmu_data data;$/;"	m	struct:tmu_info	typeref:struct:tmu_data	file:
data	drivers/qe/uec.h	/^	u32 data;$/;"	m	struct:buffer_descriptor	typeref:typename:u32
data	drivers/reset/reset-uniphier.c	/^	const struct uniphier_reset_data *data;$/;"	m	struct:uniphier_reset_priv	typeref:typename:const struct uniphier_reset_data *	file:
data	drivers/rtc/imxdi.c	/^static struct imxdi_data data;$/;"	v	typeref:struct:imxdi_data	file:
data	drivers/serial/altera_jtag_uart.c	/^	u32	data;			\/* Data register *\/$/;"	m	struct:altera_jtaguart_regs	typeref:typename:u32	file:
data	drivers/serial/serial_arc.c	/^	unsigned int data;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
data	drivers/spi/ich.h	/^	int data;$/;"	m	struct:ich_spi_priv	typeref:typename:int
data	drivers/spi/lpc32xx_ssp.c	/^	u32 data;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
data	drivers/spi/ti_qspi.c	/^	u32 data;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
data	drivers/tpm/tpm_tis_lpc.c	/^	u8 data;$/;"	m	struct:tpm_locality	typeref:typename:u8	file:
data	drivers/usb/gadget/atmel_usba_udc.c	/^			unsigned long data[2];$/;"	m	union:usba_control_irq::__anon9e4ca2d0010a	typeref:typename:unsigned long[2]	file:
data	drivers/usb/host/isp116x.h	/^	unsigned char *data;	\/* to databuf *\/$/;"	m	struct:isp116x_ep	typeref:typename:unsigned char *
data	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 data;$/;"	m	struct:td	typeref:typename:__u32
data	drivers/usb/host/ohci.h	/^	__u32 data;$/;"	m	struct:td	typeref:typename:__u32
data	drivers/usb/phy/rockchip_usb2_phy.c	/^	const void	*data;$/;"	m	struct:rockchip_usb2_phy_dt_id	typeref:typename:const void *	file:
data	drivers/video/ipu_common.c	/^	uint32_t data[5];$/;"	m	struct:ipu_ch_param_word	typeref:typename:uint32_t[5]	file:
data	drivers/video/stb_truetype.h	/^   unsigned char  * data;              \/\/ pointer to .ttf file$/;"	m	struct:stbtt_fontinfo	typeref:typename:unsigned char *
data	fs/ubifs/ubifs-media.h	/^	__u8 data[];$/;"	m	struct:ubifs_data_node	typeref:typename:__u8[]
data	fs/ubifs/ubifs-media.h	/^	__u8 data[];$/;"	m	struct:ubifs_ino_node	typeref:typename:__u8[]
data	fs/ubifs/ubifs.h	/^	void *data;$/;"	m	struct:ubifs_inode	typeref:typename:void *
data	fs/yaffs2/yaffs_guts.h	/^	const void *data;$/;"	m	struct:yaffs_xattr_mod	typeref:typename:const void *
data	fs/yaffs2/yaffs_guts.h	/^	u8 *data;$/;"	m	struct:yaffs_cache	typeref:typename:u8 *
data	include/ACEX1K.h	/^	Altera_data_fn		data;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_data_fn
data	include/adc.h	/^	unsigned int data;$/;"	m	struct:adc_channel	typeref:typename:unsigned int
data	include/altera.h	/^	Altera_data_fn data;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_data_fn
data	include/bedbug/ppc.h	/^  char			data[ 256 ];$/;"	m	struct:ppc_ctx	typeref:typename:char[256]
data	include/cbfs.h	/^	void *data;$/;"	m	struct:cbfs_cachenode	typeref:typename:void *
data	include/circbuf.h	/^	char *data;		\/* all data *\/$/;"	m	struct:circbuf	typeref:typename:char *
data	include/cros_ec.h	/^	uint8_t data[CROS_EC_KEYSCAN_COLS];$/;"	m	struct:mbkp_keyscan	typeref:typename:uint8_t[]
data	include/dfu.h	/^	} data;$/;"	m	struct:dfu_entity	typeref:union:dfu_entity::__anona51660ed010a
data	include/dm/device.h	/^	ulong data;$/;"	m	struct:udevice_id	typeref:typename:ulong
data	include/ec_commands.h	/^	uint16_t data;$/;"	m	struct:ec_params_i2c_write	typeref:typename:uint16_t
data	include/ec_commands.h	/^	uint16_t data;$/;"	m	struct:ec_response_i2c_read	typeref:typename:uint16_t
data	include/ec_commands.h	/^	uint16_t data[32];$/;"	m	struct:ec_params_sb_wr_block	typeref:typename:uint16_t[32]
data	include/ec_commands.h	/^	uint32_t data[32];$/;"	m	struct:ec_response_read_test	typeref:typename:uint32_t[32]
data	include/ec_commands.h	/^	uint8_t data[32];$/;"	m	struct:ec_response_sb_rd_block	typeref:typename:uint8_t[32]
data	include/ec_commands.h	/^	uint8_t data[EC_PSTORE_SIZE_MAX];$/;"	m	struct:ec_params_pstore_write	typeref:typename:uint8_t[]
data	include/ec_commands.h	/^	uint8_t data[];		\/* Data read by messages concatenated here *\/$/;"	m	struct:ec_response_i2c_passthru	typeref:typename:uint8_t[]
data	include/edid.h	/^	unsigned char data[124];$/;"	m	struct:edid_cea861_info	typeref:typename:unsigned char[124]
data	include/edid.h	/^	} data;$/;"	m	struct:edid_monitor_descriptor	typeref:union:edid_monitor_descriptor::__anon4a0dc044010a
data	include/eeprom_layout.h	/^	unsigned char *data;$/;"	m	struct:eeprom_layout	typeref:typename:unsigned char *
data	include/environment.h	/^	unsigned char	data[ENV_SIZE]; \/* Environment data		*\/$/;"	m	struct:environment_s	typeref:typename:unsigned char[]
data	include/ext_common.h	/^	struct ext2_data *data;$/;"	m	struct:ext2fs_node	typeref:struct:ext2_data *
data	include/faraday/ftpci100.h	/^	unsigned int data;		\/* 0x2c - PCI Configuration DATA *\/$/;"	m	struct:ftpci100_ahbc	typeref:typename:unsigned int
data	include/fdt.h	/^	char data[0];$/;"	m	struct:fdt_property	typeref:typename:char[0]
data	include/fis.h	/^	u32 data[2048];$/;"	m	struct:sata_fis_data	typeref:typename:u32[2048]
data	include/fsl-mc/fsl_dpmac.h	/^	uint16_t	data;$/;"	m	struct:dpmac_mdio_cfg	typeref:typename:uint16_t
data	include/grlib/apbuart.h	/^	volatile unsigned int data;$/;"	m	struct:__anon8f85467c0108	typeref:typename:volatile unsigned int
data	include/image.h	/^	const void *data;$/;"	m	struct:image_region	typeref:typename:const void *
data	include/jffs2/mini_inflate.h	/^	unsigned char *data; \/* increments as we move from byte to byte *\/$/;"	m	struct:bitstream	typeref:typename:unsigned char *
data	include/linux/ethtool.h	/^	__u32	data;$/;"	m	struct:ethtool_value	typeref:typename:__u32
data	include/linux/ethtool.h	/^	__u32	data[0];	\/* ETH_SS_xxx count, in order, based on bits$/;"	m	struct:ethtool_sset_info	typeref:typename:__u32[0]
data	include/linux/ethtool.h	/^	__u64	data[0];$/;"	m	struct:ethtool_stats	typeref:typename:__u64[0]
data	include/linux/ethtool.h	/^	__u64	data[0];$/;"	m	struct:ethtool_test	typeref:typename:__u64[0]
data	include/linux/ethtool.h	/^	__u8	data[0];$/;"	m	struct:ethtool_eeprom	typeref:typename:__u8[0]
data	include/linux/ethtool.h	/^	__u8	data[0];$/;"	m	struct:ethtool_gstrings	typeref:typename:__u8[0]
data	include/linux/ethtool.h	/^	__u8	data[0];$/;"	m	struct:ethtool_perm_addr	typeref:typename:__u8[0]
data	include/linux/ethtool.h	/^	__u8	data[0];$/;"	m	struct:ethtool_regs	typeref:typename:__u8[0]
data	include/linux/ethtool.h	/^	char	data[ETHTOOL_FLASH_MAX_FILENAME];$/;"	m	struct:ethtool_flash	typeref:typename:char[]
data	include/linux/fb.h	/^	const char *data;	\/* Pointer to image data *\/$/;"	m	struct:fb_image	typeref:typename:const char *
data	include/linux/fb.h	/^	const char *data;	\/* Pointer to image data *\/$/;"	m	struct:fb_image_user	typeref:typename:const char *
data	include/linux/fb.h	/^	void *data;$/;"	m	struct:fb_event	typeref:typename:void *
data	include/net.h	/^		u8 data[0];$/;"	m	union:icmp_hdr::__anona5cac555010a	typeref:typename:u8[0]
data	include/pci_rom.h	/^	uint16_t data;$/;"	m	struct:pci_rom_header	typeref:typename:uint16_t
data	include/search.h	/^	char *data;$/;"	m	struct:entry	typeref:typename:char *
data	include/sh_pfc.h	/^	struct pinmux_range data;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
data	include/slre.h	/^	unsigned char	data[256];$/;"	m	struct:slre	typeref:typename:unsigned char[256]
data	include/usb/fotg210.h	/^		uint32_t data[4];$/;"	m	struct:fotg210_regs::__anon195d40ca0108	typeref:typename:uint32_t[4]
data	include/usb/fotg210.h	/^		uint32_t data[9];$/;"	m	struct:fotg210_regs::__anon195d40ca0208	typeref:typename:uint32_t[9]
data	include/usb/fusbh200.h	/^		uint32_t data[4];$/;"	m	struct:fusbh200_regs::__anon10d3a7510108	typeref:typename:uint32_t[4]
data	include/usb/fusbh200.h	/^		uint32_t data[9];$/;"	m	struct:fusbh200_regs::__anon10d3a7510208	typeref:typename:uint32_t[9]
data	include/usbdevice.h	/^	int data;$/;"	m	struct:urb	typeref:typename:int
data	include/video_easylogo.h	/^	unsigned char	*data;$/;"	m	struct:__anon1a9c56c70108	typeref:typename:unsigned char *
data	include/zfs_common.h	/^	void *data;$/;"	m	struct:zfs_file	typeref:typename:void *
data	lib/efi_loader/efi_memory.c	/^	char data[];$/;"	m	struct:efi_pool_allocation	typeref:typename:char[]	file:
data	net/dns.h	/^	unsigned char	data[1];	\/* Data, variable length *\/$/;"	m	struct:header	typeref:typename:unsigned char[1]
data	net/eth_legacy.c	/^	uchar data[PKTSIZE];$/;"	m	struct:__anon71b287410108	typeref:typename:uchar[]	file:
data	net/nfs.h	/^			uint32_t data[1];$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780208	typeref:typename:uint32_t[1]
data	net/nfs.h	/^			uint32_t data[NFS_READ_SIZE];$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780308	typeref:typename:uint32_t[]
data	net/nfs.h	/^		uint8_t data[2048];$/;"	m	union:rpc_t::__anon8c947878010a	typeref:typename:uint8_t[2048]
data	scripts/kconfig/expr.h	/^	void *data;$/;"	m	struct:menu	typeref:typename:void *
data	scripts/kconfig/lxdialog/dialog.h	/^	void *data;	\/* pointer to menu item - used by menubox+checklist *\/$/;"	m	struct:dialog_item	typeref:typename:void *
data	tools/aisimage.h	/^	char data[1];$/;"	m	struct:ais_header	typeref:typename:char[1]
data	tools/aisimage.h	/^	uint32_t data[1];$/;"	m	struct:ais_cmd_load	typeref:typename:uint32_t[1]
data	tools/bmp_logo.c	/^	uint8_t	*data;$/;"	m	struct:bitmap_s	typeref:typename:uint8_t *	file:
data	tools/easylogo/easylogo.c	/^	void *data, *palette;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:void *	file:
data	tools/env/fw_env.c	/^	char			*data;$/;"	m	struct:environment	typeref:typename:char *	file:
data	tools/env/fw_env.c	/^	char		data[];$/;"	m	struct:env_image_redundant	typeref:typename:char[]	file:
data	tools/env/fw_env.c	/^	char		data[];$/;"	m	struct:env_image_single	typeref:typename:char[]	file:
data	tools/ifdtool.h	/^	uint32_t data[8];$/;"	m	struct:fmsba_t	typeref:typename:uint32_t[8]
data	tools/imximage.h	/^	} data;$/;"	m	struct:__anon504a956c0d08	typeref:union:__anon504a956c0d08::__anon504a956c0e0a
data	tools/kwbimage.h	/^	char     data[0];$/;"	m	struct:opt_hdr_v1	typeref:typename:char[0]
data	tools/kwboot.c	/^	uint8_t data[128];$/;"	m	struct:kwboot_block	typeref:typename:uint8_t[128]	file:
data	tools/lpc32xximage.c	/^	uint32_t data[129];$/;"	m	struct:nand_page_0_boot_header	typeref:typename:uint32_t[129]	file:
data	tools/mxsimage.c	/^	uint8_t				*data;$/;"	m	struct:sb_cmd_ctx	typeref:typename:uint8_t *	file:
data	tools/zynqimage.c	/^	uint32_t data;$/;"	m	struct:zynq_reginit	typeref:typename:uint32_t	file:
data	tools/zynqmpimage.c	/^	uint32_t data;$/;"	m	struct:zynqmp_reginit	typeref:typename:uint32_t	file:
data0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 data0;$/;"	m	struct:ocotp_regs	typeref:typename:u32
data0	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 data0;	\/* 0x1c data buffer 0 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
data0	arch/arm/include/asm/arch/p2wi.h	/^	u32 data0;	\/* 0x1c data buffer 0 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
data1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 data1;$/;"	m	struct:ocotp_regs	typeref:typename:u32
data1	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 data1;	\/* 0x20 data buffer 1 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
data1	arch/arm/include/asm/arch/p2wi.h	/^	u32 data1;	\/* 0x20 data buffer 1 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
data1	arch/x86/include/asm/fsp/fsp_types.h	/^	u32	data1;$/;"	m	struct:efi_guid	typeref:typename:u32
data1	drivers/spi/ti_qspi.c	/^	u32 data1;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
data2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 data2;$/;"	m	struct:ocotp_regs	typeref:typename:u32
data2	arch/x86/include/asm/fsp/fsp_types.h	/^	u16	data2;$/;"	m	struct:efi_guid	typeref:typename:u16
data2	drivers/spi/ti_qspi.c	/^	u32 data2;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
data3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 data3;$/;"	m	struct:ocotp_regs	typeref:typename:u32
data3	arch/x86/include/asm/fsp/fsp_types.h	/^	u16	data3;$/;"	m	struct:efi_guid	typeref:typename:u16
data3	drivers/spi/ti_qspi.c	/^	u32 data3;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
data32	arch/x86/cpu/sipi_vector.S	/^data32 cs	ljmp	*(%bp)$/;"	l
data4	arch/x86/include/asm/fsp/fsp_types.h	/^	u8	data4[8];$/;"	m	struct:efi_guid	typeref:typename:u8[8]
dataColIdx	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
dataLength	drivers/net/mpc512x_fec.h	/^	u16 dataLength;$/;"	m	struct:BufferDescriptor	typeref:typename:u16
dataLength	drivers/net/mpc512x_fec.h	/^	u16 dataLength;$/;"	m	struct:__anonf8b8c0fc0108	typeref:typename:u16
dataLength	drivers/net/mpc5xxx_fec.h	/^	uint16 dataLength;$/;"	m	struct:BufferDescriptor	typeref:typename:uint16
dataLength	drivers/net/mpc5xxx_fec.h	/^	uint16 dataLength;$/;"	m	struct:__anone13c4dc90108	typeref:typename:uint16
dataPointer	drivers/net/mpc512x_fec.h	/^	u32 dataPointer;$/;"	m	struct:BufferDescriptor	typeref:typename:u32
dataPointer	drivers/net/mpc512x_fec.h	/^	u32 dataPointer;$/;"	m	struct:__anonf8b8c0fc0108	typeref:typename:u32
dataPointer	drivers/net/mpc5xxx_fec.h	/^	uint32 dataPointer;$/;"	m	struct:BufferDescriptor	typeref:typename:uint32
dataPointer	drivers/net/mpc5xxx_fec.h	/^	uint32 dataPointer;$/;"	m	struct:__anone13c4dc90108	typeref:typename:uint32
dataPointer	include/MCD_dma.h	/^	u32 dataPointer;$/;"	m	struct:MCD_bufDescFec_struct	typeref:typename:u32
dataSize	fs/yaffs2/yaffs_nandif.h	/^	unsigned dataSize;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
data_abort	arch/arm/lib/vectors.S	/^data_abort:$/;"	l
data_addr	drivers/block/pata_bfin.h	/^	unsigned long data_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
data_addr	drivers/block/sata_dwc.h	/^	void __iomem		*data_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
data_addr	drivers/block/sata_sil3114.h	/^	unsigned long data_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
data_addr	drivers/net/ag7xxx.c	/^	u32	data_addr;$/;"	m	struct:ag7xxx_dma_desc	typeref:typename:u32	file:
data_align	include/fsl-mc/fsl_dpni.h	/^	uint16_t data_align;$/;"	m	struct:dpni_buffer_layout	typeref:typename:uint16_t
data_arr_idx	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u8 data_arr_idx;$/;"	m	struct:cfg_seq	typeref:typename:u8
data_begin	include/fat.h	/^	int	data_begin;	\/* The sector of the first cluster, can be negative *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:int
data_bits	arch/avr32/include/asm/sdram.h	/^	} data_bits;$/;"	m	struct:sdram_config	typeref:enum:sdram_config::__anon59a68c3f0103
data_bits	include/usb_cdc_acm.h	/^		unsigned char data_bits;$/;"	m	struct:rs232_emu	typeref:typename:unsigned char
data_block_ptr	drivers/mtd/nand/tegra_nand.h	/^	u32	data_block_ptr;	\/* offset 40h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
data_buf	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t data_buf[TEGRA_I2C_IPC_MAX_IN_BUF_SIZE];$/;"	m	struct:cmd_i2c_xfer_request	typeref:typename:uint8_t[]
data_buf	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t data_buf[TEGRA_I2C_IPC_MAX_OUT_BUF_SIZE];$/;"	m	struct:cmd_i2c_xfer_response	typeref:typename:uint8_t[]
data_buf	drivers/mtd/nand/mxs_nand.c	/^	uint8_t		*data_buf;$/;"	m	struct:mxs_nand_info	typeref:typename:uint8_t *	file:
data_buf_rev	include/ddr_spd.h	/^			uint8_t data_buf_rev;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
data_buf_size	drivers/mtd/nand/mxs_nand.c	/^	uint32_t	data_buf_size;$/;"	m	struct:mxs_nand_info	typeref:typename:uint32_t	file:
data_buf_size	include/linux/mtd/samsung_onenand.h	/^	unsigned int	data_buf_size;	\/* 0x0090 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
data_buff	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned char		*data_buff;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned char *	file:
data_buff	drivers/net/pic32_eth.h	/^	u32 data_buff;	\/* data buffer address *\/$/;"	m	struct:eth_dma_desc	typeref:typename:u32
data_buff_pos	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		data_buff_pos;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
data_bus_width	include/fsl_ddr_sdram.h	/^	unsigned int data_bus_width;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
data_bytes_per_chunk	fs/yaffs2/yaffs_guts.h	/^	int data_bytes_per_chunk;$/;"	m	struct:yaffs_dev	typeref:typename:int
data_bytes_per_ppage	include/linux/mtd/nand.h	/^	__le32 data_bytes_per_ppage;$/;"	m	struct:nand_onfi_params	typeref:typename:__le32
data_class_interface	drivers/serial/usbtty.c	/^	struct usb_interface_descriptor data_class_interface;$/;"	m	struct:acm_config_desc	typeref:struct:usb_interface_descriptor	file:
data_clear	arch/blackfin/include/asm/gpio.h	/^	unsigned short data_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
data_clear	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short data_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
data_clear	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long data_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
data_count	disk/part_mac.h	/^	__u32	data_count;	\/* number of data blocks		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
data_crc	drivers/mtd/ubi/ubi-media.h	/^	__be32  data_crc;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
data_crc	drivers/mtd/ubi/ubi-media.h	/^	__be32 data_crc;$/;"	m	struct:ubi_fm_sb	typeref:typename:__be32
data_crc	fs/jffs2/jffs2_private.h	/^data_crc(struct jffs2_raw_inode *node)$/;"	f	typeref:typename:int
data_crc	include/jffs2/jffs2.h	/^	__u32 data_crc;   \/* CRC for the (compressed) data.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
data_dir	drivers/usb/gadget/f_mass_storage.c	/^	enum data_direction	data_dir;$/;"	m	struct:fsg_common	typeref:enum:data_direction	file:
data_direction	drivers/usb/gadget/storage_common.c	/^enum data_direction {$/;"	g	file:
data_drv_1866	include/ddr_spd.h	/^			uint8_t data_drv_1866;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
data_drv_2400	include/ddr_spd.h	/^			uint8_t data_drv_2400;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
data_drv_3200	include/ddr_spd.h	/^			uint8_t data_drv_3200;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
data_enable_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint data_enable_opt;		\/* _DISP_DATA_ENABLE_OPTIONS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
data_endpoints	drivers/serial/usbtty.c	/^	struct usb_endpoint_descriptor data_endpoints[NUM_ENDPOINTS-1];$/;"	m	struct:acm_config_desc	typeref:struct:usb_endpoint_descriptor[]	file:
data_endpoints	drivers/serial/usbtty.c	/^	struct usb_endpoint_descriptor data_endpoints[NUM_ENDPOINTS];$/;"	m	struct:gserial_config_desc	typeref:struct:usb_endpoint_descriptor[]	file:
data_err_inject_hi	arch/powerpc/include/asm/immap_83xx.h	/^	u32 data_err_inject_hi;	\/* Memory Data Path Error Injection Mask High *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
data_err_inject_hi	include/fsl_immap.h	/^	u32	data_err_inject_hi;	\/* Data Path Err Injection Mask High *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
data_err_inject_lo	arch/powerpc/include/asm/immap_83xx.h	/^	u32 data_err_inject_lo;	\/* Memory Data Path Error Injection Mask Low *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
data_err_inject_lo	include/fsl_immap.h	/^	u32	data_err_inject_lo;	\/* Data Path Err Injection Mask Low *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
data_flags	arch/blackfin/cpu/traps.c	/^	uint32_t data_flags, inst_flags;$/;"	m	struct:memory_map	typeref:typename:uint32_t	file:
data_format	drivers/usb/emul/sandbox_flash.c	/^	u8 data_format;$/;"	m	struct:scsi_inquiry_resp	typeref:typename:u8	file:
data_format	include/adc.h	/^	int data_format;$/;"	m	struct:adc_uclass_platdata	typeref:typename:int
data_growth	fs/ubifs/ubifs.h	/^	int data_growth;$/;"	m	struct:ubifs_budget_req	typeref:typename:int
data_growth	fs/ubifs/ubifs.h	/^	long long data_growth;$/;"	m	struct:ubifs_budg_info	typeref:typename:long long
data_head_room	include/fsl-mc/fsl_dpni.h	/^	uint16_t data_head_room;$/;"	m	struct:dpni_buffer_layout	typeref:typename:uint16_t
data_hold	include/ddr_spd.h	/^	unsigned char data_hold;   \/* 35 Data Input Hold Time After Strobe *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
data_hold	include/ddr_spd.h	/^	unsigned char data_hold;   \/* 35 Data Input Hold Time$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
data_hold	include/spd.h	/^	unsigned char data_hold;   \/* 35 Data signal input hold time *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
data_hold	tools/mxsboot.c	/^		uint8_t			data_hold;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
data_if_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 data_if_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
data_in	drivers/gpio/mvebu_gpio.c	/^	u32 data_in;$/;"	m	struct:mvebu_gpio_regs	typeref:typename:u32	file:
data_intf	drivers/usb/gadget/ether.c	/^data_intf = {$/;"	v	typeref:typename:const struct usb_interface_descriptor	file:
data_intf	include/ddr_spd.h	/^			uint8_t data_intf;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
data_key_init	fs/ubifs/key.h	/^static inline void data_key_init(const struct ubifs_info *c,$/;"	f	typeref:typename:void
data_lane	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned int			data_lane;$/;"	m	struct:mipi_dsim_device	typeref:typename:unsigned int
data_len	arch/powerpc/include/asm/ppc4xx-mal.h	/^  short	 data_len;	    \/* Max length is 4K-1 (12 bits)	*\/$/;"	m	struct:__anonf209d9e80108	typeref:typename:short
data_len	drivers/spi/cadence_qspi.h	/^	size_t		data_len;$/;"	m	struct:cadence_spi_priv	typeref:typename:size_t
data_len	drivers/spi/fsl_espi.c	/^	size_t		data_len;$/;"	m	struct:fsl_spi_slave	typeref:typename:size_t	file:
data_len	fs/ubifs/ubifs-media.h	/^	__le32 data_len;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
data_len	fs/ubifs/ubifs.h	/^	int data_len;$/;"	m	struct:ubifs_inode	typeref:typename:int
data_len	include/ec_commands.h	/^	uint16_t data_len;$/;"	m	struct:ec_host_request	typeref:typename:uint16_t
data_len	include/ec_commands.h	/^	uint16_t data_len;$/;"	m	struct:ec_host_response	typeref:typename:uint16_t
data_len_err	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int data_len_err;$/;"	m	struct:emac_stats_st	typeref:typename:int
data_length	drivers/net/fec_mxc.h	/^	uint16_t data_length;		\/* payload's length in bytes *\/$/;"	m	struct:fec_bd	typeref:typename:uint16_t
data_length	include/cbfs.h	/^	u32 data_length;$/;"	m	struct:cbfs_cachenode	typeref:typename:u32
data_lines	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 data_lines;$/;"	m	struct:panel_config	typeref:typename:u32
data_lines	board/nokia/rx51/tag_omap.h	/^	u8   data_lines;$/;"	m	struct:omap_lcd_config	typeref:typename:u8
data_mask	include/adc.h	/^	unsigned int data_mask;$/;"	m	struct:adc_uclass_platdata	typeref:typename:unsigned int
data_mgr	drivers/ddr/altera/sequencer.c	/^static struct socfpga_data_mgr *data_mgr =$/;"	v	typeref:struct:socfpga_data_mgr *	file:
data_name	drivers/ddr/fsl/interactive.c	/^	const char *data_name;$/;"	m	struct:data_strings	typeref:typename:const char *	file:
data_nodes_cmp	fs/ubifs/gc.c	/^static int data_nodes_cmp(void *priv, struct list_head *a, struct list_head *b)$/;"	f	typeref:typename:int	file:
data_nop_intf	drivers/usb/gadget/ether.c	/^data_nop_intf = {$/;"	v	typeref:typename:const struct usb_interface_descriptor	file:
data_offset	drivers/mtd/ubi/ubi-media.h	/^	__be32  data_offset;$/;"	m	struct:ubi_ec_hdr	typeref:typename:__be32
data_offset	include/bmp_layout.h	/^	__u32	data_offset;$/;"	m	struct:bmp_header	typeref:typename:__u32
data_out	drivers/gpio/mvebu_gpio.c	/^	u32 data_out;$/;"	m	struct:mvebu_gpio_regs	typeref:typename:u32	file:
data_pad	drivers/mtd/ubi/ubi-media.h	/^	__be32  data_pad;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
data_pad	drivers/mtd/ubi/ubi-media.h	/^	__be32  data_pad;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__be32
data_pad	drivers/mtd/ubi/ubi-media.h	/^	__be32 data_pad;$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__be32
data_pad	drivers/mtd/ubi/ubi.h	/^	int data_pad;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
data_pad	drivers/mtd/ubi/ubi.h	/^	int data_pad;$/;"	m	struct:ubi_volume	typeref:typename:int
data_pointer	drivers/net/fec_mxc.h	/^	uint32_t data_pointer;		\/* payload's buffer address *\/$/;"	m	struct:fec_bd	typeref:typename:uint32_t
data_pol	drivers/video/ipu.h	/^	unsigned data_pol:1;	\/* true = inverted *\/$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
data_ptr	arch/powerpc/include/asm/ppc4xx-mal.h	/^  char	*data_ptr;	    \/* pointer to actual data buffer	*\/$/;"	m	struct:__anonf209d9e80108	typeref:typename:char *
data_reg	drivers/usb/host/isp116x.h	/^	u16 *data_reg;$/;"	m	struct:isp116x	typeref:typename:u16 *
data_regs	include/sh_pfc.h	/^	struct pinmux_data_reg *data_regs;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_data_reg *
data_rsp_box	drivers/usb/gadget/f_thor.h	/^struct data_rsp_box {		\/* total: 8B *\/$/;"	s
data_set	arch/blackfin/include/asm/gpio.h	/^	unsigned short data_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
data_set	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short data_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
data_set	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long data_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
data_setup	include/ddr_spd.h	/^	unsigned char data_setup;  \/* 34 Data Input Setup Time Before Strobe *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
data_setup	include/ddr_spd.h	/^	unsigned char data_setup;  \/* 34 Data Input Setup Time$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
data_setup	include/spd.h	/^	unsigned char data_setup;  \/* 34 Data signal input setup time *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
data_setup	tools/mxsboot.c	/^		uint8_t			data_setup;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
data_size	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t data_size;$/;"	m	struct:cmd_i2c_xfer_request	typeref:typename:uint32_t
data_size	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t data_size;$/;"	m	struct:cmd_i2c_xfer_response	typeref:typename:uint32_t
data_size	arch/x86/include/asm/mrccache.h	/^	u32	data_size;	\/* Size of the 'data' field *\/$/;"	m	struct:mrc_data_container	typeref:typename:u32
data_size	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		data_size;	\/* data to be read from FIFO *\/$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
data_size	drivers/mtd/ubi/ubi-media.h	/^	__be32  data_size;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
data_size	drivers/net/mvneta.c	/^	u16  data_size;		\/* Data size of transmitted packet in bytes *\/$/;"	m	struct:mvneta_tx_desc	typeref:typename:u16	file:
data_size	drivers/net/mvneta.c	/^	u16  data_size;		\/* Size of received packet in bytes	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u16	file:
data_size	drivers/net/mvpp2.c	/^	u16 data_size;		\/* data size of transmitted packet in bytes *\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u16	file:
data_size	drivers/net/mvpp2.c	/^	u16 data_size;		\/* size of received packet in bytes	*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u16	file:
data_size	drivers/usb/gadget/f_mass_storage.c	/^	u32			data_size;$/;"	m	struct:fsg_common	typeref:typename:u32	file:
data_size	include/ec_commands.h	/^	uint8_t data_size;$/;"	m	struct:ec_lpc_host_args	typeref:typename:uint8_t
data_size	include/eeprom_layout.h	/^	int data_size;$/;"	m	struct:eeprom_layout	typeref:typename:int
data_size	include/slre.h	/^	int		data_size;$/;"	m	struct:slre	typeref:typename:int
data_size	tools/socfpgaimage.c	/^static int data_size;$/;"	v	typeref:typename:int	file:
data_size_from_cmnd	drivers/usb/gadget/f_mass_storage.c	/^	u32			data_size_from_cmnd;$/;"	m	struct:fsg_common	typeref:typename:u32	file:
data_start	disk/part_mac.h	/^	__u32	data_start;	\/* rel block # of first data block	*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
data_strings	drivers/ddr/fsl/interactive.c	/^struct data_strings {$/;"	s	file:
data_tail_room	include/fsl-mc/fsl_dpni.h	/^	uint16_t data_tail_room;$/;"	m	struct:dpni_buffer_layout	typeref:typename:uint16_t
data_timeout	include/mpc5xxx.h	/^	volatile u32 data_timeout;	\/* XLB + 0x5c *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
data_timeout_us	include/adc.h	/^	unsigned int data_timeout_us;$/;"	m	struct:adc_uclass_platdata	typeref:typename:unsigned int
data_to_save	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	void *data_to_save;$/;"	m	struct:pei_data	typeref:typename:void *
data_to_save_size	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int data_to_save_size;$/;"	m	struct:pei_data	typeref:typename:int
data_training	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void data_training(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
data_training	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int data_training(const struct chan_info *chan, u32 channel,$/;"	f	typeref:typename:int	file:
data_type	include/u-boot/zlib.h	/^	int	data_type;	\/* best guess about the data type:$/;"	m	struct:z_stream_s	typeref:typename:int
data_width	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 data_width;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
data_width	include/fsl_ddr_dimm_params.h	/^	unsigned int data_width;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
dataaddr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t dataaddr;$/;"	m	struct:cmd_debugfs_dumpdir_request	typeref:typename:uint32_t
dataaddr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t dataaddr;$/;"	m	struct:cmd_debugfs_fileop_request	typeref:typename:uint32_t
datablocks	include/ext_common.h	/^		struct datablocks {$/;"	s	union:ext2_inode::__anon5bc84367010a
databuf	include/linux/mtd/nand.h	/^	uint8_t databuf[ALIGN(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE,$/;"	m	struct:nand_buffers	typeref:typename:uint8_t[]
databytes	drivers/spi/ich.h	/^	unsigned databytes;$/;"	m	struct:ich_spi_priv	typeref:typename:unsigned
datacount	drivers/mmc/arm_pl180_mmci.h	/^	u32 datacount;		\/* 0x30*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
datacrc	fs/jffs2/jffs2_private.h	/^	enum { CRC_UNKNOWN = 0, CRC_OK, CRC_BAD } datacrc;$/;"	m	struct:b_node	typeref:enum:b_node::__anon416d56020103
datactrl	drivers/mmc/arm_pl180_mmci.h	/^	u32 datactrl;		\/* 0x2c*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
dataddr0	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 dataddr0;	\/* 0x10 data address 0 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
dataddr0	arch/arm/include/asm/arch/p2wi.h	/^	u32 dataddr0;	\/* 0x10 data address 0 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
dataddr1	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 dataddr1;	\/* 0x14 data address 1 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
dataddr1	arch/arm/include/asm/arch/p2wi.h	/^	u32 dataddr1;	\/* 0x14 data address 1 *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
datafile	tools/imagetool.h	/^	char *datafile;$/;"	m	struct:image_tool_params	typeref:typename:char *
dataflash	drivers/mtd/spi/sf_dataflash.c	/^struct dataflash {$/;"	s	file:
dataflash_addr	include/dataflash.h	/^struct dataflash_addr {$/;"	s
dataflash_data	drivers/mtd/spi/sf_dataflash.c	/^static struct flash_info dataflash_data[] = {$/;"	v	typeref:struct:flash_info[]	file:
dataflash_info	board/atmel/at91sam9260ek/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/atmel/at91sam9261ek/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/atmel/at91sam9263ek/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/atmel/at91sam9rlek/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/calao/usb_a9263/usb_a9263.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/egnite/ethernut5/ethernut5.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/esd/meesc/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/ronetix/pm9261/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_info	board/ronetix/pm9263/partition.c	/^AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];$/;"	v	typeref:typename:AT91S_DATAFLASH_INFO[]
dataflash_perror	drivers/mtd/dataflash.c	/^void dataflash_perror (int err)$/;"	f	typeref:typename:void
dataflash_print_info	drivers/mtd/dataflash.c	/^void dataflash_print_info (void)$/;"	f	typeref:typename:void
dataflash_protect_t	include/dataflash.h	/^} dataflash_protect_t;$/;"	t	typeref:struct:__anona98984760108
dataflash_real_protect	drivers/mtd/dataflash.c	/^int dataflash_real_protect (int flag, unsigned long start_addr,$/;"	f	typeref:typename:int
dataflash_status	drivers/mtd/spi/sf_dataflash.c	/^static inline int dataflash_status(struct spi_slave *spi)$/;"	f	typeref:typename:int	file:
dataflash_waitready	drivers/mtd/spi/sf_dataflash.c	/^static int dataflash_waitready(struct spi_slave *spi)$/;"	f	typeref:typename:int	file:
datafwsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long datafwsratio0;$/;"	m	struct:ddr_data	typeref:typename:unsigned long
datagiratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long datagiratio0;$/;"	m	struct:ddr_data	typeref:typename:unsigned long
datain	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int datain;		\/* 0x38 *\/$/;"	m	struct:gpio	typeref:typename:unsigned int
datalen	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t datalen;$/;"	m	struct:cmd_debugfs_dumpdir_request	typeref:typename:uint32_t
datalen	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t datalen;$/;"	m	struct:cmd_debugfs_fileop_request	typeref:typename:uint32_t
datalen	include/bedbug/ppc.h	/^  int			datalen;$/;"	m	struct:ppc_ctx	typeref:typename:int
datalen	include/scsi.h	/^	unsigned long		datalen;					\/* Total data length	*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned long
datalength	drivers/mmc/arm_pl180_mmci.h	/^	u32 datalength;		\/* 0x28*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
datamask_en	drivers/video/ipu.h	/^	unsigned datamask_en:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
dataprepid	disk/part_iso.h	/^	char					dataprepid[128]; \/* data preparer identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[128]
dataprepid	disk/part_iso.h	/^	char					dataprepid[128]; \/* data preparer identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[128]
datarate_mhz_high	board/freescale/b4860qds/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/corenet_ds/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/ls1021aqds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls1043aqds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls1043ardb/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls1046aqds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls1046ardb/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls2080a/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls2080aqds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/ls2080ardb/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/mpc8349emds/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/mpc8572ds/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/mpc8641hpcn/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/p1022ds/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/p2041rdb/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/t102xqds/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/t102xrdb/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/freescale/t1040qds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/t104xrdb/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/t208xqds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/t208xrdb/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/t4qds/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/freescale/t4rdb/ddr.h	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
datarate_mhz_high	board/varisys/cyrus/ddr.c	/^	u32 datarate_mhz_high;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
datarate_mhz_high	board/xes/xpedite517x/ddr.c	/^	uint16_t datarate_mhz_high;$/;"	m	struct:board_memctl_options	typeref:typename:uint16_t	file:
datarate_mhz_high	board/xes/xpedite537x/ddr.c	/^	uint16_t datarate_mhz_high;$/;"	m	struct:board_memctl_options	typeref:typename:uint16_t	file:
datarate_mhz_high	board/xes/xpedite550x/ddr.c	/^	unsigned short datarate_mhz_high;$/;"	m	struct:__anon6cdf34da0108	typeref:typename:unsigned short	file:
datarate_mhz_low	board/xes/xpedite517x/ddr.c	/^	uint16_t datarate_mhz_low;$/;"	m	struct:board_memctl_options	typeref:typename:uint16_t	file:
datarate_mhz_low	board/xes/xpedite537x/ddr.c	/^	uint16_t datarate_mhz_low;$/;"	m	struct:board_memctl_options	typeref:typename:uint16_t	file:
datarate_mhz_low	board/xes/xpedite550x/ddr.c	/^	unsigned short datarate_mhz_low;$/;"	m	struct:__anon6cdf34da0108	typeref:typename:unsigned short	file:
datardsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long datardsratio0;$/;"	m	struct:ddr_data	typeref:typename:unsigned long
datasize	drivers/mmc/mxcmmc.c	/^	unsigned int		datasize;$/;"	m	struct:mxcmci_host	typeref:typename:unsigned int	file:
datatimer	drivers/mmc/arm_pl180_mmci.h	/^	u32 datatimer;		\/* 0x24*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
dataw	include/ddr_spd.h	/^	unsigned char dataw;       \/*  6 Module Data Width *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dataw_lsb	include/ddr_spd.h	/^	unsigned char dataw_lsb;   \/*  6 Data Width of this assembly *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
dataw_lsb	include/spd.h	/^	unsigned char dataw_lsb;   \/*  6 Data Width of this assembly *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
dataw_msb	include/ddr_spd.h	/^	unsigned char dataw_msb;   \/*  7 ... Data Width continuation *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
dataw_msb	include/spd.h	/^	unsigned char dataw_msb;   \/*  7 ... Data Width continuation *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
datawdsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long datawdsratio0;$/;"	m	struct:ddr_data	typeref:typename:unsigned long
datawiratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long datawiratio0;$/;"	m	struct:ddr_data	typeref:typename:unsigned long
datawrsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned long datawrsratio0;$/;"	m	struct:ddr_data	typeref:typename:unsigned long
datbuf	include/linux/mtd/mtd.h	/^	uint8_t		*datbuf;$/;"	m	struct:mtd_oob_ops	typeref:typename:uint8_t *
date	board/freescale/common/sys_eeprom.c	/^	u8 date[6];       \/* 0x12 - 0x17 Build Date *\/$/;"	m	struct:eeprom	typeref:typename:u8[6]	file:
date	board/freescale/common/sys_eeprom.c	/^	u8 date[6];       \/* 0x15 - 0x1a Build Date *\/$/;"	m	struct:eeprom	typeref:typename:u8[6]	file:
date	board/varisys/common/sys_eeprom.c	/^	u8 date[6];       \/* 0x15 - 0x1a Build Date *\/$/;"	m	struct:eeprom	typeref:typename:u8[6]	file:
date	drivers/rtc/ds1302.c	/^	unsigned char date:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
date	drivers/rtc/mvrtc.h	/^	u32 date;$/;"	m	struct:mvrtc_registers	typeref:typename:u32
date	include/fat.h	/^	__u16	time,date,start;\/* Time, date and first cluster *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
date10	drivers/rtc/ds1302.c	/^	unsigned char date10:2;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:2	file:
date_code	arch/x86/cpu/intel_common/microcode.c	/^	uint date_code;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
date_code	include/linux/mtd/nand.h	/^	__le16 date_code;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
datport	drivers/mmc/fsl_esdhc.c	/^	uint    datport;	\/* Buffer data port register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
datr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	datr;		\/* DMA destination attributes register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
datto	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 datto;		\/* 0x25c *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
datx	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	} datx[4];$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:struct:sunxi_mctl_ctl_reg::__anonfa89721f0108[4]
datx	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	} datx[4];$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108[4]
datx8	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	struct rk3288_ddr_publ_datx datx8[4];$/;"	m	struct:rk3288_ddr_publ	typeref:struct:rk3288_ddr_publ_datx[4]
davinci_aintc_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_aintc_regs /;"	d
davinci_aintc_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^struct davinci_aintc_regs {$/;"	s
davinci_arm_clk_get	arch/arm/mach-davinci/cpu.c	/^unsigned int davinci_arm_clk_get()$/;"	f	typeref:typename:unsigned int
davinci_clk_get	arch/arm/mach-davinci/cpu.c	/^unsigned int davinci_clk_get(unsigned int div)$/;"	f	typeref:typename:unsigned int
davinci_clk_ids	arch/arm/mach-davinci/include/mach/hardware.h	/^enum davinci_clk_ids {$/;"	g
davinci_configure_pin_mux	arch/arm/mach-davinci/pinmux.c	/^int davinci_configure_pin_mux(const struct pinmux_config *pins,$/;"	f	typeref:typename:int
davinci_configure_pin_mux	drivers/gpio/da8xx_gpio.c	/^#define davinci_configure_pin_mux(/;"	d	file:
davinci_configure_pin_mux_items	arch/arm/mach-davinci/pinmux.c	/^int davinci_configure_pin_mux_items(const struct pinmux_resource *item,$/;"	f	typeref:typename:int
davinci_emac_3517_get_macid	drivers/net/cpsw-common.c	/^static int davinci_emac_3517_get_macid(struct udevice *dev, u16 offset,$/;"	f	typeref:typename:int	file:
davinci_emac_initialize	drivers/net/davinci_emac.c	/^int davinci_emac_initialize(void)$/;"	f	typeref:typename:int
davinci_emac_mii_mode_sel	arch/arm/mach-davinci/misc.c	/^void davinci_emac_mii_mode_sel(int mode_sel)$/;"	f	typeref:typename:void
davinci_emif_regs	arch/arm/include/asm/ti-common/davinci_nand.h	/^#define davinci_emif_regs /;"	d
davinci_emif_regs	arch/arm/include/asm/ti-common/davinci_nand.h	/^struct davinci_emif_regs {$/;"	s
davinci_enable_emac	arch/arm/mach-davinci/dm644x.c	/^void davinci_enable_emac(void)$/;"	f	typeref:typename:void
davinci_enable_emac	arch/arm/mach-davinci/dm646x.c	/^void davinci_enable_emac(void)$/;"	f	typeref:typename:void
davinci_enable_i2c	arch/arm/mach-davinci/dm355.c	/^void davinci_enable_i2c(void)$/;"	f	typeref:typename:void
davinci_enable_i2c	arch/arm/mach-davinci/dm365.c	/^void davinci_enable_i2c(void)$/;"	f	typeref:typename:void
davinci_enable_i2c	arch/arm/mach-davinci/dm644x.c	/^void davinci_enable_i2c(void)$/;"	f	typeref:typename:void
davinci_enable_i2c	arch/arm/mach-davinci/dm646x.c	/^void davinci_enable_i2c(void)$/;"	f	typeref:typename:void
davinci_enable_uart0	arch/arm/mach-davinci/da850_lowlevel.c	/^void davinci_enable_uart0(void)$/;"	f	typeref:typename:void
davinci_enable_uart0	arch/arm/mach-davinci/dm355.c	/^void davinci_enable_uart0(void)$/;"	f	typeref:typename:void
davinci_enable_uart0	arch/arm/mach-davinci/dm365.c	/^void davinci_enable_uart0(void)$/;"	f	typeref:typename:void
davinci_enable_uart0	arch/arm/mach-davinci/dm644x.c	/^void davinci_enable_uart0(void)$/;"	f	typeref:typename:void
davinci_enable_uart0	arch/arm/mach-davinci/dm646x.c	/^void davinci_enable_uart0(void)$/;"	f	typeref:typename:void
davinci_errata_workarounds	arch/arm/mach-davinci/dm644x.c	/^void davinci_errata_workarounds(void)$/;"	f	typeref:typename:void
davinci_eth_ch_teardown	drivers/net/davinci_emac.c	/^static void davinci_eth_ch_teardown(int ch)$/;"	f	typeref:typename:void	file:
davinci_eth_close	drivers/net/davinci_emac.c	/^static void davinci_eth_close(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
davinci_eth_gigabit_enable	drivers/net/davinci_emac.c	/^static void  __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr)$/;"	f	typeref:typename:void	file:
davinci_eth_mdio_enable	drivers/net/davinci_emac.c	/^static void davinci_eth_mdio_enable(void)$/;"	f	typeref:typename:void	file:
davinci_eth_open	drivers/net/davinci_emac.c	/^static int davinci_eth_open(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
davinci_eth_phy_detect	drivers/net/davinci_emac.c	/^static int davinci_eth_phy_detect(void)$/;"	f	typeref:typename:int	file:
davinci_eth_phy_read	drivers/net/davinci_emac.c	/^int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data)$/;"	f	typeref:typename:int
davinci_eth_phy_write	drivers/net/davinci_emac.c	/^int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data)$/;"	f	typeref:typename:int
davinci_eth_rcv_packet	drivers/net/davinci_emac.c	/^static int davinci_eth_rcv_packet (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
davinci_eth_send_packet	drivers/net/davinci_emac.c	/^static int davinci_eth_send_packet (struct eth_device *dev,$/;"	f	typeref:typename:int	file:
davinci_eth_set_mac_addr	drivers/net/davinci_emac.c	/^static int davinci_eth_set_mac_addr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
davinci_get_base	drivers/i2c/davinci_i2c.c	/^static struct i2c_regs *davinci_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:i2c_regs *	file:
davinci_gpio	arch/arm/mach-davinci/include/mach/gpio.h	/^struct davinci_gpio {$/;"	s
davinci_gpio_bank	arch/arm/mach-davinci/include/mach/gpio.h	/^struct davinci_gpio_bank {$/;"	s
davinci_gpio_bank01	arch/arm/mach-davinci/include/mach/gpio.h	/^#define davinci_gpio_bank01 /;"	d
davinci_gpio_bank23	arch/arm/mach-davinci/include/mach/gpio.h	/^#define davinci_gpio_bank23 /;"	d
davinci_gpio_bank45	arch/arm/mach-davinci/include/mach/gpio.h	/^#define davinci_gpio_bank45 /;"	d
davinci_gpio_bank67	arch/arm/mach-davinci/include/mach/gpio.h	/^#define davinci_gpio_bank67 /;"	d
davinci_gpio_bank8	arch/arm/mach-davinci/include/mach/gpio.h	/^#define davinci_gpio_bank8 /;"	d
davinci_hw_watchdog_enable	arch/arm/mach-davinci/timer.c	/^void davinci_hw_watchdog_enable(void)$/;"	f	typeref:typename:void
davinci_hw_watchdog_reset	arch/arm/mach-davinci/timer.c	/^void davinci_hw_watchdog_reset(void)$/;"	f	typeref:typename:void
davinci_i2c_init	drivers/i2c/davinci_i2c.c	/^static void davinci_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
davinci_i2c_probe	drivers/i2c/davinci_i2c.c	/^static int davinci_i2c_probe(struct i2c_adapter *adap, uint8_t chip)$/;"	f	typeref:typename:int	file:
davinci_i2c_read	drivers/i2c/davinci_i2c.c	/^static int davinci_i2c_read(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
davinci_i2c_setspeed	drivers/i2c/davinci_i2c.c	/^static uint davinci_i2c_setspeed(struct i2c_adapter *adap, uint speed)$/;"	f	typeref:typename:uint	file:
davinci_i2c_write	drivers/i2c/davinci_i2c.c	/^static int davinci_i2c_write(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
davinci_mdio	arch/arm/dts/am33xx.dtsi	/^			davinci_mdio: mdio@4a101000 {$/;"	l	label:mac
davinci_mdio	arch/arm/dts/am4372.dtsi	/^			davinci_mdio: mdio@4a101000 {$/;"	l	label:mac
davinci_mdio	arch/arm/dts/dra7.dtsi	/^			davinci_mdio: mdio@48485000 {$/;"	l	label:mac
davinci_mdio_default	arch/arm/dts/am335x-bone-common.dtsi	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am335x-draco.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am335x-evm.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am335x-evmsk.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am335x-icev2.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am335x-pxm2.dtsi	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am335x-rut.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am437x-gp-evm.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am437x-idk-evm.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am437x-sk-evm.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/am43x-epos-evm.dts	/^		davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_default	arch/arm/dts/dra7-evm.dts	/^	davinci_mdio_default: davinci_mdio_default {$/;"	l
davinci_mdio_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	davinci_mdio_pins_default: davinci_mdio_pins_default {$/;"	l
davinci_mdio_pins_sleep	arch/arm/dts/am57xx-beagle-x15.dts	/^	davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-bone-common.dtsi	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-draco.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-evm.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-evmsk.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-icev2.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-pxm2.dtsi	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am335x-rut.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am437x-gp-evm.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am437x-idk-evm.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am437x-sk-evm.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/am43x-epos-evm.dts	/^		davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mdio_sleep	arch/arm/dts/dra7-evm.dts	/^	davinci_mdio_sleep: davinci_mdio_sleep {$/;"	l
davinci_mii_phy_read	drivers/net/davinci_emac.c	/^static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
davinci_mii_phy_write	drivers/net/davinci_emac.c	/^static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
davinci_mmc	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^struct davinci_mmc {$/;"	s
davinci_mmc_init	drivers/mmc/davinci_mmc.c	/^int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)$/;"	f	typeref:typename:int
davinci_mmc_regs	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^struct davinci_mmc_regs {$/;"	s
davinci_nand_init	drivers/mtd/nand/davinci_nand.c	/^void davinci_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:void
davinci_ofdata_to_platadata	drivers/spi/davinci_spi.c	/^static int davinci_ofdata_to_platadata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
davinci_pllc0_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_pllc0_regs /;"	d
davinci_pllc1_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_pllc1_regs /;"	d
davinci_pllc_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^struct davinci_pllc_regs {$/;"	s
davinci_psc0_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_psc0_regs /;"	d
davinci_psc1_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_psc1_regs /;"	d
davinci_psc_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^struct davinci_psc_regs {$/;"	s
davinci_rtc	arch/arm/include/asm/davinci_rtc.h	/^struct davinci_rtc {$/;"	s
davinci_spi_claim_bus	drivers/spi/davinci_spi.c	/^static int davinci_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
davinci_spi_ids	drivers/spi/davinci_spi.c	/^static const struct udevice_id davinci_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
davinci_spi_ops	drivers/spi/davinci_spi.c	/^static const struct dm_spi_ops davinci_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
davinci_spi_probe	drivers/spi/davinci_spi.c	/^static int davinci_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
davinci_spi_read	drivers/spi/davinci_spi.c	/^static int davinci_spi_read(struct davinci_spi_slave *ds, unsigned int len,$/;"	f	typeref:typename:int	file:
davinci_spi_read_write	drivers/spi/davinci_spi.c	/^static int davinci_spi_read_write(struct davinci_spi_slave *ds, unsigned$/;"	f	typeref:typename:int	file:
davinci_spi_regs	drivers/spi/davinci_spi.c	/^struct davinci_spi_regs {$/;"	s	file:
davinci_spi_release_bus	drivers/spi/davinci_spi.c	/^static int davinci_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
davinci_spi_set_mode	drivers/spi/davinci_spi.c	/^static int davinci_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
davinci_spi_set_speed	drivers/spi/davinci_spi.c	/^static int davinci_spi_set_speed(struct udevice *bus, uint max_hz)$/;"	f	typeref:typename:int	file:
davinci_spi_slave	drivers/spi/davinci_spi.c	/^struct davinci_spi_slave {$/;"	s	file:
davinci_spi_write	drivers/spi/davinci_spi.c	/^static int davinci_spi_write(struct davinci_spi_slave *ds, unsigned int len,$/;"	f	typeref:typename:int	file:
davinci_spi_xfer	drivers/spi/davinci_spi.c	/^static int davinci_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
davinci_spi_xfer_data	drivers/spi/davinci_spi.c	/^static inline u32 davinci_spi_xfer_data(struct davinci_spi_slave *ds, u32 data)$/;"	f	typeref:typename:u32	file:
davinci_sync_env_enetaddr	arch/arm/mach-davinci/misc.c	/^void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)$/;"	f	typeref:typename:void
davinci_syscfg1_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_syscfg1_regs /;"	d
davinci_syscfg1_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^struct davinci_syscfg1_regs {$/;"	s
davinci_syscfg_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_syscfg_regs /;"	d
davinci_syscfg_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^struct davinci_syscfg_regs {$/;"	s
davinci_timer	arch/arm/mach-davinci/include/mach/timer_defs.h	/^struct davinci_timer {$/;"	s
davinci_uart0_ctrl_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_uart0_ctrl_regs /;"	d
davinci_uart1_ctrl_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_uart1_ctrl_regs /;"	d
davinci_uart2_ctrl_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^#define davinci_uart2_ctrl_regs /;"	d
davinci_uart_ctrl_regs	arch/arm/mach-davinci/include/mach/hardware.h	/^struct davinci_uart_ctrl_regs {$/;"	s
davinci_usb_regs	drivers/usb/musb/davinci.h	/^struct davinci_usb_regs {$/;"	s
day	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	day;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
day	drivers/rtc/ds1302.c	/^	unsigned char day:3;		\/* day of week *\/$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:3	file:
day	drivers/rtc/ftrtc010.c	/^	unsigned int day;		\/* 0x0c *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
day	include/efi.h	/^	u8 day;$/;"	m	struct:efi_time	typeref:typename:u8
day_alrm	arch/x86/include/asm/acpi_table.h	/^	u8 day_alrm;$/;"	m	struct:acpi_fadt	typeref:typename:u8
day_name	include/linux/time.h	/^    static _CONST char day_name[7][3] = {$/;"	v	typeref:typename:_CONST char[7][3]
dayalarm	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 dayalarm;$/;"	m	struct:rtc_regs	typeref:typename:u32
daylight	include/efi.h	/^	u8 daylight;$/;"	m	struct:efi_time	typeref:typename:u8
dayr	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 dayr;$/;"	m	struct:rtc_regs	typeref:typename:u32
days	arch/m68k/include/asm/rtc.h	/^	u32 days;		\/* 0x20 Days Counter Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
days	include/linux/time.h	/^    long days, rem;$/;"	m	struct:_DEFUN	typeref:typename:long
days_in_month	drivers/rtc/date.c	/^#define	days_in_month(/;"	d	file:
days_in_year	drivers/rtc/date.c	/^#define	days_in_year(/;"	d	file:
db	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t db;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
db2xtemplate	doc/DocBook/Makefile	/^db2xtemplate = db2TYPE -o $(dir $@) $<$/;"	m
db78X60amc_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG db78X60amc_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
db78X60pcac_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG db78X60pcac_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
db78X60pcacrev2_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG db78X60pcacrev2_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
db8500_gpio_config_pins	drivers/gpio/db8500_gpio.c	/^void db8500_gpio_config_pins(unsigned long *cfgs, size_t num)$/;"	f	typeref:typename:void
db8500_gpio_get_input	drivers/gpio/db8500_gpio.c	/^int db8500_gpio_get_input(unsigned gpio)$/;"	f	typeref:typename:int
db8500_gpio_make_input	drivers/gpio/db8500_gpio.c	/^void db8500_gpio_make_input(unsigned gpio)$/;"	f	typeref:typename:void
db8500_gpio_make_output	drivers/gpio/db8500_gpio.c	/^void db8500_gpio_make_output(unsigned gpio, int val)$/;"	f	typeref:typename:void
db8500_gpio_set_output	drivers/gpio/db8500_gpio.c	/^void db8500_gpio_set_output(unsigned gpio, int val)$/;"	f	typeref:typename:void
db8500_gpio_set_pull	drivers/gpio/db8500_gpio.c	/^void db8500_gpio_set_pull(unsigned gpio, enum db8500_gpio_pull pull)$/;"	f	typeref:typename:void
db88f78xx0_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG db88f78xx0_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
db88f78xx0rev2_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG db88f78xx0rev2_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
db88f78xx0rev2_twsi_dev	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^u8 db88f78xx0rev2_twsi_dev[] = { 0x4C, 0x4D, 0x4E, 0x4F };$/;"	v	typeref:typename:u8[]
db_base	drivers/mailbox/tegra-hsp.c	/^	uint32_t db_base;$/;"	m	struct:tegra_hsp	typeref:typename:uint32_t	file:
dba	drivers/block/fsl_sata.h	/^	__le32 dba;	\/* Data base address, 4 bytes aligned *\/$/;"	m	struct:prd_entry	typeref:typename:__le32
dba	drivers/usb/host/xhci.h	/^	struct xhci_doorbell_array *dba;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_doorbell_array *
dbacen	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbacen;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbacen	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbacen;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbadj0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbadj0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbadj0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbadj0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbadj1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbadj1;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbadj2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbadj2;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbadj2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbadj2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbamr	include/linux/immap_qe.h	/^	u32 dbamr;$/;"	m	struct:rsp	typeref:typename:u32
dbar	include/linux/immap_qe.h	/^	u32 dbar;$/;"	m	struct:rsp	typeref:typename:u32
dbau1x00 board options	board/dbau1x00/Kconfig	/^menu "dbau1x00 board options"$/;"	m
dbbl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbbl;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbbl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbbl;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbbs0cnt0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbbs0cnt0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbbs0cnt1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbbs0cnt1;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbbs0cnt1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbbs0cnt1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbbt_search_area_start_address	tools/mxsboot.c	/^	uint32_t		dbbt_search_area_start_address;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
dbcalcnf	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbcalcnf;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbcalcnf	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbcalcnf;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbcaltr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbcaltr;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbcaltr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbcaltr;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbcmd	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbcmd;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbcmd	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbcmd;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbcnr	include/linux/immap_qe.h	/^	u32 dbcnr;$/;"	m	struct:rsp	typeref:typename:u32
dbconf0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbconf0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbconf0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbconf0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    dbcr;           \/* 0x1008 - MCM MPX data bus Configuration Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
dbcr	include/linux/immap_qe.h	/^	u32 dbcr;$/;"	m	struct:rsp	typeref:typename:u32
dbctl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short dbctl;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
dbctrl	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	dbctrl;$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32
dbdficnt	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbdficnt;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbdficnt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbdficnt;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbdfistat	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbdfistat;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbdfistat	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbdfistat;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbdmr_h	include/linux/immap_qe.h	/^	u32 dbdmr_h;$/;"	m	struct:rsp	typeref:typename:u32
dbdmr_l	include/linux/immap_qe.h	/^	u32 dbdmr_l;$/;"	m	struct:rsp	typeref:typename:u32
dbdr_h	include/linux/immap_qe.h	/^	u32 dbdr_h;$/;"	m	struct:rsp	typeref:typename:u32
dbdr_l	include/linux/immap_qe.h	/^	u32 dbdr_l;$/;"	m	struct:rsp	typeref:typename:u32
dbe_count	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dbe_count;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dbeccarea0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccarea0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccarea1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccarea1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccarea2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccarea2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccarea3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccarea3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccintdetect	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccintdetect;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccintenable	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccintenable;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccmode	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccmode;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbeccmodulcnt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbeccmodulcnt;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbell	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_dbell	dbell;$/;"	m	struct:ccsr_rio	typeref:struct:rio_dbell
dbfed	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short dbfed;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
dbg	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define dbg(/;"	d	file:
dbg	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define dbg(/;"	d	file:
dbg	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define dbg(/;"	d	file:
dbg	drivers/mtd/nand/fsl_elbc_nand.c	/^#define dbg(/;"	d	file:
dbg	drivers/mtd/ubi/ubi.h	/^	struct ubi_debug_info dbg;$/;"	m	struct:ubi_device	typeref:struct:ubi_debug_info
dbg	drivers/usb/host/ohci-hcd.c	/^#define dbg(/;"	d	file:
dbg	drivers/usb/host/ohci-s3c24xx.c	/^#define dbg(/;"	d	file:
dbg	examples/standalone/sched.c	/^static uchar dbg = 0;$/;"	v	typeref:typename:uchar	file:
dbg	fs/ubifs/ubifs.h	/^	struct ubifs_debug_info *dbg;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_debug_info *
dbg	include/fsl_usb.h	/^	u32	dbg;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
dbg	include/linux/immap_qe.h	/^	dbg_t dbg;		\/* Debug Space *\/$/;"	m	struct:qe_immap	typeref:typename:dbg_t
dbg	include/linux/immap_qe.h	/^typedef struct dbg {$/;"	s
dbg	lib/bch.c	/^#define dbg(/;"	d	file:
dbgFecRegs	drivers/net/mcffec.c	/^void dbgFecRegs(struct eth_device *dev)$/;"	f	typeref:typename:void
dbg_apb_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	smc_aper_clk, swdt_clk, dbg_trc_clk, dbg_apb_clk, clk_max};$/;"	e	enum:zynq_clk
dbg_at_clk	arch/arm/dts/socfpga.dtsi	/^					dbg_at_clk: dbg_at_clk {$/;"	l
dbg_base_clk	arch/arm/dts/socfpga.dtsi	/^						dbg_base_clk: dbg_base_clk {$/;"	l	label:main_pll
dbg_bld	drivers/mtd/ubi/debug.h	/^#define dbg_bld(/;"	d
dbg_budg	fs/ubifs/debug.h	/^#define dbg_budg(/;"	d
dbg_check_bud_bytes	fs/ubifs/log.c	/^static int dbg_check_bud_bytes(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
dbg_check_cats	fs/ubifs/lprops.c	/^int dbg_check_cats(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_check_data_nodes_order	fs/ubifs/debug.c	/^int dbg_check_data_nodes_order(struct ubifs_info *c, struct list_head *head)$/;"	f	typeref:typename:int
dbg_check_dir	fs/ubifs/debug.c	/^int dbg_check_dir(struct ubifs_info *c, const struct inode *dir)$/;"	f	typeref:typename:int
dbg_check_filesystem	fs/ubifs/debug.c	/^int dbg_check_filesystem(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_check_heap	fs/ubifs/lprops.c	/^void dbg_check_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap, int cat,$/;"	f	typeref:typename:void
dbg_check_idx_size	fs/ubifs/debug.c	/^int dbg_check_idx_size(struct ubifs_info *c, long long idx_size)$/;"	f	typeref:typename:int
dbg_check_inode_size	fs/ubifs/tnc.c	/^int dbg_check_inode_size(struct ubifs_info *c, const struct inode *inode,$/;"	f	typeref:typename:int
dbg_check_key_order	fs/ubifs/debug.c	/^static int dbg_check_key_order(struct ubifs_info *c, struct ubifs_zbranch *zbr1,$/;"	f	typeref:typename:int	file:
dbg_check_lprops	fs/ubifs/lprops.c	/^int dbg_check_lprops(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_check_lpt_nodes	fs/ubifs/lpt.c	/^int dbg_check_lpt_nodes(struct ubifs_info *c, struct ubifs_cnode *cnode,$/;"	f	typeref:typename:int
dbg_check_ltab	fs/ubifs/lpt_commit.c	/^int dbg_check_ltab(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_check_ltab_lnum	fs/ubifs/lpt_commit.c	/^static int dbg_check_ltab_lnum(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int	file:
dbg_check_nondata_nodes_order	fs/ubifs/debug.c	/^int dbg_check_nondata_nodes_order(struct ubifs_info *c, struct list_head *head)$/;"	f	typeref:typename:int
dbg_check_orphans	fs/ubifs/orphan.c	/^static int dbg_check_orphans(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
dbg_check_space_info	fs/ubifs/debug.c	/^int dbg_check_space_info(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_check_synced_i_size	fs/ubifs/debug.c	/^int dbg_check_synced_i_size(const struct ubifs_info *c, struct inode *inode)$/;"	f	typeref:typename:int
dbg_check_tnc	fs/ubifs/debug.c	/^int dbg_check_tnc(struct ubifs_info *c, int extra)$/;"	f	typeref:typename:int
dbg_check_znode	fs/ubifs/debug.c	/^static int dbg_check_znode(struct ubifs_info *c, struct ubifs_zbranch *zbr)$/;"	f	typeref:typename:int	file:
dbg_chk_lpt_free_spc	fs/ubifs/lpt_commit.c	/^int dbg_chk_lpt_free_spc(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_chk_lpt_sz	fs/ubifs/lpt_commit.c	/^int dbg_chk_lpt_sz(struct ubifs_info *c, int action, int len)$/;"	f	typeref:typename:int
dbg_chk_pnode	fs/ubifs/lpt.c	/^static int dbg_chk_pnode(struct ubifs_info *c, struct ubifs_pnode *pnode,$/;"	f	typeref:typename:int	file:
dbg_clk	arch/arm/dts/socfpga.dtsi	/^					dbg_clk: dbg_clk {$/;"	l
dbg_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 dbg_clk_ctrl; \/* 0x164 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
dbg_clka_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dbg_clka_ck: dbg_clka_ck {$/;"	l
dbg_cmt	fs/ubifs/debug.h	/^#define dbg_cmt(/;"	d
dbg_config	include/linux/usb/xhci-omap.h	/^	u32 dbg_config;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
dbg_cstate	fs/ubifs/debug.c	/^const char *dbg_cstate(int cmt_state)$/;"	f	typeref:typename:const char *
dbg_ctrl1	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 dbg_ctrl1;		\/* 0x1e4 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
dbg_ctrl1	arch/arm/include/asm/arch/cpucfg.h	/^	u32 dbg_ctrl1;		\/* 0x1e4 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
dbg_data	include/linux/usb/xhci-omap.h	/^	u32 dbg_data;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
dbg_debugfs_exit	fs/ubifs/debug.c	/^void dbg_debugfs_exit(void)$/;"	f	typeref:typename:void
dbg_debugfs_exit_fs	fs/ubifs/debug.c	/^void dbg_debugfs_exit_fs(struct ubifs_info *c)$/;"	f	typeref:typename:void
dbg_debugfs_init	fs/ubifs/debug.c	/^int dbg_debugfs_init(void)$/;"	f	typeref:typename:int
dbg_debugfs_init_fs	fs/ubifs/debug.c	/^int dbg_debugfs_init_fs(struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_eba	drivers/mtd/ubi/debug.h	/^#define dbg_eba(/;"	d
dbg_ep0	drivers/usb/gadget/ep0.c	/^#define dbg_ep0(/;"	d	file:
dbg_fec_regs	drivers/net/fsl_mcdmafec.c	/^static void dbg_fec_regs(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dbg_find	fs/ubifs/debug.h	/^#define dbg_find(/;"	d
dbg_find_check_orphan	fs/ubifs/orphan.c	/^static int dbg_find_check_orphan(struct rb_root *root, ino_t inum)$/;"	f	typeref:typename:int	file:
dbg_find_orphan	fs/ubifs/orphan.c	/^static int dbg_find_orphan(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:typename:int	file:
dbg_free_check_tree	fs/ubifs/orphan.c	/^static void dbg_free_check_tree(struct rb_root *root)$/;"	f	typeref:typename:void	file:
dbg_gc	fs/ubifs/debug.h	/^#define dbg_gc(/;"	d
dbg_gen	drivers/mtd/ubi/debug.h	/^#define dbg_gen(/;"	d
dbg_gen	fs/ubifs/debug.h	/^#define dbg_gen(/;"	d
dbg_gtype	fs/ubifs/debug.c	/^static const char *dbg_gtype(int type)$/;"	f	typeref:typename:const char *	file:
dbg_ins_check_orphan	fs/ubifs/orphan.c	/^static int dbg_ins_check_orphan(struct rb_root *root, ino_t inum)$/;"	f	typeref:typename:int	file:
dbg_io	drivers/mtd/ubi/debug.h	/^#define dbg_io(/;"	d
dbg_io	fs/ubifs/debug.h	/^#define dbg_io(/;"	d
dbg_is_all_ff	fs/ubifs/lpt_commit.c	/^static int dbg_is_all_ff(uint8_t *buf, int len)$/;"	f	typeref:typename:int	file:
dbg_is_chk_fs	fs/ubifs/debug.h	/^static inline int dbg_is_chk_fs(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_is_chk_gen	fs/ubifs/debug.h	/^static inline int dbg_is_chk_gen(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_is_chk_index	fs/ubifs/debug.h	/^static inline int dbg_is_chk_index(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_is_chk_lprops	fs/ubifs/debug.h	/^static inline int dbg_is_chk_lprops(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_is_chk_orph	fs/ubifs/debug.h	/^static inline int dbg_is_chk_orph(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_is_lsave_dirty	fs/ubifs/lpt_commit.c	/^static int dbg_is_lsave_dirty(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
dbg_is_ltab_dirty	fs/ubifs/lpt_commit.c	/^static int dbg_is_ltab_dirty(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
dbg_is_nnode_dirty	fs/ubifs/lpt_commit.c	/^static int dbg_is_nnode_dirty(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
dbg_is_node_dirty	fs/ubifs/lpt_commit.c	/^static int dbg_is_node_dirty(struct ubifs_info *c, int node_type, int lnum,$/;"	f	typeref:typename:int	file:
dbg_is_pnode_dirty	fs/ubifs/lpt_commit.c	/^static int dbg_is_pnode_dirty(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
dbg_is_power_cut	fs/ubifs/debug.h	/^static inline int dbg_is_power_cut(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_is_tst_rcvry	fs/ubifs/debug.h	/^static inline int dbg_is_tst_rcvry(const struct ubifs_info *c)$/;"	f	typeref:typename:int
dbg_jhead	fs/ubifs/debug.c	/^const char *dbg_jhead(int jhead)$/;"	f	typeref:typename:const char *
dbg_jnl	fs/ubifs/debug.h	/^#define dbg_jnl(/;"	d
dbg_jnlk	fs/ubifs/debug.h	/^#define dbg_jnlk(/;"	d
dbg_leaf_callback	fs/ubifs/debug.h	/^typedef int (*dbg_leaf_callback)(struct ubifs_info *c,$/;"	t	typeref:typename:int (*)(struct ubifs_info * c,struct ubifs_zbranch * zbr,void * priv)
dbg_leb_change	fs/ubifs/debug.c	/^int dbg_leb_change(struct ubifs_info *c, int lnum, const void *buf,$/;"	f	typeref:typename:int
dbg_leb_map	fs/ubifs/debug.c	/^int dbg_leb_map(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
dbg_leb_unmap	fs/ubifs/debug.c	/^int dbg_leb_unmap(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
dbg_leb_write	fs/ubifs/debug.c	/^int dbg_leb_write(struct ubifs_info *c, int lnum, const void *buf,$/;"	f	typeref:typename:int
dbg_log	fs/ubifs/debug.h	/^#define dbg_log(/;"	d
dbg_lp	fs/ubifs/debug.h	/^#define dbg_lp(/;"	d
dbg_mnt	fs/ubifs/debug.h	/^#define dbg_mnt(/;"	d
dbg_mntk	fs/ubifs/debug.h	/^#define dbg_mntk(/;"	d
dbg_monitor_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct dbg_monitor_regs {$/;"	s
dbg_ntype	fs/ubifs/debug.c	/^const char *dbg_ntype(int type)$/;"	f	typeref:typename:const char *
dbg_orphan_check	fs/ubifs/orphan.c	/^static int dbg_orphan_check(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int	file:
dbg_populate_lsave	fs/ubifs/lpt_commit.c	/^static int dbg_populate_lsave(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
dbg_rcvry	fs/ubifs/debug.h	/^#define dbg_rcvry(/;"	d
dbg_read_orphans	fs/ubifs/orphan.c	/^static int dbg_read_orphans(struct check_info *ci, struct ubifs_scan_leb *sleb)$/;"	f	typeref:typename:int	file:
dbg_save_space_info	fs/ubifs/debug.c	/^void dbg_save_space_info(struct ubifs_info *c)$/;"	f	typeref:typename:void
dbg_scan	fs/ubifs/debug.h	/^#define dbg_scan(/;"	d
dbg_scan_orphans	fs/ubifs/orphan.c	/^static int dbg_scan_orphans(struct ubifs_info *c, struct check_info *ci)$/;"	f	typeref:typename:int	file:
dbg_snprintf_key	fs/ubifs/debug.c	/^const char *dbg_snprintf_key(const struct ubifs_info *c,$/;"	f	typeref:typename:const char *
dbg_summary	fs/jffs2/jffs2_1pass.c	/^#define dbg_summary(/;"	d	file:
dbg_sym_flags	scripts/kconfig/gconf.c	/^const char *dbg_sym_flags(int val)$/;"	f	typeref:typename:const char *
dbg_sysclk_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dbg_sysclk_ck: dbg_sysclk_ck {$/;"	l
dbg_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) dbg_t;$/;"	t	typeref:struct:dbg
dbg_timer_clk	arch/arm/dts/socfpga.dtsi	/^					dbg_timer_clk: dbg_timer_clk {$/;"	l
dbg_tnc	fs/ubifs/debug.h	/^#define dbg_tnc(/;"	d
dbg_tnck	fs/ubifs/debug.h	/^#define dbg_tnck(/;"	d
dbg_trace_clk	arch/arm/dts/socfpga.dtsi	/^					dbg_trace_clk: dbg_trace_clk {$/;"	l
dbg_trc_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	smc_aper_clk, swdt_clk, dbg_trc_clk, dbg_apb_clk, clk_max};$/;"	e	enum:zynq_clk
dbg_walk_index	fs/ubifs/debug.c	/^int dbg_walk_index(struct ubifs_info *c, dbg_leaf_callback leaf_cb,$/;"	f	typeref:typename:int
dbg_wl	drivers/mtd/ubi/debug.h	/^#define dbg_wl(/;"	d
dbg_znode_callback	fs/ubifs/debug.h	/^typedef int (*dbg_znode_callback)(struct ubifs_info *c,$/;"	t	typeref:typename:int (*)(struct ubifs_info * c,struct ubifs_znode * znode,void * priv)
dbgatclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	dbgatclk;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
dbgatclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t dbgatclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
dbgc	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 dbgc;		\/* 0x50 debug enable *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
dbgc	arch/arm/include/asm/arch/mmc.h	/^	u32 dbgc;		\/* 0x50 debug enable *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
dbgcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dbgcfg;		\/* 0xA0: APB_MISC_GP_DBGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dbgcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dbgcfg;		\/* 0xA0: APB_MISC_GP_DBGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dbgcfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	dbgcfg;		\/* 0x94: APB_MISC_GP_DBGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dbgcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dbgcfg;		\/* 0xA0: APB_MISC_GP_DBGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dbgcfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	dbgcfg;		\/* 0xA0: APB_MISC_GP_DBGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dbgcr;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dbgcr1;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dbgcr1;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dbgcr1;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgcr1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dbgcr1;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
dbgdiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	dbgdiv;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
dbgdiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t dbgdiv;$/;"	m	struct:cm_config	typeref:typename:uint32_t
dbgu	arch/arm/dts/at91sam9260-smartweb.dts	/^			dbgu: serial@fffff200 {$/;"	l
dbgu	arch/arm/dts/at91sam9260.dtsi	/^			dbgu: serial@fffff200 {$/;"	l
dbgu	arch/arm/dts/at91sam9261.dtsi	/^			dbgu: serial@fffff200 {$/;"	l
dbgu	arch/arm/dts/at91sam9263.dtsi	/^			dbgu: serial@ffffee00 {$/;"	l
dbgu	arch/arm/dts/at91sam9g20-taurus.dts	/^			dbgu: serial@fffff200 {$/;"	l
dbgu	arch/arm/dts/at91sam9g45-corvus.dts	/^			dbgu: serial@ffffee00 {$/;"	l
dbgu	arch/arm/dts/at91sam9g45-gurnard.dts	/^			dbgu: serial@ffffee00 {$/;"	l
dbgu	arch/arm/dts/at91sam9g45.dtsi	/^			dbgu: serial@ffffee00 {$/;"	l
dbi	drivers/pci/pcie_layerscape.c	/^	void __iomem *dbi;$/;"	m	struct:ls_pcie	typeref:typename:void __iomem *	file:
dbkind	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbkind;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbkind	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbkind;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dblac	drivers/net/ftgmac100.h	/^	unsigned int	dblac;		\/* 0x38 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
dblac	drivers/net/ftmac100.h	/^	unsigned int	dblac;		\/* 0x30 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
dblac	drivers/net/ftmac110.h	/^	uint32_t dblac;  \/* 0x30: DMA Burst Length&Arbitration Control *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
dblgcnt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dblgcnt;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dblgqon	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dblgqon;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbmrrdr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbmrrdr;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbpccr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpccr;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpdlck	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpdlck;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpdncnf	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbpdncnf;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbpdncnf	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpdncnf;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpdrga	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpdrga;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpdrgd	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpdrgd;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpeier	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpeier;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpeisr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpeisr;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbphytype	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbphytype;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbphytype	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbphytype;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpwear0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpwear0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpwear1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpwear1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpwear2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpwear2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpwear3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpwear3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweid0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweid0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweid1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweid1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweid2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweid2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweid3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweid3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweinfo0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweinfo0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweinfo1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweinfo1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweinfo2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweinfo2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbpweinfo3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbpweinfo3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreblane0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreblane0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreblane1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreblane1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreblane2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreblane2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreblane3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreblane3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbred	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short dbred;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
dbreradr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreradr0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreradr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreradr1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreradr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreradr2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbreradr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbreradr3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerid0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerid0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerid1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerid1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerid2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerid2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerid3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerid3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerinfo0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerinfo0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerinfo1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerinfo1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerinfo2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerinfo2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrerinfo3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrerinfo3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrfcnf0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbrfcnf0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbrfcnf0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrfcnf0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrfcnf1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbrfcnf1;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbrfcnf1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrfcnf1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrfcnf2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbrfcnf2;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbrfcnf2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrfcnf2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrfcnf3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbrfcnf3;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbrfen	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbrfen;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbrfen	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrfen;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrnk0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbrnk0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbrnk0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrnk0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbrqctr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbrqctr;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbsc3_0_r_qos_addr	board/renesas/alt/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/blanche/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/gose/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/koelsch/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/lager/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/porter/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/silk/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_r_qos_addr	board/renesas/stout/qos.c	/^static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/alt/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/blanche/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/gose/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/koelsch/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/lager/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/porter/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/silk/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_0_w_qos_addr	board/renesas/stout/qos.c	/^static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_1_r_qos_addr	board/renesas/koelsch/qos.c	/^static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_1_r_qos_addr	board/renesas/porter/qos.c	/^static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_1_w_qos_addr	board/renesas/koelsch/qos.c	/^static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbsc3_1_w_qos_addr	board/renesas/porter/qos.c	/^static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {$/;"	v	typeref:typename:u32[]	file:
dbschecnt0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbschecnt0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbsr	include/linux/immap_qe.h	/^	u32 dbsr;$/;"	m	struct:rsp	typeref:typename:u32
dbstate0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbstate0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbstate1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbstate1;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbstate1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbstate1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbsvcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbsvcr;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbthres0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbthres0;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbthres1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbthres1;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbthres2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbthres2;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbtmval0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtmval0;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbtmval1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtmval1;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbtmval2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtmval2;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbtmval3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtmval3;$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dbtr0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr1;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr10	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr10;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr10	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr10;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr11	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr11;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr11	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr11;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr12	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr12;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr12	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr12;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr13	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr13;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr13	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr13;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr14	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr14;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr14	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr14;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr15	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr15;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr15	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr15;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr16	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr16;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr16	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr16;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr17	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr17;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr17	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr17;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr18	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr18;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr18	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr18;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr19	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr19;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr19	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr19;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr2;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr3;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr4;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr4;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr5;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr5;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr6	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr6;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr6	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr6;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr7	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr7;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr7;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr8	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr8;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr8;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtr9	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbtr9;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbtr9	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbtr9;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbtsr	drivers/block/sata_dwc.c	/^	u32 dbtsr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
dbuff	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dbuff;$/;"	m	struct:de_glb	typeref:typename:u32
dbuff	arch/arm/include/asm/arch/display2.h	/^	u32 dbuff;$/;"	m	struct:de_glb	typeref:typename:u32
dbug_cnt	drivers/net/dm9000x.c	/^	u16 dbug_cnt;$/;"	m	struct:board_info	typeref:typename:u16	file:
dbureblane0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureblane0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureblane1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureblane1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureblane2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureblane2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureblane3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureblane3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureradr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureradr0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureradr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureradr1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureradr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureradr2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbureradr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbureradr3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerid0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerid0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerid1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerid1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerid2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerid2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerid3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerid3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerinfo0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerinfo0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerinfo1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerinfo1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerinfo2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerinfo2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dburerinfo3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dburerinfo3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbw	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 dbw;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
dbwait	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dbwait;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dbwait	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwait;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwdpesr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwdpesr0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwdpesr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwdpesr1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwdpesr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwdpesr2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwdpesr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwdpesr3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwspesr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwspesr0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwspesr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwspesr1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwspesr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwspesr2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwspesr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwspesr3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwt0cnf0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwt0cnf0;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwt0cnf1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwt0cnf1;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwt0cnf2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwt0cnf2;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwt0cnf3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwt0cnf3;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dbwt0cnf4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dbwt0cnf4;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dc	drivers/net/e1000.h	/^	uint64_t dc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
dc	drivers/spi/ti_qspi.c	/^	u32 dc;$/;"	m	struct:ti_qspi_priv	typeref:typename:u32	file:
dc	drivers/spi/ti_qspi.c	/^	u32 dc;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
dc21x4x_halt	drivers/net/dc2114x.c	/^static void dc21x4x_halt(struct eth_device* dev)$/;"	f	typeref:typename:void	file:
dc21x4x_init	drivers/net/dc2114x.c	/^static int dc21x4x_init(struct eth_device* dev, bd_t* bis)$/;"	f	typeref:typename:int	file:
dc21x4x_initialize	drivers/net/dc2114x.c	/^int dc21x4x_initialize(bd_t *bis)$/;"	f	typeref:typename:int
dc21x4x_recv	drivers/net/dc2114x.c	/^static int dc21x4x_recv(struct eth_device* dev)$/;"	f	typeref:typename:int	file:
dc21x4x_send	drivers/net/dc2114x.c	/^static int dc21x4x_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
dc_block_number	fs/reiserfs/reiserfs_private.h	/^  __u32       dc_block_number;		    \/* Disk child's block number. *\/$/;"	m	struct:disk_child	typeref:typename:__u32
dc_block_number	fs/reiserfs/reiserfs_private.h	/^#define dc_block_number(/;"	d
dc_ch0_1_2	drivers/video/ipu_regs.h	/^	struct ipu_dc_ch dc_ch0_1_2[3];$/;"	m	struct:ipu_dc	typeref:struct:ipu_dc_ch[3]
dc_ch5_6	drivers/video/ipu_regs.h	/^	struct ipu_dc_ch dc_ch5_6[2];$/;"	m	struct:ipu_dc	typeref:struct:ipu_dc_ch[2]
dc_ch8	drivers/video/ipu_regs.h	/^	struct ipu_dc_ch dc_ch8;$/;"	m	struct:ipu_dc	typeref:struct:ipu_dc_ch
dc_ch9	drivers/video/ipu_regs.h	/^	struct ipu_dc_ch dc_ch9;$/;"	m	struct:ipu_dc	typeref:struct:ipu_dc_ch
dc_ch_offset	drivers/video/ipu_regs.h	/^static inline struct ipu_dc_ch *dc_ch_offset(int ch)$/;"	f	typeref:struct:ipu_dc_ch *
dc_cmd_reg	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_cmd_reg {$/;"	s
dc_com_reg	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_com_reg {$/;"	s
dc_ctlr	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_ctlr {$/;"	s
dc_dev	drivers/video/tegra124/dp.c	/^	struct udevice *dc_dev;$/;"	m	struct:tegra_dp_priv	typeref:struct:udevice *	file:
dc_disp_h_pulse_pos	arch/arm/include/asm/arch-tegra/dc.h	/^enum dc_disp_h_pulse_pos {$/;"	g
dc_disp_h_pulse_reg	arch/arm/include/asm/arch-tegra/dc.h	/^enum dc_disp_h_pulse_reg {$/;"	g
dc_disp_pp_select	arch/arm/include/asm/arch-tegra/dc.h	/^enum dc_disp_pp_select {$/;"	g
dc_disp_reg	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_disp_reg {$/;"	s
dc_disp_v_pulse_pos	arch/arm/include/asm/arch-tegra/dc.h	/^enum dc_disp_v_pulse_pos {$/;"	g
dc_map_ptr	drivers/video/ipu_regs.h	/^	u32 dc_map_ptr[15];$/;"	m	struct:ipu_dc	typeref:typename:u32[15]
dc_map_val	drivers/video/ipu_regs.h	/^	u32 dc_map_val[12];$/;"	m	struct:ipu_dc	typeref:typename:u32[12]
dc_mccif_fifoctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint dc_mccif_fifoctrl;		\/* _DISP_DC_MCCIF_FIFOCTRL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
dc_read	arch/powerpc/cpu/mpc86xx/start.S	/^dc_read:$/;"	l
dc_read	arch/powerpc/cpu/mpc8xx/start.S	/^dc_read:$/;"	l
dc_reserved	fs/reiserfs/reiserfs_private.h	/^  __u16       dc_reserved;$/;"	m	struct:disk_child	typeref:typename:__u16
dc_size	fs/reiserfs/reiserfs_private.h	/^  __u16       dc_size;			    \/* Disk child's used space.   *\/$/;"	m	struct:disk_child	typeref:typename:__u16
dc_swap	drivers/video/ipu_disp.c	/^static unsigned char dc_swap;$/;"	v	typeref:typename:unsigned char	file:
dc_value	drivers/power/exynos-tmu.c	/^	int dc_value;$/;"	m	struct:tmu_info	typeref:typename:int	file:
dc_win_reg	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_win_reg {$/;"	s
dc_winbuf_reg	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_winbuf_reg {$/;"	s
dc_winc_filter_p	arch/arm/include/asm/arch-tegra/dc.h	/^enum dc_winc_filter_p {$/;"	g
dc_winc_reg	arch/arm/include/asm/arch-tegra/dc.h	/^struct dc_winc_reg {$/;"	s
dcache_clean_line	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^static inline void dcache_clean_line(volatile void *vaddr)$/;"	f	typeref:typename:void
dcache_clean_range	arch/avr32/cpu/cache.c	/^void dcache_clean_range(volatile void *start, size_t size)$/;"	f	typeref:typename:void
dcache_disable	arch/arc/lib/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/arm/cpu/armv8/cache_v8.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/arm/lib/cache-cp15.c	/^void dcache_disable (void)$/;"	f	typeref:typename:void
dcache_disable	arch/arm/lib/cache-cp15.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/blackfin/lib/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/m68k/lib/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/microblaze/cpu/cache.c	/^void	dcache_disable(void) {$/;"	f	typeref:typename:void
dcache_disable	arch/nds32/lib/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/nios2/lib/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/openrisc/cpu/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/powerpc/cpu/mpc512x/start.S	/^dcache_disable:$/;"	l
dcache_disable	arch/powerpc/cpu/mpc5xx/cpu.c	/^void dcache_disable (void)$/;"	f	typeref:typename:void
dcache_disable	arch/powerpc/cpu/mpc5xxx/start.S	/^dcache_disable:$/;"	l
dcache_disable	arch/powerpc/cpu/mpc8260/start.S	/^dcache_disable:$/;"	l
dcache_disable	arch/powerpc/cpu/mpc83xx/start.S	/^dcache_disable:$/;"	l
dcache_disable	arch/powerpc/cpu/mpc85xx/start.S	/^dcache_disable:$/;"	l
dcache_disable	arch/powerpc/cpu/mpc8xx/start.S	/^dcache_disable:$/;"	l
dcache_disable	arch/powerpc/cpu/ppc4xx/cache.S	/^dcache_disable:$/;"	l
dcache_disable	arch/sh/cpu/sh2/cpu.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/sh/cpu/sh3/cpu.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/sh/cpu/sh4/cpu.c	/^void dcache_disable (void)$/;"	f	typeref:typename:void
dcache_disable	arch/x86/cpu/cpu.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_disable	arch/xtensa/lib/cache.c	/^void dcache_disable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/arc/lib/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/arm/cpu/armv8/cache_v8.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/arm/lib/cache-cp15.c	/^void dcache_enable (void)$/;"	f	typeref:typename:void
dcache_enable	arch/arm/lib/cache-cp15.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/blackfin/lib/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/m68k/lib/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/microblaze/cpu/cache.c	/^void	dcache_enable (void) {$/;"	f	typeref:typename:void
dcache_enable	arch/nds32/lib/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/nios2/lib/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/openrisc/cpu/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/powerpc/cpu/mpc512x/start.S	/^dcache_enable:$/;"	l
dcache_enable	arch/powerpc/cpu/mpc5xx/cpu.c	/^void dcache_enable (void)$/;"	f	typeref:typename:void
dcache_enable	arch/powerpc/cpu/mpc5xxx/start.S	/^dcache_enable:$/;"	l
dcache_enable	arch/powerpc/cpu/mpc8260/start.S	/^dcache_enable:$/;"	l
dcache_enable	arch/powerpc/cpu/mpc83xx/start.S	/^dcache_enable:$/;"	l
dcache_enable	arch/powerpc/cpu/mpc85xx/start.S	/^dcache_enable:$/;"	l
dcache_enable	arch/powerpc/cpu/mpc8xx/start.S	/^dcache_enable:$/;"	l
dcache_enable	arch/powerpc/cpu/ppc4xx/cache.S	/^dcache_enable:$/;"	l
dcache_enable	arch/sh/cpu/sh2/cpu.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/sh/cpu/sh3/cpu.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/sh/cpu/sh4/cpu.c	/^void dcache_enable (void)$/;"	f	typeref:typename:void
dcache_enable	arch/x86/cpu/cpu.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_enable	arch/xtensa/lib/cache.c	/^void dcache_enable(void)$/;"	f	typeref:typename:void
dcache_flush_line	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^static inline void dcache_flush_line(volatile void *vaddr)$/;"	f	typeref:typename:void
dcache_flush_unlocked	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^static inline void dcache_flush_unlocked(void)$/;"	f	typeref:typename:void
dcache_invalid	arch/m68k/lib/cache.c	/^void dcache_invalid(void)$/;"	f	typeref:typename:void
dcache_invalidate_line	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^static inline void dcache_invalidate_line(volatile void *vaddr)$/;"	f	typeref:typename:void
dcache_line_size	arch/mips/lib/cache.c	/^static inline unsigned long dcache_line_size(void)$/;"	f	typeref:typename:unsigned long	file:
dcache_line_size	arch/nios2/include/asm/global_data.h	/^	u32 dcache_line_size;$/;"	m	struct:arch_global_data	typeref:typename:u32
dcache_option	arch/arm/include/asm/system.h	/^enum dcache_option {$/;"	g
dcache_size	arch/nios2/include/asm/global_data.h	/^	u32 dcache_size;$/;"	m	struct:arch_global_data	typeref:typename:u32
dcache_status	arch/arc/lib/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/arm/cpu/armv8/cache_v8.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/arm/lib/cache-cp15.c	/^int dcache_status (void)$/;"	f	typeref:typename:int
dcache_status	arch/arm/lib/cache-cp15.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/blackfin/lib/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/m68k/lib/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/microblaze/cpu/cache.c	/^int dcache_status (void)$/;"	f	typeref:typename:int
dcache_status	arch/nds32/lib/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/nios2/lib/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/openrisc/cpu/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/powerpc/cpu/mpc512x/start.S	/^dcache_status:$/;"	l
dcache_status	arch/powerpc/cpu/mpc5xx/cpu.c	/^int dcache_status (void)$/;"	f	typeref:typename:int
dcache_status	arch/powerpc/cpu/mpc5xxx/start.S	/^dcache_status:$/;"	l
dcache_status	arch/powerpc/cpu/mpc8260/start.S	/^dcache_status:$/;"	l
dcache_status	arch/powerpc/cpu/mpc83xx/start.S	/^dcache_status:$/;"	l
dcache_status	arch/powerpc/cpu/mpc85xx/start.S	/^dcache_status:$/;"	l
dcache_status	arch/powerpc/cpu/mpc8xx/start.S	/^dcache_status:$/;"	l
dcache_status	arch/powerpc/cpu/ppc4xx/cache.S	/^dcache_status:$/;"	l
dcache_status	arch/sh/cpu/sh2/cpu.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/sh/cpu/sh3/cpu.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/sh/cpu/sh4/cpu.c	/^int dcache_status (void)$/;"	f	typeref:typename:int
dcache_status	arch/x86/cpu/cpu.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcache_status	arch/xtensa/lib/cache.c	/^int dcache_status(void)$/;"	f	typeref:typename:int
dcalr	drivers/rtc/imxdi.c	/^	u32 dcalr;			\/* Clock Alarm LSB Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dcamr	drivers/rtc/imxdi.c	/^	u32 dcamr;			\/* Clock Alarm MSB Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dcan0	arch/arm/dts/am33xx.dtsi	/^		dcan0: can@481cc000 {$/;"	l
dcan0	arch/arm/dts/am4372.dtsi	/^		dcan0: can@481cc000 {$/;"	l
dcan01clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int dcan01clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
dcan0_default	arch/arm/dts/am437x-gp-evm.dts	/^	dcan0_default: dcan0_default_pins {$/;"	l
dcan0_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	dcan0_fck: dcan0_fck {$/;"	l
dcan0_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	dcan0_fck: dcan0_fck {$/;"	l
dcan0_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux dcan0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
dcan0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int dcan0clkctrl;	\/* offset 0x428 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
dcan0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int dcan0clkctrl;	\/* offset 0xC0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
dcan1	arch/arm/dts/am33xx.dtsi	/^		dcan1: can@481d0000 {$/;"	l
dcan1	arch/arm/dts/am4372.dtsi	/^		dcan1: can@481d0000 {$/;"	l
dcan1	arch/arm/dts/dra7.dtsi	/^		dcan1: can@481cc000 {$/;"	l
dcan1_default	arch/arm/dts/am437x-gp-evm.dts	/^	dcan1_default: dcan1_default_pins {$/;"	l
dcan1_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	dcan1_fck: dcan1_fck {$/;"	l
dcan1_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	dcan1_fck: dcan1_fck {$/;"	l
dcan1_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux dcan1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
dcan1_pins_default	arch/arm/dts/am335x-evm.dts	/^	dcan1_pins_default: dcan1_pins_default {$/;"	l
dcan1_pins_default	arch/arm/dts/dra7-evm.dts	/^	dcan1_pins_default: dcan1_pins_default {$/;"	l
dcan1_pins_default	arch/arm/dts/dra72-evm-common.dtsi	/^	dcan1_pins_default: dcan1_pins_default {$/;"	l
dcan1_pins_sleep	arch/arm/dts/dra7-evm.dts	/^	dcan1_pins_sleep: dcan1_pins_sleep {$/;"	l
dcan1_pins_sleep	arch/arm/dts/dra72-evm-common.dtsi	/^	dcan1_pins_sleep: dcan1_pins_sleep {$/;"	l
dcan1_sys_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dcan1_sys_clk_mux: dcan1_sys_clk_mux {$/;"	l
dcan1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int dcan1clkctrl;	\/* offset 0x430 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
dcan1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int dcan1clkctrl;	\/* offset 0xC4 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
dcan2	arch/arm/dts/dra7.dtsi	/^		dcan2: can@481d0000 {$/;"	l
dcbaa	drivers/usb/host/xhci.h	/^	struct xhci_device_context_array *dcbaa		\\$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_device_context_array *
dcbz	drivers/net/fsl-mc/dpio/qbman_private.h	/^static inline void dcbz(void *ptr)$/;"	f	typeref:typename:void
dcc_params	arch/arm/include/asm/arch-tegra/usb.h	/^	uint dcc_params;$/;"	m	struct:usb_ctlr	typeref:typename:uint
dccon	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 dccon:1;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:1
dccparams	arch/m68k/include/asm/immap_5329.h	/^	u32 dccparams;		\/* 0x124 Device Capability Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
dccr	arch/powerpc/include/asm/immap_512x.h	/^	u32 dccr;		\/* DIU Clock Control Register *\/$/;"	m	struct:clk512x	typeref:typename:u32
dcd	tools/mxsimage.c	/^	struct sb_dcd_ctx		*dcd;$/;"	m	struct:sb_dcd_ctx	typeref:struct:sb_dcd_ctx *	file:
dcd	tools/mxsimage.h	/^	uint32_t	dcd;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
dcd2_ptr	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^dcd2_ptr:               .long 0x0$/;"	l
dcd2_ptr	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^dcd2_ptr:               .long 0x0$/;"	l
dcd_addr_data_t	tools/imximage.h	/^} dcd_addr_data_t;$/;"	t	typeref:struct:__anon504a956c0708
dcd_cmd	tools/imximage.h	/^	struct dcd_v2_cmd dcd_cmd;$/;"	m	struct:__anon504a956c0a08	typeref:struct:dcd_v2_cmd
dcd_head	tools/mxsimage.c	/^	struct sb_dcd_ctx		*dcd_head;$/;"	m	struct:sb_image_ctx	typeref:struct:sb_dcd_ctx *	file:
dcd_preamble_t	tools/imximage.h	/^} dcd_preamble_t;$/;"	t	typeref:struct:__anon504a956c0208
dcd_ptr	tools/imximage.h	/^	uint32_t dcd_ptr;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
dcd_ptr	tools/imximage.h	/^	uint32_t dcd_ptr;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
dcd_ptr_ptr	tools/imximage.h	/^	uint32_t dcd_ptr_ptr;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
dcd_table	tools/imximage.h	/^		dcd_v2_t dcd_table;$/;"	m	union:__anon504a956c0d08::__anon504a956c0e0a	typeref:typename:dcd_v2_t
dcd_table	tools/imximage.h	/^	dcd_v1_t dcd_table;$/;"	m	struct:__anon504a956c0608	typeref:typename:dcd_v1_t
dcd_tail	tools/mxsimage.c	/^	struct sb_dcd_ctx		*dcd_tail;$/;"	m	struct:sb_image_ctx	typeref:struct:sb_dcd_ctx *	file:
dcd_type_addr_data_t	tools/imximage.h	/^} dcd_type_addr_data_t;$/;"	t	typeref:struct:__anon504a956c0108
dcd_v1_t	tools/imximage.h	/^} dcd_v1_t;$/;"	t	typeref:struct:__anon504a956c0308
dcd_v2_cmd	tools/imximage.h	/^struct dcd_v2_cmd {$/;"	s
dcd_v2_t	tools/imximage.h	/^} dcd_v2_t;$/;"	t	typeref:struct:__anon504a956c0a08
dcdal0	include/tsi148.h	/^	unsigned int dcdal0;                  \/* 0x514         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcdal1	include/tsi148.h	/^	unsigned int dcdal1;                  \/* 0x594         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcdau0	include/tsi148.h	/^	unsigned int dcdau0;                  \/* 0x510         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcdau1	include/tsi148.h	/^	unsigned int dcdau1;                  \/* 0x590         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcdc1	arch/arm/dts/am437x-gp-evm.dts	/^		dcdc1: regulator-dcdc1 {$/;"	l	label:tps65218
dcdc1	arch/arm/dts/am437x-sk-evm.dts	/^		dcdc1: regulator-dcdc1 {$/;"	l
dcdc1	arch/arm/dts/am43x-epos-evm.dts	/^		dcdc1: regulator-dcdc1 {$/;"	l	label:tps65218
dcdc1_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		dcdc1_reg: regulator@0 {$/;"	l
dcdc1_reg	arch/arm/dts/am335x-rut.dts	/^		dcdc1_reg: regulator@0 {$/;"	l
dcdc1_reg	arch/arm/dts/tps65217.dtsi	/^		dcdc1_reg: regulator@0 {$/;"	l
dcdc2	arch/arm/dts/am437x-gp-evm.dts	/^		dcdc2: regulator-dcdc2 {$/;"	l	label:tps65218
dcdc2	arch/arm/dts/am437x-sk-evm.dts	/^		dcdc2: regulator-dcdc2 {$/;"	l
dcdc2	arch/arm/dts/am43x-epos-evm.dts	/^		dcdc2: regulator-dcdc2 {$/;"	l	label:tps65218
dcdc2_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		dcdc2_reg: regulator@1 {$/;"	l
dcdc2_reg	arch/arm/dts/am335x-rut.dts	/^		dcdc2_reg: regulator@1 {$/;"	l
dcdc2_reg	arch/arm/dts/tps65217.dtsi	/^		dcdc2_reg: regulator@1 {$/;"	l
dcdc3	arch/arm/dts/am437x-gp-evm.dts	/^		dcdc3: regulator-dcdc3 {$/;"	l	label:tps65218
dcdc3	arch/arm/dts/am437x-sk-evm.dts	/^		dcdc3: regulator-dcdc3 {$/;"	l
dcdc3	arch/arm/dts/am43x-epos-evm.dts	/^		dcdc3: regulator-dcdc3 {$/;"	l	label:tps65218
dcdc3_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		dcdc3_reg: regulator@2 {$/;"	l
dcdc3_reg	arch/arm/dts/am335x-rut.dts	/^		dcdc3_reg: regulator@2 {$/;"	l
dcdc3_reg	arch/arm/dts/tps65217.dtsi	/^		dcdc3_reg: regulator@2 {$/;"	l
dcdc4	arch/arm/dts/am437x-sk-evm.dts	/^		dcdc4: regulator-dcdc4 {$/;"	l
dcdc4	arch/arm/dts/am43x-epos-evm.dts	/^		dcdc4: regulator-dcdc4 {$/;"	l	label:tps65218
dcdc5	arch/arm/dts/am437x-gp-evm.dts	/^		dcdc5: regulator-dcdc5 {$/;"	l	label:tps65218
dcdc5	arch/arm/dts/am43x-epos-evm.dts	/^		dcdc5: regulator-dcdc5 {$/;"	l	label:tps65218
dcdc6	arch/arm/dts/am437x-gp-evm.dts	/^		dcdc6: regulator-dcdc6 {$/;"	l	label:tps65218
dcdc6	arch/arm/dts/am43x-epos-evm.dts	/^		dcdc6: regulator-dcdc6 {$/;"	l	label:tps65218
dcdst	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dcdst;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
dcfg	arch/arm/dts/ls1021a.dtsi	/^		dcfg: dcfg@1ee0000 {$/;"	l
dcfg	drivers/usb/dwc3/core.h	/^	u32			dcfg;$/;"	m	struct:dwc3	typeref:typename:u32
dcfg	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 dcfg; \/* Device Configuration Register *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
dcfg_ccsr_cgencr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_cgencr0;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_cgencr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_cgencr1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_cgensr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_cgensr0;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_cgensr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_cgensr1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_dcsrcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_dcsrcr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_dma1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_dma1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_dma2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_dma2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_dma3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_dma3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_dma4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_dma4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr2;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr3;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr4;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr5;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr6	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr6;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gencr7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gencr7;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gensr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gensr1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gensr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gensr2;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gensr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gensr3;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_gensr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_gensr4;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_misc1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_misc1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_misc2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_misc2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_misc3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_misc3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_misc4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_misc4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_pblsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_pblsr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_pex1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_pex1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_pex2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_pex2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_pex3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_pex3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_pex4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_pex4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_qmbm_warmrst	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_qmbm_warmrst;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_reserved0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_reserved0;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_reserved1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_reserved1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_rio1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_rio1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_rio2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_rio2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_rio3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_rio3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_rio4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_rio4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_riomaintliodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_riomaintliodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_sdmmc1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_sdmmc1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_sdmmc2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_sdmmc2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_sdmmc3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_sdmmc3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_sdmmc4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_sdmmc4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_spare1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_spare1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_spare2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_spare2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_spare3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_spare3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_spare4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_spare4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_sriopstecr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_sriopstecr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_usb1liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_usb1liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_usb2liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_usb2liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_usb3liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_usb3liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_ccsr_usb4liodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dcfg_ccsr_usb4liodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_fusesr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     dcfg_fusesr;    \/* Fuse status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_fusesr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	dcfg_fusesr;	\/* Fuse status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_fusesr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     dcfg_fusesr;    \/* Fuse status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcfg_fusesr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dcfg_fusesr;	\/* Fuse status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcgidx_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map0;		\/* 0x10015000 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dcgidx_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dcgidx_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dcgidx_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dcgidx_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dcgidx_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dcgidx_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dcgidx_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dcgidx_map2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dcgidx_map2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dcgidx_map2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dcgidx_map2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgidx_map2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dcgperf_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dcgperf_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dcgperf_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dcgperf_map0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dcgperf_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dcgperf_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dcgperf_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dcgperf_map1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dcgperf_map1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dcgu_clk_en1	board/micronas/vct/dcgu.h	/^union dcgu_clk_en1 {$/;"	u
dcgu_clk_en2	board/micronas/vct/dcgu.h	/^union dcgu_clk_en2 {$/;"	u
dcgu_hw_module	board/micronas/vct/dcgu.h	/^enum dcgu_hw_module {$/;"	g
dcgu_reset_unit1	board/micronas/vct/dcgu.h	/^union dcgu_reset_unit1 {$/;"	u
dcgu_set_clk_switch	board/micronas/vct/dcgu.c	/^int dcgu_set_clk_switch(enum dcgu_hw_module module, enum dcgu_switch setup)$/;"	f	typeref:typename:int
dcgu_set_reset_switch	board/micronas/vct/dcgu.c	/^int dcgu_set_reset_switch(enum dcgu_hw_module module, enum dcgu_switch setup)$/;"	f	typeref:typename:int
dcgu_switch	board/micronas/vct/dcgu.h	/^enum dcgu_switch {$/;"	g
dchange	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	dchange;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
dchange	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	dchange;	\/* 0x144 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
dchange	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	dchange;	\/* 44 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
dchpri0	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri0;		\/* 0x100 Channel 0 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri1	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri1;		\/* 0x101 Channel 1 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri10	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri10;		\/* 0x110 Channel 10 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri11	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri11;		\/* 0x111 Channel 11 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri12	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri12;		\/* 0x112 Channel 12 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri13	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri13;		\/* 0x113 Channel 13 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri14	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri14;		\/* 0x114 Channel 14 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri15	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri15;		\/* 0x115 Channel 15 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri2	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri2;		\/* 0x102 Channel 2 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri3	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri3;		\/* 0x103 Channel 3 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri4	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri4;		\/* 0x104 Channel 4 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri5	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri5;		\/* 0x105 Channel 5 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri6	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri6;		\/* 0x106 Channel 6 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri7	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri7;		\/* 0x107 Channel 7 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri8	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri8;		\/* 0x108 Channel 8 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dchpri9	arch/m68k/include/asm/coldfire/edma.h	/^	u8 dchpri9;		\/* 0x109 Channel 9 Priority *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
dci_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	ddr2x_clk, ddr3x_clk, dci_clk,$/;"	e	enum:zynq_clk
dci_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 dci_clk_ctrl; \/* 0x128 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
dci_version	arch/arm/include/asm/arch-tegra/usb.h	/^	uint dci_version;$/;"	m	struct:usb_ctlr	typeref:typename:uint
dcic1	arch/arm/dts/imx6qdl.dtsi	/^			dcic1: dcic@020e4000 {$/;"	l
dcic2	arch/arm/dts/imx6qdl.dtsi	/^			dcic2: dcic@020e8000 {$/;"	l
dciparams	include/usb/ehci-ci.h	/^	u32	dciparams;	\/* 0x124 - Device Controller Params *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
dciver	arch/m68k/include/asm/immap_5329.h	/^	u16 dciver;		\/* 0x120 Device Interface Version Number *\/$/;"	m	struct:usb_otg	typeref:typename:u16
dciversion	include/usb/ehci-ci.h	/^	u32	dciversion;	\/* 0x120 - Device Interface Version *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
dckcfgr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 dckcfgr;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
dckcfgr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 dckcfgr;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
dclal0	include/tsi148.h	/^	unsigned int dclal0;                  \/* 0x51c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dclal1	include/tsi148.h	/^	unsigned int dclal1;                  \/* 0x59c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dclau0	include/tsi148.h	/^	unsigned int dclau0;                  \/* 0x518         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dclau1	include/tsi148.h	/^	unsigned int dclau1;                  \/* 0x598         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dclk	board/freescale/common/ngpixis.h	/^	u8 dclk[3];$/;"	m	struct:ngpixis	typeref:typename:u8[3]
dclk	board/freescale/common/pixis.h	/^	u8 dclk[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
dclk	board/freescale/common/qixis.h	/^	u8 dclk[3];$/;"	m	struct:qixis	typeref:typename:u8[3]
dclkcnt	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	dclkcnt;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
dclkcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dclkcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
dclkmax	include/linux/fb.h	/^	__u32 dclkmax;			\/* pixelclock upper limit (Hz) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
dclkmin	include/linux/fb.h	/^	__u32 dclkmin;			\/* pixelclock lower limit (Hz) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
dclkstat	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	dclkstat;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
dcm_ad	board/freescale/common/qixis.h	/^	u8 dcm_ad;$/;"	m	struct:qixis	typeref:typename:u8
dcm_da	board/freescale/common/qixis.h	/^	u8 dcm_da;$/;"	m	struct:qixis	typeref:typename:u8
dcmbits	examples/standalone/mem_to_mem_idma2intr.c	/^typedef struct dcmbits {$/;"	s	file:
dcmbits_t	examples/standalone/mem_to_mem_idma2intr.c	/^} dcmbits_t;$/;"	t	typeref:struct:dcmbits	file:
dcmbitsu	examples/standalone/mem_to_mem_idma2intr.c	/^typedef union dcmbitsu {$/;"	u	file:
dcmbitsu_t	examples/standalone/mem_to_mem_idma2intr.c	/^} dcmbitsu_t;$/;"	t	typeref:union:dcmbitsu	file:
dcmd	board/freescale/common/qixis.h	/^	u8 dcmd;$/;"	m	struct:qixis	typeref:typename:u8
dcnt0	include/tsi148.h	/^	unsigned int dcnt0;                   \/* 0x540         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcnt1	include/tsi148.h	/^	unsigned int dcnt1;                   \/* 0x5c0         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dcon;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
dcp	arch/arm/dts/imx6ull.dtsi	/^			dcp: dcp@02280000 {$/;"	l	label:aips3
dcpp	include/tsi148.h	/^	unsigned int dcpp;   \/* Pointer to Numed Cmd Packet with rPN *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dcpp	include/universe.h	/^	unsigned int dcpp;   \/* Pointer to Numed Cmd Packet with rPN *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dcpp	include/universe.h	/^	unsigned int dcpp;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
dcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dcr	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 dcr;$/;"	m	struct:gpt_regs	typeref:typename:u32
dcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dcr;		\/* 0x04 dram configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcr;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dcr;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dcr;		\/* 0x88 DRAM configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dcr;		\/* 0x04 dram configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcr;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dcr;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dcr;		\/* 0x88 DRAM configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcr	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 dcr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
dcr	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 dcr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
dcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 dcr;		\/* 0x30 DMA Control Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
dcr	arch/m68k/include/asm/immap_5235.h	/^	u16 dcr;		\/* 0x00 Control register *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u16
dcr	arch/m68k/include/asm/immap_5275.h	/^	u32 dcr;$/;"	m	struct:dma_ctrl	typeref:typename:u32
dcr	arch/m68k/include/asm/immap_5307.h	/^	u16 dcr;$/;"	m	struct:sdramctrl	typeref:typename:u16
dcr	drivers/rtc/imxdi.c	/^	u32 dcr;			\/* Control Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dcr	include/faraday/ftsdc010.h	/^	unsigned int	dcr;		\/* 0x1c - data control reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
dcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dcr;		\/* DRAM Configuration *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
dcr_mask	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int dcr_mask;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
dcr_val	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int dcr_val;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
dcsal0	include/tsi148.h	/^	unsigned int dcsal0;                  \/* 0x50c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcsal1	include/tsi148.h	/^	unsigned int dcsal1;                  \/* 0x58c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcsau0	include/tsi148.h	/^	unsigned int dcsau0;                  \/* 0x508         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcsau1	include/tsi148.h	/^	unsigned int dcsau1;                  \/* 0x588         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcsr_dcfg_regs	arch/powerpc/include/asm/immap_85xx.h	/^struct dcsr_dcfg_regs {$/;"	s
dcsrc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dcsrc;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
dcsrcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dcsrcr;		\/* DCSR Control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dcsrcr0	include/andestech/andes_pcu.h	/^	unsigned int	dcsrcr0;	\/* 0x20 - Driving Capability$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
dcsrcr1	include/andestech/andes_pcu.h	/^	unsigned int	dcsrcr1;	\/* 0x24 - Driving Capability$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
dcsrcr2	include/andestech/andes_pcu.h	/^	unsigned int	dcsrcr2;	\/* 0x28 - Driving Capability$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
dctl	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 dctl; \/* Device Control *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
dctl	include/tsi148.h	/^	unsigned int dctl;   \/* DMA Control         *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dctl	include/universe.h	/^	unsigned int dctl;   \/* DMA Control         *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dctl	include/universe.h	/^	unsigned int dctl;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
dctl0	include/tsi148.h	/^	unsigned int dctl0;                   \/* 0x500         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dctl1	include/tsi148.h	/^	unsigned int dctl1;                   \/* 0x580         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dcu_read32	drivers/video/fsl_dcu_fb.c	/^#define	dcu_read32	/;"	d	file:
dcu_reg	drivers/video/fsl_dcu_fb.c	/^struct dcu_reg {$/;"	s	file:
dcu_set_dvi_encoder	board/freescale/common/dcu_sii9022a.c	/^int dcu_set_dvi_encoder(struct fb_videomode *videomode)$/;"	f	typeref:typename:int
dcu_set_pixel_clock	board/freescale/ls1021aqds/dcu.c	/^unsigned int dcu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:unsigned int
dcu_set_pixel_clock	board/freescale/ls1021atwr/dcu.c	/^unsigned int dcu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:unsigned int
dcu_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 dcu_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
dcu_write32	drivers/video/fsl_dcu_fb.c	/^#define	dcu_write32	/;"	d	file:
dcuar	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcuar;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dcuar	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcuar;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcuar	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcuar;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcudr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcudr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dcudr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcudr;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcudr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcudr;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcugcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcugcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dcugcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcugcr;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcugcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcugcr;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dculr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dculr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dculr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dculr;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dculr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dculr;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcurr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcurr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dcurr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcurr;		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcurr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcurr;		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcusr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcusr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
dcusr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcusr0;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcusr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcusr0;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcusr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcusr1;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcusr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcusr1;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcutpr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dcutpr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dcutpr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dcutpr;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcutpr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dcutpr;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dcvr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 dcvr0;	\/* DPTC Comparator Value 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dcvr0;$/;"	m	struct:system_control_regs	typeref:typename:u32
dcvr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dcvr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
dcvr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 dcvr0;	\/* DPTC Comparator 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 dcvr1;	\/* DPTC Comparator Value 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dcvr1;$/;"	m	struct:system_control_regs	typeref:typename:u32
dcvr1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dcvr1;$/;"	m	struct:clock_control_regs	typeref:typename:u32
dcvr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 dcvr1;	\/* DPTC Comparator 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 dcvr2;	\/* DPTC Comparator Value 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dcvr2;$/;"	m	struct:system_control_regs	typeref:typename:u32
dcvr2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dcvr2;$/;"	m	struct:clock_control_regs	typeref:typename:u32
dcvr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 dcvr2;	\/* DPTC Comparator 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 dcvr3;	\/* DPTC Comparator Value 3 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dcvr3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dcvr3;$/;"	m	struct:system_control_regs	typeref:typename:u32
dcvr3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dcvr3;$/;"	m	struct:clock_control_regs	typeref:typename:u32
dcvr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 dcvr3;	\/* DPTC Comparator 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
dd_child_dir_zapobj	include/zfs/dsl_dir.h	/^	uint64_t dd_child_dir_zapobj;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_clone_parent_obj	include/zfs/dsl_dir.h	/^	uint64_t dd_clone_parent_obj;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_compressed_bytes	include/zfs/dsl_dir.h	/^	uint64_t dd_compressed_bytes;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_creation_time	include/zfs/dsl_dir.h	/^	uint64_t dd_creation_time; \/* not actually used *\/$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_deleg_zapobj	include/zfs/dsl_dir.h	/^	uint64_t dd_deleg_zapobj;	\/* dataset permissions *\/$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_growth	fs/ubifs/ubifs.h	/^	int dd_growth;$/;"	m	struct:ubifs_budget_req	typeref:typename:int
dd_growth	fs/ubifs/ubifs.h	/^	long long dd_growth;$/;"	m	struct:ubifs_budg_info	typeref:typename:long long
dd_head_dataset_obj	include/zfs/dsl_dir.h	/^	uint64_t dd_head_dataset_obj;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_pad	include/zfs/dsl_dir.h	/^	uint64_t dd_pad[20]; \/* pad out to 256 bytes for good measure *\/$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t[20]
dd_parent_obj	include/zfs/dsl_dir.h	/^	uint64_t dd_parent_obj;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_props_zapobj	include/zfs/dsl_dir.h	/^	uint64_t dd_props_zapobj;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_quota	include/zfs/dsl_dir.h	/^	uint64_t dd_quota;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_reserved	include/zfs/dsl_dir.h	/^	uint64_t dd_reserved;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_uncompressed_bytes	include/zfs/dsl_dir.h	/^	uint64_t dd_uncompressed_bytes;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dd_used_bytes	include/zfs/dsl_dir.h	/^	uint64_t dd_used_bytes;$/;"	m	struct:dsl_dir_phys	typeref:typename:uint64_t
dda_increment	arch/arm/include/asm/arch-tegra/dc.h	/^	uint dda_increment;		\/* _WIN_DDA_INCREMENT_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
ddal0	include/tsi148.h	/^	unsigned int ddal0;                   \/* 0x52c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddal1	include/tsi148.h	/^	unsigned int ddal1;                   \/* 0x5ac         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddat0	include/tsi148.h	/^	unsigned int ddat0;                   \/* 0x534         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddat1	include/tsi148.h	/^	unsigned int ddat1;                   \/* 0x5b4         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddau0	include/tsi148.h	/^	unsigned int ddau0;                   \/* 0x528         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddau1	include/tsi148.h	/^	unsigned int ddau1;                   \/* 0x5a8         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddbs0	include/tsi148.h	/^	unsigned int ddbs0;                   \/* 0x544         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddbs1	include/tsi148.h	/^	unsigned int ddbs1;                   \/* 0x5c4         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
ddc_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_addr;			\/* 0x504 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_addr;			\/* 0x50c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_addr	arch/arm/include/asm/arch/display.h	/^	u32 ddc_addr;			\/* 0x504 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_addr	arch/arm/include/asm/arch/display.h	/^	u32 ddc_addr;			\/* 0x50c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_byte_count	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_byte_count;		\/* 0x51c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_byte_count	arch/arm/include/asm/arch/display.h	/^	u32 ddc_byte_count;		\/* 0x51c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_clock	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_clock;			\/* 0x520 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_clock	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_clock;			\/* 0x528 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_clock	arch/arm/include/asm/arch/display.h	/^	u32 ddc_clock;			\/* 0x520 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_clock	arch/arm/include/asm/arch/display.h	/^	u32 ddc_clock;			\/* 0x528 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_cmnd	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_cmnd;			\/* 0x508 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_cmnd	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_cmnd;			\/* 0x520 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_cmnd	arch/arm/include/asm/arch/display.h	/^	u32 ddc_cmnd;			\/* 0x508 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_cmnd	arch/arm/include/asm/arch/display.h	/^	u32 ddc_cmnd;			\/* 0x520 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_ctrl;			\/* 0x500 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 ddc_ctrl;			\/* 0x500 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_dbg	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_dbg;			\/* 0x540 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_dbg	arch/arm/include/asm/arch/display.h	/^	u32 ddc_dbg;			\/* 0x540 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_exreg	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_exreg;			\/* 0x504 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_exreg	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_exreg;			\/* 0x524 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_exreg	arch/arm/include/asm/arch/display.h	/^	u32 ddc_exreg;			\/* 0x504 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_exreg	arch/arm/include/asm/arch/display.h	/^	u32 ddc_exreg;			\/* 0x524 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_fifo_ctrl;		\/* 0x510 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_fifo_ctrl;		\/* 0x518 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 ddc_fifo_ctrl;		\/* 0x510 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 ddc_fifo_ctrl;		\/* 0x518 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_data	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_fifo_data;		\/* 0x518 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_data	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_fifo_data;		\/* 0x580 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_data	arch/arm/include/asm/arch/display.h	/^	u32 ddc_fifo_data;		\/* 0x518 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_data	arch/arm/include/asm/arch/display.h	/^	u32 ddc_fifo_data;		\/* 0x580 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_fifo_status;		\/* 0x514 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_fifo_status;		\/* 0x51c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_status	arch/arm/include/asm/arch/display.h	/^	u32 ddc_fifo_status;		\/* 0x514 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_fifo_status	arch/arm/include/asm/arch/display.h	/^	u32 ddc_fifo_status;		\/* 0x51c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_mask	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_int_mask;		\/* 0x508 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_mask	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_int_mask;		\/* 0x510 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_mask	arch/arm/include/asm/arch/display.h	/^	u32 ddc_int_mask;		\/* 0x508 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_mask	arch/arm/include/asm/arch/display.h	/^	u32 ddc_int_mask;		\/* 0x510 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_int_status;		\/* 0x50c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_int_status;		\/* 0x514 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_status	arch/arm/include/asm/arch/display.h	/^	u32 ddc_int_status;		\/* 0x50c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_int_status	arch/arm/include/asm/arch/display.h	/^	u32 ddc_int_status;		\/* 0x514 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_level	include/vbe.h	/^	u8 ddc_level;$/;"	m	struct:vbe_ddc_info	typeref:typename:u8
ddc_line_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_line_ctrl;		\/* 0x540 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_line_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 ddc_line_ctrl;		\/* 0x540 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_timeout	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 ddc_timeout;		\/* 0x524 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddc_timeout	arch/arm/include/asm/arch/display.h	/^	u32 ddc_timeout;		\/* 0x524 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
ddccfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	ddccfg;		\/* 0xFC: APB_MISC_GP_DDCCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
ddccfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	ddccfg;		\/* 0xFC: APB_MISC_GP_DDCCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
ddccfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	ddccfg;		\/* 0xFC: APB_MISC_GP_DDCCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dddrphy_lock_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dddrphy_lock_ctrl;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
ddhhmmss	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 ddhhmmss;		\/* 0x10c *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
ddhhmmss	arch/arm/include/asm/arch/timer.h	/^	u32 ddhhmmss;		\/* 0x10c *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
ddma	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	struct sunxi_dma_cfg ddma[8];	\/* 0x300 Dedicated DMA *\/$/;"	m	struct:sunxi_dma	typeref:struct:sunxi_dma_cfg[8]
ddma	arch/arm/include/asm/arch/dma_sun4i.h	/^	struct sunxi_dma_cfg ddma[8];	\/* 0x300 Dedicated DMA *\/$/;"	m	struct:sunxi_dma	typeref:struct:sunxi_dma_cfg[8]
ddma_drq_type	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^enum ddma_drq_type {$/;"	g
ddma_drq_type	arch/arm/include/asm/arch/dma_sun4i.h	/^enum ddma_drq_type {$/;"	g
ddma_para	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 ddma_para;		\/* 0x18 extra parameter (dedicated DMA only) *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
ddma_para	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 ddma_para;		\/* 0x18 extra parameter (dedicated DMA only) *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
ddp_device	include/linux/mtd/samsung_onenand.h	/^	unsigned int	ddp_device;	\/* 0x02B0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
ddr	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *ddr;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
ddr	arch/m68k/include/asm/coldfire/eport.h	/^	u8 ddr;		\/* 0x04 *\/$/;"	m	struct:eport	typeref:typename:u8
ddr	arch/powerpc/include/asm/immap_83xx.h	/^	ddr83xx_t		ddr;		\/* DDR Memory Controller Memory *\/$/;"	m	struct:immap	typeref:typename:ddr83xx_t
ddr	arch/powerpc/include/asm/immap_83xx.h	/^	ddr83xx_t		ddr;	\/* DDR Memory Controller Memory *\/$/;"	m	struct:immap	typeref:typename:ddr83xx_t
ddr	arch/powerpc/include/asm/immap_83xx.h	/^	struct ccsr_ddr		ddr;	\/* DDR Memory Controller Memory *\/$/;"	m	struct:immap	typeref:struct:ccsr_ddr
ddr	include/mpc5xxx.h	/^	volatile u8 ddr;		\/* SPI + 0x0F10 *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
ddr	include/mpc5xxx.h	/^	volatile u8 ddr;		\/* WU_GPIO + 0x08 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
ddr0_retention	arch/arm/dts/rk3288.dtsi	/^			ddr0_retention: ddr0-retention {$/;"	l	label:pinctrl
ddr0io_pwron_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 ddr0io_pwron_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
ddr1_retention	arch/arm/dts/rk3288.dtsi	/^			ddr1_retention: ddr1-retention {$/;"	l	label:pinctrl
ddr1_spd_check	common/ddr_spd.c	/^ddr1_spd_check(const ddr1_spd_eeprom_t *spd)$/;"	f	typeref:typename:unsigned int
ddr1_spd_dump	drivers/ddr/fsl/interactive.c	/^void ddr1_spd_dump(const ddr1_spd_eeprom_t *spd)$/;"	f	typeref:typename:void
ddr1_spd_eeprom_s	include/ddr_spd.h	/^typedef struct ddr1_spd_eeprom_s {$/;"	s
ddr1_spd_eeprom_t	include/ddr_spd.h	/^} ddr1_spd_eeprom_t;$/;"	t	typeref:struct:ddr1_spd_eeprom_s
ddr1_speed_bins	drivers/ddr/fsl/ddr1_dimm_params.c	/^unsigned short ddr1_speed_bins[] = {0, 7500, 6000, 5000 };$/;"	v	typeref:typename:unsigned short[]
ddr1clkdr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ddr1clkdr;	\/* 0xe0b20 - DDRC1 Clock Disable register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
ddr1io_pwron_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 ddr1io_pwron_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
ddr2_arbiter_params	arch/mips/mach-pic32/include/mach/ddr.h	/^struct ddr2_arbiter_params {$/;"	s
ddr2_calculate_size	drivers/ddr/microchip/ddr2.c	/^phys_size_t ddr2_calculate_size(void)$/;"	f	typeref:typename:phys_size_t
ddr2_cmd_ctrl_data	board/gumstix/pepper/board.c	/^static const struct cmd_control ddr2_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr2_cmd_ctrl_data	board/ti/am335x/board.c	/^static const struct cmd_control ddr2_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr2_conf	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/atmel/sama5d3xek/sama5d3xek.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/atmel/sama5d4ek/sama5d4ek.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/denx/ma5d4evk/ma5d4evk.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/mini-box/picosam9g45/picosam9g45.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_conf	board/siemens/corvus/board.c	/^static void ddr2_conf(struct atmel_mpddrc_config *ddr2)$/;"	f	typeref:typename:void	file:
ddr2_ctrl	board/ti/ti816x/evm.c	/^static struct cmd_control ddr2_ctrl = {$/;"	v	typeref:struct:cmd_control	file:
ddr2_ctrl_init	drivers/ddr/microchip/ddr2.c	/^void ddr2_ctrl_init(void)$/;"	f	typeref:typename:void
ddr2_ctrl_regs	drivers/ddr/microchip/ddr2_regs.h	/^struct ddr2_ctrl_regs {$/;"	s
ddr2_data	board/gumstix/pepper/board.c	/^static const struct ddr_data ddr2_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr2_data	board/ti/am335x/board.c	/^static const struct ddr_data ddr2_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr2_data	board/ti/ti816x/evm.c	/^static struct ddr_data ddr2_data = {$/;"	v	typeref:struct:ddr_data	file:
ddr2_decodtype_is_seq	arch/arm/mach-at91/mpddrc.c	/^static int ddr2_decodtype_is_seq(const unsigned int base, u32 cr)$/;"	f	typeref:typename:int	file:
ddr2_emif0_regs	board/ti/ti816x/evm.c	/^static struct emif_regs ddr2_emif0_regs = {$/;"	v	typeref:struct:emif_regs	file:
ddr2_emif1_regs	board/ti/ti816x/evm.c	/^static struct emif_regs ddr2_emif1_regs = {$/;"	v	typeref:struct:emif_regs	file:
ddr2_emif_reg_data	board/gumstix/pepper/board.c	/^static const struct emif_regs ddr2_emif_reg_data = {$/;"	v	typeref:typename:const struct emif_regs	file:
ddr2_emif_reg_data	board/ti/am335x/board.c	/^static const struct emif_regs ddr2_emif_reg_data = {$/;"	v	typeref:typename:const struct emif_regs	file:
ddr2_init	arch/arm/mach-at91/mpddrc.c	/^int ddr2_init(const unsigned int base,$/;"	f	typeref:typename:int
ddr2_phy_calib_start	drivers/ddr/microchip/ddr2.c	/^static int ddr2_phy_calib_start(void)$/;"	f	typeref:typename:int	file:
ddr2_phy_init	drivers/ddr/microchip/ddr2.c	/^void ddr2_phy_init(void)$/;"	f	typeref:typename:void
ddr2_phy_regs	drivers/ddr/microchip/ddr2_regs.h	/^struct ddr2_phy_regs {$/;"	s
ddr2_pmd_ungate	arch/mips/mach-pic32/cpu.c	/^static void ddr2_pmd_ungate(void)$/;"	f	typeref:typename:void	file:
ddr2_spd_check	common/ddr_spd.c	/^ddr2_spd_check(const ddr2_spd_eeprom_t *spd)$/;"	f	typeref:typename:unsigned int
ddr2_spd_dump	drivers/ddr/fsl/interactive.c	/^void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd)$/;"	f	typeref:typename:void
ddr2_spd_eeprom_s	include/ddr_spd.h	/^typedef struct ddr2_spd_eeprom_s {$/;"	s
ddr2_spd_eeprom_t	include/ddr_spd.h	/^} ddr2_spd_eeprom_t;$/;"	t	typeref:struct:ddr2_spd_eeprom_s
ddr2_speed_bins	drivers/ddr/fsl/ddr2_dimm_params.c	/^unsigned short ddr2_speed_bins[] = {   0, 5000, 3750, 3000, 2500, 1875 };$/;"	v	typeref:typename:unsigned short[]
ddr2clkdr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ddr2clkdr;	\/* 0xe0b28 - DDRC2 Clock Disable register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
ddr2x_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	ddr2x_clk, ddr3x_clk, dci_clk,$/;"	e	enum:zynq_clk
ddr2x_get_rate	arch/arm/mach-zynq/clk.c	/^static unsigned long ddr2x_get_rate(struct clk *clk)$/;"	f	typeref:typename:unsigned long	file:
ddr2xdqsclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	ddr2xdqsclk;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
ddr2xdqsclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t ddr2xdqsclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
ddr3	board/siemens/draco/board.h	/^	struct ddr3_data ddr3;$/;"	m	struct:draco_baseboard_id	typeref:struct:ddr3_data
ddr3_1600_2g	board/ti/ks2_evm/ddr3_cfg.c	/^struct ddr3_emif_config ddr3_1600_2g = {$/;"	v	typeref:struct:ddr3_emif_config
ddr3_333	board/ti/ks2_evm/ddr3_k2e.c	/^static struct pll_init_data ddr3_333 = DDR3_PLL_333;$/;"	v	typeref:struct:pll_init_data	file:
ddr3_400	board/ti/ks2_evm/ddr3_k2e.c	/^static struct pll_init_data ddr3_400 = DDR3_PLL_400;$/;"	v	typeref:struct:pll_init_data	file:
ddr3_400	board/ti/ks2_evm/ddr3_k2l.c	/^static struct pll_init_data ddr3_400 = DDR3_PLL_400;$/;"	v	typeref:struct:pll_init_data	file:
ddr3_800_2g	board/ti/ks2_evm/ddr3_k2g.c	/^struct ddr3_emif_config ddr3_800_2g = {$/;"	v	typeref:struct:ddr3_emif_config
ddr3_A0_AMC_667	drivers/ddr/marvell/axp/ddr3_axp_mc_static.h	/^MV_DRAM_MC_INIT ddr3_A0_AMC_667[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
ddr3_A0_db_400	drivers/ddr/marvell/axp/ddr3_axp_mc_static.h	/^MV_DRAM_MC_INIT ddr3_A0_db_400[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
ddr3_A0_db_667	drivers/ddr/marvell/axp/ddr3_axp_mc_static.h	/^MV_DRAM_MC_INIT ddr3_A0_db_667[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
ddr3_Z1_db_300	drivers/ddr/marvell/axp/ddr3_axp_mc_static.h	/^MV_DRAM_MC_INIT ddr3_Z1_db_300[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
ddr3_Z1_db_600	drivers/ddr/marvell/axp/ddr3_axp_mc_static.h	/^MV_DRAM_MC_INIT ddr3_Z1_db_600[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
ddr3_a38x_533	drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h	/^static struct reg_data ddr3_a38x_533[] = {$/;"	v	typeref:struct:reg_data[]
ddr3_a38x_667	drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h	/^static struct reg_data ddr3_a38x_667[] = {$/;"	v	typeref:struct:reg_data[]
ddr3_a38x_800	drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h	/^static struct reg_data ddr3_a38x_800[] = {$/;"	v	typeref:struct:reg_data[]
ddr3_a38x_933	drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h	/^struct reg_data ddr3_a38x_933[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:struct:reg_data[]
ddr3_a38x_update_topology_map	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_a38x_update_topology_map(u32 dev_num, struct hws_topology_map *tm)$/;"	f	typeref:typename:int
ddr3_b0_maxbcm	board/maxbcm/maxbcm.c	/^MV_DRAM_MC_INIT ddr3_b0_maxbcm[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
ddr3_baltos_cmd_ctrl_data	board/vscom/baltos/board.c	/^static const struct cmd_control ddr3_baltos_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_baltos_data	board/vscom/baltos/board.c	/^static const struct ddr_data ddr3_baltos_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_baltos_emif_reg_data	board/vscom/baltos/board.c	/^static struct emif_regs ddr3_baltos_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_bav335x_cmd_ctrl_data	board/birdland/bav335x/board.c	/^static const struct cmd_control ddr3_bav335x_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_bav335x_data	board/birdland/bav335x/board.c	/^static const struct ddr_data ddr3_bav335x_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_bav335x_emif_reg_data	board/birdland/bav335x/board.c	/^static struct emif_regs ddr3_bav335x_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_beagleblack_cmd_ctrl_data	board/ti/am335x/board.c	/^static const struct cmd_control ddr3_beagleblack_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_beagleblack_data	board/ti/am335x/board.c	/^static const struct ddr_data ddr3_beagleblack_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_beagleblack_emif_reg_data	board/ti/am335x/board.c	/^static struct emif_regs ddr3_beagleblack_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_calc_mem_cs_size	drivers/ddr/marvell/a38x/ddr3_init.c	/^int ddr3_calc_mem_cs_size(u32 cs, u32 *cs_size)$/;"	f	typeref:typename:int
ddr3_center_calc	drivers/ddr/marvell/axp/ddr3_dqs.c	/^static int ddr3_center_calc(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,$/;"	f	typeref:typename:int	file:
ddr3_check_config	drivers/ddr/marvell/axp/ddr3_init.c	/^int ddr3_check_config(u32 twsi_addr, MV_CONFIG_TYPE config_type)$/;"	f	typeref:typename:int
ddr3_check_ecc_int	arch/arm/mach-keystone/ddr3.c	/^void ddr3_check_ecc_int(u32 base)$/;"	f	typeref:typename:void
ddr3_check_if_resume_mode	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_check_if_resume_mode(MV_DRAM_INFO *dram_info, u32 freq)$/;"	f	typeref:typename:int
ddr3_check_window_limits	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_check_window_limits(u32 pup, int high_limit, int low_limit, int is_tx,$/;"	f	typeref:typename:int
ddr3_cl_to_valid_cl	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_cl_to_valid_cl(u32 cl)$/;"	f	typeref:typename:u32
ddr3_cmd_ctrl_data	board/BuR/brppt1/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/BuR/brxre1/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/compulab/cm_t335/spl.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/gumstix/pepper/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/isee/igep0033/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/phytec/pcm051/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/silica/pengwyn/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_cmd_ctrl_data	board/ti/am335x/board.c	/^static const struct cmd_control ddr3_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_ctrl	board/ti/ti816x/evm.c	/^static const struct cmd_control ddr3_ctrl = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_ctrl_get_junc_temp	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^u32 ddr3_ctrl_get_junc_temp(u8 dev_num)$/;"	f	typeref:typename:u32
ddr3_customer_800	drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h	/^static struct reg_data ddr3_customer_800[] = {$/;"	v	typeref:struct:reg_data[]
ddr3_data	board/BuR/brppt1/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/BuR/brxre1/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/compulab/cm_t335/spl.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/gumstix/pepper/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/isee/igep0033/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/phytec/pcm051/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/siemens/draco/board.h	/^struct ddr3_data {$/;"	s
ddr3_data	board/silica/pengwyn/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/ti/am335x/board.c	/^static const struct ddr_data ddr3_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_data	board/ti/ti816x/evm.c	/^static struct ddr_data ddr3_data = {$/;"	v	typeref:struct:ddr_data	file:
ddr3_db_400	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_400[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_533	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_533[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_600	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_600[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_667	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_667[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_667_M	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_667_M[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_800	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_800[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_rev2_667	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_rev2_667[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_db_rev2_800	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_db_rev2_800[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_default	board/siemens/draco/board.c	/^const struct ddr3_data ddr3_default = {$/;"	v	typeref:typename:const struct ddr3_data
ddr3_device_info	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^struct ddr3_device_info {$/;"	s
ddr3_dfs_high_2_low	drivers/ddr/marvell/axp/ddr3_dfs.c	/^int ddr3_dfs_high_2_low(u32 freq, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_dfs_low_2_high	drivers/ddr/marvell/axp/ddr3_dfs.c	/^int ddr3_dfs_low_2_high(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_disable_ecc	arch/arm/mach-keystone/ddr3.c	/^void ddr3_disable_ecc(u32 base)$/;"	f	typeref:typename:void
ddr3_div	drivers/ddr/marvell/axp/ddr3_spd.c	/^u32 ddr3_div(u32 val, u32 divider, u32 sub)$/;"	f	typeref:typename:u32
ddr3_dlb_config_table	drivers/ddr/marvell/a38x/ddr3_init.c	/^static struct dlb_config ddr3_dlb_config_table[] = {$/;"	v	typeref:struct:dlb_config[]	file:
ddr3_dlb_config_table_a0	drivers/ddr/marvell/a38x/ddr3_init.c	/^static struct dlb_config ddr3_dlb_config_table_a0[] = {$/;"	v	typeref:struct:dlb_config[]	file:
ddr3_dqs_centralization_rx	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_dqs_centralization_rx(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_dqs_centralization_tx	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_dqs_centralization_tx(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_dqs_choose_pattern	drivers/ddr/marvell/axp/ddr3_dqs.c	/^static u32 *ddr3_dqs_choose_pattern(MV_DRAM_INFO *dram_info, u32 victim_dq)$/;"	f	typeref:typename:u32 *	file:
ddr3_dram_sram_burst	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_dram_sram_burst(u32 src, u32 dst, u32 len)$/;"	f	typeref:typename:int
ddr3_dram_sram_read	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_dram_sram_read(u32 src, u32 dst, u32 len)$/;"	f	typeref:typename:int
ddr3_dunit_setup	drivers/ddr/marvell/axp/ddr3_spd.c	/^int ddr3_dunit_setup(u32 ecc_ena, u32 hclk_time, u32 *ddr_width)$/;"	f	typeref:typename:int
ddr3_ecc_config	arch/arm/mach-keystone/ddr3.c	/^static void ddr3_ecc_config(u32 base, u32 value)$/;"	f	typeref:typename:void	file:
ddr3_ecc_init_range	arch/arm/mach-keystone/ddr3.c	/^static void ddr3_ecc_init_range(u32 base)$/;"	f	typeref:typename:void	file:
ddr3_ecc_support_rmw	arch/arm/mach-keystone/ddr3.c	/^int ddr3_ecc_support_rmw(u32 base)$/;"	f	typeref:typename:int
ddr3_emif0_regs	board/ti/ti816x/evm.c	/^static const struct emif_regs ddr3_emif0_regs = {$/;"	v	typeref:typename:const struct emif_regs	file:
ddr3_emif1_regs	board/ti/ti816x/evm.c	/^static const struct emif_regs ddr3_emif1_regs = {$/;"	v	typeref:typename:const struct emif_regs	file:
ddr3_emif_config	arch/arm/mach-keystone/include/mach/ddr3.h	/^struct ddr3_emif_config {$/;"	s
ddr3_emif_reg_data	board/BuR/brppt1/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/BuR/brxre1/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/compulab/cm_t335/spl.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/gumstix/pepper/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/isee/igep0033/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/phytec/pcm051/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/silica/pengwyn/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_reg_data	board/ti/am335x/board.c	/^static struct emif_regs ddr3_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_emif_regs	board/compulab/cm_t43/spl.c	/^struct emif_regs ddr3_emif_regs = {$/;"	v	typeref:struct:emif_regs
ddr3_emif_regs_400Mhz	board/ti/am43xx/board.c	/^const struct emif_regs ddr3_emif_regs_400Mhz = {$/;"	v	typeref:typename:const struct emif_regs
ddr3_emif_regs_400Mhz_beta	board/ti/am43xx/board.c	/^const struct emif_regs ddr3_emif_regs_400Mhz_beta = {$/;"	v	typeref:typename:const struct emif_regs
ddr3_emif_regs_400Mhz_production	board/ti/am43xx/board.c	/^const struct emif_regs ddr3_emif_regs_400Mhz_production = {$/;"	v	typeref:typename:const struct emif_regs
ddr3_enable_ecc	arch/arm/mach-keystone/ddr3.c	/^void ddr3_enable_ecc(u32 base, int test)$/;"	f	typeref:typename:void
ddr3_err_reset_workaround	arch/arm/mach-keystone/ddr3.c	/^void ddr3_err_reset_workaround(void)$/;"	f	typeref:typename:void
ddr3_evm_cmd_ctrl_data	board/ti/am335x/board.c	/^static const struct cmd_control ddr3_evm_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_evm_data	board/ti/am335x/board.c	/^static const struct ddr_data ddr3_evm_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_evm_emif_reg_data	board/ti/am335x/board.c	/^static struct emif_regs ddr3_evm_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_ext_phy_ctrl_const_base_es1	arch/arm/cpu/armv7/omap5/sdram.c	/^const u32 ddr3_ext_phy_ctrl_const_base_es1[] = {$/;"	v	typeref:typename:const u32[]
ddr3_ext_phy_ctrl_const_base_es2	arch/arm/cpu/armv7/omap5/sdram.c	/^const u32 ddr3_ext_phy_ctrl_const_base_es2[] = {$/;"	v	typeref:typename:const u32[]
ddr3_fast_path_dynamic_cs_size_config	drivers/ddr/marvell/a38x/ddr3_init.c	/^int ddr3_fast_path_dynamic_cs_size_config(u32 cs_ena)$/;"	f	typeref:typename:int
ddr3_find_adll_limits	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_find_adll_limits(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, int is_tx)$/;"	f	typeref:typename:int
ddr3_flush_l1_line	drivers/ddr/marvell/axp/ddr3_sdram.c	/^static void ddr3_flush_l1_line(u32 line)$/;"	f	typeref:typename:void	file:
ddr3_get_bus_width	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_bus_width(void)$/;"	f	typeref:typename:u32
ddr3_get_cpu_freq	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_cpu_freq(void)$/;"	f	typeref:typename:u32
ddr3_get_cpu_freq	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_cpu_freq(void)$/;"	f	typeref:typename:u32
ddr3_get_cs_ena_from_reg	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_cs_ena_from_reg(void)$/;"	f	typeref:typename:u32
ddr3_get_cs_num_from_reg	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_cs_num_from_reg(void)$/;"	f	typeref:typename:u32
ddr3_get_cs_num_from_reg	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_cs_num_from_reg(void)$/;"	f	typeref:typename:u32
ddr3_get_device_size	drivers/ddr/marvell/a38x/ddr3_init.c	/^static int ddr3_get_device_size(u32 cs)$/;"	f	typeref:typename:int	file:
ddr3_get_device_width	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_device_width(u32 cs)$/;"	f	typeref:typename:u32
ddr3_get_dimm_num	drivers/ddr/marvell/axp/ddr3_spd.c	/^static u32 ddr3_get_dimm_num(u32 *dimm_addr)$/;"	f	typeref:typename:u32	file:
ddr3_get_dimm_params_from_spd	arch/arm/mach-keystone/ddr3_spd.c	/^int ddr3_get_dimm_params_from_spd(struct ddr3_spd_cb *spd_cb)$/;"	f	typeref:typename:int
ddr3_get_eprom_fabric	drivers/ddr/marvell/axp/ddr3_init.c	/^u8 ddr3_get_eprom_fabric(void)$/;"	f	typeref:typename:u8
ddr3_get_fab_opt	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_fab_opt(void)$/;"	f	typeref:typename:u32
ddr3_get_fab_opt	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_fab_opt(void)$/;"	f	typeref:typename:u32
ddr3_get_freq_parameter	drivers/ddr/marvell/axp/ddr3_dfs.c	/^u32 ddr3_get_freq_parameter(u32 target_freq, int ratio_2to1)$/;"	f	typeref:typename:u32
ddr3_get_log_level	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_log_level(void)$/;"	f	typeref:typename:u32
ddr3_get_max_val	drivers/ddr/marvell/axp/ddr3_spd.c	/^u32 ddr3_get_max_val(u32 spd_val, u32 dimm_num, u32 static_val)$/;"	f	typeref:typename:u32
ddr3_get_min_max_read_sample_delay	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_get_min_max_read_sample_delay(u32 cs_enable, u32 reg, u32 *min,$/;"	f	typeref:typename:int
ddr3_get_min_max_rl_phase	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_get_min_max_rl_phase(MV_DRAM_INFO *dram_info, u32 *min, u32 *max,$/;"	f	typeref:typename:int
ddr3_get_min_val	drivers/ddr/marvell/axp/ddr3_spd.c	/^u32 ddr3_get_min_val(u32 spd_val, u32 dimm_num, u32 static_val)$/;"	f	typeref:typename:u32
ddr3_get_size	arch/arm/mach-keystone/ddr3_spd.c	/^int ddr3_get_size(void)$/;"	f	typeref:typename:int
ddr3_get_size	arch/arm/mach-keystone/include/mach/hardware-k2l.h	/^static inline int ddr3_get_size(void)$/;"	f	typeref:typename:int
ddr3_get_size	board/ti/ks2_evm/ddr3_k2g.c	/^inline int ddr3_get_size(void)$/;"	f	typeref:typename:int
ddr3_get_size_in_mb	arch/arm/mach-keystone/ddr3_spd.c	/^static int ddr3_get_size_in_mb(ddr3_spd_eeprom_t *buf)$/;"	f	typeref:typename:int	file:
ddr3_get_static_ddr_mode	board/Synology/ds414/ds414.c	/^MV_DRAM_MODES *ddr3_get_static_ddr_mode(void)$/;"	f	typeref:typename:MV_DRAM_MODES *
ddr3_get_static_ddr_mode	board/maxbcm/maxbcm.c	/^MV_DRAM_MODES *ddr3_get_static_ddr_mode(void)$/;"	f	typeref:typename:MV_DRAM_MODES *
ddr3_get_static_ddr_mode	board/theadorable/theadorable.c	/^MV_DRAM_MODES *ddr3_get_static_ddr_mode(void)$/;"	f	typeref:typename:MV_DRAM_MODES *
ddr3_get_static_ddr_mode	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_static_ddr_mode(void)$/;"	f	typeref:typename:u32
ddr3_get_static_ddr_mode	drivers/ddr/marvell/axp/ddr3_init.c	/^__weak MV_DRAM_MODES *ddr3_get_static_ddr_mode(void)$/;"	f	typeref:typename:__weak MV_DRAM_MODES *
ddr3_get_static_mc_value	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 ddr3_get_static_mc_value(u32 reg_addr, u32 offset1, u32 mask1,$/;"	f	typeref:typename:u32
ddr3_get_static_mc_value	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_static_mc_value(u32 reg_addr, u32 offset1, u32 mask1, u32 offset2,$/;"	f	typeref:typename:u32
ddr3_get_topology_map	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^struct hws_topology_map *ddr3_get_topology_map(void)$/;"	f	typeref:struct:hws_topology_map *
ddr3_get_topology_map	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^struct hws_topology_map *ddr3_get_topology_map(void)$/;"	f	typeref:struct:hws_topology_map *
ddr3_get_topology_map	board/solidrun/clearfog/clearfog.c	/^struct hws_topology_map *ddr3_get_topology_map(void)$/;"	f	typeref:struct:hws_topology_map *
ddr3_get_vco_freq	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_get_vco_freq(void)$/;"	f	typeref:typename:u32
ddr3_hw_training	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_hw_training(u32 target_freq, u32 ddr_width, int xor_bypass,$/;"	f	typeref:typename:int
ddr3_hws_hw_training	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^int ddr3_hws_hw_training(void)$/;"	f	typeref:typename:int
ddr3_hws_set_log_level	drivers/ddr/marvell/a38x/ddr3_debug.c	/^void ddr3_hws_set_log_level(enum ddr_lib_debug_block block, u8 level)$/;"	f	typeref:typename:void
ddr3_hws_tune_training_params	drivers/ddr/marvell/a38x/ddr3_init.c	/^static int ddr3_hws_tune_training_params(u8 dev_num)$/;"	f	typeref:typename:int	file:
ddr3_icev2_cmd_ctrl_data	board/ti/am335x/board.c	/^static const struct cmd_control ddr3_icev2_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_icev2_data	board/ti/am335x/board.c	/^static const struct ddr_data ddr3_icev2_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_icev2_emif_reg_data	board/ti/am335x/board.c	/^static struct emif_regs ddr3_icev2_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_idk_emif_regs_400Mhz	board/ti/am43xx/board.c	/^static const struct emif_regs ddr3_idk_emif_regs_400Mhz = {$/;"	v	typeref:typename:const struct emif_regs	file:
ddr3_if_ecc_enabled	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^int ddr3_if_ecc_enabled(void)$/;"	f	typeref:typename:int
ddr3_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void ddr3_init(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
ddr3_init	arch/arm/mach-at91/mpddrc.c	/^int ddr3_init(const unsigned int base,$/;"	f	typeref:typename:int
ddr3_init	board/ti/ks2_evm/ddr3_k2e.c	/^u32 ddr3_init(void)$/;"	f	typeref:typename:u32
ddr3_init	board/ti/ks2_evm/ddr3_k2g.c	/^u32 ddr3_init(void)$/;"	f	typeref:typename:u32
ddr3_init	board/ti/ks2_evm/ddr3_k2hk.c	/^u32 ddr3_init(void)$/;"	f	typeref:typename:u32
ddr3_init	board/ti/ks2_evm/ddr3_k2l.c	/^u32 ddr3_init(void)$/;"	f	typeref:typename:u32
ddr3_init	drivers/ddr/marvell/a38x/ddr3_init.c	/^int ddr3_init(void)$/;"	f	typeref:typename:int
ddr3_init	drivers/ddr/marvell/axp/ddr3_init.c	/^int ddr3_init(void)$/;"	f	typeref:typename:int
ddr3_init_ddremif	arch/arm/mach-keystone/ddr3.c	/^void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg)$/;"	f	typeref:typename:void
ddr3_init_ddrphy	arch/arm/mach-keystone/ddr3.c	/^void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg)$/;"	f	typeref:typename:void
ddr3_init_ecc	arch/arm/mach-keystone/ddr3.c	/^void ddr3_init_ecc(u32 base, u32 ddr3_size)$/;"	f	typeref:typename:void
ddr3_init_main	drivers/ddr/marvell/axp/ddr3_init.c	/^static u32 ddr3_init_main(void)$/;"	f	typeref:typename:u32	file:
ddr3_ioregs	board/BuR/brppt1/board.c	/^static const struct ctrl_ioregs ddr3_ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs	file:
ddr3_ioregs	board/BuR/brxre1/board.c	/^static const struct ctrl_ioregs ddr3_ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs	file:
ddr3_ioregs	board/silica/pengwyn/board.c	/^const struct ctrl_ioregs ddr3_ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ddr3_jedec_timings	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^struct ddr3_jedec_timings {$/;"	s
ddr3_load_dqs_patterns	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_load_dqs_patterns(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_load_patterns	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_load_patterns(MV_DRAM_INFO *dram_info, int resume)$/;"	f	typeref:typename:int
ddr3_load_pbs_patterns	drivers/ddr/marvell/axp/ddr3_pbs.c	/^int ddr3_load_pbs_patterns(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_map_ecc_cic2_irq	arch/arm/mach-keystone/ddr3.c	/^static void ddr3_map_ecc_cic2_irq(u32 base)$/;"	f	typeref:typename:void	file:
ddr3_mem_ctrl_init	arch/arm/mach-exynos/dmc_init_ddr3.c	/^int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset)$/;"	f	typeref:typename:int
ddr3_new_tip_dlb_config	drivers/ddr/marvell/a38x/ddr3_init.c	/^void ddr3_new_tip_dlb_config(void)$/;"	f	typeref:typename:void
ddr3_new_tip_ecc_scrub	drivers/ddr/marvell/a38x/xor.c	/^void ddr3_new_tip_ecc_scrub(void)$/;"	f	typeref:typename:void
ddr3_odt_activate	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_odt_activate(int activate)$/;"	f	typeref:typename:int
ddr3_odt_read_dynamic_config	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_odt_read_dynamic_config(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_pbs_per_bit	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static int ddr3_pbs_per_bit(MV_DRAM_INFO *dram_info, int *start_over, int is_tx,$/;"	f	typeref:typename:int	file:
ddr3_pbs_rx	drivers/ddr/marvell/axp/ddr3_pbs.c	/^int ddr3_pbs_rx(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_pbs_tx	drivers/ddr/marvell/axp/ddr3_pbs.c	/^int ddr3_pbs_tx(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_pbs_write_pup_dqs_reg	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static void ddr3_pbs_write_pup_dqs_reg(u32 cs, u32 pup, u32 dqs_delay)$/;"	f	typeref:typename:void	file:
ddr3_pcac_600	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_pcac_600[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_phy_config	arch/arm/mach-keystone/include/mach/ddr3.h	/^struct ddr3_phy_config {$/;"	s
ddr3_pll_config	board/ti/ks2_evm/board_k2g.c	/^static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 133, 1, 16};$/;"	v	typeref:struct:pll_init_data	file:
ddr3_post_algo_config	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^int ddr3_post_algo_config(void)$/;"	f	typeref:typename:int
ddr3_post_run_alg	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_post_run_alg(void)$/;"	f	typeref:typename:int
ddr3_pre_algo_config	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c	/^int ddr3_pre_algo_config(void)$/;"	f	typeref:typename:int
ddr3_print_freq	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_print_freq(u32 freq)$/;"	f	typeref:typename:void
ddr3_print_version	drivers/ddr/marvell/a38x/ddr3_training.c	/^void ddr3_print_version(void)$/;"	f	typeref:typename:void
ddr3_print_version	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_print_version(void)$/;"	f	typeref:typename:void
ddr3_rd_667_0	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_rd_667_0[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_rd_667_1	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_rd_667_1[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_rd_667_2	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_rd_667_2[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_rd_667_3	drivers/ddr/marvell/axp/ddr3_axp_training_static.h	/^MV_DRAM_TRAINING_INIT ddr3_rd_667_3[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_TRAINING_INIT[]
ddr3_read_leveling_hw	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^int ddr3_read_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_read_leveling_single_cs_rl_mode	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^static int ddr3_read_leveling_single_cs_rl_mode(u32 cs, u32 freq,$/;"	f	typeref:typename:int	file:
ddr3_read_leveling_single_cs_window_mode	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^static int ddr3_read_leveling_single_cs_window_mode(u32 cs, u32 freq,$/;"	f	typeref:typename:int	file:
ddr3_read_leveling_sw	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^int ddr3_read_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_read_pup_reg	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^u32 ddr3_read_pup_reg(u32 mode, u32 cs, u32 pup)$/;"	f	typeref:typename:u32
ddr3_read_spd	arch/arm/mach-keystone/ddr3_spd.c	/^static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)$/;"	f	typeref:typename:int	file:
ddr3_read_training_results	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_read_training_results(void)$/;"	f	typeref:typename:int
ddr3_reset_data	arch/arm/mach-keystone/ddr3.c	/^static void ddr3_reset_data(u32 base, u32 ddr3_size)$/;"	f	typeref:typename:void	file:
ddr3_reset_ddrphy	arch/arm/mach-keystone/ddr3.c	/^void ddr3_reset_ddrphy(void)$/;"	f	typeref:typename:void
ddr3_reset_phy_read_fifo	drivers/ddr/marvell/axp/ddr3_sdram.c	/^void ddr3_reset_phy_read_fifo(void)$/;"	f	typeref:typename:void
ddr3_restore_and_set_final_windows	drivers/ddr/marvell/a38x/ddr3_init.c	/^static void ddr3_restore_and_set_final_windows(u32 *win)$/;"	f	typeref:typename:void	file:
ddr3_restore_and_set_final_windows	drivers/ddr/marvell/axp/ddr3_init.c	/^static void ddr3_restore_and_set_final_windows(u32 *win_backup)$/;"	f	typeref:typename:void	file:
ddr3_run_pbs	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^static u32 ddr3_run_pbs = 1;$/;"	v	typeref:typename:u32	file:
ddr3_rx_shift_dqs_to_first_fail	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static int ddr3_rx_shift_dqs_to_first_fail(MV_DRAM_INFO *dram_info, u32 cur_pup,$/;"	f	typeref:typename:int	file:
ddr3_save_and_set_training_windows	drivers/ddr/marvell/a38x/ddr3_init.c	/^static int ddr3_save_and_set_training_windows(u32 *win)$/;"	f	typeref:typename:int	file:
ddr3_save_and_set_training_windows	drivers/ddr/marvell/axp/ddr3_init.c	/^static void ddr3_save_and_set_training_windows(u32 *win_backup)$/;"	f	typeref:typename:void	file:
ddr3_save_training	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_save_training(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:void
ddr3_sdram_compare	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_sdram_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,$/;"	f	typeref:typename:int
ddr3_sdram_direct_compare	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_sdram_direct_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,$/;"	f	typeref:typename:int
ddr3_sdram_dm_compare	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_sdram_dm_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,$/;"	f	typeref:typename:int
ddr3_sdram_dqs_compare	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_sdram_dqs_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup,$/;"	f	typeref:typename:int
ddr3_sdram_pbs_compare	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int ddr3_sdram_pbs_compare(MV_DRAM_INFO *dram_info, u32 pup_locked,$/;"	f	typeref:typename:int
ddr3_set_dqs_centralization_results	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_set_dqs_centralization_results(MV_DRAM_INFO *dram_info, u32 cs,$/;"	f	typeref:typename:int
ddr3_set_log_level	drivers/ddr/marvell/axp/ddr3_init.c	/^void ddr3_set_log_level(u32 val)$/;"	f	typeref:typename:void
ddr3_set_pbs	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_set_pbs(u32 val)$/;"	f	typeref:typename:void
ddr3_set_pbs_results	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static int ddr3_set_pbs_results(MV_DRAM_INFO *dram_info, int is_tx)$/;"	f	typeref:typename:int	file:
ddr3_set_performance_params	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_set_performance_params(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:void
ddr3_set_sw_wl_rl_debug	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_set_sw_wl_rl_debug(u32 val)$/;"	f	typeref:typename:void
ddr3_shc_cmd_ctrl_data	board/bosch/shc/board.c	/^static const struct cmd_control ddr3_shc_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_shc_data	board/bosch/shc/board.c	/^static const struct ddr_data ddr3_shc_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_shc_emif_reg_data	board/bosch/shc/board.c	/^static struct emif_regs ddr3_shc_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_silicon_init	drivers/ddr/marvell/a38x/ddr3_a38x_training.c	/^int ddr3_silicon_init(void)$/;"	f	typeref:typename:int
ddr3_silicon_post_init	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_silicon_post_init(void)$/;"	f	typeref:typename:int
ddr3_silicon_pre_init	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_silicon_pre_init(void)$/;"	f	typeref:typename:int
ddr3_sk_emif_regs_400Mhz	board/ti/am43xx/board.c	/^static const struct emif_regs ddr3_sk_emif_regs_400Mhz = {$/;"	v	typeref:typename:const struct emif_regs	file:
ddr3_sl50_cmd_ctrl_data	board/tcl/sl50/board.c	/^static const struct cmd_control ddr3_sl50_cmd_ctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
ddr3_sl50_data	board/tcl/sl50/board.c	/^static const struct ddr_data ddr3_sl50_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
ddr3_sl50_emif_reg_data	board/tcl/sl50/board.c	/^static struct emif_regs ddr3_sl50_emif_reg_data = {$/;"	v	typeref:struct:emif_regs	file:
ddr3_sodimm	arch/arm/mach-keystone/ddr3_spd.c	/^struct ddr3_sodimm {$/;"	s	file:
ddr3_spd_cb	arch/arm/mach-keystone/include/mach/ddr3.h	/^struct ddr3_spd_cb {$/;"	s
ddr3_spd_check	common/ddr_spd.c	/^ddr3_spd_check(const ddr3_spd_eeprom_t *spd)$/;"	f	typeref:typename:unsigned int
ddr3_spd_dump	drivers/ddr/fsl/interactive.c	/^void ddr3_spd_dump(const ddr3_spd_eeprom_t *spd)$/;"	f	typeref:typename:void
ddr3_spd_eeprom_s	include/ddr_spd.h	/^typedef struct ddr3_spd_eeprom_s {$/;"	s
ddr3_spd_eeprom_t	include/ddr_spd.h	/^} ddr3_spd_eeprom_t;$/;"	t	typeref:struct:ddr3_spd_eeprom_s
ddr3_spd_init	drivers/ddr/marvell/axp/ddr3_spd.c	/^int ddr3_spd_init(MV_DIMM_INFO *info, u32 dimm_addr, u32 dimm_width)$/;"	f	typeref:typename:int
ddr3_spd_sum_init	drivers/ddr/marvell/axp/ddr3_spd.c	/^int ddr3_spd_sum_init(MV_DIMM_INFO *info, MV_DIMM_INFO *sum_info, u32 dimm)$/;"	f	typeref:typename:int
ddr3_special_pattern_i_search	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_special_pattern_i_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,$/;"	f	typeref:typename:int
ddr3_special_pattern_ii_search	drivers/ddr/marvell/axp/ddr3_dqs.c	/^int ddr3_special_pattern_ii_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,$/;"	f	typeref:typename:int
ddr3_sratio	board/siemens/draco/board.h	/^	unsigned short int ddr3_sratio;		\/* 0x0080 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned short int
ddr3_static_mc_init	drivers/ddr/marvell/axp/ddr3_init.c	/^void ddr3_static_mc_init(void)$/;"	f	typeref:typename:void
ddr3_static_training_init	drivers/ddr/marvell/axp/ddr3_init.c	/^void ddr3_static_training_init(void)$/;"	f	typeref:typename:void
ddr3_sw_wl_rl_debug	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^static u32 ddr3_sw_wl_rl_debug;$/;"	v	typeref:typename:u32	file:
ddr3_theadorable	board/theadorable/theadorable.c	/^static MV_DRAM_MC_INIT ddr3_theadorable[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]	file:
ddr3_tip_a38x_get_device_info	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr)$/;"	f	typeref:typename:int
ddr3_tip_a38x_get_freq_config	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_get_freq_config(u8 dev_num, enum hws_ddr_freq freq,$/;"	f	typeref:typename:int
ddr3_tip_a38x_get_init_freq	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_get_init_freq(int dev_num, enum hws_ddr_freq *freq)$/;"	f	typeref:typename:int
ddr3_tip_a38x_get_medium_freq	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_get_medium_freq(int dev_num, enum hws_ddr_freq *freq)$/;"	f	typeref:typename:int
ddr3_tip_a38x_if_read	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_if_read(u8 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int
ddr3_tip_a38x_if_write	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_if_write(u8 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int
ddr3_tip_a38x_pipe_enable	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_pipe_enable(u8 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int
ddr3_tip_a38x_select_ddr_controller	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_a38x_select_ddr_controller(u8 dev_num, int enable)$/;"	f	typeref:typename:int
ddr3_tip_a38x_set_divider	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id,$/;"	f	typeref:typename:int	file:
ddr3_tip_access_atr	drivers/ddr/marvell/a38x/ddr3_debug.c	/^static int ddr3_tip_access_atr(u32 dev_num, u32 flag_id, u32 value, u32 **ptr)$/;"	f	typeref:typename:int	file:
ddr3_tip_bist_activate	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^int ddr3_tip_bist_activate(u32 dev_num, enum hws_pattern pattern,$/;"	f	typeref:typename:int
ddr3_tip_bist_operation	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^static int ddr3_tip_bist_operation(u32 dev_num,$/;"	f	typeref:typename:int	file:
ddr3_tip_bist_read_result	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int
ddr3_tip_bus_access	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_bus_access(u32 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int	file:
ddr3_tip_bus_read	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_bus_read(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int
ddr3_tip_bus_read_modify_write	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_bus_read_modify_write(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_bus_write	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_bus_write(u32 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int
ddr3_tip_calc_cs_mask	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_calc_cs_mask(u32 dev_num, u32 if_id, u32 effective_cs,$/;"	f	typeref:typename:int
ddr3_tip_centr_skip_min_win_check	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^int ddr3_tip_centr_skip_min_win_check = 0;$/;"	v	typeref:typename:int
ddr3_tip_centralization	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^static int ddr3_tip_centralization(u32 dev_num, u32 mode)$/;"	f	typeref:typename:int	file:
ddr3_tip_centralization_rx	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^int ddr3_tip_centralization_rx(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_centralization_tx	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^int ddr3_tip_centralization_tx(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_clean_pbs_result	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^int ddr3_tip_clean_pbs_result(u32 dev_num, enum pbs_dir pbs_mode)$/;"	f	typeref:typename:int
ddr3_tip_cmd_addr_init_delay	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap)$/;"	f	typeref:typename:int
ddr3_tip_compare	drivers/ddr/marvell/a38x/ddr3_debug.c	/^static u32 ddr3_tip_compare(u32 if_id, u32 *p_src, u32 *p_dst,$/;"	f	typeref:typename:u32	file:
ddr3_tip_configure_cs	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable)$/;"	f	typeref:typename:int
ddr3_tip_configure_odpg	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_configure_phy	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_configure_phy(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_convert_tune_result	drivers/ddr/marvell/a38x/ddr3_debug.c	/^char *ddr3_tip_convert_tune_result(enum hws_result tune_result)$/;"	f	typeref:typename:char *
ddr3_tip_ddr3_auto_tune	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_ddr3_auto_tune(u32 dev_num)$/;"	f	typeref:typename:int	file:
ddr3_tip_ddr3_reset_phy_regs	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_ddr3_reset_phy_regs(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_ddr3_training_main_flow	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_ddr3_training_main_flow(u32 dev_num)$/;"	f	typeref:typename:int	file:
ddr3_tip_dynamic_per_bit_read_leveling	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_dynamic_per_bit_read_leveling(u32 dev_num, u32 freq)$/;"	f	typeref:typename:int
ddr3_tip_dynamic_per_bit_read_leveling_seq	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_dynamic_per_bit_read_leveling_seq(u32 dev_num)$/;"	f	typeref:typename:int	file:
ddr3_tip_dynamic_read_leveling	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_dynamic_read_leveling(u32 dev_num, u32 freq)$/;"	f	typeref:typename:int
ddr3_tip_dynamic_read_leveling_seq	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_dynamic_read_leveling_seq(u32 dev_num)$/;"	f	typeref:typename:int	file:
ddr3_tip_dynamic_write_leveling	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_dynamic_write_leveling(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_dynamic_write_leveling_seq	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_dynamic_write_leveling_seq(u32 dev_num)$/;"	f	typeref:typename:int	file:
ddr3_tip_dynamic_write_leveling_supp	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_dynamic_write_leveling_supp(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_enable_init_sequence	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_enable_init_sequence(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_ext_read	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_ext_read(u32 dev_num, u32 if_id, u32 reg_addr,$/;"	f	typeref:typename:int
ddr3_tip_ext_write	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr,$/;"	f	typeref:typename:int
ddr3_tip_freq_set	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_freq_set(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_get_buf_max	drivers/ddr/marvell/a38x/ddr3_training.c	/^u8 ddr3_tip_get_buf_max(u8 *buf_ptr)$/;"	f	typeref:typename:u8
ddr3_tip_get_buf_min	drivers/ddr/marvell/a38x/ddr3_training.c	/^u8 ddr3_tip_get_buf_min(u8 *buf_ptr)$/;"	f	typeref:typename:u8
ddr3_tip_get_buf_ptr	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 *ddr3_tip_get_buf_ptr(u32 dev_num, enum hws_search_dir search,$/;"	f	typeref:typename:u32 *
ddr3_tip_get_device_info	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_get_device_info(u32 dev_num, struct ddr3_device_info *info_ptr)$/;"	f	typeref:typename:int
ddr3_tip_get_first_active_if	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_get_first_active_if(u8 dev_num, u32 interface_mask,$/;"	f	typeref:typename:int
ddr3_tip_get_init_freq	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^u32 ddr3_tip_get_init_freq(void)$/;"	f	typeref:typename:u32
ddr3_tip_get_mask_results_dq_reg	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u16 *ddr3_tip_get_mask_results_dq_reg()$/;"	f	typeref:typename:u16 *
ddr3_tip_get_mask_results_pup_reg_map	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u16 *ddr3_tip_get_mask_results_pup_reg_map()$/;"	f	typeref:typename:u16 *
ddr3_tip_get_pattern_table	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^struct pattern_info *ddr3_tip_get_pattern_table()$/;"	f	typeref:struct:pattern_info *
ddr3_tip_get_result_ptr	drivers/ddr/marvell/a38x/ddr3_debug.c	/^enum hws_result *ddr3_tip_get_result_ptr(u32 stage)$/;"	f	typeref:enum:hws_result *
ddr3_tip_if_polling	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_if_polling(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_if_read	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_if_read(u32 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int
ddr3_tip_if_write	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_if_write(u32 dev_num, enum hws_access_type interface_access,$/;"	f	typeref:typename:int
ddr3_tip_init_a38x	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^int ddr3_tip_init_a38x(u32 dev_num, u32 board_id)$/;"	f	typeref:typename:int
ddr3_tip_init_a38x_silicon	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static int ddr3_tip_init_a38x_silicon(u32 dev_num, u32 board_id)$/;"	f	typeref:typename:int	file:
ddr3_tip_init_config_func	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_init_config_func(u32 dev_num,$/;"	f	typeref:typename:int
ddr3_tip_init_specific_reg_config	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_init_specific_reg_config(u32 dev_num, reg_data *reg_config_arr)$/;"	f	typeref:typename:int
ddr3_tip_init_static_config_db	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_init_static_config_db($/;"	f	typeref:typename:int
ddr3_tip_ip_training	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_ip_training_wrapper	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_ip_training_wrapper(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_ip_training_wrapper_int	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_ip_training_wrapper_int(u32 dev_num,$/;"	f	typeref:typename:int
ddr3_tip_is_pup_lock	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_is_pup_lock(u32 *pup_buf, enum hws_training_result read_mode)$/;"	f	typeref:typename:int
ddr3_tip_legacy_dynamic_read_leveling	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_legacy_dynamic_read_leveling(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_legacy_dynamic_write_leveling	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_legacy_dynamic_write_leveling(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_load_all_pattern_to_mem	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_load_all_pattern_to_mem(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_load_pattern_to_mem	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_load_pattern_to_mem(u32 dev_num, enum hws_pattern pattern)$/;"	f	typeref:typename:int
ddr3_tip_load_pattern_to_mem_by_cpu	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_load_pattern_to_mem_by_cpu(u32 dev_num, enum hws_pattern pattern,$/;"	f	typeref:typename:int
ddr3_tip_load_pattern_to_odpg	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_load_pattern_to_odpg(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int
ddr3_tip_load_phy_values	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_load_phy_values(int b_load)$/;"	f	typeref:typename:int
ddr3_tip_pad_inv	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_pad_inv(u32 dev_num, u32 if_id)$/;"	f	typeref:typename:int	file:
ddr3_tip_pbs	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^int ddr3_tip_pbs(u32 dev_num, enum pbs_dir pbs_mode)$/;"	f	typeref:typename:int
ddr3_tip_pbs_rx	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^int ddr3_tip_pbs_rx(u32 uidev_num)$/;"	f	typeref:typename:int
ddr3_tip_pbs_tx	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^int ddr3_tip_pbs_tx(u32 uidev_num)$/;"	f	typeref:typename:int
ddr3_tip_print_adll	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_print_adll(void)$/;"	f	typeref:typename:int
ddr3_tip_print_all_pbs_result	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^int ddr3_tip_print_all_pbs_result(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_print_bist_res	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^void ddr3_tip_print_bist_res(void)$/;"	f	typeref:typename:void
ddr3_tip_print_centralization_result	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^int ddr3_tip_print_centralization_result(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_print_log	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_print_log(u32 dev_num, u32 mem_addr)$/;"	f	typeref:typename:int
ddr3_tip_print_pbs_result	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode)$/;"	f	typeref:typename:int
ddr3_tip_print_stability_log	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_print_stability_log(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_print_wl_supp_result	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^int ddr3_tip_print_wl_supp_result(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_process_result	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_process_result(u32 *ar_result, enum hws_edge e_edge,$/;"	f	typeref:typename:int
ddr3_tip_rank_control	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_rank_control(u32 dev_num, u32 if_id)$/;"	f	typeref:typename:int	file:
ddr3_tip_read_leveling_static_config	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_read_leveling_static_config(u32 dev_num,$/;"	f	typeref:typename:int
ddr3_tip_read_training_result	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_read_training_result(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int
ddr3_tip_reg_dump	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_reg_dump(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_register_dq_table	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_register_dq_table(u32 dev_num, u32 *table)$/;"	f	typeref:typename:int
ddr3_tip_register_xsb_info	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_register_xsb_info(u32 dev_num, struct hws_xsb_info *xsb_info_table)$/;"	f	typeref:typename:int
ddr3_tip_reset_fifo_ptr	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_reset_fifo_ptr(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_restore_dunit_regs	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_restore_dunit_regs(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_run_static_alg	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_run_static_alg(u32 dev_num, enum hws_ddr_freq freq)$/;"	f	typeref:typename:int
ddr3_tip_run_sweep_test	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_run_sweep_test(int dev_num, u32 repeat_num, u32 direction,$/;"	f	typeref:typename:int
ddr3_tip_set_atr	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_set_atr(u32 dev_num, u32 flag_id, u32 value)$/;"	f	typeref:typename:int
ddr3_tip_set_timing	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_set_timing(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int	file:
ddr3_tip_special_rx	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^int ddr3_tip_special_rx(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_special_rx_run_once_flag	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^static u8 ddr3_tip_special_rx_run_once_flag;$/;"	v	typeref:typename:u8	file:
ddr3_tip_static_init_controller	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_static_init_controller(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_static_phy_init_controller	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_static_phy_init_controller(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_static_round_trip_arr_build	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_static_round_trip_arr_build(u32 dev_num,$/;"	f	typeref:typename:int
ddr3_tip_sweep_test	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int ddr3_tip_sweep_test(u32 dev_num, u32 test_type,$/;"	f	typeref:typename:int
ddr3_tip_training_ip_test	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int ddr3_tip_training_ip_test(u32 dev_num, enum hws_training_result result_type,$/;"	f	typeref:typename:int
ddr3_tip_tune_training_params	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_tune_training_params(u32 dev_num,$/;"	f	typeref:typename:int
ddr3_tip_vref	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^int ddr3_tip_vref(u32 dev_num)$/;"	f	typeref:typename:int
ddr3_tip_wl_supp_align_err_shift	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_wl_supp_align_err_shift(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int	file:
ddr3_tip_wl_supp_align_phase_shift	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_wl_supp_align_phase_shift(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int	file:
ddr3_tip_wl_supp_one_clk_err_shift	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_wl_supp_one_clk_err_shift(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int	file:
ddr3_tip_write_additional_odt_setting	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)$/;"	f	typeref:typename:int
ddr3_tip_write_cs_result	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_write_cs_result(u32 dev_num, u32 offset)$/;"	f	typeref:typename:int
ddr3_tip_write_leveling_static_config	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int ddr3_tip_write_leveling_static_config(u32 dev_num, u32 if_id,$/;"	f	typeref:typename:int
ddr3_tip_write_mrs_cmd	drivers/ddr/marvell/a38x/ddr3_training.c	/^int ddr3_tip_write_mrs_cmd(u32 dev_num, u32 *cs_mask_arr, u32 cmd,$/;"	f	typeref:typename:int
ddr3_tip_write_odt	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int ddr3_tip_write_odt(u32 dev_num, enum hws_access_type access_type,$/;"	f	typeref:typename:int	file:
ddr3_tip_xsb_compare_test	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static int ddr3_tip_xsb_compare_test(u32 dev_num, u32 if_id, u32 bus_id,$/;"	f	typeref:typename:int	file:
ddr3_training_suspend_resume	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^int ddr3_training_suspend_resume(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_tx_shift_dqs_adll_step_before_fail	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static int ddr3_tx_shift_dqs_adll_step_before_fail(MV_DRAM_INFO *dram_info,$/;"	f	typeref:typename:int	file:
ddr3_valid_cl_to_cl	drivers/ddr/marvell/axp/ddr3_init.c	/^u32 ddr3_valid_cl_to_cl(u32 ui_valid_cl)$/;"	f	typeref:typename:u32
ddr3_wl_supplement	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^int ddr3_wl_supplement(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_write_ctrl_pup_reg	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^static void ddr3_write_ctrl_pup_reg(int bc_acc, u32 pup, u32 reg_addr, u32 data)$/;"	f	typeref:typename:void	file:
ddr3_write_leveling_hw	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^int ddr3_write_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_write_leveling_hw_reg_dimm	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^int ddr3_write_leveling_hw_reg_dimm(u32 freq, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_write_leveling_single_cs	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1,$/;"	f	typeref:typename:int	file:
ddr3_write_leveling_sw	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^int ddr3_write_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:int
ddr3_write_leveling_sw_reg_dimm	drivers/ddr/marvell/axp/ddr3_write_leveling.c	/^int ddr3_write_leveling_sw_reg_dimm(u32 freq, int ratio_2to1,$/;"	f	typeref:typename:int
ddr3_write_pup_reg	drivers/ddr/marvell/axp/ddr3_hw_training.c	/^void ddr3_write_pup_reg(u32 mode, u32 cs, u32 pup, u32 phase, u32 delay)$/;"	f	typeref:typename:void
ddr3_write_recovery	arch/arm/mach-sunxi/dram_sun4i.c	/^static u32 ddr3_write_recovery(u32 clk)$/;"	f	typeref:typename:u32	file:
ddr3a_333	board/ti/ks2_evm/ddr3_k2hk.c	/^struct pll_init_data ddr3a_333 = DDR3_PLL_333(A);$/;"	v	typeref:struct:pll_init_data
ddr3a_400	board/ti/ks2_evm/ddr3_k2hk.c	/^struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);$/;"	v	typeref:struct:pll_init_data
ddr3a_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	ddr3a_clk,$/;"	e	enum:ext_clk_e
ddr3apllclk	arch/arm/dts/k2e-clocks.dtsi	/^	ddr3apllclk: ddr3apllclk@2620360 {$/;"	l
ddr3apllclk	arch/arm/dts/k2hk-clocks.dtsi	/^	ddr3apllclk: ddr3apllclk@2620360 {$/;"	l
ddr3apllclk	arch/arm/dts/k2l-clocks.dtsi	/^	ddr3apllclk: ddr3apllclk@2620360 {$/;"	l
ddr3b_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	ddr3b_clk,$/;"	e	enum:ext_clk_e
ddr3bpllclk	arch/arm/dts/k2hk-clocks.dtsi	/^	ddr3bpllclk: ddr3bpllclk@2620368 {$/;"	l
ddr3lv_support	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int ddr3lv_support;$/;"	m	struct:pei_data	typeref:typename:int
ddr3phy_1600_2g	board/ti/ks2_evm/ddr3_cfg.c	/^struct ddr3_phy_config ddr3phy_1600_2g = {$/;"	v	typeref:struct:ddr3_phy_config
ddr3phy_800_2g	board/ti/ks2_evm/ddr3_k2g.c	/^struct ddr3_phy_config ddr3phy_800_2g = {$/;"	v	typeref:struct:ddr3_phy_config
ddr3x_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	ddr2x_clk, ddr3x_clk, dci_clk,$/;"	e	enum:zynq_clk
ddr3x_get_rate	arch/arm/mach-zynq/clk.c	/^static unsigned long ddr3x_get_rate(struct clk *clk)$/;"	f	typeref:typename:unsigned long	file:
ddr4_spd_check	common/ddr_spd.c	/^unsigned int ddr4_spd_check(const struct ddr4_spd_eeprom_s *spd)$/;"	f	typeref:typename:unsigned int
ddr4_spd_dump	drivers/ddr/fsl/interactive.c	/^void ddr4_spd_dump(const struct ddr4_spd_eeprom_s *spd)$/;"	f	typeref:typename:void
ddr4_spd_eeprom_s	include/ddr_spd.h	/^struct ddr4_spd_eeprom_s {$/;"	s
ddr512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct ddr512x {$/;"	s
ddr512x_config	arch/powerpc/include/asm/immap_512x.h	/^typedef struct ddr512x_config {$/;"	s
ddr512x_config_t	arch/powerpc/include/asm/immap_512x.h	/^} ddr512x_config_t;$/;"	t	typeref:struct:ddr512x_config
ddr512x_t	arch/powerpc/include/asm/immap_512x.h	/^} ddr512x_t;$/;"	t	typeref:struct:ddr512x
ddr83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct ddr83xx {$/;"	s
ddr83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} ddr83xx_t;$/;"	t	typeref:struct:ddr83xx
ddr_1v8_compensation	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ddr_1v8_compensation;	\/* 0xE4  *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ddr_2v5_compensation	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ddr_2v5_compensation;	\/* 0xE8 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ddr_2x_dqs_clk	arch/arm/dts/socfpga.dtsi	/^						ddr_2x_dqs_clk: ddr_2x_dqs_clk {$/;"	l	label:sdram_pll
ddr_a0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a10	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a10;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a11	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a11;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a12	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a12;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a13	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a13;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a14	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a14;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a15	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a15;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a2;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a3;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a4	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a4;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a5	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a5;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a6	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a6;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a7	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a7;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a8	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a8;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_a9	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_a9;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_ba0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_ba0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_ba1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_ba1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_ba2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_ba2;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_cal_delay	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 ddr_cal_delay;	\/* DDR Calibration Delay Value		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
ddr_cas_id	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^typedef enum ddr_cas_id {$/;"	g	file:
ddr_cas_id_t	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^} ddr_cas_id_t;$/;"	t	typeref:enum:ddr_cas_id	file:
ddr_casn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_casn;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_ccr_low	include/fsl_ifc.h	/^	u32 ddr_ccr_low;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
ddr_cdr1	include/fsl_ddr_sdram.h	/^	unsigned int ddr_cdr1;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_cdr1	include/fsl_ddr_sdram.h	/^	unsigned int ddr_cdr1;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
ddr_cdr1	include/fsl_immap.h	/^	u32	ddr_cdr1;		\/* Control Driver 1 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_cdr2	include/fsl_ddr_sdram.h	/^	unsigned int ddr_cdr2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_cdr2	include/fsl_ddr_sdram.h	/^	unsigned int ddr_cdr2;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
ddr_cdr2	include/fsl_immap.h	/^	u32	ddr_cdr2;		\/* Control Driver 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_cfg_2_rbc	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^const char ddr_cfg_2_rbc[] = {$/;"	v	typeref:typename:const char[]
ddr_cfg_regs_1000	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_1000 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_1000_2nd	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_1000_2nd = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_1200	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_1200 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_1200_2nd	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_1200_2nd = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_1333	board/freescale/bsc9132qds/ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_1333 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_667	board/freescale/p1010rdb/ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_667 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_800	board/freescale/bsc9131rdb/ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_800	board/freescale/bsc9132qds/ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_800	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_800	board/freescale/p1010rdb/ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_800_2nd	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_800_2nd = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_900	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_900 = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_cfg_regs_900_2nd	board/freescale/corenet_ds/p4080ds_ddr.c	/^fsl_ddr_cfg_regs_t ddr_cfg_regs_900_2nd = {$/;"	v	typeref:typename:fsl_ddr_cfg_regs_t
ddr_ck	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_ck;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_cke	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_cke;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_clk	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct clk ddr_clk;$/;"	m	struct:dram_info	typeref:struct:clk	file:
ddr_clk	arch/blackfin/cpu/initcode.c	/^	u32 ddr_clk;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
ddr_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ddr_clk_ctrl; \/* 0x124 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
ddr_clktr	board/amcc/canyonlands/canyonlands.c	/^u32 ddr_clktr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_clktr	board/amcc/katmai/katmai.c	/^u32 ddr_clktr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_clktr	board/amcc/luan/luan.c	/^u32 ddr_clktr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_clktr	board/amcc/yucca/yucca.c	/^u32 ddr_clktr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_clktr	board/mosaixtech/icon/icon.c	/^u32 ddr_clktr(u32 default_val)$/;"	f	typeref:typename:u32
ddr_clock_init	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void ddr_clock_init(void)$/;"	f	typeref:typename:void	file:
ddr_clrbits32	include/fsl_ddr.h	/^#define ddr_clrbits32(/;"	d
ddr_clrsetbits32	include/fsl_ddr.h	/^#define ddr_clrsetbits32(/;"	d
ddr_cmd_reg	arch/arm/cpu/armv7/am33xx/ddr.c	/^static struct ddr_cmd_regs *ddr_cmd_reg[2] = {$/;"	v	typeref:struct:ddr_cmd_regs * [2]	file:
ddr_cmd_regs	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ddr_cmd_regs {$/;"	s
ddr_cmdtctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ddr_cmdtctrl {$/;"	s
ddr_command	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_command;	\/* Command Register *\/$/;"	m	struct:ddr512x	typeref:typename:u32
ddr_compact_command	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_compact_command;	\/* Compact Command Register *\/$/;"	m	struct:ddr512x	typeref:typename:u32
ddr_compute_dimm_parameters	drivers/ddr/fsl/ddr1_dimm_params.c	/^unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int
ddr_compute_dimm_parameters	drivers/ddr/fsl/ddr2_dimm_params.c	/^unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int
ddr_compute_dimm_parameters	drivers/ddr/fsl/ddr3_dimm_params.c	/^unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int
ddr_compute_dimm_parameters	drivers/ddr/fsl/ddr4_dimm_params.c	/^unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num,$/;"	f	typeref:typename:unsigned int
ddr_config	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	struct rk3036_ddr_config ddr_config;$/;"	m	struct:rk3036_sdram_priv	typeref:struct:rk3036_ddr_config	file:
ddr_config	arch/blackfin/cpu/initcode.c	/^struct ddr_config {$/;"	s	file:
ddr_config	board/compulab/cm_fx6/spl.c	/^enum ddr_config {$/;"	g	file:
ddr_config_table	arch/blackfin/cpu/initcode.c	/^static struct ddr_config ddr_config_table[] = {$/;"	v	typeref:struct:ddr_config[]	file:
ddr_cs_bnds	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct ddr_cs_bnds {$/;"	s
ddr_cs_bnds_t	arch/powerpc/include/asm/immap_83xx.h	/^} ddr_cs_bnds_t;$/;"	t	typeref:struct:ddr_cs_bnds
ddr_csn0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_csn0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_ctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ddr_ctrl {$/;"	s
ddr_ctrl0	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 ddr_ctrl0;		\/*0x50*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
ddr_ctrl_init	board/freescale/s32v234evb/s32v234evb.c	/^void ddr_ctrl_init(void)$/;"	f	typeref:typename:void
ddr_d0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d10	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d10;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d11	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d11;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d12	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d12;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d13	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d13;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d14	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d14;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d15	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d15;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d2;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d3;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d4	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d4;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d5	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d5;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d6	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d6;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d7	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d7;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d8	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d8;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_d9	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_d9;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_data	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ddr_data {$/;"	s
ddr_data_init	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddr_data_init;	\/* SDRAM Data Initialization *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
ddr_data_init	include/fsl_ddr_sdram.h	/^	unsigned int ddr_data_init;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_data_reg	arch/arm/cpu/armv7/am33xx/ddr.c	/^static struct ddr_data_regs *ddr_data_reg[2] = {$/;"	v	typeref:struct:ddr_data_regs * [2]	file:
ddr_data_regs	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ddr_data_regs {$/;"	s
ddr_delay	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^static void ddr_delay(int d)$/;"	f	typeref:typename:void	file:
ddr_dpll_params_2128mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params ddr_dpll_params_2128mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
ddr_dpll_params_2664mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params ddr_dpll_params_2664mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
ddr_dq_clk	arch/arm/dts/socfpga.dtsi	/^						ddr_dq_clk: ddr_dq_clk {$/;"	l	label:sdram_pll
ddr_dqm0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_dqm0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_dqm1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_dqm1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_dqs0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_dqs0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_dqs1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_dqs1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_dqs_clk	arch/arm/dts/socfpga.dtsi	/^						ddr_dqs_clk: ddr_dqs_clk {$/;"	l	label:sdram_pll
ddr_dqsn0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_dqsn0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_dqsn1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_dqsn1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_dsr1	include/fsl_immap.h	/^	u32	ddr_dsr1;		\/* Debug Status 1 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_dsr2	include/fsl_immap.h	/^	u32	ddr_dsr2;		\/* Debug Status 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_enable_ecc	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^void ddr_enable_ecc(unsigned int dram_size)$/;"	f	typeref:typename:void
ddr_enable_ecc	drivers/ddr/fsl/mpc85xx_ddr_gen1.c	/^ddr_enable_ecc(unsigned int dram_size)$/;"	f	typeref:typename:void
ddr_eor	include/fsl_ddr_sdram.h	/^	unsigned int ddr_eor;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_freq	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ddr_freq;$/;"	m	struct:bootrom_sw_info	typeref:typename:u32
ddr_freq	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 ddr_freq;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
ddr_freq	arch/mips/mach-ath79/ar934x/clk.c	/^	u16				ddr_freq;$/;"	m	struct:ar934x_clock_config	typeref:typename:u16	file:
ddr_frequency	arch/x86/include/asm/global_data.h	/^	uint16_t ddr_frequency;$/;"	m	struct:dimm_info	typeref:typename:uint16_t
ddr_in32	include/fsl_ddr.h	/^#define ddr_in32(/;"	d
ddr_init	arch/arm/cpu/arm926ejs/lpc32xx/dram.c	/^void ddr_init(struct emc_dram_settings *dram)$/;"	f	typeref:typename:void
ddr_init	arch/mips/mach-ath79/ar933x/ddr.c	/^void ddr_init(void)$/;"	f	typeref:typename:void
ddr_init	arch/mips/mach-ath79/qca953x/ddr.c	/^void ddr_init(void)$/;"	f	typeref:typename:void
ddr_init	board/freescale/mx6sabresd/mx6sabresd.c	/^static void ddr_init(int *table, int size)$/;"	f	typeref:typename:void	file:
ddr_init_addr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddr_init_addr;	\/* DDR training initialization address *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
ddr_init_addr	include/fsl_ddr_sdram.h	/^	unsigned int ddr_init_addr;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_init_ext_addr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddr_init_ext_addr;	\/* DDR training initialization extended address *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
ddr_init_ext_addr	include/fsl_ddr_sdram.h	/^	unsigned int ddr_init_ext_addr;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_iomux_q	board/compulab/cm_fx6/spl.c	/^static struct mx6dq_iomux_ddr_regs ddr_iomux_q = { CM_FX6_DDR_IOMUX_CFG };$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs	file:
ddr_iomux_s	board/compulab/cm_fx6/spl.c	/^static struct mx6sdl_iomux_ddr_regs ddr_iomux_s = { CM_FX6_DDR_IOMUX_CFG };$/;"	v	typeref:struct:mx6sdl_iomux_ddr_regs	file:
ddr_ip_rev1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddr_ip_rev1;	\/* DDR IP block revision 1 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
ddr_ip_rev2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddr_ip_rev2;	\/* DDR IP block revision 2 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
ddr_lap_count	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 ddr_lap_count;	\/* DDR Calibration Measured Value	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
ddr_lap_nom	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 ddr_lap_nom;	\/* DDR Calibration Nominal Value	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
ddr_lib_debug_block	drivers/ddr/marvell/a38x/ddr3_logging_def.h	/^enum ddr_lib_debug_block {$/;"	g
ddr_memory_compare	arch/arm/mach-keystone/cmd_ddr3.c	/^static int ddr_memory_compare(u32 address1, u32 address2, u32 size)$/;"	f	typeref:typename:int	file:
ddr_memory_ecc_err	arch/arm/mach-keystone/cmd_ddr3.c	/^static int ddr_memory_ecc_err(u32 base, u32 address, u32 ecc_err)$/;"	f	typeref:typename:int	file:
ddr_memory_test	arch/arm/mach-keystone/cmd_ddr3.c	/^static int ddr_memory_test(u32 start_address, u32 end_address, int quick)$/;"	f	typeref:typename:int	file:
ddr_mode	arch/arm/mach-exynos/include/mach/dmc.h	/^enum ddr_mode {$/;"	g
ddr_mode	include/mmc.h	/^	int ddr_mode;$/;"	m	struct:mmc	typeref:typename:int
ddr_modes	drivers/ddr/marvell/a38x/ddr3_init.c	/^struct dram_modes ddr_modes[] = {$/;"	v	typeref:struct:dram_modes[]
ddr_modes	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^MV_DRAM_MODES ddr_modes[MV_DDR3_MODES_NUMBER] = {$/;"	v	typeref:typename:MV_DRAM_MODES[]
ddr_nck	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_nck;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_odt	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_odt;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_out32	include/fsl_ddr.h	/^#define ddr_out32(/;"	d
ddr_pad	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ddr_pad;		\/* 0xF0 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ddr_phy_ctl_reset	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void ddr_phy_ctl_reset(struct rk3288_cru *cru, u32 ch, u32 n)$/;"	f	typeref:typename:void	file:
ddr_phy_init	board/freescale/s32v234evb/s32v234evb.c	/^void ddr_phy_init(void)$/;"	f	typeref:typename:void
ddr_phy_set_do_resync	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static void ddr_phy_set_do_resync(struct exynos5420_phy_control *phy_ctrl)$/;"	f	typeref:typename:void	file:
ddr_phyctrl1	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int ddr_phyctrl1;$/;"	m	struct:emif4	typeref:typename:unsigned int
ddr_phyctrl1_shdw	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int ddr_phyctrl1_shdw;$/;"	m	struct:emif4	typeref:typename:unsigned int
ddr_phyctrl2	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int ddr_phyctrl2;$/;"	m	struct:emif4	typeref:typename:unsigned int
ddr_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux ddr_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
ddr_pll	arch/mips/mach-ath79/ar934x/clk.c	/^	struct ar934x_pll_config	ddr_pll;$/;"	m	struct:ar934x_clock_config	typeref:struct:ar934x_pll_config	file:
ddr_pll_bypass_ti816x	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^static void ddr_pll_bypass_ti816x(void)$/;"	f	typeref:typename:void	file:
ddr_pll_config	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^void ddr_pll_config(unsigned int ddrpll_m)$/;"	f	typeref:typename:void
ddr_pll_config	arch/arm/cpu/armv7/am33xx/emif4.c	/^void __weak ddr_pll_config(unsigned int ddrpll_m)$/;"	f	typeref:typename:void __weak
ddr_pll_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ddr_pll_ctrl; \/* 0x104 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
ddr_pll_init_ti816x	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^static void ddr_pll_init_ti816x(void)$/;"	f	typeref:typename:void	file:
ddr_rasn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_rasn;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_raw_timing	board/Arcturus/ucp1020/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/b4860qds/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/bsc9131rdb/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/bsc9132qds/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/c29xpcie/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/ls1021aqds/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/ls1043ardb/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/ls2080a/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/p1010rdb/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/p1023rdb/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/p1_p2_rdb_pc/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_raw_timing	board/freescale/t102xrdb/ddr.c	/^dimm_params_t ddr_raw_timing = {$/;"	v	typeref:typename:dimm_params_t
ddr_rcvn	arch/x86/cpu/quark/smc.c	/^static const uint16_t ddr_rcvn[] = {129, 498};$/;"	v	typeref:typename:const uint16_t[]	file:
ddr_rdqs	arch/x86/cpu/quark/smc.c	/^static const uint8_t ddr_rdqs[] = {32, 24};$/;"	v	typeref:typename:const uint8_t[]	file:
ddr_refresh_2x	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int ddr_refresh_2x;$/;"	m	struct:pei_data	typeref:typename:int
ddr_refresh_rate_config	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int ddr_refresh_rate_config;$/;"	m	struct:pei_data	typeref:typename:int
ddr_reg	arch/arm/dts/tegra30-beaver.dts	/^		ddr_reg: regulator@2 {$/;"	l
ddr_reg	arch/arm/dts/tegra30-cardhu.dts	/^		ddr_reg: regulator@100 {$/;"	l
ddr_regs	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^struct ddr_regs {$/;"	s
ddr_reset	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void ddr_reset(struct rk3288_cru *cru, u32 ch, u32 ctl, u32 phy)$/;"	f	typeref:typename:void	file:
ddr_resetn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_resetn;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_rgn_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 ddr_rgn_con[35];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[35]
ddr_scan_option	board/t3corp/t3corp.c	/^struct sdram_timing *ddr_scan_option(struct sdram_timing *default_val)$/;"	f	typeref:struct:sdram_timing *
ddr_sdram_cfg	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_cfg;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_cfg_2	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_cfg_2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_cfg_3	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_cfg_3;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_clk_cntl	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_clk_cntl;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_interval	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_interval;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_md_cntl	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_md_cntl;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_10	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_10;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_11	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_11;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_12	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_12;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_13	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_13;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_14	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_14;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_15	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_15;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_16	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_16;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_2	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_3	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_3;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_4	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_4;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_5	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_5;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_6	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_6;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_7	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_7;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_8	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_8;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_mode_9	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_mode_9;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_1	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_rcw_1;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_1	include/fsl_immap.h	/^	u32	ddr_sdram_rcw_1;	\/* Control Words 1 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_sdram_rcw_2	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_rcw_2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_2	include/fsl_immap.h	/^	u32	ddr_sdram_rcw_2;	\/* Control Words 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_sdram_rcw_3	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_rcw_3;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_3	include/fsl_immap.h	/^	u32	ddr_sdram_rcw_3;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_sdram_rcw_4	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_rcw_4;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_4	include/fsl_immap.h	/^	u32	ddr_sdram_rcw_4;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_sdram_rcw_5	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_rcw_5;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_5	include/fsl_immap.h	/^	u32	ddr_sdram_rcw_5;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_sdram_rcw_6	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sdram_rcw_6;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sdram_rcw_6	include/fsl_immap.h	/^	u32	ddr_sdram_rcw_6;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_secondary	arch/powerpc/include/asm/immap_83xx.h	/^	ddr83xx_t		ddr_secondary;	\/* Secondary DDR Memory Controller Memory Map *\/$/;"	m	struct:immap	typeref:typename:ddr83xx_t
ddr_self_ref_ctrl	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ddr_self_ref_ctrl;$/;"	m	struct:src	typeref:typename:u32
ddr_set_arbiter	drivers/ddr/microchip/ddr2.c	/^static void ddr_set_arbiter(struct ddr2_ctrl_regs *ctrl,$/;"	f	typeref:typename:void	file:
ddr_set_ddr3_mode	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void ddr_set_ddr3_mode(struct rk3288_grf *grf, uint channel,$/;"	f	typeref:typename:void	file:
ddr_set_en_bst_odt	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void ddr_set_en_bst_odt(struct rk3288_grf *grf, uint channel,$/;"	f	typeref:typename:void	file:
ddr_set_enable	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void ddr_set_enable(struct rk3288_grf *grf, uint channel, bool enable)$/;"	f	typeref:typename:void	file:
ddr_setbits32	include/fsl_ddr.h	/^#define ddr_setbits32(/;"	d
ddr_settings	include/fsl_ddr_sdram.h	/^	fsl_ddr_cfg_regs_t *ddr_settings;$/;"	m	struct:fixed_ddr_parm	typeref:typename:fsl_ddr_cfg_regs_t *
ddr_size_gbyte	arch/arm/mach-keystone/include/mach/ddr3.h	/^	int    ddr_size_gbyte;$/;"	m	struct:ddr3_spd_cb	typeref:typename:int
ddr_slew	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ddr_slew;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
ddr_slew	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	ddr_slew;	\/* 0x20 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
ddr_speed	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t ddr_speed;		\/* DDRFREQ_800, DDRFREQ_1066 *\/$/;"	m	struct:mrc_params	typeref:typename:uint8_t
ddr_speed	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t ddr_speed;$/;"	m	struct:mrc_timings	typeref:typename:uint8_t
ddr_sr_cntr	include/fsl_ddr_sdram.h	/^	unsigned int ddr_sr_cntr;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_sr_cntr	include/fsl_immap.h	/^	u32	ddr_sr_cntr;		\/* self refresh counter *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_sram	arch/arm/dts/rk3288.dtsi	/^		ddr_sram: ddr-sram@1000 {$/;"	l
ddr_sref_st	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 ddr_sref_st;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
ddr_strben0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_strben0;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_strben1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_strben1;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_sys_config	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_sys_config;	\/* System Configuration Register *\/$/;"	m	struct:ddr512x	typeref:typename:u32
ddr_sys_config	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_sys_config;	\/* System Configuration Register *\/$/;"	m	struct:ddr512x_config	typeref:typename:u32
ddr_sysinfo	board/ccv/xpress/spl.c	/^struct mx6_ddr_sysinfo ddr_sysinfo = {$/;"	v	typeref:struct:mx6_ddr_sysinfo
ddr_sysinfo	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^struct mx6_ddr_sysinfo ddr_sysinfo = {$/;"	v	typeref:struct:mx6_ddr_sysinfo
ddr_tap_tuning	arch/mips/mach-ath79/ar933x/ddr.c	/^void ddr_tap_tuning(void)$/;"	f	typeref:typename:void
ddr_tap_tuning	arch/mips/mach-ath79/ar934x/ddr.c	/^void ddr_tap_tuning(void)$/;"	f	typeref:typename:void
ddr_tap_tuning	arch/mips/mach-ath79/qca953x/ddr.c	/^void ddr_tap_tuning(void)$/;"	f	typeref:typename:void
ddr_time_config0	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_time_config0;	\/* Timing Configuration Register *\/$/;"	m	struct:ddr512x	typeref:typename:u32
ddr_time_config0	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_time_config0;	\/* Timing Configuration Register *\/$/;"	m	struct:ddr512x_config	typeref:typename:u32
ddr_time_config1	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_time_config1;	\/* Timing Configuration Register *\/$/;"	m	struct:ddr512x	typeref:typename:u32
ddr_time_config1	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_time_config1;	\/* Timing Configuration Register *\/$/;"	m	struct:ddr512x_config	typeref:typename:u32
ddr_time_config2	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_time_config2;	\/* Timing Configuration Register *\/$/;"	m	struct:ddr512x	typeref:typename:u32
ddr_time_config2	arch/powerpc/include/asm/immap_512x.h	/^	u32 ddr_time_config2;	\/* Timing Configuration Register *\/$/;"	m	struct:ddr512x_config	typeref:typename:u32
ddr_timing	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^const struct rk3036_ddr_timing ddr_timing = {0x18c,$/;"	v	typeref:typename:const struct rk3036_ddr_timing
ddr_type	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 ddr_type;	\/* DDR type: DDR3(0) or LPDDR2(1) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
ddr_type	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddr_type;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
ddr_type	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t ddr_type;		\/* DDR3, DDR3L *\/$/;"	m	struct:mrc_params	typeref:typename:uint8_t
ddr_type	arch/x86/include/asm/global_data.h	/^	uint16_t ddr_type;$/;"	m	struct:dimm_info	typeref:typename:uint16_t
ddr_type	drivers/ddr/marvell/a38x/ddr3_init.c	/^static char *ddr_type = "DDR3";$/;"	v	typeref:typename:char *	file:
ddr_urgent	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ddr_urgent; \/* 0x600 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
ddr_urgent_sel	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ddr_urgent_sel; \/* 0x61c *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
ddr_vref	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_vref;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_vtp	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_vtp;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_wclk	arch/x86/cpu/quark/smc.c	/^static const uint16_t ddr_wclk[] = {193, 158};$/;"	v	typeref:typename:const uint16_t[]	file:
ddr_wcmd	arch/x86/cpu/quark/smc.c	/^static const uint16_t ddr_wcmd[] = {1, 220};$/;"	v	typeref:typename:const uint16_t[]	file:
ddr_wctl	arch/x86/cpu/quark/smc.c	/^static const uint16_t ddr_wctl[] = {1, 217};$/;"	v	typeref:typename:const uint16_t[]	file:
ddr_wdq	arch/x86/cpu/quark/smc.c	/^static const uint16_t ddr_wdq[] = {32, 257};$/;"	v	typeref:typename:const uint16_t[]	file:
ddr_wdqs	arch/x86/cpu/quark/smc.c	/^static const uint16_t ddr_wdqs[] = {65, 289};$/;"	v	typeref:typename:const uint16_t[]	file:
ddr_wen	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ddr_wen;$/;"	m	struct:pad_signals	typeref:typename:int
ddr_width	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 ddr_width;		\/* 32\/64 Bit or 16\/32 Bit *\/$/;"	m	struct:dram_info	typeref:typename:u32
ddr_wrdtr	board/amcc/canyonlands/canyonlands.c	/^u32 ddr_wrdtr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_wrdtr	board/amcc/katmai/katmai.c	/^u32 ddr_wrdtr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_wrdtr	board/amcc/yucca/yucca.c	/^u32 ddr_wrdtr(u32 default_val) {$/;"	f	typeref:typename:u32
ddr_wrdtr	board/mosaixtech/icon/icon.c	/^u32 ddr_wrdtr(u32 default_val)$/;"	f	typeref:typename:u32
ddr_wrlvl_cntl	include/fsl_ddr_sdram.h	/^	unsigned int ddr_wrlvl_cntl;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_wrlvl_cntl	include/fsl_immap.h	/^	u32	ddr_wrlvl_cntl;		\/* write leveling control*\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_wrlvl_cntl_2	include/fsl_ddr_sdram.h	/^	unsigned int ddr_wrlvl_cntl_2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_wrlvl_cntl_2	include/fsl_immap.h	/^	u32	ddr_wrlvl_cntl_2;	\/* write leveling control 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_wrlvl_cntl_3	include/fsl_ddr_sdram.h	/^	unsigned int ddr_wrlvl_cntl_3;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_wrlvl_cntl_3	include/fsl_immap.h	/^	u32	ddr_wrlvl_cntl_3;	\/* write leveling control 3 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddr_zq_cntl	include/fsl_ddr_sdram.h	/^	unsigned int ddr_zq_cntl;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
ddr_zq_cntl	include/fsl_immap.h	/^	u32	ddr_zq_cntl;		\/* ZQ calibration control*\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ddrautocal	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^struct ddrautocal {$/;"	s	file:
ddrc0_con0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 ddrc0_con0;$/;"	m	struct:rk3288_grf	typeref:typename:u32
ddrc0_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 ddrc0_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
ddrc0_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 ddrc0_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
ddrc1_con0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 ddrc1_con0;$/;"	m	struct:rk3288_grf	typeref:typename:u32
ddrc1_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 ddrc1_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
ddrc1_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 ddrc1_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
ddrc2cr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ddrc2cr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
ddrc3cr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ddrc3cr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
ddrc4cr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ddrc4cr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
ddrc_base	arch/arm/mach-zynq/include/mach/hardware.h	/^#define ddrc_base /;"	d
ddrc_conf	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^static void ddrc_conf(struct atmel_mpddrc_config *ddrc)$/;"	f	typeref:typename:void	file:
ddrc_conf	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^static void ddrc_conf(struct atmel_mpddrc_config *ddrc)$/;"	f	typeref:typename:void	file:
ddrc_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ddrc_ctrl; \/* 0x0 *\/$/;"	m	struct:ddrc_regs	typeref:typename:u32
ddrc_rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ddrc_rcr;$/;"	m	struct:src	typeref:typename:u32
ddrc_regs	arch/arm/mach-zynq/include/mach/hardware.h	/^struct ddrc_regs {$/;"	s
ddrc_stat	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int ddrc_stat;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
ddrcdr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddrcdr;		\/* DDR Control Driver Register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
ddrcfg	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 ddrcfg;	\/* 0x04: DDR Configuration Register *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
ddrcfga	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^#define ddrcfga /;"	d	file:
ddrcfgd	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^#define ddrcfgd /;"	d	file:
ddrck	arch/arm/dts/at91sam9g45.dtsi	/^					ddrck: ddrck {$/;"	l	label:pmc
ddrck	arch/arm/dts/sama5d2.dtsi	/^					ddrck: ddrck@2 {$/;"	l	label:pmc
ddrckectrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int ddrckectrl;$/;"	m	struct:ddr_ctrl	typeref:typename:unsigned int
ddrclkdr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	ddrclkdr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
ddrclkdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ddrclkdr;	\/* DDR clock disable *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
ddrconf	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ddrconf;$/;"	m	struct:rk3288_msch	typeref:typename:u32
ddrconf	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrconf;$/;"	m	struct:rk3036_service_sys	typeref:typename:u32
ddrconf_table	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^const int ddrconf_table[] = {$/;"	v	typeref:typename:const int[]
ddrconfig	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 ddrconfig;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
ddrctrl	arch/arm/cpu/armv7/am33xx/emif4.c	/^static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;$/;"	v	typeref:struct:ddr_ctrl *	file:
ddrdllcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ddrdllcr;	\/* DDR DLL control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
ddrdllcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ddrdllcr;	\/* 0xe0e10 - DDR DLL control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
ddrdqclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	ddrdqclk;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
ddrdqclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t ddrdqclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
ddrdqsclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	ddrdqsclk;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
ddrdqsclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t ddrdqsclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
ddrdsr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ddrdsr;		\/* DDR Debug Status Register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
ddrgcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ddrgcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
ddrinitdelay	tools/kwbimage.h	/^	uint16_t ddrinitdelay;		\/*26-27 *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint16_t
ddrio_pwroff	arch/arm/dts/rk3288.dtsi	/^			ddrio_pwroff: ddrio-pwroff {$/;"	l	label:pinctrl
ddrioctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int ddrioctrl;$/;"	m	struct:ddr_ctrl	typeref:typename:unsigned int
ddrioovcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ddrioovcr;	\/* DDR IO Override Control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
ddrioovcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ddrioovcr;	\/* 0xe0f24 - DDR IO Overdrive Control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
ddrlaw	arch/powerpc/include/asm/immap_512x.h	/^	law512x_t ddrlaw;	\/* DDR Local Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:law512x_t
ddrlaw	arch/powerpc/include/asm/immap_83xx.h	/^	law83xx_t ddrlaw[2];	\/* DDR local access window *\/$/;"	m	struct:sysconf83xx	typeref:typename:law83xx_t[2]
ddrmc_cr_setting	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^struct ddrmc_cr_setting {$/;"	s
ddrmc_ctrl_init_ddr3	arch/arm/imx-common/ddrmc-vf610.c	/^void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings,$/;"	f	typeref:typename:void
ddrmc_init	board/freescale/ls1021atwr/ls1021atwr.c	/^void ddrmc_init(void)$/;"	f	typeref:typename:void
ddrmc_phy_setting	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^struct ddrmc_phy_setting {$/;"	s
ddrmc_setup_iomux	arch/arm/imx-common/ddrmc-vf610.c	/^void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)$/;"	f	typeref:typename:void
ddrmode	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ddrmode;$/;"	m	struct:rk3288_msch	typeref:typename:u32
ddrmode	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrmode;$/;"	m	struct:rk3036_service_sys	typeref:typename:u32
ddrmpr	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	ddrmpr;$/;"	m	struct:at91_matrix	typeref:typename:u32
ddrmr_regs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct ddrmr_regs {$/;"	s
ddrphy_acbdlr0	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_acbdlr0[DRAM_CH_NR] = {0x0000000c, 0x0000000c, 0x00000009};$/;"	v	typeref:typename:u32[]	file:
ddrphy_adrctrl	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const int ddrphy_adrctrl[DRAM_BOARD_NR][DRAM_CH_NR] = {$/;"	v	typeref:typename:const int[][]	file:
ddrphy_boot_run_hws	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_boot_run_hws(void __iomem *phy_base)$/;"	f	typeref:typename:void	file:
ddrphy_dlllock_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlllock_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ddrphy_dlllock_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlllock_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ddrphy_dlllock_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlllock_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ddrphy_dlllock_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlllock_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlllock_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ddrphy_dlloff_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlloff_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlloff_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlloff_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlloff_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlloff_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dlloff_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ddrphy_dlloff_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ddrphy_dllrecalib	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const int ddrphy_dllrecalib[DRAM_BOARD_NR][DRAM_CH_NR] = {$/;"	v	typeref:typename:const int[][]	file:
ddrphy_dlltrimclk	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const int ddrphy_dlltrimclk[DRAM_BOARD_NR][DRAM_CH_NR] = {$/;"	v	typeref:typename:const int[][]	file:
ddrphy_dqs_delay_fixup	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void ddrphy_dqs_delay_fixup(void __iomem *phy_base, int nr_dx, int step)$/;"	f	typeref:typename:void	file:
ddrphy_dram_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int ddrphy_dram_init(void __iomem *phy_base)$/;"	f	typeref:typename:int	file:
ddrphy_dtpr0	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_dtpr0[DRAM_FREQ_NR] = {0x85589955, 0x999cbb66};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dtpr0	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_dtpr0[DRAM_FREQ_NR] = {0x35a00d88, 0x39e40e88};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dtpr1	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_dtpr1[DRAM_FREQ_NR] = {0x1a8363c0, 0x1a878400};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dtpr1	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_dtpr1[DRAM_FREQ_NR] = {0x2288cc2c, 0x228a04d0};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dtpr2	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_dtpr2[DRAM_FREQ_NR] = {0x5002c200, 0xa00214f8};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dtpr2	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_dtpr2[DRAM_FREQ_NR] = {0x50005e00, 0x50006a00};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dtpr3	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_dtpr3[DRAM_FREQ_NR] = {0x0010cb49, 0x0010ec89};$/;"	v	typeref:typename:u32[]	file:
ddrphy_dx	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	struct ddrphy_dx {$/;"	s	struct:sunxi_mctl_phy_reg
ddrphy_dx	arch/arm/include/asm/arch/dram_sun9i.h	/^	struct ddrphy_dx {$/;"	s	struct:sunxi_mctl_phy_reg
ddrphy_ext_dqsgt	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_ext_dqsgt(void __iomem *phy_base)$/;"	f	typeref:typename:void	file:
ddrphy_fifo_reset	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void ddrphy_fifo_reset(void __iomem *phy_base)$/;"	f	typeref:typename:void	file:
ddrphy_get_mdl	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static u8 ddrphy_get_mdl(int dx, void __iomem *phy_base)$/;"	f	typeref:typename:u8	file:
ddrphy_get_rank	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static inline int ddrphy_get_rank(int dx)$/;"	f	typeref:typename:int	file:
ddrphy_get_system_latency	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int ddrphy_get_system_latency(void __iomem *phy_base, int width)$/;"	f	typeref:typename:int	file:
ddrphy_hpstep	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static int ddrphy_hpstep(int delay, int dx, void __iomem *phy_base)$/;"	f	typeref:typename:int	file:
ddrphy_impedance_calibration	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int ddrphy_impedance_calibration(void __iomem *phy_base)$/;"	f	typeref:typename:int	file:
ddrphy_init	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_init(void __iomem *phy_base, enum dram_freq freq)$/;"	f	typeref:typename:void	file:
ddrphy_init	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_init(void __iomem *phy_base, enum dram_board board, int ch)$/;"	f	typeref:typename:void	file:
ddrphy_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void ddrphy_init(void __iomem *phy_base, enum dram_freq freq, int width,$/;"	f	typeref:typename:void	file:
ddrphy_init	arch/x86/cpu/quark/smc.c	/^void ddrphy_init(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
ddrphy_init_sequence	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^struct ddrphy_init_sequence {$/;"	s	file:
ddrphy_init_sequence	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^struct ddrphy_init_sequence {$/;"	s	file:
ddrphy_init_tail	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_init_tail(void __iomem *phy_base, enum dram_board board,$/;"	f	typeref:typename:void	file:
ddrphy_ip_dq_shift_val	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static int ddrphy_ip_dq_shift_val[DRAM_BOARD_NR][DRAM_CH_NR][32] = {$/;"	v	typeref:typename:int[][][32]	file:
ddrphy_lock_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ddrphy_lock_ctrl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ddrphy_maskreadl	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static u32 ddrphy_maskreadl(u32 mask, void *addr)$/;"	f	typeref:typename:u32	file:
ddrphy_maskwritel	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_maskwritel(u32 data, u32 mask, void *addr)$/;"	f	typeref:typename:void	file:
ddrphy_mr0	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_mr0[DRAM_FREQ_NR] = {0x00000b51, 0x00000d71};$/;"	v	typeref:typename:u32[]	file:
ddrphy_mr0	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_mr0[DRAM_FREQ_NR] = {0x00000115, 0x00000125};$/;"	v	typeref:typename:u32[]	file:
ddrphy_mr2	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_mr2[DRAM_FREQ_NR] = {0x00000290, 0x00000298};$/;"	v	typeref:typename:u32[]	file:
ddrphy_mr2	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_mr2[DRAM_FREQ_NR] = {0x000002a0, 0x000002a8};$/;"	v	typeref:typename:u32[]	file:
ddrphy_op_dq_shift_val	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const int ddrphy_op_dq_shift_val[DRAM_BOARD_NR][DRAM_CH_NR][32] = {$/;"	v	typeref:typename:const int[][][32]	file:
ddrphy_pgcr2	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_pgcr2[DRAM_FREQ_NR] = {0x00FC7E5D, 0x00FC90AB};$/;"	v	typeref:typename:u32[]	file:
ddrphy_phy_pad_ctrl	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 ddrphy_phy_pad_ctrl[DRAM_BOARD_NR][DRAM_CH_NR] = {$/;"	v	typeref:typename:const u32[][]	file:
ddrphy_prepare_training	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^void ddrphy_prepare_training(void __iomem *phy_base, int rank)$/;"	f	typeref:typename:void
ddrphy_ptr0	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_ptr0[DRAM_FREQ_NR] = {0x0a806844, 0x0c807d04};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr0	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_ptr0[DRAM_FREQ_NR] = {0x0EA09205, 0x10C0A6C6};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr1	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_ptr1[DRAM_FREQ_NR] = {0x208e0124, 0x2710015E};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr1	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_ptr1[DRAM_FREQ_NR] = {0x0DAC041B, 0x0FA104B1};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr3	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_ptr3[DRAM_FREQ_NR] = {0x0f051616, 0x12061A80};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr3	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_ptr3[DRAM_FREQ_NR] = {0x15171e45, 0x18182357};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr4	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^static u32 ddrphy_ptr4[DRAM_FREQ_NR] = {0x06ae08d6, 0x08027100};$/;"	v	typeref:typename:u32[]	file:
ddrphy_ptr4	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 ddrphy_ptr4[DRAM_FREQ_NR] = {0x0e9ad8e9, 0x10b34157};$/;"	v	typeref:typename:u32[]	file:
ddrphy_reg0e4	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg0e4;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg1;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg10	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg10;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg11	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg11;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg124	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg124;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg16	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg16;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg18	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg18;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg19	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg19;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg2;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg21	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg21;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg22	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg22;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg25	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg25;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg26	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg26;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg264	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg264;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg27	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg27;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg28	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg28;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg29	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg29;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg2a	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg2a;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg3;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg30	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg30;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg31	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg31;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg32	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg32;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg33	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg33;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg34	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg34;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg35	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg35;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg36	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg36;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg37	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg37;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg38	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg38;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg39	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg39;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg40	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg40;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg41	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg41;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg42	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg42;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg43	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg43;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg44	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg44;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg45	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg45;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg46	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg46;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg47	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg47;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg48	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg48;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg49	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg49;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg4a	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg4a;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg4b	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg4b;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg50	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg50;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg51	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg51;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg52	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg52;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg53	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg53;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg54	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg54;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg55	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg55;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg56	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg56;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg57	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg57;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg58	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg58;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg59	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg59;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg5a	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg5a;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg5b	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg5b;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg5c	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg5c;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg5d	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg5d;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg5e	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg5e;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg5f	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg5f;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg6	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg6;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg60	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg60;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg61	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg61;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg62	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg62;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg7	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg7;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg8	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg8;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_reg9	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrphy_reg9;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
ddrphy_scl_gate_timing	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 ddrphy_scl_gate_timing[DRAM_CH_NR] = {$/;"	v	typeref:typename:const u32[]	file:
ddrphy_select_lane	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_select_lane(void __iomem *phy_base, unsigned int lane,$/;"	f	typeref:typename:void	file:
ddrphy_set_ckoffset_qoffset	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_set_ckoffset_qoffset(int delay_ckoffset0, int delay_ckoffset1,$/;"	f	typeref:typename:void	file:
ddrphy_set_delay	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_set_delay(void __iomem *phy_base, unsigned int reg,$/;"	f	typeref:typename:void	file:
ddrphy_set_dll_adrctrl	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_set_dll_adrctrl(void __iomem *phy_base, int dly_step)$/;"	f	typeref:typename:void	file:
ddrphy_set_dll_recalib	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_set_dll_recalib(void __iomem *phy_base, int dly_step)$/;"	f	typeref:typename:void	file:
ddrphy_set_dll_trim_clk	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_set_dll_trim_clk(void __iomem *phy_base, int dly_step)$/;"	f	typeref:typename:void	file:
ddrphy_set_dqsg_delay_dx	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_set_dqsg_delay_dx(int dx, int r0_delay, int r1_delay,$/;"	f	typeref:typename:void	file:
ddrphy_set_dswb_delay_dx	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_set_dswb_delay_dx(int dx, int delay, int enable, void __iomem *phy_base)$/;"	f	typeref:typename:void	file:
ddrphy_set_oe_delay_dx	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_set_oe_delay_dx(int dx, int dqs_delay, int dq_delay,$/;"	f	typeref:typename:void	file:
ddrphy_set_wl_delay_dx	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_set_wl_delay_dx(int dx, int r0_delay, int r1_delay,$/;"	f	typeref:typename:void	file:
ddrphy_shift_dq	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_shift_dq(void __iomem *phy_base, unsigned int reg,$/;"	f	typeref:typename:void	file:
ddrphy_shift_one_dq	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void ddrphy_shift_one_dq(void __iomem *phy_base, unsigned int reg,$/;"	f	typeref:typename:void	file:
ddrphy_shift_rof_hws	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_shift_rof_hws(void __iomem *phy_base, const int pos_shift[][2],$/;"	f	typeref:typename:void	file:
ddrphy_shift_tof_hws	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_shift_tof_hws(void __iomem *phy_base, const int shift[][2])$/;"	f	typeref:typename:void	file:
ddrphy_to_dly_step	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static int ddrphy_to_dly_step(void __iomem *phy_base, unsigned int freq,$/;"	f	typeref:typename:int	file:
ddrphy_training	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^int ddrphy_training(void __iomem *phy_base)$/;"	f	typeref:typename:int
ddrphy_training	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_training(void __iomem *phy_base)$/;"	f	typeref:typename:void	file:
ddrphy_training	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static int ddrphy_training(void __iomem *phy_base, enum dram_board board,$/;"	f	typeref:typename:int	file:
ddrphy_training	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int ddrphy_training(void __iomem *phy_base)$/;"	f	typeref:typename:int	file:
ddrphy_vt_ctrl	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void ddrphy_vt_ctrl(void __iomem *phy_base, int enable)$/;"	f	typeref:typename:void	file:
ddrphy_vt_ctrl	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void ddrphy_vt_ctrl(void __iomem *phy_base, int enable)$/;"	f	typeref:typename:void	file:
ddrphy_zq	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	struct ddrphy_zq {$/;"	s	struct:sunxi_mctl_phy_reg
ddrphy_zq	arch/arm/include/asm/arch/dram_sun9i.h	/^	struct ddrphy_zq {$/;"	s	struct:sunxi_mctl_phy_reg
ddrphycr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	ddrphycr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ddrphycr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	ddrphycr;	\/* 0xE4 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
ddrphycr2	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	ddrphycr2;	\/* 0xE8 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
ddrphyid_rev	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	ddrphyid_rev;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ddrphysr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	ddrphysr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ddrpll_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	armpll_clk, ddrpll_clk, iopll_clk,$/;"	e	enum:zynq_clk
ddrpll_ctrl	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_ctrl;	\/* offset 0x440 *\/$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_div1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_div1;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_div2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_div2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_div3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_div3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_div4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_div4;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_div5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_div5;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_freq2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_freq2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_freq3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_freq3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_freq4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_freq4;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_freq5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_freq5;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrpll_pwd	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int ddrpll_pwd;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
ddrspdclock	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int ddrspdclock;$/;"	m	struct:ddr3_spd_cb	typeref:typename:unsigned int
ddrsr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	ddrsr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ddrtiming	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ddrtiming;$/;"	m	struct:rk3288_msch	typeref:typename:u32
ddrtiming	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ddrtiming;$/;"	m	struct:rk3036_service_sys	typeref:typename:u32
ddrtimingcalculation	arch/arm/mach-keystone/ddr3_spd.c	/^static int ddrtimingcalculation(ddr3_spd_eeprom_t *buf, struct ddr3_sodimm *spd,$/;"	f	typeref:typename:int	file:
de	fs/yaffs2/yaffsfs.c	/^	struct yaffs_dirent de;	\/* directory entry *\/$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:struct:yaffs_dirent	file:
de4x5_desc	drivers/net/dc2114x.c	/^struct de4x5_desc {$/;"	s	file:
de_be0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		de_be0_clk: clk@01c20104 {$/;"	l
de_be0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		de_be0_clk: clk@01c20104 {$/;"	l
de_be1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		de_be1_clk: clk@01c20108 {$/;"	l
de_be1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		de_be1_clk: clk@01c20108 {$/;"	l
de_be_clk	arch/arm/dts/sun5i-a13.dtsi	/^		de_be_clk: clk@01c20104 {$/;"	l
de_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 de_bias_cfg;	\/* 0x248 display engine Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
de_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 de_bias_cfg;	\/* 0x248 display engine Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
de_bld	arch/arm/include/asm/arch-sunxi/display2.h	/^struct de_bld {$/;"	s
de_bld	arch/arm/include/asm/arch/display2.h	/^struct de_bld {$/;"	s
de_clk	arch/arm/include/asm/arch-sunxi/display2.h	/^struct de_clk {$/;"	s
de_clk	arch/arm/include/asm/arch/display2.h	/^struct de_clk {$/;"	s
de_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 de_clk_cfg;		\/* 0x104 DE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
de_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 de_clk_cfg;		\/* 0x490 display engine clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
de_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 de_clk_cfg;		\/* 0x104 DE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
de_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 de_clk_cfg;		\/* 0x490 display engine clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
de_fe0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		de_fe0_clk: clk@01c2010c {$/;"	l
de_fe0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		de_fe0_clk: clk@01c2010c {$/;"	l
de_fe1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		de_fe1_clk: clk@01c20110 {$/;"	l
de_fe1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		de_fe1_clk: clk@01c20110 {$/;"	l
de_fe_clk	arch/arm/dts/sun5i-a13.dtsi	/^		de_fe_clk: clk@01c2010c {$/;"	l
de_glb	arch/arm/include/asm/arch-sunxi/display2.h	/^struct de_glb {$/;"	s
de_glb	arch/arm/include/asm/arch/display2.h	/^struct de_glb {$/;"	s
de_init	drivers/video/mb862xx.c	/^static void de_init (void)$/;"	f	typeref:typename:void	file:
de_ui	arch/arm/include/asm/arch-sunxi/display2.h	/^struct de_ui {$/;"	s
de_ui	arch/arm/include/asm/arch/display2.h	/^struct de_ui {$/;"	s
de_vi	arch/arm/include/asm/arch-sunxi/display2.h	/^struct de_vi {$/;"	s
de_vi	arch/arm/include/asm/arch/display2.h	/^struct de_vi {$/;"	s
de_wait	drivers/video/mb862xx.c	/^static void de_wait (void)$/;"	f	typeref:typename:void	file:
de_wait_slots	drivers/video/mb862xx.c	/^static void de_wait_slots (int slots)$/;"	f	typeref:typename:void	file:
deactivate_delay_us	drivers/spi/exynos_spi.c	/^	uint deactivate_delay_us;	\/* Delay to wait after deactivate *\/$/;"	m	struct:exynos_spi_platdata	typeref:typename:uint	file:
deactivate_delay_us	drivers/spi/rk_spi.c	/^	uint deactivate_delay_us;	\/* Delay to wait after deactivate *\/$/;"	m	struct:rockchip_spi_platdata	typeref:typename:uint	file:
deactivate_delay_us	drivers/spi/tegra_spi.h	/^	uint deactivate_delay_us;	\/* Delay to wait after deactivate *\/$/;"	m	struct:tegra_spi_platdata	typeref:typename:uint
deactivated	include/tpm.h	/^	u8	deactivated;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
deactivations	include/linux/usb/composite.h	/^	unsigned			deactivations;$/;"	m	struct:usb_composite_dev	typeref:typename:unsigned
dead	arch/sparc/cpu/leon2/start.S	/^dead:	ta 0				! if call returns...$/;"	l
dead	arch/sparc/cpu/leon3/start.S	/^dead:$/;"	l
dead_unreloc	arch/sparc/cpu/leon2/start.S	/^dead_unreloc:$/;"	l
dead_unreloc	arch/sparc/cpu/leon3/start.S	/^dead_unreloc:$/;"	l
dead_wm	fs/ubifs/ubifs.h	/^	int dead_wm;$/;"	m	struct:ubifs_info	typeref:typename:int
deadline_ms	net/link_local.c	/^static unsigned deadline_ms;$/;"	v	typeref:typename:unsigned	file:
deb	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 deb;		\/* interrupt debounce *\/$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32
deb	arch/arm/include/asm/arch/gpio.h	/^	u32 deb;		\/* interrupt debounce *\/$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32
deblock	include/i2c.h	/^	int (*deblock)(struct udevice *bus);$/;"	m	struct:dm_i2c_ops	typeref:typename:int (*)(struct udevice * bus)
debounce	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 debounce;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
debounce	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	debounce[8];	\/* 0x54 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int[8]
debounce_down_us	include/ec_commands.h	/^	uint16_t debounce_down_us;	\/* time for debounce on key down *\/$/;"	m	struct:ec_mkbp_config	typeref:typename:uint16_t
debounce_up_us	include/ec_commands.h	/^	uint16_t debounce_up_us;	\/* time for debounce on key up *\/$/;"	m	struct:ec_mkbp_config	typeref:typename:uint16_t
debug	arch/arm/include/asm/processor.h	/^	struct debug_info		debug;$/;"	m	struct:thread_struct	typeref:struct:debug_info
debug	arch/nds32/cpu/n1213/start.S	/^debug:$/;"	l
debug	common/miiphyutil.c	/^#define debug(/;"	d	file:
debug	drivers/bios_emulator/include/x86emu/regs.h	/^	int debug;$/;"	m	struct:__anon39451e6d0808	typeref:typename:int
debug	drivers/usb/host/sl811-hcd.c	/^static int debug = 9;$/;"	v	typeref:typename:int	file:
debug	examples/standalone/mem_to_mem_idma2intr.c	/^static int debug = 1;$/;"	v	typeref:typename:int	file:
debug	include/aes.h	/^#define debug(/;"	d
debug	include/common.h	/^#define debug(/;"	d
debug	include/fsl_ddr_sdram.h	/^	unsigned int debug[64];$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int[64]
debug	include/fsl_immap.h	/^	u32     debug[64];		\/* debug_1 to debug_64 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32[64]
debug	include/usb/ulpi.h	/^	u8	debug;$/;"	m	struct:ulpi_regs	typeref:typename:u8
debug	lib/fdtdec_common.c	/^#define debug(/;"	d	file:
debug	lib/hashtable.c	/^#   define debug(/;"	d	file:
debug	tools/dumpimage.h	/^#define debug(/;"	d
debug	tools/fdtgrep.c	/^#define debug(/;"	d	file:
debug	tools/ifdtool.c	/^#define debug(/;"	d	file:
debug	tools/mkimage.h	/^#define debug(/;"	d
debug	tools/proftool.c	/^#define debug(/;"	d	file:
debug	tools/relocate-rela.c	/^static void debug(const char *fmt, ...)$/;"	f	typeref:typename:void	file:
debug1	drivers/ddr/altera/sequencer.h	/^	u32 debug1;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
debug2	drivers/ddr/altera/sequencer.h	/^	u32 debug2;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
debugComp1	include/MCD_dma.h	/^	u32 debugComp1;		\/* debug comparator 1 *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
debugComp2	include/MCD_dma.h	/^	u32 debugComp2;		\/* debug comparator 2 *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
debugControl	include/MCD_dma.h	/^	u32 debugControl;	\/* debug control *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
debugStatus	include/MCD_dma.h	/^	u32 debugStatus;	\/* debug status *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
debug_acc	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int debug_acc = 0;$/;"	v	typeref:typename:int
debug_bootkeys	common/autoboot.c	/^#define debug_bootkeys(/;"	d	file:
debug_buffer	drivers/misc/i2c_eeprom_emul.c	/^#define debug_buffer /;"	d	file:
debug_buffer	drivers/misc/i2c_eeprom_emul.c	/^#define debug_buffer(/;"	d	file:
debug_buffer	drivers/rtc/i2c_rtc_emul.c	/^#define debug_buffer /;"	d	file:
debug_buffer	drivers/rtc/i2c_rtc_emul.c	/^#define debug_buffer(/;"	d	file:
debug_centralization	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_centralization = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_cond	include/common.h	/^#define debug_cond(/;"	d
debug_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	debug_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
debug_data_addr	drivers/ddr/altera/sequencer.h	/^	u32 debug_data_addr;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
debug_ddr_cfg	arch/arm/mach-keystone/ddr3_spd.c	/^#define debug_ddr_cfg(/;"	d	file:
debug_dunit	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 debug_dunit = 0;$/;"	v	typeref:typename:u32
debug_el	lib/list_sort.c	/^struct debug_el {$/;"	s	file:
debug_emac	drivers/net/davinci_emac.c	/^#define debug_emac(/;"	d	file:
debug_en	tools/relocate-rela.c	/^static const bool debug_en;$/;"	v	typeref:typename:const bool	file:
debug_enter	drivers/phy/marvell/comphy.h	/^#define debug_enter(/;"	d
debug_entry	arch/arm/include/asm/processor.h	/^struct debug_entry {$/;"	s
debug_exit	drivers/phy/marvell/comphy.h	/^#define debug_exit(/;"	d
debug_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 debug_freq;		\/* offset 0x44 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
debug_get_pipr	drivers/pcmcia/tqm8xx_pcmcia.c	/^static inline uint32_t debug_get_pipr(void)$/;"	f	typeref:typename:uint32_t	file:
debug_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 debug_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
debug_info	arch/arm/include/asm/processor.h	/^struct debug_info {$/;"	s
debug_info	scripts/kconfig/qconf.cc	/^QString ConfigInfoView::debug_info(struct symbol *sym)$/;"	f	class:ConfigInfoView	typeref:typename:QString
debug_insn	arch/arm/include/asm/processor.h	/^union debug_insn {$/;"	u
debug_intr	drivers/bios_emulator/x86emu/sys.c	/^int debug_intr;$/;"	v	typeref:typename:int
debug_io	drivers/bios_emulator/besys.c	/^#define debug_io(/;"	d	file:
debug_led	board/renesas/ecovec/ecovec.c	/^static void debug_led(u8 led)$/;"	f	typeref:typename:void	file:
debug_lev	drivers/net/tsi108_eth.c	/^#define debug_lev(/;"	d	file:
debug_level	drivers/usb/musb/musb_udc.c	/^static int debug_level;$/;"	v	typeref:typename:int	file:
debug_leveling	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_leveling = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_mem_calibrate	drivers/ddr/altera/sequencer.c	/^static void debug_mem_calibrate(int pass)$/;"	f	typeref:typename:void	file:
debug_mii_regs	drivers/net/tsi108_eth.c	/^#define debug_mii_regs(/;"	d	file:
debug_mii_regs	drivers/net/tsi108_eth.c	/^static void debug_mii_regs (unsigned int base)$/;"	f	typeref:typename:void	file:
debug_mode	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 debug_mode = 0;$/;"	v	typeref:typename:u32
debug_offset	drivers/usb/dwc3/dwc3-omap.c	/^	u32			debug_offset;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
debug_parser	common/cli_simple.c	/^#define debug_parser(/;"	d	file:
debug_pbs	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_pbs = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_print_reg	drivers/ddr/marvell/axp/ddr3_init.c	/^static void debug_print_reg(u32 reg)$/;"	f	typeref:typename:void	file:
debug_print_vector	lib/aes.c	/^static void debug_print_vector(char *name, u32 num_bytes, u8 *data)$/;"	f	typeref:typename:void	file:
debug_printf	common/cli_hush.c	/^#define debug_printf(/;"	d	file:
debug_printf	common/cli_hush.c	/^static inline void debug_printf(const char *format, ...) { }$/;"	f	typeref:typename:void	file:
debug_printf	common/cli_hush.c	/^static void debug_printf(const char *format, ...)$/;"	f	typeref:typename:void	file:
debug_putc	arch/arm/mach-uniphier/debug.h	/^static inline void debug_putc(int c)$/;"	f	typeref:typename:void
debug_puth	arch/arm/mach-uniphier/debug.h	/^static inline void debug_puth(unsigned long val)$/;"	f	typeref:typename:void
debug_puts	arch/arm/mach-uniphier/debug.h	/^static inline void debug_puts(const char *s)$/;"	f	typeref:typename:void
debug_reg	arch/powerpc/include/asm/immap_83xx.h	/^	u32 debug_reg;$/;"	m	struct:ddr83xx	typeref:typename:u32
debug_setup	drivers/usb/musb/musb_udc.c	/^static int debug_setup;$/;"	v	typeref:typename:int	file:
debug_stdout	test/image/test-fit.py	/^def debug_stdout(stdout):$/;"	f
debug_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 debug_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
debug_trace	drivers/misc/cros_ec.c	/^#define debug_trace(/;"	d	file:
debug_trace	drivers/misc/cros_ec_i2c.c	/^#define debug_trace(/;"	d	file:
debug_trace	drivers/misc/cros_ec_lpc.c	/^#define debug_trace(/;"	d	file:
debug_trace	drivers/spi/ich.c	/^#define debug_trace(/;"	d	file:
debug_training	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_training_a38x	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training_a38x = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_training_access	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training_access = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_training_bist	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training_bist = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_training_hw_alg	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training_hw_alg = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_training_ip	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training_ip = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debug_training_static	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 debug_training_static = DEBUG_LEVEL_ERROR;$/;"	v	typeref:typename:u8
debugcause	arch/xtensa/include/asm/ptrace.h	/^	unsigned long debugcause;	\/*  24 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
debugcsr	arch/arm/include/asm/ehci-omap.h	/^	u32 debugcsr;	\/* 0x44 *\/$/;"	m	struct:omap_uhh	typeref:typename:u32
debugf	api/api.c	/^#define debugf(/;"	d	file:
debugf	api/api_net.c	/^#define debugf(/;"	d	file:
debugf	api/api_storage.c	/^#define debugf(/;"	d	file:
debugfs_devs	include/linux/mbus.h	/^	struct dentry *debugfs_devs;$/;"	m	struct:mvebu_mbus_state	typeref:struct:dentry *
debugfs_root	include/linux/mbus.h	/^	struct dentry *debugfs_root;$/;"	m	struct:mvebu_mbus_state	typeref:struct:dentry *
debugfs_sdram	include/linux/mbus.h	/^	struct dentry *debugfs_sdram;$/;"	m	struct:mvebu_mbus_state	typeref:struct:dentry *
debugger_exception_handler	common/kgdb_stubs.c	/^int (*debugger_exception_handler)(struct pt_regs *);$/;"	v	typeref:typename:int (*)(struct pt_regs *)
debugss	arch/arm/dts/am335x-draco.dts	/^		debugss: debugss@4b000000 {$/;"	l
debugssclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int debugssclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
dec_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 dec_byte(u8 d)$/;"	f	typeref:typename:u8
dec_index	arch/sparc/cpu/leon3/ambapp.c	/^	int			dec_index;$/;"	m	struct:ambapp_find_ahb_info	typeref:typename:int	file:
dec_index	arch/sparc/cpu/leon3/ambapp.c	/^	int			dec_index;$/;"	m	struct:ambapp_find_apb_info	typeref:typename:int	file:
dec_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 dec_long(u32 d)$/;"	f	typeref:typename:u32
dec_sel	drivers/video/mx3fb.c	/^	u32	dec_sel:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
dec_status	drivers/mtd/nand/tegra_nand.h	/^	u32	dec_status;	\/* offset 4Ch *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
dec_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 dec_word(u16 d)$/;"	f	typeref:typename:u16
decode_address	arch/blackfin/cpu/traps.c	/^static void decode_address(char *buf, unsigned long address)$/;"	f	typeref:typename:void	file:
decode_bch	lib/bch.c	/^int decode_bch(struct bch_control *bch, const uint8_t *data, unsigned int len,$/;"	f	typeref:typename:int
decode_bits	cmd/i2c.c	/^static void decode_bits (u_char const b, char const *str[], int const do_once)$/;"	f	typeref:typename:void	file:
decode_buf	drivers/bios_emulator/include/x86emu/regs.h	/^	char decode_buf[32];	\/* encoded byte stream	*\/$/;"	m	struct:__anon39451e6d0808	typeref:typename:char[32]
decode_component_density	tools/ifdtool.c	/^static void decode_component_density(unsigned int density)$/;"	f	typeref:typename:void	file:
decode_emc	arch/arm/mach-tegra/tegra20/emc.c	/^static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp,$/;"	f	typeref:typename:int	file:
decode_ep0stage	drivers/usb/musb-new/musb_gadget_ep0.c	/^static char *decode_ep0stage(u8 stage)$/;"	f	typeref:typename:char *	file:
decode_flmstr	tools/ifdtool.c	/^static void decode_flmstr(uint32_t flmstr)$/;"	f	typeref:typename:void	file:
decode_pll	arch/arm/cpu/arm1136/mx35/generic.c	/^static u32 decode_pll(u32 reg, u32 infreq)$/;"	f	typeref:typename:u32	file:
decode_pll	arch/arm/cpu/armv7/mx5/clock.c	/^static uint32_t decode_pll(struct mxc_pll_reg *pll, uint32_t infreq)$/;"	f	typeref:typename:uint32_t	file:
decode_pll	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 decode_pll(enum pll_clocks pll, u32 infreq)$/;"	f	typeref:typename:u32	file:
decode_pll	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 decode_pll(enum pll_clocks pll, u32 infreq)$/;"	f	typeref:typename:u32	file:
decode_pll	arch/arm/cpu/armv8/s32v234/generic.c	/^static uintptr_t decode_pll(enum pll_type pll, u32 refclk_freq,$/;"	f	typeref:typename:uintptr_t	file:
decode_pll_config	drivers/video/ssd2828.c	/^static u32 decode_pll_config(u32 pll_config, u32 reference_freq_khz)$/;"	f	typeref:typename:u32	file:
decode_regions	drivers/pci/pci-uclass.c	/^static int decode_regions(struct pci_controller *hose, const void *blob,$/;"	f	typeref:typename:int	file:
decode_rm00_address	drivers/bios_emulator/x86emu/decode.c	/^unsigned decode_rm00_address($/;"	f	typeref:typename:unsigned
decode_rm01_address	drivers/bios_emulator/x86emu/decode.c	/^unsigned decode_rm01_address($/;"	f	typeref:typename:unsigned
decode_rm10_address	drivers/bios_emulator/x86emu/decode.c	/^unsigned decode_rm10_address($/;"	f	typeref:typename:unsigned
decode_rmXX_address	drivers/bios_emulator/x86emu/decode.c	/^unsigned decode_rmXX_address(int mod, int rm)$/;"	f	typeref:typename:unsigned
decode_rm_byte_register	drivers/bios_emulator/x86emu/decode.c	/^u8* decode_rm_byte_register($/;"	f	typeref:typename:u8 *
decode_rm_long_register	drivers/bios_emulator/x86emu/decode.c	/^u32* decode_rm_long_register($/;"	f	typeref:typename:u32 *
decode_rm_seg_register	drivers/bios_emulator/x86emu/decode.c	/^u16* decode_rm_seg_register($/;"	f	typeref:typename:u16 *
decode_rm_word_register	drivers/bios_emulator/x86emu/decode.c	/^u16* decode_rm_word_register($/;"	f	typeref:typename:u16 *
decode_sib_address	drivers/bios_emulator/x86emu/decode.c	/^unsigned decode_sib_address($/;"	f	typeref:typename:unsigned
decode_sib_si	drivers/bios_emulator/x86emu/decode.c	/^unsigned decode_sib_si($/;"	f	typeref:typename:unsigned
decode_spi_frequency	tools/ifdtool.c	/^static void decode_spi_frequency(unsigned int freq)$/;"	f	typeref:typename:void	file:
decode_sromc	board/samsung/common/board.c	/^static int decode_sromc(const void *blob, struct fdt_sromc *config)$/;"	f	typeref:typename:int	file:
decode_timing	common/edid.c	/^static void decode_timing(u8 *buf, struct display_timing *timing)$/;"	f	typeref:typename:void	file:
decode_timing_property	lib/fdtdec.c	/^static int decode_timing_property(const void *blob, int node, const char *name,$/;"	f	typeref:typename:int	file:
decoded	include/jffs2/mini_inflate.h	/^	unsigned long decoded; \/* The number of bytes decoded *\/$/;"	m	struct:bitstream	typeref:typename:unsigned long
decoded_buf	drivers/bios_emulator/include/x86emu/regs.h	/^	char decoded_buf[256];	\/* disassembled strings *\/$/;"	m	struct:__anon39451e6d0808	typeref:typename:char[256]
decoliodnr	include/fsl_sec.h	/^	} decoliodnr[8];$/;"	m	struct:ccsr_sec	typeref:struct:ccsr_sec::__anonc0d8802d0608[8]
decomp_entry	fs/zfs/zfs.c	/^typedef struct decomp_entry {$/;"	s	file:
decomp_entry_t	fs/zfs/zfs.c	/^} decomp_entry_t;$/;"	t	typeref:struct:decomp_entry	file:
decomp_func	fs/zfs/zfs.c	/^	zfs_decomp_func_t *decomp_func;$/;"	m	struct:decomp_entry	typeref:typename:zfs_decomp_func_t *	file:
decomp_mutex	fs/ubifs/ubifs.h	/^	struct mutex *decomp_mutex;$/;"	m	struct:ubifs_compressor	typeref:struct:mutex *
decomp_table	fs/zfs/zfs.c	/^static decomp_entry_t decomp_table[ZIO_COMPRESS_FUNCTIONS] = {$/;"	v	typeref:typename:decomp_entry_t[]	file:
decompr_sum	fs/jffs2/jffs2_nand_private.h	/^	u32 decompr_sum;$/;"	m	struct:b_compr_info	typeref:typename:u32
decompr_sum	fs/jffs2/jffs2_private.h	/^	u32 decompr_sum;$/;"	m	struct:b_compr_info	typeref:typename:u32
decompress	fs/ubifs/ubifs.h	/^	int (*decompress)(const unsigned char *in, size_t in_len,$/;"	m	struct:ubifs_compressor	typeref:typename:int (*)(const unsigned char * in,size_t in_len,unsigned char * out,size_t * out_len)
decompress_block	fs/jffs2/mini_inflate.c	/^long decompress_block(unsigned char *dest, unsigned char *source,$/;"	f	typeref:typename:long
decompress_dynamic	fs/jffs2/mini_inflate.c	/^static void decompress_dynamic(struct bitstream *stream, unsigned char *dest)$/;"	f	typeref:typename:void	file:
decompress_fixed	fs/jffs2/mini_inflate.c	/^static void decompress_fixed(struct bitstream *stream, unsigned char *dest)$/;"	f	typeref:typename:void	file:
decompress_huffman	fs/jffs2/mini_inflate.c	/^static void decompress_huffman(struct bitstream *stream, unsigned char *dest)$/;"	f	typeref:typename:void	file:
decompress_none	fs/jffs2/mini_inflate.c	/^static void decompress_none(struct bitstream *stream, unsigned char *dest)$/;"	f	typeref:typename:void	file:
decorr	include/fsl_sec.h	/^	u32	decorr;		\/* DECO Request Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
decport0_clear	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport0_clear;	\/* 0x0c Clear decode protection port 0 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport0_clear	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport0_clear;	\/* 0x0c Clear decode protection port 0 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport0_set	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport0_set;	\/* 0x08 Set decode protection port 0 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport0_set	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport0_set;	\/* 0x08 Set decode protection port 0 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport0_status	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport0_status;	\/* 0x04 Status of decode protection port 0 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport0_status	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport0_status;	\/* 0x04 Status of decode protection port 0 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport1_clear	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport1_clear;	\/* 0x18 Clear decode protection port 1 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport1_clear	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport1_clear;	\/* 0x18 Clear decode protection port 1 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport1_set	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport1_set;	\/* 0x14 Set decode protection port 1 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport1_set	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport1_set;	\/* 0x14 Set decode protection port 1 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport1_status	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport1_status;	\/* 0x10 Status of decode protection port 1 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport1_status	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport1_status;	\/* 0x10 Status of decode protection port 1 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport2_clear	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport2_clear;	\/* 0x24 Clear decode protection port 2 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport2_clear	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport2_clear;	\/* 0x24 Clear decode protection port 2 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport2_set	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport2_set;	\/* 0x20 Set decode protection port 2 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport2_set	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport2_set;	\/* 0x20 Set decode protection port 2 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport2_status	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 decport2_status;	\/* 0x1c Status of decode protection port 2 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decport2_status	arch/arm/include/asm/arch/tzpc.h	/^	u32 decport2_status;	\/* 0x1c Status of decode protection port 2 *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
decprot0clr	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot0clr;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot0set	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot0set;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot0stat	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot0stat;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot1clr	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot1clr;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot1set	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot1set;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot1stat	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot1stat;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot2clr	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot2clr;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot2set	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot2set;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot2stat	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot2stat;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot3clr	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot3clr;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot3set	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot3set;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decprot3stat	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int decprot3stat;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
decrementer_count	arch/powerpc/lib/interrupts.c	/^static unsigned decrementer_count; \/* count value for 1e6\/HZ microseconds *\/$/;"	v	typeref:typename:unsigned	file:
deduplicate_email	scripts/get_maintainer.pl	/^sub deduplicate_email {$/;"	s
deep_magic_nexgen_probe	arch/x86/cpu/cpu.c	/^static int deep_magic_nexgen_probe(void)$/;"	f	typeref:typename:int	file:
deepsleep	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	deepsleep;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
deepsleep	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	deepsleep;	\/* 0x4C *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
def	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
def	drivers/spi/davinci_spi.c	/^	dv_reg	def;		\/* 0x4c *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
def	scripts/kconfig/expr.h	/^	struct symbol_value def[S_DEF_COUNT];$/;"	m	struct:symbol	typeref:struct:symbol_value[]
defVal	drivers/bios_emulator/biosemui.h	/^	u32 defVal;$/;"	m	struct:__anonb186e4ea0308	typeref:typename:u32
def_default	scripts/kconfig/lkc.h	/^	def_default,$/;"	e	enum:conf_def_mode
def_hdlr	arch/microblaze/cpu/interrupts.c	/^static void def_hdlr(void)$/;"	f	typeref:typename:void	file:
def_hdlr	arch/nios2/cpu/interrupts.c	/^static void def_hdlr (void *arg)$/;"	f	typeref:typename:void	file:
def_mod	scripts/kconfig/lkc.h	/^	def_mod,$/;"	e	enum:conf_def_mode
def_no	scripts/kconfig/lkc.h	/^	def_no,$/;"	e	enum:conf_def_mode
def_random	scripts/kconfig/lkc.h	/^	def_random$/;"	e	enum:conf_def_mode
def_yes	scripts/kconfig/lkc.h	/^	def_yes,$/;"	e	enum:conf_def_mode
default	scripts/kconfig/zconf.y	/^			default:$/;"	l
default	scripts/kconfig/zconf.y	/^		default:$/;"	l
default	scripts/kconfig/zconf.y	/^	default:$/;"	l
default_88e1518	board/gdsys/common/phy.c	/^struct mii_setupcmd default_88e1518[] = {$/;"	v	typeref:struct:mii_setupcmd[]
default_bpp	drivers/video/mxc_ipuv3_fb.c	/^static unsigned long default_bpp = 16;$/;"	v	typeref:typename:unsigned long	file:
default_bzalloc	lib/bzip2/bzlib.c	/^void* default_bzalloc ( void* opaque, Int32 items, Int32 size )$/;"	f	typeref:typename:void *	file:
default_bzfree	lib/bzip2/bzlib.c	/^void default_bzfree ( void* opaque, void* addr )$/;"	f	typeref:typename:void	file:
default_centrlization_value	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 default_centrlization_value = 0x12;$/;"	v	typeref:typename:u32
default_char	include/dm-demo.h	/^	int default_char;$/;"	m	struct:dm_demo_pdata	typeref:typename:int
default_color0	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 default_color0;			\/* 0x4C *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
default_color1	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 default_color1;			\/* 0x50 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
default_compr	fs/ubifs/ubifs-media.h	/^	__le16 default_compr;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le16
default_compr	fs/ubifs/ubifs.h	/^	unsigned int default_compr:2;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:2
default_ehci_ops	drivers/usb/host/ehci-hcd.c	/^const struct ehci_ops default_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops
default_fd	common/cli_hush.c	/^struct {int mode; int default_fd; char *descrip;} redir_table[] = {$/;"	m	struct:__anon62a9299d0208	typeref:typename:int	file:
default_filename	net/tftp.c	/^static char default_filename[DEFAULT_NAME_LEN];$/;"	v	typeref:typename:char[]	file:
default_hash_version	include/ext_common.h	/^	uint8_t default_hash_version;$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t
default_init_seq	arch/powerpc/cpu/mpc512x/fixed_sdram.c	/^u32 default_init_seq[] = {$/;"	v	typeref:typename:u32[]
default_item	common/menu.c	/^	struct menu_item *default_item;$/;"	m	struct:menu	typeref:struct:menu_item *	file:
default_label	cmd/pxe.c	/^	char *default_label;$/;"	m	struct:pxe_menu	typeref:typename:char *	file:
default_level	drivers/video/pwm_backlight.c	/^	uint default_level;$/;"	m	struct:pwm_backlight_priv	typeref:typename:uint	file:
default_mddrc_config	arch/powerpc/cpu/mpc512x/fixed_sdram.c	/^ddr512x_config_t default_mddrc_config = {$/;"	v	typeref:typename:ddr512x_config_t
default_message_loglevel	cmd/log.c	/^static unsigned default_message_loglevel = 4;$/;"	v	typeref:typename:unsigned	file:
default_mount_options	include/ext_common.h	/^	__le32 default_mount_options;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
default_mtd_part_types	drivers/mtd/mtdpart.c	/^static const char * const default_mtd_part_types[] = {$/;"	v	typeref:typename:const char * const[]	file:
default_mtd_writev	drivers/mtd/mtdcore.c	/^static int default_mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,$/;"	f	typeref:typename:int	file:
default_opts	tools/env/fw_env.c	/^struct env_opts default_opts = {$/;"	v	typeref:struct:env_opts
default_phy_settings	arch/arm/imx-common/ddrmc-vf610.c	/^static struct ddrmc_phy_setting default_phy_settings[] = {$/;"	v	typeref:struct:ddrmc_phy_setting[]	file:
default_pipe	include/usb.h	/^#define default_pipe(/;"	d
default_print_cpuinfo	arch/x86/cpu/cpu.c	/^int default_print_cpuinfo(void)$/;"	f	typeref:typename:int
default_serial_console	arch/blackfin/cpu/jtag-console.c	/^struct serial_device *default_serial_console(void)$/;"	f	typeref:struct:serial_device *
default_serial_console	arch/mips/mach-au1x00/au1x00_serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc512x/serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc5xx/serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc5xxx/serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc8260/serial_scc.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc8260/serial_smc.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/powerpc/cpu/mpc8xx/serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/sparc/cpu/leon2/serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	arch/sparc/cpu/leon3/serial.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	board/esd/pmc440/pmc440.c	/^struct serial_device *default_serial_console(void)$/;"	f	typeref:struct:serial_device *
default_serial_console	board/ti/am335x/board.c	/^struct serial_device *default_serial_console(void)$/;"	f	typeref:struct:serial_device *
default_serial_console	drivers/serial/atmel_usart.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/mcfuart.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/serial_bfin.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f
default_serial_console	drivers/serial/serial_bfin.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/serial_mxc.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/serial_ns16550.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/serial_pl01x.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/serial_s3c24x0.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_console	drivers/serial/serial_sh.c	/^__weak struct serial_device *default_serial_console(void)$/;"	f	typeref:typename:__weak struct serial_device *
default_serial_puts	drivers/serial/serial.c	/^void default_serial_puts(const char *s)$/;"	f	typeref:typename:void
default_set	arch/x86/include/asm/coreboot_tables.h	/^	u8 default_set[CMOS_IMAGE_BUFFER_SIZE];$/;"	m	struct:cb_cmos_defaults	typeref:typename:u8[]
default_spd_eeprom	board/esd/vme8349/vme8349.c	/^static spd_eeprom_t default_spd_eeprom = {$/;"	v	typeref:typename:spd_eeprom_t	file:
default_splash_locations	common/splash.c	/^static struct splash_location default_splash_locations[] = {$/;"	v	typeref:struct:splash_location[]	file:
default_timings	arch/x86/cpu/quark/smc.c	/^void default_timings(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
default_tm	cmd/date.c	/^static struct rtc_time default_tm = { 0, 0, 0, 1, 1, 2000, 6, 0, 0 };$/;"	v	typeref:struct:rtc_time	file:
default_value	include/dm/pinctrl.h	/^	u32 default_value;$/;"	m	struct:pinconf_param	typeref:typename:u32
defaultline	scripts/docproc.c	/^DFL *defaultline;$/;"	v	typeref:typename:DFL *
defconfig	scripts/kconfig/Makefile	/^defconfig: $(obj)\/conf$/;"	t
defconfig	scripts/kconfig/conf.c	/^	defconfig,$/;"	e	enum:input_mode	file:
defered_dir_update	fs/yaffs2/yaffs_guts.h	/^	int defered_dir_update;	\/* Set to defer directory updates *\/$/;"	m	struct:yaffs_param	typeref:typename:int
defered_free	fs/yaffs2/yaffs_guts.h	/^	u8 defered_free:1;	\/* Object is removed from NAND, but is$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
deferred_io	include/linux/fb.h	/^	void (*deferred_io)(struct fb_info *info, struct list_head *pagelist);$/;"	m	struct:fb_deferred_io	typeref:typename:void (*)(struct fb_info * info,struct list_head * pagelist)
deferred_regs	arch/blackfin/cpu/traps.c	/^unsigned int deferred_regs[deferred_regs_last];$/;"	v	typeref:typename:unsigned int[]
deferred_regs_DCPLB_FAULT_ADDR	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_DCPLB_FAULT_ADDR	/;"	d
deferred_regs_ICPLB_FAULT_ADDR	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_ICPLB_FAULT_ADDR	/;"	d
deferred_regs_IMASK	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_IMASK	/;"	d
deferred_regs_SEQSTAT	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_SEQSTAT	/;"	d
deferred_regs_SYSCFG	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_SYSCFG	/;"	d
deferred_regs_last	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_last	/;"	d
deferred_regs_retx	arch/blackfin/include/asm/deferred.h	/^#define deferred_regs_retx	/;"	d
define_config	scripts/basic/fixdep.c	/^static void define_config(const char *name, int len, unsigned int hash)$/;"	f	typeref:typename:void	file:
defkargs	board/Arcturus/ucp1020/ucp1020.h	/^static char *defkargs = "root=\/dev\/mtdblock1 rootfstype=cramfs ro";$/;"	v	typeref:typename:char *
deflate	include/u-boot/zlib.h	/^#  define deflate /;"	d
deflate	lib/zlib/deflate.c	/^int ZEXPORT deflate (strm, flush)$/;"	f
deflateBound	include/u-boot/zlib.h	/^#  define deflateBound /;"	d
deflateBound	lib/zlib/deflate.c	/^uLong ZEXPORT deflateBound(strm, sourceLen)$/;"	f
deflateCopy	include/u-boot/zlib.h	/^#  define deflateCopy /;"	d
deflateCopy	lib/zlib/deflate.c	/^int ZEXPORT deflateCopy (dest, source)$/;"	f
deflateEnd	include/u-boot/zlib.h	/^#  define deflateEnd /;"	d
deflateEnd	lib/zlib/deflate.c	/^int ZEXPORT deflateEnd (strm)$/;"	f
deflateInit2_	include/u-boot/zlib.h	/^#  define deflateInit2_ /;"	d
deflateInit2_	lib/zlib/deflate.c	/^int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy,$/;"	f
deflateInit_	include/u-boot/zlib.h	/^#  define deflateInit_ /;"	d
deflateInit_	lib/zlib/deflate.c	/^int ZEXPORT deflateInit_(strm, level, version, stream_size)$/;"	f
deflateParams	include/u-boot/zlib.h	/^#  define deflateParams /;"	d
deflateParams	lib/zlib/deflate.c	/^int ZEXPORT deflateParams(strm, level, strategy)$/;"	f
deflatePrime	include/u-boot/zlib.h	/^#  define deflatePrime /;"	d
deflatePrime	lib/zlib/deflate.c	/^int ZEXPORT deflatePrime (strm, bits, value)$/;"	f
deflateReset	include/u-boot/zlib.h	/^#  define deflateReset /;"	d
deflateReset	lib/zlib/deflate.c	/^int ZEXPORT deflateReset (strm)$/;"	f
deflateSetDictionary	include/u-boot/zlib.h	/^#  define deflateSetDictionary /;"	d
deflateSetDictionary	lib/zlib/deflate.c	/^int ZEXPORT deflateSetDictionary (strm, dictionary, dictLength)$/;"	f
deflateSetHeader	lib/zlib/deflate.c	/^int ZEXPORT deflateSetHeader (strm, head)$/;"	f
deflateTune	lib/zlib/deflate.c	/^int ZEXPORT deflateTune(strm, good_length, max_lazy, nice_length, max_chain)$/;"	f
deflate_copyright	lib/zlib/deflate.c	/^const char deflate_copyright[] =$/;"	v	typeref:typename:const char[]
deflate_fast	lib/zlib/deflate.c	/^local block_state deflate_fast(s, flush)$/;"	f
deflate_huff	lib/zlib/deflate.c	/^local block_state deflate_huff(s, flush)$/;"	f
deflate_rle	lib/zlib/deflate.c	/^local block_state deflate_rle(s, flush)$/;"	f
deflate_slow	lib/zlib/deflate.c	/^local block_state deflate_slow(s, flush)$/;"	f
deflate_state	lib/zlib/deflate.h	/^} FAR deflate_state;$/;"	t	typeref:struct:internal_state FAR
deflate_stored	lib/zlib/deflate.c	/^local block_state deflate_stored(s, flush)$/;"	f
deftype	arch/x86/include/asm/mtrr.h	/^	uint64_t deftype;$/;"	m	struct:mtrr_state	typeref:typename:uint64_t
deg	drivers/mtd/nand/atmel_nand.c	/^static inline int deg(unsigned int poly)$/;"	f	typeref:typename:int	file:
deg	lib/bch.c	/^	unsigned int deg;    \/* polynomial degree *\/$/;"	m	struct:gf_poly	typeref:typename:unsigned int	file:
deg	lib/bch.c	/^static inline int deg(unsigned int poly)$/;"	f	typeref:typename:int	file:
deh_dir_id	fs/reiserfs/reiserfs_private.h	/^  __u32 deh_dir_id;  \/* objectid of the parent directory of the$/;"	m	struct:reiserfs_de_head	typeref:typename:__u32
deh_dir_id	fs/reiserfs/reiserfs_private.h	/^#define deh_dir_id(/;"	d
deh_location	fs/reiserfs/reiserfs_private.h	/^  __u16 deh_location;\/* offset of name in the whole item *\/$/;"	m	struct:reiserfs_de_head	typeref:typename:__u16
deh_location	fs/reiserfs/reiserfs_private.h	/^#define deh_location(/;"	d
deh_objectid	fs/reiserfs/reiserfs_private.h	/^  __u32 deh_objectid;\/* objectid of the object, that is referenced by$/;"	m	struct:reiserfs_de_head	typeref:typename:__u32
deh_objectid	fs/reiserfs/reiserfs_private.h	/^#define deh_objectid(/;"	d
deh_offset	fs/reiserfs/reiserfs_private.h	/^  __u32 deh_offset;  \/* third component of the directory entry key *\/$/;"	m	struct:reiserfs_de_head	typeref:typename:__u32
deh_offset	fs/reiserfs/reiserfs_private.h	/^#define deh_offset(/;"	d
deh_state	fs/reiserfs/reiserfs_private.h	/^  __u16 deh_state;   \/* whether 1) entry contains stat data (for$/;"	m	struct:reiserfs_de_head	typeref:typename:__u16
deh_state	fs/reiserfs/reiserfs_private.h	/^#define deh_state(/;"	d
deinitialise	fs/yaffs2/yaffs_nandif.h	/^	int (*deinitialise)(struct yaffs_dev *dev);$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev)
deinitialise_flash_fn	fs/yaffs2/yaffs_guts.h	/^	int (*deinitialise_flash_fn) (struct yaffs_dev *dev);$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev)
deinterlace_burstlen	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_burstlen;	\/* 0x0b4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_burstlen	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_burstlen;	\/* 0x0b4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_ctrl;		\/* 0x0a0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_ctrl;		\/* 0x0a0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_diag	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_diag;		\/* 0x0a4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_diag	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_diag;		\/* 0x0a4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_preluma	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_preluma;	\/* 0x0b8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_preluma	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_preluma;	\/* 0x0b8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_sawtooth	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_sawtooth;	\/* 0x0ac *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_sawtooth	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_sawtooth;	\/* 0x0ac *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_spatcomp	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_spatcomp;	\/* 0x0b0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_spatcomp	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_spatcomp;	\/* 0x0b0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_tempdiff	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_tempdiff;	\/* 0x0a8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_tempdiff	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_tempdiff;	\/* 0x0a8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_tile_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_tile_addr;	\/* 0x0bc *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_tile_addr	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_tile_addr;	\/* 0x0bc *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_tile_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 deinterlace_tile_stride;	\/* 0x0c0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
deinterlace_tile_stride	arch/arm/include/asm/arch/display.h	/^	u32 deinterlace_tile_stride;	\/* 0x0c0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
dek_blob_help_text	arch/arm/imx-common/cmd_dek.c	/^static char dek_blob_help_text[] =$/;"	v	typeref:typename:char[]	file:
del	fs/ubifs/ubifs.h	/^	unsigned del:1;$/;"	m	struct:ubifs_orphan	typeref:typename:unsigned:1
del_cmtno	fs/ubifs/ubifs.h	/^	unsigned long long del_cmtno;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned long long
del_dir	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *del_dir;	\/* Directory where deleted objects are$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_obj *
del_mtd_device	drivers/mtd/mtdcore.c	/^int del_mtd_device(struct mtd_info *mtd)$/;"	f	typeref:typename:int
del_mtd_partitions	drivers/mtd/mtdpart.c	/^int del_mtd_partitions(struct mtd_info *master)$/;"	f	typeref:typename:int
del_p1p2p3_quirk	drivers/usb/dwc3/core.h	/^	unsigned                del_p1p2p3_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
del_p1p2p3_quirk	include/dwc3-uboot.h	/^	unsigned del_p1p2p3_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
del_phy_power_chg_quirk	drivers/usb/dwc3/core.h	/^	unsigned		del_phy_power_chg_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
del_phy_power_chg_quirk	include/dwc3-uboot.h	/^	unsigned del_phy_power_chg_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
del_timer_sync	include/linux/compat.h	/^#define del_timer_sync(/;"	d
delay	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 delay;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
delay	board/armltd/vexpress/vexpress_common.c	/^static inline void delay(ulong loops)$/;"	f	typeref:typename:void	file:
delay	board/creative/xfi3/xfi3.c	/^	uint8_t		delay;$/;"	m	struct:__anond31a65320108	typeref:typename:uint8_t	file:
delay	board/renesas/ap325rxa/cpld-ap325rxa.c	/^static int delay(void)$/;"	f	typeref:typename:int	file:
delay	board/sandisk/sansa_fuze_plus/sfp.c	/^	uint8_t		delay;$/;"	m	struct:__anon24bc4dd30108	typeref:typename:uint8_t	file:
delay	board/spear/common/spr_lowlevel_init.S	/^delay:$/;"	l
delay	cmd/bootmenu.c	/^	int delay;			\/* delay for autoboot *\/$/;"	m	struct:bootmenu_data	typeref:typename:int	file:
delay	drivers/spi/davinci_spi.c	/^	dv_reg	delay;		\/* 0x48 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
delay	include/linux/fb.h	/^	unsigned long delay;$/;"	m	struct:fb_deferred_io	typeref:typename:unsigned long
delay	include/miiphy.h	/^	int (*delay)(struct bb_miiphy_bus *bus);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus)
delay1	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^delay1:$/;"	l
delay2	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^delay2:$/;"	l
delay_between_bursts	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 delay_between_bursts;$/;"	m	struct:pattern_info	typeref:typename:u8
delay_cycles	arch/xtensa/lib/time.c	/^static void delay_cycles(unsigned cycles)$/;"	f	typeref:typename:void	file:
delay_enable	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 delay_enable = 0;$/;"	v	typeref:typename:u32
delay_for_n_mem_clocks	drivers/ddr/altera/sequencer.c	/^static void delay_for_n_mem_clocks(const u32 clocks)$/;"	f	typeref:typename:void	file:
delay_line	drivers/mtd/nand/mxc_nand.h	/^	u32 delay_line;$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32
delay_loop_200	board/renesas/sh7763rdp/lowlevel_init.S	/^delay_loop_200:$/;"	l
delay_loop_60	board/renesas/sh7763rdp/lowlevel_init.S	/^delay_loop_60:$/;"	l
delay_ms	drivers/video/scf0403_lcd.c	/^	int delay_ms;$/;"	m	struct:scf0403_initseq_entry	typeref:typename:int	file:
delay_n	arch/x86/cpu/quark/mrc_util.c	/^void delay_n(uint32_t ns)$/;"	f	typeref:typename:void
delay_op_execute	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^int delay_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)$/;"	f	typeref:typename:int
delay_per_dchain_tap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	delay_per_dchain_tap;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
delay_per_dqs_en_dchain_tap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	delay_per_dqs_en_dchain_tap;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
delay_per_opa_tap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u16	delay_per_opa_tap;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u16
delay_u	arch/x86/cpu/quark/mrc_util.c	/^void delay_u(uint32_t ms)$/;"	f	typeref:typename:void
delay_usec	drivers/net/e1000.h	/^	uint16_t delay_usec;$/;"	m	struct:e1000_eeprom_info	typeref:typename:uint16_t
delayed_status	drivers/usb/dwc3/core.h	/^	unsigned		delayed_status:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
delays	drivers/ddr/altera/sequencer.h	/^	u32 delays;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
delete_ccsr_l2_tlb	arch/powerpc/cpu/mpc85xx/start.S	/^delete_ccsr_l2_tlb:$/;"	l
delete_char	common/cli_readline.c	/^static char *delete_char (char *buffer, char *p, int *colp, int *np, int plen)$/;"	f	typeref:typename:char *	file:
delete_double_indirect_block	fs/ext4/ext4_write.c	/^static void delete_double_indirect_block(struct ext2_inode *inode)$/;"	f	typeref:typename:void	file:
delete_partition	cmd/mtdparts.c	/^static int delete_partition(const char *id)$/;"	f	typeref:typename:int	file:
delete_single_indirect_block	fs/ext4/ext4_write.c	/^static void delete_single_indirect_block(struct ext2_inode *inode)$/;"	f	typeref:typename:void	file:
delete_temp_law	arch/powerpc/cpu/mpc85xx/start.S	/^delete_temp_law:$/;"	l
delete_temp_tlbs	arch/powerpc/cpu/mpc85xx/start.S	/^delete_temp_tlbs:$/;"	l
delete_tlb0_entry	arch/powerpc/cpu/mpc85xx/start.S	/^	.macro	delete_tlb0_entry esel epn wimg scratch$/;"	m
delete_tlb1_entry	arch/powerpc/cpu/mpc85xx/start.S	/^	.macro	delete_tlb1_entry esel scratch$/;"	m
delete_triple_indirect_block	fs/ext4/ext4_write.c	/^static void delete_triple_indirect_block(struct ext2_inode *inode)$/;"	f	typeref:typename:void	file:
deleted	fs/yaffs2/yaffs_guts.h	/^	u8 deleted:1;		\/* This should only apply to unlinked files. *\/$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
deleted	fs/yaffs2/yaffs_guts.h	/^	u8 deleted:1;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8:1
deleted	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned deleted:1;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:1
deletion	fs/ubifs/replay.c	/^	unsigned int deletion:1;$/;"	m	struct:replay_entry	typeref:typename:unsigned int:1	file:
demo	include/ec_commands.h	/^		} brightness, seq, demo;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::num
demo	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
demo_commands	cmd/demo.c	/^static cmd_tbl_t demo_commands[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
demo_dev	cmd/demo.c	/^struct udevice *demo_dev;$/;"	v	typeref:struct:udevice *
demo_get_light	drivers/demo/demo-uclass.c	/^int demo_get_light(struct udevice *dev)$/;"	f	typeref:typename:int
demo_hello	drivers/demo/demo-uclass.c	/^int demo_hello(struct udevice *dev, int ch)$/;"	f	typeref:typename:int
demo_ops	include/dm-demo.h	/^struct demo_ops {$/;"	s
demo_parse_dt	drivers/demo/demo-uclass.c	/^int demo_parse_dt(struct udevice *dev)$/;"	f	typeref:typename:int
demo_set_light	drivers/demo/demo-uclass.c	/^int demo_set_light(struct udevice *dev, int light)$/;"	f	typeref:typename:int
demo_shape_id	drivers/demo/demo-shape.c	/^static const struct udevice_id demo_shape_id[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
demo_shape_id	drivers/demo/demo-simple.c	/^static const struct udevice_id demo_shape_id[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
demo_shape_ofdata_to_platdata	drivers/demo/demo-simple.c	/^static int demo_shape_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
demo_status	drivers/demo/demo-uclass.c	/^int demo_status(struct udevice *dev, int *status)$/;"	f	typeref:typename:int
denali_cmdfunc	drivers/mtd/nand/denali.c	/^static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,$/;"	f	typeref:typename:void	file:
denali_core_search_data_eye	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^void denali_core_search_data_eye(void)$/;"	f	typeref:typename:void
denali_dma_configuration	drivers/mtd/nand/denali.c	/^static uint32_t denali_dma_configuration(struct denali_nand_info *denali,$/;"	f	typeref:typename:uint32_t	file:
denali_enable_dma	drivers/mtd/nand/denali.c	/^static void denali_enable_dma(struct denali_nand_info *denali, bool en)$/;"	f	typeref:typename:void	file:
denali_erase	drivers/mtd/nand/denali.c	/^static int denali_erase(struct mtd_info *mtd, int page)$/;"	f	typeref:typename:int	file:
denali_flash_mem	drivers/mtd/nand/denali_spl.c	/^static void __iomem *denali_flash_mem =$/;"	v	typeref:typename:void __iomem *	file:
denali_flash_reg	drivers/mtd/nand/denali_spl.c	/^static void __iomem *denali_flash_reg =$/;"	v	typeref:typename:void __iomem *	file:
denali_hw_init	drivers/mtd/nand/denali.c	/^static void denali_hw_init(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
denali_init	drivers/mtd/nand/denali.c	/^static int denali_init(struct denali_nand_info *denali)$/;"	f	typeref:typename:int	file:
denali_irq_enable	drivers/mtd/nand/denali.c	/^static void denali_irq_enable(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
denali_irq_init	drivers/mtd/nand/denali.c	/^static void denali_irq_init(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
denali_mode_main_access	drivers/mtd/nand/denali.c	/^static void denali_mode_main_access(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
denali_mode_main_spare_access	drivers/mtd/nand/denali.c	/^static void denali_mode_main_spare_access(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
denali_nand_info	drivers/mtd/nand/denali.h	/^struct denali_nand_info {$/;"	s
denali_nand_reset	drivers/mtd/nand/denali.c	/^static uint32_t denali_nand_reset(struct denali_nand_info *denali)$/;"	f	typeref:typename:uint32_t	file:
denali_nand_timing_set	drivers/mtd/nand/denali.c	/^static uint32_t denali_nand_timing_set(struct denali_nand_info *denali)$/;"	f	typeref:typename:uint32_t	file:
denali_read_buf	drivers/mtd/nand/denali.c	/^static void denali_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
denali_read_byte	drivers/mtd/nand/denali.c	/^static uint8_t denali_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
denali_read_oob	drivers/mtd/nand/denali.c	/^static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
denali_read_page	drivers/mtd/nand/denali.c	/^static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
denali_read_page_raw	drivers/mtd/nand/denali.c	/^static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
denali_sdram_register_dump	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static inline void denali_sdram_register_dump(void)$/;"	f	typeref:typename:void	file:
denali_sdram_register_dump	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void denali_sdram_register_dump(void)$/;"	f	typeref:typename:void	file:
denali_select_chip	drivers/mtd/nand/denali.c	/^static void denali_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
denali_send_pipeline_cmd	drivers/mtd/nand/denali.c	/^static int denali_send_pipeline_cmd(struct denali_nand_info *denali,$/;"	f	typeref:typename:int	file:
denali_send_pipeline_cmd	drivers/mtd/nand/denali_spl.c	/^int denali_send_pipeline_cmd(int page, int ecc_en, int access_type)$/;"	f	typeref:typename:int
denali_setup_dma	drivers/mtd/nand/denali.c	/^static void denali_setup_dma(struct denali_nand_info *denali, int op)$/;"	f	typeref:typename:void	file:
denali_wait_for_dlllock	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^int denali_wait_for_dlllock(void)$/;"	f	typeref:typename:int
denali_waitfunc	drivers/mtd/nand/denali.c	/^static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)$/;"	f	typeref:typename:int	file:
denali_write_oob	drivers/mtd/nand/denali.c	/^static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
denali_write_page	drivers/mtd/nand/denali.c	/^static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
denali_write_page_raw	drivers/mtd/nand/denali.c	/^static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
dend	drivers/demo/demo-shape.c	/^		int dend;$/;"	m	struct:shape_hello::shape	typeref:typename:int	file:
density	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 density;	\/* chip density (Gb) (1,2,4,8) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
density	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 density;	\/* chip density (Gb) (1,2,4,8) *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u8
density	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 density;$/;"	m	struct:dram_para	typeref:typename:u32
density	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 density;$/;"	m	struct:dram_para	typeref:typename:u32
density	arch/arm/include/asm/emif.h	/^	u8	density;$/;"	m	struct:lpddr2_device_details	typeref:typename:u8
density	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t density;$/;"	m	struct:dram_params	typeref:typename:uint8_t
density	include/linux/mtd/st_smi.h	/^	u32 density;$/;"	m	struct:flash_dev	typeref:typename:u32
density_banks	include/ddr_spd.h	/^	uint8_t density_banks;		\/*  4 Density and Banks	*\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
density_banks	include/ddr_spd.h	/^	unsigned char density_banks;   \/*  4 SDRAM Density and Banks *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
density_mask	include/linux/mtd/onenand.h	/^	unsigned int density_mask;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
dent_budget	fs/ubifs/ubifs.h	/^	int dent_budget;$/;"	m	struct:ubifs_budg_info	typeref:typename:int
dent_key_init	fs/ubifs/key.h	/^static inline void dent_key_init(const struct ubifs_info *c,$/;"	f	typeref:typename:void
dent_key_init_flash	fs/ubifs/key.h	/^static inline void dent_key_init_flash(const struct ubifs_info *c, void *k,$/;"	f	typeref:typename:void
dent_key_init_hash	fs/ubifs/key.h	/^static inline void dent_key_init_hash(const struct ubifs_info *c,$/;"	f	typeref:typename:void
dentry	drivers/usb/host/isp116x.h	/^	struct dentry *dentry;$/;"	m	struct:isp116x	typeref:struct:dentry *
dentry	fs/ubifs/ubifs.h	/^	struct dentry *dentry;$/;"	m	struct:path	typeref:struct:dentry *
dentry	fs/ubifs/ubifs.h	/^struct dentry {$/;"	s
dep	drivers/usb/dwc3/core.h	/^	struct dwc3_ep		*dep;$/;"	m	struct:dwc3_request	typeref:struct:dwc3_ep *
dep	scripts/kconfig/expr.h	/^	struct expr *dep;$/;"	m	struct:menu	typeref:struct:expr *
dep_stack	scripts/kconfig/symbol.c	/^static struct dep_stack {$/;"	s	file:
dep_stack_insert	scripts/kconfig/symbol.c	/^static void dep_stack_insert(struct dep_stack *stack, struct symbol *sym)$/;"	f	typeref:typename:void	file:
dep_stack_remove	scripts/kconfig/symbol.c	/^static void dep_stack_remove(void)$/;"	f	typeref:typename:void	file:
deparenthesize	scripts/checkpatch.pl	/^sub deparenthesize {$/;"	s
depc	arch/xtensa/include/asm/ptrace.h	/^	unsigned long depc;		\/*  12 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
depends	scripts/kconfig/zconf.y	/^depends: T_DEPENDS T_ON expr T_EOL$/;"	l
depends_list	scripts/kconfig/zconf.y	/^depends_list:$/;"	l
depevt	drivers/usb/dwc3/core.h	/^	struct dwc3_event_depevt	depevt;$/;"	m	union:dwc3_event	typeref:struct:dwc3_event_depevt
depfile	scripts/basic/fixdep.c	/^char *depfile;$/;"	v	typeref:typename:char *
depth	arch/sandbox/cpu/sdl.c	/^	int depth;$/;"	m	struct:sdl_info	typeref:typename:int	file:
depth	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_depth depth;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_depth	file:
depth	drivers/video/sunxi_display.c	/^	unsigned int depth;$/;"	m	struct:sunxi_display	typeref:typename:unsigned int	file:
depth	drivers/video/sunxi_display2.c	/^	unsigned int depth;$/;"	m	struct:sunxi_display	typeref:typename:unsigned int	file:
depth	include/libfdt.h	/^	int depth;			\/* Current tree depth *\/$/;"	m	struct:fdt_region_ptrs	typeref:typename:int
depth	include/linux/fb.h	/^	__u8  depth;			\/* Depth of the image *\/$/;"	m	struct:fb_image_user	typeref:typename:__u8
depth	include/linux/fb.h	/^	__u8  depth;		\/* Depth of the image *\/$/;"	m	struct:fb_image	typeref:typename:__u8
depth	lib/trace.c	/^	int depth;$/;"	m	struct:trace_hdr	typeref:typename:int	file:
depth	lib/zlib/deflate.h	/^    uch depth[2*L_CODES+1];$/;"	m	struct:internal_state	typeref:typename:uch[]
depth_limit	lib/trace.c	/^	int depth_limit;$/;"	m	struct:trace_hdr	typeref:typename:int	file:
deq	drivers/usb/host/xhci.h	/^	__le64	deq;$/;"	m	struct:xhci_ep_ctx	typeref:typename:__le64
deq_seg	drivers/usb/host/xhci.h	/^	struct xhci_segment	*deq_seg;$/;"	m	struct:xhci_ring	typeref:struct:xhci_segment *
dequeue	drivers/usb/host/xhci.h	/^	union  xhci_trb		*dequeue;$/;"	m	struct:xhci_ring	typeref:union:xhci_trb *
dequeue	include/linux/usb/gadget.h	/^	int (*dequeue) (struct usb_ep *ep, struct usb_request *req);$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep,struct usb_request * req)
der	drivers/block/fsl_sata.h	/^	u32 der;		\/* Device error register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
derateen	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 derateen;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
derateen	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 derateen;		\/* 0x20 temperature derate enable register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
derateen	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 derateen;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
derateen	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 derateen;		\/* 0x20 temperature derate enable register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
derateint	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 derateint;		\/* 0x24 temperature derate interval register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
derateint	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 derateint;		\/* 0x24 temperature derate interval register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
deratenint	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 deratenint;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
deratenint	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 deratenint;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dereference_function_descriptor	include/asm-generic/sections.h	/^#define dereference_function_descriptor(/;"	d
deregister_mtd_parser	drivers/mtd/mtdpart.c	/^void deregister_mtd_parser(struct mtd_part_parser *p)$/;"	f	typeref:typename:void
des	arch/arm/dts/am4372.dtsi	/^		des: des@53701000 {$/;"	l
des0	drivers/net/dwc_eth_qos.c	/^	u32 des0;$/;"	m	struct:eqos_desc	typeref:typename:u32	file:
des1	drivers/net/dc2114x.c	/^	u32 des1;$/;"	m	struct:de4x5_desc	typeref:typename:u32	file:
des1	drivers/net/dwc_eth_qos.c	/^	u32 des1;$/;"	m	struct:eqos_desc	typeref:typename:u32	file:
des2	drivers/net/dwc_eth_qos.c	/^	u32 des2;$/;"	m	struct:eqos_desc	typeref:typename:u32	file:
des3	drivers/net/dwc_eth_qos.c	/^	u32 des3;$/;"	m	struct:eqos_desc	typeref:typename:u32	file:
des_cmnd	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 des_cmnd;		\/* MBAR_ETH + 0x1F8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
desc	arch/mips/mach-ath79/cpu.c	/^static const struct ath79_soc_desc desc[] = {$/;"	v	typeref:typename:const struct ath79_soc_desc[]	file:
desc	arch/powerpc/cpu/mpc8260/cpu_init.c	/^		char *desc;$/;"	m	struct:prt_8260_rsr::__anon018255430108	typeref:typename:char *	file:
desc	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^		char *desc;$/;"	m	struct:prt_83xx_rsr::__anon77b5456e0108	typeref:typename:char *	file:
desc	cmd/ambapp.c	/^	char *desc;$/;"	m	struct:__anon3d6428ea0108	typeref:typename:char *	file:
desc	cmd/ambapp.c	/^	char *desc;$/;"	m	struct:__anon3d6428ea0208	typeref:typename:char *	file:
desc	cmd/ldrinfo.c	/^	const char *desc;$/;"	m	struct:ldr_flag	typeref:typename:const char *	file:
desc	common/image.c	/^	const char *desc;$/;"	m	struct:table_info	typeref:typename:const char *	file:
desc	drivers/crypto/fsl/jr.h	/^	phys_addr_t desc;$/;"	m	struct:op_ring	typeref:typename:phys_addr_t
desc	drivers/ddr/marvell/axp/ddr3_sdram.c	/^	struct crc_dma_desc *desc;$/;"	m	struct:xor_channel_t	typeref:struct:crc_dma_desc *	file:
desc	drivers/mmc/mxsmmc.c	/^	struct mxs_dma_desc	*desc;$/;"	m	struct:mxsmmc_priv	typeref:struct:mxs_dma_desc *	file:
desc	drivers/mtd/nand/mxs_nand.c	/^	struct mxs_dma_desc	**desc;$/;"	m	struct:mxs_nand_info	typeref:struct:mxs_dma_desc **	file:
desc	drivers/mtd/ubi/ubi.h	/^	struct ubi_volume_desc *desc;$/;"	m	struct:ubi_rename_entry	typeref:struct:ubi_volume_desc *
desc	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	const struct qbman_swp_desc *desc;$/;"	m	struct:qbman_swp	typeref:typename:const struct qbman_swp_desc *
desc	drivers/power/regulator/pfuze100.c	/^	struct pfuze100_regulator_desc *desc;$/;"	m	struct:pfuze100_regulator_platdata	typeref:struct:pfuze100_regulator_desc *	file:
desc	drivers/usb/gadget/atmel_usba_udc.h	/^	const struct usb_endpoint_descriptor	*desc;$/;"	m	struct:usba_ep	typeref:typename:const struct usb_endpoint_descriptor *
desc	drivers/usb/gadget/ci_udc.h	/^	const struct usb_endpoint_descriptor *desc;$/;"	m	struct:ci_ep	typeref:typename:const struct usb_endpoint_descriptor *
desc	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	const struct usb_endpoint_descriptor *desc;$/;"	m	struct:dwc2_ep	typeref:typename:const struct usb_endpoint_descriptor *
desc	drivers/usb/gadget/fotg210.c	/^	const struct usb_endpoint_descriptor *desc;$/;"	m	struct:fotg210_ep	typeref:typename:const struct usb_endpoint_descriptor *	file:
desc	drivers/usb/gadget/pxa25x_udc.h	/^	const struct usb_endpoint_descriptor	*desc;$/;"	m	struct:pxa25x_ep	typeref:typename:const struct usb_endpoint_descriptor *
desc	drivers/usb/musb-new/musb_gadget.h	/^	const struct usb_endpoint_descriptor	*desc;$/;"	m	struct:musb_ep	typeref:typename:const struct usb_endpoint_descriptor *
desc	drivers/usb/musb-new/usb-compat.h	/^	struct usb_endpoint_descriptor		desc;$/;"	m	struct:usb_host_endpoint	typeref:struct:usb_endpoint_descriptor
desc	drivers/video/fsl_diu_fb.c	/^	__be32 desc[3];$/;"	m	struct:diu	typeref:typename:__be32[3]	file:
desc	drivers/video/mxsfb.c	/^struct mxs_dma_desc desc;$/;"	v	typeref:struct:mxs_dma_desc
desc	include/blk.h	/^	struct blk_desc *desc;$/;"	m	struct:blk_driver	typeref:struct:blk_desc *
desc	include/efi.h	/^	struct efi_mem_desc desc[];$/;"	m	struct:efi_entry_memmap	typeref:struct:efi_mem_desc[]
desc	include/lattice.h	/^	char		*desc;	\/* description string *\/$/;"	m	struct:__anon773a64540408	typeref:typename:char *
desc	include/linux/usb/gadget.h	/^	const struct usb_endpoint_descriptor	*desc;$/;"	m	struct:usb_ep	typeref:typename:const struct usb_endpoint_descriptor *
desc	include/post.h	/^	char *desc;$/;"	m	struct:post_test	typeref:typename:char *
desc	include/usb.h	/^	struct usb_config_descriptor desc;$/;"	m	struct:usb_config	typeref:struct:usb_config_descriptor
desc	include/usb.h	/^	struct usb_hub_descriptor desc;$/;"	m	struct:usb_hub_device	typeref:struct:usb_hub_descriptor
desc	include/usb.h	/^	struct usb_interface_descriptor desc;$/;"	m	struct:usb_interface	typeref:struct:usb_interface_descriptor
desc	lib/efi_loader/efi_disk.c	/^	const struct blk_desc *desc;$/;"	m	struct:efi_disk_obj	typeref:typename:const struct blk_desc *	file:
desc	lib/efi_loader/efi_memory.c	/^	struct efi_mem_desc desc;$/;"	m	struct:efi_mem_list	typeref:struct:efi_mem_desc	file:
descAddrAndStatus	include/MCD_dma.h	/^	volatile u32 descAddrAndStatus;$/;"	m	struct:__anon0c34f9b30108	typeref:typename:volatile u32
desc_and_len_tbl	cmd/mii.c	/^static const MII_field_desc_and_len_t desc_and_len_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_and_len_t[]	file:
desc_before_addr	include/usb.h	/^	bool desc_before_addr;$/;"	m	struct:usb_bus_priv	typeref:typename:bool
desc_bytes	drivers/crypto/fsl/desc_constr.h	/^static inline int desc_bytes(void *desc)$/;"	f	typeref:typename:int
desc_cmd	drivers/ddr/marvell/axp/xor.h	/^	u32 desc_cmd;		\/* type of operation to be carried out on the data *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
desc_cursor	drivers/video/fsl_dcu_fb.c	/^	u32 desc_cursor[4];$/;"	m	struct:dcu_reg	typeref:typename:u32[4]	file:
desc_done	drivers/crypto/fsl/jr.c	/^static void desc_done(uint32_t status, void *arg)$/;"	f	typeref:typename:void	file:
desc_end	drivers/crypto/fsl/desc_constr.h	/^static inline u32 *desc_end(u32 *desc)$/;"	f	typeref:typename:u32 *
desc_error_list	drivers/crypto/fsl/error.c	/^} desc_error_list[] = {$/;"	v	typeref:typename:const struct __anondbc054120108[]
desc_free	drivers/net/cpsw.c	/^	struct cpdma_desc		*desc_free;$/;"	m	struct:cpsw_priv	typeref:struct:cpdma_desc *	file:
desc_get_buf_addr	drivers/net/calxedaxgmac.c	/^static inline void *desc_get_buf_addr(struct xgmac_dma_desc *p)$/;"	f	typeref:typename:void *	file:
desc_get_buf_len	drivers/net/calxedaxgmac.c	/^static inline int desc_get_buf_len(struct xgmac_dma_desc *p)$/;"	f	typeref:typename:int	file:
desc_get_owner	drivers/net/calxedaxgmac.c	/^static inline int desc_get_owner(struct xgmac_dma_desc *p)$/;"	f	typeref:typename:int	file:
desc_get_rx_frame_len	drivers/net/calxedaxgmac.c	/^static inline int desc_get_rx_frame_len(struct xgmac_dma_desc *p)$/;"	f	typeref:typename:int	file:
desc_index	drivers/mtd/nand/mxs_nand.c	/^	uint32_t		desc_index;$/;"	m	struct:mxs_nand_info	typeref:typename:uint32_t	file:
desc_info	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 desc_info;$/;"	m	struct:qm_host_desc	typeref:typename:u32
desc_init_rx_desc	drivers/net/calxedaxgmac.c	/^static inline void desc_init_rx_desc(struct xgmac_dma_desc *p, int ring_size,$/;"	f	typeref:typename:void	file:
desc_init_tx_desc	drivers/net/calxedaxgmac.c	/^static inline void desc_init_tx_desc(struct xgmac_dma_desc *p, u32 ring_size)$/;"	f	typeref:typename:void	file:
desc_len	drivers/crypto/fsl/desc_constr.h	/^static inline int desc_len(u32 *desc)$/;"	f	typeref:typename:int
desc_len	drivers/crypto/fsl/jr.h	/^	uint32_t desc_len;$/;"	m	struct:jr_info	typeref:typename:uint32_t
desc_list	include/usb.h	/^	struct usb_generic_descriptor **desc_list;$/;"	m	struct:usb_dev_platdata	typeref:struct:usb_generic_descriptor **
desc_mem	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct	descr_mem_setup_reg *desc_mem;$/;"	m	struct:qm_config	typeref:struct:descr_mem_setup_reg *
desc_pdb	drivers/crypto/fsl/desc_constr.h	/^static inline void *desc_pdb(u32 *desc)$/;"	f	typeref:typename:void *
desc_phys_addr	drivers/crypto/fsl/jr.h	/^	phys_addr_t desc_phys_addr;$/;"	m	struct:jr_info	typeref:typename:phys_addr_t
desc_phys_addr	drivers/ddr/marvell/axp/ddr3_sdram.c	/^	unsigned long desc_phys_addr;$/;"	m	struct:xor_channel_t	typeref:typename:unsigned long	file:
desc_pool_array	drivers/net/uli526x.c	/^static struct tx_desc desc_pool_array[DESC_ALL_CNT + 0x20]$/;"	v	typeref:struct:tx_desc[]	file:
desc_pool_dma_ptr	drivers/net/uli526x.c	/^	dma_addr_t desc_pool_dma_ptr;	\/* descriptor pool memory *\/$/;"	m	struct:uli526x_board_info	typeref:typename:dma_addr_t	file:
desc_pool_ptr	drivers/net/uli526x.c	/^	unsigned char *desc_pool_ptr;	\/* descriptor pool memory *\/$/;"	m	struct:uli526x_board_info	typeref:typename:unsigned char *	file:
desc_ptr	arch/x86/cpu/interrupts.c	/^struct desc_ptr {$/;"	s	file:
desc_read	drivers/net/cpsw.c	/^#define desc_read(/;"	d	file:
desc_read_ptr	drivers/net/cpsw.c	/^#define desc_read_ptr(/;"	d	file:
desc_reg_size	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	desc_reg_size;$/;"	m	struct:descr_mem_setup_reg	typeref:typename:u32
desc_set_buf_addr	drivers/net/calxedaxgmac.c	/^static inline void desc_set_buf_addr(struct xgmac_dma_desc *p,$/;"	f	typeref:typename:void	file:
desc_set_buf_addr_and_size	drivers/net/calxedaxgmac.c	/^static inline void desc_set_buf_addr_and_size(struct xgmac_dma_desc *p,$/;"	f	typeref:typename:void	file:
desc_set_buf_len	drivers/net/calxedaxgmac.c	/^static inline void desc_set_buf_len(struct xgmac_dma_desc *p, u32 buf_sz)$/;"	f	typeref:typename:void	file:
desc_set_rx_owner	drivers/net/calxedaxgmac.c	/^static inline void desc_set_rx_owner(struct xgmac_dma_desc *p)$/;"	f	typeref:typename:void	file:
desc_set_tx_owner	drivers/net/calxedaxgmac.c	/^static inline void desc_set_tx_owner(struct xgmac_dma_desc *p, u32 flags)$/;"	f	typeref:typename:void	file:
desc_size	include/efi.h	/^	u32 desc_size;$/;"	m	struct:efi_entry_memmap	typeref:typename:u32
desc_status_bits	drivers/net/natsemi.c	/^enum desc_status_bits {$/;"	g	file:
desc_status_bits	drivers/net/ns8382x.c	/^enum desc_status_bits {$/;"	g	file:
desc_table	drivers/fpga/fpga.c	/^static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];$/;"	v	typeref:typename:fpga_desc[]	file:
desc_write	drivers/net/cpsw.c	/^#define desc_write(/;"	d	file:
descr	common/cli_hush.c	/^	char *descr;				\/* description *\/$/;"	m	struct:built_in_command	typeref:typename:char *	file:
descr_mem_setup_reg	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct	descr_mem_setup_reg {$/;"	s
descrip	common/cli_hush.c	/^struct {int mode; int default_fd; char *descrip;} redir_table[] = {$/;"	m	struct:__anon62a9299d0208	typeref:typename:char *	file:
description	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^	char *description;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:char *	file:
description	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	char *description;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:char *	file:
description	arch/powerpc/include/asm/ppc4xx_config.h	/^	char description[64];$/;"	m	struct:ppc4xx_config	typeref:typename:char[64]
description	board/cadence/xtfpga/xtfpga.c	/^const char *description = "";$/;"	v	typeref:typename:const char *
description	board/cadence/xtfpga/xtfpga.c	/^const char *description = "Avnet Xilinx LX60 FPGA Evaluation Board \/ ";$/;"	v	typeref:typename:const char *
description	board/cadence/xtfpga/xtfpga.c	/^const char *description = "Avnet Xilinx Virtex-4 LX200 Evaluation Kit \/ ";$/;"	v	typeref:typename:const char *
description	board/cadence/xtfpga/xtfpga.c	/^const char *description = "Avnet Xilinx Virtex-5 LX110 Evaluation Kit \/ ";$/;"	v	typeref:typename:const char *
description	board/cadence/xtfpga/xtfpga.c	/^const char *description = "Xilinx Kintex-7 FPGA KC705 Evaluation Kit \/ ";$/;"	v	typeref:typename:const char *
description	board/cadence/xtfpga/xtfpga.c	/^const char *description = "Xilinx Virtex-6 FPGA ML605 Evaluation Kit \/ ";$/;"	v	typeref:typename:const char *
descriptor	drivers/net/eepro100.c	/^struct descriptor {			\/* A generic descriptor. *\/$/;"	s	file:
descriptor	drivers/usb/host/ehci-hcd.c	/^static struct descriptor {$/;"	s	file:
descriptor	drivers/usb/host/ehci-hcd.c	/^}  __attribute__ ((packed)) descriptor = {$/;"	v	typeref:struct:descriptor
descriptor	drivers/usb/host/xhci.c	/^static struct descriptor {$/;"	s	file:
descriptor	drivers/usb/host/xhci.c	/^} __attribute__ ((packed)) descriptor = {$/;"	v	typeref:struct:descriptor
descriptor	include/edid.h	/^		struct edid_monitor_descriptor descriptor[4];$/;"	m	union:edid1_info::__anon4a0dc044040a	typeref:struct:edid_monitor_descriptor[4]
descriptor	include/usb.h	/^	struct usb_device_descriptor descriptor$/;"	m	struct:usb_device	typeref:struct:usb_device_descriptor
descriptor	include/usbdescriptors.h	/^	} descriptor;$/;"	m	struct:usb_class_descriptor	typeref:union:usb_class_descriptor::__anon028dca6a020a
descriptor	include/usbdescriptors.h	/^	} descriptor;$/;"	m	struct:usb_descriptor	typeref:union:usb_descriptor::__anon028dca6a010a
descriptor_control	drivers/net/altera_tse.h	/^	u8 descriptor_control;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u8
descriptor_pad	drivers/net/altera_tse.h	/^	u32 descriptor_pad[3];$/;"	m	struct:alt_sgdma_registers	typeref:typename:u32[3]
descriptor_size	include/ext_common.h	/^	__le16 descriptor_size;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
descriptor_status	drivers/net/altera_tse.h	/^	u8 descriptor_status;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u8
descriptor_types_mask	drivers/crypto/fsl/sec.c	/^		u32 descriptor_types_mask;$/;"	m	struct:fdt_fixup_crypto_node::sec_rev_prop	typeref:typename:u32	file:
descriptors	include/linux/usb/composite.h	/^	const struct usb_descriptor_header **descriptors;$/;"	m	struct:usb_configuration	typeref:typename:const struct usb_descriptor_header **
descriptors	include/linux/usb/composite.h	/^	struct usb_descriptor_header	**descriptors;$/;"	m	struct:usb_function	typeref:struct:usb_descriptor_header **
descs	drivers/net/cpsw.c	/^	struct cpdma_desc		*descs;$/;"	m	struct:cpsw_priv	typeref:struct:cpdma_desc *	file:
descs	drivers/net/dwc_eth_qos.c	/^	void *descs;$/;"	m	struct:eqos_priv	typeref:typename:void *	file:
descs	drivers/net/mvneta.c	/^	struct mvneta_rx_desc *descs;$/;"	m	struct:mvneta_rx_queue	typeref:struct:mvneta_rx_desc *	file:
descs	drivers/net/mvneta.c	/^	struct mvneta_tx_desc *descs;$/;"	m	struct:mvneta_tx_queue	typeref:struct:mvneta_tx_desc *	file:
descs	drivers/net/mvpp2.c	/^	struct mvpp2_rx_desc *descs;$/;"	m	struct:mvpp2_rx_queue	typeref:struct:mvpp2_rx_desc *	file:
descs	drivers/net/mvpp2.c	/^	struct mvpp2_tx_desc *descs;$/;"	m	struct:mvpp2_tx_queue	typeref:struct:mvpp2_tx_desc *	file:
descs_phys	drivers/net/mvneta.c	/^	dma_addr_t descs_phys;$/;"	m	struct:mvneta_rx_queue	typeref:typename:dma_addr_t	file:
descs_phys	drivers/net/mvneta.c	/^	dma_addr_t descs_phys;$/;"	m	struct:mvneta_tx_queue	typeref:typename:dma_addr_t	file:
descs_phys	drivers/net/mvpp2.c	/^	dma_addr_t descs_phys;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:dma_addr_t	file:
descs_phys	drivers/net/mvpp2.c	/^	dma_addr_t descs_phys;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:dma_addr_t	file:
desctab_info	lib/efi/efi_stub.c	/^struct __packed desctab_info {$/;"	s	file:
desctype	disk/part_iso.h	/^	unsigned char desctype;			\/* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supp/;"	m	struct:iso_boot_rec	typeref:typename:unsigned char
desctype	disk/part_iso.h	/^	unsigned char desctype;			\/* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supp/;"	m	struct:iso_part_rec	typeref:typename:unsigned char
desctype	disk/part_iso.h	/^	unsigned char desctype;			\/* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supp/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char
desctype	disk/part_iso.h	/^	unsigned char desctype;			\/* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supp/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char
deselect	include/i2c.h	/^	int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);$/;"	m	struct:i2c_mux_ops	typeref:typename:int (*)(struct udevice * mux,struct udevice * bus,uint channel)
design_id	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 design_id;			\/* 0x000 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
designware_eth_bind	drivers/net/designware.c	/^static int designware_eth_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
designware_eth_free_pkt	drivers/net/designware.c	/^static int designware_eth_free_pkt(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
designware_eth_ids	drivers/net/designware.c	/^static const struct udevice_id designware_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
designware_eth_ofdata_to_platdata	drivers/net/designware.c	/^static int designware_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
designware_eth_ops	drivers/net/designware.c	/^static const struct eth_ops designware_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
designware_eth_probe	drivers/net/designware.c	/^static int designware_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
designware_eth_recv	drivers/net/designware.c	/^static int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
designware_eth_remove	drivers/net/designware.c	/^static int designware_eth_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
designware_eth_send	drivers/net/designware.c	/^static int designware_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
designware_eth_start	drivers/net/designware.c	/^static int designware_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
designware_eth_stop	drivers/net/designware.c	/^static void designware_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
designware_eth_write_hwaddr	drivers/net/designware.c	/^static int designware_eth_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
designware_initialize	drivers/net/designware.c	/^int designware_initialize(ulong base_addr, u32 interface)$/;"	f	typeref:typename:int
designware_wdt_enable	drivers/watchdog/designware_wdt.c	/^static void designware_wdt_enable(void)$/;"	f	typeref:typename:void	file:
designware_wdt_is_enabled	drivers/watchdog/designware_wdt.c	/^static unsigned int designware_wdt_is_enabled(void)$/;"	f	typeref:typename:unsigned int	file:
designware_wdt_settimeout	drivers/watchdog/designware_wdt.c	/^static int designware_wdt_settimeout(unsigned int timeout)$/;"	f	typeref:typename:int	file:
desired_mode	drivers/usb/musb-new/musb_dma.h	/^	bool			desired_mode;$/;"	m	struct:dma_channel	typeref:typename:bool
dest	include/mmc.h	/^		char *dest;$/;"	m	union:mmc_data::__anona5bcc78b010a	typeref:typename:char *
destAddr	include/MCD_dma.h	/^	s8 *destAddr;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:s8 *
dest_addr	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned char	dest_addr[ENET_ADDR_LENGTH];$/;"	m	struct:enet_frame	typeref:typename:unsigned char[]
dest_addr	drivers/dma/lpc32xx_dma.c	/^	u32 dest_addr;$/;"	m	struct:dmac_chan_reg	typeref:typename:u32	file:
dest_cfg	include/fsl-mc/fsl_dpni.h	/^	struct dpni_dest_cfg dest_cfg;$/;"	m	struct:dpni_queue_attr	typeref:struct:dpni_dest_cfg
dest_cfg	include/fsl-mc/fsl_dpni.h	/^	struct dpni_dest_cfg dest_cfg;$/;"	m	struct:dpni_queue_cfg	typeref:struct:dpni_dest_cfg
dest_file	include/qfw.h	/^			char dest_file[BIOS_LINKER_LOADER_FILESZ];$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0508	typeref:typename:char[]
dest_id	include/fsl-mc/fsl_dpni.h	/^	int dest_id;$/;"	m	struct:dpni_dest_cfg	typeref:typename:int
dest_type	include/fsl-mc/fsl_dpni.h	/^	enum dpni_dest dest_type;$/;"	m	struct:dpni_dest_cfg	typeref:enum:dpni_dest
destaddr	tools/kwbimage.h	/^	uint32_t destaddr;		\/*16-19 *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint32_t
destaddr	tools/kwbimage.h	/^	uint32_t destaddr;              \/* 10-13 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint32_t
destat	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 destat;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
destination	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 destination;	\/* destination address to put the wb code *\/$/;"	m	struct:wb_header	typeref:typename:u32
destination	drivers/net/altera_tse.h	/^	u32 destination;	\/* the address to write data *\/$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u32
destination_pad	drivers/net/altera_tse.h	/^	u32 destination_pad;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u32
destroy	include/dm/uclass.h	/^	int (*destroy)(struct uclass *class);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct uclass * class)
destroy_ai	drivers/mtd/ubi/attach.c	/^static void destroy_ai(struct ubi_attach_info *ai)$/;"	f	typeref:typename:void	file:
destroy_av	drivers/mtd/ubi/attach.c	/^static void destroy_av(struct ubi_attach_info *ai, struct ubi_ainf_volume *av)$/;"	f	typeref:typename:void	file:
destroy_bud_list	fs/ubifs/replay.c	/^static void destroy_bud_list(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
destroy_done_tree	fs/ubifs/log.c	/^static void destroy_done_tree(struct rb_root *done_tree)$/;"	f	typeref:typename:void	file:
destroy_inode	fs/ubifs/ubifs.h	/^	void (*destroy_inode)(struct inode *);$/;"	m	struct:super_operations	typeref:typename:void (*)(struct inode *)
destroy_int_queue	drivers/usb/host/ehci-hcd.c	/^int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)$/;"	f	typeref:typename:int
destroy_int_queue	drivers/usb/host/ohci-hcd.c	/^int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)$/;"	f	typeref:typename:int
destroy_int_queue	drivers/usb/host/usb-uclass.c	/^int destroy_int_queue(struct usb_device *udev, struct int_queue *queue)$/;"	f	typeref:typename:int
destroy_int_queue	drivers/usb/musb-new/musb_uboot.c	/^int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)$/;"	f	typeref:typename:int
destroy_int_queue	include/usb.h	/^	int (*destroy_int_queue)(struct udevice *bus, struct usb_device *udev,$/;"	m	struct:dm_usb_ops	typeref:typename:int (*)(struct udevice * bus,struct usb_device * udev,struct int_queue * queue)
destroy_journal	fs/ubifs/super.c	/^static void destroy_journal(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
destroy_old_idx	fs/ubifs/tnc.c	/^void destroy_old_idx(struct ubifs_info *c)$/;"	f	typeref:typename:void
destroy_pxe_menu	cmd/pxe.c	/^static void destroy_pxe_menu(struct pxe_menu *cfg)$/;"	f	typeref:typename:void	file:
destroy_replay_list	fs/ubifs/replay.c	/^static void destroy_replay_list(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
detail_board_ddr_info	board/freescale/ls2080a/ls2080a.c	/^void detail_board_ddr_info(void)$/;"	f	typeref:typename:void
detail_board_ddr_info	board/freescale/ls2080aqds/ls2080aqds.c	/^void detail_board_ddr_info(void)$/;"	f	typeref:typename:void
detail_board_ddr_info	board/freescale/ls2080ardb/ls2080ardb.c	/^void detail_board_ddr_info(void)$/;"	f	typeref:typename:void
detail_board_ddr_info	drivers/ddr/fsl/util.c	/^void __weak detail_board_ddr_info(void)$/;"	f	typeref:typename:void __weak
detect	arch/arm/include/asm/imx-common/video.h	/^	int	(*detect)(struct display_info_t const *dev);$/;"	m	struct:display_info_t	typeref:typename:int (*)(struct display_info_t const * dev)
detect	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	int (*detect)(struct display_info_t const *dev);$/;"	m	struct:display_info_t	typeref:typename:int (*)(struct display_info_t const * dev)	file:
detect	include/fat.h	/^	file_detectfs_func	*detect;$/;"	m	struct:filesystem	typeref:typename:file_detectfs_func *
detect_baseboard	board/advantech/dms-ba16/dms-ba16.c	/^static int detect_baseboard(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_baseboard	board/ge/bx50v3/bx50v3.c	/^static int detect_baseboard(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_data_type	lib/zlib/trees.c	/^local int detect_data_type(s)$/;"	f
detect_daughter_board_profile	board/ti/am335x/mux.c	/^static unsigned short detect_daughter_board_profile(void)$/;"	f	typeref:typename:unsigned short	file:
detect_hdmi	arch/arm/imx-common/video.c	/^int detect_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:int
detect_i2c	board/boundary/nitrogen6x/nitrogen6x.c	/^static int detect_i2c(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_i2c	board/embest/mx6boards/mx6boards.c	/^static int detect_i2c(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_i2c	board/gateworks/gw_ventana/gw_ventana.c	/^static int detect_i2c(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_i2c	board/wandboard/wandboard.c	/^static int detect_i2c(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_imximage_version	tools/imximage.c	/^static uint32_t detect_imximage_version(struct imx_header *imx_hdr)$/;"	f	typeref:typename:uint32_t	file:
detect_irq	drivers/mmc/mxcmmc.c	/^	int			detect_irq;$/;"	m	struct:mxcmci_host	typeref:typename:int	file:
detect_lvds	board/kosagi/novena/video.c	/^static int detect_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:int	file:
detect_max_banks	drivers/mtd/nand/denali.c	/^static void detect_max_banks(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
detect_num_flash_banks	arch/arm/mach-uniphier/micro-support-card.c	/^static void detect_num_flash_banks(void)$/;"	f	typeref:typename:void	file:
detect_num_flash_banks	arch/arm/mach-uniphier/micro-support-card.c	/^void detect_num_flash_banks(void)$/;"	f	typeref:typename:void
detect_num_flash_banks	board/tqc/tqm834x/tqm834x.c	/^static int detect_num_flash_banks(void)$/;"	f	typeref:typename:int	file:
detect_partition_feature	drivers/mtd/nand/denali.c	/^static void detect_partition_feature(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
detect_waiting	drivers/mmc/sh_sdhi.c	/^	unsigned char detect_waiting;$/;"	m	struct:sh_sdhi_host	typeref:typename:unsigned char	file:
determine_crypto_options	arch/arm/mach-tegra/tegra20/warmboot.c	/^static void determine_crypto_options(int *is_encrypted, int *is_signed,$/;"	f	typeref:typename:void	file:
determine_fatent	fs/fat/fat_write.c	/^static __u32 determine_fatent(fsdata *mydata, __u32 entry)$/;"	f	typeref:typename:__u32	file:
determine_mp_bootpg	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^phys_addr_t determine_mp_bootpg(void)$/;"	f	typeref:typename:phys_addr_t
determine_mp_bootpg	arch/powerpc/cpu/mpc85xx/mp.c	/^u32 determine_mp_bootpg(unsigned int *pagesize)$/;"	f	typeref:typename:u32
determine_mp_bootpg	arch/powerpc/cpu/mpc86xx/mp.c	/^u32 determine_mp_bootpg(unsigned int *pagesize)$/;"	f	typeref:typename:u32
determine_pci_clock_per	arch/powerpc/cpu/ppc4xx/speed.c	/^unsigned long determine_pci_clock_per(void)$/;"	f	typeref:typename:unsigned long
determine_refresh_rate_ps	drivers/ddr/fsl/ddr1_dimm_params.c	/^determine_refresh_rate_ps(const unsigned int spd_refresh)$/;"	f	typeref:typename:unsigned int	file:
determine_refresh_rate_ps	drivers/ddr/fsl/ddr2_dimm_params.c	/^determine_refresh_rate_ps(const unsigned int spd_refresh)$/;"	f	typeref:typename:unsigned int	file:
determine_sysper	arch/powerpc/cpu/ppc4xx/speed.c	/^unsigned long determine_sysper(void)$/;"	f	typeref:typename:unsigned long
dev	arch/arm/include/asm/imx-common/dma.h	/^	unsigned long dev;$/;"	m	struct:mxs_dma_chan	typeref:typename:unsigned long
dev	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct usb_device *dev[32];$/;"	m	struct:ohci	typeref:struct:usb_device * [32]
dev	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	void *dev;  \/* was urb *\/$/;"	m	struct:virt_root_hub	typeref:typename:void *
dev	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct usb_device *dev[32];$/;"	m	struct:ohci	typeref:struct:usb_device * [32]
dev	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	void *dev;  \/* was urb *\/$/;"	m	struct:virt_root_hub	typeref:typename:void *
dev	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct usb_device *dev[32];$/;"	m	struct:ohci	typeref:struct:usb_device * [32]
dev	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	void *dev;		\/* was urb *\/$/;"	m	struct:virt_root_hub	typeref:typename:void *
dev	arch/powerpc/include/asm/immap_512x.h	/^	i2c512x_dev_t dev[I2C_BUS_CNT];$/;"	m	struct:i2c512x	typeref:typename:i2c512x_dev_t[]
dev	arch/x86/cpu/mp_init.c	/^	struct udevice *dev;$/;"	m	struct:cpu_map	typeref:struct:udevice *	file:
dev	cmd/tsi148.c	/^static TSI148_DEV *dev;$/;"	v	typeref:typename:TSI148_DEV *	file:
dev	cmd/universe.c	/^static UNI_DEV   *dev;$/;"	v	typeref:typename:UNI_DEV *	file:
dev	common/usb_hub.c	/^	struct usb_device *dev;		\/* USB hub device to scan *\/$/;"	m	struct:usb_device_scan	typeref:struct:usb_device *	file:
dev	drivers/block/sata_dwc.c	/^	struct device		*dev;$/;"	m	struct:sata_dwc_device	typeref:struct:device *	file:
dev	drivers/block/sata_dwc.h	/^	struct ata_device	*dev;$/;"	m	struct:ata_queued_cmd	typeref:struct:ata_device *
dev	drivers/block/sata_dwc.h	/^	struct device		*dev;$/;"	m	struct:ata_port	typeref:struct:device *
dev	drivers/gpio/pca953x_gpio.c	/^	struct udevice *dev;$/;"	m	struct:pca953x_info	typeref:struct:udevice *	file:
dev	drivers/mmc/fsl_esdhc.c	/^	struct udevice *dev;$/;"	m	struct:fsl_esdhc_priv	typeref:struct:udevice *	file:
dev	drivers/mtd/nand/denali.h	/^	struct device *dev;$/;"	m	struct:denali_nand_info	typeref:struct:device *
dev	drivers/mtd/nand/fsl_elbc_nand.c	/^	struct device *dev;$/;"	m	struct:fsl_elbc_mtd	typeref:struct:device *	file:
dev	drivers/mtd/nand/fsl_ifc_nand.c	/^	struct device *dev;$/;"	m	struct:fsl_ifc_mtd	typeref:struct:device *	file:
dev	drivers/mtd/nand/sunxi_nand.c	/^	struct device *dev;$/;"	m	struct:sunxi_nfc	typeref:struct:device *	file:
dev	drivers/mtd/ubi/ubi.h	/^	struct device dev;$/;"	m	struct:ubi_device	typeref:struct:device
dev	drivers/mtd/ubi/ubi.h	/^	struct device dev;$/;"	m	struct:ubi_volume	typeref:struct:device
dev	drivers/net/ag7xxx.c	/^	struct eth_device	*dev;$/;"	m	struct:ar7xxx_eth_priv	typeref:struct:eth_device *	file:
dev	drivers/net/armada100_fec.h	/^	struct eth_device dev;$/;"	m	struct:armdfec_device	typeref:struct:eth_device
dev	drivers/net/calxedaxgmac.c	/^	struct eth_device *dev;$/;"	m	struct:calxeda_eth_dev	typeref:struct:eth_device *	file:
dev	drivers/net/cpsw.c	/^	struct udevice			*dev;$/;"	m	struct:cpsw_priv	typeref:struct:udevice *	file:
dev	drivers/net/designware.h	/^	struct eth_device *dev;$/;"	m	struct:dw_eth_dev	typeref:struct:eth_device *
dev	drivers/net/dnet.c	/^	const struct device	*dev;$/;"	m	struct:dnet_device	typeref:typename:const struct device *	file:
dev	drivers/net/dwc_eth_qos.c	/^	struct udevice *dev;$/;"	m	struct:eqos_priv	typeref:struct:udevice *	file:
dev	drivers/net/enc28j60.c	/^	struct eth_device	*dev;	\/* back pointer *\/$/;"	m	struct:enc_device	typeref:struct:eth_device *	file:
dev	drivers/net/fm/fm.h	/^	struct eth_device *dev;$/;"	m	struct:fm_eth	typeref:struct:eth_device *
dev	drivers/net/greth.c	/^	struct eth_device *dev;$/;"	m	struct:__anonb53b88540108	typeref:struct:eth_device *	file:
dev	drivers/net/keystone_net.c	/^	struct udevice			*dev;$/;"	m	struct:ks2_eth_priv	typeref:struct:udevice *	file:
dev	drivers/net/lpc32xx_eth.c	/^	struct eth_device dev;$/;"	m	struct:lpc32xx_eth_device	typeref:struct:eth_device	file:
dev	drivers/net/macb.c	/^	const struct device	*dev;$/;"	m	struct:macb_device	typeref:typename:const struct device *	file:
dev	drivers/net/mvgbe.h	/^	struct eth_device dev;$/;"	m	struct:mvgbe_device	typeref:struct:eth_device
dev	drivers/net/pch_gbe.h	/^	struct udevice *dev;$/;"	m	struct:pch_gbe_priv	typeref:struct:udevice *
dev	drivers/net/sh_eth.h	/^	struct eth_device *dev;$/;"	m	struct:sh_eth_info	typeref:struct:eth_device *
dev	drivers/pci/pci_mvebu.c	/^	pci_dev_t dev;$/;"	m	struct:mvebu_pcie	typeref:typename:pci_dev_t	file:
dev	drivers/pinctrl/nxp/pinctrl-imx.h	/^	struct udevice *dev;$/;"	m	struct:imx_pinctrl_priv	typeref:struct:udevice *
dev	drivers/qe/uec.h	/^	struct eth_device		*dev;$/;"	m	struct:uec_private	typeref:struct:eth_device *
dev	drivers/qe/uec_phy.h	/^	struct eth_device *dev;$/;"	m	struct:uec_mii_info	typeref:struct:eth_device *
dev	drivers/usb/dwc3/core.h	/^	struct device		*dev;$/;"	m	struct:dwc3	typeref:struct:device *
dev	drivers/usb/dwc3/dwc3-omap.c	/^	struct device		*dev;$/;"	m	struct:dwc3_omap	typeref:struct:device *	file:
dev	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct dwc2_udc *dev;$/;"	m	struct:dwc2_ep	typeref:struct:dwc2_udc *
dev	drivers/usb/gadget/f_thor.h	/^	struct thor_dev *dev;$/;"	m	struct:f_thor	typeref:struct:thor_dev *
dev	drivers/usb/gadget/pxa25x_udc.h	/^	struct pxa25x_udc			*dev;$/;"	m	struct:pxa25x_ep	typeref:struct:pxa25x_udc *
dev	drivers/usb/gadget/rndis.h	/^	struct eth_device	*dev;$/;"	m	struct:rndis_params	typeref:struct:eth_device *
dev	drivers/usb/gadget/storage_common.c	/^	struct device	dev;$/;"	m	struct:fsg_lun	typeref:struct:device	file:
dev	drivers/usb/gadget/udc/udc-core.c	/^	struct device			dev;$/;"	m	struct:usb_udc	typeref:struct:device	file:
dev	drivers/usb/host/ohci-s3c24xx.h	/^	struct usb_device *dev[32];$/;"	m	struct:ohci	typeref:struct:usb_device * [32]
dev	drivers/usb/host/ohci-s3c24xx.h	/^	void *dev;		\/* was urb *\/$/;"	m	struct:virt_root_hub	typeref:typename:void *
dev	drivers/usb/host/ohci.h	/^	struct usb_device *dev;$/;"	m	struct:__anone9fd91320108	typeref:struct:usb_device *
dev	drivers/usb/host/ohci.h	/^	struct usb_device *dev[32];$/;"	m	struct:ohci	typeref:struct:usb_device * [32]
dev	drivers/usb/host/ohci.h	/^	void *dev;  \/* was urb *\/$/;"	m	struct:virt_root_hub	typeref:typename:void *
dev	drivers/usb/host/xhci.h	/^	struct udevice *dev;$/;"	m	struct:xhci_ctrl	typeref:struct:udevice *
dev	drivers/usb/musb-new/am35x.c	/^	struct device		*dev;$/;"	m	struct:am35x_glue	typeref:struct:device *	file:
dev	drivers/usb/musb-new/musb_dsps.c	/^	struct device *dev;$/;"	m	struct:dsps_glue	typeref:struct:device *	file:
dev	drivers/usb/musb-new/musb_gadget.c	/^	struct device		*dev;$/;"	m	struct:free_record	typeref:struct:device *	file:
dev	drivers/usb/musb-new/musb_host.h	/^	struct usb_device	*dev;$/;"	m	struct:musb_qh	typeref:struct:usb_device *
dev	drivers/usb/musb-new/omap2430.c	/^	struct device		*dev;$/;"	m	struct:omap2430_glue	typeref:struct:device *	file:
dev	drivers/usb/musb-new/pic32.c	/^	struct device dev;$/;"	m	struct:pic32_musb_data	typeref:struct:device	file:
dev	drivers/usb/musb-new/usb-compat.h	/^	struct usb_device *dev;		\/* (in) pointer to associated device *\/$/;"	m	struct:urb	typeref:struct:usb_device *
dev	fs/yaffs2/yaffscfg.h	/^	struct yaffs_dev *dev;$/;"	m	struct:yaffsfs_DeviceConfiguration	typeref:struct:yaffs_dev *
dev	include/ahci.h	/^	struct udevice *dev;$/;"	m	struct:ahci_probe_ent	typeref:struct:udevice *
dev	include/asm-generic/gpio.h	/^	struct udevice *dev;	\/* Device, NULL for invalid GPIO *\/$/;"	m	struct:gpio_desc	typeref:struct:udevice *
dev	include/clk.h	/^	struct udevice *dev;$/;"	m	struct:clk	typeref:struct:udevice *
dev	include/cros_ec.h	/^	struct udevice *dev;		\/* Transport device *\/$/;"	m	struct:cros_ec_dev	typeref:struct:udevice *
dev	include/dfu.h	/^	struct spi_flash *dev;$/;"	m	struct:sf_internal_data	typeref:struct:spi_flash *
dev	include/dfu.h	/^	unsigned int dev;$/;"	m	struct:mmc_internal_data	typeref:typename:unsigned int
dev	include/dfu.h	/^	unsigned int dev;$/;"	m	struct:nand_internal_data	typeref:typename:unsigned int
dev	include/faraday/ftpci100.h	/^	unsigned int dev;				\/* device *\/$/;"	m	struct:pci_config	typeref:typename:unsigned int
dev	include/input.h	/^	struct udevice *dev;$/;"	m	struct:input_config	typeref:struct:udevice *
dev	include/jffs2/load_kernel.h	/^	struct mtd_device *dev;		\/* parent device *\/$/;"	m	struct:part_info	typeref:struct:mtd_device *
dev	include/linux/compat.h	/^	dev_t dev;$/;"	m	struct:cdev	typeref:typename:dev_t
dev	include/linux/ioport.h	/^	struct pci_dev *dev;$/;"	m	struct:resource_list	typeref:struct:pci_dev *
dev	include/linux/mtd/mtd.h	/^	struct device dev;$/;"	m	struct:mtd_info	typeref:struct:device
dev	include/linux/mtd/mtd.h	/^	struct udevice *dev;$/;"	m	struct:mtd_info	typeref:struct:udevice *
dev	include/linux/mtd/mtd.h	/^	unsigned dev;$/;"	m	struct:erase_info	typeref:typename:unsigned
dev	include/linux/usb/composite.h	/^	const struct usb_device_descriptor	*dev;$/;"	m	struct:usb_composite_driver	typeref:typename:const struct usb_device_descriptor *
dev	include/linux/usb/gadget.h	/^	struct device			dev;$/;"	m	struct:usb_gadget	typeref:struct:device
dev	include/mailbox.h	/^	struct udevice *dev;$/;"	m	struct:mbox_chan	typeref:struct:udevice *
dev	include/mmc.h	/^	struct udevice *dev;	\/* Device for this MMC controller *\/$/;"	m	struct:mmc	typeref:struct:udevice *
dev	include/pci.h	/^	unsigned int dev;			\/* Device number, or PCI_ANY_ID *\/$/;"	m	struct:pci_config_table	typeref:typename:unsigned int
dev	include/phy.h	/^	struct eth_device *dev;$/;"	m	struct:phy_device	typeref:struct:eth_device *
dev	include/phy.h	/^	struct udevice *dev;$/;"	m	struct:phy_device	typeref:struct:udevice *
dev	include/power-domain.h	/^	struct udevice *dev;$/;"	m	struct:power_domain	typeref:struct:udevice *
dev	include/power/act8846_pmic.h	/^	struct udevice *dev;$/;"	m	struct:pmic_act8846	typeref:struct:udevice *
dev	include/reset.h	/^	struct udevice *dev;$/;"	m	struct:reset_ctl	typeref:struct:udevice *
dev	include/spi.h	/^	struct udevice *dev;	\/* struct spi_slave is dev->parentdata *\/$/;"	m	struct:spi_slave	typeref:struct:udevice *
dev	include/spi.h	/^	struct udevice *dev;$/;"	m	struct:spi_cs_info	typeref:struct:udevice *
dev	include/spi_flash.h	/^	struct udevice *dev;$/;"	m	struct:spi_flash	typeref:struct:udevice *
dev	include/spl.h	/^	void *dev;$/;"	m	struct:spl_load_info	typeref:typename:void *
dev	include/tsec.h	/^	struct eth_device *dev;$/;"	m	struct:tsec_private	typeref:struct:eth_device *
dev	include/tsec.h	/^	struct udevice *dev;$/;"	m	struct:tsec_private	typeref:struct:udevice *
dev	include/usb.h	/^	struct udevice *dev;		\/* Pointer to associated device *\/$/;"	m	struct:usb_device	typeref:struct:udevice *
dev3cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	dev3cfg;	\/* 0x12C: APB_MISC_GP_DEV3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dev3cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	dev3cfg;	\/* 0x12C: APB_MISC_GP_DEV3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dev3cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	dev3cfg;	\/* 0x12C: APB_MISC_GP_DEV3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
dev_4G_S4_details	arch/arm/cpu/armv7/omap5/sdram.c	/^static const struct lpddr2_device_details dev_4G_S4_details = {$/;"	v	typeref:typename:const struct lpddr2_device_details	file:
dev_4G_S4_timings	arch/arm/cpu/armv7/omap5/sdram.c	/^static const struct lpddr2_device_timings dev_4G_S4_timings = {$/;"	v	typeref:typename:const struct lpddr2_device_timings	file:
dev_WARN	drivers/usb/dwc3/linux-compat.h	/^#define dev_WARN(/;"	d
dev_addr	drivers/net/mvpp2.c	/^	u8 dev_addr[ETH_ALEN];$/;"	m	struct:mvpp2_port	typeref:typename:u8[]	file:
dev_addr	drivers/usb/gadget/ether.c	/^static char dev_addr[18];$/;"	v	typeref:typename:char[18]	file:
dev_addr	include/usb/fotg210.h	/^	uint32_t dev_addr;\/* 0x104: Device Address Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
dev_attr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int dev_attr;$/;"	m	struct:ctrl_stat	typeref:typename:unsigned int
dev_attr	include/ddr_spd.h	/^	unsigned char dev_attr;    \/* 22 SDRAM Device Attributes *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
dev_attr	include/ddr_spd.h	/^	unsigned char dev_attr;    \/* 22 SDRAM Device Attributes *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dev_attr	include/spd.h	/^	unsigned char dev_attr;    \/* 22 SDRAM Device Attributes *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
dev_attribute_show	drivers/mtd/ubi/build.c	/^static ssize_t dev_attribute_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
dev_avail_eraseblocks	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_avail_eraseblocks =$/;"	v	typeref:struct:device_attribute	file:
dev_bad_peb_count	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_bad_peb_count =$/;"	v	typeref:struct:device_attribute	file:
dev_bgt_enabled	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_bgt_enabled =$/;"	v	typeref:struct:device_attribute	file:
dev_close_net	api/api_net.c	/^int dev_close_net(void *cookie)$/;"	f	typeref:typename:int
dev_close_stor	api/api_storage.c	/^int dev_close_stor(void *cookie)$/;"	f	typeref:typename:int
dev_cntl	include/usb/designware_udc.h	/^	u32 dev_cntl;$/;"	m	struct:udc_regs	typeref:typename:u32
dev_conf	include/usb/designware_udc.h	/^	u32 dev_conf;$/;"	m	struct:udc_regs	typeref:typename:u32
dev_context_ptrs	drivers/usb/host/xhci.h	/^	__le64			dev_context_ptrs[MAX_HC_SLOTS];$/;"	m	struct:xhci_device_context_array	typeref:typename:__le64[]
dev_count	drivers/pci/pci-emul-uclass.c	/^	int dev_count;$/;"	m	struct:sandbox_pci_priv	typeref:typename:int	file:
dev_ctrl	include/usb/fotg210.h	/^	uint32_t dev_ctrl;\/* 0x100: Device Control Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
dev_current	tools/env/fw_env.c	/^static int dev_current;$/;"	v	typeref:typename:int	file:
dev_dbg	include/linux/compat.h	/^#define dev_dbg(/;"	d
dev_desc	common/fb_mmc.c	/^	struct blk_desc	*dev_desc;$/;"	m	struct:fb_mmc_sparse	typeref:struct:blk_desc *	file:
dev_desc	include/ext4fs.h	/^	struct blk_desc *dev_desc;$/;"	m	struct:ext_filesystem	typeref:struct:blk_desc *
dev_desc	include/zfs_common.h	/^	struct blk_desc *dev_desc;$/;"	m	struct:zfs_filesystem	typeref:struct:blk_desc *
dev_ebc_en	include/linux/usb/xhci-omap.h	/^	u32 dev_ebc_en;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
dev_enum_net	api/api_net.c	/^int dev_enum_net(struct device_info *di)$/;"	f	typeref:typename:int
dev_enum_reset	api/api_storage.c	/^void dev_enum_reset(void)$/;"	f	typeref:typename:void
dev_enum_stor	api/api_storage.c	/^static int dev_enum_stor(int type, struct device_info *di)$/;"	f	typeref:typename:int	file:
dev_enum_storage	api/api_storage.c	/^int dev_enum_storage(struct device_info *di)$/;"	f	typeref:typename:int
dev_eraseblock_size	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_eraseblock_size =$/;"	v	typeref:struct:device_attribute	file:
dev_err	include/linux/compat.h	/^#define dev_err(/;"	d
dev_flags	disk/part_amiga.h	/^    u32 dev_flags;$/;"	m	struct:partition_block	typeref:typename:u32
dev_get_addr	drivers/core/device.c	/^fdt_addr_t dev_get_addr(struct udevice *dev)$/;"	f	typeref:typename:fdt_addr_t
dev_get_addr_index	drivers/core/device.c	/^fdt_addr_t dev_get_addr_index(struct udevice *dev, int index)$/;"	f	typeref:typename:fdt_addr_t
dev_get_addr_name	drivers/core/device.c	/^fdt_addr_t dev_get_addr_name(struct udevice *dev, const char *name)$/;"	f	typeref:typename:fdt_addr_t
dev_get_addr_ptr	drivers/core/device.c	/^void *dev_get_addr_ptr(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_get_driver_data	drivers/core/device.c	/^ulong dev_get_driver_data(struct udevice *dev)$/;"	f	typeref:typename:ulong
dev_get_driver_ops	drivers/core/device.c	/^const void *dev_get_driver_ops(struct udevice *dev)$/;"	f	typeref:typename:const void *
dev_get_parent	drivers/core/device.c	/^struct udevice *dev_get_parent(struct udevice *child)$/;"	f	typeref:struct:udevice *
dev_get_parent_platdata	drivers/core/device.c	/^void *dev_get_parent_platdata(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_get_parent_priv	drivers/core/device.c	/^void *dev_get_parent_priv(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_get_platdata	drivers/core/device.c	/^void *dev_get_platdata(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_get_priv	drivers/core/device.c	/^void *dev_get_priv(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_get_uclass_name	drivers/core/device.c	/^const char *dev_get_uclass_name(struct udevice *dev)$/;"	f	typeref:typename:const char *
dev_get_uclass_platdata	drivers/core/device.c	/^void *dev_get_uclass_platdata(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_get_uclass_priv	drivers/core/device.c	/^void *dev_get_uclass_priv(struct udevice *dev)$/;"	f	typeref:typename:void *
dev_head	include/dm/uclass.h	/^	struct list_head dev_head;$/;"	m	struct:uclass	typeref:struct:list_head
dev_id	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	const char *dev_id;$/;"	m	struct:clk_lookup	typeref:typename:const char *
dev_id	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	const char *dev_id;$/;"	m	struct:clk_lookup	typeref:typename:const char *
dev_id	arch/x86/cpu/intel_common/report_platform.c	/^	u16 dev_id;$/;"	m	struct:__anon8ec2af620108	typeref:typename:u16	file:
dev_id	disk/part_mac.h	/^	__u16	dev_id;		\/* device id				*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u16
dev_id	drivers/mtd/jedec_flash.c	/^	const __u16 dev_id;$/;"	m	struct:amd_flash_info	typeref:typename:const __u16	file:
dev_id	drivers/net/fec_mxc.h	/^	int dev_id;$/;"	m	struct:fec_priv	typeref:typename:int
dev_id	include/dwmmc.h	/^	int dev_id;$/;"	m	struct:dwmci_host	typeref:typename:int
dev_id	include/linux/mtd/nand.h	/^			uint8_t dev_id;$/;"	m	struct:nand_flash_dev::__anon4f3885c2020a::__anon4f3885c20308	typeref:typename:uint8_t
dev_index	common/usb.c	/^static int dev_index;$/;"	v	typeref:typename:int	file:
dev_index	include/dwmmc.h	/^	int dev_index;$/;"	m	struct:dwmci_host	typeref:typename:int
dev_index	lib/efi_loader/efi_disk.c	/^	int dev_index;$/;"	m	struct:efi_disk_obj	typeref:typename:int	file:
dev_info	drivers/usb/host/xhci.h	/^	__le32	dev_info;$/;"	m	struct:xhci_slot_ctx	typeref:typename:__le32
dev_info	include/linux/compat.h	/^#define dev_info(/;"	d
dev_info2	drivers/usb/host/xhci.h	/^	__le32	dev_info2;$/;"	m	struct:xhci_slot_ctx	typeref:typename:__le32
dev_int	include/usb/designware_udc.h	/^	u32 dev_int;$/;"	m	struct:udc_regs	typeref:typename:u32
dev_int_mask	include/usb/designware_udc.h	/^	u32 dev_int_mask;$/;"	m	struct:udc_regs	typeref:typename:u32
dev_is_stor	api/api_storage.c	/^static int dev_is_stor(int type, struct device_info *di)$/;"	f	typeref:typename:int	file:
dev_iterator	fs/yaffs2/yaffsfs.c	/^static struct list_head *dev_iterator;$/;"	v	typeref:struct:list_head *	file:
dev_list	fs/yaffs2/yaffs_guts.h	/^	struct list_head dev_list;$/;"	m	struct:yaffs_dev	typeref:struct:list_head
dev_map_physmem	drivers/core/device.c	/^void *dev_map_physmem(struct udevice *dev, unsigned long size)$/;"	f	typeref:typename:void *
dev_mask	drivers/block/pata_bfin.h	/^	unsigned char dev_mask;$/;"	m	struct:ata_port	typeref:typename:unsigned char
dev_mask	drivers/block/sata_sil3114.h	/^	unsigned char dev_mask;$/;"	m	struct:sata_port	typeref:typename:unsigned char
dev_max_ec	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_max_ec =$/;"	v	typeref:struct:device_attribute	file:
dev_max_vol_count	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_max_vol_count =$/;"	v	typeref:struct:device_attribute	file:
dev_min_io_size	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_min_io_size =$/;"	v	typeref:struct:device_attribute	file:
dev_mtd_num	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_mtd_num =$/;"	v	typeref:struct:device_attribute	file:
dev_name	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	char dev_name[32];$/;"	m	struct:smmu_stream_id	typeref:typename:char[32]
dev_name	arch/x86/cpu/intel_common/report_platform.c	/^	const char *dev_name;$/;"	m	struct:__anon8ec2af620108	typeref:typename:const char *	file:
dev_name	drivers/mtd/nand/nand.c	/^static char dev_name[CONFIG_SYS_MAX_NAND_DEVICE][8];$/;"	v	typeref:typename:char[][8]	file:
dev_name	drivers/mtd/onenand/onenand_uboot.c	/^static __attribute__((unused)) char dev_name[] = "onenand0";$/;"	v	typeref:typename:char[]	file:
dev_net_valid	examples/api/glue.c	/^static int dev_net_valid(int handle)$/;"	f	typeref:typename:int	file:
dev_num	drivers/net/smc91111.h	/^	u8 dev_num;$/;"	m	struct:smc91111_priv	typeref:typename:u8
dev_num	include/dfu.h	/^	int dev_num;$/;"	m	struct:mmc_internal_data	typeref:typename:int
dev_open_net	api/api_net.c	/^int dev_open_net(void *cookie)$/;"	f	typeref:typename:int
dev_open_stor	api/api_storage.c	/^int dev_open_stor(void *cookie)$/;"	f	typeref:typename:int
dev_page_size	include/linux/mtd/samsung_onenand.h	/^	unsigned int	dev_page_size;	\/* 0x0340 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
dev_part	include/fpga.h	/^	char *dev_part;$/;"	m	struct:__anon4d3ae96c0308	typeref:typename:char *
dev_partition	arch/sparc/include/asm/prom.h	/^	int dev_partition;$/;"	m	struct:linux_arguments_v0	typeref:typename:int
dev_print	disk/part.c	/^void dev_print (struct blk_desc *dev_desc)$/;"	f	typeref:typename:void
dev_print	include/part.h	/^static inline void dev_print(struct blk_desc *dev_desc) {}$/;"	f	typeref:typename:void
dev_private	include/dfu.h	/^	void                    *dev_private;$/;"	m	struct:dfu_entity	typeref:typename:void *
dev_ptr	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long dev_ptr;	\/* if 0 no tds have been assigned to this qh *\/$/;"	m	struct:__anon66fd0d690208	typeref:typename:unsigned long
dev_ptr	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long dev_ptr;	\/* pointer to the assigned device (BE) *\/$/;"	m	struct:__anon66fd0d690108	typeref:typename:unsigned long
dev_ptr	board/mpl/common/usb_uhci.h	/^	unsigned long dev_ptr;    \/* if 0 no tds have been assigned to this qh *\/$/;"	m	struct:__anon0a2b4c740208	typeref:typename:unsigned long
dev_ptr	board/mpl/common/usb_uhci.h	/^	unsigned long dev_ptr;  \/* pointer to the assigned device (BE) *\/$/;"	m	struct:__anon0a2b4c740108	typeref:typename:unsigned long
dev_qualifier	drivers/usb/gadget/ether.c	/^dev_qualifier = {$/;"	v	typeref:struct:usb_qualifier_descriptor	file:
dev_read_net	api/api_net.c	/^int dev_read_net(void *cookie, void *buf, int len)$/;"	f	typeref:typename:int
dev_read_stor	api/api_storage.c	/^lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)$/;"	f	typeref:typename:lbasize_t
dev_ready	drivers/mtd/nand/pxa3xx_nand.c	/^	int			cmd_complete, dev_ready;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
dev_ready	include/linux/mtd/fsl_upm.h	/^	int (*dev_ready)(int chip_nr);$/;"	m	struct:fsl_upm_nand	typeref:typename:int (*)(int chip_nr)
dev_ready	include/linux/mtd/nand.h	/^	int (*dev_ready)(struct mtd_info *mtd);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd)
dev_ready	include/linux/mtd/nand.h	/^	int (*dev_ready)(struct mtd_info *mtd);$/;"	m	struct:platform_nand_ctrl	typeref:typename:int (*)(struct mtd_info * mtd)
dev_release	drivers/mtd/ubi/build.c	/^static void dev_release(struct device *dev)$/;"	f	typeref:typename:void	file:
dev_reserved_for_bad	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_reserved_for_bad =$/;"	v	typeref:struct:device_attribute	file:
dev_set_drvdata	include/linux/compat.h	/^#define dev_set_drvdata(/;"	d
dev_set_name	include/linux/compat.h	/^#define dev_set_name(/;"	d
dev_size	include/mtd/cfi_flash.h	/^	u8	dev_size;$/;"	m	struct:cfi_qry	typeref:typename:u8
dev_speeds	board/ti/ks2_evm/board_k2g.c	/^static int dev_speeds[DEVSPEED_NUMSPDS] = {$/;"	v	typeref:typename:int[]	file:
dev_stat	include/usb/designware_udc.h	/^	u32 dev_stat;$/;"	m	struct:udc_regs	typeref:typename:u32
dev_state	drivers/block/sata_dwc.c	/^enum sata_dev_state dev_state = SATA_INIT;$/;"	v	typeref:enum:sata_dev_state
dev_state	drivers/usb/host/xhci.h	/^	__le32	dev_state;$/;"	m	struct:xhci_slot_ctx	typeref:typename:__le32
dev_stor_get	api/api_storage.c	/^static int dev_stor_get(int type, int first, int *more, struct device_info *di)$/;"	f	typeref:typename:int	file:
dev_stor_init	api/api_storage.c	/^void dev_stor_init(void)$/;"	f	typeref:typename:void
dev_stor_is_valid	api/api_storage.c	/^static int dev_stor_is_valid(int type, struct blk_desc *dd)$/;"	f	typeref:typename:int	file:
dev_stor_type	api/api_storage.c	/^static int dev_stor_type(struct blk_desc *dd)$/;"	f	typeref:typename:int	file:
dev_stor_valid	examples/api/glue.c	/^static int dev_stor_valid(int handle)$/;"	f	typeref:typename:int	file:
dev_stream_id	arch/arm/cpu/armv7/ls102xa/soc.c	/^struct smmu_stream_id dev_stream_id[] = {$/;"	v	typeref:struct:smmu_stream_id[]
dev_t	include/linux/types.h	/^typedef __kernel_dev_t		dev_t;$/;"	t	typeref:typename:__kernel_dev_t
dev_test	include/usb/fotg210.h	/^	uint32_t dev_test;\/* 0x108: Device Test Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
dev_to_musb	drivers/usb/musb-new/musb_core.c	/^static inline struct musb *dev_to_musb(struct device *dev)$/;"	f	typeref:struct:musb *	file:
dev_to_usb_gadget	include/linux/usb/gadget.h	/^static inline struct usb_gadget *dev_to_usb_gadget(struct device *dev)$/;"	f	typeref:struct:usb_gadget *
dev_total_eraseblocks	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_total_eraseblocks =$/;"	v	typeref:struct:device_attribute	file:
dev_type	disk/part_mac.h	/^	__u16	dev_type;	\/* device type				*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u16
dev_type	include/dfu.h	/^	enum dfu_device_type    dev_type;$/;"	m	struct:dfu_entity	typeref:enum:dfu_device_type
dev_types	arch/arm/cpu/armv7/am33xx/sys_info.c	/^static char *dev_types[] = {$/;"	v	typeref:typename:char * []	file:
dev_valid	examples/api/glue.c	/^static int dev_valid(int handle)$/;"	f	typeref:typename:int	file:
dev_valid_net	api/api_net.c	/^static int dev_valid_net(void *cookie)$/;"	f	typeref:typename:int	file:
dev_vdbg	include/linux/compat.h	/^#define dev_vdbg(/;"	d
dev_volumes_count	drivers/mtd/ubi/build.c	/^static struct device_attribute dev_volumes_count =$/;"	v	typeref:struct:device_attribute	file:
dev_warn	include/linux/compat.h	/^#define dev_warn(/;"	d
dev_write_net	api/api_net.c	/^int dev_write_net(void *cookie, void *buf, int len)$/;"	f	typeref:typename:int
devad	drivers/net/phy/micrel.c	/^	const u16			devad;$/;"	m	struct:ksz90x1_ofcfg	typeref:typename:const u16	file:
devaddr	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 devaddr;	\/* 0x30 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
devaddr	arch/arm/include/asm/arch/rsb.h	/^	u32 devaddr;	\/* 0x30 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
devaddr	drivers/usb/gadget/ci_udc.h	/^	u32 devaddr;		\/* 0x144 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
devaddr	drivers/usb/gadget/ci_udc.h	/^	u32 devaddr;		\/* 0x154 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
devbusfn	drivers/pcmcia/ti_pci1410a.c	/^static pci_dev_t devbusfn;$/;"	v	typeref:typename:pci_dev_t	file:
devcfg	arch/arm/dts/zynq-7000.dtsi	/^		devcfg: devcfg@f8007000 {$/;"	l	label:amba
devcfg	include/xilinx.h	/^	devcfg,			\/* devcfg interface (zynq) *\/$/;"	e	enum:__anon15c234ca0103
devcfg0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t devcfg0;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
devcfg1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t devcfg1;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
devcfg2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t devcfg2;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
devcfg3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t devcfg3;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
devcfg_base	arch/arm/mach-zynq/include/mach/hardware.h	/^#define devcfg_base /;"	d
devcfg_regs	arch/arm/mach-zynq/include/mach/hardware.h	/^struct devcfg_regs {$/;"	s
devconf0	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned int devconf0;		\/* 0x274 *\/$/;"	m	struct:t2	typeref:typename:unsigned int
devconf1	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned int devconf1;		\/* 0x2D8 *\/$/;"	m	struct:t2	typeref:typename:unsigned int
devconf2	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 devconf2;		\/* 0x310 *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32
devconf3	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 devconf3;		\/* 0x314 *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32
devctl	drivers/usb/musb-new/musb_core.h	/^	u8 devctl, busctl, misc;$/;"	m	struct:musb_context_registers	typeref:typename:u8
devctl	drivers/usb/musb/musb_core.h	/^	u8	devctl;$/;"	m	struct:musb_regs	typeref:typename:u8
devctrl	arch/arm/dts/keystone.dtsi	/^		devctrl: device-state-control@02620000 {$/;"	l
devdesc	include/fpga.h	/^	void *devdesc;		\/* real device descriptor *\/$/;"	m	struct:__anon4d3ae96c0208	typeref:typename:void *
devdis_table	include/fsl_devdis.h	/^struct devdis_table {$/;"	s
devdis_tbl	arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h	/^const struct devdis_table devdis_tbl[] = {$/;"	v	typeref:typename:const struct devdis_table[]
devdisr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr;        \/* Device disable control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr;	\/* Device disable control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     devdisr;        \/* Device disable control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	devdisr;	\/* Device disable control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	devdisr;	\/* 0xe0070 - Device disable control *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
devdisr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr2;       \/* Device disable control 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr2;	\/* Device disable control 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     devdisr2;       \/* Device disable control 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	devdisr2;	\/* Device disable control 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr3;       \/* Device disable control 3 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr3;	\/* Device disable control 3 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     devdisr3;       \/* Device disable control 3 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	devdisr3;	\/* Device disable control 3 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr4;       \/* Device disable control 4 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr4;	\/* Device disable control 4 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     devdisr4;       \/* Device disable control 4 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	devdisr4;	\/* Device disable control 4 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr5;       \/* Device disable control 5 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr5;	\/* Device disable control 5 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr5	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     devdisr5;       \/* Device disable control 5 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	devdisr5;	\/* Device disable control 5 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr6	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr6;       \/* Device disable control 6 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr6	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr6;	\/* Device disable control 6 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     devdisr7;       \/* Device disable control 7 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	devdisr7;	\/* Device disable control 7 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
devdisr_mask	drivers/pci/fsl_pci_init.c	/^static u32 devdisr_mask[] = {$/;"	v	typeref:typename:u32[]	file:
developer	doc/README.x86	/^developer mode on the Chromebook (use Ctrl-Alt-F2 to obtain a terminal and$/;"	l
devfn	arch/x86/include/asm/pirq_routing.h	/^	u8 devfn;		\/* Device and function number *\/$/;"	m	struct:irq_info	typeref:typename:u8
devfn	board/gateworks/gw_ventana/gw_ventana.c	/^	pci_dev_t devfn;$/;"	m	struct:pci_dev	typeref:typename:pci_dev_t	file:
devfn	include/pci.h	/^	int devfn;$/;"	m	struct:pci_child_platdata	typeref:typename:int
devgone	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^struct usb_device *devgone;$/;"	v	typeref:struct:usb_device *
devgone	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^struct usb_device *devgone;$/;"	v	typeref:struct:usb_device *
devgone	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^struct usb_device *devgone;$/;"	v	typeref:struct:usb_device *
devgone	drivers/usb/host/isp116x-hcd.c	/^struct usb_device *devgone;	\/* device which was disconnected *\/$/;"	v	typeref:struct:usb_device *
devgone	drivers/usb/host/ohci-s3c24xx.c	/^struct usb_device *devgone;$/;"	v	typeref:struct:usb_device *
devi_veni_2	include/tsi148.h	/^	unsigned int devi_veni_2;             \/* 0x600         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
deviation	board/astro/mcf5373l/astro.h	/^	unsigned char deviation;$/;"	m	struct:__anona9f590f60108	typeref:typename:unsigned char
device	arch/arm/include/asm/arch-tegra/usb.h	/^	uint device;$/;"	m	struct:usb_ctlr	typeref:typename:uint
device	arch/sandbox/include/asm/eth-raw-os.h	/^	void *device;$/;"	m	struct:eth_sandbox_raw_priv	typeref:typename:void *
device	arch/x86/cpu/cpu.c	/^	unsigned device;$/;"	m	struct:cpu_device_id	typeref:typename:unsigned	file:
device	board/gateworks/gw_ventana/gw_ventana.c	/^	unsigned short device;$/;"	m	struct:pci_dev	typeref:typename:unsigned short	file:
device	drivers/block/sata_dwc.h	/^	struct ata_device	device[2];$/;"	m	struct:ata_link	typeref:struct:ata_device[2]
device	drivers/usb/host/ehci-hcd.c	/^	struct usb_device_descriptor device;$/;"	m	struct:descriptor	typeref:struct:usb_device_descriptor	file:
device	drivers/usb/host/xhci.c	/^	struct usb_device_descriptor device;$/;"	m	struct:descriptor	typeref:struct:usb_device_descriptor	file:
device	include/ambapp.h	/^	unsigned int device;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:unsigned int
device	include/ambapp.h	/^	unsigned int device;$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned int
device	include/bios_emul.h	/^	int device;$/;"	m	struct:__anoneb05efed0108	typeref:typename:int
device	include/fis.h	/^	u8 device;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
device	include/fis.h	/^	u8 device;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
device	include/fis.h	/^	u8 device;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
device	include/libata.h	/^	u8			device;$/;"	m	struct:ata_taskfile	typeref:typename:u8
device	include/linux/compat.h	/^struct device {$/;"	s
device	include/linux/edd.h	/^			__u8 device;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0908	typeref:typename:__u8
device	include/linux/edd.h	/^			__u8 device;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08	typeref:typename:__u8
device	include/linux/edd.h	/^			__u8 device;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1108	typeref:typename:__u8
device	include/linux/edd.h	/^	__u8 device;$/;"	m	struct:edd_info	typeref:typename:__u8
device	include/pci.h	/^	unsigned int vendor, device;		\/* Vendor and device ID or PCI_ANY_ID *\/$/;"	m	struct:pci_config_table	typeref:typename:unsigned int
device	include/pci.h	/^	unsigned int vendor, device;	\/* Vendor and device ID or PCI_ANY_ID *\/$/;"	m	struct:pci_device_id	typeref:typename:unsigned int
device	include/pci.h	/^	unsigned short device;$/;"	m	struct:pci_child_platdata	typeref:typename:unsigned short
device	include/pci_rom.h	/^	uint16_t device;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
device	include/usbdescriptors.h	/^		struct usb_device_descriptor device;$/;"	m	union:usb_descriptor::__anon028dca6a010a	typeref:struct:usb_device_descriptor
device	include/usbdevice.h	/^	struct usb_device_instance *device;$/;"	m	struct:urb	typeref:struct:usb_device_instance *
device	include/usbdevice.h	/^	struct usb_device_instance *device;$/;"	m	struct:usb_bus_instance	typeref:struct:usb_device_instance *
device	include/zfs_common.h	/^	device_t device;$/;"	m	struct:zfs_file	typeref:typename:device_t
device_active	include/dm/device.h	/^#define device_active(/;"	d
device_add	cmd/mtdparts.c	/^static void device_add(struct mtd_device *dev)$/;"	f	typeref:typename:void	file:
device_addr	drivers/block/pata_bfin.h	/^	unsigned long device_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
device_addr	drivers/block/sata_dwc.h	/^	void __iomem		*device_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
device_addr	drivers/block/sata_sil3114.h	/^	unsigned long device_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
device_address	include/gdsys_fpga.h	/^	u16 device_address;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
device_attribute	drivers/usb/gadget/storage_common.c	/^struct device_attribute { int i; };$/;"	s	file:
device_bind	drivers/core/device.c	/^int device_bind(struct udevice *parent, const struct driver *drv,$/;"	f	typeref:typename:int
device_bind_by_name	drivers/core/device.c	/^int device_bind_by_name(struct udevice *parent, bool pre_reloc_only,$/;"	f	typeref:typename:int
device_bind_common	drivers/core/device.c	/^static int device_bind_common(struct udevice *parent, const struct driver *drv,$/;"	f	typeref:typename:int	file:
device_bind_driver	drivers/core/lists.c	/^int device_bind_driver(struct udevice *parent, const char *drv_name,$/;"	f	typeref:typename:int
device_bind_driver_to_node	drivers/core/lists.c	/^int device_bind_driver_to_node(struct udevice *parent, const char *drv_name,$/;"	f	typeref:typename:int
device_bind_with_driver_data	drivers/core/device.c	/^int device_bind_with_driver_data(struct udevice *parent,$/;"	f	typeref:typename:int
device_chld_remove	drivers/core/device-remove.c	/^static int device_chld_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
device_chld_unbind	drivers/core/device-remove.c	/^static int device_chld_unbind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
device_cl	board/gdsys/p1022/controlcenterd-id.c	/^static uint64_t device_cl;$/;"	v	typeref:typename:uint64_t	file:
device_data	include/linux/compat.h	/^	void            *device_data;   \/* data private to the device *\/$/;"	m	struct:device	typeref:typename:void *
device_del	cmd/mtdparts.c	/^static int device_del(struct mtd_device *dev)$/;"	f	typeref:typename:int	file:
device_delall	cmd/mtdparts.c	/^static int device_delall(struct list_head *head)$/;"	f	typeref:typename:int	file:
device_desc	drivers/usb/gadget/ether.c	/^device_desc = {$/;"	v	typeref:struct:usb_device_descriptor	file:
device_desc	drivers/usb/gadget/g_dnl.c	/^static struct usb_device_descriptor device_desc = {$/;"	v	typeref:struct:usb_device_descriptor	file:
device_descriptor	drivers/serial/usbtty.c	/^static struct usb_device_descriptor device_descriptor = {$/;"	v	typeref:struct:usb_device_descriptor	file:
device_descriptor	include/usbdevice.h	/^	struct usb_device_descriptor *device_descriptor;	\/* per device descriptor *\/$/;"	m	struct:usb_device_instance	typeref:struct:usb_device_descriptor *
device_disable	drivers/misc/fsl_devdis.c	/^void device_disable(const struct devdis_table *tbl, uint32_t num)$/;"	f	typeref:typename:void
device_event	drivers/usb/dwc3/core.h	/^	u32	device_event:7;$/;"	m	struct:dwc3_event_devt	typeref:typename:u32:7
device_event	drivers/usb/dwc3/core.h	/^	u32	device_event:7;$/;"	m	struct:dwc3_event_gevt	typeref:typename:u32:7
device_find	cmd/mtdparts.c	/^struct mtd_device *device_find(u8 type, u8 num)$/;"	f	typeref:struct:mtd_device *
device_find_child_by_of_offset	drivers/core/device.c	/^int device_find_child_by_of_offset(struct udevice *parent, int of_offset,$/;"	f	typeref:typename:int
device_find_child_by_seq	drivers/core/device.c	/^int device_find_child_by_seq(struct udevice *parent, int seq_or_req_seq,$/;"	f	typeref:typename:int
device_find_first_child	drivers/core/device.c	/^int device_find_first_child(struct udevice *parent, struct udevice **devp)$/;"	f	typeref:typename:int
device_find_next_child	drivers/core/device.c	/^int device_find_next_child(struct udevice **devp)$/;"	f	typeref:typename:int
device_foreach_child_safe	include/dm/device.h	/^#define device_foreach_child_safe(/;"	d
device_free	drivers/core/device-remove.c	/^void device_free(struct udevice *dev)$/;"	f	typeref:typename:void
device_free	include/dm/device-internal.h	/^static inline void device_free(struct udevice *dev) {}$/;"	f	typeref:typename:void
device_get_child	drivers/core/device.c	/^int device_get_child(struct udevice *parent, int index, struct udevice **devp)$/;"	f	typeref:typename:int
device_get_child_by_of_offset	drivers/core/device.c	/^int device_get_child_by_of_offset(struct udevice *parent, int node,$/;"	f	typeref:typename:int
device_get_child_by_seq	drivers/core/device.c	/^int device_get_child_by_seq(struct udevice *parent, int seq,$/;"	f	typeref:typename:int
device_get_device_tail	drivers/core/device.c	/^static int device_get_device_tail(struct udevice *dev, int ret,$/;"	f	typeref:typename:int	file:
device_get_global_by_of_offset	drivers/core/device.c	/^int device_get_global_by_of_offset(int of_offset, struct udevice **devp)$/;"	f	typeref:typename:int
device_get_ops	include/dm/device.h	/^#define device_get_ops(/;"	d
device_get_supply_regulator	drivers/power/regulator/regulator-uclass.c	/^int device_get_supply_regulator(struct udevice *dev, const char *supply_name,$/;"	f	typeref:typename:int
device_get_uclass_id	drivers/core/device.c	/^enum uclass_id device_get_uclass_id(struct udevice *dev)$/;"	f	typeref:enum:uclass_id
device_handle	include/efi_api.h	/^	void *device_handle;$/;"	m	struct:efi_loaded_image	typeref:typename:void *
device_has_active_children	drivers/core/device.c	/^bool device_has_active_children(struct udevice *dev)$/;"	f	typeref:typename:bool
device_has_children	drivers/core/device.c	/^bool device_has_children(struct udevice *dev)$/;"	f	typeref:typename:bool
device_id	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 device_id;$/;"	m	struct:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a::__anon775fc5440c08	typeref:typename:u32
device_id	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 device_id;$/;"	m	struct:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a::__anon775fc5440d08	typeref:typename:u32
device_id	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 device_id;$/;"	m	struct:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a::__anon775fc5440f08	typeref:typename:u32
device_id	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 device_id;$/;"	m	struct:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a::__anon775fc5441008	typeref:typename:u32
device_id	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	device_id;	\/* 0x28 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
device_id	arch/x86/include/asm/me_common.h	/^	u16 device_id;$/;"	m	struct:mbp_rom_bist_data	typeref:typename:u16
device_id	board/gdsys/p1022/controlcenterd-id.c	/^static uint64_t device_id;$/;"	v	typeref:typename:uint64_t	file:
device_id	cmd/ambapp.c	/^	int device_id;$/;"	m	struct:__anon3d6428ea0108	typeref:typename:int	file:
device_id	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	u32 device_id;$/;"	m	struct:ddr3_device_info	typeref:typename:u32
device_id	drivers/mtd/st_smi.c	/^	u32 device_id;$/;"	m	struct:flash_device	typeref:typename:u32	file:
device_id	drivers/net/e1000.h	/^	uint16_t device_id;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
device_id	drivers/video/ct69000.c	/^	int device_id;		\/* PCI Device ID *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
device_id	include/cpu.h	/^	ulong device_id;$/;"	m	struct:cpu_platdata	typeref:typename:ulong
device_id	include/flash.h	/^	ushort	device_id;		\/* device id				*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
device_id	include/linux/mtd/onenand.h	/^	unsigned int device_id;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
device_id	include/linux/mtd/samsung_onenand.h	/^	unsigned int	device_id;	\/* 0x0080 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
device_id2	include/flash.h	/^	ushort	device_id2;		\/* extended device id			*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
device_info	include/api_public.h	/^struct device_info {$/;"	s
device_init_wakeup	drivers/usb/musb-new/linux-compat.h	/^#define device_init_wakeup(/;"	d
device_instance	drivers/serial/usbtty.c	/^static struct usb_device_instance device_instance[1];$/;"	v	typeref:struct:usb_device_instance[1]	file:
device_is_last_sibling	drivers/core/device.c	/^bool device_is_last_sibling(struct udevice *dev)$/;"	f	typeref:typename:bool
device_is_on_pci_bus	include/dm/device.h	/^static inline bool device_is_on_pci_bus(struct udevice *dev)$/;"	f	typeref:typename:bool
device_mutex	drivers/mtd/ubi/ubi.h	/^	struct mutex device_mutex;$/;"	m	struct:ubi_device	typeref:struct:mutex
device_name	drivers/mtd/spi/sandbox.c	/^	const char *device_name;$/;"	m	struct:sandbox_spi_flash_plat_data	typeref:typename:const char *	file:
device_parse	cmd/mtdparts.c	/^static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_device **retdev)$/;"	f	typeref:typename:int	file:
device_path	include/efi.h	/^	struct efi_device_path *device_path;$/;"	m	struct:efi_priv	typeref:struct:efi_device_path *
device_path	include/linux/edd.h	/^	} device_path;$/;"	m	struct:edd_device_params	typeref:union:edd_device_params::__anon8a8b619a080a
device_path_info_length	include/linux/edd.h	/^	__u8 device_path_info_length;	\/* = 44 *\/$/;"	m	struct:edd_device_params	typeref:typename:__u8
device_previous_state	include/usbdevice.h	/^	usb_device_state_t device_previous_state;	\/* current USB Device state *\/$/;"	m	struct:usb_device_instance	typeref:typename:usb_device_state_t
device_probe	drivers/core/device.c	/^int device_probe(struct udevice *dev)$/;"	f	typeref:typename:int
device_qual	drivers/usb/gadget/composite.c	/^static void device_qual(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:void	file:
device_register	include/linux/compat.h	/^#define device_register(/;"	d
device_remove	drivers/core/device-remove.c	/^int device_remove(struct udevice *dev)$/;"	f	typeref:typename:int
device_remove	include/dm/device-internal.h	/^static inline int device_remove(struct udevice *dev) { return 0; }$/;"	f	typeref:typename:int
device_request	include/usbdevice.h	/^	struct usb_device_request device_request;	\/* contents of received SETUP packet *\/$/;"	m	struct:urb	typeref:struct:usb_device_request
device_s	include/zfs_common.h	/^struct device_s {$/;"	s
device_set_name	drivers/core/device.c	/^int device_set_name(struct udevice *dev, const char *name)$/;"	f	typeref:typename:int
device_set_name_alloced	drivers/core/device.c	/^void device_set_name_alloced(struct udevice *dev)$/;"	f	typeref:typename:void
device_state	include/usbdevice.h	/^	usb_device_state_t device_state;	\/* current USB Device state *\/$/;"	m	struct:usb_device_instance	typeref:typename:usb_device_state_t
device_t	include/zfs_common.h	/^typedef struct device_s *device_t;$/;"	t	typeref:struct:device_s *
device_type	board/gdsys/p1022/controlcenterd-id.c	/^static uint64_t device_type;$/;"	v	typeref:typename:uint64_t	file:
device_type	include/ddr_spd.h	/^	unsigned char device_type;     \/* 33 SDRAM device type *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
device_unbind	drivers/core/device-remove.c	/^int device_unbind(struct udevice *dev)$/;"	f	typeref:typename:int
device_unbind	include/dm/device-internal.h	/^static inline int device_unbind(struct udevice *dev) { return 0; }$/;"	f	typeref:typename:int
device_unregister	include/linux/compat.h	/^#define device_unregister(/;"	d
device_vendor	board/gumstix/pepper/board.h	/^	unsigned int device_vendor;$/;"	m	struct:pepper_board_id	typeref:typename:unsigned int
device_vendor	board/overo/overo.c	/^	unsigned int device_vendor;$/;"	m	struct:__anona18b42d20108	typeref:typename:unsigned int	file:
device_vendor	board/ti/beagle/beagle.c	/^	unsigned int device_vendor;$/;"	m	struct:__anon1bf8eac80108	typeref:typename:unsigned int	file:
device_wait_reset	drivers/net/dm9000x.c	/^	u8 device_wait_reset;	\/* device state *\/$/;"	m	struct:board_info	typeref:typename:u8	file:
device_width	include/fsl_ddr_dimm_params.h	/^	unsigned int device_width;	\/* x4, x8, x16 components *\/$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
devicecfg	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t devicecfg;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
deviceid	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int deviceid;		\/* offset 0x00 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
devices	cmd/ambapp.c	/^	ambapp_device_name *devices;$/;"	m	struct:__anon3d6428ea0208	typeref:typename:ambapp_device_name *	file:
devices	cmd/mtdparts.c	/^static struct list_head devices;$/;"	v	typeref:struct:list_head	file:
devices	examples/api/glue.c	/^static struct device_info devices[UB_MAX_DEV];$/;"	v	typeref:struct:device_info[]	file:
devkit8000_serial	board/timll/devkit8000/devkit8000.c	/^static const struct ns16550_platdata devkit8000_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
devlist	drivers/net/fm/eth.c	/^static struct eth_device *devlist[NUM_FM_PORTS];$/;"	v	typeref:struct:eth_device * []	file:
devlist	drivers/qe/uec.c	/^static struct eth_device *devlist[MAXCONTROLLERS];$/;"	v	typeref:struct:eth_device * []	file:
devm_ioremap	include/linux/io.h	/^#define devm_ioremap(/;"	d
devm_kcalloc	include/dm/device.h	/^static inline void *devm_kcalloc(struct udevice *dev,$/;"	f	typeref:typename:void *
devm_kfree	drivers/core/devres.c	/^void devm_kfree(struct udevice *dev, void *p)$/;"	f	typeref:typename:void
devm_kfree	include/dm/device.h	/^static inline void devm_kfree(struct udevice *dev, void *ptr)$/;"	f	typeref:typename:void
devm_kmalloc	drivers/core/devres.c	/^void *devm_kmalloc(struct udevice *dev, size_t size, gfp_t gfp)$/;"	f	typeref:typename:void *
devm_kmalloc	include/dm/device.h	/^static inline void *devm_kmalloc(struct udevice *dev, size_t size, gfp_t gfp)$/;"	f	typeref:typename:void *
devm_kmalloc_array	include/dm/device.h	/^static inline void *devm_kmalloc_array(struct udevice *dev,$/;"	f	typeref:typename:void *
devm_kmalloc_match	drivers/core/devres.c	/^static int devm_kmalloc_match(struct udevice *dev, void *res, void *data)$/;"	f	typeref:typename:int	file:
devm_kmalloc_release	drivers/core/devres.c	/^static void devm_kmalloc_release(struct udevice *dev, void *res)$/;"	f	typeref:typename:void	file:
devm_kmaloc_array	include/dm/device.h	/^static inline void *devm_kmaloc_array(struct udevice *dev,$/;"	f	typeref:typename:void *
devm_kzalloc	drivers/usb/dwc3/linux-compat.h	/^static inline void *devm_kzalloc(struct device *dev, unsigned int size,$/;"	f	typeref:typename:void *
devm_kzalloc	include/dm/device.h	/^static inline void *devm_kzalloc(struct udevice *dev, size_t size, gfp_t gfp)$/;"	f	typeref:typename:void *
devm_release_mem_region	include/linux/ioport.h	/^#define devm_release_mem_region(/;"	d
devm_release_region	include/linux/ioport.h	/^#define devm_release_region(/;"	d
devm_request_mem_region	include/linux/ioport.h	/^#define devm_request_mem_region(/;"	d
devm_request_region	include/linux/ioport.h	/^#define devm_request_region(/;"	d
devname	drivers/net/xilinx_ll_temac.c	/^	char			*devname;$/;"	m	struct:ll_temac_info	typeref:typename:char *	file:
devname	include/tsec.h	/^	char *devname;$/;"	m	struct:tsec_info_struct	typeref:typename:char *
devname	tools/env/fw_env.c	/^	const char *devname;		\/* Device name *\/$/;"	m	struct:envdev_s	typeref:typename:const char *	file:
devno	drivers/block/sata_dwc.h	/^	unsigned int		devno;$/;"	m	struct:ata_device	typeref:typename:unsigned int
devno	drivers/block/sata_sil.h	/^	pci_dev_t devno;$/;"	m	struct:sata_info	typeref:typename:pci_dev_t
devno	drivers/block/sata_sil.h	/^	pci_dev_t devno;$/;"	m	struct:sil_sata	typeref:typename:pci_dev_t
devnum	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int devnum; \/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int devnum; \/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int devnum;		\/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint16_t		devnum;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint16_t
devnum	arch/sparc/cpu/leon3/usb_uhci.h	/^	int devnum;		\/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	board/mpl/common/usb_uhci.h	/^	int devnum;		            \/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	drivers/block/blkcache.c	/^	int devnum;$/;"	m	struct:block_cache_node	typeref:typename:int	file:
devnum	drivers/mtd/nand/denali.h	/^	uint32_t devnum;	\/* represent how many nands connected *\/$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
devnum	drivers/net/4xx_enet.c	/^	unsigned int devnum;	\/* ethernet port *\/$/;"	m	struct:fixed_phy_port	typeref:typename:unsigned int	file:
devnum	drivers/usb/host/ohci-s3c24xx.h	/^	int devnum;		\/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	drivers/usb/host/ohci.h	/^	int devnum; \/* Address of Root Hub endpoint *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
devnum	drivers/usb/host/ohci.h	/^	int devnum;$/;"	m	struct:ohci_device	typeref:typename:int
devnum	include/blk.h	/^	int		devnum;		\/* device number *\/$/;"	m	struct:blk_desc	typeref:typename:int
devnum	include/usb.h	/^	int	devnum;			\/* Device number on USB bus *\/$/;"	m	struct:usb_device	typeref:typename:int
devnum	include/usb.h	/^	int devnum;$/;"	m	struct:usb_dev_platdata	typeref:typename:int
devoff	tools/env/fw_env.c	/^	long long devoff;		\/* Device offset *\/$/;"	m	struct:envdev_s	typeref:typename:long long	file:
devpart	include/splash.h	/^	char *devpart;  \/* Use the load command dev:part conventions *\/$/;"	m	struct:splash_location	typeref:typename:char *
devrequest	include/usb.h	/^struct devrequest {$/;"	s
devres	drivers/core/devres.c	/^struct devres {$/;"	s	file:
devres_add	drivers/core/devres.c	/^void devres_add(struct udevice *dev, void *res)$/;"	f	typeref:typename:void
devres_add	include/dm/device.h	/^static inline void devres_add(struct udevice *dev, void *res)$/;"	f	typeref:typename:void
devres_alloc	include/dm/device.h	/^#define devres_alloc(/;"	d
devres_alloc	include/dm/device.h	/^static inline void *devres_alloc(dr_release_t release, size_t size, gfp_t gfp)$/;"	f	typeref:typename:void *
devres_destroy	drivers/core/devres.c	/^int devres_destroy(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:int
devres_destroy	include/dm/device.h	/^static inline int devres_destroy(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:int
devres_find	drivers/core/devres.c	/^void *devres_find(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:void *
devres_find	include/dm/device.h	/^static inline void *devres_find(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:void *
devres_free	drivers/core/devres.c	/^void devres_free(void *res)$/;"	f	typeref:typename:void
devres_free	include/dm/device.h	/^static inline void devres_free(void *res)$/;"	f	typeref:typename:void
devres_get	drivers/core/devres.c	/^void *devres_get(struct udevice *dev, void *new_res,$/;"	f	typeref:typename:void *
devres_get	include/dm/device.h	/^static inline void *devres_get(struct udevice *dev, void *new_res,$/;"	f	typeref:typename:void *
devres_head	include/dm/device.h	/^	struct list_head devres_head;$/;"	m	struct:udevice	typeref:struct:list_head
devres_log	drivers/core/devres.c	/^#define devres_log(/;"	d	file:
devres_log	drivers/core/devres.c	/^static void devres_log(struct udevice *dev, struct devres *dr,$/;"	f	typeref:typename:void	file:
devres_release	drivers/core/devres.c	/^int devres_release(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:int
devres_release	include/dm/device.h	/^static inline int devres_release(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:int
devres_release_all	drivers/core/devres.c	/^void devres_release_all(struct udevice *dev)$/;"	f	typeref:typename:void
devres_release_all	include/dm/device-internal.h	/^static inline void devres_release_all(struct udevice *dev)$/;"	f	typeref:typename:void
devres_release_probe	drivers/core/devres.c	/^void devres_release_probe(struct udevice *dev)$/;"	f	typeref:typename:void
devres_release_probe	include/dm/device-internal.h	/^static inline void devres_release_probe(struct udevice *dev)$/;"	f	typeref:typename:void
devres_remove	drivers/core/devres.c	/^void *devres_remove(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:void *
devres_remove	include/dm/device.h	/^static inline void *devres_remove(struct udevice *dev, dr_release_t release,$/;"	f	typeref:typename:void *
devs	common/stdio.c	/^static struct stdio_dev devs;$/;"	v	typeref:struct:stdio_dev	file:
devs	drivers/pci/pci_ftpci100.c	/^static struct pci_config devs[FTPCI100_MAX_FUNCTIONS];$/;"	v	typeref:struct:pci_config[]	file:
devs	drivers/usb/host/xhci.h	/^	struct xhci_virt_device *devs[MAX_HC_SLOTS];$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_virt_device * []
devslp_disable	arch/x86/cpu/broadwell/sata.c	/^	int devslp_disable;$/;"	m	struct:sata_platdata	typeref:typename:int	file:
devslp_mux	arch/x86/cpu/broadwell/sata.c	/^	int devslp_mux;$/;"	m	struct:sata_platdata	typeref:typename:int	file:
devstatus	drivers/usb/gadget/atmel_usba_udc.h	/^	u16 devstatus;$/;"	m	struct:usba_udc	typeref:typename:u16
devt	drivers/usb/dwc3/core.h	/^	struct dwc3_event_devt		devt;$/;"	m	union:dwc3_event	typeref:struct:dwc3_event_devt
devt	include/linux/compat.h	/^	dev_t			devt;	\/* dev_t, creates the sysfs "dev" *\/$/;"	m	struct:device	typeref:typename:dev_t
devtodev	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 devtodev;$/;"	m	struct:rk3288_msch	typeref:typename:u32
devtype	drivers/sound/max98095.c	/^	enum max98095_type devtype;$/;"	m	struct:max98095_priv	typeref:enum:max98095_type	file:
devtype	include/fpga.h	/^	fpga_type devtype;	\/* switch value to select sub-functions *\/$/;"	m	struct:__anon4d3ae96c0208	typeref:typename:fpga_type
dfc_width	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	dfc_width;      \/* Width of flash controller(DWIDTH_C) *\/$/;"	m	struct:pxa3xx_nand_flash	typeref:typename:unsigned int
dfi_actnum	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dfi_actnum;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dfi_cfg	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void dfi_cfg(struct rk3288_ddr_pctl *pctl, u32 dramtype)$/;"	f	typeref:typename:void	file:
dfi_init_start	arch/arm/mach-exynos/clock_init.h	/^	unsigned dfi_init_start;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dfi_rdnum	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dfi_rdnum;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dfi_timerval	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dfi_timerval;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dfi_wrnum	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dfi_wrnum;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dfilpcfg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dfilpcfg;		\/* 0x198 DFI low power configuration register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfilpcfg	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dfilpcfg;		\/* 0x198 DFI low power configuration register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfilpcfg0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfilpcfg0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfilpcfg0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfilpcfg0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfilpcfg0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfilpcfg0;		\/* 0x2f0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfilpcfg0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfilpcfg0;		\/* 0x2f0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfimisc	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dfimisc;		\/* 0x1b0 DFI miscellaneous control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfimisc	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dfimisc;		\/* 0x1b0 DFI miscellaneous control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiodtcfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfiodtcfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfiodtcfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfiodtcfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfiodtcfg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfiodtcfg;		\/* 0x244 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiodtcfg	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfiodtcfg;		\/* 0x244 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiodtcfg1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfiodtcfg1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfiodtcfg1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfiodtcfg1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfiodtcfg1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfiodtcfg1;		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiodtcfg1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfiodtcfg1;		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiodtrankmap	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfiodtrankmap;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfiodtrankmap	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfiodtrankmap;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfiodtrmap	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfiodtrmap;		\/* 0x24c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiodtrmap	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfiodtrmap;		\/* 0x24c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfistcfg0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfistcfg0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfistcfg0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfistcfg0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfistcfg0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfistcfg0;		\/* 0x2c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfistcfg0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfistcfg0;		\/* 0x2c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfistcfg1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfistcfg1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfistcfg1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfistcfg1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfistcfg1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfistcfg1;		\/* 0x2c8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfistcfg1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfistcfg1;		\/* 0x2c8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfistcfg2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfistcfg2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfistcfg2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfistcfg2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfistparclr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfistparclr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfistparclr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfistparclr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfistparlog	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfistparlog;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfistparlog	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfistparlog;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfiststat0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfiststat0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfiststat0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfiststat0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitcrlupdi	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitcrlupdi;	\/* 0x298 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitcrlupdi	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitcrlupdi;	\/* 0x298 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctldly	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitctldly;		\/* 0x240 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctldly	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitctldly;		\/* 0x240 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctrldelay	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitctrldelay;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitctrldelay	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitctrldelay;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitctrlupddly	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitctrlupddly;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitctrlupddly	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitctrlupddly;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitctrlupddly	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitctrlupddly;	\/* 0x288 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctrlupddly	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitctrlupddly;	\/* 0x288 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctrlupdi	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitctrlupdi;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitctrlupdi	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitctrlupdi;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitctrlupdmax	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitctrlupdmax;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitctrlupdmax	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitctrlupdmax;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitctrlupdmax	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitctrlupdmax;	\/* 0x284 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctrlupdmax	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitctrlupdmax;	\/* 0x284 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctrlupdmin	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitctrlupdmin;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitctrlupdmin	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitctrlupdmin;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitctrlupdmin	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitctrlupdmin;	\/* 0x280 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitctrlupdmin	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitctrlupdmin;	\/* 0x280 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitdramclkdis	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitdramclkdis;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitdramclkdis	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitdramclkdis;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitdramclkdis	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitdramclkdis;	\/* 0x2d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitdramclkdis	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitdramclkdis;	\/* 0x2d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitdramclken	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitdramclken;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitdramclken	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitdramclken;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitdramclken	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitdramclken;	\/* 0x2d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitdramclken	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitdramclken;	\/* 0x2d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitmg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dfitmg[2];		\/* 0x190 DFI timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dfitmg	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dfitmg[2];		\/* 0x190 DFI timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dfitphyrdl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphyrdl;		\/* 0x264 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyrdl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphyrdl;		\/* 0x264 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyrdlat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphyrdlat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphyrdlat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphyrdlat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitphyupdtype0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphyupdtype0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphyupdtype0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphyupdtype0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitphyupdtype0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphyupdtype0;	\/* 0x270 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphyupdtype0;	\/* 0x270 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphyupdtype1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphyupdtype1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphyupdtype1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitphyupdtype1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphyupdtype1;	\/* 0x274 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphyupdtype1;	\/* 0x274 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphyupdtype2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphyupdtype2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphyupdtype2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitphyupdtype2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphyupdtype2;	\/* 0x278 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphyupdtype2;	\/* 0x278 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphyupdtype3;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphyupdtype3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphyupdtype3;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitphyupdtype3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphyupdtype3;	\/* 0x27c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphyupdtype3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphyupdtype3;	\/* 0x27c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphywrd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphywrd;		\/* 0x250 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphywrd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphywrd;		\/* 0x250 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphywrdata	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphywrdata;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphywrdata	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphywrdata;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitphywrl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitphywrl;		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphywrl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitphywrl;		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitphywrlat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitphywrlat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitphywrlat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitphywrlat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrcfg0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrcfg0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrcfg0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrcfg0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrcfg0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrcfg0;		\/* 0x2ac *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrcfg0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrcfg0;		\/* 0x2ac *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrcmd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrcmd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrcmd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrcmd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrddataen	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrddataen;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrddataen	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrddataen;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrdden	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrdden;		\/* 0x260 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrdden	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrdden;		\/* 0x260 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrefmski	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrefmski;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrefmski	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrefmski;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrefmski	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrefmski;	\/* 0x294 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrefmski	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrefmski;	\/* 0x294 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrrdlvldelay0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvldelay0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvldelay0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvldelay0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvldelay1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvldelay1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvldelay1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvldelay1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvldelay2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvldelay2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvldelay2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvldelay2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlen	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlen;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlen	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlen;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlen	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrrdlvlen;	\/* 0x2b8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrrdlvlen	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrrdlvlen;	\/* 0x2b8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrrdlvlgatedelay0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlgatedelay0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlgatedelay0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlgatedelay0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlgatedelay1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlgatedelay1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlgatedelay1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlgatedelay1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlgatedelay2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlgatedelay2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlgatedelay2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlgatedelay2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlgateen	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlgateen;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlgateen	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlgateen;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlgateen	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrrdlvlgateen;	\/* 0x2bc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrrdlvlgateen	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrrdlvlgateen;	\/* 0x2bc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrrdlvlresp0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlresp0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlresp0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlresp0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlresp1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlresp1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlresp1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlresp1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrrdlvlresp2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrrdlvlresp2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrrdlvlresp2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrrdlvlresp2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrstat0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrstat0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrstat0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrstat0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrstat0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrstat0;		\/* 0x2b0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrstat0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrstat0;		\/* 0x2b0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrwrlvldelay0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvldelay0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvldelay0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvldelay0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrwrlvldelay1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvldelay1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvldelay1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvldelay1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrwrlvldelay2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvldelay2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvldelay2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvldelay2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrwrlvlen	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvlen;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvlen	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvlen;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrwrlvlen	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfitrwrlvlen;	\/* 0x2b4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrwrlvlen	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfitrwrlvlen;	\/* 0x2b4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfitrwrlvlresp0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvlresp0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvlresp0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvlresp0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrwrlvlresp1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvlresp1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvlresp1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvlresp1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfitrwrlvlresp2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfitrwrlvlresp2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfitrwrlvlresp2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfitrwrlvlresp2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfiupd	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dfiupd[4];		\/* 0x1a0 DFI update register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
dfiupd	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dfiupd[4];		\/* 0x1a0 DFI update register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
dfiupdcfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dfiupdcfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dfiupdcfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dfiupdcfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dfiupdcfg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dfiupdcfg;		\/* 0x290 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dfiupdcfg	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dfiupdcfg;		\/* 0x290 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dflag	tools/imagetool.h	/^	int dflag;$/;"	m	struct:image_tool_params	typeref:typename:int
dflash0	arch/arm/dts/fsl-ls1012a-qds.dtsi	/^	dflash0: n25q128a {$/;"	l
dflash0	arch/arm/dts/fsl-ls1043a-qds.dtsi	/^	dflash0: n25q128a {$/;"	l
dflash0	arch/arm/dts/fsl-ls1046a-qds.dtsi	/^	dflash0: n25q128a {$/;"	l
dflash0	arch/arm/dts/fsl-ls2080a-qds.dts	/^	dflash0: n25q128a {$/;"	l
dflash0	arch/arm/dts/fsl-ls2080a-rdb.dts	/^	dflash0: n25q512a {$/;"	l
dflash1	arch/arm/dts/fsl-ls1012a-qds.dtsi	/^	dflash1: sst25wf040b {$/;"	l
dflash1	arch/arm/dts/fsl-ls1043a-qds.dtsi	/^	dflash1: sst25wf040b {$/;"	l
dflash1	arch/arm/dts/fsl-ls1046a-qds.dtsi	/^	dflash1: sst25wf040b {$/;"	l
dflash1	arch/arm/dts/fsl-ls2080a-qds.dts	/^	dflash1: sst25wf040b {$/;"	l
dflash2	arch/arm/dts/fsl-ls1012a-qds.dtsi	/^	dflash2: en25s64 {$/;"	l
dflash2	arch/arm/dts/fsl-ls1043a-qds.dtsi	/^	dflash2: en25s64 {$/;"	l
dflash2	arch/arm/dts/fsl-ls1046a-qds.dtsi	/^	dflash2: en25s64 {$/;"	l
dflash2	arch/arm/dts/fsl-ls2080a-qds.dts	/^	dflash2: en25s64 {$/;"	l
dfll	arch/arm/dts/tegra124.dtsi	/^	dfll: clock@70110000 {$/;"	l
dflt	drivers/net/phy/micrel.c	/^	const u8	dflt;	\/* Default value *\/$/;"	m	struct:ksz90x1_reg_field	typeref:typename:const u8	file:
dflt_dpbp	drivers/net/fsl-mc/mc.c	/^struct fsl_dpbp_obj *dflt_dpbp = NULL;$/;"	v	typeref:struct:fsl_dpbp_obj *
dflt_dpio	drivers/net/fsl-mc/mc.c	/^struct fsl_dpio_obj *dflt_dpio = NULL;$/;"	v	typeref:struct:fsl_dpio_obj *
dflt_dpni	drivers/net/fsl-mc/mc.c	/^struct fsl_dpni_obj *dflt_dpni = NULL;$/;"	v	typeref:struct:fsl_dpni_obj *
dflt_dprc_handle	drivers/net/fsl-mc/mc.c	/^uint16_t dflt_dprc_handle = 0;$/;"	v	typeref:typename:uint16_t
dflt_mc_io	drivers/net/fsl-mc/mc.c	/^struct fsl_mc_io *dflt_mc_io = NULL; \/* child container *\/$/;"	v	typeref:struct:fsl_mc_io *
dfomt	drivers/net/mvgbe.h	/^	u32 dfomt[64];$/;"	m	struct:mvgbe_registers	typeref:typename:u32[64]
dfs_chk_fastmap	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_chk_fastmap;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_chk_fs	fs/ubifs/debug.c	/^static struct dentry *dfs_chk_fs;$/;"	v	typeref:struct:dentry *	file:
dfs_chk_fs	fs/ubifs/debug.h	/^	struct dentry *dfs_chk_fs;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_chk_gen	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_chk_gen;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_chk_gen	fs/ubifs/debug.c	/^static struct dentry *dfs_chk_gen;$/;"	v	typeref:struct:dentry *	file:
dfs_chk_gen	fs/ubifs/debug.h	/^	struct dentry *dfs_chk_gen;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_chk_index	fs/ubifs/debug.c	/^static struct dentry *dfs_chk_index;$/;"	v	typeref:struct:dentry *	file:
dfs_chk_index	fs/ubifs/debug.h	/^	struct dentry *dfs_chk_index;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_chk_io	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_chk_io;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_chk_lprops	fs/ubifs/debug.c	/^static struct dentry *dfs_chk_lprops;$/;"	v	typeref:struct:dentry *	file:
dfs_chk_lprops	fs/ubifs/debug.h	/^	struct dentry *dfs_chk_lprops;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_chk_orph	fs/ubifs/debug.c	/^static struct dentry *dfs_chk_orph;$/;"	v	typeref:struct:dentry *	file:
dfs_chk_orph	fs/ubifs/debug.h	/^	struct dentry *dfs_chk_orph;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_dir	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_dir;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_dir	fs/ubifs/debug.h	/^	struct dentry *dfs_dir;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_dir_name	drivers/mtd/ubi/ubi.h	/^	char dfs_dir_name[UBI_DFS_DIR_LEN + 1];$/;"	m	struct:ubi_debug_info	typeref:typename:char[]
dfs_dir_name	fs/ubifs/debug.h	/^	char dfs_dir_name[UBIFS_DFS_DIR_LEN + 1];$/;"	m	struct:ubifs_debug_info	typeref:typename:char[]
dfs_disable_bgt	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_disable_bgt;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_dump_budg	fs/ubifs/debug.h	/^	struct dentry *dfs_dump_budg;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_dump_lprops	fs/ubifs/debug.h	/^	struct dentry *dfs_dump_lprops;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_dump_tnc	fs/ubifs/debug.h	/^	struct dentry *dfs_dump_tnc;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_emulate_bitflips	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_emulate_bitflips;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_emulate_io_failures	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_emulate_io_failures;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_emulate_power_cut	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_emulate_power_cut;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_file_open	fs/ubifs/debug.c	/^static int dfs_file_open(struct inode *inode, struct file *file)$/;"	f	typeref:typename:int	file:
dfs_file_read	drivers/mtd/ubi/debug.c	/^static ssize_t dfs_file_read(struct file *file, char __user *user_buf,$/;"	f	typeref:typename:ssize_t	file:
dfs_file_read	fs/ubifs/debug.c	/^static ssize_t dfs_file_read(struct file *file, char __user *u, size_t count,$/;"	f	typeref:typename:ssize_t	file:
dfs_file_write	drivers/mtd/ubi/debug.c	/^static ssize_t dfs_file_write(struct file *file, const char __user *user_buf,$/;"	f	typeref:typename:ssize_t	file:
dfs_file_write	fs/ubifs/debug.c	/^static ssize_t dfs_file_write(struct file *file, const char __user *u,$/;"	f	typeref:typename:ssize_t	file:
dfs_fops	drivers/mtd/ubi/debug.c	/^static const struct file_operations dfs_fops = {$/;"	v	typeref:typename:const struct file_operations	file:
dfs_fops	fs/ubifs/debug.c	/^static const struct file_operations dfs_fops = {$/;"	v	typeref:typename:const struct file_operations	file:
dfs_global_file_read	fs/ubifs/debug.c	/^static ssize_t dfs_global_file_read(struct file *file, char __user *u,$/;"	f	typeref:typename:ssize_t	file:
dfs_global_file_write	fs/ubifs/debug.c	/^static ssize_t dfs_global_file_write(struct file *file, const char __user *u,$/;"	f	typeref:typename:ssize_t	file:
dfs_global_fops	fs/ubifs/debug.c	/^static const struct file_operations dfs_global_fops = {$/;"	v	typeref:typename:const struct file_operations	file:
dfs_low_freq	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 dfs_low_freq = 100;$/;"	v	typeref:typename:u32
dfs_low_freq	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 dfs_low_freq = 130;$/;"	v	typeref:typename:u32
dfs_low_phy1	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 dfs_low_phy1 = 0x1f;$/;"	v	typeref:typename:u32
dfs_power_cut_max	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_power_cut_max;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_power_cut_min	drivers/mtd/ubi/ubi.h	/^	struct dentry *dfs_power_cut_min;$/;"	m	struct:ubi_debug_info	typeref:struct:dentry *
dfs_reg_write	drivers/ddr/marvell/axp/ddr3_dfs.c	/^static inline void dfs_reg_write(u32 addr, u32 val)$/;"	f	typeref:typename:void	file:
dfs_ro_error	fs/ubifs/debug.h	/^	struct dentry *dfs_ro_error;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfs_rootdir	drivers/mtd/ubi/debug.c	/^static struct dentry *dfs_rootdir;$/;"	v	typeref:struct:dentry *	file:
dfs_rootdir	fs/ubifs/debug.c	/^static struct dentry *dfs_rootdir;$/;"	v	typeref:struct:dentry *	file:
dfs_tst_rcvry	fs/ubifs/debug.c	/^static struct dentry *dfs_tst_rcvry;$/;"	v	typeref:struct:dentry *	file:
dfs_tst_rcvry	fs/ubifs/debug.h	/^	struct dentry *dfs_tst_rcvry;$/;"	m	struct:ubifs_debug_info	typeref:struct:dentry *
dfsmt	drivers/net/mvgbe.h	/^	u32 dfsmt[64];$/;"	m	struct:mvgbe_registers	typeref:typename:u32[64]
dfsrr	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 dfsrr;	\/* I2C digital filter sampling rate register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
dft_enable	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	dft_enable;	\/* 0x50 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
dfu_add	drivers/usb/gadget/f_dfu.c	/^int dfu_add(struct usb_configuration *c)$/;"	f	typeref:typename:int
dfu_alt_num	drivers/dfu/dfu.c	/^static int dfu_alt_num;$/;"	v	typeref:typename:int	file:
dfu_bind	drivers/usb/gadget/f_dfu.c	/^static int dfu_bind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:int	file:
dfu_bind_config	drivers/usb/gadget/f_dfu.c	/^static int dfu_bind_config(struct usb_configuration *c)$/;"	f	typeref:typename:int	file:
dfu_buf	drivers/dfu/dfu.c	/^static unsigned char *dfu_buf;$/;"	v	typeref:typename:unsigned char *	file:
dfu_buf_size	drivers/dfu/dfu.c	/^static unsigned long dfu_buf_size;$/;"	v	typeref:typename:unsigned long	file:
dfu_config_entities	drivers/dfu/dfu.c	/^int dfu_config_entities(char *env, char *interface, char *devstr)$/;"	f	typeref:typename:int
dfu_defer_flush	drivers/usb/gadget/f_dfu.c	/^struct dfu_entity *dfu_defer_flush;$/;"	v	typeref:struct:dfu_entity *
dfu_device_type	include/dfu.h	/^enum dfu_device_type {$/;"	g
dfu_disable	drivers/usb/gadget/f_dfu.c	/^static void dfu_disable(struct usb_function *f)$/;"	f	typeref:typename:void	file:
dfu_entity	include/dfu.h	/^struct dfu_entity {$/;"	s
dfu_file_buf	drivers/dfu/dfu_mmc.c	/^static unsigned char *dfu_file_buf;$/;"	v	typeref:typename:unsigned char *	file:
dfu_file_buf_filled	drivers/dfu/dfu_mmc.c	/^static long dfu_file_buf_filled;$/;"	v	typeref:typename:long	file:
dfu_file_buf_len	drivers/dfu/dfu_mmc.c	/^static long dfu_file_buf_len;$/;"	v	typeref:typename:long	file:
dfu_fill_entity	drivers/dfu/dfu.c	/^static int dfu_fill_entity(struct dfu_entity *dfu, char *s, int alt,$/;"	f	typeref:typename:int	file:
dfu_fill_entity_mmc	drivers/dfu/dfu_mmc.c	/^int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)$/;"	f	typeref:typename:int
dfu_fill_entity_mmc	include/dfu.h	/^static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr,$/;"	f	typeref:typename:int
dfu_fill_entity_nand	drivers/dfu/dfu_nand.c	/^int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)$/;"	f	typeref:typename:int
dfu_fill_entity_nand	include/dfu.h	/^static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr,$/;"	f	typeref:typename:int
dfu_fill_entity_ram	drivers/dfu/dfu_ram.c	/^int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s)$/;"	f	typeref:typename:int
dfu_fill_entity_ram	include/dfu.h	/^static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr,$/;"	f	typeref:typename:int
dfu_fill_entity_sf	drivers/dfu/dfu_sf.c	/^int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s)$/;"	f	typeref:typename:int
dfu_fill_entity_sf	include/dfu.h	/^static inline int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr,$/;"	f	typeref:typename:int
dfu_find_alt_num	drivers/dfu/dfu.c	/^static int dfu_find_alt_num(const char *s)$/;"	f	typeref:typename:int	file:
dfu_flush	drivers/dfu/dfu.c	/^int dfu_flush(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)$/;"	f	typeref:typename:int
dfu_flush_medium_mmc	drivers/dfu/dfu_mmc.c	/^int dfu_flush_medium_mmc(struct dfu_entity *dfu)$/;"	f	typeref:typename:int
dfu_flush_medium_nand	drivers/dfu/dfu_nand.c	/^static int dfu_flush_medium_nand(struct dfu_entity *dfu)$/;"	f	typeref:typename:int	file:
dfu_flush_medium_sf	drivers/dfu/dfu_sf.c	/^static int dfu_flush_medium_sf(struct dfu_entity *dfu)$/;"	f	typeref:typename:int	file:
dfu_free_buf	drivers/dfu/dfu.c	/^unsigned char *dfu_free_buf(void)$/;"	f	typeref:typename:unsigned char *
dfu_free_entities	drivers/dfu/dfu.c	/^void dfu_free_entities(void)$/;"	f	typeref:typename:void
dfu_free_entity_mmc	drivers/dfu/dfu_mmc.c	/^void dfu_free_entity_mmc(struct dfu_entity *dfu)$/;"	f	typeref:typename:void
dfu_free_entity_sf	drivers/dfu/dfu_sf.c	/^static void dfu_free_entity_sf(struct dfu_entity *dfu)$/;"	f	typeref:typename:void	file:
dfu_func	drivers/usb/gadget/f_dfu.c	/^static const struct dfu_function_descriptor dfu_func = {$/;"	v	typeref:typename:const struct dfu_function_descriptor	file:
dfu_function_descriptor	drivers/usb/gadget/f_dfu.h	/^struct dfu_function_descriptor {$/;"	s
dfu_generic_strings	drivers/usb/gadget/f_dfu.c	/^static struct usb_gadget_strings *dfu_generic_strings[] = {$/;"	v	typeref:struct:usb_gadget_strings * []	file:
dfu_get_alt	drivers/dfu/dfu.c	/^int dfu_get_alt(char *name)$/;"	f	typeref:typename:int
dfu_get_alt_number	drivers/dfu/dfu.c	/^int dfu_get_alt_number(void)$/;"	f	typeref:typename:int
dfu_get_buf	drivers/dfu/dfu.c	/^unsigned char *dfu_get_buf(struct dfu_entity *dfu)$/;"	f	typeref:typename:unsigned char *
dfu_get_buf_size	drivers/dfu/dfu.c	/^unsigned long dfu_get_buf_size(void)$/;"	f	typeref:typename:unsigned long
dfu_get_defer_flush	include/dfu.h	/^static inline struct dfu_entity *dfu_get_defer_flush(void)$/;"	f	typeref:struct:dfu_entity *
dfu_get_dev_type	drivers/dfu/dfu.c	/^const char *dfu_get_dev_type(enum dfu_device_type t)$/;"	f	typeref:typename:const char *
dfu_get_entity	drivers/dfu/dfu.c	/^struct dfu_entity *dfu_get_entity(int alt)$/;"	f	typeref:struct:dfu_entity *
dfu_get_hash_algo	drivers/dfu/dfu.c	/^static char *dfu_get_hash_algo(void)$/;"	f	typeref:typename:char *	file:
dfu_get_layout	drivers/dfu/dfu.c	/^const char *dfu_get_layout(enum dfu_layout l)$/;"	f	typeref:typename:const char *
dfu_get_manifest_timeout	drivers/usb/gadget/f_dfu.c	/^static inline int dfu_get_manifest_timeout(struct dfu_entity *dfu)$/;"	f	typeref:typename:int	file:
dfu_get_medium_size_mmc	drivers/dfu/dfu_mmc.c	/^long dfu_get_medium_size_mmc(struct dfu_entity *dfu)$/;"	f	typeref:typename:long
dfu_get_medium_size_nand	drivers/dfu/dfu_nand.c	/^long dfu_get_medium_size_nand(struct dfu_entity *dfu)$/;"	f	typeref:typename:long
dfu_get_medium_size_ram	drivers/dfu/dfu_ram.c	/^long dfu_get_medium_size_ram(struct dfu_entity *dfu)$/;"	f	typeref:typename:long
dfu_get_medium_size_sf	drivers/dfu/dfu_sf.c	/^static long dfu_get_medium_size_sf(struct dfu_entity *dfu)$/;"	f	typeref:typename:long	file:
dfu_handle	drivers/usb/gadget/f_dfu.c	/^dfu_handle(struct usb_function *f, const struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dfu_hash_algo	drivers/dfu/dfu.c	/^static struct hash_algo *dfu_hash_algo;$/;"	v	typeref:struct:hash_algo *	file:
dfu_init_env_entities	drivers/dfu/dfu.c	/^int dfu_init_env_entities(char *interface, char *devstr)$/;"	f	typeref:typename:int
dfu_intf_runtime	drivers/usb/gadget/f_dfu.c	/^static struct usb_interface_descriptor dfu_intf_runtime = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
dfu_layout	include/dfu.h	/^enum dfu_layout {$/;"	g
dfu_name	drivers/usb/gadget/f_dfu.c	/^static const char dfu_name[] = "Device Firmware Upgrade";$/;"	v	typeref:typename:const char[]	file:
dfu_op	include/dfu.h	/^enum dfu_op {$/;"	g
dfu_polltimeout_nand	drivers/dfu/dfu_nand.c	/^unsigned int dfu_polltimeout_nand(struct dfu_entity *dfu)$/;"	f	typeref:typename:unsigned int
dfu_polltimeout_sf	drivers/dfu/dfu_sf.c	/^static unsigned int dfu_polltimeout_sf(struct dfu_entity *dfu)$/;"	f	typeref:typename:unsigned int	file:
dfu_prepare_function	drivers/usb/gadget/f_dfu.c	/^static int dfu_prepare_function(struct f_dfu *f_dfu, int n)$/;"	f	typeref:typename:int	file:
dfu_prepare_strings	drivers/usb/gadget/f_dfu.c	/^dfu_prepare_strings(struct f_dfu *f_dfu, int n)$/;"	f	typeref:typename:int	file:
dfu_read	drivers/dfu/dfu.c	/^int dfu_read(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)$/;"	f	typeref:typename:int
dfu_read	test/py/tests/test_dfu.py	/^    def dfu_read(alt_setting, fn):$/;"	f	function:test_dfu	file:
dfu_read_buffer_fill	drivers/dfu/dfu.c	/^static int dfu_read_buffer_fill(struct dfu_entity *dfu, void *buf, int size)$/;"	f	typeref:typename:int	file:
dfu_read_medium_mmc	drivers/dfu/dfu_mmc.c	/^int dfu_read_medium_mmc(struct dfu_entity *dfu, u64 offset, void *buf,$/;"	f	typeref:typename:int
dfu_read_medium_nand	drivers/dfu/dfu_nand.c	/^static int dfu_read_medium_nand(struct dfu_entity *dfu, u64 offset, void *buf,$/;"	f	typeref:typename:int	file:
dfu_read_medium_ram	drivers/dfu/dfu_ram.c	/^static int dfu_read_medium_ram(struct dfu_entity *dfu, u64 offset,$/;"	f	typeref:typename:int	file:
dfu_read_medium_sf	drivers/dfu/dfu_sf.c	/^static int dfu_read_medium_sf(struct dfu_entity *dfu, u64 offset, void *buf,$/;"	f	typeref:typename:int	file:
dfu_runtime_descs	drivers/usb/gadget/f_dfu.c	/^static struct usb_descriptor_header *dfu_runtime_descs[] = {$/;"	v	typeref:struct:usb_descriptor_header * []	file:
dfu_set_alt	drivers/usb/gadget/f_dfu.c	/^static int dfu_set_alt(struct usb_function *f, unsigned intf, unsigned alt)$/;"	f	typeref:typename:int	file:
dfu_set_defer_flush	include/dfu.h	/^static inline void dfu_set_defer_flush(struct dfu_entity *dfu)$/;"	f	typeref:typename:void
dfu_set_poll_timeout	drivers/usb/gadget/f_dfu.c	/^static void dfu_set_poll_timeout(struct dfu_status *dstat, unsigned int ms)$/;"	f	typeref:typename:void	file:
dfu_show_entities	drivers/dfu/dfu.c	/^void dfu_show_entities(void)$/;"	f	typeref:typename:void
dfu_state	drivers/usb/gadget/f_dfu.c	/^	enum dfu_state			dfu_state;$/;"	m	struct:f_dfu	typeref:enum:dfu_state	file:
dfu_state	drivers/usb/gadget/f_dfu.c	/^static dfu_state_fn dfu_state[] = {$/;"	v	typeref:typename:dfu_state_fn[]	file:
dfu_state	drivers/usb/gadget/f_dfu.h	/^enum dfu_state {$/;"	g
dfu_state_fn	drivers/usb/gadget/f_dfu.c	/^typedef int (*dfu_state_fn) (struct f_dfu *,$/;"	t	typeref:typename:int (*)(struct f_dfu *,const struct usb_ctrlrequest *,struct usb_gadget *,struct usb_request *)	file:
dfu_status	drivers/usb/gadget/f_dfu.c	/^	unsigned int			dfu_status;$/;"	m	struct:f_dfu	typeref:typename:unsigned int	file:
dfu_status	drivers/usb/gadget/f_dfu.h	/^struct dfu_status {$/;"	s
dfu_strings	drivers/usb/gadget/f_dfu.c	/^static struct usb_gadget_strings *dfu_strings[] = {$/;"	v	typeref:struct:usb_gadget_strings * []	file:
dfu_tftp_write	drivers/dfu/dfu_tftp.c	/^int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,$/;"	f	typeref:typename:int
dfu_tftp_write	include/dfu.h	/^static inline int dfu_tftp_write(char *dfu_entity_name, unsigned int addr,$/;"	f	typeref:typename:int
dfu_transfer_medium_ram	drivers/dfu/dfu_ram.c	/^static int dfu_transfer_medium_ram(enum dfu_op op, struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
dfu_unbind	drivers/usb/gadget/f_dfu.c	/^static void dfu_unbind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:void	file:
dfu_usb_get_reset	drivers/dfu/dfu.c	/^__weak bool dfu_usb_get_reset(void)$/;"	f	typeref:typename:__weak bool
dfu_usb_get_reset	drivers/usb/gadget/ci_udc.c	/^bool dfu_usb_get_reset(void)$/;"	f	typeref:typename:bool
dfu_usb_get_reset	drivers/usb/gadget/dwc2_udc_otg.c	/^bool dfu_usb_get_reset(void)$/;"	f	typeref:typename:bool
dfu_usb_get_reset	drivers/usb/musb-new/sunxi.c	/^bool dfu_usb_get_reset(void)$/;"	f	typeref:typename:bool
dfu_write	drivers/dfu/dfu.c	/^int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)$/;"	f	typeref:typename:int
dfu_write	test/py/tests/test_dfu.py	/^    def dfu_write(alt_setting, fn):$/;"	f	function:test_dfu	file:
dfu_write_buffer_drain	drivers/dfu/dfu.c	/^static int dfu_write_buffer_drain(struct dfu_entity *dfu)$/;"	f	typeref:typename:int	file:
dfu_write_from_mem_addr	drivers/dfu/dfu.c	/^int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size)$/;"	f	typeref:typename:int
dfu_write_medium_mmc	drivers/dfu/dfu_mmc.c	/^int dfu_write_medium_mmc(struct dfu_entity *dfu,$/;"	f	typeref:typename:int
dfu_write_medium_nand	drivers/dfu/dfu_nand.c	/^static int dfu_write_medium_nand(struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
dfu_write_medium_ram	drivers/dfu/dfu_ram.c	/^static int dfu_write_medium_ram(struct dfu_entity *dfu, u64 offset,$/;"	f	typeref:typename:int	file:
dfu_write_medium_sf	drivers/dfu/dfu_sf.c	/^static int dfu_write_medium_sf(struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
dfu_write_read_check	test/py/tests/test_dfu.py	/^    def dfu_write_read_check(size):$/;"	f	function:test_dfu	file:
dfu_write_transaction_cleanup	drivers/dfu/dfu.c	/^void dfu_write_transaction_cleanup(struct dfu_entity *dfu)$/;"	f	typeref:typename:void
dfut	drivers/net/mvgbe.h	/^	u32 dfut[4];$/;"	m	struct:mvgbe_registers	typeref:typename:u32[4]
dfvlan	arch/powerpc/include/asm/immap_86xx.h	/^	uint    dfvlan;		\/* 0x24108 - Default VLAN control word *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
dfx_access	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct dfx_access {$/;"	s
dfx_table	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	struct dfx_access *dfx_table;$/;"	m	struct:hws_xsb_info	typeref:struct:dfx_access *
dgcs	include/universe.h	/^	unsigned int dgcs;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
dgier	drivers/spi/xilinx_spi.c	/^	u32 dgier;	\/* Device Global Interrupt Enable Register (DGIER) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
dgsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dgsr;		\/* DMA General Status *\/$/;"	m	struct:ccsr_dma	typeref:typename:u32
dgsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	dgsr;		\/* 0x21300 - DMA General Status Register *\/$/;"	m	struct:ccsr_dma	typeref:typename:uint
dh	drivers/bios_emulator/include/biosemu.h	/^	u8 dh, dl;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
dh	drivers/bios_emulator/include/biosemu.h	/^	u8 dh;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
dhcp_ack	include/efi_api.h	/^	struct efi_pxe_packet dhcp_ack;$/;"	m	struct:efi_pxe_mode	typeref:struct:efi_pxe_packet
dhcp_ack	lib/efi_loader/efi_net.c	/^static struct efi_pxe_packet *dhcp_ack;$/;"	v	typeref:struct:efi_pxe_packet *	file:
dhcp_discover	include/efi_api.h	/^	struct efi_pxe_packet dhcp_discover;$/;"	m	struct:efi_pxe_mode	typeref:struct:efi_pxe_packet
dhcp_extended	net/bootp.c	/^static int dhcp_extended(u8 *e, int message_type, struct in_addr server_ip,$/;"	f	typeref:typename:int	file:
dhcp_handler	net/bootp.c	/^static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
dhcp_leasetime	net/bootp.c	/^static u32 dhcp_leasetime;$/;"	v	typeref:typename:u32	file:
dhcp_message_type	net/bootp.c	/^static int dhcp_message_type(unsigned char *popt)$/;"	f	typeref:typename:int	file:
dhcp_option_overload	net/bootp.c	/^static u8 dhcp_option_overload;$/;"	v	typeref:typename:u8	file:
dhcp_packet_process_options	net/bootp.c	/^static void dhcp_packet_process_options(struct bootp_hdr *bp)$/;"	f	typeref:typename:void	file:
dhcp_process_options	net/bootp.c	/^static void dhcp_process_options(uchar *popt, uchar *end)$/;"	f	typeref:typename:void	file:
dhcp_request	net/bootp.c	/^void dhcp_request(void)$/;"	f	typeref:typename:void
dhcp_send_request_packet	net/bootp.c	/^static void dhcp_send_request_packet(struct bootp_hdr *bp_offer)$/;"	f	typeref:typename:void	file:
dhcp_server_ip	net/bootp.c	/^static struct in_addr dhcp_server_ip;$/;"	v	typeref:struct:in_addr	file:
dhcp_state	net/bootp.c	/^static dhcp_state_t dhcp_state = INIT;$/;"	v	typeref:typename:dhcp_state_t	file:
dhcp_state_t	net/bootp.h	/^	       RENEWING } dhcp_state_t;$/;"	t	typeref:enum:__anon7cb633f50103
dhry	lib/dhry/dhry_1.c	/^void dhry(int Number_Of_Runs)$/;"	f	typeref:typename:void
di	drivers/bios_emulator/include/biosemu.h	/^	u16 di, di_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
di	drivers/bios_emulator/include/biosemu.h	/^	u16 di_hi, di;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
di	drivers/video/ipu.h	/^		uint32_t di;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0508	typeref:typename:uint32_t
di	drivers/video/ipu.h	/^		uint32_t di;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0708	typeref:typename:uint32_t
di	drivers/video/ipu.h	/^		uint32_t di;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0908	typeref:typename:uint32_t
di	fs/ubifs/ubifs.h	/^	struct ubi_device_info di;$/;"	m	struct:ubifs_info	typeref:struct:ubi_device_info
di	include/linux/mtd/ubi.h	/^	struct ubi_device_info di;$/;"	m	struct:ubi_notification	typeref:struct:ubi_device_info
di0_conf	drivers/video/ipu_regs.h	/^	u32 di0_conf[2];$/;"	m	struct:ipu_dc	typeref:typename:u32[2]
di0_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^iomux_v3_cfg_t const di0_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
di1_conf	drivers/video/ipu_regs.h	/^	u32 di1_conf[2];$/;"	m	struct:ipu_dc	typeref:typename:u32[2]
di_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint di_ctrl;			\/* _DISP_DI_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
di_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 di, di_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
di_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 di_hi, di;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
di_init	drivers/rtc/imxdi.c	/^static int di_init(void)$/;"	f	typeref:typename:int	file:
di_net	include/api_public.h	/^#define di_net /;"	d
di_pins	drivers/video/ipu_regs.h	/^enum di_pins {$/;"	g
di_stor	include/api_public.h	/^#define di_stor /;"	d
di_sync_wave	drivers/video/ipu_regs.h	/^enum di_sync_wave {$/;"	g
di_write_wait	drivers/rtc/imxdi.c	/^static int di_write_wait(u32 val, const char *reg)$/;"	f	typeref:typename:int	file:
diag_done	arch/powerpc/cpu/mpc86xx/start.S	/^diag_done:$/;"	l
diag_printf	include/xyzModem.h	/^#define diag_printf /;"	d
diag_vprintf	include/xyzModem.h	/^#define diag_vprintf /;"	d
diag_vsprintf	include/xyzModem.h	/^#define diag_vsprintf /;"	d
diagad	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t diagad;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
diagdata	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t diagdata;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
dialog	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color dialog;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
dialog_checklist	scripts/kconfig/lxdialog/checklist.c	/^int dialog_checklist(const char *title, const char *prompt, int height,$/;"	f	typeref:typename:int
dialog_clear	scripts/kconfig/lxdialog/util.c	/^void dialog_clear(void)$/;"	f	typeref:typename:void
dialog_color	scripts/kconfig/lxdialog/dialog.h	/^struct dialog_color {$/;"	s
dialog_info	scripts/kconfig/lxdialog/dialog.h	/^struct dialog_info {$/;"	s
dialog_input_result	scripts/kconfig/lxdialog/inputbox.c	/^char dialog_input_result[MAX_LEN + 1];$/;"	v	typeref:typename:char[]
dialog_input_result	scripts/kconfig/nconf.c	/^static char *dialog_input_result;$/;"	v	typeref:typename:char *	file:
dialog_input_result_len	scripts/kconfig/nconf.c	/^static int dialog_input_result_len;$/;"	v	typeref:typename:int	file:
dialog_inputbox	scripts/kconfig/lxdialog/inputbox.c	/^int dialog_inputbox(const char *title, const char *prompt, int height, int width,$/;"	f	typeref:typename:int
dialog_inputbox	scripts/kconfig/nconf.gui.c	/^int dialog_inputbox(WINDOW *main_window,$/;"	f	typeref:typename:int
dialog_item	scripts/kconfig/lxdialog/dialog.h	/^struct dialog_item {$/;"	s
dialog_list	scripts/kconfig/lxdialog/dialog.h	/^struct dialog_list {$/;"	s
dialog_menu	scripts/kconfig/lxdialog/menubox.c	/^int dialog_menu(const char *title, const char *prompt,$/;"	f	typeref:typename:int
dialog_textbox	scripts/kconfig/lxdialog/textbox.c	/^int dialog_textbox(const char *title, char *tbuf, int initial_height,$/;"	f	typeref:typename:int
dialog_yesno	scripts/kconfig/lxdialog/yesno.c	/^int dialog_yesno(const char *title, const char *prompt, int height, int width)$/;"	f	typeref:typename:int
dic	lib/lzma/LzmaDec.h	/^  Byte *dic;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:Byte *
dicBufSize	lib/lzma/LzmaDec.h	/^  SizeT dicBufSize;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:SizeT
dicPos	lib/lzma/LzmaDec.h	/^  SizeT dicPos;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:SizeT
dicSize	lib/lzma/LzmaDec.h	/^  UInt32 dicSize;$/;"	m	struct:_CLzmaProps	typeref:typename:UInt32
dicar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dicar;	\/* Device Information CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
dicar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	dicar;		\/* 0xc0004 - Device Information Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
dict_directive	lib/lz4.c	/^typedef enum { noDict = 0, withPrefix64k, usingExtDict } dict_directive;$/;"	t	typeref:enum:__anoneaf05ef60103	file:
did	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t  did;$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310308	typeref:typename:uint8_t
did	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t did;$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310208	typeref:typename:uint8_t
did	doc/README.x86	/^did not describe any details. We need manually apply the patch to the FSP$/;"	l
did_vid	drivers/tpm/tpm_tis_lpc.c	/^	u32 did_vid;$/;"	m	struct:tpm_locality	typeref:typename:u32	file:
didcar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	didcar;	\/* Device Identity CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
didcar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	didcar;		\/* 0xc0000 - Device Identity Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
didle_wakeup	board/samsung/goni/lowlevel_init.S	/^didle_wakeup:$/;"	l
didst	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	didst;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
didstc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	didstc;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
die	arch/mips/include/asm/system.h	/^#define die(/;"	d
die	arch/x86/cpu/start.S	/^die:$/;"	l
die	arch/x86/lib/fsp/fsp_car.S	/^die:$/;"	l
die_id_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 die_id_0;		\/* 0x18 *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
die_id_1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 die_id_1;		\/* 0x1C *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
die_id_2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 die_id_2;		\/* 0x20 *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
die_id_3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 die_id_3;		\/* 0x24 *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
die_if_kernel	arch/mips/include/asm/system.h	/^#define die_if_kernel(/;"	d
die_rev	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^	u8	die_rev;	\/* Processor revision *\/$/;"	m	struct:omap_id	typeref:typename:u8	file:
die_term	arch/arm/mach-keystone/ddr3_spd.c	/^enum die_term {$/;"	g	file:
diepctl	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 diepctl;$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u32
diepdma	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 diepdma;$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u32
diepdmab	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 diepdmab;$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u32
diepint	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 diepint;$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u32
diepmsk	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 diepmsk; \/* Device IN Endpoint Common Interrupt Mask *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
dieptsiz	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 dieptsiz;$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u32
dieptxf	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 dieptxf[15]; \/* Device Periodic Transmit FIFO size register *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32[15]
dier	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 dier;$/;"	m	struct:gpt_regs	typeref:typename:u32
dier	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 dier;	\/* dma_int_en *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
dier	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 dier;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
dier	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 dier;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
dier	drivers/rtc/imxdi.c	/^	u32 dier;			\/* Interrupt Enable Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dies	include/linux/mtd/onenand.h	/^	unsigned int dies;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
diesize	include/linux/mtd/onenand.h	/^	unsigned int diesize[MAX_DIES];$/;"	m	struct:onenand_chip	typeref:typename:unsigned int[]
diff	tools/fdtgrep.c	/^	int diff;		\/* Show +\/- diff markers *\/$/;"	m	struct:display_info	typeref:typename:int	file:
diff_sysclk	include/e500.h	/^	unsigned char diff_sysclk;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned char
digest	board/gdsys/p1022/controlcenterd-id.c	/^	uint8_t digest[20];$/;"	m	struct:h_reg	typeref:typename:uint8_t[20]	file:
digest	tools/mxsimage.c	/^	uint8_t				digest[32];$/;"	m	struct:sb_image_ctx	typeref:typename:uint8_t[32]	file:
digest	tools/mxsimage.h	/^		uint8_t	digest[20];$/;"	m	union:sb_boot_image_header::__anonc4848c96010a	typeref:typename:uint8_t[20]
digest_size	include/ec_commands.h	/^	uint8_t digest_size;     \/* Size of hash digest in bytes *\/$/;"	m	struct:ec_response_vboot_hash	typeref:typename:uint8_t
digest_size	include/hash.h	/^	int digest_size;			\/* Length of digest *\/$/;"	m	struct:hash_algo	typeref:typename:int
digestsize	drivers/crypto/fsl/fsl_hash.c	/^	unsigned int digestsize;$/;"	m	struct:caam_hash_template	typeref:typename:unsigned int	file:
digprog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 digprog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
digprog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	digprog;		\/* 0x260 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
digprog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t digprog;			\/* offset 0x0800 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
digprog_sololite	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 digprog_sololite;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
digprog_sololite	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	digprog_sololite;	\/* 0x280 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
dimm	arch/x86/include/asm/global_data.h	/^	struct dimm_info dimm[8];$/;"	m	struct:pei_memory_info	typeref:struct:dimm_info[8]
dimm0	board/freescale/mpc8641hpcn/ddr.c	/^const struct board_specific_parameters dimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
dimm0	board/freescale/p1022ds/ddr.c	/^static const struct board_specific_parameters dimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
dimm0	board/freescale/p2041rdb/ddr.c	/^static const struct board_specific_parameters dimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
dimm_0_enable	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_0_enable;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_1_enable	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_1_enable;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_bus_width	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_bus_width;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_channel0_disabled	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int dimm_channel0_disabled;$/;"	m	struct:pei_data	typeref:typename:int
dimm_channel0_disabled	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int dimm_channel0_disabled;$/;"	m	struct:pei_data	typeref:typename:int
dimm_channel1_disabled	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int dimm_channel1_disabled;$/;"	m	struct:pei_data	typeref:typename:int
dimm_channel1_disabled	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int dimm_channel1_disabled;$/;"	m	struct:pei_data	typeref:typename:int
dimm_cnt	arch/x86/include/asm/global_data.h	/^	uint8_t dimm_cnt;$/;"	m	struct:pei_memory_info	typeref:typename:uint8_t
dimm_density	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_density;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_height	include/ddr_spd.h	/^	unsigned char dimm_height; \/* 47 DDR SDRAM DIMM Height *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
dimm_info	arch/x86/include/asm/global_data.h	/^struct dimm_info {$/;"	s
dimm_info	drivers/ddr/marvell/axp/ddr3_spd.c	/^typedef struct dimm_info {$/;"	s	file:
dimm_name	arch/arm/mach-keystone/include/mach/ddr3.h	/^	char   dimm_name[32];$/;"	m	struct:ddr3_spd_cb	typeref:typename:char[32]
dimm_num	arch/x86/include/asm/global_data.h	/^	uint8_t dimm_num;$/;"	m	struct:dimm_info	typeref:typename:uint8_t
dimm_number_required	drivers/ddr/fsl/interactive.c	/^	unsigned int dimm_number_required;$/;"	m	struct:data_strings	typeref:typename:unsigned int	file:
dimm_params	include/fsl_ddr.h	/^	   dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];$/;"	m	struct:__anonbfc8c40c0108	typeref:struct:dimm_params_s[][]
dimm_params_s	include/fsl_ddr_dimm_params.h	/^typedef struct dimm_params_s {$/;"	s
dimm_params_t	include/fsl_ddr_dimm_params.h	/^} dimm_params_t;$/;"	t	typeref:struct:dimm_params_s
dimm_rc	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u8 dimm_rc[SPD_RDIMM_RC_NUM];$/;"	m	struct:dimm_info	typeref:typename:u8[]	file:
dimm_sdram_cas	drivers/ddr/marvell/axp/ddr3_spd.c	/^enum dimm_sdram_cas {$/;"	g	file:
dimm_sides	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_sides;			\/* Ranks Per dimm_ *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_size	arch/x86/include/asm/global_data.h	/^	uint32_t dimm_size;$/;"	m	struct:dimm_info	typeref:typename:uint32_t
dimm_slots_per_ctrl	include/fsl_ddr.h	/^	unsigned int dimm_slots_per_ctrl;$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:unsigned int
dimm_tcl	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_tcl;			\/* tCL *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_tfaw	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_tfaw;			\/* tFAW in DRAM clk *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_trpt_rcd	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_trpt_rcd;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_trrd	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_trrd;			\/* tRRD in DRAM clk *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_trtp	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_trtp;			\/* tRTP in DRAM clk *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_twr	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_twr;			\/* tWR in DRAM clk  *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_twtr	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_twtr;			\/* tWTR in DRAM clk *\/$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimm_type	include/ddr_spd.h	/^	unsigned char dimm_type;   \/* 20 DIMM type information *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dimm_volt_if	drivers/ddr/marvell/axp/ddr3_spd.c	/^enum dimm_volt_if {$/;"	g	file:
dimm_width	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dimm_width;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dimms	board/freescale/mpc8641hpcn/ddr.c	/^const struct board_specific_parameters *dimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
din	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 din;	\/* 0x1060c *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
din	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 din;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
din	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 din;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
din	cmd/spi.c	/^static uchar 		din[MAX_SPI_BYTES];$/;"	v	typeref:typename:uchar[]	file:
din	drivers/spi/mvebu_a3700_spi.c	/^	u32 din;	\/* 0x1060c *\/$/;"	m	struct:spi_reg	typeref:typename:u32	file:
din_pol	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 din_pol;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
din_pol	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 din_pol;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
dio_cfg	board/gateworks/gw_ventana/common.h	/^	struct dio_cfg *dio_cfg;$/;"	m	struct:ventana	typeref:struct:dio_cfg *
dio_cfg	board/gateworks/gw_ventana/common.h	/^struct dio_cfg {$/;"	s
dio_num	board/gateworks/gw_ventana/common.h	/^	int dio_num;$/;"	m	struct:ventana	typeref:typename:int
dioi2c_en	board/gateworks/gw_ventana/common.h	/^	int dioi2c_en;$/;"	m	struct:ventana	typeref:typename:int
dip_pin_mux	board/vscom/baltos/board.c	/^static struct module_pin_mux dip_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
dir	arch/arm/include/asm/arch-stv0991/gpio.h	/^	u32 dir;		\/* offset 0x400 *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
dir	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int dir;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
dir	arch/blackfin/include/asm/gpio.h	/^	unsigned short dir;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dir	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dir;$/;"	m	struct:gpio_port_s	typeref:typename:unsigned short
dir	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long dir;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
dir	arch/powerpc/include/asm/immap_83xx.h	/^	u32 dir;		\/* direction register *\/$/;"	m	struct:gpio83xx	typeref:typename:u32
dir	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $dir   = $mbar - 1 + 0x010$/;"	t
dir	fs/jffs2/jffs2_nand_private.h	/^	struct b_list dir;$/;"	m	struct:b_lists	typeref:struct:b_list
dir	fs/jffs2/jffs2_private.h	/^	struct b_list dir;$/;"	m	struct:b_lists	typeref:struct:b_list
dir	include/ioports.h	/^	int		dir;$/;"	m	struct:__anonc67861fe0308	typeref:typename:int
dir	include/zfs_common.h	/^	int dir;$/;"	m	struct:zfs_dirhook_info	typeref:typename:int
dir0	board/bf609-ezkit/soft_switch.c	/^	uchar dir0; \/* IODIRA *\/$/;"	m	struct:switch_config	typeref:typename:uchar	file:
dir1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 dir1;		\/* direction register 1 *\/$/;"	m	struct:gpio_n	typeref:typename:u32
dir1	board/bf609-ezkit/soft_switch.c	/^	uchar dir1; \/* IODIRB *\/$/;"	m	struct:switch_config	typeref:typename:uchar	file:
dir1	include/ns87308.h	/^  unsigned char dir1;  \/* 1 direction port 1 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
dir2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 dir2;		\/* direction register 2 *\/$/;"	m	struct:gpio_n	typeref:typename:u32
dir2	include/ns87308.h	/^  unsigned char dir2;  \/* 5 direction port 2 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
dirObj	fs/yaffs2/yaffsfs.c	/^	struct yaffs_obj *dirObj;	\/* ptr to directory being searched *\/$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:struct:yaffs_obj *	file:
dir_blocks	include/ext_common.h	/^			__le32 dir_blocks[INDIRECT_BLOCKS];$/;"	m	struct:ext2_inode::__anon5bc84367010a::datablocks	typeref:typename:__le32[]
dir_clear	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dir_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dir_clear	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long dir_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
dir_curclust	fs/fat/fat_write.c	/^static __u32 dir_curclust;$/;"	v	typeref:typename:__u32	file:
dir_dep	scripts/kconfig/expr.h	/^	struct expr_value dir_dep;$/;"	m	struct:symbol	typeref:struct:expr_value
dir_entries	include/fat.h	/^	__u8	dir_entries[2];	\/* Number of root directory entries *\/$/;"	m	struct:boot_sector	typeref:typename:__u8[2]
dir_entry	include/fat.h	/^typedef struct dir_entry {$/;"	s
dir_entry	include/fat.h	/^} dir_entry;$/;"	t	typeref:struct:dir_entry
dir_input	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool dir_input;$/;"	m	struct:pin_info	typeref:typename:bool	file:
dir_set	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dir_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dir_set	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long dir_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
dir_slot	include/fat.h	/^typedef struct dir_slot {$/;"	s
dir_slot	include/fat.h	/^} dir_slot;$/;"	t	typeref:struct:dir_slot
dir_variant	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_dir_var dir_variant;$/;"	m	union:yaffs_obj_var	typeref:struct:yaffs_dir_var
dirdelim	fs/fat/fat.c	/^static int dirdelim(char *str)$/;"	f	typeref:typename:int	file:
direct_access	drivers/misc/fsl_iim.c	/^static void direct_access(struct fsl_iim *regs, u32 bank, u32 word, u32 bit,$/;"	f	typeref:typename:void	file:
direct_cmd_msr	arch/arm/mach-exynos/clock_init.h	/^	unsigned direct_cmd_msr[MEM_TIMINGS_MSR_COUNT];$/;"	m	struct:mem_timings	typeref:typename:unsigned[]
direct_cmd_msr	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned direct_cmd_msr[MEM_TIMINGS_MSR_COUNT];$/;"	m	struct:mem_timings	typeref:typename:unsigned[]
direct_color_mode_info	include/vbe.h	/^	u8 direct_color_mode_info;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
direct_line	include/usbdescriptors.h	/^		struct usb_class_direct_line_descriptor direct_line;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_direct_line_descriptor
direct_writes	drivers/mtd/ubi/ubi.h	/^	unsigned int direct_writes:1;$/;"	m	struct:ubi_volume	typeref:typename:unsigned int:1
directcmd	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int directcmd;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
directcmd	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int directcmd;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
directcmd	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int directcmd;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
directcntl	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 directcntl;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
direction	drivers/gpio/altera_pio.c	/^	u32	direction;		\/* Direction register *\/$/;"	m	struct:altera_pio_regs	typeref:typename:u32	file:
direction	drivers/i2c/mv_i2c.c	/^	u8 direction;$/;"	m	struct:mv_i2c_msg	typeref:typename:u8	file:
direction	drivers/usb/dwc3/core.h	/^	unsigned		direction:1;$/;"	m	struct:dwc3_ep	typeref:typename:unsigned:1
direction	drivers/usb/dwc3/core.h	/^	unsigned		direction:1;$/;"	m	struct:dwc3_request	typeref:typename:unsigned:1
direction	drivers/video/stb_truetype.h	/^   float direction;$/;"	m	struct:stbtt__active_edge	typeref:typename:float
direction	drivers/video/stb_truetype.h	/^   int direction;$/;"	m	struct:stbtt__active_edge	typeref:typename:int
direction_input	include/asm-generic/gpio.h	/^	int (*direction_input)(struct udevice *dev, unsigned offset);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset)
direction_output	include/asm-generic/gpio.h	/^	int (*direction_output)(struct udevice *dev, unsigned offset,$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset,int value)
dirent_crc	fs/jffs2/jffs2_nand_private.h	/^dirent_crc(struct jffs2_raw_dirent *node)$/;"	f	typeref:typename:int
dirent_crc	fs/jffs2/jffs2_private.h	/^dirent_crc(struct jffs2_raw_dirent *node)$/;"	f	typeref:typename:int
dirent_name_crc	fs/jffs2/jffs2_nand_private.h	/^dirent_name_crc(struct jffs2_raw_dirent *node)$/;"	f	typeref:typename:int
dirent_name_crc	fs/jffs2/jffs2_private.h	/^dirent_name_crc(struct jffs2_raw_dirent *node)$/;"	f	typeref:typename:int
direntlen	include/ext_common.h	/^	__le16 direntlen;$/;"	m	struct:ext2_dirent	typeref:typename:__le16
dirfh	net/nfs.c	/^static char dirfh[NFS_FHSIZE];	\/* NFSv2 \/ NFSv3 file handle of directory *\/$/;"	v	typeref:typename:char[]	file:
dirinfo	fs/zfs/zfs.c	/^	struct zfs_dirhook_info *dirinfo;$/;"	m	struct:zfs_data	typeref:struct:zfs_dirhook_info *	file:
dirname	net/nfs.c	/^static char *dirname(char *path)$/;"	f	typeref:typename:char *	file:
diropen	include/ext_common.h	/^	struct ext2fs_node diropen;$/;"	m	struct:ext2_data	typeref:struct:ext2fs_node
dirtied_ino	fs/ubifs/ubifs.h	/^	unsigned int dirtied_ino:4;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:4
dirtied_ino	fs/ubifs/ubifs.h	/^	unsigned int dirtied_ino;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
dirtied_ino_d	fs/ubifs/ubifs.h	/^	unsigned int dirtied_ino_d:15;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:15
dirtied_ino_d	fs/ubifs/ubifs.h	/^	unsigned int dirtied_ino_d;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
dirtied_page	fs/ubifs/ubifs.h	/^	unsigned int dirtied_page:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
dirtied_page	fs/ubifs/ubifs.h	/^	unsigned int dirtied_page;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
dirtied_when	fs/ubifs/ubifs.h	/^	unsigned long		dirtied_when;	\/* jiffies of first dirtying *\/$/;"	m	struct:inode	typeref:typename:unsigned long
dirty	fs/ubifs/replay.c	/^	int dirty;$/;"	m	struct:bud_entry	typeref:typename:int	file:
dirty	fs/ubifs/ubifs.h	/^	int dirty;$/;"	m	struct:ubifs_lprops	typeref:typename:int
dirty	fs/ubifs/ubifs.h	/^	int dirty;$/;"	m	struct:ubifs_lpt_lprops	typeref:typename:int
dirty	fs/ubifs/ubifs.h	/^	unsigned int dirty:1;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int:1
dirty	fs/yaffs2/yaffs_guts.h	/^	int dirty;$/;"	m	struct:yaffs_cache	typeref:typename:int
dirty	fs/yaffs2/yaffs_guts.h	/^	struct list_head dirty;	\/* Entry for list of dirty directories *\/$/;"	m	struct:yaffs_dir_var	typeref:struct:list_head
dirty	fs/yaffs2/yaffs_guts.h	/^	u8 dirty:1;		\/* the object needs to be written to flash *\/$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
dirty_block_ptr	fs/ext4/ext4_journal.c	/^struct dirty_blocks *dirty_block_ptr[MAX_JOURNAL_ENTRIES];$/;"	v	typeref:struct:dirty_blocks * []
dirty_blocks	fs/ext4/ext4_journal.h	/^struct dirty_blocks {$/;"	s
dirty_cow_bottom_up	fs/ubifs/tnc.c	/^static struct ubifs_znode *dirty_cow_bottom_up(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
dirty_cow_nnode	fs/ubifs/lpt.c	/^static struct ubifs_nnode *dirty_cow_nnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_nnode *	file:
dirty_cow_pnode	fs/ubifs/lpt.c	/^static struct ubifs_pnode *dirty_cow_pnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_pnode *	file:
dirty_cow_znode	fs/ubifs/tnc.c	/^static struct ubifs_znode *dirty_cow_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
dirty_dirs	fs/yaffs2/yaffs_guts.h	/^	struct list_head dirty_dirs;	\/* List of dirty directories *\/$/;"	m	struct:yaffs_dev	typeref:struct:list_head
dirty_idx	fs/ubifs/ubifs.h	/^	struct ubifs_lpt_heap dirty_idx;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_lpt_heap
dirty_inode	fs/ubifs/ubifs.h	/^   	void (*dirty_inode) (struct inode *, int flags);$/;"	m	struct:super_operations	typeref:typename:void (*)(struct inode *,int flags)
dirty_nn_cnt	fs/ubifs/ubifs.h	/^	int dirty_nn_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
dirty_pg_cnt	fs/ubifs/ubifs.h	/^	atomic_long_t dirty_pg_cnt;$/;"	m	struct:ubifs_info	typeref:typename:atomic_long_t
dirty_pn_cnt	fs/ubifs/ubifs.h	/^	int dirty_pn_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
dirty_tx	drivers/net/rtl8169.c	/^	unsigned long dirty_tx;$/;"	m	struct:rtl8169_private	typeref:typename:unsigned long	file:
dirty_zn_cnt	fs/ubifs/ubifs.h	/^	atomic_long_t dirty_zn_cnt;$/;"	m	struct:ubifs_info	typeref:typename:atomic_long_t
dis_irq_arm_core0_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core0_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core0_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core0_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_central_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_central_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core0_local_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core0_local_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_central_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_central_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core1_local_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core1_local_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_arm_core2_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core2_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core2_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core2_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core2_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core2_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core2_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core2_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core2_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core2_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core2_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core2_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core3_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core3_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core3_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core3_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core3_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core3_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core3_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core3_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core3_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core3_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_arm_core3_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_arm_core3_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_fsys_arm_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_central_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_central_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_central_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_central_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_central_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_local_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_local_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_local_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_fsys_arm_local_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_fsys_arm_local_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_central_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_central_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_isp_arm_local_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_isp_arm_local_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dis_irq_kfc_core0_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core0_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core0_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core0_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core0_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core0_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core0_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core0_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core0_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core0_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core0_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core0_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core1_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core1_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core1_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core1_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core1_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core1_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core1_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core1_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core1_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core1_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core1_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core1_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core2_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core2_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core2_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core2_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core2_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core2_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core2_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core2_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core2_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core2_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core2_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core2_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core3_central_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core3_central_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core3_central_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core3_central_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core3_central_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core3_central_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core3_local_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core3_local_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core3_local_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core3_local_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_irq_kfc_core3_local_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dis_irq_kfc_core3_local_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dis_last_addr	cmd/bedbug.c	/^ulong dis_last_addr = 0;	\/* Last address disassembled   *\/$/;"	v	typeref:typename:ulong
dis_last_len	cmd/bedbug.c	/^ulong dis_last_len = 20;	\/* Default disassembler length *\/$/;"	v	typeref:typename:ulong
dis_u2_susphy_quirk	drivers/usb/dwc3/core.h	/^	unsigned		dis_u2_susphy_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
dis_u2_susphy_quirk	include/dwc3-uboot.h	/^	unsigned dis_u2_susphy_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
dis_u3_susphy_quirk	drivers/usb/dwc3/core.h	/^	unsigned		dis_u3_susphy_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
dis_u3_susphy_quirk	include/dwc3-uboot.h	/^	unsigned dis_u3_susphy_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
disable	arch/arm/mach-tegra/xusb-padctl-common.h	/^	int (*disable)(struct tegra_xusb_phy *phy);$/;"	m	struct:tegra_xusb_phy_ops	typeref:typename:int (*)(struct tegra_xusb_phy * phy)
disable	drivers/usb/eth/r8152.h	/^		void (*disable)(struct r8152 *);$/;"	m	struct:r8152::rtl_ops	typeref:typename:void (*)(struct r8152 *)
disable	drivers/usb/musb-new/musb_core.h	/^	void	(*disable)(struct musb *musb);$/;"	m	struct:musb_platform_ops	typeref:typename:void (*)(struct musb * musb)
disable	drivers/usb/phy/rockchip_usb2_phy.c	/^	unsigned int disable;$/;"	m	struct:usb2phy_reg	typeref:typename:unsigned int	file:
disable	drivers/video/ipu.h	/^	void (*disable) (struct clk *);$/;"	m	struct:clk	typeref:typename:void (*)(struct clk *)
disable	include/clk-uclass.h	/^	int (*disable)(struct clk *clk);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * clk)
disable	include/linux/usb/composite.h	/^	void			(*disable)(struct usb_function *);$/;"	m	struct:usb_function	typeref:typename:void (*)(struct usb_function *)
disable	include/linux/usb/gadget.h	/^	int (*disable) (struct usb_ep *ep);$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep)
disable	include/tpm.h	/^	u8	disable;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
disable_8259A_irq	board/mpl/common/isa.c	/^void disable_8259A_irq(unsigned int irq)$/;"	f	typeref:typename:void
disable_8568mds_flash_write	board/freescale/mpc8568mds/bcsr.c	/^void disable_8568mds_flash_write(void)$/;"	f	typeref:typename:void
disable_8569mds_brd_eeprom_write_protect	board/freescale/mpc8569mds/bcsr.c	/^void disable_8569mds_brd_eeprom_write_protect(void)$/;"	f	typeref:typename:void
disable_8569mds_flash_write	board/freescale/mpc8569mds/bcsr.c	/^void disable_8569mds_flash_write(void)$/;"	f	typeref:typename:void
disable_addr_trans	arch/powerpc/cpu/mpc83xx/start.S	/^disable_addr_trans:$/;"	l
disable_addr_trans	arch/powerpc/cpu/mpc86xx/start.S	/^disable_addr_trans:$/;"	l
disable_bgt	drivers/mtd/ubi/ubi.h	/^	unsigned int disable_bgt:1;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:1
disable_caches	arch/arm/mach-s5pc1xx/cache.c	/^void disable_caches(void)$/;"	f	typeref:typename:void
disable_check	test/py/u_boot_console_base.py	/^    def disable_check(self, check_type):$/;"	m	class:ConsoleBase
disable_clock_domain	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void disable_clock_domain(u32 *const clkctrl_reg)$/;"	f	typeref:typename:void	file:
disable_clock_domain	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void disable_clock_domain(u32 const clkctrl_reg)$/;"	f	typeref:typename:void	file:
disable_clock_module	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void disable_clock_module(u32 *const clkctrl_addr,$/;"	f	typeref:typename:void	file:
disable_clock_module	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void disable_clock_module(u32 const clkctrl_addr,$/;"	f	typeref:typename:void	file:
disable_cmd_pwr	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int disable_cmd_pwr;$/;"	m	struct:pei_data	typeref:typename:int
disable_controller	drivers/usb/host/r8a66597-hcd.c	/^static void disable_controller(struct r8a66597 *r8a66597)$/;"	f	typeref:typename:void	file:
disable_cpc_sram	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^#define disable_cpc_sram(/;"	d	file:
disable_cpc_sram	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void disable_cpc_sram(void)$/;"	f	typeref:typename:void
disable_ctrlc	common/console.c	/^int disable_ctrlc(int disable)$/;"	f	typeref:typename:int
disable_dma	drivers/net/bcm-sf2-eth.h	/^	int (*disable_dma)(struct eth_dma *dma, int dir);$/;"	m	struct:eth_dma	typeref:typename:int (*)(struct eth_dma * dma,int dir)
disable_ecc	post/cpu/ppc4xx/denali_ecc.c	/^inline static void disable_ecc(void)$/;"	f	typeref:typename:void	file:
disable_edma3_clocks	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^void disable_edma3_clocks(void)$/;"	f	typeref:typename:void
disable_edma3_clocks	arch/arm/cpu/armv7/omap5/hw_data.c	/^void disable_edma3_clocks(void)$/;"	f	typeref:typename:void
disable_external_watchdog	board/dnp5370/dnp5370.c	/^static void disable_external_watchdog(void)$/;"	f	typeref:typename:void	file:
disable_full_da_logic_info	include/tpm.h	/^	u8	disable_full_da_logic_info;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
disable_igd	arch/x86/cpu/queensbay/tnc.c	/^static int __maybe_unused disable_igd(void)$/;"	f	typeref:typename:int __maybe_unused	file:
disable_int	drivers/mtd/nand/pxa3xx_nand.c	/^static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)$/;"	f	typeref:typename:void	file:
disable_interrupts	arch/arc/lib/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/arm/lib/interrupts.c	/^int disable_interrupts (void)$/;"	f	typeref:typename:int
disable_interrupts	arch/arm/lib/interrupts_64.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/arm/lib/interrupts_m.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/avr32/lib/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/blackfin/cpu/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/m68k/lib/interrupts.c	/^int disable_interrupts (void)$/;"	f	typeref:typename:int
disable_interrupts	arch/microblaze/cpu/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/mips/cpu/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/nds32/lib/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/nios2/cpu/interrupts.c	/^int disable_interrupts (void)$/;"	f	typeref:typename:int
disable_interrupts	arch/openrisc/cpu/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/powerpc/lib/interrupts.c	/^int disable_interrupts (void)$/;"	f	typeref:typename:int
disable_interrupts	arch/sandbox/lib/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/sh/cpu/sh2/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/sh/cpu/sh3/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/sh/cpu/sh4/interrupts.c	/^int disable_interrupts (void){$/;"	f	typeref:typename:int
disable_interrupts	arch/sparc/lib/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/x86/cpu/interrupts.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	arch/xtensa/cpu/exceptions.c	/^int disable_interrupts(void)$/;"	f	typeref:typename:int
disable_interrupts	examples/standalone/test_burst_lib.S	/^disable_interrupts:$/;"	l
disable_irq	include/linux/compat.h	/^#define disable_irq(/;"	d
disable_irq_wake	include/linux/compat.h	/^#define disable_irq_wake(/;"	d
disable_lapic	arch/x86/cpu/lapic.c	/^void disable_lapic(void)$/;"	f	typeref:typename:void
disable_law	arch/powerpc/cpu/mpc8xxx/law.c	/^void disable_law(u8 idx)$/;"	f	typeref:typename:void
disable_lazy_load	fs/yaffs2/yaffs_guts.h	/^	int disable_lazy_load;	\/* Disable lazy loading on this device *\/$/;"	m	struct:yaffs_param	typeref:typename:int
disable_ldb_di_clock_sources	arch/arm/cpu/armv7/mx6/clock.c	/^static void disable_ldb_di_clock_sources(void)$/;"	f	typeref:typename:void	file:
disable_lvds	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void disable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
disable_lvds	board/embest/mx6boards/mx6boards.c	/^static void disable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
disable_lvds	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void disable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
disable_lvds	board/freescale/mx6sabresd/mx6sabresd.c	/^static void disable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
disable_mac	drivers/net/bcm-sf2-eth.h	/^	int (*disable_mac)(void);$/;"	m	struct:eth_info	typeref:typename:int (*)(void)
disable_mac	drivers/net/fm/fm.h	/^	void (*disable_mac)(struct fsl_enet_mac *mac);$/;"	m	struct:fsl_enet_mac	typeref:typename:void (*)(struct fsl_enet_mac * mac)
disable_non_ddr_laws	arch/powerpc/cpu/mpc8xxx/law.c	/^void disable_non_ddr_laws(void)$/;"	f	typeref:typename:void
disable_one_interrupt	arch/microblaze/cpu/interrupts.c	/^static void disable_one_interrupt(int irq)$/;"	f	typeref:typename:void	file:
disable_owner_clear	include/tpm.h	/^	u8	disable_owner_clear;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
disable_pcie1	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	disable_pcie1;		\/* Offset 0x0024 *\/$/;"	m	struct:vpd_region	typeref:typename:u8
disable_pcie2	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	disable_pcie2;		\/* Offset 0x0025 *\/$/;"	m	struct:vpd_region	typeref:typename:u8
disable_pcie3	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	disable_pcie3;		\/* Offset 0x0026 *\/$/;"	m	struct:vpd_region	typeref:typename:u8
disable_periodic	drivers/usb/host/ehci-hcd.c	/^disable_periodic(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
disable_polarity_correction	drivers/net/e1000.h	/^	bool disable_polarity_correction;$/;"	m	struct:e1000_hw	typeref:typename:bool
disable_rc4	tools/rkcommon.c	/^	uint32_t disable_rc4;$/;"	m	struct:header0_info	typeref:typename:uint32_t	file:
disable_sata_clock	arch/arm/cpu/armv7/mx6/clock.c	/^void disable_sata_clock(void)$/;"	f	typeref:typename:void
disable_saved_data	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int disable_saved_data;$/;"	m	struct:pei_data	typeref:typename:int
disable_scramble_quirk	drivers/usb/dwc3/core.h	/^	unsigned		disable_scramble_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
disable_scramble_quirk	include/dwc3-uboot.h	/^	unsigned disable_scramble_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
disable_self_refresh	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int disable_self_refresh;$/;"	m	struct:pei_data	typeref:typename:int
disable_soft_del	fs/yaffs2/yaffs_guts.h	/^	int disable_soft_del;	\/* yaffs 1 only: Set to disable the use of$/;"	m	struct:yaffs_param	typeref:typename:int
disable_summary	fs/yaffs2/yaffs_guts.h	/^	int disable_summary;$/;"	m	struct:yaffs_param	typeref:typename:int
disable_tlb	arch/powerpc/cpu/mpc85xx/tlb.c	/^void disable_tlb(u8 esel)$/;"	f	typeref:typename:void
disable_usb_clocks	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^void disable_usb_clocks(int index)$/;"	f	typeref:typename:void
disable_usb_clocks	arch/arm/cpu/armv7/omap5/hw_data.c	/^void disable_usb_clocks(int index)$/;"	f	typeref:typename:void
disabled	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int disabled;			\/* e.g. got a UE, we're hung *\/$/;"	m	struct:ohci	typeref:typename:int
disabled	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int disabled;			\/* e.g. got a UE, we're hung *\/$/;"	m	struct:ohci	typeref:typename:int
disabled	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int disabled;		\/* e.g. got a UE, we're hung *\/$/;"	m	struct:ohci	typeref:typename:int
disabled	drivers/net/sandbox.c	/^static bool disabled[8] = {false};$/;"	v	typeref:typename:bool[8]	file:
disabled	drivers/usb/host/isp116x.h	/^	unsigned disabled:1;$/;"	m	struct:isp116x	typeref:typename:unsigned:1
disabled	drivers/usb/host/ohci-s3c24xx.h	/^	int disabled;		\/* e.g. got a UE, we're hung *\/$/;"	m	struct:ohci	typeref:typename:int
disabled	drivers/usb/host/ohci.h	/^	int disabled;			\/* e.g. got a UE, we're hung *\/$/;"	m	struct:ohci	typeref:typename:int
disabled	include/dm/platform_data/serial_bcm283x_mu.h	/^	bool disabled;$/;"	m	struct:bcm283x_mu_serial_platdata	typeref:typename:bool
disabled	include/linux/apm_bios.h	/^	int			disabled;$/;"	m	struct:apm_info	typeref:typename:int
disabledColorGroup	scripts/kconfig/qconf.h	/^	QColorGroup disabledColorGroup;$/;"	m	class:ConfigList	typeref:typename:QColorGroup
disassemble_forward	drivers/bios_emulator/x86emu/debug.c	/^static void disassemble_forward(u16 seg, u16 off, int n)$/;"	f	typeref:typename:void	file:
discard_bits	fs/jffs2/mini_inflate.c	/^static void discard_bits(struct bitstream *stream)$/;"	f	typeref:typename:void	file:
discard_cfg	include/vsc9953.h	/^	u32	discard_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
disconnect	include/linux/usb/composite.h	/^	void			(*disconnect)(struct usb_composite_dev *);$/;"	m	struct:usb_composite_driver	typeref:typename:void (*)(struct usb_composite_dev *)
disconnect	include/linux/usb/gadget.h	/^	void			(*disconnect)(struct usb_gadget *);$/;"	m	struct:usb_gadget_driver	typeref:typename:void (*)(struct usb_gadget *)
disconnect_from_pc	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	disconnect_from_pc(/;"	d
disfc	include/commproc.h	/^	ushort	disfc;		\/* discarded frame counter *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
disk_child	fs/reiserfs/reiserfs_private.h	/^struct disk_child {$/;"	s
disk_guid	include/part_efi.h	/^	efi_guid_t disk_guid;$/;"	m	struct:_gpt_header	typeref:typename:efi_guid_t
disk_partition	include/part.h	/^typedef struct disk_partition {$/;"	s
disk_partition_t	include/part.h	/^} disk_partition_t;$/;"	t	typeref:struct:disk_partition
disk_product	disk/part_amiga.h	/^    char disk_product[16];$/;"	m	struct:rigid_disk_block	typeref:typename:char[16]
disk_read	fs/fat/fat.c	/^static int disk_read(__u32 block, __u32 nr_blocks, void *buf)$/;"	f	typeref:typename:int	file:
disk_revision	disk/part_amiga.h	/^    char disk_revision[4];$/;"	m	struct:rigid_disk_block	typeref:typename:char[4]
disk_vendor	disk/part_amiga.h	/^    char disk_vendor[8];$/;"	m	struct:rigid_disk_block	typeref:typename:char[8]
disk_write	fs/fat/fat_write.c	/^static int disk_write(__u32 block, __u32 nr_blocks, void *buf)$/;"	f	typeref:typename:int	file:
disp	arch/arm/include/asm/arch-tegra/dc.h	/^	struct dc_disp_reg disp;	\/* DISP register 0x400 ~ 0x4e4 *\/$/;"	m	struct:dc_ctlr	typeref:struct:dc_disp_reg
disp	drivers/video/tegra.c	/^	struct disp_ctlr *disp;		\/* Display controller to use *\/$/;"	m	struct:tegra_lcd_priv	typeref:struct:disp_ctlr *	file:
disp1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
disp1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
disp1_default	arch/arm/mach-tegra/tegra20/funcmux.c	/^static const struct pmux_pingrp_config disp1_default[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]	file:
disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
disp1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
disp1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
disp1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	disp1_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
disp1blk_cfg	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	disp1blk_cfg;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
disp2_merge_cntl	drivers/video/ati_radeon_fb.h	/^	u32		disp2_merge_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
disp2blk_cfg	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	disp2blk_cfg;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
disp_active	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_active;		\/* _DISP_DISP_ACTIVE_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_alt	drivers/video/ipu_regs.h	/^	u32 disp_alt[4];$/;"	m	struct:ipu_cm	typeref:typename:u32[4]
disp_alt_conf	drivers/video/ipu_regs.h	/^	u32 disp_alt_conf;$/;"	m	struct:ipu_cm	typeref:typename:u32
disp_bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 disp_bwcr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
disp_bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 disp_bwcr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
disp_clk	arch/arm/dts/am43xx-clocks.dtsi	/^	disp_clk: disp_clk {$/;"	l
disp_clk_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_clk_ctrl;		\/* _DISP_DISP_CLOCK_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_cmd	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_cmd;			\/* _CMD_DISPLAY_COMMAND_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
disp_cmd_opt0	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_cmd_opt0;		\/* _CMD_DISPLAY_COMMAND_OPTION0_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
disp_color_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_color_ctrl;		\/* _DISP_DISP_COLOR_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_conf1	drivers/video/ipu_regs.h	/^	u32 disp_conf1[4];$/;"	m	struct:ipu_dc	typeref:typename:u32[4]
disp_conf2	drivers/video/ipu_regs.h	/^	u32 disp_conf2[4];$/;"	m	struct:ipu_dc	typeref:typename:u32[4]
disp_ctl_win	arch/arm/include/asm/arch-tegra20/display.h	/^struct disp_ctl_win {$/;"	s
disp_gen	drivers/video/ipu_regs.h	/^	u32 disp_gen;$/;"	m	struct:ipu_cm	typeref:typename:u32
disp_hw_debug	drivers/video/ati_radeon_fb.h	/^	u32		disp_hw_debug;$/;"	m	struct:radeon_regs	typeref:typename:u32
disp_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^	struct edp_disp_info disp_info;$/;"	m	struct:exynos_dp_priv	typeref:struct:edp_disp_info
disp_interface_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_interface_ctrl;	\/* _DISP_DISP_INTERFACE_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_merge_cntl	drivers/video/ati_radeon_fb.h	/^	u32		disp_merge_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
disp_misc_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_misc_ctrl;		\/* _DISP_DISP_MISC_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_name	board/siemens/common/factoryset.h	/^	unsigned char disp_name[MAX_STRING_LENGTH];$/;"	m	struct:factorysetcontainer	typeref:typename:unsigned char[]
disp_output_cntl	drivers/video/ati_radeon_fb.h	/^	u32		disp_output_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
disp_panel	board/davinci/ea20/ea20.c	/^static const struct display_panel disp_panel = {$/;"	v	typeref:typename:const struct display_panel	file:
disp_panel	board/siemens/pxm2/board.c	/^static const struct display_panel disp_panel = {$/;"	v	typeref:typename:const struct display_panel	file:
disp_panels	board/siemens/rut/board.c	/^static const struct display_panel disp_panels[] = {$/;"	v	typeref:typename:const struct display_panel[]	file:
disp_pow_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_pow_ctrl;		\/* _CMD_DISPLAY_POWER_CONTROL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
disp_signal_opt0	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_signal_opt0;		\/* _DISP_DISP_SIGNAL_OPTIONS0_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_signal_opt1	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_signal_opt1;		\/* _DISP_DISP_SIGNAL_OPTIONS1_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_size	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 disp_size;			\/* 0x808 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
disp_size	arch/arm/include/asm/arch/display.h	/^	u32 disp_size;			\/* 0x808 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
disp_size	drivers/video/fsl_dcu_fb.c	/^	u32 disp_size;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
disp_size	drivers/video/fsl_diu_fb.c	/^	__be32 disp_size;$/;"	m	struct:diu	typeref:typename:__be32	file:
disp_task_stat	drivers/video/ipu_regs.h	/^	u32 disp_task_stat;$/;"	m	struct:ipu_stat	typeref:typename:u32
disp_timing_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_timing_opt;		\/* _DISP_DISP_TIMING_OPTIONS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
disp_win_header	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_win_header;		\/* _CMD_DISPLAY_WINDOW_HEADER_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
disp_win_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint disp_win_opt;		\/* _DISP_DISP_WIN_OPTIONS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
dispc	arch/arm/dts/am4372.dtsi	/^			dispc: dispc@4832a400 {$/;"	l	label:dss
dispc_regs	arch/arm/include/asm/arch-omap3/dss.h	/^struct dispc_regs {$/;"	s
dispfunc_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 dispfunc_params_sn04[]	= {0x22, 0xe2, 0xFF, 0x04};$/;"	v	typeref:typename:u16[]	file:
dispfunc_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 dispfunc_params_sn20[]	= {0xa0};$/;"	v	typeref:typename:u16[]	file:
dispinv_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 dispinv_params_sn04[]	= {0x02};$/;"	v	typeref:typename:u16[]	file:
dispinv_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 dispinv_params_sn20[]	= {0x00, 0x00, 0x00};$/;"	v	typeref:typename:u16[]	file:
display0	arch/arm/dts/imx6ull-14x14-evk.dts	/^	display0: display {$/;"	l
display_board_info	board/samsung/common/misc.c	/^static void display_board_info(void)$/;"	f	typeref:typename:void	file:
display_buf	board/a4m072/a4m072.c	/^static u8 display_buf[DISPLAY_BUF_SIZE];$/;"	v	typeref:typename:u8[]	file:
display_bwidth	drivers/video/bus_vcxk.c	/^u_long display_bwidth;$/;"	v	typeref:typename:u_long
display_char2seg7	board/a4m072/a4m072.c	/^static u8 display_char2seg7(char c)$/;"	f	typeref:typename:u8	file:
display_char2seg7_tbl	board/a4m072/a4m072.c	/^static u8 display_char2seg7_tbl[]=$/;"	v	typeref:typename:u8[]	file:
display_clear	api/api_display.c	/^void display_clear(void)$/;"	f	typeref:typename:void
display_count	board/advantech/dms-ba16/dms-ba16.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/aristainetos/aristainetos.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/boundary/nitrogen6x/nitrogen6x.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/embest/mx6boards/mx6boards.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/freescale/mx6sabresd/mx6sabresd.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/gateworks/gw_ventana/gw_ventana.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/ge/bx50v3/bx50v3.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/kosagi/novena/video.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/tbs/tbs2910/tbs2910.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_count	board/wandboard/wandboard.c	/^size_t display_count = ARRAY_SIZE(displays);$/;"	v	typeref:typename:size_t
display_ctrl	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	display_ctrl;$/;"	m	struct:exynos4_sysreg	typeref:typename:unsigned int
display_ctrl2	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	display_ctrl2;$/;"	m	struct:exynos4_sysreg	typeref:typename:unsigned int
display_download_menu	board/samsung/common/misc.c	/^static void display_download_menu(int mode)$/;"	f	typeref:typename:void	file:
display_draw_bitmap	api/api_display.c	/^int display_draw_bitmap(ulong bitmap, int x, int y)$/;"	f	typeref:typename:int
display_enable	drivers/video/display-uclass.c	/^int display_enable(struct udevice *dev, int panel_bpp,$/;"	f	typeref:typename:int
display_event	arch/arm/imx-common/hab.c	/^void display_event(uint8_t *event_data, size_t bytes)$/;"	f	typeref:typename:void
display_fdt_by_regions	tools/fdtgrep.c	/^static int display_fdt_by_regions(struct display_info *disp, const void *blob,$/;"	f	typeref:typename:int	file:
display_flags	include/fdtdec.h	/^enum display_flags {$/;"	g
display_flush	board/a4m072/a4m072.c	/^static inline void display_flush(void)$/;"	f	typeref:typename:void	file:
display_get_info	api/api_display.c	/^int display_get_info(int type, struct display_info *di)$/;"	f	typeref:typename:int
display_get_ops	include/display.h	/^#define display_get_ops(/;"	d
display_global_data	arch/blackfin/cpu/cpu.c	/^static void display_global_data(void)$/;"	f	typeref:typename:void	file:
display_height	board/BuS/eb_cpu5282/eb_cpu5282.c	/^unsigned long display_height;$/;"	v	typeref:typename:unsigned long
display_height	drivers/video/bus_vcxk.c	/^u_long display_height;$/;"	v	typeref:typename:u_long
display_info	include/api_public.h	/^struct display_info {$/;"	s
display_info	tools/fdtgrep.c	/^struct display_info {$/;"	s	file:
display_info_t	arch/arm/include/asm/imx-common/video.h	/^struct display_info_t {$/;"	s
display_info_t	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^struct display_info_t {$/;"	s	file:
display_init	drivers/video/tegra124/display.c	/^static int display_init(struct udevice *dev, void *lcdbase,$/;"	f	typeref:typename:int	file:
display_int_status	common/usb_storage.c	/^static void display_int_status(unsigned long tmp)$/;"	f	typeref:typename:void	file:
display_list	scripts/kconfig/gconf.c	/^static void display_list(void)$/;"	f	typeref:typename:void	file:
display_mux_pins	arch/arm/dts/am43x-epos-evm.dts	/^		display_mux_pins: display_mux_pins {$/;"	l
display_new_sp	common/board_f.c	/^static int display_new_sp(void)$/;"	f	typeref:typename:int	file:
display_options	lib/display_options.c	/^int display_options (void)$/;"	f	typeref:typename:int
display_out_pos	board/a4m072/a4m072.c	/^static u8 display_out_pos;$/;"	v	typeref:typename:u8	file:
display_pads	board/aristainetos/aristainetos-v1.c	/^static iomux_v3_cfg_t const display_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
display_pads	board/aristainetos/aristainetos-v2.c	/^static iomux_v3_cfg_t const display_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
display_panel	drivers/video/da8xx-fb.h	/^struct display_panel {$/;"	s
display_pci_regs	board/mpl/pati/cmd_pati.c	/^static void display_pci_regs(void)$/;"	f	typeref:typename:void	file:
display_plat	include/display.h	/^struct display_plat {$/;"	s
display_progress	tools/mxsimage.c	/^	unsigned int			display_progress:1;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int:1	file:
display_putc	board/a4m072/a4m072.c	/^int display_putc(char c)$/;"	f	typeref:typename:int
display_putc	drivers/misc/pdsp188x.c	/^int display_putc(char c)$/;"	f	typeref:typename:int
display_putc_pos	board/a4m072/a4m072.c	/^static u8 display_putc_pos;$/;"	v	typeref:typename:u8	file:
display_read_edid	drivers/video/display-uclass.c	/^int display_read_edid(struct udevice *dev, u8 *buf, int buf_size)$/;"	f	typeref:typename:int
display_read_timing	drivers/video/display-uclass.c	/^int display_read_timing(struct udevice *dev, struct display_timing *timing)$/;"	f	typeref:typename:int
display_rle8_bitmap	drivers/video/cfb_console.c	/^static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff,$/;"	f	typeref:typename:int	file:
display_sdram_details	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void display_sdram_details(u32 emif_nr, u32 cs,$/;"	f	typeref:typename:void	file:
display_set	board/a4m072/a4m072.c	/^void display_set(int cmd) {$/;"	f	typeref:typename:void
display_set	drivers/misc/pdsp188x.c	/^void display_set(int cmd)$/;"	f	typeref:typename:void
display_sysid	drivers/misc/altera_sysid.c	/^void display_sysid(void)$/;"	f	typeref:typename:void
display_text_info	common/board_f.c	/^static int display_text_info(void)$/;"	f	typeref:typename:int	file:
display_timing	include/fdtdec.h	/^struct display_timing {$/;"	s
display_tree	scripts/kconfig/gconf.c	/^static void display_tree(struct menu *menu)$/;"	f	typeref:typename:void	file:
display_tree_part	scripts/kconfig/gconf.c	/^static void display_tree_part(void)$/;"	f	typeref:typename:void	file:
display_type	board/compulab/common/omap3_display.c	/^enum display_type {$/;"	g	file:
display_type	include/vbe.h	/^	u8 display_type;	\/* 0=NONE, 1= analog, 2=digital *\/$/;"	m	struct:vbe_screen_info	typeref:typename:u8
display_ubi_info	cmd/ubi.c	/^static void display_ubi_info(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
display_update_config_from_edid	drivers/video/tegra124/display.c	/^static int display_update_config_from_edid(struct udevice *dp_dev,$/;"	f	typeref:typename:int	file:
display_volume_info	cmd/ubi.c	/^static void display_volume_info(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
display_width	board/BuS/eb_cpu5282/eb_cpu5282.c	/^unsigned long display_width;$/;"	v	typeref:typename:unsigned long
display_width	drivers/video/bus_vcxk.c	/^u_long display_width;$/;"	v	typeref:typename:u_long
displays	board/advantech/dms-ba16/dms-ba16.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/aristainetos/aristainetos.c	/^struct display_info_t const displays[] = {$/;"	v	typeref:struct:display_info_t const[]
displays	board/boundary/nitrogen6x/nitrogen6x.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static struct display_info_t const displays[] = {$/;"	v	typeref:struct:display_info_t const[]	file:
displays	board/embest/mx6boards/mx6boards.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/freescale/mx6sabresd/mx6sabresd.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/gateworks/gw_ventana/gw_ventana.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/ge/bx50v3/bx50v3.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/kosagi/novena/video.c	/^struct display_info_t const displays[] = {$/;"	v	typeref:struct:display_info_t const[]
displays	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^struct display_info_t const displays[] = {$/;"	v	typeref:struct:display_info_t const[]
displays	board/tbs/tbs2910/tbs2910.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
displays	board/wandboard/wandboard.c	/^struct display_info_t const displays[] = {{$/;"	v	typeref:struct:display_info_t const[]
disppc	common/bedbug.c	/^int disppc (unsigned char *memaddr, unsigned char *virtual, int num_instr,$/;"	f	typeref:typename:int
disrc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	disrc;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
disrcc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	disrcc;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
distance	include/jffs2/mini_inflate.h	/^	struct huffman_set distance;$/;"	m	struct:bitstream	typeref:struct:huffman_set
distance_count	include/jffs2/mini_inflate.h	/^	int  distance_count[16];$/;"	m	struct:bitstream	typeref:typename:int[16]
distance_first	include/jffs2/mini_inflate.h	/^	int  distance_first[16];$/;"	m	struct:bitstream	typeref:typename:int[16]
distance_lengths	include/jffs2/mini_inflate.h	/^	int  distance_lengths[32];$/;"	m	struct:bitstream	typeref:typename:int[32]
distance_pos	include/jffs2/mini_inflate.h	/^	int  distance_pos[16];$/;"	m	struct:bitstream	typeref:typename:int[16]
distance_symbols	include/jffs2/mini_inflate.h	/^	int  distance_symbols[32];$/;"	m	struct:bitstream	typeref:typename:int[32]
distbits	lib/zlib/inflate.h	/^    unsigned distbits;          \/* index bits for distcode *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
distclean	Makefile	/^distclean: mrproper$/;"	t
distcode	lib/zlib/inflate.h	/^    code const FAR *distcode;   \/* starting table for distance codes *\/$/;"	m	struct:inflate_state	typeref:typename:code const FAR *
distfix	lib/zlib/inffixed.h	/^    static const code distfix[32] = {$/;"	v	typeref:typename:const code[32]
dithmode	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dithmode;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
dithmode	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int dithmode;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
diu	arch/powerpc/include/asm/immap_512x.h	/^	diu512x_t		diu;		\/* Display Interface Unit *\/$/;"	m	struct:immap	typeref:typename:diu512x_t
diu	drivers/video/fsl_diu_fb.c	/^struct diu {$/;"	s	file:
diu512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct diu512x {$/;"	s
diu512x_t	arch/powerpc/include/asm/immap_512x.h	/^} diu512x_t;$/;"	t	typeref:struct:diu512x
diu_ad	drivers/video/fsl_diu_fb.c	/^struct diu_ad {$/;"	s	file:
diu_addr	drivers/video/fsl_diu_fb.c	/^struct diu_addr {$/;"	s	file:
diu_mode	drivers/video/fsl_diu_fb.c	/^	__be32 diu_mode;$/;"	m	struct:diu	typeref:typename:__be32	file:
diu_set_dvi_encoder	board/freescale/common/diu_ch7301.c	/^int diu_set_dvi_encoder(unsigned int pixclock)$/;"	f	typeref:typename:int
diu_set_pixel_clock	arch/powerpc/cpu/mpc512x/diu.c	/^void diu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:void
diu_set_pixel_clock	board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c	/^void diu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:void
diu_set_pixel_clock	board/freescale/p1022ds/diu.c	/^void diu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:void
diu_set_pixel_clock	board/freescale/t1040qds/diu.c	/^void diu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:void
diu_set_pixel_clock	board/freescale/t104xrdb/diu.c	/^void diu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:void
diu_set_pixel_clock	board/gdsys/p1022/diu.c	/^void diu_set_pixel_clock(unsigned int pixclock)$/;"	f	typeref:typename:void
div	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_div div;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_div
div	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long div;$/;"	m	struct:clk	typeref:typename:unsigned long
div	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_div div;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_div
div	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long div;$/;"	m	struct:clk	typeref:typename:unsigned long
div	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 div;		\/* 0x8c *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
div	arch/arm/include/asm/arch/timer.h	/^	u32 div;		\/* 0x8c *\/$/;"	m	struct:sunxi_avs	typeref:typename:u32
div	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	div;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
div	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	div[4];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[4]	file:
div	drivers/rtc/ftrtc010.c	/^	unsigned int div;		\/* 0x38 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
div	include/dwmmc.h	/^	unsigned int div;$/;"	m	struct:dwmci_host	typeref:typename:unsigned int
div0	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div0;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
div0	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div0;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
div1	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div1;		\/* 18 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div1;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
div1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div1;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
div10	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div10;		\/* 78 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div11	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div11;		\/* 7c *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div12	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div12;		\/* 80 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div16	drivers/spi/fsl_espi.c	/^	unsigned int	div16;$/;"	m	struct:fsl_spi_slave	typeref:typename:unsigned int	file:
div2	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div2;		\/* 1c *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div2	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div2;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
div2	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div2;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
div2_ratio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_ratio;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div2_ratio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_ratio;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div2_ratio0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_ratio0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div2_ratio1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_ratio1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div2_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_stat;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div2_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_stat;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div2_stat0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_stat0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div2_stat1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div2_stat1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div3	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div3;		\/* 20 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div3	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div3;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
div3	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div3;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
div4	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div4;		\/* 60 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div4	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div4;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
div4	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	div4;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
div4_ratio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div4_ratio;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div4_stat	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div4_stat;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div5	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div5;		\/* 64 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div6	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div6;		\/* 68 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div6	arch/sh/lib/udivsi3_i4i-Os.S	/^div6:$/;"	l
div64_u64	include/linux/math64.h	/^static inline u64 div64_u64(u64 dividend, u64 divisor)$/;"	f	typeref:typename:u64
div7	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div7;		\/* 6c *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div7	arch/sh/lib/udivsi3.S	/^div7:$/;"	l
div7	arch/sh/lib/udivsi3_i4i-Os.S	/^div7:$/;"	l
div8	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div8;		\/* 70 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div8	arch/sh/lib/udivsi3.S	/^div8:$/;"	l
div9	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	div9;		\/* 74 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
div_acp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_acp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_bit	arch/arm/mach-exynos/clock.c	/^	int8_t div_bit;$/;"	m	struct:clk_bit_info	typeref:typename:int8_t	file:
div_by_1	arch/sh/lib/udivsi3_i4i.S	/^div_by_1:$/;"	l
div_by_1_neg	arch/sh/lib/udivsi3_i4i.S	/^div_by_1_neg:$/;"	l
div_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^void div_byte(u8 s)$/;"	f	typeref:typename:void
div_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cam;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cam;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_cam1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cam1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cdrex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_cdrex0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cdrex0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_cdrex1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cdrex1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 div_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
div_cfg	arch/arm/include/asm/arch/display2.h	/^	u32 div_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
div_clock	board/armltd/integrator/timer.c	/^static unsigned long long div_clock = DIV_CLOCK_INIT;$/;"	v	typeref:typename:unsigned long long	file:
div_cmu_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cmu_isp0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_cmu_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cmu_isp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_core0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_core0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_core1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_core1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_core_25m_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	div_core_25m_ck: div_core_25m_ck {$/;"	l
div_cperi1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cperi1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu0;		\/* 0x10010500 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_cpu1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_disp10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_disp10;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_disp1_0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_disp1_0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_dmc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_dmc0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_dmc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_dmc0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_dmc1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_dmc1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_dmc1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_dmc1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_fsys3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_fsys3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_fsys3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_g2d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_g2d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_g3d;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_g3d;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_ge64k	arch/sh/lib/udivsi3_i4i.S	/^div_ge64k:$/;"	l
div_ge64k_2	arch/sh/lib/udivsi3_i4i.S	/^div_ge64k_2:$/;"	l
div_ge64k_end	arch/sh/lib/udivsi3_i4i.S	/^div_ge64k_end:$/;"	l
div_ge64k_neg	arch/sh/lib/udivsi3_i4i.S	/^div_ge64k_neg:$/;"	l
div_ge64k_neg_end	arch/sh/lib/udivsi3_i4i.S	/^div_ge64k_neg_end:$/;"	l
div_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_gen;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_gscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_gscl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l4;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l4;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l4;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l5;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l5;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l5;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l6;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l6;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l6;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l7;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l7;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l7;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_iem_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l8;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_iem_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l8;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_iem_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_iem_l8;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_image	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_image;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_isp2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp2;		\/* 0x1001c308 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_isp2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_isp2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_kfc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_kfc0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_lcd	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_lcd;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_lcd0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_lcd0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_lcd1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_lcd1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_le128	arch/sh/lib/udivsi3_i4i.S	/^div_le128:$/;"	l
div_le128_2	arch/sh/lib/udivsi3_i4i.S	/^div_le128_2:$/;"	l
div_le128_neg	arch/sh/lib/udivsi3_i4i.S	/^div_le128_neg:$/;"	l
div_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_leftbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_leftbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_lex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_lex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_long	drivers/bios_emulator/x86emu/prim_ops.c	/^void div_long(u32 s)$/;"	f	typeref:typename:void
div_mask	arch/arm/mach-exynos/clock.c	/^	int32_t div_mask;$/;"	m	struct:clk_bit_info	typeref:typename:int32_t	file:
div_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_mau;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_mau;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_maudio;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_maudio;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_mfc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_mfc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_out	lib/tiny-printf.c	/^static void div_out(struct printf_info *info, unsigned int *num,$/;"	f	typeref:typename:void	file:
div_peric	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	div_peric[5];$/;"	m	struct:exynos7420_clk_cmu_top0	typeref:typename:unsigned int[5]	file:
div_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_peric2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_peric2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_peric3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_peric3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_peric4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric4;		\/* 0x10020568 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_peric4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric4;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_peric5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peric5;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_peril2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_peril2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_peril3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_peril3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_peril4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril4;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_peril4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril4;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_peril5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril5;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_peril5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_peril5;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_r0x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_r0x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_r1x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_r1x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_r8	arch/sh/lib/udivsi3_i4i.S	/^div_r8:$/;"	l
div_r8_2	arch/sh/lib/udivsi3_i4i.S	/^div_r8_2:$/;"	l
div_r8_neg	arch/sh/lib/udivsi3_i4i.S	/^div_r8_neg:$/;"	l
div_r8_neg_end	arch/sh/lib/udivsi3_i4i.S	/^div_r8_neg_end:$/;"	l
div_ratio	drivers/video/fsl_dcu_fb.c	/^	u32 div_ratio;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
div_ratio1to1	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u8 div_ratio1to1[CLK_VCO][CLK_DDR] =$/;"	v	typeref:typename:u8[][]
div_ratio2to1	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u8 div_ratio2to1[CLK_VCO][CLK_DDR] =$/;"	v	typeref:typename:u8[][]
div_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_rightbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_rightbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_round_up	arch/arm/include/asm/arch-omap5/sys_proto.h	/^static inline u32 div_round_up(u32 num, u32 den)$/;"	f	typeref:typename:u32
div_s64	include/linux/math64.h	/^static inline s64 div_s64(s64 dividend, s32 divisor)$/;"	f	typeref:typename:s64
div_s64_rem	include/linux/math64.h	/^static inline s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder)$/;"	f	typeref:typename:s64
div_stat_acp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_acp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cam;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cam;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_cam1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cam1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cdrex;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cdrex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_cmu_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cmu_isp0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_cmu_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cmu_isp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_core0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_core0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_core1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_core1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_cperi1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cperi1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_cpu0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_cpu1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_cpu1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_disp10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_disp10;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_disp1_0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_disp1_0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_dmc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_dmc0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_dmc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_dmc0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_dmc1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_dmc1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_dmc1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_dmc1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_fsys3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_fsys3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_fsys3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_g2d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_g2d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_g3d;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_g3d;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_gen;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_gscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_gscl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_image	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_image;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_isp2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_isp2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_isp2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_kfc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_kfc0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_lcd	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_lcd;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_lcd0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_lcd0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_lcd1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_lcd1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_leftbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_leftbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_lex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_lex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_mau;		\/* 0x10020644 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_mau;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_maudio;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_maudio;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_mfc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_mfc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_peric2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_peric2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_peric3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_peric3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_peric4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_peric4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric4;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_peric5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peric5;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_peril2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril2;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_peril2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_peril3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril3;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_peril3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril3;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_peril4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril4;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_peril4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril4;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_peril5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril5;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_peril5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_peril5;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_r0x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_r0x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_r1x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_r1x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_rightbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_rightbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_syslft	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_syslft;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_sysrgt	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_sysrgt;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_stat_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_stat_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_top2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_stat_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_tv;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_stat_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_stat_tv;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_syslft	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_syslft;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_sysrgt	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_sysrgt;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_table_clz	arch/sh/lib/udivsi3_i4i.S	/^div_table_clz:$/;"	l
div_table_inv	arch/sh/lib/udivsi3_i4i.S	/^div_table_inv:$/;"	l
div_table_ix	arch/sh/lib/udivsi3_i4i.S	/^div_table_ix:$/;"	l
div_timer	board/armltd/integrator/timer.c	/^static unsigned long long div_timer = 1; \/* Divisor to convert timer reading$/;"	v	typeref:typename:unsigned long long	file:
div_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top0;		\/* 0x10020500 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
div_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_top2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
div_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_tv;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
div_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	div_tv;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
div_u64	include/linux/math64.h	/^static inline u64 div_u64(u64 dividend, u32 divisor)$/;"	f	typeref:typename:u64
div_u64_rem	include/linux/math64.h	/^static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)$/;"	f	typeref:typename:u64
div_word	drivers/bios_emulator/x86emu/prim_ops.c	/^void div_word(u16 s)$/;"	f	typeref:typename:void
divert	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	divert;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
divide	arch/powerpc/include/asm/immap_512x.h	/^	u32 divide;		\/* IIM divide factor register *\/$/;"	m	struct:iim512x	typeref:typename:u32
divide_factor	arch/arm/include/asm/arch-omap5/omap.h	/^	s8 divide_factor;$/;"	m	struct:srcomp_params	typeref:typename:s8
divider	drivers/i2c/fsl_i2c.c	/^	unsigned short divider;$/;"	m	struct:__anon2b7522730108	typeref:typename:unsigned short	file:
divider_exists	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define divider_exists(/;"	d
divider_exists	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define divider_exists(/;"	d
divider_has_fraction	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define divider_has_fraction(/;"	d
divider_has_fraction	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define divider_has_fraction(/;"	d
divider_is_fixed	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define divider_is_fixed(/;"	d
divider_is_fixed	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define divider_is_fixed(/;"	d
divisor	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 divisor;				\/* 0x70 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
divisor	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 divisor;$/;"	m	struct:panel_config	typeref:typename:u32
divisor	drivers/serial/altera_uart.c	/^	u32	divisor;	\/* Baud rate divisor reg *\/$/;"	m	struct:altera_uart_regs	typeref:typename:u32	file:
divm	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 divm:5;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:5
divm2dpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dpllddr;	\/* offset 0x5B0 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dpllddr;	\/* offset 0xA0 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dplldisp	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dplldisp;	\/* offset 0x630 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dplldisp	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dplldisp;	\/* offset 0xA4 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dpllmpu;	\/* offset 0x570 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dpllmpu;	\/* offset 0xA8 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dpllper;	\/* offset 0x5F0 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm2dpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm2dpllper;	\/* offset 0xAC *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm4dpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm4dpllcore;	\/* offset 0x538 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm4dpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm4dpllcore;	\/* offset 0x80 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm5dpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm5dpllcore;	\/* offset 0x53C *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm5dpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm5dpllcore;	\/* offset 0x84 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm6dpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm6dpllcore;	\/* offset 0x540 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divm6dpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int divm6dpllcore;	\/* offset 0xD8 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
divn	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 divn:10;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:10
divn_val	board/ti/ks2_evm/board_k2e.c	/^s16 divn_val[16] = {$/;"	v	typeref:typename:s16[16]
divn_val	board/ti/ks2_evm/board_k2g.c	/^s16 divn_val[16] = {$/;"	v	typeref:typename:s16[16]
divn_val	board/ti/ks2_evm/board_k2hk.c	/^s16 divn_val[16] = {$/;"	v	typeref:typename:s16[16]
divn_val	board/ti/ks2_evm/board_k2l.c	/^s16 divn_val[16] = {$/;"	v	typeref:typename:s16[16]
divp	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 divp:3;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:3
divx3	arch/sh/lib/udivsi3_i4i-Os.S	/^divx3:$/;"	l
divx4	arch/sh/lib/udivsi3.S	/^divx4:$/;"	l
dl	drivers/bios_emulator/include/biosemu.h	/^	u8 dh, dl;$/;"	m	struct:__anon964d10140508	typeref:typename:u8
dl	drivers/bios_emulator/include/biosemu.h	/^	u8 dl;$/;"	m	struct:__anon964d10140608	typeref:typename:u8
dl	lib/zlib/deflate.h	/^    } dl;$/;"	m	struct:ct_data_s	typeref:union:ct_data_s::__anonaf16f3d6020a
dl_done_list	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int dl_done_list (ohci_t *ohci, td_t *td_list)$/;"	f	typeref:typename:int	file:
dl_done_list	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int dl_done_list (ohci_t *ohci, td_t *td_list)$/;"	f	typeref:typename:int	file:
dl_done_list	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int dl_done_list (ohci_t *ohci, td_t *td_list)$/;"	f	typeref:typename:int	file:
dl_done_list	drivers/usb/host/ohci-hcd.c	/^static int dl_done_list(ohci_t *ohci)$/;"	f	typeref:typename:int	file:
dl_done_list	drivers/usb/host/ohci-s3c24xx.c	/^static int dl_done_list(struct ohci *ohci, struct td *td_list)$/;"	f	typeref:typename:int	file:
dl_reverse_done_list	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static td_t * dl_reverse_done_list (ohci_t *ohci)$/;"	f	typeref:typename:td_t *	file:
dl_reverse_done_list	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static td_t * dl_reverse_done_list (ohci_t *ohci)$/;"	f	typeref:typename:td_t *	file:
dl_reverse_done_list	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static td_t * dl_reverse_done_list (ohci_t *ohci)$/;"	f	typeref:typename:td_t *	file:
dl_reverse_done_list	drivers/usb/host/ohci-hcd.c	/^static td_t *dl_reverse_done_list(ohci_t *ohci)$/;"	f	typeref:typename:td_t *	file:
dl_reverse_done_list	drivers/usb/host/ohci-s3c24xx.c	/^static struct td *dl_reverse_done_list(struct ohci *ohci)$/;"	f	typeref:struct:td *	file:
dl_transfer_length	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void dl_transfer_length(td_t * td)$/;"	f	typeref:typename:void	file:
dl_transfer_length	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void dl_transfer_length(td_t * td)$/;"	f	typeref:typename:void	file:
dl_transfer_length	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void dl_transfer_length(td_t * td)$/;"	f	typeref:typename:void	file:
dl_transfer_length	drivers/usb/host/ohci-hcd.c	/^static void dl_transfer_length(td_t *td)$/;"	f	typeref:typename:void	file:
dl_transfer_length	drivers/usb/host/ohci-s3c24xx.c	/^static void dl_transfer_length(struct td *td)$/;"	f	typeref:typename:void	file:
dla	include/universe.h	/^	unsigned int dla;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
dlast_sga	arch/m68k/include/asm/coldfire/edma.h	/^	u32 dlast_sga;		\/* 0x18 Last Dest Adr Adj\/Scatter Gather Adr *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u32
dlb_config	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^struct dlb_config {$/;"	s
dlba	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 dlba;		\/* 0x84 internal DMA descr list base address *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
dlba	arch/arm/include/asm/arch/mmc.h	/^	u32 dlba;		\/* 0x84 internal DMA descr list base address *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
dlen	include/pci_rom.h	/^	uint16_t dlen;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
dlf	include/ata.h	/^	unsigned short	dlf;		\/* device lock function$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
dlg	scripts/kconfig/lxdialog/util.c	/^struct dialog_info dlg;$/;"	v	typeref:struct:dialog_info
dlh	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	dlh;$/;"	m	union:pxa_uart_regs::__anon3c298eb7020a	typeref:typename:uint32_t
dlh	arch/blackfin/include/asm/serial1.h	/^	u16 dlh;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
dliodn	arch/powerpc/include/asm/fsl_portals.h	/^	u16	dliodn;	\/* DQRR LIODN *\/$/;"	m	struct:qportal_info	typeref:typename:u16
dll	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	dll;$/;"	m	union:pxa_uart_regs::__anon3c298eb7010a	typeref:typename:uint32_t
dll	arch/blackfin/include/asm/serial1.h	/^	u16 dll;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
dll	include/ns16550.h	/^#define dll /;"	d
dll_aging_clk_div	arch/arm/dts/am43xx-clocks.dtsi	/^	dll_aging_clk_div: dll_aging_clk_div {$/;"	l
dll_chain_length	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dll_chain_length;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dll_con	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dll_con[4];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[4]
dll_ddr	arch/powerpc/include/asm/immap_83xx.h	/^	u8			dll_ddr[0x100];$/;"	m	struct:immap	typeref:typename:u8[0x100]
dll_lbc	arch/powerpc/include/asm/immap_83xx.h	/^	u8			dll_lbc[0x100];$/;"	m	struct:immap	typeref:typename:u8[0x100]
dll_on	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned dll_on;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dll_recalib	drivers/ddr/microchip/ddr2_regs.h	/^	u32 dll_recalib;$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32
dll_resync	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned dll_resync;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dll_status	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dll_status[4];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[4]
dlla_ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 dlla_ctrl;		\/* 0x60 *\/$/;"	m	struct:sdrc	typeref:typename:u32
dlla_status	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 dlla_status;	\/* 0x64 *\/$/;"	m	struct:sdrc	typeref:typename:u32
dllb_ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 dllb_ctrl;		\/* 0x68 *\/$/;"	m	struct:sdrc	typeref:typename:u32
dllb_status	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 dllb_status;	\/* 0x6C *\/$/;"	m	struct:sdrc	typeref:typename:u32
dllcnt0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dllcnt0; \/* 0x354 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dllcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dllcr[5];		\/* 0x204 dll control register 0(byte 0) *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32[5]
dllcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dllcr[5];		\/* 0x204 dll control register 0(byte 0) *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32[5]
dllcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dllcr[10];	\/* DLL Control *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[10]
dllctr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dllctr;		\/* 0x200 dll control register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dllctr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dllctr;		\/* 0x200 dll control register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dllctrl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dllctrl;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
dllctrl	drivers/mmc/fsl_esdhc.c	/^	uint    dllctrl;$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
dllgcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dllgcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dllgcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dllgcr;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dllgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dllgcr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dllgcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dllgcr;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dllgcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dllgcr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dllstat	drivers/mmc/fsl_esdhc.c	/^	uint    dllstat;$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
dlm	include/ns16550.h	/^#define dlm /;"	d
dlr	drivers/serial/serial_uniphier.c	/^	u32 dlr;		\/* Divisor Latch Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
dlr	include/faraday/ftsdc010.h	/^	unsigned int	dlr;		\/* 0x24 - data length reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
dlr	include/mpc5xxx.h	/^	volatile u8  dlr;               \/* 0x18 *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u8
dlv	include/tsi148.h	/^	unsigned int dlv;    \/* PCI Address         *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dlv	include/universe.h	/^	unsigned int dlv;    \/* PCI Address         *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dly	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dly[5];$/;"	m	struct:esdc_regs	typeref:typename:u32[5]
dlycfg0	drivers/ddr/microchip/ddr2_regs.h	/^	u32 dlycfg0;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
dlycfg1	drivers/ddr/microchip/ddr2_regs.h	/^	u32 dlycfg1;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
dlycfg2	drivers/ddr/microchip/ddr2_regs.h	/^	u32 dlycfg2;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
dlycfg3	drivers/ddr/microchip/ddr2_regs.h	/^	u32 dlycfg3;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
dlyl	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dlyl;$/;"	m	struct:esdc_regs	typeref:typename:u32
dlyr	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 dlyr;		\/* 0x04 Delay *\/$/;"	m	struct:qspi_ctrl	typeref:typename:u16
dm365_ddr_setup	arch/arm/mach-davinci/dm365_lowlevel.c	/^int dm365_ddr_setup(void)$/;"	f	typeref:typename:int
dm365_emif_init	arch/arm/mach-davinci/dm365_lowlevel.c	/^static void dm365_emif_init(void)$/;"	f	typeref:typename:void	file:
dm365_pinmux_ctl	arch/arm/mach-davinci/dm365_lowlevel.c	/^void dm365_pinmux_ctl(unsigned long offset, unsigned long mask,$/;"	f	typeref:typename:void
dm365_pll1_init	arch/arm/mach-davinci/dm365_lowlevel.c	/^int dm365_pll1_init(unsigned long pllmult, unsigned long prediv)$/;"	f	typeref:typename:int
dm365_pll2_init	arch/arm/mach-davinci/dm365_lowlevel.c	/^int dm365_pll2_init(unsigned long pllm, unsigned long prediv)$/;"	f	typeref:typename:int
dm365_por_reset	arch/arm/mach-davinci/dm365_lowlevel.c	/^static void dm365_por_reset(void)$/;"	f	typeref:typename:void	file:
dm365_psc_init	arch/arm/mach-davinci/dm365_lowlevel.c	/^void dm365_psc_init(void)$/;"	f	typeref:typename:void
dm365_vpss_sync_reset	arch/arm/mach-davinci/dm365_lowlevel.c	/^static void dm365_vpss_sync_reset(void)$/;"	f	typeref:typename:void	file:
dm365_waitloop	arch/arm/mach-davinci/dm365_lowlevel.c	/^void dm365_waitloop(unsigned long loopcnt)$/;"	f	typeref:typename:void
dm365_wdt_flag_on	arch/arm/mach-davinci/dm365_lowlevel.c	/^static void dm365_wdt_flag_on(void)$/;"	f	typeref:typename:void	file:
dm365_wdt_reset	arch/arm/mach-davinci/dm365_lowlevel.c	/^static void dm365_wdt_reset(void)$/;"	f	typeref:typename:void	file:
dm36x_lowlevel_init	arch/arm/mach-davinci/dm365_lowlevel.c	/^void dm36x_lowlevel_init(ulong bootflag)$/;"	f	typeref:typename:void
dm9000_get_enetaddr	drivers/net/dm9000x.c	/^static void dm9000_get_enetaddr(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dm9000_halt	drivers/net/dm9000x.c	/^static void dm9000_halt(struct eth_device *netdev)$/;"	f	typeref:typename:void	file:
dm9000_inblk_16bit	drivers/net/dm9000x.c	/^static void dm9000_inblk_16bit(void *data_ptr, int count)$/;"	f	typeref:typename:void	file:
dm9000_inblk_32bit	drivers/net/dm9000x.c	/^static void dm9000_inblk_32bit(void *data_ptr, int count)$/;"	f	typeref:typename:void	file:
dm9000_inblk_8bit	drivers/net/dm9000x.c	/^static void dm9000_inblk_8bit(void *data_ptr, int count)$/;"	f	typeref:typename:void	file:
dm9000_info	drivers/net/dm9000x.c	/^static board_info_t dm9000_info;$/;"	v	typeref:typename:board_info_t	file:
dm9000_init	drivers/net/dm9000x.c	/^static int dm9000_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
dm9000_initialize	drivers/net/dm9000x.c	/^int dm9000_initialize(bd_t *bis)$/;"	f	typeref:typename:int
dm9000_outblk_16bit	drivers/net/dm9000x.c	/^static void dm9000_outblk_16bit(volatile void *data_ptr, int count)$/;"	f	typeref:typename:void	file:
dm9000_outblk_32bit	drivers/net/dm9000x.c	/^static void dm9000_outblk_32bit(volatile void *data_ptr, int count)$/;"	f	typeref:typename:void	file:
dm9000_outblk_8bit	drivers/net/dm9000x.c	/^static void dm9000_outblk_8bit(volatile void *data_ptr, int count)$/;"	f	typeref:typename:void	file:
dm9000_phy_read	drivers/net/dm9000x.c	/^dm9000_phy_read(int reg)$/;"	f	typeref:typename:u16	file:
dm9000_phy_write	drivers/net/dm9000x.c	/^dm9000_phy_write(int reg, u16 value)$/;"	f	typeref:typename:void	file:
dm9000_probe	drivers/net/dm9000x.c	/^dm9000_probe(void)$/;"	f	typeref:typename:int
dm9000_read_srom_word	drivers/net/dm9000x.c	/^void dm9000_read_srom_word(int offset, u8 *to)$/;"	f	typeref:typename:void
dm9000_reset	drivers/net/dm9000x.c	/^dm9000_reset(void)$/;"	f	typeref:typename:void	file:
dm9000_rx	drivers/net/dm9000x.c	/^static int dm9000_rx(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
dm9000_rx_status_16bit	drivers/net/dm9000x.c	/^static void dm9000_rx_status_16bit(u16 *RxStatus, u16 *RxLen)$/;"	f	typeref:typename:void	file:
dm9000_rx_status_32bit	drivers/net/dm9000x.c	/^static void dm9000_rx_status_32bit(u16 *RxStatus, u16 *RxLen)$/;"	f	typeref:typename:void	file:
dm9000_rx_status_8bit	drivers/net/dm9000x.c	/^static void dm9000_rx_status_8bit(u16 *RxStatus, u16 *RxLen)$/;"	f	typeref:typename:void	file:
dm9000_send	drivers/net/dm9000x.c	/^static int dm9000_send(struct eth_device *netdev, void *packet, int length)$/;"	f	typeref:typename:int	file:
dm9000_write_srom_word	drivers/net/dm9000x.c	/^void dm9000_write_srom_word(int offset, u16 val)$/;"	f	typeref:typename:void
dm9161_ack_interrupt	drivers/qe/uec_phy.c	/^static int dm9161_ack_interrupt (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
dm9161_close	drivers/qe/uec_phy.c	/^static void dm9161_close (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:void	file:
dm9161_config	drivers/net/phy/davicom.c	/^static int dm9161_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dm9161_config_aneg	drivers/qe/uec_phy.c	/^static int dm9161_config_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
dm9161_config_intr	drivers/qe/uec_phy.c	/^static int dm9161_config_intr (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
dm9161_init	drivers/qe/uec_phy.c	/^static int dm9161_init (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
dm9161_parse_status	drivers/net/phy/davicom.c	/^static int dm9161_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dm9161_read_status	drivers/qe/uec_phy.c	/^static int dm9161_read_status (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
dm9161_startup	drivers/net/phy/davicom.c	/^static int dm9161_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dm_check_devices	test/dm/test-fdt.c	/^int dm_check_devices(struct unit_test_state *uts, int num_devices)$/;"	f	typeref:typename:int
dm_check_operations	test/dm/core.c	/^int dm_check_operations(struct unit_test_state *uts, struct udevice *dev,$/;"	f	typeref:typename:int
dm_cros_ec_get_ops	include/cros_ec.h	/^#define dm_cros_ec_get_ops(/;"	d
dm_cros_ec_ops	include/cros_ec.h	/^struct dm_cros_ec_ops {$/;"	s
dm_dbg	drivers/core/util.c	/^void dm_dbg(const char *fmt, ...)$/;"	f	typeref:typename:void
dm_dbg	include/dm/util.h	/^static inline void dm_dbg(const char *fmt, ...)$/;"	f	typeref:typename:void
dm_demo_pdata	include/dm-demo.h	/^struct dm_demo_pdata {$/;"	s
dm_display_line	drivers/core/dump.c	/^static void dm_display_line(struct udevice *dev)$/;"	f	typeref:typename:void	file:
dm_display_ops	include/display.h	/^struct dm_display_ops {$/;"	s
dm_dump_all	drivers/core/dump.c	/^void dm_dump_all(void)$/;"	f	typeref:typename:void
dm_dump_devres	drivers/core/devres.c	/^void dm_dump_devres(void)$/;"	f	typeref:typename:void
dm_dump_devres	include/dm/util.h	/^static inline void dm_dump_devres(void)$/;"	f	typeref:typename:void
dm_dump_uclass	drivers/core/dump.c	/^void dm_dump_uclass(void)$/;"	f	typeref:typename:void
dm_dwmci_ops	drivers/mmc/dw_mmc.c	/^const struct dm_mmc_ops dm_dwmci_ops = {$/;"	v	typeref:typename:const struct dm_mmc_ops
dm_ena	drivers/ddr/altera/sequencer.h	/^	u32	dm_ena;$/;"	m	struct:socfpga_sdr_scc_mgr	typeref:typename:u32
dm_get_translation_offset	drivers/core/root.c	/^fdt_addr_t dm_get_translation_offset(void)$/;"	f	typeref:typename:fdt_addr_t
dm_gpio_free	drivers/gpio/gpio-uclass.c	/^int dm_gpio_free(struct udevice *dev, struct gpio_desc *desc)$/;"	f	typeref:typename:int
dm_gpio_get_open_drain	drivers/gpio/gpio-uclass.c	/^int dm_gpio_get_open_drain(struct gpio_desc *desc)$/;"	f	typeref:typename:int
dm_gpio_get_value	drivers/gpio/gpio-uclass.c	/^int dm_gpio_get_value(const struct gpio_desc *desc)$/;"	f	typeref:typename:int
dm_gpio_get_values_as_int	drivers/gpio/gpio-uclass.c	/^int dm_gpio_get_values_as_int(const struct gpio_desc *desc_list, int count)$/;"	f	typeref:typename:int
dm_gpio_is_valid	include/asm-generic/gpio.h	/^static inline bool dm_gpio_is_valid(const struct gpio_desc *desc)$/;"	f	typeref:typename:bool
dm_gpio_lookup_name	drivers/gpio/gpio-uclass.c	/^int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc)$/;"	f	typeref:typename:int
dm_gpio_ops	include/asm-generic/gpio.h	/^struct dm_gpio_ops {$/;"	s
dm_gpio_request	drivers/gpio/gpio-uclass.c	/^int dm_gpio_request(struct gpio_desc *desc, const char *label)$/;"	f	typeref:typename:int
dm_gpio_requestf	drivers/gpio/gpio-uclass.c	/^static int dm_gpio_requestf(struct gpio_desc *desc, const char *fmt, ...)$/;"	f	typeref:typename:int	file:
dm_gpio_set_dir	drivers/gpio/gpio-uclass.c	/^int dm_gpio_set_dir(struct gpio_desc *desc)$/;"	f	typeref:typename:int
dm_gpio_set_dir_flags	drivers/gpio/gpio-uclass.c	/^int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags)$/;"	f	typeref:typename:int
dm_gpio_set_open_drain	drivers/gpio/gpio-uclass.c	/^int dm_gpio_set_open_drain(struct gpio_desc *desc, int value)$/;"	f	typeref:typename:int
dm_gpio_set_value	drivers/gpio/gpio-uclass.c	/^int dm_gpio_set_value(const struct gpio_desc *desc, int value)$/;"	f	typeref:typename:int
dm_i2c_bus	include/i2c.h	/^struct dm_i2c_bus {$/;"	s
dm_i2c_chip	include/i2c.h	/^struct dm_i2c_chip {$/;"	s
dm_i2c_chip_flags	include/i2c.h	/^enum dm_i2c_chip_flags {$/;"	g
dm_i2c_get_bus_speed	drivers/i2c/i2c-uclass.c	/^int dm_i2c_get_bus_speed(struct udevice *bus)$/;"	f	typeref:typename:int
dm_i2c_msg_flags	include/i2c.h	/^enum dm_i2c_msg_flags {$/;"	g
dm_i2c_ops	include/i2c.h	/^struct dm_i2c_ops {$/;"	s
dm_i2c_probe	drivers/i2c/i2c-uclass.c	/^int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,$/;"	f	typeref:typename:int
dm_i2c_read	drivers/i2c/i2c-uclass.c	/^int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)$/;"	f	typeref:typename:int
dm_i2c_reg_read	drivers/i2c/i2c-uclass.c	/^int dm_i2c_reg_read(struct udevice *dev, uint offset)$/;"	f	typeref:typename:int
dm_i2c_reg_write	drivers/i2c/i2c-uclass.c	/^int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)$/;"	f	typeref:typename:int
dm_i2c_set_bus_speed	drivers/i2c/i2c-uclass.c	/^int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int
dm_i2c_write	drivers/i2c/i2c-uclass.c	/^int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,$/;"	f	typeref:typename:int
dm_i2c_xfer	drivers/i2c/i2c-uclass.c	/^int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)$/;"	f	typeref:typename:int
dm_init	drivers/core/root.c	/^int dm_init(void)$/;"	f	typeref:typename:int
dm_init_and_scan	drivers/core/root.c	/^int dm_init_and_scan(bool pre_reloc_only)$/;"	f	typeref:typename:int
dm_leak_check_end	test/dm/core.c	/^int dm_leak_check_end(struct unit_test_state *uts)$/;"	f	typeref:typename:int
dm_leak_check_start	test/dm/core.c	/^void dm_leak_check_start(struct unit_test_state *uts)$/;"	f	typeref:typename:void
dm_mmc_get_cd	drivers/mmc/mmc-uclass.c	/^int dm_mmc_get_cd(struct udevice *dev)$/;"	f	typeref:typename:int
dm_mmc_get_wp	drivers/mmc/mmc-uclass.c	/^int dm_mmc_get_wp(struct udevice *dev)$/;"	f	typeref:typename:int
dm_mmc_ops	include/mmc.h	/^struct dm_mmc_ops {$/;"	s
dm_mmc_send_cmd	drivers/mmc/mmc-uclass.c	/^int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int
dm_mmc_set_ios	drivers/mmc/mmc-uclass.c	/^int dm_mmc_set_ios(struct udevice *dev)$/;"	f	typeref:typename:int
dm_pci_bus_find_bdf	drivers/pci/pci-uclass.c	/^int dm_pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp)$/;"	f	typeref:typename:int
dm_pci_bus_find_device	drivers/pci/pci-uclass.c	/^static int dm_pci_bus_find_device(struct udevice *bus, unsigned int vendor,$/;"	f	typeref:typename:int	file:
dm_pci_bus_to_phys	drivers/pci/pci-uclass.c	/^phys_addr_t dm_pci_bus_to_phys(struct udevice *dev, pci_addr_t bus_addr,$/;"	f	typeref:typename:phys_addr_t
dm_pci_bus_to_virt	include/pci.h	/^#define dm_pci_bus_to_virt(/;"	d
dm_pci_clrset_config16	drivers/pci/pci-uclass.c	/^int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set)$/;"	f	typeref:typename:int
dm_pci_clrset_config32	drivers/pci/pci-uclass.c	/^int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set)$/;"	f	typeref:typename:int
dm_pci_clrset_config8	drivers/pci/pci-uclass.c	/^int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set)$/;"	f	typeref:typename:int
dm_pci_emul_ops	include/pci.h	/^struct dm_pci_emul_ops {$/;"	s
dm_pci_find_class	drivers/pci/pci-uclass.c	/^int dm_pci_find_class(uint find_class, int index, struct udevice **devp)$/;"	f	typeref:typename:int
dm_pci_find_device	drivers/pci/pci-uclass.c	/^int dm_pci_find_device(unsigned int vendor, unsigned int device, int index,$/;"	f	typeref:typename:int
dm_pci_get_bdf	drivers/pci/pci-uclass.c	/^pci_dev_t dm_pci_get_bdf(struct udevice *dev)$/;"	f	typeref:typename:pci_dev_t
dm_pci_hose_probe_bus	drivers/pci/pci-uclass.c	/^int dm_pci_hose_probe_bus(struct udevice *bus)$/;"	f	typeref:typename:int
dm_pci_io_to_phys	include/pci.h	/^#define dm_pci_io_to_phys(/;"	d
dm_pci_io_to_virt	include/pci.h	/^#define dm_pci_io_to_virt(/;"	d
dm_pci_map_bar	drivers/pci/pci-uclass.c	/^void *dm_pci_map_bar(struct udevice *dev, int bar, int flags)$/;"	f	typeref:typename:void *
dm_pci_mem_to_phys	include/pci.h	/^#define dm_pci_mem_to_phys(/;"	d
dm_pci_mem_to_virt	include/pci.h	/^#define dm_pci_mem_to_virt(/;"	d
dm_pci_ops	include/pci.h	/^struct dm_pci_ops {$/;"	s
dm_pci_phys_to_bus	drivers/pci/pci-uclass.c	/^pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr,$/;"	f	typeref:typename:pci_addr_t
dm_pci_phys_to_io	include/pci.h	/^#define dm_pci_phys_to_io(/;"	d
dm_pci_phys_to_mem	include/pci.h	/^#define dm_pci_phys_to_mem(/;"	d
dm_pci_read_bar32	drivers/pci/pci-uclass.c	/^u32 dm_pci_read_bar32(struct udevice *dev, int barnum)$/;"	f	typeref:typename:u32
dm_pci_read_config	drivers/pci/pci-uclass.c	/^int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep,$/;"	f	typeref:typename:int
dm_pci_read_config16	drivers/pci/pci-uclass.c	/^int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep)$/;"	f	typeref:typename:int
dm_pci_read_config32	drivers/pci/pci-uclass.c	/^int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)$/;"	f	typeref:typename:int
dm_pci_read_config8	drivers/pci/pci-uclass.c	/^int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep)$/;"	f	typeref:typename:int
dm_pci_run_vga_bios	drivers/pci/pci_rom.c	/^int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),$/;"	f	typeref:typename:int
dm_pci_virt_to_bus	include/pci.h	/^#define dm_pci_virt_to_bus(/;"	d
dm_pci_virt_to_io	include/pci.h	/^#define dm_pci_virt_to_io(/;"	d
dm_pci_virt_to_mem	include/pci.h	/^#define dm_pci_virt_to_mem(/;"	d
dm_pci_write_bar32	drivers/pci/pci-uclass.c	/^void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr)$/;"	f	typeref:typename:void
dm_pci_write_config	drivers/pci/pci-uclass.c	/^int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,$/;"	f	typeref:typename:int
dm_pci_write_config16	drivers/pci/pci-uclass.c	/^int dm_pci_write_config16(struct udevice *dev, int offset, u16 value)$/;"	f	typeref:typename:int
dm_pci_write_config32	drivers/pci/pci-uclass.c	/^int dm_pci_write_config32(struct udevice *dev, int offset, u32 value)$/;"	f	typeref:typename:int
dm_pci_write_config8	drivers/pci/pci-uclass.c	/^int dm_pci_write_config8(struct udevice *dev, int offset, u8 value)$/;"	f	typeref:typename:int
dm_pciauto_config_device	drivers/pci/pci_auto.c	/^int dm_pciauto_config_device(struct udevice *dev)$/;"	f	typeref:typename:int
dm_pciauto_postscan_setup_bridge	drivers/pci/pci_auto.c	/^void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)$/;"	f	typeref:typename:void
dm_pciauto_prescan_setup_bridge	drivers/pci/pci_auto.c	/^void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)$/;"	f	typeref:typename:void
dm_pciauto_setup_device	drivers/pci/pci_auto.c	/^void dm_pciauto_setup_device(struct udevice *dev, int bars_num,$/;"	f	typeref:typename:void
dm_pmic_ops	include/power/pmic.h	/^struct dm_pmic_ops {$/;"	s
dm_regulator_mode	include/power/regulator.h	/^struct dm_regulator_mode {$/;"	s
dm_regulator_ops	include/power/regulator.h	/^struct dm_regulator_ops {$/;"	s
dm_regulator_uclass_platdata	include/power/regulator.h	/^struct dm_regulator_uclass_platdata {$/;"	s
dm_reloc	test/dm/cmd_dm.c	/^static __maybe_unused void dm_reloc(void)$/;"	f	typeref:typename:__maybe_unused void	file:
dm_root	drivers/core/root.c	/^struct udevice *dm_root(void)$/;"	f	typeref:struct:udevice *
dm_root	include/asm-generic/global_data.h	/^	struct udevice	*dm_root;	\/* Root instance for Driver Model *\/$/;"	m	struct:global_data	typeref:struct:udevice *
dm_root_f	include/asm-generic/global_data.h	/^	struct udevice	*dm_root_f;	\/* Pre-relocation root instance *\/$/;"	m	struct:global_data	typeref:struct:udevice *
dm_rproc_ops	include/remoteproc.h	/^struct dm_rproc_ops {$/;"	s
dm_rproc_uclass_pdata	include/remoteproc.h	/^struct dm_rproc_uclass_pdata {$/;"	s
dm_rtc_get	drivers/rtc/rtc-uclass.c	/^int dm_rtc_get(struct udevice *dev, struct rtc_time *time)$/;"	f	typeref:typename:int
dm_rtc_reset	drivers/rtc/rtc-uclass.c	/^int dm_rtc_reset(struct udevice *dev)$/;"	f	typeref:typename:int
dm_rtc_set	drivers/rtc/rtc-uclass.c	/^int dm_rtc_set(struct udevice *dev, struct rtc_time *time)$/;"	f	typeref:typename:int
dm_scan_fdt	drivers/core/root.c	/^int dm_scan_fdt(const void *blob, bool pre_reloc_only)$/;"	f	typeref:typename:int
dm_scan_fdt_dev	drivers/core/root.c	/^int dm_scan_fdt_dev(struct udevice *dev)$/;"	f	typeref:typename:int
dm_scan_fdt_node	drivers/core/root.c	/^int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset,$/;"	f	typeref:typename:int
dm_scan_other	drivers/core/root.c	/^__weak int dm_scan_other(bool pre_reloc_only)$/;"	f	typeref:typename:__weak int
dm_scan_other	drivers/mtd/spi/sandbox.c	/^int dm_scan_other(bool pre_reloc_only)$/;"	f	typeref:typename:int
dm_scan_platdata	drivers/core/root.c	/^int dm_scan_platdata(bool pre_reloc_only)$/;"	f	typeref:typename:int
dm_serial_ops	include/serial.h	/^struct dm_serial_ops {$/;"	s
dm_set_translation_offset	drivers/core/root.c	/^void dm_set_translation_offset(fdt_addr_t offs)$/;"	f	typeref:typename:void
dm_shape_probe	drivers/demo/demo-shape.c	/^static int dm_shape_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dm_shape_remove	drivers/demo/demo-shape.c	/^static int dm_shape_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dm_spi_bus	include/spi.h	/^struct dm_spi_bus {$/;"	s
dm_spi_claim_bus	drivers/spi/spi-uclass.c	/^int dm_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int
dm_spi_emul_ops	include/spi.h	/^struct dm_spi_emul_ops {$/;"	s
dm_spi_flash_ops	include/spi_flash.h	/^struct dm_spi_flash_ops {$/;"	s
dm_spi_ops	include/spi.h	/^struct dm_spi_ops {$/;"	s
dm_spi_release_bus	drivers/spi/spi-uclass.c	/^void dm_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:void
dm_spi_slave_platdata	include/spi.h	/^struct dm_spi_slave_platdata {$/;"	s
dm_spi_xfer	drivers/spi/spi-uclass.c	/^int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int
dm_spmi_ops	include/spmi/spmi.h	/^struct dm_spmi_ops {$/;"	s
dm_test_adc_bind	test/dm/adc.c	/^static int dm_test_adc_bind(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_adc_multi_channel_conversion	test/dm/adc.c	/^static int dm_test_adc_multi_channel_conversion(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_adc_multi_channel_shot	test/dm/adc.c	/^static int dm_test_adc_multi_channel_shot(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_adc_single_channel_conversion	test/dm/adc.c	/^static int dm_test_adc_single_channel_conversion(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_adc_single_channel_shot	test/dm/adc.c	/^static int dm_test_adc_single_channel_shot(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_adc_supply	test/dm/adc.c	/^static int dm_test_adc_supply(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_adc_wrong_channel_selection	test/dm/adc.c	/^static int dm_test_adc_wrong_channel_selection(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_autobind	test/dm/core.c	/^static int dm_test_autobind(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_autobind_uclass_pdata_alloc	test/dm/core.c	/^static int dm_test_autobind_uclass_pdata_alloc(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_autobind_uclass_pdata_valid	test/dm/core.c	/^static int dm_test_autobind_uclass_pdata_valid(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_autoprobe	test/dm/core.c	/^static int dm_test_autoprobe(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_blk_base	test/dm/blk.c	/^static int dm_test_blk_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_blk_usb	test/dm/blk.c	/^static int dm_test_blk_usb(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_child_post_bind	test/dm/bus.c	/^static int dm_test_bus_child_post_bind(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_child_post_bind_uclass	test/dm/bus.c	/^static int dm_test_bus_child_post_bind_uclass(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_child_pre_probe_uclass	test/dm/bus.c	/^static int dm_test_bus_child_pre_probe_uclass(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_children	test/dm/bus.c	/^static int dm_test_bus_children(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_children_funcs	test/dm/bus.c	/^static int dm_test_bus_children_funcs(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_children_iterators	test/dm/bus.c	/^static int dm_test_bus_children_iterators(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_parent_data	test/dm/bus.c	/^static int dm_test_bus_parent_data(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_parent_data_uclass	test/dm/bus.c	/^static int dm_test_bus_parent_data_uclass(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_parent_ops	test/dm/bus.c	/^static int dm_test_bus_parent_ops(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_parent_platdata	test/dm/bus.c	/^static int dm_test_bus_parent_platdata(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_bus_parent_platdata_uclass	test/dm/bus.c	/^static int dm_test_bus_parent_platdata_uclass(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_children	test/dm/core.c	/^static int dm_test_children(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_clk	test/dm/clk.c	/^static int dm_test_clk(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_destroy	test/dm/test-main.c	/^static int dm_test_destroy(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_device_get_uclass_id	test/dm/core.c	/^static int dm_test_device_get_uclass_id(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_eth	test/dm/eth.c	/^static int dm_test_eth(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_eth_act	test/dm/eth.c	/^static int dm_test_eth_act(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_eth_alias	test/dm/eth.c	/^static int dm_test_eth_alias(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_eth_prime	test/dm/eth.c	/^static int dm_test_eth_prime(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_eth_rotate	test/dm/eth.c	/^static int dm_test_eth_rotate(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_fdt	test/dm/test-fdt.c	/^static int dm_test_fdt(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_fdt_offset	test/dm/test-fdt.c	/^static int dm_test_fdt_offset(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_fdt_pre_reloc	test/dm/test-fdt.c	/^static int dm_test_fdt_pre_reloc(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_fdt_uclass_seq	test/dm/test-fdt.c	/^static int dm_test_fdt_uclass_seq(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_gpio	test/dm/gpio.c	/^static int dm_test_gpio(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_gpio_anon	test/dm/gpio.c	/^static int dm_test_gpio_anon(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_gpio_copy	test/dm/gpio.c	/^static int dm_test_gpio_copy(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_gpio_leak	test/dm/gpio.c	/^static int dm_test_gpio_leak(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_gpio_phandles	test/dm/gpio.c	/^static int dm_test_gpio_phandles(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_gpio_requestf	test/dm/gpio.c	/^static int dm_test_gpio_requestf(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_bytewise	test/dm/i2c.c	/^static int dm_test_i2c_bytewise(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_find	test/dm/i2c.c	/^static int dm_test_i2c_find(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_offset	test/dm/i2c.c	/^static int dm_test_i2c_offset(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_offset_len	test/dm/i2c.c	/^static int dm_test_i2c_offset_len(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_probe_empty	test/dm/i2c.c	/^static int dm_test_i2c_probe_empty(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_read_write	test/dm/i2c.c	/^static int dm_test_i2c_read_write(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_i2c_speed	test/dm/i2c.c	/^static int dm_test_i2c_speed(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_init	test/dm/test-main.c	/^static int dm_test_init(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_leak	test/dm/core.c	/^static int dm_test_leak(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_led_base	test/dm/led.c	/^static int dm_test_led_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_led_gpio	test/dm/led.c	/^static int dm_test_led_gpio(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_led_label	test/dm/led.c	/^static int dm_test_led_label(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_lifecycle	test/dm/core.c	/^static int dm_test_lifecycle(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_mailbox	test/dm/mailbox.c	/^static int dm_test_mailbox(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_main	test/dm/test-main.c	/^static int dm_test_main(const char *test_name)$/;"	f	typeref:typename:int	file:
dm_test_mmc_base	test/dm/mmc.c	/^static int dm_test_mmc_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_mmc_blk	test/dm/mmc.c	/^static int dm_test_mmc_blk(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_net_retry	test/dm/eth.c	/^static int dm_test_net_retry(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_operations	test/dm/core.c	/^static int dm_test_operations(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_ordering	test/dm/core.c	/^static int dm_test_ordering(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_parent_data	include/dm/test.h	/^struct dm_test_parent_data {$/;"	s
dm_test_parent_platdata	test/dm/bus.c	/^struct dm_test_parent_platdata {$/;"	s	file:
dm_test_pci_base	test/dm/pci.c	/^static int dm_test_pci_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_pci_busnum	test/dm/pci.c	/^static int dm_test_pci_busnum(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_pci_swapcase	test/dm/pci.c	/^static int dm_test_pci_swapcase(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_pdata	include/dm/test.h	/^struct dm_test_pdata {$/;"	s
dm_test_perdev_uc_pdata	include/dm/test.h	/^struct dm_test_perdev_uc_pdata {$/;"	s
dm_test_platdata	test/dm/core.c	/^static int dm_test_platdata(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_domain	test/dm/power-domain.c	/^static int dm_test_power_domain(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_pmic_get	test/dm/pmic.c	/^static int dm_test_power_pmic_get(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_pmic_io	test/dm/pmic.c	/^static int dm_test_power_pmic_io(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_autoset	test/dm/regulator.c	/^static int dm_test_power_regulator_autoset(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_autoset_list	test/dm/regulator.c	/^static int dm_test_power_regulator_autoset_list(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_get	test/dm/regulator.c	/^static int dm_test_power_regulator_get(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_set_get_current	test/dm/regulator.c	/^static int dm_test_power_regulator_set_get_current(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_set_get_enable	test/dm/regulator.c	/^static int dm_test_power_regulator_set_get_enable(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_set_get_mode	test/dm/regulator.c	/^static int dm_test_power_regulator_set_get_mode(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_power_regulator_set_get_voltage	test/dm/regulator.c	/^static int dm_test_power_regulator_set_get_voltage(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_pre_reloc	test/dm/core.c	/^static int dm_test_pre_reloc(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_priv	include/dm/test.h	/^struct dm_test_priv {$/;"	s
dm_test_ram_base	test/dm/ram.c	/^static int dm_test_ram_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_regmap_base	test/dm/regmap.c	/^static int dm_test_regmap_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_regmap_syscon	test/dm/regmap.c	/^static int dm_test_regmap_syscon(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_remoteproc_base	test/dm/remoteproc.c	/^static int dm_test_remoteproc_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_remove	test/dm/core.c	/^static int dm_test_remove(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_reset	test/dm/reset.c	/^static int dm_test_reset(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_rtc_base	test/dm/rtc.c	/^static int dm_test_rtc_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_rtc_dual	test/dm/rtc.c	/^static int dm_test_rtc_dual(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_rtc_reset	test/dm/rtc.c	/^static int dm_test_rtc_reset(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_rtc_set_get	test/dm/rtc.c	/^static int dm_test_rtc_set_get(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_spi_find	test/dm/spi.c	/^static int dm_test_spi_find(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_spi_flash	test/dm/sf.c	/^static int dm_test_spi_flash(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_spi_xfer	test/dm/spi.c	/^static int dm_test_spi_xfer(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_spmi_access	test/dm/spmi.c	/^static int dm_test_spmi_access(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_spmi_access_peripheral	test/dm/spmi.c	/^static int dm_test_spmi_access_peripheral(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_spmi_probe	test/dm/spmi.c	/^static int dm_test_spmi_probe(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_state	include/dm/test.h	/^struct dm_test_state {$/;"	s
dm_test_syscon_base	test/dm/syscon.c	/^static int dm_test_syscon_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_syscon_by_driver_data	test/dm/syscon.c	/^static int dm_test_syscon_by_driver_data(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_sysreset_base	test/dm/sysreset.c	/^static int dm_test_sysreset_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_sysreset_walk	test/dm/sysreset.c	/^static int dm_test_sysreset_walk(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_timer_base	test/dm/timer.c	/^static int dm_test_timer_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass	test/dm/core.c	/^static int dm_test_uclass(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass_before_ready	test/dm/core.c	/^static int dm_test_uclass_before_ready(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass_devices_find	test/dm/core.c	/^static int dm_test_uclass_devices_find(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass_devices_find_by_name	test/dm/core.c	/^static int dm_test_uclass_devices_find_by_name(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass_devices_get	test/dm/core.c	/^static int dm_test_uclass_devices_get(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass_devices_get_by_name	test/dm/core.c	/^static int dm_test_uclass_devices_get_by_name(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_uclass_perdev_priv	include/dm/test.h	/^struct dm_test_uclass_perdev_priv {$/;"	s
dm_test_uclass_priv	include/dm/test.h	/^struct dm_test_uclass_priv {$/;"	s
dm_test_usb_base	test/dm/usb.c	/^static int dm_test_usb_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_flash	test/dm/usb.c	/^static int dm_test_usb_flash(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_keyb	test/dm/usb.c	/^static int dm_test_usb_keyb(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_multi	test/dm/usb.c	/^static int dm_test_usb_multi(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_remove	test/dm/usb.c	/^static int dm_test_usb_remove(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_tree	test/dm/usb.c	/^static int dm_test_usb_tree(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_tree_remove	test/dm/usb.c	/^static int dm_test_usb_tree_remove(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_usb_tree_reorder	test/dm/usb.c	/^static int dm_test_usb_tree_reorder(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_base	test/dm/video.c	/^static int dm_test_video_base(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_bmp	test/dm/video.c	/^static int dm_test_video_bmp(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_bmp_comp	test/dm/video.c	/^static int dm_test_video_bmp_comp(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_chars	test/dm/video.c	/^static int dm_test_video_chars(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_context	test/dm/video.c	/^static int dm_test_video_context(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_rotation1	test/dm/video.c	/^static int dm_test_video_rotation1(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_rotation2	test/dm/video.c	/^static int dm_test_video_rotation2(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_rotation3	test/dm/video.c	/^static int dm_test_video_rotation3(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_text	test/dm/video.c	/^static int dm_test_video_text(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_truetype	test/dm/video.c	/^static int dm_test_video_truetype(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_truetype_bs	test/dm/video.c	/^static int dm_test_video_truetype_bs(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_test_video_truetype_scroll	test/dm/video.c	/^static int dm_test_video_truetype_scroll(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
dm_testdrv_op_count	test/dm/test-driver.c	/^int dm_testdrv_op_count[DM_TEST_OP_COUNT];$/;"	v	typeref:typename:int[]
dm_thermal_ops	include/thermal.h	/^struct dm_thermal_ops {$/;"	s
dm_timer_init	drivers/timer/timer-uclass.c	/^int notrace dm_timer_init(void)$/;"	f	typeref:typename:int notrace
dm_uninit	drivers/core/root.c	/^int dm_uninit(void)$/;"	f	typeref:typename:int
dm_usb_ops	include/usb.h	/^struct dm_usb_ops {$/;"	s
dm_warn	drivers/core/util.c	/^void dm_warn(const char *fmt, ...)$/;"	f	typeref:typename:void
dm_warn	include/dm/util.h	/^static inline void dm_warn(const char *fmt, ...)$/;"	f	typeref:typename:void
dma	arch/arm/dts/at91sam9g45.dtsi	/^			dma: dma-controller@ffffec00 {$/;"	l
dma	arch/arm/dts/sun4i-a10.dtsi	/^		dma: dma-controller@01c02000 {$/;"	l
dma	arch/arm/dts/sun5i.dtsi	/^		dma: dma-controller@01c02000 {$/;"	l
dma	arch/arm/dts/sun6i-a31.dtsi	/^		dma: dma-controller@01c02000 {$/;"	l
dma	arch/arm/dts/sun7i-a20.dtsi	/^		dma: dma-controller@01c02000 {$/;"	l
dma	arch/arm/dts/sun8i-a23-a33.dtsi	/^		dma: dma-controller@01c02000 {$/;"	l
dma	arch/arm/dts/sun8i-h3.dtsi	/^		dma: dma-controller@01c02000 {$/;"	l
dma	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 dma;$/;"	m	struct:cspi_regs	typeref:typename:u32
dma	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 dma;$/;"	m	struct:cspi_regs	typeref:typename:u32
dma	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 dma;$/;"	m	struct:cspi_regs	typeref:typename:u32
dma	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 dma;$/;"	m	struct:cspi_regs	typeref:typename:u32
dma	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 dma;$/;"	m	struct:cspi_regs	typeref:typename:u32
dma	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 dma;$/;"	m	struct:cspi_regs	typeref:typename:u32
dma	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	struct s3c24x0_dma	dma[4];$/;"	m	struct:s3c24x0_dmas	typeref:struct:s3c24x0_dma[4]
dma	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	struct s3c24x0_usb_dev_dmas	dma[5];$/;"	m	struct:s3c24x0_usb_device	typeref:struct:s3c24x0_usb_dev_dmas[5]
dma	arch/arm/include/asm/imx-common/dma.h	/^	struct mxs_dma_device *dma;$/;"	m	struct:mxs_dma_chan	typeref:struct:mxs_dma_device *
dma	arch/powerpc/include/asm/immap_512x.h	/^	dma512x_t		dma;		\/* DMA *\/$/;"	m	struct:immap	typeref:typename:dma512x_t
dma	arch/powerpc/include/asm/immap_83xx.h	/^	dma83xx_t		dma;		\/* DMA *\/$/;"	m	struct:immap	typeref:typename:dma83xx_t
dma	arch/powerpc/include/asm/immap_83xx.h	/^	struct fsl_dma dma[4];$/;"	m	struct:dma83xx	typeref:struct:fsl_dma[4]
dma	arch/powerpc/include/asm/immap_85xx.h	/^	struct fsl_dma dma[4];$/;"	m	struct:ccsr_dma	typeref:struct:fsl_dma[4]
dma	arch/powerpc/include/asm/immap_86xx.h	/^	struct fsl_dma dma[4];$/;"	m	struct:ccsr_dma	typeref:struct:fsl_dma[4]
dma	cmd/fdc.c	/^	uchar		dma;		\/* if > 0 dma enabled *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:uchar	file:
dma	drivers/dma/lpc32xx_dma.c	/^static struct dma_reg *dma = (struct dma_reg *)DMA_BASE;$/;"	v	typeref:struct:dma_reg *	file:
dma	drivers/mmc/mxcmmc.c	/^	int			dma;$/;"	m	struct:mxcmci_host	typeref:typename:int	file:
dma	drivers/net/bcm-sf2-eth.h	/^	struct eth_dma dma;$/;"	m	struct:eth_info	typeref:struct:eth_dma
dma	drivers/usb/dwc3/core.h	/^	dma_addr_t		dma;$/;"	m	struct:dwc3_event_buffer	typeref:typename:dma_addr_t
dma	drivers/usb/musb-new/musb_gadget.c	/^	dma_addr_t		dma;$/;"	m	struct:free_record	typeref:typename:dma_addr_t	file:
dma	drivers/usb/musb-new/musb_gadget.h	/^	struct dma_channel		*dma;$/;"	m	struct:musb_ep	typeref:struct:dma_channel *
dma	include/atmel_mci.h	/^	u32	dma;	\/* 0x50 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
dma	include/linux/usb/gadget.h	/^	dma_addr_t		dma;$/;"	m	struct:usb_request	typeref:typename:dma_addr_t
dma	include/linux/usb/musb.h	/^	unsigned	dma:1 __deprecated; \/* supports DMA *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned
dma0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					dma0_clk: dma0_clk {$/;"	l
dma0_clk	arch/arm/dts/sama5d2.dtsi	/^					dma0_clk: dma0_clk@6 {$/;"	l
dma1	arch/powerpc/include/asm/immap_83xx.h	/^	u8			dma1[0x2000];	\/* DMA *\/$/;"	m	struct:immap	typeref:typename:u8[0x2000]
dma1_clk	arch/arm/dts/sama5d2.dtsi	/^					dma1_clk: dma1_clk@7 {$/;"	l
dma1liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dma1liodnr;	\/* DMA 1 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dma2liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dma2liodnr;	\/* DMA 2 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dma3liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dma3liodnr;	\/* DMA 3 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dma4	arch/arm/include/asm/arch-omap3/cpu.h	/^struct dma4 {$/;"	s
dma4_chan	arch/arm/include/asm/arch-omap3/cpu.h	/^struct dma4_chan {$/;"	s
dma4liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dma4liodnr;	\/* DMA 4 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dma512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct dma512x {$/;"	s
dma512x_t	arch/powerpc/include/asm/immap_512x.h	/^} dma512x_t;$/;"	t	typeref:struct:dma512x
dma64_addr_t	arch/mips/include/asm/types.h	/^typedef u64 dma64_addr_t;$/;"	t	typeref:typename:u64
dma64dd_t	drivers/net/bcm-sf2-eth-gmac.c	/^} dma64dd_t;$/;"	t	typeref:struct:__anon2233d0570108	file:
dma83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct dma83xx {$/;"	s
dma83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} dma83xx_t;$/;"	t	typeref:struct:dma83xx
dmaRegs	include/MCD_dma.h	/^typedef volatile struct dmaRegs_s dmaRegs;$/;"	t	typeref:typename:volatile struct dmaRegs_s
dmaRegs_s	include/MCD_dma.h	/^struct dmaRegs_s {$/;"	s
dmaSize	include/MCD_dma.h	/^	u32 dmaSize;$/;"	m	struct:MCD_XferProg_struct	typeref:typename:u32
dmaSize	include/MCD_dma.h	/^	u32 dmaSize;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:u32
dma_1word	include/ata.h	/^	unsigned short	dma_1word;	\/* single-word dma info *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
dma_a_b_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void dma_a_b_selection_in_fpga(void)$/;"	f	typeref:typename:void
dma_a_b_unselect_in_fpga	board/amcc/bamboo/bamboo.c	/^void dma_a_b_unselect_in_fpga(void)$/;"	f	typeref:typename:void
dma_ab	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_ab;	\/* Pointer to a,b (elliptic curve ) *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_ab	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_ab;	\/* Pointer to a,b (elliptic curve ) *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_addr	include/usb/fotg210.h	/^	uint32_t dma_addr; \/* 0x1cc: DMA Address Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
dma_addr_c_sig	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_addr_c_sig;	\/* Pointer to C_signature *\/$/;"	m	struct:pdb_mp_sign	typeref:typename:dma_addr_t
dma_addr_d_sig	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_addr_d_sig;	\/* Pointer to D_signature *\/$/;"	m	struct:pdb_mp_sign	typeref:typename:dma_addr_t
dma_addr_hash	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_addr_hash;	\/* Pointer to hash output *\/$/;"	m	struct:pdb_mp_sign	typeref:typename:dma_addr_t
dma_addr_msg	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_addr_msg;	\/* Pointer to Message *\/$/;"	m	struct:pdb_mp_sign	typeref:typename:dma_addr_t
dma_addr_t	arch/arc/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/arm/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/arm/include/asm/types.h	/^typedef unsigned long long dma_addr_t;$/;"	t	typeref:typename:unsigned long long
dma_addr_t	arch/avr32/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/blackfin/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/m68k/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/microblaze/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/mips/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/mips/include/asm/types.h	/^typedef u64 dma_addr_t;$/;"	t	typeref:typename:u64
dma_addr_t	arch/nds32/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/nios2/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/openrisc/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/powerpc/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/powerpc/include/asm/types.h	/^typedef unsigned long long dma_addr_t;$/;"	t	typeref:typename:unsigned long long
dma_addr_t	arch/sandbox/include/asm/types.h	/^typedef unsigned long dma_addr_t;$/;"	t	typeref:typename:unsigned long
dma_addr_t	arch/sh/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/sparc/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/x86/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_addr_t	arch/xtensa/include/asm/types.h	/^typedef u32 dma_addr_t;$/;"	t	typeref:typename:u32
dma_adr	drivers/usb/dwc3/core.h	/^	__le64	dma_adr[DWC3_MAX_HIBER_SCRATCHBUFS];$/;"	m	struct:dwc3_scratchpad_array	typeref:typename:__le64[]
dma_alloc_coherent	arch/arm/include/asm/dma-mapping.h	/^static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)$/;"	f	typeref:typename:void *
dma_alloc_coherent	arch/avr32/include/asm/dma-mapping.h	/^static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)$/;"	f	typeref:typename:void *
dma_alloc_coherent	arch/nds32/include/asm/dma-mapping.h	/^static void *dma_alloc_coherent(size_t len, unsigned long *handle)$/;"	f	typeref:typename:void *
dma_alloc_coherent	arch/nios2/include/asm/dma-mapping.h	/^static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)$/;"	f	typeref:typename:void *
dma_apbh	arch/arm/dts/imx6qdl.dtsi	/^		dma_apbh: dma-apbh@00110000 {$/;"	l
dma_apbh	arch/arm/dts/imx6ull.dtsi	/^		dma_apbh: dma-apbh@01804000 {$/;"	l
dma_base	drivers/dma/fsl_dma.c	/^ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR);$/;"	v	typeref:typename:ccsr_dma_t *
dma_base	drivers/dma/fsl_dma.c	/^ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);$/;"	v	typeref:typename:ccsr_dma_t *
dma_base	drivers/dma/fsl_dma.c	/^dma83xx_t *dma_base = (void *)(CONFIG_SYS_MPC83xx_DMA_ADDR);$/;"	v	typeref:typename:dma83xx_t *
dma_bitblit	board/bf527-ezkit/video.c	/^static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y)$/;"	f	typeref:typename:void	file:
dma_bitblit	board/bf548-ezkit/video.c	/^static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y)$/;"	f	typeref:typename:void	file:
dma_bitblit	board/cm-bf548/video.c	/^static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y)$/;"	f	typeref:typename:void	file:
dma_blk	drivers/spi/tegra114_spi.c	/^	u32 dma_blk;	\/* 024:SPI_DMA_BLK register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
dma_blk	drivers/spi/tegra210_qspi.c	/^	u32 dma_blk;	\/* 024:QSPI_DMA_BLK register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
dma_buf	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_buf;	\/* Pointer to 64-byte temp buffer *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_buf	drivers/mtd/nand/denali.h	/^	uint8_t dma_buf[DENALI_BUF_SIZE]  __aligned(64);$/;"	m	struct:nand_buf	typeref:typename:uint8_t[DENALI_BUF_SIZE]__aligned (64)
dma_buf	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	void *dma_buf;$/;"	m	struct:dwc2_ep	typeref:typename:void *
dma_bufbdry_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 dma_bufbdry_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
dma_buffer_id_high	include/fis.h	/^	u32 dma_buffer_id_high;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u32
dma_buffer_id_low	include/fis.h	/^	u32 dma_buffer_id_low;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u32
dma_buffer_offset	include/fis.h	/^	u32 dma_buffer_offset;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u32
dma_burst_sz	drivers/video/da8xx-fb.h	/^	int dma_burst_sz;$/;"	m	struct:lcd_ctrl_config	typeref:typename:int
dma_c	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_c;	\/* Pointer to C_signature *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_c	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_c;	\/* Pointer to C_signature *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_c_d_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void dma_c_d_selection_in_fpga(void)$/;"	f	typeref:typename:void
dma_c_d_unselect_in_fpga	board/amcc/bamboo/bamboo.c	/^void dma_c_d_unselect_in_fpga(void)$/;"	f	typeref:typename:void
dma_cache_maint	include/usb/lin_gadget_compat.h	/^#define dma_cache_maint(/;"	d
dma_calc_size	arch/blackfin/lib/string.c	/^static void dma_calc_size(unsigned long ldst, unsigned long lsrc, size_t count,$/;"	f	typeref:typename:void	file:
dma_cfg	drivers/block/sata_dwc.c	/^	struct dmareg			dma_cfg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
dma_cfg_a	drivers/mtd/nand/tegra_nand.h	/^	u32	dma_cfg_a;	\/* offset 34h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
dma_cfg_b	drivers/mtd/nand/tegra_nand.h	/^	u32	dma_cfg_b;	\/* offset 38h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
dma_chan	drivers/block/sata_dwc.c	/^	u32			dma_chan[SATA_DWC_QCMD_MAX];$/;"	m	struct:sata_dwc_device_port	typeref:typename:u32[]	file:
dma_chan	drivers/dma/lpc32xx_dma.c	/^	struct dmac_chan_reg dma_chan[8];$/;"	m	struct:dma_reg	typeref:struct:dmac_chan_reg[8]	file:
dma_chan_en	drivers/block/sata_dwc.c	/^	struct dmareg			dma_chan_en;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
dma_chan_regs	drivers/block/sata_dwc.c	/^struct dma_chan_regs {$/;"	s	file:
dma_channel	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct dma_channel {$/;"	s
dma_channel	drivers/usb/musb-new/musb_dma.h	/^struct dma_channel {$/;"	s
dma_channel_status	drivers/usb/musb-new/musb_dma.h	/^dma_channel_status(struct dma_channel *c)$/;"	f	typeref:enum:dma_channel_status
dma_channel_status	drivers/usb/musb-new/musb_dma.h	/^enum dma_channel_status {$/;"	g
dma_check	drivers/dma/fsl_dma.c	/^static uint dma_check(void) {$/;"	f	typeref:typename:uint	file:
dma_clk	arch/arm/dts/at91sam9263.dtsi	/^					dma_clk: dma_clk {$/;"	l
dma_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
dma_cmd	board/micronas/vct/scc.h	/^	u32 dma_cmd:4;		\/* last executed command on this DMA	*\/$/;"	m	struct:scc_dma_state	typeref:typename:u32:4
dma_control	arch/powerpc/include/asm/immap_512x.h	/^	u32	dma_control;	\/* DMA control for IP bus, AMBA IF + DMA revision *\/$/;"	m	struct:fec512x	typeref:typename:u32
dma_control	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 dma_control;		\/* MBAR_ETH + 0x1F4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
dma_control_reg	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE dma_control_reg;  \/* DMA Control Register *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
dma_controller	drivers/usb/musb-new/musb_core.h	/^	struct dma_controller	*dma_controller;$/;"	m	struct:musb	typeref:struct:dma_controller *
dma_controller	drivers/usb/musb-new/musb_dma.h	/^struct dma_controller {$/;"	s
dma_ctl	drivers/spi/tegra114_spi.c	/^	u32 dma_ctl;	\/* 020:SPI_DMA_CTL register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
dma_ctl	drivers/spi/tegra20_sflash.c	/^	u32 dma_ctl;	\/* SPI_DMA_CTL_0 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
dma_ctl	drivers/spi/tegra20_slink.c	/^	u32 dma_ctl;	\/* SLINK_DMA_CTL_0 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
dma_ctl	drivers/spi/tegra210_qspi.c	/^	u32 dma_ctl;	\/* 020:QSPI_DMA_CTL register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
dma_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct dma_ctrl {$/;"	s
dma_ctrl	arch/m68k/include/asm/immap_5275.h	/^typedef struct	dma_ctrl {$/;"	s
dma_ctrl	drivers/net/pch_gbe.h	/^	u32 dma_ctrl;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
dma_ctrl	drivers/video/da8xx-fb.c	/^	u32	dma_ctrl;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
dma_ctrl	include/usb/fotg210.h	/^	uint32_t dma_ctrl; \/* 0x1c8: DMA Control Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
dma_ctrlflags	drivers/net/bcm-sf2-eth-gmac.c	/^static uint32_t dma_ctrlflags(uint32_t mask, uint32_t flags)$/;"	f	typeref:typename:uint32_t	file:
dma_d	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_d;	\/* Pointer to D_signature *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_d	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_d;	\/* Pointer to D_signature *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_data	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 dma_data;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
dma_data_direction	arch/arm/include/asm/dma-mapping.h	/^enum dma_data_direction {$/;"	g
dma_data_direction	arch/avr32/include/asm/dma-mapping.h	/^enum dma_data_direction {$/;"	g
dma_data_direction	arch/nds32/include/asm/dma-mapping.h	/^enum dma_data_direction {$/;"	g
dma_data_direction	drivers/block/sata_dwc.h	/^enum dma_data_direction {$/;"	g
dma_dbcr	arch/m68k/include/asm/immap_5272.h	/^	ulong dma_dbcr;$/;"	m	struct:dma_ctrl	typeref:typename:ulong
dma_ddar	arch/m68k/include/asm/immap_5272.h	/^	ulong dma_ddar;$/;"	m	struct:dma_ctrl	typeref:typename:ulong
dma_deinit	drivers/net/bcm-sf2-eth-gmac.c	/^static int dma_deinit(struct eth_dma *dma)$/;"	f	typeref:typename:int	file:
dma_descriptor	drivers/net/bfin_mac.h	/^typedef struct dma_descriptor {$/;"	s
dma_descriptor	drivers/net/tsi108_eth.c	/^struct dma_descriptor {$/;"	s	file:
dma_dest	arch/arm/include/asm/arch-lpc32xx/dma.h	/^	u32 dma_dest;$/;"	m	struct:lpc32xx_dmac_ll	typeref:typename:u32
dma_dev_priv	include/dma.h	/^struct dma_dev_priv {$/;"	s
dma_dir	arch/m68k/include/asm/immap_5272.h	/^	ushort dma_dir;$/;"	m	struct:dma_ctrl	typeref:typename:ushort
dma_dir	drivers/block/sata_dwc.h	/^	int			dma_dir;$/;"	m	struct:ata_queued_cmd	typeref:typename:int
dma_dir	drivers/mmc/mxcmmc.c	/^	unsigned int		dma_dir;$/;"	m	struct:mxcmci_host	typeref:typename:unsigned int	file:
dma_direction	include/dma.h	/^enum dma_direction {$/;"	g
dma_dmr	arch/m68k/include/asm/immap_5272.h	/^	ulong dma_dmr;$/;"	m	struct:dma_ctrl	typeref:typename:ulong
dma_drs	board/micronas/vct/scc.h	/^	u32 dma_drs:2;		\/* DMA dir, either DMA_READ or DMA_WRITE*\/$/;"	m	struct:scc_dma_state	typeref:typename:u32:2
dma_dsar	arch/m68k/include/asm/immap_5272.h	/^	ulong dma_dsar;$/;"	m	struct:dma_ctrl	typeref:typename:ulong
dma_dst_addr	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 dma_dst_addr; \/* 0x1c *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
dma_dst_len	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 dma_dst_len; \/* 0x24 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
dma_end	drivers/video/da8xx-fb.c	/^	unsigned int		dma_end;$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned int	file:
dma_fairness	drivers/net/e1000.h	/^	uint8_t dma_fairness;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t
dma_fifo	include/usb/fotg210.h	/^	uint32_t dma_fifo; \/* 0x1c0: DMA Target FIFO Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
dma_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dma_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
dma_free_coherent	arch/arm/include/asm/dma-mapping.h	/^static inline void dma_free_coherent(void *addr)$/;"	f	typeref:typename:void
dma_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 dma_freq;		\/* offset 0x8 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
dma_frm_buf_base_addr_0	drivers/video/da8xx-fb.c	/^	u32	dma_frm_buf_base_addr_0;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
dma_frm_buf_base_addr_1	drivers/video/da8xx-fb.c	/^	u32	dma_frm_buf_base_addr_1;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
dma_frm_buf_ceiling_addr_0	drivers/video/da8xx-fb.c	/^	u32	dma_frm_buf_ceiling_addr_0;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
dma_frm_buf_ceiling_addr_1	drivers/video/da8xx-fb.c	/^	u32	dma_frm_buf_ceiling_addr_1;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
dma_fsm	board/micronas/vct/scc.c	/^static u32 dma_fsm[4][4] = {$/;"	v	typeref:typename:u32[4][4]	file:
dma_g_xy	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_g_xy;	\/* Pointer to Gx,y (elliptic curve) *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_g_xy	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_g_xy;	\/* Pointer to Gx,y (elliptic curve) *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_gbe	arch/arm/dts/k2e-netcp.dtsi	/^	dma_gbe: dma_gbe@0 {$/;"	l	label:knav_dmas
dma_gbe	arch/arm/dts/k2g-netcp.dtsi	/^	dma_gbe: dma_gbe@0 {$/;"	l	label:knav_dmas
dma_gbe	arch/arm/dts/k2hk-netcp.dtsi	/^	dma_gbe: dma_gbe@0 {$/;"	l	label:knav_dmas
dma_gbe	arch/arm/dts/k2l-netcp.dtsi	/^	dma_gbe: dma_gbe@0 {$/;"	l	label:knav_dmas
dma_get_device	drivers/dma/dma-uclass.c	/^int dma_get_device(u32 transfer_type, struct udevice **devp)$/;"	f	typeref:typename:int
dma_hash	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_hash;	\/* Pointer to hash input *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_hash	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_hash;	\/* Pointer to hash input *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dma_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
dma_id	board/micronas/vct/scc.h	/^	u32 dma_id:8;		\/* DMA id, used for match with array idx*\/$/;"	m	struct:scc_dma_state	typeref:typename:u32:8
dma_id	drivers/block/sata_dwc.c	/^	struct dmareg			dma_id;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
dma_init	drivers/dma/fsl_dma.c	/^void dma_init(void) {$/;"	f	typeref:typename:void
dma_init	drivers/net/bcm-sf2-eth-gmac.c	/^static int dma_init(struct eth_dma *dma)$/;"	f	typeref:typename:int	file:
dma_interrupt_regs	drivers/block/sata_dwc.c	/^struct dma_interrupt_regs {$/;"	s	file:
dma_map_single	arch/arm/include/asm/dma-mapping.h	/^static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,$/;"	f	typeref:typename:unsigned long
dma_map_single	arch/avr32/include/asm/dma-mapping.h	/^static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,$/;"	f	typeref:typename:unsigned long
dma_map_single	arch/nds32/include/asm/dma-mapping.h	/^static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,$/;"	f	typeref:typename:unsigned long
dma_mapping_error	arch/arm/include/asm/dma-mapping.h	/^#define	dma_mapping_error(/;"	d
dma_mask	drivers/usb/gadget/pxa25x_udc.h	/^	u64					dma_mask;$/;"	m	struct:pxa25x_udc	typeref:typename:u64
dma_memcpy	arch/blackfin/lib/string.c	/^void *dma_memcpy(void *dst, const void *src, size_t count)$/;"	f	typeref:typename:void *
dma_memcpy	drivers/dma/dma-uclass.c	/^int dma_memcpy(void *dst, void *src, size_t len)$/;"	f	typeref:typename:int
dma_memcpy_nocache	arch/blackfin/lib/string.c	/^void dma_memcpy_nocache(void *dst, const void *src, size_t count)$/;"	f	typeref:typename:void
dma_meminit	drivers/dma/fsl_dma.c	/^void dma_meminit(uint val, uint size)$/;"	f	typeref:typename:void
dma_mode	drivers/block/sata_dwc.h	/^	u8			dma_mode;$/;"	m	struct:ata_device	typeref:typename:u8
dma_mst_ctrl	drivers/mtd/nand/tegra_nand.h	/^	u32	dma_mst_ctrl;	\/* offset 30h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
dma_mword	include/ata.h	/^	unsigned short	dma_mword;	\/* multiple-word dma info *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
dma_nents	drivers/mmc/mxcmmc.c	/^	unsigned int		dma_nents;$/;"	m	struct:mxcmci_host	typeref:typename:unsigned int	file:
dma_opmode	drivers/net/calxedaxgmac.c	/^	u32 dma_opmode;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
dma_ops	include/dma.h	/^struct dma_ops {$/;"	s
dma_param_addr	drivers/video/mx3fb.c	/^static uint32_t dma_param_addr(enum ipu_channel channel)$/;"	f	typeref:typename:uint32_t	file:
dma_params	drivers/block/sata_dwc.c	/^	struct dmareg			dma_params[6];$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg[6]	file:
dma_pending	drivers/block/sata_dwc.c	/^	int			dma_pending[SATA_DWC_QCMD_MAX];$/;"	m	struct:sata_dwc_device_port	typeref:typename:int[]	file:
dma_pkey	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_pkey;	\/* Pointer to Wx,y (public key) *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_pkey	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_pkey;	\/* Pointer to Wx,y (public key) *\/$/;"	m	struct:pdb_mp_pub_k	typeref:typename:dma_addr_t
dma_pri_key	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_pri_key;	\/* Pointer to S (Private key) *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_q	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_q;	\/* Pointer to q (elliptic curve) *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_q	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_q;	\/* Pointer to q (elliptic curve) *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_r	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_r;	\/* Pointer to r (elliptic curve) *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_r	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_r;	\/* Pointer to r (elliptic curve) *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:dma_addr_t
dma_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dma_read_qos;			\/* 0x45100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
dma_reg	drivers/dma/lpc32xx_dma.c	/^struct dma_reg {$/;"	s	file:
dma_register	arch/blackfin/include/asm/dma.h	/^struct dma_register {$/;"	s
dma_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct dma_regs {$/;"	s
dma_regs	drivers/net/cpsw.c	/^	void				*dma_regs;$/;"	m	struct:cpsw_priv	typeref:typename:void *	file:
dma_regs	drivers/net/dwc_eth_qos.c	/^	struct eqos_dma_regs *dma_regs;$/;"	m	struct:eqos_priv	typeref:struct:eqos_dma_regs *	file:
dma_regs	drivers/usb/gadget/atmel_usba_udc.h	/^	void					*dma_regs;$/;"	m	struct:usba_ep	typeref:typename:void *
dma_regs_p	drivers/net/designware.h	/^	struct eth_dma_regs *dma_regs_p;$/;"	m	struct:dw_eth_dev	typeref:struct:eth_dma_regs *
dma_rsvd0	include/MCD_dma.h	/^	u16 dma_rsvd0;$/;"	m	struct:dmaRegs_s	typeref:typename:u16
dma_rsvd1	include/MCD_dma.h	/^	u32 dma_rsvd1;		\/* reserved *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
dma_rsvd2	include/MCD_dma.h	/^	u32 dma_rsvd2;		\/* reserved *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
dma_rsvd3	include/MCD_dma.h	/^	u32 dma_rsvd3[31];	\/* reserved *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32[31]
dma_rx_dump	drivers/net/bcm-sf2-eth-gmac.c	/^static void dma_rx_dump(struct eth_dma *dma)$/;"	f	typeref:typename:void	file:
dma_rx_init	drivers/net/bcm-sf2-eth-gmac.c	/^static int dma_rx_init(struct eth_dma *dma)$/;"	f	typeref:typename:int	file:
dma_src	arch/arm/include/asm/arch-lpc32xx/dma.h	/^	u32 dma_src;$/;"	m	struct:lpc32xx_dmac_ll	typeref:typename:u32
dma_src_addr	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 dma_src_addr; \/* 0x18 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
dma_src_len	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 dma_src_len; \/* 0x20 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
dma_src_sel	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 dma_src_sel;	\/* 0xA0 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
dma_start	drivers/video/da8xx-fb.c	/^	unsigned int		dma_start;$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned int	file:
dma_state_process	board/micronas/vct/scc.c	/^static void dma_state_process(struct scc_dma_state *dma_state, u32 cmd)$/;"	f	typeref:typename:void	file:
dma_state_process_dma_command	board/micronas/vct/scc.c	/^static void dma_state_process_dma_command(struct scc_dma_state *dma_state,$/;"	f	typeref:typename:void	file:
dma_status	board/micronas/vct/scc.h	/^	u32 dma_status:2;	\/* state of DMA, of the DMA_STATE_ const*\/$/;"	m	struct:scc_dma_state	typeref:typename:u32:2
dma_status	drivers/net/calxedaxgmac.c	/^	u32 dma_status;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
dma_status	drivers/net/pch_gbe.h	/^	u8 dma_status;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u8
dma_status	drivers/net/pch_gbe.h	/^	u8 dma_status;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u8
dma_status	drivers/usb/dwc3/dwc3-omap.c	/^	u32			dma_status:1;$/;"	m	struct:dwc3_omap	typeref:typename:u32:1	file:
dma_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 dma_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
dma_sync	drivers/dma/fsl_dma.c	/^static void dma_sync(void)$/;"	f	typeref:typename:void	file:
dma_sysadr0_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 dma_sysadr0_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
dma_t	arch/m68k/include/asm/immap_5272.h	/^} dma_t;$/;"	t	typeref:struct:dma_ctrl
dma_t	arch/m68k/include/asm/immap_5275.h	/^} dma_t;$/;"	t	typeref:struct:dma_ctrl
dma_test	drivers/block/sata_dwc.c	/^	struct dmareg			dma_test;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
dma_transfer_count	include/fis.h	/^	u32 dma_transfer_count;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u32
dma_tx_dump	drivers/net/bcm-sf2-eth-gmac.c	/^static void dma_tx_dump(struct eth_dma *dma)$/;"	f	typeref:typename:void	file:
dma_tx_init	drivers/net/bcm-sf2-eth-gmac.c	/^static int dma_tx_init(struct eth_dma *dma)$/;"	f	typeref:typename:int	file:
dma_type	drivers/net/altera_tse.h	/^	int dma_type;$/;"	m	struct:altera_tse_priv	typeref:typename:int
dma_u	drivers/crypto/fsl/desc.h	/^	dma_addr_t dma_u;	\/* Pointer to Per Message Random *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:dma_addr_t
dma_ultra	include/ata.h	/^	unsigned short  dma_ultra;	\/*  *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
dma_unmap_single	arch/arm/include/asm/dma-mapping.h	/^static inline void dma_unmap_single(volatile void *vaddr, size_t len,$/;"	f	typeref:typename:void
dma_unmap_single	arch/avr32/include/asm/dma-mapping.h	/^static inline void dma_unmap_single(volatile void *vaddr, size_t len,$/;"	f	typeref:typename:void
dma_unmap_single	arch/nds32/include/asm/dma-mapping.h	/^static inline void dma_unmap_single(volatile void *vaddr, size_t len,$/;"	f	typeref:typename:void
dma_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	dma_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
dmaaddr_t	include/linux/compat.h	/^typedef unsigned long dmaaddr_t;$/;"	t	typeref:typename:unsigned long
dmac	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 dmac;		\/* 0x80 internal DMA control *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
dmac	arch/arm/include/asm/arch/mmc.h	/^	u32 dmac;		\/* 0x80 internal DMA control *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
dmac_bus	arch/arm/dts/rk3399.dtsi	/^		dmac_bus: dma-controller@ff6d0000 {$/;"	l
dmac_bus_ns	arch/arm/dts/rk3288.dtsi	/^		dmac_bus_ns: dma-controller@ff600000 {$/;"	l
dmac_bus_s	arch/arm/dts/rk3288.dtsi	/^		dmac_bus_s: dma-controller@ffb20000 {$/;"	l
dmac_chan_reg	drivers/dma/lpc32xx_dma.c	/^struct dmac_chan_reg {$/;"	s	file:
dmac_con0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dmac_con0;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dmac_con1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dmac_con1;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dmac_con2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int dmac_con2;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
dmac_ctrl	drivers/net/xilinx_ll_temac_sdma.h	/^enum dmac_ctrl {$/;"	g
dmac_peri	arch/arm/dts/rk3288.dtsi	/^		dmac_peri: dma-controller@ff250000 {$/;"	l
dmac_peri	arch/arm/dts/rk3399.dtsi	/^		dmac_peri: dma-controller@ff6e0000 {$/;"	l
dmac_s	arch/arm/dts/zynq-7000.dtsi	/^		dmac_s: dmac@f8003000 {$/;"	l	label:amba
dmachan	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static unsigned int dmachan = (unsigned int)-1; \/* Invalid channel *\/$/;"	v	typeref:typename:unsigned int	file:
dmack	board/freescale/common/qixis.h	/^	u8 dmack;$/;"	m	struct:qixis	typeref:typename:u8
dmaclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 dmaclk_ctrl;	\/* DMA Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
dmacpy	drivers/dma/fsl_dma.c	/^int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) {$/;"	f	typeref:typename:int
dmacr	drivers/block/dwc_ahsata.c	/^	u32 dmacr;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
dmacr	drivers/block/sata_dwc.c	/^	u32 dmacr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
dmacr	drivers/net/zynq_gem.c	/^	u32 dmacr; \/* 0x10 - DMA Control reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
dmacr	drivers/spi/lpc32xx_ssp.c	/^	u32 dmacr;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
dmacr	drivers/spi/rk_spi.h	/^	u32 dmacr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
dmacr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	dmacr1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dmacr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	dmacr1;$/;"	m	struct:ccsr_gur	typeref:typename:u32
dmacr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dmacr1;		\/* DMA control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
dmacrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 dmacrc;		\/* 0x064 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
dmactrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dmactrl;	\/* DMA Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
dmactrl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	dmactrl;	\/* 0x2402c - DMA Control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
dmactrl	include/tsec.h	/^	u32	dmactrl;	\/* DMA Control *\/$/;"	m	struct:tsec	typeref:typename:u32
dmadesc_fbhigh	include/pxa_lcd.h	/^	struct	pxafb_dma_descriptor *dmadesc_fbhigh;$/;"	m	struct:pxafb_info	typeref:struct:pxafb_dma_descriptor *
dmadesc_fblow	include/pxa_lcd.h	/^	struct	pxafb_dma_descriptor *dmadesc_fblow;$/;"	m	struct:pxafb_info	typeref:struct:pxafb_dma_descriptor *
dmadesc_palette	include/pxa_lcd.h	/^	struct	pxafb_dma_descriptor *dmadesc_palette;$/;"	m	struct:pxafb_info	typeref:struct:pxafb_dma_descriptor *
dmadone	examples/standalone/mem_to_mem_idma2intr.c	/^volatile int dmadone;$/;"	v	typeref:typename:volatile int
dmadone_handler	examples/standalone/mem_to_mem_idma2intr.c	/^void dmadone_handler (void *arg)$/;"	f	typeref:typename:void
dmadonep	examples/standalone/mem_to_mem_idma2intr.c	/^volatile int *dmadonep = &dmadone;$/;"	v	typeref:typename:volatile int *
dmadr	drivers/block/sata_dwc.c	/^	u32 dmadr[256];$/;"	m	struct:sata_dwc_regs	typeref:typename:u32[256]	file:
dmaerraddr	drivers/mmc/fsl_esdhc.c	/^	uint    dmaerraddr;	\/* DMA error address register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
dmaerrattr	drivers/mmc/fsl_esdhc.c	/^	uint    dmaerrattr;	\/* DMA error attribute register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
dmaes	include/andestech/andes_pcu.h	/^	unsigned int	dmaes;		\/* 0x38 - DMA Engine Selection *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
dmafifos	drivers/net/ftgmac100.h	/^	unsigned int	dmafifos;	\/* 0x3c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
dmafifos	drivers/net/ftmac100.h	/^	unsigned int	dmafifos;	\/* 0xc8 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
dmagrp_ctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	dmagrp_ctrl;			\/* 0x70 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
dmagrp_persecurity	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	dmagrp_persecurity;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
dmalist	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static struct lpc32xx_dmac_ll dmalist[ECCSTEPS * 2 + 1];$/;"	v	typeref:struct:lpc32xx_dmac_ll[]	file:
dmamac_addr	drivers/net/designware.h	/^	u32 dmamac_addr;$/;"	m	struct:dmamacdescr	typeref:typename:u32
dmamac_cntl	drivers/net/designware.h	/^	u32 dmamac_cntl;$/;"	m	struct:dmamacdescr	typeref:typename:u32
dmamac_next	drivers/net/designware.h	/^	u32 dmamac_next;$/;"	m	struct:dmamacdescr	typeref:typename:u32
dmamacdescr	drivers/net/designware.h	/^struct dmamacdescr {$/;"	s
dmamcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 dmamcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
dmar	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 dmar;$/;"	m	struct:gpt_regs	typeref:typename:u32
dmar	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 dmar;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
dmar	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 dmar;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
dmardlr	drivers/spi/rk_spi.h	/^	u32 dmardlr;		\/* 0x44 *\/$/;"	m	struct:rockchip_spi	typeref:typename:u32
dmareg	drivers/block/sata_dwc.c	/^struct dmareg {$/;"	s	file:
dmareqc	arch/m68k/include/asm/immap_5235.h	/^	u32 dmareqc;		\/* 0x14 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
dmarx	drivers/net/xilinx_axi_emac.c	/^	struct axidma_reg *dmarx;$/;"	m	struct:axidma_priv	typeref:struct:axidma_reg *	file:
dmarxe	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 dmarxe;$/;"	m	struct:linflex_fsl	typeref:typename:u32
dmasa	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int dmasa;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
dmasg	arch/blackfin/include/asm/dma.h	/^struct dmasg {$/;"	s
dmasg_large	arch/blackfin/include/asm/dma.h	/^struct dmasg_large {$/;"	s
dmasktrig	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dmasktrig;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
dmatdlr	drivers/spi/rk_spi.h	/^	u32 dmatdlr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
dmatirr	drivers/block/ftide020.h	/^	unsigned int	dmatirr;	\/* 0x0c - DMA Threshold\/Interrupt Reg *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
dmatx	drivers/net/xilinx_axi_emac.c	/^	struct axidma_reg *dmatx;$/;"	m	struct:axidma_priv	typeref:struct:axidma_reg *	file:
dmatxe	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 dmatxe;$/;"	m	struct:linflex_fsl	typeref:typename:u32
dmax	lib/zlib/inflate.h	/^    unsigned dmax;              \/* zlib header max distance (INFLATE_STRICT) *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
dmb	arch/arm/include/asm/barriers.h	/^#define dmb(/;"	d
dmb	arch/nds32/include/asm/io.h	/^#define dmb(/;"	d
dmb	arch/x86/include/asm/io.h	/^#define dmb(/;"	d
dmc	arch/arm/dts/rk3288.dtsi	/^	dmc: dmc@ff610000 {$/;"	l
dmc_channels	arch/arm/mach-exynos/clock_init.h	/^	uint8_t dmc_channels;		\/* number of memory channels *\/$/;"	m	struct:mem_timings	typeref:typename:uint8_t
dmc_config_mrs	arch/arm/mach-exynos/dmc_common.c	/^void dmc_config_mrs(struct mem_timings *mem, uint32_t *directcmd)$/;"	f	typeref:typename:void
dmc_config_mrs	arch/arm/mach-exynos/dmc_init_exynos4.c	/^static void dmc_config_mrs(struct exynos4_dmc *dmc, int chip)$/;"	f	typeref:typename:void	file:
dmc_config_prech	arch/arm/mach-exynos/dmc_common.c	/^void dmc_config_prech(struct mem_timings *mem, uint32_t *directcmd)$/;"	f	typeref:typename:void
dmc_config_zq	arch/arm/mach-exynos/dmc_common.c	/^int dmc_config_zq(struct mem_timings *mem, uint32_t *phy0_con16,$/;"	f	typeref:typename:int
dmc_ddrcfg	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrcfg;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_ddrctl	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrctl;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_ddrmr	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrmr;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_ddrmr1	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrmr1;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_ddrtr0	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrtr0;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_ddrtr1	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrtr1;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_ddrtr2	arch/blackfin/cpu/initcode.c	/^	u32 dmc_ddrtr2;$/;"	m	struct:ddr_config	typeref:typename:u32	file:
dmc_freq_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dmc_freq_ctrl;		\/* 0x10030914 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dmc_freq_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dmc_freq_ctrl;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dmc_freq_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dmc_freq_ctrl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dmc_get_read_offset_value	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static unsigned int dmc_get_read_offset_value(struct exynos5420_phy_control$/;"	f	typeref:typename:unsigned int	file:
dmc_init	arch/arm/mach-exynos/dmc_init_exynos4.c	/^static void dmc_init(struct exynos4_dmc *dmc)$/;"	f	typeref:typename:void	file:
dmc_pause_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dmc_pause_ctrl;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dmc_set_read_offset_value	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static void dmc_set_read_offset_value(struct exynos5420_phy_control *phy_ctrl,$/;"	f	typeref:typename:void	file:
dmc_valid_window_test_vector	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static bool dmc_valid_window_test_vector(int ch, int byte_lane)$/;"	f	typeref:typename:bool	file:
dmcr	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 dmcr;	\/* 0x28 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
dmcr	arch/arm/include/asm/arch/rsb.h	/^	u32 dmcr;	\/* 0x28 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
dmfc_size_23	drivers/video/ipu_disp.c	/^static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;$/;"	v	typeref:typename:int	file:
dmfc_size_24	drivers/video/ipu_disp.c	/^static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;$/;"	v	typeref:typename:int	file:
dmfc_size_27	drivers/video/ipu_disp.c	/^static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;$/;"	v	typeref:typename:int	file:
dmfc_size_28	drivers/video/ipu_disp.c	/^static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;$/;"	v	typeref:typename:int	file:
dmfc_size_29	drivers/video/ipu_disp.c	/^static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;$/;"	v	typeref:typename:int	file:
dmfc_type_setup	drivers/video/ipu_disp.c	/^int dmfc_type_setup;$/;"	v	typeref:typename:int
dmibar	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t dmibar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
dmic_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 dmic_clk_cfg;	\/* 0x148 Digital Mic module clock*\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dmic_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 dmic_clk_cfg;	\/* 0x148 Digital Mic module clock*\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dmid_lsb	include/ddr_spd.h	/^	uint8_t dmid_lsb;		\/* 350 DRAM MfgID Code LSB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
dmid_lsb	include/ddr_spd.h	/^	unsigned char dmid_lsb;        \/* 148 DRAM MfgID Code LSB - JEP-106 *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
dmid_msb	include/ddr_spd.h	/^	uint8_t dmid_msb;		\/* 351 DRAM MfgID Code MSB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
dmid_msb	include/ddr_spd.h	/^	unsigned char dmid_msb;        \/* 149 DRAM MfgID Code MSB - JEP-106 *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
dmm_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void dmm_init(u32 base)$/;"	f	typeref:typename:void
dmm_lisa_map_0	arch/arm/include/asm/emif.h	/^	u32 dmm_lisa_map_0;$/;"	m	struct:dmm_lisa_map_regs	typeref:typename:u32
dmm_lisa_map_1	arch/arm/include/asm/emif.h	/^	u32 dmm_lisa_map_1;$/;"	m	struct:dmm_lisa_map_regs	typeref:typename:u32
dmm_lisa_map_2	arch/arm/include/asm/emif.h	/^	u32 dmm_lisa_map_2;$/;"	m	struct:dmm_lisa_map_regs	typeref:typename:u32
dmm_lisa_map_3	arch/arm/include/asm/emif.h	/^	u32 dmm_lisa_map_3;$/;"	m	struct:dmm_lisa_map_regs	typeref:typename:u32
dmm_lisa_map_regs	arch/arm/include/asm/emif.h	/^struct dmm_lisa_map_regs {$/;"	s
dmmc_busy_wait	drivers/mmc/davinci_mmc.c	/^static int dmmc_busy_wait(volatile struct davinci_mmc_regs *regs)$/;"	f	typeref:typename:int	file:
dmmc_check_status	drivers/mmc/davinci_mmc.c	/^static int dmmc_check_status(volatile struct davinci_mmc_regs *regs,$/;"	f	typeref:typename:int	file:
dmmc_init	drivers/mmc/davinci_mmc.c	/^static int dmmc_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
dmmc_ops	drivers/mmc/davinci_mmc.c	/^static const struct mmc_ops dmmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
dmmc_send_cmd	drivers/mmc/davinci_mmc.c	/^dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
dmmc_set_clock	drivers/mmc/davinci_mmc.c	/^static void dmmc_set_clock(struct mmc *mmc, uint clock)$/;"	f	typeref:typename:void	file:
dmmc_set_ios	drivers/mmc/davinci_mmc.c	/^static void dmmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
dmmc_wait_fifo_status	drivers/mmc/davinci_mmc.c	/^dmmc_wait_fifo_status(volatile struct davinci_mmc_regs *regs, uint status)$/;"	f	typeref:typename:int	file:
dmmclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int dmmclkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
dmr0	arch/m68k/include/asm/immap_5235.h	/^	u32 dmr0;		\/* 0x0C mask register block 0 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
dmr0	arch/m68k/include/asm/immap_5307.h	/^	u32 dmr0;$/;"	m	struct:sdramctrl	typeref:typename:u32
dmr1	arch/m68k/include/asm/immap_5235.h	/^	u32 dmr1;		\/* 0x14 mask register block 1 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
dmr1	arch/m68k/include/asm/immap_5307.h	/^	u32 dmr1;$/;"	m	struct:sdramctrl	typeref:typename:u32
dmsg	board/freescale/common/qixis.h	/^	u8 dmsg;$/;"	m	struct:qixis	typeref:typename:u8
dmu_object_type	include/zfs/dmu.h	/^typedef enum dmu_object_type {$/;"	g
dmu_object_type_t	include/zfs/dmu.h	/^} dmu_object_type_t;$/;"	t	typeref:enum:dmu_object_type
dmu_objset_type	include/zfs/dmu.h	/^typedef enum dmu_objset_type {$/;"	g
dmu_objset_type_t	include/zfs/dmu.h	/^} dmu_objset_type_t;$/;"	t	typeref:enum:dmu_objset_type
dmu_read	fs/zfs/zfs.c	/^dmu_read(dnode_end_t *dn, uint64_t blkid, void **buf,$/;"	f	typeref:typename:int	file:
dmx_conf12	board/keymile/common/common.h	/^	u8	dmx_conf12;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
dn	fs/zfs/zfs.c	/^		dnode_end_t dn;$/;"	m	struct:dnode_get_path::dnode_chain	typeref:typename:dnode_end_t	file:
dn	fs/zfs/zfs.c	/^	dnode_phys_t dn;$/;"	m	struct:dnode_end	typeref:typename:dnode_phys_t	file:
dn_blkptr	include/zfs/dnode.h	/^	blkptr_t dn_blkptr[1];$/;"	m	struct:dnode_phys	typeref:typename:blkptr_t[1]
dn_bonus	include/zfs/dnode.h	/^	uint8_t dn_bonus[DN_MAX_BONUSLEN - sizeof(blkptr_t)];$/;"	m	struct:dnode_phys	typeref:typename:uint8_t[]
dn_bonuslen	include/zfs/dnode.h	/^	uint16_t dn_bonuslen;		\/* length of dn_bonus *\/$/;"	m	struct:dnode_phys	typeref:typename:uint16_t
dn_bonustype	include/zfs/dnode.h	/^	uint8_t dn_bonustype;		\/* type of data in bonus buffer *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_checksum	include/zfs/dnode.h	/^	uint8_t	dn_checksum;		\/* ZIO_CHECKSUM type *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_compress	include/zfs/dnode.h	/^	uint8_t	dn_compress;		\/* ZIO_COMPRESS type *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_datablkszsec	include/zfs/dnode.h	/^	uint16_t dn_datablkszsec;	\/* data block size in 512b sectors *\/$/;"	m	struct:dnode_phys	typeref:typename:uint16_t
dn_flags	include/zfs/dnode.h	/^	uint8_t dn_flags;		\/* DNODE_FLAG_* *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_indblkshift	include/zfs/dnode.h	/^	uint8_t dn_indblkshift;		\/* ln2(indirect block size) *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_maxblkid	include/zfs/dnode.h	/^	uint64_t dn_maxblkid;		\/* largest allocated block ID *\/$/;"	m	struct:dnode_phys	typeref:typename:uint64_t
dn_nblkptr	include/zfs/dnode.h	/^	uint8_t dn_nblkptr;		\/* length of dn_blkptr *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_nlevels	include/zfs/dnode.h	/^	uint8_t dn_nlevels;		\/* 1=dn_blkptr->data blocks *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_pad2	include/zfs/dnode.h	/^	uint8_t dn_pad2[4];$/;"	m	struct:dnode_phys	typeref:typename:uint8_t[4]
dn_pad3	include/zfs/dnode.h	/^	uint64_t dn_pad3[4];$/;"	m	struct:dnode_phys	typeref:typename:uint64_t[4]
dn_spill	include/zfs/dnode.h	/^	blkptr_t dn_spill;$/;"	m	struct:dnode_phys	typeref:typename:blkptr_t
dn_spread_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	dn_spread_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
dn_spread_ctl1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	dn_spread_ctl1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
dn_spread_ctl2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	dn_spread_ctl2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
dn_type	include/zfs/dnode.h	/^	uint8_t dn_type;		\/* dmu_object_type_t *\/$/;"	m	struct:dnode_phys	typeref:typename:uint8_t
dn_used	include/zfs/dnode.h	/^	uint64_t dn_used;		\/* bytes (or sectors) of disk space *\/$/;"	m	struct:dnode_phys	typeref:typename:uint64_t
dnet_device	drivers/net/dnet.c	/^struct dnet_device {$/;"	s	file:
dnet_eth_initialize	drivers/net/dnet.c	/^int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr)$/;"	f	typeref:typename:int
dnet_halt	drivers/net/dnet.c	/^static void dnet_halt(struct eth_device *netdev)$/;"	f	typeref:typename:void	file:
dnet_init	drivers/net/dnet.c	/^static int dnet_init(struct eth_device *netdev, bd_t *bd)$/;"	f	typeref:typename:int	file:
dnet_mdio_read	drivers/net/dnet.c	/^static u16 dnet_mdio_read(struct dnet_device *dnet, u8 reg)$/;"	f	typeref:typename:u16	file:
dnet_mdio_write	drivers/net/dnet.c	/^static void dnet_mdio_write(struct dnet_device *dnet, u8 reg, u16 value)$/;"	f	typeref:typename:void	file:
dnet_phy_init	drivers/net/dnet.c	/^static int dnet_phy_init(struct dnet_device *dnet)$/;"	f	typeref:typename:int	file:
dnet_phy_reset	drivers/net/dnet.c	/^static void dnet_phy_reset(struct dnet_device *dnet)$/;"	f	typeref:typename:void	file:
dnet_readw_mac	drivers/net/dnet.c	/^u16 dnet_readw_mac(struct dnet_device *dnet, u16 reg)$/;"	f	typeref:typename:u16
dnet_recv	drivers/net/dnet.c	/^static int dnet_recv(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
dnet_registers	drivers/net/dnet.h	/^struct dnet_registers {$/;"	s
dnet_send	drivers/net/dnet.c	/^static int dnet_send(struct eth_device *netdev, void *packet, int length)$/;"	f	typeref:typename:int	file:
dnet_set_hwaddr	drivers/net/dnet.c	/^static void dnet_set_hwaddr(struct eth_device *netdev)$/;"	f	typeref:typename:void	file:
dnet_writew_mac	drivers/net/dnet.c	/^void dnet_writew_mac(struct dnet_device *dnet, u16 reg, u16 val)$/;"	f	typeref:typename:void
dnext	fs/ubifs/ubifs.h	/^	struct ubifs_orphan *dnext;$/;"	m	struct:ubifs_orphan	typeref:struct:ubifs_orphan *
dnlal0	include/tsi148.h	/^	unsigned int dnlal0;                  \/* 0x53c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dnlal1	include/tsi148.h	/^	unsigned int dnlal1;                  \/* 0x5bc         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dnlau0	include/tsi148.h	/^	unsigned int dnlau0;                  \/* 0x538         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dnlau1	include/tsi148.h	/^	unsigned int dnlau1;                  \/* 0x5b8         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dnload_request_complete	drivers/usb/gadget/f_dfu.c	/^static void dnload_request_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
dnload_request_flush	drivers/usb/gadget/f_dfu.c	/^static void dnload_request_flush(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
dnode	fs/zfs/zfs.c	/^	dnode_end_t dnode;$/;"	m	struct:zfs_data	typeref:typename:dnode_end_t	file:
dnode_buf	fs/zfs/zfs.c	/^	dnode_phys_t *dnode_buf;$/;"	m	struct:zfs_data	typeref:typename:dnode_phys_t *	file:
dnode_chain	fs/zfs/zfs.c	/^	struct dnode_chain {$/;"	s	function:dnode_get_path	file:
dnode_end	fs/zfs/zfs.c	/^	uint64_t dnode_end;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
dnode_end	fs/zfs/zfs.c	/^typedef struct dnode_end {$/;"	s	file:
dnode_end_t	fs/zfs/zfs.c	/^} dnode_end_t;$/;"	t	typeref:struct:dnode_end	file:
dnode_endian	fs/zfs/zfs.c	/^	zfs_endian_t dnode_endian;$/;"	m	struct:zfs_data	typeref:typename:zfs_endian_t	file:
dnode_get	fs/zfs/zfs.c	/^dnode_get(dnode_end_t *mdn, uint64_t objnum, uint8_t type,$/;"	f	typeref:typename:int	file:
dnode_get_fullpath	fs/zfs/zfs.c	/^dnode_get_fullpath(const char *fullpath, dnode_end_t *mdn,$/;"	f	typeref:typename:int	file:
dnode_get_path	fs/zfs/zfs.c	/^dnode_get_path(dnode_end_t *mdn, const char *path_in, dnode_end_t *dn,$/;"	f	typeref:typename:int	file:
dnode_mdn	fs/zfs/zfs.c	/^	dnode_phys_t *dnode_mdn;$/;"	m	struct:zfs_data	typeref:typename:dnode_phys_t *	file:
dnode_phys	include/zfs/dnode.h	/^typedef struct dnode_phys {$/;"	s
dnode_phys_t	include/zfs/dnode.h	/^} dnode_phys_t;$/;"	t	typeref:struct:dnode_phys
dnode_start	fs/zfs/zfs.c	/^	uint64_t dnode_start;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
dns_handler	net/dns.c	/^static void dns_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
dns_our_port	net/dns.c	/^static int dns_our_port;$/;"	v	typeref:typename:int	file:
dns_query_type	net/dns.h	/^enum dns_query_type {$/;"	g
dns_send	net/dns.c	/^static void dns_send(void)$/;"	f	typeref:typename:void	file:
dns_start	net/dns.c	/^void dns_start(void)$/;"	f	typeref:typename:void
dns_timeout_handler	net/dns.c	/^static void dns_timeout_handler(void)$/;"	f	typeref:typename:void	file:
do_address	arch/powerpc/cpu/mpc512x/i2c.c	/^static int do_address (uchar chip, char rdwr_flag)$/;"	f	typeref:typename:int	file:
do_address	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int do_address(uchar chip, char rdwr_flag)$/;"	f	typeref:typename:int	file:
do_aes	cmd/aes.c	/^static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_afs	cmd/armflash.c	/^static int do_afs(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ambapp_print	cmd/ambapp.c	/^int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ar934x_showclk	arch/mips/mach-ath79/ar934x/clk.c	/^int do_ar934x_showclk(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_arc_cmd	board/Arcturus/ucp1020/cmd_arc.c	/^static int do_arc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_atf	board/cavium/thunderx/atf.c	/^int do_atf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_authenticate_image	arch/arm/imx-common/hab.c	/^static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_autoconf	tools/moveconfig.py	/^    def do_autoconf(self):$/;"	m	class:Slot
do_autoprobe	test/dm/test-main.c	/^static int do_autoprobe(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
do_bad_error	arch/arm/lib/interrupts_64.c	/^void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_bad_fiq	arch/arm/lib/interrupts_64.c	/^void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_bad_irq	arch/arm/lib/interrupts_64.c	/^void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_bad_sync	arch/arm/lib/interrupts_64.c	/^void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_bdinfo	cmd/bdinfo.c	/^int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bdinfo	cmd/bdinfo.c	/^int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bdinfo	cmd/bdinfo.c	/^static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_bedbug_asm	cmd/bedbug.c	/^int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_break	cmd/bedbug.c	/^int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_breakpoint	cmd/bedbug.c	/^void do_bedbug_breakpoint (struct pt_regs *regs)$/;"	f	typeref:typename:void
do_bedbug_continue	cmd/bedbug.c	/^int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_dis	cmd/bedbug.c	/^int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_next	cmd/bedbug.c	/^int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_rdump	cmd/bedbug.c	/^int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_stack	cmd/bedbug.c	/^int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bedbug_step	cmd/bedbug.c	/^int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_blkcache	cmd/blkcache.c	/^static int do_blkcache(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_blob	cmd/blob.c	/^static int do_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_bmp	cmd/bmp.c	/^static int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_bmp_display	cmd/bmp.c	/^static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_bmp_info	cmd/bmp.c	/^static int do_bmp_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_board_detect	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void __weak do_board_detect(void)$/;"	f	typeref:typename:void __weak
do_board_detect	board/ti/am57xx/board.c	/^void do_board_detect(void)$/;"	f	typeref:typename:void
do_board_detect	board/ti/dra7xx/evm.c	/^void do_board_detect(void)$/;"	f	typeref:typename:void
do_board_led	board/siemens/common/board.c	/^static int do_board_led(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_boostage	cmd/bootstage.c	/^static int do_boostage(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_boot_mode	arch/arm/imx-common/cmd_bmode.c	/^static int do_boot_mode(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_bootaux	arch/arm/imx-common/imx_bootaux.c	/^int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootd	board/gdsys/p1022/controlcenterd.c	/^int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootd	cmd/bootm.c	/^int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootefi	cmd/bootefi.c	/^static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_bootefi_exec	cmd/bootefi.c	/^static unsigned long do_bootefi_exec(void *efi, void *fdt)$/;"	f	typeref:typename:unsigned long	file:
do_bootelf	cmd/elf.c	/^int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootelf_exec	cmd/elf.c	/^static unsigned long do_bootelf_exec(ulong (*entry)(int, char * const[]),$/;"	f	typeref:typename:unsigned long	file:
do_booti	cmd/booti.c	/^int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootldr	cmd/bootldr.c	/^int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootm	cmd/bootm.c	/^int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootm_integrity	common/bootm_os.c	/^static int do_bootm_integrity(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_linux	arch/arc/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/arm/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_bootm_linux	arch/avr32/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/blackfin/lib/boot.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/m68k/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/microblaze/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_bootm_linux	arch/mips/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_bootm_linux	arch/nds32/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/nios2/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/openrisc/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_bootm_linux	arch/powerpc/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)$/;"	f	typeref:typename:noinline int
do_bootm_linux	arch/sandbox/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/sh/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/sparc/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t * images)$/;"	f	typeref:typename:int
do_bootm_linux	arch/x86/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_bootm_linux	arch/xtensa/lib/bootm.c	/^int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)$/;"	f	typeref:typename:int
do_bootm_lynxkdi	common/bootm_os.c	/^static int do_bootm_lynxkdi(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_netbsd	common/bootm_os.c	/^static int do_bootm_netbsd(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_on_complete	drivers/usb/gadget/f_fastboot.c	/^static void do_bootm_on_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
do_bootm_openrtos	common/bootm_os.c	/^static int do_bootm_openrtos(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_ose	common/bootm_os.c	/^static int do_bootm_ose(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_plan9	common/bootm_os.c	/^static int do_bootm_plan9(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_qnxelf	common/bootm_os.c	/^static int do_bootm_qnxelf(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_rtems	common/bootm_os.c	/^static int do_bootm_rtems(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_standalone	common/bootm_os.c	/^static int do_bootm_standalone(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootm_states	common/bootm.c	/^int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_bootm_subcommand	cmd/bootm.c	/^static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_bootm_vxworks	common/bootm_os.c	/^static int do_bootm_vxworks(int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
do_bootmenu	cmd/bootmenu.c	/^int do_bootmenu(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_bootp	cmd/net.c	/^static int do_bootp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_bootstage_report	cmd/bootstage.c	/^static int do_bootstage_report(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_bootstage_stash	cmd/bootstage.c	/^static int do_bootstage_stash(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_bootstrap	board/amcc/acadia/cmd_acadia.c	/^static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_bootvx	cmd/elf.c	/^int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bootvx_fdt	common/bootm_os.c	/^void do_bootvx_fdt(bootm_headers_t *images)$/;"	f	typeref:typename:void
do_bootz	cmd/bootz.c	/^int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_break	include/bedbug/type.h	/^	void (*do_break) (cmd_tbl_t *, int, int, char * const []);$/;"	m	struct:__anon3619a6480108	typeref:typename:void (*)(cmd_tbl_t *,int,int,char * const[])
do_brginfo	cmd/immap.c	/^do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_bridge	arch/arm/mach-socfpga/misc.c	/^int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_brightness	board/BuS/eb_cpu5282/eb_cpu5282.c	/^int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_budget_space	fs/ubifs/budget.c	/^static int do_budget_space(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
do_bug0039_workaround	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void do_bug0039_workaround(u32 base)$/;"	f	typeref:typename:void	file:
do_bus_fault	arch/arm/lib/interrupts_m.c	/^void do_bus_fault(struct autosave_regs *autosave_regs)$/;"	f	typeref:typename:void
do_bypass_dpll	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void do_bypass_dpll(const struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:void	file:
do_bypass_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void do_bypass_dpll(u32 const base)$/;"	f	typeref:typename:void	file:
do_caddy	board/esd/vme8349/caddy.c	/^int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_calc_lpt_geom	fs/ubifs/lpt.c	/^static void do_calc_lpt_geom(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
do_can	board/tqc/tqm5200/cmd_stk52xx.c	/^int do_can(char * const argv[])$/;"	f	typeref:typename:int
do_cancel_out	arch/arm/cpu/armv7/omap-common/utils.c	/^static void do_cancel_out(u32 *num, u32 *den, u32 factor)$/;"	f	typeref:typename:void	file:
do_carinfo	cmd/immap.c	/^do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cbfs_fsinfo	cmd/cbfs.c	/^static int do_cbfs_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_cbfs_fsload	cmd/cbfs.c	/^static int do_cbfs_fsload(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_cbfs_init	cmd/cbfs.c	/^static int do_cbfs_init(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_cbfs_ls	cmd/cbfs.c	/^static int do_cbfs_ls(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_cdp	cmd/net.c	/^int do_cdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_check_chunk	common/dlmalloc.c	/^static void do_check_chunk(mchunkptr p)$/;"	f	typeref:typename:void	file:
do_check_free_chunk	common/dlmalloc.c	/^static void do_check_free_chunk(mchunkptr p)$/;"	f	typeref:typename:void	file:
do_check_inuse_chunk	common/dlmalloc.c	/^static void do_check_inuse_chunk(mchunkptr p)$/;"	f	typeref:typename:void	file:
do_check_malloced_chunk	common/dlmalloc.c	/^static void do_check_malloced_chunk(mchunkptr p, INTERNAL_SIZE_T s)$/;"	f	typeref:typename:void	file:
do_checkboardidhwk	board/keymile/common/common.c	/^static int do_checkboardidhwk(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_checktestboot	board/keymile/common/common.c	/^static int do_checktestboot(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_chip_config	arch/powerpc/cpu/ppc4xx/cmd_chip_config.c	/^static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_chip_config	board/spear/common/spr_misc.c	/^int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_chip_reset	arch/powerpc/cpu/ppc4xx/cpu.c	/^static int do_chip_reset (unsigned long sys0, unsigned long sys1)$/;"	f	typeref:typename:int	file:
do_chpart	cmd/mtdparts.c	/^static int do_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_cled	board/bct-brettl2/cled.c	/^int do_cled(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_clk	cmd/clk.c	/^static int do_clk(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_clk_dump	cmd/clk.c	/^static int do_clk_dump(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_clock	arch/arm/mach-rockchip/rk3288-board.c	/^static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_clocks	arch/powerpc/cpu/mpc512x/speed.c	/^int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_clocks	arch/powerpc/cpu/mpc83xx/speed.c	/^static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_clrlogo	drivers/video/cfb_console.c	/^static int do_clrlogo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_cmd	test/image/test-imagetools.sh	/^do_cmd()$/;"	f
do_cmd_redir	test/image/test-imagetools.sh	/^do_cmd_redir()$/;"	f
do_command	drivers/mmc/arm_pl180_mmci.c	/^static int do_command(struct mmc *dev, struct mmc_cmd *cmd)$/;"	f	typeref:typename:int	file:
do_config_file	scripts/basic/fixdep.c	/^static void do_config_file(const char *filename)$/;"	f	typeref:typename:void	file:
do_coninfo	cmd/console.c	/^static int do_coninfo(cmd_tbl_t *cmd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_cplbinfo	cmd/cplbinfo.c	/^int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/esd/common/xilinx_jtag/micro.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/freescale/ls1043ardb/cpld.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/freescale/ls1046ardb/cpld.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/freescale/t102xrdb/cpld.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/freescale/t104xrdb/cpld.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/freescale/t208xrdb/cpld.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/freescale/t4rdb/cpld.c	/^int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cpld	board/renesas/stout/cpld.c	/^static int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_cpu	cmd/cpu.c	/^static int do_cpu(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_cpu_detail	cmd/cpu.c	/^static int do_cpu_detail(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_cpu_list	cmd/cpu.c	/^static int do_cpu_list(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_cpu_waiting	arch/arm/mach-rmobile/lowlevel_init_ca15.S	/^do_cpu_waiting:$/;"	l
do_cramfs_load	cmd/cramfs.c	/^int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cramfs_ls	cmd/cramfs.c	/^int do_cramfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_cros_ec	cmd/cros_ec.c	/^static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_current	cmd/regulator.c	/^static int do_current(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_data_abort	arch/arm/lib/interrupts.c	/^void do_data_abort (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_data_transfer	drivers/mmc/arm_pl180_mmci.c	/^static int do_data_transfer(struct mmc *dev,$/;"	f	typeref:typename:int	file:
do_dataflash_mmc_mux	cmd/dataflash_mmc_mux.c	/^int do_dataflash_mmc_mux (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_date	cmd/date.c	/^static int do_date(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dcache	cmd/cache.c	/^static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dcache_dump	arch/blackfin/lib/cmd_cache_dump.c	/^int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_dcerror	arch/arc/lib/interrupts.c	/^void do_dcerror(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_ddr	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ddr_test	arch/arm/mach-keystone/cmd_ddr3.c	/^static int do_ddr_test(cmd_tbl_t *cmdtp,$/;"	f	typeref:typename:int	file:
do_ddrm	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static int do_ddrm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_defconfig	tools/moveconfig.py	/^    def do_defconfig(self):$/;"	m	class:Slot
do_dek_blob	arch/arm/imx-common/cmd_dek.c	/^static int do_dek_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_demo	cmd/demo.c	/^static int do_demo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_demo_hello	cmd/demo.c	/^static int do_demo_hello(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_demo_light	cmd/demo.c	/^static int do_demo_light(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_demo_list	cmd/demo.c	/^int do_demo_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_demo_status	cmd/demo.c	/^static int do_demo_status(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_dev	cmd/pmic.c	/^static int do_dev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dev	cmd/regulator.c	/^static int do_dev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dfu	cmd/dfu.c	/^static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dhcp	cmd/net.c	/^static int do_dhcp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dhry	lib/dhry/cmd_dhry.c	/^static int do_dhry(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_diag	cmd/diag.c	/^int do_diag (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_disable	cmd/regulator.c	/^static int do_disable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_disable_clocks	arch/arm/cpu/armv7/am33xx/clock.c	/^void do_disable_clocks(u32 *const *clk_domains,$/;"	f	typeref:typename:void
do_disable_clocks	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void do_disable_clocks(u32 const *clk_domains,$/;"	f	typeref:typename:void
do_diskboot	cmd/ide.c	/^int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_display	cmd/display.c	/^int do_display (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_div	include/div64.h	/^# define do_div(/;"	d
do_divzero	arch/arc/lib/interrupts.c	/^void do_divzero(unsigned long address, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_dm	test/dm/cmd_dm.c	/^static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dm_dump_all	test/dm/cmd_dm.c	/^static int do_dm_dump_all(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_dm_dump_devres	test/dm/cmd_dm.c	/^static int do_dm_dump_devres(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_dm_dump_uclass	test/dm/cmd_dm.c	/^static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_dma	drivers/mmc/mxcmmc.c	/^	int			do_dma;$/;"	m	struct:mxcmci_host	typeref:typename:int	file:
do_dmainfo	cmd/immap.c	/^do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_dns	cmd/net.c	/^int do_dns(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ds4510	drivers/misc/ds4510.c	/^int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_dtlb_miss	arch/arc/lib/interrupts.c	/^void do_dtlb_miss(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_dtt	cmd/dtt.c	/^int do_dtt(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_dump	cmd/pmic.c	/^static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_dwmci_init	drivers/mmc/exynos_dw_mmc.c	/^static int do_dwmci_init(struct dwmci_host *host)$/;"	f	typeref:typename:int	file:
do_e1000	drivers/net/e1000.c	/^static int do_e1000(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_e1000_spi	drivers/net/e1000_spi.c	/^int do_e1000_spi(cmd_tbl_t *cmdtp, struct e1000_hw *hw,$/;"	f	typeref:typename:int
do_e1000_spi_checksum	drivers/net/e1000_spi.c	/^static int do_e1000_spi_checksum(cmd_tbl_t *cmdtp, struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
do_e1000_spi_dump	drivers/net/e1000_spi.c	/^static int do_e1000_spi_dump(cmd_tbl_t *cmdtp, struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
do_e1000_spi_program	drivers/net/e1000_spi.c	/^static int do_e1000_spi_program(cmd_tbl_t *cmdtp, struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
do_e1000_spi_show	drivers/net/e1000_spi.c	/^static int do_e1000_spi_show(cmd_tbl_t *cmdtp, struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
do_ecc	arch/powerpc/cpu/mpc83xx/ecc.c	/^int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ecctest	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static int do_ecctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_echo	cmd/echo.c	/^static int do_echo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_echo	cmd/load.c	/^static int do_echo = 1;$/;"	v	typeref:typename:int	file:
do_econfig	board/gateworks/gw_ventana/eeprom.c	/^int do_econfig(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_edid	cmd/i2c.c	/^int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_eep_wren	board/esd/cpci2dp/cpci2dp.c	/^int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_eep_wren	board/esd/plu405/plu405.c	/^int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_eep_wren	board/esd/pmc405de/pmc405de.c	/^int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_eep_wren	board/esd/pmc440/cmd_pmc440.c	/^int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_eeprom	cmd/eeprom.c	/^int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_eeprom_cmd	drivers/net/dc2114x.c	/^static int do_eeprom_cmd(struct eth_device *dev, u_long ioaddr, int cmd, int cmd_len)$/;"	f	typeref:typename:int	file:
do_eeprom_cmd	examples/standalone/smc911x_eeprom.c	/^static int do_eeprom_cmd(struct eth_device *dev, int cmd, u8 reg)$/;"	f	typeref:typename:int	file:
do_eeprom_dump	board/micronas/vct/smc_eeprom.c	/^static int do_eeprom_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_eeprom_erase_all	board/micronas/vct/smc_eeprom.c	/^static int do_eeprom_erase_all(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_eeprom_save_mac	board/micronas/vct/smc_eeprom.c	/^static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_eeprom_wp	board/liebherr/lwmon5/lwmon5.c	/^int do_eeprom_wp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_efi	cmd/efi.c	/^static int do_efi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_efi_mem	cmd/efi.c	/^static int do_efi_mem(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_elf_reloc_fixups	arch/arc/lib/relocate.c	/^int do_elf_reloc_fixups(void)$/;"	f	typeref:typename:int
do_elf_reloc_fixups	arch/x86/lib/relocate.c	/^int do_elf_reloc_fixups(void)$/;"	f	typeref:typename:int
do_emif4_init	arch/arm/cpu/armv7/omap3/emif4.c	/^static void do_emif4_init(void)$/;"	f	typeref:typename:void	file:
do_enable	cmd/regulator.c	/^static int do_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_enable_clocks	arch/arm/cpu/armv7/am33xx/clock.c	/^void do_enable_clocks(u32 *const *clk_domains,$/;"	f	typeref:typename:void
do_enable_clocks	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void do_enable_clocks(u32 const *clk_domains,$/;"	f	typeref:typename:void
do_enable_hdmi	board/advantech/dms-ba16/dms-ba16.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/boundary/nitrogen6x/nitrogen6x.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/embest/mx6boards/mx6boards.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/freescale/mx6sabresd/mx6sabresd.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/ge/bx50v3/bx50v3.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/tbs/tbs2910/tbs2910.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enable_hdmi	board/wandboard/wandboard.c	/^static void do_enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
do_enterrcm	arch/arm/mach-tegra/cmd_enterrcm.c	/^static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_env	cmd/nvedit.c	/^static int do_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_env_ask	cmd/nvedit.c	/^int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_env_callback	cmd/nvedit.c	/^int do_env_callback(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_env_default	cmd/nvedit.c	/^static int do_env_default(cmd_tbl_t *cmdtp, int __flag,$/;"	f	typeref:typename:int	file:
do_env_delete	cmd/nvedit.c	/^static int do_env_delete(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_env_edit	cmd/nvedit.c	/^static int do_env_edit(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_env_exists	cmd/nvedit.c	/^static int do_env_exists(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_env_export	cmd/nvedit.c	/^static int do_env_export(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_env_flags	cmd/nvedit.c	/^int do_env_flags(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_env_grep	cmd/nvedit.c	/^static int do_env_grep(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_env_import	cmd/nvedit.c	/^static int do_env_import(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_env_print	cmd/nvedit.c	/^static int do_env_print(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_env_save	cmd/nvedit.c	/^static int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_env_set	cmd/nvedit.c	/^static int do_env_set(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_errata	arch/powerpc/cpu/mpc85xx/cmd_errata.c	/^static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_error	arch/arm/lib/interrupts_64.c	/^void __weak do_error(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void __weak
do_esbc_halt	board/freescale/common/cmd_esbc_validate.c	/^int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int
do_esbc_validate	board/freescale/common/cmd_esbc_validate.c	/^static int do_esbc_validate(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_esdbmp	board/esd/common/lcd.c	/^int do_esdbmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ethsw	cmd/ethsw.c	/^static int do_ethsw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_evb440spe	board/amcc/yucca/cmd_yucca.c	/^int do_evb440spe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_exception	arch/x86/cpu/interrupts.c	/^static void do_exception(struct irq_regs *regs)$/;"	f	typeref:typename:void	file:
do_exit	cmd/exit.c	/^static int do_exit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_exit	scripts/kconfig/nconf.c	/^static int do_exit(void)$/;"	f	typeref:typename:int	file:
do_exit_on_complete	drivers/usb/gadget/f_fastboot.c	/^static void do_exit_on_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
do_ext2load	cmd/ext2.c	/^int do_ext2load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ext2ls	cmd/ext2.c	/^static int do_ext2ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ext4_load	cmd/ext4.c	/^int do_ext4_load(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int
do_ext4_ls	cmd/ext4.c	/^int do_ext4_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ext4_size	cmd/ext4.c	/^int do_ext4_size(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int
do_ext4_write	cmd/ext4.c	/^int do_ext4_write(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int
do_ext_phy_settings	arch/arm/cpu/armv7/omap-common/emif-common.c	/^__weak void do_ext_phy_settings(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:__weak void
do_ext_phy_settings	arch/arm/cpu/armv7/omap5/sdram.c	/^void do_ext_phy_settings(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void
do_ext_phy_settings_dra7	arch/arm/cpu/armv7/omap5/sdram.c	/^static void do_ext_phy_settings_dra7(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
do_ext_phy_settings_omap5	arch/arm/cpu/armv7/omap5/sdram.c	/^static void do_ext_phy_settings_omap5(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
do_extension	arch/arc/lib/interrupts.c	/^void do_extension(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_false	cmd/test.c	/^static int do_false(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_fastboot	cmd/fastboot.c	/^static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_fat_fsinfo	cmd/fat.c	/^static int do_fat_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_fat_fsload	cmd/fat.c	/^int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fat_fswrite	cmd/fat.c	/^static int do_fat_fswrite(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_fat_ls	cmd/fat.c	/^static int do_fat_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_fat_read	fs/fat/fat.c	/^int do_fat_read(const char *filename, void *buffer, loff_t maxsize, int dols,$/;"	f	typeref:typename:int
do_fat_read_at	fs/fat/fat.c	/^int do_fat_read_at(const char *filename, loff_t pos, void *buffer,$/;"	f	typeref:typename:int
do_fat_size	cmd/fat.c	/^int do_fat_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fat_write	fs/fat/fat_write.c	/^static int do_fat_write(const char *filename, void *buffer, loff_t size,$/;"	f	typeref:typename:int	file:
do_fccinfo	cmd/immap.c	/^do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fdcboot	cmd/fdc.c	/^int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fdt	cmd/fdt.c	/^static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_fdtgrep	tools/fdtgrep.c	/^static int do_fdtgrep(struct display_info *disp, const char *filename)$/;"	f	typeref:typename:int	file:
do_fifo	board/esd/pmc440/cmd_pmc440.c	/^int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fiq	arch/arm/lib/interrupts.c	/^void do_fiq (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_fiq	arch/arm/lib/interrupts_64.c	/^void do_fiq(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_fitupd	cmd/fitupd.c	/^static int do_fitupd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_fixup_by_compat	common/fdt_support.c	/^void do_fixup_by_compat(void *fdt, const char *compat,$/;"	f	typeref:typename:void
do_fixup_by_compat_u32	common/fdt_support.c	/^void do_fixup_by_compat_u32(void *fdt, const char *compat,$/;"	f	typeref:typename:void
do_fixup_by_path	common/fdt_support.c	/^void do_fixup_by_path(void *fdt, const char *path, const char *prop,$/;"	f	typeref:typename:void
do_fixup_by_path_string	include/fdt_support.h	/^static inline void do_fixup_by_path_string(void *fdt, const char *path,$/;"	f	typeref:typename:void
do_fixup_by_path_u32	common/fdt_support.c	/^void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop,$/;"	f	typeref:typename:void
do_fixup_by_prop	common/fdt_support.c	/^void do_fixup_by_prop(void *fdt,$/;"	f	typeref:typename:void
do_fixup_by_prop_u32	common/fdt_support.c	/^void do_fixup_by_prop_u32(void *fdt,$/;"	f	typeref:typename:void
do_flerase	cmd/flash.c	/^static int do_flerase(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_flinfo	cmd/flash.c	/^static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_flush	arch/blackfin/cpu/cache.S	/^.macro do_flush flushins:req optflushins optnopins label$/;"	m
do_fpga	cmd/fpga.c	/^int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_fpga_md	cmd/fpgad.c	/^int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_frd	cmd/mfsl.c	/^int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fs_type	fs/fs.c	/^int do_fs_type(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_fs_uuid	fs/fs.c	/^int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_fs_uuid_wrapper	cmd/fs_uuid.c	/^static int do_fs_uuid_wrapper(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_fsl_mc	drivers/net/fsl-mc/mc.c	/^static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_fsp	arch/x86/lib/fsp/cmd_fsp.c	/^static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_fstype_wrapper	cmd/fs.c	/^static int do_fstype_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:U_BOOT_CMD (ls,4,1,do_ls_wrapper,"list files in a directory (default /)","<interface> [<dev[:part]> [directory]]\\n""    - List files in directory 'directory' of partition 'part' on\\n""      device type 'interface' instance 'dev'.")int	file:
do_fuse	cmd/fuse.c	/^static int do_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_fwr	cmd/mfsl.c	/^int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_get_any	cmd/pxe.c	/^static int do_get_any(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)$/;"	f	typeref:typename:int	file:
do_get_ext2	cmd/pxe.c	/^static int do_get_ext2(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)$/;"	f	typeref:typename:int	file:
do_get_fat	cmd/pxe.c	/^static int do_get_fat(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)$/;"	f	typeref:typename:int	file:
do_get_tftp	cmd/pxe.c	/^static int do_get_tftp(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)$/;"	f	typeref:typename:int	file:
do_getclk_cmd	arch/arm/mach-keystone/cmd_clock.c	/^int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_getdcr	cmd/dcr.c	/^int do_getdcr ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] )$/;"	f	typeref:typename:int
do_getfile	cmd/pxe.c	/^static int (*do_getfile)(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr);$/;"	v	typeref:typename:int (*)(cmd_tbl_t * cmdtp,const char * file_path,char * file_addr)	file:
do_getidcr	cmd/dcr.c	/^int do_getidcr (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_gettime	cmd/gettime.c	/^static int do_gettime(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_go	cmd/boot.c	/^static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_go_exec	arch/arm/lib/cmd_boot.c	/^unsigned long do_go_exec(ulong (*entry)(int, char * const []),$/;"	f	typeref:typename:unsigned long
do_go_exec	arch/x86/lib/cmd_boot.c	/^unsigned long do_go_exec(ulong (*entry)(int, char * const []),$/;"	f	typeref:typename:unsigned long
do_go_exec	cmd/boot.c	/^unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,$/;"	f	typeref:typename:unsigned long
do_gpio	cmd/gpio.c	/^static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_gpio_status	cmd/gpio.c	/^static int do_gpio_status(bool all, const char *gpio_name)$/;"	f	typeref:typename:int	file:
do_gpt	cmd/gpt.c	/^static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_gsc	board/gateworks/gw_ventana/gsc.c	/^static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_gsc_sleep	board/gateworks/gw_ventana/gsc.c	/^static int do_gsc_sleep(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_gsc_wd	board/gateworks/gw_ventana/gsc.c	/^static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_gzwrite	cmd/unzip.c	/^static int do_gzwrite(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_hab_status	arch/arm/imx-common/hab.c	/^int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_hard_fault	arch/arm/lib/interrupts_m.c	/^void do_hard_fault(struct autosave_regs *autosave_regs)$/;"	f	typeref:typename:void
do_hash	cmd/hash.c	/^static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_hd44780	board/work-microwave/work_92105/work_92105_display.c	/^static int do_hd44780(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_hdmidet	arch/arm/imx-common/cmd_hdmidet.c	/^static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_hdr	arch/x86/lib/fsp/cmd_fsp.c	/^static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_help	cmd/help.c	/^static int do_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_hob	arch/x86/lib/fsp/cmd_fsp.c	/^static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_host	cmd/host.c	/^static int do_host(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_bind	cmd/host.c	/^static int do_host_bind(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_dev	cmd/host.c	/^static int do_host_dev(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_info	cmd/host.c	/^static int do_host_info(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_load	cmd/host.c	/^static int do_host_load(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_ls	cmd/host.c	/^static int do_host_ls(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_save	cmd/host.c	/^static int do_host_save(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_host_size	cmd/host.c	/^static int do_host_size(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_hw_test	board/renesas/sh7785lcr/selfcheck.c	/^int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_i2c	cmd/i2c.c	/^static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_bus_num	cmd/i2c.c	/^static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_i2c_bus_speed	cmd/i2c.c	/^static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_crc	cmd/i2c.c	/^static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_flags	cmd/i2c.c	/^static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_i2c_loop	cmd/i2c.c	/^static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_md	cmd/i2c.c	/^static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_mm	cmd/i2c.c	/^static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_mw	cmd/i2c.c	/^static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_nm	cmd/i2c.c	/^static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_olen	cmd/i2c.c	/^static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_probe	cmd/i2c.c	/^static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_read	cmd/i2c.c	/^static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_reset	cmd/i2c.c	/^static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_show_bus	cmd/i2c.c	/^static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_i2c_test	board/cm5200/cmd_cm5200.c	/^static int do_i2c_test(char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2c_write	cmd/i2c.c	/^static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_i2cinfo	cmd/immap.c	/^do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_icache	cmd/cache.c	/^static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_icache_dump	arch/blackfin/lib/cmd_cache_dump.c	/^int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_icinfo	cmd/immap.c	/^do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ide	cmd/ide.c	/^int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_imgextract	cmd/ximg.c	/^do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_iminfo	cmd/bootm.c	/^static int do_iminfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_imls	cmd/bootm.c	/^static int do_imls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_imls_nand	cmd/bootm.c	/^static int do_imls_nand(void)$/;"	f	typeref:typename:int	file:
do_imls_nor	cmd/bootm.c	/^static int do_imls_nor(void)$/;"	f	typeref:typename:int	file:
do_info	cmd/regulator.c	/^static int do_info(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ini	cmd/ini.c	/^static int do_ini(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_init	cmd/sound.c	/^static int do_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_inkadiag	board/inka4x0/inkadiag.c	/^static int do_inkadiag(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_inkadiag_buzzer	board/inka4x0/inkadiag.c	/^static int do_inkadiag_buzzer(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_inkadiag_help	board/inka4x0/inkadiag.c	/^static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_inkadiag_io	board/inka4x0/inkadiag.c	/^static int do_inkadiag_io(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_inkadiag_serial	board/inka4x0/inkadiag.c	/^static int do_inkadiag_serial(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_inquiry	drivers/usb/gadget/f_mass_storage.c	/^static int do_inquiry(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_instruction_error	arch/arc/lib/interrupts.c	/^void do_instruction_error(unsigned long address, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_inta	board/esd/pmc440/cmd_pmc440.c	/^int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_interrupt_handler	arch/arc/lib/interrupts.c	/^void do_interrupt_handler(void)$/;"	f	typeref:typename:void
do_interruption	arch/nds32/lib/interrupts.c	/^void do_interruption(struct pt_regs *pt_regs, int EVIC_num)$/;"	f	typeref:typename:void
do_interrupts	cmd/irq.c	/^static int do_interrupts(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_invalid_entry	arch/arm/lib/interrupts_m.c	/^void do_invalid_entry(struct autosave_regs *autosave_regs)$/;"	f	typeref:typename:void
do_io_iod	cmd/io.c	/^int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_io_iow	cmd/io.c	/^int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_io_settings	arch/arm/cpu/armv7/omap4/hwinit.c	/^void do_io_settings(void)$/;"	f	typeref:typename:void
do_io_settings	arch/arm/cpu/armv7/omap5/hwinit.c	/^void do_io_settings(void)$/;"	f	typeref:typename:void
do_ioloop	board/gdsys/common/cmd_ioloop.c	/^int do_ioloop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_iopinfo	cmd/immap.c	/^do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_iopset	cmd/immap.c	/^do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ioreflect	board/gdsys/common/cmd_ioloop.c	/^int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_iotrace	cmd/iotrace.c	/^int do_iotrace(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irq	arch/arm/cpu/arm720t/interrupts.c	/^void do_irq (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_irq	arch/arm/cpu/arm920t/interrupts.c	/^void do_irq (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_irq	arch/arm/cpu/arm920t/s3c24x0/interrupts.c	/^void do_irq (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_irq	arch/arm/lib/interrupts.c	/^void do_irq (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_irq	arch/arm/lib/interrupts_64.c	/^void do_irq(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_irq	arch/x86/lib/interrupts.c	/^void do_irq(int hw_irq)$/;"	f	typeref:typename:void
do_irqinfo	arch/microblaze/cpu/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, const char *argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/nios2/cpu/interrupts.c	/^int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/openrisc/cpu/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/powerpc/cpu/mpc5xx/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void
do_irqinfo	arch/powerpc/cpu/mpc8260/interrupts.c	/^do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void
do_irqinfo	arch/powerpc/cpu/mpc83xx/interrupts.c	/^do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void
do_irqinfo	arch/powerpc/cpu/mpc85xx/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/powerpc/cpu/mpc86xx/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/powerpc/cpu/ppc4xx/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_irqinfo	arch/sparc/cpu/leon2/interrupts.c	/^void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void
do_irqinfo	arch/sparc/cpu/leon3/interrupts.c	/^void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void
do_irqinfo	arch/x86/lib/interrupts.c	/^int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_itest	cmd/itest.c	/^static int do_itest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_itlb_miss	arch/arc/lib/interrupts.c	/^void do_itlb_miss(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_jffs2_fsinfo	cmd/jffs2.c	/^int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_jffs2_fsload	cmd/jffs2.c	/^int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_jffs2_ls	cmd/jffs2.c	/^int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_kbd	board/boundary/nitrogen6x/nitrogen6x.c	/^static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_kbd	board/liebherr/lwmon5/kbd.c	/^int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_kgdb	common/kgdb.c	/^do_kgdb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_kill_orphans	fs/ubifs/orphan.c	/^static int do_kill_orphans(struct ubifs_info *c, struct ubifs_scan_leb *sleb,$/;"	f	typeref:typename:int	file:
do_l2cache	board/amcc/luan/luan.c	/^int do_l2cache( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] )$/;"	f	typeref:typename:int
do_lcd_clear	common/lcd.c	/^static int do_lcd_clear(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_lcd_puts	common/lcd_console.c	/^static int do_lcd_puts(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_lcd_setcursor	common/lcd_console.c	/^static int do_lcd_setcursor(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_ldrinfo	cmd/ldrinfo.c	/^static int do_ldrinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_led	board/tqc/tqm5200/cmd_stk52xx.c	/^int do_led(char * const argv[])$/;"	f	typeref:typename:int
do_led	cmd/led.c	/^int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_led_test	board/cm5200/cmd_cm5200.c	/^static int do_led_test(char * const argv[])$/;"	f	typeref:typename:int	file:
do_lgset	drivers/video/lg4573.c	/^static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_license	cmd/license.c	/^int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_link_local	cmd/net.c	/^static int do_link_local(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_list	cmd/pmic.c	/^static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_list	cmd/regulator.c	/^static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_load	fs/fs.c	/^int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_load_serial	cmd/load.c	/^static int do_load_serial(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_load_serial_bin	cmd/load.c	/^static int do_load_serial_bin(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_load_wrapper	cmd/fs.c	/^static int do_load_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_loadpci	board/esd/common/cmd_loadpci.c	/^int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_lock_dpll	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void do_lock_dpll(const struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:void	file:
do_lock_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void do_lock_dpll(u32 const base)$/;"	f	typeref:typename:void	file:
do_log	cmd/log.c	/^int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_lookup_nm	fs/ubifs/tnc.c	/^static int do_lookup_nm(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int	file:
do_lowlevel_init	arch/arm/mach-exynos/lowlevel_init.c	/^int do_lowlevel_init(void)$/;"	f	typeref:typename:int
do_lowlevel_init	arch/arm/mach-rmobile/lowlevel_init_ca15.S	/^do_lowlevel_init:$/;"	l
do_lpddr2_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void do_lpddr2_init(u32 base, u32 cs)$/;"	f	typeref:typename:void	file:
do_ls	fs/fs.c	/^int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_ls_wrapper	cmd/fs.c	/^static int do_ls_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:U_BOOT_CMD (save,7,0,do_save_wrapper,"save file to a filesystem","<interface> <dev[:part]> <addr> <filename> bytes [pos]\\n""    - Save binary file 'filename' to partition 'part' on device\\n""      type 'interface' instance 'dev' from addr 'addr' in memory.\\n""      'bytes' gives the size to save in bytes and is mandatory.\\n""      'pos' gives the file byte position to start writing to.\\n""      If 'pos' is 0 or omitted, the file is written from the start.")int	file:
do_lzmadec	cmd/lzmadec.c	/^static int do_lzmadec(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_m4go	board/phytec/pcm052/pcm052.c	/^static int do_m4go(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mac	board/freescale/common/sys_eeprom.c	/^int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mac	board/varisys/common/sys_eeprom.c	/^int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_machine_check_fault	arch/arc/lib/interrupts.c	/^void do_machine_check_fault(unsigned long address, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_make_pnode_dirty	fs/ubifs/lpt_commit.c	/^static void do_make_pnode_dirty(struct ubifs_info *c, struct ubifs_pnode *pnode)$/;"	f	typeref:typename:void	file:
do_maligned	arch/arc/lib/interrupts.c	/^void do_maligned(unsigned long address, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_match	scripts/kconfig/nconf.c	/^static int do_match(int key, struct match_state *state, int *ans)$/;"	f	typeref:typename:int	file:
do_max6957aax	board/work-microwave/work_92105/work_92105_display.c	/^static int do_max6957aax(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mccinfo	cmd/immap.c	/^do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_md5sum	cmd/md5sum.c	/^int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_md5sum	cmd/md5sum.c	/^static int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mdio	cmd/mdio.c	/^static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_base	cmd/mem.c	/^static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mem_cmp	cmd/mem.c	/^static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_cp	cmd/mem.c	/^static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_crc	cmd/mem.c	/^static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_info	cmd/mem.c	/^static int do_mem_info(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mem_loop	cmd/mem.c	/^static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mem_loopw	cmd/mem.c	/^static int do_mem_loopw(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mem_md	cmd/mem.c	/^static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_mdc	cmd/mem.c	/^static int do_mem_mdc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_mm	cmd/mem.c	/^static int do_mem_mm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_mtest	cmd/mem.c	/^static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mem_mw	cmd/mem.c	/^static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_mwc	cmd/mem.c	/^static int do_mem_mwc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mem_nm	cmd/mem.c	/^static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_memcinfo	cmd/immap.c	/^do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_memory_error	arch/arc/lib/interrupts.c	/^void do_memory_error(unsigned long address, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_mii	cmd/mii.c	/^static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mip405	board/mpl/mip405/cmd_mip405.c	/^int do_mip405(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mm_fault	arch/arm/lib/interrupts_m.c	/^void do_mm_fault(struct autosave_regs *autosave_regs)$/;"	f	typeref:typename:void
do_mmc_boot_resize	cmd/mmc.c	/^static int do_mmc_boot_resize(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_bootbus	cmd/mmc.c	/^static int do_mmc_bootbus(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_dev	cmd/mmc.c	/^static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_erase	cmd/mmc.c	/^static int do_mmc_erase(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_hwpartition	cmd/mmc.c	/^static int do_mmc_hwpartition(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_list	cmd/mmc.c	/^static int do_mmc_list(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_part	cmd/mmc.c	/^static int do_mmc_part(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_partconf	cmd/mmc.c	/^static int do_mmc_partconf(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_read	cmd/mmc.c	/^static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_rescan	cmd/mmc.c	/^static int do_mmc_rescan(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_rst_func	cmd/mmc.c	/^static int do_mmc_rst_func(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_setdsr	cmd/mmc.c	/^static int do_mmc_setdsr(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmc_spi	cmd/mmc_spi.c	/^static int do_mmc_spi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mmc_write	cmd/mmc.c	/^static int do_mmc_write(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmcinfo	cmd/mmc.c	/^static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mmcops	cmd/mmc.c	/^static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mmcrpmb	cmd/mmc.c	/^static int do_mmcrpmb(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmcrpmb_counter	cmd/mmc.c	/^static int do_mmcrpmb_counter(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmcrpmb_key	cmd/mmc.c	/^static int do_mmcrpmb_key(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmcrpmb_read	cmd/mmc.c	/^static int do_mmcrpmb_read(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmcrpmb_write	cmd/mmc.c	/^static int do_mmcrpmb_write(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_mmcsetn	arch/arm/mach-uniphier/boot-mode/boot-mode.c	/^static int do_mmcsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mode	cmd/regulator.c	/^static int do_mode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mode_select	drivers/usb/gadget/f_mass_storage.c	/^static int do_mode_select(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_mode_sense	drivers/usb/gadget/f_mass_storage.c	/^static int do_mode_sense(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_mon_install	arch/arm/mach-keystone/cmd_mon.c	/^static int do_mon_install(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mon_power	arch/arm/mach-keystone/cmd_mon.c	/^int do_mon_power(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int
do_mplcommon	board/mpl/common/common_util.c	/^int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mrs_phy	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	int do_mrs_phy;$/;"	m	struct:init_cntr_param	typeref:typename:int
do_mtc_appreg	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_appreg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_digin	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_digin(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_digout	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_digout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_help	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_key	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_key(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_led	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_state	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_state(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtc_version	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int do_mtc_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtdparts	cmd/mtdparts.c	/^static int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_mtrr	arch/x86/lib/cmd_mtrr.c	/^static int do_mtrr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_mtrr_list	arch/x86/lib/cmd_mtrr.c	/^static int do_mtrr_list(void)$/;"	f	typeref:typename:int	file:
do_mtrr_set	arch/x86/lib/cmd_mtrr.c	/^static int do_mtrr_set(uint reg, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_muxinfo	cmd/immap.c	/^do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mvsw_reg	drivers/net/phy/mv88e6352.c	/^int do_mvsw_reg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mvsw_reg_read	drivers/net/phy/mv88e6352.c	/^int do_mvsw_reg_read(const char *name, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mvsw_reg_write	drivers/net/phy/mv88e6352.c	/^int do_mvsw_reg_write(const char *name, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mx28_showclocks	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^int do_mx28_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_mx35_showclocks	arch/arm/cpu/arm1136/mx35/generic.c	/^int do_mx35_showclocks(cmd_tbl_t *cmdtp,$/;"	f	typeref:typename:int
do_mx5_showclocks	arch/arm/cpu/armv7/mx5/clock.c	/^int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mx6_showclocks	arch/arm/cpu/armv7/mx6/clock.c	/^int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_mx7_showclocks	arch/arm/cpu/armv7/mx7/clock.c	/^int do_mx7_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_nand	cmd/nand.c	/^static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_nand_env_oob	cmd/nand.c	/^int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_nand_status	cmd/nand.c	/^static void do_nand_status(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
do_nandboot	cmd/nand.c	/^static int do_nandboot(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_nfs	cmd/net.c	/^static int do_nfs(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_nonsec_virt_switch	arch/arm/lib/bootm.c	/^static void do_nonsec_virt_switch(void)$/;"	f	typeref:typename:void	file:
do_not_used	arch/arm/lib/interrupts.c	/^void do_not_used (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_objdump	scripts/objdiff	/^do_objdump() {$/;"	f
do_one_read	drivers/block/pata_bfin.c	/^static u8 do_one_read(struct ata_port *ap, u64 blknr, u8 blkcnt, u16 *buffer,$/;"	f	typeref:typename:u8	file:
do_one_read	drivers/block/sata_sil3114.c	/^static u8 do_one_read (int device, ulong block, u8 blkcnt, u16 * buff,$/;"	f	typeref:typename:u8	file:
do_onenand	cmd/onenand.c	/^static int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_bad	cmd/onenand.c	/^static int do_onenand_bad(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_dump	cmd/onenand.c	/^static int do_onenand_dump(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_erase	cmd/onenand.c	/^static int do_onenand_erase(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_info	cmd/onenand.c	/^static int do_onenand_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_markbad	cmd/onenand.c	/^static int do_onenand_markbad(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_read	cmd/onenand.c	/^static int do_onenand_read(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_test	cmd/onenand.c	/^static int do_onenand_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_onenand_write	cmd/onenand.c	/^static int do_onenand_write(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_otp	cmd/otp.c	/^int do_otp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_painit	board/esd/pmc405de/pmc405de.c	/^int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_painit	board/esd/pmc440/cmd_pmc440.c	/^int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_part	cmd/part.c	/^static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_part_list	cmd/part.c	/^static int do_part_list(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_part_size	cmd/part.c	/^static int do_part_size(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_part_start	cmd/part.c	/^static int do_part_start(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_part_uuid	cmd/part.c	/^static int do_part_uuid(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_pati	board/mpl/pati/cmd_pati.c	/^int do_pati(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pca953x	drivers/gpio/pca953x.c	/^int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pci	cmd/pci.c	/^static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ping	cmd/net.c	/^static int do_ping(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_pinit	cmd/pcmcia.c	/^int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pinmon	arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c	/^static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_pip405	board/mpl/pip405/cmd_pip405.c	/^int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_play	cmd/sound.c	/^static int do_play(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_pll_alter	board/amcc/makalu/cmd_pll.c	/^do_pll_alter (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pll_cmd	arch/arm/mach-keystone/cmd_clock.c	/^int do_pll_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pmb	board/renesas/sh7785lcr/sh7785lcr.c	/^int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pmic	cmd/pmic.c	/^static int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_pmic	drivers/power/power_core.c	/^int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pmm	board/esd/pmc440/cmd_pmc440.c	/^int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_portio_in	cmd/portio.c	/^int do_portio_in (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_portio_out	cmd/portio.c	/^int do_portio_out (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_poweroff	arch/arm/mach-keystone/cmd_poweroff.c	/^int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_poweroff	drivers/power/axp152.c	/^int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_poweroff	drivers/power/axp209.c	/^int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_poweroff	drivers/power/axp221.c	/^int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_poweroff	drivers/power/axp809.c	/^int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_poweroff	drivers/power/axp818.c	/^int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_prefetch_abort	arch/arm/lib/interrupts.c	/^void do_prefetch_abort (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_prevent_allow	drivers/usb/gadget/f_mass_storage.c	/^static int do_prevent_allow(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_print_item	scripts/kconfig/lxdialog/menubox.c	/^static void do_print_item(WINDOW * win, const char *item, int line_y,$/;"	f	typeref:typename:void	file:
do_print_mac	board/renesas/sh7785lcr/rtl8169_mac.c	/^int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_print_stats	cmd/iotrace.c	/^static void do_print_stats(void)$/;"	f	typeref:typename:void	file:
do_printenv	tools/env/fw_env_main.c	/^static int do_printenv;$/;"	v	typeref:typename:int	file:
do_privilege_violation	arch/arc/lib/interrupts.c	/^void do_privilege_violation(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_program_ecc	arch/powerpc/cpu/ppc4xx/ecc.c	/^void do_program_ecc(unsigned long tlb_word2_i_value)$/;"	f	typeref:typename:void
do_protect	cmd/flash.c	/^static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_psc_cmd	arch/arm/mach-keystone/cmd_clock.c	/^int do_psc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pwrman	board/egnite/ethernut5/ethernut5_pwrman.c	/^int do_pwrman(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_pxe	cmd/pxe.c	/^static int do_pxe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_pxe_boot	cmd/pxe.c	/^do_pxe_boot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_pxe_get	cmd/pxe.c	/^do_pxe_get(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_qemu_fw	cmd/qfw.c	/^static int do_qemu_fw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_rarpb	cmd/net.c	/^int do_rarpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_read	cmd/pmic.c	/^static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_read	cmd/read.c	/^int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_read	drivers/usb/gadget/f_mass_storage.c	/^static int do_read(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_read_button	board/LaCie/netspace_v2/netspace_v2.c	/^do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_read_capacity	drivers/usb/gadget/f_mass_storage.c	/^static int do_read_capacity(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_read_eeprom	drivers/net/dc2114x.c	/^static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location, int addr_len)$/;"	f	typeref:typename:int	file:
do_read_format_capacities	drivers/usb/gadget/f_mass_storage.c	/^static int do_read_format_capacities(struct fsg_common *common,$/;"	f	typeref:typename:int	file:
do_read_header	drivers/usb/gadget/f_mass_storage.c	/^static int do_read_header(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_read_push_button	board/LaCie/net2big_v2/net2big_v2.c	/^do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_read_toc	drivers/usb/gadget/f_mass_storage.c	/^static int do_read_toc(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_read_write	cmd/cros_ec.c	/^static int do_read_write(struct cros_ec_dev *dev, int is_write, int argc,$/;"	f	typeref:typename:int	file:
do_readpage	fs/ubifs/ubifs.c	/^static int do_readpage(struct ubifs_info *c, struct inode *inode,$/;"	f	typeref:typename:int	file:
do_reginfo	cmd/reginfo.c	/^static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_regulator	cmd/regulator.c	/^static int do_regulator(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_reiserload	cmd/reiser.c	/^int do_reiserload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reiserls	cmd/reiser.c	/^int do_reiserls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_remoteproc	cmd/remoteproc.c	/^static int do_remoteproc(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_remoteproc_list	cmd/remoteproc.c	/^static int do_remoteproc_list(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_remoteproc_load	cmd/remoteproc.c	/^static int do_remoteproc_load(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_remoteproc_wrapper	cmd/remoteproc.c	/^static int do_remoteproc_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_repeat	common/cli_hush.c	/^static int do_repeat = 0;$/;"	v	typeref:typename:int	file:
do_request_sense	drivers/usb/gadget/f_mass_storage.c	/^static int do_request_sense(struct fsg_common *common, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
do_reset	arch/arc/lib/reset.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_reset	arch/arm/lib/reset.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/avr32/cpu/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/blackfin/cpu/reset.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf5227x/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf523x/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf52x2/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf530x/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf532x/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf5445x/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/m68k/cpu/mcf547x_8x/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/mips/cpu/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/nds32/cpu/n1213/ag101/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/nios2/cpu/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/openrisc/cpu/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc512x/cpu.c	/^do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc5xx/cpu.c	/^int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc5xxx/cpu.c	/^do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc8260/cpu.c	/^do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc83xx/cpu.c	/^do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc85xx/cpu.c	/^int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc86xx/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/mpc8xx/cpu.c	/^int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/powerpc/cpu/ppc4xx/cpu.c	/^int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/sh/cpu/sh2/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/sh/cpu/sh3/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/sh/cpu/sh4/cpu.c	/^int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/sparc/cpu/leon2/cpu.c	/^int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/sparc/cpu/leon3/cpu.c	/^int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	arch/x86/cpu/cpu.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	board/xilinx/microblaze-generic/microblaze-generic.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	drivers/sysreset/sysreset-uclass.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_reset	examples/api/libgenwrap.c	/^int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_resetout	board/esd/pmc405de/pmc405de.c	/^int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_resetout	board/esd/pmc440/cmd_pmc440.c	/^int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_rproc_init	cmd/remoteproc.c	/^static int do_rproc_init(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_rs232	board/tqc/tqm5200/cmd_stk52xx.c	/^int do_rs232(char * const argv[])$/;"	f	typeref:typename:int
do_rs232_test	board/cm5200/cmd_cm5200.c	/^static int do_rs232_test(char * const argv[])$/;"	f	typeref:typename:int	file:
do_rspr	cmd/mfsl.c	/^int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_run	common/cli.c	/^int do_run(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_sata	cmd/sata.c	/^static int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_save	fs/fs.c	/^int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_save_serial	cmd/load.c	/^int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_save_wrapper	cmd/fs.c	/^static int do_save_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:U_BOOT_CMD (load,7,0,do_load_wrapper,"load binary file from a filesystem","<interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]\\n""    - Load binary file 'filename' from partition 'part' on device\\n""       type 'interface' instance 'dev' to address 'addr' in memory.\\n""      'bytes' gives the size to load in bytes.\\n""      If 'bytes' is 0 or omitted, the file is read until the end.\\n""      'pos' gives the file byte position to start reading from.\\n""      If 'pos' is 0 or omitted, the file is read from the start.")int	file:
do_savedefconfig	tools/moveconfig.py	/^    def do_savedefconfig(self):$/;"	m	class:Slot
do_scale_vcore	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)$/;"	f	typeref:typename:void
do_sccinfo	cmd/immap.c	/^do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_scroll	scripts/kconfig/lxdialog/menubox.c	/^static void do_scroll(WINDOW *win, int *scroll, int n)$/;"	f	typeref:typename:void	file:
do_scsi	cmd/scsi.c	/^int do_scsi(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_scsi_command	drivers/usb/gadget/f_mass_storage.c	/^static int do_scsi_command(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_scsiboot	cmd/scsi.c	/^int do_scsiboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_sdhci_init	drivers/mmc/s5p_sdhci.c	/^static int do_sdhci_init(struct sdhci_host *host)$/;"	f	typeref:typename:int	file:
do_sdram	cmd/i2c.c	/^static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_sdram_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void do_sdram_init(u32 base)$/;"	f	typeref:typename:void	file:
do_sdrc_init	arch/arm/cpu/armv7/omap3/sdrc.c	/^void do_sdrc_init(u32 cs, u32 early)$/;"	f	typeref:typename:void
do_selfreset	board/esd/pmc405de/pmc405de.c	/^int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_selfreset	board/esd/pmc440/cmd_pmc440.c	/^int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_set_buffer	cmd/iotrace.c	/^static int do_set_buffer(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_set_interface	drivers/usb/gadget/f_mass_storage.c	/^static int do_set_interface(struct fsg_common *common, struct fsg_dev *new_fsg)$/;"	f	typeref:typename:int	file:
do_set_iodelay	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^int do_set_iodelay(u32 base, struct iodelay_cfg_entry const *array,$/;"	f	typeref:typename:int
do_set_mac	board/renesas/sh7785lcr/rtl8169_mac.c	/^int do_set_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_set_mux	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)$/;"	f	typeref:typename:void
do_set_mux32	arch/arm/cpu/armv7/omap5/hwinit.c	/^void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size)$/;"	f	typeref:typename:void
do_setboardid	board/keymile/common/common.c	/^static int do_setboardid(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_setdcr	cmd/dcr.c	/^int do_setdcr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_setexpr	cmd/setexpr.c	/^static int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_setidcr	cmd/dcr.c	/^int do_setidcr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_setup_bootstrap_eeprom	board/esd/pmc440/cmd_pmc440.c	/^int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_setup_dpll	arch/arm/cpu/armv7/am33xx/clock.c	/^void do_setup_dpll(const struct dpll_regs *dpll_regs,$/;"	f	typeref:typename:void
do_setup_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static void do_setup_dpll(u32 const base, const struct dpll_params *params,$/;"	f	typeref:typename:void	file:
do_sh_g200	board/renesas/sh7757lcr/sh7757lcr.c	/^int do_sh_g200(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_sh_zimageboot	arch/sh/lib/zimageboot.c	/^int do_sh_zimageboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_sha1sum	cmd/sha1sum.c	/^int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_showclocks	arch/arm/mach-socfpga/clock_manager.c	/^int do_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_showvar	common/cli_hush.c	/^static int do_showvar(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_siinfo	cmd/immap.c	/^do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_sitinfo	cmd/immap.c	/^do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_siuinfo	cmd/immap.c	/^do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_size	fs/fs.c	/^int do_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],$/;"	f	typeref:typename:int
do_size_wrapper	cmd/fs.c	/^static int do_size_wrapper(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_sleep	cmd/misc.c	/^static int do_sleep(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_smcinfo	cmd/immap.c	/^do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_smhload	arch/arm/lib/semihosting.c	/^static int do_smhload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_sntp	cmd/net.c	/^int do_sntp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_softswitch	cmd/softswitch.c	/^int do_softswitch(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_software_interrupt	arch/arm/lib/interrupts.c	/^void do_software_interrupt (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_sound	cmd/sound.c	/^static int do_sound(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_source	cmd/source.c	/^static int do_source(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_spi	cmd/spi.c	/^int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_spi_flash	cmd/sf.c	/^static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_spi_flash_erase	cmd/sf.c	/^static int do_spi_flash_erase(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_spi_flash_probe	cmd/sf.c	/^static int do_spi_flash_probe(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_spi_flash_read_write	cmd/sf.c	/^static int do_spi_flash_read_write(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_spi_flash_test	cmd/sf.c	/^static int do_spi_flash_test(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_spi_protect	cmd/sf.c	/^static int do_spi_protect(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_spi_xfer	cmd/spi.c	/^static int do_spi_xfer(int bus, int cs)$/;"	f	typeref:typename:int	file:
do_spibootldr	cmd/spibootldr.c	/^int do_spibootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_spiinfo	cmd/immap.c	/^do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_spl	cmd/spl.c	/^static int do_spl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_start_stop	drivers/usb/gadget/f_mass_storage.c	/^static int do_start_stop(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_status	cmd/regulator.c	/^static int do_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_status_detail	cmd/regulator.c	/^static void do_status_detail(struct udevice *dev,$/;"	f	typeref:typename:void	file:
do_status_line	cmd/regulator.c	/^static void do_status_line(struct udevice *dev)$/;"	f	typeref:typename:void	file:
do_strings	cmd/strings.c	/^int do_strings(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_swap32	tools/omapimage.c	/^static int do_swap32 = 0;$/;"	v	typeref:typename:int	file:
do_swi	arch/arc/lib/interrupts.c	/^void do_swi(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_switch_ecc	arch/arm/cpu/arm926ejs/spear/cpu.c	/^static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_switch_ecc	arch/arm/cpu/armv7/omap3/board.c	/^static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_switch_reset	board/siemens/draco/board.c	/^static int do_switch_reset(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_sx151x	drivers/gpio/sx151x.c	/^int do_sx151x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_sync	arch/arm/lib/interrupts_64.c	/^void do_sync(struct pt_regs *pt_regs, unsigned int esr)$/;"	f	typeref:typename:void
do_sync_erase	drivers/mtd/ubi/io.c	/^static int do_sync_erase(struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
do_sync_erase	drivers/mtd/ubi/wl.c	/^static int do_sync_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,$/;"	f	typeref:typename:int	file:
do_synchronize_cache	drivers/usb/gadget/f_mass_storage.c	/^static int do_synchronize_cache(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_syno	board/Synology/ds414/cmd_syno.c	/^static int do_syno(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_syno_clk_gate	board/Synology/ds414/cmd_syno.c	/^static int do_syno_clk_gate(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_syno_populate	board/Synology/ds414/cmd_syno.c	/^static int do_syno_populate(int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_sysboot	cmd/pxe.c	/^static int do_sysboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_sysid	drivers/misc/altera_sysid.c	/^int do_sysid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_tca642x	drivers/gpio/tca642x.c	/^int do_tca642x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_terminal	cmd/terminal.c	/^int do_terminal(cmd_tbl_t * cmd, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_test	cmd/test.c	/^static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_test_fdtdec	lib/fdtdec_test.c	/^static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_test_mode	drivers/usb/gadget/atmel_usba_udc.c	/^static int do_test_mode(struct usba_udc *udc)$/;"	f	typeref:typename:int	file:
do_tftpb	cmd/net.c	/^int do_tftpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_tftpput	cmd/net.c	/^int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_tftpsrv	cmd/net.c	/^static int do_tftpsrv(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
do_thor_down	cmd/thordown.c	/^int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_time	cmd/time.c	/^static int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_timer	cmd/misc.c	/^static int do_timer(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_tlb_prot_violation	arch/arc/lib/interrupts.c	/^void do_tlb_prot_violation(unsigned long address, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_tpm	cmd/tpm.c	/^static int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_tpm_extend	cmd/tpm.c	/^static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_get_capability	cmd/tpm.c	/^static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_get_pub_key_oiap	cmd/tpm.c	/^static int do_tpm_get_pub_key_oiap(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_info	cmd/tpm.c	/^static int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_tpm_load_key2_oiap	cmd/tpm.c	/^static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_nv_define	cmd/tpm.c	/^static int do_tpm_nv_define(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_nv_define_space	cmd/tpm.c	/^static int do_tpm_nv_define_space(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_nv_read	cmd/tpm.c	/^static int do_tpm_nv_read(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_nv_read_value	cmd/tpm.c	/^static int do_tpm_nv_read_value(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_nv_write	cmd/tpm.c	/^static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_nv_write_value	cmd/tpm.c	/^static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_oiap	cmd/tpm.c	/^static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_pcr_read	cmd/tpm.c	/^static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_physical_set_deactivated	cmd/tpm.c	/^static int do_tpm_physical_set_deactivated(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_raw_transfer	cmd/tpm.c	/^static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_read_pubek	cmd/tpm.c	/^static int do_tpm_read_pubek(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_startup	cmd/tpm.c	/^static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpm_tsc_physical_presence	cmd/tpm.c	/^static int do_tpm_tsc_physical_presence(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
do_tpmtest	cmd/tpm_test.c	/^static int do_tpmtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_trace	cmd/trace.c	/^int do_trace(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_trap	arch/arc/lib/interrupts.c	/^void do_trap(struct pt_regs *regs)$/;"	f	typeref:typename:void
do_tricorder_eeprom	board/corscience/tricorder/tricorder-eeprom.c	/^int do_tricorder_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])$/;"	f	typeref:typename:int
do_true	cmd/test.c	/^static int do_true(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_tsi148	cmd/tsi148.c	/^int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ubi	cmd/ubi.c	/^static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ubifs_load	cmd/ubifs.c	/^static int do_ubifs_load(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_ubifs_ls	cmd/ubifs.c	/^static int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_ubifs_mount	cmd/ubifs.c	/^static int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_ubifs_umount	cmd/ubifs.c	/^static int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_undefined_instruction	arch/arm/lib/interrupts.c	/^void do_undefined_instruction (struct pt_regs *pt_regs)$/;"	f	typeref:typename:void
do_universe	cmd/universe.c	/^int do_universe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_unknown_exception	arch/avr32/cpu/exception.c	/^void do_unknown_exception(unsigned int ecr, struct pt_regs *regs)$/;"	f	typeref:typename:void
do_unzip	cmd/unzip.c	/^static int do_unzip(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_upgrade_available	board/siemens/taurus/taurus.c	/^static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_usage_fault	arch/arm/lib/interrupts_m.c	/^void do_usage_fault(struct autosave_regs *autosave_regs)$/;"	f	typeref:typename:void
do_usb	cmd/usb.c	/^static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_usb_mass_storage	cmd/usb_mass_storage.c	/^int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int
do_usb_start	cmd/usb.c	/^static void do_usb_start(void)$/;"	f	typeref:typename:void	file:
do_usb_stop_keyboard	cmd/usb.c	/^static int do_usb_stop_keyboard(int force)$/;"	f	typeref:typename:int	file:
do_usb_test	board/cm5200/cmd_cm5200.c	/^static int do_usb_test(char * const argv[])$/;"	f	typeref:typename:int	file:
do_usbboot	cmd/usb.c	/^static int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_userbutton	board/siemens/common/board.c	/^do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_usertestwdt	board/siemens/common/board.c	/^do_usertestwdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ut	test/cmd_ut.c	/^static int do_ut(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ut_all	test/cmd_ut.c	/^static int do_ut_all(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ut_cmd	test/command_ut.c	/^static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_ut_compression	test/compression.c	/^static int do_ut_compression(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_ut_dm	test/dm/test-main.c	/^int do_ut_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ut_env	test/env/cmd_ut_env.c	/^int do_ut_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ut_image_decomp	test/compression.c	/^static int do_ut_image_decomp(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_ut_overlay	test/overlay/cmd_ut_overlay.c	/^int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_ut_time	test/time_ut.c	/^int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_uuid	lib/uuid.c	/^int do_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_value	cmd/regulator.c	/^static int do_value(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_vbat	board/ti/sdp4430/cmd_bat.c	/^int do_vbat(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_vcma9	board/mpl/vcma9/cmd_vcma9.c	/^int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_vdd_adjust	board/freescale/t4qds/t4240qds.c	/^static int do_vdd_adjust(cmd_tbl_t *cmdtp,$/;"	f	typeref:typename:int	file:
do_vdd_override	board/freescale/common/vid.c	/^static int do_vdd_override(cmd_tbl_t *cmdtp,$/;"	f	typeref:typename:int	file:
do_vdd_read	board/freescale/common/vid.c	/^static int do_vdd_read(cmd_tbl_t *cmdtp,$/;"	f	typeref:typename:int	file:
do_verify	drivers/usb/gadget/f_mass_storage.c	/^static int do_verify(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_version	cmd/version.c	/^static int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_vf610_showclocks	arch/arm/cpu/armv7/vf610/generic.c	/^int do_vf610_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int
do_video_puts	drivers/video/vidconsole-uclass.c	/^static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_video_setcursor	drivers/video/vidconsole-uclass.c	/^static int do_video_setcursor(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
do_waithci	board/esd/pmc440/cmd_pmc440.c	/^int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_wdog_toggle	board/a3m071/a3m071.c	/^int do_wdog_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_work	drivers/mtd/ubi/wl.c	/^static int do_work(struct ubi_device *ubi)$/;"	f	typeref:typename:int	file:
do_write	cmd/pmic.c	/^static int do_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_write	drivers/usb/gadget/f_mass_storage.c	/^static int do_write(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
do_write_mac	board/renesas/sh7752evb/sh7752evb.c	/^int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_write_mac	board/renesas/sh7753evb/sh7753evb.c	/^int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_write_mac	board/renesas/sh7757lcr/sh7757lcr.c	/^int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
do_write_orph_node	fs/ubifs/orphan.c	/^static int do_write_orph_node(struct ubifs_info *c, int len, int atomic)$/;"	f	typeref:typename:int	file:
do_ydevconfig	cmd/yaffs2.c	/^int do_ydevconfig(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ydevls	cmd/yaffs2.c	/^int do_ydevls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_yls	cmd/yaffs2.c	/^int do_yls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ymkdir	cmd/yaffs2.c	/^int do_ymkdir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ymount	cmd/yaffs2.c	/^int do_ymount(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ymv	cmd/yaffs2.c	/^int do_ymv(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_yrd	cmd/yaffs2.c	/^int do_yrd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_yrdm	cmd/yaffs2.c	/^int do_yrdm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_yrm	cmd/yaffs2.c	/^int do_yrm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_yrmdir	cmd/yaffs2.c	/^int do_yrmdir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ytrace	cmd/yaffs2.c	/^int do_ytrace(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_yumount	cmd/yaffs2.c	/^int do_yumount(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ywr	cmd/yaffs2.c	/^int do_ywr(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_ywrm	cmd/yaffs2.c	/^int do_ywrm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_zboot	arch/x86/lib/zimage.c	/^int do_zboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])$/;"	f	typeref:typename:int
do_zfs_load	cmd/zfs.c	/^static int do_zfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_zfs_ls	cmd/zfs.c	/^static int do_zfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
do_zip	cmd/zip.c	/^static int do_zip(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
doc_init	board/mpl/common/common_util.c	/^void doc_init (void)$/;"	f	typeref:typename:void
docar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	docar;	\/* Destination Operations CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
docar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	docar;		\/* 0xc001c - Destination Operations Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
docfunctions	scripts/docproc.c	/^static void docfunctions(char * filename, char * type)$/;"	f	typeref:typename:void	file:
dochelp	doc/DocBook/Makefile	/^dochelp:$/;"	t
docking_attached	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t docking_attached:1;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t:1
docking_supported	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t docking_supported:1;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t:1
doclean	scripts/objdiff	/^doclean() {$/;"	f
docont	tools/gdb/gdbsend.c	/^int verbose = 0, docont = 0;$/;"	v	typeref:typename:int
docsect	scripts/docproc.c	/^static void docsect(char *filename, char *line)$/;"	f	typeref:typename:void	file:
docsection	scripts/docproc.c	/^FILELINE * docsection;$/;"	v	typeref:typename:FILELINE *
dodiff	scripts/objdiff	/^dodiff() {$/;"	f
doepctl	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 doepctl;$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u32
doepdma	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 doepdma;$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u32
doepdmab	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 doepdmab;$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u32
doepint	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 doepint;$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u32
doepmsk	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 doepmsk; \/* Device OUT Endpoint Common Interrupt Mask *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
doeptsiz	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 doeptsiz;$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u32
doff	arch/m68k/include/asm/coldfire/edma.h	/^	u16 doff;		\/* 0x16 Signed Destination Address Offset *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u16
doing_buffered_block_rewrite	fs/yaffs2/yaffs_guts.h	/^	int doing_buffered_block_rewrite;$/;"	m	struct:yaffs_dev	typeref:typename:int
domain_attr	arch/powerpc/include/asm/fsl_pamu.h	/^	} domain_attr;$/;"	m	struct:paace	typeref:union:paace::__anon6139da31010a
domain_val	arch/arm/include/asm/proc-armv/domain.h	/^#define domain_val(/;"	d
done	arch/arm/include/asm/imx-common/dma.h	/^	struct list_head done;$/;"	m	struct:mxs_dma_chan	typeref:struct:list_head
done	arch/powerpc/cpu/mpc86xx/cache.S	/^done:$/;"	l
done	drivers/crypto/fsl/jr.h	/^	int done;$/;"	m	struct:result	typeref:typename:int
done	drivers/usb/gadget/at91_udc.c	/^static void done(struct at91_ep *ep, struct at91_request *req, int status)$/;"	f	typeref:typename:void	file:
done	drivers/usb/gadget/dwc2_udc_otg.c	/^static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)$/;"	f	typeref:typename:void	file:
done	drivers/usb/gadget/pxa25x_udc.c	/^static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)$/;"	f	typeref:typename:void	file:
done	include/ACEX1K.h	/^	Altera_done_fn		done;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_done_fn
done	include/ACEX1K.h	/^	Altera_done_fn		done;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_done_fn
done	include/altera.h	/^	Altera_done_fn done;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_done_fn
done	include/libfdt.h	/^	int done;			\/* What we have completed scanning *\/$/;"	m	struct:fdt_region_ptrs	typeref:typename:int
done	include/spartan2.h	/^	xilinx_done_fn	done;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_done_fn
done	include/spartan2.h	/^	xilinx_done_fn	done;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_done_fn
done	include/spartan3.h	/^	xilinx_done_fn	done;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_done_fn
done	include/spartan3.h	/^	xilinx_done_fn	done;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_done_fn
done	include/u-boot/zlib.h	/^	int	done; \/* true when done reading gzip header (not used$/;"	m	struct:gz_header_s	typeref:typename:int
done	include/usbdevice.h	/^	struct urb_link done;	\/* transmitted urbs *\/$/;"	m	struct:usb_endpoint_instance	typeref:struct:urb_link
done	include/virtex2.h	/^	xilinx_done_fn	done;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_done_fn
doneLoop	arch/arm/mach-davinci/lowlevel_init.S	/^doneLoop:$/;"	l
doneLoop_0	arch/arm/mach-davinci/lowlevel_init.S	/^doneLoop_0:$/;"	l
done_already	fs/ubifs/log.c	/^static int done_already(struct rb_root *done_tree, int lnum)$/;"	f	typeref:typename:int	file:
done_command	common/cli_hush.c	/^static int done_command(struct p_context *ctx)$/;"	f	typeref:typename:int	file:
done_flag	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^	u32 done_flag;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:u32	file:
done_flag	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	u32 done_flag;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:u32	file:
done_head	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	done_head;		\/* info returned for an interrupt *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32
done_head	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	done_head;		\/* info returned for an interrupt *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32
done_head	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 done_head;	\/* info returned for an interrupt *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32
done_head	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 done_head;	\/* info returned for an interrupt *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32
done_head	drivers/usb/host/ohci.h	/^	__u32	done_head;		\/* info returned for an interrupt *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32
done_pipe	common/cli_hush.c	/^static int done_pipe(struct p_context *ctx, pipe_style type)$/;"	f	typeref:typename:int	file:
done_pkts_coal	drivers/net/mvpp2.c	/^	u32 done_pkts_coal;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:u32	file:
done_ref	fs/ubifs/log.c	/^struct done_ref {$/;"	s	file:
done_word	common/cli_hush.c	/^static int done_word(o_string *dest, struct p_context *ctx)$/;"	f	typeref:typename:int	file:
donehead	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	donehead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
donehead	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	donehead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
donehead	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 donehead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
donehead	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 donehead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
donehead	drivers/usb/host/ohci.h	/^	__u32	donehead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
dont_manipulate_directly	include/fsl-mc/fsl_dpaa_fd.h	/^	uint32_t dont_manipulate_directly[16];$/;"	m	struct:ldpaa_dq	typeref:typename:uint32_t[16]
dont_manipulate_directly	include/fsl-mc/fsl_qbman_portal.h	/^	uint32_t dont_manipulate_directly[1];$/;"	m	struct:qbman_release_desc	typeref:typename:uint32_t[1]
dont_manipulate_directly	include/fsl-mc/fsl_qbman_portal.h	/^	uint32_t dont_manipulate_directly[6];$/;"	m	struct:qbman_pull_desc	typeref:typename:uint32_t[6]
dont_manipulate_directly	include/fsl-mc/fsl_qbman_portal.h	/^	uint32_t dont_manipulate_directly[8];$/;"	m	struct:qbman_eq_desc	typeref:typename:uint32_t[8]
doorbell	drivers/usb/host/xhci.h	/^	volatile __le32	doorbell[256];$/;"	m	struct:xhci_doorbell_array	typeref:typename:volatile __le32[256]
dorecord	scripts/objdiff	/^dorecord() {$/;"	f
dos_partition	disk/part_dos.h	/^typedef struct dos_partition {$/;"	s
dos_partition_t	disk/part_dos.h	/^} dos_partition_t;$/;"	t	typeref:struct:dos_partition
dos_type	disk/part_amiga.h	/^    u32 dos_type;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
dot-config	Makefile	/^		dot-config := 0$/;"	m
dot-config	Makefile	/^dot-config     := 1$/;"	m
dot_clock_freq	drivers/video/ati_radeon_fb.h	/^	u32		dot_clock_freq;$/;"	m	struct:radeon_regs	typeref:typename:u32
dot_clock_freq_2	drivers/video/ati_radeon_fb.h	/^	u32		dot_clock_freq_2;$/;"	m	struct:radeon_regs	typeref:typename:u32
dotw	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	dotw;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
double_buffer_not_ok	drivers/usb/musb-new/musb_core.h	/^	unsigned                double_buffer_not_ok:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
double_bws	drivers/video/bus_vcxk.c	/^	u_char double_bws[16384];$/;"	v	typeref:typename:u_char[16384]
double_bws_long	drivers/video/bus_vcxk.c	/^	u_long  *double_bws_long;$/;"	v	typeref:typename:u_long *
double_bws_word	drivers/video/bus_vcxk.c	/^	u_short *double_bws_word;$/;"	v	typeref:typename:u_short *
double_indir_block	include/ext_common.h	/^			__le32 double_indir_block;$/;"	m	struct:ext2_inode::__anon5bc84367010a::datablocks	typeref:typename:__le32
dout	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 dout;	\/* 0x10608 *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
dout	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 dout;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
dout	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 dout;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
dout	cmd/spi.c	/^static uchar 		dout[MAX_SPI_BYTES];$/;"	v	typeref:typename:uchar[]	file:
dout	drivers/spi/mvebu_a3700_spi.c	/^	u32 dout;	\/* 0x10608 *\/$/;"	m	struct:spi_reg	typeref:typename:u32	file:
down	drivers/usb/eth/r8152.h	/^		void (*down)(struct r8152 *);$/;"	m	struct:r8152::rtl_ops	typeref:typename:void (*)(struct r8152 *)
down_read	include/linux/compat.h	/^#define down_read(/;"	d
down_write	include/linux/compat.h	/^#define down_write(/;"	d
down_write_trylock	include/linux/compat.h	/^#define down_write_trylock(/;"	d
downcase	fs/fat/fat.c	/^static void downcase(char *str)$/;"	f	typeref:typename:void	file:
download_bytes	drivers/usb/gadget/f_fastboot.c	/^static unsigned int download_bytes;$/;"	v	typeref:typename:unsigned int	file:
download_head	drivers/usb/gadget/f_thor.c	/^static long long int download_head(unsigned long long total,$/;"	f	typeref:typename:long long int	file:
download_menu	board/samsung/common/misc.c	/^static void download_menu(void)$/;"	f	typeref:typename:void	file:
download_size	drivers/usb/gadget/f_fastboot.c	/^static unsigned int download_size;$/;"	v	typeref:typename:unsigned int	file:
download_tail	drivers/usb/gadget/f_thor.c	/^static int download_tail(long long int left, int cnt)$/;"	f	typeref:typename:int	file:
downspread	drivers/video/tegra124/sor.h	/^	int	downspread;$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
downstring	common/bedbug.c	/^int downstring (char *s)$/;"	f	typeref:typename:int
dp	arch/arm/dts/exynos5.dtsi	/^	dp: dp@145b0000 {$/;"	l
dp	arch/arm/dts/exynos54xx.dtsi	/^	dp: dp@145b0000 {$/;"	l
dp	include/efi_api.h	/^	struct efi_device_path dp;$/;"	m	struct:efi_device_path_file_path	typeref:struct:efi_device_path
dp	lib/efi_loader/efi_disk.c	/^	struct efi_device_path_file_path *dp;$/;"	m	struct:efi_disk_obj	typeref:struct:efi_device_path_file_path *	file:
dp	lib/efi_loader/efi_net.c	/^	struct efi_device_path_file_path dp[2];$/;"	m	struct:efi_net_obj	typeref:struct:efi_device_path_file_path[2]	file:
dp501_base	board/gdsys/common/dp501.c	/^int dp501_base[] = CONFIG_SYS_DP501_BASE;$/;"	v	typeref:typename:int[]
dp501_clrbits	board/gdsys/common/dp501.c	/^static void dp501_clrbits(u8 addr, u8 reg, u8 mask)$/;"	f	typeref:typename:void	file:
dp501_detect_cable_adapter	board/gdsys/common/dp501.c	/^static int dp501_detect_cable_adapter(u8 addr)$/;"	f	typeref:typename:int	file:
dp501_i2c	board/gdsys/common/dp501.c	/^int dp501_i2c[] = CONFIG_SYS_DP501_I2C;$/;"	v	typeref:typename:int[]
dp501_link_training	board/gdsys/common/dp501.c	/^static void dp501_link_training(u8 addr)$/;"	f	typeref:typename:void	file:
dp501_powerdown	board/gdsys/common/dp501.c	/^void dp501_powerdown(u8 addr)$/;"	f	typeref:typename:void
dp501_powerup	board/gdsys/common/dp501.c	/^void dp501_powerup(u8 addr)$/;"	f	typeref:typename:void
dp501_probe	board/gdsys/common/dp501.c	/^int dp501_probe(unsigned screen, bool power)$/;"	f	typeref:typename:int
dp501_setbits	board/gdsys/common/dp501.c	/^static void dp501_setbits(u8 addr, u8 reg, u8 mask)$/;"	f	typeref:typename:void	file:
dp83630_config	drivers/net/phy/natsemi.c	/^static int dp83630_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83848_auto_negotiate	arch/arm/mach-davinci/dp83848.c	/^int dp83848_auto_negotiate(int phy_addr)$/;"	f	typeref:typename:int
dp83848_get_link_speed	arch/arm/mach-davinci/dp83848.c	/^int dp83848_get_link_speed(int phy_addr)$/;"	f	typeref:typename:int
dp83848_init_phy	arch/arm/mach-davinci/dp83848.c	/^int dp83848_init_phy(int phy_addr)$/;"	f	typeref:typename:int
dp83848_is_phy_connected	arch/arm/mach-davinci/dp83848.c	/^int dp83848_is_phy_connected(int phy_addr)$/;"	f	typeref:typename:int
dp83848_parse_status	drivers/net/phy/natsemi.c	/^static int dp83848_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83848_startup	drivers/net/phy/natsemi.c	/^static int dp83848_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83865_parse_status	drivers/net/phy/natsemi.c	/^static int dp83865_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83865_startup	drivers/net/phy/natsemi.c	/^static int dp83865_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83867_0	arch/arm/dts/dra72-evm-revc.dts	/^	dp83867_0: ethernet-phy@2 {$/;"	l
dp83867_1	arch/arm/dts/dra72-evm-revc.dts	/^	dp83867_1: ethernet-phy@3 {$/;"	l
dp83867_config	drivers/net/phy/ti.c	/^static int dp83867_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83867_of_init	drivers/net/phy/ti.c	/^static int dp83867_of_init(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83867_private	drivers/net/phy/ti.c	/^struct dp83867_private {$/;"	s	file:
dp838xx_config	drivers/net/phy/natsemi.c	/^static int dp838xx_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
dp83902a_ClearCounters	drivers/net/ne2000_base.c	/^dp83902a_ClearCounters(void)$/;"	f	typeref:typename:void	file:
dp83902a_Overflow	drivers/net/ne2000_base.c	/^dp83902a_Overflow(void)$/;"	f	typeref:typename:void	file:
dp83902a_RxEvent	drivers/net/ne2000_base.c	/^dp83902a_RxEvent(void)$/;"	f	typeref:typename:void	file:
dp83902a_TxEvent	drivers/net/ne2000_base.c	/^dp83902a_TxEvent(void)$/;"	f	typeref:typename:void	file:
dp83902a_init	drivers/net/ne2000_base.c	/^dp83902a_init(unsigned char *enetaddr)$/;"	f	typeref:typename:bool	file:
dp83902a_poll	drivers/net/ne2000_base.c	/^dp83902a_poll(void)$/;"	f	typeref:typename:void	file:
dp83902a_priv_data	drivers/net/ne2000_base.h	/^typedef struct dp83902a_priv_data {$/;"	s
dp83902a_priv_data_t	drivers/net/ne2000_base.h	/^} dp83902a_priv_data_t;$/;"	t	typeref:struct:dp83902a_priv_data
dp83902a_recv	drivers/net/ne2000_base.c	/^dp83902a_recv(u8 *data, int len)$/;"	f	typeref:typename:void	file:
dp83902a_send	drivers/net/ne2000_base.c	/^dp83902a_send(u8 *data, int total_len, u32 key)$/;"	f	typeref:typename:void	file:
dp83902a_start	drivers/net/ne2000_base.c	/^dp83902a_start(u8 * enaddr)$/;"	f	typeref:typename:void	file:
dp83902a_start_xmit	drivers/net/ne2000_base.c	/^dp83902a_start_xmit(int start_page, int len)$/;"	f	typeref:typename:void	file:
dp83902a_stop	drivers/net/ne2000_base.c	/^dp83902a_stop(void)$/;"	f	typeref:typename:void	file:
dp_aclk	arch/arm/dts/zynqmp-clk.dtsi	/^	dp_aclk: clock0 {$/;"	l
dp_aclk	arch/arm/dts/zynqmp-ep108-clk.dtsi	/^	dp_aclk: clock0 {$/;"	l
dp_alloc_base	arch/powerpc/include/asm/global_data.h	/^	unsigned int dp_alloc_base;$/;"	m	struct:arch_global_data	typeref:typename:unsigned int
dp_alloc_top	arch/powerpc/include/asm/global_data.h	/^	unsigned int dp_alloc_top;$/;"	m	struct:arch_global_data	typeref:typename:unsigned int
dp_aud_clk	arch/arm/dts/zynqmp-clk.dtsi	/^	dp_aud_clk: clock1 {$/;"	l
dp_aud_clk	arch/arm/dts/zynqmp-ep108-clk.dtsi	/^	dp_aud_clk: clock1 {$/;"	l
dp_aud_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_aud_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_audio_margin	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_audio_margin;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_aux	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_aux;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_aux_ch0_i2c	arch/arm/dts/tegra186.dtsi	/^	dp_aux_ch0_i2c: i2c@31b0000 {$/;"	l
dp_aux_ch1_i2c	arch/arm/dts/tegra186.dtsi	/^	dp_aux_ch1_i2c: i2c@3190000 {$/;"	l
dp_bias	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_bias;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_chan	drivers/video/ipu_regs.h	/^	u32 dp_chan;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
dp_chan_def	drivers/video/ipu_regs.h	/^	u32 dp_chan_def;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
dp_config	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_config;$/;"	m	struct:dpll	typeref:typename:u32
dp_csc_array	drivers/video/ipu_disp.c	/^static struct dp_csc_param_t dp_csc_array[CSC_NUM][CSC_NUM] = {$/;"	v	typeref:struct:dp_csc_param_t[][]	file:
dp_csc_async	drivers/video/ipu_regs.h	/^	u32 dp_csc_async[2];$/;"	m	struct:ipu_com_async	typeref:typename:u32[2]
dp_csc_param_t	drivers/video/ipu_disp.c	/^struct dp_csc_param_t {$/;"	s	file:
dp_csca_async	drivers/video/ipu_regs.h	/^	u32 dp_csca_async[4];$/;"	m	struct:ipu_com_async	typeref:typename:u32[4]
dp_ctl	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_ctl;$/;"	m	struct:dpll	typeref:typename:u32
dp_data	drivers/video/tegra124/dp.c	/^struct tegra_dp_priv dp_data;$/;"	v	typeref:struct:tegra_dp_priv
dp_datatype	drivers/video/ati_radeon_fb.h	/^	u32		dp_datatype;$/;"	m	struct:radeon_regs	typeref:typename:u32
dp_ddr_restore	board/freescale/common/arm_sleep.c	/^static void dp_ddr_restore(void)$/;"	f	typeref:typename:void	file:
dp_ddr_restore	board/freescale/common/mpc85xx_sleep.c	/^static void dp_ddr_restore(void)$/;"	f	typeref:typename:void	file:
dp_debug_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_debug_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_destat	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_destat;$/;"	m	struct:dpll	typeref:typename:u32
dp_enabled	drivers/video/exynos/exynos_fb.c	/^	unsigned int dp_enabled;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
dp_enabled	include/exynos_lcd.h	/^	unsigned int dp_enabled;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
dp_hdcp_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_hdcp_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_hfs_mfd	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_hfs_mfd;$/;"	m	struct:dpll	typeref:typename:u32
dp_hfs_mfn	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_hfs_mfn;$/;"	m	struct:dpll	typeref:typename:u32
dp_hfs_op	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_hfs_op;$/;"	m	struct:dpll	typeref:typename:u32
dp_hotplug	drivers/video/broadwell_igd.c	/^	u32 dp_hotplug[3];$/;"	m	struct:broadwell_igd_plat	typeref:typename:u32[3]	file:
dp_hw_link_training	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_hw_link_training;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_int_sta	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_int_sta;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_irq_type	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum dp_irq_type {$/;"	g
dp_last_addr	cmd/fpgad.c	/^static uint	dp_last_addr;$/;"	v	typeref:typename:uint	file:
dp_last_addr	cmd/mem.c	/^static ulong	dp_last_addr, dp_last_size;$/;"	v	typeref:typename:ulong	file:
dp_last_fpga	cmd/fpgad.c	/^static uint	dp_last_fpga;$/;"	v	typeref:typename:uint	file:
dp_last_length	cmd/fpgad.c	/^static uint	dp_last_length = 0x40;$/;"	v	typeref:typename:uint	file:
dp_last_length	cmd/mem.c	/^static ulong	dp_last_length = 0x40;$/;"	v	typeref:typename:ulong	file:
dp_last_size	cmd/mem.c	/^static ulong	dp_last_addr, dp_last_size;$/;"	v	typeref:typename:ulong	file:
dp_link_debug_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_link_debug_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_m_cal_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_m_cal_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_mfd	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_mfd;$/;"	m	struct:dpll	typeref:typename:u32
dp_mfn	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_mfn;$/;"	m	struct:dpll	typeref:typename:u32
dp_mfn_minus	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_mfn_minus;$/;"	m	struct:dpll	typeref:typename:u32
dp_mfn_plus	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_mfn_plus;$/;"	m	struct:dpll	typeref:typename:u32
dp_mfn_togc	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_mfn_togc;$/;"	m	struct:dpll	typeref:typename:u32
dp_mie_clkcon	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int dp_mie_clkcon;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
dp_op	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	dp_op;$/;"	m	struct:dpll	typeref:typename:u32
dp_out	arch/arm/dts/exynos5250-snow.dts	/^				dp_out: endpoint {$/;"	l
dp_out	arch/arm/dts/exynos5250-spring.dts	/^			dp_out: endpoint {$/;"	l
dp_out	arch/arm/dts/exynos5420-peach-pit.dts	/^			dp_out: endpoint {$/;"	l
dp_out	arch/arm/dts/exynos5800-peach-pi.dts	/^			dp_out: endpoint {$/;"	l
dp_pd	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_pd;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_reserv1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_reserv1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_reserv2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_reserv2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_resume_prepare	board/freescale/common/arm_sleep.c	/^static void dp_resume_prepare(void)$/;"	f	typeref:typename:void	file:
dp_resume_prepare	board/freescale/common/mpc85xx_sleep.c	/^static void dp_resume_prepare(void)$/;"	f	typeref:typename:void	file:
dp_rockchip_ops	drivers/video/rockchip/rk_edp.c	/^static const struct dm_display_ops dp_rockchip_ops = {$/;"	v	typeref:typename:const struct dm_display_ops	file:
dp_tegra_ops	drivers/video/tegra124/dp.c	/^static const struct dm_display_ops dp_tegra_ops = {$/;"	v	typeref:typename:const struct dm_display_ops	file:
dp_tegra_probe	drivers/video/tegra124/dp.c	/^static int dp_tegra_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dp_test	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_test;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_training_ptn_set	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_training_ptn_set;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_tx_version	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_tx_version;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_vid_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_vid_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dp_video_fifo_thrd	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	dp_video_fifo_thrd;$/;"	m	struct:rk3288_edp	typeref:typename:u32
dpaa_fd	include/fsl-mc/fsl_dpaa_fd.h	/^struct dpaa_fd {$/;"	s
dpaa_fd_format	include/fsl-mc/fsl_dpaa_fd.h	/^enum dpaa_fd_format {$/;"	g
dpaa_fd_list	include/fsl-mc/fsl_dpaa_fd.h	/^	dpaa_fd_list,$/;"	e	enum:dpaa_fd_format
dpaa_fd_sg	include/fsl-mc/fsl_dpaa_fd.h	/^	dpaa_fd_sg$/;"	e	enum:dpaa_fd_format
dpaa_fd_simple	include/fsl-mc/fsl_dpaa_fd.h	/^		struct dpaa_fd_simple {$/;"	s	union:dpaa_fd::__anonb79f23a2010a
dpaa_fd_single	include/fsl-mc/fsl_dpaa_fd.h	/^	dpaa_fd_single = 0,$/;"	e	enum:dpaa_fd_format
dpalloc	examples/standalone/mem_to_mem_idma2intr.c	/^uint dpalloc (uint size, uint align)$/;"	f	typeref:typename:uint
dpaux	arch/arm/dts/tegra124.dtsi	/^		dpaux: dpaux@545c0000 {$/;"	l
dpaux	arch/arm/dts/tegra210.dtsi	/^		dpaux: dpaux@545c0000 {$/;"	l
dpaux1	arch/arm/dts/tegra210.dtsi	/^		dpaux1: dpaux@54040000 {$/;"	l
dpaux_ctlr	drivers/video/tegra124/displayport.h	/^struct dpaux_ctlr {$/;"	s
dpbase	examples/standalone/mem_to_mem_idma2intr.c	/^static uint dpbase = 0;$/;"	v	typeref:typename:uint	file:
dpbp_attr	include/fsl-mc/fsl_dpbp.h	/^struct dpbp_attr {$/;"	s
dpbp_attr	include/fsl-mc/fsl_mc_private.h	/^	struct dpbp_attr dpbp_attr;$/;"	m	struct:fsl_dpbp_obj	typeref:struct:dpbp_attr
dpbp_cfg	include/fsl-mc/fsl_dpbp.h	/^struct dpbp_cfg {$/;"	s
dpbp_close	drivers/net/fsl-mc/dpbp.c	/^int dpbp_close(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_create	drivers/net/fsl-mc/dpbp.c	/^int dpbp_create(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_destroy	drivers/net/fsl-mc/dpbp.c	/^int dpbp_destroy(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_disable	drivers/net/fsl-mc/dpbp.c	/^int dpbp_disable(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_enable	drivers/net/fsl-mc/dpbp.c	/^int dpbp_enable(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_exit	drivers/net/fsl-mc/mc.c	/^static int dpbp_exit(void)$/;"	f	typeref:typename:int	file:
dpbp_get_attributes	drivers/net/fsl-mc/dpbp.c	/^int dpbp_get_attributes(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_handle	include/fsl-mc/fsl_mc_private.h	/^	uint16_t dpbp_handle;$/;"	m	struct:fsl_dpbp_obj	typeref:typename:uint16_t
dpbp_id	include/fsl-mc/fsl_dpni.h	/^		int		dpbp_id;$/;"	m	struct:dpni_pools_cfg::__anonf56ef98e0408	typeref:typename:int
dpbp_init	drivers/net/fsl-mc/mc.c	/^static int dpbp_init(void)$/;"	f	typeref:typename:int	file:
dpbp_open	drivers/net/fsl-mc/dpbp.c	/^int dpbp_open(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpbp_reset	drivers/net/fsl-mc/dpbp.c	/^int dpbp_reset(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpcd_efc	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned char dpcd_efc;$/;"	m	struct:exynos_dp_priv	typeref:typename:unsigned char
dpcd_request	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum dpcd_request {$/;"	g
dpcd_rev	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned char dpcd_rev;$/;"	m	struct:exynos_dp_priv	typeref:typename:unsigned char
dpd	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 dpd;		\/* 0xE4: EMC_DPD *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
dpdma_clk	arch/arm/dts/zynqmp-clk.dtsi	/^	dpdma_clk: dpdma_clk {$/;"	l
dphycnt0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dphycnt0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dphycnt1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dphycnt1;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dphycnt2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dphycnt2;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dpi_out	arch/arm/dts/am437x-gp-evm.dts	/^		dpi_out: endpoint@0 {$/;"	l
dpi_out	arch/arm/dts/am437x-sk-evm.dts	/^		dpi_out: endpoint@0 {$/;"	l
dpi_out	arch/arm/dts/am43x-epos-evm.dts	/^		dpi_out: endpoint@0 {$/;"	l
dpinit_done	examples/standalone/mem_to_mem_idma2intr.c	/^uint dpinit_done = 0;$/;"	v	typeref:typename:uint
dpio_attr	include/fsl-mc/fsl_dpio.h	/^struct dpio_attr {$/;"	s
dpio_cfg	include/fsl-mc/fsl_dpio.h	/^struct dpio_cfg {$/;"	s
dpio_channel_mode	include/fsl-mc/fsl_dpio.h	/^enum dpio_channel_mode {$/;"	g
dpio_close	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_close(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_create	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_create(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_destroy	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_destroy(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_disable	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_disable(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_enable	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_enable(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_exit	drivers/net/fsl-mc/mc.c	/^static int dpio_exit(void)$/;"	f	typeref:typename:int	file:
dpio_get_attributes	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_get_attributes(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_handle	include/fsl-mc/fsl_mc_private.h	/^	uint16_t dpio_handle;$/;"	m	struct:fsl_dpio_obj	typeref:typename:uint16_t
dpio_id	include/fsl-mc/fsl_mc_private.h	/^	int dpio_id;$/;"	m	struct:fsl_dpio_obj	typeref:typename:int
dpio_init	drivers/net/fsl-mc/mc.c	/^static int dpio_init(void)$/;"	f	typeref:typename:int	file:
dpio_open	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_open(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpio_reset	drivers/net/fsl-mc/dpio/dpio.c	/^int dpio_reset(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpll	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct dpll {$/;"	s
dpll1	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^static unsigned long dpll1(void)$/;"	f	typeref:typename:unsigned long	file:
dpll3_init_34xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void dpll3_init_34xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
dpll3_init_36xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void dpll3_init_36xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
dpll4_init_34xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void dpll4_init_34xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
dpll4_init_36xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void dpll4_init_36xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
dpll5_init_34xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void dpll5_init_34xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
dpll5_init_36xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void dpll5_init_36xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
dpll_abe_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_abe_ck: dpll_abe_ck {$/;"	l
dpll_abe_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_abe_m2_ck: dpll_abe_m2_ck {$/;"	l
dpll_abe_m2x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_abe_m2x2_ck: dpll_abe_m2x2_ck {$/;"	l
dpll_abe_m3x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_abe_m3x2_ck: dpll_abe_m3x2_ck {$/;"	l
dpll_abe_x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_abe_x2_ck: dpll_abe_x2_ck {$/;"	l
dpll_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 dpll_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
dpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dpll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dpll_core	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params dpll_core = {$/;"	v	typeref:typename:const struct dpll_params
dpll_core	board/compulab/cm_t43/spl.c	/^const struct dpll_params dpll_core = { 1000, 24, -1, -1, 10,  8,  4 };$/;"	v	typeref:typename:const struct dpll_params
dpll_core	board/ti/am43xx/board.c	/^const struct dpll_params dpll_core[NUM_CRYSTAL_FREQ] = {$/;"	v	typeref:typename:const struct dpll_params[]
dpll_core_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_byp_mux: dpll_core_byp_mux {$/;"	l
dpll_core_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_core_ck: dpll_core_ck {$/;"	l
dpll_core_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_core_ck: dpll_core_ck {$/;"	l
dpll_core_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_ck: dpll_core_ck {$/;"	l
dpll_core_h12x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_h12x2_ck: dpll_core_h12x2_ck {$/;"	l
dpll_core_h13x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_h13x2_ck: dpll_core_h13x2_ck {$/;"	l
dpll_core_h14x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_h14x2_ck: dpll_core_h14x2_ck {$/;"	l
dpll_core_h22x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_h22x2_ck: dpll_core_h22x2_ck {$/;"	l
dpll_core_h23x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_h23x2_ck: dpll_core_h23x2_ck {$/;"	l
dpll_core_h24x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_h24x2_ck: dpll_core_h24x2_ck {$/;"	l
dpll_core_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_m2_ck: dpll_core_m2_ck {$/;"	l
dpll_core_m4_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_core_m4_ck: dpll_core_m4_ck {$/;"	l
dpll_core_m4_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_core_m4_ck: dpll_core_m4_ck {$/;"	l
dpll_core_m4_div2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_core_m4_div2_ck: dpll_core_m4_div2_ck {$/;"	l
dpll_core_m4_div2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_core_m4_div2_ck: dpll_core_m4_div2_ck {$/;"	l
dpll_core_m5_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_core_m5_ck: dpll_core_m5_ck {$/;"	l
dpll_core_m5_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_core_m5_ck: dpll_core_m5_ck {$/;"	l
dpll_core_m6_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_core_m6_ck: dpll_core_m6_ck {$/;"	l
dpll_core_m6_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_core_m6_ck: dpll_core_m6_ck {$/;"	l
dpll_core_opp100	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params dpll_core_opp100 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_core_regs	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_regs dpll_core_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_core_regs	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^const struct dpll_regs dpll_core_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_core_x2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_core_x2_ck: dpll_core_x2_ck {$/;"	l
dpll_core_x2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_core_x2_ck: dpll_core_x2_ck {$/;"	l
dpll_core_x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_core_x2_ck: dpll_core_x2_ck {$/;"	l
dpll_ddr	board/birdland/bav335x/board.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/compulab/cm_t335/spl.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/compulab/cm_t43/spl.c	/^const struct dpll_params dpll_ddr  = { 400,  23, 1,  -1,  1, -1, -1 };$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/isee/igep0033/board.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/phytec/pcm051/board.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/siemens/common/board.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/ti/am335x/board.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr	board/vscom/baltos/board.c	/^const struct dpll_params dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr2	board/gumstix/pepper/board.c	/^const struct dpll_params dpll_ddr2 = {266, OSC-1, 1, -1, -1, -1, -1};$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr3	board/BuR/brppt1/board.c	/^static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};$/;"	v	typeref:typename:const struct dpll_params	file:
dpll_ddr3	board/BuR/brxre1/board.c	/^const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr3	board/gumstix/pepper/board.c	/^const struct dpll_params dpll_ddr3 = {400, OSC-1, 1, -1, -1, -1, -1};$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_266	board/silica/pengwyn/board.c	/^const struct dpll_params dpll_ddr_266 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_303	board/silica/pengwyn/board.c	/^const struct dpll_params dpll_ddr_303 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_400	board/silica/pengwyn/board.c	/^const struct dpll_params dpll_ddr_400 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_baltos	board/vscom/baltos/board.c	/^const struct dpll_params dpll_ddr_baltos = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_bone_black	board/birdland/bav335x/board.c	/^const struct dpll_params dpll_ddr_bone_black = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_bone_black	board/ti/am335x/board.c	/^const struct dpll_params dpll_ddr_bone_black = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_ddr_byp_mux: dpll_ddr_byp_mux {$/;"	l
dpll_ddr_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_ddr_ck: dpll_ddr_ck {$/;"	l
dpll_ddr_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_ddr_ck: dpll_ddr_ck {$/;"	l
dpll_ddr_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_ddr_ck: dpll_ddr_ck {$/;"	l
dpll_ddr_evm_sk	board/birdland/bav335x/board.c	/^const struct dpll_params dpll_ddr_evm_sk = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_evm_sk	board/ti/am335x/board.c	/^const struct dpll_params dpll_ddr_evm_sk = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_evm_sk	board/vscom/baltos/board.c	/^const struct dpll_params dpll_ddr_evm_sk = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_h11x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_ddr_h11x2_ck: dpll_ddr_h11x2_ck {$/;"	l
dpll_ddr_m2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_ddr_m2_ck: dpll_ddr_m2_ck {$/;"	l
dpll_ddr_m2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_ddr_m2_ck: dpll_ddr_m2_ck {$/;"	l
dpll_ddr_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_ddr_m2_ck: dpll_ddr_m2_ck {$/;"	l
dpll_ddr_m2_div2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_ddr_m2_div2_ck: dpll_ddr_m2_div2_ck {$/;"	l
dpll_ddr_m4_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_ddr_m4_ck: dpll_ddr_m4_ck {$/;"	l
dpll_ddr_regs	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_regs dpll_ddr_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_ddr_regs	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^const struct dpll_regs dpll_ddr_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_ddr_shc	board/bosch/shc/board.c	/^const struct dpll_params dpll_ddr_shc = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_sl50	board/tcl/sl50/board.c	/^const struct dpll_params dpll_ddr_sl50 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_ddr_x2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_ddr_x2_ck: dpll_ddr_x2_ck {$/;"	l
dpll_ddr_x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_ddr_x2_ck: dpll_ddr_x2_ck {$/;"	l
dpll_disp_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_disp_ck: dpll_disp_ck {$/;"	l
dpll_disp_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_disp_ck: dpll_disp_ck {$/;"	l
dpll_disp_m2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_disp_m2_ck: dpll_disp_m2_ck {$/;"	l
dpll_disp_m2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_disp_m2_ck: dpll_disp_m2_ck {$/;"	l
dpll_dsp_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_dsp_byp_mux: dpll_dsp_byp_mux {$/;"	l
dpll_dsp_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_dsp_ck: dpll_dsp_ck {$/;"	l
dpll_dsp_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_dsp_m2_ck: dpll_dsp_m2_ck {$/;"	l
dpll_dsp_m3x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_dsp_m3x2_ck: dpll_dsp_m3x2_ck {$/;"	l
dpll_dsp_x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_dsp_x2_ck: dpll_dsp_x2_ck {$/;"	l
dpll_eve_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_eve_byp_mux: dpll_eve_byp_mux {$/;"	l
dpll_eve_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_eve_ck: dpll_eve_ck {$/;"	l
dpll_eve_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_eve_m2_ck: dpll_eve_m2_ck {$/;"	l
dpll_extdev_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_extdev_ck: dpll_extdev_ck {$/;"	l
dpll_extdev_m2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_extdev_m2_ck: dpll_extdev_m2_ck {$/;"	l
dpll_gmac_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_byp_mux: dpll_gmac_byp_mux {$/;"	l
dpll_gmac_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_ck: dpll_gmac_ck {$/;"	l
dpll_gmac_h11x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_h11x2_ck: dpll_gmac_h11x2_ck {$/;"	l
dpll_gmac_h12x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_h12x2_ck: dpll_gmac_h12x2_ck {$/;"	l
dpll_gmac_h13x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_h13x2_ck: dpll_gmac_h13x2_ck {$/;"	l
dpll_gmac_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_m2_ck: dpll_gmac_m2_ck {$/;"	l
dpll_gmac_m3x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_m3x2_ck: dpll_gmac_m3x2_ck {$/;"	l
dpll_gmac_x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gmac_x2_ck: dpll_gmac_x2_ck {$/;"	l
dpll_gpu_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gpu_byp_mux: dpll_gpu_byp_mux {$/;"	l
dpll_gpu_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gpu_ck: dpll_gpu_ck {$/;"	l
dpll_gpu_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_gpu_m2_ck: dpll_gpu_m2_ck {$/;"	l
dpll_init_cfg	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^const struct pll_div dpll_init_cfg = {1, 50, 3, 1};$/;"	v	typeref:typename:const struct pll_div
dpll_iva_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_iva_byp_mux: dpll_iva_byp_mux {$/;"	l
dpll_iva_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_iva_ck: dpll_iva_ck {$/;"	l
dpll_iva_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_iva_m2_ck: dpll_iva_m2_ck {$/;"	l
dpll_lcd_regs	board/siemens/pxm2/board.c	/^static struct dpll_regs dpll_lcd_regs = {$/;"	v	typeref:struct:dpll_regs	file:
dpll_lcd_regs	board/siemens/rut/board.c	/^static struct dpll_regs dpll_lcd_regs = {$/;"	v	typeref:struct:dpll_regs	file:
dpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dpll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dpll_map	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	struct pipe3_dpll_map   *dpll_map;$/;"	m	struct:omap_pipe3	typeref:struct:pipe3_dpll_map *
dpll_map	drivers/usb/dwc3/ti_usb_phy.c	/^	struct usb3_dpll_map *dpll_map;$/;"	m	struct:ti_usb_phy	typeref:struct:usb3_dpll_map *	file:
dpll_map	drivers/usb/dwc3/ti_usb_phy.c	/^	struct usb3_dpll_map *dpll_map;$/;"	m	struct:usb3_dpll_map	typeref:struct:usb3_dpll_map *	file:
dpll_map	drivers/usb/phy/omap_usb_phy.c	/^	struct usb3_dpll_map *dpll_map;$/;"	m	struct:usb3_dpll_map	typeref:struct:usb3_dpll_map *	file:
dpll_map_sata	arch/arm/cpu/armv7/omap-common/sata.c	/^static struct pipe3_dpll_map dpll_map_sata[] = {$/;"	v	typeref:struct:pipe3_dpll_map[]	file:
dpll_map_usb	drivers/usb/dwc3/ti_usb_phy.c	/^static struct usb3_dpll_map dpll_map_usb[] = {$/;"	v	typeref:struct:usb3_dpll_map[]	file:
dpll_map_usb	drivers/usb/phy/omap_usb_phy.c	/^static struct usb3_dpll_map dpll_map_usb[] = {$/;"	v	typeref:struct:usb3_dpll_map[]	file:
dpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned dpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dpll_mpu	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params dpll_mpu = {$/;"	v	typeref:typename:const struct dpll_params
dpll_mpu	board/compulab/cm_t43/spl.c	/^const struct dpll_params dpll_mpu  = { 800,  24, 1,  -1, -1, -1, -1 };$/;"	v	typeref:typename:const struct dpll_params
dpll_mpu	board/ti/am43xx/board.c	/^const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = {$/;"	v	typeref:typename:const struct dpll_params[][]
dpll_mpu_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_mpu_ck: dpll_mpu_ck {$/;"	l
dpll_mpu_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_mpu_ck: dpll_mpu_ck {$/;"	l
dpll_mpu_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_mpu_ck: dpll_mpu_ck {$/;"	l
dpll_mpu_m2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_mpu_m2_ck: dpll_mpu_m2_ck {$/;"	l
dpll_mpu_m2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_mpu_m2_ck: dpll_mpu_m2_ck {$/;"	l
dpll_mpu_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_mpu_m2_ck: dpll_mpu_m2_ck {$/;"	l
dpll_mpu_opp100	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^struct dpll_params dpll_mpu_opp100 = {$/;"	v	typeref:struct:dpll_params
dpll_mpu_pxm2	board/siemens/pxm2/board.c	/^const struct dpll_params dpll_mpu_pxm2 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_mpu_regs	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_regs dpll_mpu_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_mpu_regs	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^const struct dpll_regs dpll_mpu_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_mpu_shc_opp100	board/bosch/shc/board.c	/^const struct dpll_params dpll_mpu_shc_opp100 = {$/;"	v	typeref:typename:const struct dpll_params
dpll_param	arch/arm/include/asm/arch-omap3/clock.h	/^} dpll_param;$/;"	t	typeref:struct:__anonc27596e00108
dpll_params	arch/arm/include/asm/arch-am33xx/clock.h	/^struct dpll_params {$/;"	s
dpll_params	arch/arm/include/asm/omap_common.h	/^struct dpll_params {$/;"	s
dpll_pcie_ref_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_pcie_ref_ck: dpll_pcie_ref_ck {$/;"	l
dpll_pcie_ref_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_pcie_ref_m2_ck: dpll_pcie_ref_m2_ck {$/;"	l
dpll_pcie_ref_m2ldo_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_pcie_ref_m2ldo_ck: dpll_pcie_ref_m2ldo_ck {$/;"	l
dpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned dpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dpll_per	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params dpll_per = {$/;"	v	typeref:typename:const struct dpll_params
dpll_per	board/compulab/cm_t43/spl.c	/^const struct dpll_params dpll_per  = { 960,  24, 5,  -1, -1, -1, -1 };$/;"	v	typeref:typename:const struct dpll_params
dpll_per	board/ti/am43xx/board.c	/^const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = {$/;"	v	typeref:typename:const struct dpll_params[]
dpll_per_36x_param	arch/arm/include/asm/arch-omap3/clock.h	/^struct dpll_per_36x_param {$/;"	s
dpll_per_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_byp_mux: dpll_per_byp_mux {$/;"	l
dpll_per_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_per_ck: dpll_per_ck {$/;"	l
dpll_per_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_per_ck: dpll_per_ck {$/;"	l
dpll_per_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_ck: dpll_per_ck {$/;"	l
dpll_per_clkdcoldo	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_per_clkdcoldo: dpll_per_clkdcoldo {$/;"	l
dpll_per_h11x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_h11x2_ck: dpll_per_h11x2_ck {$/;"	l
dpll_per_h12x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_h12x2_ck: dpll_per_h12x2_ck {$/;"	l
dpll_per_h13x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_h13x2_ck: dpll_per_h13x2_ck {$/;"	l
dpll_per_h14x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_h14x2_ck: dpll_per_h14x2_ck {$/;"	l
dpll_per_m2_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_per_m2_ck: dpll_per_m2_ck {$/;"	l
dpll_per_m2_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_per_m2_ck: dpll_per_m2_ck {$/;"	l
dpll_per_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_m2_ck: dpll_per_m2_ck {$/;"	l
dpll_per_m2_div4_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_per_m2_div4_ck: dpll_per_m2_div4_ck {$/;"	l
dpll_per_m2_div4_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_per_m2_div4_ck: dpll_per_m2_div4_ck {$/;"	l
dpll_per_m2_div4_wkupdm_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	dpll_per_m2_div4_wkupdm_ck: dpll_per_m2_div4_wkupdm_ck {$/;"	l
dpll_per_m2_div4_wkupdm_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	dpll_per_m2_div4_wkupdm_ck: dpll_per_m2_div4_wkupdm_ck {$/;"	l
dpll_per_m2x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_m2x2_ck: dpll_per_m2x2_ck {$/;"	l
dpll_per_regs	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_regs dpll_per_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_per_regs	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^const struct dpll_regs dpll_per_regs = {$/;"	v	typeref:typename:const struct dpll_regs
dpll_per_x2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_per_x2_ck: dpll_per_x2_ck {$/;"	l
dpll_regs	arch/arm/include/asm/arch-am33xx/clock.h	/^struct dpll_regs {$/;"	s
dpll_regs	arch/arm/include/asm/omap_common.h	/^struct dpll_regs {$/;"	s
dpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned dpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dpll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dpll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dpll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dpll_table	drivers/video/exynos/exynos_mipi_dsi_common.c	/^static unsigned int dpll_table[15] = {$/;"	v	typeref:typename:unsigned int[15]	file:
dpll_usb_byp_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_usb_byp_mux: dpll_usb_byp_mux {$/;"	l
dpll_usb_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_usb_ck: dpll_usb_ck {$/;"	l
dpll_usb_clkdcoldo	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_usb_clkdcoldo: dpll_usb_clkdcoldo {$/;"	l
dpll_usb_m2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dpll_usb_m2_ck: dpll_usb_m2_ck {$/;"	l
dplls	arch/arm/include/asm/omap_common.h	/^struct dplls {$/;"	s
dplls_data	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct dplls const **dplls_data =$/;"	v	typeref:struct:dplls const **
dplls_data	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct dplls const **dplls_data =$/;"	v	typeref:struct:dplls const **
dpm_rrp	board/freescale/common/zm7300.c	/^u8 dpm_rrp(uchar r)$/;"	f	typeref:typename:u8
dpm_wrm	board/freescale/common/zm7300.c	/^int dpm_wrm(u8 r, u8 d)$/;"	f	typeref:typename:int
dpm_wrp	board/freescale/common/zm7300.c	/^int dpm_wrp(u8 r, u8 d)$/;"	f	typeref:typename:int
dpmac_attr	include/fsl-mc/fsl_dpmac.h	/^struct dpmac_attr {$/;"	s
dpmac_cfg	include/fsl-mc/fsl_dpmac.h	/^struct dpmac_cfg {$/;"	s
dpmac_close	drivers/net/fsl-mc/dpmac.c	/^int dpmac_close(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_counter	include/fsl-mc/fsl_dpmac.h	/^enum dpmac_counter {$/;"	g
dpmac_create	drivers/net/fsl-mc/dpmac.c	/^int dpmac_create(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_destroy	drivers/net/fsl-mc/dpmac.c	/^int dpmac_destroy(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_endpoint	drivers/net/ldpaa_eth/ldpaa_eth.h	/^struct dprc_endpoint dpmac_endpoint;$/;"	v	typeref:struct:dprc_endpoint
dpmac_eth_if	include/fsl-mc/fsl_dpmac.h	/^enum dpmac_eth_if {$/;"	g
dpmac_get_attributes	drivers/net/fsl-mc/dpmac.c	/^int dpmac_get_attributes(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_get_counter	drivers/net/fsl-mc/dpmac.c	/^int dpmac_get_counter(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_get_link_cfg	drivers/net/fsl-mc/dpmac.c	/^int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_handle	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	uint16_t dpmac_handle;$/;"	m	struct:ldpaa_eth_priv	typeref:typename:uint16_t
dpmac_id	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	int dpmac_id;$/;"	m	struct:ldpaa_eth_priv	typeref:typename:int
dpmac_info	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];$/;"	v	typeref:struct:wriop_dpmac_info[]
dpmac_link_cfg	include/fsl-mc/fsl_dpmac.h	/^struct dpmac_link_cfg {$/;"	s
dpmac_link_state	include/fsl-mc/fsl_dpmac.h	/^struct dpmac_link_state {$/;"	s
dpmac_link_type	include/fsl-mc/fsl_dpmac.h	/^enum dpmac_link_type {$/;"	g
dpmac_mdio_cfg	include/fsl-mc/fsl_dpmac.h	/^struct dpmac_mdio_cfg {$/;"	s
dpmac_mdio_read	drivers/net/fsl-mc/dpmac.c	/^int dpmac_mdio_read(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_mdio_write	drivers/net/fsl-mc/dpmac.c	/^int dpmac_mdio_write(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_open	drivers/net/fsl-mc/dpmac.c	/^int dpmac_open(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_set_link_state	drivers/net/fsl-mc/dpmac.c	/^int dpmac_set_link_state(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpmac_to_devdisr	drivers/net/ldpaa_eth/ls2080a.c	/^u32 dpmac_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
dpms	include/linux/fb.h	/^	__u16 dpms;			\/* DPMS support - see FB_DPMS_ *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
dpni_add_mac_addr	drivers/net/fsl-mc/dpni.c	/^int dpni_add_mac_addr(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_attr	include/fsl-mc/fsl_dpni.h	/^struct dpni_attr {$/;"	s
dpni_attrs	include/fsl-mc/fsl_mc_private.h	/^	struct dpni_attr dpni_attrs;$/;"	m	struct:fsl_dpni_obj	typeref:struct:dpni_attr
dpni_buffer_layout	include/fsl-mc/fsl_dpni.h	/^struct dpni_buffer_layout {$/;"	s
dpni_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_cfg {$/;"	s
dpni_close	drivers/net/fsl-mc/dpni.c	/^int dpni_close(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_counter	include/fsl-mc/fsl_dpni.h	/^enum dpni_counter {$/;"	g
dpni_create	drivers/net/fsl-mc/dpni.c	/^int dpni_create(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_dest	include/fsl-mc/fsl_dpni.h	/^enum dpni_dest {$/;"	g
dpni_dest_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_dest_cfg {$/;"	s
dpni_destroy	drivers/net/fsl-mc/dpni.c	/^int dpni_destroy(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_disable	drivers/net/fsl-mc/dpni.c	/^int dpni_disable(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_enable	drivers/net/fsl-mc/dpni.c	/^int dpni_enable(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_endpoint	drivers/net/ldpaa_eth/ldpaa_eth.h	/^struct dprc_endpoint dpni_endpoint;$/;"	v	typeref:struct:dprc_endpoint
dpni_error_action	include/fsl-mc/fsl_dpni.h	/^enum dpni_error_action {$/;"	g
dpni_error_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_error_cfg {$/;"	s
dpni_exit	drivers/net/fsl-mc/mc.c	/^static int dpni_exit(void)$/;"	f	typeref:typename:int	file:
dpni_extended_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_extended_cfg {$/;"	s
dpni_extract_extended_cfg	drivers/net/fsl-mc/dpni.c	/^int dpni_extract_extended_cfg(struct dpni_extended_cfg	*cfg,$/;"	f	typeref:typename:int
dpni_flc_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_flc_cfg {$/;"	s
dpni_flc_type	include/fsl-mc/fsl_dpni.h	/^enum dpni_flc_type {$/;"	g
dpni_get_attributes	drivers/net/fsl-mc/dpni.c	/^int dpni_get_attributes(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_counter	drivers/net/fsl-mc/dpni.c	/^int dpni_get_counter(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_link_state	drivers/net/fsl-mc/dpni.c	/^int dpni_get_link_state(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_primary_mac_addr	drivers/net/fsl-mc/dpni.c	/^int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_qdid	drivers/net/fsl-mc/dpni.c	/^int dpni_get_qdid(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_rx_buffer_layout	drivers/net/fsl-mc/dpni.c	/^int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_rx_flow	drivers/net/fsl-mc/dpni.c	/^int dpni_get_rx_flow(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_tx_buffer_layout	drivers/net/fsl-mc/dpni.c	/^int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_tx_conf	drivers/net/fsl-mc/dpni.c	/^int dpni_get_tx_conf(struct fsl_mc_io		*mc_io,$/;"	f	typeref:typename:int
dpni_get_tx_conf_buffer_layout	drivers/net/fsl-mc/dpni.c	/^int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_tx_data_offset	drivers/net/fsl-mc/dpni.c	/^int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_get_tx_flow	drivers/net/fsl-mc/dpni.c	/^int dpni_get_tx_flow(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_handle	include/fsl-mc/fsl_mc_private.h	/^	uint16_t dpni_handle;$/;"	m	struct:fsl_dpni_obj	typeref:typename:uint16_t
dpni_id	include/fsl-mc/fsl_mc_private.h	/^	int dpni_id;$/;"	m	struct:fsl_dpni_obj	typeref:typename:int
dpni_init	drivers/net/fsl-mc/mc.c	/^static int dpni_init(void)$/;"	f	typeref:typename:int	file:
dpni_link_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_link_cfg {$/;"	s
dpni_link_state	include/fsl-mc/fsl_dpni.h	/^struct dpni_link_state {$/;"	s
dpni_open	drivers/net/fsl-mc/dpni.c	/^int dpni_open(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_pools_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_pools_cfg {$/;"	s
dpni_prepare_extended_cfg	drivers/net/fsl-mc/dpni.c	/^int dpni_prepare_extended_cfg(const struct dpni_extended_cfg	*cfg,$/;"	f	typeref:typename:int
dpni_queue_attr	include/fsl-mc/fsl_dpni.h	/^struct dpni_queue_attr {$/;"	s
dpni_queue_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_queue_cfg {$/;"	s
dpni_remove_mac_addr	drivers/net/fsl-mc/dpni.c	/^int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_reset	drivers/net/fsl-mc/dpni.c	/^int dpni_reset(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_counter	drivers/net/fsl-mc/dpni.c	/^int dpni_set_counter(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_errors_behavior	drivers/net/fsl-mc/dpni.c	/^int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_link_cfg	drivers/net/fsl-mc/dpni.c	/^int dpni_set_link_cfg(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_pools	drivers/net/fsl-mc/dpni.c	/^int dpni_set_pools(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_primary_mac_addr	drivers/net/fsl-mc/dpni.c	/^int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_rx_buffer_layout	drivers/net/fsl-mc/dpni.c	/^int dpni_set_rx_buffer_layout(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_rx_flow	drivers/net/fsl-mc/dpni.c	/^int dpni_set_rx_flow(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_tx_buffer_layout	drivers/net/fsl-mc/dpni.c	/^int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_tx_conf	drivers/net/fsl-mc/dpni.c	/^int dpni_set_tx_conf(struct fsl_mc_io	*mc_io,$/;"	f	typeref:typename:int
dpni_set_tx_conf_buffer_layout	drivers/net/fsl-mc/dpni.c	/^int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_set_tx_flow	drivers/net/fsl-mc/dpni.c	/^int dpni_set_tx_flow(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dpni_stash_size	include/fsl-mc/fsl_dpni.h	/^enum dpni_stash_size {$/;"	g
dpni_tx_conf_attr	include/fsl-mc/fsl_dpni.h	/^struct dpni_tx_conf_attr {$/;"	s
dpni_tx_conf_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_tx_conf_cfg {$/;"	s
dpni_tx_flow_attr	include/fsl-mc/fsl_dpni.h	/^struct dpni_tx_flow_attr {$/;"	s
dpni_tx_flow_cfg	include/fsl-mc/fsl_dpni.h	/^struct dpni_tx_flow_cfg {$/;"	s
dprBase	include/video_fb.h	/^    unsigned int dprBase;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
dpram_alloc	arch/powerpc/cpu/mpc8xx/commproc.c	/^uint dpram_alloc (uint size)$/;"	f	typeref:typename:uint
dpram_alloc_align	arch/powerpc/cpu/mpc8xx/commproc.c	/^uint dpram_alloc_align (uint size, uint align)$/;"	f	typeref:typename:uint
dpram_base	arch/powerpc/cpu/mpc8xx/commproc.c	/^uint dpram_base (void)$/;"	f	typeref:typename:uint
dpram_base_align	arch/powerpc/cpu/mpc8xx/commproc.c	/^uint dpram_base_align (uint align)$/;"	f	typeref:typename:uint
dpram_init	arch/powerpc/cpu/mpc8xx/commproc.c	/^int dpram_init (void)$/;"	f	typeref:typename:int
dprc	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct dprc {$/;"	s
dprc5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} dprc5xx_t;$/;"	t	typeref:struct:dprc
dprc_attributes	include/fsl-mc/fsl_dprc.h	/^struct dprc_attributes {$/;"	s
dprc_cfg	include/fsl-mc/fsl_dprc.h	/^struct dprc_cfg {$/;"	s
dprc_close	drivers/net/fsl-mc/dprc.c	/^int dprc_close(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_connect	drivers/net/fsl-mc/dprc.c	/^int dprc_connect(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_connection_cfg	include/fsl-mc/fsl_dprc.h	/^struct dprc_connection_cfg {$/;"	s
dprc_create_container	drivers/net/fsl-mc/dprc.c	/^int dprc_create_container(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_destroy_container	drivers/net/fsl-mc/dprc.c	/^int dprc_destroy_container(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_disconnect	drivers/net/fsl-mc/dprc.c	/^int dprc_disconnect(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_dptmcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort dprc_dptmcr;$/;"	m	struct:dprc	typeref:typename:ushort
dprc_endpoint	include/fsl-mc/fsl_dprc.h	/^struct dprc_endpoint {$/;"	s
dprc_exit	drivers/net/fsl-mc/mc.c	/^static int dprc_exit(void)$/;"	f	typeref:typename:int	file:
dprc_get_attributes	drivers/net/fsl-mc/dprc.c	/^int dprc_get_attributes(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_connection	drivers/net/fsl-mc/dprc.c	/^int dprc_get_connection(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_container_id	drivers/net/fsl-mc/dprc.c	/^int dprc_get_container_id(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_obj	drivers/net/fsl-mc/dprc.c	/^int dprc_get_obj(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_obj_count	drivers/net/fsl-mc/dprc.c	/^int dprc_get_obj_count(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_obj_region	drivers/net/fsl-mc/dprc.c	/^int dprc_get_obj_region(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_res_count	drivers/net/fsl-mc/dprc.c	/^int dprc_get_res_count(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_get_res_ids	drivers/net/fsl-mc/dprc.c	/^int dprc_get_res_ids(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_init	drivers/net/fsl-mc/mc.c	/^static int dprc_init(void)$/;"	f	typeref:typename:int	file:
dprc_iter_status	include/fsl-mc/fsl_dprc.h	/^enum dprc_iter_status {$/;"	g
dprc_miscnt	arch/powerpc/include/asm/5xx_immap.h	/^	ushort dprc_miscnt;$/;"	m	struct:dprc	typeref:typename:ushort
dprc_misrh	arch/powerpc/include/asm/5xx_immap.h	/^	ushort dprc_misrh;$/;"	m	struct:dprc	typeref:typename:ushort
dprc_misrl	arch/powerpc/include/asm/5xx_immap.h	/^	ushort dprc_misrl;$/;"	m	struct:dprc	typeref:typename:ushort
dprc_obj_desc	include/fsl-mc/fsl_dprc.h	/^struct dprc_obj_desc {$/;"	s
dprc_open	drivers/net/fsl-mc/dprc.c	/^int dprc_open(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_rambar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort dprc_rambar;$/;"	m	struct:dprc	typeref:typename:ushort
dprc_ramtst	arch/powerpc/include/asm/5xx_immap.h	/^	ushort dprc_ramtst;$/;"	m	struct:dprc	typeref:typename:ushort
dprc_region_desc	include/fsl-mc/fsl_dprc.h	/^struct dprc_region_desc {$/;"	s
dprc_region_type	include/fsl-mc/fsl_dprc.h	/^enum dprc_region_type {$/;"	g
dprc_res_ids_range_desc	include/fsl-mc/fsl_dprc.h	/^struct dprc_res_ids_range_desc {$/;"	s
dprc_reset_container	drivers/net/fsl-mc/dprc.c	/^int dprc_reset_container(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
dprc_version_check	drivers/net/fsl-mc/mc.c	/^static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)$/;"	f	typeref:typename:int	file:
dprint	scripts/kconfig/streamline_config.pl	/^sub dprint {$/;"	s
dprintf	arch/blackfin/cpu/jtag-console.c	/^# define dprintf(/;"	d	file:
dprintf_decode	arch/blackfin/cpu/jtag-console.c	/^static inline void dprintf_decode(const char *s, uint32_t len)$/;"	f	typeref:typename:void	file:
dpslpcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 dpslpcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
dpslpcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 dpslpcr;	\/* 0x000 Deep Sleep Control register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
dptdivcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dptdivcr0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dptdivcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dptdivcr1;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dptdivcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dptdivcr2;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dpte_ptr	include/linux/edd.h	/^	__u32 dpte_ptr;		\/* 0xFFFFFFFF for our purposes *\/$/;"	m	struct:edd_device_params	typeref:typename:__u32
dptram	arch/powerpc/include/asm/5xx_immap.h	/^	char               dptram[6144];	\/* Dptram *\/$/;"	m	struct:immap	typeref:typename:char[6144]
dptx_dphy	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	dptx_dphy;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
dptx_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dptx_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dptx_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dptx_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
dptxfsiz_dieptxf	drivers/usb/host/dwc2.h	/^	u32			dptxfsiz_dieptxf[15];$/;"	m	struct:dwc2_core_regs	typeref:typename:u32[15]
dpwrdn_cyc	arch/arm/mach-exynos/clock_init.h	/^	unsigned dpwrdn_cyc;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dq_bit_map_2_phy_pin	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^u32 dq_bit_map_2_phy_pin[] = {$/;"	v	typeref:typename:u32[]
dq_ena	drivers/ddr/altera/sequencer.h	/^	u32	dq_ena;$/;"	m	struct:socfpga_sdr_scc_mgr	typeref:typename:u32
dq_imped	include/linux/mtd/nand.h	/^	u8 dq_imped;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
dq_imped_feat_addr	include/linux/mtd/nand.h	/^	u8 dq_imped_feat_addr;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
dq_imped_num_settings	include/linux/mtd/nand.h	/^	u8 dq_imped_num_settings;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
dq_map	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t dq_map[2][6][2];$/;"	m	struct:pei_data	typeref:typename:uint8_t[2][6][2]
dq_map_0	include/fsl_ddr_sdram.h	/^	unsigned int dq_map_0;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
dq_map_0	include/fsl_immap.h	/^	u32	dq_map_0;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
dq_map_1	include/fsl_ddr_sdram.h	/^	unsigned int dq_map_1;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
dq_map_1	include/fsl_immap.h	/^	u32	dq_map_1;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
dq_map_2	include/fsl_ddr_sdram.h	/^	unsigned int dq_map_2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
dq_map_2	include/fsl_immap.h	/^	u32	dq_map_2;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
dq_map_3	include/fsl_ddr_sdram.h	/^	unsigned int dq_map_3;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
dq_map_3	include/fsl_immap.h	/^	u32	dq_map_3;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
dq_map_table	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 *dq_map_table = NULL;$/;"	v	typeref:typename:u32 *
dq_mapping	include/fsl_ddr_dimm_params.h	/^	unsigned int dq_mapping[18];$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int[18]
dq_mapping_ors	include/fsl_ddr_dimm_params.h	/^	unsigned int dq_mapping_ors;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
dq_op	fs/ubifs/ubifs.h	/^	const struct dquot_operations	*dq_op;$/;"	m	struct:super_block	typeref:typename:const struct dquot_operations *
dq_pins_interleaved	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int dq_pins_interleaved;$/;"	m	struct:pei_data	typeref:typename:int
dqcalexp	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dqcalexp;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
dqcalofs1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dqcalofs1;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
dqcalofs2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dqcalofs2;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
dqdqs_out_phase_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqdqs_out_phase_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqdsr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dqdsr;		\/* 0xf4 DQS drift register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dqdsr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dqdsr;		\/* 0xf4 DQS drift register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dqrr	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	} dqrr;$/;"	m	struct:qbman_swp	typeref:struct:qbman_swp::__anonadc6216b0308
dqs_config	include/fsl_ddr_sdram.h	/^	unsigned int dqs_config;	\/* Use DQS? maybe only with DDR2? *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
dqs_config_offset_count	arch/powerpc/include/asm/immap_512x.h	/^	u32 dqs_config_offset_count;	\/* DQS Config Offset Count *\/$/;"	m	struct:ddr512x	typeref:typename:u32
dqs_config_offset_time	arch/powerpc/include/asm/immap_512x.h	/^	u32 dqs_config_offset_time;	\/* DQS Config Offset Time *\/$/;"	m	struct:ddr512x	typeref:typename:u32
dqs_delay	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^	u32 dqs_delay;		\/* DQS delay (m_sec) *\/$/;"	m	struct:trip_delay_element	typeref:typename:u32
dqs_en_delay_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqs_en_delay_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqs_en_delay_offset	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqs_en_delay_offset;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqs_en_phase_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqs_en_phase_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqs_ena	drivers/ddr/altera/sequencer.h	/^	u32	dqs_ena;$/;"	m	struct:socfpga_sdr_scc_mgr	typeref:typename:u32
dqs_gating_delay	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqs_gating_delay;$/;"	m	struct:dram_para	typeref:typename:u32
dqs_gating_delay	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqs_gating_delay;$/;"	m	struct:dram_para	typeref:typename:u32
dqs_in_delay_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqs_in_delay_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqs_in_reserve	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqs_in_reserve;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqs_io_ena	drivers/ddr/altera/sequencer.h	/^	u32	dqs_io_ena;$/;"	m	struct:socfpga_sdr_scc_mgr	typeref:typename:u32
dqs_map	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t dqs_map[2][8];$/;"	m	struct:pei_data	typeref:typename:uint8_t[2][8]
dqs_out_reserve	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	dqs_out_reserve;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
dqsbtr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqsbtr;		\/* 0x22c dqsb timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqsbtr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqsbtr;		\/* 0x22c dqsb timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqsbtr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dqsbtr;		\/* DQS_b Timing *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
dqsdr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dqsdr;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsdr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dqsdr;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsdr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dqsdr;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsdr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dqsdr;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsdr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dqsdr;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsdr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dqsdr;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsgd_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void dqsgd_dump(void)$/;"	f	typeref:typename:void	file:
dqsgd_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void dqsgd_dump(const struct phy_param *phy_param)$/;"	f	typeref:typename:void	file:
dqsgmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dqsgmr;		\/* 0xbc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsgmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dqsgmr;		\/* 0xbc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsgmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dqsgmr;		\/* 0xbc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsgmr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dqsgmr;		\/* 0xbc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsgmr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dqsgmr;		\/* 0xbc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqsgmr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dqsgmr;		\/* 0xbc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dqstr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqstr;		\/* 0x228 dqs timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqstr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqstr;		\/* 0x228 dqs timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqstr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dqstr;		\/* DQS Timing *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
dqtr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dqtr[9];	\/* DQ Timing *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[9]
dqtr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqtr0;		\/* 0x218 dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqtr0;		\/* 0x218 dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqtr1;		\/* 0x21c dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqtr1;		\/* 0x21c dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqtr2;		\/* 0x220 dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr2	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqtr2;		\/* 0x220 dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dqtr3;		\/* 0x224 dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dqtr3	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dqtr3;		\/* 0x224 dq timing register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 dr;              \/* impedance control data register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
dr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 dr;              \/* impedance control data register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
dr	arch/m68k/include/asm/coldfire/eport.h	/^	u8 dr;		\/* 0x08 *\/$/;"	m	struct:eport	typeref:typename:u8
dr	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 dr;			\/* 0x14 Data *\/$/;"	m	struct:qspi_ctrl	typeref:typename:u16
dr	arch/m68k/include/asm/fsl_i2c.h	/^	u8 dr;		\/* I2C data register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
dr	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 dr;		\/* I2C data register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
dr	drivers/i2c/fti2c010.h	/^	uint32_t dr;  \/* 0x0c: data register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
dr	drivers/serial/serial_pl01x_internal.h	/^	u32	dr;		\/* 0x00 Data register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
dr	drivers/serial/serial_stm32.c	/^	u32 dr;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
dr	drivers/spi/zynq_qspi.c	/^	u32 dr;		\/* 0x18 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
dr	drivers/spi/zynq_spi.c	/^	u32 dr;		\/* 0x18 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
dr	include/mpc5xxx.h	/^	volatile u8 dr;			\/* SPI + 0x0F09 *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
dr_match_t	include/dm/device.h	/^typedef int (*dr_match_t)(struct udevice *dev, void *res, void *match_data);$/;"	t	typeref:typename:int (*)(struct udevice * dev,void * res,void * match_data)
dr_mode	drivers/usb/dwc3/core.h	/^	enum usb_dr_mode	dr_mode;$/;"	m	struct:dwc3	typeref:enum:usb_dr_mode
dr_mode	drivers/usb/host/ehci-tegra.c	/^	enum dr_mode dr_mode;	\/* dual role mode *\/$/;"	m	struct:fdt_usb	typeref:enum:dr_mode	file:
dr_mode	drivers/usb/host/ehci-tegra.c	/^enum dr_mode {$/;"	g	file:
dr_mode	drivers/usb/host/ehci-vf.c	/^	enum dr_mode dr_mode;$/;"	m	struct:ehci_vf_priv_data	typeref:enum:dr_mode	file:
dr_mode	drivers/usb/host/ehci-vf.c	/^enum dr_mode {$/;"	g	file:
dr_mode	include/dwc3-uboot.h	/^	enum usb_dr_mode dr_mode;$/;"	m	struct:dwc3_device	typeref:enum:usb_dr_mode
dr_release_t	include/dm/device.h	/^typedef void (*dr_release_t)(struct udevice *dev, void *res);$/;"	t	typeref:typename:void (*)(struct udevice * dev,void * res)
dra722_volts	board/ti/dra7xx/evm.c	/^struct vcores_data dra722_volts = {$/;"	v	typeref:struct:vcores_data
dra72_iodelay_cfg_array_revb	board/ti/dra7xx/mux_data.h	/^const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = {$/;"	v	typeref:typename:const struct iodelay_cfg_entry[]
dra72_iodelay_cfg_array_revc	board/ti/dra7xx/mux_data.h	/^const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revc[] = {$/;"	v	typeref:typename:const struct iodelay_cfg_entry[]
dra72x_core_padconf_array_common	board/ti/dra7xx/mux_data.h	/^const struct pad_conf_entry dra72x_core_padconf_array_common[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
dra72x_dplls	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct dplls dra72x_dplls = {$/;"	v	typeref:struct:dplls
dra72x_rgmii_padconf_array_revb	board/ti/dra7xx/mux_data.h	/^const struct pad_conf_entry dra72x_rgmii_padconf_array_revb[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
dra72x_rgmii_padconf_array_revc	board/ti/dra7xx/mux_data.h	/^const struct pad_conf_entry dra72x_rgmii_padconf_array_revc[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
dra742_es1_1_iodelay_cfg_array	board/ti/dra7xx/mux_data.h	/^const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = {$/;"	v	typeref:typename:const struct iodelay_cfg_entry[]
dra742_es2_0_iodelay_cfg_array	board/ti/dra7xx/mux_data.h	/^const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = {$/;"	v	typeref:typename:const struct iodelay_cfg_entry[]
dra74x_core_padconf_array	board/ti/dra7xx/mux_data.h	/^const struct pad_conf_entry dra74x_core_padconf_array[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
dra752_volts	board/ti/dra7xx/evm.c	/^struct vcores_data dra752_volts = {$/;"	v	typeref:struct:vcores_data
dra7_ctrl_core	arch/arm/dts/dra7.dtsi	/^		dra7_ctrl_core: ctrl_core@4a002000 {$/;"	l
dra7_ctrl_general	arch/arm/dts/dra7.dtsi	/^		dra7_ctrl_general: tisyscon@4a002e00 {$/;"	l
dra7_ddr3_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void dra7_ddr3_init(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
dra7_ddr3_leveling	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void dra7_ddr3_leveling(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
dra7_eeprom	board/ti/common/board_detect.h	/^struct dra7_eeprom {$/;"	s
dra7_pmx_core	arch/arm/dts/dra7.dtsi	/^				dra7_pmx_core: pinmux@1400 {$/;"	l	label:l4_cfg.scm
dra7xx_ctrl	arch/arm/cpu/armv7/omap5/prcm-regs.c	/^struct omap_sys_ctrl_regs const dra7xx_ctrl = {$/;"	v	typeref:struct:omap_sys_ctrl_regs const
dra7xx_dplls	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct dplls dra7xx_dplls = {$/;"	v	typeref:struct:dplls
dra7xx_prcm	arch/arm/cpu/armv7/omap5/prcm-regs.c	/^struct prcm_regs const dra7xx_prcm = {$/;"	v	typeref:struct:prcm_regs const
dra_bug_00339_regs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct read_write_regs dra_bug_00339_regs[] = {$/;"	v	typeref:typename:const struct read_write_regs[]
dra_ddr3_ext_phy_ctrl_const_base_666MHz	arch/arm/cpu/armv7/omap5/sdram.c	/^dra_ddr3_ext_phy_ctrl_const_base_666MHz[] = {$/;"	v	typeref:typename:const u32[]
dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2	arch/arm/cpu/armv7/omap5/sdram.c	/^const u32 dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2[] = {$/;"	v	typeref:typename:const u32[]
dra_ddr3_ext_phy_ctrl_const_base_es1_emif1	arch/arm/cpu/armv7/omap5/sdram.c	/^dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = {$/;"	v	typeref:typename:const u32[]
dra_ddr3_ext_phy_ctrl_const_base_es1_emif2	arch/arm/cpu/armv7/omap5/sdram.c	/^dra_ddr3_ext_phy_ctrl_const_base_es1_emif2[] = {$/;"	v	typeref:typename:const u32[]
draco_baseboard_id	board/siemens/draco/board.h	/^struct draco_baseboard_id {$/;"	s
draco_read_nand_geometry	board/siemens/draco/board.c	/^static int draco_read_nand_geometry(void)$/;"	f	typeref:typename:int	file:
drain_console	test/py/u_boot_console_base.py	/^    def drain_console(self):$/;"	m	class:ConsoleBase
drain_fifo	drivers/mtd/nand/pxa3xx_nand.c	/^static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)$/;"	f	typeref:typename:void	file:
dram_128mb	board/work-microwave/work_92105/work_92105_spl.c	/^const struct emc_dram_settings dram_128mb = {$/;"	v	typeref:typename:const struct emc_dram_settings
dram_64mb	board/timll/devkit3250/devkit3250_spl.c	/^struct emc_dram_settings dram_64mb = {$/;"	v	typeref:struct:emc_dram_settings
dram_64mb	board/work-microwave/work_92105/work_92105_spl.c	/^struct emc_dram_settings dram_64mb = {$/;"	v	typeref:struct:emc_dram_settings
dram_addrw	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_addrw;	\/* 0x2c *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_addrw	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_addrw;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_all_config	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void dram_all_config(const struct dram_info *dram,$/;"	f	typeref:typename:void	file:
dram_bank_mmu_setup	arch/arm/cpu/armv7/omap-common/omap-cache.c	/^void dram_bank_mmu_setup(int bank)$/;"	f	typeref:typename:void
dram_bank_mmu_setup	arch/arm/lib/cache-cp15.c	/^__weak void dram_bank_mmu_setup(int bank)$/;"	f	typeref:typename:__weak void
dram_board	arch/arm/mach-uniphier/dram/umc-ld20.c	/^enum dram_board {		\/* board type *\/$/;"	g	file:
dram_cas	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cas;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_cas	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cas;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_cas	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cas;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_cas	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cas;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_cas	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cas;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_cfg_rbc	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^void dram_cfg_rbc(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void
dram_cfg_rbc	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void dram_cfg_rbc(const struct chan_info *chan, u32 chnum,$/;"	f	typeref:typename:void	file:
dram_ch	arch/arm/mach-uniphier/init.h	/^	struct uniphier_dram_ch dram_ch[UNIPHIER_MAX_NR_DRAM_CH];$/;"	m	struct:uniphier_board_data	typeref:struct:uniphier_dram_ch[]
dram_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 dram_clk_cfg;	\/* 0xf4 DRAM configuration clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 dram_clk_cfg;	\/* 0xf4 DRAM configuration clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 dram_clk_cfg;       \/* 0x484 DRAM (controller) clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 dram_clk_cfg;	\/* 0xf4 DRAM configuration clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 dram_clk_cfg;	\/* 0xf4 DRAM configuration clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 dram_clk_cfg;       \/* 0x484 DRAM (controller) clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_gate	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 dram_clk_gate;	\/* 0x100 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_gate	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 dram_clk_gate;	\/* 0x100 DRAM module gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_gate	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 dram_clk_gate;	\/* 0x100 DRAM module gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_gate	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 dram_clk_gate;	\/* 0x100 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_gate	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 dram_clk_gate;	\/* 0x100 DRAM module gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_clk_gate	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 dram_clk_gate;	\/* 0x100 DRAM module gating *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_cs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cs0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_cs0_b	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cs0_b;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_cs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cs1;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_cs1_b	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_cs1_b;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_dev_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_dev_width;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_dev_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_dev_width;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_dqm0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm0;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm0;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm0;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_dqm0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm0;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_dqm0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_dqm1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm1;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm1;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm1;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_dqm1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm1;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_dqm1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm1;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_dqm2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm2;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm2;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm2;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_dqm2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm2;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_dqm3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm3;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm3;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm3;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_dqm3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm3;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_dqm4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm4;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm4;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm5;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm5;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm6	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm6;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm6	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm6;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_dqm7	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm7;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_dqm7	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_dqm7;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_drv	include/ddr_spd.h	/^			uint8_t dram_drv;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_ecc_scrubbing	arch/arm/mach-mvebu/dram.c	/^static void dram_ecc_scrubbing(void)$/;"	f	typeref:typename:void	file:
dram_fill_bank_addr	board/cirrus/edb93xx/edb93xx.c	/^static void dram_fill_bank_addr(unsigned dram_addr_mask, unsigned dram_bank_cnt,$/;"	f	typeref:typename:void	file:
dram_freq	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^enum dram_freq {$/;"	g	file:
dram_freq	arch/arm/mach-uniphier/dram/umc-ld11.c	/^enum dram_freq {$/;"	g	file:
dram_freq	arch/arm/mach-uniphier/dram/umc-ld20.c	/^enum dram_freq {$/;"	g	file:
dram_freq	arch/arm/mach-uniphier/dram/umc-ld4.c	/^enum dram_freq {$/;"	g	file:
dram_freq	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^enum dram_freq {$/;"	g	file:
dram_freq	arch/arm/mach-uniphier/dram/umc-sld8.c	/^enum dram_freq {$/;"	g	file:
dram_freq	arch/arm/mach-uniphier/init.h	/^	unsigned int dram_freq;$/;"	m	struct:uniphier_board_data	typeref:typename:unsigned int
dram_freq_down_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dram_freq_down_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dram_freq_down_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dram_freq_down_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dram_freq_down_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dram_freq_down_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dram_freq_down_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	dram_freq_down_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
dram_gates	arch/arm/dts/sun4i-a10.dtsi	/^		dram_gates: clk@01c20100 {$/;"	l
dram_gates	arch/arm/dts/sun5i-a13.dtsi	/^		dram_gates: clk@01c20100 {$/;"	l
dram_gates	arch/arm/dts/sun7i-a20.dtsi	/^		dram_gates: clk@01c20100 {$/;"	l
dram_if_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_if_width;	\/* 0x30 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_if_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_if_width;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_info	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^struct dram_info {$/;"	s	file:
dram_info	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^typedef struct dram_info {$/;"	s
dram_init	arch/arm/cpu/arm926ejs/armada100/dram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/cpu/armv7/am33xx/emif4.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/cpu/armv7/omap3/emif4.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/cpu/armv7/omap3/sdrc.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-davinci/misc.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-meson/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-mvebu/arm64-common.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-mvebu/dram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-orion5x/dram.c	/^int dram_init (void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-rockchip/rk3036-board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-rockchip/rk3288-board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-socfpga/misc.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-tegra/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-tegra/tegra186/nvtboot_mem.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/arm/mach-uniphier/dram_init.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/avr32/lib/dram_init.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/cpu/broadwell/sdram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/cpu/coreboot/sdram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/cpu/efi/sdram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/cpu/ivybridge/sdram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/cpu/qemu/dram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/cpu/quark/dram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/lib/efi/efi.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	arch/x86/lib/fsp/fsp_dram.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/AndesTech/adp-ag101p/adp-ag101p.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/CarMediaLab/flea3/flea3.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/advantech/dms-ba16/dms-ba16.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/aristainetos/aristainetos.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/armadeus/apf27/apf27.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/armltd/integrator/integrator.c	/^int dram_init (void)$/;"	f	typeref:typename:int
dram_init	board/armltd/vexpress/vexpress_common.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/armltd/vexpress64/vexpress64.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91rm9200ek/at91rm9200ek.c	/^int dram_init (void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9260ek/at91sam9260ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9261ek/at91sam9261ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9263ek/at91sam9263ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9rlek/at91sam9rlek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/sama5d3xek/sama5d3xek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/atmel/sama5d4ek/sama5d4ek.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/bachmann/ot1200/ot1200.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/barco/platinum/platinum.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/barco/titanium/titanium.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/bluegiga/apx4devkit/apx4devkit.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/bluewater/gurnard/gurnard.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/bluewater/snapper9260/snapper9260.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/boundary/nitrogen6x/nitrogen6x.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/broadcom/bcm_ep/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/calao/usb_a9263/usb_a9263.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/cavium/thunderx/thunderx.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ccv/xpress/xpress.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/cirrus/edb93xx/edb93xx.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/compulab/cm_fx6/cm_fx6.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/creative/xfi3/xfi3.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/denx/m28evk/m28evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/denx/m53evk/m53evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/denx/ma5d4evk/ma5d4evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/egnite/ethernut5/ethernut5.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/el/el6x/el6x.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/embest/mx6boards/mx6boards.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/engicam/icorem6/icorem6.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/esd/meesc/meesc.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/espt/espt.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1012afrdm/ls1012afrdm.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1012aqds/ls1012aqds.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1012ardb/ls1012ardb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1021aqds/ls1021aqds.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1021atwr/ls1021atwr.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1043aqds/ls1043aqds.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1043ardb/ls1043ardb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1046aqds/ls1046aqds.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls1046ardb/ls1046ardb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls2080a/ls2080a.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls2080aqds/ls2080aqds.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/ls2080ardb/ls2080ardb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx23evk/mx23evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx25pdk/mx25pdk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx28evk/mx28evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx31ads/mx31ads.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx31pdk/mx31pdk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx35pdk/mx35pdk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx51evk/mx51evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx53ard/mx53ard.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx53evk/mx53evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx53loco/mx53loco.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx53smd/mx53smd.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6qarm2/mx6qarm2.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6sabresd/mx6sabresd.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6slevk/mx6slevk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx6ullevk/mx6ullevk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/s32v234evb/s32v234evb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/freescale/vf610twr/vf610twr.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/gateworks/gw_ventana/gw_ventana.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ge/bx50v3/bx50v3.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/h2200/h2200.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/highbank/highbank.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/hisilicon/hikey/hikey.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/imx31_phycore/imx31_phycore.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/inversepath/usbarmory/usbarmory.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/kmc/kzm9g/kzm9g.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/kosagi/novena/novena.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/l+g/vinco/vinco.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/mini-box/picosam9g45/picosam9g45.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/mpl/vcma9/vcma9.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/mpr2/mpr2.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ms7720se/ms7720se.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ms7722se/ms7722se.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ms7750se/ms7750se.c	/^int dram_init (void)$/;"	f	typeref:typename:int
dram_init	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/phytec/pcm052/pcm052.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/phytec/pcm058/pcm058.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ppcag/bg0900/bg0900.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/qualcomm/dragonboard410c/dragonboard410c.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/raspberrypi/rpi/rpi.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/MigoR/migo_r.c	/^int dram_init (void)$/;"	f	typeref:typename:int
dram_init	board/renesas/alt/alt.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/ap325rxa/ap325rxa.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/blanche/blanche.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/ecovec/ecovec.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/gose/gose.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/koelsch/koelsch.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/lager/lager.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/porter/porter.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/r0p7734/r0p7734.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/r2dplus/r2dplus.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/r7780mp/r7780mp.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/rsk7203/rsk7203.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/rsk7264/rsk7264.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/rsk7269/rsk7269.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/salvator-x/salvator-x.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/sh7752evb/sh7752evb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/sh7753evb/sh7753evb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/sh7757lcr/sh7757lcr.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/sh7763rdp/sh7763rdp.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/sh7785lcr/sh7785lcr.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/silk/silk.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/renesas/stout/stout.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/rockchip/evb_rk3399/evb-rk3399.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ronetix/pm9261/pm9261.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ronetix/pm9263/pm9263.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ronetix/pm9g45/pm9g45.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/samsung/arndale/arndale.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/samsung/common/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/samsung/goni/goni.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/samsung/smdk2410/smdk2410.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/samsung/smdkc100/smdkc100.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/samsung/smdkv310/smdkv310.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/sandbox/sandbox.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/sandisk/sansa_fuze_plus/sfp.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/schulercontrol/sc_sps_1/sc_sps_1.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/seco/mx6quq7/mx6quq7.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/shmin/shmin.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/siemens/corvus/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/siemens/smartweb/smartweb.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/siemens/taurus/taurus.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/spear/common/spr_misc.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/st/stm32f429-discovery/stm32f429-discovery.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/st/stm32f746-disco/stm32f746-disco.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/st/stv0991/stv0991.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/sunxi/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/syteco/zmx25/zmx25.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/tbs/tbs2910/tbs2910.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/technologic/ts4800/ts4800.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/ti/ks2_evm/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/timll/devkit3250/devkit3250.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/toradex/colibri_imx7/colibri_imx7.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/toradex/colibri_pxa270/colibri_pxa270.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/toradex/colibri_vf/colibri_vf.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/tqc/tqma6/tqma6.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/udoo/udoo.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/wandboard/wandboard.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/warp/warp.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/warp7/warp7.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/woodburn/woodburn.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/work-microwave/work_92105/work_92105.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/xilinx/microblaze-generic/microblaze-generic.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/xilinx/zynq/board.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/xilinx/zynqmp/zynqmp.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init	board/zipitz2/zipitz2.c	/^int dram_init(void)$/;"	f	typeref:typename:int
dram_init_banksize	arch/arm/cpu/arm926ejs/armada100/dram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/cpu/armv7/am33xx/emif4.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/cpu/armv7/omap3/emif4.c	/^void dram_init_banksize (void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/cpu/armv7/omap3/sdrc.c	/^void dram_init_banksize (void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-davinci/misc.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-meson/board.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-mvebu/arm64-common.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-mvebu/dram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-orion5x/dram.c	/^void dram_init_banksize (void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-tegra/board2.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-tegra/tegra186/nvtboot_mem.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/arm/mach-uniphier/dram_init.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/cpu/broadwell/sdram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/cpu/coreboot/sdram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/cpu/efi/sdram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/cpu/ivybridge/sdram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/cpu/qemu/dram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/cpu/quark/dram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/lib/efi/efi.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	arch/x86/lib/fsp/fsp_dram.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/AndesTech/adp-ag101p/adp-ag101p.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/armadeus/apf27/apf27.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/armltd/vexpress/vexpress_common.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/armltd/vexpress64/vexpress64.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/broadcom/bcm_ep/board.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/cadence/xtfpga/xtfpga.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/cirrus/edb93xx/edb93xx.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/compulab/cm_fx6/cm_fx6.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/denx/m53evk/m53evk.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/esd/meesc/meesc.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls1021aqds/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls1043aqds/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls1043ardb/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls1046aqds/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls1046ardb/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls2080a/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls2080aqds/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/ls2080ardb/ddr.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/mx35pdk/mx35pdk.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/mx53ard/mx53ard.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/mx53loco/mx53loco.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/freescale/mx53smd/mx53smd.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/hisilicon/hikey/hikey.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/mini-box/picosam9g45/picosam9g45.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/qualcomm/dragonboard410c/dragonboard410c.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/rockchip/evb_rk3399/evb-rk3399.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/ronetix/pm9261/pm9261.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/ronetix/pm9263/pm9263.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/ronetix/pm9g45/pm9g45.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/samsung/arndale/arndale.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/samsung/common/board.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/samsung/goni/goni.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/samsung/smdkc100/smdkc100.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/samsung/smdkv310/smdkv310.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/spear/common/spr_misc.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/st/stv0991/stv0991.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/ti/dra7xx/evm.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/xilinx/microblaze-generic/microblaze-generic.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/xilinx/zynq/board.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/xilinx/zynqmp/zynqmp.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	board/zipitz2/zipitz2.c	/^void dram_init_banksize(void)$/;"	f	typeref:typename:void
dram_init_banksize	common/board_f.c	/^__weak void dram_init_banksize(void)$/;"	f	typeref:typename:__weak void
dram_init_banksize_int	board/cirrus/edb93xx/edb93xx.c	/^static unsigned dram_init_banksize_int(int print)$/;"	f	typeref:typename:unsigned	file:
dram_init_command	arch/x86/cpu/quark/mrc_util.c	/^void dram_init_command(uint32_t data)$/;"	f	typeref:typename:void
dram_init_sequence	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static const struct ddrphy_init_sequence dram_init_sequence[] = {$/;"	v	typeref:typename:const struct ddrphy_init_sequence[]	file:
dram_intr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_intr;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_intr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_intr;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_modes	drivers/ddr/marvell/a38x/ddr3_init.c	/^struct dram_modes {$/;"	s	file:
dram_modes	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^typedef struct dram_modes {$/;"	s
dram_mv_init	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^typedef struct dram_mv_init {$/;"	s
dram_nr_ch	arch/arm/mach-uniphier/init.h	/^	unsigned int dram_nr_ch;$/;"	m	struct:uniphier_board_data	typeref:typename:unsigned int
dram_odt	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_odt;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_odt	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_odt;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_odt0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_odt0;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_odt0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_odt0;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_odt0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_odt0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_odt1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_odt1;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_odt1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_odt1;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_odt1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_odt1;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_odt_1866	include/ddr_spd.h	/^			uint8_t dram_odt_1866;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_odt_2400	include/ddr_spd.h	/^			uint8_t dram_odt_2400;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_odt_3200	include/ddr_spd.h	/^			uint8_t dram_odt_3200;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_odt_park_1866	include/ddr_spd.h	/^			uint8_t dram_odt_park_1866;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_odt_park_2400	include/ddr_spd.h	/^			uint8_t dram_odt_park_2400;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_odt_park_3200	include/ddr_spd.h	/^			uint8_t dram_odt_park_3200;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
dram_para	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^struct dram_para {$/;"	s
dram_para	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^struct dram_para {$/;"	s
dram_para	arch/arm/include/asm/arch/dram_sun4i.h	/^struct dram_para {$/;"	s
dram_para	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^struct dram_para {$/;"	s
dram_para	arch/arm/mach-sunxi/dram_sun8i_a23.c	/^static const struct dram_para dram_para = {$/;"	v	typeref:typename:const struct dram_para	file:
dram_para	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^struct dram_para {$/;"	s	file:
dram_para	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^struct dram_para {$/;"	s	file:
dram_para	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^struct dram_para {$/;"	s	file:
dram_para	board/sunxi/dram_sun4i_auto.c	/^static struct dram_para dram_para = {$/;"	v	typeref:struct:dram_para	file:
dram_para	board/sunxi/dram_sun5i_auto.c	/^static struct dram_para dram_para = {$/;"	v	typeref:struct:dram_para	file:
dram_params	arch/x86/include/asm/arch-quark/mrc.h	/^struct dram_params {$/;"	s
dram_pll_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 dram_pll_cfg;	\/* 0xf8 PLL_DDR cfg register, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_pll_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 dram_pll_cfg;	\/* 0xf8 PLL_DDR cfg register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_pll_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 dram_pll_cfg;	\/* 0xf8 PLL_DDR cfg register, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_pll_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 dram_pll_cfg;	\/* 0xf8 PLL_DDR cfg register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
dram_pwr	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 dram_pwr;		\/* 0x180 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
dram_pwr	arch/arm/include/asm/arch/prcm.h	/^	u32 dram_pwr;		\/* 0x180 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
dram_query	board/armltd/integrator/lowlevel_init.S	/^dram_query:$/;"	l
dram_ras	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_ras;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_ras	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_ras;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_ras	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_ras;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_ras	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_ras;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_ras	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_ras;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_reset	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_reset;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_reset	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_reset;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_reset	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_reset;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_reset	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_reset;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_reset	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_reset;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdba0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba0;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdba0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba0;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdba0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdba1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba1;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdba1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba1;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdba1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba1;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdba2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba2;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdba2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba2;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdba2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba2;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdba2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba2;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdba2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdba2;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdcke0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke0;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdcke0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke0;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdcke0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke0;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdcke0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke0;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdcke0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdcke1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke1;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdcke1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke1;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdcke1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke1;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdcke1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke1;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdcke1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdcke1;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_0;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_0;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_0;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_0;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_1;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdclk_1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdclk_1;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdodt0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdodt0;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdodt0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdodt0;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdodt1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdodt1;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdodt1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdodt1;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs0;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs0;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs0;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs0;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdqs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs0;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdqs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs1;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs1;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs1;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs1;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdqs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs1;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_sdqs2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs2;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs2;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs2;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs2;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdqs3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs3;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs3;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs3;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs3;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdqs4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs4;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs4;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs5;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs5;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs6	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs6;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs6	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs6;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdqs7	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs7;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
dram_sdqs7	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdqs7;$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32
dram_sdwe_b	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdwe_b;$/;"	m	struct:mx6sl_iomux_ddr_regs	typeref:typename:u32
dram_sdwe_b	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdwe_b;$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32
dram_sdwe_b	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 dram_sdwe_b;$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32
dram_size	arch/arm/mach-uniphier/dram/umc-ld11.c	/^enum dram_size {$/;"	g	file:
dram_size	arch/arm/mach-uniphier/dram/umc-ld20.c	/^enum dram_size {$/;"	g	file:
dram_size	arch/arm/mach-uniphier/dram/umc-ld4.c	/^enum dram_size {$/;"	g	file:
dram_size	arch/arm/mach-uniphier/dram/umc-pro4.c	/^enum dram_size {$/;"	g	file:
dram_size	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^enum dram_size {$/;"	g	file:
dram_size	arch/arm/mach-uniphier/dram/umc-sld8.c	/^enum dram_size {$/;"	g	file:
dram_size	board/tqc/tqm8xx/tqm8xx.c	/^static long int dram_size (long int mamr_value, long int *base, long int maxsize)$/;"	f	typeref:typename:long int	file:
dram_speed	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dram_speed;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dram_sts	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_sts;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_sun6i_para	arch/arm/mach-sunxi/dram_sun6i.c	/^struct dram_sun6i_para {$/;"	s	file:
dram_sun9i_cl_cwl_timing	arch/arm/mach-sunxi/dram_sun9i.c	/^struct dram_sun9i_cl_cwl_timing {$/;"	s	file:
dram_sun9i_para	arch/arm/mach-sunxi/dram_sun9i.c	/^struct dram_sun9i_para {$/;"	s	file:
dram_sun9i_timing	arch/arm/mach-sunxi/dram_sun9i.c	/^struct dram_sun9i_timing {$/;"	s	file:
dram_timing1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing1;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_timing1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing1;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_timing2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing2;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_timing2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing2;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_timing3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing3;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_timing3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing3;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_timing4	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing4;	\/* 0x10 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
dram_timing4	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	dram_timing4;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
dram_training_init	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^typedef struct dram_training_init {$/;"	s
dram_tst	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 dram_tst;		\/* 0x190 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
dram_tst	arch/arm/include/asm/arch/prcm.h	/^	u32 dram_tst;		\/* 0x190 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
dram_type	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 dram_type;$/;"	m	struct:dram_para	typeref:typename:u8	file:
dram_type	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 dram_type;$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
dram_type	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t dram_type;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
dram_vals	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static uint32_t dram_vals[] = {$/;"	v	typeref:typename:uint32_t[]	file:
dram_wait	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^static inline void dram_wait(unsigned int count)$/;"	f	typeref:typename:void	file:
dram_wait	board/CarMediaLab/flea3/flea3.c	/^static inline void dram_wait(unsigned int count)$/;"	f	typeref:typename:void	file:
dram_wake_command	arch/x86/cpu/quark/mrc_util.c	/^void dram_wake_command(void)$/;"	f	typeref:typename:void
dram_width	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t dram_width;		\/* x8, x16 *\/$/;"	m	struct:mrc_params	typeref:typename:uint8_t
dramc_clock_output_en	arch/arm/mach-sunxi/dram_sun4i.c	/^static void dramc_clock_output_en(u32 on)$/;"	f	typeref:typename:void	file:
dramc_init	arch/arm/mach-sunxi/dram_sun4i.c	/^unsigned long dramc_init(struct dram_para *para)$/;"	f	typeref:typename:unsigned long
dramc_init_helper	arch/arm/mach-sunxi/dram_sun4i.c	/^static unsigned long dramc_init_helper(struct dram_para *para)$/;"	f	typeref:typename:unsigned long	file:
dramc_scan_readpipe	arch/arm/mach-sunxi/dram_sun4i.c	/^static int dramc_scan_readpipe(void)$/;"	f	typeref:typename:int	file:
dramc_set_autorefresh_cycle	arch/arm/mach-sunxi/dram_sun4i.c	/^static void dramc_set_autorefresh_cycle(u32 clk, u32 density)$/;"	f	typeref:typename:void	file:
dramfreq	arch/arm/include/asm/arch-spear/spr_defs.h	/^	int dramfreq;$/;"	m	struct:chip_data	typeref:typename:int
dramsz	include/lynxkdi.h	/^	uint32_t	dramsz;		\/* DRAM size			*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint32_t
dramsz_loop	arch/m68k/cpu/mcf5227x/start.S	/^dramsz_loop:$/;"	l
dramsz_loop	arch/m68k/cpu/mcf5445x/start.S	/^dramsz_loop:$/;"	l
dramtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dramtmg[9];		\/* 0x58 DRAM timing registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[9]
dramtmg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dramtmg[9];		\/* 0x100 DRAM timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[9]
dramtmg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dramtmg[9];		\/* 0x58 DRAM timing registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[9]
dramtmg	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dramtmg[9];		\/* 0x100 DRAM timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[9]
dramtmg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg0;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg0;		\/* 0x58 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg0;		\/* 0x58 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg0;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg0;		\/* 0x58 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg0;		\/* 0x58 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg1;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg1;		\/* 0x5c dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg1;		\/* 0x5c dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg1;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg1;		\/* 0x5c dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg1;		\/* 0x5c dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg2;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg2;		\/* 0x60 dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg2;		\/* 0x60 dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg2;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg2;		\/* 0x60 dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg2;		\/* 0x60 dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg3;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg3;		\/* 0x64 dram timing parameters register 3 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg3;		\/* 0x64 dram timing parameters register 3 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg3;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg3;		\/* 0x64 dram timing parameters register 3 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg3;		\/* 0x64 dram timing parameters register 3 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg4;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg4;		\/* 0x68 dram timing parameters register 4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg4;		\/* 0x68 dram timing parameters register 4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg4;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg4	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg4;		\/* 0x68 dram timing parameters register 4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg4	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg4;		\/* 0x68 dram timing parameters register 4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg5;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg5;		\/* 0x6c dram timing parameters register 5 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg5;		\/* 0x6c dram timing parameters register 5 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg5	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg5;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg5	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg5;		\/* 0x6c dram timing parameters register 5 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg5	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg5;		\/* 0x6c dram timing parameters register 5 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg6;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg6;		\/* 0x70 dram timing parameters register 6 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg6;		\/* 0x70 dram timing parameters register 6 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg6	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg6;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg6	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg6;		\/* 0x70 dram timing parameters register 6 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg6	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg6;		\/* 0x70 dram timing parameters register 6 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg7;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg7;		\/* 0x74 dram timing parameters register 7 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg7;		\/* 0x74 dram timing parameters register 7 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg7	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg7;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg7	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg7;		\/* 0x74 dram timing parameters register 7 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg7	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg7;		\/* 0x74 dram timing parameters register 7 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dramtmg8;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dramtmg8;		\/* 0x78 dram timing parameters register 8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dramtmg8;		\/* 0x78 dram timing parameters register 8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg8	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dramtmg8;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg8	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dramtmg8;		\/* 0x78 dram timing parameters register 8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtmg8	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dramtmg8;		\/* 0x78 dram timing parameters register 8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dramtype	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 dramtype;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
dramtype	arch/arm/include/asm/arch-spear/spr_defs.h	/^	int dramtype;$/;"	m	struct:chip_data	typeref:typename:int
draw_bitmap	drivers/video/cfb_console.c	/^static void draw_bitmap(uchar **fb, uchar *bm, struct palette *p,$/;"	f	typeref:typename:void	file:
draw_box	scripts/kconfig/lxdialog/util.c	/^draw_box(WINDOW * win, int y, int x, int height, int width,$/;"	f	typeref:typename:void
draw_encoded_bitmap	common/lcd.c	/^static void draw_encoded_bitmap(ushort **fbp, ushort c, int cnt)$/;"	f	typeref:typename:void	file:
draw_encoded_bitmap	drivers/video/video_bmp.c	/^static void draw_encoded_bitmap(ushort **fbp, ushort col, int cnt)$/;"	f	typeref:typename:void	file:
draw_logo	board/samsung/common/misc.c	/^void draw_logo(void)$/;"	f	typeref:typename:void
draw_shadow	scripts/kconfig/lxdialog/util.c	/^void draw_shadow(WINDOW * win, int y, int x, int height, int width)$/;"	f	typeref:typename:void
draw_unencoded_bitmap	common/lcd.c	/^static void draw_unencoded_bitmap(ushort **fbp, uchar *bmap, ushort *cmap,$/;"	f	typeref:typename:void	file:
draw_unencoded_bitmap	drivers/video/video_bmp.c	/^static void draw_unencoded_bitmap(ushort **fbp, uchar *bmap, ushort *cmap,$/;"	f	typeref:typename:void	file:
drb_count	drivers/block/sata_mv.c	/^	u32 drb_count;		\/* DW3 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
drec	drivers/i2c/i2c-uniphier.c	/^	u32 drec;			\/* data reception *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
dregs	drivers/usb/musb/davinci.c	/^struct davinci_usb_regs *dregs;$/;"	v	typeref:struct:davinci_usb_regs *
drevision	include/pci_rom.h	/^	uint8_t drevision;$/;"	m	struct:pci_rom_data	typeref:typename:uint8_t
drex2_pause	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	drex2_pause;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
drfc	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 drfc;$/;"	m	struct:at91_emac	typeref:typename:u32
drive	board/micronas/vct/top.c	/^		u32 drive	:  2;   \/* Driver strength	*\/$/;"	m	struct:_TOP_PINMUX_t::__anon904a4b870108	typeref:typename:u32:2	file:
drive	cmd/fdc.c	/^	uchar		drive;		\/* drive no *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:uchar	file:
drive_current	drivers/video/tegra124/sor.h	/^	u32	drive_current;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
drive_cyl_high	drivers/block/mxc_ata.c	/^	u32	drive_cyl_high;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_cyl_low	drivers/block/mxc_ata.c	/^	u32	drive_cyl_low;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_data	drivers/block/mxc_ata.c	/^	u32	drive_data;	\/* 0xa0 *\/$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_dev_head	drivers/block/mxc_ata.c	/^	u32	drive_dev_head;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_features	drivers/block/mxc_ata.c	/^	u32	drive_features;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_init	disk/part_amiga.h	/^    u32 drive_init;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
drive_name	disk/part_amiga.h	/^    char drive_name[32];$/;"	m	struct:partition_block	typeref:typename:char[32]
drive_number	include/fat.h	/^	__u8 drive_number;	\/* BIOS drive number *\/$/;"	m	struct:volume_info	typeref:typename:__u8
drive_sector_count	drivers/block/mxc_ata.c	/^	u32	drive_sector_count;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_sector_num	drivers/block/mxc_ata.c	/^	u32	drive_sector_num;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
drive_tag	tools/mxsimage.h	/^	uint16_t	drive_tag;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
drive_type	tools/mxsboot.c	/^	uint32_t		drive_type;$/;"	m	struct:mx28_sd_drive_info	typeref:typename:uint32_t	file:
driver	drivers/usb/gadget/at91_udc.h	/^	struct usb_gadget_driver	*driver;$/;"	m	struct:at91_udc	typeref:struct:usb_gadget_driver *
driver	drivers/usb/gadget/atmel_usba_udc.h	/^	struct usb_gadget_driver *driver;$/;"	m	struct:usba_udc	typeref:struct:usb_gadget_driver *
driver	drivers/usb/gadget/ci_udc.h	/^	struct usb_gadget_driver	*driver;$/;"	m	struct:ci_drv	typeref:struct:usb_gadget_driver *
driver	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct usb_gadget_driver *driver;$/;"	m	struct:dwc2_udc	typeref:struct:usb_gadget_driver *
driver	drivers/usb/gadget/fotg210.c	/^	struct usb_gadget_driver *driver;$/;"	m	struct:fotg210_chip	typeref:struct:usb_gadget_driver *	file:
driver	drivers/usb/gadget/pxa25x_udc.h	/^	struct usb_gadget_driver		*driver;$/;"	m	struct:pxa25x_udc	typeref:struct:usb_gadget_driver *
driver	drivers/usb/gadget/udc/udc-core.c	/^	struct usb_gadget_driver	*driver;$/;"	m	struct:usb_udc	typeref:struct:usb_gadget_driver *	file:
driver	include/dm/device.h	/^	const struct driver *driver;$/;"	m	struct:udevice	typeref:typename:const struct driver *
driver	include/dm/device.h	/^struct driver {$/;"	s
driver	include/linux/ethtool.h	/^	char	driver[32];	\/* driver short name, "tulip", "eepro100" *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:char[32]
driver	include/linux/usb/composite.h	/^	struct usb_composite_driver	*driver;$/;"	m	struct:usb_composite_dev	typeref:struct:usb_composite_driver *
driver	include/pci.h	/^	struct driver *driver;$/;"	m	struct:pci_driver_entry	typeref:struct:driver *
driver	include/power/pmic.h	/^	const char *driver;$/;"	m	struct:pmic_child_info	typeref:typename:const char *
driver	include/usb.h	/^	struct driver *driver;$/;"	m	struct:usb_driver_entry	typeref:struct:driver *
driver_check_compatible	drivers/core/lists.c	/^static int driver_check_compatible(const struct udevice_id *of_match,$/;"	f	typeref:typename:int	file:
driver_context	fs/yaffs2/yaffs_guts.h	/^	void *driver_context;$/;"	m	struct:yaffs_dev	typeref:typename:void *
driver_data	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	ulong driver_data;$/;"	m	struct:mxc_i2c_bus	typeref:typename:ulong
driver_data	include/dm/device.h	/^	ulong driver_data;$/;"	m	struct:udevice	typeref:typename:ulong
driver_data	include/linux/compat.h	/^	void		*driver_data;	\/* data private to the driver *\/$/;"	m	struct:device	typeref:typename:void *
driver_data	include/linux/usb/gadget.h	/^	void			*driver_data;$/;"	m	struct:usb_ep	typeref:typename:void *
driver_data	include/pci.h	/^	unsigned long driver_data;	\/* Data private to the driver *\/$/;"	m	struct:pci_device_id	typeref:typename:unsigned long
driver_desc	drivers/usb/gadget/dwc2_udc_otg.c	/^static const char driver_desc[] = DRIVER_DESC;$/;"	v	typeref:typename:const char[]	file:
driver_desc	drivers/usb/gadget/ether.c	/^static const char driver_desc[] = DRIVER_DESC;$/;"	v	typeref:typename:const char[]	file:
driver_hash	drivers/crypto/fsl/fsl_hash.c	/^static struct caam_hash_template driver_hash[] = {$/;"	v	typeref:struct:caam_hash_template[]	file:
driver_info	include/dm/platdata.h	/^struct driver_info {$/;"	s
driver_info	include/usb.h	/^	ulong driver_info;$/;"	m	struct:usb_device_id	typeref:typename:ulong
driver_info_manual	test/dm/core.c	/^static struct driver_info driver_info_manual = {$/;"	v	typeref:struct:driver_info	file:
driver_info_pre_reloc	test/dm/core.c	/^static struct driver_info driver_info_pre_reloc = {$/;"	v	typeref:struct:driver_info	file:
driver_name	drivers/usb/gadget/at91_udc.c	/^static const char driver_name [] = "at91_udc";$/;"	v	typeref:typename:const char[]	file:
driver_name	drivers/usb/gadget/dwc2_udc_otg.c	/^static const char driver_name[] = "dwc2-udc";$/;"	v	typeref:typename:const char[]	file:
driver_name	drivers/usb/gadget/pxa25x_udc.c	/^static const char driver_name[] = "pxa25x_udc";$/;"	v	typeref:typename:const char[]	file:
driver_plat_data	include/remoteproc.h	/^	void *driver_plat_data;$/;"	m	struct:dm_rproc_uclass_pdata	typeref:typename:void *
driver_strength_support	include/linux/mtd/nand.h	/^	u8 driver_strength_support;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
driver_strength_support	include/linux/mtd/nand.h	/^	u8 driver_strength_support;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
drm_clock	arch/arm/dts/zynqmp-clk.dtsi	/^	drm_clock: drm_clock {$/;"	l
drop_addr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	drop_addr;	\/* 0x50 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
drop_cfg	include/vsc9953.h	/^	struct vsc9953_qsys_drop_cfg	drop_cfg;$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_drop_cfg
drop_cfg	include/vsc9953.h	/^	u32	drop_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
drop_cntrs	include/vsc9953.h	/^	struct vsc9953_drop_cntrs	drop_cntrs;$/;"	m	struct:vsc9953_sys_stat	typeref:struct:vsc9953_drop_cntrs
drop_count	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	drop_count;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
drop_ffs	drivers/mtd/nand/nand_util.c	/^static size_t drop_ffs(const struct mtd_info *mtd, const u_char *buf,$/;"	f	typeref:typename:size_t	file:
drop_flags	drivers/usb/host/xhci.h	/^	volatile __le32	drop_flags;$/;"	m	struct:xhci_input_control_ctx	typeref:typename:volatile __le32
drop_inode	fs/ubifs/ubifs.h	/^	int (*drop_inode) (struct inode *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct inode *)
drop_last_group	fs/ubifs/recovery.c	/^static void drop_last_group(struct ubifs_scan_leb *sleb, int *offs)$/;"	f	typeref:typename:void	file:
drop_last_node	fs/ubifs/recovery.c	/^static void drop_last_node(struct ubifs_scan_leb *sleb, int *offs)$/;"	f	typeref:typename:void	file:
drop_var_from_set	lib/hashtable.c	/^static int drop_var_from_set(const char *name, int nvars, char * vars[])$/;"	f	typeref:typename:int	file:
dropbsy	drivers/qe/uec.h	/^	u32   dropbsy;           \/* drop because of BD not ready *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
drr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 drr;		\/* 0x10 dram refresh register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
drr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 drr;		\/* 0x10 dram refresh register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
drr	include/fsl_sec.h	/^	u32	drr;		\/* DECO Reset Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
drr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	drr;		\/* DRAM refresh *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
drr1	arch/m68k/include/asm/immap_5275.h	/^	u32 drr1;$/;"	m	struct:usb	typeref:typename:u32
drr2	arch/m68k/include/asm/immap_5275.h	/^	u32 drr2;$/;"	m	struct:usb	typeref:typename:u32
drs	board/micronas/vct/scc.h	/^		u32 drs:1;	\/* DMA Register Set			*\/$/;"	m	struct:scc_cmd::__anon903167320108	typeref:typename:u32:1
drv	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 drv[2];$/;"	m	struct:sunxi_gpio	typeref:typename:u32[2]
drv	arch/arm/include/asm/arch/gpio.h	/^	u32 drv[2];$/;"	m	struct:sunxi_gpio	typeref:typename:u32[2]
drv	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int	drv;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
drv	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int	drv;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
drv	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 drv;		\/* 0x04 *\/$/;"	m	struct:siu	typeref:typename:u32
drv	include/phy.h	/^	struct phy_driver *drv;$/;"	m	struct:phy_device	typeref:struct:phy_driver *
drv_5v	arch/arm/dts/rk3288-jerry.dts	/^		drv_5v: drv-5v {$/;"	l
drv_date	drivers/net/rtl8169.c	/^#define drv_date /;"	d	file:
drv_info	tools/mxsboot.c	/^	struct mx28_sd_drive_info	drv_info[1];$/;"	m	struct:mx28_sd_config_block	typeref:struct:mx28_sd_drive_info[1]	file:
drv_isa_kbd_init	board/mpl/common/kbd.c	/^int drv_isa_kbd_init (void)$/;"	f	typeref:typename:int
drv_jtag_console_init	arch/blackfin/cpu/jtag-console.c	/^int drv_jtag_console_init(void)$/;"	f	typeref:typename:int
drv_keyboard_init	board/kosagi/novena/novena.c	/^int drv_keyboard_init(void)$/;"	f	typeref:typename:int
drv_lcd_init	common/lcd.c	/^int drv_lcd_init(void)$/;"	f	typeref:typename:int
drv_logbuff_init	cmd/log.c	/^int drv_logbuff_init(void)$/;"	f	typeref:typename:int
drv_nc_init	drivers/net/netconsole.c	/^int drv_nc_init(void)$/;"	f	typeref:typename:int
drv_system_init	common/stdio.c	/^static void drv_system_init (void)$/;"	f	typeref:typename:void	file:
drv_usb_kbd_init	common/usb_kbd.c	/^int drv_usb_kbd_init(void)$/;"	f	typeref:typename:int
drv_usbtty_init	drivers/serial/usbtty.c	/^int drv_usbtty_init (void)$/;"	f	typeref:typename:int
drv_version	drivers/net/rtl8169.c	/^#define drv_version /;"	d	file:
drv_video_init	arch/powerpc/cpu/mpc8xx/video.c	/^int drv_video_init (void)$/;"	f	typeref:typename:int
drv_video_init	board/BuS/eb_cpu5282/eb_cpu5282.c	/^int drv_video_init(void)$/;"	f	typeref:typename:int
drv_video_init	board/bf527-ezkit/video.c	/^int drv_video_init(void)$/;"	f	typeref:typename:int
drv_video_init	board/bf533-stamp/video.c	/^int drv_video_init(void)$/;"	f	typeref:typename:int
drv_video_init	board/bf548-ezkit/video.c	/^int drv_video_init(void)$/;"	f	typeref:typename:int
drv_video_init	board/cm-bf548/video.c	/^int drv_video_init(void)$/;"	f	typeref:typename:int
drv_video_init	drivers/video/cfb_console.c	/^int drv_video_init(void)$/;"	f	typeref:typename:int
drvdn	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 drvdn:8;		\/* pull-down drive strength  *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:8
drvgrp	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 drvgrp:16;	\/* pin group PMUX_DRVGRP_x   *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:16
drvr_cnt	disk/part_mac.h	/^	__u16	drvr_cnt;	\/* number of driver descriptor entries	*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u16
drvr_map	disk/part_mac.h	/^	__u16	drvr_map[247];	\/* driver descriptor map		*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u16[247]
drvsel	drivers/mmc/socfpga_dw_mmc.c	/^	unsigned int		drvsel;$/;"	m	struct:dwmci_socfpga_priv_data	typeref:typename:unsigned int	file:
drvup	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 drvup:8;		\/* pull-up drive strength    *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:8
drvvbus	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	drvvbus:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
drvvbuscfg	include/fsl_usb.h	/^	u32	drvvbuscfg;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
drxr	drivers/spi/zynq_qspi.c	/^	u32 drxr;	\/* 0x20 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
ds	drivers/bios_emulator/include/biosemu.h	/^	u16 ds;$/;"	m	struct:__anon964d10140808	typeref:typename:u16
ds1302_initted	drivers/rtc/ds1302.c	/^static int ds1302_initted=0;$/;"	v	typeref:typename:int	file:
ds1302_st	drivers/rtc/ds1302.c	/^struct ds1302_st$/;"	s	file:
ds1722_probe	drivers/hwmon/ds1722.c	/^int ds1722_probe(int dev)$/;"	f	typeref:typename:int
ds1722_read	drivers/hwmon/ds1722.c	/^u8 ds1722_read(int dev, int addr)$/;"	f	typeref:typename:u8
ds1722_select	drivers/hwmon/ds1722.c	/^static void ds1722_select(int dev)$/;"	f	typeref:typename:void	file:
ds1722_temp	drivers/hwmon/ds1722.c	/^u16 ds1722_temp(int dev, int resolution)$/;"	f	typeref:typename:u16
ds1722_write	drivers/hwmon/ds1722.c	/^void ds1722_write(int dev, int addr, u8 data)$/;"	f	typeref:typename:void
ds3232	arch/arm/dts/ls1021a-qds.dtsi	/^			ds3232: rtc@68 {$/;"	l	label:pca9547
ds414_ddr_modes	board/Synology/ds414/ds414.c	/^MV_DRAM_MODES ds414_ddr_modes[MV_DDR3_MODES_NUMBER] = {$/;"	v	typeref:typename:MV_DRAM_MODES[]
ds414_mpp_control	board/Synology/ds414/ds414.c	/^static const u32 ds414_mpp_control[] = {$/;"	v	typeref:typename:const u32[]	file:
ds414_serdes_cfg	board/Synology/ds414/ds414.c	/^MV_BIN_SERDES_CFG ds414_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
ds4510_gpio_read	drivers/misc/ds4510.c	/^int ds4510_gpio_read(uint8_t chip)$/;"	f	typeref:typename:int
ds4510_gpio_read_val	drivers/misc/ds4510.c	/^int ds4510_gpio_read_val(uint8_t chip)$/;"	f	typeref:typename:int
ds4510_gpio_write	drivers/misc/ds4510.c	/^int ds4510_gpio_write(uint8_t chip, uint8_t val)$/;"	f	typeref:typename:int
ds4510_info	drivers/misc/ds4510.c	/^static int ds4510_info(uint8_t chip)$/;"	f	typeref:typename:int	file:
ds4510_mem_read	drivers/misc/ds4510.c	/^int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)$/;"	f	typeref:typename:int
ds4510_mem_write	drivers/misc/ds4510.c	/^int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)$/;"	f	typeref:typename:int
ds4510_pullup_read	drivers/misc/ds4510.c	/^int ds4510_pullup_read(uint8_t chip)$/;"	f	typeref:typename:int
ds4510_pullup_write	drivers/misc/ds4510.c	/^int ds4510_pullup_write(uint8_t chip, uint8_t val)$/;"	f	typeref:typename:int
ds4510_rstdelay_write	drivers/misc/ds4510.c	/^int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)$/;"	f	typeref:typename:int
ds4510_see_write	drivers/misc/ds4510.c	/^int ds4510_see_write(uint8_t chip, uint8_t nv)$/;"	f	typeref:typename:int
ds_120_ohm	arch/arm/include/asm/arch-omap5/omap.h	/^#define ds_120_ohm	/;"	d
ds_30_ohm	arch/arm/include/asm/arch-omap5/omap.h	/^#define ds_30_ohm	/;"	d
ds_45_ohm	arch/arm/include/asm/arch-omap5/omap.h	/^#define ds_45_ohm	/;"	d
ds_60_ohm	arch/arm/include/asm/arch-omap5/omap.h	/^#define ds_60_ohm	/;"	d
ds_bp	include/zfs/dsl_dataset.h	/^	blkptr_t ds_bp;$/;"	m	struct:dsl_dataset_phys	typeref:typename:blkptr_t
ds_compressed_bytes	include/zfs/dsl_dataset.h	/^	uint64_t ds_compressed_bytes;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_creation_time	include/zfs/dsl_dataset.h	/^	uint64_t ds_creation_time;	\/* seconds since 1970 *\/$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_creation_txg	include/zfs/dsl_dataset.h	/^	uint64_t ds_creation_txg;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_deadlist_obj	include/zfs/dsl_dataset.h	/^	uint64_t ds_deadlist_obj;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_dir_obj	include/zfs/dsl_dataset.h	/^	uint64_t ds_dir_obj;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_flags	include/zfs/dsl_dataset.h	/^	uint64_t ds_flags;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_fsid_guid	include/zfs/dsl_dataset.h	/^	uint64_t ds_fsid_guid;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_guid	include/zfs/dsl_dataset.h	/^	uint64_t ds_guid;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_mask	arch/arm/include/asm/arch-omap5/omap.h	/^#define ds_mask	/;"	d
ds_next_snap_obj	include/zfs/dsl_dataset.h	/^	uint64_t ds_next_snap_obj;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_num_children	include/zfs/dsl_dataset.h	/^	uint64_t ds_num_children;	\/* clone\/snap children; ==0 for head *\/$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_pad	include/zfs/dsl_dataset.h	/^	uint64_t ds_pad[8]; \/* pad out to 320 bytes for good measure *\/$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t[8]
ds_prev_snap_obj	include/zfs/dsl_dataset.h	/^	uint64_t ds_prev_snap_obj;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_prev_snap_txg	include/zfs/dsl_dataset.h	/^	uint64_t ds_prev_snap_txg;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_snapnames_zapobj	include/zfs/dsl_dataset.h	/^	uint64_t ds_snapnames_zapobj;	\/* zap obj of snaps; ==0 for snaps *\/$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_uncompressed_bytes	include/zfs/dsl_dataset.h	/^	uint64_t ds_uncompressed_bytes;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_unique_bytes	include/zfs/dsl_dataset.h	/^	uint64_t ds_unique_bytes;	\/* only relevant to snapshots *\/$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
ds_used_bytes	include/zfs/dsl_dataset.h	/^	uint64_t ds_used_bytes;$/;"	m	struct:dsl_dataset_phys	typeref:typename:uint64_t
dsaddr	drivers/mmc/fsl_esdhc.c	/^	uint    dsaddr;		\/* SDMA system address register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
dsal0	include/tsi148.h	/^	unsigned int dsal0;                   \/* 0x524         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsal1	include/tsi148.h	/^	unsigned int dsal1;                   \/* 0x5a4         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsample_time	tools/mxsboot.c	/^		uint8_t			dsample_time;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
dsat0	include/tsi148.h	/^	unsigned int dsat0;                   \/* 0x530         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsat1	include/tsi148.h	/^	unsigned int dsat1;                   \/* 0x5b0         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsau0	include/tsi148.h	/^	unsigned int dsau0;                   \/* 0x520         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsau1	include/tsi148.h	/^	unsigned int dsau1;                   \/* 0x5a0         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsb	arch/arm/include/asm/barriers.h	/^#define dsb(/;"	d
dsc0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dsc0;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
dsc1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dsc1;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
dscp	drivers/net/mvgbe.h	/^	u32 dscp[7];$/;"	m	struct:mvgbe_registers	typeref:typename:u32[7]
dscp_cfg	include/vsc9953.h	/^	u32	dscp_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
dscp_remap_cfg	include/vsc9953.h	/^	u32	dscp_remap_cfg[64];$/;"	m	struct:vsc9953_rew_common	typeref:typename:u32[64]
dscp_remap_dp1_cfg	include/vsc9953.h	/^	u32	dscp_remap_dp1_cfg[64];$/;"	m	struct:vsc9953_rew_common	typeref:typename:u32[64]
dscp_rewr_cfg	include/vsc9953.h	/^	u32	dscp_rewr_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
dscr1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr1;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr10	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr10;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr11	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr11;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr12	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr12;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr13	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr13;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr2;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr3;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr4	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr4;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr5	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr5;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr6	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr6;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr7	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr7;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr8	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr8;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr9	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 dscr9;$/;"	m	struct:system_control_regs	typeref:typename:u32
dscr_ata	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_ata;		\/* ATA Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_clkrst	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_clkrst;		\/* 0x4D *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_clkrst	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_clkrst;		\/* 0x71 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_debug	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_debug;		\/* 0x4C *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_debug	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_debug;		\/* 0x70 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_debug	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_debug;		\/* DEBUG Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_dma	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_dma;		\/* DMA Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_dspi	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_dspi;		\/* 0x48 *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_dspi	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_dspi;		\/* DSPI Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_eim	arch/m68k/include/asm/immap_5235.h	/^	u8 dscr_eim;		\/* 0x50 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_etpu	arch/m68k/include/asm/immap_5235.h	/^	u8 dscr_etpu;		\/* 0x51 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_fec	arch/m68k/include/asm/immap_520x.h	/^	u8 dscr_fec;		\/* 0x3E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_fec	arch/m68k/include/asm/immap_5301x.h	/^	u8 dscr_fec;		\/* 0x6D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_fec	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_fec;		\/* 0x6A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_fec	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_fec;		\/* FEC Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_feci2c	arch/m68k/include/asm/immap_5235.h	/^	u8 dscr_feci2c;		\/* 0x52 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_flexbus	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_flexbus;	\/* FLEXBUS Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_i2c	arch/m68k/include/asm/immap_520x.h	/^	u8 dscr_i2c;		\/* 0x3C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_i2c	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_i2c;		\/* 0x4A *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_i2c	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_i2c;		\/* 0x68 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_i2c	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_i2c;		\/* I2C Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_irq	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_irq;		\/* 0x4E *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_irq	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_irq;		\/* 0x72 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_irq	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_irq;		\/* IRQ Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_lcd	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_lcd;		\/* 0x4B *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_lcd	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_lcd;		\/* 0x6F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_misc	arch/m68k/include/asm/immap_520x.h	/^	u8 dscr_misc;		\/* 0x3D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_pwm	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_pwm;		\/* 0x69 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_qspi	arch/m68k/include/asm/immap_520x.h	/^	u8 dscr_qspi;		\/* 0x40 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_qspi	arch/m68k/include/asm/immap_5235.h	/^	u8 dscr_qspi;		\/* 0x54 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_qspi	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_qspi;		\/* 0x6C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_reset	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_reset;		\/* RESET Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_ssi	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_ssi;		\/* 0x6E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_ssi	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_ssi;		\/* SSI Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_timer	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_timer;		\/* 0x49 *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_timer	arch/m68k/include/asm/immap_5235.h	/^	u8 dscr_timer;		\/* 0x55 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_timer	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_timer;		\/* 0x6D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_timer	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_timer;		\/* TIMER Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_uart	arch/m68k/include/asm/immap_520x.h	/^	u8 dscr_uart;		\/* 0x3F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_uart	arch/m68k/include/asm/immap_5227x.h	/^	u8 dscr_uart;		\/* 0x4F *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_uart	arch/m68k/include/asm/immap_5235.h	/^	u8 dscr_uart;		\/* 0x53 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_uart	arch/m68k/include/asm/immap_5329.h	/^	u8 dscr_uart;		\/* 0x6B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
dscr_uart	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_uart;		\/* UART Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dscr_usb	arch/m68k/include/asm/immap_5445x.h	/^	u8 dscr_usb;		\/* USB Drive Strength Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
dsdt	arch/x86/include/asm/acpi_table.h	/^	u32 dsdt;$/;"	m	struct:acpi_fadt	typeref:typename:u32
dseg	include/linux/apm_bios.h	/^	__u16	dseg;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
dseg_len	include/linux/apm_bios.h	/^	__u16	dseg_len;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
dsgcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dsgcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dsgcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dsgcr;		\/* 0x2c dram system general config register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dsgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dsgcr;		\/* 0x40 dram system general config register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dsgcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dsgcr;		\/* 0x84 DRAM system general config register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dsgcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dsgcr;		\/* 0x2c dram system general config register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dsgcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dsgcr;		\/* 0x40 dram system general config register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dsgcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dsgcr;		\/* 0x84 DRAM system general config register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dsi0pckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dsi0pckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dsi0phycr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dsi0phycr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dsi1pckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dsi1pckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dsi1phycr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dsi1phycr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dsim_config	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct mipi_dsim_config		*dsim_config;$/;"	m	struct:exynos_platform_mipi_dsim	typeref:struct:mipi_dsim_config *
dsim_config	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct mipi_dsim_config		*dsim_config;$/;"	m	struct:mipi_dsim_device	typeref:struct:mipi_dsim_config *
dsim_lcd_dev	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct mipi_dsim_lcd_device	*dsim_lcd_dev;$/;"	m	struct:mipi_dsim_device	typeref:struct:mipi_dsim_lcd_device *
dsim_lcd_dev	drivers/video/exynos/exynos_mipi_dsi.c	/^	struct mipi_dsim_lcd_device	*dsim_lcd_dev;$/;"	m	struct:mipi_dsim_ddi	typeref:struct:mipi_dsim_lcd_device *	file:
dsim_lcd_drv	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct mipi_dsim_lcd_driver	*dsim_lcd_drv;$/;"	m	struct:mipi_dsim_device	typeref:struct:mipi_dsim_lcd_driver *
dsim_lcd_drv	drivers/video/exynos/exynos_mipi_dsi.c	/^	struct mipi_dsim_lcd_driver	*dsim_lcd_drv;$/;"	m	struct:mipi_dsim_ddi	typeref:struct:mipi_dsim_lcd_driver *	file:
dsim_platform_data_dt	drivers/video/exynos/exynos_fb.c	/^	struct exynos_platform_mipi_dsim *dsim_platform_data_dt;$/;"	m	struct:exynos_fb_priv	typeref:struct:exynos_platform_mipi_dsim *	file:
dsim_platform_data_dt	include/exynos_lcd.h	/^	struct exynos_platform_mipi_dsim *dsim_platform_data_dt;$/;"	m	struct:vidinfo	typeref:struct:exynos_platform_mipi_dsim *
dsimskr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 dsimskr;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
dsisr	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG dsisr;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
dsitckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dsitckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dsize	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 dsize;	\/* size of bus (in dwords: 0=16bit,1=32bit,2=64bit) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
dsize	include/jffs2/jffs2.h	/^	__u32 dsize;	  \/* Size of the node's data. (after decompression) *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
dsl_dataset_phys	include/zfs/dsl_dataset.h	/^typedef struct dsl_dataset_phys {$/;"	s
dsl_dataset_phys_t	include/zfs/dsl_dataset.h	/^} dsl_dataset_phys_t;$/;"	t	typeref:struct:dsl_dataset_phys
dsl_dir_phys	include/zfs/dsl_dir.h	/^typedef struct dsl_dir_phys {$/;"	s
dsl_dir_phys_t	include/zfs/dsl_dir.h	/^} dsl_dir_phys_t;$/;"	t	typeref:struct:dsl_dir_phys
dslpcntcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	dslpcntcr[8];	\/* Deep Sleep Counter Cfg Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32[8]
dsp	arch/mips/include/asm/processor.h	/^	struct mips_dsp_state dsp;$/;"	m	struct:thread_struct	typeref:struct:mips_dsp_state
dsp_bg	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_bg;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_config_state	drivers/net/e1000.h	/^	e1000_dsp_config	dsp_config_state;$/;"	m	struct:e1000_hw	typeref:typename:e1000_dsp_config
dsp_ctrl0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_ctrl0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_ctrl1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_ctrl1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_ddr_configure	board/freescale/bsc9132qds/bsc9132qds.c	/^void dsp_ddr_configure(void)$/;"	f	typeref:typename:void
dsp_dpll_hs_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	dsp_dpll_hs_clk_div: dsp_dpll_hs_clk_div {$/;"	l
dsp_gclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	dsp_gclk_div: dsp_gclk_div {$/;"	l
dsp_hact_st_end	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_hact_st_end;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_htotal_hs_end	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_htotal_hs_end;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_lpsc_on	board/Barix/ipam390/ipam390.c	/^void dsp_lpsc_on(unsigned domain, unsigned int id)$/;"	f	typeref:typename:void
dsp_lpsc_on	board/davinci/da8xxevm/da850evm.c	/^void dsp_lpsc_on(unsigned domain, unsigned int id)$/;"	f	typeref:typename:void
dsp_lpsc_on	board/davinci/da8xxevm/omapl138_lcdk.c	/^void dsp_lpsc_on(unsigned domain, unsigned int id)$/;"	f	typeref:typename:void
dsp_mask	arch/powerpc/include/asm/processor.h	/^	u32 dsp_mask;	\/* which DSP cpu(s) actually exist *\/$/;"	m	struct:cpu_type	typeref:typename:u32
dsp_num_cores	arch/powerpc/include/asm/processor.h	/^	u32 dsp_num_cores;$/;"	m	struct:cpu_type	typeref:typename:u32
dsp_on	arch/arm/mach-davinci/psc.c	/^void dsp_on(void)$/;"	f	typeref:typename:void
dsp_post_test	post/board/lwmon5/dsp.c	/^int dsp_post_test(int flags)$/;"	f	typeref:typename:int
dsp_vact_st_end	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_vact_st_end;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_vact_st_end_f1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_vact_st_end_f1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_vs_st_end_f1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_vs_st_end_f1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dsp_vtotal_vs_end	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 dsp_vtotal_vs_end;$/;"	m	struct:rk3288_vop	typeref:typename:u32
dspcontrol	arch/mips/include/asm/processor.h	/^	unsigned int    dspcontrol;$/;"	m	struct:mips_dsp_state	typeref:typename:unsigned int
dspgpio0	arch/arm/dts/k2e.dtsi	/^		dspgpio0: keystone_dsp_gpio@02620240 {$/;"	l
dspgpio0	arch/arm/dts/k2hk.dtsi	/^		dspgpio0: keystone_dsp_gpio@02620240 {$/;"	l
dspgpio0	arch/arm/dts/k2l.dtsi	/^		dspgpio0: keystone_dsp_gpio@02620240 {$/;"	l
dspgpio1	arch/arm/dts/k2hk.dtsi	/^		dspgpio1: keystone_dsp_gpio@2620244 {$/;"	l
dspgpio1	arch/arm/dts/k2l.dtsi	/^		dspgpio1: keystone_dsp_gpio@2620244 {$/;"	l
dspgpio2	arch/arm/dts/k2hk.dtsi	/^		dspgpio2: keystone_dsp_gpio@2620248 {$/;"	l
dspgpio2	arch/arm/dts/k2l.dtsi	/^		dspgpio2: keystone_dsp_gpio@2620248 {$/;"	l
dspgpio3	arch/arm/dts/k2hk.dtsi	/^		dspgpio3: keystone_dsp_gpio@262024c {$/;"	l
dspgpio3	arch/arm/dts/k2l.dtsi	/^		dspgpio3: keystone_dsp_gpio@262024c {$/;"	l
dspgpio4	arch/arm/dts/k2hk.dtsi	/^		dspgpio4: keystone_dsp_gpio@2620250 {$/;"	l
dspgpio5	arch/arm/dts/k2hk.dtsi	/^		dspgpio5: keystone_dsp_gpio@2620254 {$/;"	l
dspgpio6	arch/arm/dts/k2hk.dtsi	/^		dspgpio6: keystone_dsp_gpio@2620258 {$/;"	l
dspgpio7	arch/arm/dts/k2hk.dtsi	/^		dspgpio7: keystone_dsp_gpio@262025c {$/;"	l
dspi	arch/arm/dts/fsl-ls2080a.dtsi	/^	dspi: dspi@2100000 {$/;"	l
dspi	arch/m68k/include/asm/coldfire/dspi.h	/^typedef struct dspi {$/;"	s
dspi	include/fsl_dspi.h	/^struct dspi {$/;"	s
dspi0	arch/arm/dts/fsl-ls1012a.dtsi	/^		dspi0: dspi@2100000 {$/;"	l
dspi0	arch/arm/dts/fsl-ls1043a.dtsi	/^		dspi0: dspi@2100000 {$/;"	l
dspi0	arch/arm/dts/fsl-ls1046a.dtsi	/^		dspi0: dspi@2100000 {$/;"	l
dspi0	arch/arm/dts/ls1021a.dtsi	/^		dspi0: dspi@2100000 {$/;"	l
dspi0	arch/arm/dts/vf.dtsi	/^			dspi0: dspi0@4002c000 {$/;"	l	label:aips0
dspi1	arch/arm/dts/fsl-ls1043a.dtsi	/^		dspi1: dspi@2110000 {$/;"	l
dspi1	arch/arm/dts/fsl-ls1046a.dtsi	/^		dspi1: dspi@2110000 {$/;"	l
dspi1	arch/arm/dts/ls1021a.dtsi	/^		dspi1: dspi@2110000 {$/;"	l
dspi1	arch/arm/dts/vf.dtsi	/^			dspi1: dspi1@4002d000 {$/;"	l	label:aips0
dspi_halt	drivers/spi/fsl_dspi.c	/^static void dspi_halt(struct fsl_dspi_priv *priv, u8 halt)$/;"	f	typeref:typename:void	file:
dspi_read32	drivers/spi/fsl_dspi.c	/^static uint dspi_read32(uint flags, uint *addr)$/;"	f	typeref:typename:uint	file:
dspi_rx	drivers/spi/fsl_dspi.c	/^static u16 dspi_rx(struct fsl_dspi_priv *priv)$/;"	f	typeref:typename:u16	file:
dspi_t	arch/m68k/include/asm/coldfire/dspi.h	/^} dspi_t;$/;"	t	typeref:struct:dspi
dspi_tx	drivers/spi/fsl_dspi.c	/^static void dspi_tx(struct fsl_dspi_priv *priv, u32 ctrl, u16 data)$/;"	f	typeref:typename:void	file:
dspi_write32	drivers/spi/fsl_dspi.c	/^static void dspi_write32(uint flags, uint *addr, uint val)$/;"	f	typeref:typename:void	file:
dspi_xfer	drivers/spi/fsl_dspi.c	/^static int dspi_xfer(struct fsl_dspi_priv *priv, uint cs, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
dspic_addr	board/liebherr/lwmon5/kbd.c	/^static uchar dspic_addr = CONFIG_SYS_I2C_DSPIC_IO_ADDR;$/;"	v	typeref:typename:uchar	file:
dspic_init_post_test	post/board/lwmon5/dspic.c	/^int dspic_init_post_test(int flags)$/;"	f	typeref:typename:int
dspic_post_test	post/board/lwmon5/dspic.c	/^int dspic_post_test(int flags)$/;"	f	typeref:typename:int
dspic_read	post/board/lwmon5/dspic.c	/^int dspic_read(ushort reg, ushort *data)$/;"	f	typeref:typename:int
dspiflash	arch/arm/dts/fsl-ls1043a-rdb.dts	/^	dspiflash: n25q12a {$/;"	l
dspiflash	arch/arm/dts/ls1021a-qds.dtsi	/^	dspiflash: at45db021d@0 {$/;"	l
dspiflash	arch/arm/dts/ls1021a-twr.dtsi	/^	dspiflash: at26df081a@0 {$/;"	l
dspr	arch/mips/include/asm/processor.h	/^	dspreg_t        dspr[NUM_DSP_REGS];$/;"	m	struct:mips_dsp_state	typeref:typename:dspreg_t[]
dspreg_t	arch/mips/include/asm/processor.h	/^typedef __u32 dspreg_t;$/;"	t	typeref:typename:__u32
dsps_create_musb_pdev	drivers/usb/musb-new/musb_dsps.c	/^static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)$/;"	f	typeref:typename:int __devinit	file:
dsps_delete_musb_pdev	drivers/usb/musb-new/musb_dsps.c	/^static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)$/;"	f	typeref:typename:void __devexit	file:
dsps_exit	drivers/usb/musb-new/musb_dsps.c	/^static void __exit dsps_exit(void)$/;"	f	typeref:typename:void __exit	file:
dsps_glue	drivers/usb/musb-new/musb_dsps.c	/^struct dsps_glue {$/;"	s	file:
dsps_init	drivers/usb/musb-new/musb_dsps.c	/^static int __init dsps_init(void)$/;"	f	typeref:typename:int __init	file:
dsps_interrupt	drivers/usb/musb-new/musb_dsps.c	/^static irqreturn_t dsps_interrupt(int irq, void *hci)$/;"	f	typeref:typename:irqreturn_t	file:
dsps_musb_disable	drivers/usb/musb-new/musb_dsps.c	/^static void dsps_musb_disable(struct musb *musb)$/;"	f	typeref:typename:void	file:
dsps_musb_enable	drivers/usb/musb-new/musb_dsps.c	/^static void dsps_musb_enable(struct musb *musb)$/;"	f	typeref:typename:void	file:
dsps_musb_exit	drivers/usb/musb-new/musb_dsps.c	/^static int dsps_musb_exit(struct musb *musb)$/;"	f	typeref:typename:int	file:
dsps_musb_init	drivers/usb/musb-new/musb_dsps.c	/^static int dsps_musb_init(struct musb *musb)$/;"	f	typeref:typename:int	file:
dsps_musb_try_idle	drivers/usb/musb-new/musb_dsps.c	/^static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)$/;"	f	typeref:typename:void	file:
dsps_musb_wrapper	drivers/usb/musb-new/musb_dsps.c	/^struct dsps_musb_wrapper {$/;"	s	file:
dsps_ops	drivers/usb/musb-new/musb_dsps.c	/^static struct musb_platform_ops dsps_ops = {$/;"	v	typeref:struct:musb_platform_ops	file:
dsps_probe	drivers/usb/musb-new/musb_dsps.c	/^static int __devinit dsps_probe(struct platform_device *pdev)$/;"	f	typeref:typename:int __devinit	file:
dsps_readb	drivers/usb/musb-new/musb_dsps.c	/^static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)$/;"	f	typeref:typename:u8	file:
dsps_readl	drivers/usb/musb-new/musb_dsps.c	/^static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)$/;"	f	typeref:typename:u32	file:
dsps_remove	drivers/usb/musb-new/musb_dsps.c	/^static int __devexit dsps_remove(struct platform_device *pdev)$/;"	f	typeref:typename:int __devexit	file:
dsps_resume	drivers/usb/musb-new/musb_dsps.c	/^static int dsps_resume(struct device *dev)$/;"	f	typeref:typename:int	file:
dsps_suspend	drivers/usb/musb-new/musb_dsps.c	/^static int dsps_suspend(struct device *dev)$/;"	f	typeref:typename:int	file:
dsps_usbss_driver	drivers/usb/musb-new/musb_dsps.c	/^static struct platform_driver dsps_usbss_driver = {$/;"	v	typeref:struct:platform_driver	file:
dsps_writeb	drivers/usb/musb-new/musb_dsps.c	/^static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)$/;"	f	typeref:typename:void	file:
dsps_writel	drivers/usb/musb-new/musb_dsps.c	/^static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)$/;"	f	typeref:typename:void	file:
dspwake	board/Barix/ipam390/ipam390.c	/^static void dspwake(void)$/;"	f	typeref:typename:void	file:
dspwake	board/davinci/da8xxevm/da850evm.c	/^static void dspwake(void)$/;"	f	typeref:typename:void	file:
dspwake	board/davinci/da8xxevm/omapl138_lcdk.c	/^static void dspwake(void)$/;"	f	typeref:typename:void	file:
dsr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 dsr;		\/* 0x1C Data Size *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
dsr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	dsr;		\/* DMA destination stride register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
dsr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	dsr;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u16
dsr	arch/sh/include/asm/ptrace.h	/^	unsigned long	dsr;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
dsr	drivers/block/sata_dwc.c	/^	struct dmareg dsr;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
dsr	drivers/rtc/imxdi.c	/^	u32 dsr;			\/* Status Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dsr	drivers/rtc/mpc5xxx.c	/^	volatile ulong	dsr;	\/* MBAR+0x804: data set register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
dsr	include/mmc.h	/^	uint dsr;$/;"	m	struct:mmc	typeref:typename:uint
dsr	include/mpc5xxx.h	/^	volatile u8  dsr[0x10];         \/* 0x08 *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u8[0x10]
dsr_imp	include/mmc.h	/^	uint dsr_imp;$/;"	m	struct:mmc	typeref:typename:uint
dsrbcr	arch/m68k/include/asm/immap_5275.h	/^	u32 dsrbcr;$/;"	m	struct:dma_ctrl	typeref:typename:u32
dsref_cyc	arch/arm/mach-exynos/clock_init.h	/^	unsigned dsref_cyc;$/;"	m	struct:mem_timings	typeref:typename:unsigned
dss	arch/arm/dts/am4372.dtsi	/^		dss: dss@4832a000 {$/;"	l
dss	arch/arm/dts/dra7.dtsi	/^		dss: dss@58000000 {$/;"	l
dss_32khz_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_32khz_clk: dss_32khz_clk {$/;"	l
dss_48mhz_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_48mhz_clk: dss_48mhz_clk {$/;"	l
dss_deshdcp_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_deshdcp_clk: dss_deshdcp_clk {$/;"	l
dss_dss_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_dss_clk: dss_dss_clk {$/;"	l
dss_hdmi_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_hdmi_clk: dss_hdmi_clk {$/;"	l
dss_pins	arch/arm/dts/am437x-gp-evm.dts	/^	dss_pins: dss_pins {$/;"	l
dss_pins	arch/arm/dts/am437x-sk-evm.dts	/^	dss_pins: dss_pins {$/;"	l
dss_pins	arch/arm/dts/am43x-epos-evm.dts	/^		dss_pins: dss_pins {$/;"	l
dss_regs	arch/arm/include/asm/arch-omap3/dss.h	/^struct dss_regs {$/;"	s
dss_video1_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_video1_clk: dss_video1_clk {$/;"	l
dss_video2_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	dss_video2_clk: dss_video2_clk {$/;"	l
dst	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 dst;$/;"	m	struct:edma3_slot_config	typeref:typename:u32
dst	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 dst;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
dst_addr	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 dst_addr;		\/* 0x08 Destination address *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
dst_addr	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 dst_addr;		\/* 0x08 Destination address *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
dst_addr	drivers/ddr/marvell/axp/xor.h	/^	u32 dst_addr;		\/* Destination Block address pointer (not used in CRC32 *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
dst_addr	include/fsl_validate.h	/^	u32 dst_addr;$/;"	m	struct:fsl_secboot_sg_table	typeref:typename:u32
dst_bidx	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int dst_bidx;$/;"	m	struct:edma3_slot_config	typeref:typename:int
dst_cidx	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int dst_cidx;$/;"	m	struct:edma3_slot_config	typeref:typename:int
dsta0	include/tsi148.h	/^	unsigned int dsta0;                   \/* 0x504         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dsta1	include/tsi148.h	/^	unsigned int dsta1;                   \/* 0x584         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
dstaddr	tools/kwbimage.c	/^		unsigned int dstaddr;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
dstart	drivers/demo/demo-shape.c	/^		int dstart;$/;"	m	struct:shape_hello::shape	typeref:typename:int	file:
dstat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	dstat;$/;"	m	struct:s3c24x0_dma	typeref:typename:u32
dstat	drivers/block/sata_dwc.c	/^	struct dmareg dstat;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
dstatar	drivers/block/sata_dwc.c	/^	struct dmareg dstatar;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
dsts	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 dsts; \/* Device Status *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
dsttran	drivers/block/sata_dwc.c	/^	struct dmareg dsttran;$/;"	m	struct:dma_interrupt_regs	typeref:struct:dmareg	file:
dsut	drivers/i2c/i2c-uniphier-f.c	/^	u32 dsut;			\/* data setup time control *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
dsz	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 dsz;		\/* 0x1C Data Size *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
dt0_mode	include/ddr_spd.h	/^	unsigned char dt0_mode;    \/* 49 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt0dldiff0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0dldiff0;	\/* offset 0x138 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0dldiff0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0dldiff0;	\/* offset 0x138 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0dqoffset	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0dqoffset;	\/* offset 0x11C *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0dqoffset	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0dqoffset;	\/* offset 0x11C *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0fwsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0fwsratio0;	\/* offset 0x108 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0fwsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0fwsratio0;	\/* offset 0x108 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0fwsratio0	board/siemens/draco/board.h	/^	unsigned short int dt0fwsratio0;	\/* 0x009F *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned short int
dt0gimode0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0gimode0;	\/* offset 0x104 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0gimode0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0gimode0;	\/* offset 0x104 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0giratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0giratio0;	\/* offset 0x0FC *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0giratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0giratio0;	\/* offset 0x0FC *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0ioctl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
dt0ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0ioctl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
dt0rdelays0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0rdelays0;	\/* offset 0x134 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0rdelays0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0rdelays0;	\/* offset 0x134 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0rdsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0rdsratio0;	\/* offset 0x0C8 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0rdsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0rdsratio0;	\/* offset 0x0C8 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0rdsratio0	board/siemens/draco/board.h	/^	unsigned short int dt0rdsratio0;	\/* 0x003A *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned short int
dt0wdsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wdsratio0;	\/* offset 0x0DC *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0wdsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wdsratio0;	\/* offset 0x0DC *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0wdsratio0	board/siemens/draco/board.h	/^	unsigned short int dt0wdsratio0;	\/* 0x003F *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned short int
dt0wimode0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wimode0;	\/* offset 0x0F8 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0wimode0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wimode0;	\/* offset 0x0F8 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0wiratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wiratio0;	\/* offset 0x0F0 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0wiratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wiratio0;	\/* offset 0x0F0 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0wrsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wrsratio0;	\/* offset 0x120 *\/$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
dt0wrsratio0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt0wrsratio0;	\/* offset 0x120 *\/$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
dt0wrsratio0	board/siemens/draco/board.h	/^	unsigned short int dt0wrsratio0;	\/* 0x0079 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned short int
dt1ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt1ioctl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
dt1ioctl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt1ioctl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
dt2ioctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt2ioctrl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
dt2ioctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt2ioctrl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
dt2n_dt2q	include/ddr_spd.h	/^	unsigned char dt2n_dt2q;   \/* 50 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt2p	include/ddr_spd.h	/^	unsigned char dt2p;        \/* 51 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt3ioctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt3ioctrl;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
dt3ioctrl	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int dt3ioctrl;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
dt3n	include/ddr_spd.h	/^	unsigned char dt3n;        \/* 52 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt3pfast	include/ddr_spd.h	/^	unsigned char dt3pfast;    \/* 53 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt3pslow	include/ddr_spd.h	/^	unsigned char dt3pslow;    \/* 54 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt4r_dt4r4w	include/ddr_spd.h	/^	unsigned char dt4r_dt4r4w; \/* 55 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt5b	include/ddr_spd.h	/^	unsigned char dt5b;        \/* 56 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dt7	include/ddr_spd.h	/^	unsigned char dt7;         \/* 57 DRAM Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dta1	include/ns87308.h	/^  unsigned char dta1;  \/* 0 data port 1 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
dta2	include/ns87308.h	/^  unsigned char dta2;  \/* 4 data port 2 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
dtalias	board/gateworks/gw_ventana/ventana_eeprom.h	/^	const char *dtalias;	\/* name of dt node to remove if not set *\/$/;"	m	struct:ventana_eeprom_config	typeref:typename:const char *
dtaps_per_ptap	drivers/ddr/altera/sequencer.h	/^	u32 dtaps_per_ptap;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
dtar	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtar;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dtar	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dtar;		\/* 0xa4 data training address register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dtar	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtar;		\/* 0x54 data training address register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dtar[4];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
dtar	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dtar[4];		\/* 0xb4 data training address register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
dtar	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dtar;		\/* 0xa4 data training address register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dtar	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtar;		\/* 0x54 data training address register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dtar[4];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
dtar	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dtar[4];		\/* 0xb4 data training address register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
dtar	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dtar;		\/* Data Training Address *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
dtar0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtar0;		\/* 0x6c data training address register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtar0;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtar0;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtar0;		\/* 0x6c data training address register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtar0;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtar0;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtar1;		\/* 0x70 data training address register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtar1;		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtar1;		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtar1;		\/* 0x70 data training address register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtar1;		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtar1;		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtar2;		\/* 0x74 data training address register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtar2;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtar2;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtar2;		\/* 0x74 data training address register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtar2;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtar2;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtar3;		\/* 0x78 data training address register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtar3;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtar3;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtar3;		\/* 0x78 data training address register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtar3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtar3;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtar3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtar3;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtb_high	drivers/block/sata_mv.c	/^	u32 dtb_high;		\/* DW1 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
dtb_low	drivers/block/sata_mv.c	/^	u32 dtb_low;		\/* DW0 *\/$/;"	m	struct:crqb	typeref:typename:u32	file:
dtbc	include/tsi148.h	/^	unsigned int dtbc;   \/* Transfer Byte Count *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dtbc	include/universe.h	/^	unsigned int dtbc;   \/* Transfer Byte Count *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dtbc	include/universe.h	/^	unsigned int dtbc;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
dtbmacaddr	board/BuR/common/common.c	/^static const char *dtbmacaddr(u32 ifno)$/;"	f	typeref:typename:const char *	file:
dtbmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtbmr;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtbmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtbmr;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtbmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dtbmr;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtbmr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtbmr;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtbmr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtbmr;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtbmr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dtbmr;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtbs	Makefile	/^dtbs: dts\/dt.dtb$/;"	t
dtbs	arch/arc/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/arm/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/microblaze/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/mips/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/nios2/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/powerpc/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/sandbox/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/x86/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	arch/xtensa/dts/Makefile	/^dtbs: $(addprefix $(obj)\/, $(dtb-y))$/;"	t
dtbs	dts/Makefile	/^dtbs: $(obj)\/dt.dtb$/;"	t
dtc	test/py/tests/test_vboot.py	/^    def dtc(dts):$/;"	f	function:test_vboot	file:
dtc	tools/imagetool.h	/^	char *dtc;$/;"	m	struct:image_tool_params	typeref:typename:char *
dtclr	drivers/rtc/imxdi.c	/^	u32 dtclr;			\/* Time Counter LSB Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dtcmr	drivers/rtc/imxdi.c	/^	u32 dtcmr;			\/* Time Counter MSB Reg *\/$/;"	m	struct:imxdi_regs	typeref:typename:u32	file:
dtcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtcr;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtcr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtcr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dtcr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dtcr;		\/* 0xb0 data training configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtcr;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtcr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtcr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dtcr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dtcr;		\/* 0xb0 data training configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtcr	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int dtcr;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
dtcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 dtcr;$/;"	m	struct:ios512x	typeref:typename:u32
dtcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 dtcr;$/;"	m	struct:ios83xx	typeref:typename:u32
dtd	drivers/clk/rockchip/clk_rk3288.c	/^	struct dtd_rockchip_rk3288_cru dtd;$/;"	m	struct:rk3288_clk_plat	typeref:struct:dtd_rockchip_rk3288_cru	file:
dtd0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtd0;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtd0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtd0;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtd1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtd1;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtd1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtd1;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtd_count	drivers/usb/gadget/ci_udc.h	/^	uint32_t dtd_count;$/;"	m	struct:ci_req	typeref:typename:uint32_t
dtd_count	include/edid.h	/^	unsigned char dtd_count;$/;"	m	struct:edid_cea861_info	typeref:typename:unsigned char
dtd_offset	include/edid.h	/^	unsigned char dtd_offset;$/;"	m	struct:edid_cea861_info	typeref:typename:unsigned char
dtdr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtdr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
dtdr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dtdr[2];		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dtdr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dtdr[2];		\/* 0xc4 data training data register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
dtdr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dtdr[2];		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dtdr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dtdr[2];		\/* 0xc4 data training data register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
dtdr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtdr0;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtdr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtdr0;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtdr0;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtdr0;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtdr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtdr0;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtdr0;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtdr1;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtdr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtdr1;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtdr1;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtdr1;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtdr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtdr1;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtdr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtdr1;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dte	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 dte;$/;"	m	struct:at91_emac	typeref:typename:u32
dtedr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dtedr[2];		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dtedr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dtedr[2];		\/* 0xcc data training eye data register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
dtedr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dtedr[2];		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dtedr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dtedr[2];		\/* 0xcc data training eye data register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
dtedr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtedr0;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtedr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtedr0;		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtedr0;		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtedr0;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtedr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtedr0;		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtedr0;		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtedr1;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtedr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtedr1;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtedr1;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtedr1;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtedr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtedr1;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtedr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtedr1;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dter	include/usb_cdc_acm.h	/^		unsigned long dter;$/;"	m	struct:rs232_emu	typeref:typename:unsigned long
dtime	include/ext_common.h	/^	__le32 dtime;$/;"	m	struct:ext2_inode	typeref:typename:__le32
dtimer_ctrl	arch/m68k/include/asm/timer.h	/^typedef struct dtimer_ctrl {$/;"	s
dtimer_interrupt	arch/m68k/cpu/mcf547x_8x/slicetimer.c	/^void dtimer_interrupt(void *not_used)$/;"	f	typeref:typename:void
dtimer_interrupt	arch/m68k/lib/time.c	/^void dtimer_interrupt(void *not_used)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf5227x/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf523x/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf52x2/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf530x/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf532x/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf5445x/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtimer_intr_setup	arch/m68k/cpu/mcf547x_8x/interrupts.c	/^void dtimer_intr_setup(void)$/;"	f	typeref:typename:void
dtmr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dtmr[2];		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dtmr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dtmr[2];		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
dtmr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtmr0;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtmr0;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtmr0;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtmr0;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dtmr1;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dtmr1;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dtmr1;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dtmr1;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtmr_t	arch/m68k/include/asm/timer.h	/^} dtmr_t;$/;"	t	typeref:struct:dtimer_ctrl
dtor	include/atmel_mci.h	/^	u32	dtor;	\/* 0x08 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
dtplat	drivers/mmc/rockchip_dw_mmc.c	/^	struct dtd_rockchip_rk3288_dw_mshc dtplat;$/;"	m	struct:rockchip_mmc_plat	typeref:struct:dtd_rockchip_rk3288_dw_mshc	file:
dtplat	drivers/serial/serial_rockchip.c	/^	struct dtd_rockchip_rk3288_uart dtplat;$/;"	m	struct:rockchip_uart_platdata	typeref:struct:dtd_rockchip_rk3288_uart	file:
dtplat	drivers/serial/serial_rockchip.c	/^struct dtd_rockchip_rk3288_uart *dtplat, s_dtplat;$/;"	v	typeref:struct:dtd_rockchip_rk3288_uart *
dtpllactive	include/ddr_spd.h	/^	unsigned char dtpllactive; \/* 60 PLL Case Temperature Rise from Ambient$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dtpr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtpr[3];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[3]
dtpr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dtpr[4];		\/* 0x8c DRAM timing parameters register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
dtpr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dtpr[4];		\/* 0x8c DRAM timing parameters register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
dtpr0	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 dtpr0;$/;"	m	struct:rk3288_sdram_phy_timing	typeref:typename:u32
dtpr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtpr0;		\/* 0x34 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtpr0;		\/* 0x48 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtpr0;		\/* 0x34 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtpr0;		\/* 0x48 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr0	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int dtpr0;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
dtpr1	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 dtpr1;$/;"	m	struct:rk3288_sdram_phy_timing	typeref:typename:u32
dtpr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtpr1;		\/* 0x38 dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtpr1;		\/* 0x4c dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtpr1;		\/* 0x38 dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtpr1;		\/* 0x4c dram timing parameters register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int dtpr1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
dtpr2	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 dtpr2;$/;"	m	struct:rk3288_sdram_phy_timing	typeref:typename:u32
dtpr2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtpr2;		\/* 0x3c dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dtpr2;		\/* 0x50 dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtpr2;		\/* 0x3c dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dtpr2;		\/* 0x50 dram timing parameters register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dtpr2	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int dtpr2;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
dtr	include/faraday/ftsdc010.h	/^	unsigned int	dtr;		\/* 0x20 - data timer reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
dtr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	dtr[2];		\/* Data Training *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[2]
dtr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dtr0;		\/* 0x9c data training register 0 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dtr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dtr0;		\/* 0x9c data training register 0 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dtr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 dtr1;		\/* 0xa0 data training register 1 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dtr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 dtr1;		\/* 0xa0 data training register 1 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
dtrd0	drivers/block/ftide020.h	/^	unsigned int	dtrd0;		\/* 0x14 - Data Timing Reg Device 0 *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
dtrd1	drivers/block/ftide020.h	/^	unsigned int	dtrd1;		\/* 0x1c - Data Timing Reg Device 1 *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
dtregact	include/ddr_spd.h	/^	unsigned char dtregact;    \/* 61 Register Case Temperature Rise from$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
dtrm	drivers/i2c/i2c-uniphier.c	/^	u32 dtrm;			\/* data transmission *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
dtrx	drivers/i2c/i2c-uniphier-f.c	/^#define dtrx	/;"	d	file:
dts/dt.dtb	Makefile	/^dts\/dt.dtb: checkdtc u-boot$/;"	t
dtsec	include/fsl_dtsec.h	/^struct dtsec {$/;"	s
dtsec_configure_serdes	drivers/net/fm/eth.c	/^static void dtsec_configure_serdes(struct fm_eth *priv)$/;"	f	typeref:typename:void	file:
dtsec_disable_mac	drivers/net/fm/dtsec.c	/^static void dtsec_disable_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
dtsec_enable_mac	drivers/net/fm/dtsec.c	/^static void dtsec_enable_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
dtsec_init_mac	drivers/net/fm/dtsec.c	/^static void dtsec_init_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
dtsec_init_phy	drivers/net/fm/eth.c	/^static void dtsec_init_phy(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dtsec_set_interface_mode	drivers/net/fm/dtsec.c	/^static void dtsec_set_interface_mode(struct fsl_enet_mac *mac,$/;"	f	typeref:typename:void	file:
dtsec_set_mac_addr	drivers/net/fm/dtsec.c	/^static void dtsec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)$/;"	f	typeref:typename:void	file:
dtt_cfg_t	drivers/hwmon/adm1021.c	/^dtt_cfg_t;$/;"	t	typeref:struct:__anon6adf13920108	file:
dtt_get_temp	drivers/hwmon/adm1021.c	/^dtt_get_temp (int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/adt7460.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/ds1621.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/ds1775.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/ds620.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/lm63.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/lm73.c	/^int dtt_get_temp(int const sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/lm75.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_get_temp	drivers/hwmon/lm81.c	/^int dtt_get_temp(int sensor)$/;"	f	typeref:typename:int
dtt_i2c	cmd/dtt.c	/^int dtt_i2c(void)$/;"	f	typeref:typename:int
dtt_init	cmd/dtt.c	/^void dtt_init(void)$/;"	f	typeref:typename:void
dtt_init_one	drivers/hwmon/adm1021.c	/^dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/adt7460.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/ds1621.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/ds1775.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/ds620.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/lm63.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/lm73.c	/^int dtt_init_one(int const sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/lm75.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_init_one	drivers/hwmon/lm81.c	/^int dtt_init_one(int sensor)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/adm1021.c	/^dtt_read (int sensor, int reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/adt7460.c	/^int dtt_read(int sensor, int reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/ds1621.c	/^int dtt_read(int sensor, int reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/ds1775.c	/^int dtt_read(int sensor, int reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/lm63.c	/^int dtt_read(int sensor, int reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/lm73.c	/^int dtt_read(int const sensor, int const reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/lm75.c	/^int dtt_read(int sensor, int reg)$/;"	f	typeref:typename:int
dtt_read	drivers/hwmon/lm81.c	/^int dtt_read(int sensor, int reg)$/;"	f	typeref:typename:int
dtt_tmu	cmd/dtt.c	/^int dtt_tmu(void)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/adm1021.c	/^dtt_write (int sensor, int reg, int val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/adt7460.c	/^int dtt_write(int sensor, int reg, int val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/ds1621.c	/^int dtt_write(int sensor, int reg, int val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/ds1775.c	/^int dtt_write(int sensor, int reg, int val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/lm63.c	/^int dtt_write(int sensor, int reg, int val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/lm73.c	/^int dtt_write(int const sensor, int const reg, int const val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/lm75.c	/^int dtt_write(int sensor, int reg, int val)$/;"	f	typeref:typename:int
dtt_write	drivers/hwmon/lm81.c	/^int dtt_write(int sensor, int reg, int val)$/;"	f	typeref:typename:int
dttcfg	drivers/hwmon/adm1021.c	/^dtt_cfg_t dttcfg[] = CONFIG_SYS_DTT_ADM1021;$/;"	v	typeref:typename:dtt_cfg_t[]
dttx	drivers/i2c/i2c-uniphier-f.c	/^	u32 dttx;			\/* send FIFO (write-only) *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
dtuawdt	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuawdt;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuawdt	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuawdt;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuawdt	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuawdt;		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuawdt	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuawdt;		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtucfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtucfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtucfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtucfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtucfg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtucfg;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtucfg	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtucfg;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtueaf	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtueaf;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtueaf	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtueaf;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtueaf	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtueaf;		\/* 0x23c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtueaf	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtueaf;		\/* 0x23c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuectl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuectl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuectl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuectl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuectl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuectl;		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuectl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuectl;		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtulfsrrd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtulfsrrd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtulfsrrd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtulfsrrd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtulfsrrd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtulfsrrd;		\/* 0x238 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtulfsrrd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtulfsrrd;		\/* 0x238 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtulfsrwd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtulfsrwd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtulfsrwd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtulfsrwd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtulfsrwd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtulfsrwd;		\/* 0x234 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtulfsrwd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtulfsrwd;		\/* 0x234 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuna	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuna;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuna	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuna;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuna	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuna;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuna	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuna;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtune	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtune;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtune	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtune;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtune	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtune;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtune	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtune;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtupdes	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtupdes;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtupdes	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtupdes;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuprd0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuprd0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuprd0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuprd0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuprd0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuprd0;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuprd0;		\/* 0xa0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuprd1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuprd1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuprd1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuprd1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuprd1;		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuprd1;		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuprd2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuprd2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuprd2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuprd2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuprd2;		\/* 0xa8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuprd2;		\/* 0xa8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuprd3;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuprd3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuprd3;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuprd3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuprd3;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuprd3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuprd3;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturactl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dturactl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dturactl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dturactl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dturactl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dturactl;		\/* 0x204 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturactl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dturactl;		\/* 0x204 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dturd0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dturd0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dturd0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dturd0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dturd0;		\/* 0x224 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dturd0;		\/* 0x224 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dturd1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dturd1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dturd1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dturd1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dturd1;		\/* 0x228 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dturd1;		\/* 0x228 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dturd2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dturd2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dturd2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dturd2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dturd2;		\/* 0x22c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dturd2;		\/* 0x22c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dturd3;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dturd3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dturd3;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dturd3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dturd3;		\/* 0x230 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dturd3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dturd3;		\/* 0x230 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtustat	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtustat;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtustat	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtustat;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwactl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuwactl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuwactl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuwactl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuwactl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuwactl;		\/* 0x200 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwactl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuwactl;		\/* 0x200 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuwd0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuwd0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuwd0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuwd0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuwd0;		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuwd0;		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuwd1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuwd1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuwd1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuwd1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuwd1;		\/* 0x214 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuwd1;		\/* 0x214 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuwd2;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuwd2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuwd2;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuwd2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuwd2;		\/* 0x218 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuwd2;		\/* 0x218 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuwd3;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuwd3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuwd3;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuwd3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuwd3;		\/* 0x21c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwd3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuwd3;		\/* 0x21c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwdm	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dtuwdm;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
dtuwdm	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 dtuwdm;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
dtuwdm	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dtuwdm;		\/* 0x220 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dtuwdm	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dtuwdm;		\/* 0x220 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dty0	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty0;		\/* 0x1C Channel 0 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty1	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty1;		\/* 0x1D Channel 1 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty2	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty2;		\/* 0x1E Channel 2 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty3	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty3;		\/* 0x1F Channel 3 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty4	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty4;		\/* 0x20 Channel 4 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty5	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty5;		\/* 0x21 Channel 5 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty6	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty6;		\/* 0x22 Channel 6 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty7	arch/m68k/include/asm/immap_5301x.h	/^	u8 dty7;		\/* 0x23 Channel 7 Duty *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
dty_tx	drivers/net/ethoc.c	/^	u32 dty_tx;$/;"	m	struct:ethoc	typeref:typename:u32	file:
dtype	include/mtd/ubi-user.h	/^	__s8  dtype; \/* obsolete, do not use! *\/$/;"	m	struct:ubi_leb_change_req	typeref:typename:__s8
dtype	include/mtd/ubi-user.h	/^	__s8  dtype; \/* obsolete, do not use! *\/$/;"	m	struct:ubi_map_req	typeref:typename:__s8
du0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 du0;$/;"	m	struct:rcar_mxi_qos	typeref:typename:u32
du1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 du1;$/;"	m	struct:rcar_mxi_qos	typeref:typename:u32
dual_0D	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_0D[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_0S	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_0S[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_D0	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_D0[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_DD	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_DD[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_DS	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_DS[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_S0	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_S0[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_SD	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_SD[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_SS	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt dual_SS[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
dual_flash	include/spi_flash.h	/^	u8 dual_flash;$/;"	m	struct:spi_flash	typeref:typename:u8
dual_lcd_enabled	drivers/video/exynos/exynos_fb.c	/^	unsigned int dual_lcd_enabled;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
dual_lcd_enabled	include/exynos_lcd.h	/^	unsigned int dual_lcd_enabled;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
dual_rank	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^	u8 dual_rank;$/;"	m	struct:dram_para	typeref:typename:u8	file:
dualrgb	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int dualrgb;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
duart	arch/powerpc/include/asm/immap_83xx.h	/^	duart83xx_t		duart[2];	\/* DUART *\/$/;"	m	struct:immap	typeref:typename:duart83xx_t[2]
duart0	arch/arm/dts/fsl-ls1012a.dtsi	/^		duart0: serial@21c0500 {$/;"	l
duart0	arch/arm/dts/fsl-ls1043a.dtsi	/^		duart0: serial@21c0500 {$/;"	l
duart0	arch/arm/dts/fsl-ls1046a.dtsi	/^		duart0: serial@21c0500 {$/;"	l
duart1	arch/arm/dts/fsl-ls1012a.dtsi	/^		duart1: serial@21c0600 {$/;"	l
duart1	arch/arm/dts/fsl-ls1043a.dtsi	/^		duart1: serial@21c0600 {$/;"	l
duart1	arch/arm/dts/fsl-ls1046a.dtsi	/^		duart1: serial@21c0600 {$/;"	l
duart1	arch/powerpc/include/asm/immap_83xx.h	/^	duart83xx_t		duart1[2];	\/* DUART *\/$/;"	m	struct:immap	typeref:typename:duart83xx_t[2]
duart2	arch/arm/dts/fsl-ls1043a.dtsi	/^		duart2: serial@21d0500 {$/;"	l
duart2	arch/arm/dts/fsl-ls1046a.dtsi	/^		duart2: serial@21d0500 {$/;"	l
duart3	arch/arm/dts/fsl-ls1043a.dtsi	/^		duart3: serial@21d0600 {$/;"	l
duart3	arch/arm/dts/fsl-ls1046a.dtsi	/^		duart3: serial@21d0600 {$/;"	l
duart83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct duart83xx {$/;"	s
duart83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} duart83xx_t;$/;"	t	typeref:struct:duart83xx
ducaticlkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ducaticlkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
ducaticlkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ducaticlkstctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
dum	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 dum;$/;"	m	struct:de_bld::__anon5efd7b530108	typeref:typename:u32
dum	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 dum;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
dum	arch/arm/include/asm/arch/display2.h	/^		u32 dum;$/;"	m	struct:de_bld::__anon279c75ef0108	typeref:typename:u32
dum	arch/arm/include/asm/arch/display2.h	/^		u32 dum;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
dum0	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum0[15];			\/* (end of clear offset) *\/$/;"	m	struct:de_bld	typeref:typename:u32[15]
dum0	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum0[3];$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32[3]
dum0	arch/arm/include/asm/arch/display2.h	/^	u32 dum0[15];			\/* (end of clear offset) *\/$/;"	m	struct:de_bld	typeref:typename:u32[15]
dum0	arch/arm/include/asm/arch/display2.h	/^	u32 dum0[3];$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32[3]
dum1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum1[3];$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32[3]
dum1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum1[4];$/;"	m	struct:de_bld	typeref:typename:u32[4]
dum1	arch/arm/include/asm/arch/display2.h	/^	u32 dum1[3];$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32[3]
dum1	arch/arm/include/asm/arch/display2.h	/^	u32 dum1[4];$/;"	m	struct:de_bld	typeref:typename:u32[4]
dum2	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum2[2];$/;"	m	struct:de_bld	typeref:typename:u32[2]
dum2	arch/arm/include/asm/arch/display2.h	/^	u32 dum2[2];$/;"	m	struct:de_bld	typeref:typename:u32[2]
dum3	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum3[4];$/;"	m	struct:de_bld	typeref:typename:u32[4]
dum3	arch/arm/include/asm/arch/display2.h	/^	u32 dum3[4];$/;"	m	struct:de_bld	typeref:typename:u32[4]
dum4	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 dum4[3];$/;"	m	struct:de_bld	typeref:typename:u32[3]
dum4	arch/arm/include/asm/arch/display2.h	/^	u32 dum4[3];$/;"	m	struct:de_bld	typeref:typename:u32[3]
dummy	arch/arm/dts/sun4i-a10.dtsi	/^		dummy: dummy {$/;"	l
dummy	arch/arm/dts/sun5i.dtsi	/^		dummy: dummy {$/;"	l
dummy	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 dummy;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
dummy	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy[9];$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32[9]
dummy	arch/openrisc/include/asm/ptrace.h	/^	long dummy;		\/* Cheap alignment fix *\/$/;"	m	struct:pt_regs	typeref:typename:long
dummy	arch/sparc/cpu/leon3/usb_uhci.c	/^int dummy(void)$/;"	f	typeref:typename:int
dummy	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u8 dummy;$/;"	m	struct:memory_config	typeref:typename:u8
dummy	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	dummy[240];		\/* Offset 0x0010 *\/$/;"	m	struct:upd_region	typeref:typename:u8[240]
dummy	arch/x86/include/asm/video/edid.h	/^	unsigned char dummy[128];$/;"	m	struct:edid_info	typeref:typename:unsigned char[128]
dummy	arch/x86/lib/efi/crt0-efi-ia32.S	/^dummy:	.long	0$/;"	l
dummy	arch/x86/lib/efi/crt0-efi-x86_64.S	/^dummy:	.long	0$/;"	l
dummy	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 dummy;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
dummy	common/exports.c	/^__attribute__((unused)) static void dummy(void)$/;"	f	typeref:typename:void	file:
dummy	examples/standalone/stubs.c	/^void __attribute__((unused)) dummy(void)$/;"	f	typeref:typename:void	file:
dummy	include/logbuff.h	/^			unsigned long	dummy;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30408	typeref:typename:unsigned long
dummy	include/mpc5xxx.h	/^	volatile u32	dummy[32];$/;"	m	struct:mpc5xxx_sdram	typeref:typename:volatile u32[32]
dummy	include/u-boot/zlib.h	/^	struct internal_state {int dummy;}; \/* hack for buggy compilers *\/$/;"	m	struct:internal_state	typeref:typename:int
dummy	lib/zlib/deflate.c	/^struct static_tree_desc_s {int dummy;}; \/* for buggy compilers *\/$/;"	m	struct:static_tree_desc_s	typeref:typename:int	file:
dummy	lib/zlib/zutil.c	/^struct internal_state      {int dummy;}; \/* for buggy compilers *\/$/;"	m	struct:internal_state	typeref:typename:int	file:
dummy0	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	dummy0[2];$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg[2]
dummy0	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy0;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy0[5];$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32[5]
dummy0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u16 dummy0;		\/* 0x02 *\/$/;"	m	struct:r8a7740_rwdt	typeref:typename:u16
dummy0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy0; \/* 0x0c *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy0; \/* 0x1c *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy0; \/* 0x20 *\/$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy0;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy0[50]; \/* 0x20 .. 0xe4 *\/$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32[50]
dummy0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy0;	\/* 0x24 *\/$/;"	m	struct:rcar_dbsc3_qos	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy0[3];	\/* 0x00 .. 0x08 *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy0[4];	\/* 0x20 .. 0x2C *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[4]
dummy0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy0[7];	\/* 0x08 .. 0x20 *\/$/;"	m	struct:rcar_mxi	typeref:typename:u32[7]
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u16 dummy0;	\/* 0x02 *\/$/;"	m	struct:sh73a0_rwdt	typeref:typename:u16
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy0; \/* 0x0C *\/$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy0; \/* 0x20 *\/$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy0; \/* 0x34 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy0; \/* 0xA4 *\/$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy0[2]; \/* 0x00, 0x04 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32[2]
dummy0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy0[6];$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32[6]
dummy0	drivers/spi/sh_qspi.c	/^	unsigned char dummy0;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
dummy1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	dummy1[219];$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg[219]
dummy1	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy1;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy1[4];$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32[4]
dummy1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u16 dummy1;		\/* 0x06 *\/$/;"	m	struct:r8a7740_rwdt	typeref:typename:u16
dummy1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy1; \/* 0x20 *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy1; \/* 0x34 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy1[2]; \/* 0x28 .. 0x2c *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[2]
dummy1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy1[2]; \/* 0xf0 .. 0xf4 *\/$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32[2]
dummy1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy1[2];	\/* 0x20 .. 0x24 *\/$/;"	m	struct:rcar_s3c	typeref:typename:u32[2]
dummy1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy1[2];	\/* 0x28 .. 0x2C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[2]
dummy1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy1[2];	\/* 0x2C .. 0x30 *\/$/;"	m	struct:rcar_mxi	typeref:typename:u32[2]
dummy1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy1[9];	\/* 0x5C .. 0x7C *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[9]
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u16 dummy1;	\/* 0x06 *\/$/;"	m	struct:sh73a0_rwdt	typeref:typename:u16
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy1; \/* 0x14 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy1; \/* 0x2C *\/$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy1; \/* 0x2C *\/$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy1; \/* 0x44 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy1; \/* 0xAC *\/$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
dummy1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy1[4]; \/* 0x30 .. 0x3C *\/$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32[4]
dummy1	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy1;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy1	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy1;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy1	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 dummy1;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
dummy1	drivers/spi/sh_qspi.c	/^	unsigned char dummy1;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
dummy1	include/mpc5xxx.h	/^	volatile u32	dummy1[4];	\/* 0x003c *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32[4]
dummy10	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy10; \/* 0xc0 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy10	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy10[7]; \/* 0x184 .. 0x19C *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[7]
dummy10	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy10[31];	\/* 0x104 .. 0x17C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[31]
dummy10	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy10[14]; \/* 0xB8 .. 0xEC *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32[14]
dummy10	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy10[2]; \/* 0x128 .. 0x12c *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32[2]
dummy10	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy10;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy10	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy10;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy11	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy11[39]; \/* 0x1A4 .. 0x23C *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[39]
dummy11	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy11[5]; \/* 0xcc .. 0xdc *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32[5]
dummy11	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy11[47];	\/* 0x184 ..0x23C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[47]
dummy11	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy11; \/* 0xFC *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy11	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy11[2]; \/* 0x148 .. 0x14c *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32[2]
dummy11	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy11;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy12	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy12[10]; \/* 0xe8 .. 0x10c *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32[10]
dummy12	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy12[46]; \/* 0x248 .. 0x2FC *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[46]
dummy12	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy12[14];	\/* 0x248 .. 0x27C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[14]
dummy12	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy12[145]; \/* 0x110 .. 0x350 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32[145]
dummy12	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy12[7]; \/* 0x154 .. 0x16c *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32[7]
dummy12	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy12;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy13	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy13[2]; \/* 0x128 .. 0x12c *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32[2]
dummy13	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy13[3];	\/* 0x284 .. 0x28C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy13	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy13;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy14	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy14[3];	\/* 0x294 .. 0x29C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy14	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy14;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy15	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy15[24];	\/* 0x2A4 .. 0x300 *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[24]
dummy15	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy15;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy16	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy16[30];	\/* 0x308 .. 0x37C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[30]
dummy16	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy16;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy17	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy17[27];	\/* 0x394 .. 0x3FC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[27]
dummy18	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy18[3];		\/* 0x404 .. 0x40C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy19	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy19[4];		\/* 0x420 .. 0x42C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[4]
dummy2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	dummy2[1117];$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg[1117]
dummy2	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy2[2];$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32[2]
dummy2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u16 dummy2;		\/* 0x0A *\/$/;"	m	struct:r8a7740_rwdt	typeref:typename:u16
dummy2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy2; \/* 0x2c *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy2; \/* 0x44 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy2[3]; \/* 0x34 .. 0x3c *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[3]
dummy2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy2;	\/* 0x2C *\/$/;"	m	struct:rcar_s3c	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy2;	\/* 0x3C *\/$/;"	m	struct:rcar_mxi	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy2[3];	\/* 0x34 .. 0x3C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy2[3];	\/* 0xA4 .. 0xAC *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[3]
dummy2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy2; \/* 0x24 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy2; \/* 0x50 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy2; \/* 0x5c *\/$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy2; \/* 0xB4 *\/$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
dummy2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy2[4]; \/* 0x60 - 0x6C *\/$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32[4]
dummy2	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy2;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy2	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy2;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy2	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy2;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy2	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 dummy2;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
dummy20	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy20[22];	\/* 0x438 .. 0x48C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[22]
dummy21	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy21[27];	\/* 0x494 .. 0x4FC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[27]
dummy22	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy22[63];	\/* 0x504 .. 0x5FC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[63]
dummy23	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy23[160];	\/* 0x680 .. 0x8FC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[160]
dummy24	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy24;$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dummy25	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy25[3];		\/* 0x924 .. 0x92C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy26	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy26[3];		\/* 0x944 .. 0x94C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy27	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy27[3];		\/* 0x964 .. 0x96C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy3	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy3[2];$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32[2]
dummy3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy3; \/* 0x4c *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dummy3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy3; \/* 0x50 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy3[5]; \/* 0x40 .. 0x50 *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32[5]
dummy3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy3;	\/* 0x4C *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dummy3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy3[2];	\/* 0xB8 .. 0xBC *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[2]
dummy3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy3; \/* 0xC0 *\/$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
dummy3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy3[2]; \/* 0x38, 0x3C *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32[2]
dummy3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy3[2]; \/* 0x68, 0x6C *\/$/;"	m	struct:sh73a0_bsc	typeref:typename:u32[2]
dummy3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy3[8]; \/* 0xA0 .. 0xBC *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32[8]
dummy3	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy3;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy3	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy3;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy3	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy3;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy4	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 dummy4;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
dummy4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy4[4]; \/* 0x58 .. 0x64 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32[4]
dummy4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy4[5]; \/* 0x5c .. 0x6c *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32[5]
dummy4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy4[7]; \/* 0x94 .. 0xac *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[7]
dummy4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy4[5];	\/* 0xDC .. 0xEC *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[5]
dummy4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy4[7];	\/* 0x94 .. 0xAC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[7]
dummy4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy4; \/* 0x5C *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy4; \/* 0xC4 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy4	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy4;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy4	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy4;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy4	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy4;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy5[3]; \/* 0xb4 .. 0xbc *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[3]
dummy5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy5[5]; \/* 0x6c .. 0x7c *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32[5]
dummy5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy5[7]; \/* 0x74 .. 0x8c *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32[7]
dummy5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy5[3];	\/* 0xB4 .. 0xBC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[3]
dummy5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy5[5];	\/* 0xFC .. 0x10C *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[5]
dummy5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy5; \/* 0xD4 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy5[6]; \/* 0x6C .. 0x80 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32[6]
dummy5	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy5;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy5	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy5;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy5	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy5;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy6	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy6[3]; \/* 0x90 .. 0x98 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32[3]
dummy6	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy6[5]; \/* 0xcc .. 0xdc *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[5]
dummy6	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy6[68]; \/* 0x114 .. 0x220 *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32[68]
dummy6	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy6;	\/* 0xC4 *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dummy6	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy6[5];	\/* 0x11C .. 0x12C *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[5]
dummy6	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy6; \/* 0x88 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy6	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy6; \/* 0xE0 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy6	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy6;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy6	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy6;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy6	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy6;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy7	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy7; \/* 0x22c *\/$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
dummy7	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy7; \/* 0xa4 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy7	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy7; \/* 0xf0 *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dummy7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy7;	\/* 0x13C *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32
dummy7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy7[5];	\/* 0xCC .. 0xDC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[5]
dummy7	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy7; \/* 0x90 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy7	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy7;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy7	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short dummy7;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy7	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy7;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy8	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy8; \/* 0xac *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy8	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy8; \/* 0xfc *\/;$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32
dummy8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy8[14];	\/* 0x148 .. 0x17C *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[14]
dummy8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy8[2];	\/* 0xEC .. 0xF0 *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32[2]
dummy8	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy8; \/* 0x98 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
dummy8	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy8; \/* 0xF4 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dummy8	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy8;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy8	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy8;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy9	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy9; \/* 0xb4 *\/$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
dummy9	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 dummy9[31]; \/* 0x104 .. 0x17C *\/$/;"	m	struct:r8a7740_dbsc	typeref:typename:u32[31]
dummy9	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy9;	\/* 0xFC *\/$/;"	m	struct:rcar_dbsc3	typeref:typename:u32
dummy9	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 dummy9[15]; \/* 0x184 .. 0x1BC *\/$/;"	m	struct:rcar_lbsc	typeref:typename:u32[15]
dummy9	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy9[2]; \/* 0xAC .. 0xB0 *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32[2]
dummy9	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummy9[4]; \/* 0x100 .. 0x10c *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32[4]
dummy9	arch/blackfin/include/asm/gpio.h	/^	unsigned short dummy9;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
dummy9	arch/sparc/include/asm/leon2.h	/^	volatile unsigned int dummy9;$/;"	m	struct:__anonf183ba530108	typeref:typename:volatile unsigned int
dummy_byte	include/spi_flash.h	/^	u8 dummy_byte;$/;"	m	struct:spi_flash	typeref:typename:u8
dummy_callbacks	lib/rbtree.c	/^static const struct rb_augment_callbacks dummy_callbacks = {$/;"	v	typeref:typename:const struct rb_augment_callbacks	file:
dummy_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	dummy_ck: dummy_ck {$/;"	l
dummy_copy	lib/rbtree.c	/^static inline void dummy_copy(struct rb_node *old, struct rb_node *new) {}$/;"	f	typeref:typename:void	file:
dummy_desc	drivers/net/macb.c	/^	struct macb_dma_desc	*dummy_desc;$/;"	m	struct:macb_device	typeref:struct:macb_dma_desc *	file:
dummy_desc_dma	drivers/net/macb.c	/^	unsigned long		dummy_desc_dma;$/;"	m	struct:macb_device	typeref:typename:unsigned long	file:
dummy_func	board/freescale/mpc8541cds/mpc8541cds.c	/^void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { }$/;"	f	typeref:typename:void
dummy_func	board/freescale/mpc8548cds/mpc8548cds.c	/^void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { }$/;"	f	typeref:typename:void
dummy_func	board/freescale/mpc8555cds/mpc8555cds.c	/^void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { }$/;"	f	typeref:typename:void
dummy_handler	net/net.c	/^static void dummy_handler(uchar *pkt, unsigned dport,$/;"	f	typeref:typename:void	file:
dummy_hdr	tools/rksd.c	/^static char dummy_hdr[RK_IMAGE_HEADER_LEN];$/;"	v	typeref:typename:char[]	file:
dummy_hdr	tools/rkspi.c	/^static char dummy_hdr[RK_IMAGE_HEADER_LEN];$/;"	v	typeref:typename:char[]	file:
dummy_pat_ver	board/astro/mcf5373l/astro.h	/^	unsigned char dummy_pat_ver;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
dummy_propagate	lib/rbtree.c	/^static inline void dummy_propagate(struct rb_node *node, struct rb_node *stop) {}$/;"	f	typeref:typename:void	file:
dummy_rotate	lib/rbtree.c	/^static inline void dummy_rotate(struct rb_node *old, struct rb_node *new) {}$/;"	f	typeref:typename:void	file:
dummy_sdt_ver	board/astro/mcf5373l/astro.h	/^	unsigned char dummy_sdt_ver;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
dummy_ts_id	board/astro/mcf5373l/astro.h	/^	unsigned short dummy_ts_id;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned short
dummyi7	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dummyi7; \/* 0xE8 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dump	arch/blackfin/cpu/traps.c	/^void dump(struct pt_regs *fp)$/;"	f	typeref:typename:void
dump	drivers/fpga/altera.c	/^	int			(*dump)(Altera_desc *, const void *, size_t);$/;"	m	struct:altera_fpga	typeref:typename:int (*)(Altera_desc *,const void *,size_t)	file:
dump	include/ec_commands.h	/^		struct dump {$/;"	s	union:ec_response_lightbar::__anon71a6b267030a
dump	include/ec_commands.h	/^		} dump, off, on, init, get_seq, get_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::__anon71a6b2670208
dump	include/ec_commands.h	/^		} dump;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::dump
dump	include/xilinx.h	/^	int (*dump)(xilinx_desc *, const void *, size_t);$/;"	m	struct:xilinx_fpga_op	typeref:typename:int (*)(xilinx_desc *,const void *,size_t)
dump_bfin_trace_buffer	arch/blackfin/cpu/traps.c	/^void dump_bfin_trace_buffer(void)$/;"	f	typeref:typename:void
dump_buf	arch/arm/mach-bcm283x/mbox.c	/^void dump_buf(struct bcm2835_mbox_hdr *buffer)$/;"	f	typeref:typename:void
dump_cdb	drivers/usb/gadget/storage_common.c	/^#    define dump_cdb(/;"	d	file:
dump_cdb	drivers/usb/gadget/storage_common.c	/^#  define dump_cdb(/;"	d	file:
dump_ch	fs/ubifs/debug.c	/^static void dump_ch(const struct ubifs_ch *ch)$/;"	f	typeref:typename:void	file:
dump_cmd	drivers/mmc/gen_atmel_mci.c	/^static void dump_cmd(u32 cmdr, u32 arg, u32 status, const char* msg)$/;"	f	typeref:typename:void	file:
dump_config	drivers/video/tegra124/display.c	/^static void dump_config(int panel_bpp, struct display_timing *timing)$/;"	f	typeref:typename:void	file:
dump_declaration	scripts/kernel-doc	/^sub dump_declaration($$) {$/;"	s
dump_dev	drivers/net/ep93xx_eth.c	/^#define dump_dev(/;"	d	file:
dump_dev	drivers/net/ep93xx_eth.c	/^static void dump_dev(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_dirents	fs/jffs2/jffs2_1pass.c	/^dump_dirents(struct b_lists *pL)$/;"	f	typeref:typename:void	file:
dump_dirents	fs/jffs2/jffs2_nand_1pass.c	/^dump_dirents(struct b_lists *pL)$/;"	f	typeref:typename:void	file:
dump_doc_section	scripts/kernel-doc	/^sub dump_doc_section {$/;"	s
dump_eeprom	examples/standalone/smc91111_eeprom.c	/^void dump_eeprom (struct eth_device *dev)$/;"	f	typeref:typename:void
dump_eeprom	examples/standalone/smc911x_eeprom.c	/^static void dump_eeprom(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_emif_config	arch/arm/mach-keystone/ddr3_spd.c	/^static void dump_emif_config(struct ddr3_emif_config *ptr)$/;"	f	typeref:typename:void	file:
dump_enum	scripts/kernel-doc	/^sub dump_enum($$) {$/;"	s
dump_fcba	tools/ifdtool.c	/^static void dump_fcba(struct fcba_t *fcba)$/;"	f	typeref:typename:void	file:
dump_fd	tools/ifdtool.c	/^static int dump_fd(char *image, int size)$/;"	f	typeref:typename:int	file:
dump_fdt_regions	tools/fdtgrep.c	/^static int dump_fdt_regions(struct display_info *disp, const void *blob,$/;"	f	typeref:typename:int	file:
dump_fifo	board/esd/pmc440/cmd_pmc440.c	/^void dump_fifo(pmc440_fpga_t *fpga, int f, int *n)$/;"	f	typeref:typename:void
dump_fmba	tools/ifdtool.c	/^static void dump_fmba(struct fmba_t *fmba)$/;"	f	typeref:typename:void	file:
dump_fmsba	tools/ifdtool.c	/^static void dump_fmsba(struct fmsba_t *fmsba)$/;"	f	typeref:typename:void	file:
dump_fpsba	tools/ifdtool.c	/^static void dump_fpsba(struct fpsba_t *fpsba)$/;"	f	typeref:typename:void	file:
dump_fragments	fs/jffs2/jffs2_1pass.c	/^dump_fragments(struct b_lists *pL)$/;"	f	typeref:typename:void	file:
dump_fragments	fs/jffs2/jffs2_nand_1pass.c	/^dump_fragments(struct b_lists *pL)$/;"	f	typeref:typename:void	file:
dump_frba	tools/ifdtool.c	/^static void dump_frba(struct frba_t *frba)$/;"	f	typeref:typename:void	file:
dump_function	scripts/kernel-doc	/^sub dump_function($$) {$/;"	s
dump_inode	fs/jffs2/jffs2_1pass.c	/^static inline u32 dump_inode(struct b_lists * pL, struct jffs2_raw_dirent *d, struct jffs2_raw_i/;"	f	typeref:typename:u32	file:
dump_inode	fs/jffs2/jffs2_nand_1pass.c	/^dump_inode(struct b_lists *pL, struct b_dirent *d, struct b_inode *i)$/;"	f	typeref:typename:int	file:
dump_jid	tools/ifdtool.c	/^static void dump_jid(uint32_t jid)$/;"	f	typeref:typename:void	file:
dump_loop	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void dump_loop(void (*callback)(void __iomem *))$/;"	f	typeref:typename:void	file:
dump_loop	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void dump_loop(const struct phy_param *phy_param,$/;"	f	typeref:typename:void	file:
dump_lpt_leb	fs/ubifs/lpt_commit.c	/^static void dump_lpt_leb(const struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:void	file:
dump_mc_ccsr_regs	drivers/net/fsl-mc/mc.c	/^#define dump_mc_ccsr_regs(/;"	d	file:
dump_mc_ccsr_regs	drivers/net/fsl-mc/mc.c	/^void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)$/;"	f	typeref:typename:void
dump_mem	arch/avr32/cpu/exception.c	/^static void dump_mem(const char *str, unsigned long bottom, unsigned long top)$/;"	f	typeref:typename:void	file:
dump_memory_info	drivers/net/lan91c96.c	/^void dump_memory_info(struct eth_device *dev)$/;"	f	typeref:typename:void
dump_msg	drivers/usb/gadget/storage_common.c	/^#  define dump_msg(/;"	d	file:
dump_msg	drivers/usb/gadget/storage_common.c	/^# define dump_msg(/;"	d	file:
dump_msg	drivers/usb/host/isp116x-hcd.c	/^#define dump_msg(/;"	d	file:
dump_msg	drivers/usb/host/isp116x-hcd.c	/^static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:void	file:
dump_oem	tools/ifdtool.c	/^static void dump_oem(uint8_t *oem)$/;"	f	typeref:typename:void	file:
dump_pci	arch/powerpc/cpu/mpc8260/traps.c	/^void dump_pci (void)$/;"	f	typeref:typename:void
dump_pci	arch/powerpc/cpu/mpc83xx/traps.c	/^void dump_pci (void)$/;"	f	typeref:typename:void
dump_phy_config	arch/arm/mach-keystone/ddr3_spd.c	/^static void dump_phy_config(struct ddr3_phy_config *ptr)$/;"	f	typeref:typename:void	file:
dump_phy_regs	drivers/net/tsi108_eth.c	/^#define dump_phy_regs(/;"	d	file:
dump_phy_regs	drivers/net/tsi108_eth.c	/^static void dump_phy_regs (unsigned int phy_addr)$/;"	f	typeref:typename:void	file:
dump_pkt	drivers/usb/host/isp116x-hcd.c	/^#define dump_pkt(/;"	d	file:
dump_power_state	arch/x86/cpu/broadwell/power_state.c	/^static void dump_power_state(struct chipset_power_state *ps)$/;"	f	typeref:typename:void	file:
dump_ptd	drivers/usb/host/isp116x-hcd.c	/^#define dump_ptd(/;"	d	file:
dump_ptd	drivers/usb/host/isp116x-hcd.c	/^static inline void dump_ptd(struct ptd *ptd)$/;"	f	typeref:typename:void	file:
dump_ptd_data	drivers/usb/host/isp116x-hcd.c	/^#define dump_ptd_data(/;"	d	file:
dump_ptd_data	drivers/usb/host/isp116x-hcd.c	/^static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)$/;"	f	typeref:typename:void	file:
dump_ram_words	drivers/net/fsl-mc/mc.c	/^#define dump_ram_words(/;"	d	file:
dump_ram_words	drivers/net/fsl-mc/mc.c	/^void dump_ram_words(const char *title, void *addr)$/;"	f	typeref:typename:void
dump_reg	cmd/mii.c	/^static void dump_reg($/;"	f	typeref:typename:void	file:
dump_reg	examples/standalone/smc91111_eeprom.c	/^void dump_reg (struct eth_device *dev)$/;"	f	typeref:typename:void
dump_region	tools/ifdtool.c	/^static int dump_region(int num, struct frba_t *frba)$/;"	f	typeref:typename:int	file:
dump_regs	arch/arm/lib/interrupts_m.c	/^void dump_regs(struct autosave_regs *regs)$/;"	f	typeref:typename:void
dump_regs	arch/x86/cpu/interrupts.c	/^static void dump_regs(struct irq_regs *regs)$/;"	f	typeref:typename:void	file:
dump_regs	drivers/net/dm9000x.c	/^dump_regs(void)$/;"	f	typeref:typename:void	file:
dump_regs	examples/standalone/smc911x_eeprom.c	/^static void dump_regs(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_resources	drivers/core/devres.c	/^static void dump_resources(struct udevice *dev, int depth)$/;"	f	typeref:typename:void	file:
dump_rx_descriptor_queue	drivers/net/ep93xx_eth.c	/^#define dump_rx_descriptor_queue(/;"	d	file:
dump_rx_descriptor_queue	drivers/net/ep93xx_eth.c	/^static void dump_rx_descriptor_queue(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_rx_status_queue	drivers/net/ep93xx_eth.c	/^#define dump_rx_status_queue(/;"	d	file:
dump_rx_status_queue	drivers/net/ep93xx_eth.c	/^static void dump_rx_status_queue(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_section	scripts/kernel-doc	/^sub dump_section {$/;"	s
dump_sor_reg	drivers/video/tegra124/sor.c	/^static void dump_sor_reg(struct tegra_dc_sor_data *sor)$/;"	f	typeref:typename:void	file:
dump_spd_ddr_reg	arch/powerpc/cpu/mpc85xx/cpu.c	/^static void dump_spd_ddr_reg(void)$/;"	f	typeref:typename:void	file:
dump_stack	include/linux/compat.h	/^#define dump_stack(/;"	d
dump_stat	fs/jffs2/jffs2_1pass.c	/^static inline void dump_stat(struct stat *st, const char *name)$/;"	f	typeref:typename:void	file:
dump_stat	fs/jffs2/jffs2_nand_1pass.c	/^static inline void dump_stat(struct stat *st, const char *name)$/;"	f	typeref:typename:void	file:
dump_state	drivers/usb/gadget/pxa25x_udc.c	/^dump_state(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
dump_state	drivers/usb/gadget/pxa25x_udc.c	/^static inline void dump_state(struct pxa25x_udc *dev) { }$/;"	f	typeref:typename:void	file:
dump_struct	scripts/kernel-doc	/^sub dump_struct($$) {$/;"	s
dump_tx_descriptor_queue	drivers/net/ep93xx_eth.c	/^#define dump_tx_descriptor_queue(/;"	d	file:
dump_tx_descriptor_queue	drivers/net/ep93xx_eth.c	/^static void dump_tx_descriptor_queue(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_tx_status_queue	drivers/net/ep93xx_eth.c	/^#define dump_tx_status_queue(/;"	d	file:
dump_tx_status_queue	drivers/net/ep93xx_eth.c	/^static void dump_tx_status_queue(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dump_typedef	scripts/kernel-doc	/^sub dump_typedef($$) {$/;"	s
dump_udccr	drivers/usb/gadget/pxa25x_udc.c	/^dump_udccr(const char *label)$/;"	f	typeref:typename:void	file:
dump_udccr	drivers/usb/gadget/pxa25x_udc.c	/^static inline void dump_udccr(const char *label) { }$/;"	f	typeref:typename:void	file:
dump_udccs0	drivers/usb/gadget/pxa25x_udc.c	/^dump_udccs0(const char *label)$/;"	f	typeref:typename:void	file:
dump_udccs0	drivers/usb/gadget/pxa25x_udc.c	/^static inline void dump_udccs0(const char *label) { }$/;"	f	typeref:typename:void	file:
dump_union	scripts/kernel-doc	/^sub dump_union($$) {$/;"	s
dump_vscc	tools/ifdtool.c	/^static void dump_vscc(uint32_t vscc)$/;"	f	typeref:typename:void	file:
dump_vtba	tools/ifdtool.c	/^static void dump_vtba(struct vtba_t *vtba, int vtl)$/;"	f	typeref:typename:void	file:
dump_znode	fs/ubifs/debug.c	/^static int dump_znode(struct ubifs_info *c, struct ubifs_znode *znode,$/;"	f	typeref:typename:int	file:
dumpdir	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_debugfs_dumpdir_request dumpdir;$/;"	m	union:mrq_debugfs_request::__anonb38d4241010a	typeref:struct:cmd_debugfs_dumpdir_request
dumpdir	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_debugfs_dumpdir_response dumpdir;$/;"	m	union:mrq_debugfs_response::__anonb38d4241020a	typeref:struct:cmd_debugfs_dumpdir_response
dumpimage-mkimage-objs	tools/Makefile	/^dumpimage-mkimage-objs := aisimage.o \\$/;"	m
dumpimage-objs	tools/Makefile	/^dumpimage-objs := $(dumpimage-mkimage-objs) dumpimage.o$/;"	m
dumpimage_extract_subimage	tools/dumpimage.c	/^static int dumpimage_extract_subimage(struct image_type_params *tparams,$/;"	f	typeref:typename:int	file:
dup	common/cli_hush.c	/^	int dup;					\/* -1, or file descriptor being duplicated *\/$/;"	m	struct:redir_struct	typeref:typename:int	file:
dup_spd	arch/m68k/include/asm/fec.h	/^	int dup_spd;$/;"	m	struct:fec_info_s	typeref:typename:int
dup_spd	arch/m68k/include/asm/fsl_mcdmafec.h	/^	int dup_spd;$/;"	m	struct:fec_info_dma	typeref:typename:int
duplex	drivers/net/4xx_enet.c	/^	unsigned int duplex;	\/* specified duplex FULL or HALF *\/$/;"	m	struct:fixed_phy_port	typeref:typename:unsigned int	file:
duplex	drivers/net/mvneta.c	/^	unsigned int duplex;$/;"	m	struct:mvneta_port	typeref:typename:unsigned int	file:
duplex	drivers/net/mvpp2.c	/^	unsigned int duplex;$/;"	m	struct:mvpp2_port	typeref:typename:unsigned int	file:
duplex	drivers/net/sun8i_emac.c	/^	u32 duplex;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
duplex	drivers/qe/uec_phy.c	/^	unsigned int duplex;	\/* specified duplex FULL or HALF *\/$/;"	m	struct:fixed_phy_port	typeref:typename:unsigned int	file:
duplex	drivers/qe/uec_phy.h	/^	int duplex;$/;"	m	struct:uec_mii_info	typeref:typename:int
duplex	include/linux/ethtool.h	/^	__u8	duplex;		\/* Duplex, half or full *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
duplex	include/phy.h	/^	int duplex;$/;"	m	struct:fixed_link	typeref:typename:int
duplex	include/phy.h	/^	int duplex;$/;"	m	struct:phy_device	typeref:typename:int
duration	drivers/tpm/tpm_tis.h	/^	struct duration_t duration;$/;"	m	union:cap_t	typeref:struct:duration_t
duration_ms	include/tpm.h	/^	uint duration_ms[TPM_DURATION_COUNT];$/;"	m	struct:tpm_chip_priv	typeref:typename:uint[]
duration_t	drivers/tpm/tpm_tis.h	/^struct duration_t {$/;"	s
dutcfg	board/freescale/common/qixis.h	/^	u8 dutcfg[16];$/;"	m	struct:qixis	typeref:typename:u8[16]
duty_lpr	arch/arm/include/asm/arch-rockchip/pwm.h	/^	u32 duty_lpr;$/;"	m	struct:rk3288_pwm	typeref:typename:u32
duty_offset	arch/x86/include/asm/acpi_table.h	/^	u8 duty_offset;$/;"	m	struct:acpi_fadt	typeref:typename:u8
duty_width	arch/x86/include/asm/acpi_table.h	/^	u8 duty_width;$/;"	m	struct:acpi_fadt	typeref:typename:u8
dv_aintc_regs	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^#define dv_aintc_regs /;"	d
dv_aintc_regs	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^struct dv_aintc_regs {$/;"	s
dv_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint dv_ctrl;			\/* _WIN_DV_CONTROL_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
dv_ddr2_regs_ctrl	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^#define dv_ddr2_regs_ctrl /;"	d
dv_ddr2_regs_ctrl	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^struct dv_ddr2_regs_ctrl {$/;"	s
dv_maskbits	arch/arm/mach-davinci/include/mach/da850_lowlevel.h	/^#define dv_maskbits(/;"	d
dv_pll0_regs	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define dv_pll0_regs /;"	d
dv_pll1_regs	arch/arm/mach-davinci/include/mach/pll_defs.h	/^#define dv_pll1_regs /;"	d
dv_pll_regs	arch/arm/mach-davinci/include/mach/pll_defs.h	/^struct dv_pll_regs {$/;"	s
dv_psc_regs	arch/arm/mach-davinci/include/mach/psc_defs.h	/^#define dv_psc_regs /;"	d
dv_psc_regs	arch/arm/mach-davinci/include/mach/psc_defs.h	/^struct dv_psc_regs {$/;"	s
dv_reg	arch/arm/include/asm/arch-omap3/emac_defs.h	/^typedef volatile unsigned int	dv_reg;$/;"	t	typeref:typename:volatile unsigned int
dv_reg	arch/arm/mach-davinci/include/mach/hardware.h	/^typedef volatile unsigned int	dv_reg;$/;"	t	typeref:typename:volatile unsigned int
dv_reg	arch/arm/mach-keystone/include/mach/hardware.h	/^typedef volatile unsigned int   dv_reg;$/;"	t	typeref:typename:volatile unsigned int
dv_reg_p	arch/arm/include/asm/arch-omap3/emac_defs.h	/^typedef volatile unsigned int	*dv_reg_p;$/;"	t	typeref:typename:volatile unsigned int *
dv_reg_p	arch/arm/mach-davinci/include/mach/hardware.h	/^typedef volatile unsigned int *	dv_reg_p;$/;"	t	typeref:typename:volatile unsigned int *
dv_reg_p	arch/arm/mach-keystone/include/mach/hardware.h	/^typedef volatile unsigned int   *dv_reg_p;$/;"	t	typeref:typename:volatile unsigned int *
dv_sys_module_regs	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^#define dv_sys_module_regs /;"	d
dv_sys_module_regs	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^struct dv_sys_module_regs {$/;"	s
dva	include/tsi148.h	/^	unsigned int dva;    \/* Vme Address         *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dva	include/universe.h	/^	unsigned int dva;    \/* Vme Address         *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
dva	include/universe.h	/^	unsigned int dva;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
dva	include/zfs/spa.h	/^typedef struct dva {$/;"	s
dva_get_offset	fs/zfs/zfs.c	/^dva_get_offset(dva_t *dva, zfs_endian_t endian)$/;"	f	typeref:typename:uint64_t	file:
dva_t	include/zfs/spa.h	/^} dva_t;$/;"	t	typeref:struct:dva
dva_word	include/zfs/spa.h	/^	uint64_t	dva_word[2];$/;"	m	struct:dva	typeref:typename:uint64_t[2]
dval	post/lib_powerpc/fpu/darwin-ldouble.c	/^	double dval[2];$/;"	m	union:__anon31388ce3010a	typeref:typename:double[2]	file:
dvc_ctlr	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^struct dvc_ctlr {$/;"	s
dvcidx_map	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvcidx_map;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dvcidx_map	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvcidx_map;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dvcidx_map	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvcidx_map;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dvcidx_map	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvcidx_map;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dvddvolt_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 dvddvolt_params_sn20[]	= {0x74};$/;"	v	typeref:typename:u16[]	file:
dvevm_read_mac_address	arch/arm/mach-davinci/misc.c	/^int dvevm_read_mac_address(uint8_t *buf)$/;"	f	typeref:typename:int
dvfscr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dvfscr0;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dvfscr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dvfscr1;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dvfscr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dvfscr2;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dvfscr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dvfscr3;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dvfscr4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dvfscr4;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dvfscr5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 dvfscr5; \/* 0x17C *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
dvi	board/freescale/mx51evk/mx51evk_video.c	/^static struct fb_videomode const dvi = {$/;"	v	typeref:struct:fb_videomode const	file:
dvid_cfg	board/ti/beagle/beagle.h	/^static const struct panel_config dvid_cfg = {$/;"	v	typeref:typename:const struct panel_config
dvid_cfg_xm	board/ti/beagle/beagle.h	/^static const struct panel_config dvid_cfg_xm = {$/;"	v	typeref:typename:const struct panel_config
dvo	include/mpc5xxx.h	/^	volatile u8 dvo;		\/* WU_GPIO + 0x0c *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
dvp_pwr	arch/arm/dts/rk3288-popmetal.dtsi	/^		dvp_pwr: dvp-pwr {$/;"	l
dvs_1	arch/arm/dts/rk3288-jerry.dts	/^		dvs_1: dvs-1 {$/;"	l
dvs_2	arch/arm/dts/rk3288-jerry.dts	/^		dvs_2: dvs-2 {$/;"	l
dvsemclk_en	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvsemclk_en;		\/* 0x10015080 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
dvsemclk_en	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvsemclk_en;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
dvsemclk_en	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvsemclk_en;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
dvsemclk_en	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	dvsemclk_en;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
dw	drivers/video/cfb_console.c	/^		unsigned int dw;	\/* double word *\/$/;"	m	union:palette::__anon447d1c47010a	typeref:typename:unsigned int	file:
dwDTERate	include/linux/usb/cdc.h	/^	__le32	dwDTERate;$/;"	m	struct:usb_cdc_line_coding	typeref:typename:__le32
dwSize	drivers/bios_emulator/include/biosemu.h	/^	ulong dwSize;$/;"	m	struct:__anon964d10140908	typeref:typename:ulong
dw_adjust_link	drivers/net/designware.c	/^static void dw_adjust_link(struct eth_mac_regs *mac_p,$/;"	f	typeref:typename:void	file:
dw_cfg	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 dw_cfg;	\/* 0x10620 - Direct Write Configuration *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
dw_eth_dev	drivers/net/designware.h	/^struct dw_eth_dev {$/;"	s
dw_eth_halt	drivers/net/designware.c	/^static void dw_eth_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
dw_eth_init	drivers/net/designware.c	/^static int dw_eth_init(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
dw_eth_pdata	drivers/net/designware.h	/^struct dw_eth_pdata {$/;"	s
dw_eth_recv	drivers/net/designware.c	/^static int dw_eth_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
dw_eth_send	drivers/net/designware.c	/^static int dw_eth_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
dw_find_ep	drivers/usb/gadget/designware_udc.c	/^static struct usb_endpoint_instance *dw_find_ep(int ep)$/;"	f	typeref:struct:usb_endpoint_instance *	file:
dw_gen	drivers/video/ipu_regs.h	/^	u32 dw_gen[12];$/;"	m	struct:ipu_di	typeref:typename:u32[12]
dw_i2c	drivers/i2c/designware_i2c.c	/^struct dw_i2c {$/;"	s	file:
dw_i2c_enable	drivers/i2c/designware_i2c.c	/^static void dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)$/;"	f	typeref:typename:void	file:
dw_i2c_init	drivers/i2c/designware_i2c.c	/^static void dw_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
dw_i2c_probe	drivers/i2c/designware_i2c.c	/^static int dw_i2c_probe(struct i2c_adapter *adap, u8 dev)$/;"	f	typeref:typename:int	file:
dw_i2c_read	drivers/i2c/designware_i2c.c	/^static int dw_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
dw_i2c_set_bus_speed	drivers/i2c/designware_i2c.c	/^static unsigned int dw_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
dw_i2c_write	drivers/i2c/designware_i2c.c	/^static int dw_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
dw_mdio_init	drivers/net/designware.c	/^static int dw_mdio_init(const char *name, void *priv)$/;"	f	typeref:typename:int	file:
dw_mdio_read	drivers/net/designware.c	/^static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
dw_mdio_reset	drivers/net/designware.c	/^static int dw_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
dw_mdio_write	drivers/net/designware.c	/^static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
dw_phy_init	drivers/net/designware.c	/^static int dw_phy_init(struct dw_eth_dev *priv, void *dev)$/;"	f	typeref:typename:int	file:
dw_reader	drivers/spi/designware_spi.c	/^static int dw_reader(struct dw_spi_priv *priv)$/;"	f	typeref:typename:int	file:
dw_readl	drivers/spi/designware_spi.c	/^static inline u32 dw_readl(struct dw_spi_priv *priv, u32 offset)$/;"	f	typeref:typename:u32	file:
dw_readw	drivers/spi/designware_spi.c	/^static inline u16 dw_readw(struct dw_spi_priv *priv, u32 offset)$/;"	f	typeref:typename:u16	file:
dw_scl_sda_cfg	drivers/i2c/designware_i2c.c	/^struct dw_scl_sda_cfg {$/;"	s	file:
dw_set	drivers/video/ipu_regs.h	/^	u32 dw_set[48];$/;"	m	struct:ipu_di	typeref:typename:u32[48]
dw_spi_ids	drivers/spi/designware_spi.c	/^static const struct udevice_id dw_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
dw_spi_ofdata_to_platdata	drivers/spi/designware_spi.c	/^static int dw_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
dw_spi_ops	drivers/spi/designware_spi.c	/^static const struct dm_spi_ops dw_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
dw_spi_platdata	drivers/spi/designware_spi.c	/^struct dw_spi_platdata {$/;"	s	file:
dw_spi_priv	drivers/spi/designware_spi.c	/^struct dw_spi_priv {$/;"	s	file:
dw_spi_probe	drivers/spi/designware_spi.c	/^static int dw_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
dw_spi_set_mode	drivers/spi/designware_spi.c	/^static int dw_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
dw_spi_set_speed	drivers/spi/designware_spi.c	/^static int dw_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
dw_spi_xfer	drivers/spi/designware_spi.c	/^static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
dw_udc_dev_irq	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_dev_irq(void)$/;"	f	typeref:typename:void	file:
dw_udc_endpoint_irq	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_endpoint_irq(void)$/;"	f	typeref:typename:void	file:
dw_udc_ep0_rx	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_ep0_rx(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:void	file:
dw_udc_ep0_tx	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_ep0_tx(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:void	file:
dw_udc_epn_rx	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_epn_rx(int ep)$/;"	f	typeref:typename:void	file:
dw_udc_epn_tx	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_epn_tx(int ep)$/;"	f	typeref:typename:void	file:
dw_udc_plug_irq	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_plug_irq(void)$/;"	f	typeref:typename:void	file:
dw_udc_setup	drivers/usb/gadget/designware_udc.c	/^static void dw_udc_setup(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:void	file:
dw_write_hwaddr	drivers/net/designware.c	/^static int dw_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
dw_write_noniso_tx_fifo	drivers/usb/gadget/designware_udc.c	/^static void dw_write_noniso_tx_fifo(struct usb_endpoint_instance$/;"	f	typeref:typename:void	file:
dw_writel	drivers/spi/designware_spi.c	/^static inline void dw_writel(struct dw_spi_priv *priv, u32 offset, u32 val)$/;"	f	typeref:typename:void	file:
dw_writer	drivers/spi/designware_spi.c	/^static void dw_writer(struct dw_spi_priv *priv)$/;"	f	typeref:typename:void	file:
dw_writew	drivers/spi/designware_spi.c	/^static inline void dw_writew(struct dw_spi_priv *priv, u32 offset, u16 val)$/;"	f	typeref:typename:void	file:
dwapb_gpio_direction_input	drivers/gpio/dwapb_gpio.c	/^static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:int	file:
dwapb_gpio_direction_output	drivers/gpio/dwapb_gpio.c	/^static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,$/;"	f	typeref:typename:int	file:
dwapb_gpio_get_value	drivers/gpio/dwapb_gpio.c	/^static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:int	file:
dwapb_gpio_set_value	drivers/gpio/dwapb_gpio.c	/^static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)$/;"	f	typeref:typename:int	file:
dwc	drivers/usb/dwc3/core.h	/^	struct dwc3		*dwc;$/;"	m	struct:dwc3_ep	typeref:struct:dwc3 *
dwc	drivers/usb/dwc3/core.h	/^	struct dwc3		*dwc;$/;"	m	struct:dwc3_event_buffer	typeref:struct:dwc3 *
dwc2_alloc_request	drivers/usb/gadget/dwc2_udc_otg.c	/^static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,$/;"	f	typeref:struct:usb_request *	file:
dwc2_core_regs	drivers/usb/host/dwc2.h	/^struct dwc2_core_regs {$/;"	s
dwc2_dequeue	drivers/usb/gadget/dwc2_udc_otg.c	/^static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:int	file:
dwc2_dev_in_endp	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^struct dwc2_dev_in_endp {$/;"	s
dwc2_dev_out_endp	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^struct dwc2_dev_out_endp {$/;"	s
dwc2_ep	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^struct dwc2_ep {$/;"	s
dwc2_ep0_complete_out	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static inline void dwc2_ep0_complete_out(void)$/;"	f	typeref:typename:void	file:
dwc2_ep0_kick	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep)$/;"	f	typeref:typename:void	file:
dwc2_ep0_read	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_ep0_read(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
dwc2_ep0_setup	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_ep0_setup(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
dwc2_ep0_write	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_ep0_write(struct dwc2_udc *dev)$/;"	f	typeref:typename:int	file:
dwc2_ep_disable	drivers/usb/gadget/dwc2_udc_otg.c	/^static int dwc2_ep_disable(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
dwc2_ep_enable	drivers/usb/gadget/dwc2_udc_otg.c	/^static int dwc2_ep_enable(struct usb_ep *_ep,$/;"	f	typeref:typename:int	file:
dwc2_ep_ops	drivers/usb/gadget/dwc2_udc_otg.c	/^static struct usb_ep_ops dwc2_ep_ops = {$/;"	v	typeref:struct:usb_ep_ops	file:
dwc2_eptype	drivers/usb/host/dwc2.c	/^static int dwc2_eptype[] = {$/;"	v	typeref:typename:int[]	file:
dwc2_fifo_flush	drivers/usb/gadget/dwc2_udc_otg.c	/^static void dwc2_fifo_flush(struct usb_ep *_ep)$/;"	f	typeref:typename:void	file:
dwc2_fifo_read	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_fifo_read(struct dwc2_ep *ep, u32 *cp, int max)$/;"	f	typeref:typename:int	file:
dwc2_fifo_status	drivers/usb/gadget/dwc2_udc_otg.c	/^static int dwc2_fifo_status(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
dwc2_free_request	drivers/usb/gadget/dwc2_udc_otg.c	/^static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)$/;"	f	typeref:typename:void	file:
dwc2_handle_ep0	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_handle_ep0(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
dwc2_hc_regs	drivers/usb/host/dwc2.h	/^struct dwc2_hc_regs {$/;"	s
dwc2_host_regs	drivers/usb/host/dwc2.h	/^struct dwc2_host_regs {$/;"	s
dwc2_init_common	drivers/usb/host/dwc2.c	/^static int dwc2_init_common(struct dwc2_priv *priv)$/;"	f	typeref:typename:int	file:
dwc2_plat_otg_data	include/usb/dwc2_udc.h	/^struct dwc2_plat_otg_data {$/;"	s
dwc2_priv	drivers/usb/host/dwc2.c	/^struct dwc2_priv {$/;"	s	file:
dwc2_queue	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req,$/;"	f	typeref:typename:int	file:
dwc2_request	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^struct dwc2_request {$/;"	s
dwc2_submit_bulk_msg	drivers/usb/host/dwc2.c	/^static int dwc2_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
dwc2_submit_control_msg	drivers/usb/host/dwc2.c	/^static int dwc2_submit_control_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
dwc2_submit_int_msg	drivers/usb/host/dwc2.c	/^static int dwc2_submit_int_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
dwc2_udc	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^struct dwc2_udc {$/;"	s
dwc2_udc_check_tx_queue	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static inline void dwc2_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num)$/;"	f	typeref:typename:void	file:
dwc2_udc_clear_feature	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_udc_clear_feature(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
dwc2_udc_ep0_set_stall	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static inline void dwc2_udc_ep0_set_stall(struct dwc2_ep *ep)$/;"	f	typeref:typename:void	file:
dwc2_udc_ep0_zlp	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static inline void dwc2_udc_ep0_zlp(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
dwc2_udc_ep_activate	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_udc_ep_activate(struct dwc2_ep *ep)$/;"	f	typeref:typename:void	file:
dwc2_udc_ep_clear_stall	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep)$/;"	f	typeref:typename:void	file:
dwc2_udc_ep_set_stall	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep)$/;"	f	typeref:typename:void	file:
dwc2_udc_get_status	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_udc_get_status(struct dwc2_udc *dev,$/;"	f	typeref:typename:int	file:
dwc2_udc_irq	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_udc_irq(int irq, void *_dev)$/;"	f	typeref:typename:int	file:
dwc2_udc_ops	drivers/usb/gadget/dwc2_udc_otg.c	/^static const struct usb_gadget_ops dwc2_udc_ops = {$/;"	v	typeref:typename:const struct usb_gadget_ops	file:
dwc2_udc_pre_setup	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_udc_pre_setup(void)$/;"	f	typeref:typename:void	file:
dwc2_udc_probe	drivers/usb/gadget/dwc2_udc_otg.c	/^int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)$/;"	f	typeref:typename:int
dwc2_udc_set_feature	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_udc_set_feature(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
dwc2_udc_set_halt	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int dwc2_udc_set_halt(struct usb_ep *_ep, int value)$/;"	f	typeref:typename:int	file:
dwc2_udc_set_nak	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void dwc2_udc_set_nak(struct dwc2_ep *ep)$/;"	f	typeref:typename:void	file:
dwc2_uninit_common	drivers/usb/host/dwc2.c	/^static void dwc2_uninit_common(struct dwc2_core_regs *regs)$/;"	f	typeref:typename:void	file:
dwc2_usb_ids	drivers/usb/host/dwc2.c	/^static const struct udevice_id dwc2_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
dwc2_usb_ofdata_to_platdata	drivers/usb/host/dwc2.c	/^static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dwc2_usb_ops	drivers/usb/host/dwc2.c	/^struct dm_usb_ops dwc2_usb_ops = {$/;"	v	typeref:struct:dm_usb_ops
dwc2_usb_probe	drivers/usb/host/dwc2.c	/^static int dwc2_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dwc2_usb_remove	drivers/usb/host/dwc2.c	/^static int dwc2_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dwc2_usbotg_phy	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^struct dwc2_usbotg_phy {$/;"	s
dwc2_usbotg_reg	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^struct dwc2_usbotg_reg {$/;"	s
dwc3	drivers/usb/dwc3/core.h	/^struct dwc3 {$/;"	s
dwc3	include/linux/usb/dwc3.h	/^struct dwc3 {					\/* offset: 0xC100 *\/$/;"	s
dwc3-y	drivers/usb/dwc3/Makefile	/^dwc3-y					:= core.o$/;"	m
dwc3_0	arch/arm/dts/zynqmp.dtsi	/^			dwc3_0: dwc3@fe200000 {$/;"	l	label:usb0
dwc3_1	arch/arm/dts/am4372.dtsi	/^		dwc3_1: omap_dwc3@48380000 {$/;"	l
dwc3_1	arch/arm/dts/zynqmp.dtsi	/^			dwc3_1: dwc3@fe300000 {$/;"	l	label:usb1
dwc3_2	arch/arm/dts/am4372.dtsi	/^		dwc3_2: omap_dwc3@483c0000 {$/;"	l
dwc3_alloc_event_buffers	drivers/usb/dwc3/core.c	/^static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)$/;"	f	typeref:typename:int	file:
dwc3_alloc_one_event_buffer	drivers/usb/dwc3/core.c	/^static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc,$/;"	f	typeref:struct:dwc3_event_buffer *	file:
dwc3_alloc_scratch_buffers	drivers/usb/dwc3/core.c	/^static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_alloc_trb_pool	drivers/usb/dwc3/gadget.c	/^static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)$/;"	f	typeref:typename:int	file:
dwc3_cache_hwparams	drivers/usb/dwc3/core.c	/^static void dwc3_cache_hwparams(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_check_event_buf	drivers/usb/dwc3/gadget.c	/^static irqreturn_t dwc3_check_event_buf(struct dwc3 *dwc, u32 buf)$/;"	f	typeref:typename:irqreturn_t	file:
dwc3_cleanup_done_reqs	drivers/usb/dwc3/gadget.c	/^static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,$/;"	f	typeref:typename:int	file:
dwc3_clear_stall_all_ep	drivers/usb/dwc3/gadget.c	/^static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_core_exit	drivers/usb/dwc3/core.c	/^static void dwc3_core_exit(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_core_exit_mode	drivers/usb/dwc3/core.c	/^static void dwc3_core_exit_mode(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_core_init	drivers/usb/dwc3/core.c	/^static int dwc3_core_init(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_core_init	drivers/usb/host/xhci-dwc3.c	/^int dwc3_core_init(struct dwc3 *dwc3_reg)$/;"	f	typeref:typename:int
dwc3_core_init_mode	drivers/usb/dwc3/core.c	/^static int dwc3_core_init_mode(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_core_num_eps	drivers/usb/dwc3/core.c	/^static void dwc3_core_num_eps(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_core_soft_reset	drivers/usb/dwc3/core.c	/^static int dwc3_core_soft_reset(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_core_soft_reset	drivers/usb/host/xhci-dwc3.c	/^void dwc3_core_soft_reset(struct dwc3 *dwc3_reg)$/;"	f	typeref:typename:void
dwc3_device	include/dwc3-uboot.h	/^struct dwc3_device {$/;"	s
dwc3_device_data	board/samsung/common/exynos5-dt.c	/^static struct dwc3_device dwc3_device_data = {$/;"	v	typeref:struct:dwc3_device	file:
dwc3_device_data0	board/xilinx/zynqmp/zynqmp.c	/^static struct dwc3_device dwc3_device_data0 = {$/;"	v	typeref:struct:dwc3_device	file:
dwc3_device_data1	board/xilinx/zynqmp/zynqmp.c	/^static struct dwc3_device dwc3_device_data1 = {$/;"	v	typeref:struct:dwc3_device	file:
dwc3_disconnect_gadget	drivers/usb/dwc3/gadget.c	/^static void dwc3_disconnect_gadget(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_endpoint_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_endpoint_interrupt(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_endpoint_transfer_complete	drivers/usb/dwc3/gadget.c	/^static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep	drivers/usb/dwc3/core.h	/^struct dwc3_ep {$/;"	s
dwc3_ep0_complete_data	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_complete_data(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep0_complete_status	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_complete_status(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep0_delegate_req	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dwc3_ep0_do_control_status	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_do_control_status(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep0_end_control_data	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep)$/;"	f	typeref:typename:void	file:
dwc3_ep0_handle_feature	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_handle_feature(struct dwc3 *dwc,$/;"	f	typeref:typename:int	file:
dwc3_ep0_handle_status	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_handle_status(struct dwc3 *dwc,$/;"	f	typeref:typename:int	file:
dwc3_ep0_inspect_setup	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep0_interrupt	drivers/usb/dwc3/ep0.c	/^void dwc3_ep0_interrupt(struct dwc3 *dwc,$/;"	f	typeref:typename:void
dwc3_ep0_next	drivers/usb/dwc3/core.h	/^enum dwc3_ep0_next {$/;"	g
dwc3_ep0_out_start	drivers/usb/dwc3/ep0.c	/^void dwc3_ep0_out_start(struct dwc3 *dwc)$/;"	f	typeref:typename:void
dwc3_ep0_set_address	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dwc3_ep0_set_config	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dwc3_ep0_set_isoch_delay	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_set_isoch_delay(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dwc3_ep0_set_sel	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dwc3_ep0_set_sel_cmpl	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
dwc3_ep0_stall_and_restart	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_ep0_start_control_status	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)$/;"	f	typeref:typename:int	file:
dwc3_ep0_start_trans	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,$/;"	f	typeref:typename:int	file:
dwc3_ep0_state	drivers/usb/dwc3/core.h	/^enum dwc3_ep0_state {$/;"	g
dwc3_ep0_state_string	drivers/usb/dwc3/ep0.c	/^static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)$/;"	f	typeref:typename:const char *	file:
dwc3_ep0_status_cmpl	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
dwc3_ep0_std_request	drivers/usb/dwc3/ep0.c	/^static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
dwc3_ep0_xfer_complete	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep0_xfernotready	drivers/usb/dwc3/ep0.c	/^static void dwc3_ep0_xfernotready(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_ep_event_string	drivers/usb/dwc3/core.h	/^static inline const char *dwc3_ep_event_string(u8 event)$/;"	f	typeref:typename:const char *
dwc3_event	drivers/usb/dwc3/core.h	/^union dwc3_event {$/;"	u
dwc3_event_buffer	drivers/usb/dwc3/core.h	/^struct dwc3_event_buffer {$/;"	s
dwc3_event_buffers_cleanup	drivers/usb/dwc3/core.c	/^static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_event_buffers_setup	drivers/usb/dwc3/core.c	/^static int dwc3_event_buffers_setup(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_event_depevt	drivers/usb/dwc3/core.h	/^struct dwc3_event_depevt {$/;"	s
dwc3_event_devt	drivers/usb/dwc3/core.h	/^struct dwc3_event_devt {$/;"	s
dwc3_event_gevt	drivers/usb/dwc3/core.h	/^struct dwc3_event_gevt {$/;"	s
dwc3_event_type	drivers/usb/dwc3/core.h	/^struct dwc3_event_type {$/;"	s
dwc3_flush_cache	drivers/usb/dwc3/io.h	/^static inline void dwc3_flush_cache(int addr, int length)$/;"	f	typeref:typename:void
dwc3_free_event_buffers	drivers/usb/dwc3/core.c	/^static void dwc3_free_event_buffers(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_free_one_event_buffer	drivers/usb/dwc3/core.c	/^static void dwc3_free_one_event_buffer(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_free_scratch_buffers	drivers/usb/dwc3/core.c	/^static void dwc3_free_scratch_buffers(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_free_trb_pool	drivers/usb/dwc3/gadget.c	/^static void dwc3_free_trb_pool(struct dwc3_ep *dep)$/;"	f	typeref:typename:void	file:
dwc3_gadget_conndone_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_gadget_disable_irq	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_disable_irq(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_gadget_disconnect_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_gadget_enable_irq	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_enable_irq(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_gadget_ep0_desc	drivers/usb/dwc3/gadget.c	/^static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
dwc3_gadget_ep0_disable	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep0_disable(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep0_enable	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep0_enable(struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep0_ops	drivers/usb/dwc3/gadget.c	/^static const struct usb_ep_ops dwc3_gadget_ep0_ops = {$/;"	v	typeref:typename:const struct usb_ep_ops	file:
dwc3_gadget_ep0_queue	drivers/usb/dwc3/ep0.c	/^int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,$/;"	f	typeref:typename:int
dwc3_gadget_ep0_set_halt	drivers/usb/dwc3/ep0.c	/^int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)$/;"	f	typeref:typename:int
dwc3_gadget_ep_alloc_request	drivers/usb/dwc3/gadget.c	/^static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,$/;"	f	typeref:struct:usb_request *	file:
dwc3_gadget_ep_cmd_params	drivers/usb/dwc3/core.h	/^struct dwc3_gadget_ep_cmd_params {$/;"	s
dwc3_gadget_ep_dequeue	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep_disable	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep_disable(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep_enable	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep_enable(struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep_free_request	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_ep_free_request(struct usb_ep *ep,$/;"	f	typeref:typename:void	file:
dwc3_gadget_ep_get_transfer_index	drivers/usb/dwc3/gadget.h	/^static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3 *dwc, u8 number)$/;"	f	typeref:typename:u32
dwc3_gadget_ep_ops	drivers/usb/dwc3/gadget.c	/^static const struct usb_ep_ops dwc3_gadget_ep_ops = {$/;"	v	typeref:typename:const struct usb_ep_ops	file:
dwc3_gadget_ep_queue	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep_set_halt	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)$/;"	f	typeref:typename:int	file:
dwc3_gadget_ep_set_wedge	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
dwc3_gadget_exit	drivers/usb/dwc3/core.h	/^static inline void dwc3_gadget_exit(struct dwc3 *dwc)$/;"	f	typeref:typename:void
dwc3_gadget_exit	drivers/usb/dwc3/gadget.c	/^void dwc3_gadget_exit(struct dwc3 *dwc)$/;"	f	typeref:typename:void
dwc3_gadget_free_endpoints	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_gadget_get_frame	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_get_frame(struct usb_gadget *g)$/;"	f	typeref:typename:int	file:
dwc3_gadget_get_link_state	drivers/usb/dwc3/core.h	/^static inline int dwc3_gadget_get_link_state(struct dwc3 *dwc)$/;"	f	typeref:typename:int
dwc3_gadget_get_link_state	drivers/usb/dwc3/gadget.c	/^int dwc3_gadget_get_link_state(struct dwc3 *dwc)$/;"	f	typeref:typename:int
dwc3_gadget_giveback	drivers/usb/dwc3/gadget.c	/^void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,$/;"	f	typeref:typename:void
dwc3_gadget_hibernation_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_gadget_init	drivers/usb/dwc3/core.h	/^static inline int dwc3_gadget_init(struct dwc3 *dwc)$/;"	f	typeref:typename:int
dwc3_gadget_init	drivers/usb/dwc3/gadget.c	/^int dwc3_gadget_init(struct dwc3 *dwc)$/;"	f	typeref:typename:int
dwc3_gadget_init_endpoints	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_gadget_init_hw_endpoints	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,$/;"	f	typeref:typename:int	file:
dwc3_gadget_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_interrupt(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_gadget_linksts_change_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_gadget_move_request_queued	drivers/usb/dwc3/gadget.h	/^static inline void dwc3_gadget_move_request_queued(struct dwc3_request *req)$/;"	f	typeref:typename:void
dwc3_gadget_ops	drivers/usb/dwc3/gadget.c	/^static const struct usb_gadget_ops dwc3_gadget_ops = {$/;"	v	typeref:typename:const struct usb_gadget_ops	file:
dwc3_gadget_pullup	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)$/;"	f	typeref:typename:int	file:
dwc3_gadget_reset_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_gadget_resize_tx_fifos	drivers/usb/dwc3/gadget.c	/^int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)$/;"	f	typeref:typename:int
dwc3_gadget_run_stop	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)$/;"	f	typeref:typename:int	file:
dwc3_gadget_set_ep_config	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,$/;"	f	typeref:typename:int	file:
dwc3_gadget_set_link_state	drivers/usb/dwc3/core.h	/^static inline int dwc3_gadget_set_link_state(struct dwc3 *dwc,$/;"	f	typeref:typename:int
dwc3_gadget_set_link_state	drivers/usb/dwc3/gadget.c	/^int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)$/;"	f	typeref:typename:int
dwc3_gadget_set_selfpowered	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,$/;"	f	typeref:typename:int	file:
dwc3_gadget_set_test_mode	drivers/usb/dwc3/core.h	/^static inline int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)$/;"	f	typeref:typename:int
dwc3_gadget_set_test_mode	drivers/usb/dwc3/gadget.c	/^int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)$/;"	f	typeref:typename:int
dwc3_gadget_set_xfer_resource	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)$/;"	f	typeref:typename:int	file:
dwc3_gadget_start	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_start(struct usb_gadget *g,$/;"	f	typeref:typename:int	file:
dwc3_gadget_start_config	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)$/;"	f	typeref:typename:int	file:
dwc3_gadget_start_isoc	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_start_isoc(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_gadget_stop	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_stop(struct usb_gadget *g)$/;"	f	typeref:typename:int	file:
dwc3_gadget_uboot_handle_interrupt	drivers/usb/dwc3/gadget.c	/^void dwc3_gadget_uboot_handle_interrupt(struct dwc3 *dwc)$/;"	f	typeref:typename:void
dwc3_gadget_wakeup	drivers/usb/dwc3/gadget.c	/^static int dwc3_gadget_wakeup(struct usb_gadget *g)$/;"	f	typeref:typename:int	file:
dwc3_gadget_wakeup_interrupt	drivers/usb/dwc3/gadget.c	/^static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_host_exit	drivers/usb/dwc3/core.h	/^static inline void dwc3_host_exit(struct dwc3 *dwc)$/;"	f	typeref:typename:void
dwc3_host_init	drivers/usb/dwc3/core.h	/^static inline int dwc3_host_init(struct dwc3 *dwc)$/;"	f	typeref:typename:int
dwc3_hwparams	drivers/usb/dwc3/core.h	/^struct dwc3_hwparams {$/;"	s
dwc3_interrupt	drivers/usb/dwc3/gadget.c	/^static irqreturn_t dwc3_interrupt(int irq, void *_dwc)$/;"	f	typeref:typename:irqreturn_t	file:
dwc3_link_state	drivers/usb/dwc3/core.h	/^enum dwc3_link_state {$/;"	g
dwc3_omap	drivers/usb/dwc3/dwc3-omap.c	/^struct dwc3_omap {$/;"	s	file:
dwc3_omap_device	include/dwc3-omap-uboot.h	/^struct dwc3_omap_device {$/;"	s
dwc3_omap_disable_irqs	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_disable_irqs(struct dwc3_omap *omap)$/;"	f	typeref:typename:void	file:
dwc3_omap_enable_irqs	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_enable_irqs(struct dwc3_omap *omap)$/;"	f	typeref:typename:void	file:
dwc3_omap_interrupt	drivers/usb/dwc3/dwc3-omap.c	/^static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)$/;"	f	typeref:typename:irqreturn_t	file:
dwc3_omap_map_offset	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_map_offset(struct dwc3_omap *omap)$/;"	f	typeref:typename:void	file:
dwc3_omap_read_irq0_status	drivers/usb/dwc3/dwc3-omap.c	/^static u32 dwc3_omap_read_irq0_status(struct dwc3_omap *omap)$/;"	f	typeref:typename:u32	file:
dwc3_omap_read_irqmisc_status	drivers/usb/dwc3/dwc3-omap.c	/^static u32 dwc3_omap_read_irqmisc_status(struct dwc3_omap *omap)$/;"	f	typeref:typename:u32	file:
dwc3_omap_read_utmi_status	drivers/usb/dwc3/dwc3-omap.c	/^static u32 dwc3_omap_read_utmi_status(struct dwc3_omap *omap)$/;"	f	typeref:typename:u32	file:
dwc3_omap_readl	drivers/usb/dwc3/dwc3-omap.c	/^static inline u32 dwc3_omap_readl(void __iomem *base, u32 offset)$/;"	f	typeref:typename:u32	file:
dwc3_omap_set_mailbox	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,$/;"	f	typeref:typename:void	file:
dwc3_omap_set_utmi_mode	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_set_utmi_mode(struct dwc3_omap *omap, int utmi_mode)$/;"	f	typeref:typename:void	file:
dwc3_omap_uboot_exit	drivers/usb/dwc3/dwc3-omap.c	/^void dwc3_omap_uboot_exit(int index)$/;"	f	typeref:typename:void
dwc3_omap_uboot_init	drivers/usb/dwc3/dwc3-omap.c	/^int dwc3_omap_uboot_init(struct dwc3_omap_device *omap_dev)$/;"	f	typeref:typename:int
dwc3_omap_uboot_interrupt_status	drivers/usb/dwc3/dwc3-omap.c	/^int dwc3_omap_uboot_interrupt_status(int index)$/;"	f	typeref:typename:int
dwc3_omap_utmi_mode	include/linux/usb/dwc3-omap.h	/^enum dwc3_omap_utmi_mode {$/;"	g
dwc3_omap_write_irq0_clr	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_irq0_clr(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_write_irq0_set	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_irq0_set(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_write_irq0_status	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_irq0_status(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_write_irqmisc_clr	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_irqmisc_clr(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_write_irqmisc_set	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_irqmisc_set(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_write_irqmisc_status	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_irqmisc_status(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_write_utmi_status	drivers/usb/dwc3/dwc3-omap.c	/^static void dwc3_omap_write_utmi_status(struct dwc3_omap *omap, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_omap_writel	drivers/usb/dwc3/dwc3-omap.c	/^static inline void dwc3_omap_writel(void __iomem *base, u32 offset, u32 value)$/;"	f	typeref:typename:void	file:
dwc3_phy	drivers/usb/dwc3/core.h	/^enum dwc3_phy {$/;"	g
dwc3_phy_reset	drivers/usb/host/xhci-dwc3.c	/^void dwc3_phy_reset(struct dwc3 *dwc3_reg)$/;"	f	typeref:typename:void
dwc3_phy_setup	drivers/usb/dwc3/core.c	/^static void dwc3_phy_setup(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_prepare_one_trb	drivers/usb/dwc3/gadget.c	/^static void dwc3_prepare_one_trb(struct dwc3_ep *dep,$/;"	f	typeref:typename:void	file:
dwc3_prepare_trbs	drivers/usb/dwc3/gadget.c	/^static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)$/;"	f	typeref:typename:void	file:
dwc3_process_event_buf	drivers/usb/dwc3/gadget.c	/^static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)$/;"	f	typeref:typename:irqreturn_t	file:
dwc3_process_event_entry	drivers/usb/dwc3/gadget.c	/^static void dwc3_process_event_entry(struct dwc3 *dwc,$/;"	f	typeref:typename:void	file:
dwc3_readl	drivers/usb/dwc3/io.h	/^static inline u32 dwc3_readl(void __iomem *base, u32 offset)$/;"	f	typeref:typename:u32
dwc3_reg	drivers/usb/host/xhci-exynos5.c	/^	struct dwc3 *dwc3_reg;$/;"	m	struct:exynos_xhci	typeref:struct:dwc3 *	file:
dwc3_reg	drivers/usb/host/xhci-keystone.c	/^	struct dwc3 *dwc3_reg;$/;"	m	struct:keystone_xhci	typeref:struct:dwc3 *	file:
dwc3_reg	drivers/usb/host/xhci-rockchip.c	/^	struct dwc3 *dwc3_reg;$/;"	m	struct:rockchip_xhci	typeref:struct:dwc3 *	file:
dwc3_reg	drivers/usb/host/xhci-zynqmp.c	/^	struct dwc3 *dwc3_reg;$/;"	m	struct:zynqmp_xhci	typeref:struct:dwc3 *	file:
dwc3_reg	include/linux/usb/xhci-fsl.h	/^	struct dwc3 *dwc3_reg;$/;"	m	struct:fsl_xhci	typeref:struct:dwc3 *
dwc3_reg	include/linux/usb/xhci-omap.h	/^	struct dwc3 *dwc3_reg;$/;"	m	struct:omap_xhci	typeref:struct:dwc3 *
dwc3_remove_requests	drivers/usb/dwc3/gadget.c	/^static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)$/;"	f	typeref:typename:void	file:
dwc3_request	drivers/usb/dwc3/core.h	/^struct dwc3_request {$/;"	s
dwc3_reset_gadget	drivers/usb/dwc3/gadget.c	/^static void dwc3_reset_gadget(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_resume_gadget	drivers/usb/dwc3/gadget.c	/^static void dwc3_resume_gadget(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_scratchpad_array	drivers/usb/dwc3/core.h	/^struct dwc3_scratchpad_array {$/;"	s
dwc3_send_gadget_ep_cmd	drivers/usb/dwc3/core.h	/^static inline int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,$/;"	f	typeref:typename:int
dwc3_send_gadget_ep_cmd	drivers/usb/dwc3/gadget.c	/^int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,$/;"	f	typeref:typename:int
dwc3_send_gadget_generic_command	drivers/usb/dwc3/core.h	/^static inline int dwc3_send_gadget_generic_command(struct dwc3 *dwc,$/;"	f	typeref:typename:int
dwc3_send_gadget_generic_command	drivers/usb/dwc3/gadget.c	/^int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)$/;"	f	typeref:typename:int
dwc3_set_fladj	drivers/usb/host/xhci-dwc3.c	/^void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)$/;"	f	typeref:typename:void
dwc3_set_mode	drivers/usb/dwc3/core.c	/^static void dwc3_set_mode(struct dwc3 *dwc, u32 mode)$/;"	f	typeref:typename:void	file:
dwc3_set_mode	drivers/usb/host/xhci-dwc3.c	/^void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)$/;"	f	typeref:typename:void
dwc3_setup_scratch_buffers	drivers/usb/dwc3/core.c	/^static int dwc3_setup_scratch_buffers(struct dwc3 *dwc)$/;"	f	typeref:typename:int	file:
dwc3_stop_active_transfer	drivers/usb/dwc3/gadget.c	/^static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)$/;"	f	typeref:typename:void	file:
dwc3_stop_active_transfers	drivers/usb/dwc3/gadget.c	/^static void dwc3_stop_active_transfers(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_suspend_gadget	drivers/usb/dwc3/gadget.c	/^static void dwc3_suspend_gadget(struct dwc3 *dwc)$/;"	f	typeref:typename:void	file:
dwc3_thread_interrupt	drivers/usb/dwc3/gadget.c	/^static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc)$/;"	f	typeref:typename:irqreturn_t	file:
dwc3_trb	drivers/usb/dwc3/core.h	/^struct dwc3_trb {$/;"	s
dwc3_trb_dma_offset	drivers/usb/dwc3/gadget.c	/^static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,$/;"	f	typeref:typename:dma_addr_t	file:
dwc3_typec0	arch/arm/dts/rk3399.dtsi	/^	dwc3_typec0: usb@fe800000 {$/;"	l
dwc3_typec1	arch/arm/dts/rk3399.dtsi	/^	dwc3_typec1: usb@fe900000 {$/;"	l
dwc3_uboot_exit	drivers/usb/dwc3/core.c	/^void dwc3_uboot_exit(int index)$/;"	f	typeref:typename:void
dwc3_uboot_handle_interrupt	drivers/usb/dwc3/core.c	/^void dwc3_uboot_handle_interrupt(int index)$/;"	f	typeref:typename:void
dwc3_uboot_init	drivers/usb/dwc3/core.c	/^int dwc3_uboot_init(struct dwc3_device *dwc3_dev)$/;"	f	typeref:typename:int
dwc3_update_ram_clk_sel	drivers/usb/dwc3/gadget.c	/^static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)$/;"	f	typeref:typename:void	file:
dwc3_wIndex_to_dep	drivers/usb/dwc3/ep0.c	/^static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)$/;"	f	typeref:struct:dwc3_ep *	file:
dwc3_writel	drivers/usb/dwc3/io.h	/^static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)$/;"	f	typeref:typename:void
dwc_ahsata_flush_cache	drivers/block/dwc_ahsata.c	/^void dwc_ahsata_flush_cache(int dev)$/;"	f	typeref:typename:void
dwc_ahsata_flush_cache_ext	drivers/block/dwc_ahsata.c	/^void dwc_ahsata_flush_cache_ext(int dev)$/;"	f	typeref:typename:void
dwc_ahsata_identify	drivers/block/dwc_ahsata.c	/^static void dwc_ahsata_identify(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
dwc_ahsata_init_wcache	drivers/block/dwc_ahsata.c	/^static void dwc_ahsata_init_wcache(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
dwc_ahsata_print_info	drivers/block/dwc_ahsata.c	/^static void dwc_ahsata_print_info(int dev)$/;"	f	typeref:typename:void	file:
dwc_ahsata_rw_cmd	drivers/block/dwc_ahsata.c	/^static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,$/;"	f	typeref:typename:u32	file:
dwc_ahsata_rw_cmd_ext	drivers/block/dwc_ahsata.c	/^static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,$/;"	f	typeref:typename:u32	file:
dwc_ahsata_rw_ncq_cmd	drivers/block/dwc_ahsata.c	/^u32 dwc_ahsata_rw_ncq_cmd(int dev, u32 start, lbaint_t blkcnt,$/;"	f	typeref:typename:u32
dwc_ahsata_xfer_mode	drivers/block/dwc_ahsata.c	/^static void dwc_ahsata_xfer_mode(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
dwc_devp	drivers/block/sata_dwc.c	/^static struct sata_dwc_device_port	dwc_devp;$/;"	v	typeref:struct:sata_dwc_device_port	file:
dwc_otg_core_host_init	drivers/usb/host/dwc2.c	/^static void dwc_otg_core_host_init(struct dwc2_core_regs *regs)$/;"	f	typeref:typename:void	file:
dwc_otg_core_init	drivers/usb/host/dwc2.c	/^static void dwc_otg_core_init(struct dwc2_priv *priv)$/;"	f	typeref:typename:void	file:
dwc_otg_core_reset	drivers/usb/host/dwc2.c	/^static void dwc_otg_core_reset(struct dwc2_core_regs *regs)$/;"	f	typeref:typename:void	file:
dwc_otg_flush_rx_fifo	drivers/usb/host/dwc2.c	/^static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)$/;"	f	typeref:typename:void	file:
dwc_otg_flush_tx_fifo	drivers/usb/host/dwc2.c	/^static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)$/;"	f	typeref:typename:void	file:
dwc_otg_hc_init	drivers/usb/host/dwc2.c	/^static void dwc_otg_hc_init(struct dwc2_core_regs *regs, uint8_t hc_num,$/;"	f	typeref:typename:void	file:
dwc_otg_hc_init_split	drivers/usb/host/dwc2.c	/^static void dwc_otg_hc_init_split(struct dwc2_hc_regs *hc_regs,$/;"	f	typeref:typename:void	file:
dwc_otg_submit_rh_msg	drivers/usb/host/dwc2.c	/^static int dwc_otg_submit_rh_msg(struct dwc2_priv *priv, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
dwc_otg_submit_rh_msg_in	drivers/usb/host/dwc2.c	/^static int dwc_otg_submit_rh_msg_in(struct dwc2_priv *priv,$/;"	f	typeref:typename:int	file:
dwc_otg_submit_rh_msg_in_configuration	drivers/usb/host/dwc2.c	/^static int dwc_otg_submit_rh_msg_in_configuration(struct usb_device *dev,$/;"	f	typeref:typename:int	file:
dwc_otg_submit_rh_msg_in_descriptor	drivers/usb/host/dwc2.c	/^static int dwc_otg_submit_rh_msg_in_descriptor(struct usb_device *dev,$/;"	f	typeref:typename:int	file:
dwc_otg_submit_rh_msg_in_status	drivers/usb/host/dwc2.c	/^static int dwc_otg_submit_rh_msg_in_status(struct dwc2_core_regs *regs,$/;"	f	typeref:typename:int	file:
dwc_otg_submit_rh_msg_out	drivers/usb/host/dwc2.c	/^static int dwc_otg_submit_rh_msg_out(struct dwc2_priv *priv,$/;"	f	typeref:typename:int	file:
dwcddr21mctl	include/synopsys/dwcddr21mctl.h	/^struct dwcddr21mctl {$/;"	s
dwmac_deassert_reset	arch/arm/mach-socfpga/misc.c	/^static void dwmac_deassert_reset(const unsigned int of_reset_id,$/;"	f	typeref:typename:void	file:
dwmac_phymode_to_modereg	arch/arm/mach-socfpga/misc.c	/^static u32 dwmac_phymode_to_modereg(const char *phymode, u32 *modereg)$/;"	f	typeref:typename:u32	file:
dwmci_bind	drivers/mmc/dw_mmc.c	/^int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg)$/;"	f	typeref:typename:int
dwmci_data_transfer	drivers/mmc/dw_mmc.c	/^static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
dwmci_exynos_priv_data	drivers/mmc/exynos_dw_mmc.c	/^struct dwmci_exynos_priv_data {$/;"	s	file:
dwmci_host	drivers/mmc/exynos_dw_mmc.c	/^static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM];$/;"	v	typeref:struct:dwmci_host[]	file:
dwmci_host	include/dwmmc.h	/^struct dwmci_host {$/;"	s
dwmci_idmac	include/dwmmc.h	/^struct dwmci_idmac {$/;"	s
dwmci_init	drivers/mmc/dw_mmc.c	/^static int dwmci_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
dwmci_ops	drivers/mmc/dw_mmc.c	/^static const struct mmc_ops dwmci_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
dwmci_prepare_data	drivers/mmc/dw_mmc.c	/^static void dwmci_prepare_data(struct dwmci_host *host,$/;"	f	typeref:typename:void	file:
dwmci_probe	drivers/mmc/dw_mmc.c	/^int dwmci_probe(struct udevice *dev)$/;"	f	typeref:typename:int
dwmci_readb	include/dwmmc.h	/^static inline u8 dwmci_readb(struct dwmci_host *host, int reg)$/;"	f	typeref:typename:u8
dwmci_readl	include/dwmmc.h	/^static inline u32 dwmci_readl(struct dwmci_host *host, int reg)$/;"	f	typeref:typename:u32
dwmci_readw	include/dwmmc.h	/^static inline u16 dwmci_readw(struct dwmci_host *host, int reg)$/;"	f	typeref:typename:u16
dwmci_send_cmd	drivers/mmc/dw_mmc.c	/^static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
dwmci_set_idma_desc	drivers/mmc/dw_mmc.c	/^static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,$/;"	f	typeref:typename:void	file:
dwmci_set_ios	drivers/mmc/dw_mmc.c	/^static int dwmci_set_ios(struct udevice *dev)$/;"	f	typeref:typename:int	file:
dwmci_set_transfer_mode	drivers/mmc/dw_mmc.c	/^static int dwmci_set_transfer_mode(struct dwmci_host *host,$/;"	f	typeref:typename:int	file:
dwmci_setup_bus	drivers/mmc/dw_mmc.c	/^static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)$/;"	f	typeref:typename:int	file:
dwmci_setup_cfg	drivers/mmc/dw_mmc.c	/^void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,$/;"	f	typeref:typename:void
dwmci_socfpga_priv_data	drivers/mmc/socfpga_dw_mmc.c	/^struct dwmci_socfpga_priv_data {$/;"	s	file:
dwmci_wait_reset	drivers/mmc/dw_mmc.c	/^static int dwmci_wait_reset(struct dwmci_host *host, u32 value)$/;"	f	typeref:typename:int	file:
dwmci_writeb	include/dwmmc.h	/^static inline void dwmci_writeb(struct dwmci_host *host, int reg, u8 val)$/;"	f	typeref:typename:void
dwmci_writel	include/dwmmc.h	/^static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val)$/;"	f	typeref:typename:void
dwmci_writew	include/dwmmc.h	/^static inline void dwmci_writew(struct dwmci_host *host, int reg, u16 val)$/;"	f	typeref:typename:void
dword	drivers/net/lan91c96.h	/^typedef unsigned long int		dword;$/;"	t	typeref:typename:unsigned long int
dword	drivers/net/smc91111.h	/^typedef unsigned long int		dword;$/;"	t	typeref:typename:unsigned long int
dword_io	include/ata.h	/^	unsigned short	dword_io;	\/* 0=not_implemented; 1=implemented *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
dwr	include/faraday/ftsdc010.h	/^	unsigned int	dwr;		\/* 0x40 - data window reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
dx	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	} dx[4];                \/* 0x280, 0x300, 0x380, 0x400 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:struct:sunxi_mctl_phy_reg::ddrphy_dx[4]
dx	arch/arm/include/asm/arch/dram_sun9i.h	/^	} dx[4];                \/* 0x280, 0x300, 0x380, 0x400 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:struct:sunxi_mctl_phy_reg::ddrphy_dx[4]
dx	drivers/bios_emulator/include/biosemu.h	/^	u16 dx, dx_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
dx	drivers/bios_emulator/include/biosemu.h	/^	u16 dx_hi, dx;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
dx	drivers/video/stb_truetype.h	/^   int x,dx;$/;"	m	struct:stbtt__active_edge	typeref:typename:int
dx	include/linux/fb.h	/^	__u32 dx;			\/* Where to place image *\/$/;"	m	struct:fb_image_user	typeref:typename:__u32
dx	include/linux/fb.h	/^	__u32 dx;		\/* Where to place image *\/$/;"	m	struct:fb_image	typeref:typename:__u32
dx	include/linux/fb.h	/^	__u32 dx;	\/* screen-relative *\/$/;"	m	struct:fb_fillrect	typeref:typename:__u32
dx	include/linux/fb.h	/^	__u32 dx;$/;"	m	struct:fb_copyarea	typeref:typename:__u32
dx0bdlr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0bdlr0;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0bdlr0;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0bdlr1;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0bdlr1;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0bdlr2;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0bdlr2;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0bdlr3;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0bdlr3;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0bdlr4;		\/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0bdlr4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0bdlr4;		\/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0dllcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx0dllcr;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0dllcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx0dllcr;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0dqstr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx0dqstr;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0dqstr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx0dqstr;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0dqtr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx0dqtr;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0dqtr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx0dqtr;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx0gcr;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0gcr;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx0gcr;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0gcr;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx0gsr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0gsr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx0gsr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0gsr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx0gsr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0gsr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx0gsr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0gsr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0gsr2;		\/* 0x1f4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gsr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0gsr2;		\/* 0x1f4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gtr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0gtr;		\/* 0x1f0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0gtr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0gtr;		\/* 0x1f0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0lcdlr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0lcdlr0;		\/* 0x1e0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0lcdlr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0lcdlr0;		\/* 0x1e0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0lcdlr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0lcdlr1;		\/* 0x1e4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0lcdlr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0lcdlr1;		\/* 0x1e4 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0lcdlr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0lcdlr2;		\/* 0x1e8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0lcdlr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0lcdlr2;		\/* 0x1e8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0mdlr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx0mdlr;		\/* 0x1ec *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx0mdlr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx0mdlr;		\/* 0x1ec *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1bdlr0;		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1bdlr0;		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1bdlr1;		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1bdlr1;		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1bdlr2;		\/* 0x214 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1bdlr2;		\/* 0x214 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1bdlr3;		\/* 0x218 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1bdlr3;		\/* 0x218 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1bdlr4;		\/* 0x21c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1bdlr4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1bdlr4;		\/* 0x21c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1dllcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx1dllcr;		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1dllcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx1dllcr;		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1dqstr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx1dqstr;		\/* 0x214 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1dqstr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx1dqstr;		\/* 0x214 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1dqtr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx1dqtr;		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1dqtr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx1dqtr;		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx1gcr;		\/* 0x200 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1gcr;		\/* 0x200 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx1gcr;		\/* 0x200 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1gcr;		\/* 0x200 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx1gsr0;		\/* 0x204 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1gsr0;		\/* 0x204 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx1gsr0;		\/* 0x204 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1gsr0;		\/* 0x204 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx1gsr1;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1gsr1;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx1gsr1;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1gsr1;		\/* 0x208 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1gsr2;		\/* 0x234 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gsr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1gsr2;		\/* 0x234 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gtr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1gtr;		\/* 0x230 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1gtr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1gtr;		\/* 0x230 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1lcdlr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1lcdlr0;		\/* 0x220 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1lcdlr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1lcdlr0;		\/* 0x220 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1lcdlr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1lcdlr1;		\/* 0x224 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1lcdlr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1lcdlr1;		\/* 0x224 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1lcdlr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1lcdlr2;		\/* 0x228 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1lcdlr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1lcdlr2;		\/* 0x228 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1mdlr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dx1mdlr;		\/* 0x22c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx1mdlr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dx1mdlr;		\/* 0x22c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2dllcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx2dllcr;		\/* 0x24c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2dllcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx2dllcr;		\/* 0x24c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2dqstr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx2dqstr;		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2dqstr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx2dqstr;		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2dqtr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx2dqtr;		\/* 0x250 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2dqtr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx2dqtr;		\/* 0x250 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2gcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx2gcr;		\/* 0x240 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2gcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx2gcr;		\/* 0x240 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2gsr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx2gsr0;		\/* 0x244 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2gsr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx2gsr0;		\/* 0x244 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2gsr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx2gsr1;		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx2gsr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx2gsr1;		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3dllcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx3dllcr;		\/* 0x28c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3dllcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx3dllcr;		\/* 0x28c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3dqstr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx3dqstr;		\/* 0x294 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3dqstr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx3dqstr;		\/* 0x294 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3dqtr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx3dqtr;		\/* 0x290 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3dqtr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx3dqtr;		\/* 0x290 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3gcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx3gcr;		\/* 0x280 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3gcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx3gcr;		\/* 0x280 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3gsr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx3gsr0;		\/* 0x284 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3gsr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx3gsr0;		\/* 0x284 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3gsr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dx3gsr1;		\/* 0x288 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx3gsr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dx3gsr1;		\/* 0x288 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 dx, dx_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
dx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 dx_hi, dx;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
dx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 dx_hi;$/;"	m	struct:__anon964d10140508	typeref:typename:u16
dx_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 dx_hi;$/;"	m	struct:__anon964d10140608	typeref:typename:u16
dxccr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dxccr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
dxccr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 dxccr;		\/* 0x28 DATX8 common configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 dxccr;		\/* 0x3c DATX8 common configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 dxccr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 dxccr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 dxccr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 dxccr;		\/* 0x80 DATX8 common configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 dxccr;		\/* 0x28 DATX8 common configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 dxccr;		\/* 0x3c DATX8 common configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 dxccr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 dxccr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 dxccr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
dxccr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 dxccr;		\/* 0x80 DATX8 common configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
dxdllcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dxdllcr;$/;"	m	struct:rk3288_ddr_publ_datx	typeref:typename:u32
dxdqstr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dxdqstr;$/;"	m	struct:rk3288_ddr_publ_datx	typeref:typename:u32
dxdqtr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dxdqtr;$/;"	m	struct:rk3288_ddr_publ_datx	typeref:typename:u32
dxgcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dxgcr;$/;"	m	struct:rk3288_ddr_publ_datx	typeref:typename:u32
dxgsr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 dxgsr[2];$/;"	m	struct:rk3288_ddr_publ_datx	typeref:typename:u32[2]
dy	include/linux/fb.h	/^	__u32 dy;$/;"	m	struct:fb_copyarea	typeref:typename:__u32
dy	include/linux/fb.h	/^	__u32 dy;$/;"	m	struct:fb_fillrect	typeref:typename:__u32
dy	include/linux/fb.h	/^	__u32 dy;$/;"	m	struct:fb_image	typeref:typename:__u32
dy	include/linux/fb.h	/^	__u32 dy;$/;"	m	struct:fb_image_user	typeref:typename:__u32
dyn_calib_steps	drivers/ddr/altera/sequencer.c	/^static u16 dyn_calib_steps;$/;"	v	typeref:typename:u16	file:
dyn_dtree	lib/zlib/deflate.h	/^    struct ct_data_s dyn_dtree[2*D_CODES+1]; \/* distance tree *\/$/;"	m	struct:internal_state	typeref:struct:ct_data_s[]
dyn_fifo	drivers/usb/musb-new/musb_core.h	/^	unsigned		dyn_fifo:1;	\/* dynamic FIFO supported? *\/$/;"	m	struct:musb	typeref:typename:unsigned:1
dyn_fifo	include/linux/usb/musb.h	/^	unsigned	dyn_fifo:1 __deprecated; \/* supports dynamic fifo sizing *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned
dyn_fifo_size	include/linux/usb/musb.h	/^	u8		dyn_fifo_size;	\/* dynamic size in bytes *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8
dyn_ltree	lib/zlib/deflate.h	/^    struct ct_data_s dyn_ltree[HEAP_SIZE];   \/* literal and length tree *\/$/;"	m	struct:internal_state	typeref:struct:ct_data_s[]
dyn_tree	lib/zlib/deflate.h	/^    ct_data *dyn_tree;           \/* the dynamic tree *\/$/;"	m	struct:tree_desc_s	typeref:typename:ct_data *
dynamic_odt	drivers/ddr/fsl/options.c	/^struct dynamic_odt {$/;"	s	file:
dynamic_power	include/fsl_ddr_sdram.h	/^	unsigned int dynamic_power;	\/* DYN_PWR *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
dynamic_range	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum dynamic_range {$/;"	g
dynamic_range	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int dynamic_range;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
dynfsb	arch/x86/include/asm/speedstep.h	/^	uint8_t dynfsb:1; \/* whether this is SLFM *\/$/;"	m	struct:sst_state	typeref:typename:uint8_t:1
dynrubin_decompress	fs/jffs2/compr_rubin.c	/^void dynrubin_decompress(unsigned char *data_in, unsigned char *cpage_out,$/;"	f	typeref:typename:void
e	board/freescale/common/sys_eeprom.c	/^} e;$/;"	v	typeref:struct:eeprom
e	board/varisys/common/sys_eeprom.c	/^} e;$/;"	v	typeref:struct:eeprom
e	drivers/bios_emulator/include/biosemu.h	/^	RMDWORDREGS e;$/;"	m	union:__anon964d1014070a	typeref:typename:RMDWORDREGS
e	drivers/crypto/fsl/rsa_caam.h	/^	const uint8_t *e;	\/* public exponent as byte array *\/$/;"	m	struct:pk_in_params	typeref:typename:const uint8_t *
e	drivers/mtd/ubi/ubi.h	/^	struct ubi_wl_entry *e;$/;"	m	struct:ubi_work	typeref:struct:ubi_wl_entry *
e	drivers/mtd/ubi/ubi.h	/^	struct ubi_wl_entry *e[UBI_FM_MAX_BLOCKS];$/;"	m	struct:ubi_fastmap_layout	typeref:struct:ubi_wl_entry * []
e	drivers/mtd/ubispl/ubi-wrapper.h	/^	struct ubi_wl_entry *e[UBI_FM_MAX_BLOCKS];$/;"	m	struct:ubi_fastmap_layout	typeref:struct:ubi_wl_entry * []
e	include/grlib/gptimer.h	/^	volatile ambapp_dev_gptimer_element e[8];$/;"	m	struct:__anon98dc47250208	typeref:typename:volatile ambapp_dev_gptimer_element[8]
e0	board/mpl/common/kbd.c	/^static unsigned char e0 = 0;$/;"	v	typeref:typename:unsigned char	file:
e1	scripts/kconfig/expr.c	/^#define e1 /;"	d	file:
e1000_1000t_rx_status	drivers/net/e1000.h	/^} e1000_1000t_rx_status;$/;"	t	typeref:enum:__anon7fc273450e03
e1000_1000t_rx_status_not_ok	drivers/net/e1000.h	/^	e1000_1000t_rx_status_not_ok = 0,$/;"	e	enum:__anon7fc273450e03
e1000_1000t_rx_status_ok	drivers/net/e1000.h	/^	e1000_1000t_rx_status_ok,$/;"	e	enum:__anon7fc273450e03
e1000_1000t_rx_status_undefined	drivers/net/e1000.h	/^	e1000_1000t_rx_status_undefined = 0xFF$/;"	e	enum:__anon7fc273450e03
e1000_100_full	drivers/net/e1000.h	/^	e1000_100_full = 3$/;"	e	enum:__anon7fc273450403
e1000_100_half	drivers/net/e1000.h	/^	e1000_100_half = 2,$/;"	e	enum:__anon7fc273450403
e1000_10_full	drivers/net/e1000.h	/^	e1000_10_full = 1,$/;"	e	enum:__anon7fc273450403
e1000_10_half	drivers/net/e1000.h	/^	e1000_10_half = 0,$/;"	e	enum:__anon7fc273450403
e1000_10bt_ext_dist_enable	drivers/net/e1000.h	/^} e1000_10bt_ext_dist_enable;$/;"	t	typeref:enum:__anon7fc273450a03
e1000_10bt_ext_dist_enable_lower	drivers/net/e1000.h	/^	e1000_10bt_ext_dist_enable_lower,$/;"	e	enum:__anon7fc273450a03
e1000_10bt_ext_dist_enable_normal	drivers/net/e1000.h	/^	e1000_10bt_ext_dist_enable_normal = 0,$/;"	e	enum:__anon7fc273450a03
e1000_10bt_ext_dist_enable_undefined	drivers/net/e1000.h	/^	e1000_10bt_ext_dist_enable_undefined = 0xFF$/;"	e	enum:__anon7fc273450a03
e1000_80003es2lan	drivers/net/e1000.h	/^	e1000_80003es2lan,$/;"	e	enum:__anon7fc273450103
e1000_82540	drivers/net/e1000.h	/^	e1000_82540,$/;"	e	enum:__anon7fc273450103
e1000_82541	drivers/net/e1000.h	/^	e1000_82541,$/;"	e	enum:__anon7fc273450103
e1000_82541_rev_2	drivers/net/e1000.h	/^	e1000_82541_rev_2,$/;"	e	enum:__anon7fc273450103
e1000_82542_rev2_0	drivers/net/e1000.h	/^	e1000_82542_rev2_0,$/;"	e	enum:__anon7fc273450103
e1000_82542_rev2_1	drivers/net/e1000.h	/^	e1000_82542_rev2_1,$/;"	e	enum:__anon7fc273450103
e1000_82543	drivers/net/e1000.h	/^	e1000_82543,$/;"	e	enum:__anon7fc273450103
e1000_82544	drivers/net/e1000.h	/^	e1000_82544,$/;"	e	enum:__anon7fc273450103
e1000_82545	drivers/net/e1000.h	/^	e1000_82545,$/;"	e	enum:__anon7fc273450103
e1000_82545_rev_3	drivers/net/e1000.h	/^	e1000_82545_rev_3,$/;"	e	enum:__anon7fc273450103
e1000_82546	drivers/net/e1000.h	/^	e1000_82546,$/;"	e	enum:__anon7fc273450103
e1000_82546_rev_3	drivers/net/e1000.h	/^	e1000_82546_rev_3,$/;"	e	enum:__anon7fc273450103
e1000_82547	drivers/net/e1000.h	/^	e1000_82547,$/;"	e	enum:__anon7fc273450103
e1000_82547_rev_2	drivers/net/e1000.h	/^	e1000_82547_rev_2,$/;"	e	enum:__anon7fc273450103
e1000_82571	drivers/net/e1000.h	/^	e1000_82571,$/;"	e	enum:__anon7fc273450103
e1000_82572	drivers/net/e1000.h	/^	e1000_82572,$/;"	e	enum:__anon7fc273450103
e1000_82573	drivers/net/e1000.h	/^	e1000_82573,$/;"	e	enum:__anon7fc273450103
e1000_82574	drivers/net/e1000.h	/^	e1000_82574,$/;"	e	enum:__anon7fc273450103
e1000_acquire_eeprom	drivers/net/e1000.c	/^int32_t e1000_acquire_eeprom(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t
e1000_auto_x_mode	drivers/net/e1000.h	/^} e1000_auto_x_mode;$/;"	t	typeref:enum:__anon7fc273450d03
e1000_auto_x_mode_auto1	drivers/net/e1000.h	/^	e1000_auto_x_mode_auto1,$/;"	e	enum:__anon7fc273450d03
e1000_auto_x_mode_auto2	drivers/net/e1000.h	/^	e1000_auto_x_mode_auto2,$/;"	e	enum:__anon7fc273450d03
e1000_auto_x_mode_manual_mdi	drivers/net/e1000.h	/^	e1000_auto_x_mode_manual_mdi = 0,$/;"	e	enum:__anon7fc273450d03
e1000_auto_x_mode_manual_mdix	drivers/net/e1000.h	/^	e1000_auto_x_mode_manual_mdix,$/;"	e	enum:__anon7fc273450d03
e1000_auto_x_mode_undefined	drivers/net/e1000.h	/^	e1000_auto_x_mode_undefined = 0xFF$/;"	e	enum:__anon7fc273450d03
e1000_bus_speed	drivers/net/e1000.h	/^} e1000_bus_speed;$/;"	t	typeref:enum:__anon7fc273450703
e1000_bus_speed_100	drivers/net/e1000.h	/^	e1000_bus_speed_100,$/;"	e	enum:__anon7fc273450703
e1000_bus_speed_133	drivers/net/e1000.h	/^	e1000_bus_speed_133,$/;"	e	enum:__anon7fc273450703
e1000_bus_speed_33	drivers/net/e1000.h	/^	e1000_bus_speed_33,$/;"	e	enum:__anon7fc273450703
e1000_bus_speed_66	drivers/net/e1000.h	/^	e1000_bus_speed_66,$/;"	e	enum:__anon7fc273450703
e1000_bus_speed_reserved	drivers/net/e1000.h	/^	e1000_bus_speed_reserved$/;"	e	enum:__anon7fc273450703
e1000_bus_speed_unknown	drivers/net/e1000.h	/^	e1000_bus_speed_unknown = 0,$/;"	e	enum:__anon7fc273450703
e1000_bus_type	drivers/net/e1000.h	/^} e1000_bus_type;$/;"	t	typeref:enum:__anon7fc273450603
e1000_bus_type_pci	drivers/net/e1000.h	/^	e1000_bus_type_pci,$/;"	e	enum:__anon7fc273450603
e1000_bus_type_pci_express	drivers/net/e1000.h	/^	e1000_bus_type_pci_express,$/;"	e	enum:__anon7fc273450603
e1000_bus_type_pcix	drivers/net/e1000.h	/^	e1000_bus_type_pcix,$/;"	e	enum:__anon7fc273450603
e1000_bus_type_reserved	drivers/net/e1000.h	/^	e1000_bus_type_reserved$/;"	e	enum:__anon7fc273450603
e1000_bus_type_unknown	drivers/net/e1000.h	/^	e1000_bus_type_unknown = 0,$/;"	e	enum:__anon7fc273450603
e1000_bus_width	drivers/net/e1000.h	/^} e1000_bus_width;$/;"	t	typeref:enum:__anon7fc273450803
e1000_bus_width_32	drivers/net/e1000.h	/^	e1000_bus_width_32,$/;"	e	enum:__anon7fc273450803
e1000_bus_width_64	drivers/net/e1000.h	/^	e1000_bus_width_64$/;"	e	enum:__anon7fc273450803
e1000_bus_width_unknown	drivers/net/e1000.h	/^	e1000_bus_width_unknown = 0,$/;"	e	enum:__anon7fc273450803
e1000_cable_length	drivers/net/e1000.h	/^} e1000_cable_length;$/;"	t	typeref:enum:__anon7fc273450903
e1000_cable_length_110_140	drivers/net/e1000.h	/^	e1000_cable_length_110_140,$/;"	e	enum:__anon7fc273450903
e1000_cable_length_140	drivers/net/e1000.h	/^	e1000_cable_length_140,$/;"	e	enum:__anon7fc273450903
e1000_cable_length_50	drivers/net/e1000.h	/^	e1000_cable_length_50 = 0,$/;"	e	enum:__anon7fc273450903
e1000_cable_length_50_80	drivers/net/e1000.h	/^	e1000_cable_length_50_80,$/;"	e	enum:__anon7fc273450903
e1000_cable_length_80_110	drivers/net/e1000.h	/^	e1000_cable_length_80_110,$/;"	e	enum:__anon7fc273450903
e1000_cable_length_undefined	drivers/net/e1000.h	/^	e1000_cable_length_undefined = 0xFF$/;"	e	enum:__anon7fc273450903
e1000_check_for_link	drivers/net/e1000.c	/^e1000_check_for_link(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_check_mng_mode	drivers/net/e1000.c	/^e1000_check_mng_mode(struct e1000_hw *hw)$/;"	f	typeref:typename:bool
e1000_check_phy_reset_block	drivers/net/e1000.c	/^e1000_check_phy_reset_block(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t
e1000_clear_vfta	drivers/net/e1000.c	/^e1000_clear_vfta(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_config_collision_dist	drivers/net/e1000.c	/^e1000_config_collision_dist(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_config_fc_after_link_up	drivers/net/e1000.c	/^e1000_config_fc_after_link_up(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_config_mac_to_phy	drivers/net/e1000.c	/^e1000_config_mac_to_phy(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_configure_kmrn_for_1000	drivers/net/e1000.c	/^e1000_configure_kmrn_for_1000(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_configure_kmrn_for_10_100	drivers/net/e1000.c	/^e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, uint16_t duplex)$/;"	f	typeref:typename:int32_t	file:
e1000_configure_rx	drivers/net/e1000.c	/^e1000_configure_rx(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_configure_tx	drivers/net/e1000.c	/^e1000_configure_tx(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_context_desc	drivers/net/e1000.h	/^struct e1000_context_desc {$/;"	s
e1000_copper_link_autoneg	drivers/net/e1000.c	/^e1000_copper_link_autoneg(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_copper_link_ggp_setup	drivers/net/e1000.c	/^e1000_copper_link_ggp_setup(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_copper_link_igp_setup	drivers/net/e1000.c	/^e1000_copper_link_igp_setup(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_copper_link_mgp_setup	drivers/net/e1000.c	/^e1000_copper_link_mgp_setup(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_copper_link_postconfig	drivers/net/e1000.c	/^e1000_copper_link_postconfig(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_copper_link_preconfig	drivers/net/e1000.c	/^e1000_copper_link_preconfig(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_data_desc	drivers/net/e1000.h	/^struct e1000_data_desc {$/;"	s
e1000_detect_gig_phy	drivers/net/e1000.c	/^e1000_detect_gig_phy(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_disable	drivers/net/e1000.c	/^e1000_disable(struct eth_device *nic)$/;"	f	typeref:typename:void	file:
e1000_dsp_config	drivers/net/e1000.h	/^} e1000_dsp_config;$/;"	t	typeref:enum:__anon7fc273451f03
e1000_dsp_config_activated	drivers/net/e1000.h	/^    e1000_dsp_config_activated,$/;"	e	enum:__anon7fc273451f03
e1000_dsp_config_disabled	drivers/net/e1000.h	/^    e1000_dsp_config_disabled = 0,$/;"	e	enum:__anon7fc273451f03
e1000_dsp_config_enabled	drivers/net/e1000.h	/^    e1000_dsp_config_enabled,$/;"	e	enum:__anon7fc273451f03
e1000_dsp_config_undefined	drivers/net/e1000.h	/^    e1000_dsp_config_undefined = 0xFF$/;"	e	enum:__anon7fc273451f03
e1000_eeprom_flash	drivers/net/e1000.h	/^	e1000_eeprom_flash,$/;"	e	enum:__anon7fc273450303
e1000_eeprom_ich8	drivers/net/e1000.h	/^	e1000_eeprom_ich8,$/;"	e	enum:__anon7fc273450303
e1000_eeprom_info	drivers/net/e1000.h	/^struct e1000_eeprom_info {$/;"	s
e1000_eeprom_invm	drivers/net/e1000.h	/^	e1000_eeprom_invm,$/;"	e	enum:__anon7fc273450303
e1000_eeprom_microwire	drivers/net/e1000.h	/^	e1000_eeprom_microwire,$/;"	e	enum:__anon7fc273450303
e1000_eeprom_none	drivers/net/e1000.h	/^	e1000_eeprom_none, \/* No NVM support *\/$/;"	e	enum:__anon7fc273450303
e1000_eeprom_spi	drivers/net/e1000.h	/^	e1000_eeprom_spi,$/;"	e	enum:__anon7fc273450303
e1000_eeprom_type	drivers/net/e1000.h	/^} e1000_eeprom_type;$/;"	t	typeref:enum:__anon7fc273450303
e1000_eeprom_uninitialized	drivers/net/e1000.h	/^	e1000_eeprom_uninitialized = 0,$/;"	e	enum:__anon7fc273450303
e1000_eth_bind	drivers/net/e1000.c	/^static int e1000_eth_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
e1000_eth_ids	drivers/net/e1000.c	/^static const struct udevice_id e1000_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
e1000_eth_ops	drivers/net/e1000.c	/^static const struct eth_ops e1000_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
e1000_eth_probe	drivers/net/e1000.c	/^static int e1000_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
e1000_eth_recv	drivers/net/e1000.c	/^static int e1000_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
e1000_eth_send	drivers/net/e1000.c	/^static int e1000_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
e1000_eth_start	drivers/net/e1000.c	/^static int e1000_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
e1000_eth_stop	drivers/net/e1000.c	/^static void e1000_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
e1000_fc_default	drivers/net/e1000.h	/^	e1000_fc_default = 0xFF$/;"	e	enum:__anon7fc273450503
e1000_fc_full	drivers/net/e1000.h	/^	e1000_fc_full = 3,$/;"	e	enum:__anon7fc273450503
e1000_fc_none	drivers/net/e1000.h	/^	e1000_fc_none = 0,$/;"	e	enum:__anon7fc273450503
e1000_fc_rx_pause	drivers/net/e1000.h	/^	e1000_fc_rx_pause = 1,$/;"	e	enum:__anon7fc273450503
e1000_fc_tx_pause	drivers/net/e1000.h	/^	e1000_fc_tx_pause = 2,$/;"	e	enum:__anon7fc273450503
e1000_fc_type	drivers/net/e1000.h	/^} e1000_fc_type;$/;"	t	typeref:enum:__anon7fc273450503
e1000_ffe_config	drivers/net/e1000.h	/^} e1000_ffe_config;$/;"	t	typeref:enum:__anon7fc273452103
e1000_ffe_config_active	drivers/net/e1000.h	/^    e1000_ffe_config_active,$/;"	e	enum:__anon7fc273452103
e1000_ffe_config_blocked	drivers/net/e1000.h	/^    e1000_ffe_config_blocked$/;"	e	enum:__anon7fc273452103
e1000_ffe_config_enabled	drivers/net/e1000.h	/^    e1000_ffe_config_enabled = 0,$/;"	e	enum:__anon7fc273452103
e1000_fflt_entry	drivers/net/e1000.h	/^struct e1000_fflt_entry {$/;"	s
e1000_ffmt_entry	drivers/net/e1000.h	/^struct e1000_ffmt_entry {$/;"	s
e1000_ffvt_entry	drivers/net/e1000.h	/^struct e1000_ffvt_entry {$/;"	s
e1000_find_card	drivers/net/e1000.c	/^struct e1000_hw *e1000_find_card(unsigned int cardnum)$/;"	f	typeref:struct:e1000_hw *
e1000_force_mac_fc	drivers/net/e1000.c	/^e1000_force_mac_fc(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_free_pkt	drivers/net/e1000.c	/^static int e1000_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
e1000_get_bus_type	drivers/net/e1000.c	/^void e1000_get_bus_type(struct e1000_hw *hw)$/;"	f	typeref:typename:void
e1000_get_hw_eeprom_semaphore	drivers/net/e1000.c	/^e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_get_phy_cfg_done	drivers/net/e1000.c	/^e1000_get_phy_cfg_done(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_get_software_semaphore	drivers/net/e1000.c	/^e1000_get_software_semaphore(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_get_speed_and_duplex	drivers/net/e1000.c	/^e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t *speed,$/;"	f	typeref:typename:int	file:
e1000_hw	drivers/net/e1000.h	/^struct e1000_hw {$/;"	s
e1000_hw_from_spi	drivers/net/e1000_spi.c	/^static inline struct e1000_hw *e1000_hw_from_spi(struct spi_slave *spi)$/;"	f	typeref:struct:e1000_hw *	file:
e1000_hw_stats	drivers/net/e1000.h	/^struct e1000_hw_stats {$/;"	s
e1000_ich8lan	drivers/net/e1000.h	/^	e1000_ich8lan,$/;"	e	enum:__anon7fc273450103
e1000_igb	drivers/net/e1000.h	/^	e1000_igb,$/;"	e	enum:__anon7fc273450103
e1000_init	drivers/net/e1000.c	/^e1000_init(struct eth_device *nic, bd_t *bis)$/;"	f	typeref:typename:int	file:
e1000_init_eeprom_params	drivers/net/e1000.c	/^static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_init_hw	drivers/net/e1000.c	/^e1000_init_hw(struct e1000_hw *hw, unsigned char enetaddr[6])$/;"	f	typeref:typename:int	file:
e1000_init_one	drivers/net/e1000.c	/^static int e1000_init_one(struct e1000_hw *hw, int cardnum,$/;"	f	typeref:typename:int	file:
e1000_init_rx_addrs	drivers/net/e1000.c	/^e1000_init_rx_addrs(struct e1000_hw *hw, unsigned char enetaddr[6])$/;"	f	typeref:typename:void	file:
e1000_initialize	drivers/net/e1000.c	/^e1000_initialize(bd_t * bis)$/;"	f	typeref:typename:int
e1000_initialize_hardware_bits	drivers/net/e1000.c	/^e1000_initialize_hardware_bits(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_ipv4_at_entry	drivers/net/e1000.h	/^struct e1000_ipv4_at_entry {$/;"	s
e1000_ipv6_at_entry	drivers/net/e1000.h	/^struct e1000_ipv6_at_entry {$/;"	s
e1000_is_onboard_nvm_eeprom	drivers/net/e1000.c	/^static bool e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)$/;"	f	typeref:typename:bool	file:
e1000_is_second_port	drivers/net/e1000.c	/^static bool e1000_is_second_port(struct e1000_hw *hw)$/;"	f	typeref:typename:bool	file:
e1000_lower_ee_clk	drivers/net/e1000.c	/^void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t * eecd)$/;"	f	typeref:typename:void
e1000_lower_mdi_clk	drivers/net/e1000.c	/^e1000_lower_mdi_clk(struct e1000_hw *hw, uint32_t * ctrl)$/;"	f	typeref:typename:void	file:
e1000_mac_type	drivers/net/e1000.h	/^} e1000_mac_type;$/;"	t	typeref:enum:__anon7fc273450103
e1000_media_type	drivers/net/e1000.h	/^} e1000_media_type;$/;"	t	typeref:enum:__anon7fc273450203
e1000_media_type_copper	drivers/net/e1000.h	/^	e1000_media_type_copper = 0,$/;"	e	enum:__anon7fc273450203
e1000_media_type_fiber	drivers/net/e1000.h	/^	e1000_media_type_fiber = 1,$/;"	e	enum:__anon7fc273450203
e1000_media_type_internal_serdes	drivers/net/e1000.h	/^	e1000_media_type_internal_serdes = 2,$/;"	e	enum:__anon7fc273450203
e1000_ms_auto	drivers/net/e1000.h	/^    e1000_ms_auto$/;"	e	enum:__anon7fc273452003
e1000_ms_force_master	drivers/net/e1000.h	/^    e1000_ms_force_master,$/;"	e	enum:__anon7fc273452003
e1000_ms_force_slave	drivers/net/e1000.h	/^    e1000_ms_force_slave,$/;"	e	enum:__anon7fc273452003
e1000_ms_hw_default	drivers/net/e1000.h	/^    e1000_ms_hw_default = 0,$/;"	e	enum:__anon7fc273452003
e1000_ms_type	drivers/net/e1000.h	/^} e1000_ms_type;$/;"	t	typeref:enum:__anon7fc273452003
e1000_name	drivers/net/e1000.c	/^static void e1000_name(char *str, int cardnum)$/;"	f	typeref:typename:void	file:
e1000_num_eeprom_types	drivers/net/e1000.h	/^	e1000_num_eeprom_types$/;"	e	enum:__anon7fc273450303
e1000_num_macs	drivers/net/e1000.h	/^	e1000_num_macs$/;"	e	enum:__anon7fc273450103
e1000_num_media_types	drivers/net/e1000.h	/^	e1000_num_media_types$/;"	e	enum:__anon7fc273450203
e1000_phy_bm	drivers/net/e1000.h	/^	e1000_phy_bm,$/;"	e	enum:__anon7fc273450f03
e1000_phy_gg82563	drivers/net/e1000.h	/^	e1000_phy_gg82563,$/;"	e	enum:__anon7fc273450f03
e1000_phy_hw_reset	drivers/net/e1000.c	/^e1000_phy_hw_reset(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t
e1000_phy_ife	drivers/net/e1000.h	/^	e1000_phy_ife,$/;"	e	enum:__anon7fc273450f03
e1000_phy_igb	drivers/net/e1000.h	/^	e1000_phy_igb,$/;"	e	enum:__anon7fc273450f03
e1000_phy_igp	drivers/net/e1000.h	/^	e1000_phy_igp,$/;"	e	enum:__anon7fc273450f03
e1000_phy_igp_2	drivers/net/e1000.h	/^	e1000_phy_igp_2,$/;"	e	enum:__anon7fc273450f03
e1000_phy_igp_3	drivers/net/e1000.h	/^	e1000_phy_igp_3,$/;"	e	enum:__anon7fc273450f03
e1000_phy_info	drivers/net/e1000.h	/^struct e1000_phy_info {$/;"	s
e1000_phy_init_script	drivers/net/e1000.c	/^e1000_phy_init_script(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_phy_m88	drivers/net/e1000.h	/^	e1000_phy_m88 = 0,$/;"	e	enum:__anon7fc273450f03
e1000_phy_reset	drivers/net/e1000.c	/^e1000_phy_reset(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t
e1000_phy_setup_autoneg	drivers/net/e1000.c	/^e1000_phy_setup_autoneg(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t
e1000_phy_stats	drivers/net/e1000.h	/^struct e1000_phy_stats {$/;"	s
e1000_phy_type	drivers/net/e1000.h	/^} e1000_phy_type;$/;"	t	typeref:enum:__anon7fc273450f03
e1000_phy_undefined	drivers/net/e1000.h	/^	e1000_phy_undefined = 0xFF$/;"	e	enum:__anon7fc273450f03
e1000_polarity_reversal	drivers/net/e1000.h	/^} e1000_polarity_reversal;$/;"	t	typeref:enum:__anon7fc273450c03
e1000_polarity_reversal_disabled	drivers/net/e1000.h	/^	e1000_polarity_reversal_disabled,$/;"	e	enum:__anon7fc273450c03
e1000_polarity_reversal_enabled	drivers/net/e1000.h	/^	e1000_polarity_reversal_enabled = 0,$/;"	e	enum:__anon7fc273450c03
e1000_polarity_reversal_undefined	drivers/net/e1000.h	/^	e1000_polarity_reversal_undefined = 0xFF$/;"	e	enum:__anon7fc273450c03
e1000_poll	drivers/net/e1000.c	/^e1000_poll(struct eth_device *nic)$/;"	f	typeref:typename:int	file:
e1000_poll_eerd_eewr_done	drivers/net/e1000.c	/^e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)$/;"	f	typeref:typename:int32_t	file:
e1000_put_hw_eeprom_semaphore	drivers/net/e1000.c	/^e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_raise_ee_clk	drivers/net/e1000.c	/^void e1000_raise_ee_clk(struct e1000_hw *hw, uint32_t * eecd)$/;"	f	typeref:typename:void
e1000_raise_mdi_clk	drivers/net/e1000.c	/^e1000_raise_mdi_clk(struct e1000_hw *hw, uint32_t * ctrl)$/;"	f	typeref:typename:void	file:
e1000_rar	drivers/net/e1000.h	/^struct e1000_rar {$/;"	s
e1000_read_eeprom	drivers/net/e1000.c	/^e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,$/;"	f	typeref:typename:int32_t	file:
e1000_read_eeprom_eerd	drivers/net/e1000.c	/^e1000_read_eeprom_eerd(struct e1000_hw *hw,$/;"	f	typeref:typename:int32_t	file:
e1000_read_kmrn_reg	drivers/net/e1000.c	/^e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data)$/;"	f	typeref:typename:int32_t	file:
e1000_read_mac_addr	drivers/net/e1000.c	/^e1000_read_mac_addr(struct e1000_hw *hw, unsigned char enetaddr[6])$/;"	f	typeref:typename:int	file:
e1000_read_phy_reg	drivers/net/e1000.c	/^e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t * phy_data)$/;"	f	typeref:typename:int	file:
e1000_release_eeprom	drivers/net/e1000.c	/^void e1000_release_eeprom(struct e1000_hw *hw)$/;"	f	typeref:typename:void
e1000_reset	drivers/net/e1000.c	/^e1000_reset(struct e1000_hw *hw, unsigned char enetaddr[6])$/;"	f	typeref:typename:int	file:
e1000_reset_hw	drivers/net/e1000.c	/^e1000_reset_hw(struct e1000_hw *hw)$/;"	f	typeref:typename:void
e1000_rev_polarity	drivers/net/e1000.h	/^} e1000_rev_polarity;$/;"	t	typeref:enum:__anon7fc273450b03
e1000_rev_polarity_normal	drivers/net/e1000.h	/^	e1000_rev_polarity_normal = 0,$/;"	e	enum:__anon7fc273450b03
e1000_rev_polarity_reversed	drivers/net/e1000.h	/^	e1000_rev_polarity_reversed,$/;"	e	enum:__anon7fc273450b03
e1000_rev_polarity_undefined	drivers/net/e1000.h	/^	e1000_rev_polarity_undefined = 0xFF$/;"	e	enum:__anon7fc273450b03
e1000_rx_desc	drivers/net/e1000.h	/^struct e1000_rx_desc {$/;"	s
e1000_set_d0_lplu_state	drivers/net/e1000.c	/^e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)$/;"	f	typeref:typename:int32_t	file:
e1000_set_d3_lplu_state	drivers/net/e1000.c	/^e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active)$/;"	f	typeref:typename:int32_t	file:
e1000_set_mac_type	drivers/net/e1000.c	/^e1000_set_mac_type(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t
e1000_set_media_type	drivers/net/e1000.c	/^e1000_set_media_type(struct e1000_hw *hw)$/;"	f	typeref:typename:void
e1000_set_phy_mode	drivers/net/e1000.c	/^e1000_set_phy_mode(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_set_phy_type	drivers/net/e1000.c	/^static int e1000_set_phy_type (struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_setup_copper_link	drivers/net/e1000.c	/^e1000_setup_copper_link(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_setup_fiber_link	drivers/net/e1000.c	/^e1000_setup_fiber_link(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_setup_link	drivers/net/e1000.c	/^e1000_setup_link(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_setup_rctl	drivers/net/e1000.c	/^e1000_setup_rctl(struct e1000_hw *hw)$/;"	f	typeref:typename:void	file:
e1000_shift_in_ee_bits	drivers/net/e1000.c	/^e1000_shift_in_ee_bits(struct e1000_hw *hw, uint16_t count)$/;"	f	typeref:typename:uint16_t	file:
e1000_shift_in_mdi_bits	drivers/net/e1000.c	/^e1000_shift_in_mdi_bits(struct e1000_hw *hw)$/;"	f	typeref:typename:uint16_t	file:
e1000_shift_out_ee_bits	drivers/net/e1000.c	/^e1000_shift_out_ee_bits(struct e1000_hw *hw, uint16_t data, uint16_t count)$/;"	f	typeref:typename:void	file:
e1000_shift_out_mdi_bits	drivers/net/e1000.c	/^e1000_shift_out_mdi_bits(struct e1000_hw *hw, uint32_t data, uint16_t count)$/;"	f	typeref:typename:void	file:
e1000_smart_speed	drivers/net/e1000.h	/^} e1000_smart_speed;$/;"	t	typeref:enum:__anon7fc273451e03
e1000_smart_speed_default	drivers/net/e1000.h	/^    e1000_smart_speed_default = 0,$/;"	e	enum:__anon7fc273451e03
e1000_smart_speed_off	drivers/net/e1000.h	/^    e1000_smart_speed_off$/;"	e	enum:__anon7fc273451e03
e1000_smart_speed_on	drivers/net/e1000.h	/^    e1000_smart_speed_on,$/;"	e	enum:__anon7fc273451e03
e1000_speed_duplex_type	drivers/net/e1000.h	/^} e1000_speed_duplex_type;$/;"	t	typeref:enum:__anon7fc273450403
e1000_spi_eeprom_disable_wr	drivers/net/e1000_spi.c	/^static __maybe_unused int e1000_spi_eeprom_disable_wr(struct e1000_hw *hw,$/;"	f	typeref:typename:__maybe_unused int	file:
e1000_spi_eeprom_dump	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_dump(struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_enable_wr	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_enable_wr(struct e1000_hw *hw, bool intr)$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_poll_ready	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_poll_ready(struct e1000_hw *hw, bool intr)$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_program	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_program(struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_read_page	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_read_page(struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_read_status	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_read_status(struct e1000_hw *hw, bool intr)$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_ready	drivers/net/e1000.c	/^e1000_spi_eeprom_ready(struct e1000_hw *hw)$/;"	f	typeref:typename:int32_t	file:
e1000_spi_eeprom_write_page	drivers/net/e1000_spi.c	/^static int e1000_spi_eeprom_write_page(struct e1000_hw *hw,$/;"	f	typeref:typename:int	file:
e1000_spi_eeprom_write_status	drivers/net/e1000_spi.c	/^static __maybe_unused int e1000_spi_eeprom_write_status(struct e1000_hw *hw,$/;"	f	typeref:typename:__maybe_unused int	file:
e1000_spi_xfer	drivers/net/e1000_spi.c	/^static int e1000_spi_xfer(struct e1000_hw *hw, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
e1000_standby_eeprom	drivers/net/e1000.c	/^void e1000_standby_eeprom(struct e1000_hw *hw)$/;"	f	typeref:typename:void
e1000_supported	drivers/net/e1000.c	/^static struct pci_device_id e1000_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
e1000_sw_init	drivers/net/e1000.c	/^e1000_sw_init(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_swfw_sync_acquire	drivers/net/e1000.c	/^e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask)$/;"	f	typeref:typename:int32_t	file:
e1000_swfw_sync_release	drivers/net/e1000.c	/^static void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask)$/;"	f	typeref:typename:void	file:
e1000_transmit	drivers/net/e1000.c	/^static int e1000_transmit(struct eth_device *nic, void *txpacket, int length)$/;"	f	typeref:typename:int	file:
e1000_tx_desc	drivers/net/e1000.h	/^struct e1000_tx_desc {$/;"	s
e1000_undefined	drivers/net/e1000.h	/^	e1000_undefined = 0,$/;"	e	enum:__anon7fc273450103
e1000_validate_eeprom_checksum	drivers/net/e1000.c	/^static int e1000_validate_eeprom_checksum(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_wait_autoneg	drivers/net/e1000.c	/^e1000_wait_autoneg(struct e1000_hw *hw)$/;"	f	typeref:typename:int	file:
e1000_write_kmrn_reg	drivers/net/e1000.c	/^e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data)$/;"	f	typeref:typename:int32_t	file:
e1000_write_phy_reg	drivers/net/e1000.c	/^e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data)$/;"	f	typeref:typename:int	file:
e2	scripts/kconfig/expr.c	/^#define e2 /;"	d	file:
e2220_1170_drvgrps	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
e2220_1170_gpio_inits	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^static const struct tegra_gpio_config e2220_1170_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
e2220_1170_pingrps	board/nvidia/e2220-1170/pinmux-config-e2220-1170.h	/^static const struct pmux_pingrp_config e2220_1170_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
e802_hdr	include/net.h	/^struct e802_hdr {$/;"	s
e820_entries	arch/x86/include/asm/bootparam.h	/^	__u8  e820_entries;				\/* 0x1e8 *\/$/;"	m	struct:boot_params	typeref:typename:__u8
e820_map	arch/x86/include/asm/bootparam.h	/^	struct e820entry e820_map[E820MAX];		\/* 0x2d0 *\/$/;"	m	struct:boot_params	typeref:struct:e820entry[]
e820entry	arch/x86/include/asm/e820.h	/^struct e820entry {$/;"	s
e820info	include/vxworks.h	/^struct e820info {$/;"	s
e_burst_mode	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_burst_mode_type	e_burst_mode;$/;"	m	struct:mipi_dsim_config	typeref:enum:mipi_dsim_burst_mode_type
e_byte_clk	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_byte_clk_src	e_byte_clk;$/;"	m	struct:mipi_dsim_config	typeref:enum:mipi_dsim_byte_clk_src
e_cblp	include/pe.h	/^	uint16_t e_cblp;	\/* 02: Bytes on last page of file *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_clk_src	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_byte_clk_src	e_clk_src;$/;"	m	struct:mipi_dsim_device	typeref:enum:mipi_dsim_byte_clk_src
e_cp	include/pe.h	/^	uint16_t e_cp;		\/* 04: Pages in file *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_cparhdr	include/pe.h	/^	uint16_t e_cparhdr;	\/* 08: Size of header in paragraphs *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_crlc	include/pe.h	/^	uint16_t e_crlc;	\/* 06: Relocations *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_cs	include/pe.h	/^	uint16_t e_cs;		\/* 16: Initial (relative) CS value *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_csum	include/pe.h	/^	uint16_t e_csum;	\/* 12: Checksum *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_ehsize	include/elf.h	/^	Elf32_Half	e_ehsize;	\/* ELF header size *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_entry	include/elf.h	/^	Elf32_Addr	e_entry;	\/* virtual entry point *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Addr
e_flags	include/elf.h	/^	Elf32_Word	e_flags;	\/* processor-specific flags *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Word
e_ident	include/elf.h	/^	unsigned char	e_ident[EI_NIDENT]; \/* ELF Identification *\/$/;"	m	struct:elfhdr	typeref:typename:unsigned char[]
e_interface	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_interface_type	e_interface;$/;"	m	struct:mipi_dsim_config	typeref:enum:mipi_dsim_interface_type
e_io_hv	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 e_io_hv:2;		\/* select 3.3v tolerant receivers *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
e_ip	include/pe.h	/^	uint16_t e_ip;		\/* 14: Initial IP value *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_lfanew	include/pe.h	/^	uint32_t e_lfanew;	\/* 3c: Offset to extended header *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint32_t
e_lfarlc	include/pe.h	/^	uint16_t e_lfarlc;	\/* 18: File address of relocation table *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_machine	include/elf.h	/^	Elf32_Half	e_machine;	\/* machine *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_magic	include/pe.h	/^	uint16_t e_magic;	\/* 00: MZ Header signature *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_maxalloc	include/pe.h	/^	uint16_t e_maxalloc;	\/* 0c: Maximum extra paragraphs needed *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_minalloc	include/pe.h	/^	uint16_t e_minalloc;	\/* 0a: Minimum extra paragraphs needed *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_no_data_lane	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_no_of_data_lane	e_no_data_lane;$/;"	m	struct:mipi_dsim_config	typeref:enum:mipi_dsim_no_of_data_lane
e_oemid	include/pe.h	/^	uint16_t e_oemid;	\/* 24: OEM identifier (for e_oeminfo) *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_oeminfo	include/pe.h	/^	uint16_t e_oeminfo;	\/* 26: OEM information; e_oemid specific *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_ovno	include/pe.h	/^	uint16_t e_ovno;	\/* 1a: Overlay number *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_phentsize	include/elf.h	/^	Elf32_Half	e_phentsize;	\/* program header entry size *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_phnum	include/elf.h	/^	Elf32_Half	e_phnum;	\/* number of program header entries *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_phoff	include/elf.h	/^	Elf32_Off	e_phoff;	\/* program header table offset *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Off
e_pixel_format	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_pixel_format	e_pixel_format;$/;"	m	struct:mipi_dsim_config	typeref:enum:mipi_dsim_pixel_format
e_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u32 e_reg;$/;"	m	struct:__anon39451e6d0108	typeref:typename:u32
e_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u32 e_reg;$/;"	m	struct:__anon39451e6d0408	typeref:typename:u32
e_res	include/pe.h	/^	uint16_t e_res[4];	\/* 1c: Reserved words *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t[4]
e_res2	include/pe.h	/^	uint16_t e_res2[10];	\/* 28: Reserved words *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t[10]
e_shentsize	include/elf.h	/^	Elf32_Half	e_shentsize;	\/* section header entry size *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_shnum	include/elf.h	/^	Elf32_Half	e_shnum;	\/* number of section header entries *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_shoff	include/elf.h	/^	Elf32_Off	e_shoff;	\/* section header table offset *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Off
e_shstrndx	include/elf.h	/^	Elf32_Half	e_shstrndx;	\/* section header table's "section$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_siz	drivers/crypto/fsl/rsa_caam.h	/^	uint32_t e_siz;		\/* size of e[] in number of bytes *\/$/;"	m	struct:pk_in_params	typeref:typename:uint32_t
e_sp	include/pe.h	/^	uint16_t e_sp;		\/* 10: Initial SP value *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_ss	include/pe.h	/^	uint16_t e_ss;		\/* 0e: Initial (relative) SS value *\/$/;"	m	struct:_IMAGE_DOS_HEADER	typeref:typename:uint16_t
e_status	include/fis.h	/^	u8 e_status;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
e_type	include/elf.h	/^	Elf32_Half	e_type;		\/* object file type *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Half
e_version	include/elf.h	/^	Elf32_Word	e_version;	\/* object file version *\/$/;"	m	struct:elfhdr	typeref:typename:Elf32_Word
e_virtual_ch	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	enum mipi_dsim_virtual_ch_no	e_virtual_ch;$/;"	m	struct:mipi_dsim_config	typeref:enum:mipi_dsim_virtual_ch_no
ea	arch/mips/mach-au1x00/au1x00_eth.c	/^#define ea /;"	d	file:
ea	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^#define ea /;"	d	file:
ea	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^#define ea /;"	d	file:
ea	arch/powerpc/cpu/mpc8xx/fec.c	/^#define ea /;"	d	file:
ea	arch/powerpc/cpu/mpc8xx/scc.c	/^#define ea /;"	d	file:
eabase	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	eabase;		\/* 0x24 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
eacr	arch/powerpc/include/asm/immap_512x.h	/^	u32 eacr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
eacr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 eacr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
eaddr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 eaddr;		\/* 0x0C PMECC End Address Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
ear	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ear;$/;"	m	struct:weim	typeref:typename:u32
ear	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 ear;$/;"	m	struct:weim	typeref:typename:u32
earlyEnd_directive	lib/lz4.c	/^typedef enum { full = 0, partial = 1 } earlyEnd_directive;$/;"	t	typeref:enum:__anoneaf05ef60303	file:
early_bats	arch/powerpc/cpu/mpc86xx/start.S	/^early_bats:$/;"	l
early_board_init	board/advantech/som-db5800-som-6867/start.S	/^early_board_init:$/;"	l
early_board_init	board/congatec/conga-qeval20-qa3-e3845/start.S	/^early_board_init:$/;"	l
early_board_init	board/coreboot/coreboot/coreboot_start.S	/^early_board_init:$/;"	l
early_board_init	board/dfi/dfi-bt700/start.S	/^early_board_init:$/;"	l
early_board_init	board/emulation/qemu-x86/start.S	/^early_board_init:$/;"	l
early_board_init	board/google/common/early_init.S	/^early_board_init:$/;"	l
early_board_init	board/intel/bayleybay/start.S	/^early_board_init:$/;"	l
early_board_init	board/intel/cougarcanyon2/start.S	/^early_board_init:$/;"	l
early_board_init	board/intel/crownbay/start.S	/^early_board_init:$/;"	l
early_board_init	board/intel/galileo/start.S	/^early_board_init:$/;"	l
early_board_init	board/intel/minnowmax/start.S	/^early_board_init:$/;"	l
early_board_init_ret	arch/x86/cpu/start.S	/^early_board_init_ret:$/;"	l
early_delay	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^void early_delay(int delay)$/;"	f	typeref:typename:void
early_division	arch/blackfin/include/asm/clock.h	/^static inline uint32_t early_division(uint32_t dividend, uint32_t divisor)$/;"	f	typeref:typename:uint32_t
early_erase_peb	drivers/mtd/ubi/attach.c	/^static int early_erase_peb(struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
early_get_uart_clk	arch/blackfin/include/asm/clock.h	/^static inline uint32_t early_get_uart_clk(void)$/;"	f	typeref:typename:uint32_t
early_init_EBC	board/amcc/redwood/redwood.c	/^static void early_init_EBC(void)$/;"	f	typeref:typename:void	file:
early_init_UIC	board/amcc/redwood/redwood.c	/^static void early_init_UIC(void)$/;"	f	typeref:typename:void	file:
early_map	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^static struct mm_region early_map[] = {$/;"	v	typeref:struct:mm_region[]
early_mmu_setup	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^static inline void early_mmu_setup(void)$/;"	f	typeref:typename:void	file:
early_padconf	board/ti/am57xx/mux_data.h	/^const struct pad_conf_entry early_padconf[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
early_padconf	board/ti/dra7xx/mux_data.h	/^const struct pad_conf_entry early_padconf[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
early_params	arch/nds32/include/asm/setup.h	/^struct early_params {$/;"	s
early_reinit_EBC	board/amcc/redwood/redwood.c	/^static void early_reinit_EBC(int computed_boot_device)$/;"	f	typeref:typename:void	file:
early_system_init	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void early_system_init(void)$/;"	f	typeref:typename:void
early_udelay	board/cirrus/edb93xx/edb93xx.c	/^static inline void early_udelay(uint32_t usecs)$/;"	f	typeref:typename:void	file:
easstr	include/usb/fusbh200.h	/^	uint32_t easstr;\/* 0x34: EOF&Async. Sched. Sleep Timer Register *\/$/;"	m	struct:fusbh200_regs	typeref:typename:uint32_t
easylogo_plot	arch/powerpc/cpu/mpc8xx/video.c	/^void easylogo_plot (fastimage_t * image, void *screen, int width, int x,$/;"	f	typeref:typename:void
eatcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 eatcr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
eatcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 eatcr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
eatr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eatr;		\/* 0x1e0c - MCM Error Attributes Capture Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
eav	board/bf533-stamp/video.h	/^	unsigned int eav;$/;"	m	struct:__anonaa8b6bed0108	typeref:typename:unsigned int
eax	arch/x86/include/asm/cpu.h	/^	uint32_t eax;$/;"	m	struct:cpuid_result	typeref:typename:uint32_t
eax	arch/x86/include/asm/ptrace.h	/^	long eax;$/;"	m	struct:irq_regs	typeref:typename:long
eax	arch/x86/include/asm/ptrace.h	/^	long eax;$/;"	m	struct:pt_regs	typeref:typename:long
eax	drivers/bios_emulator/include/biosemu.h	/^	u32 eax;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
eba0	drivers/video/mx3fb.c	/^	u32	eba0;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32	file:
eba0	drivers/video/mx3fb.c	/^	u32	eba0;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32	file:
eba1	drivers/video/mx3fb.c	/^	u32	eba1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32	file:
eba1	drivers/video/mx3fb.c	/^	u32	eba1;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32	file:
eba_tbl	drivers/mtd/ubi/ubi.h	/^	int *eba_tbl;$/;"	m	struct:ubi_volume	typeref:typename:int *
ebi	arch/arm/mach-at91/include/mach/at91_mc.h	/^	at91_ebi_t	ebi;		\/* 0x60	- 0x6C EBI *\/$/;"	m	struct:at91_mc	typeref:typename:at91_ebi_t
ebi_init_nor_flash	board/micronas/vct/ebi_nor_flash.c	/^int ebi_init_nor_flash(void)$/;"	f	typeref:typename:int
ebi_init_onenand	board/micronas/vct/ebi_onenand.c	/^int ebi_init_onenand(void)$/;"	f	typeref:typename:int
ebi_init_smc911x	board/micronas/vct/ebi_smc911x.c	/^int ebi_init_smc911x(void)$/;"	f	typeref:typename:int
ebi_initialize	board/micronas/vct/ebi.c	/^int ebi_initialize(void)$/;"	f	typeref:typename:int
ebi_nand_read_word	board/micronas/vct/ebi_onenand.c	/^static u16 ebi_nand_read_word(void __iomem *addr)$/;"	f	typeref:typename:u16	file:
ebi_nand_write_word	board/micronas/vct/ebi_onenand.c	/^static void ebi_nand_write_word(u16 data, void __iomem * addr)$/;"	f	typeref:typename:void	file:
ebi_read	board/micronas/vct/ebi_nor_flash.c	/^static u32 ebi_read(u32 addr)$/;"	f	typeref:typename:u32	file:
ebi_read_bufferram	board/micronas/vct/ebi_onenand.c	/^static int ebi_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
ebi_read_u16	board/micronas/vct/ebi_nor_flash.c	/^static u16 ebi_read_u16(u32 addr)$/;"	f	typeref:typename:u16	file:
ebi_read_u8	board/micronas/vct/ebi_nor_flash.c	/^static u8 ebi_read_u8(u32 addr)$/;"	f	typeref:typename:u8	file:
ebi_wait	board/micronas/vct/ebi.h	/^static inline void ebi_wait(void)$/;"	f	typeref:typename:void
ebi_write_bufferram	board/micronas/vct/ebi_onenand.c	/^static int ebi_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
ebi_write_u16	board/micronas/vct/ebi_nor_flash.c	/^static int ebi_write_u16(u32 addr, u32 data, int fetchIO)$/;"	f	typeref:typename:int	file:
ebicfg	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 ebicfg;		\/* 0x40: EBI Configuration Register *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
ebicsa	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^	u32	ebicsa;		\/* EBI Chip Select Assignment Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
ebicsa	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^	u32	ebicsa;		\/* EBI Chip Select Assignment Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
ebicsa	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^	u32	ebicsa;		\/* EBI Chip Select Assignment Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
ebicsa	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	ebicsa;$/;"	m	struct:at91_matrix	typeref:typename:u32
ebicsa	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^	u32	ebicsa;		\/* EBI Chip Select Assignment Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
ebicsa	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	ebicsa;$/;"	m	struct:at91_matrix	typeref:typename:u32
ebisr	include/faraday/ftsdmc021.h	/^	unsigned int	ebisr;		\/* 0x38 - EBI Support Register	*\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
ebp	arch/x86/include/asm/ptrace.h	/^	long ebp;$/;"	m	struct:irq_regs	typeref:typename:long
ebp	arch/x86/include/asm/ptrace.h	/^	long ebp;$/;"	m	struct:pt_regs	typeref:typename:long
ebx	arch/x86/include/asm/cpu.h	/^	uint32_t ebx;$/;"	m	struct:cpuid_result	typeref:typename:uint32_t
ebx	arch/x86/include/asm/ptrace.h	/^	long ebx;$/;"	m	struct:irq_regs	typeref:typename:long
ebx	arch/x86/include/asm/ptrace.h	/^	long ebx;$/;"	m	struct:pt_regs	typeref:typename:long
ebx	drivers/bios_emulator/include/biosemu.h	/^	u32 ebx;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
ec	drivers/mtd/ubi/ubi-media.h	/^	__be32 ec;$/;"	m	struct:ubi_fm_ec	typeref:typename:__be32
ec	drivers/mtd/ubi/ubi-media.h	/^	__be64  ec; \/* Warning: the current limit is 31-bit anyway! *\/$/;"	m	struct:ubi_ec_hdr	typeref:typename:__be64
ec	drivers/mtd/ubi/ubi.h	/^	int ec;$/;"	m	struct:ubi_ainf_peb	typeref:typename:int
ec	drivers/mtd/ubi/ubi.h	/^	int ec;$/;"	m	struct:ubi_wl_entry	typeref:typename:int
ec_claim	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^	struct gpio_desc ec_claim;$/;"	m	struct:i2c_arbitrator_priv	typeref:struct:gpio_desc	file:
ec_collect_flags	include/ec_commands.h	/^enum ec_collect_flags {$/;"	g
ec_collect_item	include/ec_commands.h	/^struct ec_collect_item {$/;"	s
ec_command	drivers/misc/cros_ec.c	/^static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,$/;"	f	typeref:typename:int	file:
ec_command_inptr	drivers/misc/cros_ec.c	/^static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd,$/;"	f	typeref:typename:int	file:
ec_comms_status	include/ec_commands.h	/^enum ec_comms_status {$/;"	g
ec_config	drivers/misc/cros_ec_sandbox.c	/^	struct fdt_cros_ec ec_config;$/;"	m	struct:ec_state	typeref:struct:fdt_cros_ec	file:
ec_count	drivers/mtd/ubi/ubi.h	/^	int ec_count;$/;"	m	struct:ubi_attach_info	typeref:typename:int
ec_current_image	include/ec_commands.h	/^enum ec_current_image {$/;"	g
ec_current_image_name	cmd/cros_ec.c	/^static const char * const ec_current_image_name[] = {"unknown", "RO", "RW"};$/;"	v	typeref:typename:const char * const[]	file:
ec_flash_region	include/ec_commands.h	/^enum ec_flash_region {$/;"	g
ec_hdr_alsize	drivers/mtd/ubi/ubi.h	/^	int ec_hdr_alsize;$/;"	m	struct:ubi_device	typeref:typename:int
ec_host_request	include/ec_commands.h	/^struct ec_host_request {$/;"	s
ec_host_response	include/ec_commands.h	/^struct ec_host_response {$/;"	s
ec_int	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		ec_int: ec-int {$/;"	l
ec_int	include/cros_ec.h	/^	struct gpio_desc ec_int;	\/* GPIO used as EC interrupt line *\/$/;"	m	struct:cros_ec_dev	typeref:struct:gpio_desc
ec_keymatrix_entry	drivers/misc/cros_ec_sandbox.c	/^struct ec_keymatrix_entry {$/;"	s	file:
ec_keyscan_seq_cmd	include/ec_commands.h	/^enum ec_keyscan_seq_cmd {$/;"	g
ec_ldo_state	include/ec_commands.h	/^enum ec_ldo_state {$/;"	g
ec_led_colors	include/ec_commands.h	/^enum ec_led_colors {$/;"	g
ec_led_id	include/ec_commands.h	/^enum ec_led_id {$/;"	g
ec_lpc_host_args	include/ec_commands.h	/^struct ec_lpc_host_args {$/;"	s
ec_major_release	include/smbios.h	/^	u8 ec_major_release;$/;"	m	struct:smbios_type0	typeref:typename:u8
ec_minor_release	include/smbios.h	/^	u8 ec_minor_release;$/;"	m	struct:smbios_type0	typeref:typename:u8
ec_mkbp_config	include/ec_commands.h	/^struct ec_mkbp_config {$/;"	s
ec_params_current_limit	include/ec_commands.h	/^struct ec_params_current_limit {$/;"	s
ec_params_entering_mode	include/ec_commands.h	/^struct ec_params_entering_mode {$/;"	s
ec_params_ext_power_current_limit	include/ec_commands.h	/^struct ec_params_ext_power_current_limit {$/;"	s
ec_params_flash_erase	include/ec_commands.h	/^struct ec_params_flash_erase {$/;"	s
ec_params_flash_protect	include/ec_commands.h	/^struct ec_params_flash_protect {$/;"	s
ec_params_flash_read	include/ec_commands.h	/^struct ec_params_flash_read {$/;"	s
ec_params_flash_region_info	include/ec_commands.h	/^struct ec_params_flash_region_info {$/;"	s
ec_params_flash_write	include/ec_commands.h	/^struct ec_params_flash_write {$/;"	s
ec_params_force_idle	include/ec_commands.h	/^struct ec_params_force_idle {$/;"	s
ec_params_get_cmd_versions	include/ec_commands.h	/^struct ec_params_get_cmd_versions {$/;"	s
ec_params_gpio_get	include/ec_commands.h	/^struct ec_params_gpio_get {$/;"	s
ec_params_gpio_set	include/ec_commands.h	/^struct ec_params_gpio_set {$/;"	s
ec_params_hello	include/ec_commands.h	/^struct ec_params_hello {$/;"	s
ec_params_host_event_mask	include/ec_commands.h	/^struct ec_params_host_event_mask {$/;"	s
ec_params_i2c_passthru	include/ec_commands.h	/^struct ec_params_i2c_passthru {$/;"	s
ec_params_i2c_passthru_msg	include/ec_commands.h	/^struct ec_params_i2c_passthru_msg {$/;"	s
ec_params_i2c_read	include/ec_commands.h	/^struct ec_params_i2c_read {$/;"	s
ec_params_i2c_write	include/ec_commands.h	/^struct ec_params_i2c_write {$/;"	s
ec_params_keyscan_seq_ctrl	include/ec_commands.h	/^struct ec_params_keyscan_seq_ctrl {$/;"	s
ec_params_ldo_get	include/ec_commands.h	/^struct ec_params_ldo_get {$/;"	s
ec_params_ldo_set	include/ec_commands.h	/^struct ec_params_ldo_set {$/;"	s
ec_params_led_control	include/ec_commands.h	/^struct ec_params_led_control {$/;"	s
ec_params_lightbar	include/ec_commands.h	/^struct ec_params_lightbar {$/;"	s
ec_params_mkbp_set_config	include/ec_commands.h	/^struct ec_params_mkbp_set_config {$/;"	s
ec_params_mkbp_simulate_key	include/ec_commands.h	/^struct ec_params_mkbp_simulate_key {$/;"	s
ec_params_pstore_read	include/ec_commands.h	/^struct ec_params_pstore_read {$/;"	s
ec_params_pstore_write	include/ec_commands.h	/^struct ec_params_pstore_write {$/;"	s
ec_params_pwm_set_fan_duty	include/ec_commands.h	/^struct ec_params_pwm_set_fan_duty {$/;"	s
ec_params_pwm_set_fan_target_rpm	include/ec_commands.h	/^struct ec_params_pwm_set_fan_target_rpm {$/;"	s
ec_params_pwm_set_keyboard_backlight	include/ec_commands.h	/^struct ec_params_pwm_set_keyboard_backlight {$/;"	s
ec_params_read_memmap	include/ec_commands.h	/^struct ec_params_read_memmap {$/;"	s
ec_params_read_test	include/ec_commands.h	/^struct ec_params_read_test {$/;"	s
ec_params_reboot_ec	include/ec_commands.h	/^struct ec_params_reboot_ec {$/;"	s
ec_params_rtc	include/ec_commands.h	/^struct ec_params_rtc {$/;"	s
ec_params_sb_rd	include/ec_commands.h	/^struct ec_params_sb_rd {$/;"	s
ec_params_sb_wr_block	include/ec_commands.h	/^struct ec_params_sb_wr_block {$/;"	s
ec_params_sb_wr_word	include/ec_commands.h	/^struct ec_params_sb_wr_word {$/;"	s
ec_params_switch_enable_backlight	include/ec_commands.h	/^struct ec_params_switch_enable_backlight {$/;"	s
ec_params_switch_enable_wireless	include/ec_commands.h	/^struct ec_params_switch_enable_wireless {$/;"	s
ec_params_temp_sensor_get_info	include/ec_commands.h	/^struct ec_params_temp_sensor_get_info {$/;"	s
ec_params_test_protocol	include/ec_commands.h	/^struct ec_params_test_protocol {$/;"	s
ec_params_thermal_get_threshold	include/ec_commands.h	/^struct ec_params_thermal_get_threshold {$/;"	s
ec_params_thermal_set_threshold	include/ec_commands.h	/^struct ec_params_thermal_set_threshold {$/;"	s
ec_params_tmp006_get_calibration	include/ec_commands.h	/^struct ec_params_tmp006_get_calibration {$/;"	s
ec_params_tmp006_set_calibration	include/ec_commands.h	/^struct ec_params_tmp006_set_calibration {$/;"	s
ec_params_usb_charge_set_mode	include/ec_commands.h	/^struct ec_params_usb_charge_set_mode {$/;"	s
ec_params_usb_mux	include/ec_commands.h	/^struct ec_params_usb_mux {$/;"	s
ec_params_vbnvcontext	include/ec_commands.h	/^struct ec_params_vbnvcontext {$/;"	s
ec_params_vboot_hash	include/ec_commands.h	/^struct ec_params_vboot_hash {$/;"	s
ec_present	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int ec_present;$/;"	m	struct:pei_data	typeref:typename:int
ec_present	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int ec_present;$/;"	m	struct:pei_data	typeref:typename:int
ec_reboot_cmd	include/ec_commands.h	/^enum ec_reboot_cmd {$/;"	g
ec_response_board_version	include/ec_commands.h	/^struct ec_response_board_version {$/;"	s
ec_response_flash_info	include/ec_commands.h	/^struct ec_response_flash_info {$/;"	s
ec_response_flash_protect	include/ec_commands.h	/^struct ec_response_flash_protect {$/;"	s
ec_response_flash_region_info	include/ec_commands.h	/^struct ec_response_flash_region_info {$/;"	s
ec_response_get_chip_info	include/ec_commands.h	/^struct ec_response_get_chip_info {$/;"	s
ec_response_get_cmd_versions	include/ec_commands.h	/^struct ec_response_get_cmd_versions {$/;"	s
ec_response_get_comms_status	include/ec_commands.h	/^struct ec_response_get_comms_status {$/;"	s
ec_response_get_protocol_info	include/ec_commands.h	/^struct ec_response_get_protocol_info {$/;"	s
ec_response_get_version	include/ec_commands.h	/^struct ec_response_get_version {$/;"	s
ec_response_gpio_get	include/ec_commands.h	/^struct ec_response_gpio_get {$/;"	s
ec_response_hello	include/ec_commands.h	/^struct ec_response_hello {$/;"	s
ec_response_host_event_mask	include/ec_commands.h	/^struct ec_response_host_event_mask {$/;"	s
ec_response_i2c_passthru	include/ec_commands.h	/^struct ec_response_i2c_passthru {$/;"	s
ec_response_i2c_read	include/ec_commands.h	/^struct ec_response_i2c_read {$/;"	s
ec_response_ldo_get	include/ec_commands.h	/^struct ec_response_ldo_get {$/;"	s
ec_response_led_control	include/ec_commands.h	/^struct ec_response_led_control {$/;"	s
ec_response_lightbar	include/ec_commands.h	/^struct ec_response_lightbar {$/;"	s
ec_response_mkbp_get_config	include/ec_commands.h	/^struct ec_response_mkbp_get_config {$/;"	s
ec_response_mkbp_info	include/ec_commands.h	/^struct ec_response_mkbp_info {$/;"	s
ec_response_port80_last_boot	include/ec_commands.h	/^struct ec_response_port80_last_boot {$/;"	s
ec_response_power_info	include/ec_commands.h	/^struct ec_response_power_info {$/;"	s
ec_response_proto_version	include/ec_commands.h	/^struct ec_response_proto_version {$/;"	s
ec_response_pstore_info	include/ec_commands.h	/^struct ec_response_pstore_info {$/;"	s
ec_response_pwm_get_fan_rpm	include/ec_commands.h	/^struct ec_response_pwm_get_fan_rpm {$/;"	s
ec_response_pwm_get_keyboard_backlight	include/ec_commands.h	/^struct ec_response_pwm_get_keyboard_backlight {$/;"	s
ec_response_read_test	include/ec_commands.h	/^struct ec_response_read_test {$/;"	s
ec_response_rtc	include/ec_commands.h	/^struct ec_response_rtc {$/;"	s
ec_response_sb_rd_block	include/ec_commands.h	/^struct ec_response_sb_rd_block {$/;"	s
ec_response_sb_rd_word	include/ec_commands.h	/^struct ec_response_sb_rd_word {$/;"	s
ec_response_temp_sensor_get_info	include/ec_commands.h	/^struct ec_response_temp_sensor_get_info {$/;"	s
ec_response_test_protocol	include/ec_commands.h	/^struct ec_response_test_protocol {$/;"	s
ec_response_thermal_get_threshold	include/ec_commands.h	/^struct ec_response_thermal_get_threshold {$/;"	s
ec_response_tmp006_get_calibration	include/ec_commands.h	/^struct ec_response_tmp006_get_calibration {$/;"	s
ec_response_vbnvcontext	include/ec_commands.h	/^struct ec_response_vbnvcontext {$/;"	s
ec_response_vboot_hash	include/ec_commands.h	/^struct ec_response_vboot_hash {$/;"	s
ec_result	include/ec_commands.h	/^	uint32_t ec_result;$/;"	m	struct:ec_params_test_protocol	typeref:typename:uint32_t
ec_result_keyscan_seq_ctrl	include/ec_commands.h	/^struct ec_result_keyscan_seq_ctrl {$/;"	s
ec_sdram_width	include/fsl_ddr_dimm_params.h	/^	unsigned int ec_sdram_width;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
ec_state	drivers/misc/cros_ec_sandbox.c	/^struct ec_state {$/;"	s	file:
ec_status	include/ec_commands.h	/^enum ec_status {$/;"	g
ec_sum	drivers/mtd/ubi/ubi.h	/^	uint64_t ec_sum;$/;"	m	struct:ubi_attach_info	typeref:typename:uint64_t
ec_vbnvcontext_op	include/ec_commands.h	/^enum ec_vbnvcontext_op {$/;"	g
ec_vboot_hash_cmd	include/ec_commands.h	/^enum ec_vboot_hash_cmd {$/;"	g
ec_vboot_hash_status	include/ec_commands.h	/^enum ec_vboot_hash_status {$/;"	g
ec_vboot_hash_type	include/ec_commands.h	/^enum ec_vboot_hash_type {$/;"	g
ecacsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ecacsr;	\/* Port error capture attributes CSR *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32
ecacsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ecacsr;	        \/* 0xc0648 - Port 0 error capture attributes register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ecamptr	drivers/qe/uec.h	/^	u32  ecamptr;             \/* external CAM address *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
ecap0	arch/arm/dts/am335x-evm.dts	/^	ecap0: ecap@48300100 {$/;"	l
ecap0	arch/arm/dts/am335x-pxm2.dtsi	/^	ecap0: ecap@48300100 {$/;"	l
ecap0	arch/arm/dts/am335x-rut.dts	/^	ecap0: ecap@48300100 {$/;"	l
ecap0	arch/arm/dts/am33xx.dtsi	/^			ecap0: ecap@48300100 {$/;"	l	label:epwmss0
ecap0	arch/arm/dts/am4372.dtsi	/^			ecap0: ecap@48300100 {$/;"	l	label:epwmss0
ecap0_in_pwm0_out	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ecap0_in_pwm0_out;$/;"	m	struct:pad_signals	typeref:typename:int
ecap0_in_pwm0_out	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int ecap0_in_pwm0_out;$/;"	m	struct:pad_signals	typeref:typename:int
ecap0_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux ecap0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
ecap0_pins	arch/arm/dts/am335x-evm.dts	/^	ecap0_pins: backlight_pins {$/;"	l
ecap0_pins	arch/arm/dts/am335x-pxm2.dtsi	/^	ecap0_pins: ecap_pins {$/;"	l
ecap0_pins	arch/arm/dts/am335x-rut.dts	/^	ecap0_pins: ecap_pins {$/;"	l
ecap0_pins	arch/arm/dts/am437x-gp-evm.dts	/^	ecap0_pins: backlight_pins {$/;"	l
ecap0_pins	arch/arm/dts/am437x-sk-evm.dts	/^	ecap0_pins: backlight_pins {$/;"	l
ecap0_pins	arch/arm/dts/am43x-epos-evm.dts	/^		ecap0_pins: backlight_pins {$/;"	l
ecap0_pins_default	arch/arm/dts/am437x-idk-evm.dts	/^	ecap0_pins_default: backlight_pins_default {$/;"	l
ecap1	arch/arm/dts/am33xx.dtsi	/^			ecap1: ecap@48302100 {$/;"	l	label:epwmss1
ecap1	arch/arm/dts/am4372.dtsi	/^			ecap1: ecap@48302100 {$/;"	l	label:epwmss1
ecap2	arch/arm/dts/am335x-evmsk.dts	/^	ecap2: ecap@48304100 {$/;"	l
ecap2	arch/arm/dts/am33xx.dtsi	/^			ecap2: ecap@48304100 {$/;"	l	label:epwmss2
ecap2	arch/arm/dts/am4372.dtsi	/^			ecap2: ecap@48304100 {$/;"	l	label:epwmss2
ecap2_pins	arch/arm/dts/am335x-evmsk.dts	/^	ecap2_pins: backlight_pins {$/;"	l
ecc	board/mpl/mip405/mip405.c	/^	unsigned char ecc;		\/* if true, ecc is enabled *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
ecc	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	u8	ecc;$/;"	m	struct:topology_update_info	typeref:typename:u8
ecc	drivers/mtd/nand/atmel_nand_ecc.h	/^		u8 ecc[56];	\/* PMECC Generated Redundancy Byte Per Sector *\/$/;"	m	struct:pmecc_regs::__anond2ed08ea0108	typeref:typename:u8[56]
ecc	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	} ecc[4];$/;"	m	struct:lpc32xx_oob	typeref:struct:lpc32xx_oob::__anon2b4937370208[4]	file:
ecc	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 ecc;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
ecc	fs/yaffs2/yaffs_guts.h	/^	unsigned ecc:12;$/;"	m	struct:yaffs_tags	typeref:typename:unsigned:12
ecc	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned ecc:12;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:12
ecc	fs/yaffs2/yaffs_packedtags2.h	/^	struct yaffs_ecc_other ecc;$/;"	m	struct:yaffs_packed_tags2	typeref:struct:yaffs_ecc_other
ecc	include/linux/mtd/nand.h	/^	struct nand_ecc_ctrl ecc;$/;"	m	struct:nand_chip	typeref:struct:nand_ecc_ctrl
ecc	include/linux/mtd/nand.h	/^	} ecc;$/;"	m	struct:nand_flash_dev	typeref:struct:nand_flash_dev::__anon4f3885c20408
ecc1	fs/yaffs2/yaffs_guts.h	/^	u8 ecc1[3];$/;"	m	struct:yaffs_spare	typeref:typename:u8[3]
ecc1	include/linux/mtd/fsmc_nand.h	/^	u32 ecc1;			\/* 0x54 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
ecc1_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc1_result;	\/* 0x200 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc2	fs/yaffs2/yaffs_guts.h	/^	u8 ecc2[3];$/;"	m	struct:yaffs_spare	typeref:typename:u8[3]
ecc2	include/linux/mtd/fsmc_nand.h	/^	u32 ecc2;			\/* 0x58 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
ecc2_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc2_result;	\/* 0x204 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc3	include/linux/mtd/fsmc_nand.h	/^	u32 ecc3;			\/* 0x5c *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
ecc3_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc3_result;	\/* 0x208 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc4_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc4_result;	\/* 0x20C *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc5_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc5_result;	\/* 0x210 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc6_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc6_result;	\/* 0x214 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc7_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc7_result;	\/* 0x218 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc8_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc8_result;	\/* 0x21C *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc9_result	include/linux/mtd/omap_gpmc.h	/^	u32 ecc9_result;	\/* 0x220 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc_auto_dec_reg	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 ecc_auto_dec_reg;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
ecc_auto_enc_reg	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 ecc_auto_enc_reg;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
ecc_bch	drivers/mtd/nand/pxa3xx_nand.c	/^	int			ecc_bch;	\/* using BCH ECC? *\/$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
ecc_bits	include/linux/bch.h	/^	unsigned int    ecc_bits;$/;"	m	struct:bch_control	typeref:typename:unsigned int
ecc_bits	include/linux/mtd/nand.h	/^	u8 ecc_bits;$/;"	m	struct:jedec_ecc_info	typeref:typename:u8
ecc_bits	include/linux/mtd/nand.h	/^	u8 ecc_bits;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
ecc_bits	include/linux/mtd/nand.h	/^	u8 ecc_bits;$/;"	m	struct:onfi_ext_ecc_info	typeref:typename:u8
ecc_bits	tools/atmelimage.c	/^	int ecc_bits;$/;"	m	struct:pmecc_config	typeref:typename:int	file:
ecc_block_0_ecc_level_sdk	tools/mxsboot.c	/^	uint32_t		ecc_block_0_ecc_level_sdk;	\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_0_ecc_type	tools/mxsboot.c	/^	uint32_t		ecc_block_0_ecc_type;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_0_size	tools/mxsboot.c	/^	uint32_t		ecc_block_0_size;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_0_size_sdk	tools/mxsboot.c	/^	uint32_t		ecc_block_0_size_sdk;		\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_n_ecc_level_sdk	tools/mxsboot.c	/^	uint32_t		ecc_block_n_ecc_level_sdk;	\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_n_ecc_type	tools/mxsboot.c	/^	uint32_t		ecc_block_n_ecc_type;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_n_size	tools/mxsboot.c	/^	uint32_t		ecc_block_n_size;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_block_n_size_sdk	tools/mxsboot.c	/^	uint32_t		ecc_block_n_size_sdk;		\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
ecc_buf	include/linux/bch.h	/^	uint32_t       *ecc_buf;$/;"	m	struct:bch_control	typeref:typename:uint32_t *
ecc_buf2	include/linux/bch.h	/^	uint32_t       *ecc_buf2;$/;"	m	struct:bch_control	typeref:typename:uint32_t *
ecc_buffer	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static u32 ecc_buffer[8]; \/* MAX ECC size *\/$/;"	v	typeref:typename:u32[8]	file:
ecc_bytes	include/ata.h	/^	unsigned short	ecc_bytes;	\/* for r\/w long cmds; 0 = not_specified *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
ecc_bytes	include/linux/bch.h	/^	unsigned int    ecc_bytes;$/;"	m	struct:bch_control	typeref:typename:unsigned int
ecc_check_status_reg	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static int ecc_check_status_reg(void)$/;"	f	typeref:typename:int	file:
ecc_clear	post/cpu/mpc83xx/ecc.c	/^static inline void ecc_clear(ddr83xx_t *ddr)$/;"	f	typeref:typename:void	file:
ecc_clear_status_reg	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static inline void ecc_clear_status_reg(void)$/;"	f	typeref:typename:void	file:
ecc_codeword_size	drivers/mtd/nand/arasan_nfc.c	/^	u32 ecc_codeword_size;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u32	file:
ecc_config	include/linux/mtd/omap_gpmc.h	/^	u32 ecc_config;		\/* 0x1F4 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc_control	include/linux/mtd/omap_gpmc.h	/^	u32 ecc_control;	\/* 0x1F8 *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc_dec_reg	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 ecc_dec_reg;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
ecc_decoder	arch/x86/cpu/intel_common/mrc.c	/^static const char *const ecc_decoder[] = {$/;"	v	typeref:typename:const char * const[]	file:
ecc_ena	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 ecc_ena;		\/* 0\/1 *\/$/;"	m	struct:dram_info	typeref:typename:u32
ecc_enable	arch/x86/cpu/quark/smc.c	/^void ecc_enable(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
ecc_enabled	arch/arm/mach-mvebu/dram.c	/^static int ecc_enabled(void)$/;"	f	typeref:typename:int	file:
ecc_enables	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t ecc_enables;		\/* 0, 1 (memory size reduced to 7\/8) *\/$/;"	m	struct:mrc_params	typeref:typename:uint8_t
ecc_enc_reg	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 ecc_enc_reg;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
ecc_err_cnt	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		ecc_err_cnt;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
ecc_err_inject	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ecc_err_inject;	\/* Memory Data Path Error Injection Mask ECC *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
ecc_err_inject	include/fsl_immap.h	/^	u32	ecc_err_inject;		\/* Data Path Err Injection Mask ECC *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ecc_err_stat	include/linux/mtd/samsung_onenand.h	/^	unsigned int	ecc_err_stat;	\/* 0x0060 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
ecc_err_stat2	include/linux/mtd/samsung_onenand.h	/^	unsigned int	ecc_err_stat2;	\/* 0x0300 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
ecc_err_stat3	include/linux/mtd/samsung_onenand.h	/^	unsigned int	ecc_err_stat3;	\/* 0x0310 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
ecc_err_stat4	include/linux/mtd/samsung_onenand.h	/^	unsigned int	ecc_err_stat4;	\/* 0x0320 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
ecc_errcnt_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 ecc_errcnt_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
ecc_info	include/linux/mtd/nand.h	/^	struct jedec_ecc_info ecc_info[4];$/;"	m	struct:nand_jedec_params	typeref:struct:jedec_ecc_info[4]
ecc_init	arch/powerpc/cpu/ppc4xx/ecc.c	/^void ecc_init(unsigned long * const start, unsigned long size)$/;"	f	typeref:typename:void
ecc_init_using_memctl	include/fsl_ddr_sdram.h	/^	unsigned int ecc_init_using_memctl;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
ecc_layout_2KB_bch4bit	drivers/mtd/nand/pxa3xx_nand.c	/^static struct nand_ecclayout ecc_layout_2KB_bch4bit = {$/;"	v	typeref:struct:nand_ecclayout	file:
ecc_layout_4KB_bch4bit	drivers/mtd/nand/pxa3xx_nand.c	/^static struct nand_ecclayout ecc_layout_4KB_bch4bit = {$/;"	v	typeref:struct:nand_ecclayout	file:
ecc_layout_4KB_bch8bit	drivers/mtd/nand/pxa3xx_nand.c	/^static struct nand_ecclayout ecc_layout_4KB_bch8bit = {$/;"	v	typeref:struct:nand_ecclayout	file:
ecc_matrix	drivers/mtd/nand/arasan_nfc.c	/^static const struct arasan_ecc_matrix ecc_matrix[] = {$/;"	v	typeref:typename:const struct arasan_ecc_matrix[]	file:
ecc_mode	include/fsl_ddr_sdram.h	/^	unsigned int ecc_mode;	 \/* Use ECC? *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
ecc_offset	tools/atmelimage.c	/^	int ecc_offset;$/;"	m	struct:pmecc_config	typeref:typename:int	file:
ecc_oob_bytes	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^		uint8_t ecc_oob_bytes[10];$/;"	m	struct:lpc32xx_oob::__anon2b4937370208	typeref:typename:uint8_t[10]	file:
ecc_port	drivers/mtd/nand/atmel_nand_ecc.h	/^	} ecc_port[PMECC_MAX_SECTOR_NUM];$/;"	m	struct:pmecc_regs	typeref:struct:pmecc_regs::__anond2ed08ea0108[]
ecc_post_test	post/cpu/mpc83xx/ecc.c	/^int ecc_post_test(int flags)$/;"	f	typeref:typename:int
ecc_post_test	post/cpu/ppc4xx/denali_ecc.c	/^int ecc_post_test(int flags)$/;"	f	typeref:typename:int
ecc_print_status	arch/powerpc/cpu/mpc83xx/ecc.c	/^void ecc_print_status(void)$/;"	f	typeref:typename:void
ecc_pup_mode_offset	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	u8	ecc_pup_mode_offset;$/;"	m	struct:topology_update_info	typeref:typename:u8
ecc_readl	drivers/mtd/nand/atmel_nand.c	/^#define ecc_readl(/;"	d	file:
ecc_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 ecc_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
ecc_result	fs/yaffs2/yaffs_guts.h	/^	enum yaffs_ecc_result ecc_result;$/;"	m	struct:yaffs_ext_tags	typeref:enum:yaffs_ecc_result
ecc_scheme	drivers/mtd/nand/omap_gpmc.c	/^	enum omap_ecc ecc_scheme;$/;"	m	struct:omap_nand_info	typeref:enum:omap_ecc	file:
ecc_scrub	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ecc_scrub; \/* 0xF4 *\/$/;"	m	struct:ddrc_regs	typeref:typename:u32
ecc_size	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		ecc_size;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
ecc_size	drivers/mtd/nand/sunxi_nand_spl.c	/^	int ecc_size;$/;"	m	struct:nfc_config	typeref:typename:int	file:
ecc_size_config	include/linux/mtd/omap_gpmc.h	/^	u32 ecc_size_config;	\/* 0x1FC *\/$/;"	m	struct:gpmc	typeref:typename:u32
ecc_sprcmd_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 ecc_sprcmd_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
ecc_stats	include/linux/mtd/mtd.h	/^	struct mtd_ecc_stats ecc_stats;$/;"	m	struct:mtd_info	typeref:struct:mtd_ecc_stats
ecc_status_result	drivers/mtd/nand/mxc_nand.h	/^	u16 ecc_status_result;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
ecc_status_result	drivers/mtd/nand/mxc_nand.h	/^	u32 ecc_status_result;$/;"	m	struct:mxc_nand_regs	typeref:typename:u32
ecc_step_ds	include/linux/mtd/nand.h	/^	uint16_t ecc_step_ds;$/;"	m	struct:nand_chip	typeref:typename:uint16_t
ecc_step_size	drivers/mtd/nand/pxa3xx_nand.h	/^	int ecc_strength, ecc_step_size;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:int
ecc_step_size	include/linux/mtd/mtd.h	/^	unsigned int ecc_step_size;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
ecc_strength	drivers/mtd/nand/pxa3xx_nand.h	/^	int ecc_strength, ecc_step_size;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:int
ecc_strength	drivers/mtd/nand/sunxi_nand_spl.c	/^	int ecc_strength;$/;"	m	struct:nfc_config	typeref:typename:int	file:
ecc_strength	include/linux/mtd/mtd.h	/^	unsigned int ecc_strength;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
ecc_strength_ds	include/linux/mtd/nand.h	/^	uint16_t ecc_strength_ds;$/;"	m	struct:nand_chip	typeref:typename:uint16_t
ecc_type	board/siemens/draco/board.c	/^static int ecc_type;$/;"	v	typeref:typename:int	file:
ecc_writel	drivers/mtd/nand/atmel_nand.c	/^#define ecc_writel(/;"	d	file:
eccaddr	drivers/mtd/nand/arasan_nfc.c	/^	u16 eccaddr;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u16	file:
eccbits	drivers/mtd/nand/arasan_nfc.c	/^	u8 eccbits;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u8	file:
eccbytes	include/linux/mtd/mtd.h	/^	__u32 eccbytes;$/;"	m	struct:nand_ecclayout	typeref:typename:__u32
eccbytes	include/mtd/mtd-abi.h	/^	__u32 eccbytes;$/;"	m	struct:nand_ecclayout_user	typeref:typename:__u32
eccbytes	include/mtd/mtd-abi.h	/^	__u32 eccbytes;$/;"	m	struct:nand_oobinfo	typeref:typename:__u32
ecccalc	include/linux/mtd/nand.h	/^	uint8_t	ecccalc[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];$/;"	m	struct:nand_buffers	typeref:typename:uint8_t[]
ecccfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ecccfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
eccclr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 eccclr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
ecccode	include/linux/mtd/nand.h	/^	uint8_t	ecccode[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];$/;"	m	struct:nand_buffers	typeref:typename:uint8_t[]
ecccr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32 ecccr1;$/;"	m	struct:dcsr_dcfg_regs	typeref:typename:u32
eccgrp_can0	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_can0;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_can1	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_can1;			\/* 0x160 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_dma	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_dma;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_emac0	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_emac0;			\/* 0x150 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_emac1	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_emac1;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_l2	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_l2;			\/* 0x140 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_nand	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_nand;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_ocram	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_ocram;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_qspi	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_qspi;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_sdmmc	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_sdmmc;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_usb0	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_usb0;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
eccgrp_usb1	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	eccgrp_usb1;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
ecclayout	drivers/mtd/nand/nand_bch.c	/^	struct nand_ecclayout ecclayout;$/;"	m	struct:nand_bch_control	typeref:struct:nand_ecclayout	file:
ecclayout	include/linux/mtd/mtd.h	/^	struct nand_ecclayout *ecclayout;$/;"	m	struct:mtd_info	typeref:struct:nand_ecclayout *
ecclayout	include/linux/mtd/nand.h	/^	struct nand_ecclayout *ecclayout;$/;"	m	struct:nand_chip	typeref:struct:nand_ecclayout *
ecclayout	include/linux/mtd/onenand.h	/^	struct nand_ecclayout	*ecclayout;$/;"	m	struct:onenand_chip	typeref:struct:nand_ecclayout *
ecclayout	include/linux/mtd/partitions.h	/^	struct nand_ecclayout *ecclayout;	\/* out of band layout for this partition (NAND only) *\/$/;"	m	struct:mtd_partition	typeref:struct:nand_ecclayout *
ecclog	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ecclog;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
eccmask	drivers/mtd/nand/nand_bch.c	/^	unsigned char        *eccmask;$/;"	m	struct:nand_bch_control	typeref:typename:unsigned char *	file:
eccoob	drivers/mtd/nand/tegra_nand.c	/^static struct nand_ecclayout eccoob = {$/;"	v	typeref:struct:nand_ecclayout	file:
eccplace	include/linux/mtd/fsmc_nand.h	/^	struct fsmc_nand_eccplace eccplace[FSMC_MAX_ECCPLACE_ENTRIES];$/;"	m	struct:fsmc_eccplace	typeref:struct:fsmc_nand_eccplace[]
eccpos	include/linux/mtd/mtd.h	/^	__u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE];$/;"	m	struct:nand_ecclayout	typeref:typename:__u32[]
eccpos	include/mtd/mtd-abi.h	/^	__u32 eccpos[32];$/;"	m	struct:nand_oobinfo	typeref:typename:__u32[32]
eccpos	include/mtd/mtd-abi.h	/^	__u32 eccpos[MTD_MAX_ECCPOS_ENTRIES];$/;"	m	struct:nand_ecclayout_user	typeref:typename:__u32[]
eccr	include/fsl_qe.h	/^		u32 eccr;	\/* The value for the ECCR register *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u32
eccr	include/linux/immap_qe.h	/^	u32 eccr;		\/* Exception control configuration register *\/$/;"	m	struct:rsp	typeref:typename:u32
eccread	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int eccread;    \/* Non zero for a full-page ECC read     *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
eccres1	fs/yaffs2/yaffs_guts.h	/^	int eccres1;$/;"	m	struct:yaffs_nand_spare	typeref:typename:int
eccres2	fs/yaffs2/yaffs_guts.h	/^	int eccres2;$/;"	m	struct:yaffs_nand_spare	typeref:typename:int
eccsize	drivers/mtd/nand/arasan_nfc.c	/^	u16 eccsize;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u16	file:
ecctl1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short ecctl1;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned short
ecctl2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short ecctl2;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned short
ecctst	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ecctst;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
ecdr	arch/powerpc/include/asm/immap_512x.h	/^	u32 ecdr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
ecdr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ecdr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
ecgtxcmcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 ecgtxcmcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
ech	drivers/mtd/ubi/attach.c	/^static struct ubi_ec_hdr *ech;$/;"	v	typeref:struct:ubi_ec_hdr *	file:
echo	include/net.h	/^		} echo;$/;"	m	union:icmp_hdr::__anona5cac555010a	typeref:struct:icmp_hdr::__anona5cac555010a::__anona5cac5550208
echoerr	scripts/get_default_envs.sh	/^echoerr() { echo "$@" 1>&2; }$/;"	f
ecntrl	arch/powerpc/include/asm/immap_512x.h	/^	u32	ecntrl;		\/* Ethernet control register *\/$/;"	m	struct:fec512x	typeref:typename:u32
ecntrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ecntrl;		\/* Ethernet Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ecntrl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ecntrl;		\/* 0x24020 - Ethernet Control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
ecntrl	drivers/net/fec_mxc.h	/^	uint32_t ecntrl;		\/* MBAR_ETH + 0x024 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ecntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ecntrl;			\/* MBAR_ETH + 0x024 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ecntrl	include/fsl_dtsec.h	/^	u32	ecntrl;		\/* ethernet control and configuration *\/$/;"	m	struct:dtsec	typeref:typename:u32
ecntrl	include/tsec.h	/^	u32	ecntrl;		\/* Ethernet Control *\/$/;"	m	struct:tsec	typeref:typename:u32
ecol	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 ecol;$/;"	m	struct:at91_emac	typeref:typename:u32
ecol	drivers/net/e1000.h	/^	uint64_t ecol;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
econfig	board/gateworks/gw_ventana/eeprom.c	/^struct ventana_eeprom_config econfig[] = {$/;"	v	typeref:struct:ventana_eeprom_config[]
econfig_bytes	board/gateworks/gw_ventana/eeprom.c	/^static u8 econfig_bytes[sizeof(ventana_info.config)];$/;"	v	typeref:typename:u8[]	file:
econfig_init	board/gateworks/gw_ventana/eeprom.c	/^static int econfig_init = -1;$/;"	v	typeref:typename:int	file:
econum	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 econum;		\/*0xf00*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
ecr	arch/arc/include/asm/ptrace.h	/^	long ecr;$/;"	m	struct:pt_regs	typeref:typename:long
ecr	arch/m68k/include/asm/fec.h	/^	u32 ecr;		\/* 0x00 *\/$/;"	m	struct:fec	typeref:typename:u32
ecr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 ecr;		\/* 0x024 *\/$/;"	m	struct:fecdma	typeref:typename:u32
ecr	arch/powerpc/include/asm/immap_512x.h	/^	u32 ecr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
ecr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ecr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
ecr	drivers/serial/serial_pl01x_internal.h	/^	u32	ecr;		\/* 0x04 Error clear register (Write) *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
ecr1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ecr1;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
ecr2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ecr2;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
ecr3	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ecr3;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
ecs0ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs0ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs0gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs0gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs1ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs1ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs1gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs1gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs2ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs2ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs2gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs2gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs3ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs3ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs3gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs3gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs4ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs4ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs4gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs4gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs5ctrl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs5ctrl;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecs5gdst	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecs5gdst;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecspi1	arch/arm/dts/imx6qdl.dtsi	/^				ecspi1: ecspi@02008000 {$/;"	l
ecspi1	arch/arm/dts/imx6ull.dtsi	/^				ecspi1: ecspi@02008000 {$/;"	l	label:aips1
ecspi1_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/aristainetos/aristainetos-v2.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/bachmann/ot1200/ot1200.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi1_pads	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi1_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi1_pads	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi1_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
ecspi1_pads	board/gateworks/gw_ventana/gw_ventana.c	/^iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi1_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi1_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspi2	arch/arm/dts/imx6qdl.dtsi	/^				ecspi2: ecspi@0200c000 {$/;"	l
ecspi2	arch/arm/dts/imx6ull.dtsi	/^				ecspi2: ecspi@0200c000 {$/;"	l	label:aips1
ecspi2_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const ecspi2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi2_pads	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const ecspi2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi3	arch/arm/dts/imx6qdl.dtsi	/^				ecspi3: ecspi@02010000 {$/;"	l
ecspi3	arch/arm/dts/imx6ull.dtsi	/^				ecspi3: ecspi@02010000 {$/;"	l	label:aips1
ecspi3_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const ecspi3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi3_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t ecspi3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
ecspi4	arch/arm/dts/imx6qdl.dtsi	/^				ecspi4: ecspi@02014000 {$/;"	l
ecspi4	arch/arm/dts/imx6ull.dtsi	/^				ecspi4: ecspi@02014000 {$/;"	l	label:aips1
ecspi4_pads	board/aristainetos/aristainetos-v1.c	/^iomux_v3_cfg_t const ecspi4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi4_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const ecspi4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi4_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const ecspi4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ecspi5	arch/arm/dts/imx6q.dtsi	/^				ecspi5: ecspi@02018000 {$/;"	l
ecspi_pads	board/compulab/cm_fx6/common.c	/^static iomux_v3_cfg_t const ecspi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ecspwcr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecspwcr0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecspwcr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecspwcr1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecspwcr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecspwcr2;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecspwcr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecspwcr3;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecspwcr4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecspwcr4;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecspwcr5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecspwcr5;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecswcr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecswcr0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecswcr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecswcr1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecswcr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecswcr2;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecswcr3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecswcr3;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecswcr4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecswcr4;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ecswcr5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 ecswcr5;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
ectl_regs	drivers/net/pic32_eth.c	/^	struct pic32_ectl_regs *ectl_regs;$/;"	m	struct:pic32eth_dev	typeref:struct:pic32_ectl_regs *	file:
ecw	include/ddr_spd.h	/^	unsigned char ecw;         \/* 14 Error Checking SDRAM width *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
ecw	include/ddr_spd.h	/^	unsigned char ecw;         \/* 14 Error Checking SDRAM width *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
ecw	include/spd.h	/^	unsigned char ecw;         \/* 14 Error Checking SDRAM width *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
ecx	arch/x86/include/asm/cpu.h	/^	uint32_t ecx;$/;"	m	struct:cpuid_result	typeref:typename:uint32_t
ecx	arch/x86/include/asm/ptrace.h	/^	long ecx;$/;"	m	struct:irq_regs	typeref:typename:long
ecx	arch/x86/include/asm/ptrace.h	/^	long ecx;$/;"	m	struct:pt_regs	typeref:typename:long
ecx	drivers/bios_emulator/include/biosemu.h	/^	u32 ecx;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
ed	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	ed_t	ed[NUM_EDS];$/;"	m	struct:ohci_device	typeref:typename:ed_t[]
ed	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	ed_t *ed;$/;"	m	struct:__anon08a6674e0108	typeref:typename:ed_t *
ed	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct ed *ed;$/;"	m	struct:td	typeref:struct:ed *
ed	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^struct ed {$/;"	s
ed	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	ed_t	ed[NUM_EDS];$/;"	m	struct:ohci_device	typeref:typename:ed_t[]
ed	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	ed_t *ed;$/;"	m	struct:__anonb10e26e60108	typeref:typename:ed_t *
ed	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct ed *ed;$/;"	m	struct:td	typeref:struct:ed *
ed	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^struct ed {$/;"	s
ed	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	ed_t *ed;$/;"	m	struct:__anond5d032300108	typeref:typename:ed_t *
ed	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	ed_t ed[NUM_EDS];$/;"	m	struct:ohci_device	typeref:typename:ed_t[]
ed	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct ed *ed;$/;"	m	struct:td	typeref:struct:ed *
ed	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^struct ed {$/;"	s
ed	drivers/usb/host/isp116x.h	/^	struct isp116x_ep *ed;$/;"	m	struct:__anon2695f18b0108	typeref:struct:isp116x_ep *
ed	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed;$/;"	m	struct:td	typeref:struct:ed *
ed	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed;$/;"	m	struct:urb_priv	typeref:struct:ed *
ed	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed ed[NUM_EDS];$/;"	m	struct:ohci_device	typeref:struct:ed[]
ed	drivers/usb/host/ohci-s3c24xx.h	/^struct ed {$/;"	s
ed	drivers/usb/host/ohci.h	/^	ed_t *ed;$/;"	m	struct:__anone9fd91320108	typeref:typename:ed_t *
ed	drivers/usb/host/ohci.h	/^	struct ed *ed;$/;"	m	struct:td	typeref:struct:ed *
ed	drivers/usb/host/ohci.h	/^struct ed {$/;"	s
ed_bulkcurrent	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	ed_bulkcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkcurrent	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	ed_bulkcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkcurrent	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 ed_bulkcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkcurrent	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 ed_bulkcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkcurrent	drivers/usb/host/ohci.h	/^	__u32	ed_bulkcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkhead	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	ed_bulkhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkhead	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	ed_bulkhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkhead	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 ed_bulkhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkhead	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 ed_bulkhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulkhead	drivers/usb/host/ohci.h	/^	__u32	ed_bulkhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_bulktail	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	ed_t *ed_bulktail;		\/* last endpoint of bulk list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_bulktail	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	ed_t *ed_bulktail;	 \/* last endpoint of bulk list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_bulktail	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	ed_t *ed_bulktail;	\/* last endpoint of bulk list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_bulktail	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed_bulktail;    \/* last endpoint of bulk list *\/$/;"	m	struct:ohci	typeref:struct:ed *
ed_bulktail	drivers/usb/host/ohci.h	/^	ed_t *ed_bulktail;	 \/* last endpoint of bulk list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_cnt	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int ed_cnt;$/;"	m	struct:ohci_device	typeref:typename:int
ed_cnt	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int ed_cnt;$/;"	m	struct:ohci_device	typeref:typename:int
ed_cnt	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int ed_cnt;$/;"	m	struct:ohci_device	typeref:typename:int
ed_cnt	drivers/usb/host/ohci-s3c24xx.h	/^	int ed_cnt;$/;"	m	struct:ohci_device	typeref:typename:int
ed_cnt	drivers/usb/host/ohci.h	/^	int ed_cnt;$/;"	m	struct:ohci_device	typeref:typename:int
ed_controlcurrent	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	ed_controlcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlcurrent	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	ed_controlcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlcurrent	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 ed_controlcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlcurrent	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 ed_controlcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlcurrent	drivers/usb/host/ohci.h	/^	__u32	ed_controlcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlhead	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	ed_controlhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlhead	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	ed_controlhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlhead	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 ed_controlhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlhead	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 ed_controlhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controlhead	drivers/usb/host/ohci.h	/^	__u32	ed_controlhead;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_controltail	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	ed_t *ed_controltail;		\/* last endpoint of control list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_controltail	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	ed_t *ed_controltail;	 \/* last endpoint of control list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_controltail	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	ed_t *ed_controltail;	\/* last endpoint of control list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_controltail	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed_controltail; \/* last endpoint of control list *\/$/;"	m	struct:ohci	typeref:struct:ed *
ed_controltail	drivers/usb/host/ohci.h	/^	ed_t *ed_controltail;	 \/* last endpoint of control list *\/$/;"	m	struct:ohci	typeref:typename:ed_t *
ed_free	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^ed_free (struct ed *ed)$/;"	f	typeref:typename:void
ed_free	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^ed_free (struct ed *ed)$/;"	f	typeref:typename:void
ed_free	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^static inline void ed_free(struct ed *ed)$/;"	f	typeref:typename:void
ed_free	drivers/usb/host/ohci-hcd.c	/^static inline void ed_free(struct ed *ed)$/;"	f	typeref:typename:void	file:
ed_free	drivers/usb/host/ohci-s3c24xx.h	/^static inline void ed_free(struct ed *ed)$/;"	f	typeref:typename:void
ed_periodcurrent	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	ed_periodcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_periodcurrent	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	ed_periodcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_periodcurrent	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 ed_periodcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_periodcurrent	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 ed_periodcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_periodcurrent	drivers/usb/host/ohci.h	/^	__u32	ed_periodcurrent;$/;"	m	struct:ohci_regs	typeref:typename:__u32
ed_prev	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct ed *ed_prev;$/;"	m	struct:ed	typeref:struct:ed *
ed_prev	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct ed *ed_prev;$/;"	m	struct:ed	typeref:struct:ed *
ed_prev	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct ed *ed_prev;$/;"	m	struct:ed	typeref:struct:ed *
ed_prev	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed_prev;$/;"	m	struct:ed	typeref:struct:ed *
ed_prev	drivers/usb/host/ohci.h	/^	struct ed *ed_prev;$/;"	m	struct:ed	typeref:struct:ed *
ed_rm_list	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	ed_t *ed_rm_list[2];		\/* lists of all endpoints to be removed *\/$/;"	m	struct:ohci	typeref:typename:ed_t * [2]
ed_rm_list	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct ed *ed_rm_list;$/;"	m	struct:ed	typeref:struct:ed *
ed_rm_list	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	ed_t *ed_rm_list[2];	 \/* lists of all endpoints to be removed *\/$/;"	m	struct:ohci	typeref:typename:ed_t * [2]
ed_rm_list	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct ed *ed_rm_list;$/;"	m	struct:ed	typeref:struct:ed *
ed_rm_list	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	ed_t *ed_rm_list[2];	\/* lists of all endpoints to be removed *\/$/;"	m	struct:ohci	typeref:typename:ed_t * [2]
ed_rm_list	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct ed *ed_rm_list;$/;"	m	struct:ed	typeref:struct:ed *
ed_rm_list	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed_rm_list;$/;"	m	struct:ed	typeref:struct:ed *
ed_rm_list	drivers/usb/host/ohci-s3c24xx.h	/^	struct ed *ed_rm_list[2];  \/* lists of all endpoints to be removed *\/$/;"	m	struct:ohci	typeref:struct:ed * [2]
ed_rm_list	drivers/usb/host/ohci.h	/^	ed_t *ed_rm_list[2];	 \/* lists of all endpoints to be removed *\/$/;"	m	struct:ohci	typeref:typename:ed_t * [2]
ed_rm_list	drivers/usb/host/ohci.h	/^	struct ed *ed_rm_list;$/;"	m	struct:ed	typeref:struct:ed *
ed_t	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^typedef struct ed ed_t;$/;"	t	typeref:struct:ed
ed_t	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^typedef struct ed ed_t;$/;"	t	typeref:struct:ed
ed_t	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^typedef struct ed ed_t;$/;"	t	typeref:struct:ed
ed_t	drivers/usb/host/ohci.h	/^typedef struct ed ed_t;$/;"	t	typeref:struct:ed
edata	arch/m68k/cpu/u-boot.lds	/^	PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/nios2/cpu/u-boot.lds	/^	PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/openrisc/cpu/u-boot.lds	/^		edata = .;$/;"	s
edata	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	arch/sparc/cpu/u-boot.lds	/^	PROVIDE (edata = .);$/;"	s	assignment:provide
edata	board/amcc/canyonlands/u-boot-ram.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	board/amcc/sequoia/u-boot-ram.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edata	board/tqc/tqm8xx/u-boot.lds	/^  PROVIDE (edata = .);$/;"	s	assignment:provide
edc_config	include/fsl_ddr_dimm_params.h	/^	unsigned int edc_config;	\/* 0 = none, 1 = parity, 2 = ECC *\/$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
edcl_ip	include/grlib/greth.h	/^	volatile unsigned int edcl_ip;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
edcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	edcsr;	\/* Port error detect CSR *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32
edcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	edcsr;	        \/* 0xc0640 - Port 0 error detect status register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
edd	include/linux/edd.h	/^struct edd {$/;"	s
edd_device_params	include/linux/edd.h	/^struct edd_device_params {$/;"	s
edd_info	include/linux/edd.h	/^	struct edd_info edd_info[EDDMAXNR];$/;"	m	struct:edd	typeref:struct:edd_info[]
edd_info	include/linux/edd.h	/^struct edd_info {$/;"	s
edd_info_nr	include/linux/edd.h	/^	unsigned char edd_info_nr;$/;"	m	struct:edd	typeref:typename:unsigned char
edd_mbr_sig_buf_entries	arch/x86/include/asm/bootparam.h	/^	__u8  edd_mbr_sig_buf_entries;			\/* 0x1ea *\/$/;"	m	struct:boot_params	typeref:typename:__u8
edd_mbr_sig_buffer	arch/x86/include/asm/bootparam.h	/^	__u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX];	\/* 0x290 *\/$/;"	m	struct:boot_params	typeref:typename:__u32[]
eddbuf	arch/x86/include/asm/bootparam.h	/^	struct edd_info eddbuf[EDDMAXNR];		\/* 0xd00 *\/$/;"	m	struct:boot_params	typeref:struct:edd_info[]
eddbuf_entries	arch/x86/include/asm/bootparam.h	/^	__u8  eddbuf_entries;				\/* 0x1e9 *\/$/;"	m	struct:boot_params	typeref:typename:__u8
eddrtqcfg	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 eddrtqcfg;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
edge	arch/blackfin/include/asm/gpio.h	/^	unsigned short edge;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
edglevel	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 edglevel;$/;"	m	struct:rcar_gpio	typeref:typename:u32
edhcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 edhcr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
edhcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 edhcr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
edi	arch/x86/include/asm/ptrace.h	/^	long edi;$/;"	m	struct:irq_regs	typeref:typename:long
edi	arch/x86/include/asm/ptrace.h	/^	long edi;$/;"	m	struct:pt_regs	typeref:typename:long
edi	drivers/bios_emulator/include/biosemu.h	/^	u32 edi;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
edid1_info	include/edid.h	/^struct edid1_info {$/;"	s
edid_aspect	include/edid.h	/^enum edid_aspect {$/;"	g
edid_block_zero	include/vbe.h	/^	u8 edid_block_zero[128];$/;"	m	struct:vbe_ddc_info	typeref:typename:u8[128]
edid_block_zero	include/vbe.h	/^	u8 edid_block_zero[128];$/;"	m	struct:vbe_screen_info	typeref:typename:u8[128]
edid_buf	board/pdm360ng/pdm360ng.c	/^static unsigned char edid_buf[128] = {$/;"	v	typeref:typename:unsigned char[128]	file:
edid_buf	board/tqc/tqm5200/tqm5200.c	/^static unsigned char edid_buf[128] = {$/;"	v	typeref:typename:unsigned char[128]	file:
edid_cea861_info	include/edid.h	/^struct edid_cea861_info {$/;"	s
edid_check_checksum	common/edid.c	/^int edid_check_checksum(u8 *edid_block)$/;"	f	typeref:typename:int
edid_check_info	common/edid.c	/^int edid_check_info(struct edid1_info *edid_info)$/;"	f	typeref:typename:int
edid_detailed_timing	include/edid.h	/^struct edid_detailed_timing {$/;"	s
edid_get_manufacturer_name	common/edid.c	/^static void edid_get_manufacturer_name(struct edid1_info *edid, char *name)$/;"	f	typeref:typename:void	file:
edid_get_ranges	common/edid.c	/^int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,$/;"	f	typeref:typename:int
edid_get_timing	common/edid.c	/^int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,$/;"	f	typeref:typename:int
edid_info	arch/x86/include/asm/bootparam.h	/^	struct edid_info edid_info;			\/* 0x140 *\/$/;"	m	struct:boot_params	typeref:struct:edid_info
edid_info	arch/x86/include/asm/video/edid.h	/^struct edid_info {$/;"	s
edid_monitor_descriptor	include/edid.h	/^struct edid_monitor_descriptor {$/;"	s
edid_monitor_descriptor_types	include/edid.h	/^enum edid_monitor_descriptor_types {$/;"	g
edid_print_dtd	common/edid.c	/^static void edid_print_dtd(struct edid_monitor_descriptor *monitor,$/;"	f	typeref:typename:void	file:
edid_print_info	common/edid.c	/^void edid_print_info(struct edid1_info *edid_info)$/;"	f	typeref:typename:void
edid_transfer_time	include/vbe.h	/^	u8 edid_transfer_time;$/;"	m	struct:vbe_ddc_info	typeref:typename:u8
edis	arch/powerpc/include/asm/immap_85xx.h	/^	u32	edis;		\/* Error Disabled *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
edis	arch/powerpc/include/asm/immap_86xx.h	/^	uint	edis;		\/* 0x24018 - Error Disabled Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
edis	include/tsec.h	/^	u32	edis;		\/* Error Disabled *\/$/;"	m	struct:tsec	typeref:typename:u32
editField	scripts/kconfig/qconf.h	/^	QLineEdit* editField;$/;"	m	class:ConfigSearchWindow	typeref:typename:QLineEdit *
edition	include/cramfs/cramfs_fs.h	/^	u32 edition;$/;"	m	struct:cramfs_info	typeref:typename:u32
edlcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 edlcr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
edlcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 edlcr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
edma	arch/arm/dts/am33xx.dtsi	/^		edma: edma@49000000 {$/;"	l
edma	arch/arm/dts/am4372.dtsi	/^		edma: edma@49000000 {$/;"	l
edma0	arch/arm/dts/ls1021a.dtsi	/^		edma0: edma@2c00000 {$/;"	l
edma3_address_mode	arch/arm/include/asm/ti-common/ti-edma3.h	/^enum edma3_address_mode {$/;"	g
edma3_channel_config	arch/arm/include/asm/ti-common/ti-edma3.h	/^struct edma3_channel_config {$/;"	s
edma3_check_for_transfer	drivers/dma/ti-edma3.c	/^int edma3_check_for_transfer(u32 base, struct edma3_channel_config *cfg)$/;"	f	typeref:typename:int
edma3_fifo_width	arch/arm/include/asm/ti-common/ti-edma3.h	/^enum edma3_fifo_width {$/;"	g
edma3_read_slot	drivers/dma/ti-edma3.c	/^void edma3_read_slot(u32 base, int slot, struct edma3_slot_layout *param)$/;"	f	typeref:typename:void
edma3_set_dest	drivers/dma/ti-edma3.c	/^void edma3_set_dest(u32 base, int slot, u32 dst, enum edma3_address_mode mode,$/;"	f	typeref:typename:void
edma3_set_dest_addr	drivers/dma/ti-edma3.c	/^void edma3_set_dest_addr(u32 base, int slot, u32 dst)$/;"	f	typeref:typename:void
edma3_set_dest_index	drivers/dma/ti-edma3.c	/^void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx)$/;"	f	typeref:typename:void
edma3_set_src	drivers/dma/ti-edma3.c	/^void edma3_set_src(u32 base, int slot, u32 src, enum edma3_address_mode mode,$/;"	f	typeref:typename:void
edma3_set_src_addr	drivers/dma/ti-edma3.c	/^void edma3_set_src_addr(u32 base, int slot, u32 src)$/;"	f	typeref:typename:void
edma3_set_src_index	drivers/dma/ti-edma3.c	/^void edma3_set_src_index(u32 base, unsigned slot, int bidx, int cidx)$/;"	f	typeref:typename:void
edma3_set_transfer_params	drivers/dma/ti-edma3.c	/^void edma3_set_transfer_params(u32 base, int slot, int acnt,$/;"	f	typeref:typename:void
edma3_slot_config	arch/arm/include/asm/ti-common/ti-edma3.h	/^struct edma3_slot_config {$/;"	s
edma3_slot_configure	drivers/dma/ti-edma3.c	/^void edma3_slot_configure(u32 base, int slot, struct edma3_slot_config *cfg)$/;"	f	typeref:typename:void
edma3_slot_layout	arch/arm/include/asm/ti-common/ti-edma3.h	/^struct edma3_slot_layout {$/;"	s
edma3_sync_dimension	arch/arm/include/asm/ti-common/ti-edma3.h	/^enum edma3_sync_dimension {$/;"	g
edma3_transfer	drivers/dma/ti-edma3.c	/^void edma3_transfer(unsigned long edma3_base_addr, unsigned int edma_slot_num,$/;"	f	typeref:typename:void
edma3_write_slot	drivers/dma/ti-edma3.c	/^void edma3_write_slot(u32 base, int slot, struct edma3_slot_layout *param)$/;"	f	typeref:typename:void
edma_cmd	drivers/block/mvsata_ide.c	/^	u32 edma_cmd;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
edma_ctrl	arch/m68k/include/asm/coldfire/edma.h	/^typedef struct edma_ctrl {$/;"	s
edma_evtmux	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	edma_evtmux;	\/* 0x1C *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
edma_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 edma_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
edma_t	arch/m68k/include/asm/coldfire/edma.h	/^} edma_t;$/;"	t	typeref:struct:edma_ctrl
edp	arch/arm/dts/rk3288.dtsi	/^	edp: edp@ff970000 {$/;"	l
edp_dev_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^	struct exynos_dp_priv *edp_dev_info;$/;"	m	struct:exynos_dp_platform_data	typeref:struct:exynos_dp_priv *
edp_disp_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^struct edp_disp_info {$/;"	s
edp_get_adjust_train	drivers/video/rockchip/rk_edp.c	/^static void edp_get_adjust_train(const u8 *link_status, int lane_count,$/;"	f	typeref:typename:void	file:
edp_get_lane_status	drivers/video/rockchip/rk_edp.c	/^static u8 edp_get_lane_status(const u8 *link_status, int lane)$/;"	f	typeref:typename:u8	file:
edp_hpd	arch/arm/dts/rk3288-jerry.dts	/^		edp_hpd: edp_hpd {$/;"	l
edp_in	arch/arm/dts/rk3288.dtsi	/^			edp_in: port {$/;"	l	label:edp
edp_in_vopb	arch/arm/dts/rk3288.dtsi	/^				edp_in_vopb: endpoint@0 {$/;"	l	label:edp.edp_in
edp_in_vopl	arch/arm/dts/rk3288.dtsi	/^				edp_in_vopl: endpoint@1 {$/;"	l	label:edp.edp_in
edp_link_status	drivers/video/rockchip/rk_edp.c	/^static u8 edp_link_status(const u8 *link_status, int r)$/;"	f	typeref:typename:u8	file:
edp_link_train_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^struct edp_link_train_info {$/;"	s
edp_video_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^struct edp_video_info {$/;"	s
edpal	include/tsi148.h	/^	unsigned int edpal;                   \/* 0x274         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
edpat	include/tsi148.h	/^	unsigned int edpat;                   \/* 0x280         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
edpau	include/tsi148.h	/^	unsigned int edpau;                   \/* 0x270         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
edpxa	include/tsi148.h	/^	unsigned int edpxa;                   \/* 0x278         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
edpxs	include/tsi148.h	/^	unsigned int edpxs;                   \/* 0x27c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
edr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	edr;		\/* 0x1e00 - MCM Error Detect Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
edt_ft5306_ts_pins	arch/arm/dts/am437x-sk-evm.dts	/^	edt_ft5306_ts_pins: edt_ft5306_ts_pins {$/;"	l
edx	arch/x86/include/asm/cpu.h	/^	uint32_t edx;$/;"	m	struct:cpuid_result	typeref:typename:uint32_t
edx	arch/x86/include/asm/ptrace.h	/^	long edx;$/;"	m	struct:irq_regs	typeref:typename:long
edx	arch/x86/include/asm/ptrace.h	/^	long edx;$/;"	m	struct:pt_regs	typeref:typename:long
edx	drivers/bios_emulator/include/biosemu.h	/^	u32 edx;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
ee_block	include/ext4fs.h	/^	__le32	ee_block;	\/* first logical block extent covers *\/$/;"	m	struct:ext4_extent	typeref:typename:__le32
ee_len	include/ext4fs.h	/^	__le16	ee_len;		\/* number of blocks covered by extent *\/$/;"	m	struct:ext4_extent	typeref:typename:__le16
ee_start_hi	include/ext4fs.h	/^	__le16	ee_start_hi;	\/* high 16 bits of physical block *\/$/;"	m	struct:ext4_extent	typeref:typename:__le16
ee_start_lo	include/ext4fs.h	/^	__le32	ee_start_lo;	\/* low 32 bits of physical block *\/$/;"	m	struct:ext4_extent	typeref:typename:__le32
eeacr	arch/powerpc/include/asm/immap_512x.h	/^	u32 eeacr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
eeacr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 eeacr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
eeadr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eeadr;		\/* ECM Error Addr Capture *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
eeatr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eeatr;		\/* ECM Error Attrs Capture *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
eebacr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eebacr;		\/* ECM CCB Addr Configuration *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
eebpcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eebpcr;		\/* ECM CCB Port Configuration *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
eedr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eedr;		\/* ECM Error Detect *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
eedrive	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t eedrive;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
eedump_len	include/linux/ethtool.h	/^	__u32	eedump_len;	\/* Size of data from ETHTOOL_GEEPROM (bytes) *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:__u32
eee_cfg	include/vsc9953.h	/^	u32	eee_cfg;$/;"	m	struct:vsc9953_dev_gmii_port_mode	typeref:typename:u32
eee_cfg	include/vsc9953.h	/^	u32	eee_cfg[10];$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32[10]
eee_thrs	include/vsc9953.h	/^	u32	eee_thrs;$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32
eeer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eeer;		\/* ECM Error Enable *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
eei	arch/m68k/include/asm/coldfire/edma.h	/^	u16 eei;		\/* 0x16 Enable Error Interrupt Request *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16
eepro100_halt	drivers/net/eepro100.c	/^static void eepro100_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
eepro100_init	drivers/net/eepro100.c	/^static int eepro100_init (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
eepro100_initialize	drivers/net/eepro100.c	/^int eepro100_initialize (bd_t * bis)$/;"	f	typeref:typename:int
eepro100_miiphy_read	drivers/net/eepro100.c	/^static int eepro100_miiphy_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
eepro100_miiphy_write	drivers/net/eepro100.c	/^static int eepro100_miiphy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
eepro100_recv	drivers/net/eepro100.c	/^static int eepro100_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
eepro100_send	drivers/net/eepro100.c	/^static int eepro100_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
eepro100_write_eeprom	drivers/net/eepro100.c	/^int eepro100_write_eeprom (struct eth_device* dev, int location, int addr_len, unsigned short da/;"	f	typeref:typename:int
eeprom	arch/arm/dts/am335x-draco.dtsi	/^			eeprom: eeprom@50 {$/;"	l	label:i2c0
eeprom	arch/arm/dts/am335x-pxm2.dtsi	/^	eeprom: eeprom@50 {$/;"	l
eeprom	arch/arm/dts/am335x-rut.dts	/^	eeprom: eeprom@50 {$/;"	l
eeprom	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	eeprom: eeprom@50 {$/;"	l
eeprom	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	eeprom: eeprom@50 {$/;"	l
eeprom	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	eeprom: eeprom@50 {$/;"	l
eeprom	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	eeprom: eeprom@50 {$/;"	l
eeprom	arch/arm/dts/zynq-zc770-xm013.dts	/^	eeprom: at25@0 {$/;"	l
eeprom	board/freescale/common/sys_eeprom.c	/^static struct __attribute__ ((__packed__)) eeprom {$/;"	s	file:
eeprom	board/varisys/common/sys_eeprom.c	/^static struct __attribute__ ((__packed__)) eeprom {$/;"	s	file:
eeprom	drivers/net/e1000.h	/^	struct e1000_eeprom_info eeprom;$/;"	m	struct:e1000_hw	typeref:struct:e1000_eeprom_info
eeprom_action	cmd/eeprom.c	/^enum eeprom_action {$/;"	g	file:
eeprom_addr	board/varisys/common/sys_eeprom.c	/^static int eeprom_addr;$/;"	v	typeref:typename:int	file:
eeprom_addr	cmd/eeprom.c	/^static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)$/;"	f	typeref:typename:int	file:
eeprom_addr_len	board/varisys/common/sys_eeprom.c	/^static int eeprom_addr_len;$/;"	v	typeref:typename:int	file:
eeprom_buf	cmd/eeprom.c	/^static unsigned char eeprom_buf[CONFIG_SYS_EEPROM_SIZE];$/;"	v	typeref:typename:unsigned char[]	file:
eeprom_bus_num	board/varisys/common/sys_eeprom.c	/^static int eeprom_bus_num = -1;$/;"	v	typeref:typename:int	file:
eeprom_bus_read	common/env_eeprom.c	/^static int eeprom_bus_read(unsigned dev_addr, unsigned offset,$/;"	f	typeref:typename:int	file:
eeprom_bus_write	common/env_eeprom.c	/^static int eeprom_bus_write(unsigned dev_addr, unsigned offset,$/;"	f	typeref:typename:int	file:
eeprom_content	board/ifm/ac14xx/ac14xx.c	/^static struct eeprom_layout eeprom_content;$/;"	v	typeref:struct:eeprom_layout	file:
eeprom_delay	drivers/net/natsemi.c	/^#define eeprom_delay(/;"	d	file:
eeprom_delay	drivers/net/rtl8139.c	/^#define eeprom_delay(/;"	d	file:
eeprom_diag	board/ifm/ac14xx/ac14xx.c	/^static int eeprom_diag;$/;"	v	typeref:typename:int	file:
eeprom_disable_access	board/micronas/vct/smc_eeprom.c	/^static void eeprom_disable_access(ulong gpio)$/;"	f	typeref:typename:void	file:
eeprom_disable_erase_and_write	board/micronas/vct/smc_eeprom.c	/^static int eeprom_disable_erase_and_write(void)$/;"	f	typeref:typename:int	file:
eeprom_enable_access	board/micronas/vct/smc_eeprom.c	/^static ulong eeprom_enable_access(void)$/;"	f	typeref:typename:ulong	file:
eeprom_enable_erase_and_write	board/micronas/vct/smc_eeprom.c	/^static int eeprom_enable_erase_and_write(void)$/;"	f	typeref:typename:int	file:
eeprom_erase_all	board/micronas/vct/smc_eeprom.c	/^static int eeprom_erase_all(void)$/;"	f	typeref:typename:int	file:
eeprom_execute_command	cmd/eeprom.c	/^static int eeprom_execute_command(enum eeprom_action action, int i2c_bus,$/;"	f	typeref:typename:int	file:
eeprom_field	include/eeprom_field.h	/^struct eeprom_field {$/;"	s
eeprom_field_print_ascii	common/eeprom/eeprom_field.c	/^void eeprom_field_print_ascii(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_print_bin	common/eeprom/eeprom_field.c	/^void eeprom_field_print_bin(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_print_bin_rev	common/eeprom/eeprom_field.c	/^void eeprom_field_print_bin_rev(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_print_bin_ver	board/compulab/common/eeprom.c	/^void eeprom_field_print_bin_ver(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_print_date	board/compulab/common/eeprom.c	/^void eeprom_field_print_date(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_print_mac	common/eeprom/eeprom_field.c	/^void eeprom_field_print_mac(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_print_reserved	common/eeprom/eeprom_field.c	/^void eeprom_field_print_reserved(const struct eeprom_field *field)$/;"	f	typeref:typename:void
eeprom_field_update_ascii	common/eeprom/eeprom_field.c	/^int eeprom_field_update_ascii(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_field_update_bin	common/eeprom/eeprom_field.c	/^int eeprom_field_update_bin(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_field_update_bin_rev	common/eeprom/eeprom_field.c	/^int eeprom_field_update_bin_rev(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_field_update_bin_ver	board/compulab/common/eeprom.c	/^int eeprom_field_update_bin_ver(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_field_update_date	board/compulab/common/eeprom.c	/^int eeprom_field_update_date(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_field_update_mac	common/eeprom/eeprom_field.c	/^int eeprom_field_update_mac(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_field_update_reserved	common/eeprom/eeprom_field.c	/^int eeprom_field_update_reserved(struct eeprom_field *field, char *value)$/;"	f	typeref:typename:int
eeprom_init	cmd/eeprom.c	/^void eeprom_init(int bus)$/;"	f	typeref:typename:void
eeprom_is_mac_address_loaded	board/micronas/vct/smc_eeprom.c	/^static int eeprom_is_mac_address_loaded(void)$/;"	f	typeref:typename:int	file:
eeprom_is_valid	board/ifm/ac14xx/ac14xx.c	/^static int eeprom_is_valid;$/;"	v	typeref:typename:int	file:
eeprom_layout	board/ifm/ac14xx/ac14xx.c	/^struct __attribute__ ((__packed__)) eeprom_layout {$/;"	s	file:
eeprom_layout	include/eeprom_layout.h	/^struct eeprom_layout {$/;"	s
eeprom_layout_assign	board/compulab/common/eeprom.c	/^void eeprom_layout_assign(struct eeprom_layout *layout, int layout_version)$/;"	f	typeref:typename:void
eeprom_layout_detect	board/compulab/common/eeprom.c	/^int eeprom_layout_detect(unsigned char *data)$/;"	f	typeref:typename:int
eeprom_layout_detect	common/eeprom/eeprom_layout.c	/^__weak int eeprom_layout_detect(unsigned char *data)$/;"	f	typeref:typename:__weak int
eeprom_layout_print	common/eeprom/eeprom_layout.c	/^static void eeprom_layout_print(const struct eeprom_layout *layout)$/;"	f	typeref:typename:void	file:
eeprom_layout_setup	common/eeprom/eeprom_layout.c	/^void eeprom_layout_setup(struct eeprom_layout *layout, unsigned char *buf,$/;"	f	typeref:typename:void
eeprom_layout_update_field	common/eeprom/eeprom_layout.c	/^static int eeprom_layout_update_field(struct eeprom_layout *layout,$/;"	f	typeref:typename:int	file:
eeprom_len	cmd/eeprom.c	/^static int eeprom_len(unsigned offset, unsigned end)$/;"	f	typeref:typename:int	file:
eeprom_parse_layout_version	board/compulab/common/eeprom.c	/^int eeprom_parse_layout_version(char *str)$/;"	f	typeref:typename:int
eeprom_parse_layout_version	cmd/eeprom.c	/^__weak int eeprom_parse_layout_version(char *str)$/;"	f	typeref:typename:__weak int
eeprom_read	cmd/eeprom.c	/^int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)$/;"	f	typeref:typename:int
eeprom_read_location	board/micronas/vct/smc_eeprom.c	/^static int eeprom_read_location(unchar address, u8 *data)$/;"	f	typeref:typename:int	file:
eeprom_reload	board/micronas/vct/smc_eeprom.c	/^static int eeprom_reload(void)$/;"	f	typeref:typename:int	file:
eeprom_rw	cmd/eeprom.c	/^static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer,$/;"	f	typeref:typename:int	file:
eeprom_rw_block	cmd/eeprom.c	/^static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,$/;"	f	typeref:typename:int	file:
eeprom_save_mac_address	board/micronas/vct/smc_eeprom.c	/^static int eeprom_save_mac_address(ulong dwHi16, ulong dwLo32)$/;"	f	typeref:typename:int	file:
eeprom_semaphore_present	drivers/net/e1000.h	/^	uint32_t		eeprom_semaphore_present;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
eeprom_version	board/ifm/ac14xx/ac14xx.c	/^static int eeprom_version;$/;"	v	typeref:typename:int	file:
eeprom_was_read	board/ifm/ac14xx/ac14xx.c	/^static int eeprom_was_read;	\/* has_been_read *\/$/;"	v	typeref:typename:int	file:
eeprom_write	cmd/eeprom.c	/^int eeprom_write(unsigned dev_addr, unsigned offset,$/;"	f	typeref:typename:int
eeprom_write_enable	board/a4m072/a4m072.c	/^int eeprom_write_enable (unsigned dev_addr, int state)$/;"	f	typeref:typename:int
eeprom_write_enable	board/esd/cpci2dp/cpci2dp.c	/^int eeprom_write_enable (unsigned dev_addr, int state) {$/;"	f	typeref:typename:int
eeprom_write_enable	board/esd/mecp5123/mecp5123.c	/^int eeprom_write_enable(unsigned dev_addr, int state)$/;"	f	typeref:typename:int
eeprom_write_enable	board/esd/plu405/plu405.c	/^int eeprom_write_enable(unsigned dev_addr, int state)$/;"	f	typeref:typename:int
eeprom_write_enable	board/esd/pmc405de/pmc405de.c	/^int eeprom_write_enable(unsigned dev_addr, int state)$/;"	f	typeref:typename:int
eeprom_write_enable	board/esd/pmc440/pmc440.c	/^int eeprom_write_enable(unsigned dev_addr, int state)$/;"	f	typeref:typename:int
eeprom_write_enable	board/keymile/km_arm/km_arm.c	/^int eeprom_write_enable(unsigned dev_addr, int state)$/;"	f	typeref:typename:int
eeprom_write_enable	cmd/eeprom.c	/^__weak int eeprom_write_enable(unsigned dev_addr, int state)$/;"	f	typeref:typename:__weak int
eeprom_write_location	board/micronas/vct/smc_eeprom.c	/^static int eeprom_write_location(unchar address, unchar data)$/;"	f	typeref:typename:int	file:
eer	arch/powerpc/include/asm/immap_512x.h	/^	u32 eer;$/;"	m	struct:pcictrl512x	typeref:typename:u32
eer	arch/powerpc/include/asm/immap_83xx.h	/^	u32 eer;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
eer	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eer;		\/* 0x1e08 - MCM Error Enable Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
effective	disk/part_iso.h	/^	unsigned char effective[17];\/* effective date *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[17]
effective	disk/part_iso.h	/^	unsigned char effective[17];\/* effective date *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[17]
effective_cs	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 effective_cs = 0;$/;"	v	typeref:typename:u32
efi_add_memory_map	lib/efi_loader/efi_memory.c	/^uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type,$/;"	f	typeref:typename:uint64_t
efi_add_runtime_mmio	include/efi_loader.h	/^static inline void efi_add_runtime_mmio(void **mmio_ptr, u64 len) { }$/;"	f	typeref:typename:void
efi_add_runtime_mmio	lib/efi_loader/efi_runtime.c	/^void efi_add_runtime_mmio(void *mmio_ptr, u64 len)$/;"	f	typeref:typename:void
efi_alloc	lib/efi_loader/efi_memory.c	/^void *efi_alloc(uint64_t len, int memory_type)$/;"	f	typeref:typename:void *
efi_allocate_pages	lib/efi_loader/efi_memory.c	/^efi_status_t efi_allocate_pages(int type, int memory_type,$/;"	f	typeref:typename:efi_status_t
efi_allocate_pages_ext	lib/efi_loader/efi_boottime.c	/^efi_status_t EFIAPI efi_allocate_pages_ext(int type, int memory_type,$/;"	f	typeref:typename:efi_status_t EFIAPI
efi_allocate_pool	lib/efi_loader/efi_memory.c	/^efi_status_t efi_allocate_pool(int pool_type, unsigned long size,$/;"	f	typeref:typename:efi_status_t
efi_allocate_pool_ext	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_allocate_pool_ext(int pool_type,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_block_io	include/efi_api.h	/^struct efi_block_io {$/;"	s
efi_block_io_guid	lib/efi_loader/efi_disk.c	/^static const efi_guid_t efi_block_io_guid = BLOCK_IO_GUID;$/;"	v	typeref:typename:const efi_guid_t	file:
efi_block_io_media	include/efi_api.h	/^struct efi_block_io_media$/;"	s
efi_boot_services	include/efi_api.h	/^struct efi_boot_services {$/;"	s
efi_boot_services	lib/efi_loader/efi_boottime.c	/^static const struct efi_boot_services efi_boot_services = {$/;"	v	typeref:typename:const struct efi_boot_services	file:
efi_bounce_buffer	lib/efi_loader/efi_memory.c	/^void *efi_bounce_buffer;$/;"	v	typeref:typename:void *
efi_build_mem_table	cmd/efi.c	/^void *efi_build_mem_table(struct efi_entry_memmap *map, int size, bool skip_bs)$/;"	f	typeref:typename:void *
efi_calculate_crc32	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_calculate_crc32(void *data,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_char16_t	include/part_efi.h	/^typedef u16 efi_char16_t;$/;"	t	typeref:typename:u16
efi_check_event	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_check_event(void *event)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cin_get_mode	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cin_get_mode($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cin_lock_std_in	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cin_lock_std_in($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cin_read_key_stroke	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cin_read_key_stroke($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cin_reset	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cin_reset($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cin_set_mode	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cin_set_mode($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_class_map	include/efi_loader.h	/^struct efi_class_map {$/;"	s
efi_class_maps	lib/efi_loader/efi_boottime.c	/^static struct efi_class_map efi_class_maps[] = {$/;"	v	typeref:struct:efi_class_map[]	file:
efi_close_event	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_close_event(void *event)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_close_protocol	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_close_protocol(void *handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_commands	cmd/efi.c	/^static cmd_tbl_t efi_commands[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
efi_con_in	lib/efi_loader/efi_console.c	/^const struct efi_simple_input_interface efi_con_in = {$/;"	v	typeref:typename:const struct efi_simple_input_interface
efi_con_mode	lib/efi_loader/efi_console.c	/^static struct simple_text_output_mode efi_con_mode = {$/;"	v	typeref:struct:simple_text_output_mode	file:
efi_con_out	lib/efi_loader/efi_console.c	/^const struct efi_simple_text_output_protocol efi_con_out = {$/;"	v	typeref:typename:const struct efi_simple_text_output_protocol
efi_conf_table	lib/efi_loader/efi_boottime.c	/^static struct efi_configuration_table __efi_runtime_data efi_conf_table[2];$/;"	v	typeref:struct:efi_configuration_table __efi_runtime_data[2]	file:
efi_configuration_table	include/efi_api.h	/^struct efi_configuration_table$/;"	s
efi_connect_controller	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_connect_controller($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_console_control	lib/efi_loader/efi_console.c	/^const struct efi_console_control_protocol efi_console_control = {$/;"	v	typeref:typename:const struct efi_console_control_protocol
efi_console_control_protocol	include/efi_api.h	/^struct efi_console_control_protocol$/;"	s
efi_copy_mem	lib/efi_loader/efi_boottime.c	/^static void EFIAPI efi_copy_mem(void *destination, void *source,$/;"	f	typeref:typename:void EFIAPI	file:
efi_cout_clear_screen	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_clear_screen($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_enable_cursor	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_enable_cursor($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_output_string	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_output_string($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_query_mode	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_query_mode($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_reset	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_reset($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_set_attribute	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_set_attribute($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_set_cursor_position	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_set_cursor_position($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_set_mode	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_set_mode($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_cout_test_string	lib/efi_loader/efi_console.c	/^static efi_status_t EFIAPI efi_cout_test_string($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_crc32	disk/part_efi.c	/^static inline u32 efi_crc32(const void *buf, u32 len)$/;"	f	typeref:typename:u32	file:
efi_create_event	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_create_event($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_device_error	lib/efi_loader/efi_runtime.c	/^static efi_status_t __efi_runtime EFIAPI efi_device_error(void)$/;"	f	typeref:typename:efi_status_t __efi_runtime EFIAPI	file:
efi_device_path	include/efi_api.h	/^struct efi_device_path {$/;"	s
efi_device_path_file_path	include/efi_api.h	/^struct efi_device_path_file_path {$/;"	s
efi_disconnect_controller	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_disconnect_controller(void *controller_handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_add_dev	lib/efi_loader/efi_disk.c	/^static void efi_disk_add_dev(const char *name,$/;"	f	typeref:typename:void	file:
efi_disk_create_eltorito	lib/efi_loader/efi_disk.c	/^static int efi_disk_create_eltorito(struct blk_desc *desc,$/;"	f	typeref:typename:int	file:
efi_disk_direction	lib/efi_loader/efi_disk.c	/^enum efi_disk_direction {$/;"	g	file:
efi_disk_flush_blocks	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_flush_blocks(struct efi_block_io *this)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_obj	lib/efi_loader/efi_disk.c	/^struct efi_disk_obj {$/;"	s	file:
efi_disk_open_block	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_open_block(void *handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_open_dp	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_open_dp(void *handle, efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_read_blocks	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_read_blocks(struct efi_block_io *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_register	lib/efi_loader/efi_disk.c	/^int efi_disk_register(void)$/;"	f	typeref:typename:int
efi_disk_reset	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_reset(struct efi_block_io *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_rw_blocks	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_rw_blocks(struct efi_block_io *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_disk_write_blocks	lib/efi_loader/efi_disk.c	/^static efi_status_t EFIAPI efi_disk_write_blocks(struct efi_block_io *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_entry_hdr	include/efi.h	/^struct efi_entry_hdr {$/;"	s
efi_entry_memmap	include/efi.h	/^struct efi_entry_memmap {$/;"	s
efi_entry_t	include/efi.h	/^enum efi_entry_t {$/;"	g
efi_event	lib/efi_loader/efi_boottime.c	/^} efi_event = {$/;"	v	typeref:struct:__anonb3c3434b0108
efi_event_type	include/efi_api.h	/^enum efi_event_type {$/;"	g
efi_exit	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_exit_boot_services	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_exit_boot_services(void *image_handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_exit_caches	lib/efi_loader/efi_boottime.c	/^static void efi_exit_caches(void)$/;"	f	typeref:typename:void	file:
efi_exit_func	lib/efi_loader/efi_boottime.c	/^efi_status_t efi_exit_func(efi_status_t ret)$/;"	f	typeref:typename:efi_status_t
efi_find_free_memory	lib/efi_loader/efi_memory.c	/^static uint64_t efi_find_free_memory(uint64_t len, uint64_t max_addr)$/;"	f	typeref:typename:uint64_t	file:
efi_free	lib/efi/efi.c	/^void efi_free(struct efi_priv *priv, void *ptr)$/;"	f	typeref:typename:void
efi_free_pages	lib/efi_loader/efi_memory.c	/^efi_status_t efi_free_pages(uint64_t memory, unsigned long pages)$/;"	f	typeref:typename:efi_status_t
efi_free_pages_ext	lib/efi_loader/efi_boottime.c	/^efi_status_t EFIAPI efi_free_pages_ext(uint64_t memory, unsigned long pages)$/;"	f	typeref:typename:efi_status_t EFIAPI
efi_free_pool	lib/efi_loader/efi_memory.c	/^efi_status_t efi_free_pool(void *buffer)$/;"	f	typeref:typename:efi_status_t
efi_free_pool_ext	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_free_pool_ext(void *buffer)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_gd	lib/efi_loader/efi_boottime.c	/^static volatile void *efi_gd, *app_gd;$/;"	v	typeref:typename:volatile void *	file:
efi_get_memory_map	lib/efi_loader/efi_memory.c	/^efi_status_t efi_get_memory_map(unsigned long *memory_map_size,$/;"	f	typeref:typename:efi_status_t
efi_get_memory_map_ext	lib/efi_loader/efi_boottime.c	/^efi_status_t EFIAPI efi_get_memory_map_ext(unsigned long *memory_map_size,$/;"	f	typeref:typename:efi_status_t EFIAPI
efi_get_next_mem_desc	include/efi.h	/^static inline struct efi_mem_desc *efi_get_next_mem_desc($/;"	f	typeref:struct:efi_mem_desc *
efi_get_next_monotonic_count	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_get_next_monotonic_count(uint64_t *count)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_get_ram_base	lib/efi/efi_app.c	/^unsigned long efi_get_ram_base(void)$/;"	f	typeref:typename:unsigned long
efi_get_sys_table	lib/efi/efi_app.c	/^struct efi_system_table *efi_get_sys_table(void)$/;"	f	typeref:struct:efi_system_table *
efi_get_time	lib/efi_loader/efi_runtime.c	/^efi_status_t __weak __efi_runtime EFIAPI efi_get_time($/;"	f	typeref:typename:efi_status_t __weak __efi_runtime EFIAPI
efi_get_time_boottime	lib/efi_loader/efi_runtime.c	/^static efi_status_t EFIAPI efi_get_time_boottime($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_get_time_init	lib/efi_loader/efi_runtime.c	/^void __weak efi_get_time_init(void)$/;"	f	typeref:typename:void __weak
efi_gop	include/efi_api.h	/^struct efi_gop$/;"	s
efi_gop_guid	lib/efi_loader/efi_gop.c	/^static const efi_guid_t efi_gop_guid = EFI_GOP_GUID;$/;"	v	typeref:typename:const efi_guid_t	file:
efi_gop_mode	include/efi_api.h	/^struct efi_gop_mode$/;"	s
efi_gop_mode_info	include/efi_api.h	/^struct efi_gop_mode_info$/;"	s
efi_gop_obj	lib/efi_loader/efi_gop.c	/^struct efi_gop_obj {$/;"	s	file:
efi_gop_register	lib/efi_loader/efi_gop.c	/^int efi_gop_register(void)$/;"	f	typeref:typename:int
efi_guid	arch/x86/include/asm/fsp/fsp_types.h	/^struct efi_guid {$/;"	s
efi_guid_console_control	lib/efi_loader/efi_console.c	/^const efi_guid_t efi_guid_console_control = CONSOLE_CONTROL_GUID;$/;"	v	typeref:typename:const efi_guid_t
efi_guid_device_path	lib/efi_loader/efi_image_loader.c	/^const efi_guid_t efi_guid_device_path = DEVICE_PATH_GUID;$/;"	v	typeref:typename:const efi_guid_t
efi_guid_loaded_image	lib/efi_loader/efi_image_loader.c	/^const efi_guid_t efi_guid_loaded_image = LOADED_IMAGE_GUID;$/;"	v	typeref:typename:const efi_guid_t
efi_guid_t	include/part_efi.h	/^} efi_guid_t;$/;"	t	typeref:struct:__anon7effa4980108
efi_handle_protocol	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_handle_protocol(void *handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_handle_t	include/efi.h	/^typedef void *efi_handle_t;$/;"	t	typeref:typename:void *
efi_handler	include/efi_loader.h	/^struct efi_handler {$/;"	s
efi_info	arch/x86/include/asm/bootparam.h	/^	struct efi_info efi_info;			\/* 0x1c0 *\/$/;"	m	struct:boot_params	typeref:struct:efi_info
efi_info	arch/x86/include/asm/bootparam.h	/^struct efi_info {$/;"	s
efi_info_get	lib/efi/efi_info.c	/^int efi_info_get(enum efi_entry_t type, void **datap, int *sizep)$/;"	f	typeref:typename:int
efi_info_hdr	include/efi.h	/^struct efi_info_hdr {$/;"	s
efi_init	lib/efi/efi.c	/^int efi_init(struct efi_priv *priv, const char *banner, efi_handle_t image,$/;"	f	typeref:typename:int
efi_input_key	include/efi_api.h	/^struct efi_input_key {$/;"	s
efi_install_configuration_table	lib/efi_loader/efi_boottime.c	/^efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table)$/;"	f	typeref:typename:efi_status_t
efi_install_configuration_table_ext	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_install_configuration_table_ext(efi_guid_t *guid,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_install_multiple_protocol_interfaces	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_install_multiple_protocol_interfaces($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_install_protocol_interface	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_install_protocol_interface(void **handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_invalid_parameter	lib/efi_loader/efi_runtime.c	/^static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void)$/;"	f	typeref:typename:efi_status_t __efi_runtime EFIAPI	file:
efi_ip_address	include/efi_api.h	/^struct efi_ip_address {$/;"	s
efi_is_direct_boot	lib/efi_loader/efi_boottime.c	/^static bool efi_is_direct_boot = true;$/;"	v	typeref:typename:bool	file:
efi_load_image	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_load_image(bool boot_policy,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_load_pe	lib/efi_loader/efi_image_loader.c	/^void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info)$/;"	f	typeref:typename:void *
efi_loaded_image	include/efi_api.h	/^struct efi_loaded_image {$/;"	s
efi_loader_relocate	lib/efi_loader/efi_image_loader.c	/^static void efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel,$/;"	f	typeref:typename:void	file:
efi_loader_signature	arch/x86/include/asm/bootparam.h	/^	__u32 efi_loader_signature;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_locate_device_path	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_locate_device_path(efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_locate_handle	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_locate_handle($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_locate_handle_buffer	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_locate_handle_buffer($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_locate_protocol	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_locate_protocol(efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_locate_search_type	include/efi.h	/^enum efi_locate_search_type {$/;"	g
efi_mac_address	include/efi_api.h	/^struct efi_mac_address {$/;"	s
efi_main	lib/efi/efi_app.c	/^efi_status_t efi_main(efi_handle_t image, struct efi_system_table *sys_table)$/;"	f	typeref:typename:efi_status_t
efi_main	lib/efi/efi_stub.c	/^efi_status_t efi_main(efi_handle_t image, struct efi_system_table *sys_table)$/;"	f	typeref:typename:efi_status_t
efi_malloc	lib/efi/efi.c	/^void *efi_malloc(struct efi_priv *priv, int size, efi_status_t *retp)$/;"	f	typeref:typename:void *
efi_mem_carve_out	lib/efi_loader/efi_memory.c	/^static int efi_mem_carve_out(struct efi_mem_list *map,$/;"	f	typeref:typename:int	file:
efi_mem_cmp	lib/efi_loader/efi_memory.c	/^static int efi_mem_cmp(void *priv, struct list_head *a, struct list_head *b)$/;"	f	typeref:typename:int	file:
efi_mem_desc	include/efi.h	/^struct efi_mem_desc {$/;"	s
efi_mem_list	lib/efi_loader/efi_memory.c	/^struct efi_mem_list {$/;"	s	file:
efi_mem_sort	lib/efi_loader/efi_memory.c	/^static void efi_mem_sort(void)$/;"	f	typeref:typename:void	file:
efi_mem_type	include/efi.h	/^enum efi_mem_type {$/;"	g
efi_memdesc_size	arch/x86/include/asm/bootparam.h	/^	__u32 efi_memdesc_size;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_memdesc_version	arch/x86/include/asm/bootparam.h	/^	__u32 efi_memdesc_version;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_memmap	arch/x86/include/asm/bootparam.h	/^	__u32 efi_memmap;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_memmap_hi	arch/x86/include/asm/bootparam.h	/^	__u32 efi_memmap_hi;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_memmap_size	arch/x86/include/asm/bootparam.h	/^	__u32 efi_memmap_size;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_memory_init	lib/efi_loader/efi_memory.c	/^int efi_memory_init(void)$/;"	f	typeref:typename:int
efi_memset	lib/efi/efi.c	/^static void efi_memset(void *ptr, int ch, int size)$/;"	f	typeref:typename:void	file:
efi_net_get_status	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_guid	lib/efi_loader/efi_net.c	/^static const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_GUID;$/;"	v	typeref:typename:const efi_guid_t	file:
efi_net_initialize	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_mcastiptomac	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_mcastiptomac(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_nvdata	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_nvdata(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_obj	lib/efi_loader/efi_net.c	/^struct efi_net_obj {$/;"	s	file:
efi_net_open_dp	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_open_dp(void *handle, efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_open_pxe	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_open_pxe(void *handle, efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_push	lib/efi_loader/efi_net.c	/^static void efi_net_push(void *pkt, int len)$/;"	f	typeref:typename:void	file:
efi_net_receive	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_receive(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_receive_filters	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_receive_filters($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_register	lib/efi_loader/efi_net.c	/^int efi_net_register(void **handle)$/;"	f	typeref:typename:int
efi_net_reset	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_reset(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_set_dhcp_ack	include/efi_loader.h	/^static inline void efi_net_set_dhcp_ack(void *pkt, int len) { }$/;"	f	typeref:typename:void
efi_net_set_dhcp_ack	lib/efi_loader/efi_net.c	/^void efi_net_set_dhcp_ack(void *pkt, int len)$/;"	f	typeref:typename:void
efi_net_shutdown	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_shutdown(struct efi_simple_network *this)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_start	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_start(struct efi_simple_network *this)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_station_address	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_station_address($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_statistics	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_statistics(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_stop	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_stop(struct efi_simple_network *this)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_net_transmit	lib/efi_loader/efi_net.c	/^static efi_status_t EFIAPI efi_net_transmit(struct efi_simple_network *this,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_object	include/efi_loader.h	/^struct efi_object {$/;"	s
efi_open_protocol	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_open_protocol($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_open_protocol_info_entry	include/efi.h	/^struct efi_open_protocol_info_entry {$/;"	s
efi_open_protocol_information	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_open_protocol_information(efi_handle_t handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_physical_addr_t	include/efi.h	/^typedef u64 efi_physical_addr_t;$/;"	t	typeref:typename:u64
efi_pool_allocation	lib/efi_loader/efi_memory.c	/^struct efi_pool_allocation {$/;"	s	file:
efi_print_mem_table	cmd/efi.c	/^static void efi_print_mem_table(struct efi_entry_memmap *map,$/;"	f	typeref:typename:void	file:
efi_priv	include/efi.h	/^struct efi_priv {$/;"	s
efi_protocols_per_handle	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_protocols_per_handle(void *handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_putc	lib/efi/efi.c	/^void efi_putc(struct efi_priv *priv, const char ch)$/;"	f	typeref:typename:void
efi_puts	lib/efi/efi.c	/^void efi_puts(struct efi_priv *priv, const char *str)$/;"	f	typeref:typename:void
efi_pxe	include/efi_api.h	/^struct efi_pxe {$/;"	s
efi_pxe_guid	lib/efi_loader/efi_net.c	/^static const efi_guid_t efi_pxe_guid = EFI_PXE_GUID;$/;"	v	typeref:typename:const efi_guid_t	file:
efi_pxe_mode	include/efi_api.h	/^struct efi_pxe_mode$/;"	s
efi_pxe_packet	include/efi_api.h	/^struct efi_pxe_packet {$/;"	s
efi_raise_tpl	lib/efi_loader/efi_boottime.c	/^static unsigned long EFIAPI efi_raise_tpl(unsigned long new_tpl)$/;"	f	typeref:typename:unsigned long EFIAPI	file:
efi_register_protocol_notify	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_register_protocol_notify(efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_reinstall_protocol_interface	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_reinstall_protocol_interface(void *handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_reset_system	arch/arm/cpu/armv8/fwcall.c	/^void __efi_runtime EFIAPI efi_reset_system($/;"	f	typeref:typename:void __efi_runtime EFIAPI
efi_reset_system	lib/efi_loader/efi_runtime.c	/^void __weak __efi_runtime EFIAPI efi_reset_system($/;"	f	typeref:typename:void __weak __efi_runtime EFIAPI
efi_reset_system_boottime	lib/efi_loader/efi_runtime.c	/^static void EFIAPI efi_reset_system_boottime($/;"	f	typeref:typename:void EFIAPI	file:
efi_reset_system_init	lib/efi_loader/efi_runtime.c	/^void __weak efi_reset_system_init(void)$/;"	f	typeref:typename:void __weak
efi_reset_type	include/efi_api.h	/^enum efi_reset_type {$/;"	g
efi_restore_gd	include/efi_loader.h	/^static inline void efi_restore_gd(void) { }$/;"	f	typeref:typename:void
efi_restore_gd	lib/efi_loader/efi_boottime.c	/^void efi_restore_gd(void)$/;"	f	typeref:typename:void
efi_restore_tpl	lib/efi_loader/efi_boottime.c	/^static void EFIAPI efi_restore_tpl(unsigned long old_tpl)$/;"	f	typeref:typename:void EFIAPI	file:
efi_return_handle	lib/efi_loader/efi_image_loader.c	/^efi_status_t EFIAPI efi_return_handle(void *handle, efi_guid_t *protocol,$/;"	f	typeref:typename:efi_status_t EFIAPI
efi_runtime_detach	lib/efi_loader/efi_runtime.c	/^static void efi_runtime_detach(ulong offset)$/;"	f	typeref:typename:void	file:
efi_runtime_detach_list	lib/efi_loader/efi_runtime.c	/^static const struct efi_runtime_detach_list_struct efi_runtime_detach_list[] = {$/;"	v	typeref:typename:const struct efi_runtime_detach_list_struct[]	file:
efi_runtime_detach_list_struct	lib/efi_loader/efi_runtime.c	/^struct efi_runtime_detach_list_struct {$/;"	s	file:
efi_runtime_mmio_list	lib/efi_loader/efi_runtime.c	/^struct efi_runtime_mmio_list {$/;"	s	file:
efi_runtime_relocate	lib/efi_loader/efi_runtime.c	/^void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map)$/;"	f	typeref:typename:void
efi_runtime_services	include/efi_api.h	/^struct efi_runtime_services {$/;"	s
efi_runtime_services	lib/efi_loader/efi_runtime.c	/^struct efi_runtime_services __efi_runtime_data efi_runtime_services = {$/;"	v	typeref:struct:efi_runtime_services __efi_runtime_data
efi_runtime_tobedetached	lib/efi_loader/efi_runtime.c	/^static bool efi_runtime_tobedetached(void *p)$/;"	f	typeref:typename:bool	file:
efi_save_gd	lib/efi_loader/efi_boottime.c	/^void efi_save_gd(void)$/;"	f	typeref:typename:void
efi_search	lib/efi_loader/efi_boottime.c	/^static int efi_search(enum efi_locate_search_type search_type,$/;"	f	typeref:typename:int	file:
efi_search_obj	lib/efi_loader/efi_boottime.c	/^static struct efi_object *efi_search_obj(void *handle)$/;"	f	typeref:struct:efi_object *	file:
efi_set_bootdev	cmd/bootefi.c	/^void efi_set_bootdev(const char *dev, const char *devnr, const char *path)$/;"	f	typeref:typename:void
efi_set_bootdev	include/efi_loader.h	/^static inline void efi_set_bootdev(const char *dev, const char *devnr,$/;"	f	typeref:typename:void
efi_set_mem	lib/efi_loader/efi_boottime.c	/^static void EFIAPI efi_set_mem(void *buffer, unsigned long size, uint8_t value)$/;"	f	typeref:typename:void EFIAPI	file:
efi_set_timer	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_set_timer(void *event, int type,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_set_virtual_address_map	lib/efi_loader/efi_runtime.c	/^static efi_status_t EFIAPI efi_set_virtual_address_map($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_set_watchdog_timer	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_set_watchdog_timer(unsigned long timeout,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_signal_event	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_signal_event(void *event)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_simple_input_interface	include/efi_api.h	/^struct efi_simple_input_interface {$/;"	s
efi_simple_network	include/efi_api.h	/^struct efi_simple_network$/;"	s
efi_simple_network_mode	include/efi_api.h	/^struct efi_simple_network_mode {$/;"	s
efi_simple_network_state	include/efi_api.h	/^enum efi_simple_network_state {$/;"	g
efi_simple_text_output_protocol	include/efi_api.h	/^struct efi_simple_text_output_protocol {$/;"	s
efi_smbios_register	lib/efi_loader/efi_smbios.c	/^void efi_smbios_register(void)$/;"	f	typeref:typename:void
efi_stall	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_stall(unsigned long microseconds)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_start_image	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_status_t	include/efi.h	/^typedef unsigned long efi_status_t;$/;"	t	typeref:typename:unsigned long
efi_systab	arch/x86/include/asm/bootparam.h	/^	__u32 efi_systab;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_systab_hi	arch/x86/include/asm/bootparam.h	/^	__u32 efi_systab_hi;$/;"	m	struct:efi_info	typeref:typename:__u32
efi_system_table	include/efi_api.h	/^struct efi_system_table {$/;"	s
efi_table_hdr	include/efi.h	/^struct efi_table_hdr {$/;"	s
efi_time	include/efi.h	/^struct efi_time {$/;"	s
efi_time_cap	include/efi.h	/^struct efi_time_cap {$/;"	s
efi_timer_check	lib/efi_loader/efi_boottime.c	/^void efi_timer_check(void)$/;"	f	typeref:typename:void
efi_unimplemented	lib/efi_loader/efi_runtime.c	/^static efi_status_t __efi_runtime EFIAPI efi_unimplemented(void)$/;"	f	typeref:typename:efi_status_t __efi_runtime EFIAPI	file:
efi_uninstall_multiple_protocol_interfaces	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces($/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_uninstall_protocol_interface	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_uninstall_protocol_interface(void *handle,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_unload_image	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_unload_image(void *image_handle)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
efi_unsupported	lib/efi_loader/efi_boottime.c	/^static efi_status_t efi_unsupported(const char *funcname)$/;"	f	typeref:typename:efi_status_t	file:
efi_virtual_addr_t	include/efi.h	/^typedef u64 efi_virtual_addr_t;$/;"	t	typeref:typename:u64
efi_wait_for_event	lib/efi_loader/efi_boottime.c	/^static efi_status_t EFIAPI efi_wait_for_event(unsigned long num_events,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
eflag	tools/imagetool.h	/^	int eflag;$/;"	m	struct:image_tool_params	typeref:typename:int
eflags	arch/x86/include/asm/ptrace.h	/^			long eflags;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0208	typeref:typename:long
eflags	arch/x86/include/asm/ptrace.h	/^			long eflags;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0308	typeref:typename:long
eflags	arch/x86/include/asm/ptrace.h	/^	long eflags;$/;"	m	struct:pt_regs	typeref:typename:long
eflags	arch/x86/lib/bios.h	/^	uint32_t eflags;$/;"	m	struct:eregs	typeref:typename:uint32_t
efnand_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	efnand_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
efnand_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	efnand_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
efnand_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	efnand_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
efnand_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	efnand_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
efnand_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	efnand_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
efuse	arch/arm/dts/rk3288.dtsi	/^	efuse: efuse@ffb40000 {$/;"	l
efuse	arch/arm/include/asm/omap_common.h	/^	struct volts_efuse_data efuse;$/;"	m	struct:volts	typeref:struct:volts_efuse_data
efuse_base	arch/arm/mach-zynq/include/mach/hardware.h	/^#define efuse_base /;"	d
efuse_max_value	drivers/power/exynos-tmu.c	/^	unsigned efuse_max_value;$/;"	m	struct:tmu_data	typeref:typename:unsigned	file:
efuse_min_value	drivers/power/exynos-tmu.c	/^	unsigned efuse_min_value;$/;"	m	struct:tmu_data	typeref:typename:unsigned	file:
efuse_prg_mask	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 efuse_prg_mask;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
efuse_read_mask	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 efuse_read_mask;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
efuse_reg	arch/arm/mach-zynq/include/mach/hardware.h	/^struct efuse_reg {$/;"	s
efuse_sma	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int efuse_sma;		\/* offset 0x1FC *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
efuse_value	drivers/power/exynos-tmu.c	/^	unsigned efuse_value;$/;"	m	struct:tmu_data	typeref:typename:unsigned	file:
eg20t_gpio	arch/mips/dts/img,boston.dts	/^				eg20t_gpio: eg20t_gpio@2,0,2 {$/;"	l
egr	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 egr;$/;"	m	struct:gpt_regs	typeref:typename:u32
egr	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 egr;	\/* event gen *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
egr	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 egr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
egr	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 egr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
egr_drop_mode	include/vsc9953.h	/^	u32	egr_drop_mode;$/;"	m	struct:vsc9953_qsys_drop_cfg	typeref:typename:u32
egr_no_sharing	include/vsc9953.h	/^	u32	egr_no_sharing;$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32
egress_untag_mode	drivers/net/vsc9953.c	/^enum egress_untag_mode {$/;"	g	file:
egress_vlan_tag	drivers/net/vsc9953.c	/^enum egress_vlan_tag {$/;"	g	file:
eh_depth	include/ext4fs.h	/^	__le16	eh_depth;	\/* has tree real underlying blocks? *\/$/;"	m	struct:ext4_extent_header	typeref:typename:__le16
eh_entries	include/ext4fs.h	/^	__le16	eh_entries;	\/* number of valid entries *\/$/;"	m	struct:ext4_extent_header	typeref:typename:__le16
eh_generation	include/ext4fs.h	/^	__le32	eh_generation;	\/* generation of the tree *\/$/;"	m	struct:ext4_extent_header	typeref:typename:__le32
eh_magic	include/ext4fs.h	/^	__le16	eh_magic;	\/* probably will support different formats *\/$/;"	m	struct:ext4_extent_header	typeref:typename:__le16
eh_max	include/ext4fs.h	/^	__le16	eh_max;		\/* capacity of store in entries *\/$/;"	m	struct:ext4_extent_header	typeref:typename:__le16
ehadr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ehadr;		\/* 0x1e14 - MCM Error High Address Capture Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
ehb	board/micronas/vct/scc.c	/^static inline void ehb(void)$/;"	f	typeref:typename:void	file:
ehci	drivers/usb/host/ehci-atmel.c	/^	struct ehci_ctrl ehci;$/;"	m	struct:ehci_atmel_priv	typeref:struct:ehci_ctrl	file:
ehci	drivers/usb/host/ehci-fsl.c	/^	struct ehci_ctrl ehci;$/;"	m	struct:ehci_fsl_priv	typeref:struct:ehci_ctrl	file:
ehci	drivers/usb/host/ehci-marvell.c	/^	struct ehci_ctrl ehci;$/;"	m	struct:ehci_mvebu_priv	typeref:struct:ehci_ctrl	file:
ehci	drivers/usb/host/ehci-msm.c	/^	struct usb_ehci *ehci; \/* Start of IP core*\/$/;"	m	struct:msm_ehci_priv	typeref:struct:usb_ehci *	file:
ehci	drivers/usb/host/ehci-mx6.c	/^	struct usb_ehci *ehci;$/;"	m	struct:ehci_mx6_priv_data	typeref:struct:usb_ehci *	file:
ehci	drivers/usb/host/ehci-omap.c	/^static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE;$/;"	v	typeref:struct:omap_ehci * const	file:
ehci	drivers/usb/host/ehci-pci.c	/^	struct ehci_ctrl ehci;$/;"	m	struct:ehci_pci_priv	typeref:struct:ehci_ctrl	file:
ehci	drivers/usb/host/ehci-sunxi.c	/^	struct ehci_ctrl ehci;$/;"	m	struct:ehci_sunxi_priv	typeref:struct:ehci_ctrl	file:
ehci	drivers/usb/host/ehci-tegra.c	/^	struct ehci_ctrl ehci;$/;"	m	struct:fdt_usb	typeref:struct:ehci_ctrl	file:
ehci	drivers/usb/host/ehci-vf.c	/^	struct usb_ehci *ehci;$/;"	m	struct:ehci_vf_priv_data	typeref:struct:usb_ehci *	file:
ehci	drivers/usb/host/ehci-zynq.c	/^	struct usb_ehci *ehci;$/;"	m	struct:zynq_ehci_priv	typeref:struct:usb_ehci *	file:
ehci0	arch/arm/dts/sun4i-a10.dtsi	/^		ehci0: usb@01c14000 {$/;"	l
ehci0	arch/arm/dts/sun5i.dtsi	/^		ehci0: usb@01c14000 {$/;"	l
ehci0	arch/arm/dts/sun6i-a31.dtsi	/^		ehci0: usb@01c1a000 {$/;"	l
ehci0	arch/arm/dts/sun7i-a20.dtsi	/^		ehci0: usb@01c14000 {$/;"	l
ehci0	arch/arm/dts/sun8i-a23-a33.dtsi	/^		ehci0: usb@01c1a000 {$/;"	l
ehci0	arch/arm/dts/sun8i-a83t.dtsi	/^		ehci0: usb@01c1a000 {$/;"	l
ehci0	arch/arm/dts/sun9i-a80.dtsi	/^		ehci0: usb@00a00000 {$/;"	l
ehci0	arch/arm/dts/vf.dtsi	/^			ehci0: ehci@40034000 {$/;"	l	label:aips0
ehci0	arch/mips/dts/ar933x.dtsi	/^			ehci0: ehci@1b000100 {$/;"	l
ehci0	arch/mips/dts/ar934x.dtsi	/^			ehci0: ehci@1b000100 {$/;"	l
ehci1	arch/arm/dts/sun4i-a10.dtsi	/^		ehci1: usb@01c1c000 {$/;"	l
ehci1	arch/arm/dts/sun50i-a64.dtsi	/^		ehci1: usb@01c1b000 {$/;"	l
ehci1	arch/arm/dts/sun6i-a31.dtsi	/^		ehci1: usb@01c1b000 {$/;"	l
ehci1	arch/arm/dts/sun7i-a20-primo73.dts	/^		ehci1: usb@01c1c000 {$/;"	l
ehci1	arch/arm/dts/sun7i-a20.dtsi	/^		ehci1: usb@01c1c000 {$/;"	l
ehci1	arch/arm/dts/sun8i-a83t.dtsi	/^		ehci1: usb@01c1b000 {$/;"	l
ehci1	arch/arm/dts/sun8i-h3.dtsi	/^		ehci1: usb@01c1b000 {$/;"	l
ehci1	arch/arm/dts/sun9i-a80.dtsi	/^		ehci1: usb@00a01000 {$/;"	l
ehci1	arch/arm/dts/vf.dtsi	/^			ehci1: ehci@400b4000 {$/;"	l	label:aips1
ehci2	arch/arm/dts/sun8i-h3.dtsi	/^		ehci2: usb@01c1c000 {$/;"	l
ehci2	arch/arm/dts/sun9i-a80.dtsi	/^		ehci2: usb@00a02000 {$/;"	l
ehci3	arch/arm/dts/sun8i-h3.dtsi	/^		ehci3: usb@01c1d000 {$/;"	l
ehci_atmel_enable_clk	drivers/usb/host/ehci-atmel.c	/^static int ehci_atmel_enable_clk(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_atmel_priv	drivers/usb/host/ehci-atmel.c	/^struct ehci_atmel_priv {$/;"	s	file:
ehci_atmel_probe	drivers/usb/host/ehci-atmel.c	/^static int ehci_atmel_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_clocks_enable	arch/arm/cpu/armv7/omap3/clock.c	/^void ehci_clocks_enable(void)$/;"	f	typeref:typename:void
ehci_common_init	drivers/usb/host/ehci-hcd.c	/^static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)$/;"	f	typeref:typename:int	file:
ehci_create_int_queue	drivers/usb/host/ehci-hcd.c	/^static struct int_queue *ehci_create_int_queue(struct udevice *dev,$/;"	f	typeref:struct:int_queue *	file:
ehci_ctrl	drivers/usb/host/ehci.h	/^struct ehci_ctrl {$/;"	s
ehci_debug_addr	arch/x86/cpu/ivybridge/model_206ax.c	/^static unsigned ehci_debug_addr;$/;"	v	typeref:typename:unsigned	file:
ehci_deregister	drivers/usb/host/ehci-hcd.c	/^int ehci_deregister(struct udevice *dev)$/;"	f	typeref:typename:int
ehci_destroy_int_queue	drivers/usb/host/ehci-hcd.c	/^static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ehci_encode_speed	drivers/usb/host/ehci-hcd.c	/^static inline u8 ehci_encode_speed(enum usb_device_speed speed)$/;"	f	typeref:typename:u8	file:
ehci_faraday_regs	drivers/usb/host/ehci-faraday.c	/^union ehci_faraday_regs {$/;"	u	file:
ehci_fsl_init	drivers/usb/host/ehci-fsl.c	/^static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci,$/;"	f	typeref:typename:int	file:
ehci_fsl_init_after_reset	drivers/usb/host/ehci-fsl.c	/^static int ehci_fsl_init_after_reset(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
ehci_fsl_ofdata_to_platdata	drivers/usb/host/ehci-fsl.c	/^static int ehci_fsl_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_fsl_priv	drivers/usb/host/ehci-fsl.c	/^struct ehci_fsl_priv {$/;"	s	file:
ehci_fsl_probe	drivers/usb/host/ehci-fsl.c	/^static int ehci_fsl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_get_controller_priv	drivers/usb/host/ehci-hcd.c	/^void *ehci_get_controller_priv(int index)$/;"	f	typeref:typename:void *
ehci_get_ctrl	drivers/usb/host/ehci-hcd.c	/^static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)$/;"	f	typeref:struct:ehci_ctrl *	file:
ehci_get_port_speed	drivers/usb/host/ehci-hcd.c	/^static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)$/;"	f	typeref:typename:int	file:
ehci_get_portsc_register	drivers/usb/host/ehci-hcd.c	/^static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)$/;"	f	typeref:typename:uint32_t *	file:
ehci_hccr	drivers/usb/host/ehci.h	/^struct ehci_hccr {$/;"	s
ehci_hcd_init	board/compulab/cm_t35/cm_t35.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/compulab/cm_t3517/cm_t3517.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/compulab/cm_t54/cm_t54.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/gumstix/duovero/duovero.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/htkw/mcx/mcx.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/overo/overo.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/technexion/tao3530/tao3530.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/technexion/twister/twister.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/teejet/mt_ventoux/mt_ventoux.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/ti/beagle/beagle.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/ti/omap5_uevm/evm.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	board/ti/panda/panda.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-armada100.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-atmel.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-faraday.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-fsl.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-marvell.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-mpc512x.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-mx5.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-mx6.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-mxc.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-mxs.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-pci.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-ppc4xx.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-rmobile.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-spear.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-vct.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_init	drivers/usb/host/ehci-vf.c	/^int ehci_hcd_init(int index, enum usb_init_type init,$/;"	f	typeref:typename:int
ehci_hcd_stop	board/compulab/cm_t35/cm_t35.c	/^int ehci_hcd_stop(void)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/compulab/cm_t3517/cm_t3517.c	/^int ehci_hcd_stop(void)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/compulab/cm_t54/cm_t54.c	/^int ehci_hcd_stop(void)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/gumstix/duovero/duovero.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/htkw/mcx/mcx.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/overo/overo.c	/^int ehci_hcd_stop(void)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/technexion/tao3530/tao3530.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/technexion/twister/twister.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/teejet/mt_ventoux/mt_ventoux.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/ti/beagle/beagle.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/ti/omap5_uevm/evm.c	/^int ehci_hcd_stop(void)$/;"	f	typeref:typename:int
ehci_hcd_stop	board/ti/panda/panda.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-armada100.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-atmel.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-faraday.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-fsl.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-marvell.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-mpc512x.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-mx5.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-mx6.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-mxc.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-mxs.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-pci.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-ppc4xx.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-rmobile.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-spear.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-vct.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcd_stop	drivers/usb/host/ehci-vf.c	/^int ehci_hcd_stop(int index)$/;"	f	typeref:typename:int
ehci_hcor	drivers/usb/host/ehci.h	/^struct ehci_hcor {$/;"	s
ehci_is_TDI	drivers/usb/host/ehci-hcd.c	/^#define ehci_is_TDI(/;"	d	file:
ehci_is_fotg2xx	drivers/usb/host/ehci-faraday.c	/^static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs)$/;"	f	typeref:typename:int	file:
ehci_mvebu_priv	drivers/usb/host/ehci-marvell.c	/^struct ehci_mvebu_priv {$/;"	s	file:
ehci_mvebu_probe	drivers/usb/host/ehci-marvell.c	/^static int ehci_mvebu_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_mx6_common_init	drivers/usb/host/ehci-mx6.c	/^int ehci_mx6_common_init(struct usb_ehci *ehci, int index)$/;"	f	typeref:typename:int
ehci_mx6_priv_data	drivers/usb/host/ehci-mx6.c	/^struct ehci_mx6_priv_data {$/;"	s	file:
ehci_mxs_port	drivers/usb/host/ehci-mxs.c	/^struct ehci_mxs_port {$/;"	s	file:
ehci_mxs_toggle_clock	drivers/usb/host/ehci-mxs.c	/^static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable)$/;"	f	typeref:typename:int	file:
ehci_ops	drivers/usb/host/ehci.h	/^struct ehci_ops {$/;"	s
ehci_pci_ids	drivers/usb/host/ehci-pci.c	/^static const struct udevice_id ehci_pci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_pci_ids	drivers/usb/host/ehci-pci.c	/^static struct pci_device_id ehci_pci_ids[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
ehci_pci_ids	drivers/usb/host/ohci-hcd.c	/^static struct pci_device_id ehci_pci_ids[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
ehci_pci_init	drivers/usb/host/ehci-pci.c	/^static void ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,$/;"	f	typeref:typename:void	file:
ehci_pci_legacy_init	drivers/usb/host/ehci-pci.c	/^static void ehci_pci_legacy_init(pci_dev_t pdev, struct ehci_hccr **ret_hccr,$/;"	f	typeref:typename:void	file:
ehci_pci_priv	drivers/usb/host/ehci-pci.c	/^struct ehci_pci_priv {$/;"	s	file:
ehci_pci_probe	drivers/usb/host/ehci-pci.c	/^static int ehci_pci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_pci_supported	drivers/usb/host/ehci-pci.c	/^static struct pci_device_id ehci_pci_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
ehci_poll_int_queue	drivers/usb/host/ehci-hcd.c	/^static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:void *	file:
ehci_powerup_fixup	drivers/usb/host/ehci-hcd.c	/^static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,$/;"	f	typeref:typename:void	file:
ehci_readl	drivers/usb/host/ehci.h	/^#define ehci_readl(/;"	d
ehci_register	drivers/usb/host/ehci-hcd.c	/^int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,$/;"	f	typeref:typename:int
ehci_reset	drivers/usb/host/ehci-hcd.c	/^static int ehci_reset(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
ehci_set_controller_priv	drivers/usb/host/ehci-hcd.c	/^void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)$/;"	f	typeref:typename:void
ehci_set_usbmode	drivers/usb/host/ehci-hcd.c	/^static void ehci_set_usbmode(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:void	file:
ehci_setup_ops	drivers/usb/host/ehci-hcd.c	/^static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)$/;"	f	typeref:typename:void	file:
ehci_shutdown	drivers/usb/host/ehci-hcd.c	/^static int ehci_shutdown(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
ehci_submit_async	drivers/usb/host/ehci-hcd.c	/^ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int	file:
ehci_submit_bulk_msg	drivers/usb/host/ehci-hcd.c	/^static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ehci_submit_control_msg	drivers/usb/host/ehci-hcd.c	/^static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ehci_submit_int_msg	drivers/usb/host/ehci-hcd.c	/^static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ehci_submit_root	drivers/usb/host/ehci-hcd.c	/^static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
ehci_sunxi_priv	drivers/usb/host/ehci-sunxi.c	/^struct ehci_sunxi_priv {$/;"	s	file:
ehci_td_buffer	drivers/usb/host/ehci-hcd.c	/^static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)$/;"	f	typeref:typename:int	file:
ehci_update_endpt2_dev_n_port	drivers/usb/host/ehci-hcd.c	/^static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,$/;"	f	typeref:typename:void	file:
ehci_usb_ids	drivers/usb/host/ehci-atmel.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-exynos.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-fsl.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-generic.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-marvell.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-msm.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-sunxi.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ids	drivers/usb/host/ehci-tegra.c	/^static const struct udevice_id ehci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_usb_ofdata_to_platdata	drivers/usb/host/ehci-exynos.c	/^static int ehci_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_ofdata_to_platdata	drivers/usb/host/ehci-msm.c	/^static int ehci_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_ofdata_to_platdata	drivers/usb/host/ehci-tegra.c	/^static int ehci_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_ops	drivers/usb/host/ehci-hcd.c	/^struct dm_usb_ops ehci_usb_ops = {$/;"	v	typeref:struct:dm_usb_ops
ehci_usb_probe	drivers/usb/host/ehci-exynos.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_probe	drivers/usb/host/ehci-generic.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_probe	drivers/usb/host/ehci-msm.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_probe	drivers/usb/host/ehci-mx6.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_probe	drivers/usb/host/ehci-sunxi.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_probe	drivers/usb/host/ehci-tegra.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_probe	drivers/usb/host/ehci-vf.c	/^static int ehci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_remove	drivers/usb/host/ehci-exynos.c	/^static int ehci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_remove	drivers/usb/host/ehci-msm.c	/^static int ehci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_usb_remove	drivers/usb/host/ehci-sunxi.c	/^static int ehci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_vf_common_init	drivers/usb/host/ehci-vf.c	/^int ehci_vf_common_init(struct usb_ehci *ehci, int index)$/;"	f	typeref:typename:int
ehci_vf_priv_data	drivers/usb/host/ehci-vf.c	/^struct ehci_vf_priv_data {$/;"	s	file:
ehci_writel	drivers/usb/host/ehci.h	/^#define ehci_writel(/;"	d
ehci_zynq_ids	drivers/usb/host/ehci-zynq.c	/^static const struct udevice_id ehci_zynq_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ehci_zynq_ofdata_to_platdata	drivers/usb/host/ehci-zynq.c	/^static int ehci_zynq_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehci_zynq_probe	drivers/usb/host/ehci-zynq.c	/^static int ehci_zynq_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ehcibar	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t ehcibar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
ehcic	drivers/usb/host/ehci-hcd.c	/^static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];$/;"	v	typeref:struct:ehci_ctrl[]	file:
ehcictrl	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int ehcictrl;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
ehcictrl	drivers/usb/host/ehci-zynq.c	/^	struct ehci_ctrl ehcictrl;$/;"	m	struct:zynq_ehci_priv	typeref:struct:ehci_ctrl	file:
ehcidatac	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	ehcidatac;	\/* 0xfe4fe018 *\/$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int
ehcidatac	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	ehcidatac;	\/* 0xfe4fe018 *\/$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int
ehcidatac	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ehcidatac;	\/* 0xfe4fe018 *\/$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int
ehdrloc	include/fsl_validate.h	/^	uintptr_t ehdrloc;	\/* ESBC Header location *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:uintptr_t
ehrpwm0	arch/arm/dts/am33xx.dtsi	/^			ehrpwm0: ehrpwm@48300200 {$/;"	l	label:epwmss0
ehrpwm0	arch/arm/dts/am4372.dtsi	/^			ehrpwm0: ehrpwm@48300200 {$/;"	l	label:epwmss0
ehrpwm0_tbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {$/;"	l
ehrpwm0_tbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	ehrpwm0_tbclk: ehrpwm0_tbclk {$/;"	l
ehrpwm1	arch/arm/dts/am335x-rut.dts	/^	ehrpwm1: ehrpwm@48302200 {$/;"	l
ehrpwm1	arch/arm/dts/am33xx.dtsi	/^			ehrpwm1: ehrpwm@48302200 {$/;"	l	label:epwmss1
ehrpwm1	arch/arm/dts/am4372.dtsi	/^			ehrpwm1: ehrpwm@48302200 {$/;"	l	label:epwmss1
ehrpwm1_tbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {$/;"	l
ehrpwm1_tbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	ehrpwm1_tbclk: ehrpwm1_tbclk {$/;"	l
ehrpwm2	arch/arm/dts/am33xx.dtsi	/^			ehrpwm2: ehrpwm@48304200 {$/;"	l	label:epwmss2
ehrpwm2	arch/arm/dts/am4372.dtsi	/^			ehrpwm2: ehrpwm@48304200 {$/;"	l	label:epwmss2
ehrpwm2_tbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {$/;"	l
ehrpwm2_tbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	ehrpwm2_tbclk: ehrpwm2_tbclk {$/;"	l
ehrpwm3	arch/arm/dts/am4372.dtsi	/^			ehrpwm3: ehrpwm@48306200 {$/;"	l	label:epwmss3
ehrpwm3_tbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	ehrpwm3_tbclk: ehrpwm3_tbclk {$/;"	l
ehrpwm4	arch/arm/dts/am4372.dtsi	/^			ehrpwm4: ehrpwm@48308200 {$/;"	l	label:epwmss4
ehrpwm4_tbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	ehrpwm4_tbclk: ehrpwm4_tbclk {$/;"	l
ehrpwm5	arch/arm/dts/am4372.dtsi	/^			ehrpwm5: ehrpwm@4830a200 {$/;"	l	label:epwmss5
ehrpwm5_tbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	ehrpwm5_tbclk: ehrpwm5_tbclk {$/;"	l
ei_block	include/ext4fs.h	/^	__le32	ei_block;	\/* index covers logical blocks from 'block' *\/$/;"	m	struct:ext4_extent_idx	typeref:typename:__le32
ei_leaf_hi	include/ext4fs.h	/^	__le16	ei_leaf_hi;	\/* high 16 bits of physical block *\/$/;"	m	struct:ext4_extent_idx	typeref:typename:__le16
ei_leaf_lo	include/ext4fs.h	/^	__le32	ei_leaf_lo;	\/* pointer to the physical block of the next *$/;"	m	struct:ext4_extent_idx	typeref:typename:__le32
ei_unused	include/ext4fs.h	/^	__u16	ei_unused;$/;"	m	struct:ext4_extent_idx	typeref:typename:__u16
eicr	include/linux/immap_qe.h	/^	u32 eicr;$/;"	m	struct:rsp	typeref:typename:u32
eide_dma_min	include/ata.h	/^	unsigned short  eide_dma_min;	\/* min mword dma cycle time (ns) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
eide_dma_time	include/ata.h	/^	unsigned short  eide_dma_time;	\/* recommended mword dma cycle time (ns) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
eide_pio	include/ata.h	/^	unsigned short  eide_pio;       \/* min cycle time (ns), no IORDY  *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
eide_pio_iordy	include/ata.h	/^	unsigned short  eide_pio_iordy; \/* min cycle time (ns), with IORDY *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
eide_pio_modes	include/ata.h	/^	unsigned short  eide_pio_modes; \/* bits 0:mode3 1:mode4 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
eidqdpar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidqdpar; \/* Extended Inbound Descriptor Queue DPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
eidqtpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidqtpar;	\/* 0xd3068 - Extended Inbound Descriptor Queue Tail Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
eidr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr0;		\/* External IRQ Destination 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr0;		\/* 0x50010 - External Interrupt Destination Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr1;		\/* External IRQ Destination 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr1;		\/* 0x50030 - External Interrupt Destination Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr10;		\/* External IRQ Destination 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr10	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr10;		\/* 0x50150 - External Interrupt Destination Register 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr11;		\/* External IRQ Destination 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr11	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr11;		\/* 0x50170 - External Interrupt Destination Register 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr2;		\/* External IRQ Destination 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr2;		\/* 0x50050 - External Interrupt Destination Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr3;		\/* External IRQ Destination 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr3;		\/* 0x50070 - External Interrupt Destination Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr4;		\/* External IRQ Destination 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr4;		\/* 0x50090 - External Interrupt Destination Register 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr5;		\/* External IRQ Destination 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr5;		\/* 0x500b0 - External Interrupt Destination Register 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr6;		\/* External IRQ Destination 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr6;		\/* 0x500d0 - External Interrupt Destination Register 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr7;		\/* External IRQ Destination 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr7;		\/* 0x500f0 - External Interrupt Destination Register 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr8;		\/* External IRQ Destination 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr8;		\/* 0x50110 - External Interrupt Destination Register 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eidr9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eidr9;		\/* External IRQ Destination 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eidr9	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eidr9;		\/* 0x50130 - External Interrupt Destination Register 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eieio	arch/powerpc/include/asm/io.h	/^static inline void eieio(void)$/;"	f	typeref:typename:void
eifqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eifqepar; \/* Extended Inbound Frame Queue EPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
eifqhpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eifqhpar;	\/* 0xd3070 - Extended Inbound Frame Queue Head Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
eihqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32 eihqepar; \/* Extended inbound message header queue EPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
eim	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 eim;	\/* WEIM Configuration Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
eimcr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	eimcr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
eimnor_cs_setup	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void eimnor_cs_setup(void)$/;"	f	typeref:typename:void	file:
eimnor_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t const eimnor_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
eimr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	eimr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
eimr	arch/m68k/include/asm/fec.h	/^	u32 eimr;		\/* 0x08 *\/$/;"	m	struct:fec	typeref:typename:u32
eimr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 eimr;		\/* 0x008 *\/$/;"	m	struct:fecdma	typeref:typename:u32
eimsr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	eimsr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
eint0	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	eint0;		\/* 0x18 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
eint1	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	eint1;		\/* 0x1c *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
eint_wakeup_mask	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	eint_wakeup_mask;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
eint_wakeup_mask	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	eint_wakeup_mask;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
eint_wakeup_mask	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	eint_wakeup_mask;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
eint_wakeup_mask_coreblk	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	eint_wakeup_mask_coreblk;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
eint_wakeup_mask_dmc	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	eint_wakeup_mask_dmc;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
eintflt0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	eintflt0;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
eintflt1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	eintflt1;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
eintflt2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	eintflt2;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
eintflt3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	eintflt3;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
eintmask	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	eintmask;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
eintpend	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	eintpend;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
eip	arch/x86/include/asm/ptrace.h	/^			long eip;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0208	typeref:typename:long
eip	arch/x86/include/asm/ptrace.h	/^			long eip;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0308	typeref:typename:long
eip	arch/x86/include/asm/ptrace.h	/^	long eip;$/;"	m	struct:pt_regs	typeref:typename:long
eip	arch/x86/lib/bios.h	/^	uint32_t eip;$/;"	m	struct:eregs	typeref:typename:uint32_t
eir	arch/m68k/include/asm/fec.h	/^	u32 eir;		\/* 0x04 *\/$/;"	m	struct:fec	typeref:typename:u32
eir	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 eir;		\/* 0x004 *\/$/;"	m	struct:fecdma	typeref:typename:u32
eirr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	eirr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
eivpr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr0;		\/* External IRQ Vector\/Priority 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr0;		\/* 0x50000 - External Interrupt Vector\/Priority Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr1;		\/* External IRQ Vector\/Priority 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr1;		\/* 0x50020 - External Interrupt Vector\/Priority Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr10;	\/* External IRQ Vector\/Priority 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr10	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr10;	\/* 0x50140 - External Interrupt Vector\/Priority Register 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr11;	\/* External IRQ Vector\/Priority 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr11	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr11;	\/* 0x50160 - External Interrupt Vector\/Priority Register 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr2;		\/* External IRQ Vector\/Priority 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr2;		\/* 0x50040 - External Interrupt Vector\/Priority Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr3;		\/* External IRQ Vector\/Priority 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr3;		\/* 0x50060 - External Interrupt Vector\/Priority Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr4;		\/* External IRQ Vector\/Priority 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr4;		\/* 0x50080 - External Interrupt Vector\/Priority Register 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr5;		\/* External IRQ Vector\/Priority 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr5;		\/* 0x500a0 - External Interrupt Vector\/Priority Register 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr6;		\/* External IRQ Vector\/Priority 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr6;		\/* 0x500c0 - External Interrupt Vector\/Priority Register 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr7;		\/* External IRQ Vector\/Priority 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr7;		\/* 0x500e0 - External Interrupt Vector\/Priority Register 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr8;		\/* External IRQ Vector\/Priority 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr8;		\/* 0x50100 - External Interrupt Vector\/Priority Register 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eivpr9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eivpr9;		\/* External IRQ Vector\/Priority 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eivpr9	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eivpr9;		\/* 0x50120 - External Interrupt Vector\/Priority Register 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
el	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 el[24];	\/* 0x8C-0xE8 Error Location Registers *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[24]
el	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 el[32];	\/* 0xAC-0x128 Error Location Registers *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[32]
eladr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eladr;		\/* 0x1e10 - MCM Error Low Address Capture Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
elat	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 elat;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
elatcl	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 elatcl;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
elbc_ctrl	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct fsl_elbc_ctrl *elbc_ctrl;$/;"	v	typeref:struct:fsl_elbc_ctrl *	file:
elbcclkdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	elbcclkdr;	\/* eLBC clock disable *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
elbt_chan	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^elbt_chan;$/;"	t	typeref:struct:__anon7d79ed4b0408	file:
elbt_chans	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static elbt_chan elbt_chans[3] __attribute__ ((aligned(8)));$/;"	v	typeref:typename:elbt_chan[3]	file:
elbt_prdesc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^elbt_prdesc;$/;"	t	typeref:struct:__anon7d79ed4b0108	file:
elbt_rxeacc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^elbt_rxeacc;$/;"	t	typeref:struct:__anon7d79ed4b0208	file:
elbt_txeacc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^elbt_txeacc;$/;"	t	typeref:struct:__anon7d79ed4b0308	file:
elcfg	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elcfg;	\/* 0x00 Error Location Configuration Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
eldis	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 eldis;	\/* 0x0C Error Location Disable Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
element	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long element;	\/* Queue element pointer (LE) *\/$/;"	m	struct:__anon66fd0d690208	typeref:typename:unsigned long
element	board/mpl/common/usb_uhci.h	/^	unsigned long element;		\/* Queue element pointer (LE) *\/$/;"	m	struct:__anon0a2b4c740208	typeref:typename:unsigned long
element_count	include/smbios.h	/^	u8 element_count;$/;"	m	struct:smbios_type3	typeref:typename:u8
element_record_length	include/smbios.h	/^	u8 element_record_length;$/;"	m	struct:smbios_type3	typeref:typename:u8
elementsize	drivers/usb/host/ehci-hcd.c	/^	int elementsize;$/;"	m	struct:int_queue	typeref:typename:int	file:
elems	lib/zlib/trees.c	/^    int     elems;               \/* max number of elements in the tree *\/$/;"	m	struct:static_tree_desc_s	typeref:typename:int	file:
elen	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elen;	\/* 0x08 Error Location Enable Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
elf32_sym	include/elf.h	/^typedef struct elf32_sym {$/;"	s
elf_rel	lib/efi_loader/efi_runtime.c	/^struct elf_rel {$/;"	s	file:
elf_rela	lib/efi_loader/efi_runtime.c	/^struct elf_rela {$/;"	s	file:
elfhdr	include/elf.h	/^typedef struct elfhdr{$/;"	s
elidr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elidr;	\/* 0x08 Error Location Interrupt Disable Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
elier	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elier;	\/* 0x14 Error Location Interrupt Enable Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
elimr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elimr;	\/* 0x0C Error Location Interrupt Mask Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
elisr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elisr;	\/* 0x20 Error Location Interrupt Status Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
elm	arch/arm/dts/am33xx.dtsi	/^		elm: elm@48080000 {$/;"	l
elm	arch/arm/dts/am4372.dtsi	/^		elm: elm@48080000 {$/;"	l
elm	arch/arm/dts/dra7.dtsi	/^		elm: elm@48078000 {$/;"	l
elm	include/linux/mtd/omap_elm.h	/^struct elm {$/;"	s
elm_cfg	drivers/mtd/nand/omap_elm.c	/^struct elm *elm_cfg;$/;"	v	typeref:struct:elm *
elm_check_error	drivers/mtd/nand/omap_elm.c	/^int elm_check_error(u8 *syndrome, enum bch_level bch_type, u32 *error_count,$/;"	f	typeref:typename:int
elm_config	drivers/mtd/nand/omap_elm.c	/^int elm_config(enum bch_level level)$/;"	f	typeref:typename:int
elm_init	drivers/mtd/nand/omap_elm.c	/^void elm_init(void)$/;"	f	typeref:typename:void
elm_load_syndromes	drivers/mtd/nand/omap_elm.c	/^static void elm_load_syndromes(u8 *syndrome, enum bch_level bch_type, u8 poly)$/;"	f	typeref:typename:void	file:
elm_reset	drivers/mtd/nand/omap_elm.c	/^void elm_reset(void)$/;"	f	typeref:typename:void
elmclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int elmclkctrl;	\/* offset 0x40 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
elmclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int elmclkctrl;	\/* offset 0x468 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
elp	include/linux/bch.h	/^	struct gf_poly *elp;$/;"	m	struct:bch_control	typeref:struct:gf_poly *
elpida_2G_S4_details	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct lpddr2_device_details elpida_2G_S4_details = {$/;"	v	typeref:typename:const struct lpddr2_device_details
elpida_2G_S4_timings	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct lpddr2_device_timings elpida_2G_S4_timings = {$/;"	v	typeref:typename:const struct lpddr2_device_timings
elpida_4G_S4_details	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct lpddr2_device_details elpida_4G_S4_details = {$/;"	v	typeref:typename:const struct lpddr2_device_details
elpida_4gib_1600	board/kosagi/novena/novena_spl.c	/^static struct mx6_ddr3_cfg elpida_4gib_1600 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
elpida_ac_timings	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static const struct lpddr2_ac_timings *elpida_ac_timings[MAX_NUM_SPEEDBINS] = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings * []	file:
elprim	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elprim;	\/* 0x04 Error Location Primitive Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
elr	arch/arm/include/asm/proc-armv/ptrace.h	/^	unsigned long elr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
elr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 elr;$/;"	m	struct:at91_emac	typeref:typename:u32
elsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	elsr;		\/* 0xC8 Edge\/Level Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
elsr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 elsr;	\/* 0x10 Error Location Status Register *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
em_asic_bb5	board/nokia/rx51/tag_omap.h	/^		struct omap_em_asic_bb5_config em_asic_bb5;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_em_asic_bb5_config
emac	arch/arm/dts/sun4i-a10.dtsi	/^		emac: ethernet@01c0b000 {$/;"	l
emac	arch/arm/dts/sun50i-a64.dtsi	/^		emac: ethernet@01c30000 {$/;"	l
emac	arch/arm/dts/sun5i-a10s.dtsi	/^		emac: ethernet@01c0b000 {$/;"	l
emac	arch/arm/dts/sun7i-a20.dtsi	/^		emac: ethernet@01c0b000 {$/;"	l
emac	arch/arm/dts/sun8i-h3.dtsi	/^		emac: ethernet@1c30000 {$/;"	l
emac0_clk	arch/arm/dts/socfpga.dtsi	/^						emac0_clk: emac0_clk {$/;"	l	label:periph_pll
emac0_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	emac0_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
emac0_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	emac0_read_qos;			\/* 0x48100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
emac0_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	emac0_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
emac0clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	emac0clk;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
emac0clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t emac0clk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
emac1_clk	arch/arm/dts/socfpga.dtsi	/^						emac1_clk: emac1_clk {$/;"	l	label:periph_pll
emac1_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	emac1_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
emac1_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	emac1_read_qos;			\/* 0x49100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
emac1_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	emac1_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
emac1clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	emac1clk;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
emac1clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t emac1clk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
emac4xx_miiphy_read	arch/powerpc/cpu/ppc4xx/miiphy.c	/^int emac4xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int
emac4xx_miiphy_write	arch/powerpc/cpu/ppc4xx/miiphy.c	/^int emac4xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int
emac_0_clk	arch/arm/dts/socfpga.dtsi	/^					emac_0_clk: emac_0_clk {$/;"	l
emac_1_clk	arch/arm/dts/socfpga.dtsi	/^					emac_1_clk: emac_1_clk {$/;"	l
emac_4xx_hw_st	arch/powerpc/include/asm/ppc4xx-emac.h	/^typedef struct emac_4xx_hw_st {$/;"	s
emac_bd	drivers/net/zynq_gem.c	/^struct emac_bd {$/;"	s	file:
emac_dbg	drivers/net/davinci_emac.c	/^unsigned int	emac_dbg = 0;$/;"	v	typeref:typename:unsigned int
emac_desc	drivers/net/davinci_emac.h	/^} emac_desc;$/;"	t	typeref:typename:volatile struct _emac_desc
emac_device	drivers/net/at91_emac.c	/^} emac_device;$/;"	t	typeref:struct:__anon5765bb0e0208	file:
emac_dma_desc	drivers/net/sun8i_emac.c	/^struct emac_dma_desc {$/;"	s	file:
emac_err	drivers/net/4xx_enet.c	/^static void emac_err (struct eth_device *dev, unsigned long isr)$/;"	f	typeref:typename:void	file:
emac_eth_dev	drivers/net/sun8i_emac.c	/^struct emac_eth_dev {$/;"	s	file:
emac_eth_dev	drivers/net/sunxi_emac.c	/^struct emac_eth_dev {$/;"	s	file:
emac_gigabit_enable	drivers/net/davinci_emac.c	/^#define emac_gigabit_enable(/;"	d	file:
emac_gigabit_enable	drivers/net/keystone_net.c	/^#define emac_gigabit_enable(/;"	d	file:
emac_ier	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		emac_ier;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
emac_inblk_32bit	drivers/net/sunxi_emac.c	/^static void emac_inblk_32bit(void *reg, void *data, int count)$/;"	f	typeref:typename:void	file:
emac_loopback_disable	drivers/net/4xx_enet.c	/^static void emac_loopback_disable(EMAC_4XX_HW_PST hw_p)$/;"	f	typeref:typename:void	file:
emac_loopback_enable	drivers/net/4xx_enet.c	/^static void emac_loopback_enable(EMAC_4XX_HW_PST hw_p)$/;"	f	typeref:typename:void	file:
emac_mdio_read	drivers/net/sunxi_emac.c	/^static int emac_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
emac_mdio_write	drivers/net/sunxi_emac.c	/^static int emac_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
emac_miiphy_command	arch/powerpc/cpu/ppc4xx/miiphy.c	/^static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value)$/;"	f	typeref:typename:int	file:
emac_miiphy_wait	arch/powerpc/cpu/ppc4xx/miiphy.c	/^static int emac_miiphy_wait(u32 emac_reg)$/;"	f	typeref:typename:int	file:
emac_open	drivers/net/keystone_net.c	/^	bool				emac_open;$/;"	m	struct:ks2_eth_priv	typeref:typename:bool	file:
emac_open	drivers/net/keystone_net.c	/^unsigned int emac_open;$/;"	v	typeref:typename:unsigned int
emac_outblk_32bit	drivers/net/sunxi_emac.c	/^static void emac_outblk_32bit(void *reg, void *data, int count)$/;"	f	typeref:typename:void	file:
emac_pins	board/davinci/da8xxevm/omapl138_lcdk.c	/^static const struct pinmux_config emac_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
emac_pins	board/davinci/ea20/ea20.c	/^static const struct pinmux_config emac_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
emac_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			emac_pins_a: emac0@0 {$/;"	l	label:pio
emac_pins_a	arch/arm/dts/sun5i-a10s.dtsi	/^	emac_pins_a: emac0@0 {$/;"	l
emac_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			emac_pins_a: emac0@0 {$/;"	l	label:pio
emac_pins_b	arch/arm/dts/sun5i-a10s.dtsi	/^	emac_pins_b: emac0@1 {$/;"	l
emac_pins_mdio	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emac_pins_mdio[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emac_pins_mdio	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emac_pins_mdio[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emac_pins_mii	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emac_pins_mii[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emac_pins_rmii	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emac_pins_rmii[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emac_pins_rmii	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emac_pins_rmii[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emac_pins_rmii_clk_source	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emac_pins_rmii_clk_source[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emac_power_pin_a1000	arch/arm/dts/sun4i-a10-a1000.dts	/^	emac_power_pin_a1000: emac_power_pin@0 {$/;"	l
emac_power_pin_q5	arch/arm/dts/sun4i-a10-jesurun-q5.dts	/^	emac_power_pin_q5: emac_power_pin@0 {$/;"	l
emac_power_pin_wobo	arch/arm/dts/sun5i-a10s-wobo-i5.dts	/^	emac_power_pin_wobo: emac_power_pin@0 {$/;"	l
emac_regs	drivers/net/davinci_emac.h	/^} emac_regs;$/;"	t	typeref:struct:__anon759824920108
emac_regs	drivers/net/pic32_eth.c	/^	struct pic32_emac_regs *emac_regs;$/;"	m	struct:pic32eth_dev	typeref:struct:pic32_emac_regs *	file:
emac_regs	drivers/net/sunxi_emac.c	/^struct emac_regs {$/;"	s	file:
emac_reset	drivers/net/sunxi_emac.c	/^static void emac_reset(struct emac_eth_dev *priv)$/;"	f	typeref:typename:void	file:
emac_rgmii_pins	arch/arm/dts/sun8i-h3.dtsi	/^			emac_rgmii_pins: emac0@0 {$/;"	l	label:pio
emac_rx_active_head	drivers/net/davinci_emac.c	/^static volatile emac_desc	*emac_rx_active_head = 0;$/;"	v	typeref:typename:volatile emac_desc *	file:
emac_rx_active_tail	drivers/net/davinci_emac.c	/^static volatile emac_desc	*emac_rx_active_tail = 0;$/;"	v	typeref:typename:volatile emac_desc *	file:
emac_rx_desc	drivers/net/davinci_emac.c	/^static volatile emac_desc	*emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BAS/;"	v	typeref:typename:volatile emac_desc *	file:
emac_rx_queue_active	drivers/net/davinci_emac.c	/^static int			emac_rx_queue_active = 0;$/;"	v	typeref:typename:int	file:
emac_rxhdr	drivers/net/sunxi_emac.c	/^struct emac_rxhdr {$/;"	s	file:
emac_setup	drivers/net/sunxi_emac.c	/^static void emac_setup(struct emac_eth_dev *priv)$/;"	f	typeref:typename:void	file:
emac_sram	arch/arm/dts/sun4i-a10.dtsi	/^				emac_sram: sram-section@8000 {$/;"	l	label:sram_a
emac_sram	arch/arm/dts/sun5i-a10s.dtsi	/^	emac_sram: sram-section@8000 {$/;"	l
emac_sram	arch/arm/dts/sun7i-a20.dtsi	/^				emac_sram: sram-section@8000 {$/;"	l	label:sram_a
emac_stats_st	arch/powerpc/include/asm/ppc4xx-emac.h	/^typedef struct emac_stats_st{	\/* Statistic Block *\/$/;"	s
emac_tx_desc	drivers/net/davinci_emac.c	/^static volatile emac_desc	*emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BAS/;"	v	typeref:typename:volatile emac_desc *	file:
emac_variant	drivers/net/sun8i_emac.c	/^enum emac_variant {$/;"	g	file:
emacgrp_ctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	emacgrp_ctrl;			\/* 0x60 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
emacgrp_l3master	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	emacgrp_l3master;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
emacio	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	emacio[20];			\/* 0x400 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[20]
emaclite_ids	drivers/net/xilinx_emaclite.c	/^static const struct udevice_id emaclite_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
emaclite_miiphy_read	drivers/net/xilinx_emaclite.c	/^static int emaclite_miiphy_read(struct mii_dev *bus, int addr,$/;"	f	typeref:typename:int	file:
emaclite_miiphy_write	drivers/net/xilinx_emaclite.c	/^static int emaclite_miiphy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
emaclite_ofdata_to_platdata	drivers/net/xilinx_emaclite.c	/^static int emaclite_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
emaclite_ops	drivers/net/xilinx_emaclite.c	/^static const struct eth_ops emaclite_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
emaclite_probe	drivers/net/xilinx_emaclite.c	/^static int emaclite_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
emaclite_recv	drivers/net/xilinx_emaclite.c	/^static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
emaclite_regs	drivers/net/xilinx_emaclite.c	/^struct emaclite_regs {$/;"	s	file:
emaclite_remove	drivers/net/xilinx_emaclite.c	/^static int emaclite_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
emaclite_send	drivers/net/xilinx_emaclite.c	/^static int emaclite_send(struct udevice *dev, void *ptr, int len)$/;"	f	typeref:typename:int	file:
emaclite_start	drivers/net/xilinx_emaclite.c	/^static int emaclite_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
emaclite_stop	drivers/net/xilinx_emaclite.c	/^static void emaclite_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
email_inuse	scripts/get_maintainer.pl	/^sub email_inuse {$/;"	s
emask	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	emask;$/;"	m	struct:iim_regs	typeref:typename:u32
emask	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 emask;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
emask	arch/blackfin/include/asm/serial4.h	/^	u32 emask;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
emask	arch/powerpc/include/asm/immap_512x.h	/^	u32 emask;		\/* IIM error IRQ mask  *\/$/;"	m	struct:iim512x	typeref:typename:u32
emask	drivers/misc/fsl_iim.c	/^	u32 emask;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
emaskcl	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 emaskcl;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
emaskcl	arch/blackfin/include/asm/serial4.h	/^	u32 emaskcl;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
emaskst	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 emaskst;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
emaskst	arch/blackfin/include/asm/serial4.h	/^	u32 emaskst;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
emb_pcr	arch/powerpc/include/asm/immap_512x.h	/^	u32	emb_pcr;	\/* EMB Pause Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
emb_scr	arch/powerpc/include/asm/immap_512x.h	/^	u32	emb_scr;	\/* EMB Share Counter Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
emc	arch/arm/cpu/arm926ejs/lpc32xx/dram.c	/^static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;$/;"	v	typeref:struct:emc_regs *	file:
emc	arch/arm/dts/tegra124.dtsi	/^	emc: emc@7001b000 {$/;"	l
emc	board/timll/devkit3250/devkit3250.c	/^static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;$/;"	v	typeref:struct:emc_regs *	file:
emc_act2pden	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_act2pden;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_adr_cfg	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_adr_cfg;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_adr_cfg1	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_adr_cfg1;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_ahb_t	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	struct emc_ahb_t {$/;"	s	struct:emc_regs
emc_ar2pden	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_ar2pden;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_auto_cal_config	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_auto_cal_config;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_auto_cal_interval	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_auto_cal_interval;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_auto_cal_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_auto_cal_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_auto_cal_wait	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 emc_auto_cal_wait:8;$/;"	m	struct:scratch24_reg::__anon24552f890608	typeref:typename:u32:8	file:
emc_burst_refresh_num	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_burst_refresh_num;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_cfg	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_cfg;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_cfg2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_cfg2;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_cfg_clktrim0	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_cfg_clktrim0;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_cfg_clktrim1	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_cfg_clktrim1;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_cfg_clktrim2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_cfg_clktrim2;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_cfg_dig_dll	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_cfg_dig_dll;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_clock_divider	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_clock_divider;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_clock_divider	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 emc_clock_divider:8;$/;"	m	struct:scratch4_reg::__anon24552f890508	typeref:typename:u32:8	file:
emc_ctlr	arch/arm/include/asm/arch-tegra20/emc.h	/^struct emc_ctlr {$/;"	s
emc_ctt_term_ctrl	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_ctt_term_ctrl;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_dbg	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_dbg;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_dll_xform_dqs	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_dll_xform_dqs;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_dll_xform_quse	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_dll_xform_quse;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_dram_settings	arch/arm/include/asm/arch-lpc32xx/emc.h	/^struct emc_dram_settings {$/;"	s
emc_dvfs_latency	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct emc_dvfs_latency {$/;"	s
emc_edr2_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_edr2_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_emem_cfg	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_emem_cfg;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_emrs	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_emrs;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_emrs_ddr2_dll_enable	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_emrs_ddr2_dll_enable;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_emrs_ddr2_ocd_calib	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_emrs_ddr2_ocd_calib;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_emrs_emr2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_emrs_emr2;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_emrs_emr3	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_emrs_emr3;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_cfg5	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_cfg5;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_cfg6	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_cfg6;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_dqsib_dly	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_dqsib_dly;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_dqsib_dly_msb	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_dqsib_dly_msb;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_quse_dly	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_quse_dly;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_quse_dly_msb	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_quse_dly_msb;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_spare	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbio_spare;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_fbio_spare_cfg_wb0	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 emc_fbio_spare_cfg_wb0:8;$/;"	m	struct:scratch4_reg::__anon24552f890508	typeref:typename:u32:8	file:
emc_fbioc_fg1	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_fbioc_fg1;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_get_controller	arch/arm/mach-tegra/tegra20/emc.c	/^struct emc_ctlr *emc_get_controller(const void *blob)$/;"	f	typeref:struct:emc_ctlr *
emc_low_latency_config	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_low_latency_config;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrs	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrs;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrs_ddr2_dll_reset	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrs_ddr2_dll_reset;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrs_reset_dll	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrs_reset_dll;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrs_reset_dll_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrs_reset_dll_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw1	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw1;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw2	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw2;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw3	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw3;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw_reset_command	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw_reset_command;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw_reset_init_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw_reset_init_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw_zq_init_dev0	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw_zq_init_dev0;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw_zq_init_dev1	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw_zq_init_dev1;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_mrw_zq_init_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_mrw_zq_init_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_odt_read	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_odt_read;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_odt_write	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_odt_write;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_pchg2pden	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_pchg2pden;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_pdex2rd	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_pdex2rd;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_pdex2wr	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_pdex2wr;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_pin_program_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_pin_program_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_pin_program_wait	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 emc_pin_program_wait:8;$/;"	m	struct:scratch24_reg::__anon24552f890608	typeref:typename:u32:8	file:
emc_qrst	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_qrst;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_qsafe	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_qsafe;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_quse	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_quse;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_quseextra	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_quseextra;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_r2p	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_r2p;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_r2w	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_r2w;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_ras	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_ras;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rc	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rc;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rd_rcd	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rd_rcd;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rdv	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rdv;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_refresh	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_refresh;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_reg_addr	arch/arm/mach-tegra/tegra20/emc.c	/^static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = {$/;"	v	typeref:typename:const unsigned long[]	file:
emc_regs	arch/arm/include/asm/arch-lpc32xx/emc.h	/^struct emc_regs {$/;"	s
emc_rext	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rext;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rfc	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rfc;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rp	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rp;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rrd	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rrd;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_rw2pden	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_rw2pden;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_stat_t	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	struct emc_stat_t {$/;"	s	struct:emc_regs
emc_tcke	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_tcke;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_tclkstable	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_tclkstable;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_tclkstop	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_tclkstop;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_tfaw	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_tfaw;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_trefbw	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_trefbw;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_trpab	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_trpab;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_txsr	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_txsr;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_w2p	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_w2p;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_w2r	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_w2r;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_wdv	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_wdv;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_wr_rcd	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_wr_rcd;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_zcal_mrw_cmd	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_zcal_mrw_cmd;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_zcal_ref_cnt	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_zcal_ref_cnt;$/;"	m	struct:sdram_params	typeref:typename:u32
emc_zcal_wait_cnt	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 emc_zcal_wait_cnt;$/;"	m	struct:sdram_params	typeref:typename:u32
emctrl	drivers/net/davinci_emac.h	/^	dv_reg		emctrl;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
emi_bank_regs	arch/arm/include/asm/arch-spear/spr_emi.h	/^struct emi_bank_regs {$/;"	s
emi_regs	arch/arm/include/asm/arch-spear/spr_emi.h	/^struct emi_regs {$/;"	s
emi_timing_bootrom	board/spear/common/spr_misc.c	/^const struct cust_emi_para emi_timing_bootrom = {$/;"	v	typeref:typename:const struct cust_emi_para
emi_timing_m28w640hc	board/spear/common/spr_misc.c	/^const struct cust_emi_para emi_timing_m28w640hc = {$/;"	v	typeref:typename:const struct cust_emi_para
emif	arch/arm/dts/am4372.dtsi	/^		emif: emif@4c000000 {$/;"	l
emif	tools/ublimage.h	/^	uint32_t	emif;	\/*$/;"	m	struct:ubl_header	typeref:typename:uint32_t
emif0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int emif0clkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
emif1_ddr3_532_mhz_1cs	board/ti/dra7xx/evm.c	/^static const struct emif_regs emif1_ddr3_532_mhz_1cs = {$/;"	v	typeref:typename:const struct emif_regs	file:
emif1_ddr3_532_mhz_1cs_2G	board/ti/dra7xx/evm.c	/^const struct emif_regs emif1_ddr3_532_mhz_1cs_2G = {$/;"	v	typeref:typename:const struct emif_regs
emif1_enabled	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static int emif1_enabled = -1, emif2_enabled = -1;$/;"	v	typeref:typename:int	file:
emif1_size	board/ti/common/board_detect.h	/^	u32 emif1_size;$/;"	m	struct:dra7_eeprom	typeref:typename:u32
emif1_size	board/ti/common/board_detect.h	/^	u64 emif1_size;$/;"	m	struct:ti_common_eeprom	typeref:typename:u64
emif1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int emif1clkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
emif2_ddr3_532_mhz_1cs	board/ti/dra7xx/evm.c	/^static const struct emif_regs emif2_ddr3_532_mhz_1cs = {$/;"	v	typeref:typename:const struct emif_regs	file:
emif2_ddr3_532_mhz_1cs_2G	board/ti/dra7xx/evm.c	/^const struct emif_regs emif2_ddr3_532_mhz_1cs_2G = {$/;"	v	typeref:typename:const struct emif_regs
emif2_enabled	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static int emif1_enabled = -1, emif2_enabled = -1;$/;"	v	typeref:typename:int	file:
emif2_size	board/ti/common/board_detect.h	/^	u32 emif2_size;$/;"	m	struct:dra7_eeprom	typeref:typename:u32
emif2_size	board/ti/common/board_detect.h	/^	u64 emif2_size;$/;"	m	struct:ti_common_eeprom	typeref:typename:u64
emif4	arch/arm/include/asm/arch-omap3/cpu.h	/^typedef struct emif4 {$/;"	s
emif4_base	arch/arm/cpu/armv7/omap3/emif4.c	/^static emif4_t *emif4_base = (emif4_t *)OMAP34XX_SDRC_BASE;$/;"	v	typeref:typename:emif4_t *	file:
emif4_t	arch/arm/include/asm/arch-omap3/cpu.h	/^} emif4_t;$/;"	t	typeref:struct:emif4
emif_1_regs_ddr3_666_mhz_1cs_dra_es1	board/ti/dra7xx/evm.c	/^static const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = {$/;"	v	typeref:typename:const struct emif_regs	file:
emif_1_regs_ddr3_666_mhz_1cs_dra_es2	board/ti/dra7xx/evm.c	/^const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es2 = {$/;"	v	typeref:typename:const struct emif_regs
emif_assert	arch/arm/include/asm/emif.h	/^#define emif_assert(/;"	d
emif_calculate_regs	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void emif_calculate_regs($/;"	f	typeref:typename:void	file:
emif_cfg	arch/arm/mach-keystone/include/mach/ddr3.h	/^	struct ddr3_emif_config emif_cfg;$/;"	m	struct:ddr3_spd_cb	typeref:struct:ddr3_emif_config
emif_connect_id_serv_1_map	arch/arm/include/asm/emif.h	/^	u32 emif_connect_id_serv_1_map;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_connect_id_serv_1_map	arch/arm/include/asm/emif.h	/^	u32 emif_connect_id_serv_1_map;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_connect_id_serv_2_map	arch/arm/include/asm/emif.h	/^	u32 emif_connect_id_serv_2_map;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_connect_id_serv_2_map	arch/arm/include/asm/emif.h	/^	u32 emif_connect_id_serv_2_map;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_cos_config	arch/arm/include/asm/emif.h	/^	u32 emif_cos_config;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_cos_config	arch/arm/include/asm/emif.h	/^	u32 emif_cos_config;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_ext_phy_ctrl_1	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_1;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_1	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_1;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_ext_phy_ctrl_10	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_10;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_10_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_10_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_11	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_11;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_11_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_11_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_12	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_12;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_12_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_12_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_13	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_13;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_13_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_13_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_14	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_14;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_14_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_14_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_15	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_15;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_15_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_15_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_16	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_16;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_16_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_16_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_17	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_17;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_17_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_17_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_18	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_18;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_18_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_18_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_19	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_19;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_19_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_19_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_1_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_1_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_2	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_2;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_2	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_2;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_ext_phy_ctrl_20	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_20;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_20_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_20_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_21	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_21;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_21_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_21_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_22	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_22;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_22_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_22_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_23	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_23;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_23_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_23_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_24	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_24;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_24_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_24_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_25	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_25;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_25_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_25_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_26	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_26;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_26_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_26_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_27	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_27;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_27_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_27_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_28	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_28;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_28_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_28_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_29	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_29;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_29_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_29_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_2_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_2_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_3	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_3;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_3	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_3;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_ext_phy_ctrl_30	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_30;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_30_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_30_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_31	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_31;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_31_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_31_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_32	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_32;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_32_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_32_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_33	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_33;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_33_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_33_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_34	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_34;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_34_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_34_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_35	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_35;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_35_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_35_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_36	arch/arm/include/asm/emif.h	/^		u32 emif_ddr_ext_phy_ctrl_36;$/;"	m	union:emif_reg_struct::__anoncb93f35b010a	typeref:typename:u32
emif_ddr_ext_phy_ctrl_36_shdw	arch/arm/include/asm/emif.h	/^		u32 emif_ddr_ext_phy_ctrl_36_shdw;$/;"	m	union:emif_reg_struct::__anoncb93f35b020a	typeref:typename:u32
emif_ddr_ext_phy_ctrl_3_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_3_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_4	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_4;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_4	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_4;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_ext_phy_ctrl_4_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_4_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_5	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_5;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_5	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_5;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_ext_phy_ctrl_5_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_5_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_6	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_6;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_6_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_6_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_7	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_7;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_7_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_7_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_8	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_8;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_8_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_8_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_9	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_9;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_ext_phy_ctrl_9_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_ext_phy_ctrl_9_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_fifo_misaligned_clear_1	arch/arm/include/asm/emif.h	/^		u32 emif_ddr_fifo_misaligned_clear_1;$/;"	m	union:emif_reg_struct::__anoncb93f35b010a	typeref:typename:u32
emif_ddr_fifo_misaligned_clear_2	arch/arm/include/asm/emif.h	/^		u32 emif_ddr_fifo_misaligned_clear_2;$/;"	m	union:emif_reg_struct::__anoncb93f35b020a	typeref:typename:u32
emif_ddr_phy_ctlr_1	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_phy_ctlr_1;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_phy_ctlr_1	board/siemens/draco/board.h	/^	unsigned int emif_ddr_phy_ctlr_1;	\/* 0x00100206 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
emif_ddr_phy_ctlr_1_init	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_phy_ctlr_1_init;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_ddr_phy_ctrl_1	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_phy_ctrl_1;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_phy_ctrl_1_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_phy_ctrl_1_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_phy_ctrl_2	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_phy_ctrl_2;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_ddr_phy_status	arch/arm/include/asm/emif.h	/^	u32 emif_ddr_phy_status[28];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[28]
emif_device_details	arch/arm/include/asm/emif.h	/^struct emif_device_details {$/;"	s
emif_get_device_details	arch/arm/cpu/armv7/omap-common/emif-common.c	/^struct lpddr2_device_details *emif_get_device_details(u32 emif_nr, u8 cs,$/;"	f	typeref:struct:lpddr2_device_details *
emif_get_device_details	board/amazon/kc1/kc1.c	/^struct lpddr2_device_details *emif_get_device_details(u32 emif_nr, u8 cs,$/;"	f	typeref:struct:lpddr2_device_details *
emif_get_device_details_sdp	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^struct lpddr2_device_details *emif_get_device_details_sdp(u32 emif_nr, u8 cs,$/;"	f	typeref:struct:lpddr2_device_details *
emif_get_device_details_sdp	arch/arm/cpu/armv7/omap5/sdram.c	/^static void emif_get_device_details_sdp(u32 emif_nr,$/;"	f	typeref:typename:void	file:
emif_get_device_timings	arch/arm/cpu/armv7/omap4/emif.c	/^void emif_get_device_timings(u32 emif_nr,$/;"	f	typeref:typename:void
emif_get_device_timings	arch/arm/cpu/armv7/omap5/emif.c	/^void emif_get_device_timings(u32 emif_nr,$/;"	f	typeref:typename:void
emif_get_device_timings	board/amazon/kc1/kc1.c	/^void emif_get_device_timings(u32 emif_nr,$/;"	f	typeref:typename:void
emif_get_device_timings_sdp	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^void emif_get_device_timings_sdp(u32 emif_nr,$/;"	f	typeref:typename:void
emif_get_device_timings_sdp	arch/arm/cpu/armv7/omap5/sdram.c	/^void emif_get_device_timings_sdp(u32 emif_nr,$/;"	f	typeref:typename:void
emif_get_dmm_regs	board/compulab/cm_t54/spl.c	/^void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)$/;"	f	typeref:typename:void
emif_get_dmm_regs	board/ti/am57xx/board.c	/^void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)$/;"	f	typeref:typename:void
emif_get_dmm_regs	board/ti/dra7xx/evm.c	/^void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)$/;"	f	typeref:typename:void
emif_get_dmm_regs	board/ti/panda/panda.c	/^void emif_get_dmm_regs(const struct dmm_lisa_map_regs$/;"	f	typeref:typename:void
emif_get_dmm_regs_sdp	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs$/;"	f	typeref:typename:void	file:
emif_get_dmm_regs_sdp	arch/arm/cpu/armv7/omap5/sdram.c	/^static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs$/;"	f	typeref:typename:void	file:
emif_get_ext_phy_ctrl_const_regs	arch/arm/cpu/armv7/omap5/sdram.c	/^void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,$/;"	f	typeref:typename:void __weak
emif_get_ext_phy_ctrl_const_regs	board/compulab/cm_t43/spl.c	/^void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)$/;"	f	typeref:typename:void
emif_get_ext_phy_ctrl_const_regs	board/ti/am43xx/board.c	/^void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)$/;"	f	typeref:typename:void
emif_get_ext_phy_ctrl_const_regs	board/ti/am57xx/board.c	/^void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)$/;"	f	typeref:typename:void
emif_get_reg_dump	board/compulab/cm_t54/spl.c	/^void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)$/;"	f	typeref:typename:void
emif_get_reg_dump	board/ti/am57xx/board.c	/^void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)$/;"	f	typeref:typename:void
emif_get_reg_dump	board/ti/dra7xx/evm.c	/^void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)$/;"	f	typeref:typename:void
emif_get_reg_dump	board/ti/panda/panda.c	/^void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)$/;"	f	typeref:typename:void
emif_get_reg_dump_sdp	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)$/;"	f	typeref:typename:void	file:
emif_get_reg_dump_sdp	arch/arm/cpu/armv7/omap5/sdram.c	/^static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)$/;"	f	typeref:typename:void	file:
emif_iodft_tlgc	arch/arm/include/asm/emif.h	/^	u32 emif_iodft_tlgc;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqenable_clr_ll	arch/arm/include/asm/emif.h	/^	u32 emif_irqenable_clr_ll;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqenable_clr_sys	arch/arm/include/asm/emif.h	/^	u32 emif_irqenable_clr_sys;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqenable_set_ll	arch/arm/include/asm/emif.h	/^	u32 emif_irqenable_set_ll;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqenable_set_sys	arch/arm/include/asm/emif.h	/^	u32 emif_irqenable_set_sys;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqstatus_ll	arch/arm/include/asm/emif.h	/^	u32 emif_irqstatus_ll;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqstatus_raw_ll	arch/arm/include/asm/emif.h	/^	u32 emif_irqstatus_raw_ll;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqstatus_raw_sys	arch/arm/include/asm/emif.h	/^	u32 emif_irqstatus_raw_sys;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_irqstatus_sys	arch/arm/include/asm/emif.h	/^	u32 emif_irqstatus_sys;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_l3_cfg_val_1	arch/arm/include/asm/emif.h	/^	u32 emif_l3_cfg_val_1;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_l3_cfg_val_2	arch/arm/include/asm/emif.h	/^	u32 emif_l3_cfg_val_2;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_l3_config	arch/arm/include/asm/emif.h	/^	u32 emif_l3_config;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_l3_err_log	arch/arm/include/asm/emif.h	/^	u32 emif_l3_err_log;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_lpddr2_mode_reg_cfg	arch/arm/include/asm/emif.h	/^	u32 emif_lpddr2_mode_reg_cfg;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_lpddr2_mode_reg_data	arch/arm/include/asm/emif.h	/^	u32 emif_lpddr2_mode_reg_data;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_lpddr2_mode_reg_data_es2	arch/arm/include/asm/emif.h	/^	u32 emif_lpddr2_mode_reg_data_es2;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_lpddr2_nvm_config	arch/arm/include/asm/emif.h	/^	u32 emif_lpddr2_nvm_config;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_lpddr2_nvm_tim	arch/arm/include/asm/emif.h	/^	u32 emif_lpddr2_nvm_tim;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_lpddr2_nvm_tim_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_lpddr2_nvm_tim_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_mod_id_rev	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int emif_mod_id_rev;$/;"	m	struct:emif4	typeref:typename:unsigned int
emif_mod_id_rev	arch/arm/include/asm/emif.h	/^	u32 emif_mod_id_rev;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_num	arch/arm/cpu/armv7/omap-common/emif-common.c	/^inline u32 emif_num(u32 base)$/;"	f	typeref:typename:u32
emif_perf_cnt_1	arch/arm/include/asm/emif.h	/^	u32 emif_perf_cnt_1;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_perf_cnt_2	arch/arm/include/asm/emif.h	/^	u32 emif_perf_cnt_2;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_perf_cnt_cfg	arch/arm/include/asm/emif.h	/^	u32 emif_perf_cnt_cfg;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_perf_cnt_sel	arch/arm/include/asm/emif.h	/^	u32 emif_perf_cnt_sel;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_perf_cnt_tim	arch/arm/include/asm/emif.h	/^	u32 emif_perf_cnt_tim;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_phy_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	emif_phy_dclk_div: emif_phy_dclk_div {$/;"	l
emif_post_init_config	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void emif_post_init_config(u32 base)$/;"	f	typeref:typename:void
emif_prio_class_serv_map	arch/arm/include/asm/emif.h	/^	u32 emif_prio_class_serv_map;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_prio_class_serv_map	arch/arm/include/asm/emif.h	/^	u32 emif_prio_class_serv_map;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_pwr_mgmt_ctrl	arch/arm/include/asm/emif.h	/^	u32 emif_pwr_mgmt_ctrl;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_pwr_mgmt_ctrl_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_pwr_mgmt_ctrl_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_rd_wr_exec_thresh	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_exec_thresh;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_rd_wr_exec_thresh	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_exec_thresh;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_rd_wr_lvl_ctl	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_lvl_ctl;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_rd_wr_lvl_ctl	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_lvl_ctl;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_rd_wr_lvl_rmp_ctl	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_lvl_rmp_ctl;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_rd_wr_lvl_rmp_ctl	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_lvl_rmp_ctl;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_rd_wr_lvl_rmp_win	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_lvl_rmp_win;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_rd_wr_lvl_rmp_win	arch/arm/include/asm/emif.h	/^	u32 emif_rd_wr_lvl_rmp_win;$/;"	m	struct:emif_regs	typeref:typename:u32
emif_read_idlectrl	arch/arm/include/asm/emif.h	/^	u32 emif_read_idlectrl;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_read_idlectrl_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_read_idlectrl_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_reg	arch/arm/cpu/armv7/am33xx/ddr.c	/^static struct emif_reg_struct *emif_reg[2] = {$/;"	v	typeref:struct:emif_reg_struct * [2]	file:
emif_reg_struct	arch/arm/include/asm/emif.h	/^struct emif_reg_struct {$/;"	s
emif_regs	arch/arm/include/asm/emif.h	/^struct emif_regs {$/;"	s
emif_regs_266_mhz_2cs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct emif_regs emif_regs_266_mhz_2cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_532_mhz_2cs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct emif_regs emif_regs_532_mhz_2cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_532_mhz_2cs_es2	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct emif_regs emif_regs_532_mhz_2cs_es2 = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_ddr3_532_mhz_1cs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct emif_regs emif_regs_ddr3_532_mhz_1cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_ddr3_532_mhz_1cs_es2	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct emif_regs emif_regs_ddr3_532_mhz_1cs_es2 = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_ddr3_532_mhz_cm_t54	board/compulab/cm_t54/spl.c	/^const struct emif_regs emif_regs_ddr3_532_mhz_cm_t54 = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_elpida_200_mhz_2cs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct emif_regs emif_regs_elpida_200_mhz_2cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_elpida_380_mhz_1cs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct emif_regs emif_regs_elpida_380_mhz_1cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_elpida_400_mhz_1cs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct emif_regs emif_regs_elpida_400_mhz_1cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_elpida_400_mhz_2cs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct emif_regs emif_regs_elpida_400_mhz_2cs = {$/;"	v	typeref:typename:const struct emif_regs
emif_regs_lpddr2	board/ti/am43xx/board.c	/^const struct emif_regs emif_regs_lpddr2 = {$/;"	v	typeref:typename:const struct emif_regs
emif_reset_phy	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void emif_reset_phy(u32 base)$/;"	f	typeref:typename:void
emif_sdram_config	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_config;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_config_ext	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int emif_sdram_config_ext;$/;"	m	struct:ctrl_ioregs	typeref:typename:unsigned int
emif_sdram_config_ext	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int emif_sdram_config_ext;$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int
emif_sdram_ref_ctrl	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_ref_ctrl;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_ref_ctrl_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_ref_ctrl_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_tim_1	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_tim_1;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_tim_1_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_tim_1_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_tim_2	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_tim_2;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_tim_2_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_tim_2_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_tim_3	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_tim_3;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_tim_3_shdw	arch/arm/include/asm/emif.h	/^	u32 emif_sdram_tim_3_shdw;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_sdram_type	arch/arm/include/asm/emif.h	/^static inline u32 emif_sdram_type(u32 sdram_config)$/;"	f	typeref:typename:u32
emif_status	arch/arm/include/asm/emif.h	/^	u32 emif_status;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_temp_alert_config	arch/arm/include/asm/emif.h	/^	u32 emif_temp_alert_config;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emif_update_timings	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void emif_update_timings(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void
emif_zq_config	arch/arm/include/asm/emif.h	/^	u32 emif_zq_config;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
emifa_pins	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emifa_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_cs0	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emifa_pins_cs0[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_cs2	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emifa_pins_cs2[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_cs2	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emifa_pins_cs2[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_cs3	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config emifa_pins_cs3[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_cs3	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emifa_pins_cs3[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_cs4	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emifa_pins_cs4[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_nand	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emifa_pins_nand[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifa_pins_nor	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config emifa_pins_nor[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
emifclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int emifclkctrl;	\/* offset 0x28 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
emifclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int emifclkctrl;	\/* offset 0x720 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
emifclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int emifclkstctrl;	\/* offset 0x700 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
emiffwclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int emiffwclkctrl;	\/* offset 0x730 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
emiffwclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int emiffwclkctrl;	\/* offset 0xD0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
emiiocr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 emiiocr;	\/* 0x404 EMI MDIO Control Register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
emio	drivers/net/zynq_gem.c	/^	u32 emio;$/;"	m	struct:zynq_gem_priv	typeref:typename:u32	file:
emirror_ports	include/vsc9953.h	/^	u32	emirror_ports;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
emit	lib/slre.c	/^emit(struct slre *r, int code)$/;"	f	typeref:typename:void	file:
emmc	arch/arm/dts/rk3036.dtsi	/^	emmc: dwmmc@1021c000 {$/;"	l
emmc	arch/arm/dts/rk3288.dtsi	/^	emmc: dwmmc@ff0f0000 {$/;"	l
emmc	arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts	/^	emmc: emmc@0 {$/;"	l
emmc	arch/arm/dts/uniphier-ld4.dtsi	/^	emmc: sdhc@5a500000 {$/;"	l
emmc	arch/arm/dts/uniphier-pro4.dtsi	/^	emmc: sdhc@5a500000 {$/;"	l
emmc	arch/arm/dts/uniphier-pro5.dtsi	/^	emmc: sdhc@68400000 {$/;"	l
emmc	arch/arm/dts/uniphier-pxs2.dtsi	/^	emmc: sdhc@5a000000 {$/;"	l
emmc	arch/arm/dts/uniphier-sld3.dtsi	/^		emmc: sdhc@5a400000 {$/;"	l
emmc	arch/arm/dts/uniphier-sld8.dtsi	/^	emmc: sdhc@5a500000 {$/;"	l
emmc	drivers/net/xilinx_axi_emac.c	/^	u32 emmc; \/* 0x410: EMAC mode configuration *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
emmc45_ddr50_enabled	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t emmc45_ddr50_enabled;		\/* Offset 0x0051 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
emmc45_hs200_enabled	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t emmc45_hs200_enabled;		\/* Offset 0x0052 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
emmc45_retune_timer_value	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t emmc45_retune_timer_value;	\/* Offset 0x0053 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
emmc_3v3_reg	arch/arm/dts/tegra30-cardhu.dts	/^		emmc_3v3_reg: regulator@3 {$/;"	l
emmc_boot_clk_div_set	arch/arm/mach-exynos/clock_init_exynos5.c	/^void emmc_boot_clk_div_set(void)$/;"	f	typeref:typename:void
emmc_boot_mode	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t emmc_boot_mode;			\/* Offset 0x0026 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
emmc_bus1	arch/arm/dts/rk3288.dtsi	/^			emmc_bus1: emmc-bus1 {$/;"	l
emmc_bus4	arch/arm/dts/rk3288.dtsi	/^			emmc_bus4: emmc-bus4 {$/;"	l
emmc_bus8	arch/arm/dts/rk3036.dtsi	/^			emmc_bus8: emmc-bus8 {$/;"	l	label:pinctrl
emmc_bus8	arch/arm/dts/rk3288-veyron.dtsi	/^		emmc_bus8: emmc-bus8 {$/;"	l
emmc_bus8	arch/arm/dts/rk3288.dtsi	/^			emmc_bus8: emmc-bus8 {$/;"	l
emmc_clk	arch/arm/dts/rk3036.dtsi	/^			emmc_clk: emmc-clk {$/;"	l	label:pinctrl
emmc_clk	arch/arm/dts/rk3288-veyron.dtsi	/^		emmc_clk: emmc-clk {$/;"	l
emmc_clk	arch/arm/dts/rk3288.dtsi	/^			emmc_clk: emmc-clk {$/;"	l
emmc_clk_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
emmc_cmd	arch/arm/dts/rk3036.dtsi	/^			emmc_cmd: emmc-cmd {$/;"	l	label:pinctrl
emmc_cmd	arch/arm/dts/rk3288-veyron.dtsi	/^		emmc_cmd: emmc-cmd {$/;"	l
emmc_cmd	arch/arm/dts/rk3288.dtsi	/^			emmc_cmd: emmc-cmd {$/;"	l
emmc_cmd_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int emmc_dat8_muxvals[] = {9, 9, 9, 9};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int emmc_dat8_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned emmc_dat8_pins[] = {57};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_dat8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_deassert_reset	arch/arm/dts/rk3288-jerry.dts	/^		emmc_deassert_reset: emmc-deassert-reset {$/;"	l
emmc_ds_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
emmc_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const emmc_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int emmc_muxvals[] = {1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
emmc_nand_d07_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int emmc_nand_d07_pins[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
emmc_phy	arch/arm/dts/rk3399.dtsi	/^		emmc_phy: phy@f780 {$/;"	l	label:grf
emmc_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux emmc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
emmc_pins	arch/arm/dts/am335x-bone-common.dtsi	/^	emmc_pins: pinmux_emmc_pins {$/;"	l
emmc_pins	arch/arm/dts/meson-gxbb.dtsi	/^				emmc_pins: emmc {$/;"	l	label:periphs.pinctrl_periphs
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned emmc_pins[] = {55, 56, 60};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27};$/;"	v	typeref:typename:const unsigned[]	file:
emmc_pwr	arch/arm/dts/rk3288.dtsi	/^			emmc_pwr: emmc-pwr {$/;"	l
emmc_pwrseq	arch/arm/dts/rk3288-rock2-som.dtsi	/^	emmc_pwrseq: emmc-pwrseq {$/;"	l
emmc_pwrseq	arch/arm/dts/rk3288-veyron.dtsi	/^	emmc_pwrseq: emmc-pwrseq {$/;"	l
emmc_reset	arch/arm/dts/rk3288-rock2-som.dtsi	/^			emmc_reset: emmc-reset {$/;"	l
emmc_reset	arch/arm/dts/rk3288-veyron.dtsi	/^		emmc_reset: emmc-reset {$/;"	l
emmccore_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 emmccore_con[12];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[12]
emmccore_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 emmccore_status[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
emmcphy_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 emmcphy_con[7];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[7]
emmcphy_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 emmcphy_status;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
emode	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	emode;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
empty	fs/ubifs/ubifs.h	/^	unsigned int empty:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
empty	tools/moveconfig.py	/^    def empty(self):$/;"	m	class:Slots
empty_bad_page	arch/sparc/lib/bootm.c	/^	char empty_bad_page[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
empty_bad_page_table	arch/sparc/lib/bootm.c	/^	char empty_bad_page_table[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
empty_dentptr	fs/fat/fat_write.c	/^static dir_entry *empty_dentptr;$/;"	v	typeref:typename:dir_entry *	file:
empty_lebs	fs/ubifs/ubifs-media.h	/^	__le32 empty_lebs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
empty_lebs	fs/ubifs/ubifs.h	/^	int empty_lebs;$/;"	m	struct:ubifs_lp_stats	typeref:typename:int
empty_list	fs/ubifs/ubifs.h	/^	struct list_head empty_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
empty_log_bytes	fs/ubifs/log.c	/^static inline long long empty_log_bytes(const struct ubifs_info *c)$/;"	f	typeref:typename:long long	file:
empty_lost_n_found	fs/yaffs2/yaffs_guts.h	/^	int empty_lost_n_found;	\/* Auto-empty lost+found directory on mount *\/$/;"	m	struct:yaffs_param	typeref:typename:int
empty_peb_count	drivers/mtd/ubi/ubi.h	/^	int empty_peb_count;$/;"	m	struct:ubi_attach_info	typeref:typename:int
empty_vtbl_record	drivers/mtd/ubi/vtbl.c	/^static struct ubi_vtbl_record empty_vtbl_record;$/;"	v	typeref:struct:ubi_vtbl_record	file:
empty_zero_page	arch/sparc/lib/bootm.c	/^	char empty_zero_page[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
emr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 emr;		\/* External Match Register	*\/$/;"	m	struct:timer_regs	typeref:typename:u32
emr	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 emr;		\/* External Match Control Register	*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
emr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 emr;		\/* 0x1f4 extended mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
emr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 emr;		\/* 0x1f4 extended mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
emr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 emr;		\/* 0x14 Error Status Mask Register) *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
emr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	emr;		\/* Extended Mode Register *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
emr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 emr1;$/;"	m	struct:dram_para	typeref:typename:u32
emr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 emr1;$/;"	m	struct:dram_para	typeref:typename:u32
emr2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 emr2;		\/* 0x8C || 0xBC *\/$/;"	m	struct:sdrc_cs	typeref:typename:u32
emr2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 emr2;		\/* 0x1f8 extended mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
emr2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 emr2;$/;"	m	struct:dram_para	typeref:typename:u32
emr2	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 emr2;		\/* 0x1f8 extended mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
emr2	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 emr2;$/;"	m	struct:dram_para	typeref:typename:u32
emr2	include/synopsys/dwcddr21mctl.h	/^	unsigned int	emr2;		\/* Extended Mode Register 2 *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
emr3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 emr3;		\/* 0x1fc extended mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
emr3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 emr3;$/;"	m	struct:dram_para	typeref:typename:u32
emr3	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 emr3;		\/* 0x1fc extended mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
emr3	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 emr3;$/;"	m	struct:dram_para	typeref:typename:u32
emr3	include/synopsys/dwcddr21mctl.h	/^	unsigned int	emr3;		\/* Extended Mode Register 3 *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
emrbr	arch/m68k/include/asm/fec.h	/^	u32 emrbr;		\/* 0x3D8 *\/$/;"	m	struct:fec	typeref:typename:u32
emrbr	drivers/net/fec_mxc.h	/^	uint32_t emrbr;			\/* MBAR_ETH + 0x188 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
emrs	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 emrs;		\/* 0xD0: EMC_EMRS *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
emsr	include/mpc5xxx.h	/^	volatile u32 emsr;		\/* GPT + Timer# * 0x10 + 0x00 *\/$/;"	m	struct:mpc5xxx_gpt	typeref:typename:volatile u32
emu	drivers/spi/davinci_spi.c	/^	dv_reg	emu;		\/* 0x44 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
emu0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int emu0;$/;"	m	struct:pad_signals	typeref:typename:int
emu0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int emu0;$/;"	m	struct:pad_signals	typeref:typename:int
emu1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int emu1;$/;"	m	struct:pad_signals	typeref:typename:int
emu1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int emu1;$/;"	m	struct:pad_signals	typeref:typename:int
emu3C0	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C0;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu3C1	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C1[ATT_C];$/;"	m	struct:__anon964d10140108	typeref:typename:u8[]
emu3C2	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C2;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu3C4	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C4;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu3C5	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C5[SEQ_C];$/;"	m	struct:__anon964d10140108	typeref:typename:u8[]
emu3C6	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C6;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu3C7	drivers/bios_emulator/include/biosemu.h	/^	uint emu3C7;$/;"	m	struct:__anon964d10140108	typeref:typename:uint
emu3C8	drivers/bios_emulator/include/biosemu.h	/^	uint emu3C8;$/;"	m	struct:__anon964d10140108	typeref:typename:uint
emu3C9	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3C9[PAL_C];$/;"	m	struct:__anon964d10140108	typeref:typename:u8[]
emu3CE	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3CE;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu3CF	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3CF[GRA_C];$/;"	m	struct:__anon964d10140108	typeref:typename:u8[]
emu3D4	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3D4;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu3D5	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3D5[CRT_C];$/;"	m	struct:__anon964d10140108	typeref:typename:u8[]
emu3DA	drivers/bios_emulator/include/biosemu.h	/^	u8 emu3DA;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu61	drivers/bios_emulator/include/biosemu.h	/^	u8 emu61;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu70	drivers/bios_emulator/include/biosemu.h	/^	u8 emu70;$/;"	m	struct:__anon964d10140108	typeref:typename:u8
emu_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	emu_dclk_div: emu_dclk_div {$/;"	l
emu_hal_params	arch/arm/include/asm/arch-omap3/sys_proto.h	/^struct emu_hal_params {$/;"	s
emu_hal_params_rx51	board/nokia/rx51/rx51.h	/^struct emu_hal_params_rx51 {$/;"	s
emu_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux emu_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
emu_revid	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	emu_revid;	\/* 0x60: APB_MISC_GP_EMU_REVID *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
emu_revid	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	emu_revid;	\/* 0x60: APB_MISC_GP_EMU_REVID *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
emu_revid	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	emu_revid;	\/* 0x60: APB_MISC_GP_EMU_REVID *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
emu_revid	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	emu_revid;	\/* 0x60: APB_MISC_GP_EMU_REVID *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
emu_revid	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	emu_revid;	\/* 0x60: APB_MISC_GP_EMU_REVID *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
emucnt0	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	emucnt0;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
emucnt1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	emucnt1;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
emul	arch/sandbox/include/asm/state.h	/^	struct udevice *emul;$/;"	m	struct:sandbox_spi_info	typeref:struct:udevice *
emul	include/i2c.h	/^	struct udevice *emul;$/;"	m	struct:dm_i2c_chip	typeref:struct:udevice *
emul_con	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 emul_con;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
emulateVGA	drivers/bios_emulator/include/biosemu.h	/^	int emulateVGA;$/;"	m	struct:__anon964d10140108	typeref:typename:int
emulate_bitflips	drivers/mtd/ubi/ubi.h	/^	unsigned int emulate_bitflips:1;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:1
emulate_io_failures	drivers/mtd/ubi/ubi.h	/^	unsigned int emulate_io_failures:1;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:1
emulate_power_cut	drivers/mtd/ubi/ubi.h	/^	unsigned int emulate_power_cut:2;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int:2
emulated_fp	arch/mips/include/asm/processor.h	/^	unsigned long emulated_fp;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
emulation	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	emulation;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
emulation	drivers/usb/musb/am35x.h	/^	u32	emulation;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
emulation_control	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	emulation_control;$/;"	m	struct:global_ctl_regs	typeref:typename:u32
emumgt	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	emumgt;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
en	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 en;			\/* 0x114 *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
en	arch/arm/include/asm/arch/timer.h	/^	u32 en;			\/* 0x114 *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
en	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	en;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
en	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	en;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
en	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	en;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
en	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	en;$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32
en	arch/m68k/include/asm/immap_5301x.h	/^	u8 en;			\/* 0x00 PWM Enable *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
en	board/freescale/common/ngpixis.h	/^		u8 en;$/;"	m	struct:ngpixis::__anonfc4359a50108	typeref:typename:u8
en_audio_interface	drivers/sound/wm8994.h	/^enum en_audio_interface {$/;"	g
en_bit	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 en_bit;		\/* 0: disable; 1: enable *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
en_bit	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 en_bit;		\/* 0: disable; 1: enable *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
en_clk_dtv_spdo	board/micronas/vct/dcgu.h	/^		u32 en_clk_dtv_spdo:1;	\/* Enable bit for clk_dtv_spdo	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clk_i2s_dly	board/micronas/vct/dcgu.h	/^		u32 en_clk_i2s_dly:1;	\/* Enable bit for clk_scc_abp	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clk_scc_abp	board/micronas/vct/dcgu.h	/^		u32 en_clk_scc_abp:1;	\/* Enable bit for clk_scc_abp	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkad	board/micronas/vct/dcgu.h	/^		u32 en_clkad:1;		\/* Enable bit for clkad (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkcpu	board/micronas/vct/dcgu.h	/^		u32 en_clkcpu:1;	\/* Enable bit for clkcpu	*\/$/;"	m	struct:dcgu_clk_en2::__anon7364447c0208	typeref:typename:u32:1
en_clkdvp	board/micronas/vct/dcgu.h	/^		u32 en_clkdvp:1;	\/* Enable bit for clkdvp (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkebi	board/micronas/vct/dcgu.h	/^		u32 en_clkebi:1;	\/* Enable bit for clkebi (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkga	board/micronas/vct/dcgu.h	/^		u32 en_clkga:1;		\/* Enable bit for clkga (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkmr1	board/micronas/vct/dcgu.h	/^		u32 en_clkmr1:1;	\/* Enable bit for clkmr1 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkmr2	board/micronas/vct/dcgu.h	/^		u32 en_clkmr2:1;	\/* Enable bit for clkmr2 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkmsmc	board/micronas/vct/dcgu.h	/^		u32 en_clkmsmc:1;	\/* Enable bit for clkmsmc (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkmvd	board/micronas/vct/dcgu.h	/^		u32 en_clkmvd:1;	\/* Enable bit for clkmvd (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkperi20	board/micronas/vct/dcgu.h	/^		u32 en_clkperi20:1;	\/* Enable bit for clkperi20 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clksmc	board/micronas/vct/dcgu.h	/^		u32 en_clksmc:1;	\/* Enable bit for clksmc (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkssi_m	board/micronas/vct/dcgu.h	/^		u32 en_clkssi_m:1;	\/* Enable bit for clkssi_m (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkssi_s	board/micronas/vct/dcgu.h	/^		u32 en_clkssi_s:1;	\/* Enable bit for clkssi_s (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clktsd	board/micronas/vct/dcgu.h	/^		u32 en_clktsd:1;	\/* Enable bit for clktsd (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkuart1	board/micronas/vct/dcgu.h	/^		u32 en_clkuart1:1;	\/* Enable bit for clkuart1 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkuart2	board/micronas/vct/dcgu.h	/^		u32 en_clkuart2:1;	\/* Enable bit for clkuart2 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkusb24	board/micronas/vct/dcgu.h	/^		u32 en_clkusb24:1;	\/* Enable bit for clkusb24 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_clkusb60	board/micronas/vct/dcgu.h	/^		u32 en_clkusb60:1;	\/* Enable bit for clkusb60 (#)	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
en_csn	board/keymile/common/common.h	/^	u8	en_csn;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
en_lock_det	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int en_lock_det;	\/* enable lock detect *\/$/;"	m	struct:set_epll_con_val	typeref:typename:unsigned int
en_max_audio_interface	drivers/sound/max98095.h	/^enum en_max_audio_interface {$/;"	g
en_setting	board/gumstix/pepper/board.h	/^	char en_setting[64];$/;"	m	struct:pepper_board_id	typeref:typename:char[64]
en_sound_codec	include/sound.h	/^enum en_sound_codec {$/;"	g
en_usbpll	board/micronas/vct/dcgu.h	/^		u32 en_usbpll:1;	\/* Enable bit for the USB PLL	*\/$/;"	m	struct:dcgu_clk_en1::__anon7364447c0108	typeref:typename:u32:1
enable	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int (*enable)(struct clk *c, int enable);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * c,int enable)
enable	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int (*enable) (struct clk *c, int enable);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * c,int enable)
enable	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 enable;			\/* 0x000 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
enable	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 enable:1;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:1
enable	arch/arm/include/asm/arch/display.h	/^	u32 enable;			\/* 0x000 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
enable	arch/arm/include/asm/imx-common/video.h	/^	void	(*enable)(struct display_info_t const *dev);$/;"	m	struct:display_info_t	typeref:typename:void (*)(struct display_info_t const * dev)
enable	arch/arm/mach-tegra/xusb-padctl-common.h	/^	int (*enable)(struct tegra_xusb_phy *phy);$/;"	m	struct:tegra_xusb_phy_ops	typeref:typename:int (*)(struct tegra_xusb_phy * phy)
enable	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int enable;$/;"	m	struct:tegra_xusb_padctl	typeref:typename:unsigned int
enable	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t enable;$/;"	m	struct:usb2_port_setting	typeref:typename:uint8_t
enable	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t enable;$/;"	m	struct:usb3_port_setting	typeref:typename:uint8_t
enable	board/LaCie/common/cpld-gpio-bus.h	/^	unsigned enable;$/;"	m	struct:cpld_gpio_bus	typeref:typename:unsigned
enable	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	void (*enable)(struct display_info_t const *dev);$/;"	m	struct:display_info_t	typeref:typename:void (*)(struct display_info_t const * dev)	file:
enable	board/nokia/rx51/tag_omap.h	/^	unsigned enable:1;$/;"	m	struct:omap_sti_console_config	typeref:typename:unsigned:1
enable	drivers/ddr/marvell/a38x/xor.h	/^	int enable;		\/* Address decode window is enabled\/disabled  *\/$/;"	m	struct:unit_win_info	typeref:typename:int
enable	drivers/net/mvgbe.h	/^	int enable;		\/* Enable\/disable access to the window. *\/$/;"	m	struct:mvgbe_winparam	typeref:typename:int
enable	drivers/usb/eth/r8152.h	/^		int (*enable)(struct r8152 *);$/;"	m	struct:r8152::rtl_ops	typeref:typename:int (*)(struct r8152 *)
enable	drivers/usb/musb-new/musb_core.h	/^	int	(*enable)(struct musb *musb);$/;"	m	struct:musb_platform_ops	typeref:typename:int (*)(struct musb * musb)
enable	drivers/usb/musb-new/musb_core.h	/^	void	(*enable)(struct musb *musb);$/;"	m	struct:musb_platform_ops	typeref:typename:void (*)(struct musb * musb)
enable	drivers/usb/phy/rockchip_usb2_phy.c	/^	unsigned int enable;$/;"	m	struct:usb2phy_reg	typeref:typename:unsigned int	file:
enable	drivers/video/ipu.h	/^	int (*enable) (struct clk *);$/;"	m	struct:clk	typeref:typename:int (*)(struct clk *)
enable	drivers/video/mxcfb.h	/^	int enable;$/;"	m	struct:mxcfb_color_key	typeref:typename:int
enable	drivers/video/mxcfb.h	/^	int enable;$/;"	m	struct:mxcfb_gamma	typeref:typename:int
enable	drivers/video/mxcfb.h	/^	int enable;$/;"	m	struct:mxcfb_gbl_alpha	typeref:typename:int
enable	drivers/video/mxcfb.h	/^	int enable;$/;"	m	struct:mxcfb_loc_alpha	typeref:typename:int
enable	drivers/video/pwm_backlight.c	/^	struct gpio_desc enable;$/;"	m	struct:pwm_backlight_priv	typeref:struct:gpio_desc	file:
enable	drivers/video/simple_panel.c	/^	struct gpio_desc enable;$/;"	m	struct:simple_panel_priv	typeref:struct:gpio_desc	file:
enable	include/backlight.h	/^	int (*enable)(struct udevice *dev);$/;"	m	struct:backlight_ops	typeref:typename:int (*)(struct udevice * dev)
enable	include/clk-uclass.h	/^	int (*enable)(struct clk *clk);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * clk)
enable	include/display.h	/^	int (*enable)(struct udevice *dev, int panel_bpp,$/;"	m	struct:dm_display_ops	typeref:typename:int (*)(struct udevice * dev,int panel_bpp,const struct display_timing * timing)
enable	include/linux/fb.h	/^	__u16 enable;			\/* cursor on\/off *\/$/;"	m	struct:fb_cursor_user	typeref:typename:__u16
enable	include/linux/fb.h	/^	__u16 enable;		\/* cursor on\/off *\/$/;"	m	struct:fb_cursor	typeref:typename:__u16
enable	include/linux/usb/gadget.h	/^	int (*enable) (struct usb_ep *ep,$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep,const struct usb_endpoint_descriptor * desc)
enable	include/mpc5xxx.h	/^	volatile u8 enable;		\/* WU_GPIO + 0x00 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
enable	test/dm/regulator.c	/^	bool enable;$/;"	m	struct:setting	typeref:typename:bool	file:
enable_8259A_irq	board/mpl/common/isa.c	/^void enable_8259A_irq(unsigned int irq)$/;"	f	typeref:typename:void
enable_8568mds_duart	board/freescale/mpc8568mds/bcsr.c	/^void enable_8568mds_duart(void)$/;"	f	typeref:typename:void
enable_8568mds_flash_write	board/freescale/mpc8568mds/bcsr.c	/^void enable_8568mds_flash_write(void)$/;"	f	typeref:typename:void
enable_8568mds_qe_mdio	board/freescale/mpc8568mds/bcsr.c	/^void enable_8568mds_qe_mdio(void)$/;"	f	typeref:typename:void
enable_8569mds_flash_write	board/freescale/mpc8569mds/bcsr.c	/^void enable_8569mds_flash_write(void)$/;"	f	typeref:typename:void
enable_8569mds_qe_uec	board/freescale/mpc8569mds/bcsr.c	/^void enable_8569mds_qe_uec(void)$/;"	f	typeref:typename:void
enable_addr_trans	arch/powerpc/cpu/mpc83xx/start.S	/^enable_addr_trans:$/;"	l
enable_alert	drivers/hwmon/adm1021.c	/^		uint enable_alert:1;	\/* enable alert output pin *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:1	file:
enable_all_gpe	arch/x86/cpu/broadwell/pch.c	/^void enable_all_gpe(u32 set1, u32 set2, u32 set3, u32 set4)$/;"	f	typeref:typename:void
enable_alt_smi	arch/x86/cpu/broadwell/pch.c	/^int enable_alt_smi(struct udevice *pch, u32 mask)$/;"	f	typeref:typename:int
enable_arbiter	drivers/mtd/nand/pxa3xx_nand.h	/^	int	enable_arbiter;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:int
enable_azalia	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_azalia;			\/* Offset 0x002f *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_azalia	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	enable_azalia;		\/* Offset 0x0027 *\/$/;"	m	struct:vpd_region	typeref:typename:u8
enable_backlight	board/freescale/mx6sabresd/mx6sabresd.c	/^static void enable_backlight(void)$/;"	f	typeref:typename:void	file:
enable_backlight	board/siemens/pxm2/board.c	/^static int enable_backlight(void)$/;"	f	typeref:typename:int	file:
enable_backlight	include/panel.h	/^	int (*enable_backlight)(struct udevice *dev);$/;"	m	struct:panel_ops	typeref:typename:int (*)(struct udevice * dev)
enable_bank	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static void enable_bank(ccsr_gur_t *gur, int bank)$/;"	f	typeref:typename:void	file:
enable_basic_clocks	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^void enable_basic_clocks(void)$/;"	f	typeref:typename:void
enable_basic_clocks	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^void enable_basic_clocks(void)$/;"	f	typeref:typename:void
enable_basic_clocks	arch/arm/cpu/armv7/omap4/hw_data.c	/^void enable_basic_clocks(void)$/;"	f	typeref:typename:void
enable_basic_clocks	arch/arm/cpu/armv7/omap5/hw_data.c	/^void enable_basic_clocks(void)$/;"	f	typeref:typename:void
enable_basic_uboot_clocks	arch/arm/cpu/armv7/omap4/hw_data.c	/^void enable_basic_uboot_clocks(void)$/;"	f	typeref:typename:void
enable_basic_uboot_clocks	arch/arm/cpu/armv7/omap5/hw_data.c	/^void enable_basic_uboot_clocks(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/BuR/brppt1/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/BuR/brxre1/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/birdland/bav335x/mux.c	/^void enable_board_pin_mux(enum board_type board)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/gumstix/pepper/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/isee/igep0033/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/phytec/pcm051/mux.c	/^void enable_board_pin_mux()$/;"	f	typeref:typename:void
enable_board_pin_mux	board/siemens/draco/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/siemens/pxm2/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/siemens/rut/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/silica/pengwyn/mux.c	/^void enable_board_pin_mux()$/;"	f	typeref:typename:void
enable_board_pin_mux	board/tcl/sl50/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/ti/am335x/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/ti/am43xx/mux.c	/^void enable_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_board_pin_mux	board/vscom/baltos/mux.c	/^void enable_board_pin_mux()$/;"	f	typeref:typename:void
enable_cache	arch/x86/include/asm/mtrr.h	/^	bool enable_cache;$/;"	m	struct:mtrr_state	typeref:typename:bool
enable_caches	arch/arm/cpu/arm11/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/arm926ejs/mx25/generic.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/arm926ejs/spear/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv7/iproc-common/hwinit-common.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv7/kona-common/hwinit-common.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv7/ls102xa/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv7/mx5/soc.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv7/omap-common/omap-cache.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv7/vf610/generic.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/armv8/cache_v8.c	/^void __weak enable_caches(void)$/;"	f	typeref:typename:void __weak
enable_caches	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/cpu/pxa/pxa2xx.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/imx-common/cache.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/lib/cache.c	/^__weak void enable_caches(void)$/;"	f	typeref:typename:__weak void
enable_caches	arch/arm/mach-at91/arm926ejs/cache.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-at91/armv7/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-bcm283x/init.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-exynos/soc.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-keystone/init.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-mvebu/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-rmobile/cpu_info.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-rockchip/rk3036-board.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-rockchip/rk3288-board.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-s5pc1xx/cache.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-socfpga/misc.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-sunxi/board.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-tegra/board.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_caches	arch/arm/mach-zynq/cpu.c	/^void enable_caches(void)$/;"	f	typeref:typename:void
enable_clock_domain	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode)$/;"	f	typeref:typename:void	file:
enable_clock_domain	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode)$/;"	f	typeref:typename:void	file:
enable_clock_gating	arch/x86/cpu/ivybridge/lpc.c	/^static void enable_clock_gating(struct udevice *pch)$/;"	f	typeref:typename:void	file:
enable_clock_module	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void enable_clock_module(u32 *const clkctrl_addr, u32 enable_mode,$/;"	f	typeref:typename:void	file:
enable_clock_module	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void enable_clock_module(u32 const clkctrl_addr, u32 enable_mode,$/;"	f	typeref:typename:void	file:
enable_clock_r5	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void enable_clock_r5(void)$/;"	f	typeref:typename:void	file:
enable_clr	drivers/usb/host/xhci-keystone.c	/^		u32 enable_clr;$/;"	m	struct:kdwc3_irq_regs::__anoncc7370550108	typeref:typename:u32	file:
enable_cluster_l2	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^int enable_cluster_l2(void)$/;"	f	typeref:typename:int
enable_controller	drivers/usb/host/r8a66597-hcd.c	/^static int enable_controller(struct r8a66597 *r8a66597)$/;"	f	typeref:typename:int	file:
enable_cpc	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^#define enable_cpc(/;"	d	file:
enable_cpc	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void enable_cpc(void)$/;"	f	typeref:typename:void
enable_cpu_a011_workaround	arch/powerpc/cpu/mpc85xx/release.S	/^enable_cpu_a011_workaround:$/;"	l
enable_cpu_clock	arch/arm/mach-tegra/cpu.c	/^void enable_cpu_clock(int enable)$/;"	f	typeref:typename:void
enable_cpu_clocks	arch/arm/mach-tegra/tegra114/cpu.c	/^static void enable_cpu_clocks(void)$/;"	f	typeref:typename:void	file:
enable_cpu_clocks	arch/arm/mach-tegra/tegra124/cpu.c	/^static void enable_cpu_clocks(void)$/;"	f	typeref:typename:void	file:
enable_cpu_power_rail	arch/arm/mach-tegra/tegra114/cpu.c	/^static void enable_cpu_power_rail(void)$/;"	f	typeref:typename:void	file:
enable_cpu_power_rail	arch/arm/mach-tegra/tegra124/cpu.c	/^static void enable_cpu_power_rail(void)$/;"	f	typeref:typename:void	file:
enable_cpu_power_rail	arch/arm/mach-tegra/tegra20/cpu.c	/^static void enable_cpu_power_rail(void)$/;"	f	typeref:typename:void	file:
enable_cpu_power_rail	arch/arm/mach-tegra/tegra30/cpu.c	/^static void enable_cpu_power_rail(void)$/;"	f	typeref:typename:void	file:
enable_devices_ns_access	board/freescale/common/ns_access.c	/^static void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num)$/;"	f	typeref:typename:void	file:
enable_display_power	board/aristainetos/aristainetos-v2.c	/^static void enable_display_power(void)$/;"	f	typeref:typename:void	file:
enable_dma	drivers/net/bcm-sf2-eth.h	/^	int (*enable_dma)(struct eth_dma *dma, int dir);$/;"	m	struct:eth_dma	typeref:typename:int (*)(struct eth_dma * dma,int dir)
enable_dma0	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_dma0;			\/* Offset 0x0037 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_dma1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_dma1;			\/* Offset 0x0038 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_dmm_clocks	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^void enable_dmm_clocks(void)$/;"	f	typeref:typename:void
enable_dmm_clocks	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^void enable_dmm_clocks(void)$/;"	f	typeref:typename:void
enable_edma3_clocks	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^void enable_edma3_clocks(void)$/;"	f	typeref:typename:void
enable_edma3_clocks	arch/arm/cpu/armv7/omap5/hw_data.c	/^void enable_edma3_clocks(void)$/;"	f	typeref:typename:void
enable_efuse_prog_supply	arch/arm/cpu/armv7/mx5/clock.c	/^void enable_efuse_prog_supply(bool enable)$/;"	f	typeref:typename:void
enable_efuse_prog_supply	drivers/misc/fsl_iim.c	/^#define enable_efuse_prog_supply(/;"	d	file:
enable_endpoint	drivers/usb/gadget/f_mass_storage.c	/^static int enable_endpoint(struct fsg_common *common, struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
enable_enet_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_enet_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_enet_pin_mux	board/ti/ti814x/mux.c	/^void enable_enet_pin_mux(void)$/;"	f	typeref:typename:void
enable_enet_pll	arch/arm/cpu/armv7/mx6/clock.c	/^static int enable_enet_pll(uint32_t en)$/;"	f	typeref:typename:int	file:
enable_eth_phy	board/st/stv0991/stv0991.c	/^void enable_eth_phy(void)$/;"	f	typeref:typename:void
enable_ext_addr	arch/powerpc/cpu/mpc86xx/start.S	/^enable_ext_addr:$/;"	l
enable_ext_reset	arch/arm/mach-at91/spl_at91.c	/^static void enable_ext_reset(void)$/;"	f	typeref:typename:void	file:
enable_fast_boot	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u8 enable_fast_boot;$/;"	m	struct:platform_config	typeref:typename:u8
enable_fec_anatop_clock	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)$/;"	f	typeref:typename:int
enable_fpu	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^enable_fpu:$/;"	l
enable_fwadapt_7wvga	board/wandboard/wandboard.c	/^static void enable_fwadapt_7wvga(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_gpio	board/nokia/rx51/tag_omap.h	/^	u16 enable_gpio;$/;"	m	struct:omap_tea5761_config	typeref:typename:u16
enable_gpmc_cs_config	arch/arm/cpu/armv7/omap-common/mem-common.c	/^void enable_gpmc_cs_config(const u32 *gpmc_config, const struct gpmc_cs *cs,$/;"	f	typeref:typename:void
enable_gpmc_net_config	board/gumstix/duovero/duovero.c	/^static void enable_gpmc_net_config(const u32 *gpmc_config, const struct gpmc_cs *cs,$/;"	f	typeref:typename:void	file:
enable_hdmi	board/gateworks/gw_ventana/gw_ventana.c	/^static void enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_hdmi	board/kosagi/novena/video.c	/^static void enable_hdmi(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_host_clocks	board/ti/omap5_uevm/evm.c	/^static void enable_host_clocks(void)$/;"	f	typeref:typename:void	file:
enable_hpet	arch/x86/cpu/ivybridge/lpc.c	/^static void enable_hpet(void)$/;"	f	typeref:typename:void	file:
enable_hsi	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_hsi;			\/* Offset 0x0042 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_hsuart0	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_hsuart0;			\/* Offset 0x0029 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_hsuart1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_hsuart1;			\/* Offset 0x002a *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_ht	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u8 enable_ht;$/;"	m	struct:platform_config	typeref:typename:u8
enable_i2_c0	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c0;			\/* Offset 0x0039 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2_c1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c1;			\/* Offset 0x003a *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2_c2	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c2;			\/* Offset 0x003b *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2_c3	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c3;			\/* Offset 0x003c *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2_c4	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c4;			\/* Offset 0x003d *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2_c5	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c5;			\/* Offset 0x003e *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2_c6	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_i2_c6;			\/* Offset 0x003f *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_i2c0_pin_mux	board/birdland/bav335x/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/bosch/shc/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/gumstix/pepper/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/phytec/pcm051/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/siemens/draco/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/siemens/pxm2/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/siemens/rut/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/tcl/sl50/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/ti/am335x/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/ti/am43xx/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c0_pin_mux	board/vscom/baltos/mux.c	/^void enable_i2c0_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c1_pin_mux	board/vscom/baltos/mux.c	/^void enable_i2c1_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c_clk	arch/arm/cpu/armv7/mx5/clock.c	/^int enable_i2c_clk(unsigned char enable, unsigned i2c_num)$/;"	f	typeref:typename:int
enable_i2c_clk	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_i2c_clk(unsigned char enable, unsigned i2c_num)$/;"	f	typeref:typename:int
enable_i2c_clk	arch/arm/cpu/armv7/mx7/clock.c	/^int enable_i2c_clk(unsigned char enable, unsigned i2c_num)$/;"	f	typeref:typename:int
enable_i2c_pin_mux	board/BuR/brppt1/mux.c	/^void enable_i2c_pin_mux(void)$/;"	f	typeref:typename:void
enable_i2c_pin_mux	board/BuR/brxre1/mux.c	/^void enable_i2c_pin_mux(void)$/;"	f	typeref:typename:void
enable_igd	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_igd;			\/* Offset 0x0054 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_interrupts	arch/arc/lib/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/arm/lib/interrupts.c	/^void enable_interrupts (void)$/;"	f	typeref:typename:void
enable_interrupts	arch/arm/lib/interrupts_64.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/arm/lib/interrupts_m.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/avr32/lib/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/blackfin/cpu/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/m68k/lib/interrupts.c	/^void enable_interrupts (void)$/;"	f	typeref:typename:void
enable_interrupts	arch/microblaze/cpu/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/mips/cpu/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/nds32/lib/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/nios2/cpu/interrupts.c	/^void enable_interrupts( void )$/;"	f	typeref:typename:void
enable_interrupts	arch/openrisc/cpu/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/powerpc/lib/interrupts.c	/^void enable_interrupts (void)$/;"	f	typeref:typename:void
enable_interrupts	arch/sandbox/lib/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/sh/cpu/sh2/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/sh/cpu/sh3/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/sh/cpu/sh4/interrupts.c	/^void enable_interrupts (void)$/;"	f	typeref:typename:void
enable_interrupts	arch/sparc/lib/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/x86/cpu/interrupts.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_interrupts	arch/xtensa/cpu/exceptions.c	/^void enable_interrupts(void)$/;"	f	typeref:typename:void
enable_ipu_clock	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_ipu_clock(void)$/;"	f	typeref:typename:void
enable_irq	include/linux/compat.h	/^#define enable_irq(/;"	d
enable_irq_wake	include/linux/compat.h	/^#define enable_irq_wake(/;"	d
enable_l2_cluster_l2	arch/powerpc/cpu/mpc85xx/start.S	/^enable_l2_cluster_l2:$/;"	l
enable_lapic	arch/x86/cpu/lapic.c	/^void enable_lapic(void)$/;"	f	typeref:typename:void
enable_lapic_tpr	arch/x86/cpu/broadwell/cpu.c	/^static void enable_lapic_tpr(void)$/;"	f	typeref:typename:void	file:
enable_lapic_tpr	arch/x86/cpu/ivybridge/model_206ax.c	/^static void enable_lapic_tpr(void)$/;"	f	typeref:typename:void	file:
enable_layerscape_ns_access	board/freescale/common/ns_access.c	/^void enable_layerscape_ns_access(void)$/;"	f	typeref:typename:void
enable_lcd	board/siemens/rut/board.c	/^static int enable_lcd(void)$/;"	f	typeref:typename:int	file:
enable_lcdif_clock	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_lcdif_clock(u32 base_addr)$/;"	f	typeref:typename:int
enable_ldb_di_clock_sources	arch/arm/cpu/armv7/mx6/clock.c	/^static void enable_ldb_di_clock_sources(void)$/;"	f	typeref:typename:void	file:
enable_local	drivers/hwmon/adm1021.c	/^		uint enable_local:1;	\/* enable internal temp sensor *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:1	file:
enable_lpe	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_lpe;			\/* Offset 0x0035 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_lvds	board/aristainetos/aristainetos-v1.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds	board/aristainetos/aristainetos-v2.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds	board/boundary/nitrogen6x/nitrogen6x.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds	board/embest/mx6boards/mx6boards.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds	board/freescale/mx6sabresd/mx6sabresd.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds	board/gateworks/gw_ventana/gw_ventana.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds	board/kosagi/novena/video.c	/^static void enable_lvds(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_lvds_jeida	board/boundary/nitrogen6x/nitrogen6x.c	/^static void enable_lvds_jeida(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_mac	drivers/net/bcm-sf2-eth.h	/^	int (*enable_mac)(void);$/;"	m	struct:eth_info	typeref:typename:int (*)(void)
enable_mac	drivers/net/fm/fm.h	/^	void (*enable_mac)(struct fsl_enet_mac *mac);$/;"	m	struct:fsl_enet_mac	typeref:typename:void (*)(struct fsl_enet_mac * mac)
enable_memory_down	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_memory_down;$/;"	m	struct:memory_down_data	typeref:typename:uint8_t
enable_memory_down	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u8 enable_memory_down;$/;"	m	struct:platform_config	typeref:typename:u8
enable_mmc1_pin_mux	board/ti/ti814x/mux.c	/^void enable_mmc1_pin_mux(void)$/;"	f	typeref:typename:void
enable_modules_clock	board/freescale/s32v234evb/clock.c	/^static void enable_modules_clock(void)$/;"	f	typeref:typename:void	file:
enable_nfc_clk	arch/arm/cpu/armv7/mx5/clock.c	/^void enable_nfc_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_norboot_pin_mux	board/ti/am335x/mux.c	/^void enable_norboot_pin_mux(void)$/;"	f	typeref:typename:void
enable_ocotp_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_ocotp_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_ocotp_clk	arch/arm/cpu/armv7/mx7/clock.c	/^void enable_ocotp_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_ocotp_clk	arch/arm/cpu/armv7/vf610/generic.c	/^void enable_ocotp_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_one_interrupt	arch/microblaze/cpu/interrupts.c	/^static void enable_one_interrupt(int irq)$/;"	f	typeref:typename:void	file:
enable_pci_map	arch/sandbox/cpu/cpu.c	/^static bool enable_pci_map;$/;"	v	typeref:typename:bool	file:
enable_pcie_clock	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_pcie_clock(void)$/;"	f	typeref:typename:int
enable_per_clocks	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static void enable_per_clocks(void)$/;"	f	typeref:typename:void	file:
enable_periodic	drivers/usb/host/ehci-hcd.c	/^enable_periodic(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
enable_pll1	arch/arm/cpu/armv7/stv0991/clock.c	/^void enable_pll1(void)$/;"	f	typeref:typename:void
enable_pll3	arch/arm/cpu/armv7/mx6/clock.c	/^static void enable_pll3(void)$/;"	f	typeref:typename:void	file:
enable_pll_enet	arch/arm/cpu/armv7/mx7/clock.c	/^static int enable_pll_enet(void)$/;"	f	typeref:typename:int	file:
enable_pll_video	arch/arm/cpu/armv7/mx6/clock.c	/^static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom,$/;"	f	typeref:typename:int	file:
enable_pll_video	arch/arm/cpu/armv7/mx7/clock.c	/^static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom,$/;"	f	typeref:typename:int	file:
enable_pm_ich9	arch/x86/cpu/qemu/qemu.c	/^static void enable_pm_ich9(void)$/;"	f	typeref:typename:void	file:
enable_pm_piix	arch/x86/cpu/qemu/qemu.c	/^static void enable_pm_piix(void)$/;"	f	typeref:typename:void	file:
enable_pol	drivers/video/ipu.h	/^	unsigned enable_pol:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
enable_port80_on_lpc	arch/x86/cpu/intel_common/lpc.c	/^static void enable_port80_on_lpc(struct udevice *pch)$/;"	f	typeref:typename:void	file:
enable_pwm	board/siemens/pxm2/board.c	/^static int enable_pwm(void)$/;"	f	typeref:typename:int	file:
enable_pwm0	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_pwm0;			\/* Offset 0x0040 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_pwm1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_pwm1;			\/* Offset 0x0041 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_qspi_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_qspi_clk(int qspi_num)$/;"	f	typeref:typename:void
enable_reg	drivers/video/ipu.h	/^	void *enable_reg;$/;"	m	struct:clk	typeref:typename:void *
enable_remote	drivers/hwmon/adm1021.c	/^		uint enable_remote:1;	\/* enable remote temp sensor *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:1	file:
enable_required_clocks	board/nvidia/nyan-big/nyan-big.c	/^static void enable_required_clocks(void)$/;"	f	typeref:typename:void	file:
enable_revoke_ek	include/tpm.h	/^	u8	enable_revoke_ek;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
enable_rgb	board/boundary/nitrogen6x/nitrogen6x.c	/^static void enable_rgb(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_rgb	board/freescale/mx6sabresd/mx6sabresd.c	/^static void enable_rgb(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_sata	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_sata;			\/* Offset 0x002d *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_sata_clock	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_sata_clock(void)$/;"	f	typeref:typename:int
enable_scrambling	arch/x86/cpu/quark/smc.c	/^void enable_scrambling(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
enable_scu	arch/arm/mach-tegra/ap.c	/^static void enable_scu(void)$/;"	f	typeref:typename:void	file:
enable_sdcard	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_sdcard;			\/* Offset 0x0028 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_sdio	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_sdio;			\/* Offset 0x0027 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_secure_boot	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_secure_boot;		\/* Offset 0x0025 *\/$/;"	m	struct:vpd_region	typeref:typename:uint8_t
enable_set	drivers/usb/host/xhci-keystone.c	/^		u32 enable_set;$/;"	m	struct:kdwc3_irq_regs::__anoncc7370550108	typeref:typename:u32	file:
enable_shc_board_pin_mux	board/bosch/shc/mux.c	/^void enable_shc_board_pin_mux(void)$/;"	f	typeref:typename:void
enable_shc_board_pwm_pin_mux	board/bosch/shc/mux.c	/^void enable_shc_board_pwm_pin_mux(void)$/;"	f	typeref:typename:void
enable_shift	drivers/video/ipu.h	/^	u8 enable_shift;$/;"	m	struct:clk	typeref:typename:u8
enable_smis	arch/x86/cpu/cpu.c	/^static int enable_smis(struct udevice *cpu, void *unused)$/;"	f	typeref:typename:int	file:
enable_spi	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_spi;			\/* Offset 0x002b *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enable_spi_clk	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_spi_clk(unsigned char enable, unsigned spi_num)$/;"	f	typeref:typename:int
enable_spi_display	board/aristainetos/aristainetos-v2.c	/^static void enable_spi_display(struct display_info_t const *dev)$/;"	f	typeref:typename:void	file:
enable_spi_prefetch	arch/x86/cpu/intel_common/lpc.c	/^static void enable_spi_prefetch(struct udevice *pch)$/;"	f	typeref:typename:void	file:
enable_status	board/micronas/vct/scc.h	/^		u32 enable_status:1;	\/* enabled [1\/0]		*\/$/;"	m	struct:scc_softwareconfiguration::__anon903167320408	typeref:typename:u32:1
enable_super_quick_calibration	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	enable_super_quick_calibration;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
enable_tdm_law	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^static void enable_tdm_law(void)$/;"	f	typeref:typename:void	file:
enable_thermal_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_thermal_clk(void)$/;"	f	typeref:typename:void
enable_thermal_clk	arch/arm/cpu/armv7/mx7/clock.c	/^void enable_thermal_clk(void)$/;"	f	typeref:typename:void
enable_turbo	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u8 enable_turbo;$/;"	m	struct:platform_config	typeref:typename:u8
enable_uart0_pin_mux	board/BuR/brppt1/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/BuR/brxre1/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/birdland/bav335x/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/bosch/shc/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/gumstix/pepper/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/isee/igep0033/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/phytec/pcm051/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/siemens/draco/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/siemens/pxm2/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/siemens/rut/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/silica/pengwyn/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/tcl/sl50/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/ti/am335x/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/ti/am43xx/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/ti/ti814x/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart0_pin_mux	board/vscom/baltos/mux.c	/^void enable_uart0_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart1_pin_mux	board/birdland/bav335x/mux.c	/^void enable_uart1_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart1_pin_mux	board/bosch/shc/mux.c	/^void enable_uart1_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart1_pin_mux	board/tcl/sl50/mux.c	/^void enable_uart1_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart1_pin_mux	board/ti/am335x/mux.c	/^void enable_uart1_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart1_pin_mux	board/vscom/baltos/mux.c	/^void enable_uart1_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart2_pin_mux	board/birdland/bav335x/mux.c	/^void enable_uart2_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart2_pin_mux	board/bosch/shc/mux.c	/^void enable_uart2_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart2_pin_mux	board/tcl/sl50/mux.c	/^void enable_uart2_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart2_pin_mux	board/ti/am335x/mux.c	/^void enable_uart2_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart2_pin_mux	board/vscom/baltos/mux.c	/^void enable_uart2_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart3_pin_mux	board/birdland/bav335x/mux.c	/^void enable_uart3_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart3_pin_mux	board/bosch/shc/mux.c	/^void enable_uart3_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart3_pin_mux	board/siemens/draco/mux.c	/^void enable_uart3_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart3_pin_mux	board/tcl/sl50/mux.c	/^void enable_uart3_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart3_pin_mux	board/ti/am335x/mux.c	/^void enable_uart3_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart3_pin_mux	board/vscom/baltos/mux.c	/^void enable_uart3_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart4_pin_mux	board/birdland/bav335x/mux.c	/^void enable_uart4_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart4_pin_mux	board/bosch/shc/mux.c	/^void enable_uart4_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart4_pin_mux	board/tcl/sl50/mux.c	/^void enable_uart4_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart4_pin_mux	board/ti/am335x/mux.c	/^void enable_uart4_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart4_pin_mux	board/vscom/baltos/mux.c	/^void enable_uart4_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart5_pin_mux	board/birdland/bav335x/mux.c	/^void enable_uart5_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart5_pin_mux	board/bosch/shc/mux.c	/^void enable_uart5_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart5_pin_mux	board/tcl/sl50/mux.c	/^void enable_uart5_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart5_pin_mux	board/ti/am335x/mux.c	/^void enable_uart5_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart5_pin_mux	board/vscom/baltos/mux.c	/^void enable_uart5_pin_mux(void)$/;"	f	typeref:typename:void
enable_uart_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_uart_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_usb_bar	arch/x86/cpu/ivybridge/cpu.c	/^static void enable_usb_bar(struct udevice *bus)$/;"	f	typeref:typename:void	file:
enable_usb_clocks	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^void enable_usb_clocks(int index)$/;"	f	typeref:typename:void
enable_usb_clocks	arch/arm/cpu/armv7/omap5/hw_data.c	/^void enable_usb_clocks(int index)$/;"	f	typeref:typename:void
enable_usb_phy1_clk	arch/arm/cpu/armv7/mx5/clock.c	/^void enable_usb_phy1_clk(bool enable)$/;"	f	typeref:typename:void
enable_usb_phy2_clk	arch/arm/cpu/armv7/mx5/clock.c	/^void enable_usb_phy2_clk(bool enable)$/;"	f	typeref:typename:void
enable_usboh3_clk	arch/arm/cpu/armv7/mx5/clock.c	/^void enable_usboh3_clk(bool enable)$/;"	f	typeref:typename:void
enable_usboh3_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void enable_usboh3_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_usboh3_clk	arch/arm/cpu/armv7/mx7/clock.c	/^void enable_usboh3_clk(unsigned char enable)$/;"	f	typeref:typename:void
enable_usdhc_clk	arch/arm/cpu/armv7/mx6/clock.c	/^int enable_usdhc_clk(unsigned char enable, unsigned bus_num)$/;"	f	typeref:typename:int
enable_vbus	drivers/usb/musb/da8xx.c	/^static void enable_vbus(void)$/;"	f	typeref:typename:void	file:
enable_videopll	board/ge/bx50v3/bx50v3.c	/^static void enable_videopll(void)$/;"	f	typeref:typename:void	file:
enable_vmx	arch/x86/cpu/ivybridge/model_206ax.c	/^static void enable_vmx(void)$/;"	f	typeref:typename:void	file:
enable_vpll	board/kosagi/novena/video.c	/^static void enable_vpll(void)$/;"	f	typeref:typename:void	file:
enable_vtt_regulator	board/ti/am43xx/board.c	/^static void enable_vtt_regulator(void)$/;"	f	typeref:typename:void	file:
enable_xattr	fs/yaffs2/yaffs_guts.h	/^	int enable_xattr;	\/* Enable xattribs *\/$/;"	m	struct:yaffs_param	typeref:typename:int
enable_xhci	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t enable_xhci;			\/* Offset 0x0034 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
enabled	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t enabled;$/;"	m	struct:cmd_thermal_set_trip_request	typeref:typename:uint32_t
enabled	common/iotrace.c	/^	bool enabled;$/;"	m	struct:iotrace	typeref:typename:bool	file:
enabled	drivers/clk/clk_sandbox.c	/^	bool enabled[SANDBOX_CLK_ID_COUNT];$/;"	m	struct:sandbox_clk_priv	typeref:typename:bool[]	file:
enabled	drivers/mtd/nand/tegra_nand.c	/^	int enabled;		\/* 1 to enable, 0 to disable *\/$/;"	m	struct:fdt_nand	typeref:typename:int	file:
enabled	drivers/net/ks8851_mll.c	/^	u8			enabled;$/;"	m	struct:ks_net	typeref:typename:u8	file:
enabled	drivers/usb/gadget/at91_udc.h	/^	unsigned			enabled:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
enabled	drivers/usb/host/ehci-tegra.c	/^	unsigned enabled:1;	\/* 1 to enable, 0 to disable *\/$/;"	m	struct:fdt_usb	typeref:typename:unsigned:1	file:
enabled	drivers/usb/musb-new/sunxi.c	/^static bool enabled = false;$/;"	v	typeref:typename:bool	file:
enabled	drivers/usb/musb/musb_udc.c	/^static int enabled;$/;"	v	typeref:typename:int	file:
enabled	drivers/video/tegra124/dp.c	/^	int enabled;$/;"	m	struct:tegra_dp_priv	typeref:typename:int	file:
enabled	include/ec_commands.h	/^	uint8_t enabled;$/;"	m	struct:ec_params_force_idle	typeref:typename:uint8_t
enabled	include/ec_commands.h	/^	uint8_t enabled;$/;"	m	struct:ec_params_switch_enable_backlight	typeref:typename:uint8_t
enabled	include/ec_commands.h	/^	uint8_t enabled;$/;"	m	struct:ec_params_switch_enable_wireless	typeref:typename:uint8_t
enabled	include/ec_commands.h	/^	uint8_t enabled;$/;"	m	struct:ec_response_pwm_get_keyboard_backlight	typeref:typename:uint8_t
enabled	include/fm_eth.h	/^	u8 enabled;$/;"	m	struct:fm_eth_info	typeref:typename:u8
enabled	include/fsl-mc/ldpaa_wriop.h	/^	u8 enabled;$/;"	m	struct:wriop_dpmac_info	typeref:typename:u8
enabled	include/vsc9953.h	/^	u8	enabled;$/;"	m	struct:vsc9953_port_info	typeref:typename:u8
enabled_rx	drivers/qe/uccf.h	/^	int		enabled_rx; \/* whether UCC is enabled for Rx (ENR) *\/$/;"	m	struct:ucc_fast_private	typeref:typename:int
enabled_tx	drivers/qe/uccf.h	/^	int		enabled_tx; \/* whether UCC is enabled for Tx (ENT) *\/$/;"	m	struct:ucc_fast_private	typeref:typename:int
enabled_uarts	board/nokia/rx51/tag_omap.h	/^	unsigned int enabled_uarts;$/;"	m	struct:omap_uart_config	typeref:typename:unsigned int
enc28j60_initialize	drivers/net/enc28j60.c	/^int enc28j60_initialize(unsigned int bus, unsigned int cs,$/;"	f	typeref:typename:int
enc_bclr	drivers/net/enc28j60.c	/^static void enc_bclr(enc_dev_t *enc, const u8 reg, const u8 data)$/;"	f	typeref:typename:void	file:
enc_bset	drivers/net/enc28j60.c	/^static void enc_bset(enc_dev_t *enc, const u8 reg, const u8 data)$/;"	f	typeref:typename:void	file:
enc_claim_bus	drivers/net/enc28j60.c	/^static int enc_claim_bus(enc_dev_t *enc)$/;"	f	typeref:typename:int	file:
enc_clk	arch/powerpc/include/asm/global_data.h	/^	u32 enc_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
enc_clock_wait	drivers/net/enc28j60.c	/^static int enc_clock_wait(enc_dev_t *enc)$/;"	f	typeref:typename:int	file:
enc_dev_t	drivers/net/enc28j60.c	/^} enc_dev_t;$/;"	t	typeref:struct:enc_device	file:
enc_device	drivers/net/enc28j60.c	/^typedef struct enc_device {$/;"	s	file:
enc_halt	drivers/net/enc28j60.c	/^static void enc_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
enc_init	drivers/net/enc28j60.c	/^static int enc_init(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
enc_initcheck	drivers/net/enc28j60.c	/^static int enc_initcheck(enc_dev_t *enc, const enum enc_initstate requiredstate)$/;"	f	typeref:typename:int	file:
enc_initdata	drivers/net/enc28j60.c	/^static const u16 enc_initdata[] = {$/;"	v	typeref:typename:const u16[]	file:
enc_initstate	drivers/net/enc28j60.c	/^enum enc_initstate {none=0, setupdone, linkready};$/;"	g	file:
enc_miiphy_read	drivers/net/enc28j60.c	/^int enc_miiphy_read(struct mii_dev *bus, int phy_adr, int devad, int reg)$/;"	f	typeref:typename:int
enc_miiphy_write	drivers/net/enc28j60.c	/^int enc_miiphy_write(struct mii_dev *bus, int phy_adr, int devad, int reg,$/;"	f	typeref:typename:int
enc_phy_link_wait	drivers/net/enc28j60.c	/^static int enc_phy_link_wait(enc_dev_t *enc)$/;"	f	typeref:typename:int	file:
enc_phy_read	drivers/net/enc28j60.c	/^static u16 enc_phy_read(enc_dev_t *enc, const u8 addr)$/;"	f	typeref:typename:u16	file:
enc_phy_write	drivers/net/enc28j60.c	/^static void enc_phy_write(enc_dev_t *enc, const u8 addr, const u16 data)$/;"	f	typeref:typename:void	file:
enc_poll	drivers/net/enc28j60.c	/^static void enc_poll(enc_dev_t *enc)$/;"	f	typeref:typename:void	file:
enc_pos	drivers/bios_emulator/include/x86emu/regs.h	/^	int enc_pos;$/;"	m	struct:__anon39451e6d0808	typeref:typename:int
enc_r16	drivers/net/enc28j60.c	/^static u16 enc_r16(enc_dev_t *enc, const u16 reg)$/;"	f	typeref:typename:u16	file:
enc_r8	drivers/net/enc28j60.c	/^static u8 enc_r8(enc_dev_t *enc, const u16 reg)$/;"	f	typeref:typename:u8	file:
enc_rbuf	drivers/net/enc28j60.c	/^static void enc_rbuf(enc_dev_t *enc, const u16 length, u8 *buf)$/;"	f	typeref:typename:void	file:
enc_receive	drivers/net/enc28j60.c	/^static void enc_receive(enc_dev_t *enc)$/;"	f	typeref:typename:void	file:
enc_recv	drivers/net/enc28j60.c	/^static int enc_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
enc_reg2nbytes	drivers/net/enc28j60.c	/^static int enc_reg2nbytes(const u16 reg)$/;"	f	typeref:typename:int	file:
enc_release_bus	drivers/net/enc28j60.c	/^static void enc_release_bus(enc_dev_t *enc)$/;"	f	typeref:typename:void	file:
enc_reset	drivers/net/enc28j60.c	/^static void enc_reset(enc_dev_t *enc)$/;"	f	typeref:typename:void	file:
enc_reset_rx	drivers/net/enc28j60.c	/^static void enc_reset_rx(enc_dev_t *enc)$/;"	f	typeref:typename:void	file:
enc_reset_rx_call	drivers/net/enc28j60.c	/^static void enc_reset_rx_call(enc_dev_t *enc)$/;"	f	typeref:typename:void	file:
enc_send	drivers/net/enc28j60.c	/^static int enc_send($/;"	f	typeref:typename:int	file:
enc_set_bank	drivers/net/enc28j60.c	/^static void enc_set_bank(enc_dev_t *enc, const u16 reg)$/;"	f	typeref:typename:void	file:
enc_setup	drivers/net/enc28j60.c	/^static int enc_setup(enc_dev_t *enc)$/;"	f	typeref:typename:int	file:
enc_status	include/mpc5xxx.h	/^	volatile u32	enc_status;	\/* INTR + 0x24 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
enc_str_pos	drivers/bios_emulator/include/x86emu/regs.h	/^	int enc_str_pos;$/;"	m	struct:__anon39451e6d0808	typeref:typename:int
enc_w16	drivers/net/enc28j60.c	/^static void enc_w16(enc_dev_t *enc, const u16 reg, const u16 data)$/;"	f	typeref:typename:void	file:
enc_w8	drivers/net/enc28j60.c	/^static void enc_w8(enc_dev_t *enc, const u16 reg, const u8 data)$/;"	f	typeref:typename:void	file:
enc_w8_retry	drivers/net/enc28j60.c	/^static void enc_w8_retry(enc_dev_t *enc, const u16 reg, const u8 data, const int c)$/;"	f	typeref:typename:void	file:
enc_wbuf	drivers/net/enc28j60.c	/^static void enc_wbuf(enc_dev_t *enc, const u16 length, const u8 *buf, const u8 control)$/;"	f	typeref:typename:void	file:
enc_write_hwaddr	drivers/net/enc28j60.c	/^static int enc_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
enc_write_macaddr	drivers/net/enc28j60.c	/^static int enc_write_macaddr(enc_dev_t *enc)$/;"	f	typeref:typename:int	file:
encode_bch	lib/bch.c	/^void encode_bch(struct bch_control *bch, const uint8_t *data,$/;"	f	typeref:typename:void
encode_bch_unaligned	lib/bch.c	/^static void encode_bch_unaligned(struct bch_control *bch,$/;"	f	typeref:typename:void	file:
encrypt_and_sign	arch/arm/mach-tegra/tegra20/crypto.c	/^static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src,$/;"	f	typeref:typename:int	file:
encryption	tools/zynqimage.c	/^	uint32_t encryption; \/* 0x28 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
encryption	tools/zynqmpimage.c	/^	uint32_t encryption; \/* 0x28 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
end	arch/arm/include/asm/setup.h	/^	unsigned long end;$/;"	m	struct:meminfo	typeref:typename:unsigned long
end	arch/blackfin/cpu/traps.c	/^	uint32_t start, end;$/;"	m	struct:memory_map	typeref:typename:uint32_t	file:
end	arch/m68k/cpu/u-boot.lds	/^	PROVIDE (end = .);$/;"	s
end	arch/nios2/cpu/u-boot.lds	/^	PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	arch/sparc/cpu/u-boot.lds	/^	PROVIDE (end = .);$/;"	s	assignment:provide
end	arch/sparc/lib/bootm.c	/^			unsigned int end;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned int	file:
end	arch/xtensa/include/asm/bootparam.h	/^	unsigned long end;$/;"	m	struct:meminfo	typeref:typename:unsigned long
end	board/amcc/canyonlands/u-boot-ram.lds	/^  PROVIDE (end = .);$/;"	s
end	board/amcc/sequoia/u-boot-ram.lds	/^  PROVIDE (end = .);$/;"	s
end	board/tqc/tqm8xx/u-boot.lds	/^  PROVIDE (end = .);$/;"	s
end	drivers/demo/demo-shape.c	/^		int end;$/;"	m	struct:shape_hello::shape	typeref:typename:int	file:
end	drivers/net/ep93xx_eth.h	/^	struct rx_descriptor *end;$/;"	m	struct:rx_descriptor_queue	typeref:struct:rx_descriptor *
end	drivers/net/ep93xx_eth.h	/^	struct rx_status *end;$/;"	m	struct:rx_status_queue	typeref:struct:rx_status *
end	drivers/net/ep93xx_eth.h	/^	struct tx_descriptor *end;$/;"	m	struct:tx_descriptor_queue	typeref:struct:tx_descriptor *
end	drivers/net/ep93xx_eth.h	/^	struct tx_status *end;$/;"	m	struct:tx_status_queue	typeref:struct:tx_status *
end	drivers/pci/pci_mvebu.c	/^	u32 end;$/;"	m	struct:resource	typeref:typename:u32	file:
end	drivers/video/console_truetype.c	/^	u8 *end;$/;"	m	struct:font_info	typeref:typename:u8 *	file:
end	include/circbuf.h	/^	char *end;		\/* end of data buffer *\/$/;"	m	struct:circbuf	typeref:typename:char *
end	include/dataflash.h	/^	unsigned long end;$/;"	m	struct:__anona98984760108	typeref:typename:unsigned long
end	include/fdtdec.h	/^	fdt_addr_t end;$/;"	m	struct:fdt_memory	typeref:typename:fdt_addr_t
end	include/fdtdec.h	/^	fdt_addr_t end;$/;"	m	struct:fdt_resource	typeref:typename:fdt_addr_t
end	include/image.h	/^	ulong		start, end;		\/* start\/end of blob *\/$/;"	m	struct:image_info	typeref:typename:ulong
end	include/libfdt.h	/^	char *end;			\/* Pointer to end of full node path *\/$/;"	m	struct:fdt_region_ptrs	typeref:typename:char *
end	include/linux/ioport.h	/^	resource_size_t end;$/;"	m	struct:resource	typeref:typename:resource_size_t
end	include/logbuff.h	/^			unsigned long	end;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30308	typeref:typename:unsigned long
end	include/membuff.h	/^	char *end;		\/** the end of the buffer (start + length) *\/$/;"	m	struct:membuff	typeref:typename:char *
end	include/sh_pfc.h	/^	pinmux_enum_t end;$/;"	m	struct:pinmux_range	typeref:typename:pinmux_enum_t
end	scripts/kconfig/zconf.y	/^end:	  T_ENDMENU T_EOL	{ $$ = $1; }$/;"	l	typeref:typename:id
endCondition_directive	lib/lz4.c	/^typedef enum { endOnOutputSize = 0, endOnInputSize = 1 } endCondition_directive;$/;"	t	typeref:enum:__anoneaf05ef60203	file:
endOnInputSize	lib/lz4.c	/^typedef enum { endOnOutputSize = 0, endOnInputSize = 1 } endCondition_directive;$/;"	e	enum:__anoneaf05ef60203	file:
endOnOutputSize	lib/lz4.c	/^typedef enum { endOnOutputSize = 0, endOnInputSize = 1 } endCondition_directive;$/;"	e	enum:__anoneaf05ef60203	file:
endPointer	include/mpc5xxx.h	/^	volatile u32 endPointer;	\/* SDMA + 0x08 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
endPtr	include/MCD_dma.h	/^	u32 endPtr;$/;"	m	struct:dmaRegs_s	typeref:typename:u32
end_addr	arch/powerpc/include/asm/fsl_pamu.h	/^	phys_addr_t end_addr[10];$/;"	m	struct:pamu_addr_tbl	typeref:typename:phys_addr_t[10]
end_addr	common/env_flash.c	/^static ulong end_addr = CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1;$/;"	v	typeref:typename:ulong	file:
end_addr_new	common/env_flash.c	/^static ulong end_addr_new = CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1;$/;"	v	typeref:typename:ulong	file:
end_address	include/dataflash.h	/^	unsigned long end_address;$/;"	m	struct:_AT91S_DATAFLASH_INFO	typeref:typename:unsigned long
end_align	arch/powerpc/cpu/mpc5xxx/spl_boot.c	/^u32 end_align __attribute__ ((section(".end_align")));$/;"	v	typeref:typename:u32
end_block	fs/yaffs2/yaffs_guts.h	/^	int end_block;		\/* End block we're allowed to use *\/$/;"	m	struct:yaffs_param	typeref:typename:int
end_block	fs/yaffs2/yaffs_nandif.h	/^	unsigned end_block;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
end_bus_number	arch/x86/include/asm/acpi_table.h	/^	u8 end_bus_number;$/;"	m	struct:acpi_mcfg_mmconfig	typeref:typename:u8
end_cyl	disk/part_dos.h	/^	unsigned char end_cyl;		\/* end cylinder				*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
end_cyl	include/part_efi.h	/^	u8 end_cyl;		\/* end cylinder *\/$/;"	m	struct:partition	typeref:typename:u8
end_dialog	scripts/kconfig/lxdialog/util.c	/^void end_dialog(int x, int y)$/;"	f	typeref:typename:void
end_flush_dcache	arch/nds32/cpu/n1213/start.S	/^end_flush_dcache:$/;"	l
end_flush_icache	arch/nds32/cpu/n1213/start.S	/^end_flush_icache:$/;"	l
end_head	disk/part_dos.h	/^	unsigned char end_head;		\/* end head				*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
end_head	include/part_efi.h	/^	u8 end_head;		\/* end head *\/$/;"	m	struct:partition	typeref:typename:u8
end_if	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u32 start_if = 0, end_if = (MAX_INTERFACE_NUM - 1);$/;"	v	typeref:typename:u32
end_name_hash	fs/jffs2/jffs2_nand_private.h	/^static inline unsigned long end_name_hash(unsigned long hash)$/;"	f	typeref:typename:unsigned long
end_of_hob	arch/x86/include/asm/fsp/fsp_hob.h	/^static inline bool end_of_hob(const struct hob_header *hdr)$/;"	f	typeref:typename:bool
end_of_int_ind	drivers/video/da8xx-fb.c	/^	u32	end_of_int_ind;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
end_pattern	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u32 start_pattern = PATTERN_KILLER_DQ0, end_pattern = PATTERN_KILLER_DQ7;$/;"	v	typeref:typename:u32
end_point	drivers/usb/musb-new/musb_gadget.h	/^	struct usb_ep			end_point;$/;"	m	struct:musb_ep	typeref:struct:usb_ep
end_reached	scripts/kconfig/lxdialog/textbox.c	/^static int begin_reached, end_reached, page_length;$/;"	v	typeref:typename:int	file:
end_section	test/py/multiplexed_log.py	/^    def end_section(self, marker):$/;"	m	class:Logfile
end_sector	disk/part_dos.h	/^	unsigned char end_sector;	\/* end sector				*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
end_sector	include/part_efi.h	/^	u8 end_sector;		\/* end sector *\/$/;"	m	struct:partition	typeref:typename:u8
end_tag	board/raspberrypi/rpi/rpi.c	/^	u32 end_tag;$/;"	m	struct:msg_get_arm_mem	typeref:typename:u32	file:
end_tag	board/raspberrypi/rpi/rpi.c	/^	u32 end_tag;$/;"	m	struct:msg_get_board_rev	typeref:typename:u32	file:
end_tag	board/raspberrypi/rpi/rpi.c	/^	u32 end_tag;$/;"	m	struct:msg_get_board_serial	typeref:typename:u32	file:
end_tag	board/raspberrypi/rpi/rpi.c	/^	u32 end_tag;$/;"	m	struct:msg_get_clock_rate	typeref:typename:u32	file:
end_tag	board/raspberrypi/rpi/rpi.c	/^	u32 end_tag;$/;"	m	struct:msg_get_mac_address	typeref:typename:u32	file:
end_tag	board/raspberrypi/rpi/rpi.c	/^	u32 end_tag;$/;"	m	struct:msg_set_power_state	typeref:typename:u32	file:
end_tag	drivers/video/bcm2835.c	/^	u32 end_tag;$/;"	m	struct:msg_query	typeref:typename:u32	file:
end_tag	drivers/video/bcm2835.c	/^	u32 end_tag;$/;"	m	struct:msg_setup	typeref:typename:u32	file:
endian	fs/zfs/zfs.c	/^	zfs_endian_t endian;$/;"	m	struct:dnode_end	typeref:typename:zfs_endian_t	file:
endian_test	tools/pblimage.c	/^} endian_test = { {'l', '?', '?', 'b'} };$/;"	v	typeref:union:__anon5825b7b7010a
endiancr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 endiancr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
endictl0	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	endictl0;$/;"	m	struct:pcie_system_bus_regs	typeref:typename:unsigned int
endictl1	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	endictl1;$/;"	m	struct:pcie_system_bus_regs	typeref:typename:unsigned int
ending_lba	include/part_efi.h	/^	__le64 ending_lba;$/;"	m	struct:_gpt_entry	typeref:typename:__le64
endofpacket	drivers/serial/altera_uart.c	/^	u32	endofpacket;	\/* End-of-packet reg *\/$/;"	m	struct:altera_uart_regs	typeref:typename:u32	file:
endp_bsorfn	include/usb/designware_udc.h	/^	u32 endp_bsorfn;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
endp_cntl	include/usb/designware_udc.h	/^	u32 endp_cntl;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
endp_desc_point	include/usb/designware_udc.h	/^	u32 endp_desc_point;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
endp_int	include/usb/designware_udc.h	/^	u32 endp_int;$/;"	m	struct:udc_regs	typeref:typename:u32
endp_int_mask	include/usb/designware_udc.h	/^	u32 endp_int_mask;$/;"	m	struct:udc_regs	typeref:typename:u32
endp_maxpacksize	include/usb/designware_udc.h	/^	u32 endp_maxpacksize;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
endp_status	include/usb/designware_udc.h	/^	u32 endp_status;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
endpoint	drivers/usb/dwc3/core.h	/^	struct usb_ep		endpoint;$/;"	m	struct:dwc3_ep	typeref:struct:usb_ep
endpoint	drivers/usb/host/ehci-hcd.c	/^	struct usb_endpoint_descriptor endpoint;$/;"	m	struct:descriptor	typeref:struct:usb_endpoint_descriptor	file:
endpoint	drivers/usb/host/xhci.c	/^	struct usb_endpoint_descriptor endpoint;$/;"	m	struct:descriptor	typeref:struct:usb_endpoint_descriptor	file:
endpoint	include/usbdescriptors.h	/^		struct usb_endpoint_descriptor endpoint;$/;"	m	union:usb_descriptor::__anon028dca6a010a	typeref:struct:usb_endpoint_descriptor
endpoint	include/usbdevice.h	/^	struct usb_endpoint_instance *endpoint;$/;"	m	struct:urb	typeref:struct:usb_endpoint_instance *
endpoint_address	include/usbdevice.h	/^	int endpoint_address;	\/* logical endpoint address *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
endpoint_array	include/usbdevice.h	/^	struct usb_endpoint_instance *endpoint_array;	\/* array of available configured endpoints *\/$/;"	m	struct:usb_bus_instance	typeref:struct:usb_endpoint_instance *
endpoint_event	drivers/usb/dwc3/core.h	/^	u32	endpoint_event:4;$/;"	m	struct:dwc3_event_depevt	typeref:typename:u32:4
endpoint_instance	drivers/serial/usbtty.c	/^static struct usb_endpoint_instance endpoint_instance[NUM_ENDPOINTS+1];$/;"	v	typeref:struct:usb_endpoint_instance[]	file:
endpoint_number	drivers/usb/dwc3/core.h	/^	u32	endpoint_number:5;$/;"	m	struct:dwc3_event_depevt	typeref:typename:u32:5
endpoint_parameter_block_pointer	include/usb/mpc8xx_udc.h	/^typedef struct endpoint_parameter_block_pointer{$/;"	s
endpoint_transfersize_array	include/usbdevice.h	/^	int *endpoint_transfersize_array;$/;"	m	struct:usb_alternate_instance	typeref:typename:int *
endpoints	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile usb_epb_t *endpoints[MAX_ENDPOINTS];$/;"	v	typeref:typename:volatile usb_epb_t * []	file:
endpoints	drivers/usb/musb-new/musb_core.h	/^	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];$/;"	m	struct:musb	typeref:struct:musb_hw_ep[]
endpoints	include/usbdevice.h	/^	int endpoints;$/;"	m	struct:usb_alternate_instance	typeref:typename:int
endpoints_descriptor_array	include/usbdevice.h	/^	struct usb_endpoint_descriptor **endpoints_descriptor_array;$/;"	m	struct:usb_alternate_instance	typeref:struct:usb_endpoint_descriptor **
endpt	fs/ubifs/ubifs.h	/^	int endpt;$/;"	m	struct:ubifs_scan_leb	typeref:typename:int
endpt	fs/ubifs/ubifs.h	/^	int endpt;$/;"	m	struct:ubifs_unclean_leb	typeref:typename:int
endpt_nak	arch/arm/include/asm/arch-tegra/usb.h	/^	uint endpt_nak;$/;"	m	struct:usb_ctlr	typeref:typename:uint
endpt_nak_enable	arch/arm/include/asm/arch-tegra/usb.h	/^	uint endpt_nak_enable;$/;"	m	struct:usb_ctlr	typeref:typename:uint
endpt_setup_stat	arch/arm/include/asm/arch-tegra/usb.h	/^	uint endpt_setup_stat;$/;"	m	struct:usb_ctlr	typeref:typename:uint
endtick	include/cli.h	/^#define endtick(/;"	d
endtime	common/bootretry.c	/^static uint64_t endtime;  \/* must be set, default is instant timeout *\/$/;"	v	typeref:typename:uint64_t	file:
enet0	arch/xtensa/dts/xtfpga.dtsi	/^		enet0: ethoc@0d030000 {$/;"	l
enetInt	drivers/net/4xx_enet.c	/^int enetInt (struct eth_device *dev)$/;"	f	typeref:typename:int
enet_addr_type	drivers/qe/uec.h	/^typedef enum enet_addr_type {$/;"	g
enet_addr_type_e	drivers/qe/uec.h	/^} enet_addr_type_e;$/;"	t	typeref:enum:enet_addr_type
enet_data	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned char	enet_data[1];$/;"	m	struct:enet_frame	typeref:typename:unsigned char[1]
enet_frame	arch/powerpc/include/asm/ppc4xx-emac.h	/^struct enet_frame {$/;"	s
enet_freq	arch/arm/include/asm/arch-mx6/clock.h	/^enum enet_freq {$/;"	g
enet_freq	arch/arm/include/asm/arch-mx7/clock.h	/^enum enet_freq {$/;"	g
enet_if	drivers/net/fm/fm.h	/^	phy_interface_t enet_if;$/;"	m	struct:fm_eth	typeref:typename:phy_interface_t
enet_if	include/fm_eth.h	/^	phy_interface_t enet_if;$/;"	m	struct:fm_eth_info	typeref:typename:phy_interface_t
enet_if	include/fsl-mc/ldpaa_wriop.h	/^	phy_interface_t enet_if;$/;"	m	struct:wriop_dpmac_info	typeref:typename:phy_interface_t
enet_if	include/vsc9953.h	/^	phy_interface_t	enet_if;$/;"	m	struct:vsc9953_port_info	typeref:typename:phy_interface_t
enet_interface_type	drivers/qe/uec.h	/^	phy_interface_t			enet_interface_type;$/;"	m	struct:uec_info	typeref:typename:phy_interface_t
enet_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/aristainetos/aristainetos-v1.c	/^iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads	board/bachmann/ot1200/ot1200.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads	board/compulab/cm_fx6/cm_fx6.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads	board/engicam/icorem6/icorem6.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/freescale/mx6qarm2/mx6qarm2.c	/^iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/gateworks/gw_ventana/gw_ventana.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/seco/common/mx6.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/tqc/tqma6/tqma6_wru4.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads	board/wandboard/wandboard.c	/^static iomux_v3_cfg_t const enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads1	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const enet_pads1[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads1	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t const enet_pads1[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads1	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const enet_pads1[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads1	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t enet_pads1[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
enet_pads1	board/udoo/udoo.c	/^static iomux_v3_cfg_t const enet_pads1[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads2	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const enet_pads2[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads2	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t const enet_pads2[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
enet_pads2	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const enet_pads2[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads2	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t enet_pads2[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
enet_pads2	board/udoo/udoo.c	/^static iomux_v3_cfg_t const enet_pads2[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
enet_pads_ar8035	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t enet_pads_ar8035[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
enet_pads_final_ksz9031	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t enet_pads_final_ksz9031[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
enet_pads_ksz9031	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t enet_pads_ksz9031[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
enet_pin_mux	board/ti/ti814x/mux.c	/^static struct module_pin_mux enet_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
enet_pll	arch/nios2/dts/10m50_devboard.dts	/^		enet_pll: clock@0 {$/;"	l	label:sopc0
enet_pll_c0	arch/nios2/dts/10m50_devboard.dts	/^			enet_pll_c0: enet_pll_c0 {$/;"	l	label:sopc0.enet_pll
enet_pll_c1	arch/nios2/dts/10m50_devboard.dts	/^			enet_pll_c1: enet_pll_c1 {$/;"	l	label:sopc0.enet_pll
enet_pll_c2	arch/nios2/dts/10m50_devboard.dts	/^			enet_pll_c2: enet_pll_c2 {$/;"	l	label:sopc0.enet_pll
enet_rcv	drivers/net/4xx_enet.c	/^static void enet_rcv (struct eth_device *dev, unsigned long malisr)$/;"	f	typeref:typename:void	file:
enet_speed	drivers/qe/uec.h	/^typedef enum enet_speed {$/;"	g
enet_speed_e	drivers/qe/uec.h	/^} enet_speed_e;$/;"	t	typeref:enum:enet_speed
enet_tbi_mii_reg	drivers/qe/uec.h	/^typedef enum enet_tbi_mii_reg {$/;"	g
enet_tbi_mii_reg_e	drivers/qe/uec.h	/^} enet_tbi_mii_reg_e;$/;"	t	typeref:enum:enet_tbi_mii_reg
enet_type	drivers/qe/uccf.h	/^typedef enum enet_type {$/;"	g
enet_type_e	drivers/qe/uccf.h	/^} enet_type_e;$/;"	t	typeref:enum:enet_type
enetaddr	include/net.h	/^	unsigned char enetaddr[6];$/;"	m	struct:eth_device	typeref:typename:unsigned char[6]
enetaddr	include/net.h	/^	unsigned char enetaddr[6];$/;"	m	struct:eth_pdata	typeref:typename:unsigned char[6]
enext	fs/ubifs/ubifs.h	/^	struct ubifs_znode *enext;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_znode *
eng_str	arch/arm/imx-common/hab.c	/^char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\\n",$/;"	v	typeref:typename:char * []
engsetting_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 engsetting_params_sn20[]	= {0x00, 0x00, 0x00, 0x00, 0x00, 0x20};$/;"	v	typeref:typename:u16[]	file:
enh_size	include/mmc.h	/^		uint enh_size;	\/* in 512-byte sectors, if 0 no enh area *\/$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0208	typeref:typename:uint
enh_start	include/mmc.h	/^		uint enh_start;	\/* in 512-byte sectors *\/$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0208	typeref:typename:uint
enh_user_size	include/mmc.h	/^	u64 enh_user_size;$/;"	m	struct:mmc	typeref:typename:u64
enh_user_start	include/mmc.h	/^	u64 enh_user_start;$/;"	m	struct:mmc	typeref:typename:u64
enhanced	include/mmc.h	/^		unsigned enhanced : 1;$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0308	typeref:typename:unsigned:1
enhanced_framing	drivers/video/tegra124/sor.h	/^	int	enhanced_framing;$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
enq_seg	drivers/usb/host/xhci.h	/^	struct xhci_segment	*enq_seg;$/;"	m	struct:xhci_ring	typeref:struct:xhci_segment *
enqueue	drivers/usb/host/xhci.h	/^	union  xhci_trb		*enqueue;$/;"	m	struct:xhci_ring	typeref:union:xhci_trb *
enr	drivers/spi/rk_spi.h	/^	u32 enr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
enr	drivers/spi/zynq_qspi.c	/^	u32 enr;	\/* 0x14 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
enr	drivers/spi/zynq_spi.c	/^	u32 enr;	\/* 0x14 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
ensure_spawned	test/py/u_boot_console_base.py	/^    def ensure_spawned(self):$/;"	m	class:ConsoleBase
ensure_wear_leveling	drivers/mtd/ubi/wl.c	/^static int ensure_wear_leveling(struct ubi_device *ubi, int nested)$/;"	f	typeref:typename:int	file:
enter	arch/arm/lib/memcpy.S	/^	.macro enter reg1 reg2$/;"	m
enter_acpi_mode	arch/x86/lib/acpi_table.c	/^static void enter_acpi_mode(int pm1_cnt)$/;"	f	typeref:typename:void	file:
enter_protected_mode	arch/x86/lib/bios_asm.S	/^.macro	enter_protected_mode$/;"	m
enter_real_mode	arch/x86/lib/bios_asm.S	/^.macro	enter_real_mode$/;"	m
entity_system	scripts/docproc.c	/^FILELINE * entity_system;$/;"	v	typeref:typename:FILELINE *
entries	arch/x86/cpu/coreboot/timestamp.c	/^	struct timestamp_entry entries[0]; \/* Variable number of entries *\/$/;"	m	struct:timestamp_table	typeref:struct:timestamp_entry[0]	file:
entries	drivers/usb/host/xhci.h	/^	struct xhci_erst_entry	*entries;$/;"	m	struct:xhci_erst	typeref:struct:xhci_erst_entry *
entries	include/blk.h	/^	unsigned entries; \/* current entry count *\/$/;"	m	struct:block_cache_stats	typeref:typename:unsigned
entries	include/vxworks.h	/^	u32 entries;	\/* e820 table entry count *\/$/;"	m	struct:e820info	typeref:typename:u32
entries	scripts/kconfig/expr.h	/^	struct list_head entries;$/;"	m	struct:jump_key	typeref:struct:list_head
entries	scripts/kconfig/mconf.c	/^	struct list_head entries;$/;"	m	struct:subtitle_part	typeref:struct:list_head	file:
entry	arch/arm/include/asm/arch-mx7/clock.h	/^	enum clk_root_index entry;$/;"	m	struct:clk_root_map	typeref:enum:clk_root_index
entry	arch/x86/include/asm/acpi_table.h	/^	u32 entry[MAX_ACPI_TABLES];$/;"	m	struct:acpi_rsdt	typeref:typename:u32[]
entry	arch/x86/include/asm/acpi_table.h	/^	u64 entry[MAX_ACPI_TABLES];$/;"	m	struct:acpi_xsdt	typeref:typename:u64[]
entry	drivers/core/devres.c	/^	struct list_head		entry;$/;"	m	struct:devres	typeref:struct:list_head	file:
entry	drivers/qe/uec.h	/^	uec_rx_interrupt_coalescing_entry_t   entry[MAX_RX_QUEUES];$/;"	m	struct:uec_rx_interrupt_coalescing_table	typeref:typename:uec_rx_interrupt_coalescing_entry_t[]
entry	drivers/usb/host/xhci.h	/^	struct xhci_erst_entry entry[ERST_NUM_SEGS];$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_erst_entry[]
entry	include/qfw.h	/^	struct list_head *entry; \/* structure to iterate file list *\/$/;"	m	struct:fw_cfg_file_iter	typeref:struct:list_head *
entry	include/search.h	/^typedef struct entry {$/;"	s
entry	lib/hashtable.c	/^	ENTRY entry;$/;"	m	struct:_ENTRY	typeref:typename:ENTRY	file:
entry	tools/ifdtool.h	/^	struct vscc_t entry[8];$/;"	m	struct:vtba_t	typeref:struct:vscc_t[8]
entry	tools/imximage.h	/^	uint32_t entry;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
entry	tools/mxsimage.h	/^	uint32_t	entry;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
entry	tools/ublimage.h	/^	uint32_t	entry;	\/* entry point address for bootloader *\/$/;"	m	struct:ubl_header	typeref:typename:uint32_t
entry_count	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	entry_count;$/;"	m	struct:qm_reg_queue	typeref:typename:u32
entry_id	arch/x86/cpu/coreboot/timestamp.c	/^	uint32_t	entry_id;$/;"	m	struct:timestamp_entry	typeref:typename:uint32_t	file:
entry_lim	include/vsc9953.h	/^	u32	entry_lim[11];$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32[11]
entry_point	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 entry_point;	\/* execution address of the wb code *\/$/;"	m	struct:wb_header	typeref:typename:u32
entry_point	include/spl.h	/^	u32 entry_point;$/;"	m	struct:spl_image_info	typeref:typename:u32
entry_point_rev	include/smbios.h	/^	u8 entry_point_rev;$/;"	m	struct:smbios_entry	typeref:typename:u8
entry_regs	common/kgdb.c	/^static struct pt_regs entry_regs;$/;"	v	typeref:struct:pt_regs	file:
entry_stamp	arch/x86/cpu/coreboot/timestamp.c	/^	uint64_t	entry_stamp;$/;"	m	struct:timestamp_entry	typeref:typename:uint64_t	file:
entry_start	arch/x86/lib/sfi.c	/^	u32 entry_start;$/;"	m	struct:table_info	typeref:typename:u32	file:
entry_start	include/video_console.h	/^	int (*entry_start)(struct udevice *dev);$/;"	m	struct:vidconsole_ops	typeref:typename:int (*)(struct udevice * dev)
entry_to_target_mode	board/freescale/s32v234evb/clock.c	/^static void entry_to_target_mode(u32 mode)$/;"	f	typeref:typename:void	file:
entrypoint	cmd/armflash.c	/^	u32 entrypoint;$/;"	m	struct:afs_image	typeref:typename:u32	file:
ents	include/mtd/ubi-user.h	/^	} ents[UBI_MAX_RNVOL];$/;"	m	struct:ubi_rnvol_req	typeref:struct:ubi_rnvol_req::__anon7822496e0308[]
enum_ended	api/api_storage.c	/^	int		enum_ended;$/;"	m	struct:stor_spec	typeref:typename:int	file:
enum_id	include/sh_pfc.h	/^	pinmux_enum_t enum_id;$/;"	m	struct:pinmux_gpio	typeref:typename:pinmux_enum_t
enum_ids	include/sh_pfc.h	/^	pinmux_enum_t *enum_ids;$/;"	m	struct:pinmux_cfg_reg	typeref:typename:pinmux_enum_t *
enum_ids	include/sh_pfc.h	/^	pinmux_enum_t *enum_ids;$/;"	m	struct:pinmux_data_reg	typeref:typename:pinmux_enum_t *
enum_ids	include/sh_pfc.h	/^	pinmux_enum_t *enum_ids;$/;"	m	struct:pinmux_irq	typeref:typename:pinmux_enum_t *
enum_in_range	drivers/gpio/sh_pfc.c	/^static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)$/;"	f	typeref:typename:int	file:
enum_started	api/api_storage.c	/^	int		enum_started;$/;"	m	struct:stor_spec	typeref:typename:int	file:
env	Makefile	/^env: scripts_basic$/;"	t
env_addr	include/asm-generic/global_data.h	/^	unsigned long env_addr;		\/* Address  of Environment struct *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
env_aes_cbc_crypt	common/env_common.c	/^static inline int env_aes_cbc_crypt(env_t *env, const int enc)$/;"	f	typeref:typename:int	file:
env_aes_cbc_crypt	common/env_common.c	/^static int env_aes_cbc_crypt(env_t *env, const int enc)$/;"	f	typeref:typename:int	file:
env_aes_cbc_crypt	tools/env/fw_env.c	/^static int env_aes_cbc_crypt(char *payload, const int enc, uint8_t *key)$/;"	f	typeref:typename:int	file:
env_aes_cbc_get_key	common/env_common.c	/^__weak uint8_t *env_aes_cbc_get_key(void)$/;"	f	typeref:typename:__weak uint8_t *
env_attr_lookup	common/env_attr.c	/^int env_attr_lookup(const char *attr_list, const char *name, char *attributes)$/;"	f	typeref:typename:int
env_attr_walk	common/env_attr.c	/^int env_attr_walk(const char *attr_list,$/;"	f	typeref:typename:int
env_buf	include/asm-generic/global_data.h	/^	char env_buf[32];		\/* buffer for getenv() before reloc. *\/$/;"	m	struct:global_data	typeref:typename:char[32]
env_callback_init	common/env_callback.c	/^void env_callback_init(ENTRY *var_entry)$/;"	f	typeref:typename:void
env_clbk_tbl	include/env_callback.h	/^struct env_clbk_tbl {$/;"	s
env_complete	common/env_common.c	/^int env_complete(char *var, int maxv, char *cmdv[], int bufsz, char *buf)$/;"	f	typeref:typename:int
env_export	common/env_common.c	/^int env_export(env_t *env_out)$/;"	f	typeref:typename:int
env_flags	common/env_mmc.c	/^static unsigned char env_flags;$/;"	v	typeref:typename:unsigned char	file:
env_flags	common/env_nand.c	/^static unsigned char env_flags;$/;"	v	typeref:typename:unsigned char	file:
env_flags	common/env_ubi.c	/^static unsigned char env_flags;$/;"	v	typeref:typename:unsigned char	file:
env_flags_get_type	common/env_flags.c	/^enum env_flags_vartype env_flags_get_type(const char *name)$/;"	f	typeref:enum:env_flags_vartype
env_flags_get_varaccess	common/env_flags.c	/^enum env_flags_varaccess env_flags_get_varaccess(const char *name)$/;"	f	typeref:enum:env_flags_varaccess
env_flags_get_varaccess_name	common/env_flags.c	/^const char *env_flags_get_varaccess_name(enum env_flags_varaccess access)$/;"	f	typeref:typename:const char *
env_flags_get_vartype_name	common/env_flags.c	/^const char *env_flags_get_vartype_name(enum env_flags_vartype type)$/;"	f	typeref:typename:const char *
env_flags_init	common/env_flags.c	/^void env_flags_init(ENTRY *var_entry)$/;"	f	typeref:typename:void
env_flags_lookup	common/env_flags.c	/^static inline int env_flags_lookup(const char *flags_list, const char *name,$/;"	f	typeref:typename:int	file:
env_flags_parse_varaccess	common/env_flags.c	/^enum env_flags_varaccess env_flags_parse_varaccess(const char *flags)$/;"	f	typeref:enum:env_flags_varaccess
env_flags_parse_varaccess_from_binflags	common/env_flags.c	/^enum env_flags_varaccess env_flags_parse_varaccess_from_binflags(int binflags)$/;"	f	typeref:enum:env_flags_varaccess
env_flags_parse_vartype	common/env_flags.c	/^enum env_flags_vartype env_flags_parse_vartype(const char *flags)$/;"	f	typeref:enum:env_flags_vartype
env_flags_print_varaccess	common/env_flags.c	/^void env_flags_print_varaccess(void)$/;"	f	typeref:typename:void
env_flags_print_vartypes	common/env_flags.c	/^void env_flags_print_vartypes(void)$/;"	f	typeref:typename:void
env_flags_validate	common/env_flags.c	/^int env_flags_validate(const ENTRY *item, const char *newval, enum env_op op,$/;"	f	typeref:typename:int
env_flags_validate_env_set_params	common/env_flags.c	/^int env_flags_validate_env_set_params(char *name, char * const val[], int count)$/;"	f	typeref:typename:int
env_flags_validate_type	common/env_flags.c	/^int env_flags_validate_type(const char *name, const char *value)$/;"	f	typeref:typename:int
env_flags_validate_varaccess	common/env_flags.c	/^int env_flags_validate_varaccess(const char *name, int check_mask)$/;"	f	typeref:typename:int
env_flags_varaccess	include/env_flags.h	/^enum env_flags_varaccess {$/;"	g
env_flags_varaccess_any	include/env_flags.h	/^	env_flags_varaccess_any,$/;"	e	enum:env_flags_varaccess
env_flags_varaccess_changedefault	include/env_flags.h	/^	env_flags_varaccess_changedefault,$/;"	e	enum:env_flags_varaccess
env_flags_varaccess_end	include/env_flags.h	/^	env_flags_varaccess_end$/;"	e	enum:env_flags_varaccess
env_flags_varaccess_mask	common/env_flags.c	/^static const int env_flags_varaccess_mask[] = {$/;"	v	typeref:typename:const int[]	file:
env_flags_varaccess_names	common/env_flags.c	/^static const char * const env_flags_varaccess_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
env_flags_varaccess_readonly	include/env_flags.h	/^	env_flags_varaccess_readonly,$/;"	e	enum:env_flags_varaccess
env_flags_varaccess_rep	common/env_flags.c	/^static const char env_flags_varaccess_rep[] = "aroc";$/;"	v	typeref:typename:const char[]	file:
env_flags_varaccess_writeonce	include/env_flags.h	/^	env_flags_varaccess_writeonce,$/;"	e	enum:env_flags_varaccess
env_flags_vartype	include/env_flags.h	/^enum env_flags_vartype {$/;"	g
env_flags_vartype_bool	include/env_flags.h	/^	env_flags_vartype_bool,$/;"	e	enum:env_flags_vartype
env_flags_vartype_decimal	include/env_flags.h	/^	env_flags_vartype_decimal,$/;"	e	enum:env_flags_vartype
env_flags_vartype_end	include/env_flags.h	/^	env_flags_vartype_end$/;"	e	enum:env_flags_vartype
env_flags_vartype_hex	include/env_flags.h	/^	env_flags_vartype_hex,$/;"	e	enum:env_flags_vartype
env_flags_vartype_ipaddr	include/env_flags.h	/^	env_flags_vartype_ipaddr,$/;"	e	enum:env_flags_vartype
env_flags_vartype_macaddr	include/env_flags.h	/^	env_flags_vartype_macaddr,$/;"	e	enum:env_flags_vartype
env_flags_vartype_names	common/env_flags.c	/^static const char * const env_flags_vartype_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
env_flags_vartype_rep	common/env_flags.c	/^static const char env_flags_vartype_rep[] = "sdxb" ENV_FLAGS_NET_VARTYPE_REPS;$/;"	v	typeref:typename:const char[]	file:
env_flags_vartype_string	include/env_flags.h	/^	env_flags_vartype_string,$/;"	e	enum:env_flags_vartype
env_flash	common/env_sf.c	/^static struct spi_flash *env_flash;$/;"	v	typeref:struct:spi_flash *	file:
env_get_addr	common/env_common.c	/^const uchar *env_get_addr(int index)$/;"	f	typeref:typename:const uchar *
env_get_char	common/env_common.c	/^uchar env_get_char(int index)$/;"	f	typeref:typename:uchar
env_get_char_init	common/env_common.c	/^static uchar env_get_char_init(int index)$/;"	f	typeref:typename:uchar	file:
env_get_char_memory	common/env_common.c	/^uchar env_get_char_memory(int index)$/;"	f	typeref:typename:uchar
env_get_char_spec	common/env_common.c	/^__weak uchar env_get_char_spec(int index)$/;"	f	typeref:typename:__weak uchar
env_get_char_spec	common/env_dataflash.c	/^uchar env_get_char_spec(int index)$/;"	f	typeref:typename:uchar
env_get_char_spec	common/env_eeprom.c	/^uchar env_get_char_spec(int index)$/;"	f	typeref:typename:uchar
env_get_char_spec	common/env_nvram.c	/^uchar env_get_char_spec(int index)$/;"	f	typeref:typename:uchar
env_help_text	cmd/nvedit.c	/^static char env_help_text[] =$/;"	v	typeref:typename:char[]	file:
env_htab	common/env_common.c	/^struct hsearch_data env_htab = {$/;"	v	typeref:struct:hsearch_data
env_id	cmd/nvedit.c	/^static int env_id = 1;$/;"	v	typeref:typename:int	file:
env_image_redundant	tools/env/fw_env.c	/^struct env_image_redundant {$/;"	s	file:
env_image_single	tools/env/fw_env.c	/^struct env_image_single {$/;"	s	file:
env_import	common/env_common.c	/^int env_import(const char *buf, int check)$/;"	f	typeref:typename:int
env_init	common/env_dataflash.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_eeprom.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_ext4.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_fat.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_flash.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_mmc.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_nand.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_nowhere.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_nvram.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_onenand.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_remote.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_sata.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_sf.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_init	common/env_ubi.c	/^int env_init(void)$/;"	f	typeref:typename:int
env_location	common/env_nand.c	/^struct env_location {$/;"	s	file:
env_mmc_orig_hwpart	common/env_mmc.c	/^static unsigned char env_mmc_orig_hwpart;$/;"	v	typeref:typename:unsigned char	file:
env_name	examples/api/glue.c	/^static char env_name[256];$/;"	v	typeref:typename:char[256]	file:
env_name_spec	common/env_dataflash.c	/^char *env_name_spec = "dataflash";$/;"	v	typeref:typename:char *
env_name_spec	common/env_eeprom.c	/^char *env_name_spec = "EEPROM";$/;"	v	typeref:typename:char *
env_name_spec	common/env_ext4.c	/^char *env_name_spec = "EXT4";$/;"	v	typeref:typename:char *
env_name_spec	common/env_fat.c	/^char *env_name_spec = "FAT";$/;"	v	typeref:typename:char *
env_name_spec	common/env_flash.c	/^char *env_name_spec = "Flash";$/;"	v	typeref:typename:char *
env_name_spec	common/env_mmc.c	/^char *env_name_spec = "MMC";$/;"	v	typeref:typename:char *
env_name_spec	common/env_nand.c	/^char *env_name_spec = "NAND";$/;"	v	typeref:typename:char *
env_name_spec	common/env_nvram.c	/^char *env_name_spec = "NVRAM";$/;"	v	typeref:typename:char *
env_name_spec	common/env_onenand.c	/^char *env_name_spec = "OneNAND";$/;"	v	typeref:typename:char *
env_name_spec	common/env_remote.c	/^char *env_name_spec = "Remote";$/;"	v	typeref:typename:char *
env_name_spec	common/env_sata.c	/^char *env_name_spec = "SATA";$/;"	v	typeref:typename:char *
env_name_spec	common/env_sf.c	/^char *env_name_spec = "SPI Flash";$/;"	v	typeref:typename:char *
env_name_spec	common/env_ubi.c	/^char *env_name_spec = "UBI";$/;"	v	typeref:typename:char *
env_new_offset	common/env_sf.c	/^static ulong env_new_offset	= CONFIG_ENV_OFFSET_REDUND;$/;"	v	typeref:typename:ulong	file:
env_offset	common/env_sf.c	/^static ulong env_offset		= CONFIG_ENV_OFFSET;$/;"	v	typeref:typename:ulong	file:
env_op	include/search.h	/^enum env_op {$/;"	g
env_op_create	include/search.h	/^	env_op_create,$/;"	e	enum:env_op
env_op_delete	include/search.h	/^	env_op_delete,$/;"	e	enum:env_op
env_op_overwrite	include/search.h	/^	env_op_overwrite,$/;"	e	enum:env_op
env_opts	tools/env/fw_env.h	/^struct env_opts {$/;"	s
env_opts	tools/env/fw_env_main.c	/^static struct env_opts env_opts;$/;"	v	typeref:struct:env_opts	file:
env_parse_displaytype	board/compulab/common/omap3_display.c	/^static enum display_type env_parse_displaytype(char *displaytype)$/;"	f	typeref:enum:display_type	file:
env_parse_flags_to_bin	common/env_flags.c	/^static int env_parse_flags_to_bin(const char *flags)$/;"	f	typeref:typename:int	file:
env_print	cmd/nvedit.c	/^static int env_print(char *name, int flag)$/;"	f	typeref:typename:int	file:
env_ptr	common/env_dataflash.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_eeprom.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_ext4.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_fat.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_flash.c	/^env_t *env_ptr = &environment;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_flash.c	/^env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_mmc.c	/^env_t *env_ptr = &environment;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_mmc.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_nand.c	/^env_t *env_ptr = &environment;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_nand.c	/^env_t *env_ptr = (env_t *)CONFIG_NAND_ENV_DST;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_nand.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_nowhere.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_nvram.c	/^env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_nvram.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_remote.c	/^env_t *env_ptr = &environment;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_remote.c	/^env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;$/;"	v	typeref:typename:env_t *
env_ptr	common/env_ubi.c	/^env_t *env_ptr;$/;"	v	typeref:typename:env_t *
env_reloc	cmd/nvedit.c	/^void env_reloc(void)$/;"	f	typeref:typename:void
env_relocate	common/env_common.c	/^void env_relocate(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_dataflash.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_eeprom.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_ext4.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_fat.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_flash.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_mmc.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_nand.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_nowhere.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_nvram.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_onenand.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_remote.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_sata.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_sf.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_relocate_spec	common/env_ubi.c	/^void env_relocate_spec(void)$/;"	f	typeref:typename:void
env_sectors	tools/env/fw_env.c	/^	ulong env_sectors;		\/* number of environment sectors *\/$/;"	m	struct:envdev_s	typeref:typename:ulong	file:
env_setting	board/overo/overo.c	/^	char env_setting[64];$/;"	m	struct:__anona18b42d20108	typeref:typename:char[64]	file:
env_setting	board/ti/beagle/beagle.c	/^	char env_setting[64];$/;"	m	struct:__anon1bf8eac80108	typeref:typename:char[64]	file:
env_size	tools/env/fw_env.c	/^	ulong env_size;			\/* environment size *\/$/;"	m	struct:envdev_s	typeref:typename:ulong	file:
env_t	include/environment.h	/^} env_t$/;"	t	typeref:struct:environment_s
env_test_attrs_lookup	test/env/attr.c	/^static int env_test_attrs_lookup(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
env_test_attrs_lookup_regex	test/env/attr.c	/^static int env_test_attrs_lookup_regex(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
env_valid	include/asm-generic/global_data.h	/^	unsigned long env_valid;	\/* Checksum of Environment valid? *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
env_var	board/gumstix/pepper/board.h	/^	char env_var[16];$/;"	m	struct:pepper_board_id	typeref:typename:char[16]
env_var	board/overo/overo.c	/^	char env_var[16];$/;"	m	struct:__anona18b42d20108	typeref:typename:char[16]	file:
env_var	board/ti/beagle/beagle.c	/^	char env_var[16];$/;"	m	struct:__anon1bf8eac80108	typeref:typename:char[16]	file:
envcrc-objs	tools/Makefile	/^envcrc-objs := envcrc.o lib\/crc32.o common\/env_embedded.o lib\/sha1.o$/;"	m
envdev_s	tools/env/fw_env.c	/^struct envdev_s {$/;"	s	file:
envdevices	tools/env/fw_env.c	/^static struct envdev_s envdevices[2] =$/;"	v	typeref:struct:envdev_s[2]	file:
environment	disk/part_amiga.h	/^    u32 environment[17];$/;"	m	struct:partition_block	typeref:typename:u32[17]
environment	tools/env/fw_env.c	/^static struct environment environment = {$/;"	v	typeref:struct:environment	file:
environment	tools/env/fw_env.c	/^struct environment {$/;"	s	file:
environment_end	tools/env/fw_env.c	/^off_t environment_end(int dev)$/;"	f	typeref:typename:off_t
environment_s	include/environment.h	/^typedef struct environment_s {$/;"	s
envmatch	cmd/nvedit.c	/^int envmatch(uchar *s1, int i2)$/;"	f	typeref:typename:int
envmatch	tools/env/fw_env.c	/^static char *envmatch(char *s1, char *s2)$/;"	f	typeref:typename:char *	file:
enz_kaldo_1p8v	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int enz_kaldo_1p8v;$/;"	m	struct:pad_signals	typeref:typename:int
eo	scripts/kconfig/symbol.c	/^	off_t		so, eo;$/;"	m	struct:sym_match	typeref:typename:off_t	file:
eodqdpar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eodqdpar; \/* Extended Outbound DQ DPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
eodqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eodqepar; \/* Extended Outbound DQ EPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
eodqhpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eodqhpar;	\/* 0xd3024 - Extended Outbound Descriptor Queue Head Pointer Address Register */;"	m	struct:ccsr_rio	typeref:typename:uint
eodqtpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eodqtpar;	\/* 0xd3008 - Extended Outbound Descriptor Queue Tail Pointer Address Register */;"	m	struct:ccsr_rio	typeref:typename:uint
eof	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t eof;$/;"	m	struct:mrq_write_trace_response	typeref:typename:uint32_t
eof	fs/ubifs/ubifs.h	/^	int eof;$/;"	m	struct:bu_info	typeref:typename:int
eoi	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t eoi;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
eoi	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	eoi;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
eoi	arch/arm/mach-socfpga/include/mach/timer.h	/^	u32	eoi;$/;"	m	struct:socfpga_timer	typeref:typename:u32
eoi	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eoi;		\/* End Of IRQ *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eoi	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eoi;		\/* 0x400b0 - End Of Interrupt Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eoi	drivers/usb/musb-new/musb_dsps.c	/^	u16	eoi;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
eoi	drivers/usb/musb/am35x.h	/^	u32	eoi;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
eoi0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eoi0;		\/* End Of IRQ for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
eoi0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eoi0;		\/* 0x600b0 - End Of Interrupt Register for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
eol_or_eof	cmd/pxe.c	/^static void eol_or_eof(char **c)$/;"	f	typeref:typename:void	file:
eor	include/fsl_immap.h	/^	u32	eor;			\/* Enhanced Optimization Register *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
eorx	drivers/video/cfb_console.c	/^static u32 eorx, fgx, bgx;	\/* color pats *\/$/;"	v	typeref:typename:u32	file:
eos	include/smbios.h	/^	char eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type0	typeref:typename:char[]
eos	include/smbios.h	/^	char eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type1	typeref:typename:char[]
eos	include/smbios.h	/^	char eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type2	typeref:typename:char[]
eos	include/smbios.h	/^	char eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type3	typeref:typename:char[]
eos	include/smbios.h	/^	char eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type4	typeref:typename:char[]
eos	include/smbios.h	/^	u8 eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type127	typeref:typename:u8[]
eos	include/smbios.h	/^	u8 eos[SMBIOS_STRUCT_EOS_BYTES];$/;"	m	struct:smbios_type32	typeref:typename:u8[]
eosar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	eosar; \/* Extended Outbound Unit Source AR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
eosar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	eosar;		\/* 0xd3010 - Extended Outbound Unit Source Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
eot_disable	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			eot_disable;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
ep	drivers/usb/gadget/at91_udc.h	/^	struct at91_ep			ep[NUM_ENDPOINTS];$/;"	m	struct:at91_udc	typeref:struct:at91_ep[]
ep	drivers/usb/gadget/at91_udc.h	/^	struct usb_ep			ep;$/;"	m	struct:at91_ep	typeref:struct:usb_ep
ep	drivers/usb/gadget/atmel_usba_udc.h	/^	struct usb_ep				ep;$/;"	m	struct:usba_ep	typeref:struct:usb_ep
ep	drivers/usb/gadget/ci_udc.h	/^	struct ci_ep			ep[NUM_ENDPOINTS];$/;"	m	struct:ci_drv	typeref:struct:ci_ep[]
ep	drivers/usb/gadget/ci_udc.h	/^	struct usb_ep ep;$/;"	m	struct:ci_ep	typeref:struct:usb_ep
ep	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];$/;"	m	struct:dwc2_udc	typeref:struct:dwc2_ep[]
ep	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct usb_ep ep;$/;"	m	struct:dwc2_ep	typeref:struct:usb_ep
ep	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	struct ep_fifo ep[16];$/;"	m	struct:dwc2_usbotg_reg	typeref:struct:ep_fifo[16]
ep	drivers/usb/gadget/fotg210.c	/^	struct fotg210_ep         ep[1 + CFG_NUM_ENDPOINTS];$/;"	m	struct:fotg210_chip	typeref:struct:fotg210_ep[]	file:
ep	drivers/usb/gadget/fotg210.c	/^	struct fotg210_ep *ep;$/;"	m	struct:fotg210_request	typeref:struct:fotg210_ep *	file:
ep	drivers/usb/gadget/fotg210.c	/^	struct usb_ep ep;$/;"	m	struct:fotg210_ep	typeref:struct:usb_ep	file:
ep	drivers/usb/gadget/pxa25x_udc.h	/^	struct pxa25x_ep			ep[PXA_UDC_NUM_ENDPOINTS];$/;"	m	struct:pxa25x_udc	typeref:struct:pxa25x_ep[]
ep	drivers/usb/gadget/pxa25x_udc.h	/^	struct usb_ep				ep;$/;"	m	struct:pxa25x_ep	typeref:struct:usb_ep
ep	drivers/usb/musb-new/musb_gadget.h	/^	struct musb_ep		*ep;$/;"	m	struct:musb_request	typeref:struct:musb_ep *
ep	drivers/usb/musb-new/usb-compat.h	/^	struct usb_host_endpoint *ep;	\/* (internal) pointer to endpoint *\/$/;"	m	struct:urb	typeref:struct:usb_host_endpoint *
ep	drivers/usb/musb/musb_core.h	/^	} ep[16];$/;"	m	struct:musb_regs	typeref:union:musb_regs::musb_ep_regs[16]
ep	include/gdsys_fpga.h	/^	struct ihs_io_ep ep;	\/* 0x0020 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_io_ep
ep	include/image.h	/^	ulong		ep;		\/* entry point of OS *\/$/;"	m	struct:bootm_headers	typeref:typename:ulong
ep	include/linux/usb/atmel_usba_udc.h	/^	struct usba_ep_data	*ep;$/;"	m	struct:usba_platform_data	typeref:struct:usba_ep_data *
ep	tools/imagetool.h	/^	unsigned int ep;$/;"	m	struct:image_tool_params	typeref:typename:unsigned int
ep0	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_ep		*ep0;		\/* Copy of gadget->ep0 *\/$/;"	m	struct:fsg_common	typeref:struct:usb_ep *	file:
ep0	drivers/usb/musb/musb_core.h	/^		struct musb_ep0_regs ep0;$/;"	m	union:musb_regs::musb_ep_regs	typeref:struct:musb_ep0_regs
ep0	include/linux/usb/gadget.h	/^	struct usb_ep			*ep0;$/;"	m	struct:usb_gadget	typeref:struct:usb_ep *
ep0_bounce	drivers/usb/dwc3/core.h	/^	void			*ep0_bounce;$/;"	m	struct:dwc3	typeref:typename:void *
ep0_bounce_addr	drivers/usb/dwc3/core.h	/^	dma_addr_t		ep0_bounce_addr;$/;"	m	struct:dwc3	typeref:typename:dma_addr_t
ep0_bounced	drivers/usb/dwc3/core.h	/^	unsigned		ep0_bounced:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
ep0_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata ep0_cfg = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata	file:
ep0_csr_in_csr1_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep0_csr_in_csr1_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
ep0_data	include/usb/fotg210.h	/^	uint32_t ep0_data; \/* 0x1d0: EP0 Setup Packet PIO Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
ep0_data_phase	drivers/usb/gadget/ci_udc.h	/^	bool				ep0_data_phase;$/;"	m	struct:ci_drv	typeref:typename:bool
ep0_desc	drivers/usb/gadget/ci_udc.c	/^static struct usb_endpoint_descriptor ep0_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
ep0_desc	drivers/usb/gadget/fotg210.c	/^static struct usb_endpoint_descriptor ep0_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
ep0_endpoint	drivers/usb/musb/musb_udc.c	/^struct usb_endpoint_instance *ep0_endpoint;$/;"	v	typeref:struct:usb_endpoint_instance *
ep0_expect_in	drivers/usb/dwc3/core.h	/^	unsigned		ep0_expect_in:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
ep0_fifo_size	drivers/usb/gadget/dwc2_udc_otg.c	/^static unsigned int ep0_fifo_size = 64;$/;"	v	typeref:typename:unsigned int	file:
ep0_get_descriptor	drivers/usb/gadget/ep0.c	/^static int ep0_get_descriptor (struct usb_device_instance *device,$/;"	f	typeref:typename:int	file:
ep0_get_one	drivers/usb/gadget/ep0.c	/^static int ep0_get_one (struct usb_device_instance *device, struct urb *urb,$/;"	f	typeref:typename:int	file:
ep0_get_status	drivers/usb/gadget/ep0.c	/^static int ep0_get_status (struct usb_device_instance *device,$/;"	f	typeref:typename:int	file:
ep0_idle	drivers/usb/gadget/pxa25x_udc.c	/^static inline void ep0_idle(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
ep0_next_event	drivers/usb/dwc3/core.h	/^	enum dwc3_ep0_next	ep0_next_event;$/;"	m	struct:dwc3	typeref:enum:dwc3_ep0_next
ep0_queue	drivers/usb/gadget/f_mass_storage.c	/^static int ep0_queue(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
ep0_recv_setup	drivers/usb/gadget/ep0.c	/^int ep0_recv_setup (struct urb *urb)$/;"	f	typeref:typename:int
ep0_req	drivers/usb/gadget/ci_udc.h	/^	struct ci_req			*ep0_req;$/;"	m	struct:ci_drv	typeref:struct:ci_req *
ep0_req_tag	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		ep0_req_tag;$/;"	m	struct:fsg_common	typeref:typename:unsigned int	file:
ep0_rxstate	drivers/usb/musb-new/musb_gadget_ep0.c	/^static void ep0_rxstate(struct musb *musb)$/;"	f	typeref:typename:void	file:
ep0_stage	drivers/usb/musb-new/musb_core.h	/^	enum musb_h_ep0_state	ep0_stage;$/;"	m	struct:musb	typeref:enum:musb_h_ep0_state
ep0_state	drivers/usb/gadget/pxa25x_udc.h	/^enum ep0_state {$/;"	g
ep0_state	drivers/usb/musb-new/musb_core.h	/^	enum musb_g_ep0_state	ep0_state;$/;"	m	struct:musb	typeref:enum:musb_g_ep0_state
ep0_state	drivers/usb/musb/musb_udc.c	/^} ep0_state = IDLE;$/;"	v	typeref:enum:ep0_state_enum	file:
ep0_state_enum	drivers/usb/musb/musb_udc.c	/^static enum ep0_state_enum {$/;"	g	file:
ep0_state_strings	drivers/usb/musb/musb_udc.c	/^static char *ep0_state_strings[4] = {$/;"	v	typeref:typename:char * [4]	file:
ep0_trb	drivers/usb/dwc3/core.h	/^	struct dwc3_trb		*ep0_trb;$/;"	m	struct:dwc3	typeref:struct:dwc3_trb *
ep0_trb_addr	drivers/usb/dwc3/core.h	/^	dma_addr_t		ep0_trb_addr;$/;"	m	struct:dwc3	typeref:typename:dma_addr_t
ep0_txstate	drivers/usb/musb-new/musb_gadget_ep0.c	/^static void ep0_txstate(struct musb *musb)$/;"	f	typeref:typename:void	file:
ep0_urb	drivers/usb/gadget/designware_udc.c	/^static struct urb *ep0_urb;$/;"	v	typeref:struct:urb *	file:
ep0_urb	drivers/usb/gadget/pxa27x_udc.c	/^static struct urb *ep0_urb;$/;"	v	typeref:struct:urb *	file:
ep0_urb	drivers/usb/musb/musb_udc.c	/^static struct urb *ep0_urb;$/;"	v	typeref:struct:urb *	file:
ep0_usb_req	drivers/usb/dwc3/core.h	/^	struct dwc3_request	ep0_usb_req;$/;"	m	struct:dwc3	typeref:struct:dwc3_request
ep0ctl	arch/m68k/include/asm/immap_5275.h	/^	u32 ep0ctl;$/;"	m	struct:usb	typeref:typename:u32
ep0dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep0dpr;$/;"	m	struct:usb	typeref:typename:u16
ep0dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep0dr;$/;"	m	struct:usb	typeref:typename:u32
ep0imr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep0imr;$/;"	m	struct:usb	typeref:typename:u32
ep0isr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep0isr;$/;"	m	struct:usb	typeref:typename:u32
ep0name	drivers/usb/gadget/at91_udc.c	/^#define ep0name	/;"	d	file:
ep0name	drivers/usb/gadget/dwc2_udc_otg.c	/^static const char ep0name[] = "ep0-control";$/;"	v	typeref:typename:const char[]	file:
ep0name	drivers/usb/gadget/pxa25x_udc.c	/^static const char ep0name[] = "ep0";$/;"	v	typeref:typename:const char[]	file:
ep0ptr	include/usb/mpc8xx_udc.h	/^	ushort ep0ptr;	\/* Endpoint Pointer Register 0 *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
ep0ptr	post/cpu/mpc8xx/usb.c	/^	ushort ep0ptr;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
ep0req	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_request	*ep0req;	\/* Copy of cdev->req *\/$/;"	m	struct:fsg_common	typeref:struct:usb_request *	file:
ep0sr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep0sr;$/;"	m	struct:usb	typeref:typename:u16
ep0start	drivers/usb/gadget/pxa25x_udc.c	/^void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)$/;"	f	typeref:typename:void	file:
ep0state	drivers/usb/dwc3/core.h	/^	enum dwc3_ep0_state	ep0state;$/;"	m	struct:dwc3	typeref:enum:dwc3_ep0_state
ep0state	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	int ep0state;$/;"	m	struct:dwc2_udc	typeref:typename:int
ep0state	drivers/usb/gadget/pxa25x_udc.h	/^	enum ep0_state				ep0state;$/;"	m	struct:pxa25x_udc	typeref:enum:ep0_state
ep0state	drivers/usb/gadget/pxa27x_udc.c	/^static int ep0state = EP0_IDLE;$/;"	v	typeref:typename:int	file:
ep0stats	drivers/usb/gadget/pxa25x_udc.h	/^	struct ep0stats {$/;"	s	struct:udc_stats
ep1cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep1cfg;$/;"	m	struct:usb	typeref:typename:u32
ep1ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep1ctl;$/;"	m	struct:usb	typeref:typename:u16
ep1dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep1dpr;$/;"	m	struct:usb	typeref:typename:u16
ep1dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep1dr;$/;"	m	struct:usb	typeref:typename:u32
ep1imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep1imr;$/;"	m	struct:usb	typeref:typename:u16
ep1isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep1isr;$/;"	m	struct:usb	typeref:typename:u16
ep1ptr	include/usb/mpc8xx_udc.h	/^	ushort ep1ptr;	\/* Endpoint Pointer Register 1 *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
ep1ptr	post/cpu/mpc8xx/usb.c	/^	ushort ep1ptr;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
ep2cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep2cfg;$/;"	m	struct:usb	typeref:typename:u32
ep2ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep2ctl;$/;"	m	struct:usb	typeref:typename:u16
ep2dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep2dpr;$/;"	m	struct:usb	typeref:typename:u16
ep2dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep2dr;$/;"	m	struct:usb	typeref:typename:u32
ep2imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep2imr;$/;"	m	struct:usb	typeref:typename:u16
ep2isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep2isr;$/;"	m	struct:usb	typeref:typename:u16
ep2ptr	include/usb/mpc8xx_udc.h	/^	ushort ep2ptr;	\/* Endpoint Pointer Register 2 *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
ep2ptr	post/cpu/mpc8xx/usb.c	/^	ushort ep2ptr;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
ep3cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep3cfg;$/;"	m	struct:usb	typeref:typename:u32
ep3ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep3ctl;$/;"	m	struct:usb	typeref:typename:u16
ep3dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep3dpr;$/;"	m	struct:usb	typeref:typename:u16
ep3dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep3dr;$/;"	m	struct:usb	typeref:typename:u32
ep3imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep3imr;$/;"	m	struct:usb	typeref:typename:u16
ep3isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep3isr;$/;"	m	struct:usb	typeref:typename:u16
ep3ptr	include/usb/mpc8xx_udc.h	/^	ushort ep3ptr;	\/* Endpoint Pointer Register 3 *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
ep3ptr	post/cpu/mpc8xx/usb.c	/^	ushort ep3ptr;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
ep4cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep4cfg;$/;"	m	struct:usb	typeref:typename:u32
ep4ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep4ctl;$/;"	m	struct:usb	typeref:typename:u16
ep4dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep4dpr;$/;"	m	struct:usb	typeref:typename:u16
ep4dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep4dr;$/;"	m	struct:usb	typeref:typename:u32
ep4imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep4imr;$/;"	m	struct:usb	typeref:typename:u16
ep4isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep4isr;$/;"	m	struct:usb	typeref:typename:u16
ep5cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep5cfg;$/;"	m	struct:usb	typeref:typename:u32
ep5ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep5ctl;$/;"	m	struct:usb	typeref:typename:u16
ep5dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep5dpr;$/;"	m	struct:usb	typeref:typename:u16
ep5dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep5dr;$/;"	m	struct:usb	typeref:typename:u32
ep5imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep5imr;$/;"	m	struct:usb	typeref:typename:u16
ep5isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep5isr;$/;"	m	struct:usb	typeref:typename:u16
ep6cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep6cfg;$/;"	m	struct:usb	typeref:typename:u32
ep6ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep6ctl;$/;"	m	struct:usb	typeref:typename:u16
ep6dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep6dpr;$/;"	m	struct:usb	typeref:typename:u16
ep6dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep6dr;$/;"	m	struct:usb	typeref:typename:u32
ep6imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep6imr;$/;"	m	struct:usb	typeref:typename:u16
ep6isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep6isr;$/;"	m	struct:usb	typeref:typename:u16
ep7cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 ep7cfg;$/;"	m	struct:usb	typeref:typename:u32
ep7ctl	arch/m68k/include/asm/immap_5275.h	/^	u16 ep7ctl;$/;"	m	struct:usb	typeref:typename:u16
ep7dpr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep7dpr;$/;"	m	struct:usb	typeref:typename:u16
ep7dr	arch/m68k/include/asm/immap_5275.h	/^	u32 ep7dr;$/;"	m	struct:usb	typeref:typename:u32
ep7imr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep7imr;$/;"	m	struct:usb	typeref:typename:u16
ep7isr	arch/m68k/include/asm/immap_5275.h	/^	u16 ep7isr;$/;"	m	struct:usb	typeref:typename:u16
ep93xx_clear_epgio	board/cirrus/edb93xx/edb93xx.c	/^static void ep93xx_clear_epgio(unsigned num)$/;"	f	typeref:typename:void	file:
ep93xx_dir_epgio_out	board/cirrus/edb93xx/edb93xx.c	/^static void ep93xx_dir_epgio_out(unsigned num)$/;"	f	typeref:typename:void	file:
ep93xx_eth_close	drivers/net/ep93xx_eth.c	/^static void ep93xx_eth_close(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ep93xx_eth_initialize	drivers/net/ep93xx_eth.c	/^int ep93xx_eth_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
ep93xx_eth_open	drivers/net/ep93xx_eth.c	/^static int ep93xx_eth_open(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ep93xx_eth_rcv_packet	drivers/net/ep93xx_eth.c	/^static int ep93xx_eth_rcv_packet(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ep93xx_eth_send_packet	drivers/net/ep93xx_eth.c	/^static int ep93xx_eth_send_packet(struct eth_device *dev,$/;"	f	typeref:typename:int	file:
ep93xx_mac_reset	drivers/net/ep93xx_eth.c	/^static void ep93xx_mac_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ep93xx_miiphy_initialize	drivers/net/ep93xx_eth.c	/^int ep93xx_miiphy_initialize(bd_t * const bd)$/;"	f	typeref:typename:int
ep93xx_miiphy_read	drivers/net/ep93xx_eth.c	/^static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ep93xx_miiphy_write	drivers/net/ep93xx_eth.c	/^static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ep93xx_priv	drivers/net/ep93xx_eth.h	/^struct ep93xx_priv {$/;"	s
ep93xx_sdram_config	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^ep93xx_sdram_config:$/;"	l
ep93xx_sdram_done	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^ep93xx_sdram_done:$/;"	l
ep93xx_sdram_size	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^ep93xx_sdram_size:$/;"	l
ep93xx_sdram_test	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^ep93xx_sdram_test:$/;"	l
ep93xx_set_epgio	board/cirrus/edb93xx/edb93xx.c	/^static void ep93xx_set_epgio(unsigned num)$/;"	f	typeref:typename:void	file:
ep93xx_spi_init_hw	drivers/spi/ep93xx_spi.c	/^static int ep93xx_spi_init_hw(unsigned int rate, unsigned int mode,$/;"	f	typeref:typename:int	file:
ep93xx_spi_read_u16	drivers/spi/ep93xx_spi.c	/^static inline u16 ep93xx_spi_read_u16(u16 reg)$/;"	f	typeref:typename:u16	file:
ep93xx_spi_read_u8	drivers/spi/ep93xx_spi.c	/^static inline u8 ep93xx_spi_read_u8(u16 reg)$/;"	f	typeref:typename:u8	file:
ep93xx_spi_slave	drivers/spi/ep93xx_spi.c	/^struct ep93xx_spi_slave {$/;"	s	file:
ep93xx_spi_write_u16	drivers/spi/ep93xx_spi.c	/^static inline void ep93xx_spi_write_u16(u16 reg, u16 value)$/;"	f	typeref:typename:void	file:
ep93xx_spi_write_u8	drivers/spi/ep93xx_spi.c	/^static inline void ep93xx_spi_write_u8(u16 reg, u8 value)$/;"	f	typeref:typename:void	file:
ep93xx_timer	arch/arm/cpu/arm920t/ep93xx/timer.c	/^static struct ep93xx_timer$/;"	s	file:
epN	drivers/usb/musb/musb_core.h	/^		struct musb_epN_regs epN;$/;"	m	union:musb_regs::musb_ep_regs	typeref:struct:musb_epN_regs
ep_2_n_interval	drivers/usb/host/ohci-hcd.c	/^static int ep_2_n_interval(int inter)$/;"	f	typeref:typename:int	file:
ep_add_ed	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)$/;"	f	typeref:typename:ed_t *	file:
ep_add_ed	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)$/;"	f	typeref:typename:ed_t *	file:
ep_add_ed	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)$/;"	f	typeref:typename:ed_t *	file:
ep_add_ed	drivers/usb/host/ohci-hcd.c	/^static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,$/;"	f	typeref:typename:ed_t *	file:
ep_add_ed	drivers/usb/host/ohci-s3c24xx.c	/^static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)$/;"	f	typeref:struct:ed *	file:
ep_bulk_in	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt$/;"	e	enum:ep_type
ep_bulk_out	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt$/;"	e	enum:ep_type
ep_choose	include/linux/usb/composite.h	/^ep_choose(struct usb_gadget *g, struct usb_endpoint_descriptor *hs,$/;"	f	typeref:struct:usb_endpoint_descriptor *
ep_companion	drivers/usb/host/xhci.c	/^	struct usb_ss_ep_comp_descriptor ep_companion;$/;"	m	struct:descriptor	typeref:struct:usb_ss_ep_comp_descriptor	file:
ep_config_from_hw	drivers/usb/musb-new/musb_core.c	/^static int __devinit ep_config_from_hw(struct musb *musb)$/;"	f	typeref:typename:int __devinit	file:
ep_config_from_table	drivers/usb/musb-new/musb_core.c	/^static int __devinit ep_config_from_table(struct musb *musb)$/;"	f	typeref:typename:int __devinit	file:
ep_control	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt$/;"	e	enum:ep_type
ep_desc	drivers/usb/gadget/ether.c	/^ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *hs,$/;"	f	typeref:struct:usb_endpoint_descriptor *	file:
ep_desc	drivers/usb/gadget/f_thor.c	/^ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *hs,$/;"	f	typeref:struct:usb_endpoint_descriptor *	file:
ep_desc	include/usb.h	/^	struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];$/;"	m	struct:usb_interface	typeref:struct:usb_endpoint_descriptor[]
ep_descriptor_ptrs	drivers/serial/usbtty.c	/^static struct usb_endpoint_descriptor *ep_descriptor_ptrs[NUM_ENDPOINTS];$/;"	v	typeref:struct:usb_endpoint_descriptor * []	file:
ep_dma_con	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_dma_con;$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8
ep_dma_fifo	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_dma_fifo;$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8
ep_dma_ttc_h	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_dma_ttc_h;$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8
ep_dma_ttc_l	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_dma_ttc_l;$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8
ep_dma_ttc_m	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_dma_ttc_m;$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8
ep_dma_unit	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_dma_unit;$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8
ep_enable	drivers/usb/gadget/ci_udc.c	/^static void ep_enable(int num, int in, int maxpacket)$/;"	f	typeref:typename:void	file:
ep_fifo	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^struct ep_fifo {$/;"	s
ep_fifo_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_fifo_reg;$/;"	m	struct:s3c24x0_usb_dev_fifos	typeref:typename:u8
ep_fifo_size	drivers/usb/gadget/dwc2_udc_otg.c	/^static unsigned int ep_fifo_size =  512;$/;"	v	typeref:typename:unsigned int	file:
ep_fifo_size2	drivers/usb/gadget/dwc2_udc_otg.c	/^static unsigned int ep_fifo_size2 = 1024;$/;"	v	typeref:typename:unsigned int	file:
ep_in	common/usb_storage.c	/^	unsigned char	ep_in;			\/* in endpoint *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
ep_in	drivers/usb/musb-new/musb_core.h	/^	struct musb_ep		ep_in;			\/* TX *\/$/;"	m	struct:musb_hw_ep	typeref:struct:musb_ep
ep_in	include/usb_ether.h	/^	unsigned char	ep_in;		\/* in endpoint *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
ep_index	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define ep_index(/;"	d
ep_info	drivers/usb/host/xhci.h	/^	__le32	ep_info;$/;"	m	struct:xhci_ep_ctx	typeref:typename:__le32
ep_info2	drivers/usb/host/xhci.h	/^	__le32	ep_info2;$/;"	m	struct:xhci_ep_ctx	typeref:typename:__le32
ep_int	common/usb_storage.c	/^	unsigned char	ep_int;			\/* interrupt . *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
ep_int	include/usb_ether.h	/^	unsigned char	ep_int;		\/* interrupt . *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
ep_int_ballance	drivers/usb/host/ohci-hcd.c	/^static int ep_int_ballance(ohci_t *ohci, int interval, int load)$/;"	f	typeref:typename:int	file:
ep_int_en_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_int_en_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
ep_int_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ep_int_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
ep_interrupt	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt$/;"	e	enum:ep_type
ep_intmsk	drivers/usb/musb/am35x.h	/^	u32	ep_intmsk;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_intmskclr	drivers/usb/musb/am35x.h	/^	u32	ep_intmskclr;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_intmskset	drivers/usb/musb/am35x.h	/^	u32	ep_intmskset;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_intsrc	drivers/usb/musb/am35x.h	/^	u32	ep_intsrc;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_intsrcclr	drivers/usb/musb/am35x.h	/^	u32	ep_intsrcclr;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_intsrcmsked	drivers/usb/musb/am35x.h	/^	u32	ep_intsrcmsked;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_intsrcset	drivers/usb/musb/am35x.h	/^	u32	ep_intsrcset;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
ep_is_control	drivers/usb/gadget/atmel_usba_udc.h	/^#define ep_is_control(/;"	d
ep_is_idle	drivers/usb/gadget/atmel_usba_udc.h	/^#define ep_is_idle(/;"	d
ep_is_in	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define ep_is_in(/;"	d
ep_link	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int ep_link (ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_link	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int ep_link (ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_link	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int ep_link (ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_link	drivers/usb/host/ohci-hcd.c	/^static int ep_link(ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_link	drivers/usb/host/ohci-s3c24xx.c	/^static int ep_link(struct ohci *ohci, struct ed *edi)$/;"	f	typeref:typename:int	file:
ep_list	include/linux/usb/gadget.h	/^	struct list_head		ep_list;	\/* of usb_ep *\/$/;"	m	struct:usb_gadget	typeref:struct:list_head
ep_list	include/linux/usb/gadget.h	/^	struct list_head	ep_list;$/;"	m	struct:usb_ep	typeref:struct:list_head
ep_list_addr	include/usb/ehci-ci.h	/^	u32	ep_list_addr;	\/* 0x158 - Next Asynchronous List$/;"	m	struct:usb_ehci	typeref:typename:u32
ep_loop	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int ep_loop;$/;"	m	struct:edp_link_train_info	typeref:typename:unsigned int
ep_matches	drivers/usb/gadget/epautoconf.c	/^static int ep_matches($/;"	f	typeref:typename:int	file:
ep_maxpacket	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^#define ep_maxpacket(/;"	d
ep_names	drivers/usb/gadget/at91_udc.c	/^static const char * const ep_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
ep_out	common/usb_storage.c	/^	unsigned char	ep_out;			\/* out ....... *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
ep_out	drivers/usb/musb-new/musb_core.h	/^	struct musb_ep		ep_out;			\/* RX *\/$/;"	m	struct:musb_hw_ep	typeref:struct:musb_ep
ep_out	include/usb_ether.h	/^	unsigned char	ep_out;		\/* out ....... *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
ep_print_int_eds	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^void ep_print_int_eds (ohci_t *ohci, char * str) {$/;"	f	typeref:typename:void
ep_print_int_eds	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^void ep_print_int_eds (ohci_t *ohci, char * str) {$/;"	f	typeref:typename:void
ep_print_int_eds	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^void ep_print_int_eds (ohci_t *ohci, char * str) {$/;"	f	typeref:typename:void
ep_print_int_eds	drivers/usb/host/ohci-hcd.c	/^void ep_print_int_eds(ohci_t *ohci, char *str)$/;"	f	typeref:typename:void
ep_print_int_eds	drivers/usb/host/ohci-s3c24xx.c	/^void ep_print_int_eds(struct ohci *ohci, char *str)$/;"	f	typeref:typename:void
ep_ref	drivers/usb/gadget/mpc8xx_udc.c	/^static struct mpc8xx_ep ep_ref[MAX_ENDPOINTS];$/;"	v	typeref:struct:mpc8xx_ep[]	file:
ep_regs	drivers/usb/gadget/atmel_usba_udc.h	/^	void					*ep_regs;$/;"	m	struct:usba_ep	typeref:typename:void *
ep_reset	drivers/usb/gadget/fotg210.c	/^static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr)$/;"	f	typeref:typename:int	file:
ep_rev	drivers/usb/host/ohci-hcd.c	/^static int ep_rev(int num_bits, int word)$/;"	f	typeref:typename:int	file:
ep_state	drivers/usb/host/xhci.h	/^	unsigned int			ep_state;$/;"	m	struct:xhci_virt_ep	typeref:typename:unsigned int
ep_to_fifo	drivers/usb/gadget/fotg210.c	/^static inline int ep_to_fifo(struct fotg210_chip *chip, int id)$/;"	f	typeref:typename:int	file:
ep_type	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	enum ep_type ep_type;$/;"	m	struct:dwc2_ep	typeref:enum:ep_type
ep_type	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^enum ep_type {$/;"	g
ep_unlink	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int ep_unlink (ohci_t *ohci, ed_t *ed)$/;"	f	typeref:typename:int	file:
ep_unlink	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int ep_unlink (ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_unlink	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int ep_unlink (ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_unlink	drivers/usb/host/ohci-hcd.c	/^static int ep_unlink(ohci_t *ohci, ed_t *edi)$/;"	f	typeref:typename:int	file:
ep_unlink	drivers/usb/host/ohci-s3c24xx.c	/^static int ep_unlink(struct ohci *ohci, struct ed *ed)$/;"	f	typeref:typename:int	file:
epap	drivers/net/mvgbe.h	/^	u32 epap;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
epbar	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t epbar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
epccr	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	epccr;		\/* 0x078 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
epcomp	drivers/usb/gadget/ci_udc.h	/^	u32 epcomp;		\/* 0x1bc *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epcomp	drivers/usb/gadget/ci_udc.h	/^	u32 epcomp;		\/* 0x218 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epcomplete	include/usb/ehci-ci.h	/^	u32	epcomplete;	\/* 0x1bc - End Point Complete *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epcount_mode	drivers/usb/musb/am35x.h	/^	u32	epcount_mode;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
epcpr	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	epcpr;		\/* 0x070 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
epctrl	drivers/usb/gadget/ci_udc.h	/^	u32 epctrl[16];		\/* 0x1c0 *\/$/;"	m	struct:ci_udc	typeref:typename:u32[16]
epctrl	drivers/usb/gadget/ci_udc.h	/^	u32 epctrl[16];		\/* 0x21c *\/$/;"	m	struct:ci_udc	typeref:typename:u32[16]
epctrl0	include/usb/ehci-ci.h	/^	u32	epctrl0;	\/* 0x1c0 - End Point Control 0 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epctrl1	include/usb/ehci-ci.h	/^	u32	epctrl1;	\/* 0x1c4 - End Point Control 1 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epctrl2	include/usb/ehci-ci.h	/^	u32	epctrl2;	\/* 0x1c8 - End Point Control 2 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epctrl3	include/usb/ehci-ci.h	/^	u32	epctrl3;	\/* 0x1cc - End Point Control 3 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epctrl4	include/usb/ehci-ci.h	/^	u32	epctrl4;	\/* 0x1d0 - End Point Control 4 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epctrl5	include/usb/ehci-ci.h	/^	u32	epctrl5;	\/* 0x1d4 - End Point Control 5 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epdc	arch/arm/dts/imx6dl.dtsi	/^			epdc: epdc@020f4000 {$/;"	l	label:aips1
epdc	arch/arm/dts/imx6ull.dtsi	/^			epdc: epdc@0228c000 {$/;"	l	label:aips3
epdc_clock_disable	arch/arm/cpu/armv7/mx7/clock.c	/^void epdc_clock_disable(void)$/;"	f	typeref:typename:void
epdc_clock_enable	arch/arm/cpu/armv7/mx7/clock.c	/^void epdc_clock_enable(void)$/;"	f	typeref:typename:void
epdcrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 epdcrc;		\/* 0x104 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
epdir	drivers/usb/musb/musb_core.h	/^	u8	epdir;	\/* endpoint direction	*\/$/;"	m	struct:musb_epinfo	typeref:typename:u8
epflush	drivers/usb/gadget/ci_udc.h	/^	u32 epflush;		\/* 0x1b4 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epflush	drivers/usb/gadget/ci_udc.h	/^	u32 epflush;		\/* 0x210 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epflush	include/usb/ehci-ci.h	/^	u32	epflush;	\/* 0x1b4 - End Point De-initlialize *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epinfo	drivers/usb/musb/musb_core.h	/^	u8	epinfo;$/;"	m	struct:musb_regs	typeref:typename:u8
epinfo	drivers/usb/musb/musb_hcd.c	/^static const struct musb_epinfo epinfo[3] = {$/;"	v	typeref:typename:const struct musb_epinfo[3]	file:
epinfo	drivers/usb/musb/musb_udc.c	/^static struct musb_epinfo epinfo[MAX_ENDPOINT * 2];$/;"	v	typeref:struct:musb_epinfo[]	file:
epinitaddr	drivers/usb/gadget/ci_udc.h	/^	u32 epinitaddr;		\/* 0x148 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epinitaddr	drivers/usb/gadget/ci_udc.h	/^	u32 epinitaddr;		\/* 0x158 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epintr_clear	drivers/usb/musb-new/musb_dsps.c	/^	u16	epintr_clear;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
epintr_set	drivers/usb/musb-new/musb_dsps.c	/^	u16	epintr_set;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
epintr_status	drivers/usb/musb-new/musb_dsps.c	/^	u16	epintr_status;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
epit1	arch/arm/dts/imx6qdl.dtsi	/^			epit1: epit@020d0000 { \/* EPIT1 *\/$/;"	l
epit1	arch/arm/dts/imx6ull.dtsi	/^			epit1: epit@020d0000 {$/;"	l
epit2	arch/arm/dts/imx6qdl.dtsi	/^			epit2: epit@020d4000 { \/* EPIT2 *\/$/;"	l
epit2	arch/arm/dts/imx6ull.dtsi	/^			epit2: epit@020d4000 {$/;"	l
epit_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct epit_regs {$/;"	s
epld_t	board/amcc/luan/epld.h	/^} epld_t;$/;"	t	typeref:struct:__anon034c23190108
epll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	epll_con;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
epll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	epll_con;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
epll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
epll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
epll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
epll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
epll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
epll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
epll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
epll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
epll_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
epll_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
epll_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_con2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
epll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_lock;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
epll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_lock;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
epll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
epll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	epll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
epll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	epll_lock;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
epll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	epll_lock;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
epll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned epll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
epll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned epll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
epll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned epll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
epll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
epll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
epll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
epll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
epll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
epll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
epll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
epll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
epll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	epll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
epmap14	include/usb/fotg210.h	/^	uint32_t epmap14;\/* 0x1a0: Endpoint Map Register (EP1 ~ 4) *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
epmap58	include/usb/fotg210.h	/^	uint32_t epmap58;\/* 0x1a4: Endpoint Map Register (EP5 ~ 8) *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
epmask	drivers/usb/musb-new/musb_core.h	/^	u16 epmask;$/;"	m	struct:musb	typeref:typename:u16
epmaxpacketin	include/usb.h	/^	int epmaxpacketin[16];		\/* INput endpoint specific maximums *\/$/;"	m	struct:usb_device	typeref:typename:int[16]
epmaxpacketout	include/usb.h	/^	int epmaxpacketout[16];		\/* OUTput endpoint specific maximums *\/$/;"	m	struct:usb_device	typeref:typename:int[16]
epnum	drivers/usb/dwc3/core.h	/^	u8			epnum;$/;"	m	struct:dwc3_request	typeref:typename:u8
epnum	drivers/usb/gadget/epautoconf.c	/^static unsigned epnum;$/;"	v	typeref:typename:unsigned	file:
epnum	drivers/usb/host/isp116x.h	/^	u8 epnum;$/;"	m	struct:isp116x_ep	typeref:typename:u8
epnum	drivers/usb/musb-new/musb_core.h	/^	u8			epnum;$/;"	m	struct:musb_hw_ep	typeref:typename:u8
epnum	drivers/usb/musb-new/musb_gadget.h	/^	u8 epnum;$/;"	m	struct:musb_request	typeref:typename:u8
epnum	drivers/usb/musb-new/musb_host.h	/^	u8			epnum;$/;"	m	struct:musb_qh	typeref:typename:u8
epnum	drivers/usb/musb/musb_core.h	/^	u8	epnum;	\/* endpoint number 	*\/$/;"	m	struct:musb_epinfo	typeref:typename:u8
eport	arch/m68k/include/asm/coldfire/eport.h	/^typedef struct eport {$/;"	s
eport_t	arch/m68k/include/asm/coldfire/eport.h	/^} eport_t;$/;"	t	typeref:struct:eport
epos_evm_dpll_ddr	board/ti/am43xx/board.c	/^const struct dpll_params epos_evm_dpll_ddr[NUM_CRYSTAL_FREQ] = {$/;"	v	typeref:typename:const struct dpll_params[]
epprime	drivers/usb/gadget/ci_udc.h	/^	u32 epprime;		\/* 0x1b0 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epprime	drivers/usb/gadget/ci_udc.h	/^	u32 epprime;		\/* 0x20c *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epprime	include/usb/ehci-ci.h	/^	u32	epprime;	\/* 0x1b0 - End Point Init Status *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epram_descs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static elbt_prdesc epram_descs[] = {$/;"	v	typeref:typename:elbt_prdesc[]	file:
epram_ndesc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static int epram_ndesc = ARRAY_SIZE(epram_descs);$/;"	v	typeref:typename:int	file:
eprd	drivers/block/sata_mv.c	/^struct eprd {$/;"	s	file:
eprintf	include/common.h	/^#define eprintf(/;"	d
eps	drivers/usb/dwc3/core.h	/^	struct dwc3_ep		*eps[DWC3_ENDPOINTS_NUM];$/;"	m	struct:dwc3	typeref:struct:dwc3_ep * []
eps	drivers/usb/host/xhci.h	/^	struct xhci_virt_ep		eps[31];$/;"	m	struct:xhci_virt_device	typeref:struct:xhci_virt_ep[31]
epsetupstat	drivers/usb/gadget/ci_udc.h	/^	u32 epsetupstat;	\/* 0x208 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epsetupstat	include/usb/ehci-ci.h	/^	u32	epsetupstat;	\/* 0x1ac - End Point Setup Status *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
epsize	drivers/usb/musb/musb_core.h	/^	u16	epsize;	\/* endpoint FIFO size	*\/$/;"	m	struct:musb_epinfo	typeref:typename:u16
epstat	drivers/usb/gadget/ci_udc.h	/^	u32 epstat;		\/* 0x1ac *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epstat	drivers/usb/gadget/ci_udc.h	/^	u32 epstat;		\/* 0x214 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
epstatus	include/usb/ehci-ci.h	/^	u32	epstatus;	\/* 0x1b8 - End Point Status *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
ept_queue_head	drivers/usb/gadget/ci_udc.h	/^struct ept_queue_head {$/;"	s
ept_queue_item	drivers/usb/gadget/ci_udc.h	/^struct ept_queue_item {$/;"	s
eptcomplete	arch/m68k/include/asm/immap_5329.h	/^	u32 eptcomplete;	\/* 0x1BC Endpoint Complete *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptctrl0	arch/m68k/include/asm/immap_5329.h	/^	u32 eptctrl0;		\/* 0x1C0 Endpoint control 0 *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptctrl1	arch/m68k/include/asm/immap_5329.h	/^	u32 eptctrl1;		\/* 0x1C4 Endpoint control 1 *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptctrl2	arch/m68k/include/asm/immap_5329.h	/^	u32 eptctrl2;		\/* 0x1C8 Endpoint control 2 *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptctrl3	arch/m68k/include/asm/immap_5329.h	/^	u32 eptctrl3;		\/* 0x1CC Endpoint control 3 *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptflush	arch/m68k/include/asm/immap_5329.h	/^	u32 eptflush;		\/* 0x1B4 Endpoint de-initialize *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptprime	arch/m68k/include/asm/immap_5329.h	/^	u32 eptprime;		\/* 0x1B0 Endpoint initialization *\/$/;"	m	struct:usb_otg	typeref:typename:u32
epts	drivers/usb/gadget/ci_udc.h	/^	struct ept_queue_head		*epts;$/;"	m	struct:ci_drv	typeref:struct:ept_queue_head *
eptsetstat	arch/m68k/include/asm/immap_5329.h	/^	u32 eptsetstat;		\/* 0x1AC Endpoint Setup status *\/$/;"	m	struct:usb_otg	typeref:typename:u32
eptstat	arch/m68k/include/asm/immap_5329.h	/^	u32 eptstat;		\/* 0x1B8 Endpoint status *\/$/;"	m	struct:usb_otg	typeref:typename:u32
epu_default_val	arch/arm/cpu/armv7/ls102xa/fsl_epu.c	/^struct fsm_reg_vals epu_default_val[] = {$/;"	v	typeref:struct:fsm_reg_vals[]
eputc	include/common.h	/^#define eputc(/;"	d
eputs	include/common.h	/^#define eputs(/;"	d
epwisr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	epwisr;	\/* Error \/ Port-Write Interrupt SR *\/$/;"	m	struct:rio_impl_common	typeref:typename:u32
epwisr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	epwisr;		\/* 0xd0010 - Error \/ Port-Write Interrupt Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
epwmss0	arch/arm/dts/am33xx.dtsi	/^		epwmss0: epwmss@48300000 {$/;"	l
epwmss0	arch/arm/dts/am4372.dtsi	/^		epwmss0: epwmss@48300000 {$/;"	l
epwmss0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int epwmss0clkctrl;	\/* offset 0xD4 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
epwmss1	arch/arm/dts/am33xx.dtsi	/^		epwmss1: epwmss@48302000 {$/;"	l
epwmss1	arch/arm/dts/am4372.dtsi	/^		epwmss1: epwmss@48302000 {$/;"	l
epwmss1_pins	arch/arm/dts/am335x-rut.dts	/^	epwmss1_pins: epwmss_pins {$/;"	l
epwmss1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int epwmss1clkctrl;	\/* offset 0xCC *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
epwmss2	arch/arm/dts/am33xx.dtsi	/^		epwmss2: epwmss@48304000 {$/;"	l
epwmss2	arch/arm/dts/am4372.dtsi	/^		epwmss2: epwmss@48304000 {$/;"	l
epwmss2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int epwmss2clkctrl;	\/* offset 0xD8 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
epwmss3	arch/arm/dts/am4372.dtsi	/^		epwmss3: epwmss@48306000 {$/;"	l
epwmss4	arch/arm/dts/am4372.dtsi	/^		epwmss4: epwmss@48308000 {$/;"	l
epwmss5	arch/arm/dts/am4372.dtsi	/^		epwmss5: epwmss@4830a000 {$/;"	l
epwqbar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	epwqbar; \/* Extended Port-Write Queue BAR *\/$/;"	m	struct:rio_pw	typeref:typename:u32
epwqbar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	epwqbar;	\/* 0xd34e8 - Extended Port-Write Queue Base Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
eq_cntrl	include/vsc9953.h	/^	u32	eq_cntrl;$/;"	m	struct:vsc9953_qsys_mmgt	typeref:typename:u32
eqos_adjust_link	drivers/net/dwc_eth_qos.c	/^static int eqos_adjust_link(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_alloc_descs	drivers/net/dwc_eth_qos.c	/^static void *eqos_alloc_descs(unsigned int num)$/;"	f	typeref:typename:void *	file:
eqos_calibrate_pads_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_calibrate_pads_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_config	drivers/net/dwc_eth_qos.c	/^struct eqos_config {$/;"	s	file:
eqos_desc	drivers/net/dwc_eth_qos.c	/^struct eqos_desc {$/;"	s	file:
eqos_disable_calibration_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_disable_calibration_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_dma_regs	drivers/net/dwc_eth_qos.c	/^struct eqos_dma_regs {$/;"	s	file:
eqos_flush_buffer	drivers/net/dwc_eth_qos.c	/^static void eqos_flush_buffer(void *buf, size_t size)$/;"	f	typeref:typename:void	file:
eqos_flush_desc	drivers/net/dwc_eth_qos.c	/^static void eqos_flush_desc(void *desc)$/;"	f	typeref:typename:void	file:
eqos_free_descs	drivers/net/dwc_eth_qos.c	/^static void eqos_free_descs(void *descs)$/;"	f	typeref:typename:void	file:
eqos_free_pkt	drivers/net/dwc_eth_qos.c	/^int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int
eqos_get_tick_clk_rate_tegra186	drivers/net/dwc_eth_qos.c	/^static ulong eqos_get_tick_clk_rate_tegra186(struct udevice *dev)$/;"	f	typeref:typename:ulong	file:
eqos_ids	drivers/net/dwc_eth_qos.c	/^static const struct udevice_id eqos_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
eqos_inval_buffer	drivers/net/dwc_eth_qos.c	/^static void eqos_inval_buffer(void *buf, size_t size)$/;"	f	typeref:typename:void	file:
eqos_inval_desc	drivers/net/dwc_eth_qos.c	/^static void eqos_inval_desc(void *desc)$/;"	f	typeref:typename:void	file:
eqos_mac_regs	drivers/net/dwc_eth_qos.c	/^struct eqos_mac_regs {$/;"	s	file:
eqos_mdio_read	drivers/net/dwc_eth_qos.c	/^static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,$/;"	f	typeref:typename:int	file:
eqos_mdio_wait_idle	drivers/net/dwc_eth_qos.c	/^static int eqos_mdio_wait_idle(struct eqos_priv *eqos)$/;"	f	typeref:typename:int	file:
eqos_mdio_write	drivers/net/dwc_eth_qos.c	/^static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,$/;"	f	typeref:typename:int	file:
eqos_mtl_regs	drivers/net/dwc_eth_qos.c	/^struct eqos_mtl_regs {$/;"	s	file:
eqos_ops	drivers/net/dwc_eth_qos.c	/^static const struct eth_ops eqos_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
eqos_priv	drivers/net/dwc_eth_qos.c	/^struct eqos_priv {$/;"	s	file:
eqos_probe	drivers/net/dwc_eth_qos.c	/^static int eqos_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_probe_resources_core	drivers/net/dwc_eth_qos.c	/^static int eqos_probe_resources_core(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_probe_resources_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_probe_resources_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_recv	drivers/net/dwc_eth_qos.c	/^int eqos_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
eqos_remove	drivers/net/dwc_eth_qos.c	/^static int eqos_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_remove_resources_core	drivers/net/dwc_eth_qos.c	/^static int eqos_remove_resources_core(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_remove_resources_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_remove_resources_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_send	drivers/net/dwc_eth_qos.c	/^int eqos_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
eqos_set_full_duplex	drivers/net/dwc_eth_qos.c	/^static int eqos_set_full_duplex(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_set_gmii_speed	drivers/net/dwc_eth_qos.c	/^static int eqos_set_gmii_speed(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_set_half_duplex	drivers/net/dwc_eth_qos.c	/^static int eqos_set_half_duplex(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_set_mii_speed_10	drivers/net/dwc_eth_qos.c	/^static int eqos_set_mii_speed_10(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_set_mii_speed_100	drivers/net/dwc_eth_qos.c	/^static int eqos_set_mii_speed_100(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_set_tx_clk_speed_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_start	drivers/net/dwc_eth_qos.c	/^static int eqos_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_start_clks_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_start_clks_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_start_resets_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_start_resets_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_stop	drivers/net/dwc_eth_qos.c	/^void eqos_stop(struct udevice *dev)$/;"	f	typeref:typename:void
eqos_stop_clks_tegra186	drivers/net/dwc_eth_qos.c	/^void eqos_stop_clks_tegra186(struct udevice *dev)$/;"	f	typeref:typename:void
eqos_stop_resets_tegra186	drivers/net/dwc_eth_qos.c	/^static int eqos_stop_resets_tegra186(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eqos_tegra186_config	drivers/net/dwc_eth_qos.c	/^static const struct eqos_config eqos_tegra186_config = {$/;"	v	typeref:typename:const struct eqos_config	file:
eqos_tegra186_regs	drivers/net/dwc_eth_qos.c	/^struct eqos_tegra186_regs {$/;"	s	file:
eqos_write_hwaddr	drivers/net/dwc_eth_qos.c	/^static int eqos_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
equiv_id	fs/yaffs2/yaffs_guts.h	/^	int equiv_id;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:int
equiv_id	fs/yaffs2/yaffs_guts.h	/^	u32 equiv_id;$/;"	m	struct:yaffs_hardlink_var	typeref:typename:u32
equiv_obj	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *equiv_obj;$/;"	m	struct:yaffs_hardlink_var	typeref:struct:yaffs_obj *
er	arch/m68k/include/asm/coldfire/rng.h	/^	u32 er;			\/* 0x08 Entropy *\/$/;"	m	struct:rng_ctrl	typeref:typename:u32
era	drivers/crypto/fsl/sec.c	/^		u8 era;$/;"	m	struct:caam_get_era::__anon5515d7630108	typeref:typename:u8	file:
erase	drivers/mtd/ubi/ubi.h	/^	struct list_head erase;$/;"	m	struct:ubi_attach_info	typeref:struct:list_head
erase	include/blk.h	/^	unsigned long (*erase)(struct udevice *dev, lbaint_t start,$/;"	m	struct:blk_ops	typeref:typename:unsigned long (*)(struct udevice * dev,lbaint_t start,lbaint_t blkcnt)
erase	include/linux/mtd/nand.h	/^	int (*erase)(struct mtd_info *mtd, int page);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,int page)
erase	include/spi_flash.h	/^	int (*erase)(struct spi_flash *flash, u32 offset, size_t len);$/;"	m	struct:spi_flash	typeref:typename:int (*)(struct spi_flash * flash,u32 offset,size_t len)
erase	include/spi_flash.h	/^	int (*erase)(struct udevice *dev, u32 offset, size_t len);$/;"	m	struct:dm_spi_flash_ops	typeref:typename:int (*)(struct udevice * dev,u32 offset,size_t len)
eraseBlock	fs/yaffs2/yaffs_nandif.h	/^	int (*eraseBlock)(struct yaffs_dev *dev, unsigned blockId);$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev,unsigned blockId)
erase_and_write_env	common/env_nand.c	/^static int erase_and_write_env(const struct env_location *location,$/;"	f	typeref:typename:int	file:
erase_blk_tout	include/flash.h	/^	ulong	erase_blk_tout;		\/* maximum block erase timeout		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong
erase_block	drivers/mtd/ubi/fastmap.c	/^static int erase_block(struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
erase_block_flash	board/bf533-ezkit/flash.c	/^int erase_block_flash(int nBlock, unsigned long address)$/;"	f	typeref:typename:int
erase_block_size	include/ec_commands.h	/^	uint32_t erase_block_size;$/;"	m	struct:ec_response_flash_info	typeref:typename:uint32_t
erase_callback	drivers/mtd/ubi/io.c	/^static void erase_callback(struct erase_info *ei)$/;"	f	typeref:typename:void	file:
erase_cmd	drivers/mtd/st_smi.c	/^	u8 erase_cmd;$/;"	m	struct:flash_device	typeref:typename:u8	file:
erase_cmd	include/spi_flash.h	/^	u8 erase_cmd;$/;"	m	struct:spi_flash	typeref:typename:u8
erase_deleted	fs/ubifs/orphan.c	/^static void erase_deleted(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
erase_environment	board/buffalo/lsxl/lsxl.c	/^static void erase_environment(void)$/;"	f	typeref:typename:void	file:
erase_flash	board/bf533-ezkit/flash.c	/^int erase_flash(void)$/;"	f	typeref:typename:int
erase_fn	fs/yaffs2/yaffs_guts.h	/^	int (*erase_fn) (struct yaffs_dev *dev, int flash_block);$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int flash_block)
erase_grp_size	include/mmc.h	/^	uint erase_grp_size;	\/* in 512-byte sectors *\/$/;"	m	struct:mmc	typeref:typename:uint
erase_info	include/linux/mtd/mtd.h	/^struct erase_info {$/;"	s
erase_info_t	drivers/mtd/nand/nand_util.c	/^typedef struct erase_info	erase_info_t;$/;"	t	typeref:struct:erase_info	file:
erase_info_user	include/mtd/mtd-abi.h	/^struct erase_info_user {$/;"	s
erase_info_user64	include/mtd/mtd-abi.h	/^struct erase_info_user64 {$/;"	s
erase_offset	include/mmc.h	/^	unsigned int erase_offset;	\/* In milliseconds *\/$/;"	m	struct:sd_ssr	typeref:typename:unsigned int
erase_opts	common/env_nand.c	/^	const nand_erase_options_t erase_opts;$/;"	m	struct:env_location	typeref:typename:const nand_erase_options_t	file:
erase_peb_count	drivers/mtd/ubi/ubi-media.h	/^	__be32 erase_peb_count;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
erase_region_info	include/mtd/cfi_flash.h	/^	u32	erase_region_info[NUM_ERASE_REGIONS];	\/* unaligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u32[]
erase_seq	common/cli_readline.c	/^static const char erase_seq[] = "\\b \\b";	\/* erase sequence *\/$/;"	v	typeref:typename:const char[]	file:
erase_shift	include/linux/mtd/onenand.h	/^	unsigned int erase_shift;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
erase_size	drivers/mtd/spi/sandbox.c	/^	uint erase_size;$/;"	m	struct:sandbox_spi_flash	typeref:typename:uint	file:
erase_size	include/spi_flash.h	/^	u32 erase_size;$/;"	m	struct:spi_flash	typeref:typename:u32
erase_size	tools/env/fw_env.c	/^	ulong erase_size;		\/* device erase size *\/$/;"	m	struct:envdev_s	typeref:typename:ulong	file:
erase_suspended	include/linux/mtd/flashchip.h	/^	unsigned int erase_suspended:1;$/;"	m	struct:flchip	typeref:typename:unsigned int:1
erase_threshold	tools/mxsboot.c	/^	uint32_t		erase_threshold;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
erase_time	include/linux/mtd/flashchip.h	/^	int erase_time;$/;"	m	struct:flchip	typeref:typename:int
erase_time_max	include/linux/mtd/flashchip.h	/^	int erase_time_max;$/;"	m	struct:flchip	typeref:typename:int
erase_timeout	include/mmc.h	/^	unsigned int erase_timeout;	\/* In milliseconds *\/$/;"	m	struct:sd_ssr	typeref:typename:unsigned int
erase_worker	drivers/mtd/ubi/wl.c	/^static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,$/;"	f	typeref:typename:int	file:
erase_write_page	arch/arm/mach-at91/arm926ejs/eflash.c	/^static u32 erase_write_page (u32 pagenum)$/;"	f	typeref:typename:u32	file:
eraseregions	include/linux/mtd/mtd.h	/^	struct mtd_erase_region_info *eraseregions;$/;"	m	struct:mtd_info	typeref:struct:mtd_erase_region_info *
erasesize	include/linux/mtd/doc2000.h	/^	unsigned long erasesize;$/;"	m	struct:DiskOnChip	typeref:typename:unsigned long
erasesize	include/linux/mtd/mtd.h	/^	uint32_t erasesize;		\/* For this region *\/$/;"	m	struct:mtd_erase_region_info	typeref:typename:uint32_t
erasesize	include/linux/mtd/mtd.h	/^	uint32_t erasesize;$/;"	m	struct:mtd_info	typeref:typename:uint32_t
erasesize	include/linux/mtd/nand.h	/^	unsigned int erasesize;$/;"	m	struct:nand_flash_dev	typeref:typename:unsigned int
erasesize	include/mtd/mtd-abi.h	/^	__u32 erasesize;	\/* For this region *\/$/;"	m	struct:region_info_user	typeref:typename:__u32
erasesize	include/mtd/mtd-abi.h	/^	__u32 erasesize;$/;"	m	struct:mtd_info_user	typeref:typename:__u32
erasesize_mask	include/linux/mtd/mtd.h	/^	unsigned int erasesize_mask;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
erasesize_shift	include/linux/mtd/mtd.h	/^	unsigned int erasesize_shift;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
erasing	include/linux/mtd/flashchip.h	/^	struct flchip *erasing;$/;"	m	struct:flchip_shared	typeref:struct:flchip *
erbar	arch/m68k/include/asm/immap_5445x.h	/^	u32 erbar;		\/* 0x30 Expansion ROM Base Address Register *\/$/;"	m	struct:pci	typeref:typename:u32
erbar	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 erbar;		\/* 0x30 Expansion ROM Base Address *\/$/;"	m	struct:pci	typeref:typename:u32
erbh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	erbh;	\/* Error Reporting Block Header Register *\/$/;"	m	struct:rio_logical_err	typeref:typename:u32
erbh	arch/powerpc/include/asm/immap_86xx.h	/^	uint	erbh;		\/* 0xc0600 - Error Reporting Block Header Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ercr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 ercr;$/;"	m	struct:src	typeref:typename:u32
ercsr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	ercsr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ercsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ercsr;	\/* Port error rate CSR *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32
ercsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ercsr;	        \/* 0xc0668 - Port 0 error rate command and status register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
erdsr	arch/m68k/include/asm/fec.h	/^	u32 erdsr;		\/* 0x3D0 *\/$/;"	m	struct:fec	typeref:typename:u32
erdsr	drivers/net/fec_mxc.h	/^	uint32_t erdsr;			\/* MBAR_ETH + 0x180 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
erecsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	erecsr;	\/* Port error rate enable CSR *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32
erecsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	erecsr;	        \/* 0xc0644 - Port 0 error rate enable status register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
eregs	arch/x86/lib/bios.h	/^struct eregs {$/;"	s
erotext	arch/m68k/cpu/u-boot.lds	/^	PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc512x/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc5xxx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc8260/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc83xx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	board/amcc/canyonlands/u-boot-ram.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	board/amcc/sequoia/u-boot-ram.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erotext	board/tqc/tqm8xx/u-boot.lds	/^  PROVIDE (erotext = .);$/;"	s	assignment:provide
erpi_votestat1_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 erpi_votestat1_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
erq	arch/m68k/include/asm/coldfire/edma.h	/^	u16 erq;		\/* 0x0E Enable Request Register *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16
err	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32     err;$/;"	m	struct:iim_regs	typeref:typename:u32
err	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t err;$/;"	m	struct:mrq_response	typeref:typename:int32_t
err	arch/m68k/include/asm/coldfire/edma.h	/^	u16 err;		\/* 0x2E Error Register *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16
err	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define err(/;"	d	file:
err	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define err(/;"	d	file:
err	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define err(/;"	d	file:
err	arch/powerpc/include/asm/immap_512x.h	/^	u32 err;		\/* IIM errors register *\/$/;"	m	struct:iim512x	typeref:typename:u32
err	arch/x86/include/asm/msr.h	/^	int err;$/;"	m	struct:msr_info	typeref:typename:int
err	arch/x86/include/asm/msr.h	/^	int err;$/;"	m	struct:msr_regs_info	typeref:typename:int
err	arch/x86/include/asm/ptrace.h	/^			long err;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0308	typeref:typename:long
err	drivers/misc/fsl_iim.c	/^	u32 err;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
err	drivers/usb/host/ohci-hcd.c	/^#define err(/;"	d	file:
err	drivers/usb/host/ohci-s3c24xx.c	/^#define err(/;"	d	file:
err	include/spartan2.h	/^	xilinx_err_fn	err;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_err_fn
err	include/spartan3.h	/^	xilinx_err_fn	err;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_err_fn
err	include/virtex2.h	/^	xilinx_err_fn	err;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_err_fn
err_addr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	err_addr;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
err_addr	drivers/mtd/nand/mxc_nand.h	/^	u32 err_addr;$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32
err_blk_addr	include/linux/mtd/samsung_onenand.h	/^	unsigned int	err_blk_addr;	\/* 0x01E0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
err_cb	arch/powerpc/cpu/mpc8260/i2c.c	/^	i2c_ecb_t err_cb;	\/* error callback function    *\/$/;"	m	struct:i2c_state	typeref:typename:i2c_ecb_t	file:
err_cb	arch/powerpc/cpu/mpc8xx/i2c.c	/^	i2c_ecb_t err_cb;	\/* error callback function    *\/$/;"	m	struct:i2c_state	typeref:typename:i2c_ecb_t	file:
err_check_type	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 err_check_type;			\/* ECC , PARITY.. *\/$/;"	m	struct:dimm_info	typeref:typename:u32	file:
err_code	arch/x86/cpu/mp_init.c	/^	int err_code;$/;"	m	struct:cpu_map	typeref:typename:int	file:
err_ctr	board/gdsys/common/cmd_ioloop.c	/^unsigned long long err_ctr;$/;"	v	typeref:typename:unsigned long long
err_detect	arch/powerpc/include/asm/immap_83xx.h	/^	u32 err_detect;		\/* Memory Error Detect *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
err_detect	include/fsl_immap.h	/^	u32	err_detect;		\/* Error Detect *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
err_disable	arch/powerpc/include/asm/immap_83xx.h	/^	u32 err_disable;	\/* Memory Error Disable *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
err_disable	include/fsl_ddr_sdram.h	/^	unsigned int err_disable;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
err_disable	include/fsl_immap.h	/^	u32	err_disable;		\/* Error Disable *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
err_flag	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^	u32 err_flag;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:u32	file:
err_flag	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	u32 err_flag;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:u32	file:
err_id_list	drivers/crypto/fsl/error.c	/^static const char * const err_id_list[] = {$/;"	v	typeref:typename:const char * const[]	file:
err_imximage_version	tools/imximage.c	/^static void err_imximage_version(int version)$/;"	f	typeref:typename:void	file:
err_int_en	arch/powerpc/include/asm/immap_83xx.h	/^	u32 err_int_en;		\/* Memory Error Interrupt Enable *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
err_int_en	include/fsl_ddr_sdram.h	/^	unsigned int err_int_en;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
err_int_en	include/fsl_immap.h	/^	u32	err_int_en;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
err_mask	drivers/block/sata_dwc.h	/^	unsigned int		err_mask;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
err_page_addr	include/linux/mtd/samsung_onenand.h	/^	unsigned int	err_page_addr;	\/* 0x0180 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
err_poison_test	drivers/usb/gadget/mpc8xx_udc.c	/^static char err_poison_test = 0;$/;"	v	typeref:typename:char	file:
err_sbe	arch/powerpc/include/asm/immap_83xx.h	/^	u32 err_sbe;		\/* Memory Single-Bit ECC Error Management *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
err_sbe	include/fsl_immap.h	/^	u32	err_sbe;		\/* Single-Bit ECC Error Management *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
err_str	include/slre.h	/^	const char	*err_str;	\/* Error string			*\/$/;"	m	struct:slre	typeref:typename:const char *
errata	board/freescale/common/sys_eeprom.c	/^	u8 errata[2];     \/* 0x10 - 0x11 Errata Level *\/$/;"	m	struct:eeprom	typeref:typename:u8[2]	file:
errata	board/freescale/common/sys_eeprom.c	/^	u8 errata[5];     \/* 0x10 - 0x14 Errata Level *\/$/;"	m	struct:eeprom	typeref:typename:u8[5]	file:
errata	board/varisys/common/sys_eeprom.c	/^	u8 errata[5];     \/* 0x10 - 0x14 Errata Level *\/$/;"	m	struct:eeprom	typeref:typename:u8[5]	file:
erratum_a008336	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a008336(void)$/;"	f	typeref:typename:void	file:
erratum_a008514	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a008514(void)$/;"	f	typeref:typename:void	file:
erratum_a008751	drivers/usb/host/xhci-fsl.c	/^static int erratum_a008751(void)$/;"	f	typeref:typename:int	file:
erratum_a008850_early	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a008850_early(void)$/;"	f	typeref:typename:void	file:
erratum_a008850_post	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^void erratum_a008850_post(void)$/;"	f	typeref:typename:void
erratum_a009203	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a009203(void)$/;"	f	typeref:typename:void	file:
erratum_a009635	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^void erratum_a009635(void)$/;"	f	typeref:typename:void
erratum_a009660	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a009660(void)$/;"	f	typeref:typename:void	file:
erratum_a009929	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a009929(void)$/;"	f	typeref:typename:void	file:
erratum_a010315	arch/arm/cpu/armv7/ls102xa/soc.c	/^void erratum_a010315(void)$/;"	f	typeref:typename:void
erratum_a010315	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^void erratum_a010315(void)$/;"	f	typeref:typename:void
erratum_a010539	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_a010539(void)$/;"	f	typeref:typename:void	file:
erratum_rcw_src	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static void erratum_rcw_src(void)$/;"	f	typeref:typename:void	file:
erratum_set_ccsr	arch/powerpc/cpu/mpc85xx/start.S	/^	.macro	erratum_set_ccsr offset value$/;"	m
erratum_set_dcsr	arch/powerpc/cpu/mpc85xx/start.S	/^	.macro	erratum_set_dcsr offset value$/;"	m
erratum_set_value	arch/powerpc/cpu/mpc85xx/start.S	/^erratum_set_value:$/;"	l
errcheck	test/compression.c	/^#define errcheck(/;"	d	file:
errcnt	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 errcnt;		\/* 0x1E Error Counter *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
errcnt	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 errcnt;		\/* 0x26 Error Counter *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
errcnt_1bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_1bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_2bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_2bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_3bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_3bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_4bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_4bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_5bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_5bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_6bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_6bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_7bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_7bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcnt_8bitreg	drivers/mtd/nand/arasan_nfc.c	/^	u32 errcnt_8bitreg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
errcode	include/fsl_secboot_err.h	/^	int errcode;$/;"	m	struct:fsl_secboot_errcode	typeref:typename:int
errf	api/api_net.c	/^#define errf(/;"	d	file:
errf	api/api_storage.c	/^#define errf(/;"	d	file:
errf	examples/api/demo.c	/^#define errf(/;"	d	file:
errloc	drivers/mtd/nand/nand_bch.c	/^	unsigned int         *errloc;$/;"	m	struct:nand_bch_control	typeref:typename:unsigned int *	file:
errmr	drivers/block/sata_dwc.c	/^	u32 errmr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
errno	lib/errno.c	/^int errno = 0;$/;"	v	typeref:typename:int
errno	lib/zlib/zutil.h	/^#     define errno /;"	d
errno_message	lib/errno_str.c	/^static const char * const errno_message[] = {$/;"	v	typeref:typename:const char * const[]	file:
errno_str	include/errno.h	/^static inline const char *errno_str(int errno)$/;"	f	typeref:typename:const char *
errno_str	lib/errno_str.c	/^const char *errno_str(int errno)$/;"	f	typeref:typename:const char *
errnum	fs/reiserfs/reiserfs.c	/^static reiserfs_error_t errnum = ERR_NONE;$/;"	v	typeref:typename:reiserfs_error_t	file:
erroneous	drivers/mtd/ubi/ubi.h	/^	struct rb_root erroneous;$/;"	m	struct:ubi_device	typeref:struct:rb_root
erroneous_peb_count	drivers/mtd/ubi/ubi.h	/^	int erroneous_peb_count;$/;"	m	struct:ubi_device	typeref:typename:int
error	drivers/block/sata_dwc.c	/^	struct dmareg error;$/;"	m	struct:dma_interrupt_regs	typeref:struct:dmareg	file:
error	drivers/crypto/fsl/error.c	/^		const char *error;$/;"	m	struct:caam_jr_strstatus::stat_src	typeref:typename:const char *	file:
error	drivers/usb/emul/sandbox_flash.c	/^	bool error;$/;"	m	struct:sandbox_flash_priv	typeref:typename:bool	file:
error	include/common.h	/^#define error(/;"	d
error	include/fis.h	/^	u8 error;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
error	include/fis.h	/^	u8 error;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
error	include/jffs2/mini_inflate.h	/^	int error;$/;"	m	struct:bitstream	typeref:typename:int
error	include/vxworks.h	/^	u32 error;	\/* must be zero *\/$/;"	m	struct:e820info	typeref:typename:u32
error	test/py/multiplexed_log.py	/^    def error(self, msg):$/;"	m	class:Logfile
error	tools/bmp_logo.c	/^int error (char * msg, FILE *fp)$/;"	f	typeref:typename:int
error	tools/gdb/remote.c	/^#define error /;"	d	file:
error	tools/proftool.c	/^#define error(/;"	d	file:
error_action	include/fsl-mc/fsl_dpni.h	/^	enum dpni_error_action	error_action;$/;"	m	struct:dpni_error_cfg	typeref:enum:dpni_error_action
error_addr	drivers/block/pata_bfin.h	/^	unsigned long error_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
error_addr	drivers/block/sata_dwc.h	/^	void __iomem		*error_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
error_addr	drivers/block/sata_sil3114.h	/^	unsigned long error_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
error_code	arch/arm/include/asm/processor.h	/^	unsigned long			error_code;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
error_code	arch/mips/include/asm/processor.h	/^	unsigned long error_code;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
error_code	arch/x86/include/asm/me_common.h	/^	u32 error_code:4;$/;"	m	struct:me_hfs	typeref:typename:u32:4
error_code	arch/x86/lib/bios.h	/^	uint32_t error_code;$/;"	m	struct:eregs	typeref:typename:uint32_t
error_count	drivers/usb/host/isp116x.h	/^	u16 error_count;$/;"	m	struct:isp116x_ep	typeref:typename:u16
error_entry	fs/yaffs2/yaffs_error.c	/^struct error_entry {$/;"	s	file:
error_group	drivers/ddr/altera/sequencer.h	/^	uint32_t error_group;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
error_handling	include/ext_common.h	/^	__le16 error_handling;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
error_jmp_buf	common/kgdb.c	/^static long error_jmp_buf[BUFMAX\/2];$/;"	v	typeref:typename:long[]	file:
error_list	fs/yaffs2/yaffs_error.c	/^static const struct error_entry error_list[] = {$/;"	v	typeref:typename:const struct error_entry[]	file:
error_location	include/linux/mtd/omap_elm.h	/^	struct location  error_location[ELM_MAX_CHANNELS]; \/* 0x800,0x900 ... *\/$/;"	m	struct:elm	typeref:struct:location[]
error_location_x	include/linux/mtd/omap_elm.h	/^	u32 error_location_x[ELM_MAX_ERROR_COUNT]; \/* 0x880, 0x980, .. *\/$/;"	m	struct:location	typeref:typename:u32[]
error_msg	common/cli_hush.c	/^#define error_msg /;"	d	file:
error_stage	drivers/ddr/altera/sequencer.h	/^	uint32_t error_stage;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
error_substage	drivers/ddr/altera/sequencer.h	/^	uint32_t error_substage;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
error_text	drivers/crypto/fsl/error.c	/^	const char *error_text;$/;"	m	struct:__anondbc054120108	typeref:typename:const char *	file:
errors	drivers/net/e1000.h	/^	uint8_t errors;		\/* Descriptor Errors *\/$/;"	m	struct:e1000_rx_desc	typeref:typename:uint8_t
errors	include/fsl-mc/fsl_dpni.h	/^	uint32_t		errors;$/;"	m	struct:dpni_error_cfg	typeref:typename:uint32_t
errors	tools/buildman/test.py	/^errors = [$/;"	v
errors_only	include/fsl-mc/fsl_dpni.h	/^	int			errors_only;$/;"	m	struct:dpni_tx_conf_attr	typeref:typename:int
errors_only	include/fsl-mc/fsl_dpni.h	/^	int			errors_only;$/;"	m	struct:dpni_tx_conf_cfg	typeref:typename:int
errstat	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 errstat;		\/* 0x20 Error and status *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
errstat	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 errstat;		\/* 0x22 Error and status *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
errstat	include/linux/mtd/nand.h	/^	int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * this,int state,int status,int page)
erst	drivers/usb/host/xhci.h	/^	struct xhci_erst erst;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_erst
erst_base	drivers/usb/host/xhci.h	/^	volatile __le64	erst_base;$/;"	m	struct:xhci_intr_reg	typeref:typename:volatile __le64
erst_dequeue	drivers/usb/host/xhci.h	/^	volatile __le64	erst_dequeue;$/;"	m	struct:xhci_intr_reg	typeref:typename:volatile __le64
erst_size	drivers/usb/host/xhci.h	/^	unsigned int		erst_size;$/;"	m	struct:xhci_erst	typeref:typename:unsigned int
erst_size	drivers/usb/host/xhci.h	/^	volatile __le32	erst_size;$/;"	m	struct:xhci_intr_reg	typeref:typename:volatile __le32
ertcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ertcsr;	\/* Port error rate threshold CSR *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32
ertcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ertcsr;	        \/* 0xc066C - Port 0 error rate threshold status register*\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
es	arch/m68k/include/asm/coldfire/edma.h	/^	u32 es;			\/* 0x04 Error Status Register *\/$/;"	m	struct:edma_ctrl	typeref:typename:u32
es	drivers/bios_emulator/include/biosemu.h	/^	u16 es;$/;"	m	struct:__anon964d10140808	typeref:typename:u16
esa	drivers/net/ne2000_base.h	/^	u8 esa[6];$/;"	m	struct:dp83902a_priv_data	typeref:typename:u8[6]
esa_lsb	drivers/net/greth.h	/^	volatile unsigned int esa_lsb;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
esa_lsb	include/grlib/greth.h	/^	volatile unsigned int esa_lsb;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
esa_mctrl1_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct mctrl_setup esa_mctrl1_cfg = {$/;"	v	typeref:struct:mctrl_setup
esa_mctrl2_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct mctrl_setup esa_mctrl2_cfg = {$/;"	v	typeref:struct:mctrl_setup
esa_msb	drivers/net/greth.h	/^	volatile unsigned int esa_msb;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
esa_msb	include/grlib/greth.h	/^	volatile unsigned int esa_msb;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
esai	arch/arm/dts/imx6qdl.dtsi	/^				esai: esai@02024000 {$/;"	l
esai	arch/arm/dts/imx6ull.dtsi	/^				esai: esai@02024000 {$/;"	l	label:aips1
esbc_validate_help_text	board/freescale/common/cmd_esbc_validate.c	/^static char esbc_validate_help_text[] =$/;"	v	typeref:typename:char[]	file:
esc	drivers/serial/serial_mxc.c	/^	u32 esc;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
esc_clk	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned long			esc_clk;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned long
escape	drivers/input/input.c	/^	char *escape;$/;"	m	struct:__anon5f1be7330208	typeref:typename:char *	file:
escape	scripts/kconfig/kxgettext.c	/^static char *escape(const char* text, char *bf, int len)$/;"	f	typeref:typename:char *	file:
escapeseq	disk/part_iso.h	/^	unsigned char escapeseq[32];\/* Escape sequences *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[32]
escmode	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	escmode;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
esd	arch/x86/include/asm/arch-quark/quark.h	/^	u32	esd;$/;"	m	struct:quark_rcba	typeref:typename:u32
esd	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	esd;$/;"	m	struct:tnc_rcba	typeref:typename:u32
esd405ep_nand_device_ready	board/esd/common/esd405ep_nand.c	/^static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo)$/;"	f	typeref:typename:int	file:
esd405ep_nand_hwcontrol	board/esd/common/esd405ep_nand.c	/^static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
esd_mmdc_regs	arch/arm/imx-common/cpu.c	/^struct esd_mmdc_regs {$/;"	s	file:
esdc_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct esdc_regs {$/;"	s
esdc_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct esdc_regs {$/;"	s
esdcdly	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdcdly[5];$/;"	m	struct:esdc_regs	typeref:typename:u32[5]
esdcdlyl	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdcdlyl;$/;"	m	struct:esdc_regs	typeref:typename:u32
esdcfg0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 esdcfg0;$/;"	m	struct:esdramc_regs	typeref:typename:u32
esdcfg0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdcfg0;$/;"	m	struct:esdc_regs	typeref:typename:u32
esdcfg1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 esdcfg1;$/;"	m	struct:esdramc_regs	typeref:typename:u32
esdcfg1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdcfg1;$/;"	m	struct:esdc_regs	typeref:typename:u32
esdctl0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 esdctl0;$/;"	m	struct:esdramc_regs	typeref:typename:u32
esdctl0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdctl0;$/;"	m	struct:esdc_regs	typeref:typename:u32
esdctl1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 esdctl1;$/;"	m	struct:esdramc_regs	typeref:typename:u32
esdctl1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdctl1;$/;"	m	struct:esdc_regs	typeref:typename:u32
esdhc	arch/arm/dts/ls1021a.dtsi	/^		esdhc: esdhc@1560000 {$/;"	l
esdhc_base	include/fsl_esdhc.h	/^	phys_addr_t esdhc_base;$/;"	m	struct:fsl_esdhc_cfg	typeref:typename:phys_addr_t
esdhc_cfg	board/denx/m53evk/m53evk.c	/^struct fsl_esdhc_cfg esdhc_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg
esdhc_cfg	board/freescale/ls1021aqds/ls1021aqds.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/freescale/ls1021atwr/ls1021atwr.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/freescale/mx25pdk/mx25pdk.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/freescale/mx35pdk/mx35pdk.c	/^struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};$/;"	v	typeref:struct:fsl_esdhc_cfg
esdhc_cfg	board/freescale/mx51evk/mx51evk.c	/^struct fsl_esdhc_cfg esdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
esdhc_cfg	board/freescale/mx53ard/mx53ard.c	/^struct fsl_esdhc_cfg esdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
esdhc_cfg	board/freescale/mx53evk/mx53evk.c	/^struct fsl_esdhc_cfg esdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
esdhc_cfg	board/freescale/mx53loco/mx53loco.c	/^struct fsl_esdhc_cfg esdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
esdhc_cfg	board/freescale/mx53smd/mx53smd.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/freescale/s32v234evb/s32v234evb.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/freescale/vf610twr/vf610twr.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/inversepath/usbarmory/usbarmory.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/phytec/pcm052/pcm052.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/technologic/ts4800/ts4800.c	/^struct fsl_esdhc_cfg esdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
esdhc_cfg	board/toradex/colibri_vf/colibri_vf.c	/^struct fsl_esdhc_cfg esdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
esdhc_cfg	board/woodburn/woodburn.c	/^struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};$/;"	v	typeref:struct:fsl_esdhc_cfg
esdhc_clock_control	drivers/mmc/fsl_esdhc.c	/^static void esdhc_clock_control(struct mmc *mmc, bool enable)$/;"	f	typeref:typename:void	file:
esdhc_clrbits32	include/fsl_esdhc.h	/^#define esdhc_clrbits32	/;"	d
esdhc_clrbits32	include/fsl_esdhc.h	/^#define esdhc_clrbits32 /;"	d
esdhc_clrsetbits32	include/fsl_esdhc.h	/^#define esdhc_clrsetbits32	/;"	d
esdhc_clrsetbits32	include/fsl_esdhc.h	/^#define esdhc_clrsetbits32 /;"	d
esdhc_disables_uart0	board/freescale/mpc8569mds/mpc8569mds.c	/^static int esdhc_disables_uart0(void)$/;"	f	typeref:typename:int	file:
esdhc_getcd	drivers/mmc/fsl_esdhc.c	/^static int esdhc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
esdhc_init	drivers/mmc/fsl_esdhc.c	/^static int esdhc_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
esdhc_ops	drivers/mmc/fsl_esdhc.c	/^static const struct mmc_ops esdhc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
esdhc_pio_read_write	drivers/mmc/fsl_esdhc.c	/^esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)$/;"	f	typeref:typename:void	file:
esdhc_read32	include/fsl_esdhc.h	/^#define esdhc_read32	/;"	d
esdhc_read32	include/fsl_esdhc.h	/^#define esdhc_read32 /;"	d
esdhc_regs	drivers/mmc/fsl_esdhc.c	/^	struct fsl_esdhc *esdhc_regs;$/;"	m	struct:fsl_esdhc_priv	typeref:struct:fsl_esdhc *	file:
esdhc_reset	drivers/mmc/fsl_esdhc.c	/^static void esdhc_reset(struct fsl_esdhc *regs)$/;"	f	typeref:typename:void	file:
esdhc_send_cmd	drivers/mmc/fsl_esdhc.c	/^esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
esdhc_set_ios	drivers/mmc/fsl_esdhc.c	/^static void esdhc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
esdhc_setbits32	include/fsl_esdhc.h	/^#define esdhc_setbits32	/;"	d
esdhc_setbits32	include/fsl_esdhc.h	/^#define esdhc_setbits32 /;"	d
esdhc_setup_data	drivers/mmc/fsl_esdhc.c	/^static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
esdhc_write32	include/fsl_esdhc.h	/^#define esdhc_write32	/;"	d
esdhc_write32	include/fsl_esdhc.h	/^#define esdhc_write32 /;"	d
esdhc_xfertyp	drivers/mmc/fsl_esdhc.c	/^static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:uint	file:
esdmisc	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 esdmisc;$/;"	m	struct:esdramc_regs	typeref:typename:u32
esdmisc	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	esdmisc;$/;"	m	struct:esdc_regs	typeref:typename:u32
esdramc_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct esdramc_regs {$/;"	s
esdramc_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct esdramc_regs {$/;"	s
eserial1_device	drivers/serial/serial_ns16550.c	/^struct serial_device eserial1_device =$/;"	v	typeref:struct:serial_device
eserial2_device	drivers/serial/serial_ns16550.c	/^struct serial_device eserial2_device =$/;"	v	typeref:struct:serial_device
eserial3_device	drivers/serial/serial_ns16550.c	/^struct serial_device eserial3_device =$/;"	v	typeref:struct:serial_device
eserial4_device	drivers/serial/serial_ns16550.c	/^struct serial_device eserial4_device =$/;"	v	typeref:struct:serial_device
eserial5_device	drivers/serial/serial_ns16550.c	/^struct serial_device eserial5_device =$/;"	v	typeref:struct:serial_device
eserial6_device	drivers/serial/serial_ns16550.c	/^struct serial_device eserial6_device =$/;"	v	typeref:struct:serial_device
esgmiiselcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 esgmiiselcr;\/* 0x020 Ethernet Switch SGMII Select Control reg *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
esi	arch/x86/include/asm/ptrace.h	/^	long esi;$/;"	m	struct:irq_regs	typeref:typename:long
esi	arch/x86/include/asm/ptrace.h	/^	long esi;$/;"	m	struct:pt_regs	typeref:typename:long
esi	drivers/bios_emulator/include/biosemu.h	/^	u32 esi;$/;"	m	struct:__anon964d10140208	typeref:typename:u32
esp	arch/x86/include/asm/ptrace.h	/^	long esp;$/;"	m	struct:irq_regs	typeref:typename:long
esp	arch/x86/include/asm/ptrace.h	/^	long esp;$/;"	m	struct:pt_regs	typeref:typename:long
esp8089	arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts	/^	esp8089: sdio_wifi@1 {$/;"	l
esp8089	arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts	/^	esp8089: sdio_wifi@1 {$/;"	l
espi	drivers/spi/fsl_espi.c	/^	ccsr_espi_t	*espi;$/;"	m	struct:fsl_spi_slave	typeref:typename:ccsr_espi_t *	file:
esr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	esr;		\/* 0xC0 Edge Select Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
esr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 esr;		\/* 0x10 Error Status *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
esr	arch/powerpc/include/asm/immap_512x.h	/^	u32 esr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
esr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 esr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
established_timings	include/edid.h	/^	unsigned char established_timings[3];$/;"	m	struct:edid1_info	typeref:typename:unsigned char[3]
esub_ccu_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct ccu_clock esub_ccu_clk = {$/;"	v	typeref:struct:ccu_clock	file:
esub_ccu_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct ccu_clock esub_ccu_clk = {$/;"	v	typeref:struct:ccu_clock	file:
esub_freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^unsigned long esub_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
esub_freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^unsigned long esub_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
et1011c_config	drivers/net/phy/et1011c.c	/^static int et1011c_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
et1011c_driver	drivers/net/phy/et1011c.c	/^static struct phy_driver et1011c_driver = {$/;"	v	typeref:struct:phy_driver	file:
et1011c_get_link_speed	arch/arm/mach-davinci/et1011c.c	/^int et1011c_get_link_speed(int phy_addr)$/;"	f	typeref:typename:int
et1011c_parse_status	drivers/net/phy/et1011c.c	/^static int et1011c_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
et1011c_startup	drivers/net/phy/et1011c.c	/^static int et1011c_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
et_ctl	include/net.h	/^	u8		et_ctl;		\/* 802 control			*\/$/;"	m	struct:e802_hdr	typeref:typename:u8
et_dest	include/net.h	/^	u8		et_dest[6];	\/* Destination node		*\/$/;"	m	struct:e802_hdr	typeref:typename:u8[6]
et_dest	include/net.h	/^	u8		et_dest[6];	\/* Destination node		*\/$/;"	m	struct:ethernet_hdr	typeref:typename:u8[6]
et_dsap	include/net.h	/^	u8		et_dsap;	\/* 802 DSAP			*\/$/;"	m	struct:e802_hdr	typeref:typename:u8
et_prot	include/net.h	/^	u16		et_prot;	\/* 802 protocol			*\/$/;"	m	struct:e802_hdr	typeref:typename:u16
et_protlen	include/net.h	/^	u16		et_protlen;	\/* Protocol or length		*\/$/;"	m	struct:e802_hdr	typeref:typename:u16
et_protlen	include/net.h	/^	u16		et_protlen;	\/* Protocol or length		*\/$/;"	m	struct:ethernet_hdr	typeref:typename:u16
et_snap1	include/net.h	/^	u8		et_snap1;	\/* SNAP				*\/$/;"	m	struct:e802_hdr	typeref:typename:u8
et_snap2	include/net.h	/^	u8		et_snap2;$/;"	m	struct:e802_hdr	typeref:typename:u8
et_snap3	include/net.h	/^	u8		et_snap3;$/;"	m	struct:e802_hdr	typeref:typename:u8
et_src	include/net.h	/^	u8		et_src[6];	\/* Source node			*\/$/;"	m	struct:e802_hdr	typeref:typename:u8[6]
et_src	include/net.h	/^	u8		et_src[6];	\/* Source node			*\/$/;"	m	struct:ethernet_hdr	typeref:typename:u8[6]
et_ssap	include/net.h	/^	u8		et_ssap;	\/* 802 SSAP			*\/$/;"	m	struct:e802_hdr	typeref:typename:u8
etags	Makefile	/^etags:$/;"	t
etclr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short etclr;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
etctiming	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int etctiming;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
etdsr	arch/m68k/include/asm/fec.h	/^	u32 etdsr;		\/* 0x3D4 *\/$/;"	m	struct:fec	typeref:typename:u32
etdsr	drivers/net/fec_mxc.h	/^	uint32_t etdsr;			\/* MBAR_ETH + 0x184 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
etext	arch/m68k/cpu/u-boot.lds	/^	PROVIDE (etext = .);$/;"	s	assignment:provide
etext	arch/nios2/cpu/u-boot.lds	/^	PROVIDE (etext = .);$/;"	s	assignment:provide
etext	arch/powerpc/cpu/mpc5xx/u-boot.lds	/^  PROVIDE (etext = .);$/;"	s	assignment:provide
etext	arch/powerpc/cpu/mpc85xx/u-boot-nand.lds	/^    PROVIDE (etext = .);$/;"	s	assignment:provide
etext	arch/powerpc/cpu/mpc85xx/u-boot.lds	/^    PROVIDE (etext = .);$/;"	s	assignment:provide
etext	arch/powerpc/cpu/mpc86xx/u-boot.lds	/^    PROVIDE (etext = .);$/;"	s	assignment:provide
etext	arch/powerpc/cpu/ppc4xx/u-boot.lds	/^    PROVIDE (etext = .);$/;"	s	assignment:provide
etext	board/amcc/canyonlands/u-boot-ram.lds	/^  PROVIDE (etext = .);$/;"	s	assignment:provide
etext	board/amcc/sequoia/u-boot-ram.lds	/^  PROVIDE (etext = .);$/;"	s	assignment:provide
etext	board/tqc/tqm8xx/u-boot.lds	/^  PROVIDE (etext = .);$/;"	s	assignment:provide
etflg	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short etflg;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
etfrc	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short etfrc;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
eth	drivers/net/fec_mxc.h	/^	struct ethernet_regs *eth;	\/* pointer to register'S base *\/$/;"	m	struct:fec_priv	typeref:struct:ethernet_regs *
eth	drivers/net/mpc512x_fec.h	/^	volatile fec512x_t *eth;$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:volatile fec512x_t *
eth	drivers/net/mpc5xxx_fec.h	/^	ethernet_regs *eth;$/;"	m	struct:__anone13c4dc90308	typeref:typename:ethernet_regs *
eth0	arch/arm/dts/armada-370-xp.dtsi	/^			eth0: ethernet@70000 {$/;"	l
eth0	arch/arm/dts/armada-375.dtsi	/^				eth0: eth0@c4000 {$/;"	l
eth0	arch/arm/dts/armada-37xx.dtsi	/^			eth0: neta@30000 {$/;"	l
eth0	arch/arm/dts/armada-38x.dtsi	/^			eth0: ethernet@70000 {$/;"	l
eth1	arch/arm/dts/armada-370-xp.dtsi	/^			eth1: ethernet@74000 {$/;"	l
eth1	arch/arm/dts/armada-375.dtsi	/^				eth1: eth1@c5000 {$/;"	l
eth1	arch/arm/dts/armada-37xx.dtsi	/^			eth1: neta@40000 {$/;"	l
eth1	arch/arm/dts/armada-38x.dtsi	/^			eth1: ethernet@30000 {$/;"	l
eth2	arch/arm/dts/armada-38x.dtsi	/^			eth2: ethernet@34000 {$/;"	l
eth2	arch/arm/dts/armada-xp.dtsi	/^			eth2: ethernet@30000 {$/;"	l
eth3	arch/arm/dts/armada-xp-mv78260.dtsi	/^			eth3: ethernet@34000 {$/;"	l
eth3	arch/arm/dts/armada-xp-mv78460.dtsi	/^			eth3: ethernet@34000 {$/;"	l
eth_3	arch/sandbox/dts/test.dts	/^	eth_3: sbe5 {$/;"	l
eth_5	arch/sandbox/dts/test.dts	/^	eth_5: eth@10003000 {$/;"	l
eth_addr	board/mpl/common/common_util.h	/^	char eth_addr[21];	\/* "00:60:C2:0a:00:00" *\/$/;"	m	struct:__anondef55e280108	typeref:typename:char[21]
eth_addr	include/configs/tam3517-common.h	/^	unsigned char eth_addr[4][8];$/;"	m	struct:tam3517_module_info	typeref:typename:unsigned char[4][8]
eth_bind	drivers/usb/gadget/ether.c	/^static int eth_bind(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
eth_clk_rx_clk_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_clk_rx_clk_pins[]	= { PIN(GPIOZ_2, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_common_init	net/eth_common.c	/^void eth_common_init(void)$/;"	f	typeref:typename:void
eth_config	drivers/usb/gadget/ether.c	/^eth_config = {$/;"	v	typeref:struct:usb_config_descriptor	file:
eth_ctrl	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 eth_ctrl;		\/* offset 0x50 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
eth_ctrl	board/amcc/canyonlands/canyonlands.c	/^	u8	eth_ctrl;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
eth_current	net/eth_legacy.c	/^struct eth_device *eth_current;$/;"	v	typeref:struct:eth_device *
eth_current_changed	net/eth_common.c	/^void eth_current_changed(void)$/;"	f	typeref:typename:void
eth_dev	drivers/usb/gadget/ether.c	/^struct eth_dev {$/;"	s	file:
eth_device	include/net.h	/^struct eth_device {$/;"	s
eth_device_priv	net/eth-uclass.c	/^struct eth_device_priv {$/;"	s	file:
eth_devices	net/eth_legacy.c	/^static struct eth_device *eth_devices;$/;"	v	typeref:struct:eth_device *	file:
eth_disconnect	drivers/usb/gadget/ether.c	/^static void eth_disconnect(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
eth_dma	drivers/net/bcm-sf2-eth.h	/^struct eth_dma {$/;"	s
eth_dma_desc	drivers/net/pic32_eth.h	/^struct eth_dma_desc {$/;"	s
eth_dma_regs	drivers/net/designware.h	/^struct eth_dma_regs {$/;"	s
eth_driver	drivers/usb/gadget/ether.c	/^static struct usb_gadget_driver eth_driver = {$/;"	v	typeref:struct:usb_gadget_driver	file:
eth_driver	drivers/usb/gadget/ether.c	/^static struct usb_gadget_driver eth_driver;$/;"	v	typeref:struct:usb_gadget_driver	file:
eth_dump_regs	drivers/net/armada100_fec.c	/^static int eth_dump_regs(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
eth_errno	net/eth-uclass.c	/^static int eth_errno;$/;"	v	typeref:typename:int	file:
eth_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 eth_freq;		\/* offset 0x24 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
eth_get_dev	include/net.h	/^static __always_inline struct eth_device *eth_get_dev(void)$/;"	f	typeref:typename:__always_inline struct eth_device *
eth_get_dev	net/eth-uclass.c	/^struct udevice *eth_get_dev(void)$/;"	f	typeref:struct:udevice *
eth_get_dev_by_index	net/eth_legacy.c	/^struct eth_device *eth_get_dev_by_index(int index)$/;"	f	typeref:struct:eth_device *
eth_get_dev_by_name	net/eth-uclass.c	/^struct udevice *eth_get_dev_by_name(const char *devname)$/;"	f	typeref:struct:udevice *
eth_get_dev_by_name	net/eth_legacy.c	/^struct eth_device *eth_get_dev_by_name(const char *devname)$/;"	f	typeref:struct:eth_device *
eth_get_dev_index	net/eth-uclass.c	/^int eth_get_dev_index(void)$/;"	f	typeref:typename:int
eth_get_dev_index	net/eth_legacy.c	/^int eth_get_dev_index(void)$/;"	f	typeref:typename:int
eth_get_ethaddr	include/net.h	/^static inline unsigned char *eth_get_ethaddr(void)$/;"	f	typeref:typename:unsigned char *
eth_get_ethaddr	net/eth-uclass.c	/^unsigned char *eth_get_ethaddr(void)$/;"	f	typeref:typename:unsigned char *
eth_get_name	net/eth_common.c	/^const char *eth_get_name(void)$/;"	f	typeref:typename:const char *
eth_get_ops	include/net.h	/^#define eth_get_ops(/;"	d
eth_get_uclass_priv	net/eth-uclass.c	/^static struct eth_uclass_priv *eth_get_uclass_priv(void)$/;"	f	typeref:struct:eth_uclass_priv *	file:
eth_getenv_enetaddr	net/eth_common.c	/^int eth_getenv_enetaddr(const char *name, uchar *enetaddr)$/;"	f	typeref:typename:int
eth_getenv_enetaddr_by_index	net/eth_common.c	/^int eth_getenv_enetaddr_by_index(const char *base_name, int index,$/;"	f	typeref:typename:int
eth_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const eth_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
eth_halt	net/eth-uclass.c	/^void eth_halt(void)$/;"	f	typeref:typename:void
eth_halt	net/eth_legacy.c	/^void eth_halt(void)$/;"	f	typeref:typename:void
eth_halt_state_only	include/net.h	/^static __always_inline void eth_halt_state_only(void)$/;"	f	typeref:typename:__always_inline void
eth_halt_state_only	net/eth-uclass.c	/^void eth_halt_state_only(void)$/;"	f	typeref:typename:void
eth_idscpp	drivers/net/armada100_fec.h	/^	u32 *eth_idscpp[4];		\/* Eth0 IP Differentiated Services Code$/;"	m	struct:armdfec_reg	typeref:typename:u32 * [4]
eth_if	include/fsl-mc/fsl_dpmac.h	/^	enum dpmac_eth_if	eth_if;$/;"	m	struct:dpmac_attr	typeref:enum:dpmac_eth_if
eth_info	drivers/net/bcm-sf2-eth.h	/^struct eth_info {$/;"	s
eth_init	net/eth-uclass.c	/^int eth_init(void)$/;"	f	typeref:typename:int
eth_init	net/eth_legacy.c	/^int eth_init(void)$/;"	f	typeref:typename:int
eth_init_ar933x	arch/mips/mach-ath79/reset.c	/^static int eth_init_ar933x(void)$/;"	f	typeref:typename:int	file:
eth_init_ar934x	arch/mips/mach-ath79/reset.c	/^static int eth_init_ar934x(void)$/;"	f	typeref:typename:int	file:
eth_init_board	arch/arm/include/asm/arch-sunxi/sys_proto.h	/^static inline void eth_init_board(void) {}$/;"	f	typeref:typename:void
eth_init_board	arch/arm/include/asm/arch/sys_proto.h	/^static inline void eth_init_board(void) {}$/;"	f	typeref:typename:void
eth_init_board	board/sunxi/gmac.c	/^void eth_init_board(void)$/;"	f	typeref:typename:void
eth_init_qca953x	arch/mips/mach-ath79/reset.c	/^static int eth_init_qca953x(void)$/;"	f	typeref:typename:int	file:
eth_init_state_only	include/net.h	/^static __always_inline int eth_init_state_only(void)$/;"	f	typeref:typename:__always_inline int
eth_init_state_only	net/eth-uclass.c	/^int eth_init_state_only(void)$/;"	f	typeref:typename:int
eth_initialize	net/eth-uclass.c	/^int eth_initialize(void)$/;"	f	typeref:typename:int
eth_initialize	net/eth_legacy.c	/^int eth_initialize(void)$/;"	f	typeref:typename:int
eth_io_copy_and_sum	arch/arm/include/asm/io.h	/^#define eth_io_copy_and_sum(/;"	d
eth_io_copy_and_sum	arch/nds32/include/asm/io.h	/^#define eth_io_copy_and_sum(/;"	d
eth_io_copy_and_sum	arch/sh/include/asm/io.h	/^#define eth_io_copy_and_sum(/;"	d
eth_is_active	net/eth-uclass.c	/^int eth_is_active(struct udevice *dev)$/;"	f	typeref:typename:int
eth_is_active	net/eth_legacy.c	/^int eth_is_active(struct eth_device *dev)$/;"	f	typeref:typename:int
eth_is_on_demand_init	include/net.h	/^static __always_inline int eth_is_on_demand_init(void)$/;"	f	typeref:typename:__always_inline int
eth_is_promisc	drivers/usb/gadget/ether.c	/^static inline int eth_is_promisc(struct eth_dev *dev)$/;"	f	typeref:typename:int	file:
eth_loopback_test	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^eth_loopback_test (void)$/;"	f	typeref:typename:void
eth_mac_regs	drivers/net/designware.h	/^struct eth_mac_regs {$/;"	s
eth_mac_skip	net/eth_common.c	/^int eth_mac_skip(int index)$/;"	f	typeref:typename:int
eth_mcast_join	net/eth_legacy.c	/^int eth_mcast_join(struct in_addr mcast_ip, int join)$/;"	f	typeref:typename:int
eth_mdc_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_mdc_pins[]	= { PIN(GPIOZ_1, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_mdio_enable	drivers/net/davinci_emac.c	/^void eth_mdio_enable(void)$/;"	f	typeref:typename:void
eth_mdio_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_mdio_pins[]	= { PIN(GPIOZ_0, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_ops	include/net.h	/^struct eth_ops {$/;"	s
eth_parse_enetaddr	net/eth_common.c	/^void eth_parse_enetaddr(const char *addr, uchar *enetaddr)$/;"	f	typeref:typename:void
eth_pdata	drivers/net/designware.h	/^	struct eth_pdata eth_pdata;$/;"	m	struct:dw_eth_pdata	typeref:struct:eth_pdata
eth_pdata	include/dm/platform_data/net_ethoc.h	/^	struct eth_pdata eth_pdata;$/;"	m	struct:ethoc_eth_pdata	typeref:struct:eth_pdata
eth_pdata	include/net.h	/^struct eth_pdata {$/;"	s
eth_phy_pwr	arch/arm/dts/rk3288-miniarm.dtsi	/^		eth_phy_pwr: eth-phy-pwr {$/;"	l
eth_phy_rst_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux eth_phy_rst_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
eth_pins	arch/arm/dts/meson-gxbb.dtsi	/^				eth_pins: eth_c {$/;"	l	label:periphs.pinctrl_periphs
eth_post_bind	net/eth-uclass.c	/^static int eth_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eth_post_probe	net/eth-uclass.c	/^static int eth_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eth_pre_remove	net/eth-uclass.c	/^static int eth_pre_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eth_pre_unbind	net/eth-uclass.c	/^static int eth_pre_unbind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eth_priv_cfg	board/ti/ks2_evm/board_k2e.c	/^struct eth_priv_t eth_priv_cfg[] = {$/;"	v	typeref:struct:eth_priv_t[]
eth_priv_cfg	board/ti/ks2_evm/board_k2g.c	/^struct eth_priv_t eth_priv_cfg[] = {$/;"	v	typeref:struct:eth_priv_t[]
eth_priv_cfg	board/ti/ks2_evm/board_k2hk.c	/^struct eth_priv_t eth_priv_cfg[] = {$/;"	v	typeref:struct:eth_priv_t[]
eth_priv_cfg	board/ti/ks2_evm/board_k2l.c	/^struct eth_priv_t eth_priv_cfg[] = {$/;"	v	typeref:struct:eth_priv_t[]
eth_priv_t	arch/arm/include/asm/ti-common/keystone_net.h	/^struct eth_priv_t {$/;"	s
eth_rcv_bufs	net/eth_legacy.c	/^} eth_rcv_bufs[PKTBUFSRX];$/;"	v	typeref:struct:__anon71b287410108[]
eth_rcv_current	net/eth_legacy.c	/^static unsigned int eth_rcv_current, eth_rcv_last;$/;"	v	typeref:typename:unsigned int	file:
eth_rcv_last	net/eth_legacy.c	/^static unsigned int eth_rcv_current, eth_rcv_last;$/;"	v	typeref:typename:unsigned int	file:
eth_receive	net/eth_legacy.c	/^int eth_receive(void *packet, int length)$/;"	f	typeref:typename:int
eth_recv_flags	include/net.h	/^enum eth_recv_flags {$/;"	g
eth_register	net/eth_legacy.c	/^int eth_register(struct eth_device *dev)$/;"	f	typeref:typename:int
eth_reset_config	drivers/usb/gadget/ether.c	/^static void eth_reset_config(struct eth_dev *dev)$/;"	f	typeref:typename:void	file:
eth_resume	drivers/usb/gadget/ether.c	/^static void eth_resume(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
eth_rgmii_tx_clk_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_rx	net/eth-uclass.c	/^int eth_rx(void)$/;"	f	typeref:typename:int
eth_rx	net/eth_legacy.c	/^int eth_rx(void)$/;"	f	typeref:typename:int
eth_rx_dv_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_rx_dv_pins[]	= { PIN(GPIOZ_3, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_rxd0_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_rxd0_pins[]	= { PIN(GPIOZ_4, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_rxd1_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_rxd1_pins[]	= { PIN(GPIOZ_5, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_rxd2_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_rxd2_pins[]	= { PIN(GPIOZ_6, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_rxd3_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_rxd3_pins[]	= { PIN(GPIOZ_7, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_sandbox_priv	drivers/net/sandbox.c	/^struct eth_sandbox_priv {$/;"	s	file:
eth_sandbox_raw_priv	arch/sandbox/include/asm/eth-raw-os.h	/^struct eth_sandbox_raw_priv {$/;"	s
eth_save_packet	net/eth_legacy.c	/^static void eth_save_packet(void *packet, int length)$/;"	f	typeref:typename:void	file:
eth_send	net/eth-uclass.c	/^int eth_send(void *packet, int length)$/;"	f	typeref:typename:int
eth_send	net/eth_legacy.c	/^int eth_send(void *packet, int length)$/;"	f	typeref:typename:int
eth_set_config	drivers/usb/gadget/ether.c	/^static int eth_set_config(struct eth_dev *dev, unsigned number,$/;"	f	typeref:typename:int	file:
eth_set_current	net/eth_common.c	/^void eth_set_current(void)$/;"	f	typeref:typename:void
eth_set_current_to_next	net/eth-uclass.c	/^void eth_set_current_to_next(void)$/;"	f	typeref:typename:void
eth_set_current_to_next	net/eth_legacy.c	/^void eth_set_current_to_next(void)$/;"	f	typeref:typename:void
eth_set_dev	net/eth-uclass.c	/^void eth_set_dev(struct udevice *dev)$/;"	f	typeref:typename:void
eth_set_dev	net/eth_legacy.c	/^void eth_set_dev(struct eth_device *dev)$/;"	f	typeref:typename:void
eth_set_last_protocol	include/net.h	/^static inline void eth_set_last_protocol(int protocol)$/;"	f	typeref:typename:void
eth_setenv_enetaddr	net/eth_common.c	/^int eth_setenv_enetaddr(const char *name, const uchar *enetaddr)$/;"	f	typeref:typename:int
eth_setenv_enetaddr_by_index	net/eth_common.c	/^int eth_setenv_enetaddr_by_index(const char *base_name, int index,$/;"	f	typeref:typename:int
eth_setup	drivers/usb/gadget/ether.c	/^eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
eth_setup_complete	drivers/usb/gadget/ether.c	/^static void eth_setup_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
eth_start	drivers/usb/gadget/ether.c	/^static void eth_start(struct eth_dev *dev, gfp_t gfp_flags)$/;"	f	typeref:typename:void	file:
eth_state_t	include/net.h	/^enum eth_state_t {$/;"	g
eth_status_complete	drivers/usb/gadget/ether.c	/^static void eth_status_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
eth_stop	drivers/usb/gadget/ether.c	/^static int eth_stop(struct eth_dev *dev)$/;"	f	typeref:typename:int	file:
eth_suspend	drivers/usb/gadget/ether.c	/^static void eth_suspend(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
eth_tp_mdix	include/linux/ethtool.h	/^	__u8	eth_tp_mdix;$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
eth_try_another	net/eth_common.c	/^void eth_try_another(int first_restart)$/;"	f	typeref:typename:void
eth_tx_en_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_tx_en_pins[]	= { PIN(GPIOZ_9, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_txd0_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_txd0_pins[]	= { PIN(GPIOZ_10, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_txd1_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_txd1_pins[]	= { PIN(GPIOZ_11, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_txd2_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_txd2_pins[]	= { PIN(GPIOZ_12, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_txd3_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int eth_txd3_pins[]	= { PIN(GPIOZ_13, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
eth_type	drivers/qe/uccf.h	/^	enet_type_e	eth_type;$/;"	m	struct:ucc_fast_info	typeref:typename:enet_type_e
eth_type_prio	drivers/net/mvgbe.h	/^	u32 eth_type_prio;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
eth_uclass_priv	net/eth-uclass.c	/^struct eth_uclass_priv {$/;"	s	file:
eth_unbind	drivers/usb/gadget/ether.c	/^static void eth_unbind(struct usb_gadget *gadget)$/;"	f	typeref:typename:void	file:
eth_unregister	net/eth_legacy.c	/^int eth_unregister(struct eth_device *dev)$/;"	f	typeref:typename:int
eth_validate_ethaddr_str	common/env_flags.c	/^int eth_validate_ethaddr_str(const char *addr)$/;"	f	typeref:typename:int
eth_vlan_p	drivers/net/armada100_fec.h	/^	u32 eth_vlan_p;			\/* Eth0 VLAN Priority Tag to Priority *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
eth_write_hwaddr	net/eth-uclass.c	/^static int eth_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
eth_write_hwaddr	net/eth_legacy.c	/^int eth_write_hwaddr(struct eth_device *dev, const char *base_name,$/;"	f	typeref:typename:int
ethaddr	drivers/usb/gadget/ether.c	/^static char ethaddr[2 * ETH_ALEN + 1];$/;"	v	typeref:typename:char[]	file:
ethaddr	include/ethsw.h	/^	uchar ethaddr[6];$/;"	m	struct:ethsw_command_def	typeref:typename:uchar[6]
ethaddr	include/lynxkdi.h	/^	uint8_t		ethaddr[6];	\/* Ethernet address		*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint8_t[6]
ethclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ethclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ether_address	drivers/usb/eth/mcs7830.c	/^	uint8_t ether_address[6];$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t[6]	file:
ether_crc	net/eth_legacy.c	/^u32 ether_crc(size_t len, unsigned char const *p)$/;"	f	typeref:typename:u32
ether_desc	drivers/usb/gadget/ether.c	/^static const struct usb_cdc_ether_desc ether_desc = {$/;"	v	typeref:typename:const struct usb_cdc_ether_desc	file:
ether_fcc_info	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	ether_fcc_info[] =$/;"	v	typeref:struct:ether_fcc_info_s[]
ether_fcc_info	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	ether_fcc_info[] =$/;"	v	typeref:struct:ether_fcc_info_s[]
ether_fcc_info	arch/powerpc/cpu/mpc8xx/fec.c	/^	ether_fcc_info[] = {$/;"	v	typeref:struct:ether_fcc_info_s[]
ether_fcc_info_s	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static struct ether_fcc_info_s$/;"	s	file:
ether_fcc_info_s	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static struct ether_fcc_info_s$/;"	s	file:
ether_fcc_info_s	arch/powerpc/cpu/mpc8xx/fec.c	/^static struct ether_fcc_info_s$/;"	s	file:
ether_index	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	int ether_index;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
ether_index	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	int ether_index;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
ether_index	arch/powerpc/cpu/mpc8xx/fec.c	/^	int ether_index;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
ether_mac_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct ether_mac_regs {$/;"	s
ether_mac_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct ether_mac_regs {$/;"	s
ether_mac_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct ether_mac_regs {$/;"	s
ether_mii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int ether_mii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
ether_mii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int ether_mii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
ether_mii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int ether_mii_muxvals[] = {8, 8, 8, 8, 10, 10, 10, 10, 10, 10, 10,$/;"	v	typeref:typename:const int[]	file:
ether_mii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int ether_mii_muxvals[] = {1, 2, 2, 2, 2, 2, 2, 2};$/;"	v	typeref:typename:const int[]	file:
ether_mii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int ether_mii_muxvals[] = {13, 13, 13, 13, 13, 13, 13, 13, 13, 13,$/;"	v	typeref:typename:const int[]	file:
ether_mii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned ether_mii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40,$/;"	v	typeref:typename:const unsigned[]	file:
ether_mii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned ether_mii_pins[] = {160, 161, 162, 163, 164, 165, 166,$/;"	v	typeref:typename:const unsigned[]	file:
ether_mii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned ether_mii_pins[] = {143, 144, 145, 146, 147, 148, 149,$/;"	v	typeref:typename:const unsigned[]	file:
ether_mii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned ether_mii_pins[] = {35, 107, 108, 109, 110, 111, 112,$/;"	v	typeref:typename:const unsigned[]	file:
ether_mii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned ether_mii_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 13, 14,$/;"	v	typeref:typename:const unsigned[]	file:
ether_post_halt	post/cpu/ppc4xx/ether.c	/^static void ether_post_halt (int devnum, int hw_addr)$/;"	f	typeref:typename:void	file:
ether_post_init	post/cpu/ppc4xx/ether.c	/^static void ether_post_init (int devnum, int hw_addr)$/;"	f	typeref:typename:void	file:
ether_post_recv	post/cpu/ppc4xx/ether.c	/^static int ether_post_recv (int devnum, int hw_addr, void *packet, int max_length)$/;"	f	typeref:typename:int	file:
ether_post_send	post/cpu/ppc4xx/ether.c	/^static void ether_post_send (int devnum, int hw_addr, void *packet, int length)$/;"	f	typeref:typename:void	file:
ether_post_test	drivers/net/bfin_mac.c	/^int ether_post_test(int flags)$/;"	f	typeref:typename:int
ether_post_test	post/cpu/mpc8xx/ether.c	/^int ether_post_test (int flags)$/;"	f	typeref:typename:int
ether_post_test	post/cpu/ppc4xx/ether.c	/^int ether_post_test (int flags)$/;"	f	typeref:typename:int
ether_rgmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
ether_rgmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
ether_rgmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
ether_rgmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int ether_rgmii_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,$/;"	v	typeref:typename:const int[]	file:
ether_rgmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned ether_rgmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 38,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rgmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rgmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned ether_rgmii_pins[] = {160, 161, 162, 163, 164, 165, 167,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rgmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int ether_rmii_muxvals[] = {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int ether_rmii_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int ether_rmii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int ether_rmii_muxvals[] = {8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int ether_rmii_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
ether_rmii_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int ether_rmii_muxvals[] = {13, 13, 13, 13, 13, 13, 13, 13, 13,$/;"	v	typeref:typename:const int[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned ether_rmii_pins[] = {6, 7, 8, 9, 10, 11, 12, 13, 14, 15,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned ether_rmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 39,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned ether_rmii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned ether_rmii_pins[] = {160, 161, 162, 165, 168, 169, 172,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned ether_rmii_pins[] = {35};$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmii_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned ether_rmii_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 13,$/;"	v	typeref:typename:const unsigned[]	file:
ether_rmiib_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int ether_rmiib_muxvals[] = {0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
ether_rmiib_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned ether_rmiib_pins[] = {161, 162, 165, 167, 168, 169, 172,$/;"	v	typeref:typename:const unsigned[]	file:
ethernet	arch/avr32/include/asm/setup.h	/^		struct tag_ethernet ethernet;$/;"	m	union:tag::__anon5c2aea39010a	typeref:struct:tag_ethernet
ethernet	arch/mips/dts/pic32mzda.dtsi	/^	ethernet: ethernet@1f882000 {$/;"	l
ethernet0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ethernet0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ethernet1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ethernet1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ethernet_hdr	include/net.h	/^struct ethernet_hdr {$/;"	s
ethernet_networking	include/usbdescriptors.h	/^		struct usb_class_ethernet_networking_descriptor ethernet_networking;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_ethernet_networking_descriptor
ethernet_phy	arch/arm/dts/am335x-rut.dts	/^        ethernet_phy: ethernet-phy@1 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-microzed.dts	/^	ethernet_phy: ethernet-phy@0 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-zc702.dts	/^	ethernet_phy: ethernet-phy@7 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-zc706.dts	/^	ethernet_phy: ethernet-phy@7 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-zc770-xm010.dts	/^	ethernet_phy: ethernet-phy@7 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-zc770-xm013.dts	/^	ethernet_phy: ethernet-phy@7 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-zed.dts	/^	ethernet_phy: ethernet-phy@0 {$/;"	l
ethernet_phy	arch/arm/dts/zynq-zybo.dts	/^	ethernet_phy: ethernet-phy@0 {$/;"	l
ethernet_phy	arch/mips/dts/pic32mzda_sk.dts	/^	ethernet_phy: lan8740_phy@0 {$/;"	l
ethernet_phy0	arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts	/^	ethernet_phy0: ethernet-phy@0 { \/* Marvell 88e1512 *\/$/;"	l
ethernet_phy3	arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts	/^	ethernet_phy3: ethernet-phy@3 { \/* Realtek RTL8211DN *\/$/;"	l
ethernet_phy7	arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts	/^	ethernet_phy7: ethernet-phy@7 { \/* Vitesse VSC8211 *\/$/;"	l
ethernet_phy8	arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts	/^	ethernet_phy8: ethernet-phy@8 { \/* Vitesse VSC8211 *\/$/;"	l
ethernet_phy_detect	drivers/net/armada100_fec.c	/^static int ethernet_phy_detect(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ethernet_pin_mux	board/siemens/draco/mux.c	/^static struct module_pin_mux ethernet_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
ethernet_present	board/keymile/km82xx/km82xx.c	/^int ethernet_present(void)$/;"	f	typeref:typename:int
ethernet_present	board/keymile/km83xx/km83xx.c	/^int ethernet_present(void)$/;"	f	typeref:typename:int
ethernet_present	board/keymile/km_arm/km_arm.c	/^int ethernet_present(void)$/;"	f	typeref:typename:int
ethernet_register_set	drivers/net/mpc5xxx_fec.h	/^typedef struct ethernet_register_set {$/;"	s
ethernet_regs	drivers/net/fec_mxc.h	/^struct ethernet_regs {$/;"	s
ethernet_regs	drivers/net/mpc5xxx_fec.h	/^} ethernet_regs;$/;"	t	typeref:struct:ethernet_register_set
ethernut5_nand_hw_init	board/egnite/ethernut5/ethernut5.c	/^static void ethernut5_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
ethernut5_phy_reset	board/egnite/ethernut5/ethernut5_pwrman.c	/^void ethernut5_phy_reset(void)$/;"	f	typeref:typename:void
ethernut5_power_init	board/egnite/ethernut5/ethernut5_pwrman.c	/^void ethernut5_power_init(void)$/;"	f	typeref:typename:void
ethernut5_print_celsius	board/egnite/ethernut5/ethernut5_pwrman.c	/^void ethernut5_print_celsius(void)$/;"	f	typeref:typename:void
ethernut5_print_power	board/egnite/ethernut5/ethernut5_pwrman.c	/^void ethernut5_print_power(void)$/;"	f	typeref:typename:void
ethernut5_print_version	board/egnite/ethernut5/ethernut5_pwrman.c	/^void ethernut5_print_version(void)$/;"	f	typeref:typename:void
ethernut5_print_voltage	board/egnite/ethernut5/ethernut5_pwrman.c	/^void ethernut5_print_voltage(void)$/;"	f	typeref:typename:void
etherrxbuff	drivers/net/xilinx_emaclite.c	/^static uchar etherrxbuff[PKTSIZE_ALIGN]; \/* Receive buffer *\/$/;"	v	typeref:typename:uchar[]	file:
ethmac	arch/arm/dts/meson-gxbb.dtsi	/^		ethmac: ethernet@c9410000 {$/;"	l
ethoc	drivers/net/ethoc.c	/^struct ethoc {$/;"	s	file:
ethoc_ack_irq	drivers/net/ethoc.c	/^static inline void ethoc_ack_irq(struct ethoc *priv, u32 mask)$/;"	f	typeref:typename:void	file:
ethoc_bd	drivers/net/ethoc.c	/^struct ethoc_bd {$/;"	s	file:
ethoc_disable_rx_and_tx	drivers/net/ethoc.c	/^static inline void ethoc_disable_rx_and_tx(struct ethoc *priv)$/;"	f	typeref:typename:void	file:
ethoc_enable_rx_and_tx	drivers/net/ethoc.c	/^static inline void ethoc_enable_rx_and_tx(struct ethoc *priv)$/;"	f	typeref:typename:void	file:
ethoc_eth_pdata	include/dm/platform_data/net_ethoc.h	/^struct ethoc_eth_pdata {$/;"	s
ethoc_free_pkt	drivers/net/ethoc.c	/^static int ethoc_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
ethoc_free_pkt_common	drivers/net/ethoc.c	/^static int ethoc_free_pkt_common(struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_halt	drivers/net/ethoc.c	/^static void ethoc_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ethoc_ids	drivers/net/ethoc.c	/^static const struct udevice_id ethoc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ethoc_init	drivers/net/ethoc.c	/^static int ethoc_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ethoc_init_common	drivers/net/ethoc.c	/^static int ethoc_init_common(struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_init_ring	drivers/net/ethoc.c	/^static int ethoc_init_ring(struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_initialize	drivers/net/ethoc.c	/^int ethoc_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
ethoc_is_new_packet_received	drivers/net/ethoc.c	/^static int ethoc_is_new_packet_received(struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_mdio_init	drivers/net/ethoc.c	/^static inline int ethoc_mdio_init(const char *name, struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_mdio_init	drivers/net/ethoc.c	/^static int ethoc_mdio_init(const char *name, struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_mdio_read	drivers/net/ethoc.c	/^static int ethoc_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
ethoc_mdio_write	drivers/net/ethoc.c	/^static int ethoc_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
ethoc_ofdata_to_platdata	drivers/net/ethoc.c	/^static int ethoc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ethoc_ops	drivers/net/ethoc.c	/^static const struct eth_ops ethoc_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
ethoc_pdata	board/cadence/xtfpga/xtfpga.c	/^static struct ethoc_eth_pdata ethoc_pdata = {$/;"	v	typeref:struct:ethoc_eth_pdata	file:
ethoc_phy_init	drivers/net/ethoc.c	/^static inline int ethoc_phy_init(struct ethoc *priv, void *dev)$/;"	f	typeref:typename:int	file:
ethoc_phy_init	drivers/net/ethoc.c	/^static int ethoc_phy_init(struct ethoc *priv, void *dev)$/;"	f	typeref:typename:int	file:
ethoc_probe	drivers/net/ethoc.c	/^static int ethoc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ethoc_read	drivers/net/ethoc.c	/^static inline u32 ethoc_read(struct ethoc *priv, size_t offset)$/;"	f	typeref:typename:u32	file:
ethoc_read_bd	drivers/net/ethoc.c	/^static inline void ethoc_read_bd(struct ethoc *priv, int index,$/;"	f	typeref:typename:void	file:
ethoc_recv	drivers/net/ethoc.c	/^static int ethoc_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ethoc_recv	drivers/net/ethoc.c	/^static int ethoc_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
ethoc_reg	drivers/net/ethoc.c	/^static inline u32 *ethoc_reg(struct ethoc *priv, size_t offset)$/;"	f	typeref:typename:u32 *	file:
ethoc_remove	drivers/net/ethoc.c	/^static int ethoc_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ethoc_reset	drivers/net/ethoc.c	/^static int ethoc_reset(struct ethoc *priv)$/;"	f	typeref:typename:int	file:
ethoc_rx_common	drivers/net/ethoc.c	/^static int ethoc_rx_common(struct ethoc *priv, uchar **packetp)$/;"	f	typeref:typename:int	file:
ethoc_send	drivers/net/ethoc.c	/^static int ethoc_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ethoc_send	drivers/net/ethoc.c	/^static int ethoc_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ethoc_send_common	drivers/net/ethoc.c	/^static int ethoc_send_common(struct ethoc *priv, void *packet, int length)$/;"	f	typeref:typename:int	file:
ethoc_start	drivers/net/ethoc.c	/^static int ethoc_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ethoc_stop	drivers/net/ethoc.c	/^static void ethoc_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ethoc_stop_common	drivers/net/ethoc.c	/^static void ethoc_stop_common(struct ethoc *priv)$/;"	f	typeref:typename:void	file:
ethoc_tx	drivers/net/ethoc.c	/^static void ethoc_tx(struct ethoc *priv)$/;"	f	typeref:typename:void	file:
ethoc_update_rx_stats	drivers/net/ethoc.c	/^static int ethoc_update_rx_stats(struct ethoc_bd *bd)$/;"	f	typeref:typename:int	file:
ethoc_update_tx_stats	drivers/net/ethoc.c	/^static int ethoc_update_tx_stats(struct ethoc_bd *bd)$/;"	f	typeref:typename:int	file:
ethoc_write	drivers/net/ethoc.c	/^static inline void ethoc_write(struct ethoc *priv, size_t offset, u32 data)$/;"	f	typeref:typename:void	file:
ethoc_write_bd	drivers/net/ethoc.c	/^static inline void ethoc_write_bd(struct ethoc *priv, int index,$/;"	f	typeref:typename:void	file:
ethoc_write_hwaddr	drivers/net/ethoc.c	/^static int ethoc_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ethoc_write_hwaddr	drivers/net/ethoc.c	/^static int ethoc_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ethoc_write_hwaddr_common	drivers/net/ethoc.c	/^static int ethoc_write_hwaddr_common(struct ethoc *priv, u8 *mac)$/;"	f	typeref:typename:int	file:
ethphy0	arch/arm/dts/imx6ull-14x14-evk.dts	/^		ethphy0: ethernet-phy@2 {$/;"	l
ethphy0	arch/arm/dts/k2e-evm.dts	/^	ethphy0: ethernet-phy@0 {$/;"	l
ethphy0	arch/arm/dts/k2g-evm.dts	/^	ethphy0: ethernet-phy@0 {$/;"	l
ethphy0	arch/arm/dts/k2hk-evm.dts	/^	ethphy0: ethernet-phy@0 {$/;"	l
ethphy0	arch/arm/dts/k2l-evm.dts	/^	ethphy0: ethernet-phy@0 {$/;"	l
ethphy1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		ethphy1: ethernet-phy@1 {$/;"	l
ethphy1	arch/arm/dts/k2e-evm.dts	/^	ethphy1: ethernet-phy@1 {$/;"	l
ethphy1	arch/arm/dts/k2hk-evm.dts	/^	ethphy1: ethernet-phy@1 {$/;"	l
ethphy1	arch/arm/dts/k2l-evm.dts	/^	ethphy1: ethernet-phy@1 {$/;"	l
ethsc	arch/arm/dts/uniphier-support-card.dtsi	/^		ethsc: ethernet@00000000 {$/;"	l	label:support_card
ethss_config	drivers/net/keystone_net.c	/^int ethss_config(u32 ctl, u32 max_pkt_size)$/;"	f	typeref:typename:int
ethss_start	drivers/net/keystone_net.c	/^int ethss_start(void)$/;"	f	typeref:typename:int
ethss_stop	drivers/net/keystone_net.c	/^int ethss_stop(void)$/;"	f	typeref:typename:int
ethsw_cmd_def	cmd/ethsw.c	/^} ethsw_cmd_def[] = {$/;"	v	typeref:struct:keywords_to_function[]
ethsw_command_def	include/ethsw.h	/^struct ethsw_command_def {$/;"	s
ethsw_command_func	include/ethsw.h	/^struct ethsw_command_func {$/;"	s
ethsw_define_functions	cmd/ethsw.c	/^int ethsw_define_functions(const struct ethsw_command_func *cmd_func)$/;"	f	typeref:typename:int
ethsw_egr_tag_help_key_func	cmd/ethsw.c	/^static int ethsw_egr_tag_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_fdb_help_key_func	cmd/ethsw.c	/^static int ethsw_fdb_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_id_add	include/ethsw.h	/^	ethsw_id_add,$/;"	e	enum:ethsw_keyword_id
ethsw_id_add_del_mac	include/ethsw.h	/^	ethsw_id_add_del_mac,$/;"	e	enum:ethsw_keyword_opt_id
ethsw_id_add_del_no	include/ethsw.h	/^	ethsw_id_add_del_no,$/;"	e	enum:ethsw_keyword_opt_id
ethsw_id_aggr	include/ethsw.h	/^	ethsw_id_aggr,$/;"	e	enum:ethsw_keyword_id
ethsw_id_aggr_no	include/ethsw.h	/^	ethsw_id_aggr_no,$/;"	e	enum:ethsw_keyword_opt_id
ethsw_id_all	include/ethsw.h	/^	ethsw_id_all,$/;"	e	enum:ethsw_keyword_id
ethsw_id_auto	include/ethsw.h	/^	ethsw_id_auto,$/;"	e	enum:ethsw_keyword_id
ethsw_id_classified	include/ethsw.h	/^	ethsw_id_classified,$/;"	e	enum:ethsw_keyword_id
ethsw_id_clear	include/ethsw.h	/^	ethsw_id_clear,$/;"	e	enum:ethsw_keyword_id
ethsw_id_count	include/ethsw.h	/^	ethsw_id_count,	\/* keep last *\/$/;"	e	enum:ethsw_keyword_id
ethsw_id_count_all	include/ethsw.h	/^	ethsw_id_count_all,	\/* keep last *\/$/;"	e	enum:ethsw_keyword_opt_id
ethsw_id_del	include/ethsw.h	/^	ethsw_id_del,$/;"	e	enum:ethsw_keyword_id
ethsw_id_disable	include/ethsw.h	/^	ethsw_id_disable,$/;"	e	enum:ethsw_keyword_id
ethsw_id_egress	include/ethsw.h	/^	ethsw_id_egress,$/;"	e	enum:ethsw_keyword_id
ethsw_id_enable	include/ethsw.h	/^	ethsw_id_enable,$/;"	e	enum:ethsw_keyword_id
ethsw_id_fdb	include/ethsw.h	/^	ethsw_id_fdb,$/;"	e	enum:ethsw_keyword_id
ethsw_id_filtering	include/ethsw.h	/^	ethsw_id_filtering,$/;"	e	enum:ethsw_keyword_id
ethsw_id_flush	include/ethsw.h	/^	ethsw_id_flush,$/;"	e	enum:ethsw_keyword_id
ethsw_id_help	include/ethsw.h	/^	ethsw_id_help,$/;"	e	enum:ethsw_keyword_id
ethsw_id_ingress	include/ethsw.h	/^	ethsw_id_ingress,$/;"	e	enum:ethsw_keyword_id
ethsw_id_key_end	include/ethsw.h	/^	ethsw_id_key_end = -1,$/;"	e	enum:ethsw_keyword_id
ethsw_id_learning	include/ethsw.h	/^	ethsw_id_learning,$/;"	e	enum:ethsw_keyword_id
ethsw_id_none	include/ethsw.h	/^	ethsw_id_none,$/;"	e	enum:ethsw_keyword_id
ethsw_id_port	include/ethsw.h	/^	ethsw_id_port,$/;"	e	enum:ethsw_keyword_id
ethsw_id_port_no	include/ethsw.h	/^	ethsw_id_port_no = ethsw_id_count + 1,$/;"	e	enum:ethsw_keyword_opt_id
ethsw_id_private	include/ethsw.h	/^	ethsw_id_private,$/;"	e	enum:ethsw_keyword_id
ethsw_id_pvid	include/ethsw.h	/^	ethsw_id_pvid,$/;"	e	enum:ethsw_keyword_id
ethsw_id_pvid_no	include/ethsw.h	/^	ethsw_id_pvid_no,$/;"	e	enum:ethsw_keyword_opt_id
ethsw_id_shared	include/ethsw.h	/^	ethsw_id_shared,$/;"	e	enum:ethsw_keyword_id
ethsw_id_show	include/ethsw.h	/^	ethsw_id_show,$/;"	e	enum:ethsw_keyword_id
ethsw_id_statistics	include/ethsw.h	/^	ethsw_id_statistics,$/;"	e	enum:ethsw_keyword_id
ethsw_id_tag	include/ethsw.h	/^	ethsw_id_tag,$/;"	e	enum:ethsw_keyword_id
ethsw_id_untagged	include/ethsw.h	/^	ethsw_id_untagged,$/;"	e	enum:ethsw_keyword_id
ethsw_id_vlan	include/ethsw.h	/^	ethsw_id_vlan,$/;"	e	enum:ethsw_keyword_id
ethsw_id_vlan_no	include/ethsw.h	/^	ethsw_id_vlan_no,$/;"	e	enum:ethsw_keyword_opt_id
ethsw_ingr_fltr_help_key_func	cmd/ethsw.c	/^static int ethsw_ingr_fltr_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_keyword_id	include/ethsw.h	/^enum ethsw_keyword_id {$/;"	g
ethsw_keyword_opt_id	include/ethsw.h	/^enum ethsw_keyword_opt_id {$/;"	g
ethsw_learn_help_key_func	cmd/ethsw.c	/^static int ethsw_learn_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_name	cmd/ethsw.c	/^static const char *ethsw_name;$/;"	v	typeref:typename:const char *	file:
ethsw_name	include/ethsw.h	/^	const char *ethsw_name;$/;"	m	struct:ethsw_command_func	typeref:typename:const char *
ethsw_port_aggr_help_key_func	cmd/ethsw.c	/^static int ethsw_port_aggr_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_port_stats_help_key_func	cmd/ethsw.c	/^static int ethsw_port_stats_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_port_untag_help_key_func	cmd/ethsw.c	/^static int ethsw_port_untag_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_pvid_help_key_func	cmd/ethsw.c	/^static int ethsw_pvid_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_vlan_help_key_func	cmd/ethsw.c	/^static int ethsw_vlan_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethsw_vlan_learn_help_key_func	cmd/ethsw.c	/^static int ethsw_vlan_learn_help_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
ethtool_ah_espip4_spec	include/linux/ethtool.h	/^struct ethtool_ah_espip4_spec {$/;"	s
ethtool_cmd	include/linux/ethtool.h	/^struct ethtool_cmd {$/;"	s
ethtool_cmd_speed	include/linux/ethtool.h	/^static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep)$/;"	f	typeref:typename:__u32
ethtool_cmd_speed_set	include/linux/ethtool.h	/^static inline void ethtool_cmd_speed_set(struct ethtool_cmd *ep,$/;"	f	typeref:typename:void
ethtool_coalesce	include/linux/ethtool.h	/^struct ethtool_coalesce {$/;"	s
ethtool_drvinfo	include/linux/ethtool.h	/^struct ethtool_drvinfo {$/;"	s
ethtool_eeprom	include/linux/ethtool.h	/^struct ethtool_eeprom {$/;"	s
ethtool_flags	include/linux/ethtool.h	/^enum ethtool_flags {$/;"	g
ethtool_flash	include/linux/ethtool.h	/^struct ethtool_flash {$/;"	s
ethtool_flash_op_type	include/linux/ethtool.h	/^enum ethtool_flash_op_type {$/;"	g
ethtool_get_features_block	include/linux/ethtool.h	/^struct ethtool_get_features_block {$/;"	s
ethtool_gfeatures	include/linux/ethtool.h	/^struct ethtool_gfeatures {$/;"	s
ethtool_gstrings	include/linux/ethtool.h	/^struct ethtool_gstrings {$/;"	s
ethtool_pauseparam	include/linux/ethtool.h	/^struct ethtool_pauseparam {$/;"	s
ethtool_perm_addr	include/linux/ethtool.h	/^struct ethtool_perm_addr {$/;"	s
ethtool_regs	include/linux/ethtool.h	/^struct ethtool_regs {$/;"	s
ethtool_reset_flags	include/linux/ethtool.h	/^enum ethtool_reset_flags {$/;"	g
ethtool_ringparam	include/linux/ethtool.h	/^struct ethtool_ringparam {$/;"	s
ethtool_rxfh_indir	include/linux/ethtool.h	/^struct ethtool_rxfh_indir {$/;"	s
ethtool_set_features_block	include/linux/ethtool.h	/^struct ethtool_set_features_block {$/;"	s
ethtool_sfeatures	include/linux/ethtool.h	/^struct ethtool_sfeatures {$/;"	s
ethtool_sfeatures_retval_bits	include/linux/ethtool.h	/^enum ethtool_sfeatures_retval_bits {$/;"	g
ethtool_sset_info	include/linux/ethtool.h	/^struct ethtool_sset_info {$/;"	s
ethtool_stats	include/linux/ethtool.h	/^struct ethtool_stats {$/;"	s
ethtool_stringset	include/linux/ethtool.h	/^enum ethtool_stringset {$/;"	g
ethtool_tcpip4_spec	include/linux/ethtool.h	/^struct ethtool_tcpip4_spec {$/;"	s
ethtool_test	include/linux/ethtool.h	/^struct ethtool_test {$/;"	s
ethtool_test_flags	include/linux/ethtool.h	/^enum ethtool_test_flags {$/;"	g
ethtool_usrip4_spec	include/linux/ethtool.h	/^struct ethtool_usrip4_spec {$/;"	s
ethtool_value	include/linux/ethtool.h	/^struct ethtool_value {$/;"	s
ethtool_wolinfo	include/linux/ethtool.h	/^struct ethtool_wolinfo {$/;"	s
ethuart	board/amcc/luan/epld.h	/^    unsigned char  ethuart;		\/* Ethernet, UART status *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
etps	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short etps;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
etr_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	etr_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
etr_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 etr_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
etr_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	etr_read_qos;			\/* 0x47100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
etr_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	etr_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
etsecclkadjcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 etsecclkadjcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
etsecclkdpslpcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 etsecclkdpslpcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
etsecdmamcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 etsecdmamcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
etsecmcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 etsecmcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
etsel	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short etsel;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
euc	drivers/net/mvgbe.h	/^	u32 euc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
euda	drivers/net/mvgbe.h	/^	u32 euda;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
eudid	drivers/net/mvgbe.h	/^	u32 eudid;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
euea	drivers/net/mvgbe.h	/^	u32 euea;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
eui	include/linux/edd.h	/^			__u64 eui;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0d08	typeref:typename:__u64
euiae	drivers/net/mvgbe.h	/^	u32 euiae;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
euic	drivers/net/mvgbe.h	/^	u32 euic;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
euim	drivers/net/mvgbe.h	/^	u32 euim;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
ev_buffs	drivers/usb/dwc3/core.h	/^	struct dwc3_event_buffer **ev_buffs;$/;"	m	struct:dwc3	typeref:struct:dwc3_event_buffer **
eval	tools/buildman/kconfiglib.py	/^    def eval(self, s):$/;"	m	class:Config
eval_bad_patterns	test/py/u_boot_console_base.py	/^    def eval_bad_patterns(self):$/;"	m	class:ConsoleBase
evalexp	cmd/itest.c	/^static long evalexp(char *s, int w)$/;"	f	typeref:typename:long	file:
evalstr	cmd/itest.c	/^static char * evalstr(char *s)$/;"	f	typeref:typename:char *	file:
eve	arch/arm/include/asm/omap_common.h	/^	struct volts eve;$/;"	m	struct:vcores_data	typeref:struct:volts
eve_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	eve_clk: eve_clk {$/;"	l
eve_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	eve_dclk_div: eve_dclk_div {$/;"	l
eve_dpll_hs_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	eve_dpll_hs_clk_div: eve_dpll_hs_clk_div {$/;"	l
event	arch/powerpc/include/asm/immap_85xx.h	/^	u32	event;		\/* eSPI event *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32
event	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u32 event;	\/* event register *\/$/;"	m	struct:spi8xxx	typeref:typename:u32
event	arch/x86/include/asm/ist.h	/^	__u32 event;$/;"	m	struct:ist_info	typeref:typename:__u32
event	include/usbdevice.h	/^	void (*event) (struct usb_device_instance *device, usb_device_event_t event, int data);$/;"	m	struct:usb_device_instance	typeref:typename:void (*)(struct usb_device_instance * device,usb_device_event_t event,int data)
event_cmd	drivers/usb/host/xhci.h	/^	struct xhci_event_cmd		event_cmd;$/;"	m	union:xhci_trb	typeref:struct:xhci_event_cmd
event_count	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 event_count;	\/* Event Count *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0c08	typeref:typename:u32
event_count	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 event_count;	\/* Event Count *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0808	typeref:typename:u32
event_in	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 event_in;		\/* 0x190 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
event_in	arch/arm/include/asm/arch/cpucfg.h	/^	u32 event_in;		\/* 0x190 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
event_info	drivers/usb/dwc3/core.h	/^	u32	event_info:9;$/;"	m	struct:dwc3_event_devt	typeref:typename:u32:9
event_ready	drivers/usb/host/xhci-ring.c	/^static int event_ready(struct xhci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
event_ring	drivers/usb/host/xhci.h	/^	struct xhci_ring *event_ring;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_ring *
event_select	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 event_select;	\/* Event Select *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0c08	typeref:typename:u32
event_select	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 event_select;	\/* Event Select *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0808	typeref:typename:u32
event_time_counter	arch/powerpc/include/asm/immap_512x.h	/^	u32 event_time_counter;$/;"	m	struct:ddr512x	typeref:typename:u32
event_time_preset	arch/powerpc/include/asm/immap_512x.h	/^	u32 event_time_preset;$/;"	m	struct:ddr512x	typeref:typename:u32
evic	arch/mips/dts/pic32mzda.dtsi	/^	evic: interrupt-controller@1f810000 {$/;"	l
evict_inode	fs/ubifs/ubifs.h	/^	void (*evict_inode) (struct inode *);$/;"	m	struct:super_operations	typeref:typename:void (*)(struct inode *)
evlane	drivers/net/mvgbe.h	/^	u32 evlane;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
evm_3v3	arch/arm/dts/dra72-evm-common.dtsi	/^	evm_3v3: fixedregulator-evm_3v3 {$/;"	l
evm_3v3_sd	arch/arm/dts/dra7-evm.dts	/^	evm_3v3_sd: fixedregulator-sd {$/;"	l
evm_ddr2_cctrl_data	board/ti/ti814x/evm.c	/^static const struct cmd_control evm_ddr2_cctrl_data = {$/;"	v	typeref:typename:const struct cmd_control	file:
evm_ddr2_data	board/ti/ti814x/evm.c	/^static const struct ddr_data evm_ddr2_data = {$/;"	v	typeref:typename:const struct ddr_data	file:
evm_ddr2_emif0_regs	board/ti/ti814x/evm.c	/^static const struct emif_regs evm_ddr2_emif0_regs = {$/;"	v	typeref:typename:const struct emif_regs	file:
evm_ddr2_emif1_regs	board/ti/ti814x/evm.c	/^static const struct emif_regs evm_ddr2_emif1_regs = {$/;"	v	typeref:typename:const struct emif_regs	file:
evm_lisa_map_regs	board/ti/ti814x/evm.c	/^const struct dmm_lisa_map_regs evm_lisa_map_regs = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
evm_lisa_map_regs	board/ti/ti816x/evm.c	/^const struct dmm_lisa_map_regs evm_lisa_map_regs = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
evr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 evr;		\/* event register *\/$/;"	m	struct:rtclk83xx	typeref:typename:u32
evr1	arch/powerpc/include/asm/immap_83xx.h	/^	u16 evr1;		\/* Timer1 Event Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
evr2	arch/powerpc/include/asm/immap_83xx.h	/^	u16 evr2;		\/* Timer2 Event Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
evr3	arch/powerpc/include/asm/immap_83xx.h	/^	u16 evr3;		\/* Timer3 Event Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
evr4	arch/powerpc/include/asm/immap_83xx.h	/^	u16 evr4;		\/* Timer4 Event Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
evt2irq	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define evt2irq(/;"	d
ewrap_regs	drivers/net/davinci_emac.h	/^} ewrap_regs;$/;"	t	typeref:struct:__anon759824920208
ex_list	drivers/net/pch_gbe.h	/^	u32 ex_list;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
exact	lib/slre.c	/^exact(struct slre *r, const char **re)$/;"	f	typeref:typename:void	file:
exact_one_char	lib/slre.c	/^exact_one_char(struct slre *r, int ch)$/;"	f	typeref:typename:void	file:
exaddr	include/kgdb.h	/^		unsigned long exaddr;$/;"	m	struct:__anon584037260208	typeref:typename:unsigned long
examples	Makefile	/^examples: $(filter-out examples, $(u-boot-dirs))$/;"	t
exbatlv	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exbatlv;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exbct	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exbct;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exbo_hw_init	board/intercontrol/digsy_mtc/digsy_mtc.c	/^static inline void exbo_hw_init(void) {}$/;"	f	typeref:typename:void	file:
exbo_hw_init	board/intercontrol/digsy_mtc/digsy_mtc.c	/^static void exbo_hw_init(void)$/;"	f	typeref:typename:void	file:
exc_handler	arch/m68k/lib/traps.c	/^void exc_handler(struct pt_regs *fp) {$/;"	f	typeref:typename:void
exc_table	arch/xtensa/cpu/exceptions.c	/^handler_t exc_table[EXCCAUSE_LAST] = {$/;"	v	typeref:typename:handler_t[]
exccause	arch/xtensa/include/asm/ptrace.h	/^	unsigned long exccause;		\/*  16 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
exception_addr	arch/nios2/include/asm/global_data.h	/^	u32 exception_addr;$/;"	m	struct:arch_global_data	typeref:typename:u32
exception_entry	arch/arm/cpu/armv8/exceptions.S	/^.macro	exception_entry$/;"	m
exception_exit	arch/arm/cpu/armv8/exceptions.S	/^exception_exit:$/;"	l
exception_free_handler	arch/openrisc/cpu/exceptions.c	/^void exception_free_handler(int exception)$/;"	f	typeref:typename:void
exception_handler	arch/openrisc/cpu/exceptions.c	/^void exception_handler(int vect)$/;"	f	typeref:typename:void
exception_hang	arch/openrisc/cpu/exceptions.c	/^static void exception_hang(int vect)$/;"	f	typeref:typename:void	file:
exception_in_progress	drivers/usb/gadget/f_mass_storage.c	/^static int exception_in_progress(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
exception_init	arch/blackfin/cpu/cpu.c	/^int exception_init(void)$/;"	f	typeref:typename:int
exception_install_handler	arch/openrisc/cpu/exceptions.c	/^void exception_install_handler(int exception, void (*handler)(void))$/;"	f	typeref:typename:void
exception_req_tag	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		exception_req_tag;$/;"	m	struct:fsg_common	typeref:typename:unsigned int	file:
exception_table_entry	arch/powerpc/lib/extable.c	/^struct exception_table_entry$/;"	s	file:
exceptions	arch/x86/cpu/interrupts.c	/^static char *exceptions[] = {$/;"	v	typeref:typename:char * []	file:
excl_link	drivers/block/sata_dwc.h	/^	struct ata_link		*excl_link;$/;"	m	struct:ata_port	typeref:struct:ata_link *
exclusive	drivers/mtd/ubi/ubi.h	/^	int exclusive;$/;"	m	struct:ubi_volume	typeref:typename:int
exclusive_irqs	arch/x86/include/asm/pirq_routing.h	/^	u16 exclusive_irqs;	\/* IRQs devoted exclusively to PCI usage *\/$/;"	m	struct:irq_routing_table	typeref:typename:u16
excp_table	arch/openrisc/cpu/exceptions.c	/^static const char * const excp_table[] = {$/;"	v	typeref:typename:const char * const[]	file:
excvaddr	arch/xtensa/include/asm/ptrace.h	/^	unsigned long excvaddr;		\/*  20 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
exdmaset0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmaset0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmaset1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmaset1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmaset2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmaset2;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmawcr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmawcr0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmawcr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmawcr1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmawcr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmawcr2;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmcr0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmcr0;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmcr1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmcr1;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exdmcr2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exdmcr2;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exec_after	post/board/lwmon5/sysmon.c	/^	void		(*exec_after)(sysmon_table_t *);$/;"	m	struct:sysmon_table_s	typeref:typename:void (*)(sysmon_table_t *)	file:
exec_before	post/board/lwmon5/sysmon.c	/^	void		(*exec_before)(sysmon_table_t *);$/;"	m	struct:sysmon_table_s	typeref:typename:void (*)(sysmon_table_t *)	file:
exec_hush_if	test/py/tests/test_hush_if_test.py	/^def exec_hush_if(u_boot_console, expr, result):$/;"	f
exec_kernel_doc	scripts/docproc.c	/^static void exec_kernel_doc(char **svec)$/;"	f	typeref:typename:void	file:
exec_units_mask	drivers/crypto/fsl/sec.c	/^		u32 exec_units_mask;$/;"	m	struct:fdt_fixup_crypto_node::sec_rev_prop	typeref:typename:u32	file:
execaddr	tools/kwbimage.c	/^		unsigned int execaddr;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
execaddr	tools/kwbimage.h	/^	uint32_t execaddr;		\/*20-23 *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint32_t
execaddr	tools/kwbimage.h	/^	uint32_t execaddr;              \/* 14-17 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint32_t
exfGlobalParam	drivers/qe/uec.h	/^	u32  exfGlobalParam;      \/* extended filtering global parameters *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
exid	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	exid;	\/* Chip ID Extension Register RO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
exists	cmd/armflash.c	/^static int exists(const char * const name)$/;"	f	typeref:typename:int	file:
exists	fs/fs.c	/^	int (*exists)(const char *filename);$/;"	m	struct:fstype_info	typeref:typename:int (*)(const char * filename)	file:
exists	fs/ubifs/recovery.c	/^	int exists;$/;"	m	struct:size_entry	typeref:typename:int	file:
exit	arch/arm/lib/memcpy.S	/^	.macro exit reg1 reg2$/;"	m
exit	arch/x86/lib/efi/crt0-efi-ia32.S	/^.exit:	leave$/;"	l
exit	arch/x86/lib/efi/crt0-efi-x86_64.S	/^.exit:$/;"	l
exit	drivers/usb/musb-new/musb_core.h	/^	int	(*exit)(struct musb *musb);$/;"	m	struct:musb_platform_ops	typeref:typename:int (*)(struct musb * musb)
exit_ddr	board/renesas/sh7752evb/lowlevel_init.S	/^exit_ddr:$/;"	l
exit_ddr	board/renesas/sh7753evb/lowlevel_init.S	/^exit_ddr:$/;"	l
exit_ddr	board/renesas/sh7757lcr/lowlevel_init.S	/^exit_ddr:$/;"	l
exit_gpio	board/renesas/sh7752evb/lowlevel_init.S	/^exit_gpio:$/;"	l
exit_gpio	board/renesas/sh7757lcr/lowlevel_init.S	/^exit_gpio:$/;"	l
exit_jmp	include/efi_api.h	/^	struct jmp_buf_data exit_jmp;$/;"	m	struct:efi_loaded_image	typeref:struct:jmp_buf_data
exit_pmb	board/renesas/sh7752evb/lowlevel_init.S	/^exit_pmb:$/;"	l
exit_pmb	board/renesas/sh7753evb/lowlevel_init.S	/^exit_pmb:$/;"	l
exit_pmb	board/renesas/sh7757lcr/lowlevel_init.S	/^exit_pmb:$/;"	l
exit_status	include/efi_api.h	/^	efi_status_t exit_status;$/;"	m	struct:efi_loaded_image	typeref:typename:efi_status_t
exitstatus	scripts/docproc.c	/^int exitstatus = 0;$/;"	v	typeref:typename:int
exp_len	include/u-boot/rsa-mod-exp.h	/^	uint32_t exp_len;	\/* Exponent length in number of uint8_t *\/$/;"	m	struct:key_prop	typeref:typename:uint32_t
expand_tabs	scripts/checkpatch.pl	/^sub expand_tabs {$/;"	s
expander0	arch/arm/dts/armada-388-clearfog.dts	/^				expander0: gpio-expander@20 {$/;"	l
expander0	arch/arm/dts/armada-388-gp.dts	/^				expander0: pca9555@20 {$/;"	l
expander1	arch/arm/dts/armada-388-gp.dts	/^				expander1: pca9555@21 {$/;"	l
expansion_config	board/overo/overo.c	/^} expansion_config = {0x0};$/;"	v	typeref:struct:__anona18b42d20108
expansion_config	board/ti/beagle/beagle.c	/^} expansion_config;$/;"	v	typeref:struct:__anon1bf8eac80108
expect	test/py/u_boot_spawn.py	/^    def expect(self, patterns):$/;"	m	class:Spawn
expected	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^} static volatile expected[] =$/;"	v	typeref:struct:__anonba1e0a450108 volatile[]
expectedCRC	drivers/fpga/lattice.c	/^static unsigned short expectedCRC;$/;"	v	typeref:typename:unsigned short	file:
expected_setting_list	test/dm/regulator.c	/^static const struct setting expected_setting_list[] = {$/;"	v	typeref:typename:const struct setting[]	file:
expi_clk_cfg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 expi_clk_cfg;	\/* 0x54 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
expi_setup	board/spear/x600/fpga.c	/^static int expi_setup(int freq)$/;"	f	typeref:typename:int	file:
expire	disk/part_iso.h	/^	unsigned char expire[17];		\/* expiring date *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[17]
expire	disk/part_iso.h	/^	unsigned char expire[17];		\/* expiring date *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[17]
exponent	include/u-boot/rsa.h	/^	uint64_t exponent;	\/* public exponent *\/$/;"	m	struct:rsa_public_key	typeref:typename:uint64_t
expr	scripts/kconfig/expr.h	/^	struct expr *expr;         \/* the optional conditional part of the property *\/$/;"	m	struct:property	typeref:struct:expr *
expr	scripts/kconfig/expr.h	/^	struct expr *expr;$/;"	m	struct:expr_value	typeref:struct:expr *
expr	scripts/kconfig/expr.h	/^	struct expr *expr;$/;"	m	union:expr_data	typeref:struct:expr *
expr	scripts/kconfig/expr.h	/^struct expr {$/;"	s
expr	scripts/kconfig/symbol.c	/^	struct expr *expr;$/;"	m	struct:dep_stack	typeref:struct:expr *	file:
expr	scripts/kconfig/zconf.tab.c	/^	struct expr *expr;$/;"	m	union:YYSTYPE	typeref:struct:expr *	file:
expr	scripts/kconfig/zconf.y	/^expr:	  symbol				{ $$ = expr_alloc_symbol($1); }$/;"	l	typeref:typename:expr
expr_alloc_and	scripts/kconfig/expr.c	/^struct expr *expr_alloc_and(struct expr *e1, struct expr *e2)$/;"	f	typeref:struct:expr *
expr_alloc_comp	scripts/kconfig/expr.c	/^struct expr *expr_alloc_comp(enum expr_type type, struct symbol *s1, struct symbol *s2)$/;"	f	typeref:struct:expr *
expr_alloc_one	scripts/kconfig/expr.c	/^struct expr *expr_alloc_one(enum expr_type type, struct expr *ce)$/;"	f	typeref:struct:expr *
expr_alloc_or	scripts/kconfig/expr.c	/^struct expr *expr_alloc_or(struct expr *e1, struct expr *e2)$/;"	f	typeref:struct:expr *
expr_alloc_symbol	scripts/kconfig/expr.c	/^struct expr *expr_alloc_symbol(struct symbol *sym)$/;"	f	typeref:struct:expr *
expr_alloc_two	scripts/kconfig/expr.c	/^struct expr *expr_alloc_two(enum expr_type type, struct expr *e1, struct expr *e2)$/;"	f	typeref:struct:expr *
expr_calc_value	scripts/kconfig/expr.c	/^tristate expr_calc_value(struct expr *e)$/;"	f	typeref:typename:tristate
expr_compare_type	scripts/kconfig/expr.c	/^static int expr_compare_type(enum expr_type t1, enum expr_type t2)$/;"	f	typeref:typename:int	file:
expr_contains_symbol	scripts/kconfig/expr.c	/^int expr_contains_symbol(struct expr *dep, struct symbol *sym)$/;"	f	typeref:typename:int
expr_copy	scripts/kconfig/expr.c	/^struct expr *expr_copy(const struct expr *org)$/;"	f	typeref:struct:expr *
expr_data	scripts/kconfig/expr.h	/^union expr_data {$/;"	u
expr_depends_symbol	scripts/kconfig/expr.c	/^bool expr_depends_symbol(struct expr *dep, struct symbol *sym)$/;"	f	typeref:typename:bool
expr_eliminate_dups	scripts/kconfig/expr.c	/^struct expr *expr_eliminate_dups(struct expr *e)$/;"	f	typeref:struct:expr *
expr_eliminate_dups1	scripts/kconfig/expr.c	/^static void expr_eliminate_dups1(enum expr_type type, struct expr **ep1, struct expr **ep2)$/;"	f	typeref:typename:void	file:
expr_eliminate_dups2	scripts/kconfig/expr.c	/^static void expr_eliminate_dups2(enum expr_type type, struct expr **ep1, struct expr **ep2)$/;"	f	typeref:typename:void	file:
expr_eliminate_eq	scripts/kconfig/expr.c	/^void expr_eliminate_eq(struct expr **ep1, struct expr **ep2)$/;"	f	typeref:typename:void
expr_eliminate_yn	scripts/kconfig/expr.c	/^static struct expr *expr_eliminate_yn(struct expr *e)$/;"	f	typeref:struct:expr *	file:
expr_eq	scripts/kconfig/expr.c	/^static int expr_eq(struct expr *e1, struct expr *e2)$/;"	f	typeref:typename:int	file:
expr_extract_eq	scripts/kconfig/expr.c	/^static void expr_extract_eq(enum expr_type type, struct expr **ep, struct expr **ep1, struct exp/;"	f	typeref:typename:void	file:
expr_extract_eq_and	scripts/kconfig/expr.c	/^static struct expr *expr_extract_eq_and(struct expr **ep1, struct expr **ep2)$/;"	f	typeref:struct:expr *	file:
expr_extract_eq_or	scripts/kconfig/expr.c	/^static struct expr *expr_extract_eq_or(struct expr **ep1, struct expr **ep2)$/;"	f	typeref:struct:expr *	file:
expr_fprint	scripts/kconfig/expr.c	/^void expr_fprint(struct expr *e, FILE *out)$/;"	f	typeref:typename:void
expr_free	scripts/kconfig/expr.c	/^void expr_free(struct expr *e)$/;"	f	typeref:typename:void
expr_get_leftmost_symbol	scripts/kconfig/expr.c	/^expr_get_leftmost_symbol(const struct expr *e)$/;"	f	typeref:struct:expr *	file:
expr_gstr_print	scripts/kconfig/expr.c	/^void expr_gstr_print(struct expr *e, struct gstr *gs)$/;"	f	typeref:typename:void
expr_is_no	scripts/kconfig/expr.h	/^static inline int expr_is_no(struct expr *e)$/;"	f	typeref:typename:int
expr_is_yes	scripts/kconfig/expr.h	/^static inline int expr_is_yes(struct expr *e)$/;"	f	typeref:typename:int
expr_join_and	scripts/kconfig/expr.c	/^static struct expr *expr_join_and(struct expr *e1, struct expr *e2)$/;"	f	typeref:struct:expr *	file:
expr_join_or	scripts/kconfig/expr.c	/^static struct expr *expr_join_or(struct expr *e1, struct expr *e2)$/;"	f	typeref:struct:expr *	file:
expr_list_for_each_sym	scripts/kconfig/expr.h	/^#define expr_list_for_each_sym(/;"	d
expr_print	scripts/kconfig/expr.c	/^void expr_print(struct expr *e, void (*fn)(void *, struct symbol *, const char *), void *data, i/;"	f	typeref:typename:void
expr_print_file_helper	scripts/kconfig/expr.c	/^static void expr_print_file_helper(void *data, struct symbol *sym, const char *str)$/;"	f	typeref:typename:void	file:
expr_print_gstr_helper	scripts/kconfig/expr.c	/^static void expr_print_gstr_helper(void *data, struct symbol *sym, const char *str)$/;"	f	typeref:typename:void	file:
expr_print_help	scripts/kconfig/qconf.cc	/^void ConfigInfoView::expr_print_help(void *data, struct symbol *sym, const char *str)$/;"	f	class:ConfigInfoView	typeref:typename:void
expr_simplify_unmet_dep	scripts/kconfig/expr.c	/^struct expr *expr_simplify_unmet_dep(struct expr *e1, struct expr *e2)$/;"	f	typeref:struct:expr *
expr_trans_bool	scripts/kconfig/expr.c	/^struct expr *expr_trans_bool(struct expr *e)$/;"	f	typeref:struct:expr *
expr_trans_compare	scripts/kconfig/expr.c	/^struct expr *expr_trans_compare(struct expr *e, enum expr_type type, struct symbol *sym)$/;"	f	typeref:struct:expr *
expr_transform	scripts/kconfig/expr.c	/^struct expr *expr_transform(struct expr *e)$/;"	f	typeref:struct:expr *
expr_type	scripts/kconfig/expr.h	/^enum expr_type {$/;"	g
expr_value	scripts/kconfig/expr.h	/^struct expr_value {$/;"	s
ext	arch/mips/dts/microAptiv.dtsi	/^	ext: ext {$/;"	l
ext	include/fat.h	/^	char	name[8],ext[3];	\/* Name and extension *\/$/;"	m	struct:dir_entry	typeref:typename:char[3]
ext	include/stdio_dev.h	/^	int	ext;			\/* Supported extensions			*\/$/;"	m	struct:stdio_dev	typeref:typename:int
ext	tools/kwbimage.h	/^	uint8_t  ext;			\/*30    *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint8_t
ext	tools/kwbimage.h	/^	uint8_t  ext;                   \/* 1E *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
ext2_argv	board/inversepath/usbarmory/usbarmory.c	/^static char *ext2_argv[] = {$/;"	v	typeref:typename:char * []	file:
ext2_block_group	include/ext_common.h	/^struct ext2_block_group {$/;"	s
ext2_clear_bit	arch/arm/include/asm/bitops.h	/^#define ext2_clear_bit	/;"	d
ext2_clear_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int ext2_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
ext2_clear_bit	arch/microblaze/include/asm/bitops.h	/^static inline int ext2_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
ext2_clear_bit	arch/mips/include/asm/bitops.h	/^#define ext2_clear_bit(/;"	d
ext2_clear_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int ext2_clear_bit(int nr, void * addr)$/;"	f	typeref:typename:int
ext2_clear_bit	arch/nds32/include/asm/bitops.h	/^#define ext2_clear_bit	/;"	d
ext2_clear_bit	arch/powerpc/include/asm/bitops.h	/^#define ext2_clear_bit(/;"	d
ext2_clear_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int ext2_clear_bit(int nr, void * addr)$/;"	f	typeref:typename:int
ext2_clear_bit	arch/sandbox/include/asm/bitops.h	/^#define ext2_clear_bit	/;"	d
ext2_clear_bit	arch/x86/include/asm/bitops.h	/^#define ext2_clear_bit /;"	d
ext2_data	include/ext_common.h	/^struct ext2_data {$/;"	s
ext2_dirent	include/ext_common.h	/^struct ext2_dirent {$/;"	s
ext2_find_first_zero_bit	arch/arm/include/asm/bitops.h	/^#define ext2_find_first_zero_bit	/;"	d
ext2_find_first_zero_bit	arch/blackfin/include/asm/bitops.h	/^#define ext2_find_first_zero_bit(/;"	d
ext2_find_first_zero_bit	arch/microblaze/include/asm/bitops.h	/^#define ext2_find_first_zero_bit(/;"	d
ext2_find_first_zero_bit	arch/mips/include/asm/bitops.h	/^#define ext2_find_first_zero_bit(/;"	d
ext2_find_first_zero_bit	arch/nds32/include/asm/bitops.h	/^#define ext2_find_first_zero_bit	/;"	d
ext2_find_first_zero_bit	arch/powerpc/include/asm/bitops.h	/^#define ext2_find_first_zero_bit(/;"	d
ext2_find_first_zero_bit	arch/sandbox/include/asm/bitops.h	/^#define ext2_find_first_zero_bit	/;"	d
ext2_find_first_zero_bit	arch/x86/include/asm/bitops.h	/^#define ext2_find_first_zero_bit /;"	d
ext2_find_next_zero_bit	arch/arm/include/asm/bitops.h	/^#define ext2_find_next_zero_bit	/;"	d
ext2_find_next_zero_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ unsigned long ext2_find_next_zero_bit(void *addr,$/;"	f	typeref:typename:unsigned long
ext2_find_next_zero_bit	arch/microblaze/include/asm/bitops.h	/^static inline unsigned long ext2_find_next_zero_bit(void *addr,$/;"	f	typeref:typename:unsigned long
ext2_find_next_zero_bit	arch/mips/include/asm/bitops.h	/^#define ext2_find_next_zero_bit(/;"	d
ext2_find_next_zero_bit	arch/mips/include/asm/bitops.h	/^static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned/;"	f	typeref:typename:unsigned long
ext2_find_next_zero_bit	arch/nds32/include/asm/bitops.h	/^#define ext2_find_next_zero_bit	/;"	d
ext2_find_next_zero_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ unsigned long ext2_find_next_zero_bit(void *addr,$/;"	f	typeref:typename:unsigned long
ext2_find_next_zero_bit	arch/sandbox/include/asm/bitops.h	/^#define ext2_find_next_zero_bit	/;"	d
ext2_find_next_zero_bit	arch/x86/include/asm/bitops.h	/^#define ext2_find_next_zero_bit /;"	d
ext2_inode	include/ext_common.h	/^struct ext2_inode {$/;"	s
ext2_sblock	include/ext_common.h	/^struct ext2_sblock {$/;"	s
ext2_set_bit	arch/arm/include/asm/bitops.h	/^#define ext2_set_bit	/;"	d
ext2_set_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int ext2_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
ext2_set_bit	arch/microblaze/include/asm/bitops.h	/^static inline int ext2_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
ext2_set_bit	arch/mips/include/asm/bitops.h	/^#define ext2_set_bit(/;"	d
ext2_set_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int ext2_set_bit(int nr, void * addr)$/;"	f	typeref:typename:int
ext2_set_bit	arch/nds32/include/asm/bitops.h	/^#define ext2_set_bit	/;"	d
ext2_set_bit	arch/powerpc/include/asm/bitops.h	/^#define ext2_set_bit(/;"	d
ext2_set_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int ext2_set_bit(int nr, void * addr)$/;"	f	typeref:typename:int
ext2_set_bit	arch/sandbox/include/asm/bitops.h	/^#define ext2_set_bit	/;"	d
ext2_set_bit	arch/x86/include/asm/bitops.h	/^#define ext2_set_bit /;"	d
ext2_test_bit	arch/arm/include/asm/bitops.h	/^#define ext2_test_bit	/;"	d
ext2_test_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int ext2_test_bit(int nr, const volatile void *addr)$/;"	f	typeref:typename:int
ext2_test_bit	arch/microblaze/include/asm/bitops.h	/^static inline int ext2_test_bit(int nr, const volatile void *addr)$/;"	f	typeref:typename:int
ext2_test_bit	arch/mips/include/asm/bitops.h	/^#define ext2_test_bit(/;"	d
ext2_test_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int ext2_test_bit(int nr, const void * addr)$/;"	f	typeref:typename:int
ext2_test_bit	arch/nds32/include/asm/bitops.h	/^#define ext2_test_bit	/;"	d
ext2_test_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int ext2_test_bit(int nr, __const__ void * addr)$/;"	f	typeref:typename:int
ext2_test_bit	arch/sandbox/include/asm/bitops.h	/^#define ext2_test_bit	/;"	d
ext2_test_bit	arch/x86/include/asm/bitops.h	/^#define ext2_test_bit /;"	d
ext2fs_crc16	fs/ext4/crc16.c	/^unsigned int ext2fs_crc16(unsigned int crc,$/;"	f	typeref:typename:unsigned int
ext2fs_node	include/ext_common.h	/^struct ext2fs_node {$/;"	s
ext3_journal_block_tag	fs/ext4/ext4_journal.h	/^struct ext3_journal_block_tag {$/;"	s
ext4_extent	include/ext4fs.h	/^struct ext4_extent {$/;"	s
ext4_extent_header	include/ext4fs.h	/^struct ext4_extent_header {$/;"	s
ext4_extent_idx	include/ext4fs.h	/^struct ext4_extent_idx {$/;"	s
ext4_read_file	fs/ext4/ext4fs.c	/^int ext4_read_file(const char *filename, void *buf, loff_t offset, loff_t len,$/;"	f	typeref:typename:int
ext4_read_superblock	fs/ext4/dev.c	/^int ext4_read_superblock(char *buffer)$/;"	f	typeref:typename:int
ext4_write_file	fs/ext4/ext4_write.c	/^int ext4_write_file(const char *filename, void *buf, loff_t offset,$/;"	f	typeref:typename:int
ext4fs_allocate_blocks	fs/ext4/ext4_common.c	/^void ext4fs_allocate_blocks(struct ext2_inode *file_inode,$/;"	f	typeref:typename:void
ext4fs_bg_free_blocks_dec	fs/ext4/ext4_common.c	/^static inline void ext4fs_bg_free_blocks_dec$/;"	f	typeref:typename:void	file:
ext4fs_bg_free_blocks_inc	fs/ext4/ext4_write.c	/^static inline void ext4fs_bg_free_blocks_inc$/;"	f	typeref:typename:void	file:
ext4fs_bg_free_inodes_dec	fs/ext4/ext4_common.c	/^static inline void ext4fs_bg_free_inodes_dec$/;"	f	typeref:typename:void	file:
ext4fs_bg_free_inodes_inc	fs/ext4/ext4_write.c	/^static inline void ext4fs_bg_free_inodes_inc$/;"	f	typeref:typename:void	file:
ext4fs_bg_get_block_id	fs/ext4/ext4_common.c	/^uint64_t ext4fs_bg_get_block_id(const struct ext2_block_group *bg,$/;"	f	typeref:typename:uint64_t
ext4fs_bg_get_flags	fs/ext4/ext4_common.c	/^static inline uint16_t ext4fs_bg_get_flags(const struct ext2_block_group *bg)$/;"	f	typeref:typename:uint16_t	file:
ext4fs_bg_get_free_blocks	fs/ext4/ext4_common.c	/^uint32_t ext4fs_bg_get_free_blocks(const struct ext2_block_group *bg,$/;"	f	typeref:typename:uint32_t
ext4fs_bg_get_free_inodes	fs/ext4/ext4_common.c	/^uint32_t ext4fs_bg_get_free_inodes(const struct ext2_block_group *bg,$/;"	f	typeref:typename:uint32_t	file:
ext4fs_bg_get_inode_id	fs/ext4/ext4_common.c	/^uint64_t ext4fs_bg_get_inode_id(const struct ext2_block_group *bg,$/;"	f	typeref:typename:uint64_t
ext4fs_bg_get_inode_table_id	fs/ext4/ext4_common.c	/^uint64_t ext4fs_bg_get_inode_table_id(const struct ext2_block_group *bg,$/;"	f	typeref:typename:uint64_t
ext4fs_bg_itable_unused_dec	fs/ext4/ext4_common.c	/^static inline void ext4fs_bg_itable_unused_dec$/;"	f	typeref:typename:void	file:
ext4fs_bg_set_flags	fs/ext4/ext4_common.c	/^static inline void ext4fs_bg_set_flags(struct ext2_block_group *bg,$/;"	f	typeref:typename:void	file:
ext4fs_blk_desc	fs/ext4/dev.c	/^static struct blk_desc *ext4fs_blk_desc;$/;"	v	typeref:struct:blk_desc *	file:
ext4fs_blockgroup	fs/ext4/ext4_common.c	/^static int ext4fs_blockgroup$/;"	f	typeref:typename:int	file:
ext4fs_check_journal_state	fs/ext4/ext4_journal.c	/^int ext4fs_check_journal_state(int recovery_flag)$/;"	f	typeref:typename:int
ext4fs_checksum_update	fs/ext4/ext4_common.c	/^uint16_t ext4fs_checksum_update(uint32_t i)$/;"	f	typeref:typename:uint16_t
ext4fs_close	fs/ext4/ext4_common.c	/^void ext4fs_close(void)$/;"	f	typeref:typename:void
ext4fs_deinit	fs/ext4/ext4_write.c	/^void ext4fs_deinit(void)$/;"	f	typeref:typename:void
ext4fs_delete_file	fs/ext4/ext4_write.c	/^static int ext4fs_delete_file(int inodeno)$/;"	f	typeref:typename:int	file:
ext4fs_devread	fs/ext4/dev.c	/^int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf)$/;"	f	typeref:typename:int
ext4fs_div_roundup	fs/ext4/ext4_common.c	/^uint32_t ext4fs_div_roundup(uint32_t size, uint32_t n)$/;"	f	typeref:typename:uint32_t
ext4fs_dump_metadata	fs/ext4/ext4_journal.c	/^void ext4fs_dump_metadata(void)$/;"	f	typeref:typename:void
ext4fs_exists	fs/ext4/ext4fs.c	/^int ext4fs_exists(const char *filename)$/;"	f	typeref:typename:int
ext4fs_file	fs/ext4/ext4_common.c	/^struct ext2fs_node *ext4fs_file;$/;"	v	typeref:struct:ext2fs_node *
ext4fs_filename_unlink	fs/ext4/ext4_common.c	/^int ext4fs_filename_unlink(char *filename)$/;"	f	typeref:typename:int
ext4fs_find_file	fs/ext4/ext4_common.c	/^int ext4fs_find_file(const char *path, struct ext2fs_node *rootnode,$/;"	f	typeref:typename:int
ext4fs_find_file1	fs/ext4/ext4_common.c	/^static int ext4fs_find_file1(const char *currpath,$/;"	f	typeref:typename:int	file:
ext4fs_free_journal	fs/ext4/ext4_journal.c	/^void ext4fs_free_journal(void)$/;"	f	typeref:typename:void
ext4fs_free_node	fs/ext4/ext4fs.c	/^void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot)$/;"	f	typeref:typename:void
ext4fs_free_revoke_blks	fs/ext4/ext4_journal.c	/^void ext4fs_free_revoke_blks(void)$/;"	f	typeref:typename:void
ext4fs_get_bgdtable	fs/ext4/ext4_write.c	/^int ext4fs_get_bgdtable(void)$/;"	f	typeref:typename:int
ext4fs_get_extent_block	fs/ext4/ext4_common.c	/^static struct ext4_extent_header *ext4fs_get_extent_block$/;"	f	typeref:struct:ext4_extent_header *	file:
ext4fs_get_group_descriptor	fs/ext4/ext4_common.c	/^struct ext2_block_group *ext4fs_get_group_descriptor$/;"	f	typeref:struct:ext2_block_group *
ext4fs_get_new_blk_no	fs/ext4/ext4_common.c	/^uint32_t ext4fs_get_new_blk_no(void)$/;"	f	typeref:typename:uint32_t
ext4fs_get_new_inode_no	fs/ext4/ext4_common.c	/^int ext4fs_get_new_inode_no(void)$/;"	f	typeref:typename:int
ext4fs_get_parent_inode_num	fs/ext4/ext4_common.c	/^int ext4fs_get_parent_inode_num(const char *dirname, char *dname, int flags)$/;"	f	typeref:typename:int
ext4fs_iget	fs/ext4/ext4_common.c	/^int ext4fs_iget(int inode_no, struct ext2_inode *inode)$/;"	f	typeref:typename:int
ext4fs_indir1_blkno	fs/ext4/ext4_common.c	/^int ext4fs_indir1_blkno = -1;$/;"	v	typeref:typename:int
ext4fs_indir1_block	fs/ext4/ext4_common.c	/^__le32 *ext4fs_indir1_block;$/;"	v	typeref:typename:__le32 *
ext4fs_indir1_size	fs/ext4/ext4_common.c	/^int ext4fs_indir1_size;$/;"	v	typeref:typename:int
ext4fs_indir2_blkno	fs/ext4/ext4_common.c	/^int ext4fs_indir2_blkno = -1;$/;"	v	typeref:typename:int
ext4fs_indir2_block	fs/ext4/ext4_common.c	/^__le32 *ext4fs_indir2_block;$/;"	v	typeref:typename:__le32 *
ext4fs_indir2_size	fs/ext4/ext4_common.c	/^int ext4fs_indir2_size;$/;"	v	typeref:typename:int
ext4fs_indir3_blkno	fs/ext4/ext4_common.c	/^int ext4fs_indir3_blkno = -1;$/;"	v	typeref:typename:int
ext4fs_indir3_block	fs/ext4/ext4_common.c	/^__le32 *ext4fs_indir3_block;$/;"	v	typeref:typename:__le32 *
ext4fs_indir3_size	fs/ext4/ext4_common.c	/^int ext4fs_indir3_size;$/;"	v	typeref:typename:int
ext4fs_init	fs/ext4/ext4_write.c	/^int ext4fs_init(void)$/;"	f	typeref:typename:int
ext4fs_init_journal	fs/ext4/ext4_journal.c	/^int ext4fs_init_journal(void)$/;"	f	typeref:typename:int
ext4fs_iterate_dir	fs/ext4/ext4_common.c	/^int ext4fs_iterate_dir(struct ext2fs_node *dir, char *name,$/;"	f	typeref:typename:int
ext4fs_log_gdt	fs/ext4/ext4_journal.c	/^int ext4fs_log_gdt(char *gd_table)$/;"	f	typeref:typename:int
ext4fs_log_journal	fs/ext4/ext4_journal.c	/^int ext4fs_log_journal(char *journal_buffer, uint32_t blknr)$/;"	f	typeref:typename:int
ext4fs_ls	fs/ext4/ext4fs.c	/^int ext4fs_ls(const char *dirname)$/;"	f	typeref:typename:int
ext4fs_mount	fs/ext4/ext4_common.c	/^int ext4fs_mount(unsigned part_length)$/;"	f	typeref:typename:int
ext4fs_open	fs/ext4/ext4_common.c	/^int ext4fs_open(const char *filename, loff_t *len)$/;"	f	typeref:typename:int
ext4fs_probe	fs/ext4/ext4fs.c	/^int ext4fs_probe(struct blk_desc *fs_dev_desc,$/;"	f	typeref:typename:int
ext4fs_push_revoke_blk	fs/ext4/ext4_journal.c	/^void ext4fs_push_revoke_blk(char *buffer)$/;"	f	typeref:typename:void
ext4fs_put_metadata	fs/ext4/ext4_journal.c	/^int ext4fs_put_metadata(char *metadata_buffer, uint32_t blknr)$/;"	f	typeref:typename:int
ext4fs_read	fs/ext4/ext4fs.c	/^int ext4fs_read(char *buf, loff_t len, loff_t *actread)$/;"	f	typeref:typename:int
ext4fs_read_file	fs/ext4/ext4fs.c	/^int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,$/;"	f	typeref:typename:int
ext4fs_read_inode	fs/ext4/ext4_common.c	/^int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode)$/;"	f	typeref:typename:int
ext4fs_read_symlink	fs/ext4/ext4_common.c	/^static char *ext4fs_read_symlink(struct ext2fs_node *node)$/;"	f	typeref:typename:char *	file:
ext4fs_reinit_global	fs/ext4/ext4_common.c	/^void ext4fs_reinit_global(void)$/;"	f	typeref:typename:void
ext4fs_reset_block_bmap	fs/ext4/ext4_common.c	/^void ext4fs_reset_block_bmap(long int blockno, unsigned char *buffer, int index)$/;"	f	typeref:typename:void
ext4fs_reset_inode_bmap	fs/ext4/ext4_common.c	/^void ext4fs_reset_inode_bmap(int inode_no, unsigned char *buffer, int index)$/;"	f	typeref:typename:void
ext4fs_root	fs/ext4/ext4_common.c	/^struct ext2_data *ext4fs_root;$/;"	v	typeref:struct:ext2_data *
ext4fs_sb_free_blocks_dec	fs/ext4/ext4_common.c	/^static inline void ext4fs_sb_free_blocks_dec(struct ext2_sblock *sb)$/;"	f	typeref:typename:void	file:
ext4fs_sb_free_blocks_inc	fs/ext4/ext4_write.c	/^static inline void ext4fs_sb_free_blocks_inc(struct ext2_sblock *sb)$/;"	f	typeref:typename:void	file:
ext4fs_sb_free_inodes_dec	fs/ext4/ext4_common.c	/^static inline void ext4fs_sb_free_inodes_dec(struct ext2_sblock *sb)$/;"	f	typeref:typename:void	file:
ext4fs_sb_free_inodes_inc	fs/ext4/ext4_write.c	/^static inline void ext4fs_sb_free_inodes_inc(struct ext2_sblock *sb)$/;"	f	typeref:typename:void	file:
ext4fs_sb_get_free_blocks	fs/ext4/ext4_common.c	/^uint64_t ext4fs_sb_get_free_blocks(const struct ext2_sblock *sb)$/;"	f	typeref:typename:uint64_t
ext4fs_sb_set_free_blocks	fs/ext4/ext4_common.c	/^void ext4fs_sb_set_free_blocks(struct ext2_sblock *sb, uint64_t free_blocks)$/;"	f	typeref:typename:void
ext4fs_set_blk_dev	fs/ext4/dev.c	/^void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)$/;"	f	typeref:typename:void
ext4fs_set_block_bmap	fs/ext4/ext4_common.c	/^int ext4fs_set_block_bmap(long int blockno, unsigned char *buffer, int index)$/;"	f	typeref:typename:int
ext4fs_set_inode_bmap	fs/ext4/ext4_common.c	/^int ext4fs_set_inode_bmap(int inode_no, unsigned char *buffer, int index)$/;"	f	typeref:typename:int
ext4fs_size	fs/ext4/ext4fs.c	/^int ext4fs_size(const char *filename, loff_t *size)$/;"	f	typeref:typename:int
ext4fs_symlinknest	fs/ext4/ext4fs.c	/^int ext4fs_symlinknest;$/;"	v	typeref:typename:int
ext4fs_update	fs/ext4/ext4_write.c	/^static void ext4fs_update(void)$/;"	f	typeref:typename:void	file:
ext4fs_update_journal	fs/ext4/ext4_journal.c	/^void ext4fs_update_journal(void)$/;"	f	typeref:typename:void
ext4fs_update_parent_dentry	fs/ext4/ext4_common.c	/^int ext4fs_update_parent_dentry(char *filename, int file_type)$/;"	f	typeref:typename:int
ext4fs_uuid	fs/ext4/ext4fs.c	/^int ext4fs_uuid(char *uuid_str)$/;"	f	typeref:typename:int
ext4fs_write	fs/ext4/ext4_write.c	/^int ext4fs_write(const char *fname, unsigned char *buffer,$/;"	f	typeref:typename:int
ext4fs_write_file	fs/ext4/ext4_write.c	/^static int ext4fs_write_file(struct ext2_inode *file_inode,$/;"	f	typeref:typename:int	file:
ext_addr	include/flash.h	/^	ushort	ext_addr;		\/* extended query table address		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
ext_boot_sign	include/fat.h	/^	__u8 ext_boot_sign;	\/* 0x29 if fields below exist (DOS 3.3+) *\/$/;"	m	struct:volume_info	typeref:typename:__u8
ext_bus_cntlr_init	board/amcc/bamboo/bamboo.c	/^void ext_bus_cntlr_init(void)$/;"	f	typeref:typename:void
ext_bus_cntlr_init	board/amcc/makalu/init.S	/^ext_bus_cntlr_init:$/;"	l
ext_bus_cntlr_init	board/mpl/mip405/init.S	/^ext_bus_cntlr_init:$/;"	l
ext_bus_cntlr_init	board/mpl/pip405/init.S	/^ ext_bus_cntlr_init:$/;"	l
ext_c_ddc	drivers/block/fsl_sata.h	/^	__le32 ext_c_ddc; \/* Indirect PRD flags, snoop and data word count *\/$/;"	m	struct:prd_entry	typeref:typename:__le32
ext_cfg_iova	include/fsl-mc/fsl_dpni.h	/^		uint64_t	ext_cfg_iova;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint64_t
ext_cfg_iova	include/fsl-mc/fsl_dpni.h	/^	uint64_t	ext_cfg_iova;$/;"	m	struct:dpni_attr	typeref:typename:uint64_t
ext_checksum	arch/x86/include/asm/acpi_table.h	/^	u8 ext_checksum;	\/* Checksum of the whole table *\/$/;"	m	struct:acpi_rsdp	typeref:typename:u8
ext_clk	drivers/video/ipu.h	/^	unsigned ext_clk:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
ext_clk_count	arch/arm/mach-keystone/include/mach/clock.h	/^	ext_clk_count \/* number of external clocks *\/$/;"	e	enum:ext_clk_e
ext_clk_e	arch/arm/mach-keystone/include/mach/clock.h	/^enum ext_clk_e {$/;"	g
ext_clk_used	drivers/video/mxc_ipuv3_fb.c	/^static int ext_clk_used;$/;"	v	typeref:typename:int	file:
ext_cpu_cfg	include/vsc9953.h	/^	u32	ext_cpu_cfg;$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32
ext_field	drivers/clk/clk_boston.c	/^static uint32_t ext_field(uint32_t val, uint32_t mask)$/;"	f	typeref:typename:uint32_t	file:
ext_filesystem	include/ext4fs.h	/^struct ext_filesystem {$/;"	s
ext_flash	arch/nios2/dts/10m50_devboard.dts	/^		ext_flash: quadspi@0x180014a0 {$/;"	l	label:sopc0
ext_fs	fs/ext4/ext4fs.c	/^struct ext_filesystem ext_fs;$/;"	v	typeref:struct:ext_filesystem
ext_gmac	arch/arm/dts/rk3288-fennec.dtsi	/^	ext_gmac: external-gmac-clock {$/;"	l
ext_gmac	arch/arm/dts/rk3288-firefly.dtsi	/^	ext_gmac: external-gmac-clock {$/;"	l
ext_gmac	arch/arm/dts/rk3288-miniarm.dtsi	/^	ext_gmac: external-gmac-clock {$/;"	l
ext_gmac	arch/arm/dts/rk3288-popmetal.dtsi	/^	ext_gmac: external-gmac-clock {$/;"	l
ext_gmac	arch/arm/dts/rk3288-rock2-som.dtsi	/^	ext_gmac: external-gmac-clock {$/;"	l
ext_hdr_off	arch/x86/include/asm/fsp/fsp_fv.h	/^	u16			ext_hdr_off;$/;"	m	struct:fv_header	typeref:typename:u16
ext_hdr_size	arch/x86/include/asm/fsp/fsp_fv.h	/^	u32			ext_hdr_size;$/;"	m	struct:fv_ext_header	typeref:typename:u32
ext_hdr_v0	tools/kwbimage.h	/^struct ext_hdr_v0 {$/;"	s
ext_hdr_v0_reg	tools/kwbimage.h	/^struct ext_hdr_v0_reg {$/;"	s
ext_header	tools/imximage.h	/^	flash_cfg_parms_t ext_header;$/;"	m	struct:__anon504a956c0608	typeref:typename:flash_cfg_parms_t
ext_jedec	drivers/mtd/spi/sf_internal.h	/^	u16 ext_jedec;$/;"	m	struct:spi_flash_params	typeref:typename:u16
ext_key_map	drivers/input/i8042.c	/^static unsigned char ext_key_map[] = {$/;"	v	typeref:typename:unsigned char[]	file:
ext_loader_type	arch/x86/include/asm/bootparam.h	/^	__u8	ext_loader_type;$/;"	m	struct:setup_header	typeref:typename:__u8
ext_loader_ver	arch/x86/include/asm/bootparam.h	/^	__u8	ext_loader_ver;$/;"	m	struct:setup_header	typeref:typename:__u8
ext_mem_k	include/linux/screen_info.h	/^	__u16 ext_mem_k;	\/* 0x02 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
ext_param_page_length	include/linux/mtd/nand.h	/^	__le16 ext_param_page_length; \/* since ONFI 2.1 *\/$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
ext_phy_ctrl_const_base	arch/arm/cpu/armv7/omap5/sdram.c	/^const u32 ext_phy_ctrl_const_base[] = {$/;"	v	typeref:typename:const u32[]
ext_phy_ctrl_const_base_ddr3	board/compulab/cm_t43/spl.c	/^const u32 ext_phy_ctrl_const_base_ddr3[] = {$/;"	v	typeref:typename:const u32[]
ext_phy_ctrl_const_base_lpddr2	board/ti/am43xx/board.c	/^static const u32 ext_phy_ctrl_const_base_lpddr2[] = {$/;"	v	typeref:typename:const u32[]	file:
ext_phy_settings_hwlvl	arch/arm/cpu/armv7/am33xx/ddr.c	/^static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr)$/;"	f	typeref:typename:void	file:
ext_phy_settings_swlvl	arch/arm/cpu/armv7/am33xx/ddr.c	/^static void ext_phy_settings_swlvl(const struct emif_regs *regs, int nr)$/;"	f	typeref:typename:void	file:
ext_port	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 ext_port;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
ext_ram_fmc_gpio	board/st/stm32f429-discovery/stm32f429-discovery.c	/^static const struct stm32_gpio_dsc ext_ram_fmc_gpio[] = {$/;"	v	typeref:typename:const struct stm32_gpio_dsc[]	file:
ext_ram_fmc_gpio	board/st/stm32f746-disco/stm32f746-disco.c	/^static const struct stm32_gpio_dsc ext_ram_fmc_gpio[] = {$/;"	v	typeref:typename:const struct stm32_gpio_dsc[]	file:
ext_regulator_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ext_regulator_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ext_regulator_duration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_duration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
ext_regulator_duration3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_duration3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ext_regulator_duration3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_duration3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ext_regulator_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ext_regulator_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ext_regulator_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ext_regulator_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ext_regulator_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
ext_regulator_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ext_regulator_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ext_regulator_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ext_size	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u32			ext_size;$/;"	m	struct:ffs_file_header2	typeref:typename:u32
ext_size	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u32	ext_size;$/;"	m	struct:raw_section2	typeref:typename:u32
ext_status	drivers/net/calxedaxgmac.c	/^	__le32 ext_status;$/;"	m	struct:xgmac_dma_desc	typeref:typename:__le32	file:
ext_type	include/ddr_spd.h	/^	uint8_t ext_type;		\/* 15 Extended module type *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
ext_vbus	drivers/usb/host/dwc2.c	/^	bool ext_vbus;$/;"	m	struct:dwc2_priv	typeref:typename:bool	file:
ext_wakeup	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ext_wakeup;$/;"	m	struct:pad_signals	typeref:typename:int
ext_wakeup0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int ext_wakeup0;$/;"	m	struct:pad_signals	typeref:typename:int
extclkreq	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 extclkreq;          \/* 0x0200 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
extcmd_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 extcmd_params_sn20[]		= {0xff, 0x98, 0x06};$/;"	v	typeref:typename:u16[]	file:
extcon_usb1	arch/arm/dts/am57xx-beagle-x15.dts	/^	extcon_usb1: extcon_usb1 {$/;"	l
extcon_usb1	arch/arm/dts/dra7-evm.dts	/^	extcon_usb1: extcon_usb1 {$/;"	l
extcon_usb1	arch/arm/dts/dra72-evm-common.dtsi	/^	extcon_usb1: extcon_usb1 {$/;"	l
extcon_usb1_pins	arch/arm/dts/am57xx-beagle-x15.dts	/^	extcon_usb1_pins: extcon_usb1_pins {$/;"	l
extcon_usb2	arch/arm/dts/am572x-idk.dts	/^	extcon_usb2: extcon_usb2 {$/;"	l
extcon_usb2	arch/arm/dts/am57xx-beagle-x15.dts	/^	extcon_usb2: extcon_usb2 {$/;"	l
extcon_usb2	arch/arm/dts/dra7-evm.dts	/^	extcon_usb2: extcon_usb2 {$/;"	l
extcon_usb2	arch/arm/dts/dra72-evm-common.dtsi	/^	extcon_usb2: extcon_usb2 {$/;"	l
extcon_usb2_pins	arch/arm/dts/am57xx-beagle-x15.dts	/^	extcon_usb2_pins: extcon_usb2_pins {$/;"	l
extct	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 extct;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
extend_feature_present	arch/x86/include/asm/me_common.h	/^	u32 extend_feature_present:1;$/;"	m	struct:me_heres	typeref:typename:u32:1
extend_matched_lines	tools/moveconfig.py	/^def extend_matched_lines(lines, matched, pre_patterns, post_patterns, extend_pre,$/;"	f
extend_reg_algorithm	arch/x86/include/asm/me_common.h	/^	u32 extend_reg_algorithm:4;$/;"	m	struct:me_heres	typeref:typename:u32:4
extend_reg_valid	arch/x86/include/asm/me_common.h	/^	u32 extend_reg_valid:1;$/;"	m	struct:me_heres	typeref:typename:u32:1
extend_wait	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned extend_wait;$/;"	m	struct:aemif_config	typeref:typename:unsigned
extended	arch/m68k/include/asm/rtc.h	/^	void *extended;$/;"	m	struct:rtc_ctrl	typeref:typename:void *
extended	drivers/input/i8042.c	/^	bool extended;	\/* true if an extended keycode is expected next *\/$/;"	m	struct:i8042_kbd_priv	typeref:typename:bool	file:
extended_10bt_distance	drivers/net/e1000.h	/^	e1000_10bt_ext_dist_enable extended_10bt_distance;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_10bt_ext_dist_enable
extended_control	include/gdsys_fpga.h	/^	u16 extended_control;	\/* 0x0012 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
extended_interrupt	include/gdsys_fpga.h	/^	u16 extended_interrupt; \/* 0x001c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
extended_modes	include/fsl_qe.h	/^	u64 extended_modes;	\/* Extended modes *\/$/;"	m	struct:qe_firmware	typeref:typename:u64
extended_modes	include/fsl_qe.h	/^	u64 extended_modes;	\/* Extended modes *\/$/;"	m	struct:qe_firmware_info	typeref:typename:u64
extended_op_srt	include/common_timing_params.h	/^	unsigned int extended_op_srt;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
extended_op_srt	include/fsl_ddr_dimm_params.h	/^	int extended_op_srt;$/;"	m	struct:dimm_params_s	typeref:typename:int
extended_wait	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 extended_wait;	\/* time for static memory rd\/wr transfers    *\/$/;"	m	struct:emc_regs	typeref:typename:u32
extension_flag	include/edid.h	/^	unsigned char extension_flag;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
extension_tag	include/edid.h	/^	unsigned char extension_tag;$/;"	m	struct:edid_cea861_info	typeref:typename:unsigned char
extension_unit	include/usbdescriptors.h	/^		struct usb_class_extension_unit_descriptor extension_unit;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_extension_unit_descriptor
external_clk	board/ti/ks2_evm/board_k2e.c	/^unsigned int external_clk[ext_clk_count] = {$/;"	v	typeref:typename:unsigned int[]
external_clk	board/ti/ks2_evm/board_k2g.c	/^unsigned int external_clk[ext_clk_count] = {$/;"	v	typeref:typename:unsigned int[]
external_clk	board/ti/ks2_evm/board_k2hk.c	/^unsigned int external_clk[ext_clk_count] = {$/;"	v	typeref:typename:unsigned int[]
external_clk	board/ti/ks2_evm/board_k2l.c	/^unsigned int external_clk[ext_clk_count] = {$/;"	v	typeref:typename:unsigned int[]
external_clock	include/smbios.h	/^	u16 external_clock;$/;"	m	struct:smbios_type4	typeref:typename:u16
external_data	tools/imagetool.h	/^	bool external_data;	\/* Store data outside the FIT *\/$/;"	m	struct:image_tool_params	typeref:typename:bool
external_interrupt	arch/nios2/cpu/interrupts.c	/^void external_interrupt (struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/mpc5xx/interrupts.c	/^void external_interrupt (struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^void external_interrupt(struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/mpc8260/interrupts.c	/^void external_interrupt (struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/mpc83xx/interrupts.c	/^void external_interrupt (struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/mpc86xx/interrupts.c	/^void external_interrupt(struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/mpc8xx/interrupts.c	/^void external_interrupt (struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/ppc4xx/uic.c	/^void external_interrupt(struct pt_regs *regs)$/;"	f	typeref:typename:void
external_interrupt	arch/powerpc/cpu/ppc4xx/xilinx_irq.c	/^void external_interrupt(struct pt_regs *regs)$/;"	f	typeref:typename:void
external_offset	tools/imagetool.h	/^	unsigned int external_offset;	\/* Add padding to external data *\/$/;"	m	struct:image_tool_params	typeref:typename:unsigned int
externalbdbaseptr	drivers/qe/uec.h	/^	u32   externalbdbaseptr; \/* external BD base pointer *\/$/;"	m	struct:uec_rx_bd_queues_entry	typeref:typename:u32
externalbdptr	drivers/qe/uec.h	/^	u32   externalbdptr;     \/* external BD pointer      *\/$/;"	m	struct:uec_rx_bd_queues_entry	typeref:typename:u32
externalfunctions	scripts/docproc.c	/^FILEONLY *externalfunctions;$/;"	v	typeref:typename:FILEONLY *
extfunc	scripts/docproc.c	/^static void extfunc(char * filename) { docfunctions(filename, FUNCTION);   }$/;"	f	typeref:typename:void	file:
extint	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	extint;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
extint0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	extint0;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
extint1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	extint1;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
extint2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	extint2;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
extmode	arch/mips/mach-ath79/ar934x/ddr.c	/^	u32	extmode;$/;"	m	struct:ar934x_mem_config	typeref:typename:u32	file:
extpwronrstctrl	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 extpwronrstctrl;    \/* 0x0420 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
extra	include/u-boot/zlib.h	/^	Bytef	*extra;	\/* pointer to extra field or Z_NULL if none *\/$/;"	m	struct:gz_header_s	typeref:typename:Bytef *
extra	lib/zlib/inflate.h	/^    unsigned extra;             \/* extra bits needed *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
extra	tools/mxsimage.h	/^			uint8_t extra[4];$/;"	m	struct:sb_boot_image_header::__anonc4848c96010a::__anonc4848c960208	typeref:typename:uint8_t[4]
extra-$(CONFIG_SPL_BUILD)	arch/arm/cpu/arm926ejs/mxs/Makefile	/^extra-$(CONFIG_SPL_BUILD) := start.o$/;"	m
extra-$(CONFIG_SPL_BUILD)	arch/arm/cpu/arm926ejs/spear/Makefile	/^extra-$(CONFIG_SPL_BUILD) := start.o$/;"	m
extra-y	arch/arc/lib/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/arm1136/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/arm1176/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/arm720t/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/arm920t/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/arm926ejs/Makefile	/^extra-y	:=$/;"	m
extra-y	arch/arm/cpu/arm926ejs/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/arm946es/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/armv7/Makefile	/^extra-y	:= start.o$/;"	m
extra-y	arch/arm/cpu/armv7m/Makefile	/^extra-y := start.o$/;"	m
extra-y	arch/arm/cpu/armv8/Makefile	/^extra-y	:= start.o$/;"	m
extra-y	arch/arm/cpu/pxa/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/arm/cpu/sa1100/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/blackfin/cpu/Makefile	/^extra-y := init.elf$/;"	m
extra-y	arch/m68k/cpu/mcf5227x/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/m68k/cpu/mcf523x/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/m68k/cpu/mcf52x2/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/m68k/cpu/mcf530x/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/m68k/cpu/mcf532x/Makefile	/^extra-y := start.o$/;"	m
extra-y	arch/m68k/cpu/mcf5445x/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/m68k/cpu/mcf547x_8x/Makefile	/^extra-y = start.o$/;"	m
extra-y	arch/microblaze/cpu/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/mips/cpu/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/nds32/cpu/n1213/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/nios2/cpu/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/openrisc/cpu/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/mpc512x/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/mpc5xx/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/mpc5xxx/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/mpc8260/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/mpc83xx/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/mpc85xx/Makefile	/^extra-y = start.o resetvec.o$/;"	m
extra-y	arch/powerpc/cpu/mpc86xx/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/powerpc/cpu/ppc4xx/Makefile	/^extra-y	:= resetvec.o$/;"	m
extra-y	arch/sh/cpu/sh2/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/sh/cpu/sh3/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/sh/cpu/sh4/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/sparc/cpu/leon2/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/sparc/cpu/leon3/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/x86/cpu/Makefile	/^extra-y	= start.o$/;"	m
extra-y	arch/xtensa/cpu/Makefile	/^extra-y = start.o$/;"	m
extra-y	board/h2200/Makefile	/^extra-y := h2200-header.bin$/;"	m
extra-y	examples/api/Makefile	/^extra-y = demo$/;"	m
extra-y	examples/standalone/Makefile	/^extra-y        := hello_world$/;"	m
extra_available	fs/yaffs2/yaffs_guts.h	/^	unsigned extra_available;	\/* Extra info available if not zero *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
extra_base	lib/zlib/trees.c	/^    int     extra_base;          \/* base index for extra_bits *\/$/;"	m	struct:static_tree_desc_s	typeref:typename:int	file:
extra_bits	lib/zlib/trees.c	/^    const intf *extra_bits;      \/* extra bits for each code or NULL *\/$/;"	m	struct:static_tree_desc_s	typeref:typename:const intf *	file:
extra_blbits	lib/zlib/trees.c	/^local const int extra_blbits[BL_CODES]\/* extra bits for each bit length code *\/$/;"	v	typeref:typename:local const int[]
extra_byte	drivers/net/ks8851_mll.c	/^	u8			extra_byte;$/;"	m	struct:ks_net	typeref:typename:u8	file:
extra_dbits	lib/zlib/trees.c	/^local const int extra_dbits[D_CODES] \/* extra bits for each distance code *\/$/;"	v	typeref:typename:local const int[]
extra_equiv_id	fs/yaffs2/yaffs_guts.h	/^	unsigned extra_equiv_id;	\/* Equivalent object for a hard link *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
extra_file_size	fs/yaffs2/yaffs_guts.h	/^	loff_t extra_file_size;		\/* Length if it is a file *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:loff_t
extra_is_shrink	fs/yaffs2/yaffs_guts.h	/^	unsigned extra_is_shrink;	\/* Is it a shrink header? *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
extra_lbits	lib/zlib/trees.c	/^local const int extra_lbits[LENGTH_CODES] \/* extra bits for each length code *\/$/;"	v	typeref:typename:local const int[]
extra_len	include/u-boot/zlib.h	/^	uInt	extra_len; \/* extra field length (valid if extra != Z_NULL) *\/$/;"	m	struct:gz_header_s	typeref:typename:uInt
extra_max	include/u-boot/zlib.h	/^	uInt	extra_max; \/* space at extra (only when reading header) *\/$/;"	m	struct:gz_header_s	typeref:typename:uInt
extra_obj_type	fs/yaffs2/yaffs_guts.h	/^	enum yaffs_obj_type extra_obj_type;	\/* What object type? *\/$/;"	m	struct:yaffs_ext_tags	typeref:enum:yaffs_obj_type
extra_parent_id	fs/yaffs2/yaffs_guts.h	/^	unsigned extra_parent_id;	\/* The parent object *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
extra_shadows	fs/yaffs2/yaffs_guts.h	/^	unsigned extra_shadows;	\/* Does this shadow another object? *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
extra_version	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *extra_version;$/;"	m	struct:sysinfo_t	typeref:typename:char *
extrabw	drivers/qe/uec.h	/^	u8   extrabw;          \/* Extra BandWidth register      *\/$/;"	m	struct:uec_scheduler	typeref:typename:u8
extrabytes	drivers/block/sata_dwc.h	/^	unsigned int		extrabytes;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
extract_env	cmd/gpt.c	/^static int extract_env(const char *str, char **env)$/;"	f	typeref:typename:int	file:
extract_fit_image	test/image/test-imagetools.sh	/^extract_fit_image()$/;"	f
extract_formatted_signatures	scripts/get_maintainer.pl	/^sub extract_formatted_signatures {$/;"	s
extract_multi_image	test/image/test-imagetools.sh	/^extract_multi_image()$/;"	f
extract_phy_range	cmd/mdio.c	/^static int extract_phy_range(char *const argv[], int argc, struct mii_dev **bus,$/;"	f	typeref:typename:int	file:
extract_range	cmd/mdio.c	/^static int extract_range(char *input, int *plo, int *phi)$/;"	f	typeref:typename:int	file:
extract_range	cmd/mii.c	/^static void extract_range($/;"	f	typeref:typename:void	file:
extract_reg_range	cmd/mdio.c	/^static int extract_reg_range(char *input, int *devadlo, int *devadhi,$/;"	f	typeref:typename:int	file:
extract_subimage	tools/imagetool.h	/^	int (*extract_subimage)(void *, struct image_tool_params *);$/;"	m	struct:image_type_params	typeref:typename:int (*)(void *,struct image_tool_params *)
extract_val	cmd/gpt.c	/^static char *extract_val(const char *str, const char *key)$/;"	f	typeref:typename:char *	file:
extratime1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	extratime1;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
extratime1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	extratime1;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
extsts	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 extsts;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
extsts	drivers/net/ns8382x.c	/^	u32 extsts;		\/*not used here *\/$/;"	m	struct:_BufferDesc	typeref:typename:u32	file:
extsw_conf	board/keymile/km83xx/km83xx.c	/^static struct mv88e_sw_reg extsw_conf[] = {$/;"	v	typeref:struct:mv88e_sw_reg[]	file:
extsw_conf	board/keymile/km_arm/km_arm.c	/^struct mv88e_sw_reg extsw_conf[] = {$/;"	v	typeref:struct:mv88e_sw_reg[]
extsw_conf	board/keymile/km_arm/km_arm.c	/^struct mv88e_sw_reg extsw_conf[] = {};$/;"	v	typeref:struct:mv88e_sw_reg[]
extvbus	drivers/usb/musb/musb_core.h	/^	u8			extvbus;$/;"	m	struct:musb_config	typeref:typename:u8
extvbus	include/linux/usb/musb.h	/^	unsigned	extvbus:1;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:unsigned:1
extwarmrstst_reg	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 extwarmrstst_reg;   \/* 0x0510 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
extype	include/kgdb.h	/^		int extype;$/;"	m	struct:__anon584037260208	typeref:typename:int
exwtsts	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exwtsts;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exwtsync	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 exwtsync;$/;"	m	struct:rcar_lbsc	typeref:typename:u32
exynos4412_power	arch/arm/mach-exynos/include/mach/power.h	/^struct exynos4412_power {$/;"	s
exynos4412_reset_usb_phy	drivers/usb/host/ehci-exynos.c	/^static void exynos4412_reset_usb_phy(struct exynos4412_usb_phy *usb)$/;"	f	typeref:typename:void	file:
exynos4412_set_usbhost_phy_ctrl	arch/arm/mach-exynos/power.c	/^void exynos4412_set_usbhost_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void
exynos4412_setup_usb_phy	drivers/usb/host/ehci-exynos.c	/^static void exynos4412_setup_usb_phy(struct exynos4412_usb_phy *usb)$/;"	f	typeref:typename:void	file:
exynos4412_usb_phy	arch/arm/mach-exynos/include/mach/ehci.h	/^struct exynos4412_usb_phy {$/;"	s
exynos4X12_gpio_pin	arch/arm/mach-exynos/include/mach/gpio.h	/^enum exynos4X12_gpio_pin {$/;"	g
exynos4_clock	arch/arm/mach-exynos/include/mach/clock.h	/^struct exynos4_clock {$/;"	s
exynos4_dmc	arch/arm/mach-exynos/include/mach/dmc.h	/^struct exynos4_dmc {$/;"	s
exynos4_get_arm_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_arm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos4_get_i2c_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_i2c_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos4_get_lcd_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_lcd_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos4_get_mmc_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_mmc_clk(int dev_index)$/;"	f	typeref:typename:unsigned long	file:
exynos4_get_pll_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long	file:
exynos4_get_pwm_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_pwm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos4_get_reset_status	arch/arm/mach-exynos/power.c	/^static uint32_t exynos4_get_reset_status(void)$/;"	f	typeref:typename:uint32_t	file:
exynos4_get_uart_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4_get_uart_clk(int dev_index)$/;"	f	typeref:typename:unsigned long	file:
exynos4_gpio_data	arch/arm/mach-exynos/include/mach/gpio.h	/^static struct gpio_info exynos4_gpio_data[EXYNOS4_GPIO_NUM_PARTS] = {$/;"	v	typeref:struct:gpio_info[]
exynos4_gpio_pin	arch/arm/mach-exynos/include/mach/gpio.h	/^enum exynos4_gpio_pin {$/;"	g
exynos4_gpio_table	arch/arm/mach-exynos/include/mach/gpio.h	/^static const struct gpio_name_num_table exynos4_gpio_table[] = {$/;"	v	typeref:typename:const struct gpio_name_num_table[]
exynos4_i2c_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos4_i2c_config(int peripheral, int flags)$/;"	f	typeref:typename:void	file:
exynos4_mipi_phy_control	arch/arm/mach-exynos/power.c	/^static void exynos4_mipi_phy_control(unsigned int dev_index,$/;"	f	typeref:typename:void	file:
exynos4_mmc_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos4_mmc_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos4_pinmux_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos4_pinmux_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos4_pinmux_decode_periph_id	arch/arm/mach-exynos/pinmux.c	/^static int exynos4_pinmux_decode_periph_id(const void *blob, int node)$/;"	f	typeref:typename:int	file:
exynos4_power	arch/arm/mach-exynos/include/mach/power.h	/^struct exynos4_power {$/;"	s
exynos4_power_exit_wakeup	arch/arm/mach-exynos/power.c	/^static void exynos4_power_exit_wakeup(void)$/;"	f	typeref:typename:void	file:
exynos4_set_lcd_clk	arch/arm/mach-exynos/clock.c	/^void exynos4_set_lcd_clk(void)$/;"	f	typeref:typename:void
exynos4_set_mipi_clk	arch/arm/mach-exynos/clock.c	/^void exynos4_set_mipi_clk(void)$/;"	f	typeref:typename:void
exynos4_set_mmc_clk	arch/arm/mach-exynos/clock.c	/^static void exynos4_set_mmc_clk(int dev_index, unsigned int div)$/;"	f	typeref:typename:void	file:
exynos4_set_system_display	arch/arm/mach-exynos/system.c	/^static void exynos4_set_system_display(void)$/;"	f	typeref:typename:void	file:
exynos4_sysreg	arch/arm/mach-exynos/include/mach/system.h	/^struct exynos4_sysreg {$/;"	s
exynos4_uart_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos4_uart_config(int peripheral)$/;"	f	typeref:typename:void	file:
exynos4x12_clock	arch/arm/mach-exynos/include/mach/clock.h	/^struct exynos4x12_clock {$/;"	s
exynos4x12_get_arm_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4x12_get_arm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos4x12_get_pll_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4x12_get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long	file:
exynos4x12_get_pwm_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4x12_get_pwm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos4x12_get_uart_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos4x12_get_uart_clk(int dev_index)$/;"	f	typeref:typename:unsigned long	file:
exynos4x12_gpio_data	arch/arm/mach-exynos/include/mach/gpio.h	/^static struct gpio_info exynos4x12_gpio_data[EXYNOS4X12_GPIO_NUM_PARTS] = {$/;"	v	typeref:struct:gpio_info[]
exynos4x12_gpio_table	arch/arm/mach-exynos/include/mach/gpio.h	/^static const struct gpio_name_num_table exynos4x12_gpio_table[] = {$/;"	v	typeref:typename:const struct gpio_name_num_table[]
exynos4x12_i2c_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos4x12_i2c_config(int peripheral, int flags)$/;"	f	typeref:typename:void	file:
exynos4x12_mmc_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos4x12_mmc_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos4x12_pinmux_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos4x12_pinmux_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos4x12_uart_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos4x12_uart_config(int peripheral)$/;"	f	typeref:typename:void	file:
exynos5250_system_clock_init	arch/arm/mach-exynos/clock_init_exynos5.c	/^static void exynos5250_system_clock_init(void)$/;"	f	typeref:typename:void	file:
exynos5420_clock	arch/arm/mach-exynos/include/mach/clock.h	/^struct exynos5420_clock {$/;"	s
exynos5420_dmc	arch/arm/mach-exynos/include/mach/dmc.h	/^struct exynos5420_dmc {$/;"	s
exynos5420_get_lcd_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos5420_get_lcd_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos5420_gpio_data	arch/arm/mach-exynos/include/mach/gpio.h	/^static struct gpio_info exynos5420_gpio_data[EXYNOS5420_GPIO_NUM_PARTS] = {$/;"	v	typeref:struct:gpio_info[]
exynos5420_gpio_pin	arch/arm/mach-exynos/include/mach/gpio.h	/^enum exynos5420_gpio_pin {$/;"	g
exynos5420_gpio_table	arch/arm/mach-exynos/include/mach/gpio.h	/^static const struct gpio_name_num_table exynos5420_gpio_table[] = {$/;"	v	typeref:typename:const struct gpio_name_num_table[]
exynos5420_i2c_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos5420_i2c_config(int peripheral)$/;"	f	typeref:typename:void	file:
exynos5420_mmc_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos5420_mmc_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos5420_phy_control	arch/arm/mach-exynos/include/mach/dmc.h	/^struct exynos5420_phy_control {$/;"	s
exynos5420_pinmux_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos5420_pinmux_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos5420_power	arch/arm/mach-exynos/include/mach/power.h	/^struct exynos5420_power {$/;"	s
exynos5420_set_lcd_clk	arch/arm/mach-exynos/clock.c	/^void exynos5420_set_lcd_clk(void)$/;"	f	typeref:typename:void
exynos5420_set_mmc_clk	arch/arm/mach-exynos/clock.c	/^static void exynos5420_set_mmc_clk(int dev_index, unsigned int div)$/;"	f	typeref:typename:void	file:
exynos5420_set_spi_clk	arch/arm/mach-exynos/clock.c	/^static int exynos5420_set_spi_clk(enum periph_id periph_id,$/;"	f	typeref:typename:int	file:
exynos5420_set_usbdev_phy_ctrl	arch/arm/mach-exynos/power.c	/^static void exynos5420_set_usbdev_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void	file:
exynos5420_spi_config	arch/arm/mach-exynos/pinmux.c	/^void exynos5420_spi_config(int peripheral)$/;"	f	typeref:typename:void
exynos5420_system_clock_init	arch/arm/mach-exynos/clock_init_exynos5.c	/^static void exynos5420_system_clock_init(void)$/;"	f	typeref:typename:void	file:
exynos5420_tzasc	arch/arm/mach-exynos/include/mach/dmc.h	/^struct exynos5420_tzasc {$/;"	s
exynos5420_uart_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos5420_uart_config(int peripheral)$/;"	f	typeref:typename:void	file:
exynos542x_bit_info	arch/arm/mach-exynos/clock.c	/^static struct clk_bit_info exynos542x_bit_info[] = {$/;"	v	typeref:struct:clk_bit_info[]	file:
exynos542x_get_periph_rate	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos542x_get_periph_rate(int peripheral)$/;"	f	typeref:typename:unsigned long	file:
exynos542x_get_pll_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos542x_get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long	file:
exynos5800_get_lcd_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos5800_get_lcd_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos5800_set_lcd_clk	arch/arm/mach-exynos/clock.c	/^void exynos5800_set_lcd_clk(void)$/;"	f	typeref:typename:void
exynos5_bit_info	arch/arm/mach-exynos/clock.c	/^static struct clk_bit_info exynos5_bit_info[] = {$/;"	v	typeref:struct:clk_bit_info[]	file:
exynos5_clock	arch/arm/mach-exynos/include/mach/clock.h	/^struct exynos5_clock {$/;"	s
exynos5_dmc	arch/arm/mach-exynos/include/mach/dmc.h	/^struct exynos5_dmc {$/;"	s
exynos5_dp_phy_control	arch/arm/mach-exynos/power.c	/^static void exynos5_dp_phy_control(unsigned int enable)$/;"	f	typeref:typename:void	file:
exynos5_epll_div	arch/arm/mach-exynos/clock.c	/^static struct set_epll_con_val exynos5_epll_div[] = {$/;"	v	typeref:struct:set_epll_con_val[]	file:
exynos5_get_arm_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos5_get_arm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos5_get_lcd_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos5_get_lcd_clk(void)$/;"	f	typeref:typename:unsigned long	file:
exynos5_get_periph_rate	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos5_get_periph_rate(int peripheral)$/;"	f	typeref:typename:unsigned long	file:
exynos5_get_pll_clk	arch/arm/mach-exynos/clock.c	/^static unsigned long exynos5_get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long	file:
exynos5_get_reset_status	arch/arm/mach-exynos/power.c	/^static uint32_t exynos5_get_reset_status(void)$/;"	f	typeref:typename:uint32_t	file:
exynos5_gpio_data	arch/arm/mach-exynos/include/mach/gpio.h	/^static struct gpio_info exynos5_gpio_data[EXYNOS5_GPIO_NUM_PARTS] = {$/;"	v	typeref:struct:gpio_info[]
exynos5_gpio_pin	arch/arm/mach-exynos/include/mach/gpio.h	/^enum exynos5_gpio_pin {$/;"	g
exynos5_gpio_table	arch/arm/mach-exynos/include/mach/gpio.h	/^static const struct gpio_name_num_table exynos5_gpio_table[] = {$/;"	v	typeref:typename:const struct gpio_name_num_table[]
exynos5_hsi2c	drivers/i2c/s3c24x0_i2c.h	/^struct exynos5_hsi2c {$/;"	s
exynos5_i2c_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos5_i2c_config(int peripheral, int flags)$/;"	f	typeref:typename:void	file:
exynos5_i2c_reset	drivers/i2c/s3c24x0_i2c.c	/^static void exynos5_i2c_reset(struct s3c24x0_i2c_bus *i2c_bus)$/;"	f	typeref:typename:void	file:
exynos5_i2s_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos5_i2s_config(int peripheral)$/;"	f	typeref:typename:void	file:
exynos5_mmc_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos5_mmc_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos5_phy_control	arch/arm/mach-exynos/include/mach/dmc.h	/^struct exynos5_phy_control {$/;"	s
exynos5_pinmux_config	arch/arm/mach-exynos/pinmux.c	/^static int exynos5_pinmux_config(int peripheral, int flags)$/;"	f	typeref:typename:int	file:
exynos5_pinmux_decode_periph_id	arch/arm/mach-exynos/pinmux.c	/^static int exynos5_pinmux_decode_periph_id(const void *blob, int node)$/;"	f	typeref:typename:int	file:
exynos5_power	arch/arm/mach-exynos/include/mach/power.h	/^struct exynos5_power {$/;"	s
exynos5_power_exit_wakeup	arch/arm/mach-exynos/power.c	/^static void exynos5_power_exit_wakeup(void)$/;"	f	typeref:typename:void	file:
exynos5_reset_usb_phy	drivers/usb/host/ehci-exynos.c	/^static void exynos5_reset_usb_phy(struct exynos_usb_phy *usb)$/;"	f	typeref:typename:void	file:
exynos5_set_epll_clk	arch/arm/mach-exynos/clock.c	/^int exynos5_set_epll_clk(unsigned long rate)$/;"	f	typeref:typename:int
exynos5_set_i2s_clk_prescaler	arch/arm/mach-exynos/clock.c	/^int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,$/;"	f	typeref:typename:int
exynos5_set_i2s_clk_source	arch/arm/mach-exynos/clock.c	/^int exynos5_set_i2s_clk_source(unsigned int i2s_id)$/;"	f	typeref:typename:int
exynos5_set_lcd_clk	arch/arm/mach-exynos/clock.c	/^void exynos5_set_lcd_clk(void)$/;"	f	typeref:typename:void
exynos5_set_mmc_clk	arch/arm/mach-exynos/clock.c	/^static void exynos5_set_mmc_clk(int dev_index, unsigned int div)$/;"	f	typeref:typename:void	file:
exynos5_set_ps_hold_ctrl	arch/arm/mach-exynos/power.c	/^static void exynos5_set_ps_hold_ctrl(void)$/;"	f	typeref:typename:void	file:
exynos5_set_spi_clk	arch/arm/mach-exynos/clock.c	/^static int exynos5_set_spi_clk(enum periph_id periph_id,$/;"	f	typeref:typename:int	file:
exynos5_set_system_display	arch/arm/mach-exynos/system.c	/^static void exynos5_set_system_display(void)$/;"	f	typeref:typename:void	file:
exynos5_set_usbdrd_phy_ctrl	arch/arm/mach-exynos/power.c	/^static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void	file:
exynos5_set_usbhost_mode	arch/arm/mach-exynos/system.c	/^static void exynos5_set_usbhost_mode(unsigned int mode)$/;"	f	typeref:typename:void	file:
exynos5_set_usbhost_phy_ctrl	arch/arm/mach-exynos/power.c	/^void exynos5_set_usbhost_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void
exynos5_set_xclkout	arch/arm/mach-exynos/power.c	/^static void exynos5_set_xclkout(void)$/;"	f	typeref:typename:void	file:
exynos5_setup_usb_phy	drivers/usb/host/ehci-exynos.c	/^static void exynos5_setup_usb_phy(struct exynos_usb_phy *usb)$/;"	f	typeref:typename:void	file:
exynos5_spi_config	arch/arm/mach-exynos/pinmux.c	/^void exynos5_spi_config(int peripheral)$/;"	f	typeref:typename:void
exynos5_sromc_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos5_sromc_config(int flags)$/;"	f	typeref:typename:void	file:
exynos5_sysreg	arch/arm/mach-exynos/include/mach/system.h	/^struct exynos5_sysreg {$/;"	s
exynos5_tmu_reg	arch/arm/mach-exynos/include/mach/tmu.h	/^struct exynos5_tmu_reg {$/;"	s
exynos5_uart_config	arch/arm/mach-exynos/pinmux.c	/^static void exynos5_uart_config(int peripheral)$/;"	f	typeref:typename:void	file:
exynos5_usb3_phy_exit	drivers/usb/host/xhci-exynos5.c	/^static void exynos5_usb3_phy_exit(struct exynos_usb3_phy *phy)$/;"	f	typeref:typename:void	file:
exynos5_usb3_phy_init	drivers/usb/dwc3/samsung_usb_phy.c	/^void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy)$/;"	f	typeref:typename:void
exynos5_usb3_phy_init	drivers/usb/host/xhci-exynos5.c	/^static void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy)$/;"	f	typeref:typename:void	file:
exynos7420_clk_cmu_top0	drivers/clk/exynos/clk-exynos7420.c	/^struct exynos7420_clk_cmu_top0 {$/;"	s	file:
exynos7420_clk_cmu_topc	drivers/clk/exynos/clk-exynos7420.c	/^struct exynos7420_clk_cmu_topc {$/;"	s	file:
exynos7420_clk_peric1_compat	drivers/clk/exynos/clk-exynos7420.c	/^static const struct udevice_id exynos7420_clk_peric1_compat[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos7420_clk_peric1_ops	drivers/clk/exynos/clk-exynos7420.c	/^static struct clk_ops exynos7420_clk_peric1_ops = {$/;"	v	typeref:struct:clk_ops	file:
exynos7420_clk_top0_compat	drivers/clk/exynos/clk-exynos7420.c	/^static const struct udevice_id exynos7420_clk_top0_compat[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos7420_clk_top0_ops	drivers/clk/exynos/clk-exynos7420.c	/^static struct clk_ops exynos7420_clk_top0_ops = {$/;"	v	typeref:struct:clk_ops	file:
exynos7420_clk_top0_priv	drivers/clk/exynos/clk-exynos7420.c	/^struct exynos7420_clk_top0_priv {$/;"	s	file:
exynos7420_clk_top0_probe	drivers/clk/exynos/clk-exynos7420.c	/^static int exynos7420_clk_top0_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos7420_clk_topc_compat	drivers/clk/exynos/clk-exynos7420.c	/^static const struct udevice_id exynos7420_clk_topc_compat[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos7420_clk_topc_ops	drivers/clk/exynos/clk-exynos7420.c	/^static struct clk_ops exynos7420_clk_topc_ops = {$/;"	v	typeref:struct:clk_ops	file:
exynos7420_clk_topc_priv	drivers/clk/exynos/clk-exynos7420.c	/^struct exynos7420_clk_topc_priv {$/;"	s	file:
exynos7420_clk_topc_probe	drivers/clk/exynos/clk-exynos7420.c	/^static int exynos7420_clk_topc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos7420_mem_map	arch/arm/mach-exynos/mmu-arm64.c	/^static struct mm_region exynos7420_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
exynos7420_peric1_get_rate	drivers/clk/exynos/clk-exynos7420.c	/^static ulong exynos7420_peric1_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
exynos7420_pin_banks0	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static const struct samsung_pin_bank_data exynos7420_pin_banks0[] = {$/;"	v	typeref:typename:const struct samsung_pin_bank_data[]	file:
exynos7420_pin_banks1	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static const struct samsung_pin_bank_data exynos7420_pin_banks1[] = {$/;"	v	typeref:typename:const struct samsung_pin_bank_data[]	file:
exynos7420_pin_banks2	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static const struct samsung_pin_bank_data exynos7420_pin_banks2[] = {$/;"	v	typeref:typename:const struct samsung_pin_bank_data[]	file:
exynos7420_pin_ctrl	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^const struct samsung_pin_ctrl exynos7420_pin_ctrl[] = {$/;"	v	typeref:typename:const struct samsung_pin_ctrl[]
exynos7420_pinctrl_ids	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static const struct udevice_id exynos7420_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos7420_pinctrl_ops	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static struct pinctrl_ops exynos7420_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
exynos7420_pinctrl_request	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static int exynos7420_pinctrl_request(struct udevice *dev, int peripheral,$/;"	f	typeref:typename:int	file:
exynos7420_top0_get_rate	drivers/clk/exynos/clk-exynos7420.c	/^static ulong exynos7420_top0_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
exynos7420_topc_get_rate	drivers/clk/exynos/clk-exynos7420.c	/^static ulong exynos7420_topc_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
exynos_ace_sfr	drivers/crypto/ace_sha.h	/^struct exynos_ace_sfr {$/;"	s
exynos_adc_channel_data	drivers/adc/exynos-adc.c	/^int exynos_adc_channel_data(struct udevice *dev, int channel,$/;"	f	typeref:typename:int
exynos_adc_ids	drivers/adc/exynos-adc.c	/^static const struct udevice_id exynos_adc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_adc_ofdata_to_platdata	drivers/adc/exynos-adc.c	/^int exynos_adc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int
exynos_adc_ops	drivers/adc/exynos-adc.c	/^static const struct adc_ops exynos_adc_ops = {$/;"	v	typeref:typename:const struct adc_ops	file:
exynos_adc_priv	drivers/adc/exynos-adc.c	/^struct exynos_adc_priv {$/;"	s	file:
exynos_adc_probe	drivers/adc/exynos-adc.c	/^int exynos_adc_probe(struct udevice *dev)$/;"	f	typeref:typename:int
exynos_adc_start_channel	drivers/adc/exynos-adc.c	/^int exynos_adc_start_channel(struct udevice *dev, int channel)$/;"	f	typeref:typename:int
exynos_adc_stop	drivers/adc/exynos-adc.c	/^int exynos_adc_stop(struct udevice *dev)$/;"	f	typeref:typename:int
exynos_adc_v2	arch/arm/mach-exynos/include/mach/adc.h	/^struct exynos_adc_v2 {$/;"	s
exynos_bank_info	drivers/gpio/s5p_gpio.c	/^struct exynos_bank_info {$/;"	s	file:
exynos_cfg_lcd_gpio	board/samsung/universal_c210/universal.c	/^void exynos_cfg_lcd_gpio(void)$/;"	f	typeref:typename:void
exynos_cfg_ldo	board/samsung/universal_c210/universal.c	/^void exynos_cfg_ldo(void)$/;"	f	typeref:typename:void
exynos_channels	drivers/pwm/exynos_pwm.c	/^static const struct udevice_id exynos_channels[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_dp	arch/arm/mach-exynos/include/mach/dp.h	/^struct exynos_dp {$/;"	s
exynos_dp_bridge_init	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_bridge_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_dp_bridge_setup	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_bridge_setup(const void *blob)$/;"	f	typeref:typename:int	file:
exynos_dp_calc_edid_check_sum	drivers/video/exynos/exynos_dp.c	/^static unsigned char exynos_dp_calc_edid_check_sum(unsigned char *edid_data)$/;"	f	typeref:typename:unsigned char	file:
exynos_dp_config_interrupt	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_config_interrupt(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void
exynos_dp_config_video	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_config_video(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_config_video_bist	drivers/video/exynos/exynos_dp_lowlevel.c	/^int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:int
exynos_dp_config_video_slave_mode	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_detect_hpd	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_detect_hpd(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_disp_info	drivers/video/exynos/exynos_dp.c	/^static void exynos_dp_disp_info(struct edp_disp_info *disp_info)$/;"	f	typeref:typename:void	file:
exynos_dp_enable	drivers/video/exynos/exynos_dp.c	/^int exynos_dp_enable(struct udevice *dev, int panel_bpp,$/;"	f	typeref:typename:int
exynos_dp_enable_enhanced_mode	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_enable_enhanced_mode(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_enable_rx_to_enhanced_mode	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_enable_rx_to_enhanced_mode($/;"	f	typeref:typename:unsigned int	file:
exynos_dp_enable_scramble	drivers/video/exynos/exynos_dp.c	/^static void exynos_dp_enable_scramble(struct exynos_dp *regs,$/;"	f	typeref:typename:void	file:
exynos_dp_enable_scrambling	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_enable_scrambling(struct exynos_dp *dp_regs, unsigned int enable)$/;"	f	typeref:typename:void
exynos_dp_enable_sw_func	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_enable_sw_func(struct exynos_dp *dp_regs, unsigned int enable)$/;"	f	typeref:typename:void
exynos_dp_enable_video_bist	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_enable_video_bist(struct exynos_dp *dp_regs, unsigned int enable)$/;"	f	typeref:typename:void
exynos_dp_enable_video_input	drivers/video/exynos/exynos_dp_lowlevel.c	/^static void exynos_dp_enable_video_input(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void	file:
exynos_dp_enable_video_master	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_enable_video_master(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_enable_video_mute	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_enable_video_mute(struct exynos_dp *dp_regs, unsigned int enable)$/;"	f	typeref:typename:void
exynos_dp_equalizer_err_link	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_equalizer_err_link(struct exynos_dp *regs,$/;"	f	typeref:typename:int	file:
exynos_dp_get_lane_count	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_get_lanex_pre_emphasis	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:unsigned char
exynos_dp_get_link_bandwidth	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned char exynos_dp_get_link_bandwidth(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned char
exynos_dp_get_pll_lock_status	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_get_pll_lock_status(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_get_plug_in_status	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_get_plug_in_status(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_handle_edid	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_handle_edid(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_ids	drivers/video/exynos/exynos_dp.c	/^static const struct udevice_id exynos_dp_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_dp_init_analog_func	drivers/video/exynos/exynos_dp_lowlevel.c	/^int exynos_dp_init_analog_func(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:int
exynos_dp_init_analog_param	drivers/video/exynos/exynos_dp_lowlevel.c	/^static void exynos_dp_init_analog_param(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void	file:
exynos_dp_init_aux	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_init_aux(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void
exynos_dp_init_dp	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_init_dp(struct exynos_dp *regs)$/;"	f	typeref:typename:int	file:
exynos_dp_init_hpd	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_init_hpd(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void
exynos_dp_init_interrupt	drivers/video/exynos/exynos_dp_lowlevel.c	/^static void exynos_dp_init_interrupt(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void	file:
exynos_dp_init_training	drivers/video/exynos/exynos_dp.c	/^static void exynos_dp_init_training(struct exynos_dp *regs)$/;"	f	typeref:typename:void	file:
exynos_dp_init_video	drivers/video/exynos/exynos_dp_lowlevel.c	/^int exynos_dp_init_video(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:int
exynos_dp_is_slave_video_stream_clock_on	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_is_video_stream_on	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_is_video_stream_on(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_link_start	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_link_start(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_ofdata_to_platdata	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_dp_ops	drivers/video/exynos/exynos_dp.c	/^static const struct dm_display_ops exynos_dp_ops = {$/;"	v	typeref:typename:const struct dm_display_ops	file:
exynos_dp_phy_ctrl	arch/arm/mach-exynos/power.c	/^void exynos_dp_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void
exynos_dp_platform_data	arch/arm/mach-exynos/include/mach/dp_info.h	/^struct exynos_dp_platform_data {$/;"	s
exynos_dp_priv	arch/arm/mach-exynos/include/mach/dp_info.h	/^struct exynos_dp_priv {$/;"	s
exynos_dp_process_clock_recovery	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_process_equalizer_training	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_process_equalizer_training($/;"	f	typeref:typename:unsigned int	file:
exynos_dp_read_byte_from_dpcd	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_read_byte_from_dpcd(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:unsigned int
exynos_dp_read_byte_from_i2c	drivers/video/exynos/exynos_dp_lowlevel.c	/^int exynos_dp_read_byte_from_i2c(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:int
exynos_dp_read_bytes_from_dpcd	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_read_bytes_from_dpcd(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:unsigned int
exynos_dp_read_bytes_from_i2c	drivers/video/exynos/exynos_dp_lowlevel.c	/^int exynos_dp_read_bytes_from_i2c(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:int
exynos_dp_read_dpcd_adj_req	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_read_dpcd_lane_stat	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *regs,$/;"	f	typeref:typename:int	file:
exynos_dp_read_edid	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_read_edid(struct exynos_dp *regs)$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_reduce_link_rate	drivers/video/exynos/exynos_dp.c	/^static int exynos_dp_reduce_link_rate(struct exynos_dp *regs,$/;"	f	typeref:typename:int	file:
exynos_dp_reset	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_reset(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void
exynos_dp_reset_aux	drivers/video/exynos/exynos_dp_lowlevel.c	/^static inline void exynos_dp_reset_aux(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void	file:
exynos_dp_reset_macro	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_reset_macro(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void
exynos_dp_select_i2c_device	drivers/video/exynos/exynos_dp_lowlevel.c	/^int exynos_dp_select_i2c_device(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:int
exynos_dp_set_analog_power_down	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_set_analog_power_down(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:unsigned int
exynos_dp_set_enhanced_mode	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_set_lane_count	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_lane_count(struct exynos_dp *dp_regs, unsigned char count)$/;"	f	typeref:typename:void
exynos_dp_set_lane_pre_emphasis	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_lane_pre_emphasis(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_set_lanex_pre_emphasis	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_lanex_pre_emphasis(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_set_link_bandwidth	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_link_bandwidth(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_set_link_train	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_set_link_train(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_set_pll_power	drivers/video/exynos/exynos_dp_lowlevel.c	/^static void exynos_dp_set_pll_power(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void	file:
exynos_dp_set_training_pattern	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_training_pattern(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_set_video_color_format	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_set_video_cr_mn	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type,$/;"	f	typeref:typename:void
exynos_dp_set_video_timing_mode	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_set_video_timing_mode(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:void
exynos_dp_start_aux_transaction	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_start_aux_transaction(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:unsigned int
exynos_dp_start_video	drivers/video/exynos/exynos_dp_lowlevel.c	/^void exynos_dp_start_video(struct exynos_dp *dp_regs)$/;"	f	typeref:typename:void
exynos_dp_sw_link_training	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_sw_link_training(struct exynos_dp *regs,$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_training_pattern_dis	drivers/video/exynos/exynos_dp.c	/^static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *regs)$/;"	f	typeref:typename:unsigned int	file:
exynos_dp_write_byte_to_dpcd	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_write_byte_to_dpcd(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:unsigned int
exynos_dp_write_bytes_to_dpcd	drivers/video/exynos/exynos_dp_lowlevel.c	/^unsigned int exynos_dp_write_bytes_to_dpcd(struct exynos_dp *dp_regs,$/;"	f	typeref:typename:unsigned int
exynos_dsim_config_parse_dt	drivers/video/exynos/exynos_mipi_dsi.c	/^int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt,$/;"	f	typeref:typename:int
exynos_dwmci_board_init	drivers/mmc/exynos_dw_mmc.c	/^static void exynos_dwmci_board_init(struct dwmci_host *host)$/;"	f	typeref:typename:void	file:
exynos_dwmci_clksel	drivers/mmc/exynos_dw_mmc.c	/^static void exynos_dwmci_clksel(struct dwmci_host *host)$/;"	f	typeref:typename:void	file:
exynos_dwmci_core_init	drivers/mmc/exynos_dw_mmc.c	/^static int exynos_dwmci_core_init(struct dwmci_host *host)$/;"	f	typeref:typename:int	file:
exynos_dwmci_get_clk	drivers/mmc/exynos_dw_mmc.c	/^unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq)$/;"	f	typeref:typename:unsigned int
exynos_dwmci_get_config	drivers/mmc/exynos_dw_mmc.c	/^static int exynos_dwmci_get_config(const void *blob, int node,$/;"	f	typeref:typename:int	file:
exynos_dwmci_process_node	drivers/mmc/exynos_dw_mmc.c	/^static int exynos_dwmci_process_node(const void *blob,$/;"	f	typeref:typename:int	file:
exynos_dwmmc_bind	drivers/mmc/exynos_dw_mmc.c	/^static int exynos_dwmmc_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_dwmmc_ids	drivers/mmc/exynos_dw_mmc.c	/^static const struct udevice_id exynos_dwmmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_dwmmc_init	drivers/mmc/exynos_dw_mmc.c	/^int exynos_dwmmc_init(const void *blob)$/;"	f	typeref:typename:int
exynos_dwmmc_probe	drivers/mmc/exynos_dw_mmc.c	/^static int exynos_dwmmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_early_init_f	board/samsung/common/board.c	/^__weak int exynos_early_init_f(void)$/;"	f	typeref:typename:__weak int
exynos_early_init_f	board/samsung/odroid/odroid.c	/^int exynos_early_init_f(void)$/;"	f	typeref:typename:int
exynos_early_init_f	board/samsung/origen/origen.c	/^int exynos_early_init_f(void)$/;"	f	typeref:typename:int
exynos_early_init_f	board/samsung/trats/trats.c	/^int exynos_early_init_f(void)$/;"	f	typeref:typename:int
exynos_early_init_f	board/samsung/trats2/trats2.c	/^int exynos_early_init_f(void)$/;"	f	typeref:typename:int
exynos_early_init_f	board/samsung/universal_c210/universal.c	/^int exynos_early_init_f(void)$/;"	f	typeref:typename:int
exynos_ehci	drivers/usb/host/ehci-exynos.c	/^struct exynos_ehci {$/;"	s	file:
exynos_ehci_platdata	drivers/usb/host/ehci-exynos.c	/^struct exynos_ehci_platdata {$/;"	s	file:
exynos_enable_ldo	board/samsung/universal_c210/universal.c	/^void exynos_enable_ldo(unsigned int onoff)$/;"	f	typeref:typename:void
exynos_fb	arch/arm/mach-exynos/include/mach/fb.h	/^struct exynos_fb {$/;"	s
exynos_fb_bind	drivers/video/exynos/exynos_fb.c	/^static int exynos_fb_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_fb_ids	drivers/video/exynos/exynos_fb.c	/^static const struct udevice_id exynos_fb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_fb_ofdata_to_platdata	drivers/video/exynos/exynos_fb.c	/^int exynos_fb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int
exynos_fb_ops	drivers/video/exynos/exynos_fb.c	/^static const struct video_ops exynos_fb_ops = {$/;"	v	typeref:typename:const struct video_ops	file:
exynos_fb_priv	drivers/video/exynos/exynos_fb.c	/^struct exynos_fb_priv {$/;"	s	file:
exynos_fb_probe	drivers/video/exynos/exynos_fb.c	/^static int exynos_fb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_fb_rgb_mode_t	drivers/video/exynos/exynos_fb.c	/^enum exynos_fb_rgb_mode_t {$/;"	g	file:
exynos_fb_rgb_mode_t	include/exynos_lcd.h	/^enum exynos_fb_rgb_mode_t {$/;"	g
exynos_fimd_calc_fbsize	drivers/video/exynos/exynos_fb.c	/^unsigned long exynos_fimd_calc_fbsize(struct exynos_fb_priv *priv)$/;"	f	typeref:typename:unsigned long
exynos_fimd_disable_sysmmu	drivers/video/exynos/exynos_fb.c	/^void exynos_fimd_disable_sysmmu(void)$/;"	f	typeref:typename:void
exynos_fimd_get_base_offset	arch/arm/mach-exynos/include/mach/fb.h	/^static inline unsigned int exynos_fimd_get_base_offset(void)$/;"	f	typeref:typename:unsigned int
exynos_fimd_lcd_init	drivers/video/exynos/exynos_fb.c	/^void exynos_fimd_lcd_init(struct udevice *dev)$/;"	f	typeref:typename:void
exynos_fimd_lcd_off	drivers/video/exynos/exynos_fb.c	/^void exynos_fimd_lcd_off(struct exynos_fb_priv *priv)$/;"	f	typeref:typename:void
exynos_fimd_lcd_on	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_lcd_on(struct exynos_fb_priv *priv)$/;"	f	typeref:typename:void	file:
exynos_fimd_set_buffer_address	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_set_buffer_address(struct exynos_fb_priv *priv,$/;"	f	typeref:typename:void	file:
exynos_fimd_set_clock	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_set_clock(struct exynos_fb_priv *priv)$/;"	f	typeref:typename:void	file:
exynos_fimd_set_dp_clkcon	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_set_dp_clkcon(struct exynos_fb_priv *priv,$/;"	f	typeref:typename:void	file:
exynos_fimd_set_dualrgb	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_set_dualrgb(struct exynos_fb_priv *priv, bool enabled)$/;"	f	typeref:typename:void	file:
exynos_fimd_set_par	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_set_par(struct exynos_fb_priv *priv,$/;"	f	typeref:typename:void	file:
exynos_fimd_window_off	drivers/video/exynos/exynos_fb.c	/^void exynos_fimd_window_off(struct exynos_fb_priv *priv, unsigned int win_id)$/;"	f	typeref:typename:void
exynos_fimd_window_on	drivers/video/exynos/exynos_fb.c	/^static void exynos_fimd_window_on(struct exynos_fb_priv *priv,$/;"	f	typeref:typename:void	file:
exynos_get_pll_clk	arch/arm/mach-exynos/clock.c	/^static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)$/;"	f	typeref:typename:int	file:
exynos_gpio_direction_input	drivers/gpio/s5p_gpio.c	/^static int exynos_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
exynos_gpio_direction_output	drivers/gpio/s5p_gpio.c	/^static int exynos_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
exynos_gpio_get_function	drivers/gpio/s5p_gpio.c	/^static int exynos_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
exynos_gpio_get_value	drivers/gpio/s5p_gpio.c	/^static int exynos_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
exynos_gpio_ids	drivers/gpio/s5p_gpio.c	/^static const struct udevice_id exynos_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_gpio_platdata	drivers/gpio/s5p_gpio.c	/^struct exynos_gpio_platdata {$/;"	s	file:
exynos_gpio_set_value	drivers/gpio/s5p_gpio.c	/^static int exynos_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
exynos_hs_i2c_ids	drivers/i2c/s3c24x0_i2c.c	/^static const struct udevice_id exynos_hs_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_hs_i2c_ops	drivers/i2c/s3c24x0_i2c.c	/^static const struct dm_i2c_ops exynos_hs_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
exynos_hs_i2c_xfer	drivers/i2c/s3c24x0_i2c.c	/^static int exynos_hs_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	file:
exynos_i2c_init	drivers/i2c/s3c24x0_i2c.c	/^static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
exynos_i2c_type	drivers/i2c/s3c24x0_i2c.c	/^enum exynos_i2c_type {$/;"	g	file:
exynos_init	board/samsung/common/exynos5-dt.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init	board/samsung/espresso7420/espresso7420.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init	board/samsung/odroid/odroid.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init	board/samsung/origen/origen.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init	board/samsung/trats/trats.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init	board/samsung/trats2/trats2.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init	board/samsung/universal_c210/universal.c	/^int exynos_init(void)$/;"	f	typeref:typename:int
exynos_init_dp	arch/arm/mach-exynos/include/mach/dp_info.h	/^unsigned int exynos_init_dp(void)$/;"	f	typeref:typename:unsigned int
exynos_init_dsim_platform_data	drivers/video/exynos/exynos_mipi_dsi.c	/^void exynos_init_dsim_platform_data(vidinfo_t *vid)$/;"	f	typeref:typename:void
exynos_is_i80_frame_done	drivers/video/exynos/exynos_fb.c	/^int exynos_is_i80_frame_done(struct exynos_fb_priv *priv)$/;"	f	typeref:typename:int
exynos_lcd_misc_init	board/samsung/trats/trats.c	/^void exynos_lcd_misc_init(vidinfo_t *vid)$/;"	f	typeref:typename:void
exynos_lcd_misc_init	board/samsung/trats2/trats2.c	/^void exynos_lcd_misc_init(vidinfo_t *vid)$/;"	f	typeref:typename:void
exynos_lcd_misc_init	board/samsung/universal_c210/universal.c	/^void exynos_lcd_misc_init(vidinfo_t *vid)$/;"	f	typeref:typename:void
exynos_lcd_power_on	board/samsung/trats2/trats2.c	/^void exynos_lcd_power_on(void)$/;"	f	typeref:typename:void
exynos_lcd_power_on	board/samsung/universal_c210/universal.c	/^void exynos_lcd_power_on(void)$/;"	f	typeref:typename:void
exynos_mipi_dsi_bind_lcd_ddi	drivers/video/exynos/exynos_mipi_dsi.c	/^	*exynos_mipi_dsi_bind_lcd_ddi(struct mipi_dsim_device *dsim,$/;"	f	typeref:struct:mipi_dsim_ddi *
exynos_mipi_dsi_change_pll	drivers/video/exynos/exynos_mipi_dsi_common.c	/^unsigned long exynos_mipi_dsi_change_pll(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:unsigned long
exynos_mipi_dsi_clear_all_interrupt	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
exynos_mipi_dsi_clear_frame_done	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:int
exynos_mipi_dsi_clear_interrupt	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
exynos_mipi_dsi_display_config	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_dp_dn_swap	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_afc	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_byte_clock	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_esc_clk_on_lane	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_frame_done_int	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_enable_frame_done_int(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:int
exynos_mipi_dsi_enable_hs_clock	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_lane	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_pll	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_enable_pll_bypass	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_find_lcd_device	drivers/video/exynos/exynos_mipi_dsi.c	/^	*exynos_mipi_dsi_find_lcd_device(struct mipi_dsim_lcd_driver *lcd_drv)$/;"	f	typeref:struct:mipi_dsim_ddi *
exynos_mipi_dsi_force_dphy_stop_state	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_func_reset	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
exynos_mipi_dsi_get_fifo_state	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:unsigned int
exynos_mipi_dsi_get_frame_done_status	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:int
exynos_mipi_dsi_hs_zero_ctrl	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_init	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^static inline int exynos_mipi_dsi_init($/;"	f	typeref:typename:int
exynos_mipi_dsi_init	drivers/video/exynos/exynos_mipi_dsi.c	/^int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd)$/;"	f	typeref:typename:int
exynos_mipi_dsi_init_config	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
exynos_mipi_dsi_init_dsim	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_init_dsim(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:int
exynos_mipi_dsi_init_fifo_pointer	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_init_link	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_init_link(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:int
exynos_mipi_dsi_is_lane_state	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:unsigned int
exynos_mipi_dsi_is_pll_stable	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:unsigned int
exynos_mipi_dsi_long_data_wr	drivers/video/exynos/exynos_mipi_dsi_common.c	/^static void exynos_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void	file:
exynos_mipi_dsi_pll_freq	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_pll_freq_band	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_pll_on	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_pll_on(struct mipi_dsim_device *dsim, unsigned int enable)$/;"	f	typeref:typename:int
exynos_mipi_dsi_pll_stable_time	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_prep_ctrl	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep)$/;"	f	typeref:typename:void
exynos_mipi_dsi_register_lcd_device	drivers/video/exynos/exynos_mipi_dsi.c	/^int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device *lcd_dev)$/;"	f	typeref:typename:int
exynos_mipi_dsi_register_lcd_driver	drivers/video/exynos/exynos_mipi_dsi.c	/^int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver *lcd_drv)$/;"	f	typeref:typename:int
exynos_mipi_dsi_set_bta_timeout	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_byte_clock_src	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_clock	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_set_clock(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:int
exynos_mipi_dsi_set_cpu_transfer_mode	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_data_lane_number	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_data_transfer_mode	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_set_data_transfer_mode(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:int
exynos_mipi_dsi_set_display_mode	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:int
exynos_mipi_dsi_set_esc_clk_prs	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_hs_enable	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_set_hs_enable(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:int
exynos_mipi_dsi_set_interrupt_mask	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_lcdc_transfer_mode	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_lpdr_timeout	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_main_disp_hporch	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_main_disp_resol	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_main_disp_sync_area	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_main_disp_vporch	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_phy_tunning	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_stop_state_counter	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_set_sub_disp_resol	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_sw_release	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_sw_release(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
exynos_mipi_dsi_sw_reset	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim)$/;"	f	typeref:typename:void
exynos_mipi_dsi_wr_data	drivers/video/exynos/exynos_mipi_dsi_common.c	/^int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id,$/;"	f	typeref:typename:int
exynos_mipi_dsi_wr_tx_data	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsi_wr_tx_header	drivers/video/exynos/exynos_mipi_dsi_lowlevel.c	/^void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim,$/;"	f	typeref:typename:void
exynos_mipi_dsim	arch/arm/mach-exynos/include/mach/dsim.h	/^struct exynos_mipi_dsim {$/;"	s
exynos_mmc_init	drivers/mmc/s5p_sdhci.c	/^int exynos_mmc_init(const void *blob)$/;"	f	typeref:typename:int
exynos_mmc_plat	drivers/mmc/exynos_dw_mmc.c	/^struct exynos_mmc_plat {$/;"	s	file:
exynos_pinctrl_config_data	drivers/pinctrl/exynos/pinctrl-exynos.h	/^struct exynos_pinctrl_config_data {$/;"	s
exynos_pinctrl_priv	drivers/pinctrl/exynos/pinctrl-exynos.h	/^struct exynos_pinctrl_priv {$/;"	s
exynos_pinctrl_probe	drivers/pinctrl/exynos/pinctrl-exynos.c	/^int exynos_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int
exynos_pinctrl_set_state	drivers/pinctrl/exynos/pinctrl-exynos.c	/^int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config)$/;"	f	typeref:typename:int
exynos_pinctrl_setup_peri	drivers/pinctrl/exynos/pinctrl-exynos.c	/^void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf,$/;"	f	typeref:typename:void
exynos_pinmux_config	arch/arm/mach-exynos/pinmux.c	/^int exynos_pinmux_config(int peripheral, int flags)$/;"	f	typeref:typename:int
exynos_platform_mipi_dsim	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^struct exynos_platform_mipi_dsim {$/;"	s
exynos_power_init	board/samsung/common/board.c	/^__weak int exynos_power_init(void)$/;"	f	typeref:typename:__weak int
exynos_power_init	board/samsung/common/exynos5-dt.c	/^int exynos_power_init(void)$/;"	f	typeref:typename:int
exynos_power_init	board/samsung/odroid/odroid.c	/^int exynos_power_init(void)$/;"	f	typeref:typename:int
exynos_power_init	board/samsung/trats/trats.c	/^int exynos_power_init(void)$/;"	f	typeref:typename:int
exynos_power_init	board/samsung/trats2/trats2.c	/^int exynos_power_init(void)$/;"	f	typeref:typename:int
exynos_power_init	board/samsung/universal_c210/universal.c	/^int exynos_power_init(void)$/;"	f	typeref:typename:int
exynos_pwm_backlight_init	drivers/video/exynos/exynos_pwm_bl.c	/^int exynos_pwm_backlight_init(struct pwm_backlight_data *pd)$/;"	f	typeref:typename:int
exynos_pwm_backlight_update_status	drivers/video/exynos/exynos_pwm_bl.c	/^static int exynos_pwm_backlight_update_status(void)$/;"	f	typeref:typename:int	file:
exynos_pwm_ofdata_to_platdata	drivers/pwm/exynos_pwm.c	/^static int exynos_pwm_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_pwm_ops	drivers/pwm/exynos_pwm.c	/^static const struct pwm_ops exynos_pwm_ops = {$/;"	v	typeref:typename:const struct pwm_ops	file:
exynos_pwm_priv	drivers/pwm/exynos_pwm.c	/^struct exynos_pwm_priv {$/;"	s	file:
exynos_pwm_probe	drivers/pwm/exynos_pwm.c	/^static int exynos_pwm_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_pwm_set_config	drivers/pwm/exynos_pwm.c	/^static int exynos_pwm_set_config(struct udevice *dev, uint channel,$/;"	f	typeref:typename:int	file:
exynos_pwm_set_enable	drivers/pwm/exynos_pwm.c	/^static int exynos_pwm_set_enable(struct udevice *dev, uint channel,$/;"	f	typeref:typename:int	file:
exynos_reset_lcd	board/samsung/trats/trats.c	/^void exynos_reset_lcd(void)$/;"	f	typeref:typename:void
exynos_reset_lcd	board/samsung/trats2/trats2.c	/^void exynos_reset_lcd(void)$/;"	f	typeref:typename:void
exynos_reset_lcd	board/samsung/universal_c210/universal.c	/^void exynos_reset_lcd(void)$/;"	f	typeref:typename:void
exynos_set_regulator	board/samsung/common/exynos5-dt.c	/^static int exynos_set_regulator(const char *name, uint uv)$/;"	f	typeref:typename:int	file:
exynos_set_trigger	drivers/video/exynos/exynos_fb.c	/^void exynos_set_trigger(struct exynos_fb_priv *priv)$/;"	f	typeref:typename:void
exynos_spi	arch/arm/mach-exynos/include/mach/spi.h	/^struct exynos_spi {$/;"	s
exynos_spi_claim_bus	drivers/spi/exynos_spi.c	/^static int exynos_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_spi_copy	arch/arm/mach-exynos/spl_boot.c	/^static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)$/;"	f	typeref:typename:void	file:
exynos_spi_ids	drivers/spi/exynos_spi.c	/^static const struct udevice_id exynos_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
exynos_spi_ofdata_to_platdata	drivers/spi/exynos_spi.c	/^static int exynos_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
exynos_spi_ops	drivers/spi/exynos_spi.c	/^static const struct dm_spi_ops exynos_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
exynos_spi_platdata	drivers/spi/exynos_spi.c	/^struct exynos_spi_platdata {$/;"	s	file:
exynos_spi_priv	drivers/spi/exynos_spi.c	/^struct exynos_spi_priv {$/;"	s	file:
exynos_spi_probe	drivers/spi/exynos_spi.c	/^static int exynos_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
exynos_spi_release_bus	drivers/spi/exynos_spi.c	/^static int exynos_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
exynos_spi_set_mode	drivers/spi/exynos_spi.c	/^static int exynos_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
exynos_spi_set_speed	drivers/spi/exynos_spi.c	/^static int exynos_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
exynos_spi_xfer	drivers/spi/exynos_spi.c	/^static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
exynos_tzpc	arch/arm/mach-exynos/include/mach/tzpc.h	/^struct exynos_tzpc {$/;"	s
exynos_uart_init	board/samsung/trats/trats.c	/^static void exynos_uart_init(void)$/;"	f	typeref:typename:void	file:
exynos_usb3_phy	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^struct exynos_usb3_phy {$/;"	s
exynos_usb_phy	arch/arm/mach-exynos/include/mach/ehci.h	/^struct exynos_usb_phy {$/;"	s
exynos_xhci	drivers/usb/host/xhci-exynos5.c	/^struct exynos_xhci {$/;"	s	file:
exynos_xhci_core_exit	drivers/usb/host/xhci-exynos5.c	/^static void exynos_xhci_core_exit(struct exynos_xhci *exynos)$/;"	f	typeref:typename:void	file:
exynos_xhci_core_init	drivers/usb/host/xhci-exynos5.c	/^static int exynos_xhci_core_init(struct exynos_xhci *exynos)$/;"	f	typeref:typename:int	file:
exynos_xhci_platdata	drivers/usb/host/xhci-exynos5.c	/^struct exynos_xhci_platdata {$/;"	s	file:
ey	drivers/video/stb_truetype.h	/^   float ey;$/;"	m	struct:stbtt__active_edge	typeref:typename:float
f	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^	float f;$/;"	m	union:uf	typeref:typename:float	file:
f2s_periph_ref_clk	arch/arm/dts/socfpga.dtsi	/^					f2s_periph_ref_clk: f2s_periph_ref_clk {$/;"	l
f2s_sdram_ref_clk	arch/arm/dts/socfpga.dtsi	/^					f2s_sdram_ref_clk: f2s_sdram_ref_clk {$/;"	l
f2u	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^f2u (float v)$/;"	f	typeref:typename:unsigned int	file:
fREe	common/dlmalloc.c	/^void fREe(Void_t* mem)$/;"	f	typeref:typename:void
fREe	include/malloc.h	/^# define fREe	/;"	d
fREe	include/malloc.h	/^#define fREe	/;"	d
f_cfifo	drivers/block/ftide020.h	/^	unsigned int	f_cfifo;	\/* 0x30 - Feature Info of CMD_FIFO *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
f_control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 f_control;				\/* 0x08 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
f_dentry	fs/ubifs/ubifs.h	/^#define f_dentry	/;"	d
f_dfu	drivers/usb/gadget/f_dfu.c	/^struct f_dfu {$/;"	s	file:
f_ep_links	fs/ubifs/ubifs.h	/^	struct list_head	f_ep_links;$/;"	m	struct:file	typeref:struct:list_head
f_ep_lock	fs/ubifs/ubifs.h	/^	spinlock_t		f_ep_lock;$/;"	m	struct:file	typeref:typename:spinlock_t
f_fastboot	drivers/usb/gadget/f_fastboot.c	/^struct f_fastboot {$/;"	s	file:
f_fill64	arch/mips/lib/cache_init.S	/^	.macro	f_fill64 dst, offset, val$/;"	m
f_flags	fs/ubifs/ubifs.h	/^	unsigned int 		f_flags;$/;"	m	struct:file	typeref:typename:unsigned int
f_fname	include/linux/types.h	/^	char			f_fname[6];$/;"	m	struct:ustat	typeref:typename:char[6]
f_fpack	include/linux/types.h	/^	char			f_fpack[6];$/;"	m	struct:ustat	typeref:typename:char[6]
f_gid	fs/ubifs/ubifs.h	/^	unsigned int		f_uid, f_gid;$/;"	m	struct:file	typeref:typename:unsigned int
f_max	include/mmc.h	/^	uint f_max;$/;"	m	struct:mmc_config	typeref:typename:uint
f_min	include/mmc.h	/^	uint f_min;$/;"	m	struct:mmc_config	typeref:typename:uint
f_mnt_write_state	fs/ubifs/ubifs.h	/^	unsigned long f_mnt_write_state;$/;"	m	struct:file	typeref:typename:unsigned long
f_op	fs/ubifs/ubifs.h	/^	const struct file_operations	*f_op;$/;"	m	struct:file	typeref:typename:const struct file_operations *
f_path	fs/ubifs/ubifs.h	/^	struct path		f_path;$/;"	m	struct:file	typeref:struct:path
f_pos	fs/ubifs/ubifs.h	/^	loff_t			f_pos;$/;"	m	struct:file	typeref:typename:loff_t
f_rfifo	drivers/block/ftide020.h	/^	unsigned int	f_rfifo;	\/* 0x3c - Feature Info of READ_FIFO *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
f_security	fs/ubifs/ubifs.h	/^	void			*f_security;$/;"	m	struct:file	typeref:typename:void *
f_tfree	include/linux/types.h	/^	__kernel_daddr_t	f_tfree;$/;"	m	struct:ustat	typeref:typename:__kernel_daddr_t
f_thor	drivers/usb/gadget/f_thor.h	/^struct f_thor {$/;"	s
f_tinode	include/linux/types.h	/^	__kernel_ino_t		f_tinode;$/;"	m	struct:ustat	typeref:typename:__kernel_ino_t
f_uid	fs/ubifs/ubifs.h	/^	unsigned int		f_uid, f_gid;$/;"	m	struct:file	typeref:typename:unsigned int
f_version	fs/ubifs/ubifs.h	/^	u64			f_version;$/;"	m	struct:file	typeref:typename:u64
f_vfsmnt	fs/ubifs/ubifs.h	/^#define f_vfsmnt	/;"	d
f_wfifo	drivers/block/ftide020.h	/^	unsigned int	f_wfifo;	\/* 0x34 - Feature Info of WRITE_FIFO *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
fa	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 fa;				\/* 0x148: FUSE_FA *\/$/;"	m	struct:fuse_regs	typeref:typename:u32
fab_freq	drivers/ddr/marvell/a38x/ddr3_init.c	/^	u8 fab_freq;$/;"	m	struct:dram_modes	typeref:typename:u8	file:
fab_freq	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u8 fab_freq;$/;"	m	struct:dram_modes	typeref:typename:u8
fab_revision	board/gumstix/pepper/board.h	/^	char fab_revision[8];$/;"	m	struct:pepper_board_id	typeref:typename:char[8]
fab_revision	board/overo/overo.c	/^	char fab_revision[8];$/;"	m	struct:__anona18b42d20108	typeref:typename:char[8]	file:
fab_revision	board/ti/beagle/beagle.c	/^	char fab_revision[8];$/;"	m	struct:__anon1bf8eac80108	typeref:typename:char[8]	file:
fabric_ratio	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 fabric_ratio[FAB_OPT] = {$/;"	v	typeref:typename:u32[]
fabric_ratio	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 fabric_ratio[FAB_OPT] = {$/;"	v	typeref:typename:u32[]
fabs	post/lib_powerpc/fpu/darwin-ldouble.c	/^#define fabs(/;"	d	file:
fact_get_char	board/siemens/common/factoryset.c	/^#define fact_get_char(/;"	d	file:
fact_match	board/siemens/common/factoryset.c	/^static int fact_match(unsigned char *eeprom_buf, uchar *s1, int i2)$/;"	f	typeref:typename:int	file:
factor_polynomial	lib/bch.c	/^static void factor_polynomial(struct bch_control *bch, int k, struct gf_poly *f,$/;"	f	typeref:typename:void	file:
factory_dat	board/siemens/common/factoryset.c	/^struct factorysetcontainer factory_dat;$/;"	v	typeref:struct:factorysetcontainer
factoryset_mac_setenv	board/siemens/common/factoryset.c	/^static int factoryset_mac_setenv(void)$/;"	f	typeref:typename:int	file:
factoryset_read_eeprom	board/siemens/common/factoryset.c	/^int factoryset_read_eeprom(int i2c_addr)$/;"	f	typeref:typename:int
factoryset_setenv	board/siemens/common/factoryset.c	/^int factoryset_setenv(void)$/;"	f	typeref:typename:int
factorysetcontainer	board/siemens/common/factoryset.h	/^struct factorysetcontainer {$/;"	s
faddr	drivers/spi/ich.h	/^	uint32_t faddr;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
faddr	drivers/usb/host/isp116x.h	/^	u16 faddr;$/;"	m	struct:ptd	typeref:typename:u16
faddr	drivers/usb/musb/musb_core.h	/^	u8	faddr;$/;"	m	struct:musb_regs	typeref:typename:u8
fadr	include/fsl_sec.h	/^	u32	fadr;		\/* Fault Address Detail Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
fail	test/common.sh	/^fail() {$/;"	f
fail	test/image/test-fit.py	/^def fail(msg, stdout):$/;"	f
fail_addr	include/linux/mtd/mtd.h	/^	uint64_t fail_addr;$/;"	m	struct:erase_info	typeref:typename:uint64_t
fail_count	include/test/test.h	/^	int fail_count;$/;"	m	struct:unit_test_state	typeref:typename:int
failed	include/mtd/mtd-abi.h	/^	__u32 failed;$/;"	m	struct:mtd_ecc_stats	typeref:typename:__u32
failed	post/lib_powerpc/fpu/compare-fp-1.c	/^static int failed;$/;"	v	typeref:typename:GNU_FPOST_ATTR int	file:
failing_stage	drivers/ddr/altera/sequencer.h	/^	u32 failing_stage;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
failure	cmd/pmic.c	/^static int failure(int ret)$/;"	f	typeref:typename:int	file:
failure	cmd/regulator.c	/^static int failure(int ret)$/;"	f	typeref:typename:int	file:
fake	fs/yaffs2/yaffs_guts.h	/^	u8 fake:1;		\/* A fake object has no presence on NAND. *\/$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
fake	fs/yaffs2/yaffs_guts.h	/^	u8 fake:1;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8:1
fake_ccount	arch/xtensa/lib/time.c	/^static ulong fake_ccount;$/;"	v	typeref:typename:ulong	file:
fake_ecc_layout	drivers/mtd/nand/mxs_nand.c	/^struct nand_ecclayout fake_ecc_layout;$/;"	v	typeref:struct:nand_ecclayout
fake_host_hwaddr	drivers/net/sandbox.c	/^	uchar fake_host_hwaddr[ARP_HLEN];$/;"	m	struct:eth_sandbox_priv	typeref:typename:uchar[]	file:
fake_host_ipaddr	drivers/net/sandbox.c	/^	struct in_addr fake_host_ipaddr;$/;"	m	struct:eth_sandbox_priv	typeref:struct:in_addr	file:
fake_mode	common/cli_hush.c	/^static int fake_mode;$/;"	v	typeref:typename:int	file:
falarm	arch/m68k/include/asm/coldfire/ata.h	/^	u8 falarm;		\/* 0x34 *\/$/;"	m	struct:atac	typeref:typename:u8
fallbackQSort3	lib/bzip2/bzlib_blocksort.c	/^void fallbackQSort3 ( UInt32* fmap, $/;"	f	typeref:typename:void	file:
fallbackSimpleSort	lib/bzip2/bzlib_blocksort.c	/^void fallbackSimpleSort ( UInt32* fmap, $/;"	f	typeref:typename:void	file:
fallbackSort	lib/bzip2/bzlib_blocksort.c	/^void fallbackSort ( UInt32* fmap, $/;"	f	typeref:typename:void	file:
fallible_matches_name	fs/ubifs/tnc.c	/^static int fallible_matches_name(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
fallible_read_node	fs/ubifs/tnc.c	/^static int fallible_read_node(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int	file:
fallible_resolve_collision	fs/ubifs/tnc.c	/^static int fallible_resolve_collision(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
falr	include/fsl_sec.h	/^	u32	falr;		\/* Fault Address LIODN Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
false	lib/dhry/dhry.h	/^#define false /;"	d
family	common/cli_hush.c	/^	struct pipe *family;		\/* pointer back to the child's parent pipe *\/$/;"	m	struct:child_prog	typeref:struct:pipe *	file:
family	drivers/fpga/altera.c	/^	enum altera_family	family;$/;"	m	struct:altera_fpga	typeref:enum:altera_family	file:
family	drivers/video/ati_radeon_fb.h	/^	u16			family;$/;"	m	struct:radeonfb_info	typeref:typename:u16
family	include/altera.h	/^	enum altera_family	family;$/;"	m	struct:__anond5297d870108	typeref:enum:altera_family
family	include/cpu.h	/^	u16 family;		\/* DMTF CPU Family *\/$/;"	m	struct:cpu_platdata	typeref:typename:u16
family	include/lattice.h	/^	Lattice_Family	family;	\/* part type *\/$/;"	m	struct:__anon773a64540408	typeref:typename:Lattice_Family
family	include/smbios.h	/^	u8 family;$/;"	m	struct:smbios_type1	typeref:typename:u8
family	include/xilinx.h	/^	xilinx_family family;	\/* part type *\/$/;"	m	struct:__anon15c234ca0308	typeref:typename:xilinx_family
fan1_alarm_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	fan1_alarm_pin: fan1-alarm-pin {$/;"	l
fan2_alarm_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	fan2_alarm_pin: fan2-alarm-pin {$/;"	l
fan_ctl_status	board/freescale/t102xrdb/cpld.h	/^	u8 fan_ctl_status;	\/* 0x14 - Fan control and status register  *\/$/;"	m	struct:cpld_data	typeref:typename:u8
fan_ctl_status	board/freescale/t104xrdb/cpld.h	/^	u8 fan_ctl_status;	\/* 0x14 - Fan control and status register  *\/$/;"	m	struct:cpld_data	typeref:typename:u8
fancsr	board/freescale/c29xpcie/cpld.h	/^	u8 fancsr;	\/* 0x14 - Fan control and status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
fanout	fs/ubifs/ubifs-media.h	/^	__le32 fanout;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
fanout	fs/ubifs/ubifs.h	/^	int fanout;$/;"	m	struct:ubifs_info	typeref:typename:int
far	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int far;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
far	arch/m68k/include/asm/immap_5275.h	/^	u8 far;$/;"	m	struct:usb	typeref:typename:u8
far_ls	include/fsl_sec.h	/^	u32	far_ls;		\/* Fault Address Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
far_ms	include/fsl_sec.h	/^	u32	far_ms;		\/* Fault Address Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
faraday_ehci_get_port_speed	drivers/usb/host/ehci-faraday.c	/^int faraday_ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)$/;"	f	typeref:typename:int
faraday_ehci_get_portsc_register	drivers/usb/host/ehci-faraday.c	/^uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)$/;"	f	typeref:typename:uint32_t *
faraday_ehci_ops	drivers/usb/host/ehci-faraday.c	/^static const struct ehci_ops faraday_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
faraday_ehci_set_usbmode	drivers/usb/host/ehci-faraday.c	/^void faraday_ehci_set_usbmode(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:void
fast	fs/ubifs/ubifs.h	/^	unsigned int fast:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
fast	include/linux/immap_qe.h	/^		ucc_fast_t fast;$/;"	m	union:ucc::__anon6b5f4d76010a	typeref:typename:ucc_fast_t
fast_alloca_exception	arch/xtensa/cpu/start.S	/^fast_alloca_exception:	\/* must be at _WindowUnderflow4 + 16 *\/$/;"	l
fast_boot_addr	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 fast_boot_addr;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
fast_boot_addr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 fast_boot_addr;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
fast_boot_addr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 fast_boot_addr;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
fast_interrupts_enabled	arch/arm/include/asm/proc-armv/ptrace.h	/^#define fast_interrupts_enabled(/;"	d
fast_passive_parallel	include/altera.h	/^	fast_passive_parallel,$/;"	e	enum:altera_iface
fast_passive_parallel_security	include/altera.h	/^	fast_passive_parallel_security,$/;"	e	enum:altera_iface
fast_snr	drivers/usb/eth/r8152.h	/^#define fast_snr(/;"	d
fast_snr_mask	drivers/usb/eth/r8152.h	/^#define fast_snr_mask	/;"	d
fastboot_add	drivers/usb/gadget/f_fastboot.c	/^static int fastboot_add(struct usb_configuration *c)$/;"	f	typeref:typename:int	file:
fastboot_bind	drivers/usb/gadget/f_fastboot.c	/^static int fastboot_bind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:int	file:
fastboot_complete	drivers/usb/gadget/f_fastboot.c	/^static void fastboot_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
fastboot_disable	drivers/usb/gadget/f_fastboot.c	/^static void fastboot_disable(struct usb_function *f)$/;"	f	typeref:typename:void	file:
fastboot_fail	drivers/usb/gadget/f_fastboot.c	/^void fastboot_fail(const char *reason)$/;"	f	typeref:typename:void
fastboot_func	drivers/usb/gadget/f_fastboot.c	/^static struct f_fastboot *fastboot_func;$/;"	v	typeref:struct:f_fastboot *	file:
fastboot_key_pressed	board/rockchip/kylin_rk3036/kylin_rk3036.c	/^int fastboot_key_pressed(void)$/;"	f	typeref:typename:int
fastboot_name	drivers/usb/gadget/f_fastboot.c	/^static const char fastboot_name[] = "Android Fastboot";$/;"	v	typeref:typename:const char[]	file:
fastboot_okay	drivers/usb/gadget/f_fastboot.c	/^void fastboot_okay(const char *reason)$/;"	f	typeref:typename:void
fastboot_set_alt	drivers/usb/gadget/f_fastboot.c	/^static int fastboot_set_alt(struct usb_function *f,$/;"	f	typeref:typename:int	file:
fastboot_start_ep	drivers/usb/gadget/f_fastboot.c	/^static struct usb_request *fastboot_start_ep(struct usb_ep *ep)$/;"	f	typeref:struct:usb_request *	file:
fastboot_string_defs	drivers/usb/gadget/f_fastboot.c	/^static struct usb_string fastboot_string_defs[] = {$/;"	v	typeref:struct:usb_string[]	file:
fastboot_strings	drivers/usb/gadget/f_fastboot.c	/^static struct usb_gadget_strings *fastboot_strings[] = {$/;"	v	typeref:struct:usb_gadget_strings * []	file:
fastboot_tx_write	drivers/usb/gadget/f_fastboot.c	/^static int fastboot_tx_write(const char *buffer, unsigned int buffer_size)$/;"	f	typeref:typename:int	file:
fastboot_tx_write_str	drivers/usb/gadget/f_fastboot.c	/^static int fastboot_tx_write_str(const char *buffer)$/;"	f	typeref:typename:int	file:
fastboot_unbind	drivers/usb/gadget/f_fastboot.c	/^static void fastboot_unbind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:void	file:
fastimage_t	include/video_easylogo.h	/^} fastimage_t ;$/;"	t	typeref:struct:__anon1a9c56c70108
fastmap	include/ubispl.h	/^	int			fastmap;$/;"	m	struct:ubispl_info	typeref:typename:int
fastmap_anchor	drivers/mtd/ubispl/ubispl.h	/^	int				fastmap_anchor;$/;"	m	struct:ubi_scan_info	typeref:typename:int
fastmap_pebs	drivers/mtd/ubispl/ubispl.h	/^	int				fastmap_pebs;$/;"	m	struct:ubi_scan_info	typeref:typename:int
fat32_length	include/fat.h	/^	__u32	fat32_length;	\/* Sectors\/FAT *\/$/;"	m	struct:boot_sector	typeref:typename:__u32
fat_close	fs/fat/fat.c	/^void fat_close(void)$/;"	f	typeref:typename:void
fat_dirty	include/fat.h	/^	__u8	fat_dirty;      \/* Set if fatbuf has been modified *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u8
fat_exists	fs/fat/fat.c	/^int fat_exists(const char *filename)$/;"	f	typeref:typename:int
fat_length	include/fat.h	/^	__u16	fat_length;	\/* Sectors\/FAT *\/$/;"	m	struct:boot_sector	typeref:typename:__u16
fat_read_file	fs/fat/fat.c	/^int fat_read_file(const char *filename, void *buf, loff_t offset, loff_t len,$/;"	f	typeref:typename:int
fat_register_device	fs/fat/fat.c	/^int fat_register_device(struct blk_desc *dev_desc, int part_no)$/;"	f	typeref:typename:int
fat_registered	common/spl/spl_fat.c	/^static int fat_registered;$/;"	v	typeref:typename:int	file:
fat_sect	include/fat.h	/^	__u16	fat_sect;	\/* Starting sector of the FAT *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u16
fat_set_blk_dev	fs/fat/fat.c	/^int fat_set_blk_dev(struct blk_desc *dev_desc, disk_partition_t *info)$/;"	f	typeref:typename:int
fat_size	fs/fat/fat.c	/^int fat_size(const char *filename, loff_t *size)$/;"	f	typeref:typename:int
fatal_err	drivers/mmc/sunxi_mmc.c	/^	unsigned fatal_err;$/;"	m	struct:sunxi_mmc_host	typeref:typename:unsigned	file:
fatbuf	include/fat.h	/^	__u8	*fatbuf;	\/* Current FAT buffer *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u8 *
fatbufnum	include/fat.h	/^	int	fatbufnum;	\/* Used by get_fatent, init to -1 *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:int
fatlength	include/fat.h	/^	__u32	fatlength;	\/* Length of FAT in sectors *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u32
fats	include/fat.h	/^	__u8	fats;		\/* Number of FATs *\/$/;"	m	struct:boot_sector	typeref:typename:__u8
fatsize	include/fat.h	/^	int	fatsize;	\/* Size of FAT in bits *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:int
faw	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t faw;$/;"	m	struct:dram_params	typeref:typename:uint32_t
fb	drivers/block/dwc_ahsata.c	/^	u32 fb;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
fb	include/video.h	/^	void *fb;$/;"	m	struct:video_priv	typeref:typename:void *
fb0	arch/arm/dts/at91sam9261.dtsi	/^		fb0: fb@0x00600000 {$/;"	l
fb0	arch/arm/dts/at91sam9263.dtsi	/^		fb0: fb@0x00700000 {$/;"	l
fb0	arch/arm/dts/at91sam9g45.dtsi	/^		fb0: fb@0x00500000 {$/;"	l
fb0w0	arch/powerpc/include/asm/immap_512x.h	/^	u32 fb0w0[0x1f];	\/* IIM fuse bank 0 data (for Freescale use) *\/$/;"	m	struct:iim512x	typeref:typename:u32[0x1f]
fb1w1	arch/powerpc/include/asm/immap_512x.h	/^	u32 fb1w1[0x01f];	\/* IIM fuse bank 1 data *\/$/;"	m	struct:iim512x	typeref:typename:u32[0x01f]
fb_addr	drivers/video/sunxi_display.c	/^	unsigned int fb_addr;$/;"	m	struct:sunxi_display	typeref:typename:unsigned int	file:
fb_addr	drivers/video/sunxi_display2.c	/^	unsigned int fb_addr;$/;"	m	struct:sunxi_display	typeref:typename:unsigned int	file:
fb_address	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 fb_address;$/;"	m	struct:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a::__anon775fc5441608	typeref:typename:u32
fb_base	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 fb_base;$/;"	m	struct:mvebu_lcd_info	typeref:typename:u32
fb_base	drivers/video/ati_radeon_fb.h	/^	void			*fb_base;$/;"	m	struct:radeonfb_info	typeref:typename:void *
fb_base	include/asm-generic/global_data.h	/^	unsigned long fb_base;		\/* Base address of framebuffer mem *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
fb_base	include/efi_api.h	/^	efi_physical_addr_t fb_base;$/;"	m	struct:efi_gop_mode	typeref:typename:efi_physical_addr_t
fb_base_bus	drivers/video/ati_radeon_fb.h	/^	u32			fb_base_bus;$/;"	m	struct:radeonfb_info	typeref:typename:u32
fb_bitfield	include/linux/fb.h	/^struct fb_bitfield {$/;"	s
fb_blit_caps	include/linux/fb.h	/^struct fb_blit_caps {$/;"	s
fb_chroma	include/linux/fb.h	/^struct fb_chroma {$/;"	s
fb_clk	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		fb_clk;		\/* 0x2c *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
fb_cmap	include/linux/fb.h	/^struct fb_cmap {$/;"	s
fb_cmap_user	include/linux/fb.h	/^struct fb_cmap_user {$/;"	s
fb_con2fbmap	include/linux/fb.h	/^struct fb_con2fbmap {$/;"	s
fb_copyarea	include/linux/fb.h	/^struct fb_copyarea {$/;"	s
fb_cursor	include/linux/fb.h	/^struct fb_cursor {$/;"	s
fb_cursor_user	include/linux/fb.h	/^struct fb_cursor_user {$/;"	s
fb_deferred_io	include/linux/fb.h	/^struct fb_deferred_io {$/;"	s
fb_ep_desc	drivers/usb/gadget/f_fastboot.c	/^fb_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,$/;"	f	typeref:struct:usb_endpoint_descriptor *	file:
fb_event	include/linux/fb.h	/^struct fb_event {$/;"	s
fb_fillrect	include/linux/fb.h	/^struct fb_fillrect {$/;"	s
fb_fix_screeninfo	include/linux/fb.h	/^struct fb_fix_screeninfo {$/;"	s
fb_fs_function	drivers/usb/gadget/f_fastboot.c	/^static struct usb_descriptor_header *fb_fs_function[] = {$/;"	v	typeref:struct:usb_descriptor_header * []	file:
fb_hs_function	drivers/usb/gadget/f_fastboot.c	/^static struct usb_descriptor_header *fb_hs_function[] = {$/;"	v	typeref:struct:usb_descriptor_header * []	file:
fb_image	include/linux/fb.h	/^struct fb_image {$/;"	s
fb_image_user	include/linux/fb.h	/^struct fb_image_user {$/;"	s
fb_info	include/linux/fb.h	/^struct fb_info {$/;"	s
fb_local_base	drivers/video/ati_radeon_fb.h	/^	u32			fb_local_base;$/;"	m	struct:radeonfb_info	typeref:typename:u32
fb_memset	include/linux/fb.h	/^#define fb_memset /;"	d
fb_mmc_erase	common/fb_mmc.c	/^void fb_mmc_erase(const char *cmd)$/;"	f	typeref:typename:void
fb_mmc_flash_write	common/fb_mmc.c	/^void fb_mmc_flash_write(const char *cmd, void *download_buffer,$/;"	f	typeref:typename:void
fb_mmc_sparse	common/fb_mmc.c	/^struct fb_mmc_sparse {$/;"	s	file:
fb_mmc_sparse_reserve	common/fb_mmc.c	/^static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info,$/;"	f	typeref:typename:lbaint_t	file:
fb_mmc_sparse_write	common/fb_mmc.c	/^static lbaint_t fb_mmc_sparse_write(struct sparse_storage *info,$/;"	f	typeref:typename:lbaint_t	file:
fb_monspecs	include/linux/fb.h	/^struct fb_monspecs {$/;"	s
fb_nand_erase	common/fb_nand.c	/^void fb_nand_erase(const char *cmd)$/;"	f	typeref:typename:void
fb_nand_flash_write	common/fb_nand.c	/^void fb_nand_flash_write(const char *cmd, void *download_buffer,$/;"	f	typeref:typename:void
fb_nand_lookup	common/fb_nand.c	/^static int fb_nand_lookup(const char *partname,$/;"	f	typeref:typename:int	file:
fb_nand_sparse	common/fb_nand.c	/^struct fb_nand_sparse {$/;"	s	file:
fb_nand_sparse_reserve	common/fb_nand.c	/^static lbaint_t fb_nand_sparse_reserve(struct sparse_storage *info,$/;"	f	typeref:typename:lbaint_t	file:
fb_nand_sparse_write	common/fb_nand.c	/^static lbaint_t fb_nand_sparse_write(struct sparse_storage *info,$/;"	f	typeref:typename:lbaint_t	file:
fb_pixmap	include/linux/fb.h	/^struct fb_pixmap {$/;"	s
fb_put_byte	common/lcd.c	/^__weak void fb_put_byte(uchar **fb, uchar **from)$/;"	f	typeref:typename:__weak void
fb_put_byte	drivers/video/mpc8xx_lcd.c	/^void fb_put_byte(uchar **fb, uchar **from)$/;"	f	typeref:typename:void
fb_put_byte	drivers/video/video_bmp.c	/^__weak void fb_put_byte(uchar **fb, uchar **from)$/;"	f	typeref:typename:__weak void
fb_put_word	common/lcd.c	/^__weak void fb_put_word(uchar **fb, uchar **from)$/;"	f	typeref:typename:__weak void
fb_put_word	drivers/video/atmel_lcdfb.c	/^void fb_put_word(uchar **fb, uchar **from)$/;"	f	typeref:typename:void
fb_put_word	drivers/video/video_bmp.c	/^__weak void fb_put_word(uchar **fb, uchar **from)$/;"	f	typeref:typename:__weak void
fb_readb	include/linux/fb.h	/^#define fb_readb /;"	d
fb_readb	include/linux/fb.h	/^#define fb_readb(/;"	d
fb_readl	include/linux/fb.h	/^#define fb_readl /;"	d
fb_readl	include/linux/fb.h	/^#define fb_readl(/;"	d
fb_readq	include/linux/fb.h	/^#define fb_readq /;"	d
fb_readq	include/linux/fb.h	/^#define fb_readq(/;"	d
fb_readw	include/linux/fb.h	/^#define fb_readw /;"	d
fb_readw	include/linux/fb.h	/^#define fb_readw(/;"	d
fb_response_str	drivers/usb/gadget/f_fastboot.c	/^static char *fb_response_str;$/;"	v	typeref:typename:char *	file:
fb_set_reboot_flag	arch/arm/cpu/armv7/omap-common/boot-common.c	/^int fb_set_reboot_flag(void)$/;"	f	typeref:typename:int
fb_set_reboot_flag	board/amazon/kc1/kc1.c	/^int fb_set_reboot_flag(void)$/;"	f	typeref:typename:int
fb_set_reboot_flag	board/lg/sniper/sniper.c	/^int fb_set_reboot_flag(void)$/;"	f	typeref:typename:int
fb_set_reboot_flag	drivers/usb/gadget/f_fastboot.c	/^int __weak fb_set_reboot_flag(void)$/;"	f	typeref:typename:int __weak
fb_setcolreg	drivers/video/da8xx-fb.c	/^static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,$/;"	f	typeref:typename:int	file:
fb_size	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 fb_size;$/;"	m	struct:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a::__anon775fc5441608	typeref:typename:u32
fb_size	drivers/video/sunxi_display.c	/^	unsigned int fb_size;$/;"	m	struct:sunxi_display	typeref:typename:unsigned int	file:
fb_size	drivers/video/sunxi_display2.c	/^	unsigned int fb_size;$/;"	m	struct:sunxi_display	typeref:typename:unsigned int	file:
fb_size	include/efi_api.h	/^	unsigned long fb_size;$/;"	m	struct:efi_gop_mode	typeref:typename:unsigned long
fb_size	include/video.h	/^	int fb_size;$/;"	m	struct:video_priv	typeref:typename:int
fb_var_screeninfo	include/linux/fb.h	/^struct fb_var_screeninfo {$/;"	s
fb_vblank	include/linux/fb.h	/^struct fb_vblank {$/;"	s
fb_videomode	include/linux/fb.h	/^struct fb_videomode {$/;"	s
fb_videomode_to_var	drivers/video/mxc_ipuv3_fb.c	/^static void fb_videomode_to_var(struct fb_var_screeninfo *var,$/;"	f	typeref:typename:void	file:
fb_writeb	include/linux/fb.h	/^#define fb_writeb /;"	d
fb_writeb	include/linux/fb.h	/^#define fb_writeb(/;"	d
fb_writel	include/linux/fb.h	/^#define fb_writel /;"	d
fb_writel	include/linux/fb.h	/^#define fb_writel(/;"	d
fb_writeq	include/linux/fb.h	/^#define fb_writeq /;"	d
fb_writeq	include/linux/fb.h	/^#define fb_writeq(/;"	d
fb_writew	include/linux/fb.h	/^#define fb_writew /;"	d
fb_writew	include/linux/fb.h	/^#define fb_writew(/;"	d
fba	include/linux/mtd/samsung_onenand.h	/^	unsigned int	fba;		\/* 0x00D0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
fbac0	arch/powerpc/include/asm/immap_512x.h	/^	u32 fbac0;		\/* IIM fuse bank 0 prot (for Freescale use) *\/$/;"	m	struct:iim512x	typeref:typename:u32
fbac1	arch/powerpc/include/asm/immap_512x.h	/^	u32 fbac1;		\/* IIM fuse bank 1 protection *\/$/;"	m	struct:iim512x	typeref:typename:u32
fbank_sel	board/freescale/p2041rdb/cpld.h	/^	u8 fbank_sel;		\/* 0xb - Flash bank selection *\/$/;"	m	struct:cpld_data	typeref:typename:u8
fbar	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     fbar;           \/* Flash Block Addr Register *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
fbase	drivers/mmc/mmc.c	/^static const int fbase[] = {$/;"	v	typeref:typename:const int[]	file:
fbbase	include/lcd_console.h	/^	void *fbbase;$/;"	m	struct:console_t	typeref:typename:void *
fbcon_par	include/linux/fb.h	/^	void *fbcon_par;		\/* fbcon use-only private area *\/$/;"	m	struct:fb_info	typeref:typename:void *
fbcr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     fbcr;           \/* Flash Byte Count Register *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
fbcs	arch/m68k/include/asm/coldfire/flexbus.h	/^typedef struct fbcs {$/;"	s
fbcs_t	arch/m68k/include/asm/coldfire/flexbus.h	/^} fbcs_t;$/;"	t	typeref:struct:fbcs
fbcurpos	include/linux/fb.h	/^struct fbcurpos {$/;"	s
fbdiv	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	u32 fbdiv;$/;"	m	struct:pll_div	typeref:typename:u32
fbdiv	drivers/clk/rockchip/clk_rk3399.c	/^	u32 fbdiv;$/;"	m	struct:pll_div	typeref:typename:u32	file:
fbio_cfg1	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 fbio_cfg1;		\/* 0xF4: EMC_FBIO_CFG1 *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
fbio_dqsib_dly	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 fbio_dqsib_dly;	\/* 0xF8: EMC_FBIO_DQSIB_DLY *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
fbio_dqsib_dly_msb	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 fbio_dqsib_dly_msb;	\/* 0xFC: EMC_FBIO_DQSIB_DLY_MSG *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
fbio_spare	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 fbio_spare;		\/* 0x100: SBIO_SPARE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
fbio_spare_reg	arch/arm/mach-tegra/tegra20/warmboot.c	/^union fbio_spare_reg {$/;"	u	file:
fbmem	board/nokia/rx51/tag_omap.h	/^		struct omap_fbmem_config fbmem;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_fbmem_config
fbpr_ar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fbpr_ar;	\/* FBPR Attributes Register *\/$/;"	m	struct:ccsr_bman	typeref:typename:u32
fbpr_bar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fbpr_bar;	\/* FBPR Base Addr Register *\/$/;"	m	struct:ccsr_bman	typeref:typename:u32
fbpr_bare	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fbpr_bare;	\/* FBPR Extended Base Addr Register *\/$/;"	m	struct:ccsr_bman	typeref:typename:u32
fbptr_t	include/lcd.h	/^#define fbptr_t /;"	d
fbu	drivers/block/dwc_ahsata.c	/^	u32 fbu;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
fc	drivers/net/e1000.h	/^	e1000_fc_type fc;$/;"	m	struct:e1000_hw	typeref:typename:e1000_fc_type
fc	lib/zlib/deflate.h	/^    } fc;$/;"	m	struct:ct_data_s	typeref:union:ct_data_s::__anonaf16f3d6010a
fc_acp0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp0;			\/* 0x1075 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp1;			\/* 0x1091 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp10;			\/* 0x1088 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp11;			\/* 0x1087 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp12;			\/* 0x1086 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp13;			\/* 0x1085 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp14;			\/* 0x1084 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp15;			\/* 0x1083 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp16;			\/* 0x1082 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp17	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp17;			\/* 0x1081 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp18	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp18;			\/* 0x1080 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp19	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp19;			\/* 0x107f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp2;			\/* 0x1090 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp20	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp20;			\/* 0x107e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp21	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp21;			\/* 0x107d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp22	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp22;			\/* 0x107c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp23	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp23;			\/* 0x107b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp24	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp24;			\/* 0x107a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp25	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp25;			\/* 0x1079 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp26	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp26;			\/* 0x1078 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp27	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp27;			\/* 0x1077 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp28	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp28;			\/* 0x1076 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp3;			\/* 0x108f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp4;			\/* 0x108e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp5;			\/* 0x108d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp6;			\/* 0x108c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp7;			\/* 0x108b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp8;			\/* 0x108a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_acp9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_acp9;			\/* 0x1089 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_audiconf0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_audiconf0;		\/* 0x1025 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_audiconf0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_audiconf0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_audiconf1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_audiconf1;		\/* 0x1026 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_audiconf1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_audiconf1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_audiconf2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_audiconf2;		\/* 0x1027 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_audiconf2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_audiconf2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_audiconf3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_audiconf3;		\/* 0x1028 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_audiconf3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_audiconf3;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_audsconf	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_audsconf;			\/* 0x1063 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_audsstat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_audsstat;			\/* 0x1064 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_aviconf0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_aviconf0;			\/* 0x1019 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_aviconf0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_aviconf0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_aviconf1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_aviconf1;			\/* 0x101a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_aviconf1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_aviconf1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_aviconf2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_aviconf2;			\/* 0x101b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_aviconf2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_aviconf2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_aviconf3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_aviconf3;			\/* 0x1017 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_aviconf3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_aviconf3;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avielb0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avielb0;			\/* 0x1021 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avielb0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avielb0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avielb1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avielb1;			\/* 0x1022 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avielb1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avielb1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avietb0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avietb0;			\/* 0x101d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avietb0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avietb0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avietb1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avietb1;			\/* 0x101e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avietb1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avietb1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avisbb0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avisbb0;			\/* 0x101f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avisbb0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avisbb0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avisbb1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avisbb1;			\/* 0x1020 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avisbb1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avisbb1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avisrb0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avisrb0;			\/* 0x1023 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avisrb0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avisrb0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avisrb1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avisrb1;			\/* 0x1024 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avisrb1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avisrb1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_avivid	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_avivid;			\/* 0x101c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_avivid	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_avivid;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_brdmac	drivers/crypto/ace_sha.h	/^	unsigned int	fc_brdmac;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_brdmal	drivers/crypto/ace_sha.h	/^	unsigned int	fc_brdmal;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_brdmas	drivers/crypto/ace_sha.h	/^	unsigned int	fc_brdmas;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_btdmac	drivers/crypto/ace_sha.h	/^	unsigned int	fc_btdmac;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_btdmal	drivers/crypto/ace_sha.h	/^	unsigned int	fc_btdmal;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_btdmas	drivers/crypto/ace_sha.h	/^	unsigned int	fc_btdmas;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_ch0pream	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_ch0pream;			\/* 0x1014 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_ch0pream	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_ch0pream;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_ch1pream	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_ch1pream;			\/* 0x1015 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_ch1pream	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_ch1pream;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_ch2pream	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_ch2pream;			\/* 0x1016 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_ch2pream	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_ch2pream;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_ctrldur	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_ctrldur;			\/* 0x1011 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_ctrldur	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_ctrldur;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_ctrlqhigh	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_ctrlqhigh;		\/* 0x1073 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_ctrlqlow	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_ctrlqlow;			\/* 0x1074 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datach0fill	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datach0fill;		\/* 0x1070 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datach1fill	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datach1fill;		\/* 0x1071 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datach2fill	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datach2fill;		\/* 0x1072 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datauto0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datauto0;			\/* 0x10b3 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datauto1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datauto1;			\/* 0x10b4 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datauto2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datauto2;			\/* 0x10b5 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datauto3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datauto3;			\/* 0x10b7 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_datman	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_datman;			\/* 0x10b6 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch0;		\/* 0x1201 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch1;		\/* 0x1204 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch2;		\/* 0x1207 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch3;		\/* 0x120a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch4;		\/* 0x120d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch5;		\/* 0x1210 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch6;		\/* 0x1213 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud0ch7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud0ch7;		\/* 0x1216 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch0;		\/* 0x1202 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch1;		\/* 0x1205 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch2;		\/* 0x1208 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch3;		\/* 0x120b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch4;		\/* 0x120e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch5;		\/* 0x1211 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch6;		\/* 0x1214 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud1ch7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud1ch7;		\/* 0x1217 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch0;		\/* 0x1203 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch1;		\/* 0x1206 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch2;		\/* 0x1209 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch3;		\/* 0x120c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch4;		\/* 0x120f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch5;		\/* 0x1212 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch6;		\/* 0x1215 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgaud2ch7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgaud2ch7;		\/* 0x1218 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgforce	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgforce;			\/* 0x1200 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgtmds0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgtmds0;			\/* 0x1219 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgtmds1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgtmds1;			\/* 0x121a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_dbgtmds2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_dbgtmds2;			\/* 0x121b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_exctrldur	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_exctrldur;		\/* 0x1012 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_exctrldur	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_exctrldur;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_exctrlspac	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_exctrlspac;		\/* 0x1013 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_exctrlspac	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_exctrlspac;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_fifoctrl	drivers/crypto/ace_sha.h	/^	unsigned int	fc_fifoctrl;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_fifostat	drivers/crypto/ace_sha.h	/^	unsigned int	fc_fifostat;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_gcp	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gcp;			\/* 0x1018 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gcp	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_gcp;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_global	drivers/crypto/ace_sha.h	/^	unsigned int	fc_global;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_gmd_conf	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_conf;			\/* 0x1103 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_en	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_en;			\/* 0x1101 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_hb	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_hb;			\/* 0x1104 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb0;			\/* 0x1105 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb1;			\/* 0x1106 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb10;			\/* 0x110f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb11;			\/* 0x1110 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb12;			\/* 0x1111 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb13;			\/* 0x1112 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb14;			\/* 0x1113 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb15;			\/* 0x1114 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb16;			\/* 0x1115 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb17	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb17;			\/* 0x1116 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb18	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb18;			\/* 0x1117 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb19	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb19;			\/* 0x1118 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb2;			\/* 0x1107 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb20	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb20;			\/* 0x1119 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb21	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb21;			\/* 0x111a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb22	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb22;			\/* 0x111b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb23	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb23;			\/* 0x111c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb24	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb24;			\/* 0x111d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb25	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb25;			\/* 0x111e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb26	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb26;			\/* 0x111f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb27	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb27;			\/* 0x1120 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb3;			\/* 0x1108 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb4;			\/* 0x1109 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb5;			\/* 0x110a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb6;			\/* 0x110b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb7;			\/* 0x110c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb8;			\/* 0x110d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_pb9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_pb9;			\/* 0x110e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_stat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_stat;			\/* 0x1100 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_gmd_up	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_gmd_up;			\/* 0x1102 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_high_water	drivers/net/e1000.h	/^	uint16_t fc_high_water;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
fc_hrdmac	drivers/crypto/ace_sha.h	/^	unsigned int	fc_hrdmac;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_hrdmal	drivers/crypto/ace_sha.h	/^	unsigned int	fc_hrdmal;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_hrdmas	drivers/crypto/ace_sha.h	/^	unsigned int	fc_hrdmas;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_hsyncindelay0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_hsyncindelay0;		\/* 0x1008 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_hsyncindelay0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_hsyncindelay0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_hsyncindelay1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_hsyncindelay1;		\/* 0x1009 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_hsyncindelay1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_hsyncindelay1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_hsyncinwidth0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_hsyncinwidth0;		\/* 0x100a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_hsyncinwidth0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_hsyncinwidth0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_hsyncinwidth1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_hsyncinwidth1;		\/* 0x100b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_hsyncinwidth1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_hsyncinwidth1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_infreq0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_infreq0;			\/* 0x100e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_infreq0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_infreq0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_infreq1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_infreq1;			\/* 0x100f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_infreq1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_infreq1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_infreq2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_infreq2;			\/* 0x1010 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_infreq2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_infreq2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_inhactv0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_inhactv0;			\/* 0x1001 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_inhactv0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_inhactv0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_inhactv1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_inhactv1;			\/* 0x1002 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_inhactv1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_inhactv1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_inhblank0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_inhblank0;		\/* 0x1003 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_inhblank0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_inhblank0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_inhblank1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_inhblank1;		\/* 0x1004 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_inhblank1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_inhblank1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_int0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_int0;			\/* 0x10d1 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_int1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_int1;			\/* 0x10d5 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_int2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_int2;			\/* 0x10d9 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_intenclr	drivers/crypto/ace_sha.h	/^	unsigned int	fc_intenclr;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_intenset	drivers/crypto/ace_sha.h	/^	unsigned int	fc_intenset;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_intpend	drivers/crypto/ace_sha.h	/^	unsigned int	fc_intpend;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_intstat	drivers/crypto/ace_sha.h	/^	unsigned int	fc_intstat;	\/* base + 0 *\/$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_invactv0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_invactv0;			\/* 0x1005 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_invactv0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_invactv0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_invactv1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_invactv1;			\/* 0x1006 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_invactv1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_invactv1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_invblank	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_invblank;			\/* 0x1007 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_invblank	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_invblank;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_invidconf	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_invidconf;		\/* 0x1000 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_invidconf	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_invidconf;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_iscr1_0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_0;			\/* 0x1092 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_1;			\/* 0x10a2 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_10;			\/* 0x1099 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_11;			\/* 0x1098 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_12;			\/* 0x1097 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_13;			\/* 0x1096 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_14;			\/* 0x1095 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_15;			\/* 0x1094 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_16;			\/* 0x1093 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_2;			\/* 0x10a1 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_3;			\/* 0x10a0 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_4;			\/* 0x109f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_5;			\/* 0x109e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_6;			\/* 0x109d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_7;			\/* 0x109c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_8;			\/* 0x109b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr1_9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr1_9;			\/* 0x109a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_0;			\/* 0x10b2 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_1;			\/* 0x10b1 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_10;			\/* 0x10a8 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_11;			\/* 0x10a7 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_12;			\/* 0x10a6 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_13;			\/* 0x10a5 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_14;			\/* 0x10a4 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_15;			\/* 0x10a3 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_2;			\/* 0x10b0 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_3;			\/* 0x10af *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_4;			\/* 0x10ae *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_5;			\/* 0x10ad *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_6;			\/* 0x10ac *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_7;			\/* 0x10ab *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_8;			\/* 0x10aa *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_iscr2_9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_iscr2_9;			\/* 0x10a9 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_low_water	drivers/net/e1000.h	/^	uint16_t fc_low_water;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
fc_mask0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_mask0;			\/* 0x10d2 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_mask1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_mask1;			\/* 0x10d6 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_mask2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_mask2;			\/* 0x10da *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_pause_time	drivers/net/e1000.h	/^	uint16_t fc_pause_time;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
fc_pkdmac	drivers/crypto/ace_sha.h	/^	unsigned int	fc_pkdmac;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_pkdmal	drivers/crypto/ace_sha.h	/^	unsigned int	fc_pkdmal;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_pkdmao	drivers/crypto/ace_sha.h	/^	unsigned int	fc_pkdmao;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_pkdmas	drivers/crypto/ace_sha.h	/^	unsigned int	fc_pkdmas;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
fc_pol0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_pol0;			\/* 0x10d3 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_pol1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_pol1;			\/* 0x10d7 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_pol2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_pol2;			\/* 0x10db *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_prconf	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_prconf;			\/* 0x10e0 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb0;			\/* 0x10b8 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb1;			\/* 0x10b9 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb2;			\/* 0x10ba *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb3;			\/* 0x10bb *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb4;			\/* 0x10bc *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb5;			\/* 0x10bd *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb6;			\/* 0x10be *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_rdrb7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_rdrb7;			\/* 0x10bf *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname0;		\/* 0x1052 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname1;		\/* 0x1053 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname10;		\/* 0x105c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname11;		\/* 0x105d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname12;		\/* 0x105e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname13;		\/* 0x105f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname14;		\/* 0x1060 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname2;		\/* 0x1054 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname3;		\/* 0x1055 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname4;		\/* 0x1056 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname5;		\/* 0x1057 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname6;		\/* 0x1058 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname7;		\/* 0x1059 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname8;		\/* 0x105a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_sdpproductname9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_sdpproductname9;		\/* 0x105b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_send_xon	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			fc_send_xon;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
fc_send_xon	drivers/net/e1000.h	/^	bool fc_send_xon;$/;"	m	struct:e1000_hw	typeref:typename:bool
fc_spddeviceinf	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spddeviceinf;		\/* 0x1062 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdproductname15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdproductname15;		\/* 0x1061 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname0;		\/* 0x104a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname1;		\/* 0x104b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname2;		\/* 0x104c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname3;		\/* 0x104d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname4;		\/* 0x104e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname5;		\/* 0x104f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname6;		\/* 0x1050 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_spdvendorname7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_spdvendorname7;		\/* 0x1051 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_stat0;			\/* 0x10d0 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_stat1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_stat1;			\/* 0x10d4 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_stat2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_stat2;			\/* 0x10d8 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_strict_ieee	drivers/net/e1000.h	/^	bool		fc_strict_ieee;$/;"	m	struct:e1000_hw	typeref:typename:bool
fc_timer	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 fc_timer;		\/* 0x010 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
fc_vsdieeeid0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdieeeid0;		\/* 0x1029 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdieeeid0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_vsdieeeid0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_vsdieeeid1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdieeeid1;		\/* 0x1030 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdieeeid2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdieeeid2;		\/* 0x1031 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload0;		\/* 0x1032 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload1;		\/* 0x1033 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload10;		\/* 0x103c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload11;		\/* 0x103d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload12;		\/* 0x103e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload13;		\/* 0x103f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload14;		\/* 0x1040 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload15;		\/* 0x1041 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload16;		\/* 0x1042 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload17	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload17;		\/* 0x1043 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload18	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload18;		\/* 0x1044 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload19	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload19;		\/* 0x1045 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload2;		\/* 0x1034 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload20	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload20;		\/* 0x1046 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload21	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload21;		\/* 0x1047 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload22	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload22;		\/* 0x1048 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload23	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload23;		\/* 0x1049 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload3;		\/* 0x1035 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload4;		\/* 0x1036 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload5;		\/* 0x1037 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload6;		\/* 0x1038 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload7;		\/* 0x1039 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload8;		\/* 0x103a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdpayload9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdpayload9;		\/* 0x103b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdsize	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsdsize;			\/* 0x102a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsdsize	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_vsdsize;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_vsyncindelay	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsyncindelay;		\/* 0x100c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsyncindelay	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_vsyncindelay;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fc_vsyncinwidth	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 fc_vsyncinwidth;		\/* 0x100d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
fc_vsyncinwidth	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 fc_vsyncinwidth;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
fcb	tools/vybridimage.c	/^		uint32_t fcb[128];$/;"	m	union:nand_page_0_boot_header::__anondaaa9309010a	typeref:typename:uint32_t[128]	file:
fcb_bytes	tools/vybridimage.c	/^		uint8_t fcb_bytes[512];$/;"	m	union:nand_page_0_boot_header::__anondaaa9309010a	typeref:typename:uint8_t[512]	file:
fcba_t	tools/ifdtool.h	/^struct __packed fcba_t {$/;"	s
fcc	arch/powerpc/include/asm/immap_8260.h	/^typedef struct fcc {$/;"	s
fcc_c	arch/powerpc/include/asm/immap_8260.h	/^typedef struct fcc_c {$/;"	s
fcc_c_t	arch/powerpc/include/asm/immap_8260.h	/^} fcc_c_t;$/;"	t	typeref:struct:fcc_c
fcc_enet	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct fcc_enet {$/;"	s
fcc_enet	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct fcc_enet {$/;"	s
fcc_enet_t	arch/powerpc/include/asm/cpm_8260.h	/^} fcc_enet_t;$/;"	t	typeref:struct:fcc_enet
fcc_enet_t	arch/powerpc/include/asm/cpm_85xx.h	/^} fcc_enet_t;$/;"	t	typeref:struct:fcc_enet
fcc_fcce	arch/powerpc/include/asm/immap_8260.h	/^	ushort	fcc_fcce;$/;"	m	struct:fcc	typeref:typename:ushort
fcc_fccm	arch/powerpc/include/asm/immap_8260.h	/^	ushort	fcc_fccm;$/;"	m	struct:fcc	typeref:typename:ushort
fcc_fccs	arch/powerpc/include/asm/immap_8260.h	/^	u_char	fcc_fccs;$/;"	m	struct:fcc	typeref:typename:u_char
fcc_fdsr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	fcc_fdsr;$/;"	m	struct:fcc	typeref:typename:ushort
fcc_firer	arch/powerpc/include/asm/immap_8260.h	/^	uint	fcc_firer;$/;"	m	struct:fcc_c	typeref:typename:uint
fcc_firper	arch/powerpc/include/asm/immap_8260.h	/^	uint	fcc_firper;$/;"	m	struct:fcc_c	typeref:typename:uint
fcc_firsr_hi	arch/powerpc/include/asm/immap_8260.h	/^	uint	fcc_firsr_hi;$/;"	m	struct:fcc_c	typeref:typename:uint
fcc_firsr_lo	arch/powerpc/include/asm/immap_8260.h	/^	uint	fcc_firsr_lo;$/;"	m	struct:fcc_c	typeref:typename:uint
fcc_fpsmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	fcc_fpsmr;$/;"	m	struct:fcc	typeref:typename:uint
fcc_ftirr_phy	arch/powerpc/include/asm/immap_8260.h	/^	u_char	fcc_ftirr_phy[4];$/;"	m	struct:fcc	typeref:typename:u_char[4]
fcc_ftodr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	fcc_ftodr;$/;"	m	struct:fcc	typeref:typename:ushort
fcc_gfemr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	fcc_gfemr;$/;"	m	struct:fcc_c	typeref:typename:u_char
fcc_gfmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	fcc_gfmr;$/;"	m	struct:fcc	typeref:typename:uint
fcc_mrblr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_mrblr;	\/* Max receive buffer length, mod 32 bytes *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_mrblr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_mrblr;	\/* Max receive buffer length, mod 32 bytes *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_param	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct fcc_param {$/;"	s
fcc_param	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct fcc_param {$/;"	s
fcc_rbase	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_rbase;	\/* Receive BD base *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rbase	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_rbase;	\/* Receive BD base *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rbdlen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_rbdlen;	\/* RxBD down counter *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_rbdlen	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_rbdlen;	\/* RxBD down counter *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_rbdstat	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_rbdstat;	\/* RxBD status *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_rbdstat	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_rbdstat;	\/* RxBD status *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_rbptr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_rbptr;	\/* Rx BD Internal buf pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_rbptr;	\/* Rx BD Internal buf pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rcrc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_rcrc;	\/* Rx temp CRC *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rcrc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_rcrc;	\/* Rx temp CRC *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rdptr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_rdptr;	\/* RxBD internal data pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rdptr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_rdptr;	\/* RxBD internal data pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_res1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_res1;$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_res1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_res1;$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_res2	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_res2;$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_res2	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_res2;$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_riptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_riptr;	\/* Rx Internal temp pointer *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_riptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_riptr;	\/* Rx Internal temp pointer *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_rstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_rstate;	\/* Upper byte is Func code, must be set *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_rstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_rstate;	\/* Upper byte is Func code, must be set *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_t	arch/powerpc/include/asm/immap_8260.h	/^} fcc_t;$/;"	t	typeref:struct:fcc
fcc_tbase	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_tbase;	\/* Transmit BD base *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tbase	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_tbase;	\/* Transmit BD base *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tbdlen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_tbdlen;	\/* TxBD down counter *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_tbdlen	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_tbdlen;	\/* TxBD down counter *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_tbdstat	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_tbdstat;	\/* TxBD status *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_tbdstat	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_tbdstat;	\/* TxBD status *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_tbptr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_tbptr;	\/* Tx BD Internal buf pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_tbptr;	\/* Tx BD Internal buf pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tcrc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_tcrc;	\/* Tx temp CRC *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tcrc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_tcrc;	\/* Tx temp CRC *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tdptr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_tdptr;	\/* TxBD internal data pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tdptr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_tdptr;	\/* TxBD internal data pointer *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tiptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fcc_tiptr;	\/* Tx Internal temp pointer *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_tiptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fcc_tiptr;	\/* Tx Internal temp pointer *\/$/;"	m	struct:fcc_param	typeref:typename:ushort
fcc_tstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fcc_tstate;	\/* Upper byte is Func code, must be set *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcc_tstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fcc_tstate;	\/* Upper byte is Func code, must be set *\/$/;"	m	struct:fcc_param	typeref:typename:uint
fcce	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fcce;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u16
fcce	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fcce;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u16
fcce	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fcce;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u16
fccm	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fccm;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u16
fccm	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fccm;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u16
fccm	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fccm;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u16
fccp_t	arch/powerpc/include/asm/cpm_8260.h	/^} fccp_t;$/;"	t	typeref:struct:fcc_param
fccp_t	arch/powerpc/include/asm/cpm_85xx.h	/^} fccp_t;$/;"	t	typeref:struct:fcc_param
fccr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 fccr;	\/*0x0008*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
fccs	arch/powerpc/include/asm/immap_85xx.h	/^	u8	fccs;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u8
fccs	arch/powerpc/include/asm/immap_85xx.h	/^	u8	fccs;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u8
fccs	arch/powerpc/include/asm/immap_85xx.h	/^	u8	fccs;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u8
fcf	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t fcf;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
fclk	drivers/spi/ti_qspi.c	/^	ulong fclk;$/;"	m	struct:ti_qspi_priv	typeref:typename:ulong	file:
fclk0_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	fclk0_clk, fclk1_clk, fclk2_clk, fclk3_clk, can0_clk, can1_clk,$/;"	e	enum:zynq_clk
fclk1_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	fclk0_clk, fclk1_clk, fclk2_clk, fclk3_clk, can0_clk, can1_clk,$/;"	e	enum:zynq_clk
fclk2_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	fclk0_clk, fclk1_clk, fclk2_clk, fclk3_clk, can0_clk, can1_clk,$/;"	e	enum:zynq_clk
fclk3_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	fclk0_clk, fclk1_clk, fclk2_clk, fclk3_clk, can0_clk, can1_clk,$/;"	e	enum:zynq_clk
fclken1_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken1_core;	\/* 0xa00 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken3_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken3_core;	\/* 0xa08 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_cam	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_cam;		\/* 0xf00 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_dss	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_dss;		\/* 0xe00 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_gfx	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_gfx;		\/* 0xb00 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_iva2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_iva2;	\/* 0x00 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_per	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_per;		\/* 0x1000 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_usbhost	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_usbhost;	\/* 0x1400 *\/$/;"	m	struct:prcm	typeref:typename:u32
fclken_wkup	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 fclken_wkup;	\/* 0xc00 *\/$/;"	m	struct:prcm	typeref:typename:u32
fcnt	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 fcnt;$/;"	m	struct:i2c_regs	typeref:typename:u32
fcntcr1	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	fcntcr1;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
fcntcr2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	fcntcr2;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
fcntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 fcntrl;			\/* MBAR_ETH + 0x148 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
fcolor	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 fcolor;$/;"	m	struct:de_bld::__anon5efd7b530108	typeref:typename:u32
fcolor	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 fcolor;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
fcolor	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 fcolor[4];			\/* c0 *\/$/;"	m	struct:de_vi	typeref:typename:u32[4]
fcolor	arch/arm/include/asm/arch/display2.h	/^		u32 fcolor;$/;"	m	struct:de_bld::__anon279c75ef0108	typeref:typename:u32
fcolor	arch/arm/include/asm/arch/display2.h	/^		u32 fcolor;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
fcolor	arch/arm/include/asm/arch/display2.h	/^	u32 fcolor[4];			\/* c0 *\/$/;"	m	struct:de_vi	typeref:typename:u32[4]
fcolor_ctl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 fcolor_ctl;			\/* 00 *\/$/;"	m	struct:de_bld	typeref:typename:u32
fcolor_ctl	arch/arm/include/asm/arch/display2.h	/^	u32 fcolor_ctl;			\/* 00 *\/$/;"	m	struct:de_bld	typeref:typename:u32
fcr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	fcr;$/;"	m	union:pxa_uart_regs::__anon3c298eb7030a	typeref:typename:uint32_t
fcr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int fcr; \/* FIFO control register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
fcr	arch/arm/mach-at91/include/mach/at91_eefc.h	/^	u32	fcr;	\/* Flash Command Register WO *\/$/;"	m	struct:at91_eefc	typeref:typename:u32
fcr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     fcr;            \/* Flash Command Register *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
fcr	drivers/net/ftgmac100.h	/^	unsigned int	fcr;		\/* 0x68 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
fcr	drivers/net/ftmac100.h	/^	unsigned int	fcr;		\/* 0x98 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
fcr	drivers/net/ftmac110.h	/^	uint32_t fcr;    \/* 0x98: Flow Control Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
fcr	drivers/serial/serial_mxc.c	/^	u32 fcr;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
fcr31	arch/mips/include/asm/processor.h	/^	unsigned int	fcr31;$/;"	m	struct:mips_fpu_struct	typeref:typename:unsigned int
fcruc	drivers/net/e1000.h	/^	uint64_t fcruc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
fcsah	drivers/net/armada100_fec.h	/^	u32 fcsah;			\/* Flow control source address high *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
fcsal	drivers/net/armada100_fec.h	/^	u32 fcsal;			\/* Flow control source address low *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
fcsr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 fcsr;$/;"	m	struct:ssi	typeref:typename:u32
fct	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t fct;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
fctl	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fctl;$/;"	m	struct:iim_regs	typeref:typename:u32
fctl	arch/powerpc/include/asm/immap_512x.h	/^	u32 fctl;		\/* IIM fuse control register *\/$/;"	m	struct:iim512x	typeref:typename:u32
fctl	drivers/misc/fsl_iim.c	/^	u32 fctl;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
fd	arch/arm/lib/semihosting.c	/^		long fd;$/;"	m	struct:smh_read::smh_read_s	typeref:typename:long	file:
fd	common/cli_hush.c	/^	int fd;						\/* file descriptor being redirected *\/$/;"	m	struct:redir_struct	typeref:typename:int	file:
fd	common/cli_hush.c	/^	int fd;$/;"	m	struct:close_me	typeref:typename:int	file:
fd	common/dlmalloc.c	/^  struct malloc_chunk* fd;   \/* double links -- used only if free. *\/$/;"	m	struct:malloc_chunk	typeref:struct:malloc_chunk *	file:
fd	drivers/mtd/spi/sandbox.c	/^	int fd;$/;"	m	struct:sandbox_spi_flash	typeref:typename:int	file:
fd	drivers/net/greth.c	/^	int fd;			\/* Full Duplex *\/$/;"	m	struct:__anonb53b88540108	typeref:typename:int	file:
fd	drivers/usb/emul/sandbox_flash.c	/^	int fd;$/;"	m	struct:sandbox_flash_priv	typeref:typename:int	file:
fd	include/sandboxblockdev.h	/^	int fd;$/;"	m	struct:host_block_dev	typeref:typename:int
fd	tools/patman/patman	/^    fd = open(options.cc_cmd, 'r')$/;"	v
fd	tools/patman/patman.py	/^    fd = open(options.cc_cmd, 'r')$/;"	v
fdId	fs/yaffs2/yaffsfs.c	/^	short int fdId;$/;"	m	struct:yaffsfs_Handle	typeref:typename:short int	file:
fd_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 fd_clk_cfg;		\/* 0x4cc FD module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fd_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 fd_clk_cfg;		\/* 0x4cc FD module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fd_set	include/linux/types.h	/^typedef __kernel_fd_set		fd_set;$/;"	t	typeref:typename:__kernel_fd_set
fd_stdin	arch/sparc/include/asm/prom.h	/^	int *fd_stdin;$/;"	m	struct:linux_bootargs_v2	typeref:typename:int *
fd_stdout	arch/sparc/include/asm/prom.h	/^	int *fd_stdout;$/;"	m	struct:linux_bootargs_v2	typeref:typename:int *
fdadr	include/pxa_lcd.h	/^	u_long	fdadr;		\/* Frame descriptor address register *\/$/;"	m	struct:pxafb_dma_descriptor	typeref:typename:u_long
fdadr0	include/pxa_lcd.h	/^	u_long	fdadr0;$/;"	m	struct:pxafb_info	typeref:typename:u_long
fdadr1	include/pxa_lcd.h	/^	u_long	fdadr1;$/;"	m	struct:pxafb_info	typeref:typename:u_long
fdata	drivers/spi/ich.h	/^	uint32_t fdata[16];	\/* 0x10 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t[16]
fdb_entry_add	include/ethsw.h	/^	int (*fdb_entry_add)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
fdb_entry_del	include/ethsw.h	/^	int (*fdb_entry_del)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
fdb_flush	include/ethsw.h	/^	int (*fdb_flush)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
fdb_show	include/ethsw.h	/^	int (*fdb_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
fdbar_t	tools/ifdtool.h	/^struct __packed fdbar_t {$/;"	s
fdc_check_drive	cmd/fdc.c	/^int fdc_check_drive(FDC_COMMAND_STRUCT *pCMD, FD_GEO_STRUCT *pFG)$/;"	f	typeref:typename:int
fdc_issue_cmd	cmd/fdc.c	/^int fdc_issue_cmd(FDC_COMMAND_STRUCT *pCMD,FD_GEO_STRUCT *pFG)$/;"	f	typeref:typename:int
fdc_need_more_output	cmd/fdc.c	/^int fdc_need_more_output(void)$/;"	f	typeref:typename:int
fdc_read_data	cmd/fdc.c	/^int fdc_read_data(unsigned char *buffer, unsigned long blocks,FDC_COMMAND_STRUCT *pCMD, FD_GEO_S/;"	f	typeref:typename:int
fdc_recalibrate	cmd/fdc.c	/^int fdc_recalibrate(FDC_COMMAND_STRUCT *pCMD,FD_GEO_STRUCT *pFG)$/;"	f	typeref:typename:int
fdc_seek	cmd/fdc.c	/^int fdc_seek(FDC_COMMAND_STRUCT *pCMD,FD_GEO_STRUCT *pFG)$/;"	f	typeref:typename:int
fdc_setup	cmd/fdc.c	/^int fdc_setup(int drive, FDC_COMMAND_STRUCT *pCMD, FD_GEO_STRUCT *pFG)$/;"	f	typeref:typename:int
fdc_terminate	cmd/fdc.c	/^int fdc_terminate(FDC_COMMAND_STRUCT *pCMD)$/;"	f	typeref:typename:int
fdd	drivers/video/da8xx-fb.h	/^	int fdd;$/;"	m	struct:lcd_ctrl_config	typeref:typename:int
fdlmon	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	fdlmon;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
fdoc	drivers/spi/ich.h	/^	uint32_t fdoc;		\/* 0xb0 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
fdod	drivers/spi/ich.h	/^	uint32_t fdod;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
fdq_sel	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	fdq_sel[2];$/;"	m	struct:rx_flow_regs	typeref:typename:u32[2]
fdr	arch/m68k/include/asm/fsl_i2c.h	/^	u8 fdr;		\/* I2C frequency divider register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
fdr	arch/m68k/include/asm/immap_520x.h	/^	u8 fdr;			\/* 0x06 Feedback Divider *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
fdr	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 fdr;		\/* I2C frequency divider register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
fdr	drivers/i2c/fsl_i2c.c	/^	u8 fdr;$/;"	m	struct:__anon2b7522730108	typeref:typename:u8	file:
fds_bits	include/linux/posix_types.h	/^	unsigned long fds_bits [__FDSET_LONGS];$/;"	m	struct:__anon599dae140108	typeref:typename:unsigned long[]
fdsr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fdsr;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u16
fdsr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fdsr;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u16
fdsr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	fdsr;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u16
fdt	cmd/pxe.c	/^	char *fdt;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
fdt	include/libfdt.h	/^	const void *fdt;		\/* FDT blob *\/$/;"	m	struct:fdt_region_state	typeref:typename:const void *
fdt	lib/libfdt/test_libfdt.py	/^    fdt = fd.read()$/;"	v
fdt16_t	include/libfdt_env.h	/^typedef __be16 fdt16_t;$/;"	t	typeref:typename:__be16
fdt32_t	include/libfdt_env.h	/^typedef __be32 fdt32_t;$/;"	t	typeref:typename:__be32
fdt32_to_cpu	include/libfdt_env.h	/^#define fdt32_to_cpu(/;"	d
fdt32_to_cpu	tools/dtoc/fdt_util.py	/^def fdt32_to_cpu(val):$/;"	f
fdt64_t	include/libfdt_env.h	/^typedef __be64 fdt64_t;$/;"	t	typeref:typename:__be64
fdt64_to_cpu	include/libfdt_env.h	/^#define fdt64_to_cpu(/;"	d
fdt_add_alias_regions	lib/libfdt/fdt_region.c	/^int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,$/;"	f	typeref:typename:int
fdt_add_bignum	lib/rsa/rsa-sign.c	/^static int fdt_add_bignum(void *blob, int noffset, const char *prop_name,$/;"	f	typeref:typename:int	file:
fdt_add_edid	common/fdt_support.c	/^int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf)$/;"	f	typeref:typename:int
fdt_add_enet_stashing	arch/powerpc/cpu/mpc85xx/fdt.c	/^void fdt_add_enet_stashing(void *fdt)$/;"	f	typeref:typename:void
fdt_add_mem_rsv	lib/libfdt/fdt_rw.c	/^int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)$/;"	f	typeref:typename:int
fdt_add_pci_node	board/gateworks/gw_ventana/gw_ventana.c	/^int fdt_add_pci_node(void *blob, int par, struct pci_dev *dev)$/;"	f	typeref:typename:int
fdt_add_pci_path	board/gateworks/gw_ventana/gw_ventana.c	/^int fdt_add_pci_path(void *blob, struct pci_dev *dev)$/;"	f	typeref:typename:int
fdt_add_region	lib/libfdt/fdt_region.c	/^static int fdt_add_region(struct fdt_region_state *info, int offset, int size)$/;"	f	typeref:typename:int	file:
fdt_add_reservemap_entry	lib/libfdt/fdt_sw.c	/^int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)$/;"	f	typeref:typename:int
fdt_add_subnode	lib/libfdt/fdt_rw.c	/^int fdt_add_subnode(void *fdt, int parentoffset, const char *name)$/;"	f	typeref:typename:int
fdt_add_subnode_namelen	lib/libfdt/fdt_rw.c	/^int fdt_add_subnode_namelen(void *fdt, int parentoffset,$/;"	f	typeref:typename:int
fdt_addr_t	include/fdtdec.h	/^typedef phys_addr_t fdt_addr_t;$/;"	t	typeref:typename:phys_addr_t
fdt_addr_to_cpu	include/fdtdec.h	/^#define fdt_addr_to_cpu(/;"	d
fdt_address_cells	lib/libfdt/fdt_addresses.c	/^int fdt_address_cells(const void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_alloc_phandle	common/fdt_support.c	/^int fdt_alloc_phandle(void *blob)$/;"	f	typeref:typename:int
fdt_appendprop	lib/libfdt/fdt_rw.c	/^int fdt_appendprop(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int
fdt_appendprop_cell	include/libfdt.h	/^static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_appendprop_string	include/libfdt.h	/^#define fdt_appendprop_string(/;"	d
fdt_appendprop_u32	include/libfdt.h	/^static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_appendprop_u64	include/libfdt.h	/^static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_begin_node	lib/libfdt/fdt_sw.c	/^int fdt_begin_node(void *fdt, const char *name)$/;"	f	typeref:typename:int
fdt_blob	include/asm-generic/global_data.h	/^	const void *fdt_blob;		\/* Our device tree, NULL if none *\/$/;"	m	struct:global_data	typeref:typename:const void *
fdt_blob	include/image.h	/^	const void *fdt_blob;		\/* FDT containing public keys *\/$/;"	m	struct:image_sign_info	typeref:typename:const void *
fdt_board_disable_serial	board/freescale/mpc8569mds/mpc8569mds.c	/^static void fdt_board_disable_serial(void *blob, bd_t *bd, const char *alias)$/;"	f	typeref:typename:void	file:
fdt_board_fixup_esdhc	board/freescale/mpc8569mds/mpc8569mds.c	/^static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {}$/;"	f	typeref:typename:void	file:
fdt_board_fixup_esdhc	board/freescale/mpc8569mds/mpc8569mds.c	/^static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
fdt_board_fixup_qe_pins	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^static void fdt_board_fixup_qe_pins(void *blob)$/;"	f	typeref:typename:void	file:
fdt_board_fixup_qe_pins	board/freescale/p1_twr/p1_twr.c	/^static void fdt_board_fixup_qe_pins(void *blob)$/;"	f	typeref:typename:void	file:
fdt_board_fixup_qe_uart	board/freescale/mpc8569mds/mpc8569mds.c	/^static void fdt_board_fixup_qe_uart(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
fdt_board_fixup_qe_usb	board/freescale/mpc8569mds/mpc8569mds.c	/^static void fdt_board_fixup_qe_usb(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
fdt_boot_cpuid_phys	include/libfdt.h	/^#define fdt_boot_cpuid_phys(/;"	d
fdt_check_header	lib/libfdt/fdt.c	/^int fdt_check_header(const void *fdt)$/;"	f	typeref:typename:int
fdt_checkerr	lib/fdtdec_test.c	/^static int fdt_checkerr(const char *oper_name, int err)$/;"	f	typeref:typename:int	file:
fdt_chosen	common/fdt_support.c	/^int fdt_chosen(void *fdt)$/;"	f	typeref:typename:int
fdt_compat_id	include/fdtdec.h	/^enum fdt_compat_id {$/;"	g
fdt_create	lib/libfdt/fdt_sw.c	/^int fdt_create(void *buf, int bufsize)$/;"	f	typeref:typename:int
fdt_create_empty_tree	lib/libfdt/fdt_empty_tree.c	/^int fdt_create_empty_tree(void *buf, int bufsize)$/;"	f	typeref:typename:int
fdt_create_phandle	common/fdt_support.c	/^unsigned int fdt_create_phandle(void *fdt, int nodeoffset)$/;"	f	typeref:typename:unsigned int
fdt_cros_ec	include/cros_ec.h	/^struct fdt_cros_ec {$/;"	s
fdt_decode_nand	drivers/mtd/nand/tegra_nand.c	/^static int fdt_decode_nand(const void *blob, int node, struct fdt_nand *config)$/;"	f	typeref:typename:int	file:
fdt_decode_usb	drivers/usb/host/ehci-tegra.c	/^static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config)$/;"	f	typeref:typename:int	file:
fdt_del_diu	arch/powerpc/cpu/mpc85xx/fdt.c	/^void fdt_del_diu(void *blob)$/;"	f	typeref:typename:void
fdt_del_flexcan	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_del_flexcan(void *blob)$/;"	f	typeref:typename:void
fdt_del_ifc	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_del_ifc(void *blob)$/;"	f	typeref:typename:void
fdt_del_mem_rsv	lib/libfdt/fdt_rw.c	/^int fdt_del_mem_rsv(void *fdt, int n)$/;"	f	typeref:typename:int
fdt_del_node	lib/libfdt/fdt_rw.c	/^int fdt_del_node(void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_del_node_and_alias	common/fdt_support.c	/^void fdt_del_node_and_alias(void *blob, const char *alias)$/;"	f	typeref:typename:void
fdt_del_node_compat	board/freescale/bsc9132qds/bsc9132qds.c	/^void fdt_del_node_compat(void *blob, const char *compatible)$/;"	f	typeref:typename:void
fdt_del_node_name	board/tqc/tqm8xx/tqm8xx.c	/^int fdt_del_node_name (void *blob, char *nodename)$/;"	f	typeref:typename:int
fdt_del_partitions	common/fdt_support.c	/^int fdt_del_partitions(void *blob, int parent_offset)$/;"	f	typeref:typename:int
fdt_del_prop_name	board/tqc/tqm8xx/tqm8xx.c	/^int fdt_del_prop_name (void *blob, char *nodename, char *propname)$/;"	f	typeref:typename:int
fdt_del_qe	board/freescale/ls1043ardb/ls1043ardb.c	/^void fdt_del_qe(void *blob)$/;"	f	typeref:typename:void
fdt_del_sdhc	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_del_sdhc(void *blob)$/;"	f	typeref:typename:void
fdt_del_sec	board/freescale/c29xpcie/c29xpcie.c	/^void fdt_del_sec(void *blob, int offset)$/;"	f	typeref:typename:void
fdt_del_spi_flash	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_del_spi_flash(void *blob)$/;"	f	typeref:typename:void
fdt_del_spi_slic	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_del_spi_slic(void *blob)$/;"	f	typeref:typename:void
fdt_del_subnodes	common/fdt_support.c	/^int fdt_del_subnodes(const void *blob, int parent_offset)$/;"	f	typeref:typename:int
fdt_del_tdm	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_del_tdm(void *blob)$/;"	f	typeref:typename:void
fdt_delprop	lib/libfdt/fdt_rw.c	/^int fdt_delprop(void *fdt, int nodeoffset, const char *name)$/;"	f	typeref:typename:int
fdt_disable_uart1	board/freescale/p1010rdb/p1010rdb.c	/^void fdt_disable_uart1(void *blob)$/;"	f	typeref:typename:void
fdt_enable_nor	board/freescale/t102xrdb/t102xrdb.c	/^static void fdt_enable_nor(void *blob)$/;"	f	typeref:typename:void	file:
fdt_end_node	lib/libfdt/fdt_sw.c	/^int fdt_end_node(void *fdt)$/;"	f	typeref:typename:int
fdt_error	common/image-fdt.c	/^static void fdt_error(const char *msg)$/;"	f	typeref:typename:void	file:
fdt_errtabent	lib/libfdt/fdt_strerror.c	/^struct fdt_errtabent {$/;"	s	file:
fdt_errtable	lib/libfdt/fdt_strerror.c	/^static struct fdt_errtabent fdt_errtable[] = {$/;"	v	typeref:struct:fdt_errtabent[]	file:
fdt_find_and_setprop	common/fdt_support.c	/^int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,$/;"	f	typeref:typename:int
fdt_find_or_add_subnode	common/fdt_support.c	/^int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name)$/;"	f	typeref:typename:int
fdt_find_regions	lib/libfdt/fdt_wip.c	/^int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,$/;"	f	typeref:typename:int
fdt_finish	lib/libfdt/fdt_sw.c	/^int fdt_finish(void *fdt)$/;"	f	typeref:typename:int
fdt_finish_reservemap	lib/libfdt/fdt_sw.c	/^int fdt_finish_reservemap(void *fdt)$/;"	f	typeref:typename:int
fdt_first_property_offset	lib/libfdt/fdt_ro.c	/^int fdt_first_property_offset(const void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_first_region	lib/libfdt/fdt_region.c	/^int fdt_first_region(const void *fdt,$/;"	f	typeref:typename:int
fdt_first_subnode	lib/libfdt/fdt.c	/^int fdt_first_subnode(const void *fdt, int offset)$/;"	f	typeref:typename:int
fdt_fixup_board_enet	board/freescale/b4860qds/eth_b4860qds.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/corenet_ds/eth_hydra.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/corenet_ds/eth_p4080.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/corenet_ds/eth_superhydra.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/ls1043aqds/eth.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/ls1046aqds/eth.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/ls2080a/ls2080a.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/ls2080aqds/ls2080aqds.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/ls2080ardb/ls2080ardb.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t102xqds/eth_t102xqds.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t102xrdb/eth_t102xrdb.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t1040qds/eth.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t208xqds/eth_t208xqds.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t208xrdb/eth_t208xrdb.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t4qds/eth.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_board_enet	board/freescale/t4rdb/eth.c	/^void fdt_fixup_board_enet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_bportals	arch/powerpc/cpu/mpc85xx/portals.c	/^void fdt_fixup_bportals(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_crypto_era	drivers/crypto/fsl/sec.c	/^static void fdt_fixup_crypto_era(void *blob, u32 era)$/;"	f	typeref:typename:void	file:
fdt_fixup_crypto_node	drivers/crypto/fsl/sec.c	/^void fdt_fixup_crypto_node(void *blob, int sec_rev)$/;"	f	typeref:typename:void
fdt_fixup_crypto_node	include/fdt_support.h	/^static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}$/;"	f	typeref:typename:void
fdt_fixup_display	common/fdt_support.c	/^int fdt_fixup_display(void *blob, const char *path, const char *display)$/;"	f	typeref:typename:int
fdt_fixup_dma3	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define fdt_fixup_dma3(/;"	d	file:
fdt_fixup_dma3	arch/powerpc/cpu/mpc85xx/fdt.c	/^void fdt_fixup_dma3(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_esdhc	drivers/mmc/fsl_esdhc.c	/^void fdt_fixup_esdhc(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
fdt_fixup_esdhc	include/fsl_esdhc.h	/^static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}$/;"	f	typeref:typename:void
fdt_fixup_ethernet	common/fdt_support.c	/^void fdt_fixup_ethernet(void *fdt)$/;"	f	typeref:typename:void
fdt_fixup_fman_ethernet	drivers/net/fm/init.c	/^void fdt_fixup_fman_ethernet(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_fman_firmware	drivers/net/fm/fdt.c	/^void fdt_fixup_fman_firmware(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_fman_mac_addresses	board/keymile/kmp204x/kmp204x.c	/^void fdt_fixup_fman_mac_addresses(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_gw16082	board/gateworks/gw_ventana/gw_ventana.c	/^int fdt_fixup_gw16082(void *blob, int np, struct pci_dev *dev)$/;"	f	typeref:typename:int
fdt_fixup_l2_switch	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define fdt_fixup_l2_switch(/;"	d	file:
fdt_fixup_l2_switch	arch/powerpc/cpu/mpc85xx/fdt.c	/^static void fdt_fixup_l2_switch(void *blob)$/;"	f	typeref:typename:void	file:
fdt_fixup_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^void fdt_fixup_liodn(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_liodn_tbl	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)$/;"	f	typeref:typename:void	file:
fdt_fixup_liodn_tbl_fman	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void fdt_fixup_liodn_tbl_fman(void *blob,$/;"	f	typeref:typename:void	file:
fdt_fixup_memory	common/fdt_support.c	/^int fdt_fixup_memory(void *blob, u64 start, u64 size)$/;"	f	typeref:typename:int
fdt_fixup_memory_banks	common/fdt_support.c	/^int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)$/;"	f	typeref:typename:int
fdt_fixup_mtdparts	common/fdt_support.c	/^void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)$/;"	f	typeref:typename:void
fdt_fixup_mtdparts	include/fdt_support.h	/^static inline void fdt_fixup_mtdparts(void *fdt, void *node_info,$/;"	f	typeref:typename:void
fdt_fixup_muram	arch/powerpc/cpu/mpc83xx/fdt.c	/^void fdt_fixup_muram (void *blob)$/;"	f	typeref:typename:void
fdt_fixup_nor_flash_size	common/fdt_support.c	/^int fdt_fixup_nor_flash_size(void *blob)$/;"	f	typeref:typename:int
fdt_fixup_pci_liodn_offsets	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,$/;"	f	typeref:typename:void	file:
fdt_fixup_pcie	drivers/pci/pcie_layerscape.c	/^static void fdt_fixup_pcie(void *blob)$/;"	f	typeref:typename:void	file:
fdt_fixup_phy_connection	arch/arm/cpu/armv8/fsl-layerscape/fdt.c	/^int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)$/;"	f	typeref:typename:int
fdt_fixup_phy_connection	arch/powerpc/cpu/mpc8xxx/fdt.c	/^int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)$/;"	f	typeref:typename:int
fdt_fixup_qe_firmware	drivers/qe/fdt.c	/^void fdt_fixup_qe_firmware(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_qportals	arch/powerpc/cpu/mpc85xx/portals.c	/^void fdt_fixup_qportals(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_sky2	board/gateworks/gw_ventana/gw_ventana.c	/^int fdt_fixup_sky2(void *blob, int np, struct pci_dev *dev)$/;"	f	typeref:typename:int
fdt_fixup_spi_mux	board/freescale/t102xqds/t102xqds.c	/^void fdt_fixup_spi_mux(void *blob)$/;"	f	typeref:typename:void
fdt_fixup_srio_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl)$/;"	f	typeref:typename:void	file:
fdt_fixup_stdout	common/fdt_support.c	/^static int fdt_fixup_stdout(void *fdt, int chosenoff)$/;"	f	typeref:typename:int	file:
fdt_fixup_usb	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define fdt_fixup_usb(/;"	d	file:
fdt_fixup_usb	arch/powerpc/cpu/mpc85xx/fdt.c	/^static void fdt_fixup_usb(void *fdt)$/;"	f	typeref:typename:void	file:
fdt_fixup_usb_mode_phy_type	drivers/usb/common/fsl-dt-fixup.c	/^static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,$/;"	f	typeref:typename:int	file:
fdt_fname	arch/sandbox/include/asm/state.h	/^	const char *fdt_fname;		\/* Filename of FDT binary *\/$/;"	m	struct:sandbox_state	typeref:typename:const char *
fdt_for_each_property_offset	include/libfdt.h	/^#define fdt_for_each_property_offset(/;"	d
fdt_for_each_subnode	include/libfdt.h	/^#define fdt_for_each_subnode(/;"	d
fdt_get_alias	lib/libfdt/fdt_ro.c	/^const char *fdt_get_alias(const void *fdt, const char *name)$/;"	f	typeref:typename:const char *
fdt_get_alias_namelen	lib/libfdt/fdt_ro.c	/^const char *fdt_get_alias_namelen(const void *fdt,$/;"	f	typeref:typename:const char *
fdt_get_base_address	common/fdt_support.c	/^u64 fdt_get_base_address(void *fdt, int node)$/;"	f	typeref:typename:u64
fdt_get_header	include/libfdt.h	/^#define fdt_get_header(/;"	d
fdt_get_max_phandle	lib/libfdt/fdt_ro.c	/^uint32_t fdt_get_max_phandle(const void *fdt)$/;"	f	typeref:typename:uint32_t
fdt_get_mem_rsv	lib/libfdt/fdt_ro.c	/^int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)$/;"	f	typeref:typename:int
fdt_get_name	lib/libfdt/fdt_ro.c	/^const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)$/;"	f	typeref:typename:const char *
fdt_get_named_resource	lib/fdtdec.c	/^int fdt_get_named_resource(const void *fdt, int node, const char *property,$/;"	f	typeref:typename:int
fdt_get_path	lib/libfdt/fdt_ro.c	/^int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)$/;"	f	typeref:typename:int
fdt_get_phandle	lib/libfdt/fdt_ro.c	/^uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)$/;"	f	typeref:typename:uint32_t
fdt_get_property	lib/libfdt/fdt_ro.c	/^const struct fdt_property *fdt_get_property(const void *fdt,$/;"	f	typeref:typename:const struct fdt_property *
fdt_get_property_by_offset	lib/libfdt/fdt_ro.c	/^const struct fdt_property *fdt_get_property_by_offset(const void *fdt,$/;"	f	typeref:typename:const struct fdt_property *
fdt_get_property_namelen	lib/libfdt/fdt_ro.c	/^const struct fdt_property *fdt_get_property_namelen(const void *fdt,$/;"	f	typeref:typename:const struct fdt_property *
fdt_get_property_w	include/libfdt.h	/^static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,$/;"	f	typeref:struct:fdt_property *
fdt_get_reg	board/xilinx/zynq/board.c	/^static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,$/;"	f	typeref:typename:phys_size_t	file:
fdt_get_reg	board/xilinx/zynqmp/zynqmp.c	/^static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,$/;"	f	typeref:typename:phys_size_t	file:
fdt_get_resource	lib/fdtdec.c	/^int fdt_get_resource(const void *fdt, int node, const char *property,$/;"	f	typeref:typename:int
fdt_getprop	lib/libfdt/fdt_ro.c	/^const void *fdt_getprop(const void *fdt, int nodeoffset,$/;"	f	typeref:typename:const void *
fdt_getprop_by_offset	lib/libfdt/fdt_ro.c	/^const void *fdt_getprop_by_offset(const void *fdt, int offset,$/;"	f	typeref:typename:const void *
fdt_getprop_namelen	lib/libfdt/fdt_ro.c	/^const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,$/;"	f	typeref:typename:const void *
fdt_getprop_namelen_w	include/libfdt.h	/^static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,$/;"	f	typeref:typename:void *
fdt_getprop_str	test/overlay/cmd_ut_overlay.c	/^static int fdt_getprop_str(void *fdt, const char *path, const char *name,$/;"	f	typeref:typename:int	file:
fdt_getprop_u32	common/spl/spl_fit.c	/^static ulong fdt_getprop_u32(const void *fdt, int node, const char *prop)$/;"	f	typeref:typename:ulong	file:
fdt_getprop_u32	test/overlay/cmd_ut_overlay.c	/^static int fdt_getprop_u32(void *fdt, const char *path, const char *name,$/;"	f	typeref:typename:int	file:
fdt_getprop_u32_by_index	test/overlay/cmd_ut_overlay.c	/^static int fdt_getprop_u32_by_index(void *fdt, const char *path,$/;"	f	typeref:typename:int	file:
fdt_getprop_u32_default	common/fdt_support.c	/^u32 fdt_getprop_u32_default(const void *fdt, const char *path,$/;"	f	typeref:typename:u32
fdt_getprop_u32_default_node	common/fdt_support.c	/^u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,$/;"	f	typeref:typename:u32
fdt_getprop_w	include/libfdt.h	/^static inline void *fdt_getprop_w(void *fdt, int nodeoffset,$/;"	f	typeref:typename:void *
fdt_header	include/fdt.h	/^struct fdt_header {$/;"	s
fdt_help_text	cmd/fdt.c	/^static char fdt_help_text[] =$/;"	v	typeref:typename:char[]	file:
fdt_include_supernodes	lib/libfdt/fdt_region.c	/^static int fdt_include_supernodes(struct fdt_region_state *info, int depth)$/;"	f	typeref:typename:int	file:
fdt_increase_size	common/fdt_support.c	/^int fdt_increase_size(void *fdt, int add_len)$/;"	f	typeref:typename:int
fdt_initrd	common/fdt_support.c	/^int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)$/;"	f	typeref:typename:int
fdt_last_comp_version	include/libfdt.h	/^#define fdt_last_comp_version(/;"	d
fdt_magic	include/libfdt.h	/^#define fdt_magic(/;"	d
fdt_memory	include/fdtdec.h	/^struct fdt_memory {$/;"	s
fdt_move	lib/libfdt/fdt.c	/^int fdt_move(const void *fdt, void *buf, int bufsize)$/;"	f	typeref:typename:int
fdt_nand	drivers/mtd/nand/tegra_nand.c	/^struct fdt_nand {$/;"	s	file:
fdt_next_node	lib/libfdt/fdt.c	/^int fdt_next_node(const void *fdt, int offset, int *depth)$/;"	f	typeref:typename:int
fdt_next_property_offset	lib/libfdt/fdt_ro.c	/^int fdt_next_property_offset(const void *fdt, int offset)$/;"	f	typeref:typename:int
fdt_next_region	lib/libfdt/fdt_region.c	/^int fdt_next_region(const void *fdt,$/;"	f	typeref:typename:int
fdt_next_subnode	lib/libfdt/fdt.c	/^int fdt_next_subnode(const void *fdt, int offset)$/;"	f	typeref:typename:int
fdt_next_tag	lib/libfdt/fdt.c	/^uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)$/;"	f	typeref:typename:uint32_t
fdt_node_check_compatible	lib/libfdt/fdt_ro.c	/^int fdt_node_check_compatible(const void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_node_depth	lib/libfdt/fdt_ro.c	/^int fdt_node_depth(const void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_node_header	include/fdt.h	/^struct fdt_node_header {$/;"	s
fdt_node_offset_by_compat_reg	common/fdt_support.c	/^int fdt_node_offset_by_compat_reg(void *blob, const char *compat,$/;"	f	typeref:typename:int
fdt_node_offset_by_compatible	lib/libfdt/fdt_ro.c	/^int fdt_node_offset_by_compatible(const void *fdt, int startoffset,$/;"	f	typeref:typename:int
fdt_node_offset_by_phandle	lib/libfdt/fdt_ro.c	/^int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)$/;"	f	typeref:typename:int
fdt_node_offset_by_prop_value	lib/libfdt/fdt_ro.c	/^int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,$/;"	f	typeref:typename:int
fdt_node_set_part_info	common/fdt_support.c	/^int fdt_node_set_part_info(void *blob, int parent_offset,$/;"	f	typeref:typename:int
fdt_nop_node	lib/libfdt/fdt_wip.c	/^int fdt_nop_node(void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_nop_property	lib/libfdt/fdt_wip.c	/^int fdt_nop_property(void *fdt, int nodeoffset, const char *name)$/;"	f	typeref:typename:int
fdt_num_mem_rsv	lib/libfdt/fdt_ro.c	/^int fdt_num_mem_rsv(const void *fdt)$/;"	f	typeref:typename:int
fdt_off_dt_strings	include/libfdt.h	/^#define fdt_off_dt_strings(/;"	d
fdt_off_dt_struct	include/libfdt.h	/^#define fdt_off_dt_struct(/;"	d
fdt_off_mem_rsvmap	include/libfdt.h	/^#define fdt_off_mem_rsvmap(/;"	d
fdt_offset_ptr	lib/libfdt/fdt.c	/^const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)$/;"	f	typeref:typename:const void *
fdt_offset_ptr_w	include/libfdt.h	/^static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)$/;"	f	typeref:typename:void *
fdt_open_into	lib/libfdt/fdt_rw.c	/^int fdt_open_into(const void *fdt, void *buf, int bufsize)$/;"	f	typeref:typename:int
fdt_overlay_add_node_by_path	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_add_node_by_path(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_add_node_by_phandle	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_add_node_by_phandle(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_add_str_property	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_add_str_property(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_add_subnode_property	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_add_subnode_property(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_apply	lib/libfdt/fdt_overlay.c	/^int fdt_overlay_apply(void *fdt, void *fdto)$/;"	f	typeref:typename:int
fdt_overlay_change_int_property	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_change_int_property(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_change_str_property	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_change_str_property(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_local_phandle	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_local_phandle(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_overlay_local_phandles	test/overlay/cmd_ut_overlay.c	/^static int fdt_overlay_local_phandles(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
fdt_pack	lib/libfdt/fdt_rw.c	/^int fdt_pack(void *fdt)$/;"	f	typeref:typename:int
fdt_pack_reg	common/fdt_support.c	/^static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size,$/;"	f	typeref:typename:int	file:
fdt_parent_offset	lib/libfdt/fdt_ro.c	/^int fdt_parent_offset(const void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_parse_prop	cmd/fdt.c	/^static int fdt_parse_prop(char * const *newval, int count, char *data, int *len)$/;"	f	typeref:typename:int	file:
fdt_path_next_separator	lib/libfdt/fdt_ro.c	/^static const char *fdt_path_next_separator(const char *path, int len)$/;"	f	typeref:typename:const char *	file:
fdt_path_offset	lib/libfdt/fdt_ro.c	/^int fdt_path_offset(const void *fdt, const char *path)$/;"	f	typeref:typename:int
fdt_path_offset_namelen	lib/libfdt/fdt_ro.c	/^int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen)$/;"	f	typeref:typename:int
fdt_pci_addr	include/fdtdec.h	/^struct fdt_pci_addr {$/;"	s
fdt_pci_dma_ranges	common/fdt_support.c	/^int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {$/;"	f	typeref:typename:int
fdt_pci_space	include/fdtdec.h	/^enum fdt_pci_space {$/;"	g
fdt_pcie_set_msi_map_entry	drivers/pci/pcie_layerscape.c	/^static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,$/;"	f	typeref:typename:void	file:
fdt_pcie_setup	arch/powerpc/cpu/ppc4xx/fdt.c	/^void fdt_pcie_setup(void *blob)$/;"	f	typeref:typename:void
fdt_portal	arch/powerpc/cpu/mpc85xx/portals.c	/^void fdt_portal(void *blob, const char *compat, const char *container,$/;"	f	typeref:typename:void
fdt_print	cmd/fdt.c	/^static int fdt_print(const char *pathp, char *prop, int depth)$/;"	f	typeref:typename:int	file:
fdt_property	include/fdt.h	/^struct fdt_property {$/;"	s
fdt_property	lib/libfdt/fdt_sw.c	/^int fdt_property(void *fdt, const char *name, const void *val, int len)$/;"	f	typeref:typename:int
fdt_property_cell	include/libfdt.h	/^static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)$/;"	f	typeref:typename:int
fdt_property_file	tools/fit_image.c	/^static int fdt_property_file(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
fdt_property_placeholder	lib/libfdt/fdt_sw.c	/^int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)$/;"	f	typeref:typename:int
fdt_property_strf	tools/fit_image.c	/^static int fdt_property_strf(void *fdt, const char *name, const char *fmt, ...)$/;"	f	typeref:typename:int	file:
fdt_property_string	include/libfdt.h	/^#define fdt_property_string(/;"	d
fdt_property_u32	include/libfdt.h	/^static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)$/;"	f	typeref:typename:int
fdt_property_u64	include/libfdt.h	/^static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)$/;"	f	typeref:typename:int
fdt_psci	arch/arm/lib/psci-dt.c	/^int fdt_psci(void *fdt)$/;"	f	typeref:typename:int
fdt_qportal	arch/powerpc/cpu/mpc85xx/portals.c	/^static int fdt_qportal(void *blob, int off, int id, char *name,$/;"	f	typeref:typename:int	file:
fdt_read_prop	common/fdt_support.c	/^static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off,$/;"	f	typeref:typename:int	file:
fdt_read_range	common/fdt_support.c	/^int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr,$/;"	f	typeref:typename:int
fdt_region	include/libfdt.h	/^struct fdt_region {$/;"	s
fdt_region_ptrs	include/libfdt.h	/^struct fdt_region_ptrs {$/;"	s
fdt_region_state	include/libfdt.h	/^struct fdt_region_state {$/;"	s
fdt_remove_unused_strings	lib/libfdt/fdt_rw.c	/^int fdt_remove_unused_strings(const void *old, void *new)$/;"	f	typeref:typename:int
fdt_reserve_entry	include/fdt.h	/^struct fdt_reserve_entry {$/;"	s
fdt_resize	lib/libfdt/fdt_sw.c	/^int fdt_resize(void *fdt, void *buf, int bufsize)$/;"	f	typeref:typename:int
fdt_resource	include/fdtdec.h	/^struct fdt_resource {$/;"	s
fdt_resource_size	include/fdtdec.h	/^static inline fdt_size_t fdt_resource_size(const struct fdt_resource *res)$/;"	f	typeref:typename:fdt_size_t
fdt_root	common/fdt_support.c	/^int fdt_root(void *fdt)$/;"	f	typeref:typename:int
fdt_set_mdio_mux	board/freescale/corenet_ds/eth_hydra.c	/^static void fdt_set_mdio_mux(void *fdt, const char *alias, u32 mux)$/;"	f	typeref:typename:void	file:
fdt_set_name	lib/libfdt/fdt_rw.c	/^int fdt_set_name(void *fdt, int nodeoffset, const char *name)$/;"	f	typeref:typename:int
fdt_set_node_and_value	board/tqc/tqm8xx/tqm8xx.c	/^int fdt_set_node_and_value (void *blob,$/;"	f	typeref:typename:int
fdt_set_node_status	common/fdt_support.c	/^int fdt_set_node_status(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_set_phandle	common/fdt_support.c	/^int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle)$/;"	f	typeref:typename:int
fdt_set_phy_handle	board/freescale/common/fman.c	/^int fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,$/;"	f	typeref:typename:int
fdt_set_status_by_alias	common/fdt_support.c	/^int fdt_set_status_by_alias(void *fdt, const char* alias,$/;"	f	typeref:typename:int
fdt_setprop	lib/libfdt/fdt_rw.c	/^int fdt_setprop(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int
fdt_setprop_cell	include/libfdt.h	/^static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int
fdt_setprop_inplace	lib/libfdt/fdt_wip.c	/^int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int
fdt_setprop_inplace_cell	include/libfdt.h	/^static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_setprop_inplace_namelen_partial	lib/libfdt/fdt_wip.c	/^int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_setprop_inplace_u32	include/libfdt.h	/^static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_setprop_inplace_u64	include/libfdt.h	/^static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_setprop_string	include/libfdt.h	/^#define fdt_setprop_string(/;"	d
fdt_setprop_u32	include/libfdt.h	/^static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int
fdt_setprop_u64	include/libfdt.h	/^static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int
fdt_setprop_uxx	common/fdt_support.c	/^static inline int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name,$/;"	f	typeref:typename:int	file:
fdt_setup_simplefb_node	common/fdt_support.c	/^int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,$/;"	f	typeref:typename:int
fdt_shrink_to_minimum	common/fdt_support.c	/^int fdt_shrink_to_minimum(void *blob, uint extrasize)$/;"	f	typeref:typename:int
fdt_size	include/asm-generic/global_data.h	/^	unsigned long fdt_size;		\/* Space reserved for relocated FDT *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
fdt_size_cells	lib/libfdt/fdt_addresses.c	/^int fdt_size_cells(const void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_size_dt_strings	include/libfdt.h	/^#define fdt_size_dt_strings(/;"	d
fdt_size_dt_struct	include/libfdt.h	/^#define fdt_size_dt_struct(/;"	d
fdt_size_t	include/fdtdec.h	/^typedef phys_size_t fdt_size_t;$/;"	t	typeref:typename:phys_size_t
fdt_size_to_cpu	include/fdtdec.h	/^#define fdt_size_to_cpu(/;"	d
fdt_sromc	arch/arm/mach-exynos/include/mach/sromc.h	/^struct fdt_sromc {$/;"	s
fdt_status	include/fdt_support.h	/^enum fdt_status {$/;"	g
fdt_status_disabled	include/fdt_support.h	/^static inline int fdt_status_disabled(void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_status_disabled_by_alias	include/fdt_support.h	/^static inline int fdt_status_disabled_by_alias(void *fdt, const char *alias)$/;"	f	typeref:typename:int
fdt_status_fail	include/fdt_support.h	/^static inline int fdt_status_fail(void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_status_fail_by_alias	include/fdt_support.h	/^static inline int fdt_status_fail_by_alias(void *fdt, const char *alias)$/;"	f	typeref:typename:int
fdt_status_okay	include/fdt_support.h	/^static inline int fdt_status_okay(void *fdt, int nodeoffset)$/;"	f	typeref:typename:int
fdt_status_okay_by_alias	include/fdt_support.h	/^static inline int fdt_status_okay_by_alias(void *fdt, const char *alias)$/;"	f	typeref:typename:int
fdt_strerror	lib/libfdt/fdt_strerror.c	/^const char *fdt_strerror(int errval)$/;"	f	typeref:typename:const char *
fdt_string	lib/libfdt/fdt_ro.c	/^const char *fdt_string(const void *fdt, int stroffset)$/;"	f	typeref:typename:const char *
fdt_stringlist_contains	lib/libfdt/fdt_ro.c	/^int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)$/;"	f	typeref:typename:int
fdt_stringlist_count	lib/libfdt/fdt_ro.c	/^int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property)$/;"	f	typeref:typename:int
fdt_stringlist_get	lib/libfdt/fdt_ro.c	/^const char *fdt_stringlist_get(const void *fdt, int nodeoffset,$/;"	f	typeref:typename:const char *
fdt_stringlist_search	lib/libfdt/fdt_ro.c	/^int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,$/;"	f	typeref:typename:int
fdt_subnode_offset	lib/libfdt/fdt_ro.c	/^int fdt_subnode_offset(const void *fdt, int parentoffset,$/;"	f	typeref:typename:int
fdt_subnode_offset_namelen	lib/libfdt/fdt_ro.c	/^int fdt_subnode_offset_namelen(const void *fdt, int offset,$/;"	f	typeref:typename:int
fdt_subnode_stack	include/libfdt.h	/^struct fdt_subnode_stack {$/;"	s
fdt_supernode_atdepth_offset	lib/libfdt/fdt_ro.c	/^int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,$/;"	f	typeref:typename:int
fdt_totalsize	include/libfdt.h	/^#define fdt_totalsize(/;"	d
fdt_translate_address	common/fdt_support.c	/^u64 fdt_translate_address(const void *blob, int node_offset,$/;"	f	typeref:typename:u64
fdt_tsec1_fixup	board/freescale/mpc8315erdb/mpc8315erdb.c	/^void fdt_tsec1_fixup(void *fdt, bd_t *bd)$/;"	f	typeref:typename:void
fdt_usb	drivers/usb/host/ehci-tegra.c	/^struct fdt_usb {$/;"	s	file:
fdt_usb_controller	drivers/usb/host/ehci-tegra.c	/^struct fdt_usb_controller {$/;"	s	file:
fdt_usb_controllers	drivers/usb/host/ehci-tegra.c	/^static struct fdt_usb_controller fdt_usb_controllers[USB_CTRL_COUNT] = {$/;"	v	typeref:struct:fdt_usb_controller[]	file:
fdt_usb_get_node_type	drivers/usb/common/fsl-dt-fixup.c	/^static int fdt_usb_get_node_type(void *blob, int start_offset,$/;"	f	typeref:typename:int	file:
fdt_valid	cmd/fdt.c	/^static int fdt_valid(struct fdt_header **blobp)$/;"	f	typeref:typename:int	file:
fdt_value_setenv	cmd/fdt.c	/^static int fdt_value_setenv(const void *nodep, int len, const char *var)$/;"	f	typeref:typename:int	file:
fdt_verify_alias_address	common/fdt_support.c	/^int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr)$/;"	f	typeref:typename:int
fdt_version	include/libfdt.h	/^#define fdt_version(/;"	d
fdtdec_add_aliases_for_id	lib/fdtdec.c	/^int fdtdec_add_aliases_for_id(const void *blob, const char *name,$/;"	f	typeref:typename:int
fdtdec_check_fdt	lib/fdtdec.c	/^int fdtdec_check_fdt(void)$/;"	f	typeref:typename:int
fdtdec_decode_display_timing	lib/fdtdec.c	/^int fdtdec_decode_display_timing(const void *blob, int parent, int index,$/;"	f	typeref:typename:int
fdtdec_decode_memory_region	lib/fdtdec.c	/^int fdtdec_decode_memory_region(const void *blob, int config_node,$/;"	f	typeref:typename:int
fdtdec_decode_region	lib/fdtdec.c	/^int fdtdec_decode_region(const void *blob, int node, const char *prop_name,$/;"	f	typeref:typename:int
fdtdec_find_aliases_for_id	lib/fdtdec.c	/^int fdtdec_find_aliases_for_id(const void *blob, const char *name,$/;"	f	typeref:typename:int
fdtdec_get_addr	lib/fdtdec.c	/^fdt_addr_t fdtdec_get_addr(const void *blob, int node,$/;"	f	typeref:typename:fdt_addr_t
fdtdec_get_addr_size	lib/fdtdec.c	/^fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,$/;"	f	typeref:typename:fdt_addr_t
fdtdec_get_addr_size_auto_noparent	lib/fdtdec.c	/^fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,$/;"	f	typeref:typename:fdt_addr_t
fdtdec_get_addr_size_auto_parent	lib/fdtdec.c	/^fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,$/;"	f	typeref:typename:fdt_addr_t
fdtdec_get_addr_size_fixed	lib/fdtdec.c	/^fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,$/;"	f	typeref:typename:fdt_addr_t
fdtdec_get_alias_seq	lib/fdtdec.c	/^int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,$/;"	f	typeref:typename:int
fdtdec_get_bool	lib/fdtdec.c	/^int fdtdec_get_bool(const void *blob, int node, const char *prop_name)$/;"	f	typeref:typename:int
fdtdec_get_byte_array	lib/fdtdec.c	/^int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,$/;"	f	typeref:typename:int
fdtdec_get_child_count	lib/fdtdec.c	/^int fdtdec_get_child_count(const void *blob, int node)$/;"	f	typeref:typename:int
fdtdec_get_chosen_node	lib/fdtdec.c	/^int fdtdec_get_chosen_node(const void *blob, const char *name)$/;"	f	typeref:typename:int
fdtdec_get_chosen_prop	lib/fdtdec.c	/^const char *fdtdec_get_chosen_prop(const void *blob, const char *name)$/;"	f	typeref:typename:const char *
fdtdec_get_compatible	lib/fdtdec.c	/^const char *fdtdec_get_compatible(enum fdt_compat_id id)$/;"	f	typeref:typename:const char *
fdtdec_get_config_bool	lib/fdtdec.c	/^int fdtdec_get_config_bool(const void *blob, const char *prop_name)$/;"	f	typeref:typename:int
fdtdec_get_config_int	lib/fdtdec.c	/^int fdtdec_get_config_int(const void *blob, const char *prop_name,$/;"	f	typeref:typename:int
fdtdec_get_config_string	lib/fdtdec.c	/^char *fdtdec_get_config_string(const void *blob, const char *prop_name)$/;"	f	typeref:typename:char *
fdtdec_get_int	lib/fdtdec_common.c	/^int fdtdec_get_int(const void *blob, int node, const char *prop_name,$/;"	f	typeref:typename:int
fdtdec_get_int_array	lib/fdtdec.c	/^int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,$/;"	f	typeref:typename:int
fdtdec_get_int_array_count	lib/fdtdec.c	/^int fdtdec_get_int_array_count(const void *blob, int node,$/;"	f	typeref:typename:int
fdtdec_get_is_enabled	lib/fdtdec.c	/^int fdtdec_get_is_enabled(const void *blob, int node)$/;"	f	typeref:typename:int
fdtdec_get_number	lib/fdtdec.c	/^u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)$/;"	f	typeref:typename:u64
fdtdec_get_pci_addr	lib/fdtdec.c	/^int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,$/;"	f	typeref:typename:int
fdtdec_get_pci_bar32	lib/fdtdec.c	/^int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,$/;"	f	typeref:typename:int
fdtdec_get_pci_vendev	lib/fdtdec.c	/^int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)$/;"	f	typeref:typename:int
fdtdec_get_uint	lib/fdtdec_common.c	/^unsigned int fdtdec_get_uint(const void *blob, int node, const char *prop_name,$/;"	f	typeref:typename:unsigned int
fdtdec_get_uint64	lib/fdtdec.c	/^uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,$/;"	f	typeref:typename:uint64_t
fdtdec_locate_array	lib/fdtdec.c	/^const u32 *fdtdec_locate_array(const void *blob, int node,$/;"	f	typeref:typename:const u32 *
fdtdec_locate_byte_array	lib/fdtdec.c	/^const u8 *fdtdec_locate_byte_array(const void *blob, int node,$/;"	f	typeref:typename:const u8 *
fdtdec_lookup	lib/fdtdec.c	/^enum fdt_compat_id fdtdec_lookup(const void *blob, int node)$/;"	f	typeref:enum:fdt_compat_id
fdtdec_lookup_phandle	lib/fdtdec.c	/^int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)$/;"	f	typeref:typename:int
fdtdec_next_alias	lib/fdtdec.c	/^int fdtdec_next_alias(const void *blob, const char *name,$/;"	f	typeref:typename:int
fdtdec_next_compatible	lib/fdtdec.c	/^int fdtdec_next_compatible(const void *blob, int node,$/;"	f	typeref:typename:int
fdtdec_next_compatible_subnode	lib/fdtdec.c	/^int fdtdec_next_compatible_subnode(const void *blob, int node,$/;"	f	typeref:typename:int
fdtdec_parse_phandle_with_args	lib/fdtdec.c	/^int fdtdec_parse_phandle_with_args(const void *blob, int src_node,$/;"	f	typeref:typename:int
fdtdec_phandle_args	include/fdtdec.h	/^struct fdtdec_phandle_args {$/;"	s
fdtdec_prepare_fdt	lib/fdtdec.c	/^int fdtdec_prepare_fdt(void)$/;"	f	typeref:typename:int
fdtdec_read_fmap_entry	lib/fdtdec.c	/^int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,$/;"	f	typeref:typename:int
fdtdec_setup	lib/fdtdec.c	/^int fdtdec_setup(void)$/;"	f	typeref:typename:int
fdtdir	cmd/pxe.c	/^	char *fdtdir;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
fdtfile	board/raspberrypi/rpi/rpi.c	/^	const char *fdtfile;$/;"	m	struct:rpi_model	typeref:typename:const char *	file:
fdtgrep_find_regions	tools/fdtgrep.c	/^static int fdtgrep_find_regions(const void *fdt,$/;"	f	typeref:typename:int	file:
fdx	drivers/video/stb_truetype.h	/^   float fx,fdx,fdy;$/;"	m	struct:stbtt__active_edge	typeref:typename:float
fdxfc_da1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 fdxfc_da1;		\/* MBAR_ETH + 0x0DC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
fdxfc_da2	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 fdxfc_da2;		\/* MBAR_ETH + 0x0E0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
fdy	drivers/video/stb_truetype.h	/^   float fx,fdx,fdy;$/;"	m	struct:stbtt__active_edge	typeref:typename:float
fe0	arch/arm/dts/sun5i-a13.dtsi	/^		fe0: display-frontend@01e00000 {$/;"	l
fe0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 fe0_clk_cfg;	\/* 0x10c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 fe0_clk_cfg;	\/* 0x10c FE0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 fe0_clk_cfg;	\/* 0x10c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 fe0_clk_cfg;	\/* 0x10c FE0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe0_out	arch/arm/dts/sun5i-a13.dtsi	/^				fe0_out: port@1 {$/;"	l	label:fe0
fe0_out_be0	arch/arm/dts/sun5i-a13.dtsi	/^					fe0_out_be0: endpoint@0 {$/;"	l	label:fe0.fe0_out
fe1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 fe1_clk_cfg;	\/* 0x110 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 fe1_clk_cfg;	\/* 0x110 FE1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 fe1_clk_cfg;	\/* 0x110 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 fe1_clk_cfg;	\/* 0x110 FE1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
fe_3d_ch0_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ch0_addr;		\/* 0x0e4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch0_addr	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ch0_addr;		\/* 0x0e4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch0_offset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ch0_offset;		\/* 0x0f0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch0_offset	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ch0_offset;		\/* 0x0f0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch1_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ch1_addr;		\/* 0x0e8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch1_addr	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ch1_addr;		\/* 0x0e8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch1_offset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ch1_offset;		\/* 0x0f4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch1_offset	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ch1_offset;		\/* 0x0f4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch2_addr	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ch2_addr;		\/* 0x0ec *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch2_addr	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ch2_addr;		\/* 0x0ec *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch2_offset	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ch2_offset;		\/* 0x0f8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ch2_offset	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ch2_offset;		\/* 0x0f8 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 fe_3d_ctrl;			\/* 0x0e0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fe_3d_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 fe_3d_ctrl;			\/* 0x0e0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
fear	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	fear;$/;"	m	struct:scu_registers	typeref:typename:u32
fear	drivers/net/ftgmac100.h	/^	unsigned int	fear;		\/* 0x44 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
fear	drivers/net/ftmac110.h	/^	uint32_t fear;   \/* 0x38: Feature Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
feature	include/faraday/ftsdc010.h	/^	unsigned int	feature;	\/* 0x44 - feature reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
feature	include/faraday/ftsdc010.h	/^	unsigned int	feature;	\/* 0x9c - feature reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
feature	include/libata.h	/^	u8			feature;$/;"	m	struct:ata_taskfile	typeref:typename:u8
feature_addr	drivers/block/pata_bfin.h	/^	unsigned long feature_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
feature_addr	drivers/block/sata_dwc.h	/^	void __iomem		*feature_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
feature_addr	drivers/block/sata_sil3114.h	/^	unsigned long feature_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
feature_compatibility	include/ext_common.h	/^	__le32 feature_compatibility;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
feature_flags	board/egnite/ethernut5/ethernut5_pwrman.c	/^static int feature_flags(char * const names[], int num, u8 *flags)$/;"	f	typeref:typename:int	file:
feature_flags	include/smbios.h	/^	u8 feature_flags;$/;"	m	struct:smbios_type2	typeref:typename:u8
feature_incompat	include/ext_common.h	/^	__le32 feature_incompat;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
feature_is_dev_remote_wakeup	drivers/usb/gadget/atmel_usba_udc.c	/^static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)$/;"	f	typeref:typename:bool	file:
feature_is_dev_test_mode	drivers/usb/gadget/atmel_usba_udc.c	/^static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)$/;"	f	typeref:typename:bool	file:
feature_is_ep_halt	drivers/usb/gadget/atmel_usba_udc.c	/^static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)$/;"	f	typeref:typename:bool	file:
feature_pads	board/bachmann/ot1200/ot1200.c	/^static iomux_v3_cfg_t const feature_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
feature_ro_compat	include/ext_common.h	/^	__le32 feature_ro_compat;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
feature_support	include/edid.h	/^	unsigned char feature_support;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
features	board/kosagi/novena/novena.c	/^	uint16_t	features;$/;"	m	struct:novena_eeprom_data	typeref:typename:uint16_t	file:
features	drivers/qe/uec_phy.h	/^	u32 features;$/;"	m	struct:phy_info	typeref:typename:u32
features	include/cpu.h	/^	ulong features;$/;"	m	struct:cpu_info	typeref:typename:ulong
features	include/fis.h	/^	u8 features;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
features	include/gdsys_fpga.h	/^	u16 features;$/;"	m	struct:ihs_osd	typeref:typename:u16
features	include/linux/ethtool.h	/^	struct ethtool_get_features_block features[0];$/;"	m	struct:ethtool_gfeatures	typeref:struct:ethtool_get_features_block[0]
features	include/linux/ethtool.h	/^	struct ethtool_set_features_block features[0];$/;"	m	struct:ethtool_sfeatures	typeref:struct:ethtool_set_features_block[0]
features	include/linux/mtd/nand.h	/^	__le16 features;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
features	include/linux/mtd/nand.h	/^	__le16 features;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
features	include/phy.h	/^	u32 features;$/;"	m	struct:phy_driver	typeref:typename:u32
features_exp	include/fis.h	/^	u8 features_exp;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
fec	arch/arm/dts/imx6qdl.dtsi	/^			fec: ethernet@02188000 {$/;"	l
fec	arch/m68k/include/asm/fec.h	/^typedef struct fec {$/;"	s
fec	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct fec {$/;"	s
fec	arch/powerpc/include/asm/immap_512x.h	/^	fec512x_t		fec;		\/* Fast Ethernet Controller *\/$/;"	m	struct:immap	typeref:typename:fec512x_t
fec1	arch/arm/dts/imx6ull.dtsi	/^			fec1: ethernet@02188000 {$/;"	l	label:aips2
fec1_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const fec1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec1_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const fec1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec1_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const fec1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec1_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const fec1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec1_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const fec1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec2	arch/arm/dts/imx6ull.dtsi	/^			fec2: ethernet@020b4000 {$/;"	l
fec2_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static iomux_v3_cfg_t const fec2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec2_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const fec2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct fec512x {$/;"	s
fec512x_miiphy_read	drivers/net/mpc512x_fec.c	/^int fec512x_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,$/;"	f	typeref:typename:int
fec512x_miiphy_write	drivers/net/mpc512x_fec.c	/^int fec512x_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,$/;"	f	typeref:typename:int
fec512x_t	arch/powerpc/include/asm/immap_512x.h	/^} fec512x_t;$/;"	t	typeref:struct:fec512x
fec5xxx_miiphy_read	drivers/net/mpc5xxx_fec.c	/^int fec5xxx_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,$/;"	f	typeref:typename:int
fec5xxx_miiphy_write	drivers/net/mpc5xxx_fec.c	/^int fec5xxx_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,$/;"	f	typeref:typename:int
fec8xx_miiphy_read	arch/powerpc/cpu/mpc8xx/fec.c	/^int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int
fec8xx_miiphy_write	arch/powerpc/cpu/mpc8xx/fec.c	/^int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int
fec_100Mbps	arch/powerpc/cpu/mpc8xx/fec.c	/^static inline void fec_100Mbps(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fec_10Mbps	arch/powerpc/cpu/mpc8xx/fec.c	/^static inline void fec_10Mbps(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fec_addr_high	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	fec_addr_high;		\/* upper 16 bits of station address	*\/$/;"	m	struct:fec	typeref:typename:ushort
fec_addr_low	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_addr_low;		\/* lower 32 bits of station address	*\/$/;"	m	struct:fec	typeref:typename:uint
fec_alloc_descs	drivers/net/fec_mxc.c	/^static int fec_alloc_descs(struct fec_priv *fec)$/;"	f	typeref:typename:int	file:
fec_bd	drivers/net/fec_mxc.h	/^struct fec_bd {$/;"	s
fec_ecntrl	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_ecntrl;		\/* ethernet control register		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_free_descs	drivers/net/fec_mxc.c	/^static void fec_free_descs(struct fec_priv *fec)$/;"	f	typeref:typename:void	file:
fec_full_duplex	arch/powerpc/cpu/mpc8xx/fec.c	/^static inline void fec_full_duplex(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fec_fun_code	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_fun_code;		\/* fec SDMA function code		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_get_hwaddr	drivers/net/fec_mxc.c	/^static int fec_get_hwaddr(struct eth_device *dev, int dev_id,$/;"	f	typeref:typename:int	file:
fec_get_mac_from_register	board/technologic/ts4800/ts4800.c	/^static int fec_get_mac_from_register(uint32_t base_addr)$/;"	f	typeref:typename:int	file:
fec_get_miibus	drivers/net/fec_mxc.c	/^struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id)$/;"	f	typeref:struct:mii_dev *
fec_h	arch/m68k/include/asm/fec.h	/^#define	fec_h$/;"	d
fec_half_duplex	arch/powerpc/cpu/mpc8xx/fec.c	/^static inline void fec_half_duplex(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fec_halt	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static void fec_halt(struct eth_device* dev)$/;"	f	typeref:typename:void	file:
fec_halt	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static void fec_halt(struct eth_device* dev)$/;"	f	typeref:typename:void	file:
fec_halt	arch/powerpc/cpu/mpc8xx/fec.c	/^static void fec_halt(struct eth_device* dev)$/;"	f	typeref:typename:void	file:
fec_halt	drivers/net/fec_mxc.c	/^static void fec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fec_halt	drivers/net/fsl_mcdmafec.c	/^static void fec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fec_halt	drivers/net/mcffec.c	/^void fec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void
fec_hash_table_high	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_hash_table_high;	\/* upper 32-bits of hash table		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_hash_table_low	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_hash_table_low;	\/* lower 32-bits of hash table		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_id	arch/powerpc/include/asm/immap_512x.h	/^	u32	fec_id;		\/* FEC_ID register *\/$/;"	m	struct:fec512x	typeref:typename:u32
fec_id	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 fec_id;			\/* MBAR_ETH + 0x000 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
fec_ievent	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_ievent;		\/* interrupt event register		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_imask	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_imask;		\/* interrupt mask register		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_info	drivers/net/fsl_mcdmafec.c	/^struct fec_info_dma fec_info[] = {$/;"	v	typeref:struct:fec_info_dma[]
fec_info	drivers/net/mcffec.c	/^struct fec_info_s fec_info[] = {$/;"	v	typeref:struct:fec_info_s[]
fec_info_dma	arch/m68k/include/asm/fsl_mcdmafec.h	/^struct fec_info_dma {$/;"	s
fec_info_s	arch/m68k/include/asm/fec.h	/^struct fec_info_s {$/;"	s
fec_init	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static int fec_init(struct eth_device* dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
fec_init	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static int fec_init(struct eth_device* dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
fec_init	arch/powerpc/cpu/mpc8xx/fec.c	/^static int fec_init (struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int	file:
fec_init	drivers/net/fec_mxc.c	/^static int fec_init(struct eth_device *dev, bd_t* bd)$/;"	f	typeref:typename:int	file:
fec_init	drivers/net/fsl_mcdmafec.c	/^static int fec_init(struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int	file:
fec_init	drivers/net/mcffec.c	/^int fec_init(struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int
fec_initialize	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^int fec_initialize(bd_t *bis)$/;"	f	typeref:typename:int
fec_initialize	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^int fec_initialize(bd_t *bis)$/;"	f	typeref:typename:int
fec_initialize	arch/powerpc/cpu/mpc8xx/fec.c	/^int fec_initialize(bd_t *bis)$/;"	f	typeref:typename:int
fec_ivec	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_ivec;		\/* interrupt level and vector status	*\/$/;"	m	struct:fec	typeref:typename:uint
fec_lcd	arch/powerpc/include/asm/8xx_immap.h	/^union fec_lcd {$/;"	u
fec_mdio_read	drivers/net/fec_mxc.c	/^static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr,$/;"	f	typeref:typename:int	file:
fec_mdio_write	drivers/net/fec_mxc.c	/^static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr,$/;"	f	typeref:typename:int	file:
fec_mii_data	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_mii_data;		\/* MII data register			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_mii_setspeed	drivers/net/fec_mxc.c	/^static void fec_mii_setspeed(struct ethernet_regs *eth)$/;"	f	typeref:typename:void	file:
fec_mii_speed	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_mii_speed;		\/* MII speed control register		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_open	drivers/net/fec_mxc.c	/^static int fec_open(struct eth_device *edev)$/;"	f	typeref:typename:int	file:
fec_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t const fec_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec_pads	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static iomux_v3_cfg_t const fec_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fec_phy_read	drivers/net/fec_mxc.c	/^static int fec_phy_read(struct mii_dev *bus, int phyAddr, int dev_addr,$/;"	f	typeref:typename:int	file:
fec_phy_write	drivers/net/fec_mxc.c	/^static int fec_phy_write(struct mii_dev *bus, int phyAddr, int dev_addr,$/;"	f	typeref:typename:int	file:
fec_pin_init	arch/powerpc/cpu/mpc8xx/fec.c	/^static void fec_pin_init(int fecidx)$/;"	f	typeref:typename:void	file:
fec_priv	drivers/net/fec_mxc.h	/^struct fec_priv {$/;"	s
fec_probe	drivers/net/fec_mxc.c	/^int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,$/;"	f	typeref:typename:int
fec_r_bound	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_bound;		\/* end of RAM (read-only)		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_r_buff_size	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_buff_size;	\/* Rx buffer size			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_r_cntrl	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_cntrl;		\/* Rx control register			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_r_des_active	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_des_active;	\/* Rx ring updated flag			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_r_des_start	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_des_start;	\/* beginning of Rx descriptor ring	*\/$/;"	m	struct:fec	typeref:typename:uint
fec_r_fstart	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_fstart;		\/* Rx FIFO start address		*\/$/;"	m	struct:fec	typeref:typename:uint
fec_r_hash	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_r_hash;		\/* Rx hash register			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_rbd_clean	drivers/net/fec_mxc.c	/^static void fec_rbd_clean(int last, struct fec_bd *pRbd)$/;"	f	typeref:typename:void	file:
fec_rbd_init	drivers/net/fec_mxc.c	/^static void fec_rbd_init(struct fec_priv *fec, int count, int dsize)$/;"	f	typeref:typename:void	file:
fec_recv	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static int fec_recv(struct eth_device* dev)$/;"	f	typeref:typename:int	file:
fec_recv	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static int fec_recv(struct eth_device* dev)$/;"	f	typeref:typename:int	file:
fec_recv	arch/powerpc/cpu/mpc8xx/fec.c	/^static int fec_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
fec_recv	drivers/net/fec_mxc.c	/^static int fec_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
fec_recv	drivers/net/fsl_mcdmafec.c	/^static int fec_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
fec_recv	drivers/net/mcffec.c	/^int fec_recv(struct eth_device *dev)$/;"	f	typeref:typename:int
fec_reg_setup	drivers/net/fec_mxc.c	/^static void fec_reg_setup(struct fec_priv *fec)$/;"	f	typeref:typename:void	file:
fec_reset	arch/powerpc/cpu/mpc8xx/fec.c	/^static int fec_reset(volatile fec_t *fecp)$/;"	f	typeref:typename:int	file:
fec_reset	drivers/net/mcffec.c	/^void fec_reset(struct eth_device *dev)$/;"	f	typeref:typename:void
fec_rx_task_disable	drivers/net/fec_mxc.c	/^static int fec_rx_task_disable(struct fec_priv *fec)$/;"	f	typeref:typename:int	file:
fec_rx_task_enable	drivers/net/fec_mxc.c	/^static int fec_rx_task_enable(struct fec_priv *fec)$/;"	f	typeref:typename:int	file:
fec_send	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static int fec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
fec_send	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static int fec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
fec_send	arch/powerpc/cpu/mpc8xx/fec.c	/^static int fec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
fec_send	drivers/net/fec_mxc.c	/^static int fec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
fec_send	drivers/net/fsl_mcdmafec.c	/^static int fec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
fec_send	drivers/net/mcffec.c	/^static int fec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
fec_set_dev_name	drivers/net/fec_mxc.c	/^static void fec_set_dev_name(char *dest, int dev_id)$/;"	f	typeref:typename:void	file:
fec_set_hwaddr	drivers/net/fec_mxc.c	/^static int fec_set_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
fec_set_hwaddr	drivers/net/fsl_mcdmafec.c	/^static void fec_set_hwaddr(volatile fecdma_t * fecp, u8 * mac)$/;"	f	typeref:typename:void	file:
fec_t	arch/m68k/include/asm/fec.h	/^} fec_t;$/;"	t	typeref:struct:fec
fec_t	arch/powerpc/include/asm/8xx_immap.h	/^} fec_t;$/;"	t	typeref:struct:fec
fec_tbd_init	drivers/net/fec_mxc.c	/^static void fec_tbd_init(struct fec_priv *fec)$/;"	f	typeref:typename:void	file:
fec_tx_task_disable	drivers/net/fec_mxc.c	/^static int fec_tx_task_disable(struct fec_priv *fec)$/;"	f	typeref:typename:int	file:
fec_tx_task_enable	drivers/net/fec_mxc.c	/^static int fec_tx_task_enable(struct fec_priv *fec)$/;"	f	typeref:typename:int	file:
fec_x_cntrl	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_x_cntrl;		\/* Tx control register			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_x_des_active	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_x_des_active;	\/* Tx ring updated flag			*\/$/;"	m	struct:fec	typeref:typename:uint
fec_x_des_start	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_x_des_start;	\/* beginning of Tx descriptor ring	*\/$/;"	m	struct:fec	typeref:typename:uint
fec_x_fstart	arch/powerpc/include/asm/8xx_immap.h	/^	uint	fec_x_fstart;		\/* Tx FIFO start address		*\/$/;"	m	struct:fec	typeref:typename:uint
fecdma	arch/m68k/include/asm/fsl_mcdmafec.h	/^typedef struct fecdma {$/;"	s
fecdma_t	arch/m68k/include/asm/fsl_mcdmafec.h	/^} fecdma_t;$/;"	t	typeref:struct:fecdma
fecmxc_initialize	drivers/net/fec_mxc.c	/^int fecmxc_initialize(bd_t *bd)$/;"	f	typeref:typename:int
fecmxc_initialize_multi	drivers/net/fec_mxc.c	/^int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)$/;"	f	typeref:typename:int
fecmxc_mii_postcall	board/bluegiga/apx4devkit/apx4devkit.c	/^int fecmxc_mii_postcall(int phy)$/;"	f	typeref:typename:int
fecmxc_mii_postcall	board/denx/m28evk/m28evk.c	/^int fecmxc_mii_postcall(int phy)$/;"	f	typeref:typename:int
fecmxc_mii_postcall	board/freescale/mx6qarm2/mx6qarm2.c	/^int fecmxc_mii_postcall(int phy)$/;"	f	typeref:typename:int
fecmxc_register_mii_postcall	drivers/net/fec_mxc.c	/^int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int))$/;"	f	typeref:typename:int
fecp_offset	arch/powerpc/cpu/mpc8xx/fec.c	/^	int fecp_offset;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
fecpin_setclear	arch/m68k/cpu/mcf523x/cpu_init.c	/^int fecpin_setclear(struct eth_device *dev, int setclear)$/;"	f	typeref:typename:int
fecpin_setclear	arch/m68k/cpu/mcf52x2/cpu_init.c	/^int fecpin_setclear(struct eth_device *dev, int setclear)$/;"	f	typeref:typename:int
fecpin_setclear	arch/m68k/cpu/mcf532x/cpu_init.c	/^int fecpin_setclear(struct eth_device *dev, int setclear)$/;"	f	typeref:typename:int
fecpin_setclear	arch/m68k/cpu/mcf5445x/cpu_init.c	/^int fecpin_setclear(struct eth_device *dev, int setclear)$/;"	f	typeref:typename:int
fecpin_setclear	arch/m68k/cpu/mcf547x_8x/cpu_init.c	/^int fecpin_setclear(struct eth_device *dev, int setclear)$/;"	f	typeref:typename:int
fecrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 fecrc;		\/* 0x0FC *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
feed	board/technologic/ts4800/ts4800.h	/^	u16	feed;$/;"	m	struct:ts4800_wtd_regs	typeref:typename:u16
feedback_div	drivers/video/ati_radeon_fb.h	/^	int		feedback_div;$/;"	m	struct:radeon_regs	typeref:typename:int
feedback_div_2	drivers/video/ati_radeon_fb.h	/^	int		feedback_div_2;$/;"	m	struct:radeon_regs	typeref:typename:int
fel_script_address	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t fel_script_address;$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
fel_script_address	arch/arm/include/asm/arch/spl.h	/^	uint32_t fel_script_address;$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
fel_stash	arch/arm/mach-sunxi/board.c	/^struct fel_stash fel_stash __attribute__((section(".data")));$/;"	v	typeref:struct:fel_stash
fel_stash	arch/arm/mach-sunxi/board.c	/^struct fel_stash {$/;"	s	file:
fel_uEnv_length	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t fel_uEnv_length;$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
fel_uEnv_length	arch/arm/include/asm/arch/spl.h	/^	uint32_t fel_uEnv_length;$/;"	m	struct:boot_file_head	typeref:typename:uint32_t
fellsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	fellsr;		\/* 0xD0 Falling \/Low Level Select Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
fen_alec	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_alec;	\/* alignment error counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_alec	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_alec;	\/* alignment error counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_boffcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_boffcnt;	\/* backoff counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_boffcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_boffcnt;	\/* backoff counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_broc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_broc;	\/* Total broadcast packet counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_broc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_broc;	\/* Total broadcast packet counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_cambuf	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_cambuf;	\/* Internal CAM buffer poiner *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_cambuf	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_cambuf;	\/* Internal CAM buffer poiner *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_camptr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_camptr;	\/* CAM address *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_camptr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_camptr;	\/* CAM address *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_cfrange	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_cfrange;	\/* control frame range *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_cfrange	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_cfrange;	\/* control frame range *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_cftype	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_cftype;	\/* control frame type *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_cftype	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_cftype;	\/* control frame type *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_cmask	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_cmask	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_colc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_colc;	\/* Total collision counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_colc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_colc;	\/* Total collision counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_cpres	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_cpres;	\/* Preset CRC *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_cpres	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_cpres;	\/* Preset CRC *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_crcec	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_crcec;	\/* CRC Error counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_crcec	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_crcec;	\/* CRC Error counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_disfc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_disfc;	\/* discard frame counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_disfc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_disfc;	\/* discard frame counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_dmacnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_dmacnt;	\/* internal DMA counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_dmacnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_dmacnt;	\/* internal DMA counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_frgc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_frgc;	\/* Total packets < 64 bytes with errors *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_frgc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_frgc;	\/* Total packets < 64 bytes with errors *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_gaddrh	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_gaddrh;	\/* Group address filter, high 32-bits *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_gaddrh	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_gaddrh;	\/* Group address filter, high 32-bits *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_gaddrl	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_gaddrl;	\/* Group address filter, low 32-bits *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_gaddrl	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_gaddrl;	\/* Group address filter, low 32-bits *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_genfcc	arch/powerpc/include/asm/cpm_8260.h	/^	fccp_t	fen_genfcc;$/;"	m	struct:fcc_enet	typeref:typename:fccp_t
fen_genfcc	arch/powerpc/include/asm/cpm_85xx.h	/^	fccp_t	fen_genfcc;$/;"	m	struct:fcc_enet	typeref:typename:fccp_t
fen_iaddrh	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_iaddrh;	\/* Individual address filter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_iaddrh	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_iaddrh;	\/* Individual address filter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_iaddrl	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_iaddrl;$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_iaddrl	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_iaddrl;$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_ibdbase	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_ibdbase[8]; \/* Internal use *\/$/;"	m	struct:fcc_enet	typeref:typename:uint[8]
fen_ibdbase	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_ibdbase[8]; \/* Internal use *\/$/;"	m	struct:fcc_enet	typeref:typename:uint[8]
fen_ibdcount	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_ibdcount;	\/* Internal BD counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_ibdcount	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_ibdcount;	\/* Internal BD counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_ibdend	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_ibdend;	\/* Internal BD end pointer *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_ibdend	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_ibdend;	\/* Internal BD end pointer *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_ibdstart	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_ibdstart;	\/* Internal BD start pointer *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_idbstart	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_idbstart;	\/* Internal BD start pointer *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_jbrc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_jbrc;	\/* Total packets > 1518 with errors *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_jbrc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_jbrc;	\/* Total packets > 1518 with errors *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_maxb	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_maxb;	\/* maximum BD count *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxb	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_maxb;	\/* maximum BD count *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxd	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_maxd;	\/* internal max DMA count *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxd	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_maxd;	\/* internal max DMA count *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxd1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_maxd1;	\/* Max DMA1 length (1520) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxd1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_maxd1;	\/* Max DMA1 length (1520) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxd2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_maxd2;	\/* Max DMA2 length (1520) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_maxd2	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_maxd2;	\/* Max DMA2 length (1520) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_mflr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_mflr;	\/* Maximum frame length (1518) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_mflr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_mflr;	\/* Maximum frame length (1518) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_minflr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_minflr;	\/* Minimum frame length (64) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_minflr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_minflr;	\/* Minimum frame length (64) *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_mulc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_mulc;	\/* Total multicast packet count *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_mulc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_mulc;	\/* Total multicast packet count *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_octc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_octc;	\/* Total octect counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_octc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_octc;	\/* Total octect counter *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_ospc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_ospc;	\/* Total packets > 1518 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_ospc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_ospc;	\/* Total packets > 1518 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p1024c	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_p1024c;	\/* Total packets 1024 < bytes <= 1518 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p1024c	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_p1024c;	\/* Total packets 1024 < bytes <= 1518 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p128c	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_p128c;	\/* Total packets 127 < bytes <= 255 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p128c	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_p128c;	\/* Total packets 127 < bytes <= 255 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p256c	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_p256c;	\/* Total packets 256 < bytes <= 511 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p256c	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_p256c;	\/* Total packets 256 < bytes <= 511 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p512c	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_p512c;	\/* Total packets 512 < bytes <= 1023 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p512c	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_p512c;	\/* Total packets 512 < bytes <= 1023 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p64c	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_p64c;	\/* Total packets == 64 bytes *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p64c	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_p64c;	\/* Total packets == 64 bytes *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p65c	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_p65c;	\/* Total packets 64 < bytes <= 127 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_p65c	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_p65c;	\/* Total packets 64 < bytes <= 127 *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_paddrh	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_paddrh;	\/* MAC address *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_paddrh	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_paddrh;	\/* MAC address *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_paddrl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_paddrl;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_paddrl	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_paddrl;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_paddrm	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_paddrm;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_paddrm	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_paddrm;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_padptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_padptr;	\/* Pointer to pad byte buffer *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_padptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_padptr;	\/* Pointer to pad byte buffer *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_pper	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_pper;	\/* Persistence *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_pper	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_pper;	\/* Persistence *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_retcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_retcnt;	\/* Retry counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_retcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_retcnt;	\/* Retry counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_retlim	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_retlim;	\/* Retry limit *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_retlim	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_retlim;	\/* Retry limit *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_rfcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_rfcnt;	\/* Received frames count *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_rfcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_rfcnt;	\/* Received frames count *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_rfthr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_rfthr;	\/* Received frames threshold *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_rfthr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_rfthr;	\/* Received frames threshold *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_statbuf	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_statbuf;	\/* Internal status buffer *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_statbuf	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_statbuf;	\/* Internal status buffer *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_taddrh	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_taddrh;	\/* Filter transfer MAC address *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_taddrh	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_taddrh;	\/* Filter transfer MAC address *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_taddrl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_taddrl;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_taddrl	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_taddrl;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_taddrm	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_taddrm;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_taddrm	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_taddrm;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_tfclen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_tfclen;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_tfclen	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_tfclen;$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_tfcptr	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_tfcptr;$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_tfcptr	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_tfcptr;$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_tfcstat	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_tfcstat;	\/* out of sequence TxBD *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_tfcstat	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_tfcstat;	\/* out of sequence TxBD *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_txlen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	fen_txlen;	\/* Internal Tx frame length counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_txlen	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	fen_txlen;	\/* Internal Tx frame length counter *\/$/;"	m	struct:fcc_enet	typeref:typename:ushort
fen_uspc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	fen_uspc;	\/* Total packets < 64 bytes *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fen_uspc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	fen_uspc;	\/* Total packets < 64 bytes *\/$/;"	m	struct:fcc_enet	typeref:typename:uint
fer	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short fer;$/;"	m	struct:gpio_port_s	typeref:typename:unsigned short
fet1	arch/arm/dts/exynos5250-snow.dts	/^					fet1: fet1 {$/;"	l	label:i2c_104
fet1	arch/arm/dts/exynos5250-spring.dts	/^					fet1: fet1 {$/;"	l	label:cros_ec.cros_ec_ldo_tunnel
fet6	arch/arm/dts/exynos5250-snow.dts	/^					fet6: fet6 {$/;"	l	label:i2c_104
fet6	arch/arm/dts/exynos5250-spring.dts	/^					fet6: fet6 {$/;"	l	label:cros_ec.cros_ec_ldo_tunnel
fetch_byte_imm	drivers/bios_emulator/x86emu/decode.c	/^u8 fetch_byte_imm(void)$/;"	f	typeref:typename:u8
fetch_data_byte	drivers/bios_emulator/x86emu/decode.c	/^u8 fetch_data_byte($/;"	f	typeref:typename:u8
fetch_data_byte_abs	drivers/bios_emulator/x86emu/decode.c	/^u8 fetch_data_byte_abs($/;"	f	typeref:typename:u8
fetch_data_long	drivers/bios_emulator/x86emu/decode.c	/^u32 fetch_data_long($/;"	f	typeref:typename:u32
fetch_data_long_abs	drivers/bios_emulator/x86emu/decode.c	/^u32 fetch_data_long_abs($/;"	f	typeref:typename:u32
fetch_data_word	drivers/bios_emulator/x86emu/decode.c	/^u16 fetch_data_word($/;"	f	typeref:typename:u16
fetch_data_word_abs	drivers/bios_emulator/x86emu/decode.c	/^u16 fetch_data_word_abs($/;"	f	typeref:typename:u16
fetch_decode_modrm	drivers/bios_emulator/x86emu/decode.c	/^void fetch_decode_modrm($/;"	f	typeref:typename:void
fetch_long_imm	drivers/bios_emulator/x86emu/decode.c	/^u32 fetch_long_imm(void)$/;"	f	typeref:typename:u32
fetch_word_imm	drivers/bios_emulator/x86emu/decode.c	/^u16 fetch_word_imm(void)$/;"	f	typeref:typename:u16
fevt	drivers/mmc/fsl_esdhc.c	/^	uint    fevt;		\/* Force event register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
ff	arch/x86/cpu/start16.S	/^ff:$/;"	l
ffc	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u8 ffc;		\/* Fabric Frequency Configuration *\/$/;"	m	struct:sar_freq_modes	typeref:typename:u8
ffe_config_state	drivers/net/e1000.h	/^	e1000_ffe_config	ffe_config_state;$/;"	m	struct:e1000_hw	typeref:typename:e1000_ffe_config
ffill	arch/m68k/include/asm/coldfire/ata.h	/^	u8 ffill;		\/* 0x20 *\/$/;"	m	struct:atac	typeref:typename:u8
fflag	tools/imagetool.h	/^	int fflag;$/;"	m	struct:image_tool_params	typeref:typename:int
fflag_handle	tools/imagetool.h	/^	int (*fflag_handle) (struct image_tool_params *);$/;"	m	struct:image_type_params	typeref:typename:int (*)(struct image_tool_params *)
ffs	arch/nios2/include/asm/bitops/ffs.h	/^static inline int ffs(int x)$/;"	f	typeref:typename:int
ffs	arch/openrisc/include/asm/bitops/ffs.h	/^static inline int ffs(int x)$/;"	f	typeref:typename:int
ffs	arch/powerpc/include/asm/bitops.h	/^static __inline__ int ffs(int x)$/;"	f	typeref:typename:int
ffs	arch/sh/include/asm/bitops.h	/^static inline int ffs (int x)$/;"	f	typeref:typename:int
ffs	arch/x86/include/asm/bitops.h	/^static __inline__ int ffs(int x)$/;"	f	typeref:typename:int
ffs	include/linux/bitops.h	/^# define ffs /;"	d
ffs_file_header	arch/x86/include/asm/fsp/fsp_ffs.h	/^struct __packed ffs_file_header {$/;"	s
ffs_file_header2	arch/x86/include/asm/fsp/fsp_ffs.h	/^struct __packed ffs_file_header2 {$/;"	s
ffs_integrity	arch/x86/include/asm/fsp/fsp_ffs.h	/^union __packed ffs_integrity {$/;"	u
ffz	arch/arm/include/asm/bitops.h	/^static inline unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/blackfin/include/asm/bitops.h	/^static __inline__ unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/microblaze/include/asm/bitops.h	/^static inline unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/mips/include/asm/bitops.h	/^static __inline__ unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/nds32/include/asm/bitops.h	/^static inline unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/powerpc/include/asm/bitops.h	/^static __inline__ int ffz(unsigned int x)$/;"	f	typeref:typename:int
ffz	arch/sandbox/include/asm/bitops.h	/^static inline unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/sh/include/asm/bitops.h	/^static inline unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
ffz	arch/x86/include/asm/bitops.h	/^static __inline__ unsigned long ffz(unsigned long word)$/;"	f	typeref:typename:unsigned long
fg	include/power/pmic.h	/^	struct pmic *chrg, *fg, *muic;$/;"	m	struct:power_battery	typeref:struct:pmic *
fg	include/power/pmic.h	/^	struct power_fg *fg;$/;"	m	struct:pmic	typeref:struct:power_fg *
fg	include/video_fb.h	/^    unsigned int fg;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
fg	scripts/kconfig/lxdialog/dialog.h	/^	int fg;		\/* foreground *\/$/;"	m	struct:dialog_color	typeref:typename:int
fg_battery_check	include/power/pmic.h	/^	int (*fg_battery_check) (struct pmic *p, struct pmic *bat);$/;"	m	struct:power_fg	typeref:typename:int (*)(struct pmic * p,struct pmic * bat)
fg_battery_update	include/power/pmic.h	/^	int (*fg_battery_update) (struct pmic *p, struct pmic *bat);$/;"	m	struct:power_fg	typeref:typename:int (*)(struct pmic * p,struct pmic * bat)
fg_color	include/linux/fb.h	/^	__u32 fg_color;			\/* Only used when a mono bitmap *\/$/;"	m	struct:fb_image_user	typeref:typename:__u32
fg_color	include/linux/fb.h	/^	__u32 fg_color;		\/* Only used when a mono bitmap *\/$/;"	m	struct:fb_image	typeref:typename:__u32
fg_csc_type	drivers/video/ipu_disp.c	/^static enum csc_type_t fg_csc_type = CSC_NONE, bg_csc_type = CSC_NONE;$/;"	v	typeref:enum:csc_type_t	file:
fg_pos_async	drivers/video/ipu_regs.h	/^	u32 fg_pos_async;$/;"	m	struct:ipu_com_async	typeref:typename:u32
fg_pos_sync	drivers/video/ipu_regs.h	/^	u32 fg_pos_sync;$/;"	m	struct:ipu_dp	typeref:typename:u32
fg_read_regs	drivers/power/fuel_gauge/fg_max17042.c	/^static int fg_read_regs(struct pmic *p, u8 addr, u16 *data, int num)$/;"	f	typeref:typename:int	file:
fg_write_and_verify	drivers/power/fuel_gauge/fg_max17042.c	/^static int fg_write_and_verify(struct pmic *p, u8 addr, u16 data)$/;"	f	typeref:typename:int	file:
fg_write_regs	drivers/power/fuel_gauge/fg_max17042.c	/^static int fg_write_regs(struct pmic *p, u8 addr, u16 *data, int num)$/;"	f	typeref:typename:int	file:
fgetc	common/console.c	/^int fgetc(int file)$/;"	f	typeref:typename:int
fgx	drivers/video/cfb_console.c	/^static u32 eorx, fgx, bgx;	\/* color pats *\/$/;"	v	typeref:typename:u32	file:
fh_h	drivers/video/mx3fb.c	/^	u32	fh_h:4;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:4	file:
fh_h	drivers/video/mx3fb.c	/^	u32	fh_h:4;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:4	file:
fh_l	drivers/video/mx3fb.c	/^	u32	fh_l:8;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:8	file:
fh_l	drivers/video/mx3fb.c	/^	u32	fh_l:8;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:8	file:
fh_mode	board/micronas/vct/scc.h	/^		u32 fh_mode:1;		\/* Fifo Handler			*\/$/;"	m	struct:scc_dma_cfg::__anon903167320208	typeref:typename:u32:1
fhdr	tools/imximage.h	/^	flash_header_v1_t fhdr;$/;"	m	struct:__anon504a956c0608	typeref:typename:flash_header_v1_t
fhdr	tools/imximage.h	/^	flash_header_v2_t fhdr;$/;"	m	struct:__anon504a956c0d08	typeref:typename:flash_header_v2_t
fibre	include/linux/edd.h	/^		} __attribute__ ((packed)) fibre;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0e08
fic	include/i2s.h	/^	unsigned int fic;	\/* FIFO control register *\/$/;"	m	struct:i2s_reg	typeref:typename:unsigned int
fid	drivers/net/ks8851_mll.c	/^	u8                      fid;$/;"	m	struct:ks_net	typeref:typename:u8	file:
fid_cfg	include/vsc9953.h	/^	u32	fid_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
fid_ext_start_y__fid_ext_offset_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 fid_ext_start_y__fid_ext_offset_y;	\/* 0xA8 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
fid_int_offset_y__fid_ext_start_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 fid_int_offset_y__fid_ext_start_x;	\/* 0xA4 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
fid_int_start_x__fid_int_start_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 fid_int_start_x__fid_int_start_y;	\/* 0xA0 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
fidi	drivers/serial/atmel_usart.h	/^	u32	fidi;$/;"	m	struct:atmel_usart3	typeref:typename:u32
fidr	drivers/i2c/at91_i2c.h	/^	u32 fidr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
fidr	include/pxa_lcd.h	/^	u_long	fidr;		\/* Frame ID register *\/$/;"	m	struct:pxafb_dma_descriptor	typeref:typename:u_long
field	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^	unsigned char	field;		\/* field number *\/$/;"	m	struct:pinmux_config	typeref:typename:unsigned char
field	drivers/usb/host/xhci.h	/^	volatile __le32 field[4];$/;"	m	struct:xhci_generic_trb	typeref:typename:volatile __le32[4]
field	include/bedbug/ppc.h	/^  enum OP_FIELD	field;		\/* The operand identifier from the$/;"	m	struct:operand	typeref:enum:OP_FIELD
field1	arch/powerpc/cpu/mpc512x/ide.c	/^			u8 field1;$/;"	m	struct:ide_preinit::__anond3b5d05a020a::__anond3b5d05a0308	typeref:typename:u8	file:
field2	arch/powerpc/cpu/mpc512x/ide.c	/^			u8 field2;$/;"	m	struct:ide_preinit::__anond3b5d05a020a::__anond3b5d05a0308	typeref:typename:u8	file:
field3	arch/powerpc/cpu/mpc512x/ide.c	/^			u8 field3;$/;"	m	struct:ide_preinit::__anond3b5d05a020a::__anond3b5d05a0308	typeref:typename:u8	file:
field4	arch/powerpc/cpu/mpc512x/ide.c	/^			u8 field4;$/;"	m	struct:ide_preinit::__anond3b5d05a020a::__anond3b5d05a0308	typeref:typename:u8	file:
field_return	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 field_return;$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32
field_sequence	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 field_sequence;		\/* 0x02c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
field_sequence	arch/arm/include/asm/arch/display.h	/^	u32 field_sequence;		\/* 0x02c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
field_valid	include/ata.h	/^	unsigned short	field_valid;	\/* bits 0:cur_ok 1:eide_ok *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
field_width	include/sh_pfc.h	/^	unsigned long reg, reg_width, field_width;$/;"	m	struct:pinmux_cfg_reg	typeref:typename:unsigned long
fields	arch/arc/lib/cache.c	/^		} fields;$/;"	m	union:read_decode_cache_bcr::__anon3b450cc2060a	typeref:struct:read_decode_cache_bcr::__anon3b450cc2060a::__anon3b450cc20708	file:
fields	arch/arc/lib/cache.c	/^		} fields;$/;"	m	union:read_decode_cache_bcr_arcv2::__anon3b450cc2010a	typeref:struct:read_decode_cache_bcr_arcv2::__anon3b450cc2010a::__anon3b450cc20208	file:
fields	arch/arc/lib/cache.c	/^		} fields;$/;"	m	union:read_decode_cache_bcr_arcv2::__anon3b450cc2030a	typeref:struct:read_decode_cache_bcr_arcv2::__anon3b450cc2030a::__anon3b450cc20408	file:
fields	arch/arc/lib/cache.c	/^		} fields;$/;"	m	union:read_decode_cache_bcr_arcv2::__anon3b450cc2050a	typeref:struct:read_decode_cache_bcr_arcv2::__anon3b450cc2050a::bcr_clust_cfg	file:
fields	drivers/net/e1000.h	/^		} fields;$/;"	m	union:e1000_context_desc::__anon7fc27345180a	typeref:struct:e1000_context_desc::__anon7fc27345180a::__anon7fc273451908
fields	drivers/net/e1000.h	/^		} fields;$/;"	m	union:e1000_data_desc::__anon7fc273451c0a	typeref:struct:e1000_data_desc::__anon7fc273451c0a::__anon7fc273451d08
fields	drivers/net/e1000.h	/^		} fields;$/;"	m	union:e1000_tx_desc::__anon7fc27345120a	typeref:struct:e1000_tx_desc::__anon7fc27345120a::__anon7fc273451308
fields	include/bedbug/ppc.h	/^  enum OP_FIELD	fields[MAX_OPERANDS];$/;"	m	struct:opcode	typeref:enum:OP_FIELD[]
fields	include/eeprom_layout.h	/^	struct eeprom_field *fields;$/;"	m	struct:eeprom_layout	typeref:struct:eeprom_field *
fields	include/part_efi.h	/^	} fields;$/;"	m	union:_gpt_entry_attributes	typeref:struct:_gpt_entry_attributes::__anon7effa4980208
fier	drivers/i2c/at91_i2c.h	/^	u32 fier;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
fifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 fifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
fifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 fifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
fifo	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	struct s3c24x0_usb_dev_fifos	fifo[5];$/;"	m	struct:s3c24x0_usb_device	typeref:struct:s3c24x0_usb_dev_fifos[5]
fifo	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 fifo;		\/* 0x100 \/ 0x200 FIFO access address *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
fifo	arch/arm/include/asm/arch/mmc.h	/^	u32 fifo;		\/* 0x100 \/ 0x200 FIFO access address *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
fifo	arch/powerpc/include/asm/immap_512x.h	/^	u32	fifo[256];	\/*  used by FEC, can only be accessed by DMA *\/$/;"	m	struct:fec512x	typeref:typename:u32[256]
fifo	board/esd/pmc440/pmc440.h	/^	struct pmc440_fifo_s fifo[FIFO_COUNT]; \/* 0x0080..0x009f *\/$/;"	m	struct:pmc440_fpga_s	typeref:struct:pmc440_fifo_s[]
fifo	drivers/mmc/arm_pl180_mmci.h	/^	u32 fifo;		\/* 0x80*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
fifo	drivers/mmc/ftsdc010_mci.c	/^	uint32_t fifo;    \/* fifo depth in bytes *\/$/;"	m	struct:ftsdc010_chip	typeref:typename:uint32_t	file:
fifo	drivers/usb/gadget/atmel_usba_udc.h	/^	void					*fifo;$/;"	m	struct:usba_ep	typeref:typename:void *
fifo	drivers/usb/gadget/atmel_usba_udc.h	/^	void *fifo;$/;"	m	struct:usba_udc	typeref:typename:void *
fifo	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 fifo;$/;"	m	struct:ep_fifo	typeref:typename:u32
fifo	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*fifo;$/;"	m	struct:musb_hw_ep	typeref:typename:void __iomem *
fifo	include/input.h	/^	uchar fifo[INPUT_BUFFER_LEN];$/;"	m	struct:input_config	typeref:typename:uchar[]
fifo16	arch/m68k/include/asm/coldfire/ata.h	/^	u16 fifo16;		\/* 0x1C *\/$/;"	m	struct:atac	typeref:typename:u16
fifo32	arch/m68k/include/asm/coldfire/ata.h	/^	u32 fifo32;		\/* 0x18 *\/$/;"	m	struct:atac	typeref:typename:u32
fifo_alarm	drivers/block/mxc_ata.c	/^	u32	fifo_alarm;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
fifo_async	drivers/usb/musb-new/musb_core.h	/^	dma_addr_t		fifo_async;$/;"	m	struct:musb_hw_ep	typeref:typename:dma_addr_t
fifo_bank	drivers/usb/gadget/at91_udc.h	/^	unsigned			fifo_bank:1;$/;"	m	struct:at91_ep	typeref:typename:unsigned:1
fifo_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	fifo_cfg;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
fifo_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	fifo_cfg;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
fifo_cfg	include/linux/usb/musb.h	/^	struct musb_fifo_cfg	*fifo_cfg;	\/* board fifo configuration *\/$/;"	m	struct:musb_hdrc_config	typeref:struct:musb_fifo_cfg *
fifo_cfg_size	include/linux/usb/musb.h	/^	unsigned		fifo_cfg_size;	\/* size of the fifo configuration *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned
fifo_control	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 fifo_control;$/;"	m	struct:i2c_control	typeref:typename:u32
fifo_count	drivers/mmc/arm_pl180_mmci.h	/^	u32 fifo_count;		\/* 0x48*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
fifo_ctrl	drivers/mtd/nand/tegra_nand.h	/^	u32	fifo_ctrl;	\/* offset 3Ch *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
fifo_ctrl	drivers/net/xilinx_ll_temac_fifo.h	/^struct fifo_ctrl {$/;"	s
fifo_data_16	drivers/block/mxc_ata.c	/^	u32	fifo_data_16;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
fifo_data_32	drivers/block/mxc_ata.c	/^	u32	fifo_data_32;	\/* 0x18 *\/$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
fifo_depth	drivers/mmc/rockchip_dw_mmc.c	/^	int fifo_depth;$/;"	m	struct:rockchip_dwmmc_priv	typeref:typename:int	file:
fifo_depth	drivers/net/phy/ti.c	/^	int fifo_depth;$/;"	m	struct:dp83867_private	typeref:typename:int	file:
fifo_depth	drivers/spi/pic32_spi.c	/^	u32			fifo_depth; \/* FIFO depth in bytes *\/$/;"	m	struct:pic32_spi_priv	typeref:typename:u32	file:
fifo_depth	drivers/spi/zynq_qspi.c	/^	u8 fifo_depth;$/;"	m	struct:zynq_qspi_priv	typeref:typename:u8	file:
fifo_depth	drivers/spi/zynq_spi.c	/^	u8 fifo_depth;$/;"	m	struct:zynq_spi_priv	typeref:typename:u8	file:
fifo_double_byte	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	fifo_double_byte;$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32
fifo_fill	drivers/block/mxc_ata.c	/^	u32	fifo_fill;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
fifo_flush	include/linux/usb/gadget.h	/^	void (*fifo_flush) (struct usb_ep *ep);$/;"	m	struct:usb_ep_ops	typeref:typename:void (*)(struct usb_ep * ep)
fifo_id	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 fifo_id;		\/* MBAR_ETH + 0x140 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
fifo_in	include/input.h	/^	int fifo_in, fifo_out;$/;"	m	struct:input_config	typeref:typename:int
fifo_init	arch/powerpc/cpu/mpc512x/serial.c	/^static void fifo_init (volatile psc512x_t *psc)$/;"	f	typeref:typename:void	file:
fifo_len	drivers/spi/designware_spi.c	/^	u32 fifo_len;		\/* depth of the FIFO buffer *\/$/;"	m	struct:dw_spi_priv	typeref:typename:u32	file:
fifo_len	include/faraday/ftsdc010.h	/^	unsigned int fifo_len;		\/* bytes *\/$/;"	m	struct:mmc_host	typeref:typename:unsigned int
fifo_max_depth	include/ec_commands.h	/^	uint8_t fifo_max_depth;$/;"	m	struct:ec_mkbp_config	typeref:typename:uint8_t
fifo_mode	drivers/mmc/rockchip_dw_mmc.c	/^	bool fifo_mode;$/;"	m	struct:rockchip_dwmmc_priv	typeref:typename:bool	file:
fifo_mode	drivers/usb/musb-new/musb_core.c	/^static ushort __devinitdata fifo_mode = 2;$/;"	v	typeref:typename:ushort __devinitdata	file:
fifo_mode	drivers/usb/musb-new/musb_core.c	/^static ushort __devinitdata fifo_mode = 4;$/;"	v	typeref:typename:ushort __devinitdata	file:
fifo_mode	drivers/usb/musb-new/musb_core.c	/^static ushort __devinitdata fifo_mode = 5;$/;"	v	typeref:typename:ushort __devinitdata	file:
fifo_mode	include/dwmmc.h	/^	bool fifo_mode;$/;"	m	struct:dwmci_host	typeref:typename:bool
fifo_n_word	drivers/spi/pic32_spi.c	/^	u32			fifo_n_word; \/* FIFO depth in words *\/$/;"	m	struct:pic32_spi_priv	typeref:typename:u32	file:
fifo_num	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	int fifo_num;$/;"	m	struct:dwc2_ep	typeref:typename:int
fifo_out	include/input.h	/^	int fifo_in, fifo_out;$/;"	m	struct:input_config	typeref:typename:int
fifo_p	include/usb/designware_udc.h	/^	u32 *fifo_p;$/;"	m	struct:udcfifo_regs	typeref:typename:u32 *
fifo_quad_byte	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	fifo_quad_byte;$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32
fifo_reset	drivers/ddr/altera/sequencer.h	/^	u32	fifo_reset;$/;"	m	struct:socfpga_phy_mgr_cmd	typeref:typename:u32
fifo_rx_alarm	arch/powerpc/include/asm/immap_86xx.h	/^	uint    fifo_rx_alarm;  \/* 0x240a8 - FIFO receive alarm threshold register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
fifo_rx_pause	arch/powerpc/include/asm/immap_86xx.h	/^	uint    fifo_rx_pause;  \/* 0x240a4 - FIFO receive pause threshold register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
fifo_setup	drivers/usb/musb-new/musb_core.c	/^fifo_setup(struct musb *musb, struct musb_hw_ep  *hw_ep,$/;"	f	typeref:typename:int __devinit	file:
fifo_single_byte	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	fifo_single_byte;$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32
fifo_size	drivers/spi/exynos_spi.c	/^	unsigned int fifo_size;$/;"	m	struct:exynos_spi_priv	typeref:typename:unsigned int	file:
fifo_size	drivers/usb/gadget/atmel_usba_udc.h	/^	u16					fifo_size;$/;"	m	struct:usba_ep	typeref:typename:u16
fifo_size	drivers/usb/gadget/pxa25x_udc.h	/^	unsigned short				fifo_size;$/;"	m	struct:pxa25x_ep	typeref:typename:unsigned short
fifo_size	include/linux/usb/atmel_usba_udc.h	/^	int fifo_size;$/;"	m	struct:usba_ep_data	typeref:typename:int
fifo_status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 fifo_status;$/;"	m	struct:i2c_control	typeref:typename:u32
fifo_status	drivers/spi/tegra114_spi.c	/^	u32 fifo_status;\/* 014:SPI_FIFO_STATUS register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
fifo_status	drivers/spi/tegra210_qspi.c	/^	u32 fifo_status;\/* 014:QSPI_FIFO_STATUS register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
fifo_status	include/linux/usb/gadget.h	/^	int (*fifo_status) (struct usb_ep *ep);$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep)
fifo_sync	drivers/usb/musb-new/musb_core.h	/^	dma_addr_t		fifo_sync;$/;"	m	struct:musb_hw_ep	typeref:typename:dma_addr_t
fifo_sync_va	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*fifo_sync_va;$/;"	m	struct:musb_hw_ep	typeref:typename:void __iomem *
fifo_to_ep	drivers/usb/gadget/fotg210.c	/^static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in)$/;"	f	typeref:typename:int	file:
fifo_triple_byte	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	fifo_triple_byte;$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32
fifo_tx_starve	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fifo_tx_starve;		\/* FIFO transmit starve *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
fifo_tx_starve	arch/powerpc/include/asm/immap_86xx.h	/^	uint	fifo_tx_starve;	\/* 0x24098 - FIFO transmit starve register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
fifo_tx_starve_shutoff	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fifo_tx_starve_shutoff;	\/* FIFO transmit starve shutoff *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
fifo_tx_starve_shutoff	arch/powerpc/include/asm/immap_86xx.h	/^	uint	fifo_tx_starve_shutoff;\/* 0x2409c - FIFO transmit starve shutoff register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
fifo_tx_thr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fifo_tx_thr;		\/* FIFO transmit threshold *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
fifo_tx_thr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	fifo_tx_thr;	\/* 0x2408c - FIFO transmit threshold register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
fifoc	arch/powerpc/include/asm/immap_512x.h	/^	fifoc512x_t		fifoc;		\/* FIFO Controller *\/$/;"	m	struct:immap	typeref:typename:fifoc512x_t
fifoc512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct fifoc512x {$/;"	s
fifoc512x_t	arch/powerpc/include/asm/immap_512x.h	/^} fifoc512x_t;$/;"	t	typeref:struct:fifoc512x
fifoc_axe	arch/powerpc/include/asm/immap_512x.h	/^	u32 fifoc_axe;$/;"	m	struct:fifoc512x	typeref:typename:u32
fifoc_cmd	arch/powerpc/include/asm/immap_512x.h	/^	u32 fifoc_cmd;$/;"	m	struct:fifoc512x	typeref:typename:u32
fifoc_debug	arch/powerpc/include/asm/immap_512x.h	/^	u32 fifoc_debug;$/;"	m	struct:fifoc512x	typeref:typename:u32
fifoc_dma	arch/powerpc/include/asm/immap_512x.h	/^	u32 fifoc_dma;$/;"	m	struct:fifoc512x	typeref:typename:u32
fifoc_int	arch/powerpc/include/asm/immap_512x.h	/^	u32 fifoc_int;$/;"	m	struct:fifoc512x	typeref:typename:u32
fifocfg	arch/powerpc/include/asm/immap_86xx.h	/^	uint    fifocfg;        \/* 0x24A00 - FIFO interface configuration register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
fifocfg	include/usb/fotg210.h	/^	uint32_t fifocfg; \/* 0x1ac: FIFO Configuration Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
fifocsr	include/usb/fotg210.h	/^	uint32_t fifocsr[4];\/* 0x1b0 - 0x1bf: FIFO Control Status Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[4]
fifoctrl	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	fifoctrl;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
fifoinit	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 fifoinit;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
fifomap	include/usb/fotg210.h	/^	uint32_t fifomap;\/* 0x1a8: FIFO Map Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
fifosize	drivers/usb/musb/musb_core.h	/^	u8	fifosize;$/;"	m	struct:musb_epN_regs	typeref:typename:u8
fifosize	drivers/usb/musb/musb_core.h	/^	u8	fifosize;$/;"	m	struct:musb_regs	typeref:typename:u8
fifoth_val	include/dwmmc.h	/^	u32 fifoth_val;$/;"	m	struct:dwmci_host	typeref:typename:u32
fifothld	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	fifothld;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
fifox	drivers/usb/musb/blackfin_usb.h	/^	u16	fifox[32];$/;"	m	struct:musb_regs	typeref:typename:u16[32]
fifox	drivers/usb/musb/musb_core.h	/^	u32	fifox[16];$/;"	m	struct:musb_regs	typeref:typename:u32[16]
file	arch/x86/include/asm/fsp/fsp_ffs.h	/^		u8	file;$/;"	m	struct:ffs_integrity::__anon07b9b4bf0108	typeref:typename:u8
file	common/cli_hush.c	/^	FILE *file;$/;"	m	struct:in_str	typeref:typename:FILE *	file:
file	fs/ubifs/ubifs.h	/^struct file {$/;"	s
file	include/linux/compiler.h	/^	const char *file;$/;"	m	struct:ftrace_branch_data	typeref:typename:const char *
file	include/qfw.h	/^			char file[BIOS_LINKER_LOADER_FILESZ];$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0408	typeref:typename:char[]
file	include/qfw.h	/^			char file[BIOS_LINKER_LOADER_FILESZ];$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0608	typeref:typename:char[]
file	scripts/kconfig/expr.h	/^	struct file *file;         \/* what file was this property defined *\/$/;"	m	struct:property	typeref:struct:file *
file	scripts/kconfig/expr.h	/^	struct file *file;$/;"	m	struct:menu	typeref:struct:file *
file	scripts/kconfig/expr.h	/^struct file {$/;"	s
file	scripts/kconfig/kxgettext.c	/^	const char *file;$/;"	m	struct:file_line	typeref:typename:const char *	file:
file	scripts/kconfig/zconf.lex.c	/^	struct file *file;$/;"	m	struct:__anonb93376940108	typeref:struct:file *	file:
file	scripts/kconfig/zconf.tab.c	/^	struct file *file;$/;"	m	union:YYSTYPE	typeref:struct:file *	file:
file	tools/kwbimage.c	/^			const char *file;$/;"	m	struct:image_cfg_element::__anon9793d65d020a::__anon9793d65d0308	typeref:typename:const char *	file:
file1	scripts/kconfig/gconf.glade	/^	    <widget class="GtkMenuItem" id="file1">$/;"	i
file1_menu	scripts/kconfig/gconf.glade	/^		<widget class="GtkMenu" id="file1_menu">$/;"	i
file_buf	fs/zfs/zfs.c	/^	char *file_buf;$/;"	m	struct:zfs_data	typeref:typename:char *	file:
file_cache	fs/cbfs/cbfs.c	/^static struct cbfs_cachenode *file_cache;$/;"	v	typeref:struct:cbfs_cachenode *	file:
file_cbfs_error	fs/cbfs/cbfs.c	/^const char *file_cbfs_error(void)$/;"	f	typeref:typename:const char *
file_cbfs_fill_cache	fs/cbfs/cbfs.c	/^static void file_cbfs_fill_cache(u8 *start, u32 size, u32 align)$/;"	f	typeref:typename:void	file:
file_cbfs_find	fs/cbfs/cbfs.c	/^const struct cbfs_cachenode *file_cbfs_find(const char *name)$/;"	f	typeref:typename:const struct cbfs_cachenode *
file_cbfs_find_uncached	fs/cbfs/cbfs.c	/^const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom,$/;"	f	typeref:typename:const struct cbfs_cachenode *
file_cbfs_get_first	fs/cbfs/cbfs.c	/^const struct cbfs_cachenode *file_cbfs_get_first(void)$/;"	f	typeref:typename:const struct cbfs_cachenode *
file_cbfs_get_header	fs/cbfs/cbfs.c	/^const struct cbfs_header *file_cbfs_get_header(void)$/;"	f	typeref:typename:const struct cbfs_header *
file_cbfs_get_next	fs/cbfs/cbfs.c	/^void file_cbfs_get_next(const struct cbfs_cachenode **file)$/;"	f	typeref:typename:void
file_cbfs_init	fs/cbfs/cbfs.c	/^void file_cbfs_init(uintptr_t end_of_rom)$/;"	f	typeref:typename:void
file_cbfs_load_header	fs/cbfs/cbfs.c	/^static int file_cbfs_load_header(uintptr_t end_of_rom,$/;"	f	typeref:typename:int	file:
file_cbfs_name	fs/cbfs/cbfs.c	/^const char *file_cbfs_name(const struct cbfs_cachenode *file)$/;"	f	typeref:typename:const char *
file_cbfs_next_file	fs/cbfs/cbfs.c	/^static int file_cbfs_next_file(u8 *start, u32 size, u32 align,$/;"	f	typeref:typename:int	file:
file_cbfs_read	fs/cbfs/cbfs.c	/^long file_cbfs_read(const struct cbfs_cachenode *file, void *buffer,$/;"	f	typeref:typename:long
file_cbfs_result	fs/cbfs/cbfs.c	/^enum cbfs_result file_cbfs_result;$/;"	v	typeref:enum:cbfs_result
file_cbfs_size	fs/cbfs/cbfs.c	/^u32 file_cbfs_size(const struct cbfs_cachenode *file)$/;"	f	typeref:typename:u32
file_cbfs_type	fs/cbfs/cbfs.c	/^u32 file_cbfs_type(const struct cbfs_cachenode *file)$/;"	f	typeref:typename:u32
file_cd	fs/fat/file.c	/^file_cd(const char *path)$/;"	f	typeref:typename:int
file_cwd	fs/fat/file.c	/^char file_cwd[CWD_LEN+1] = "\/";$/;"	v	typeref:typename:char[]
file_detectfs	fs/fat/file.c	/^file_detectfs(void)$/;"	f	typeref:typename:int
file_detectfs_func	include/fat.h	/^typedef int	(file_detectfs_func)(void);$/;"	t	typeref:typename:int ()(void)
file_end	fs/zfs/zfs.c	/^	uint64_t file_end;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
file_exists	fs/fs.c	/^int file_exists(const char *dev_type, const char *dev_part, const char *file,$/;"	f	typeref:typename:int
file_fat_detectfs	fs/fat/fat.c	/^int file_fat_detectfs(void)$/;"	f	typeref:typename:int
file_fat_detectfs	include/fat.h	/^file_detectfs_func	file_fat_detectfs;$/;"	v	typeref:typename:file_detectfs_func
file_fat_ls	fs/fat/fat.c	/^int file_fat_ls(const char *dir)$/;"	f	typeref:typename:int
file_fat_ls	include/fat.h	/^file_ls_func		file_fat_ls;$/;"	v	typeref:typename:file_ls_func
file_fat_read	fs/fat/fat.c	/^int file_fat_read(const char *filename, void *buffer, int maxsize)$/;"	f	typeref:typename:int
file_fat_read	include/fat.h	/^file_read_func		file_fat_read;$/;"	v	typeref:typename:file_read_func
file_fat_read_at	fs/fat/fat.c	/^int file_fat_read_at(const char *filename, loff_t pos, void *buffer,$/;"	f	typeref:typename:int
file_fat_write	fs/fat/fat_write.c	/^int file_fat_write(const char *filename, void *buffer, loff_t offset,$/;"	f	typeref:typename:int
file_get	common/cli_hush.c	/^static int file_get(struct in_str *i)$/;"	f	typeref:typename:int	file:
file_getfsname	fs/fat/file.c	/^file_getfsname(int idx)$/;"	f	typeref:typename:const char *
file_hdr_sz	include/sparse_format.h	/^  __le16	file_hdr_sz;	\/* 28 bytes for first revision of the file format *\/$/;"	m	struct:sparse_header	typeref:typename:__le16
file_length	common/xyzModem.c	/^  unsigned long file_length, read_length;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned long	file:
file_length	drivers/usb/gadget/storage_common.c	/^	loff_t		file_length;$/;"	m	struct:fsg_lun	typeref:typename:loff_t	file:
file_line	scripts/kconfig/kxgettext.c	/^struct file_line {$/;"	s	file:
file_line__new	scripts/kconfig/kxgettext.c	/^static struct file_line *file_line__new(const char *file, int lineno)$/;"	f	typeref:struct:file_line *	file:
file_list	scripts/kconfig/menu.c	/^struct file *file_list;$/;"	v	typeref:struct:file *
file_lookup	scripts/kconfig/util.c	/^struct file *file_lookup(const char *name)$/;"	f	typeref:struct:file *
file_ls	fs/fat/file.c	/^file_ls(const char *dir)$/;"	f	typeref:typename:int
file_ls_func	include/fat.h	/^typedef int	(file_ls_func)(const char *dir);$/;"	t	typeref:typename:int ()(const char * dir)
file_match_pattern	scripts/get_maintainer.pl	/^sub file_match_pattern {$/;"	s
file_path	include/efi_api.h	/^	void *file_path;$/;"	m	struct:efi_loaded_image	typeref:typename:void *
file_peek	common/cli_hush.c	/^static int file_peek(struct in_str *i)$/;"	f	typeref:typename:int	file:
file_read	fs/fat/file.c	/^int file_read(const char *filename, void *buffer, int maxsize)$/;"	f	typeref:typename:int
file_read_func	include/fat.h	/^typedef int	(file_read_func)(const char *filename, void *buffer,$/;"	t	typeref:typename:int ()(const char * filename,void * buffer,int maxsize)
file_size	drivers/usb/emul/sandbox_flash.c	/^	loff_t file_size;$/;"	m	struct:sandbox_flash_priv	typeref:typename:loff_t	file:
file_size	fs/yaffs2/yaffs_guts.h	/^	loff_t file_size;$/;"	m	struct:yaffs_file_var	typeref:typename:loff_t
file_size	include/bmp_layout.h	/^	__u32	file_size;$/;"	m	struct:bmp_header	typeref:typename:__u32
file_size	tools/imagetool.h	/^	int file_size;		\/* Total size of output file *\/$/;"	m	struct:image_tool_params	typeref:typename:int
file_size_high	fs/yaffs2/yaffs_guts.h	/^	u32 file_size_high;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
file_size_low	fs/yaffs2/yaffs_guts.h	/^	u32 file_size_low;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
file_start	fs/zfs/zfs.c	/^	uint64_t file_start;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
file_sys_header_list	disk/part_amiga.h	/^    u32 file_sys_header_list;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
file_system_type	fs/ubifs/ubifs.h	/^struct file_system_type {$/;"	s
file_variant	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_file_var file_variant;$/;"	m	union:yaffs_obj_var	typeref:struct:yaffs_file_var
file_write_dep	scripts/kconfig/util.c	/^int file_write_dep(const char *name)$/;"	f	typeref:typename:int
filechk_timestamp.h	Makefile	/^define filechk_timestamp.h$/;"	m
filechk_uboot.release	Makefile	/^define filechk_uboot.release$/;"	m
filechk_version.h	Makefile	/^define filechk_version.h$/;"	m
filefh	net/nfs.c	/^static char filefh[NFS3_FHSIZE]; \/* NFSv2 \/ NFSv3 file handle *\/$/;"	v	typeref:typename:char[]	file:
filefh3_length	net/nfs.c	/^static int filefh3_length;	\/* (variable) length of filefh when NFSv3 *\/$/;"	v	typeref:typename:int	file:
fileinfo	fs/reiserfs/reiserfs_private.h	/^  struct fsys_reiser_fileinfo fileinfo;$/;"	m	struct:fsys_reiser_info	typeref:struct:fsys_reiser_fileinfo
filemax	fs/reiserfs/reiserfs.c	/^static unsigned int filepos, filemax;$/;"	v	typeref:typename:unsigned int	file:
filename	drivers/misc/i2c_eeprom_emul.c	/^	const char *filename;$/;"	m	struct:sandbox_i2c_flash_plat_data	typeref:typename:const char *	file:
filename	drivers/mtd/spi/sandbox.c	/^	const char *filename;$/;"	m	struct:sandbox_spi_flash_plat_data	typeref:typename:const char *	file:
filename	drivers/usb/gadget/f_mass_storage.c	/^		const char *filename;$/;"	m	struct:fsg_config::fsg_lun_config	typeref:typename:const char *	file:
filename	include/fpga.h	/^	char *filename;$/;"	m	struct:__anon4d3ae96c0308	typeref:typename:char *
filename	include/sandboxblockdev.h	/^	char *filename;$/;"	m	struct:host_block_dev	typeref:typename:char *
filename	include/spl.h	/^	const char *filename;$/;"	m	struct:spl_load_info	typeref:typename:const char *
filename	include/xyzModem.h	/^    char *filename;$/;"	m	struct:__anon582e218b0108	typeref:typename:char *
filename	scripts/docproc.c	/^	char *filename;$/;"	m	struct:symfile	typeref:typename:char *	file:
filename	scripts/kconfig/mconf.c	/^static char filename[PATH_MAX+1];$/;"	v	typeref:typename:char[]	file:
filename	scripts/kconfig/nconf.c	/^static char filename[PATH_MAX+1];$/;"	v	typeref:typename:char[]	file:
filename	tools/mxsimage.h	/^	char		*filename;$/;"	m	struct:sb_source_entry	typeref:typename:char *
filename_exist	scripts/docproc.c	/^static struct symfile * filename_exist(char * filename)$/;"	f	typeref:struct:symfile *	file:
filepos	board/esd/common/xilinx_jtag/ports.c	/^static int filepos = 0;$/;"	v	typeref:typename:int	file:
filepos	fs/reiserfs/reiserfs.c	/^static unsigned int filepos, filemax;$/;"	v	typeref:typename:unsigned int	file:
files	include/cramfs/cramfs_fs.h	/^	u32 files;$/;"	m	struct:cramfs_info	typeref:typename:u32
files	lib/libfdt/setup.py	/^files = sys.argv[2:]$/;"	v
files	scripts/kconfig/kxgettext.c	/^	struct file_line *files;$/;"	m	struct:message	typeref:struct:file_line *	file:
filesize	test/image/test-fit.py	/^def filesize(fname):$/;"	f
filestruc_ver	disk/part_iso.h	/^	unsigned char filestruc_ver;	\/* file structur version *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char
filestruc_ver	disk/part_iso.h	/^	unsigned char filestruc_ver;	\/* file structur version *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char
filesystem	include/fat.h	/^struct filesystem {$/;"	s
filesystems	fs/fat/file.c	/^static const struct filesystem filesystems[] = {$/;"	v	typeref:typename:const struct filesystem[]	file:
filetype	include/ext_common.h	/^	__u8 filetype;$/;"	m	struct:ext2_dirent	typeref:typename:__u8
fill	drivers/usb/host/ehci.h	/^		uint32_t fill[4];$/;"	m	union:QH::__anond2a9fae8010a	typeref:typename:uint32_t[4]
fill	tools/mxsimage.h	/^	} fill;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960808
fill_555rgb_pswap	drivers/video/cfb_console.c	/^static inline void fill_555rgb_pswap(uchar *fb, int x, u8 r, u8 g, u8 b)$/;"	f	typeref:typename:void	file:
fill_buffer	drivers/serial/usbtty.c	/^static int fill_buffer (circbuf_t * buf)$/;"	f	typeref:typename:int	file:
fill_code_tables	fs/jffs2/mini_inflate.c	/^static void fill_code_tables(struct huffman_set *set)$/;"	f	typeref:typename:void	file:
fill_dentry	fs/fat/fat_write.c	/^static void fill_dentry(fsdata *mydata, dir_entry *dentptr,$/;"	f	typeref:typename:void	file:
fill_dir_slot	fs/fat/fat_write.c	/^fill_dir_slot(fsdata *mydata, dir_entry **dentptr, const char *l_name)$/;"	f	typeref:typename:void	file:
fill_frame	board/bf533-stamp/video.c	/^void fill_frame(char *Frame, int Value)$/;"	f	typeref:typename:void
fill_fs_info	fs/zfs/zfs.c	/^fill_fs_info(struct zfs_dirhook_info *info,$/;"	f	typeref:typename:void	file:
fill_info	drivers/mtd/jedec_flash.c	/^static inline void fill_info(flash_info_t *info, const struct amd_flash_info *jedec_entry, ulong/;"	f	typeref:typename:void	file:
fill_irq_info	arch/x86/cpu/irq.c	/^static inline void fill_irq_info(struct irq_router *priv, struct irq_info *slot,$/;"	f	typeref:typename:void	file:
fill_result_tf	drivers/block/sata_dwc.c	/^static void fill_result_tf(struct ata_queued_cmd *qc)$/;"	f	typeref:typename:void	file:
fill_row	scripts/kconfig/gconf.c	/^static gchar **fill_row(struct menu *menu)$/;"	f	typeref:typename:gchar **	file:
fill_rx	drivers/net/e1000.c	/^fill_rx(struct e1000_hw *hw)$/;"	f	typeref:typename:void
fill_smbios_header	include/smbios.h	/^static inline void fill_smbios_header(void *table, int type,$/;"	f	typeref:typename:void
fill_window	lib/zlib/deflate.c	/^local void fill_window(s)$/;"	f
fill_window	scripts/kconfig/nconf.gui.c	/^void fill_window(WINDOW *win, const char *text)$/;"	f	typeref:typename:void
filldir	fs/ubifs/ubifs.c	/^static int filldir(struct ubifs_info *c, const char *name, int namlen,$/;"	f	typeref:typename:int	file:
filled	include/search.h	/^	unsigned int filled;$/;"	m	struct:hsearch_data	typeref:typename:unsigned int
filler	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^			uint16_t filler;$/;"	m	union:mac_queue::__anon57780116010a::__anon57780116020a	typeref:typename:uint16_t
filler	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^	u32	filler[0x06];$/;"	m	struct:at91_matrix	typeref:typename:u32[0x06]
filler	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^	u32	filler[6];$/;"	m	struct:at91_matrix	typeref:typename:u32[6]
filler	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^	u32	filler[0x06];$/;"	m	struct:at91_matrix	typeref:typename:u32[0x06]
filler	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	filler[3];$/;"	m	struct:at91_matrix	typeref:typename:u32[3]
filler	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^	u32	filler[7];$/;"	m	struct:at91_matrix	typeref:typename:u32[7]
filler	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	filler[5];$/;"	m	struct:at91_matrix	typeref:typename:u32[5]
filler	arch/sparc/include/asm/prom.h	/^	int filler[15];$/;"	m	struct:linux_romvec	typeref:typename:int[15]
filler0	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 filler0, x_reg;$/;"	m	struct:__anon39451e6d0208	typeref:typename:u16
filler0	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 filler0, filler1, h_reg, l_reg;$/;"	m	struct:__anon39451e6d0308	typeref:typename:u8
filler1	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	filler1[2];$/;"	m	struct:at91_matrix	typeref:typename:u32[2]
filler1	board/amcc/luan/epld.h	/^    unsigned char  filler1[4096-8];$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char[]
filler1	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 filler0, filler1, h_reg, l_reg;$/;"	m	struct:__anon39451e6d0308	typeref:typename:u8
filler2	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	filler2;$/;"	m	struct:at91_matrix	typeref:typename:u32
filler2	board/amcc/luan/epld.h	/^    unsigned char  filler2[4096-4];$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char[]
filler3	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	filler3[3];$/;"	m	struct:at91_matrix	typeref:typename:u32[3]
filler4	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	filler4[47];$/;"	m	struct:at91_matrix	typeref:typename:u32[47]
filler4	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	filler4[47];$/;"	m	struct:at91_matrix	typeref:typename:u32[47]
filler5	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	filler5[2];$/;"	m	struct:at91_matrix	typeref:typename:u32[2]
filling	drivers/video/fsl_diu_fb.c	/^	__be32 filling;$/;"	m	struct:diu	typeref:typename:__be32	file:
filonoff	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 filonoff;$/;"	m	struct:rcar_gpio	typeref:typename:u32
filter	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 filter;			\/* 0x00c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
filter	arch/arm/include/asm/arch/display.h	/^	u32 filter;			\/* 0x00c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
filter	drivers/net/pcnet.c	/^	u32 filter[2];$/;"	m	struct:pcnet_init_block	typeref:typename:u32[2]	file:
filter	drivers/usb/gadget/rndis.h	/^	u16			*filter;$/;"	m	struct:rndis_params	typeref:typename:u16 *
filter_end	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 filter_end; \/* 0x44 *\/$/;"	m	struct:scu_regs	typeref:typename:u32
filter_start	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 filter_start; \/* 0x40 *\/$/;"	m	struct:scu_regs	typeref:typename:u32
filtr	drivers/i2c/at91_i2c.h	/^	u32 filtr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
fimc_0	arch/arm/dts/exynos4210.dtsi	/^		fimc_0: fimc@11800000 {$/;"	l
fimc_1	arch/arm/dts/exynos4210.dtsi	/^		fimc_1: fimc@11810000 {$/;"	l
fimc_2	arch/arm/dts/exynos4210.dtsi	/^		fimc_2: fimc@11820000 {$/;"	l
fimc_3	arch/arm/dts/exynos4210.dtsi	/^		fimc_3: fimc@11830000 {$/;"	l
fimr	drivers/i2c/at91_i2c.h	/^	u32 fimr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
fin_freq	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned long fin_freq;$/;"	m	struct:exynos7420_clk_topc_priv	typeref:typename:unsigned long	file:
fin_pll	arch/arm/dts/exynos7420.dtsi	/^	fin_pll: xxti {$/;"	l
finalVal	drivers/bios_emulator/biosemui.h	/^	u32 finalVal;$/;"	m	struct:__anonb186e4ea0308	typeref:typename:u32
final_map	arch/arm/include/asm/arch-fsl-layerscape/cpu.h	/^static struct mm_region final_map[] = {$/;"	v	typeref:struct:mm_region[]
final_mmu_setup	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^static inline void final_mmu_setup(void)$/;"	f	typeref:typename:void	file:
final_printf	common/cli_hush.c	/^#define final_printf /;"	d	file:
findConfigItem	scripts/kconfig/qconf.cc	/^ConfigItem* ConfigList::findConfigItem(struct menu *menu)$/;"	f	class:ConfigList	typeref:typename:ConfigItem *
findRegion	common/dlmalloc.c	/^void* findRegion (void* start_address, unsigned long size)$/;"	f	typeref:typename:void *	file:
find_affine4_roots	lib/bch.c	/^static int find_affine4_roots(struct bch_control *bch, unsigned int a,$/;"	f	typeref:typename:int	file:
find_all_symbols	scripts/docproc.c	/^static void find_all_symbols(char *filename)$/;"	f	typeref:typename:void	file:
find_anchor_wl_entry	drivers/mtd/ubi/fastmap-wl.c	/^static struct ubi_wl_entry *find_anchor_wl_entry(struct rb_root *root)$/;"	f	typeref:struct:ubi_wl_entry *	file:
find_best_divider	arch/arm/mach-tegra/clock.c	/^static int find_best_divider(unsigned divider_bits, unsigned long parent_rate,$/;"	f	typeref:typename:int	file:
find_bestub	fs/zfs/zfs.c	/^static uberblock_t *find_bestub(char *ub_array, struct zfs_data *data)$/;"	f	typeref:typename:uberblock_t *	file:
find_blocks	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^find_blocks:$/;"	l
find_caller_by_offset	tools/proftool.c	/^static struct func_info *find_caller_by_offset(uint32_t offset)$/;"	f	typeref:struct:func_info *	file:
find_char_or_comment	cmd/ini.c	/^static char *find_char_or_comment(const char *s, char c)$/;"	f	typeref:typename:char *	file:
find_child_devnum	drivers/usb/host/usb-uclass.c	/^static struct usb_device *find_child_devnum(struct udevice *parent, int devnum)$/;"	f	typeref:struct:usb_device *	file:
find_cmd	common/command.c	/^cmd_tbl_t *find_cmd(const char *cmd)$/;"	f	typeref:typename:cmd_tbl_t *
find_cmd_tbl	common/command.c	/^cmd_tbl_t *find_cmd_tbl(const char *cmd, cmd_tbl_t *table, int table_len)$/;"	f	typeref:typename:cmd_tbl_t *
find_common_prefix	common/command.c	/^static int find_common_prefix(char * const argv[])$/;"	f	typeref:typename:int	file:
find_cpu_by_apic_id	arch/x86/cpu/mp_init.c	/^static int find_cpu_by_apic_id(int apic_id, struct udevice **devp)$/;"	f	typeref:typename:int	file:
find_descriptor	drivers/usb/emul/usb-emul-uclass.c	/^static struct usb_generic_descriptor **find_descriptor($/;"	f	typeref:struct:usb_generic_descriptor **	file:
find_dev_and_part	cmd/mtdparts.c	/^int find_dev_and_part(const char *id, struct mtd_device **dev,$/;"	f	typeref:typename:int
find_dir_depth	fs/ext4/ext4_common.c	/^static int find_dir_depth(char *dirname)$/;"	f	typeref:typename:int	file:
find_directory_entry	fs/fat/fat_write.c	/^static dir_entry *find_directory_entry(fsdata *mydata, int startsect,$/;"	f	typeref:typename:dir_entry *	file:
find_emc_tables	arch/arm/mach-tegra/tegra20/emc.c	/^static int find_emc_tables(const void *blob, int node, int ram_code)$/;"	f	typeref:typename:int	file:
find_empty	include/bedbug/type.h	/^	int (*find_empty) (void);$/;"	m	struct:__anon3619a6480108	typeref:typename:int (*)(void)
find_empty_cluster	fs/fat/fat_write.c	/^static int find_empty_cluster(fsdata *mydata)$/;"	f	typeref:typename:int	file:
find_ending_index	scripts/get_maintainer.pl	/^sub find_ending_index {$/;"	s
find_env_callback	common/env_callback.c	/^static struct env_clbk_tbl *find_env_callback(const char *name)$/;"	f	typeref:struct:env_clbk_tbl *	file:
find_ep	drivers/usb/gadget/epautoconf.c	/^find_ep(struct usb_gadget *gadget, const char *name)$/;"	f	typeref:struct:usb_ep *	file:
find_export_symbols	scripts/docproc.c	/^static void find_export_symbols(char * filename)$/;"	f	typeref:typename:void	file:
find_fd	tools/ifdtool.c	/^static struct fdbar_t *find_fd(char *image, int size)$/;"	f	typeref:struct:fdbar_t *	file:
find_first_mmc_device	arch/arm/mach-uniphier/boot-mode/boot-mode.c	/^static int find_first_mmc_device(void)$/;"	f	typeref:typename:int	file:
find_first_section	scripts/get_maintainer.pl	/^sub find_first_section {$/;"	s
find_first_zero_bit	arch/arm/include/asm/bitops.h	/^#define find_first_zero_bit(/;"	d
find_first_zero_bit	arch/blackfin/include/asm/bitops.h	/^#define	find_first_zero_bit(/;"	d
find_first_zero_bit	arch/microblaze/include/asm/bitops.h	/^#define find_first_zero_bit(/;"	d
find_first_zero_bit	arch/mips/include/asm/bitops.h	/^#define find_first_zero_bit(/;"	d
find_first_zero_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int find_first_zero_bit (void *addr, unsigned size)$/;"	f	typeref:typename:int
find_first_zero_bit	arch/powerpc/include/asm/bitops.h	/^#define find_first_zero_bit(/;"	d
find_first_zero_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int find_first_zero_bit(void * addr, unsigned size)$/;"	f	typeref:typename:int
find_free_tlbcam	arch/powerpc/cpu/mpc85xx/tlb.c	/^int find_free_tlbcam(void)$/;"	f	typeref:typename:int
find_fsp_header	arch/x86/lib/fsp/fsp_support.c	/^struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void)$/;"	f	typeref:struct:fsp_header *
find_fsp_header_ret	arch/x86/lib/fsp/fsp_car.S	/^find_fsp_header_ret:$/;"	l
find_fsp_header_romstack	arch/x86/lib/fsp/fsp_car.S	/^find_fsp_header_romstack:$/;"	l
find_full_id_nand	drivers/mtd/nand/nand_base.c	/^static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:bool	file:
find_func_by_offset	tools/proftool.c	/^static struct func_info *find_func_by_offset(uint32_t offset)$/;"	f	typeref:struct:func_info *	file:
find_hose_by_cfg_addr	drivers/pci/pci.c	/^struct pci_controller *find_hose_by_cfg_addr(void *cfg_addr)$/;"	f	typeref:struct:pci_controller *
find_host_device	drivers/block/sandbox.c	/^static struct host_block_dev *find_host_device(int dev)$/;"	f	typeref:struct:host_block_dev *	file:
find_ino	fs/ubifs/recovery.c	/^static struct size_entry *find_ino(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:struct:size_entry *	file:
find_ir_chip_on_i2c	board/freescale/common/vid.c	/^static int find_ir_chip_on_i2c(void)$/;"	f	typeref:typename:int	file:
find_key	board/gdsys/p1022/controlcenterd-id.c	/^static int find_key(const uint8_t auth[20], const uint8_t pubkey_digest[20],$/;"	f	typeref:typename:int	file:
find_law	arch/powerpc/cpu/mpc8xxx/law.c	/^struct law_entry find_law(phys_addr_t addr)$/;"	f	typeref:struct:law_entry
find_matching	test/image/test-fit.py	/^def find_matching(text, match):$/;"	f
find_max	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static uint64_t find_max(uint64_t arr[], int num)$/;"	f	typeref:typename:uint64_t	file:
find_mean_wl_entry	drivers/mtd/ubi/wl.c	/^static struct ubi_wl_entry *find_mean_wl_entry(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_wl_entry *	file:
find_min	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static uint64_t find_min(uint64_t arr[], int num)$/;"	f	typeref:typename:uint64_t	file:
find_mmc_device	drivers/mmc/mmc-uclass.c	/^struct mmc *find_mmc_device(int dev_num)$/;"	f	typeref:struct:mmc *
find_mmc_device	drivers/mmc/mmc_legacy.c	/^struct mmc *find_mmc_device(int dev_num)$/;"	f	typeref:struct:mmc *
find_next_address	common/bedbug.c	/^int find_next_address (unsigned char *nextaddr, int step_over,$/;"	f	typeref:typename:int
find_next_mrc_cache	arch/x86/lib/mrccache.c	/^static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,$/;"	f	typeref:struct:mrc_data_container *	file:
find_next_zero_bit	arch/arm/include/asm/bitops.h	/^static inline int find_next_zero_bit(void *addr, int size, int offset)$/;"	f	typeref:typename:int
find_next_zero_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int find_next_zero_bit(void *addr, int size, int offset)$/;"	f	typeref:typename:int
find_next_zero_bit	arch/microblaze/include/asm/bitops.h	/^static inline int find_next_zero_bit(void *addr, int size, int offset)$/;"	f	typeref:typename:int
find_next_zero_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int find_next_zero_bit (void * addr, int size, int offset)$/;"	f	typeref:typename:int
find_next_zero_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int find_next_zero_bit(void *addr, int size, int offset)$/;"	f	typeref:typename:int
find_next_zero_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ unsigned long find_next_zero_bit(void * addr,$/;"	f	typeref:typename:unsigned long
find_next_zero_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int find_next_zero_bit (void * addr, int size, int offset)$/;"	f	typeref:typename:int
find_opcode	common/bedbug.c	/^struct opcode *find_opcode (unsigned long instr)$/;"	f	typeref:struct:opcode *
find_opcode_by_name	common/bedbug.c	/^struct opcode *find_opcode_by_name (char *name)$/;"	f	typeref:struct:opcode *
find_partition	disk/part_amiga.c	/^static struct partition_block *find_partition(struct blk_desc *dev_desc,$/;"	f	typeref:struct:partition_block *	file:
find_poly_deg1_roots	lib/bch.c	/^static int find_poly_deg1_roots(struct bch_control *bch, struct gf_poly *poly,$/;"	f	typeref:typename:int	file:
find_poly_deg2_roots	lib/bch.c	/^static int find_poly_deg2_roots(struct bch_control *bch, struct gf_poly *poly,$/;"	f	typeref:typename:int	file:
find_poly_deg3_roots	lib/bch.c	/^static int find_poly_deg3_roots(struct bch_control *bch, struct gf_poly *poly,$/;"	f	typeref:typename:int	file:
find_poly_deg4_roots	lib/bch.c	/^static int find_poly_deg4_roots(struct bch_control *bch, struct gf_poly *poly,$/;"	f	typeref:typename:int	file:
find_poly_roots	lib/bch.c	/^#define find_poly_roots(/;"	d	file:
find_poly_roots	lib/bch.c	/^static int find_poly_roots(struct bch_control *bch, unsigned int k,$/;"	f	typeref:typename:int	file:
find_property	arch/sparc/cpu/leon2/prom.c	/^	struct property *(*find_property) (int node, char *name);$/;"	m	struct:leon_reloc_func	typeref:struct:property * (*)(int node,char * name)	file:
find_property	arch/sparc/cpu/leon2/prom.c	/^static struct property PROM_TEXT *find_property(int node, char *name)$/;"	f	typeref:struct:property PROM_TEXT *	file:
find_property	arch/sparc/cpu/leon3/prom.c	/^	struct property *(*find_property) (int node, char *name);$/;"	m	struct:leon_reloc_func	typeref:struct:property * (*)(int node,char * name)	file:
find_property	arch/sparc/cpu/leon3/prom.c	/^static struct property PROM_TEXT *find_property(int node, char *name)$/;"	f	typeref:struct:property PROM_TEXT *	file:
find_pte	arch/arm/cpu/armv8/cache_v8.c	/^static u64 *find_pte(u64 addr, int level)$/;"	f	typeref:typename:u64 *	file:
find_ram_base	test/py/u_boot_utils.py	/^def find_ram_base(u_boot_console):$/;"	f
find_rising_edge	arch/x86/cpu/quark/mrc_util.c	/^void find_rising_edge(struct mrc_params *mrc_params, uint32_t delay[],$/;"	f	typeref:typename:void
find_sector	drivers/dfu/dfu_sf.c	/^static u64 find_sector(struct dfu_entity *dfu, u64 start, u64 offset)$/;"	f	typeref:typename:u64	file:
find_sector	drivers/mtd/cfi_flash.c	/^static flash_sect_t find_sector (flash_info_t * info, ulong addr)$/;"	f	typeref:typename:flash_sect_t	file:
find_sig_start	arch/arm/cpu/armv7/omap-common/sec-common.c	/^static u32 find_sig_start(char *image, size_t size)$/;"	f	typeref:typename:u32	file:
find_starting_index	scripts/get_maintainer.pl	/^sub find_starting_index {$/;"	s
find_tlb_idx	arch/powerpc/cpu/mpc85xx/tlb.c	/^int find_tlb_idx(void *addr, u8 tlbsel)$/;"	f	typeref:typename:int
find_valid_banks	drivers/mtd/nand/denali.c	/^static void find_valid_banks(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
find_vfifo_failing_read	drivers/ddr/altera/sequencer.c	/^static int find_vfifo_failing_read(const u32 grp)$/;"	f	typeref:typename:int	file:
find_wl_entry	drivers/mtd/ubi/wl.c	/^static struct ubi_wl_entry *find_wl_entry(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_wl_entry *	file:
findall	scripts/docproc.c	/^FILEONLY *findall;$/;"	v	typeref:typename:FILEONLY *
fine_taa_min	include/ddr_spd.h	/^	int8_t fine_taa_min;		\/* 123 Fine offset for tAAmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_taa_min	include/ddr_spd.h	/^	int8_t fine_taa_min;	       \/* 35 Fine offset for tAAmin *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:int8_t
fine_tccdl_min	include/ddr_spd.h	/^	int8_t fine_tccdl_min;		\/* 117 Fine offset for tCCD_Lmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_tck_max	include/ddr_spd.h	/^	int8_t fine_tck_max;		\/* 124 Fine offset for tCKAVGmax *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_tck_min	include/ddr_spd.h	/^	int8_t fine_tck_min;		\/* 125 Fine offset for tCKAVGmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_tck_min	include/ddr_spd.h	/^	int8_t fine_tck_min;	       \/* 34 Fine offset for tCKmin *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:int8_t
fine_trc_min	include/ddr_spd.h	/^	int8_t fine_trc_min;		\/* 120 Fine offset for tRCmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_trc_min	include/ddr_spd.h	/^	int8_t fine_trc_min;	       \/* 38 Fine offset for tRCmin *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:int8_t
fine_trcd_min	include/ddr_spd.h	/^	int8_t fine_trcd_min;		\/* 122 Fine offset for tRCDmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_trcd_min	include/ddr_spd.h	/^	int8_t fine_trcd_min;	       \/* 36 Fine offset for tRCDmin *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:int8_t
fine_trp_min	include/ddr_spd.h	/^	int8_t fine_trp_min;		\/* 121 Fine offset for tRPmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_trp_min	include/ddr_spd.h	/^	int8_t fine_trp_min;	       \/* 37 Fine offset for tRPmin *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:int8_t
fine_trrdl_min	include/ddr_spd.h	/^	int8_t fine_trrdl_min;		\/* 118 Fine offset for tRRD_Lmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
fine_trrds_min	include/ddr_spd.h	/^	int8_t fine_trrds_min;		\/* 119 Fine offset for tRRD_Smin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:int8_t
finger_test	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 finger_test = 0, p_finger_start = 11, p_finger_end = 64,$/;"	v	typeref:typename:u32
fingerprint	tools/mxsboot.c	/^	uint32_t		fingerprint;$/;"	m	struct:mx28_nand_dbbt	typeref:typename:uint32_t	file:
fingerprint	tools/mxsboot.c	/^	uint32_t		fingerprint;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
fini_mmc_for_env	common/env_mmc.c	/^static void fini_mmc_for_env(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
finish	drivers/net/mvpp2.c	/^	bool finish;$/;"	m	struct:mvpp2_prs_shadow	typeref:typename:bool	file:
finish	tools/moveconfig.py	/^    def finish(self, success):$/;"	m	class:Slot
finish_access	drivers/misc/fsl_iim.c	/^static void finish_access(struct fsl_iim *regs, u32 *stat, u32 *err)$/;"	f	typeref:typename:void	file:
finish_access	drivers/misc/mxc_ocotp.c	/^static int finish_access(struct ocotp_regs *regs, const char *caller)$/;"	f	typeref:typename:int	file:
finish_done	lib/zlib/deflate.c	/^    finish_done     \/* finish done, accept no more input or output *\/$/;"	e	enum:__anonaf16f3d10103	file:
finish_init_sh7734	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^finish_init_sh7734:$/;"	l
finish_reply	drivers/usb/gadget/f_mass_storage.c	/^static int finish_reply(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
finish_spiboot	board/renesas/sh7757lcr/sh7757lcr.c	/^static void finish_spiboot(void)$/;"	f	typeref:typename:void	file:
finish_started	lib/zlib/deflate.c	/^    finish_started, \/* finish started, need only more output at next deflate *\/$/;"	e	enum:__anonaf16f3d10103	file:
finish_table	arch/x86/lib/sfi.c	/^static void finish_table(struct table_info *tab, const char *sig, void *entry)$/;"	f	typeref:typename:void	file:
finish_urb	drivers/usb/host/ohci-hcd.c	/^static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)$/;"	f	typeref:typename:void	file:
finished	arch/arm/cpu/armv7/cache_v7_asm.S	/^finished:$/;"	l
finished	arch/arm/cpu/armv7/psci.S	/^finished:$/;"	l
finished	arch/arm/cpu/armv8/cache.S	/^finished:$/;"	l
finished	drivers/usb/host/ohci.h	/^	int finished;$/;"	m	struct:__anone9fd91320108	typeref:typename:int
finttype1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t finttype1;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
finttype2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t finttype2;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
fioclk	drivers/i2c/i2c-uniphier-f.c	/^	unsigned long fioclk;			\/* internal operation clock *\/$/;"	m	struct:uniphier_fi2c_dev	typeref:typename:unsigned long	file:
fips	include/tpm.h	/^	u8	fips;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
fiq	arch/arm/lib/vectors.S	/^fiq:$/;"	l
fiq0	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	fiq0;		\/* 0x00 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
fiq1	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	fiq1;		\/* 0x04 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
fiqentry	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	fiqentry;	\/* 0x10 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
fir	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     fir;            \/* Flash Instruction Register *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
firer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firer;$/;"	m	struct:ccsr_cpm_fcc1_ext	typeref:typename:u32
firer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firer;$/;"	m	struct:ccsr_cpm_fcc2_ext	typeref:typename:u32
firmware1_starting_sector	tools/mxsboot.c	/^	uint32_t		firmware1_starting_sector;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
firmware2_starting_sector	tools/mxsboot.c	/^	uint32_t		firmware2_starting_sector;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
firmware_ctrl	arch/x86/include/asm/acpi_table.h	/^	u32 firmware_ctrl;$/;"	m	struct:acpi_fadt	typeref:typename:u32
firmware_storage_spi	arch/arm/dts/exynos5250-snow.dts	/^		firmware_storage_spi: flash@0 {$/;"	l
firmware_storage_spi	arch/arm/dts/exynos5250-spring.dts	/^		firmware_storage_spi: flash@0 {$/;"	l
firmware_storage_spi	arch/arm/dts/exynos5420-peach-pit.dts	/^		firmware_storage_spi: flash@0 {$/;"	l
firmware_storage_spi	arch/arm/dts/exynos5420-smdk5420.dts	/^		firmware_storage_spi: flash@0 {$/;"	l
firmware_storage_spi	arch/arm/dts/exynos5800-peach-pi.dts	/^		firmware_storage_spi: flash@0 {$/;"	l
firmware_storage_spi	arch/sandbox/dts/sandbox.dts	/^		firmware_storage_spi: flash@0 {$/;"	l
firmware_vendor	lib/efi_loader/efi_boottime.c	/^static uint16_t __efi_runtime_data firmware_vendor[] =$/;"	v	typeref:typename:uint16_t __efi_runtime_data[]	file:
firmware_waking_vector	arch/x86/include/asm/acpi_table.h	/^	u32 firmware_waking_vector;	\/* Firmware waking vector *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
firper	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firper;$/;"	m	struct:ccsr_cpm_fcc1_ext	typeref:typename:u32
firper	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firper;$/;"	m	struct:ccsr_cpm_fcc2_ext	typeref:typename:u32
firsr_h	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firsr_h;$/;"	m	struct:ccsr_cpm_fcc1_ext	typeref:typename:u32
firsr_h	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firsr_h;$/;"	m	struct:ccsr_cpm_fcc2_ext	typeref:typename:u32
firsr_l	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firsr_l;$/;"	m	struct:ccsr_cpm_fcc1_ext	typeref:typename:u32
firsr_l	arch/powerpc/include/asm/immap_85xx.h	/^	u32	firsr_l;$/;"	m	struct:ccsr_cpm_fcc2_ext	typeref:typename:u32
first	cmd/bootmenu.c	/^	struct bootmenu_entry *first;	\/* first menu entry *\/$/;"	m	struct:bootmenu_data	typeref:struct:bootmenu_entry *	file:
first	common/dlmalloc.c	/^#define first(/;"	d	file:
first	drivers/usb/host/ehci-hcd.c	/^	struct QH *first;$/;"	m	struct:int_queue	typeref:struct:QH *	file:
first	include/jffs2/mini_inflate.h	/^	int *first;	 \/* the first code of this bit length *\/$/;"	m	struct:huffman_set	typeref:typename:int *
first	include/linux/list.h	/^	struct hlist_node *first;$/;"	m	struct:hlist_head	typeref:struct:hlist_node *
firstChild	scripts/kconfig/qconf.h	/^	ConfigItem* firstChild() const$/;"	f	class:ConfigItem	typeref:typename:ConfigItem *
firstChild	scripts/kconfig/qconf.h	/^	ConfigItem* firstChild() const$/;"	f	class:ConfigList	typeref:typename:ConfigItem *
first_active_if	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 first_active_if = 0;$/;"	v	typeref:typename:u32
first_alpha	scripts/kconfig/lxdialog/util.c	/^int first_alpha(const char *string, const char *exempt)$/;"	f	typeref:typename:int
first_boot_section_id	tools/mxsimage.h	/^	uint32_t	first_boot_section_id;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint32_t
first_boot_tag_block	tools/mxsimage.h	/^	uint32_t	first_boot_tag_block;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint32_t
first_busno	include/pci.h	/^	int first_busno;$/;"	m	struct:pci_controller	typeref:typename:int
first_call	common/env_callback.c	/^static int first_call = 1;$/;"	v	typeref:typename:int	file:
first_call	common/env_flags.c	/^static int first_call = 1;$/;"	v	typeref:typename:int	file:
first_ctrl	include/fsl_ddr.h	/^	unsigned int first_ctrl;$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:unsigned int
first_data_block	include/ext_common.h	/^	__le32 first_data_block;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
first_dirty_cnode	fs/ubifs/lpt_commit.c	/^static struct ubifs_cnode *first_dirty_cnode(struct ubifs_nnode *nnode)$/;"	f	typeref:struct:ubifs_cnode *	file:
first_free	drivers/video/stb_truetype.h	/^   void   *first_free;$/;"	m	struct:stbtt__hheap	typeref:typename:void *
first_gpio	include/sh_pfc.h	/^	unsigned first_gpio, last_gpio;$/;"	m	struct:pinmux_info	typeref:typename:unsigned
first_init	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			first_init;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
first_inode	include/ext_common.h	/^	__le32 first_inode;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
first_meta_block_group	include/ext_common.h	/^	__le32 first_meta_block_group;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
first_nnode	fs/ubifs/lpt_commit.c	/^static struct ubifs_nnode *first_nnode(struct ubifs_info *c, int *hght)$/;"	f	typeref:struct:ubifs_nnode *	file:
first_node	fs/ext4/ext4_journal.c	/^static int first_node = true;$/;"	v	typeref:typename:int	file:
first_non_ff	fs/ubifs/recovery.c	/^static int first_non_ff(void *buf, int len)$/;"	f	typeref:typename:int	file:
first_pass_bbmap	include/ext4fs.h	/^	uint16_t first_pass_bbmap;$/;"	m	struct:ext_filesystem	typeref:typename:uint16_t
first_pass_ibmap	include/ext4fs.h	/^	uint16_t first_pass_ibmap;$/;"	m	struct:ext_filesystem	typeref:typename:uint16_t
first_qh	drivers/usb/musb-new/musb_host.h	/^static inline struct musb_qh *first_qh(struct list_head *q)$/;"	f	typeref:struct:musb_qh *
first_run	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t first_run;$/;"	m	struct:mrc_params	typeref:typename:uint8_t
first_rx_desc	drivers/net/uli526x.c	/^	struct rx_desc *first_rx_desc;$/;"	m	struct:uli526x_board_info	typeref:struct:rx_desc *	file:
first_rx_desc_dma	drivers/net/uli526x.c	/^	dma_addr_t first_rx_desc_dma;$/;"	m	struct:uli526x_board_info	typeref:typename:dma_addr_t	file:
first_rxq	drivers/net/mvpp2.c	/^	int first_rxq;$/;"	m	struct:buffer_location	typeref:typename:int	file:
first_rxq	drivers/net/mvpp2.c	/^	u8 first_rxq;$/;"	m	struct:mvpp2_port	typeref:typename:u8	file:
first_scan	drivers/input/tegra-kbc.c	/^	unsigned char first_scan;	\/* 1 if this is our first key scan *\/$/;"	m	struct:tegra_kbd_priv	typeref:typename:unsigned char	file:
first_sector_number	tools/mxsboot.c	/^	uint32_t		first_sector_number;$/;"	m	struct:mx28_sd_drive_info	typeref:typename:uint32_t	file:
first_seg	drivers/usb/host/xhci.h	/^	struct xhci_segment	*first_seg;$/;"	m	struct:xhci_ring	typeref:struct:xhci_segment *
first_stage_actions	board/gdsys/p1022/controlcenterd-id.c	/^static int first_stage_actions(void)$/;"	f	typeref:typename:int	file:
first_stage_init	board/gdsys/p1022/controlcenterd-id.c	/^static int first_stage_init(void)$/;"	f	typeref:typename:int	file:
first_ts	scripts/kconfig/zconf.lex.c	/^static int last_ts, first_ts;$/;"	v	typeref:typename:int	file:
first_tx_desc	drivers/net/uli526x.c	/^	struct tx_desc *first_tx_desc;$/;"	m	struct:uli526x_board_info	typeref:struct:tx_desc *	file:
first_tx_desc_dma	drivers/net/uli526x.c	/^	dma_addr_t first_tx_desc_dma;$/;"	m	struct:uli526x_board_info	typeref:typename:dma_addr_t	file:
first_unicode_codepoint_in_range	drivers/video/stb_truetype.h	/^   int first_unicode_codepoint_in_range;  \/\/ if non-zero, then the chars are continuous, and t/;"	m	struct:__anonce392f790408	typeref:typename:int
first_urb	drivers/usb/gadget/core.c	/^struct urb *first_urb (urb_link * hd)$/;"	f	typeref:struct:urb *
first_urb_detached	drivers/usb/gadget/core.c	/^struct urb *first_urb_detached (urb_link * hd)$/;"	f	typeref:struct:urb *
first_urb_link	drivers/usb/gadget/core.c	/^urb_link *first_urb_link (urb_link * hd)$/;"	f	typeref:typename:urb_link *
first_usable_lba	include/part_efi.h	/^	__le64 first_usable_lba;$/;"	m	struct:_gpt_header	typeref:typename:__le64
first_usb_dev_port	test/py/tests/test_dfu.py	/^first_usb_dev_port = None$/;"	v
firstsek_BEpathtab1_BE	disk/part_iso.h	/^	unsigned int firstsek_BEpathtab1_BE; \/* location of first occurrence of big endian type path t/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
firstsek_BEpathtab1_BE	disk/part_iso.h	/^	unsigned int firstsek_BEpathtab1_BE; \/* location of first occurrence of big endian type path t/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
firstsek_BEpathtab2_BE	disk/part_iso.h	/^	unsigned int firstsek_BEpathtab2_BE; \/* location of optional occurrence of big endian type pat/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
firstsek_BEpathtab2_BE	disk/part_iso.h	/^	unsigned int firstsek_BEpathtab2_BE; \/* location of optional occurrence of big endian type pat/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
firstsek_LEpathtab1_LE	disk/part_iso.h	/^	unsigned int firstsek_LEpathtab1_LE; \/* location of first occurrence of little endian type pat/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
firstsek_LEpathtab1_LE	disk/part_iso.h	/^	unsigned int firstsek_LEpathtab1_LE; \/* location of first occurrence of little endian type pat/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
firstsek_LEpathtab2_LE	disk/part_iso.h	/^	unsigned int firstsek_LEpathtab2_LE; \/* location of optional occurrence of little endian type /;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
firstsek_LEpathtab2_LE	disk/part_iso.h	/^	unsigned int firstsek_LEpathtab2_LE; \/* location of optional occurrence of little endian type /;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
fis	drivers/block/sata_sil.h	/^	struct sata_fis_h2d fis;$/;"	m	struct:sil_prb	typeref:struct:sata_fis_h2d
fis_type	include/fis.h	/^	u8 fis_type;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
fis_type	include/fis.h	/^	u8 fis_type;$/;"	m	struct:sata_fis_data	typeref:typename:u8
fis_type	include/fis.h	/^	u8 fis_type;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u8
fis_type	include/fis.h	/^	u8 fis_type;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
fis_type	include/fis.h	/^	u8 fis_type;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
fis_type	include/fis.h	/^	u8 fis_type;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
fit	include/image.h	/^	void *fit;			\/* Pointer to FIT blob *\/$/;"	m	struct:image_sign_info	typeref:typename:void *
fit_add_file_data	tools/fit_image.c	/^static int fit_add_file_data(struct image_tool_params *params, size_t size_inc,$/;"	f	typeref:typename:int	file:
fit_add_verification_data	tools/image-host.c	/^int fit_add_verification_data(const char *keydir, void *keydest, void *fit,$/;"	f	typeref:typename:int
fit_all_image_verify	common/image-fit.c	/^int fit_all_image_verify(const void *fit)$/;"	f	typeref:typename:int
fit_build	tools/fit_image.c	/^static int fit_build(struct image_tool_params *params, const char *fname)$/;"	f	typeref:typename:int	file:
fit_build_fdt	tools/fit_image.c	/^static int fit_build_fdt(struct image_tool_params *params, char *fdt, int size)$/;"	f	typeref:typename:int	file:
fit_calc_size	tools/fit_image.c	/^static int fit_calc_size(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
fit_check_format	common/image-fit.c	/^int fit_check_format(const void *fit)$/;"	f	typeref:typename:int
fit_check_image_types	tools/fit_common.c	/^int fit_check_image_types(uint8_t type)$/;"	f	typeref:typename:int
fit_check_params	tools/fit_image.c	/^static int fit_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
fit_check_sign	tools/image-host.c	/^int fit_check_sign(const void *fit, const void *key)$/;"	f	typeref:typename:int
fit_check_sign-objs	tools/Makefile	/^fit_check_sign-objs   := $(dumpimage-mkimage-objs) fit_check_sign.o$/;"	m
fit_conf_find_compat	common/image-fit.c	/^int fit_conf_find_compat(const void *fit, const void *fdt)$/;"	f	typeref:typename:int
fit_conf_get_node	common/image-fit.c	/^int fit_conf_get_node(const void *fit, const char *conf_uname)$/;"	f	typeref:typename:int
fit_conf_get_prop_node	common/image-fit.c	/^int fit_conf_get_prop_node(const void *fit, int noffset,$/;"	f	typeref:typename:int
fit_conf_print	common/image-fit.c	/^void fit_conf_print(const void *fit, int noffset, const char *p)$/;"	f	typeref:typename:void
fit_config_add_verification_data	tools/image-host.c	/^static int fit_config_add_verification_data(const char *keydir, void *keydest,$/;"	f	typeref:typename:int	file:
fit_config_check_sig	common/image-sig.c	/^int fit_config_check_sig(const void *fit, int noffset, int required_keynode,$/;"	f	typeref:typename:int
fit_config_get_data	tools/image-host.c	/^static int fit_config_get_data(void *fit, int conf_noffset, int noffset,$/;"	f	typeref:typename:int	file:
fit_config_get_hash_list	tools/image-host.c	/^static int fit_config_get_hash_list(void *fit, int conf_noffset,$/;"	f	typeref:typename:int	file:
fit_config_get_image_list	tools/image-host.c	/^static const char *fit_config_get_image_list(void *fit, int noffset,$/;"	f	typeref:typename:const char *	file:
fit_config_process_sig	tools/image-host.c	/^static int fit_config_process_sig(const char *keydir, void *keydest,$/;"	f	typeref:typename:int	file:
fit_config_verify	common/image-sig.c	/^int fit_config_verify(const void *fit, int conf_noffset)$/;"	f	typeref:typename:int
fit_config_verify_required_sigs	common/image-sig.c	/^int fit_config_verify_required_sigs(const void *fit, int conf_noffset,$/;"	f	typeref:typename:int
fit_config_verify_sig	common/image-sig.c	/^static int fit_config_verify_sig(const void *fit, int conf_noffset,$/;"	f	typeref:typename:int	file:
fit_extract_contents	tools/fit_image.c	/^static int fit_extract_contents(void *ptr, struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
fit_extract_data	tools/fit_image.c	/^static int fit_extract_data(struct image_tool_params *params, const char *fname)$/;"	f	typeref:typename:int	file:
fit_get_debug	common/image-fit.c	/^static void fit_get_debug(const void *fit, int noffset,$/;"	f	typeref:typename:void	file:
fit_get_desc	common/image-fit.c	/^int fit_get_desc(const void *fit, int noffset, char **desc)$/;"	f	typeref:typename:int
fit_get_end	common/image-fit.c	/^ulong fit_get_end(const void *fit)$/;"	f	typeref:typename:ulong
fit_get_image_type_property	common/image-fit.c	/^static const char *fit_get_image_type_property(int type)$/;"	f	typeref:typename:const char *	file:
fit_get_name	include/image.h	/^static inline const char *fit_get_name(const void *fit_hdr,$/;"	f	typeref:typename:const char *
fit_get_node_from_config	common/image-fit.c	/^int fit_get_node_from_config(bootm_headers_t *images, const char *prop_name,$/;"	f	typeref:typename:int
fit_get_size	include/image.h	/^static inline ulong fit_get_size(const void *fit)$/;"	f	typeref:typename:ulong
fit_get_subimage_count	common/image-fit.c	/^int fit_get_subimage_count(const void *fit, int images_noffset)$/;"	f	typeref:typename:int
fit_get_timestamp	common/image-fit.c	/^int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp)$/;"	f	typeref:typename:int
fit_handle_file	tools/fit_image.c	/^static int fit_handle_file(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
fit_hdr_fdt	include/image.h	/^	void		*fit_hdr_fdt;	\/* FDT blob FIT image header *\/$/;"	m	struct:bootm_headers	typeref:typename:void *
fit_hdr_os	include/image.h	/^	void		*fit_hdr_os;	\/* os FIT image header *\/$/;"	m	struct:bootm_headers	typeref:typename:void *
fit_hdr_rd	include/image.h	/^	void		*fit_hdr_rd;	\/* init ramdisk FIT image header *\/$/;"	m	struct:bootm_headers	typeref:typename:void *
fit_hdr_setup	include/image.h	/^	void		*fit_hdr_setup;	\/* x86 setup FIT image header *\/$/;"	m	struct:bootm_headers	typeref:typename:void *
fit_image_add_verification_data	tools/image-host.c	/^int fit_image_add_verification_data(const char *keydir, void *keydest,$/;"	f	typeref:typename:int
fit_image_check_arch	common/image-fit.c	/^int fit_image_check_arch(const void *fit, int noffset, uint8_t arch)$/;"	f	typeref:typename:int
fit_image_check_comp	common/image-fit.c	/^int fit_image_check_comp(const void *fit, int noffset, uint8_t comp)$/;"	f	typeref:typename:int
fit_image_check_hash	common/image-fit.c	/^static int fit_image_check_hash(const void *fit, int noffset, const void *data,$/;"	f	typeref:typename:int	file:
fit_image_check_os	common/image-fit.c	/^int fit_image_check_os(const void *fit, int noffset, uint8_t os)$/;"	f	typeref:typename:int
fit_image_check_sig	common/image-sig.c	/^int fit_image_check_sig(const void *fit, int noffset, const void *data,$/;"	f	typeref:typename:int
fit_image_check_target_arch	include/image.h	/^static inline int fit_image_check_target_arch(const void *fdt, int node)$/;"	f	typeref:typename:int
fit_image_check_type	common/image-fit.c	/^int fit_image_check_type(const void *fit, int noffset, uint8_t type)$/;"	f	typeref:typename:int
fit_image_extract	tools/fit_image.c	/^static int fit_image_extract($/;"	f	typeref:typename:int	file:
fit_image_get_address	common/image-fit.c	/^static int fit_image_get_address(const void *fit, int noffset, char *name,$/;"	f	typeref:typename:int	file:
fit_image_get_arch	common/image-fit.c	/^int fit_image_get_arch(const void *fit, int noffset, uint8_t *arch)$/;"	f	typeref:typename:int
fit_image_get_comp	common/image-fit.c	/^int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp)$/;"	f	typeref:typename:int
fit_image_get_data	common/image-fit.c	/^int fit_image_get_data(const void *fit, int noffset,$/;"	f	typeref:typename:int
fit_image_get_entry	common/image-fit.c	/^int fit_image_get_entry(const void *fit, int noffset, ulong *entry)$/;"	f	typeref:typename:int
fit_image_get_load	common/image-fit.c	/^int fit_image_get_load(const void *fit, int noffset, ulong *load)$/;"	f	typeref:typename:int
fit_image_get_node	common/image-fit.c	/^int fit_image_get_node(const void *fit, const char *image_uname)$/;"	f	typeref:typename:int
fit_image_get_os	common/image-fit.c	/^int fit_image_get_os(const void *fit, int noffset, uint8_t *os)$/;"	f	typeref:typename:int
fit_image_get_type	common/image-fit.c	/^int fit_image_get_type(const void *fit, int noffset, uint8_t *type)$/;"	f	typeref:typename:int
fit_image_hash_get_algo	common/image-fit.c	/^int fit_image_hash_get_algo(const void *fit, int noffset, char **algo)$/;"	f	typeref:typename:int
fit_image_hash_get_ignore	common/image-fit.c	/^static int fit_image_hash_get_ignore(const void *fit, int noffset, int *ignore)$/;"	f	typeref:typename:int	file:
fit_image_hash_get_value	common/image-fit.c	/^int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,$/;"	f	typeref:typename:int
fit_image_load	common/image-fit.c	/^int fit_image_load(bootm_headers_t *images, ulong addr,$/;"	f	typeref:typename:int
fit_image_print	common/image-fit.c	/^void fit_image_print(const void *fit, int image_noffset, const char *p)$/;"	f	typeref:typename:void
fit_image_print_data	common/image-fit.c	/^static void fit_image_print_data(const void *fit, int noffset, const char *p,$/;"	f	typeref:typename:void	file:
fit_image_print_verification_data	common/image-fit.c	/^static void fit_image_print_verification_data(const void *fit, int noffset,$/;"	f	typeref:typename:void	file:
fit_image_process_hash	tools/image-host.c	/^static int fit_image_process_hash(void *fit, const char *image_name,$/;"	f	typeref:typename:int	file:
fit_image_process_sig	tools/image-host.c	/^static int fit_image_process_sig(const char *keydir, void *keydest,$/;"	f	typeref:typename:int	file:
fit_image_select	common/image-fit.c	/^static int fit_image_select(const void *fit, int rd_noffset, int verify)$/;"	f	typeref:typename:int	file:
fit_image_setup_sig	tools/image-host.c	/^static int fit_image_setup_sig(struct image_sign_info *info,$/;"	f	typeref:typename:int	file:
fit_image_setup_verify	common/image-sig.c	/^static int fit_image_setup_verify(struct image_sign_info *info,$/;"	f	typeref:typename:int	file:
fit_image_type	tools/imagetool.h	/^	int fit_image_type;	\/* Image type to put into the FIT *\/$/;"	m	struct:image_tool_params	typeref:typename:int
fit_image_verify	common/image-fit.c	/^int fit_image_verify(const void *fit, int image_noffset)$/;"	f	typeref:typename:int
fit_image_verify_required_sigs	common/image-sig.c	/^int fit_image_verify_required_sigs(const void *fit, int image_noffset,$/;"	f	typeref:typename:int
fit_image_verify_sig	common/image-sig.c	/^static int fit_image_verify_sig(const void *fit, int image_noffset,$/;"	f	typeref:typename:int	file:
fit_image_write_sig	tools/image-host.c	/^static int fit_image_write_sig(void *fit, int noffset, uint8_t *value,$/;"	f	typeref:typename:int	file:
fit_import_data	tools/fit_image.c	/^static int fit_import_data(struct image_tool_params *params, const char *fname)$/;"	f	typeref:typename:int	file:
fit_info-objs	tools/Makefile	/^fit_info-objs   := $(dumpimage-mkimage-objs) fit_info.o$/;"	m
fit_load_op	include/image.h	/^enum fit_load_op {$/;"	g
fit_noffset_fdt	include/image.h	/^	int		fit_noffset_fdt;\/* FDT blob subimage node offset *\/$/;"	m	struct:bootm_headers	typeref:typename:int
fit_noffset_os	include/image.h	/^	int		fit_noffset_os;	\/* os subimage node offset *\/$/;"	m	struct:bootm_headers	typeref:typename:int
fit_noffset_rd	include/image.h	/^	int		fit_noffset_rd;	\/* init ramdisk subimage node offset *\/$/;"	m	struct:bootm_headers	typeref:typename:int
fit_noffset_setup	include/image.h	/^	int		fit_noffset_setup;\/* x86 setup subimage node offset *\/$/;"	m	struct:bootm_headers	typeref:typename:int
fit_parse_conf	common/image-fit.c	/^int fit_parse_conf(const char *spec, ulong addr_curr,$/;"	f	typeref:typename:int
fit_parse_spec	common/image-fit.c	/^static int fit_parse_spec(const char *spec, char sepc, ulong addr_curr,$/;"	f	typeref:typename:int	file:
fit_parse_subimage	common/image-fit.c	/^int fit_parse_subimage(const char *spec, ulong addr_curr,$/;"	f	typeref:typename:int
fit_print_contents	common/image-fit.c	/^void fit_print_contents(const void *fit)$/;"	f	typeref:typename:void
fit_ramdisk	tools/imagetool.h	/^	char *fit_ramdisk;	\/* Ramdisk file to include *\/$/;"	m	struct:image_tool_params	typeref:typename:char *
fit_region_make_list	common/image-sig.c	/^struct image_region *fit_region_make_list(const void *fit,$/;"	f	typeref:struct:image_region *
fit_set_hash_value	tools/image-host.c	/^static int fit_set_hash_value(void *fit, int noffset, uint8_t *value,$/;"	f	typeref:typename:int	file:
fit_set_timestamp	common/image-fit.c	/^int fit_set_timestamp(void *fit, int noffset, time_t timestamp)$/;"	f	typeref:typename:int
fit_uname_cfg	include/image.h	/^	const char	*fit_uname_cfg;	\/* configuration node unit name *\/$/;"	m	struct:bootm_headers	typeref:typename:const char *
fit_uname_fdt	include/image.h	/^	const char	*fit_uname_fdt;	\/* FDT blob subimage node unit name *\/$/;"	m	struct:bootm_headers	typeref:typename:const char *
fit_uname_os	include/image.h	/^	const char	*fit_uname_os;	\/* os subimage node unit name *\/$/;"	m	struct:bootm_headers	typeref:typename:const char *
fit_uname_rd	include/image.h	/^	const char	*fit_uname_rd;	\/* init ramdisk subimage node unit name *\/$/;"	m	struct:bootm_headers	typeref:typename:const char *
fit_uname_setup	include/image.h	/^	const char	*fit_uname_setup; \/* x86 setup subimage node name *\/$/;"	m	struct:bootm_headers	typeref:typename:const char *
fit_unsupported	include/image.h	/^#define fit_unsupported(/;"	d
fit_unsupported_reset	include/image.h	/^#define fit_unsupported_reset(/;"	d
fit_verify_header	tools/fit_common.c	/^int fit_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int
fit_write_configs	tools/fit_image.c	/^static void fit_write_configs(struct image_tool_params *params, char *fdt)$/;"	f	typeref:typename:void	file:
fit_write_images	tools/fit_image.c	/^static int fit_write_images(struct image_tool_params *params, char *fdt)$/;"	f	typeref:typename:int	file:
fix	include/linux/fb.h	/^	struct fb_fix_screeninfo fix;	\/* Current fix *\/$/;"	m	struct:fb_info	typeref:struct:fb_fix_screeninfo
fix_devices	drivers/core/root.c	/^void fix_devices(void)$/;"	f	typeref:typename:void
fix_drivers	drivers/core/root.c	/^void fix_drivers(void)$/;"	f	typeref:typename:void
fix_hregs	board/gdsys/p1022/controlcenterd-id.c	/^static struct h_reg fix_hregs[COUNT_FIX_HREGS];$/;"	v	typeref:struct:h_reg[]	file:
fix_relocations	arch/nds32/cpu/n1213/start.S	/^fix_relocations:$/;"	l
fix_size_in_place	fs/ubifs/recovery.c	/^static int fix_size_in_place(struct ubifs_info *c, struct size_entry *e)$/;"	f	typeref:typename:int	file:
fix_start	board/nokia/rx51/lowlevel_init.S	/^fix_start:$/;"	l
fix_uclass	drivers/core/root.c	/^void fix_uclass(void)$/;"	f	typeref:typename:void
fix_unclean_leb	fs/ubifs/recovery.c	/^static int fix_unclean_leb(struct ubifs_info *c, struct ubifs_scan_leb *sleb,$/;"	f	typeref:typename:int	file:
fixed	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^		u32 fixed;	\/* non-zero fixed divider value *\/$/;"	m	union:bcm_clk_div::__anona6938245010a	typeref:typename:u32
fixed	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^		u32 fixed;	\/* non-zero fixed divider value *\/$/;"	m	union:bcm_clk_div::__anone9f7c086010a	typeref:typename:u32
fixed_ddr_parm	include/fsl_ddr_sdram.h	/^typedef struct fixed_ddr_parm{$/;"	s
fixed_ddr_parm_0	board/freescale/bsc9131rdb/ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_0	board/freescale/bsc9132qds/ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_0	board/freescale/corenet_ds/p3041ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_0	board/freescale/corenet_ds/p4080ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_0	board/freescale/corenet_ds/p5020ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_0	board/freescale/corenet_ds/p5040ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_0	board/freescale/p1010rdb/ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_0[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_1	board/freescale/corenet_ds/p4080ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_1[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_1	board/freescale/corenet_ds/p5020ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_1[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_1	board/freescale/corenet_ds/p5040ds_ddr.c	/^fixed_ddr_parm_t fixed_ddr_parm_1[] = {$/;"	v	typeref:typename:fixed_ddr_parm_t[]
fixed_ddr_parm_t	include/fsl_ddr_sdram.h	/^} fixed_ddr_parm_t;$/;"	t	typeref:struct:fixed_ddr_parm
fixed_eq	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t fixed_eq;$/;"	m	struct:usb3_port_setting	typeref:typename:uint8_t
fixed_link	include/phy.h	/^struct fixed_link {$/;"	s
fixed_mfd	arch/arm/cpu/armv7/mx5/clock.c	/^const struct fixed_pll_mfd fixed_mfd[] = {$/;"	v	typeref:typename:const struct fixed_pll_mfd[]
fixed_mtrrs	arch/x86/cpu/mp_init.c	/^static const unsigned int fixed_mtrrs[NUM_FIXED_MTRRS] = {$/;"	v	typeref:typename:const unsigned int[]	file:
fixed_phy_aneg	drivers/qe/uec_phy.c	/^static int fixed_phy_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
fixed_phy_port	drivers/net/4xx_enet.c	/^static const struct fixed_phy_port fixed_phy_port[] = {$/;"	v	typeref:typename:const struct fixed_phy_port[]	file:
fixed_phy_port	drivers/net/4xx_enet.c	/^struct fixed_phy_port {$/;"	s	file:
fixed_phy_port	drivers/qe/uec_phy.c	/^static const struct fixed_phy_port fixed_phy_port[] = {$/;"	v	typeref:typename:const struct fixed_phy_port[]	file:
fixed_phy_port	drivers/qe/uec_phy.c	/^struct fixed_phy_port {$/;"	s	file:
fixed_phy_read_status	drivers/qe/uec_phy.c	/^static int fixed_phy_read_status (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
fixed_pll_mfd	arch/arm/cpu/armv7/mx5/clock.c	/^struct fixed_pll_mfd {$/;"	s	file:
fixed_rate	drivers/clk/clk_fixed_rate.c	/^	unsigned long fixed_rate;$/;"	m	struct:clk_fixed_rate	typeref:typename:unsigned long	file:
fixed_regulator_get_current	drivers/power/regulator/fixed.c	/^static int fixed_regulator_get_current(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fixed_regulator_get_enable	drivers/power/regulator/fixed.c	/^static bool fixed_regulator_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
fixed_regulator_get_value	drivers/power/regulator/fixed.c	/^static int fixed_regulator_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fixed_regulator_ids	drivers/power/regulator/fixed.c	/^static const struct udevice_id fixed_regulator_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
fixed_regulator_ofdata_to_platdata	drivers/power/regulator/fixed.c	/^static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fixed_regulator_ops	drivers/power/regulator/fixed.c	/^static const struct dm_regulator_ops fixed_regulator_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
fixed_regulator_platdata	drivers/power/regulator/fixed.c	/^struct fixed_regulator_platdata {$/;"	s	file:
fixed_regulator_set_enable	drivers/power/regulator/fixed.c	/^static int fixed_regulator_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
fixed_sdram	arch/powerpc/cpu/mpc512x/fixed_sdram.c	/^long int fixed_sdram(ddr512x_config_t *mddrc_config,$/;"	f	typeref:typename:long int
fixed_sdram	board/Arcturus/ucp1020/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/bsc9131rdb/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/bsc9132qds/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/corenet_ds/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8308rdb/sdram.c	/^static long fixed_sdram(void)$/;"	f	typeref:typename:long	file:
fixed_sdram	board/freescale/mpc8313erdb/sdram.c	/^static long fixed_sdram(void)$/;"	f	typeref:typename:long	file:
fixed_sdram	board/freescale/mpc8315erdb/sdram.c	/^static long fixed_sdram(void)$/;"	f	typeref:typename:long	file:
fixed_sdram	board/freescale/mpc8323erdb/mpc8323erdb.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/freescale/mpc832xemds/mpc832xemds.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/freescale/mpc8349emds/mpc8349emds.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/freescale/mpc8349itx/mpc8349itx.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/freescale/mpc837xemds/mpc837xemds.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/freescale/mpc837xerdb/mpc837xerdb.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/freescale/mpc8536ds/mpc8536ds.c	/^phys_size_t fixed_sdram (void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8540ads/mpc8540ads.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8560ads/mpc8560ads.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8569mds/mpc8569mds.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8572ds/mpc8572ds.c	/^phys_size_t fixed_sdram (void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/p1010rdb/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/p1_p2_rdb_pc/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/p1_twr/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/freescale/qemu-ppce500/qemu-ppce500.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/gdsys/mpc8308/sdram.c	/^static long fixed_sdram(void)$/;"	f	typeref:typename:long	file:
fixed_sdram	board/ids/ids8313/ids8313.c	/^int fixed_sdram(unsigned long config)$/;"	f	typeref:typename:int
fixed_sdram	board/keymile/km83xx/km83xx.c	/^static int fixed_sdram(void)$/;"	f	typeref:typename:int	file:
fixed_sdram	board/mpc8308_p1m/sdram.c	/^static long fixed_sdram(void)$/;"	f	typeref:typename:long	file:
fixed_sdram	board/sbc8349/sbc8349.c	/^int fixed_sdram(void)$/;"	f	typeref:typename:int
fixed_sdram	board/sbc8548/ddr.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/sbc8641d/sbc8641d.c	/^long int fixed_sdram (void)$/;"	f	typeref:typename:long int
fixed_sdram	board/socrates/sdram.c	/^phys_size_t fixed_sdram(void)$/;"	f	typeref:typename:phys_size_t
fixed_sdram	board/ve8313/ve8313.c	/^static long fixed_sdram(void)$/;"	f	typeref:typename:long	file:
fixedtables	lib/zlib/inflate.c	/^local void fixedtables(struct inflate_state FAR *state)$/;"	f	typeref:typename:local void
fixloop	arch/arm/lib/relocate.S	/^fixloop:$/;"	l
fixloop	arch/arm/lib/relocate_64.S	/^fixloop:$/;"	l
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:axe512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:bdlc512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:cfm512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:diu512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:gpt512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:ipic512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:mscan512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:pmc512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:rtclk512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:sdhc512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x100];$/;"	m	struct:spdif512x	typeref:typename:u8[0x100]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x1800];$/;"	m	struct:dma512x	typeref:typename:u8[0x1800]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x2000];$/;"	m	struct:sata512x	typeref:typename:u8[0x2000]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x3000];$/;"	m	struct:utmi512x	typeref:typename:u8[0x3000]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x300];$/;"	m	struct:pcidma512x	typeref:typename:u8[0x300]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0x600];$/;"	m	struct:ulpi512x	typeref:typename:u8[0x600]
fixme	arch/powerpc/include/asm/immap_512x.h	/^	u8 fixme[0xEC];$/;"	m	struct:fifoc512x	typeref:typename:u8[0xEC]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x10000];$/;"	m	struct:security83xx	typeref:typename:u8[0x10000]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x1000];$/;"	m	struct:sata83xx	typeref:typename:u8[0x1000]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x1000];$/;"	m	struct:sdhc83xx	typeref:typename:u8[0x1000]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x1000];$/;"	m	struct:tsec83xx	typeref:typename:u8[0x1000]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x1000];$/;"	m	struct:usb83xx	typeref:typename:u8[0x1000]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x2000];$/;"	m	struct:tdmdmac83xx	typeref:typename:u8[0x2000]
fixme	arch/powerpc/include/asm/immap_83xx.h	/^	u8 fixme[0x200];$/;"	m	struct:tdm83xx	typeref:typename:u8[0x200]
fixnext	arch/arm/lib/relocate.S	/^fixnext:$/;"	l
fixnext	arch/arm/lib/relocate_64.S	/^fixnext:$/;"	l
fixture_id	test/py/conftest.py	/^    def fixture_id(index, val):$/;"	f	function:generate_config	file:
fixup	arch/powerpc/lib/extable.c	/^	unsigned long insn, fixup;$/;"	m	struct:exception_table_entry	typeref:typename:unsigned long	file:
fixup_88e1518	board/gdsys/common/phy.c	/^struct mii_setupcmd fixup_88e1518[] = {$/;"	v	typeref:struct:mii_setupcmd[]
fixup_bigphys_addr	arch/mips/include/asm/mach-generic/ioremap.h	/^static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr,$/;"	f	typeref:typename:phys_addr_t
fixup_branch	lib/slre.c	/^fixup_branch(struct slre *r, int fixup)$/;"	f	typeref:typename:void	file:
fixup_cmdtable	common/command.c	/^void fixup_cmdtable(cmd_tbl_t *cmdtp, int size)$/;"	f	typeref:typename:void
fixup_cpu	arch/powerpc/cpu/mpc8xxx/cpu.c	/^int fixup_cpu(void)$/;"	f	typeref:typename:int
fixup_cpu	common/board_r.c	/^__weak int fixup_cpu(void)$/;"	f	typeref:typename:__weak int
fixup_free_space	fs/ubifs/sb.c	/^static int fixup_free_space(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
fixup_got	arch/sparc/cpu/leon2/start.S	/^fixup_got:$/;"	l
fixup_got	arch/sparc/cpu/leon3/start.S	/^fixup_got:$/;"	l
fixup_irq	include/pci.h	/^	void (*fixup_irq)(struct pci_controller *, pci_dev_t);$/;"	m	struct:pci_controller	typeref:typename:void (*)(struct pci_controller *,pci_dev_t)
fixup_leb	fs/ubifs/sb.c	/^static int fixup_leb(struct ubifs_info *c, int lnum, int len)$/;"	f	typeref:typename:int	file:
fixup_rootmenu	scripts/kconfig/gconf.c	/^void fixup_rootmenu(struct menu *menu)$/;"	f	typeref:typename:void
fixup_rootmenu	scripts/kconfig/qconf.cc	/^void fixup_rootmenu(struct menu *menu)$/;"	f	typeref:typename:void
fixup_silent_linux	common/bootm.c	/^static void fixup_silent_linux(void)$/;"	f	typeref:typename:void	file:
fl	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct fl {$/;"	s
fl5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} fl5xx_t;$/;"	t	typeref:struct:fl
fl_cmfctl	arch/powerpc/include/asm/5xx_immap.h	/^	uint fl_cmfctl;$/;"	m	struct:fl	typeref:typename:uint
fl_cmfmcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint fl_cmfmcr;$/;"	m	struct:fl	typeref:typename:uint
fl_cmftst	arch/powerpc/include/asm/5xx_immap.h	/^	uint fl_cmftst;$/;"	m	struct:fl	typeref:typename:uint
fl_un	arch/powerpc/include/asm/8xx_immap.h	/^	union	fec_lcd	fl_un;$/;"	m	struct:comm_proc	typeref:union:fec_lcd
fl_un_cmap	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	fl_un_cmap[0x200];$/;"	m	union:fec_lcd	typeref:typename:u_char[0x200]
fl_un_fec	arch/powerpc/include/asm/8xx_immap.h	/^	fec_t	fl_un_fec;$/;"	m	union:fec_lcd	typeref:typename:fec_t
fladj	include/linux/usb/xhci-omap.h	/^	u32 fladj;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
flag	arch/powerpc/include/asm/iopin_8260.h	/^	u_char flag:1;	\/* for whatever *\/$/;"	m	struct:__anonbeb4a0e80108	typeref:typename:u_char:1
flag	arch/powerpc/include/asm/iopin_8xx.h	/^	u_char flag:1;	\/* for whatever *\/$/;"	m	struct:__anon728a0bc00108	typeref:typename:u_char:1
flag	arch/sandbox/include/asm/getopt.h	/^	const char *flag;$/;"	m	struct:sandbox_cmdline_option	typeref:typename:const char *
flag	cmd/ldrinfo.c	/^	uint16_t flag;$/;"	m	struct:ldr_flag	typeref:typename:uint16_t	file:
flag	common/cli_hush.c	/^	long flag;$/;"	m	struct:reserved_combo	typeref:typename:long	file:
flag	drivers/block/pata_bfin.h	/^	unsigned long flag;$/;"	m	struct:ata_port	typeref:typename:unsigned long
flag	include/dm/test.h	/^	int flag;$/;"	m	struct:dm_test_parent_data	typeref:typename:int
flag	include/linux/fb.h	/^	u32 flag;$/;"	m	struct:fb_videomode	typeref:typename:u32
flag_is_changeable_p	arch/x86/include/asm/cpu.h	/^static inline int flag_is_changeable_p(uint32_t flag)$/;"	f	typeref:typename:int
flag_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int flag_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
flag_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int flag_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
flag_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int flag_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
flag_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int flag_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
flag_repeat	common/cli_hush.c	/^static int flag_repeat = 0;$/;"	v	typeref:typename:int	file:
flag_scheme	tools/env/fw_env.c	/^	enum flag_scheme	flag_scheme;$/;"	m	struct:environment	typeref:enum:flag_scheme	file:
flag_scheme	tools/env/fw_env.c	/^enum flag_scheme {$/;"	g	file:
flag_short	arch/sandbox/include/asm/getopt.h	/^	int flag_short;$/;"	m	struct:sandbox_cmdline_option	typeref:typename:int
flags	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 flags;		\/* BCM_CLK_DIV_FLAGS_* below *\/$/;"	m	struct:bcm_clk_div	typeref:typename:u32
flags	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 flags;		\/* BCM_CLK_GATE_FLAGS_* below *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
flags	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 flags;		\/* BCM_CLK_TRIG_FLAGS_* below *\/$/;"	m	struct:bcm_clk_trig	typeref:typename:u32
flags	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 flags;		\/* BCM_CLK_DIV_FLAGS_* below *\/$/;"	m	struct:bcm_clk_div	typeref:typename:u32
flags	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 flags;		\/* BCM_CLK_GATE_FLAGS_* below *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
flags	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 flags;		\/* BCM_CLK_TRIG_FLAGS_* below *\/$/;"	m	struct:bcm_clk_trig	typeref:typename:u32
flags	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t flags;$/;"	m	struct:serial_i2c_request	typeref:typename:uint16_t
flags	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t flags;$/;"	m	struct:cmd_clk_get_all_info_response	typeref:typename:uint32_t
flags	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t flags;$/;"	m	struct:mrq_request	typeref:typename:uint32_t
flags	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t flags;$/;"	m	struct:mrq_response	typeref:typename:uint32_t
flags	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	enum i2c_transaction_flags flags;$/;"	m	struct:i2c_trans_info	typeref:enum:i2c_transaction_flags
flags	arch/arm/include/asm/imx-common/dma.h	/^	unsigned int		flags;$/;"	m	struct:mxs_dma_desc	typeref:typename:unsigned int
flags	arch/arm/include/asm/imx-common/dma.h	/^	unsigned int flags;$/;"	m	struct:mxs_dma_chan	typeref:typename:unsigned int
flags	arch/arm/include/asm/setup.h	/^	    unsigned long flags;		\/* 12 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
flags	arch/arm/include/asm/setup.h	/^	u32 flags;		\/* bit 0 = read-only *\/$/;"	m	struct:tag_core	typeref:typename:u32
flags	arch/arm/include/asm/setup.h	/^	u32 flags;	\/* bit 0 = load, bit 1 = prompt *\/$/;"	m	struct:tag_ramdisk	typeref:typename:u32
flags	arch/arm/mach-uniphier/init.h	/^	unsigned int flags;$/;"	m	struct:uniphier_board_data	typeref:typename:unsigned int
flags	arch/arm/mach-zynq/clk.c	/^	unsigned int	flags;$/;"	m	struct:clk	typeref:typename:unsigned int	file:
flags	arch/avr32/include/asm/setup.h	/^	u32 flags;$/;"	m	struct:tag_core	typeref:typename:u32
flags	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	unsigned long flags;		\/* for HC bugs *\/$/;"	m	struct:ohci	typeref:typename:unsigned long
flags	arch/nds32/include/asm/setup.h	/^	u32 flags;		\/* bit 0 = read-only *\/$/;"	m	struct:tag_core	typeref:typename:u32
flags	arch/nds32/include/asm/setup.h	/^	u32 flags;	\/* bit 0 = load, bit 1 = prompt *\/$/;"	m	struct:tag_ramdisk	typeref:typename:u32
flags	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	unsigned long flags;		\/* for HC bugs *\/$/;"	m	struct:ohci	typeref:typename:unsigned long
flags	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 flags;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
flags	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 flags;$/;"	m	struct:sdram_timing_clks	typeref:typename:u32	file:
flags	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	unsigned long flags;	\/* for HC bugs *\/$/;"	m	struct:ohci	typeref:typename:unsigned long
flags	arch/powerpc/include/asm/mmu.h	/^	unsigned long flags:12;		\/* Page flags (some unused bits) *\/$/;"	m	struct:_pte	typeref:typename:unsigned long:12
flags	arch/x86/include/asm/acpi_table.h	/^	u16 flags;		\/* MPS INTI flags *\/$/;"	m	struct:acpi_madt_irqoverride	typeref:typename:u16
flags	arch/x86/include/asm/acpi_table.h	/^	u16 flags;		\/* MPS INTI flags *\/$/;"	m	struct:acpi_madt_lapic_nmi	typeref:typename:u16
flags	arch/x86/include/asm/acpi_table.h	/^	u32 flags;			\/* FACS flags *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
flags	arch/x86/include/asm/acpi_table.h	/^	u32 flags;			\/* Multiple APIC flags *\/$/;"	m	struct:acpi_madt	typeref:typename:u32
flags	arch/x86/include/asm/acpi_table.h	/^	u32 flags;		\/* Local APIC flags *\/$/;"	m	struct:acpi_madt_lapic	typeref:typename:u32
flags	arch/x86/include/asm/acpi_table.h	/^	u32 flags;$/;"	m	struct:acpi_fadt	typeref:typename:u32
flags	arch/x86/include/asm/me_common.h	/^	struct tdt_state_flag flags;$/;"	m	struct:tdt_state_info	typeref:struct:tdt_state_flag
flags	board/nokia/rx51/tag_omap.h	/^	u8 flags:4;$/;"	m	struct:omap_gpio_switch_config	typeref:typename:u8:4
flags	cmd/fdc.c	/^	int		flags;		\/* connected drives ect *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:int	file:
flags	common/bootstage.c	/^	int flags;		\/* see enum bootstage_flags *\/$/;"	m	struct:bootstage_record	typeref:typename:int	file:
flags	common/iotrace.c	/^	enum iotrace_flags flags;$/;"	m	struct:iotrace_record	typeref:enum:iotrace_flags	file:
flags	common/usb_kbd.c	/^	uint8_t		flags;$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint8_t	file:
flags	common/usb_storage.c	/^	unsigned int	flags;			\/* from filter initially *\/$/;"	m	struct:us_data	typeref:typename:unsigned int	file:
flags	disk/part_amiga.h	/^    u32 flags;$/;"	m	struct:partition_block	typeref:typename:u32
flags	disk/part_amiga.h	/^    u32 flags;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
flags	drivers/block/fsl_sata.h	/^	u32	flags;$/;"	m	struct:fsl_sata_info	typeref:typename:u32
flags	drivers/block/sata_dwc.h	/^	unsigned int		flags;$/;"	m	struct:ata_link	typeref:typename:unsigned int
flags	drivers/block/sata_dwc.h	/^	unsigned long			flags;$/;"	m	struct:ata_port_info	typeref:typename:unsigned long
flags	drivers/block/sata_dwc.h	/^	unsigned long		flags;$/;"	m	struct:ata_device	typeref:typename:unsigned long
flags	drivers/block/sata_dwc.h	/^	unsigned long		flags;$/;"	m	struct:ata_host	typeref:typename:unsigned long
flags	drivers/block/sata_dwc.h	/^	unsigned long		flags;$/;"	m	struct:ata_port	typeref:typename:unsigned long
flags	drivers/block/sata_dwc.h	/^	unsigned long		flags;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned long
flags	drivers/block/sata_mv.c	/^	u32 flags;$/;"	m	struct:crpb	typeref:typename:u32	file:
flags	drivers/block/sata_sil.h	/^	__le32 flags;$/;"	m	struct:sil_sge	typeref:typename:__le32
flags	drivers/gpio/sandbox.c	/^	u8 flags;		\/* flags (GPIOF_...) *\/$/;"	m	struct:gpio_state	typeref:typename:u8	file:
flags	drivers/i2c/adi_i2c.c	/^	u8 flags;$/;"	m	struct:adi_i2c_msg	typeref:typename:u8	file:
flags	drivers/i2c/kona_i2c.c	/^	uint16_t flags;$/;"	m	struct:kona_i2c_msg	typeref:typename:uint16_t	file:
flags	drivers/mtd/spi/sf_dataflash.c	/^	uint16_t	flags;$/;"	m	struct:flash_info	typeref:typename:uint16_t	file:
flags	drivers/mtd/spi/sf_internal.h	/^	u16 flags;$/;"	m	struct:spi_flash_params	typeref:typename:u16
flags	drivers/mtd/ubi/ubi-media.h	/^	__u8    flags;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__u8
flags	drivers/net/calxedaxgmac.c	/^	__le32 flags;$/;"	m	struct:xgmac_dma_desc	typeref:typename:__le32	file:
flags	drivers/net/e1000.h	/^		} flags;$/;"	m	union:e1000_data_desc::__anon7fc273451a0a	typeref:struct:e1000_data_desc::__anon7fc273451a0a::__anon7fc273451b08
flags	drivers/net/e1000.h	/^		} flags;$/;"	m	union:e1000_tx_desc::__anon7fc27345100a	typeref:struct:e1000_tx_desc::__anon7fc27345100a::__anon7fc273451108
flags	drivers/net/mvpp2.c	/^	unsigned long flags;$/;"	m	struct:mvpp2_port	typeref:typename:unsigned long	file:
flags	drivers/net/ne2000_base.h	/^	u32 flags;$/;"	m	struct:hw_info_t	typeref:typename:u32
flags	drivers/net/xilinx_ll_temac.c	/^	int			flags;$/;"	m	struct:ll_temac_info	typeref:typename:int	file:
flags	drivers/pinctrl/nxp/pinctrl-imx.h	/^	unsigned int flags;$/;"	m	struct:imx_pinctrl_soc_info	typeref:typename:unsigned int
flags	drivers/reset/reset-uniphier.c	/^	unsigned int flags;$/;"	m	struct:uniphier_reset_data	typeref:typename:unsigned int	file:
flags	drivers/spi/fsl_dspi.c	/^	uint flags;$/;"	m	struct:fsl_dspi_platdata	typeref:typename:uint	file:
flags	drivers/spi/fsl_dspi.c	/^	uint flags;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
flags	drivers/spi/fsl_qspi.c	/^	u32 flags;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:u32	file:
flags	drivers/spi/fsl_qspi.c	/^	u32 flags;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
flags	drivers/spi/soft_spi.c	/^	int flags;$/;"	m	struct:soft_spi_platdata	typeref:typename:int	file:
flags	drivers/usb/dwc3/core.h	/^	unsigned		flags;$/;"	m	struct:dwc3_ep	typeref:typename:unsigned
flags	drivers/usb/dwc3/core.h	/^	unsigned int		flags;$/;"	m	struct:dwc3_event_buffer	typeref:typename:unsigned int
flags	drivers/usb/emul/sandbox_flash.c	/^	u8 flags;$/;"	m	struct:scsi_inquiry_resp	typeref:typename:u8	file:
flags	drivers/usb/eth/asix.c	/^	int flags;$/;"	m	struct:asix_dongle	typeref:typename:int	file:
flags	drivers/usb/eth/asix.c	/^	int flags;$/;"	m	struct:asix_private	typeref:typename:int	file:
flags	drivers/usb/eth/asix88179.c	/^	int flags;$/;"	m	struct:asix_dongle	typeref:typename:int	file:
flags	drivers/usb/eth/asix88179.c	/^	int flags;$/;"	m	struct:asix_private	typeref:typename:int	file:
flags	drivers/usb/host/ohci-s3c24xx.h	/^	unsigned long flags;	\/* for HC bugs *\/$/;"	m	struct:ohci	typeref:typename:unsigned long
flags	drivers/usb/host/ohci.h	/^	unsigned long flags;		\/* for HC bugs *\/$/;"	m	struct:ohci	typeref:typename:unsigned long
flags	drivers/usb/host/xhci.h	/^	volatile __le32	flags;$/;"	m	struct:xhci_transfer_event	typeref:typename:volatile __le32
flags	drivers/usb/host/xhci.h	/^	volatile __le32 flags;$/;"	m	struct:xhci_event_cmd	typeref:typename:volatile __le32
flags	drivers/video/ipu.h	/^	u32 flags;$/;"	m	struct:clk	typeref:typename:u32
flags	fs/ext4/ext4_journal.h	/^	__be32 flags;$/;"	m	struct:ext3_journal_block_tag	typeref:typename:__be32
flags	fs/ubifs/ubifs-media.h	/^	__le32 flags;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
flags	fs/ubifs/ubifs-media.h	/^	__le32 flags;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
flags	fs/ubifs/ubifs-media.h	/^	__le32 flags;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
flags	fs/ubifs/ubifs.h	/^	int flags;$/;"	m	struct:ubifs_inode	typeref:typename:int
flags	fs/ubifs/ubifs.h	/^	int flags;$/;"	m	struct:ubifs_lprops	typeref:typename:int
flags	fs/ubifs/ubifs.h	/^	unsigned long		flags;		\/* error bits\/gfp mask *\/$/;"	m	struct:address_space	typeref:typename:unsigned long
flags	fs/ubifs/ubifs.h	/^	unsigned long flags;$/;"	m	struct:ubifs_cnode	typeref:typename:unsigned long
flags	fs/ubifs/ubifs.h	/^	unsigned long flags;$/;"	m	struct:ubifs_nnode	typeref:typename:unsigned long
flags	fs/ubifs/ubifs.h	/^	unsigned long flags;$/;"	m	struct:ubifs_pnode	typeref:typename:unsigned long
flags	fs/ubifs/ubifs.h	/^	unsigned long flags;$/;"	m	struct:ubifs_znode	typeref:typename:unsigned long
flags	fs/yaffs2/yaffs_guts.h	/^	int flags;$/;"	m	struct:yaffs_xattr_mod	typeref:typename:int
flags	include/MCD_dma.h	/^	u32 flags;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:u32
flags	include/ahci.h	/^	u32	flags;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
flags	include/api_public.h	/^	int		flags;$/;"	m	struct:mem_region	typeref:typename:int
flags	include/asm-generic/global_data.h	/^	unsigned long flags;$/;"	m	struct:global_data	typeref:typename:unsigned long
flags	include/asm-generic/gpio.h	/^	unsigned long flags;$/;"	m	struct:gpio_desc	typeref:typename:unsigned long
flags	include/bedbug/ppc.h	/^  unsigned int		flags;$/;"	m	struct:ppc_ctx	typeref:typename:unsigned int
flags	include/bouncebuf.h	/^	unsigned int flags;$/;"	m	struct:bounce_buffer	typeref:typename:unsigned int
flags	include/cramfs/cramfs_fs.h	/^	u32 flags;			\/* feature flags *\/$/;"	m	struct:cramfs_super	typeref:typename:u32
flags	include/dm/device.h	/^	uint32_t flags;$/;"	m	struct:driver	typeref:typename:uint32_t
flags	include/dm/device.h	/^	uint32_t flags;$/;"	m	struct:udevice	typeref:typename:uint32_t
flags	include/dm/uclass.h	/^	uint32_t flags;$/;"	m	struct:uclass_driver	typeref:typename:uint32_t
flags	include/dwmmc.h	/^	u32 flags;$/;"	m	struct:dwmci_idmac	typeref:typename:u32
flags	include/ec_commands.h	/^	uint32_t flags;		\/* Mask of enum ec_comms_status *\/$/;"	m	struct:ec_response_get_comms_status	typeref:typename:uint32_t
flags	include/ec_commands.h	/^	uint32_t flags;  \/* New flags to apply *\/$/;"	m	struct:ec_params_flash_protect	typeref:typename:uint32_t
flags	include/ec_commands.h	/^	uint32_t flags;$/;"	m	struct:ec_response_flash_protect	typeref:typename:uint32_t
flags	include/ec_commands.h	/^	uint32_t flags;$/;"	m	struct:ec_response_get_protocol_info	typeref:typename:uint32_t
flags	include/ec_commands.h	/^	uint8_t flags;		\/* some flags (enum ec_collect_flags) *\/$/;"	m	struct:ec_collect_item	typeref:typename:uint8_t
flags	include/ec_commands.h	/^	uint8_t flags;		\/* some flags (enum mkbp_config_flags) *\/$/;"	m	struct:ec_mkbp_config	typeref:typename:uint8_t
flags	include/ec_commands.h	/^	uint8_t flags;         \/* See EC_REBOOT_FLAG_* *\/$/;"	m	struct:ec_params_reboot_ec	typeref:typename:uint8_t
flags	include/ec_commands.h	/^	uint8_t flags;      \/* Control flags *\/$/;"	m	struct:ec_params_led_control	typeref:typename:uint8_t
flags	include/ec_commands.h	/^	uint8_t flags;$/;"	m	struct:ec_lpc_host_args	typeref:typename:uint8_t
flags	include/edid.h	/^	unsigned char flags;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
flags	include/environment.h	/^	unsigned char	flags;		\/* active\/obsolete flags	*\/$/;"	m	struct:environment_s	typeref:typename:unsigned char
flags	include/ext_common.h	/^	__le32 flags;$/;"	m	struct:ext2_inode	typeref:typename:__le32
flags	include/ext_common.h	/^	__le32 flags;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
flags	include/fat.h	/^	__u16	flags;		\/* Bit 8: fat mirroring, low 4: active fat *\/$/;"	m	struct:boot_sector	typeref:typename:__u16
flags	include/fdtdec.h	/^	enum display_flags flags;		\/* display flags *\/$/;"	m	struct:display_timing	typeref:enum:display_flags
flags	include/fsl-mc/fsl_dprc.h	/^	uint16_t	flags;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint16_t
flags	include/fsl-mc/fsl_dprc.h	/^	uint32_t flags;$/;"	m	struct:dprc_region_desc	typeref:typename:uint32_t
flags	include/i2c.h	/^	uint flags;$/;"	m	struct:dm_i2c_chip	typeref:typename:uint
flags	include/i2c.h	/^	uint flags;$/;"	m	struct:i2c_msg	typeref:typename:uint
flags	include/input.h	/^	uchar flags;		\/* active state keys (FLAGS_...) *\/$/;"	m	struct:input_config	typeref:typename:uchar
flags	include/jffs2/jffs2.h	/^	__u16 flags;	  \/* See JFFS2_INO_FLAG_* *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u16
flags	include/libata.h	/^	unsigned long		flags;		\/* ATA_TFLAG_xxx *\/$/;"	m	struct:ata_taskfile	typeref:typename:unsigned long
flags	include/linux/apm_bios.h	/^	__u16	flags;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
flags	include/linux/ethtool.h	/^	__u32	flags;		\/* ETH_TEST_FL_xxx *\/$/;"	m	struct:ethtool_test	typeref:typename:__u32
flags	include/linux/fb.h	/^	__u32 flags;			\/* FB_VBLANK flags *\/$/;"	m	struct:fb_vblank	typeref:typename:__u32
flags	include/linux/fb.h	/^	int flags;$/;"	m	struct:fb_info	typeref:typename:int
flags	include/linux/fb.h	/^	u32 flags;		\/* see FB_PIXMAP_*			*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
flags	include/linux/fb.h	/^	u32 flags;$/;"	m	struct:fb_blit_caps	typeref:typename:u32
flags	include/linux/ioport.h	/^	unsigned long flags;$/;"	m	struct:resource	typeref:typename:unsigned long
flags	include/linux/mtd/mtd.h	/^	uint32_t flags;$/;"	m	struct:mtd_info	typeref:typename:uint32_t
flags	include/linux/screen_info.h	/^	__u8  flags;		\/* 0x08 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
flags	include/lynxkdi.h	/^	uint16_t	flags;		\/* Boot flags			*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint16_t
flags	include/mmc.h	/^	uint flags;$/;"	m	struct:mmc_data	typeref:typename:uint
flags	include/mtd/mtd-abi.h	/^	__u32 flags;$/;"	m	struct:mtd_info_user	typeref:typename:__u32
flags	include/pci.h	/^	unsigned long flags;	\/* Resource flags *\/$/;"	m	struct:pci_region	typeref:typename:unsigned long
flags	include/phy.h	/^	u32 flags;$/;"	m	struct:phy_device	typeref:typename:u32
flags	include/post.h	/^	int flags;$/;"	m	struct:post_test	typeref:typename:int
flags	include/power/pmic.h	/^	unsigned int flags;$/;"	m	struct:p_spi	typeref:typename:unsigned int
flags	include/power/regulator.h	/^	int flags;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:int
flags	include/search.h	/^	int flags;$/;"	m	struct:entry	typeref:typename:int
flags	include/sh_pfc.h	/^	pinmux_flag_t flags;$/;"	m	struct:pinmux_gpio	typeref:typename:pinmux_flag_t
flags	include/spi.h	/^	u8 flags;$/;"	m	struct:spi_slave	typeref:typename:u8
flags	include/spi_flash.h	/^	u16 flags;$/;"	m	struct:spi_flash	typeref:typename:u16
flags	include/spl.h	/^	u32 flags;$/;"	m	struct:spl_image_info	typeref:typename:u32
flags	include/splash.h	/^	enum splash_flags flags;$/;"	m	struct:splash_location	typeref:enum:splash_flags
flags	include/stdio_dev.h	/^	int	flags;			\/* Device flags: input\/output\/system	*\/$/;"	m	struct:stdio_dev	typeref:typename:int
flags	include/test/test.h	/^	int flags;$/;"	m	struct:unit_test	typeref:typename:int
flags	include/trace.h	/^	uint32_t flags;		\/* Flags and timestamp *\/$/;"	m	struct:trace_call	typeref:typename:uint32_t
flags	include/tsec.h	/^	u32 flags;$/;"	m	struct:tsec_info_struct	typeref:typename:u32
flags	include/tsec.h	/^	u32 flags;$/;"	m	struct:tsec_private	typeref:typename:u32
flags	lib/lz4_wrapper.c	/^		u8 flags;$/;"	m	union:lz4_frame_header::__anonc9492e16010a	typeref:typename:u8	file:
flags	lib/slre.c	/^	const char	*flags;$/;"	m	struct:__anon5875e6120208	typeref:typename:const char *	file:
flags	lib/zlib/inflate.h	/^    int flags;                  \/* gzip header method and flags (0 if zlib) *\/$/;"	m	struct:inflate_state	typeref:typename:int
flags	net/dns.h	/^	uint16_t	flags;		\/* Flags *\/$/;"	m	struct:header	typeref:typename:uint16_t
flags	scripts/kconfig/expr.h	/^	int flags;$/;"	m	struct:symbol	typeref:typename:int
flags	scripts/kconfig/expr.h	/^	unsigned int flags;$/;"	m	struct:menu	typeref:typename:unsigned int
flags	scripts/kconfig/lkc.h	/^	unsigned int flags;$/;"	m	struct:kconf_id	typeref:typename:unsigned int
flags	tools/env/fw_env.c	/^	unsigned char		*flags;$/;"	m	struct:environment	typeref:typename:unsigned char *	file:
flags	tools/env/fw_env.c	/^	unsigned char	flags;	\/* active or obsolete *\/$/;"	m	struct:env_image_redundant	typeref:typename:unsigned char	file:
flags	tools/fdtgrep.c	/^	int flags;		\/* Flags (FDT_REG_...) *\/$/;"	m	struct:display_info	typeref:typename:int	file:
flags	tools/mxsimage.h	/^		uint16_t	flags;$/;"	m	struct:sb_command::__anonc4848c960308	typeref:typename:uint16_t
flags	tools/mxsimage.h	/^	uint16_t	flags;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
flags	tools/mxsimage.h	/^	uint32_t	flags;$/;"	m	struct:sb_source_entry	typeref:typename:uint32_t
flags	tools/omapimage.h	/^	uint32_t flags;$/;"	m	struct:ch_settings	typeref:typename:uint32_t
flags	tools/proftool.c	/^	unsigned flags;$/;"	m	struct:func_info	typeref:typename:unsigned	file:
flags	tools/socfpgaimage.c	/^	uint8_t  flags;$/;"	m	struct:socfpga_header	typeref:typename:uint8_t	file:
flags_list	common/env_flags.c	/^static const char *flags_list;$/;"	v	typeref:typename:const char *	file:
flags_size	include/ahci.h	/^	u32	flags_size;$/;"	m	struct:ahci_sg	typeref:typename:u32
flash	arch/xtensa/dts/xtfpga-flash-128m.dtsi	/^		flash: flash@00000000 {$/;"	l
flash	arch/xtensa/dts/xtfpga-flash-16m.dtsi	/^		flash: flash@08000000 {$/;"	l
flash	board/Arcturus/ucp1020/cmd_arc.c	/^static struct spi_flash *flash;$/;"	v	typeref:struct:spi_flash *	file:
flash	cmd/sf.c	/^static struct spi_flash *flash;$/;"	v	typeref:struct:spi_flash *	file:
flash	doc/README.x86	/^flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program$/;"	l
flash	drivers/mtd/nand/pxa3xx_nand.h	/^	const struct pxa3xx_nand_flash		*flash;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:const struct pxa3xx_nand_flash *
flash	include/cros_ec.h	/^	struct fmap_entry flash;	\/* Address and size of EC flash *\/$/;"	m	struct:fdt_cros_ec	typeref:struct:fmap_entry
flash-boot	board/imgtec/malta/flash-malta-boot.tcl	/^proc flash-boot { binfile } {$/;"	p
flash0	arch/arm/dts/imx6ull-14x14-evk.dts	/^	flash0: n25q256a@0 {$/;"	l
flash0	arch/arm/dts/k2g-evm.dts	/^        flash0: m25p80@0 {$/;"	l
flash0	arch/arm/dts/socfpga_arria5_socdk.dts	/^	flash0: n25q00@0 {$/;"	l
flash0	arch/arm/dts/socfpga_cyclone5_is1.dts	/^	flash0: n25q00@0 {$/;"	l
flash0	arch/arm/dts/socfpga_cyclone5_socdk.dts	/^	flash0: n25q00@0 {$/;"	l
flash0	arch/arm/dts/socfpga_cyclone5_sockit.dts	/^	flash0: n25q00@0 {$/;"	l
flash0	arch/arm/dts/socfpga_cyclone5_socrates.dts	/^	flash0: n25q00@0 {$/;"	l
flash0	arch/arm/dts/socfpga_cyclone5_sr1500.dts	/^	flash0: n25q00@0 {$/;"	l
flash0	arch/arm/dts/socfpga_cyclone5_vining_fpga.dts	/^	flash0: n25q128@0 {$/;"	l
flash0	arch/arm/dts/stv0991.dts	/^			flash0: n25q32@0 {$/;"	l	label:qspi
flash0	arch/nios2/dts/10m50_devboard.dts	/^			flash0: nor0@0 {$/;"	l	label:sopc0.ext_flash
flash1	arch/arm/dts/socfpga_cyclone5_vining_fpga.dts	/^	flash1: n25q00@1 {$/;"	l
flash__init	board/armltd/vexpress/vexpress_common.c	/^static void flash__init(void)$/;"	f	typeref:typename:void	file:
flash_add_byte	drivers/mtd/cfi_flash.c	/^static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)$/;"	f	typeref:typename:void	file:
flash_addr	common/env_flash.c	/^static env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;$/;"	v	typeref:typename:env_t *	file:
flash_addr	drivers/mtd/nand/mxc_nand.h	/^	u16 flash_addr;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
flash_addr	drivers/mtd/nand/mxc_nand.h	/^	u32 flash_addr[12];$/;"	m	struct:mxc_nand_regs	typeref:typename:u32[12]
flash_addr_new	common/env_flash.c	/^static env_t *flash_addr_new = (env_t *)CONFIG_ENV_ADDR_REDUND;$/;"	v	typeref:typename:env_t *	file:
flash_addr_table	board/amcc/bamboo/flash.c	/^static unsigned long flash_addr_table[][CONFIG_SYS_MAX_FLASH_BANKS] = {$/;"	v	typeref:typename:unsigned long[][]	file:
flash_addr_table	board/amcc/luan/flash.c	/^static unsigned long flash_addr_table[1][CONFIG_SYS_MAX_FLASH_BANKS] = {$/;"	v	typeref:typename:unsigned long[1][]	file:
flash_addr_table	board/amcc/yucca/flash.c	/^static unsigned long flash_addr_table[][CONFIG_SYS_MAX_FLASH_BANKS] = {$/;"	v	typeref:typename:unsigned long[][]	file:
flash_addr_table	board/tqc/tqm5200/cam5200_flash.c	/^static unsigned long flash_addr_table[][CONFIG_SYS_MAX_FLASH_BANKS] = {$/;"	v	typeref:typename:unsigned long[][]	file:
flash_afterinit	board/ipek01/ipek01.c	/^void flash_afterinit (ulong start, ulong size)$/;"	f	typeref:typename:void
flash_afterinit	board/jupiter/jupiter.c	/^void flash_afterinit(ulong size)$/;"	f	typeref:typename:void
flash_bad_block	tools/env/fw_env.c	/^static int flash_bad_block(int fd, uint8_t mtd_type, loff_t blockstart)$/;"	f	typeref:typename:int	file:
flash_bank	arch/arm/mach-stm32/stm32f1/flash.c	/^static struct stm32_flash_bank_regs *flash_bank[STM32_NUM_BANKS];$/;"	v	typeref:struct:stm32_flash_bank_regs * []	file:
flash_bank	drivers/mtd/nand/denali.h	/^	int flash_bank; \/* currently selected chip *\/$/;"	m	struct:denali_nand_info	typeref:typename:int
flash_bank	drivers/mtd/nand/denali_spl.c	/^static const int flash_bank;$/;"	v	typeref:typename:const int	file:
flash_bank_cmd	board/freescale/ls1021atwr/ls1021atwr.c	/^static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
flash_banks_list	arch/arm/mach-uniphier/micro-support-card.c	/^*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];$/;"	v	typeref:typename:const struct memory_bank * []	file:
flash_bbt	drivers/mtd/nand/pxa3xx_nand.h	/^	bool	flash_bbt;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:bool
flash_bbt	drivers/mtd/nand/vf610_nfc.c	/^	int flash_bbt;$/;"	m	struct:vf610_nfc_config	typeref:typename:int	file:
flash_cfg	board/cirrus/edb93xx/edb93xx.c	/^#define flash_cfg(/;"	d	file:
flash_cfg	board/cirrus/edb93xx/edb93xx.c	/^static void flash_cfg(void)$/;"	f	typeref:typename:void	file:
flash_cfg1_addr	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg1_addr:$/;"	l
flash_cfg3_addr	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg3_addr:$/;"	l
flash_cfg3_val	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg3_val:$/;"	l
flash_cfg4_addr	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg4_addr:$/;"	l
flash_cfg4_val	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg4_val:$/;"	l
flash_cfg5_addr	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg5_addr:$/;"	l
flash_cfg5_val	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^flash_cfg5_val:$/;"	l
flash_cfg_parms_t	tools/imximage.h	/^} flash_cfg_parms_t;$/;"	t	typeref:struct:__anon504a956c0508
flash_check	examples/standalone/atmel_df_pow2.c	/^static int flash_check(struct spi_slave *slave)$/;"	f	typeref:typename:int	file:
flash_cmd	drivers/mtd/nand/mxc_nand.h	/^	u16 flash_cmd;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
flash_cmd	drivers/mtd/nand/mxc_nand.h	/^	u32 flash_cmd;$/;"	m	struct:mxc_nand_regs	typeref:typename:u32
flash_cmd	examples/standalone/atmel_df_pow2.c	/^static int flash_cmd(struct spi_slave *slave, uchar cmd, uchar *buf, int len)$/;"	f	typeref:typename:int	file:
flash_cmd_reset	board/intercontrol/digsy_mtc/digsy_mtc.c	/^void flash_cmd_reset(flash_info_t *info)$/;"	f	typeref:typename:void
flash_cmd_reset	board/t3corp/t3corp.c	/^void flash_cmd_reset(flash_info_t *info)$/;"	f	typeref:typename:void
flash_complete_operation	drivers/mtd/pic32_flash.c	/^static inline int flash_complete_operation(void)$/;"	f	typeref:typename:int	file:
flash_config0	drivers/usb/emul/sandbox_flash.c	/^static struct usb_config_descriptor flash_config0 = {$/;"	v	typeref:struct:usb_config_descriptor	file:
flash_cs_fixup	board/xes/xpedite517x/xpedite517x.c	/^static void flash_cs_fixup(void)$/;"	f	typeref:typename:void	file:
flash_cs_fixup	board/xes/xpedite520x/xpedite520x.c	/^static void flash_cs_fixup(void)$/;"	f	typeref:typename:void	file:
flash_cs_fixup	board/xes/xpedite537x/xpedite537x.c	/^static void flash_cs_fixup(void)$/;"	f	typeref:typename:void	file:
flash_cs_fixup	board/xes/xpedite550x/xpedite550x.c	/^static void flash_cs_fixup(void)$/;"	f	typeref:typename:void	file:
flash_csr	board/freescale/t102xrdb/cpld.h	/^	u8 flash_csr;		\/* 0x13 - Flash control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
flash_csr	board/freescale/t208xrdb/cpld.h	/^	u8 flash_csr;		\/* 0x11 - Flash control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
flash_ctl_status	board/freescale/t104xrdb/cpld.h	/^	u8 flash_ctl_status;	\/* 0x13 - Flash control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
flash_ctrl	board/amcc/canyonlands/canyonlands.c	/^	u8	flash_ctrl;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
flash_data	drivers/misc/cros_ec_sandbox.c	/^	uint8_t *flash_data;$/;"	m	struct:ec_state	typeref:typename:uint8_t *	file:
flash_data_len	drivers/misc/cros_ec_sandbox.c	/^	int flash_data_len;$/;"	m	struct:ec_state	typeref:typename:int	file:
flash_desc_list	drivers/usb/emul/sandbox_flash.c	/^static void *flash_desc_list[] = {$/;"	v	typeref:typename:void * []	file:
flash_detect_cfi	drivers/mtd/cfi_flash.c	/^static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)$/;"	f	typeref:typename:int	file:
flash_detect_legacy	drivers/mtd/cfi_flash.c	/^static inline int flash_detect_legacy(phys_addr_t base, int banknum)$/;"	f	typeref:typename:int	file:
flash_detect_legacy	drivers/mtd/cfi_flash.c	/^static int flash_detect_legacy(phys_addr_t base, int banknum)$/;"	f	typeref:typename:int	file:
flash_dev	include/linux/mtd/st_smi.h	/^struct flash_dev {$/;"	s
flash_device	drivers/mtd/st_smi.c	/^struct flash_device {$/;"	s	file:
flash_device_desc	drivers/usb/emul/sandbox_flash.c	/^static struct usb_device_descriptor flash_device_desc = {$/;"	v	typeref:struct:usb_device_descriptor	file:
flash_devices	drivers/mtd/st_smi.c	/^static struct flash_device flash_devices[] = {$/;"	v	typeref:struct:flash_device[]	file:
flash_endpoint0_out	drivers/usb/emul/sandbox_flash.c	/^static struct usb_endpoint_descriptor flash_endpoint0_out = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
flash_endpoint1_in	drivers/usb/emul/sandbox_flash.c	/^static struct usb_endpoint_descriptor flash_endpoint1_in = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
flash_erase	arch/arm/mach-at91/arm926ejs/eflash.c	/^int flash_erase (flash_info_t *info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	arch/arm/mach-stm32/stm32f1/flash.c	/^int flash_erase(flash_info_t *info, int first, int last)$/;"	f	typeref:typename:int
flash_erase	board/amcc/common/flash.c	/^int flash_erase(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	board/amcc/yucca/flash.c	/^int flash_erase(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	board/bf533-ezkit/flash.c	/^int flash_erase(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	board/cobra5272/flash.c	/^int flash_erase (flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	board/esd/common/flash.c	/^int	flash_erase (flash_info_t *info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	board/freescale/m5253demo/flash.c	/^int flash_erase(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	board/tqc/tqm5200/cam5200_flash.c	/^int flash_erase(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	drivers/mtd/altera_qspi.c	/^int flash_erase(flash_info_t *info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	drivers/mtd/cfi_flash.c	/^int flash_erase (flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	drivers/mtd/pic32_flash.c	/^int flash_erase(flash_info_t *info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	drivers/mtd/st_smi.c	/^int flash_erase(flash_info_t *info, int s_first, int s_last)$/;"	f	typeref:typename:int
flash_erase	drivers/mtd/stm32_flash.c	/^int flash_erase(flash_info_t *info, int first, int last)$/;"	f	typeref:typename:int
flash_erase_1	board/amcc/common/flash.c	/^static int flash_erase_1(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int	file:
flash_erase_1	board/amcc/yucca/flash.c	/^static int flash_erase_1(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int	file:
flash_erase_16	board/tqc/tqm5200/cam5200_flash.c	/^static int flash_erase_16(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int	file:
flash_erase_2	board/amcc/common/flash.c	/^static int flash_erase_2(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int	file:
flash_erase_2	board/amcc/yucca/flash.c	/^static int flash_erase_2(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int	file:
flash_erase_32	board/tqc/tqm5200/cam5200_flash.c	/^static int flash_erase_32(flash_info_t * info, int s_first, int s_last)$/;"	f	typeref:typename:int	file:
flash_erase_value	include/cros_ec.h	/^	int flash_erase_value;$/;"	m	struct:fdt_cros_ec	typeref:typename:int
flash_fill_sect_ranges	cmd/flash.c	/^flash_fill_sect_ranges (ulong addr_first, ulong addr_last,$/;"	f	typeref:typename:int	file:
flash_fixup_amd	drivers/mtd/cfi_flash.c	/^static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
flash_fixup_atmel	drivers/mtd/cfi_flash.c	/^static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
flash_fixup_num	drivers/mtd/cfi_flash.c	/^static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
flash_fixup_sst	drivers/mtd/cfi_flash.c	/^static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
flash_fixup_stm	drivers/mtd/cfi_flash.c	/^static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
flash_flag_obsolete	tools/env/fw_env.c	/^static int flash_flag_obsolete (int dev, int fd, off_t offset)$/;"	f	typeref:typename:int	file:
flash_full_status_check	drivers/mtd/cfi_flash.c	/^static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,$/;"	f	typeref:typename:int	file:
flash_get_bank_size	board/liebherr/lwmon5/lwmon5.c	/^u32 flash_get_bank_size(int cs, int idx)$/;"	f	typeref:typename:u32
flash_get_info	drivers/mtd/cfi_flash.c	/^flash_info_t *flash_get_info(ulong base)$/;"	f	typeref:typename:flash_info_t *
flash_get_offsets	board/amcc/bubinga/flash.c	/^static void flash_get_offsets(ulong base, flash_info_t * info)$/;"	f	typeref:typename:void	file:
flash_get_offsets	board/amcc/walnut/flash.c	/^static void flash_get_offsets(ulong base, flash_info_t * info)$/;"	f	typeref:typename:void	file:
flash_get_offsets	board/esd/common/flash.c	/^static void flash_get_offsets (ulong base, flash_info_t *info)$/;"	f	typeref:typename:void	file:
flash_get_offsets	board/freescale/m5253demo/flash.c	/^int flash_get_offsets(ulong base, flash_info_t * info)$/;"	f	typeref:typename:int
flash_get_size	board/amcc/common/flash.c	/^static ulong flash_get_size(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size	board/amcc/yucca/flash.c	/^static ulong flash_get_size(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size	board/bf533-ezkit/flash.c	/^unsigned long flash_get_size(ulong baseaddr, flash_info_t * info, int bank_flag)$/;"	f	typeref:typename:unsigned long
flash_get_size	board/esd/common/flash.c	/^static ulong flash_get_size (vu_long *addr, flash_info_t *info)$/;"	f	typeref:typename:ulong	file:
flash_get_size	board/freescale/m5253demo/flash.c	/^ulong flash_get_size(FPWV * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong
flash_get_size	board/tqc/tqm5200/cam5200_flash.c	/^static ulong flash_get_size(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size	drivers/mtd/cfi_flash.c	/^ulong flash_get_size (phys_addr_t base, int banknum)$/;"	f	typeref:typename:ulong
flash_get_size	drivers/mtd/st_smi.c	/^static ulong flash_get_size(ulong base, int banknum)$/;"	f	typeref:typename:ulong	file:
flash_get_size_1	board/amcc/common/flash.c	/^static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size_1	board/amcc/yucca/flash.c	/^static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size_16	board/tqc/tqm5200/cam5200_flash.c	/^static ulong flash_get_size_16(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size_2	board/amcc/common/flash.c	/^static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size_2	board/amcc/yucca/flash.c	/^static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_get_size_32	board/tqc/tqm5200/cam5200_flash.c	/^static ulong flash_get_size_32(vu_long * addr, flash_info_t * info)$/;"	f	typeref:typename:ulong	file:
flash_green	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^flash_green:$/;"	l
flash_green_delay_1	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^flash_green_delay_1:$/;"	l
flash_green_delay_2	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^flash_green_delay_2:$/;"	l
flash_green_delay_3	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^flash_green_delay_3:$/;"	l
flash_green_delay_4	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^flash_green_delay_4:$/;"	l
flash_header_v1_t	tools/imximage.h	/^} flash_header_v1_t;$/;"	t	typeref:struct:__anon504a956c0408
flash_header_v2_t	tools/imximage.h	/^} flash_header_v2_t;$/;"	t	typeref:struct:__anon504a956c0c08
flash_id	include/flash.h	/^	ulong	flash_id;		\/* combined device & manufacturer code	*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong
flash_info	arch/arm/mach-at91/arm926ejs/eflash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	arch/arm/mach-stm32/stm32f1/flash.c	/^flash_info_t flash_info[STM32_NUM_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/amcc/bamboo/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* info for FLASH chips        *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/amcc/bubinga/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* info for FLASH chips        *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/amcc/common/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* info for FLASH chips *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/amcc/yucca/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* info for FLASH chips *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/bf533-ezkit/flash-defines.h	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/cobra5272/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/esd/common/flash.c	/^flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; \/* info for FLASH chips	*\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/freescale/m5253demo/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/pb1x00/flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* info for FLASH chips *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	board/tqc/tqm5200/cam5200_flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* info for FLASH chips *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	drivers/mtd/altera_qspi.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	\/* FLASH chips info *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	drivers/mtd/cfi_flash.c	/^flash_info_t flash_info[CFI_MAX_FLASH_BANKS];	\/* FLASH chips info *\/$/;"	v	typeref:typename:flash_info_t[]
flash_info	drivers/mtd/pic32_flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	drivers/mtd/spi/sf_dataflash.c	/^struct flash_info {$/;"	s	file:
flash_info	drivers/mtd/st_smi.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info	drivers/mtd/stm32_flash.c	/^flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];$/;"	v	typeref:typename:flash_info_t[]
flash_info_t	include/flash.h	/^} flash_info_t;$/;"	t	typeref:struct:__anoneae1afdc0108
flash_init	arch/arm/mach-at91/arm926ejs/eflash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	arch/arm/mach-stm32/stm32f1/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/amcc/bamboo/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/amcc/bubinga/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/amcc/luan/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/amcc/walnut/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/amcc/yucca/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/bf533-ezkit/flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	board/cobra5272/flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	board/esd/cpci2dp/flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	board/esd/cpci405/flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	board/esd/plu405/flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	board/esd/vom405/flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	board/freescale/m5253demo/flash.c	/^ulong flash_init(void)$/;"	f	typeref:typename:ulong
flash_init	board/pb1x00/flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	board/tqc/tqm5200/cam5200_flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	drivers/mtd/altera_qspi.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	drivers/mtd/cfi_flash.c	/^unsigned long flash_init (void)$/;"	f	typeref:typename:unsigned long
flash_init	drivers/mtd/pic32_flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	drivers/mtd/st_smi.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_init	drivers/mtd/stm32_flash.c	/^unsigned long flash_init(void)$/;"	f	typeref:typename:unsigned long
flash_initiate_operation	drivers/mtd/pic32_flash.c	/^static inline void flash_initiate_operation(u32 nvmop)$/;"	f	typeref:typename:void	file:
flash_interface0	drivers/usb/emul/sandbox_flash.c	/^static struct usb_interface_descriptor flash_interface0 = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
flash_io	tools/env/fw_env.c	/^static int flash_io (int mode)$/;"	f	typeref:typename:int	file:
flash_is_busy	drivers/mtd/cfi_flash.c	/^static int flash_is_busy (flash_info_t * info, flash_sect_t sect)$/;"	f	typeref:typename:int	file:
flash_is_locked	include/spi_flash.h	/^	int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len);$/;"	m	struct:spi_flash	typeref:typename:int (*)(struct spi_flash * flash,u32 ofs,size_t len)
flash_isequal	drivers/mtd/cfi_flash.c	/^static int flash_isequal (flash_info_t * info, flash_sect_t sect,$/;"	f	typeref:typename:int	file:
flash_isset	drivers/mtd/cfi_flash.c	/^static int flash_isset (flash_info_t * info, flash_sect_t sect,$/;"	f	typeref:typename:int	file:
flash_lock	include/spi_flash.h	/^	int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len);$/;"	m	struct:spi_flash	typeref:typename:int (*)(struct spi_flash * flash,u32 ofs,size_t len)
flash_make_cmd	drivers/mtd/cfi_flash.c	/^static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)$/;"	f	typeref:typename:void	file:
flash_map	drivers/mtd/cfi_flash.c	/^flash_map (flash_info_t * info, flash_sect_t sect, uint offset)$/;"	f	typeref:typename:void *	file:
flash_mem	drivers/mtd/nand/denali.h	/^	void __iomem *flash_mem;  \/* Mapped io reg base address *\/$/;"	m	struct:denali_nand_info	typeref:typename:void __iomem *
flash_mem_end	cmd/armflash.c	/^	ulong flash_mem_end;$/;"	m	struct:afs_image	typeref:typename:ulong	file:
flash_mem_start	cmd/armflash.c	/^	ulong flash_mem_start;$/;"	m	struct:afs_image	typeref:typename:ulong	file:
flash_node	include/linux/mtd/nand.h	/^	int flash_node;$/;"	m	struct:nand_chip	typeref:typename:int
flash_num	drivers/spi/fsl_qspi.c	/^	u32 flash_num;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:u32	file:
flash_num	drivers/spi/fsl_qspi.c	/^	u32 flash_num;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
flash_offset_cfi	drivers/mtd/cfi_flash.c	/^static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };$/;"	v	typeref:typename:uint[2]	file:
flash_part_str	board/nokia/rx51/tag_omap.h	/^		struct omap_flash_part_str_config flash_part_str;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_flash_part_str_config
flash_perror	common/flash.c	/^void flash_perror (int err)$/;"	f	typeref:typename:void
flash_post_test	post/drivers/flash.c	/^int flash_post_test(int flags)$/;"	f	typeref:typename:int
flash_preinit	board/inka4x0/inka4x0.c	/^void flash_preinit(void)$/;"	f	typeref:typename:void
flash_preinit	board/ipek01/ipek01.c	/^void flash_preinit (void)$/;"	f	typeref:typename:void
flash_preinit	board/jupiter/jupiter.c	/^void flash_preinit(void)$/;"	f	typeref:typename:void
flash_preinit	board/tqc/tqm5200/tqm5200.c	/^void flash_preinit(void)$/;"	f	typeref:typename:void
flash_print_info	arch/arm/mach-at91/arm926ejs/eflash.c	/^void flash_print_info (flash_info_t *info)$/;"	f	typeref:typename:void
flash_print_info	arch/arm/mach-stm32/stm32f1/flash.c	/^void flash_print_info(flash_info_t *info)$/;"	f	typeref:typename:void
flash_print_info	board/amcc/common/flash.c	/^void flash_print_info(flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	board/amcc/yucca/flash.c	/^void flash_print_info(flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	board/bf533-ezkit/flash.c	/^void flash_print_info(flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	board/cobra5272/flash.c	/^void flash_print_info (flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	board/esd/common/flash.c	/^void flash_print_info  (flash_info_t *info)$/;"	f	typeref:typename:void
flash_print_info	board/freescale/m5253demo/flash.c	/^void flash_print_info(flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	board/tqc/tqm5200/cam5200_flash.c	/^void flash_print_info(flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	drivers/mtd/altera_qspi.c	/^void flash_print_info(flash_info_t *info)$/;"	f	typeref:typename:void
flash_print_info	drivers/mtd/cfi_flash.c	/^void flash_print_info (flash_info_t * info)$/;"	f	typeref:typename:void
flash_print_info	drivers/mtd/pic32_flash.c	/^void flash_print_info(flash_info_t *info)$/;"	f	typeref:typename:void
flash_print_info	drivers/mtd/st_smi.c	/^void flash_print_info(flash_info_t *info)$/;"	f	typeref:typename:void
flash_print_info	drivers/mtd/stm32_flash.c	/^void flash_print_info(flash_info_t *info)$/;"	f	typeref:typename:void
flash_printqry	drivers/mtd/cfi_flash.c	/^static void flash_printqry (struct cfi_qry *qry)$/;"	f	typeref:typename:void	file:
flash_protect	common/flash.c	/^flash_protect (int flag, ulong from, ulong to, flash_info_t *info)$/;"	f	typeref:typename:void
flash_protect_default	drivers/mtd/cfi_flash.c	/^void flash_protect_default(void)$/;"	f	typeref:typename:void
flash_read	tools/env/fw_env.c	/^static int flash_read (int fd)$/;"	f	typeref:typename:int	file:
flash_read16	board/freescale/ls1021aqds/ls1021aqds.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	board/freescale/ls1021atwr/ls1021atwr.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	board/freescale/ls1043aqds/ls1043aqds.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	board/freescale/ls1043ardb/ls1043ardb.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	board/freescale/ls1046aqds/ls1046aqds.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	board/freescale/p1022ds/diu.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	board/micronas/vct/ebi_nor_flash.c	/^u16 flash_read16(void *addr)$/;"	f	typeref:typename:u16
flash_read16	drivers/mtd/cfi_flash.c	/^__maybe_weak u16 flash_read16(void *addr)$/;"	f	typeref:typename:__maybe_weak u16
flash_read32	board/freescale/p1022ds/diu.c	/^u32 flash_read32(void *addr)$/;"	f	typeref:typename:u32
flash_read32	board/micronas/vct/ebi_nor_flash.c	/^u32 flash_read32(void *addr)$/;"	f	typeref:typename:u32
flash_read32	board/t3corp/t3corp.c	/^u32 flash_read32(void *addr)$/;"	f	typeref:typename:u32
flash_read32	drivers/mtd/cfi_flash.c	/^__maybe_weak u32 flash_read32(void *addr)$/;"	f	typeref:typename:__maybe_weak u32
flash_read64	arch/sparc/cpu/leon3/cpu.c	/^u64 flash_read64(void *addr)$/;"	f	typeref:typename:u64
flash_read64	board/freescale/p1022ds/diu.c	/^u64 flash_read64(void *addr)$/;"	f	typeref:typename:u64
flash_read64	drivers/mtd/cfi_flash.c	/^__maybe_weak u64 flash_read64(void *addr)$/;"	f	typeref:typename:__maybe_weak u64
flash_read8	board/freescale/ls1021aqds/ls1021aqds.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/freescale/ls1021atwr/ls1021atwr.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/freescale/ls1043aqds/ls1043aqds.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/freescale/ls1043ardb/ls1043ardb.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/freescale/ls1046aqds/ls1046aqds.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/freescale/p1022ds/diu.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/micronas/vct/ebi_nor_flash.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	board/t3corp/t3corp.c	/^u8 flash_read8(void *addr)$/;"	f	typeref:typename:u8
flash_read8	drivers/mtd/cfi_flash.c	/^__maybe_weak u8 flash_read8(void *addr)$/;"	f	typeref:typename:__maybe_weak u8
flash_read_buf	tools/env/fw_env.c	/^static int flash_read_buf (int dev, int fd, void *buf, size_t count,$/;"	f	typeref:typename:int	file:
flash_read_cfi	drivers/mtd/cfi_flash.c	/^static void flash_read_cfi (flash_info_t *info, void *buf,$/;"	f	typeref:typename:void	file:
flash_read_factory_serial	drivers/mtd/cfi_flash.c	/^void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,$/;"	f	typeref:typename:void
flash_read_jedec_ids	drivers/mtd/cfi_flash.c	/^static void flash_read_jedec_ids (flash_info_t * info)$/;"	f	typeref:typename:void	file:
flash_read_long	drivers/mtd/cfi_flash.c	/^static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,$/;"	f	typeref:typename:ulong	file:
flash_read_uchar	drivers/mtd/cfi_flash.c	/^static inline uchar flash_read_uchar (flash_info_t * info, uint offset)$/;"	f	typeref:typename:uchar	file:
flash_read_user_serial	drivers/mtd/cfi_flash.c	/^void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,$/;"	f	typeref:typename:void
flash_read_word	drivers/mtd/cfi_flash.c	/^static inline ushort flash_read_word (flash_info_t * info, uint offset)$/;"	f	typeref:typename:ushort	file:
flash_real_protect	arch/arm/mach-at91/arm926ejs/eflash.c	/^int flash_real_protect (flash_info_t *info, long sector, int prot)$/;"	f	typeref:typename:int
flash_real_protect	drivers/mtd/cfi_flash.c	/^int flash_real_protect (flash_info_t * info, long sector, int prot)$/;"	f	typeref:typename:int
flash_reg	drivers/mtd/nand/denali.h	/^	void __iomem *flash_reg;  \/* Mapped io reg base address *\/$/;"	m	struct:denali_nand_info	typeref:typename:void __iomem *
flash_reset	board/bf533-ezkit/flash.c	/^void flash_reset(void)$/;"	f	typeref:typename:void
flash_sect_erase	cmd/flash.c	/^int flash_sect_erase (ulong addr_first, ulong addr_last)$/;"	f	typeref:typename:int
flash_sect_protect	cmd/flash.c	/^int flash_sect_protect (int p, ulong addr_first, ulong addr_last)$/;"	f	typeref:typename:int
flash_sect_roundb	cmd/flash.c	/^int flash_sect_roundb (ulong *addr)$/;"	f	typeref:typename:int
flash_sect_t	include/flash.h	/^typedef unsigned long flash_sect_t;$/;"	t	typeref:typename:unsigned long
flash_sector_size	drivers/mtd/cfi_flash.c	/^unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)$/;"	f	typeref:typename:unsigned long
flash_set_pow2	examples/standalone/atmel_df_pow2.c	/^static int flash_set_pow2(struct spi_slave *slave)$/;"	f	typeref:typename:int	file:
flash_set_verbose	drivers/mtd/altera_qspi.c	/^void flash_set_verbose(uint v)$/;"	f	typeref:typename:void
flash_set_verbose	drivers/mtd/cfi_flash.c	/^void flash_set_verbose(uint v)$/;"	f	typeref:typename:void
flash_size	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u16 flash_size;$/;"	m	struct:stm32_des_regs	typeref:typename:u16
flash_size	drivers/mtd/ubi/ubi.h	/^	long long flash_size;$/;"	m	struct:ubi_device	typeref:typename:long long
flash_size	include/ec_commands.h	/^	uint32_t flash_size;$/;"	m	struct:ec_response_flash_info	typeref:typename:uint32_t
flash_status	examples/standalone/atmel_df_pow2.c	/^static int flash_status(struct spi_slave *slave)$/;"	f	typeref:typename:int	file:
flash_status_check	drivers/mtd/cfi_flash.c	/^static int flash_status_check (flash_info_t * info, flash_sect_t sector,$/;"	f	typeref:typename:int	file:
flash_status_poll	drivers/mtd/cfi_flash.c	/^static int flash_status_poll(flash_info_t *info, void *src, void *dst,$/;"	f	typeref:typename:int	file:
flash_strings	drivers/usb/emul/sandbox_flash.c	/^	struct usb_string flash_strings[STRINGID_COUNT];$/;"	m	struct:sandbox_flash_plat	typeref:struct:usb_string[]	file:
flash_sts_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 flash_sts_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
flash_toggle	drivers/mtd/cfi_flash.c	/^static int flash_toggle (flash_info_t * info, flash_sect_t sect,$/;"	f	typeref:typename:int	file:
flash_unlock	include/spi_flash.h	/^	int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len);$/;"	m	struct:spi_flash	typeref:typename:int (*)(struct spi_flash * flash,u32 ofs,size_t len)
flash_unlock_seq	drivers/mtd/cfi_flash.c	/^static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)$/;"	f	typeref:typename:void	file:
flash_unmap	drivers/mtd/cfi_flash.c	/^static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,$/;"	f	typeref:typename:void	file:
flash_variable_security	arch/x86/include/asm/me_common.h	/^	u16 flash_variable_security:1;$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
flash_ver_id	include/linux/mtd/samsung_onenand.h	/^	unsigned int	flash_ver_id;	\/* 0x01F0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
flash_verbose	drivers/mtd/altera_qspi.c	/^static uint flash_verbose;$/;"	v	typeref:typename:uint	file:
flash_verbose	drivers/mtd/cfi_flash.c	/^#define flash_verbose /;"	d	file:
flash_verbose	drivers/mtd/cfi_flash.c	/^static uint flash_verbose = 1;$/;"	v	typeref:typename:uint	file:
flash_wait_till_busy	drivers/mtd/pic32_flash.c	/^static int flash_wait_till_busy(const char *func, ulong timeout)$/;"	f	typeref:typename:int	file:
flash_wear_out	arch/x86/include/asm/me_common.h	/^	u16 flash_wear_out:1;$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
flash_width	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	flash_width;    \/* Width of Flash memory (DWIDTH_M) *\/$/;"	m	struct:pxa3xx_nand_flash	typeref:typename:unsigned int
flash_write	common/flash.c	/^flash_write (char *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
flash_write	tools/env/fw_env.c	/^static int flash_write (int fd_current, int fd_target, int dev_target)$/;"	f	typeref:typename:int	file:
flash_write16	board/freescale/ls1021aqds/ls1021aqds.c	/^void flash_write16(u16 val, void *addr)$/;"	f	typeref:typename:void
flash_write16	board/freescale/ls1021atwr/ls1021atwr.c	/^void flash_write16(u16 val, void *addr)$/;"	f	typeref:typename:void
flash_write16	board/freescale/ls1043aqds/ls1043aqds.c	/^void flash_write16(u16 val, void *addr)$/;"	f	typeref:typename:void
flash_write16	board/freescale/ls1043ardb/ls1043ardb.c	/^void flash_write16(u16 val, void *addr)$/;"	f	typeref:typename:void
flash_write16	board/freescale/ls1046aqds/ls1046aqds.c	/^void flash_write16(u16 val, void *addr)$/;"	f	typeref:typename:void
flash_write16	board/freescale/p1022ds/diu.c	/^void flash_write16(u16 value, void *addr)$/;"	f	typeref:typename:void
flash_write16	board/micronas/vct/ebi_nor_flash.c	/^void flash_write16(u16 value, void *addr)$/;"	f	typeref:typename:void
flash_write16	drivers/mtd/cfi_flash.c	/^__maybe_weak void flash_write16(u16 value, void *addr)$/;"	f	typeref:typename:__maybe_weak void
flash_write32	board/freescale/p1022ds/diu.c	/^void flash_write32(u32 value, void *addr)$/;"	f	typeref:typename:void
flash_write32	drivers/mtd/cfi_flash.c	/^__maybe_weak void flash_write32(u32 value, void *addr)$/;"	f	typeref:typename:__maybe_weak void
flash_write64	board/freescale/p1022ds/diu.c	/^void flash_write64(u64 value, void *addr)$/;"	f	typeref:typename:void
flash_write64	drivers/mtd/cfi_flash.c	/^__maybe_weak void flash_write64(u64 value, void *addr)$/;"	f	typeref:typename:__maybe_weak void
flash_write8	board/freescale/p1022ds/diu.c	/^void flash_write8(u8 value, void *addr)$/;"	f	typeref:typename:void
flash_write8	board/micronas/vct/ebi_nor_flash.c	/^void flash_write8(u8 value, void *addr)$/;"	f	typeref:typename:void
flash_write8	drivers/mtd/cfi_flash.c	/^__maybe_weak void flash_write8(u8 value, void *addr)$/;"	f	typeref:typename:__maybe_weak void
flash_write_buf	tools/env/fw_env.c	/^static int flash_write_buf(int dev, int fd, void *buf, size_t count)$/;"	f	typeref:typename:int	file:
flash_write_cfibuffer	drivers/mtd/cfi_flash.c	/^static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,$/;"	f	typeref:typename:int	file:
flash_write_cfiword	drivers/mtd/cfi_flash.c	/^static int flash_write_cfiword (flash_info_t * info, ulong dest,$/;"	f	typeref:typename:int	file:
flash_write_cmd	drivers/mtd/cfi_flash.c	/^void flash_write_cmd (flash_info_t * info, flash_sect_t sect,$/;"	f	typeref:typename:void
flashclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 flashclk_ctrl;	\/* NAND Flash Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
flashio	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	flashio[12];			\/* 0x450 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[12]
flb_clk	arch/m68k/include/asm/global_data.h	/^	unsigned long flb_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
flc_cfg	include/fsl-mc/fsl_dpni.h	/^	struct dpni_flc_cfg flc_cfg;$/;"	m	struct:dpni_queue_attr	typeref:struct:dpni_flc_cfg
flc_cfg	include/fsl-mc/fsl_dpni.h	/^	struct dpni_flc_cfg flc_cfg;$/;"	m	struct:dpni_queue_cfg	typeref:struct:dpni_flc_cfg
flc_hi	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 flc_hi;$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
flc_hi	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t flc_hi;$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
flc_lo	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 flc_lo;$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
flc_lo	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t flc_lo;$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
flc_type	include/fsl-mc/fsl_dpni.h	/^	enum dpni_flc_type flc_type;$/;"	m	struct:dpni_flc_cfg	typeref:enum:dpni_flc_type
flchip	include/linux/mtd/flashchip.h	/^struct flchip {$/;"	s
flchip_shared	include/linux/mtd/flashchip.h	/^struct flchip_shared {$/;"	s
flckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 flckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
flcomp	tools/ifdtool.h	/^	uint32_t flcomp;$/;"	m	struct:fcba_t	typeref:typename:uint32_t
flcrmon	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	flcrmon;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
flen__fal	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 flen__fal;				\/* 0x68 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
flens	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 flens;				\/* 0x20 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
fletcher_2_endian	fs/zfs/zfs_fletcher.c	/^fletcher_2_endian(const void *buf, uint64_t size,$/;"	f	typeref:typename:void
fletcher_4_endian	fs/zfs/zfs_fletcher.c	/^fletcher_4_endian(const void *buf, uint64_t size, zfs_endian_t endian,$/;"	f	typeref:typename:void
flex_int16_t	scripts/kconfig/zconf.lex.c	/^typedef int16_t flex_int16_t;$/;"	t	typeref:typename:int16_t	file:
flex_int16_t	scripts/kconfig/zconf.lex.c	/^typedef short int flex_int16_t;$/;"	t	typeref:typename:short int	file:
flex_int32_t	scripts/kconfig/zconf.lex.c	/^typedef int flex_int32_t;$/;"	t	typeref:typename:int	file:
flex_int32_t	scripts/kconfig/zconf.lex.c	/^typedef int32_t flex_int32_t;$/;"	t	typeref:typename:int32_t	file:
flex_int8_t	scripts/kconfig/zconf.lex.c	/^typedef int8_t flex_int8_t;$/;"	t	typeref:typename:int8_t	file:
flex_int8_t	scripts/kconfig/zconf.lex.c	/^typedef signed char flex_int8_t;$/;"	t	typeref:typename:signed char	file:
flex_uint16_t	scripts/kconfig/zconf.lex.c	/^typedef uint16_t flex_uint16_t;$/;"	t	typeref:typename:uint16_t	file:
flex_uint16_t	scripts/kconfig/zconf.lex.c	/^typedef unsigned short int flex_uint16_t;$/;"	t	typeref:typename:unsigned short int	file:
flex_uint32_t	scripts/kconfig/zconf.lex.c	/^typedef uint32_t flex_uint32_t;$/;"	t	typeref:typename:uint32_t	file:
flex_uint32_t	scripts/kconfig/zconf.lex.c	/^typedef unsigned int flex_uint32_t;$/;"	t	typeref:typename:unsigned int	file:
flex_uint8_t	scripts/kconfig/zconf.lex.c	/^typedef uint8_t flex_uint8_t;$/;"	t	typeref:typename:uint8_t	file:
flex_uint8_t	scripts/kconfig/zconf.lex.c	/^typedef unsigned char flex_uint8_t; $/;"	t	typeref:typename:unsigned char	file:
flexcan1	arch/arm/dts/imx6ull.dtsi	/^			flexcan1: can@02090000 {$/;"	l
flexcan2	arch/arm/dts/imx6ull.dtsi	/^			flexcan2: can@02094000 {$/;"	l
flexonenand_addr	drivers/mtd/onenand/onenand_base.c	/^static loff_t flexonenand_addr(struct onenand_chip *this, int block)$/;"	f	typeref:typename:loff_t	file:
flexonenand_block	drivers/mtd/onenand/onenand_base.c	/^static unsigned int flexonenand_block(struct onenand_chip *this, loff_t addr)$/;"	f	typeref:typename:unsigned int	file:
flexonenand_check_blocks_erased	drivers/mtd/onenand/onenand_base.c	/^static int flexonenand_check_blocks_erased(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
flexonenand_get_boundary	drivers/mtd/onenand/onenand_base.c	/^static int flexonenand_get_boundary(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
flexonenand_get_size	drivers/mtd/onenand/onenand_base.c	/^static void flexonenand_get_size(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
flexonenand_region	drivers/mtd/onenand/onenand_base.c	/^int flexonenand_region(struct mtd_info *mtd, loff_t addr)$/;"	f	typeref:typename:int
flexonenand_set_boundary	drivers/mtd/onenand/onenand_base.c	/^int flexonenand_set_boundary(struct mtd_info *mtd, int die,$/;"	f	typeref:typename:int
flg	drivers/spi/bfin_spi.c	/^	u16 ctl, baud, flg;$/;"	m	struct:bfin_spi_slave	typeref:typename:u16	file:
flg	drivers/spi/davinci_spi.c	/^	dv_reg	flg;		\/* 0x10 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
flg_export	common/cli_hush.c	/^	int flg_export;$/;"	m	struct:variables	typeref:typename:int	file:
flg_read_only	common/cli_hush.c	/^	int flg_read_only;$/;"	m	struct:variables	typeref:typename:int	file:
flhcsr	board/freescale/c29xpcie/cpld.h	/^	u8 flhcsr;	\/* 0x11 - Flash control and status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
flight_plan	arch/x86/include/asm/mp.h	/^	struct mp_flight_record *flight_plan;$/;"	m	struct:mp_params	typeref:struct:mp_flight_record *
flight_tm	arch/m68k/include/asm/immap_5441x.h	/^	u32 flight_tm;		\/* 0x1A8 *\/$/;"	m	struct:sdramc	typeref:typename:u32
flill	tools/ifdtool.h	/^	uint32_t flill;$/;"	m	struct:fcba_t	typeref:typename:uint32_t
flinfo	cmd/armflash.c	/^	flash_info_t *flinfo;$/;"	m	struct:afs_image	typeref:typename:flash_info_t *	file:
fliodn	arch/powerpc/include/asm/fsl_portals.h	/^	u16	fliodn;	\/* frame data LIODN *\/$/;"	m	struct:qportal_info	typeref:typename:u16
flipFlop3C0	drivers/bios_emulator/include/biosemu.h	/^	int flipFlop3C0;$/;"	m	struct:__anon964d10140108	typeref:typename:int
flip_4_bits	drivers/net/armada100_fec.c	/^static inline u32 flip_4_bits(u32 x)$/;"	f	typeref:typename:u32	file:
flip_ep0_direction	drivers/usb/gadget/ci_udc.c	/^static void flip_ep0_direction(void)$/;"	f	typeref:typename:void	file:
fll	drivers/sound/wm8994.c	/^	struct wm8994_fll_config fll[2]; \/* fll config to configure fll *\/$/;"	m	struct:wm8994_priv	typeref:struct:wm8994_fll_config[2]	file:
flmap0	tools/ifdtool.h	/^	uint32_t flmap0;$/;"	m	struct:fdbar_t	typeref:typename:uint32_t
flmap1	tools/ifdtool.h	/^	uint32_t flmap1;$/;"	m	struct:fdbar_t	typeref:typename:uint32_t
flmap2	tools/ifdtool.h	/^	uint32_t flmap2;$/;"	m	struct:fdbar_t	typeref:typename:uint32_t
flmstr1	tools/ifdtool.h	/^	uint32_t flmstr1;$/;"	m	struct:fmba_t	typeref:typename:uint32_t
flmstr2	tools/ifdtool.h	/^	uint32_t flmstr2;$/;"	m	struct:fmba_t	typeref:typename:uint32_t
flmstr3	tools/ifdtool.h	/^	uint32_t flmstr3;$/;"	m	struct:fmba_t	typeref:typename:uint32_t
flooding	include/vsc9953.h	/^	u32	flooding;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
flooding_ipmc	include/vsc9953.h	/^	u32	flooding_ipmc;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
floor	include/linux/mtd/doc2000.h	/^	char floor, chip;$/;"	m	struct:Nand	typeref:typename:char
floppy_type	cmd/fdc.c	/^const static FD_GEO_STRUCT floppy_type[2] = {$/;"	v	typeref:typename:const FD_GEO_STRUCT[2]	file:
flow_context	include/fsl-mc/fsl_dpni.h	/^	uint64_t flow_context;$/;"	m	struct:dpni_flc_cfg	typeref:typename:uint64_t
flow_context_size	include/fsl-mc/fsl_dpni.h	/^	enum dpni_stash_size flow_context_size;$/;"	m	struct:dpni_flc_cfg	typeref:enum:dpni_stash_size
flow_control	drivers/net/calxedaxgmac.c	/^	u32 flow_control;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
flow_ctlr	arch/arm/include/asm/arch-tegra114/flow.h	/^struct flow_ctlr {$/;"	s
flow_ctlr	arch/arm/include/asm/arch-tegra124/flow.h	/^struct flow_ctlr {$/;"	s
flow_ctlr	arch/arm/include/asm/arch-tegra20/flow.h	/^struct flow_ctlr {$/;"	s
flow_ctlr	arch/arm/include/asm/arch-tegra210/flow.h	/^struct flow_ctlr {$/;"	s
flow_ctlr	arch/arm/include/asm/arch-tegra30/flow.h	/^struct flow_ctlr {$/;"	s
flow_ctlr_spare	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 flow_ctlr_spare;	\/* offset 0x54 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
flow_dbg_cnt0	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 flow_dbg_cnt0;	\/* offset 0x48 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
flow_dbg_cnt1	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 flow_dbg_cnt1;	\/* offset 0x4c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
flow_dbg_qual	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 flow_dbg_qual;	\/* offset 0x50 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
flow_dbg_sel	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 flow_dbg_sel;	\/* offset 0x44 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
flow_thresh	drivers/net/cpsw.c	/^	u32	flow_thresh;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
flow_thresh	drivers/net/cpsw.c	/^	u32	flow_thresh;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
flowcontrol	drivers/net/designware.h	/^	u32 flowcontrol;	\/* 0x18 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
flowcontrolcounter	drivers/net/lpc32xx_eth.c	/^	u32 flowcontrolcounter;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
flowcontrolstatus	drivers/net/lpc32xx_eth.c	/^	u32 flowcontrolstatus;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
flpb	tools/ifdtool.h	/^	uint32_t flpb;$/;"	m	struct:fcba_t	typeref:typename:uint32_t
flr	drivers/i2c/at91_i2c.h	/^	u32 flr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
flreg	tools/ifdtool.h	/^	uint32_t flreg[MAX_REGIONS];$/;"	m	struct:frba_t	typeref:typename:uint32_t[]
fls	arch/openrisc/include/asm/bitops/fls.h	/^static inline int fls(int x)$/;"	f	typeref:typename:int
fls	arch/powerpc/include/asm/bitops.h	/^static __inline__ int fls(unsigned int x)$/;"	f	typeref:typename:int
fls	include/asm-generic/bitops/fls.h	/^static __always_inline int fls(int x)$/;"	f	typeref:typename:__always_inline int
fls	include/linux/bitops.h	/^# define fls /;"	d
fls64	arch/powerpc/include/asm/bitops.h	/^static inline int fls64(__u64 x)$/;"	f	typeref:typename:int
fls64	include/asm-generic/bitops/fls64.h	/^static __always_inline int fls64(__u64 x)$/;"	f	typeref:typename:__always_inline int
fls_long	include/linux/bitops.h	/^static inline unsigned fls_long(unsigned long l)$/;"	f	typeref:typename:unsigned
flshcr	drivers/spi/fsl_qspi.h	/^	u32 flshcr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
flstate_t	include/linux/mtd/flashchip.h	/^} flstate_t;$/;"	t	typeref:enum:__anonf09221130103
flumap1	tools/ifdtool.h	/^	uint32_t flumap1;$/;"	m	struct:fdbar_t	typeref:typename:uint32_t
flush	arch/powerpc/cpu/mpc86xx/cache.S	/^flush:$/;"	l
flush	board/spear/common/spr_lowlevel_init.S	/^flush:$/;"	l
flush	drivers/block/fsl_sata.h	/^	int		flush;$/;"	m	struct:fsl_sata	typeref:typename:int
flush	drivers/block/sata_sil.h	/^	int		flush;$/;"	m	struct:sil_sata	typeref:typename:int
flush	test/py/multiplexed_log.py	/^    def flush(self):$/;"	m	class:Logfile
flush	test/py/multiplexed_log.py	/^    def flush(self):$/;"	m	class:LogfileStream
flush_RL	lib/bzip2/bzlib.c	/^void flush_RL ( EState* s )$/;"	f	typeref:typename:void	file:
flush_cache	arch/arc/lib/cache.c	/^void flush_cache(unsigned long start, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/arm/lib/cache.c	/^__weak void flush_cache(unsigned long start, unsigned long size)$/;"	f	typeref:typename:__weak void
flush_cache	arch/avr32/cpu/cache.c	/^void  flush_cache (unsigned long start_addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/blackfin/lib/cache.c	/^void flush_cache(unsigned long addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/m68k/lib/cache.c	/^void flush_cache(ulong start_addr, ulong size)$/;"	f	typeref:typename:void
flush_cache	arch/microblaze/cpu/cache.c	/^void flush_cache (ulong addr, ulong size)$/;"	f	typeref:typename:void
flush_cache	arch/mips/lib/cache.c	/^void flush_cache(ulong start_addr, ulong size)$/;"	f	typeref:typename:void
flush_cache	arch/nds32/lib/cache.c	/^void flush_cache(unsigned long addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/nios2/lib/cache.c	/^void flush_cache(unsigned long start, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/openrisc/cpu/cache.c	/^void flush_cache(unsigned long addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/powerpc/lib/cache.c	/^void flush_cache(ulong start_addr, ulong size)$/;"	f	typeref:typename:void
flush_cache	arch/sh/cpu/sh2/cpu.c	/^void flush_cache(unsigned long addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/sh/cpu/sh3/cpu.c	/^void flush_cache(unsigned long addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/sh/cpu/sh4/cpu.c	/^void flush_cache (unsigned long addr, unsigned long size)$/;"	f	typeref:typename:void
flush_cache	arch/sparc/lib/cache.c	/^void flush_cache(ulong start_addr, ulong size)$/;"	f	typeref:typename:void
flush_cache	arch/x86/cpu/cpu.c	/^void  flush_cache(unsigned long dummy1, unsigned long dummy2)$/;"	f	typeref:typename:void
flush_cache	arch/xtensa/lib/cache.c	/^void flush_cache(ulong start_addr, ulong size)$/;"	f	typeref:typename:void
flush_cache	board/sandbox/sandbox.c	/^void flush_cache(unsigned long start, unsigned long size)$/;"	f	typeref:typename:void
flush_cache_wback	drivers/net/sh_eth.c	/^#define flush_cache_wback(/;"	d	file:
flush_dcache	arch/arm/cpu/arm926ejs/start.S	/^flush_dcache:$/;"	l
flush_dcache	arch/powerpc/cpu/mpc83xx/start.S	/^flush_dcache:$/;"	l
flush_dcache	arch/powerpc/cpu/mpc85xx/start.S	/^flush_dcache:$/;"	l
flush_dcache	include/video.h	/^	bool flush_dcache;$/;"	m	struct:video_priv	typeref:typename:bool
flush_dcache_all	arch/arc/lib/cache.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/cpu/arm11/cpu.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/cpu/arm926ejs/cache.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/cpu/armv7/cache_v7.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/cpu/armv8/cache_v8.c	/^inline void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/cpu/armv8/cache_v8.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/cpu/pxa/cache.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/arm/lib/cache.c	/^__weak void flush_dcache_all(void)$/;"	f	typeref:typename:__weak void
flush_dcache_all	arch/nios2/lib/cache.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	arch/xtensa/lib/cache.c	/^void flush_dcache_all(void)$/;"	f	typeref:typename:void
flush_dcache_all	cmd/cache.c	/^void __weak flush_dcache_all(void)$/;"	f	typeref:typename:void __weak
flush_dcache_buffer	drivers/usb/host/ohci-hcd.c	/^#define flush_dcache_buffer(/;"	d	file:
flush_dcache_ed	drivers/usb/host/ohci-hcd.c	/^#define flush_dcache_ed(/;"	d	file:
flush_dcache_hcca	drivers/usb/host/ohci-hcd.c	/^#define flush_dcache_hcca(/;"	d	file:
flush_dcache_iso_td	drivers/usb/host/ohci-hcd.c	/^#define flush_dcache_iso_td(/;"	d	file:
flush_dcache_range	arch/arc/lib/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
flush_dcache_range	arch/arm/cpu/arm11/cpu.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/arm/cpu/arm926ejs/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/arm/cpu/armv7/cache_v7.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/arm/cpu/armv8/cache_v8.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/arm/cpu/pxa/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/arm/lib/cache.c	/^__weak void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:__weak void
flush_dcache_range	arch/avr32/cpu/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/blackfin/lib/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/m68k/lib/cache.c	/^__weak void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:__weak void
flush_dcache_range	arch/mips/lib/cache.c	/^void flush_dcache_range(ulong start_addr, ulong stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/nds32/lib/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
flush_dcache_range	arch/nios2/lib/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
flush_dcache_range	arch/openrisc/cpu/cache.c	/^void flush_dcache_range(unsigned long addr, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/sandbox/cpu/cpu.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/sh/cpu/sh4/cache.c	/^void flush_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
flush_dcache_range	arch/x86/cpu/cpu.c	/^void flush_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
flush_dcache_range	arch/xtensa/lib/cache.c	/^void flush_dcache_range(ulong start_addr, ulong end_addr)$/;"	f	typeref:typename:void
flush_dcache_range	examples/standalone/test_burst_lib.S	/^flush_dcache_range:$/;"	l
flush_dcache_td	drivers/usb/host/ohci-hcd.c	/^#define flush_dcache_td(/;"	d	file:
flush_dir_table	fs/fat/fat_write.c	/^static void flush_dir_table(fsdata *mydata, dir_entry **dentptr)$/;"	f	typeref:typename:void	file:
flush_dirty_fat_buffer	fs/fat/fat_write.c	/^static int flush_dirty_fat_buffer(fsdata *mydata)$/;"	f	typeref:typename:int	file:
flush_ext	drivers/block/fsl_sata.h	/^	int		flush_ext;$/;"	m	struct:fsl_sata	typeref:typename:int
flush_ext	drivers/block/sata_sil.h	/^	int		flush_ext;$/;"	m	struct:sil_sata	typeref:typename:int
flush_fifo	drivers/i2c/omap24xx_i2c.c	/^static void flush_fifo(struct i2c *i2c_base)$/;"	f	typeref:typename:void	file:
flush_icache	arch/powerpc/cpu/mpc85xx/start.S	/^flush_icache:$/;"	l
flush_l1_v6	arch/arm/mach-mvebu/lowlevel_spl.S	/^	flush_l1_v6:$/;"	l
flush_l1_v7	arch/arm/mach-mvebu/lowlevel_spl.S	/^	flush_l1_v7:$/;"	l
flush_levels	arch/arm/cpu/armv7/cache_v7_asm.S	/^flush_levels:$/;"	l
flush_levels	arch/arm/cpu/armv7/psci.S	/^flush_levels:$/;"	l
flush_medium	include/dfu.h	/^	int (*flush_medium)(struct dfu_entity *dfu);$/;"	m	struct:dfu_entity	typeref:typename:int (*)(struct dfu_entity * dfu)
flush_pending	lib/zlib/deflate.c	/^local void flush_pending(strm)$/;"	f
flush_rx	drivers/i2c/davinci_i2c.c	/^static void flush_rx(struct i2c_adapter *adap)$/;"	f	typeref:typename:void	file:
flush_size	arch/x86/include/asm/acpi_table.h	/^	u16 flush_size;$/;"	m	struct:acpi_fadt	typeref:typename:u16
flush_stride	arch/x86/include/asm/acpi_table.h	/^	u16 flush_stride;$/;"	m	struct:acpi_fadt	typeref:typename:u16
flushinv_all_dcache	arch/blackfin/lib/cache.c	/^static void flushinv_all_dcache(void)$/;"	f	typeref:typename:void	file:
flvalsig	tools/ifdtool.h	/^	uint32_t flvalsig;$/;"	m	struct:fdbar_t	typeref:typename:uint32_t
flx0_clk	arch/arm/dts/sama5d2.dtsi	/^					flx0_clk: flx0_clk@19 {$/;"	l
flx1_clk	arch/arm/dts/sama5d2.dtsi	/^					flx1_clk: flx1_clk@20 {$/;"	l
flx2_clk	arch/arm/dts/sama5d2.dtsi	/^					flx2_clk: flx2_clk@21 {$/;"	l
flx3_clk	arch/arm/dts/sama5d2.dtsi	/^					flx3_clk: flx3_clk@22 {$/;"	l
flx4_clk	arch/arm/dts/sama5d2.dtsi	/^					flx4_clk: flx4_clk@23 {$/;"	l
fm	drivers/mtd/ubi/ubi.h	/^	struct ubi_fastmap_layout *fm;$/;"	m	struct:ubi_device	typeref:struct:ubi_fastmap_layout *
fm	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_fastmap_layout	*fm;$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_fastmap_layout *
fm	include/fm_eth.h	/^	u8 fm;$/;"	m	struct:fm_eth_info	typeref:typename:u8
fm_10gec	include/fsl_fman.h	/^		fm_10gec_t		fm_10gec;$/;"	m	struct:ccsr_fman::__anonbe262a140408	typeref:typename:fm_10gec_t
fm_10gec	include/fsl_fman.h	/^typedef struct fm_10gec {$/;"	s
fm_10gec_mdio	include/fsl_fman.h	/^		fm_10gec_mdio_t		fm_10gec_mdio;$/;"	m	struct:ccsr_fman::__anonbe262a140408	typeref:typename:fm_10gec_mdio_t
fm_10gec_mdio	include/fsl_fman.h	/^typedef struct fm_10gec_mdio {$/;"	s
fm_10gec_mdio_t	include/fsl_fman.h	/^} fm_10gec_mdio_t;$/;"	t	typeref:struct:fm_10gec_mdio
fm_10gec_t	include/fsl_fman.h	/^} fm_10gec_t;$/;"	t	typeref:struct:fm_10gec
fm_1588	include/fsl_fman.h	/^	fm_1588_t		fm_1588;$/;"	m	struct:ccsr_fman	typeref:typename:fm_1588_t
fm_1588	include/fsl_fman.h	/^typedef struct fm_1588 {$/;"	s
fm_1588_t	include/fsl_fman.h	/^} fm_1588_t;$/;"	t	typeref:struct:fm_1588
fm_assign_risc	drivers/net/fm/fm.c	/^static u32 fm_assign_risc(int port_id)$/;"	f	typeref:typename:u32	file:
fm_autoconvert	drivers/mtd/ubi/build.c	/^static bool fm_autoconvert = CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT;$/;"	v	typeref:typename:bool	file:
fm_autoconvert	drivers/mtd/ubi/build.c	/^static bool fm_autoconvert;$/;"	v	typeref:typename:bool	file:
fm_bmi	include/fsl_fman.h	/^		fm_bmi_t	fm_bmi;$/;"	m	struct:ccsr_fman::__anonbe262a140108	typeref:typename:fm_bmi_t
fm_bmi	include/fsl_fman.h	/^typedef struct fm_bmi {$/;"	s
fm_bmi_common	include/fsl_fman.h	/^	fm_bmi_common_t		fm_bmi_common;$/;"	m	struct:ccsr_fman	typeref:typename:fm_bmi_common_t
fm_bmi_common	include/fsl_fman.h	/^typedef struct fm_bmi_common {$/;"	s
fm_bmi_common_t	include/fsl_fman.h	/^} fm_bmi_common_t;$/;"	t	typeref:struct:fm_bmi_common
fm_bmi_rx_port	include/fsl_fman.h	/^struct fm_bmi_rx_port {$/;"	s
fm_bmi_t	include/fsl_fman.h	/^} fm_bmi_t;$/;"	t	typeref:struct:fm_bmi
fm_bmi_tx_port	include/fsl_fman.h	/^struct fm_bmi_tx_port {$/;"	s
fm_buf	drivers/mtd/ubi/ubi.h	/^	void *fm_buf;$/;"	m	struct:ubi_device	typeref:typename:void *
fm_buf	drivers/mtd/ubispl/ubispl.h	/^	uint8_t				fm_buf[UBI_FM_BUF_SIZE];$/;"	m	struct:ubi_scan_info	typeref:typename:uint8_t[]
fm_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 fm_cntrl;		\/* MBAR_ETH + 0x180 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
fm_debug	drivers/mtd/ubi/build.c	/^static bool fm_debug = CONFIG_MTD_UBI_FM_DEBUG;$/;"	v	typeref:typename:bool	file:
fm_debug	drivers/mtd/ubi/build.c	/^static bool fm_debug;$/;"	v	typeref:typename:bool	file:
fm_dedicated_mdio	include/fsl_fman.h	/^	fm_memac_mdio_t		fm_dedicated_mdio[2];$/;"	m	struct:ccsr_fman	typeref:typename:fm_memac_mdio_t[2]
fm_disable_port	drivers/net/fm/init.c	/^void fm_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fm_disabled	drivers/mtd/ubi/ubi.h	/^	int fm_disabled;$/;"	m	struct:ubi_device	typeref:typename:int
fm_dma	include/fsl_fman.h	/^	fm_dma_t		fm_dma;$/;"	m	struct:ccsr_fman	typeref:typename:fm_dma_t
fm_dma	include/fsl_fman.h	/^typedef struct fm_dma {$/;"	s
fm_dma_t	include/fsl_fman.h	/^} fm_dma_t;$/;"	t	typeref:struct:fm_dma
fm_dtesc	include/fsl_fman.h	/^		fm_dtsec_t	fm_dtesc;$/;"	m	struct:ccsr_fman::__anonbe262a140308	typeref:typename:fm_dtsec_t
fm_dtesc	include/fsl_fman.h	/^typedef struct fm_dtesc {$/;"	s
fm_dtsec_t	include/fsl_fman.h	/^} fm_dtsec_t;$/;"	t	typeref:struct:fm_dtesc
fm_eba_sem	drivers/mtd/ubi/ubi.h	/^	struct rw_semaphore fm_eba_sem;$/;"	m	struct:ubi_device	typeref:struct:rw_semaphore
fm_enable_port	drivers/net/fm/init.c	/^void fm_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fm_enabled	drivers/mtd/ubispl/ubispl.h	/^	int				fm_enabled;$/;"	m	struct:ubi_scan_info	typeref:typename:int
fm_eth	drivers/net/fm/fm.h	/^struct fm_eth {$/;"	s
fm_eth_halt	drivers/net/fm/eth.c	/^static void fm_eth_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
fm_eth_info	include/fm_eth.h	/^struct fm_eth_info {$/;"	s
fm_eth_init	drivers/net/fm/eth.c	/^static int fm_eth_init(struct fm_eth *fm_eth)$/;"	f	typeref:typename:int	file:
fm_eth_init_mac	drivers/net/fm/eth.c	/^static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)$/;"	f	typeref:typename:int	file:
fm_eth_initialize	drivers/net/fm/eth.c	/^int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)$/;"	f	typeref:typename:int
fm_eth_open	drivers/net/fm/eth.c	/^static int fm_eth_open(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
fm_eth_recv	drivers/net/fm/eth.c	/^static int fm_eth_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
fm_eth_rx_port_parameter_init	drivers/net/fm/eth.c	/^static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)$/;"	f	typeref:typename:int	file:
fm_eth_send	drivers/net/fm/eth.c	/^static int fm_eth_send(struct eth_device *dev, void *buf, int len)$/;"	f	typeref:typename:int	file:
fm_eth_startup	drivers/net/fm/eth.c	/^static int fm_eth_startup(struct fm_eth *fm_eth)$/;"	f	typeref:typename:int	file:
fm_eth_tx_port_parameter_init	drivers/net/fm/eth.c	/^static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)$/;"	f	typeref:typename:int	file:
fm_eth_type	include/fm_eth.h	/^enum fm_eth_type {$/;"	g
fm_fpm	include/fsl_fman.h	/^	fm_fpm_t		fm_fpm;$/;"	m	struct:ccsr_fman	typeref:typename:fm_fpm_t
fm_fpm	include/fsl_fman.h	/^typedef struct fm_fpm {$/;"	s
fm_fpm_t	include/fsl_fman.h	/^} fm_fpm_t;$/;"	t	typeref:struct:fm_fpm
fm_imem	include/fsl_fman.h	/^	fm_imem_t		fm_imem;$/;"	m	struct:ccsr_fman	typeref:typename:fm_imem_t
fm_imem	include/fsl_fman.h	/^typedef struct fm_imem {$/;"	s
fm_imem_t	include/fsl_fman.h	/^} fm_imem_t;$/;"	t	typeref:struct:fm_imem
fm_index	drivers/net/fm/fm.h	/^	int fm_index;			\/* Fman index *\/$/;"	m	struct:fm_eth	typeref:typename:int
fm_info	drivers/net/fm/init.c	/^struct fm_eth_info fm_info[] = {$/;"	v	typeref:struct:fm_eth_info[]
fm_info_get_enet_if	drivers/net/fm/init.c	/^phy_interface_t fm_info_get_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fm_info_get_phy_address	drivers/net/fm/init.c	/^int fm_info_get_phy_address(enum fm_port port)$/;"	f	typeref:typename:int
fm_info_set_mdio	drivers/net/fm/init.c	/^void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)$/;"	f	typeref:typename:void
fm_info_set_phy_address	drivers/net/fm/init.c	/^void fm_info_set_phy_address(enum fm_port port, int address)$/;"	f	typeref:typename:void
fm_init_bmi	drivers/net/fm/fm.c	/^static int fm_init_bmi(int fm_idx, struct fm_bmi_common *bmi)$/;"	f	typeref:typename:int	file:
fm_init_common	drivers/net/fm/fm.c	/^int fm_init_common(int index, struct ccsr_fman *reg)$/;"	f	typeref:typename:int
fm_init_fpm	drivers/net/fm/fm.c	/^static void fm_init_fpm(struct fm_fpm *fpm)$/;"	f	typeref:typename:void	file:
fm_init_muram	drivers/net/fm/fm.c	/^static void fm_init_muram(int fm_idx, void *reg)$/;"	f	typeref:typename:void	file:
fm_init_qmi	drivers/net/fm/fm.c	/^static void fm_init_qmi(struct fm_qmi_common *qmi)$/;"	f	typeref:typename:void	file:
fm_ip_rev_1	include/fsl_fman.h	/^	u32	fm_ip_rev_1;	\/* IP block revision 1 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fm_ip_rev_2	include/fsl_fman.h	/^	u32	fm_ip_rev_2;	\/* IP block revision 2 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fm_keygen	include/fsl_fman.h	/^	fm_keygen_t		fm_keygen;$/;"	m	struct:ccsr_fman	typeref:typename:fm_keygen_t
fm_keygen	include/fsl_fman.h	/^typedef struct fm_keygen {$/;"	s
fm_keygen_t	include/fsl_fman.h	/^} fm_keygen_t;$/;"	t	typeref:struct:fm_keygen
fm_layout	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_fastmap_layout	fm_layout;$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_fastmap_layout
fm_mdio	include/fsl_fman.h	/^		fm_mdio_t	fm_mdio;$/;"	m	struct:ccsr_fman::__anonbe262a140308	typeref:typename:fm_mdio_t
fm_mdio	include/fsl_fman.h	/^typedef struct fm_mdio {$/;"	s
fm_mdio_t	include/fsl_fman.h	/^} fm_mdio_t;$/;"	t	typeref:struct:fm_mdio
fm_memac	include/fsl_fman.h	/^		fm_memac_t		fm_memac;$/;"	m	struct:ccsr_fman::__anonbe262a140208	typeref:typename:fm_memac_t
fm_memac	include/fsl_fman.h	/^typedef struct fm_memac {$/;"	s
fm_memac_mdio	include/fsl_fman.h	/^		fm_memac_mdio_t		fm_memac_mdio;$/;"	m	struct:ccsr_fman::__anonbe262a140208	typeref:typename:fm_memac_mdio_t
fm_memac_mdio	include/fsl_fman.h	/^typedef struct fm_memac_mdio {$/;"	s
fm_memac_mdio_init	drivers/net/fm/memac_phy.c	/^int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info)$/;"	f	typeref:typename:int
fm_memac_mdio_t	include/fsl_fman.h	/^} fm_memac_mdio_t;$/;"	t	typeref:struct:fm_memac_mdio
fm_memac_t	include/fsl_fman.h	/^} fm_memac_t;$/;"	t	typeref:struct:fm_memac
fm_muram	drivers/net/fm/fm.h	/^struct fm_muram {$/;"	s
fm_muram_alloc	drivers/net/fm/fm.c	/^void *fm_muram_alloc(int fm_idx, size_t size, ulong align)$/;"	f	typeref:typename:void *
fm_muram_base	drivers/net/fm/fm.c	/^void *fm_muram_base(int fm_idx)$/;"	f	typeref:typename:void *
fm_parser	include/fsl_fman.h	/^		fm_parser_t	fm_parser;$/;"	m	struct:ccsr_fman::__anonbe262a140108	typeref:typename:fm_parser_t
fm_parser	include/fsl_fman.h	/^typedef struct fm_parser {$/;"	s
fm_parser_t	include/fsl_fman.h	/^} fm_parser_t;$/;"	t	typeref:struct:fm_parser
fm_policer	include/fsl_fman.h	/^	fm_policer_t		fm_policer;$/;"	m	struct:ccsr_fman	typeref:typename:fm_policer_t
fm_policer	include/fsl_fman.h	/^typedef struct fm_policer {$/;"	s
fm_policer_t	include/fsl_fman.h	/^} fm_policer_t;$/;"	t	typeref:struct:fm_policer
fm_pool	drivers/mtd/ubi/ubi.h	/^	struct ubi_fm_pool fm_pool;$/;"	m	struct:ubi_device	typeref:struct:ubi_fm_pool
fm_pool	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_fm_pool		fm_pool;$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_fm_pool
fm_port	include/fm_eth.h	/^enum fm_port {$/;"	g
fm_port_bd	drivers/net/fm/fm.h	/^struct fm_port_bd {$/;"	s
fm_port_global_pram	drivers/net/fm/fm.h	/^struct fm_port_global_pram {$/;"	s
fm_port_qd	drivers/net/fm/fm.h	/^struct fm_port_qd {$/;"	s
fm_port_to_index	drivers/net/fm/init.c	/^static int fm_port_to_index(enum fm_port port)$/;"	f	typeref:typename:int	file:
fm_protect	drivers/mtd/ubi/ubi.h	/^	struct rw_semaphore fm_protect;$/;"	m	struct:ubi_device	typeref:struct:rw_semaphore
fm_qmi	include/fsl_fman.h	/^		fm_qmi_t	fm_qmi;$/;"	m	struct:ccsr_fman::__anonbe262a140108	typeref:typename:fm_qmi_t
fm_qmi	include/fsl_fman.h	/^typedef struct fm_qmi {$/;"	s
fm_qmi_common	include/fsl_fman.h	/^	fm_qmi_common_t		fm_qmi_common;$/;"	m	struct:ccsr_fman	typeref:typename:fm_qmi_common_t
fm_qmi_common	include/fsl_fman.h	/^typedef struct fm_qmi_common {$/;"	s
fm_qmi_common_t	include/fsl_fman.h	/^} fm_qmi_common_t;$/;"	t	typeref:struct:fm_qmi_common
fm_qmi_t	include/fsl_fman.h	/^} fm_qmi_t;$/;"	t	typeref:struct:fm_qmi
fm_sb	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_fm_sb		fm_sb;$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_fm_sb
fm_size	drivers/mtd/ubi/ubi.h	/^	size_t fm_size;$/;"	m	struct:ubi_device	typeref:typename:size_t
fm_size	drivers/mtd/ubispl/ubispl.h	/^	size_t				fm_size;$/;"	m	struct:ubi_scan_info	typeref:typename:size_t
fm_soft_parser	include/fsl_fman.h	/^	fm_soft_parser_t	fm_soft_parser;$/;"	m	struct:ccsr_fman	typeref:typename:fm_soft_parser_t
fm_soft_parser	include/fsl_fman.h	/^typedef struct fm_soft_parser {$/;"	s
fm_soft_parser_t	include/fsl_fman.h	/^} fm_soft_parser_t;$/;"	t	typeref:struct:fm_soft_parser
fm_standard_init	drivers/net/fm/init.c	/^int fm_standard_init(bd_t *bis)$/;"	f	typeref:typename:int
fm_tgec_mdio_init	drivers/net/fm/tgec_phy.c	/^int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info)$/;"	f	typeref:typename:int
fm_upload_ucode	drivers/net/fm/fm.c	/^static void fm_upload_ucode(int fm_idx, struct fm_imem *imem,$/;"	f	typeref:typename:void	file:
fm_used	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			fm_used[UBI_FM_BM_SIZE];$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long[]
fm_vh	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_vid_hdr		fm_vh;$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_vid_hdr
fm_wl_pool	drivers/mtd/ubi/ubi.h	/^	struct ubi_fm_pool fm_wl_pool;$/;"	m	struct:ubi_device	typeref:struct:ubi_fm_pool
fm_wl_pool	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_fm_pool		fm_wl_pool;$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_fm_pool
fm_work	drivers/mtd/ubi/ubi.h	/^	struct work_struct fm_work;$/;"	m	struct:ubi_device	typeref:struct:work_struct
fm_work_scheduled	drivers/mtd/ubi/ubi.h	/^	int fm_work_scheduled;$/;"	m	struct:ubi_device	typeref:typename:int
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct fman_liodn_id_table fman1_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman1_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);$/;"	v	typeref:typename:int
fman2_liodn_tbl	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct fman_liodn_id_table fman2_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman2_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct fman_liodn_id_table fman2_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman2_liodn_tbl	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct fman_liodn_id_table fman2_liodn_tbl[] = {$/;"	v	typeref:struct:fman_liodn_id_table[]
fman2_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);$/;"	v	typeref:typename:int
fman2_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);$/;"	v	typeref:typename:int
fman2_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);$/;"	v	typeref:typename:int
fman_disable_port	drivers/net/fm/b4860.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/ls1043.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/ls1046.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/p1023.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/p4080.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/p5020.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/p5040.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/t1024.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/t2080.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_disable_port	drivers/net/fm/t4240.c	/^void fman_disable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enable_port	drivers/net/fm/b4860.c	/^void fman_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enable_port	drivers/net/fm/p1023.c	/^void fman_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enable_port	drivers/net/fm/p4080.c	/^void fman_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enable_port	drivers/net/fm/p5020.c	/^void fman_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enable_port	drivers/net/fm/p5040.c	/^void fman_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enable_port	drivers/net/fm/t4240.c	/^void fman_enable_port(enum fm_port port)$/;"	f	typeref:typename:void
fman_enet_init	drivers/net/fm/init.c	/^void fman_enet_init(void)$/;"	f	typeref:typename:void
fman_liodn_id_table	arch/powerpc/include/asm/fsl_liodn.h	/^struct fman_liodn_id_table {$/;"	s
fman_port_enet_if	drivers/net/fm/b4860.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/ls1043.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/ls1046.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/p1023.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/p4080.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/p5020.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/p5040.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/t1024.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/t1040.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/t2080.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_port_enet_if	drivers/net/fm/t4240.c	/^phy_interface_t fman_port_enet_if(enum fm_port port)$/;"	f	typeref:typename:phy_interface_t
fman_upload_firmware	drivers/net/fm/fm.c	/^static int fman_upload_firmware(int fm_idx,$/;"	f	typeref:typename:int	file:
fmap_compress_t	include/fdtdec.h	/^enum fmap_compress_t {$/;"	g
fmap_entry	include/fdtdec.h	/^struct fmap_entry {$/;"	s
fmap_hash_t	include/fdtdec.h	/^enum fmap_hash_t {$/;"	g
fmba_t	tools/ifdtool.h	/^struct __packed fmba_t {$/;"	s
fmbm_acnt	include/fsl_fman.h	/^	u32 fmbm_acnt[0x8];	\/* allocate counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x8]
fmbm_arb	include/fsl_fman.h	/^	u32	fmbm_arb[0x8];	\/* BMI arbitration *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x8]
fmbm_cfg1	include/fsl_fman.h	/^	u32	fmbm_cfg1;	\/* BMI configuration1 *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_cfg2	include/fsl_fman.h	/^	u32	fmbm_cfg2;	\/* BMI configuration2 *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_cgm	include/fsl_fman.h	/^	u32 fmbm_cgm[0x8];	\/* congestion group map *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x8]
fmbm_ebmpi	include/fsl_fman.h	/^	u32 fmbm_ebmpi[0x8];	\/* buffer manager pool information *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x8]
fmbm_gde	include/fsl_fman.h	/^	u32	fmbm_gde;	\/* global debug enable *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_ier	include/fsl_fman.h	/^	u32	fmbm_ier;	\/* interrupt enable register *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_ievr	include/fsl_fman.h	/^	u32	fmbm_ievr;	\/* interrupt event register *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_ifr	include/fsl_fman.h	/^	u32	fmbm_ifr;	\/* interrupt force register *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_init	include/fsl_fman.h	/^	u32	fmbm_init;	\/* BMI initialization *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32
fmbm_mpd	include/fsl_fman.h	/^	u32 fmbm_mpd;		\/* BMan pool depletion *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_pfs	include/fsl_fman.h	/^	u32	fmbm_pfs[0x3f];	\/* BMI port FIFO size *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x3f]
fmbm_pp	include/fsl_fman.h	/^	u32	fmbm_pp[0x3f];	\/* BMI port parameters *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x3f]
fmbm_ppid	include/fsl_fman.h	/^	u32	fmbm_ppid[0x3f];\/* port partition ID *\/$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x3f]
fmbm_rbdc	include/fsl_fman.h	/^	u32 fmbm_rbdc;		\/* Rx buffers deallocate counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rccb	include/fsl_fman.h	/^	u32 fmbm_rccb;	\/* Rx coarse classification base *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rccn	include/fsl_fman.h	/^	u32 fmbm_rccn;		\/* Rx cycle counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rcfg	include/fsl_fman.h	/^	u32 fmbm_rcfg;	\/* Rx configuration *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rda	include/fsl_fman.h	/^	u32 fmbm_rda;	\/* Rx DMA attributes *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rdbg	include/fsl_fman.h	/^	u32 fmbm_rdbg;		\/* Rx debug configuration *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rduc	include/fsl_fman.h	/^	u32 fmbm_rduc;		\/* Rx DMA utilization counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rebm	include/fsl_fman.h	/^	u32 fmbm_rebm;	\/* Rx external buffer margins *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_refqid	include/fsl_fman.h	/^	u32 fmbm_refqid;	\/* Rx error frame queue ID *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfbc	include/fsl_fman.h	/^	u32 fmbm_rfbc;		\/* Rx bad frames counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfca	include/fsl_fman.h	/^	u32 fmbm_rfca;	\/* Rx frame command attributes *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfdc	include/fsl_fman.h	/^	u32 fmbm_rfdc;		\/* Rx frame discard counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfed	include/fsl_fman.h	/^	u32 fmbm_rfed;	\/* Rx frame end data *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfene	include/fsl_fman.h	/^	u32 fmbm_rfene;		\/* Rx frame enqueue next engine *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rffc	include/fsl_fman.h	/^	u32 fmbm_rffc;		\/* Rx filter frames counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfldec	include/fsl_fman.h	/^	u32 fmbm_rfldec;	\/* Rx frames list DMA error counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfne	include/fsl_fman.h	/^	u32 fmbm_rfne;	\/* Rx frame next engine *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfp	include/fsl_fman.h	/^	u32 fmbm_rfp;	\/* Rx FIFO parameters *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfpne	include/fsl_fman.h	/^	u32 fmbm_rfpne;	\/* Rx frame parser next engine *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfqid	include/fsl_fman.h	/^	u32 fmbm_rfqid;		\/* Rx frame queue ID *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfrc	include/fsl_fman.h	/^	u32 fmbm_rfrc;		\/* Rx frame counters *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfsdm	include/fsl_fman.h	/^	u32 fmbm_rfsdm;		\/* Rx frame status discard mask *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfsem	include/fsl_fman.h	/^	u32 fmbm_rfsem;		\/* Rx frame status error mask *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rfuc	include/fsl_fman.h	/^	u32 fmbm_rfuc;		\/* Rx FIFO utilization counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_ricp	include/fsl_fman.h	/^	u32 fmbm_ricp;	\/* Rx internal context parameters *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rim	include/fsl_fman.h	/^	u32 fmbm_rim;	\/* Rx internal margins *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rlfc	include/fsl_fman.h	/^	u32 fmbm_rlfc;		\/* Rx large frames counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rodc	include/fsl_fman.h	/^	u32 fmbm_rodc;		\/* Rx out of buffers discard counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rpac	include/fsl_fman.h	/^	u32 fmbm_rpac;		\/* Rx pause activation counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rpc	include/fsl_fman.h	/^	u32 fmbm_rpc;		\/* Rx performance counters *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rpcp	include/fsl_fman.h	/^	u32 fmbm_rpcp;		\/* Rx performance count parameters *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rpp	include/fsl_fman.h	/^	u32 fmbm_rpp;	\/* Rx policer profile *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rprai	include/fsl_fman.h	/^	u32 fmbm_rprai[0x8];	\/* Rx parse results array Initialization *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x8]
fmbm_rpso	include/fsl_fman.h	/^	u32 fmbm_rpso;	\/* Rx parse start offset *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rrquc	include/fsl_fman.h	/^	u32 fmbm_rrquc;		\/* Rx receive queue utilization counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rst	include/fsl_fman.h	/^	u32 fmbm_rst;	\/* Rx status *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rstc	include/fsl_fman.h	/^	u32 fmbm_rstc;		\/* Rx statistics counters *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_rtuc	include/fsl_fman.h	/^	u32 fmbm_rtuc;		\/* Rx tasks utilization counter *\/$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32
fmbm_tbdc	include/fsl_fman.h	/^	u32 fmbm_tbdc;	\/* Tx buffers deallocate counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tccn	include/fsl_fman.h	/^	u32 fmbm_tccn;	\/* Tx cycle counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tcfg	include/fsl_fman.h	/^	u32 fmbm_tcfg;	\/* Tx configuration *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tcfqid	include/fsl_fman.h	/^	u32 fmbm_tcfqid;\/* Tx confirmation frame queue ID *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tda	include/fsl_fman.h	/^	u32 fmbm_tda;	\/* Tx DMA attributes *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tdcfg	include/fsl_fman.h	/^	u32 fmbm_tdcfg;	\/* Tx debug configuration *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tduc	include/fsl_fman.h	/^	u32 fmbm_tduc;	\/* Tx DMA utilization counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfca	include/fsl_fman.h	/^	u32 fmbm_tfca;	\/* Tx frame command attributes *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfdc	include/fsl_fman.h	/^	u32 fmbm_tfdc;	\/* Tx frames discard counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfed	include/fsl_fman.h	/^	u32 fmbm_tfed;	\/* Tx frame end data *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfene	include/fsl_fman.h	/^	u32 fmbm_tfene;	\/* Tx frame enqueue next engine *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfeqid	include/fsl_fman.h	/^	u32 fmbm_tfeqid;\/* Tx error frame queue ID *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfledc	include/fsl_fman.h	/^	u32 fmbm_tfledc;\/* Tx frame length error discard counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfne	include/fsl_fman.h	/^	u32 fmbm_tfne;	\/* Tx frame next engine *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfp	include/fsl_fman.h	/^	u32 fmbm_tfp;	\/* Tx FIFO parameters *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfrc	include/fsl_fman.h	/^	u32 fmbm_tfrc;	\/* Tx frame counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfuc	include/fsl_fman.h	/^	u32 fmbm_tfuc;	\/* Tx FIFO utilization counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tfufdc	include/fsl_fman.h	/^	u32 fmbm_tfufdc;\/* Tx frame unsupported format discard counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_ticp	include/fsl_fman.h	/^	u32 fmbm_ticp;	\/* Tx internal context parameters *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tpc	include/fsl_fman.h	/^	u32 fmbm_tpc;	\/* Tx performance counters *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tpcp	include/fsl_fman.h	/^	u32 fmbm_tpcp;	\/* Tx performance count parameters *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_trlmt	include/fsl_fman.h	/^	u32 fmbm_trlmt;	\/* Tx rate limiter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_trlmts	include/fsl_fman.h	/^	u32 fmbm_trlmts;\/* Tx rate limiter scale *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tst	include/fsl_fman.h	/^	u32 fmbm_tst;	\/* Tx status *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_tstc	include/fsl_fman.h	/^	u32 fmbm_tstc;	\/* Tx statistics counters *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_ttcquc	include/fsl_fman.h	/^	u32 fmbm_ttcquc;\/* Tx transmit confirm queue utilization counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmbm_ttuc	include/fsl_fman.h	/^	u32 fmbm_ttuc;	\/* Tx tasks utilization counter *\/$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32
fmc	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 fmc;		\/* 0x180 *\/$/;"	m	struct:fecdma	typeref:typename:u32
fmc_setup_gpio	board/st/stm32f429-discovery/stm32f429-discovery.c	/^static int fmc_setup_gpio(void)$/;"	f	typeref:typename:int	file:
fmc_setup_gpio	board/st/stm32f746-disco/stm32f746-disco.c	/^static int fmc_setup_gpio(void)$/;"	f	typeref:typename:int	file:
fmc_tx_port_graceful_stop_disable	drivers/net/fm/eth.c	/^static void fmc_tx_port_graceful_stop_disable(struct fm_eth *fm_eth)$/;"	f	typeref:typename:void	file:
fmc_tx_port_graceful_stop_enable	drivers/net/fm/eth.c	/^static void fmc_tx_port_graceful_stop_enable(struct fm_eth *fm_eth)$/;"	f	typeref:typename:void	file:
fmcld	include/fsl_fman.h	/^	u32	fmcld;		\/* classifier debug control *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fmclkdpslpcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 fmclkdpslpcr;\/* 0x00c FM Clock Deep Sleep Control register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
fmcr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 fmcr;$/;"	m	struct:system_control_regs	typeref:typename:u32
fmdmdcr	include/fsl_fman.h	/^	u32	fmdmdcr;	\/* debug counter *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmemsr	include/fsl_fman.h	/^	u32	fmdmemsr;	\/* emrgency smoother register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmhy	include/fsl_fman.h	/^	u32	fmdmhy;		\/* bus hysteresis register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmmr	include/fsl_fman.h	/^	u32	fmdmmr;		\/* mode register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmplr	include/fsl_fman.h	/^	u32	fmdmplr[32];	\/* FM DMA PID-LIODN # register *\/$/;"	m	struct:fm_dma	typeref:typename:u32[32]
fmdmra	include/fsl_fman.h	/^	u32	fmdmra;		\/* DMA bus internal ram address register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmrd	include/fsl_fman.h	/^	u32	fmdmrd;		\/* DMA bus internal ram data register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmsetr	include/fsl_fman.h	/^	u32	fmdmsetr;	\/* SOS emergency threshold register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmsr	include/fsl_fman.h	/^	u32	fmdmsr;		\/* status register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmtah	include/fsl_fman.h	/^	u32	fmdmtah;	\/* transfer bus address high register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmtal	include/fsl_fman.h	/^	u32	fmdmtal;	\/* transfer bus address low register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmtcid	include/fsl_fman.h	/^	u32	fmdmtcid;	\/* transfer bus communication ID register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmdmtr	include/fsl_fman.h	/^	u32	fmdmtr;		\/* bus threshold register *\/$/;"	m	struct:fm_dma	typeref:typename:u32
fmemclk	arch/arm/include/asm/setup.h	/^	u32 fmemclk;$/;"	m	struct:tag_memclk	typeref:typename:u32
fmepi	include/fsl_fman.h	/^	u32	fmepi;		\/* error pending interrupts *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fmfp_ps	include/fsl_fman.h	/^	u32	fmfp_ps[0x40];	\/* port status *\/$/;"	m	struct:fm_fpm	typeref:typename:u32[0x40]
fmfpee	include/fsl_fman.h	/^	u32	fmfpee;		\/* event and enable *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fmin	lib/bzip2/bzlib_blocksort.c	/^#define fmin(/;"	d	file:
fminterval	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	fminterval;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fminterval	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	fminterval;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fminterval	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 fminterval;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fminterval	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 fminterval;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fminterval	drivers/usb/host/ohci.h	/^	__u32	fminterval;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmnpi	include/fsl_fman.h	/^	u32	fmnpi;		\/* normal pending interrupts *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fmnumber	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	fmnumber;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmnumber	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	fmnumber;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmnumber	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 fmnumber;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmnumber	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 fmnumber;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmnumber	drivers/usb/host/ohci.h	/^	__u32	fmnumber;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmqm_dc0	include/fsl_fman.h	/^	u32	fmqm_dc0;	\/* dequeue counter 0 *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dc1	include/fsl_fman.h	/^	u32	fmqm_dc1;	\/* dequeue counter 1 *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dc2	include/fsl_fman.h	/^	u32	fmqm_dc2;	\/* dequeue counter 2 *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dc3	include/fsl_fman.h	/^	u32	fmqm_dc3;	\/* dequeue counter 3 *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dcc	include/fsl_fman.h	/^	u32	fmqm_dcc;	\/* dequeue confirm counter *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dfcc	include/fsl_fman.h	/^	u32	fmqm_dfcc;	\/* dequeue FQID from context counter *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dffc	include/fsl_fman.h	/^	u32	fmqm_dffc;	\/* dequeue FQID from FD counter *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dfnoc	include/fsl_fman.h	/^	u32	fmqm_dfnoc;	\/* dequeue FQID not override counter *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dtfc	include/fsl_fman.h	/^	u32	fmqm_dtfc;	\/* dequeue total frame counter *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_dtrc	include/fsl_fman.h	/^	u32	fmqm_dtrc;	\/* debug trap configuration register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_efddd	include/fsl_fman.h	/^	u32	fmqm_efddd;	\/* enqueue frame descriptor dynamic debug *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_eie	include/fsl_fman.h	/^	u32	fmqm_eie;	\/* error interrupt event register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_eien	include/fsl_fman.h	/^	u32	fmqm_eien;	\/* error interrupt enable register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_eif	include/fsl_fman.h	/^	u32	fmqm_eif;	\/* error interrupt force register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_etfc	include/fsl_fman.h	/^	u32	fmqm_etfc;	\/* enqueue total frame counter *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_gc	include/fsl_fman.h	/^	u32	fmqm_gc;	\/* general configuration register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_gs	include/fsl_fman.h	/^	u32	fmqm_gs;	\/* global status register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_ie	include/fsl_fman.h	/^	u32	fmqm_ie;	\/* interrupt event register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_ien	include/fsl_fman.h	/^	u32	fmqm_ien;	\/* interrupt enable register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_if	include/fsl_fman.h	/^	u32	fmqm_if;	\/* interrupt force register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmqm_ts	include/fsl_fman.h	/^	u32	fmqm_ts;	\/* task status register *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32
fmr	arch/arm/mach-at91/include/mach/at91_eefc.h	/^	u32	fmr;	\/* Flash Mode Register RW *\/$/;"	m	struct:at91_eefc	typeref:typename:u32
fmr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     fmr;            \/* Flash Mode Register *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
fmr	drivers/i2c/at91_i2c.h	/^	u32 fmr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
fmr	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int fmr;       \/* FCM Flash Mode Register value     *\/$/;"	m	struct:fsl_elbc_mtd	typeref:typename:unsigned int	file:
fmremaining	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	fmremaining;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmremaining	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	fmremaining;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmremaining	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 fmremaining;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmremaining	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 fmremaining;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmremaining	drivers/usb/host/ohci.h	/^	__u32	fmremaining;$/;"	m	struct:ohci_regs	typeref:typename:__u32
fmrie	include/fsl_fman.h	/^	u32	fmrie;		\/* rams interrupt enable *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fmrstc	include/fsl_fman.h	/^	u32	fmrstc;		\/* reset command *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fmsba_t	tools/ifdtool.h	/^struct __packed fmsba_t {$/;"	s
fmsickcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 fmsickcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
fmsockcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 fmsockcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
fmt	arch/arm/include/asm/arch-tegra20/display.h	/^	enum win_color_depth_id fmt;	\/* Color depth\/format *\/$/;"	m	struct:disp_ctl_win	typeref:enum:win_color_depth_id
fmt	drivers/rtc/ds1302.c	/^	unsigned char fmt:1;		\/* 1=12 hour 0=24 hour *\/$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:1	file:
fmt	drivers/sound/max98095.c	/^	unsigned int fmt;$/;"	m	struct:max98095_priv	typeref:typename:unsigned int	file:
fmt0	drivers/spi/davinci_spi.c	/^	dv_reg	fmt0;		\/* 0x50 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
fmt1	drivers/spi/davinci_spi.c	/^	dv_reg	fmt1;		\/* 0x54 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
fmt2	drivers/spi/davinci_spi.c	/^	dv_reg	fmt2;		\/* 0x58 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
fmt3	drivers/spi/davinci_spi.c	/^	dv_reg	fmt3;		\/* 0x5c *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
fmt_cfg	drivers/video/mx3fb.c	/^static struct pixel_fmt_cfg fmt_cfg[] = {$/;"	v	typeref:struct:pixel_fmt_cfg[]	file:
fmt_gap	cmd/fdc.c	/^	unsigned char	fmt_gap;\/* gap2 size *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned char	file:
fmt_version	fs/ubifs/ubifs-media.h	/^	__le32 fmt_version;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
fmt_version	fs/ubifs/ubifs.h	/^	int fmt_version;$/;"	m	struct:ubifs_info	typeref:typename:int
fn	arch/nds32/include/asm/setup.h	/^	void (*fn)(char **p);$/;"	m	struct:early_params	typeref:typename:void (*)(char ** p)
fn_keycode	include/key_matrix.h	/^	const u8 *fn_keycode;           \/* ...when Fn held down *\/$/;"	m	struct:key_matrix	typeref:typename:const u8 *
fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
fn_pos	include/key_matrix.h	/^	int fn_pos;                     \/* position of Fn key in key (or -1) *\/$/;"	m	struct:key_matrix	typeref:typename:int
fnacr	arch/m68k/include/asm/immap_5441x.h	/^	u32 fnacr;		\/* 0x24 *\/$/;"	m	struct:ccm	typeref:typename:u32
fname	arch/arm/lib/semihosting.c	/^		const char *fname;$/;"	m	struct:smh_open::smh_open_s	typeref:typename:const char *	file:
fname	tools/ifdtool.c	/^	char *fname;$/;"	m	struct:input_file	typeref:typename:char *	file:
fname	tools/imagetool.h	/^	const char *fname;$/;"	m	struct:content_info	typeref:typename:const char *
fname	tools/patman/patman	/^    fname = os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])),$/;"	v
fname	tools/patman/patman.py	/^    fname = os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])),$/;"	v
fname	tools/pblimage.c	/^static char *fname = "Unknown";$/;"	v	typeref:typename:char *	file:
fname	tools/rkmux.py	/^fname = sys.argv[1]$/;"	v
fnameaddr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t fnameaddr;$/;"	m	struct:cmd_debugfs_fileop_request	typeref:typename:uint32_t
fnamelen	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t fnamelen;$/;"	m	struct:cmd_debugfs_fileop_request	typeref:typename:uint32_t
fnmr	arch/m68k/include/asm/immap_5275.h	/^	u16 fnmr;$/;"	m	struct:usb	typeref:typename:u16
fnr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	fnr;	\/* Force NTRST Register RW *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
fnr	arch/m68k/include/asm/immap_5275.h	/^	u16 fnr;$/;"	m	struct:usb	typeref:typename:u16
fntwidth	drivers/video/ct69000.c	/^#define fntwidth	/;"	d	file:
focusInEvent	scripts/kconfig/qconf.cc	/^void ConfigList::focusInEvent(QFocusEvent *e)$/;"	f	class:ConfigList	typeref:typename:void
followup	common/cli_hush.c	/^	pipe_style followup;		\/* PIPE_BG, PIPE_SEQ, PIPE_OR, PIPE_AND *\/$/;"	m	struct:pipe	typeref:typename:pipe_style	file:
fom	drivers/ddr/altera/sequencer.h	/^	u32 fom;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
fom_in	drivers/ddr/altera/sequencer.h	/^	uint32_t fom_in;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
fom_out	drivers/ddr/altera/sequencer.h	/^	uint32_t fom_out;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
font	drivers/video/console_truetype.c	/^	stbtt_fontinfo font;$/;"	m	struct:console_tt_priv	typeref:typename:stbtt_fontinfo	file:
font_data	drivers/video/console_truetype.c	/^	u8 *font_data;$/;"	m	struct:console_tt_priv	typeref:typename:u8 *	file:
font_info	drivers/video/console_truetype.c	/^struct font_info {$/;"	s	file:
font_size	drivers/video/console_truetype.c	/^	int font_size;$/;"	m	struct:console_tt_priv	typeref:typename:int	file:
font_size	drivers/video/stb_truetype.h	/^   float font_size;$/;"	m	struct:__anonce392f790408	typeref:typename:float
font_size	include/dm/test.h	/^	int font_size;$/;"	m	struct:sandbox_sdl_plat	typeref:typename:int
font_size	include/video.h	/^	int font_size;$/;"	m	struct:video_priv	typeref:typename:int
font_table	drivers/video/console_truetype.c	/^static struct font_info font_table[] = {$/;"	v	typeref:struct:font_info[]	file:
fontstart	drivers/video/stb_truetype.h	/^   int              fontstart;         \/\/ offset of start of font$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
fop	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_debugfs_fileop_request fop;$/;"	m	union:mrq_debugfs_request::__anonb38d4241010a	typeref:struct:cmd_debugfs_fileop_request
fop	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_debugfs_fileop_response fop;$/;"	m	union:mrq_debugfs_response::__anonb38d4241020a	typeref:struct:cmd_debugfs_fileop_response
for	doc/README.x86	/^for more details.$/;"	l
for_active_slave	drivers/net/cpsw.c	/^#define for_active_slave(/;"	d	file:
for_all_choices	scripts/kconfig/expr.h	/^#define for_all_choices(/;"	d
for_all_defaults	scripts/kconfig/expr.h	/^#define for_all_defaults(/;"	d
for_all_prompts	scripts/kconfig/expr.h	/^#define for_all_prompts(/;"	d
for_all_properties	scripts/kconfig/expr.h	/^#define for_all_properties(/;"	d
for_all_symbols	scripts/kconfig/expr.h	/^#define for_all_symbols(/;"	d
for_background	include/linux/compat.h	/^	unsigned for_background:1;	\/* A background writeback *\/$/;"	m	struct:writeback_control	typeref:typename:unsigned:1
for_each_cpu	include/common.h	/^#define for_each_cpu(/;"	d
for_each_present_cpu	drivers/net/mvpp2.c	/^#define for_each_present_cpu(/;"	d	file:
for_each_remoteproc_device	drivers/remoteproc/rproc-uclass.c	/^static int for_each_remoteproc_device(int (*fn) (struct udevice *dev,$/;"	f	typeref:typename:int	file:
for_each_slave	drivers/net/cpsw.c	/^#define for_each_slave(/;"	d	file:
for_each_tag	arch/arm/include/asm/setup.h	/^#define for_each_tag(/;"	d
for_each_tag	arch/avr32/include/asm/setup.h	/^#define for_each_tag(/;"	d
for_each_tag	arch/nds32/include/asm/setup.h	/^#define for_each_tag(/;"	d
for_kupdate	include/linux/compat.h	/^	unsigned for_kupdate:1;		\/* A kupdate writeback *\/$/;"	m	struct:writeback_control	typeref:typename:unsigned:1
for_reclaim	include/linux/compat.h	/^	unsigned for_reclaim:1;		\/* Invoked from the page allocator *\/$/;"	m	struct:writeback_control	typeref:typename:unsigned:1
for_sync	include/linux/compat.h	/^	unsigned for_sync:1;		\/* sync(2) WB_SYNC_ALL writeback *\/$/;"	m	struct:writeback_control	typeref:typename:unsigned:1
forbid_idle	include/linux/apm_bios.h	/^	int			forbid_idle;$/;"	m	struct:apm_info	typeref:typename:int
force	include/sh_pfc.h	/^	pinmux_enum_t force;$/;"	m	struct:pinmux_range	typeref:typename:pinmux_enum_t
force_2t	board/freescale/b4860qds/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_2t	board/freescale/corenet_ds/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_2t	board/freescale/ls1021aqds/ddr.h	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
force_2t	board/freescale/ls1043aqds/ddr.h	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
force_2t	board/freescale/ls1043ardb/ddr.h	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
force_2t	board/freescale/mpc8349emds/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_2t	board/freescale/mpc8572ds/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_2t	board/freescale/p1022ds/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_2t	board/freescale/p2041rdb/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_2t	board/freescale/t4qds/ddr.h	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
force_2t	board/varisys/cyrus/ddr.c	/^	u32 force_2t;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
force_bup_core_selection	board/amcc/bamboo/bamboo.c	/^void force_bup_core_selection(core_selection_t *core_select_P, config_validity_t *config_val_P)$/;"	f	typeref:typename:void
force_delay_measurement	arch/arm/cpu/armv7/mx6/ddr.c	/^static void force_delay_measurement(int bus_size)$/;"	f	typeref:typename:void	file:
force_emif_self_refresh	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void force_emif_self_refresh()$/;"	f	typeref:typename:void
force_fail_alloc	include/dm/test.h	/^	int force_fail_alloc;$/;"	m	struct:dm_test_state	typeref:typename:int
force_fallback	tools/dtoc/fdt_select.py	/^force_fallback = False$/;"	v
force_idle_bus	arch/arm/imx-common/i2c-mxv7.c	/^int force_idle_bus(void *priv)$/;"	f	typeref:typename:int
force_inline	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^#define force_inline /;"	d	file:
force_modules_reset	board/bosch/shc/board.c	/^static void __maybe_unused force_modules_reset(void)$/;"	f	typeref:typename:void __maybe_unused	file:
force_modules_running	board/bosch/shc/board.c	/^static void __maybe_unused force_modules_running(void)$/;"	f	typeref:typename:void __maybe_unused	file:
force_pca_enable	drivers/pci/pci_tegra.c	/^	bool force_pca_enable;$/;"	m	struct:tegra_pcie_soc	typeref:typename:bool	file:
forced_speed_duplex	drivers/net/e1000.h	/^	uint8_t forced_speed_duplex;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t
forcestdby	drivers/usb/musb/omap3.c	/^	u32	forcestdby;$/;"	m	struct:omap3_otg_regs	typeref:typename:u32	file:
fordblks	include/malloc.h	/^  int fordblks; \/* total non-inuse space *\/$/;"	m	struct:mallinfo	typeref:typename:int
forget_segments	arch/powerpc/include/asm/processor.h	/^#define forget_segments(/;"	d
forloop	scripts/kconfig/streamline_config.pl	/^      forloop:$/;"	l
format	arch/m68k/include/asm/ptrace.h	/^	unsigned format:4;	\/* frame format specifier *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned:4
format	drivers/video/rockchip/rk_lvds.c	/^	int format;$/;"	m	struct:rk_lvds_priv	typeref:typename:int	file:
format	include/stdio_dev.h	/^	uchar	format;			\/* Format				*\/$/;"	m	struct:__anon77b06a0f0108	typeref:typename:uchar
format_and_output	tools/genboardscfg.py	/^def format_and_output(params_list, output):$/;"	f
format_email	scripts/checkpatch.pl	/^sub format_email {$/;"	s
format_email	scripts/get_maintainer.pl	/^sub format_email {$/;"	s
format_mac_pxe	cmd/pxe.c	/^static int format_mac_pxe(char *outbuf, size_t outbuf_len)$/;"	f	typeref:typename:int	file:
format_to_colorspace	drivers/video/ipu_common.c	/^ipu_color_space_t format_to_colorspace(uint32_t fmt)$/;"	f	typeref:typename:ipu_color_space_t
formatted_area	include/smbios.h	/^	u8 formatted_area[5];$/;"	m	struct:smbios_entry	typeref:typename:u8[5]
forward	arch/x86/include/asm/coreboot_tables.h	/^	u64 forward;$/;"	m	struct:cb_forward	typeref:typename:u64
forward_copy_shift	arch/arm/lib/memcpy.S	/^		.macro	forward_copy_shift pull push$/;"	m
forward_to_driver	drivers/usb/musb-new/musb_gadget_ep0.c	/^forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)$/;"	f	typeref:typename:int	file:
fotg210_chip	drivers/usb/gadget/fotg210.c	/^struct fotg210_chip {$/;"	s	file:
fotg210_cxwait	drivers/usb/gadget/fotg210.c	/^static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask)$/;"	f	typeref:typename:int	file:
fotg210_dma	drivers/usb/gadget/fotg210.c	/^static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req)$/;"	f	typeref:typename:int	file:
fotg210_ep	drivers/usb/gadget/fotg210.c	/^struct fotg210_ep {$/;"	s	file:
fotg210_ep_alloc_request	drivers/usb/gadget/fotg210.c	/^static struct usb_request *fotg210_ep_alloc_request($/;"	f	typeref:struct:usb_request *	file:
fotg210_ep_dequeue	drivers/usb/gadget/fotg210.c	/^static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:int	file:
fotg210_ep_disable	drivers/usb/gadget/fotg210.c	/^static int fotg210_ep_disable(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
fotg210_ep_enable	drivers/usb/gadget/fotg210.c	/^static int fotg210_ep_enable($/;"	f	typeref:typename:int	file:
fotg210_ep_free_request	drivers/usb/gadget/fotg210.c	/^static void fotg210_ep_free_request($/;"	f	typeref:typename:void	file:
fotg210_ep_halt	drivers/usb/gadget/fotg210.c	/^static int fotg210_ep_halt(struct usb_ep *_ep, int halt)$/;"	f	typeref:typename:int	file:
fotg210_ep_ops	drivers/usb/gadget/fotg210.c	/^static struct usb_ep_ops fotg210_ep_ops = {$/;"	v	typeref:struct:usb_ep_ops	file:
fotg210_ep_queue	drivers/usb/gadget/fotg210.c	/^static int fotg210_ep_queue($/;"	f	typeref:typename:int	file:
fotg210_gadget_ops	drivers/usb/gadget/fotg210.c	/^static struct usb_gadget_ops fotg210_gadget_ops = {$/;"	v	typeref:struct:usb_gadget_ops	file:
fotg210_get_frame	drivers/usb/gadget/fotg210.c	/^static int fotg210_get_frame(struct usb_gadget *_gadget)$/;"	f	typeref:typename:int	file:
fotg210_pullup	drivers/usb/gadget/fotg210.c	/^static int fotg210_pullup(struct usb_gadget *_gadget, int is_on)$/;"	f	typeref:typename:int	file:
fotg210_recv	drivers/usb/gadget/fotg210.c	/^static void fotg210_recv(struct fotg210_chip *chip, int ep_id)$/;"	f	typeref:typename:void	file:
fotg210_regs	include/usb/fotg210.h	/^struct fotg210_regs {$/;"	s
fotg210_request	drivers/usb/gadget/fotg210.c	/^struct fotg210_request {$/;"	s	file:
fotg210_reset	drivers/usb/gadget/fotg210.c	/^static int fotg210_reset(struct fotg210_chip *chip)$/;"	f	typeref:typename:int	file:
fotg210_setup	drivers/usb/gadget/fotg210.c	/^static void fotg210_setup(struct fotg210_chip *chip)$/;"	f	typeref:typename:void	file:
found	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			found[UBI_VOL_BM_SIZE];$/;"	m	struct:ubi_vol_info	typeref:typename:unsigned long[]
found	scripts/kconfig/gconf.c	/^static GtkTreeIter found;$/;"	v	typeref:typename:GtkTreeIter	file:
found_block_size	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^found_block_size:$/;"	l
found_key	cmd/gpt.c	/^static bool found_key(const char *str, const char *key)$/;"	f	typeref:typename:bool	file:
fourcc	include/ipu_pixfmt.h	/^#define fourcc(/;"	d
fourtyeight_fdc	include/mpc5xxx.h	/^	volatile u32	fourtyeight_fdc;\/* 0x0010 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
fout	tools/fdtgrep.c	/^	FILE *fout;		\/* File to write dts\/dtb output *\/$/;"	m	struct:display_info	typeref:typename:FILE *	file:
fp	arch/arc/include/asm/ptrace.h	/^	long fp;$/;"	m	struct:pt_regs	typeref:typename:long
fp	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long fp;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
fp	arch/blackfin/cpu/start.S	/^	fp = sp;$/;"	d
fp	arch/blackfin/include/asm/ptrace.h	/^	long fp;$/;"	m	struct:pt_regs	typeref:typename:long
fp	arch/blackfin/lib/__kgdb.S	/^	fp = [p0 + 0x18];$/;"	d
fp	arch/mips/include/asm/regdef.h	/^#define fp	/;"	d
fp	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG fp;		\/* r28 *\/$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
fp	arch/sparc/include/asm/ptrace.h	/^	struct sparc_stackf *fp;$/;"	m	struct:sparc_stackf	typeref:struct:sparc_stackf *
fp2_gen_cntl	drivers/video/ati_radeon_fb.h	/^	u32		fp2_gen_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp2_h_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		fp2_h_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp2_v_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		fp2_v_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_console_moverow	include/lcd_console.h	/^	void (*fp_console_moverow)(struct console_t *pcons,$/;"	m	struct:console_t	typeref:typename:void (*)(struct console_t * pcons,u32 rowdst,u32 rowsrc)
fp_console_setrow	include/lcd_console.h	/^	void (*fp_console_setrow)(struct console_t *pcons, u32 row, int clr);$/;"	m	struct:console_t	typeref:typename:void (*)(struct console_t * pcons,u32 row,int clr)
fp_crtc_h_total_disp	drivers/video/ati_radeon_fb.h	/^	u32		fp_crtc_h_total_disp;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_crtc_v_total_disp	drivers/video/ati_radeon_fb.h	/^	u32		fp_crtc_v_total_disp;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_gen_cntl	drivers/video/ati_radeon_fb.h	/^	u32		fp_gen_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_h_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		fp_h_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_hard_struct	arch/arm/include/asm/processor.h	/^struct fp_hard_struct {$/;"	s
fp_horz_stretch	drivers/video/ati_radeon_fb.h	/^	u32		fp_horz_stretch;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_panel_cntl	drivers/video/ati_radeon_fb.h	/^	u32		fp_panel_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_putc_xy	include/lcd_console.h	/^	void (*fp_putc_xy)(struct console_t *pcons, ushort x, ushort y, char c);$/;"	m	struct:console_t	typeref:typename:void (*)(struct console_t * pcons,ushort x,ushort y,char c)
fp_resync	arch/arm/mach-exynos/clock_init.h	/^	unsigned fp_resync;$/;"	m	struct:mem_timings	typeref:typename:unsigned
fp_soft_struct	arch/arm/include/asm/processor.h	/^struct fp_soft_struct {$/;"	s
fp_state	arch/arm/include/asm/processor.h	/^union fp_state {$/;"	u
fp_v_sync_strt_wid	drivers/video/ati_radeon_fb.h	/^	u32		fp_v_sync_strt_wid;$/;"	m	struct:radeon_regs	typeref:typename:u32
fp_vert_stretch	drivers/video/ati_radeon_fb.h	/^	u32		fp_vert_stretch;$/;"	m	struct:radeon_regs	typeref:typename:u32
fpa	include/linux/mtd/samsung_onenand.h	/^	unsigned int	fpa;		\/* 0x00E0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
fpar	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     fpar;           \/* Flash Page Addr Register *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
fpb	drivers/spi/ich.h	/^	uint32_t fpb;		\/* 0xd0 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
fpbor	drivers/block/sata_dwc.c	/^	u32 fpbor;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
fpd_dma_chan1	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan1: dma@fd500000 {$/;"	l
fpd_dma_chan2	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan2: dma@fd510000 {$/;"	l
fpd_dma_chan3	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan3: dma@fd520000 {$/;"	l
fpd_dma_chan4	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan4: dma@fd530000 {$/;"	l
fpd_dma_chan5	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan5: dma@fd540000 {$/;"	l
fpd_dma_chan6	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan6: dma@fd550000 {$/;"	l
fpd_dma_chan7	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan7: dma@fd560000 {$/;"	l
fpd_dma_chan8	arch/arm/dts/zynqmp.dtsi	/^		fpd_dma_chan8: dma@fd570000 {$/;"	l
fpga	arch/arm/dts/fsl-ls1043a-qds.dtsi	/^	fpga: board-control@3,0 {$/;"	l
fpga	arch/arm/dts/ls1021a-qds.dtsi	/^	fpga: board-control@3,0 {$/;"	l
fpga	board/armadeus/apf27/fpga.c	/^xilinx_desc fpga[CONFIG_FPGA_COUNT] = {$/;"	v	typeref:typename:xilinx_desc[]
fpga	board/esd/pmc440/fpga.c	/^xilinx_desc fpga[CONFIG_FPGA_COUNT] = {$/;"	v	typeref:typename:xilinx_desc[]
fpga	board/gdsys/405ep/iocon.c	/^	unsigned fpga;$/;"	m	struct:fpga_mii	typeref:typename:unsigned	file:
fpga	board/gdsys/common/ihs_mdio.h	/^	u32 fpga;$/;"	m	struct:ihs_mdio_info	typeref:typename:u32
fpga	board/gdsys/mpc8308/hrcon.c	/^	unsigned fpga;$/;"	m	struct:fpga_mii	typeref:typename:unsigned	file:
fpga	board/gdsys/mpc8308/strider.c	/^	unsigned fpga;$/;"	m	struct:fpga_mii	typeref:typename:unsigned	file:
fpga	board/spear/x600/fpga.c	/^static xilinx_desc fpga[CONFIG_FPGA_COUNT] = {$/;"	v	typeref:typename:xilinx_desc[]	file:
fpga	board/teejet/mt_ventoux/mt_ventoux.c	/^xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial,$/;"	v	typeref:typename:xilinx_desc
fpga	board/xilinx/zynq/board.c	/^static xilinx_desc fpga;$/;"	v	typeref:typename:xilinx_desc	file:
fpga010	board/xilinx/zynq/board.c	/^static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);$/;"	v	typeref:typename:xilinx_desc	file:
fpga015	board/xilinx/zynq/board.c	/^static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);$/;"	v	typeref:typename:xilinx_desc	file:
fpga020	board/xilinx/zynq/board.c	/^static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);$/;"	v	typeref:typename:xilinx_desc	file:
fpga030	board/xilinx/zynq/board.c	/^static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);$/;"	v	typeref:typename:xilinx_desc	file:
fpga035	board/xilinx/zynq/board.c	/^static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);$/;"	v	typeref:typename:xilinx_desc	file:
fpga045	board/xilinx/zynq/board.c	/^static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);$/;"	v	typeref:typename:xilinx_desc	file:
fpga0_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 fpga0_clk_ctrl; \/* 0x170 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
fpga100	board/xilinx/zynq/board.c	/^static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);$/;"	v	typeref:typename:xilinx_desc	file:
fpga1_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 fpga1_clk_ctrl; \/* 0x180 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
fpga2_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 fpga2_clk_ctrl; \/* 0x190 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
fpga2hps_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpga2hps_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
fpga2hps_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpga2hps_read_qos;		\/* 0x46100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
fpga2hps_wr_tidemark	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpga2hps_wr_tidemark;		\/* 0x46040 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
fpga2hps_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpga2hps_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
fpga3_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 fpga3_clk_ctrl; \/* 0x1a0 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
fpga88f78xx0_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG fpga88f78xx0_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
fpga_abort_fn	board/armadeus/apf27/fpga.c	/^int fpga_abort_fn(int cookie)$/;"	f	typeref:typename:int
fpga_abort_fn	board/esd/pmc440/fpga.c	/^int fpga_abort_fn(int cookie)$/;"	f	typeref:typename:int
fpga_add	drivers/fpga/fpga.c	/^int fpga_add(fpga_type devtype, void *desc)$/;"	f	typeref:typename:int
fpga_altera	include/fpga.h	/^	fpga_altera,		\/* unimplemented *\/$/;"	e	enum:__anon4d3ae96c0103
fpga_boot	board/esd/common/fpga.c	/^static int fpga_boot (const unsigned char *fpgadata, int size)$/;"	f	typeref:typename:int	file:
fpga_busy_fn	board/armadeus/apf27/fpga.c	/^int fpga_busy_fn(int cookie)$/;"	f	typeref:typename:int
fpga_busy_fn	board/esd/pmc440/fpga.c	/^int fpga_busy_fn(int cookie)$/;"	f	typeref:typename:int
fpga_clk_fn	board/armadeus/apf27/fpga.c	/^int fpga_clk_fn(int assert_clk, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_clk_fn	board/esd/pmc440/fpga.c	/^int fpga_clk_fn(int assert_clk, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_clk_fn	board/spear/x600/fpga.c	/^static int fpga_clk_fn(int assert_clk, int flush, int cookie)$/;"	f	typeref:typename:int	file:
fpga_clk_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_clk_fn(int assert_clk, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_config_fn	board/theadorable/fpga.c	/^static int fpga_config_fn(int assert, int flush, int cookie)$/;"	f	typeref:typename:int	file:
fpga_control_clear	board/gdsys/mpc8308/hrcon.c	/^void fpga_control_clear(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_control_clear	board/gdsys/mpc8308/strider.c	/^void fpga_control_clear(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_control_set	board/gdsys/mpc8308/hrcon.c	/^void fpga_control_set(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_control_set	board/gdsys/mpc8308/strider.c	/^void fpga_control_set(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_count	drivers/fpga/fpga.c	/^int fpga_count(void)$/;"	f	typeref:typename:int
fpga_cs_fn	board/armadeus/apf27/fpga.c	/^int fpga_cs_fn(int assert_cs, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_cs_fn	board/esd/pmc440/fpga.c	/^int fpga_cs_fn(int assert_cs, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_desc	include/fpga.h	/^} fpga_desc;			\/* end, typedef fpga_desc *\/$/;"	t	typeref:struct:__anon4d3ae96c0208
fpga_dev_info	drivers/fpga/fpga.c	/^static int fpga_dev_info(int devnum)$/;"	f	typeref:typename:int	file:
fpga_done	board/keymile/km_arm/fpga_config.c	/^static int fpga_done(void)$/;"	f	typeref:typename:int	file:
fpga_done_fn	board/armadeus/apf27/fpga.c	/^int fpga_done_fn(int cookie)$/;"	f	typeref:typename:int
fpga_done_fn	board/esd/pmc440/fpga.c	/^int fpga_done_fn(int cookie)$/;"	f	typeref:typename:int
fpga_done_fn	board/spear/x600/fpga.c	/^static int fpga_done_fn(int cookie)$/;"	f	typeref:typename:int	file:
fpga_done_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_done_fn(int cookie)$/;"	f	typeref:typename:int
fpga_done_fn	board/theadorable/fpga.c	/^static int fpga_done_fn(int cookie)$/;"	f	typeref:typename:int	file:
fpga_dump	drivers/fpga/fpga.c	/^int fpga_dump(int devnum, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
fpga_features	board/gdsys/p1022/controlcenterd.c	/^	u32 fpga_features;	\/* 0x000c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u32	file:
fpga_features	include/gdsys_fpga.h	/^	u16 fpga_features;	\/* 0x0004 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
fpga_features	include/gdsys_fpga.h	/^	u16 fpga_features;	\/* 0x0006 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
fpga_fns	board/armadeus/apf27/fpga.c	/^xilinx_spartan3_slave_parallel_fns fpga_fns = {$/;"	v	typeref:typename:xilinx_spartan3_slave_parallel_fns
fpga_fs_info	include/fpga.h	/^} fpga_fs_info;$/;"	t	typeref:struct:__anon4d3ae96c0308
fpga_fsload	drivers/fpga/fpga.c	/^int fpga_fsload(int devnum, const void *buf, size_t size,$/;"	f	typeref:typename:int
fpga_get_desc	drivers/fpga/fpga.c	/^const fpga_desc *const fpga_get_desc(int devnum)$/;"	f	typeref:typename:const fpga_desc * const
fpga_get_op	cmd/fpga.c	/^static int fpga_get_op(char *opstr)$/;"	f	typeref:typename:int	file:
fpga_get_reg	board/gdsys/405ep/iocon.c	/^int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data)$/;"	f	typeref:typename:int
fpga_get_reg	board/gdsys/common/fpga.c	/^int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data)$/;"	f	typeref:typename:int
fpga_get_reg	board/gdsys/mpc8308/hrcon.c	/^int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data)$/;"	f	typeref:typename:int
fpga_get_reg	board/gdsys/mpc8308/strider.c	/^int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data)$/;"	f	typeref:typename:int
fpga_gpio_clear	board/gdsys/405ep/iocon.c	/^void fpga_gpio_clear(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_gpio_clear	board/gdsys/mpc8308/hrcon.c	/^void fpga_gpio_clear(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_gpio_clear	board/gdsys/mpc8308/strider.c	/^void fpga_gpio_clear(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_gpio_get	board/gdsys/405ep/iocon.c	/^int fpga_gpio_get(unsigned int bus, int pin)$/;"	f	typeref:typename:int
fpga_gpio_get	board/gdsys/mpc8308/hrcon.c	/^int fpga_gpio_get(unsigned int bus, int pin)$/;"	f	typeref:typename:int
fpga_gpio_get	board/gdsys/mpc8308/strider.c	/^int fpga_gpio_get(unsigned int bus, int pin)$/;"	f	typeref:typename:int
fpga_gpio_set	board/gdsys/405ep/iocon.c	/^void fpga_gpio_set(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_gpio_set	board/gdsys/mpc8308/hrcon.c	/^void fpga_gpio_set(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_gpio_set	board/gdsys/mpc8308/strider.c	/^void fpga_gpio_set(unsigned int bus, int pin)$/;"	f	typeref:typename:void
fpga_hw_init	board/bluewater/gurnard/gurnard.c	/^static int fpga_hw_init(void)$/;"	f	typeref:typename:int	file:
fpga_image	drivers/fpga/lattice.c	/^static const char *fpga_image;$/;"	v	typeref:typename:const char *	file:
fpga_info	drivers/fpga/fpga.c	/^int fpga_info(int devnum)$/;"	f	typeref:typename:int
fpga_init	board/amcc/yucca/yucca.c	/^void fpga_init(void)$/;"	f	typeref:typename:void
fpga_init	drivers/fpga/fpga.c	/^void fpga_init(void)$/;"	f	typeref:typename:void
fpga_init_fn	board/armadeus/apf27/fpga.c	/^int fpga_init_fn(int cookie)$/;"	f	typeref:typename:int
fpga_init_fn	board/esd/pmc440/fpga.c	/^int fpga_init_fn(int cookie)$/;"	f	typeref:typename:int
fpga_init_fn	board/spear/x600/fpga.c	/^static int fpga_init_fn(int cookie)$/;"	f	typeref:typename:int	file:
fpga_init_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_init_fn(int cookie)$/;"	f	typeref:typename:int
fpga_interrupt	board/esd/pmc440/cmd_pmc440.c	/^int fpga_interrupt(u32 arg)$/;"	f	typeref:typename:int
fpga_lattice	include/fpga.h	/^	fpga_lattice,		\/* Lattice family *\/$/;"	e	enum:__anon4d3ae96c0103
fpga_leds	arch/nios2/dts/10m50_devboard.dts	/^		fpga_leds: leds {$/;"	l	label:sopc0
fpga_load	drivers/fpga/fpga.c	/^int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)$/;"	f	typeref:typename:int
fpga_loadbitstream	drivers/fpga/fpga.c	/^int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,$/;"	f	typeref:typename:int __weak
fpga_loadbitstream	drivers/fpga/xilinx.c	/^int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,$/;"	f	typeref:typename:int
fpga_mem_test	post/board/lwmon5/fpga.c	/^static int fpga_mem_test(void)$/;"	f	typeref:typename:int	file:
fpga_mii	board/gdsys/405ep/iocon.c	/^struct fpga_mii {$/;"	s	file:
fpga_mii	board/gdsys/405ep/iocon.c	/^} fpga_mii[] = {$/;"	v	typeref:struct:fpga_mii[]
fpga_mii	board/gdsys/mpc8308/hrcon.c	/^struct fpga_mii {$/;"	s	file:
fpga_mii	board/gdsys/mpc8308/hrcon.c	/^} fpga_mii[] = {$/;"	v	typeref:struct:fpga_mii[]
fpga_mii	board/gdsys/mpc8308/strider.c	/^struct fpga_mii {$/;"	s	file:
fpga_mii	board/gdsys/mpc8308/strider.c	/^} fpga_mii[] = {$/;"	v	typeref:struct:fpga_mii[]
fpga_min_type	include/fpga.h	/^	fpga_min_type,		\/* range check value *\/$/;"	e	enum:__anon4d3ae96c0103
fpga_no_sup	drivers/fpga/fpga.c	/^static void fpga_no_sup(char *fn, char *msg)$/;"	f	typeref:typename:void	file:
fpga_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t fpga_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
fpga_pgm_fn	board/armadeus/apf27/fpga.c	/^int fpga_pgm_fn(int assert, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_pgm_fn	board/esd/pmc440/fpga.c	/^int fpga_pgm_fn(int assert, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_pgm_fn	board/spear/x600/fpga.c	/^static int fpga_pgm_fn(int assert, int flush, int cookie)$/;"	f	typeref:typename:int	file:
fpga_pgm_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_pgm_fn(int nassert, int nflush, int cookie)$/;"	f	typeref:typename:int
fpga_post_addrline	post/board/lwmon5/fpga.c	/^static int fpga_post_addrline(ulong *address, ulong *base, ulong size)$/;"	f	typeref:typename:int	file:
fpga_post_config_fn	board/esd/pmc440/fpga.c	/^int fpga_post_config_fn(int cookie)$/;"	f	typeref:typename:int
fpga_post_config_fn	board/spear/x600/fpga.c	/^static int fpga_post_config_fn(int cookie)$/;"	f	typeref:typename:int	file:
fpga_post_config_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_post_config_fn(int cookie)$/;"	f	typeref:typename:int
fpga_post_dataline	post/board/lwmon5/fpga.c	/^static int fpga_post_dataline(ulong *address)$/;"	f	typeref:typename:int	file:
fpga_post_fn	board/armadeus/apf27/fpga.c	/^int fpga_post_fn(int cookie)$/;"	f	typeref:typename:int
fpga_post_test	post/board/lwmon5/fpga.c	/^int fpga_post_test(int flags)$/;"	f	typeref:typename:int
fpga_post_test1	post/board/lwmon5/fpga.c	/^static int fpga_post_test1(ulong *start, ulong size, ulong val)$/;"	f	typeref:typename:int	file:
fpga_post_test2	post/board/lwmon5/fpga.c	/^static int fpga_post_test2(ulong *start, ulong size)$/;"	f	typeref:typename:int	file:
fpga_post_test3	post/board/lwmon5/fpga.c	/^static int fpga_post_test3(ulong *start, ulong size)$/;"	f	typeref:typename:int	file:
fpga_post_test4	post/board/lwmon5/fpga.c	/^static int fpga_post_test4(ulong *start, ulong size)$/;"	f	typeref:typename:int	file:
fpga_pre_config_fn	board/esd/pmc440/fpga.c	/^int fpga_pre_config_fn(int cookie)$/;"	f	typeref:typename:int
fpga_pre_config_fn	board/spear/x600/fpga.c	/^static int fpga_pre_config_fn(int cookie)$/;"	f	typeref:typename:int	file:
fpga_pre_config_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_pre_config_fn(int cookie)$/;"	f	typeref:typename:int
fpga_pre_fn	board/armadeus/apf27/fpga.c	/^int fpga_pre_fn(int cookie)$/;"	f	typeref:typename:int
fpga_pre_fn	board/theadorable/fpga.c	/^static int fpga_pre_fn(int cookie)$/;"	f	typeref:typename:int	file:
fpga_ptr	board/gdsys/405ep/dlvision-10g.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_ptr	board/gdsys/405ep/io.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_ptr	board/gdsys/405ep/iocon.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_ptr	board/gdsys/405ep/neo.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_ptr	board/gdsys/405ex/io64.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_ptr	board/gdsys/mpc8308/hrcon.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_ptr	board/gdsys/mpc8308/strider.c	/^struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;$/;"	v	typeref:struct:ihs_fpga * []
fpga_rdata_fn	board/armadeus/apf27/fpga.c	/^int fpga_rdata_fn(unsigned char *data, int cookie)$/;"	f	typeref:typename:int
fpga_reg	board/freescale/common/ics307_clk.c	/^#define fpga_reg /;"	d	file:
fpga_reset	board/esd/pmc440/fpga.c	/^void fpga_reset(int assert)$/;"	f	typeref:typename:void
fpga_reset	board/keymile/km_arm/fpga_config.c	/^int fpga_reset(void)$/;"	f	typeref:typename:int
fpga_reset	board/spear/x600/fpga.c	/^static void fpga_reset(int assert)$/;"	f	typeref:typename:void	file:
fpga_reset	board/teejet/mt_ventoux/mt_ventoux.c	/^static inline void fpga_reset(int nassert)$/;"	f	typeref:typename:void	file:
fpga_rev	arch/arm/cpu/armv7/mx6/soc.c	/^	u32	fpga_rev;$/;"	m	struct:scu_regs	typeref:typename:u32	file:
fpga_rst_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 fpga_rst_ctrl; \/* 0x240 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
fpga_serialslave_init	board/esd/pmc440/fpga.c	/^void fpga_serialslave_init(void)$/;"	f	typeref:typename:void
fpga_serialslave_init	board/spear/x600/fpga.c	/^static void fpga_serialslave_init(void)$/;"	f	typeref:typename:void	file:
fpga_set_reg	board/gdsys/405ep/iocon.c	/^int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)$/;"	f	typeref:typename:int
fpga_set_reg	board/gdsys/common/fpga.c	/^int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)$/;"	f	typeref:typename:int
fpga_set_reg	board/gdsys/mpc8308/hrcon.c	/^int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)$/;"	f	typeref:typename:int
fpga_set_reg	board/gdsys/mpc8308/strider.c	/^int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)$/;"	f	typeref:typename:int
fpga_state	arch/powerpc/include/asm/global_data.h	/^	unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];$/;"	m	struct:arch_global_data	typeref:typename:unsigned[]
fpga_type	include/fpga.h	/^} fpga_type;			\/* end, typedef fpga_type *\/$/;"	t	typeref:enum:__anon4d3ae96c0103
fpga_undefined	include/fpga.h	/^	fpga_undefined		\/* invalid range check value *\/$/;"	e	enum:__anon4d3ae96c0103
fpga_validate	drivers/fpga/fpga.c	/^const fpga_desc *const fpga_validate(int devnum, const void *buf,$/;"	f	typeref:typename:const fpga_desc * const
fpga_version	board/gdsys/p1022/controlcenterd.c	/^	u32 fpga_version;	\/* 0x0008 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u32	file:
fpga_version	include/gdsys_fpga.h	/^	u16 fpga_version;	\/* 0x0004 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
fpga_version	include/gdsys_fpga.h	/^	u16 fpga_version;	\/* 0x0006 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
fpga_version_altera	board/astro/mcf5373l/astro.h	/^	char fpga_version_altera;$/;"	m	struct:card_id	typeref:typename:char
fpga_version_xilinx	board/astro/mcf5373l/astro.h	/^	char fpga_version_xilinx;$/;"	m	struct:card_id	typeref:typename:char
fpga_wdata_fn	board/armadeus/apf27/fpga.c	/^int fpga_wdata_fn(unsigned char data, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_wdata_fn	board/esd/pmc440/fpga.c	/^int fpga_wdata_fn(uchar data, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_wr_fn	board/armadeus/apf27/fpga.c	/^int fpga_wr_fn(int assert_write, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_wr_fn	board/esd/pmc440/fpga.c	/^int fpga_wr_fn(int assert_write, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_wr_fn	board/spear/x600/fpga.c	/^static int fpga_wr_fn(int assert_write, int flush, int cookie)$/;"	f	typeref:typename:int	file:
fpga_wr_fn	board/teejet/mt_ventoux/mt_ventoux.c	/^int fpga_wr_fn(int nassert_write, int flush, int cookie)$/;"	f	typeref:typename:int
fpga_write_fn	board/theadorable/fpga.c	/^static int fpga_write_fn(const void *buf, size_t len, int flush, int cookie)$/;"	f	typeref:typename:int	file:
fpga_xilinx	include/fpga.h	/^	fpga_xilinx,		\/* Xilinx Family) *\/$/;"	e	enum:__anon4d3ae96c0103
fpgadata	board/esd/cpci405/cpci405.c	/^const unsigned char fpgadata[] =$/;"	v	typeref:typename:const unsigned char[]
fpgadata	board/esd/plu405/plu405.c	/^const unsigned char fpgadata[] =$/;"	v	typeref:typename:const unsigned char[]
fpgaintfgrp_gbl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	fpgaintfgrp_gbl;		\/* 0x20 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
fpgaintfgrp_indiv	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	fpgaintfgrp_indiv;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
fpgaintfgrp_module	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	fpgaintfgrp_module;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
fpgamgr_dclkcnt_set	drivers/fpga/socfpga.c	/^static int fpgamgr_dclkcnt_set(unsigned long cnt)$/;"	f	typeref:typename:int	file:
fpgamgr_get_mode	arch/arm/mach-socfpga/fpga_manager.c	/^int fpgamgr_get_mode(void)$/;"	f	typeref:typename:int
fpgamgr_poll_fpga_ready	arch/arm/mach-socfpga/fpga_manager.c	/^int fpgamgr_poll_fpga_ready(void)$/;"	f	typeref:typename:int
fpgamgr_program_init	drivers/fpga/socfpga.c	/^static int fpgamgr_program_init(void)$/;"	f	typeref:typename:int	file:
fpgamgr_program_poll_cd	drivers/fpga/socfpga.c	/^static int fpgamgr_program_poll_cd(void)$/;"	f	typeref:typename:int	file:
fpgamgr_program_poll_initphase	drivers/fpga/socfpga.c	/^static int fpgamgr_program_poll_initphase(void)$/;"	f	typeref:typename:int	file:
fpgamgr_program_poll_usermode	drivers/fpga/socfpga.c	/^static int fpgamgr_program_poll_usermode(void)$/;"	f	typeref:typename:int	file:
fpgamgr_program_write	drivers/fpga/socfpga.c	/^static void fpgamgr_program_write(const void *rbf_data, unsigned long rbf_size)$/;"	f	typeref:typename:void	file:
fpgamgr_regs	arch/arm/mach-socfpga/fpga_manager.c	/^static struct socfpga_fpga_manager *fpgamgr_regs =$/;"	v	typeref:struct:socfpga_fpga_manager *	file:
fpgamgr_regs	drivers/fpga/socfpga.c	/^static struct socfpga_fpga_manager *fpgamgr_regs =$/;"	v	typeref:struct:socfpga_fpga_manager *	file:
fpgamgr_set_cd_ratio	drivers/fpga/socfpga.c	/^static void fpgamgr_set_cd_ratio(unsigned long ratio)$/;"	f	typeref:typename:void	file:
fpgamgr_test_fpga_ready	arch/arm/mach-socfpga/fpga_manager.c	/^int fpgamgr_test_fpga_ready(void)$/;"	f	typeref:typename:int
fpgamgrdata	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpgamgrdata;$/;"	m	struct:nic301_registers	typeref:typename:u32
fpgamgrdata_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpgamgrdata_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
fpgamgrdata_wr_tidemark	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	fpgamgrdata_wr_tidemark;	\/* 0x23040 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
fpgaport_rst	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	fpgaport_rst;	\/* 0x80 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
fpgaport_rst	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	fpgaport_rst;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
fpmcev	include/fsl_fman.h	/^	u32	fpmcev[0x4];	\/* CPU event 0-3 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32[0x4]
fpmdis1	include/fsl_fman.h	/^	u32	fpmdis1;	\/* dispatch thresholds1 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmdis2	include/fsl_fman.h	/^	u32	fpmdis2;	\/* dispatch thresholds2 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmdra	include/fsl_fman.h	/^	u32	fpmdra;		\/* data ram access *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmdrd	include/fsl_fman.h	/^	u32	fpmdrd[0x4];	\/* data_ram data 0-3 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32[0x4]
fpmfcevent	include/fsl_fman.h	/^	u32	fpmfcevent[0x4];\/* FMan controller event 0-3 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32[0x4]
fpmfcmask	include/fsl_fman.h	/^	u32	fpmfcmask[0x4];	\/* FMan controller mask 0-3 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32[0x4]
fpmflc	include/fsl_fman.h	/^	u32	fpmflc;		\/* flush control *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmprc	include/fsl_fman.h	/^	u32	fpmprc;		\/* Port_ID control *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmrcr	include/fsl_fman.h	/^	u32	fpmrcr;		\/* rams control and event *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmtnc	include/fsl_fman.h	/^	u32	fpmtnc;		\/* TNUM control *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmts	include/fsl_fman.h	/^	u32	fpmts[0x80];	\/* task status *\/$/;"	m	struct:fm_fpm	typeref:typename:u32[0x80]
fpmtsc1	include/fsl_fman.h	/^	u32	fpmtsc1;	\/* timestamp control1 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmtsc2	include/fsl_fman.h	/^	u32	fpmtsc2;	\/* timestamp control2 *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmtsf	include/fsl_fman.h	/^	u32	fpmtsf;		\/* time stamp fraction *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpmtsp	include/fsl_fman.h	/^	u32	fpmtsp;		\/* time stamp *\/$/;"	m	struct:fm_fpm	typeref:typename:u32
fpop	lib/bzip2/bzlib_blocksort.c	/^#define fpop(/;"	d	file:
fpr	arch/mips/include/asm/processor.h	/^	fpureg_t	fpr[NUM_FPU_REGS];$/;"	m	struct:mips_fpu_struct	typeref:typename:fpureg_t[]
fpr	arch/powerpc/include/asm/processor.h	/^	double		fpr[32];	\/* Complete floating point set *\/$/;"	m	struct:thread_struct	typeref:typename:double[32]
fprintf	common/console.c	/^int fprintf(int file, const char *fmt, ...)$/;"	f	typeref:typename:int
fprintf_filtered	tools/gdb/remote.c	/^#define fprintf_filtered /;"	d	file:
fprintf_unfiltered	tools/gdb/remote.c	/^#define fprintf_unfiltered /;"	d	file:
fpsba_t	tools/ifdtool.h	/^struct __packed fpsba_t {$/;"	s
fpscr	arch/powerpc/include/asm/processor.h	/^	unsigned long	fpscr;		\/* Floating point status *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
fpscr_pad	arch/powerpc/include/asm/processor.h	/^	unsigned long	fpscr_pad;	\/* fpr ... fpscr must be contiguous *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
fpsmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fpsmr;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u32
fpsmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fpsmr;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u32
fpsmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fpsmr;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u32
fpstate	arch/arm/include/asm/processor.h	/^	union fp_state			fpstate;$/;"	m	struct:thread_struct	typeref:union:fp_state
fpt_bad	arch/x86/include/asm/me_common.h	/^	u32 fpt_bad:1;$/;"	m	struct:me_hfs	typeref:typename:u32:1
fptagr	drivers/block/sata_dwc.c	/^	u32 fptagr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
fptcr	drivers/block/sata_dwc.c	/^	u32 fptcr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
fptr	include/g_dnl.h	/^	g_dnl_bind_callback_f fptr;$/;"	m	struct:g_dnl_bind_callback	typeref:typename:g_dnl_bind_callback_f
fpu	arch/mips/include/asm/processor.h	/^	struct mips_fpu_struct fpu;$/;"	m	struct:thread_struct	typeref:struct:mips_fpu_struct
fpu_disable	post/cpu/ppc4xx/fpu.c	/^void fpu_disable(void)$/;"	f	typeref:typename:void
fpu_enable	post/cpu/ppc4xx/fpu.c	/^void fpu_enable(void)$/;"	f	typeref:typename:void
fpu_post_test	post/lib_powerpc/fpu/fpu.c	/^int fpu_post_test (int flags)$/;"	f	typeref:typename:int
fpu_post_test_math1	post/lib_powerpc/fpu/20001122-1.c	/^int fpu_post_test_math1 (void)$/;"	f	typeref:typename:GNU_FPOST_ATTR int
fpu_post_test_math2	post/lib_powerpc/fpu/20010114-2.c	/^int fpu_post_test_math2 (void)$/;"	f	typeref:typename:int
fpu_post_test_math3	post/lib_powerpc/fpu/20010226-1.c	/^int fpu_post_test_math3 (void)$/;"	f	typeref:typename:GNU_FPOST_ATTR int
fpu_post_test_math4	post/lib_powerpc/fpu/980619-1.c	/^int fpu_post_test_math4 (void)$/;"	f	typeref:typename:GNU_FPOST_ATTR int
fpu_post_test_math5	post/lib_powerpc/fpu/acc1.c	/^int fpu_post_test_math5 (void)$/;"	f	typeref:typename:int
fpu_post_test_math6	post/lib_powerpc/fpu/compare-fp-1.c	/^int fpu_post_test_math6 (void)$/;"	f	typeref:typename:int
fpu_post_test_math7	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^int fpu_post_test_math7 (void)$/;"	f	typeref:typename:int
fpu_status	post/cpu/ppc4xx/fpu.c	/^int fpu_status(void)$/;"	f	typeref:typename:int
fpureg_t	arch/mips/include/asm/processor.h	/^typedef __u64 fpureg_t;$/;"	t	typeref:typename:__u64
fpush	lib/bzip2/bzlib_blocksort.c	/^#define fpush(/;"	d	file:
fputc	common/console.c	/^void fputc(int file, const char c)$/;"	f	typeref:typename:void
fputc_filtered	tools/gdb/remote.c	/^#define fputc_filtered /;"	d	file:
fputc_unfiltered	tools/gdb/remote.c	/^#define fputc_unfiltered /;"	d	file:
fputs	common/console.c	/^void fputs(int file, const char *s)$/;"	f	typeref:typename:void
fputs_filtered	tools/gdb/remote.c	/^#define fputs_filtered /;"	d	file:
fputs_unfiltered	tools/gdb/remote.c	/^#define fputs_unfiltered /;"	d	file:
fputstr_unfiltered	tools/gdb/remote.c	/^#define fputstr_unfiltered(/;"	d	file:
fputstrn_unfiltered	tools/gdb/remote.c	/^fputstrn_unfiltered(char *s, int n, int x, FILE *fp)$/;"	f	typeref:typename:void	file:
fqd_ar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fqd_ar;		\/* FQD Attributes Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
fqd_bar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fqd_bar;	\/* FQD Base Addr Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
fqd_bare	arch/powerpc/include/asm/immap_85xx.h	/^	u32	fqd_bare;	\/* FQD Extended Base Addr Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
fqid	include/fsl-mc/fsl_dpni.h	/^	uint32_t fqid;$/;"	m	struct:dpni_queue_attr	typeref:typename:uint32_t
fr	arch/m68k/include/asm/coldfire/eport.h	/^	u8 fr;		\/* 0x0C *\/$/;"	m	struct:eport	typeref:typename:u8
fr	drivers/serial/serial_pl01x_internal.h	/^	u32	fr;		\/* 0x18 Flag register (Read only) *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
fr	drivers/spi/fsl_qspi.h	/^	u32 fr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
fr_div	drivers/video/mb862xx.c	/^unsigned int fr_div[] = { 0x00000f00, 0x00000900, 0x00000500 };$/;"	v	typeref:typename:unsigned int[]
fr_h_i	drivers/net/ks8851_mll.c	/^} fr_h_i[MAX_RECV_FRAMES];$/;"	v	typeref:struct:type_frame_head[]
fra	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 fra;$/;"	m	struct:at91_emac	typeref:typename:u32
frabortduecol	drivers/qe/uec.h	/^	u32  frabortduecol;      \/* frames aborted due to tx collision *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
frac	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	u32 frac;$/;"	m	struct:pll_div	typeref:typename:u32
frac	drivers/clk/rockchip/clk_rk3399.c	/^	u32 frac;$/;"	m	struct:pll_div	typeref:typename:u32	file:
frac	drivers/video/console_truetype.c	/^static double frac(double val)$/;"	f	typeref:typename:double	file:
frac_width	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^			u32 frac_width;	\/* field fraction width *\/$/;"	m	struct:bcm_clk_div::__anona6938245010a::__anona69382450208	typeref:typename:u32
frac_width	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^			u32 frac_width;	\/* field fraction width *\/$/;"	m	struct:bcm_clk_div::__anone9f7c086010a::__anone9f7c0860208	typeref:typename:u32
fracctrl	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int fracctrl;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
fracdiv	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int fracdiv;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
fracsiz	drivers/qe/uec.h	/^	u8   fracsiz;$/;"	m	struct:uec_scheduler	typeref:typename:u8
frag	fs/jffs2/jffs2_nand_private.h	/^	struct b_list frag;$/;"	m	struct:b_lists	typeref:struct:b_list
frag	fs/jffs2/jffs2_private.h	/^	struct b_list frag;$/;"	m	struct:b_lists	typeref:struct:b_list
frag	include/net.h	/^		} frag;$/;"	m	union:icmp_hdr::__anona5cac555010a	typeref:struct:icmp_hdr::__anona5cac555010a::__anona5cac5550308
fragment_addr	include/ext_common.h	/^	__le32 fragment_addr;$/;"	m	struct:ext2_inode	typeref:typename:__le32
fragments_per_group	include/ext_common.h	/^	__le32 fragments_per_group;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
fraligner	drivers/qe/uec.h	/^	u32   fraligner;         \/* frames with alignment error *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
frame	drivers/net/mpc512x_fec.h	/^	u8 frame[FEC_BUFFER_SIZE];$/;"	m	struct:__anonf8b8c0fc0308	typeref:typename:u8[]
frame	drivers/usb/musb-new/musb_core.h	/^	u16 frame;$/;"	m	struct:musb_context_registers	typeref:typename:u16
frame	drivers/usb/musb-new/musb_host.h	/^	u16			frame;		\/* for periodic schedule *\/$/;"	m	struct:musb_qh	typeref:typename:u16
frame	drivers/usb/musb/musb_core.h	/^	u16	frame;$/;"	m	struct:musb_regs	typeref:typename:u16
frameAdrs	include/video_fb.h	/^    unsigned int frameAdrs;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
frame_aging	include/vsc9953.h	/^	u32	frame_aging;$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32
frame_buffer	arch/arm/include/asm/arch-omap3/dss.h	/^	void *frame_buffer;$/;"	m	struct:panel_config	typeref:typename:void *
frame_buffer	drivers/video/tegra.c	/^	fdt_addr_t frame_buffer;	\/* Address of frame buffer *\/$/;"	m	struct:tegra_lcd_priv	typeref:typename:fdt_addr_t	file:
frame_cnt	drivers/net/ks8851_mll.c	/^	u32			frame_cnt;$/;"	m	struct:ks_net	typeref:typename:u32	file:
frame_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 frame_ctrl;			\/* 0x004 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
frame_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 frame_ctrl;			\/* 0x004 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
frame_data_size	include/fsl-mc/fsl_dpni.h	/^	enum dpni_stash_size frame_data_size;$/;"	m	struct:dpni_flc_cfg	typeref:enum:dpni_stash_size
frame_drop_count	drivers/usb/eth/mcs7830.c	/^	uint8_t frame_drop_count;$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t	file:
frame_head_info	drivers/net/ks8851_mll.c	/^	struct type_frame_head	*frame_head_info;$/;"	m	struct:ks_net	typeref:struct:type_frame_head *	file:
frame_in_ms	drivers/video/tegra124/sor.h	/^	int	frame_in_ms;$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
frame_n	include/usb/mpc8xx_udc.h	/^	ushort frame_n;	\/* Frame number *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
frame_n	post/cpu/mpc8xx/usb.c	/^	ushort frame_n;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
frame_no	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u16	frame_no;		\/* current frame number *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
frame_no	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u16	frame_no;		\/* current frame number *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
frame_no	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u16 frame_no;		\/* current frame number *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
frame_no	drivers/usb/host/ohci-s3c24xx.h	/^	__u16 frame_no;		\/* current frame number *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
frame_no	drivers/usb/host/ohci.h	/^	__u16	frame_no;		\/* current frame number *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
frame_num1_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	frame_num1_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
frame_num2_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	frame_num2_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
frame_size	arch/arm/include/asm/arch-tegra/ivc.h	/^	uint32_t frame_size;$/;"	m	struct:tegra_ivc	typeref:typename:uint32_t
framebuffer	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	struct cb_framebuffer *framebuffer;$/;"	m	struct:sysinfo_t	typeref:struct:cb_framebuffer *
framebuffer	include/linux/fb.h	/^	__u32 framebuffer;$/;"	m	struct:fb_con2fbmap	typeref:typename:__u32
framebuffer_address	include/vbe.h	/^	u32 framebuffer_address;$/;"	m	struct:vbe_screen_info	typeref:typename:u32
framefilt	drivers/net/designware.h	/^	u32 framefilt;		\/* 0x04 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
framefilter	drivers/net/calxedaxgmac.c	/^	u32 framefilter;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
framelist	arch/sparc/cpu/leon3/usb_uhci.c	/^static unsigned long framelist[1024] __attribute__ ((aligned(0x1000)));	\/* frame list *\/$/;"	v	typeref:typename:unsigned long[1024]	file:
framelist	board/mpl/common/usb_uhci.c	/^static unsigned long framelist[1024] __attribute__ ((aligned (0x1000))); \/* frame list *\/$/;"	v	typeref:typename:unsigned long[1024]	file:
framerate_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 framerate_params_sn20[]	= {0x00, 0x13, 0x13};$/;"	v	typeref:typename:u16[]	file:
frap	drivers/spi/ich.h	/^	uint32_t frap;		\/* 0x50 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
frba_t	tools/ifdtool.h	/^struct __packed frba_t {$/;"	s
frbr	arch/m68k/include/asm/fec.h	/^	u32 frbr;		\/* 0x8C *\/$/;"	m	struct:fec	typeref:typename:u32
frc	include/fsl-mc/fsl_dpaa_fd.h	/^			u32 frc; \/* frame context *\/$/;"	m	struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple	typeref:typename:u32
frc	include/fsl-mc/fsl_qbman_base.h	/^			uint32_t frc; \/* frame context *\/$/;"	m	struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple	typeref:typename:uint32_t
frch0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 frch0;		\/* 0x10 Force High *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32
frch1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 frch1;		\/* 0x10 Force High *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32
frcl0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 frcl0;		\/* 0x14 Force Low *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32
frcl1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 frcl1;		\/* 0x14 Force Low *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32
frdi_idx_list	fs/ubifs/ubifs.h	/^	struct list_head frdi_idx_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
free	arch/sandbox/include/asm/spi.h	/^	void (*free)(void *priv);$/;"	m	struct:sandbox_spi_emu_ops	typeref:typename:void (*)(void * priv)
free	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	} free[4];$/;"	m	struct:lpc32xx_oob	typeref:struct:lpc32xx_oob::__anon2b4937370108[4]	file:
free	drivers/mtd/ubi/ubi.h	/^	struct list_head free;$/;"	m	struct:ubi_attach_info	typeref:struct:list_head
free	drivers/mtd/ubi/ubi.h	/^	struct rb_root free;$/;"	m	struct:ubi_device	typeref:struct:rb_root
free	fs/ubifs/replay.c	/^	int free;$/;"	m	struct:bud_entry	typeref:typename:int	file:
free	fs/ubifs/ubifs.h	/^	int free;$/;"	m	struct:ubifs_lprops	typeref:typename:int
free	fs/ubifs/ubifs.h	/^	int free;$/;"	m	struct:ubifs_lpt_lprops	typeref:typename:int
free	include/asm-generic/gpio.h	/^	int (*free)(struct udevice *dev, unsigned offset);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset)
free	include/clk-uclass.h	/^	int (*free)(struct clk *clock);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * clock)
free	include/mailbox-uclass.h	/^	int (*free)(struct mbox_chan *chan);$/;"	m	struct:mbox_ops	typeref:typename:int (*)(struct mbox_chan * chan)
free	include/malloc.h	/^#pragma weak free /;"	d
free	include/malloc.h	/^static inline void free(void *ptr) {}$/;"	f	typeref:typename:void
free	include/power-domain-uclass.h	/^	int (*free)(struct power_domain *power_domain);$/;"	m	struct:power_domain_ops	typeref:typename:int (*)(struct power_domain * power_domain)
free	include/reset-uclass.h	/^	int (*free)(struct reset_ctl *reset_ctl);$/;"	m	struct:reset_ops	typeref:typename:int (*)(struct reset_ctl * reset_ctl)
free_bch	lib/bch.c	/^void free_bch(struct bch_control *bch)$/;"	f	typeref:typename:void
free_blocks	include/ext_common.h	/^	__le16 free_blocks;	\/* Free blocks count *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le16
free_blocks	include/ext_common.h	/^	__le32 free_blocks;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
free_blocks_high	include/ext_common.h	/^	__le16 free_blocks_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
free_blocks_high	include/ext_common.h	/^	__le32 free_blocks_high;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
free_buds	fs/ubifs/super.c	/^static void free_buds(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
free_cached_objects	fs/ubifs/ubifs.h	/^	long (*free_cached_objects)(struct super_block *, long, int);$/;"	m	struct:super_operations	typeref:typename:long (*)(struct super_block *,long,int)
free_cnt	include/vsc9953.h	/^	u16	free_cnt;$/;"	m	struct:vsc9953_sys_mmgt	typeref:typename:u16
free_count	drivers/mtd/ubi/ubi.h	/^	int free_count;$/;"	m	struct:ubi_device	typeref:typename:int
free_entity	include/dfu.h	/^	void (*free_entity)(struct dfu_entity *dfu);$/;"	m	struct:dfu_entity	typeref:typename:void (*)(struct dfu_entity * dfu)
free_ep_req	drivers/usb/gadget/f_thor.c	/^static void free_ep_req(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
free_func	include/u-boot/zlib.h	/^#  define free_func /;"	d
free_inodes	fs/ubifs/debug.c	/^static void free_inodes(struct fsck_data *fsckd)$/;"	f	typeref:typename:void	file:
free_inodes	include/ext_common.h	/^	__le16 free_inodes;	\/* Free inodes count *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le16
free_inodes	include/ext_common.h	/^	__le32 free_inodes;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
free_inodes_high	include/ext_common.h	/^	__le16 free_inodes_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
free_irq	include/linux/compat.h	/^#define free_irq(/;"	d
free_memory	lib/efi/efi_app.c	/^static void free_memory(struct efi_priv *priv)$/;"	f	typeref:typename:void	file:
free_nodes	fs/jffs2/jffs2_1pass.c	/^free_nodes(struct b_list *list)$/;"	f	typeref:typename:void	file:
free_nodes	fs/jffs2/jffs2_nand_1pass.c	/^free_nodes(struct b_list *list)$/;"	f	typeref:typename:void	file:
free_objs	fs/yaffs2/yaffs_allocator.c	/^	struct list_head free_objs;$/;"	m	struct:yaffs_allocator	typeref:struct:list_head	file:
free_obsolete_cnodes	fs/ubifs/lpt_commit.c	/^static void free_obsolete_cnodes(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
free_oob_bytes	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^		uint8_t free_oob_bytes[6];$/;"	m	struct:lpc32xx_oob::__anon2b4937370108	typeref:typename:uint8_t[6]	file:
free_orphans	fs/ubifs/super.c	/^static void free_orphans(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
free_partition	drivers/mtd/mtdpart.c	/^static inline void free_partition(struct mtd_part *p)$/;"	f	typeref:typename:void	file:
free_peb_count	drivers/mtd/ubi/ubi-media.h	/^	__be32 free_peb_count;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
free_pipe	common/cli_hush.c	/^static int free_pipe(struct pipe *pi, int indent)$/;"	f	typeref:typename:int	file:
free_pipe_list	common/cli_hush.c	/^static int free_pipe_list(struct pipe *head, int indent)$/;"	f	typeref:typename:int	file:
free_pkt	drivers/net/altera_tse.h	/^	int (*free_pkt)(struct udevice *dev, uchar *packet, int length);$/;"	m	struct:tse_ops	typeref:typename:int (*)(struct udevice * dev,uchar * packet,int length)
free_pkt	include/net.h	/^	int (*free_pkt)(struct udevice *dev, uchar *packet, int length);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev,uchar * packet,int length)
free_record	drivers/usb/musb-new/musb_gadget.c	/^struct free_record {$/;"	s	file:
free_request	include/linux/usb/gadget.h	/^	void (*free_request) (struct usb_ep *ep, struct usb_request *req);$/;"	m	struct:usb_ep_ops	typeref:typename:void (*)(struct usb_ep * ep,struct usb_request * req)
free_seen	drivers/mtd/ubi/fastmap.c	/^static inline void free_seen(int *seen)$/;"	f	typeref:typename:void	file:
free_slot	drivers/usb/dwc3/core.h	/^	u32			free_slot;$/;"	m	struct:dwc3_ep	typeref:typename:u32
free_storage_on_release	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		free_storage_on_release:1;$/;"	m	struct:fsg_common	typeref:typename:unsigned int:1	file:
free_task_struct	arch/arm/include/asm/processor.h	/^#define free_task_struct(/;"	d
free_task_struct	arch/powerpc/include/asm/processor.h	/^#define free_task_struct(/;"	d
free_tlb_cam	arch/powerpc/cpu/mpc85xx/tlb.c	/^static inline void free_tlb_cam(u8 idx)$/;"	f	typeref:typename:void	file:
free_tnodes	fs/yaffs2/yaffs_allocator.c	/^	struct yaffs_tnode *free_tnodes;$/;"	m	struct:yaffs_allocator	typeref:struct:yaffs_tnode *	file:
free_wbufs	fs/ubifs/super.c	/^static void free_wbufs(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
freeable_cnt	fs/ubifs/ubifs.h	/^	int freeable_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
freeable_list	fs/ubifs/ubifs.h	/^	struct list_head freeable_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
freeze_controller_base	arch/arm/mach-socfpga/freeze_controller.c	/^static const struct socfpga_freeze_controller *freeze_controller_base =$/;"	v	typeref:typename:const struct socfpga_freeze_controller *	file:
freeze_controller_base	arch/arm/mach-socfpga/scan_manager.c	/^static const struct socfpga_freeze_controller *freeze_controller_base =$/;"	v	typeref:typename:const struct socfpga_freeze_controller *	file:
freeze_fs	fs/ubifs/ubifs.h	/^	int (*freeze_fs) (struct super_block *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct super_block *)
freg	drivers/spi/ich.h	/^	uint32_t freg[5];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t[5]
freq	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	u8      freq:3;$/;"	m	struct:pipe3_dpll_params	typeref:typename:u8:3
freq	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 freq;$/;"	m	struct:rk3036_ddr_timing	typeref:typename:u32
freq	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t freq;$/;"	m	struct:emc_dvfs_latency	typeref:typename:uint32_t
freq	arch/arm/include/asm/emif.h	/^	u32 freq;$/;"	m	struct:emif_regs	typeref:typename:u32
freq	arch/arm/mach-sunxi/clock_sun4i.c	/^	unsigned int freq;$/;"	m	struct:__anon4368fa7c0108	typeref:typename:unsigned int	file:
freq	board/astro/mcf5373l/astro.h	/^	unsigned short freq;$/;"	m	struct:__anona9f590f60108	typeref:typename:unsigned short
freq	drivers/pwm/rk_pwm.c	/^	ulong freq;$/;"	m	struct:rk_pwm_priv	typeref:typename:ulong	file:
freq	drivers/spi/atmel_spi.c	/^	unsigned int freq;		\/* Default frequency *\/$/;"	m	struct:atmel_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/davinci_spi.c	/^	unsigned int freq; \/* current SPI bus frequency *\/$/;"	m	struct:davinci_spi_slave	typeref:typename:unsigned int	file:
freq	drivers/spi/designware_spi.c	/^	unsigned int freq;		\/* Default frequency *\/$/;"	m	struct:dw_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/exynos_spi.c	/^	unsigned int freq;		\/* Default frequency *\/$/;"	m	struct:exynos_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/omap3_spi.c	/^	unsigned int freq;$/;"	m	struct:omap3_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/tegra114_spi.c	/^	unsigned int freq;$/;"	m	struct:tegra114_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/tegra20_sflash.c	/^	unsigned int freq;$/;"	m	struct:tegra20_sflash_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/tegra20_slink.c	/^	unsigned int freq;$/;"	m	struct:tegra30_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/tegra210_qspi.c	/^	unsigned int freq;$/;"	m	struct:tegra210_qspi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/xilinx_spi.c	/^	unsigned int freq;$/;"	m	struct:xilinx_spi_priv	typeref:typename:unsigned int	file:
freq	drivers/spi/zynq_qspi.c	/^	u32 freq;		\/* required frequency *\/$/;"	m	struct:zynq_qspi_priv	typeref:typename:u32	file:
freq	drivers/spi/zynq_spi.c	/^	u32 freq;		\/* required frequency *\/$/;"	m	struct:zynq_spi_priv	typeref:typename:u32	file:
freq	drivers/usb/dwc3/ti_usb_phy.c	/^	u8	freq:3;$/;"	m	struct:usb3_dpll_params	typeref:typename:u8:3	file:
freq	drivers/usb/phy/omap_usb_phy.c	/^	u8	freq:3;$/;"	m	struct:usb3_dpll_params	typeref:typename:u8:3	file:
freq	include/ambapp.h	/^	unsigned int	freq;		\/* Frequency of bus0 [Hz] *\/$/;"	m	struct:ambapp_bus	typeref:typename:unsigned int
freq	include/spd.h	/^	unsigned char freq;        \/* 128 Intel spec: frequency *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
freq	lib/zlib/deflate.h	/^        ush  freq;       \/* frequency count *\/$/;"	m	union:ct_data_s::__anonaf16f3d6010a	typeref:typename:ush
freqDDR	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqDDR;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqEBC	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqEBC;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqOPB	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqOPB;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqPCI	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqPCI;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqPLB	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqPLB;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqProcessor	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqProcessor;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqTmrClk	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqTmrClk;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqUART	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqUART;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqVCOHz	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqVCOHz;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freqVCOMhz	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long freqVCOMhz;	\/* in MHz                          *\/$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
freq_60x	arch/powerpc/cpu/mpc8260/speed.c	/^	char *freq_60x;$/;"	m	struct:__anon1baf12f90108	typeref:typename:char *	file:
freq_bit_shift	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int freq_bit_shift;	\/* 8 for most CCUs *\/$/;"	m	struct:ccu_clock	typeref:typename:int
freq_bit_shift	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int freq_bit_shift;	\/* 8 for most CCUs *\/$/;"	m	struct:ccu_clock	typeref:typename:int
freq_c	arch/arm/cpu/arm920t/s3c24x0/cpu_info.c	/^static const char freq_c[] = { 'F', 'H', 'P' };$/;"	v	typeref:typename:const char[]	file:
freq_chg_en	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 freq_chg_en;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
freq_core	arch/powerpc/cpu/mpc8260/speed.c	/^	char *freq_core;$/;"	m	struct:__anon1baf12f90108	typeref:typename:char *	file:
freq_cpri	include/e500.h	/^	unsigned long freq_cpri;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_cpu;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
freq_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_cpu;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
freq_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_cpu;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
freq_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_cpu;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
freq_ddrbus	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_ddrbus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_ddrbus	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_ddrbus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_ddrbus	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	unsigned long freq_ddrbus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_ddrbus	include/e500.h	/^	unsigned long freq_ddrbus;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_ddrbus2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_ddrbus2;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_desc	drivers/timer/tsc_timer.c	/^struct freq_desc {$/;"	s	file:
freq_desc_tables	drivers/timer/tsc_timer.c	/^static struct freq_desc freq_desc_tables[] = {$/;"	v	typeref:struct:freq_desc[]	file:
freq_dpm	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_dpm;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
freq_dpm	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_dpm;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
freq_dpm	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_dpm;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
freq_dpm	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	freq_dpm;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
freq_f	arch/arm/cpu/arm920t/s3c24x0/cpu_info.c	/^static const getfreq freq_f[] = {$/;"	v	typeref:typename:const getfreq[]	file:
freq_fman	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];$/;"	m	struct:sys_info	typeref:typename:unsigned long[]
freq_fman	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];$/;"	m	struct:sys_info	typeref:typename:unsigned long[]
freq_fman	include/e500.h	/^	unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long[]
freq_hz	arch/x86/include/asm/sfi.h	/^	u32	freq_hz;	\/* in HZ *\/$/;"	m	struct:sfi_timer_table_entry	typeref:typename:u32
freq_id	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int freq_id;$/;"	m	struct:ccu_clock	typeref:typename:int
freq_id	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int freq_id;$/;"	m	struct:ccu_clock	typeref:typename:int
freq_info_table	drivers/ddr/marvell/a38x/ddr3_training.c	/^struct hws_tip_freq_config_info *freq_info_table = NULL;$/;"	v	typeref:struct:hws_tip_freq_config_info *
freq_khz	arch/sparc/cpu/leon2/prom.c	/^	int freq_khz;$/;"	m	struct:leon_prom_info	typeref:typename:int	file:
freq_khz	arch/sparc/cpu/leon3/prom.c	/^	int freq_khz;$/;"	m	struct:leon_prom_info	typeref:typename:int	file:
freq_last	drivers/misc/pca9551_led.c	/^static int freq_last = -1;$/;"	v	typeref:typename:int	file:
freq_localbus	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_localbus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_localbus	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_localbus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_localbus	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	unsigned long freq_localbus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_localbus	include/e500.h	/^	unsigned long freq_localbus;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_localbus	include/mpc86xx.h	/^	unsigned long freq_localbus;$/;"	m	struct:__anon176fb30c0108	typeref:typename:unsigned long
freq_maple	include/e500.h	/^	unsigned long freq_maple;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_maple_etvpe	include/e500.h	/^	unsigned long freq_maple_etvpe;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_maple_ulb	include/e500.h	/^	unsigned long freq_maple_ulb;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_mhz	arch/x86/include/asm/sfi.h	/^	u32	freq_mhz;	\/* in MHZ *\/$/;"	m	struct:sfi_freq_table_entry	typeref:typename:u32
freq_out	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int freq_out;		\/* frequency out *\/$/;"	m	struct:set_epll_con_val	typeref:typename:unsigned int
freq_pme	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_pme;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_pme	include/e500.h	/^	unsigned long freq_pme;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_processor	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_processor[CONFIG_MAX_CPUS];$/;"	m	struct:sys_info	typeref:typename:unsigned long[]
freq_processor	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_processor[CONFIG_MAX_CPUS];$/;"	m	struct:sys_info	typeref:typename:unsigned long[]
freq_processor	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	unsigned long freq_processor[CONFIG_MAX_CPUS];$/;"	m	struct:sys_info	typeref:typename:unsigned long[]
freq_processor	include/e500.h	/^	unsigned long freq_processor[CONFIG_MAX_CPUS];$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long[]
freq_processor	include/mpc86xx.h	/^	unsigned long freq_processor;$/;"	m	struct:__anon176fb30c0108	typeref:typename:unsigned long
freq_processor_dsp	include/e500.h	/^	unsigned long freq_processor_dsp[CONFIG_MAX_DSP_CPUS];$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long[]
freq_qe	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_qe;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_qe	include/e500.h	/^	unsigned long freq_qe;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_qman	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_qman;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_qman	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_qman;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_qman	include/e500.h	/^	unsigned long freq_qman;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_sdhc	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_sdhc;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_sdhc	include/e500.h	/^	unsigned long freq_sdhc;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_systembus	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	unsigned long freq_systembus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_systembus	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	unsigned long freq_systembus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_systembus	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	unsigned long freq_systembus;$/;"	m	struct:sys_info	typeref:typename:unsigned long
freq_systembus	include/e500.h	/^	unsigned long freq_systembus;$/;"	m	struct:__anon469b21c80108	typeref:typename:unsigned long
freq_systembus	include/mpc86xx.h	/^	unsigned long freq_systembus;$/;"	m	struct:__anon176fb30c0108	typeref:typename:unsigned long
freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long *freq_tbl;$/;"	m	struct:bus_clock	typeref:typename:unsigned long *
freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long *freq_tbl;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long *
freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long *freq_tbl;$/;"	m	struct:bus_clock	typeref:typename:unsigned long *
freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long *freq_tbl;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long *
freq_update_core	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void freq_update_core(void)$/;"	f	typeref:typename:void
freq_val	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u32 freq_val[DDR_FREQ_LIMIT] = {$/;"	v	typeref:typename:u32[]
freqid	arch/arm/cpu/armv7/iproc-common/armpll.c	/^	unsigned int freqid;$/;"	m	struct:armpll_parameters	typeref:typename:unsigned int	file:
freqs	drivers/timer/tsc_timer.c	/^	u32 freqs[MAX_NUM_FREQS];$/;"	m	struct:freq_desc	typeref:typename:u32[]	file:
freqsel	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 freqsel;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
frequency	arch/arm/mach-zynq/clk.c	/^	unsigned long	frequency;$/;"	m	struct:clk	typeref:typename:unsigned long	file:
frequency	arch/sandbox/cpu/sdl.c	/^	uint frequency;$/;"	m	struct:sdl_info	typeref:typename:uint	file:
frequency	drivers/spi/designware_spi.c	/^	s32 frequency;		\/* Default clock frequency, -1 for none *\/$/;"	m	struct:dw_spi_platdata	typeref:typename:s32	file:
frequency	drivers/spi/exynos_spi.c	/^	s32 frequency;		\/* Default clock frequency, -1 for none *\/$/;"	m	struct:exynos_spi_platdata	typeref:typename:s32	file:
frequency	drivers/spi/mvebu_a3700_spi.c	/^	unsigned int frequency;$/;"	m	struct:mvebu_spi_platdata	typeref:typename:unsigned int	file:
frequency	drivers/spi/rk_spi.c	/^	s32 frequency;		\/* Default clock frequency, -1 for none *\/$/;"	m	struct:rockchip_spi_platdata	typeref:typename:s32	file:
frequency	drivers/spi/tegra_spi.h	/^	int frequency;		\/* Default clock frequency, -1 for none *\/$/;"	m	struct:tegra_spi_platdata	typeref:typename:int
frequency	drivers/spi/zynq_qspi.c	/^	u32 frequency;          \/* input frequency *\/$/;"	m	struct:zynq_qspi_platdata	typeref:typename:u32	file:
frequency	drivers/spi/zynq_spi.c	/^	u32 frequency;		\/* input frequency *\/$/;"	m	struct:zynq_spi_platdata	typeref:typename:u32	file:
frequency_mhz	arch/arm/mach-exynos/clock_init.h	/^	unsigned frequency_mhz;		\/* Frequency of memory in MHz *\/$/;"	m	struct:mem_timings	typeref:typename:unsigned
frequency_mhz	arch/arm/mach-exynos/include/mach/spl.h	/^	unsigned	frequency_mhz;	\/* Frequency of memory in MHz *\/$/;"	m	struct:spl_machine_param	typeref:typename:unsigned
frindex	arch/arm/include/asm/arch-tegra/usb.h	/^	uint frindex;$/;"	m	struct:usb_ctlr	typeref:typename:uint
frindex	arch/arm/include/asm/ehci-omap.h	/^	u32 frindex;		\/* 0x1c *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
frindex	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 frindex;		\/* frindex *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
frindex	arch/m68k/include/asm/immap_5329.h	/^	u32 frindex;		\/* 0x14C USB Frame Index *\/$/;"	m	struct:usb_otg	typeref:typename:u32
frindex	include/usb/ehci-ci.h	/^	u32	frindex;	\/* 0x14C - USB Frame Index *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
frlhsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	frlhsr;		\/* 0xD8 Fall\/Rise - Low\/High Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
frlossinmacer	drivers/qe/uec.h	/^	u32   frlossinmacer;$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
frlostinmactxer	drivers/qe/uec.h	/^	u32  frlostinmactxer;    \/* frames lost due to internal MAC error tx *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
from	doc/README.x86	/^from the sample SPI image provided in the FSP (SPI.bin at the time of writing).$/;"	l
from_env	cmd/pxe.c	/^static char *from_env(const char *envvar)$/;"	f	typeref:typename:char *	file:
from_spl	arch/arm/mach-tegra/board.c	/^static bool from_spl __attribute__ ((section(".data")));$/;"	v	typeref:typename:bool	file:
fromhex	tools/gdb/remote.c	/^fromhex (int a)$/;"	f	typeref:typename:int	file:
front_panel_support	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t front_panel_support;$/;"	m	struct:pch_azalia_verb_table_header	typeref:typename:uint8_t
front_porch	arch/arm/include/asm/arch-tegra/dc.h	/^	uint front_porch;		\/* _DISP_FRONT_PORCH_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
front_porch	drivers/video/da8xx-fb.h	/^	int front_porch;$/;"	m	struct:lcd_sync_arg	typeref:typename:int
front_port_mode	include/vsc9953.h	/^	u32	front_port_mode[10];$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32[10]
frontlink	common/dlmalloc.c	/^#define frontlink(/;"	d	file:
frozen	fs/ubifs/ubifs.h	/^	int			frozen;		\/* Is sb frozen? *\/$/;"	m	struct:sb_writers	typeref:typename:int
frqcra	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 frqcra;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
frqcra	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 frqcra; \/* 0x00 *\/$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
frqcrb	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 frqcrb;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
frqcrb	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 frqcrb;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
frqcrc	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 frqcrc;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
frqcrd	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 frqcrd;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
frqcrd	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 frqcrd;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
frr	arch/arm/mach-at91/include/mach/at91_eefc.h	/^	u32	frr;	\/* Flash Result Register RO *\/$/;"	m	struct:at91_eefc	typeref:typename:u32
frr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	frr;		\/* Feature Reporting *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
frr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	frr;		\/* 0x41000 - Feature Reporting Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
frr	include/faraday/ftsdmc021.h	/^	unsigned int	frr;		\/* 0x34 - Flush Request Register *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
frrxfcser	drivers/qe/uec.h	/^	u32   frrxfcser;         \/* frames with crc error *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
frsr	arch/m68k/include/asm/fec.h	/^	u32 frsr;		\/* 0x90 *\/$/;"	m	struct:fec	typeref:typename:u32
frst	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 frst;		\/* 0x1C4 *\/$/;"	m	struct:fecdma	typeref:typename:u32
frtoolong	drivers/qe/uec.h	/^	u32   frtoolong;         \/* frame too long *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
frtxok	drivers/qe/uec.h	/^	u32  frtxok;             \/* frames transmitted OK *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
frzctrl_channel_freeze	arch/arm/mach-socfpga/freeze_controller.c	/^static uint32_t frzctrl_channel_freeze[FREEZE_CHANNEL_NUM]$/;"	v	typeref:typename:uint32_t[]	file:
frzctrl_hioctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	frzctrl_hioctrl;		\/* 0x50 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
frzctrl_hwctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	frzctrl_hwctrl;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
frzctrl_src	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	frzctrl_src;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
frzctrl_vioctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	frzctrl_vioctrl;		\/* 0x40 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
fs	arch/powerpc/include/asm/processor.h	/^	mm_segment_t	fs;		\/* for get_fs() validation *\/$/;"	m	struct:thread_struct	typeref:typename:mm_segment_t
fs	drivers/bios_emulator/include/biosemu.h	/^	u16 fs;$/;"	m	struct:__anon964d10140808	typeref:typename:u16
fs_argv	cmd/pxe.c	/^static char *fs_argv[5];$/;"	v	typeref:typename:char * [5]	file:
fs_close	fs/fs.c	/^static void fs_close(void)$/;"	f	typeref:typename:void	file:
fs_close_unsupported	fs/fs.c	/^static inline void fs_close_unsupported(void)$/;"	f	typeref:typename:void	file:
fs_dev_desc	fs/fs.c	/^static struct blk_desc *fs_dev_desc;$/;"	v	typeref:struct:blk_desc *	file:
fs_disp_flow	drivers/video/ipu_regs.h	/^	u32 fs_disp_flow[2];$/;"	m	struct:ipu_cm	typeref:typename:u32[2]
fs_ep_in	drivers/usb/gadget/f_fastboot.c	/^static struct usb_endpoint_descriptor fs_ep_in = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_ep_out	drivers/usb/gadget/f_fastboot.c	/^static struct usb_endpoint_descriptor fs_ep_out = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_eth_function	drivers/usb/gadget/ether.c	/^static const struct usb_descriptor_header *fs_eth_function[11] = {$/;"	v	typeref:typename:const struct usb_descriptor_header * [11]	file:
fs_exists	fs/fs.c	/^int fs_exists(const char *filename)$/;"	f	typeref:typename:int
fs_exists_unsupported	fs/fs.c	/^static inline int fs_exists_unsupported(const char *filename)$/;"	f	typeref:typename:int	file:
fs_flags	fs/ubifs/ubifs.h	/^	int fs_flags;$/;"	m	struct:file_system_type	typeref:typename:int
fs_get_info	fs/fs.c	/^static struct fstype_info *fs_get_info(int fstype)$/;"	f	typeref:struct:fstype_info *	file:
fs_guid	arch/x86/include/asm/fsp/fsp_fv.h	/^	struct efi_guid		fs_guid;$/;"	m	struct:fv_header	typeref:struct:efi_guid
fs_hcnt	drivers/i2c/designware_i2c.c	/^	u32 fs_hcnt;$/;"	m	struct:dw_scl_sda_cfg	typeref:typename:u32	file:
fs_in_desc	drivers/usb/gadget/f_thor.c	/^static struct usb_endpoint_descriptor fs_in_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_int_desc	drivers/usb/gadget/f_thor.c	/^static struct usb_endpoint_descriptor fs_int_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_lcnt	drivers/i2c/designware_i2c.c	/^	u32 fs_lcnt;$/;"	m	struct:dw_scl_sda_cfg	typeref:typename:u32	file:
fs_ls	fs/fs.c	/^int fs_ls(const char *dirname)$/;"	f	typeref:typename:int
fs_ls_unsupported	fs/fs.c	/^static inline int fs_ls_unsupported(const char *dirname)$/;"	f	typeref:typename:int	file:
fs_mounted	net/nfs.c	/^static int fs_mounted;$/;"	v	typeref:typename:int	file:
fs_out_desc	drivers/usb/gadget/f_thor.c	/^static struct usb_endpoint_descriptor fs_out_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_partition	fs/fs.c	/^static disk_partition_t fs_partition;$/;"	v	typeref:typename:disk_partition_t	file:
fs_probe_unsupported	fs/fs.c	/^static inline int fs_probe_unsupported(struct blk_desc *fs_dev_desc,$/;"	f	typeref:typename:int	file:
fs_proc_flow	drivers/video/ipu_regs.h	/^	u32 fs_proc_flow[3];$/;"	m	struct:ipu_cm	typeref:typename:u32[3]
fs_ratios	drivers/sound/wm8994.c	/^static int fs_ratios[] = {$/;"	v	typeref:typename:int[]	file:
fs_read	fs/fs.c	/^int fs_read(const char *filename, ulong addr, loff_t offset, loff_t len,$/;"	f	typeref:typename:int
fs_read_sandbox	fs/sandbox/sandboxfs.c	/^int fs_read_sandbox(const char *filename, void *buf, loff_t offset, loff_t len,$/;"	f	typeref:typename:int
fs_read_unsupported	fs/fs.c	/^static inline int fs_read_unsupported(const char *filename, void *buf,$/;"	f	typeref:typename:int	file:
fs_rndis_function	drivers/usb/gadget/ether.c	/^static const struct usb_descriptor_header *fs_rndis_function[] = {$/;"	v	typeref:typename:const struct usb_descriptor_header * []	file:
fs_set_blk_dev	fs/fs.c	/^int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype)$/;"	f	typeref:typename:int
fs_sink_desc	drivers/usb/gadget/ether.c	/^fs_sink_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_size	fs/fs.c	/^int fs_size(const char *filename, loff_t *size)$/;"	f	typeref:typename:int
fs_size_unsupported	fs/fs.c	/^static inline int fs_size_unsupported(const char *filename, loff_t *size)$/;"	f	typeref:typename:int	file:
fs_source_desc	drivers/usb/gadget/ether.c	/^fs_source_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_state	include/ext_common.h	/^	__le16 fs_state;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
fs_status_desc	drivers/usb/gadget/ether.c	/^fs_status_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fs_subset_descriptors	drivers/usb/gadget/ether.c	/^static inline void fs_subset_descriptors(void)$/;"	f	typeref:typename:void	file:
fs_supers	fs/ubifs/ubifs.h	/^	struct hlist_head fs_supers;$/;"	m	struct:file_system_type	typeref:struct:hlist_head
fs_type	fs/fs.c	/^static int fs_type = FS_TYPE_ANY;$/;"	v	typeref:typename:int	file:
fs_type	include/fat.h	/^	char fs_type[8];	\/* Typically FAT12, FAT16, or FAT32 *\/$/;"	m	struct:volume_info	typeref:typename:char[8]
fs_uuid	fs/fs.c	/^int fs_uuid(char *uuid_str)$/;"	f	typeref:typename:int
fs_uuid_unsupported	fs/fs.c	/^static inline int fs_uuid_unsupported(char *uuid_str)$/;"	f	typeref:typename:int	file:
fs_write	fs/fs.c	/^int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len,$/;"	f	typeref:typename:int
fs_write_sandbox	fs/sandbox/sandboxfs.c	/^int fs_write_sandbox(const char *filename, void *buf, loff_t offset,$/;"	f	typeref:typename:int
fs_write_unsupported	fs/fs.c	/^static inline int fs_write_unsupported(const char *filename, void *buf,$/;"	f	typeref:typename:int	file:
fsa	include/linux/mtd/samsung_onenand.h	/^	unsigned int	fsa;		\/* 0x00F0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
fsadr	include/pxa_lcd.h	/^	u_long	fsadr;		\/* Frame source address register *\/$/;"	m	struct:pxafb_dma_descriptor	typeref:typename:u_long
fsar	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	fsar;			\/* 0x40 *\/$/;"	m	struct:scu_registers	typeref:typename:u32
fsck_data	fs/ubifs/debug.c	/^struct fsck_data {$/;"	s	file:
fsck_inode	fs/ubifs/debug.c	/^struct fsck_inode {$/;"	s	file:
fsdata	include/fat.h	/^} fsdata;$/;"	t	typeref:struct:__anona537cfc90108
fsel	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int fsel;$/;"	m	struct:__anonc27596e00108	typeref:typename:unsigned int
fseof1	drivers/usb/musb/musb_core.h	/^	u8	fseof1;$/;"	m	struct:musb_regs	typeref:typename:u8
fsg	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_dev		*fsg, *new_fsg;$/;"	m	struct:fsg_common	typeref:struct:fsg_dev *	file:
fsg_add	drivers/usb/gadget/f_mass_storage.c	/^int fsg_add(struct usb_configuration *c)$/;"	f	typeref:typename:int
fsg_bind	drivers/usb/gadget/f_mass_storage.c	/^static int fsg_bind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:int	file:
fsg_bind_config	drivers/usb/gadget/f_mass_storage.c	/^static int fsg_bind_config(struct usb_composite_dev *cdev,$/;"	f	typeref:typename:int	file:
fsg_buffer_state	drivers/usb/gadget/storage_common.c	/^enum fsg_buffer_state {$/;"	g	file:
fsg_buffhd	drivers/usb/gadget/storage_common.c	/^struct fsg_buffhd {$/;"	s	file:
fsg_bulk_cb_wrap	drivers/usb/gadget/storage_common.c	/^struct fsg_bulk_cb_wrap {$/;"	s	file:
fsg_common	drivers/usb/gadget/f_mass_storage.c	/^struct fsg_common {$/;"	s	file:
fsg_common_init	drivers/usb/gadget/f_mass_storage.c	/^static struct fsg_common *fsg_common_init(struct fsg_common *common,$/;"	f	typeref:struct:fsg_common *	file:
fsg_common_release	drivers/usb/gadget/f_mass_storage.c	/^static void fsg_common_release(struct kref *ref)$/;"	f	typeref:typename:void	file:
fsg_config	drivers/usb/gadget/f_mass_storage.c	/^struct fsg_config {$/;"	s	file:
fsg_dev	drivers/usb/gadget/f_mass_storage.c	/^struct fsg_dev {$/;"	s	file:
fsg_disable	drivers/usb/gadget/f_mass_storage.c	/^static void fsg_disable(struct usb_function *f)$/;"	f	typeref:typename:void	file:
fsg_ep_desc	drivers/usb/gadget/storage_common.c	/^fsg_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,$/;"	f	typeref:struct:usb_endpoint_descriptor *	file:
fsg_from_func	drivers/usb/gadget/f_mass_storage.c	/^static inline struct fsg_dev *fsg_from_func(struct usb_function *f)$/;"	f	typeref:struct:fsg_dev *	file:
fsg_fs_bulk_in_desc	drivers/usb/gadget/storage_common.c	/^fsg_fs_bulk_in_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fsg_fs_bulk_out_desc	drivers/usb/gadget/storage_common.c	/^fsg_fs_bulk_out_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fsg_fs_function	drivers/usb/gadget/storage_common.c	/^static struct usb_descriptor_header *fsg_fs_function[] = {$/;"	v	typeref:struct:usb_descriptor_header * []	file:
fsg_fs_intr_in_desc	drivers/usb/gadget/storage_common.c	/^fsg_fs_intr_in_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fsg_hs_bulk_in_desc	drivers/usb/gadget/storage_common.c	/^fsg_hs_bulk_in_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fsg_hs_bulk_out_desc	drivers/usb/gadget/storage_common.c	/^fsg_hs_bulk_out_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fsg_hs_function	drivers/usb/gadget/storage_common.c	/^static struct usb_descriptor_header *fsg_hs_function[] = {$/;"	v	typeref:struct:usb_descriptor_header * []	file:
fsg_hs_intr_in_desc	drivers/usb/gadget/storage_common.c	/^fsg_hs_intr_in_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
fsg_init	drivers/usb/gadget/f_mass_storage.c	/^int fsg_init(struct ums *ums_devs, int count)$/;"	f	typeref:typename:int
fsg_intf_desc	drivers/usb/gadget/storage_common.c	/^fsg_intf_desc = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
fsg_is_set	drivers/usb/gadget/f_mass_storage.c	/^#define fsg_is_set(/;"	d	file:
fsg_lun	drivers/usb/gadget/storage_common.c	/^struct fsg_lun {$/;"	s	file:
fsg_lun_close	drivers/usb/gadget/storage_common.c	/^static void fsg_lun_close(struct fsg_lun *curlun)$/;"	f	typeref:typename:void	file:
fsg_lun_config	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_lun_config {$/;"	s	struct:fsg_config	file:
fsg_lun_fsync_sub	drivers/usb/gadget/storage_common.c	/^static int fsg_lun_fsync_sub(struct fsg_lun *curlun)$/;"	f	typeref:typename:int	file:
fsg_lun_is_open	drivers/usb/gadget/storage_common.c	/^#define fsg_lun_is_open(/;"	d	file:
fsg_lun_open	drivers/usb/gadget/storage_common.c	/^static int fsg_lun_open(struct fsg_lun *curlun, unsigned int num_sectors,$/;"	f	typeref:typename:int	file:
fsg_main_thread	drivers/usb/gadget/f_mass_storage.c	/^int fsg_main_thread(void *common_)$/;"	f	typeref:typename:int
fsg_otg_desc	drivers/usb/gadget/storage_common.c	/^fsg_otg_desc = {$/;"	v	typeref:struct:usb_otg_descriptor	file:
fsg_routine_t	drivers/usb/gadget/f_mass_storage.c	/^typedef void (*fsg_routine_t)(struct fsg_dev *);$/;"	t	typeref:typename:void (*)(struct fsg_dev *)	file:
fsg_set_alt	drivers/usb/gadget/f_mass_storage.c	/^static int fsg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)$/;"	f	typeref:typename:int	file:
fsg_set_halt	drivers/usb/gadget/f_mass_storage.c	/^static int fsg_set_halt(struct fsg_dev *fsg, struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
fsg_setup	drivers/usb/gadget/f_mass_storage.c	/^static int fsg_setup(struct usb_function *f,$/;"	f	typeref:typename:int	file:
fsg_state	drivers/usb/gadget/storage_common.c	/^enum fsg_state {$/;"	g	file:
fsg_string_interface	drivers/usb/gadget/f_mass_storage.c	/^static const char fsg_string_interface[] = "Mass Storage";$/;"	v	typeref:typename:const char[]	file:
fsg_strings	drivers/usb/gadget/storage_common.c	/^static struct usb_string		fsg_strings[] = {$/;"	v	typeref:struct:usb_string[]	file:
fsg_strings_array	drivers/usb/gadget/f_mass_storage.c	/^static struct usb_gadget_strings *fsg_strings_array[] = {$/;"	v	typeref:struct:usb_gadget_strings * []	file:
fsg_stringtab	drivers/usb/gadget/storage_common.c	/^static struct usb_gadget_strings	fsg_stringtab = {$/;"	v	typeref:struct:usb_gadget_strings	file:
fsg_unbind	drivers/usb/gadget/f_mass_storage.c	/^static void fsg_unbind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:void	file:
fsiackcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 fsiackcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
fsiackcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 fsiackcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
fsibckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 fsibckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
fsid	include/cramfs/cramfs_fs.h	/^	struct cramfs_info fsid;	\/* unique filesystem info *\/$/;"	m	struct:cramfs_super	typeref:struct:cramfs_info
fsize_mb	drivers/mtd/ubispl/ubispl.h	/^	unsigned int			fsize_mb;$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned int
fsl_apply_xhci_errata	drivers/usb/host/xhci-fsl.c	/^static void fsl_apply_xhci_errata(void)$/;"	f	typeref:typename:void	file:
fsl_ata_exec_ata_cmd	drivers/block/fsl_sata.c	/^static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,$/;"	f	typeref:typename:int	file:
fsl_ata_exec_reset_cmd	drivers/block/fsl_sata.c	/^static int fsl_ata_exec_reset_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,$/;"	f	typeref:typename:int	file:
fsl_check_boot_mode_secure	board/freescale/common/fsl_chain_of_trust.c	/^int fsl_check_boot_mode_secure(void)$/;"	f	typeref:typename:int
fsl_configure_pcie	drivers/pci/fsl_pci_init.c	/^int fsl_configure_pcie(struct fsl_pci_info *info,$/;"	f	typeref:typename:int
fsl_dcu_init	drivers/video/fsl_dcu_fb.c	/^int fsl_dcu_init(unsigned int xres, unsigned int yres,$/;"	f	typeref:typename:int
fsl_dcu_mode_480_272	drivers/video/fsl_dcu_fb.c	/^static struct fb_videomode fsl_dcu_mode_480_272 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_dcu_mode_640_480	drivers/video/fsl_dcu_fb.c	/^static struct fb_videomode fsl_dcu_mode_640_480 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_ddr_board_options	board/Arcturus/ucp1020/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/b4860qds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/bsc9131rdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/bsc9132qds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/c29xpcie/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/corenet_ds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls1021aqds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls1043aqds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls1043ardb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls1046aqds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls1046ardb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls2080a/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls2080aqds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/ls2080ardb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8349emds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8536ds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8540ads/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8541cds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8544ds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8548cds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8555cds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8560ads/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8568mds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8569mds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8572ds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8610hpcd/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/mpc8641hpcn/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/p1010rdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/p1022ds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/p1023rdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/p1_p2_rdb_pc/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/p2041rdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t102xqds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t102xrdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t1040qds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t104xrdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t208xqds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t208xrdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t4qds/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/freescale/t4rdb/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/gdsys/p1022/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/keymile/kmp204x/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/sbc8548/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/sbc8641d/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/socrates/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/varisys/cyrus/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/xes/xpedite517x/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/xes/xpedite520x/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/xes/xpedite537x/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_board_options	board/xes/xpedite550x/ddr.c	/^void fsl_ddr_board_options(memctl_options_t *popts,$/;"	f	typeref:typename:void
fsl_ddr_cfg_regs_s	include/fsl_ddr_sdram.h	/^typedef struct fsl_ddr_cfg_regs_s {$/;"	s
fsl_ddr_cfg_regs_t	include/fsl_ddr_sdram.h	/^} fsl_ddr_cfg_regs_t;$/;"	t	typeref:struct:fsl_ddr_cfg_regs_s
fsl_ddr_compute	drivers/ddr/fsl/main.c	/^fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,$/;"	f	typeref:typename:unsigned long long
fsl_ddr_config_reg	include/fsl_ddr.h	/^	fsl_ddr_cfg_regs_t fsl_ddr_config_reg[CONFIG_SYS_NUM_DDR_CTLRS];$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:fsl_ddr_cfg_regs_t[]
fsl_ddr_dimm_parameters_edit	drivers/ddr/fsl/interactive.c	/^static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:void	file:
fsl_ddr_generic_edit	drivers/ddr/fsl/interactive.c	/^static void fsl_ddr_generic_edit(void *pdata,$/;"	f	typeref:typename:void	file:
fsl_ddr_get_dimm_params	board/Arcturus/ucp1020/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/b4860qds/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/bsc9131rdb/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/bsc9132qds/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/c29xpcie/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/ls1021aqds/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/ls1043ardb/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/ls2080a/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/p1010rdb/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/p1023rdb/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/p1_p2_rdb_pc/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_dimm_params	board/freescale/t102xrdb/ddr.c	/^int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,$/;"	f	typeref:typename:int
fsl_ddr_get_intl3r	drivers/ddr/fsl/util.c	/^u32 fsl_ddr_get_intl3r(void)$/;"	f	typeref:typename:u32
fsl_ddr_get_rtt	drivers/ddr/fsl/ctrl_regs.c	/^static inline int fsl_ddr_get_rtt(void)$/;"	f	typeref:typename:int	file:
fsl_ddr_get_spd	drivers/ddr/fsl/main.c	/^void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,$/;"	f	typeref:typename:void
fsl_ddr_get_version	drivers/ddr/fsl/util.c	/^u32 fsl_ddr_get_version(unsigned int ctrl_num)$/;"	f	typeref:typename:u32
fsl_ddr_info_t	include/fsl_ddr.h	/^} fsl_ddr_info_t;$/;"	t	typeref:struct:__anonbfc8c40c0108
fsl_ddr_interactive	drivers/ddr/fsl/interactive.c	/^unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set)$/;"	f	typeref:typename:unsigned long long
fsl_ddr_interactive_env_var_exists	drivers/ddr/fsl/interactive.c	/^int fsl_ddr_interactive_env_var_exists(void)$/;"	f	typeref:typename:int
fsl_ddr_options_edit	drivers/ddr/fsl/interactive.c	/^static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:void	file:
fsl_ddr_parse_interactive_cmd	drivers/ddr/fsl/interactive.c	/^static unsigned int fsl_ddr_parse_interactive_cmd($/;"	f	typeref:typename:unsigned int	file:
fsl_ddr_printinfo	drivers/ddr/fsl/interactive.c	/^static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:void	file:
fsl_ddr_regs_edit	drivers/ddr/fsl/interactive.c	/^static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:void	file:
fsl_ddr_sdram	drivers/ddr/fsl/main.c	/^phys_size_t fsl_ddr_sdram(void)$/;"	f	typeref:typename:phys_size_t
fsl_ddr_sdram_size	board/freescale/qemu-ppce500/qemu-ppce500.c	/^phys_size_t fsl_ddr_sdram_size(void)$/;"	f	typeref:typename:phys_size_t
fsl_ddr_sdram_size	drivers/ddr/fsl/main.c	/^fsl_ddr_sdram_size(void)$/;"	f	typeref:typename:phys_size_t
fsl_ddr_set_intl3r	drivers/ddr/fsl/util.c	/^void fsl_ddr_set_intl3r(const unsigned int granule_size)$/;"	f	typeref:typename:void
fsl_ddr_set_memctl_regs	drivers/ddr/fsl/arm_ddr_gen3.c	/^void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,$/;"	f	typeref:typename:void
fsl_ddr_set_memctl_regs	drivers/ddr/fsl/fsl_ddr_gen4.c	/^void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,$/;"	f	typeref:typename:void
fsl_ddr_set_memctl_regs	drivers/ddr/fsl/mpc85xx_ddr_gen1.c	/^void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,$/;"	f	typeref:typename:void
fsl_ddr_set_memctl_regs	drivers/ddr/fsl/mpc85xx_ddr_gen2.c	/^void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,$/;"	f	typeref:typename:void
fsl_ddr_set_memctl_regs	drivers/ddr/fsl/mpc85xx_ddr_gen3.c	/^void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,$/;"	f	typeref:typename:void
fsl_ddr_set_memctl_regs	drivers/ddr/fsl/mpc86xx_ddr.c	/^void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,$/;"	f	typeref:typename:void
fsl_ddr_spd_edit	drivers/ddr/fsl/interactive.c	/^static void fsl_ddr_spd_edit(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:void	file:
fsl_ddr_sync_memctl_refresh	drivers/ddr/fsl/util.c	/^void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl,$/;"	f	typeref:typename:void
fsl_diu_init	drivers/video/fsl_diu_fb.c	/^int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix)$/;"	f	typeref:typename:int
fsl_diu_mode_1024_768	drivers/video/fsl_diu_fb.c	/^static struct fb_videomode fsl_diu_mode_1024_768 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_diu_mode_1280_1024	drivers/video/fsl_diu_fb.c	/^static struct fb_videomode fsl_diu_mode_1280_1024 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_diu_mode_1280_720	drivers/video/fsl_diu_fb.c	/^static struct fb_videomode fsl_diu_mode_1280_720 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_diu_mode_1920_1080	drivers/video/fsl_diu_fb.c	/^static struct fb_videomode fsl_diu_mode_1920_1080 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_diu_mode_800_480	drivers/video/fsl_diu_fb.c	/^static struct fb_videomode fsl_diu_mode_800_480 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_diu_mode_800_600	drivers/video/fsl_diu_fb.c	/^static struct fb_videomode fsl_diu_mode_800_600 = {$/;"	v	typeref:struct:fb_videomode	file:
fsl_dma	arch/powerpc/include/asm/fsl_dma.h	/^typedef struct fsl_dma {$/;"	s
fsl_dma_t	arch/powerpc/include/asm/fsl_dma.h	/^} fsl_dma_t;$/;"	t	typeref:struct:fsl_dma
fsl_dp_disable_console	board/freescale/common/arm_sleep.c	/^void fsl_dp_disable_console(void)$/;"	f	typeref:typename:void
fsl_dp_disable_console	board/freescale/common/mpc85xx_sleep.c	/^void fsl_dp_disable_console(void)$/;"	f	typeref:typename:void
fsl_dp_resume	board/freescale/common/arm_sleep.c	/^int fsl_dp_resume(void)$/;"	f	typeref:typename:int
fsl_dp_resume	board/freescale/common/mpc85xx_sleep.c	/^int fsl_dp_resume(void)$/;"	f	typeref:typename:int
fsl_dpaa_dev	arch/powerpc/include/asm/fsl_portals.h	/^enum fsl_dpaa_dev {$/;"	g
fsl_dpbp_obj	include/fsl-mc/fsl_mc_private.h	/^struct fsl_dpbp_obj {$/;"	s
fsl_dpio_obj	include/fsl-mc/fsl_mc_private.h	/^struct fsl_dpio_obj {$/;"	s
fsl_dpni_obj	include/fsl-mc/fsl_mc_private.h	/^struct fsl_dpni_obj {$/;"	s
fsl_dspi	drivers/spi/fsl_dspi.c	/^struct fsl_dspi {$/;"	s	file:
fsl_dspi_bind	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_bind(struct udevice *bus)$/;"	f	typeref:typename:int	file:
fsl_dspi_cfg_cs_active_state	drivers/spi/fsl_dspi.c	/^static void fsl_dspi_cfg_cs_active_state(struct fsl_dspi_priv *priv,$/;"	f	typeref:typename:void	file:
fsl_dspi_cfg_ctar_mode	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_cfg_ctar_mode(struct fsl_dspi_priv *priv,$/;"	f	typeref:typename:int	file:
fsl_dspi_cfg_speed	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed)$/;"	f	typeref:typename:int	file:
fsl_dspi_child_pre_probe	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_dspi_claim_bus	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_dspi_clr_fifo	drivers/spi/fsl_dspi.c	/^static void fsl_dspi_clr_fifo(struct fsl_dspi_priv *priv)$/;"	f	typeref:typename:void	file:
fsl_dspi_hz_to_spi_baud	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_hz_to_spi_baud(int *pbr, int *br,$/;"	f	typeref:typename:int	file:
fsl_dspi_ids	drivers/spi/fsl_dspi.c	/^static const struct udevice_id fsl_dspi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
fsl_dspi_init_mcr	drivers/spi/fsl_dspi.c	/^static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val)$/;"	f	typeref:typename:void	file:
fsl_dspi_ofdata_to_platdata	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
fsl_dspi_ops	drivers/spi/fsl_dspi.c	/^static const struct dm_spi_ops fsl_dspi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
fsl_dspi_platdata	drivers/spi/fsl_dspi.c	/^struct fsl_dspi_platdata {$/;"	s	file:
fsl_dspi_priv	drivers/spi/fsl_dspi.c	/^struct fsl_dspi_priv {$/;"	s	file:
fsl_dspi_probe	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
fsl_dspi_release_bus	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_dspi_set_mode	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
fsl_dspi_set_speed	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
fsl_dspi_xfer	drivers/spi/fsl_dspi.c	/^static int fsl_dspi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
fsl_e_tlb_entry	arch/powerpc/include/asm/mmu.h	/^struct fsl_e_tlb_entry {$/;"	s
fsl_ehci_ops	drivers/usb/host/ehci-fsl.c	/^static const struct ehci_ops fsl_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
fsl_elbc_chip_init	drivers/mtd/nand/fsl_elbc_nand.c	/^static int fsl_elbc_chip_init(int devnum, u8 *addr)$/;"	f	typeref:typename:int	file:
fsl_elbc_cmdfunc	drivers/mtd/nand/fsl_elbc_nand.c	/^static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
fsl_elbc_ctrl	drivers/mtd/nand/fsl_elbc_nand.c	/^struct fsl_elbc_ctrl {$/;"	s	file:
fsl_elbc_ctrl_init	drivers/mtd/nand/fsl_elbc_nand.c	/^static void fsl_elbc_ctrl_init(void)$/;"	f	typeref:typename:void	file:
fsl_elbc_do_read	drivers/mtd/nand/fsl_elbc_nand.c	/^static void fsl_elbc_do_read(struct nand_chip *chip, int oob)$/;"	f	typeref:typename:void	file:
fsl_elbc_mtd	drivers/mtd/nand/fsl_elbc_nand.c	/^struct fsl_elbc_mtd {$/;"	s	file:
fsl_elbc_oob_lp_eccm0	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_ecclayout fsl_elbc_oob_lp_eccm0 = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsl_elbc_oob_lp_eccm1	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsl_elbc_oob_sp_eccm0	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_ecclayout fsl_elbc_oob_sp_eccm0 = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsl_elbc_oob_sp_eccm1	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_ecclayout fsl_elbc_oob_sp_eccm1 = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsl_elbc_read_buf	drivers/mtd/nand/fsl_elbc_nand.c	/^static void fsl_elbc_read_buf(struct mtd_info *mtd, u8 *buf, int len)$/;"	f	typeref:typename:void	file:
fsl_elbc_read_byte	drivers/mtd/nand/fsl_elbc_nand.c	/^static u8 fsl_elbc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
fsl_elbc_read_page	drivers/mtd/nand/fsl_elbc_nand.c	/^static int fsl_elbc_read_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
fsl_elbc_run_command	drivers/mtd/nand/fsl_elbc_nand.c	/^static int fsl_elbc_run_command(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
fsl_elbc_select_chip	drivers/mtd/nand/fsl_elbc_nand.c	/^static void fsl_elbc_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
fsl_elbc_wait	drivers/mtd/nand/fsl_elbc_nand.c	/^static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)$/;"	f	typeref:typename:int	file:
fsl_elbc_write_buf	drivers/mtd/nand/fsl_elbc_nand.c	/^static void fsl_elbc_write_buf(struct mtd_info *mtd, const u8 *buf, int len)$/;"	f	typeref:typename:void	file:
fsl_elbc_write_page	drivers/mtd/nand/fsl_elbc_nand.c	/^static int fsl_elbc_write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
fsl_elbc_write_subpage	drivers/mtd/nand/fsl_elbc_nand.c	/^static int fsl_elbc_write_subpage(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
fsl_enet_mac	drivers/net/fm/fm.h	/^struct fsl_enet_mac {$/;"	s
fsl_epu_clean	arch/arm/cpu/armv7/ls102xa/fsl_epu.c	/^void fsl_epu_clean(void *epu_base)$/;"	f	typeref:typename:void
fsl_epu_setup	arch/arm/cpu/armv7/ls102xa/fsl_epu.c	/^void fsl_epu_setup(void *epu_base)$/;"	f	typeref:typename:void
fsl_erratum_a006261_workaround	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)$/;"	f	typeref:typename:void
fsl_erratum_a007212_workaround	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void fsl_erratum_a007212_workaround(void)$/;"	f	typeref:typename:void
fsl_esdhc	drivers/mmc/fsl_esdhc.c	/^struct fsl_esdhc {$/;"	s	file:
fsl_esdhc_cfg	include/fsl_esdhc.h	/^struct fsl_esdhc_cfg {$/;"	s
fsl_esdhc_cfg_to_priv	drivers/mmc/fsl_esdhc.c	/^static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg,$/;"	f	typeref:typename:int	file:
fsl_esdhc_ids	drivers/mmc/fsl_esdhc.c	/^static const struct udevice_id fsl_esdhc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
fsl_esdhc_init	drivers/mmc/fsl_esdhc.c	/^static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)$/;"	f	typeref:typename:int	file:
fsl_esdhc_initialize	drivers/mmc/fsl_esdhc.c	/^int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)$/;"	f	typeref:typename:int
fsl_esdhc_mmc_init	drivers/mmc/fsl_esdhc.c	/^int fsl_esdhc_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
fsl_esdhc_mmc_init	include/fsl_esdhc.h	/^static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }$/;"	f	typeref:typename:int
fsl_esdhc_priv	drivers/mmc/fsl_esdhc.c	/^struct fsl_esdhc_priv {$/;"	s	file:
fsl_esdhc_probe	drivers/mmc/fsl_esdhc.c	/^static int fsl_esdhc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_espi_rx	drivers/spi/fsl_espi.c	/^static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes)$/;"	f	typeref:typename:int	file:
fsl_espi_tx	drivers/spi/fsl_espi.c	/^static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)$/;"	f	typeref:typename:void	file:
fsl_fdt_disable_usb	arch/arm/cpu/armv8/fsl-layerscape/fdt.c	/^void fsl_fdt_disable_usb(void *blob)$/;"	f	typeref:typename:void
fsl_fdt_fixup_dr_usb	drivers/usb/common/fsl-dt-fixup.c	/^void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
fsl_fdt_fixup_dr_usb	include/fdt_support.h	/^static inline void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd) {}$/;"	f	typeref:typename:void
fsl_fdt_fixup_erratum	drivers/usb/common/fsl-dt-fixup.c	/^static int fsl_fdt_fixup_erratum(int *usb_erratum_off, void *blob,$/;"	f	typeref:typename:int	file:
fsl_fdt_fixup_usb_erratum	drivers/usb/common/fsl-dt-fixup.c	/^static int fsl_fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,$/;"	f	typeref:typename:int	file:
fsl_i2c_base	arch/m68k/include/asm/fsl_i2c.h	/^typedef struct fsl_i2c_base {$/;"	s
fsl_i2c_base	arch/powerpc/include/asm/fsl_i2c.h	/^typedef struct fsl_i2c_base {$/;"	s
fsl_i2c_dev	arch/powerpc/include/asm/fsl_i2c.h	/^struct fsl_i2c_dev {$/;"	s
fsl_i2c_fixup	drivers/i2c/fsl_i2c.c	/^static int fsl_i2c_fixup(const struct fsl_i2c_base *base)$/;"	f	typeref:typename:int	file:
fsl_i2c_init	drivers/i2c/fsl_i2c.c	/^static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
fsl_i2c_probe_chip	drivers/i2c/fsl_i2c.c	/^fsl_i2c_probe_chip(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
fsl_i2c_read	drivers/i2c/fsl_i2c.c	/^fsl_i2c_read(struct i2c_adapter *adap, u8 chip_addr, uint offset, int olen,$/;"	f	typeref:typename:int	file:
fsl_i2c_set_bus_speed	drivers/i2c/fsl_i2c.c	/^static unsigned int fsl_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
fsl_i2c_speed_map	drivers/i2c/fsl_i2c.c	/^} fsl_i2c_speed_map[] = {$/;"	v	typeref:typename:const struct __anon2b7522730108[]
fsl_i2c_t	arch/m68k/include/asm/fsl_i2c.h	/^} fsl_i2c_t;$/;"	t	typeref:struct:fsl_i2c_base
fsl_i2c_t	arch/powerpc/include/asm/fsl_i2c.h	/^} fsl_i2c_t;$/;"	t	typeref:struct:fsl_i2c_base
fsl_i2c_write	drivers/i2c/fsl_i2c.c	/^fsl_i2c_write(struct i2c_adapter *adap, u8 chip_addr, uint offset, int olen,$/;"	f	typeref:typename:int	file:
fsl_ifc	include/fsl_ifc.h	/^struct fsl_ifc {$/;"	s
fsl_ifc_amask	include/fsl_ifc.h	/^struct fsl_ifc_amask {$/;"	s
fsl_ifc_chip_init	drivers/mtd/nand/fsl_ifc_nand.c	/^static int fsl_ifc_chip_init(int devnum, u8 *addr)$/;"	f	typeref:typename:int	file:
fsl_ifc_cmdfunc	drivers/mtd/nand/fsl_ifc_nand.c	/^static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
fsl_ifc_csor	include/fsl_ifc.h	/^struct fsl_ifc_csor {$/;"	s
fsl_ifc_cspr	include/fsl_ifc.h	/^struct fsl_ifc_cspr {$/;"	s
fsl_ifc_ctrl	drivers/mtd/nand/fsl_ifc_nand.c	/^struct fsl_ifc_ctrl {$/;"	s	file:
fsl_ifc_ctrl_init	drivers/mtd/nand/fsl_ifc_nand.c	/^static void fsl_ifc_ctrl_init(void)$/;"	f	typeref:typename:void	file:
fsl_ifc_do_read	drivers/mtd/nand/fsl_ifc_nand.c	/^static void fsl_ifc_do_read(struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
fsl_ifc_fcm	include/fsl_ifc.h	/^struct fsl_ifc_fcm {$/;"	s
fsl_ifc_ftim	include/fsl_ifc.h	/^struct fsl_ifc_ftim {$/;"	s
fsl_ifc_gpcm	include/fsl_ifc.h	/^struct fsl_ifc_gpcm {$/;"	s
fsl_ifc_mtd	drivers/mtd/nand/fsl_ifc_nand.c	/^struct fsl_ifc_mtd {$/;"	s	file:
fsl_ifc_nand	include/fsl_ifc.h	/^struct fsl_ifc_nand {$/;"	s
fsl_ifc_nor	include/fsl_ifc.h	/^struct fsl_ifc_nor {$/;"	s
fsl_ifc_read_buf	drivers/mtd/nand/fsl_ifc_nand.c	/^static void fsl_ifc_read_buf(struct mtd_info *mtd, u8 *buf, int len)$/;"	f	typeref:typename:void	file:
fsl_ifc_read_byte	drivers/mtd/nand/fsl_ifc_nand.c	/^static u8 fsl_ifc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
fsl_ifc_read_byte16	drivers/mtd/nand/fsl_ifc_nand.c	/^static uint8_t fsl_ifc_read_byte16(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
fsl_ifc_read_page	drivers/mtd/nand/fsl_ifc_nand.c	/^static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
fsl_ifc_run_command	drivers/mtd/nand/fsl_ifc_nand.c	/^static int fsl_ifc_run_command(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
fsl_ifc_runtime	include/fsl_ifc.h	/^struct fsl_ifc_runtime {$/;"	s
fsl_ifc_select_chip	drivers/mtd/nand/fsl_ifc_nand.c	/^static void fsl_ifc_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
fsl_ifc_sram_init	drivers/mtd/nand/fsl_ifc_nand.c	/^static int fsl_ifc_sram_init(uint32_t ver)$/;"	f	typeref:typename:int	file:
fsl_ifc_wait	drivers/mtd/nand/fsl_ifc_nand.c	/^static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)$/;"	f	typeref:typename:int	file:
fsl_ifc_write_buf	drivers/mtd/nand/fsl_ifc_nand.c	/^static void fsl_ifc_write_buf(struct mtd_info *mtd, const u8 *buf, int len)$/;"	f	typeref:typename:void	file:
fsl_ifc_write_page	drivers/mtd/nand/fsl_ifc_nand.c	/^static int fsl_ifc_write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
fsl_iim	drivers/misc/fsl_iim.c	/^struct fsl_iim {$/;"	s	file:
fsl_is_pci_agent	drivers/pci/fsl_pci_init.c	/^int fsl_is_pci_agent(struct pci_controller *hose)$/;"	f	typeref:typename:int
fsl_layerscape_wake_seconday_cores	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int fsl_layerscape_wake_seconday_cores(void)$/;"	f	typeref:typename:int
fsl_lbc	arch/powerpc/include/asm/fsl_lbc.h	/^typedef struct fsl_lbc {$/;"	s
fsl_lbc_t	arch/powerpc/include/asm/fsl_lbc.h	/^} fsl_lbc_t;$/;"	t	typeref:struct:fsl_lbc
fsl_lsch2_early_init_f	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^void fsl_lsch2_early_init_f(void)$/;"	f	typeref:typename:void
fsl_lsch3_early_init_f	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^void fsl_lsch3_early_init_f(void)$/;"	f	typeref:typename:void
fsl_mc	arch/arm/dts/fsl-ls2080a.dtsi	/^	fsl_mc: fsl-mc@80c000000 {$/;"	l
fsl_mc_io	include/fsl-mc/fsl_mc_sys.h	/^struct fsl_mc_io {$/;"	s
fsl_mc_ldpaa_exit	drivers/net/fsl-mc/mc.c	/^int fsl_mc_ldpaa_exit(bd_t *bd)$/;"	f	typeref:typename:int
fsl_mc_ldpaa_init	drivers/net/fsl-mc/mc.c	/^int fsl_mc_ldpaa_init(bd_t *bis)$/;"	f	typeref:typename:int
fsl_mcdmafec_h	arch/m68k/include/asm/fsl_mcdmafec.h	/^#define fsl_mcdmafec_h$/;"	d
fsl_mmdc_info	include/fsl_mmdc.h	/^struct fsl_mmdc_info {$/;"	s
fsl_mod_exp	drivers/crypto/fsl/fsl_rsa.c	/^int fsl_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len,$/;"	f	typeref:typename:int
fsl_mod_exp_ops	drivers/crypto/fsl/fsl_rsa.c	/^static const struct mod_exp_ops fsl_mod_exp_ops = {$/;"	v	typeref:typename:const struct mod_exp_ops	file:
fsl_other_ddr_sdram	drivers/ddr/fsl/main.c	/^phys_size_t fsl_other_ddr_sdram(unsigned long long base,$/;"	f	typeref:typename:phys_size_t
fsl_pci_config_unlock	drivers/pci/fsl_pci_init.c	/^void fsl_pci_config_unlock(struct pci_controller *hose)$/;"	f	typeref:typename:void
fsl_pci_info	arch/powerpc/include/asm/fsl_pci.h	/^struct fsl_pci_info {$/;"	s
fsl_pci_init	drivers/pci/fsl_pci_init.c	/^void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)$/;"	f	typeref:typename:void
fsl_pci_init_port	drivers/pci/fsl_pci_init.c	/^int fsl_pci_init_port(struct fsl_pci_info *pci_info,$/;"	f	typeref:typename:int
fsl_pci_setup_inbound_windows	drivers/pci/fsl_pci_init.c	/^static int fsl_pci_setup_inbound_windows(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
fsl_pcie_boot_master	drivers/pci/fsl_pci_init.c	/^static void fsl_pcie_boot_master(pit_t *pi)$/;"	f	typeref:typename:void	file:
fsl_pcie_boot_master_release_slave	drivers/pci/fsl_pci_init.c	/^static void fsl_pcie_boot_master_release_slave(int port)$/;"	f	typeref:typename:void	file:
fsl_pcie_init_board	drivers/pci/fsl_pci_init.c	/^int fsl_pcie_init_board(int busno)$/;"	f	typeref:typename:int
fsl_pcie_init_ctrl	drivers/pci/fsl_pci_init.c	/^int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev,$/;"	f	typeref:typename:int
fsl_platform_set_host_mode	drivers/usb/host/ehci-mpc512x.c	/^static void fsl_platform_set_host_mode(volatile struct usb_ehci *ehci)$/;"	f	typeref:typename:void	file:
fsl_pq_mdio_info	include/fsl_mdio.h	/^struct fsl_pq_mdio_info {$/;"	s
fsl_pq_mdio_init	drivers/net/fsl_mdio.c	/^int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info)$/;"	f	typeref:typename:int
fsl_pq_mdio_reset	drivers/net/fsl_mdio.c	/^static int fsl_pq_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
fsl_qoriq_core_to_cluster	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int fsl_qoriq_core_to_cluster(unsigned int core)$/;"	f	typeref:typename:int
fsl_qoriq_core_to_cluster	arch/powerpc/cpu/mpc8xxx/cpu.c	/^#define fsl_qoriq_core_to_cluster(/;"	d	file:
fsl_qoriq_core_to_cluster	arch/powerpc/cpu/mpc8xxx/cpu.c	/^int fsl_qoriq_core_to_cluster(unsigned int core)$/;"	f	typeref:typename:int
fsl_qoriq_core_to_type	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^u32 fsl_qoriq_core_to_type(unsigned int core)$/;"	f	typeref:typename:u32
fsl_qoriq_dsp_core_to_cluster	arch/powerpc/cpu/mpc8xxx/cpu.c	/^int fsl_qoriq_dsp_core_to_cluster(unsigned int core)$/;"	f	typeref:typename:int
fsl_qspi	drivers/spi/fsl_qspi.c	/^struct fsl_qspi {$/;"	s	file:
fsl_qspi_child_pre_probe	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_qspi_claim_bus	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_qspi_ids	drivers/spi/fsl_qspi.c	/^static const struct udevice_id fsl_qspi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
fsl_qspi_ofdata_to_platdata	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
fsl_qspi_ops	drivers/spi/fsl_qspi.c	/^static const struct dm_spi_ops fsl_qspi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
fsl_qspi_platdata	drivers/spi/fsl_qspi.c	/^struct fsl_qspi_platdata {$/;"	s	file:
fsl_qspi_priv	drivers/spi/fsl_qspi.c	/^struct fsl_qspi_priv {$/;"	s	file:
fsl_qspi_probe	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
fsl_qspi_regs	drivers/spi/fsl_qspi.h	/^struct fsl_qspi_regs {$/;"	s
fsl_qspi_release_bus	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
fsl_qspi_set_mode	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
fsl_qspi_set_speed	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
fsl_qspi_xfer	drivers/spi/fsl_qspi.c	/^static int fsl_qspi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
fsl_sata	drivers/block/fsl_sata.h	/^typedef struct fsl_sata {$/;"	s
fsl_sata_dump_regs	drivers/block/fsl_sata.c	/^static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg)$/;"	f	typeref:typename:void	file:
fsl_sata_dump_sfis	drivers/block/fsl_sata.c	/^static void fsl_sata_dump_sfis(struct sata_fis_d2h *s)$/;"	f	typeref:typename:void	file:
fsl_sata_exec_cmd	drivers/block/fsl_sata.c	/^static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,$/;"	f	typeref:typename:int	file:
fsl_sata_flush_cache	drivers/block/fsl_sata.c	/^static void fsl_sata_flush_cache(int dev)$/;"	f	typeref:typename:void	file:
fsl_sata_flush_cache_ext	drivers/block/fsl_sata.c	/^static void fsl_sata_flush_cache_ext(int dev)$/;"	f	typeref:typename:void	file:
fsl_sata_get_flush	drivers/block/fsl_sata.c	/^static int fsl_sata_get_flush(int dev)$/;"	f	typeref:typename:int	file:
fsl_sata_get_flush_ext	drivers/block/fsl_sata.c	/^static int fsl_sata_get_flush_ext(int dev)$/;"	f	typeref:typename:int	file:
fsl_sata_get_wcache	drivers/block/fsl_sata.c	/^static int fsl_sata_get_wcache(int dev)$/;"	f	typeref:typename:int	file:
fsl_sata_identify	drivers/block/fsl_sata.c	/^static void fsl_sata_identify(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
fsl_sata_info	drivers/block/fsl_sata.c	/^static struct fsl_sata_info fsl_sata_info[] = {$/;"	v	typeref:struct:fsl_sata_info[]	file:
fsl_sata_info	drivers/block/fsl_sata.h	/^typedef struct fsl_sata_info {$/;"	s
fsl_sata_info_t	drivers/block/fsl_sata.h	/^} fsl_sata_info_t;$/;"	t	typeref:struct:fsl_sata_info
fsl_sata_init_wcache	drivers/block/fsl_sata.c	/^static void fsl_sata_init_wcache(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
fsl_sata_reg	drivers/block/fsl_sata.h	/^typedef struct fsl_sata_reg {$/;"	s
fsl_sata_reg_t	drivers/block/fsl_sata.h	/^} __attribute__ ((packed)) fsl_sata_reg_t;$/;"	t	typeref:struct:fsl_sata_reg
fsl_sata_rw_cmd	drivers/block/fsl_sata.c	/^static u32 fsl_sata_rw_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write)$/;"	f	typeref:typename:u32	file:
fsl_sata_rw_cmd_ext	drivers/block/fsl_sata.c	/^static u32 fsl_sata_rw_cmd_ext(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write)$/;"	f	typeref:typename:u32	file:
fsl_sata_rw_ncq_cmd	drivers/block/fsl_sata.c	/^static u32 fsl_sata_rw_ncq_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer,$/;"	f	typeref:typename:u32	file:
fsl_sata_set_features	drivers/block/fsl_sata.c	/^static void fsl_sata_set_features(int dev)$/;"	f	typeref:typename:void	file:
fsl_sata_t	drivers/block/fsl_sata.h	/^} fsl_sata_t;$/;"	t	typeref:struct:fsl_sata
fsl_sata_xfer_mode	drivers/block/fsl_sata.c	/^static void fsl_sata_xfer_mode(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
fsl_secblk_handle_error	board/freescale/common/fsl_validate.c	/^static void fsl_secblk_handle_error(int error)$/;"	f	typeref:typename:void	file:
fsl_secboot_bootscript_parse_failure	board/freescale/common/fsl_validate.c	/^static void fsl_secboot_bootscript_parse_failure(void)$/;"	f	typeref:typename:void	file:
fsl_secboot_errcode	include/fsl_secboot_err.h	/^struct fsl_secboot_errcode {$/;"	s
fsl_secboot_errcodes	include/fsl_secboot_err.h	/^static const struct fsl_secboot_errcode fsl_secboot_errcodes[] = {$/;"	v	typeref:typename:const struct fsl_secboot_errcode[]
fsl_secboot_handle_error	board/freescale/common/fsl_validate.c	/^void fsl_secboot_handle_error(int error)$/;"	f	typeref:typename:void
fsl_secboot_header_verification_failure	board/freescale/common/fsl_validate.c	/^static void fsl_secboot_header_verification_failure(void)$/;"	f	typeref:typename:void	file:
fsl_secboot_image_verification_failure	board/freescale/common/fsl_validate.c	/^static void fsl_secboot_image_verification_failure(void)$/;"	f	typeref:typename:void	file:
fsl_secboot_img_hdr	include/fsl_validate.h	/^struct fsl_secboot_img_hdr {$/;"	s
fsl_secboot_img_priv	include/fsl_validate.h	/^struct fsl_secboot_img_priv {$/;"	s
fsl_secboot_sg_table	include/fsl_validate.h	/^struct fsl_secboot_sg_table {$/;"	s
fsl_secboot_validate	board/freescale/common/fsl_validate.c	/^int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str,$/;"	f	typeref:typename:int
fsl_serdes_init	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/p1023_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc85xx/p2020_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_serdes_init	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^void fsl_serdes_init(void)$/;"	f	typeref:typename:void
fsl_setenv_chain_of_trust	board/freescale/common/fsl_chain_of_trust.c	/^int fsl_setenv_chain_of_trust(void)$/;"	f	typeref:typename:int
fsl_setup_hose	drivers/pci/fsl_pci_init.c	/^int fsl_setup_hose(struct pci_controller *hose, unsigned long addr)$/;"	f	typeref:typename:int
fsl_setup_phy	drivers/usb/host/ehci-mpc512x.c	/^static void fsl_setup_phy(volatile struct ehci_hcor *hcor)$/;"	f	typeref:typename:void	file:
fsl_setup_serdes	arch/powerpc/cpu/mpc83xx/serdes.c	/^void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd)$/;"	f	typeref:typename:void
fsl_sgmii_riser_fdt_fixup	board/freescale/common/sgmii_riser.c	/^void fsl_sgmii_riser_fdt_fixup(void *fdt)$/;"	f	typeref:typename:void
fsl_sgmii_riser_init	board/freescale/common/sgmii_riser.c	/^void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num)$/;"	f	typeref:typename:void
fsl_spfr0	include/fsl_sfp.h	/^	u32 fsl_spfr0;		\/* Scratch Pad Fuse Register 0 *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsl_spfr1	include/fsl_sfp.h	/^	u32 fsl_spfr1;		\/* Scratch Pad Fuse Register 1 *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsl_spi_boot	drivers/mtd/spi/fsl_espi_spl.c	/^void fsl_spi_boot(void)$/;"	f	typeref:typename:void
fsl_spi_slave	drivers/spi/fsl_espi.c	/^struct fsl_spi_slave {$/;"	s	file:
fsl_spi_spl_load_image	drivers/mtd/spi/fsl_espi_spl.c	/^void fsl_spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst)$/;"	f	typeref:typename:void
fsl_uid	include/fsl_sfp.h	/^	u32 fsl_uid;		\/* 0x21c FSL UID 0 *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsl_uid	include/fsl_sfp.h	/^	u32 fsl_uid;		\/* 0xB0  FSL Unique ID *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsl_uid	include/fsl_sfp.h	/^	u32 fsl_uid;	\/* 0xB0  FSL Unique ID *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsl_uid_0	include/fsl_validate.h	/^	u32 fsl_uid_0;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
fsl_uid_1	include/fsl_sfp.h	/^	u32 fsl_uid_1;		\/* 0x220 FSL UID 0 *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsl_uid_1	include/fsl_validate.h	/^	u32 fsl_uid_1;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
fsl_upm	include/linux/mtd/fsl_upm.h	/^struct fsl_upm {$/;"	s
fsl_upm_end_pattern	drivers/mtd/nand/fsl_upm.c	/^static void fsl_upm_end_pattern(struct fsl_upm *upm)$/;"	f	typeref:typename:void	file:
fsl_upm_nand	include/linux/mtd/fsl_upm.h	/^struct fsl_upm_nand {$/;"	s
fsl_upm_nand_init	drivers/mtd/nand/fsl_upm.c	/^int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)$/;"	f	typeref:typename:int
fsl_upm_run_pattern	drivers/mtd/nand/fsl_upm.c	/^static void fsl_upm_run_pattern(struct fsl_upm *upm, int width,$/;"	f	typeref:typename:void	file:
fsl_upm_start_pattern	drivers/mtd/nand/fsl_upm.c	/^static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)$/;"	f	typeref:typename:void	file:
fsl_use_spd	drivers/ddr/fsl/options.c	/^int fsl_use_spd(void)$/;"	f	typeref:typename:int
fsl_xhci	drivers/usb/host/xhci-fsl.c	/^static struct fsl_xhci fsl_xhci;$/;"	v	typeref:struct:fsl_xhci	file:
fsl_xhci	include/linux/usb/xhci-fsl.h	/^struct fsl_xhci {$/;"	s
fsl_xhci_core_exit	drivers/usb/host/xhci-fsl.c	/^static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci)$/;"	f	typeref:typename:int	file:
fsl_xhci_core_init	drivers/usb/host/xhci-fsl.c	/^static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)$/;"	f	typeref:typename:int	file:
fsl_xhci_set_beat_burst_length	drivers/usb/host/xhci-fsl.c	/^static void fsl_xhci_set_beat_burst_length(struct dwc3 *dwc3_reg)$/;"	f	typeref:typename:void	file:
fsm_reg_vals	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^struct fsm_reg_vals {$/;"	s
fsmblks	include/malloc.h	/^  int fsmblks;  \/* unused -- always zero *\/$/;"	m	struct:mallinfo	typeref:typename:int
fsmc_bch8_correct_data	drivers/mtd/nand/fsmc_nand.c	/^static int fsmc_bch8_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
fsmc_ecc1_layout	drivers/mtd/nand/fsmc_nand.c	/^static struct nand_ecclayout fsmc_ecc1_layout = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsmc_ecc4_224_layout	drivers/mtd/nand/fsmc_nand.c	/^static struct nand_ecclayout fsmc_ecc4_224_layout = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsmc_ecc4_lp_layout	drivers/mtd/nand/fsmc_nand.c	/^static struct nand_ecclayout fsmc_ecc4_lp_layout = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsmc_ecc4_sp_layout	drivers/mtd/nand/fsmc_nand.c	/^static struct nand_ecclayout fsmc_ecc4_sp_layout = {$/;"	v	typeref:struct:nand_ecclayout	file:
fsmc_eccpl_lp	drivers/mtd/nand/fsmc_nand.c	/^static struct fsmc_eccplace fsmc_eccpl_lp = {$/;"	v	typeref:struct:fsmc_eccplace	file:
fsmc_eccpl_sp	drivers/mtd/nand/fsmc_nand.c	/^static struct fsmc_eccplace fsmc_eccpl_sp = {$/;"	v	typeref:struct:fsmc_eccplace	file:
fsmc_eccplace	include/linux/mtd/fsmc_nand.h	/^struct fsmc_eccplace {$/;"	s
fsmc_enable_hwecc	drivers/mtd/nand/fsmc_nand.c	/^void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void
fsmc_nand_eccplace	include/linux/mtd/fsmc_nand.h	/^struct fsmc_nand_eccplace {$/;"	s
fsmc_nand_hwcontrol	drivers/mtd/nand/fsmc_nand.c	/^static void fsmc_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)$/;"	f	typeref:typename:void	file:
fsmc_nand_init	drivers/mtd/nand/fsmc_nand.c	/^int fsmc_nand_init(struct nand_chip *nand)$/;"	f	typeref:typename:int
fsmc_nand_switch_ecc	drivers/mtd/nand/fsmc_nand.c	/^int fsmc_nand_switch_ecc(uint32_t eccstrength)$/;"	f	typeref:typename:int
fsmc_read_hwecc	drivers/mtd/nand/fsmc_nand.c	/^static int fsmc_read_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
fsmc_read_page_hwecc	drivers/mtd/nand/fsmc_nand.c	/^static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
fsmc_regs	include/linux/mtd/fsmc_nand.h	/^struct fsmc_regs {$/;"	s
fsmc_regs_p	drivers/mtd/nand/fsmc_nand.c	/^static struct fsmc_regs *const fsmc_regs_p = (struct fsmc_regs *)$/;"	v	typeref:struct:fsmc_regs * const	file:
fsmc_version	drivers/mtd/nand/fsmc_nand.c	/^static u32 fsmc_version;$/;"	v	typeref:typename:u32	file:
fsp_cfg_common	arch/x86/include/asm/fsp/fsp_api.h	/^struct fsp_cfg_common {$/;"	s
fsp_commands	arch/x86/lib/fsp/cmd_fsp.c	/^static cmd_tbl_t fsp_commands[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
fsp_config_data	arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h	/^struct fsp_config_data {$/;"	s
fsp_config_data	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^struct fsp_config_data {$/;"	s
fsp_config_data	arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h	/^struct fsp_config_data {$/;"	s
fsp_continuation_f	arch/x86/include/asm/fsp/fsp_api.h	/^typedef void (*fsp_continuation_f)(u32 status, void *hob_list);$/;"	t	typeref:typename:void (*)(u32 status,void * hob_list)
fsp_continue	arch/x86/lib/fsp/fsp_support.c	/^void fsp_continue(u32 status, void *hob_list)$/;"	f	typeref:typename:void
fsp_get_bootloader_tmp_mem	arch/x86/lib/fsp/fsp_support.c	/^void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len)$/;"	f	typeref:typename:void *
fsp_get_fsp_reserved_mem	arch/x86/lib/fsp/fsp_support.c	/^u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len)$/;"	f	typeref:typename:u32
fsp_get_guid_hob_data	arch/x86/lib/fsp/fsp_support.c	/^void *fsp_get_guid_hob_data(const void *hob_list, u32 *len,$/;"	f	typeref:typename:void *
fsp_get_next_guid_hob	arch/x86/lib/fsp/fsp_support.c	/^const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid,$/;"	f	typeref:typename:const struct hob_header *
fsp_get_next_hob	arch/x86/lib/fsp/fsp_support.c	/^const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list)$/;"	f	typeref:typename:const struct hob_header *
fsp_get_nvs_data	arch/x86/lib/fsp/fsp_support.c	/^void *fsp_get_nvs_data(const void *hob_list, u32 *len)$/;"	f	typeref:typename:void *
fsp_get_reserved_mem_from_guid	arch/x86/lib/fsp/fsp_support.c	/^u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len,$/;"	f	typeref:typename:u64
fsp_get_tseg_reserved_mem	arch/x86/lib/fsp/fsp_support.c	/^u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len)$/;"	f	typeref:typename:u32
fsp_get_usable_highmem_top	arch/x86/lib/fsp/fsp_support.c	/^u64 fsp_get_usable_highmem_top(const void *hob_list)$/;"	f	typeref:typename:u64
fsp_get_usable_lowmem_top	arch/x86/lib/fsp/fsp_support.c	/^u32 fsp_get_usable_lowmem_top(const void *hob_list)$/;"	f	typeref:typename:u32
fsp_hdr	arch/x86/include/asm/fsp/fsp_api.h	/^	struct fsp_header	*fsp_hdr;$/;"	m	struct:fsp_cfg_common	typeref:struct:fsp_header *
fsp_header	arch/x86/include/asm/fsp/fsp_infoheader.h	/^struct __packed fsp_header {$/;"	s
fsp_init	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	fsp_init;		\/* fsp_init offset *\/$/;"	m	struct:fsp_header	typeref:typename:u32
fsp_init	arch/x86/lib/fsp/fsp_support.c	/^void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)$/;"	f	typeref:typename:void
fsp_init_done	arch/x86/lib/fsp/fsp_car.S	/^fsp_init_done:$/;"	l
fsp_init_f	arch/x86/include/asm/fsp/fsp_api.h	/^typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params);$/;"	t	typeref:typename:asmlinkage u32 (*)(struct fsp_init_params * params)
fsp_init_params	arch/x86/include/asm/fsp/fsp_api.h	/^struct fsp_init_params {$/;"	s
fsp_init_phase_pci	arch/x86/lib/fsp/fsp_common.c	/^int fsp_init_phase_pci(void)$/;"	f	typeref:typename:int
fsp_notify	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	fsp_notify;		\/* fsp_notify offset *\/$/;"	m	struct:fsp_header	typeref:typename:u32
fsp_notify	arch/x86/lib/fsp/fsp_support.c	/^u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase)$/;"	f	typeref:typename:u32
fsp_notify_f	arch/x86/include/asm/fsp/fsp_api.h	/^typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params);$/;"	t	typeref:typename:asmlinkage u32 (*)(struct fsp_notify_params * params)
fsp_notify_params	arch/x86/include/asm/fsp/fsp_api.h	/^struct fsp_notify_params {$/;"	s
fsp_phase	arch/x86/include/asm/fsp/fsp_api.h	/^enum fsp_phase {$/;"	g
fsp_prepare_mrc_cache	arch/x86/lib/fsp/fsp_common.c	/^static __maybe_unused void *fsp_prepare_mrc_cache(void)$/;"	f	typeref:typename:__maybe_unused void *	file:
fsp_res_memlen	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint32_t fsp_res_memlen;		\/* Offset 0x0020 *\/$/;"	m	struct:vpd_region	typeref:typename:uint32_t
fsp_res_memlen	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u32	fsp_res_memlen;		\/* Offset 0x0020 *\/$/;"	m	struct:vpd_region	typeref:typename:u32
fsp_tempram_init	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	fsp_tempram_init;	\/* tempram_init offset *\/$/;"	m	struct:fsp_header	typeref:typename:u32
fsp_upd	arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h	/^	struct upd_region	fsp_upd;$/;"	m	struct:fsp_config_data	typeref:struct:upd_region
fsp_upd	arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h	/^	struct upd_region	fsp_upd;$/;"	m	struct:fsp_config_data	typeref:struct:upd_region
fspi	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^unsigned long fspi;$/;"	v	typeref:typename:unsigned long
fspi	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t fspi;			\/* only valid for Primary PAACE *\/$/;"	m	struct:paace	typeref:typename:uint32_t
fspinit_rtbuf	arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h	/^struct fspinit_rtbuf {$/;"	s
fspinit_rtbuf	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^struct fspinit_rtbuf {$/;"	s
fspinit_rtbuf	arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h	/^struct fspinit_rtbuf {$/;"	s
fsr	arch/arm/mach-at91/include/mach/at91_eefc.h	/^	u32	fsr;	\/* Flash Status Register RO *\/$/;"	m	struct:at91_eefc	typeref:typename:u32
fsr	arch/sparc/include/asm/stack.h	/^		unsigned long fsr;$/;"	m	struct:sparc_fpuwindow_regs	typeref:typename:unsigned long
fsr	drivers/i2c/at91_i2c.h	/^	u32 fsr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
fstype	fs/fs.c	/^	int fstype;$/;"	m	struct:fstype_info	typeref:typename:int	file:
fstype	include/fpga.h	/^	int fstype;$/;"	m	struct:__anon4d3ae96c0308	typeref:typename:int
fstype_info	fs/fs.c	/^struct fstype_info {$/;"	s	file:
fstypes	fs/fs.c	/^static struct fstype_info fstypes[] = {$/;"	v	typeref:struct:fstype_info[]	file:
fswap	lib/bzip2/bzlib_blocksort.c	/^#define fswap(/;"	d	file:
fswpr	include/fsl_sfp.h	/^	u32 fswpr;		\/* 0x218 FSL Section Write Protect *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
fsync	tools/mingw_support.c	/^int fsync(int fd)$/;"	f	typeref:typename:int
fsys2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys_arm_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_arm_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
fsys_arm_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_arm_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
fsys_arm_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_arm_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
fsys_arm_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_arm_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
fsys_buf	fs/reiserfs/reiserfs.c	/^static char fsys_buf[FSYS_BUFLEN];$/;"	v	typeref:typename:char[]	file:
fsys_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys_reiser_fileinfo	fs/reiserfs/reiserfs_private.h	/^struct fsys_reiser_fileinfo$/;"	s
fsys_reiser_info	fs/reiserfs/reiserfs_private.h	/^struct fsys_reiser_info$/;"	s
fsys_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
fsys_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	fsys_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ft5306de4	arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts	/^	ft5306de4: touchscreen@38 {$/;"	l
ft5406ee8	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	ft5406ee8: touchscreen@38 {$/;"	l
ft5406ee8	arch/arm/dts/sun4i-a10-inet97fv2.dts	/^	ft5406ee8: touchscreen@38 {$/;"	l
ft5406ee8	arch/arm/dts/sun4i-a10-inet9f-rev03.dts	/^	ft5406ee8: touchscreen@38 {$/;"	l
ft5406ee8	arch/arm/dts/sun6i-a31s-inet-q972.dts	/^	ft5406ee8: touchscreen@38 {$/;"	l
ft5x	arch/arm/dts/sun4i-a10-inet1.dts	/^	ft5x: touchscreen@38 {$/;"	l
ft_adapt_flash_base	board/ifm/o2dnt2/o2dnt2.c	/^static void ft_adapt_flash_base(void *blob)$/;"	f	typeref:typename:void	file:
ft_adapt_flash_base	board/intercontrol/digsy_mtc/digsy_mtc.c	/^static void ft_adapt_flash_base(void *blob)$/;"	f	typeref:typename:void	file:
ft_addr	include/image.h	/^	char		*ft_addr;	\/* flat dev tree address *\/$/;"	m	struct:bootm_headers	typeref:typename:char *
ft_blob_update	board/cm5200/cm5200.c	/^static void ft_blob_update(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
ft_blob_update	board/tqc/tqm8xx/tqm8xx.c	/^void ft_blob_update (void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_board_pci_fixup	board/gateworks/gw_ventana/gw_ventana.c	/^void ft_board_pci_fixup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_board_pci_setup	board/xes/common/fsl_8xxx_pci.c	/^void ft_board_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_board_setup	arch/arm/mach-uniphier/dram_init.c	/^int ft_board_setup(void *fdt, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/Arcturus/ucp1020/ucp1020.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/BuR/common/common.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/a3m071/a3m071.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/a4m072/a4m072.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/amcc/canyonlands/canyonlands.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/amcc/sequoia/sequoia.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/cm5200/cm5200.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/compulab/cm_fx6/cm_fx6.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/compulab/cm_t54/cm_t54.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/davedenx/aria/aria.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/esd/cpci405/cpci405.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/esd/mecp5123/mecp5123.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/esd/pmc405de/pmc405de.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/esd/pmc440/pmc440.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/esd/vme8349/vme8349.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/b4860qds/b4860qds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/bsc9131rdb/bsc9131rdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/bsc9132qds/bsc9132qds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/c29xpcie/c29xpcie.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/common/cds_pci_ft.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/corenet_ds/corenet_ds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1012afrdm/ls1012afrdm.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1012aqds/ls1012aqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1012ardb/ls1012ardb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1021aqds/ls1021aqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1021atwr/ls1021atwr.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1043aqds/ls1043aqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1043ardb/ls1043ardb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1046aqds/ls1046aqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls1046ardb/ls1046ardb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls2080a/ls2080a.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls2080aqds/ls2080aqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/ls2080ardb/ls2080ardb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc5121ads/mpc5121ads.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8308rdb/mpc8308rdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8313erdb/mpc8313erdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8315erdb/mpc8315erdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8323erdb/mpc8323erdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc832xemds/mpc832xemds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8349emds/mpc8349emds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8349itx/mpc8349itx.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc837xemds/mpc837xemds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc837xerdb/mpc837xerdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8536ds/mpc8536ds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8540ads/mpc8540ads.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8544ds/mpc8544ds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8560ads/mpc8560ads.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8568mds/mpc8568mds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8569mds/mpc8569mds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8572ds/mpc8572ds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/p1010rdb/p1010rdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/p1022ds/p1022ds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/p1023rdb/p1023rdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/p1_twr/p1_twr.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/p2041rdb/p2041rdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t102xqds/t102xqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t102xrdb/t102xrdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t1040qds/t1040qds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t104xrdb/t104xrdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t208xqds/t208xqds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t208xrdb/t208xrdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t4qds/t4240emu.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t4qds/t4240qds.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/freescale/t4rdb/t4240rdb.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/gateworks/gw_ventana/gw_ventana.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/gdsys/intip/intip.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/gdsys/mpc8308/hrcon.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/gdsys/mpc8308/strider.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/gdsys/p1022/controlcenterd.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/highbank/highbank.c	/^int ft_board_setup(void *fdt, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ids/ids8313/ids8313.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ifm/ac14xx/ac14xx.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ifm/o2dnt2/o2dnt2.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/intercontrol/digsy_mtc/digsy_mtc.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ipek01/ipek01.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/jupiter/jupiter.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/keymile/km82xx/km82xx.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/keymile/km83xx/km83xx.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/keymile/kmp204x/kmp204x.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/motionpro/motionpro.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/mpc8308_p1m/mpc8308_p1m.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/munices/munices.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/pdm360ng/pdm360ng.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/phytec/pcm030/pcm030.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/raspberrypi/rpi/rpi.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/sbc8349/sbc8349.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/sbc8548/sbc8548.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/sbc8641d/sbc8641d.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/socrates/socrates.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/sunxi/board.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ti/am57xx/board.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ti/dra7xx/evm.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ti/ks2_evm/board.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/tqc/tqm5200/tqm5200.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/tqc/tqm834x/tqm834x.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/tqc/tqm8xx/tqm8xx.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/tqc/tqma6/tqma6.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/varisys/cyrus/cyrus.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/ve8313/ve8313.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/vscom/baltos/board.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/xes/xpedite517x/xpedite517x.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/xes/xpedite520x/xpedite520x.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/xes/xpedite537x/xpedite537x.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup	board/xes/xpedite550x/xpedite550x.c	/^int ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_board_setup_ex	board/ti/ks2_evm/board.c	/^void ft_board_setup_ex(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_bup_ld_flr	arch/x86/include/asm/me_common.h	/^	u32 ft_bup_ld_flr:1;$/;"	m	struct:me_hfs	typeref:typename:u32:1
ft_clock_setup	arch/powerpc/cpu/mpc512x/cpu.c	/^static void ft_clock_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
ft_codec_setup	board/freescale/p1022ds/p1022ds.c	/^static void ft_codec_setup(void *blob, const char *compatible)$/;"	f	typeref:typename:void	file:
ft_cpu_setup	arch/arm/cpu/armv7/ls102xa/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/arm/cpu/armv7/omap5/fdt.c	/^void ft_cpu_setup(void *fdt, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/arm/cpu/armv8/fsl-layerscape/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/nios2/cpu/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc512x/cpu.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc5xxx/cpu.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc8260/cpu.c	/^void ft_cpu_setup (void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc83xx/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc85xx/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc86xx/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/mpc8xx/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_cpu_setup	arch/powerpc/cpu/ppc4xx/fdt.c	/^void ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_del_cpuhandle	arch/powerpc/cpu/mpc8xxx/fdt.c	/^static int ft_del_cpuhandle(void *blob, int cpuhandle)$/;"	f	typeref:typename:int	file:
ft_delete_node	board/intercontrol/digsy_mtc/digsy_mtc.c	/^static void ft_delete_node(void *fdt, const char *compat)$/;"	f	typeref:typename:void	file:
ft_delprop_path	board/gateworks/gw_ventana/gw_ventana.c	/^static inline void ft_delprop_path(void *blob, const char *path,$/;"	f	typeref:typename:void	file:
ft_disable_rman	arch/powerpc/cpu/mpc8xxx/fdt.c	/^static inline void ft_disable_rman(void *blob)$/;"	f	typeref:typename:void	file:
ft_disable_rmu	arch/powerpc/cpu/mpc8xxx/fdt.c	/^static inline void ft_disable_rmu(void *blob)$/;"	f	typeref:typename:void	file:
ft_disable_srio_port	arch/powerpc/cpu/mpc8xxx/fdt.c	/^static inline void ft_disable_srio_port(void *blob, int srio_off, int port)$/;"	f	typeref:typename:void	file:
ft_enable_path	board/gateworks/gw_ventana/gw_ventana.c	/^static inline void ft_enable_path(void *blob, const char *path)$/;"	f	typeref:typename:void	file:
ft_fixup_cache	arch/powerpc/cpu/mpc85xx/fdt.c	/^static inline void ft_fixup_cache(void *blob)$/;"	f	typeref:typename:void	file:
ft_fixup_clks	arch/powerpc/cpu/mpc85xx/fdt.c	/^static void ft_fixup_clks(void *blob, const char *compat, u32 offset,$/;"	f	typeref:typename:void	file:
ft_fixup_cpu	arch/arm/cpu/armv8/fsl-layerscape/fdt.c	/^void ft_fixup_cpu(void *blob)$/;"	f	typeref:typename:void
ft_fixup_cpu	arch/powerpc/cpu/mpc85xx/fdt.c	/^void ft_fixup_cpu(void *blob, u64 memory_limit)$/;"	f	typeref:typename:void
ft_fixup_dpaa_clks	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define ft_fixup_dpaa_clks(/;"	d	file:
ft_fixup_dpaa_clks	arch/powerpc/cpu/mpc85xx/fdt.c	/^static void ft_fixup_dpaa_clks(void *blob)$/;"	f	typeref:typename:void	file:
ft_fixup_enet_phy_connect_type	arch/arm/cpu/armv7/ls102xa/fdt.c	/^void ft_fixup_enet_phy_connect_type(void *fdt)$/;"	f	typeref:typename:void
ft_fixup_l2cache	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define ft_fixup_l2cache(/;"	d	file:
ft_fixup_l2cache	arch/powerpc/cpu/mpc85xx/fdt.c	/^static inline void ft_fixup_l2cache(void *blob)$/;"	f	typeref:typename:void	file:
ft_fixup_l3cache	arch/powerpc/cpu/mpc85xx/fdt.c	/^#define ft_fixup_l3cache(/;"	d	file:
ft_fixup_l3cache	arch/powerpc/cpu/mpc85xx/fdt.c	/^static inline void ft_fixup_l3cache(void *blob, int off)$/;"	f	typeref:typename:void	file:
ft_fixup_num_cores	arch/powerpc/cpu/mpc8xxx/fdt.c	/^void ft_fixup_num_cores(void *blob) {$/;"	f	typeref:typename:void
ft_fixup_port	drivers/net/fm/init.c	/^int ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)$/;"	f	typeref:typename:int
ft_fixup_qe_snum	arch/powerpc/cpu/mpc85xx/fdt.c	/^static void ft_fixup_qe_snum(void *blob)$/;"	f	typeref:typename:void	file:
ft_fsl_pci_setup	drivers/pci/fsl_pci_init.c	/^void ft_fsl_pci_setup(void *blob, const char *pci_compat,$/;"	f	typeref:typename:void
ft_hs_disable_rng	arch/arm/cpu/armv7/omap5/fdt.c	/^static int ft_hs_disable_rng(void *fdt, bd_t *bd)$/;"	f	typeref:typename:int	file:
ft_hs_fixup_crossbar	arch/arm/cpu/armv7/omap5/fdt.c	/^static int ft_hs_fixup_crossbar(void *fdt, bd_t *bd)$/;"	f	typeref:typename:int	file:
ft_hs_fixup_dram	arch/arm/cpu/armv7/omap5/fdt.c	/^static int ft_hs_fixup_dram(void *fdt, bd_t *bd) { return 0; }$/;"	f	typeref:typename:int	file:
ft_hs_fixup_dram	arch/arm/cpu/armv7/omap5/fdt.c	/^static int ft_hs_fixup_dram(void *fdt, bd_t *bd)$/;"	f	typeref:typename:int	file:
ft_hs_fixup_sram	arch/arm/cpu/armv7/omap5/fdt.c	/^static int ft_hs_fixup_sram(void *fdt, bd_t *bd) { return 0; }$/;"	f	typeref:typename:int	file:
ft_hs_fixup_sram	arch/arm/cpu/armv7/omap5/fdt.c	/^static int ft_hs_fixup_sram(void *fdt, bd_t *bd)$/;"	f	typeref:typename:int	file:
ft_hs_fixups	arch/arm/cpu/armv7/omap5/fdt.c	/^static void ft_hs_fixups(void *fdt, bd_t *bd)$/;"	f	typeref:typename:void	file:
ft_len	include/image.h	/^	ulong		ft_len;		\/* length of flat device tree *\/$/;"	m	struct:bootm_headers	typeref:typename:ulong
ft_pci_fixup	board/freescale/mpc837xemds/mpc837xemds.c	/^static void ft_pci_fixup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
ft_pci_setup	arch/powerpc/cpu/mpc512x/pci.c	/^void ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	arch/powerpc/cpu/mpc8260/pci.c	/^void ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	arch/powerpc/cpu/mpc83xx/pci.c	/^void ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	board/freescale/mpc8541cds/mpc8541cds.c	/^ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	board/freescale/mpc8548cds/mpc8548cds.c	/^void ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	board/freescale/mpc8555cds/mpc8555cds.c	/^ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	drivers/pci/pcie_layerscape.c	/^void ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pci_setup	drivers/pci/tsi108_pci.c	/^void ft_pci_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pcie_fixup	board/freescale/mpc837xemds/pci.c	/^void ft_pcie_fixup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
ft_pcie_ls_setup	drivers/pci/pcie_layerscape.c	/^static void ft_pcie_ls_setup(void *blob, const char *pci_compat,$/;"	f	typeref:typename:void	file:
ft_qe_setup	drivers/qe/fdt.c	/^void ft_qe_setup(void *blob)$/;"	f	typeref:typename:void
ft_sethdmiinfmt	board/gateworks/gw_ventana/gw_ventana.c	/^static int ft_sethdmiinfmt(void *blob, char *mode)$/;"	f	typeref:typename:int	file:
ft_srio_setup	arch/powerpc/cpu/mpc8xxx/fdt.c	/^void ft_srio_setup(void *blob)$/;"	f	typeref:typename:void
ft_system_setup	arch/arm/mach-tegra/dt-setup.c	/^int ft_system_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:int
ft_tsec_fixup	board/freescale/mpc837xemds/mpc837xemds.c	/^static inline void ft_tsec_fixup(void *blob, bd_t *bd) {}$/;"	f	typeref:typename:void	file:
ft_tsec_fixup	board/freescale/mpc837xemds/mpc837xemds.c	/^static void ft_tsec_fixup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
ft_verify_fdt	arch/powerpc/cpu/mpc85xx/fdt.c	/^int ft_verify_fdt(void *fdt)$/;"	f	typeref:typename:int
ft_verify_fdt	common/image-fdt.c	/^__weak int ft_verify_fdt(void *fdt)$/;"	f	typeref:typename:__weak int
ftab	lib/bzip2/bzlib_private.h	/^      UInt32*  ftab;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32 *
ftahbc02s	include/faraday/ftahbc020s.h	/^struct ftahbc02s {$/;"	s
ftb_10th_ps	include/fsl_ddr_dimm_params.h	/^	int ftb_10th_ps; \/* fine timebase, in 1\/10 ps *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
ftb_div	include/ddr_spd.h	/^	unsigned char ftb_div;         \/*  9 Fine Timebase (FTB)$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
ftdll_config	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 ftdll_config; \/* 0x20120 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
ftgmac100	drivers/net/ftgmac100.h	/^struct ftgmac100 {$/;"	s
ftgmac100_data	drivers/net/ftgmac100.c	/^struct ftgmac100_data {$/;"	s	file:
ftgmac100_halt	drivers/net/ftgmac100.c	/^static void ftgmac100_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftgmac100_init	drivers/net/ftgmac100.c	/^static int ftgmac100_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ftgmac100_initialize	drivers/net/ftgmac100.c	/^int ftgmac100_initialize(bd_t *bd)$/;"	f	typeref:typename:int
ftgmac100_mdiobus_read	drivers/net/ftgmac100.c	/^static int ftgmac100_mdiobus_read(struct eth_device *dev, int phy_addr,$/;"	f	typeref:typename:int	file:
ftgmac100_mdiobus_write	drivers/net/ftgmac100.c	/^static int ftgmac100_mdiobus_write(struct eth_device *dev, int phy_addr,$/;"	f	typeref:typename:int	file:
ftgmac100_phy_init	drivers/net/ftgmac100.c	/^static int ftgmac100_phy_init(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ftgmac100_phy_read	drivers/net/ftgmac100.c	/^int ftgmac100_phy_read(struct eth_device *dev, int addr, int reg, u16 *value)$/;"	f	typeref:typename:int
ftgmac100_phy_reset	drivers/net/ftgmac100.c	/^static int ftgmac100_phy_reset(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ftgmac100_phy_write	drivers/net/ftgmac100.c	/^int  ftgmac100_phy_write(struct eth_device *dev, int addr, int reg, u16 value)$/;"	f	typeref:typename:int
ftgmac100_recv	drivers/net/ftgmac100.c	/^static int ftgmac100_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ftgmac100_reset	drivers/net/ftgmac100.c	/^static void ftgmac100_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftgmac100_rxdes	drivers/net/ftgmac100.h	/^struct ftgmac100_rxdes {$/;"	s
ftgmac100_send	drivers/net/ftgmac100.c	/^static int ftgmac100_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ftgmac100_set_mac	drivers/net/ftgmac100.c	/^static void ftgmac100_set_mac(struct eth_device *dev,$/;"	f	typeref:typename:void	file:
ftgmac100_set_mac_from_env	drivers/net/ftgmac100.c	/^static void ftgmac100_set_mac_from_env(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftgmac100_txdes	drivers/net/ftgmac100.h	/^struct ftgmac100_txdes {$/;"	s
ftgmac100_update_link_speed	drivers/net/ftgmac100.c	/^static int ftgmac100_update_link_speed(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
fti2c010_chip	drivers/i2c/fti2c010.c	/^struct fti2c010_chip {$/;"	s	file:
fti2c010_init	drivers/i2c/fti2c010.c	/^static void fti2c010_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
fti2c010_probe	drivers/i2c/fti2c010.c	/^static int fti2c010_probe(struct i2c_adapter *adap, u8 dev)$/;"	f	typeref:typename:int	file:
fti2c010_read	drivers/i2c/fti2c010.c	/^static int fti2c010_read(struct i2c_adapter *adap,$/;"	f	typeref:typename:int	file:
fti2c010_regs	drivers/i2c/fti2c010.h	/^struct fti2c010_regs {$/;"	s
fti2c010_reset	drivers/i2c/fti2c010.c	/^static int fti2c010_reset(struct fti2c010_chip *chip)$/;"	f	typeref:typename:int	file:
fti2c010_set_bus_speed	drivers/i2c/fti2c010.c	/^static unsigned int fti2c010_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
fti2c010_wait	drivers/i2c/fti2c010.c	/^static int fti2c010_wait(struct fti2c010_chip *chip, uint32_t mask)$/;"	f	typeref:typename:int	file:
fti2c010_write	drivers/i2c/fti2c010.c	/^static int fti2c010_write(struct i2c_adapter *adap,$/;"	f	typeref:typename:int	file:
ftide020_s	drivers/block/ftide020.h	/^struct ftide020_s {$/;"	s
ftide_clock_freq	drivers/block/ftide020.c	/^uint ftide_clock_freq(void)$/;"	f	typeref:typename:uint
ftide_controller_probe	drivers/block/ftide020.c	/^static int ftide_controller_probe(void)$/;"	f	typeref:typename:int	file:
ftide_dfifo_ready	drivers/block/ftide020.c	/^void ftide_dfifo_ready(ulong *time)$/;"	f	typeref:typename:void
ftide_read_hwrev	drivers/block/ftide020.c	/^static void ftide_read_hwrev(void)$/;"	f	typeref:typename:void	file:
ftide_set_device	drivers/block/ftide020.c	/^void ftide_set_device(int cx8, int dev)$/;"	f	typeref:typename:void
ftim	include/fsl_ifc.h	/^	u32 ftim[4];$/;"	m	struct:fsl_ifc_ftim	typeref:typename:u32[4]
ftim_cs	include/fsl_ifc.h	/^	struct fsl_ifc_ftim ftim_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT];$/;"	m	struct:fsl_ifc_fcm	typeref:struct:fsl_ifc_ftim[]
ftirr_phy	arch/powerpc/include/asm/immap_85xx.h	/^	u8	ftirr_phy[4];$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u8[4]
ftirr_phy	arch/powerpc/include/asm/immap_85xx.h	/^	u8	ftirr_phy[4];$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u8[4]
ftm_reset	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ftm_reset;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
ftmac100	drivers/net/ftmac100.h	/^struct ftmac100 {$/;"	s
ftmac100_data	drivers/net/ftmac100.c	/^struct ftmac100_data {$/;"	s	file:
ftmac100_halt	drivers/net/ftmac100.c	/^static void ftmac100_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftmac100_init	drivers/net/ftmac100.c	/^static int ftmac100_init (struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ftmac100_initialize	drivers/net/ftmac100.c	/^int ftmac100_initialize (bd_t *bd)$/;"	f	typeref:typename:int
ftmac100_recv	drivers/net/ftmac100.c	/^static int ftmac100_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ftmac100_reset	drivers/net/ftmac100.c	/^static void ftmac100_reset (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftmac100_rxdes	drivers/net/ftmac100.h	/^struct ftmac100_rxdes {$/;"	s
ftmac100_send	drivers/net/ftmac100.c	/^static int ftmac100_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ftmac100_set_mac	drivers/net/ftmac100.c	/^static void ftmac100_set_mac (struct eth_device *dev, const unsigned char *mac)$/;"	f	typeref:typename:void	file:
ftmac100_set_mac_from_env	drivers/net/ftmac100.c	/^static void ftmac100_set_mac_from_env (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftmac100_txdes	drivers/net/ftmac100.h	/^struct ftmac100_txdes {$/;"	s
ftmac110_chip	drivers/net/ftmac110.c	/^struct ftmac110_chip {$/;"	s	file:
ftmac110_desc	drivers/net/ftmac110.h	/^struct ftmac110_desc {$/;"	s
ftmac110_halt	drivers/net/ftmac110.c	/^static void ftmac110_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ftmac110_initialize	drivers/net/ftmac110.c	/^int ftmac110_initialize(bd_t *bis)$/;"	f	typeref:typename:int
ftmac110_mdio_read	drivers/net/ftmac110.c	/^static int ftmac110_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ftmac110_mdio_write	drivers/net/ftmac110.c	/^static int ftmac110_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ftmac110_phyqry	drivers/net/ftmac110.c	/^static uint32_t ftmac110_phyqry(struct eth_device *dev)$/;"	f	typeref:typename:uint32_t	file:
ftmac110_probe	drivers/net/ftmac110.c	/^static int ftmac110_probe(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
ftmac110_recv	drivers/net/ftmac110.c	/^static int ftmac110_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ftmac110_regs	drivers/net/ftmac110.h	/^struct ftmac110_regs {$/;"	s
ftmac110_reset	drivers/net/ftmac110.c	/^static int ftmac110_reset(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ftmac110_send	drivers/net/ftmac110.c	/^static int ftmac110_send(struct eth_device *dev, void *pkt, int len)$/;"	f	typeref:typename:int	file:
ftodr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ftodr;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u16
ftodr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ftodr;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u16
ftodr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ftodr;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u16
ftpci100_ahbc	include/faraday/ftpci100.h	/^struct ftpci100_ahbc {$/;"	s
ftpci100_data	drivers/pci/pci_ftpci100.c	/^struct ftpci100_data {$/;"	s	file:
ftpci_preinit	drivers/pci/pci_ftpci100.c	/^static void ftpci_preinit(struct ftpci100_data *priv)$/;"	f	typeref:typename:void	file:
ftpmu010	include/faraday/ftpmu010.h	/^struct ftpmu010 {$/;"	s
ftpmu010_32768osc_enable	drivers/power/ftpmu010.c	/^void ftpmu010_32768osc_enable(void)$/;"	f	typeref:typename:void
ftpmu010_dlldis_disable	drivers/power/ftpmu010.c	/^void ftpmu010_dlldis_disable(void)$/;"	f	typeref:typename:void
ftpmu010_mfpsr_diselect_dev	drivers/power/ftpmu010.c	/^void ftpmu010_mfpsr_diselect_dev(unsigned int dev)$/;"	f	typeref:typename:void
ftpmu010_mfpsr_select_dev	drivers/power/ftpmu010.c	/^void ftpmu010_mfpsr_select_dev(unsigned int dev)$/;"	f	typeref:typename:void
ftpmu010_sdram_clk_disable	drivers/power/ftpmu010.c	/^void ftpmu010_sdram_clk_disable(unsigned int cr0)$/;"	f	typeref:typename:void
ftpmu010_sdramhtc_set	drivers/power/ftpmu010.c	/^void ftpmu010_sdramhtc_set(unsigned int val)$/;"	f	typeref:typename:void
ftrace	lib/trace.c	/^	struct trace_call *ftrace;	\/* The function call records *\/$/;"	m	struct:trace_hdr	typeref:struct:trace_call *	file:
ftrace_branch_data	include/linux/compiler.h	/^struct ftrace_branch_data {$/;"	s
ftrace_count	lib/trace.c	/^	ulong ftrace_count;	\/* Num. of ftrace records written *\/$/;"	m	struct:trace_hdr	typeref:typename:ulong	file:
ftrace_flags	include/trace.h	/^enum ftrace_flags {$/;"	g
ftrace_size	lib/trace.c	/^	ulong ftrace_size;	\/* Num. of ftrace records we have space for *\/$/;"	m	struct:trace_hdr	typeref:typename:ulong	file:
ftrace_too_deep_count	lib/trace.c	/^	ulong ftrace_too_deep_count;	\/* Functions that were too deep *\/$/;"	m	struct:trace_hdr	typeref:typename:ulong	file:
ftrglevel	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 ftrglevel;		\/* 0x40 FIFO threshold watermark*\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
ftrglevel	arch/arm/include/asm/arch/mmc.h	/^	u32 ftrglevel;		\/* 0x40 FIFO threshold watermark*\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
ftrtc010	drivers/rtc/ftrtc010.c	/^struct ftrtc010 {$/;"	s	file:
ftrtc010_enable	drivers/rtc/ftrtc010.c	/^static void ftrtc010_enable(void)$/;"	f	typeref:typename:void	file:
ftrtc010_time	drivers/rtc/ftrtc010.c	/^static unsigned long ftrtc010_time(void)$/;"	f	typeref:typename:unsigned long	file:
ftsdc010_chip	drivers/mmc/ftsdc010_mci.c	/^struct ftsdc010_chip {$/;"	s	file:
ftsdc010_clkset	drivers/mmc/ftsdc010_mci.c	/^static void ftsdc010_clkset(struct mmc *mmc, uint32_t rate)$/;"	f	typeref:typename:void	file:
ftsdc010_init	drivers/mmc/ftsdc010_mci.c	/^static int ftsdc010_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
ftsdc010_mmc	include/faraday/ftsdc010.h	/^struct ftsdc010_mmc {$/;"	s
ftsdc010_mmc_init	drivers/mmc/ftsdc010_mci.c	/^int ftsdc010_mmc_init(int devid)$/;"	f	typeref:typename:int
ftsdc010_ops	drivers/mmc/ftsdc010_mci.c	/^static const struct mmc_ops ftsdc010_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
ftsdc010_request	drivers/mmc/ftsdc010_mci.c	/^static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
ftsdc010_send_cmd	drivers/mmc/ftsdc010_mci.c	/^static inline int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)$/;"	f	typeref:typename:int	file:
ftsdc010_set_ios	drivers/mmc/ftsdc010_mci.c	/^static void ftsdc010_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
ftsdc010_wait	drivers/mmc/ftsdc010_mci.c	/^static int ftsdc010_wait(struct ftsdc010_mmc __iomem *regs, uint32_t mask)$/;"	f	typeref:typename:int	file:
ftsdc021_sdhci_init	drivers/mmc/ftsdc021_sdhci.c	/^int ftsdc021_sdhci_init(u32 regbase)$/;"	f	typeref:typename:int
ftsdmc021	include/faraday/ftsdmc021.h	/^struct ftsdmc021 {$/;"	s
ftsmc020	include/faraday/ftsmc020.h	/^struct ftsmc020 {$/;"	s
ftsmc020_bank	include/faraday/ftsmc020.h	/^struct ftsmc020_bank {$/;"	s
ftsmc020_config	drivers/mtd/ftsmc020.c	/^struct ftsmc020_config {$/;"	s	file:
ftsmc020_init	drivers/mtd/ftsmc020.c	/^void ftsmc020_init(void)$/;"	f	typeref:typename:void
ftsmc020_setup_bank	drivers/mtd/ftsmc020.c	/^static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg)$/;"	f	typeref:typename:void	file:
ftstc	common/console.c	/^int ftstc(int file)$/;"	f	typeref:typename:int
fttmr010	include/faraday/fttmr010.h	/^struct fttmr010 {$/;"	s
ftwdt010_wdt	include/faraday/ftwdt010_wdt.h	/^struct ftwdt010_wdt {$/;"	s
ftwdt010_wdt_disable	drivers/watchdog/ftwdt010_wdt.c	/^void ftwdt010_wdt_disable(void)$/;"	f	typeref:typename:void
ftwdt010_wdt_reset	drivers/watchdog/ftwdt010_wdt.c	/^void ftwdt010_wdt_reset(void)$/;"	f	typeref:typename:void
ftwdt010_wdt_settimeout	drivers/watchdog/ftwdt010_wdt.c	/^int ftwdt010_wdt_settimeout(unsigned int timeout)$/;"	f	typeref:typename:int
fucop_ctl	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG fucop_ctl;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
fudelay	board/sysam/amcore/amcore.c	/^void fudelay(int usec)$/;"	f	typeref:typename:void
full	lib/lz4.c	/^typedef enum { full = 0, partial = 1 } earlyEnd_directive;$/;"	e	enum:__anoneaf05ef60303	file:
fullMode	scripts/kconfig/qconf.h	/^	singleMode, menuMode, symbolMode, fullMode, listMode$/;"	e	enum:listMode
full_name_hash	fs/jffs2/jffs2_nand_private.h	/^full_name_hash(const unsigned char *name, unsigned int len)$/;"	f	typeref:typename:unsigned int
full_net	arch/x86/include/asm/me_common.h	/^	u32 full_net:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
full_scan_options	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static struct sdram_timing full_scan_options[] = {$/;"	v	typeref:struct:sdram_timing[]	file:
fullblocksize_shift	fs/reiserfs/reiserfs_private.h	/^  __u8	fullblocksize_shift;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u8
fullspeed	include/linux/usb/composite.h	/^	unsigned		fullspeed:1;$/;"	m	struct:usb_configuration	typeref:typename:unsigned:1
fun_cmd_ctrl	drivers/mtd/nand/fsl_upm.c	/^static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
fun_select_chip	drivers/mtd/nand/fsl_upm.c	/^static void fun_select_chip(struct mtd_info *mtd, int chip_nr)$/;"	f	typeref:typename:void	file:
fun_wait	drivers/mtd/nand/fsl_upm.c	/^static void fun_wait(struct fsl_upm_nand *fun)$/;"	f	typeref:typename:void	file:
func	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 func:8;		\/* function to assign PMUX_FUNC_... *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:8
func	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 func:8;	\/* function to assign PMUX_FUNC_... *\/$/;"	m	struct:pmux_mipipadctrlgrp_config	typeref:typename:u32:8
func	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const char *func;$/;"	m	struct:tegra_xusb_padctl_group	typeref:typename:const char *
func	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int func;$/;"	m	struct:tegra_xusb_padctl_pin	typeref:typename:unsigned int
func	arch/sparc/cpu/leon3/memcfg.h	/^	mctrl_handler_t	func;		\/* 0x08. Memory Controller Handler *\/$/;"	m	struct:grlib_mctrl_handler	typeref:typename:mctrl_handler_t
func	drivers/mtd/ubi/ubi.h	/^	int (*func)(struct ubi_device *ubi, struct ubi_work *wrk, int shutdown);$/;"	m	struct:ubi_work	typeref:typename:int (*)(struct ubi_device * ubi,struct ubi_work * wrk,int shutdown)
func	examples/standalone/sched.c	/^	int (*func) (void *);$/;"	m	struct:lthread	typeref:typename:int (*)(void *)	file:
func	include/faraday/ftpci100.h	/^	unsigned int func;$/;"	m	struct:pci_config	typeref:typename:unsigned int
func	include/linux/compat.h	/^	void (*func)(struct callback_head *head);$/;"	m	struct:callback_head	typeref:typename:void (*)(struct callback_head * head)
func	include/linux/compiler.h	/^	const char *func;$/;"	m	struct:ftrace_branch_data	typeref:typename:const char *
func	include/pci.h	/^	unsigned int func;			\/* Function number, or PCI_ANY_ID *\/$/;"	m	struct:pci_config_table	typeref:typename:unsigned int
func	include/test/test.h	/^	int (*func)(struct unit_test_state *state);$/;"	m	struct:unit_test	typeref:typename:int (*)(struct unit_test_state * state)
func	include/trace.h	/^	uint32_t func;		\/* Function offset *\/$/;"	m	struct:trace_call	typeref:typename:uint32_t
func	lib/zlib/deflate.c	/^   compress_func func;$/;"	m	struct:config_s	typeref:typename:compress_func	file:
func	post/lib_powerpc/fpu/acc1.c	/^static double func (const double *array)$/;"	f	typeref:typename:GNU_FPOST_ATTR double	file:
func	scripts/kconfig/nconf.c	/^	const char *func;$/;"	m	struct:function_keys	typeref:typename:const char *	file:
func_128m_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	func_128m_clk: func_128m_clk {$/;"	l
func_12m_clk	arch/arm/dts/am43xx-clocks.dtsi	/^	func_12m_clk: func_12m_clk {$/;"	l
func_12m_fclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	func_12m_fclk: func_12m_fclk {$/;"	l
func_24m_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	func_24m_clk: func_24m_clk {$/;"	l
func_48m_fclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	func_48m_fclk: func_48m_fclk {$/;"	l
func_96m_aon_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	func_96m_aon_dclk_div: func_96m_aon_dclk_div {$/;"	l
func_96m_fclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	func_96m_fclk: func_96m_fclk {$/;"	l
func_addr_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	func_addr_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
func_args	tools/aisimage.h	/^	uint32_t func_args;$/;"	m	struct:ais_cmd_func	typeref:typename:uint32_t
func_count	lib/trace.c	/^	int func_count;		\/* Total number of function call sites *\/$/;"	m	struct:trace_hdr	typeref:typename:int	file:
func_count	tools/proftool.c	/^int func_count;$/;"	v	typeref:typename:int
func_en1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	func_en1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
func_en2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	func_en2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
func_en_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	func_en_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
func_en_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	func_en_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
func_info	tools/proftool.c	/^struct func_info {$/;"	s	file:
func_list	tools/proftool.c	/^struct func_info *func_list;$/;"	v	typeref:struct:func_info *
func_ptr_to_num	lib/trace.c	/^		func_ptr_to_num(void *func_ptr)$/;"	f	typeref:typename:uintptr_t	file:
func_t	board/freescale/mpc8313erdb/sdram.c	/^	typedef void (*func_t)(void);$/;"	t	function:resume_from_sleep	typeref:typename:void (*)(void)	file:
func_t	board/freescale/mpc8315erdb/sdram.c	/^	typedef void (*func_t)(void);$/;"	t	function:resume_from_sleep	typeref:typename:void (*)(void)	file:
func_t	lib/efi/efi_stub.c	/^	typedef void (*func_t)(int bist, int unused, ulong info)$/;"	t	function:jump_to_uboot	typeref:typename:void (*)(int bist,int unused,ulong info)	file:
func_to_dfu	drivers/usb/gadget/f_dfu.c	/^static inline struct f_dfu *func_to_dfu(struct usb_function *f)$/;"	f	typeref:struct:f_dfu *	file:
func_to_fastboot	drivers/usb/gadget/f_fastboot.c	/^static inline struct f_fastboot *func_to_fastboot(struct usb_function *f)$/;"	f	typeref:struct:f_fastboot *	file:
func_to_thor	drivers/usb/gadget/f_thor.c	/^static inline struct f_thor *func_to_thor(struct usb_function *f)$/;"	f	typeref:struct:f_thor *	file:
funcctrl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 funcctrl;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
funcmux_select	arch/arm/mach-tegra/tegra114/funcmux.c	/^int funcmux_select(enum periph_id id, int config)$/;"	f	typeref:typename:int
funcmux_select	arch/arm/mach-tegra/tegra124/funcmux.c	/^int funcmux_select(enum periph_id id, int config)$/;"	f	typeref:typename:int
funcmux_select	arch/arm/mach-tegra/tegra20/funcmux.c	/^int funcmux_select(enum periph_id id, int config)$/;"	f	typeref:typename:int
funcmux_select	arch/arm/mach-tegra/tegra210/funcmux.c	/^int funcmux_select(enum periph_id id, int config)$/;"	f	typeref:typename:int
funcmux_select	arch/arm/mach-tegra/tegra30/funcmux.c	/^int funcmux_select(enum periph_id id, int config)$/;"	f	typeref:typename:int
funcs	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u8 funcs[2];$/;"	m	struct:pmux_mipipadctrlgrp_desc	typeref:typename:u8[2]
funcs	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u8 funcs[4];$/;"	m	struct:pmux_pingrp_desc	typeref:typename:u8[4]
funcs	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const unsigned int *funcs;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:const unsigned int *
funcs	drivers/pinctrl/meson/pinctrl-meson.h	/^	struct meson_pmx_func *funcs;$/;"	m	struct:meson_pinctrl_data	typeref:struct:meson_pmx_func *
funcs_used	lib/trace.c	/^	int funcs_used;		\/* Total number of functions used *\/$/;"	m	struct:trace_hdr	typeref:typename:int	file:
funcsel	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 funcsel;		\/* 0x44 function select *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
funcsel	arch/arm/include/asm/arch/mmc.h	/^	u32 funcsel;		\/* 0x44 function select *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
funcsynopsis.style	doc/DocBook/stylesheet.xsl	/^<param name="funcsynopsis.style">ansi<\/param>$/;"	p
funcsynopsis.tabular.threshold	doc/DocBook/stylesheet.xsl	/^<param name="funcsynopsis.tabular.threshold">80<\/param>$/;"	p
function	common/cli_hush.c	/^	int (*function) (struct child_prog *);	\/* function ptr *\/$/;"	m	struct:built_in_command	typeref:typename:int (*)(struct child_prog *)	file:
function	drivers/gpio/lpc32xx_gpio.c	/^	signed char function[LPC32XX_GPIOS];$/;"	m	struct:lpc32xx_gpio_priv	typeref:typename:signed char[]	file:
function	drivers/usb/gadget/f_dfu.c	/^	struct usb_descriptor_header	**function;$/;"	m	struct:f_dfu	typeref:struct:usb_descriptor_header **	file:
function	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_function	function;$/;"	m	struct:fsg_dev	typeref:struct:usb_function	file:
function	drivers/usb/gadget/pxa25x_udc.h	/^	void (*function)(struct pxa25x_udc *udc);$/;"	m	struct:pxa25x_watchdog	typeref:typename:void (*)(struct pxa25x_udc * udc)
function	include/bios_emul.h	/^	int function;$/;"	m	struct:__anoneb05efed0108	typeref:typename:int
function	include/linux/edd.h	/^			__u8 function;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0308	typeref:typename:__u8
function	include/linux/usb/gadget.h	/^	char			*function;$/;"	m	struct:usb_gadget_driver	typeref:typename:char *
function	include/sh_pfc.h	/^	struct pinmux_range function;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
function	include/usbdescriptors.h	/^		struct usb_class_function_descriptor function;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_function_descriptor
function_ctrl	include/usb/ulpi.h	/^	u8	function_ctrl;		\/* 0x04 Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
function_ctrl_clear	include/usb/ulpi.h	/^	u8	function_ctrl_clear;	\/* 0x06 Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
function_ctrl_set	include/usb/ulpi.h	/^	u8	function_ctrl_set;	\/* 0x05 Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
function_epilog	arch/powerpc/cpu/ppc4xx/start.S	/^#define function_epilog(/;"	d	file:
function_key	scripts/kconfig/nconf.h	/^} function_key;$/;"	t	typeref:enum:__anon6c8863760203
function_key_handler_t	scripts/kconfig/nconf.c	/^typedef void (*function_key_handler_t)(int *key, struct menu *menu);$/;"	t	typeref:typename:void (*)(int * key,struct menu * menu)	file:
function_keys	scripts/kconfig/nconf.c	/^struct function_keys function_keys[] = {$/;"	v	typeref:struct:function_keys[]
function_keys	scripts/kconfig/nconf.c	/^struct function_keys {$/;"	s	file:
function_keys_num	scripts/kconfig/nconf.c	/^static const int function_keys_num = 9;$/;"	v	typeref:typename:const int	file:
function_prolog	arch/powerpc/cpu/ppc4xx/start.S	/^#define function_prolog(/;"	d	file:
function_reg_value	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int function_reg_value = 8;$/;"	v	typeref:typename:int
functions	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const char *const *functions;$/;"	m	struct:tegra_xusb_padctl_soc	typeref:typename:const char * const *
functions	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	const char * const *functions;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:const char * const *
functions	include/linux/usb/composite.h	/^	struct list_head	functions;$/;"	m	struct:usb_configuration	typeref:struct:list_head
functions_count	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	int functions_count;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:int
funsel	board/micronas/vct/top.c	/^		u32 funsel	:  2;   \/* Pin function		*\/$/;"	m	struct:_TOP_PINMUX_t::__anon904a4b870108	typeref:typename:u32:2	file:
fusbh200_regs	include/usb/fusbh200.h	/^struct fusbh200_regs {$/;"	s
fuse	drivers/thermal/imx_thermal.c	/^	unsigned int fuse;$/;"	m	struct:thermal_data	typeref:typename:unsigned int	file:
fuse0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 fuse0;$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32
fuse0_21	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 fuse0_21[0x16];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[0x16]
fuse0_21	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 fuse0_21[0x16];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[0x16]
fuse0_3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 fuse0_3[5];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[5]
fuse0_4	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fuse0_4[5];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[5]
fuse0_5	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 fuse0_5[6];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[6]
fuse0_7	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 fuse0_7[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
fuse0_7	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 fuse0_7[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
fuse0_7	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fuse0_7[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
fuse0_8	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fuse0_8[9];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[9]
fuse10_31	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 fuse10_31[0x16];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[0x16]
fuse15_31	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fuse15_31[0x11];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[0x11]
fuse16_23	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fuse16_23[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
fuse16_25	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 fuse16_25[0xa];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[0xa]
fuse16_31	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 fuse16_31[0x10];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[0x10]
fuse23_29	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 fuse23_29[7];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[7]
fuse23_31	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 fuse23_31[9];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[9]
fuse7_15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 fuse7_15[9];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[9]
fuse8_31	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	fuse8_31[0x18];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[0x18]
fuse9_15	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 fuse9_15[7];$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32[7]
fuse_bank	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:iim_regs
fuse_bank	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:iim_regs
fuse_bank	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:iim_regs
fuse_bank	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:iim_regs
fuse_bank	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:iim_regs
fuse_bank	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:ocotp_regs
fuse_bank	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	struct fuse_bank {	\/* offset 0x400 *\/$/;"	s	struct:ocotp_regs
fuse_bank	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	struct fuse_bank {$/;"	s	struct:ocotp_regs
fuse_bank	include/imx_thermal.h	/^	int fuse_bank;$/;"	m	struct:imx_thermal_plat	typeref:typename:int
fuse_bank0_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank0_regs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct fuse_bank0_regs {$/;"	s
fuse_bank1_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct fuse_bank1_regs {$/;"	s
fuse_bank1_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct fuse_bank1_regs {$/;"	s
fuse_bank1_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct fuse_bank1_regs {$/;"	s
fuse_bank1_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct fuse_bank1_regs {$/;"	s
fuse_bank1_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct fuse_bank1_regs {$/;"	s
fuse_bank2_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct fuse_bank2_regs {$/;"	s
fuse_bank2_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct fuse_bank2_regs {$/;"	s
fuse_bank3_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct fuse_bank3_regs {$/;"	s
fuse_bank4_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct fuse_bank4_regs {$/;"	s
fuse_bank4_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct fuse_bank4_regs {$/;"	s
fuse_bank4_regs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct fuse_bank4_regs {$/;"	s
fuse_bank8_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct fuse_bank8_regs {$/;"	s
fuse_bank9_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct fuse_bank9_regs {$/;"	s
fuse_bank_physical	drivers/misc/mxc_ocotp.c	/^u32 fuse_bank_physical(int index)$/;"	f	typeref:typename:u32
fuse_get_operation_mode	arch/arm/mach-tegra/tegra20/warmboot.c	/^static enum fuse_operating_mode fuse_get_operation_mode(void)$/;"	f	typeref:enum:fuse_operating_mode	file:
fuse_operating_mode	arch/arm/include/asm/arch-tegra/warmboot.h	/^enum fuse_operating_mode {$/;"	g
fuse_override	drivers/misc/fsl_iim.c	/^int fuse_override(u32 bank, u32 word, u32 val)$/;"	f	typeref:typename:int
fuse_override	drivers/misc/mxc_ocotp.c	/^int fuse_override(u32 bank, u32 word, u32 val)$/;"	f	typeref:typename:int
fuse_override	drivers/misc/mxs_ocotp.c	/^int fuse_override(u32 bank, u32 word, u32 val)$/;"	f	typeref:typename:int
fuse_prog	drivers/misc/fsl_iim.c	/^int fuse_prog(u32 bank, u32 word, u32 val)$/;"	f	typeref:typename:int
fuse_prog	drivers/misc/mxc_ocotp.c	/^int fuse_prog(u32 bank, u32 word, u32 val)$/;"	f	typeref:typename:int
fuse_prog	drivers/misc/mxs_ocotp.c	/^int fuse_prog(u32 bank, u32 word, u32 val)$/;"	f	typeref:typename:int
fuse_read	drivers/misc/fsl_iim.c	/^int fuse_read(u32 bank, u32 word, u32 *val)$/;"	f	typeref:typename:int
fuse_read	drivers/misc/mxc_ocotp.c	/^int fuse_read(u32 bank, u32 word, u32 *val)$/;"	f	typeref:typename:int
fuse_read	drivers/misc/mxs_ocotp.c	/^int fuse_read(u32 bank, u32 word, u32 *val)$/;"	f	typeref:typename:int
fuse_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^		u32 fuse_regs[0x20];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^		u32 fuse_regs[0x20];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^		u32 fuse_regs[0x20];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^		u32 fuse_regs[0x20];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^		u32	fuse_regs[0x20];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^		u32	fuse_regs[0x20];$/;"	m	struct:ocotp_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^		u32 fuse_regs[0x10];$/;"	m	struct:ocotp_regs::fuse_bank	typeref:typename:u32[0x10]
fuse_regs	arch/arm/include/asm/arch-tegra/fuse.h	/^struct fuse_regs {$/;"	s
fuse_regs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^		u32 fuse_regs[0x20];$/;"	m	struct:ocotp_regs::fuse_bank	typeref:typename:u32[0x20]
fuse_rsvd	arch/arm/include/asm/arch-mx25/imx-regs.h	/^		u32 fuse_rsvd[0xe0];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0xe0]
fuse_rsvd	arch/arm/include/asm/arch-mx27/imx-regs.h	/^		u32 fuse_rsvd[0xe0];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0xe0]
fuse_rsvd	arch/arm/include/asm/arch-mx31/imx-regs.h	/^		u32 fuse_rsvd[0xe0];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0xe0]
fuse_rsvd	arch/arm/include/asm/arch-mx35/imx-regs.h	/^		u32 fuse_rsvd[0xe0];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0xe0]
fuse_rsvd	arch/arm/include/asm/arch-mx5/imx-regs.h	/^		u32	fuse_rsvd[0xe0];$/;"	m	struct:iim_regs::fuse_bank	typeref:typename:u32[0xe0]
fuse_sense	drivers/misc/fsl_iim.c	/^int fuse_sense(u32 bank, u32 word, u32 *val)$/;"	f	typeref:typename:int
fuse_sense	drivers/misc/mxc_ocotp.c	/^int fuse_sense(u32 bank, u32 word, u32 *val)$/;"	f	typeref:typename:int
fuse_sense	drivers/misc/mxs_ocotp.c	/^int fuse_sense(u32 bank, u32 word, u32 *val)$/;"	f	typeref:typename:int
fuse_test_flags	arch/x86/include/asm/me_common.h	/^	u16 fuse_test_flags;$/;"	m	struct:mbp_rom_bist_data	typeref:typename:u16
fuse_word	include/imx_thermal.h	/^	int fuse_word;$/;"	m	struct:imx_thermal_plat	typeref:typename:int
fuse_word_physical	drivers/misc/mxc_ocotp.c	/^u32 fuse_word_physical(u32 bank, u32 word_index)$/;"	f	typeref:typename:u32
fuseovrdcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 fuseovrdcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
future	include/cramfs/cramfs_fs.h	/^	u32 future;			\/* reserved for future use *\/$/;"	m	struct:cramfs_super	typeref:typename:u32
fv_blkmap_entry	arch/x86/include/asm/fsp/fsp_fv.h	/^struct fv_blkmap_entry {$/;"	s
fv_ext_header	arch/x86/include/asm/fsp/fsp_fv.h	/^struct fv_ext_header {$/;"	s
fv_header	arch/x86/include/asm/fsp/fsp_fv.h	/^struct fv_header {$/;"	s
fv_len	arch/x86/include/asm/fsp/fsp_fv.h	/^	u64			fv_len;$/;"	m	struct:fv_header	typeref:typename:u64
fv_name	arch/x86/include/asm/fsp/fsp_fv.h	/^	struct efi_guid		fv_name;$/;"	m	struct:fv_ext_header	typeref:struct:efi_guid
fvswap	lib/bzip2/bzlib_blocksort.c	/^#define fvswap(/;"	d	file:
fw	drivers/video/mx3fb.c	/^	u32	fw:12;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:12	file:
fw	drivers/video/mx3fb.c	/^	u32	fw:12;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:12	file:
fw_capabilities	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_mefwcaps	*fw_capabilities;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_mefwcaps *
fw_capabilities	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mefwcaps_sku fw_capabilities;$/;"	m	struct:mbp_fw_caps	typeref:struct:mefwcaps_sku
fw_caps_sku	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mbp_fw_caps fw_caps_sku;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_fw_caps
fw_cfg_arch_ops	include/qfw.h	/^struct fw_cfg_arch_ops {$/;"	s
fw_cfg_dma_access	include/qfw.h	/^struct fw_cfg_dma_access {$/;"	s
fw_cfg_file	include/qfw.h	/^struct fw_cfg_file {$/;"	s
fw_cfg_file_iter	include/qfw.h	/^struct fw_cfg_file_iter {$/;"	s
fw_env_close	tools/env/fw_env.c	/^int fw_env_close(struct env_opts *opts)$/;"	f	typeref:typename:int
fw_env_open	tools/env/fw_env.c	/^int fw_env_open(struct env_opts *opts)$/;"	f	typeref:typename:int
fw_env_write	tools/env/fw_env.c	/^int fw_env_write(char *name, char *value)$/;"	f	typeref:typename:int
fw_file	include/qfw.h	/^struct fw_file {$/;"	s
fw_getdefenv	tools/env/fw_env.c	/^char *fw_getdefenv(char *name)$/;"	f	typeref:typename:char *
fw_getenv	tools/env/fw_env.c	/^char *fw_getenv (char *name)$/;"	f	typeref:typename:char *
fw_image_base	board/Synology/ds109/ds109.h	/^	u32 fw_image_base;$/;"	m	struct:tag_mv_uboot	typeref:typename:u32
fw_image_size	board/Synology/ds109/ds109.h	/^	u32 fw_image_size;$/;"	m	struct:tag_mv_uboot	typeref:typename:u32
fw_init_complete	arch/x86/include/asm/me_common.h	/^	u32 fw_init_complete:1;$/;"	m	struct:me_hfs	typeref:typename:u32:1
fw_parse_script	tools/env/fw_env.c	/^int fw_parse_script(char *fname, struct env_opts *opts)$/;"	f	typeref:typename:int
fw_plat_type	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_plat_type	*fw_plat_type;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_plat_type *
fw_plat_type	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mbp_plat_type fw_plat_type;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_plat_type
fw_printenv	tools/env/fw_env.c	/^int fw_printenv(int argc, char *argv[], int value_only, struct env_opts *opts)$/;"	f	typeref:typename:int
fw_printenv-objs	tools/env/Makefile	/^fw_printenv-objs := fw_env_main.o $(lib-y)$/;"	m
fw_rev	include/ata.h	/^	unsigned char	fw_rev[8];	\/* 0 = not_specified *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char[8]
fw_revision	include/efi_api.h	/^	u32 fw_revision;$/;"	m	struct:efi_system_table	typeref:typename:u32
fw_setenv	tools/env/fw_env.c	/^int fw_setenv(int argc, char *argv[], struct env_opts *opts)$/;"	f	typeref:typename:int
fw_upd_ipu	arch/x86/include/asm/me_common.h	/^	u32 fw_upd_ipu:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
fw_vendor	include/efi_api.h	/^	unsigned long fw_vendor;   \/* physical addr of wchar_t vendor string *\/$/;"	m	struct:efi_system_table	typeref:typename:unsigned long
fw_version	include/linux/ethtool.h	/^	char	fw_version[ETHTOOL_FWVERS_LEN];	\/* firmware version string *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:char[]
fw_version_name	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_fw_version_name	*fw_version_name;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_fw_version_name *
fw_version_name	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mbp_fw_version_name fw_version_name;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_fw_version_name
fw_wp_ap	arch/arm/dts/rk3288-veyron.dtsi	/^		fw_wp_ap: fw-wp-ap {$/;"	l
fwadapt_7wvga_pads	board/wandboard/wandboard.c	/^static iomux_v3_cfg_t const fwadapt_7wvga_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
fwblks	drivers/mtd/nand/denali.h	/^	uint32_t fwblks; \/* represent how many blocks FW used *\/$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
fwcfg_arch_ops	drivers/misc/qfw.c	/^static struct fw_cfg_arch_ops *fwcfg_arch_ops;$/;"	v	typeref:struct:fw_cfg_arch_ops *	file:
fwcfg_commands	cmd/qfw.c	/^static cmd_tbl_t fwcfg_commands[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
fwcfg_dma_present	drivers/misc/qfw.c	/^static bool fwcfg_dma_present;$/;"	v	typeref:typename:bool	file:
fwcfg_present	drivers/misc/qfw.c	/^static bool fwcfg_present;$/;"	v	typeref:typename:bool	file:
fwcfg_x86_ops	arch/x86/cpu/qemu/qemu.c	/^static struct fw_cfg_arch_ops fwcfg_x86_ops = {$/;"	v	typeref:struct:fw_cfg_arch_ops	file:
fwclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int fwclkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
fx	arch/powerpc/cpu/mpc8xx/video.c	/^			fx:2,		\/* Frame *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:2	file:
fx	drivers/video/stb_truetype.h	/^   float fx,fdx,fdy;$/;"	m	struct:stbtt__active_edge	typeref:typename:float
fxo_led	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 fxo_led;                     \/* offset: 0x9 *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
fxs_led	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 fxs_led;                     \/* offset: 0xa *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
fzap_iterate	fs/zfs/zfs.c	/^fzap_iterate(dnode_end_t *zap_dnode, zap_phys_t *zap,$/;"	f	typeref:typename:int	file:
fzap_lookup	fs/zfs/zfs.c	/^fzap_lookup(dnode_end_t *zap_dnode, zap_phys_t *zap,$/;"	f	typeref:typename:int	file:
g	arch/powerpc/include/asm/mmu.h	/^	unsigned long g:1;	\/* Guarded (MBZ in IBAT) *\/$/;"	m	struct:_BATL	typeref:typename:unsigned long:1
g	arch/powerpc/include/asm/mmu.h	/^	unsigned long g:1;	\/* Guarded *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
g	arch/x86/lib/physmem.c	/^	uint64_t g:1;      \/* global page *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
g	drivers/usb/musb-new/musb_core.h	/^	struct usb_gadget	g;			\/* the gadget *\/$/;"	m	struct:musb	typeref:struct:usb_gadget
g	include/ec_commands.h	/^	uint8_t r, g, b;$/;"	m	struct:rgb_s	typeref:typename:uint8_t
g	tools/easylogo/easylogo.c	/^	unsigned char b, g, r;$/;"	m	struct:__anonbf0fd82b0308	typeref:typename:unsigned char	file:
g	tools/easylogo/easylogo.c	/^	unsigned char r, g, b;$/;"	m	struct:__anonbf0fd82b0208	typeref:typename:unsigned char	file:
g2_tx_ssc_amp	drivers/phy/marvell/comphy_a3700.h	/^#define g2_tx_ssc_amp	/;"	d
g2d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g2d_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g2d_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g2d_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g2d_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g2d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g2d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g2d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g2d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g2de_clk	arch/arm/dts/at91sam9263.dtsi	/^					g2de_clk: g2de_clk {$/;"	l
g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g3d_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g3d_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g3d_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
g3d_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	g3d_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gAddressBase	common/dlmalloc.c	/^static unsigned int gAddressBase = 0;$/;"	v	typeref:typename:unsigned int	file:
gAllocatedSize	common/dlmalloc.c	/^static unsigned int gAllocatedSize = 0;$/;"	v	typeref:typename:unsigned int	file:
gNextAddress	common/dlmalloc.c	/^static unsigned int gNextAddress = 0;$/;"	v	typeref:typename:unsigned int	file:
g_JTAGTransistions	drivers/fpga/ivm_core.c	/^} g_JTAGTransistions[25] = {$/;"	v	typeref:struct:__anon34a9f1e50108[25]
g_buserraddr	include/linux/usb/dwc3.h	/^	u64 g_buserraddr;$/;"	m	struct:dwc3	typeref:typename:u64
g_cCurrentJTAGState	drivers/fpga/ivm_core.c	/^static signed char g_cCurrentJTAGState;$/;"	v	typeref:typename:signed char	file:
g_cVendor	drivers/fpga/ivm_core.c	/^static signed char g_cVendor = LATTICE;$/;"	v	typeref:typename:signed char	file:
g_channel_enable_mask	drivers/video/ipu_common.c	/^uint32_t g_channel_enable_mask;$/;"	v	typeref:typename:uint32_t
g_channel_init_mask	drivers/video/ipu_common.c	/^uint32_t g_channel_init_mask;$/;"	v	typeref:typename:uint32_t
g_clk_mux_auto	arch/arm/cpu/arm1136/mx35/generic.c	/^static int g_clk_mux_auto[8] = {$/;"	v	typeref:typename:int[8]	file:
g_clk_mux_consumer	arch/arm/cpu/arm1136/mx35/generic.c	/^static int g_clk_mux_consumer[16] = {$/;"	v	typeref:typename:int[16]	file:
g_codec_info	drivers/sound/max98095.c	/^static struct sound_codec_info g_codec_info;$/;"	v	typeref:struct:sound_codec_info	file:
g_codec_info	drivers/sound/wm8994.c	/^static struct sound_codec_info g_codec_info;$/;"	v	typeref:struct:sound_codec_info	file:
g_ctl	include/linux/usb/dwc3.h	/^	u32 g_ctl;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbgbmu	include/linux/usb/dwc3.h	/^	u32 g_dbgbmu;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbgepinfo0	include/linux/usb/dwc3.h	/^	u32 g_dbgepinfo0;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbgepinfo1	include/linux/usb/dwc3.h	/^	u32 g_dbgepinfo1;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbgfifospace	include/linux/usb/dwc3.h	/^	u32 g_dbgfifospace;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbglnmcc	include/linux/usb/dwc3.h	/^	u32 g_dbglnmcc;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbglsp	include/linux/usb/dwc3.h	/^	u32 g_dbglsp;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbglspmux	include/linux/usb/dwc3.h	/^	u32 g_dbglspmux;$/;"	m	struct:dwc3	typeref:typename:u32
g_dbgltssm	include/linux/usb/dwc3.h	/^	u32 g_dbgltssm;$/;"	m	struct:dwc3	typeref:typename:u32
g_dc_di_assignment	drivers/video/ipu_common.c	/^unsigned char g_dc_di_assignment[10];$/;"	v	typeref:typename:unsigned char[10]
g_delay	arch/arm/include/asm/arch-omap5/sys_proto.h	/^	u16 g_delay;$/;"	m	struct:iodelay_cfg_entry	typeref:typename:u16
g_dev_id	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 g_dev_id = -1;$/;"	v	typeref:typename:u32
g_di1_tvout	drivers/video/ipu_disp.c	/^int g_di1_tvout;$/;"	v	typeref:typename:int
g_di_clk	drivers/video/ipu_common.c	/^struct clk *g_di_clk[2];$/;"	v	typeref:struct:clk * [2]
g_dic	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_dic = 0x2;$/;"	v	typeref:typename:u32
g_dmactrlflags	drivers/net/bcm-sf2-eth-gmac.c	/^uint32_t g_dmactrlflags;$/;"	v	typeref:typename:uint32_t
g_dnl_bind	drivers/usb/gadget/g_dnl.c	/^static int g_dnl_bind(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:int	file:
g_dnl_bind_callback	include/g_dnl.h	/^struct g_dnl_bind_callback {$/;"	s
g_dnl_bind_callback_end	drivers/usb/gadget/g_dnl.c	/^static inline struct g_dnl_bind_callback *g_dnl_bind_callback_end(void)$/;"	f	typeref:struct:g_dnl_bind_callback *	file:
g_dnl_bind_callback_f	include/g_dnl.h	/^typedef int (*g_dnl_bind_callback_f)(struct usb_configuration *);$/;"	t	typeref:typename:int (*)(struct usb_configuration *)
g_dnl_bind_callback_first	drivers/usb/gadget/g_dnl.c	/^static inline struct g_dnl_bind_callback *g_dnl_bind_callback_first(void)$/;"	f	typeref:struct:g_dnl_bind_callback *	file:
g_dnl_bind_fixup	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)$/;"	f	typeref:typename:int
g_dnl_bind_fixup	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)$/;"	f	typeref:typename:int
g_dnl_bind_fixup	board/samsung/common/gadget.c	/^int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)$/;"	f	typeref:typename:int
g_dnl_bind_fixup	board/siemens/common/factoryset.c	/^int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)$/;"	f	typeref:typename:int
g_dnl_bind_fixup	board/toradex/colibri_vf/colibri_vf.c	/^int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)$/;"	f	typeref:typename:int
g_dnl_bind_fixup	drivers/usb/gadget/g_dnl.c	/^int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)$/;"	f	typeref:typename:__weak int
g_dnl_board_usb_cable_connected	arch/arm/mach-socfpga/board.c	/^int g_dnl_board_usb_cable_connected(void)$/;"	f	typeref:typename:int
g_dnl_board_usb_cable_connected	board/samsung/trats/trats.c	/^int g_dnl_board_usb_cable_connected(void)$/;"	f	typeref:typename:int
g_dnl_board_usb_cable_connected	board/samsung/trats2/trats2.c	/^int g_dnl_board_usb_cable_connected(void)$/;"	f	typeref:typename:int
g_dnl_board_usb_cable_connected	board/sunxi/board.c	/^int g_dnl_board_usb_cable_connected(void)$/;"	f	typeref:typename:int
g_dnl_board_usb_cable_connected	drivers/usb/gadget/g_dnl.c	/^__weak int g_dnl_board_usb_cable_connected(void)$/;"	f	typeref:typename:__weak int
g_dnl_clear_detach	drivers/usb/gadget/g_dnl.c	/^void g_dnl_clear_detach(void)$/;"	f	typeref:typename:void
g_dnl_composite_strings	drivers/usb/gadget/g_dnl.c	/^static struct usb_gadget_strings *g_dnl_composite_strings[] = {$/;"	v	typeref:struct:usb_gadget_strings * []	file:
g_dnl_config_register	drivers/usb/gadget/g_dnl.c	/^static int g_dnl_config_register(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:int	file:
g_dnl_detach	drivers/usb/gadget/g_dnl.c	/^bool g_dnl_detach(void)$/;"	f	typeref:typename:bool
g_dnl_detach_request	drivers/usb/gadget/g_dnl.c	/^static bool g_dnl_detach_request;$/;"	v	typeref:typename:bool	file:
g_dnl_do_config	drivers/usb/gadget/g_dnl.c	/^static int g_dnl_do_config(struct usb_configuration *c)$/;"	f	typeref:typename:int	file:
g_dnl_driver	drivers/usb/gadget/g_dnl.c	/^static struct usb_composite_driver g_dnl_driver = {$/;"	v	typeref:struct:usb_composite_driver	file:
g_dnl_get_bcd_device_number	drivers/usb/gadget/g_dnl.c	/^static int g_dnl_get_bcd_device_number(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:int	file:
g_dnl_get_board_bcd_device_number	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int g_dnl_get_board_bcd_device_number(int gcnum)$/;"	f	typeref:typename:int
g_dnl_get_board_bcd_device_number	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int g_dnl_get_board_bcd_device_number(int gcnum)$/;"	f	typeref:typename:int
g_dnl_get_board_bcd_device_number	board/siemens/common/factoryset.c	/^int g_dnl_get_board_bcd_device_number(int gcnum)$/;"	f	typeref:typename:int
g_dnl_get_board_bcd_device_number	drivers/usb/gadget/g_dnl.c	/^__weak int g_dnl_get_board_bcd_device_number(int gcnum)$/;"	f	typeref:typename:__weak int
g_dnl_register	drivers/usb/gadget/g_dnl.c	/^int g_dnl_register(const char *name)$/;"	f	typeref:typename:int
g_dnl_serial	drivers/usb/gadget/g_dnl.c	/^static char g_dnl_serial[MAX_STRING_SERIAL];$/;"	v	typeref:typename:char[]	file:
g_dnl_set_serialnumber	drivers/usb/gadget/g_dnl.c	/^void g_dnl_set_serialnumber(char *s)$/;"	f	typeref:typename:void
g_dnl_string_defs	drivers/usb/gadget/g_dnl.c	/^static struct usb_string g_dnl_string_defs[] = {$/;"	v	typeref:struct:usb_string[]	file:
g_dnl_string_tab	drivers/usb/gadget/g_dnl.c	/^static struct usb_gadget_strings g_dnl_string_tab = {$/;"	v	typeref:struct:usb_gadget_strings	file:
g_dnl_trigger_detach	drivers/usb/gadget/g_dnl.c	/^void g_dnl_trigger_detach(void)$/;"	f	typeref:typename:void
g_dnl_unbind	drivers/usb/gadget/g_dnl.c	/^static int g_dnl_unbind(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:int	file:
g_dnl_unregister	drivers/usb/gadget/g_dnl.c	/^void g_dnl_unregister(void)$/;"	f	typeref:typename:void
g_dp_in_use	drivers/video/mxc_ipuv3_fb.c	/^static unsigned char g_dp_in_use;$/;"	v	typeref:typename:unsigned char	file:
g_event_buffer	include/linux/usb/dwc3.h	/^struct g_event_buffer {$/;"	s
g_evnt_buf	include/linux/usb/dwc3.h	/^	struct g_event_buffer g_evnt_buf[32];$/;"	m	struct:dwc3	typeref:struct:g_event_buffer[32]
g_evntadrhi	include/linux/usb/dwc3.h	/^	u32 g_evntadrhi;$/;"	m	struct:g_event_buffer	typeref:typename:u32
g_evntadrlo	include/linux/usb/dwc3.h	/^	u32 g_evntadrlo;$/;"	m	struct:g_event_buffer	typeref:typename:u32
g_evntcount	include/linux/usb/dwc3.h	/^	u32 g_evntcount;$/;"	m	struct:g_event_buffer	typeref:typename:u32
g_evntsiz	include/linux/usb/dwc3.h	/^	u32 g_evntsiz;$/;"	m	struct:g_event_buffer	typeref:typename:u32
g_fladj	include/linux/usb/dwc3.h	/^	u32 g_fladj;$/;"	m	struct:dwc3	typeref:typename:u32
g_gpio	include/linux/usb/dwc3.h	/^	u32 g_gpio;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams0	include/linux/usb/dwc3.h	/^	u32 g_hwparams0;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams1	include/linux/usb/dwc3.h	/^	u32 g_hwparams1;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams2	include/linux/usb/dwc3.h	/^	u32 g_hwparams2;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams3	include/linux/usb/dwc3.h	/^	u32 g_hwparams3;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams4	include/linux/usb/dwc3.h	/^	u32 g_hwparams4;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams5	include/linux/usb/dwc3.h	/^	u32 g_hwparams5;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams6	include/linux/usb/dwc3.h	/^	u32 g_hwparams6;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams7	include/linux/usb/dwc3.h	/^	u32 g_hwparams7;$/;"	m	struct:dwc3	typeref:typename:u32
g_hwparams8	include/linux/usb/dwc3.h	/^	u32 g_hwparams8;$/;"	m	struct:dwc3	typeref:typename:u32
g_i2c_devs	drivers/i2c/kona_i2c.c	/^static struct bcm_kona_i2c_dev g_i2c_devs[CONFIG_SYS_MAX_I2C_BUS] = {$/;"	v	typeref:struct:bcm_kona_i2c_dev[]	file:
g_i2stx_pri	drivers/sound/sound-i2s.c	/^static struct i2stx_info g_i2stx_pri;$/;"	v	typeref:struct:i2stx_info	file:
g_iFrequency	drivers/fpga/ivm_core.c	/^static int g_iFrequency = 1000;$/;"	v	typeref:typename:int	file:
g_iHEAPSize	drivers/fpga/ivm_core.c	/^unsigned short g_iHEAPSize;$/;"	v	typeref:typename:unsigned short
g_iHeapCounter	drivers/fpga/ivm_core.c	/^unsigned short g_iHeapCounter;$/;"	v	typeref:typename:unsigned short
g_ipu_clk	drivers/video/ipu_common.c	/^struct clk *g_ipu_clk;$/;"	v	typeref:struct:clk *
g_ipu_clk_enabled	drivers/video/ipu_common.c	/^unsigned char g_ipu_clk_enabled;$/;"	v	typeref:typename:unsigned char
g_ldb_clk	drivers/video/ipu_common.c	/^struct clk *g_ldb_clk;$/;"	v	typeref:struct:clk *
g_max98095_i2c_dev_addr	drivers/sound/max98095.c	/^unsigned int g_max98095_i2c_dev_addr;$/;"	v	typeref:typename:unsigned int
g_max98095_info	drivers/sound/max98095.c	/^struct max98095_priv g_max98095_info;$/;"	v	typeref:struct:max98095_priv
g_odt_config	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_odt_config = 0x120012;$/;"	v	typeref:typename:u32
g_pLVDSList	drivers/fpga/ivm_core.c	/^LVDSPair *g_pLVDSList;$/;"	v	typeref:typename:LVDSPair *
g_parent_inode	fs/ext4/ext4_common.c	/^struct ext2_inode *g_parent_inode;$/;"	v	typeref:struct:ext2_inode *
g_pixel_clk	drivers/video/ipu_common.c	/^struct clk *g_pixel_clk[2];$/;"	v	typeref:struct:clk * [2]
g_prtbimap	include/linux/usb/dwc3.h	/^	u64 g_prtbimap;$/;"	m	struct:dwc3	typeref:typename:u64
g_prtbimap_fs	include/linux/usb/dwc3.h	/^	u64 g_prtbimap_fs;$/;"	m	struct:dwc3	typeref:typename:u64
g_prtbimap_hs	include/linux/usb/dwc3.h	/^	u64 g_prtbimap_hs;$/;"	m	struct:dwc3	typeref:typename:u64
g_pucHDRData	drivers/fpga/ivm_core.c	/^		*g_pucHDRData		= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucHIRData	drivers/fpga/ivm_core.c	/^		*g_pucHIRData		= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucHeapMemory	drivers/fpga/ivm_core.c	/^unsigned char *g_pucHeapMemory;$/;"	v	typeref:typename:unsigned char *
g_pucInData	drivers/fpga/ivm_core.c	/^		*g_pucInData		= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucIntelBuffer	drivers/fpga/ivm_core.c	/^		*g_pucIntelBuffer	= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucOutDMaskData	drivers/fpga/ivm_core.c	/^		*g_pucOutDMaskData	= NULL;$/;"	v	typeref:typename:unsigned char *
g_pucOutData	drivers/fpga/ivm_core.c	/^		*g_pucOutData		= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucOutMaskData	drivers/fpga/ivm_core.c	/^unsigned char	*g_pucOutMaskData	= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucTDRData	drivers/fpga/ivm_core.c	/^		*g_pucTDRData		= NULL,$/;"	v	typeref:typename:unsigned char *
g_pucTIRData	drivers/fpga/ivm_core.c	/^		*g_pucTIRData		= NULL,$/;"	v	typeref:typename:unsigned char *
g_rtt_nom	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_rtt_nom = 0x44;$/;"	v	typeref:typename:u32
g_rtt_nom_c_s0	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 g_rtt_nom_c_s0, g_rtt_nom_c_s1;$/;"	v	typeref:typename:u32
g_rtt_nom_c_s1	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 g_rtt_nom_c_s0, g_rtt_nom_c_s1;$/;"	v	typeref:typename:u32
g_rxfifosiz	include/linux/usb/dwc3.h	/^	u32 g_rxfifosiz[32];$/;"	m	struct:dwc3	typeref:typename:u32[32]
g_rxthrcfg	include/linux/usb/dwc3.h	/^	u32 g_rxthrcfg;$/;"	m	struct:dwc3	typeref:typename:u32
g_sbuscfg0	include/linux/usb/dwc3.h	/^	u32 g_sbuscfg0;$/;"	m	struct:dwc3	typeref:typename:u32
g_sbuscfg1	include/linux/usb/dwc3.h	/^	u32 g_sbuscfg1;$/;"	m	struct:dwc3	typeref:typename:u32
g_snpsid	include/linux/usb/dwc3.h	/^	u32 g_snpsid;$/;"	m	struct:dwc3	typeref:typename:u32
g_state	drivers/misc/cros_ec_sandbox.c	/^} s_state, *g_state;$/;"	v	typeref:struct:ec_state *
g_state	drivers/tpm/tpm_tis_sandbox.c	/^} g_state;$/;"	v	typeref:struct:tpm_state
g_sts	include/linux/usb/dwc3.h	/^	u32 g_sts;$/;"	m	struct:dwc3	typeref:typename:u32
g_szSupportedVersions	drivers/fpga/ivm_core.c	/^const char *const g_szSupportedVersions[] = {$/;"	v	typeref:typename:const char * const[]
g_turbo_state	arch/x86/cpu/turbo.c	/^static int g_turbo_state = TURBO_UNKNOWN;$/;"	v	typeref:typename:int	file:
g_txfifosiz	include/linux/usb/dwc3.h	/^	u32 g_txfifosiz[32];$/;"	m	struct:dwc3	typeref:typename:u32[32]
g_txthrcfg	include/linux/usb/dwc3.h	/^	u32 g_txthrcfg;$/;"	m	struct:dwc3	typeref:typename:u32
g_ucEndDR	drivers/fpga/ivm_core.c	/^unsigned char g_ucEndDR = DRPAUSE;$/;"	v	typeref:typename:unsigned char
g_ucEndIR	drivers/fpga/ivm_core.c	/^unsigned char g_ucEndIR = IRPAUSE;$/;"	v	typeref:typename:unsigned char
g_ucPinENABLE	include/lattice.h	/^#define g_ucPinENABLE	/;"	d
g_ucPinTCK	include/lattice.h	/^#define g_ucPinTCK	/;"	d
g_ucPinTDI	include/lattice.h	/^#define g_ucPinTDI	/;"	d
g_ucPinTMS	include/lattice.h	/^#define g_ucPinTMS	/;"	d
g_ucPinTRST	include/lattice.h	/^#define g_ucPinTRST	/;"	d
g_uctl	include/linux/usb/dwc3.h	/^	u32 g_uctl;$/;"	m	struct:dwc3	typeref:typename:u32
g_uiChecksumIndex	drivers/fpga/ivm_core.c	/^static unsigned int g_uiChecksumIndex;$/;"	v	typeref:typename:unsigned int	file:
g_uid	include/linux/usb/dwc3.h	/^	u32 g_uid;$/;"	m	struct:dwc3	typeref:typename:u32
g_usCalculatedCRC	drivers/fpga/ivm_core.c	/^unsigned short g_usCalculatedCRC;$/;"	v	typeref:typename:unsigned short
g_usChecksum	drivers/fpga/ivm_core.c	/^unsigned long g_usChecksum;$/;"	v	typeref:typename:unsigned long
g_usDMASKSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usDMASKSize;$/;"	v	typeref:typename:unsigned short	file:
g_usDataType	drivers/fpga/ivm_core.c	/^unsigned short g_usDataType;$/;"	v	typeref:typename:unsigned short
g_usFlowControl	drivers/fpga/ivm_core.c	/^static unsigned short g_usFlowControl;$/;"	v	typeref:typename:unsigned short	file:
g_usHDRSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usHDRSize;$/;"	v	typeref:typename:unsigned short	file:
g_usHIRSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usHIRSize;$/;"	v	typeref:typename:unsigned short	file:
g_usHeadDR	drivers/fpga/ivm_core.c	/^static unsigned short g_usHeadDR;$/;"	v	typeref:typename:unsigned short	file:
g_usHeadIR	drivers/fpga/ivm_core.c	/^static unsigned short g_usHeadIR;$/;"	v	typeref:typename:unsigned short	file:
g_usHeapSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usHeapSize;$/;"	v	typeref:typename:unsigned short	file:
g_usIntelBufferSize	drivers/fpga/ivm_core.c	/^unsigned short g_usIntelBufferSize;$/;"	v	typeref:typename:unsigned short
g_usIntelDataIndex	drivers/fpga/ivm_core.c	/^unsigned short g_usIntelDataIndex;$/;"	v	typeref:typename:unsigned short
g_usLCOUNTSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usLCOUNTSize;$/;"	v	typeref:typename:unsigned short	file:
g_usLVDSPairCount	drivers/fpga/ivm_core.c	/^unsigned short g_usLVDSPairCount;$/;"	v	typeref:typename:unsigned short
g_usMASKSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usMASKSize;$/;"	v	typeref:typename:unsigned short	file:
g_usMaxSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usMaxSize;$/;"	v	typeref:typename:unsigned short	file:
g_usRepeatLoops	drivers/fpga/ivm_core.c	/^static unsigned short g_usRepeatLoops;$/;"	v	typeref:typename:unsigned short	file:
g_usShiftValue	drivers/fpga/ivm_core.c	/^static unsigned short g_usShiftValue;$/;"	v	typeref:typename:unsigned short	file:
g_usTDISize	drivers/fpga/ivm_core.c	/^static unsigned short g_usTDISize;$/;"	v	typeref:typename:unsigned short	file:
g_usTDOSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usTDOSize;$/;"	v	typeref:typename:unsigned short	file:
g_usTDRSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usTDRSize;$/;"	v	typeref:typename:unsigned short	file:
g_usTIRSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usTIRSize;$/;"	v	typeref:typename:unsigned short	file:
g_usTailDR	drivers/fpga/ivm_core.c	/^static unsigned short g_usTailDR;$/;"	v	typeref:typename:unsigned short	file:
g_usTailIR	drivers/fpga/ivm_core.c	/^static unsigned short g_usTailIR;$/;"	v	typeref:typename:unsigned short	file:
g_usb2i2cctl	include/linux/usb/dwc3.h	/^	u32 g_usb2i2cctl[16];$/;"	m	struct:dwc3	typeref:typename:u32[16]
g_usb2phyacc	include/linux/usb/dwc3.h	/^	u32 g_usb2phyacc[16];$/;"	m	struct:dwc3	typeref:typename:u32[16]
g_usb2phycfg	include/linux/usb/dwc3.h	/^	u32 g_usb2phycfg[16];$/;"	m	struct:dwc3	typeref:typename:u32[16]
g_usb3pipectl	include/linux/usb/dwc3.h	/^	u32 g_usb3pipectl[16];$/;"	m	struct:dwc3	typeref:typename:u32[16]
g_usiDataSize	drivers/fpga/ivm_core.c	/^static unsigned short g_usiDataSize;$/;"	v	typeref:typename:unsigned short	file:
g_wm8994_i2c_dev_addr	drivers/sound/wm8994.c	/^static unsigned char g_wm8994_i2c_dev_addr;$/;"	v	typeref:typename:unsigned char	file:
g_wm8994_info	drivers/sound/wm8994.c	/^static struct wm8994_priv g_wm8994_info;$/;"	v	typeref:struct:wm8994_priv	file:
g_znodt_ctrl	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_znodt_ctrl = 45;		\/* controller data - N ODT *\/$/;"	v	typeref:typename:u32
g_znodt_data	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_znodt_data = 45;		\/* controller data - N ODT *\/$/;"	v	typeref:typename:u32
g_znri_ctrl	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_znri_ctrl = 74;		\/* controller C\/A - N drive strength *\/$/;"	v	typeref:typename:u32
g_znri_data	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_znri_data = 123;		\/* controller data - N drive strength *\/$/;"	v	typeref:typename:u32
g_zpodt_ctrl	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_zpodt_ctrl = 45;		\/* controller data - P ODT *\/$/;"	v	typeref:typename:u32
g_zpodt_data	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_zpodt_data = 45;		\/* controller data - P ODT *\/$/;"	v	typeref:typename:u32
g_zpri_ctrl	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_zpri_ctrl = 74;		\/* controller C\/A - P drive strength *\/$/;"	v	typeref:typename:u32
g_zpri_data	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 g_zpri_data = 123;		\/* controller data - P drive strength *\/$/;"	v	typeref:typename:u32
gaddr	include/fsl_dtsec.h	/^	u32	gaddr[8];	\/* group address *\/$/;"	m	struct:dtsec	typeref:typename:u32[8]
gaddr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr0;		\/* Global addr 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr0;		\/* 0x24880 - Global address register 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr0	include/tsec.h	/^	u32	gaddr0;		\/* Group Address Register 0 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr1	arch/powerpc/include/asm/immap_512x.h	/^	u32	gaddr1;		\/* Upper 32 bits of group hash table *\/$/;"	m	struct:fec512x	typeref:typename:u32
gaddr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr1;		\/* Global addr 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr1;		\/* 0x24884 - Global address register 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr1	drivers/net/fec_mxc.h	/^	uint32_t gaddr1;		\/* MBAR_ETH + 0x120 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
gaddr1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 gaddr1;			\/* MBAR_ETH + 0x120 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
gaddr1	include/tsec.h	/^	u32	gaddr1;		\/* Group Address Register 1 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr2	arch/powerpc/include/asm/immap_512x.h	/^	u32	gaddr2;		\/* Lower 32 bits of group hash table *\/$/;"	m	struct:fec512x	typeref:typename:u32
gaddr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr2;		\/* Global addr 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr2;		\/* 0x24888 - Global address register 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr2	drivers/net/fec_mxc.h	/^	uint32_t gaddr2;		\/* MBAR_ETH + 0x124 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
gaddr2	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 gaddr2;			\/* MBAR_ETH + 0x124 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
gaddr2	include/tsec.h	/^	u32	gaddr2;		\/* Group Address Register 2 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr3;		\/* Global addr 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr3;		\/* 0x2488c - Global address register 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr3	include/tsec.h	/^	u32	gaddr3;		\/* Group Address Register 3 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr4;		\/* Global addr 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr4;		\/* 0x24890 - Global address register 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr4	include/tsec.h	/^	u32	gaddr4;		\/* Group Address Register 4 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr5;		\/* Global addr 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr5;		\/* 0x24894 - Global address register 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr5	include/tsec.h	/^	u32	gaddr5;		\/* Group Address Register 5 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr6;		\/* Global addr 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr6;		\/* 0x24898 - Global address register 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr6	include/tsec.h	/^	u32	gaddr6;		\/* Group Address Register 6 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gaddr7;		\/* Global addr 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
gaddr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gaddr7;		\/* 0x2489c - Global address register 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
gaddr7	include/tsec.h	/^	u32	gaddr7;		\/* Group Address Register 7 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
gaddr_h	drivers/qe/uec.h	/^	u32  gaddr_h;        \/* group address filter, high      *\/$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:u32
gaddr_l	drivers/qe/uec.h	/^	u32  gaddr_l;        \/* group address filter, low       *\/$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:u32
gadget	drivers/usb/dwc3/core.h	/^	struct usb_gadget	gadget;$/;"	m	struct:dwc3	typeref:struct:usb_gadget
gadget	drivers/usb/gadget/at91_udc.h	/^	struct usb_gadget		gadget;$/;"	m	struct:at91_udc	typeref:struct:usb_gadget
gadget	drivers/usb/gadget/atmel_usba_udc.h	/^	struct usb_gadget gadget;$/;"	m	struct:usba_udc	typeref:struct:usb_gadget
gadget	drivers/usb/gadget/ci_udc.h	/^	struct usb_gadget		gadget;$/;"	m	struct:ci_drv	typeref:struct:usb_gadget
gadget	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct usb_gadget gadget;$/;"	m	struct:dwc2_udc	typeref:struct:usb_gadget
gadget	drivers/usb/gadget/ether.c	/^	struct usb_gadget	*gadget;$/;"	m	struct:eth_dev	typeref:struct:usb_gadget *	file:
gadget	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_gadget	*gadget;	\/* Copy of cdev->gadget *\/$/;"	m	struct:fsg_dev	typeref:struct:usb_gadget *	file:
gadget	drivers/usb/gadget/f_mass_storage.c	/^	struct usb_gadget	*gadget;$/;"	m	struct:fsg_common	typeref:struct:usb_gadget *	file:
gadget	drivers/usb/gadget/f_thor.h	/^	struct usb_gadget *gadget;$/;"	m	struct:thor_dev	typeref:struct:usb_gadget *
gadget	drivers/usb/gadget/fotg210.c	/^	struct usb_gadget         gadget;$/;"	m	struct:fotg210_chip	typeref:struct:usb_gadget	file:
gadget	drivers/usb/gadget/pxa25x_udc.h	/^	struct usb_gadget			gadget;$/;"	m	struct:pxa25x_udc	typeref:struct:usb_gadget
gadget	drivers/usb/gadget/udc/udc-core.c	/^	struct usb_gadget		*gadget;$/;"	m	struct:usb_udc	typeref:struct:usb_gadget *	file:
gadget	drivers/usb/musb-new/musb_uboot.c	/^static struct musb *gadget;$/;"	v	typeref:struct:musb *	file:
gadget	include/linux/usb/composite.h	/^	struct usb_gadget		*gadget;$/;"	m	struct:usb_composite_dev	typeref:struct:usb_gadget *
gadget_driver	drivers/usb/dwc3/core.h	/^	struct usb_gadget_driver *gadget_driver;$/;"	m	struct:dwc3	typeref:struct:usb_gadget_driver *
gadget_driver	drivers/usb/musb-new/musb_core.h	/^	struct usb_gadget_driver *gadget_driver;	\/* its driver *\/$/;"	m	struct:musb	typeref:struct:usb_gadget_driver *
gadget_for_each_ep	include/linux/usb/gadget.h	/^#define gadget_for_each_ep(/;"	d
gadget_is_amd5536udc	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_amd5536udc(/;"	d
gadget_is_at91	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_at91(/;"	d
gadget_is_atmel_usba	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_atmel_usba(/;"	d
gadget_is_ci	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_ci(/;"	d
gadget_is_dualspeed	include/linux/usb/gadget.h	/^static inline int gadget_is_dualspeed(struct usb_gadget *g)$/;"	f	typeref:typename:int
gadget_is_dummy	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_dummy(/;"	d
gadget_is_dwc3	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_dwc3(/;"	d
gadget_is_fotg210	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_fotg210(/;"	d
gadget_is_fsl_usb2	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_fsl_usb2(/;"	d
gadget_is_goku	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_goku(/;"	d
gadget_is_imx	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_imx(/;"	d
gadget_is_m66592	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_m66592(/;"	d
gadget_is_mpc8272	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_mpc8272(/;"	d
gadget_is_mq11xx	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_mq11xx(/;"	d
gadget_is_musbhdrc	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_musbhdrc(/;"	d
gadget_is_musbhsfc	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_musbhsfc(/;"	d
gadget_is_n9604	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_n9604(/;"	d
gadget_is_net2280	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_net2280(/;"	d
gadget_is_omap	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_omap(/;"	d
gadget_is_otg	include/linux/usb/gadget.h	/^static inline int gadget_is_otg(struct usb_gadget *g)$/;"	f	typeref:typename:int
gadget_is_pxa	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_pxa(/;"	d
gadget_is_pxa27x	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_pxa27x(/;"	d
gadget_is_s3c2410	drivers/usb/gadget/gadget_chips.h	/^#define gadget_is_s3c2410(/;"	d
gadget_is_sa1100	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_sa1100(/;"	d
gadget_is_sh	drivers/usb/gadget/gadget_chips.h	/^#define	gadget_is_sh(/;"	d
gadget_to_dwc	drivers/usb/dwc3/gadget.h	/^#define gadget_to_dwc(/;"	d
gadget_to_musb	drivers/usb/musb-new/musb_core.h	/^static inline struct musb *gadget_to_musb(struct usb_gadget *g)$/;"	f	typeref:struct:musb *
gahbcfg	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gahbcfg; \/* Core AHB Configuration *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gahbcfg	drivers/usb/host/dwc2.h	/^	u32			gahbcfg;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gain_u	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gain_u;				\/* 0x30 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
gain_v	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gain_v;				\/* 0x34 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
gain_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gain_y;				\/* 0x38 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
gaisler_ahb2ahb_v1_freq	arch/sparc/cpu/leon3/ambapp.c	/^unsigned int gaisler_ahb2ahb_v1_freq(ambapp_ahbdev *ahb, unsigned int freq)$/;"	f	typeref:typename:unsigned int
gaisler_ahb2ahb_v2_freq	arch/sparc/cpu/leon3/ambapp.c	/^unsigned int gaisler_ahb2ahb_v2_freq(ambapp_ahbdev *ahb, unsigned int freq)$/;"	f	typeref:typename:unsigned int
gaisler_ddr2spa1_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct ahbmctrl_setup gaisler_ddr2spa1_cfg = {$/;"	v	typeref:struct:ahbmctrl_setup
gaisler_ddr2spa2_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct ahbmctrl_setup gaisler_ddr2spa2_cfg = {$/;"	v	typeref:struct:ahbmctrl_setup
gaisler_ddrspa1_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct ahbmctrl_setup gaisler_ddrspa1_cfg = {$/;"	v	typeref:struct:ahbmctrl_setup
gaisler_ddrspa2_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct ahbmctrl_setup gaisler_ddrspa2_cfg = {$/;"	v	typeref:struct:ahbmctrl_setup
gaisler_ftmctrl1_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct mctrl_setup gaisler_ftmctrl1_cfg = {$/;"	v	typeref:struct:mctrl_setup
gaisler_ftmctrl2_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct mctrl_setup gaisler_ftmctrl2_cfg = {$/;"	v	typeref:struct:mctrl_setup
gaisler_sdctrl1_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct mctrl_setup gaisler_sdctrl1_cfg = {$/;"	v	typeref:struct:mctrl_setup
gaisler_sdctrl2_cfg	arch/sparc/cpu/leon3/memcfg.c	/^struct mctrl_setup gaisler_sdctrl2_cfg = {$/;"	v	typeref:struct:mctrl_setup
galois_field	drivers/mtd/nand/mxs_nand.c	/^static int galois_field = 13;$/;"	v	typeref:typename:int	file:
galr	arch/m68k/include/asm/fec.h	/^	u32 galr;		\/* 0x3CC *\/$/;"	m	struct:fec	typeref:typename:u32
galr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 galr;		\/* 0x124 *\/$/;"	m	struct:fecdma	typeref:typename:u32
gamma	drivers/video/fsl_diu_fb.c	/^	__be32 gamma;$/;"	m	struct:diu	typeref:typename:__be32	file:
gamma	include/edid.h	/^	unsigned char gamma;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
gamma	include/linux/fb.h	/^	__u16 gamma;			\/* Gamma - in fractions of 100 *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
gamma_c_async	drivers/video/ipu_regs.h	/^	u32 gamma_c_async[8];$/;"	m	struct:ipu_com_async	typeref:typename:u32[8]
gamma_c_sync	drivers/video/ipu_regs.h	/^	u32 gamma_c_sync[8];$/;"	m	struct:ipu_dp	typeref:typename:u32[8]
gamma_s_async	drivers/video/ipu_regs.h	/^	u32 gamma_s_async[4];$/;"	m	struct:ipu_com_async	typeref:typename:u32[4]
gamma_s_sync	drivers/video/ipu_regs.h	/^	u32 gamma_s_sync[4];$/;"	m	struct:ipu_dp	typeref:typename:u32[4]
gap	cmd/fdc.c	/^	unsigned char	gap;	\/* gap1 size *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned char	file:
gap0	drivers/video/am335x-fb.c	/^	unsigned int		gap0;			\/* 0x08 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
gap1	drivers/video/am335x-fb.c	/^	unsigned int		gap1;			\/* 0x68 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
gap_lebs	fs/ubifs/ubifs.h	/^	int *gap_lebs;$/;"	m	struct:ubifs_info	typeref:typename:int *
gap_thresh	drivers/net/cpsw.c	/^	u32	gap_thresh;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
gas_timr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	gas_timr;	\/* 0xe20 - PCI Gasket Timer Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
gas_timr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gas_timr;	\/* PCIX Gasket Timer *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
gate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_gate gate;$/;"	m	struct:bus_clk_data	typeref:struct:bcm_clk_gate
gate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_gate gate;$/;"	m	struct:core_clk_data	typeref:struct:bcm_clk_gate
gate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_gate gate;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_gate
gate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_gate gate;$/;"	m	struct:bus_clk_data	typeref:struct:bcm_clk_gate
gate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_gate gate;$/;"	m	struct:core_clk_data	typeref:struct:bcm_clk_gate
gate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_gate gate;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_gate
gate	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u8	gate[64];	\/* Gate *\/$/;"	m	struct:rdc_sema_regs	typeref:typename:u8[64]
gate	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u8	gate[64];	\/* Gate *\/$/;"	m	struct:rdc_sema_regs	typeref:typename:u8[64]
gate	drivers/clk/uniphier/clk-uniphier.h	/^	const struct uniphier_clk_gate_data *gate;$/;"	m	struct:uniphier_clk_data	typeref:typename:const struct uniphier_clk_gate_data *
gate_bits	drivers/usb/host/ehci-mxs.c	/^	uint32_t		gate_bits;$/;"	m	struct:ehci_mxs_port	typeref:typename:uint32_t	file:
gate_block	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_block;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_block	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_block;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_block	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_block;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_bus_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_cdrex;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_cdrex1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_cdrex1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_cperi0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_cperi0;	\/* 0x10014700 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_cperi1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_cperi1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_cpu;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_cpu_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_cpu_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_disp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_disp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_dmc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_dmc0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_bus_dmc1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_dmc1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_bus_fsys0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_fsys0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_fsys1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_fsys1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_fsys2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_fsys2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_g2d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_g2d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_g3d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_gen;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_gscl0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_gscl0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_gscl1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_gscl1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_isp0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_isp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_isp2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_isp2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_isp3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_isp3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_mfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_mscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_mscl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_noc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_noc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_peric	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_peric;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_peric1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_peris0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_peris0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_peris1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_peris1;	\/* 0x10020764 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_top;		\/* 0x10020700 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_bus_wcore	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_bus_wcore;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 gate_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
gate_cfg	arch/arm/include/asm/arch/display2.h	/^	u32 gate_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
gate_d00	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_d00;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
gate_d00	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_d00;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
gate_d01	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_d01;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
gate_d01	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_d01;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
gate_d02	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_d02;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
gate_d02	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_d02;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
gate_exists	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_exists(/;"	d
gate_exists	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_exists(/;"	d
gate_flip_enabled	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_flip_enabled(/;"	d
gate_flip_enabled	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_flip_enabled(/;"	d
gate_ip_acp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_acp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_block	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_block;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_cam;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_cam;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_cdrex;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_cdrex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_core	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_core;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_cperi	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_cperi;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_disp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_disp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_disp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_disp1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_dmc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_dmc0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_dmc0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_dmc1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_dmc1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_fsys;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_fsys;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_fsys;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_fsys;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_g2d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_g2d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_g3d;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_g3d;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_g3d;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_g3d;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gen;		\/* 0x10020934 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gen;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_gps	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gps;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_gps	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gps;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_gscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gscl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_gscl0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gscl0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_gscl1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_gscl1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_image	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_image;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_image	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_image;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_isp0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_isp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_isp1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_lcd	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_lcd;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_lcd0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_lcd0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_lcd1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_lcd1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_leftbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_leftbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_lex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_lex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_mfc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_mfc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_mfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_mfc;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_mscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_mscl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_peric	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_peric;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_peric	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_peric;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_peril	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_peril;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_peril	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_peril;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_perir	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_perir;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_perir	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_perir;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_peris	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_peris;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_ip_peris	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_peris;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_r0x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_r0x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_r1x	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_r1x;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_rightbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_rightbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_ip_syslft	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_syslft;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_sysrgt	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_sysrgt;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_ip_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_tv;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
gate_ip_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_ip_tv;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
gate_is_enabled	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_is_enabled(/;"	d
gate_is_enabled	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_is_enabled(/;"	d
gate_is_hw_controllable	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_is_hw_controllable(/;"	d
gate_is_hw_controllable	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_is_hw_controllable(/;"	d
gate_is_no_disable	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_is_no_disable(/;"	d
gate_is_no_disable	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_is_no_disable(/;"	d
gate_is_sw_controllable	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_is_sw_controllable(/;"	d
gate_is_sw_controllable	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_is_sw_controllable(/;"	d
gate_is_sw_managed	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define gate_is_sw_managed(/;"	d
gate_is_sw_managed	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define gate_is_sw_managed(/;"	d
gate_leveling_enable	arch/arm/mach-exynos/clock_init.h	/^	uint8_t gate_leveling_enable;	\/* check gate leveling is enabled *\/$/;"	m	struct:mem_timings	typeref:typename:uint8_t
gate_sclk0	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_sclk0;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
gate_sclk0	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_sclk0;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
gate_sclk1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_sclk1;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
gate_sclk1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	gate_sclk1;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
gate_sclk_cperi	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_sclk_cperi;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_sclk_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_sclk_cpu;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_sclk_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_sclk_cpu;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_sclk_cpu_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_sclk_cpu_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_sclk_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_sclk_isp;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_sclk_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_sclk_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_top_sclk_cperi	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_cperi;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_disp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_disp1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_disp1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_disp1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_top_sclk_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_fsys;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_fsys;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_top_sclk_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_gen;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_top_sclk_gscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_gscl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_isp;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_top_sclk_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_mau;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_mau;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gate_top_sclk_peric	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_peric;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
gate_top_sclk_peric	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gate_top_sclk_peric;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gateclk	arch/arm/dts/armada-375.dtsi	/^			gateclk: clock-gating-control@18220 {$/;"	l
gateclk	arch/arm/dts/armada-38x.dtsi	/^			gateclk: clock-gating-control@18220 {$/;"	l
gateclk	arch/arm/dts/armada-xp.dtsi	/^			gateclk: clock-gating-control@18220 {$/;"	l
gateway	include/net.h	/^		u32	gateway;$/;"	m	union:icmp_hdr::__anona5cac555010a	typeref:typename:u32
gaur	arch/m68k/include/asm/fec.h	/^	u32 gaur;		\/* 0x3C8 *\/$/;"	m	struct:fec	typeref:typename:u32
gaur	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 gaur;		\/* 0x120 *\/$/;"	m	struct:fecdma	typeref:typename:u32
gb	drivers/net/greth.c	/^	int gb;			\/* GigaBit *\/$/;"	m	struct:__anonb53b88540108	typeref:typename:int	file:
gbal	include/tsi148.h	/^	unsigned int gbal;                    \/* 0x404         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
gbau	include/tsi148.h	/^	unsigned int gbau;                    \/* 0x400         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
gbe0	arch/arm/dts/k2e-netcp.dtsi	/^				gbe0: interface-0 {$/;"	l	label:netcp
gbe0	arch/arm/dts/k2g-netcp.dtsi	/^				gbe0: interface-0 {$/;"	l	label:netcp
gbe0	arch/arm/dts/k2hk-netcp.dtsi	/^				gbe0: interface-0 {$/;"	l	label:netcp
gbe0	arch/arm/dts/k2l-netcp.dtsi	/^				gbe0: interface-0 {$/;"	l	label:netcp
gbe1	arch/arm/dts/k2e-netcp.dtsi	/^				gbe1: interface-1 {$/;"	l	label:netcp
gbe1	arch/arm/dts/k2hk-netcp.dtsi	/^				gbe1: interface-1 {$/;"	l	label:netcp
gbe1	arch/arm/dts/k2l-netcp.dtsi	/^				gbe1: interface-1 {$/;"	l	label:netcp
gbe_enable	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int gbe_enable;$/;"	m	struct:pei_data	typeref:typename:int
gbe_subsys	arch/arm/dts/k2g-netcp.dtsi	/^gbe_subsys: subsys@4200000 {$/;"	l
gbec_status	drivers/net/pch_gbe.h	/^	u16 gbec_status;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u16
gbec_status	drivers/net/pch_gbe.h	/^	u16 gbec_status;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u16
gbecont	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	gbecont;$/;"	m	struct:gether_control_regs	typeref:typename:unsigned int
gbecont	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	gbecont;$/;"	m	struct:gether_control_regs	typeref:typename:unsigned int
gbecont	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	gbecont;$/;"	m	struct:gether_control_regs	typeref:typename:unsigned int
gbit_config_aneg	drivers/qe/uec_phy.c	/^static int gbit_config_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
gbit_mac	drivers/net/greth.c	/^	int gbit_mac;$/;"	m	struct:__anonb53b88540108	typeref:typename:int	file:
gbl	drivers/ddr/altera/sequencer.c	/^static struct gbl_type *gbl;$/;"	v	typeref:struct:gbl_type *	file:
gbl_info	drivers/power/exynos-tmu.c	/^static struct tmu_info gbl_info;$/;"	v	typeref:struct:tmu_info	file:
gbl_type	drivers/ddr/altera/sequencer.h	/^struct gbl_type {$/;"	s
gbr	arch/sh/include/asm/ptrace.h	/^	unsigned long gbr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
gc_block	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_block;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_block_finder	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_block_finder;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_chunk	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_chunk;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_cleanup_list	fs/yaffs2/yaffs_guts.h	/^	u32 *gc_cleanup_list;	\/* objects to delete at the end of a GC. *\/$/;"	m	struct:yaffs_dev	typeref:typename:u32 *
gc_control	fs/yaffs2/yaffs_guts.h	/^	unsigned (*gc_control) (struct yaffs_dev *dev);$/;"	m	struct:yaffs_param	typeref:typename:unsigned (*)(struct yaffs_dev * dev)
gc_dirtiest	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_dirtiest;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_disable	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_disable;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_lnum	fs/ubifs/ubifs-media.h	/^	__le32 gc_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
gc_lnum	fs/ubifs/ubifs.h	/^	int gc_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
gc_not_done	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_not_done;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_pages_in_use	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_pages_in_use;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_prioritise	fs/yaffs2/yaffs_guts.h	/^	u32 gc_prioritise:1;	\/* An ECC check or blank check has failed.$/;"	m	struct:yaffs_block_info	typeref:typename:u32:1
gc_seq	fs/ubifs/ubifs.h	/^	int gc_seq;$/;"	m	struct:bu_info	typeref:typename:int
gc_seq	fs/ubifs/ubifs.h	/^	int gc_seq;$/;"	m	struct:ubifs_info	typeref:typename:int
gc_skip	fs/yaffs2/yaffs_guts.h	/^	unsigned gc_skip;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
gc_sum_tags	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_summary_tags *gc_sum_tags;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_summary_tags *
gc_sync_wbufs	fs/ubifs/gc.c	/^static int gc_sync_wbufs(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
gcclibdir	arch/sparc/config.mk	/^gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)$/;"	m
gccrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 gccrc;		\/* 0x0CC *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
gcd	arch/arm/cpu/armv7/mx5/clock.c	/^static int gcd(int m, int n)$/;"	f	typeref:typename:int	file:
gcdr	drivers/gpio/mvgpio.h	/^	u32 gcdr;	\/* Bitwise Clear of GPIO Direction Register - 0x0060 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gced_lnum	fs/ubifs/ubifs.h	/^	int gced_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
gcfer	drivers/gpio/mvgpio.h	/^	u32 gcfer;	\/* Bitwise Clear of Falling-Edge Detect Enable$/;"	m	struct:gpio_reg	typeref:typename:u32
gcleanup	common/dlmalloc.c	/^void gcleanup ()$/;"	f	typeref:typename:void
gclk_enable_output	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline void gclk_enable_output(unsigned int id,$/;"	f	typeref:typename:void
gclk_parent	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^enum gclk_parent {$/;"	g
gclk_set_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long gclk_set_rate(unsigned int id,$/;"	f	typeref:typename:unsigned long
gconf-objs	scripts/kconfig/Makefile	/^gconf-objs	:= gconf.o zconf.tab.o$/;"	m
gconfig	scripts/kconfig/Makefile	/^gconfig: $(obj)\/gconf$/;"	t
gcr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 gcr;$/;"	m	struct:dma4	typeref:typename:u32
gcr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gcr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
gcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 gcr;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32
gcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 gcr[4];          \/* DATX8 general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[4]
gcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 gcr;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32
gcr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 gcr[4];          \/* DATX8 general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[4]
gcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 gcr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
gcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 gcr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
gcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gcr;		\/* Global Configuration *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gcr;		\/* 0x41020 - Global Configuration Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gcr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	gcr0;	\/* 0x800 General Control Register 0 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
gcr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	gcr0;	\/* 0x800 General Control Register 0 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
gcr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	gcr0;	\/* 0x800 General Control Register 0 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
gcr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	gcr0;	\/* General Control Register 0 *\/$/;"	m	struct:serdes_corenet::serdes_lane	typeref:typename:u32
gcr0	drivers/spi/davinci_spi.c	/^	dv_reg	gcr0;		\/* 0x00 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
gcr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	gcr1;	\/* 0x804 General Control Register 1 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
gcr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	gcr1;	\/* 0x804 General Control Register 1 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
gcr1	arch/powerpc/include/asm/immap_85xx.h	/^		u32	gcr1;	\/* 0x804 General Control Register 1 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
gcr1	arch/powerpc/include/asm/immap_85xx.h	/^		u32	gcr1;	\/* General Control Register 1 *\/$/;"	m	struct:serdes_corenet::serdes_lane	typeref:typename:u32
gcr1	drivers/spi/davinci_spi.c	/^	dv_reg	gcr1;		\/* 0x04 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
gcr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	gcr2;	\/* 0x808 General Control Register 2 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
gcr2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	gcr2;	\/* 0x808 General Control Register 2 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
gcr2	arch/powerpc/include/asm/immap_85xx.h	/^		u32	gcr2;	\/* 0x808 General Control Register 2 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
gcrer	drivers/gpio/mvgpio.h	/^	u32 gcrer;	\/* Bitwise Clear of Rising-Edge Detect Enable$/;"	m	struct:gpio_reg	typeref:typename:u32
gcsrat	include/tsi148.h	/^	unsigned int gcsrat;                  \/* 0x408         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
gctl	arch/blackfin/include/asm/serial1.h	/^	u16 gctl;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
gctl	drivers/usb/dwc3/core.h	/^	u32			gctl;$/;"	m	struct:dwc3	typeref:typename:u32
gctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 gctrl;			\/* 0x000 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
gctrl	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 gctrl;		\/* 0x00 global control *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
gctrl	arch/arm/include/asm/arch/display.h	/^	u32 gctrl;			\/* 0x000 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
gctrl	arch/arm/include/asm/arch/mmc.h	/^	u32 gctrl;		\/* 0x00 global control *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
gctrl_ga_revid	include/tsi148.h	/^	unsigned int gctrl_ga_revid;          \/* 0x604         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
gctrl_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct gctrl_regs {$/;"	s
gd	arch/arm/include/asm/global_data.h	/^#define gd	/;"	d
gd	arch/x86/include/asm/global_data.h	/^#define gd	/;"	d
gd	arch/x86/include/asm/global_data.h	/^#define gd /;"	d
gd	arch/xtensa/cpu/cpu.c	/^gd_t *gd __attribute__((section(".data")));$/;"	v	typeref:typename:gd_t *
gd	board/sandbox/sandbox.c	/^gd_t *gd;$/;"	v	typeref:typename:gd_t *
gd405ep_get_fpga_done	board/gdsys/405ep/dlvision-10g.c	/^int gd405ep_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
gd405ep_get_fpga_done	board/gdsys/405ep/io.c	/^int gd405ep_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
gd405ep_get_fpga_done	board/gdsys/405ep/iocon.c	/^int gd405ep_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
gd405ep_get_fpga_done	board/gdsys/405ep/neo.c	/^int gd405ep_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
gd405ep_init	board/gdsys/405ep/dlvision-10g.c	/^void gd405ep_init(void)$/;"	f	typeref:typename:void
gd405ep_init	board/gdsys/405ep/io.c	/^void gd405ep_init(void)$/;"	f	typeref:typename:void
gd405ep_init	board/gdsys/405ep/iocon.c	/^void gd405ep_init(void)$/;"	f	typeref:typename:void
gd405ep_init	board/gdsys/405ep/neo.c	/^void gd405ep_init(void)$/;"	f	typeref:typename:void
gd405ep_set_fpga_reset	board/gdsys/405ep/dlvision-10g.c	/^void gd405ep_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
gd405ep_set_fpga_reset	board/gdsys/405ep/io.c	/^void gd405ep_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
gd405ep_set_fpga_reset	board/gdsys/405ep/iocon.c	/^void gd405ep_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
gd405ep_set_fpga_reset	board/gdsys/405ep/neo.c	/^void gd405ep_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
gd405ep_setup_hw	board/gdsys/405ep/dlvision-10g.c	/^void gd405ep_setup_hw(void)$/;"	f	typeref:typename:void
gd405ep_setup_hw	board/gdsys/405ep/io.c	/^void gd405ep_setup_hw(void)$/;"	f	typeref:typename:void
gd405ep_setup_hw	board/gdsys/405ep/iocon.c	/^void gd405ep_setup_hw(void)$/;"	f	typeref:typename:void
gd405ep_setup_hw	board/gdsys/405ep/neo.c	/^void gd405ep_setup_hw(void)$/;"	f	typeref:typename:void
gd405ex_get_fpga_done	board/gdsys/405ex/io64.c	/^int gd405ex_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
gd405ex_init	board/gdsys/405ex/io64.c	/^void gd405ex_init(void)$/;"	f	typeref:typename:void
gd405ex_set_fpga_reset	board/gdsys/405ex/io64.c	/^void gd405ex_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
gd405ex_setup_hw	board/gdsys/405ex/io64.c	/^void gd405ex_setup_hw(void)$/;"	f	typeref:typename:void
gd_addr	arch/x86/include/asm/global_data.h	/^	struct global_data *gd_addr;	\/* Location of Global Data *\/$/;"	m	struct:arch_global_data	typeref:struct:global_data *
gd_fdt_blob	include/image.h	/^# define gd_fdt_blob(/;"	d
gd_index	fs/ext4/ext4_journal.c	/^int gd_index;$/;"	v	typeref:typename:int
gd_last_cmd	tools/imximage.c	/^static struct dcd_v2_cmd *gd_last_cmd;$/;"	v	typeref:struct:dcd_v2_cmd *	file:
gd_t	include/asm-generic/global_data.h	/^} gd_t;$/;"	t	typeref:struct:global_data
gdata	arch/arm/lib/spl.c	/^gd_t gdata __attribute__ ((section(".data")));$/;"	v	typeref:typename:gd_t
gdb_flush	tools/gdb/remote.c	/^#define gdb_flush /;"	d	file:
gdb_stdlog	tools/gdb/remote.c	/^#define gdb_stdlog /;"	d	file:
gdbcont-objs	tools/gdb/Makefile	/^gdbcont-objs := gdbcont.o error.o remote.o serial.o$/;"	m
gdbsend-objs	tools/gdb/Makefile	/^gdbsend-objs := gdbsend.o error.o remote.o serial.o$/;"	m
gdc	board/freescale/common/qixis.h	/^	u8 gdc;$/;"	m	struct:qixis	typeref:typename:u8
gdc_mem_test	post/board/lwmon5/gdc.c	/^int gdc_mem_test(ulong *start, ulong size)$/;"	f	typeref:typename:int
gdc_post_addrline	post/board/lwmon5/gdc.c	/^static int gdc_post_addrline(ulong *address, ulong *base, ulong size)$/;"	f	typeref:typename:int	file:
gdc_post_dataline	post/board/lwmon5/gdc.c	/^static int gdc_post_dataline(ulong *address)$/;"	f	typeref:typename:int	file:
gdc_post_test	post/board/lwmon5/gdc.c	/^int gdc_post_test(int flags)$/;"	f	typeref:typename:int
gdc_post_test1	post/board/lwmon5/gdc.c	/^static int gdc_post_test1(ulong *start, ulong size, ulong val)$/;"	f	typeref:typename:int	file:
gdc_post_test2	post/board/lwmon5/gdc.c	/^static int gdc_post_test2(ulong *start, ulong size)$/;"	f	typeref:typename:int	file:
gdc_post_test3	post/board/lwmon5/gdc.c	/^static int gdc_post_test3(ulong *start, ulong size)$/;"	f	typeref:typename:int	file:
gdc_post_test4	post/board/lwmon5/gdc.c	/^static int gdc_post_test4(ulong *start, ulong size)$/;"	f	typeref:typename:int	file:
gdc_regs	include/mb862xx.h	/^} gdc_regs;$/;"	t	typeref:struct:__anon38db270d0108
gdc_sw_reset	drivers/video/mb862xx.c	/^static void gdc_sw_reset (void)$/;"	f	typeref:typename:void	file:
gdc_test_reg_one	post/board/lwmon5/gdc.c	/^static int gdc_test_reg_one(uint value)$/;"	f	typeref:typename:int	file:
gdd	board/freescale/common/qixis.h	/^	u8 gdd;         \/* DCM Debug Data Register,0x17 *\/$/;"	m	struct:qixis	typeref:typename:u8
gdev	board/nokia/rx51/rx51.c	/^GraphicDevice gdev;$/;"	v	typeref:typename:GraphicDevice
gdfBytesPP	include/video_fb.h	/^    unsigned int gdfBytesPP;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
gdfIndex	include/video_fb.h	/^    unsigned int gdfIndex;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
gdisp	drivers/video/mxc_ipuv3_fb.c	/^static uint8_t gdisp;$/;"	v	typeref:typename:uint8_t	file:
gdllcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 gdllcr;		\/* 0x20 global dll control register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
gdllcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 gdllcr;		\/* 0x20 global dll control register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
gdllcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	gdllcr;		\/* Global DLL Control *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
gdsize	include/ext4fs.h	/^	uint16_t gdsize;$/;"	m	struct:ext_filesystem	typeref:typename:uint16_t
gdt	arch/x86/cpu/call64.S	/^gdt:$/;"	l
gdt	arch/x86/include/asm/global_data.h	/^	u64 gdt[X86_GDT_NUM_ENTRIES] __aligned(16);$/;"	m	struct:arch_global_data	typeref:typename:u64[X86_GDT_NUM_ENTRIES]__aligned (16)
gdt	arch/x86/include/asm/sipi.h	/^	u32 gdt;$/;"	m	struct:sipi_params_16bit	typeref:typename:u32
gdt_end	arch/x86/cpu/call64.S	/^gdt_end:$/;"	l
gdt_limit	arch/x86/include/asm/sipi.h	/^	u16 gdt_limit;$/;"	m	struct:sipi_params_16bit	typeref:typename:u16
gdt_ptr	arch/x86/cpu/cpu.c	/^struct gdt_ptr {$/;"	s	file:
gdt_ptr	arch/x86/cpu/start16.S	/^gdt_ptr:$/;"	l
gdt_ptr2	arch/x86/cpu/start.S	/^gdt_ptr2:$/;"	l
gdt_rom	arch/x86/cpu/start16.S	/^gdt_rom:$/;"	l
gdt_rom2	arch/x86/cpu/start.S	/^gdt_rom2:$/;"	l
gdtable	include/ext4fs.h	/^	char *gdtable;$/;"	m	struct:ext_filesystem	typeref:typename:char *
gdtable_blkno	include/ext4fs.h	/^	uint32_t gdtable_blkno;$/;"	m	struct:ext_filesystem	typeref:typename:uint32_t
gdtaddr	arch/x86/cpu/sipi_vector.S	/^gdtaddr:$/;"	l
ge0_gmii_pins	arch/arm/dts/armada-xp.dtsi	/^	ge0_gmii_pins: ge0-gmii-pins {$/;"	l
ge0_rgmii_pins	arch/arm/dts/armada-38x.dtsi	/^				ge0_rgmii_pins: ge-rgmii-pins-0 {$/;"	l	label:pinctrl
ge0_rgmii_pins	arch/arm/dts/armada-xp.dtsi	/^	ge0_rgmii_pins: ge0-rgmii-pins {$/;"	l
ge1_rgmii_pins	arch/arm/dts/armada-38x.dtsi	/^				ge1_rgmii_pins: ge-rgmii-pins-1 {$/;"	l	label:pinctrl
ge1_rgmii_pins	arch/arm/dts/armada-xp.dtsi	/^	ge1_rgmii_pins: ge1-rgmii-pins {$/;"	l
gedr	drivers/gpio/mvgpio.h	/^	u32 gedr;	\/* Edge Detect Status Register - 0x0048 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gem0	arch/arm/dts/zynq-7000.dtsi	/^		gem0: ethernet@e000b000 {$/;"	l	label:amba
gem0	arch/arm/dts/zynqmp.dtsi	/^		gem0: ethernet@ff0b0000 {$/;"	l
gem0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	usb0_aper_clk, usb1_aper_clk, gem0_aper_clk, gem1_aper_clk,$/;"	e	enum:zynq_clk
gem0_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	lqspi_clk, smc_clk, pcap_clk, gem0_clk, gem1_clk,$/;"	e	enum:zynq_clk
gem0_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 gem0_clk_ctrl; \/* 0x140 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
gem0_rclk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 gem0_rclk_ctrl; \/* 0x138 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
gem1	arch/arm/dts/zynq-7000.dtsi	/^		gem1: ethernet@e000c000 {$/;"	l	label:amba
gem1	arch/arm/dts/zynqmp.dtsi	/^		gem1: ethernet@ff0c0000 {$/;"	l
gem1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	usb0_aper_clk, usb1_aper_clk, gem0_aper_clk, gem1_aper_clk,$/;"	e	enum:zynq_clk
gem1_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	lqspi_clk, smc_clk, pcap_clk, gem0_clk, gem1_clk,$/;"	e	enum:zynq_clk
gem1_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 gem1_clk_ctrl; \/* 0x144 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
gem1_rclk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 gem1_rclk_ctrl; \/* 0x13c *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
gem2	arch/arm/dts/zynqmp.dtsi	/^		gem2: ethernet@ff0d0000 {$/;"	l
gem3	arch/arm/dts/zynqmp.dtsi	/^		gem3: ethernet@ff0e0000 {$/;"	l
gem_is_gigabit_capable	drivers/net/macb.c	/^static int gem_is_gigabit_capable(struct macb_device *macb)$/;"	f	typeref:typename:int	file:
gem_mdc_clk_div	drivers/net/macb.c	/^static u32 gem_mdc_clk_div(int id, struct macb_device *macb)$/;"	f	typeref:typename:u32	file:
gem_readl	drivers/net/macb.h	/^#define gem_readl(/;"	d
gem_writel	drivers/net/macb.h	/^#define gem_writel(/;"	d
gem_writel_queue_TBQP	drivers/net/macb.h	/^#define gem_writel_queue_TBQP(/;"	d
gemtraceclk	arch/arm/dts/keystone-clocks.dtsi	/^	gemtraceclk: gemtraceclk@2310120 {$/;"	l
gen	drivers/bios_emulator/include/x86emu/regs.h	/^	struct i386_general_regs gen;$/;"	m	struct:__anon39451e6d0808	typeref:struct:i386_general_regs
gen	drivers/net/fm/fm.h	/^	u16 gen;$/;"	m	struct:fm_port_qd	typeref:typename:u16
gen	drivers/video/ipu_regs.h	/^	u32 gen;$/;"	m	struct:ipu_dc	typeref:typename:u32
gen10g_config	drivers/net/phy/generic_10g.c	/^int gen10g_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
gen10g_discover_mmds	drivers/net/phy/generic_10g.c	/^int gen10g_discover_mmds(struct phy_device *phydev)$/;"	f	typeref:typename:int
gen10g_driver	drivers/net/phy/generic_10g.c	/^struct phy_driver gen10g_driver = {$/;"	v	typeref:struct:phy_driver
gen10g_shutdown	drivers/net/phy/generic_10g.c	/^int gen10g_shutdown(struct phy_device *phydev)$/;"	f	typeref:typename:int
gen10g_startup	drivers/net/phy/generic_10g.c	/^int gen10g_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int
gen1_i2c	arch/arm/dts/tegra186.dtsi	/^	gen1_i2c: i2c@3160000 {$/;"	l
gen2_i2c	arch/arm/dts/tegra186.dtsi	/^	gen2_i2c: i2c@c240000 {$/;"	l
gen7_i2c	arch/arm/dts/tegra186.dtsi	/^	gen7_i2c: i2c@31c0000 {$/;"	l
gen8_i2c	arch/arm/dts/tegra186.dtsi	/^	gen8_i2c: i2c@c250000 {$/;"	l
gen9_i2c	arch/arm/dts/tegra186.dtsi	/^	gen9_i2c: i2c@31e0000 {$/;"	l
gen_74x164_direction_input	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
gen_74x164_direction_output	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
gen_74x164_get_function	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
gen_74x164_get_value	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
gen_74x164_ids	drivers/gpio/74x164_gpio.c	/^static const struct udevice_id gen_74x164_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
gen_74x164_ops	drivers/gpio/74x164_gpio.c	/^static const struct dm_gpio_ops gen_74x164_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gen_74x164_priv	drivers/gpio/74x164_gpio.c	/^struct gen_74x164_priv {$/;"	s	file:
gen_74x164_probe	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gen_74x164_set_value	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
gen_74x164_write_conf	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_write_conf(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gen_74x164_xlate	drivers/gpio/74x164_gpio.c	/^static int gen_74x164_xlate(struct udevice *dev, struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
gen_auto_negotiate	drivers/net/davinci_emac.c	/^static int gen_auto_negotiate(int phy_addr)$/;"	f	typeref:typename:int	file:
gen_bitlen	lib/zlib/trees.c	/^local void gen_bitlen(s, desc)$/;"	f
gen_boards_cfg	tools/genboardscfg.py	/^def gen_boards_cfg(output, jobs=1, force=False):$/;"	f
gen_check_sum	tools/mksunxiboot.c	/^int gen_check_sum(struct boot_file_head *head_p)$/;"	f	typeref:typename:int
gen_codes	lib/zlib/trees.c	/^local void gen_codes (tree, max_code, bl_count)$/;"	f
gen_ctrl	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gen_ctrl;				\/* 0xB8 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
gen_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 gen_ctrl;		\/* 0x184 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
gen_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 gen_ctrl;		\/* 0x184 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
gen_get_link_speed	drivers/net/davinci_emac.c	/^static int gen_get_link_speed(int phy_addr)$/;"	f	typeref:typename:int	file:
gen_incr_syncpt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint gen_incr_syncpt;		\/* _CMD_GENERAL_INCR_SYNCPT_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
gen_incr_syncpt_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint gen_incr_syncpt_ctrl;	\/* _CMD_GENERAL_INCR_SYNCPT_CNTRL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
gen_incr_syncpt_err	arch/arm/include/asm/arch-tegra/dc.h	/^	uint gen_incr_syncpt_err;	\/* _CMD_GENERAL_INCR_SYNCPT_ERROR_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
gen_info	tools/bmp_logo.c	/^void gen_info(bitmap_t *b, uint16_t n_colors)$/;"	f	typeref:typename:void
gen_init_phy	drivers/net/davinci_emac.c	/^static int gen_init_phy(int phy_addr)$/;"	f	typeref:typename:int	file:
gen_int_cntl	drivers/video/ati_radeon_fb.h	/^	u32		gen_int_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
gen_is_phy_connected	drivers/net/davinci_emac.c	/^static int gen_is_phy_connected(int phy_addr)$/;"	f	typeref:typename:int	file:
gen_ndis_query_resp	drivers/usb/gadget/rndis.c	/^static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf,$/;"	f	typeref:typename:int	file:
gen_ndis_set_resp	drivers/usb/gadget/rndis.c	/^static int gen_ndis_set_resp(u8 configNr, u32 OID, u8 *buf, u32 buf_len,$/;"	f	typeref:typename:int	file:
gen_pmcon1	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t gen_pmcon1;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
gen_pmcon2	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t gen_pmcon2;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
gen_pmcon3	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t gen_pmcon3;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
gen_rand_uuid	lib/uuid.c	/^void gen_rand_uuid(unsigned char *uuid_bin)$/;"	f	typeref:typename:void
gen_rand_uuid_str	lib/uuid.c	/^void gen_rand_uuid_str(char *uuid_str, int str_format)$/;"	f	typeref:typename:void
gen_trees_header	lib/zlib/trees.c	/^void gen_trees_header()$/;"	f	typeref:typename:void
gen_true_ecc	drivers/mtd/nand/omap_gpmc.c	/^static uint32_t gen_true_ecc(uint8_t *ecc_buf)$/;"	f	typeref:typename:uint32_t	file:
gen_xml	doc/DocBook/Makefile	/^       gen_xml = :$/;"	m
gencfgr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gencfgr;	\/* General Configuration Register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
genconfig	include/usb/ehci-ci.h	/^	u32	genconfig;	\/* 0x09C - USB Core Configuration *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
genconfig2	include/usb/ehci-ci.h	/^	u32	genconfig2;	\/* 0x0A0 - USB Core Configuration 2 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
gencr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gencr1;		\/* General control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
general	drivers/video/ipu_regs.h	/^	u32 general;$/;"	m	struct:ipu_di	typeref:typename:u32
general	drivers/video/ipu_regs.h	/^	u32 general[2];$/;"	m	struct:ipu_dmfc	typeref:typename:u32[2]
general1_alt	drivers/video/ipu_regs.h	/^	u32 general1_alt;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
general_exception	arch/nds32/cpu/n1213/start.S	/^general_exception:$/;"	l
generalio	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	generalio[28];			\/* 0x480 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[28]
generate.section.toc.level	doc/DocBook/stylesheet.xsl	/^<param name="generate.section.toc.level">2<\/param>$/;"	p
generateMTFValues	lib/bzip2/bzlib_compress.c	/^void generateMTFValues ( EState* s )$/;"	f	typeref:typename:void	file:
generate_answer	board/esd/vme8349/caddy.c	/^void generate_answer(struct caddy_cmd *cmd, uint32_t status, uint32_t *result)$/;"	f	typeref:typename:void
generate_config	test/py/conftest.py	/^def generate_config(metafunc, fixture_name):$/;"	f
generate_mac_addr	board/compulab/cm_t54/cm_t54.c	/^static void generate_mac_addr(uint8_t *enetaddr)$/;"	f	typeref:typename:void	file:
generate_mtdparts	cmd/mtdparts.c	/^static int generate_mtdparts(char *buf, u32 buflen)$/;"	f	typeref:typename:int	file:
generate_mtdparts_save	cmd/mtdparts.c	/^static int generate_mtdparts_save(char *buf, u32 buflen)$/;"	f	typeref:typename:int	file:
generate_pbl_cmd	tools/pblimage.c	/^static void generate_pbl_cmd(void)$/;"	f	typeref:typename:void	file:
generate_stream_from_list	common/cli_hush.c	/^FILE *generate_stream_from_list(struct pipe *head)$/;"	f	typeref:typename:FILE *
generate_ut_subtest	test/py/conftest.py	/^def generate_ut_subtest(metafunc, fixture_name):$/;"	f
generated_clk_bind	drivers/clk/at91/clk-generated.c	/^static int generated_clk_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
generated_clk_match	drivers/clk/at91/clk-generated.c	/^static const struct udevice_id generated_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
generic	drivers/usb/host/xhci.h	/^	struct xhci_generic_trb		generic;$/;"	m	union:xhci_trb	typeref:struct:xhci_generic_trb
generic	include/usbdescriptors.h	/^		struct usb_class_function_descriptor_generic generic;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_function_descriptor_generic
generic	include/usbdescriptors.h	/^		struct usb_generic_descriptor generic;$/;"	m	union:usb_descriptor::__anon028dca6a010a	typeref:struct:usb_generic_descriptor
generic_clear_bit	include/linux/bitops.h	/^static inline void generic_clear_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
generic_clk_get_rate	drivers/clk/at91/clk-generated.c	/^static ulong generic_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
generic_clk_ofdata_to_platdata	drivers/clk/at91/clk-generated.c	/^static int generic_clk_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
generic_clk_ops	drivers/clk/at91/clk-generated.c	/^static struct clk_ops generic_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
generic_clk_priv	drivers/clk/at91/clk-generated.c	/^struct generic_clk_priv {$/;"	s	file:
generic_clk_set_rate	drivers/clk/at91/clk-generated.c	/^static ulong generic_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
generic_ehci	drivers/usb/host/ehci-generic.c	/^struct generic_ehci {$/;"	s	file:
generic_ffs	include/linux/bitops.h	/^static inline int generic_ffs(int x)$/;"	f	typeref:typename:int
generic_fls	include/linux/bitops.h	/^static inline int generic_fls(int x)$/;"	f	typeref:typename:int
generic_for_interface	drivers/net/phy/phy.c	/^static struct phy_driver *generic_for_interface(phy_interface_t interface)$/;"	f	typeref:struct:phy_driver *	file:
generic_hweight16	include/linux/bitops.h	/^static inline unsigned int generic_hweight16(unsigned int w)$/;"	f	typeref:typename:unsigned int
generic_hweight32	include/linux/bitops.h	/^static inline unsigned int generic_hweight32(unsigned int w)$/;"	f	typeref:typename:unsigned int
generic_hweight8	include/linux/bitops.h	/^static inline unsigned int generic_hweight8(unsigned int w)$/;"	f	typeref:typename:unsigned int
generic_init_controller	drivers/ddr/marvell/a38x/ddr3_init.c	/^u8 generic_init_controller = 1;$/;"	v	typeref:typename:u8
generic_interrupt	drivers/usb/musb-new/musb_core.c	/^#define generic_interrupt	/;"	d	file:
generic_interrupt	drivers/usb/musb-new/musb_core.c	/^static irqreturn_t generic_interrupt(int irq, void *__hci)$/;"	f	typeref:typename:irqreturn_t	file:
generic_ocp_read	drivers/usb/eth/r8152.c	/^int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,$/;"	f	typeref:typename:int
generic_ocp_write	drivers/usb/eth/r8152.c	/^int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,$/;"	f	typeref:typename:int
generic_ohci	drivers/usb/host/ohci-generic.c	/^struct generic_ohci {$/;"	s	file:
generic_set_bit	include/linux/bitops.h	/^static inline void generic_set_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
generic_simple_bus_ids	drivers/core/simple-bus.c	/^static const struct udevice_id generic_simple_bus_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
generic_spd_dump	drivers/ddr/fsl/interactive.c	/^static inline void generic_spd_dump(const generic_spd_eeprom_t *spd)$/;"	f	typeref:typename:void	file:
generic_spd_eeprom_t	include/fsl_ddr_sdram.h	/^typedef ddr1_spd_eeprom_t generic_spd_eeprom_t;$/;"	t	typeref:typename:ddr1_spd_eeprom_t
generic_spd_eeprom_t	include/fsl_ddr_sdram.h	/^typedef ddr2_spd_eeprom_t generic_spd_eeprom_t;$/;"	t	typeref:typename:ddr2_spd_eeprom_t
generic_spd_eeprom_t	include/fsl_ddr_sdram.h	/^typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;$/;"	t	typeref:typename:ddr3_spd_eeprom_t
generic_spd_eeprom_t	include/fsl_ddr_sdram.h	/^typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t;$/;"	t	typeref:struct:ddr4_spd_eeprom_s
generic_syscon_ids	drivers/core/syscon-uclass.c	/^static const struct udevice_id generic_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
genimg_get_arch_id	common/image.c	/^int genimg_get_arch_id(const char *name)$/;"	f	typeref:typename:int
genimg_get_arch_name	common/image.c	/^const char *genimg_get_arch_name(uint8_t arch)$/;"	f	typeref:typename:const char *
genimg_get_arch_short_name	common/image.c	/^const char *genimg_get_arch_short_name(uint8_t arch)$/;"	f	typeref:typename:const char *
genimg_get_cat_count	common/image.c	/^int genimg_get_cat_count(enum ih_category category)$/;"	f	typeref:typename:int
genimg_get_cat_desc	common/image.c	/^const char *genimg_get_cat_desc(enum ih_category category)$/;"	f	typeref:typename:const char *
genimg_get_cat_name	common/image.c	/^const char *genimg_get_cat_name(enum ih_category category, uint id)$/;"	f	typeref:typename:const char *
genimg_get_cat_short_name	common/image.c	/^const char *genimg_get_cat_short_name(enum ih_category category, uint id)$/;"	f	typeref:typename:const char *
genimg_get_comp_id	common/image.c	/^int genimg_get_comp_id(const char *name)$/;"	f	typeref:typename:int
genimg_get_comp_name	common/image.c	/^const char *genimg_get_comp_name(uint8_t comp)$/;"	f	typeref:typename:const char *
genimg_get_comp_short_name	common/image.c	/^const char *genimg_get_comp_short_name(uint8_t comp)$/;"	f	typeref:typename:const char *
genimg_get_format	common/image.c	/^int genimg_get_format(const void *img_addr)$/;"	f	typeref:typename:int
genimg_get_image	common/image.c	/^ulong genimg_get_image(ulong img_addr)$/;"	f	typeref:typename:ulong
genimg_get_kernel_addr	common/image.c	/^ulong genimg_get_kernel_addr(char * const img_addr)$/;"	f	typeref:typename:ulong
genimg_get_kernel_addr_fit	common/image.c	/^ulong genimg_get_kernel_addr_fit(char * const img_addr,$/;"	f	typeref:typename:ulong
genimg_get_os_id	common/image.c	/^int genimg_get_os_id(const char *name)$/;"	f	typeref:typename:int
genimg_get_os_name	common/image.c	/^const char *genimg_get_os_name(uint8_t os)$/;"	f	typeref:typename:const char *
genimg_get_os_short_name	common/image.c	/^const char *genimg_get_os_short_name(uint8_t os)$/;"	f	typeref:typename:const char *
genimg_get_short_name	common/image.c	/^static const char *genimg_get_short_name(const table_entry_t *table, int val)$/;"	f	typeref:typename:const char *	file:
genimg_get_type_id	common/image.c	/^int genimg_get_type_id(const char *name)$/;"	f	typeref:typename:int
genimg_get_type_name	common/image.c	/^const char *genimg_get_type_name(uint8_t type)$/;"	f	typeref:typename:const char *
genimg_get_type_short_name	common/image.c	/^const char *genimg_get_type_short_name(uint8_t type)$/;"	f	typeref:typename:const char *
genimg_has_config	common/image.c	/^int genimg_has_config(bootm_headers_t *images)$/;"	f	typeref:typename:int
genimg_print_size	common/image.c	/^void genimg_print_size(uint32_t size)$/;"	f	typeref:typename:void
genimg_print_time	common/image.c	/^void genimg_print_time(time_t timestamp)$/;"	f	typeref:typename:void
genmii_config_aneg	drivers/qe/uec_phy.c	/^static int genmii_config_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
genmii_read_status	drivers/qe/uec_phy.c	/^static int genmii_read_status (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
genmii_restart_aneg	drivers/qe/uec_phy.c	/^static void genmii_restart_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:void	file:
genmii_setup_forced	drivers/qe/uec_phy.c	/^static void genmii_setup_forced (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:void	file:
genmii_update_link	drivers/qe/uec_phy.c	/^static int genmii_update_link (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
genop_byte_operation	drivers/bios_emulator/x86emu/ops.c	/^static u8 (*genop_byte_operation[])(u8 d, u8 s) =$/;"	v	typeref:typename:u8 (* [])(u8 d,u8 s)	file:
genop_long_operation	drivers/bios_emulator/x86emu/ops.c	/^static u32 (*genop_long_operation[])(u32 d, u32 s) =$/;"	v	typeref:typename:u32 (* [])(u32 d,u32 s)	file:
genop_word_operation	drivers/bios_emulator/x86emu/ops.c	/^static u16 (*genop_word_operation[])(u16 d, u16 s) =$/;"	v	typeref:typename:u16 (* [])(u16 d,u16 s)	file:
genphy_config	drivers/net/phy/phy.c	/^int genphy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
genphy_config_advert	drivers/net/phy/phy.c	/^static int genphy_config_advert(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
genphy_config_aneg	drivers/net/phy/phy.c	/^int genphy_config_aneg(struct phy_device *phydev)$/;"	f	typeref:typename:int
genphy_driver	drivers/net/phy/phy.c	/^static struct phy_driver genphy_driver = {$/;"	v	typeref:struct:phy_driver	file:
genphy_parse_link	drivers/net/phy/phy.c	/^int genphy_parse_link(struct phy_device *phydev)$/;"	f	typeref:typename:int
genphy_restart_aneg	drivers/net/phy/phy.c	/^int genphy_restart_aneg(struct phy_device *phydev)$/;"	f	typeref:typename:int
genphy_setup_forced	drivers/net/phy/phy.c	/^static int genphy_setup_forced(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
genphy_shutdown	drivers/net/phy/phy.c	/^int genphy_shutdown(struct phy_device *phydev)$/;"	f	typeref:typename:int
genphy_startup	drivers/net/phy/phy.c	/^int genphy_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int
genphy_update_link	drivers/net/phy/phy.c	/^int genphy_update_link(struct phy_device *phydev)$/;"	f	typeref:typename:int
gensr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gensr1;		\/* General status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
ger	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ger;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
get	common/cli_hush.c	/^	int (*get) (struct in_str *);$/;"	m	struct:in_str	typeref:typename:int (*)(struct in_str *)	file:
get	include/rtc.h	/^	int (*get)(struct udevice *dev, struct rtc_time *time);$/;"	m	struct:rtc_ops	typeref:typename:int (*)(struct udevice * dev,struct rtc_time * time)
get	tools/patman/settings.py	/^    def get(self, section, option, *args, **kwargs):$/;"	m	class:_ProjectConfigParser
get32	board/mpl/pati/cmd_pati.c	/^unsigned long get32(unsigned long addr)$/;"	f	typeref:typename:unsigned long
getAddr	board/dbau1x00/lowlevel_init.S	/^getAddr:$/;"	l
getDebugChar	arch/powerpc/cpu/mpc8260/serial_scc.c	/^getDebugChar(void)$/;"	f	typeref:typename:int
getDebugChar	arch/powerpc/cpu/mpc8260/serial_smc.c	/^getDebugChar(void)$/;"	f	typeref:typename:int
getDebugChar	arch/powerpc/cpu/mpc8xx/serial.c	/^getDebugChar (void)$/;"	f	typeref:typename:int
getDebugChar	common/kgdb_stubs.c	/^int getDebugChar(void)$/;"	f	typeref:typename:int
getPS7MessageInfo	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^getPS7MessageInfo(unsigned key) {$/;"	f	typeref:typename:char *
getPS7MessageInfo	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^getPS7MessageInfo(unsigned key) {$/;"	f	typeref:typename:char *
getPS7MessageInfo	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^getPS7MessageInfo(unsigned key) {$/;"	f	typeref:typename:char *
getPS7MessageInfo	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^getPS7MessageInfo(unsigned key) {$/;"	f	typeref:typename:char *
getPS7MessageInfo	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^char *getPS7MessageInfo(unsigned key)$/;"	f	typeref:typename:char *
get_2nd_stage_bl_location	board/gdsys/p1022/controlcenterd-id.c	/^static u8 *get_2nd_stage_bl_location(ulong target_addr)$/;"	f	typeref:typename:u8 *	file:
get_BCLK	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_BCLK(void)$/;"	f	typeref:typename:ulong
get_CicadaPHY_media_mode	drivers/net/ax88180.c	/^static unsigned long get_CicadaPHY_media_mode (struct eth_device *dev)$/;"	f	typeref:typename:unsigned long	file:
get_FCLK	arch/arm/cpu/arm920t/ep93xx/speed.c	/^ulong get_FCLK()$/;"	f	typeref:typename:ulong
get_FCLK	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_FCLK(void)$/;"	f	typeref:typename:ulong
get_FCLK	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^ulong get_FCLK(void)$/;"	f	typeref:typename:ulong
get_HCLK	arch/arm/cpu/arm920t/ep93xx/speed.c	/^ulong get_HCLK(void)$/;"	f	typeref:typename:ulong
get_HCLK	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_HCLK(void)$/;"	f	typeref:typename:ulong
get_HCLK	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^ulong get_HCLK(void)$/;"	f	typeref:typename:ulong
get_MarvellPHY_media_mode	drivers/net/ax88180.c	/^static unsigned long get_MarvellPHY_media_mode (struct eth_device *dev)$/;"	f	typeref:typename:unsigned long	file:
get_OPB_freq	arch/powerpc/cpu/ppc4xx/speed.c	/^ulong get_OPB_freq (void)$/;"	f	typeref:typename:ulong
get_PCI_freq	arch/powerpc/cpu/ppc4xx/speed.c	/^ulong get_PCI_freq (void)$/;"	f	typeref:typename:ulong
get_PCI_freq	board/xilinx/ppc405-generic/xilinx_ppc405_generic.c	/^ulong get_PCI_freq(void)$/;"	f	typeref:typename:ulong
get_PCLK	arch/arm/cpu/arm920t/ep93xx/speed.c	/^ulong get_PCLK(void)$/;"	f	typeref:typename:ulong
get_PCLK	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^ulong get_PCLK(void)$/;"	f	typeref:typename:ulong
get_PERCLK1	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_PERCLK1(void)$/;"	f	typeref:typename:ulong
get_PERCLK2	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_PERCLK2(void)$/;"	f	typeref:typename:ulong
get_PERCLK3	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_PERCLK3(void)$/;"	f	typeref:typename:ulong
get_PLLCLK	arch/arm/cpu/arm920t/ep93xx/speed.c	/^static ulong get_PLLCLK(uint32_t *pllreg)$/;"	f	typeref:typename:ulong	file:
get_PLLCLK	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^static ulong get_PLLCLK(int pllreg)$/;"	f	typeref:typename:ulong	file:
get_UCLK	arch/arm/cpu/arm920t/ep93xx/speed.c	/^ulong get_UCLK(void)$/;"	f	typeref:typename:ulong
get_UCLK	arch/arm/cpu/arm920t/s3c24x0/speed.c	/^ulong get_UCLK(void)$/;"	f	typeref:typename:ulong
get_abe_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const struct dpll_params *get_abe_dpll_params(struct dplls const *dpll_data)$/;"	f	typeref:typename:const struct dpll_params *
get_active_phy	drivers/net/davinci_emac.c	/^static int get_active_phy(void)$/;"	f	typeref:typename:int	file:
get_adc_value	board/samsung/universal_c210/universal.c	/^static unsigned short get_adc_value(int channel)$/;"	f	typeref:typename:unsigned short	file:
get_addr	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_addr(uint8_t channel, uint8_t rank)$/;"	f	typeref:typename:uint32_t
get_ahb_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^get_ahb_bridge:$/;"	l
get_ahb_clk	arch/arm/cpu/armv7/mx7/clock.c	/^u32 get_ahb_clk(void)$/;"	f	typeref:typename:u32
get_ahb_clk	arch/arm/imx-common/cpu.c	/^u32 get_ahb_clk(void)$/;"	f	typeref:typename:u32
get_ahb_div	arch/arm/cpu/arm1136/mx35/generic.c	/^static int get_ahb_div(u32 pdr0)$/;"	f	typeref:typename:int	file:
get_aiop_apply_status	drivers/net/fsl-mc/mc.c	/^int get_aiop_apply_status(void)$/;"	f	typeref:typename:int
get_ais_table_id	tools/aisimage.c	/^static int get_ais_table_id(uint32_t *ptr)$/;"	f	typeref:typename:int	file:
get_alen	cmd/i2c.c	/^static uint get_alen(char *arg, int default_len)$/;"	f	typeref:typename:uint	file:
get_aligned_image_offset	common/spl/spl_fit.c	/^static int get_aligned_image_offset(struct spl_load_info *info, int offset)$/;"	f	typeref:typename:int	file:
get_aligned_image_overhead	common/spl/spl_fit.c	/^static int get_aligned_image_overhead(struct spl_load_info *info, int offset)$/;"	f	typeref:typename:int	file:
get_aligned_image_size	common/spl/spl_fit.c	/^static int get_aligned_image_size(struct spl_load_info *info, int data_size,$/;"	f	typeref:typename:int	file:
get_all_defconfigs	tools/moveconfig.py	/^def get_all_defconfigs():$/;"	f
get_alt	include/linux/usb/composite.h	/^	int			(*get_alt)(struct usb_function *,$/;"	m	struct:usb_function	typeref:typename:int (*)(struct usb_function *,unsigned interface)
get_arc_info	board/Arcturus/ucp1020/cmd_arc.c	/^int get_arc_info(void)$/;"	f	typeref:typename:int
get_arch	tools/buildman/kconfiglib.py	/^    def get_arch(self):$/;"	m	class:Config
get_arg	cmd/setexpr.c	/^static ulong get_arg(char *s, int w)$/;"	f	typeref:typename:ulong	file:
get_args	cmd/trace.c	/^static int get_args(int argc, char * const argv[], char **buff,$/;"	f	typeref:typename:int	file:
get_arm_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_arm_clk(void)$/;"	f	typeref:typename:unsigned long
get_arm_clk	arch/arm/mach-s5pc1xx/clock.c	/^unsigned long get_arm_clk(void)$/;"	f	typeref:typename:unsigned long
get_arm_div	arch/arm/cpu/arm1136/mx35/generic.c	/^static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd)$/;"	f	typeref:typename:u32	file:
get_arm_mem	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;$/;"	m	struct:msg_get_arm_mem	typeref:struct:bcm2835_mbox_tag_get_arm_mem	file:
get_arm_ratios	arch/arm/mach-exynos/clock_init_exynos5.c	/^struct arm_clk_ratios *get_arm_ratios(void)$/;"	f	typeref:struct:arm_clk_ratios *
get_assignable_values	tools/buildman/kconfiglib.py	/^    def get_assignable_values(self):$/;"	m	class:Symbol
get_async3_src	arch/arm/mach-davinci/include/mach/hardware.h	/^static inline enum davinci_clk_ids get_async3_src(void)$/;"	f	typeref:enum:davinci_clk_ids
get_async_pci_freq	board/amcc/sequoia/sequoia.c	/^static inline u32 get_async_pci_freq(void)$/;"	f	typeref:typename:u32	file:
get_async_pci_freq	board/amcc/yosemite/yosemite.c	/^static inline u32 get_async_pci_freq(void)$/;"	f	typeref:typename:u32	file:
get_axi_a_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_axi_a_clk(void)$/;"	f	typeref:typename:u32	file:
get_axi_b_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_axi_b_clk(void)$/;"	f	typeref:typename:u32	file:
get_axi_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_axi_clk(void)$/;"	f	typeref:typename:u32	file:
get_backup_values	board/mpl/common/common_util.c	/^void get_backup_values(backup_t *buf)$/;"	f	typeref:typename:void
get_bad_peb_limit	drivers/mtd/ubi/build.c	/^static int get_bad_peb_limit(const struct ubi_device *ubi, int max_beb_per1024)$/;"	f	typeref:typename:int	file:
get_bad_stack	arch/arm/lib/vectors.S	/^	.macro get_bad_stack$/;"	m
get_bank_num	arch/arm/mach-exynos/include/mach/gpio.h	/^static inline unsigned int get_bank_num(void)$/;"	f	typeref:typename:unsigned int
get_bank_num	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^static inline unsigned int get_bank_num(void)$/;"	f	typeref:typename:unsigned int
get_base	arch/arm/cpu/armv7/omap3/sys_info.c	/^static u32 get_base(void)$/;"	f	typeref:typename:u32	file:
get_base_dir	tools/buildman/kconfiglib.py	/^    def get_base_dir(self):$/;"	m	class:Config
get_base_i2c	drivers/i2c/s3c24x0_i2c.c	/^static struct s3c24x0_i2c *get_base_i2c(int bus)$/;"	f	typeref:struct:s3c24x0_i2c *	file:
get_base_size	cmd/bootstage.c	/^static int get_base_size(int argc, char * const argv[], ulong *basep,$/;"	f	typeref:typename:int	file:
get_basename	tools/fit_image.c	/^static void get_basename(char *str, int size, const char *fname)$/;"	f	typeref:typename:void	file:
get_bf	arch/powerpc/include/asm/fsl_pamu.h	/^#define get_bf(/;"	d
get_bfin_boot_mode	arch/blackfin/include/asm/config-pre.h	/^static inline const char *get_bfin_boot_mode(int bfin_boot)$/;"	f	typeref:typename:const char *
get_board_ddr_clk	board/freescale/b4860qds/b4860qds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/b4860qds/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/common/ics307_clk.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/ls1021aqds/ls1021aqds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/ls1043aqds/ls1043aqds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/ls1046aqds/ls1046aqds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/ls2080aqds/ls2080aqds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/p1023rdb/p1023rdb.c	/^unsigned long get_board_ddr_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t102xqds/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t102xqds/t102xqds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t102xrdb/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t102xrdb/t102xrdb.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t1040qds/t1040qds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t104xrdb/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t208xqds/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t208xqds/t208xqds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t208xrdb/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t208xrdb/t208xrdb.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t4qds/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t4qds/t4240qds.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/freescale/t4rdb/spl.c	/^unsigned long get_board_ddr_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_ddr_clk	board/xes/common/fsl_8xxx_clk.c	/^unsigned long get_board_ddr_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_derivative	board/xes/common/fsl_8xxx_misc.c	/^uint get_board_derivative(void)$/;"	f	typeref:typename:uint
get_board_mem_timings	board/compulab/cm_t35/cm_t35.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/corscience/tricorder/tricorder.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/isee/igep00x0/igep00x0.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/lg/sniper/sniper.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/logicpd/omap3som/omap3logic.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/overo/spl.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/quipos/cairo/cairo.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/technexion/tao3530/tao3530.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/ti/beagle/beagle.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/ti/evm/evm.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_mem_timings	board/timll/devkit8000/devkit8000.c	/^void get_board_mem_timings(struct board_sdrc_timings *timings)$/;"	f	typeref:typename:void
get_board_pcb	board/mpl/vcma9/vcma9.c	/^static uchar get_board_pcb(void)$/;"	f	typeref:typename:uchar	file:
get_board_rev	arch/arm/cpu/armv7/mx5/soc.c	/^u32 __weak get_board_rev(void)$/;"	f	typeref:typename:u32 __weak
get_board_rev	arch/arm/cpu/armv7/mx6/soc.c	/^u32 __weak get_board_rev(void)$/;"	f	typeref:typename:u32 __weak
get_board_rev	arch/arm/cpu/armv7/mx7/soc.c	/^u32 __weak get_board_rev(void)$/;"	f	typeref:typename:u32 __weak
get_board_rev	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 __weak get_board_rev(void)$/;"	f	typeref:typename:u32 __weak
get_board_rev	arch/arm/include/asm/bootm.h	/^static inline u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/Barix/ipam390/ipam390.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/CarMediaLab/flea3/flea3.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/amazon/kc1/kc1.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/armadeus/apf27/apf27.c	/^static u32 get_board_rev(void)$/;"	f	typeref:typename:u32	file:
get_board_rev	board/armltd/vexpress/vexpress_common.c	/^ulong get_board_rev(void){$/;"	f	typeref:typename:ulong
get_board_rev	board/bluegiga/apx4devkit/apx4devkit.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/compulab/cm_fx6/cm_fx6.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/compulab/cm_t35/cm_t35.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/compulab/cm_t3517/cm_t3517.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/davinci/da8xxevm/da850evm.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/davinci/da8xxevm/omapl138_lcdk.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/esd/meesc/meesc.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/freescale/mx35pdk/mx35pdk.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/freescale/mx51evk/mx51evk.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/freescale/mx53loco/mx53loco.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/gumstix/duovero/duovero.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/inversepath/usbarmory/usbarmory.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/lego/ev3/legoev3.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/lg/sniper/sniper.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/nokia/rx51/rx51.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/omicron/calimain/calimain.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_tag_get_board_rev get_board_rev;$/;"	m	struct:msg_get_board_rev	typeref:struct:bcm2835_mbox_tag_get_board_rev	file:
get_board_rev	board/raspberrypi/rpi/rpi.c	/^static void get_board_rev(void)$/;"	f	typeref:typename:void	file:
get_board_rev	board/samsung/common/exynos5-dt-types.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/samsung/goni/goni.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/samsung/origen/origen.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/samsung/trats/trats.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/samsung/trats2/trats2.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/samsung/universal_c210/universal.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/st/stm32f429-discovery/stm32f429-discovery.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/st/stm32f746-disco/stm32f746-disco.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/technologic/ts4800/ts4800.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/ti/panda/panda.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/ti/sdp4430/sdp.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_rev	board/woodburn/woodburn.c	/^u32 get_board_rev(void)$/;"	f	typeref:typename:u32
get_board_revcfg	board/mpl/mip405/mip405.c	/^unsigned char get_board_revcfg (void)$/;"	f	typeref:typename:unsigned char
get_board_revision	board/overo/common.c	/^int get_board_revision(void)$/;"	f	typeref:typename:int
get_board_revision	board/ti/beagle/beagle.c	/^static int get_board_revision(void)$/;"	f	typeref:typename:int	file:
get_board_revision	board/ti/panda/panda.c	/^int get_board_revision(void)$/;"	f	typeref:typename:int
get_board_serial	arch/arm/cpu/armv7/mx7/soc.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	arch/arm/include/asm/bootm.h	/^static inline void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/amazon/kc1/kc1.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/bluegiga/apx4devkit/apx4devkit.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/compulab/common/common.c	/^void __weak get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void __weak
get_board_serial	board/compulab/common/eeprom.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/esd/meesc/meesc.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/gateworks/gw_ventana/gw_ventana.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/lego/ev3/legoev3.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/lg/sniper/sniper.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_serial	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_tag_get_board_serial get_board_serial;$/;"	m	struct:msg_get_board_serial	typeref:struct:bcm2835_mbox_tag_get_board_serial	file:
get_board_serial	board/sunxi/board.c	/^void get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
get_board_sys_clk	board/freescale/b4860qds/b4860qds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/b4860qds/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/common/ics307_clk.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/ls1021aqds/ls1021aqds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/ls1043aqds/ls1043aqds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/ls1046aqds/ls1046aqds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/ls2080aqds/ls2080aqds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/ls2080ardb/ls2080ardb.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/mpc8544ds/mpc8544ds.c	/^get_board_sys_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^get_board_sys_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^get_board_sys_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/p1023rdb/p1023rdb.c	/^unsigned long get_board_sys_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/p1_twr/p1_twr.c	/^unsigned long get_board_sys_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/p2041rdb/p2041rdb.c	/^unsigned long get_board_sys_clk(unsigned long dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t102xqds/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t102xqds/t102xqds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t102xrdb/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t102xrdb/t102xrdb.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t1040qds/t1040qds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t104xrdb/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t208xqds/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t208xqds/t208xqds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t208xrdb/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t208xrdb/t208xrdb.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t4qds/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t4qds/t4240qds.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/freescale/t4rdb/spl.c	/^unsigned long get_board_sys_clk(void)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/keymile/kmp204x/kmp204x.c	/^unsigned long get_board_sys_clk(unsigned long dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/sbc8641d/sbc8641d.c	/^unsigned long get_board_sys_clk (ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_sys_clk	board/xes/common/fsl_8xxx_clk.c	/^unsigned long get_board_sys_clk(ulong dummy)$/;"	f	typeref:typename:unsigned long
get_board_type	board/birdland/bav335x/board.c	/^enum board_type get_board_type(bool debug)$/;"	f	typeref:enum:board_type
get_board_type	board/samsung/common/exynos5-dt-types.c	/^const char *get_board_type(void)$/;"	f	typeref:typename:const char *
get_board_type	board/samsung/odroid/odroid.c	/^const char *get_board_type(void)$/;"	f	typeref:typename:const char *
get_board_version	board/freescale/common/cadmus.c	/^get_board_version(void)$/;"	f	typeref:typename:unsigned int
get_boot_device	arch/arm/cpu/armv7/mx7/soc.c	/^enum boot_device get_boot_device(void)$/;"	f	typeref:enum:boot_device
get_boot_device	arch/arm/mach-mvebu/spl.c	/^static u32 get_boot_device(void)$/;"	f	typeref:typename:u32	file:
get_boot_mode	arch/arm/mach-exynos/power.c	/^unsigned int get_boot_mode(void)$/;"	f	typeref:typename:unsigned int
get_boot_mode	board/mpl/common/common_util.c	/^int get_boot_mode(void)$/;"	f	typeref:typename:int
get_boot_mode_sel	arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c	/^static int get_boot_mode_sel(void)$/;"	f	typeref:typename:int	file:
get_boot_mode_sel	arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c	/^static int get_boot_mode_sel(void)$/;"	f	typeref:typename:int	file:
get_boot_mode_sel	arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c	/^static int get_boot_mode_sel(void)$/;"	f	typeref:typename:int	file:
get_boot_mode_sel	arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c	/^static int get_boot_mode_sel(void)$/;"	f	typeref:typename:int	file:
get_boot_mode_sel	arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c	/^static int get_boot_mode_sel(void)$/;"	f	typeref:typename:int	file:
get_boot_protocol	arch/x86/lib/zimage.c	/^static int get_boot_protocol(struct setup_header *hdr)$/;"	f	typeref:typename:int	file:
get_boot_type	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_boot_type(void)$/;"	f	typeref:typename:u32
get_bootcode	disk/part_amiga.c	/^struct bootcode_block *get_bootcode(struct blk_desc *dev_desc)$/;"	f	typeref:struct:bootcode_block *
get_bootfile_path	cmd/pxe.c	/^static int get_bootfile_path(const char *file_path, char *bootfile_path,$/;"	f	typeref:typename:int	file:
get_brgclk	arch/powerpc/cpu/mpc8xx/speed.c	/^void get_brgclk(uint sccr)$/;"	f	typeref:typename:void
get_bug_regs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^__weak const struct read_write_regs *get_bug_regs(u32 *iterations)$/;"	f	typeref:typename:__weak const struct read_write_regs *
get_bug_regs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct read_write_regs *get_bug_regs(u32 *iterations)$/;"	f	typeref:typename:const struct read_write_regs *
get_bus	drivers/i2c/s3c24x0_i2c.c	/^static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)$/;"	f	typeref:struct:s3c24x0_i2c_bus *	file:
get_bus_address	drivers/pci/pcie_imx.c	/^static uint32_t get_bus_address(pci_dev_t d, int where)$/;"	f	typeref:typename:uint32_t	file:
get_bus_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_bus_clk(void)$/;"	f	typeref:typename:u32	file:
get_bus_freq	arch/arm/cpu/armv7/ls102xa/clock.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/mips/mach-ath79/ar933x/clk.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/mips/mach-ath79/ar934x/clk.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/mips/mach-ath79/qca953x/clk.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/powerpc/cpu/mpc512x/speed.c	/^ulong get_bus_freq (ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/powerpc/cpu/mpc83xx/speed.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/powerpc/cpu/mpc85xx/speed.c	/^ulong get_bus_freq (ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/powerpc/cpu/mpc86xx/speed.c	/^ulong get_bus_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	arch/powerpc/cpu/ppc4xx/speed.c	/^ulong get_bus_freq (ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_freq	board/freescale/qemu-ppce500/qemu-ppce500.c	/^ulong get_bus_freq (ulong dummy)$/;"	f	typeref:typename:ulong
get_bus_speed	include/i2c.h	/^	int (*get_bus_speed)(struct udevice *bus);$/;"	m	struct:dm_i2c_ops	typeref:typename:int (*)(struct udevice * bus)
get_button_state	board/siemens/common/board.c	/^unsigned char get_button_state(char * const envname, unsigned char def)$/;"	f	typeref:typename:unsigned char
get_byte_0	arch/arm/include/asm/assembler.h	/^#define get_byte_0	/;"	d
get_byte_1	arch/arm/include/asm/assembler.h	/^#define get_byte_1	/;"	d
get_byte_2	arch/arm/include/asm/assembler.h	/^#define get_byte_2	/;"	d
get_byte_3	arch/arm/include/asm/assembler.h	/^#define get_byte_3	/;"	d
get_byte_3	arch/arm/include/asm/assembler.h	/^#define get_byte_3 /;"	d
get_cbar_addr	arch/arm/cpu/armv7/nonsec_virt.S	/^.macro get_cbar_addr	addr$/;"	m
get_cclk	arch/blackfin/lib/clocks.c	/^u_long get_cclk(void)$/;"	f	typeref:typename:u_long
get_ccount	arch/xtensa/lib/time.c	/^#define get_ccount(/;"	d	file:
get_ccount	arch/xtensa/lib/time.c	/^static ulong get_ccount(void)$/;"	f	typeref:typename:ulong	file:
get_ccsidr	arch/arm/cpu/armv7/cache_v7.c	/^static u32 get_ccsidr(void)$/;"	f	typeref:typename:u32	file:
get_cd	include/mmc.h	/^	int (*get_cd)(struct udevice *dev);$/;"	m	struct:dm_mmc_ops	typeref:typename:int (*)(struct udevice * dev)
get_cf_lock	drivers/block/systemace.c	/^static int get_cf_lock(void)$/;"	f	typeref:typename:int	file:
get_cfg_reg	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^static u32 get_cfg_reg(u16 a_delay, u16 g_delay, u32 cpde, u32 fpde)$/;"	f	typeref:typename:u32	file:
get_cfg_seq_op	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^enum mv_op get_cfg_seq_op(struct op_params *params)$/;"	f	typeref:enum:mv_op
get_cfg_value	tools/aisimage.c	/^static uint32_t get_cfg_value(char *token, char *name,  int linenr)$/;"	f	typeref:typename:uint32_t	file:
get_cfg_value	tools/imximage.c	/^static uint32_t get_cfg_value(char *token, char *name,  int linenr)$/;"	f	typeref:typename:uint32_t	file:
get_cfg_value	tools/ublimage.c	/^static uint32_t get_cfg_value(char *token, char *name,  int linenr)$/;"	f	typeref:typename:uint32_t	file:
get_chip_geom	board/mpl/vcma9/vcma9.c	/^static const char *get_chip_geom(void)$/;"	f	typeref:typename:const char *	file:
get_chip_id	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^unsigned int get_chip_id(void)$/;"	f	typeref:typename:unsigned int
get_chip_id	arch/arm/mach-at91/armv7/cpu.c	/^unsigned int get_chip_id(void)$/;"	f	typeref:typename:unsigned int
get_chip_size	board/mpl/vcma9/vcma9.c	/^static ulong get_chip_size(void)$/;"	f	typeref:typename:ulong	file:
get_choices	tools/buildman/kconfiglib.py	/^    def get_choices(self):$/;"	m	class:Config
get_clk	board/siemens/pxm2/board.c	/^static int get_clk(struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:int	file:
get_clk	board/siemens/rut/board.c	/^static int get_clk(struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:int	file:
get_clk_bit_info	arch/arm/mach-exynos/clock.c	/^static struct clk_bit_info *get_clk_bit_info(int peripheral)$/;"	f	typeref:struct:clk_bit_info *	file:
get_clock_freq	board/freescale/common/cadmus.c	/^get_clock_freq(void)$/;"	f	typeref:typename:unsigned long
get_clock_rate	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;$/;"	m	struct:msg_get_clock_rate	typeref:struct:bcm2835_mbox_tag_get_clock_rate	file:
get_clocks	arch/arm/cpu/arm1136/mx35/generic.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/arm926ejs/mx25/generic.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/armv7/ls102xa/clock.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/armv7/mx7/clock.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/armv7/vf610/generic.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/cpu/armv8/s32v234/generic.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/arm/imx-common/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf5227x/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf523x/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf52x2/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf530x/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf532x/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf5445x/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/m68k/cpu/mcf547x_8x/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/mips/mach-ath79/ar933x/clk.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/mips/mach-ath79/qca953x/clk.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc512x/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc5xx/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc5xxx/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc8260/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc83xx/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc85xx/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc86xx/speed.c	/^int get_clocks(void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/mpc8xx/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	arch/powerpc/cpu/ppc4xx/speed.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int get_clocks (void)$/;"	f	typeref:typename:int
get_clocks_866	arch/powerpc/cpu/mpc8xx/speed.c	/^int get_clocks_866 (void)$/;"	f	typeref:typename:int
get_cluster	fs/fat/fat.c	/^get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size)$/;"	f	typeref:typename:int	file:
get_cnodes_to_commit	fs/ubifs/lpt_commit.c	/^static int get_cnodes_to_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
get_codec_values	drivers/sound/wm8994.c	/^static int get_codec_values(struct sound_codec_info *pcodec_info,$/;"	f	typeref:typename:int	file:
get_codes	board/bf533-ezkit/flash.c	/^int get_codes()$/;"	f	typeref:typename:int
get_codeseg32	lib/efi/efi_stub.c	/^static int get_codeseg32(void)$/;"	f	typeref:typename:int	file:
get_comments	tools/buildman/kconfiglib.py	/^    def get_comments(self):$/;"	m	class:Config
get_committer_date	scripts/fill_scrapyard.py	/^def get_committer_date(commit):$/;"	f
get_config	board/gateworks/gw_ventana/eeprom.c	/^static struct ventana_eeprom_config *get_config(const char *name)$/;"	f	typeref:struct:ventana_eeprom_config *	file:
get_config	drivers/gpio/tegra_gpio.c	/^static int get_config(unsigned gpio)$/;"	f	typeref:typename:int	file:
get_config	tools/buildman/kconfiglib.py	/^    def get_config(self):$/;"	m	class:Choice
get_config	tools/buildman/kconfiglib.py	/^    def get_config(self):$/;"	m	class:Comment
get_config	tools/buildman/kconfiglib.py	/^    def get_config(self):$/;"	m	class:Menu
get_config	tools/buildman/kconfiglib.py	/^    def get_config(self):$/;"	m	class:Symbol
get_config	tools/env/fw_env.c	/^static int get_config (char *fname)$/;"	f	typeref:typename:int	file:
get_config_filename	tools/buildman/kconfiglib.py	/^    def get_config_filename(self):$/;"	m	class:Config
get_config_header	tools/buildman/kconfiglib.py	/^    def get_config_header(self):$/;"	m	class:Config
get_config_reg	drivers/gpio/sh_pfc.c	/^static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,$/;"	f	typeref:typename:int	file:
get_contents	fs/fat/fat.c	/^static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos,$/;"	f	typeref:typename:int	file:
get_core_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^get_core_dpll_param:$/;"	l
get_core_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const struct dpll_params *get_core_dpll_params(struct dplls const *dpll_data)$/;"	f	typeref:typename:const struct dpll_params *
get_core_name	arch/mips/mach-pic32/cpu.c	/^const char *get_core_name(void)$/;"	f	typeref:typename:const char *
get_coreboot_info	arch/x86/cpu/coreboot/tables.c	/^int get_coreboot_info(struct sysinfo_t *info)$/;"	f	typeref:typename:int
get_count	include/cpu.h	/^	int (*get_count)(struct udevice *dev);$/;"	m	struct:cpu_ops	typeref:typename:int (*)(struct udevice * dev)
get_count	include/timer.h	/^	int (*get_count)(struct udevice *dev, u64 *count);$/;"	m	struct:timer_ops	typeref:typename:int (*)(struct udevice * dev,u64 * count)
get_cpr0_fbdv	arch/powerpc/cpu/ppc4xx/speed.c	/^u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)$/;"	f	typeref:typename:u32
get_cpr0_fwdv	arch/powerpc/cpu/ppc4xx/speed.c	/^u32 get_cpr0_fwdv(unsigned long cpr_reg_fwdv)$/;"	f	typeref:typename:u32
get_cpsr	arch/arm/include/asm/system.h	/^static inline unsigned long get_cpsr(void)$/;"	f	typeref:typename:unsigned long
get_cpu_board_revision	board/freescale/common/sys_eeprom.c	/^unsigned int get_cpu_board_revision(void)$/;"	f	typeref:typename:unsigned int
get_cpu_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_cpu_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_cpu_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_cpu_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_cpu_family	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_cpu_family(void)$/;"	f	typeref:typename:u32
get_cpu_freq	board/freescale/qemu-ppce500/qemu-ppce500.c	/^static uint32_t get_cpu_freq(void)$/;"	f	typeref:typename:uint32_t	file:
get_cpu_global_timer	arch/arm/mach-rmobile/timer.c	/^static u64 get_cpu_global_timer(void)$/;"	f	typeref:typename:u64	file:
get_cpu_id	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_cpu_id(void)$/;"	f	typeref:typename:u32
get_cpu_name	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^char *get_cpu_name()$/;"	f	typeref:typename:char *
get_cpu_name	arch/arm/mach-at91/armv7/sama5d2_devices.c	/^char *get_cpu_name()$/;"	f	typeref:typename:char *
get_cpu_name	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^char *get_cpu_name()$/;"	f	typeref:typename:char *
get_cpu_name	arch/arm/mach-at91/armv7/sama5d4_devices.c	/^char *get_cpu_name()$/;"	f	typeref:typename:char *
get_cpu_num	board/amcc/canyonlands/canyonlands.c	/^int get_cpu_num(void)$/;"	f	typeref:typename:int
get_cpu_num	board/gdsys/intip/intip.c	/^int get_cpu_num(void)$/;"	f	typeref:typename:int
get_cpu_rev	arch/arm/cpu/arm1136/mx31/generic.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/arm1136/mx35/generic.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/arm926ejs/mx25/generic.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/arm926ejs/mx27/generic.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv7/am33xx/sys_info.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv7/mx5/soc.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv7/mx6/soc.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv7/mx7/soc.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv7/vf610/generic.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/cpu/armv8/s32v234/generic.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/mach-stm32/stm32f1/soc.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/mach-stm32/stm32f4/soc.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_rev	arch/arm/mach-stm32/stm32f7/soc.c	/^u32 get_cpu_rev(void)$/;"	f	typeref:typename:u32
get_cpu_speed_grade_hz	arch/arm/cpu/armv7/mx6/soc.c	/^u32 get_cpu_speed_grade_hz(void)$/;"	f	typeref:typename:u32
get_cpu_speed_grade_hz	arch/arm/cpu/armv7/mx7/soc.c	/^u32 get_cpu_speed_grade_hz(void)$/;"	f	typeref:typename:u32
get_cpu_temp_grade	arch/arm/cpu/armv7/mx6/soc.c	/^u32 get_cpu_temp_grade(int *minc, int *maxc)$/;"	f	typeref:typename:u32
get_cpu_temp_grade	arch/arm/cpu/armv7/mx7/soc.c	/^u32 get_cpu_temp_grade(int *minc, int *maxc)$/;"	f	typeref:typename:u32
get_cpu_type	arch/arm/cpu/armv7/am33xx/sys_info.c	/^u32 get_cpu_type(void)$/;"	f	typeref:typename:u32
get_cpu_type	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_cpu_type(void)$/;"	f	typeref:typename:u32
get_cpu_type	arch/arm/include/asm/imx-common/sys_proto.h	/^#define get_cpu_type(/;"	d
get_cr	arch/arm/include/asm/system.h	/^static inline unsigned int get_cr(void)$/;"	f	typeref:typename:unsigned int
get_crc_table	include/u-boot/zlib.h	/^#  define get_crc_table /;"	d
get_cross_compile	tools/moveconfig.py	/^    def get_cross_compile(self):$/;"	m	class:KconfigParser
get_cs_sqnum	fs/ubifs/recovery.c	/^static int get_cs_sqnum(struct ubifs_info *c, int lnum, int offs,$/;"	f	typeref:typename:int	file:
get_csf_base_addr	board/freescale/common/fsl_validate.c	/^int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr)$/;"	f	typeref:typename:int
get_cspi_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_cspi_clk(void)$/;"	f	typeref:typename:u32	file:
get_cspi_div	drivers/spi/mxc_spi.c	/^u32 get_cspi_div(u32 div)$/;"	f	typeref:typename:u32
get_csr_reg	arch/arm/mach-tegra/psci.S	/^.macro get_csr_reg cpu, ofs, tmp$/;"	m
get_cur_temp	drivers/power/exynos-tmu.c	/^static int get_cur_temp(struct tmu_info *info)$/;"	f	typeref:typename:int	file:
get_current	drivers/serial/serial.c	/^static struct serial_device *get_current(void)$/;"	f	typeref:struct:serial_device *	file:
get_current	include/power/regulator.h	/^	int (*get_current)(struct udevice *dev);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev)
get_dacr	arch/arm/include/asm/system.h	/^static inline unsigned int get_dacr(void)$/;"	f	typeref:typename:unsigned int
get_data_reg	drivers/gpio/sh_pfc.c	/^static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,$/;"	f	typeref:typename:int	file:
get_data_segment	drivers/bios_emulator/x86emu/decode.c	/^_INLINE u32 get_data_segment(void)$/;"	f	typeref:typename:_INLINE u32
get_dclk	arch/blackfin/lib/clocks.c	/^u_long get_dclk(void)$/;"	f	typeref:typename:u_long
get_dcr	arch/powerpc/cpu/ppc4xx/dcr.S	/^get_dcr:$/;"	l
get_ddr_bank_size	board/tqc/tqm834x/tqm834x.c	/^static long int get_ddr_bank_size(short cs, long *base)$/;"	f	typeref:typename:long int	file:
get_ddr_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_ddr_clk(void)$/;"	f	typeref:typename:u32	file:
get_ddr_config	board/rockchip/evb_rk3036/evb_rk3036.c	/^void get_ddr_config(struct rk3036_ddr_config *config)$/;"	f	typeref:typename:void
get_ddr_config	board/rockchip/kylin_rk3036/kylin_rk3036.c	/^void get_ddr_config(struct rk3036_ddr_config *config)$/;"	f	typeref:typename:void
get_ddr_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static const struct dpll_params *get_ddr_dpll_params$/;"	f	typeref:typename:const struct dpll_params *	file:
get_ddr_freq	arch/arm/cpu/armv7/ls102xa/clock.c	/^ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c	/^ulong get_ddr_freq(ulong ctrl_num)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/mips/mach-ath79/ar933x/clk.c	/^ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/mips/mach-ath79/ar934x/clk.c	/^ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/mips/mach-ath79/qca953x/clk.c	/^ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/powerpc/cpu/mpc83xx/speed.c	/^ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	arch/powerpc/cpu/mpc85xx/speed.c	/^ulong get_ddr_freq (ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_freq	include/common.h	/^static inline ulong get_ddr_freq(ulong dummy)$/;"	f	typeref:typename:ulong
get_ddr_phy_ctrl_1	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_ddr_phy_ctrl_1(u32 freq, u8 RL)$/;"	f	typeref:typename:u32	file:
get_ddrc_clk	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 get_ddrc_clk(void)$/;"	f	typeref:typename:u32	file:
get_debugreg	arch/x86/include/asm/control_regs.h	/^static inline unsigned long get_debugreg(int regno)$/;"	f	typeref:typename:unsigned long
get_dec	arch/powerpc/lib/interrupts.c	/^static __inline__ unsigned long get_dec (void)$/;"	f	typeref:typename:unsigned long	file:
get_def_locations	tools/buildman/kconfiglib.py	/^    def get_def_locations(self):$/;"	m	class:Choice
get_def_locations	tools/buildman/kconfiglib.py	/^    def get_def_locations(self):$/;"	m	class:Symbol
get_defconfig_filename	tools/buildman/kconfiglib.py	/^    def get_defconfig_filename(self):$/;"	m	class:Config
get_dent_type	fs/ubifs/debug.c	/^static const char *get_dent_type(int type)$/;"	f	typeref:typename:const char *	file:
get_dentfromdir	fs/fat/fat.c	/^static dir_entry *get_dentfromdir(fsdata *mydata, int startsect,$/;"	f	typeref:typename:dir_entry *	file:
get_desc	drivers/block/blk-uclass.c	/^static int get_desc(enum if_type if_type, int devnum, struct blk_desc **descp)$/;"	f	typeref:typename:int	file:
get_desc	drivers/block/blk_legacy.c	/^static int get_desc(struct blk_driver *drv, int devnum, struct blk_desc **descp)$/;"	f	typeref:typename:int	file:
get_desc	include/cpu.h	/^	int (*get_desc)(struct udevice *dev, char *buf, int size);$/;"	m	struct:cpu_ops	typeref:typename:int (*)(struct udevice * dev,char * buf,int size)
get_desc	include/tpm.h	/^	int (*get_desc)(struct udevice *dev, char *buf, int size);$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev,char * buf,int size)
get_descriptor_len	common/usb.c	/^static int get_descriptor_len(struct usb_device *dev, int len, int expect_len)$/;"	f	typeref:typename:int	file:
get_dev	include/blk.h	/^	int (*get_dev)(int devnum, struct blk_desc **descp);$/;"	m	struct:blk_driver	typeref:typename:int (*)(int devnum,struct blk_desc ** descp)
get_dev_hwpart	disk/part.c	/^static struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart)$/;"	f	typeref:struct:blk_desc *	file:
get_dev_hwpart	disk/part.c	/^struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart)$/;"	f	typeref:struct:blk_desc *
get_dev_speed	drivers/usb/musb/musb_hcd.c	/^static u8 get_dev_speed(struct usb_device *dev)$/;"	f	typeref:typename:u8	file:
get_dev_status	drivers/mtd/nand/mxc_nand.c	/^static uint16_t get_dev_status(struct mxc_nand_host *host)$/;"	f	typeref:typename:uint16_t	file:
get_devadd_addr	drivers/usb/host/r8a66597.h	/^#define get_devadd_addr(/;"	d
get_devfn	include/pci.h	/^	int (*get_devfn)(struct udevice *dev);$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev)
get_device	include/ubi_uboot.h	/^#define get_device(/;"	d
get_device_type	arch/arm/cpu/armv7/am33xx/sys_info.c	/^u32 get_device_type(void)$/;"	f	typeref:typename:u32
get_device_type	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^u32 get_device_type(void)$/;"	f	typeref:typename:u32
get_device_type	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_device_type(void)$/;"	f	typeref:typename:u32
get_device_type	arch/arm/cpu/armv7/s5p-common/cpu_info.c	/^u32 get_device_type(void)$/;"	f	typeref:typename:u32
get_devnull	tools/moveconfig.py	/^def get_devnull():$/;"	f
get_dfu_alt_boot	board/samsung/common/exynos5-dt.c	/^char *get_dfu_alt_boot(char *interface, char *devstr)$/;"	f	typeref:typename:char *
get_dfu_alt_boot	board/samsung/odroid/odroid.c	/^char *get_dfu_alt_boot(char *interface, char *devstr)$/;"	f	typeref:typename:char *
get_dfu_alt_system	board/samsung/common/exynos5-dt.c	/^char *get_dfu_alt_system(char *interface, char *devstr)$/;"	f	typeref:typename:char *
get_dfu_alt_system	board/samsung/odroid/odroid.c	/^char *get_dfu_alt_system(char *interface, char *devstr)$/;"	f	typeref:typename:char *
get_dimm_size	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void get_dimm_size(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
get_dir	tools/moveconfig.py	/^    def get_dir(self):$/;"	m	class:ReferenceSource
get_direction	drivers/gpio/tegra_gpio.c	/^static int get_direction(unsigned gpio)$/;"	f	typeref:typename:int	file:
get_dmacfg_reg	drivers/usb/host/r8a66597.h	/^static inline unsigned long get_dmacfg_reg(int port)$/;"	f	typeref:typename:unsigned long
get_dmm_section_size_map	arch/arm/cpu/armv7/omap-common/emif-common.c	/^u32 get_dmm_section_size_map(u32 section_size)$/;"	f	typeref:typename:u32
get_dollar_var	common/cli_hush.c	/^static char *get_dollar_var(char ch)$/;"	f	typeref:typename:char *	file:
get_dpaa_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset)$/;"	f	typeref:typename:int
get_dpl_apply_status	drivers/net/fsl-mc/mc.c	/^int get_dpl_apply_status(void)$/;"	f	typeref:typename:int
get_dpll_core_params	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params *get_dpll_core_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_core_params	board/compulab/cm_t43/spl.c	/^const struct dpll_params *get_dpll_core_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_core_params	board/ti/am43xx/board.c	/^const struct dpll_params *get_dpll_core_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/BuR/brppt1/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/BuR/brxre1/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/birdland/bav335x/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/bosch/shc/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/compulab/cm_t335/spl.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/compulab/cm_t43/spl.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/gumstix/pepper/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/isee/igep0033/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/phytec/pcm051/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/siemens/common/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/silica/pengwyn/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/tcl/sl50/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/ti/am335x/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/ti/am43xx/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_ddr_params	board/vscom/baltos/board.c	/^const struct dpll_params *get_dpll_ddr_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_mpu_params	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params *get_dpll_mpu_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_mpu_params	board/compulab/cm_t43/spl.c	/^const struct dpll_params *get_dpll_mpu_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_mpu_params	board/ti/am43xx/board.c	/^const struct dpll_params *get_dpll_mpu_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_per_params	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^const struct dpll_params *get_dpll_per_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_per_params	board/compulab/cm_t43/spl.c	/^const struct dpll_params *get_dpll_per_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dpll_per_params	board/ti/am43xx/board.c	/^const struct dpll_params *get_dpll_per_params(void)$/;"	f	typeref:typename:const struct dpll_params *
get_dsim_frame_done	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);$/;"	m	struct:mipi_dsim_master_ops	typeref:typename:int (*)(struct mipi_dsim_device * dsim)
get_dspi_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_dspi_clk(void)$/;"	f	typeref:typename:u32	file:
get_dvstctr_reg	drivers/usb/host/r8a66597.h	/^static inline unsigned long get_dvstctr_reg(int port)$/;"	f	typeref:typename:unsigned long
get_ecc_status	post/cpu/ppc4xx/denali_ecc.c	/^static uint32_t get_ecc_status(void)$/;"	f	typeref:typename:uint32_t	file:
get_eeprom	board/corscience/tricorder/tricorder.c	/^static void get_eeprom(struct tricorder_eeprom *eeprom)$/;"	f	typeref:typename:void	file:
get_eeprom_field_int	board/ifm/ac14xx/ac14xx.c	/^#define get_eeprom_field_int(/;"	d	file:
get_effective_memsize	board/Arcturus/ucp1020/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/denx/m53evk/m53evk.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/b4860qds/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/c29xpcie/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/mx53loco/mx53loco.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/p1010rdb/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/p1022ds/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/p1_p2_rdb_pc/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t102xqds/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t102xrdb/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t104xrdb/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t208xqds/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t208xrdb/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t4qds/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	board/freescale/t4rdb/spl.c	/^phys_size_t get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t
get_effective_memsize	common/memsize.c	/^phys_size_t __weak get_effective_memsize(void)$/;"	f	typeref:typename:phys_size_t __weak
get_efuse_mac_addr	board/compulab/cm_t335/cm_t335.c	/^static void get_efuse_mac_addr(uchar *enetaddr)$/;"	f	typeref:typename:void	file:
get_emacbase_by_name	drivers/net/at91_emac.c	/^at91_emac_t *get_emacbase_by_name(const char *devname)$/;"	f	typeref:typename:at91_emac_t *
get_emi_slow_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_emi_slow_clk(void)$/;"	f	typeref:typename:u32	file:
get_emi_slow_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_emi_slow_clk(void)$/;"	f	typeref:typename:u32	file:
get_emif_mem_size	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_emif_mem_size(u32 base)$/;"	f	typeref:typename:u32	file:
get_emif_rev	arch/arm/include/asm/emif.h	/^static inline u32 get_emif_rev(u32 base)$/;"	f	typeref:typename:u32
get_emul	drivers/i2c/sandbox_i2c.c	/^static int get_emul(struct udevice *dev, struct udevice **devp,$/;"	f	typeref:typename:int	file:
get_enable	include/power/regulator.h	/^	bool (*get_enable)(struct udevice *dev);$/;"	m	struct:dm_regulator_ops	typeref:typename:bool (*)(struct udevice * dev)
get_enabled	tools/ifdtool.c	/^static const char *get_enabled(int flag)$/;"	f	typeref:typename:const char *	file:
get_entry_start	arch/x86/lib/sfi.c	/^static void *get_entry_start(struct table_info *tab)$/;"	f	typeref:typename:void *	file:
get_env	test/py/tests/test_env.py	/^    def get_env(self):$/;"	m	class:StateTestEnv
get_env_id	cmd/nvedit.c	/^int get_env_id(void)$/;"	f	typeref:typename:int
get_ep_by_addr	drivers/usb/gadget/atmel_usba_udc.c	/^static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)$/;"	f	typeref:struct:usba_ep *	file:
get_eppi_clkdiv	board/bf548-ezkit/video.c	/^static inline u16 get_eppi_clkdiv(u32 target_ppi_clk)$/;"	f	typeref:typename:u16	file:
get_eppi_clkdiv	board/cm-bf548/video.c	/^static inline u16 get_eppi_clkdiv(u32 target_ppi_clk)$/;"	f	typeref:typename:u16	file:
get_errata_rows	drivers/ddr/altera/sdram.c	/^static int get_errata_rows(const struct socfpga_sdram_config *cfg)$/;"	f	typeref:typename:int	file:
get_escape_char	lib/slre.c	/^get_escape_char(const char **re)$/;"	f	typeref:typename:int	file:
get_esdhc_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_esdhc_clk(u32 port)$/;"	f	typeref:typename:u32	file:
get_esr	arch/powerpc/cpu/mpc85xx/traps.c	/^static __inline__ unsigned long get_esr(void)$/;"	f	typeref:typename:unsigned long	file:
get_esr	arch/powerpc/cpu/ppc4xx/traps.c	/^static __inline__ unsigned long get_esr(void)$/;"	f	typeref:typename:unsigned long	file:
get_eth_env_param	board/ti/ks2_evm/board.c	/^int get_eth_env_param(char *env_name)$/;"	f	typeref:typename:int
get_ether_addr	drivers/usb/gadget/ether.c	/^static int get_ether_addr(const char *str, u8 *dev_addr)$/;"	f	typeref:typename:int	file:
get_existent_var	test/py/tests/test_env.py	/^    def get_existent_var(self):$/;"	m	class:StateTestEnv
get_expansion_id	board/overo/overo.c	/^unsigned int get_expansion_id(void)$/;"	f	typeref:typename:unsigned int
get_expansion_id	board/ti/beagle/beagle.c	/^static unsigned int get_expansion_id(void)$/;"	f	typeref:typename:unsigned int	file:
get_expect_output	test/py/u_boot_spawn.py	/^    def get_expect_output(self):$/;"	m	class:Spawn
get_extension_chip_id	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^unsigned int get_extension_chip_id(void)$/;"	f	typeref:typename:unsigned int
get_extension_chip_id	arch/arm/mach-at91/armv7/cpu.c	/^unsigned int get_extension_chip_id(void)$/;"	f	typeref:typename:unsigned int
get_factory_record_val	board/siemens/common/factoryset.c	/^int get_factory_record_val(unsigned char *eeprom_buf, int size,	uchar *record,$/;"	f	typeref:typename:int	file:
get_factory_val	board/siemens/common/factoryset.c	/^static int get_factory_val(unsigned char *eeprom_buf, int size, uchar *name,$/;"	f	typeref:typename:int	file:
get_failed_boards	tools/moveconfig.py	/^    def get_failed_boards(self):$/;"	m	class:Slot
get_fatent	fs/fat/fat.c	/^static __u32 get_fatent(fsdata *mydata, __u32 entry)$/;"	f	typeref:typename:__u32	file:
get_fatent_value	fs/fat/fat_write.c	/^static __u32 get_fatent_value(fsdata *mydata, __u32 entry)$/;"	f	typeref:typename:__u32	file:
get_fb_frame_done	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*get_fb_frame_done)(void);$/;"	m	struct:mipi_dsim_master_ops	typeref:typename:int (*)(void)
get_fbdv	arch/powerpc/cpu/ppc4xx/speed.c	/^static unsigned char get_fbdv(unsigned char index)$/;"	f	typeref:typename:unsigned char	file:
get_fdt_phys	board/freescale/qemu-ppce500/qemu-ppce500.c	/^static uint64_t get_fdt_phys(void)$/;"	f	typeref:typename:uint64_t	file:
get_fdt_virt	board/freescale/qemu-ppce500/qemu-ppce500.c	/^static void *get_fdt_virt(void)$/;"	f	typeref:typename:void *	file:
get_fec_clk	arch/arm/cpu/armv7/vf610/generic.c	/^u32 get_fec_clk(void)$/;"	f	typeref:typename:u32
get_fec_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_fec_clk(void)$/;"	f	typeref:typename:u32	file:
get_fifo	drivers/usb/gadget/designware_udc.c	/^static void *get_fifo(int ep_num, int in)$/;"	f	typeref:typename:void *	file:
get_filesystem_dnode	fs/zfs/zfs.c	/^get_filesystem_dnode(dnode_end_t *mosmdn, char *fsname,$/;"	f	typeref:typename:int	file:
get_fiq_stack	arch/arm/lib/vectors.S	/^	.macro get_fiq_stack			@ setup FIQ stack$/;"	m
get_fl_mem	fs/jffs2/jffs2_1pass.c	/^static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_fl_mem_nand	fs/jffs2/jffs2_1pass.c	/^static void *get_fl_mem_nand(u32 off, u32 size, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_fl_mem_nor	fs/jffs2/jffs2_1pass.c	/^static inline void *get_fl_mem_nor(u32 off, u32 size, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_fl_mem_onenand	fs/jffs2/jffs2_1pass.c	/^static void *get_fl_mem_onenand(u32 off, u32 size, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_fms	arch/x86/cpu/cpu.c	/^static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms)$/;"	f	typeref:typename:void	file:
get_fpga_state	board/gdsys/405ep/405ep.c	/^int get_fpga_state(unsigned dev)$/;"	f	typeref:typename:int
get_fpga_state	board/gdsys/405ex/405ex.c	/^int get_fpga_state(unsigned dev)$/;"	f	typeref:typename:int
get_fpga_state	board/gdsys/mpc8308/mpc8308.c	/^int get_fpga_state(unsigned dev)$/;"	f	typeref:typename:int
get_fpm	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_fpm(void)$/;"	f	typeref:typename:u32	file:
get_frame	include/linux/usb/gadget.h	/^	int	(*get_frame)(struct usb_gadget *);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *)
get_fs	fs/ext4/ext4fs.c	/^struct ext_filesystem *get_fs(void)$/;"	f	typeref:struct:ext_filesystem *
get_fs_gd_ptr	arch/x86/include/asm/global_data.h	/^static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)$/;"	f	typeref:typename:gd_t *
get_fsr	arch/sparc/include/asm/psr.h	/^static __inline__ unsigned int get_fsr(void)$/;"	f	typeref:typename:unsigned int
get_function	drivers/gpio/gpio-uclass.c	/^int get_function(struct udevice *dev, int offset, bool skip_unused,$/;"	f	typeref:typename:int
get_function	include/asm-generic/gpio.h	/^	int (*get_function)(struct udevice *dev, unsigned offset);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset)
get_function_name	include/dm/pinctrl.h	/^	const char *(*get_function_name)(struct udevice *dev,$/;"	m	struct:pinctrl_ops	typeref:typename:const char * (*)(struct udevice * dev,unsigned selector)
get_functions_count	include/dm/pinctrl.h	/^	int (*get_functions_count)(struct udevice *dev);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev)
get_gadget_data	include/linux/usb/gadget.h	/^static inline void *get_gadget_data(struct usb_gadget *gadget)$/;"	f	typeref:typename:void *
get_gd	arch/arm/include/asm/global_data.h	/^static inline gd_t *get_gd(void)$/;"	f	typeref:typename:gd_t *
get_gdt	lib/efi/efi_stub.c	/^static void get_gdt(struct desctab_info *info)$/;"	f	typeref:typename:void	file:
get_gicc_addr	arch/arm/cpu/armv7/nonsec_virt.S	/^.macro get_gicc_addr	addr, tmp$/;"	m
get_gicd_addr	arch/arm/cpu/armv7/nonsec_virt.S	/^.macro get_gicd_addr	addr$/;"	m
get_gicd_base_address	arch/arm/cpu/armv7/virt-v7.c	/^static unsigned long get_gicd_base_address(void)$/;"	f	typeref:typename:unsigned long	file:
get_global_timer_base	arch/arm/mach-uniphier/arm32/timer.c	/^static void *get_global_timer_base(void)$/;"	f	typeref:typename:void *	file:
get_global_turbo_state	arch/x86/cpu/turbo.c	/^static inline int get_global_turbo_state(void)$/;"	f	typeref:typename:int	file:
get_gmac_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static const struct dpll_params *get_gmac_dpll_params$/;"	f	typeref:typename:const struct dpll_params *	file:
get_gpio_addr	drivers/gpio/db8500_gpio.c	/^static void __iomem *get_gpio_addr(unsigned gpio)$/;"	f	typeref:typename:void __iomem *	file:
get_gpio_bank	drivers/gpio/omap_gpio.c	/^static inline const struct gpio_bank *get_gpio_bank(int gpio)$/;"	f	typeref:typename:const struct gpio_bank *	file:
get_gpio_base	arch/arm/include/asm/arch-armada100/gpio.h	/^static inline void *get_gpio_base(int bank)$/;"	f	typeref:typename:void *
get_gpio_base	include/pch.h	/^	int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);$/;"	m	struct:pch_ops	typeref:typename:int (*)(struct udevice * dev,u32 * gbasep)
get_gpio_data	arch/arm/mach-exynos/include/mach/gpio.h	/^static inline struct gpio_info *get_gpio_data(void)$/;"	f	typeref:struct:gpio_info *
get_gpio_data	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^static inline struct gpio_info *get_gpio_data(void)$/;"	f	typeref:struct:gpio_info *
get_gpio_dir	drivers/gpio/adi_gpio2.c	/^unsigned short get_gpio_dir(unsigned gpio)$/;"	f	typeref:typename:unsigned short
get_gpio_enum_id	drivers/gpio/sh_pfc.c	/^static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,$/;"	f	typeref:typename:int	file:
get_gpio_flag	drivers/gpio/sandbox.c	/^static int get_gpio_flag(struct udevice *dev, unsigned offset, int flag)$/;"	f	typeref:typename:int	file:
get_gpio_flags	drivers/gpio/sandbox.c	/^static u8 *get_gpio_flags(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:u8 *	file:
get_gpio_index	drivers/gpio/omap_gpio.c	/^static inline int get_gpio_index(int gpio)$/;"	f	typeref:typename:int	file:
get_gpio_mux	include/dm/pinctrl.h	/^	int (*get_gpio_mux)(struct udevice *dev, int banknum, int index);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,int banknum,int index)
get_gpio_offset	drivers/gpio/db8500_gpio.c	/^static unsigned get_gpio_offset(unsigned gpio)$/;"	f	typeref:typename:unsigned	file:
get_gpmc0_base	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_gpmc0_base(void)$/;"	f	typeref:typename:u32
get_gpmc0_width	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_gpmc0_width(void)$/;"	f	typeref:typename:u32
get_group_name	include/dm/pinctrl.h	/^	const char *(*get_group_name)(struct udevice *dev, unsigned selector);$/;"	m	struct:pinctrl_ops	typeref:typename:const char * (*)(struct udevice * dev,unsigned selector)
get_groups_count	include/dm/pinctrl.h	/^	int (*get_groups_count)(struct udevice *dev);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev)
get_guid_hob_data	arch/x86/include/asm/fsp/fsp_hob.h	/^static inline void *get_guid_hob_data(const struct hob_header *hdr)$/;"	f	typeref:typename:void *
get_guid_hob_data_size	arch/x86/include/asm/fsp/fsp_hob.h	/^static inline u16 get_guid_hob_data_size(const struct hob_header *hdr)$/;"	f	typeref:typename:u16
get_h32mxdiv	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned int get_h32mxdiv(void)$/;"	f	typeref:typename:unsigned int
get_hab_status	arch/arm/imx-common/hab.c	/^int get_hab_status(void)$/;"	f	typeref:typename:int
get_hash_type	drivers/crypto/fsl/fsl_hash.c	/^static enum caam_hash_algos get_hash_type(struct hash_algo *algo)$/;"	f	typeref:enum:caam_hash_algos	file:
get_hclk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long get_hclk(void)$/;"	f	typeref:typename:unsigned long	file:
get_hclk_clk_div	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_hclk_clk_div(void)$/;"	f	typeref:typename:unsigned int
get_hclk_clk_rate	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_hclk_clk_rate(void)$/;"	f	typeref:typename:unsigned int
get_hclk_pll_rate	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_hclk_pll_rate(void)$/;"	f	typeref:typename:unsigned int
get_hclk_sys	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long get_hclk_sys(int dom)$/;"	f	typeref:typename:unsigned long	file:
get_heap_comp_val	fs/ubifs/lprops.c	/^static int get_heap_comp_val(struct ubifs_lprops *lprops, int cat)$/;"	f	typeref:typename:int	file:
get_help	tools/buildman/kconfiglib.py	/^    def get_help(self):$/;"	m	class:Choice
get_help	tools/buildman/kconfiglib.py	/^    def get_help(self):$/;"	m	class:Symbol
get_hid0	include/mpc86xx.h	/^static __inline__ unsigned long get_hid0 (void)$/;"	f	typeref:typename:unsigned long
get_hid1	include/mpc86xx.h	/^static __inline__ unsigned long get_hid1 (void)$/;"	f	typeref:typename:unsigned long
get_hreg	board/gdsys/p1022/controlcenterd-id.c	/^static struct h_reg *get_hreg(uint8_t spec)$/;"	f	typeref:struct:h_reg *	file:
get_hsb_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_hsb_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_hub_data	drivers/usb/host/r8a66597-hcd.c	/^static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)$/;"	f	typeref:typename:void	file:
get_hw_rev	board/esd/meesc/meesc.c	/^int get_hw_rev(void)$/;"	f	typeref:typename:int
get_hw_revision	board/samsung/trats/trats.c	/^static unsigned int get_hw_revision(void)$/;"	f	typeref:typename:unsigned int	file:
get_hw_revision	board/samsung/universal_c210/universal.c	/^static unsigned int get_hw_revision(void)$/;"	f	typeref:typename:unsigned int	file:
get_hwrev	board/samsung/universal_c210/universal.c	/^static int get_hwrev(void)$/;"	f	typeref:typename:int	file:
get_hwver	board/gdsys/405ep/dlvision-10g.c	/^static unsigned int get_hwver(void)$/;"	f	typeref:typename:unsigned int	file:
get_hynix_nand_para	drivers/mtd/nand/denali.c	/^static void get_hynix_nand_para(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
get_i2c_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_i2c_clk(void)$/;"	f	typeref:typename:u32	file:
get_i2c_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_i2c_clk(void)$/;"	f	typeref:typename:u32	file:
get_i2c_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_i2c_clk(void)$/;"	f	typeref:typename:unsigned long
get_i2c_clk	arch/blackfin/include/asm/clock.h	/^# define get_i2c_clk /;"	d
get_i2c_clock	drivers/i2c/fsl_i2c.c	/^static unsigned int get_i2c_clock(int bus)$/;"	f	typeref:typename:unsigned int	file:
get_id_detect_gpio	arch/arm/mach-sunxi/usb_phy.c	/^static int get_id_detect_gpio(int index)$/;"	f	typeref:typename:int	file:
get_idx	arch/arm/imx-common/hab.c	/^static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)$/;"	f	typeref:typename:uint8_t	file:
get_ie_info_addr	board/freescale/common/fsl_validate.c	/^static int get_ie_info_addr(u32 *ie_addr)$/;"	f	typeref:typename:int	file:
get_ifc_amask	include/fsl_ifc.h	/^#define get_ifc_amask(/;"	d
get_ifc_csor	include/fsl_ifc.h	/^#define get_ifc_csor(/;"	d
get_ifc_csor_ext	include/fsl_ifc.h	/^#define get_ifc_csor_ext(/;"	d
get_ifc_cspr	include/fsl_ifc.h	/^#define get_ifc_cspr(/;"	d
get_ifc_cspr_ext	include/fsl_ifc.h	/^#define get_ifc_cspr_ext(/;"	d
get_ifc_ftim	include/fsl_ifc.h	/^#define get_ifc_ftim(/;"	d
get_image_location	board/gdsys/p1022/controlcenterd-id.c	/^static u8 *get_image_location(void)$/;"	f	typeref:typename:u8 *	file:
get_image_used	drivers/misc/cros_ec_sandbox.c	/^static int get_image_used(struct ec_state *ec, struct fmap_entry *entry)$/;"	f	typeref:typename:int	file:
get_immr	arch/powerpc/cpu/mpc5xx/start.S	/^get_immr:$/;"	l
get_immr	arch/powerpc/cpu/mpc8xx/start.S	/^get_immr:$/;"	l
get_imx_reset_cause	arch/arm/imx-common/cpu.c	/^u32 get_imx_reset_cause(void)$/;"	f	typeref:typename:u32
get_imx_type	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^const char *get_imx_type(u32 imxtype)$/;"	f	typeref:typename:const char *
get_imx_type	arch/arm/imx-common/cpu.c	/^const char *get_imx_type(u32 imxtype)$/;"	f	typeref:typename:const char *
get_info	drivers/usb/eth/usb_ether.c	/^	usb_eth_get_info		get_info;$/;"	m	struct:usb_eth_prob_dev	typeref:typename:usb_eth_get_info	file:
get_info	include/cpu.h	/^	int (*get_info)(struct udevice *dev, struct cpu_info *info);$/;"	m	struct:cpu_ops	typeref:typename:int (*)(struct udevice * dev,struct cpu_info * info)
get_info	include/part.h	/^	int (*get_info)(struct blk_desc *dev_desc, int part,$/;"	m	struct:part_driver	typeref:typename:int (*)(struct blk_desc * dev_desc,int part,disk_partition_t * info)
get_info	include/ram.h	/^	int (*get_info)(struct udevice *dev, struct ram_info *info);$/;"	m	struct:ram_ops	typeref:typename:int (*)(struct udevice * dev,struct ram_info * info)
get_intenb_reg	drivers/usb/host/r8a66597.h	/^static inline unsigned long get_intenb_reg(int port)$/;"	f	typeref:typename:unsigned long
get_internval_val_mhz	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^static unsigned long get_internval_val_mhz(void)$/;"	f	typeref:typename:unsigned long	file:
get_intsts_reg	drivers/usb/host/r8a66597.h	/^static inline unsigned long get_intsts_reg(int port)$/;"	f	typeref:typename:unsigned long
get_io_base	include/pch.h	/^	int (*get_io_base)(struct udevice *dev, u32 *iobasep);$/;"	m	struct:pch_ops	typeref:typename:int (*)(struct udevice * dev,u32 * iobasep)
get_ioregs	arch/arm/cpu/armv7/omap5/hw_data.c	/^void get_ioregs(const struct ctrl_ioregs **regs)$/;"	f	typeref:typename:void
get_ipg_clk	arch/arm/cpu/arm1136/mx35/generic.c	/^static u32 get_ipg_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_ipg_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_ipg_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_clk	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 get_ipg_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_ipg_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_per_clk	arch/arm/cpu/arm1136/mx35/generic.c	/^static u32 get_ipg_per_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_per_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_ipg_per_clk(void)$/;"	f	typeref:typename:u32	file:
get_ipg_per_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_ipg_per_clk(void)$/;"	f	typeref:typename:u32	file:
get_irom_func	arch/arm/mach-exynos/spl_boot.c	/^void *get_irom_func(int index)$/;"	f	typeref:typename:void *
get_irq_slot_count	arch/x86/include/asm/pirq_routing.h	/^static inline int get_irq_slot_count(struct irq_routing_table *rt)$/;"	f	typeref:typename:int
get_irq_stack	arch/arm/lib/vectors.S	/^	.macro get_irq_stack			@ setup IRQ stack$/;"	m
get_isa16_mode	arch/mips/include/asm/mipsregs.h	/^#define get_isa16_mode(/;"	d
get_items	tools/buildman/kconfiglib.py	/^    def get_items(self):$/;"	m	class:Choice
get_items	tools/buildman/kconfiglib.py	/^    def get_items(self, recursive=False):$/;"	m	class:Menu
get_iva_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^get_iva_dpll_param:$/;"	l
get_iva_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const struct dpll_params *get_iva_dpll_params(struct dplls const *dpll_data)$/;"	f	typeref:typename:const struct dpll_params *
get_kconfig_filename	tools/buildman/kconfiglib.py	/^    def get_kconfig_filename(self):$/;"	m	class:Config
get_kernel_version	scripts/kernel-doc	/^sub get_kernel_version() {$/;"	s
get_key_fmt	fs/ubifs/debug.c	/^static const char *get_key_fmt(int fmt)$/;"	f	typeref:typename:const char *	file:
get_key_hash	fs/ubifs/debug.c	/^static const char *get_key_hash(int hash)$/;"	f	typeref:typename:const char *	file:
get_key_len	board/freescale/common/fsl_validate.c	/^static inline u32 get_key_len(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:u32	file:
get_key_revoc	board/freescale/common/fsl_validate.c	/^static u32 get_key_revoc(void)$/;"	f	typeref:typename:u32	file:
get_key_type	fs/ubifs/debug.c	/^static const char *get_key_type(int type)$/;"	f	typeref:typename:const char *	file:
get_keyword	cmd/pxe.c	/^static void get_keyword(struct token *t)$/;"	f	typeref:typename:void	file:
get_l2cr	include/mpc86xx.h	/^static __inline__ unsigned long get_l2cr (void)$/;"	f	typeref:typename:unsigned long
get_label	arch/blackfin/cpu/gpio.c	/^#define get_label(/;"	d	file:
get_label	arch/blackfin/cpu/gpio.c	/^static char *get_label(unsigned short ident)$/;"	f	typeref:typename:char *	file:
get_label	drivers/gpio/adi_gpio2.c	/^static char *get_label(unsigned short ident)$/;"	f	typeref:typename:char *	file:
get_last_modify_commit	scripts/fill_scrapyard.py	/^def get_last_modify_commit(file, line_num):$/;"	f
get_law_base_addr	arch/powerpc/cpu/mpc8xxx/law.c	/^static inline phys_addr_t get_law_base_addr(int idx)$/;"	f	typeref:typename:phys_addr_t	file:
get_law_entry	arch/powerpc/cpu/mpc8xxx/law.c	/^static int get_law_entry(u8 i, struct law_entry *e)$/;"	f	typeref:typename:int	file:
get_lbc_br	arch/powerpc/include/asm/fsl_lbc.h	/^#define get_lbc_br(/;"	d
get_lbc_lbcr	arch/powerpc/include/asm/fsl_lbc.h	/^#define get_lbc_lbcr(/;"	d
get_lbc_lcrr	arch/powerpc/include/asm/fsl_lbc.h	/^#define get_lbc_lcrr(/;"	d
get_lbc_or	arch/powerpc/include/asm/fsl_lbc.h	/^#define get_lbc_or(/;"	d
get_lcd_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_lcd_clk(void)$/;"	f	typeref:typename:unsigned long
get_lcdc_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_lcdc_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_led_cmd	cmd/led.c	/^enum led_cmd get_led_cmd(char *var)$/;"	f	typeref:enum:led_cmd
get_led_gpio	board/ti/beagle/led.c	/^static int get_led_gpio(led_id_t mask)$/;"	f	typeref:typename:int	file:
get_liability	fs/ubifs/budget.c	/^static long long get_liability(struct ubifs_info *c)$/;"	f	typeref:typename:long long	file:
get_light	drivers/demo/demo-shape.c	/^static int get_light(struct udevice *dev)$/;"	f	typeref:typename:int	file:
get_light	include/dm-demo.h	/^	int (*get_light)(struct udevice *dev);$/;"	m	struct:demo_ops	typeref:typename:int (*)(struct udevice * dev)
get_line	scripts/kconfig/lxdialog/textbox.c	/^static char *get_line(void)$/;"	f	typeref:typename:char *	file:
get_line	scripts/kconfig/nconf.gui.c	/^const char *get_line(const char *text, int line_no)$/;"	f	typeref:typename:const char *
get_line_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^u32 get_line_cfg(u32 line_num, MV_BIN_SERDES_CFG *info)$/;"	f	typeref:typename:u32
get_line_length	scripts/kconfig/nconf.gui.c	/^int get_line_length(const char *line)$/;"	f	typeref:typename:int
get_line_no	scripts/kconfig/nconf.gui.c	/^int get_line_no(const char *text)$/;"	f	typeref:typename:int
get_linear_ram_size	board/freescale/qemu-ppce500/qemu-ppce500.c	/^static uint64_t get_linear_ram_size(void)$/;"	f	typeref:typename:uint64_t	file:
get_link_speed	drivers/net/davinci_emac.h	/^	int	(*get_link_speed)(int phy_addr);$/;"	m	struct:__anon759824920408	typeref:typename:int (*)(int phy_addr)
get_link_status	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			get_link_status;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
get_link_status	drivers/net/e1000.h	/^	bool get_link_status;$/;"	m	struct:e1000_hw	typeref:typename:bool
get_list_role	scripts/get_maintainer.pl	/^sub get_list_role {$/;"	s
get_local_var	common/cli_hush.c	/^char *get_local_var(const char *s)$/;"	f	typeref:typename:char *
get_location	tools/buildman/kconfiglib.py	/^    def get_location(self):$/;"	m	class:Comment
get_location	tools/buildman/kconfiglib.py	/^    def get_location(self):$/;"	m	class:Menu
get_long_file_name	fs/fat/fat_write.c	/^get_long_file_name(fsdata *mydata, int curclust, __u8 *cluster,$/;"	f	typeref:typename:int	file:
get_lower_bound	tools/buildman/kconfiglib.py	/^    def get_lower_bound(self):$/;"	m	class:Symbol
get_lp_apm	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_lp_apm(void)$/;"	f	typeref:typename:u32	file:
get_lpddr2_io_width	arch/arm/cpu/armv7/omap-common/emif-common.c	/^const char *get_lpddr2_io_width(u8 width_id)$/;"	f	typeref:typename:const char *
get_lpddr2_manufacturer	arch/arm/cpu/armv7/omap-common/emif-common.c	/^const char *get_lpddr2_manufacturer(u32 manufacturer)$/;"	f	typeref:typename:const char *
get_lpddr2_mr_regs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs)$/;"	f	typeref:typename:void
get_lpddr2_mr_regs	arch/arm/cpu/armv7/omap5/sdram.c	/^void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs)$/;"	f	typeref:typename:void
get_lpddr2_type	arch/arm/cpu/armv7/omap-common/emif-common.c	/^const char *get_lpddr2_type(u8 type_id)$/;"	f	typeref:typename:const char *
get_lpt_node_len	fs/ubifs/lpt_commit.c	/^static int get_lpt_node_len(const struct ubifs_info *c, int node_type)$/;"	f	typeref:typename:int	file:
get_lpt_node_type	fs/ubifs/lpt_commit.c	/^static int get_lpt_node_type(const struct ubifs_info *c, uint8_t *buf,$/;"	f	typeref:typename:int	file:
get_m_n_optimized	tools/omap/clocks_get_m_n.c	/^int get_m_n_optimized(u32 target_freq_khz, u32 ref_freq_khz, u32 *M, u32 *N)$/;"	f	typeref:typename:int
get_mac_addr	board/davinci/da8xxevm/da850evm.c	/^static int get_mac_addr(u8 *addr)$/;"	f	typeref:typename:int	file:
get_mac_addr	board/davinci/da8xxevm/omapl138_lcdk.c	/^static int  get_mac_addr(u8 *addr)$/;"	f	typeref:typename:int	file:
get_mac_address	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_tag_get_mac_address get_mac_address;$/;"	m	struct:msg_get_mac_address	typeref:struct:bcm2835_mbox_tag_get_mac_address	file:
get_mac_reg	board/micronas/vct/smc_eeprom.c	/^static ulong get_mac_reg(int reg)$/;"	f	typeref:typename:ulong	file:
get_macb_hclk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_macb_pclk_rate	arch/arm/include/asm/arch-spear/clk.h	/^static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_macb_pclk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_macb_pclk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_main_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_main_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_mainmenu_text	tools/buildman/kconfiglib.py	/^    def get_mainmenu_text(self):$/;"	m	class:Config
get_maintainer_role	scripts/get_maintainer.pl	/^sub get_maintainer_role {$/;"	s
get_maintainers	scripts/get_maintainer.pl	/^sub get_maintainers {$/;"	s
get_maintainers	tools/genboardscfg.py	/^    def get_maintainers(self, target):$/;"	m	class:MaintainersDatabase
get_major_version	arch/arm/mach-tegra/tegra20/warmboot.c	/^static u32 get_major_version(void)$/;"	f	typeref:typename:u32	file:
get_make_cmd	tools/moveconfig.py	/^def get_make_cmd():$/;"	f
get_master_node	fs/ubifs/recovery.c	/^static int get_master_node(const struct ubifs_info *c, int lnum, void **pbuf,$/;"	f	typeref:typename:int	file:
get_matched_defconfigs	tools/moveconfig.py	/^def get_matched_defconfigs(defconfigs_file):$/;"	f
get_max98095_codec_values	drivers/sound/max98095.c	/^static int get_max98095_codec_values(struct sound_codec_info *pcodec_info,$/;"	f	typeref:typename:int	file:
get_max_arm_speed	arch/arm/mach-keystone/clock.c	/^int get_max_arm_speed(int *spds)$/;"	f	typeref:typename:int
get_max_dev_speed	arch/arm/mach-keystone/clock.c	/^int get_max_dev_speed(int *spds)$/;"	f	typeref:typename:int
get_max_speed	arch/arm/mach-keystone/clock.c	/^static int get_max_speed(u32 val, u32 speed_supported, int *spds)$/;"	f	typeref:typename:int	file:
get_mc2_present	board/gdsys/405ep/dlvision-10g.c	/^static unsigned int get_mc2_present(void)$/;"	f	typeref:typename:unsigned int	file:
get_mc_boot_status	drivers/net/fsl-mc/mc.c	/^int get_mc_boot_status(void)$/;"	f	typeref:typename:int
get_mc_boot_timeout_ms	drivers/net/fsl-mc/mc.c	/^static unsigned long get_mc_boot_timeout_ms(void)$/;"	f	typeref:typename:unsigned long	file:
get_mci_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_mci_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_mci_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_mci_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_mck_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_mck_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_mcsr	arch/powerpc/include/asm/ppc4xx.h	/^static inline u32 get_mcsr(void)$/;"	f	typeref:typename:u32
get_mcuPLLCLK	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_mcuPLLCLK(void)$/;"	f	typeref:typename:ulong
get_mcu_main_clk	arch/arm/cpu/arm1136/mx35/generic.c	/^static u32 get_mcu_main_clk(void)$/;"	f	typeref:typename:u32	file:
get_mcu_main_clk	arch/arm/cpu/armv7/mx5/clock.c	/^u32 get_mcu_main_clk(void)$/;"	f	typeref:typename:u32
get_mcu_main_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_mcu_main_clk(void)$/;"	f	typeref:typename:u32	file:
get_mcu_main_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_mcu_main_clk(void)$/;"	f	typeref:typename:u32	file:
get_mcu_main_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_mcu_main_clk(void)$/;"	f	typeref:typename:u32	file:
get_mdio	include/miiphy.h	/^	int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus,int * v)
get_medium_size	include/dfu.h	/^	long (*get_medium_size)(struct dfu_entity *dfu);$/;"	m	struct:dfu_entity	typeref:typename:long (*)(struct dfu_entity * dfu)
get_mem	lib/linux_compat.c	/^struct kmem_cache *get_mem(int element_sz)$/;"	f	typeref:struct:kmem_cache *
get_mem_config	board/cm5200/cm5200.c	/^static mem_conf_t* get_mem_config(int board_type)$/;"	f	typeref:typename:mem_conf_t *	file:
get_membase	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static u32 *get_membase(int bxcr_num)$/;"	f	typeref:typename:u32 *	file:
get_memory_clk_period_ps	drivers/ddr/fsl/util.c	/^unsigned int get_memory_clk_period_ps(const unsigned int ctrl_num)$/;"	f	typeref:typename:unsigned int
get_memory_reg_prop	arch/arm/mach-mvebu/arm64-common.c	/^static const void *get_memory_reg_prop(const void *fdt, int *lenp)$/;"	f	typeref:typename:const void *	file:
get_memory_reg_prop	arch/arm/mach-uniphier/dram_init.c	/^static const void *get_memory_reg_prop(const void *fdt, int *lenp)$/;"	f	typeref:typename:const void *	file:
get_menus	tools/buildman/kconfiglib.py	/^    def get_menus(self):$/;"	m	class:Config
get_mext_match	scripts/kconfig/nconf.c	/^static int get_mext_match(const char *match_str, match_f flag)$/;"	f	typeref:typename:int	file:
get_mmc_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_mmc_clk(int dev_index)$/;"	f	typeref:typename:unsigned long
get_mmc_clk	include/dwmmc.h	/^	unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq);$/;"	m	struct:dwmci_host	typeref:typename:unsigned int (*)(struct dwmci_host * host,uint freq)
get_mmc_num	drivers/mmc/mmc-uclass.c	/^int get_mmc_num(void)$/;"	f	typeref:typename:int
get_mmc_num	drivers/mmc/mmc_legacy.c	/^int get_mmc_num(void)$/;"	f	typeref:typename:int
get_mmdc_ch0_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_mmdc_ch0_clk(void)$/;"	f	typeref:typename:u32	file:
get_mode	include/power/regulator.h	/^	int (*get_mode)(struct udevice *dev);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev)
get_mode	tools/buildman/kconfiglib.py	/^    def get_mode(self):$/;"	m	class:Choice
get_mode_name	cmd/regulator.c	/^static const char *get_mode_name(struct dm_regulator_mode *mode,$/;"	f	typeref:typename:const char *	file:
get_model_rev	board/samsung/trats2/trats2.c	/^static inline u32 get_model_rev(void)$/;"	f	typeref:typename:u32	file:
get_mpu_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^get_mpu_dpll_param:$/;"	l
get_mpu_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const struct dpll_params *get_mpu_dpll_params(struct dplls const *dpll_data)$/;"	f	typeref:typename:const struct dpll_params *
get_mr	arch/arm/cpu/armv7/am33xx/ddr.c	/^static inline u32 get_mr(int nr, u32 cs, u32 mr_addr)$/;"	f	typeref:typename:u32	file:
get_mr	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static inline u32 get_mr(u32 base, u32 cs, u32 mr_addr)$/;"	f	typeref:typename:u32	file:
get_ms_timer	drivers/timer/tsc_timer.c	/^static ulong get_ms_timer(void)$/;"	f	typeref:typename:ulong	file:
get_msr	arch/powerpc/cpu/mpc8xx/speed.c	/^static __inline__ unsigned long get_msr(void)$/;"	f	typeref:typename:unsigned long	file:
get_msr	arch/powerpc/lib/interrupts.c	/^static __inline__ unsigned long get_msr (void)$/;"	f	typeref:typename:unsigned long	file:
get_msr	arch/powerpc/lib/kgdb.c	/^get_msr(void)$/;"	f	typeref:typename:unsigned long	file:
get_msr	examples/standalone/timer.c	/^static __inline__ unsigned long get_msr(void)$/;"	f	typeref:typename:unsigned long	file:
get_mtd_device	drivers/mtd/mtdcore.c	/^struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num)$/;"	f	typeref:struct:mtd_info *
get_mtd_device_nm	drivers/mtd/mtdcore.c	/^struct mtd_info *get_mtd_device_nm(const char *name)$/;"	f	typeref:struct:mtd_info *
get_mtd_info	cmd/mtdparts.c	/^static int get_mtd_info(u8 type, u8 num, struct mtd_info **mtd)$/;"	f	typeref:typename:int	file:
get_multi_scl_pin	board/samsung/common/multi_i2c.c	/^int get_multi_scl_pin(void)$/;"	f	typeref:typename:int
get_multi_sda_pin	board/samsung/common/multi_i2c.c	/^int get_multi_sda_pin(void)$/;"	f	typeref:typename:int
get_my_id	arch/powerpc/cpu/mpc85xx/mp.c	/^u32 get_my_id()$/;"	f	typeref:typename:u32
get_name	drivers/gpio/xilinx_gpio.c	/^static char *get_name(unsigned gpio)$/;"	f	typeref:typename:char *	file:
get_name	fs/fat/fat.c	/^static void get_name(dir_entry *dirent, char *s_name)$/;"	f	typeref:typename:void	file:
get_name	tools/buildman/kconfiglib.py	/^    def get_name(self):$/;"	m	class:Choice
get_name	tools/buildman/kconfiglib.py	/^    def get_name(self):$/;"	m	class:Symbol
get_nand_env_oob	common/env_nand.c	/^int get_nand_env_oob(struct mtd_info *mtd, unsigned long *result)$/;"	f	typeref:typename:int
get_next	tools/buildman/kconfiglib.py	/^    def get_next(self):$/;"	m	class:_Feed
get_next	tools/buildman/kconfiglib.py	/^    def get_next(self):$/;"	m	class:_FileFeed
get_next_command	drivers/usb/gadget/f_mass_storage.c	/^static int get_next_command(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
get_next_hob	arch/x86/include/asm/fsp/fsp_hob.h	/^static inline const struct hob_header *get_next_hob(const struct hob_header *hdr)$/;"	f	typeref:typename:const struct hob_header *
get_next_reqip	drivers/block/sata_mv.c	/^static int get_next_reqip(int port)$/;"	f	typeref:typename:int	file:
get_next_rspop	drivers/block/sata_mv.c	/^static int get_next_rspop(int port)$/;"	f	typeref:typename:int	file:
get_node_mem	fs/jffs2/jffs2_1pass.c	/^static inline void *get_node_mem(u32 off, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_node_mem_nand	fs/jffs2/jffs2_1pass.c	/^static void *get_node_mem_nand(u32 off, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_node_mem_nor	fs/jffs2/jffs2_1pass.c	/^static inline void *get_node_mem_nor(u32 off, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_node_mem_onenand	fs/jffs2/jffs2_1pass.c	/^static void *get_node_mem_onenand(u32 off, void *ext_buf)$/;"	f	typeref:typename:void *	file:
get_non_existent_var	test/py/tests/test_env.py	/^    def get_non_existent_var(self):$/;"	m	class:StateTestEnv
get_nr_ch	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static int get_nr_ch(void)$/;"	f	typeref:typename:int	file:
get_nr_chips	board/mpl/vcma9/vcma9.c	/^static u8 get_nr_chips(void)$/;"	f	typeref:typename:u8	file:
get_nr_cpus	arch/arm/cpu/armv7/mx6/soc.c	/^u32 get_nr_cpus(void)$/;"	f	typeref:typename:u32
get_nr_datx8	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static int get_nr_datx8(int ch)$/;"	f	typeref:typename:int	file:
get_num_cpus	arch/arm/mach-tegra/cpu.c	/^int get_num_cpus(void)$/;"	f	typeref:typename:int
get_num_eth_ports	board/ti/ks2_evm/board_k2e.c	/^int get_num_eth_ports(void)$/;"	f	typeref:typename:int
get_num_eth_ports	board/ti/ks2_evm/board_k2g.c	/^int get_num_eth_ports(void)$/;"	f	typeref:typename:int
get_num_eth_ports	board/ti/ks2_evm/board_k2hk.c	/^int get_num_eth_ports(void)$/;"	f	typeref:typename:int
get_num_eth_ports	board/ti/ks2_evm/board_k2l.c	/^int get_num_eth_ports(void)$/;"	f	typeref:typename:int
get_num_ram_bank	board/armadeus/apf27/apf27.c	/^static int get_num_ram_bank(void)$/;"	f	typeref:typename:int	file:
get_num_zones	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	struct cmd_thermal_get_num_zones_response get_num_zones;$/;"	m	union:mrq_thermal_bpmp_to_host_response	typeref:struct:cmd_thermal_get_num_zones_response
get_number_of_cycles_for_delay	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^int get_number_of_cycles_for_delay(unsigned int delay)$/;"	f	typeref:typename:int
get_number_of_cycles_for_delay	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^int get_number_of_cycles_for_delay(unsigned int delay)$/;"	f	typeref:typename:int
get_number_of_cycles_for_delay	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^int get_number_of_cycles_for_delay(unsigned int delay)$/;"	f	typeref:typename:int
get_number_of_cycles_for_delay	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^int get_number_of_cycles_for_delay(unsigned int delay)$/;"	f	typeref:typename:int
get_number_of_cycles_for_delay	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^int get_number_of_cycles_for_delay(unsigned int delay)$/;"	f	typeref:typename:int
get_odmdata	arch/arm/mach-tegra/ap.c	/^static u32 get_odmdata(void)$/;"	f	typeref:typename:u32	file:
get_offset_code	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic)$/;"	f	typeref:typename:u32
get_omap3_evm_rev	board/ti/evm/evm.c	/^u32 get_omap3_evm_rev(void)$/;"	f	typeref:typename:u32
get_onfi_nand_para	drivers/mtd/nand/denali.c	/^static uint32_t get_onfi_nand_para(struct denali_nand_info *denali)$/;"	f	typeref:typename:uint32_t	file:
get_open_drain	include/asm-generic/gpio.h	/^	int (*get_open_drain)(struct udevice *dev, unsigned offset);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset)
get_operand_value	common/bedbug.c	/^int get_operand_value (struct opcode *op, unsigned long instr,$/;"	f	typeref:typename:int
get_opp_offset	board/ti/am43xx/board.c	/^static int get_opp_offset(int max_off, int min_off)$/;"	f	typeref:typename:int	file:
get_osc_clk_speed	arch/arm/cpu/armv7/omap3/clock.c	/^u32 get_osc_clk_speed(void)$/;"	f	typeref:typename:u32
get_output_dir	scripts/objdiff	/^get_output_dir() {$/;"	f
get_pad_len	fs/ubifs/lpt_commit.c	/^static int get_pad_len(const struct ubifs_info *c, uint8_t *buf, int len)$/;"	f	typeref:typename:int	file:
get_page_table_size	arch/arm/cpu/armv8/cache_v8.c	/^__weak u64 get_page_table_size(void)$/;"	f	typeref:typename:__weak u64
get_page_table_size	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^u64 get_page_table_size(void)$/;"	f	typeref:typename:u64
get_page_table_size	arch/arm/cpu/armv8/zynqmp/cpu.c	/^u64 get_page_table_size(void)$/;"	f	typeref:typename:u64
get_params	include/ec_commands.h	/^		struct lightbar_params get_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:lightbar_params
get_params	include/ec_commands.h	/^		} dump, off, on, init, get_seq, get_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::__anon71a6b2670208
get_parent	tools/buildman/kconfiglib.py	/^    def get_parent(self):$/;"	m	class:Choice
get_parent	tools/buildman/kconfiglib.py	/^    def get_parent(self):$/;"	m	class:Comment
get_parent	tools/buildman/kconfiglib.py	/^    def get_parent(self):$/;"	m	class:Menu
get_parent	tools/buildman/kconfiglib.py	/^    def get_parent(self):$/;"	m	class:Symbol
get_part	drivers/mtd/mtd_uboot.c	/^static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size,$/;"	f	typeref:typename:int	file:
get_part_number	arch/arm/mach-keystone/include/mach/hardware.h	/^static inline u16 get_part_number(void)$/;"	f	typeref:typename:u16
get_part_sector_size	cmd/jffs2.c	/^static inline u32 get_part_sector_size(struct mtdids *id, struct part_info *part)$/;"	f	typeref:typename:u32	file:
get_part_sector_size_nand	cmd/jffs2.c	/^static inline u32 get_part_sector_size_nand(struct mtdids *id)$/;"	f	typeref:typename:u32	file:
get_part_sector_size_nor	cmd/jffs2.c	/^static inline u32 get_part_sector_size_nor(struct mtdids *id, struct part_info *part)$/;"	f	typeref:typename:u32	file:
get_part_sector_size_onenand	cmd/jffs2.c	/^static inline u32 get_part_sector_size_onenand(void)$/;"	f	typeref:typename:u32	file:
get_partition_parser	drivers/mtd/mtdpart.c	/^static struct mtd_part_parser *get_partition_parser(const char *name)$/;"	f	typeref:struct:mtd_part_parser *	file:
get_pata_base	arch/powerpc/include/asm/immap_512x.h	/^static inline u32 get_pata_base (void)$/;"	f	typeref:typename:u32
get_pba_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_pba_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_pbb_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_pbb_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_pcbrev_var	board/mpl/mip405/mip405.c	/^void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)$/;"	f	typeref:typename:void
get_pci_dev	cmd/pci.c	/^static pci_dev_t get_pci_dev(char *name)$/;"	f	typeref:typename:pci_dev_t	file:
get_pci_dual	board/freescale/common/cadmus.c	/^get_pci_dual(void)$/;"	f	typeref:typename:unsigned int
get_pci_slot	board/freescale/common/cadmus.c	/^get_pci_slot(void)$/;"	f	typeref:typename:unsigned int
get_pcie_bar	arch/x86/cpu/ivybridge/northbridge.c	/^static int get_pcie_bar(struct udevice *dev, u32 *base, u32 *len)$/;"	f	typeref:typename:int	file:
get_pclk_sys	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long get_pclk_sys(int dom)$/;"	f	typeref:typename:unsigned long	file:
get_pclkd1	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long get_pclkd1(void)$/;"	f	typeref:typename:unsigned long	file:
get_peb_for_wl	drivers/mtd/ubi/fastmap-wl.c	/^static struct ubi_wl_entry *get_peb_for_wl(struct ubi_device *ubi)$/;"	f	typeref:struct:ubi_wl_entry *	file:
get_peb_for_wl	drivers/mtd/ubi/wl.c	/^static struct ubi_wl_entry *get_peb_for_wl(struct ubi_device *ubi)$/;"	f	typeref:struct:ubi_wl_entry *	file:
get_per2_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^get_per2_dpll_param:$/;"	l
get_per_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^get_per_dpll_param:$/;"	l
get_per_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const struct dpll_params *get_per_dpll_params(struct dplls const *dpll_data)$/;"	f	typeref:typename:const struct dpll_params *
get_periph_clk	arch/arm/cpu/armv7/mx5/clock.c	/^u32 get_periph_clk(void)$/;"	f	typeref:typename:u32
get_periph_clk	arch/arm/cpu/armv7/mx6/clock.c	/^u32 get_periph_clk(void)$/;"	f	typeref:typename:u32
get_periph_clk_div	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_periph_clk_div(void)$/;"	f	typeref:typename:unsigned int
get_periph_clk_rate	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_periph_clk_rate(void)$/;"	f	typeref:typename:unsigned int
get_periph_clock_id	arch/arm/mach-tegra/tegra114/clock.c	/^enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)$/;"	f	typeref:enum:clock_id
get_periph_clock_id	arch/arm/mach-tegra/tegra124/clock.c	/^enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)$/;"	f	typeref:enum:clock_id
get_periph_clock_id	arch/arm/mach-tegra/tegra20/clock.c	/^enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)$/;"	f	typeref:enum:clock_id
get_periph_clock_id	arch/arm/mach-tegra/tegra210/clock.c	/^enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)$/;"	f	typeref:enum:clock_id
get_periph_clock_id	arch/arm/mach-tegra/tegra30/clock.c	/^enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)$/;"	f	typeref:enum:clock_id
get_periph_clock_info	arch/arm/mach-tegra/tegra114/clock.c	/^int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,$/;"	f	typeref:typename:int
get_periph_clock_info	arch/arm/mach-tegra/tegra124/clock.c	/^int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,$/;"	f	typeref:typename:int
get_periph_clock_info	arch/arm/mach-tegra/tegra20/clock.c	/^int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,$/;"	f	typeref:typename:int
get_periph_clock_info	arch/arm/mach-tegra/tegra210/clock.c	/^int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,$/;"	f	typeref:typename:int
get_periph_clock_info	arch/arm/mach-tegra/tegra30/clock.c	/^int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,$/;"	f	typeref:typename:int
get_periph_clock_source	arch/arm/mach-tegra/tegra114/clock.c	/^int get_periph_clock_source(enum periph_id periph_id,$/;"	f	typeref:typename:int
get_periph_clock_source	arch/arm/mach-tegra/tegra124/clock.c	/^int get_periph_clock_source(enum periph_id periph_id,$/;"	f	typeref:typename:int
get_periph_clock_source	arch/arm/mach-tegra/tegra20/clock.c	/^int get_periph_clock_source(enum periph_id periph_id,$/;"	f	typeref:typename:int
get_periph_clock_source	arch/arm/mach-tegra/tegra210/clock.c	/^int get_periph_clock_source(enum periph_id periph_id,$/;"	f	typeref:typename:int
get_periph_clock_source	arch/arm/mach-tegra/tegra30/clock.c	/^int get_periph_clock_source(enum periph_id periph_id,$/;"	f	typeref:typename:int
get_periph_id	include/dm/pinctrl.h	/^	int (*get_periph_id)(struct udevice *dev, struct udevice *periph);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,struct udevice * periph)
get_periph_source_reg	arch/arm/mach-tegra/tegra114/clock.c	/^u32 *get_periph_source_reg(enum periph_id periph_id)$/;"	f	typeref:typename:u32 *
get_periph_source_reg	arch/arm/mach-tegra/tegra124/clock.c	/^u32 *get_periph_source_reg(enum periph_id periph_id)$/;"	f	typeref:typename:u32 *
get_periph_source_reg	arch/arm/mach-tegra/tegra20/clock.c	/^u32 *get_periph_source_reg(enum periph_id periph_id)$/;"	f	typeref:typename:u32 *
get_periph_source_reg	arch/arm/mach-tegra/tegra210/clock.c	/^u32 *get_periph_source_reg(enum periph_id periph_id)$/;"	f	typeref:typename:u32 *
get_periph_source_reg	arch/arm/mach-tegra/tegra30/clock.c	/^u32 *get_periph_source_reg(enum periph_id periph_id)$/;"	f	typeref:typename:u32 *
get_peripherals_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_peripherals_clk(void)$/;"	f	typeref:typename:u32	file:
get_phy_base	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void __iomem *get_phy_base(int ch)$/;"	f	typeref:typename:void __iomem *	file:
get_phy_device	drivers/net/phy/phy.c	/^static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,$/;"	f	typeref:struct:phy_device *	file:
get_phy_device_by_mask	drivers/net/phy/phy.c	/^static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,$/;"	f	typeref:struct:phy_device *	file:
get_phy_driver	drivers/net/phy/phy.c	/^static struct phy_driver *get_phy_driver(struct phy_device *phydev,$/;"	f	typeref:struct:phy_driver *	file:
get_phy_id	drivers/net/phy/cortina.c	/^int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)$/;"	f	typeref:typename:int
get_phy_id	drivers/net/phy/mv88e61xx.c	/^int get_phy_id(struct mii_dev *bus, int smi_addr, int devad, u32 *phy_id)$/;"	f	typeref:typename:int
get_phy_id	drivers/net/phy/phy.c	/^int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)$/;"	f	typeref:typename:int __weak
get_phyreg	drivers/net/eepro100.c	/^static int get_phyreg (struct eth_device *dev, unsigned char addr,$/;"	f	typeref:typename:int	file:
get_phys_ccsrbar_addr_early	board/freescale/qemu-ppce500/qemu-ppce500.c	/^uint64_t get_phys_ccsrbar_addr_early(void)$/;"	f	typeref:typename:uint64_t
get_pil	arch/sparc/include/asm/irq.h	/^static inline unsigned int get_pil(void)$/;"	f	typeref:typename:unsigned int
get_pin	board/keymile/km82xx/km82xx.c	/^static int get_pin(unsigned long mask, int port)$/;"	f	typeref:typename:int	file:
get_pin_name	include/dm/pinctrl.h	/^	const char *(*get_pin_name)(struct udevice *dev, unsigned selector);$/;"	m	struct:pinctrl_ops	typeref:typename:const char * (*)(struct udevice * dev,unsigned selector)
get_pins	arch/arm/cpu/armv8/zynqmp/slcr.c	/^	const int *get_pins;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:const int *	file:
get_pins	arch/arm/mach-zynq/slcr.c	/^	const int *get_pins;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:const int *	file:
get_pins_count	include/dm/pinctrl.h	/^	int (*get_pins_count)(struct udevice *dev);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev)
get_pipectr_addr	drivers/usb/host/r8a66597.h	/^#define get_pipectr_addr(/;"	d
get_pipetre_addr	drivers/usb/host/r8a66597.h	/^#define get_pipetre_addr(/;"	d
get_pipetrn_addr	drivers/usb/host/r8a66597.h	/^#define get_pipetrn_addr(/;"	d
get_pit_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_pit_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_pld_parvers	board/mpl/mip405/mip405.c	/^unsigned short get_pld_parvers (void)$/;"	f	typeref:typename:unsigned short
get_pld_reg	board/mpl/vcma9/vcma9.c	/^static u8 get_pld_reg(enum vcma9_pld_regs reg)$/;"	f	typeref:typename:u8	file:
get_pld_revision	board/mpl/vcma9/vcma9.c	/^static u8 get_pld_revision(void)$/;"	f	typeref:typename:u8	file:
get_pld_version	board/mpl/vcma9/vcma9.c	/^static u8 get_pld_version(void)$/;"	f	typeref:typename:u8	file:
get_pll	arch/arm/mach-tegra/clock.c	/^static struct clk_pll *get_pll(enum clock_id clkid)$/;"	f	typeref:struct:clk_pll *	file:
get_pll_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long
get_pll_clk	arch/arm/mach-s5pc1xx/clock.c	/^unsigned long get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long
get_pll_init_data	board/ti/ks2_evm/board_k2e.c	/^struct pll_init_data *get_pll_init_data(int pll)$/;"	f	typeref:struct:pll_init_data *
get_pll_init_data	board/ti/ks2_evm/board_k2g.c	/^struct pll_init_data *get_pll_init_data(int pll)$/;"	f	typeref:struct:pll_init_data *
get_pll_init_data	board/ti/ks2_evm/board_k2hk.c	/^struct pll_init_data *get_pll_init_data(int pll)$/;"	f	typeref:struct:pll_init_data *
get_pll_init_data	board/ti/ks2_evm/board_k2l.c	/^struct pll_init_data *get_pll_init_data(int pll)$/;"	f	typeref:struct:pll_init_data *
get_pll_timing	drivers/usb/host/ehci-tegra.c	/^static const unsigned *get_pll_timing(struct fdt_usb_controller *controller)$/;"	f	typeref:typename:const unsigned *	file:
get_plla_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_plla_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_pllb_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_pllb_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_pllb_init	arch/arm/mach-at91/include/mach/clk.h	/^static inline u32 get_pllb_init(void)$/;"	f	typeref:typename:u32
get_pllfreq	arch/arm/cpu/armv8/s32v234/generic.c	/^static uintptr_t get_pllfreq(u32 pll, u32 refclk_freq, u32 plldv,$/;"	f	typeref:typename:uintptr_t	file:
get_port_speed	drivers/usb/host/ehci.h	/^	int (*get_port_speed)(struct ehci_ctrl *ctrl, uint32_t reg);$/;"	m	struct:ehci_ops	typeref:typename:int (*)(struct ehci_ctrl * ctrl,uint32_t reg)
get_portmux	drivers/gpio/adi_gpio2.c	/^inline u16 get_portmux(unsigned short per)$/;"	f	typeref:typename:u16
get_portsc_register	drivers/usb/host/ehci.h	/^	uint32_t *(*get_portsc_register)(struct ehci_ctrl *ctrl, int port);$/;"	m	struct:ehci_ops	typeref:typename:uint32_t * (*)(struct ehci_ctrl * ctrl,int port)
get_power_status_broken	include/linux/apm_bios.h	/^	int			get_power_status_broken;$/;"	m	struct:apm_info	typeref:typename:int
get_power_status_swabinminutes	include/linux/apm_bios.h	/^	int			get_power_status_swabinminutes;$/;"	m	struct:apm_info	typeref:typename:int
get_prom	drivers/net/ax88796.c	/^int get_prom(u8* mac_addr, u8* base_addr)$/;"	f	typeref:typename:int
get_prom	drivers/net/ne2000.c	/^int get_prom(u8* mac_addr, u8* base_addr)$/;"	f	typeref:typename:int
get_prompt_str	scripts/kconfig/menu.c	/^static void get_prompt_str(struct gstr *r, struct property *prop,$/;"	f	typeref:typename:void	file:
get_prompts	tools/buildman/kconfiglib.py	/^    def get_prompts(self):$/;"	m	class:Choice
get_prompts	tools/buildman/kconfiglib.py	/^    def get_prompts(self):$/;"	m	class:Symbol
get_prop_check_min_len	lib/fdtdec.c	/^static const void *get_prop_check_min_len(const void *blob, int node,$/;"	f	typeref:typename:const void *	file:
get_psize	fs/zfs/zfs.c	/^get_psize(blkptr_t *bp, zfs_endian_t endian)$/;"	f	typeref:typename:size_t	file:
get_psr	arch/sparc/include/asm/psr.h	/^static __inline__ unsigned int get_psr(void)$/;"	f	typeref:typename:unsigned int
get_pvr	arch/powerpc/cpu/mpc512x/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc5xx/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc5xxx/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc8260/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc83xx/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc85xx/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc86xx/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/mpc8xx/start.S	/^get_pvr:$/;"	l
get_pvr	arch/powerpc/cpu/ppc4xx/start.S	/^get_pvr:$/;"	l
get_pwm_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_pwm_clk(void)$/;"	f	typeref:typename:unsigned long
get_pwm_clk	arch/arm/mach-s5pc1xx/clock.c	/^unsigned long get_pwm_clk(void)$/;"	f	typeref:typename:unsigned long
get_pxe_file	cmd/pxe.c	/^static int get_pxe_file(cmd_tbl_t *cmdtp, const char *file_path,$/;"	f	typeref:typename:int	file:
get_pxelinux_path	cmd/pxe.c	/^static int get_pxelinux_path(cmd_tbl_t *cmdtp, const char *file,$/;"	f	typeref:typename:int	file:
get_qixis_addr	board/freescale/ls2080aqds/ls2080aqds.c	/^unsigned long long get_qixis_addr(void)$/;"	f	typeref:typename:unsigned long long
get_qixis_addr	board/freescale/ls2080ardb/ls2080ardb.c	/^unsigned long long get_qixis_addr(void)$/;"	f	typeref:typename:unsigned long long
get_quoted_string	scripts/checkpatch.pl	/^sub get_quoted_string {$/;"	s
get_radeon_id_family	drivers/video/ati_radeon_fb.c	/^u16 get_radeon_id_family(u16 device)$/;"	f	typeref:typename:u16
get_ram_size	common/memsize.c	/^long get_ram_size(long *base, long maxsize)$/;"	f	typeref:typename:long
get_random_bytes	include/linux/compat.h	/^#define get_random_bytes(/;"	d
get_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long (*get_rate)(struct clk *c);$/;"	m	struct:clk_ops	typeref:typename:unsigned long (*)(struct clk * c)
get_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long (*get_rate) (struct clk *c);$/;"	m	struct:clk_ops	typeref:typename:unsigned long (*)(struct clk * c)
get_rate	arch/arm/mach-zynq/clk.c	/^	unsigned long (*get_rate)(struct clk *clk);$/;"	m	struct:zynq_clk_ops	typeref:typename:unsigned long (*)(struct clk * clk)	file:
get_rate	include/clk-uclass.h	/^	ulong (*get_rate)(struct clk *clk);$/;"	m	struct:clk_ops	typeref:typename:ulong (*)(struct clk * clk)
get_rate_from_divider	arch/arm/mach-tegra/clock.c	/^static unsigned long get_rate_from_divider(unsigned long parent_rate,$/;"	f	typeref:typename:unsigned long	file:
get_rcvn	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_rcvn(uint8_t channel, uint8_t rank, uint8_t byte_lane)$/;"	f	typeref:typename:uint32_t
get_rdisk	disk/part_amiga.c	/^struct rigid_disk_block *get_rdisk(struct blk_desc *dev_desc)$/;"	f	typeref:struct:rigid_disk_block *
get_rdqs	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_rdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane)$/;"	f	typeref:typename:uint32_t
get_read_idle_ctrl_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_read_idle_ctrl_reg(u8 volt_ramp)$/;"	f	typeref:typename:u32	file:
get_record_name	common/bootstage.c	/^static const char *get_record_name(char *buf, int len,$/;"	f	typeref:typename:const char *	file:
get_ref_clk	arch/arm/mach-mvebu/armada3700/cpu.c	/^u32 get_ref_clk(void)$/;"	f	typeref:typename:u32
get_ref_locations	tools/buildman/kconfiglib.py	/^    def get_ref_locations(self):$/;"	m	class:Symbol
get_referenced_symbols	tools/buildman/kconfiglib.py	/^    def get_referenced_symbols(self, refs_from_enclosing=False):$/;"	m	class:Choice
get_referenced_symbols	tools/buildman/kconfiglib.py	/^    def get_referenced_symbols(self, refs_from_enclosing=False):$/;"	m	class:Comment
get_referenced_symbols	tools/buildman/kconfiglib.py	/^    def get_referenced_symbols(self, refs_from_enclosing=False):$/;"	m	class:Menu
get_referenced_symbols	tools/buildman/kconfiglib.py	/^    def get_referenced_symbols(self, refs_from_enclosing=False):$/;"	m	class:Symbol
get_reg	drivers/net/cs8900.c	/^static u16 get_reg(struct eth_device *dev, int regno)$/;"	f	typeref:typename:u16	file:
get_reg_init_bus	drivers/net/cs8900.c	/^#define get_reg_init_bus(/;"	d	file:
get_reg_init_bus	drivers/net/cs8900.c	/^static u16 get_reg_init_bus(struct eth_device *dev, int regno)$/;"	f	typeref:typename:u16	file:
get_region	tools/ifdtool.c	/^static int get_region(struct frba_t *frba, int region_type,$/;"	f	typeref:typename:int	file:
get_registers	drivers/usb/eth/r8152.c	/^int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)$/;"	f	typeref:typename:int	file:
get_relations_str	scripts/kconfig/menu.c	/^struct gstr get_relations_str(struct symbol **sym_arr, struct list_head *head)$/;"	f	typeref:struct:gstr
get_relfile	cmd/pxe.c	/^static int get_relfile(cmd_tbl_t *cmdtp, const char *file_path,$/;"	f	typeref:typename:int	file:
get_relfile_envaddr	cmd/pxe.c	/^static int get_relfile_envaddr(cmd_tbl_t *cmdtp, const char *file_path, const char *envaddr_name/;"	f	typeref:typename:int	file:
get_reqip	drivers/block/sata_mv.c	/^static int get_reqip(int port)$/;"	f	typeref:typename:int	file:
get_reset_cause	arch/arm/cpu/arm1136/mx31/generic.c	/^static char *get_reset_cause(void)$/;"	f	typeref:typename:char *	file:
get_reset_cause	arch/arm/cpu/arm1136/mx35/generic.c	/^static char *get_reset_cause(void)$/;"	f	typeref:typename:char *	file:
get_reset_cause	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static char *get_reset_cause(void)$/;"	f	typeref:typename:char *	file:
get_reset_cause	arch/arm/cpu/armv7/vf610/generic.c	/^static char *get_reset_cause(void)$/;"	f	typeref:typename:char *	file:
get_reset_cause	arch/arm/cpu/armv8/s32v234/generic.c	/^static char *get_reset_cause(void)$/;"	f	typeref:typename:char *	file:
get_reset_cause	arch/arm/imx-common/cpu.c	/^static char *get_reset_cause(void)$/;"	f	typeref:typename:char *	file:
get_reset_status	arch/arm/mach-exynos/power.c	/^uint32_t get_reset_status(void)$/;"	f	typeref:typename:uint32_t
get_revisions	board/a3m071/a3m071.c	/^static void get_revisions(int *failsavelevel, int *digiboardversion,$/;"	f	typeref:typename:void	file:
get_rh_usb_speed	drivers/usb/host/r8a66597.h	/^static inline u16 get_rh_usb_speed(struct r8a66597 *r8a66597, int port)$/;"	f	typeref:typename:u16
get_rng_vid	drivers/crypto/fsl/jr.c	/^static u8 get_rng_vid(uint8_t sec_idx)$/;"	f	typeref:typename:u8	file:
get_rom_mac	drivers/net/lan91c96.c	/^static int get_rom_mac(struct eth_device *dev, unsigned char *v_rom_mac)$/;"	f	typeref:typename:int	file:
get_root_clk	arch/arm/cpu/armv7/mx7/clock.c	/^u32 get_root_clk(enum clk_root_index clock_id)$/;"	f	typeref:typename:u32
get_root_src_clk	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 get_root_src_clk(enum clk_root_src root_src)$/;"	f	typeref:typename:u32	file:
get_rspip	drivers/block/sata_mv.c	/^static int get_rspip(int port)$/;"	f	typeref:typename:int	file:
get_rspop	drivers/block/sata_mv.c	/^static int get_rspop(int port)$/;"	f	typeref:typename:int	file:
get_runner	test/py/multiplexed_log.py	/^    def get_runner(self, name, chained_file=None):$/;"	m	class:Logfile
get_samsung_nand_para	drivers/mtd/nand/denali.c	/^static void get_samsung_nand_para(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
get_sar_freq	arch/arm/mach-mvebu/cpu.c	/^void get_sar_freq(struct sar_freq_modes *sar_freq)$/;"	f	typeref:typename:void
get_scl	board/keymile/km82xx/km82xx.c	/^int get_scl(void)$/;"	f	typeref:typename:int
get_scl	board/keymile/km_arm/km_arm.c	/^int get_scl(void)$/;"	f	typeref:typename:int
get_scl	board/keymile/kmp204x/kmp204x.c	/^int get_scl(void)$/;"	f	typeref:typename:int
get_sclk	arch/blackfin/lib/clocks.c	/^u_long get_sclk(void)$/;"	f	typeref:typename:u_long
get_sclk0	arch/blackfin/lib/clocks.c	/^u_long get_sclk0(void)$/;"	f	typeref:typename:u_long
get_sclk1	arch/blackfin/lib/clocks.c	/^u_long get_sclk1(void)$/;"	f	typeref:typename:u_long
get_sctlr	arch/arm/include/asm/system.h	/^static inline unsigned int get_sctlr(void)$/;"	f	typeref:typename:unsigned int
get_sda	board/keymile/km82xx/km82xx.c	/^int get_sda(void)$/;"	f	typeref:typename:int
get_sda	board/keymile/km_arm/km_arm.c	/^int get_sda(void)$/;"	f	typeref:typename:int
get_sda	board/keymile/kmp204x/kmp204x.c	/^int get_sda(void)$/;"	f	typeref:typename:int
get_sdhc_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_sdhc_clk(void)$/;"	f	typeref:typename:u32	file:
get_sdhc_freq	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^int get_sdhc_freq(ulong dummy)$/;"	f	typeref:typename:int
get_sdio2_config	board/overo/overo.c	/^int get_sdio2_config(void)$/;"	f	typeref:typename:int
get_sdr_cs_offset	arch/arm/cpu/armv7/omap3/emif4.c	/^u32 get_sdr_cs_offset(u32 cs)$/;"	f	typeref:typename:u32
get_sdr_cs_offset	arch/arm/cpu/armv7/omap3/sdrc.c	/^u32 get_sdr_cs_offset(u32 cs)$/;"	f	typeref:typename:u32
get_sdr_cs_size	arch/arm/cpu/armv7/omap3/emif4.c	/^u32 get_sdr_cs_size(u32 cs)$/;"	f	typeref:typename:u32
get_sdr_cs_size	arch/arm/cpu/armv7/omap3/sdrc.c	/^u32 get_sdr_cs_size(u32 cs)$/;"	f	typeref:typename:u32
get_sdram_clk_rate	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_sdram_clk_rate(void)$/;"	f	typeref:typename:unsigned int
get_sdram_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_sdram_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_sdram_config_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_sdram_config_reg(const struct lpddr2_device_details *cs0_device,$/;"	f	typeref:typename:u32	file:
get_sdram_ref_ctrl	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_sdram_ref_ctrl(u32 freq,$/;"	f	typeref:typename:u32	file:
get_sdram_size	board/freescale/bsc9131rdb/ddr.c	/^unsigned long get_sdram_size(void)$/;"	f	typeref:typename:unsigned long
get_sdram_size	board/freescale/p1010rdb/ddr.c	/^unsigned long get_sdram_size(void)$/;"	f	typeref:typename:unsigned long
get_sdram_tim_1_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_sdram_tim_1_reg(const struct lpddr2_ac_timings *timings,$/;"	f	typeref:typename:u32	file:
get_sdram_tim_2_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_sdram_tim_2_reg(const struct lpddr2_ac_timings *timings,$/;"	f	typeref:typename:u32	file:
get_sdram_tim_3_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_sdram_tim_3_reg(const struct lpddr2_ac_timings *timings,$/;"	f	typeref:typename:u32	file:
get_sec_mem_start	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^static u32 get_sec_mem_start(void)$/;"	f	typeref:typename:u32	file:
get_sec_mon_state	drivers/misc/fsl_sec_mon.c	/^static u32 get_sec_mon_state(void)$/;"	f	typeref:typename:u32	file:
get_seconds	fs/ubifs/ubifs.h	/^#define get_seconds(/;"	d
get_sector_number	board/bf533-ezkit/flash.c	/^void get_sector_number(long ulOffset, int *pnSector)$/;"	f	typeref:typename:void
get_selected_symbols	tools/buildman/kconfiglib.py	/^    def get_selected_symbols(self):$/;"	m	class:Symbol
get_selection	tools/buildman/kconfiglib.py	/^    def get_selection(self):$/;"	m	class:Choice
get_selection_from_defaults	tools/buildman/kconfiglib.py	/^    def get_selection_from_defaults(self):$/;"	m	class:Choice
get_seq	include/ec_commands.h	/^		struct get_seq {$/;"	s	union:ec_response_lightbar::__anon71a6b267030a
get_seq	include/ec_commands.h	/^		} dump, off, on, init, get_seq, get_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::__anon71a6b2670208
get_seq	include/ec_commands.h	/^		} get_seq;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::get_seq
get_serdes_protocol	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^int get_serdes_protocol(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/arm/cpu/armv7/ls102xa/clock.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/mips/mach-ath79/ar933x/clk.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/mips/mach-ath79/ar934x/clk.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/mips/mach-ath79/qca953x/clk.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^int get_serial_clock(void)$/;"	f	typeref:typename:int
get_serial_clock	board/xilinx/ppc405-generic/xilinx_ppc405_generic.c	/^int get_serial_clock(void){$/;"	f	typeref:typename:int
get_serial_clock	board/xilinx/ppc440-generic/xilinx_ppc440_generic.c	/^int get_serial_clock(void){$/;"	f	typeref:typename:int
get_sh_eth_mac	board/renesas/sh7752evb/sh7752evb.c	/^static int get_sh_eth_mac(int channel, char *mac_string, unsigned char *buf)$/;"	f	typeref:typename:int	file:
get_sh_eth_mac	board/renesas/sh7753evb/sh7753evb.c	/^static int get_sh_eth_mac(int channel, char *mac_string, unsigned char *buf)$/;"	f	typeref:typename:int	file:
get_sh_eth_mac	board/renesas/sh7757lcr/sh7757lcr.c	/^static int get_sh_eth_mac(int channel, char *mac_string, unsigned char *buf)$/;"	f	typeref:typename:int	file:
get_sh_eth_mac_raw	board/renesas/sh7752evb/sh7752evb.c	/^static int get_sh_eth_mac_raw(unsigned char *buf, int size)$/;"	f	typeref:typename:int	file:
get_sh_eth_mac_raw	board/renesas/sh7753evb/sh7753evb.c	/^static int get_sh_eth_mac_raw(unsigned char *buf, int size)$/;"	f	typeref:typename:int	file:
get_sh_eth_mac_raw	board/renesas/sh7757lcr/sh7757lcr.c	/^static int get_sh_eth_mac_raw(unsigned char *buf, int size)$/;"	f	typeref:typename:int	file:
get_sku_id	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 get_sku_id(void)$/;"	f	typeref:typename:u32
get_soc_major_rev	arch/arm/cpu/armv7/ls102xa/soc.c	/^unsigned int get_soc_major_rev(void)$/;"	f	typeref:typename:unsigned int
get_soc_type	arch/arm/include/asm/imx-common/sys_proto.h	/^#define get_soc_type(/;"	d
get_socrev	arch/arm/cpu/arm926ejs/spear/spl.c	/^int get_socrev(void)$/;"	f	typeref:typename:int
get_soft_i2c_scl_pin	board/samsung/trats2/trats2.c	/^int get_soft_i2c_scl_pin(void)$/;"	f	typeref:typename:int
get_soft_i2c_sda_pin	board/samsung/trats2/trats2.c	/^int get_soft_i2c_sda_pin(void)$/;"	f	typeref:typename:int
get_sound_i2s_values	drivers/sound/sound-i2s.c	/^static int get_sound_i2s_values(struct i2stx_info *i2s, const void *blob)$/;"	f	typeref:typename:int	file:
get_sp	arch/arc/lib/bootm.c	/^static ulong get_sp(void)$/;"	f	typeref:typename:ulong	file:
get_sp	arch/arm/lib/bootm.c	/^static ulong get_sp(void)$/;"	f	typeref:typename:ulong	file:
get_sp	arch/m68k/lib/bootm.c	/^static ulong get_sp (void)$/;"	f	typeref:typename:ulong	file:
get_sp	arch/powerpc/lib/bootm.c	/^static ulong get_sp (void)$/;"	f	typeref:typename:ulong	file:
get_spawn	test/py/u_boot_console_exec_attach.py	/^    def get_spawn(self):$/;"	m	class:ConsoleExecAttach
get_spawn	test/py/u_boot_console_sandbox.py	/^    def get_spawn(self):$/;"	m	class:ConsoleSandbox
get_spawn_output	test/py/u_boot_console_base.py	/^    def get_spawn_output(self):$/;"	m	class:ConsoleBase
get_spd	board/freescale/c29xpcie/ddr.c	/^void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)$/;"	f	typeref:typename:void
get_spd	board/gdsys/p1022/ddr.c	/^void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)$/;"	f	typeref:typename:void
get_spd	board/sbc8548/ddr.c	/^void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)$/;"	f	typeref:typename:void
get_spd	board/xes/xpedite517x/ddr.c	/^void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)$/;"	f	typeref:typename:void
get_spd	board/xes/xpedite520x/ddr.c	/^void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)$/;"	f	typeref:typename:void
get_spd	board/xes/xpedite537x/ddr.c	/^void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)$/;"	f	typeref:typename:void
get_spd	board/xes/xpedite550x/ddr.c	/^void get_spd(ddr3_spd_eeprom_t *spd, u8 i2c_address)$/;"	f	typeref:typename:void
get_spd_info	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void get_spd_info(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
get_spd_info	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void get_spd_info(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
get_spd_info	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void get_spd_info(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
get_speed_string	drivers/phy/marvell/comphy_core.c	/^static char *get_speed_string(u32 speed)$/;"	f	typeref:typename:char *	file:
get_spi_base	include/pch.h	/^	int (*get_spi_base)(struct udevice *dev, ulong *sbasep);$/;"	m	struct:pch_ops	typeref:typename:int (*)(struct udevice * dev,ulong * sbasep)
get_spi_clk	arch/blackfin/include/asm/clock.h	/^# define get_spi_clk /;"	d
get_spi_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_spi_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_spi_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_spi_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_spin_phys_addr	arch/powerpc/cpu/mpc85xx/mp.c	/^phys_addr_t get_spin_phys_addr(void)$/;"	f	typeref:typename:phys_addr_t
get_spin_tbl_addr	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^void *get_spin_tbl_addr(void)$/;"	f	typeref:typename:void *
get_sr	arch/m68k/lib/interrupts.c	/^static __inline__ unsigned short get_sr (void)$/;"	f	typeref:typename:unsigned short	file:
get_srcarch	tools/buildman/kconfiglib.py	/^    def get_srcarch(self):$/;"	m	class:Config
get_srctree	tools/buildman/kconfiglib.py	/^    def get_srctree(self):$/;"	m	class:Config
get_standard_pll_sel_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_standard_pll_sel_clk(u32 clk_sel)$/;"	f	typeref:typename:u32	file:
get_status	tools/genboardscfg.py	/^    def get_status(self, target):$/;"	m	class:MaintainersDatabase
get_stream	test/py/multiplexed_log.py	/^    def get_stream(self, name, chained_file=None):$/;"	m	class:Logfile
get_string	cmd/pxe.c	/^static char *get_string(char **p, struct token *t, char delim, int lower)$/;"	f	typeref:typename:char *	file:
get_string	drivers/usb/gadget/composite.c	/^static int get_string(struct usb_composite_dev *cdev,$/;"	f	typeref:typename:int	file:
get_suspicious_boards	tools/moveconfig.py	/^    def get_suspicious_boards(self):$/;"	m	class:Slot
get_svr	arch/arm/cpu/armv7/ls102xa/cpu.c	/^uint get_svr(void)$/;"	f	typeref:typename:uint
get_svr	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^uint get_svr(void)$/;"	f	typeref:typename:uint
get_svr	arch/powerpc/cpu/mpc5xxx/start.S	/^get_svr:$/;"	l
get_svr	arch/powerpc/cpu/mpc83xx/start.S	/^get_svr:$/;"	l
get_svr	arch/powerpc/cpu/mpc85xx/start.S	/^get_svr:$/;"	l
get_svr	arch/powerpc/cpu/mpc86xx/start.S	/^get_svr:$/;"	l
get_symbol	tools/buildman/kconfiglib.py	/^    def get_symbol(self, name):$/;"	m	class:Config
get_symbol_prop	scripts/kconfig/menu.c	/^static struct property *get_symbol_prop(struct symbol *sym)$/;"	f	typeref:struct:property *	file:
get_symbol_str	scripts/kconfig/menu.c	/^static void get_symbol_str(struct gstr *r, struct symbol *sym,$/;"	f	typeref:typename:void	file:
get_symbols	tools/buildman/kconfiglib.py	/^    def get_symbols(self):$/;"	m	class:Choice
get_symbols	tools/buildman/kconfiglib.py	/^    def get_symbols(self, all_symbols=True):$/;"	m	class:Config
get_symbols	tools/buildman/kconfiglib.py	/^    def get_symbols(self, recursive=False):$/;"	m	class:Menu
get_sys_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_sys_clk(u32 number)$/;"	f	typeref:typename:u32	file:
get_sys_clk_freq	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^u32 get_sys_clk_freq(void)$/;"	f	typeref:typename:u32
get_sys_clk_index	board/ti/am43xx/board.c	/^static u32 get_sys_clk_index(void)$/;"	f	typeref:typename:u32	file:
get_sys_clk_rate	arch/arm/cpu/arm926ejs/lpc32xx/clk.c	/^unsigned int get_sys_clk_rate(void)$/;"	f	typeref:typename:unsigned int
get_sys_clkin_sel	arch/arm/cpu/armv7/omap3/clock.c	/^void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)$/;"	f	typeref:typename:void
get_sys_clock	arch/m68k/cpu/mcf532x/speed.c	/^int get_sys_clock(void)$/;"	f	typeref:typename:int
get_sys_info	arch/arm/cpu/armv7/ls102xa/clock.c	/^void get_sys_info(struct sys_info *sys_info)$/;"	f	typeref:typename:void
get_sys_info	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^void get_sys_info(struct sys_info *sys_info)$/;"	f	typeref:typename:void
get_sys_info	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c	/^void get_sys_info(struct sys_info *sys_info)$/;"	f	typeref:typename:void
get_sys_info	arch/powerpc/cpu/mpc85xx/speed.c	/^void get_sys_info(sys_info_t *sys_info)$/;"	f	typeref:typename:void
get_sys_info	arch/powerpc/cpu/mpc86xx/speed.c	/^void get_sys_info(sys_info_t *sys_info)$/;"	f	typeref:typename:void
get_sys_info	arch/powerpc/cpu/ppc4xx/speed.c	/^void get_sys_info (PPC4xx_SYS_INFO * sysInfo)$/;"	f	typeref:typename:void
get_sys_info	arch/powerpc/cpu/ppc4xx/speed.c	/^void get_sys_info (sys_info_t * sysInfo)$/;"	f	typeref:typename:void
get_sys_info	arch/powerpc/cpu/ppc4xx/speed.c	/^void get_sys_info (sys_info_t *sysInfo)$/;"	f	typeref:typename:void
get_sys_info	board/freescale/qemu-ppce500/qemu-ppce500.c	/^void get_sys_info(sys_info_t *sys_info)$/;"	f	typeref:typename:void
get_sys_info	board/xilinx/ppc405-generic/xilinx_ppc405_generic.c	/^void get_sys_info(sys_info_t *sys_info)$/;"	f	typeref:typename:void
get_sys_info	board/xilinx/ppc440-generic/xilinx_ppc440_generic.c	/^void get_sys_info(sys_info_t *sys_info)$/;"	f	typeref:typename:void
get_sysboot_value	arch/arm/cpu/armv7/am33xx/sys_info.c	/^u32 get_sysboot_value(void)$/;"	f	typeref:typename:u32
get_syscfg_reg	drivers/usb/host/r8a66597.h	/^static inline unsigned long get_syscfg_reg(int port)$/;"	f	typeref:typename:unsigned long
get_syssts_reg	drivers/usb/host/r8a66597.h	/^static inline unsigned long get_syssts_reg(int port)$/;"	f	typeref:typename:unsigned long
get_systemPLLCLK	arch/arm/cpu/arm920t/imx/speed.c	/^ulong get_systemPLLCLK(void)$/;"	f	typeref:typename:ulong
get_table_entry	common/image.c	/^const table_entry_t *get_table_entry(const table_entry_t *table, int id)$/;"	f	typeref:typename:const table_entry_t *
get_table_entry_id	common/image.c	/^int get_table_entry_id(const table_entry_t *table,$/;"	f	typeref:typename:int
get_table_entry_name	common/image.c	/^char *get_table_entry_name(const table_entry_t *table, char *msg, int id)$/;"	f	typeref:typename:char *
get_target_freq	drivers/ddr/marvell/a38x/ddr3_init.c	/^void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps)$/;"	f	typeref:typename:void
get_target_freq	drivers/ddr/marvell/axp/ddr3_init.c	/^void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps)$/;"	f	typeref:typename:void
get_task_struct	arch/arm/include/asm/processor.h	/^#define get_task_struct(/;"	d
get_task_struct	arch/powerpc/include/asm/processor.h	/^#define get_task_struct(/;"	d
get_tbclk	arch/arm/cpu/arm920t/ep93xx/timer.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/arm/cpu/arm920t/imx/timer.c	/^ulong get_tbclk (void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm926ejs/armada100/timer.c	/^ulong get_tbclk (void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm926ejs/mx27/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm926ejs/mxs/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm926ejs/omap/timer.c	/^ulong get_tbclk (void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/arm926ejs/spear/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv7/arch_timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv7/iproc-common/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv7/ls102xa/timer.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/arm/cpu/armv7/omap-common/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv7/s5p-common/timer.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/arm/cpu/armv7/stv0991/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv7/sunxi/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv7/vf610/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/cpu/armv8/generic_timer.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/arm/cpu/sa1100/timer.c	/^ulong get_tbclk (void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/imx-common/syscounter.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/imx-common/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-at91/arm920t/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-at91/arm926ejs/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-at91/armv7/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-davinci/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-orion5x/timer.c	/^ulong get_tbclk (void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-rmobile/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-stm32/stm32f1/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-stm32/stm32f4/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-stm32/stm32f7/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/arm/mach-zynq/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/avr32/cpu/interrupts.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/blackfin/cpu/interrupts.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/m68k/lib/time.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/microblaze/cpu/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/mips/cpu/time.c	/^ulong notrace get_tbclk(void)$/;"	f	typeref:typename:ulong notrace
get_tbclk	arch/nds32/cpu/n1213/ag101/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/openrisc/lib/timer.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	arch/powerpc/cpu/mpc512x/cpu.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc5xx/cpu.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc5xxx/cpu.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc8260/cpu.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc83xx/cpu.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc83xx/spl_minimal.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc85xx/cpu.c	/^__weak unsigned long get_tbclk (void)$/;"	f	typeref:typename:__weak unsigned long
get_tbclk	arch/powerpc/cpu/mpc86xx/cpu.c	/^get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/mpc8xx/cpu.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/powerpc/cpu/ppc4xx/cpu.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/sh/lib/time.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/sh/lib/time_sh2.c	/^unsigned long get_tbclk(void)$/;"	f	typeref:typename:unsigned long
get_tbclk	arch/xtensa/lib/time.c	/^ulong get_tbclk(void)$/;"	f	typeref:typename:ulong
get_tbclk	board/armltd/integrator/timer.c	/^ulong get_tbclk (void)$/;"	f	typeref:typename:ulong
get_tbclk	board/freescale/qemu-ppce500/qemu-ppce500.c	/^unsigned long get_tbclk (void)$/;"	f	typeref:typename:unsigned long
get_tbclk	lib/time.c	/^ulong notrace get_tbclk(void)$/;"	f	typeref:typename:ulong notrace
get_tbclk_mhz	drivers/timer/tsc_timer.c	/^unsigned notrace long get_tbclk_mhz(void)$/;"	f	typeref:typename:unsigned notrace long
get_tbms	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^static __inline__ unsigned long get_tbms (void)$/;"	f	typeref:typename:unsigned long	file:
get_tcr	arch/arm/cpu/armv8/cache_v8.c	/^u64 get_tcr(int el, u64 *pips, u64 *pva_bits)$/;"	f	typeref:typename:u64
get_tcyc	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static unsigned long get_tcyc(unsigned char reg)$/;"	f	typeref:typename:unsigned long	file:
get_temp	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_thermal_get_temp_request get_temp;$/;"	m	union:mrq_thermal_host_to_bpmp_request::__anonb38d4241070a	typeref:struct:cmd_thermal_get_temp_request
get_temp	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	struct cmd_thermal_get_temp_response get_temp;$/;"	m	union:mrq_thermal_bpmp_to_host_response	typeref:struct:cmd_thermal_get_temp_response
get_temp	include/thermal.h	/^	int (*get_temp)(struct udevice *dev, int *temp);$/;"	m	struct:dm_thermal_ops	typeref:typename:int (*)(struct udevice * dev,int * temp)
get_temp_alert_config	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_temp_alert_config(const struct lpddr2_device_details *cs1_device,$/;"	f	typeref:typename:u32	file:
get_testpin	board/keymile/km82xx/km82xx.c	/^int get_testpin(void)$/;"	f	typeref:typename:int
get_text	tools/buildman/kconfiglib.py	/^    def get_text(self):$/;"	m	class:Comment
get_ticks	arch/arm/cpu/arm920t/ep93xx/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm920t/imx/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm926ejs/armada100/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm926ejs/mx27/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm926ejs/mxs/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm926ejs/omap/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/arm926ejs/spear/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/arch_timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/iproc-common/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/ls102xa/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/omap-common/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/s5p-common/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/stv0991/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/sunxi/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv7/vf610/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/armv8/generic_timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/cpu/sa1100/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/imx-common/syscounter.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-at91/arm920t/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-davinci/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-orion5x/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-rmobile/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-stm32/stm32f1/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-stm32/stm32f4/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/arm/mach-stm32/stm32f7/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/avr32/cpu/interrupts.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/blackfin/cpu/interrupts.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/m68k/lib/time.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/microblaze/cpu/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/nds32/cpu/n1213/ag101/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/openrisc/lib/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/powerpc/lib/ticks.S	/^get_ticks:$/;"	l
get_ticks	arch/sh/lib/time_sh2.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	arch/xtensa/lib/time.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	board/armltd/integrator/timer.c	/^unsigned long long get_ticks(void)$/;"	f	typeref:typename:unsigned long long
get_ticks	lib/time.c	/^uint64_t __weak notrace get_ticks(void)$/;"	f	typeref:typename:uint64_t __weak notrace
get_ticks	lib/time.c	/^uint64_t notrace get_ticks(void)$/;"	f	typeref:typename:uint64_t notrace
get_time_ms	arch/arm/mach-rmobile/timer.c	/^static ulong get_time_ms(void)$/;"	f	typeref:typename:ulong	file:
get_time_us	arch/arm/mach-rmobile/timer.c	/^static u64 get_time_us(void)$/;"	f	typeref:typename:u64	file:
get_timer	arch/arm/cpu/arm920t/ep93xx/timer.c	/^unsigned long get_timer(unsigned long base)$/;"	f	typeref:typename:unsigned long
get_timer	arch/arm/cpu/arm920t/imx/timer.c	/^ulong get_timer (ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm926ejs/armada100/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm926ejs/mx27/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm926ejs/mxs/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm926ejs/omap/timer.c	/^ulong get_timer (ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/arm926ejs/spear/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/armv7/arch_timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/armv7/iproc-common/timer.c	/^unsigned long get_timer(unsigned long base)$/;"	f	typeref:typename:unsigned long
get_timer	arch/arm/cpu/armv7/ls102xa/timer.c	/^unsigned long get_timer(ulong base)$/;"	f	typeref:typename:unsigned long
get_timer	arch/arm/cpu/armv7/omap-common/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/armv7/s5p-common/timer.c	/^unsigned long get_timer(unsigned long base)$/;"	f	typeref:typename:unsigned long
get_timer	arch/arm/cpu/armv7/stv0991/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/armv7/sunxi/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/armv7/vf610/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/cpu/sa1100/timer.c	/^ulong get_timer (ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/imx-common/syscounter.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-at91/arm920t/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-davinci/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-orion5x/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-rmobile/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-stm32/stm32f1/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-stm32/stm32f4/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/arm/mach-stm32/stm32f7/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/avr32/cpu/interrupts.c	/^unsigned long get_timer(unsigned long base)$/;"	f	typeref:typename:unsigned long
get_timer	arch/blackfin/cpu/interrupts.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/m68k/cpu/mcf547x_8x/slicetimer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/m68k/lib/time.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/microblaze/cpu/timer.c	/^ulong get_timer (ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/nds32/cpu/n1213/ag101/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/openrisc/lib/timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/powerpc/lib/interrupts.c	/^ulong get_timer (ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/sh/lib/time_sh2.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	arch/xtensa/lib/time.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	board/armltd/integrator/timer.c	/^ulong get_timer (ulong base_ticks)$/;"	f	typeref:typename:ulong
get_timer	drivers/timer/tsc_timer.c	/^ulong get_timer(ulong base)$/;"	f	typeref:typename:ulong
get_timer	lib/time.c	/^ulong __weak get_timer(ulong base)$/;"	f	typeref:typename:ulong __weak
get_timer_masked	arch/arm/cpu/arm920t/ep93xx/timer.c	/^unsigned long get_timer_masked(void)$/;"	f	typeref:typename:unsigned long
get_timer_masked	arch/arm/cpu/arm920t/imx/timer.c	/^ulong get_timer_masked (void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/arm926ejs/armada100/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/arm926ejs/mx27/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/arm926ejs/mxs/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/arm926ejs/omap/timer.c	/^ulong get_timer_masked (void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/arm926ejs/spear/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/armv7/ls102xa/timer.c	/^unsigned long get_timer_masked(void)$/;"	f	typeref:typename:unsigned long
get_timer_masked	arch/arm/cpu/armv7/omap-common/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/armv7/stv0991/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/armv7/sunxi/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/armv7/vf610/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/cpu/sa1100/timer.c	/^ulong get_timer_masked (void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/imx-common/syscounter.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/mach-at91/arm920t/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/mach-orion5x/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/arm/mach-stm32/stm32f7/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	arch/nds32/cpu/n1213/ag101/timer.c	/^ulong get_timer_masked(void)$/;"	f	typeref:typename:ulong
get_timer_masked	board/armltd/integrator/timer.c	/^ulong get_timer_masked (void)$/;"	f	typeref:typename:ulong
get_timer_raw	arch/arm/mach-at91/arm920t/timer.c	/^ulong get_timer_raw(void)$/;"	f	typeref:typename:ulong
get_timings_table	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static const struct lpddr2_ac_timings *get_timings_table(const struct$/;"	f	typeref:typename:const struct lpddr2_ac_timings *	file:
get_title	tools/buildman/kconfiglib.py	/^    def get_title(self):$/;"	m	class:Menu
get_tizen_logo_info	lib/tizen/tizen.c	/^void get_tizen_logo_info(vidinfo_t *vid)$/;"	f	typeref:typename:void
get_tmu0_clk_rate	include/sh_tmu.h	/^static inline unsigned long get_tmu0_clk_rate(void)$/;"	f	typeref:typename:unsigned long
get_tmu_fdt_values	drivers/power/exynos-tmu.c	/^static int get_tmu_fdt_values(struct tmu_info *info, const void *blob)$/;"	f	typeref:typename:int	file:
get_token	cmd/pxe.c	/^static void get_token(char **p, struct token *t, enum lex_state state)$/;"	f	typeref:typename:void	file:
get_top_level_items	tools/buildman/kconfiglib.py	/^    def get_top_level_items(self):$/;"	m	class:Config
get_top_of_ram	arch/x86/cpu/broadwell/sdram.c	/^static unsigned long get_top_of_ram(struct udevice *dev)$/;"	f	typeref:typename:unsigned long	file:
get_toshiba_nand_para	drivers/mtd/nand/denali.c	/^static void get_toshiba_nand_para(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
get_tpm_nv_size	board/gdsys/p1022/controlcenterd-id.c	/^static int get_tpm_nv_size(uint32_t index, uint32_t *size)$/;"	f	typeref:typename:int	file:
get_twi_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_twi_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_two_words	tools/ifdtool.c	/^static int get_two_words(const char *str, char **firstp, char **secondp)$/;"	f	typeref:typename:int	file:
get_type	tools/buildman/kconfiglib.py	/^    def get_type(self):$/;"	m	class:Choice
get_type	tools/buildman/kconfiglib.py	/^    def get_type(self):$/;"	m	class:Symbol
get_type_string	drivers/phy/marvell/comphy_core.c	/^static char *get_type_string(u32 type)$/;"	f	typeref:typename:char *	file:
get_uart_clk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 get_uart_clk(void)$/;"	f	typeref:typename:u32	file:
get_uart_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_uart_clk(void)$/;"	f	typeref:typename:u32	file:
get_uart_clk	arch/arm/cpu/armv7/vf610/generic.c	/^static u32 get_uart_clk(void)$/;"	f	typeref:typename:u32	file:
get_uart_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_uart_clk(void)$/;"	f	typeref:typename:u32	file:
get_uart_clk	arch/arm/mach-exynos/clock.c	/^unsigned long get_uart_clk(int dev_index)$/;"	f	typeref:typename:unsigned long
get_uart_clk	arch/arm/mach-s5pc1xx/clock.c	/^unsigned long get_uart_clk(int dev_index)$/;"	f	typeref:typename:unsigned long
get_uart_clk	arch/arm/mach-zynq/clk.c	/^unsigned long get_uart_clk(int dev_index)$/;"	f	typeref:typename:unsigned long
get_uart_clk	arch/blackfin/include/asm/clock.h	/^# define get_uart_clk /;"	d
get_uart_configuration	board/amcc/bamboo/bamboo.c	/^uart_config_nb_t get_uart_configuration(void)$/;"	f	typeref:typename:uart_config_nb_t
get_udc_gadget_private_data	drivers/usb/gadget/dwc2_udc_otg.c	/^void *get_udc_gadget_private_data(struct usb_gadget *gadget)$/;"	f	typeref:typename:void *
get_unaligned	arch/arm/include/asm/unaligned.h	/^#define get_unaligned	/;"	d
get_unaligned	arch/m68k/include/asm/unaligned.h	/^#define get_unaligned	/;"	d
get_unaligned	arch/mips/include/asm/unaligned.h	/^#define get_unaligned	/;"	d
get_unaligned	arch/powerpc/include/asm/unaligned.h	/^#define get_unaligned	/;"	d
get_unaligned	arch/sh/include/asm/unaligned-sh4a.h	/^# define get_unaligned /;"	d
get_unaligned	arch/sh/include/asm/unaligned.h	/^#define get_unaligned /;"	d
get_unaligned	include/asm-generic/unaligned.h	/^#define get_unaligned	/;"	d
get_unaligned_be16	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u16 get_unaligned_be16(const void *p)$/;"	f	typeref:typename:u16
get_unaligned_be16	include/linux/unaligned/access_ok.h	/^static inline u16 get_unaligned_be16(const void *p)$/;"	f	typeref:typename:u16
get_unaligned_be16	include/linux/unaligned/be_byteshift.h	/^static inline u16 get_unaligned_be16(const void *p)$/;"	f	typeref:typename:u16
get_unaligned_be24	drivers/usb/gadget/storage_common.c	/^static inline u32 get_unaligned_be24(u8 *buf)$/;"	f	typeref:typename:u32	file:
get_unaligned_be32	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u32 get_unaligned_be32(const void *p)$/;"	f	typeref:typename:u32
get_unaligned_be32	include/linux/unaligned/access_ok.h	/^static inline u32 get_unaligned_be32(const void *p)$/;"	f	typeref:typename:u32
get_unaligned_be32	include/linux/unaligned/be_byteshift.h	/^static inline u32 get_unaligned_be32(const void *p)$/;"	f	typeref:typename:u32
get_unaligned_be32	lib/rsa/rsa-mod-exp.c	/^#define get_unaligned_be32(/;"	d	file:
get_unaligned_be64	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u64 get_unaligned_be64(const void *p)$/;"	f	typeref:typename:u64
get_unaligned_be64	include/linux/unaligned/access_ok.h	/^static inline u64 get_unaligned_be64(const void *p)$/;"	f	typeref:typename:u64
get_unaligned_be64	include/linux/unaligned/be_byteshift.h	/^static inline u64 get_unaligned_be64(const void *p)$/;"	f	typeref:typename:u64
get_unaligned_le16	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u16 get_unaligned_le16(const void *p)$/;"	f	typeref:typename:u16
get_unaligned_le16	include/linux/unaligned/access_ok.h	/^static inline u16 get_unaligned_le16(const void *p)$/;"	f	typeref:typename:u16
get_unaligned_le16	include/linux/unaligned/le_byteshift.h	/^static inline u16 get_unaligned_le16(const void *p)$/;"	f	typeref:typename:u16
get_unaligned_le32	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u32 get_unaligned_le32(const void *p)$/;"	f	typeref:typename:u32
get_unaligned_le32	include/linux/unaligned/access_ok.h	/^static inline u32 get_unaligned_le32(const void *p)$/;"	f	typeref:typename:u32
get_unaligned_le32	include/linux/unaligned/le_byteshift.h	/^static inline u32 get_unaligned_le32(const void *p)$/;"	f	typeref:typename:u32
get_unaligned_le64	arch/sh/include/asm/unaligned-sh4a.h	/^static inline u64 get_unaligned_le64(const void *p)$/;"	f	typeref:typename:u64
get_unaligned_le64	include/linux/unaligned/access_ok.h	/^static inline u64 get_unaligned_le64(const void *p)$/;"	f	typeref:typename:u64
get_unaligned_le64	include/linux/unaligned/le_byteshift.h	/^static inline u64 get_unaligned_le64(const void *p)$/;"	f	typeref:typename:u64
get_upper_bound	tools/buildman/kconfiglib.py	/^    def get_upper_bound(self):$/;"	m	class:Symbol
get_usart_clk_rate	arch/arm/mach-at91/include/mach/clk.h	/^static inline unsigned long get_usart_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_usart_clk_rate	arch/avr32/include/asm/arch-at32ap700x/clk.h	/^static inline unsigned long get_usart_clk_rate(unsigned int dev_id)$/;"	f	typeref:typename:unsigned long
get_usb_dpll_params	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const struct dpll_params *get_usb_dpll_params(struct dplls const *dpll_data)$/;"	f	typeref:typename:const struct dpll_params *
get_usdhc_clk	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 get_usdhc_clk(u32 port)$/;"	f	typeref:typename:u32	file:
get_usdhc_clk	arch/arm/cpu/armv8/s32v234/generic.c	/^static u32 get_usdhc_clk(void)$/;"	f	typeref:typename:u32	file:
get_usec	arch/sh/lib/time_sh2.c	/^static unsigned long get_usec (void)$/;"	f	typeref:typename:unsigned long	file:
get_user_input	common/cli_hush.c	/^static void get_user_input(struct in_str *i)$/;"	f	typeref:typename:void	file:
get_user_selection	tools/buildman/kconfiglib.py	/^    def get_user_selection(self):$/;"	m	class:Choice
get_user_value	tools/buildman/kconfiglib.py	/^    def get_user_value(self):$/;"	m	class:Symbol
get_val	drivers/mmc/davinci_mmc.c	/^#define get_val(/;"	d	file:
get_valid_win_rx	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^int get_valid_win_rx(u32 dev_num, u32 if_id, u8 res[4])$/;"	f	typeref:typename:int
get_value	include/asm-generic/gpio.h	/^	int (*get_value)(struct udevice *dev, unsigned offset);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset)
get_value	include/power/regulator.h	/^	int (*get_value)(struct udevice *dev);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev)
get_value	tools/buildman/kconfiglib.py	/^    def get_value(self):$/;"	m	class:Symbol
get_vbus_detect_gpio	arch/arm/mach-sunxi/usb_phy.c	/^static int get_vbus_detect_gpio(int index)$/;"	f	typeref:typename:int	file:
get_vbus_gpio	arch/arm/mach-sunxi/usb_phy.c	/^static int get_vbus_gpio(int index)$/;"	f	typeref:typename:int	file:
get_vco	arch/blackfin/lib/clocks.c	/^u_long get_vco(void)$/;"	f	typeref:typename:u_long
get_vendor	include/cpu.h	/^	int (*get_vendor)(struct udevice *dev, char *buf, int size);$/;"	m	struct:cpu_ops	typeref:typename:int (*)(struct udevice * dev,char * buf,int size)
get_version	common/exports.c	/^unsigned long get_version(void)$/;"	f	typeref:typename:unsigned long
get_vfatname	fs/fat/fat.c	/^get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,$/;"	f	typeref:typename:int	file:
get_visibility	tools/buildman/kconfiglib.py	/^    def get_visibility(self):$/;"	m	class:Choice
get_visibility	tools/buildman/kconfiglib.py	/^    def get_visibility(self):$/;"	m	class:Comment
get_visibility	tools/buildman/kconfiglib.py	/^    def get_visibility(self):$/;"	m	class:Menu
get_visibility	tools/buildman/kconfiglib.py	/^    def get_visibility(self):$/;"	m	class:Symbol
get_visible_if_visibility	tools/buildman/kconfiglib.py	/^    def get_visible_if_visibility(self):$/;"	m	class:Menu
get_vref	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_vref(uint8_t channel, uint8_t byte_lane)$/;"	f	typeref:typename:uint32_t
get_wclk	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_wclk(uint8_t channel, uint8_t rank)$/;"	f	typeref:typename:uint32_t
get_wcmd	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_wcmd(uint8_t channel)$/;"	f	typeref:typename:uint32_t
get_wctl	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_wctl(uint8_t channel, uint8_t rank)$/;"	f	typeref:typename:uint32_t
get_wdq	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_wdq(uint8_t channel, uint8_t rank, uint8_t byte_lane)$/;"	f	typeref:typename:uint32_t
get_wdqs	arch/x86/cpu/quark/mrc_util.c	/^uint32_t get_wdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane)$/;"	f	typeref:typename:uint32_t
get_win_cnt	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static uint32_t get_win_cnt(uint64_t size)$/;"	f	typeref:typename:uint32_t	file:
get_window_mid_index	drivers/ddr/altera/sequencer.c	/^static int get_window_mid_index(const int write, int *left_edge,$/;"	f	typeref:typename:int	file:
get_word	common/bedbug.c	/^int get_word (char **src, char *dest)$/;"	f	typeref:typename:int
get_wp	include/mmc.h	/^	int (*get_wp)(struct udevice *dev);$/;"	m	struct:dm_mmc_ops	typeref:typename:int (*)(struct udevice * dev)
get_znode	fs/ubifs/tnc.c	/^static struct ubifs_znode *get_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
get_zq_config_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u32 get_zq_config_reg(const struct lpddr2_device_details *cs1_device,$/;"	f	typeref:typename:u32	file:
getc	common/console.c	/^int getc(void)$/;"	f	typeref:typename:int
getc	include/keyboard.h	/^	int (*getc)(struct udevice *dev);$/;"	m	struct:keyboard_ops	typeref:typename:int (*)(struct udevice * dev)
getc	include/serial.h	/^	int	(*getc)(void);$/;"	m	struct:serial_device	typeref:typename:int (*)(void)
getc	include/serial.h	/^	int (*getc)(struct udevice *dev);$/;"	m	struct:dm_serial_ops	typeref:typename:int (*)(struct udevice * dev)
getc	include/stdio_dev.h	/^	int (*getc)(struct stdio_dev *dev);	\/* To get that char *\/$/;"	m	struct:stdio_dev	typeref:typename:int (*)(struct stdio_dev * dev)
getc	post/cpu/mpc8xx/uart.c	/^	int (*getc) (int index);$/;"	m	struct:__anon0de951550108	typeref:typename:int (*)(int index)	file:
getcap_in	drivers/tpm/tpm_tis.h	/^	struct tpm_getcap_params_in getcap_in;$/;"	m	union:tpm_cmd_params	typeref:struct:tpm_getcap_params_in
getcap_out	drivers/tpm/tpm_tis.h	/^	struct tpm_getcap_params_out getcap_out;$/;"	m	union:tpm_cmd_params	typeref:struct:tpm_getcap_params_out
getcd	drivers/mmc/s3c_sdi.c	/^	int (*getcd)(struct mmc *);$/;"	m	struct:s3cmmc_priv	typeref:typename:int (*)(struct mmc *)	file:
getcd	include/mmc.h	/^	int (*getcd)(struct mmc *mmc);$/;"	m	struct:mmc_ops	typeref:typename:int (*)(struct mmc * mmc)
getcmd_cbeep	common/cli_readline.c	/^#define getcmd_cbeep(/;"	d	file:
getcmd_getch	common/cli_readline.c	/^#define getcmd_getch(/;"	d	file:
getcmd_putch	common/cli_readline.c	/^#define getcmd_putch(/;"	d	file:
getcolreg	include/stdio_dev.h	/^	void (*getcolreg) (int, void *);$/;"	m	struct:__anon77b06a0f0108	typeref:typename:void (*)(int,void *)
getcxmodem	cmd/load.c	/^static int getcxmodem(void) {$/;"	f	typeref:typename:int	file:
getcymodem	common/spl/spl_ymodem.c	/^static int getcymodem(void) {$/;"	f	typeref:typename:int	file:
getenv	cmd/nvedit.c	/^char *getenv(const char *name)$/;"	f	typeref:typename:char *
getenv	common/env_flags.c	/^#define getenv /;"	d	file:
getenv	include/common.h	/^#define getenv /;"	d
getenv_bootm_low	common/image.c	/^ulong getenv_bootm_low(void)$/;"	f	typeref:typename:ulong
getenv_bootm_mapsize	common/image.c	/^phys_size_t getenv_bootm_mapsize(void)$/;"	f	typeref:typename:phys_size_t
getenv_bootm_size	common/image.c	/^phys_size_t getenv_bootm_size(void)$/;"	f	typeref:typename:phys_size_t
getenv_default	common/env_common.c	/^char *getenv_default(const char *name)$/;"	f	typeref:typename:char *
getenv_f	cmd/nvedit.c	/^int getenv_f(const char *name, char *buf, unsigned len)$/;"	f	typeref:typename:int
getenv_hex	cmd/nvedit.c	/^ulong getenv_hex(const char *varname, ulong default_val)$/;"	f	typeref:typename:ulong
getenv_ip	include/common.h	/^static inline struct in_addr getenv_ip(char *var)$/;"	f	typeref:struct:in_addr
getenv_mtdparts	cmd/mtdparts.c	/^static const char *getenv_mtdparts(char *buf)$/;"	f	typeref:typename:const char *	file:
getenv_ulong	cmd/nvedit.c	/^ulong getenv_ulong(const char *name, int base, ulong default_val)$/;"	f	typeref:typename:ulong
getenv_vlan	net/net.c	/^ushort getenv_vlan(char *var)$/;"	f	typeref:typename:ushort
getenv_yesno	common/env_common.c	/^int getenv_yesno(const char *var)$/;"	f	typeref:typename:int
getfreq	arch/arm/cpu/arm920t/s3c24x0/cpu_info.c	/^typedef ulong (*getfreq)(void);$/;"	t	typeref:typename:ulong (*)(void)	file:
getfrom_srom	drivers/net/dc2114x.c	/^getfrom_srom(struct eth_device* dev, u_long addr)$/;"	f	typeref:typename:int	file:
gether_control_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct gether_control_regs {$/;"	s
gether_control_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct gether_control_regs {$/;"	s
gether_control_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct gether_control_regs {$/;"	s
getline	examples/standalone/atmel_df_pow2.c	/^static char *getline(void)$/;"	f	typeref:typename:char *	file:
getline	examples/standalone/smc911x_eeprom.c	/^static char *getline(void)$/;"	f	typeref:typename:char *	file:
getline	tools/getline.c	/^int getline (char **lineptr, size_t *n, FILE *stream)$/;"	f	typeref:typename:int
getpacket	common/kgdb.c	/^getpacket(char *buffer)$/;"	f	typeref:typename:void	file:
getpkt	tools/gdb/remote.c	/^getpkt (buf, forever)$/;"	f	file:
getstr	tools/getline.c	/^static int getstr(char **lineptr, size_t *n, FILE *stream,$/;"	f	typeref:typename:int	file:
gettbl	post/cpu/mpc8xx/watchdog.c	/^static ulong gettbl (void)$/;"	f	typeref:typename:ulong	file:
gettext	scripts/kconfig/lkc.h	/^static inline const char *gettext(const char *txt) { return txt; }$/;"	f	typeref:typename:const char *
gettext	scripts/kconfig/lxdialog/dialog.h	/^# define gettext(/;"	d
getwp	drivers/mmc/s3c_sdi.c	/^	int (*getwp)(struct mmc *);$/;"	m	struct:s3cmmc_priv	typeref:typename:int (*)(struct mmc *)	file:
getwp	include/mmc.h	/^	int (*getwp)(struct mmc *mmc);$/;"	m	struct:mmc_ops	typeref:typename:int (*)(struct mmc * mmc)
gevt	drivers/usb/dwc3/core.h	/^	struct dwc3_event_gevt		gevt;$/;"	m	union:dwc3_event	typeref:struct:dwc3_event_gevt
gf_div	lib/bch.c	/^static inline unsigned int gf_div(struct bch_control *bch, unsigned int a,$/;"	f	typeref:typename:unsigned int	file:
gf_inv	lib/bch.c	/^static inline unsigned int gf_inv(struct bch_control *bch, unsigned int a)$/;"	f	typeref:typename:unsigned int	file:
gf_mul	lib/bch.c	/^static inline unsigned int gf_mul(struct bch_control *bch, unsigned int a,$/;"	f	typeref:typename:unsigned int	file:
gf_poly	lib/bch.c	/^struct gf_poly {$/;"	s	file:
gf_poly_copy	lib/bch.c	/^static void gf_poly_copy(struct gf_poly *dst, struct gf_poly *src)$/;"	f	typeref:typename:void	file:
gf_poly_deg1	lib/bch.c	/^struct gf_poly_deg1 {$/;"	s	file:
gf_poly_div	lib/bch.c	/^static void gf_poly_div(struct bch_control *bch, struct gf_poly *a,$/;"	f	typeref:typename:void	file:
gf_poly_gcd	lib/bch.c	/^static struct gf_poly *gf_poly_gcd(struct bch_control *bch, struct gf_poly *a,$/;"	f	typeref:struct:gf_poly *	file:
gf_poly_logrep	lib/bch.c	/^static void gf_poly_logrep(struct bch_control *bch,$/;"	f	typeref:typename:void	file:
gf_poly_mod	lib/bch.c	/^static void gf_poly_mod(struct bch_control *bch, struct gf_poly *a,$/;"	f	typeref:typename:void	file:
gf_sqr	lib/bch.c	/^static inline unsigned int gf_sqr(struct bch_control *bch, unsigned int a)$/;"	f	typeref:typename:unsigned int	file:
gfemr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	gfemr;$/;"	m	struct:ccsr_cpm_fcc1_ext	typeref:typename:u8
gfemr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	gfemr;$/;"	m	struct:ccsr_cpm_fcc2_ext	typeref:typename:u8
gfemr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	gfemr;$/;"	m	struct:ccsr_cpm_fcc3_ext	typeref:typename:u8
gfer	drivers/gpio/mvgpio.h	/^	u32 gfer;	\/* Falling-Edge Detect Enable Register - 0x003C *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gfmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gfmr;$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u32
gfmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gfmr;$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u32
gfmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gfmr;$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u32
gfp_t	include/linux/types.h	/^typedef unsigned __bitwise__	gfp_t;$/;"	t	typeref:typename:unsigned __bitwise__
gfx_attributes	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_attributes;			\/* 0xA0 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_ba0	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_ba0;				\/* 0x80 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_ba1	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_ba1;				\/* 0x84 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_fck_div_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	gfx_fck_div_ck: gfx_fck_div_ck {$/;"	l
gfx_fck_div_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	gfx_fck_div_ck: gfx_fck_div_ck {$/;"	l
gfx_fclk_clksel_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	gfx_fclk_clksel_ck: gfx_fclk_clksel_ck {$/;"	l
gfx_fclk_clksel_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	gfx_fclk_clksel_ck: gfx_fclk_clksel_ck {$/;"	l
gfx_fifo_size_status	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_fifo_size_status;		\/* 0xA8 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_fifo_threshold	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_fifo_threshold;			\/* 0xA4 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_format	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_format;$/;"	m	struct:panel_config	typeref:typename:u32
gfx_pixel_inc	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_pixel_inc;			\/* 0xB0 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_position	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_position;			\/* 0x88 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_row_inc	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_row_inc;			\/* 0xAC *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_size	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_size;				\/* 0x8C *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_table_ba	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_table_ba;			\/* 0xB8 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
gfx_window_skip	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 gfx_window_skip;			\/* 0xB4 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
ggpio	drivers/usb/host/dwc2.h	/^	u32			ggpio;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
ghc	drivers/block/dwc_ahsata.c	/^	u32 ghc;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
ghcca	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^struct ohci_hcca ghcca[1];$/;"	v	typeref:struct:ohci_hcca[1]
ghcca	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^struct ohci_hcca ghcca[1];$/;"	v	typeref:struct:ohci_hcca[1]
ghcca	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^struct ohci_hcca ghcca[1];$/;"	v	typeref:struct:ohci_hcca[1]
ghcca	drivers/usb/host/ohci-hcd.c	/^struct ohci_hcca ghcca[1];$/;"	v	typeref:struct:ohci_hcca[1]
ghcca	drivers/usb/host/ohci-s3c24xx.c	/^struct ohci_hcca ghcca[1];$/;"	v	typeref:struct:ohci_hcca[1]
ghost_filter	drivers/input/cros_ec_keyb.c	/^	int ghost_filter;		\/* 1 to enable ghost filter, else 0 *\/$/;"	m	struct:cros_ec_keyb_priv	typeref:typename:int	file:
ghost_filter	include/key_matrix.h	/^	int ghost_filter;		\/* non-zero to enable ghost filter *\/$/;"	m	struct:key_matrix	typeref:typename:int
ghwcfg1	drivers/usb/host/dwc2.h	/^	u32			ghwcfg1;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
ghwcfg2	drivers/usb/host/dwc2.h	/^	u32			ghwcfg2;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
ghwcfg3	drivers/usb/host/dwc2.h	/^	u32			ghwcfg3;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
ghwcfg4	drivers/usb/host/dwc2.h	/^	u32			ghwcfg4;	\/* 0x050 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gi2cctl	drivers/usb/host/dwc2.h	/^	u32			gi2cctl;	\/* 0x030 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gic	arch/arm/dts/am4372.dtsi	/^	gic: interrupt-controller@48241000 {$/;"	l
gic	arch/arm/dts/armada-375.dtsi	/^			gic: interrupt-controller@d000 {$/;"	l
gic	arch/arm/dts/armada-37xx.dtsi	/^			gic: interrupt-controller@1d00000 {$/;"	l
gic	arch/arm/dts/armada-38x.dtsi	/^			gic: interrupt-controller@d000 {$/;"	l
gic	arch/arm/dts/armada-ap806.dtsi	/^			gic: interrupt-controller@210000 {$/;"	l
gic	arch/arm/dts/dra7.dtsi	/^	gic: interrupt-controller@48211000 {$/;"	l
gic	arch/arm/dts/exynos4210.dtsi	/^	gic: interrupt-controller@10490000 {$/;"	l
gic	arch/arm/dts/exynos4412.dtsi	/^	gic: interrupt-controller@10490000 {$/;"	l
gic	arch/arm/dts/exynos5.dtsi	/^	gic: interrupt-controller@10481000 {$/;"	l
gic	arch/arm/dts/fsl-ls1012a.dtsi	/^	gic: interrupt-controller@1400000 {$/;"	l
gic	arch/arm/dts/fsl-ls1043a.dtsi	/^	gic: interrupt-controller@1400000 {$/;"	l
gic	arch/arm/dts/fsl-ls1046a.dtsi	/^	gic: interrupt-controller@1400000 {$/;"	l
gic	arch/arm/dts/fsl-ls2080a.dtsi	/^	gic: interrupt-controller@6000000 {$/;"	l
gic	arch/arm/dts/hi6220.dtsi	/^	gic: interrupt-controller@f6801000 {$/;"	l
gic	arch/arm/dts/k2g.dtsi	/^	gic: interrupt-controller {$/;"	l
gic	arch/arm/dts/keystone.dtsi	/^	gic: interrupt-controller {$/;"	l
gic	arch/arm/dts/ls1021a.dtsi	/^		gic: interrupt-controller@1400000 {$/;"	l
gic	arch/arm/dts/meson-gxbb.dtsi	/^		gic: interrupt-controller@c4301000 {$/;"	l
gic	arch/arm/dts/rk3036.dtsi	/^	gic: interrupt-controller@10139000 {$/;"	l
gic	arch/arm/dts/rk3288.dtsi	/^	gic: interrupt-controller@ffc01000 {$/;"	l
gic	arch/arm/dts/rk3399.dtsi	/^	gic: interrupt-controller@fee00000 {$/;"	l
gic	arch/arm/dts/sun50i-a64.dtsi	/^	gic: interrupt-controller@1c81000 {$/;"	l
gic	arch/arm/dts/sun6i-a31.dtsi	/^		gic: interrupt-controller@01c81000 {$/;"	l
gic	arch/arm/dts/sun7i-a20.dtsi	/^		gic: interrupt-controller@01c81000 {$/;"	l
gic	arch/arm/dts/sun8i-a23-a33.dtsi	/^		gic: interrupt-controller@01c81000 {$/;"	l
gic	arch/arm/dts/sun8i-a83t.dtsi	/^		gic: interrupt-controller@01c81000 {$/;"	l
gic	arch/arm/dts/sun8i-h3.dtsi	/^		gic: interrupt-controller@01c81000 {$/;"	l
gic	arch/arm/dts/sun9i-a80.dtsi	/^		gic: interrupt-controller@01c41000 {$/;"	l
gic	arch/arm/dts/tegra114.dtsi	/^	gic: interrupt-controller@50041000 {$/;"	l
gic	arch/arm/dts/tegra124.dtsi	/^	gic: interrupt-controller@50041000 {$/;"	l
gic	arch/arm/dts/tegra186.dtsi	/^	gic: interrupt-controller@3881000 {$/;"	l
gic	arch/arm/dts/tegra210.dtsi	/^	gic: interrupt-controller@50041000 {$/;"	l
gic	arch/arm/dts/uniphier-ld11.dtsi	/^		gic: interrupt-controller@5fe00000 {$/;"	l
gic	arch/arm/dts/uniphier-ld20.dtsi	/^		gic: interrupt-controller@5fe00000 {$/;"	l
gic	arch/arm/dts/zynqmp.dtsi	/^		gic: interrupt-controller@f9010000 {$/;"	l	label:amba_apu
gic	arch/mips/dts/img,boston.dts	/^	gic: interrupt-controller {$/;"	l
gic0	arch/arm/dts/thunderx-88xx.dtsi	/^		gic0: interrupt-controller@8010,00000000 {$/;"	l
gic_spi	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define gic_spi(/;"	d
gic_v2m0	arch/arm/dts/armada-ap806.dtsi	/^				gic_v2m0: v2m@280000 {$/;"	l	label:gic
gic_v2m1	arch/arm/dts/armada-ap806.dtsi	/^				gic_v2m1: v2m@290000 {$/;"	l	label:gic
gic_v2m2	arch/arm/dts/armada-ap806.dtsi	/^				gic_v2m2: v2m@2a0000 {$/;"	l	label:gic
gic_v2m3	arch/arm/dts/armada-ap806.dtsi	/^				gic_v2m3: v2m@2b0000 {$/;"	l	label:gic
gid	fs/ubifs/ubifs-media.h	/^	__le32 gid;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
gid	include/cramfs/cramfs_fs.h	/^	u32 size:CRAMFS_SIZE_WIDTH, gid:CRAMFS_GID_WIDTH;$/;"	m	struct:cramfs_inode	typeref:typename:u32
gid	include/ext_common.h	/^	__le16 gid;$/;"	m	struct:ext2_inode	typeref:typename:__le16
gid	include/jffs2/jffs2.h	/^	__u16 gid;        \/* The file's group.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u16
gid16_t	include/linux/types.h	/^typedef __kernel_gid16_t        gid16_t;$/;"	t	typeref:typename:__kernel_gid16_t
gid_reserved	include/ext_common.h	/^	__le16 gid_reserved;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
gid_t	include/linux/types.h	/^typedef __kernel_gid32_t	gid_t;$/;"	t	typeref:typename:__kernel_gid32_t
gid_t	include/linux/types.h	/^typedef __kernel_gid_t		gid_t;$/;"	t	typeref:typename:__kernel_gid_t
giintfrc	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t giintfrc;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
giintmsk	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t giintmsk;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
giintrosts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t giintrosts;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
giintsts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t giintsts;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
gimr	include/usb/fotg210.h	/^	uint32_t gimr;	\/* 0x130: Group Interrupt Mask Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gimr0	include/usb/fotg210.h	/^	uint32_t gimr0; \/* 0x134: Group Interrupt Mask Register 0 *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gimr1	include/usb/fotg210.h	/^	uint32_t gimr1; \/* 0x138: Group Interrupt Mask Register 1 *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gimr2	include/usb/fotg210.h	/^	uint32_t gimr2; \/* 0x13c: Group Interrupt Mask Register 2 *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gindex	fs/ext4/ext4_journal.c	/^int gindex;$/;"	v	typeref:typename:int
gintmsk	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gintmsk; \/* Core Interrupt Mask *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gintmsk	drivers/usb/host/dwc2.h	/^	u32			gintmsk;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gintsts	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gintsts; \/* Core Interrupt *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gintsts	drivers/usb/host/dwc2.h	/^	u32			gintsts;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gisr	include/usb/fotg210.h	/^	uint32_t gisr;	\/* 0x140: Group Interrupt Status Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gisr0	include/usb/fotg210.h	/^	uint32_t gisr0; \/* 0x144: Group Interrupt Status Register 0 *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gisr1	include/usb/fotg210.h	/^	uint32_t gisr1; \/* 0x148: Group Interrupt Status Register 1 *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
gisr2	include/usb/fotg210.h	/^	uint32_t gisr2; \/* 0x14c: Group Interrupt Status Register 2 *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
git_execute_cmd	scripts/get_maintainer.pl	/^sub git_execute_cmd {$/;"	s
gius	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 gius;$/;"	m	struct:gpio_regs	typeref:typename:u32
giveback_first_trb	drivers/usb/host/xhci-ring.c	/^static void giveback_first_trb(struct usb_device *udev, int ep_index,$/;"	f	typeref:typename:void	file:
gizmo_ahb_mem	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_ahb_mem;		\/* _GIZMO_AHB_MEM_0,		10h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_ahb_mem	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_ahb_mem;		\/* _GIZMO_AHB_MEM_0,		10h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_ahb_xbar_bridge	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_ahb_xbar_bridge;	\/* _GIZMO_AHB_XBAR_BRIDGE_0,	24h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_ahb_xbar_bridge	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_ahb_xbar_bridge;	\/* _GIZMO_AHB_XBAR_BRIDGE_0,	24h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_apb_dma	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_apb_dma;		\/* _GIZMO_APB_DMA_0,		14h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_apb_dma	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_apb_dma;		\/* _GIZMO_APB_DMA_0,		14h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_bsea	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_bsea;			\/* _GIZMO_BSEA_0,		74h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_bsea	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_bsea;			\/* _GIZMO_BSEA_0,		74h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_bsev	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_bsev;			\/* _GIZMO_BSEV_0,		64h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_bsev	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_bsev;			\/* _GIZMO_BSEV_0,		64h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_cop_ahb_bridge	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_cop_ahb_bridge;	\/* _GIZMO_COP_AHB_BRIDGE_0,	2ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_cop_ahb_bridge	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_cop_ahb_bridge;	\/* _GIZMO_COP_AHB_BRIDGE_0,	2ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_cpu_ahb_bridge	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_cpu_ahb_bridge;	\/* _GIZMO_CPU_AHB_BRIDGE_0,	28h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_cpu_ahb_bridge	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_cpu_ahb_bridge;	\/* _GIZMO_CPU_AHB_BRIDGE_0,	28h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_nand	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_nand;			\/* _GIZMO_NAND_0,		40h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_nand	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_nand;			\/* _GIZMO_NAND_0,		40h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_nor	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_nor;			\/* _GIZMO_NOR_0,		78h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_nor	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_nor;			\/* _GIZMO_NOR_0,		78h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc1	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_sdmmc1;		\/* _GIZMO_SDMMC1_0,		84h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc1	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_sdmmc1;		\/* _GIZMO_SDMMC1_0,		84h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc2	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_sdmmc2;		\/* _GIZMO_SDMMC2_0,		88h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc2	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_sdmmc2;		\/* _GIZMO_SDMMC2_0,		88h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc3	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_sdmmc3;		\/* _GIZMO_SDMMC3_0,		8ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc3	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_sdmmc3;		\/* _GIZMO_SDMMC3_0,		8ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc4	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_sdmmc4;		\/* _GIZMO_SDMMC4_0,		48h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_sdmmc4	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_sdmmc4;		\/* _GIZMO_SDMMC4_0,		48h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_se	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_se;			\/* _GIZMO_SE_0,			50h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_se	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_se;			\/* _GIZMO_SE_0,			50h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_tzram	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_tzram;		\/* _GIZMO_TZRAM_0,		54h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_tzram	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_tzram;		\/* _GIZMO_TZRAM_0,		54h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_usb	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_usb;			\/* _GIZMO_USB_0,		20h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_usb	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_usb;			\/* _GIZMO_USB_0,		20h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_usb2	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_usb2;			\/* _GIZMO_USB2_0,		7ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_usb2	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_usb2;			\/* _GIZMO_USB2_0,		7ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_usb3	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_usb3;			\/* _GIZMO_USB3_0,		80h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_usb3	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_usb3;			\/* _GIZMO_USB3_0,		80h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_vcp_ahb_bridge	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_vcp_ahb_bridge;	\/* _GIZMO_VCP_AHB_BRIDGE_0,	34h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_vcp_ahb_bridge	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_vcp_ahb_bridge;	\/* _GIZMO_VCP_AHB_BRIDGE_0,	34h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_xbar_apb_ctlr	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 gizmo_xbar_apb_ctlr;	\/* _GIZMO_XBAR_APB_CTLR_0,	30h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gizmo_xbar_apb_ctlr	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 gizmo_xbar_apb_ctlr;	\/* _GIZMO_XBAR_APB_CTLR_0,	30h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
gl1iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl1iack;		\/* 0x04 *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
gl2iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl2iack;		\/* 0x08 *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
gl3iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl3iack;		\/* 0x0C *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
gl4iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl4iack;		\/* 0x10 *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
gl5iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl5iack;		\/* 0x14 *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
gl6iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl6iack;		\/* 0x18 *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
gl7iack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 gl7iack;		\/* 0x1C *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
glb_cnt_th	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 glb_cnt_th;$/;"	m	struct:rk3399_cru	typeref:typename:u32
glb_rst_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 glb_rst_con;$/;"	m	struct:rk3399_cru	typeref:typename:u32
glb_rst_st	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 glb_rst_st;$/;"	m	struct:rk3399_cru	typeref:typename:u32
glb_srst_fst_value	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 glb_srst_fst_value;$/;"	m	struct:rk3399_cru	typeref:typename:u32
glb_srst_snd_value	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 glb_srst_snd_value;$/;"	m	struct:rk3399_cru	typeref:typename:u32
glconfig	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t glconfig;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
glob_lcd_mem	board/esd/common/lcd.c	/^unsigned char *glob_lcd_mem;$/;"	v	typeref:typename:unsigned char *
glob_lcd_reg	board/esd/common/lcd.c	/^unsigned char *glob_lcd_reg;$/;"	v	typeref:typename:unsigned char *
glob_needed	common/cli_hush.c	/^static int glob_needed(const char *s)$/;"	f	typeref:typename:int	file:
glob_result	common/cli_hush.c	/^	glob_t glob_result;			\/* result of parameter globbing *\/$/;"	m	struct:child_prog	typeref:typename:glob_t	file:
glob_tmp	arch/sparc/cpu/leon2/start.S	/^#define glob_tmp /;"	d	file:
glob_tmp	arch/sparc/cpu/leon3/start.S	/^#define glob_tmp /;"	d	file:
global	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct global_ctl_regs	*global;$/;"	m	struct:pktdma_cfg	typeref:struct:global_ctl_regs *
global_alpha	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 global_alpha;			\/* 0x74 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
global_alpha	arch/arm/include/asm/arch-tegra/dc.h	/^	uint global_alpha;		\/* _WIN_GLOBAL_ALPHA *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
global_argc	common/cli_hush.c	/^unsigned int global_argc;$/;"	v	typeref:typename:unsigned int
global_argv	common/cli_hush.c	/^char **global_argv;$/;"	v	typeref:typename:char **
global_board_data_init	arch/blackfin/cpu/cpu.c	/^static int global_board_data_init(void)$/;"	f	typeref:typename:int	file:
global_ctl_regs	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct global_ctl_regs {$/;"	s
global_data	examples/standalone/stubs.c	/^gd_t *global_data;$/;"	v	typeref:typename:gd_t *
global_data	include/asm-generic/global_data.h	/^typedef struct global_data {$/;"	s
global_dm_test_state	test/dm/test-main.c	/^struct unit_test_state global_dm_test_state;$/;"	v	typeref:struct:unit_test_state
global_exit	scripts/kconfig/nconf.c	/^static int global_exit;$/;"	v	typeref:typename:int	file:
global_interrupt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t global_interrupt;$/;"	m	struct:dma_regs	typeref:typename:uint32_t
global_interrupt	drivers/net/xilinx_emaclite.c	/^	u32 global_interrupt; \/* 0x7f8 - Global interrupt enable *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
global_lock	arch/x86/include/asm/acpi_table.h	/^	u32 global_lock;		\/* Global lock *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
global_priv	lib/efi/efi_app.c	/^static struct efi_priv *global_priv;$/;"	v	typeref:struct:efi_priv *	file:
global_priv	lib/efi/efi_stub.c	/^static struct efi_priv *global_priv;$/;"	v	typeref:struct:efi_priv *	file:
global_pwroff	arch/arm/dts/rk3288.dtsi	/^			global_pwroff: global-pwroff {$/;"	l	label:pinctrl
global_reset	board/freescale/t4rdb/cpld.h	/^	u8 global_reset;\/* 0x0e - Reset System With Default Registers Value *\/$/;"	m	struct:cpld_data	typeref:typename:u8
global_rst	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 global_rst;		\/* reset with init CPLD reg to default *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
global_rst	board/freescale/ls1043ardb/cpld.h	/^	u8 global_rst;		\/* 0xE - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
global_rst	board/freescale/ls1046ardb/cpld.h	/^	u8 global_rst;		\/* 0xE - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
global_sqnum	drivers/mtd/ubi/ubi.h	/^	unsigned long long global_sqnum;$/;"	m	struct:ubi_device	typeref:typename:unsigned long long
global_timer	arch/arm/dts/zynq-7000.dtsi	/^		global_timer: timer@f8f00200 {$/;"	l	label:amba
global_timer	arch/arm/mach-rmobile/timer.c	/^static struct globaltimer *global_timer = \\$/;"	v	typeref:struct:globaltimer *	file:
globaltimer	arch/arm/include/asm/arch-armv7/globaltimer.h	/^struct globaltimer {$/;"	s
globhack	common/cli_hush.c	/^static int globhack(const char *src, int flags, glob_t *pglob)$/;"	f	typeref:typename:int	file:
glpmcfg	drivers/usb/host/dwc2.h	/^	u32			glpmcfg;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
glue_to_musb	drivers/usb/musb-new/am35x.c	/^#define glue_to_musb(/;"	d	file:
glue_to_musb	drivers/usb/musb-new/omap2430.c	/^#define glue_to_musb(/;"	d	file:
glyf	drivers/video/stb_truetype.h	/^   int loca,head,glyf,hhea,hmtx,kern; \/\/ table locations as offset from start of .ttf$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
gma_func0_init	drivers/video/ivybridge_igd.c	/^static int gma_func0_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gma_pm_init_post_vbios	drivers/video/ivybridge_igd.c	/^static int gma_pm_init_post_vbios(struct udevice *dev, int rev, void *gtt_bar)$/;"	f	typeref:typename:int	file:
gma_pm_init_pre_vbios	drivers/video/ivybridge_igd.c	/^static int gma_pm_init_pre_vbios(void *gtt_bar, int rev)$/;"	f	typeref:typename:int	file:
gmac	arch/arm/dts/rk3288.dtsi	/^	gmac: ethernet@ff290000 {$/;"	l
gmac	arch/arm/dts/sun6i-a31.dtsi	/^		gmac: ethernet@01c30000 {$/;"	l
gmac	arch/arm/dts/sun7i-a20.dtsi	/^		gmac: ethernet@01c50000 {$/;"	l
gmac	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *gmac;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
gmac0	arch/arm/dts/socfpga.dtsi	/^		gmac0: ethernet@ff700000 {$/;"	l
gmac0	arch/mips/dts/ar933x.dtsi	/^			gmac0: eth@0x19000000 {$/;"	l
gmac0	arch/mips/dts/ar934x.dtsi	/^			gmac0: eth@0x19000000 {$/;"	l
gmac1	arch/arm/dts/socfpga.dtsi	/^		gmac1: ethernet@ff702000 {$/;"	l
gmac1	arch/mips/dts/ar933x.dtsi	/^			gmac1: eth@0x1a000000 {$/;"	l
gmac1	arch/mips/dts/ar934x.dtsi	/^			gmac1: eth@0x1a000000 {$/;"	l
gmac_250m_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	gmac_250m_dclk_div: gmac_250m_dclk_div {$/;"	l
gmac_add	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_add(struct eth_device *dev)$/;"	f	typeref:typename:int
gmac_check_rx_done	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_check_rx_done(struct eth_dma *dma, uint8_t *buf)$/;"	f	typeref:typename:int
gmac_check_tx_done	drivers/net/bcm-sf2-eth-gmac.c	/^bool gmac_check_tx_done(struct eth_dma *dma)$/;"	f	typeref:typename:bool
gmac_clear_reset	drivers/net/bcm-sf2-eth-gmac.c	/^void gmac_clear_reset(void)$/;"	f	typeref:typename:void
gmac_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 gmac_clk_cfg;	\/* 0x164 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gmac_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 gmac_clk_cfg;	\/* 0xd0 GMAC clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gmac_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 gmac_clk_cfg;	\/* 0x164 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gmac_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 gmac_clk_cfg;	\/* 0xd0 GMAC clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gmac_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 gmac_ctr_reg;	\/* 0xA8 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
gmac_disable	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_disable(void)$/;"	f	typeref:typename:int
gmac_disable_dma	drivers/net/bcm-sf2-eth-gmac.c	/^static int gmac_disable_dma(struct eth_dma *dma, int dir)$/;"	f	typeref:typename:int	file:
gmac_dpll_params_2000mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params gmac_dpll_params_2000mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
gmac_enable	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_enable(void)$/;"	f	typeref:typename:int
gmac_enable_dma	drivers/net/bcm-sf2-eth-gmac.c	/^static int gmac_enable_dma(struct eth_dma *dma, int dir)$/;"	f	typeref:typename:int	file:
gmac_enable_local	drivers/net/bcm-sf2-eth-gmac.c	/^static void gmac_enable_local(bool en)$/;"	f	typeref:typename:void	file:
gmac_gmii_ref_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	gmac_gmii_ref_clk_div: gmac_gmii_ref_clk_div {$/;"	l
gmac_init_multi_queues	drivers/net/macb.c	/^static int gmac_init_multi_queues(struct macb_device *macb)$/;"	f	typeref:typename:int	file:
gmac_init_reset	drivers/net/bcm-sf2-eth-gmac.c	/^void gmac_init_reset(void)$/;"	f	typeref:typename:void
gmac_int_tx_clk	arch/arm/dts/sun6i-a31.dtsi	/^		gmac_int_tx_clk: clk@2 {$/;"	l
gmac_int_tx_clk	arch/arm/dts/sun7i-a20.dtsi	/^		gmac_int_tx_clk: clk@3 {$/;"	l
gmac_mac_init	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_mac_init(struct eth_device *dev)$/;"	f	typeref:typename:int
gmac_mii_busywait	drivers/net/bcm-sf2-eth-gmac.c	/^bool gmac_mii_busywait(unsigned int timeout)$/;"	f	typeref:typename:bool
gmac_miiphy_read	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)$/;"	f	typeref:typename:int
gmac_miiphy_write	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg,$/;"	f	typeref:typename:int
gmac_phy_reset_pin_bpi_m2	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin@0 {$/;"	l
gmac_phy_reset_pin_hummingbird	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin@0 {$/;"	l
gmac_pins_gmii_a	arch/arm/dts/sun6i-a31.dtsi	/^			gmac_pins_gmii_a: gmac_gmii@0 {$/;"	l	label:pio
gmac_pins_mii_a	arch/arm/dts/sun6i-a31.dtsi	/^			gmac_pins_mii_a: gmac_mii@0 {$/;"	l	label:pio
gmac_pins_mii_a	arch/arm/dts/sun7i-a20.dtsi	/^			gmac_pins_mii_a: gmac_mii@0 {$/;"	l	label:pio
gmac_pins_rgmii_a	arch/arm/dts/sun6i-a31.dtsi	/^			gmac_pins_rgmii_a: gmac_rgmii@0 {$/;"	l	label:pio
gmac_pins_rgmii_a	arch/arm/dts/sun7i-a20.dtsi	/^			gmac_pins_rgmii_a: gmac_rgmii@0 {$/;"	l	label:pio
gmac_power_pin_bananapi	arch/arm/dts/sun7i-a20-bananapi.dts	/^	gmac_power_pin_bananapi: gmac_power_pin@0 {$/;"	l
gmac_power_pin_bananapro	arch/arm/dts/sun7i-a20-bananapro.dts	/^	gmac_power_pin_bananapro: gmac_power_pin@0 {$/;"	l
gmac_power_pin_bpi_m1p	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	gmac_power_pin_bpi_m1p: gmac_power_pin@0 {$/;"	l
gmac_power_pin_i12_tvbox	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	gmac_power_pin_i12_tvbox: gmac_power_pin@0 {$/;"	l
gmac_power_pin_lamobo_r1	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^	gmac_power_pin_lamobo_r1: gmac_power_pin@0 {$/;"	l
gmac_power_pin_orangepi	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	gmac_power_pin_orangepi: gmac_power_pin@0 {$/;"	l
gmac_power_pin_orangepi	arch/arm/dts/sun7i-a20-orangepi.dts	/^	gmac_power_pin_orangepi: gmac_power_pin@0 {$/;"	l
gmac_power_pin_orangepi	arch/arm/dts/sun8i-h3-orangepi-plus.dts	/^	gmac_power_pin_orangepi: gmac_power_pin@0 {$/;"	l
gmac_power_pin_orangepi	arch/arm/dts/sun8i-h3-orangepi-plus2e.dts	/^	gmac_power_pin_orangepi: gmac_power_pin@0 {$/;"	l
gmac_rft_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	gmac_rft_clk_mux: gmac_rft_clk_mux {$/;"	l
gmac_set_mac_addr	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_set_mac_addr(unsigned char *mac)$/;"	f	typeref:typename:int
gmac_set_speed	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_set_speed(int speed, int duplex)$/;"	f	typeref:typename:int
gmac_synth_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 gmac_synth_clk;	\/* 0x68 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
gmac_tx_clk	arch/arm/dts/sun6i-a31.dtsi	/^		gmac_tx_clk: clk@01c200d0 {$/;"	l
gmac_tx_clk	arch/arm/dts/sun7i-a20.dtsi	/^		gmac_tx_clk: clk@01c20164 {$/;"	l
gmac_tx_packet	drivers/net/bcm-sf2-eth-gmac.c	/^int gmac_tx_packet(struct eth_dma *dma, void *packet, int length)$/;"	f	typeref:typename:int
gmac_vdd_pin_a20_hummingbird	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin@0 {$/;"	l
gmacfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	gmacfg;		\/* 0x100: APB_MISC_GP_GMACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmacfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	gmacfg;		\/* 0x100: APB_MISC_GP_GMACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmacfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	gmacfg;		\/* 0x100: APB_MISC_GP_GMACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmdbg	board/freescale/common/ngpixis.h	/^	u8 gmdbg;$/;"	m	struct:ngpixis	typeref:typename:u8
gmecfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	gmecfg;		\/* 0x110: APB_MISC_GP_GMECFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmecfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	gmecfg;		\/* 0x110: APB_MISC_GP_GMECFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmecfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	gmecfg;		\/* 0x110: APB_MISC_GP_GMECFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmfcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	gmfcfg;		\/* 0x114: APB_MISC_GP_GMFCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmfcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	gmfcfg;		\/* 0x114: APB_MISC_GP_GMFCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmfcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	gmfcfg;		\/* 0x114: APB_MISC_GP_GMFCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmgcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	gmgcfg;		\/* 0x118: APB_MISC_GP_GMGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmgcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	gmgcfg;		\/* 0x118: APB_MISC_GP_GMGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmgcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	gmgcfg;		\/* 0x118: APB_MISC_GP_GMGCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmhcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	gmhcfg;		\/* 0x11C: APB_MISC_GP_GMHCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmhcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	gmhcfg;		\/* 0x11C: APB_MISC_GP_GMHCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmhcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	gmhcfg;		\/* 0x11C: APB_MISC_GP_GMHCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
gmii	drivers/usb/eth/r8152.c	/^	bool           gmii;$/;"	m	struct:r8152_version	typeref:typename:bool	file:
gmii_m_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	gmii_m_clk_div: gmii_m_clk_div {$/;"	l
gmii_sel	include/cpsw.h	/^	u32	gmii_sel;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
gmode	drivers/video/mxc_ipuv3_fb.c	/^static struct fb_videomode const *gmode;$/;"	v	typeref:struct:fb_videomode const *	file:
gmp	drivers/video/rockchip/rk_hdmi.c	/^	u32 gmp;$/;"	m	struct:hdmi_mpll_config	typeref:typename:u32	file:
gnptxfsiz	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gnptxfsiz; \/* Non-Periodic Transmit FIFO Size *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gnptxfsiz	drivers/usb/host/dwc2.h	/^	u32			gnptxfsiz;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gnptxsts	drivers/usb/host/dwc2.h	/^	u32			gnptxsts;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gnss_rtc_out_ctrl	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gnss_rtc_out_ctrl;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gnss_rtc_out_ctrl	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gnss_rtc_out_ctrl;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
goBack	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::goBack(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
goParent	scripts/kconfig/qconf.h	/^	bool goParent;$/;"	m	class:ConfigItem	typeref:typename:bool
gocl	arch/m68k/include/asm/immap_5227x.h	/^	u32 gocl;$/;"	m	struct:rtcex	typeref:typename:u32
gocl	arch/m68k/include/asm/immap_5301x.h	/^	u32 gocl;$/;"	m	struct:rtcex	typeref:typename:u32
gocl	arch/m68k/include/asm/immap_5445x.h	/^	u32 gocl;$/;"	m	struct:rtcex	typeref:typename:u32
gocu	arch/m68k/include/asm/immap_5227x.h	/^	u32 gocu;$/;"	m	struct:rtcex	typeref:typename:u32
gocu	arch/m68k/include/asm/immap_5301x.h	/^	u32 gocu;$/;"	m	struct:rtcex	typeref:typename:u32
gocu	arch/m68k/include/asm/immap_5445x.h	/^	u32 gocu;$/;"	m	struct:rtcex	typeref:typename:u32
gohci	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static ohci_t gohci;$/;"	v	typeref:typename:ohci_t	file:
gohci	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static ohci_t gohci;$/;"	v	typeref:typename:ohci_t	file:
gohci	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static ohci_t gohci;$/;"	v	typeref:typename:ohci_t	file:
gohci	drivers/usb/host/ohci-hcd.c	/^static ohci_t gohci;$/;"	v	typeref:typename:ohci_t	file:
gohci	drivers/usb/host/ohci-s3c24xx.c	/^static struct ohci gohci;$/;"	v	typeref:struct:ohci	file:
good_file_magic	fs/cbfs/cbfs.c	/^static const u8 good_file_magic[] = "LARCHIVE";$/;"	v	typeref:typename:const u8[]	file:
good_length	lib/zlib/deflate.c	/^   ush good_length; \/* reduce lazy search above this match length *\/$/;"	m	struct:config_s	typeref:typename:ush	file:
good_magic	fs/cbfs/cbfs.c	/^static const u32 good_magic = 0x4f524243;$/;"	v	typeref:typename:const u32	file:
good_match	lib/zlib/deflate.h	/^    uInt good_match;$/;"	m	struct:internal_state	typeref:typename:uInt
good_peb_count	drivers/mtd/ubi/ubi.h	/^	int good_peb_count;$/;"	m	struct:ubi_device	typeref:typename:int
google_ramp_down	include/ec_commands.h	/^	int google_ramp_down;$/;"	m	struct:lightbar_params	typeref:typename:int
google_ramp_up	include/ec_commands.h	/^	int google_ramp_up;$/;"	m	struct:lightbar_params	typeref:typename:int
gop_blt	lib/efi_loader/efi_gop.c	/^static efi_status_t EFIAPI gop_blt(struct efi_gop *this, void *buffer,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
gop_query_mode	lib/efi_loader/efi_gop.c	/^static efi_status_t EFIAPI gop_query_mode(struct efi_gop *this, u32 mode_number,$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
gop_set_mode	lib/efi_loader/efi_gop.c	/^static efi_status_t EFIAPI gop_set_mode(struct efi_gop *this, u32 mode_number)$/;"	f	typeref:typename:efi_status_t EFIAPI	file:
gorch	drivers/net/e1000.h	/^	uint64_t gorch;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
gorcl	drivers/net/e1000.h	/^	uint64_t gorcl;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
got_fifoirq	board/esd/pmc440/cmd_pmc440.c	/^static int got_fifoirq;$/;"	v	typeref:typename:int	file:
got_hcirq	board/esd/pmc440/cmd_pmc440.c	/^static int got_hcirq;$/;"	v	typeref:typename:int	file:
got_init	arch/avr32/cpu/start.S	/^got_init:$/;"	l
got_init_reloc	arch/avr32/cpu/start.S	/^got_init_reloc:$/;"	l
got_irq	drivers/usb/gadget/pxa25x_udc.h	/^	unsigned				got_irq:1,$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
got_rhsc	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int got_rhsc;$/;"	v	typeref:typename:int
got_rhsc	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int got_rhsc;$/;"	v	typeref:typename:int
got_rhsc	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int got_rhsc;$/;"	v	typeref:typename:int
got_rhsc	drivers/usb/host/isp116x-hcd.c	/^static int got_rhsc;		\/* root hub status change *\/$/;"	v	typeref:typename:int	file:
got_rhsc	drivers/usb/host/ohci-s3c24xx.c	/^int got_rhsc;$/;"	v	typeref:typename:int
gotch	drivers/net/e1000.h	/^	uint64_t gotch;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
gotcl	drivers/net/e1000.h	/^	uint64_t gotcl;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
gotgctl	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gotgctl; \/* OTG Control & Status *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gotgctl	drivers/usb/host/dwc2.h	/^	u32			gotgctl;	\/* 0x000 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gotgint	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gotgint; \/* OTG Interrupt *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gotgint	drivers/usb/host/dwc2.h	/^	u32			gotgint;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gp	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	gp[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
gp	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	gp[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
gp	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	unsigned char gp;$/;"	m	struct:i2c_pin_ctrl	typeref:typename:unsigned char
gp	arch/mips/include/asm/regdef.h	/^#define gp	/;"	d
gp	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG gp;		\/* r29 *\/$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
gp1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 gp1;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
gp1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gp1;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
gp2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 gp2;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
gp2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gp2;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
gpIOs	board/BuR/brppt1/mux.c	/^static struct module_pin_mux gpIOs[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gp_adc_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 gp_adc_clk_cfg;	\/* 0x50c General Purpose ADC clk config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gp_adc_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 gp_adc_clk_cfg;	\/* 0x50c General Purpose ADC clk config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gp_conf0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_conf0;			\/* 0x3500 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_conf1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_conf1;			\/* 0x3501 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_conf2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_conf2;			\/* 0x3502 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_evm_dpll_ddr	board/ti/am43xx/board.c	/^const struct dpll_params gp_evm_dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params
gp_header	tools/gpheader.h	/^struct gp_header {$/;"	s
gp_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_int;			\/* 0x3504 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_mask	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_mask;			\/* 0x3505 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_part	include/mmc.h	/^	} gp_part[4];$/;"	m	struct:mmc_hwpart_conf	typeref:struct:mmc_hwpart_conf::__anona5bcc78b0308[4]
gp_pol	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_pol;			\/* 0x3506 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_stat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 gp_stat;			\/* 0x3503 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
gp_xm2cfga_padctrl_preemp	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 gp_xm2cfga_padctrl_preemp:1;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:1	file:
gp_xm2cfgd_padctrl_schmt	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 gp_xm2cfgd_padctrl_schmt:1;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:1	file:
gpa0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpa0: gpa0 {$/;"	l
gpa0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpa0: gpa0 {$/;"	l
gpa0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpa0: gpa0 {$/;"	l
gpa0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpa0: gpa0 {$/;"	l
gpa0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpa0: gpa0 {$/;"	l
gpa0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpa0: gpa0 {$/;"	l
gpa1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpa1: gpa1 {$/;"	l
gpa1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpa1: gpa1 {$/;"	l
gpa1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpa1: gpa1 {$/;"	l
gpa1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpa1: gpa1 {$/;"	l
gpa1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpa1: gpa1 {$/;"	l
gpa1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpa1: gpa1 {$/;"	l
gpa2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpa2: gpa2 {$/;"	l
gpa2	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpa2: gpa2 {$/;"	l
gpacon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpacon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpacr	arch/m68k/include/asm/immap_5235.h	/^	u8 gpacr;		\/* 0x30 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
gpacr	arch/m68k/include/asm/immap_5275.h	/^	u8 gpacr;$/;"	m	struct:sys_ctrl	typeref:typename:u8
gpacr0	arch/m68k/include/asm/immap_5282.h	/^	u8 gpacr0;$/;"	m	struct:scm_ctrl	typeref:typename:u8
gpacr1	arch/m68k/include/asm/immap_5282.h	/^	u8 gpacr1;$/;"	m	struct:scm_ctrl	typeref:typename:u8
gpadat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpadat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpanel	drivers/video/da8xx-fb.c	/^static GraphicDevice gpanel;$/;"	v	typeref:typename:GraphicDevice	file:
gparam1r	drivers/block/dwc_ahsata.c	/^	u32 gparam1r;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
gparam2r	drivers/block/dwc_ahsata.c	/^	u32 gparam2r;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
gparen	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gparen[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gpb	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpb: gpb {$/;"	l
gpb	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpb: gpb {$/;"	l
gpb	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpb: gpb {$/;"	l
gpb	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpb: gpb {$/;"	l
gpb0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpb0: gpb0 {$/;"	l
gpb0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpb0: gpb0 {$/;"	l
gpb1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpb1: gpb1 {$/;"	l
gpb1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpb1: gpb1 {$/;"	l
gpb2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpb2: gpb2 {$/;"	l
gpb2	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpb2: gpb2 {$/;"	l
gpb3	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpb3: gpb3 {$/;"	l
gpb3	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpb3: gpb3 {$/;"	l
gpb4	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpb4: gpb4 {$/;"	l
gpbcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpbcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpbdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpbdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpbr	arch/arm/dts/at91sam9260-smartweb.dts	/^			gpbr: syscon@fffffd50 {$/;"	l
gpbr	arch/arm/dts/at91sam9260.dtsi	/^			gpbr: syscon@fffffd50 {$/;"	l
gpbr	arch/arm/dts/at91sam9261.dtsi	/^			gpbr: syscon@fffffd50 {$/;"	l
gpbr	arch/arm/dts/at91sam9263.dtsi	/^			gpbr: syscon@fffffd60 {$/;"	l
gpbr	arch/arm/dts/at91sam9g20-taurus.dts	/^			gpbr: syscon@fffffd50 {$/;"	l
gpbr	arch/arm/dts/at91sam9g45-corvus.dts	/^			gpbr: syscon@fffffd60 {$/;"	l
gpbr	arch/arm/dts/at91sam9g45-gurnard.dts	/^			gpbr: syscon@fffffd60 {$/;"	l
gpbr	arch/arm/dts/at91sam9g45.dtsi	/^			gpbr: syscon@fffffd60 {$/;"	l
gpbup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpbup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpc	arch/arm/dts/imx6qdl.dtsi	/^			gpc: gpc@020dc000 {$/;"	l
gpc	arch/arm/dts/imx6ull.dtsi	/^			gpc: gpc@020dc000 {$/;"	l
gpc	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpc: gpc {$/;"	l
gpc	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct gpc {$/;"	s
gpc0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpc0: gpc0 {$/;"	l
gpc0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpc0: gpc0 {$/;"	l
gpc0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpc0: gpc0 {$/;"	l
gpc0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpc0: gpc0 {$/;"	l
gpc0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpc0: gpc0 {$/;"	l
gpc1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpc1: gpc1 {$/;"	l
gpc1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpc1: gpc1 {$/;"	l
gpc1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpc1: gpc1 {$/;"	l
gpc1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpc1: gpc1 {$/;"	l
gpc1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpc1: gpc1 {$/;"	l
gpc2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpc2: gpc2 {$/;"	l
gpc2	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpc2: gpc2 {$/;"	l
gpc3	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpc3: gpc3 {$/;"	l
gpc3	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpc3: gpc3 {$/;"	l
gpc4	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^		gpc4: gpc4 {$/;"	l	label:pinctrl_0
gpc4	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpc4: gpc4 {$/;"	l
gpc4	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpc4: gpc4 {$/;"	l
gpccon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpccon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpcdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpcdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpclr	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gpclr[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gpcm_erattr0	include/fsl_ifc.h	/^	u32 gpcm_erattr0;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcm_erattr1	include/fsl_ifc.h	/^	u32 gpcm_erattr1;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcm_erattr2	include/fsl_ifc.h	/^	u32 gpcm_erattr2;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcm_evter_en	include/fsl_ifc.h	/^	u32 gpcm_evter_en;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcm_evter_intr_en	include/fsl_ifc.h	/^	u32 gpcm_evter_intr_en;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcm_evter_stat	include/fsl_ifc.h	/^	u32 gpcm_evter_stat;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcm_stat	include/fsl_ifc.h	/^	u32 gpcm_stat;$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32
gpcr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 gpcr;	\/*0x0030*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
gpcr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpcr;$/;"	m	struct:system_control_regs	typeref:typename:u32
gpcr	drivers/gpio/mvgpio.h	/^	u32 gpcr;	\/* Pin Output Clear Register - 0x0024 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gpcup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpcup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpd	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpd: gpd {$/;"	l
gpd0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpd0: gpd0 {$/;"	l
gpd0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpd0: gpd0 {$/;"	l
gpd0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpd0: gpd0 {$/;"	l
gpd0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpd0: gpd0 {$/;"	l
gpd1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpd1: gpd1 {$/;"	l
gpd1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpd1: gpd1 {$/;"	l
gpd1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpd1: gpd1 {$/;"	l
gpd1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpd1: gpd1 {$/;"	l
gpd1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpd1: gpd1 {$/;"	l
gpdat	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpdat;$/;"	m	struct:gpio512x	typeref:typename:u32
gpdat	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpdat;$/;"	m	struct:ccsr_gpio	typeref:typename:u32
gpdat	drivers/gpio/mpc85xx_gpio.c	/^	u32	gpdat;$/;"	m	struct:ccsr_gpio	typeref:typename:u32	file:
gpdcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpdcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpddat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpddat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpdir	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpdir;$/;"	m	struct:gpio512x	typeref:typename:u32
gpdir	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpdir;$/;"	m	struct:ccsr_gpio	typeref:typename:u32
gpdir	drivers/gpio/mpc85xx_gpio.c	/^	u32	gpdir;$/;"	m	struct:ccsr_gpio	typeref:typename:u32	file:
gpdr	drivers/gpio/mvgpio.h	/^	u32 gpdr;	\/* Pin Direction Register - 0x000C *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gpdup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpdup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpe0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpe0: gpe0 {$/;"	l
gpe0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpe0: gpe0 {$/;"	l
gpe0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpe0: gpe0 {$/;"	l
gpe0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpe0: gpe0 {$/;"	l
gpe0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpe0: gpe0 {$/;"	l
gpe0_blk	arch/x86/include/asm/acpi_table.h	/^	u32 gpe0_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
gpe0_blk_len	arch/x86/include/asm/acpi_table.h	/^	u8 gpe0_blk_len;$/;"	m	struct:acpi_fadt	typeref:typename:u8
gpe0_en	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint32_t gpe0_en[4];$/;"	m	struct:chipset_power_state	typeref:typename:uint32_t[4]
gpe0_sts	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint32_t gpe0_sts[4];$/;"	m	struct:chipset_power_state	typeref:typename:uint32_t[4]
gpe1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpe1: gpe1 {$/;"	l
gpe1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpe1: gpe1 {$/;"	l
gpe1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpe1: gpe1 {$/;"	l
gpe1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpe1: gpe1 {$/;"	l
gpe1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpe1: gpe1 {$/;"	l
gpe1_base	arch/x86/include/asm/acpi_table.h	/^	u8 gpe1_base;$/;"	m	struct:acpi_fadt	typeref:typename:u8
gpe1_blk	arch/x86/include/asm/acpi_table.h	/^	u32 gpe1_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
gpe1_blk_len	arch/x86/include/asm/acpi_table.h	/^	u8 gpe1_blk_len;$/;"	m	struct:acpi_fadt	typeref:typename:u8
gpe2	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpe2: gpe2 {$/;"	l
gpe3	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpe3: gpe3 {$/;"	l
gpe4	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpe4: gpe4 {$/;"	l
gpecon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpecon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpedat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpedat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpeds	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gpeds[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gpeup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpeup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpf0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpf0: gpf0 {$/;"	l
gpf0	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^		gpf0: gpf0 {$/;"	l	label:pinctrl_0
gpf0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpf0: gpf0 {$/;"	l
gpf0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpf0: gpf0 {$/;"	l
gpf0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpf0: gpf0 {$/;"	l
gpf0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpf0: gpf0 {$/;"	l
gpf0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpf0: gpf0 {$/;"	l
gpf1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpf1: gpf1 {$/;"	l
gpf1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpf1: gpf1 {$/;"	l
gpf1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpf1: gpf1 {$/;"	l
gpf1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpf1: gpf1 {$/;"	l
gpf1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpf1: gpf1 {$/;"	l
gpf1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpf1: gpf1 {$/;"	l
gpf2	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpf2: gpf2 {$/;"	l
gpf2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpf2: gpf2 {$/;"	l
gpf2	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpf2: gpf2 {$/;"	l
gpf2	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpf2: gpf2 {$/;"	l
gpf3	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpf3: gpf3 {$/;"	l
gpf3	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpf3: gpf3 {$/;"	l
gpf3	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpf3: gpf3 {$/;"	l
gpf3	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpf3: gpf3 {$/;"	l
gpfcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpfcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpfdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpfdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpfen	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gpfen[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gpfsel	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gpfsel[6];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[6]
gpfup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpfup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpg0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpg0: gpg0 {$/;"	l
gpg0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpg0: gpg0 {$/;"	l
gpg0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpg0: gpg0 {$/;"	l
gpg0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpg0: gpg0 {$/;"	l
gpg1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpg1: gpg1 {$/;"	l
gpg1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpg1: gpg1 {$/;"	l
gpg1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpg1: gpg1 {$/;"	l
gpg1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpg1: gpg1 {$/;"	l
gpg2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpg2: gpg2 {$/;"	l
gpg2	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpg2: gpg2 {$/;"	l
gpg2	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpg2: gpg2 {$/;"	l
gpg2	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpg2: gpg2 {$/;"	l
gpg3	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpg3: gpg3 {$/;"	l
gpg3	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpg3: gpg3 {$/;"	l
gpgcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpgcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpgdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpgdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpgup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpgup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gph0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gph0: gph0 {$/;"	l
gph0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gph0: gph0 {$/;"	l
gph0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gph0: gph0 {$/;"	l
gph0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gph0: gph0 {$/;"	l
gph1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gph1: gph1 {$/;"	l
gph1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gph1: gph1 {$/;"	l
gph1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gph1: gph1 {$/;"	l
gph2	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gph2: gph2 {$/;"	l
gph2	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gph2: gph2 {$/;"	l
gph3	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gph3: gph3 {$/;"	l
gph3	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gph3: gph3 {$/;"	l
gph_print_header	tools/gpimage-common.c	/^void gph_print_header(const struct gp_header *gph, int be)$/;"	f	typeref:typename:void
gph_set_header	tools/gpimage-common.c	/^void gph_set_header(struct gp_header *gph, uint32_t size, uint32_t load_addr,$/;"	f	typeref:typename:void
gph_verify_header	tools/gpimage-common.c	/^int gph_verify_header(struct gp_header *gph, int be)$/;"	f	typeref:typename:int
gphcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gphcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gphdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gphdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gphen	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gphen[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gphup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gphup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpi	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpi: gpi {$/;"	l
gpi	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpi: gpi {$/;"	l
gpi	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpi;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpi2c_init	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void gpi2c_init(void)$/;"	f	typeref:typename:void
gpi2c_init	board/ti/am43xx/board.c	/^void gpi2c_init(void)$/;"	f	typeref:typename:void
gpi2c_init	board/ti/common/board_detect.c	/^__weak void gpi2c_init(void)$/;"	f	typeref:typename:__weak void
gpi_ie	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 gpi_ie[GPIO_BANKS];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[]
gpi_is	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 gpi_is[GPIO_BANKS];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[]
gpi_nmi_en	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u16 gpi_nmi_en;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u16
gpi_nmi_sts	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u16 gpi_nmi_sts;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u16
gpi_route	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 gpi_route[GPIO_BANKS];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[]
gpicr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpicr;$/;"	m	struct:ccsr_gpio	typeref:typename:u32
gpicr	drivers/gpio/mpc85xx_gpio.c	/^	u32	gpicr;$/;"	m	struct:ccsr_gpio	typeref:typename:u32	file:
gpicr1	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpicr1;$/;"	m	struct:gpio512x	typeref:typename:u32
gpicr2	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpicr2;$/;"	m	struct:gpio512x	typeref:typename:u32
gpier	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpier;$/;"	m	struct:gpio512x	typeref:typename:u32
gpier	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpier;$/;"	m	struct:ccsr_gpio	typeref:typename:u32
gpier	drivers/gpio/mpc85xx_gpio.c	/^	u32	gpier;$/;"	m	struct:ccsr_gpio	typeref:typename:u32	file:
gpimage_check_image_types	tools/gpimage.c	/^static int gpimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
gpimage_check_params	tools/gpimage-common.c	/^int gpimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
gpimage_header	tools/gpimage.c	/^static uint8_t gpimage_header[GPIMAGE_HDR_SIZE];$/;"	v	typeref:typename:uint8_t[]	file:
gpimage_print_header	tools/gpimage.c	/^static void gpimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
gpimage_set_header	tools/gpimage.c	/^static void gpimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
gpimage_verify_header	tools/gpimage.c	/^static int gpimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
gpimr	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpimr;$/;"	m	struct:gpio512x	typeref:typename:u32
gpimr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpimr;$/;"	m	struct:ccsr_gpio	typeref:typename:u32
gpimr	drivers/gpio/mpc85xx_gpio.c	/^	u32	gpimr;$/;"	m	struct:ccsr_gpio	typeref:typename:u32	file:
gpindr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpindr;		\/* General-purpose input data *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpindr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gpindr;		\/* 0xe0050 - General-purpose input data register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
gpio	arch/arm/dts/meson-gxbb.dtsi	/^				gpio: bank@4b0 {$/;"	l	label:periphs.pinctrl_periphs
gpio	arch/arm/dts/tegra114.dtsi	/^	gpio: gpio@6000d000 {$/;"	l
gpio	arch/arm/dts/tegra124.dtsi	/^	gpio: gpio@6000d000 {$/;"	l
gpio	arch/arm/dts/tegra20.dtsi	/^	gpio: gpio@6000d000 {$/;"	l
gpio	arch/arm/dts/tegra210.dtsi	/^	gpio: gpio@6000d000 {$/;"	l
gpio	arch/arm/dts/tegra30.dtsi	/^	gpio: gpio@6000d000 {$/;"	l
gpio	arch/arm/dts/zynqmp.dtsi	/^		gpio: gpio@ff0a0000 {$/;"	l
gpio	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 gpio;	\/*0x008*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
gpio	arch/arm/include/asm/arch-omap3/omap.h	/^struct gpio {$/;"	s
gpio	arch/arm/include/asm/arch-tegra/gpio.h	/^	u32 gpio:16;$/;"	m	struct:tegra_gpio_config	typeref:typename:u32:16
gpio	arch/arm/include/asm/omap_common.h	/^	unsigned gpio;$/;"	m	struct:pmic_data	typeref:typename:unsigned
gpio	arch/m68k/include/asm/immap_5227x.h	/^typedef struct gpio {$/;"	s
gpio	arch/m68k/include/asm/immap_5307.h	/^typedef struct gpio {$/;"	s
gpio	arch/m68k/include/asm/immap_5441x.h	/^typedef struct gpio {$/;"	s
gpio	arch/m68k/include/asm/immap_5445x.h	/^typedef struct gpio {$/;"	s
gpio	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct gpio {$/;"	s
gpio	arch/powerpc/include/asm/immap_512x.h	/^	gpio512x_t		gpio;		\/* General purpose I\/O module *\/$/;"	m	struct:immap	typeref:typename:gpio512x_t
gpio	arch/powerpc/include/asm/immap_83xx.h	/^	gpio83xx_t		gpio[1];	\/* General purpose I\/O module *\/$/;"	m	struct:immap	typeref:typename:gpio83xx_t[1]
gpio	arch/powerpc/include/asm/immap_83xx.h	/^	gpio83xx_t		gpio[2];	\/* General purpose I\/O module *\/$/;"	m	struct:immap	typeref:typename:gpio83xx_t[2]
gpio	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 gpio;		\/* GPIO for TWR-ELEV *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
gpio	board/nokia/rx51/tag_omap.h	/^	u16 gpio;$/;"	m	struct:omap_gpio_switch_config	typeref:typename:u16
gpio	board/timll/devkit3250/devkit3250_spl.c	/^static struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;$/;"	v	typeref:struct:gpio_regs *	file:
gpio	drivers/led/led_gpio.c	/^	struct gpio_desc gpio;$/;"	m	struct:led_gpio_priv	typeref:struct:gpio_desc	file:
gpio	drivers/mtd/nand/sunxi_nand.c	/^		struct gpio_desc gpio;$/;"	m	union:sunxi_nand_rb::__anon4f97023f010a	typeref:struct:gpio_desc	file:
gpio	drivers/power/regulator/fixed.c	/^	struct gpio_desc gpio; \/* GPIO for regulator enable control *\/$/;"	m	struct:fixed_regulator_platdata	typeref:struct:gpio_desc	file:
gpio	drivers/power/regulator/gpio-regulator.c	/^	struct gpio_desc gpio; \/* GPIO for regulator voltage control *\/$/;"	m	struct:gpio_regulator_platdata	typeref:struct:gpio_desc	file:
gpio	drivers/spi/mxc_spi.c	/^	int		gpio;$/;"	m	struct:mxc_spi_slave	typeref:typename:int	file:
gpio	include/gdsys_fpga.h	/^	struct ihs_gpio gpio;	\/* 0x0014 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_gpio
gpio	include/vsc9953.h	/^	struct vsc9953_gpio		gpio;$/;"	m	struct:vsc9953_devcpu_gcb	typeref:struct:vsc9953_gpio
gpio0	arch/arm/dts/am33xx.dtsi	/^		gpio0: gpio@44e07000 {$/;"	l
gpio0	arch/arm/dts/am4372.dtsi	/^		gpio0: gpio@44e07000 {$/;"	l
gpio0	arch/arm/dts/armada-375.dtsi	/^			gpio0: gpio@18100 {$/;"	l
gpio0	arch/arm/dts/armada-38x.dtsi	/^			gpio0: gpio@18100 {$/;"	l
gpio0	arch/arm/dts/armada-xp-mv78230.dtsi	/^			gpio0: gpio@18100 {$/;"	l
gpio0	arch/arm/dts/armada-xp-mv78260.dtsi	/^			gpio0: gpio@18100 {$/;"	l
gpio0	arch/arm/dts/armada-xp-mv78460.dtsi	/^			gpio0: gpio@18100 {$/;"	l
gpio0	arch/arm/dts/keystone.dtsi	/^		gpio0: gpio@260bf00 {$/;"	l
gpio0	arch/arm/dts/rk3036.dtsi	/^		gpio0: gpio0@2007c000 {$/;"	l	label:pinctrl
gpio0	arch/arm/dts/rk3288.dtsi	/^		gpio0: gpio0@ff750000 {$/;"	l	label:pinctrl
gpio0	arch/arm/dts/rk3399.dtsi	/^		gpio0: gpio0@ff720000 {$/;"	l	label:pinctrl
gpio0	arch/arm/dts/socfpga.dtsi	/^		gpio0: gpio@ff708000 {$/;"	l
gpio0	arch/arm/dts/vf.dtsi	/^			gpio0: gpio@40049000 {$/;"	l	label:aips0
gpio0	arch/arm/dts/zynq-7000.dtsi	/^		gpio0: gpio@e000a000 {$/;"	l	label:amba
gpio00	board/amcc/luan/epld.h	/^    unsigned char  gpio00;		\/* GPIO bits  0-7 *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
gpio08	board/amcc/luan/epld.h	/^    unsigned char  gpio08;		\/* GPIO bits  8-15 *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
gpio0_18_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux gpio0_18_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio0_7_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux gpio0_7_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio0_7_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux gpio0_7_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio0_7_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux gpio0_7_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio0_dbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	gpio0_dbclk: gpio0_dbclk {$/;"	l
gpio0_dbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio0_dbclk: gpio0_dbclk {$/;"	l
gpio0_dbclk_mux_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck {$/;"	l
gpio0_dbclk_mux_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck {$/;"	l
gpio0_iomux	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpio0_iomux[4];	\/* a, b, c, d *\/$/;"	m	struct:rk3288_pmu	typeref:typename:u32[4]
gpio0_p	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0_p[2][4];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[2][4]
gpio0_sel18	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpio0_sel18;	\/* 0x80 *\/$/;"	m	struct:rk3288_pmu	typeref:typename:u32
gpio0a_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0a_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio0a_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio0a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio0a_iomux;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a080a	typeref:typename:u32
gpio0a_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0a_smt;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0b_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0b_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio0b_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio0b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0b_iomux;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0b_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0b_smt;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio0c_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int gpio0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
gpio0d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio0d_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio0drv	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpio0drv[3];$/;"	m	struct:rk3288_pmu	typeref:typename:u32[3]
gpio0h_pull	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio0h_pull;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio0l_he	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0l_he;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0l_pull	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio0l_pull;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio0l_sr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio0l_sr;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio0pull	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpio0pull[3];$/;"	m	struct:rk3288_pmu	typeref:typename:u32[3]
gpio1	arch/arm/dts/am33xx.dtsi	/^		gpio1: gpio@4804c000 {$/;"	l
gpio1	arch/arm/dts/am4372.dtsi	/^		gpio1: gpio@4804c000 {$/;"	l
gpio1	arch/arm/dts/armada-375.dtsi	/^			gpio1: gpio@18140 {$/;"	l
gpio1	arch/arm/dts/armada-38x.dtsi	/^			gpio1: gpio@18140 {$/;"	l
gpio1	arch/arm/dts/armada-xp-mv78230.dtsi	/^			gpio1: gpio@18140 {$/;"	l
gpio1	arch/arm/dts/armada-xp-mv78260.dtsi	/^			gpio1: gpio@18140 {$/;"	l
gpio1	arch/arm/dts/armada-xp-mv78460.dtsi	/^			gpio1: gpio@18140 {$/;"	l
gpio1	arch/arm/dts/dra7.dtsi	/^		gpio1: gpio@4ae10000 {$/;"	l
gpio1	arch/arm/dts/imx6qdl.dtsi	/^			gpio1: gpio@0209c000 {$/;"	l
gpio1	arch/arm/dts/imx6ull.dtsi	/^			gpio1: gpio@0209c000 {$/;"	l
gpio1	arch/arm/dts/imx7.dtsi	/^			gpio1: gpio@30200000 {$/;"	l	label:aips1
gpio1	arch/arm/dts/rk3036.dtsi	/^		gpio1: gpio1@20080000 {$/;"	l	label:pinctrl
gpio1	arch/arm/dts/rk3288.dtsi	/^		gpio1: gpio1@ff780000 {$/;"	l	label:pinctrl
gpio1	arch/arm/dts/rk3399.dtsi	/^		gpio1: gpio1@ff730000 {$/;"	l	label:pinctrl
gpio1	arch/arm/dts/socfpga.dtsi	/^		gpio1: gpio@ff709000 {$/;"	l
gpio1	arch/arm/dts/vf.dtsi	/^			gpio1: gpio@4004a000 {$/;"	l	label:aips0
gpio16	board/amcc/luan/epld.h	/^    unsigned char  gpio16;		\/* GPIO bits 16-23 *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
gpio1_dbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	gpio1_dbclk: gpio1_dbclk {$/;"	l
gpio1_dbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio1_dbclk: gpio1_dbclk {$/;"	l
gpio1_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio1_dbclk: gpio1_dbclk {$/;"	l
gpio1_e	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio1_e[8][4];$/;"	m	struct:rk3288_grf	typeref:typename:u32[8][4]
gpio1_p	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio1_p[8][4];$/;"	m	struct:rk3288_grf	typeref:typename:u32[8][4]
gpio1a_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1a_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio1a_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio1a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio1a_iomux;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a090a	typeref:typename:u32
gpio1a_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1a_smt;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1b_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1b_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio1b_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio1b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio1b_iomux;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0a0a	typeref:typename:u32
gpio1b_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1b_smt;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1c_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1c_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio1c_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio1c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio1c_iomux;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0b0a	typeref:typename:u32
gpio1c_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1c_smt;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int gpio1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
gpio1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio1clkctrl;	\/* offset 0x478 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio1clkctrl;	\/* offset 0xAC *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio1d_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1d_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio1d_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio1d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio1d_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio1d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1d_iomux;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1d_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1d_smt;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1h_he	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1h_he;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1h_pull	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio1h_pull;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio1h_sr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1h_sr;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1l_he	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1l_he;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio1l_pull	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio1l_pull;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio1l_sr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio1l_sr;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
gpio2	arch/arm/dts/am33xx.dtsi	/^		gpio2: gpio@481ac000 {$/;"	l
gpio2	arch/arm/dts/am4372.dtsi	/^		gpio2: gpio@481ac000 {$/;"	l
gpio2	arch/arm/dts/armada-375.dtsi	/^			gpio2: gpio@18180 {$/;"	l
gpio2	arch/arm/dts/armada-xp-mv78260.dtsi	/^			gpio2: gpio@18180 {$/;"	l
gpio2	arch/arm/dts/armada-xp-mv78460.dtsi	/^			gpio2: gpio@18180 {$/;"	l
gpio2	arch/arm/dts/dra7.dtsi	/^		gpio2: gpio@48055000 {$/;"	l
gpio2	arch/arm/dts/imx6qdl.dtsi	/^			gpio2: gpio@020a0000 {$/;"	l
gpio2	arch/arm/dts/imx6ull.dtsi	/^			gpio2: gpio@020a0000 {$/;"	l
gpio2	arch/arm/dts/imx7.dtsi	/^			gpio2: gpio@30210000 {$/;"	l	label:aips1
gpio2	arch/arm/dts/rk3036.dtsi	/^		gpio2: gpio2@20084000 {$/;"	l	label:pinctrl
gpio2	arch/arm/dts/rk3288.dtsi	/^		gpio2: gpio2@ff790000 {$/;"	l	label:pinctrl
gpio2	arch/arm/dts/rk3399.dtsi	/^		gpio2: gpio2@ff780000 {$/;"	l	label:pinctrl
gpio2	arch/arm/dts/socfpga.dtsi	/^		gpio2: gpio@ff70a000 {$/;"	l
gpio2	arch/arm/dts/vf.dtsi	/^			gpio2: gpio@4004b000 {$/;"	l	label:aips0
gpio24	board/amcc/luan/epld.h	/^    unsigned char  gpio24;		\/* GPIO bits 24-31 *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
gpio2_dbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	gpio2_dbclk: gpio2_dbclk {$/;"	l
gpio2_dbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio2_dbclk: gpio2_dbclk {$/;"	l
gpio2_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio2_dbclk: gpio2_dbclk {$/;"	l
gpio2_p	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio2_p[3][4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[3][4]
gpio2_smt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio2_smt[3][4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[3][4]
gpio2_sr	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio2_sr[3][4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[3][4]
gpio2a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio2a_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio2a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio2a_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio2a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio2a_iomux;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio2b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio2b_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio2b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio2b_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio2b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio2b_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a010a	typeref:typename:u32
gpio2c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio2c_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio2c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio2c_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio2c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio2c_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a020a	typeref:typename:u32
gpio2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio2clkctrl;	\/* offset 0x480 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio2clkctrl;	\/* offset 0xB0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio2d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio2d_iomux;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio2d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio2d_iomux;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio2h_pull	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio2h_pull;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio2l_pull	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpio2l_pull;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpio3	arch/arm/dts/am33xx.dtsi	/^		gpio3: gpio@481ae000 {$/;"	l
gpio3	arch/arm/dts/am4372.dtsi	/^		gpio3: gpio@481ae000 {$/;"	l
gpio3	arch/arm/dts/dra7.dtsi	/^		gpio3: gpio@48057000 {$/;"	l
gpio3	arch/arm/dts/imx6qdl.dtsi	/^			gpio3: gpio@020a4000 {$/;"	l
gpio3	arch/arm/dts/imx6ull.dtsi	/^			gpio3: gpio@020a4000 {$/;"	l
gpio3	arch/arm/dts/imx7.dtsi	/^			gpio3: gpio@30220000 {$/;"	l	label:aips1
gpio3	arch/arm/dts/rk3288.dtsi	/^		gpio3: gpio3@ff7a0000 {$/;"	l	label:pinctrl
gpio3	arch/arm/dts/rk3399.dtsi	/^		gpio3: gpio3@ff788000 {$/;"	l	label:pinctrl
gpio3	arch/arm/dts/vf.dtsi	/^			gpio3: gpio@4004c000 {$/;"	l	label:aips0
gpio3_dbclk	arch/arm/dts/am33xx-clocks.dtsi	/^	gpio3_dbclk: gpio3_dbclk {$/;"	l
gpio3_dbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio3_dbclk: gpio3_dbclk {$/;"	l
gpio3_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio3_dbclk: gpio3_dbclk {$/;"	l
gpio3a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio3a_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio3a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio3a_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a030a	typeref:typename:u32
gpio3b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio3b_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio3b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio3b_iomux;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio3c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio3c_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio3c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio3c_iomux;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio3clkctrl;	\/* offset 0x488 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio3clkctrl;	\/* offset 0xB4 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio3d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio3d_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a040a	typeref:typename:u32
gpio3dh_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio3dh_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio3dl_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio3dl_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio4	arch/arm/dts/am4372.dtsi	/^		gpio4: gpio@48320000 {$/;"	l
gpio4	arch/arm/dts/dra7.dtsi	/^		gpio4: gpio@48059000 {$/;"	l
gpio4	arch/arm/dts/imx6qdl.dtsi	/^			gpio4: gpio@020a8000 {$/;"	l
gpio4	arch/arm/dts/imx6ull.dtsi	/^			gpio4: gpio@020a8000 {$/;"	l
gpio4	arch/arm/dts/imx7.dtsi	/^			gpio4: gpio@30230000 {$/;"	l	label:aips1
gpio4	arch/arm/dts/rk3288.dtsi	/^		gpio4: gpio4@ff7b0000 {$/;"	l	label:pinctrl
gpio4	arch/arm/dts/rk3399.dtsi	/^		gpio4: gpio4@ff790000 {$/;"	l	label:pinctrl
gpio4	arch/arm/dts/vf.dtsi	/^			gpio4: gpio@4004d000 {$/;"	l	label:aips0
gpio4_dbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio4_dbclk: gpio4_dbclk {$/;"	l
gpio4_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio4_dbclk: gpio4_dbclk {$/;"	l
gpio4a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio4a_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a050a	typeref:typename:u32
gpio4ah_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio4ah_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio4al_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio4al_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio4b_e01	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio4b_e01;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio4b_e2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio4b_e2;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio4b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio4b_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a060a	typeref:typename:u32
gpio4bl_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio4bl_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio4c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio4c_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio4c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 gpio4c_iomux;$/;"	m	union:rk3399_grf_regs::__anonbec5629a070a	typeref:typename:u32
gpio4clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio4clkctrl;	\/* offset 0x490 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio4d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio4d_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio4d_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 gpio4d_iomux;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
gpio5	arch/arm/dts/am4372.dtsi	/^		gpio5: gpio@48322000 {$/;"	l
gpio5	arch/arm/dts/dra7.dtsi	/^		gpio5: gpio@4805b000 {$/;"	l
gpio5	arch/arm/dts/imx6qdl.dtsi	/^			gpio5: gpio@020ac000 {$/;"	l
gpio5	arch/arm/dts/imx6ull.dtsi	/^			gpio5: gpio@020ac000 {$/;"	l
gpio5	arch/arm/dts/imx7.dtsi	/^			gpio5: gpio@30240000 {$/;"	l	label:aips1
gpio5	arch/arm/dts/rk3288.dtsi	/^		gpio5: gpio5@ff7c0000 {$/;"	l	label:pinctrl
gpio512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct gpio512x {$/;"	s
gpio512x_t	arch/powerpc/include/asm/immap_512x.h	/^} gpio512x_t;$/;"	t	typeref:struct:gpio512x
gpio5_10	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpio5_10;$/;"	m	struct:pad_signals	typeref:typename:int
gpio5_11	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpio5_11;$/;"	m	struct:pad_signals	typeref:typename:int
gpio5_12	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpio5_12;$/;"	m	struct:pad_signals	typeref:typename:int
gpio5_13	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpio5_13;$/;"	m	struct:pad_signals	typeref:typename:int
gpio5_7_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux gpio5_7_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio5_8	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpio5_8;$/;"	m	struct:pad_signals	typeref:typename:int
gpio5_9	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpio5_9;$/;"	m	struct:pad_signals	typeref:typename:int
gpio5_dbclk	arch/arm/dts/am43xx-clocks.dtsi	/^	gpio5_dbclk: gpio5_dbclk {$/;"	l
gpio5_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio5_dbclk: gpio5_dbclk {$/;"	l
gpio5b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio5b_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio5c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio5c_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio5clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpio5clkctrl;	\/* offset 0x498 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpio6	arch/arm/dts/dra7.dtsi	/^		gpio6: gpio@4805d000 {$/;"	l
gpio6	arch/arm/dts/imx6qdl.dtsi	/^			gpio6: gpio@020b0000 {$/;"	l
gpio6	arch/arm/dts/imx7.dtsi	/^			gpio6: gpio@30250000 {$/;"	l	label:aips1
gpio6	arch/arm/dts/rk3288.dtsi	/^		gpio6: gpio6@ff7d0000 {$/;"	l	label:pinctrl
gpio6_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio6_dbclk: gpio6_dbclk {$/;"	l
gpio6a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio6a_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio6b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio6b_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio6c_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio6c_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio7	arch/arm/dts/dra7.dtsi	/^		gpio7: gpio@48051000 {$/;"	l
gpio7	arch/arm/dts/imx6qdl.dtsi	/^			gpio7: gpio@020b4000 {$/;"	l
gpio7	arch/arm/dts/imx7.dtsi	/^			gpio7: gpio@30260000 {$/;"	l	label:aips1
gpio7	arch/arm/dts/rk3288.dtsi	/^		gpio7: gpio7@ff7e0000 {$/;"	l	label:pinctrl
gpio7_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio7_dbclk: gpio7_dbclk {$/;"	l
gpio7a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio7a_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio7b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio7b_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio7ch_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio7ch_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio7cl_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio7cl_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio8	arch/arm/dts/dra7.dtsi	/^		gpio8: gpio@48053000 {$/;"	l
gpio8	arch/arm/dts/rk3288.dtsi	/^		gpio8: gpio8@ff7f0000 {$/;"	l	label:pinctrl
gpio83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct gpio83xx {$/;"	s
gpio83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} gpio83xx_t;$/;"	t	typeref:struct:gpio83xx
gpio8_dbclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpio8_dbclk: gpio8_dbclk {$/;"	l
gpio8a_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio8a_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio8b_iomux	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio8b_iomux;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpioA	arch/mips/dts/pic32mzda.dtsi	/^		gpioA: gpio0@0 {$/;"	l	label:pinctrl
gpioB	arch/mips/dts/pic32mzda.dtsi	/^		gpioB: gpio1@100 {$/;"	l	label:pinctrl
gpioC	arch/mips/dts/pic32mzda.dtsi	/^		gpioC: gpio2@200 {$/;"	l	label:pinctrl
gpioD	arch/mips/dts/pic32mzda.dtsi	/^		gpioD: gpio3@300 {$/;"	l	label:pinctrl
gpioE	arch/mips/dts/pic32mzda.dtsi	/^		gpioE: gpio4@400 {$/;"	l	label:pinctrl
gpioF	arch/mips/dts/pic32mzda.dtsi	/^		gpioF: gpio5@500 {$/;"	l	label:pinctrl
gpioG	arch/mips/dts/pic32mzda.dtsi	/^		gpioG: gpio6@600 {$/;"	l	label:pinctrl
gpioH	arch/mips/dts/pic32mzda.dtsi	/^		gpioH: gpio7@700 {$/;"	l	label:pinctrl
gpioJ	arch/mips/dts/pic32mzda.dtsi	/^		gpioJ: gpio8@800 {$/;"	l	label:pinctrl
gpioK	arch/mips/dts/pic32mzda.dtsi	/^		gpioK: gpio9@900 {$/;"	l	label:pinctrl
gpio_1s_sync	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_1s_sync;		\/* 0x860 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_a	arch/sandbox/dts/sandbox.dts	/^	gpio_a: gpios@0 {$/;"	l
gpio_a	arch/sandbox/dts/test.dts	/^	gpio_a: base-gpios {$/;"	l
gpio_a	arch/x86/dts/chromebook_link.dts	/^			gpio_a: gpioa {$/;"	l
gpio_a	arch/x86/dts/chromebook_samus.dts	/^			gpio_a: gpioa {$/;"	l
gpio_acpi_sci	arch/x86/dts/chromebook_samus.dts	/^		gpio_acpi_sci: acpi-sci {$/;"	l
gpio_acpi_smi	arch/x86/dts/chromebook_samus.dts	/^		gpio_acpi_smi: acpi-smi {$/;"	l
gpio_alloc	drivers/gpio/xilinx_gpio.c	/^int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no)$/;"	f	typeref:typename:int
gpio_alloc_dual	drivers/gpio/xilinx_gpio.c	/^int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0, u32 gpio_no1)$/;"	f	typeref:typename:int
gpio_ao	arch/arm/dts/meson-gxbb.dtsi	/^				gpio_ao: bank@14 {$/;"	l	label:aobus.pinctrl_aobus
gpio_aobus_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const gpio_aobus_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
gpio_aon	arch/arm/dts/tegra186.dtsi	/^	gpio_aon: gpio@c2f0000 {$/;"	l
gpio_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	uart0_aper_clk, uart1_aper_clk, gpio_aper_clk, lqspi_aper_clk,$/;"	e	enum:zynq_clk
gpio_array	arch/blackfin/cpu/gpio.c	/^static struct gpio_port_t * const gpio_array[] = {$/;"	v	typeref:struct:gpio_port_t * const[]	file:
gpio_array	arch/blackfin/cpu/gpio.c	/^struct gpio_port_t * const gpio_array[] = {$/;"	v	typeref:struct:gpio_port_t * const[]
gpio_at91_ops	drivers/gpio/at91_gpio.c	/^static const struct dm_gpio_ops gpio_at91_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_axp_ops	drivers/gpio/axp_gpio.c	/^static const struct dm_gpio_ops gpio_axp_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_axp_probe	drivers/gpio/axp_gpio.c	/^static int gpio_axp_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_b	arch/sandbox/dts/sandbox.dts	/^	gpio_b: gpios@1 {$/;"	l
gpio_b	arch/sandbox/dts/test.dts	/^	gpio_b: extra-gpios {$/;"	l
gpio_b	arch/x86/dts/chromebook_link.dts	/^			gpio_b: gpiob {$/;"	l
gpio_b	arch/x86/dts/chromebook_samus.dts	/^			gpio_b: gpiob {$/;"	l
gpio_bank	arch/arm/include/asm/arch-hi6220/gpio.h	/^struct gpio_bank {$/;"	s
gpio_bank	arch/arm/include/asm/arch-sunxi/gpio.h	/^	struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS];$/;"	m	struct:sunxi_gpio_reg	typeref:struct:sunxi_gpio[]
gpio_bank	arch/arm/include/asm/arch-tegra124/gpio.h	/^	struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];$/;"	m	struct:gpio_ctlr	typeref:struct:gpio_ctlr_bank[]
gpio_bank	arch/arm/include/asm/arch-tegra20/gpio.h	/^	struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];$/;"	m	struct:gpio_ctlr	typeref:struct:gpio_ctlr_bank[]
gpio_bank	arch/arm/include/asm/arch-tegra210/gpio.h	/^	struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];$/;"	m	struct:gpio_ctlr	typeref:struct:gpio_ctlr_bank[]
gpio_bank	arch/arm/include/asm/arch-tegra30/gpio.h	/^	struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];$/;"	m	struct:gpio_ctlr	typeref:struct:gpio_ctlr_bank[]
gpio_bank	arch/arm/include/asm/arch/gpio.h	/^	struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS];$/;"	m	struct:sunxi_gpio_reg	typeref:struct:sunxi_gpio[]
gpio_bank	arch/arm/include/asm/omap_gpio.h	/^struct gpio_bank {$/;"	s
gpio_bank	arch/blackfin/include/asm/gpio.h	/^#define gpio_bank(/;"	d
gpio_bank	drivers/gpio/omap_gpio.c	/^struct gpio_bank {$/;"	s	file:
gpio_bank_34xx	arch/arm/cpu/armv7/omap3/board.c	/^static const struct gpio_bank gpio_bank_34xx[6] = {$/;"	v	typeref:typename:const struct gpio_bank[6]	file:
gpio_bank_44xx	arch/arm/cpu/armv7/omap4/hwinit.c	/^static const struct gpio_bank gpio_bank_44xx[6] = {$/;"	v	typeref:typename:const struct gpio_bank[6]	file:
gpio_bank_54xx	arch/arm/cpu/armv7/omap5/hwinit.c	/^static struct gpio_bank gpio_bank_54xx[8] = {$/;"	v	typeref:struct:gpio_bank[8]	file:
gpio_bank_am33xx	arch/arm/cpu/armv7/am33xx/board.c	/^static const struct gpio_bank gpio_bank_am33xx[] = {$/;"	v	typeref:typename:const struct gpio_bank[]	file:
gpio_bank_name	drivers/gpio/sunxi_gpio.c	/^static char *gpio_bank_name(int bank)$/;"	f	typeref:typename:char *	file:
gpio_base	include/asm-generic/gpio.h	/^	unsigned gpio_base;$/;"	m	struct:gpio_dev_priv	typeref:typename:unsigned
gpio_bcm2835_ops	drivers/gpio/bcm2835_gpio.c	/^static const struct dm_gpio_ops gpio_bcm2835_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_bit	arch/blackfin/include/asm/gpio.h	/^#define gpio_bit(/;"	d
gpio_broadwell_ops	drivers/gpio/intel_broadwell_gpio.c	/^static const struct dm_gpio_ops gpio_broadwell_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_buttons	arch/arm/dts/am335x-evmsk.dts	/^	gpio_buttons: gpio_buttons@0 {$/;"	l
gpio_c	arch/x86/dts/chromebook_link.dts	/^			gpio_c: gpioc {$/;"	l
gpio_c	arch/x86/dts/chromebook_samus.dts	/^			gpio_c: gpioc {$/;"	l
gpio_cfg	board/gateworks/gw_ventana/common.c	/^struct ventana gpio_cfg[GW_UNKNOWN] = {$/;"	v	typeref:struct:ventana[]
gpio_cfg_pin	drivers/gpio/s5p_gpio.c	/^void gpio_cfg_pin(int gpio, int cfg)$/;"	f	typeref:typename:void
gpio_cfi_flash_init	board/cm-bf537e/gpio_cfi_flash.c	/^void gpio_cfi_flash_init(void)$/;"	f
gpio_cfi_flash_swizzle	board/cm-bf537e/gpio_cfi_flash.c	/^void *gpio_cfi_flash_swizzle(void *vaddr)$/;"	f	typeref:typename:void *
gpio_claim_vector	drivers/gpio/gpio-uclass.c	/^int gpio_claim_vector(const int *gpio_num_array, const char *fmt)$/;"	f	typeref:typename:int
gpio_clear	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define gpio_clear(/;"	d
gpio_clr	drivers/gpio/lpc32xx_gpio.c	/^static int gpio_clr(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
gpio_cmd	cmd/gpio.c	/^enum gpio_cmd {$/;"	g	file:
gpio_config	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_config	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_config	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_config	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_config	arch/powerpc/cpu/ppc4xx/gpio.c	/^void gpio_config(int pin, int in_out, int gpio_alt, int out_val)$/;"	f	typeref:typename:void
gpio_config_reg1	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_config_reg1;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_config_reg2	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_config_reg2;	\/* 0x870 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_config_table	drivers/gpio/tegra_gpio.c	/^void gpio_config_table(const struct tegra_gpio_config *config, int len)$/;"	f	typeref:typename:void
gpio_configure	board/ifm/ac14xx/ac14xx.c	/^static void gpio_configure(void)$/;"	f	typeref:typename:void	file:
gpio_control	include/mpc5xxx.h	/^	volatile u8 gpio_control;	\/* GPIO + 0x38 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
gpio_count	drivers/demo/demo-shape.c	/^	int gpio_count;$/;"	m	struct:shape_data	typeref:typename:int	file:
gpio_count	drivers/gpio/altera_pio.c	/^	int gpio_count;$/;"	m	struct:altera_pio_platdata	typeref:typename:int	file:
gpio_count	drivers/gpio/mpc85xx_gpio.c	/^	uint gpio_count;$/;"	m	struct:mpc85xx_gpio_data	typeref:typename:uint	file:
gpio_count	drivers/gpio/pca953x_gpio.c	/^	int gpio_count;$/;"	m	struct:pca953x_info	typeref:typename:int	file:
gpio_count	drivers/gpio/pcf8575_gpio.c	/^	int gpio_count;		\/* No. GPIOs supported by the chip *\/$/;"	m	struct:pcf8575_chip	typeref:typename:int	file:
gpio_count	drivers/gpio/sunxi_gpio.c	/^	int gpio_count;$/;"	m	struct:sunxi_gpio_platdata	typeref:typename:int	file:
gpio_count	include/asm-generic/gpio.h	/^	unsigned gpio_count;$/;"	m	struct:gpio_dev_priv	typeref:typename:unsigned
gpio_cs	drivers/spi/bfin_spi.c	/^#define gpio_cs(/;"	d	file:
gpio_cs	drivers/spi/bfin_spi6xx.c	/^#define gpio_cs(/;"	d	file:
gpio_cs_inverted	drivers/spi/armada100_spi.c	/^	int gpio_cs_inverted;$/;"	m	struct:armd_spi_slave	typeref:typename:int	file:
gpio_ctl_fmc	board/st/stm32f429-discovery/stm32f429-discovery.c	/^const struct stm32_gpio_ctl gpio_ctl_fmc = {$/;"	v	typeref:typename:const struct stm32_gpio_ctl
gpio_ctl_fmc	board/st/stm32f746-disco/stm32f746-disco.c	/^const struct stm32_gpio_ctl gpio_ctl_fmc = {$/;"	v	typeref:typename:const struct stm32_gpio_ctl
gpio_ctl_gpout	board/st/stm32f429-discovery/stm32f429-discovery.c	/^const struct stm32_gpio_ctl gpio_ctl_gpout = {$/;"	v	typeref:typename:const struct stm32_gpio_ctl
gpio_ctl_gpout	board/st/stm32f746-disco/stm32f746-disco.c	/^const struct stm32_gpio_ctl gpio_ctl_gpout = {$/;"	v	typeref:typename:const struct stm32_gpio_ctl
gpio_ctl_usart	board/st/stm32f429-discovery/stm32f429-discovery.c	/^const struct stm32_gpio_ctl gpio_ctl_usart = {$/;"	v	typeref:typename:const struct stm32_gpio_ctl
gpio_ctl_usart	board/st/stm32f746-disco/stm32f746-disco.c	/^const struct stm32_gpio_ctl gpio_ctl_usart = {$/;"	v	typeref:typename:const struct stm32_gpio_ctl
gpio_ctlr	arch/arm/include/asm/arch-tegra124/gpio.h	/^struct gpio_ctlr {$/;"	s
gpio_ctlr	arch/arm/include/asm/arch-tegra20/gpio.h	/^struct gpio_ctlr {$/;"	s
gpio_ctlr	arch/arm/include/asm/arch-tegra210/gpio.h	/^struct gpio_ctlr {$/;"	s
gpio_ctlr	arch/arm/include/asm/arch-tegra30/gpio.h	/^struct gpio_ctlr {$/;"	s
gpio_ctlr_bank	arch/arm/include/asm/arch-tegra124/gpio.h	/^struct gpio_ctlr_bank {$/;"	s
gpio_ctlr_bank	arch/arm/include/asm/arch-tegra20/gpio.h	/^struct gpio_ctlr_bank {$/;"	s
gpio_ctlr_bank	arch/arm/include/asm/arch-tegra210/gpio.h	/^struct gpio_ctlr_bank {$/;"	s
gpio_ctlr_bank	arch/arm/include/asm/arch-tegra30/gpio.h	/^struct gpio_ctlr_bank {$/;"	s
gpio_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint gpio_ctrl;			\/* _COM_GPIO_CTRL_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
gpio_ctrl	arch/m68k/include/asm/immap_520x.h	/^typedef struct gpio_ctrl {$/;"	s
gpio_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct gpio_ctrl {$/;"	s
gpio_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct gpio_ctrl {$/;"	s
gpio_ctrl	arch/m68k/include/asm/immap_5275.h	/^typedef struct	gpio_ctrl {$/;"	s
gpio_ctrl	arch/m68k/include/asm/immap_5301x.h	/^typedef struct gpio_ctrl {$/;"	s
gpio_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct gpio_ctrl {$/;"	s
gpio_data	include/sh_pfc.h	/^	pinmux_enum_t *gpio_data;$/;"	m	struct:pinmux_info	typeref:typename:pinmux_enum_t *
gpio_data_size	include/sh_pfc.h	/^	unsigned int gpio_data_size;$/;"	m	struct:pinmux_info	typeref:typename:unsigned int
gpio_db_clk	arch/arm/dts/socfpga.dtsi	/^					gpio_db_clk: gpio_db_clk {$/;"	l
gpio_debounce_cnt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint gpio_debounce_cnt;		\/* _COM_GPIO_DEBOUNCE_COUNTER_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
gpio_desc	drivers/demo/demo-shape.c	/^	struct gpio_desc gpio_desc[8];$/;"	m	struct:shape_data	typeref:struct:gpio_desc[8]	file:
gpio_desc	include/asm-generic/gpio.h	/^struct gpio_desc {$/;"	s
gpio_dev_priv	include/asm-generic/gpio.h	/^struct gpio_dev_priv {$/;"	s
gpio_diag	board/ifm/ac14xx/ac14xx.c	/^static int gpio_diag;$/;"	v	typeref:typename:int	file:
gpio_dir	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 gpio_dir; \/* DDIR *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpio_dir	arch/arm/include/asm/imx-common/gpio.h	/^	u32 gpio_dir;	\/* direction *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpio_dir	board/freescale/common/qixis.h	/^	u8 gpio_dir[4];$/;"	m	struct:qixis	typeref:typename:u8[4]
gpio_dir_out	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_dir_out	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_dir_out	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_dir_out	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_direction	arch/arm/include/asm/arch-spear/gpio.h	/^enum gpio_direction {$/;"	g
gpio_direction	arch/arm/include/asm/arch-stv0991/gpio.h	/^enum gpio_direction {$/;"	g
gpio_direction	drivers/gpio/spear_gpio.c	/^static int gpio_direction(unsigned gpio,$/;"	f	typeref:typename:int	file:
gpio_direction	drivers/gpio/xilinx_gpio.c	/^enum gpio_direction {$/;"	g	file:
gpio_direction_input	arch/blackfin/cpu/gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	arch/openrisc/include/asm/gpio.h	/^static inline int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/adi_gpio2.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/at91_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/da8xx_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/gpio-uclass.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/kona_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/mpc83xx_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/mvgpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/mxc_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/mxs_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/omap_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/s3c2440_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/sh_pfc.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/spear_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/stm32_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/sunxi_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_input	drivers/gpio/xilinx_gpio.c	/^int gpio_direction_input(unsigned gpio)$/;"	f	typeref:typename:int
gpio_direction_output	arch/blackfin/cpu/gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	arch/openrisc/include/asm/gpio.h	/^static inline int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/adi_gpio2.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/at91_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/da8xx_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/gpio-uclass.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/kona_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/mpc83xx_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/mvgpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/mxc_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/mxs_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/omap_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/s3c2440_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/sh_pfc.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/spear_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/stm32_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/sunxi_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_direction_output	drivers/gpio/xilinx_gpio.c	/^int gpio_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_dr	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 gpio_dr; \/* DR *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpio_dr	arch/arm/include/asm/imx-common/gpio.h	/^	u32 gpio_dr;	\/* data *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpio_driver	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;$/;"	g
gpio_driver_t	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;$/;"	t	typeref:enum:gpio_driver
gpio_dwapb_bind	drivers/gpio/dwapb_gpio.c	/^static int gpio_dwapb_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_dwapb_ids	drivers/gpio/dwapb_gpio.c	/^static const struct udevice_id gpio_dwapb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
gpio_dwapb_ops	drivers/gpio/dwapb_gpio.c	/^static const struct dm_gpio_ops gpio_dwapb_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_dwapb_platdata	drivers/gpio/dwapb_gpio.c	/^struct gpio_dwapb_platdata {$/;"	s	file:
gpio_dwapb_probe	drivers/gpio/dwapb_gpio.c	/^static int gpio_dwapb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_early_init	board/avionic-design/common/tamonten-ng.c	/^void gpio_early_init(void)$/;"	f	typeref:typename:void
gpio_early_init	board/avionic-design/common/tamonten.c	/^void gpio_early_init(void)$/;"	f	typeref:typename:void
gpio_early_init_uart	arch/arm/mach-tegra/board2.c	/^__weak void gpio_early_init_uart(void) {}$/;"	f	typeref:typename:__weak void
gpio_early_init_uart	board/nvidia/seaboard/seaboard.c	/^void gpio_early_init_uart(void)$/;"	f	typeref:typename:void
gpio_en	arch/arm/include/asm/omap_common.h	/^	int gpio_en;$/;"	m	struct:pmic_data	typeref:typename:int
gpio_error	arch/blackfin/cpu/gpio.c	/^#define gpio_error(/;"	d	file:
gpio_error	arch/blackfin/cpu/gpio.c	/^static void gpio_error(unsigned gpio)$/;"	f	typeref:typename:void	file:
gpio_error	drivers/gpio/adi_gpio2.c	/^static void gpio_error(unsigned gpio)$/;"	f	typeref:typename:void	file:
gpio_ext_porta	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_ext_porta;		\/* 0x850 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_exynos_bind	drivers/gpio/s5p_gpio.c	/^static int gpio_exynos_bind(struct udevice *parent)$/;"	f	typeref:typename:int	file:
gpio_exynos_ops	drivers/gpio/s5p_gpio.c	/^static const struct dm_gpio_ops gpio_exynos_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_exynos_probe	drivers/gpio/s5p_gpio.c	/^static int gpio_exynos_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_fan	arch/arm/dts/am57xx-beagle-x15.dts	/^	gpio_fan: gpio_fan {$/;"	l
gpio_find_and_xlate	drivers/gpio/gpio-uclass.c	/^static int gpio_find_and_xlate(struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
gpio_free	arch/blackfin/cpu/gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	arch/openrisc/include/asm/gpio.h	/^static inline int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/adi_gpio2.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/at91_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/da8xx_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/gpio-uclass.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/kona_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/mpc83xx_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/mvgpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/mxc_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/mxs_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/omap_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/s3c2440_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/sh_pfc.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/spear_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/stm32_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/sunxi_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free	drivers/gpio/xilinx_gpio.c	/^int gpio_free(unsigned gpio)$/;"	f	typeref:typename:int
gpio_free_list	drivers/gpio/gpio-uclass.c	/^int gpio_free_list(struct udevice *dev, struct gpio_desc *desc, int count)$/;"	f	typeref:typename:int
gpio_free_list_nodev	drivers/gpio/gpio-uclass.c	/^int gpio_free_list_nodev(struct gpio_desc *desc, int count)$/;"	f	typeref:typename:int
gpio_func_t	include/asm-generic/gpio.h	/^enum gpio_func_t {$/;"	g
gpio_function	drivers/gpio/gpio-uclass.c	/^static const char * const gpio_function[GPIOF_COUNT] = {$/;"	v	typeref:typename:const char * const[]	file:
gpio_gc	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 gpio_gc;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
gpio_get_bank_info	drivers/gpio/gpio-uclass.c	/^const char *gpio_get_bank_info(struct udevice *dev, int *bit_count)$/;"	f	typeref:typename:const char *
gpio_get_controller	drivers/gpio/xilinx_gpio.c	/^static struct xilinx_gpio_priv *gpio_get_controller(unsigned gpio)$/;"	f	typeref:struct:xilinx_gpio_priv *	file:
gpio_get_description	cmd/gpio.c	/^static void gpio_get_description(struct udevice *dev, const char *bank_name,$/;"	f	typeref:typename:void	file:
gpio_get_direction	drivers/gpio/xilinx_gpio.c	/^static int gpio_get_direction(unsigned gpio)$/;"	f	typeref:typename:int	file:
gpio_get_function	drivers/gpio/gpio-uclass.c	/^int gpio_get_function(struct udevice *dev, int offset, const char **namep)$/;"	f	typeref:typename:int
gpio_get_input_value	drivers/gpio/xilinx_gpio.c	/^static int gpio_get_input_value(unsigned gpio)$/;"	f	typeref:typename:int	file:
gpio_get_list_count	drivers/gpio/gpio-uclass.c	/^int gpio_get_list_count(struct udevice *dev, const char *list_name)$/;"	f	typeref:typename:int
gpio_get_number	drivers/gpio/gpio-uclass.c	/^int gpio_get_number(const struct gpio_desc *desc)$/;"	f	typeref:typename:int
gpio_get_ops	include/asm-generic/gpio.h	/^#define gpio_get_ops(/;"	d
gpio_get_output_value	drivers/gpio/xilinx_gpio.c	/^static int gpio_get_output_value(unsigned gpio)$/;"	f	typeref:typename:int	file:
gpio_get_raw_function	drivers/gpio/gpio-uclass.c	/^int gpio_get_raw_function(struct udevice *dev, int offset, const char **namep)$/;"	f	typeref:typename:int
gpio_get_status	drivers/gpio/gpio-uclass.c	/^int gpio_get_status(struct udevice *dev, int offset, char *buf, int buffsize)$/;"	f	typeref:typename:int
gpio_get_value	arch/avr32/include/asm/arch-common/portmux-pio.h	/^static inline int gpio_get_value(unsigned int pin)$/;"	f	typeref:typename:int
gpio_get_value	arch/blackfin/cpu/gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	arch/openrisc/include/asm/gpio.h	/^static inline int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/adi_gpio2.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/at91_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/da8xx_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/gpio-uclass.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/kona_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/mpc83xx_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/mvgpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/mxc_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/mxs_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/omap_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/s3c2440_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/sh_pfc.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/spear_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/stm32_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/sunxi_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_value	drivers/gpio/xilinx_gpio.c	/^int gpio_get_value(unsigned gpio)$/;"	f	typeref:typename:int
gpio_get_values_as_int	drivers/gpio/gpio-uclass.c	/^int gpio_get_values_as_int(const int *gpio_list)$/;"	f	typeref:typename:int
gpio_hi6220_ops	drivers/gpio/hi6220_gpio.c	/^static const struct dm_gpio_ops gpio_hi6220_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_ich6_ofdata_to_platdata	drivers/gpio/intel_ich6_gpio.c	/^static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_ich6_ops	drivers/gpio/intel_ich6_gpio.c	/^static const struct dm_gpio_ops gpio_ich6_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_id_det	arch/arm/mach-sunxi/usb_phy.c	/^	int gpio_id_det;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
gpio_in	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_in	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_in	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_in	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_in	include/vsc9953.h	/^	u32	gpio_in[10];$/;"	m	struct:vsc9953_gpio	typeref:typename:u32[10]
gpio_info	arch/arm/mach-exynos/include/mach/gpio.h	/^struct gpio_info {$/;"	s
gpio_info	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^struct gpio_info {$/;"	s
gpio_info	drivers/gpio/da8xx_gpio.c	/^void gpio_info(void)$/;"	f	typeref:typename:void
gpio_info	drivers/gpio/xilinx_gpio.c	/^void gpio_info(void)$/;"	f	typeref:typename:void
gpio_init	arch/arm/mach-sunxi/board.c	/^static int gpio_init(void)$/;"	f	typeref:typename:int	file:
gpio_init	board/tqc/tqma6/tqma6_wru4.c	/^static void gpio_init(void)$/;"	f	typeref:typename:void	file:
gpio_init	board/xilinx/microblaze-generic/microblaze-generic.c	/^static int gpio_init(void)$/;"	f	typeref:typename:int	file:
gpio_input	arch/x86/dts/chromebook_samus.dts	/^		gpio_input: gpio-input {$/;"	l
gpio_input_invert	arch/x86/dts/chromebook_samus.dts	/^		gpio_input_invert: gpio-input-invert {$/;"	l
gpio_int	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct gpio_int {$/;"	s
gpio_int	arch/arm/include/asm/arch-sunxi/gpio.h	/^	struct sunxi_gpio_int gpio_int;$/;"	m	struct:sunxi_gpio_reg	typeref:struct:sunxi_gpio_int
gpio_int	arch/arm/include/asm/arch/gpio.h	/^	struct sunxi_gpio_int gpio_int;$/;"	m	struct:sunxi_gpio_reg	typeref:struct:sunxi_gpio_int
gpio_int_clear	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_clear	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_clear	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_clear	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_enable	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_enable	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_enable	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_enable	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_level	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_level	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_level	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_level	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_polarity	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_int_polarity;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_int_status	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_status	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_status	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_int_status	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_inten	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_inten;		\/* 0x830 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_intmask	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_intmask;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_intstatus	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_intstatus;		\/* 0x840 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_inttype_level	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_inttype_level;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_io	board/freescale/common/qixis.h	/^	u8 gpio_io[4];$/;"	m	struct:qixis	typeref:typename:u8[4]
gpio_irq	include/sh_pfc.h	/^	struct pinmux_irq *gpio_irq;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_irq *
gpio_irq_size	include/sh_pfc.h	/^	unsigned int gpio_irq_size;$/;"	m	struct:pinmux_info	typeref:typename:unsigned int
gpio_is_valid	arch/blackfin/include/asm/gpio.h	/^static inline int gpio_is_valid(int number)$/;"	f	typeref:typename:int
gpio_is_valid	arch/openrisc/include/asm/gpio.h	/^static inline int gpio_is_valid(int number)$/;"	f	typeref:typename:int
gpio_is_valid	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_is_valid(int gpio)$/;"	f	typeref:typename:int
gpio_is_valid	drivers/gpio/omap_gpio.c	/^int gpio_is_valid(int gpio)$/;"	f	typeref:typename:int
gpio_is_valid	drivers/gpio/zynq_gpio.c	/^static int gpio_is_valid(unsigned gpio, struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_keys	arch/arm/dts/am335x-evm.dts	/^	gpio_keys: volume_keys@0 {$/;"	l
gpio_keys	arch/arm/dts/am335x-pxm2.dtsi	/^	gpio_keys: restart-keys {$/;"	l
gpio_keys	arch/arm/dts/am335x-rut.dts	/^	gpio_keys: powerfail-keys {$/;"	l
gpio_keys	arch/arm/dts/am437x-idk-evm.dts	/^	gpio_keys: gpio_keys {$/;"	l
gpio_keys	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	gpio_keys: gpio-keys {$/;"	l
gpio_keys	arch/arm/dts/rk3288-veyron.dtsi	/^	gpio_keys: gpio-keys {$/;"	l
gpio_keys_pins_default	arch/arm/dts/am437x-idk-evm.dts	/^	gpio_keys_pins_default: gpio_keys_pins_default {$/;"	l
gpio_keys_s0	arch/arm/dts/am335x-evmsk.dts	/^	gpio_keys_s0: gpio_keys_s0 {$/;"	l
gpio_labels	arch/blackfin/cpu/gpio.c	/^void gpio_labels(void)$/;"	f	typeref:typename:void
gpio_labels	drivers/gpio/adi_gpio2.c	/^void gpio_labels(void)$/;"	f	typeref:typename:void
gpio_led_gpio_value	drivers/misc/gpio_led.c	/^static int gpio_led_gpio_value(led_id_t mask, int state)$/;"	f	typeref:typename:int	file:
gpio_led_inv	drivers/misc/gpio_led.c	/^static led_id_t gpio_led_inv[] = CONFIG_GPIO_LED_INVERTED_TABLE;$/;"	v	typeref:typename:led_id_t[]	file:
gpio_led_ops	drivers/led/led_gpio.c	/^static const struct led_ops gpio_led_ops = {$/;"	v	typeref:typename:const struct led_ops	file:
gpio_led_set_on	drivers/led/led_gpio.c	/^static int gpio_led_set_on(struct udevice *dev, int on)$/;"	f	typeref:typename:int	file:
gpio_lookup_name	drivers/gpio/gpio-uclass.c	/^int gpio_lookup_name(const char *name, struct udevice **devp,$/;"	f	typeref:typename:int
gpio_lpc32xx_ops	drivers/gpio/lpc32xx_gpio.c	/^static const struct dm_gpio_ops gpio_lpc32xx_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_main	arch/arm/dts/tegra186.dtsi	/^	gpio_main: gpio@2200000 {$/;"	l
gpio_map	arch/x86/include/asm/global_data.h	/^	const struct pch_gpio_map *gpio_map;	\/* board GPIO map *\/$/;"	m	struct:arch_global_data	typeref:typename:const struct pch_gpio_map *
gpio_mask	drivers/gpio/mpc85xx_gpio.c	/^inline u32 gpio_mask(unsigned gpio) {$/;"	f	typeref:typename:u32
gpio_masked_config	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_config	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_config	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_config[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_dir_out	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_dir_out	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_dir_out	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_dir_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_in	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_in	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_in	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_in[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_clear	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_clear	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_clear	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_int_clear[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_enable	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_enable	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_enable	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_int_enable[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_level	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_level	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_level	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_int_level[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_status	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_status	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_int_status	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_int_status[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_out	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_masked_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_out	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_masked_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_masked_out	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_masked_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_max	drivers/gpio/xilinx_gpio.c	/^	u32 gpio_max;$/;"	m	struct:xilinx_gpio_priv	typeref:typename:u32	file:
gpio_mdio_default	arch/arm/dts/am335x-draco.dts	/^	gpio_mdio_default: gpio_mdio_default {$/;"	l
gpio_min	drivers/gpio/xilinx_gpio.c	/^	u32 gpio_min;$/;"	m	struct:xilinx_gpio_priv	typeref:typename:u32	file:
gpio_mode	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	iomux_v3_cfg_t gpio_mode;$/;"	m	struct:i2c_pin_ctrl	typeref:typename:iomux_v3_cfg_t
gpio_mode_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_mau_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_maudio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_maudio_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gpio_mode_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mode_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gpio_mode_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gpio_mode_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpio_mode_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpio_mpc85xx_ops	drivers/gpio/mpc85xx_gpio.c	/^static const struct dm_gpio_ops gpio_mpc85xx_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_msm_ops	drivers/gpio/msm_gpio.c	/^static const struct dm_gpio_ops gpio_msm_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_mux_pins	arch/arm/dts/am335x-draco.dts	/^	gpio_mux_pins: gpio_mux_pins {$/;"	l
gpio_mxc_ops	drivers/gpio/mxc_gpio.c	/^static const struct dm_gpio_ops gpio_mxc_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_n	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct gpio_n {$/;"	s
gpio_n_t	arch/powerpc/include/asm/immap_83xx.h	/^} gpio_n_t;$/;"	t	typeref:struct:gpio_n
gpio_name	drivers/gpio/xilinx_gpio.c	/^	struct gpio_names *gpio_name;$/;"	m	struct:xilinx_gpio_priv	typeref:struct:gpio_names *	file:
gpio_name_num_table	arch/arm/mach-exynos/include/mach/gpio.h	/^struct gpio_name_num_table {$/;"	s
gpio_name_num_table	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^struct gpio_name_num_table {$/;"	s
gpio_names	drivers/gpio/xilinx_gpio.c	/^struct gpio_names {$/;"	s	file:
gpio_native	arch/x86/dts/chromebook_samus.dts	/^		gpio_native: gpio-native {$/;"	l
gpio_num	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^	int gpio_num;$/;"	m	struct:board_wakeup_gpio	typeref:typename:int
gpio_omap_ops	drivers/gpio/omap_gpio.c	/^static const struct dm_gpio_ops gpio_omap_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_op	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpio_op;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
gpio_out	arch/arm/include/asm/arch-tegra124/gpio.h	/^	uint gpio_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_out	arch/arm/include/asm/arch-tegra20/gpio.h	/^	uint gpio_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_out	arch/arm/include/asm/arch-tegra210/gpio.h	/^	uint gpio_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_out	arch/arm/include/asm/arch-tegra30/gpio.h	/^	uint gpio_out[TEGRA_GPIO_PORTS];$/;"	m	struct:gpio_ctlr_bank	typeref:typename:uint[]
gpio_out	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_out	 { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;$/;"	g
gpio_out	include/vsc9953.h	/^	u32	gpio_out[10];$/;"	m	struct:vsc9953_gpio	typeref:typename:u32[10]
gpio_out_clr	include/vsc9953.h	/^	u32	gpio_out_clr[10];$/;"	m	struct:vsc9953_gpio	typeref:typename:u32[10]
gpio_out_high	arch/x86/dts/chromebook_samus.dts	/^		gpio_out_high: gpio-out-high {$/;"	l
gpio_out_low	arch/x86/dts/chromebook_samus.dts	/^		gpio_out_low: gpio-out-low {$/;"	l
gpio_out_set	include/vsc9953.h	/^	u32	gpio_out_set[10];$/;"	m	struct:vsc9953_gpio	typeref:typename:u32[10]
gpio_out_t	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_out	 { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;$/;"	t	typeref:enum:gpio_out
gpio_output_value	drivers/gpio/mpc83xx_gpio.c	/^static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS];$/;"	v	typeref:typename:unsigned int[]	file:
gpio_pacnt	arch/m68k/include/asm/immap_5272.h	/^	uint gpio_pacnt;$/;"	m	struct:gpio_ctrl	typeref:typename:uint
gpio_padat	arch/m68k/include/asm/immap_5272.h	/^	ushort gpio_padat;$/;"	m	struct:gpio_ctrl	typeref:typename:ushort
gpio_paddr	arch/m68k/include/asm/immap_5272.h	/^	ushort gpio_paddr;$/;"	m	struct:gpio_ctrl	typeref:typename:ushort
gpio_padmux	board/gateworks/gw_ventana/common.h	/^	iomux_v3_cfg_t gpio_padmux[2];$/;"	m	struct:dio_cfg	typeref:typename:iomux_v3_cfg_t[2]
gpio_pads	board/aristainetos/aristainetos-v1.c	/^iomux_v3_cfg_t const gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
gpio_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
gpio_pads	board/gateworks/gw_ventana/common.h	/^	iomux_v3_cfg_t const *gpio_pads;$/;"	m	struct:ventana	typeref:typename:iomux_v3_cfg_t const *
gpio_pads	board/tqc/tqma6/tqma6_wru4.c	/^static iomux_v3_cfg_t const gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gpio_param	board/gateworks/gw_ventana/common.h	/^	unsigned gpio_param;$/;"	m	struct:dio_cfg	typeref:typename:unsigned
gpio_param_s	arch/powerpc/include/asm/ppc4xx-gpio.h	/^} gpio_param_s;$/;"	t	typeref:struct:__anon2654fafd0108
gpio_pbcnt	arch/m68k/include/asm/immap_5272.h	/^	uint gpio_pbcnt;$/;"	m	struct:gpio_ctrl	typeref:typename:uint
gpio_pbdat	arch/m68k/include/asm/immap_5272.h	/^	ushort gpio_pbdat;$/;"	m	struct:gpio_ctrl	typeref:typename:ushort
gpio_pbddr	arch/m68k/include/asm/immap_5272.h	/^	ushort gpio_pbddr;$/;"	m	struct:gpio_ctrl	typeref:typename:ushort
gpio_pcdat	arch/m68k/include/asm/immap_5272.h	/^	ushort gpio_pcdat;$/;"	m	struct:gpio_ctrl	typeref:typename:ushort
gpio_pcddr	arch/m68k/include/asm/immap_5272.h	/^	ushort gpio_pcddr;$/;"	m	struct:gpio_ctrl	typeref:typename:ushort
gpio_pcor	arch/arm/include/asm/arch-vf610/gpio.h	/^	u32 gpio_pcor;$/;"	m	struct:vybrid_gpio_regs	typeref:typename:u32
gpio_pdcnt	arch/m68k/include/asm/immap_5272.h	/^	uint gpio_pdcnt;$/;"	m	struct:gpio_ctrl	typeref:typename:uint
gpio_pdir	arch/arm/include/asm/arch-vf610/gpio.h	/^	u32 gpio_pdir;$/;"	m	struct:vybrid_gpio_regs	typeref:typename:u32
gpio_pdor	arch/arm/include/asm/arch-vf610/gpio.h	/^	u32 gpio_pdor;$/;"	m	struct:vybrid_gpio_regs	typeref:typename:u32
gpio_periphs_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const gpio_periphs_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
gpio_pic32_ops	drivers/gpio/pic32_gpio.c	/^static const struct dm_gpio_ops gpio_pic32_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_pin	arch/arm/cpu/arm920t/ep93xx/led.c	/^static uint32_t gpio_pin[2] = {1 << STATUS_LED_GREEN,$/;"	v	typeref:typename:uint32_t[2]	file:
gpio_pin	arch/arm/dts/am335x-pxm2.dtsi	/^	gpio_pin: gpio_pin {$/;"	l
gpio_pin	arch/arm/dts/am335x-rut.dts	/^	gpio_pin: gpio_pin {$/;"	l
gpio_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux gpio_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux gpio_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux gpio_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpio_pinmux	drivers/gpio/da8xx_gpio.c	/^static const struct pinmux_config gpio_pinmux[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
gpio_pins	board/Barix/ipam390/ipam390.c	/^static const struct pinmux_config gpio_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
gpio_pins	board/davinci/da8xxevm/da850evm.c	/^static const struct pinmux_config gpio_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
gpio_pins	board/davinci/ea20/ea20.c	/^const struct pinmux_config gpio_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
gpio_pirq	arch/x86/dts/chromebook_samus.dts	/^		gpio_pirq: gpio-pirq {$/;"	l
gpio_platdata	board/raspberrypi/rpi/rpi.c	/^static const struct bcm2835_gpio_platdata gpio_platdata = {$/;"	v	typeref:typename:const struct bcm2835_gpio_platdata	file:
gpio_port_name	drivers/gpio/tegra_gpio.c	/^static char *gpio_port_name(int base_port)$/;"	f	typeref:typename:char *	file:
gpio_port_regs	arch/arm/include/asm/arch-mx27/gpio.h	/^struct gpio_port_regs {$/;"	s
gpio_port_s	arch/blackfin/include/asm/mach-bf548/gpio.h	/^struct gpio_port_s {$/;"	s
gpio_port_t	arch/blackfin/include/asm/gpio.h	/^struct gpio_port_t {$/;"	s
gpio_port_t	arch/blackfin/include/asm/mach-bf548/gpio.h	/^struct gpio_port_t {$/;"	s
gpio_port_t	arch/blackfin/include/asm/mach-bf609/gpio.h	/^struct gpio_port_t {$/;"	s
gpio_porta_eoi	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_porta_eoi;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_ports	drivers/gpio/mxc_gpio.c	/^static unsigned long gpio_ports[] = {$/;"	v	typeref:typename:unsigned long[]	file:
gpio_post_probe	drivers/gpio/gpio-uclass.c	/^static int gpio_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_pre_remove	drivers/gpio/gpio-uclass.c	/^static int gpio_pre_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_psor	arch/arm/include/asm/arch-vf610/gpio.h	/^	u32 gpio_psor;$/;"	m	struct:vybrid_gpio_regs	typeref:typename:u32
gpio_psr	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 gpio_psr; \/* SSR *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpio_psr	arch/arm/include/asm/imx-common/gpio.h	/^	u32 gpio_psr;	\/* pad satus *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpio_ptor	arch/arm/include/asm/arch-vf610/gpio.h	/^	u32 gpio_ptor;$/;"	m	struct:vybrid_gpio_regs	typeref:typename:u32
gpio_querykbd	board/ifm/ac14xx/ac14xx.c	/^static u32 gpio_querykbd(void)$/;"	f	typeref:typename:u32	file:
gpio_raw_intstatus	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_raw_intstatus;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_read	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define gpio_read(/;"	d
gpio_read_bit	drivers/gpio/sh_pfc.c	/^static int gpio_read_bit(struct pinmux_data_reg *dr,$/;"	f	typeref:typename:int	file:
gpio_read_in_bit	arch/powerpc/cpu/ppc4xx/gpio.c	/^int gpio_read_in_bit(int pin)$/;"	f	typeref:typename:int
gpio_read_out_bit	arch/powerpc/cpu/ppc4xx/gpio.c	/^int gpio_read_out_bit(int pin)$/;"	f	typeref:typename:int
gpio_read_raw_reg	drivers/gpio/sh_pfc.c	/^static unsigned long gpio_read_raw_reg(void *mapped_reg,$/;"	f	typeref:typename:unsigned long	file:
gpio_reg	drivers/gpio/mvgpio.h	/^struct gpio_reg {$/;"	s
gpio_registry	drivers/gpio/da8xx_gpio.c	/^static struct gpio_registry {$/;"	s	file:
gpio_registry	drivers/gpio/da8xx_gpio.c	/^} gpio_registry[MAX_NUM_GPIOS];$/;"	v	typeref:struct:gpio_registry[]
gpio_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/arm/include/asm/arch-mx27/gpio.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/arm/include/asm/arch-spear/gpio.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/arm/include/asm/arch-stv0991/gpio.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/arm/include/asm/imx-common/gpio.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct gpio_regs {$/;"	s
gpio_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct gpio_regs {$/;"	s
gpio_regs	drivers/gpio/xilinx_gpio.c	/^struct gpio_regs {$/;"	s	file:
gpio_regulator_get_value	drivers/power/regulator/gpio-regulator.c	/^static int gpio_regulator_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_regulator_ids	drivers/power/regulator/gpio-regulator.c	/^static const struct udevice_id gpio_regulator_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
gpio_regulator_ofdata_to_platdata	drivers/power/regulator/gpio-regulator.c	/^static int gpio_regulator_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_regulator_ops	drivers/power/regulator/gpio-regulator.c	/^static const struct dm_regulator_ops gpio_regulator_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
gpio_regulator_platdata	drivers/power/regulator/gpio-regulator.c	/^struct gpio_regulator_platdata {$/;"	s	file:
gpio_regulator_set_value	drivers/power/regulator/gpio-regulator.c	/^static int gpio_regulator_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
gpio_renumber	drivers/gpio/gpio-uclass.c	/^static int gpio_renumber(struct udevice *removed_dev)$/;"	f	typeref:typename:int	file:
gpio_request	arch/blackfin/cpu/gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	arch/openrisc/include/asm/gpio.h	/^static inline int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/adi_gpio2.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/at91_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/da8xx_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/gpio-uclass.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/kona_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/mpc83xx_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/mvgpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/mxc_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/mxs_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/omap_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/s3c2440_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/sh_pfc.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/spear_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/stm32_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/sunxi_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request	drivers/gpio/xilinx_gpio.c	/^int gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
gpio_request_by_name	drivers/gpio/gpio-uclass.c	/^int gpio_request_by_name(struct udevice *dev,  const char *list_name, int index,$/;"	f	typeref:typename:int
gpio_request_by_name_nodev	drivers/gpio/gpio-uclass.c	/^int gpio_request_by_name_nodev(const void *blob, int node,$/;"	f	typeref:typename:int
gpio_request_list_by_name	drivers/gpio/gpio-uclass.c	/^int gpio_request_list_by_name(struct udevice *dev, const char *list_name,$/;"	f	typeref:typename:int
gpio_request_list_by_name_nodev	drivers/gpio/gpio-uclass.c	/^int gpio_request_list_by_name_nodev(const void *blob, int node,$/;"	f	typeref:typename:int
gpio_requestf	drivers/gpio/gpio-uclass.c	/^int gpio_requestf(unsigned gpio, const char *fmt, ...)$/;"	f	typeref:typename:int
gpio_rockchip_ops	drivers/gpio/rk_gpio.c	/^static const struct dm_gpio_ops gpio_rockchip_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_sandbox_ops	drivers/gpio/sandbox.c	/^static const struct dm_gpio_ops gpio_sandbox_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_sandbox_probe	drivers/gpio/sandbox.c	/^static int gpio_sandbox_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_sandbox_remove	drivers/gpio/sandbox.c	/^static int gpio_sandbox_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_select	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;$/;"	g
gpio_select_t	arch/powerpc/include/asm/ppc4xx-gpio.h	/^typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;$/;"	t	typeref:enum:gpio_select
gpio_selectrow	board/ifm/ac14xx/ac14xx.c	/^static void gpio_selectrow(gpio512x_t *gpioregs, u32 row)$/;"	f	typeref:typename:void	file:
gpio_set	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define gpio_set(/;"	d
gpio_set	drivers/gpio/lpc32xx_gpio.c	/^static int gpio_set(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
gpio_set_chip_configuration	arch/powerpc/cpu/ppc4xx/gpio.c	/^void gpio_set_chip_configuration(void)$/;"	f	typeref:typename:void
gpio_set_direction	drivers/gpio/xilinx_gpio.c	/^static int gpio_set_direction(unsigned gpio, enum gpio_direction direction)$/;"	f	typeref:typename:int	file:
gpio_set_drv	drivers/gpio/s5p_gpio.c	/^void gpio_set_drv(int gpio, int mode)$/;"	f	typeref:typename:void
gpio_set_mode	drivers/gpio/db8500_gpio.c	/^static void gpio_set_mode(unsigned gpio, enum db8500_gpio_alt mode)$/;"	f	typeref:typename:void	file:
gpio_set_output_value	drivers/gpio/xilinx_gpio.c	/^static int gpio_set_output_value(unsigned gpio, int value)$/;"	f	typeref:typename:int	file:
gpio_set_pull	drivers/gpio/s5p_gpio.c	/^void gpio_set_pull(int gpio, int mode)$/;"	f	typeref:typename:void
gpio_set_rate	drivers/gpio/s5p_gpio.c	/^void gpio_set_rate(int gpio, int mode)$/;"	f	typeref:typename:void
gpio_set_value	arch/avr32/include/asm/arch-common/portmux-pio.h	/^static inline void gpio_set_value(unsigned int pin, int value)$/;"	f	typeref:typename:void
gpio_set_value	arch/blackfin/cpu/gpio.c	/^int gpio_set_value(unsigned gpio, int arg)$/;"	f	typeref:typename:int
gpio_set_value	arch/openrisc/include/asm/gpio.h	/^static inline void gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:void
gpio_set_value	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/adi_gpio2.c	/^int gpio_set_value(unsigned gpio, int arg)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/at91_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/da8xx_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/gpio-uclass.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/kona_gpio.c	/^void gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:void
gpio_set_value	drivers/gpio/mpc83xx_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/mvgpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/mxc_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/mxs_gpio.c	/^void gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:void
gpio_set_value	drivers/gpio/omap_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/s3c2440_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/s5p_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/sh_pfc.c	/^void gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:void
gpio_set_value	drivers/gpio/spear_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/stm32_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/sunxi_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_set_value	drivers/gpio/xilinx_gpio.c	/^int gpio_set_value(unsigned gpio, int value)$/;"	f	typeref:typename:int
gpio_setup	board/bf533-stamp/bf533-stamp.c	/^static int gpio_setup;$/;"	v	typeref:typename:int	file:
gpio_smt	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 gpio_smt;$/;"	m	struct:rk3288_grf	typeref:typename:u32
gpio_spi	arch/arm/dts/imx6ull-14x14-evk.dts	/^		gpio_spi: gpio_spi@0 {$/;"	l
gpio_sr	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	struct rk3288_grf_gpio_lh gpio_sr[8];$/;"	m	struct:rk3288_grf	typeref:struct:rk3288_grf_gpio_lh[8]
gpio_sr	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpio_sr;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
gpio_state	drivers/gpio/sandbox.c	/^struct gpio_state {$/;"	s	file:
gpio_status	arch/arm/mach-davinci/include/mach/gpio.h	/^#define gpio_status(/;"	d
gpio_status	arch/blackfin/include/asm/gpio.h	/^#define gpio_status(/;"	d
gpio_status	arch/microblaze/include/asm/gpio.h	/^#define gpio_status(/;"	d
gpio_sub_n	arch/blackfin/include/asm/gpio.h	/^#define gpio_sub_n(/;"	d
gpio_sunxi_bind	drivers/gpio/sunxi_gpio.c	/^static int gpio_sunxi_bind(struct udevice *parent)$/;"	f	typeref:typename:int	file:
gpio_sunxi_ops	drivers/gpio/sunxi_gpio.c	/^static const struct dm_gpio_ops gpio_sunxi_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_sunxi_probe	drivers/gpio/sunxi_gpio.c	/^static int gpio_sunxi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_switch	board/nokia/rx51/tag_omap.h	/^		struct omap_gpio_switch_config gpio_switch;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_gpio_switch_config
gpio_t	arch/m68k/include/asm/immap_520x.h	/^} gpio_t;$/;"	t	typeref:struct:gpio_ctrl
gpio_t	arch/m68k/include/asm/immap_5227x.h	/^} gpio_t;$/;"	t	typeref:struct:gpio
gpio_t	arch/m68k/include/asm/immap_5235.h	/^} gpio_t;$/;"	t	typeref:struct:gpio_ctrl
gpio_t	arch/m68k/include/asm/immap_5272.h	/^} gpio_t;$/;"	t	typeref:struct:gpio_ctrl
gpio_t	arch/m68k/include/asm/immap_5275.h	/^} gpio_t;$/;"	t	typeref:struct:gpio_ctrl
gpio_t	arch/m68k/include/asm/immap_5301x.h	/^} gpio_t;$/;"	t	typeref:struct:gpio_ctrl
gpio_t	arch/m68k/include/asm/immap_5307.h	/^} gpio_t;$/;"	t	typeref:struct:gpio
gpio_t	arch/m68k/include/asm/immap_5329.h	/^} gpio_t;$/;"	t	typeref:struct:gpio_ctrl
gpio_t	arch/m68k/include/asm/immap_5441x.h	/^} gpio_t;$/;"	t	typeref:struct:gpio
gpio_t	arch/m68k/include/asm/immap_5445x.h	/^} gpio_t;$/;"	t	typeref:struct:gpio
gpio_t	arch/m68k/include/asm/immap_547x_8x.h	/^} gpio_t;$/;"	t	typeref:struct:gpio
gpio_tab	arch/powerpc/cpu/ppc4xx/gpio.c	/^gpio_param_s const gpio_tab[GPIO_GROUP_MAX][GPIO_MAX] = CONFIG_SYS_4xx_GPIO_TABLE;$/;"	v	typeref:typename:gpio_param_s const[][]
gpio_tegra_bind	drivers/gpio/tegra_gpio.c	/^static int gpio_tegra_bind(struct udevice *parent)$/;"	f	typeref:typename:int	file:
gpio_tegra_ops	drivers/gpio/tegra_gpio.c	/^static const struct dm_gpio_ops gpio_tegra_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_tegra_probe	drivers/gpio/tegra_gpio.c	/^static int gpio_tegra_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
gpio_to_device	drivers/gpio/gpio-uclass.c	/^static int gpio_to_device(unsigned int gpio, struct gpio_desc *desc)$/;"	f	typeref:typename:int	file:
gpio_toggle_value	drivers/gpio/spear_gpio.c	/^void gpio_toggle_value(unsigned gpio)$/;"	f	typeref:typename:void
gpio_tristate	arch/mips/mach-au1x00/include/mach/au1x00.h	/^#define gpio_tristate(/;"	d
gpio_unused	arch/x86/dts/chromebook_samus.dts	/^		gpio_unused: gpio-unused {$/;"	l
gpio_valid_input	drivers/gpio/kw_gpio.c	/^static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];$/;"	v	typeref:typename:unsigned long[]	file:
gpio_valid_output	drivers/gpio/kw_gpio.c	/^static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];$/;"	v	typeref:typename:unsigned long[]	file:
gpio_vbus	arch/arm/mach-sunxi/usb_phy.c	/^	int gpio_vbus;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
gpio_vbus_det	arch/arm/mach-sunxi/usb_phy.c	/^	int gpio_vbus_det;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
gpio_ver_id_code	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpio_ver_id_code;$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpio_vrsel	include/linux/usb/musb.h	/^	unsigned int	gpio_vrsel;$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned int
gpio_vrsel_active	include/linux/usb/musb.h	/^	unsigned int	gpio_vrsel_active;$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned int
gpio_vybrid_ops	drivers/gpio/vybrid_gpio.c	/^static const struct dm_gpio_ops gpio_vybrid_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpio_write_bit	arch/powerpc/cpu/ppc4xx/gpio.c	/^void gpio_write_bit(int pin, int val)$/;"	f	typeref:typename:void
gpio_write_bit	drivers/gpio/sh_pfc.c	/^static void gpio_write_bit(struct pinmux_data_reg *dr,$/;"	f	typeref:typename:void	file:
gpio_write_raw_reg	drivers/gpio/sh_pfc.c	/^static void gpio_write_raw_reg(void *mapped_reg,$/;"	f	typeref:typename:void	file:
gpio_xlate_offs_flags	drivers/gpio/gpio-uclass.c	/^int gpio_xlate_offs_flags(struct udevice *dev,$/;"	f	typeref:typename:int
gpio_zynq_ops	drivers/gpio/zynq_gpio.c	/^static const struct dm_gpio_ops gpio_zynq_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
gpioa_regs	board/st/stv0991/stv0991.c	/^struct gpio_regs *const gpioa_regs =$/;"	v	typeref:struct:gpio_regs * const
gpiobase	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t gpiobase;$/;"	m	struct:pei_data	typeref:typename:uint32_t
gpiobase	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t gpiobase;$/;"	m	struct:pei_data	typeref:typename:uint32_t
gpioc	drivers/gpio/sh_pfc.c	/^static struct pinmux_info *gpioc;$/;"	v	typeref:struct:pinmux_info *	file:
gpiocr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpiocr;		\/* GPIO control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpiocr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gpiocr;		\/* 0xe0030 - GPIO control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
gpiodata	arch/arm/include/asm/arch-spear/gpio.h	/^	u32 gpiodata[0x100];	\/* 0x000 ... 0x3fc *\/$/;"	m	struct:gpio_regs	typeref:typename:u32[0x100]
gpiodata	drivers/gpio/xilinx_gpio.c	/^	u32 gpiodata;$/;"	m	struct:gpio_regs	typeref:typename:u32	file:
gpiodata_store	drivers/gpio/xilinx_gpio.c	/^	u32 gpiodata_store;$/;"	m	struct:xilinx_gpio_priv	typeref:typename:u32	file:
gpiodir	arch/arm/include/asm/arch-spear/gpio.h	/^	u32 gpiodir;		\/* 0x400 *\/$/;"	m	struct:gpio_regs	typeref:typename:u32
gpiodir	board/freescale/common/ngpixis.h	/^	u8 gpiodir;$/;"	m	struct:ngpixis	typeref:typename:u8
gpiodir	drivers/gpio/xilinx_gpio.c	/^	u32 gpiodir;$/;"	m	struct:gpio_regs	typeref:typename:u32	file:
gpiodiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	gpiodiv;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
gpiodiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t gpiodiv;$/;"	m	struct:cm_config	typeref:typename:uint32_t
gpiods	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int gpiods;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
gpior	drivers/spi/zynq_qspi.c	/^	u32 gpior;	\/* 0x30 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
gpios	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	struct cb_gpio gpios[SYSINFO_MAX_GPIOS];$/;"	m	struct:sysinfo_t	typeref:struct:cb_gpio[]
gpios	arch/x86/include/asm/coreboot_tables.h	/^	struct cb_gpio gpios[0];$/;"	m	struct:cb_gpios	typeref:struct:cb_gpio[0]
gpios	board/BuR/brxre1/mux.c	/^static struct module_pin_mux gpios[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpios	drivers/i2c/i2c-gpio.c	/^	struct gpio_desc gpios[PIN_COUNT];$/;"	m	struct:i2c_gpio_bus	typeref:struct:gpio_desc[]	file:
gpios	drivers/spmi/spmi-sandbox.c	/^	struct sandbox_emul_gpio gpios[EMUL_GPIO_COUNT];$/;"	m	struct:sandbox_spmi_priv	typeref:struct:sandbox_emul_gpio[]	file:
gpios	include/sh_pfc.h	/^	struct pinmux_gpio *gpios;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_gpio *
gpios_out_high	board/boundary/nitrogen6x/nitrogen6x.c	/^static unsigned gpios_out_high[] = {$/;"	v	typeref:typename:unsigned[]	file:
gpios_out_low	board/boundary/nitrogen6x/nitrogen6x.c	/^static unsigned gpios_out_low[] = {$/;"	v	typeref:typename:unsigned[]	file:
gpios_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const gpios_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gpios_pin_mux	board/siemens/draco/mux.c	/^static struct module_pin_mux gpios_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpixfmt	drivers/video/mxc_ipuv3_fb.c	/^static uint32_t gpixfmt;$/;"	v	typeref:typename:uint32_t	file:
gpj0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpj0: gpj0 {$/;"	l
gpj0	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^		gpj0: gpj0 {$/;"	l	label:pinctrl_0
gpj0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpj0: gpj0 {$/;"	l
gpj0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpj0: gpj0 {$/;"	l
gpj0	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpj0: gpj0 {$/;"	l
gpj1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpj1: gpj1 {$/;"	l
gpj1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpj1: gpj1 {$/;"	l
gpj1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpj1: gpj1 {$/;"	l
gpj1	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpj1: gpj1 {$/;"	l
gpj2	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpj2: gpj2 {$/;"	l
gpj2	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpj2: gpj2 {$/;"	l
gpj3	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpj3: gpj3 {$/;"	l
gpj3	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpj3: gpj3 {$/;"	l
gpj4	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpj4: gpj4 {$/;"	l
gpj4	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpj4: gpj4 {$/;"	l
gpj4	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpj4: gpj4 {$/;"	l
gpjcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpjcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpjdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpjdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpjup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gpjup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gpk0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpk0: gpk0 {$/;"	l
gpk0	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^		gpk0: gpk0 {$/;"	l	label:pinctrl_1
gpk0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpk0: gpk0 {$/;"	l
gpk0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpk0: gpk0 {$/;"	l
gpk1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpk1: gpk1 {$/;"	l
gpk1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpk1: gpk1 {$/;"	l
gpk1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpk1: gpk1 {$/;"	l
gpk2	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpk2: gpk2 {$/;"	l
gpk2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpk2: gpk2 {$/;"	l
gpk2	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpk2: gpk2 {$/;"	l
gpk3	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpk3: gpk3 {$/;"	l
gpk3	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpk3: gpk3 {$/;"	l
gpk3	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpk3: gpk3 {$/;"	l
gpl0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpl0: gpl0 {$/;"	l
gpl0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpl0: gpl0 {$/;"	l
gpl0	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpl0: gpl0 {$/;"	l
gpl1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpl1: gpl1 {$/;"	l
gpl1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpl1: gpl1 {$/;"	l
gpl1	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpl1: gpl1 {$/;"	l
gpl2	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpl2: gpl2 {$/;"	l
gpl2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpl2: gpl2 {$/;"	l
gpl2	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpl2: gpl2 {$/;"	l
gpl3	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpl3: gpl3 {$/;"	l
gpl4	arch/arm/dts/s5pc100-pinctrl.dtsi	/^		gpl4: gpl4 {$/;"	l
gplen	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gplen[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gplev	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gplev[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gplinmux	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	gplinmux[23];			\/* 0x578 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[23]
gpll1div	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	gpll1div;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
gpll_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 gpll_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
gpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gpll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gpll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gpll_init_cfg	drivers/clk/rockchip/clk_rk3036.c	/^static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);$/;"	v	typeref:typename:const struct pll_div	file:
gpll_init_cfg	drivers/clk/rockchip/clk_rk3288.c	/^static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);$/;"	v	typeref:typename:const struct pll_div	file:
gpll_init_cfg	drivers/clk/rockchip/clk_rk3399.c	/^static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);$/;"	v	typeref:typename:const struct pll_div	file:
gpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	gpll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
gpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned gpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
gpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned gpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
gpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned gpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
gpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpll_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gplldiv	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	gplldiv;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
gplmux	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	gplmux[71];			\/* 0x5d4 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[71]
gplr	drivers/gpio/mvgpio.h	/^	u32 gplr;	\/* Pin Level Register - 0x0000 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gpm0	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^		gpm0: gpm0 {$/;"	l	label:pinctrl_1
gpm0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpm0: gpm0 {$/;"	l
gpm1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpm1: gpm1 {$/;"	l
gpm2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpm2: gpm2 {$/;"	l
gpm3	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpm3: gpm3 {$/;"	l
gpm4	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpm4: gpm4 {$/;"	l
gpmc	arch/arm/dts/am33xx.dtsi	/^		gpmc: gpmc@50000000 {$/;"	l
gpmc	arch/arm/dts/am4372.dtsi	/^		gpmc: gpmc@50000000 {$/;"	l
gpmc	arch/arm/dts/dra7.dtsi	/^		gpmc: gpmc@50000000 {$/;"	l
gpmc	include/linux/mtd/omap_gpmc.h	/^struct gpmc {$/;"	s
gpmc_XR16L2751	board/technexion/twister/twister.c	/^static const u32 gpmc_XR16L2751[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_a0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a1;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a1;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a10	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a10;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a10	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a10;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a11	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a11;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a11	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a11;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a2;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a2;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a3;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a3;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a4	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a4;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a4	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a4;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a5	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a5;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a5	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a5;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a6	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a6;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a6	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a6;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a7	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a7;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a7	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a7;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a8	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a8;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a8	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a8;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a9	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_a9;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_a9	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_a9;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad1;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad1;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad10	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad10;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad10	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad10;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad11	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad11;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad11	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad11;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad12	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad12;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad12	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad12;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad13	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad13;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad13	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad13;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad14	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad14;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad14	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad14;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad15	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad15;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad15	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad15;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad2;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad2;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad3;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad3;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad4	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad4;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad4	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad4;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad5	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad5;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad5	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad5;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad6	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad6;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad6	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad6;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad7	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad7;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad7	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad7;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad8	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad8;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad8	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad8;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad9	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_ad9;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_ad9	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_ad9;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_advn_ale	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_advn_ale;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_advn_ale	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_advn_ale;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_be0n_cle	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_be0n_cle;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_be0n_cle	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_be0n_cle;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_be1n	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_be1n;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_be1n	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_be1n;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_cfg	arch/arm/cpu/armv7/omap-common/mem-common.c	/^const struct gpmc *gpmc_cfg = (struct gpmc *)GPMC_BASE;$/;"	v	typeref:typename:const struct gpmc *
gpmc_clk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_clk;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_clk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_clk;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_cs	include/linux/mtd/omap_gpmc.h	/^struct gpmc_cs {$/;"	s
gpmc_cs0_flash	arch/arm/cpu/armv7/omap-common/mem-common.c	/^char gpmc_cs0_flash = -1;$/;"	v	typeref:typename:char
gpmc_cs0_flash	arch/arm/cpu/armv7/omap-common/mem-common.c	/^char gpmc_cs0_flash = MTD_DEV_TYPE_NAND;$/;"	v	typeref:typename:char
gpmc_cs0_flash	arch/arm/cpu/armv7/omap-common/mem-common.c	/^char gpmc_cs0_flash = MTD_DEV_TYPE_NOR;$/;"	v	typeref:typename:char
gpmc_cs0_flash	arch/arm/cpu/armv7/omap-common/mem-common.c	/^char gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;$/;"	v	typeref:typename:char
gpmc_csn0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_csn0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_csn0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_csn1;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_csn1;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_csn2;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_csn2;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_csn3;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_csn3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_csn3;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_dm9000_config	board/timll/devkit8000/devkit8000.c	/^static void gpmc_dm9000_config(void)$/;"	f	typeref:typename:void	file:
gpmc_fpga	board/teejet/mt_ventoux/mt_ventoux.c	/^static const u32 gpmc_fpga[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_init	arch/arm/cpu/armv7/omap-common/mem-common.c	/^void gpmc_init(void)$/;"	f	typeref:typename:void
gpmc_lab_enet	board/logicpd/zoom1/zoom1.c	/^static const u32 gpmc_lab_enet[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_lan92xx_config	board/logicpd/omap3som/omap3logic.c	/^static const u32 gpmc_lan92xx_config[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_lan_config	board/gumstix/duovero/duovero.c	/^static const u32 gpmc_lan_config[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_lan_config	board/overo/overo.c	/^static const u32 gpmc_lan_config[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_nadv_ale	arch/arm/include/asm/arch-omap3/cpu.h	/^	u16 gpmc_nadv_ale;	\/* 0xC0 *\/$/;"	m	struct:ctrl	typeref:typename:u16
gpmc_nand_config	board/siemens/draco/board.c	/^static const u32 gpmc_nand_config[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_net_config	board/timll/devkit8000/devkit8000.c	/^static u32 gpmc_net_config[GPMC_MAX_REG] = {$/;"	v	typeref:typename:u32[]	file:
gpmc_noe	arch/arm/include/asm/arch-omap3/cpu.h	/^	u16 gpmc_noe;		\/* 0xC2 *\/$/;"	m	struct:ctrl	typeref:typename:u16
gpmc_nwe	arch/arm/include/asm/arch-omap3/cpu.h	/^	u16 gpmc_nwe;		\/* 0xC4 *\/$/;"	m	struct:ctrl	typeref:typename:u16
gpmc_oen_ren	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_oen_ren;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_oen_ren	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_oen_ren;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux gpmc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
gpmc_smc911	board/technexion/twister/twister.c	/^static const u32 gpmc_smc911[] = {$/;"	v	typeref:typename:const u32[]	file:
gpmc_wait0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_wait0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_wait0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_wait0;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_wen	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_wen;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_wen	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_wen;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_wpn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int gpmc_wpn;$/;"	m	struct:pad_signals	typeref:typename:int
gpmc_wpn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int gpmc_wpn;$/;"	m	struct:pad_signals	typeref:typename:int
gpmcclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int gpmcclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
gpmcclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpmcclkctrl;	\/* offset 0x220 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpmcclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int gpmcclkctrl;	\/* offset 0x30 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
gpmi	arch/arm/dts/imx6qdl.dtsi	/^		gpmi: gpmi-nand@00112000 {$/;"	l
gpmi	arch/arm/dts/imx6ull.dtsi	/^		gpmi: gpmi-nand@01806000{$/;"	l
gpmi_pads	board/engicam/icorem6/icorem6.c	/^iomux_v3_cfg_t gpmi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]
gpmi_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t gpmi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
gpmi_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^iomux_v3_cfg_t gpmi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]
gpmi_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const gpmi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gpmi_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const gpmi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gpmp01	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp01: gpmp01 {$/;"	l
gpmp02	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp02: gpmp02 {$/;"	l
gpmp03	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp03: gpmp03 {$/;"	l
gpmp04	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp04: gpmp04 {$/;"	l
gpmp05	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp05: gpmp05 {$/;"	l
gpmp06	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp06: gpmp06 {$/;"	l
gpmp07	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp07: gpmp07 {$/;"	l
gpmp10	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp10: gpmp10 {$/;"	l
gpmp11	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp11: gpmp11 {$/;"	l
gpmp12	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp12: gpmp12 {$/;"	l
gpmp13	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp13: gpmp13 {$/;"	l
gpmp14	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp14: gpmp14 {$/;"	l
gpmp15	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp15: gpmp15 {$/;"	l
gpmp16	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp16: gpmp16 {$/;"	l
gpmp17	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp17: gpmp17 {$/;"	l
gpmp18	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp18: gpmp18 {$/;"	l
gpmp20	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp20: gpmp20 {$/;"	l
gpmp21	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp21: gpmp21 {$/;"	l
gpmp22	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp22: gpmp22 {$/;"	l
gpmp23	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp23: gpmp23 {$/;"	l
gpmp24	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp24: gpmp24 {$/;"	l
gpmp25	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp25: gpmp25 {$/;"	l
gpmp26	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp26: gpmp26 {$/;"	l
gpmp27	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp27: gpmp27 {$/;"	l
gpmp28	arch/arm/dts/s5pc110-pinctrl.dtsi	/^		gpmp28: gpmp28 {$/;"	l
gpnum	board/boundary/nitrogen6x/nitrogen6x.c	/^	unsigned	gpnum;$/;"	m	struct:button_key	typeref:typename:unsigned	file:
gpo	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	gpo;			\/* 0x10 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
gpo	include/faraday/ftsdc010.h	/^	unsigned int	gpo;		\/* 0x48 - gerenal purpose output *\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
gpodr	arch/powerpc/include/asm/immap_512x.h	/^	u32 gpodr;$/;"	m	struct:gpio512x	typeref:typename:u32
gpodr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpodr;$/;"	m	struct:ccsr_gpio	typeref:typename:u32
gpodr	drivers/gpio/mpc85xx_gpio.c	/^	u32	gpodr;$/;"	m	struct:ccsr_gpio	typeref:typename:u32	file:
gpoutdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpoutdr;	\/* General-purpose output data *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpoutdr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gpoutdr;	\/* 0xe0040 - General-purpose output data register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
gpporcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpporcr;	\/* General-purpose POR configuration *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gpporcr;	\/* 0xe0020 - General-purpose POR configuration register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
gpporcr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     gpporcr1;       \/* General-purpose POR configuration *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	gpporcr1;	\/* General-purpose POR configuration *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     gpporcr1;       \/* General-purpose POR configuration *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpporcr1;	\/* General-purpose POR configuration *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	gpporcr2;$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	gpporcr2;	\/* General-purpose POR configuration 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	gpporcr2;$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gpporcr2;	\/* General-purpose POR configuration 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	gpporcr3;$/;"	m	struct:ccsr_gur	typeref:typename:u32
gpporcr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	gpporcr4;$/;"	m	struct:ccsr_gur	typeref:typename:u32
gppud	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gppud;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
gppudclk	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gppudclk[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gpr	arch/arm/dts/imx6qdl.dtsi	/^			gpr: iomuxc-gpr@020e0000 {$/;"	l
gpr	arch/arm/dts/imx6ull.dtsi	/^			gpr: iomuxc-gpr@020e4000 {$/;"	l
gpr	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 gpr;$/;"	m	struct:gpio_regs	typeref:typename:u32
gpr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 gpr;$/;"	m	struct:iomuxc_regs	typeref:typename:u32
gpr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	gpr[2];$/;"	m	struct:iomuxc	typeref:typename:u32[2]
gpr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	gpr[3];$/;"	m	struct:iomuxc	typeref:typename:u32[3]
gpr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 gpr[14];$/;"	m	struct:iomuxc	typeref:typename:u32[14]
gpr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr[23];        \/* 0x000 *\/$/;"	m	struct:iomuxc_gpr_base_regs	typeref:typename:u32[23]
gpr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr[23];$/;"	m	struct:iomuxc	typeref:typename:u32[23]
gpr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 gpr[2];		\/* 0xe4 general purpose register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
gpr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 gpr[2];		\/* 0xe4 general purpose register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
gpr	arch/microblaze/include/asm/ptrace.h	/^	microblaze_reg_t gpr[NUM_GPRS];$/;"	m	struct:pt_regs	typeref:typename:microblaze_reg_t[]
gpr	arch/openrisc/include/asm/ptrace.h	/^			long gpr[32];$/;"	m	struct:pt_regs::__anoneee9473c010a::__anoneee9473c0408	typeref:typename:long[32]
gpr	arch/openrisc/include/asm/ptrace.h	/^	unsigned long gpr[32];$/;"	m	struct:user_regs_struct	typeref:typename:unsigned long[32]
gpr	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG gpr[32];$/;"	m	struct:pt_regs	typeref:typename:PPC_REG[32]
gpr	drivers/video/fsl_dcu_fb.c	/^	u32 gpr;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
gpr	drivers/video/ipu_regs.h	/^	u32 gpr;$/;"	m	struct:ipu_cm	typeref:typename:u32
gpr	include/vsc9953.h	/^	u32	gpr;$/;"	m	struct:vsc9953_chip_regs	typeref:typename:u32
gpr0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t gpr0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:uint32_t
gpr0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gpr0;$/;"	m	struct:src	typeref:typename:u32
gpr0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t gpr0_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:uint32_t
gpr0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t gpr0_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:uint32_t
gpr0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t gpr0_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:uint32_t
gpr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr1;$/;"	m	struct:src	typeref:typename:u32
gpr1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr1;$/;"	m	struct:src	typeref:typename:u32
gpr1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr1;$/;"	m	struct:src	typeref:typename:u32
gpr1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gpr1;$/;"	m	struct:src	typeref:typename:u32
gpr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 gpr1;$/;"	m	struct:sysconf83xx	typeref:typename:u32
gpr10	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr10;$/;"	m	struct:src	typeref:typename:u32
gpr10	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr10;$/;"	m	struct:src	typeref:typename:u32
gpr10	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr10;$/;"	m	struct:src	typeref:typename:u32
gpr11	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr11;$/;"	m	struct:src	typeref:typename:u32
gpr12	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr12;$/;"	m	struct:src	typeref:typename:u32
gpr13	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr13;$/;"	m	struct:src	typeref:typename:u32
gpr14	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr14;$/;"	m	struct:src	typeref:typename:u32
gpr15	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr15;$/;"	m	struct:src	typeref:typename:u32
gpr16	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr16;$/;"	m	struct:src	typeref:typename:u32
gpr17	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr17;$/;"	m	struct:src	typeref:typename:u32
gpr18	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr18;$/;"	m	struct:src	typeref:typename:u32
gpr19	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr19;$/;"	m	struct:src	typeref:typename:u32
gpr1_boot	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr1_boot;$/;"	m	struct:src	typeref:typename:u32
gpr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr2;$/;"	m	struct:src	typeref:typename:u32
gpr2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr2;$/;"	m	struct:src	typeref:typename:u32
gpr2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr2;$/;"	m	struct:src	typeref:typename:u32
gpr2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gpr2;$/;"	m	struct:src	typeref:typename:u32
gpr20	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr20;$/;"	m	struct:src	typeref:typename:u32
gpr21	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr21;$/;"	m	struct:src	typeref:typename:u32
gpr22	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr22;$/;"	m	struct:src	typeref:typename:u32
gpr23	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr23;$/;"	m	struct:src	typeref:typename:u32
gpr24	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr24;$/;"	m	struct:src	typeref:typename:u32
gpr25	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr25;$/;"	m	struct:src	typeref:typename:u32
gpr26	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr26;$/;"	m	struct:src	typeref:typename:u32
gpr27	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr27;$/;"	m	struct:src	typeref:typename:u32
gpr3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr3;$/;"	m	struct:src	typeref:typename:u32
gpr3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr3;$/;"	m	struct:src	typeref:typename:u32
gpr3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr3;$/;"	m	struct:src	typeref:typename:u32
gpr3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gpr3;$/;"	m	struct:src	typeref:typename:u32
gpr4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr4;$/;"	m	struct:src	typeref:typename:u32
gpr4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr4;$/;"	m	struct:src	typeref:typename:u32
gpr4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr4;$/;"	m	struct:src	typeref:typename:u32
gpr4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gpr4;$/;"	m	struct:src	typeref:typename:u32
gpr5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr5;$/;"	m	struct:src	typeref:typename:u32
gpr5	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr5;$/;"	m	struct:src	typeref:typename:u32
gpr5	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr5;$/;"	m	struct:src	typeref:typename:u32
gpr6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr6;$/;"	m	struct:src	typeref:typename:u32
gpr6	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr6;$/;"	m	struct:src	typeref:typename:u32
gpr6	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr6;$/;"	m	struct:src	typeref:typename:u32
gpr7	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr7;$/;"	m	struct:src	typeref:typename:u32
gpr7	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr7;$/;"	m	struct:src	typeref:typename:u32
gpr7	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr7;$/;"	m	struct:src	typeref:typename:u32
gpr8	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr8;$/;"	m	struct:src	typeref:typename:u32
gpr8	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr8;$/;"	m	struct:src	typeref:typename:u32
gpr9	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     gpr9;$/;"	m	struct:src	typeref:typename:u32
gpr9	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpr9;$/;"	m	struct:src	typeref:typename:u32
gpr9	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 gpr9;$/;"	m	struct:src	typeref:typename:u32
gpr_init	board/bachmann/ot1200/ot1200.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/barco/platinum/platinum.h	/^static inline void gpr_init(void)$/;"	f	typeref:typename:void
gpr_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/el/el6x/el6x.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/engicam/icorem6/icorem6.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/freescale/mx6sabresd/mx6sabresd.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/kosagi/novena/novena_spl.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/phytec/pcm058/pcm058.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/udoo/udoo_spl.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gpr_init	board/wandboard/spl.c	/^static void gpr_init(void)$/;"	f	typeref:typename:void	file:
gprc	drivers/net/e1000.h	/^	uint64_t gprc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
gpren	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gpren[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gprs	arch/openrisc/include/asm/ptrace.h	/^			long gprs[30];$/;"	m	struct:pt_regs::__anoneee9473c010a::__anoneee9473c0308	typeref:typename:long[30]
gprt0	board/keymile/common/common.h	/^	unsigned char	gprt0;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
gprt1	board/keymile/common/common.h	/^	unsigned char	gprt1;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
gprt2	board/keymile/common/common.h	/^	unsigned char	gprt2;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
gprt3	board/keymile/common/common.h	/^	unsigned char	gprt3;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
gps_alive_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_alive_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_alive_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_alive_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_alive_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_alive_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_alive_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_alive_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 gps_clk_cfg;	\/* 0xd0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gps_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 gps_clk_cfg;	\/* 0xd0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gps_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_shdn	board/gateworks/gw_ventana/common.h	/^	int gps_shdn;$/;"	m	struct:ventana	typeref:typename:int
gps_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gps_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gps_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
gpset	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 gpset[2];$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32[2]
gpsr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 gpsr;$/;"	m	struct:src	typeref:typename:u32
gpsr	drivers/gpio/mvgpio.h	/^	u32 gpsr;	\/* Pin Output Set Register - 0x0018 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gpstatus	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 gpstatus;		\/* 0x2F4 *\/$/;"	m	struct:ctrl	typeref:typename:u32
gpt	arch/arm/dts/imx6qdl.dtsi	/^			gpt: gpt@02098000 {$/;"	l
gpt	arch/powerpc/include/asm/immap_512x.h	/^	gpt512x_t		gpt;		\/* General Purpose Timer *\/$/;"	m	struct:immap	typeref:typename:gpt512x_t
gpt0	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt0;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt1	arch/arm/dts/imx6ull.dtsi	/^			gpt1: gpt@02098000 {$/;"	l
gpt1	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt1;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt1_freq	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 gpt1_freq;$/;"	m	struct:bootrom_sw_info	typeref:typename:u32
gpt1_regs_ptr	arch/arm/include/asm/arch-stm32f7/gpt.h	/^struct gpt_regs *const gpt1_regs_ptr =$/;"	v	typeref:struct:gpt_regs * const
gpt1_regs_ptr	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^struct gpt_regs *const gpt1_regs_ptr =$/;"	v	typeref:struct:gpt_regs * const
gpt2	arch/arm/dts/imx6ull.dtsi	/^			gpt2: gpt@020e8000 {$/;"	l
gpt2	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt2;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt3	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt3;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt4	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt4;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt5	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt5;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct gpt512x {$/;"	s
gpt512x_t	arch/powerpc/include/asm/immap_512x.h	/^} gpt512x_t;$/;"	t	typeref:struct:gpt512x
gpt6	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt6;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt7	include/mpc5xxx.h	/^	struct mpc5xxx_gpt gpt7;$/;"	m	struct:mpc5xxx_gpt_0_7	typeref:struct:mpc5xxx_gpt
gpt_convert_efi_name_to_char	disk/part_efi.c	/^static void gpt_convert_efi_name_to_char(char *s, efi_char16_t *es, int n)$/;"	f	typeref:typename:void	file:
gpt_default	cmd/gpt.c	/^static int gpt_default(struct blk_desc *blk_dev_desc, const char *str_part)$/;"	f	typeref:typename:int	file:
gpt_entry	include/part_efi.h	/^} __packed gpt_entry;$/;"	t	typeref:struct:_gpt_entry __packed
gpt_entry_attributes	include/part_efi.h	/^} __packed gpt_entry_attributes;$/;"	t	typeref:union:_gpt_entry_attributes __packed
gpt_fill_header	disk/part_efi.c	/^int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h,$/;"	f	typeref:typename:int
gpt_fill_pte	disk/part_efi.c	/^int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e,$/;"	f	typeref:typename:int
gpt_get_clk	arch/arm/imx-common/timer.c	/^static inline ulong gpt_get_clk(void)$/;"	f	typeref:typename:ulong	file:
gpt_has_clk_source_osc	arch/arm/imx-common/timer.c	/^static inline int gpt_has_clk_source_osc(void)$/;"	f	typeref:typename:int	file:
gpt_header	include/part_efi.h	/^} __packed gpt_header;$/;"	t	typeref:struct:_gpt_header __packed
gpt_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct gpt_regs {$/;"	s
gpt_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct gpt_regs {$/;"	s
gpt_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct gpt_regs {$/;"	s
gpt_regs	arch/arm/include/asm/arch-spear/spr_gpt.h	/^struct gpt_regs {$/;"	s
gpt_regs	arch/arm/include/asm/arch-stm32f7/gpt.h	/^struct gpt_regs {$/;"	s
gpt_regs	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^struct gpt_regs {$/;"	s
gpt_regs_p	arch/arm/cpu/arm926ejs/spear/timer.c	/^static struct gpt_regs *const gpt_regs_p =$/;"	v	typeref:struct:gpt_regs * const	file:
gpt_restore	disk/part_efi.c	/^int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,$/;"	f	typeref:typename:int
gpt_tcmp	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpt_tcmp;$/;"	m	struct:gpt_regs	typeref:typename:u32
gpt_tcn	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpt_tcn;$/;"	m	struct:gpt_regs	typeref:typename:u32
gpt_tcr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpt_tcr;$/;"	m	struct:gpt_regs	typeref:typename:u32
gpt_tctl	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpt_tctl;$/;"	m	struct:gpt_regs	typeref:typename:u32
gpt_tprer	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpt_tprer;$/;"	m	struct:gpt_regs	typeref:typename:u32
gpt_tstat	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 gpt_tstat;$/;"	m	struct:gpt_regs	typeref:typename:u32
gpt_verify	cmd/gpt.c	/^static int gpt_verify(struct blk_desc *blk_dev_desc, const char *str_part)$/;"	f	typeref:typename:int	file:
gpt_verify_headers	disk/part_efi.c	/^int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,$/;"	f	typeref:typename:int
gpt_verify_partitions	disk/part_efi.c	/^int gpt_verify_partitions(struct blk_desc *dev_desc,$/;"	f	typeref:typename:int
gptc	drivers/net/e1000.h	/^	uint64_t gptc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
gptimer	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct gptimer {$/;"	s
gptimer	arch/arm/include/asm/arch-omap3/cpu.h	/^struct gptimer {$/;"	s
gptimer	arch/arm/include/asm/arch-omap4/cpu.h	/^struct gptimer {$/;"	s
gptimer	arch/arm/include/asm/arch-omap5/cpu.h	/^struct gptimer {$/;"	s
gptimer	arch/sparc/cpu/leon3/prom.c	/^ambapp_dev_gptimer *gptimer;$/;"	v	typeref:typename:ambapp_dev_gptimer *
gptimer0_ctrl	include/usb/ehci-ci.h	/^	u32	gptimer0_ctrl;	\/* 0x084 - General Purpose Timer 0 control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
gptimer0_ld	include/usb/ehci-ci.h	/^	u32	gptimer0_ld;	\/* 0x080 - General Purpose Timer 0 load value *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
gptimer1_ctrl	include/usb/ehci-ci.h	/^	u32     gptimer1_ctrl;	\/* 0x08C - General Purpose Timer 1 control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
gptimer1_ld	include/usb/ehci-ci.h	/^	u32     gptimer1_ld;	\/* 0x088 - General Purpose Timer 1 load value *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
gptmr	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct gptmr {$/;"	s
gptmr_t	arch/m68k/include/asm/immap_547x_8x.h	/^} gptmr_t;$/;"	t	typeref:struct:gptmr
gpu	arch/arm/dts/rk3288.dtsi	/^	gpu: gpu@ffa30000 {$/;"	l
gpu	arch/arm/dts/zynqmp.dtsi	/^		gpu: gpu@fd4b0000 {$/;"	l
gpu	arch/arm/include/asm/omap_common.h	/^	struct volts gpu;$/;"	m	struct:vcores_data	typeref:struct:volts
gpu_2d	arch/arm/dts/imx6qdl.dtsi	/^		gpu_2d: gpu@00134000 {$/;"	l
gpu_3d	arch/arm/dts/imx6qdl.dtsi	/^		gpu_3d: gpu@00130000 {$/;"	l
gpu_alert0	arch/arm/dts/rk3288-thermal.dtsi	/^		gpu_alert0: gpu_alert0 {$/;"	l	label:gpu_thermal
gpu_axi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 gpu_axi_clk_cfg;	\/* 0x4f8 GPU AXI clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_axi_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 gpu_axi_clk_cfg;	\/* 0x4f8 GPU AXI clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 gpu_bwcr;		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
gpu_bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 gpu_bwcr;		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
gpu_core_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 gpu_core_clk_cfg;	\/* 0x1a0 GPU core clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_core_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 gpu_core_clk_cfg;	\/* 0x1a0 GPU core clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_core_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 gpu_core_clk_cfg;	\/* 0x4f0 GPU core clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_core_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 gpu_core_clk_cfg;	\/* 0x1a0 GPU core clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_core_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 gpu_core_clk_cfg;	\/* 0x1a0 GPU core clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_core_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 gpu_core_clk_cfg;	\/* 0x4f0 GPU core clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_core_gclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpu_core_gclk_mux: gpu_core_gclk_mux {$/;"	l
gpu_crit	arch/arm/dts/omap5-gpu-thermal.dtsi	/^		gpu_crit: gpu_crit {$/;"	l	label:gpu_thermal
gpu_crit	arch/arm/dts/rk3288-thermal.dtsi	/^		gpu_crit: gpu_crit {$/;"	l	label:gpu_thermal
gpu_dclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpu_dclk: gpu_dclk {$/;"	l
gpu_hyd_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 gpu_hyd_clk_cfg;	\/* 0x1a0 GPU HYD clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_hyd_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 gpu_hyd_clk_cfg;	\/* 0x1a8 GPU HYD clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_hyd_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 gpu_hyd_clk_cfg;	\/* 0x1a0 GPU HYD clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_hyd_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 gpu_hyd_clk_cfg;	\/* 0x1a8 GPU HYD clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_hyd_gclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	gpu_hyd_gclk_mux: gpu_hyd_gclk_mux {$/;"	l
gpu_mem_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 gpu_mem_clk_cfg;	\/* 0x1a4 GPU memory clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_mem_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 gpu_mem_clk_cfg;	\/* 0x1a4 GPU memory clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_mem_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 gpu_mem_clk_cfg;	\/* 0x4f4 GPU memory clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_mem_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 gpu_mem_clk_cfg;	\/* 0x1a4 GPU memory clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_mem_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 gpu_mem_clk_cfg;	\/* 0x1a4 GPU memory clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_mem_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 gpu_mem_clk_cfg;	\/* 0x4f4 GPU memory clock config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gpu_pwrdn_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpu_pwrdn_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
gpu_pwroff	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 gpu_pwroff;		\/* 0x118 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
gpu_pwroff	arch/arm/include/asm/arch/prcm.h	/^	u32 gpu_pwroff;		\/* 0x118 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
gpu_pwrup_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 gpu_pwrup_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
gpu_thermal	arch/arm/dts/omap5-gpu-thermal.dtsi	/^gpu_thermal: gpu_thermal {$/;"	l
gpu_thermal	arch/arm/dts/rk3288-thermal.dtsi	/^gpu_thermal: gpu_thermal {$/;"	l
gpu_vg	arch/arm/dts/imx6q.dtsi	/^		gpu_vg: gpu@02204000 {$/;"	l
gpv0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpv0: gpv0 {$/;"	l
gpv0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpv0: gpv0 {$/;"	l
gpv1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpv1: gpv1 {$/;"	l
gpv1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpv1: gpv1 {$/;"	l
gpv2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpv2: gpv2 {$/;"	l
gpv2	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^		gpv2: gpv2 {$/;"	l	label:pinctrl_2
gpv2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpv2: gpv2 {$/;"	l
gpv3	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpv3: gpv3 {$/;"	l
gpv3	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpv3: gpv3 {$/;"	l
gpv4	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpv4: gpv4 {$/;"	l
gpv4	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^		gpv4: gpv4 {$/;"	l	label:pinctrl_2
gpv4	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpv4: gpv4 {$/;"	l
gpvndctl	drivers/usb/host/dwc2.h	/^	u32			gpvndctl;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gpx0	arch/arm/dts/exynos4210-pinctrl-uboot.dtsi	/^		gpx0: gpx0 {$/;"	l	label:pinctrl_1
gpx0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpx0: gpx0 {$/;"	l
gpx0	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^		gpx0: gpx0 {$/;"	l	label:pinctrl_1
gpx0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpx0: gpx0 {$/;"	l
gpx0	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^		gpx0: gpx0 {$/;"	l	label:pinctrl_0
gpx0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpx0: gpx0 {$/;"	l
gpx0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpx0: gpx0 {$/;"	l
gpx1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpx1: gpx1 {$/;"	l
gpx1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpx1: gpx1 {$/;"	l
gpx1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpx1: gpx1 {$/;"	l
gpx1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpx1: gpx1 {$/;"	l
gpx2	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpx2: gpx2 {$/;"	l
gpx2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpx2: gpx2 {$/;"	l
gpx2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpx2: gpx2 {$/;"	l
gpx2	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpx2: gpx2 {$/;"	l
gpx3	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpx3: gpx3 {$/;"	l
gpx3	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpx3: gpx3 {$/;"	l
gpx3	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpx3: gpx3 {$/;"	l
gpx3	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpx3: gpx3 {$/;"	l
gpy0	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy0: gpy0 {$/;"	l
gpy0	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy0: gpy0 {$/;"	l
gpy0	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy0: gpy0 {$/;"	l
gpy0	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy0: gpy0 {$/;"	l
gpy1	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy1: gpy1 {$/;"	l
gpy1	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy1: gpy1 {$/;"	l
gpy1	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy1: gpy1 {$/;"	l
gpy1	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy1: gpy1 {$/;"	l
gpy2	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy2: gpy2 {$/;"	l
gpy2	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy2: gpy2 {$/;"	l
gpy2	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy2: gpy2 {$/;"	l
gpy2	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy2: gpy2 {$/;"	l
gpy3	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy3: gpy3 {$/;"	l
gpy3	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy3: gpy3 {$/;"	l
gpy3	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy3: gpy3 {$/;"	l
gpy3	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy3: gpy3 {$/;"	l
gpy4	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy4: gpy4 {$/;"	l
gpy4	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy4: gpy4 {$/;"	l
gpy4	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy4: gpy4 {$/;"	l
gpy4	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy4: gpy4 {$/;"	l
gpy5	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy5: gpy5 {$/;"	l
gpy5	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy5: gpy5 {$/;"	l
gpy5	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy5: gpy5 {$/;"	l
gpy5	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy5: gpy5 {$/;"	l
gpy6	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpy6: gpy6 {$/;"	l
gpy6	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpy6: gpy6 {$/;"	l
gpy6	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpy6: gpy6 {$/;"	l
gpy6	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy6: gpy6 {$/;"	l
gpy7	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpy7: gpy7 {$/;"	l
gpz	arch/arm/dts/exynos4210-pinctrl.dtsi	/^		gpz: gpz {$/;"	l
gpz	arch/arm/dts/exynos4x12-pinctrl.dtsi	/^		gpz: gpz {$/;"	l
gpz	arch/arm/dts/exynos5250-pinctrl.dtsi	/^		gpz: gpz {$/;"	l
gpz	arch/arm/dts/exynos54xx-pinctrl.dtsi	/^		gpz: gpz {$/;"	l
gr8a66597	drivers/usb/host/r8a66597-hcd.c	/^static struct r8a66597 gr8a66597;$/;"	v	typeref:struct:r8a66597	file:
grab_empty_leb	fs/ubifs/recovery.c	/^static int grab_empty_leb(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
grace_stopped_rx	drivers/qe/uec.h	/^	int				grace_stopped_rx;$/;"	m	struct:uec_private	typeref:typename:int
grace_stopped_tx	drivers/qe/uec.h	/^	int				grace_stopped_tx;$/;"	m	struct:uec_private	typeref:typename:int
gracr2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	gracr2;		\/* GRA *\/$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
gracr3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	gracr3;		\/* GRA *\/$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
gradevctl	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	gradevctl;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
granted_ack_counter0	arch/powerpc/include/asm/immap_512x.h	/^	u32 granted_ack_counter0;$/;"	m	struct:ddr512x	typeref:typename:u32
granted_ack_counter1	arch/powerpc/include/asm/immap_512x.h	/^	u32 granted_ack_counter1;$/;"	m	struct:ddr512x	typeref:typename:u32
granted_ack_counter2	arch/powerpc/include/asm/immap_512x.h	/^	u32 granted_ack_counter2;$/;"	m	struct:ddr512x	typeref:typename:u32
granted_ack_counter3	arch/powerpc/include/asm/immap_512x.h	/^	u32 granted_ack_counter3;$/;"	m	struct:ddr512x	typeref:typename:u32
granted_ack_counter4	arch/powerpc/include/asm/immap_512x.h	/^	u32 granted_ack_counter4;$/;"	m	struct:ddr512x	typeref:typename:u32
graph_in_dma	drivers/video/ipu.h	/^	u8 graph_in_dma;$/;"	m	struct:ipu_channel	typeref:typename:u8
graph_wind_ctrl_async	drivers/video/ipu_regs.h	/^	u32 graph_wind_ctrl_async;$/;"	m	struct:ipu_com_async	typeref:typename:u32
graph_wind_ctrl_sync	drivers/video/ipu_regs.h	/^	u32 graph_wind_ctrl_sync;$/;"	m	struct:ipu_dp	typeref:typename:u32
graphic_device	drivers/video/sunxi_display.c	/^	GraphicDevice graphic_device;$/;"	m	struct:sunxi_display	typeref:typename:GraphicDevice	file:
graphic_device	drivers/video/sunxi_display2.c	/^	GraphicDevice graphic_device;$/;"	m	struct:sunxi_display	typeref:typename:GraphicDevice	file:
graphic_device	include/video_fb.h	/^typedef struct graphic_device {$/;"	s
grayscale	include/linux/fb.h	/^	__u32 grayscale;		\/* != 0 Graylevels instead of colors *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
greater_equal_modulus	lib/rsa/rsa-mod-exp.c	/^static int greater_equal_modulus(const struct rsa_public_key *key,$/;"	f	typeref:typename:int	file:
green	include/bmp_layout.h	/^	__u8	green;$/;"	m	struct:bmp_color_table_entry	typeref:typename:__u8
green	include/ec_commands.h	/^			uint8_t led, red, green, blue;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::rgb	typeref:typename:uint8_t
green	include/linux/fb.h	/^	__u16 *green;$/;"	m	struct:fb_cmap	typeref:typename:__u16 *
green	include/linux/fb.h	/^	__u16 *green;$/;"	m	struct:fb_cmap_user	typeref:typename:__u16 *
green	include/linux/fb.h	/^	struct fb_bitfield green;	\/* else only length is significant *\/$/;"	m	struct:fb_var_screeninfo	typeref:struct:fb_bitfield
green_led_off	arch/arm/cpu/arm920t/ep93xx/led.c	/^void green_led_off(void)$/;"	f	typeref:typename:void
green_led_off	arch/arm/mach-at91/arm926ejs/led.c	/^void green_led_off(void)$/;"	f	typeref:typename:void
green_led_off	board/atmel/at91rm9200ek/led.c	/^void	green_led_off(void)$/;"	f	typeref:typename:void
green_led_off	board/st/stm32f429-discovery/led.c	/^void green_led_off(void)$/;"	f	typeref:typename:void
green_led_off	board/ti/beagle/led.c	/^void green_led_off(void)$/;"	f	typeref:typename:void
green_led_off	common/board_f.c	/^__weak void green_led_off(void) {}$/;"	f	typeref:typename:__weak void
green_led_off	drivers/misc/gpio_led.c	/^void green_led_off(void)$/;"	f	typeref:typename:void
green_led_on	arch/arm/cpu/arm920t/ep93xx/led.c	/^void green_led_on(void)$/;"	f	typeref:typename:void
green_led_on	arch/arm/mach-at91/arm926ejs/led.c	/^void green_led_on(void)$/;"	f	typeref:typename:void
green_led_on	board/atmel/at91rm9200ek/led.c	/^void	green_led_on(void)$/;"	f	typeref:typename:void
green_led_on	board/st/stm32f429-discovery/led.c	/^void green_led_on(void)$/;"	f	typeref:typename:void
green_led_on	board/ti/beagle/led.c	/^void green_led_on(void)$/;"	f	typeref:typename:void
green_led_on	common/board_f.c	/^__weak void green_led_on(void) {}$/;"	f	typeref:typename:__weak void
green_led_on	drivers/misc/gpio_led.c	/^void green_led_on(void)$/;"	f	typeref:typename:void
green_mask_pos	arch/x86/include/asm/coreboot_tables.h	/^	u8 green_mask_pos;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
green_mask_pos	include/vbe.h	/^	u8 green_mask_pos;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
green_mask_size	arch/x86/include/asm/coreboot_tables.h	/^	u8 green_mask_size;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
green_mask_size	include/vbe.h	/^	u8 green_mask_size;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
green_pos	arch/arm/include/asm/setup.h	/^	u8		green_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
green_pos	arch/nds32/include/asm/setup.h	/^	u8		green_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
green_pos	include/linux/screen_info.h	/^	__u8  green_pos;	\/* 0x29 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
green_size	arch/arm/include/asm/setup.h	/^	u8		green_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
green_size	arch/nds32/include/asm/setup.h	/^	u8		green_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
green_size	include/linux/screen_info.h	/^	__u8  green_size;	\/* 0x28 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
green_triangle	drivers/demo/demo-pdata.c	/^static const struct dm_demo_pdata green_triangle = {$/;"	v	typeref:typename:const struct dm_demo_pdata	file:
greenlut	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	greenlut;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
greenx	include/linux/fb.h	/^	__u32 greenx;$/;"	m	struct:fb_chroma	typeref:typename:__u32
greeny	include/linux/fb.h	/^	__u32 greeny;$/;"	m	struct:fb_chroma	typeref:typename:__u32
gregs	include/fsl_ifc.h	/^	struct fsl_ifc_fcm *gregs;$/;"	m	struct:fsl_ifc	typeref:struct:fsl_ifc_fcm *
grep_sdram_config	arch/arm/mach-socfpga/qts-filter.sh	/^grep_sdram_config() {$/;"	f
grer	drivers/gpio/mvgpio.h	/^	u32 grer;	\/* Rising-Edge Detect Enable Register - 0x0030 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
greth_bd	drivers/net/greth.h	/^} greth_bd;$/;"	t	typeref:struct:_greth_bd
greth_bd	include/grlib/greth.h	/^} greth_bd;$/;"	t	typeref:struct:_greth_bd
greth_halt	drivers/net/greth.c	/^void greth_halt(struct eth_device *dev)$/;"	f	typeref:typename:void
greth_init	drivers/net/greth.c	/^int greth_init(struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int
greth_init_phy	drivers/net/greth.c	/^int greth_init_phy(greth_priv * dev, bd_t * bis)$/;"	f	typeref:typename:int
greth_initialize	drivers/net/greth.c	/^int greth_initialize(bd_t * bis)$/;"	f	typeref:typename:int
greth_priv	drivers/net/greth.c	/^} greth_priv;$/;"	t	typeref:struct:__anonb53b88540108	file:
greth_recv	drivers/net/greth.c	/^int greth_recv(struct eth_device *dev)$/;"	f	typeref:typename:int
greth_regs	drivers/net/greth.h	/^} greth_regs;$/;"	t	typeref:struct:_greth_regs
greth_regs	include/grlib/greth.h	/^} greth_regs;$/;"	t	typeref:struct:_greth_regs
greth_send	drivers/net/greth.c	/^int greth_send(struct eth_device *dev, void *eth_data, int data_length)$/;"	f	typeref:typename:int
greth_set_hwaddr	drivers/net/greth.c	/^void greth_set_hwaddr(greth_priv * greth, unsigned char *mac)$/;"	f	typeref:typename:void
grf	arch/arm/dts/rk3036.dtsi	/^	grf: syscon@20008000 {$/;"	l
grf	arch/arm/dts/rk3288.dtsi	/^	grf: syscon@ff770000 {$/;"	l
grf	arch/arm/dts/rk3399.dtsi	/^	grf: syscon@ff770000 {$/;"	l
grf	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	struct rk3288_grf *grf;$/;"	m	struct:rk3288_clk_priv	typeref:struct:rk3288_grf *
grf	arch/arm/mach-rockchip/rk3036-board-spl.c	/^static struct rk3036_grf * const grf = (void *)GRF_BASE;$/;"	v	typeref:struct:rk3036_grf * const	file:
grf	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	struct rk3036_grf *grf;$/;"	m	struct:rk3036_sdram_priv	typeref:struct:rk3036_grf *	file:
grf	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_grf *grf;$/;"	m	struct:dram_info	typeref:struct:rk3288_grf *	file:
grf	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^	struct rk3036_grf *grf;$/;"	m	struct:rk3036_pinctrl_priv	typeref:struct:rk3036_grf *	file:
grf	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	struct rk3288_grf *grf;$/;"	m	struct:rk3288_pinctrl_priv	typeref:struct:rk3288_grf *	file:
grf	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	struct rk3399_grf_regs *grf;$/;"	m	struct:rk3399_pinctrl_priv	typeref:struct:rk3399_grf_regs *	file:
grf	drivers/video/rockchip/rk_edp.c	/^	struct rk3288_grf *grf;$/;"	m	struct:rk_edp_priv	typeref:struct:rk3288_grf *	file:
grf	drivers/video/rockchip/rk_hdmi.c	/^	struct rk3288_grf *grf;$/;"	m	struct:rk_hdmi_priv	typeref:struct:rk3288_grf *	file:
grf	drivers/video/rockchip/rk_lvds.c	/^	struct rk3288_grf *grf;$/;"	m	struct:rk_lvds_priv	typeref:struct:rk3288_grf *	file:
grf	drivers/video/rockchip/rk_vop.c	/^	struct rk3288_grf *grf;$/;"	m	struct:rk_vop_priv	typeref:struct:rk3288_grf *	file:
grf_con	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 grf_con;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
grf_hsic_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 grf_hsic_status;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
grf_osc_e	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 grf_osc_e;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
grf_usbhost0_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 grf_usbhost0_status;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
grf_usbhost1_Status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 grf_usbhost1_Status;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
grlib_mctrl_handler	arch/sparc/cpu/leon3/memcfg.h	/^struct grlib_mctrl_handler {$/;"	s
grlib_mctrl_handlers	arch/sparc/cpu/leon3/memcfg.c	/^struct grlib_mctrl_handler grlib_mctrl_handlers[] = {$/;"	v	typeref:struct:grlib_mctrl_handler[]
grndis_size	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	grndis_size[4];$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg[4]
group	common/cli_hush.c	/^	struct pipe *group;			\/* if non-NULL, first in group or subshell *\/$/;"	m	struct:child_prog	typeref:struct:pipe *	file:
group_id	arch/x86/include/asm/me_common.h	/^	u32 group_id:8;$/;"	m	struct:mkhi_header	typeref:typename:u32:8
group_type	fs/ubifs/ubifs-media.h	/^	__u8 group_type;$/;"	m	struct:ubifs_ch	typeref:typename:__u8
grouped	fs/ubifs/ubifs.h	/^	unsigned int grouped:1;$/;"	m	struct:ubifs_jhead	typeref:typename:unsigned int:1
groups	arch/arm/mach-tegra/xusb-padctl-common.h	/^	struct tegra_xusb_padctl_group groups[MAX_GROUPS];$/;"	m	struct:tegra_xusb_padctl_config	typeref:struct:tegra_xusb_padctl_group[]
groups	drivers/pinctrl/meson/pinctrl-meson.h	/^	const char * const *groups;$/;"	m	struct:meson_pmx_func	typeref:typename:const char * const *
groups	drivers/pinctrl/meson/pinctrl-meson.h	/^	struct meson_pmx_group *groups;$/;"	m	struct:meson_pinctrl_data	typeref:struct:meson_pmx_group *
groups	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	const struct uniphier_pinctrl_group *groups;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:const struct uniphier_pinctrl_group *
groups_count	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	int groups_count;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:int
grp	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 grp:16;	\/* pin group PMUX_MIPIPADCTRLGRP_x   *\/$/;"	m	struct:pmux_mipipadctrlgrp_config	typeref:typename:u32:16
grp	arch/arm/mach-tegra/tegra20/funcmux.c	/^			enum pmux_pingrp grp[] = {PMUX_PINGRP_KBCA,$/;"	g	function:funcmux_select	file:
grp	drivers/net/phy/micrel.c	/^	const struct ksz90x1_reg_field	*grp;$/;"	m	struct:ksz90x1_ofcfg	typeref:typename:const struct ksz90x1_reg_field *	file:
grp_addds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_addds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_addds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_addds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_addds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_addds;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_addds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_addds;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_addds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_addds;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_b0ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b0ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b0ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b0ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b0ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b0ds;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_b0ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b0ds;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_b0ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b0ds;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_b1ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b1ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b1ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b1ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b1ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b1ds;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_b1ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b1ds;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_b1ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b1ds;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_b2ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b2ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b2ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b2ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b2ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b2ds;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_b2ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b2ds;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_b3ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b3ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b3ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b3ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b3ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b3ds;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_b3ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b3ds;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_b4ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b4ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b4ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b4ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b5ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b5ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b5ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b5ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b6ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b6ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b6ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b6ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_b7ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b7ds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_b7ds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_b7ds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_ctlds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ctlds;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_ctlds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ctlds;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_ctlds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ctlds;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ctlds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ctlds;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ctlds	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ctlds;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_ddr_type	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddr_type;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_ddr_type	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddr_type;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_ddr_type	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddr_type;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ddr_type	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddr_type;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ddr_type	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddr_type;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_ddrhys	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrhys;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ddrhys	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrhys;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ddrhys	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrhys;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_ddrmode	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_ddrmode	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_ddrmode	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ddrmode	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ddrmode	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_ddrmode_ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode_ctl;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_ddrmode_ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode_ctl;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_ddrmode_ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode_ctl;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ddrmode_ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode_ctl;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ddrmode_ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrmode_ctl;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_ddrpk	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpk;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ddrpk	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpk;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ddrpk	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpk;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_ddrpke	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpke;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
grp_ddrpke	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpke;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
grp_ddrpke	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpke;$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32
grp_ddrpke	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpke;$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32
grp_ddrpke	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 grp_ddrpke;$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32
grp_iomux_q	board/compulab/cm_fx6/spl.c	/^static struct mx6dq_iomux_grp_regs grp_iomux_q = { CM_FX6_GPR_IOMUX_CFG };$/;"	v	typeref:struct:mx6dq_iomux_grp_regs	file:
grp_iomux_s	board/compulab/cm_fx6/spl.c	/^static struct mx6sdl_iomux_grp_regs grp_iomux_s = { CM_FX6_GPR_IOMUX_CFG };$/;"	v	typeref:struct:mx6sdl_iomux_grp_regs	file:
grph2_buffer_cntl	drivers/video/ati_radeon_fb.h	/^	u32		grph2_buffer_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
grph_buffer_cntl	drivers/video/ati_radeon_fb.h	/^	u32		grph_buffer_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
grpsz	drivers/net/phy/micrel.c	/^	const u16			grpsz;$/;"	m	struct:ksz90x1_ofcfg	typeref:typename:const u16	file:
grstctl	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 grstctl; \/* Core Reset *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
grstctl	drivers/usb/host/dwc2.h	/^	u32			grstctl;	\/* 0x010 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
grusb_irq	arch/sparc/cpu/leon3/usb_uhci.c	/^static int grusb_irq = -1;	\/* irq vector, if -1 uhci is stopped \/ reseted *\/$/;"	v	typeref:typename:int	file:
grusb_show_regs	arch/sparc/cpu/leon3/usb_uhci.c	/^void grusb_show_regs(void)$/;"	f	typeref:typename:void
grxfsiz	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 grxfsiz; \/* Receive FIFO Size *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
grxfsiz	drivers/usb/host/dwc2.h	/^	u32			grxfsiz;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
grxstsp	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 grxstsp; \/* Receive Status Debug Pop\/Status Pop *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
grxstsp	drivers/usb/host/dwc2.h	/^	u32			grxstsp;	\/* 0x020 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
grxstsr	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 grxstsr; \/* Receive Status Debug Read\/Status Read *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
grxstsr	drivers/usb/host/dwc2.h	/^	u32			grxstsr;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gs	drivers/bios_emulator/include/biosemu.h	/^	u16 gs;$/;"	m	struct:__anon964d10140808	typeref:typename:u16
gsc_boot_wd_disable	board/gateworks/gw_ventana/gsc.c	/^int gsc_boot_wd_disable(void)$/;"	f	typeref:typename:int
gsc_i2c_read	board/gateworks/gw_ventana/gsc.c	/^int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)$/;"	f	typeref:typename:int
gsc_i2c_write	board/gateworks/gw_ventana/gsc.c	/^int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)$/;"	f	typeref:typename:int
gsc_info	board/gateworks/gw_ventana/gsc.c	/^int gsc_info(int verbose)$/;"	f	typeref:typename:int
gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gscl_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gscl_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gscl_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
gscl_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	gscl_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
gsclblk_cfg0	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	gsclblk_cfg0;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
gsclblk_cfg1	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	gsclblk_cfg1;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
gscr	arch/m68k/include/asm/immap_5445x.h	/^	u32 gscr;		\/* 0x60 Global Status \/ Control Register *\/$/;"	m	struct:pci	typeref:typename:u32
gscr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 gscr;		\/* 0x60 Global Status \/ Control *\/$/;"	m	struct:pci	typeref:typename:u32
gscr	drivers/block/sata_dwc.h	/^		u32		gscr[SATA_PMP_GSCR_DWORDS];$/;"	m	union:ata_device::__anone5f66849030a	typeref:typename:u32[]
gsdr	drivers/gpio/mvgpio.h	/^	u32 gsdr;	\/* Bitwise Set of GPIO Direction Register - 0x0054 *\/$/;"	m	struct:gpio_reg	typeref:typename:u32
gsensor_int	arch/arm/dts/rk3288-popmetal.dtsi	/^		gsensor_int: gsensor-int {$/;"	l
gserial_config_desc	drivers/serial/usbtty.c	/^struct gserial_config_desc {$/;"	s	file:
gserial_configuration_descriptors	drivers/serial/usbtty.c	/^gserial_configuration_descriptors[NUM_CONFIGS] ={$/;"	v	typeref:struct:gserial_config_desc[]	file:
gsfer	drivers/gpio/mvgpio.h	/^	u32 gsfer;	\/* Bitwise Set of Falling-Edge Detect Enable$/;"	m	struct:gpio_reg	typeref:typename:u32
gsi_base	arch/x86/include/asm/acpi_table.h	/^	u32 gsi_base;		\/* Global system interrupt base *\/$/;"	m	struct:acpi_madt_ioapic	typeref:typename:u32
gsirq	arch/x86/include/asm/acpi_table.h	/^	u32 gsirq;		\/* Global system interrupt *\/$/;"	m	struct:acpi_madt_irqoverride	typeref:typename:u32
gsl1680	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	gsl1680: touchscreen@40 {$/;"	l
gsmrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gsmrh;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u32
gsmrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gsmrl;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u32
gsnpsid	drivers/usb/host/dwc2.h	/^	u32			gsnpsid;	\/* 0x040 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u32	gsr;$/;"	m	struct:ccsr_clk_cluster_group::__anon245f08ff0308	typeref:typename:u32
gsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 gsr[3];		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32[3]
gsr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 gsr[3];          \/* DATX8 general status register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[3]
gsr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 gsr[3];		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32[3]
gsr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 gsr[3];          \/* DATX8 general status register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[3]
gsr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	gsr;		\/* DMA general status register (DMA3 ONLY!) *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
gsr	arch/powerpc/include/asm/immap_512x.h	/^	u32 gsr;$/;"	m	struct:pcictrl512x	typeref:typename:u32
gsr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 gsr;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
gsrer	drivers/gpio/mvgpio.h	/^	u32 gsrer;	\/* Bitwise Set of Rising-Edge Detect Enable$/;"	m	struct:gpio_reg	typeref:typename:u32
gstatus0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gstatus0;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gstatus1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gstatus1;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gstatus2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gstatus2;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gstatus3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gstatus3;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gstatus4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	gstatus4;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
gstr	scripts/kconfig/lkc.h	/^struct gstr {$/;"	s
gt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t gt;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
gt64120_pci_controller	drivers/pci/pci_gt64120.c	/^struct gt64120_pci_controller {$/;"	s	file:
gt64120_pci_init	drivers/pci/pci_gt64120.c	/^void gt64120_pci_init(void *regs, unsigned long sys_bus, unsigned long sys_phys,$/;"	f	typeref:typename:void
gt64120_regs	drivers/pci/pci_gt64120.c	/^struct gt64120_regs {$/;"	s	file:
gt911	arch/arm/dts/sun7i-a20-wexler-tab7200.dts	/^	gt911: touchscreen@5d {$/;"	l
gt911_int_primo81	arch/arm/dts/sun6i-a31s-primo81.dts	/^	gt911_int_primo81: gt911_int_pin@0 {$/;"	l
gt_clk	arch/arm/dts/sun9i-a80.dtsi	/^		gt_clk: clk@0600005c {$/;"	l
gt_config_access	drivers/pci/pci_gt64120.c	/^static int gt_config_access(struct gt64120_pci_controller *gt,$/;"	f	typeref:typename:int	file:
gt_ifm_sensor_type	board/ifm/o2dnt2/o2dnt2.c	/^static enum ifm_sensor_type gt_ifm_sensor_type;$/;"	v	typeref:enum:ifm_sensor_type	file:
gt_powermeter	drivers/video/ivybridge_igd.c	/^struct gt_powermeter {$/;"	s	file:
gt_read_config_dword	drivers/pci/pci_gt64120.c	/^static int gt_read_config_dword(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int	file:
gt_write_config_dword	drivers/pci/pci_gt64120.c	/^static int gt_write_config_dword(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int	file:
gtbcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtbcr0;		\/* Global Timer Base Count 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtbcr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtbcr0;		\/* 0x41110 - Global Timer Base Count Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtbcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtbcr1;		\/* Global Timer Base Count 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtbcr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtbcr1;		\/* 0x41150 - Global Timer Base Count Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtbcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtbcr2;		\/* Global Timer Base Count 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtbcr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtbcr2;		\/* 0x41190 - Global Timer Base Count Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtbcr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtbcr3;		\/* Global Timer Base Count 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtbcr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtbcr3;		\/* 0x411d0 - Global Timer Base Count Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtbus_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 gtbus_cfg;		\/* 0x5c gtbus clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gtbus_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 gtbus_cfg;		\/* 0x5c gtbus clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
gtbus_init	arch/arm/mach-sunxi/clock.c	/^__weak void gtbus_init(void)$/;"	f	typeref:typename:__weak void
gtbus_init	arch/arm/mach-sunxi/gtbus_sun9i.c	/^void gtbus_init(void)$/;"	f	typeref:typename:void
gtccr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtccr0;		\/* Global Timer Current Count 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtccr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtccr0;		\/* 0x41100 - Global Timer Current Count Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtccr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtccr1;		\/* Global Timer Current Count 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtccr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtccr1;		\/* 0x41140 - Global Timer Current Count Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtccr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtccr2;		\/* Global Timer Current Count 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtccr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtccr2;		\/* 0x41180 - Global Timer Current Count Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtccr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtccr3;		\/* Global Timer Current Count 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtccr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtccr3;		\/* 0x411c0 - Global Timer Current Count Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtcfr1	include/linux/immap_qe.h	/^	u8 gtcfr1;		\/* Timer 1 2 global configuration register *\/$/;"	m	struct:qe_timers	typeref:typename:u8
gtcfr2	include/linux/immap_qe.h	/^	u8 gtcfr2;		\/* Timer 3 4 global configuration register *\/$/;"	m	struct:qe_timers	typeref:typename:u8
gtcnr1	include/linux/immap_qe.h	/^	u16 gtcnr1;		\/* Timer 1 counter *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcnr2	include/linux/immap_qe.h	/^	u16 gtcnr2;		\/* Timer 2 counter *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcnr3	include/linux/immap_qe.h	/^	u16 gtcnr3;		\/* Timer 3 counter *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcnr4	include/linux/immap_qe.h	/^	u16 gtcnr4;		\/* Timer 4 counter *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcpr1	include/linux/immap_qe.h	/^	u16 gtcpr1;		\/* Timer 1 capture register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcpr2	include/linux/immap_qe.h	/^	u16 gtcpr2;		\/* Timer 2 capture register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcpr3	include/linux/immap_qe.h	/^	u16 gtcpr3;		\/* Timer 3 capture register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtcpr4	include/linux/immap_qe.h	/^	u16 gtcpr4;		\/* Timer 4 capture register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtd	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^td_t gtd[NUM_TD+1];$/;"	v	typeref:typename:td_t[]
gtd	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^td_t gtd[NUM_TD+1];$/;"	v	typeref:typename:td_t[]
gtd	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^td_t gtd[NUM_TD + 1];$/;"	v	typeref:typename:td_t[]
gtd	drivers/usb/host/ohci-s3c24xx.h	/^struct td gtd[NUM_TD + 1];$/;"	v	typeref:struct:td[]
gtdr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtdr0;		\/* Global Timer Destination 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtdr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtdr0;		\/* 0x41130 - Global Timer Destination Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtdr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtdr1;		\/* Global Timer Destination 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtdr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtdr1;		\/* 0x41170 - Global Timer Destination Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtdr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtdr2;		\/* Global Timer Destination 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtdr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtdr2;		\/* 0x411b0 - Global Timer Destination Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtdr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtdr3;		\/* Global Timer Destination 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtdr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtdr3;		\/* 0x411f0 - Global Timer Destination Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtevr1	include/linux/immap_qe.h	/^	u16 gtevr1;		\/* Timer 1 event register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtevr2	include/linux/immap_qe.h	/^	u16 gtevr2;		\/* Timer 2 event register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtevr3	include/linux/immap_qe.h	/^	u16 gtevr3;		\/* Timer 3 event register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtevr4	include/linux/immap_qe.h	/^	u16 gtevr4;		\/* Timer 4 event register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtf	include/linux/fb.h	/^	__u16 gtf	: 1;		\/* supports GTF *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16:1
gtf_cache	drivers/block/sata_dwc.h	/^	union acpi_object	*gtf_cache;$/;"	m	struct:ata_device	typeref:union:acpi_object *
gtf_data	include/edid.h	/^			unsigned char gtf_data[8];$/;"	m	struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208	typeref:typename:unsigned char[8]
gtktree_iter_find_node	scripts/kconfig/gconf.c	/^GtkTreeIter *gtktree_iter_find_node(GtkTreeIter * parent,$/;"	f	typeref:typename:GtkTreeIter *
gtm	arch/powerpc/include/asm/immap_83xx.h	/^	gtm83xx_t		gtm[2];		\/* Global Timers Module *\/$/;"	m	struct:immap	typeref:typename:gtm83xx_t[2]
gtm83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct gtm83xx {$/;"	s
gtm83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} gtm83xx_t;$/;"	t	typeref:struct:gtm83xx
gtmdr1	include/linux/immap_qe.h	/^	u16 gtmdr1;		\/* Timer 1 mode register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtmdr2	include/linux/immap_qe.h	/^	u16 gtmdr2;		\/* Timer 2 mode register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtmdr3	include/linux/immap_qe.h	/^	u16 gtmdr3;		\/* Timer 3 mode register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtmdr4	include/linux/immap_qe.h	/^	u16 gtmdr4;		\/* Timer 4 mode register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtpr	drivers/serial/serial_stm32.c	/^	u32 gtpr;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
gtpr	drivers/serial/serial_stm32x7.h	/^	u32 gtpr;$/;"	m	struct:stm32_usart	typeref:typename:u32
gtps	include/linux/immap_qe.h	/^	u16 gtps;		\/* Timer 1 prescale register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 gtr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32
gtr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 gtr;             \/* DATX8 general timing register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32
gtr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 gtr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32
gtr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 gtr;             \/* DATX8 general timing register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32
gtrfr1	include/linux/immap_qe.h	/^	u16 gtrfr1;		\/* Timer 1 reference register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtrfr2	include/linux/immap_qe.h	/^	u16 gtrfr2;		\/* Timer 2 reference register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtrfr3	include/linux/immap_qe.h	/^	u16 gtrfr3;		\/* Timer 3 reference register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtrfr4	include/linux/immap_qe.h	/^	u16 gtrfr4;		\/* Timer 4 reference register *\/$/;"	m	struct:qe_timers	typeref:typename:u16
gtt_clrsetbits	drivers/video/broadwell_igd.c	/^static inline void gtt_clrsetbits(struct broadwell_igd_priv *priv, u32 reg,$/;"	f	typeref:typename:void	file:
gtt_poll	drivers/video/broadwell_igd.c	/^static int gtt_poll(struct broadwell_igd_priv *priv, u32 reg, u32 mask,$/;"	f	typeref:typename:int	file:
gtt_poll	drivers/video/ivybridge_igd.c	/^static int gtt_poll(void *bar, u32 reg, u32 mask, u32 value)$/;"	f	typeref:typename:int	file:
gtt_read	drivers/video/broadwell_igd.c	/^static unsigned long gtt_read(struct broadwell_igd_priv *priv,$/;"	f	typeref:typename:unsigned long	file:
gtt_read	drivers/video/ivybridge_igd.c	/^static inline u32 gtt_read(void *bar, u32 reg)$/;"	f	typeref:typename:u32	file:
gtt_size	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t gtt_size;			\/* Offset 0x0045 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
gtt_write	drivers/video/broadwell_igd.c	/^static void gtt_write(struct broadwell_igd_priv *priv, unsigned long reg,$/;"	f	typeref:typename:void	file:
gtt_write	drivers/video/ivybridge_igd.c	/^static inline void gtt_write(void *bar, u32 reg, u32 data)$/;"	f	typeref:typename:void	file:
gtt_write_powermeter	drivers/video/ivybridge_igd.c	/^static void gtt_write_powermeter(void *bar, const struct gt_powermeter *pm)$/;"	f	typeref:typename:void	file:
gttbar	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t gttbar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
gtvpr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtvpr0;		\/* Global Timer Vector\/Priority 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtvpr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtvpr0;		\/* 0x41120 - Global Timer Vector\/Priority Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtvpr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtvpr1;		\/* Global Timer Vector\/Priority 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtvpr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtvpr1;		\/* 0x41160 - Global Timer Vector\/Priority Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtvpr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtvpr2;		\/* Global Timer Vector\/Priority 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtvpr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtvpr2;		\/* 0x411a0 - Global Timer Vector\/Priority Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
gtvpr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	gtvpr3;		\/* Global Timer Vector\/Priority 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
gtvpr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	gtvpr3;		\/* 0x411e0 - Global Timer Vector\/Priority Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
guaranteed_block_endurance	include/linux/mtd/nand.h	/^	__le16 guaranteed_block_endurance;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
guaranteed_block_endurance	include/linux/mtd/nand.h	/^	__le16 guaranteed_block_endurance;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
guaranteed_good_blocks	include/linux/mtd/nand.h	/^	u8 guaranteed_good_blocks;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
guaranteed_good_blocks	include/linux/mtd/nand.h	/^	u8 guaranteed_good_blocks;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
guaranteed_read	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_read;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guaranteed_read_cont	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_read_cont;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guaranteed_write	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_write;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guaranteed_write_wait0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_write_wait0;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guaranteed_write_wait1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_write_wait1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guaranteed_write_wait2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_write_wait2;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guaranteed_write_wait3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	guaranteed_write_wait3;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
guemr	include/linux/immap_qe.h	/^	u8 guemr;		\/* UCC general extended mode register *\/$/;"	m	struct:ucc_fast	typeref:typename:u8
guemr	include/linux/immap_qe.h	/^	u8 guemr;		\/* UCC general extended mode register *\/$/;"	m	struct:ucc_slow	typeref:typename:u8
guemr	include/linux/immap_qe.h	/^	u8 guemr;$/;"	m	struct:ucc_common	typeref:typename:u8
guid	drivers/usb/host/dwc2.h	/^	u32			guid;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
guid	include/efi_api.h	/^	efi_guid_t guid;$/;"	m	struct:efi_configuration_table	typeref:typename:efi_guid_t
guid	include/efi_loader.h	/^	const efi_guid_t *guid;$/;"	m	struct:efi_class_map	typeref:typename:const efi_guid_t *
guid	include/efi_loader.h	/^	const efi_guid_t *guid;$/;"	m	struct:efi_handler	typeref:typename:const efi_guid_t *
guid	lib/uuid.c	/^	efi_guid_t guid;$/;"	m	struct:__anon5dbe20330108	typeref:typename:efi_guid_t	file:
guidcmp	lib/efi_loader/efi_boottime.c	/^static int guidcmp(const efi_guid_t *g1, const efi_guid_t *g2)$/;"	f	typeref:typename:int	file:
gumr	include/linux/immap_qe.h	/^	u32 gumr;		\/* UCCx general mode register *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
gumr_h	include/linux/immap_qe.h	/^	u32 gumr_h;		\/* UCCx general mode register (high) *\/$/;"	m	struct:ucc_slow	typeref:typename:u32
gumr_l	include/linux/immap_qe.h	/^	u32 gumr_l;		\/* UCCx general mode register (low) *\/$/;"	m	struct:ucc_slow	typeref:typename:u32
gunzip	lib/gunzip.c	/^int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)$/;"	f	typeref:typename:int
gunzip_bmp	cmd/bmp.c	/^struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,$/;"	f	typeref:struct:bmp_image *
gur_in32	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define gur_in32(/;"	d
gur_in32	board/freescale/common/fsl_chain_of_trust.c	/^#define gur_in32(/;"	d	file:
gur_out32	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define gur_out32(/;"	d
gurnard_enable_console	board/bluewater/gurnard/gurnard.c	/^static void gurnard_enable_console(int enable)$/;"	f	typeref:typename:void	file:
gurnard_macb_hw_init	board/bluewater/gurnard/gurnard.c	/^static void gurnard_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
gurnard_nand_hw_init	board/bluewater/gurnard/gurnard.c	/^static int gurnard_nand_hw_init(void)$/;"	f	typeref:typename:int	file:
gurnard_usb_init	board/bluewater/gurnard/gurnard.c	/^void gurnard_usb_init(void)$/;"	f	typeref:typename:void
gusbcfg	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 gusbcfg; \/* Core USB Configuration *\/$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u32
gusbcfg	drivers/usb/host/dwc2.h	/^	u32			gusbcfg;$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
gw51xx_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw51xx_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw51xx_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw52xx_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw52xx_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw52xx_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw53xx_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw53xx_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw53xx_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw54xx_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw54xx_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw54xx_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw551x_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw551x_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw551x_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw551x_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw552x_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw552x_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw552x_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw552x_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw553x_dio	board/gateworks/gw_ventana/common.c	/^struct dio_cfg gw553x_dio[] = {$/;"	v	typeref:struct:dio_cfg[]
gw553x_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw553x_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gw_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gw_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gwcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwcr;		\/* 0x64 Graphic Window Control Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gwdcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwdcr;		\/* 0x68 Graphic Window DMA Control Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gwlut	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 gwlut;	\/* Graphic Window Lookup Table *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
gwlut	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwlut[255];$/;"	m	struct:lcdgw_ctrl	typeref:typename:u32[255]
gwpor	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwpor;		\/* 0x5C Graphic Window Panning Offset Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gwpr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwpr;		\/* 0x60 Graphic Window Position Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gwproto_gpio_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const gwproto_gpio_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
gwsar	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwsar;		\/* 0x50 Graphic Window Start Address Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gwsr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwsr;		\/* 0x54 Graphic Window Size Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gwvpw	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 gwvpw;		\/* 0x58 Graphic Window Virtual Page Width Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
gxbb_mem_map	arch/arm/mach-meson/board.c	/^static struct mm_region gxbb_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
gz_header	include/u-boot/zlib.h	/^} gz_header;$/;"	t	typeref:struct:gz_header_s
gz_header_s	include/u-boot/zlib.h	/^typedef struct gz_header_s {$/;"	s
gz_headerp	include/u-boot/zlib.h	/^typedef gz_header FAR *gz_headerp;$/;"	t	typeref:typename:gz_header FAR *
gzalloc	lib/gunzip.c	/^void *gzalloc(void *x, unsigned items, unsigned size)$/;"	f	typeref:typename:void *
gzfree	lib/gunzip.c	/^void gzfree(void *x, void *addr, unsigned nb)$/;"	f	typeref:typename:void
gzhead	lib/zlib/deflate.h	/^    gz_headerp  gzhead;  \/* gzip header information to write *\/$/;"	m	struct:internal_state	typeref:typename:gz_headerp
gzindex	lib/zlib/deflate.h	/^    uInt   gzindex;      \/* where in extra, name, or comment *\/$/;"	m	struct:internal_state	typeref:typename:uInt
gzip	lib/gzip.c	/^int gzip(void *dst, unsigned long *lenp,$/;"	f	typeref:typename:int
gzip_decompress	fs/ubifs/ubifs.c	/^static int gzip_decompress(const unsigned char *in, size_t in_len,$/;"	f	typeref:typename:int	file:
gzwrite	lib/gunzip.c	/^int gzwrite(unsigned char *src, int len,$/;"	f	typeref:typename:int
gzwrite_progress	lib/gunzip.c	/^void gzwrite_progress(int iteration,$/;"	f	typeref:typename:__weak void
gzwrite_progress_finish	lib/gunzip.c	/^void gzwrite_progress_finish(int returnval,$/;"	f	typeref:typename:__weak void
gzwrite_progress_init	lib/gunzip.c	/^void gzwrite_progress_init(u64 expectedsize)$/;"	f	typeref:typename:__weak void
h	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 h;$/;"	m	struct:rk3288_grf_gpio_lh	typeref:typename:u32
h	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	h;		\/* Height of source window *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
h	arch/powerpc/include/asm/mmu.h	/^	unsigned long h:1;$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
h	arch/x86/include/asm/msr.h	/^			u32 h;$/;"	m	struct:msr::__anonc18a15d2010a::__anonc18a15d20208	typeref:typename:u32
h	drivers/bios_emulator/include/biosemu.h	/^	RMBYTEREGS h;$/;"	m	union:__anon964d1014070a	typeref:typename:RMBYTEREGS
h	drivers/qe/uec.h	/^	u16  h;       \/* address (MSB) *\/$/;"	m	struct:uec_82xx_enet_address	typeref:typename:u16
h	drivers/video/stb_truetype.h	/^   int id,w,h,was_packed;$/;"	m	struct:stbrp_rect	typeref:typename:int
h	drivers/video/stb_truetype.h	/^   int w,h,stride;$/;"	m	struct:__anonce392f790708	typeref:typename:int
h21	arch/arm/include/asm/omap_common.h	/^	s8 h21;$/;"	m	struct:dpll_params	typeref:typename:s8
h22	arch/arm/include/asm/omap_common.h	/^	s8 h22;$/;"	m	struct:dpll_params	typeref:typename:s8
h23	arch/arm/include/asm/omap_common.h	/^	s8 h23;$/;"	m	struct:dpll_params	typeref:typename:s8
h24	arch/arm/include/asm/omap_common.h	/^	s8 h24;$/;"	m	struct:dpll_params	typeref:typename:s8
h264_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 h264_freq;		\/* offset 0x10 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
h2f_user0_clk	arch/arm/dts/socfpga.dtsi	/^					h2f_user0_clk: h2f_user0_clk {$/;"	l
h2f_user1_clk	arch/arm/dts/socfpga.dtsi	/^					h2f_user1_clk: h2f_user1_clk {$/;"	l
h2f_usr1_clk	arch/arm/dts/socfpga.dtsi	/^						h2f_usr1_clk: h2f_usr1_clk {$/;"	l	label:periph_pll
h2f_usr2_clk	arch/arm/dts/socfpga.dtsi	/^						h2f_usr2_clk: h2f_usr2_clk {$/;"	l	label:sdram_pll
h2i	board/freescale/common/sys_eeprom.c	/^static inline u8 h2i(char p)$/;"	f	typeref:typename:u8	file:
h2i	board/varisys/common/sys_eeprom.c	/^static inline u8 h2i(char p)$/;"	f	typeref:typename:u8	file:
h32ck	arch/arm/dts/sama5d2.dtsi	/^				h32ck: h32mxck {$/;"	l	label:pmc
h5t04g63afr	board/wandboard/spl.c	/^static struct mx6_ddr3_cfg h5t04g63afr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
h5tq2g63dfr	board/wandboard/spl.c	/^static struct mx6_ddr3_cfg h5tq2g63dfr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
h8300_sci_pins	drivers/serial/serial_sh.h	/^} h8300_sci_pins[] = {$/;"	v	typeref:typename:const struct __anonb38103520108[]
h_addr_reg	drivers/usb/musb-new/musb_host.h	/^	u8			h_addr_reg;	\/* hub address register *\/$/;"	m	struct:musb_qh	typeref:typename:u8
h_b_porch__sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_b_porch__sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_b_porch_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_b_porch_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_b_porch_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_b_porch_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_b_porch_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_b_porch_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_back_porch	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int h_back_porch;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
h_blocktype	fs/ext4/ext4_journal.h	/^	__be32 h_blocktype;$/;"	m	struct:journal_header_t	typeref:typename:__be32
h_cmp_entry	cmd/efi.c	/^static int h_cmp_entry(const void *v1, const void *v2)$/;"	f	typeref:typename:int	file:
h_cmp_offset	tools/proftool.c	/^static int h_cmp_offset(const void *v1, const void *v2)$/;"	f	typeref:typename:int	file:
h_cmp_region	tools/fdtgrep.c	/^static int h_cmp_region(const void *v1, const void *v2)$/;"	f	typeref:typename:int	file:
h_compare_category_name	tools/mkimage.c	/^static int h_compare_category_name(const void *vtype1, const void *vtype2)$/;"	f	typeref:typename:int	file:
h_compare_record	common/bootstage.c	/^static int h_compare_record(const void *r1, const void *r2)$/;"	f	typeref:typename:int	file:
h_f_porch_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_f_porch_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_f_porch_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_f_porch_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_f_porch_sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_f_porch_sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_f_porch_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	h_f_porch_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
h_filter_p	arch/arm/include/asm/arch-tegra/dc.h	/^	uint h_filter_p[WINC_FILTER_COUNT];$/;"	m	struct:dc_winc_reg	typeref:typename:uint[]
h_front_porch	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int h_front_porch;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
h_include	tools/fdtgrep.c	/^static int h_include(void *priv, const void *fdt, int offset, int type,$/;"	f	typeref:typename:int	file:
h_initial_dda	arch/arm/include/asm/arch-tegra/dc.h	/^	uint h_initial_dda;		\/* _WIN_H_INITIAL_DDA_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
h_magic	fs/ext4/ext4_journal.h	/^	__be32 h_magic;$/;"	m	struct:journal_header_t	typeref:typename:__be32
h_oversample	drivers/video/stb_truetype.h	/^   unsigned char h_oversample, v_oversample; \/\/ don't set these, they're used internally$/;"	m	struct:__anonce392f790408	typeref:typename:unsigned char
h_oversample	drivers/video/stb_truetype.h	/^   unsigned int   h_oversample, v_oversample;$/;"	m	struct:stbtt_pack_context	typeref:typename:unsigned int
h_port_reg	drivers/usb/musb-new/musb_host.h	/^	u8			h_port_reg;	\/* hub port register *\/$/;"	m	struct:musb_qh	typeref:typename:u8
h_pulse	arch/arm/include/asm/arch-tegra/dc.h	/^	struct _disp_h_pulse h_pulse[H_PULSE_COUNT];$/;"	m	struct:dc_disp_reg	typeref:struct:_disp_h_pulse[]
h_pulse_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint h_pulse_ctrl;$/;"	m	struct:_disp_h_pulse	typeref:typename:uint
h_pulse_pos	arch/arm/include/asm/arch-tegra/dc.h	/^	uint h_pulse_pos[H_PULSE0_POSITION_COUNT];$/;"	m	struct:_disp_h_pulse	typeref:typename:uint[]
h_reg	board/gdsys/p1022/controlcenterd-id.c	/^struct h_reg {$/;"	s	file:
h_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 filler0, filler1, h_reg, l_reg;$/;"	m	struct:__anon39451e6d0308	typeref:typename:u8
h_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 l_reg, h_reg;$/;"	m	struct:__anon39451e6d0608	typeref:typename:u8
h_res	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int h_res;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
h_sequence	fs/ext4/ext4_journal.h	/^	__be32 h_sequence;$/;"	m	struct:journal_header_t	typeref:typename:__be32
h_spl_load_read	common/spl/spl_mmc.c	/^static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,$/;"	f	typeref:typename:ulong	file:
h_sync_polarity	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int h_sync_polarity;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
h_sync_width	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int h_sync_width;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
h_total	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int h_total;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
ha_remap	drivers/net/mvgbe.h	/^	u32 ha_remap[4];$/;"	m	struct:mvgbe_registers	typeref:typename:u32[4]
hab0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 hab0;$/;"	m	struct:src	typeref:typename:u32
hab1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 hab1;$/;"	m	struct:src	typeref:typename:u32
hab2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 hab2;$/;"	m	struct:src	typeref:typename:u32
hab3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 hab3;$/;"	m	struct:src	typeref:typename:u32
hab4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 hab4;$/;"	m	struct:src	typeref:typename:u32
hab5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 hab5;$/;"	m	struct:src	typeref:typename:u32
hab_caam_clock_enable	arch/arm/cpu/armv7/mx6/clock.c	/^void hab_caam_clock_enable(unsigned char enable)$/;"	f	typeref:typename:void
hab_caam_clock_enable	arch/arm/cpu/armv7/mx7/clock.c	/^void hab_caam_clock_enable(unsigned char enable)$/;"	f	typeref:typename:void
hab_config	arch/arm/include/asm/imx-common/hab.h	/^enum hab_config {$/;"	g
hab_context	arch/arm/include/asm/imx-common/hab.h	/^enum hab_context {$/;"	g
hab_contexts	arch/arm/imx-common/hab.c	/^uint8_t hab_contexts[12] = {$/;"	v	typeref:typename:uint8_t[12]
hab_engines	arch/arm/imx-common/hab.c	/^uint8_t hab_engines[16] = {$/;"	v	typeref:typename:uint8_t[16]
hab_loader_callback_f_t	arch/arm/include/asm/imx-common/hab.h	/^typedef enum hab_status hab_loader_callback_f_t(void**, size_t*, const void*);$/;"	t	typeref:enum:hab_status ()(void **,size_t *,const void *)
hab_reason	arch/arm/include/asm/imx-common/hab.h	/^enum hab_reason {$/;"	g
hab_reasons	arch/arm/imx-common/hab.c	/^uint8_t hab_reasons[26] = {$/;"	v	typeref:typename:uint8_t[26]
hab_rvt_authenticate_image_p	arch/arm/imx-common/hab.c	/^#define hab_rvt_authenticate_image_p	/;"	d	file:
hab_rvt_authenticate_image_t	arch/arm/include/asm/imx-common/hab.h	/^typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,$/;"	t	typeref:typename:void * ()(uint8_t,ptrdiff_t,void **,size_t *,hab_loader_callback_f_t)
hab_rvt_entry_p	arch/arm/imx-common/hab.c	/^#define hab_rvt_entry_p	/;"	d	file:
hab_rvt_entry_t	arch/arm/include/asm/imx-common/hab.h	/^typedef enum hab_status hab_rvt_entry_t(void);$/;"	t	typeref:enum:hab_status ()(void)
hab_rvt_exit_p	arch/arm/imx-common/hab.c	/^#define hab_rvt_exit_p	/;"	d	file:
hab_rvt_exit_t	arch/arm/include/asm/imx-common/hab.h	/^typedef enum hab_status hab_rvt_exit_t(void);$/;"	t	typeref:enum:hab_status ()(void)
hab_rvt_report_event_p	arch/arm/imx-common/hab.c	/^#define hab_rvt_report_event_p	/;"	d	file:
hab_rvt_report_event_t	arch/arm/include/asm/imx-common/hab.h	/^typedef enum hab_status hab_rvt_report_event_t(enum hab_status, uint32_t,$/;"	t	typeref:enum:hab_status ()(enum hab_status,uint32_t,uint8_t *,size_t *)
hab_rvt_report_status_p	arch/arm/imx-common/hab.c	/^#define hab_rvt_report_status_p	/;"	d	file:
hab_rvt_report_status_t	arch/arm/include/asm/imx-common/hab.h	/^typedef enum hab_status hab_rvt_report_status_t(enum hab_config *,$/;"	t	typeref:enum:hab_status ()(enum hab_config *,enum hab_state *)
hab_state	arch/arm/include/asm/imx-common/hab.h	/^enum hab_state {$/;"	g
hab_status	arch/arm/include/asm/imx-common/hab.h	/^enum hab_status {$/;"	g
hab_statuses	arch/arm/imx-common/hab.c	/^uint8_t hab_statuses[5] = {$/;"	v	typeref:typename:uint8_t[5]
hackberry_hogs	arch/arm/dts/sun4i-a10-hackberry.dts	/^	hackberry_hogs: hogs@0 {$/;"	l
hactive	drivers/video/am335x-fb.h	/^	unsigned int	hactive;	\/* Horizontal active area *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
hactive	include/fdtdec.h	/^	struct timing_entry hactive;		\/* hor. active video *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
had_ctrlc	common/console.c	/^int had_ctrlc (void)$/;"	f	typeref:typename:int
had_tx_nak	arch/powerpc/cpu/mpc8xx/i2c.c	/^static int had_tx_nak;$/;"	v	typeref:typename:int	file:
haddr1	include/commproc.h	/^	ushort	haddr1;		\/* user defined frm address 1 *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
haddr2	include/commproc.h	/^	ushort	haddr2;		\/* user defined frm address 2 *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
haddr3	include/commproc.h	/^	ushort	haddr3;		\/* user defined frm address 3 *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
haddr4	include/commproc.h	/^	ushort	haddr4;		\/* user defined frm address 4 *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
hafdup	arch/powerpc/include/asm/immap_85xx.h	/^	u32	hafdup;		\/* Half Duplex *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
hafdup	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hafdup;		\/* 0x2450c - Half Duplex Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
hafdup	include/fsl_dtsec.h	/^	u32	hafdup;		\/* half-duplex control *\/$/;"	m	struct:dtsec	typeref:typename:u32
hafdup	include/linux/immap_qe.h	/^	u32 hafdup;		\/* half-duplex reg.                    *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
hafdup	include/tsec.h	/^	u32	hafdup;		\/* Half-duplex *\/$/;"	m	struct:tsec	typeref:typename:u32
haint	drivers/usb/host/dwc2.h	/^	u32			haint;$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
haintmsk	drivers/usb/host/dwc2.h	/^	u32			haintmsk;$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
half_duplex	drivers/spi/davinci_spi.c	/^	bool half_duplex;  \/* true, if master is half-duplex only *\/$/;"	m	struct:davinci_spi_slave	typeref:typename:bool	file:
half_leb_size	fs/ubifs/ubifs.h	/^	int half_leb_size;$/;"	m	struct:ubifs_info	typeref:typename:int
half_strength_driver_enable	include/fsl_ddr_sdram.h	/^	unsigned int half_strength_driver_enable;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
halt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t halt;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
halt	include/net.h	/^	void (*halt)(struct eth_device *);$/;"	m	struct:eth_device	typeref:typename:void (*)(struct eth_device *)
halt	post/cpu/mpc8xx/ether.c	/^	void (*halt) (int index);$/;"	m	struct:__anon27059ff10108	typeref:typename:void (*)(int index)	file:
halt	post/cpu/mpc8xx/uart.c	/^	void (*halt) (int index);$/;"	m	struct:__anon0de951550108	typeref:typename:void (*)(int index)	file:
halt_avp	arch/arm/mach-tegra/cpu.c	/^void halt_avp(void)$/;"	f	typeref:typename:void
halt_bulk_in_endpoint	drivers/usb/gadget/f_mass_storage.c	/^static int halt_bulk_in_endpoint(struct fsg_dev *fsg)$/;"	f	typeref:typename:int	file:
halt_cop1_csr	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cop1_csr;	\/* offset 0x34 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop1_csr	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cop1_csr;	\/* offset 0x34 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop1_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cop1_events;	\/* offset 0x30 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop1_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cop1_events;	\/* offset 0x30 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop_events	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 halt_cop_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cop_events;	\/* offset 0x04 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop_events	arch/arm/include/asm/arch-tegra20/flow.h	/^	u32	halt_cop_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cop_events;	\/* offset 0x04 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cop_events	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 halt_cop_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu1_events	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 halt_cpu1_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu1_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cpu1_events;	\/* offset 0x14 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu1_events	arch/arm/include/asm/arch-tegra20/flow.h	/^	u32	halt_cpu1_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu1_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cpu1_events;	\/* offset 0x14 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu1_events	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 halt_cpu1_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu2_events	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 halt_cpu2_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu2_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cpu2_events;	\/* offset 0x1c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu2_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cpu2_events;	\/* offset 0x1c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu2_events	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 halt_cpu2_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu3_events	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 halt_cpu3_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu3_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cpu3_events;	\/* offset 0x24 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu3_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cpu3_events;	\/* offset 0x24 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu3_events	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 halt_cpu3_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu_events	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 halt_cpu_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 halt_cpu_events;	\/* offset 0x00 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu_events	arch/arm/include/asm/arch-tegra20/flow.h	/^	u32	halt_cpu_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 halt_cpu_events;	\/* offset 0x00 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_cpu_events	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 halt_cpu_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
halt_req_mask	arch/powerpc/include/asm/immap_85xx.h	/^	u32	halt_req_mask;$/;"	m	struct:ccsr_gur	typeref:typename:u32
halted	include/usb.h	/^	unsigned int halted[2];$/;"	m	struct:usb_device	typeref:typename:unsigned int[2]
halten_pin	board/davinci/ea20/ea20.c	/^const struct pinmux_config halten_pin[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
handle	include/efi_loader.h	/^	void *handle;$/;"	m	struct:efi_object	typeref:typename:void *
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_header	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type0	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type1	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type127	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type2	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type3	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type32	typeref:typename:u16
handle	include/smbios.h	/^	u16 handle;$/;"	m	struct:smbios_type4	typeref:typename:u16
handle	lib/bzip2/bzlib.c	/^      FILE*     handle;$/;"	m	struct:__anonb9ba2b050108	typeref:typename:FILE *	file:
handle	lib/tpm.c	/^	uint32_t	handle;$/;"	m	struct:session_data	typeref:typename:uint32_t	file:
handleCount	fs/yaffs2/yaffsfs.c	/^	int handleCount:10;	\/* Number of handles for this fd *\/$/;"	m	struct:yaffsfs_FileDes	typeref:typename:int:10	file:
handle_bc	common/bedbug.c	/^int handle_bc (struct ppc_ctx *ctx)$/;"	f	typeref:typename:int
handle_compress	lib/bzip2/bzlib.c	/^Bool handle_compress ( bz_stream* strm )$/;"	f	typeref:typename:Bool	file:
handle_data_pio	drivers/mtd/nand/pxa3xx_nand.c	/^static void handle_data_pio(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:void	file:
handle_decomp_error	common/bootm.c	/^static int handle_decomp_error(int comp_type, size_t uncomp_size,$/;"	f	typeref:typename:int	file:
handle_dnload	drivers/usb/gadget/f_dfu.c	/^static int handle_dnload(struct usb_gadget *gadget, u16 len)$/;"	f	typeref:typename:int	file:
handle_dollar	common/cli_hush.c	/^static int handle_dollar(o_string *dest, struct p_context *ctx, struct in_str *input)$/;"	f	typeref:typename:int	file:
handle_eeprom_v0	board/corscience/tricorder/tricorder-eeprom.c	/^static int handle_eeprom_v0(struct tricorder_eeprom *eeprom)$/;"	f	typeref:typename:int	file:
handle_eeprom_v1	board/corscience/tricorder/tricorder-eeprom.c	/^static int handle_eeprom_v1(struct tricorder_eeprom *eeprom)$/;"	f	typeref:typename:int	file:
handle_ep	drivers/usb/gadget/at91_udc.c	/^static int handle_ep(struct at91_ep *ep)$/;"	f	typeref:typename:int	file:
handle_ep	drivers/usb/gadget/pxa25x_udc.c	/^static void handle_ep(struct pxa25x_ep *ep)$/;"	f	typeref:typename:void	file:
handle_ep0	drivers/usb/gadget/at91_udc.c	/^static void handle_ep0(struct at91_udc *udc)$/;"	f	typeref:typename:void	file:
handle_ep0	drivers/usb/gadget/pxa25x_udc.c	/^static void handle_ep0(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
handle_ep0_setup	drivers/usb/gadget/atmel_usba_udc.c	/^static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,$/;"	f	typeref:typename:int	file:
handle_ep_complete	drivers/usb/gadget/ci_udc.c	/^static void handle_ep_complete(struct ci_ep *ci_ep)$/;"	f	typeref:typename:void	file:
handle_error	drivers/serial/serial_sh.c	/^static void handle_error(struct uart_port *port)$/;"	f	typeref:typename:void	file:
handle_error	tools/moveconfig.py	/^    def handle_error(self):$/;"	m	class:Slot
handle_exception	common/kgdb.c	/^handle_exception (struct pt_regs *regs)$/;"	f	typeref:typename:int	file:
handle_exception	drivers/usb/gadget/f_mass_storage.c	/^static void handle_exception(struct fsg_common *common)$/;"	f	typeref:typename:void	file:
handle_exit	scripts/kconfig/mconf.c	/^static int handle_exit(void)$/;"	f	typeref:typename:int	file:
handle_f1	scripts/kconfig/nconf.c	/^static void handle_f1(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f2	scripts/kconfig/nconf.c	/^static void handle_f2(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f3	scripts/kconfig/nconf.c	/^static void handle_f3(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f4	scripts/kconfig/nconf.c	/^static void handle_f4(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f5	scripts/kconfig/nconf.c	/^static void handle_f5(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f6	scripts/kconfig/nconf.c	/^static void handle_f6(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f7	scripts/kconfig/nconf.c	/^static void handle_f7(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f8	scripts/kconfig/nconf.c	/^static void handle_f8(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_f9	scripts/kconfig/nconf.c	/^static void handle_f9(int *key, struct menu *current_item)$/;"	f	typeref:typename:void	file:
handle_getstate	drivers/usb/gadget/f_dfu.c	/^static void handle_getstate(struct usb_request *req)$/;"	f	typeref:typename:void	file:
handle_getstatus	drivers/usb/gadget/f_dfu.c	/^static void handle_getstatus(struct usb_request *req)$/;"	f	typeref:typename:void	file:
handle_include	cmd/pxe.c	/^static int handle_include(cmd_tbl_t *cmdtp, char **c, unsigned long base,$/;"	f	typeref:typename:int	file:
handle_isa_int	board/mpl/common/isa.c	/^int handle_isa_int(void)$/;"	f	typeref:typename:int
handle_kbd_event	board/mpl/common/kbd.c	/^unsigned char handle_kbd_event(void)$/;"	f	typeref:typename:unsigned char
handle_kbd_event	drivers/input/pc_keyb.c	/^static unsigned char handle_kbd_event(void)$/;"	f	typeref:typename:unsigned char	file:
handle_keyboard_event	board/mpl/common/kbd.c	/^void handle_keyboard_event (unsigned char scancode)$/;"	f	typeref:typename:void
handle_mac_address	board/compulab/cm_fx6/cm_fx6.c	/^static int handle_mac_address(char *env_var, uint eeprom_bus)$/;"	f	typeref:typename:int	file:
handle_mac_address	board/compulab/cm_t335/cm_t335.c	/^static int handle_mac_address(void)$/;"	f	typeref:typename:int	file:
handle_mac_address	board/compulab/cm_t35/cm_t35.c	/^static int handle_mac_address(void)$/;"	f	typeref:typename:int	file:
handle_mac_address	board/compulab/cm_t54/cm_t54.c	/^static int handle_mac_address(void)$/;"	f	typeref:typename:int	file:
handle_mgcoge3un_reset	board/keymile/km82xx/km82xx.c	/^static void handle_mgcoge3un_reset(void)$/;"	f	typeref:typename:void	file:
handle_option_table	drivers/ddr/fsl/interactive.c	/^static int handle_option_table(const struct options_string *table,$/;"	f	typeref:typename:int	file:
handle_proto3_response	drivers/misc/cros_ec.c	/^static int handle_proto3_response(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int	file:
handle_pxe_menu	cmd/pxe.c	/^static void handle_pxe_menu(cmd_tbl_t *cmdtp, struct pxe_menu *cfg)$/;"	f	typeref:typename:void	file:
handle_read	drivers/usb/emul/sandbox_flash.c	/^static void handle_read(struct sandbox_flash_priv *priv, ulong lba,$/;"	f	typeref:typename:void	file:
handle_scancode	drivers/input/keyboard.c	/^void handle_scancode(unsigned char scan_code)$/;"	f	typeref:typename:void
handle_scsi_int	drivers/block/sym53c8xx.c	/^void handle_scsi_int(void)$/;"	f	typeref:typename:void
handle_send_packet	cmd/load.c	/^static void handle_send_packet(int n)$/;"	f	typeref:typename:void	file:
handle_setup	drivers/usb/gadget/at91_udc.c	/^static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)$/;"	f	typeref:typename:void	file:
handle_setup	drivers/usb/gadget/ci_udc.c	/^static void handle_setup(void)$/;"	f	typeref:typename:void	file:
handle_starttag	tools/buildman/toolchain.py	/^    def handle_starttag(self, tag, attrs):$/;"	m	class:MyHTMLParser
handle_sub_expr	tools/buildman/kconfiglib.py	/^    def handle_sub_expr(expr):$/;"	f	function:_intersperse	file:
handle_ufi_command	drivers/usb/emul/sandbox_flash.c	/^static int handle_ufi_command(struct sandbox_flash_plat *plat,$/;"	f	typeref:typename:int	file:
handle_upload	drivers/usb/gadget/f_dfu.c	/^static int handle_upload(struct usb_request *req, u16 len)$/;"	f	typeref:typename:int	file:
handle_usb_interrupt	arch/sparc/cpu/leon3/usb_uhci.c	/^void handle_usb_interrupt(void)$/;"	f	typeref:typename:void
handle_usb_interrupt	board/mpl/common/usb_uhci.c	/^void handle_usb_interrupt(void)$/;"	f	typeref:typename:void
handlebox1	scripts/kconfig/gconf.glade	/^	<widget class="GtkHandleBox" id="handlebox1">$/;"	i
handler	arch/m68k/lib/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:interrupt_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/microblaze/include/asm/microblaze_intc.h	/^	interrupt_handler_t *handler; \/* pointer to interrupt rutine *\/$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *
handler	arch/nios2/cpu/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/openrisc/cpu/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/mpc512x/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/mpc5xx/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:interrupt_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/mpc8260/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/mpc83xx/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/mpc8xx/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:interrupt_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/cpu/ppc4xx/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/powerpc/include/asm/sigcontext.h	/^	unsigned long	handler;$/;"	m	struct:sigcontext_struct	typeref:typename:unsigned long
handler	arch/sparc/cpu/leon2/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/sparc/cpu/leon3/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	arch/x86/lib/interrupts.c	/^	interrupt_handler_t *handler;$/;"	m	struct:irq_action	typeref:typename:interrupt_handler_t *	file:
handler	board/mpl/common/isa.c	/^	 interrupt_handler_t *handler;$/;"	m	struct:isa_irq_action	typeref:typename:interrupt_handler_t *	file:
handler	scripts/kconfig/nconf.c	/^	function_key_handler_t handler;$/;"	m	struct:function_keys	typeref:typename:function_key_handler_t	file:
handler_irq	arch/sparc/cpu/leon2/interrupts.c	/^void handler_irq(int irq, struct pt_regs *regs)$/;"	f	typeref:typename:void
handler_irq	arch/sparc/cpu/leon3/interrupts.c	/^void handler_irq(int irq, struct pt_regs *regs)$/;"	f	typeref:typename:void
handler_t	arch/xtensa/cpu/exceptions.c	/^typedef void (*handler_t)(struct pt_regs *);$/;"	t	typeref:typename:void (*)(struct pt_regs *)	file:
handlers	arch/openrisc/cpu/exceptions.c	/^static void (*handlers[32])(void);$/;"	v	typeref:typename:void (* [32])(void)	file:
handlers	arch/openrisc/cpu/interrupts.c	/^static struct irq_action handlers[32];$/;"	v	typeref:struct:irq_action[32]	file:
handover_offset	arch/x86/include/asm/bootparam.h	/^	__u32	handover_offset;$/;"	m	struct:setup_header	typeref:typename:__u32
handshake	drivers/usb/host/ehci-hcd.c	/^static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)$/;"	f	typeref:typename:int	file:
handshake	drivers/usb/host/xhci.c	/^static int handshake(uint32_t volatile *ptr, uint32_t mask,$/;"	f	typeref:typename:int	file:
hang	arch/arm/mach-rockchip/rk3036-board-spl.c	/^void hang(void)$/;"	f	typeref:typename:void
hang	board/armadeus/apf27/apf27.c	/^inline void hang(void)$/;"	f	typeref:typename:void
hang	examples/api/libgenwrap.c	/^void hang (void)$/;"	f	typeref:typename:void
hang	lib/hang.c	/^void hang(void)$/;"	f	typeref:typename:void
hang_bosch	board/bosch/shc/board.c	/^static void hang_bosch(const char *cause, int code)$/;"	f	typeref:typename:void	file:
hapi_clock_init_t	arch/arm/include/asm/imx-common/hab.h	/^typedef void hapi_clock_init_t(void);$/;"	t	typeref:typename:void ()(void)
hard	arch/arm/include/asm/processor.h	/^	struct fp_hard_struct	hard;$/;"	m	union:fp_state	typeref:struct:fp_hard_struct
hard_links	fs/yaffs2/yaffs_guts.h	/^	struct list_head hard_links;	\/* hard linked object chain*\/$/;"	m	struct:yaffs_obj	typeref:struct:list_head
hard_port_no	include/ahci.h	/^	u32	hard_port_no;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
hard_trap_info	arch/powerpc/lib/kgdb.c	/^static struct hard_trap_info$/;"	s	file:
hard_trap_info	arch/powerpc/lib/kgdb.c	/^} hard_trap_info[] = {$/;"	v	typeref:struct:hard_trap_info[]
hardlink_variant	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_hardlink_var hardlink_variant;$/;"	m	union:yaffs_obj_var	typeref:struct:yaffs_hardlink_var
hardware_disable	drivers/pcmcia/ti_pci1410a.c	/^static int hardware_disable(int slot)$/;"	f	typeref:typename:int	file:
hardware_ecc	drivers/mtd/nand/vf610_nfc.c	/^	int hardware_ecc;$/;"	m	struct:vf610_nfc_config	typeref:typename:int	file:
hardware_enable	drivers/pcmcia/ti_pci1410a.c	/^static int hardware_enable(int slot)$/;"	f	typeref:typename:int	file:
hardware_signature	arch/x86/include/asm/acpi_table.h	/^	u32 hardware_signature;		\/* Hardware signature *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
hardware_subarch	arch/x86/include/asm/bootparam.h	/^	__u32	hardware_subarch;$/;"	m	struct:setup_header	typeref:typename:__u32
hardware_subarch_data	arch/x86/include/asm/bootparam.h	/^	__u64	hardware_subarch_data;$/;"	m	struct:setup_header	typeref:typename:__u64
hardware_tripping	drivers/power/exynos-tmu.c	/^	unsigned hardware_tripping;$/;"	m	struct:temperature_params	typeref:typename:unsigned	file:
hardware_version	board/astro/mcf5373l/astro.h	/^	char hardware_version;$/;"	m	struct:card_id	typeref:typename:char
hardwired_esa	drivers/net/ne2000_base.h	/^	bool tx_started, running, hardwired_esa;$/;"	m	struct:dp83902a_priv_data	typeref:typename:bool
hasECC	fs/yaffs2/yaffs_nandif.h	/^	unsigned hasECC;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
has_arg	arch/sandbox/include/asm/getopt.h	/^	int has_arg;$/;"	m	struct:sandbox_cmdline_option	typeref:typename:int
has_been_read	board/freescale/common/sys_eeprom.c	/^static int has_been_read = 0;$/;"	v	typeref:typename:int	file:
has_been_read	board/varisys/common/sys_eeprom.c	/^static int has_been_read;$/;"	v	typeref:typename:int	file:
has_block_checksum	lib/lz4_wrapper.c	/^			u8 has_block_checksum:1;$/;"	m	struct:lz4_frame_header::__anonc9492e16010a::__anonc9492e160208	typeref:typename:u8:1	file:
has_cfr	drivers/usb/gadget/pxa25x_udc.h	/^						has_cfr:1,$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
has_cml_clk	drivers/pci/pci_tegra.c	/^	bool has_cml_clk;$/;"	m	struct:tegra_pcie_soc	typeref:typename:bool	file:
has_content_checksum	lib/lz4_wrapper.c	/^			u8 has_content_checksum:1;$/;"	m	struct:lz4_frame_header::__anonc9492e16010a::__anonc9492e160208	typeref:typename:u8:1	file:
has_content_size	lib/lz4_wrapper.c	/^			u8 has_content_size:1;$/;"	m	struct:lz4_frame_header::__anonc9492e16010a::__anonc9492e160208	typeref:typename:u8:1	file:
has_cpuid	arch/x86/cpu/cpu.c	/^static bool has_cpuid(void)$/;"	f	typeref:typename:bool	file:
has_dual_phy	drivers/usb/common/fsl-errata.c	/^bool has_dual_phy(void)$/;"	f	typeref:typename:bool
has_emac	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^unsigned int has_emac()$/;"	f	typeref:typename:unsigned int
has_emac0	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^unsigned int has_emac0()$/;"	f	typeref:typename:unsigned int
has_emac1	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^unsigned int has_emac1()$/;"	f	typeref:typename:unsigned int
has_erratum_a004477	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a004477(void)$/;"	f	typeref:typename:bool
has_erratum_a005697	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a005697(void)$/;"	f	typeref:typename:bool
has_erratum_a006261	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a006261(void)$/;"	f	typeref:typename:bool
has_erratum_a006379	include/fsl_errata.h	/^static inline bool has_erratum_a006379(void)$/;"	f	typeref:typename:bool
has_erratum_a007075	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a007075(void)$/;"	f	typeref:typename:bool
has_erratum_a007186	include/fsl_errata.h	/^static inline bool has_erratum_a007186(void)$/;"	f	typeref:typename:bool
has_erratum_a007792	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a007792(void)$/;"	f	typeref:typename:bool
has_erratum_a007798	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a007798(void)$/;"	f	typeref:typename:bool
has_erratum_a008378	include/fsl_errata.h	/^static inline bool has_erratum_a008378(void)$/;"	f	typeref:typename:bool
has_erratum_a008751	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a008751(void)$/;"	f	typeref:typename:bool
has_erratum_a010151	drivers/usb/common/fsl-errata.c	/^bool has_erratum_a010151(void)$/;"	f	typeref:typename:bool
has_gen2	drivers/pci/pci_tegra.c	/^	bool has_gen2;$/;"	m	struct:tegra_pcie_soc	typeref:typename:bool	file:
has_ghosting	drivers/input/key_matrix.c	/^static int has_ghosting(struct key_matrix *config, struct key_matrix_key *keys,$/;"	f	typeref:typename:int	file:
has_gmac	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^unsigned int has_gmac()$/;"	f	typeref:typename:unsigned int
has_hibernation	drivers/usb/dwc3/core.h	/^	unsigned		has_hibernation:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
has_hostpc	drivers/usb/host/ehci-tegra.c	/^	u32 has_hostpc:1;$/;"	m	struct:fdt_usb_controller	typeref:typename:u32:1	file:
has_init	include/mmc.h	/^	uint has_init;$/;"	m	struct:mmc	typeref:typename:uint
has_initda	arch/nios2/include/asm/global_data.h	/^	int has_initda;$/;"	m	struct:arch_global_data	typeref:typename:int
has_lcdc	arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c	/^unsigned int has_lcdc()$/;"	f	typeref:typename:unsigned int
has_lcdc	arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c	/^unsigned int has_lcdc()$/;"	f	typeref:typename:unsigned int
has_lcdc	arch/arm/mach-at91/armv7/sama5d3_devices.c	/^unsigned int has_lcdc()$/;"	f	typeref:typename:unsigned int
has_lcdc	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^unsigned int has_lcdc(void)$/;"	f	typeref:typename:unsigned int
has_lcdc	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^unsigned int has_lcdc(void)$/;"	f	typeref:typename:unsigned int
has_lcdc	board/atmel/sama5d4ek/sama5d4ek.c	/^unsigned int has_lcdc(void)$/;"	f	typeref:typename:unsigned int
has_lcdc	board/denx/ma5d4evk/ma5d4evk.c	/^unsigned int has_lcdc(void)$/;"	f	typeref:typename:unsigned int
has_legacy_mode	drivers/usb/host/ehci-tegra.c	/^	unsigned has_legacy_mode:1; \/* 1 if this port has legacy mode *\/$/;"	m	struct:fdt_usb	typeref:typename:unsigned:1	file:
has_long_mode	arch/x86/cpu/cpu.c	/^static bool has_long_mode(void)$/;"	f	typeref:typename:bool	file:
has_lpm_erratum	drivers/usb/dwc3/core.h	/^	unsigned		has_lpm_erratum:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
has_lpm_erratum	include/dwc3-uboot.h	/^	unsigned has_lpm_erratum;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
has_mdio	drivers/net/keystone_net.c	/^	bool				has_mdio;$/;"	m	struct:ks2_eth_priv	typeref:typename:bool	file:
has_mmu	arch/nios2/include/asm/global_data.h	/^	int has_mmu;$/;"	m	struct:arch_global_data	typeref:typename:int
has_mtrr	arch/x86/cpu/cpu.c	/^static bool has_mtrr(void)$/;"	f	typeref:typename:bool	file:
has_mtrr	arch/x86/include/asm/global_data.h	/^	int has_mtrr;$/;"	m	struct:arch_global_data	typeref:typename:int
has_onboard_eth	board/raspberrypi/rpi/rpi.c	/^	bool has_onboard_eth;$/;"	m	struct:rpi_model	typeref:typename:bool	file:
has_pending_prioritised_gc	fs/yaffs2/yaffs_guts.h	/^	unsigned has_pending_prioritised_gc;	\/* We think this device might$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
has_pex_bias_ctrl	drivers/pci/pci_tegra.c	/^	bool has_pex_bias_ctrl;$/;"	m	struct:tegra_pcie_soc	typeref:typename:bool	file:
has_pex_clkreq_en	drivers/pci/pci_tegra.c	/^	bool has_pex_clkreq_en;$/;"	m	struct:tegra_pcie_soc	typeref:typename:bool	file:
has_ranges	tools/buildman/kconfiglib.py	/^    def has_ranges(self):$/;"	m	class:Symbol
has_shrink_hdr	fs/yaffs2/yaffs_guts.h	/^	u32 has_shrink_hdr:1;	\/* This block has at least one shrink header *\/$/;"	m	struct:yaffs_block_info	typeref:typename:u32:1
has_summary	fs/yaffs2/yaffs_guts.h	/^	u32 has_summary:1;	\/* The block has a summary *\/$/;"	m	struct:yaffs_block_info	typeref:typename:u32:1
has_xattr	fs/yaffs2/yaffs_guts.h	/^	u8 has_xattr:1;		\/* This object has xattribs.$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
hash	arch/arm/include/asm/arch-tegra/warmboot.h	/^	struct hash hash;	\/* hash of header+code, starts next field*\/$/;"	m	struct:wb_header	typeref:struct:hash
hash	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 hash[HASH_LENGTH];$/;"	m	struct:hash	typeref:typename:u32[]
hash	arch/arm/include/asm/arch-tegra/warmboot.h	/^struct hash {$/;"	s
hash	drivers/crypto/fsl/fsl_hash.h	/^	u8 hash[HASH_MAX_DIGEST_SIZE];$/;"	m	struct:sha_ctx	typeref:typename:u8[]
hash	fs/ubifs/ubifs.h	/^	unsigned int hash;$/;"	m	struct:qstr	typeref:typename:unsigned int
hash	include/fdtdec.h	/^	const uint8_t *hash;			\/* Hash value *\/$/;"	m	struct:fmap_entry	typeref:typename:const uint8_t *
hash	include/tsec.h	/^	struct tsec_hash_regs	hash;$/;"	m	struct:tsec	typeref:struct:tsec_hash_regs
hash	scripts/basic/fixdep.c	/^	unsigned int	hash;$/;"	m	struct:item	typeref:typename:unsigned int	file:
hash_algo	common/hash.c	/^static struct hash_algo hash_algo[] = {$/;"	v	typeref:struct:hash_algo[]	file:
hash_algo	include/fdtdec.h	/^	enum fmap_hash_t hash_algo;		\/* Hash algorithm *\/$/;"	m	struct:fmap_entry	typeref:enum:fmap_hash_t
hash_algo	include/hash.h	/^struct hash_algo {$/;"	s
hash_bits	lib/zlib/deflate.h	/^    uInt  hash_bits;      \/* log2(hash_size) *\/$/;"	m	struct:internal_state	typeref:typename:uInt
hash_block	common/hash.c	/^int hash_block(const char *algo_name, const void *data, unsigned int len,$/;"	f	typeref:typename:int
hash_byteswap	drivers/crypto/ace_sha.h	/^	unsigned int	hash_byteswap;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_calculate	lib/rsa/rsa-checksum.c	/^int hash_calculate(const char *name,$/;"	f	typeref:typename:int
hash_command	common/hash.c	/^int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int
hash_control	drivers/crypto/ace_sha.h	/^	unsigned int	hash_control;	\/* base + 0x400 *\/$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_control2	drivers/crypto/ace_sha.h	/^	unsigned int	hash_control2;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_digest	include/ec_commands.h	/^	uint8_t hash_digest[64]; \/* Hash digest data *\/$/;"	m	struct:ec_response_vboot_hash	typeref:typename:uint8_t[64]
hash_fifo_mode	drivers/crypto/ace_sha.h	/^	unsigned int	hash_fifo_mode;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_finish	include/hash.h	/^	int (*hash_finish)(struct hash_algo *algo, void *ctx, void *dest_buf,$/;"	m	struct:hash_algo	typeref:typename:int (*)(struct hash_algo * algo,void * ctx,void * dest_buf,int size)
hash_finish_crc32	common/hash.c	/^static int hash_finish_crc32(struct hash_algo *algo, void *ctx, void *dest_buf,$/;"	f	typeref:typename:int	file:
hash_finish_sha1	common/hash.c	/^static int hash_finish_sha1(struct hash_algo *algo, void *ctx, void *dest_buf,$/;"	f	typeref:typename:int	file:
hash_finish_sha256	common/hash.c	/^static int hash_finish_sha256(struct hash_algo *algo, void *ctx, void$/;"	f	typeref:typename:int	file:
hash_func_ws	include/hash.h	/^	void (*hash_func_ws)(const unsigned char *input, unsigned int ilen,$/;"	m	struct:hash_algo	typeref:typename:void (*)(const unsigned char * input,unsigned int ilen,unsigned char * output,unsigned int chunk_sz)
hash_function	drivers/net/armada100_fec.c	/^static u32 hash_function(u32 mach, u32 macl)$/;"	f	typeref:typename:u32	file:
hash_identifier	board/freescale/common/fsl_validate.c	/^static const u8 hash_identifier[] = { 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,$/;"	v	typeref:typename:const u8[]	file:
hash_in	drivers/crypto/ace_sha.h	/^	unsigned int	hash_in[16];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[16]
hash_init	include/hash.h	/^	int (*hash_init)(struct hash_algo *algo, void **ctxp);$/;"	m	struct:hash_algo	typeref:typename:int (*)(struct hash_algo * algo,void ** ctxp)
hash_init_crc32	common/hash.c	/^static int hash_init_crc32(struct hash_algo *algo, void **ctxp)$/;"	f	typeref:typename:int	file:
hash_init_sha1	common/hash.c	/^static int hash_init_sha1(struct hash_algo *algo, void **ctxp)$/;"	f	typeref:typename:int	file:
hash_init_sha256	common/hash.c	/^static int hash_init_sha256(struct hash_algo *algo, void **ctxp)$/;"	f	typeref:typename:int	file:
hash_iv	drivers/crypto/ace_sha.h	/^	unsigned int	hash_iv[8];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[8]
hash_key_in	drivers/crypto/ace_sha.h	/^	unsigned int	hash_key_in[16];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[16]
hash_link	fs/yaffs2/yaffs_guts.h	/^	struct list_head hash_link;	\/* list of objects in hash bucket *\/$/;"	m	struct:yaffs_obj	typeref:struct:list_head
hash_lookup_algo	common/hash.c	/^int hash_lookup_algo(const char *algo_name, struct hash_algo **algop)$/;"	f	typeref:typename:int
hash_mask	lib/zlib/deflate.h	/^    uInt  hash_mask;      \/* hash_size-1 *\/$/;"	m	struct:internal_state	typeref:typename:uInt
hash_msgsize_high	drivers/crypto/ace_sha.h	/^	unsigned int	hash_msgsize_high;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_msgsize_low	drivers/crypto/ace_sha.h	/^	unsigned int	hash_msgsize_low;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_parse_string	common/hash.c	/^int hash_parse_string(const char *algo_name, const char *str, uint8_t *result)$/;"	f	typeref:typename:int
hash_prelen_high	drivers/crypto/ace_sha.h	/^	unsigned int	hash_prelen_high;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_prelen_low	drivers/crypto/ace_sha.h	/^	unsigned int	hash_prelen_low;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_prng	drivers/crypto/ace_sha.h	/^	unsigned int	hash_prng[5];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[5]
hash_progressive_lookup_algo	common/hash.c	/^int hash_progressive_lookup_algo(const char *algo_name,$/;"	f	typeref:typename:int
hash_result	drivers/crypto/ace_sha.h	/^	unsigned int	hash_result[8];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[8]
hash_save_array_words	scripts/checkpatch.pl	/^sub hash_save_array_words {$/;"	s
hash_seed	drivers/crypto/ace_sha.h	/^	unsigned int	hash_seed[5];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[5]
hash_seed	include/ext_common.h	/^	__le32 hash_seed[4];$/;"	m	struct:ext2_sblock	typeref:typename:__le32[4]
hash_shift	lib/zlib/deflate.h	/^    uInt  hash_shift;$/;"	m	struct:internal_state	typeref:typename:uInt
hash_show	common/hash.c	/^static void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *output)$/;"	f	typeref:typename:void	file:
hash_show_words	scripts/checkpatch.pl	/^sub hash_show_words {$/;"	s
hash_size	include/fdtdec.h	/^	int hash_size;				\/* Hash size *\/$/;"	m	struct:fmap_entry	typeref:typename:int
hash_size	lib/zlib/deflate.h	/^    uInt  hash_size;      \/* number of elements in hash table *\/$/;"	m	struct:internal_state	typeref:typename:uInt
hash_status	drivers/crypto/ace_sha.h	/^	unsigned int	hash_status;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
hash_table_entry	drivers/net/armada100_fec.h	/^enum hash_table_entry {$/;"	g
hash_type	include/ec_commands.h	/^	uint8_t hash_type;       \/* enum ec_vboot_hash_type *\/$/;"	m	struct:ec_params_vboot_hash	typeref:typename:uint8_t
hash_type	include/ec_commands.h	/^	uint8_t hash_type;       \/* enum ec_vboot_hash_type *\/$/;"	m	struct:ec_response_vboot_hash	typeref:typename:uint8_t
hash_update	include/hash.h	/^	int (*hash_update)(struct hash_algo *algo, void *ctx, const void *buf,$/;"	m	struct:hash_algo	typeref:typename:int (*)(struct hash_algo * algo,void * ctx,const void * buf,unsigned int size,int is_last)
hash_update_crc32	common/hash.c	/^static int hash_update_crc32(struct hash_algo *algo, void *ctx,$/;"	f	typeref:typename:int	file:
hash_update_sha1	common/hash.c	/^static int hash_update_sha1(struct hash_algo *algo, void *ctx, const void *buf,$/;"	f	typeref:typename:int	file:
hash_update_sha256	common/hash.c	/^static int hash_update_sha256(struct hash_algo *algo, void *ctx,$/;"	f	typeref:typename:int	file:
hash_val	board/freescale/common/fsl_validate.c	/^static u8 hash_val[SHA256_BYTES];$/;"	v	typeref:typename:u8[]	file:
hashfilterh	drivers/net/lpc32xx_eth.c	/^	u32 hashfilterh;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
hashfilterl	drivers/net/lpc32xx_eth.c	/^	u32 hashfilterl;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
hashh	drivers/net/zynq_gem.c	/^	u32 hashh; \/* 0x84 - Hash High address reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
hashl	drivers/net/zynq_gem.c	/^	u32 hashl; \/* 0x80 - Hash Low address reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
hashtab	scripts/basic/fixdep.c	/^static struct item *hashtab[HASHSZ];$/;"	v	typeref:struct:item * []	file:
hashtable_ctrl	include/fsl_memac.h	/^	u32	hashtable_ctrl;	\/* Hash table control register *\/$/;"	m	struct:memac	typeref:typename:u32
hashtable_ctrl	include/fsl_tgec.h	/^	u32	hashtable_ctrl;	\/* Hash table control register *\/$/;"	m	struct:tgec	typeref:typename:u32
hashtablehigh	drivers/net/designware.h	/^	u32 hashtablehigh;	\/* 0x08 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
hashtablelow	drivers/net/designware.h	/^	u32 hashtablelow;	\/* 0x0c *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
hashtbl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^		uint32_t hashtbl;$/;"	m	union:mac_regs::__anon57780116030a	typeref:typename:uint32_t
haswell_early_init	drivers/video/broadwell_igd.c	/^static int haswell_early_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
haswell_late_init	drivers/video/broadwell_igd.c	/^static int haswell_late_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
have	lib/zlib/inflate.h	/^    unsigned have;              \/* number of code lengths in lens[] *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
have-crosscompiler	board/hisilicon/hikey/build-tf.mak	/^have-crosscompiler:$/;"	t
have_console	include/asm-generic/global_data.h	/^	unsigned long have_console;	\/* serial_init() was called *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
have_hwaddr	drivers/usb/eth/smsc95xx.c	/^	int have_hwaddr;  \/* 1 if we have a hardware MAC address *\/$/;"	m	struct:smsc95xx_private	typeref:typename:int	file:
have_key	drivers/serial/serial_efi.c	/^	bool have_key;$/;"	m	struct:serial_efi_priv	typeref:typename:bool	file:
have_langid	include/usb.h	/^	int have_langid;		\/* whether string_langid is valid yet *\/$/;"	m	struct:usb_device	typeref:typename:int
have_libfdt	tools/dtoc/fdt_select.py	/^    have_libfdt = False$/;"	v
have_libfdt	tools/dtoc/fdt_select.py	/^    have_libfdt = True$/;"	v
have_of	arch/powerpc/include/asm/processor.h	/^#define have_of /;"	d
havedict	lib/zlib/inflate.h	/^    int havedict;               \/* true if dictionary provided *\/$/;"	m	struct:inflate_state	typeref:typename:int
hb	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
hb_cbi_sense	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static iomux_v3_cfg_t const hb_cbi_sense[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
hb_iso_rx	drivers/usb/musb-new/musb_core.h	/^	unsigned		hb_iso_rx:1;	\/* high bandwidth iso rx? *\/$/;"	m	struct:musb	typeref:typename:unsigned:1
hb_iso_tx	drivers/usb/musb-new/musb_core.h	/^	unsigned		hb_iso_tx:1;	\/* high bandwidth iso tx? *\/$/;"	m	struct:musb	typeref:typename:unsigned:1
hb_mult	drivers/usb/musb-new/musb_gadget.h	/^	u8				hb_mult;$/;"	m	struct:musb_ep	typeref:typename:u8
hb_mult	drivers/usb/musb-new/musb_host.h	/^	u8			hb_mult;	\/* high bandwidth pkts per uf *\/$/;"	m	struct:musb_qh	typeref:typename:u8
hback_porch	include/fdtdec.h	/^	struct timing_entry hback_porch;	\/* hor. back porch *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
hbdidlcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	hbdidlcsr;	\/* Host Base Device ID Lock CSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
hbdidlcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hbdidlcsr;	\/* 0xc0068 - Host Base Device ID Lock Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
hblank_sym	drivers/video/tegra124/sor.h	/^	s32	hblank_sym;$/;"	m	struct:tegra_dp_link_config	typeref:typename:s32
hblkhd	include/malloc.h	/^  int hblkhd;   \/* total space in mmapped regions *\/$/;"	m	struct:mallinfo	typeref:typename:int
hblks	include/malloc.h	/^  int hblks;    \/* number of mmapped regions *\/$/;"	m	struct:mallinfo	typeref:typename:int
hborder	include/edid.h	/^	unsigned char hborder;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
hbp	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			hbp;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
hbp	drivers/video/am335x-fb.h	/^	unsigned int	hbp;		\/* Horizontal back porch *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
hbp	drivers/video/da8xx-fb.h	/^	int		hbp;		\/* Horizontal back porch *\/$/;"	m	struct:da8xx_panel	typeref:typename:int
hbp_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hbp_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hbp_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hbp_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hbp_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hbp_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hbp_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hbp_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hc32_to_cpu	drivers/usb/host/ehci.h	/^#define hc32_to_cpu(/;"	d
hc_control	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hc_control;		\/* copy of the hc control reg *\/$/;"	m	struct:ohci	typeref:typename:__u32
hc_control	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hc_control;		\/* copy of the hc control reg *\/$/;"	m	struct:ohci	typeref:typename:__u32
hc_control	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hc_control;	\/* copy of the hc control reg *\/$/;"	m	struct:ohci	typeref:typename:__u32
hc_control	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hc_control;	\/* copy of the hc control reg *\/$/;"	m	struct:ohci	typeref:typename:__u32
hc_control	drivers/usb/host/ohci.h	/^	__u32 hc_control;		\/* copy of the hc control reg *\/$/;"	m	struct:ohci	typeref:typename:__u32
hc_initialize_rom_data	drivers/ddr/altera/sequencer.c	/^static void hc_initialize_rom_data(void)$/;"	f	typeref:typename:void	file:
hc_interrupt	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^hc_interrupt (void)$/;"	f	typeref:typename:int	file:
hc_interrupt	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^hc_interrupt (void)$/;"	f	typeref:typename:int	file:
hc_interrupt	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^hc_interrupt (void)$/;"	f	typeref:typename:int	file:
hc_interrupt	drivers/usb/host/ohci-hcd.c	/^static int hc_interrupt(ohci_t *ohci)$/;"	f	typeref:typename:int	file:
hc_interrupt	drivers/usb/host/ohci-s3c24xx.c	/^static int hc_interrupt(void)$/;"	f	typeref:typename:int	file:
hc_regs	drivers/usb/host/dwc2.h	/^	struct dwc2_hc_regs	hc_regs[16];	\/* 0x500 *\/$/;"	m	struct:dwc2_core_regs	typeref:struct:dwc2_hc_regs[16]
hc_release_ohci	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void hc_release_ohci (ohci_t *ohci)$/;"	f	typeref:typename:void	file:
hc_release_ohci	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void hc_release_ohci (ohci_t *ohci)$/;"	f	typeref:typename:void	file:
hc_release_ohci	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void hc_release_ohci (ohci_t *ohci)$/;"	f	typeref:typename:void	file:
hc_release_ohci	drivers/usb/host/ohci-hcd.c	/^static void hc_release_ohci(ohci_t *ohci)$/;"	f	typeref:typename:void	file:
hc_release_ohci	drivers/usb/host/ohci-s3c24xx.c	/^static void hc_release_ohci(struct ohci *ohci)$/;"	f	typeref:typename:void	file:
hc_reset	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int hc_reset (ohci_t *ohci)$/;"	f	typeref:typename:int	file:
hc_reset	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int hc_reset (ohci_t *ohci)$/;"	f	typeref:typename:int	file:
hc_reset	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int hc_reset (ohci_t *ohci)$/;"	f	typeref:typename:int	file:
hc_reset	drivers/usb/host/ohci-hcd.c	/^static int hc_reset(ohci_t *ohci)$/;"	f	typeref:typename:int	file:
hc_reset	drivers/usb/host/ohci-s3c24xx.c	/^static int hc_reset(struct ohci *ohci)$/;"	f	typeref:typename:int	file:
hc_start	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int hc_start (ohci_t * ohci)$/;"	f	typeref:typename:int	file:
hc_start	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int hc_start (ohci_t * ohci)$/;"	f	typeref:typename:int	file:
hc_start	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int hc_start (ohci_t * ohci)$/;"	f	typeref:typename:int	file:
hc_start	drivers/usb/host/ohci-hcd.c	/^static int hc_start(ohci_t *ohci)$/;"	f	typeref:typename:int	file:
hc_start	drivers/usb/host/ohci-s3c24xx.c	/^static int hc_start(struct ohci *ohci)$/;"	f	typeref:typename:int	file:
hc_wp_grp_size	include/mmc.h	/^	uint hc_wp_grp_size;	\/* in 512-byte sectors *\/$/;"	m	struct:mmc	typeref:typename:uint
hcc_params	arch/arm/include/asm/arch-tegra/usb.h	/^	uint hcc_params;$/;"	m	struct:usb_ctlr	typeref:typename:uint
hcca	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	hcca;$/;"	m	struct:ohci_regs	typeref:typename:__u32
hcca	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct ohci_hcca *hcca;		\/* hcca *\/$/;"	m	struct:ohci	typeref:struct:ohci_hcca *
hcca	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	hcca;$/;"	m	struct:ohci_regs	typeref:typename:__u32
hcca	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct ohci_hcca *hcca;		\/* hcca *\/$/;"	m	struct:ohci	typeref:struct:ohci_hcca *
hcca	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hcca;$/;"	m	struct:ohci_regs	typeref:typename:__u32
hcca	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct ohci_hcca *hcca;	\/* hcca *\/$/;"	m	struct:ohci	typeref:struct:ohci_hcca *
hcca	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hcca;$/;"	m	struct:ohci_regs	typeref:typename:__u32
hcca	drivers/usb/host/ohci-s3c24xx.h	/^	struct ohci_hcca *hcca;	\/* hcca *\/$/;"	m	struct:ohci	typeref:struct:ohci_hcca *
hcca	drivers/usb/host/ohci.h	/^	__u32	hcca;$/;"	m	struct:ohci_regs	typeref:typename:__u32
hcca	drivers/usb/host/ohci.h	/^	struct ohci_hcca *hcca;		\/* hcca *\/$/;"	m	struct:ohci	typeref:struct:ohci_hcca *
hccapbase	arch/arm/include/asm/ehci-omap.h	/^	u32 hccapbase;		\/* 0x00 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
hcchar	drivers/usb/host/dwc2.h	/^	u32			hcchar;		\/* 0x00 *\/$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hccparams	arch/arm/include/asm/ehci-omap.h	/^	u32 hccparams;		\/* 0x08 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
hccparams	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 hccparams;		\/* hccparams *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
hccparams	arch/m68k/include/asm/immap_5329.h	/^	u32 hccparams;		\/* 0x108 Host Capability Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hccparams	include/usb/ehci-ci.h	/^	u32	hccparams;	\/* 0x108 - Host Capability Parameters *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hccr	drivers/usb/host/ehci.h	/^	struct ehci_hccr *hccr;	\/* R\/O registers, not need for volatile *\/$/;"	m	struct:ehci_ctrl	typeref:struct:ehci_hccr *
hccr	drivers/usb/host/xhci.h	/^	struct xhci_hccr *hccr;	\/* R\/O registers, not need for volatile *\/$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_hccr *
hccr	include/usb/fotg210.h	/^	} hccr;			\/* 0x00 - 0x0f: hccr *\/$/;"	m	struct:fotg210_regs	typeref:struct:fotg210_regs::__anon195d40ca0108
hccr	include/usb/fusbh200.h	/^	} hccr;			\/* 0x00 - 0x0f: hccr *\/$/;"	m	struct:fusbh200_regs	typeref:struct:fusbh200_regs::__anon10d3a7510108
hcd	drivers/usb/host/ehci-exynos.c	/^	struct ehci_hccr *hcd;$/;"	m	struct:exynos_ehci	typeref:struct:ehci_hccr *	file:
hcd	drivers/usb/host/xhci-exynos5.c	/^	struct xhci_hccr *hcd;$/;"	m	struct:exynos_xhci	typeref:struct:xhci_hccr *	file:
hcd	drivers/usb/host/xhci-keystone.c	/^	struct xhci_hccr *hcd;$/;"	m	struct:keystone_xhci	typeref:struct:xhci_hccr *	file:
hcd	drivers/usb/host/xhci-mvebu.c	/^	struct xhci_hccr *hcd;$/;"	m	struct:mvebu_xhci	typeref:struct:xhci_hccr *	file:
hcd	drivers/usb/host/xhci-rockchip.c	/^	struct xhci_hccr *hcd;$/;"	m	struct:rockchip_xhci	typeref:struct:xhci_hccr *	file:
hcd	drivers/usb/host/xhci-zynqmp.c	/^	struct xhci_hccr *hcd;$/;"	m	struct:zynqmp_xhci	typeref:struct:xhci_hccr *	file:
hcd	drivers/usb/musb-new/musb_uboot.h	/^	struct usb_hcd hcd;$/;"	m	struct:musb_host_data	typeref:struct:usb_hcd
hcd	include/linux/usb/xhci-fsl.h	/^	struct xhci_hccr *hcd;$/;"	m	struct:fsl_xhci	typeref:struct:xhci_hccr *
hcd	include/linux/usb/xhci-omap.h	/^	struct xhci_hccr *hcd;$/;"	m	struct:omap_xhci	typeref:struct:xhci_hccr *
hcd_base	drivers/usb/host/ehci-exynos.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:exynos_ehci_platdata	typeref:typename:fdt_addr_t	file:
hcd_base	drivers/usb/host/ehci-fsl.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:ehci_fsl_priv	typeref:typename:fdt_addr_t	file:
hcd_base	drivers/usb/host/ehci-marvell.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:ehci_mvebu_priv	typeref:typename:fdt_addr_t	file:
hcd_base	drivers/usb/host/xhci-exynos5.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:exynos_xhci_platdata	typeref:typename:fdt_addr_t	file:
hcd_base	drivers/usb/host/xhci-fsl.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:xhci_fsl_priv	typeref:typename:fdt_addr_t	file:
hcd_base	drivers/usb/host/xhci-mvebu.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:mvebu_xhci_platdata	typeref:typename:fdt_addr_t	file:
hcd_base	drivers/usb/host/xhci-rockchip.c	/^	fdt_addr_t hcd_base;$/;"	m	struct:rockchip_xhci_platdata	typeref:typename:fdt_addr_t	file:
hcd_name	drivers/usb/host/isp116x-hcd.c	/^static const char hcd_name[] = "isp116x-hcd";$/;"	v	typeref:typename:const char[]	file:
hcd_name	drivers/usb/host/r8a66597-hcd.c	/^static const char hcd_name[] = "r8a66597_hcd";$/;"	v	typeref:typename:const char[]	file:
hcd_priv	drivers/usb/musb-new/usb-compat.h	/^	void *hcd_priv;$/;"	m	struct:usb_hcd	typeref:typename:void *
hcd_to_musb	drivers/usb/musb-new/musb_host.h	/^static inline struct musb *hcd_to_musb(struct usb_hcd *hcd)$/;"	f	typeref:struct:musb *
hcdma	drivers/usb/host/dwc2.h	/^	u32			hcdma;$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hcdmab	drivers/usb/host/dwc2.h	/^	u32			hcdmab;$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hcfg	drivers/usb/host/dwc2.h	/^	u32			hcfg;		\/* 0x00 *\/$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
hcfg_addr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hcfg_addr;      \/* 0xa000 - HT Configuration Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hcfg_data	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hcfg_data;      \/* 0xa004 - HT Configuration Data register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hcfs2string	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static char * hcfs2string (int state)$/;"	f	typeref:typename:char *	file:
hcfs2string	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static char * hcfs2string (int state)$/;"	f	typeref:typename:char *	file:
hcfs2string	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static char * hcfs2string (int state)$/;"	f	typeref:typename:char *	file:
hcfs2string	drivers/usb/host/ohci-hcd.c	/^static char *hcfs2string(int state)$/;"	f	typeref:typename:char *	file:
hcfs2string	drivers/usb/host/ohci-s3c24xx.c	/^static char *hcfs2string(int state)$/;"	f	typeref:typename:char *	file:
hci_version	arch/arm/include/asm/arch-tegra/usb.h	/^	u16 hci_version;$/;"	m	struct:usb_ctlr	typeref:typename:u16
hcint	drivers/usb/host/dwc2.h	/^	u32			hcint;$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hcintmsk	drivers/usb/host/dwc2.h	/^	u32			hcintmsk;$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hciver	arch/m68k/include/asm/immap_5329.h	/^	u16 hciver;		\/* 0x102 Host Interface Version Number *\/$/;"	m	struct:usb_otg	typeref:typename:u16
hciversion	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 hciversion;		\/* hciversion\/caplength *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
hciversion	include/usb/ehci-ci.h	/^	u16	hciversion;	\/* 0x102 - Host Interface Version *\/$/;"	m	struct:usb_ehci	typeref:typename:u16
hclk0	arch/arm/dts/at91sam9261.dtsi	/^					hclk0: hclk0 {$/;"	l	label:pmc
hclk1	arch/arm/dts/at91sam9261.dtsi	/^					hclk1: hclk1 {$/;"	l	label:pmc
hclkdiv_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 hclkdiv_ctrl;	\/* HCLK Divider Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
hclkpll_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 hclkpll_ctrl;	\/* HCLK PLL Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
hcontrol	drivers/block/fsl_sata.h	/^	u32 hcontrol;		\/* Host control register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
hcor	drivers/usb/host/ehci.h	/^	struct ehci_hcor *hcor;$/;"	m	struct:ehci_ctrl	typeref:struct:ehci_hcor *
hcor	drivers/usb/host/xhci-keystone.c	/^	struct xhci_hcor *hcor;$/;"	m	struct:keystone_xhci	typeref:struct:xhci_hcor *	file:
hcor	drivers/usb/host/xhci.h	/^	struct xhci_hcor *hcor;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_hcor *
hcor	include/usb/fotg210.h	/^	} hcor;			\/* 0x10 - 0x33: hcor *\/$/;"	m	struct:fotg210_regs	typeref:struct:fotg210_regs::__anon195d40ca0208
hcor	include/usb/fusbh200.h	/^	} hcor;			\/* 0x10 - 0x33: hcor *\/$/;"	m	struct:fusbh200_regs	typeref:struct:fusbh200_regs::__anon10d3a7510208
hcount	include/linux/fb.h	/^	__u32 hcount;			\/* current scandot position *\/$/;"	m	struct:fb_vblank	typeref:typename:__u32
hcpriv	drivers/usb/musb-new/usb-compat.h	/^	void *hcpriv;			\/* private data for host controller *\/$/;"	m	struct:urb	typeref:typename:void *
hcpriv	drivers/usb/musb-new/usb-compat.h	/^	void *hcpriv;$/;"	m	struct:usb_host_endpoint	typeref:typename:void *
hcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 hcr;		\/* 0x1C Horizontal Configuration Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
hcr0	arch/m68k/include/asm/immap_5441x.h	/^	u32 hcr0;		\/* 0x84 *\/$/;"	m	struct:gpio	typeref:typename:u32
hcr1	arch/m68k/include/asm/immap_5441x.h	/^	u32 hcr1;		\/* 0x80 *\/$/;"	m	struct:gpio	typeref:typename:u32
hcrc	include/u-boot/zlib.h	/^	int	hcrc; \/* true if there was or will be a header crc *\/$/;"	m	struct:gz_header_s	typeref:typename:int
hcreate_r	lib/hashtable.c	/^int hcreate_r(size_t nel, struct hsearch_data *htab)$/;"	f	typeref:typename:int
hcs_params	arch/arm/include/asm/arch-tegra/usb.h	/^	uint hcs_params;$/;"	m	struct:usb_ctlr	typeref:typename:uint
hcsp_portroute	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 hcsp_portroute;	\/* hcsp_portroute *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
hcsparams	arch/arm/include/asm/ehci-omap.h	/^	u32 hcsparams;		\/* 0x04 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
hcsparams	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 hcsparams;		\/* hcsparams *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
hcsparams	arch/m68k/include/asm/immap_5329.h	/^	u32 hcsparams;		\/* 0x104 Host Structural Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hcsparams	include/usb/ehci-ci.h	/^	u32	hcsparams;	\/* 0x104 - Host Structural Parameters *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hcsplt	drivers/usb/host/dwc2.h	/^	u32			hcsplt;$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hctl	arch/arm/include/asm/omap_mmc.h	/^	unsigned int hctl;		\/* 0x128 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
hctsiz	drivers/usb/host/dwc2.h	/^	u32			hctsiz;		\/* 0x10 *\/$/;"	m	struct:dwc2_hc_regs	typeref:typename:u32
hcver	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	hcver;		\/* HOST Version *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
hd	drivers/net/keystone_net.c	/^	void				*hd;$/;"	m	struct:ks2_eth_priv	typeref:typename:void *	file:
hd0_info	arch/x86/include/asm/bootparam.h	/^	__u8  hd0_info[16];	\/* obsolete! *\/		\/* 0x080 *\/$/;"	m	struct:boot_params	typeref:typename:__u8[16]
hd1_info	arch/x86/include/asm/bootparam.h	/^	__u8  hd1_info[16];	\/* obsolete! *\/		\/* 0x090 *\/$/;"	m	struct:boot_params	typeref:typename:__u8[16]
hd44780_help_text	board/work-microwave/work_92105/work_92105_display.c	/^static char hd44780_help_text[] =$/;"	v	typeref:typename:char[]	file:
hd44780_init_char_gen	board/work-microwave/work_92105/work_92105_display.c	/^static void hd44780_init_char_gen(void)$/;"	f	typeref:typename:void	file:
hd44780_instruction	board/work-microwave/work_92105/work_92105_display.c	/^static void hd44780_instruction(unsigned long instruction)$/;"	f	typeref:typename:void	file:
hd44780_write_char	board/work-microwave/work_92105/work_92105_display.c	/^static void hd44780_write_char(char c)$/;"	f	typeref:typename:void	file:
hd44780_write_str	board/work-microwave/work_92105/work_92105_display.c	/^static void hd44780_write_str(char *s)$/;"	f	typeref:typename:void	file:
hd_driveid	include/ata.h	/^typedef struct hd_driveid {$/;"	s
hd_driveid_t	include/ata.h	/^} hd_driveid_t;$/;"	t	typeref:struct:hd_driveid
hda_verb_data0	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data0[16];	\/* Offset 0x0110 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data1	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data1[16];	\/* Offset 0x0120 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data10	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data10[16];	\/* Offset 0x01B0 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data11	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data11[16];	\/* Offset 0x01C0 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data12	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data12[16];	\/* Offset 0x01D0 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data13	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data13[16];	\/* Offset 0x01E0 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data2	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data2[16];	\/* Offset 0x0130 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data3	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data3[16];	\/* Offset 0x0140 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data4	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data4[16];	\/* Offset 0x0150 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data5	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data5[16];	\/* Offset 0x0160 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data6	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data6[16];	\/* Offset 0x0170 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data7	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data7[16];	\/* Offset 0x0180 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data8	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data8[16];	\/* Offset 0x0190 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_data9	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_data9[16];	\/* Offset 0x01A0 *\/$/;"	m	struct:upd_region	typeref:typename:u8[16]
hda_verb_header	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_header[12];	\/* Offset 0x0100 *\/$/;"	m	struct:upd_region	typeref:typename:u8[12]
hda_verb_length	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u32	hda_verb_length;	\/* Offset 0x010C *\/$/;"	m	struct:upd_region	typeref:typename:u32
hda_verb_pad	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	hda_verb_pad[47];	\/* Offset 0x01F0 *\/$/;"	m	struct:upd_region	typeref:typename:u8[47]
hdba	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	hdba;$/;"	m	struct:tnc_rcba	typeref:typename:u32
hdcp_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hdcp_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hdcp_e_fuse	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	hdcp_e_fuse;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
hdd	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	hdd;$/;"	m	struct:tnc_rcba	typeref:typename:u32
hdelete_r	lib/hashtable.c	/^int hdelete_r(const char *key, struct hsearch_data *htab, int flag)$/;"	f	typeref:typename:int
hdestroy_r	lib/hashtable.c	/^void hdestroy_r(struct hsearch_data *htab)$/;"	f	typeref:typename:void
hdimcopbt	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	hdimcopbt;	\/* 0x80 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
hdlc_pram_s	include/commproc.h	/^typedef struct hdlc_pram_s {$/;"	s
hdlc_pram_t	include/commproc.h	/^} hdlc_pram_t;$/;"	t	typeref:struct:hdlc_pram_s
hdmi	arch/arm/dts/dra7.dtsi	/^			hdmi: encoder@58060000 {$/;"	l
hdmi	arch/arm/dts/imx6qdl.dtsi	/^		hdmi: hdmi@0120000 {$/;"	l
hdmi	arch/arm/dts/rk3288.dtsi	/^	hdmi: hdmi@ff980000 {$/;"	l
hdmi0	arch/arm/dts/am57xx-beagle-x15.dts	/^	hdmi0: connector {$/;"	l
hdmi0	arch/arm/dts/dra72-evm-common.dtsi	/^	hdmi0: connector {$/;"	l
hdmi_audio	arch/arm/dts/rk3288.dtsi	/^	hdmi_audio: hdmi_audio {$/;"	l
hdmi_audio_fifo_reset	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_audio_fifo_reset(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_audio_set_format	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_audio_set_format(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_audio_set_samplerate	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_audio_set_samplerate(struct rk3288_hdmi *regs, u32 pixel_clk)$/;"	f	typeref:typename:void	file:
hdmi_av_composer	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_av_composer(struct rk3288_hdmi *regs,$/;"	f	typeref:typename:void	file:
hdmi_clear_overflow	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_clear_overflow(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_clk2_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	hdmi_clk2_div: hdmi_clk2_div {$/;"	l
hdmi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 hdmi_clk_cfg;	\/* 0x150 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 hdmi_clk_cfg;	\/* 0x150 HDMI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 hdmi_clk_cfg;	\/* 0x150 HDMI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 hdmi_clk_cfg;	\/* 0x150 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 hdmi_clk_cfg;	\/* 0x150 HDMI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 hdmi_clk_cfg;	\/* 0x150 HDMI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	hdmi_clkin_ck: hdmi_clkin_ck {$/;"	l
hdmi_codec_enable	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t hdmi_codec_enable:1;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t:1
hdmi_connector_in	arch/arm/dts/am57xx-beagle-x15.dts	/^			hdmi_connector_in: endpoint {$/;"	l	label:hdmi0
hdmi_connector_in	arch/arm/dts/dra72-evm-common.dtsi	/^			hdmi_connector_in: endpoint {$/;"	l	label:hdmi0
hdmi_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	hdmi_dclk_div: hdmi_dclk_div {$/;"	l
hdmi_ddc	arch/arm/dts/tegra124-nyan.dtsi	/^	hdmi_ddc: i2c@7000c700 {$/;"	l
hdmi_ddc	arch/arm/dts/tegra20-harmony.dts	/^	hdmi_ddc: i2c@7000c400 {$/;"	l
hdmi_ddc	arch/arm/dts/tegra20-seaboard.dts	/^		hdmi_ddc: i2c@0 {$/;"	l
hdmi_ddc	arch/arm/dts/tegra20-tamonten.dtsi	/^		hdmi_ddc: i2c@0 {$/;"	l
hdmi_ddc	arch/arm/dts/tegra20-ventana.dts	/^		hdmi_ddc: i2c@0 {$/;"	l
hdmi_ddc_reset	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_ddc_reset(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_ddc_wait_i2c_done	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_ddc_wait_i2c_done(struct rk3288_hdmi *regs, int msec)$/;"	f	typeref:typename:int	file:
hdmi_div_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	hdmi_div_clk: hdmi_div_clk {$/;"	l
hdmi_dpll_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	hdmi_dpll_clk_mux: hdmi_dpll_clk_mux {$/;"	l
hdmi_enable_video_path	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_enable_video_path(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_get_plug_in_status	drivers/video/rockchip/rk_hdmi.c	/^static u8 hdmi_get_plug_in_status(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:u8	file:
hdmi_in	arch/arm/dts/rk3288.dtsi	/^			hdmi_in: port {$/;"	l	label:hdmi
hdmi_in_vopb	arch/arm/dts/rk3288.dtsi	/^				hdmi_in_vopb: endpoint@0 {$/;"	l	label:hdmi.hdmi_in
hdmi_in_vopl	arch/arm/dts/rk3288.dtsi	/^				hdmi_in_vopl: endpoint@1 {$/;"	l	label:hdmi.hdmi_in
hdmi_init_interrupt	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_init_interrupt(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_lookup_n_cts	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_lookup_n_cts(u32 pixel_clk)$/;"	f	typeref:typename:int	file:
hdmi_mpll_config	drivers/video/rockchip/rk_hdmi.c	/^struct hdmi_mpll_config {$/;"	s	file:
hdmi_mux_0	arch/arm/dts/imx6qdl.dtsi	/^				hdmi_mux_0: endpoint {$/;"	l	label:hdmi
hdmi_mux_1	arch/arm/dts/imx6qdl.dtsi	/^				hdmi_mux_1: endpoint {$/;"	l
hdmi_mux_2	arch/arm/dts/imx6q.dtsi	/^		hdmi_mux_2: endpoint {$/;"	l
hdmi_mux_3	arch/arm/dts/imx6q.dtsi	/^		hdmi_mux_3: endpoint {$/;"	l
hdmi_out	arch/arm/dts/am57xx-beagle-x15.dts	/^		hdmi_out: endpoint {$/;"	l
hdmi_out	arch/arm/dts/dra72-evm-common.dtsi	/^		hdmi_out: endpoint {$/;"	l
hdmi_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t hdmi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
hdmi_phy_config	drivers/video/rockchip/rk_hdmi.c	/^struct hdmi_phy_config {$/;"	s	file:
hdmi_phy_configure	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_phy_configure(struct rk3288_hdmi *regs, u32 mpixelclock)$/;"	f	typeref:typename:int	file:
hdmi_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hdmi_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
hdmi_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hdmi_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
hdmi_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hdmi_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
hdmi_phy_enable_power	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_enable_power(struct rk3288_hdmi *regs, uint enable)$/;"	f	typeref:typename:void	file:
hdmi_phy_enable_spare	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_enable_spare(struct rk3288_hdmi *regs, uint enable)$/;"	f	typeref:typename:void	file:
hdmi_phy_enable_tmds	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_enable_tmds(struct rk3288_hdmi *regs, uint enable)$/;"	f	typeref:typename:void	file:
hdmi_phy_gen2_pddq	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_gen2_pddq(struct rk3288_hdmi *regs, uint enable)$/;"	f	typeref:typename:void	file:
hdmi_phy_gen2_txpwron	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_gen2_txpwron(struct rk3288_hdmi *regs, uint enable)$/;"	f	typeref:typename:void	file:
hdmi_phy_i2c_write	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_i2c_write(struct rk3288_hdmi *regs, uint data, uint addr)$/;"	f	typeref:typename:void	file:
hdmi_phy_init	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_phy_init(struct rk3288_hdmi *regs, uint mpixelclock)$/;"	f	typeref:typename:int	file:
hdmi_phy_sel_data_en_pol	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_sel_data_en_pol(struct rk3288_hdmi *regs, uint enable)$/;"	f	typeref:typename:void	file:
hdmi_phy_sel_interface_control	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_phy_sel_interface_control(struct rk3288_hdmi *regs,$/;"	f	typeref:typename:void	file:
hdmi_phy_test_clear	drivers/video/rockchip/rk_hdmi.c	/^static inline void hdmi_phy_test_clear(struct rk3288_hdmi *regs, u8 bit)$/;"	f	typeref:typename:void	file:
hdmi_phy_wait_i2c_done	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_phy_wait_i2c_done(struct rk3288_hdmi *regs, u32 msec)$/;"	f	typeref:typename:int	file:
hdmi_pins	arch/arm/dts/am57xx-beagle-x15.dts	/^	hdmi_pins: pinmux_hdmi_pins {$/;"	l
hdmi_pll_reg	arch/arm/dts/tegra20-harmony.dts	/^				hdmi_pll_reg: ldo8 {$/;"	l	label:pmic
hdmi_pll_reg	arch/arm/dts/tegra20-seaboard.dts	/^				hdmi_pll_reg: ldo8 {$/;"	l	label:pmic
hdmi_pll_reg	arch/arm/dts/tegra20-tamonten.dtsi	/^				hdmi_pll_reg: ldo8 {$/;"	l	label:pmic
hdmi_pll_reg	arch/arm/dts/tegra20-trimslice.dts	/^		hdmi_pll_reg: regulator@1 {$/;"	l
hdmi_pll_reg	arch/arm/dts/tegra20-ventana.dts	/^				hdmi_pll_reg: ldo8 {$/;"	l	label:pmic
hdmi_read_edid	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_read_edid(struct rk3288_hdmi *regs, int block, u8 *buff)$/;"	f	typeref:typename:int	file:
hdmi_regs	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^struct hdmi_regs {$/;"	s
hdmi_set_clock_regenerator	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_set_clock_regenerator(struct rk3288_hdmi *regs, u32 n, u32 cts)$/;"	f	typeref:typename:void	file:
hdmi_slow_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 hdmi_slow_clk_cfg;	\/* 0x154 HDMI slow module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_slow_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 hdmi_slow_clk_cfg;	\/* 0x154 HDMI slow module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_slow_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 hdmi_slow_clk_cfg;	\/* 0x154 HDMI slow module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_slow_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 hdmi_slow_clk_cfg;	\/* 0x154 HDMI slow module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
hdmi_update_csc_coeffs	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_update_csc_coeffs(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_vdd_reg	arch/arm/dts/tegra20-harmony.dts	/^				hdmi_vdd_reg: ldo7 {$/;"	l	label:pmic
hdmi_vdd_reg	arch/arm/dts/tegra20-seaboard.dts	/^				hdmi_vdd_reg: ldo7 {$/;"	l	label:pmic
hdmi_vdd_reg	arch/arm/dts/tegra20-tamonten.dtsi	/^				hdmi_vdd_reg: ldo7 {$/;"	l	label:pmic
hdmi_vdd_reg	arch/arm/dts/tegra20-trimslice.dts	/^		hdmi_vdd_reg: regulator@0 {$/;"	l
hdmi_vdd_reg	arch/arm/dts/tegra20-ventana.dts	/^				hdmi_vdd_reg: ldo7 {$/;"	l	label:pmic
hdmi_video_csc	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_video_csc(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_video_packetize	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_video_packetize(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_video_sample	drivers/video/rockchip/rk_hdmi.c	/^static void hdmi_video_sample(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:void	file:
hdmi_wait_for_hpd	drivers/video/rockchip/rk_hdmi.c	/^static int hdmi_wait_for_hpd(struct rk3288_hdmi *regs)$/;"	f	typeref:typename:int	file:
hdp	drivers/net/cpsw.c	/^	void			*hdp, *cp, *rxfree;$/;"	m	struct:cpdma_chan	typeref:typename:void *	file:
hdpctl	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 hdpctl;		\/* offset 0x4 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
hdpgpoclr	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 hdpgpoclr;		\/* offset 0x10 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
hdpgposet	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 hdpgposet;		\/* offset 0xc *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
hdpgpoval	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 hdpgpoval;		\/* offset 0x14 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
hdpval	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 hdpval;		\/* offset 0x8 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
hdq	arch/arm/dts/am4372.dtsi	/^		hdq: hdq@48347000 {$/;"	l
hdq_pins	arch/arm/dts/am43x-epos-evm.dts	/^		hdq_pins: pinmux_hdq_pins {$/;"	l
hdr	arch/arm/include/asm/setup.h	/^	struct tag_header hdr;$/;"	m	struct:tag	typeref:struct:tag_header
hdr	arch/avr32/include/asm/setup.h	/^	struct tag_header hdr;$/;"	m	struct:tag	typeref:struct:tag_header
hdr	arch/nds32/include/asm/setup.h	/^	struct tag_header hdr;$/;"	m	struct:tag	typeref:struct:tag_header
hdr	arch/sparc/lib/bootm.c	/^	unsigned char hdr[4];	\/* ascii "HdrS" *\/$/;"	m	struct:__anon0049f2d20108	typeref:typename:unsigned char[4]	file:
hdr	arch/x86/include/asm/bootparam.h	/^	struct setup_header hdr;    \/* setup header *\/	\/* 0x1f1 *\/$/;"	m	struct:boot_params	typeref:struct:setup_header
hdr	arch/x86/include/asm/fsp/fsp_hob.h	/^	struct hob_header	hdr;$/;"	m	struct:hob_guid	typeref:struct:hob_header
hdr	arch/x86/include/asm/fsp/fsp_hob.h	/^	struct hob_header	hdr;$/;"	m	struct:hob_mem_alloc	typeref:struct:hob_header
hdr	arch/x86/include/asm/fsp/fsp_hob.h	/^	struct hob_header	hdr;$/;"	m	struct:hob_res_desc	typeref:struct:hob_header
hdr	board/nokia/rx51/tag_omap.h	/^	struct tag_omap_header hdr;$/;"	m	struct:tag_omap	typeref:struct:tag_omap_header
hdr	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_get_arm_mem	typeref:struct:bcm2835_mbox_hdr	file:
hdr	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_get_board_rev	typeref:struct:bcm2835_mbox_hdr	file:
hdr	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_get_board_serial	typeref:struct:bcm2835_mbox_hdr	file:
hdr	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_get_clock_rate	typeref:struct:bcm2835_mbox_hdr	file:
hdr	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_get_mac_address	typeref:struct:bcm2835_mbox_hdr	file:
hdr	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_set_power_state	typeref:struct:bcm2835_mbox_hdr	file:
hdr	drivers/net/pic32_eth.h	/^	u32 hdr;	\/* header *\/$/;"	m	struct:eth_dma_desc	typeref:typename:u32
hdr	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_query	typeref:struct:bcm2835_mbox_hdr	file:
hdr	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_hdr hdr;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_hdr	file:
hdr	include/efi_api.h	/^	struct efi_table_hdr hdr;$/;"	m	struct:efi_boot_services	typeref:struct:efi_table_hdr
hdr	include/efi_api.h	/^	struct efi_table_hdr hdr;$/;"	m	struct:efi_runtime_services	typeref:struct:efi_table_hdr
hdr	include/efi_api.h	/^	struct efi_table_hdr hdr;$/;"	m	struct:efi_system_table	typeref:struct:efi_table_hdr
hdr	include/fsl_validate.h	/^	struct fsl_secboot_img_hdr hdr;$/;"	m	struct:fsl_secboot_img_priv	typeref:struct:fsl_secboot_img_hdr
hdr	lib/trace.c	/^static struct trace_hdr *hdr;	\/* Pointer to start of trace buffer *\/$/;"	v	typeref:struct:trace_hdr *	file:
hdr	tools/imagetool.h	/^	void *hdr;$/;"	m	struct:image_type_params	typeref:typename:void *
hdr_checksum	tools/socfpgaimage.c	/^static uint16_t hdr_checksum(struct socfpga_header *header)$/;"	f	typeref:typename:uint16_t	file:
hdr_chunk	fs/yaffs2/yaffs_guts.h	/^	int hdr_chunk;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:int
hdr_chunk	fs/yaffs2/yaffs_guts.h	/^	int hdr_chunk;$/;"	m	struct:yaffs_obj	typeref:typename:int
hdr_crc	drivers/mtd/ubi/ubi-media.h	/^	__be32  hdr_crc;$/;"	m	struct:ubi_ec_hdr	typeref:typename:__be32
hdr_crc	drivers/mtd/ubi/ubi-media.h	/^	__be32  hdr_crc;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
hdr_crc	fs/jffs2/jffs2_nand_private.h	/^hdr_crc(struct jffs2_unknown_node *node)$/;"	f	typeref:typename:int
hdr_crc	fs/jffs2/jffs2_private.h	/^hdr_crc(struct jffs2_unknown_node *node)$/;"	f	typeref:typename:int
hdr_crc	include/jffs2/jffs2.h	/^	__u32 hdr_crc;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
hdr_crc	include/jffs2/jffs2.h	/^	__u32 hdr_crc;$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
hdr_crc	include/jffs2/jffs2.h	/^	__u32 hdr_crc;$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
hdr_crc	include/jffs2/jffs2.h	/^	__u32 hdr_crc;$/;"	m	struct:jffs2_unknown_node	typeref:typename:__u32
hdr_input	arch/sparc/lib/bootm.c	/^	} hdr_input;$/;"	m	struct:__anon0049f2d20108	typeref:union:__anon0049f2d20108::__anon0049f2d2020a	file:
hdr_len	arch/x86/include/asm/fsp/fsp_fv.h	/^	u16			hdr_len;$/;"	m	struct:fv_header	typeref:typename:u16
hdr_len	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	hdr_len;		\/* header length *\/$/;"	m	struct:fsp_header	typeref:typename:u32
hdr_len	drivers/net/e1000.h	/^			uint8_t hdr_len;	\/* Header length *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345180a::__anon7fc273451908	typeref:typename:uint8_t
hdr_location	include/fsl_validate.h	/^	uint32_t hdr_location;$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:uint32_t
hdr_rev	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u8	hdr_rev;		\/* header rev *\/$/;"	m	struct:fsp_header	typeref:typename:u8
hdr_size	include/efi.h	/^	u32 hdr_size;$/;"	m	struct:efi_info_hdr	typeref:typename:u32
hdr_v1	tools/imximage.h	/^		imx_header_v1_t hdr_v1;$/;"	m	union:imx_header::__anon504a956c0f0a	typeref:typename:imx_header_v1_t
hdr_v2	tools/imximage.h	/^		imx_header_v2_t hdr_v2;$/;"	m	union:imx_header::__anon504a956c0f0a	typeref:typename:imx_header_v2_t
hdr_ver	arch/sparc/lib/bootm.c	/^	unsigned short hdr_ver;$/;"	m	struct:__anon0049f2d20108	typeref:typename:unsigned short	file:
hdrs_min_io_size	drivers/mtd/ubi/ubi.h	/^	int hdrs_min_io_size;$/;"	m	struct:ubi_device	typeref:typename:int
head	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long head;	\/* Next QH (LE) *\/$/;"	m	struct:__anon66fd0d690208	typeref:typename:unsigned long
head	board/mpl/common/usb_uhci.h	/^	unsigned long head;       \/* Next QH (LE)*\/$/;"	m	struct:__anon0a2b4c740208	typeref:typename:unsigned long
head	cmd/fdc.c	/^	unsigned int head;	\/* nr of heads *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned int	file:
head	common/dlmalloc.c	/^static GmListElement* head = 0;$/;"	v	typeref:typename:GmListElement *	file:
head	disk/part_dos.h	/^	unsigned char head;		\/* starting head			*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
head	drivers/crypto/fsl/jr.h	/^	int head;$/;"	m	struct:jobring	typeref:typename:int
head	drivers/mtd/nand/denali.h	/^	int head;$/;"	m	struct:nand_buf	typeref:typename:int
head	drivers/net/cpsw.c	/^	struct cpdma_desc	*head, *tail;$/;"	m	struct:cpdma_chan	typeref:struct:cpdma_desc *	file:
head	drivers/net/mpc5xxx_fec.c	/^    uint8 head[16];             \/* MAC header(6 + 6 + 2) + 2(aligned) *\/$/;"	m	struct:__anone13c4dc40108	typeref:typename:uint8[16]	file:
head	drivers/video/stb_truetype.h	/^   int loca,head,glyf,hhea,hmtx,kern; \/\/ table locations as offset from start of .ttf$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
head	drivers/video/stb_truetype.h	/^   struct stbtt__hheap_chunk *head;$/;"	m	struct:stbtt__hheap	typeref:struct:stbtt__hheap_chunk *
head	fs/yaffs2/yaffs_guts.h	/^	u32 head;$/;"	m	struct:yaffs_checkpt_validity	typeref:typename:u32
head	include/membuff.h	/^	char *head;		\/** current buffer head *\/$/;"	m	struct:membuff	typeref:typename:char *
head	include/part_efi.h	/^	u8 head;		\/* starting head *\/$/;"	m	struct:partition	typeref:typename:u8
head	lib/zlib/deflate.h	/^    Posf *head; \/* Heads of the hash chains or NIL. *\/$/;"	m	struct:internal_state	typeref:typename:Posf *
head	lib/zlib/inflate.h	/^    gz_headerp head;            \/* where to save gzip header information *\/$/;"	m	struct:inflate_state	typeref:typename:gz_headerp
head	scripts/kconfig/mconf.c	/^	struct list_head *head;$/;"	m	struct:search_data	typeref:struct:list_head *	file:
head-y	arch/arc/lib/Makefile	/^head-y := start.o$/;"	m
head-y	arch/arm/Makefile	/^head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)\/start.o$/;"	m
head-y	arch/arm/Makefile	/^head-y := arch\/arm\/cpu\/$(CPU)\/start.o$/;"	m
head-y	arch/avr32/Makefile	/^head-y := arch\/avr32\/cpu\/start.o$/;"	m
head-y	arch/blackfin/Makefile	/^head-y := arch\/blackfin\/cpu\/start.o$/;"	m
head-y	arch/m68k/Makefile	/^head-y := arch\/m68k\/cpu\/$(CPU)\/start.o$/;"	m
head-y	arch/microblaze/Makefile	/^head-y := arch\/microblaze\/cpu\/start.o$/;"	m
head-y	arch/mips/Makefile	/^head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)\/start.o$/;"	m
head-y	arch/mips/Makefile	/^head-y := arch\/mips\/cpu\/start.o$/;"	m
head-y	arch/nds32/Makefile	/^head-y := arch\/nds32\/cpu\/$(CPU)\/start.o$/;"	m
head-y	arch/nios2/Makefile	/^head-y := arch\/nios2\/cpu\/start.o$/;"	m
head-y	arch/openrisc/Makefile	/^head-y := arch\/openrisc\/cpu\/start.o$/;"	m
head-y	arch/powerpc/Makefile	/^head-y := arch\/powerpc\/cpu\/$(CPU)\/start.o$/;"	m
head-y	arch/sandbox/Makefile	/^head-y := arch\/sandbox\/cpu\/start.o$/;"	m
head-y	arch/sh/Makefile	/^head-y := arch\/sh\/cpu\/$(CPU)\/start.o$/;"	m
head-y	arch/sparc/Makefile	/^head-y := arch\/sparc\/cpu\/$(CPU)\/start.o$/;"	m
head-y	arch/x86/Makefile	/^head-y := arch\/x86\/cpu\/start.o$/;"	m
head-y	arch/xtensa/Makefile	/^head-y := arch\/xtensa\/cpu\/start.o$/;"	m
header	arch/x86/include/asm/acpi_table.h	/^	struct acpi_table_header header;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_table_header
header	arch/x86/include/asm/acpi_table.h	/^	struct acpi_table_header header;$/;"	m	struct:acpi_madt	typeref:struct:acpi_table_header
header	arch/x86/include/asm/acpi_table.h	/^	struct acpi_table_header header;$/;"	m	struct:acpi_mcfg	typeref:struct:acpi_table_header
header	arch/x86/include/asm/acpi_table.h	/^	struct acpi_table_header header;$/;"	m	struct:acpi_rsdt	typeref:struct:acpi_table_header
header	arch/x86/include/asm/acpi_table.h	/^	struct acpi_table_header header;$/;"	m	struct:acpi_xsdt	typeref:struct:acpi_table_header
header	arch/x86/include/asm/bootparam.h	/^	__u32	header;$/;"	m	struct:setup_header	typeref:typename:__u32
header	arch/x86/include/asm/fsp/fsp_ffs.h	/^		u8	header;$/;"	m	struct:ffs_integrity::__anon07b9b4bf0108	typeref:typename:u8
header	arch/x86/include/asm/sfi.h	/^	struct sfi_table_header		header;$/;"	m	struct:sfi_table_simple	typeref:struct:sfi_table_header
header	board/bosch/shc/board.c	/^static struct shc_eeprom __attribute__((section(".data"))) header;$/;"	v	typeref:struct:shc_eeprom	file:
header	board/ti/common/board_detect.h	/^	u32 header;$/;"	m	struct:dra7_eeprom	typeref:typename:u32
header	board/ti/common/board_detect.h	/^	u32 header;$/;"	m	struct:ti_common_eeprom	typeref:typename:u32
header	board/ti/common/board_detect.h	/^	unsigned int header;$/;"	m	struct:ti_am_eeprom	typeref:typename:unsigned int
header	cmd/immap.c	/^header(void)$/;"	f	typeref:typename:void	file:
header	drivers/tpm/tpm_tis.h	/^	union tpm_cmd_header header;$/;"	m	struct:tpm_cmd_t	typeref:union:tpm_cmd_header
header	include/bmp_layout.h	/^	struct bmp_header header;$/;"	m	struct:bmp_image	typeref:struct:bmp_header
header	include/edid.h	/^	unsigned char header[8];$/;"	m	struct:edid1_info	typeref:typename:unsigned char[8]
header	include/fsl-mc/fsl_mc_cmd.h	/^	uint64_t header;$/;"	m	struct:mc_command	typeref:typename:uint64_t
header	include/fsl_qe.h	/^	} header;$/;"	m	struct:qe_firmware	typeref:struct:qe_firmware::qe_header
header	net/dns.h	/^struct header {$/;"	s
header	tools/default_image.c	/^static image_header_t header;$/;"	v	typeref:typename:image_header_t	file:
header	tools/fdtgrep.c	/^	int header;		\/* Output an FDT header *\/$/;"	m	struct:display_info	typeref:typename:int	file:
header	tools/fit_image.c	/^static image_header_t header;$/;"	v	typeref:typename:image_header_t	file:
header	tools/imximage.h	/^	ivt_header_t header;$/;"	m	struct:__anon504a956c0a08	typeref:typename:ivt_header_t
header	tools/imximage.h	/^	ivt_header_t header;$/;"	m	struct:__anon504a956c0c08	typeref:typename:ivt_header_t
header	tools/imximage.h	/^	} header;$/;"	m	struct:imx_header	typeref:union:imx_header::__anon504a956c0f0a
header	tools/mksunxiboot.c	/^	struct boot_file_head header;$/;"	m	struct:boot_img	typeref:struct:boot_file_head	file:
header	tools/mxsimage.h	/^	uint32_t	header;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
header	tools/mxsimage.h	/^	} header;$/;"	m	struct:sb_command	typeref:struct:sb_command::__anonc4848c960308
header	tools/rkimage.c	/^static uint32_t header;$/;"	v	typeref:typename:uint32_t	file:
header	tools/socfpgaimage.c	/^} header;$/;"	v	typeref:struct:socfpga_header
header0_info	tools/rkcommon.c	/^struct header0_info {$/;"	s	file:
headerPopup	scripts/kconfig/qconf.h	/^	Q3PopupMenu* headerPopup;$/;"	m	class:ConfigList	typeref:typename:Q3PopupMenu *
header_blocks	tools/mxsimage.h	/^	uint16_t	header_blocks;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
header_bytes	arch/x86/include/asm/coreboot_tables.h	/^	u32 header_bytes;$/;"	m	struct:cb_header	typeref:typename:u32
header_checksum	arch/x86/include/asm/coreboot_tables.h	/^	u32 header_checksum;$/;"	m	struct:cb_header	typeref:typename:u32
header_crc32	include/part_efi.h	/^	__le32 header_crc32;$/;"	m	struct:_gpt_header	typeref:typename:__le32
header_desc	drivers/usb/gadget/ether.c	/^static const struct usb_cdc_header_desc header_desc = {$/;"	v	typeref:typename:const struct usb_cdc_header_desc	file:
header_function	include/usbdescriptors.h	/^		struct usb_class_header_function_descriptor header_function;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_header_function_descriptor
header_id	disk/part_iso.h	/^	unsigned char	header_id;		\/* Header ID must be 0x01 *\/$/;"	m	struct:iso_val_entry	typeref:typename:unsigned char
header_id	disk/part_iso.h	/^	unsigned char	header_id;		\/* Header ID must be 0x90 or 0x91 *\/$/;"	m	struct:iso_header_entry	typeref:typename:unsigned char
header_length	arch/x86/include/asm/coreboot_tables.h	/^	u32 header_length;$/;"	m	struct:cb_cmos_option_table	typeref:typename:u32
header_print_comment	scripts/kconfig/confdata.c	/^header_print_comment(FILE *fp, const char *value, void *arg)$/;"	f	typeref:typename:void	file:
header_print_symbol	scripts/kconfig/confdata.c	/^header_print_symbol(FILE *fp, struct symbol *sym, const char *value, void *arg)$/;"	f	typeref:typename:void	file:
header_printer_cb	scripts/kconfig/confdata.c	/^static struct conf_printer header_printer_cb =$/;"	v	typeref:struct:conf_printer	file:
header_size	include/part_efi.h	/^	__le32 header_size;$/;"	m	struct:_gpt_header	typeref:typename:__le32
header_size	tools/imagetool.h	/^	uint32_t header_size;$/;"	m	struct:image_type_params	typeref:typename:uint32_t
header_size_ptr	tools/imximage.c	/^static uint32_t *header_size_ptr;$/;"	v	typeref:typename:uint32_t *	file:
header_version	arch/x86/cpu/intel_common/microcode.c	/^	uint header_version;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
headersize	include/efi.h	/^	u32 headersize;$/;"	m	struct:efi_table_hdr	typeref:typename:u32
headersz_lsb	tools/kwbimage.h	/^	uint16_t headersz_lsb;          \/* A-B *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint16_t
headersz_lsb	tools/kwbimage.h	/^	uint16_t headersz_lsb;$/;"	m	struct:opt_hdr_v1	typeref:typename:uint16_t
headersz_msb	tools/kwbimage.h	/^	uint8_t  headersz_msb;          \/* 9 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
headersz_msb	tools/kwbimage.h	/^	uint8_t  headersz_msb;$/;"	m	struct:opt_hdr_v1	typeref:typename:uint8_t
headertype	tools/kwbimage.h	/^	uint8_t  headertype;$/;"	m	struct:opt_hdr_v1	typeref:typename:uint8_t
heads	disk/part_amiga.h	/^    u32 heads;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
heads	drivers/block/sata_dwc.h	/^	u16			heads;$/;"	m	struct:ata_device	typeref:typename:u16
heads	include/ata.h	/^	unsigned short	heads;		\/* "physical" heads *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
heads	include/fat.h	/^	__u16	heads;		\/* Number of heads *\/$/;"	m	struct:boot_sector	typeref:typename:__u16
headset	arch/arm/dts/rk3288-miniarm.dtsi	/^	headset: nau8825@1a {$/;"	l
headsetcodec	arch/arm/dts/rk3288-veyron.dtsi	/^	headsetcodec: ts3a227e@3b {$/;"	l
heap	lib/zlib/deflate.h	/^    int heap[2*L_CODES+1];      \/* heap used to build the Huffman trees *\/$/;"	m	struct:internal_state	typeref:typename:int[]
heap_end_ptr	arch/x86/include/asm/bootparam.h	/^	__u16	heap_end_ptr;$/;"	m	struct:setup_header	typeref:typename:__u16
heap_len	lib/zlib/deflate.h	/^    int heap_len;               \/* number of elements in the heap *\/$/;"	m	struct:internal_state	typeref:typename:int
heap_max	lib/zlib/deflate.h	/^    int heap_max;               \/* element of largest frequency *\/$/;"	m	struct:internal_state	typeref:typename:int
heartbeat	board/esd/vme8349/caddy.h	/^	uint32_t heartbeat;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
hec0	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hec0;           \/* 0xae28 - HT Error Capture 0 register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hec1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hec1;           \/* 0xae2c - HT Error Capture 1 register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hec2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hec2;           \/* 0xae30 - HT Error Capture 2 register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hecdr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hecdr;          \/* 0xae10 - HT Error Capture Disbale register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hecsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hecsr;          \/* 0xae20 - HT Error Capture Status register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hedr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hedr;           \/* 0xae00 - HT Error Detect register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
heier	arch/powerpc/include/asm/immap_86xx.h	/^	uint    heier;          \/* 0xae08 - HT Error Interrupt Enable register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
height	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 height;$/;"	m	struct:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a::__anon775fc5441e08	typeref:typename:u32
height	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 height;$/;"	m	struct:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a::__anon775fc5441f08	typeref:typename:u32
height	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 height;$/;"	m	struct:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a::__anon775fc5442108	typeref:typename:u32
height	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 height;$/;"	m	struct:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a::__anon775fc5442208	typeref:typename:u32
height	arch/sandbox/cpu/sdl.c	/^	int height;$/;"	m	struct:sdl_info	typeref:typename:int	file:
height	drivers/video/da8xx-fb.h	/^	unsigned short	height;$/;"	m	struct:da8xx_panel	typeref:typename:unsigned short
height	drivers/video/stb_truetype.h	/^   int   height;$/;"	m	struct:stbtt_pack_context	typeref:typename:int
height	drivers/video/stb_truetype.h	/^   int width,height;$/;"	m	struct:__anonce392f790f08	typeref:typename:int
height	drivers/video/tegra.c	/^	int height;			\/* height in pixels *\/$/;"	m	struct:tegra_lcd_priv	typeref:typename:int	file:
height	include/bmp_layout.h	/^	__u32	height;$/;"	m	struct:bmp_header	typeref:typename:__u32
height	include/efi_api.h	/^	u32 height;$/;"	m	struct:efi_gop_mode_info	typeref:typename:u32
height	include/linux/fb.h	/^	__u32 height;			\/* height of picture in mm    *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
height	include/linux/fb.h	/^	__u32 height;$/;"	m	struct:fb_copyarea	typeref:typename:__u32
height	include/linux/fb.h	/^	__u32 height;$/;"	m	struct:fb_fillrect	typeref:typename:__u32
height	include/linux/fb.h	/^	__u32 height;$/;"	m	struct:fb_image	typeref:typename:__u32
height	include/linux/fb.h	/^	__u32 height;$/;"	m	struct:fb_image_user	typeref:typename:__u32
height	include/smbios.h	/^	u8 height;$/;"	m	struct:smbios_type3	typeref:typename:u8
height	include/stdio_dev.h	/^	ushort	height;			\/* Vertical resolution			*\/$/;"	m	struct:__anon77b06a0f0108	typeref:typename:ushort
height	include/video_easylogo.h	/^	int		height;$/;"	m	struct:__anon1a9c56c70108	typeref:typename:int
height	tools/bmp_logo.c	/^	uint16_t height;$/;"	m	struct:bitmap_s	typeref:typename:uint16_t	file:
height	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
height_width	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 height_width;			\/* 0xCC *\/$/;"	m	struct:venc_regs	typeref:typename:u32
hello	include/dm-demo.h	/^	int (*hello)(struct udevice *dev, int ch);$/;"	m	struct:demo_ops	typeref:typename:int (*)(struct udevice * dev,int ch)
hello_world	examples/standalone/hello_world.c	/^int hello_world (int argc, char * const argv[])$/;"	f	typeref:typename:int
help	Makefile	/^help:$/;"	t
help	arch/sandbox/include/asm/getopt.h	/^	const char *help;$/;"	m	struct:sandbox_cmdline_option	typeref:typename:const char *
help	board/hisilicon/hikey/build-tf.mak	/^help:$/;"	t
help	include/command.h	/^	char		*help;		\/* Help  message	(long)	*\/$/;"	m	struct:cmd_tbl_s	typeref:typename:char *
help	scripts/checkpatch.pl	/^sub help {$/;"	s
help	scripts/kconfig/Makefile	/^help:$/;"	t
help	scripts/kconfig/expr.h	/^	char *help;$/;"	m	struct:menu	typeref:typename:char *
help	scripts/kconfig/zconf.y	/^help: help_start T_HELPTEXT$/;"	l
help1	scripts/kconfig/gconf.glade	/^	    <widget class="GtkMenuItem" id="help1">$/;"	i
help1_menu	scripts/kconfig/gconf.glade	/^		<widget class="GtkMenu" id="help1_menu">$/;"	i
helpText	scripts/kconfig/qconf.h	/^	ConfigInfoView *helpText;$/;"	m	class:ConfigMainWindow	typeref:typename:ConfigInfoView *
help_start	scripts/kconfig/zconf.y	/^help_start: T_HELP T_EOL$/;"	l
hep	drivers/usb/musb-new/musb_host.h	/^	struct usb_host_endpoint *hep;		\/* usbcore info *\/$/;"	m	struct:musb_qh	typeref:struct:usb_host_endpoint *
hep	drivers/usb/musb-new/musb_uboot.c	/^	struct usb_host_endpoint hep;$/;"	m	struct:int_queue	typeref:struct:usb_host_endpoint	file:
hep	drivers/usb/musb-new/musb_uboot.h	/^	struct usb_host_endpoint hep;$/;"	m	struct:musb_host_data	typeref:struct:usb_host_endpoint
here	arch/arm/lib/crt0.S	/^here:$/;"	l
hex	common/kgdb.c	/^hex(unsigned char ch)$/;"	f	typeref:typename:int	file:
hex1_bin	common/s_record.c	/^static int hex1_bin (char c)$/;"	f	typeref:typename:int	file:
hex2_bin	common/s_record.c	/^static int hex2_bin (char *s)$/;"	f	typeref:typename:int	file:
hex2mem	common/kgdb.c	/^hex2mem(char *buf, char *mem, int count)$/;"	f	typeref:typename:char *	file:
hexToInt	common/kgdb.c	/^hexToInt(char **ptr, int *intValue)$/;"	f	typeref:typename:int	file:
hex_asc	lib/vsprintf.c	/^static const char hex_asc[] = "0123456789abcdef";$/;"	v	typeref:typename:const char[]	file:
hex_asc_hi	lib/vsprintf.c	/^#define hex_asc_hi(/;"	d	file:
hex_asc_lo	lib/vsprintf.c	/^#define hex_asc_lo(/;"	d	file:
hex_digit	arch/powerpc/cpu/mpc5xx/spi.c	/^static const char * const hex_digit = "0123456789ABCDEF";$/;"	v	typeref:typename:const char * const	file:
hex_digit	arch/powerpc/cpu/mpc8260/spi.c	/^static const char * const hex_digit = "0123456789ABCDEF";$/;"	v	typeref:typename:const char * const	file:
hex_digit	arch/powerpc/cpu/mpc8xx/spi.c	/^static const char * const hex_digit = "0123456789ABCDEF";$/;"	v	typeref:typename:const char * const	file:
hex_to_1_10mv	board/freescale/common/zm7300.c	/^static const uint16_t hex_to_1_10mv[] = {$/;"	v	typeref:typename:const uint16_t[]	file:
hexbuf	arch/arm/lib/debug.S	/^hexbuf:		.space 16$/;"	l
hexchars	common/kgdb.c	/^static const char hexchars[]="0123456789abcdef";$/;"	v	typeref:typename:const char[]	file:
hexdump	arch/sh/lib/bootm.c	/^static void hexdump(unsigned char *buf, int len)$/;"	f	typeref:typename:void	file:
hexdump	drivers/net/fsl-mc/dpio/qbman_private.h	/^static inline void hexdump(const void *ptr, size_t sz)$/;"	f	typeref:typename:void
hexnumlen	tools/gdb/remote.c	/^hexnumlen (ULONGEST num)$/;"	f	typeref:typename:int	file:
hexnumstr	tools/gdb/remote.c	/^hexnumstr (char *buf, ULONGEST num)$/;"	f	typeref:typename:int	file:
hexport_r	lib/hashtable.c	/^ssize_t hexport_r(struct hsearch_data *htab, const char sep, int flag,$/;"	f	typeref:typename:ssize_t
hfir	drivers/usb/host/dwc2.h	/^	u32			hfir;$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
hflbaddr	drivers/usb/host/dwc2.h	/^	u32			hflbaddr;$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
hfltr_ctrl	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 hfltr_ctrl;				\/* 0x24 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
hfmax	include/linux/fb.h	/^	__u32 hfmax;			\/* hfreq upper limit (Hz) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
hfmin	include/linux/fb.h	/^	__u32 hfmin;			\/* hfreq lower limit (Hz) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
hfnum	drivers/usb/host/dwc2.h	/^	u32			hfnum;$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
hfp	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			hfp;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
hfp	drivers/video/am335x-fb.h	/^	unsigned int	hfp;		\/* Horizontal front porch *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
hfp	drivers/video/da8xx-fb.h	/^	int		hfp;		\/* Horizontal front porch *\/$/;"	m	struct:da8xx_panel	typeref:typename:int
hfp_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hfp_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hfp_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hfp_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hfp_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hfp_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hfp_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hfp_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hfront_porch	include/fdtdec.h	/^	struct timing_entry hfront_porch;	\/* hor. front porch *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
hfs_mfd	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 hfs_mfd;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
hfs_mfn	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 hfs_mfn;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
hfs_op	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 hfs_op;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
hfunc	include/bedbug/ppc.h	/^  int (*hfunc)(struct ppc_ctx *);$/;"	m	struct:opcode	typeref:typename:int (*)(struct ppc_ctx *)
hg_config	include/fsl_memac.h	/^	u32 hg_config;	\/* HiGig2 control and configuration *\/$/;"	m	struct:memac	typeref:typename:u32
hg_execute_cmd	scripts/get_maintainer.pl	/^sub hg_execute_cmd {$/;"	s
hg_fifos_status	include/fsl_memac.h	/^	u32 hg_fifos_status;	\/* HiGig2 fifos status *\/$/;"	m	struct:memac	typeref:typename:u32
hg_pause_quanta	include/fsl_memac.h	/^	u32 hg_pause_quanta;	\/* HiGig2 pause quanta *\/$/;"	m	struct:memac	typeref:typename:u32
hg_pause_thresh	include/fsl_memac.h	/^	u32 hg_pause_thresh;	\/* HiGig2 pause quanta threshold *\/$/;"	m	struct:memac	typeref:typename:u32
hgrx_pause_status	include/fsl_memac.h	/^	u32 hgrx_pause_status;	\/* HiGig2 rx pause quanta status *\/$/;"	m	struct:memac	typeref:typename:u32
hhea	drivers/video/stb_truetype.h	/^   int loca,head,glyf,hhea,hmtx,kern; \/\/ table locations as offset from start of .ttf$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
hhmmss	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 hhmmss;		\/* 0x108 *\/$/;"	m	struct:sunxi_rtc	typeref:typename:u32
hhmmss	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 hhmmss;		\/* 0x110 *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
hhmmss	arch/arm/include/asm/arch/timer.h	/^	u32 hhmmss;		\/* 0x108 *\/$/;"	m	struct:sunxi_rtc	typeref:typename:u32
hhmmss	arch/arm/include/asm/arch/timer.h	/^	u32 hhmmss;		\/* 0x110 *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
hi	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 hi;			\/* 0xa8 *\/$/;"	m	struct:sunxi_64cnt	typeref:typename:u32
hi	arch/arm/include/asm/arch/timer.h	/^	u32 hi;			\/* 0xa8 *\/$/;"	m	struct:sunxi_64cnt	typeref:typename:u32
hi	arch/blackfin/include/asm/blackfin_local.h	/^#define hi(/;"	d
hi	arch/mips/include/asm/ptrace.h	/^	unsigned long hi;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
hi	arch/x86/cpu/mp_init.c	/^	uint32_t hi;$/;"	m	struct:saved_msr	typeref:typename:uint32_t	file:
hi	arch/x86/include/asm/coreboot_tables.h	/^	u32 hi;$/;"	m	struct:cbuint64	typeref:typename:u32
hi	arch/x86/include/asm/msr.h	/^	uint32_t hi;$/;"	m	struct:msr_t	typeref:typename:uint32_t
hi	cmd/mii.c	/^	ushort hi;$/;"	m	struct:_MII_field_desc_t	typeref:typename:ushort	file:
hi	drivers/net/armada100_fec.h	/^	u32 hi;$/;"	m	struct:addr_table_entry_t	typeref:typename:u32
hi	drivers/net/calxedaxgmac.c	/^		u32 hi;         \/* 0x40 *\/$/;"	m	struct:xgmac_regs::__anon986dd3dc0108	typeref:typename:u32	file:
hi6220_clk_disable	board/hisilicon/hikey/hikey.c	/^void hi6220_clk_disable(u32 bitfield, unsigned int *clk_base)$/;"	f	typeref:typename:void
hi6220_clk_enable	board/hisilicon/hikey/hikey.c	/^void hi6220_clk_enable(u32 bitfield, unsigned int *clk_base)$/;"	f	typeref:typename:void
hi6220_dwmci_add_port	drivers/mmc/hi6220_dw_mmc.c	/^int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)$/;"	f	typeref:typename:int
hi6220_dwmci_core_init	drivers/mmc/hi6220_dw_mmc.c	/^static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)$/;"	f	typeref:typename:int	file:
hi6220_gpio	board/hisilicon/hikey/hikey.c	/^static const struct hikey_gpio_platdata hi6220_gpio[] = {$/;"	v	typeref:typename:const struct hikey_gpio_platdata[]	file:
hi6220_gpio_direction_input	drivers/gpio/hi6220_gpio.c	/^static int hi6220_gpio_direction_input(struct udevice *dev, unsigned int gpio)$/;"	f	typeref:typename:int	file:
hi6220_gpio_direction_output	drivers/gpio/hi6220_gpio.c	/^static int hi6220_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
hi6220_gpio_get_value	drivers/gpio/hi6220_gpio.c	/^static int hi6220_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
hi6220_gpio_probe	drivers/gpio/hi6220_gpio.c	/^static int hi6220_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
hi6220_gpio_set_value	drivers/gpio/hi6220_gpio.c	/^static int hi6220_gpio_set_value(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
hi6220_mmc_config	arch/arm/cpu/armv8/hisilicon/pinmux.c	/^static int hi6220_mmc_config(int peripheral)$/;"	f	typeref:typename:int	file:
hi6220_pinmux0_regs	arch/arm/include/asm/arch-hi6220/pinmux.h	/^struct hi6220_pinmux0_regs {$/;"	s
hi6220_pinmux1_regs	arch/arm/include/asm/arch-hi6220/pinmux.h	/^struct hi6220_pinmux1_regs {$/;"	s
hi6220_pinmux_config	arch/arm/cpu/armv8/hisilicon/pinmux.c	/^int hi6220_pinmux_config(int peripheral)$/;"	f	typeref:typename:int
hi6220_pmussi_init	board/hisilicon/hikey/hikey.c	/^static void hi6220_pmussi_init(void)$/;"	f	typeref:typename:void	file:
hi6220_uart_config	arch/arm/cpu/armv8/hisilicon/pinmux.c	/^static void hi6220_uart_config(int peripheral)$/;"	f	typeref:typename:void	file:
hi6553_init	drivers/power/pmic/pmic_hi6553.c	/^static void hi6553_init(void)$/;"	f	typeref:typename:void	file:
hi6553_readb	drivers/power/pmic/pmic_hi6553.c	/^uint8_t hi6553_readb(u32 offset)$/;"	f	typeref:typename:uint8_t
hi6553_writeb	drivers/power/pmic/pmic_hi6553.c	/^void hi6553_writeb(u32 offset, uint8_t value)$/;"	f	typeref:typename:void
hi_cylinder	disk/part_amiga.h	/^    u32 hi_cylinder;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
hi_prot_id	drivers/ddr/altera/sdram.c	/^	u32	hi_prot_id;$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
hicb_ch	include/gdsys_fpga.h	/^	struct ihs_fpga_channel hicb_ch[32];	\/* 0x0500 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_fpga_channel[32]
hid	include/usbdescriptors.h	/^		struct usb_class_hid_descriptor hid;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_hid_descriptor
hidden	include/fat.h	/^	__u32	hidden;		\/* Number of hidden sectors *\/$/;"	m	struct:boot_sector	typeref:typename:__u32
hidrev	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	hidrev;		\/* 0x04: APB_MISC_GP_HIDREV *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hidrev	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	hidrev;		\/* 0x04: APB_MISC_GP_HIDREV *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hidrev	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	hidrev;		\/* 0x04: APB_MISC_GP_HIDREV *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hidrev	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	hidrev;		\/* 0x04: APB_MISC_GP_HIDREV *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hidrev	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	hidrev;		\/* 0x04: APB_MISC_GP_HIDREV *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hier	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	hier;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
high	arch/arc/lib/libgcc2.h	/^	struct DWstruct {Wtype high, low;};$/;"	m	struct:DWstruct	typeref:typename:Wtype
high	arch/arc/lib/libgcc2.h	/^	struct DWstruct {Wtype low, high;};$/;"	m	struct:DWstruct	typeref:typename:Wtype
high	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t high;$/;"	m	struct:cmd_thermal_set_trip_request	typeref:typename:int32_t
high	arch/arm/include/asm/setup.h	/^	u32 high;$/;"	m	struct:tag_serialnr	typeref:typename:u32
high	arch/blackfin/lib/muldi3.c	/^	SItype low, high;$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
high	arch/m68k/lib/ashldi3.c	/^struct DIstruct {SItype high, low;};$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
high	arch/m68k/lib/lshrdi3.c	/^struct DIstruct {SItype high, low;};$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
high	arch/m68k/lib/muldi3.c	/^struct DIstruct {SItype high, low;};$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
high	arch/microblaze/lib/muldi3.c	/^	SItype low, high;$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
high	arch/mips/lib/libgcc.h	/^	int high, low;$/;"	m	struct:DWstruct	typeref:typename:int
high	arch/mips/lib/libgcc.h	/^	int low, high;$/;"	m	struct:DWstruct	typeref:typename:int
high	arch/nds32/include/asm/setup.h	/^	u32 high;$/;"	m	struct:tag_serialnr	typeref:typename:u32
high	arch/nios2/lib/libgcc.c	/^struct DWstruct { Wtype low, high;};$/;"	m	struct:DWstruct	typeref:typename:Wtype	file:
high	arch/sh/lib/libgcc.h	/^	int high, low;$/;"	m	struct:DWstruct	typeref:typename:int
high	arch/sh/lib/libgcc.h	/^	int low, high;$/;"	m	struct:DWstruct	typeref:typename:int
high	drivers/block/sata_dwc.c	/^	u32 high;$/;"	m	struct:dmareg	typeref:typename:u32	file:
high	drivers/crypto/fsl/desc_constr.h	/^		u32 high;$/;"	m	struct:ptr_addr_t::__anona38440c40108	typeref:typename:u32
high	drivers/net/e1000.h	/^	volatile uint32_t high;	\/* receive address high *\/$/;"	m	struct:e1000_rar	typeref:typename:volatile uint32_t
high	drivers/net/pch_gbe.h	/^	u32 high;$/;"	m	struct:pch_gbe_regs_mac_adr	typeref:typename:u32
high_addr	drivers/net/mvgbe.h	/^	u32 high_addr;		\/* Window high address in u32 form *\/$/;"	m	struct:mvgbe_winparam	typeref:typename:u32
high_capacity	include/mmc.h	/^	int high_capacity;$/;"	m	struct:mmc	typeref:typename:int
high_cyl	disk/part_amiga.h	/^    u32 high_cyl;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
high_iso_rx	include/linux/usb/musb.h	/^	unsigned	high_iso_rx:1;	\/* Rx ep required for HD iso *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned:1
high_iso_tx	include/linux/usb/musb.h	/^	unsigned	high_iso_tx:1;	\/* Tx ep required for HB iso *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned:1
high_rdsk_block	disk/part_amiga.h	/^    u32 high_rdsk_block;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
high_table_limit	arch/x86/include/asm/global_data.h	/^	u32 high_table_limit;$/;"	m	struct:arch_global_data	typeref:typename:u32
high_table_malloc	arch/x86/lib/coreboot_table.c	/^void *high_table_malloc(size_t bytes)$/;"	f	typeref:typename:void *
high_table_ptr	arch/x86/include/asm/global_data.h	/^	u32 high_table_ptr;$/;"	m	struct:arch_global_data	typeref:typename:u32
high_table_reserve	arch/x86/lib/coreboot_table.c	/^int high_table_reserve(void)$/;"	f	typeref:typename:int
high_water	lib/zlib/deflate.h	/^    ulg high_water;$/;"	m	struct:internal_state	typeref:typename:ulg
highest_common_derated_caslat	include/common_timing_params.h	/^	unsigned int highest_common_derated_caslat;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
highest_data_key	fs/ubifs/key.h	/^static inline void highest_data_key(const struct ubifs_info *c,$/;"	f	typeref:typename:void
highest_ino_key	fs/ubifs/key.h	/^static inline void highest_ino_key(const struct ubifs_info *c,$/;"	f	typeref:typename:void
highest_inum	fs/ubifs/ubifs-media.h	/^	__le64 highest_inum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
highest_inum	fs/ubifs/ubifs.h	/^	ino_t highest_inum;$/;"	m	struct:ubifs_info	typeref:typename:ino_t
highest_lnum	drivers/mtd/ubi/ubi.h	/^	int highest_lnum;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
highest_vol_id	drivers/mtd/ubi/ubi.h	/^	int highest_vol_id;$/;"	m	struct:ubi_attach_info	typeref:typename:int
highspeed	include/linux/usb/composite.h	/^	unsigned		highspeed:1;$/;"	m	struct:usb_configuration	typeref:typename:unsigned:1
hikey_gpio_platdata	arch/arm/include/asm/arch-hi6220/gpio.h	/^struct hikey_gpio_platdata {$/;"	s
hikey_mem_map	board/hisilicon/hikey/hikey.c	/^static struct mm_region hikey_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
himage_size	include/edid.h	/^	unsigned char himage_size;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
himage_vimage_size_hi	include/edid.h	/^	unsigned char himage_vimage_size_hi;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
himport_r	lib/hashtable.c	/^int himport_r(struct hsearch_data *htab,$/;"	f	typeref:typename:int
hint	arch/x86/include/asm/sfi.h	/^	u32	hint;		\/* MWAIT hint *\/$/;"	m	struct:sfi_cstate_table_entry	typeref:typename:u32
hint	include/bedbug/ppc.h	/^  unsigned int	hint;		\/* A bitwise-inclusive-OR of the$/;"	m	struct:opcode	typeref:typename:unsigned int
hint	include/bedbug/ppc.h	/^  unsigned int	hint;		\/* A bitwise-inclusive-OR of the$/;"	m	struct:operand	typeref:typename:unsigned int
hioctrl	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	u32	hioctrl;$/;"	m	struct:socfpga_freeze_controller	typeref:typename:u32
hiprio_config	arch/powerpc/include/asm/immap_512x.h	/^	u32 hiprio_config;	\/* High Priority Configuration *\/$/;"	m	struct:ddr512x	typeref:typename:u32
hird_threshold	drivers/usb/dwc3/core.h	/^	u8			hird_threshold;$/;"	m	struct:dwc3	typeref:typename:u8
hird_threshold	include/dwc3-uboot.h	/^	u8 hird_threshold;$/;"	m	struct:dwc3_device	typeref:typename:u8
his_eol	cmd/load.c	/^static char his_eol;        \/* character he needs at end of packet *\/$/;"	v	typeref:typename:char	file:
his_pad_char	cmd/load.c	/^static char his_pad_char;   \/* pad chars he needs *\/$/;"	v	typeref:typename:char	file:
his_pad_count	cmd/load.c	/^static int  his_pad_count;  \/* number of pad chars he needs *\/$/;"	v	typeref:typename:int	file:
his_quote	cmd/load.c	/^static char his_quote;      \/* quote chars he'll use *\/$/;"	v	typeref:typename:char	file:
hist_add_idx	common/cli_readline.c	/^static int hist_add_idx;$/;"	v	typeref:typename:int	file:
hist_cur	common/cli_readline.c	/^static int hist_cur = -1;$/;"	v	typeref:typename:int	file:
hist_init	common/cli_readline.c	/^static void hist_init(void)$/;"	f	typeref:typename:void	file:
hist_lines	common/cli_readline.c	/^static char hist_lines[HIST_MAX][HIST_SIZE + 1];	\/* Save room for NULL *\/$/;"	v	typeref:typename:char[][]	file:
hist_list	common/cli_readline.c	/^static char *hist_list[HIST_MAX];$/;"	v	typeref:typename:char * []	file:
hist_max	common/cli_readline.c	/^static int hist_max;$/;"	v	typeref:typename:int	file:
hist_next	common/cli_readline.c	/^static char *hist_next(void)$/;"	f	typeref:typename:char *	file:
hist_num	common/cli_readline.c	/^static unsigned hist_num;$/;"	v	typeref:typename:unsigned	file:
hist_prev	common/cli_readline.c	/^static char *hist_prev(void)$/;"	f	typeref:typename:char *	file:
hit	include/linux/compiler.h	/^			unsigned long hit;$/;"	m	struct:ftrace_branch_data::__anonaf531ce8010a::__anonaf531ce80308	typeref:typename:unsigned long
hitachi_tx18d42vm_init	drivers/video/hitachi_tx18d42vm_lcd.c	/^int hitachi_tx18d42vm_init(void)$/;"	f	typeref:typename:int
hitkninasyncpkt	drivers/net/mvgbe.h	/^	u32 hitkninasyncpkt;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
hitkninlopkt	drivers/net/mvgbe.h	/^	u32 hitkninlopkt;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
hits	include/blk.h	/^	unsigned hits;$/;"	m	struct:block_cache_stats	typeref:typename:unsigned
hiubus	arch/arm/dts/meson-gxbb.dtsi	/^		hiubus: hiubus@c883c000 {$/;"	l
hiwar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwar1;         \/* 0xadf0 - HT Inbound Window 1 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwar2;         \/* 0xadd0 - HT Inbound Window 2 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwar3;         \/* 0xadb0 - HT Inbound Window 3 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwar4;         \/* 0xad90 - HT Inbound Window 4 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwbar1;        \/* 0xade8 - HT Inbound Window 1 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwbar2;        \/* 0xadc8 - HT Inbound Window 2 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwbar3;        \/* 0xada8 - HT Inbound Window 3 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwbar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwbar4;        \/* 0xad88 - HT Inbound Window 4 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwtar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwtar1;        \/* 0xade0 - HT Inbound Window 1 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwtar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwtar2;        \/* 0xadc0 - HT Inbound Window 2 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwtar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwtar3;        \/* 0xada0 - HT Inbound Window 3 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hiwtar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    hiwtar4;        \/* 0xad80 - HT Inbound Window 4 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hl	scripts/kconfig/lxdialog/dialog.h	/^	int hl;		\/* highlight this item *\/$/;"	m	struct:dialog_color	typeref:typename:int
hlist_add_after	include/linux/list.h	/^static inline void hlist_add_after(struct hlist_node *n,$/;"	f	typeref:typename:void
hlist_add_before	include/linux/list.h	/^static inline void hlist_add_before(struct hlist_node *n,$/;"	f	typeref:typename:void
hlist_add_head	include/linux/list.h	/^static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)$/;"	f	typeref:typename:void
hlist_del	include/linux/list.h	/^static inline void hlist_del(struct hlist_node *n)$/;"	f	typeref:typename:void
hlist_del_init	include/linux/list.h	/^static inline void hlist_del_init(struct hlist_node *n)$/;"	f	typeref:typename:void
hlist_empty	include/linux/list.h	/^static inline int hlist_empty(const struct hlist_head *h)$/;"	f	typeref:typename:int
hlist_entry	include/linux/list.h	/^#define hlist_entry(/;"	d
hlist_for_each	include/linux/list.h	/^#define hlist_for_each(/;"	d
hlist_for_each_entry	include/linux/list.h	/^#define hlist_for_each_entry(/;"	d
hlist_for_each_entry_continue	include/linux/list.h	/^#define hlist_for_each_entry_continue(/;"	d
hlist_for_each_entry_from	include/linux/list.h	/^#define hlist_for_each_entry_from(/;"	d
hlist_for_each_entry_safe	include/linux/list.h	/^#define hlist_for_each_entry_safe(/;"	d
hlist_for_each_safe	include/linux/list.h	/^#define hlist_for_each_safe(/;"	d
hlist_head	include/linux/list.h	/^struct hlist_head {$/;"	s
hlist_node	include/linux/list.h	/^struct hlist_node {$/;"	s
hlist_unhashed	include/linux/list.h	/^static inline int hlist_unhashed(const struct hlist_node *h)$/;"	f	typeref:typename:int
hlt	cmd/fdc.c	/^	unsigned char hlt;	\/* head load time *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned char	file:
hmadr	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 hmadr;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
hmask	include/commproc.h	/^	ushort	hmask;		\/* user defined frm addr mask *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
hmatch_r	lib/hashtable.c	/^int hmatch_r(const char *match, int last_idx, ENTRY ** retval,$/;"	f	typeref:typename:int
hmatrix_read	arch/avr32/include/asm/hmatrix-common.h	/^#define hmatrix_read(/;"	d
hmatrix_regs	arch/avr32/include/asm/hmatrix-common.h	/^struct hmatrix_regs {$/;"	s
hmatrix_slave_read	arch/avr32/include/asm/hmatrix-common.h	/^#define hmatrix_slave_read(/;"	d
hmatrix_slave_write	arch/avr32/include/asm/hmatrix-common.h	/^#define hmatrix_slave_write(/;"	d
hmatrix_write	arch/avr32/include/asm/hmatrix-common.h	/^#define hmatrix_write(/;"	d
hmc_mode	board/nokia/rx51/tag_omap.h	/^	u8		hmc_mode;$/;"	m	struct:omap_usb_config	typeref:typename:u8
hmtx	drivers/video/stb_truetype.h	/^   int loca,head,glyf,hhea,hmtx,kern; \/\/ table locations as offset from start of .ttf$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
hnf_pstate_poll	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^hnf_pstate_poll:$/;"	l
hnf_set_pstate	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^hnf_set_pstate:$/;"	l
hob_feature	include/libata.h	/^	u8			hob_feature;	\/* additional data *\/$/;"	m	struct:ata_taskfile	typeref:typename:u8
hob_guid	arch/x86/include/asm/fsp/fsp_hob.h	/^struct hob_guid {$/;"	s
hob_header	arch/x86/include/asm/fsp/fsp_hob.h	/^struct hob_header {$/;"	s
hob_lbah	include/libata.h	/^	u8			hob_lbah;$/;"	m	struct:ata_taskfile	typeref:typename:u8
hob_lbal	include/libata.h	/^	u8			hob_lbal;$/;"	m	struct:ata_taskfile	typeref:typename:u8
hob_lbam	include/libata.h	/^	u8			hob_lbam;$/;"	m	struct:ata_taskfile	typeref:typename:u8
hob_list	arch/x86/include/asm/global_data.h	/^	void *hob_list;			\/* FSP HOB list *\/$/;"	m	struct:arch_global_data	typeref:typename:void *
hob_mem_alloc	arch/x86/include/asm/fsp/fsp_hob.h	/^struct hob_mem_alloc {$/;"	s
hob_nsect	include/libata.h	/^	u8			hob_nsect;	\/* to support LBA48 *\/$/;"	m	struct:ata_taskfile	typeref:typename:u8
hob_res_desc	arch/x86/include/asm/fsp/fsp_hob.h	/^struct hob_res_desc {$/;"	s
hob_type	arch/x86/lib/fsp/cmd_fsp.c	/^static char *hob_type[] = {$/;"	v	typeref:typename:char * []	file:
hold	drivers/i2c/i2c-uniphier.c	/^	u32 hold;			\/* hold time control *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
hold	lib/zlib/inflate.h	/^    unsigned long hold;         \/* input bit accumulator *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned long
hold_cores_in_reset	arch/powerpc/cpu/mpc85xx/mp.c	/^int hold_cores_in_reset(int verbose)$/;"	f	typeref:typename:int
holdoff_release	arch/arm/cpu/armv7/ls102xa/psci.S	/^holdoff_release:$/;"	l
hole	net/net.c	/^struct hole {$/;"	s	file:
hooked_block_markbad	drivers/mtd/nand/mxs_nand.c	/^	int		(*hooked_block_markbad)(struct mtd_info *mtd,$/;"	m	struct:mxs_nand_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs)	file:
hooked_read_oob	drivers/mtd/nand/mxs_nand.c	/^	int		(*hooked_read_oob)(struct mtd_info *mtd,$/;"	m	struct:mxs_nand_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t from,struct mtd_oob_ops * ops)	file:
hooked_write_oob	drivers/mtd/nand/mxs_nand.c	/^	int		(*hooked_write_oob)(struct mtd_info *mtd,$/;"	m	struct:mxs_nand_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t to,struct mtd_oob_ops * ops)	file:
hori	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 hori[2];			\/* f0 *\/$/;"	m	struct:de_vi	typeref:typename:u32[2]
hori	arch/arm/include/asm/arch/display2.h	/^	u32 hori[2];			\/* f0 *\/$/;"	m	struct:de_vi	typeref:typename:u32[2]
horizontal_active	include/edid.h	/^	unsigned char horizontal_active;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
horizontal_active_blanking_hi	include/edid.h	/^	unsigned char horizontal_active_blanking_hi;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
horizontal_blanking	include/edid.h	/^	unsigned char horizontal_blanking;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
horizontal_max	include/edid.h	/^			unsigned char horizontal_max;$/;"	m	struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208	typeref:typename:unsigned char
horizontal_min	include/edid.h	/^			unsigned char horizontal_min;$/;"	m	struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208	typeref:typename:unsigned char
horkage	drivers/block/sata_dwc.h	/^	unsigned int		horkage;$/;"	m	struct:ata_device	typeref:typename:unsigned int
hose	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^static struct pci_controller hose = {$/;"	v	typeref:struct:pci_controller	file:
hose	board/a4m072/a4m072.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/freescale/m54455evb/m54455evb.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/freescale/m547xevb/m547xevb.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/freescale/m548xevb/m548xevb.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/freescale/mpc8540ads/mpc8540ads.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/freescale/mpc8541cds/mpc8541cds.c	/^static struct pci_controller hose[] = {$/;"	v	typeref:struct:pci_controller[]	file:
hose	board/freescale/mpc8555cds/mpc8555cds.c	/^static struct pci_controller hose[] = {$/;"	v	typeref:struct:pci_controller[]	file:
hose	board/freescale/mpc8560ads/mpc8560ads.c	/^static struct pci_controller hose = {$/;"	v	typeref:struct:pci_controller	file:
hose	board/ifm/o2dnt2/o2dnt2.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/inka4x0/inka4x0.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/intercontrol/digsy_mtc/digsy_mtc.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/ipek01/ipek01.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/jupiter/jupiter.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/mpl/common/pci.c	/^static struct pci_controller hose = {$/;"	v	typeref:struct:pci_controller	file:
hose	board/munices/munices.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/phytec/pcm030/pcm030.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/renesas/r2dplus/r2dplus.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/renesas/r7780mp/r7780mp.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/renesas/sh7785lcr/sh7785lcr.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	board/socrates/socrates.c	/^static struct pci_controller hose = {$/;"	v	typeref:struct:pci_controller	file:
hose	board/tqc/tqm5200/tqm5200.c	/^static struct pci_controller hose;$/;"	v	typeref:struct:pci_controller	file:
hose	drivers/pci/pci_gt64120.c	/^	struct pci_controller hose;$/;"	m	struct:gt64120_pci_controller	typeref:struct:pci_controller	file:
hose	drivers/pci/pci_msc01.c	/^	struct pci_controller hose;$/;"	m	struct:msc01_pci_controller	typeref:struct:pci_controller	file:
hose	drivers/pci/pci_mvebu.c	/^	struct pci_controller hose;$/;"	m	struct:mvebu_pcie	typeref:struct:pci_controller	file:
hose	drivers/pci/pci_tegra.c	/^	struct pci_controller hose;$/;"	m	struct:tegra_pcie	typeref:struct:pci_controller	file:
hose	drivers/pci/pcie_layerscape.c	/^	struct pci_controller hose;$/;"	m	struct:ls_pcie	typeref:struct:pci_controller	file:
hose	drivers/pci/pcie_xilinx.c	/^	struct pci_controller hose;$/;"	m	struct:xilinx_pcie	typeref:struct:pci_controller	file:
hose	include/asm-generic/global_data.h	/^	struct pci_controller *hose;	\/* PCI hose for early use *\/$/;"	m	struct:global_data	typeref:struct:pci_controller *
hose_head	drivers/pci/pci.c	/^static struct pci_controller* hose_head;$/;"	v	typeref:struct:pci_controller *	file:
hose_to_gt64120	drivers/pci/pci_gt64120.c	/^hose_to_gt64120(struct pci_controller *hose)$/;"	f	typeref:struct:gt64120_pci_controller *	file:
hose_to_msc01	drivers/pci/pci_msc01.c	/^hose_to_msc01(struct pci_controller *hose)$/;"	f	typeref:struct:msc01_pci_controller *	file:
hose_to_pcie	drivers/pci/pci_mvebu.c	/^static inline struct mvebu_pcie *hose_to_pcie(struct pci_controller *hose)$/;"	f	typeref:struct:mvebu_pcie *	file:
host	arch/arm/include/asm/arch-tegra/usb.h	/^	uint host;$/;"	m	struct:usb_ctlr	typeref:typename:uint
host	drivers/block/sata_dwc.c	/^	struct ata_host		*host;$/;"	m	struct:sata_dwc_device	typeref:struct:ata_host *	file:
host	drivers/block/sata_dwc.h	/^	struct ata_host		*host;$/;"	m	struct:ata_port	typeref:struct:ata_host *
host	drivers/mmc/bcm2835_sdhci.c	/^	struct sdhci_host host;$/;"	m	struct:bcm2835_sdhci_host	typeref:struct:sdhci_host	file:
host	drivers/mmc/exynos_dw_mmc.c	/^	struct dwmci_host host;$/;"	m	struct:dwmci_exynos_priv_data	typeref:struct:dwmci_host	file:
host	drivers/mmc/msm_sdhci.c	/^	struct sdhci_host host;$/;"	m	struct:msm_sdhc	typeref:struct:sdhci_host	file:
host	drivers/mmc/mxcmmc.c	/^static struct mxcmci_host *host = &mxcmci_host;$/;"	v	typeref:struct:mxcmci_host *	file:
host	drivers/mmc/rockchip_dw_mmc.c	/^	struct dwmci_host host;$/;"	m	struct:rockchip_dwmmc_priv	typeref:struct:dwmci_host	file:
host	drivers/mmc/rockchip_sdhci.c	/^	struct sdhci_host host;$/;"	m	struct:rockchip_sdhc	typeref:struct:sdhci_host	file:
host	drivers/mmc/socfpga_dw_mmc.c	/^	struct dwmci_host	host;$/;"	m	struct:dwmci_socfpga_priv_data	typeref:struct:dwmci_host	file:
host	drivers/mtd/nand/mxc_nand.c	/^static struct mxc_nand_host *host = &mxc_host;$/;"	v	typeref:struct:mxc_nand_host *	file:
host	drivers/mtd/nand/pxa3xx_nand.c	/^	struct pxa3xx_nand_host *host[NUM_CHIP_SELECT];$/;"	m	struct:pxa3xx_nand_info	typeref:struct:pxa3xx_nand_host * []	file:
host	drivers/usb/musb-new/musb_uboot.h	/^	struct musb *host;$/;"	m	struct:musb_host_data	typeref:struct:musb *
host	fs/ubifs/ubifs.h	/^	struct inode		*host;		\/* owner: inode, block_device *\/$/;"	m	struct:address_space	typeref:struct:inode *
host1_pwr_en	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		host1_pwr_en: host1-pwr-en {$/;"	l
host_addr	drivers/usb/gadget/ether.c	/^static char host_addr[18];$/;"	v	typeref:typename:char[18]	file:
host_address	arch/x86/include/asm/me_common.h	/^	u32 host_address:8;$/;"	m	struct:mei_header	typeref:typename:u32:8
host_blob	common/image-sig.c	/^void *host_blob;$/;"	v	typeref:typename:void *
host_block_dev	include/sandboxblockdev.h	/^struct host_block_dev {$/;"	s
host_block_read	drivers/block/sandbox.c	/^static unsigned long host_block_read(struct udevice *dev,$/;"	f	typeref:typename:unsigned long	file:
host_block_write	drivers/block/sandbox.c	/^static unsigned long host_block_write(struct udevice *dev,$/;"	f	typeref:typename:unsigned long	file:
host_bus_type	include/linux/edd.h	/^	__u8 host_bus_type[4];$/;"	m	struct:edd_device_params	typeref:typename:__u8[4]
host_caps	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	uint host_caps;		\/* Host capabilities *\/$/;"	m	struct:davinci_mmc	typeref:typename:uint
host_caps	include/mmc.h	/^	uint host_caps;$/;"	m	struct:mmc_config	typeref:typename:uint
host_caps	include/sdhci.h	/^	unsigned int host_caps;$/;"	m	struct:sdhci_host	typeref:typename:unsigned int
host_curr_device	cmd/host.c	/^static int host_curr_device = -1;$/;"	v	typeref:typename:int	file:
host_dev_bind	drivers/block/sandbox.c	/^int host_dev_bind(int dev, char *filename)$/;"	f	typeref:typename:int
host_dev_bind	drivers/block/sandbox.c	/^int host_dev_bind(int devnum, char *filename)$/;"	f	typeref:typename:int
host_devices	drivers/block/sandbox.c	/^static struct host_block_dev host_devices[CONFIG_HOST_MAX_DEVICES];$/;"	v	typeref:struct:host_block_dev[]	file:
host_drv	arch/arm/dts/rk3288-fennec.dtsi	/^		host_drv: host-drv {$/;"	l
host_event_code	include/ec_commands.h	/^enum host_event_code {$/;"	g
host_flags	include/ahci.h	/^	u32	host_flags;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
host_get_dev_err	drivers/block/sandbox.c	/^int host_get_dev_err(int devnum, struct blk_desc **blk_devp)$/;"	f	typeref:typename:int
host_id	disk/part_amiga.h	/^    u32   host_id;$/;"	m	struct:bootcode_block	typeref:typename:u32
host_id	disk/part_amiga.h	/^    u32 host_id;$/;"	m	struct:partition_block	typeref:typename:u32
host_id	disk/part_amiga.h	/^    u32 host_id;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
host_load_cmd	drivers/ddr/microchip/ddr2.c	/^static void host_load_cmd(struct ddr2_ctrl_regs *ctrl, u32 cmd_idx,$/;"	f	typeref:typename:void	file:
host_mac	drivers/usb/gadget/ether.c	/^	u8			host_mac[ETH_ALEN];$/;"	m	struct:eth_dev	typeref:typename:u8[]	file:
host_mac	drivers/usb/gadget/rndis.h	/^	const u8		*host_mac;$/;"	m	struct:rndis_params	typeref:typename:const u8 *
host_naklimit0	drivers/usb/musb/musb_core.h	/^	u8	host_naklimit0;$/;"	m	struct:musb_ep0_regs	typeref:typename:u8
host_num	arch/x86/include/asm/sfi.h	/^	u8	host_num;	\/* attached to host 0, 1...*\/$/;"	m	struct:sfi_device_table_entry	typeref:typename:u8
host_port	drivers/net/cpsw.c	/^	int				host_port;$/;"	m	struct:cpsw_priv	typeref:typename:int	file:
host_port_num	include/cpsw.h	/^	u32	host_port_num;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
host_port_reg_ofs	include/cpsw.h	/^	u32	host_port_reg_ofs;	\/* cpdma host port registers	*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
host_port_regs	drivers/net/cpsw.c	/^	struct cpsw_host_regs		*host_port_regs;$/;"	m	struct:cpsw_priv	typeref:struct:cpsw_host_regs *	file:
host_regs	drivers/usb/host/dwc2.h	/^	struct dwc2_host_regs	host_regs;	\/* 0x400 *\/$/;"	m	struct:dwc2_core_regs	typeref:struct:dwc2_host_regs
host_request	drivers/mmc/arm_pl180_mmci.c	/^static int host_request(struct mmc *dev,$/;"	f	typeref:typename:int	file:
host_set_flags	include/ahci.h	/^	u32	host_set_flags;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
host_set_ios	drivers/mmc/arm_pl180_mmci.c	/^static void host_set_ios(struct mmc *dev)$/;"	f	typeref:typename:void	file:
host_speed	drivers/usb/musb-new/musb_uboot.h	/^	enum usb_device_speed host_speed;$/;"	m	struct:musb_host_data	typeref:enum:usb_device_speed
host_trip_reached	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_thermal_host_trip_reached_request host_trip_reached;$/;"	m	union:mrq_thermal_bpmp_to_host_request::__anonb38d4241080a	typeref:struct:cmd_thermal_host_trip_reached_request
host_type0	drivers/usb/musb/musb_core.h	/^	u8	host_type0;$/;"	m	struct:musb_ep0_regs	typeref:typename:u8
host_vbus_drv	arch/arm/dts/rk3288-evb.dtsi	/^		host_vbus_drv: host-vbus-drv {$/;"	l
host_vbus_drv	arch/arm/dts/rk3288-firefly.dtsi	/^		host_vbus_drv: host-vbus-drv {$/;"	l
host_vbus_drv	arch/arm/dts/rk3288-miniarm.dtsi	/^		host_vbus_drv: host-vbus-drv {$/;"	l
host_vbus_drv	arch/arm/dts/rk3288-rock2-square.dts	/^		host_vbus_drv: host-vbus-drv {$/;"	l
host_wakeup_gpio	board/nokia/rx51/tag_omap.h	/^	u8 host_wakeup_gpio;$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8
hostcapblt	drivers/mmc/fsl_esdhc.c	/^	uint    hostcapblt;	\/* Host controller capabilities register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
hostcapblt2	drivers/mmc/fsl_esdhc.c	/^	uint    hostcapblt2;	\/* Host controller capabilities register 2 *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
hostconfig	arch/arm/include/asm/ehci-omap.h	/^	u32 hostconfig;	\/* 0x40 *\/$/;"	m	struct:omap_uhh	typeref:typename:u32
hostctl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	hostctl;	\/* _POWER_CONTROL_HOST_0 7:00 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
hostctrl	board/esd/pmc440/pmc440.h	/^	u32 hostctrl;                   \/* offset: 0x0060 *\/$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
hostpc1_devlc	arch/arm/include/asm/arch-tegra/usb.h	/^	uint hostpc1_devlc;$/;"	m	struct:usb_ctlr	typeref:typename:uint
hostpc1_devlc	drivers/usb/gadget/ci_udc.h	/^	u32 hostpc1_devlc;	\/* 0x1b4 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
hostprogs-y	board/samsung/origen/Makefile	/^hostprogs-y := tools\/mkorigenspl$/;"	m
hostprogs-y	board/samsung/smdkv310/Makefile	/^hostprogs-y := tools\/mksmdkv310spl$/;"	m
hostprogs-y	scripts/basic/Makefile	/^hostprogs-y	:= fixdep$/;"	m
hostprogs-y	scripts/kconfig/Makefile	/^hostprogs-y := conf nconf mconf kxgettext qconf gconf$/;"	m
hostprogs-y	tools/easylogo/Makefile	/^hostprogs-y := easylogo$/;"	m
hostprogs-y	tools/env/Makefile	/^hostprogs-y := fw_printenv$/;"	m
hostprogs-y	tools/gdb/Makefile	/^hostprogs-y := gdbsend gdbcont$/;"	m
hostver	drivers/mmc/fsl_esdhc.c	/^	uint    hostver;	\/* Host controller version register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
hot	include/linux/fb.h	/^	struct fbcurpos hot;		\/* cursor hot spot *\/$/;"	m	struct:fb_cursor_user	typeref:struct:fbcurpos
hot	include/linux/fb.h	/^	struct fbcurpos hot;	\/* cursor hot spot *\/$/;"	m	struct:fb_cursor	typeref:struct:fbcurpos
hotfix_version	arch/x86/include/asm/arch-broadwell/me.h	/^	u32	hotfix_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
hotfix_version	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 hotfix_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
hotplug	include/video_bridge.h	/^	struct gpio_desc hotplug;$/;"	m	struct:video_bridge_priv	typeref:struct:gpio_desc
hour	drivers/rtc/ftrtc010.c	/^	unsigned int hour;		\/* 0x08 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
hour	include/efi.h	/^	u8 hour;$/;"	m	struct:efi_time	typeref:typename:u8
hourmin	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 hourmin;$/;"	m	struct:rtc_regs	typeref:typename:u32
hourmin	arch/m68k/include/asm/rtc.h	/^	u32 hourmin;		\/* 0x00 Hours and Minutes Counter Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
hours	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	hours;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
howar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howar0;         \/* 0xac10 - HT Outbound Window 0 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howar1;         \/* 0xac30 - HT Outbound Window 1 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howar2;         \/* 0xac50 - HT Outbound Window 2 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howar3;         \/* 0xac70 - HT Outbound Window 3 Attributes  register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howar4;         \/* 0xac90 - HT Outbound Window 4 Attributes register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howbar1;        \/* 0xac28 - HT Outbound Window 1 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howbar2;        \/* 0xac48 - HT Outbound Window 2 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howbar3;        \/* 0xac68 - HT Outbound Window 3 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howbar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howbar4;        \/* 0xac88 - HT Outbound Window 4 Base Address register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howtar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howtar0;        \/* 0xac00 - HT Outbound Window 0 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howtar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howtar1;        \/* 0xac20 - HT Outbound Window 1 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howtar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howtar2;        \/* 0xac40 - HT Outbound Window 2 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howtar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howtar3;        \/* 0xac60 - HT Outbound Window 3 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
howtar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    howtar4;        \/* 0xac80 - HT Outbound Window 4 Translation register *\/$/;"	m	struct:ccsr_ht	typeref:typename:uint
hp_com	include/fsl_sec_mon.h	/^	u32 hp_com;	\/* 0x04 SEC_MON_HP Command Register *\/$/;"	m	struct:ccsr_sec_mon_regs	typeref:typename:u32
hp_det	arch/arm/dts/rk3288-veyron.dtsi	/^		hp_det: hp-det {$/;"	l
hp_fetch_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint hp_fetch_ctrl;		\/* _WIN_HP_FETCH_CONTROL_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
hp_stat	include/fsl_sec_mon.h	/^	u32 hp_stat;	\/* 0x08 SEC_MON_HP Status Register *\/$/;"	m	struct:ccsr_sec_mon_regs	typeref:typename:u32
hpalr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpalr;		\/* 0x2c *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpamr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpamr;		\/* 0x28 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpaned	scripts/kconfig/gconf.c	/^GtkWidget *hpaned = NULL;$/;"	v	typeref:typename:GtkWidget *
hpaned1	scripts/kconfig/gconf.glade	/^	<widget class="GtkHPaned" id="hpaned1">$/;"	i
hpbctrl0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 hpbctrl0;$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
hpbctrl0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hpbctrl0;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
hpbctrl1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 hpbctrl1;$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
hpbctrl1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hpbctrl1;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
hpbctrl2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 hpbctrl2;$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
hpbctrl2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hpbctrl2;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
hpbctrl4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 hpbctrl4;$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
hpbctrl4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hpbctrl4;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
hpbctrl5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 hpbctrl5;$/;"	m	struct:r8a7740_hpb	typeref:typename:u32
hpbctrl5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hpbctrl5;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
hpbctrl6	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hpbctrl6;$/;"	m	struct:sh73a0_hpb	typeref:typename:u32
hpclr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpclr;		\/* 0x24 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpcmr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpcmr;		\/* 0x20 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpcr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpcr;		\/* 0x30 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 hpcr[32];		\/* 0x250 host port configure register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32[32]
hpcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 hpcr[32];		\/* 0x250 host port configure register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32[32]
hpcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	hpcr[32];	\/* Host Port Configurarion *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[32]
hpcr_value	arch/arm/mach-sunxi/dram_sun4i.c	/^static u32 hpcr_value[32] = {$/;"	v	typeref:typename:u32[32]	file:
hpd	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 hpd;			\/* 0x00c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
hpd	arch/arm/include/asm/arch/display.h	/^	u32 hpd;			\/* 0x00c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
hpd_cec	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 hpd_cec;			\/* 0x214 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
hpd_cec	arch/arm/include/asm/arch/display.h	/^	u32 hpd_cec;			\/* 0x214 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
hpd_deglitch_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	hpd_deglitch_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
hpd_deglitch_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hpd_deglitch_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hpd_deglitch_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	hpd_deglitch_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
hpd_deglitch_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hpd_deglitch_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hpet_address	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t hpet_address;$/;"	m	struct:pei_data	typeref:typename:uint32_t
hpienr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpienr;		\/* 0x38 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpipe3_base_addr	drivers/phy/marvell/comphy.h	/^	void __iomem *hpipe3_base_addr;$/;"	m	struct:chip_serdes_phy_config	typeref:typename:void __iomem *
hpisr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	hpisr;		\/* 0x34 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
hpll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	hpll_con;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
hpll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	hpll_lock;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
hpmccr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmccr;		\/* 0x1068 - MCM HPM Cycle Count Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpmr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmr0;		\/* 0x1040 - MCM HPM Threshold Count Register 0 *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpmr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmr1;		\/* 0x1044 - MCM HPM Threshold Count Register 1 *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpmr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmr2;		\/* 0x1048 - MCM HPM Threshold Count Register 2 *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpmr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmr3;		\/* 0x104c - MCM HPM Threshold Count Register 3 *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpmr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmr4;		\/* 0x1060 - MCM HPM Threshold Count Register 4 *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpmr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	hpmr5;		\/* 0x1064 - MCM HPM Threshold Count Register 5 *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
hpos	fs/ubifs/ubifs.h	/^		int hpos;$/;"	m	union:ubifs_lprops::__anonf648d0840d0a	typeref:typename:int
hprt0	drivers/usb/host/dwc2.h	/^	u32			hprt0;		\/* 0x440 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
hps2fpga_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	hps2fpga_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
hps2fpga_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	hps2fpga_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
hps2fpga_wr_tidemark	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	hps2fpga_wr_tidemark;		\/* 0x24040 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
hps2fpgaregs	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	hps2fpgaregs;			\/* 0x90 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
hpsinfo	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	hpsinfo;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
hptxfsiz	drivers/usb/host/dwc2.h	/^	u32			hptxfsiz;	\/* 0x100 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
hptxpd	drivers/net/ftgmac100.h	/^	unsigned int	hptxpd;		\/* 0x28 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
hptxpd_badr	drivers/net/ftgmac100.h	/^	unsigned int	hptxpd_badr;	\/* 0x2c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
hptxr_ptr	drivers/net/ftgmac100.h	/^	unsigned int	hptxr_ptr;	\/* 0x94 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
hptxsts	drivers/usb/host/dwc2.h	/^	u32			hptxsts;	\/* 0x10 *\/$/;"	m	struct:dwc2_host_regs	typeref:typename:u32
hr	drivers/rtc/ds1302.c	/^	unsigned char hr:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
hr10	drivers/rtc/ds1302.c	/^	unsigned char hr10:2;	\/* 10 (0-2) or am\/pm (am\/pm, 0-1) *\/$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:2	file:
hrcnfg	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short hrcnfg;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
hrcon_fans	board/gdsys/mpc8308/hrcon.c	/^} hrcon_fans[] = CONFIG_HRCON_FANS;$/;"	v	typeref:struct:__anonc2f835a20308[]
hre_err	board/gdsys/p1022/controlcenterd-id.c	/^static int hre_err = HRE_E_OK;$/;"	v	typeref:typename:int	file:
hre_execute_op	board/gdsys/p1022/controlcenterd-id.c	/^static const uint8_t *hre_execute_op(const uint8_t **ip, size_t *code_size)$/;"	f	typeref:typename:const uint8_t *	file:
hre_op_loadkey	board/gdsys/p1022/controlcenterd-id.c	/^static int hre_op_loadkey(struct h_reg *src_reg, struct h_reg *dst_reg,$/;"	f	typeref:typename:int	file:
hre_run_program	board/gdsys/p1022/controlcenterd-id.c	/^static int hre_run_program(const uint8_t *code, size_t code_size)$/;"	f	typeref:typename:int	file:
hre_tpm_err	board/gdsys/p1022/controlcenterd-id.c	/^static uint32_t hre_tpm_err;$/;"	v	typeref:typename:uint32_t	file:
hrstcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 hrstcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
hs_descriptors	include/linux/usb/composite.h	/^	struct usb_descriptor_header	**hs_descriptors;$/;"	m	struct:usb_function	typeref:struct:usb_descriptor_header **
hs_ep_in	drivers/usb/gadget/f_fastboot.c	/^static struct usb_endpoint_descriptor hs_ep_in = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_ep_out	drivers/usb/gadget/f_fastboot.c	/^static struct usb_endpoint_descriptor hs_ep_out = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_eth_function	drivers/usb/gadget/ether.c	/^static const struct usb_descriptor_header *hs_eth_function[11] = {$/;"	v	typeref:typename:const struct usb_descriptor_header * [11]	file:
hs_ext_start_stop_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 hs_ext_start_stop_x;		\/* 0x74 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
hs_in_desc	drivers/usb/gadget/f_thor.c	/^static struct usb_endpoint_descriptor hs_in_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_int_desc	drivers/usb/gadget/f_thor.c	/^static struct usb_endpoint_descriptor hs_int_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_int_start_stop_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 hs_int_start_stop_x;		\/* 0x70 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
hs_irq_skip	arch/arm/cpu/armv7/omap5/fdt.c	/^static u32 hs_irq_skip[] = {$/;"	v	typeref:typename:u32[]	file:
hs_out_desc	drivers/usb/gadget/f_thor.c	/^static struct usb_endpoint_descriptor hs_out_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_port_switch_mask	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint16_t hs_port_switch_mask;$/;"	m	struct:pch_usb3_controller_settings	typeref:typename:uint16_t
hs_rndis_function	drivers/usb/gadget/ether.c	/^static const struct usb_descriptor_header *hs_rndis_function[] = {$/;"	v	typeref:typename:const struct usb_descriptor_header * []	file:
hs_sink_desc	drivers/usb/gadget/ether.c	/^hs_sink_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_source_desc	drivers/usb/gadget/ether.c	/^hs_source_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_status_desc	drivers/usb/gadget/ether.c	/^hs_status_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hs_subset_descriptors	drivers/usb/gadget/ether.c	/^static inline void hs_subset_descriptors(void)$/;"	f	typeref:typename:void	file:
hs_thor_downloader_function	drivers/usb/gadget/f_thor.c	/^static const struct usb_descriptor_header *hs_thor_downloader_function[] = {$/;"	v	typeref:typename:const struct usb_descriptor_header * []	file:
hsa	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			hsa;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
hsadr	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 hsadr;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
hsch	include/vsc9953.h	/^	struct vsc9953_qsys_hsch	hsch[108];$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_hsch[108]
hsch_misc	include/vsc9953.h	/^	struct vsc9953_qsys_hsch_misc	hsch_misc;$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_hsch_misc
hsch_misc_cfg	include/vsc9953.h	/^	u32	hsch_misc_cfg;$/;"	m	struct:vsc9953_qsys_hsch_misc	typeref:typename:u32
hscroll	scripts/kconfig/lxdialog/textbox.c	/^static int hscroll;$/;"	v	typeref:typename:int	file:
hsdev	drivers/block/sata_dwc.c	/^	struct sata_dwc_device	*hsdev;$/;"	m	struct:sata_dwc_device_port	typeref:struct:sata_dwc_device *	file:
hsdramc1_readl	arch/avr32/cpu/hsdramc1.h	/^#define hsdramc1_readl(/;"	d
hsdramc1_writel	arch/avr32/cpu/hsdramc1.h	/^#define hsdramc1_writel(/;"	d
hse	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			hse;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
hsearch_data	include/search.h	/^struct hsearch_data {$/;"	s
hsearch_r	lib/hashtable.c	/^int hsearch_r(ENTRY item, ACTION action, ENTRY ** retval,$/;"	f	typeref:typename:int
hseof1	drivers/usb/musb/musb_core.h	/^	u8	hseof1;$/;"	m	struct:musb_regs	typeref:typename:u8
hsfc	drivers/spi/ich.h	/^	uint16_t hsfc;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint16_t
hsfs	drivers/spi/ich.h	/^	uint16_t hsfs;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint16_t
hsh	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 hsh;$/;"	m	struct:at91_emac	typeref:typename:u32
hsi2c_4	arch/arm/dts/exynos54xx.dtsi	/^	hsi2c_4: i2c@12CA0000 {$/;"	l
hsi2c_ch_init	drivers/i2c/s3c24x0_i2c.c	/^static void hsi2c_ch_init(struct s3c24x0_i2c_bus *i2c_bus)$/;"	f	typeref:typename:void	file:
hsi2c_get_clk_details	drivers/i2c/s3c24x0_i2c.c	/^static int hsi2c_get_clk_details(struct s3c24x0_i2c_bus *i2c_bus)$/;"	f	typeref:typename:int	file:
hsi2c_poll_fifo	drivers/i2c/s3c24x0_i2c.c	/^static unsigned hsi2c_poll_fifo(struct exynos5_hsi2c *i2c, bool rx_transfer)$/;"	f	typeref:typename:unsigned	file:
hsi2c_prepare_transaction	drivers/i2c/s3c24x0_i2c.c	/^static int hsi2c_prepare_transaction(struct exynos5_hsi2c *i2c,$/;"	f	typeref:typename:int	file:
hsi2c_read	drivers/i2c/s3c24x0_i2c.c	/^static int hsi2c_read(struct exynos5_hsi2c *i2c,$/;"	f	typeref:typename:int	file:
hsi2c_wait_for_trx	drivers/i2c/s3c24x0_i2c.c	/^static int hsi2c_wait_for_trx(struct exynos5_hsi2c *i2c)$/;"	f	typeref:typename:int	file:
hsi2c_wait_while_busy	drivers/i2c/s3c24x0_i2c.c	/^static int hsi2c_wait_while_busy(struct exynos5_hsi2c *i2c)$/;"	f	typeref:typename:int	file:
hsi2c_write	drivers/i2c/s3c24x0_i2c.c	/^static int hsi2c_write(struct exynos5_hsi2c *i2c,$/;"	f	typeref:typename:int	file:
hsi_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hsi_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
hsi_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hsi_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
hsi_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hsi_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
hsi_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hsi_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
hsic1_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hsic1_phy_control;$/;"	m	struct:exynos4412_power	typeref:typename:unsigned int
hsic2_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	hsic2_phy_control;$/;"	m	struct:exynos4412_power	typeref:typename:unsigned int
hsic_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 hsic_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
hsic_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 hsic_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
hsickcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 hsickcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
hsicphy_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 hsicphy_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
hsicphy_rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 hsicphy_rcr;$/;"	m	struct:src	typeref:typename:u32
hsicphyctrl1	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int hsicphyctrl1;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
hsicphyctrl2	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int hsicphyctrl2;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
hsicphytune1	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int hsicphytune1;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
hsicphytune2	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int hsicphytune2;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
hsio_checksum	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t hsio_checksum;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
hsio_version	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t hsio_version;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
hsl	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 hsl;$/;"	m	struct:at91_emac	typeref:typename:u32
hsm	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 hsm:2;		\/* high-speed mode enable    *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:2
hsm	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 hsm:2;		\/* high-speed mode enable    *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
hsm_en	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 hsm_en:1;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:1	file:
hsm_en	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 hsm_en:1;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:1	file:
hsm_task_state	drivers/block/sata_dwc.h	/^	unsigned int		hsm_task_state;$/;"	m	struct:ata_port	typeref:typename:unsigned int
hsm_task_states	drivers/block/sata_dwc.h	/^enum hsm_task_states {$/;"	g
hsmc3_readl	arch/avr32/cpu/hsmc3.h	/^#define hsmc3_readl(/;"	d
hsmc3_writel	arch/avr32/cpu/hsmc3.h	/^#define hsmc3_writel(/;"	d
hsmc_clk	arch/arm/dts/sama5d2.dtsi	/^					hsmc_clk: hsmc_clk@17 {$/;"	l
hsmmc	arch/arm/include/asm/omap_mmc.h	/^struct hsmmc {$/;"	s
hsp	arch/arm/dts/tegra186.dtsi	/^	hsp: hsp@3c00000 {$/;"	l
hsp_div_table	arch/arm/cpu/arm1136/mx35/generic.c	/^static int hsp_div_table[3][16] = {$/;"	v	typeref:typename:int[3][16]	file:
hspi_cs_dc	arch/arm/include/asm/arch-tegra/dc.h	/^	uint hspi_cs_dc;		\/* _COM_HSPI_CS_DC_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
hspi_wr_data_ab	arch/arm/include/asm/arch-tegra/dc.h	/^	uint hspi_wr_data_ab;		\/* _COM_HSPI_WRITE_DATA_AB_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
hspi_wr_data_cd	arch/arm/include/asm/arch-tegra/dc.h	/^	uint hspi_wr_data_cd;		\/* _COM_HSPI_WRITE_DATA_CD *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
hsregs	drivers/i2c/s3c24x0_i2c.h	/^	struct exynos5_hsi2c *hsregs;$/;"	m	struct:s3c24x0_i2c_bus	typeref:struct:exynos5_hsi2c *
hstatus	drivers/block/fsl_sata.h	/^	u32 hstatus;		\/* Host status register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
hsuart	drivers/serial/lpc32xx_hsuart.c	/^	struct hsuart_regs *hsuart;$/;"	m	struct:lpc32xx_hsuart_priv	typeref:struct:hsuart_regs *	file:
hsuart_clock_set	arch/x86/cpu/baytrail/cpu.c	/^static void hsuart_clock_set(void *base)$/;"	f	typeref:typename:void	file:
hsuart_regs	arch/arm/include/asm/arch-lpc32xx/uart.h	/^struct hsuart_regs {$/;"	s
hsw	drivers/video/am335x-fb.h	/^	unsigned int	hsw;		\/* Horizontal Sync Pulse Width *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
hsw	drivers/video/da8xx-fb.h	/^	int		hsw;		\/* Horizontal Sync Pulse Width *\/$/;"	m	struct:da8xx_panel	typeref:typename:int
hsw_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hsw_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hsw_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hsw_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hsw_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hsw_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hsw_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hsw_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hsyn_para	drivers/video/fsl_dcu_fb.c	/^	u32 hsyn_para;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
hsyn_para	drivers/video/fsl_diu_fb.c	/^	__be32 hsyn_para;$/;"	m	struct:diu	typeref:typename:__be32	file:
hsync_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	hsync_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
hsync_len	drivers/video/videomodes.h	/^	int hsync_len;		\/* length of horizontal sync	*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
hsync_len	include/fdtdec.h	/^	struct timing_entry hsync_len;		\/* hor. sync len *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
hsync_len	include/linux/fb.h	/^	__u32 hsync_len;		\/* length of horizontal sync	*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
hsync_len	include/linux/fb.h	/^	u32 hsync_len;$/;"	m	struct:fb_videomode	typeref:typename:u32
hsync_offset	include/edid.h	/^	unsigned char hsync_offset;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
hsync_pulse_width	include/edid.h	/^	unsigned char hsync_pulse_width;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
hsync_sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	hsync_sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
hsync_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	hsync_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
hsync_vsync_offset_pulse_width_hi	include/edid.h	/^	unsigned char hsync_vsync_offset_pulse_width_hi;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
ht0	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic ht0;  \/* 0x40 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
ht1	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic ht1;  \/* 0x50 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
ht_disabled	arch/x86/cpu/broadwell/cpu.c	/^	bool ht_disabled;$/;"	m	struct:cpu_broadwell_priv	typeref:typename:bool	file:
hte_basic_data_cmp	arch/x86/cpu/quark/hte.c	/^static u16 hte_basic_data_cmp(struct mrc_params *mrc_params, u32 addr,$/;"	f	typeref:typename:u16	file:
hte_basic_write_read	arch/x86/cpu/quark/hte.c	/^u16 hte_basic_write_read(struct mrc_params *mrc_params, u32 addr,$/;"	f	typeref:typename:u16
hte_check_errors	arch/x86/cpu/quark/hte.c	/^static u32 hte_check_errors(void)$/;"	f	typeref:typename:u32	file:
hte_clear_error_regs	arch/x86/cpu/quark/hte.c	/^static void hte_clear_error_regs(void)$/;"	f	typeref:typename:void	file:
hte_enable_all_errors	arch/x86/cpu/quark/hte.c	/^static void hte_enable_all_errors(void)$/;"	f	typeref:typename:void	file:
hte_mem_init	arch/x86/cpu/quark/hte.c	/^u32 hte_mem_init(struct mrc_params *mrc_params, u8 flag)$/;"	f	typeref:typename:u32
hte_mem_op	arch/x86/cpu/quark/hte.c	/^void hte_mem_op(u32 addr, u8 first_run, u8 is_write)$/;"	f	typeref:typename:void
hte_rw_data_cmp	arch/x86/cpu/quark/hte.c	/^static u16 hte_rw_data_cmp(struct mrc_params *mrc_params, u32 addr,$/;"	f	typeref:typename:u16	file:
hte_setup	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t hte_setup;	\/* when set hte reconfiguration requested *\/$/;"	m	struct:mrc_params	typeref:typename:uint32_t
hte_wait_for_complete	arch/x86/cpu/quark/hte.c	/^static void hte_wait_for_complete(void)$/;"	f	typeref:typename:void	file:
hte_write_stress_bit_lanes	arch/x86/cpu/quark/hte.c	/^u16 hte_write_stress_bit_lanes(struct mrc_params *mrc_params,$/;"	f	typeref:typename:u16
htmldocs	doc/DocBook/Makefile	/^htmldocs: $(HTML)$/;"	t
htonl	include/linux/byteorder/generic.h	/^#define htonl(/;"	d
htons	include/linux/byteorder/generic.h	/^#define htons(/;"	d
htotal_cntl2	drivers/video/ati_radeon_fb.h	/^	u32		htotal_cntl2;$/;"	m	struct:radeon_regs	typeref:typename:u32
htpr	drivers/net/armada100_fec.h	/^	u32 htpr;			\/* Hash table pointer *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
htpr	drivers/net/armada100_fec.h	/^	u8 *htpr;		\/* hash pointer *\/$/;"	m	struct:armdfec_device	typeref:typename:u8 *
htpt	include/linux/edd.h	/^		} __attribute__ ((packed)) htpt;$/;"	m	union:edd_device_params::__anon8a8b619a010a	typeref:struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0608
htrigger_vtrigger	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 htrigger_vtrigger;			\/* 0x60 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
http	doc/README.x86	/^http:\/\/firmware.intel.com\/sites\/default\/files\/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Rel/;"	l
htx	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int htx;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
hub	common/usb_hub.c	/^	struct usb_hub_device *hub;	\/* USB hub struct *\/$/;"	m	struct:usb_device_scan	typeref:struct:usb_hub_device *	file:
hub	drivers/usb/host/ehci-hcd.c	/^	struct usb_hub_descriptor hub;$/;"	m	struct:descriptor	typeref:struct:usb_hub_descriptor	file:
hub	drivers/usb/host/xhci.c	/^	struct usb_hub_descriptor hub;$/;"	m	struct:descriptor	typeref:struct:usb_hub_descriptor	file:
hub_config1	drivers/usb/emul/sandbox_hub.c	/^static struct usb_config_descriptor hub_config1 = {$/;"	v	typeref:struct:usb_config_descriptor	file:
hub_desc	drivers/usb/emul/sandbox_hub.c	/^static struct usb_hub_descriptor hub_desc = {$/;"	v	typeref:struct:usb_hub_descriptor	file:
hub_desc_list	drivers/usb/emul/sandbox_hub.c	/^static void *hub_desc_list[] = {$/;"	v	typeref:typename:void * []	file:
hub_dev	common/usb_hub.c	/^static struct usb_hub_device hub_dev[USB_MAX_HUB];$/;"	v	typeref:struct:usb_hub_device[]	file:
hub_device_desc	drivers/usb/emul/sandbox_hub.c	/^static struct usb_device_descriptor hub_device_desc = {$/;"	v	typeref:struct:usb_device_descriptor	file:
hub_endpoint0_in	drivers/usb/emul/sandbox_hub.c	/^static struct usb_endpoint_descriptor hub_endpoint0_in = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
hub_find_device	drivers/usb/emul/sandbox_hub.c	/^static struct udevice *hub_find_device(struct udevice *hub, int port)$/;"	f	typeref:struct:udevice *	file:
hub_id_table	common/usb_hub.c	/^static const struct usb_device_id hub_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
hub_interface0	drivers/usb/emul/sandbox_hub.c	/^static struct usb_interface_descriptor hub_interface0 = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
hub_port_reset	common/usb_hub.c	/^int hub_port_reset(struct udevice *dev, int port, unsigned short *portstat)$/;"	f	typeref:typename:int
hub_strings	drivers/usb/emul/sandbox_hub.c	/^static struct usb_string hub_strings[] = {$/;"	v	typeref:struct:usb_string[]	file:
huffman_order	fs/jffs2/mini_inflate.c	/^static unsigned char huffman_order[] = {16, 17, 18,  0,  8,  7,  9,  6, 10,  5,$/;"	v	typeref:typename:unsigned char[]	file:
huffman_set	include/jffs2/mini_inflate.h	/^struct huffman_set {$/;"	s
huge	fs/ubifs/ubifs-media.h	/^	__le64 huge;$/;"	m	union:ubifs_dev_desc	typeref:typename:__le64
hush_init_var	board/keymile/km82xx/km82xx.c	/^int hush_init_var(void)$/;"	f	typeref:typename:int
hush_init_var	board/keymile/km83xx/km83xx.c	/^int hush_init_var(void)$/;"	f	typeref:typename:int
hush_init_var	board/keymile/km_arm/km_arm.c	/^int hush_init_var(void)$/;"	f	typeref:typename:int
hush_init_var	board/keymile/kmp204x/kmp204x.c	/^int hush_init_var(void)$/;"	f	typeref:typename:int
hush_main	common/cli_hush.c	/^#define hush_main /;"	d	file:
hush_main	common/cli_hush.c	/^int hush_main(int argc, char * const *argv)$/;"	f	typeref:typename:int
hvc_call	arch/arm/cpu/armv8/fwcall.c	/^static void __efi_runtime hvc_call(struct pt_regs *args)$/;"	f	typeref:typename:void __efi_runtime	file:
hvccfg0	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	hvccfg0;	\/* 0x1A4: APB_MISC_GP_HVCCFG0PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hvccfg0	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	hvccfg0;	\/* 0x1A4: APB_MISC_GP_HVCCFG0PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hvccfg0	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	hvccfg0;	\/* 0x1A4: APB_MISC_GP_HVCCFG0PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
hw	include/power/pmic.h	/^	union hw {$/;"	u	struct:pmic
hw	include/power/pmic.h	/^	} hw;$/;"	m	struct:pmic	typeref:union:pmic::hw
hw-platform-y	board/xilinx/zynq/Makefile	/^hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))$/;"	m
hw-platform-y	board/xilinx/zynqmp/Makefile	/^hw-platform-y :=$(shell echo $(CONFIG_SYS_CONFIG_NAME))$/;"	m
hwBE	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwBE;		\/* Memory Buffer End Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwBE	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwBE;		\/* Memory Buffer End Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwBE	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwBE;		\/* Memory Buffer End Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwBE	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwBE;		\/* Memory Buffer End Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwBE	drivers/usb/host/ohci.h	/^	__u32 hwBE;		\/* Memory Buffer End Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwCBP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwCBP;		\/* Current Buffer Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwCBP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwCBP;		\/* Current Buffer Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwCBP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwCBP;		\/* Current Buffer Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwCBP	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwCBP;		\/* Current Buffer Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwCBP	drivers/usb/host/ohci.h	/^	__u32 hwCBP;		\/* Current Buffer Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwHeadP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwHeadP;$/;"	m	struct:ed	typeref:typename:__u32
hwHeadP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwHeadP;$/;"	m	struct:ed	typeref:typename:__u32
hwHeadP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwHeadP;$/;"	m	struct:ed	typeref:typename:__u32
hwHeadP	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwHeadP;$/;"	m	struct:ed	typeref:typename:__u32
hwHeadP	drivers/usb/host/ohci.h	/^	__u32 hwHeadP;$/;"	m	struct:ed	typeref:typename:__u32
hwINFO	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwINFO;$/;"	m	struct:ed	typeref:typename:__u32
hwINFO	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwINFO;$/;"	m	struct:td	typeref:typename:__u32
hwINFO	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwINFO;$/;"	m	struct:ed	typeref:typename:__u32
hwINFO	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwINFO;$/;"	m	struct:td	typeref:typename:__u32
hwINFO	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwINFO;$/;"	m	struct:ed	typeref:typename:__u32
hwINFO	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwINFO;$/;"	m	struct:td	typeref:typename:__u32
hwINFO	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwINFO;$/;"	m	struct:ed	typeref:typename:__u32
hwINFO	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwINFO;$/;"	m	struct:td	typeref:typename:__u32
hwINFO	drivers/usb/host/ohci.h	/^	__u32 hwINFO;$/;"	m	struct:ed	typeref:typename:__u32
hwINFO	drivers/usb/host/ohci.h	/^	__u32 hwINFO;$/;"	m	struct:td	typeref:typename:__u32
hwNextED	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwNextED;$/;"	m	struct:ed	typeref:typename:__u32
hwNextED	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwNextED;$/;"	m	struct:ed	typeref:typename:__u32
hwNextED	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwNextED;$/;"	m	struct:ed	typeref:typename:__u32
hwNextED	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwNextED;$/;"	m	struct:ed	typeref:typename:__u32
hwNextED	drivers/usb/host/ohci.h	/^	__u32 hwNextED;$/;"	m	struct:ed	typeref:typename:__u32
hwNextTD	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwNextTD;		\/* Next TD Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwNextTD	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwNextTD;		\/* Next TD Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwNextTD	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwNextTD;		\/* Next TD Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwNextTD	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwNextTD;		\/* Next TD Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwNextTD	drivers/usb/host/ohci.h	/^	__u32 hwNextTD;		\/* Next TD Pointer *\/$/;"	m	struct:td	typeref:typename:__u32
hwPSW	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u16 hwPSW[MAXPSW];$/;"	m	struct:td	typeref:typename:__u16[]
hwPSW	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u16 hwPSW[MAXPSW];$/;"	m	struct:td	typeref:typename:__u16[]
hwPSW	drivers/usb/host/ohci.h	/^	__u16 hwPSW[MAXPSW];$/;"	m	struct:td	typeref:typename:__u16[]
hwTailP	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 hwTailP;$/;"	m	struct:ed	typeref:typename:__u32
hwTailP	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 hwTailP;$/;"	m	struct:ed	typeref:typename:__u32
hwTailP	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 hwTailP;$/;"	m	struct:ed	typeref:typename:__u32
hwTailP	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 hwTailP;$/;"	m	struct:ed	typeref:typename:__u32
hwTailP	drivers/usb/host/ohci.h	/^	__u32 hwTailP;$/;"	m	struct:ed	typeref:typename:__u32
hw_addr	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		hw_addr;		\/* EMAC offset *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
hw_addr	drivers/net/e1000.h	/^	uint8_t *hw_addr;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t *
hw_address	arch/avr32/include/asm/setup.h	/^	u8	hw_address[6];$/;"	m	struct:tag_ethernet	typeref:typename:u8[6]
hw_buf	drivers/usb/gadget/ci_udc.h	/^	uint8_t *hw_buf;$/;"	m	struct:ci_req	typeref:typename:uint8_t *
hw_buffer	drivers/net/cpsw.c	/^	u32			hw_buffer;$/;"	m	struct:cpdma_desc	typeref:typename:u32	file:
hw_build_ptr	board/nokia/rx51/rx51.c	/^static char *hw_build_ptr;$/;"	v	typeref:typename:char *	file:
hw_config	include/ata.h	/^	unsigned short	hw_config;	\/* hardware config *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
hw_config_streaming_switch	arch/arm/include/asm/ti-common/keystone_net.h	/^#define hw_config_streaming_switch(/;"	d
hw_control1	board/keymile/common/common.h	/^	u8	hw_control1;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
hw_control2	board/keymile/common/common.h	/^	u8	hw_control2;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
hw_control3	board/keymile/common/common.h	/^	u8	hw_control3;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
hw_data_init	arch/arm/cpu/armv7/omap4/hw_data.c	/^void hw_data_init(void)$/;"	f	typeref:typename:void
hw_data_init	arch/arm/cpu/armv7/omap5/hw_data.c	/^void __weak hw_data_init(void)$/;"	f	typeref:typename:void __weak
hw_data_init	board/ti/am57xx/board.c	/^void hw_data_init(void)$/;"	f	typeref:typename:void
hw_debug_enabled	include/bedbug/type.h	/^	int hw_debug_enabled;$/;"	m	struct:__anon3619a6480108	typeref:typename:int
hw_digctl_ahb_stats_select	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_ahb_stats_select;		\/* 0x330 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_armcache	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_armcache;			\/* 0x2a0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_chipid	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_chipid;			\/* 0x310 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_dbg	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_dbg;				\/* 0x0e0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_debug_trap_l0_addr_high	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_debug_trap_l0_addr_high;	\/* 0x2d0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_debug_trap_l3_addr_high	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_debug_trap_l3_addr_high;	\/* 0x2f0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_debug_trap_l3_addr_low	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_debug_trap_l3_addr_low;	\/* 0x2e0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_entropy_latched	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_entropy_latched;		\/* 0x0a0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_fsl	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_fsl;				\/* 0x300 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l1_ahb_active_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l1_ahb_active_cycles;		\/* 0x370 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l1_ahb_data_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l1_ahb_data_cycles;		\/* 0x390 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l1_ahb_data_stalled	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l1_ahb_data_stalled;		\/* 0x380 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l2_ahb_active_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l2_ahb_active_cycles;		\/* 0x3a0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l2_ahb_data_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l2_ahb_data_cycles;		\/* 0x3c0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l2_ahb_data_stalled	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l2_ahb_data_stalled;		\/* 0x3b0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l3_ahb_active_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l3_ahb_active_cycles;		\/* 0x3d0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l3_ahb_data_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l3_ahb_data_cycles;		\/* 0x3f0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_l3_ahb_data_stalled	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_l3_ahb_data_stalled;		\/* 0x3e0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte0_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte0_loc;			\/* 0x500 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte10_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte10_loc;			\/* 0x5a0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte11_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte11_loc;			\/* 0x5b0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte12_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte12_loc;			\/* 0x5c0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte13_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte13_loc;			\/* 0x5d0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte14_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte14_loc;			\/* 0x5e0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte15_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte15_loc;			\/* 0x5f0 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte1_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte1_loc;			\/* 0x510 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte2_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte2_loc;			\/* 0x520 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte3_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte3_loc;			\/* 0x530 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte4_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte4_loc;			\/* 0x540 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte5_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte5_loc;			\/* 0x550 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte6_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte6_loc;			\/* 0x560 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte7_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte7_loc;			\/* 0x570 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte8_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte8_loc;			\/* 0x580 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_mpte9_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_mpte9_loc;			\/* 0x590 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_scratch0	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_scratch0;			\/* 0x280 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_digctl_scratch1	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	hw_digctl_scratch1;			\/* 0x290 *\/$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t
hw_dma_cfg	board/micronas/vct/scc.h	/^	int hw_dma_cfg;		\/* HW or SW DMA config flag		*\/$/;"	m	struct:scc_descriptor	typeref:typename:int
hw_dma_start	board/micronas/vct/scc.h	/^	int hw_dma_start;	\/* HW or SW DMA start\/stop flag		*\/$/;"	m	struct:scc_descriptor	typeref:typename:int
hw_ep	drivers/usb/musb-new/musb_gadget.h	/^	struct musb_hw_ep		*hw_ep;$/;"	m	struct:musb_ep	typeref:struct:musb_hw_ep *
hw_ep	drivers/usb/musb-new/musb_host.h	/^	struct musb_hw_ep	*hw_ep;		\/* current binding *\/$/;"	m	struct:musb_qh	typeref:struct:musb_hw_ep *
hw_ep_num	include/linux/usb/musb.h	/^	u8			hw_ep_num;$/;"	m	struct:musb_fifo_cfg	typeref:typename:u8
hw_feature0	drivers/net/dwc_eth_qos.c	/^	uint32_t hw_feature0;				\/* 0x11c *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
hw_feature1	drivers/net/dwc_eth_qos.c	/^	uint32_t hw_feature1;				\/* 0x120 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
hw_feature2	drivers/net/dwc_eth_qos.c	/^	uint32_t hw_feature2;				\/* 0x124 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
hw_id	board/cm5200/cm5200.c	/^static hw_id_t hw_id;$/;"	v	typeref:typename:hw_id_t	file:
hw_id_format	board/cm5200/cm5200.h	/^} hw_id_format[HW_ID_ELEM_COUNT] = {$/;"	v	typeref:struct:__anonb595836f0208[]
hw_id_identify	board/cm5200/cm5200.h	/^static int hw_id_identify[] = {$/;"	v	typeref:typename:int[]
hw_id_list	board/cm5200/cm5200.h	/^static char **hw_id_list[] = {$/;"	v	typeref:typename:char ** []
hw_id_t	board/cm5200/cm5200.h	/^typedef char hw_id_t[HW_ID_ELEM_COUNT][HW_ID_ELEM_MAXLEN];$/;"	t	typeref:typename:char[HW_ID_ELEM_COUNT][HW_ID_ELEM_MAXLEN]
hw_info	drivers/net/ne2000.c	/^static hw_info_t hw_info[] = {$/;"	v	typeref:typename:hw_info_t[]	file:
hw_info_t	drivers/net/ne2000_base.h	/^typedef struct hw_info_t {$/;"	s
hw_info_t	drivers/net/ne2000_base.h	/^} hw_info_t;$/;"	t	typeref:struct:hw_info_t
hw_init	drivers/block/sata_mv.c	/^static u32 hw_init;$/;"	v	typeref:typename:u32	file:
hw_io_coherency	include/linux/mbus.h	/^	int hw_io_coherency;$/;"	m	struct:mvebu_mbus_state	typeref:typename:int
hw_len	drivers/net/cpsw.c	/^	u32			hw_len;$/;"	m	struct:cpdma_desc	typeref:typename:u32	file:
hw_len	drivers/usb/gadget/ci_udc.h	/^	uint32_t hw_len;$/;"	m	struct:ci_req	typeref:typename:uint32_t
hw_link_training_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	hw_link_training_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
hw_lisa_map_regs	arch/arm/cpu/armv7/am33xx/emif4.c	/^static struct dmm_lisa_map_regs *hw_lisa_map_regs =$/;"	v	typeref:struct:dmm_lisa_map_regs *	file:
hw_mode	drivers/net/cpsw.c	/^	u32			hw_mode;$/;"	m	struct:cpdma_desc	typeref:typename:u32	file:
hw_next	drivers/net/cpsw.c	/^	u32			hw_next;$/;"	m	struct:cpdma_desc	typeref:typename:u32	file:
hw_partition	include/dfu.h	/^	int hw_partition;$/;"	m	struct:mmc_internal_data	typeref:typename:int
hw_power_dcdc4p2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	hw_power_dcdc4p2;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_dcdc4p2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	hw_power_dcdc4p2;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_dclimits	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	hw_power_dclimits;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_dclimits	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	hw_power_dclimits;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_misc	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	hw_power_misc;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_misc	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	hw_power_misc;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_vddactrl	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	hw_power_vddactrl;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_vddactrl	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	hw_power_vddactrl;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_vddioctrl	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	hw_power_vddioctrl;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_vddioctrl	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	hw_power_vddioctrl;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_vddmemctrl	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	hw_power_vddmemctrl;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_power_vddmemctrl	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	hw_power_vddmemctrl;$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t
hw_rev	board/esd/meesc/meesc.c	/^static int hw_rev = -1;	\/* hardware revision *\/$/;"	v	typeref:typename:int	file:
hw_sata_spd_limit	drivers/block/sata_dwc.h	/^	unsigned int		hw_sata_spd_limit;$/;"	m	struct:ata_link	typeref:typename:unsigned int
hw_screen	drivers/video/sed156x.c	/^static u8 hw_screen[LCD_PAGES][LCD_COLUMNS];$/;"	v	typeref:typename:u8[][]	file:
hw_sha1	drivers/crypto/ace_sha.c	/^void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,$/;"	f	typeref:typename:void
hw_sha1	drivers/crypto/fsl/fsl_hash.c	/^void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,$/;"	f	typeref:typename:void
hw_sha256	drivers/crypto/ace_sha.c	/^void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,$/;"	f	typeref:typename:void
hw_sha256	drivers/crypto/fsl/fsl_hash.c	/^void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,$/;"	f	typeref:typename:void
hw_sha_finish	drivers/crypto/fsl/fsl_hash.c	/^int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,$/;"	f	typeref:typename:int
hw_sha_init	drivers/crypto/fsl/fsl_hash.c	/^int hw_sha_init(struct hash_algo *algo, void **ctxp)$/;"	f	typeref:typename:int
hw_sha_update	drivers/crypto/fsl/fsl_hash.c	/^int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,$/;"	f	typeref:typename:int
hw_stats_reg_ofs	include/cpsw.h	/^	u32	hw_stats_reg_ofs;	\/* cpsw hw stats counters	*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
hw_status	board/keymile/common/common.h	/^	u8	hw_status;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
hw_sw_sel_bit	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 hw_sw_sel_bit;	\/* 0: hardware gating; 1: software gating *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
hw_sw_sel_bit	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 hw_sw_sel_bit;	\/* 0: hardware gating; 1: software gating *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
hw_usbctrl_asynclistaddr	arch/arm/include/asm/arch-mxs/regs-usb.h	/^		uint32_t	hw_usbctrl_asynclistaddr;	\/* 0x158 *\/$/;"	m	union:mxs_usb_regs::__anon5c5ef654020a	typeref:typename:uint32_t
hw_usbctrl_burstsize	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_burstsize;		\/* 0x160 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_caplength	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_caplength;		\/* 0x100 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_dccparams	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_dccparams;		\/* 0x124 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_dciversion	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_dciversion;		\/* 0x120 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_deviceaddr	arch/arm/include/asm/arch-mxs/regs-usb.h	/^		uint32_t	hw_usbctrl_deviceaddr;		\/* 0x154 *\/$/;"	m	union:mxs_usb_regs::__anon5c5ef654010a	typeref:typename:uint32_t
hw_usbctrl_endpointlistaddr	arch/arm/include/asm/arch-mxs/regs-usb.h	/^		uint32_t	hw_usbctrl_endpointlistaddr;	\/* 0x158 *\/$/;"	m	union:mxs_usb_regs::__anon5c5ef654020a	typeref:typename:uint32_t
hw_usbctrl_endptcomplete	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptcomplete;	\/* 0x1bc *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl0	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl0;		\/* 0x1c0 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl1	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl1;		\/* 0x1c4 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl2	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl2;		\/* 0x1c8 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl3	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl3;		\/* 0x1cc *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl4	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl4;		\/* 0x1d0 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl5	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl5;		\/* 0x1d4 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl6	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl6;		\/* 0x1d8 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptctrl7	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptctrl7;		\/* 0x1dc *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptflush	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptflush;		\/* 0x1b4 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptnak	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptnak;		\/* 0x178 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptnaken	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptnaken;		\/* 0x17c *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptprime	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptprime;		\/* 0x1b0 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptsetupstat	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptsetupstat;	\/* 0x1ac *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_endptstat	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_endptstat;		\/* 0x1b8 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_frindex	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_frindex;		\/* 0x14c *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_gptimer0ctrl	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_gptimer0ctrl;	\/* 0x084 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_gptimer0ld	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_gptimer0ld;		\/* 0x080 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_gptimer1ctrl	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_gptimer1ctrl;	\/* 0x08c *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_gptimer1ld	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_gptimer1ld;		\/* 0x088 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hccparams	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hccparams;		\/* 0x108 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hcsparams	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hcsparams;		\/* 0x104 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hwdevice	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hwdevice;		\/* 0x00c *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hwgeneral	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hwgeneral;		\/* 0x004 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hwhost	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hwhost;		\/* 0x008 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hwrxbuf	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hwrxbuf;		\/* 0x014 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_hwtxbuf	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_hwtxbuf;		\/* 0x010 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_ic_usb	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_ic_usb;		\/* 0x16c *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_id	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_id;			\/* 0x000 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_otgsc	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_otgsc;		\/* 0x1a4 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_periodiclistbase	arch/arm/include/asm/arch-mxs/regs-usb.h	/^		uint32_t	hw_usbctrl_periodiclistbase;	\/* 0x154 *\/$/;"	m	union:mxs_usb_regs::__anon5c5ef654010a	typeref:typename:uint32_t
hw_usbctrl_portsc1	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_portsc1;		\/* 0x184 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_sbuscfg	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_sbuscfg;		\/* 0x090 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_ttctrl	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_ttctrl;		\/* 0x15c *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_txfilltuning	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_txfilltuning;	\/* 0x164 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_ulpi	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_ulpi;		\/* 0x170 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_usbcmd	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_usbcmd;		\/* 0x140 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_usbintr	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_usbintr;		\/* 0x148 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_usbmode	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_usbmode;		\/* 0x1a8 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_usbctrl_usbsts	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		hw_usbctrl_usbsts;		\/* 0x144 *\/$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
hw_ver	board/freescale/t102xrdb/cpld.h	/^	u8 hw_ver;		\/* 0x02 - Hardware Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
hw_ver	board/freescale/t104xrdb/cpld.h	/^	u8 hw_ver;		\/* 0x02 - Hardware Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
hw_ver	board/freescale/t208xrdb/cpld.h	/^	u8 hw_ver;		\/* 0x02 - Hardware Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
hw_ver	board/freescale/t4rdb/cpld.h	/^	u8 hw_ver;	\/* 0x04 - PCBA Version Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
hw_watchdog_disable	drivers/watchdog/omap_wdt.c	/^void hw_watchdog_disable(void)$/;"	f	typeref:typename:void
hw_watchdog_disable	drivers/watchdog/xilinx_tb_wdt.c	/^void hw_watchdog_disable(void)$/;"	f	typeref:typename:void
hw_watchdog_init	board/BuS/eb_cpu5282/eb_cpu5282.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	board/siemens/rut/board.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	board/technologic/ts4800/ts4800.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/at91sam9_wdt.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/bfin_wdt.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/designware_wdt.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/ftwdt010_wdt.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/imx_watchdog.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/omap_wdt.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init	drivers/watchdog/xilinx_tb_wdt.c	/^void hw_watchdog_init(void)$/;"	f	typeref:typename:void
hw_watchdog_init_done	board/siemens/rut/board.c	/^static bool hw_watchdog_init_done;$/;"	v	typeref:typename:bool	file:
hw_watchdog_isr	drivers/watchdog/xilinx_tb_wdt.c	/^static void hw_watchdog_isr(void *arg)$/;"	f	typeref:typename:void	file:
hw_watchdog_reset	arch/m68k/cpu/mcf547x_8x/cpu.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/BuS/eb_cpu5282/eb_cpu5282.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/a3m071/a3m071.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/amcc/luan/luan.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/amcc/yosemite/yosemite.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/gdsys/p1022/controlcenterd.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/liebherr/lwmon5/lwmon5.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/nokia/rx51/rx51.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/omicron/calimain/calimain.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/siemens/rut/board.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/technologic/ts4800/ts4800.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/v38b/v38b.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	board/ve8313/ve8313.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/at91sam9_wdt.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/bfin_wdt.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/designware_wdt.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/ftwdt010_wdt.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/imx_watchdog.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/omap_wdt.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_reset	drivers/watchdog/xilinx_tb_wdt.c	/^void hw_watchdog_reset(void)$/;"	f	typeref:typename:void
hw_watchdog_trigger_level	board/siemens/rut/board.c	/^static int  hw_watchdog_trigger_level;$/;"	v	typeref:typename:int	file:
hwadapnr	include/i2c.h	/^	int		hwadapnr;$/;"	m	struct:i2c_adapter	typeref:typename:int
hwaddr	drivers/net/greth.c	/^	unsigned char hwaddr[6];	\/* MAC Address *\/$/;"	m	struct:__anonb53b88540108	typeref:typename:unsigned char[6]	file:
hwaddr	include/api_public.h	/^			unsigned char	hwaddr[6];$/;"	m	struct:device_info::__anonf417d2e6020a::__anonf417d2e60408	typeref:typename:unsigned char[6]
hwaddr_size	include/efi_api.h	/^	u32 hwaddr_size;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
hwalk_r	lib/hashtable.c	/^int hwalk_r(struct hsearch_data *htab, int (*callback)(ENTRY *))$/;"	f	typeref:typename:int
hwconfig	include/hwconfig.h	/^static inline int hwconfig(const char *opt)$/;"	f	typeref:typename:int
hwconfig_arg	include/hwconfig.h	/^static inline const char *hwconfig_arg(const char *opt, size_t *arglen)$/;"	f	typeref:typename:const char *
hwconfig_arg_cmp	include/hwconfig.h	/^static inline int hwconfig_arg_cmp(const char *opt, const char *arg)$/;"	f	typeref:typename:int
hwconfig_arg_cmp_f	common/hwconfig.c	/^int hwconfig_arg_cmp_f(const char *opt, const char *arg, char *buf)$/;"	f	typeref:typename:int
hwconfig_arg_cmp_f	include/hwconfig.h	/^static inline int hwconfig_arg_cmp_f(const char *opt, const char *arg,$/;"	f	typeref:typename:int
hwconfig_arg_f	common/hwconfig.c	/^const char *hwconfig_arg_f(const char *opt, size_t *arglen, char *buf)$/;"	f	typeref:typename:const char *
hwconfig_arg_f	include/hwconfig.h	/^static inline const char *hwconfig_arg_f(const char *opt, size_t *arglen,$/;"	f	typeref:typename:const char *
hwconfig_f	common/hwconfig.c	/^int hwconfig_f(const char *opt, char *buf)$/;"	f	typeref:typename:int
hwconfig_f	include/hwconfig.h	/^static inline int hwconfig_f(const char *opt, char *buf)$/;"	f	typeref:typename:int
hwconfig_parse	common/hwconfig.c	/^static const char *hwconfig_parse(const char *opts, size_t maxlen,$/;"	f	typeref:typename:const char *	file:
hwconfig_sub	include/hwconfig.h	/^static inline int hwconfig_sub(const char *opt, const char *subopt)$/;"	f	typeref:typename:int
hwconfig_sub_f	common/hwconfig.c	/^int hwconfig_sub_f(const char *opt, const char *subopt, char *buf)$/;"	f	typeref:typename:int
hwconfig_sub_f	include/hwconfig.h	/^static inline int hwconfig_sub_f(const char *opt, const char *subopt, char *buf)$/;"	f	typeref:typename:int
hwconfig_subarg	include/hwconfig.h	/^static inline const char *hwconfig_subarg(const char *opt, const char *subopt,$/;"	f	typeref:typename:const char *
hwconfig_subarg_cmp	include/hwconfig.h	/^static inline int hwconfig_subarg_cmp(const char *opt, const char *subopt,$/;"	f	typeref:typename:int
hwconfig_subarg_cmp_f	common/hwconfig.c	/^int hwconfig_subarg_cmp_f(const char *opt, const char *subopt,$/;"	f	typeref:typename:int
hwconfig_subarg_cmp_f	include/hwconfig.h	/^static inline int hwconfig_subarg_cmp_f(const char *opt, const char *subopt,$/;"	f	typeref:typename:int
hwconfig_subarg_f	common/hwconfig.c	/^const char *hwconfig_subarg_f(const char *opt, const char *subopt,$/;"	f	typeref:typename:const char *
hwconfig_subarg_f	include/hwconfig.h	/^static inline const char *hwconfig_subarg_f(const char *opt, const char *subopt,$/;"	f	typeref:typename:const char *
hwcontrol	include/linux/mtd/nand.h	/^	struct nand_hw_control hwcontrol;$/;"	m	struct:nand_chip	typeref:struct:nand_hw_control
hwcontrol	include/linux/mtd/nand.h	/^	void (*hwcontrol)(struct mtd_info *mtd, int cmd);$/;"	m	struct:platform_nand_ctrl	typeref:typename:void (*)(struct mtd_info * mtd,int cmd)
hwctl	include/linux/mtd/nand.h	/^	void (*hwctl)(struct mtd_info *mtd, int mode);$/;"	m	struct:nand_ecc_ctrl	typeref:typename:void (*)(struct mtd_info * mtd,int mode)
hwctrl	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	u32	hwctrl;$/;"	m	struct:socfpga_freeze_controller	typeref:typename:u32
hwdev	arch/m68k/include/asm/immap_5329.h	/^	u32 hwdev;		\/* 0x00C Device HW parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hwdevice	include/usb/ehci-ci.h	/^	u32	hwdevice;	\/* 0x00C - Device hardware parameters  *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hweight16	arch/arc/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/arm/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/blackfin/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/m68k/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/microblaze/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/mips/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/nds32/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/openrisc/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/powerpc/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/sandbox/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight16	arch/x86/include/asm/bitops.h	/^#define hweight16(/;"	d
hweight32	arch/arc/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/arm/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/blackfin/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/m68k/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/microblaze/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/mips/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/nds32/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/openrisc/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/powerpc/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/sandbox/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight32	arch/x86/include/asm/bitops.h	/^#define hweight32(/;"	d
hweight8	arch/arc/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/arm/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/blackfin/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/m68k/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/microblaze/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/mips/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/nds32/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/openrisc/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/powerpc/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/sandbox/include/asm/bitops.h	/^#define hweight8(/;"	d
hweight8	arch/x86/include/asm/bitops.h	/^#define hweight8(/;"	d
hwgeneral	arch/m68k/include/asm/immap_5329.h	/^	u32 hwgeneral;		\/* 0x004 General HW Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hwgeneral	include/usb/ehci-ci.h	/^	u32	hwgeneral;	\/* 0x004 - General hardware parameters *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hwhost	arch/m68k/include/asm/immap_5329.h	/^	u32 hwhost;		\/* 0x008 Host HW Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hwhost	include/usb/ehci-ci.h	/^	u32	hwhost;		\/* 0x008 - Host hardware parameters *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hwinfo	arch/arm/include/asm/ehci-omap.h	/^	u32 hwinfo;		\/* 0x04 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
hwinfo	arch/arm/include/asm/ehci-omap.h	/^	u32 hwinfo;	\/* 0x04 *\/$/;"	m	struct:omap_uhh	typeref:typename:u32
hwncsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	} hwncsr[3];$/;"	m	struct:ccsr_clk_cluster_group	typeref:struct:ccsr_clk_cluster_group::__anon245f08ff0208[3]
hword	drivers/usb/host/ohci-s3c24xx.c	/^		__u16 hword[8];$/;"	m	union:ohci_submit_rh_msg::__anon1f109079010a	typeref:typename:__u16[8]	file:
hwparams	drivers/usb/dwc3/core.h	/^	struct dwc3_hwparams	hwparams;$/;"	m	struct:dwc3	typeref:struct:dwc3_hwparams
hwparams0	drivers/usb/dwc3/core.h	/^	u32	hwparams0;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams1	drivers/usb/dwc3/core.h	/^	u32	hwparams1;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams2	drivers/usb/dwc3/core.h	/^	u32	hwparams2;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams3	drivers/usb/dwc3/core.h	/^	u32	hwparams3;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams4	drivers/usb/dwc3/core.h	/^	u32	hwparams4;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams5	drivers/usb/dwc3/core.h	/^	u32	hwparams5;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams6	drivers/usb/dwc3/core.h	/^	u32	hwparams6;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams7	drivers/usb/dwc3/core.h	/^	u32	hwparams7;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwparams8	drivers/usb/dwc3/core.h	/^	u32	hwparams8;$/;"	m	struct:dwc3_hwparams	typeref:typename:u32
hwpart	include/blk.h	/^	unsigned char	hwpart;		\/* HW partition, e.g. for eMMC *\/$/;"	m	struct:blk_desc	typeref:typename:unsigned char
hwrpb	arch/x86/include/asm/coreboot_tables.h	/^	u64 hwrpb;$/;"	m	struct:cb_hwrpb	typeref:typename:u64
hwrxbuf	arch/m68k/include/asm/immap_5329.h	/^	u32 hwrxbuf;		\/* 0x014 RX Buffer HW Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hwrxbuf	include/usb/ehci-ci.h	/^	u32	hwrxbuf;	\/* 0x014 - RX buffer hardware parameters *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hws_access_type	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^enum hws_access_type {$/;"	g
hws_algo_type	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^enum hws_algo_type {$/;"	g
hws_bist_operation	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^enum hws_bist_operation {$/;"	g
hws_board_topology_load	board/Marvell/db-88f6820-amc/db-88f6820-amc.c	/^int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)$/;"	f	typeref:typename:int
hws_board_topology_load	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)$/;"	f	typeref:typename:int
hws_board_topology_load	board/solidrun/clearfog/clearfog.c	/^int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)$/;"	f	typeref:typename:int
hws_bus_width	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^enum hws_bus_width {$/;"	g
hws_control_element	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_control_element {$/;"	g
hws_cs_config_info	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct hws_cs_config_info {$/;"	s
hws_ctrl_serdes_rev_get	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u8 hws_ctrl_serdes_rev_get(void)$/;"	f	typeref:typename:u8
hws_ddr3_calc_mem_cs_size	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_calc_mem_cs_size(u32 if_id, u32 cs, u32 *cs_size)$/;"	f	typeref:typename:int
hws_ddr3_cs_base_adr_calc	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_cs_base_adr_calc(u32 if_id, u32 cs, u32 *cs_base_addr)$/;"	f	typeref:typename:int
hws_ddr3_get_bus_width	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 hws_ddr3_get_bus_width(void)$/;"	f	typeref:typename:u32
hws_ddr3_get_device_size	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 hws_ddr3_get_device_size(u32 if_id)$/;"	f	typeref:typename:u32
hws_ddr3_get_device_width	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 hws_ddr3_get_device_width(u32 if_id)$/;"	f	typeref:typename:u32
hws_ddr3_run_bist	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^int hws_ddr3_run_bist(u32 dev_num, enum hws_pattern pattern, u32 *result,$/;"	f	typeref:typename:int
hws_ddr3_tip_init_controller	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_tip_init_controller(u32 dev_num, struct init_cntr_param *init_cntr_prm)$/;"	f	typeref:typename:int
hws_ddr3_tip_load_topology_map	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_tip_load_topology_map(u32 dev_num, struct hws_topology_map *tm)$/;"	f	typeref:typename:int
hws_ddr3_tip_max_cs_get	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^u32 hws_ddr3_tip_max_cs_get(void)$/;"	f	typeref:typename:u32
hws_ddr3_tip_mode_read	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_tip_mode_read(u32 dev_num, struct mode_info *mode_info)$/;"	f	typeref:typename:int
hws_ddr3_tip_run_alg	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_tip_run_alg(u32 dev_num, enum hws_algo_type algo_type)$/;"	f	typeref:typename:int
hws_ddr3_tip_select_ddr_controller	drivers/ddr/marvell/a38x/ddr3_training.c	/^int hws_ddr3_tip_select_ddr_controller(u32 dev_num, int enable)$/;"	f	typeref:typename:int
hws_ddr3_tip_sweep_test	drivers/ddr/marvell/a38x/ddr3_debug.c	/^void hws_ddr3_tip_sweep_test(int enable)$/;"	f	typeref:typename:void
hws_ddr_cs	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_ddr_cs {$/;"	g
hws_ddr_freq	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^enum hws_ddr_freq {$/;"	g
hws_ddr_phy	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_ddr_phy {$/;"	g
hws_dir	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_dir {$/;"	g
hws_edge	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^enum hws_edge {$/;"	g
hws_edge_compare	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_edge_compare {$/;"	g
hws_edge_search	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^enum hws_edge_search {$/;"	g
hws_get_ext_base_addr	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^int hws_get_ext_base_addr(u32 serdes_num, u32 base_addr, u32 unit_base_offset,$/;"	f	typeref:typename:int
hws_get_physical_serdes_num	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^u32 hws_get_physical_serdes_num(u32 serdes_num)$/;"	f	typeref:typename:u32
hws_is_serdes_active	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^int hws_is_serdes_active(u8 lane_num)$/;"	f	typeref:typename:int
hws_mem_size	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^enum hws_mem_size {$/;"	g
hws_operation	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_operation {$/;"	g
hws_page_size	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_page_size {$/;"	g
hws_pattern	drivers/ddr/marvell/a38x/ddr3_training_ip_db.h	/^enum hws_pattern {$/;"	g
hws_pattern_duration	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^enum hws_pattern_duration {$/;"	g
hws_pex_config	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c	/^int hws_pex_config(const struct serdes_map *serdes_map, u8 count)$/;"	f	typeref:typename:int
hws_pex_tx_config_seq	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_pex_tx_config_seq(const struct serdes_map *serdes_map, u8 count)$/;"	f	typeref:typename:int
hws_power_up_serdes_lanes	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_power_up_serdes_lanes(struct serdes_map *serdes_map, u8 count)$/;"	f	typeref:typename:int
hws_pre_serdes_init_config	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_pre_serdes_init_config(void)$/;"	f	typeref:typename:int
hws_ref_clock_set	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type,$/;"	f	typeref:typename:int
hws_result	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^enum hws_result {$/;"	g
hws_search_dir	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_search_dir {$/;"	g
hws_serdes_get_max_lane	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^u32 hws_serdes_get_max_lane(void)$/;"	f	typeref:typename:u32
hws_serdes_get_phy_selector_val	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^u32 hws_serdes_get_phy_selector_val(int serdes_num,$/;"	f	typeref:typename:u32
hws_serdes_get_ref_clock_val	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u32 hws_serdes_get_ref_clock_val(enum serdes_type serdes_type)$/;"	f	typeref:typename:u32
hws_serdes_pex_ref_clock_satr_get	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_serdes_pex_ref_clock_satr_get(enum serdes_type serdes_type, u32 *pex_satr)$/;"	f	typeref:typename:int
hws_serdes_seq_db_init	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_serdes_seq_db_init(void)$/;"	f	typeref:typename:int
hws_serdes_seq_init	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^int hws_serdes_seq_init(void)$/;"	f	typeref:typename:int
hws_serdes_silicon_ref_clock_get	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^u32 hws_serdes_silicon_ref_clock_get(void)$/;"	f	typeref:typename:u32
hws_serdes_topology_verify	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u32 hws_serdes_topology_verify(enum serdes_type serdes_type, u32 serdes_id,$/;"	f	typeref:typename:u32
hws_serdes_xaui_topology_verify	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^void hws_serdes_xaui_topology_verify(void)$/;"	f	typeref:typename:void
hws_speed_bin	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^enum hws_speed_bin {$/;"	g
hws_static_config_type	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^enum hws_static_config_type {$/;"	g
hws_stress_jump	drivers/ddr/marvell/a38x/ddr3_training_ip_bist.h	/^enum  hws_stress_jump {$/;"	g
hws_temperature	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^enum hws_temperature {$/;"	g
hws_tip_config_func_db	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^struct hws_tip_config_func_db {$/;"	s
hws_tip_freq_config_info	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct hws_tip_freq_config_info {$/;"	s
hws_tip_static_config_info	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^struct hws_tip_static_config_info {$/;"	s
hws_topology_map	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^struct hws_topology_map {$/;"	s
hws_training_ip_stat	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_training_ip_stat {$/;"	g
hws_training_load_op	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^enum hws_training_load_op {$/;"	g
hws_training_result	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^enum hws_training_result {$/;"	g
hws_update_serdes_phy_selectors	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int hws_update_serdes_phy_selectors(struct serdes_map *serdes_map, u8 count)$/;"	f	typeref:typename:int
hws_wl_supp	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^enum hws_wl_supp {$/;"	g
hws_xsb_info	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct hws_xsb_info {$/;"	s
hwspinlock	arch/arm/dts/am33xx.dtsi	/^		hwspinlock: spinlock@480ca000 {$/;"	l
hwspinlock	arch/arm/dts/am4372.dtsi	/^		hwspinlock: spinlock@480ca000 {$/;"	l
hwspinlock	arch/arm/dts/dra7.dtsi	/^		hwspinlock: spinlock@4a0f6000 {$/;"	l
hwstatus_cmd	drivers/mtd/nand/tegra_nand.h	/^	u32	hwstatus_cmd;	\/* offset 50h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
hwstatus_mask	drivers/mtd/nand/tegra_nand.h	/^	u32	hwstatus_mask;	\/* offset 54h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
hwtxbuf	arch/m68k/include/asm/immap_5329.h	/^	u32 hwtxbuf;		\/* 0x010 TX Buffer HW Parameters *\/$/;"	m	struct:usb_otg	typeref:typename:u32
hwtxbuf	include/usb/ehci-ci.h	/^	u32	hwtxbuf;	\/* 0x010 - TX buffer hardware parameters *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
hwver	board/freescale/c29xpcie/cpld.h	/^	u8 hwver;	\/* 0x2 - Hardware Version Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
hwvers	drivers/usb/musb-new/musb_core.h	/^	u16			hwvers;$/;"	m	struct:musb	typeref:typename:u16
hwvers	drivers/usb/musb/musb_core.h	/^	u16	hwvers;$/;"	m	struct:musb_regs	typeref:typename:u16
hwversion_pins	board/omicron/calimain/calimain.c	/^const struct pinmux_config hwversion_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
hx	arch/powerpc/cpu/mpc8xx/video.c	/^	unsigned	hx:2,		\/* Horizontal sync *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:2	file:
hydra_initialize	board/gdsys/p1022/controlcenterd.c	/^static void hydra_initialize(void)$/;"	f	typeref:typename:void	file:
hydra_mdio	board/freescale/corenet_ds/eth_hydra.c	/^struct hydra_mdio {$/;"	s	file:
hydra_mdio_init	board/freescale/corenet_ds/eth_hydra.c	/^static int hydra_mdio_init(char *realbusname, char *fakebusname)$/;"	f	typeref:typename:int	file:
hydra_mdio_read	board/freescale/corenet_ds/eth_hydra.c	/^static int hydra_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
hydra_mdio_reset	board/freescale/corenet_ds/eth_hydra.c	/^static int hydra_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
hydra_mdio_set_mux	board/freescale/corenet_ds/eth_hydra.c	/^static void hydra_mdio_set_mux(char *name, u8 mask, u8 val)$/;"	f	typeref:typename:void	file:
hydra_mdio_write	board/freescale/corenet_ds/eth_hydra.c	/^static int hydra_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
hydra_mux_mdio	board/freescale/corenet_ds/eth_hydra.c	/^void hydra_mux_mdio(u8 mask, u8 val)$/;"	f	typeref:typename:void
hydra_supported	board/gdsys/p1022/controlcenterd.c	/^static struct pci_device_id hydra_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
hym8563	arch/arm/dts/rk3036-sdk.dts	/^        hym8563: hym8563@51 {$/;"	l
hym8563	arch/arm/dts/rk3288-evb.dtsi	/^	hym8563: hym8563@51 {$/;"	l
hym8563	arch/arm/dts/rk3288-firefly.dtsi	/^	hym8563: hym8563@51 {$/;"	l
hysnc_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	hysnc_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
i	arch/powerpc/include/asm/mmu.h	/^	unsigned long i:1;	\/* Cache inhibit *\/$/;"	m	struct:_BATL	typeref:typename:unsigned long:1
i	arch/powerpc/include/asm/mmu.h	/^	unsigned long i:1;	\/* Cache inhibit *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:1
i	arch/powerpc/include/asm/mmu.h	/^	unsigned long i:1;	\/* Cache inhibited *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
i	drivers/mtd/ubispl/ubispl.c	/^	int i;$/;"	m	struct:ubi_attach_info	typeref:typename:int	file:
i	drivers/usb/gadget/storage_common.c	/^struct device_attribute { int i; };$/;"	m	struct:device_attribute	typeref:typename:int	file:
i	examples/standalone/mem_to_mem_idma2intr.c	/^	uint i;$/;"	m	union:ibdbitsu	typeref:typename:uint	file:
i	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort i;$/;"	m	union:dcmbitsu	typeref:typename:ushort	file:
i	fs/jffs2/summary.h	/^	struct jffs2_sum_inode_flash i;$/;"	m	union:jffs2_sum_flash	typeref:struct:jffs2_sum_inode_flash
i	fs/jffs2/summary.h	/^	struct jffs2_sum_inode_mem i;$/;"	m	union:jffs2_sum_mem	typeref:struct:jffs2_sum_inode_mem
i	include/jffs2/jffs2.h	/^	struct jffs2_raw_inode i;$/;"	m	union:jffs2_node_union	typeref:struct:jffs2_raw_inode
i	include/linux/compat.h	/^struct kernel_param { int i; };$/;"	m	struct:kernel_param	typeref:typename:int
i	include/linux/compat.h	/^struct mutex { int i; };$/;"	m	struct:mutex	typeref:typename:int
i	include/linux/compat.h	/^struct rw_semaphore { int i; };$/;"	m	struct:rw_semaphore	typeref:typename:int
i	scripts/kconfig/zconf.lex.c	/^	int ts, i;$/;"	v	typeref:typename:int
i0	arch/blackfin/include/asm/ptrace.h	/^	long i0;$/;"	m	struct:pt_regs	typeref:typename:long
i1	arch/blackfin/include/asm/ptrace.h	/^	long i1;$/;"	m	struct:pt_regs	typeref:typename:long
i1394	include/linux/edd.h	/^		} __attribute__ ((packed)) i1394;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0d08
i2	arch/blackfin/include/asm/ptrace.h	/^	long i2;$/;"	m	struct:pt_regs	typeref:typename:long
i2add	arch/powerpc/include/asm/immap_85xx.h	/^	u8	i2add;$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8
i2brg	arch/powerpc/include/asm/immap_85xx.h	/^	u8	i2brg;$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8
i2c	arch/arm/include/asm/arch-am33xx/i2c.h	/^struct i2c {$/;"	s
i2c	arch/arm/include/asm/arch-omap3/i2c.h	/^struct i2c {$/;"	s
i2c	arch/arm/include/asm/arch-omap4/i2c.h	/^struct i2c {$/;"	s
i2c	arch/arm/include/asm/arch-omap5/i2c.h	/^struct i2c {$/;"	s
i2c	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct i2c {$/;"	s
i2c	arch/powerpc/include/asm/immap_512x.h	/^	i2c512x_t		i2c;		\/* I2C Controllers *\/$/;"	m	struct:immap	typeref:typename:i2c512x_t
i2c	arch/powerpc/include/asm/immap_8260.h	/^typedef struct i2c {$/;"	s
i2c	arch/powerpc/include/asm/immap_83xx.h	/^	fsl_i2c_t		i2c[2];		\/* I2C Controllers *\/$/;"	m	struct:immap	typeref:typename:fsl_i2c_t[2]
i2c	arch/powerpc/include/asm/immap_85xx.h	/^	struct fsl_i2c_base	i2c[1];$/;"	m	struct:ccsr_i2c	typeref:struct:fsl_i2c_base[1]
i2c	arch/powerpc/include/asm/immap_86xx.h	/^	struct fsl_i2c_base	i2c[2];$/;"	m	struct:ccsr_i2c	typeref:struct:fsl_i2c_base[2]
i2c	include/power/pmic.h	/^		struct p_i2c i2c;$/;"	m	union:pmic::hw	typeref:struct:p_i2c
i2c0	arch/arm/dts/am335x-draco.dtsi	/^		i2c0: i2c@44e0b000 {$/;"	l
i2c0	arch/arm/dts/am33xx.dtsi	/^		i2c0: i2c@44e0b000 {$/;"	l
i2c0	arch/arm/dts/am4372.dtsi	/^		i2c0: i2c@44e0b000 {$/;"	l
i2c0	arch/arm/dts/armada-370-xp.dtsi	/^			i2c0: i2c@11000 {$/;"	l
i2c0	arch/arm/dts/armada-375.dtsi	/^			i2c0: i2c@11000 {$/;"	l
i2c0	arch/arm/dts/armada-37xx.dtsi	/^			i2c0: i2c@11000 {$/;"	l
i2c0	arch/arm/dts/armada-38x.dtsi	/^			i2c0: i2c@11000 {$/;"	l
i2c0	arch/arm/dts/armada-ap806.dtsi	/^			i2c0: i2c@511000 {$/;"	l
i2c0	arch/arm/dts/armada-xp.dtsi	/^			i2c0: i2c@11000 {$/;"	l
i2c0	arch/arm/dts/at91sam9260.dtsi	/^			i2c0: i2c@fffac000 {$/;"	l
i2c0	arch/arm/dts/at91sam9261.dtsi	/^			i2c0: i2c@fffac000 {$/;"	l
i2c0	arch/arm/dts/at91sam9263.dtsi	/^			i2c0: i2c@fff88000 {$/;"	l
i2c0	arch/arm/dts/at91sam9g20.dtsi	/^			i2c0: i2c@fffac000 {$/;"	l
i2c0	arch/arm/dts/at91sam9g45.dtsi	/^			i2c0: i2c@fff84000 {$/;"	l
i2c0	arch/arm/dts/fsl-ls1012a.dtsi	/^		i2c0: i2c@2180000 {$/;"	l
i2c0	arch/arm/dts/fsl-ls1043a.dtsi	/^		i2c0: i2c@2180000 {$/;"	l
i2c0	arch/arm/dts/fsl-ls1046a.dtsi	/^		i2c0: i2c@2180000 {$/;"	l
i2c0	arch/arm/dts/keystone.dtsi	/^		i2c0: i2c@2530000 {$/;"	l
i2c0	arch/arm/dts/ls1021a.dtsi	/^		i2c0: i2c@2180000 {$/;"	l
i2c0	arch/arm/dts/rk3288.dtsi	/^	i2c0: i2c@ff650000 {$/;"	l
i2c0	arch/arm/dts/sama5d2.dtsi	/^			i2c0: i2c@f8028000 {$/;"	l
i2c0	arch/arm/dts/socfpga.dtsi	/^		i2c0: i2c@ffc04000 {$/;"	l
i2c0	arch/arm/dts/sun4i-a10.dtsi	/^		i2c0: i2c@01c2ac00 {$/;"	l
i2c0	arch/arm/dts/sun50i-a64.dtsi	/^		i2c0: i2c@1c2ac00 {$/;"	l
i2c0	arch/arm/dts/sun5i.dtsi	/^		i2c0: i2c@01c2ac00 {$/;"	l
i2c0	arch/arm/dts/sun6i-a31.dtsi	/^		i2c0: i2c@01c2ac00 {$/;"	l
i2c0	arch/arm/dts/sun7i-a20.dtsi	/^		i2c0: i2c@01c2ac00 {$/;"	l
i2c0	arch/arm/dts/sun8i-a23-a33.dtsi	/^		i2c0: i2c@01c2ac00 {$/;"	l
i2c0	arch/arm/dts/sun9i-a80.dtsi	/^		i2c0: i2c@07002800 {$/;"	l
i2c0	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c0: i2c@58780000 {$/;"	l
i2c0	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c0: i2c@58780000 {$/;"	l
i2c0	arch/arm/dts/uniphier-ld4.dtsi	/^	i2c0: i2c@58400000 {$/;"	l
i2c0	arch/arm/dts/uniphier-pro4.dtsi	/^	i2c0: i2c@58780000 {$/;"	l
i2c0	arch/arm/dts/uniphier-pro5.dtsi	/^	i2c0: i2c@58780000 {$/;"	l
i2c0	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c0: i2c@58780000 {$/;"	l
i2c0	arch/arm/dts/uniphier-sld3.dtsi	/^		i2c0: i2c@58400000 {$/;"	l
i2c0	arch/arm/dts/uniphier-sld8.dtsi	/^	i2c0: i2c@58400000 {$/;"	l
i2c0	arch/arm/dts/zynq-7000.dtsi	/^		i2c0: i2c@e0004000 {$/;"	l	label:amba
i2c0	arch/arm/dts/zynqmp.dtsi	/^		i2c0: i2c@ff020000 {$/;"	l
i2c0	arch/xtensa/dts/xtfpga.dtsi	/^		i2c0: i2c-master@0d090000 {$/;"	l
i2c0	include/gdsys_fpga.h	/^	struct ihs_i2c i2c0;	\/* 0x0040 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_i2c
i2c0	include/gdsys_fpga.h	/^	struct ihs_i2c i2c0;	\/* 0x0060 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_i2c
i2c0	include/gdsys_fpga.h	/^	struct ihs_i2c i2c0;	\/* 0x00d0 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_i2c
i2c0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	can0_aper_clk, can1_aper_clk, i2c0_aper_clk, i2c1_aper_clk,$/;"	e	enum:zynq_clk
i2c0_mux_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const i2c0_mux_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int i2c0_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int i2c0_muxvals[] = {0};$/;"	v	typeref:typename:const int[]	file:
i2c0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int i2c0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c0_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/gumstix/pepper/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/siemens/draco/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/silica/pengwyn/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux i2c0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c0_pins	arch/arm/dts/am335x-bone-common.dtsi	/^	i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am335x-draco.dtsi	/^		i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am335x-evm.dts	/^	i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am335x-evmsk.dts	/^	i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am335x-pxm2.dtsi	/^	i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am335x-rut.dts	/^	i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am437x-gp-evm.dts	/^	i2c0_pins: i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am437x-sk-evm.dts	/^	i2c0_pins: i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/am43x-epos-evm.dts	/^		i2c0_pins: pinmux_i2c0_pins {$/;"	l
i2c0_pins	arch/arm/dts/armada-375.dtsi	/^				i2c0_pins: i2c0-pins {$/;"	l
i2c0_pins	arch/arm/dts/armada-38x.dtsi	/^				i2c0_pins: i2c-pins-0 {$/;"	l	label:pinctrl
i2c0_pins	arch/arm/dts/sun50i-a64.dtsi	/^			i2c0_pins: i2c0_pins {$/;"	l	label:pio
i2c0_pins	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config i2c0_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
i2c0_pins	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config i2c0_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned i2c0_pins[] = {63, 64};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned i2c0_pins[] = {63, 64};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned i2c0_pins[] = {102, 103};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned i2c0_pins[] = {109, 110};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned i2c0_pins[] = {142, 143};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c0_pins[] = {112, 113};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned i2c0_pins[] = {109, 110};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned i2c0_pins[] = {36};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned i2c0_pins[] = {102, 103};$/;"	v	typeref:typename:const unsigned[]	file:
i2c0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			i2c0_pins_a: i2c0@0 {$/;"	l	label:pio
i2c0_pins_a	arch/arm/dts/sun5i.dtsi	/^			i2c0_pins_a: i2c0@0 {$/;"	l	label:pio
i2c0_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			i2c0_pins_a: i2c0@0 {$/;"	l	label:pio
i2c0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			i2c0_pins_a: i2c0@0 {$/;"	l	label:pio
i2c0_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			i2c0_pins_a: i2c0@0 {$/;"	l	label:pio
i2c0_pins_default	arch/arm/dts/am335x-icev2.dts	/^	i2c0_pins_default: i2c0_pins_default {$/;"	l
i2c0_pins_default	arch/arm/dts/am437x-idk-evm.dts	/^	i2c0_pins_default: i2c0_pins_default {$/;"	l
i2c0_pins_sleep	arch/arm/dts/am437x-idk-evm.dts	/^	i2c0_pins_sleep: i2c0_pins_sleep {$/;"	l
i2c0_scl	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int i2c0_scl;$/;"	m	struct:pad_signals	typeref:typename:int
i2c0_scl	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int i2c0_scl;$/;"	m	struct:pad_signals	typeref:typename:int
i2c0_sda	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int i2c0_sda;$/;"	m	struct:pad_signals	typeref:typename:int
i2c0_sda	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int i2c0_sda;$/;"	m	struct:pad_signals	typeref:typename:int
i2c0_xfer	arch/arm/dts/rk3288.dtsi	/^			i2c0_xfer: i2c0-xfer {$/;"	l
i2c0_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c0_xfer: i2c0-xfer {$/;"	l	label:pinctrl
i2c0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int i2c0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
i2c0usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	i2c0usefpga;			\/* 0x704 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
i2c1	arch/arm/dts/am33xx.dtsi	/^		i2c1: i2c@4802a000 {$/;"	l
i2c1	arch/arm/dts/am4372.dtsi	/^		i2c1: i2c@4802a000 {$/;"	l
i2c1	arch/arm/dts/armada-370-xp.dtsi	/^			i2c1: i2c@11100 {$/;"	l
i2c1	arch/arm/dts/armada-375.dtsi	/^			i2c1: i2c@11100 {$/;"	l
i2c1	arch/arm/dts/armada-38x.dtsi	/^			i2c1: i2c@11100 {$/;"	l
i2c1	arch/arm/dts/armada-xp.dtsi	/^			i2c1: i2c@11100 {$/;"	l
i2c1	arch/arm/dts/at91-sama5d2_xplained.dts	/^			i2c1: i2c@fc028000 {$/;"	l
i2c1	arch/arm/dts/at91sam9g45.dtsi	/^			i2c1: i2c@fff88000 {$/;"	l
i2c1	arch/arm/dts/dra7.dtsi	/^		i2c1: i2c@48070000 {$/;"	l
i2c1	arch/arm/dts/fsl-ls1012a.dtsi	/^		i2c1: i2c@2190000 {$/;"	l
i2c1	arch/arm/dts/fsl-ls1043a.dtsi	/^		i2c1: i2c@2190000 {$/;"	l
i2c1	arch/arm/dts/fsl-ls1046a.dtsi	/^		i2c1: i2c@2190000 {$/;"	l
i2c1	arch/arm/dts/imx6qdl.dtsi	/^			i2c1: i2c@021a0000 {$/;"	l
i2c1	arch/arm/dts/imx6ull.dtsi	/^			i2c1: i2c@021a0000 {$/;"	l	label:aips2
i2c1	arch/arm/dts/imx7.dtsi	/^			i2c1: i2c@30a20000 {$/;"	l	label:aips3
i2c1	arch/arm/dts/keystone.dtsi	/^		i2c1: i2c@2530400 {$/;"	l
i2c1	arch/arm/dts/ls1021a.dtsi	/^		i2c1: i2c@2190000 {$/;"	l
i2c1	arch/arm/dts/rk3036.dtsi	/^	i2c1: i2c@20056000 {$/;"	l
i2c1	arch/arm/dts/rk3288.dtsi	/^	i2c1: i2c@ff140000 {$/;"	l
i2c1	arch/arm/dts/sama5d2.dtsi	/^			i2c1: i2c@fc028000 {$/;"	l
i2c1	arch/arm/dts/socfpga.dtsi	/^		i2c1: i2c@ffc05000 {$/;"	l
i2c1	arch/arm/dts/sun4i-a10.dtsi	/^		i2c1: i2c@01c2b000 {$/;"	l
i2c1	arch/arm/dts/sun50i-a64.dtsi	/^		i2c1: i2c@1c2b000 {$/;"	l
i2c1	arch/arm/dts/sun5i.dtsi	/^		i2c1: i2c@01c2b000 {$/;"	l
i2c1	arch/arm/dts/sun6i-a31.dtsi	/^		i2c1: i2c@01c2b000 {$/;"	l
i2c1	arch/arm/dts/sun7i-a20.dtsi	/^		i2c1: i2c@01c2b000 {$/;"	l
i2c1	arch/arm/dts/sun8i-a23-a33.dtsi	/^		i2c1: i2c@01c2b000 {$/;"	l
i2c1	arch/arm/dts/sun9i-a80.dtsi	/^		i2c1: i2c@07002c00 {$/;"	l
i2c1	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c1: i2c@58781000 {$/;"	l
i2c1	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c1: i2c@58781000 {$/;"	l
i2c1	arch/arm/dts/uniphier-ld4.dtsi	/^	i2c1: i2c@58480000 {$/;"	l
i2c1	arch/arm/dts/uniphier-pro4.dtsi	/^	i2c1: i2c@58781000 {$/;"	l
i2c1	arch/arm/dts/uniphier-pro5.dtsi	/^	i2c1: i2c@58781000 {$/;"	l
i2c1	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c1: i2c@58781000 {$/;"	l
i2c1	arch/arm/dts/uniphier-sld3.dtsi	/^		i2c1: i2c@58480000 {$/;"	l
i2c1	arch/arm/dts/uniphier-sld8.dtsi	/^	i2c1: i2c@58480000 {$/;"	l
i2c1	arch/arm/dts/zynq-7000.dtsi	/^		i2c1: i2c@e0005000 {$/;"	l	label:amba
i2c1	arch/arm/dts/zynqmp.dtsi	/^		i2c1: i2c@ff030000 {$/;"	l
i2c1	include/gdsys_fpga.h	/^	struct ihs_i2c i2c1;	\/* 0x0070 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_i2c
i2c1	include/gdsys_fpga.h	/^	struct ihs_i2c i2c1;	\/* 0x01a0 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_i2c
i2c1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	can0_aper_clk, can1_aper_clk, i2c0_aper_clk, i2c1_aper_clk,$/;"	e	enum:zynq_clk
i2c1_clk	arch/m68k/include/asm/global_data.h	/^	unsigned long	i2c1_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
i2c1_clk	arch/powerpc/include/asm/global_data.h	/^	u32 i2c1_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int i2c1_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
i2c1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int i2c1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c1_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux i2c1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c1_pins	arch/arm/dts/am335x-evm.dts	/^	i2c1_pins: pinmux_i2c1_pins {$/;"	l
i2c1_pins	arch/arm/dts/am335x-pxm2.dtsi	/^	i2c1_pins: pinmux_i2c1_pins {$/;"	l
i2c1_pins	arch/arm/dts/am335x-rut.dts	/^	i2c1_pins: pinmux_i2c1_pins {$/;"	l
i2c1_pins	arch/arm/dts/am437x-gp-evm.dts	/^	i2c1_pins: i2c1_pins {$/;"	l
i2c1_pins	arch/arm/dts/am437x-sk-evm.dts	/^	i2c1_pins: i2c1_pins {$/;"	l
i2c1_pins	arch/arm/dts/armada-375.dtsi	/^				i2c1_pins: i2c1-pins {$/;"	l
i2c1_pins	arch/arm/dts/dra7-evm.dts	/^	i2c1_pins: pinmux_i2c1_pins {$/;"	l
i2c1_pins	arch/arm/dts/sun50i-a64.dtsi	/^			i2c1_pins: i2c1_pins {$/;"	l	label:pio
i2c1_pins	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config i2c1_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned i2c1_pins[] = {65, 66};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned i2c1_pins[] = {65, 66};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned i2c1_pins[] = {104, 105};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned i2c1_pins[] = {111, 112};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned i2c1_pins[] = {144, 145};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c1_pins[] = {114, 115};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned i2c1_pins[] = {111, 112};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned i2c1_pins[] = {104, 105};$/;"	v	typeref:typename:const unsigned[]	file:
i2c1_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			i2c1_pins_a: i2c1@0 {$/;"	l	label:pio
i2c1_pins_a	arch/arm/dts/sun5i.dtsi	/^			i2c1_pins_a: i2c1@0 {$/;"	l	label:pio
i2c1_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			i2c1_pins_a: i2c1@0 {$/;"	l	label:pio
i2c1_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			i2c1_pins_a: i2c1@0 {$/;"	l	label:pio
i2c1_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			i2c1_pins_a: i2c1@0 {$/;"	l	label:pio
i2c1_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	i2c1_pins_default: i2c1_pins_default {$/;"	l
i2c1_xfer	arch/arm/dts/rk3036.dtsi	/^			i2c1_xfer: i2c1-xfer {$/;"	l
i2c1_xfer	arch/arm/dts/rk3288.dtsi	/^			i2c1_xfer: i2c1-xfer {$/;"	l
i2c1_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c1_xfer: i2c1-xfer {$/;"	l
i2c1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int i2c1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
i2c1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int i2c1clkctrl;	\/* offset 0x48 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
i2c1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int i2c1clkctrl;	\/* offset 0x4A8 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
i2c1usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	i2c1usefpga;			\/* 0x72c *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
i2c2	arch/arm/dts/am33xx.dtsi	/^		i2c2: i2c@4819c000 {$/;"	l
i2c2	arch/arm/dts/am4372.dtsi	/^		i2c2: i2c@4819c000 {$/;"	l
i2c2	arch/arm/dts/dra7.dtsi	/^		i2c2: i2c@48072000 {$/;"	l
i2c2	arch/arm/dts/fsl-ls1043a.dtsi	/^		i2c2: i2c@21a0000 {$/;"	l
i2c2	arch/arm/dts/fsl-ls1046a.dtsi	/^		i2c2: i2c@21a0000 {$/;"	l
i2c2	arch/arm/dts/imx6qdl.dtsi	/^			i2c2: i2c@021a4000 {$/;"	l
i2c2	arch/arm/dts/imx6ull.dtsi	/^			i2c2: i2c@021a4000 {$/;"	l	label:aips2
i2c2	arch/arm/dts/imx7.dtsi	/^			i2c2: i2c@30a30000 {$/;"	l	label:aips3
i2c2	arch/arm/dts/keystone.dtsi	/^		i2c2: i2c@2530800 {$/;"	l
i2c2	arch/arm/dts/ls1021a.dtsi	/^		i2c2: i2c@21a0000 {$/;"	l
i2c2	arch/arm/dts/rk3288.dtsi	/^	i2c2: i2c@ff660000 {$/;"	l
i2c2	arch/arm/dts/socfpga.dtsi	/^		i2c2: i2c@ffc06000 {$/;"	l
i2c2	arch/arm/dts/sun4i-a10.dtsi	/^		i2c2: i2c@01c2b400 {$/;"	l
i2c2	arch/arm/dts/sun50i-a64.dtsi	/^		i2c2: i2c@1c2b400 {$/;"	l
i2c2	arch/arm/dts/sun5i.dtsi	/^		i2c2: i2c@01c2b400 {$/;"	l
i2c2	arch/arm/dts/sun6i-a31.dtsi	/^		i2c2: i2c@01c2b400 {$/;"	l
i2c2	arch/arm/dts/sun7i-a20.dtsi	/^		i2c2: i2c@01c2b400 {$/;"	l
i2c2	arch/arm/dts/sun8i-a23-a33.dtsi	/^		i2c2: i2c@01c2b400 {$/;"	l
i2c2	arch/arm/dts/sun9i-a80.dtsi	/^		i2c2: i2c@07003000 {$/;"	l
i2c2	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c2: i2c@58782000 {$/;"	l
i2c2	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c2: i2c@58782000 {$/;"	l
i2c2	arch/arm/dts/uniphier-ld4.dtsi	/^	i2c2: i2c@58500000 {$/;"	l
i2c2	arch/arm/dts/uniphier-pro4.dtsi	/^	i2c2: i2c@58782000 {$/;"	l
i2c2	arch/arm/dts/uniphier-pro5.dtsi	/^	i2c2: i2c@58782000 {$/;"	l
i2c2	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c2: i2c@58782000 {$/;"	l
i2c2	arch/arm/dts/uniphier-sld3.dtsi	/^		i2c2: i2c@58500000 {$/;"	l
i2c2	arch/arm/dts/uniphier-sld8.dtsi	/^	i2c2: i2c@58500000 {$/;"	l
i2c2_clk	arch/m68k/include/asm/global_data.h	/^	unsigned long	i2c2_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
i2c2_clk	arch/powerpc/include/asm/global_data.h	/^	u32 i2c2_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
i2c2_mux_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const i2c2_mux_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
i2c2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int i2c2_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
i2c2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int i2c2_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
i2c2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int i2c2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int i2c2_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
i2c2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int i2c2_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
i2c2_pins	arch/arm/dts/am335x-bone-common.dtsi	/^	i2c2_pins: pinmux_i2c2_pins {$/;"	l
i2c2_pins	arch/arm/dts/am335x-pxm2.dtsi	/^	i2c2_pins: pinmux_i2c2_pins {$/;"	l
i2c2_pins	arch/arm/dts/am43x-epos-evm.dts	/^		i2c2_pins: pinmux_i2c2_pins {$/;"	l
i2c2_pins	arch/arm/dts/dra7-evm.dts	/^	i2c2_pins: pinmux_i2c2_pins {$/;"	l
i2c2_pins	arch/arm/dts/sun50i-a64.dtsi	/^			i2c2_pins: i2c2_pins {$/;"	l	label:pio
i2c2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned i2c2_pins[] = {108, 109};$/;"	v	typeref:typename:const unsigned[]	file:
i2c2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned i2c2_pins[] = {115, 116};$/;"	v	typeref:typename:const unsigned[]	file:
i2c2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned i2c2_pins[] = {146, 147};$/;"	v	typeref:typename:const unsigned[]	file:
i2c2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c2_pins[] = {116, 117};$/;"	v	typeref:typename:const unsigned[]	file:
i2c2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned i2c2_pins[] = {171, 172};$/;"	v	typeref:typename:const unsigned[]	file:
i2c2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned i2c2_pins[] = {108, 109};$/;"	v	typeref:typename:const unsigned[]	file:
i2c2_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			i2c2_pins_a: i2c2@0 {$/;"	l	label:pio
i2c2_pins_a	arch/arm/dts/sun5i.dtsi	/^			i2c2_pins_a: i2c2@0 {$/;"	l	label:pio
i2c2_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			i2c2_pins_a: i2c2@0 {$/;"	l	label:pio
i2c2_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			i2c2_pins_a: i2c2@0 {$/;"	l	label:pio
i2c2_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			i2c2_pins_a: i2c2@0 {$/;"	l	label:pio
i2c2_pins_default	arch/arm/dts/am437x-idk-evm.dts	/^	i2c2_pins_default: i2c2_pins_default {$/;"	l
i2c2_pins_sleep	arch/arm/dts/am437x-idk-evm.dts	/^	i2c2_pins_sleep: i2c2_pins_sleep {$/;"	l
i2c2_xfer	arch/arm/dts/rk3288.dtsi	/^			i2c2_xfer: i2c2-xfer {$/;"	l
i2c2_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c2_xfer: i2c2-xfer {$/;"	l
i2c2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int i2c2clkctrl;	\/* offset 0x44 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
i2c2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int i2c2clkctrl;	\/* offset 0x4B0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
i2c2usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	i2c2usefpga;			\/* 0x728 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
i2c3	arch/arm/dts/dra7.dtsi	/^		i2c3: i2c@48060000 {$/;"	l
i2c3	arch/arm/dts/fsl-ls1043a.dtsi	/^		i2c3: i2c@21b0000 {$/;"	l
i2c3	arch/arm/dts/fsl-ls1046a.dtsi	/^		i2c3: i2c@21b0000 {$/;"	l
i2c3	arch/arm/dts/imx6qdl.dtsi	/^			i2c3: i2c@021a8000 {$/;"	l
i2c3	arch/arm/dts/imx6ull.dtsi	/^			i2c3: i2c@021a8000 {$/;"	l	label:aips2
i2c3	arch/arm/dts/imx7.dtsi	/^			i2c3: i2c@30a40000 {$/;"	l	label:aips3
i2c3	arch/arm/dts/rk3288.dtsi	/^	i2c3: i2c@ff150000 {$/;"	l
i2c3	arch/arm/dts/socfpga.dtsi	/^		i2c3: i2c@ffc07000 {$/;"	l
i2c3	arch/arm/dts/sun6i-a31.dtsi	/^		i2c3: i2c@01c2b800 {$/;"	l
i2c3	arch/arm/dts/sun7i-a20.dtsi	/^		i2c3: i2c@01c2b800 {$/;"	l
i2c3	arch/arm/dts/sun9i-a80.dtsi	/^		i2c3: i2c@07003400 {$/;"	l
i2c3	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c3: i2c@58783000 {$/;"	l
i2c3	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c3: i2c@58783000 {$/;"	l
i2c3	arch/arm/dts/uniphier-ld4.dtsi	/^	i2c3: i2c@58580000 {$/;"	l
i2c3	arch/arm/dts/uniphier-pro4.dtsi	/^	i2c3: i2c@58783000 {$/;"	l
i2c3	arch/arm/dts/uniphier-pro5.dtsi	/^	i2c3: i2c@58783000 {$/;"	l
i2c3	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c3: i2c@58783000 {$/;"	l
i2c3	arch/arm/dts/uniphier-sld3.dtsi	/^		i2c3: i2c@58580000 {$/;"	l
i2c3	arch/arm/dts/uniphier-sld8.dtsi	/^	i2c3: i2c@58580000 {$/;"	l
i2c3_ifc_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 i2c3_ifc_mux;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int i2c3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int i2c3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int i2c3_muxvals[] = {3, 3};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int i2c3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int i2c3_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c3_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int i2c3_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
i2c3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int i2c3_muxvals[] = {3, 3};$/;"	v	typeref:typename:const int[]	file:
i2c3_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t const i2c3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
i2c3_pins	arch/arm/dts/dra7-evm.dts	/^	i2c3_pins: pinmux_i2c3_pins {$/;"	l
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned i2c3_pins[] = {67, 68};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned i2c3_pins[] = {67, 68};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned i2c3_pins[] = {108, 109};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned i2c3_pins[] = {118, 119};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned i2c3_pins[] = {148, 149};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c3_pins[] = {118, 119};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned i2c3_pins[] = {159, 160};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned i2c3_pins[] = {108, 109};$/;"	v	typeref:typename:const unsigned[]	file:
i2c3_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			i2c3_pins_a: i2c3@0 {$/;"	l	label:pio
i2c3_pins_a	arch/arm/dts/sun9i-a80.dtsi	/^			i2c3_pins_a: i2c3@0 {$/;"	l	label:pio
i2c3_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	i2c3_pins_default: i2c3_pins_default {$/;"	l
i2c3_xfer	arch/arm/dts/rk3288.dtsi	/^			i2c3_xfer: i2c3-xfer {$/;"	l
i2c3_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c3_xfer: i2c3-xfer {$/;"	l
i2c3usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	i2c3usefpga;			\/* 0x724 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
i2c4	arch/arm/dts/dra7.dtsi	/^		i2c4: i2c@4807a000 {$/;"	l
i2c4	arch/arm/dts/imx6dl.dtsi	/^			i2c4: i2c@021f8000 {$/;"	l	label:aips2
i2c4	arch/arm/dts/imx6ull.dtsi	/^			i2c4: i2c@021f8000 {$/;"	l
i2c4	arch/arm/dts/imx7.dtsi	/^			i2c4: i2c@30a50000 {$/;"	l	label:aips3
i2c4	arch/arm/dts/rk3288.dtsi	/^	i2c4: i2c@ff160000 {$/;"	l
i2c4	arch/arm/dts/sun7i-a20.dtsi	/^		i2c4: i2c@01c2c000 {$/;"	l
i2c4	arch/arm/dts/sun9i-a80.dtsi	/^		i2c4: i2c@07003800 {$/;"	l
i2c4	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c4: i2c@58784000 {$/;"	l
i2c4	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c4: i2c@58784000 {$/;"	l
i2c4	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c4: i2c@58784000 {$/;"	l
i2c4	arch/arm/dts/uniphier-sld3.dtsi	/^		i2c4: i2c@58600000 {$/;"	l
i2c4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int i2c4_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
i2c4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int i2c4_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
i2c4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned i2c4_pins[] = {61, 62};$/;"	v	typeref:typename:const unsigned[]	file:
i2c4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned i2c4_pins[] = {61, 62};$/;"	v	typeref:typename:const unsigned[]	file:
i2c4_xfer	arch/arm/dts/rk3288.dtsi	/^			i2c4_xfer: i2c4-xfer {$/;"	l
i2c4_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c4_xfer: i2c4-xfer {$/;"	l
i2c5	arch/arm/dts/dra7.dtsi	/^		i2c5: i2c@4807c000 {$/;"	l
i2c5	arch/arm/dts/rk3288.dtsi	/^	i2c5: i2c@ff170000 {$/;"	l
i2c5	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c5: i2c@58785000 {$/;"	l
i2c5	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c5: i2c@58785000 {$/;"	l
i2c5	arch/arm/dts/uniphier-pro4.dtsi	/^	i2c5: i2c@58785000 {$/;"	l
i2c5	arch/arm/dts/uniphier-pro5.dtsi	/^	i2c5: i2c@58785000 {$/;"	l
i2c5	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c5: i2c@58785000 {$/;"	l
i2c512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct i2c512x {$/;"	s
i2c512x_dev	arch/powerpc/include/asm/immap_512x.h	/^typedef struct i2c512x_dev {$/;"	s
i2c512x_dev_t	arch/powerpc/include/asm/immap_512x.h	/^} i2c512x_dev_t;$/;"	t	typeref:struct:i2c512x_dev
i2c512x_t	arch/powerpc/include/asm/immap_512x.h	/^} i2c512x_t;$/;"	t	typeref:struct:i2c512x
i2c5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c5_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
i2c5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int i2c5_muxvals[] = {11, 11};$/;"	v	typeref:typename:const int[]	file:
i2c5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c5_pins[] = {87, 88};$/;"	v	typeref:typename:const unsigned[]	file:
i2c5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned i2c5_pins[] = {183, 184};$/;"	v	typeref:typename:const unsigned[]	file:
i2c5_xfer	arch/arm/dts/rk3288.dtsi	/^			i2c5_xfer: i2c5-xfer {$/;"	l
i2c5_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c5_xfer: i2c5-xfer {$/;"	l
i2c5b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c5b_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
i2c5b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c5b_pins[] = {196, 197};$/;"	v	typeref:typename:const unsigned[]	file:
i2c5c_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c5c_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
i2c5c_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c5c_pins[] = {215, 216};$/;"	v	typeref:typename:const unsigned[]	file:
i2c6	arch/arm/dts/uniphier-pro4.dtsi	/^	i2c6: i2c@58786000 {$/;"	l
i2c6	arch/arm/dts/uniphier-pro5.dtsi	/^	i2c6: i2c@58786000 {$/;"	l
i2c6	arch/arm/dts/uniphier-pxs2.dtsi	/^	i2c6: i2c@58786000 {$/;"	l
i2c6_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int i2c6_muxvals[] = {6, 6};$/;"	v	typeref:typename:const int[]	file:
i2c6_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int i2c6_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
i2c6_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int i2c6_muxvals[] = {11, 11};$/;"	v	typeref:typename:const int[]	file:
i2c6_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned i2c6_pins[] = {308, 309};$/;"	v	typeref:typename:const unsigned[]	file:
i2c6_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned i2c6_pins[] = {101, 102};$/;"	v	typeref:typename:const unsigned[]	file:
i2c6_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned i2c6_pins[] = {185, 186};$/;"	v	typeref:typename:const unsigned[]	file:
i2c6_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c6_xfer: i2c6-xfer {$/;"	l
i2c7_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c7_xfer: i2c7-xfer {$/;"	l
i2c8260_t	arch/powerpc/include/asm/immap_8260.h	/^} i2c8260_t;$/;"	t	typeref:struct:i2c
i2c8_xfer	arch/arm/dts/rk3399.dtsi	/^			i2c8_xfer: i2c8-xfer {$/;"	l
i2c8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} i2c8xx_t;$/;"	t	typeref:struct:i2c
i2c_0	arch/arm/dts/exynos5.dtsi	/^	i2c_0: i2c@12C60000 {$/;"	l
i2c_0	arch/sandbox/dts/sandbox.dts	/^	i2c_0: i2c@0 {$/;"	l
i2c_1	arch/arm/dts/exynos5.dtsi	/^	i2c_1: i2c@12C70000 {$/;"	l
i2c_104	arch/arm/dts/exynos5250-snow.dts	/^		i2c_104: i2c@0 {$/;"	l
i2c_2	arch/arm/dts/exynos5.dtsi	/^	i2c_2: i2c@12C80000 {$/;"	l
i2c_3	arch/arm/dts/exynos5.dtsi	/^	i2c_3: i2c@12C90000 {$/;"	l
i2c_4	arch/arm/dts/exynos5250.dtsi	/^	i2c_4: i2c@12CA0000 {$/;"	l
i2c_5	arch/arm/dts/exynos5250.dtsi	/^	i2c_5: i2c@12CB0000 {$/;"	l
i2c_6	arch/arm/dts/exynos5250.dtsi	/^	i2c_6: i2c@12CC0000 {$/;"	l
i2c_7	arch/arm/dts/exynos5250.dtsi	/^	i2c_7: i2c@12CD0000 {$/;"	l
i2c_adapter	include/i2c.h	/^struct i2c_adapter {$/;"	s
i2c_addr	drivers/hwmon/adm1021.c	/^		uint i2c_addr:7;	\/* 7bit i2c chip address *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:7	file:
i2c_addr	drivers/i2c/s3c24x0_i2c.h	/^	u32	i2c_addr;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
i2c_address	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2c_address;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2c_ao_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const i2c_ao_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
i2c_arbitrator_deselect	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^int i2c_arbitrator_deselect(struct udevice *mux, struct udevice *bus,$/;"	f	typeref:typename:int
i2c_arbitrator_ids	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^static const struct udevice_id i2c_arbitrator_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
i2c_arbitrator_ops	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^static const struct i2c_mux_ops i2c_arbitrator_ops = {$/;"	v	typeref:typename:const struct i2c_mux_ops	file:
i2c_arbitrator_priv	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^struct i2c_arbitrator_priv {$/;"	s	file:
i2c_arbitrator_probe	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^static int i2c_arbitrator_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_arbitrator_remove	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^static int i2c_arbitrator_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_arbitrator_select	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^int i2c_arbitrator_select(struct udevice *mux, struct udevice *bus,$/;"	f	typeref:typename:int
i2c_base	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		i2c_base;	\/* i2c base address *\/$/;"	m	struct:spl_machine_param	typeref:typename:u32
i2c_base	drivers/i2c/fsl_i2c.c	/^static const struct fsl_i2c_base *i2c_base[4] = {$/;"	v	typeref:typename:const struct fsl_i2c_base * [4]	file:
i2c_bases	arch/arm/imx-common/i2c-mxv7.c	/^static void * const i2c_bases[] = {$/;"	v	typeref:typename:void * const[]	file:
i2c_begin	drivers/i2c/mvtwsi.c	/^static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,$/;"	f	typeref:typename:int	file:
i2c_bind_driver	drivers/i2c/i2c-uclass.c	/^static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,$/;"	f	typeref:typename:int	file:
i2c_board_init	drivers/i2c/mv_i2c.c	/^static void i2c_board_init(struct mv_i2c *base)$/;"	f	typeref:typename:void	file:
i2c_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int i2c_boot_selected(void)$/;"	f	typeref:typename:int
i2c_bootrom_enabled	arch/powerpc/cpu/ppc4xx/cpu.c	/^static int i2c_bootrom_enabled(void)$/;"	f	typeref:typename:int	file:
i2c_bus	drivers/i2c/i2c_core.c	/^struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] =$/;"	v	typeref:struct:i2c_bus_hose[]
i2c_bus	drivers/i2c/muxes/i2c-mux-uclass.c	/^	struct udevice *i2c_bus;$/;"	m	struct:i2c_mux	typeref:struct:udevice *	file:
i2c_bus	drivers/i2c/s3c24x0_i2c.c	/^static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]$/;"	v	typeref:struct:s3c24x0_i2c_bus[]	file:
i2c_bus	drivers/i2c/tegra_i2c.c	/^struct i2c_bus {$/;"	s	file:
i2c_bus	include/sound.h	/^	int i2c_bus;$/;"	m	struct:sound_codec_info	typeref:typename:int
i2c_bus_hose	include/i2c.h	/^struct i2c_bus_hose {$/;"	s
i2c_bus_num	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =$/;"	v	typeref:typename:unsigned int	file:
i2c_bus_num	arch/powerpc/cpu/mpc8260/i2c.c	/^static unsigned int i2c_bus_num __attribute__ ((section(".data"))) = 0;$/;"	v	typeref:typename:unsigned int	file:
i2c_bus_speed	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,$/;"	v	typeref:typename:unsigned int[2]	file:
i2c_cdns_bus	drivers/i2c/i2c-cdns.c	/^struct i2c_cdns_bus {$/;"	s	file:
i2c_ch_init	drivers/i2c/s3c24x0_i2c.c	/^static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
i2c_child_post_bind	drivers/i2c/i2c-uclass.c	/^static int i2c_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_chip_ofdata_to_platdata	drivers/i2c/i2c-uclass.c	/^int i2c_chip_ofdata_to_platdata(const void *blob, int node,$/;"	f	typeref:typename:int
i2c_chip_type	drivers/tpm/tpm_tis_infineon.c	/^enum i2c_chip_type {$/;"	g	file:
i2c_clk	arch/arm/dts/uniphier-ld11.dtsi	/^		i2c_clk: i2c_clk {$/;"	l
i2c_clk	arch/arm/dts/uniphier-ld20.dtsi	/^		i2c_clk: i2c_clk {$/;"	l
i2c_clk	arch/arm/dts/uniphier-pro4.dtsi	/^		i2c_clk: i2c_clk {$/;"	l
i2c_clk	arch/arm/dts/uniphier-pro5.dtsi	/^		i2c_clk: i2c_clk {$/;"	l
i2c_clk	arch/arm/dts/uniphier-pxs2.dtsi	/^		i2c_clk: i2c_clk {$/;"	l
i2c_clk	arch/arm/dts/zynqmp-ep108-clk.dtsi	/^	i2c_clk: i2c_clk {$/;"	l
i2c_clk	arch/powerpc/include/asm/fsl_i2c.h	/^	u32 i2c_clk;$/;"	m	struct:fsl_i2c_dev	typeref:typename:u32
i2c_clk_div	drivers/i2c/mxc_i2c.c	/^static u16 i2c_clk_div[50][2] = {$/;"	v	typeref:typename:u16[50][2]	file:
i2c_clk_div	drivers/i2c/mxc_i2c.c	/^static u16 i2c_clk_div[60][2] = {$/;"	v	typeref:typename:u16[60][2]	file:
i2c_clk_enable	arch/arm/cpu/arm926ejs/armada100/cpu.c	/^void i2c_clk_enable(void)$/;"	f	typeref:typename:void
i2c_clk_enable	arch/arm/cpu/pxa/pxa2xx.c	/^void i2c_clk_enable(void)$/;"	f	typeref:typename:void
i2c_clk_enable	drivers/i2c/mv_i2c.c	/^__weak void i2c_clk_enable(void)$/;"	f	typeref:typename:__weak void
i2c_cnt	drivers/i2c/davinci_i2c.h	/^	u32	i2c_cnt;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_cntl_1	drivers/video/ati_radeon_fb.h	/^	u32		i2c_cntl_1;$/;"	m	struct:radeon_regs	typeref:typename:u32
i2c_compat_get_device	drivers/i2c/i2c-uclass-compat.c	/^static int i2c_compat_get_device(uint chip_addr, int alen,$/;"	f	typeref:typename:int	file:
i2c_con	drivers/i2c/davinci_i2c.h	/^	u32	i2c_con;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_control	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^struct i2c_control {$/;"	s
i2c_ctlr	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^struct i2c_ctlr {$/;"	s
i2c_cur_bus	cmd/i2c.c	/^static struct udevice *i2c_cur_bus;$/;"	v	typeref:struct:udevice *	file:
i2c_deblock	drivers/i2c/i2c-uclass.c	/^int i2c_deblock(struct udevice *bus)$/;"	f	typeref:typename:int
i2c_deblock_gpio_cfg	board/keymile/kmp204x/kmp204x.c	/^static void i2c_deblock_gpio_cfg(void)$/;"	f	typeref:typename:void	file:
i2c_dev	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static const  unsigned long i2c_dev[2] = {$/;"	v	typeref:typename:const unsigned long[2]	file:
i2c_dev	drivers/i2c/rcar_i2c.c	/^static const struct rcar_i2c *i2c_dev[CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS] = {$/;"	v	typeref:typename:const struct rcar_i2c * []	file:
i2c_dev	drivers/i2c/sh_i2c.c	/^static const struct sh_i2c *i2c_dev[CONFIG_SYS_I2C_SH_NUM_CONTROLLERS] = {$/;"	v	typeref:typename:const struct sh_i2c * []	file:
i2c_dev_addr	include/sound.h	/^	int i2c_dev_addr;$/;"	m	struct:sound_codec_info	typeref:typename:int
i2c_doio	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_doio(i2c_state_t *state)$/;"	f	typeref:typename:int	file:
i2c_doio	arch/powerpc/cpu/mpc8xx/i2c.c	/^static int i2c_doio(i2c_state_t *state)$/;"	f	typeref:typename:int	file:
i2c_dp_last_addr	cmd/i2c.c	/^static uint	i2c_dp_last_addr;$/;"	v	typeref:typename:uint	file:
i2c_dp_last_alen	cmd/i2c.c	/^static uint	i2c_dp_last_alen;$/;"	v	typeref:typename:uint	file:
i2c_dp_last_chip	cmd/i2c.c	/^static uint	i2c_dp_last_chip;$/;"	v	typeref:typename:uint	file:
i2c_dp_last_length	cmd/i2c.c	/^static uint	i2c_dp_last_length = 0x10;$/;"	v	typeref:typename:uint	file:
i2c_drr	drivers/i2c/davinci_i2c.h	/^	u32	i2c_drr;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_dump_msgs	drivers/i2c/i2c-uclass.c	/^void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)$/;"	f	typeref:typename:void
i2c_dxr	drivers/i2c/davinci_i2c.h	/^	u32	i2c_dxr;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_early_init_f	drivers/i2c/i2c_core.c	/^__weak void i2c_early_init_f(void)$/;"	f	typeref:typename:__weak void
i2c_early_init_f	drivers/i2c/mxc_i2c.c	/^void i2c_early_init_f(void)$/;"	f	typeref:typename:void
i2c_ecb_t	arch/powerpc/cpu/mpc8260/i2c.c	/^typedef void (*i2c_ecb_t) (int, int, void *);	\/* error callback function *\/$/;"	t	typeref:typename:void (*)(int,int,void *)	file:
i2c_ecb_t	arch/powerpc/cpu/mpc8xx/i2c.c	/^typedef void (*i2c_ecb_t) (int, int);	\/* error callback function *\/$/;"	t	typeref:typename:void (*)(int,int)	file:
i2c_eeprom	include/i2c_eeprom.h	/^struct i2c_eeprom {$/;"	s
i2c_eeprom_ops	include/i2c_eeprom.h	/^struct i2c_eeprom_ops {$/;"	s
i2c_eeprom_read	drivers/misc/i2c_eeprom.c	/^static int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf,$/;"	f	typeref:typename:int	file:
i2c_eeprom_std_ids	drivers/misc/i2c_eeprom.c	/^static const struct udevice_id i2c_eeprom_std_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
i2c_eeprom_std_ofdata_to_platdata	drivers/misc/i2c_eeprom.c	/^static int i2c_eeprom_std_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_eeprom_std_ops	drivers/misc/i2c_eeprom.c	/^struct i2c_eeprom_ops i2c_eeprom_std_ops = {$/;"	v	typeref:struct:i2c_eeprom_ops
i2c_eeprom_std_probe	drivers/misc/i2c_eeprom.c	/^int i2c_eeprom_std_probe(struct udevice *dev)$/;"	f	typeref:typename:int
i2c_eeprom_write	drivers/misc/i2c_eeprom.c	/^static int i2c_eeprom_write(struct udevice *dev, int offset,$/;"	f	typeref:typename:int	file:
i2c_err_op	cmd/i2c.c	/^enum i2c_err_op {$/;"	g	file:
i2c_flush_rxfifo	drivers/i2c/designware_i2c.c	/^static void i2c_flush_rxfifo(struct i2c_regs *i2c_base)$/;"	f	typeref:typename:void	file:
i2c_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 i2c_freq;		\/* offset 0x28 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
i2c_get_adapter	drivers/i2c/i2c_core.c	/^struct i2c_adapter *i2c_get_adapter(int index)$/;"	f	typeref:struct:i2c_adapter *
i2c_get_base	drivers/i2c/adi_i2c.c	/^static struct twi_regs *i2c_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:twi_regs *	file:
i2c_get_base	drivers/i2c/designware_i2c.c	/^static struct i2c_regs *i2c_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:i2c_regs *	file:
i2c_get_base	drivers/i2c/mxc_i2c.c	/^struct mxc_i2c_bus *i2c_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:mxc_i2c_bus *
i2c_get_bus_num	arch/powerpc/cpu/mpc512x/i2c.c	/^unsigned int i2c_get_bus_num (void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num	arch/powerpc/cpu/mpc5xxx/i2c.c	/^unsigned int i2c_get_bus_num(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num	arch/powerpc/cpu/mpc8260/i2c.c	/^unsigned int i2c_get_bus_num(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num	drivers/i2c/i2c-uclass-compat.c	/^unsigned int i2c_get_bus_num(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num	drivers/i2c/i2c_core.c	/^unsigned int i2c_get_bus_num(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num	drivers/i2c/mv_i2c.c	/^unsigned int i2c_get_bus_num(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num	drivers/i2c/sh_sh7734_i2c.c	/^unsigned int i2c_get_bus_num(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_num_fdt	drivers/i2c/i2c-uclass-compat.c	/^int i2c_get_bus_num_fdt(int node)$/;"	f	typeref:typename:int
i2c_get_bus_num_fdt	drivers/i2c/s3c24x0_i2c.c	/^int i2c_get_bus_num_fdt(int node)$/;"	f	typeref:typename:int
i2c_get_bus_speed	arch/powerpc/cpu/mpc5xxx/i2c.c	/^unsigned int i2c_get_bus_speed(void)$/;"	f	typeref:typename:unsigned int
i2c_get_bus_speed	cmd/i2c.c	/^unsigned int i2c_get_bus_speed(void)$/;"	f	typeref:typename:__weak unsigned int
i2c_get_bus_speed	drivers/i2c/i2c_core.c	/^unsigned int i2c_get_bus_speed(void)$/;"	f	typeref:typename:unsigned int
i2c_get_chip	drivers/i2c/i2c-uclass.c	/^int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,$/;"	f	typeref:typename:int
i2c_get_chip_flags	drivers/i2c/i2c-uclass.c	/^int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)$/;"	f	typeref:typename:int
i2c_get_chip_for_busnum	drivers/i2c/i2c-uclass.c	/^int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,$/;"	f	typeref:typename:int
i2c_get_chip_offset_len	drivers/i2c/i2c-uclass.c	/^int i2c_get_chip_offset_len(struct udevice *dev)$/;"	f	typeref:typename:int
i2c_get_cur_bus	cmd/i2c.c	/^static int i2c_get_cur_bus(struct udevice **busp)$/;"	f	typeref:typename:int	file:
i2c_get_cur_bus_chip	cmd/i2c.c	/^static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp)$/;"	f	typeref:typename:int	file:
i2c_get_ops	include/i2c.h	/^#define i2c_get_ops(/;"	d
i2c_gpio_bus	drivers/i2c/i2c-gpio.c	/^struct i2c_gpio_bus {$/;"	s	file:
i2c_gpio_ids	drivers/i2c/i2c-gpio.c	/^static const struct udevice_id i2c_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
i2c_gpio_ofdata_to_platdata	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_gpio_ops	drivers/i2c/i2c-gpio.c	/^static const struct dm_i2c_ops i2c_gpio_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
i2c_gpio_probe	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_probe(struct udevice *dev, uint chip, uint chip_flags)$/;"	f	typeref:typename:int	file:
i2c_gpio_read_bit	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_read_bit(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:int	file:
i2c_gpio_read_byte	drivers/i2c/i2c-gpio.c	/^static uchar i2c_gpio_read_byte(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:uchar	file:
i2c_gpio_read_data	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_read_data(struct i2c_gpio_bus *bus, uchar chip,$/;"	f	typeref:typename:int	file:
i2c_gpio_scl_set	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_scl_set(struct gpio_desc *scl, int bit)$/;"	f	typeref:typename:void	file:
i2c_gpio_sda_get	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_sda_get(struct gpio_desc *sda)$/;"	f	typeref:typename:int	file:
i2c_gpio_sda_high	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_sda_high(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:void	file:
i2c_gpio_sda_set	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_sda_set(struct gpio_desc *sda, int bit)$/;"	f	typeref:typename:void	file:
i2c_gpio_send_ack	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_send_ack(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:void	file:
i2c_gpio_send_reset	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_send_reset(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:void	file:
i2c_gpio_send_start	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_send_start(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:void	file:
i2c_gpio_send_stop	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_send_stop(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:void	file:
i2c_gpio_set_bus_speed	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_set_bus_speed(struct udevice *dev, unsigned int speed_hz)$/;"	f	typeref:typename:int	file:
i2c_gpio_write_bit	drivers/i2c/i2c-gpio.c	/^static void i2c_gpio_write_bit(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:void	file:
i2c_gpio_write_byte	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_write_byte(struct gpio_desc *scl, struct gpio_desc *sda,$/;"	f	typeref:typename:int	file:
i2c_gpio_write_data	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_write_data(struct i2c_gpio_bus *bus, uchar chip,$/;"	f	typeref:typename:int	file:
i2c_gpio_xfer	drivers/i2c/i2c-gpio.c	/^static int i2c_gpio_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)$/;"	f	typeref:typename:int	file:
i2c_help_text	cmd/i2c.c	/^static char i2c_help_text[] =$/;"	v	typeref:typename:char[]	file:
i2c_i2add	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	i2c_i2add;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2add	arch/powerpc/include/asm/immap_8260.h	/^	u_char	i2c_i2add;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2brg	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	i2c_i2brg;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2brg	arch/powerpc/include/asm/immap_8260.h	/^	u_char	i2c_i2brg;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2cer	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	i2c_i2cer;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2cer	arch/powerpc/include/asm/immap_8260.h	/^	u_char	i2c_i2cer;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2cmr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	i2c_i2cmr;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2cmr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	i2c_i2cmr;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2com	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	i2c_i2com;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2com	arch/powerpc/include/asm/immap_8260.h	/^	u_char	i2c_i2com;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2mod	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	i2c_i2mod;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_i2mod	arch/powerpc/include/asm/immap_8260.h	/^	u_char	i2c_i2mod;$/;"	m	struct:i2c	typeref:typename:u_char
i2c_idle_bus	drivers/i2c/mxc_i2c.c	/^int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)$/;"	f	typeref:typename:int
i2c_ie	drivers/i2c/davinci_i2c.h	/^	u32	i2c_ie;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_ignore_device	post/drivers/i2c.c	/^static int i2c_ignore_device(unsigned int chip)$/;"	f	typeref:typename:int	file:
i2c_imx_get_clk	drivers/i2c/mxc_i2c.c	/^static uint8_t i2c_imx_get_clk(struct mxc_i2c_bus *i2c_bus, unsigned int rate)$/;"	f	typeref:typename:uint8_t	file:
i2c_imx_stop	drivers/i2c/mxc_i2c.c	/^static void i2c_imx_stop(struct mxc_i2c_bus *i2c_bus)$/;"	f	typeref:typename:void	file:
i2c_init	arch/powerpc/cpu/mpc512x/i2c.c	/^void i2c_init (int speed, int saddr)$/;"	f	typeref:typename:void
i2c_init	arch/powerpc/cpu/mpc5xxx/i2c.c	/^void i2c_init(int speed, int saddr)$/;"	f	typeref:typename:void
i2c_init	arch/powerpc/cpu/mpc8260/i2c.c	/^void i2c_init(int speed, int slaveadd)$/;"	f	typeref:typename:void
i2c_init	arch/powerpc/cpu/mpc8xx/i2c.c	/^void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:void
i2c_init	drivers/i2c/i2c-uclass-compat.c	/^void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:void
i2c_init	drivers/i2c/i2c_core.c	/^__weak void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:__weak void
i2c_init	drivers/i2c/mv_i2c.c	/^void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:void
i2c_init	drivers/i2c/pca9564_i2c.c	/^void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:void
i2c_init	drivers/i2c/sh_sh7734_i2c.c	/^void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:void
i2c_init	drivers/i2c/tsi108_i2c.c	/^void i2c_init(int speed, int slaveaddr)$/;"	f	typeref:typename:void
i2c_init_all	drivers/i2c/i2c_core.c	/^void i2c_init_all(void)$/;"	f	typeref:typename:void
i2c_init_board	board/keymile/common/common.c	/^void i2c_init_board(void)$/;"	f	typeref:typename:void
i2c_init_board	board/samsung/goni/goni.c	/^void i2c_init_board(void)$/;"	f	typeref:typename:void
i2c_init_board	board/samsung/trats/trats.c	/^void i2c_init_board(void)$/;"	f	typeref:typename:void
i2c_init_board	board/sunxi/board.c	/^void i2c_init_board(void)$/;"	f	typeref:typename:void
i2c_init_board	cmd/i2c.c	/^void i2c_init_board(void)$/;"	f	typeref:typename:__weak void
i2c_init_board	drivers/i2c/i2c_core.c	/^__weak void i2c_init_board(void)$/;"	f	typeref:typename:__weak void
i2c_init_bus	drivers/i2c/i2c_core.c	/^static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
i2c_init_clock	drivers/i2c/tegra_i2c.c	/^static int i2c_init_clock(struct i2c_bus *i2c_bus, unsigned rate)$/;"	f	typeref:typename:int	file:
i2c_init_controller	drivers/i2c/tegra_i2c.c	/^static void i2c_init_controller(struct i2c_bus *i2c_bus)$/;"	f	typeref:typename:void	file:
i2c_init_transfer	drivers/i2c/mxc_i2c.c	/^static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip,$/;"	f	typeref:typename:int	file:
i2c_init_transfer_	drivers/i2c/mxc_i2c.c	/^static int i2c_init_transfer_(struct mxc_i2c_bus *i2c_bus, u8 chip,$/;"	f	typeref:typename:int	file:
i2c_isr_set_cleared	drivers/i2c/mv_i2c.c	/^static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask,$/;"	f	typeref:typename:int	file:
i2c_iv	drivers/i2c/davinci_i2c.h	/^	u32	i2c_iv;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_lcd	arch/arm/dts/sun5i-a13-utoo-p66.dts	/^	i2c_lcd: i2c@0 {$/;"	l
i2c_lcd	arch/arm/dts/sun6i-a31-colombus.dts	/^	i2c_lcd: i2c@0 {$/;"	l
i2c_lcd_pins	arch/arm/dts/sun5i-a13-utoo-p66.dts	/^	i2c_lcd_pins: i2c_lcd_pin@0 {$/;"	l
i2c_lcd_pins	arch/arm/dts/sun6i-a31-colombus.dts	/^	i2c_lcd_pins: i2c_lcd_pin@0 {$/;"	l
i2c_make_abort	board/keymile/common/common.c	/^int i2c_make_abort(void)$/;"	f	typeref:typename:int
i2c_make_abort	board/keymile/km83xx/km83xx_i2c.c	/^int i2c_make_abort(void)$/;"	f	typeref:typename:int
i2c_mm_last_addr	cmd/i2c.c	/^static uint	i2c_mm_last_addr;$/;"	v	typeref:typename:uint	file:
i2c_mm_last_alen	cmd/i2c.c	/^static uint	i2c_mm_last_alen;$/;"	v	typeref:typename:uint	file:
i2c_mm_last_chip	cmd/i2c.c	/^static uint	i2c_mm_last_chip;$/;"	v	typeref:typename:uint	file:
i2c_mode	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	iomux_v3_cfg_t i2c_mode;$/;"	m	struct:i2c_pin_ctrl	typeref:typename:iomux_v3_cfg_t
i2c_msg	include/i2c.h	/^struct i2c_msg {$/;"	s
i2c_msg_list	include/i2c.h	/^struct i2c_msg_list {$/;"	s
i2c_multiplexer_select_vid_channel	board/freescale/common/vid.c	/^int __weak i2c_multiplexer_select_vid_channel(u8 channel)$/;"	f	typeref:typename:int __weak
i2c_multiplexer_select_vid_channel	board/freescale/ls1043aqds/ls1043aqds.c	/^int i2c_multiplexer_select_vid_channel(u8 channel)$/;"	f	typeref:typename:int
i2c_multiplexer_select_vid_channel	board/freescale/ls1046aqds/ls1046aqds.c	/^int i2c_multiplexer_select_vid_channel(u8 channel)$/;"	f	typeref:typename:int
i2c_multiplexer_select_vid_channel	board/freescale/ls2080ardb/ls2080ardb.c	/^int i2c_multiplexer_select_vid_channel(u8 channel)$/;"	f	typeref:typename:int
i2c_multiplexer_select_vid_channel	board/freescale/t208xqds/t208xqds.c	/^int i2c_multiplexer_select_vid_channel(u8 channel)$/;"	f	typeref:typename:int
i2c_mux	drivers/i2c/muxes/i2c-mux-uclass.c	/^struct i2c_mux {$/;"	s	file:
i2c_mux	include/i2c.h	/^struct i2c_mux {$/;"	s
i2c_mux_bus	drivers/i2c/muxes/i2c-mux-uclass.c	/^struct i2c_mux_bus {$/;"	s	file:
i2c_mux_bus_ops	drivers/i2c/muxes/i2c-mux-uclass.c	/^static const struct dm_i2c_ops i2c_mux_bus_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
i2c_mux_bus_probe	drivers/i2c/muxes/i2c-mux-uclass.c	/^static int i2c_mux_bus_probe(struct udevice *dev, uint chip_addr,$/;"	f	typeref:typename:int	file:
i2c_mux_bus_set_bus_speed	drivers/i2c/muxes/i2c-mux-uclass.c	/^static int i2c_mux_bus_set_bus_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
i2c_mux_bus_xfer	drivers/i2c/muxes/i2c-mux-uclass.c	/^static int i2c_mux_bus_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
i2c_mux_child_post_bind	drivers/i2c/muxes/i2c-mux-uclass.c	/^static int i2c_mux_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_mux_deselect	drivers/i2c/muxes/i2c-mux-uclass.c	/^int i2c_mux_deselect(struct udevice *dev)$/;"	f	typeref:typename:int
i2c_mux_disconnect_all	drivers/i2c/i2c_core.c	/^static int i2c_mux_disconnect_all(void)$/;"	f	typeref:typename:int	file:
i2c_mux_get_ops	include/i2c.h	/^#define i2c_mux_get_ops(/;"	d
i2c_mux_ops	include/i2c.h	/^struct i2c_mux_ops {$/;"	s
i2c_mux_post_bind	drivers/i2c/muxes/i2c-mux-uclass.c	/^static int i2c_mux_post_bind(struct udevice *mux)$/;"	f	typeref:typename:int	file:
i2c_mux_post_probe	drivers/i2c/muxes/i2c-mux-uclass.c	/^static int i2c_mux_post_probe(struct udevice *mux)$/;"	f	typeref:typename:int	file:
i2c_mux_select	drivers/i2c/muxes/i2c-mux-uclass.c	/^int i2c_mux_select(struct udevice *dev)$/;"	f	typeref:typename:int
i2c_mux_set	drivers/i2c/i2c_core.c	/^static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip,$/;"	f	typeref:typename:int	file:
i2c_mux_set_all	drivers/i2c/i2c_core.c	/^static int i2c_mux_set_all(void)$/;"	f	typeref:typename:int	file:
i2c_newio	arch/powerpc/cpu/mpc8260/i2c.c	/^void i2c_newio(i2c_state_t *state)$/;"	f	typeref:typename:void	file:
i2c_newio	arch/powerpc/cpu/mpc8xx/i2c.c	/^static void i2c_newio(i2c_state_t *state)$/;"	f	typeref:typename:void	file:
i2c_next_hop	include/i2c.h	/^struct i2c_next_hop {$/;"	s
i2c_no_probes	cmd/i2c.c	/^static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;$/;"	v	typeref:typename:uchar[]	file:
i2c_no_probes	cmd/i2c.c	/^} i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;$/;"	v	typeref:struct:__anon1d2f36170108[]
i2c_oa	drivers/i2c/davinci_i2c.h	/^	u32	i2c_oa;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_pad_info0	board/barco/platinum/platinum_picon.c	/^struct i2c_pads_info i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info0	board/barco/platinum/platinum_titanium.c	/^struct i2c_pads_info i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info0	board/barco/titanium/titanium.c	/^struct i2c_pads_info i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info0	board/boundary/nitrogen6x/nitrogen6x.c	/^static struct i2c_pads_info i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info0	board/kosagi/novena/novena_spl.c	/^struct i2c_pads_info i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info0	board/tbs/tbs2910/tbs2910.c	/^static struct i2c_pads_info i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/advantech/dms-ba16/dms-ba16.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/aristainetos/aristainetos.c	/^struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info1	board/bachmann/ot1200/ot1200.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/boundary/nitrogen6x/nitrogen6x.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/ccv/xpress/xpress.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/el/el6x/el6x.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/embest/mx6boards/mx6boards.c	/^struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info1	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/freescale/mx6sabresd/mx6sabresd.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/freescale/mx6slevk/mx6slevk.c	/^struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info1	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/ge/bx50v3/bx50v3.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/kosagi/novena/novena_spl.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/tbs/tbs2910/tbs2910.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info1	board/technexion/pico-imx6ul/pico-imx6ul.c	/^struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info1	board/warp/warp.c	/^struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info1	board/warp7/warp7.c	/^static struct i2c_pads_info i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/advantech/dms-ba16/dms-ba16.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/aristainetos/aristainetos.c	/^struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info2	board/bachmann/ot1200/ot1200.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/barco/platinum/platinum_picon.c	/^struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info2	board/barco/platinum/platinum_titanium.c	/^struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info2	board/barco/titanium/titanium.c	/^struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info2	board/boundary/nitrogen6x/nitrogen6x.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/ccv/xpress/xpress.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/el/el6x/el6x.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/embest/mx6boards/mx6boards.c	/^struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info2	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info2	board/ge/bx50v3/bx50v3.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/kosagi/novena/novena_spl.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/phytec/pcm058/pcm058.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info2	board/tbs/tbs2910/tbs2910.c	/^static struct i2c_pads_info i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info3	board/advantech/dms-ba16/dms-ba16.c	/^static struct i2c_pads_info i2c_pad_info3 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info3	board/aristainetos/aristainetos-v1.c	/^struct i2c_pads_info i2c_pad_info3 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info3	board/aristainetos/aristainetos-v2.c	/^struct i2c_pads_info i2c_pad_info3 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info3	board/embest/mx6boards/mx6boards.c	/^struct i2c_pads_info i2c_pad_info3 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info3	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^struct i2c_pads_info i2c_pad_info3 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info3	board/ge/bx50v3/bx50v3.c	/^static struct i2c_pads_info i2c_pad_info3 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pad_info4	board/aristainetos/aristainetos-v2.c	/^struct i2c_pads_info i2c_pad_info4 = {$/;"	v	typeref:struct:i2c_pads_info
i2c_pad_info4	board/ccv/xpress/xpress.c	/^static struct i2c_pads_info i2c_pad_info4 = {$/;"	v	typeref:struct:i2c_pads_info	file:
i2c_pads_info	arch/arm/include/asm/imx-common/mxc_i2c.h	/^struct i2c_pads_info {$/;"	s
i2c_pca9557_read	board/freescale/p1010rdb/p1010rdb.c	/^int i2c_pca9557_read(int type)$/;"	f	typeref:typename:int
i2c_pin_ctrl	arch/arm/include/asm/imx-common/mxc_i2c.h	/^struct i2c_pin_ctrl {$/;"	s
i2c_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux i2c_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
i2c_pins	board/davinci/da8xxevm/omapl138_lcdk.c	/^static const struct pinmux_config i2c_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
i2c_pins	board/davinci/ea20/ea20.c	/^static const struct pinmux_config i2c_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
i2c_post_probe	drivers/i2c/i2c-uclass.c	/^static int i2c_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i2c_post_test	post/drivers/i2c.c	/^int i2c_post_test (int flags)$/;"	f	typeref:typename:int
i2c_probe	arch/powerpc/cpu/mpc512x/i2c.c	/^int i2c_probe (uchar chip)$/;"	f	typeref:typename:int
i2c_probe	arch/powerpc/cpu/mpc5xxx/i2c.c	/^int i2c_probe(uchar chip)$/;"	f	typeref:typename:int
i2c_probe	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_probe(uchar chip)$/;"	f	typeref:typename:int
i2c_probe	arch/powerpc/cpu/mpc8xx/i2c.c	/^int i2c_probe(uchar chip)$/;"	f	typeref:typename:int
i2c_probe	drivers/i2c/i2c-uclass-compat.c	/^int i2c_probe(uint8_t chip_addr)$/;"	f	typeref:typename:int
i2c_probe	drivers/i2c/i2c_core.c	/^int i2c_probe(uint8_t chip)$/;"	f	typeref:typename:int
i2c_probe	drivers/i2c/mv_i2c.c	/^int i2c_probe(uchar chip)$/;"	f	typeref:typename:int
i2c_probe	drivers/i2c/pca9564_i2c.c	/^int i2c_probe(uchar chip)$/;"	f	typeref:typename:int
i2c_probe	drivers/i2c/sh_sh7734_i2c.c	/^int i2c_probe(u8 chip)$/;"	f	typeref:typename:int
i2c_probe	drivers/i2c/tsi108_i2c.c	/^int i2c_probe (uchar chip)$/;"	f	typeref:typename:int
i2c_probe_callback	arch/powerpc/cpu/mpc8260/i2c.c	/^static void i2c_probe_callback(int flags, int xnum, void *data)$/;"	f	typeref:typename:void	file:
i2c_probe_chip	drivers/i2c/i2c-uclass.c	/^static int i2c_probe_chip(struct udevice *bus, uint chip_addr,$/;"	f	typeref:typename:int	file:
i2c_psc	drivers/i2c/davinci_i2c.h	/^	u32	i2c_psc;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_raw_read	drivers/i2c/sh_sh7734_i2c.c	/^static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)$/;"	f	typeref:typename:u8	file:
i2c_raw_write	drivers/i2c/sh_sh7734_i2c.c	/^i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 *val, int size)$/;"	f	typeref:typename:int	file:
i2c_read	arch/powerpc/cpu/mpc512x/i2c.c	/^int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)$/;"	f	typeref:typename:int
i2c_read	arch/powerpc/cpu/mpc5xxx/i2c.c	/^int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)$/;"	f	typeref:typename:int
i2c_read	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_read	arch/powerpc/cpu/mpc8xx/i2c.c	/^int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_read	drivers/i2c/i2c-uclass-compat.c	/^int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,$/;"	f	typeref:typename:int
i2c_read	drivers/i2c/i2c_core.c	/^int i2c_read(uint8_t chip, unsigned int addr, int alen,$/;"	f	typeref:typename:int
i2c_read	drivers/i2c/mv_i2c.c	/^int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_read	drivers/i2c/pca9564_i2c.c	/^int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_read	drivers/i2c/sh_sh7734_i2c.c	/^int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)$/;"	f	typeref:typename:int
i2c_read	drivers/i2c/tsi108_i2c.c	/^int i2c_read (uchar chip_addr, uint byte_addr, int alen,$/;"	f	typeref:typename:int
i2c_read_byte	drivers/i2c/tsi108_i2c.c	/^static int i2c_read_byte ($/;"	f	typeref:typename:int	file:
i2c_read_bytewise	drivers/i2c/i2c-uclass.c	/^static int i2c_read_bytewise(struct udevice *dev, uint offset,$/;"	f	typeref:typename:int	file:
i2c_read_data	drivers/i2c/mxc_i2c.c	/^static int i2c_read_data(struct mxc_i2c_bus *i2c_bus, uchar chip, uchar *buf,$/;"	f	typeref:typename:int	file:
i2c_read_data	drivers/i2c/tegra_i2c.c	/^static int i2c_read_data(struct i2c_bus *i2c_bus, uchar chip, uchar *buffer,$/;"	f	typeref:typename:int	file:
i2c_read_mac	board/spear/common/spr_misc.c	/^static int i2c_read_mac(uchar *buffer)$/;"	f	typeref:typename:int	file:
i2c_receive	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_receive(i2c_state_t *state,$/;"	f	typeref:typename:int	file:
i2c_receive	arch/powerpc/cpu/mpc8xx/i2c.c	/^i2c_receive(i2c_state_t *state,$/;"	f	typeref:typename:int	file:
i2c_reg_read	drivers/i2c/i2c-uclass-compat.c	/^uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset)$/;"	f	typeref:typename:uint8_t
i2c_reg_read	drivers/i2c/i2c_core.c	/^uint8_t i2c_reg_read(uint8_t addr, uint8_t reg)$/;"	f	typeref:typename:uint8_t
i2c_reg_read	include/i2c.h	/^static inline u8 i2c_reg_read(u8 addr, u8 reg)$/;"	f	typeref:typename:u8
i2c_reg_write	drivers/i2c/i2c-uclass-compat.c	/^void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val)$/;"	f	typeref:typename:void
i2c_reg_write	drivers/i2c/i2c_core.c	/^void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val)$/;"	f	typeref:typename:void
i2c_reg_write	include/i2c.h	/^static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)$/;"	f	typeref:typename:void
i2c_regs	arch/arm/include/asm/arch-rockchip/i2c.h	/^struct i2c_regs {$/;"	s
i2c_regs	drivers/i2c/davinci_i2c.h	/^struct i2c_regs {$/;"	s
i2c_regs	drivers/i2c/designware_i2c.h	/^struct i2c_regs {$/;"	s
i2c_regs	drivers/i2c/mv_i2c.c	/^static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;$/;"	v	typeref:typename:unsigned long[]	file:
i2c_reloc	cmd/i2c.c	/^static __maybe_unused void i2c_reloc(void)$/;"	f	typeref:typename:__maybe_unused void	file:
i2c_reloc_fixup	drivers/i2c/i2c_core.c	/^void i2c_reloc_fixup(void)$/;"	f	typeref:typename:void
i2c_report_err	cmd/i2c.c	/^static int i2c_report_err(int ret, enum i2c_err_op op)$/;"	f	typeref:typename:int	file:
i2c_reset	drivers/i2c/mv_i2c.c	/^static void i2c_reset(struct mv_i2c *base)$/;"	f	typeref:typename:void	file:
i2c_reset_controller	drivers/i2c/tegra_i2c.c	/^static void i2c_reset_controller(struct i2c_bus *i2c_bus)$/;"	f	typeref:typename:void	file:
i2c_reset_port_fdt	drivers/i2c/s3c24x0_i2c.c	/^int i2c_reset_port_fdt(const void *blob, int node)$/;"	f	typeref:typename:int
i2c_roundrate	arch/powerpc/cpu/mpc8260/i2c.c	/^i2c_roundrate(int hz, int speed, int filter, int modval,$/;"	f	typeref:typename:int	file:
i2c_roundrate	arch/powerpc/cpu/mpc8xx/i2c.c	/^i2c_roundrate(int hz, int speed, int filter, int modval,$/;"	f	typeref:typename:int	file:
i2c_sa	drivers/i2c/davinci_i2c.h	/^	u32	i2c_sa;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_sck_ao_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int i2c_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
i2c_sclh	drivers/i2c/davinci_i2c.h	/^	u32	i2c_sclh;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_scll	drivers/i2c/davinci_i2c.h	/^	u32	i2c_scll;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_sda_ao_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
i2c_select	drivers/i2c/zynq_i2c.c	/^static struct zynq_i2c_registers *i2c_select(struct i2c_adapter *adap)$/;"	f	typeref:struct:zynq_i2c_registers *	file:
i2c_send	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_send(i2c_state_t *state,$/;"	f	typeref:typename:int	file:
i2c_send	arch/powerpc/cpu/mpc8xx/i2c.c	/^i2c_send(i2c_state_t *state,$/;"	f	typeref:typename:int	file:
i2c_send_slave_addr	drivers/i2c/i2c-gpio.c	/^int i2c_send_slave_addr(struct gpio_desc *scl, struct gpio_desc *sda, int delay,$/;"	f	typeref:typename:int
i2c_set_addr	drivers/i2c/sh_sh7734_i2c.c	/^static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg)$/;"	f	typeref:typename:int	file:
i2c_set_bus_num	arch/powerpc/cpu/mpc512x/i2c.c	/^int i2c_set_bus_num (unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_num	arch/powerpc/cpu/mpc5xxx/i2c.c	/^int i2c_set_bus_num(unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_num	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_set_bus_num(unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_num	drivers/i2c/i2c-uclass-compat.c	/^int i2c_set_bus_num(unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_num	drivers/i2c/i2c_core.c	/^int i2c_set_bus_num(unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_num	drivers/i2c/mv_i2c.c	/^int i2c_set_bus_num(unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_num	drivers/i2c/sh_sh7734_i2c.c	/^int i2c_set_bus_num(unsigned int bus)$/;"	f	typeref:typename:int
i2c_set_bus_speed	arch/powerpc/cpu/mpc5xxx/i2c.c	/^int i2c_set_bus_speed(unsigned int speed)$/;"	f	typeref:typename:int
i2c_set_bus_speed	cmd/i2c.c	/^int i2c_set_bus_speed(unsigned int speed)$/;"	f	typeref:typename:__weak int
i2c_set_bus_speed	drivers/i2c/i2c_core.c	/^unsigned int i2c_set_bus_speed(unsigned int speed)$/;"	f	typeref:typename:unsigned int
i2c_set_chip_flags	drivers/i2c/i2c-uclass.c	/^int i2c_set_chip_flags(struct udevice *dev, uint flags)$/;"	f	typeref:typename:int
i2c_set_chip_offset_len	drivers/i2c/i2c-uclass.c	/^int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)$/;"	f	typeref:typename:int
i2c_setaddress	drivers/i2c/designware_i2c.c	/^static void i2c_setaddress(struct i2c_regs *i2c_base, unsigned int i2c_addr)$/;"	f	typeref:typename:void	file:
i2c_setrate	arch/powerpc/cpu/mpc8260/i2c.c	/^static int i2c_setrate(int hz, int speed)$/;"	f	typeref:typename:int	file:
i2c_setrate	arch/powerpc/cpu/mpc8xx/i2c.c	/^static int i2c_setrate(int hz, int speed)$/;"	f	typeref:typename:int	file:
i2c_setup_offset	drivers/i2c/i2c-uclass.c	/^static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,$/;"	f	typeref:typename:int	file:
i2c_slave_addr	arch/arm/include/asm/omap_common.h	/^	u32 i2c_slave_addr;$/;"	m	struct:pmic_data	typeref:typename:u32
i2c_slave_ao_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const i2c_slave_ao_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
i2c_slave_sck_ao_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
i2c_slave_sda_ao_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
i2c_stat	drivers/i2c/davinci_i2c.h	/^	u32	i2c_stat;$/;"	m	struct:i2c_regs	typeref:typename:u32
i2c_state	arch/powerpc/cpu/mpc8260/i2c.c	/^typedef struct i2c_state {$/;"	s	file:
i2c_state	arch/powerpc/cpu/mpc8xx/i2c.c	/^typedef struct i2c_state {$/;"	s	file:
i2c_state_t	arch/powerpc/cpu/mpc8260/i2c.c	/^} i2c_state_t;$/;"	t	typeref:struct:i2c_state	file:
i2c_state_t	arch/powerpc/cpu/mpc8xx/i2c.c	/^} i2c_state_t;$/;"	t	typeref:struct:i2c_state	file:
i2c_status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 i2c_status;			\/* 5C: DVC_I2C_STATUS *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
i2c_status	include/ec_commands.h	/^	uint8_t i2c_status;	\/* Status flags (EC_I2C_STATUS_...) *\/$/;"	m	struct:ec_response_i2c_passthru	typeref:typename:uint8_t
i2c_test_callback	arch/powerpc/cpu/mpc8xx/i2c.c	/^static void i2c_test_callback(int flags, int xnum)$/;"	f	typeref:typename:void	file:
i2c_trans_info	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^struct i2c_trans_info {$/;"	s
i2c_transaction_flags	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^enum i2c_transaction_flags {$/;"	g
i2c_transfer	drivers/i2c/adi_i2c.c	/^static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr,$/;"	f	typeref:typename:int	file:
i2c_transfer	drivers/i2c/mv_i2c.c	/^static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg)$/;"	f	typeref:typename:int	file:
i2c_transfer	drivers/i2c/s3c24x0_i2c.c	/^static int i2c_transfer(struct s3c24x0_i2c *i2c,$/;"	f	typeref:typename:int	file:
i2c_tunnel	arch/arm/dts/exynos5420-peach-pit.dts	/^		i2c_tunnel: i2c-tunnel {$/;"	l
i2c_tunnel	arch/arm/dts/exynos5800-peach-pi.dts	/^		i2c_tunnel: i2c-tunnel {$/;"	l
i2c_tunnel	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		i2c_tunnel: i2c-tunnel {$/;"	l	label:cros_ec
i2c_type	drivers/i2c/tegra_i2c.c	/^enum i2c_type {$/;"	g	file:
i2c_wait	drivers/i2c/fsl_i2c.c	/^i2c_wait(const struct fsl_i2c_base *base, int write)$/;"	f	typeref:typename:int	file:
i2c_wait4bus	drivers/i2c/fsl_i2c.c	/^i2c_wait4bus(const struct fsl_i2c_base *base)$/;"	f	typeref:typename:int	file:
i2c_wait_for_bb	drivers/i2c/designware_i2c.c	/^static int i2c_wait_for_bb(struct i2c_regs *i2c_base)$/;"	f	typeref:typename:int	file:
i2c_write	arch/powerpc/cpu/mpc512x/i2c.c	/^int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)$/;"	f	typeref:typename:int
i2c_write	arch/powerpc/cpu/mpc5xxx/i2c.c	/^int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)$/;"	f	typeref:typename:int
i2c_write	arch/powerpc/cpu/mpc8260/i2c.c	/^int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_write	arch/powerpc/cpu/mpc8xx/i2c.c	/^int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_write	drivers/i2c/i2c-uclass-compat.c	/^int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,$/;"	f	typeref:typename:int
i2c_write	drivers/i2c/i2c_core.c	/^int i2c_write(uint8_t chip, unsigned int addr, int alen,$/;"	f	typeref:typename:int
i2c_write	drivers/i2c/mv_i2c.c	/^int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_write	drivers/i2c/pca9564_i2c.c	/^int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
i2c_write	drivers/i2c/sh_sh7734_i2c.c	/^int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)$/;"	f	typeref:typename:int
i2c_write	drivers/i2c/tsi108_i2c.c	/^int i2c_write (uchar chip_addr, uint byte_addr, int alen, uchar * buffer,$/;"	f	typeref:typename:int
i2c_write_addr	drivers/i2c/fsl_i2c.c	/^i2c_write_addr(const struct fsl_i2c_base *base, u8 dev, u8 dir, int rsta)$/;"	f	typeref:typename:int	file:
i2c_write_byte	drivers/i2c/tsi108_i2c.c	/^static int i2c_write_byte (uchar chip_addr,\/* I2C device address on the bus *\/$/;"	f	typeref:typename:int	file:
i2c_write_bytewise	drivers/i2c/i2c-uclass.c	/^static int i2c_write_bytewise(struct udevice *dev, uint offset,$/;"	f	typeref:typename:int	file:
i2c_write_data	drivers/i2c/mxc_i2c.c	/^static int i2c_write_data(struct mxc_i2c_bus *i2c_bus, u8 chip, const u8 *buf,$/;"	f	typeref:typename:int	file:
i2c_write_data	drivers/i2c/tegra_i2c.c	/^static int i2c_write_data(struct i2c_bus *i2c_bus, uchar chip, uchar *buffer,$/;"	f	typeref:typename:int	file:
i2c_write_start_seq	board/keymile/common/common.c	/^static void i2c_write_start_seq(void)$/;"	f	typeref:typename:void	file:
i2c_write_start_seq	board/keymile/km83xx/km83xx_i2c.c	/^static void i2c_write_start_seq(void)$/;"	f	typeref:typename:void	file:
i2c_xfer_finish	drivers/i2c/designware_i2c.c	/^static int i2c_xfer_finish(struct i2c_regs *i2c_base)$/;"	f	typeref:typename:int	file:
i2c_xfer_init	drivers/i2c/designware_i2c.c	/^static int i2c_xfer_init(struct i2c_regs *i2c_base, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
i2cblk	board/freescale/common/qixis.h	/^	u8 i2cblk;$/;"	m	struct:qixis	typeref:typename:u8
i2cclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 i2cclk_ctrl;	\/* I2C Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
i2cdacr	board/freescale/common/pixis.h	/^	u8 i2cdacr;$/;"	m	struct:pixis	typeref:typename:u8
i2cer	arch/powerpc/include/asm/immap_85xx.h	/^	u8	i2cer;$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8
i2cm_buf0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_buf0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_ctlint	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_ctlint;			\/* 0x7e06 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_ctlint	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_ctlint;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_datai	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_datai;			\/* 0x7e03 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_datai	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_datai;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_datao	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_datao;			\/* 0x7e02 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_datao	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_datao;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_div	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_div;			\/* 0x7e07 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_div	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_div;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_fs_scl_hcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_fs_scl_hcnt_0_addr;	\/* 0x7e10 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_fs_scl_hcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_fs_scl_hcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_fs_scl_hcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_fs_scl_hcnt_1_addr;	\/* 0x7e0f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_fs_scl_hcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_fs_scl_hcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_fs_scl_lcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_fs_scl_lcnt_0_addr;	\/* 0x7e12 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_fs_scl_lcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_fs_scl_lcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_fs_scl_lcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_fs_scl_lcnt_1_addr;	\/* 0x7e11 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_fs_scl_lcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_fs_scl_lcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_int;			\/* 0x7e05 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_int	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_int;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_operation	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_operation;		\/* 0x7e04 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_operation	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_operation;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_segaddr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_segaddr;		\/* 0x7e08 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_segaddr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_segaddr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_segptr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_segptr;			\/* 0x7e0a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_segptr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_segptr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_slave	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_slave;			\/* 0x7e00 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_slave	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_slave;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_softrstz	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_softrstz;		\/* 0x7e09 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_softrstz	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_softrstz;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_ss_scl_hcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_ss_scl_hcnt_0_addr;	\/* 0x7e0c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_ss_scl_hcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_ss_scl_hcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_ss_scl_hcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_ss_scl_hcnt_1_addr;	\/* 0x7e0b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_ss_scl_hcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_ss_scl_hcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_ss_scl_lcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_ss_scl_lcnt_0_addr;	\/* 0x7e0e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_ss_scl_lcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_ss_scl_lcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cm_ss_scl_lcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cm_ss_scl_lcnt_1_addr;	\/* 0x7e0d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cm_ss_scl_lcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 i2cm_ss_scl_lcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
i2cmess	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 i2cmess;			\/* 0x7e01 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
i2cmr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	i2cmr;$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8
i2com	arch/powerpc/include/asm/immap_85xx.h	/^	u8	i2com;$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8
i2mod	arch/powerpc/include/asm/immap_85xx.h	/^	u8	i2mod;$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8
i2o	include/linux/edd.h	/^		} __attribute__ ((packed)) i2o;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0f08
i2s	arch/arm/dts/rk3288.dtsi	/^	i2s: i2s@ff890000 {$/;"	l
i2s0	arch/arm/dts/rk3399.dtsi	/^	i2s0: i2s@ff880000 {$/;"	l
i2s0	arch/arm/dts/sun7i-a20.dtsi	/^		i2s0: i2s@01c22400 {$/;"	l
i2s0	arch/xtensa/dts/xtfpga.dtsi	/^		i2s0: xtfpga-i2s@0d080000 {$/;"	l
i2s0_8ch_bus	arch/arm/dts/rk3399.dtsi	/^			i2s0_8ch_bus: i2s0-8ch-bus {$/;"	l
i2s0_bus	arch/arm/dts/rk3288.dtsi	/^			i2s0_bus: i2s0-bus {$/;"	l
i2s0_clk	arch/arm/dts/sama5d2.dtsi	/^					i2s0_clk: i2s0_clk@54 {$/;"	l
i2s0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		i2s0_clk: clk@01c200b8 {$/;"	l
i2s0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 i2s0_clk_cfg;	\/* 0xb0 I2S0 clock control*\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 i2s0_clk_cfg;	\/* 0xb0 I2S0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 i2s0_clk_cfg;	\/* 0xb0 I2S0 clock control*\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s0_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 i2s0_clk_cfg;	\/* 0xb0 I2S0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s0_gclk	arch/arm/dts/sama5d2.dtsi	/^					i2s0_gclk: i2s0_gclk@54 {$/;"	l
i2s1	arch/arm/dts/rk3399.dtsi	/^	i2s1: i2s@ff890000 {$/;"	l
i2s1	arch/arm/dts/sun7i-a20.dtsi	/^		i2s1: i2s@01c22000 {$/;"	l
i2s1_2ch_bus	arch/arm/dts/rk3399.dtsi	/^			i2s1_2ch_bus: i2s1-2ch-bus {$/;"	l
i2s1_clk	arch/arm/dts/sama5d2.dtsi	/^					i2s1_clk: i2s1_clk@55 {$/;"	l
i2s1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		i2s1_clk: clk@01c200d8 {$/;"	l
i2s1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 i2s1_clk_cfg;	\/* 0xb4 I2S1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 i2s1_clk_cfg;	\/* 0xb4 I2S1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 i2s1_clk_cfg;	\/* 0xb4 I2S1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s1_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 i2s1_clk_cfg;	\/* 0xb4 I2S1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s1_gclk	arch/arm/dts/sama5d2.dtsi	/^					i2s1_gclk: i2s1_gclk@55 {$/;"	l
i2s2	arch/arm/dts/rk3399.dtsi	/^	i2s2: i2s@ff8a0000 {$/;"	l
i2s2	arch/arm/dts/sun7i-a20.dtsi	/^		i2s2: i2s@01c24400 {$/;"	l
i2s2_clk	arch/arm/dts/sun7i-a20.dtsi	/^		i2s2_clk: clk@01c200dc {$/;"	l
i2s2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 i2s2_clk_cfg;	\/* 0xb8 I2S2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s2_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 i2s2_clk_cfg;	\/* 0xb8 I2S2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
i2s_bypass	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	i2s_bypass;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
i2s_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 i2s_ctrl;		\/* I2S Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
i2s_fifo	drivers/sound/samsung-i2s.c	/^void i2s_fifo(struct i2s_reg *i2s_reg, unsigned int flush)$/;"	f	typeref:typename:void
i2s_init	board/tqc/tqm5200/cmd_stk52xx.c	/^static void i2s_init(void)$/;"	f	typeref:typename:void	file:
i2s_play_wave	board/tqc/tqm5200/cmd_stk52xx.c	/^static int i2s_play_wave(unsigned long addr, unsigned long len)$/;"	f	typeref:typename:int	file:
i2s_reg	include/i2s.h	/^struct i2s_reg {$/;"	s
i2s_sawtooth	board/tqc/tqm5200/cmd_stk52xx.c	/^static int i2s_sawtooth(unsigned long duration, unsigned int freq,$/;"	f	typeref:typename:int	file:
i2s_set_bitclk_framesize	drivers/sound/samsung-i2s.c	/^static void i2s_set_bitclk_framesize(struct i2s_reg *i2s_reg, unsigned bfs)$/;"	f	typeref:typename:void	file:
i2s_set_fmt	drivers/sound/samsung-i2s.c	/^int i2s_set_fmt(struct i2s_reg *i2s_reg, unsigned int fmt)$/;"	f	typeref:typename:int
i2s_set_lr_framesize	drivers/sound/samsung-i2s.c	/^static void i2s_set_lr_framesize(struct i2s_reg *i2s_reg, unsigned int rfs)$/;"	f	typeref:typename:void	file:
i2s_set_samplesize	drivers/sound/samsung-i2s.c	/^int i2s_set_samplesize(struct i2s_reg *i2s_reg, unsigned int blc)$/;"	f	typeref:typename:int
i2s_set_sysclk_dir	drivers/sound/samsung-i2s.c	/^int i2s_set_sysclk_dir(struct i2s_reg *i2s_reg, int dir)$/;"	f	typeref:typename:int
i2s_squarewave	board/tqc/tqm5200/cmd_stk52xx.c	/^static int i2s_squarewave(unsigned long duration, unsigned int freq,$/;"	f	typeref:typename:int	file:
i2s_transfer_tx_data	drivers/sound/samsung-i2s.c	/^int i2s_transfer_tx_data(struct i2stx_info *pi2s_tx, unsigned int *data,$/;"	f	typeref:typename:int
i2s_tx_init	drivers/sound/samsung-i2s.c	/^int i2s_tx_init(struct i2stx_info *pi2s_tx)$/;"	f	typeref:typename:int
i2s_txctrl	drivers/sound/samsung-i2s.c	/^static void i2s_txctrl(struct i2s_reg *i2s_reg, int on)$/;"	f	typeref:typename:void	file:
i2sclkdiv	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t i2sclkdiv;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
i2stx_info	include/i2s.h	/^struct i2stx_info {$/;"	s
i3	arch/blackfin/include/asm/ptrace.h	/^	long i3;$/;"	m	struct:pt_regs	typeref:typename:long
i386_general_register	drivers/bios_emulator/include/x86emu/regs.h	/^} i386_general_register;$/;"	t	typeref:union:__anon39451e6d070a
i386_general_regs	drivers/bios_emulator/include/x86emu/regs.h	/^struct i386_general_regs {$/;"	s
i386_segment_regs	drivers/bios_emulator/include/x86emu/regs.h	/^struct i386_segment_regs {$/;"	s
i386_special_regs	drivers/bios_emulator/include/x86emu/regs.h	/^struct i386_special_regs {$/;"	s
i440fx	arch/x86/cpu/qemu/qemu.c	/^static bool i440fx;$/;"	v	typeref:typename:bool	file:
i8042_disable	drivers/input/i8042.c	/^int i8042_disable(void)$/;"	f	typeref:typename:int
i8042_flush	drivers/input/i8042.c	/^void i8042_flush(void)$/;"	f	typeref:typename:void
i8042_kbd_check	drivers/input/i8042.c	/^static int i8042_kbd_check(struct input_config *input)$/;"	f	typeref:typename:int	file:
i8042_kbd_ids	drivers/input/i8042.c	/^static const struct udevice_id i8042_kbd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
i8042_kbd_ops	drivers/input/i8042.c	/^static const struct keyboard_ops i8042_kbd_ops = {$/;"	v	typeref:typename:const struct keyboard_ops	file:
i8042_kbd_priv	drivers/input/i8042.c	/^struct i8042_kbd_priv {$/;"	s	file:
i8042_kbd_probe	drivers/input/i8042.c	/^static int i8042_kbd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i8042_kbd_update_leds	drivers/input/i8042.c	/^static int i8042_kbd_update_leds(struct udevice *dev, int leds)$/;"	f	typeref:typename:int	file:
i8042_start	drivers/input/i8042.c	/^static int i8042_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
i80ifcona0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int i80ifcona0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
i80ifcona1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int i80ifcona1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
i80ifconb0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int i80ifconb0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
i80ifconb1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int i80ifconb1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
i8254_init	arch/x86/lib/i8254.c	/^int i8254_init(void)$/;"	f	typeref:typename:int
i82557_config_cmd	drivers/net/eepro100.c	/^static const char i82557_config_cmd[] = {$/;"	v	typeref:typename:const char[]	file:
i82558_config_cmd	drivers/net/eepro100.c	/^static const char i82558_config_cmd[] = {$/;"	v	typeref:typename:const char[]	file:
i8259A_irq_real	board/mpl/common/isa.c	/^int i8259A_irq_real(unsigned int irq)$/;"	f	typeref:typename:int
i8259_init	arch/x86/lib/i8259.c	/^int i8259_init(void)$/;"	f	typeref:typename:int
iConfiguration	drivers/usb/host/ehci.h	/^	unsigned char	iConfiguration;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned char
iConfiguration	include/linux/usb/ch9.h	/^	__u8  iConfiguration;$/;"	m	struct:usb_config_descriptor	typeref:typename:__u8
iConfiguration	include/linux/usb/composite.h	/^	u8			iConfiguration;$/;"	m	struct:usb_configuration	typeref:typename:u8
iConfiguration	include/usbdescriptors.h	/^	u8 iConfiguration;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u8
iCountryCodeRelDate	include/linux/usb/cdc.h	/^	__u8	iCountryCodeRelDate;$/;"	m	struct:usb_cdc_country_functional_desc	typeref:typename:__u8
iCountryCodeRelDate	include/usbdescriptors.h	/^	u8 iCountryCodeRelDate;$/;"	m	struct:usb_class_country_selection_descriptor	typeref:typename:u8
iEndSystermIdentifier	include/usbdescriptors.h	/^	u8 iEndSystermIdentifier;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u8
iErrorCode	board/esd/common/xilinx_jtag/micro.c	/^	int             iErrorCode;         \/* An error code. 0 = no error. *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:int	file:
iFunction	include/linux/usb/ch9.h	/^	__u8  iFunction;$/;"	m	struct:usb_interface_assoc_descriptor	typeref:typename:__u8
iInterface	drivers/usb/host/ehci.h	/^	unsigned char	iInterface;$/;"	m	struct:usb_linux_interface_descriptor	typeref:typename:unsigned char
iInterface	include/linux/usb/ch9.h	/^	__u8  iInterface;$/;"	m	struct:usb_interface_descriptor	typeref:typename:__u8
iInterface	include/usbdescriptors.h	/^	u8 iInterface;$/;"	m	struct:usb_interface_descriptor	typeref:typename:u8
iMACAddress	include/linux/usb/cdc.h	/^	__u8	iMACAddress;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__u8
iMACAddress	include/usbdescriptors.h	/^	u8 iMACAddress;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u8
iManufacturer	drivers/usb/gadget/ether.c	/^static char *iManufacturer = "U-Boot";$/;"	v	typeref:typename:char *	file:
iManufacturer	drivers/usb/gadget/ether.c	/^static char *iManufacturer = CONFIG_USBNET_MANUFACTURER;$/;"	v	typeref:typename:char *	file:
iManufacturer	include/linux/usb/ch9.h	/^	__u8  iManufacturer;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
iManufacturer	include/usbdescriptors.h	/^	u8 iManufacturer;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
iName	include/linux/usb/cdc.h	/^	__u8	iName;$/;"	m	struct:usb_cdc_network_terminal_desc	typeref:typename:__u8
iName	include/usbdescriptors.h	/^	u8 iName;$/;"	m	struct:usb_class_extension_unit_descriptor	typeref:typename:u8
iName	include/usbdescriptors.h	/^	u8 iName;$/;"	m	struct:usb_class_network_channel_descriptor	typeref:typename:u8
iObj	fs/yaffs2/yaffsfs.c	/^	struct yaffs_obj *iObj;$/;"	m	struct:yaffsfs_Inode	typeref:struct:yaffs_obj *	file:
iProduct	drivers/usb/gadget/ether.c	/^static char *iProduct;$/;"	v	typeref:typename:char *	file:
iProduct	include/linux/usb/ch9.h	/^	__u8  iProduct;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
iProduct	include/usbdescriptors.h	/^	u8 iProduct;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
iSerialNumber	drivers/usb/gadget/ether.c	/^static char *iSerialNumber;$/;"	v	typeref:typename:char *	file:
iSerialNumber	include/linux/usb/ch9.h	/^	__u8  iSerialNumber;$/;"	m	struct:usb_device_descriptor	typeref:typename:__u8
iSerialNumber	include/usbdescriptors.h	/^	u8 iSerialNumber;$/;"	m	struct:usb_device_descriptor	typeref:typename:u8
iString	drivers/usb/gadget/f_dfu.h	/^	__u8				iString;$/;"	m	struct:dfu_status	typeref:typename:__u8
i_acl	fs/ubifs/ubifs.h	/^	struct posix_acl	*i_acl;$/;"	m	struct:inode	typeref:struct:posix_acl *
i_atime	fs/ubifs/ubifs.h	/^	struct timespec		i_atime;$/;"	m	struct:inode	typeref:struct:timespec
i_bdev	fs/ubifs/ubifs.h	/^		struct block_device	*i_bdev;$/;"	m	union:inode::__anonf648d084040a	typeref:struct:block_device *
i_blk_seq_num	include/dfu.h	/^	int i_blk_seq_num;$/;"	m	struct:dfu_entity	typeref:typename:int
i_blkbits	fs/ubifs/ubifs.h	/^	unsigned int		i_blkbits;$/;"	m	struct:inode	typeref:typename:unsigned int
i_blocks	fs/ubifs/ubifs.h	/^	blkcnt_t		i_blocks;$/;"	m	struct:inode	typeref:typename:blkcnt_t
i_buf	include/dfu.h	/^	u8 *i_buf;$/;"	m	struct:dfu_entity	typeref:typename:u8 *
i_buf_end	include/dfu.h	/^	u8 *i_buf_end;$/;"	m	struct:dfu_entity	typeref:typename:u8 *
i_buf_start	include/dfu.h	/^	u8 *i_buf_start;$/;"	m	struct:dfu_entity	typeref:typename:u8 *
i_bytes	fs/ubifs/ubifs.h	/^	unsigned short          i_bytes;$/;"	m	struct:inode	typeref:typename:unsigned short
i_cdev	fs/ubifs/ubifs.h	/^		struct cdev		*i_cdev;$/;"	m	union:inode::__anonf648d084040a	typeref:struct:cdev *
i_count	fs/ubifs/ubifs.h	/^	atomic_t		i_count;$/;"	m	struct:inode	typeref:typename:atomic_t
i_ctime	fs/ubifs/ubifs.h	/^	struct timespec		i_ctime;$/;"	m	struct:inode	typeref:struct:timespec
i_data	fs/ubifs/ubifs.h	/^	struct address_space	i_data;$/;"	m	struct:inode	typeref:struct:address_space
i_default_acl	fs/ubifs/ubifs.h	/^	struct posix_acl	*i_default_acl;$/;"	m	struct:inode	typeref:struct:posix_acl *
i_dentry	fs/ubifs/ubifs.h	/^		struct hlist_head	i_dentry;$/;"	m	union:inode::__anonf648d084030a	typeref:struct:hlist_head
i_devices	fs/ubifs/ubifs.h	/^	struct list_head	i_devices;$/;"	m	struct:inode	typeref:struct:list_head
i_dio_count	fs/ubifs/ubifs.h	/^	atomic_t		i_dio_count;$/;"	m	struct:inode	typeref:typename:atomic_t
i_dquot	fs/ubifs/ubifs.h	/^	struct dquot		*i_dquot[MAXQUOTAS];$/;"	m	struct:inode	typeref:struct:dquot * []
i_flags	fs/ubifs/ubifs.h	/^	unsigned int		i_flags;$/;"	m	struct:inode	typeref:typename:unsigned int
i_flock	fs/ubifs/ubifs.h	/^	struct file_lock	*i_flock;$/;"	m	struct:inode	typeref:struct:file_lock *
i_fop	fs/ubifs/ubifs.h	/^	const struct file_operations	*i_fop;	\/* former ->i_op->default_file_ops *\/$/;"	m	struct:inode	typeref:typename:const struct file_operations *
i_fsnotify_marks	fs/ubifs/ubifs.h	/^	struct hlist_head	i_fsnotify_marks;$/;"	m	struct:inode	typeref:struct:hlist_head
i_fsnotify_mask	fs/ubifs/ubifs.h	/^	__u32			i_fsnotify_mask; \/* all events this inode cares about *\/$/;"	m	struct:inode	typeref:typename:__u32
i_generation	fs/ubifs/ubifs.h	/^	__u32			i_generation;$/;"	m	struct:inode	typeref:typename:__u32
i_gid	fs/ubifs/ubifs.h	/^	kgid_t			i_gid;$/;"	m	struct:inode	typeref:typename:kgid_t
i_gid_write	fs/ubifs/super.c	/^static inline void i_gid_write(struct inode *inode, gid_t gid)$/;"	f	typeref:typename:void	file:
i_hash	fs/ubifs/ubifs.h	/^	struct hlist_node	i_hash;$/;"	m	struct:inode	typeref:struct:hlist_node
i_ino	fs/ubifs/ubifs.h	/^	unsigned long		i_ino;$/;"	m	struct:inode	typeref:typename:unsigned long
i_lock	fs/ubifs/ubifs.h	/^	spinlock_t		i_lock;	\/* i_blocks, i_bytes, maybe i_size *\/$/;"	m	struct:inode	typeref:typename:spinlock_t
i_lock_key	fs/ubifs/ubifs.h	/^	struct lock_class_key i_lock_key;$/;"	m	struct:file_system_type	typeref:struct:lock_class_key
i_lram	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	i_lram;		\/* internal linking RAM		*\/$/;"	m	struct:qm_config	typeref:typename:u32
i_lru	fs/ubifs/ubifs.h	/^	struct list_head	i_lru;		\/* inode LRU list *\/$/;"	m	struct:inode	typeref:struct:list_head
i_mapping	fs/ubifs/ubifs.h	/^	struct address_space	*i_mapping;$/;"	m	struct:inode	typeref:struct:address_space *
i_mask	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	i_mask;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
i_mmap	fs/ubifs/ubifs.h	/^	struct rb_root		i_mmap;		\/* tree of private and shared mappings *\/$/;"	m	struct:address_space	typeref:struct:rb_root
i_mmap_mutex	fs/ubifs/ubifs.h	/^	struct mutex		i_mmap_mutex;	\/* protect tree, count, list *\/$/;"	m	struct:address_space	typeref:struct:mutex
i_mmap_nonlinear	fs/ubifs/ubifs.h	/^	struct list_head	i_mmap_nonlinear;\/*list VM_NONLINEAR mappings *\/$/;"	m	struct:address_space	typeref:struct:list_head
i_mmap_writable	fs/ubifs/ubifs.h	/^	unsigned int		i_mmap_writable;\/* count VM_SHARED mappings *\/$/;"	m	struct:address_space	typeref:typename:unsigned int
i_mode	fs/ubifs/ubifs.h	/^	umode_t			i_mode;$/;"	m	struct:inode	typeref:typename:umode_t
i_mtime	fs/ubifs/ubifs.h	/^	struct timespec		i_mtime;$/;"	m	struct:inode	typeref:struct:timespec
i_mutex	fs/ubifs/ubifs.h	/^	struct mutex		i_mutex;$/;"	m	struct:inode	typeref:struct:mutex
i_mutex_dir_key	fs/ubifs/ubifs.h	/^	struct lock_class_key i_mutex_dir_key;$/;"	m	struct:file_system_type	typeref:struct:lock_class_key
i_mutex_key	fs/ubifs/ubifs.h	/^	struct lock_class_key i_mutex_key;$/;"	m	struct:file_system_type	typeref:struct:lock_class_key
i_nlink	fs/ubifs/ubifs.h	/^		const unsigned int i_nlink;$/;"	m	union:inode::__anonf648d084020a	typeref:typename:const unsigned int
i_op	fs/ubifs/ubifs.h	/^	const struct inode_operations	*i_op;$/;"	m	struct:inode	typeref:typename:const struct inode_operations *
i_opflags	fs/ubifs/ubifs.h	/^	unsigned short		i_opflags;$/;"	m	struct:inode	typeref:typename:unsigned short
i_pipe	fs/ubifs/ubifs.h	/^		struct pipe_inode_info	*i_pipe;$/;"	m	union:inode::__anonf648d084040a	typeref:struct:pipe_inode_info *
i_private	fs/ubifs/ubifs.h	/^	void			*i_private; \/* fs or device private pointer *\/$/;"	m	struct:inode	typeref:typename:void *
i_rcu	fs/ubifs/ubifs.h	/^		struct rcu_head		i_rcu;$/;"	m	union:inode::__anonf648d084030a	typeref:struct:rcu_head
i_rdev	fs/ubifs/ubifs.h	/^	dev_t			i_rdev;$/;"	m	struct:inode	typeref:typename:dev_t
i_readcount	fs/ubifs/ubifs.h	/^	atomic_t		i_readcount; \/* struct files open RO *\/$/;"	m	struct:inode	typeref:typename:atomic_t
i_reg	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	i_reg;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
i_sb	fs/ubifs/ubifs.h	/^	struct super_block	*i_sb;$/;"	m	struct:inode	typeref:struct:super_block *
i_sb_list	fs/ubifs/ubifs.h	/^	struct list_head	i_sb_list;$/;"	m	struct:inode	typeref:struct:list_head
i_security	fs/ubifs/ubifs.h	/^	void			*i_security;$/;"	m	struct:inode	typeref:typename:void *
i_size	fs/ubifs/recovery.c	/^	loff_t i_size;$/;"	m	struct:size_entry	typeref:typename:loff_t	file:
i_size	fs/ubifs/ubifs.h	/^	loff_t			i_size;$/;"	m	struct:inode	typeref:typename:loff_t
i_size_seqcount	fs/ubifs/ubifs.h	/^	seqcount_t		i_size_seqcount;$/;"	m	struct:inode	typeref:typename:seqcount_t
i_state	fs/ubifs/ubifs.h	/^	unsigned long		i_state;$/;"	m	struct:inode	typeref:typename:unsigned long
i_uid	fs/ubifs/ubifs.h	/^	kuid_t			i_uid;$/;"	m	struct:inode	typeref:typename:kuid_t
i_uid_write	fs/ubifs/super.c	/^static inline void i_uid_write(struct inode *inode, uid_t uid)$/;"	f	typeref:typename:void	file:
i_version	fs/ubifs/ubifs.h	/^	u64			i_version;$/;"	m	struct:inode	typeref:typename:u64
i_wb_list	fs/ubifs/ubifs.h	/^	struct list_head	i_wb_list;	\/* backing dev IO list *\/$/;"	m	struct:inode	typeref:struct:list_head
i_writecount	fs/ubifs/ubifs.h	/^	atomic_t		i_writecount;$/;"	m	struct:inode	typeref:typename:atomic_t
ia_atime	fs/yaffs2/yportenv.h	/^	unsigned ia_atime;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_attr_flags	fs/yaffs2/yportenv.h	/^	unsigned int ia_attr_flags;$/;"	m	struct:iattr	typeref:typename:unsigned int
ia_ctime	fs/yaffs2/yportenv.h	/^	unsigned ia_ctime;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_gid	fs/yaffs2/yportenv.h	/^	unsigned ia_gid;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_mode	fs/yaffs2/yportenv.h	/^	unsigned ia_mode;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_mtime	fs/yaffs2/yportenv.h	/^	unsigned ia_mtime;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_size	fs/yaffs2/yportenv.h	/^	unsigned ia_size;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_uid	fs/yaffs2/yportenv.h	/^	unsigned ia_uid;$/;"	m	struct:iattr	typeref:typename:unsigned
ia_valid	fs/yaffs2/yportenv.h	/^	unsigned int ia_valid;$/;"	m	struct:iattr	typeref:typename:unsigned int
iack	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iack;		\/* IRQ Acknowledge *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iack	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iack;		\/* 0x400a0 - Interrupt Acknowledge Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iack0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iack0;		\/* IRQ Acknowledge for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iack0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iack0;		\/* 0x600a0 - Interrupt Acknowledge Register for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iacklpr	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 iacklpr;		\/* 0x19 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
iacklpr	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 iacklpr;		\/* 0x19 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
iadd	include/fsl_fman.h	/^	u32	iadd;		\/* instruction address register *\/$/;"	m	struct:fm_imem	typeref:typename:u32
iadd	include/linux/immap_qe.h	/^	u32 iadd;		\/* I-RAM Address Register *\/$/;"	m	struct:qe_iram	typeref:typename:u32
iaddr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr0;		\/* Indivdual addr 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr0;		\/* 0x24800 - Indivdual address register 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr0	include/tsec.h	/^	u32	iaddr0;		\/* Individual Address Register 0 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr1	arch/powerpc/include/asm/immap_512x.h	/^	u32	iaddr1;		\/* Upper 32 bits of individual hash table *\/$/;"	m	struct:fec512x	typeref:typename:u32
iaddr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr1;		\/* Indivdual addr 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr1;		\/* 0x24804 - Indivdual address register 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr1	drivers/net/fec_mxc.h	/^	uint32_t iaddr1;		\/* MBAR_ETH + 0x118 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
iaddr1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 iaddr1;			\/* MBAR_ETH + 0x118 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
iaddr1	include/tsec.h	/^	u32	iaddr1;		\/* Individual Address Register 1 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr2	arch/powerpc/include/asm/immap_512x.h	/^	u32	iaddr2;		\/* Lower 32 bits of individual hash table *\/$/;"	m	struct:fec512x	typeref:typename:u32
iaddr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr2;		\/* Indivdual addr 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr2;		\/* 0x24808 - Indivdual address register 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr2	drivers/net/fec_mxc.h	/^	uint32_t iaddr2;		\/* MBAR_ETH + 0x11C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
iaddr2	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 iaddr2;			\/* MBAR_ETH + 0x11C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
iaddr2	include/tsec.h	/^	u32	iaddr2;		\/* Individual Address Register 2 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr3;		\/* Indivdual addr 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr3;		\/* 0x2480c - Indivdual address register 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr3	include/tsec.h	/^	u32	iaddr3;		\/* Individual Address Register 3 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr4;		\/* Indivdual addr 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr4;		\/* 0x24810 - Indivdual address register 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr4	include/tsec.h	/^	u32	iaddr4;		\/* Individual Address Register 4 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr5;		\/* Indivdual addr 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr5;		\/* 0x24814 - Indivdual address register 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr5	include/tsec.h	/^	u32	iaddr5;		\/* Individual Address Register 5 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr6;		\/* Indivdual addr 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr6;		\/* 0x24818 - Indivdual address register 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr6	include/tsec.h	/^	u32	iaddr6;		\/* Individual Address Register 6 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iaddr7;		\/* Indivdual addr 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
iaddr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iaddr7;		\/* 0x2481c - Indivdual address register 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
iaddr7	include/tsec.h	/^	u32	iaddr7;		\/* Individual Address Register 7 *\/$/;"	m	struct:tsec_hash_regs	typeref:typename:u32
iaddr_h	drivers/qe/uec.h	/^	u32  iaddr_h;        \/* individual address filter, high *\/$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:u32
iaddr_l	drivers/qe/uec.h	/^	u32  iaddr_l;        \/* individual address filter, low  *\/$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:u32
iadr	drivers/i2c/at91_i2c.h	/^	u32 iadr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
iahbbe0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 iahbbe0;		\/* Gasket Burst Enable Register                                                 /;"	m	struct:mscm_ir	typeref:typename:u32
ialr	arch/m68k/include/asm/fec.h	/^	u32 ialr;		\/* 0x3BC - dummy  *\/$/;"	m	struct:fec	typeref:typename:u32
ialr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 ialr;		\/* 0x11C *\/$/;"	m	struct:fecdma	typeref:typename:u32
iapc_boot_arch	arch/x86/include/asm/acpi_table.h	/^	u16 iapc_boot_arch;$/;"	m	struct:acpi_fadt	typeref:typename:u16
iar	arch/microblaze/include/asm/microblaze_intc.h	/^	int iar; \/* interrupt acknowledge register *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
iassr	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	iassr;$/;"	m	struct:scu_registers	typeref:typename:u32
iatr	include/linux/immap_qe.h	/^	u32 iatr[4];$/;"	m	struct:rsp	typeref:typename:u32[4]
iattr	fs/yaffs2/yportenv.h	/^struct iattr {$/;"	s
iaur	arch/m68k/include/asm/fec.h	/^	u32 iaur;		\/* 0x3B8 - dummy *\/$/;"	m	struct:fec	typeref:typename:u32
iaur	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 iaur;		\/* 0x118 *\/$/;"	m	struct:fecdma	typeref:typename:u32
ibank	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 ibank;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
ibase	arch/x86/include/asm/irq.h	/^	u32 ibase;$/;"	m	struct:irq_router	typeref:typename:u32
ibcnr0	include/linux/immap_qe.h	/^	u32 ibcnr0;$/;"	m	struct:rsp	typeref:typename:u32
ibcnr1	include/linux/immap_qe.h	/^	u32 ibcnr1;$/;"	m	struct:rsp	typeref:typename:u32
ibcr0	include/linux/immap_qe.h	/^	u32 ibcr0;$/;"	m	struct:rsp	typeref:typename:u32
ibcr1	include/linux/immap_qe.h	/^	u32 ibcr1;$/;"	m	struct:rsp	typeref:typename:u32
ibd_bits	examples/standalone/mem_to_mem_idma2intr.c	/^	ibdbitsu_t ibd_bits;		\/* Status and Control *\/$/;"	m	struct:idma_buf_desc	typeref:typename:ibdbitsu_t	file:
ibd_datlen	examples/standalone/mem_to_mem_idma2intr.c	/^	uint ibd_datlen;		\/* Data length in buffer *\/$/;"	m	struct:idma_buf_desc	typeref:typename:uint	file:
ibd_dbuf	examples/standalone/mem_to_mem_idma2intr.c	/^	uint ibd_dbuf;			\/* Destination buffer addr in host mem *\/$/;"	m	struct:idma_buf_desc	typeref:typename:uint	file:
ibd_sbuf	examples/standalone/mem_to_mem_idma2intr.c	/^	uint ibd_sbuf;			\/* Source buffer addr in host mem *\/$/;"	m	struct:idma_buf_desc	typeref:typename:uint	file:
ibd_t	examples/standalone/mem_to_mem_idma2intr.c	/^} ibd_t;$/;"	t	typeref:struct:idma_buf_desc	file:
ibdbits	examples/standalone/mem_to_mem_idma2intr.c	/^typedef struct ibdbits {$/;"	s	file:
ibdbits_t	examples/standalone/mem_to_mem_idma2intr.c	/^} ibdbits_t;$/;"	t	typeref:struct:ibdbits	file:
ibdbitsu	examples/standalone/mem_to_mem_idma2intr.c	/^typedef union ibdbitsu {$/;"	u	file:
ibdbitsu_t	examples/standalone/mem_to_mem_idma2intr.c	/^} ibdbitsu_t;$/;"	t	typeref:union:ibdbitsu	file:
ibmr	drivers/i2c/mv_i2c.c	/^	u32 ibmr;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
ibnd	include/linux/edd.h	/^		} __attribute__ ((packed)) ibnd;$/;"	m	union:edd_device_params::__anon8a8b619a010a	typeref:struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0408
ibs0	include/linux/immap_qe.h	/^	u32 ibs0;$/;"	m	struct:rsp	typeref:typename:u32
ibs1	include/linux/immap_qe.h	/^	u32 ibs1;$/;"	m	struct:rsp	typeref:typename:u32
ic	drivers/i2c/i2c-uniphier-f.c	/^	u32 ic;				\/* interrupt clear *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
ic	drivers/net/armada100_fec.h	/^	u32 ic;				\/* Interrupt cause *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
ic	drivers/net/mvgbe.h	/^	u32 ic;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
ic	include/linux/immap_qe.h	/^	qe_ic_t ic;		\/* Interrupt Controller *\/$/;"	m	struct:qe_immap	typeref:typename:qe_ic_t
ic0	include/ec_commands.h	/^				uint8_t ic0;$/;"	m	struct:ec_response_lightbar::__anon71a6b267030a::dump::__anon71a6b2670408	typeref:typename:uint8_t
ic1	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ic1[9];$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32[9]	file:
ic1	include/ec_commands.h	/^				uint8_t ic1;$/;"	m	struct:ec_response_lightbar::__anon71a6b267030a::dump::__anon71a6b2670408	typeref:typename:uint8_t
ic_clr_activity	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_activity;	\/* 0x5c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_gen_call	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_gen_call;	\/* 0x68 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_intr	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_intr;	\/* 0x40 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_rd_req	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_rd_req;	\/* 0x50 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_rx_done	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_rx_done;	\/* 0x58 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_rx_over	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_rx_over;	\/* 0x48 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_rx_under	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_rx_under;	\/* 0x44 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_start_det	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_start_det;	\/* 0x64 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_stop_det	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_stop_det;	\/* 0x60 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_tx_abrt	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_tx_abrt;	\/* 0x54 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_clr_tx_over	drivers/i2c/designware_i2c.h	/^	u32 ic_clr_tx_over;	\/* 0x4c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_cmd_data	drivers/i2c/designware_i2c.h	/^	u32 ic_cmd_data;	\/* 0x10 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_con	drivers/i2c/designware_i2c.h	/^	u32 ic_con;		\/* 0x00 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_ctrl	drivers/video/ipu_regs.h	/^	u32 ic_ctrl;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
ic_enable	drivers/i2c/designware_i2c.h	/^	u32 ic_enable;		\/* 0x6c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_enable_status	drivers/i2c/designware_i2c.h	/^	u32 ic_enable_status;	\/* 0x9c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_fs_scl_hcnt	drivers/i2c/designware_i2c.h	/^	u32 ic_fs_scl_hcnt;	\/* 0x1c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_fs_scl_lcnt	drivers/i2c/designware_i2c.h	/^	u32 ic_fs_scl_lcnt;	\/* 0x20 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_hs_maddr	drivers/i2c/designware_i2c.h	/^	u32 ic_hs_maddr;	\/* 0x0c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_hs_scl_hcnt	drivers/i2c/designware_i2c.h	/^	u32 ic_hs_scl_hcnt;	\/* 0x24 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_hs_scl_lcnt	drivers/i2c/designware_i2c.h	/^	u32 ic_hs_scl_lcnt;	\/* 0x28 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_intr_mask	drivers/i2c/designware_i2c.h	/^	u32 ic_intr_mask;	\/* 0x30 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_intr_stat	drivers/i2c/designware_i2c.h	/^	u32 ic_intr_stat;	\/* 0x2c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_raw_intr_stat	drivers/i2c/designware_i2c.h	/^	u32 ic_raw_intr_stat;	\/* 0x34 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_rx_tl	drivers/i2c/designware_i2c.h	/^	u32 ic_rx_tl;		\/* 0x38 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_rxflr	drivers/i2c/designware_i2c.h	/^	u32 ic_rxflr;		\/* 0x78 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_sar	drivers/i2c/designware_i2c.h	/^	u32 ic_sar;		\/* 0x08 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_scprrh	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_scprrh;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_scprrl	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_scprrl;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_sda_hold	drivers/i2c/designware_i2c.h	/^	u32 ic_sda_hold;	\/* 0x7c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_sicr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	ic_sicr;$/;"	m	struct:interrupt_controller	typeref:typename:ushort
ic_siexr	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_siexr;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_simrh	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_simrh;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_simrl	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_simrl;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_sipnrh	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_sipnrh;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_sipnrl	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_sipnrl;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_siprr	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_siprr;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_sivec	arch/powerpc/include/asm/immap_8260.h	/^	uint	ic_sivec;$/;"	m	struct:interrupt_controller	typeref:typename:uint
ic_ss_scl_hcnt	drivers/i2c/designware_i2c.h	/^	u32 ic_ss_scl_hcnt;	\/* 0x14 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_ss_scl_lcnt	drivers/i2c/designware_i2c.h	/^	u32 ic_ss_scl_lcnt;	\/* 0x18 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_status	drivers/i2c/designware_i2c.h	/^	u32 ic_status;		\/* 0x70 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_tar	drivers/i2c/designware_i2c.h	/^	u32 ic_tar;		\/* 0x04 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_tx_abrt_source	drivers/i2c/designware_i2c.h	/^	u32 ic_tx_abrt_source;	\/* 0x80 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_tx_tl	drivers/i2c/designware_i2c.h	/^	u32 ic_tx_tl;		\/* 0x3c *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
ic_txflr	drivers/i2c/designware_i2c.h	/^	u32 ic_txflr;		\/* 0x74 *\/$/;"	m	struct:i2c_regs	typeref:typename:u32
icache_disable	arch/arc/lib/cache.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/arm/cpu/armv8/cache_v8.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/arm/lib/cache-cp15.c	/^void icache_disable (void)$/;"	f	typeref:typename:void
icache_disable	arch/arm/lib/cache-cp15.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/blackfin/lib/cache.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/m68k/lib/cache.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/microblaze/cpu/cache.c	/^void	icache_disable(void) {$/;"	f	typeref:typename:void
icache_disable	arch/nds32/lib/cache.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/openrisc/cpu/cache.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/powerpc/cpu/mpc512x/start.S	/^icache_disable:$/;"	l
icache_disable	arch/powerpc/cpu/mpc5xxx/start.S	/^icache_disable:$/;"	l
icache_disable	arch/powerpc/cpu/mpc8260/start.S	/^icache_disable:$/;"	l
icache_disable	arch/powerpc/cpu/mpc83xx/start.S	/^icache_disable:$/;"	l
icache_disable	arch/powerpc/cpu/mpc85xx/start.S	/^icache_disable:$/;"	l
icache_disable	arch/powerpc/cpu/mpc8xx/start.S	/^icache_disable:$/;"	l
icache_disable	arch/powerpc/cpu/ppc4xx/cache.S	/^icache_disable:$/;"	l
icache_disable	arch/sh/cpu/sh2/cpu.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/sh/cpu/sh3/cpu.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_disable	arch/sh/cpu/sh4/cpu.c	/^void icache_disable (void)$/;"	f	typeref:typename:void
icache_disable	arch/x86/cpu/cpu.c	/^void icache_disable(void)$/;"	f	typeref:typename:void
icache_enable	arch/arc/lib/cache.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/arm/cpu/armv8/cache_v8.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/arm/lib/cache-cp15.c	/^void icache_enable (void)$/;"	f	typeref:typename:void
icache_enable	arch/arm/lib/cache-cp15.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/blackfin/lib/cache.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/m68k/lib/cache.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/microblaze/cpu/cache.c	/^void	icache_enable (void) {$/;"	f	typeref:typename:void
icache_enable	arch/nds32/lib/cache.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/openrisc/cpu/cache.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/powerpc/cpu/mpc512x/start.S	/^icache_enable:$/;"	l
icache_enable	arch/powerpc/cpu/mpc5xxx/start.S	/^icache_enable:$/;"	l
icache_enable	arch/powerpc/cpu/mpc8260/start.S	/^icache_enable:$/;"	l
icache_enable	arch/powerpc/cpu/mpc83xx/start.S	/^icache_enable:$/;"	l
icache_enable	arch/powerpc/cpu/mpc85xx/start.S	/^icache_enable:$/;"	l
icache_enable	arch/powerpc/cpu/mpc8xx/start.S	/^icache_enable:$/;"	l
icache_enable	arch/powerpc/cpu/ppc4xx/cache.S	/^icache_enable:$/;"	l
icache_enable	arch/sh/cpu/sh2/cpu.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/sh/cpu/sh3/cpu.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_enable	arch/sh/cpu/sh4/cpu.c	/^void icache_enable (void)$/;"	f	typeref:typename:void
icache_enable	arch/x86/cpu/cpu.c	/^void icache_enable(void)$/;"	f	typeref:typename:void
icache_invalid	arch/m68k/lib/cache.c	/^void icache_invalid(void)$/;"	f	typeref:typename:void
icache_invalidate_line	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^static inline void icache_invalidate_line(volatile void *vaddr)$/;"	f	typeref:typename:void
icache_invalidate_range	arch/avr32/cpu/cache.c	/^void icache_invalidate_range(volatile void *start, size_t size)$/;"	f	typeref:typename:void
icache_line_size	arch/mips/lib/cache.c	/^static inline unsigned long icache_line_size(void)$/;"	f	typeref:typename:unsigned long	file:
icache_line_size	arch/nios2/include/asm/global_data.h	/^	u32 icache_line_size;$/;"	m	struct:arch_global_data	typeref:typename:u32
icache_size	arch/nios2/include/asm/global_data.h	/^	u32 icache_size;$/;"	m	struct:arch_global_data	typeref:typename:u32
icache_status	arch/arc/lib/cache.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/arm/cpu/armv8/cache_v8.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/arm/lib/cache-cp15.c	/^int icache_status (void)$/;"	f	typeref:typename:int
icache_status	arch/arm/lib/cache-cp15.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/blackfin/lib/cache.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/m68k/lib/cache.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/microblaze/cpu/cache.c	/^int icache_status (void)$/;"	f	typeref:typename:int
icache_status	arch/nds32/lib/cache.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/openrisc/cpu/cache.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/powerpc/cpu/mpc512x/start.S	/^icache_status:$/;"	l
icache_status	arch/powerpc/cpu/mpc5xxx/start.S	/^icache_status:$/;"	l
icache_status	arch/powerpc/cpu/mpc8260/start.S	/^icache_status:$/;"	l
icache_status	arch/powerpc/cpu/mpc83xx/start.S	/^icache_status:$/;"	l
icache_status	arch/powerpc/cpu/mpc85xx/start.S	/^icache_status:$/;"	l
icache_status	arch/powerpc/cpu/mpc8xx/start.S	/^icache_status:$/;"	l
icache_status	arch/powerpc/cpu/ppc4xx/cache.S	/^icache_status:$/;"	l
icache_status	arch/sh/cpu/sh2/cpu.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/sh/cpu/sh3/cpu.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icache_status	arch/sh/cpu/sh4/cpu.c	/^int icache_status (void)$/;"	f	typeref:typename:int
icache_status	arch/x86/cpu/cpu.c	/^int icache_status(void)$/;"	f	typeref:typename:int
icc	drivers/block/fsl_sata.h	/^	u32 icc;		\/* Interrupt coalescing control register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
icc_address_mask	arch/x86/include/asm/arch-broadwell/me.h	/^	struct icc_address_mask icc_address_mask[0];$/;"	m	struct:mbp_icc_profile	typeref:struct:icc_address_mask[0]
icc_address_mask	arch/x86/include/asm/arch-broadwell/me.h	/^struct icc_address_mask {$/;"	s
icc_clock_enables_msg	arch/x86/include/asm/arch-broadwell/me.h	/^struct icc_clock_enables_msg {$/;"	s
icc_command	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 icc_command;$/;"	m	struct:icc_header	typeref:typename:u32
icc_header	arch/x86/include/asm/arch-broadwell/me.h	/^struct icc_header {$/;"	s
icc_over_clocking	arch/x86/include/asm/me_common.h	/^	u32 icc_over_clocking:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
icc_profile	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_icc_profile	*icc_profile;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_icc_profile *
icc_profile	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mbp_icc_profile icc_profile;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_icc_profile
icc_profile_index	arch/x86/include/asm/arch-broadwell/me.h	/^	u8	icc_profile_index;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
icc_profile_index	arch/x86/include/asm/arch-ivybridge/me.h	/^	u8 icc_profile_index;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
icc_profile_soft_strap	arch/x86/include/asm/arch-broadwell/me.h	/^	u8	icc_profile_soft_strap;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
icc_profile_soft_strap	arch/x86/include/asm/arch-ivybridge/me.h	/^	u8 icc_profile_soft_strap;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
icc_prog_sts	arch/x86/include/asm/me_common.h	/^	u32 icc_prog_sts:2;$/;"	m	struct:me_gmes	typeref:typename:u32:2
icc_reg_bundles	arch/x86/include/asm/arch-broadwell/me.h	/^	u32	icc_reg_bundles;$/;"	m	struct:mbp_icc_profile	typeref:typename:u32
icc_start_address	arch/x86/include/asm/arch-broadwell/me.h	/^	u16 icc_start_address;$/;"	m	struct:icc_address_mask	typeref:typename:u16
icc_status	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 icc_status;$/;"	m	struct:icc_header	typeref:typename:u32
icccr	drivers/i2c/rcar_i2c.c	/^	u32 icccr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icccr2	drivers/i2c/rcar_i2c.c	/^	u32 icccr2;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icch	drivers/i2c/sh_i2c.c	/^static u16 iccl, icch;$/;"	v	typeref:typename:u16	file:
iccl	drivers/i2c/sh_i2c.c	/^static u16 iccl, icch;$/;"	v	typeref:typename:u16	file:
iccr1	drivers/i2c/sh_sh7734_i2c.c	/^	u8 iccr1;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
iccr1_cks	drivers/i2c/sh_sh7734_i2c.c	/^static u8 iccr1_cks, nf2cyc;$/;"	v	typeref:typename:u8	file:
iccr2	drivers/i2c/sh_sh7734_i2c.c	/^	u8 iccr2;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
icdrr	drivers/i2c/sh_sh7734_i2c.c	/^	u8 icdrr;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
icdrt	drivers/i2c/sh_sh7734_i2c.c	/^	u8 icdrt;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
ice	drivers/net/mvgbe.h	/^	u32 ice;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
icfg0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 icfg0;		\/* 0x1A Configuration *\/$/;"	m	struct:int0_ctrl	typeref:typename:u16
icfg1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 icfg1;		\/* 0x1A Configuration *\/$/;"	m	struct:int1_ctrl	typeref:typename:u16
ich6_bank_platdata	arch/x86/include/asm/gpio.h	/^struct ich6_bank_platdata {$/;"	s
ich6_bank_priv	drivers/gpio/intel_ich6_gpio.c	/^struct ich6_bank_priv {$/;"	s	file:
ich6_gpio_direction_input	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
ich6_gpio_direction_output	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
ich6_gpio_get_function	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
ich6_gpio_get_value	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
ich6_gpio_probe	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ich6_gpio_request	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_request(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
ich6_gpio_set_value	drivers/gpio/intel_ich6_gpio.c	/^static int ich6_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
ich6_pinctrl_cfg_pin	arch/x86/lib/pinctrl_ich6.c	/^static int ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node)$/;"	f	typeref:typename:int	file:
ich6_pinctrl_match	arch/x86/lib/pinctrl_ich6.c	/^static const struct udevice_id ich6_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ich6_pinctrl_probe	arch/x86/lib/pinctrl_ich6.c	/^static int ich6_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ich6_pinctrl_set_direction	arch/x86/lib/pinctrl_ich6.c	/^static int ich6_pinctrl_set_direction(uint16_t base, unsigned offset, int dir)$/;"	f	typeref:typename:int	file:
ich6_pinctrl_set_function	arch/x86/lib/pinctrl_ich6.c	/^static int ich6_pinctrl_set_function(uint16_t base, unsigned offset, int func)$/;"	f	typeref:typename:int	file:
ich6_pinctrl_set_value	arch/x86/lib/pinctrl_ich6.c	/^static int ich6_pinctrl_set_value(uint16_t base, unsigned offset, int value)$/;"	f	typeref:typename:int	file:
ich7_spi_regs	drivers/spi/ich.h	/^struct ich7_spi_regs {$/;"	s
ich9_can_do_33mhz	drivers/spi/ich.c	/^static int ich9_can_do_33mhz(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ich9_spi_regs	drivers/spi/ich.h	/^struct ich9_spi_regs {$/;"	s
ich_init_controller	drivers/spi/ich.c	/^static int ich_init_controller(struct udevice *dev,$/;"	f	typeref:typename:int	file:
ich_readb	drivers/spi/ich.c	/^static u8 ich_readb(struct ich_spi_priv *priv, int reg)$/;"	f	typeref:typename:u8	file:
ich_readl	drivers/spi/ich.c	/^static u32 ich_readl(struct ich_spi_priv *priv, int reg)$/;"	f	typeref:typename:u32	file:
ich_readw	drivers/spi/ich.c	/^static u16 ich_readw(struct ich_spi_priv *priv, int reg)$/;"	f	typeref:typename:u16	file:
ich_set_bbar	drivers/spi/ich.c	/^static void ich_set_bbar(struct ich_spi_priv *ctlr, uint32_t minaddr)$/;"	f	typeref:typename:void	file:
ich_spi_child_pre_probe	drivers/spi/ich.c	/^static int ich_spi_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ich_spi_ids	drivers/spi/ich.c	/^static const struct udevice_id ich_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ich_spi_ofdata_to_platdata	drivers/spi/ich.c	/^static int ich_spi_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ich_spi_ops	drivers/spi/ich.c	/^static const struct dm_spi_ops ich_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
ich_spi_platdata	drivers/spi/ich.h	/^struct ich_spi_platdata {$/;"	s
ich_spi_priv	drivers/spi/ich.h	/^struct ich_spi_priv {$/;"	s
ich_spi_probe	drivers/spi/ich.c	/^static int ich_spi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ich_spi_set_mode	drivers/spi/ich.c	/^static int ich_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
ich_spi_set_speed	drivers/spi/ich.c	/^static int ich_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
ich_spi_xfer	drivers/spi/ich.c	/^static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
ich_status_poll	drivers/spi/ich.c	/^static int ich_status_poll(struct ich_spi_priv *ctlr, u16 bitmask,$/;"	f	typeref:typename:int	file:
ich_version	drivers/spi/ich.h	/^	enum ich_version ich_version;	\/* Controller version, 7 or 9 *\/$/;"	m	struct:ich_spi_platdata	typeref:enum:ich_version
ich_version	drivers/spi/ich.h	/^enum ich_version {$/;"	g
ich_writeb	drivers/spi/ich.c	/^static void ich_writeb(struct ich_spi_priv *priv, u8 value, int reg)$/;"	f	typeref:typename:void	file:
ich_writel	drivers/spi/ich.c	/^static void ich_writel(struct ich_spi_priv *priv, u32 value, int reg)$/;"	f	typeref:typename:void	file:
ich_writew	drivers/spi/ich.c	/^static void ich_writew(struct ich_spi_priv *priv, u16 value, int reg)$/;"	f	typeref:typename:void	file:
ichpr	drivers/i2c/rcar_i2c.c	/^	u32 ichpr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
ichspi_lock	drivers/spi/ich.h	/^	int ichspi_lock;$/;"	m	struct:ich_spi_priv	typeref:typename:int
icid	include/fsl-mc/fsl_dprc.h	/^	uint16_t icid;$/;"	m	struct:dprc_attributes	typeref:typename:uint16_t
icid	include/fsl-mc/fsl_dprc.h	/^	uint16_t icid;$/;"	m	struct:dprc_cfg	typeref:typename:uint16_t
icier	drivers/i2c/sh_sh7734_i2c.c	/^	u8 icier;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
iclear	include/grlib/irqmp.h	/^	volatile unsigned int iclear;$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int
iclken1_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken1_core;	\/* 0xa10 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken2_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken2_core;	\/* 0xa14 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken3_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken3_core;	\/* 0xa18 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken_cam	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken_cam;		\/* 0xf10 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken_dss	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken_dss;		\/* 0xe10 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken_gfx	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken_gfx;		\/* 0xb10 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken_per	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken_per;		\/* 0x1010 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken_usbhost	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken_usbhost;	\/* 0x1410 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclken_wkup	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 iclken_wkup;	\/* 0xc10 *\/$/;"	m	struct:prcm	typeref:typename:u32
iclkout	board/siemens/draco/board.h	/^	unsigned short int iclkout;		\/* 0x0000 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned short int
iclpr	drivers/i2c/rcar_i2c.c	/^	u32 iclpr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icmar	drivers/i2c/rcar_i2c.c	/^	u32 icmar;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icmcr	drivers/i2c/rcar_i2c.c	/^	u32 icmcr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icmier	drivers/i2c/rcar_i2c.c	/^	u32 icmier;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icmp_handler	net/tftp.c	/^static void icmp_handler(unsigned type, unsigned code, unsigned dest,$/;"	f	typeref:typename:void	file:
icmp_hdr	include/net.h	/^struct icmp_hdr {$/;"	s
icmpr	drivers/i2c/rcar_i2c.c	/^	u32 icmpr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icmr	drivers/i2c/sh_sh7734_i2c.c	/^	u8 icmr;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
icmsr	drivers/i2c/rcar_i2c.c	/^	u32 icmsr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icn2_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 icn2_freq;		\/* offset 0x4 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
icn8318	arch/arm/dts/sun5i-a13-utoo-p66.dts	/^	icn8318: touchscreen@40 {$/;"	l
icnf	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_icnf	icnf;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_icnf
iconfa1	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 iconfa1;$/;"	m	struct:gpio_regs	typeref:typename:u32
iconfa2	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 iconfa2;$/;"	m	struct:gpio_regs	typeref:typename:u32
iconfb1	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 iconfb1;$/;"	m	struct:gpio_regs	typeref:typename:u32
iconfb2	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 iconfb2;$/;"	m	struct:gpio_regs	typeref:typename:u32
icountlevel	arch/xtensa/include/asm/ptrace.h	/^	unsigned long icountlevel;	\/*  60 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
icps	board/keymile/common/common.h	/^	u8	icps;		\/* ICN clock pulse shaping *\/$/;"	m	struct:bfticu_iomap	typeref:typename:u8
icr	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 icr[3];$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
icr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	icr; 	\/* 0x20 SDRAMC Interrupt Status Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
icr	arch/m68k/include/asm/coldfire/ata.h	/^	u8 icr;			\/* 0x30 *\/$/;"	m	struct:atac	typeref:typename:u8
icr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 icr;		\/* 0x38 Refresh Mode Control Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
icr	arch/m68k/include/asm/immap_5445x.h	/^	u32 icr;		\/* 0x84 Initiator Control Register *\/$/;"	m	struct:pci	typeref:typename:u32
icr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 icr;		\/* 0x84 Initiator Control *\/$/;"	m	struct:pci	typeref:typename:u32
icr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 icr;$/;"	m	struct:i2c512x	typeref:typename:volatile u32
icr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 icr;		\/* external interrupt control register *\/$/;"	m	struct:gpio83xx	typeref:typename:u32
icr	drivers/i2c/mv_i2c.c	/^	u32 icr;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
icr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 icr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
icr	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 icr;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
icr	drivers/serial/serial_stm32x7.h	/^	u32 icr;$/;"	m	struct:stm32_usart	typeref:typename:u32
icr	drivers/spi/lpc32xx_ssp.c	/^	u32 icr;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
icr	drivers/spi/rk_spi.h	/^	u32 icr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
icr0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 icr0[64];		\/* 0x40 - 0x7F Control registers *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[64]
icr0	arch/m68k/include/asm/immap_5307.h	/^	u8  icr0;$/;"	m	struct:intctrl	typeref:typename:u8
icr1	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 icr1;$/;"	m	struct:gpio_regs	typeref:typename:u32
icr1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 icr1[64];		\/* 0x40 - 0x7F *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[64]
icr1	arch/m68k/include/asm/immap_5307.h	/^	u8  icr1;$/;"	m	struct:intctrl	typeref:typename:u8
icr1	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $icr1  = $mbar - 1 + 0x020$/;"	t
icr2	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 icr2;$/;"	m	struct:gpio_regs	typeref:typename:u32
icr2	arch/m68k/include/asm/immap_5307.h	/^	u8  icr2;$/;"	m	struct:intctrl	typeref:typename:u8
icr2	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $icr2  = $mbar - 1 + 0x024$/;"	t
icr3	arch/m68k/include/asm/immap_5307.h	/^	u8  icr3;$/;"	m	struct:intctrl	typeref:typename:u8
icr3	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $icr3  = $mbar - 1 + 0x028$/;"	t
icr4	arch/m68k/include/asm/immap_5307.h	/^	u8  icr4;$/;"	m	struct:intctrl	typeref:typename:u8
icr4	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $icr4  = $mbar - 1 + 0x02c$/;"	t
icr5	arch/m68k/include/asm/immap_5307.h	/^	u8  icr5;$/;"	m	struct:intctrl	typeref:typename:u8
icr6	arch/m68k/include/asm/immap_5307.h	/^	u8  icr6;$/;"	m	struct:intctrl	typeref:typename:u8
icr7	arch/m68k/include/asm/immap_5307.h	/^	u8  icr7;$/;"	m	struct:intctrl	typeref:typename:u8
icr8	arch/m68k/include/asm/immap_5307.h	/^	u8  icr8;$/;"	m	struct:intctrl	typeref:typename:u8
icr9	arch/m68k/include/asm/immap_5307.h	/^	u8  icr9;$/;"	m	struct:intctrl	typeref:typename:u8
icrxdtxd	drivers/i2c/rcar_i2c.c	/^	u32 icrxdtxd;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
ics307_clk_freq	board/freescale/common/ics307_clk.c	/^static unsigned long ics307_clk_freq(u8 cw0, u8 cw1, u8 cw2)$/;"	f	typeref:typename:unsigned long	file:
ics307_s_to_od	board/freescale/common/ics307_clk.c	/^static u8 ics307_s_to_od[] = {$/;"	v	typeref:typename:u8[]	file:
ics307_sysclk_calculator	board/freescale/common/ics307_clk.c	/^unsigned long ics307_sysclk_calculator(unsigned long out_freq)$/;"	f	typeref:typename:unsigned long
ics8n3qv01_calc_parameters	board/gdsys/common/osd.c	/^static void ics8n3qv01_calc_parameters(unsigned int fout,$/;"	f	typeref:typename:void	file:
ics8n3qv01_get_fout_calc	board/gdsys/common/osd.c	/^static unsigned int ics8n3qv01_get_fout_calc(unsigned index)$/;"	f	typeref:typename:unsigned int	file:
ics8n3qv01_i2c	board/gdsys/common/osd.c	/^int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;$/;"	v	typeref:typename:int[]
ics8n3qv01_set	board/gdsys/common/osd.c	/^static void ics8n3qv01_set(unsigned int fout)$/;"	f	typeref:typename:void	file:
icsar	drivers/i2c/rcar_i2c.c	/^	u32 icsar;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icscr	drivers/i2c/rcar_i2c.c	/^	u32 icscr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icsier	drivers/i2c/rcar_i2c.c	/^	u32 icsier;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icsr	arch/arm/include/asm/armv7m.h	/^	uint32_t icsr;		\/* Interrupt Control and State Register *\/$/;"	m	struct:v7m_scb	typeref:typename:uint32_t
icsr	drivers/i2c/sh_sh7734_i2c.c	/^	u8 icsr;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
icssr	drivers/i2c/rcar_i2c.c	/^	u32 icssr;$/;"	m	struct:rcar_i2c	typeref:typename:u32	file:
icusb_ctrl	arch/arm/include/asm/arch-tegra/usb.h	/^	uint icusb_ctrl;$/;"	m	struct:usb_ctlr	typeref:typename:uint
id	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^	u32 id;$/;"	m	struct:clk_synth	typeref:typename:u32
id	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	u32 id[2];$/;"	m	struct:liodn_id_table	typeref:typename:u32[2]
id	arch/arm/include/asm/arch-tegra/usb.h	/^	uint id;$/;"	m	struct:usb_ctlr	typeref:typename:uint
id	arch/arm/mach-exynos/clock.c	/^	enum periph_id id;$/;"	m	struct:clk_bit_info	typeref:enum:periph_id	file:
id	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int			id;$/;"	m	struct:mipi_dsim_lcd_device	typeref:typename:int
id	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int			id;$/;"	m	struct:mipi_dsim_lcd_driver	typeref:typename:int
id	arch/arm/mach-rockchip/rk3288-board.c	/^		int id;$/;"	m	struct:do_clock::__anon78e9bd210108	typeref:typename:int	file:
id	arch/arm/mach-sunxi/usb_phy.c	/^	int id;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
id	arch/m68k/include/asm/immap_5329.h	/^	u32 id;			\/* 0x000 Identification Register *\/$/;"	m	struct:usb_otg	typeref:typename:u32
id	arch/mips/include/asm/global_data.h	/^	unsigned long id;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
id	arch/powerpc/include/asm/fsl_liodn.h	/^	u32 id[2];$/;"	m	struct:fman_liodn_id_table	typeref:typename:u32[2]
id	arch/powerpc/include/asm/fsl_liodn.h	/^	u32 id[2];$/;"	m	struct:liodn_id_table	typeref:typename:u32[2]
id	arch/powerpc/include/asm/fsl_liodn.h	/^	u32 id[2];$/;"	m	struct:srio_liodn_id_table	typeref:typename:u32[2]
id	arch/powerpc/include/asm/immap_85xx.h	/^		u32	id;	\/* partition ID *\/$/;"	m	struct:cpc_corenet::__anondcd7518a0208	typeref:typename:u32
id	arch/powerpc/include/asm/immap_86xx.h	/^	uint    id;		\/* 0x24000 - Controller ID Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
id	arch/x86/include/asm/coreboot_tables.h	/^	u32 id;$/;"	m	struct:cbmem_entry	typeref:typename:u32
id	arch/x86/include/asm/me_common.h	/^	u32 id;$/;"	m	struct:me_fwcaps	typeref:typename:u32
id	arch/xtensa/include/asm/bootparam.h	/^	unsigned short id;	\/* tag id *\/$/;"	m	struct:bp_tag	typeref:typename:unsigned short
id	board/freescale/common/ngpixis.h	/^	u8 id;$/;"	m	struct:ngpixis	typeref:typename:u8
id	board/freescale/common/pixis.h	/^	u8 id;$/;"	m	struct:pixis	typeref:typename:u8
id	board/freescale/common/qixis.h	/^	u8 id;      \/* ID value uniquely identifying each QDS board type *\/$/;"	m	struct:qixis	typeref:typename:u8
id	board/freescale/common/sys_eeprom.c	/^		u32 id;           \/* 0x00 - 0x03 EEPROM Tag 'CCID' *\/$/;"	m	struct:get_cpu_board_revision::board_eeprom	typeref:typename:u32	file:
id	board/freescale/common/sys_eeprom.c	/^	u8 id[4];         \/* 0x00 - 0x03 EEPROM Tag 'CCID' *\/$/;"	m	struct:eeprom	typeref:typename:u8[4]	file:
id	board/freescale/common/sys_eeprom.c	/^	u8 id[4];         \/* 0x00 - 0x03 EEPROM Tag 'NXID' *\/$/;"	m	struct:eeprom	typeref:typename:u8[4]	file:
id	board/keymile/common/common.h	/^	u8	id;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
id	board/keymile/common/common.h	/^	unsigned char	id;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
id	board/micronas/vct/scc.h	/^		u32 id:6;	\/* DMA Identifier			*\/$/;"	m	struct:scc_cmd::__anon903167320108	typeref:typename:u32:6
id	board/varisys/common/sys_eeprom.c	/^	u8 id[4];         \/* 0x00 - 0x03 EEPROM Tag 'NXID' *\/$/;"	m	struct:eeprom	typeref:typename:u8[4]	file:
id	board/xilinx/zynqmp/zynqmp.c	/^	uint32_t id;$/;"	m	struct:__anon82c498450108	typeref:typename:uint32_t	file:
id	common/bootstage.c	/^	enum bootstage_id id;$/;"	m	struct:bootstage_record	typeref:enum:bootstage_id	file:
id	disk/part_amiga.c	/^    u32 id;$/;"	m	struct:block_header	typeref:typename:u32	file:
id	disk/part_amiga.h	/^    u32   id;$/;"	m	struct:bootcode_block	typeref:typename:u32
id	disk/part_amiga.h	/^    u32 id;$/;"	m	struct:partition_block	typeref:typename:u32
id	disk/part_amiga.h	/^    u32 id;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
id	drivers/block/sata_dwc.h	/^		u16		id[ATA_ID_WORDS];$/;"	m	union:ata_device::__anone5f66849030a	typeref:typename:u16[]
id	drivers/block/sata_mv.c	/^	u32 id;$/;"	m	struct:crpb	typeref:typename:u32	file:
id	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int id;$/;"	m	struct:uniphier_clk_gate_data	typeref:typename:unsigned int
id	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int id;$/;"	m	struct:uniphier_clk_mux_data	typeref:typename:unsigned int
id	drivers/i2c/i2c-cdns.c	/^	int id;$/;"	m	struct:i2c_cdns_bus	typeref:typename:int	file:
id	drivers/i2c/s3c24x0_i2c.h	/^	int id;$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:int
id	drivers/i2c/tegra_i2c.c	/^	int			id;$/;"	m	struct:i2c_bus	typeref:typename:int	file:
id	drivers/misc/altera_sysid.c	/^	u32	id;		\/* The system build id *\/$/;"	m	struct:altera_sysid_regs	typeref:typename:u32	file:
id	drivers/mmc/mxsmmc.c	/^	int			id;$/;"	m	struct:mxsmmc_priv	typeref:typename:int	file:
id	drivers/mtd/mtdcore.c	/^	struct idr_layer id[MAX_IDR_ID];$/;"	m	struct:idr	typeref:struct:idr_layer[]	file:
id	drivers/net/ks8851_mll.h	/^	u16 id;$/;"	m	struct:chip_id	typeref:typename:u16
id	drivers/net/lan91c96.c	/^	u8 id;$/;"	m	struct:id_type	typeref:typename:u8	file:
id	drivers/net/mvneta.c	/^	u8 id;$/;"	m	struct:mvneta_rx_queue	typeref:typename:u8	file:
id	drivers/net/mvneta.c	/^	u8 id;$/;"	m	struct:mvneta_tx_queue	typeref:typename:u8	file:
id	drivers/net/mvpp2.c	/^	int id;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:int	file:
id	drivers/net/mvpp2.c	/^	u8 id;$/;"	m	struct:mvpp2_port	typeref:typename:u8	file:
id	drivers/net/mvpp2.c	/^	u8 id;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:u8	file:
id	drivers/net/mvpp2.c	/^	u8 id;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:u8	file:
id	drivers/net/phy/mv88e61xx.c	/^	int id;$/;"	m	struct:mv88e61xx_phy_priv	typeref:typename:int	file:
id	drivers/net/smc911x.h	/^	u16 id;$/;"	m	struct:chip_id	typeref:typename:u16
id	drivers/reset/reset-uniphier.c	/^	unsigned int id;$/;"	m	struct:uniphier_reset_data	typeref:typename:unsigned int	file:
id	drivers/usb/gadget/fotg210.c	/^	uint id;$/;"	m	struct:fotg210_ep	typeref:typename:uint	file:
id	drivers/video/ipu.h	/^	int id;$/;"	m	struct:clk	typeref:typename:int
id	drivers/video/stb_truetype.h	/^   int id,w,h,was_packed;$/;"	m	struct:stbrp_rect	typeref:typename:int
id	include/adc.h	/^	int id;$/;"	m	struct:adc_channel	typeref:typename:int
id	include/ambapp.h	/^	const unsigned int	id;		\/* VENDOR, DEVICE, VER, IRQ, *\/$/;"	m	struct:ambapp_pnp_ahb	typeref:typename:const unsigned int
id	include/ambapp.h	/^	const unsigned int	id;		\/* VENDOR, DEVICE, VER, IRQ, *\/$/;"	m	struct:ambapp_pnp_apb	typeref:typename:const unsigned int
id	include/android_image.h	/^	u32 id[8]; \/* timestamp \/ checksum \/ sha1 \/ etc *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32[8]
id	include/clk.h	/^	unsigned long id;$/;"	m	struct:clk	typeref:typename:unsigned long
id	include/cpu.h	/^	u32 id[2];		\/* DMTF CPU Processor IDs *\/$/;"	m	struct:cpu_platdata	typeref:typename:u32[2]
id	include/dataflash.h	/^	unsigned int id;			\/* device id *\/$/;"	m	struct:_AT91S_DATAFLASH_INFO	typeref:typename:unsigned int
id	include/dm/device.h	/^	enum uclass_id id;$/;"	m	struct:driver	typeref:enum:uclass_id
id	include/dm/uclass.h	/^	enum uclass_id id;$/;"	m	struct:uclass_driver	typeref:enum:uclass_id
id	include/dt-structs.h	/^	int id;$/;"	m	struct:phandle_2_cell	typeref:typename:int
id	include/ec_commands.h	/^	uint8_t id;$/;"	m	struct:ec_params_temp_sensor_get_info	typeref:typename:uint8_t
id	include/fat.h	/^	__u8	id;		\/* Sequence number for slot *\/$/;"	m	struct:dir_slot	typeref:typename:__u8
id	include/fsl-mc/fsl_dpbp.h	/^	int id;$/;"	m	struct:dpbp_attr	typeref:typename:int
id	include/fsl-mc/fsl_dpio.h	/^	int id;$/;"	m	struct:dpio_attr	typeref:typename:int
id	include/fsl-mc/fsl_dpmac.h	/^	int			id;$/;"	m	struct:dpmac_attr	typeref:typename:int
id	include/fsl-mc/fsl_dpni.h	/^	int id;$/;"	m	struct:dpni_attr	typeref:typename:int
id	include/fsl-mc/fsl_dprc.h	/^	int		id;$/;"	m	struct:dprc_endpoint	typeref:typename:int
id	include/fsl-mc/fsl_dprc.h	/^	int id;$/;"	m	struct:dprc_obj_desc	typeref:typename:int
id	include/fsl-mc/ldpaa_wriop.h	/^	u8 id;$/;"	m	struct:wriop_dpmac_info	typeref:typename:u8
id	include/fsl_qe.h	/^		u8 id[32];	\/* Null-terminated identifier *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u8[32]
id	include/fsl_qe.h	/^	char id[64];		\/* Firmware name *\/$/;"	m	struct:qe_firmware_info	typeref:typename:char[64]
id	include/fsl_qe.h	/^	u8 id[62];		\/* Null-terminated identifier string *\/$/;"	m	struct:qe_firmware	typeref:typename:u8[62]
id	include/fsl_usb.h	/^	u32	id;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
id	include/i2c.h	/^	int	id;$/;"	m	struct:i2c_mux	typeref:typename:int
id	include/i2s.h	/^	unsigned int id;		\/* I2S controller id *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
id	include/image.h	/^	int	id;$/;"	m	struct:table_entry	typeref:typename:int
id	include/jffs2/load_kernel.h	/^	struct mtdids *id;		\/* parent mtd id entry *\/$/;"	m	struct:mtd_device	typeref:struct:mtdids *
id	include/linux/edd.h	/^			__u16 id;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0b08	typeref:typename:__u16
id	include/linux/fb.h	/^	char id[16];			\/* identification string eg "TT Builtin" *\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:char[16]
id	include/linux/mtd/doc2000.h	/^	unsigned long id;$/;"	m	struct:DiskOnChip	typeref:typename:unsigned long
id	include/linux/mtd/nand.h	/^		uint8_t id[NAND_MAX_ID_LEN];$/;"	m	union:nand_flash_dev::__anon4f3885c2020a	typeref:typename:uint8_t[]
id	include/linux/mtd/nand.h	/^	int id;$/;"	m	struct:nand_manufacturers	typeref:typename:int
id	include/linux/mtd/onenand.h	/^	int id;$/;"	m	struct:onenand_manufacturers	typeref:typename:int
id	include/linux/usb/ch9.h	/^	u8 id;$/;"	m	struct:usb_string	typeref:typename:u8
id	include/mailbox.h	/^	unsigned long id;$/;"	m	struct:mbox_chan	typeref:typename:unsigned long
id	include/net.h	/^			u16	id;$/;"	m	struct:icmp_hdr::__anona5cac555010a::__anona5cac5550208	typeref:typename:u16
id	include/power-domain.h	/^	unsigned long id;$/;"	m	struct:power_domain	typeref:typename:unsigned long
id	include/power/regulator.h	/^	int id; \/* Set only as >= 0 (negative value is reserved for errno) *\/$/;"	m	struct:dm_regulator_mode	typeref:typename:int
id	include/reset.h	/^	unsigned long id;$/;"	m	struct:reset_ctl	typeref:typename:unsigned long
id	include/s6e63d6.h	/^	unsigned int id;$/;"	m	struct:s6e63d6	typeref:typename:unsigned int
id	include/usb.h	/^	struct usb_device_id id;$/;"	m	struct:usb_dev_platdata	typeref:struct:usb_device_id
id	include/usb/ehci-ci.h	/^	u32	id;		\/* 0x000 - Identification register *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
id	net/nfs.h	/^			uint32_t id;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780208	typeref:typename:uint32_t
id	net/nfs.h	/^			uint32_t id;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780308	typeref:typename:uint32_t
id	scripts/kconfig/zconf.lex.c	/^		const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng);$/;"	v	typeref:typename:const struct kconf_id *
id	scripts/kconfig/zconf.tab.c	/^	const struct kconf_id *id;$/;"	m	union:YYSTYPE	typeref:typename:const struct kconf_id *	file:
id	tools/easylogo/easylogo.c	/^	unsigned char id;$/;"	m	struct:__anonbf0fd82b0108	typeref:typename:unsigned char	file:
id	tools/kwbimage.c	/^	unsigned int id;$/;"	m	struct:boot_mode	typeref:typename:unsigned int	file:
id	tools/kwbimage.c	/^	unsigned int id;$/;"	m	struct:nand_ecc_mode	typeref:typename:unsigned int	file:
id	tools/mxsimage.c	/^	uint32_t			id;$/;"	m	struct:sb_dcd_ctx	typeref:typename:uint32_t	file:
id0	drivers/serial/serial_arc.c	/^	unsigned int id0;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
id1	drivers/serial/serial_arc.c	/^	unsigned int id1;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
id2	drivers/serial/serial_arc.c	/^	unsigned int id2;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
id3	drivers/serial/serial_arc.c	/^	unsigned int id3;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
idProduct	include/linux/usb/ch9.h	/^	__le16 idProduct;$/;"	m	struct:usb_device_descriptor	typeref:typename:__le16
idProduct	include/usb.h	/^	u16 idProduct;$/;"	m	struct:usb_device_id	typeref:typename:u16
idProduct	include/usbdescriptors.h	/^	u16 idProduct;$/;"	m	struct:usb_device_descriptor	typeref:typename:u16
idVendor	include/linux/usb/ch9.h	/^	__le16 idVendor;$/;"	m	struct:usb_device_descriptor	typeref:typename:__le16
idVendor	include/usb.h	/^	u16 idVendor;$/;"	m	struct:usb_device_id	typeref:typename:u16
idVendor	include/usbdescriptors.h	/^	u16 idVendor;$/;"	m	struct:usb_device_descriptor	typeref:typename:u16
id_cksum	arch/sparc/include/asm/prom.h	/^	unsigned char id_cksum;	\/* Checksum - xor of the data bytes *\/$/;"	m	struct:idprom	typeref:typename:unsigned char
id_coreid	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 id_coreid;$/;"	m	struct:rk3036_service_sys	typeref:typename:u32
id_date	arch/sparc/include/asm/prom.h	/^	long id_date;		\/* Date of manufacture *\/$/;"	m	struct:idprom	typeref:typename:long
id_ethaddr	arch/sparc/include/asm/prom.h	/^	unsigned char id_ethaddr[6];	\/* Hardware ethernet address *\/$/;"	m	struct:idprom	typeref:typename:unsigned char[6]
id_find	cmd/mtdparts.c	/^static struct mtdids* id_find(u8 type, u8 num)$/;"	f	typeref:struct:mtdids *	file:
id_find_by_mtd_id	cmd/mtdparts.c	/^static struct mtdids* id_find_by_mtd_id(const char *mtd_id, unsigned int mtd_id_len)$/;"	f	typeref:struct:mtdids *	file:
id_for_uart	arch/arm/mach-tegra/board.c	/^	static enum periph_id id_for_uart[] = {$/;"	g	function:setup_uarts	file:
id_format	arch/sparc/include/asm/prom.h	/^	unsigned char id_format;	\/* Format identifier (always 0x01) *\/$/;"	m	struct:idprom	typeref:typename:unsigned char
id_high	arch/powerpc/include/asm/5xx_immap.h	/^	       ushort id_high;$/;"	m	struct:tcan::__anon8cdce8f20108	typeref:typename:ushort
id_len	include/linux/mtd/nand.h	/^	uint16_t id_len;$/;"	m	struct:nand_flash_dev	typeref:typename:uint16_t
id_low	arch/powerpc/include/asm/5xx_immap.h	/^	       ushort id_low;$/;"	m	struct:tcan::__anon8cdce8f20108	typeref:typename:ushort
id_machtype	arch/sparc/include/asm/machines.h	/^	unsigned char id_machtype;$/;"	m	struct:Sun_Machine_Models	typeref:typename:unsigned char
id_machtype	arch/sparc/include/asm/prom.h	/^	unsigned char id_machtype;	\/* Machine type *\/$/;"	m	struct:idprom	typeref:typename:unsigned char
id_revisionid	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 id_revisionid;$/;"	m	struct:rk3036_service_sys	typeref:typename:u32
id_sernum	arch/sparc/include/asm/prom.h	/^	unsigned int id_sernum:24;	\/* Unique serial number *\/$/;"	m	struct:idprom	typeref:typename:unsigned int:24
id_str	disk/part_iso.h	/^	char					id_str[0x1C]; \/* Ident String of sectionr *\/$/;"	m	struct:iso_header_entry	typeref:typename:char[0x1C]
id_to_core	arch/arm/include/asm/arch-fsl-layerscape/mp.h	/^#define id_to_core(/;"	d
id_to_freq	drivers/timer/tsc_timer.c	/^#define id_to_freq(/;"	d	file:
id_type	drivers/net/lan91c96.c	/^struct id_type {$/;"	s	file:
id_ver	drivers/net/cpsw.c	/^	u32	id_ver;$/;"	m	struct:cpsw_regs	typeref:typename:u32	file:
id_ver	drivers/net/cpsw.c	/^	u32	id_ver;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
idata	include/fsl_fman.h	/^	u32	idata;		\/* instruction data register *\/$/;"	m	struct:fm_imem	typeref:typename:u32
idata	include/linux/immap_qe.h	/^	u32 idata;		\/* I-RAM Data Register    *\/$/;"	m	struct:qe_iram	typeref:typename:u32
idbr	drivers/i2c/mv_i2c.c	/^	u32 idbr;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
idcode	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 idcode;		\/* 0x04 *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
idcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 idcr;		\/* 0xb4 initializaton delay configure reg *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
idcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 idcr;		\/* 0xb4 initializaton delay configure reg *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
iddig	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	iddig:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
iddq	arch/arm/mach-tegra/xusb-padctl-common.h	/^	int iddq;$/;"	m	struct:tegra_xusb_padctl_group	typeref:typename:int
iddq	arch/arm/mach-tegra/xusb-padctl-common.h	/^	int iddq;$/;"	m	struct:tegra_xusb_padctl_pin	typeref:typename:int
iddq	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int iddq;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:unsigned int
ide_blk_ops	common/ide.c	/^static const struct blk_ops ide_blk_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
ide_bus_offset	common/ide.c	/^ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {$/;"	v	typeref:typename:ulong[]
ide_bus_ok	common/ide.c	/^static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];$/;"	v	typeref:typename:int[]	file:
ide_dev_desc	common/ide.c	/^struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];$/;"	v	typeref:struct:blk_desc[]
ide_device_present	common/ide.c	/^int ide_device_present(int dev)$/;"	f	typeref:typename:int
ide_devices_found	cmd/pcmcia.c	/^int		ide_devices_found;$/;"	v	typeref:typename:int
ide_devices_found	drivers/pcmcia/ti_pci1410a.c	/^int ide_devices_found;$/;"	v	typeref:typename:int
ide_ident	common/ide.c	/^static void ide_ident(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void	file:
ide_inb	common/ide.c	/^__weak unsigned char ide_inb(int dev, int port)$/;"	f	typeref:typename:__weak unsigned char
ide_init	common/ide.c	/^void ide_init(void)$/;"	f	typeref:typename:void
ide_init_postreset	arch/powerpc/lib/ide.c	/^int ide_init_postreset(void)$/;"	f	typeref:typename:int
ide_input_data	common/ide.c	/^__weak void ide_input_data(int dev, ulong *sect_buf, int words)$/;"	f	typeref:typename:__weak void
ide_input_data_shorts	common/ide.c	/^__weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)$/;"	f	typeref:typename:__weak void
ide_input_swap_data	arch/mips/mach-au1x00/au1x00_ide.c	/^void ide_input_swap_data(int dev, ulong *sect_buf, int words)$/;"	f	typeref:typename:void
ide_input_swap_data	common/ide.c	/^__weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)$/;"	f	typeref:typename:__weak void
ide_led	board/tqc/tqm8xx/tqm8xx.c	/^void ide_led (uchar led, uchar status)$/;"	f	typeref:typename:void
ide_led	common/ide.c	/^__weak void ide_led(uchar led, uchar status)$/;"	f	typeref:typename:__weak void
ide_outb	common/ide.c	/^__weak void ide_outb(int dev, int port, unsigned char val)$/;"	f	typeref:typename:__weak void
ide_output_data	common/ide.c	/^__weak void ide_output_data(int dev, const ulong *sect_buf, int words)$/;"	f	typeref:typename:__weak void
ide_output_data_shorts	common/ide.c	/^__weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)$/;"	f	typeref:typename:__weak void
ide_preinit	arch/powerpc/cpu/mpc512x/ide.c	/^int ide_preinit (void)$/;"	f	typeref:typename:int
ide_preinit	arch/powerpc/cpu/mpc5xxx/ide.c	/^int ide_preinit (void)$/;"	f	typeref:typename:int
ide_preinit	arch/powerpc/lib/ide.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	board/freescale/m5253demo/m5253demo.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	board/freescale/m5253evbe/m5253evbe.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	board/freescale/m54455evb/m54455evb.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	drivers/block/ftide020.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	drivers/block/mvsata_ide.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	drivers/block/mxc_ata.c	/^int ide_preinit(void)$/;"	f	typeref:typename:int
ide_preinit	drivers/block/sil680.c	/^int ide_preinit (void)$/;"	f	typeref:typename:int
ide_read	common/ide.c	/^ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong
ide_read_data	drivers/block/ftide020.c	/^void ide_read_data(int dev, ulong *sect_buf, int words)$/;"	f	typeref:typename:void
ide_read_register	drivers/block/ftide020.c	/^unsigned char ide_read_register(int dev, unsigned int port)$/;"	f	typeref:typename:unsigned char
ide_reset	common/ide.c	/^#define ide_reset(/;"	d	file:
ide_reset	common/ide.c	/^static void ide_reset(void)$/;"	f	typeref:typename:void	file:
ide_set_reset	arch/powerpc/cpu/mpc512x/ide.c	/^void ide_set_reset (int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/esd/cpci405/cpci405.c	/^void ide_set_reset(int on)$/;"	f	typeref:typename:void
ide_set_reset	board/esd/plu405/plu405.c	/^void ide_set_reset(int on)$/;"	f	typeref:typename:void
ide_set_reset	board/freescale/m5253demo/m5253demo.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/freescale/m5253evbe/m5253evbe.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/freescale/m54455evb/m54455evb.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/intercontrol/digsy_mtc/digsy_mtc.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/jupiter/jupiter.c	/^void ide_set_reset (int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/mpl/mip405/mip405.c	/^void ide_set_reset (int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/mpl/pip405/pip405.c	/^void ide_set_reset (int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/phytec/pcm030/pcm030.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/renesas/ap325rxa/ap325rxa.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/renesas/r2dplus/r2dplus.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/renesas/r7780mp/r7780mp.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/tqc/tqm5200/tqm5200.c	/^void ide_set_reset (int idereset)$/;"	f	typeref:typename:void
ide_set_reset	board/v38b/v38b.c	/^void ide_set_reset(int idereset)$/;"	f	typeref:typename:void
ide_set_reset	drivers/block/ftide020.c	/^void ide_set_reset(int flag)$/;"	f	typeref:typename:void
ide_set_reset	drivers/block/sil680.c	/^void ide_set_reset (int flag) {$/;"	f	typeref:typename:void
ide_wait	common/ide.c	/^static uchar ide_wait(int dev, ulong t)$/;"	f	typeref:typename:uchar	file:
ide_write	common/ide.c	/^ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong
ide_write_data	drivers/block/ftide020.c	/^void ide_write_data(int dev, const ulong *sect_buf, int words)$/;"	f	typeref:typename:void
ide_write_register	drivers/block/ftide020.c	/^void ide_write_register(int dev, unsigned int port, unsigned char val)$/;"	f	typeref:typename:void
ideal_cfg	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ideal_cfg;		\/* 0x018 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
ident	board/boundary/nitrogen6x/nitrogen6x.c	/^	char		ident;$/;"	m	struct:button_key	typeref:typename:char	file:
ident_cpy	common/ide.c	/^static void ident_cpy(unsigned char *dst, unsigned char *src,$/;"	f	typeref:typename:void	file:
ident_str	disk/part_iso.h	/^	char					ident_str[0x20]; \/* Ident String "EL TORITO SPECIFICATION" *\/$/;"	m	struct:iso_boot_rec	typeref:typename:char[0x20]
identify	cmd/pcmcia.c	/^static int identify  (volatile uchar *p)$/;"	f	typeref:typename:int	file:
identify	drivers/pcmcia/ti_pci1410a.c	/^static int identify(volatile char *p)$/;"	f	typeref:typename:int	file:
identify_cpu	arch/powerpc/cpu/mpc8xxx/cpu.c	/^struct cpu_type *identify_cpu(u32 ver)$/;"	f	typeref:struct:cpu_type *
identify_cpu	arch/x86/cpu/cpu.c	/^static void identify_cpu(struct cpu_device_id *cpu)$/;"	f	typeref:typename:void	file:
identify_module	board/cm5200/cm5200.c	/^static void identify_module(hw_id_t hw_id)$/;"	f	typeref:typename:void	file:
identify_nand_chip	arch/arm/cpu/armv7/omap3/spl_id_nand.c	/^int identify_nand_chip(int *mfr, int *id)$/;"	f	typeref:typename:int
identity_tag	include/linux/edd.h	/^			__u64 identity_tag;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0f08	typeref:typename:__u64
idh	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 idh;		\/* 0x02 ID High *\/$/;"	m	struct:can_msgbuf_ctrl	typeref:typename:u16
idie	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 idie;		\/* 0x8c internal DMA interrupt enable *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
idie	arch/arm/include/asm/arch/mmc.h	/^	u32 idie;		\/* 0x8c internal DMA interrupt enable *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
idiv_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^void idiv_byte(u8 s)$/;"	f	typeref:typename:void
idiv_long	drivers/bios_emulator/x86emu/prim_ops.c	/^void idiv_long(u32 s)$/;"	f	typeref:typename:void
idiv_word	drivers/bios_emulator/x86emu/prim_ops.c	/^void idiv_word(u16 s)$/;"	f	typeref:typename:void
idk_dpll_ddr	board/ti/am43xx/board.c	/^static const struct dpll_params idk_dpll_ddr = {$/;"	v	typeref:typename:const struct dpll_params	file:
idl	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 idl;		\/* 0x04 ID High *\/$/;"	m	struct:can_msgbuf_ctrl	typeref:typename:u16
idle	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	idle;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
idle	include/usb/fotg210.h	/^	uint32_t idle;	\/* 0x124: IDLE Counter Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
idle_bus_data	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	void *idle_bus_data;$/;"	m	struct:mxc_i2c_bus	typeref:typename:void *
idle_bus_fn	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	int (*idle_bus_fn)(void *p);$/;"	m	struct:mxc_i2c_bus	typeref:typename:int (*)(void * p)
idle_cnt0_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt0_ctrl;	\/* 0x208 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt0_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt0_ctrl;	\/* 0x208 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt0_high	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt0_high;	\/* 0x204 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt0_high	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt0_high;	\/* 0x204 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt0_low	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt0_low;	\/* 0x200 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt0_low	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt0_low;	\/* 0x200 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt1_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt1_ctrl;	\/* 0x218 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt1_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt1_ctrl;	\/* 0x218 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt1_high	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt1_high;	\/* 0x214 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt1_high	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt1_high;	\/* 0x214 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt1_low	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt1_low;	\/* 0x210 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt1_low	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt1_low;	\/* 0x210 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt2_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt2_ctrl;	\/* 0x228 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt2_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt2_ctrl;	\/* 0x228 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt2_high	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt2_high;	\/* 0x224 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt2_high	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt2_high;	\/* 0x224 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt2_low	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt2_low;	\/* 0x220 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt2_low	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt2_low;	\/* 0x220 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt3_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt3_ctrl;	\/* 0x238 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt3_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt3_ctrl;	\/* 0x238 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt3_high	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt3_high;	\/* 0x234 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt3_high	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt3_high;	\/* 0x234 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt3_low	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt3_low;	\/* 0x230 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt3_low	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt3_low;	\/* 0x230 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt4_ctrl	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt4_ctrl;	\/* 0x248 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt4_ctrl	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt4_ctrl;	\/* 0x248 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt4_high	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt4_high;	\/* 0x244 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt4_high	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt4_high;	\/* 0x244 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt4_low	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 idle_cnt4_low;	\/* 0x240 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_cnt4_low	arch/arm/include/asm/arch/cpucfg.h	/^	u32 idle_cnt4_low;	\/* 0x240 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
idle_errors	drivers/net/e1000.h	/^	uint32_t idle_errors;$/;"	m	struct:e1000_phy_stats	typeref:typename:uint32_t
idle_irq	drivers/block/sata_dwc.h	/^	unsigned long		idle_irq;$/;"	m	struct:ata_port_stats	typeref:typename:unsigned long
idle_loop1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	idle_loop1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
idle_loop2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	idle_loop2;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
idle_req	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 idle_req;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
idle_st	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 idle_st;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
idle_timeout	drivers/usb/musb-new/musb_core.h	/^	unsigned long		idle_timeout;	\/* Next timeout in jiffies *\/$/;"	m	struct:musb	typeref:typename:unsigned long
idlest2_ckgen	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 idlest2_ckgen;	\/* 0xd24 *\/$/;"	m	struct:prcm	typeref:typename:u32
idlest_ckgen	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 idlest_ckgen;	\/* 0xd20 *\/$/;"	m	struct:prcm	typeref:typename:u32
idlest_pll_iva2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 idlest_pll_iva2;	\/* 0x24 *\/$/;"	m	struct:prcm	typeref:typename:u32
idlest_pll_mpu	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 idlest_pll_mpu;	\/* 0x924 *\/$/;"	m	struct:prcm	typeref:typename:u32
idlest_wkup	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 idlest_wkup;	\/* 0xc20 *\/$/;"	m	struct:prcm	typeref:typename:u32
idlestdpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllcore;	\/* offset 0x524 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllcore	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllcore;	\/* offset 0x5c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllddr;	\/* offset 0x34 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllddr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllddr;	\/* offset 0x5A4 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllmpu;	\/* offset 0x20 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllmpu;	\/* offset 0x564 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllper;	\/* offset 0x5E4 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idlestdpllper	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idlestdpllper;	\/* offset 0x70 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
idma_buf_desc	examples/standalone/mem_to_mem_idma2intr.c	/^typedef struct idma_buf_desc {$/;"	s	file:
idma_init	examples/standalone/mem_to_mem_idma2intr.c	/^int idma_init (void)$/;"	f	typeref:typename:int
idma_is_set	drivers/video/ipu_common.c	/^#define idma_is_set(/;"	d	file:
idma_is_valid	drivers/video/ipu_common.c	/^#define idma_is_valid(/;"	d	file:
idma_mask	drivers/video/ipu_common.c	/^#define idma_mask(/;"	d	file:
idma_start	examples/standalone/mem_to_mem_idma2intr.c	/^idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype)$/;"	f	typeref:typename:void
idmac_tx_submit	drivers/video/mx3fb.c	/^static int idmac_tx_submit(enum ipu_channel channel, void *buf)$/;"	f	typeref:typename:int	file:
idmirir	arch/powerpc/include/asm/immap_85xx.h	/^	u32	idmirir; \/* Inbound Doorbell Max Interrupt RIR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
idmirir	arch/powerpc/include/asm/immap_86xx.h	/^	uint	idmirir;	\/* 0xd3478 - Inbound Doorbell Max Interrupt Report Interval Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
idmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	idmr; \/* Inbound Doorbell Mode Register *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
idmr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	idmr;		\/* 0xd3460 - Inbound Doorbell Mode Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
idprom	arch/sparc/cpu/leon2/prom.c	/^	struct idprom idprom;$/;"	m	struct:leon_prom_info	typeref:struct:idprom	file:
idprom	arch/sparc/cpu/leon3/prom.c	/^	struct idprom idprom;$/;"	m	struct:leon_prom_info	typeref:struct:idprom	file:
idprom	arch/sparc/include/asm/prom.h	/^struct idprom {$/;"	s
idqdpar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	idqdpar; \/* Inbound Descriptor Queue DPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
idqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	idqepar; \/* Inbound Doorbell Queue EPAR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
idqhpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	idqhpar;	\/* 0xd3474 - Inbound Doorbell Queue Head Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
idqtpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	idqtpar;	\/* 0xd306c - Inbound Descriptor Queue Tail Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
idr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	idr;	\/* Interrupt Disable Register WO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 idr;$/;"	m	struct:at91_emac	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	idr; 	\/* 0x18 SDRAMC Interrupt Disable Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	idr;		\/* 0x44 Interrupt Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	idr;		\/* 0x64 Interrupt Disable Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		idr;		\/* 0x18 Interrupt Disable Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	idr;$/;"	m	struct:at91_st	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		idr;	\/* 0x28 Interrupt Disable Register *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	idr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
idr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 idr;		\/* 0x24 PIO Interrupt Disable Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
idr	arch/m68k/include/asm/immap_5445x.h	/^	u32 idr;		\/* 0x00 Device Id \/ Vendor Id Register *\/$/;"	m	struct:pci	typeref:typename:u32
idr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 idr;		\/* 0x00 Device Id \/ Vendor Id *\/$/;"	m	struct:pci	typeref:typename:u32
idr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 idr;		\/* 0x68 Inbound doorbell register *\/$/;"	m	struct:dma83xx	typeref:typename:u32
idr	drivers/block/dwc_ahsata.c	/^	u32 idr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
idr	drivers/block/sata_dwc.c	/^	u32 idr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
idr	drivers/gpio/stm32_gpio.c	/^	u32 idr;	\/* GPIO port input data *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
idr	drivers/i2c/at91_i2c.h	/^	u32 idr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
idr	drivers/mtd/mtdcore.c	/^struct idr {$/;"	s	file:
idr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 idr;		\/* 0x20 PMECC Interrupt Disable Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
idr	drivers/net/zynq_gem.c	/^	u32 idr; \/* 0x2c - Interrupt Disable reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
idr	drivers/serial/atmel_usart.h	/^	u32	idr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
idr	drivers/spi/zynq_qspi.c	/^	u32 idr;	\/* 0x0C *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
idr	drivers/spi/zynq_spi.c	/^	u32 idr;	\/* 0x0C *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
idr	include/atmel_mci.h	/^	u32	idr;	\/* 0x48 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
idr	include/mpc5xxx.h	/^	volatile u8  idr[0x8];          \/* 0x00 *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u8[0x8]
idr_alloc	drivers/mtd/mtdcore.c	/^int idr_alloc(struct idr *idp, void *ptr, int start, int end, gfp_t gfp_mask)$/;"	f	typeref:typename:int
idr_find	drivers/mtd/mtdcore.c	/^void *idr_find(struct idr *idp, int id)$/;"	f	typeref:typename:void *
idr_get_next	drivers/mtd/mtdcore.c	/^void *idr_get_next(struct idr *idp, int *next)$/;"	f	typeref:typename:void *
idr_layer	drivers/mtd/mtdcore.c	/^struct idr_layer {$/;"	s	file:
idr_remove	drivers/mtd/mtdcore.c	/^void idr_remove(struct idr *idp, int id)$/;"	f	typeref:typename:void
ids	board/nvidia/nyan-big/nyan-big.c	/^	static enum periph_id ids[] = {$/;"	g	function:enable_required_clocks	file:
idset	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	idset[2];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[2]
idsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	idsr;	 \/* Inbound Doorbell Status Register *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
idsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	idsr;		\/* 0xd3464 - Inbound Doorbell Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
idst	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 idst;		\/* 0x88 internal DMA status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
idst	arch/arm/include/asm/arch/mmc.h	/^	u32 idst;		\/* 0x88 internal DMA status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
idt	arch/x86/cpu/interrupts.c	/^struct idt_entry idt[256] __aligned(16);$/;"	v	typeref:struct:idt_entry[256]__aligned (16)
idt_conf_100_156_25	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_100_156_25[11][2] = { {0x04, 0x19}, {0x06, 0x03},$/;"	v	typeref:typename:const u8[11][2]
idt_conf_122_88	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_122_88[23][2] = { {0x00, 0x3C}, {0x01, 0x00},$/;"	v	typeref:typename:const u8[23][2]
idt_conf_122_88_feedback	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_122_88_feedback[12][2] = { {0x00, 0x50}, {0x02, 0xD7},$/;"	v	typeref:typename:const u8[12][2]
idt_conf_125_156_25	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_125_156_25[11][2] = { {0x04, 0x19}, {0x06, 0x03},$/;"	v	typeref:typename:const u8[11][2]
idt_conf_156_25	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_156_25[11][2] = { {0x04, 0x19}, {0x06, 0x03},$/;"	v	typeref:typename:const u8[11][2]
idt_conf_156_25_100	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_156_25_100[11][2] = { {0x04, 0x19}, {0x06, 0x03},$/;"	v	typeref:typename:const u8[11][2]
idt_conf_156_25_125	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_156_25_125[11][2] = { {0x04, 0x19}, {0x06, 0x03},$/;"	v	typeref:typename:const u8[11][2]
idt_conf_not_122_88	board/freescale/common/idt8t49n222a_serdes_clk.h	/^static const u8 idt_conf_not_122_88[23][2] = { {0x00, 0x00}, {0x01, 0x00},$/;"	v	typeref:typename:const u8[23][2]
idt_entry	arch/x86/cpu/interrupts.c	/^struct idt_entry {$/;"	s	file:
idt_ptr	arch/x86/cpu/interrupts.c	/^struct desc_ptr idt_ptr;$/;"	v	typeref:struct:desc_ptr
idt_ptr	arch/x86/cpu/sipi_vector.S	/^idt_ptr:$/;"	l
idt_ptr	arch/x86/cpu/start16.S	/^idt_ptr:$/;"	l
idt_ptr	arch/x86/include/asm/sipi.h	/^	u32 idt_ptr;$/;"	m	struct:sipi_params	typeref:typename:u32
idver	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int idver;$/;"	m	struct:pwmss_regs	typeref:typename:unsigned int
idver	drivers/net/davinci_emac.h	/^	dv_reg		idver;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
idx	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^	int idx;$/;"	m	struct:__anon0f7aec2e0108	typeref:typename:int	file:
idx	drivers/mtd/nand/denali.h	/^	int idx;$/;"	m	struct:denali_nand_info	typeref:typename:int
idx	drivers/pci/pcie_layerscape.c	/^	int idx;$/;"	m	struct:ls_pcie	typeref:typename:int	file:
idx2binblock	common/dlmalloc.c	/^#define idx2binblock(/;"	d	file:
idx2vol_id	drivers/mtd/ubi/ubi.h	/^static inline int idx2vol_id(const struct ubi_device *ubi, int idx)$/;"	f	typeref:typename:int
idx_gc	fs/ubifs/ubifs.h	/^	struct list_head idx_gc;$/;"	m	struct:ubifs_info	typeref:struct:list_head
idx_gc_cnt	fs/ubifs/ubifs.h	/^	int idx_gc_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
idx_growth	fs/ubifs/ubifs.h	/^	int idx_growth;$/;"	m	struct:ubifs_budget_req	typeref:typename:int
idx_growth	fs/ubifs/ubifs.h	/^	long long idx_growth;$/;"	m	struct:ubifs_budg_info	typeref:typename:long long
idx_last	drivers/misc/pca9551_led.c	/^static int idx_last = -1;$/;"	v	typeref:typename:int	file:
idx_leb_size	fs/ubifs/ubifs.h	/^	int idx_leb_size;$/;"	m	struct:ubifs_info	typeref:typename:int
idx_lebs	fs/ubifs/ubifs-media.h	/^	__le32 idx_lebs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
idx_lebs	fs/ubifs/ubifs.h	/^	int idx_lebs;$/;"	m	struct:ubifs_lp_stats	typeref:typename:int
ie	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 ie[3];$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
ie	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short ie;              \/* 0x2C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
ie	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short ie;	\/* 0x04 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
ie	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short ie;		\/* 0x2C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
ie	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short ie;		\/* 0x2C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
ie	arch/arm/include/asm/omap_mmc.h	/^	unsigned int ie;		\/* 0x134 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
ie	drivers/block/dwc_ahsata.c	/^	u32 ie;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
ie	drivers/i2c/i2c-uniphier-f.c	/^	u32 ie;				\/* interrupt enable *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
ie	drivers/net/xilinx_axi_emac.c	/^	u32 ie; \/* 0x14: Interrupt enable *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
ie	drivers/net/xilinx_ll_temac.h	/^	u32 ie;		\/* Interrupt Enable *\/$/;"	m	struct:temac_reg	typeref:typename:u32
ie_addr	include/fsl_validate.h	/^	u32 ie_addr;$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u32
ie_flag	include/fsl_validate.h	/^		u8 ie_flag;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c0108	typeref:typename:u8
ie_flag	include/fsl_validate.h	/^	u32 ie_flag;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
ie_key_info	include/fsl_validate.h	/^struct ie_key_info {$/;"	s
ie_key_sel	include/fsl_validate.h	/^	u32 ie_key_sel;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
ie_key_table	include/fsl_validate.h	/^struct ie_key_table {$/;"	s
ie_key_tbl	include/fsl_validate.h	/^	struct ie_key_table ie_key_tbl[32];$/;"	m	struct:ie_key_info	typeref:struct:ie_key_table[32]
iecsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iecsr;	\/* Port Implementation Error CSR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
iecsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iecsr;	        \/* 0xd0130 - Port 0 Implementation Error Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
iedqdpar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iedqdpar; \/* Extended Inbound Doorbell Queue DPAR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
iedqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iedqepar; \/* Extended Inbound Doorbell Queue EPAR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
iedqhpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iedqhpar;	\/* 0xd3470 - Extended Inbound Doorbell Queue Head Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
iedqtpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iedqtpar;	\/* 0xd3468 - Extended Inbound Doorbell Queue Tail Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ieee5000_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	ieee5000_fck: ieee5000_fck {$/;"	l
ieee_r_align	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_align;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_align	drivers/net/fec_mxc.h	/^	uint32_t ieee_r_align;		\/* MBAR_ETH + 0x2D4 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_r_align	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_r_align;		\/* MBAR_ETH + 0x2D4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_r_crc	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_crc;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_crc	drivers/net/fec_mxc.h	/^	uint32_t ieee_r_crc;		\/* MBAR_ETH + 0x2D0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_r_crc	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_r_crc;		\/* MBAR_ETH + 0x2D0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_r_drop	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_drop;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_drop	drivers/net/fec_mxc.h	/^	uint32_t ieee_r_drop;		\/* MBAR_ETH + 0x2C8 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_r_drop	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_r_drop;		\/* MBAR_ETH + 0x2C8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_r_fdxfc	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_fdxfc;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_frame_ok	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_frame_ok;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_frame_ok	drivers/net/fec_mxc.h	/^	uint32_t ieee_r_frame_ok;	\/* MBAR_ETH + 0x2CC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_r_frame_ok	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_r_frame_ok;	\/* MBAR_ETH + 0x2CC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_r_macerr	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_macerr;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_octets_ok	arch/m68k/include/asm/fec.h	/^	u32 ieee_r_octets_ok;$/;"	m	struct:fec	typeref:typename:u32
ieee_r_octets_ok	drivers/net/fec_mxc.h	/^	uint32_t ieee_r_octets_ok;	\/* MBAR_ETH + 0x2E0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_r_octets_ok	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_r_octets_ok;	\/* MBAR_ETH + 0x2E0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_1col	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_1col;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_1col	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_1col;		\/* MBAR_ETH + 0x250 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_1col	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_1col;		\/* MBAR_ETH + 0x250 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_cserr	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_cserr;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_cserr	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_cserr;		\/* MBAR_ETH + 0x268 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_cserr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_cserr;		\/* MBAR_ETH + 0x268 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_def	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_def;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_def	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_def;		\/* MBAR_ETH + 0x258 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_def	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_def;		\/* MBAR_ETH + 0x258 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_drop	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_drop;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_drop	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_drop;		\/* MBAR_ETH + 0x248 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_drop	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_drop;		\/* MBAR_ETH + 0x248 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_excol	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_excol;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_excol	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_excol;		\/* MBAR_ETH + 0x260 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_excol	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_excol;		\/* MBAR_ETH + 0x260 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_fdxfc	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_fdxfc;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_frame_ok	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_frame_ok;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_frame_ok	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_frame_ok;	\/* MBAR_ETH + 0x24C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_frame_ok	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_frame_ok;	\/* MBAR_ETH + 0x24C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_lcol	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_lcol;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_lcol	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_lcol;		\/* MBAR_ETH + 0x25C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_lcol	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_lcol;		\/* MBAR_ETH + 0x25C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_macerr	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_macerr;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_macerr	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_macerr;		\/* MBAR_ETH + 0x264 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_macerr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_macerr;		\/* MBAR_ETH + 0x264 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_mcol	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_mcol;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_mcol	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_mcol;		\/* MBAR_ETH + 0x254 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_mcol	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_mcol;		\/* MBAR_ETH + 0x254 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_octets_ok	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_octets_ok;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_octets_ok	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_octets_ok;	\/* MBAR_ETH + 0x274 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_octets_ok	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_octets_ok;	\/* MBAR_ETH + 0x274 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ieee_t_sqe	arch/m68k/include/asm/fec.h	/^	u32 ieee_t_sqe;$/;"	m	struct:fec	typeref:typename:u32
ieee_t_sqe	drivers/net/fec_mxc.h	/^	uint32_t ieee_t_sqe;		\/* MBAR_ETH + 0x26C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ieee_t_sqe	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ieee_t_sqe;		\/* MBAR_ETH + 0x26C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
iem_control	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	iem_control;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
iem_control	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	iem_control;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
iem_control	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	iem_control;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
iem_control	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	iem_control;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
iem_control_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	iem_control_kfc;		\/* 0x10039120 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ien	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 ien;$/;"	m	struct:i2c_regs	typeref:typename:u32
ien	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 ien;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
ien	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic ien;  \/* 0xc0 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
iep	include/usb/fotg210.h	/^	uint32_t iep[8]; \/* 0x160 - 0x17f: IN Endpoint Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[8]
iep0cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 iep0cfg;$/;"	m	struct:usb	typeref:typename:u32
iep_deu0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 iep_deu0_clk_cfg;	\/* 0x188 IEP DEU0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_deu0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 iep_deu0_clk_cfg;	\/* 0x188 IEP DEU0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_deu1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 iep_deu1_clk_cfg;	\/* 0x18c IEP DEU1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_deu1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 iep_deu1_clk_cfg;	\/* 0x18c IEP DEU1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_drc0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 iep_drc0_clk_cfg;	\/* 0x180 IEP DRC0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_drc0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 iep_drc0_clk_cfg;	\/* 0x180 IEP DRC0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_drc1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 iep_drc1_clk_cfg;	\/* 0x184 IEP DRC1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iep_drc1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 iep_drc1_clk_cfg;	\/* 0x184 IEP DRC1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ieq	post/lib_powerpc/fpu/compare-fp-1.c	/^static void ieq (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
ier	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	ier;$/;"	m	union:pxa_uart_regs::__anon3c298eb7020a	typeref:typename:uint32_t
ier	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int ier; \/* Interrupt enable register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
ier	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	ier;	\/* Interrupt Enable Register WO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 ier;$/;"	m	struct:at91_emac	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	ier; 	\/* 0x14 SDRAMC Interrupt Enable Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ier;		\/* 0x40 Interrupt Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	ier;		\/* 0x60 Interrupt Enable Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		ier;		\/* 0x14 Interrupt Enable Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	ier;$/;"	m	struct:at91_st	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		ier;	\/* 0x24 Interrupt Enable Register *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	ier;$/;"	m	struct:sdramc_reg	typeref:typename:u32
ier	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 ier;		\/* 0x20 PIO Interrupt Enable Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
ier	arch/m68k/include/asm/coldfire/ata.h	/^	u8 ier;			\/* 0x2C *\/$/;"	m	struct:atac	typeref:typename:u8
ier	arch/m68k/include/asm/coldfire/eport.h	/^	u8 ier;		\/* 0x05 *\/$/;"	m	struct:eport	typeref:typename:u8
ier	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 ier;		\/* 0x3C Interrupt Enable Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
ier	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 ier;$/;"	m	struct:ssi	typeref:typename:u32
ier	arch/m68k/include/asm/rtc.h	/^	u32 ier;		\/* 0x18 Interrupt Enable Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
ier	arch/microblaze/include/asm/microblaze_intc.h	/^	int ier; \/* interrupt enable register *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
ier	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ier;		\/* interrupt event register *\/$/;"	m	struct:gpio83xx	typeref:typename:u32
ier	drivers/i2c/at91_i2c.h	/^	u32 ier;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
ier	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 ier;		\/* 0x1C PMECC Interrupt Enable Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
ier	drivers/mtd/nand/tegra_nand.h	/^	u32	ier;		\/* offset 0Ch *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
ier	drivers/net/ftgmac100.h	/^	unsigned int	ier;		\/* 0x04 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
ier	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 ier;	\/* Interrupt Enable Register (RW) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
ier	drivers/serial/atmel_usart.h	/^	u32	ier;$/;"	m	struct:atmel_usart3	typeref:typename:u32
ier	drivers/serial/serial_bcm283x_mu.c	/^	u32 ier;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
ier	drivers/serial/serial_uniphier.c	/^	u32 ier;		\/* Interrupt Enable Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
ier	drivers/spi/zynq_qspi.c	/^	u32 ier;	\/* 0x08 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
ier	drivers/spi/zynq_spi.c	/^	u32 ier;	\/* 0x08 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
ier	include/atmel_mci.h	/^	u32	ier;	\/* 0x44 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
ier_clear	arch/blackfin/include/asm/serial1.h	/^	u16 ier_clear;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
ier_set	arch/blackfin/include/asm/serial1.h	/^	u16 ier_set;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
ievent	arch/powerpc/include/asm/immap_512x.h	/^	u32	ievent;		\/* Interrupt event register *\/$/;"	m	struct:fec512x	typeref:typename:u32
ievent	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ievent;		\/* IRQ Event *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ievent	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ievent;		\/* 0x24010 - Interrupt Event Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
ievent	drivers/net/fec_mxc.h	/^	uint32_t ievent;		\/* MBAR_ETH + 0x004 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
ievent	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ievent;			\/* MBAR_ETH + 0x004 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ievent	include/fsl_dtsec.h	/^	u32	ievent;		\/* interrupt event *\/$/;"	m	struct:dtsec	typeref:typename:u32
ievent	include/fsl_memac.h	/^	u32	ievent;		\/* Interrupt event register *\/$/;"	m	struct:memac	typeref:typename:u32
ievent	include/fsl_tgec.h	/^	u32	ievent;		\/* Interrupt event register *\/$/;"	m	struct:tgec	typeref:typename:u32
ievent	include/tsec.h	/^	u32	ievent;		\/* Interrupt Event *\/$/;"	m	struct:tsec	typeref:typename:u32
if	include/linux/compiler.h	/^#define if(/;"	d
if_act_mask	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u8 if_act_mask;$/;"	m	struct:hws_topology_map	typeref:typename:u8
if_block	scripts/kconfig/zconf.y	/^if_block:$/;"	l
if_board_diff_clk	board/freescale/ls1043aqds/ls1043aqds.c	/^bool if_board_diff_clk(void)$/;"	f	typeref:typename:bool
if_board_diff_clk	board/freescale/ls1046aqds/ls1046aqds.c	/^bool if_board_diff_clk(void)$/;"	f	typeref:typename:bool
if_desc	include/usb.h	/^	struct usb_interface if_desc[USB_MAXINTERFACES];$/;"	m	struct:usb_config	typeref:struct:usb_interface[]
if_end	scripts/kconfig/zconf.y	/^if_end: end$/;"	l
if_entry	scripts/kconfig/zconf.y	/^if_entry: T_IF expr nl$/;"	l	typeref:typename:menu
if_expr	scripts/kconfig/zconf.y	/^if_expr:  \/* empty *\/			{ $$ = NULL; }$/;"	l	typeref:typename:expr
if_id	include/fsl-mc/fsl_dprc.h	/^	uint16_t	if_id;$/;"	m	struct:dprc_endpoint	typeref:typename:uint16_t
if_mode	include/fsl_memac.h	/^	u32 if_mode;		\/* interface mode control *\/$/;"	m	struct:memac	typeref:typename:u32
if_params	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^struct if_params {$/;"	s
if_status	include/fsl_memac.h	/^	u32 if_status;		\/* interface status *\/$/;"	m	struct:memac	typeref:typename:u32
if_stmt	scripts/kconfig/zconf.y	/^if_stmt: if_entry if_block if_end$/;"	l
if_type	include/blk.h	/^	enum if_type	if_type;	\/* type of the interface *\/$/;"	m	struct:blk_desc	typeref:enum:if_type
if_type	include/blk.h	/^	enum if_type if_type;$/;"	m	struct:blk_driver	typeref:enum:if_type
if_type	include/blk.h	/^enum if_type {$/;"	g
if_type	include/efi_api.h	/^	u8 if_type;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u8
if_type_to_uclass_id	drivers/block/blk-uclass.c	/^static enum uclass_id if_type_to_uclass_id(enum if_type if_type)$/;"	f	typeref:enum:uclass_id	file:
if_type_uclass_id	drivers/block/blk-uclass.c	/^static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {$/;"	g	file:
if_typename	include/blk.h	/^	const char *if_typename;$/;"	m	struct:blk_driver	typeref:typename:const char *
if_typename_str	drivers/block/blk-uclass.c	/^static const char *if_typename_str[IF_TYPE_COUNT] = {$/;"	v	typeref:typename:const char * []	file:
if_typename_to_iftype	drivers/block/blk-uclass.c	/^static enum if_type if_typename_to_iftype(const char *if_typename)$/;"	f	typeref:enum:if_type	file:
iface	include/altera.h	/^	enum altera_iface	iface;$/;"	m	struct:__anond5297d870108	typeref:enum:altera_iface
iface	include/lattice.h	/^	Lattice_iface	iface;	\/* interface type *\/$/;"	m	struct:__anon773a64540408	typeref:typename:Lattice_iface
iface	include/xilinx.h	/^	xilinx_iface iface;	\/* interface type *\/$/;"	m	struct:__anon15c234ca0308	typeref:typename:xilinx_iface
iface_ctrl	include/usb/ulpi.h	/^	u8	iface_ctrl;		\/* 0x07 Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
iface_ctrl_clear	include/usb/ulpi.h	/^	u8	iface_ctrl_clear;	\/* 0x09 Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
iface_ctrl_set	include/usb/ulpi.h	/^	u8	iface_ctrl_set;		\/* 0x08 Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
iface_fns	include/altera.h	/^	void			*iface_fns;$/;"	m	struct:__anond5297d870108	typeref:typename:void *
iface_fns	include/lattice.h	/^	void		*iface_fns; \/* interface function table *\/$/;"	m	struct:__anon773a64540408	typeref:typename:void *
iface_fns	include/xilinx.h	/^	void *iface_fns;	\/* interface function table *\/$/;"	m	struct:__anon15c234ca0308	typeref:typename:void *
ifc	arch/arm/dts/fsl-ls1043a.dtsi	/^		ifc: ifc@1530000 {$/;"	l
ifc	arch/arm/dts/fsl-ls1046a.dtsi	/^		ifc: ifc@1530000 {$/;"	l
ifc	arch/arm/dts/ls1021a.dtsi	/^		ifc: ifc@1530000 {$/;"	l
ifc_ccr	include/fsl_ifc.h	/^	u32 ifc_ccr;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
ifc_chip_sel	include/fsl_ifc.h	/^enum ifc_chip_sel {$/;"	g
ifc_csr	include/fsl_ifc.h	/^	u32 ifc_csr;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
ifc_ctrl	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct fsl_ifc_ctrl *ifc_ctrl;$/;"	v	typeref:struct:fsl_ifc_ctrl *	file:
ifc_ftims	include/fsl_ifc.h	/^enum ifc_ftims {$/;"	g
ifc_gcr	include/fsl_ifc.h	/^	u32 ifc_gcr;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
ifc_gpcm	include/fsl_ifc.h	/^	struct fsl_ifc_gpcm ifc_gpcm;$/;"	m	struct:fsl_ifc_runtime	typeref:struct:fsl_ifc_gpcm
ifc_in16	include/fsl_ifc.h	/^#define ifc_in16(/;"	d
ifc_in32	include/fsl_ifc.h	/^#define ifc_in32(/;"	d
ifc_nand	include/fsl_ifc.h	/^	struct fsl_ifc_nand ifc_nand;$/;"	m	struct:fsl_ifc_runtime	typeref:struct:fsl_ifc_nand
ifc_nand_fir_opcodes	include/fsl_ifc.h	/^enum ifc_nand_fir_opcodes {$/;"	g
ifc_nor	include/fsl_ifc.h	/^	struct fsl_ifc_nor ifc_nor;$/;"	m	struct:fsl_ifc_runtime	typeref:struct:fsl_ifc_nor
ifc_out16	include/fsl_ifc.h	/^#define ifc_out16(/;"	d
ifc_out32	include/fsl_ifc.h	/^#define ifc_out32(/;"	d
ifc_rev	include/fsl_ifc.h	/^	u32 ifc_rev;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
ifcclkdr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	ifcclkdr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
ifcr0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr0;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr1;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr10	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr10;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr11	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr11;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr12	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr12;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr13	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr13;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr14	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr14;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr15	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr15;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr2;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr3;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr4;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr5	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr5;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr6	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr6;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr7	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr7;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr8	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr8;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifcr9	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifcr9;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifctl	include/linux/immap_qe.h	/^	u32 ifctl;		\/* interface control reg               *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
ifctl	include/linux/immap_qe.h	/^	u32 ifctl;		\/* interface control reg               *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
ifctrl	arch/powerpc/include/asm/immap_86xx.h	/^	uint    ifctrl;		\/* 0x24538 - Interface Contrl Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
ifdr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ifdr;		\/* 0x24 Input Filter Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ifdtool-objs	tools/Makefile	/^ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o$/;"	m
ifer	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifer;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifer	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ifer;		\/* 0x20 Input Filter Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ifg	drivers/usb/eth/asix88179.c	/^	unsigned char ctrl, timer_l, timer_h, size, ifg;$/;"	m	struct:__anond17683530108	typeref:typename:unsigned char	file:
ifgp	drivers/net/xilinx_ll_temac.h	/^	u32 ifgp;	\/* Transmit Inter Frame Gap Adjustment *\/$/;"	m	struct:temac_reg	typeref:typename:u32
iflag	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 iflag;		\/* 0x24 Interrupt Flag *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
iflag	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 iflag;		\/* 0x30 Interrupt Flag *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
iflag	tools/imagetool.h	/^	int iflag;$/;"	m	struct:image_tool_params	typeref:typename:int
ifm_sensor_type	board/ifm/o2dnt2/o2dnt2.c	/^enum ifm_sensor_type {$/;"	g	file:
ifmi	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifmi;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifmr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ifmr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
ifname	lib/efi_loader/efi_disk.c	/^	const char *ifname;$/;"	m	struct:efi_disk_obj	typeref:typename:const char *	file:
ifnum	common/usb_storage.c	/^	unsigned char	ifnum;			\/* interface number *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
ifnum	include/usb_ether.h	/^	unsigned char	ifnum;		\/* interface number *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
iforce	include/grlib/irqmp.h	/^	volatile unsigned int iforce;$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int
ifpid	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	__le16 ifpid;$/;"	m	struct:ldpaa_fas	typeref:typename:__le16
ifqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ifqepar; \/* Inbound Frame Queue EPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
ifqhpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ifqhpar;	\/* 0xd3074 - Inbound Frame Queue Head Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ifr	drivers/serial/atmel_usart.h	/^	u32	ifr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
ifs	common/cli_hush.c	/^static uchar *ifs;$/;"	v	typeref:typename:uchar *	file:
ifscdr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ifscdr;		\/* 0x80 Input Filter SCLK Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ifscer	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ifscer;		\/* 0x84 Input Filter SCLK Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ifscsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ifscsr;		\/* 0x88 Input Filter SCLK Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ifsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ifsr;		\/* 0x28 Input Filter Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ifstat	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ifstat;		\/* Interface Status *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ifstat	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ifstat;		\/* 0x2453c - Interface Status Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
ifstat	include/fsl_dtsec.h	/^	u32	ifstat;		\/* Interface status *\/$/;"	m	struct:dtsec	typeref:typename:u32
ifstat	include/fsl_mdio.h	/^	u32 ifstat;		\/* Interface Status Register *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
ifstat	include/linux/immap_qe.h	/^	u32 ifstat;		\/* interface statux reg                *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
ifstat	include/linux/immap_qe.h	/^	u32 ifstat;		\/* interface statux reg                *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
ifstat	include/tsec.h	/^	u32	ifstat;		\/* Interface Status *\/$/;"	m	struct:tsec	typeref:typename:u32
iftype	drivers/block/blkcache.c	/^	int iftype;$/;"	m	struct:block_cache_node	typeref:typename:int	file:
igaddr	include/fsl_dtsec.h	/^	u32	igaddr[8];	\/* Individual group address *\/$/;"	m	struct:dtsec	typeref:typename:u32[8]
igd_cdclk_init_broadwell	drivers/video/broadwell_igd.c	/^static int igd_cdclk_init_broadwell(struct udevice *dev)$/;"	f	typeref:typename:int	file:
igd_cdclk_init_haswell	drivers/video/broadwell_igd.c	/^static int igd_cdclk_init_haswell(struct udevice *dev)$/;"	f	typeref:typename:int	file:
igd_dvmt50_pre_alloc	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t igd_dvmt50_pre_alloc;		\/* Offset 0x0043 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
igd_post_init	drivers/video/broadwell_igd.c	/^static int igd_post_init(struct udevice *dev, bool is_broadwell)$/;"	f	typeref:typename:int	file:
igd_pre_init	drivers/video/broadwell_igd.c	/^static int igd_pre_init(struct udevice *dev, bool is_broadwell)$/;"	f	typeref:typename:int	file:
igd_render_standby	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t igd_render_standby;		\/* Offset 0x004e *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
igd_setup_panel	drivers/video/broadwell_igd.c	/^static void igd_setup_panel(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ige	post/lib_powerpc/fpu/compare-fp-1.c	/^static void ige (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
igep_serial	board/isee/igep00x0/igep00x0.c	/^static const struct ns16550_platdata igep_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
iget_failed	fs/ubifs/super.c	/^void iget_failed(struct inode *inode)$/;"	f	typeref:typename:void
iget_locked	fs/ubifs/super.c	/^struct inode *iget_locked(struct super_block *sb, unsigned long ino)$/;"	f	typeref:struct:inode *
ignore_disconnect	drivers/usb/musb-new/musb_core.h	/^	unsigned ignore_disconnect:1;	\/* during bus resets *\/$/;"	m	struct:musb	typeref:typename:unsigned:1
ignore_missing_state_on_read	arch/sandbox/include/asm/state.h	/^	bool ignore_missing_state_on_read;	\/* No error if state missing *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
ignored	include/fat.h	/^	__u8	ignored[3];	\/* Bootstrap code *\/$/;"	m	struct:boot_sector	typeref:typename:__u8[3]
igr_no_sharing	include/vsc9953.h	/^	u32	igr_no_sharing;$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32
igt	post/lib_powerpc/fpu/compare-fp-1.c	/^static void igt (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
ih_ahbdmaaud_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_ahbdmaaud_stat0;		\/* 0x109 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_ahbdmaaud_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_ahbdmaaud_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_arch	include/image.h	/^	uint8_t		ih_arch;	\/* CPU architecture		*\/$/;"	m	struct:image_header	typeref:typename:uint8_t
ih_as_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_as_stat0;			\/* 0x103 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_as_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_as_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_category	include/image.h	/^enum ih_category {$/;"	g
ih_cec_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_cec_stat0;		\/* 0x106 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_cec_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_cec_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_comp	include/image.h	/^	uint8_t		ih_comp;	\/* Compression Type		*\/$/;"	m	struct:image_header	typeref:typename:uint8_t
ih_dcrc	include/image.h	/^	__be32		ih_dcrc;	\/* Image Data CRC Checksum	*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_entry_count	fs/reiserfs/reiserfs_private.h	/^		__u16 ih_entry_count;$/;"	m	union:item_head::__anona10af8d2030a	typeref:typename:__u16
ih_ep	include/image.h	/^	__be32		ih_ep;		\/* Entry Point Address		*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_fc_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_fc_stat0;			\/* 0x100 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_fc_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_fc_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_fc_stat1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_fc_stat1;			\/* 0x101 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_fc_stat1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_fc_stat1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_fc_stat2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_fc_stat2;			\/* 0x102 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_fc_stat2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_fc_stat2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_free_space	fs/reiserfs/reiserfs_private.h	/^		__u16 ih_free_space;$/;"	m	union:item_head::__anona10af8d2030a	typeref:typename:__u16
ih_hcrc	include/image.h	/^	__be32		ih_hcrc;	\/* Image Header CRC Checksum	*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_i2cm_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_i2cm_stat0;		\/* 0x105 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_i2cm_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_i2cm_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_i2cmphy_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_i2cmphy_stat0;		\/* 0x108 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_i2cmphy_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_i2cmphy_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_item_len	fs/reiserfs/reiserfs_private.h	/^	__u16 ih_item_len;	     \/* total size of the item body *\/$/;"	m	struct:item_head	typeref:typename:__u16
ih_item_location	fs/reiserfs/reiserfs_private.h	/^	__u16 ih_item_location;      \/* an offset to the item body$/;"	m	struct:item_head	typeref:typename:__u16
ih_key	fs/reiserfs/reiserfs_private.h	/^	struct key ih_key;$/;"	m	struct:item_head	typeref:struct:key
ih_load	include/image.h	/^	__be32		ih_load;	\/* Data	 Load  Address		*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_magic	board/nokia/rx51/lowlevel_init.S	/^ih_magic:		\/* IH_MAGIC in big endian from include\/image.h *\/$/;"	l
ih_magic	include/image.h	/^	__be32		ih_magic;	\/* Image Header Magic Number	*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_mute	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute;			\/* 0x1ff *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_ahbdmaaud_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_ahbdmaaud_stat0;	\/* 0x189 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_ahbdmaaud_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_ahbdmaaud_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_as_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_as_stat0;		\/* 0x183 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_as_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_as_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_cec_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_cec_stat0;		\/* 0x186 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_cec_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_cec_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_fc_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_fc_stat0;		\/* 0x180 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_fc_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_fc_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_fc_stat1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_fc_stat1;		\/* 0x181 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_fc_stat1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_fc_stat1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_fc_stat2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_fc_stat2;		\/* 0x182 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_fc_stat2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_fc_stat2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_i2cm_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_i2cm_stat0;		\/* 0x185 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_i2cm_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_i2cm_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_i2cmphy_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_i2cmphy_stat0;	\/* 0x188 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_i2cmphy_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_i2cmphy_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_phy_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_phy_stat0;		\/* 0x184 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_phy_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_phy_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_mute_vp_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_mute_vp_stat0;		\/* 0x187 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_mute_vp_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_mute_vp_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_name	include/image.h	/^	uint8_t		ih_name[IH_NMLEN];	\/* Image Name		*\/$/;"	m	struct:image_header	typeref:typename:uint8_t[]
ih_os	include/image.h	/^	uint8_t		ih_os;		\/* Operating System		*\/$/;"	m	struct:image_header	typeref:typename:uint8_t
ih_phy_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_phy_stat0;		\/* 0x104 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_phy_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_phy_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ih_size	include/image.h	/^	__be32		ih_size;	\/* Image Data Size		*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_time	include/image.h	/^	__be32		ih_time;	\/* Image Creation Timestamp	*\/$/;"	m	struct:image_header	typeref:typename:__be32
ih_type	include/image.h	/^	uint8_t		ih_type;	\/* Image Type			*\/$/;"	m	struct:image_header	typeref:typename:uint8_t
ih_version	fs/reiserfs/reiserfs_private.h	/^	__u16 ih_version;	     \/* 0 for all old items, 2 for new$/;"	m	struct:item_head	typeref:typename:__u16
ih_version	fs/reiserfs/reiserfs_private.h	/^#define ih_version(/;"	d
ih_vp_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 ih_vp_stat0;			\/* 0x107 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
ih_vp_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 ih_vp_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
ihdr	arch/sparc/lib/bootm.c	/^image_header_t ihdr;$/;"	v	typeref:typename:image_header_t
ihead_lnum	fs/ubifs/ubifs-media.h	/^	__le32 ihead_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
ihead_lnum	fs/ubifs/ubifs.h	/^	int ihead_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
ihead_offs	fs/ubifs/ubifs-media.h	/^	__le32 ihead_offs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
ihead_offs	fs/ubifs/ubifs.h	/^	int ihead_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
ihqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32 ihqepar; \/* Inbound message header queue EPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
ihs_fpga	board/gdsys/p1022/controlcenterd.c	/^struct ihs_fpga {$/;"	s	file:
ihs_fpga	include/gdsys_fpga.h	/^struct ihs_fpga {$/;"	s
ihs_fpga_channel	include/gdsys_fpga.h	/^struct ihs_fpga_channel {$/;"	s
ihs_fpga_hicb	include/gdsys_fpga.h	/^struct ihs_fpga_hicb {$/;"	s
ihs_gpio	include/gdsys_fpga.h	/^struct ihs_gpio {$/;"	s
ihs_i2c	include/gdsys_fpga.h	/^struct ihs_i2c {$/;"	s
ihs_i2c_access	drivers/i2c/ihs_i2c.c	/^static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
ihs_i2c_address	drivers/i2c/ihs_i2c.c	/^static int ihs_i2c_address(uchar chip, uint addr, int alen, bool hold_bus)$/;"	f	typeref:typename:int	file:
ihs_i2c_init	drivers/i2c/ihs_i2c.c	/^static void ihs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
ihs_i2c_probe	drivers/i2c/ihs_i2c.c	/^static int ihs_i2c_probe(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
ihs_i2c_read	drivers/i2c/ihs_i2c.c	/^static int ihs_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
ihs_i2c_set_bus_speed	drivers/i2c/ihs_i2c.c	/^static unsigned int ihs_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
ihs_i2c_transfer	drivers/i2c/ihs_i2c.c	/^static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,$/;"	f	typeref:typename:int	file:
ihs_i2c_write	drivers/i2c/ihs_i2c.c	/^static int ihs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
ihs_io_ep	include/gdsys_fpga.h	/^struct ihs_io_ep {$/;"	s
ihs_mdio	include/gdsys_fpga.h	/^struct ihs_mdio {$/;"	s
ihs_mdio_idle	board/gdsys/common/ihs_mdio.c	/^static int ihs_mdio_idle(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ihs_mdio_info	board/gdsys/common/ihs_mdio.h	/^struct ihs_mdio_info {$/;"	s
ihs_mdio_init	board/gdsys/common/ihs_mdio.c	/^int ihs_mdio_init(struct ihs_mdio_info *info)$/;"	f	typeref:typename:int
ihs_mdio_read	board/gdsys/common/ihs_mdio.c	/^static int ihs_mdio_read(struct mii_dev *bus, int addr, int dev_addr,$/;"	f	typeref:typename:int	file:
ihs_mdio_reset	board/gdsys/common/ihs_mdio.c	/^static int ihs_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ihs_mdio_write	board/gdsys/common/ihs_mdio.c	/^static int ihs_mdio_write(struct mii_dev *bus, int addr, int dev_addr,$/;"	f	typeref:typename:int	file:
ihs_osd	include/gdsys_fpga.h	/^struct ihs_osd {$/;"	s
iic	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct iic {$/;"	s
iic	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct iic {$/;"	s
iic	include/commproc.h	/^typedef struct iic {$/;"	s
iic1_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void iic1_selection_in_fpga(void)$/;"	f	typeref:typename:void
iic_mrblr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_mrblr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_mrblr	include/commproc.h	/^	ushort	iic_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbase	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbase	include/commproc.h	/^	ushort	iic_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_rbc;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_rbc;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbc	include/commproc.h	/^	ushort	iic_rbc;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_rbptr;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_rbptr;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rbptr	include/commproc.h	/^	ushort	iic_rbptr;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rdp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	iic_rdp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rdp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	iic_rdp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rdp	include/commproc.h	/^	uint	iic_rdp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_res	include/commproc.h	/^	uint	iic_res;	\/* reserved *\/$/;"	m	struct:iic	typeref:typename:uint
iic_res2	include/commproc.h	/^	ushort	iic_res2;	\/* reserved *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	iic_rfcr;	\/* Rx function code *\/$/;"	m	struct:iic	typeref:typename:u_char
iic_rfcr	arch/powerpc/include/asm/cpm_85xx.h	/^	u_char	iic_rfcr;	\/* Rx function code *\/$/;"	m	struct:iic	typeref:typename:u_char
iic_rfcr	include/commproc.h	/^	u_char	iic_rfcr;	\/* Rx function code *\/$/;"	m	struct:iic	typeref:typename:u_char
iic_rpbase	include/commproc.h	/^	ushort	iic_rpbase;	\/* Relocation pointer *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_rstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	iic_rstate;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	iic_rstate;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rstate	include/commproc.h	/^	uint	iic_rstate;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rxtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	iic_rxtmp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rxtmp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	iic_rxtmp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_rxtmp	include/commproc.h	/^	uint	iic_rxtmp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_t	arch/powerpc/include/asm/cpm_8260.h	/^} iic_t;$/;"	t	typeref:struct:iic
iic_t	arch/powerpc/include/asm/cpm_85xx.h	/^} iic_t;$/;"	t	typeref:struct:iic
iic_t	include/commproc.h	/^} iic_t;$/;"	t	typeref:struct:iic
iic_tbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbase	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbase	include/commproc.h	/^	ushort	iic_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_tbc;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_tbc;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbc	include/commproc.h	/^	ushort	iic_tbc;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	iic_tbptr;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	iic_tbptr;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tbptr	include/commproc.h	/^	ushort	iic_tbptr;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:ushort
iic_tdp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	iic_tdp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_tdp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	iic_tdp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_tdp	include/commproc.h	/^	uint	iic_tdp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_tfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	iic_tfcr;	\/* Tx function code *\/$/;"	m	struct:iic	typeref:typename:u_char
iic_tfcr	arch/powerpc/include/asm/cpm_85xx.h	/^	u_char	iic_tfcr;	\/* Tx function code *\/$/;"	m	struct:iic	typeref:typename:u_char
iic_tfcr	include/commproc.h	/^	u_char	iic_tfcr;	\/* Tx function code *\/$/;"	m	struct:iic	typeref:typename:u_char
iic_tstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	iic_tstate;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_tstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	iic_tstate;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_tstate	include/commproc.h	/^	uint	iic_tstate;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_txtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	iic_txtmp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_txtmp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	iic_txtmp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iic_txtmp	include/commproc.h	/^	uint	iic_txtmp;	\/* Internal *\/$/;"	m	struct:iic	typeref:typename:uint
iicadd	drivers/i2c/s3c24x0_i2c.h	/^	u32	iicadd;$/;"	m	struct:s3c24x0_i2c	typeref:typename:u32
iiccon	drivers/i2c/s3c24x0_i2c.h	/^	u32	iiccon;$/;"	m	struct:s3c24x0_i2c	typeref:typename:u32
iicds	drivers/i2c/s3c24x0_i2c.h	/^	u32	iicds;$/;"	m	struct:s3c24x0_i2c	typeref:typename:u32
iiclc	drivers/i2c/s3c24x0_i2c.h	/^	u32	iiclc;$/;"	m	struct:s3c24x0_i2c	typeref:typename:u32
iicstat	drivers/i2c/s3c24x0_i2c.h	/^	u32	iicstat;$/;"	m	struct:s3c24x0_i2c	typeref:typename:u32
iidr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr0;		\/* Internal IRQ Destination 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr0;		\/* 0x50210 - Internal Interrupt Destination Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr1;		\/* Internal IRQ Destination 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr1;		\/* 0x50230 - Internal Interrupt Destination Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr10;		\/* Internal IRQ Destination 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr10	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr10;		\/* 0x50350 - Internal Interrupt Destination Register 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr11;		\/* Internal IRQ Destination 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr11	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr11;		\/* 0x50370 - Internal Interrupt Destination Register 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr12;		\/* Internal IRQ Destination 12 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr12	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr12;		\/* 0x50390 - Internal Interrupt Destination Register 12 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr13;		\/* Internal IRQ Destination 13 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr13	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr13;		\/* 0x503b0 - Internal Interrupt Destination Register 13 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr14;		\/* Internal IRQ Destination 14 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr14	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr14;		\/* 0x503d0 - Internal Interrupt Destination Register 14 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr15;		\/* Internal IRQ Destination 15 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr15	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr15;		\/* 0x503f0 - Internal Interrupt Destination Register 15 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr16	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr16;		\/* Internal IRQ Destination 16 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr16	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr16;		\/* 0x50410 - Internal Interrupt Destination Register 16 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr17	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr17;		\/* Internal IRQ Destination 17 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr17	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr17;		\/* 0x50430 - Internal Interrupt Destination Register 17 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr18	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr18;		\/* Internal IRQ Destination 18 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr18	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr18;		\/* 0x50450 - Internal Interrupt Destination Register 18 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr19	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr19;		\/* Internal IRQ Destination 19 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr19	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr19;		\/* 0x50470 - Internal Interrupt Destination Register 19 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr2;		\/* Internal IRQ Destination 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr2;		\/* 0x50250 - Internal Interrupt Destination Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr20	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr20;		\/* Internal IRQ Destination 20 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr20	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr20;		\/* 0x50490 - Internal Interrupt Destination Register 20 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr21	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr21;		\/* Internal IRQ Destination 21 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr21	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr21;		\/* 0x504b0 - Internal Interrupt Destination Register 21 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr22	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr22;		\/* Internal IRQ Destination 22 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr22	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr22;		\/* 0x504d0 - Internal Interrupt Destination Register 22 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr23	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr23;		\/* Internal IRQ Destination 23 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr23	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr23;		\/* 0x504f0 - Internal Interrupt Destination Register 23 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr24	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr24;		\/* Internal IRQ Destination 24 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr24	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr24;		\/* 0x50510 - Internal Interrupt Destination Register 24 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr25	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr25;		\/* Internal IRQ Destination 25 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr25	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr25;		\/* 0x50530 - Internal Interrupt Destination Register 25 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr26	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr26;		\/* Internal IRQ Destination 26 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr26	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr26;		\/* 0x50550 - Internal Interrupt Destination Register 26 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr27	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr27;		\/* Internal IRQ Destination 27 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr27	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr27;		\/* 0x50570 - Internal Interrupt Destination Register 27 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr28	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr28;		\/* Internal IRQ Destination 28 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr28	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr28;		\/* 0x50590 - Internal Interrupt Destination Register 28 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr29	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr29;		\/* Internal IRQ Destination 29 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr29	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr29;		\/* 0x505b0 - Internal Interrupt Destination Register 29 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr3;		\/* Internal IRQ Destination 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr3;		\/* 0x50270 - Internal Interrupt Destination Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr30	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr30;		\/* Internal IRQ Destination 30 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr30	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr30;		\/* 0x505d0 - Internal Interrupt Destination Register 30 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr31	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr31;		\/* Internal IRQ Destination 31 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr31	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr31;		\/* 0x505f0 - Internal Interrupt Destination Register 31 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr4;		\/* Internal IRQ Destination 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr4;		\/* 0x50290 - Internal Interrupt Destination Register 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr5;		\/* Internal IRQ Destination 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr5;		\/* 0x502b0 - Internal Interrupt Destination Register 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr6;		\/* Internal IRQ Destination 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr6;		\/* 0x502d0 - Internal Interrupt Destination Register 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr7;		\/* Internal IRQ Destination 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr7;		\/* 0x502f0 - Internal Interrupt Destination Register 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr8;		\/* Internal IRQ Destination 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr8;		\/* 0x50310 - Internal Interrupt Destination Register 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iidr9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iidr9;		\/* Internal IRQ Destination 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iidr9	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iidr9;		\/* 0x50330 - Internal Interrupt Destination Register 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iim	arch/powerpc/include/asm/immap_512x.h	/^	iim512x_t		iim;		\/* IC Identification module *\/$/;"	m	struct:immap	typeref:typename:iim512x_t
iim512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct iim512x {$/;"	s
iim512x_t	arch/powerpc/include/asm/immap_512x.h	/^} iim512x_t;$/;"	t	typeref:struct:iim512x
iim_clrbits32	drivers/misc/fsl_iim.c	/^#define iim_clrbits32	/;"	d	file:
iim_clrsetbits32	drivers/misc/fsl_iim.c	/^#define iim_clrsetbits32	/;"	d	file:
iim_emask	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_emask;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_emask	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_emask;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_emask	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_emask;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_emask	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_emask;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_err	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_err;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_err	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_err;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_err	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_err;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_err	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_err;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_fctl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_fctl;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_fctl	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_fctl;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_fctl	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_fctl;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_fctl	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_fctl;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_la	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_la;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_la	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_la;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_la	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_la;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_la	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_la;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prev	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_prev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prev	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_prev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prev	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_prev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prev	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_prev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prg_p	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_prg_p;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prg_p	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_prg_p;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prg_p	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_prg_p;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_prg_p	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_prg_p;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_read32	drivers/misc/fsl_iim.c	/^#define iim_read32	/;"	d	file:
iim_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct iim_regs {$/;"	s
iim_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct iim_regs {$/;"	s
iim_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct iim_regs {$/;"	s
iim_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct iim_regs {$/;"	s
iim_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct iim_regs {$/;"	s
iim_scs0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_scs0;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_scs0;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_scs0;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_scs0;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_scs1;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_scs1;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_scs1;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_scs1;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_scs2;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_scs2;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_scs2;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_scs2;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_scs3;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_scs3;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_scs3;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_scs3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_scs3;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_sdat	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_sdat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_sdat	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_sdat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_sdat	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_sdat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_sdat	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_sdat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_setbits32	drivers/misc/fsl_iim.c	/^#define iim_setbits32	/;"	d	file:
iim_srev	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_srev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_srev	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_srev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_srev	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_srev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_srev	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_srev;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_stat	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_stat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_stat	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_stat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_stat	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_stat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_stat	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_stat;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_statm	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_statm;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_statm	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_statm;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_statm	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_statm;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_statm	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_statm;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_ua	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 iim_ua;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_ua	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 iim_ua;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_ua	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 iim_ua;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_ua	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 iim_ua;$/;"	m	struct:iim_regs	typeref:typename:u32
iim_write32	drivers/misc/fsl_iim.c	/^#define iim_write32	/;"	d	file:
iinten	include/mpc5xxx.h	/^	volatile u8 iinten;		\/* WU_GPIO + 0x14 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
iip	fs/ubifs/ubifs.h	/^	int iip;$/;"	m	struct:ubifs_cnode	typeref:typename:int
iip	fs/ubifs/ubifs.h	/^	int iip;$/;"	m	struct:ubifs_nnode	typeref:typename:int
iip	fs/ubifs/ubifs.h	/^	int iip;$/;"	m	struct:ubifs_pnode	typeref:typename:int
iip	fs/ubifs/ubifs.h	/^	int iip;$/;"	m	struct:ubifs_znode	typeref:typename:int
iir	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 iir;		\/* Interrupt ID Register	*\/$/;"	m	struct:hsuart_regs	typeref:typename:u32
iir	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	iir;$/;"	m	union:pxa_uart_regs::__anon3c298eb7030a	typeref:typename:uint32_t
iir	drivers/serial/serial_bcm283x_mu.c	/^	u32 iir;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
iir	drivers/serial/serial_uniphier.c	/^	u32 iir;		\/* In: Interrupt ID Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
iir	include/ns16550.h	/^#define iir /;"	d
iis_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 iis_clk_cfg;	\/* 0xb8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iis_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 iis_clk_cfg;	\/* 0xb8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
iiscon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	iiscon;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
iisfcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	iisfcon;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
iisfifo	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	iisfifo;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
iismod	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	iismod;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
iispsr	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	iispsr;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
iivpr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr0;		\/* Internal IRQ Vector\/Priority 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr0;		\/* 0x50200 - Internal Interrupt Vector\/Priority Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr1;		\/* Internal IRQ Vector\/Priority 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr1;		\/* 0x50220 - Internal Interrupt Vector\/Priority Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr10;	\/* Internal IRQ Vector\/Priority 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr10	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr10;	\/* 0x50340 - Internal Interrupt Vector\/Priority Register 10 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr11;	\/* Internal IRQ Vector\/Priority 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr11	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr11;	\/* 0x50360 - Internal Interrupt Vector\/Priority Register 11 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr12;	\/* Internal IRQ Vector\/Priority 12 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr12	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr12;	\/* 0x50380 - Internal Interrupt Vector\/Priority Register 12 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr13;	\/* Internal IRQ Vector\/Priority 13 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr13	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr13;	\/* 0x503a0 - Internal Interrupt Vector\/Priority Register 13 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr14;	\/* Internal IRQ Vector\/Priority 14 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr14	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr14;	\/* 0x503c0 - Internal Interrupt Vector\/Priority Register 14 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr15;	\/* Internal IRQ Vector\/Priority 15 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr15	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr15;	\/* 0x503e0 - Internal Interrupt Vector\/Priority Register 15 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr16	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr16;	\/* Internal IRQ Vector\/Priority 16 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr16	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr16;	\/* 0x50400 - Internal Interrupt Vector\/Priority Register 16 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr17	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr17;	\/* Internal IRQ Vector\/Priority 17 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr17	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr17;	\/* 0x50420 - Internal Interrupt Vector\/Priority Register 17 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr18	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr18;	\/* Internal IRQ Vector\/Priority 18 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr18	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr18;	\/* 0x50440 - Internal Interrupt Vector\/Priority Register 18 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr19	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr19;	\/* Internal IRQ Vector\/Priority 19 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr19	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr19;	\/* 0x50460 - Internal Interrupt Vector\/Priority Register 19 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr2;		\/* Internal IRQ Vector\/Priority 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr2;		\/* 0x50240 - Internal Interrupt Vector\/Priority Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr20	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr20;	\/* Internal IRQ Vector\/Priority 20 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr20	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr20;	\/* 0x50480 - Internal Interrupt Vector\/Priority Register 20 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr21	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr21;	\/* Internal IRQ Vector\/Priority 21 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr21	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr21;	\/* 0x504a0 - Internal Interrupt Vector\/Priority Register 21 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr22	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr22;	\/* Internal IRQ Vector\/Priority 22 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr22	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr22;	\/* 0x504c0 - Internal Interrupt Vector\/Priority Register 22 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr23	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr23;	\/* Internal IRQ Vector\/Priority 23 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr23	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr23;	\/* 0x504e0 - Internal Interrupt Vector\/Priority Register 23 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr24	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr24;	\/* Internal IRQ Vector\/Priority 24 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr24	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr24;	\/* 0x50500 - Internal Interrupt Vector\/Priority Register 24 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr25	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr25;	\/* Internal IRQ Vector\/Priority 25 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr25	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr25;	\/* 0x50520 - Internal Interrupt Vector\/Priority Register 25 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr26	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr26;	\/* Internal IRQ Vector\/Priority 26 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr26	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr26;	\/* 0x50540 - Internal Interrupt Vector\/Priority Register 26 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr27	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr27;	\/* Internal IRQ Vector\/Priority 27 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr27	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr27;	\/* 0x50560 - Internal Interrupt Vector\/Priority Register 27 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr28	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr28;	\/* Internal IRQ Vector\/Priority 28 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr28	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr28;	\/* 0x50580 - Internal Interrupt Vector\/Priority Register 28 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr29	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr29;	\/* Internal IRQ Vector\/Priority 29 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr29	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr29;	\/* 0x505a0 - Internal Interrupt Vector\/Priority Register 29 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr3;		\/* Internal IRQ Vector\/Priority 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr3;		\/* 0x50260 - Internal Interrupt Vector\/Priority Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr30	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr30;	\/* Internal IRQ Vector\/Priority 30 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr30	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr30;	\/* 0x505c0 - Internal Interrupt Vector\/Priority Register 30 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr31	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr31;	\/* Internal IRQ Vector\/Priority 31 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr31	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr31;	\/* 0x505e0 - Internal Interrupt Vector\/Priority Register 31 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr4;		\/* Internal IRQ Vector\/Priority 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr4;		\/* 0x50280 - Internal Interrupt Vector\/Priority Register 4 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr5;		\/* Internal IRQ Vector\/Priority 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr5;		\/* 0x502a0 - Internal Interrupt Vector\/Priority Register 5 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr6;		\/* Internal IRQ Vector\/Priority 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr6;		\/* 0x502c0 - Internal Interrupt Vector\/Priority Register 6 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr7;		\/* Internal IRQ Vector\/Priority 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr7;		\/* 0x502e0 - Internal Interrupt Vector\/Priority Register 7 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr8;		\/* Internal IRQ Vector\/Priority 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr8;		\/* 0x50300 - Internal Interrupt Vector\/Priority Register 8 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
iivpr9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iivpr9;		\/* Internal IRQ Vector\/Priority 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
iivpr9	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iivpr9;		\/* 0x50320 - Internal Interrupt Vector\/Priority Register 9 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ile	post/lib_powerpc/fpu/compare-fp-1.c	/^static void ile (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
ileb_buf	fs/ubifs/ubifs.h	/^	void *ileb_buf;$/;"	m	struct:ubifs_info	typeref:typename:void *
ileb_cnt	fs/ubifs/ubifs.h	/^	int ileb_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
ileb_len	fs/ubifs/ubifs.h	/^	int ileb_len;$/;"	m	struct:ubifs_info	typeref:typename:int
ileb_nxt	fs/ubifs/ubifs.h	/^	int ileb_nxt;$/;"	m	struct:ubifs_info	typeref:typename:int
ilebs	fs/ubifs/ubifs.h	/^	int *ilebs;$/;"	m	struct:ubifs_info	typeref:typename:int *
ilen	include/pci_rom.h	/^	uint16_t ilen;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
ilevel	include/grlib/irqmp.h	/^	volatile unsigned int ilevel;$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int
illegal_instruction	arch/openrisc/cpu/cpu.c	/^static volatile int illegal_instruction;$/;"	v	typeref:typename:volatile int	file:
illegal_instruction_handler	arch/openrisc/cpu/cpu.c	/^static void illegal_instruction_handler(void)$/;"	f	typeref:typename:void	file:
ilog2	include/linux/log2.h	/^#define ilog2(/;"	d
ilpr	drivers/serial/serial_pl01x_internal.h	/^	u32	ilpr;		\/* 0x20 IrDA low-power counter register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
ilr	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 ilr[3];$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
ilt	post/lib_powerpc/fpu/compare-fp-1.c	/^static void ilt (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
iltgt	post/lib_powerpc/fpu/compare-fp-1.c	/^static void iltgt (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
im	board/tqc/tqm834x/tqm834x.c	/^static volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;$/;"	v	typeref:typename:volatile immap_t *	file:
im	drivers/net/armada100_fec.h	/^	u32 im;				\/* Interrupt mask *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
im_brgc1	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc1;$/;"	m	struct:immap	typeref:typename:uint
im_brgc2	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc2;$/;"	m	struct:immap	typeref:typename:uint
im_brgc3	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc3;$/;"	m	struct:immap	typeref:typename:uint
im_brgc4	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc4;$/;"	m	struct:immap	typeref:typename:uint
im_brgc5	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc5;$/;"	m	struct:immap	typeref:typename:uint
im_brgc6	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc6;$/;"	m	struct:immap	typeref:typename:uint
im_brgc7	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc7;$/;"	m	struct:immap	typeref:typename:uint
im_brgc8	arch/powerpc/include/asm/immap_8260.h	/^	uint		im_brgc8;$/;"	m	struct:immap	typeref:typename:uint
im_clkrst	arch/powerpc/include/asm/5xx_immap.h	/^	car5xx_t	   im_clkrst;		\/* Clocks and Reset *\/$/;"	m	struct:immap	typeref:typename:car5xx_t
im_clkrst	arch/powerpc/include/asm/8xx_immap.h	/^	car8xx_t	im_clkrst;	\/* Clocks and reset *\/$/;"	m	struct:immap	typeref:typename:car8xx_t
im_clkrst	arch/powerpc/include/asm/immap_8260.h	/^	car8260_t	im_clkrst;	\/* Clocks and reset *\/$/;"	m	struct:immap	typeref:typename:car8260_t
im_clkrstk	arch/powerpc/include/asm/5xx_immap.h	/^	cark8xx_t          im_clkrstk;		\/* Clocks and Resert Keys *\/$/;"	m	struct:immap	typeref:typename:cark8xx_t
im_clkrstk	arch/powerpc/include/asm/8xx_immap.h	/^	cark8xx_t	im_clkrstk;	\/* Clocks and reset keys *\/$/;"	m	struct:immap	typeref:typename:cark8xx_t
im_cpic	arch/powerpc/include/asm/8xx_immap.h	/^	cpic8xx_t	im_cpic;	\/* CPM Interrupt Controller *\/$/;"	m	struct:immap	typeref:typename:cpic8xx_t
im_cpm	arch/powerpc/include/asm/8xx_immap.h	/^	cpm8xx_t	im_cpm;		\/* Communication processor *\/$/;"	m	struct:immap	typeref:typename:cpm8xx_t
im_cpm	arch/powerpc/include/asm/immap_8260.h	/^	cpm8260_t	im_cpm;		\/* Communication processor *\/$/;"	m	struct:immap	typeref:typename:cpm8260_t
im_cpm_brg1	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_brg1_t		im_cpm_brg1;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_brg1_t
im_cpm_brg2	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_brg2_t		im_cpm_brg2;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_brg2_t
im_cpm_cp	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_cp_t		im_cpm_cp;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_cp_t
im_cpm_fcc1	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_fcc1_t		im_cpm_fcc1;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_fcc1_t
im_cpm_fcc1_ext	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_fcc1_ext_t	im_cpm_fcc1_ext;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_fcc1_ext_t
im_cpm_fcc2	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_fcc2_t		im_cpm_fcc2;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_fcc2_t
im_cpm_fcc2_ext	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_fcc2_ext_t	im_cpm_fcc2_ext;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_fcc2_ext_t
im_cpm_fcc3	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_fcc3_t		im_cpm_fcc3;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_fcc3_t
im_cpm_fcc3_ext	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_fcc3_ext_t	im_cpm_fcc3_ext;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_fcc3_ext_t
im_cpm_i2c	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_i2c_t		im_cpm_i2c;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_i2c_t
im_cpm_intctl	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_intctl_t	im_cpm_intctl; \/* IRQ Controller *\/$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_intctl_t
im_cpm_iop	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_iop_t		im_cpm_iop; \/* IO Port control\/status *\/$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_iop_t
im_cpm_iram	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_iram_t		im_cpm_iram;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_iram_t
im_cpm_mux	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_mux_t		im_cpm_mux;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_mux_t
im_cpm_scc	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_scc_t		im_cpm_scc[4];$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_scc_t[4]
im_cpm_sdma	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_sdma_t		im_cpm_sdma; \/* SDMA control\/status *\/$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_sdma_t
im_cpm_siu	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_siu_t		im_cpm_siu; \/* SIU Configuration *\/$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_siu_t
im_cpm_spi	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_spi_t		im_cpm_spi;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_spi_t
im_cpm_timer	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_timer_t	im_cpm_timer; \/* CPM timers *\/$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_timer_t
im_cpm_tmp1	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_tmp1_t		im_cpm_tmp1;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_tmp1_t
im_cpm_tmp2	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_tmp2_t		im_cpm_tmp2;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_tmp2_t
im_cpm_tmp3	arch/powerpc/include/asm/immap_85xx.h	/^	ccsr_cpm_tmp3_t		im_cpm_tmp3;$/;"	m	struct:ccsr_cpm	typeref:typename:ccsr_cpm_tmp3_t
im_cpmtimer	arch/powerpc/include/asm/8xx_immap.h	/^	cpmtimer8xx_t	im_cpmtimer;	\/* CPM timers *\/$/;"	m	struct:immap	typeref:typename:cpmtimer8xx_t
im_cpmtimer	arch/powerpc/include/asm/immap_8260.h	/^	cpmtimer8260_t	im_cpmtimer;	\/* CPM timers *\/$/;"	m	struct:immap	typeref:typename:cpmtimer8260_t
im_cpmux	arch/powerpc/include/asm/immap_8260.h	/^	cpmux_t		im_cpmux;	\/* CPM clock route mux *\/$/;"	m	struct:immap	typeref:typename:cpmux_t
im_ddr1	arch/powerpc/include/asm/immap_86xx.h	/^	struct ccsr_ddr		im_ddr1;$/;"	m	struct:immap	typeref:struct:ccsr_ddr
im_ddr2	arch/powerpc/include/asm/immap_86xx.h	/^	struct ccsr_ddr		im_ddr2;$/;"	m	struct:immap	typeref:struct:ccsr_ddr
im_dma	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_dma_t		im_dma;$/;"	m	struct:immap	typeref:typename:ccsr_dma_t
im_dpram1	arch/powerpc/include/asm/immap_8260.h	/^			u_char		im_dpram1[16 * 1024];$/;"	m	struct:immap::__anondc7ba4bd010a::__anondc7ba4bd0208	typeref:typename:u_char[]
im_dpram1	arch/powerpc/include/asm/immap_85xx.h	/^	u8			im_dpram1[16*1024];$/;"	m	struct:ccsr_cpm	typeref:typename:u8[]
im_dpram2	arch/powerpc/include/asm/immap_8260.h	/^			u_char		im_dpram2[4 * 1024];$/;"	m	struct:immap::__anondc7ba4bd010a::__anondc7ba4bd0208	typeref:typename:u_char[]
im_dpram2	arch/powerpc/include/asm/immap_85xx.h	/^	u8			im_dpram2[16*1024];$/;"	m	struct:ccsr_cpm	typeref:typename:u8[]
im_dpram3	arch/powerpc/include/asm/immap_8260.h	/^			u_char		im_dpram3[4 * 1024];$/;"	m	struct:immap::__anondc7ba4bd010a::__anondc7ba4bd0208	typeref:typename:u_char[]
im_dprambase	arch/powerpc/include/asm/immap_8260.h	/^		u8	im_dprambase[64 * 1024];$/;"	m	union:immap::__anondc7ba4bd010a	typeref:typename:u8[]
im_dprambase	arch/powerpc/include/asm/immap_85xx.h	/^#define im_dprambase	/;"	d
im_dprambase16	arch/powerpc/include/asm/immap_8260.h	/^		u16	im_dprambase16[32 * 1024];$/;"	m	union:immap::__anondc7ba4bd010a	typeref:typename:u16[]
im_dprc	arch/powerpc/include/asm/5xx_immap.h	/^	dprc5xx_t	   im_dprc;		\/* Dpram Control Register *\/$/;"	m	struct:immap	typeref:typename:dprc5xx_t
im_duart	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_duart_t		im_duart;$/;"	m	struct:immap	typeref:typename:ccsr_duart_t
im_fcc	arch/powerpc/include/asm/immap_8260.h	/^	fcc_t		im_fcc[3];	\/* Three FCCs *\/$/;"	m	struct:immap	typeref:typename:fcc_t[3]
im_fcc_c	arch/powerpc/include/asm/immap_8260.h	/^	fcc_c_t		im_fcc_c[3];	\/* Continued FCCs *\/$/;"	m	struct:immap	typeref:typename:fcc_c_t[3]
im_fla	arch/powerpc/include/asm/5xx_immap.h	/^	fl5xx_t	           im_fla;	        \/* Flash Module A *\/$/;"	m	struct:immap	typeref:typename:fl5xx_t
im_flb	arch/powerpc/include/asm/5xx_immap.h	/^	fl5xx_t	           im_flb;	        \/* Flash Module B *\/$/;"	m	struct:immap	typeref:typename:fl5xx_t
im_gur	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_gur_t		im_gur;$/;"	m	struct:immap	typeref:typename:ccsr_gur_t
im_ht	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_ht_t               im_ht;$/;"	m	struct:immap	typeref:typename:ccsr_ht_t
im_i2c	arch/powerpc/include/asm/8xx_immap.h	/^	i2c8xx_t	im_i2c;		\/* I2C control\/status *\/$/;"	m	struct:immap	typeref:typename:i2c8xx_t
im_i2c	arch/powerpc/include/asm/immap_8260.h	/^	i2c8260_t	im_i2c;		\/* I2C control\/status *\/$/;"	m	struct:immap	typeref:typename:i2c8260_t
im_i2c	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_i2c_t		im_i2c;$/;"	m	struct:immap	typeref:typename:ccsr_i2c_t
im_intctl	arch/powerpc/include/asm/immap_8260.h	/^	intctl8260_t	im_intctl;	\/* Interrupt Controller *\/$/;"	m	struct:immap	typeref:typename:intctl8260_t
im_ioport	arch/powerpc/include/asm/8xx_immap.h	/^	iop8xx_t	im_ioport;	\/* IO Port control\/status *\/$/;"	m	struct:immap	typeref:typename:iop8xx_t
im_ioport	arch/powerpc/include/asm/immap_8260.h	/^	iop8260_t	im_ioport;	\/* IO Port control\/status *\/$/;"	m	struct:immap	typeref:typename:iop8260_t
im_lbc	arch/powerpc/include/asm/immap_83xx.h	/^	fsl_lbc_t		im_lbc;		\/* Local Bus Controller Regs *\/$/;"	m	struct:immap	typeref:typename:fsl_lbc_t
im_lbc	arch/powerpc/include/asm/immap_86xx.h	/^	fsl_lbc_t		im_lbc;$/;"	m	struct:immap	typeref:typename:fsl_lbc_t
im_lcd	arch/powerpc/include/asm/8xx_immap.h	/^	lcd823_t	im_lcd;		\/* LCD (823 only) *\/$/;"	m	struct:immap	typeref:typename:lcd823_t
im_local_mcm	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_local_mcm_t	im_local_mcm;$/;"	m	struct:immap	typeref:typename:ccsr_local_mcm_t
im_mcc1	arch/powerpc/include/asm/immap_8260.h	/^	mcc_t		im_mcc1;	\/* First MCC *\/$/;"	m	struct:immap	typeref:typename:mcc_t
im_mcc2	arch/powerpc/include/asm/immap_8260.h	/^	mcc_t		im_mcc2;	\/* Second MCC *\/$/;"	m	struct:immap	typeref:typename:mcc_t
im_memctl	arch/powerpc/include/asm/5xx_immap.h	/^	memctl5xx_t	   im_memctl;		\/* Memory Controller *\/$/;"	m	struct:immap	typeref:typename:memctl5xx_t
im_memctl	arch/powerpc/include/asm/8xx_immap.h	/^	memctl8xx_t	im_memctl;	\/* Memory Controller *\/$/;"	m	struct:immap	typeref:typename:memctl8xx_t
im_memctl	arch/powerpc/include/asm/immap_8260.h	/^	memctl8260_t	im_memctl;	\/* Memory Controller *\/$/;"	m	struct:immap	typeref:typename:memctl8260_t
im_mios	arch/powerpc/include/asm/5xx_immap.h	/^	mios5xx_t	   im_mios;		\/* MIOS *\/$/;"	m	struct:immap	typeref:typename:mios5xx_t
im_pci	arch/powerpc/include/asm/immap_8260.h	/^	pci8260_t	im_pci;		\/* PCI Configuration *\/$/;"	m	struct:immap	typeref:typename:pci8260_t
im_pcmcia	arch/powerpc/include/asm/8xx_immap.h	/^	pcmconf8xx_t	im_pcmcia;	\/* PCMCIA Configuration *\/$/;"	m	struct:immap	typeref:typename:pcmconf8xx_t
im_pex1	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_pex_t		im_pex1;$/;"	m	struct:immap	typeref:typename:ccsr_pex_t
im_pex2	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_pex_t		im_pex2;$/;"	m	struct:immap	typeref:typename:ccsr_pex_t
im_pic	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_pic_t		im_pic;$/;"	m	struct:immap	typeref:typename:ccsr_pic_t
im_qadca	arch/powerpc/include/asm/5xx_immap.h	/^	qadc5xx_t	   im_qadca;		\/* QADC A *\/$/;"	m	struct:immap	typeref:typename:qadc5xx_t
im_qadcb	arch/powerpc/include/asm/5xx_immap.h	/^	qadc5xx_t	   im_qadcb;		\/* QADC B *\/$/;"	m	struct:immap	typeref:typename:qadc5xx_t
im_qsmcm	arch/powerpc/include/asm/5xx_immap.h	/^	qsmcm5xx_t	   im_qsmcm;		\/* SCI and SPI *\/$/;"	m	struct:immap	typeref:typename:qsmcm5xx_t
im_rio	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_rio_t		im_rio;$/;"	m	struct:immap	typeref:typename:ccsr_rio_t
im_scc	arch/powerpc/include/asm/immap_8260.h	/^	scc_t		im_scc[4];	\/* Four SCCs *\/$/;"	m	struct:immap	typeref:typename:scc_t[4]
im_sdma	arch/powerpc/include/asm/8xx_immap.h	/^	sdma8xx_t	im_sdma;	\/* SDMA control\/status *\/$/;"	m	struct:immap	typeref:typename:sdma8xx_t
im_sdma	arch/powerpc/include/asm/immap_8260.h	/^	sdma8260_t	im_sdma;	\/* SDMA control\/status *\/$/;"	m	struct:immap	typeref:typename:sdma8260_t
im_si1rxram	arch/powerpc/include/asm/immap_8260.h	/^	ushort		im_si1rxram[256];$/;"	m	struct:immap	typeref:typename:ushort[256]
im_si1txram	arch/powerpc/include/asm/immap_8260.h	/^	ushort		im_si1txram[256];$/;"	m	struct:immap	typeref:typename:ushort[256]
im_si2rxram	arch/powerpc/include/asm/immap_8260.h	/^	ushort		im_si2rxram[256];$/;"	m	struct:immap	typeref:typename:ushort[256]
im_si2txram	arch/powerpc/include/asm/immap_8260.h	/^	ushort		im_si2txram[256];$/;"	m	struct:immap	typeref:typename:ushort[256]
im_siramctl1	arch/powerpc/include/asm/immap_8260.h	/^	siramctl_t	im_siramctl1;	\/* First SI RAM Control *\/$/;"	m	struct:immap	typeref:typename:siramctl_t
im_siramctl2	arch/powerpc/include/asm/immap_8260.h	/^	siramctl_t	im_siramctl2;	\/* Second SI RAM Control *\/$/;"	m	struct:immap	typeref:typename:siramctl_t
im_sit	arch/powerpc/include/asm/5xx_immap.h	/^	sit5xx_t           im_sit;		\/* System Integration Timers *\/$/;"	m	struct:immap	typeref:typename:sit5xx_t
im_sit	arch/powerpc/include/asm/8xx_immap.h	/^	sit8xx_t	im_sit;		\/* System integration timers *\/$/;"	m	struct:immap	typeref:typename:sit8xx_t
im_sit	arch/powerpc/include/asm/immap_8260.h	/^	sit8260_t	im_sit;		\/* System Integration Timers *\/$/;"	m	struct:immap	typeref:typename:sit8260_t
im_sitk	arch/powerpc/include/asm/5xx_immap.h	/^	sitk5xx_t          im_sitk;		\/* System Integration Timer Keys*\/$/;"	m	struct:immap	typeref:typename:sitk5xx_t
im_sitk	arch/powerpc/include/asm/8xx_immap.h	/^	sitk8xx_t	im_sitk;	\/* Sys int timer keys *\/$/;"	m	struct:immap	typeref:typename:sitk8xx_t
im_siu_conf	arch/powerpc/include/asm/5xx_immap.h	/^	sysconf5xx_t       im_siu_conf;		\/* SIU Configuration *\/$/;"	m	struct:immap	typeref:typename:sysconf5xx_t
im_siu_conf	arch/powerpc/include/asm/8xx_immap.h	/^	sysconf8xx_t	im_siu_conf;	\/* SIU Configuration *\/$/;"	m	struct:immap	typeref:typename:sysconf8xx_t
im_siu_conf	arch/powerpc/include/asm/immap_8260.h	/^	sysconf8260_t	im_siu_conf;	\/* SIU Configuration *\/$/;"	m	struct:immap	typeref:typename:sysconf8260_t
im_smc	arch/powerpc/include/asm/immap_8260.h	/^	smc_t		im_smc[2];	\/* Couple of SMCs *\/$/;"	m	struct:immap	typeref:typename:smc_t[2]
im_spi	arch/powerpc/include/asm/immap_8260.h	/^	im_spi_t	im_spi;		\/* A SPI *\/$/;"	m	struct:immap	typeref:typename:im_spi_t
im_spi	arch/powerpc/include/asm/immap_8260.h	/^typedef struct im_spi {$/;"	s
im_spi_t	arch/powerpc/include/asm/immap_8260.h	/^} im_spi_t;$/;"	t	typeref:struct:im_spi
im_tcana	arch/powerpc/include/asm/5xx_immap.h	/^	tcan5xx_t          im_tcana;		\/* Toucan A *\/$/;"	m	struct:immap	typeref:typename:tcan5xx_t
im_tcanb	arch/powerpc/include/asm/5xx_immap.h	/^	tcan5xx_t          im_tcanb;		\/* Toucan B *\/$/;"	m	struct:immap	typeref:typename:tcan5xx_t
im_tclayer	arch/powerpc/include/asm/immap_8260.h	/^	tclayer_t	im_tclayer[8];	\/* Eight TCLayers *\/$/;"	m	struct:immap	typeref:typename:tclayer_t[8]
im_tpua	arch/powerpc/include/asm/5xx_immap.h	/^	tpu5xx_t	   im_tpua;		\/* Time Proessing Unit A *\/$/;"	m	struct:immap	typeref:typename:tpu5xx_t
im_tpub	arch/powerpc/include/asm/5xx_immap.h	/^	tpu5xx_t	   im_tpub;		\/* Time Processing Unit B *\/$/;"	m	struct:immap	typeref:typename:tpu5xx_t
im_tsec1	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_tsec_t		im_tsec1;$/;"	m	struct:immap	typeref:typename:ccsr_tsec_t
im_tsec2	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_tsec_t		im_tsec2;$/;"	m	struct:immap	typeref:typename:ccsr_tsec_t
im_tsec3	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_tsec_t             im_tsec3;$/;"	m	struct:immap	typeref:typename:ccsr_tsec_t
im_tsec4	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_tsec_t             im_tsec4;$/;"	m	struct:immap	typeref:typename:ccsr_tsec_t
im_uimb	arch/powerpc/include/asm/5xx_immap.h	/^	uimb5xx_t          im_uimb;	        \/* UIMB *\/$/;"	m	struct:immap	typeref:typename:uimb5xx_t
im_vid	arch/powerpc/include/asm/8xx_immap.h	/^	vid823_t	im_vid;		\/* Video (823 only) *\/$/;"	m	struct:immap	typeref:typename:vid823_t
im_wdt	arch/powerpc/include/asm/immap_86xx.h	/^	ccsr_wdt_t		im_wdt;$/;"	m	struct:immap	typeref:typename:ccsr_wdt_t
image	include/linux/fb.h	/^	struct fb_image	image;	\/* Cursor image *\/$/;"	m	struct:fb_cursor	typeref:struct:fb_image
image	include/linux/fb.h	/^	struct fb_image_user image;	\/* Cursor image *\/$/;"	m	struct:fb_cursor_user	typeref:struct:fb_image_user
image	tools/env/fw_env.c	/^	void			*image;$/;"	m	struct:environment	typeref:typename:void *	file:
image39	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image39">$/;"	i
image40	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image40">$/;"	i
image41	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image41">$/;"	i
image42	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image42">$/;"	i
image43	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image43">$/;"	i
image44	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image44">$/;"	i
image45	scripts/kconfig/gconf.glade	/^			<widget class="GtkImage" id="image45">$/;"	i
image_attributes	tools/zynqmpimage.c	/^	uint32_t image_attributes; \/* 0x44 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
image_base	arch/x86/cpu/efi/elf_ia32_efi.lds	/^	image_base = .;$/;"	s
image_base	arch/x86/cpu/efi/elf_x86_64_efi.lds	/^	image_base = .;$/;"	s
image_base	include/efi_api.h	/^	void *image_base;$/;"	m	struct:efi_loaded_image	typeref:typename:void *
image_blocks	tools/mxsimage.h	/^	uint32_t	image_blocks;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint32_t
image_boot_mode_id	tools/kwbimage.c	/^int image_boot_mode_id(const char *boot_mode_name)$/;"	f	typeref:typename:int
image_boot_mode_name	tools/kwbimage.c	/^static const char *image_boot_mode_name(unsigned int id)$/;"	f	typeref:typename:const char *	file:
image_cfg	tools/kwbimage.c	/^static struct image_cfg_element *image_cfg;$/;"	v	typeref:struct:image_cfg_element *	file:
image_cfg_element	tools/kwbimage.c	/^struct image_cfg_element {$/;"	s	file:
image_check_arch	include/image.h	/^static inline int image_check_arch(const image_header_t *hdr, uint8_t arch)$/;"	f	typeref:typename:int
image_check_dcrc	common/image.c	/^int image_check_dcrc(const image_header_t *hdr)$/;"	f	typeref:typename:int
image_check_hcrc	common/image.c	/^int image_check_hcrc(const image_header_t *hdr)$/;"	f	typeref:typename:int
image_check_image_types	tools/default_image.c	/^static int image_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
image_check_magic	include/image.h	/^static inline int image_check_magic(const image_header_t *hdr)$/;"	f	typeref:typename:int
image_check_os	include/image.h	/^static inline int image_check_os(const image_header_t *hdr, uint8_t os)$/;"	f	typeref:typename:int
image_check_params	tools/default_image.c	/^static int image_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
image_check_target_arch	include/image.h	/^static inline int image_check_target_arch(const image_header_t *hdr)$/;"	f	typeref:typename:int
image_check_type	include/image.h	/^static inline int image_check_type(const image_header_t *hdr, uint8_t type)$/;"	f	typeref:typename:int
image_checksum	include/sparse_format.h	/^  __le32	image_checksum; \/* CRC32 checksum of the original data, counting "don't care" *\/$/;"	m	struct:sparse_header	typeref:typename:__le32
image_checksum32	tools/kwbimage.c	/^static uint32_t image_checksum32(void *start, uint32_t len)$/;"	f	typeref:typename:uint32_t	file:
image_checksum8	tools/kwbimage.c	/^static uint8_t image_checksum8(void *start, uint32_t len)$/;"	f	typeref:typename:uint8_t	file:
image_code_type	include/efi_api.h	/^	unsigned int image_code_type;$/;"	m	struct:efi_loaded_image	typeref:typename:unsigned int
image_count_options	tools/kwbimage.c	/^image_count_options(unsigned int optiontype)$/;"	f	typeref:typename:unsigned int	file:
image_create_config_parse	tools/kwbimage.c	/^static int image_create_config_parse(FILE *fcfg)$/;"	f	typeref:typename:int	file:
image_create_config_parse_oneline	tools/kwbimage.c	/^static int image_create_config_parse_oneline(char *line,$/;"	f	typeref:typename:int	file:
image_create_v0	tools/kwbimage.c	/^static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,$/;"	f	typeref:typename:void *	file:
image_create_v1	tools/kwbimage.c	/^static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,$/;"	f	typeref:typename:void *	file:
image_data_type	include/efi.h	/^	unsigned int image_data_type;$/;"	m	struct:efi_priv	typeref:typename:unsigned int
image_data_type	include/efi_api.h	/^	unsigned int image_data_type;$/;"	m	struct:efi_loaded_image	typeref:typename:unsigned int
image_entry_arg_t	arch/arm/lib/spl.c	/^	typedef void (*image_entry_arg_t)(int, int, void *)$/;"	t	function:jump_to_image_linux	typeref:typename:void (*)(int,int,void *)	file:
image_entry_arg_t	arch/microblaze/cpu/spl.c	/^	typedef void (*image_entry_arg_t)(char *, ulong, ulong)$/;"	t	function:jump_to_image_linux	typeref:typename:void (*)(char *,ulong,ulong)	file:
image_entry_arg_t	arch/powerpc/lib/spl.c	/^	typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5, ulong r6,$/;"	t	function:jump_to_image_linux	typeref:typename:void (*)(void *,ulong r4,ulong r5,ulong r6,ulong r7,ulong r8,ulong r9)	file:
image_entry_noargs_t	arch/arm/cpu/armv7/omap-common/boot-common.c	/^	typedef void __noreturn (*image_entry_noargs_t)(u32 *);$/;"	t	function:jump_to_image_no_args	typeref:typename:void __noreturn (*)(u32 *)	file:
image_entry_noargs_t	board/freescale/common/fsl_chain_of_trust.c	/^	typedef void __noreturn (*image_entry_noargs_t)(void);$/;"	t	function:jump_to_image_no_args	typeref:typename:void __noreturn (*)(void)	file:
image_entry_noargs_t	common/spl/spl.c	/^	typedef void __noreturn (*image_entry_noargs_t)(void);$/;"	t	function:jump_to_image_no_args	typeref:typename:void __noreturn (*)(void)	file:
image_extract_subimage	tools/default_image.c	/^static int image_extract_subimage(void *ptr, struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
image_find_option	tools/kwbimage.c	/^image_find_option(unsigned int optiontype)$/;"	f	typeref:struct:image_cfg_element *	file:
image_free	tools/easylogo/easylogo.c	/^void image_free (image_t * image)$/;"	f	typeref:typename:void
image_get_data	include/image.h	/^static inline ulong image_get_data(const image_header_t *hdr)$/;"	f	typeref:typename:ulong
image_get_data_size	include/image.h	/^static inline uint32_t image_get_data_size(const image_header_t *hdr)$/;"	f	typeref:typename:uint32_t
image_get_fdt	common/image-fdt.c	/^static const image_header_t *image_get_fdt(ulong fdt_addr)$/;"	f	typeref:typename:const image_header_t *	file:
image_get_hdr_b	include/image.h	/^#define image_get_hdr_b(/;"	d
image_get_hdr_l	include/image.h	/^#define image_get_hdr_l(/;"	d
image_get_hdr_l	include/image.h	/^image_get_hdr_l(hcrc)		\/* image_get_hcrc *\/$/;"	f	typeref:typename:magic
image_get_header_size	include/image.h	/^static inline uint32_t image_get_header_size(void)$/;"	f	typeref:typename:uint32_t
image_get_host_blob	common/image-sig.c	/^void *image_get_host_blob(void)$/;"	f	typeref:typename:void *
image_get_image_end	include/image.h	/^static inline ulong image_get_image_end(const image_header_t *hdr)$/;"	f	typeref:typename:ulong
image_get_image_size	include/image.h	/^static inline uint32_t image_get_image_size(const image_header_t *hdr)$/;"	f	typeref:typename:uint32_t
image_get_kernel	common/bootm.c	/^static image_header_t *image_get_kernel(ulong img_addr, int verify)$/;"	f	typeref:typename:image_header_t *	file:
image_get_ramdisk	common/image.c	/^static const image_header_t *image_get_ramdisk(ulong rd_addr, uint8_t arch,$/;"	f	typeref:typename:const image_header_t *	file:
image_get_sig_algo	common/image-sig.c	/^struct image_sig_algo *image_get_sig_algo(const char *name)$/;"	f	typeref:struct:image_sig_algo *
image_get_version	tools/kwbimage.c	/^static int image_get_version(void)$/;"	f	typeref:typename:int	file:
image_header	include/image.h	/^typedef struct image_header {$/;"	s
image_header_t	include/image.h	/^} image_header_t;$/;"	t	typeref:struct:image_header
image_headersz_v1	tools/kwbimage.c	/^static size_t image_headersz_v1(struct image_tool_params *params,$/;"	f	typeref:typename:size_t	file:
image_identifier	tools/zynqimage.c	/^	uint32_t image_identifier; \/* 0x24 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
image_identifier	tools/zynqmpimage.c	/^	uint32_t image_identifier; \/* 0x24 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
image_info	cmd/bootm.c	/^static int image_info(ulong addr)$/;"	f	typeref:typename:int	file:
image_info	include/image.h	/^typedef struct image_info {$/;"	s
image_info_t	include/image.h	/^} image_info_t;$/;"	t	typeref:struct:image_info
image_key	tools/mxsimage.c	/^	uint8_t				image_key[16];$/;"	m	struct:sb_image_ctx	typeref:typename:uint8_t[16]	file:
image_len	include/image.h	/^	ulong		image_start, image_len; \/* start of image within blob, len of image *\/$/;"	m	struct:image_info	typeref:typename:ulong
image_len2	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^image_len2:             .long 0x0$/;"	l
image_len2	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^image_len2:             .long 0x0$/;"	l
image_load	tools/zynqimage.c	/^	uint32_t image_load; \/* 0x3c *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
image_load	tools/zynqmpimage.c	/^	uint32_t image_load; \/* 0x2c *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
image_load_tga	tools/easylogo/easylogo.c	/^int image_load_tga (image_t * image, char *filename)$/;"	f	typeref:typename:int
image_multi_count	common/image.c	/^ulong image_multi_count(const image_header_t *hdr)$/;"	f	typeref:typename:ulong
image_multi_getimg	common/image.c	/^void image_multi_getimg(const image_header_t *hdr, ulong idx,$/;"	f	typeref:typename:void
image_nand_ecc_mode_id	tools/kwbimage.c	/^int image_nand_ecc_mode_id(const char *nand_ecc_mode_name)$/;"	f	typeref:typename:int
image_offset	tools/zynqimage.c	/^	uint32_t image_offset; \/* 0x30 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
image_offset	tools/zynqmpimage.c	/^	uint32_t image_offset; \/* 0x30 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
image_print_contents	common/image.c	/^void image_print_contents(const void *ptr)$/;"	f	typeref:typename:void
image_print_type	common/image.c	/^static void image_print_type(const image_header_t *hdr)$/;"	f	typeref:typename:void	file:
image_read	common/spl/spl_ymodem.c	/^	int image_read;$/;"	m	struct:ymodem_fit_info	typeref:typename:int	file:
image_region	include/image.h	/^struct image_region {$/;"	s
image_rgb888_to_rgb565	tools/easylogo/easylogo.c	/^int image_rgb888_to_rgb565(image_t *rgb888_image, image_t *rgb565_image)$/;"	f	typeref:typename:int
image_rgb_to_yuyv	tools/easylogo/easylogo.c	/^int image_rgb_to_yuyv (image_t * rgb_image, image_t * yuyv_image)$/;"	f	typeref:typename:int
image_save_header	tools/easylogo/easylogo.c	/^int image_save_header (image_t * image, char *filename, char *varname)$/;"	f	typeref:typename:int
image_seq	drivers/mtd/ubi/ubi-media.h	/^	__be32  image_seq;$/;"	m	struct:ubi_ec_hdr	typeref:typename:__be32
image_seq	drivers/mtd/ubi/ubi.h	/^	int image_seq;$/;"	m	struct:ubi_device	typeref:typename:int
image_set_hdr_b	include/image.h	/^#define image_set_hdr_b(/;"	d
image_set_hdr_l	include/image.h	/^#define image_set_hdr_l(/;"	d
image_set_hdr_l	include/image.h	/^image_set_hdr_l(hcrc)		\/* image_set_hcrc *\/$/;"	f	typeref:typename:magic
image_set_header	tools/default_image.c	/^static void image_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
image_set_host_blob	common/image-sig.c	/^void image_set_host_blob(void *blob)$/;"	f	typeref:typename:void
image_setup_libfdt	common/image-fdt.c	/^int image_setup_libfdt(bootm_headers_t *images, void *blob,$/;"	f	typeref:typename:int
image_setup_linux	common/image.c	/^int image_setup_linux(bootm_headers_t *images)$/;"	f	typeref:typename:int
image_sig_algo	include/image.h	/^struct image_sig_algo {$/;"	s
image_sig_algos	common/image-sig.c	/^struct image_sig_algo image_sig_algos[] = {$/;"	v	typeref:struct:image_sig_algo[]
image_sign_info	include/image.h	/^struct image_sign_info {$/;"	s
image_size	cmd/booti.c	/^	uint64_t	image_size;	\/* Effective Image size, LE *\/$/;"	m	struct:Image_header	typeref:typename:uint64_t	file:
image_size	include/bmp_layout.h	/^	__u32	image_size;$/;"	m	struct:bmp_header	typeref:typename:__u32
image_size	include/efi_api.h	/^	aligned_u64 image_size;$/;"	m	struct:efi_loaded_image	typeref:typename:aligned_u64
image_size	tools/zynqimage.c	/^	uint32_t image_size; \/* 0x34 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
image_size	tools/zynqmpimage.c	/^	uint32_t image_size; \/* 0x3c *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
image_start	include/image.h	/^	ulong		image_start, image_len; \/* start of image within blob, len of image *\/$/;"	m	struct:image_info	typeref:typename:ulong
image_stored_size	tools/zynqimage.c	/^	uint32_t image_stored_size; \/* 0x40 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
image_stored_size	tools/zynqmpimage.c	/^	uint32_t image_stored_size; \/* 0x40 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
image_t	tools/easylogo/easylogo.c	/^} image_t;$/;"	t	typeref:struct:__anonbf0fd82b0508	file:
image_tool_params	tools/imagetool.h	/^struct image_tool_params {$/;"	s
image_type_params	tools/imagetool.h	/^struct image_type_params {$/;"	s
image_verify_header	tools/default_image.c	/^static int image_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
image_version	tools/kwbimage.h	/^static inline unsigned int image_version(void *header)$/;"	f	typeref:typename:unsigned int
image_version_file	tools/kwbimage.c	/^static int image_version_file(const char *input)$/;"	f	typeref:typename:int	file:
imagefile	tools/imagetool.h	/^	char *imagefile;$/;"	m	struct:image_tool_params	typeref:typename:char *
imagefile	tools/mxsimage.c	/^char *imagefile;$/;"	v	typeref:typename:char *
imagename	tools/imagetool.h	/^	char *imagename;$/;"	m	struct:image_tool_params	typeref:typename:char *
imagename	tools/rkcommon.c	/^	const char *imagename;$/;"	m	struct:spl_info	typeref:typename:const char *	file:
imagename2	tools/imagetool.h	/^	char *imagename2;$/;"	m	struct:image_tool_params	typeref:typename:char *
images	common/bootm.c	/^bootm_headers_t images;		\/* pointers to os\/initrd\/fdt images *\/$/;"	v	typeref:typename:bootm_headers_t
imagesize	board/nokia/rx51/lowlevel_init.S	/^imagesize:		\/* maximal size of image *\/$/;"	l
imagetool_get_filesize	tools/imagetool.c	/^int imagetool_get_filesize(struct image_tool_params *params, const char *fname)$/;"	f	typeref:typename:int
imagetool_get_source_date	tools/imagetool.c	/^time_t imagetool_get_source_date($/;"	f	typeref:typename:time_t
imagetool_get_type	tools/imagetool.c	/^struct image_type_params *imagetool_get_type(int type)$/;"	f	typeref:struct:image_type_params *
imagetool_save_subimage	tools/imagetool.c	/^int imagetool_save_subimage($/;"	f	typeref:typename:int
imagetool_verify_print_header	tools/imagetool.c	/^int imagetool_verify_print_header($/;"	f	typeref:typename:int
imask	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 imask;		\/* 0x30 interrupt mask *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
imask	arch/arm/include/asm/arch/mmc.h	/^	u32 imask;		\/* 0x30 interrupt mask *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
imask	arch/powerpc/include/asm/immap_512x.h	/^	u32	imask;		\/* Interrupt mask register *\/$/;"	m	struct:fec512x	typeref:typename:u32
imask	arch/powerpc/include/asm/immap_85xx.h	/^	u32	imask;		\/* IRQ Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
imask	arch/powerpc/include/asm/immap_86xx.h	/^	uint	imask;		\/* 0x24014 - Interrupt Mask Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
imask	drivers/net/fec_mxc.h	/^	uint32_t imask;			\/* MBAR_ETH + 0x008 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
imask	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 imask;			\/* MBAR_ETH + 0x008 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
imask	include/fsl_dtsec.h	/^	u32	imask;		\/* interrupt mask *\/$/;"	m	struct:dtsec	typeref:typename:u32
imask	include/fsl_memac.h	/^	u32	imask;		\/* interrupt mask register *\/$/;"	m	struct:memac	typeref:typename:u32
imask	include/fsl_tgec.h	/^	u32	imask;		\/* Interrupt mask register *\/$/;"	m	struct:tgec	typeref:typename:u32
imask	include/tsec.h	/^	u32	imask;		\/* Interrupt Mask *\/$/;"	m	struct:tsec	typeref:typename:u32
imaxdiv_t	include/inttypes.h	/^} imaxdiv_t;$/;"	t	typeref:struct:__anon62f7df8e0108
imaxdiv_t	include/inttypes.h	/^} imaxdiv_t;$/;"	t	typeref:struct:__anon62f7df8e0208
imcr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	imcr;		\/* 0xCC *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
imei	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	imei[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
img_addr_ptr	include/fsl_validate.h	/^	uintptr_t *img_addr_ptr;	\/* ESBC Image Location *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:uintptr_t *
img_attr	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	img_attr;		\/* image attribute *\/$/;"	m	struct:fsp_header	typeref:typename:u32
img_base	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	img_base;		\/* image base *\/$/;"	m	struct:fsp_header	typeref:typename:u32
img_encoded_hash	include/fsl_validate.h	/^	u8 img_encoded_hash[KEY_SIZE_BYTES];	\/* EM wrt RSA PKCSv1.5  *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u8[]
img_encoded_hash_second	include/fsl_validate.h	/^	u8 img_encoded_hash_second[KEY_SIZE_BYTES];\/* EM' wrt RSA PKCSv1.5 *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u8[]
img_id	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	char	img_id[8];		\/* signature string *\/$/;"	m	struct:fsp_header	typeref:typename:char[8]
img_key	include/fsl_validate.h	/^	u8 img_key[2 * KEY_SIZE_BYTES];	\/* ESBC client key *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u8[]
img_key_hash	include/fsl_validate.h	/^	u8 img_key_hash[32];	\/* ESBC client key hash *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u8[32]
img_rev	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint32_t img_rev;			\/* Offset 0x0008 *\/$/;"	m	struct:vpd_region	typeref:typename:uint32_t
img_rev	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u32	img_rev;		\/* Offset 0x0008 *\/$/;"	m	struct:vpd_region	typeref:typename:u32
img_rev	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	img_rev;		\/* image rev *\/$/;"	m	struct:fsp_header	typeref:typename:u32
img_sign	include/fsl_validate.h	/^	u8 img_sign[KEY_SIZE_BYTES];		\/* ESBC client signature *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u8[]
img_size	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	img_size;		\/* image size *\/$/;"	m	struct:fsp_header	typeref:typename:u32
img_size	drivers/crypto/fsl/desc.h	/^	uint32_t img_size;		\/* Length of Message *\/$/;"	m	struct:pdb_mp_sign	typeref:typename:uint32_t
img_size	drivers/crypto/fsl/desc.h	/^	uint32_t img_size;	\/* Length of Message *\/$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:uint32_t
img_size	drivers/crypto/fsl/desc.h	/^	uint32_t img_size;	\/* Length of Message *\/$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:uint32_t
img_size	include/fsl_validate.h	/^		u32 img_size;	\/* ESBC client image size in bytes *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c060a	typeref:typename:u32
img_size	include/fsl_validate.h	/^	u32 img_size;		\/* ESBC client image size in bytes *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
img_size	include/fsl_validate.h	/^	uint32_t img_size;	\/* ESBC Image Size *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:uint32_t
img_start	include/fsl_validate.h	/^	u32 img_start;		\/* ESBC client entry point *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
imgextract_help_text	cmd/ximg.c	/^static char imgextract_help_text[] =$/;"	v	typeref:typename:char[]	file:
imimr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 imimr;		\/* 0x84 Inbound message interrupt mask register *\/$/;"	m	struct:dma83xx	typeref:typename:u32
imirir	arch/powerpc/include/asm/immap_85xx.h	/^	u32	imirir; \/* Inbound Maximum Interrutp RIR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
imirir	arch/powerpc/include/asm/immap_86xx.h	/^	uint	imirir;	        \/* 0xd3078 - Inbound Maximum Interrutp Report Interval Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
imisr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 imisr;		\/* 0x80 Inbound message interrupt status register *\/$/;"	m	struct:dma83xx	typeref:typename:u32
immap	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct immap {$/;"	s
immap	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct immap {$/;"	s
immap	arch/powerpc/include/asm/immap_512x.h	/^typedef struct immap {$/;"	s
immap	arch/powerpc/include/asm/immap_8260.h	/^typedef struct immap {$/;"	s
immap	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct immap {$/;"	s
immap	arch/powerpc/include/asm/immap_86xx.h	/^typedef struct immap {$/;"	s
immap	examples/standalone/mem_to_mem_idma2intr.c	/^volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;$/;"	v	typeref:typename:volatile immap_t *
immap_t	arch/powerpc/include/asm/5xx_immap.h	/^} immap_t;$/;"	t	typeref:struct:immap
immap_t	arch/powerpc/include/asm/8xx_immap.h	/^} immap_t;$/;"	t	typeref:struct:immap
immap_t	arch/powerpc/include/asm/immap_512x.h	/^} immap_t;$/;"	t	typeref:struct:immap
immap_t	arch/powerpc/include/asm/immap_8260.h	/^} immap_t;$/;"	t	typeref:struct:immap
immap_t	arch/powerpc/include/asm/immap_83xx.h	/^} immap_t;$/;"	t	typeref:struct:immap
immap_t	arch/powerpc/include/asm/immap_86xx.h	/^} immap_t;$/;"	t	typeref:struct:immap
immed_ot	arch/powerpc/include/asm/fsl_pamu.h	/^		} immed_ot;$/;"	m	union:paace::__anon6139da31040a	typeref:struct:paace::__anon6139da31040a::__anon6139da310508
immr	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile immap_t *immr = 0;$/;"	v	typeref:typename:volatile immap_t *	file:
immrbar	arch/powerpc/include/asm/immap_512x.h	/^	u32 immrbar;		\/* Internal memory map base address register *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
immrbar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 immrbar;		\/* Internal memory map base address register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
impedance	arch/arm/mach-exynos/clock_init.h	/^	unsigned impedance;		\/* drive strength impedeance *\/$/;"	m	struct:mem_timings	typeref:typename:unsigned
impedance_calibration_sequence	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static const struct ddrphy_init_sequence impedance_calibration_sequence[] = {$/;"	v	typeref:typename:const struct ddrphy_init_sequence[]	file:
impl	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_implement	impl;$/;"	m	struct:ccsr_rio	typeref:struct:rio_implement
impl_attr	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t impl_attr;			\/* See PAACE_IA_* *\/$/;"	m	struct:paace	typeref:typename:uint32_t
impr_err	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 impr_err;			\/* Imprecise Error *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
impr_err	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 impr_err;			\/* Imprecise Error *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
imr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 imr;		\/* 0x098 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
imr	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 imr;$/;"	m	struct:gpio_regs	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	imr;	\/* Interrupt Mask Register RO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 imr;$/;"	m	struct:at91_emac	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	imr; 	\/* 0x1C SDRAMC Interrupt Mask Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	imr;		\/* 0x48 Interrupt Mask Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	imr;		\/* 0x6C Interrupt Mask Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		imr;		\/* 0x1C Interrupt Mask Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	imr;$/;"	m	struct:at91_st	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		imr;	\/* 0x2C Interrupt Mask Register *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	imr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
imr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 imr;		\/* 0x28 PIO Interrupt Mask Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
imr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	imr;		\/* 0xC4 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
imr	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 imr;		\/* 0x14 Interrupt Mask *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
imr	arch/m68k/include/asm/immap_5307.h	/^	u32 imr;$/;"	m	struct:intctrl	typeref:typename:u32
imr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 imr;		\/* 0x24c *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
imr	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	imr;$/;"	m	union:psc512x::__anond569131d040a	typeref:typename:volatile u16
imr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 imr;		\/* interrupt mask register *\/$/;"	m	struct:gpio83xx	typeref:typename:u32
imr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	imr;	 \/* Outbound Mode Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
imr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	imr;		\/* 0xd3060 - Outbound Mode Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
imr	drivers/i2c/at91_i2c.h	/^	u32 imr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
imr	drivers/mtd/altera_qspi.c	/^	u32	imr;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
imr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 imr;		\/* 0x24 PMECC Interrupt Mask Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
imr	drivers/net/ftmac100.h	/^	unsigned int	imr;		\/* 0x04 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
imr	drivers/net/ftmac110.c	/^	uint32_t imr;$/;"	m	struct:ftmac110_chip	typeref:typename:uint32_t	file:
imr	drivers/net/ftmac110.h	/^	uint32_t imr;    \/* 0x04: Interrupt Mask Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
imr	drivers/serial/atmel_usart.h	/^	u32	imr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
imr	drivers/spi/rk_spi.h	/^	u32 imr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
imr	drivers/spi/zynq_qspi.c	/^	u32 imr;	\/* 0x10 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
imr	drivers/spi/zynq_spi.c	/^	u32 imr;	\/* 0x10 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
imr	include/atmel_mci.h	/^	u32	imr;	\/* 0x4c *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
imr	include/mpc5xxx.h	/^		volatile u16	imr;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b040a	typeref:typename:volatile u16
imr	include/usb/fotg210.h	/^	uint32_t imr;	\/* 0xC4: Global Interrupt Mask Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
imr0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 imr0;		\/* 0x50 Inbound message register 0 *\/$/;"	m	struct:dma83xx	typeref:typename:u32
imr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	imr1;$/;"	m	struct:gpc	typeref:typename:u32
imr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 imr1;		\/* 0x54 Inbound message register 1 *\/$/;"	m	struct:dma83xx	typeref:typename:u32
imr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	imr2;$/;"	m	struct:gpc	typeref:typename:u32
imr3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	imr3;$/;"	m	struct:gpc	typeref:typename:u32
imr4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	imr4;$/;"	m	struct:gpc	typeref:typename:u32
imrh0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 imrh0;		\/* 0x08 Mask High *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32
imrh1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 imrh1;		\/* 0x08 Mask High *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32
imrl0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 imrl0;		\/* 0x0C Mask Low *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32
imrl1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 imrl1;		\/* 0x0C Mask Low *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32
imsc	drivers/spi/lpc32xx_ssp.c	/^	u32 imsc;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
imsk	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 imsk;		\/* 0x22 Interrupt Mask *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
imsk	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 imsk;		\/* 0x28 Interrupt Mask *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
imsr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	imsr;		\/* 0xC8 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
imul_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^void imul_byte(u8 s)$/;"	f	typeref:typename:void
imul_long	drivers/bios_emulator/x86emu/prim_ops.c	/^void imul_long(u32 s)$/;"	f	typeref:typename:void
imul_long_direct	drivers/bios_emulator/x86emu/prim_ops.c	/^void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)$/;"	f	typeref:typename:void
imul_word	drivers/bios_emulator/x86emu/prim_ops.c	/^void imul_word(u16 s)$/;"	f	typeref:typename:void
imx6_clock_gating	board/freescale/mx6ullevk/plugin.S	/^.macro imx6_clock_gating$/;"	m
imx6_ddr_setting	board/freescale/mx6ullevk/plugin.S	/^.macro imx6_ddr_setting$/;"	m
imx6_pcie_assert_core_reset	drivers/pci/pcie_imx.c	/^static int imx6_pcie_assert_core_reset(void)$/;"	f	typeref:typename:int	file:
imx6_pcie_deassert_core_reset	drivers/pci/pcie_imx.c	/^static int imx6_pcie_deassert_core_reset(void)$/;"	f	typeref:typename:int	file:
imx6_pcie_init_phy	drivers/pci/pcie_imx.c	/^static int imx6_pcie_init_phy(void)$/;"	f	typeref:typename:int	file:
imx6_pcie_link_up	drivers/pci/pcie_imx.c	/^static int imx6_pcie_link_up(void)$/;"	f	typeref:typename:int	file:
imx6_pcie_toggle_power	drivers/pci/pcie_imx.c	/^__weak int imx6_pcie_toggle_power(void)$/;"	f	typeref:typename:__weak int
imx6_pcie_toggle_reset	board/gateworks/gw_ventana/gw_ventana.c	/^int imx6_pcie_toggle_reset(void)$/;"	f	typeref:typename:int
imx6_pcie_toggle_reset	drivers/pci/pcie_imx.c	/^__weak int imx6_pcie_toggle_reset(void)$/;"	f	typeref:typename:__weak int
imx6_pinctrl_match	drivers/pinctrl/nxp/pinctrl-imx6.c	/^static const struct udevice_id imx6_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
imx6_pinctrl_probe	drivers/pinctrl/nxp/pinctrl-imx6.c	/^static int imx6_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
imx6_pinctrl_soc_info	drivers/pinctrl/nxp/pinctrl-imx6.c	/^static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info;$/;"	v	typeref:struct:imx_pinctrl_soc_info	file:
imx6_qos_setting	board/freescale/mx6ullevk/plugin.S	/^.macro imx6_qos_setting$/;"	m
imx6_snvs_pinctrl_soc_info	drivers/pinctrl/nxp/pinctrl-imx6.c	/^static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = {$/;"	v	typeref:struct:imx_pinctrl_soc_info	file:
imx6_thermal_plat	arch/arm/cpu/armv7/mx6/soc.c	/^static const struct imx_thermal_plat imx6_thermal_plat = {$/;"	v	typeref:typename:const struct imx_thermal_plat	file:
imx6ull_ddr3_evk_setting	board/freescale/mx6ullevk/plugin.S	/^.macro imx6ull_ddr3_evk_setting$/;"	m
imx7_lpsr_pinctrl_soc_info	drivers/pinctrl/nxp/pinctrl-imx7.c	/^static struct imx_pinctrl_soc_info imx7_lpsr_pinctrl_soc_info = {$/;"	v	typeref:struct:imx_pinctrl_soc_info	file:
imx7_pinctrl_match	drivers/pinctrl/nxp/pinctrl-imx7.c	/^static const struct udevice_id imx7_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
imx7_pinctrl_probe	drivers/pinctrl/nxp/pinctrl-imx7.c	/^static int imx7_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
imx7_pinctrl_soc_info	drivers/pinctrl/nxp/pinctrl-imx7.c	/^static struct imx_pinctrl_soc_info imx7_pinctrl_soc_info;$/;"	v	typeref:struct:imx_pinctrl_soc_info	file:
imx7_thermal_plat	arch/arm/cpu/armv7/mx7/soc.c	/^static const struct imx_thermal_plat imx7_thermal_plat = {$/;"	v	typeref:typename:const struct imx_thermal_plat	file:
imx_ccm	arch/arm/cpu/armv7/mx6/clock.c	/^struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;$/;"	v	typeref:struct:mxc_ccm_reg *
imx_ccm	arch/arm/cpu/armv7/mx7/clock_slice.c	/^struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;$/;"	v	typeref:struct:mxc_ccm_reg *
imx_cpu_off	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^__secure int imx_cpu_off(int cpu)$/;"	f	typeref:typename:__secure int
imx_cpu_on	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^__secure int imx_cpu_on(int fn, int cpu, int pc)$/;"	f	typeref:typename:__secure int
imx_ddr_size	arch/arm/imx-common/cpu.c	/^unsigned imx_ddr_size(void)$/;"	f	typeref:typename:unsigned
imx_decode_perclk	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong imx_decode_perclk(ulong div)$/;"	f	typeref:typename:ulong	file:
imx_decode_pll	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)$/;"	f	typeref:typename:unsigned int	file:
imx_decode_pll	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)$/;"	f	typeref:typename:unsigned int	file:
imx_enable_cpu_ca7	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^__secure void imx_enable_cpu_ca7(int cpu, bool enable)$/;"	f	typeref:typename:__secure void
imx_enable_hdmi_phy	arch/arm/cpu/armv7/mx6/soc.c	/^void imx_enable_hdmi_phy(void)$/;"	f	typeref:typename:void
imx_enet_mdio_fixup	arch/arm/cpu/armv7/mx7/soc.c	/^static void imx_enet_mdio_fixup(void)$/;"	f	typeref:typename:void	file:
imx_get_ahbclk	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static ulong imx_get_ahbclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_ahbclk	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong imx_get_ahbclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_armclk	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static ulong imx_get_armclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_armclk	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong imx_get_armclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_cspiclk	arch/arm/cpu/armv7/mx5/clock.c	/^static u32 imx_get_cspiclk(void)$/;"	f	typeref:typename:u32	file:
imx_get_fecclk	arch/arm/cpu/arm1136/mx35/generic.c	/^u32 imx_get_fecclk(void)$/;"	f	typeref:typename:u32
imx_get_fecclk	arch/arm/cpu/armv7/mx5/clock.c	/^u32 imx_get_fecclk(void)$/;"	f	typeref:typename:u32
imx_get_fecclk	arch/arm/cpu/armv7/mx6/clock.c	/^u32 imx_get_fecclk(void)$/;"	f	typeref:typename:u32
imx_get_fecclk	arch/arm/cpu/armv7/mx7/clock.c	/^u32 imx_get_fecclk(void)$/;"	f	typeref:typename:u32
imx_get_fecclk	arch/arm/include/asm/arch-mx25/clock.h	/^#define imx_get_fecclk(/;"	d
imx_get_fecclk	arch/arm/include/asm/arch-mx27/clock.h	/^#define imx_get_fecclk(/;"	d
imx_get_fecclk	arch/arm/include/asm/arch-mxs/clock.h	/^#define	imx_get_fecclk(/;"	d
imx_get_fecclk	arch/arm/include/asm/arch-s32v234/clock.h	/^#define imx_get_fecclk(/;"	d
imx_get_fecclk	arch/arm/include/asm/arch-vf610/clock.h	/^#define imx_get_fecclk(/;"	d
imx_get_ipgclk	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static ulong imx_get_ipgclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_mac_from_fuse	arch/arm/cpu/arm1136/mx35/generic.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/arm926ejs/mx25/generic.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/armv7/mx5/soc.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/armv7/mx6/soc.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/armv7/mx7/soc.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mac_from_fuse	arch/arm/cpu/armv7/vf610/generic.c	/^void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:void
imx_get_mpllclk	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static ulong imx_get_mpllclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_mpllclk	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong imx_get_mpllclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_perclk	arch/arm/cpu/arm926ejs/mx25/generic.c	/^static ulong imx_get_perclk(int clk)$/;"	f	typeref:typename:ulong	file:
imx_get_perclk1	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong imx_get_perclk1(void)$/;"	f	typeref:typename:ulong	file:
imx_get_perclk2	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static ulong imx_get_perclk2(void)$/;"	f	typeref:typename:ulong	file:
imx_get_perclk3	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static __attribute__((unused)) ulong imx_get_perclk3(void)$/;"	f	typeref:typename:ulong	file:
imx_get_perclk4	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static __attribute__((unused)) ulong imx_get_perclk4(void)$/;"	f	typeref:typename:ulong	file:
imx_get_spllclk	arch/arm/cpu/arm926ejs/mx27/generic.c	/^static __attribute__((unused)) ulong imx_get_spllclk(void)$/;"	f	typeref:typename:ulong	file:
imx_get_uartclk	arch/arm/cpu/arm1136/mx31/generic.c	/^u32 imx_get_uartclk(void)$/;"	f	typeref:typename:u32
imx_get_uartclk	arch/arm/cpu/arm1136/mx35/generic.c	/^u32 imx_get_uartclk(void)$/;"	f	typeref:typename:u32
imx_get_uartclk	arch/arm/cpu/armv7/mx5/clock.c	/^u32 imx_get_uartclk(void)$/;"	f	typeref:typename:u32
imx_get_uartclk	arch/arm/cpu/armv7/mx6/clock.c	/^u32 imx_get_uartclk(void)$/;"	f	typeref:typename:u32
imx_get_uartclk	arch/arm/cpu/armv7/mx7/clock.c	/^u32 imx_get_uartclk(void)$/;"	f	typeref:typename:u32
imx_get_uartclk	arch/arm/include/asm/arch-mx25/clock.h	/^#define imx_get_uartclk(/;"	d
imx_get_uartclk	arch/arm/include/asm/arch-mx27/clock.h	/^#define imx_get_uartclk(/;"	d
imx_gpcv2_set_core1_power	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^__secure void imx_gpcv2_set_core1_power(bool pdn)$/;"	f	typeref:typename:__secure void
imx_gpcv2_set_m_core_pgc	arch/arm/cpu/armv7/mx7/psci-mx7.c	/^static inline void imx_gpcv2_set_m_core_pgc(bool enable, u32 offset)$/;"	f	typeref:typename:void	file:
imx_gpio_mode	arch/arm/cpu/arm920t/imx/generic.c	/^void imx_gpio_mode(int gpio_mode)$/;"	f	typeref:typename:void
imx_gpio_mode	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void imx_gpio_mode(int gpio_mode)$/;"	f	typeref:typename:void
imx_header	tools/imximage.h	/^struct imx_header {$/;"	s
imx_header_v1_t	tools/imximage.h	/^} imx_header_v1_t;$/;"	t	typeref:struct:__anon504a956c0608
imx_header_v2_t	tools/imximage.h	/^} imx_header_v2_t;$/;"	t	typeref:struct:__anon504a956c0d08
imx_iomux_gpio_get_function	arch/arm/imx-common/iomux-v3.c	/^void imx_iomux_gpio_get_function(unsigned int gpio, u32 *gpio_state)$/;"	f	typeref:typename:void
imx_iomux_gpio_set_direction	arch/arm/imx-common/iomux-v3.c	/^void imx_iomux_gpio_set_direction(unsigned int gpio,$/;"	f	typeref:typename:void
imx_iomux_set_gpr_register	arch/arm/imx-common/iomux-v3.c	/^void imx_iomux_set_gpr_register(int group, int start_bit,$/;"	f	typeref:typename:void
imx_iomux_v3_setup_multiple_pads	arch/arm/imx-common/iomux-v3.c	/^void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,$/;"	f	typeref:typename:void
imx_iomux_v3_setup_pad	arch/arm/imx-common/iomux-v3.c	/^void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)$/;"	f	typeref:typename:void
imx_pcie_addr_valid	drivers/pci/pcie_imx.c	/^static int imx_pcie_addr_valid(pci_dev_t d)$/;"	f	typeref:typename:int	file:
imx_pcie_fix_dabt_handler	drivers/pci/pcie_imx.c	/^static void imx_pcie_fix_dabt_handler(bool set)$/;"	f	typeref:typename:void	file:
imx_pcie_init	drivers/pci/pcie_imx.c	/^void imx_pcie_init(void)$/;"	f	typeref:typename:void
imx_pcie_link_up	drivers/pci/pcie_imx.c	/^static int imx_pcie_link_up(void)$/;"	f	typeref:typename:int	file:
imx_pcie_read_config	drivers/pci/pcie_imx.c	/^static int imx_pcie_read_config(struct pci_controller *hose, pci_dev_t d,$/;"	f	typeref:typename:int	file:
imx_pcie_regions_setup	drivers/pci/pcie_imx.c	/^static int imx_pcie_regions_setup(void)$/;"	f	typeref:typename:int	file:
imx_pcie_write_config	drivers/pci/pcie_imx.c	/^static int imx_pcie_write_config(struct pci_controller *hose, pci_dev_t d,$/;"	f	typeref:typename:int	file:
imx_pinctrl_ops	drivers/pinctrl/nxp/pinctrl-imx.c	/^const struct pinctrl_ops imx_pinctrl_ops  = {$/;"	v	typeref:typename:const struct pinctrl_ops
imx_pinctrl_priv	drivers/pinctrl/nxp/pinctrl-imx.h	/^struct imx_pinctrl_priv {$/;"	s
imx_pinctrl_probe	drivers/pinctrl/nxp/pinctrl-imx.c	/^int imx_pinctrl_probe(struct udevice *dev,$/;"	f	typeref:typename:int
imx_pinctrl_remove	drivers/pinctrl/nxp/pinctrl-imx.c	/^int imx_pinctrl_remove(struct udevice *dev)$/;"	f	typeref:typename:int
imx_pinctrl_set_state	drivers/pinctrl/nxp/pinctrl-imx.c	/^static int imx_pinctrl_set_state(struct udevice *dev, struct udevice *config)$/;"	f	typeref:typename:int	file:
imx_pinctrl_soc_info	drivers/pinctrl/nxp/pinctrl-imx.h	/^struct imx_pinctrl_soc_info {$/;"	s
imx_rdc_check_permission	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_check_permission(int per_id, int dom_id)$/;"	f	typeref:typename:int
imx_rdc_check_sema_required	arch/arm/imx-common/rdc-sema.c	/^static inline int imx_rdc_check_sema_required(int per_id)$/;"	f	typeref:typename:int	file:
imx_rdc_sema_lock	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_sema_lock(int per_id)$/;"	f	typeref:typename:int
imx_rdc_sema_unlock	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_sema_unlock(int per_id)$/;"	f	typeref:typename:int
imx_rdc_setup_ma	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_setup_ma(rdc_ma_cfg_t p)$/;"	f	typeref:typename:int
imx_rdc_setup_masters	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_setup_masters(rdc_ma_cfg_t const *masters_list, unsigned count)$/;"	f	typeref:typename:int
imx_rdc_setup_peri	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_setup_peri(rdc_peri_cfg_t p)$/;"	f	typeref:typename:int
imx_rdc_setup_peripherals	arch/arm/imx-common/rdc-sema.c	/^int imx_rdc_setup_peripherals(rdc_peri_cfg_t const *peripherals_list,$/;"	f	typeref:typename:int
imx_sec_config_fuse	arch/arm/cpu/armv7/mx6/soc.c	/^struct imx_sec_config_fuse_t const imx_sec_config_fuse = {$/;"	v	typeref:struct:imx_sec_config_fuse_t const
imx_sec_config_fuse	arch/arm/cpu/armv7/mx7/soc.c	/^struct imx_sec_config_fuse_t const imx_sec_config_fuse = {$/;"	v	typeref:struct:imx_sec_config_fuse_t const
imx_sec_config_fuse_t	arch/arm/include/asm/imx-common/hab.h	/^struct imx_sec_config_fuse_t {$/;"	s
imx_set_wdog_powerdown	arch/arm/imx-common/init.c	/^void imx_set_wdog_powerdown(bool enable)$/;"	f	typeref:typename:void
imx_setup_hdmi	arch/arm/cpu/armv7/mx6/soc.c	/^void imx_setup_hdmi(void)$/;"	f	typeref:typename:void
imx_thermal_get_temp	drivers/thermal/imx_thermal.c	/^int imx_thermal_get_temp(struct udevice *dev, int *temp)$/;"	f	typeref:typename:int
imx_thermal_ops	drivers/thermal/imx_thermal.c	/^static const struct dm_thermal_ops imx_thermal_ops = {$/;"	v	typeref:typename:const struct dm_thermal_ops	file:
imx_thermal_plat	include/imx_thermal.h	/^struct imx_thermal_plat {$/;"	s
imx_thermal_probe	drivers/thermal/imx_thermal.c	/^static int imx_thermal_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
imxdi_data	drivers/rtc/imxdi.c	/^struct imxdi_data {$/;"	s	file:
imxdi_regs	drivers/rtc/imxdi.c	/^struct imxdi_regs {$/;"	s	file:
imximage_boot_loadsize	tools/imximage.c	/^static table_entry_t imximage_boot_loadsize[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
imximage_boot_offset	tools/imximage.c	/^static table_entry_t imximage_boot_offset[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
imximage_check_image_types	tools/imximage.c	/^static int imximage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
imximage_check_params	tools/imximage.c	/^int imximage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
imximage_cmd	tools/imximage.h	/^enum imximage_cmd {$/;"	g
imximage_cmds	tools/imximage.c	/^static table_entry_t imximage_cmds[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
imximage_csf_size	tools/imximage.c	/^static uint32_t imximage_csf_size = UNDEFINED;$/;"	v	typeref:typename:uint32_t	file:
imximage_fld_types	tools/imximage.h	/^enum imximage_fld_types {$/;"	g
imximage_generate	tools/imximage.c	/^static int imximage_generate(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
imximage_header	tools/imximage.c	/^static struct imx_header imximage_header;$/;"	v	typeref:struct:imx_header	file:
imximage_init_loadsize	tools/imximage.c	/^static uint32_t imximage_init_loadsize;$/;"	v	typeref:typename:uint32_t	file:
imximage_iram_free_start	tools/imximage.c	/^static uint32_t imximage_iram_free_start;$/;"	v	typeref:typename:uint32_t	file:
imximage_ivt_offset	tools/imximage.c	/^static uint32_t imximage_ivt_offset = UNDEFINED;$/;"	v	typeref:typename:uint32_t	file:
imximage_plugin_size	tools/imximage.c	/^static uint32_t imximage_plugin_size;$/;"	v	typeref:typename:uint32_t	file:
imximage_print_header	tools/imximage.c	/^static void imximage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
imximage_set_header	tools/imximage.c	/^static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
imximage_verify_header	tools/imximage.c	/^static int imximage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
imximage_version	tools/imximage.c	/^static uint32_t imximage_version;$/;"	v	typeref:typename:uint32_t	file:
imximage_version	tools/imximage.h	/^enum imximage_version {$/;"	g
imximage_versions	tools/imximage.c	/^static table_entry_t imximage_versions[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
in	arch/m68k/include/asm/coldfire/skha.h	/^	u32 in;			\/* 0x20 Input FIFO *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
in	doc/README.x86	/^in this FSP package too.$/;"	l
in	drivers/sound/wm8994.c	/^	int in;		\/* Input frequency in Hz *\/$/;"	m	struct:wm8994_fll_config	typeref:typename:int	file:
in	drivers/spi/ich.h	/^	uint8_t *in;$/;"	m	struct:spi_trans	typeref:typename:uint8_t *
in	drivers/tpm/tpm_tis.h	/^	struct tpm_input_header in;$/;"	m	union:tpm_cmd_header	typeref:struct:tpm_input_header
in	drivers/usb/emul/sandbox_keyb.c	/^	struct membuff in;$/;"	m	struct:sandbox_keyb_priv	typeref:struct:membuff	file:
in	drivers/usb/gadget/ether.c	/^				*in, *out, *status;$/;"	m	struct:eth_dev	typeref:typename:const struct usb_endpoint_descriptor *	file:
in	include/u-boot/md5.h	/^		unsigned char in[64];$/;"	m	union:MD5Context::__anon5b3033d9010a	typeref:typename:unsigned char[64]
in16	arch/microblaze/cpu/start.S	/^in16:	lhu	r3, r0, r5$/;"	l
in16	arch/powerpc/cpu/mpc5xxx/io.S	/^in16:$/;"	l
in16	arch/powerpc/cpu/mpc85xx/start.S	/^in16:$/;"	l
in16	arch/powerpc/cpu/mpc86xx/start.S	/^in16:$/;"	l
in16	arch/powerpc/cpu/ppc4xx/start.S	/^in16:$/;"	l
in16	arch/sandbox/include/asm/io.h	/^#define in16(/;"	d
in16r	arch/powerpc/cpu/mpc5xxx/io.S	/^in16r:$/;"	l
in16r	arch/powerpc/cpu/mpc85xx/start.S	/^in16r:$/;"	l
in16r	arch/powerpc/cpu/mpc86xx/start.S	/^in16r:$/;"	l
in16r	arch/powerpc/cpu/ppc4xx/start.S	/^in16r:$/;"	l
in16r	arch/sparc/cpu/leon3/usb_uhci.c	/^#define in16r(/;"	d	file:
in32	arch/powerpc/cpu/mpc5xxx/io.S	/^in32:$/;"	l
in32	arch/powerpc/cpu/mpc85xx/start.S	/^in32:$/;"	l
in32	arch/powerpc/cpu/mpc86xx/start.S	/^in32:$/;"	l
in32	arch/powerpc/cpu/ppc4xx/start.S	/^in32:$/;"	l
in32	board/mpl/pati/pati.c	/^unsigned long in32(unsigned long addr)$/;"	f	typeref:typename:unsigned long
in32	drivers/net/xilinx_ll_temac.h	/^	unsigned		(*in32)(phys_addr_t);$/;"	m	struct:ll_temac	typeref:typename:unsigned (*)(phys_addr_t)
in32	include/u-boot/md5.h	/^		__u32 in32[16];$/;"	m	union:MD5Context::__anon5b3033d9010a	typeref:typename:__u32[16]
in32r	arch/powerpc/cpu/mpc5xxx/io.S	/^in32r:$/;"	l
in32r	arch/powerpc/cpu/mpc85xx/start.S	/^in32r:$/;"	l
in32r	arch/powerpc/cpu/mpc86xx/start.S	/^in32r:$/;"	l
in32r	arch/powerpc/cpu/ppc4xx/start.S	/^in32r:$/;"	l
in32r	arch/sparc/cpu/leon3/usb_uhci.c	/^#define in32r(/;"	d	file:
in8	arch/powerpc/cpu/mpc5xxx/io.S	/^in8:$/;"	l
in8	arch/powerpc/cpu/mpc85xx/start.S	/^in8:$/;"	l
in8	arch/powerpc/cpu/mpc86xx/start.S	/^in8:$/;"	l
in8	arch/powerpc/cpu/ppc4xx/start.S	/^in8:$/;"	l
in8	drivers/input/i8042.c	/^#define in8(/;"	d	file:
in8	drivers/rtc/mc146818.c	/^#define in8(/;"	d	file:
inUse	fs/yaffs2/yaffsfs.c	/^	unsigned inUse:1;$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:typename:unsigned:1	file:
inUse	lib/bzip2/bzlib_private.h	/^      Bool     inUse[256];$/;"	m	struct:__anon93cbeec40108	typeref:typename:Bool[256]
inUse	lib/bzip2/bzlib_private.h	/^      Bool     inUse[256];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Bool[256]
inUse16	lib/bzip2/bzlib_private.h	/^      Bool     inUse16[16];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Bool[16]
in_8	arch/arc/include/asm/io.h	/^#define in_8(/;"	d
in_8	arch/arm/include/asm/io.h	/^#define in_8(/;"	d
in_8	arch/m68k/include/asm/io.h	/^static inline int in_8(volatile u8 * addr)$/;"	f	typeref:typename:int
in_8	arch/microblaze/include/asm/io.h	/^#define in_8(/;"	d
in_8	arch/nds32/include/asm/io.h	/^#define in_8(/;"	d
in_8	arch/nios2/include/asm/io.h	/^#define in_8(/;"	d
in_8	arch/powerpc/include/asm/io.h	/^static inline u8 in_8(const volatile unsigned char __iomem *addr)$/;"	f	typeref:typename:u8
in_8	arch/sh/include/asm/io.h	/^#define in_8(/;"	d
in_8	arch/xtensa/include/asm/io.h	/^# define in_8(/;"	d
in_a_category_cnt	fs/ubifs/ubifs.h	/^	int in_a_category_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
in_addr	include/net.h	/^struct in_addr {$/;"	s
in_arch	arch/arc/include/asm/io.h	/^#define in_arch(/;"	d
in_arch	arch/arm/include/asm/io.h	/^#define in_arch(/;"	d
in_arch	arch/nds32/include/asm/io.h	/^#define in_arch(/;"	d
in_arch	arch/nios2/include/asm/io.h	/^#define in_arch(/;"	d
in_be16	arch/arc/include/asm/io.h	/^#define in_be16(/;"	d
in_be16	arch/arm/include/asm/io.h	/^#define in_be16(/;"	d
in_be16	arch/m68k/include/asm/io.h	/^static inline int in_be16(volatile u16 * addr)$/;"	f	typeref:typename:int
in_be16	arch/microblaze/include/asm/io.h	/^#define in_be16(/;"	d
in_be16	arch/nds32/include/asm/io.h	/^#define in_be16(/;"	d
in_be16	arch/nios2/include/asm/io.h	/^#define in_be16(/;"	d
in_be16	arch/powerpc/include/asm/io.h	/^static inline u16 in_be16(const volatile unsigned short __iomem *addr)$/;"	f	typeref:typename:u16
in_be32	arch/arc/include/asm/io.h	/^#define in_be32(/;"	d
in_be32	arch/arm/include/asm/io.h	/^#define in_be32(/;"	d
in_be32	arch/m68k/include/asm/io.h	/^static inline unsigned in_be32(volatile u32 * addr)$/;"	f	typeref:typename:unsigned
in_be32	arch/microblaze/include/asm/io.h	/^#define in_be32(/;"	d
in_be32	arch/nds32/include/asm/io.h	/^#define in_be32(/;"	d
in_be32	arch/nios2/include/asm/io.h	/^#define in_be32(/;"	d
in_be32	arch/powerpc/include/asm/io.h	/^static inline u32 in_be32(const volatile unsigned __iomem *addr)$/;"	f	typeref:typename:u32
in_bulk	drivers/usb/musb-new/musb_core.h	/^	struct list_head	in_bulk;	\/* of musb_qh *\/$/;"	m	struct:musb	typeref:struct:list_head
in_csr2_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	in_csr2_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
in_ctx	drivers/usb/host/xhci.h	/^	struct xhci_container_ctx       *in_ctx;$/;"	m	struct:xhci_virt_device	typeref:struct:xhci_container_ctx *
in_data	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int in_data;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
in_data	include/ec_commands.h	/^	uint32_t in_data;  \/* Pass anything here *\/$/;"	m	struct:ec_params_hello	typeref:typename:uint32_t
in_data_toggle	drivers/usb/host/dwc2.c	/^	u8 in_data_toggle[MAX_DEVICE][MAX_ENDPOINT];$/;"	m	struct:dwc2_priv	typeref:typename:u8[][]	file:
in_dcd	tools/mxsimage.c	/^	unsigned int			in_dcd:1;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int:1	file:
in_dma32	drivers/dma/fsl_dma.c	/^static uint in_dma32(volatile unsigned *addr)$/;"	f	typeref:typename:uint	file:
in_endp	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	struct dwc2_dev_in_endp in_endp[16];$/;"	m	struct:dwc2_usbotg_reg	typeref:struct:dwc2_dev_in_endp[16]
in_ep	drivers/usb/gadget/ether.c	/^	struct usb_ep		*in_ep, *out_ep, *status_ep;$/;"	m	struct:eth_dev	typeref:struct:usb_ep *	file:
in_ep	drivers/usb/gadget/f_fastboot.c	/^	struct usb_ep *in_ep, *out_ep;$/;"	m	struct:f_fastboot	typeref:struct:usb_ep *	file:
in_ep	drivers/usb/gadget/f_thor.h	/^	struct usb_ep *in_ep, *out_ep, *int_ep;$/;"	m	struct:thor_dev	typeref:struct:usb_ep *
in_epnum	drivers/usb/gadget/epautoconf.c	/^static unsigned in_epnum;$/;"	v	typeref:typename:unsigned	file:
in_flash	arch/powerpc/cpu/mpc512x/start.S	/^in_flash:$/;"	l
in_flash	arch/powerpc/cpu/mpc5xx/start.S	/^in_flash:$/;"	l
in_flash	arch/powerpc/cpu/mpc8260/start.S	/^in_flash:$/;"	l
in_flash	arch/powerpc/cpu/mpc83xx/start.S	/^in_flash:$/;"	l
in_flash	arch/powerpc/cpu/mpc86xx/start.S	/^in_flash:$/;"	l
in_flash	arch/powerpc/cpu/mpc8xx/start.S	/^in_flash:$/;"	l
in_func	include/u-boot/zlib.h	/^#  define in_func /;"	d
in_last_addr	cmd/portio.c	/^static uint in_last_addr, in_last_size;$/;"	v	typeref:typename:uint	file:
in_last_size	cmd/portio.c	/^static uint in_last_addr, in_last_size;$/;"	v	typeref:typename:uint	file:
in_le16	arch/arc/include/asm/io.h	/^#define in_le16(/;"	d
in_le16	arch/arm/include/asm/io.h	/^#define in_le16(/;"	d
in_le16	arch/m68k/include/asm/io.h	/^static inline int in_le16(volatile u16 * addr)$/;"	f	typeref:typename:int
in_le16	arch/nds32/include/asm/io.h	/^#define in_le16(/;"	d
in_le16	arch/nios2/include/asm/io.h	/^#define in_le16(/;"	d
in_le16	arch/powerpc/include/asm/io.h	/^static inline u16 in_le16(const volatile unsigned short __iomem *addr)$/;"	f	typeref:typename:u16
in_le16	arch/sh/include/asm/io.h	/^#define in_le16(/;"	d
in_le16	arch/xtensa/include/asm/io.h	/^# define in_le16(/;"	d
in_le32	arch/arc/include/asm/io.h	/^#define in_le32(/;"	d
in_le32	arch/arm/include/asm/io.h	/^#define in_le32(/;"	d
in_le32	arch/blackfin/include/asm/io.h	/^#define in_le32(/;"	d
in_le32	arch/m68k/include/asm/io.h	/^static inline unsigned in_le32(volatile u32 * addr)$/;"	f	typeref:typename:unsigned
in_le32	arch/nds32/include/asm/io.h	/^#define in_le32(/;"	d
in_le32	arch/nios2/include/asm/io.h	/^#define in_le32(/;"	d
in_le32	arch/powerpc/include/asm/io.h	/^static inline u32 in_le32(const volatile unsigned __iomem *addr)$/;"	f	typeref:typename:u32
in_le32	arch/sh/include/asm/io.h	/^#define in_le32(/;"	d
in_le32	arch/xtensa/include/asm/io.h	/^# define in_le32(/;"	d
in_le64	arch/arm/include/asm/io.h	/^#define in_le64(/;"	d
in_out	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	gpio_driver_t	in_out;	\/* Driver Setting		*\/$/;"	m	struct:__anon2654fafd0108	typeref:typename:gpio_driver_t
in_pixel_fmt	drivers/video/ipu.h	/^		uint32_t in_pixel_fmt;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0708	typeref:typename:uint32_t
in_pixel_fmt	drivers/video/ipu.h	/^		uint32_t in_pixel_fmt;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0908	typeref:typename:uint32_t
in_pointer	board/mpl/common/kbd.c	/^static volatile int in_pointer = 0;$/;"	v	typeref:typename:volatile int	file:
in_pol	drivers/gpio/mvebu_gpio.c	/^	u32 in_pol;$/;"	m	struct:mvebu_gpio_regs	typeref:typename:u32	file:
in_progress_block_addr	include/linux/mtd/flashchip.h	/^	unsigned long in_progress_block_addr;$/;"	m	struct:flchip	typeref:typename:unsigned long
in_qh	drivers/usb/musb-new/musb_core.h	/^	struct musb_qh		*in_qh;$/;"	m	struct:musb_hw_ep	typeref:struct:musb_qh *
in_ram	arch/avr32/cpu/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf5227x/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf523x/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf52x2/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf530x/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf532x/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf5445x/start.S	/^in_ram:$/;"	l
in_ram	arch/m68k/cpu/mcf547x_8x/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc512x/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc5xx/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc5xxx/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc8260/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc83xx/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc85xx/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc86xx/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/mpc8xx/start.S	/^in_ram:$/;"	l
in_ram	arch/powerpc/cpu/ppc4xx/start.S	/^in_ram:$/;"	l
in_regs	include/usb/designware_udc.h	/^	struct udc_endp_regs in_regs[MAX_ENDPOINTS];$/;"	m	struct:udc_regs	typeref:struct:udc_endp_regs[]
in_req	drivers/usb/gadget/f_fastboot.c	/^	struct usb_request *in_req, *out_req;$/;"	m	struct:f_fastboot	typeref:struct:usb_request *	file:
in_req	drivers/usb/gadget/f_thor.h	/^	struct usb_request *in_req, *out_req;$/;"	m	struct:thor_dev	typeref:struct:usb_request *
in_search	scripts/kconfig/nconf.c	/^	int in_search;$/;"	m	struct:match_state	typeref:typename:int	file:
in_section	tools/mxsimage.c	/^	unsigned int			in_section:1;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int:1	file:
in_str	common/cli_hush.c	/^struct in_str {$/;"	s	file:
in_tree	fs/ubifs/lpt.c	/^	int in_tree;$/;"	m	struct:lpt_scan_node	typeref:typename:int	file:
in_use	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned long *in_use;$/;"	m	struct:davinci_gpio_bank	typeref:typename:unsigned long *
in_use	fs/yaffs2/yaffs_guts.h	/^	int in_use;$/;"	m	struct:yaffs_buffer	typeref:typename:int
in_use_thresh	drivers/net/mvpp2.c	/^	int in_use_thresh;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:int	file:
in_wl_tree	drivers/mtd/ubi/wl.c	/^static int in_wl_tree(struct ubi_wl_entry *e, struct rb_root *root)$/;"	f	typeref:typename:int	file:
inactivedColorGroup	scripts/kconfig/qconf.h	/^	QColorGroup inactivedColorGroup;$/;"	m	class:ConfigList	typeref:typename:QColorGroup
inb	arch/arm/include/asm/io.h	/^#define inb(/;"	d
inb	arch/avr32/include/asm/io.h	/^#define inb(/;"	d
inb	arch/blackfin/include/asm/io.h	/^#define inb(/;"	d
inb	arch/m68k/include/asm/io.h	/^#define inb(/;"	d
inb	arch/microblaze/include/asm/io.h	/^#define inb(/;"	d
inb	arch/nds32/include/asm/io.h	/^#define inb(/;"	d
inb	arch/nios2/include/asm/io.h	/^#define inb(/;"	d
inb	arch/openrisc/include/asm/io.h	/^#define inb(/;"	d
inb	arch/powerpc/include/asm/io.h	/^#define inb(/;"	d
inb	arch/sandbox/lib/pci_io.c	/^int inb(unsigned int addr)$/;"	f	typeref:typename:int
inb	arch/sh/include/asm/io.h	/^#define inb(/;"	d
inb	arch/x86/include/asm/io.h	/^#define inb(/;"	d
inb	arch/xtensa/include/asm/io.h	/^#define inb(/;"	d
inb	include/usbdevice.h	/^#define inb(/;"	d
inb_p	arch/arm/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/blackfin/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/microblaze/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/nds32/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/openrisc/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/powerpc/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/sh/include/asm/io.h	/^#define inb_p(/;"	d
inb_p	arch/xtensa/include/asm/io.h	/^#define inb_p(/;"	d
inband_is_shrink	fs/yaffs2/yaffs_guts.h	/^	u32 inband_is_shrink;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
inband_shadowed_obj_id	fs/yaffs2/yaffs_guts.h	/^	u32 inband_shadowed_obj_id;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
inband_tags	fs/yaffs2/yaffs_guts.h	/^	int inband_tags;	\/* Use unband tags *\/$/;"	m	struct:yaffs_param	typeref:typename:int
inband_tags	fs/yaffs2/yaffs_nandif.h	/^	unsigned inband_tags;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
inblk	drivers/net/dm9000x.c	/^	void (*inblk)(void *data_ptr, int count);$/;"	m	struct:board_info	typeref:typename:void (*)(void * data_ptr,int count)	file:
inbound	include/tsi148.h	/^	INBOUND      inbound[8];              \/* 0x100         *\/$/;"	m	struct:_TSI148	typeref:typename:INBOUND[8]
inbound_len	arch/blackfin/cpu/jtag-console.c	/^static size_t inbound_len, leftovers_len;$/;"	v	typeref:typename:size_t	file:
inbuf	drivers/misc/cros_ec.c	/^		uint8_t inbuf[EC_PROTO2_MAX_PARAM_SIZE];$/;"	m	union:cros_ec_i2c_tunnel::__anon08366d3d030a	typeref:typename:uint8_t[]	file:
inbw	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_atmu_riw	inbw[CONFIG_SYS_FSL_SRIO_IB_WIN_NUM];$/;"	m	struct:rio_atmu_win	typeref:struct:rio_atmu_riw[]
inc	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 inc;$/;"	m	struct:globaltimer	typeref:typename:u32
inc	tools/moveconfig.py	/^    def inc(self):$/;"	m	class:Progress
inc_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 inc_byte(u8 d)$/;"	f	typeref:typename:u8
inc_deq	drivers/usb/host/xhci-ring.c	/^static void inc_deq(struct xhci_ctrl *ctrl, struct xhci_ring *ring)$/;"	f	typeref:typename:void	file:
inc_enq	drivers/usb/host/xhci-ring.c	/^static void inc_enq(struct xhci_ctrl *ctrl, struct xhci_ring *ring,$/;"	f	typeref:typename:void	file:
inc_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 inc_long(u32 d)$/;"	f	typeref:typename:u32
inc_vfifo_fr	drivers/ddr/altera/sequencer.h	/^	u32	inc_vfifo_fr;$/;"	m	struct:socfpga_phy_mgr_cmd	typeref:typename:u32
inc_vfifo_fr_hr	drivers/ddr/altera/sequencer.h	/^	u32	inc_vfifo_fr_hr;$/;"	m	struct:socfpga_phy_mgr_cmd	typeref:typename:u32
inc_vfifo_hard_phy	drivers/ddr/altera/sequencer.h	/^	u32	inc_vfifo_hard_phy;$/;"	m	struct:socfpga_phy_mgr_cmd	typeref:typename:u32
inc_vfifo_qr	drivers/ddr/altera/sequencer.h	/^	u32	inc_vfifo_qr;$/;"	m	struct:socfpga_phy_mgr_cmd	typeref:typename:u32
inc_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 inc_word(u16 d)$/;"	f	typeref:typename:u16
include	tools/fdtgrep.c	/^	int include;		\/* 1 to include matches, 0 to exclude *\/$/;"	m	struct:value_node	typeref:typename:int	file:
include/config/%.conf	Makefile	/^include\/config\/%.conf: $(KCONFIG_CONFIG) include\/config\/auto.conf.cmd$/;"	t
include/config/auto.conf	Makefile	/^include\/config\/auto.conf: ;$/;"	t
include/config/auto.conf.cmd	Makefile	/^$(KCONFIG_CONFIG) include\/config\/auto.conf.cmd: ;$/;"	t
include/config/uboot.release	Makefile	/^include\/config\/uboot.release: include\/config\/auto.conf FORCE$/;"	t
include_root	tools/fdtgrep.c	/^	int include_root;	\/* Include the root node and all properties *\/$/;"	m	struct:display_info	typeref:typename:int	file:
included	include/libfdt.h	/^	int included;		\/* 1 if we included this node, 0 if not *\/$/;"	m	struct:fdt_subnode_stack	typeref:typename:int
including	doc/README.x86	/^including supported boards, build instructions, todo list, etc.$/;"	l
incorrect	include/linux/compiler.h	/^			unsigned long incorrect;$/;"	m	struct:ftrace_branch_data::__anonaf531ce8010a::__anonaf531ce80208	typeref:typename:unsigned long
increment_buffer_index	drivers/serial/sandbox.c	/^static unsigned int increment_buffer_index(unsigned int index)$/;"	f	typeref:typename:unsigned int	file:
incs	lib/bzip2/bzlib_blocksort.c	/^Int32 incs[14] = { 1, 4, 13, 40, 121, 364, 1093, 3280,$/;"	v	typeref:typename:Int32[14]	file:
ind	include/fsl_csu.h	/^	unsigned long ind;$/;"	m	struct:csu_ns_dev	typeref:typename:unsigned long
indad	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^			uint32_t indad;$/;"	m	struct:mac_regs::__anon57780116030a::__anon577801160408	typeref:typename:uint32_t
indad_upper	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^			uint32_t indad_upper;$/;"	m	struct:mac_regs::__anon57780116030a::__anon577801160408	typeref:typename:uint32_t
indent	cmd/pcmcia.c	/^#define	indent	/;"	d	file:
indent	drivers/pcmcia/ti_pci1410a.c	/^const char *indent = "\\t   ";$/;"	v	typeref:typename:const char *
indent	scripts/kconfig/conf.c	/^static int indent = 1;$/;"	v	typeref:typename:int	file:
indent	scripts/kconfig/gconf.c	/^static gint indent;$/;"	v	typeref:typename:gint	file:
indent	scripts/kconfig/mconf.c	/^static int indent;$/;"	v	typeref:typename:int	file:
indent	scripts/kconfig/nconf.c	/^static int indent;$/;"	v	typeref:typename:int	file:
indenter	common/cli_hush.c	/^static char *indenter(int i)$/;"	f	typeref:typename:char *	file:
independent_blocks	lib/lz4_wrapper.c	/^			u8 independent_blocks:1;$/;"	m	struct:lz4_frame_header::__anonc9492e16010a::__anonc9492e160208	typeref:typename:u8:1	file:
index	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	int index;$/;"	m	struct:mxc_i2c_bus	typeref:typename:int
index	arch/arm/mach-exynos/spl_boot.c	/^enum index {$/;"	g	file:
index	arch/m68k/include/asm/fec.h	/^	int index;$/;"	m	struct:fec_info_s	typeref:typename:int
index	arch/m68k/include/asm/fsl_mcdmafec.h	/^	int index;$/;"	m	struct:fec_info_dma	typeref:typename:int
index	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 index;$/;"	m	struct:td	typeref:typename:__u8
index	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 index;$/;"	m	struct:td	typeref:typename:__u8
index	arch/powerpc/cpu/mpc83xx/pcie.c	/^	u8 index;$/;"	m	struct:mpc83xx_pcie_priv	typeref:typename:u8	file:
index	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 index;$/;"	m	struct:td	typeref:typename:__u8
index	arch/powerpc/include/asm/fsl_i2c.h	/^	u32 index;$/;"	m	struct:fsl_i2c_dev	typeref:typename:u32
index	arch/powerpc/include/asm/fsl_law.h	/^	int index;$/;"	m	struct:law_entry	typeref:typename:int
index	arch/sparc/cpu/leon3/memcfg.h	/^	char		index;		\/* 0x01. Unit number, 0, 1, 2... *\/$/;"	m	struct:grlib_mctrl_handler	typeref:typename:char
index	arch/x86/cpu/mp_init.c	/^	uint32_t index;$/;"	m	struct:saved_msr	typeref:typename:uint32_t	file:
index	board/mpl/common/isa.h	/^	const uchar index;$/;"	m	struct:__anonabff7a9f0108	typeref:typename:const uchar
index	board/mpl/common/pci_parts.h	/^	int		index;	\/* address *\/$/;"	m	struct:pci_pip405_config_entry	typeref:typename:int
index	doc/DocBook/Makefile	/^index = index.html$/;"	m
index	drivers/i2c/mvtwsi.c	/^	int index;$/;"	m	struct:mvtwsi_i2c_dev	typeref:typename:int	file:
index	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int index;      \/* Pointer to next byte to 'read'        *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
index	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int index;      \/* Pointer to next byte to 'read'        *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
index	drivers/net/mvpp2.c	/^	u32 index;$/;"	m	struct:mvpp2_cls_flow_entry	typeref:typename:u32	file:
index	drivers/net/mvpp2.c	/^	u32 index;$/;"	m	struct:mvpp2_prs_entry	typeref:typename:u32	file:
index	drivers/pci/pci_tegra.c	/^	unsigned int index;$/;"	m	struct:tegra_pcie_port	typeref:typename:unsigned int	file:
index	drivers/usb/dwc3/core.h	/^	int			index;$/;"	m	struct:dwc3	typeref:typename:int
index	drivers/usb/dwc3/dwc3-omap.c	/^	u32			index;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
index	drivers/usb/dwc3/ti_usb_phy.c	/^	int index;$/;"	m	struct:ti_usb_phy	typeref:typename:int	file:
index	drivers/usb/gadget/atmel_usba_udc.h	/^	u8					index;$/;"	m	struct:usba_ep	typeref:typename:u8
index	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 index;$/;"	m	struct:td	typeref:typename:__u8
index	drivers/usb/host/ohci.h	/^	__u8 index;$/;"	m	struct:td	typeref:typename:__u8
index	drivers/usb/musb-new/musb_core.h	/^	u8 index, testmode;$/;"	m	struct:musb_context_registers	typeref:typename:u8
index	drivers/usb/musb/musb_core.h	/^	u8	index;$/;"	m	struct:musb_regs	typeref:typename:u8
index	fs/jffs2/jffs2_1pass.c	/^	u32	index;$/;"	m	struct:mem_block	typeref:typename:u32	file:
index	fs/jffs2/jffs2_nand_1pass.c	/^	unsigned index;$/;"	m	struct:mem_block	typeref:typename:unsigned	file:
index	fs/ubifs/ubifs.h	/^	pgoff_t index;$/;"	m	struct:page	typeref:typename:pgoff_t
index	include/dwc3-omap-uboot.h	/^	int index;$/;"	m	struct:dwc3_omap_device	typeref:typename:int
index	include/dwc3-uboot.h	/^	int index;$/;"	m	struct:dwc3_device	typeref:typename:int
index	include/ec_commands.h	/^	uint8_t index;$/;"	m	struct:ec_params_ldo_get	typeref:typename:uint8_t
index	include/ec_commands.h	/^	uint8_t index;$/;"	m	struct:ec_params_ldo_set	typeref:typename:uint8_t
index	include/ec_commands.h	/^	uint8_t index;$/;"	m	struct:ec_params_tmp006_get_calibration	typeref:typename:uint8_t
index	include/ec_commands.h	/^	uint8_t index;$/;"	m	struct:ec_params_tmp006_set_calibration	typeref:typename:uint8_t
index	include/fm_eth.h	/^	int index;$/;"	m	struct:fm_eth_info	typeref:typename:int
index	include/linux/mtd/mtd.h	/^	int index;$/;"	m	struct:mtd_info	typeref:typename:int
index	include/linux/usb/atmel_usba_udc.h	/^	int index;$/;"	m	struct:usba_ep_data	typeref:typename:int
index	include/mb862xx.h	/^	unsigned int index;$/;"	m	struct:__anon38db270d0108	typeref:typename:unsigned int
index	include/net.h	/^	int index;$/;"	m	struct:eth_device	typeref:typename:int
index	include/sdhci.h	/^	int index;$/;"	m	struct:sdhci_host	typeref:typename:int
index	include/ti-usb-phy-uboot.h	/^	int index;$/;"	m	struct:ti_usb_phy_device	typeref:typename:int
index	include/usb.h	/^	__le16	index;$/;"	m	struct:devrequest	typeref:typename:__le16
index	include/vsc9953.h	/^	int	index;$/;"	m	struct:vsc9953_port_info	typeref:typename:int
index	post/lib_powerpc/load.c	/^    int index;$/;"	m	struct:cpu_post_load_s	typeref:typename:int	file:
index	post/lib_powerpc/store.c	/^    int index;$/;"	m	struct:cpu_post_store_s	typeref:typename:int	file:
index	scripts/kconfig/expr.h	/^	int index;$/;"	m	struct:jump_key	typeref:typename:int
index	tools/aisimage.c	/^	uint32_t index;$/;"	m	struct:ais_func_exec	typeref:typename:uint32_t	file:
indexToLocFormat	drivers/video/stb_truetype.h	/^   int indexToLocFormat;              \/\/ format needed to map from glyph index to glyph$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
index_addr	drivers/mtd/nand/denali.c	/^static void index_addr(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
index_addr	drivers/mtd/nand/denali_spl.c	/^static void index_addr(uint32_t address, uint32_t data)$/;"	f	typeref:typename:void	file:
index_addr_read_data	drivers/mtd/nand/denali.c	/^static void index_addr_read_data(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
index_map	drivers/video/stb_truetype.h	/^   int index_map;                     \/\/ a cmap mapping for our chosen character encoding$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
index_ot	arch/powerpc/include/asm/fsl_pamu.h	/^		} index_ot;$/;"	m	union:paace::__anon6139da31040a	typeref:struct:paace::__anon6139da31040a::__anon6139da310608
index_partitions	cmd/mtdparts.c	/^static void index_partitions(void)$/;"	f	typeref:typename:void	file:
index_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	index_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
index_regs	drivers/usb/musb-new/musb_core.h	/^	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];$/;"	m	struct:musb_context_registers	typeref:struct:musb_csr_regs[]
index_size	fs/ubifs/ubifs-media.h	/^	__le64 index_size;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
index_to_seq	drivers/tpm/tpm_tis_sandbox.c	/^static int index_to_seq(uint32_t index)$/;"	f	typeref:typename:int	file:
indicator	include/pci_rom.h	/^	uint8_t indicator;$/;"	m	struct:pci_rom_data	typeref:typename:uint8_t
indir_block	include/ext_common.h	/^			__le32 indir_block;$/;"	m	struct:ext2_inode::__anon5bc84367010a::datablocks	typeref:typename:__le32
indirect_type	include/pci.h	/^	int indirect_type;$/;"	m	struct:pci_controller	typeref:typename:int
indirs	tools/patman/tools.py	/^indirs = None$/;"	v
indt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 indt;$/;"	m	struct:rcar_gpio	typeref:typename:u32
ine	post/lib_powerpc/fpu/compare-fp-1.c	/^static void ine (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
inen	arch/blackfin/include/asm/gpio.h	/^	unsigned short inen;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
inen	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short inen;$/;"	m	struct:gpio_port_s	typeref:typename:unsigned short
inen	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short inen;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
inen	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long inen;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
inen_clear	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long inen_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
inen_set	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long inen_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
inep_regs_p	drivers/usb/gadget/designware_udc.c	/^static struct udc_endp_regs *const inep_regs_p =$/;"	v	typeref:struct:udc_endp_regs * const	file:
inet_address	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned long	inet_address;$/;"	m	struct:arp_entry	typeref:typename:unsigned long
inf	post/lib_powerpc/fpu/darwin-ldouble.c	/^#define inf(/;"	d	file:
infile	scripts/mailmapper	/^infile = None$/;"	v
infinite_debug_loop	arch/powerpc/cpu/mpc85xx/start.S	/^infinite_debug_loop:$/;"	l
inflate	include/u-boot/zlib.h	/^#  define inflate /;"	d
inflate	lib/zlib/inflate.c	/^int ZEXPORT inflate(z_streamp strm, int flush)$/;"	f	typeref:typename:int ZEXPORT
inflateBack	include/u-boot/zlib.h	/^#  define inflateBack /;"	d
inflateBackEnd	include/u-boot/zlib.h	/^#  define inflateBackEnd /;"	d
inflateCopy	include/u-boot/zlib.h	/^#  define inflateCopy /;"	d
inflateEnd	include/u-boot/zlib.h	/^#  define inflateEnd /;"	d
inflateEnd	lib/zlib/inflate.c	/^int ZEXPORT inflateEnd(z_streamp strm)$/;"	f	typeref:typename:int ZEXPORT
inflateInit	include/u-boot/zlib.h	/^#define inflateInit(/;"	d
inflateInit2	include/u-boot/zlib.h	/^#define inflateInit2(/;"	d
inflateInit2_	include/u-boot/zlib.h	/^#  define inflateInit2_ /;"	d
inflateInit2_	lib/zlib/inflate.c	/^int ZEXPORT inflateInit2_(z_streamp strm, int windowBits, const char *version,$/;"	f	typeref:typename:int ZEXPORT
inflateInit_	include/u-boot/zlib.h	/^#  define inflateInit_ /;"	d
inflateInit_	lib/zlib/inflate.c	/^int ZEXPORT inflateInit_(z_streamp strm, const char *version, int stream_size)$/;"	f	typeref:typename:int ZEXPORT
inflateReset	include/u-boot/zlib.h	/^#  define inflateReset /;"	d
inflateReset	lib/zlib/inflate.c	/^int ZEXPORT inflateReset(z_streamp strm)$/;"	f	typeref:typename:int ZEXPORT
inflateSetDictionary	include/u-boot/zlib.h	/^#  define inflateSetDictionary /;"	d
inflateSync	include/u-boot/zlib.h	/^#  define inflateSync /;"	d
inflateSyncPoint	include/u-boot/zlib.h	/^#  define inflateSyncPoint /;"	d
inflate_fast	lib/zlib/inffast.c	/^void inflate_fast(z_streamp strm, unsigned start)$/;"	f	typeref:typename:void
inflate_mode	lib/zlib/inflate.h	/^} inflate_mode;$/;"	t	typeref:enum:__anon43d5a4c40103
inflate_state	lib/zlib/inflate.h	/^struct inflate_state {$/;"	s
inflate_table	lib/zlib/inftrees.c	/^int inflate_table(codetype type, unsigned short FAR *lens, unsigned codes,$/;"	f	typeref:typename:int
info	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct ram_info info;$/;"	m	struct:dram_info	typeref:struct:ram_info	file:
info	arch/arm/mach-uniphier/boot-mode/boot-device.h	/^	char *info;$/;"	m	struct:boot_device_info	typeref:typename:char *
info	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define info(/;"	d	file:
info	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define info(/;"	d	file:
info	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define info(/;"	d	file:
info	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long info;	\/* Max Lenght \/ Endpoint \/ device address and PID *\/$/;"	m	struct:__anon66fd0d690108	typeref:typename:unsigned long
info	board/mpl/common/usb_uhci.h	/^	unsigned long info;     \/* Max Lenght \/ Endpoint \/ device address and PID *\/$/;"	m	struct:__anon0a2b4c740108	typeref:typename:unsigned long
info	drivers/crypto/fsl/jr.h	/^	struct jr_info info[JR_SIZE];$/;"	m	struct:jobring	typeref:struct:jr_info[]
info	drivers/fpga/altera.c	/^	int			(*info)(Altera_desc *);$/;"	m	struct:altera_fpga	typeref:typename:int (*)(Altera_desc *)	file:
info	drivers/mtd/nand/sunxi_nand.c	/^	} info;$/;"	m	struct:sunxi_nand_rb	typeref:union:sunxi_nand_rb::__anon4f97023f010a	file:
info	drivers/net/mvpp2.c	/^	u16 info;$/;"	m	struct:mvpp2_buff_hdr	typeref:typename:u16	file:
info	drivers/pinctrl/nxp/pinctrl-imx.h	/^	struct imx_pinctrl_soc_info *info;$/;"	m	struct:imx_pinctrl_priv	typeref:struct:imx_pinctrl_soc_info *
info	drivers/usb/gadget/ci_udc.h	/^	unsigned info;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
info	drivers/usb/gadget/ci_udc.h	/^	unsigned info;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
info	drivers/usb/host/ohci-hcd.c	/^#define info(/;"	d	file:
info	drivers/usb/host/ohci-s3c24xx.c	/^#define info(/;"	d	file:
info	drivers/video/fsl_dcu_fb.c	/^static struct fb_info info;$/;"	v	typeref:struct:fb_info	file:
info	drivers/video/fsl_diu_fb.c	/^static struct fb_info info;$/;"	v	typeref:struct:fb_info	file:
info	include/MCD_dma.h	/^	u32 info;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:u32
info	include/api_public.h	/^	} info;$/;"	m	struct:device_info	typeref:union:device_info::__anonf417d2e6020a
info	include/efi.h	/^	struct efi_info_hdr *info;$/;"	m	struct:efi_priv	typeref:struct:efi_info_hdr *
info	include/efi_api.h	/^	struct efi_gop_mode_info *info;$/;"	m	struct:efi_gop_mode	typeref:struct:efi_gop_mode_info *
info	include/linux/fb.h	/^	struct fb_info *info;$/;"	m	struct:fb_event	typeref:struct:fb_info *
info	include/xilinx.h	/^	int (*info)(xilinx_desc *);$/;"	m	struct:xilinx_fpga_op	typeref:typename:int (*)(xilinx_desc *)
info	lib/efi_loader/efi_gop.c	/^	struct efi_gop_mode_info info;$/;"	m	struct:efi_gop_obj	typeref:struct:efi_gop_mode_info	file:
info	lib/efi_loader/efi_runtime.c	/^	ulong info;$/;"	m	struct:elf_rel	typeref:typename:ulong	file:
info	lib/efi_loader/efi_runtime.c	/^	ulong info;$/;"	m	struct:elf_rela	typeref:typename:ulong	file:
info	scripts/kconfig/qconf.h	/^	ConfigInfoView* info;$/;"	m	class:ConfigSearchWindow	typeref:typename:ConfigInfoView *
info	test/py/multiplexed_log.py	/^    def info(self, msg):$/;"	m	class:Logfile
info	tools/proftool.c	/^#define info(/;"	d	file:
info_data	drivers/mtd/nand/pxa3xx_nand.c	/^	void			*info_data;$/;"	m	struct:pxa3xx_nand_host	typeref:typename:void *	file:
info_flags	include/linux/edd.h	/^	__u16 info_flags;$/;"	m	struct:edd_device_params	typeref:typename:__u16
info_sector	include/fat.h	/^	__u16	info_sector;	\/* Filesystem info sector *\/$/;"	m	struct:boot_sector	typeref:typename:__u16
info_size	include/ddr_spd.h	/^	unsigned char info_size;   \/*  0 # bytes written into serial memory *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
info_size	include/ddr_spd.h	/^	unsigned char info_size;   \/*  0 # bytes written into serial memory *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
info_size	include/efi.h	/^	unsigned int info_size;$/;"	m	struct:efi_priv	typeref:typename:unsigned int
info_size	include/efi_api.h	/^	unsigned long info_size;$/;"	m	struct:efi_gop_mode	typeref:typename:unsigned long
info_size	include/spd.h	/^	unsigned char info_size;   \/*  0 # bytes written into serial memory *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
info_size_crc	include/ddr_spd.h	/^	uint8_t info_size_crc;		\/*  0 # bytes *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
info_size_crc	include/ddr_spd.h	/^	unsigned char info_size_crc;   \/*  0 # bytes written into serial memory,$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
info_valid	drivers/usb/gadget/storage_common.c	/^	unsigned int	info_valid:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
inform0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform0;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
inform0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
inform1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform1;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
inform1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform1;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
inform2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform2;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
inform2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform2;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
inform3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform3;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
inform3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
inform4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform4;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform5;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform6;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
inform7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	inform7;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
infos_list	fs/ubifs/ubifs.h	/^	struct list_head infos_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
inhibit_portals	arch/powerpc/cpu/mpc85xx/portals.c	/^static void inhibit_portals(void __iomem *addr, int max_portals,$/;"	f	typeref:typename:void	file:
ini_handler	cmd/ini.c	/^static int ini_handler(void *user, char *section, char *name, char *value)$/;"	f	typeref:typename:int	file:
ini_parse	cmd/ini.c	/^static int ini_parse(char *filestart, size_t filelen,$/;"	f	typeref:typename:int	file:
init	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 init[6];		\/* 0xd0 SDRAM initialisation register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[6]
init	arch/arm/include/asm/arch-tegra/gpio.h	/^	u32 init:2;$/;"	m	struct:tegra_gpio_config	typeref:typename:u32:2
init	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 init[6];		\/* 0xd0 SDRAM initialisation register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[6]
init	arch/x86/cpu/quark/mrc.c	/^static const struct mem_init init[] = {$/;"	v	typeref:typename:const struct mem_init[]	file:
init	drivers/net/davinci_emac.h	/^	int	(*init)(int phy_addr);$/;"	m	struct:__anon759824920408	typeref:typename:int (*)(int phy_addr)
init	drivers/net/mvneta.c	/^	int init;$/;"	m	struct:mvneta_port	typeref:typename:int	file:
init	drivers/net/mvpp2.c	/^	int init;$/;"	m	struct:mvpp2_port	typeref:typename:int	file:
init	drivers/net/zynq_gem.c	/^	int init;$/;"	m	struct:zynq_gem_priv	typeref:typename:int	file:
init	drivers/qe/uec_phy.h	/^	int (*init) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:int (*)(struct uec_mii_info * mii_info)
init	drivers/usb/eth/r8152.h	/^		void (*init)(struct r8152 *);$/;"	m	struct:r8152::rtl_ops	typeref:typename:void (*)(struct r8152 *)
init	drivers/usb/gadget/at91_udc.h	/^	int (*init)(struct at91_udc *udc);$/;"	m	struct:at91_udc_caps	typeref:typename:int (*)(struct at91_udc * udc)
init	drivers/usb/host/ehci.h	/^	enum usb_init_type init;$/;"	m	struct:ehci_ctrl	typeref:enum:usb_init_type
init	drivers/usb/musb-new/musb_core.h	/^	int	(*init)(struct musb *musb);$/;"	m	struct:musb_platform_ops	typeref:typename:int (*)(struct musb * musb)
init	include/dm/uclass.h	/^	int (*init)(struct uclass *class);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct uclass * class)
init	include/ec_commands.h	/^		} dump, off, on, init, get_seq, get_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::__anon71a6b2670208
init	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
init	include/i2c.h	/^	void		(*init)(struct i2c_adapter *adap, int speed,$/;"	m	struct:i2c_adapter	typeref:typename:void (*)(struct i2c_adapter * adap,int speed,int slaveaddr)
init	include/miiphy.h	/^	int (*init)(struct bb_miiphy_bus *bus);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus)
init	include/mmc.h	/^	int (*init)(struct mmc *mmc);$/;"	m	struct:mmc_ops	typeref:typename:int (*)(struct mmc * mmc)
init	include/net.h	/^	int (*init)(struct eth_device *, bd_t *);$/;"	m	struct:eth_device	typeref:typename:int (*)(struct eth_device *,bd_t *)
init	include/pci_rom.h	/^	uint8_t init[3];$/;"	m	struct:pci_rom_header	typeref:typename:uint8_t[3]
init	include/remoteproc.h	/^	int (*init)(struct udevice *dev);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev)
init	include/spartan2.h	/^	xilinx_init_fn	init;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_init_fn
init	include/spartan2.h	/^	xilinx_init_fn	init;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_init_fn
init	include/spartan3.h	/^	xilinx_init_fn	init;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_init_fn
init	include/spartan3.h	/^	xilinx_init_fn	init;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_init_fn
init	include/virtex2.h	/^	xilinx_init_fn	init;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_init_fn
init	post/board/lwmon5/sysmon.c	/^	void	(*init)(sysmon_t *);$/;"	m	struct:sysmon_s	typeref:typename:void (*)(sysmon_t *)	file:
init	post/cpu/mpc8xx/ether.c	/^	void (*init) (int index);$/;"	m	struct:__anon27059ff10108	typeref:typename:void (*)(int index)	file:
init	post/cpu/mpc8xx/uart.c	/^	void (*init) (int index);$/;"	m	struct:__anon0de951550108	typeref:typename:void (*)(int index)	file:
init	scripts/kconfig/qconf.cc	/^void ConfigItem::init(void)$/;"	f	class:ConfigItem	typeref:typename:void
init-objs	board/xilinx/zynq/Makefile	/^init-objs := $(if $(wildcard $(srctree)\/$(src)\/$(hw-platform-y)\/ps7_init_gpl.c),\\$/;"	m
init-objs	board/xilinx/zynq/Makefile	/^init-objs := ps7_init_gpl.o$/;"	m
init-objs	board/xilinx/zynqmp/Makefile	/^init-objs := $(if $(wildcard $(srctree)\/$(src)\/$(hw-platform-y)\/psu_init_gpl.c),\\$/;"	m
init-objs	board/xilinx/zynqmp/Makefile	/^init-objs := psu_init_gpl.o$/;"	m
init0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 init0;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 init0;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 init1;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 init1;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 init2;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 init2;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 init3;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 init3;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 init4;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 init4;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 init5;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
init5	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 init5;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
initLenVal	board/esd/common/xilinx_jtag/lenval.c	/^void initLenVal( lenVal*    plv,$/;"	f	typeref:typename:void
init_5xxx_core	arch/powerpc/cpu/mpc5xxx/start.S	/^init_5xxx_core:$/;"	l
init_8259A	board/mpl/common/isa.c	/^void init_8259A(void)$/;"	f	typeref:typename:void
init_8260_core	arch/powerpc/cpu/mpc8260/start.S	/^init_8260_core:$/;"	l
init_85xx_watchdog	arch/powerpc/cpu/mpc85xx/cpu.c	/^init_85xx_watchdog(void)$/;"	f	typeref:typename:void
init_RL	lib/bzip2/bzlib.c	/^void init_RL ( EState* s )$/;"	f	typeref:typename:void	file:
init_addr	include/fsl_immap.h	/^	u32	init_addr;		\/* training init addr *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
init_addr_map	arch/powerpc/cpu/mpc85xx/tlb.c	/^void init_addr_map(void)$/;"	f	typeref:typename:void
init_addr_map	arch/powerpc/cpu/mpc86xx/cpu_init.c	/^void init_addr_map(void)$/;"	f	typeref:typename:void
init_after_reset	drivers/usb/host/ehci.h	/^	int (*init_after_reset)(struct ehci_ctrl *ctrl);$/;"	m	struct:ehci_ops	typeref:typename:int (*)(struct ehci_ctrl * ctrl)
init_ahb_bridges	arch/sparc/cpu/leon3/ambapp_low.S	/^init_ahb_bridges:$/;"	l
init_aipi	board/armadeus/apf27/lowlevel_init.S	/^	.macro init_aipi$/;"	m
init_aips	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro init_aips$/;"	m
init_aips	arch/arm/imx-common/init.c	/^void init_aips(void)$/;"	f	typeref:typename:void
init_aips	arch/arm/include/asm/arch-mx35/lowlevel_macro.S	/^.macro init_aips mpr=0x77777777, opacr=0x00000000$/;"	m
init_aips	board/freescale/mx31ads/lowlevel_init.S	/^.macro init_aips$/;"	m
init_aper_clocks	arch/arm/mach-zynq/clk.c	/^static void init_aper_clocks(void)$/;"	f	typeref:typename:void	file:
init_arm_erratum	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro init_arm_erratum$/;"	m
init_bandgap	arch/arm/cpu/armv7/mx6/soc.c	/^static void init_bandgap(void)$/;"	f	typeref:typename:void	file:
init_baud_rate	common/board_f.c	/^static int init_baud_rate(void)$/;"	f	typeref:typename:int	file:
init_bch	lib/bch.c	/^struct bch_control *init_bch(int m, int t, unsigned int prim_poly)$/;"	f	typeref:struct:bch_control *
init_block	drivers/net/pcnet.c	/^	struct pcnet_init_block init_block;$/;"	m	struct:pcnet_uncached_priv	typeref:struct:pcnet_init_block	file:
init_block	lib/zlib/trees.c	/^local void init_block(s)$/;"	f
init_boot_size	tools/rkcommon.c	/^	uint16_t init_boot_size;$/;"	m	struct:header0_info	typeref:typename:uint16_t	file:
init_bsc	board/ms7750se/lowlevel_init.S	/^init_bsc:$/;"	l
init_bsc_cs0	board/renesas/rsk7203/lowlevel_init.S	/^init_bsc_cs0:$/;"	l
init_bsc_cs0	board/renesas/rsk7264/lowlevel_init.S	/^init_bsc_cs0:$/;"	l
init_bsc_cs1	board/renesas/rsk7203/lowlevel_init.S	/^init_bsc_cs1:$/;"	l
init_bsc_cs2	board/renesas/rsk7264/lowlevel_init.S	/^init_bsc_cs2:$/;"	l
init_bsp	arch/x86/cpu/mp_init.c	/^static int init_bsp(struct udevice **devp)$/;"	f	typeref:typename:int	file:
init_cache_f_r	arch/arc/lib/init_helpers.c	/^int init_cache_f_r(void)$/;"	f	typeref:typename:int
init_cache_f_r	arch/x86/lib/init_helpers.c	/^int init_cache_f_r(void)$/;"	f	typeref:typename:int
init_clk_ecspi	arch/arm/cpu/armv7/mx7/clock.c	/^static void init_clk_ecspi(void)$/;"	f	typeref:typename:void	file:
init_clk_epdc	arch/arm/cpu/armv7/mx7/clock.c	/^static void init_clk_epdc(void)$/;"	f	typeref:typename:void	file:
init_clk_esdhc	arch/arm/cpu/armv7/mx7/clock.c	/^static void init_clk_esdhc(void)$/;"	f	typeref:typename:void	file:
init_clk_uart	arch/arm/cpu/armv7/mx7/clock.c	/^static void init_clk_uart(void)$/;"	f	typeref:typename:void	file:
init_clk_wdog	arch/arm/cpu/armv7/mx7/clock.c	/^static void init_clk_wdog(void)$/;"	f	typeref:typename:void	file:
init_clk_weim	arch/arm/cpu/armv7/mx7/clock.c	/^static void init_clk_weim(void)$/;"	f	typeref:typename:void	file:
init_clock	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro init_clock$/;"	m
init_clock	board/armadeus/apf27/lowlevel_init.S	/^	.macro init_clock$/;"	m
init_clock	board/freescale/mx35pdk/lowlevel_init.S	/^.macro init_clock$/;"	m
init_clocks	board/syteco/zmx25/lowlevel_init.S	/^.macro init_clocks$/;"	m
init_cntr_param	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct init_cntr_param {$/;"	s
init_code_tables	fs/jffs2/mini_inflate.c	/^static void init_code_tables(struct huffman_set *set)$/;"	f	typeref:typename:void	file:
init_constants_early	fs/ubifs/super.c	/^static int init_constants_early(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
init_constants_master	fs/ubifs/super.c	/^static void init_constants_master(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
init_constants_sb	fs/ubifs/super.c	/^static int init_constants_sb(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
init_count	arch/arm/mach-sunxi/usb_phy.c	/^	int init_count;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
init_coupler	board/esd/plu405/plu405.c	/^void init_coupler(u32 addr)$/;"	f	typeref:typename:void
init_coupler	board/esd/vom405/vom405.c	/^void init_coupler(u32 addr)$/;"	f	typeref:typename:void
init_cplbtables	arch/blackfin/cpu/cpu.c	/^void init_cplbtables(void)$/;"	f	typeref:typename:void
init_cpld	board/renesas/ap325rxa/cpld-ap325rxa.c	/^void init_cpld(void)$/;"	f	typeref:typename:void
init_cpld_loader	board/renesas/ap325rxa/cpld-ap325rxa.c	/^static void init_cpld_loader(void)$/;"	f	typeref:typename:void	file:
init_cpu_clocks	arch/arm/mach-zynq/clk.c	/^static void init_cpu_clocks(void)$/;"	f	typeref:typename:void	file:
init_cpu_configuration	arch/arm/cpu/armv7/omap5/hwinit.c	/^void init_cpu_configuration(void)$/;"	f	typeref:typename:void
init_cs4	board/freescale/mx31ads/lowlevel_init.S	/^.macro init_cs4$/;"	m
init_csm	arch/m68k/cpu/mcf530x/cpu_init.c	/^void init_csm(void)$/;"	f	typeref:typename:void
init_csu	arch/arm/cpu/armv7/mx7/soc.c	/^static void init_csu(void)$/;"	f	typeref:typename:void	file:
init_dbsc3_400_pad	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^init_dbsc3_400_pad:$/;"	l
init_dbsc3_400_pad	board/renesas/r0p7734/lowlevel_init.S	/^init_dbsc3_400_pad:$/;"	l
init_dbsc3_533_pad	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^init_dbsc3_533_pad:$/;"	l
init_dbsc3_533_pad	board/renesas/r0p7734/lowlevel_init.S	/^init_dbsc3_533_pad:$/;"	l
init_dbsc3_ctrl_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^init_dbsc3_ctrl_400:$/;"	l
init_dbsc3_ctrl_400	board/renesas/r0p7734/lowlevel_init.S	/^init_dbsc3_ctrl_400:$/;"	l
init_dbsc3_ctrl_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^init_dbsc3_ctrl_533:$/;"	l
init_dbsc3_ctrl_533	board/renesas/r0p7734/lowlevel_init.S	/^init_dbsc3_ctrl_533:$/;"	l
init_ddr	board/armadeus/apf27/lowlevel_init.S	/^	.macro init_ddr$/;"	m
init_ddr3param	arch/arm/mach-keystone/ddr3_spd.c	/^static void init_ddr3param(struct ddr3_spd_cb *spd_cb,$/;"	f	typeref:typename:void	file:
init_ddr_clocks	arch/arm/mach-zynq/clk.c	/^static void init_ddr_clocks(void)$/;"	f	typeref:typename:void	file:
init_debug	arch/powerpc/cpu/mpc8260/start.S	/^init_debug:$/;"	l
init_debug_board	board/freescale/mx35pdk/lowlevel_init.S	/^.macro init_debug_board$/;"	m
init_default_gpio	board/amcc/bamboo/bamboo.c	/^void init_default_gpio(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
init_delay	drivers/video/exynos/exynos_fb.c	/^	unsigned int init_delay;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
init_delay	include/exynos_lcd.h	/^	unsigned int init_delay;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
init_desc	drivers/crypto/fsl/desc_constr.h	/^static inline void init_desc(u32 *desc, u32 options)$/;"	f	typeref:typename:void
init_dialog	scripts/kconfig/lxdialog/util.c	/^int init_dialog(const char *backtitle)$/;"	f	typeref:typename:int
init_dialog_colors	scripts/kconfig/lxdialog/util.c	/^static void init_dialog_colors(void)$/;"	f	typeref:typename:void	file:
init_dly	include/tegra-kbc.h	/^	u32 init_dly;$/;"	m	struct:kbc_tegra	typeref:typename:u32
init_dly_ms	drivers/input/tegra-kbc.c	/^	unsigned int init_dly_ms;	\/* Delay before we can read keyboard *\/$/;"	m	struct:tegra_kbd_priv	typeref:typename:unsigned int	file:
init_done	arch/arm/mach-mvebu/timer.c	/^static int init_done __attribute__((section(".data"))) = 0;$/;"	v	typeref:typename:int	file:
init_done	arch/x86/include/asm/me_common.h	/^	u32 init_done:4;$/;"	m	struct:me_did	typeref:typename:u32:4
init_done	drivers/input/ps2mult.c	/^static int init_done = 0;$/;"	v	typeref:typename:int	file:
init_done	drivers/rtc/imxdi.c	/^	int				init_done;$/;"	m	struct:imxdi_data	typeref:typename:int	file:
init_done	include/i2c.h	/^	int		init_done;$/;"	m	struct:i2c_adapter	typeref:typename:int
init_drive_strength	board/freescale/mx31ads/lowlevel_init.S	/^.macro  init_drive_strength$/;"	m
init_dtsec	drivers/net/fm/dtsec.c	/^void init_dtsec(struct fsl_enet_mac *mac, void *base,$/;"	f	typeref:typename:void
init_dwmmc	board/hisilicon/hikey/hikey.c	/^static int init_dwmmc(void)$/;"	f	typeref:typename:int	file:
init_dwmmc	board/samsung/common/board.c	/^static int init_dwmmc(void)$/;"	f	typeref:typename:int	file:
init_e300_core	arch/powerpc/cpu/mpc83xx/start.S	/^init_e300_core: \/* time t 10 *\/$/;"	l
init_early_memctl_regs	arch/powerpc/cpu/mpc8xxx/fsl_lbc.c	/^void init_early_memctl_regs(void)$/;"	f	typeref:typename:void
init_early_memctl_regs	drivers/misc/fsl_ifc.c	/^void init_early_memctl_regs(void)$/;"	f	typeref:typename:void
init_eeprom	board/varisys/common/sys_eeprom.c	/^void init_eeprom(int bus_num, int addr, int addr_len)$/;"	f	typeref:typename:void
init_elem	board/motionpro/motionpro.c	/^struct init_elem {$/;"	s	file:
init_enet_param_offset	drivers/qe/uec.h	/^	u32				init_enet_param_offset;$/;"	m	struct:uec_private	typeref:typename:u32
init_ethernet_mac	board/renesas/sh7752evb/sh7752evb.c	/^static void init_ethernet_mac(void)$/;"	f	typeref:typename:void	file:
init_ethernet_mac	board/renesas/sh7753evb/sh7753evb.c	/^static void init_ethernet_mac(void)$/;"	f	typeref:typename:void	file:
init_ethernet_mac	board/renesas/sh7757lcr/sh7757lcr.c	/^static void init_ethernet_mac(void)$/;"	f	typeref:typename:void	file:
init_ext_addr	include/fsl_immap.h	/^	u32	init_ext_addr;		\/* training init extended addr *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
init_f	include/post.h	/^	int (*init_f) (void);$/;"	m	struct:post_test	typeref:typename:int (*)(void)
init_fan	board/LaCie/net2big_v2/net2big_v2.c	/^static void init_fan(void) {}$/;"	f	typeref:typename:void	file:
init_fan	board/LaCie/net2big_v2/net2big_v2.c	/^static void init_fan(void)$/;"	f	typeref:typename:void	file:
init_fan_controller	board/gdsys/common/fanctrl.c	/^void init_fan_controller(u8 addr)$/;"	f	typeref:typename:void
init_fbcs	arch/m68k/cpu/mcf52x2/cpu_init.c	/^void init_fbcs(void)$/;"	f	typeref:typename:void
init_fbcs	arch/m68k/cpu/mcf5445x/cpu_init.c	/^void init_fbcs(void)$/;"	f	typeref:typename:void
init_final_memctl_regs	drivers/misc/fsl_ifc.c	/^void init_final_memctl_regs(void)$/;"	f	typeref:typename:void
init_flag	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^	u32 init_flag;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:u32	file:
init_flag	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^	u32 init_flag;$/;"	m	struct:ddrphy_init_sequence	typeref:typename:u32	file:
init_fn	arch/x86/include/asm/arch-quark/mrc.h	/^	void (*init_fn)(struct mrc_params *mrc_params);$/;"	m	struct:mem_init	typeref:typename:void (*)(struct mrc_params * mrc_params)
init_fnc_t	include/initcall.h	/^typedef int (*init_fnc_t)(void);$/;"	t	typeref:typename:int (*)(void)
init_freq	drivers/ddr/marvell/a38x/ddr3_training.c	/^enum hws_ddr_freq init_freq = DDR_FREQ_667;$/;"	v	typeref:enum:hws_ddr_freq
init_fslspclksel	drivers/usb/host/dwc2.c	/^static void init_fslspclksel(struct dwc2_core_regs *regs)$/;"	f	typeref:typename:void	file:
init_func_i2c	common/board_f.c	/^static int init_func_i2c(void)$/;"	f	typeref:typename:int	file:
init_func_ram	common/board_f.c	/^static int init_func_ram(void)$/;"	f	typeref:typename:int	file:
init_func_spi	common/board_f.c	/^static int init_func_spi(void)$/;"	f	typeref:typename:int	file:
init_func_watchdog_init	common/board_f.c	/^static int init_func_watchdog_init(void)$/;"	f	typeref:typename:int	file:
init_func_watchdog_reset	common/board_f.c	/^int init_func_watchdog_reset(void)$/;"	f	typeref:typename:int
init_gctrl	board/renesas/sh7757lcr/sh7757lcr.c	/^static void init_gctrl(void)$/;"	f	typeref:typename:void	file:
init_gether_mdio	board/renesas/sh7752evb/sh7752evb.c	/^static void init_gether_mdio(void)$/;"	f	typeref:typename:void	file:
init_gether_mdio	board/renesas/sh7753evb/sh7753evb.c	/^static void init_gether_mdio(void)$/;"	f	typeref:typename:void	file:
init_gpio	board/renesas/sh7752evb/sh7752evb.c	/^static void init_gpio(void)$/;"	f	typeref:typename:void	file:
init_gpio	board/renesas/sh7753evb/sh7753evb.c	/^static void init_gpio(void)$/;"	f	typeref:typename:void	file:
init_gpio	board/v38b/ethaddr.c	/^static void init_gpio()$/;"	f	typeref:typename:void	file:
init_hashtable	drivers/net/armada100_fec.c	/^static void init_hashtable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
init_ide_reset	arch/powerpc/cpu/mpc512x/ide.c	/^void init_ide_reset (void)$/;"	f	typeref:typename:void
init_ide_reset	board/intercontrol/digsy_mtc/digsy_mtc.c	/^void init_ide_reset(void)$/;"	f	typeref:typename:void
init_ide_reset	board/jupiter/jupiter.c	/^void init_ide_reset (void)$/;"	f	typeref:typename:void
init_ide_reset	board/phytec/pcm030/pcm030.c	/^void init_ide_reset(void)$/;"	f	typeref:typename:void
init_ide_reset	board/tqc/tqm5200/tqm5200.c	/^void init_ide_reset (void)$/;"	f	typeref:typename:void
init_ide_reset	board/v38b/v38b.c	/^void init_ide_reset(void)$/;"	f	typeref:typename:void
init_in_progress	include/mmc.h	/^	char init_in_progress;	\/* 1 if we have done mmc_start_init() *\/$/;"	m	struct:mmc	typeref:typename:char
init_ios	board/mpl/pati/pati.c	/^ void init_ios(void)$/;"	f	typeref:typename:void
init_job_desc	drivers/crypto/fsl/desc_constr.h	/^static inline void init_job_desc(u32 *desc, u32 options)$/;"	f	typeref:typename:void
init_job_desc_pdb	drivers/crypto/fsl/desc_constr.h	/^static inline void init_job_desc_pdb(u32 *desc, u32 options, size_t pdb_bytes)$/;"	f	typeref:typename:void
init_kona_mmc_core	drivers/mmc/kona_sdhci.c	/^static int init_kona_mmc_core(struct sdhci_host *host)$/;"	f	typeref:typename:int	file:
init_l2cc	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro init_l2cc$/;"	m
init_laws	arch/powerpc/cpu/mpc8xxx/law.c	/^void init_laws(void)$/;"	f	typeref:typename:void
init_laws	board/freescale/qemu-ppce500/qemu-ppce500.c	/^void init_laws(void)$/;"	f	typeref:typename:void
init_lbsc_400	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^init_lbsc_400:$/;"	l
init_lbsc_400	board/renesas/r0p7734/lowlevel_init.S	/^init_lbsc_400:$/;"	l
init_lbsc_533	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^init_lbsc_533:$/;"	l
init_lbsc_533	board/renesas/r0p7734/lowlevel_init.S	/^init_lbsc_533:$/;"	l
init_lcd	board/sysam/amcore/amcore.c	/^void init_lcd(void)$/;"	f	typeref:typename:void
init_led	board/Barix/ipam390/ipam390.c	/^static int init_led(int gpio, char *name, int val)$/;"	f	typeref:typename:int	file:
init_leds	board/LaCie/net2big_v2/net2big_v2.c	/^static void init_leds(void) {}$/;"	f	typeref:typename:void	file:
init_leds	board/LaCie/net2big_v2/net2big_v2.c	/^static void init_leds(void)$/;"	f	typeref:typename:void	file:
init_left_tree	scripts/kconfig/gconf.c	/^void init_left_tree(void)$/;"	f	typeref:typename:void
init_lpddr	board/syteco/zmx25/lowlevel_init.S	/^.macro init_lpddr$/;"	m
init_m3if	arch/arm/include/asm/arch-mx35/lowlevel_macro.S	/^.macro init_m3if ctl=0x00000040$/;"	m
init_m3if	board/freescale/mx31ads/lowlevel_init.S	/^.macro init_m3if$/;"	m
init_m4if	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro init_m4if$/;"	m
init_mac	drivers/net/fm/fm.h	/^	void (*init_mac)(struct fsl_enet_mac *mac);$/;"	m	struct:fsl_enet_mac	typeref:typename:void (*)(struct fsl_enet_mac * mac)
init_main_window	scripts/kconfig/gconf.c	/^void init_main_window(const gchar * glade_file)$/;"	f	typeref:typename:void
init_max	arch/arm/include/asm/arch-mx35/lowlevel_macro.S	/^.macro init_max mpr=0x00302154, sgpcr=0x00000010, mgpcr=0x00000000$/;"	m
init_max	board/freescale/mx31ads/lowlevel_init.S	/^.macro init_max$/;"	m
init_memac	drivers/net/fm/memac.c	/^void init_memac(struct fsl_enet_mac *mac, void *base,$/;"	f	typeref:typename:void
init_mii_management_configuration	drivers/qe/uec.c	/^static int init_mii_management_configuration(uec_mii_t *uec_mii_regs)$/;"	f	typeref:typename:int	file:
init_mmc	board/samsung/common/board.c	/^static int init_mmc(void)$/;"	f	typeref:typename:int	file:
init_mmc_device	cmd/mmc.c	/^static struct mmc *init_mmc_device(int dev, bool force_init)$/;"	f	typeref:struct:mmc *	file:
init_mmc_for_env	common/env_mmc.c	/^static const char *init_mmc_for_env(struct mmc *mmc)$/;"	f	typeref:typename:const char *	file:
init_mtd	drivers/mtd/mtdcore.c	/^static int __init init_mtd(void)$/;"	f	typeref:typename:int __init	file:
init_mute_pin	board/bct-brettl2/bct-brettl2.c	/^static void init_mute_pin(void)$/;"	f	typeref:typename:void	file:
init_name_hash	fs/jffs2/jffs2_nand_private.h	/^#define init_name_hash(/;"	d
init_offset	tools/rkcommon.c	/^	uint16_t init_offset;$/;"	m	struct:header0_info	typeref:typename:uint16_t	file:
init_omap_revision	arch/arm/cpu/armv7/omap4/hwinit.c	/^void init_omap_revision(void)$/;"	f	typeref:typename:void
init_omap_revision	arch/arm/cpu/armv7/omap5/hwinit.c	/^void init_omap_revision(void)$/;"	f	typeref:typename:void
init_omap_tags	board/nokia/rx51/rx51.c	/^static void init_omap_tags(void)$/;"	f	typeref:typename:void	file:
init_one_color	scripts/kconfig/lxdialog/util.c	/^static void init_one_color(struct dialog_color *color)$/;"	f	typeref:typename:void	file:
init_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const init_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
init_pcie	board/renesas/sh7757lcr/sh7757lcr.c	/^static void init_pcie(void)$/;"	f	typeref:typename:void	file:
init_pcie_bridge	board/renesas/sh7757lcr/sh7757lcr.c	/^static void init_pcie_bridge(void)$/;"	f	typeref:typename:void	file:
init_pcie_bridge_from_spi	board/renesas/sh7757lcr/sh7757lcr.c	/^static int init_pcie_bridge_from_spi(void *buf, size_t size)$/;"	f	typeref:typename:int	file:
init_periph_clocks	arch/arm/mach-zynq/clk.c	/^static void init_periph_clocks(void)$/;"	f	typeref:typename:void	file:
init_peripheral_ep	drivers/usb/musb-new/musb_gadget.c	/^init_peripheral_ep(struct musb *musb, struct musb_ep *ep, u8 epnum, int is_in)$/;"	f	typeref:typename:void __devinit	file:
init_pfc_sh7734	board/renesas/r0p7734/lowlevel_init.S	/^init_pfc_sh7734:$/;"	l
init_phy	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	int init_phy;$/;"	m	struct:init_cntr_param	typeref:typename:int
init_phy	drivers/net/fm/eth.c	/^static int init_phy(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
init_phy	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int init_phy(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
init_phy	drivers/net/tsec.c	/^static int init_phy(struct tsec_private *priv)$/;"	f	typeref:typename:int	file:
init_phy	drivers/net/vsc9953.c	/^static int init_phy(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
init_phy	drivers/qe/uec.c	/^static int init_phy(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
init_phy_mux	drivers/usb/host/ehci-tegra.c	/^static void init_phy_mux(struct fdt_usb *config, uint pts,$/;"	f	typeref:typename:void	file:
init_pll	arch/arm/mach-keystone/clock.c	/^void init_pll(const struct pll_init_data *data)$/;"	f	typeref:typename:void
init_pll_866	arch/powerpc/cpu/mpc8xx/speed.c	/^static long init_pll_866 (long clk)$/;"	f	typeref:typename:long	file:
init_plls	arch/arm/mach-keystone/clock.c	/^void init_plls(void)$/;"	f	typeref:typename:void
init_pllx	arch/arm/mach-tegra/cpu.c	/^void init_pllx(void)$/;"	f	typeref:typename:void
init_pmc_scratch	arch/arm/mach-tegra/ap.c	/^static void init_pmc_scratch(void)$/;"	f	typeref:typename:void	file:
init_pmic_lcd	board/samsung/universal_c210/universal.c	/^static void init_pmic_lcd(void)$/;"	f	typeref:typename:void	file:
init_post	common/board_f.c	/^static int init_post(void)$/;"	f	typeref:typename:int	file:
init_reg_OK	board/armltd/integrator/lowlevel_init.S	/^init_reg_OK:$/;"	l
init_registers	drivers/net/tsec.c	/^static void init_registers(struct tsec __iomem *regs)$/;"	f	typeref:typename:void	file:
init_regs	board/ipek01/ipek01.c	/^static const gdc_regs init_regs[] = {$/;"	v	typeref:typename:const gdc_regs[]	file:
init_regs	board/liebherr/lwmon5/lwmon5.c	/^static const gdc_regs init_regs [] = {$/;"	v	typeref:typename:const gdc_regs[]	file:
init_regs	board/socrates/socrates.c	/^static const gdc_regs init_regs [] =$/;"	v	typeref:typename:const gdc_regs[]	file:
init_regs	board/tqc/tqm5200/tqm5200.c	/^static const SMI_REGS init_regs [] =$/;"	v	typeref:typename:const SMI_REGS[]	file:
init_reset_0_cke_0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	init_reset_0_cke_0;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
init_reset_1_cke_0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	init_reset_1_cke_0;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
init_right_tree	scripts/kconfig/gconf.c	/^void init_right_tree(void)$/;"	f	typeref:typename:void
init_rwsem	include/linux/compat.h	/^#define init_rwsem(/;"	d
init_rx_desc	drivers/net/calxedaxgmac.c	/^static void init_rx_desc(struct calxeda_eth_dev *priv)$/;"	f	typeref:typename:void	file:
init_rx_ring	drivers/net/eepro100.c	/^static void init_rx_ring (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
init_sata	arch/arm/cpu/armv7/omap-common/sata.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/dwc_ahsata.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/fsl_sata.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/pata_bfin.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/sata_ceva.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/sata_dwc.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/sata_mv.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/sata_sandbox.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/sata_sil.c	/^int init_sata(int dev)$/;"	f	typeref:typename:int
init_sata	drivers/block/sata_sil3114.c	/^int init_sata (int dev)$/;"	f	typeref:typename:int
init_sdram	board/mpl/mip405/mip405.c	/^int init_sdram (void)$/;"	f	typeref:typename:int
init_sdram	board/renesas/rsk7203/lowlevel_init.S	/^init_sdram:$/;"	l
init_sdram	board/renesas/rsk7264/lowlevel_init.S	/^init_sdram:$/;"	l
init_sdram_start	board/freescale/mx35pdk/lowlevel_init.S	/^init_sdram_start:$/;"	l
init_seen	drivers/mtd/ubi/fastmap.c	/^static inline int *init_seen(struct ubi_device *ubi)$/;"	f	typeref:typename:int *	file:
init_seq	board/motionpro/motionpro.c	/^	} init_seq[] = {$/;"	v	typeref:struct:init_elem[]
init_seq	drivers/video/scf0403_lcd.c	/^	struct scf0403_initseq_entry *init_seq;$/;"	m	struct:scf0403_priv	typeref:struct:scf0403_initseq_entry *	file:
init_sequence	arch/arm/mach-uniphier/dram/ddrphy-training.c	/^static const struct ddrphy_init_sequence init_sequence[] = {$/;"	v	typeref:typename:const struct ddrphy_init_sequence[]	file:
init_sequence_f	common/board_f.c	/^static init_fnc_t init_sequence_f[] = {$/;"	v	typeref:typename:init_fnc_t[]	file:
init_sequence_f_r	common/board_f.c	/^static init_fnc_t init_sequence_f_r[] = {$/;"	v	typeref:typename:init_fnc_t[]	file:
init_sequence_r	common/board_r.c	/^init_fnc_t init_sequence_r[] = {$/;"	v	typeref:typename:init_fnc_t[]
init_size	arch/x86/include/asm/bootparam.h	/^	__u32	init_size;$/;"	m	struct:setup_header	typeref:typename:__u32
init_size	tools/rkcommon.c	/^	uint16_t init_size;$/;"	m	struct:header0_info	typeref:typename:uint16_t	file:
init_smsc9303i_mii	board/bct-brettl2/smsc9303.c	/^int init_smsc9303i_mii(void)$/;"	f	typeref:typename:int
init_spi	drivers/rtc/ds1306.c	/^static void init_spi (void)$/;"	f	typeref:typename:void	file:
init_src	arch/arm/imx-common/init.c	/^void init_src(void)$/;"	f	typeref:typename:void
init_stack	arch/arm/include/asm/processor.h	/^#define init_stack	/;"	d
init_stack	arch/powerpc/include/asm/processor.h	/^#define init_stack	/;"	d
init_stream	fs/jffs2/mini_inflate.c	/^static void init_stream(struct bitstream *stream, unsigned char *data,$/;"	f	typeref:typename:void	file:
init_task	arch/arm/include/asm/processor.h	/^#define init_task	/;"	d
init_task	arch/powerpc/include/asm/processor.h	/^#define init_task	/;"	d
init_tgec	drivers/net/fm/tgec.c	/^void init_tgec(struct fsl_enet_mac *mac, void *base,$/;"	f	typeref:typename:void
init_timebase	arch/powerpc/lib/time.c	/^int init_timebase (void)$/;"	f	typeref:typename:int
init_tlbs	arch/powerpc/cpu/mpc85xx/tlb.c	/^__weak void init_tlbs(void)$/;"	f	typeref:typename:__weak void
init_tlbs	board/freescale/qemu-ppce500/qemu-ppce500.c	/^void init_tlbs(void)$/;"	f	typeref:typename:void
init_tlv320aic31	board/bct-brettl2/bct-brettl2.c	/^static void init_tlv320aic31(void)$/;"	f	typeref:typename:void	file:
init_tree_model	scripts/kconfig/gconf.c	/^void init_tree_model(void)$/;"	f	typeref:typename:void
init_tx_desc	drivers/net/calxedaxgmac.c	/^static void init_tx_desc(struct calxeda_eth_dev *priv)$/;"	f	typeref:typename:void	file:
init_type	arch/powerpc/cpu/mpc8xxx/cpu.c	/^static inline u32 init_type(u32 cluster, int init_id)$/;"	f	typeref:typename:u32	file:
init_type	drivers/usb/host/ehci-mx6.c	/^	enum usb_init_type init_type;$/;"	m	struct:ehci_mx6_priv_data	typeref:enum:usb_init_type	file:
init_type	drivers/usb/host/ehci-tegra.c	/^	enum usb_init_type init_type;$/;"	m	struct:fdt_usb	typeref:enum:usb_init_type	file:
init_type	drivers/usb/host/ehci-vf.c	/^	enum usb_init_type init_type;$/;"	m	struct:ehci_vf_priv_data	typeref:enum:usb_init_type	file:
init_type	include/usb.h	/^	enum usb_init_type init_type;$/;"	m	struct:usb_platdata	typeref:enum:usb_init_type
init_uart	arch/arm/mach-uniphier/arm32/debug_ll.S	/^init_uart:$/;"	l
init_ulpi_usb_controller	drivers/usb/host/ehci-tegra.c	/^static int init_ulpi_usb_controller(struct fdt_usb *config,$/;"	f	typeref:typename:int	file:
init_usb_phy	board/renesas/sh7752evb/sh7752evb.c	/^static void init_usb_phy(void)$/;"	f	typeref:typename:void	file:
init_usb_phy	board/renesas/sh7753evb/sh7753evb.c	/^static void init_usb_phy(void)$/;"	f	typeref:typename:void	file:
init_usb_phy	board/renesas/sh7757lcr/sh7757lcr.c	/^static void init_usb_phy(void)$/;"	f	typeref:typename:void	file:
init_used_tlb_cams	arch/powerpc/cpu/mpc85xx/tlb.c	/^void init_used_tlb_cams(void)$/;"	f	typeref:typename:void
init_utmi_usb_controller	drivers/usb/host/ehci-tegra.c	/^static int init_utmi_usb_controller(struct fdt_usb *config,$/;"	f	typeref:typename:int	file:
init_voltage	drivers/power/regulator/pwm_regulator.c	/^	unsigned int init_voltage;$/;"	m	struct:pwm_regulator_info	typeref:typename:unsigned int	file:
init_volumes	drivers/mtd/ubi/vtbl.c	/^static int init_volumes(struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
init_wMaxPacketSize	drivers/serial/usbtty.c	/^#define init_wMaxPacketSize(/;"	d	file:
init_waitqueue_head	include/linux/compat.h	/^#define init_waitqueue_head(/;"	d
initcall_run_list	lib/initcall.c	/^int initcall_run_list(const init_fnc_t init_sequence[])$/;"	f	typeref:typename:int
initcode	arch/blackfin/cpu/initcode.c	/^void initcode(ADI_BOOT_DATA *bs)$/;"	f	typeref:typename:BOOTROM_CALLED_FUNC_ATTR void
initdram	arch/mips/mach-ath79/dram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	arch/mips/mach-pic32/cpu.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	arch/powerpc/cpu/mpc85xx/cpu.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	arch/powerpc/cpu/ppc4xx/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/BuS/eb_cpu5282/eb_cpu5282.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/a3m071/a3m071.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/a4m072/a4m072.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/amcc/acadia/memory.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/amcc/bamboo/bamboo.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/amcc/bubinga/bubinga.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/amcc/sequoia/sdram.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/amcc/walnut/walnut.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/amcc/yosemite/yosemite.c	/^phys_size_t initdram(int board)$/;"	f	typeref:typename:phys_size_t
initdram	board/astro/mcf5373l/mcf5373l.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/canmb/canmb.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/cm5200/cm5200.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/cobra5272/cobra5272.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/davedenx/aria/aria.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/dbau1x00/dbau1x00.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/esd/mecp5123/mecp5123.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/esd/pmc440/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/esd/vme8349/vme8349.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/b4860qds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/corenet_ds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls1021aqds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls1043aqds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls1043ardb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls1046aqds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls1046ardb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls2080a/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls2080aqds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/ls2080ardb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5208evbe/m5208evbe.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m52277evb/m52277evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5235evb/m5235evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5249evb/m5249evb.c	/^phys_size_t initdram (int board_type) {$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5253demo/m5253demo.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5253evbe/m5253evbe.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5272c3/m5272c3.c	/^phys_size_t initdram (int board_type) {$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5275evb/m5275evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5282evb/m5282evb.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m53017evb/m53017evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5329evb/m5329evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m5373evb/m5373evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m54418twr/m54418twr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m54451evb/m54451evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m54455evb/m54455evb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m547xevb/m547xevb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/m548xevb/m548xevb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc5121ads/mpc5121ads.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8308rdb/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8313erdb/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8315erdb/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8323erdb/mpc8323erdb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc832xemds/mpc832xemds.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8349emds/mpc8349emds.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8349itx/mpc8349itx.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc837xemds/mpc837xemds.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc837xerdb/mpc837xerdb.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/p2041rdb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t102xqds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t102xrdb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t1040qds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t104xrdb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t208xqds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t208xrdb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t4qds/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/freescale/t4rdb/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/gaisler/gr_ep2s60/gr_ep2s60.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/gaisler/grsim/grsim.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/gaisler/grsim_leon2/grsim_leon2.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/gdsys/mpc8308/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/ids/ids8313/ids8313.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/ifm/ac14xx/ac14xx.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/ifm/o2dnt2/o2dnt2.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/imgtec/boston/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/imgtec/malta/malta.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/imgtec/xilfpga/xilfpga.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/inka4x0/inka4x0.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/intercontrol/digsy_mtc/digsy_mtc.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/ipek01/ipek01.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/jupiter/jupiter.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/keymile/km82xx/km82xx.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/keymile/km83xx/km83xx.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/keymile/kmp204x/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/liebherr/lwmon5/sdram.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/micronas/vct/vct.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/motionpro/motionpro.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/mpc8308_p1m/sdram.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/mpl/mip405/mip405.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/mpl/pati/pati.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/mpl/pip405/pip405.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/munices/munices.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/openrisc/openrisc-generic/openrisc-generic.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/pb1x00/pb1x00.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/pdm360ng/pdm360ng.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/phytec/pcm030/pcm030.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/qemu-mips/qemu-mips.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/sbc8349/sbc8349.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/sbc8641d/sbc8641d.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/sysam/amcore/amcore.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/tqc/tqm5200/tqm5200.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/tqc/tqm834x/tqm834x.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/tqc/tqm8xx/tqm8xx.c	/^phys_size_t initdram (int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/v38b/v38b.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/varisys/cyrus/ddr.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/ve8313/ve8313.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/xes/xpedite1000/xpedite1000.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/xes/xpedite517x/xpedite517x.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/xilinx/ppc405-generic/xilinx_ppc405_generic.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram	board/xilinx/ppc440-generic/xilinx_ppc440_generic.c	/^phys_size_t initdram(int board_type)$/;"	f	typeref:typename:phys_size_t
initdram_by_rb	board/esd/pmc440/sdram.c	/^int initdram_by_rb(int rows, int banks)$/;"	f	typeref:typename:int
inited	arch/sandbox/cpu/sdl.c	/^	bool inited;$/;"	m	struct:sdl_info	typeref:typename:bool	file:
inited	drivers/i2c/tegra_i2c.c	/^	int			inited;	\/* bus is inited *\/$/;"	m	struct:i2c_bus	typeref:typename:int	file:
inited	drivers/input/tegra-kbc.c	/^	unsigned char inited;		\/* 1 if keyboard has been inited *\/$/;"	m	struct:tegra_kbd_priv	typeref:typename:unsigned char	file:
inited	include/dfu.h	/^	unsigned int inited:1;$/;"	m	struct:dfu_entity	typeref:typename:unsigned int:1
initf_console_record	common/board_f.c	/^static int initf_console_record(void)$/;"	f	typeref:typename:int	file:
initf_dm	common/board_f.c	/^static int initf_dm(void)$/;"	f	typeref:typename:int	file:
initf_malloc	common/dlmalloc.c	/^int initf_malloc(void)$/;"	f	typeref:typename:int
initial_top	common/dlmalloc.c	/^#define initial_top /;"	d	file:
initial_usb_scan_delay	arch/arm/mach-sunxi/usb_phy.c	/^static int initial_usb_scan_delay = CONFIG_INITIAL_USB_SCAN_DELAY;$/;"	v	typeref:typename:int	file:
initialise	fs/yaffs2/yaffs_nandif.h	/^	int (*initialise)(struct yaffs_dev *dev);$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev)
initialise_dma	drivers/pci/w83c553f.c	/^void initialise_dma(void)$/;"	f	typeref:typename:void
initialise_flash_fn	fs/yaffs2/yaffs_guts.h	/^	int (*initialise_flash_fn) (struct yaffs_dev *dev);$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev)
initialise_ns87308	drivers/misc/ns87308.c	/^void initialise_ns87308 (void)$/;"	f	typeref:typename:void
initialise_pic	drivers/pci/w83c553f.c	/^void initialise_pic(void)$/;"	f	typeref:typename:void
initialise_spaces	cmd/tpm_test.c	/^static void initialise_spaces(void)$/;"	f	typeref:typename:void	file:
initialise_w83c553f	drivers/pci/w83c553f.c	/^void initialise_w83c553f(void)$/;"	f	typeref:typename:void
initialisedOk	lib/bzip2/bzlib.c	/^      Bool      initialisedOk;$/;"	m	struct:__anonb9ba2b050108	typeref:typename:Bool	file:
initialize_context	common/cli_hush.c	/^static void initialize_context(struct p_context *ctx)$/;"	f	typeref:typename:void	file:
initialize_dpmac_to_slot	board/freescale/ls2080aqds/eth.c	/^static void initialize_dpmac_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_dram_values	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void initialize_dram_values(void)$/;"	f	typeref:typename:void	file:
initialize_hps_phy	drivers/ddr/altera/sequencer.c	/^static void initialize_hps_phy(void)$/;"	f	typeref:typename:void	file:
initialize_hw_bits_disable	drivers/net/e1000.h	/^	bool		initialize_hw_bits_disable;$/;"	m	struct:e1000_hw	typeref:typename:bool
initialize_lane_to_slot	board/freescale/b4860qds/eth_b4860qds.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_lane_to_slot	board/freescale/corenet_ds/eth_hydra.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_lane_to_slot	board/freescale/corenet_ds/eth_superhydra.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_lane_to_slot	board/freescale/p2041rdb/eth.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_lane_to_slot	board/freescale/t102xqds/eth_t102xqds.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_lane_to_slot	board/freescale/t1040qds/eth.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_lane_to_slot	board/freescale/t208xqds/eth_t208xqds.c	/^static void initialize_lane_to_slot(void)$/;"	f	typeref:typename:void	file:
initialize_qsgmiiphy_fix	board/freescale/t4qds/eth.c	/^static void initialize_qsgmiiphy_fix(void)$/;"	f	typeref:typename:void	file:
initialize_reg_file	drivers/ddr/altera/sequencer.c	/^static void initialize_reg_file(void)$/;"	f	typeref:typename:void	file:
initialize_tracking	drivers/ddr/altera/sequencer.c	/^static void initialize_tracking(void)$/;"	f	typeref:typename:void	file:
initialize_unit_leds	board/keymile/km_arm/km_arm.c	/^static int initialize_unit_leds(void)$/;"	f	typeref:typename:int	file:
initialize_vr_config	arch/x86/cpu/broadwell/cpu.c	/^static void initialize_vr_config(struct udevice *dev)$/;"	f	typeref:typename:void	file:
initialized	arch/m68k/include/asm/fec.h	/^	int initialized;$/;"	m	struct:fec_info_s	typeref:typename:int
initialized	arch/m68k/include/asm/fsl_mcdmafec.h	/^	int initialized;$/;"	m	struct:fec_info_dma	typeref:typename:int
initialized	arch/powerpc/cpu/mpc512x/serial.c	/^static unsigned int initialized;$/;"	v	typeref:typename:unsigned int	file:
initialized	arch/powerpc/cpu/mpc8xx/fec.c	/^	int initialized;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
initialized	common/kgdb.c	/^static int initialized = 0;$/;"	v	typeref:typename:int	file:
initialized	drivers/mmc/gen_atmel_mci.c	/^	unsigned int		initialized:1;$/;"	m	struct:atmel_mci_priv	typeref:typename:unsigned int:1	file:
initialized	drivers/net/ne2000_base.c	/^static int initialized = 0;$/;"	v	typeref:typename:int	file:
initialized	fs/cbfs/cbfs.c	/^static int initialized;$/;"	v	typeref:typename:int	file:
initially_ro	drivers/usb/gadget/storage_common.c	/^	unsigned int	initially_ro:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
initiatorMux	include/MCD_dma.h	/^	u32 initiatorMux;	\/* initiator mux control *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
initiator_type	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^static inline u32 initiator_type(u32 cluster, int init_id)$/;"	f	typeref:typename:u32	file:
initr_addr_map	common/board_r.c	/^static int initr_addr_map(void)$/;"	f	typeref:typename:int	file:
initr_ambapp_print	common/board_r.c	/^static int initr_ambapp_print(void)$/;"	f	typeref:typename:int	file:
initr_announce	common/board_r.c	/^static int initr_announce(void)$/;"	f	typeref:typename:int	file:
initr_api	common/board_r.c	/^static int initr_api(void)$/;"	f	typeref:typename:int	file:
initr_barrier	common/board_r.c	/^static int initr_barrier(void)$/;"	f	typeref:typename:int	file:
initr_bbmii	common/board_r.c	/^static int initr_bbmii(void)$/;"	f	typeref:typename:int	file:
initr_bedbug	common/board_r.c	/^static int initr_bedbug(void)$/;"	f	typeref:typename:int	file:
initr_bootstage	common/board_r.c	/^static int initr_bootstage(void)$/;"	f	typeref:typename:int	file:
initr_caches	common/board_r.c	/^static int initr_caches(void)$/;"	f	typeref:typename:int	file:
initr_console_record	common/board_r.c	/^static int initr_console_record(void)$/;"	f	typeref:typename:int	file:
initr_dataflash	common/board_r.c	/^static int initr_dataflash(void)$/;"	f	typeref:typename:int	file:
initr_dm	common/board_r.c	/^static int initr_dm(void)$/;"	f	typeref:typename:int	file:
initr_doc	common/board_r.c	/^static int initr_doc(void)$/;"	f	typeref:typename:int	file:
initr_enable_interrupts	common/board_r.c	/^static int initr_enable_interrupts(void)$/;"	f	typeref:typename:int	file:
initr_env	common/board_r.c	/^static int initr_env(void)$/;"	f	typeref:typename:int	file:
initr_ethaddr	common/board_r.c	/^static int initr_ethaddr(void)$/;"	f	typeref:typename:int	file:
initr_flash	common/board_r.c	/^static int initr_flash(void)$/;"	f	typeref:typename:int	file:
initr_icache_enable	common/board_r.c	/^static int initr_icache_enable(void)$/;"	f	typeref:typename:int	file:
initr_ide	common/board_r.c	/^static int initr_ide(void)$/;"	f	typeref:typename:int	file:
initr_jumptable	common/board_r.c	/^static int initr_jumptable(void)$/;"	f	typeref:typename:int	file:
initr_kbd	common/board_r.c	/^static int initr_kbd(void)$/;"	f	typeref:typename:int	file:
initr_kgdb	common/board_r.c	/^static int initr_kgdb(void)$/;"	f	typeref:typename:int	file:
initr_logbuffer	common/board_r.c	/^static int initr_logbuffer(void)$/;"	f	typeref:typename:int	file:
initr_malloc	common/board_r.c	/^static int initr_malloc(void)$/;"	f	typeref:typename:int	file:
initr_malloc_bootparams	common/board_r.c	/^static int initr_malloc_bootparams(void)$/;"	f	typeref:typename:int	file:
initr_manual_reloc_cmdtable	common/board_r.c	/^static int initr_manual_reloc_cmdtable(void)$/;"	f	typeref:typename:int	file:
initr_mem	common/board_r.c	/^int initr_mem(void)$/;"	f	typeref:typename:int
initr_mmc	common/board_r.c	/^static int initr_mmc(void)$/;"	f	typeref:typename:int	file:
initr_nand	common/board_r.c	/^static int initr_nand(void)$/;"	f	typeref:typename:int	file:
initr_net	common/board_r.c	/^static int initr_net(void)$/;"	f	typeref:typename:int	file:
initr_noncached	common/board_r.c	/^static int initr_noncached(void)$/;"	f	typeref:typename:int	file:
initr_onenand	common/board_r.c	/^static int initr_onenand(void)$/;"	f	typeref:typename:int	file:
initr_pci	common/board_r.c	/^static int initr_pci(void)$/;"	f	typeref:typename:int	file:
initr_pcmcia	common/board_r.c	/^static int initr_pcmcia(void)$/;"	f	typeref:typename:int	file:
initr_post	common/board_r.c	/^static int initr_post(void)$/;"	f	typeref:typename:int	file:
initr_post_backlog	common/board_r.c	/^static int initr_post_backlog(void)$/;"	f	typeref:typename:int	file:
initr_reloc	common/board_r.c	/^static int initr_reloc(void)$/;"	f	typeref:typename:int	file:
initr_reloc_global_data	common/board_r.c	/^static int initr_reloc_global_data(void)$/;"	f	typeref:typename:int	file:
initr_scsi	common/board_r.c	/^static int initr_scsi(void)$/;"	f	typeref:typename:int	file:
initr_secondary_cpu	common/board_r.c	/^static int initr_secondary_cpu(void)$/;"	f	typeref:typename:int	file:
initr_serial	common/board_r.c	/^static int initr_serial(void)$/;"	f	typeref:typename:int	file:
initr_spi	common/board_r.c	/^static int initr_spi(void)$/;"	f	typeref:typename:int	file:
initr_status_led	common/board_r.c	/^static int initr_status_led(void)$/;"	f	typeref:typename:int	file:
initr_trace	common/board_r.c	/^static int initr_trace(void)$/;"	f	typeref:typename:int	file:
initr_trap	common/board_r.c	/^static int initr_trap(void)$/;"	f	typeref:typename:int	file:
initr_unlock_ram_in_cache	common/board_r.c	/^static int initr_unlock_ram_in_cache(void)$/;"	f	typeref:typename:int	file:
initr_w83c553f	common/board_r.c	/^static int initr_w83c553f(void)$/;"	f	typeref:typename:int	file:
initrd	arch/arm/include/asm/setup.h	/^		struct tag_initrd	initrd;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_initrd
initrd	arch/nds32/include/asm/setup.h	/^		struct tag_initrd	initrd;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_initrd
initrd	cmd/pxe.c	/^	char *initrd;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
initrd_addr_max	arch/x86/include/asm/bootparam.h	/^	__u32	initrd_addr_max;$/;"	m	struct:setup_header	typeref:typename:__u32
initrd_end	include/image.h	/^	ulong		initrd_end;$/;"	m	struct:bootm_headers	typeref:typename:ulong
initrd_size	arch/arm/include/asm/setup.h	/^	    unsigned long initrd_size;		\/* 68 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
initrd_start	arch/arm/include/asm/setup.h	/^	    unsigned long initrd_start;		\/* 64 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
initrd_start	include/image.h	/^	ulong		initrd_start;$/;"	m	struct:bootm_headers	typeref:typename:ulong
initstate	drivers/net/enc28j60.c	/^	enum enc_initstate	initstate;$/;"	m	struct:enc_device	typeref:enum:enc_initstate	file:
inject_ecc_error	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static void inject_ecc_error(void *ptr, int par)$/;"	f	typeref:typename:void	file:
inject_region	tools/ifdtool.c	/^int inject_region(char *image, int size, int region_type, char *region_fname)$/;"	f	typeref:typename:int
inka_digin_get_input	board/inka4x0/inkadiag.c	/^static unsigned int inka_digin_get_input(void)$/;"	f	typeref:typename:unsigned int	file:
inka_digio_set_output	board/inka4x0/inkadiag.c	/^static void inka_digio_set_output(unsigned int state, int which)$/;"	f	typeref:typename:void	file:
inl	arch/arm/include/asm/io.h	/^#define inl(/;"	d
inl	arch/avr32/include/asm/io.h	/^#define inl(/;"	d
inl	arch/blackfin/include/asm/io.h	/^#define inl(/;"	d
inl	arch/m68k/include/asm/io.h	/^#define inl(/;"	d
inl	arch/microblaze/include/asm/io.h	/^#define inl(/;"	d
inl	arch/nds32/include/asm/io.h	/^#define inl(/;"	d
inl	arch/nios2/include/asm/io.h	/^#define inl(/;"	d
inl	arch/powerpc/include/asm/io.h	/^#define inl(/;"	d
inl	arch/sandbox/lib/pci_io.c	/^int inl(unsigned int addr)$/;"	f	typeref:typename:int
inl	arch/sh/include/asm/io.h	/^#define inl(/;"	d
inl	arch/x86/include/asm/io.h	/^#define inl(/;"	d
inl	arch/xtensa/include/asm/io.h	/^#define inl(/;"	d
inl	drivers/net/sh_eth.h	/^#define inl	/;"	d
inl	include/usbdevice.h	/^#define inl(/;"	d
inl_p	arch/arm/include/asm/io.h	/^#define inl_p(/;"	d
inl_p	arch/blackfin/include/asm/io.h	/^#define inl_p(/;"	d
inl_p	arch/microblaze/include/asm/io.h	/^#define inl_p(/;"	d
inl_p	arch/nds32/include/asm/io.h	/^#define inl_p(/;"	d
inl_p	arch/powerpc/include/asm/io.h	/^#define inl_p(/;"	d
inl_p	arch/sh/include/asm/io.h	/^#define inl_p(/;"	d
inl_p	arch/xtensa/include/asm/io.h	/^#define inl_p(/;"	d
inline	fs/yaffs2/ydirectenv.h	/^#define inline$/;"	d
inline	include/linux/compiler-gcc.h	/^#define inline	/;"	d
inline_cnstr_jobdesc_blob_decap	drivers/crypto/fsl/jobdesc.c	/^void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr,$/;"	f	typeref:typename:void
inline_cnstr_jobdesc_blob_dek	drivers/crypto/fsl/jobdesc.c	/^int inline_cnstr_jobdesc_blob_dek(uint32_t *desc, const uint8_t *plain_txt,$/;"	f	typeref:typename:int
inline_cnstr_jobdesc_blob_encap	drivers/crypto/fsl/jobdesc.c	/^void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr,$/;"	f	typeref:typename:void
inline_cnstr_jobdesc_hash	drivers/crypto/fsl/jobdesc.c	/^void inline_cnstr_jobdesc_hash(uint32_t *desc,$/;"	f	typeref:typename:void
inline_cnstr_jobdesc_pkha_rsaexp	drivers/crypto/fsl/jobdesc.c	/^void inline_cnstr_jobdesc_pkha_rsaexp(uint32_t *desc,$/;"	f	typeref:typename:void
inline_cnstr_jobdesc_rng_instantiation	drivers/crypto/fsl/jobdesc.c	/^void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc)$/;"	f	typeref:typename:void
inline_data	include/ext_common.h	/^		char inline_data[60];$/;"	m	union:ext2_inode::__anon5bc84367010a	typeref:typename:char[60]
ino	fs/jffs2/jffs2_nand_private.h	/^	u32 ino;$/;"	m	struct:b_dirent	typeref:typename:u32
ino	fs/jffs2/jffs2_nand_private.h	/^	u32 ino;$/;"	m	struct:b_inode	typeref:typename:u32
ino	fs/jffs2/summary.h	/^	__u32 ino; 		\/* == zero for unlink *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:__u32
ino	fs/jffs2/summary.h	/^	__u32 ino; 		\/* == zero for unlink *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:__u32
ino	include/ext_common.h	/^	int ino;$/;"	m	struct:ext2fs_node	typeref:typename:int
ino	include/jffs2/jffs2.h	/^	__u32 ino;        \/* Inode number.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
ino	include/jffs2/jffs2.h	/^	__u32 ino; \/* == zero for unlink *\/$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
ino_key_init	fs/ubifs/key.h	/^static inline void ino_key_init(const struct ubifs_info *c,$/;"	f	typeref:typename:void
ino_key_init_flash	fs/ubifs/key.h	/^static inline void ino_key_init_flash(const struct ubifs_info *c, void *k,$/;"	f	typeref:typename:void
ino_t	include/linux/types.h	/^typedef __kernel_ino_t		ino_t;$/;"	t	typeref:typename:__kernel_ino_t
inode	fs/jffs2/summary.h	/^	__u32 inode;		\/* inode number *\/$/;"	m	struct:jffs2_sum_inode_flash	typeref:typename:__u32
inode	fs/jffs2/summary.h	/^	__u32 inode;		\/* inode number *\/$/;"	m	struct:jffs2_sum_inode_mem	typeref:typename:__u32
inode	fs/ubifs/recovery.c	/^	struct inode *inode;$/;"	m	struct:size_entry	typeref:struct:inode *	file:
inode	fs/ubifs/ubifs.h	/^	struct inode *inode;$/;"	m	struct:page	typeref:struct:inode *
inode	fs/ubifs/ubifs.h	/^struct inode {$/;"	s
inode	include/ext_common.h	/^	__le32 inode;$/;"	m	struct:ext2_dirent	typeref:typename:__le32
inode	include/ext_common.h	/^	struct ext2_inode *inode;$/;"	m	struct:ext2_data	typeref:struct:ext2_inode *
inode	include/ext_common.h	/^	struct ext2_inode inode;$/;"	m	struct:ext2fs_node	typeref:struct:ext2_inode
inodeId	fs/yaffs2/yaffsfs.c	/^	int inodeId:12;		\/* Index to corresponding yaffsfs_Inode *\/$/;"	m	struct:yaffsfs_FileDes	typeref:typename:int:12	file:
inode_bmaps	include/ext4fs.h	/^	unsigned char **inode_bmaps;$/;"	m	struct:ext_filesystem	typeref:typename:unsigned char **
inode_budget	fs/ubifs/ubifs.h	/^	int inode_budget;$/;"	m	struct:ubifs_budg_info	typeref:typename:int
inode_crc	fs/jffs2/jffs2_nand_private.h	/^inode_crc(struct jffs2_raw_inode *node)$/;"	f	typeref:typename:int
inode_crc	fs/jffs2/jffs2_private.h	/^inode_crc(struct jffs2_raw_inode *node)$/;"	f	typeref:typename:int
inode_id	include/ext_common.h	/^	__le32 inode_id;	\/* Inodes bitmap block *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le32
inode_id_high	include/ext_common.h	/^	__le32 inode_id_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le32
inode_read	include/ext_common.h	/^	int inode_read;$/;"	m	struct:ext2fs_node	typeref:typename:int
inode_size	include/ext_common.h	/^	__le16 inode_size;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
inode_slab_ctor	fs/ubifs/super.c	/^static void inode_slab_ctor(void *obj)$/;"	f	typeref:typename:void	file:
inode_table_id	include/ext_common.h	/^	__le32 inode_table_id;	\/* Inodes table block *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le32
inode_table_id_high	include/ext_common.h	/^	__le32 inode_table_id_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le32
inodes	fs/ubifs/debug.c	/^	struct rb_root inodes;$/;"	m	struct:fsck_data	typeref:struct:rb_root	file:
inodes	fs/ubifs/ubifs.h	/^	ino_t *inodes;$/;"	m	struct:ubifs_wbuf	typeref:typename:ino_t *
inodes_locked_down	fs/ubifs/super.c	/^static struct inode *inodes_locked_down[INODE_LOCKED_MAX];$/;"	v	typeref:struct:inode * []	file:
inodes_per_group	include/ext_common.h	/^	__le32 inodes_per_group;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
inodesz	include/ext4fs.h	/^	uint32_t inodesz;$/;"	m	struct:ext_filesystem	typeref:typename:uint32_t
inos	fs/ubifs/ubifs-media.h	/^	__le64 inos[];$/;"	m	struct:ubifs_orph_node	typeref:typename:__le64[]
inoutsel	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 inoutsel;$/;"	m	struct:rcar_gpio	typeref:typename:u32
inp	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 inp;		\/* 0x20 Input FIFO *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
inp_clk	arch/m68k/include/asm/global_data.h	/^	unsigned long inp_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
input	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 input;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
input	drivers/input/cros_ec_keyb.c	/^	struct input_config *input;	\/* The input layer *\/$/;"	m	struct:cros_ec_keyb_priv	typeref:struct:input_config *	file:
input	drivers/input/tegra-kbc.c	/^	struct input_config *input;	\/* The input layer *\/$/;"	m	struct:tegra_kbd_priv	typeref:struct:input_config *	file:
input	include/keyboard.h	/^	struct input_config input;$/;"	m	struct:keyboard_priv	typeref:struct:input_config
input	include/linux/fb.h	/^	__u16 input;			\/* display type - see FB_DISP_* *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
input	include/sh_pfc.h	/^	struct pinmux_range input;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
input	scripts/kconfig/zconf.y	/^input: nl start | start;$/;"	l
input_add_keycode	drivers/input/input.c	/^int input_add_keycode(struct input_config *config, int new_keycode,$/;"	f	typeref:typename:int
input_add_table	drivers/input/input.c	/^int input_add_table(struct input_config *config, int left_keycode,$/;"	f	typeref:typename:int
input_add_tables	drivers/input/input.c	/^int input_add_tables(struct input_config *config, bool german)$/;"	f	typeref:typename:int
input_allow_repeats	drivers/input/input.c	/^void input_allow_repeats(struct input_config *config, bool allow_repeats)$/;"	f	typeref:typename:void
input_buffer	drivers/net/netconsole.c	/^static char input_buffer[CONFIG_NETCONSOLE_BUFFER_SIZE];$/;"	v	typeref:typename:char[]	file:
input_check_keycodes	drivers/input/input.c	/^static int input_check_keycodes(struct input_config *config,$/;"	f	typeref:typename:int	file:
input_clk	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	uint input_clk;		\/* Input clock to MMC controller *\/$/;"	m	struct:davinci_mmc	typeref:typename:uint
input_clk	drivers/i2c/i2c-uniphier.c	/^	unsigned long input_clk;	\/* master clock (Hz) *\/$/;"	m	struct:uniphier_i2c_dev	typeref:typename:unsigned long	file:
input_config	include/input.h	/^struct input_config {$/;"	s
input_data	drivers/block/sata_sil3114.c	/^static int input_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words)$/;"	f	typeref:typename:int	file:
input_file	tools/ifdtool.c	/^struct input_file {$/;"	s	file:
input_file_type_t	tools/ifdtool.c	/^enum input_file_type_t {$/;"	g	file:
input_filename	tools/mxsimage.c	/^	char				*input_filename;$/;"	m	struct:sb_image_ctx	typeref:typename:char *	file:
input_fmt	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 input_fmt;			\/* 0x04c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
input_fmt	arch/arm/include/asm/arch/display.h	/^	u32 input_fmt;			\/* 0x04c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
input_freq	drivers/i2c/i2c-cdns.c	/^	unsigned int input_freq;$/;"	m	struct:i2c_cdns_bus	typeref:typename:unsigned int	file:
input_getc	drivers/input/input.c	/^int input_getc(struct input_config *config)$/;"	f	typeref:typename:int
input_init	drivers/input/input.c	/^int input_init(struct input_config *config, int leds)$/;"	f	typeref:typename:int
input_key_xlate	include/input.h	/^struct input_key_xlate {$/;"	s
input_keycode_to_ansi364	drivers/input/input.c	/^static int input_keycode_to_ansi364(struct input_config *config,$/;"	f	typeref:typename:int	file:
input_keycodes_to_ascii	drivers/input/input.c	/^static int input_keycodes_to_ascii(struct input_config *config,$/;"	f	typeref:typename:int	file:
input_leds_changed	drivers/input/input.c	/^int input_leds_changed(struct input_config *config)$/;"	f	typeref:typename:int
input_mode	scripts/kconfig/conf.c	/^enum input_mode {$/;"	g	file:
input_mode	scripts/kconfig/conf.c	/^} input_mode = oldaskconfig;$/;"	v	typeref:enum:input_mode
input_offset	drivers/net/netconsole.c	/^static int input_offset; \/* offset to valid chars in input buffer *\/$/;"	v	typeref:typename:int	file:
input_pd	include/sh_pfc.h	/^	struct pinmux_range input_pd;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
input_pin_capacitance_max	include/linux/mtd/nand.h	/^	u8 input_pin_capacitance_max;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
input_pin_capacitance_typ	include/linux/mtd/nand.h	/^	__le16 input_pin_capacitance_typ;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
input_pin_capacitance_typ	include/linux/mtd/nand.h	/^	__le16 input_pin_capacitance_typ;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
input_pu	include/sh_pfc.h	/^	struct pinmux_range input_pu;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
input_queue_ascii	drivers/input/input.c	/^static int input_queue_ascii(struct input_config *config, int ch)$/;"	f	typeref:typename:int	file:
input_rate	drivers/spi/rk_spi.c	/^	uint input_rate;$/;"	m	struct:rockchip_spi_priv	typeref:typename:uint	file:
input_recursion	drivers/net/netconsole.c	/^static int input_recursion;$/;"	v	typeref:typename:int	file:
input_reg	include/tca642x.h	/^	uint8_t input_reg;$/;"	m	struct:tca642x_bank_info	typeref:typename:uint8_t
input_ring	drivers/crypto/fsl/jr.h	/^	dma_addr_t *input_ring;$/;"	m	struct:jobring	typeref:typename:dma_addr_t *
input_sel_base	drivers/pinctrl/nxp/pinctrl-imx.h	/^	void __iomem *input_sel_base;$/;"	m	struct:imx_pinctrl_soc_info	typeref:typename:void __iomem *
input_send_keycodes	drivers/input/input.c	/^int input_send_keycodes(struct input_config *config, int keycode[],$/;"	f	typeref:typename:int
input_set_delays	drivers/input/input.c	/^void input_set_delays(struct input_config *config, int repeat_delay_ms,$/;"	f	typeref:typename:void
input_size	drivers/net/netconsole.c	/^static int input_size; \/* char count in input buffer *\/$/;"	v	typeref:typename:int	file:
input_stdio_register	drivers/input/input.c	/^int input_stdio_register(struct stdio_dev *dev)$/;"	f	typeref:typename:int
input_tstc	drivers/input/input.c	/^int input_tstc(struct input_config *config)$/;"	f	typeref:typename:int
inputbox	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color inputbox;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
inputbox_border	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color inputbox_border;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
inputbox_instructions_hex	scripts/kconfig/mconf.c	/^inputbox_instructions_hex[] = N_($/;"	v	typeref:typename:const char[]	file:
inputbox_instructions_hex	scripts/kconfig/nconf.c	/^inputbox_instructions_hex[] = N_($/;"	v	typeref:typename:const char[]	file:
inputbox_instructions_int	scripts/kconfig/mconf.c	/^inputbox_instructions_int[] = N_($/;"	v	typeref:typename:const char[]	file:
inputbox_instructions_int	scripts/kconfig/nconf.c	/^inputbox_instructions_int[] = N_($/;"	v	typeref:typename:const char[]	file:
inputbox_instructions_string	scripts/kconfig/mconf.c	/^inputbox_instructions_string[] = N_($/;"	v	typeref:typename:const char[]	file:
inputbox_instructions_string	scripts/kconfig/nconf.c	/^inputbox_instructions_string[] = N_($/;"	v	typeref:typename:const char[]	file:
inquiry_string	drivers/usb/gadget/f_mass_storage.c	/^	char inquiry_string[8 + 16 + 4 + 1];$/;"	m	struct:fsg_common	typeref:typename:char[]	file:
inrangelenrxer	drivers/qe/uec.h	/^	u32   inrangelenrxer;    \/* in range length error *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
inreq	drivers/usb/gadget/storage_common.c	/^	struct usb_request		*inreq;$/;"	m	struct:fsg_buffhd	typeref:struct:usb_request *	file:
inreq_busy	drivers/usb/gadget/storage_common.c	/^	int				inreq_busy;$/;"	m	struct:fsg_buffhd	typeref:typename:int	file:
ins	arch/sparc/include/asm/ptrace.h	/^	unsigned long ins[6];$/;"	m	struct:sparc_stackf	typeref:typename:unsigned long[6]
ins	arch/sparc/include/asm/ptrace.h	/^	unsigned long ins[8];$/;"	m	struct:reg_window	typeref:typename:unsigned long[8]
ins	arch/sparc/include/asm/stack.h	/^		unsigned long ins[8];$/;"	m	struct:sparc_regwindow_regs	typeref:typename:unsigned long[8]
ins	drivers/bios_emulator/x86emu/prim_ops.c	/^void ins(int size)$/;"	f	typeref:typename:void
ins_clr_old_idx_znode	fs/ubifs/tnc.c	/^static int ins_clr_old_idx_znode(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
ins_h	lib/zlib/deflate.h	/^    uInt  ins_h;          \/* hash index of string to be inserted *\/$/;"	m	struct:internal_state	typeref:typename:uInt
insb	arch/arm/include/asm/io.h	/^#define insb(/;"	d
insb	arch/m68k/include/asm/io.h	/^#define insb(/;"	d
insb	arch/microblaze/include/asm/io.h	/^#define insb(/;"	d
insb	arch/nds32/include/asm/io.h	/^#define insb(/;"	d
insb	arch/nios2/include/asm/io.h	/^static inline void insb (unsigned long port, void *dst, unsigned long count)$/;"	f	typeref:typename:void
insb	arch/powerpc/include/asm/io.h	/^#define insb(/;"	d
insb	arch/sh/include/asm/io.h	/^#define insb(/;"	d
insb	include/usbdevice.h	/^#define insb(/;"	d
insb_p	arch/arm/include/asm/io.h	/^#define insb_p(/;"	d
insb_p	arch/nds32/include/asm/io.h	/^#define insb_p(/;"	d
insb_p	arch/sh/include/asm/io.h	/^#define insb_p(/;"	d
insert_ahb_bridge	arch/sparc/cpu/leon3/ambapp_low.S	/^insert_ahb_bridge:$/;"	l
insert_bg_job	common/cli_hush.c	/^static void insert_bg_job(struct pipe *pi)$/;"	f	typeref:typename:void	file:
insert_dead_orphan	fs/ubifs/orphan.c	/^static int insert_dead_orphan(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:typename:int	file:
insert_dent	fs/ubifs/replay.c	/^static int insert_dent(struct ubifs_info *c, int lnum, int offs, int len,$/;"	f	typeref:typename:int	file:
insert_dirent	fs/jffs2/jffs2_nand_1pass.c	/^insert_dirent(struct b_list *list, struct jffs2_raw_dirent *node, u32 offset)$/;"	f	typeref:struct:b_node *	file:
insert_inode	fs/jffs2/jffs2_nand_1pass.c	/^insert_inode(struct b_list *list, struct jffs2_raw_inode *node, u32 offset)$/;"	f	typeref:struct:b_node *	file:
insert_maintainers_info	tools/genboardscfg.py	/^def insert_maintainers_info(params_list):$/;"	f
insert_node	fs/jffs2/jffs2_1pass.c	/^insert_node(struct b_list *list, u32 offset)$/;"	f	typeref:struct:b_node *	file:
insert_node	fs/jffs2/jffs2_nand_1pass.c	/^insert_node(struct b_list *list, struct b_node *new)$/;"	f	typeref:struct:b_node *	file:
insert_node	fs/ubifs/replay.c	/^static int insert_node(struct ubifs_info *c, int lnum, int offs, int len,$/;"	f	typeref:typename:int	file:
insert_old_idx	fs/ubifs/tnc.c	/^static int insert_old_idx(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
insert_old_idx_znode	fs/ubifs/tnc.c	/^int insert_old_idx_znode(struct ubifs_info *c, struct ubifs_znode *znode)$/;"	f	typeref:typename:int
insert_var_value	common/cli_hush.c	/^static char *insert_var_value(char *inp)$/;"	f	typeref:typename:char *	file:
insert_var_value_sub	common/cli_hush.c	/^static char *insert_var_value_sub(char *inp, int tag_subst)$/;"	f	typeref:typename:char *	file:
insert_zbranch	fs/ubifs/tnc.c	/^static void insert_zbranch(struct ubifs_znode *znode,$/;"	f	typeref:typename:void	file:
insertvlan	drivers/qe/uec.h	/^	u32   insertvlan;$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
insize	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 insize;$/;"	m	struct:de_bld::__anon5efd7b530108	typeref:typename:u32
insize	arch/arm/include/asm/arch/display2.h	/^		u32 insize;$/;"	m	struct:de_bld::__anon279c75ef0108	typeref:typename:u32
insl	arch/arm/include/asm/io.h	/^#define insl(/;"	d
insl	arch/m68k/include/asm/io.h	/^#define insl(/;"	d
insl	arch/microblaze/include/asm/io.h	/^#define insl(/;"	d
insl	arch/nds32/include/asm/io.h	/^#define insl(/;"	d
insl	arch/nios2/include/asm/io.h	/^static inline void insl (unsigned long port, void *dst, unsigned long count)$/;"	f	typeref:typename:void
insl	arch/powerpc/include/asm/io.h	/^#define insl(/;"	d
insl	arch/sh/include/asm/io.h	/^#define insl(/;"	d
insl_ns	arch/m68k/include/asm/io.h	/^#define insl_ns(/;"	d
insl_ns	arch/powerpc/include/asm/io.h	/^#define insl_ns(/;"	d
insl_p	arch/arm/include/asm/io.h	/^#define insl_p(/;"	d
insl_p	arch/nds32/include/asm/io.h	/^#define insl_p(/;"	d
insl_p	arch/sh/include/asm/io.h	/^#define insl_p(/;"	d
insn	arch/arm/include/asm/processor.h	/^	union debug_insn	insn;$/;"	m	struct:debug_entry	typeref:union:debug_insn
insn	arch/powerpc/lib/extable.c	/^	unsigned long insn, fixup;$/;"	m	struct:exception_table_entry	typeref:typename:unsigned long	file:
insreg00	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg00;		\/* 0x90 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg01	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg01;		\/* 0x94 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg02	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg02;		\/* 0x98 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg03	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg03;		\/* 0x9c *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg04	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg04;		\/* 0xa0 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg05_utmi_ulpi	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg05_utmi_ulpi;	\/* 0xa4 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg06	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg06;		\/* 0xa8 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg07	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg07;		\/* 0xac *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
insreg08	arch/arm/include/asm/ehci-omap.h	/^	u32 insreg08;		\/* 0xb0 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
inst_flags	arch/blackfin/cpu/traps.c	/^	uint32_t data_flags, inst_flags;$/;"	m	struct:memory_map	typeref:typename:uint32_t	file:
inst_rom_init	board/altera/arria5-socdk/qts/sdram_config.h	/^const u32 inst_rom_init[] ={$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/altera/cyclone5-socdk/qts/sdram_config.h	/^const u32 inst_rom_init[] ={$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/denx/mcvevk/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/ebv/socrates/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/is1/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/samtec/vining_fpga/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/sr1500/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/terasic/de0-nano-soc/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
inst_rom_init	board/terasic/sockit/qts/sdram_config.h	/^const u32 inst_rom_init[] = {$/;"	v	typeref:typename:const u32[]
install	Makefile	/^install:$/;"	t
install	doc/README.x86	/^install it on your host and locate the FSP binary blob. Note this platform$/;"	l
install_e820_map	arch/x86/cpu/coreboot/sdram.c	/^unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)$/;"	f	typeref:typename:unsigned
install_e820_map	arch/x86/cpu/qemu/e820.c	/^unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)$/;"	f	typeref:typename:unsigned
install_e820_map	arch/x86/lib/e820.c	/^__weak unsigned install_e820_map(unsigned max_entries,$/;"	f	typeref:typename:__weak unsigned
install_e820_map	arch/x86/lib/fsp/fsp_dram.c	/^unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)$/;"	f	typeref:typename:unsigned
install_interrupt_handler	arch/microblaze/cpu/interrupts.c	/^int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)$/;"	f	typeref:typename:int
installmandocs	doc/DocBook/Makefile	/^installmandocs: mandocs$/;"	t
instantiate_rng	drivers/crypto/fsl/jr.c	/^static int instantiate_rng(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
instr	include/bedbug/ppc.h	/^  unsigned long		instr;$/;"	m	struct:ppc_ctx	typeref:typename:unsigned long
instr_reg	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 instr_reg;		\/* MBAR_ETH + 0x100 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
instruction_pointer	arch/arm/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/avr32/include/asm/ptrace.h	/^# define instruction_pointer(/;"	d
instruction_pointer	arch/blackfin/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/microblaze/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/mips/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/openrisc/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/powerpc/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/sh/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/x86/include/asm/ptrace.h	/^#define instruction_pointer(/;"	d
instruction_pointer	arch/xtensa/include/asm/ptrace.h	/^# define instruction_pointer(/;"	d
instruction_pointer_set	arch/mips/include/asm/ptrace.h	/^static inline void instruction_pointer_set(struct pt_regs *regs,$/;"	f	typeref:typename:void
insw	arch/arm/include/asm/io.h	/^#define insw(/;"	d
insw	arch/blackfin/include/asm/io.h	/^#define insw(/;"	d
insw	arch/m68k/include/asm/io.h	/^#define insw(/;"	d
insw	arch/microblaze/include/asm/io.h	/^#define insw(/;"	d
insw	arch/nds32/include/asm/io.h	/^#define insw(/;"	d
insw	arch/nios2/include/asm/io.h	/^static inline void insw (unsigned long port, void *dst, unsigned long count)$/;"	f	typeref:typename:void
insw	arch/powerpc/include/asm/io.h	/^#define insw(/;"	d
insw	arch/sandbox/include/asm/io.h	/^#define insw(/;"	d
insw	arch/sh/include/asm/io.h	/^#define insw(/;"	d
insw	include/usbdevice.h	/^#define insw(/;"	d
insw_ns	arch/m68k/include/asm/io.h	/^#define insw_ns(/;"	d
insw_ns	arch/powerpc/include/asm/io.h	/^#define insw_ns(/;"	d
insw_p	arch/arm/include/asm/io.h	/^#define insw_p(/;"	d
insw_p	arch/nds32/include/asm/io.h	/^#define insw_p(/;"	d
insw_p	arch/sh/include/asm/io.h	/^#define insw_p(/;"	d
int0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 int0;			\/* 0x04 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int0	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 int0;			\/* 0x04 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int0	arch/arm/include/asm/arch/display.h	/^	u32 int0;			\/* 0x04 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int0	arch/arm/include/asm/arch/display2.h	/^	u32 int0;			\/* 0x04 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int0	drivers/spi/davinci_spi.c	/^	dv_reg	int0;		\/* 0x08 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
int0_ctrl	arch/m68k/include/asm/coldfire/intctrl.h	/^typedef struct int0_ctrl {$/;"	s
int0_t	arch/m68k/include/asm/coldfire/intctrl.h	/^} int0_t;$/;"	t	typeref:struct:int0_ctrl
int1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 int1;			\/* 0x08 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 int1;			\/* 0x08 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int1	arch/arm/include/asm/arch/display.h	/^	u32 int1;			\/* 0x08 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int1	arch/arm/include/asm/arch/display2.h	/^	u32 int1;			\/* 0x08 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
int1	drivers/pinctrl/pinctrl_pic32.c	/^	u32 int1[4];$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32[4]	file:
int10	drivers/bios_emulator/bios.c	/^static void X86API int10(int intno)$/;"	f	typeref:typename:void X86API	file:
int10_handler	arch/x86/lib/bios_interrupts.c	/^int int10_handler(void)$/;"	f	typeref:typename:int
int12_handler	arch/x86/lib/bios_interrupts.c	/^int int12_handler(void)$/;"	f	typeref:typename:int
int15_handler	drivers/video/ivybridge_igd.c	/^static int int15_handler(void)$/;"	f	typeref:typename:int	file:
int16_handler	arch/x86/lib/bios_interrupts.c	/^int int16_handler(void)$/;"	f	typeref:typename:int
int16_t	include/linux/types.h	/^typedef		__s16		int16_t;$/;"	t	typeref:typename:__s16
int1A	drivers/bios_emulator/bios.c	/^static void X86API int1A(int unused)$/;"	f	typeref:typename:void X86API	file:
int1_ctrl	arch/m68k/include/asm/coldfire/intctrl.h	/^typedef struct int1_ctrl {$/;"	s
int1_t	arch/m68k/include/asm/coldfire/intctrl.h	/^} int1_t;$/;"	t	typeref:struct:int1_ctrl
int1a_handler	arch/x86/lib/bios_interrupts.c	/^int int1a_handler(void)$/;"	f	typeref:typename:int
int32_t	include/linux/types.h	/^typedef		__s32		int32_t;$/;"	t	typeref:typename:__s32
int42	drivers/bios_emulator/bios.c	/^static void X86API int42(int intno)$/;"	f	typeref:typename:void X86API	file:
int64_t	include/linux/types.h	/^typedef		__INT64_TYPE__		int64_t;$/;"	t	typeref:typename:__INT64_TYPE__
int64_t	include/linux/types.h	/^typedef		__s64		int64_t;$/;"	t	typeref:typename:__s64
int8_t	include/linux/types.h	/^typedef		__s8		int8_t;$/;"	t	typeref:typename:__s8
intLock	arch/sparc/lib/interrupts.c	/^int intLock(void)$/;"	f	typeref:typename:int
intMask	include/MCD_dma.h	/^	u32 intMask;		\/* interrupt mask *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
intPending	include/MCD_dma.h	/^	u32 intPending;		\/* interrupt pending *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
intUnlock	arch/sparc/lib/interrupts.c	/^void intUnlock(int oldLevel)$/;"	f	typeref:typename:void
int_ack	arch/powerpc/include/asm/fsl_pci.h	/^	u32	int_ack;	\/* 0x008 - PCI Interrupt Acknowledge Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
int_ack	arch/powerpc/include/asm/immap_512x.h	/^	u32 int_ack;$/;"	m	struct:pciconf512x	typeref:typename:u32
int_ack	arch/powerpc/include/asm/immap_83xx.h	/^	u32 int_ack;$/;"	m	struct:pciconf83xx	typeref:typename:u32
int_ack	arch/powerpc/include/asm/immap_85xx.h	/^	u32	int_ack;	\/* PCIX IRQ Acknowledge *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
int_addr	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	void *int_addr;$/;"	m	struct:virt_root_hub	typeref:typename:void *
int_addr	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	void *int_addr;$/;"	m	struct:virt_root_hub	typeref:typename:void *
int_addr	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	void *int_addr;$/;"	m	struct:virt_root_hub	typeref:typename:void *
int_addr	drivers/usb/host/ohci-s3c24xx.h	/^	void *int_addr;$/;"	m	struct:virt_root_hub	typeref:typename:void *
int_addr	drivers/usb/host/ohci.h	/^	void *int_addr;$/;"	m	struct:virt_root_hub	typeref:typename:void *
int_branch	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 int_branch;$/;"	m	struct:ed	typeref:typename:__u8
int_branch	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 int_branch;$/;"	m	struct:ed	typeref:typename:__u8
int_branch	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 int_branch;$/;"	m	struct:ed	typeref:typename:__u8
int_branch	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 int_branch;$/;"	m	struct:ed	typeref:typename:__u8
int_branch	drivers/usb/host/ohci.h	/^	__u8 int_branch;$/;"	m	struct:ed	typeref:typename:__u8
int_capability	drivers/tpm/tpm_tis_lpc.c	/^	u32 int_capability;$/;"	m	struct:tpm_locality	typeref:typename:u32	file:
int_clear	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_clear;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_clear1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_clear1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_cntr	drivers/mmc/mxcmmc.c	/^	u32 int_cntr;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
int_codec	arch/arm/dts/rk3288-veyron.dtsi	/^		int_codec: int-codec {$/;"	l
int_con	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 int_con;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
int_cr1	drivers/spi/armada100_spi.c	/^	u32 int_cr1;$/;"	m	struct:armd_spi_slave	typeref:typename:u32	file:
int_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	int_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
int_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_ctl	drivers/net/sunxi_emac.c	/^	u32 int_ctl;	\/* 0x54 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
int_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct int_ctrl {$/;"	s
int_ctrl	drivers/video/ipu_regs.h	/^	u32 int_ctrl[15];$/;"	m	struct:ipu_cm	typeref:typename:u32[15]
int_data	drivers/usb/gadget/f_thor.h	/^	s32 int_data[14];	\/* int data *\/$/;"	m	struct:rqt_box	typeref:typename:s32[14]
int_data	drivers/usb/gadget/f_thor.h	/^	s32 int_data[5];	\/* int data *\/$/;"	m	struct:rsp_box	typeref:typename:s32[5]
int_en	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int int_en;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
int_en	drivers/net/pch_gbe.h	/^	u32 int_en;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
int_en_ctlr	drivers/spi/ti_qspi.c	/^	u32 int_en_ctlr;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
int_en_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_en_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_en_dis1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_en_dis1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_en_set	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_en_set;		\/*0xd0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_en_set	drivers/spi/ti_qspi.c	/^	u32 int_en_set;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
int_en_set1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_en_set1;	\/*0xf0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_en_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_en_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_en_stat1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_en_stat1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_ena_clr	drivers/video/da8xx-fb.c	/^	u32	int_ena_clr;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
int_ena_set	drivers/video/da8xx-fb.c	/^	u32	int_ena_set;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
int_enable	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 int_enable;			\/* 0x060 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
int_enable	arch/arm/include/asm/arch/display.h	/^	u32 int_enable;			\/* 0x060 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
int_enable	drivers/tpm/tpm_tis_lpc.c	/^	u32 int_enable;$/;"	m	struct:tpm_locality	typeref:typename:u32	file:
int_enable	include/mpc5xxx.h	/^	volatile u32 int_enable;	\/* XLB + 0x4c *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
int_enb	arch/arm/include/asm/arch-tegra/dc.h	/^	uint int_enb;			\/* _CMD_INT_ENABLE_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
int_ep	drivers/usb/gadget/f_thor.h	/^	struct usb_ep *in_ep, *out_ep, *int_ep;$/;"	m	struct:thor_dev	typeref:struct:usb_ep *
int_err	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int int_err;$/;"	m	struct:emac_stats_st	typeref:typename:int
int_err_ack	include/linux/mtd/samsung_onenand.h	/^	unsigned int	int_err_ack;	\/* 0x0050 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
int_err_clear	drivers/dma/lpc32xx_dma.c	/^	u32 int_err_clear;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
int_err_mask	include/linux/mtd/samsung_onenand.h	/^	unsigned int	int_err_mask;	\/* 0x0040 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
int_err_stat	drivers/dma/lpc32xx_dma.c	/^	u32 int_err_stat;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
int_err_stat	include/linux/mtd/samsung_onenand.h	/^	unsigned int	int_err_stat;	\/* 0x0030 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
int_exception_handler	arch/x86/lib/bios.c	/^static int int_exception_handler(void)$/;"	f	typeref:typename:int	file:
int_flag	arch/blackfin/cpu/interrupts.c	/^static int int_flag;$/;"	v	typeref:typename:int	file:
int_flag	arch/nds32/lib/interrupts.c	/^static int int_flag;$/;"	v	typeref:typename:int	file:
int_handler	arch/m68k/lib/interrupts.c	/^void int_handler (struct pt_regs *fp)$/;"	f	typeref:typename:void
int_handler	arch/x86/lib/bios.c	/^static int (*int_handler[256])(void);$/;"	v	typeref:typename:int (* [256])(void)	file:
int_icr1	arch/m68k/include/asm/immap_5272.h	/^	uint int_icr1;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_icr2	arch/m68k/include/asm/immap_5272.h	/^	uint int_icr2;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_icr3	arch/m68k/include/asm/immap_5272.h	/^	uint int_icr3;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_icr4	arch/m68k/include/asm/immap_5272.h	/^	uint int_icr4;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_interval	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 int_interval;$/;"	m	struct:ed	typeref:typename:__u8
int_interval	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 int_interval;$/;"	m	struct:ed	typeref:typename:__u8
int_interval	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 int_interval;$/;"	m	struct:ed	typeref:typename:__u8
int_interval	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 int_interval;$/;"	m	struct:ed	typeref:typename:__u8
int_interval	drivers/usb/host/ohci.h	/^	__u8 int_interval;$/;"	m	struct:ed	typeref:typename:__u8
int_isr	arch/m68k/include/asm/immap_5272.h	/^	uint int_isr;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_load	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 int_load;$/;"	m	struct:ed	typeref:typename:__u8
int_load	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 int_load;$/;"	m	struct:ed	typeref:typename:__u8
int_load	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 int_load;$/;"	m	struct:ed	typeref:typename:__u8
int_load	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 int_load;$/;"	m	struct:ed	typeref:typename:__u8
int_load	drivers/usb/host/ohci.h	/^	__u8 int_load;$/;"	m	struct:ed	typeref:typename:__u8
int_mask	arch/arm/include/asm/arch-tegra/dc.h	/^	uint int_mask;			\/* _CMD_INT_MASK_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
int_mask	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 int_mask;$/;"	m	struct:i2c_control	typeref:typename:u32
int_mask	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 int_mask; \/* 0x10 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
int_mask	board/freescale/t104xrdb/cpld.h	/^	u8 int_mask;		\/* 0x15 - Interrupt mask Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
int_mask	drivers/usb/gadget/at91_udc.h	/^	u8				int_mask;$/;"	m	struct:at91_ep	typeref:typename:u8
int_mask	drivers/video/fsl_dcu_fb.c	/^	u32 int_mask;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
int_mask	drivers/video/fsl_diu_fb.c	/^	__be32 int_mask;$/;"	m	struct:diu	typeref:typename:__be32	file:
int_mask	include/faraday/ftsdc010.h	/^	unsigned int	int_mask;	\/* 0x30 - intrrupt mask reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
int_mon_status	include/linux/mtd/samsung_onenand.h	/^	unsigned int	int_mon_status;	\/* 0x0390 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
int_name	arch/arm/include/asm/ti-common/keystone_net.h	/^	char int_name[32];$/;"	m	struct:eth_priv_t	typeref:typename:char[32]
int_pending	include/usb.h	/^	unsigned long int_pending;	\/* 1 bit per ep, used by int_queue *\/$/;"	m	struct:usb_device	typeref:typename:unsigned long
int_period	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 int_period;$/;"	m	struct:ed	typeref:typename:__u8
int_period	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 int_period;$/;"	m	struct:ed	typeref:typename:__u8
int_period	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 int_period;$/;"	m	struct:ed	typeref:typename:__u8
int_period	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 int_period;$/;"	m	struct:ed	typeref:typename:__u8
int_period	drivers/usb/host/ohci.h	/^	__u8 int_period;$/;"	m	struct:ed	typeref:typename:__u8
int_pin_en	include/linux/mtd/samsung_onenand.h	/^	unsigned int	int_pin_en;	\/* 0x01A0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
int_pitr	arch/m68k/include/asm/immap_5272.h	/^	uint int_pitr;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_pivr	arch/m68k/include/asm/immap_5272.h	/^	uchar int_pivr;$/;"	m	struct:int_ctrl	typeref:typename:uchar
int_piwr	arch/m68k/include/asm/immap_5272.h	/^	uint int_piwr;$/;"	m	struct:int_ctrl	typeref:typename:uint
int_polarity	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 int_polarity;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
int_polarity	arch/arm/include/asm/arch-tegra/dc.h	/^	uint int_polarity;		\/* _CMD_INT_POLARITY_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
int_queue	drivers/usb/host/ehci-hcd.c	/^struct int_queue {$/;"	s	file:
int_queue	drivers/usb/host/ohci-hcd.c	/^struct int_queue {$/;"	s	file:
int_queue	drivers/usb/musb-new/musb_uboot.c	/^struct int_queue {$/;"	s	file:
int_rawstatus	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 int_rawstatus;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
int_return	arch/powerpc/cpu/mpc512x/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc5xx/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc5xxx/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc8260/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc83xx/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc85xx/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc86xx/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/mpc8xx/start.S	/^int_return:$/;"	l
int_return	arch/powerpc/cpu/ppc4xx/start.S	/^int_return:$/;"	l
int_rx	drivers/usb/musb-new/musb_core.h	/^	u16			int_rx;$/;"	m	struct:musb	typeref:typename:u16
int_st	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 int_st;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
int_st	drivers/net/pch_gbe.h	/^	u32 int_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
int_st_hold	drivers/net/pch_gbe.h	/^	u32 int_st_hold;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
int_sta	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_sta;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_sta	drivers/net/sunxi_emac.c	/^	u32 int_sta;	\/* 0x58 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
int_sta_mask	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	int_sta_mask;$/;"	m	struct:rk3288_edp	typeref:typename:u32
int_sta_mask	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_sta_mask;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_sta_mask1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_sta_mask1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_sta_mask2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_sta_mask2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_sta_mask3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_sta_mask3;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_sta_mask4	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_sta_mask4;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_stat	arch/arm/include/asm/arch-tegra/dc.h	/^	uint int_stat;			\/* _CMD_INT_STATUS_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
int_stat	arch/arm/mach-socfpga/include/mach/timer.h	/^	u32	int_stat;$/;"	m	struct:socfpga_timer	typeref:typename:u32
int_stat	drivers/block/sym53c8xx.c	/^static unsigned long int_stat[3]; \/* interrupt status *\/$/;"	v	typeref:typename:unsigned long[3]	file:
int_stat	drivers/dma/lpc32xx_dma.c	/^	u32 int_stat;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
int_stat	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 int_stat;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
int_stat	drivers/video/ipu_regs.h	/^	u32 int_stat[15];$/;"	m	struct:ipu_stat	typeref:typename:u32[15]
int_stat_en	drivers/spi/ti_qspi.c	/^	u32 int_stat_en;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
int_stat_raw	drivers/spi/ti_qspi.c	/^	u32 int_stat_raw;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
int_state	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	int_state;$/;"	m	struct:rk3288_edp	typeref:typename:u32
int_state	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	int_state;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
int_statm	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_statm;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_statm1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_statm1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_statr	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_statr;		\/*0xc4*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_statr1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 int_statr1;		\/*0xc4*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
int_status	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 int_status;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
int_status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 int_status;			\/* 0x064 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
int_status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 int_status;$/;"	m	struct:i2c_control	typeref:typename:u32
int_status	arch/arm/include/asm/arch/display.h	/^	u32 int_status;			\/* 0x064 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
int_status	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int int_status;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
int_status	arch/powerpc/include/asm/fsl_pci.h	/^	u32	int_status;	\/* 0x018 - PCIE interrupt status register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
int_status	board/freescale/t102xrdb/cpld.h	/^	u8 int_status;		\/* 0x12 - Interrupt status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
int_status	board/freescale/t104xrdb/cpld.h	/^	u8 int_status;		\/* 0x12 - Interrupt status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
int_status	drivers/tpm/tpm_tis_lpc.c	/^	u32 int_status;$/;"	m	struct:tpm_locality	typeref:typename:u32	file:
int_status	drivers/video/fsl_dcu_fb.c	/^	u32 int_status;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
int_status	drivers/video/fsl_diu_fb.c	/^	__be32 int_status;$/;"	m	struct:diu	typeref:typename:__be32	file:
int_sts	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 int_sts; \/* 0xc *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
int_table	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	int_table[NUM_INTS];	\/* Interrupt ED table *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32[]
int_table	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	int_table[NUM_INTS];	\/* Interrupt ED table *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32[]
int_table	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 int_table[NUM_INTS];	\/* Interrupt ED table *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32[]
int_table	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 int_table[NUM_INTS];	\/* Interrupt ED table *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32[]
int_table	drivers/usb/host/ohci.h	/^	__u32	int_table[NUM_INTS];	\/* Interrupt ED table *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u32[]
int_tc_clear	drivers/dma/lpc32xx_dma.c	/^	u32 int_tc_clear;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
int_tc_stat	drivers/dma/lpc32xx_dma.c	/^	u32 int_tc_stat;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
int_tx	drivers/usb/musb-new/musb_core.h	/^	u16			int_tx;$/;"	m	struct:musb	typeref:typename:u16
int_type	arch/arm/include/asm/arch-tegra/dc.h	/^	uint int_type;			\/* _CMD_INT_TYPE_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
int_unknown_handler	arch/x86/lib/bios.c	/^static int int_unknown_handler(void)$/;"	f	typeref:typename:int	file:
int_usb	drivers/usb/musb-new/musb_core.h	/^	u8			int_usb;$/;"	m	struct:musb	typeref:typename:u8
int_zfs_fetch_nvlist	fs/zfs/zfs.c	/^int_zfs_fetch_nvlist(struct zfs_data *data, char **nvlist)$/;"	f	typeref:typename:int	file:
intc	arch/arm/dts/am33xx.dtsi	/^		intc: interrupt-controller@48200000 {$/;"	l
intc	arch/arm/dts/imx6qdl.dtsi	/^		intc: interrupt-controller@00a01000 {$/;"	l
intc	arch/arm/dts/imx6ull.dtsi	/^	intc: interrupt-controller@00a01000 {$/;"	l
intc	arch/arm/dts/socfpga.dtsi	/^	intc: intc@fffed000 {$/;"	l
intc	arch/arm/dts/sun4i-a10.dtsi	/^		intc: interrupt-controller@01c20400 {$/;"	l
intc	arch/arm/dts/sun5i.dtsi	/^		intc: interrupt-controller@01c20400 {$/;"	l
intc	arch/arm/dts/tegra20.dtsi	/^	intc: interrupt-controller@50041000 {$/;"	l
intc	arch/arm/dts/tegra30.dtsi	/^	intc: interrupt-controller@50041000 {$/;"	l
intc	arch/arm/dts/uniphier-common32.dtsi	/^		intc: interrupt-controller@60001000 {$/;"	l
intc	arch/arm/dts/uniphier-sld3.dtsi	/^		intc: interrupt-controller@20001000 {$/;"	l
intc	arch/arm/dts/zynq-7000.dtsi	/^		intc: interrupt-controller@f8f01000 {$/;"	l	label:amba
intc	arch/microblaze/cpu/interrupts.c	/^microblaze_intc_t *intc;$/;"	v	typeref:typename:microblaze_intc_t *
intc	arch/powerpc/include/asm/xilinx_irq.h	/^#define intc	/;"	d
intc	include/tsi148.h	/^	unsigned int intc;                    \/* 0x454         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
intc_eoi	drivers/spi/ti_qspi.c	/^	u32 intc_eoi;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
intc_init	arch/microblaze/cpu/interrupts.c	/^static void intc_init(void)$/;"	f	typeref:typename:void	file:
intclear	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 intclear;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
intclear	drivers/net/lpc32xx_eth.c	/^	u32 intclear;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
intclr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 intclr;$/;"	m	struct:rcar_gpio	typeref:typename:u32
intclrr	drivers/usb/musb/davinci.h	/^	u32	intclrr;$/;"	m	struct:davinci_usb_regs	typeref:typename:u32
intcoalescingptr	drivers/qe/uec.h	/^	u32  intcoalescingptr;    \/* Interrupt coalescing table pointer *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
intcs_evt2irq	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define intcs_evt2irq(/;"	d
intctl	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intctl;		\/* 0x20 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intctl8260_t	arch/powerpc/include/asm/immap_8260.h	/^} intctl8260_t;$/;"	t	typeref:struct:interrupt_controller
intctrl	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	intctrl;	\/* Interrupt and Control *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
intctrl	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	intctrl;	\/* Interrupt and Control *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
intctrl	arch/m68k/include/asm/immap_5307.h	/^typedef struct intctrl {$/;"	s
intctrl_t	arch/m68k/include/asm/immap_5272.h	/^} intctrl_t;$/;"	t	typeref:struct:int_ctrl
intctrl_t	arch/m68k/include/asm/immap_5307.h	/^} intctrl_t;$/;"	t	typeref:struct:intctrl
intd_cfg	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	intd_cfg;	\/* QMSS INTD config region	*\/$/;"	m	struct:qm_config	typeref:typename:u32
intdt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 intdt;$/;"	m	struct:rcar_gpio	typeref:typename:u32
inte	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 inte;	\/* 0x08 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
inte	arch/arm/include/asm/arch/rsb.h	/^	u32 inte;	\/* 0x08 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
integrator_hose	board/armltd/integrator/pci.c	/^struct pci_controller integrator_hose = {$/;"	v	typeref:struct:pci_controller
integrity	arch/x86/include/asm/fsp/fsp_ffs.h	/^	union ffs_integrity	integrity;$/;"	m	struct:ffs_file_header	typeref:union:ffs_integrity
integrity	arch/x86/include/asm/fsp/fsp_ffs.h	/^	union ffs_integrity	integrity;$/;"	m	struct:ffs_file_header2	typeref:union:ffs_integrity
intel_at	arch/x86/include/asm/me_common.h	/^	u32 intel_at:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
intel_broadwell_gpio_ids	drivers/gpio/intel_broadwell_gpio.c	/^static const struct udevice_id intel_broadwell_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
intel_cas	include/spd.h	/^	unsigned char intel_cas;   \/* 129 Intel spec: CAS# Latency support *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
intel_cls	arch/x86/include/asm/me_common.h	/^	u32 intel_cls:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
intel_early_me_init	arch/x86/cpu/ivybridge/early_me.c	/^int intel_early_me_init(struct udevice *me_dev)$/;"	f	typeref:typename:int
intel_early_me_init_done	arch/x86/cpu/ivybridge/early_me.c	/^int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev,$/;"	f	typeref:typename:int
intel_early_me_uma_size	arch/x86/cpu/ivybridge/early_me.c	/^int intel_early_me_uma_size(struct udevice *me_dev)$/;"	f	typeref:typename:int
intel_i2c	drivers/i2c/intel_i2c.c	/^struct intel_i2c {$/;"	s	file:
intel_i2c_bind	drivers/i2c/intel_i2c.c	/^static int intel_i2c_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
intel_i2c_ids	drivers/i2c/intel_i2c.c	/^static const struct udevice_id intel_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
intel_i2c_ops	drivers/i2c/intel_i2c.c	/^static const struct dm_i2c_ops intel_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
intel_i2c_probe	drivers/i2c/intel_i2c.c	/^static int intel_i2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
intel_i2c_probe_chip	drivers/i2c/intel_i2c.c	/^static int intel_i2c_probe_chip(struct udevice *bus, uint chip_addr,$/;"	f	typeref:typename:int	file:
intel_i2c_set_bus_speed	drivers/i2c/intel_i2c.c	/^static int intel_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int	file:
intel_i2c_xfer	drivers/i2c/intel_i2c.c	/^static int intel_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)$/;"	f	typeref:typename:int	file:
intel_ich6_gpio_ids	drivers/gpio/intel_ich6_gpio.c	/^static const struct udevice_id intel_ich6_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
intel_me_fw_image_type	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 intel_me_fw_image_type:4;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:4
intel_me_hsio_version	arch/x86/cpu/broadwell/me.c	/^int intel_me_hsio_version(struct udevice *dev, uint16_t *versionp,$/;"	f	typeref:typename:int
intel_me_status	arch/x86/cpu/intel_common/me_status.c	/^void intel_me_status(struct udevice *me_dev)$/;"	f	typeref:typename:void
intel_mpc	arch/x86/include/asm/me_common.h	/^	u32 intel_mpc:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
intel_smbus_pci_supported	drivers/i2c/intel_i2c.c	/^static struct pci_device_id intel_smbus_pci_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
inten	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t inten;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
inten	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t inten;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
inten	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 inten;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
inten	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 inten;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
inten	include/mpc5xxx.h	/^	volatile u8 inten;		\/* WU_GPIO + 0x10 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
inten	include/tsi148.h	/^	unsigned int inten;                   \/* 0x448         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
intenable	drivers/net/calxedaxgmac.c	/^	u32 intenable;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
intenable	drivers/net/designware.h	/^	u32 intenable;		\/* 0x1c *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
intenable	drivers/net/lpc32xx_eth.c	/^	u32 intenable;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
intenc_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intenc_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
intenc_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intenc_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
intenc_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intenc_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
intenc_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intenc_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
intens_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intens_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
intens_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intens_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
intens_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intens_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
intens_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int intens_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
inteo	include/tsi148.h	/^	unsigned int inteo;                   \/* 0x44c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
inter	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 inter;$/;"	m	struct:sunxi_timer	typeref:typename:u32
inter	arch/arm/include/asm/arch/timer.h	/^	u32 inter;$/;"	m	struct:sunxi_timer	typeref:typename:u32
inter	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	inter;$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32
inter	arch/powerpc/cpu/mpc8xx/video.c	/^			inter:1,	\/* Interrupt *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:1	file:
interactive	arch/sandbox/include/asm/state.h	/^	bool interactive;		\/* Enable cmdline after execute *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
interactive	common/cli_hush.c	/^static int interactive;$/;"	v	typeref:typename:int	file:
interactive_get_maintainers	scripts/get_maintainer.pl	/^sub interactive_get_maintainers {$/;"	s
interface	drivers/net/ag7xxx.c	/^	u32			interface;$/;"	m	struct:ar7xxx_eth_priv	typeref:typename:u32	file:
interface	drivers/net/altera_tse.h	/^	unsigned int interface;$/;"	m	struct:altera_tse_priv	typeref:typename:unsigned int
interface	drivers/net/designware.h	/^	u32 interface;$/;"	m	struct:dw_eth_dev	typeref:typename:u32
interface	drivers/net/sun8i_emac.c	/^	u32 interface;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
interface	drivers/net/xilinx_axi_emac.c	/^	phy_interface_t interface;$/;"	m	struct:axidma_priv	typeref:typename:phy_interface_t	file:
interface	drivers/net/zynq_gem.c	/^	phy_interface_t interface;$/;"	m	struct:zynq_gem_priv	typeref:typename:phy_interface_t	file:
interface	drivers/usb/host/ehci-hcd.c	/^	struct usb_linux_interface_descriptor interface;$/;"	m	struct:descriptor	typeref:struct:usb_linux_interface_descriptor	file:
interface	drivers/usb/host/xhci.c	/^	struct usb_interface_descriptor interface;$/;"	m	struct:descriptor	typeref:struct:usb_interface_descriptor	file:
interface	include/efi_loader.h	/^	const void *interface;$/;"	m	struct:efi_class_map	typeref:typename:const void *
interface	include/flash.h	/^	ushort	interface;		\/* used for x8\/x16 adjustments		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
interface	include/fpga.h	/^	char *interface;$/;"	m	struct:__anon4d3ae96c0308	typeref:typename:char *
interface	include/linux/usb/composite.h	/^	struct usb_function	*interface[MAX_CONFIG_INTERFACES];$/;"	m	struct:usb_configuration	typeref:struct:usb_function * []
interface	include/phy.h	/^	phy_interface_t interface;$/;"	m	struct:phy_device	typeref:typename:phy_interface_t
interface	include/power/pmic.h	/^	unsigned char interface;$/;"	m	struct:pmic	typeref:typename:unsigned char
interface	include/tsec.h	/^	phy_interface_t interface;$/;"	m	struct:tsec_info_struct	typeref:typename:phy_interface_t
interface	include/tsec.h	/^	phy_interface_t interface;$/;"	m	struct:tsec_private	typeref:typename:phy_interface_t
interface	include/usbdescriptors.h	/^		struct usb_interface_descriptor interface;$/;"	m	union:usb_descriptor::__anon028dca6a010a	typeref:struct:usb_interface_descriptor
interface	include/usbdevice.h	/^	u8 interface;		\/* current interface (zero is default) *\/$/;"	m	struct:usb_device_instance	typeref:typename:u8
interface_count	drivers/serial/usbtty.c	/^static unsigned short interface_count = 0;$/;"	v	typeref:typename:unsigned short	file:
interface_desc	drivers/serial/usbtty.c	/^	struct usb_interface_descriptor	interface_desc[NUM_GSERIAL_INTERFACES];$/;"	m	struct:gserial_config_desc	typeref:struct:usb_interface_descriptor[]	file:
interface_desc	drivers/serial/usbtty.c	/^	struct usb_interface_descriptor interface_desc;$/;"	m	struct:acm_config_desc	typeref:struct:usb_interface_descriptor	file:
interface_desc	drivers/usb/gadget/f_fastboot.c	/^static struct usb_interface_descriptor interface_desc = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
interface_desc	include/mtd/cfi_flash.h	/^	u16	interface_desc;		\/* aligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u16
interface_descriptor	include/usbdevice.h	/^	struct usb_interface_descriptor *interface_descriptor;$/;"	m	struct:usb_alternate_instance	typeref:struct:usb_interface_descriptor *
interface_descriptors	drivers/serial/usbtty.c	/^static struct usb_interface_descriptor interface_descriptors[MAX_INTERFACES];$/;"	v	typeref:struct:usb_interface_descriptor[]	file:
interface_instance	drivers/serial/usbtty.c	/^static struct usb_interface_instance interface_instance[MAX_INTERFACES];$/;"	v	typeref:struct:usb_interface_instance[]	file:
interface_instance_array	include/usbdevice.h	/^	struct usb_interface_instance *interface_instance_array;$/;"	m	struct:usb_configuration_instance	typeref:struct:usb_interface_instance *
interface_level	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^struct interface_level {$/;"	s	file:
interface_map	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^static struct dfx_access interface_map[] = {$/;"	v	typeref:struct:dfx_access[]	file:
interface_mode	drivers/video/exynos/exynos_fb.c	/^	unsigned int interface_mode;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
interface_mode	include/exynos_lcd.h	/^	unsigned int interface_mode;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
interface_number	drivers/usb/gadget/f_mass_storage.c	/^	u16			interface_number;$/;"	m	struct:fsg_dev	typeref:typename:u16	file:
interface_params	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	struct if_params interface_params[MAX_INTERFACE_NUM];$/;"	m	struct:hws_topology_map	typeref:struct:if_params[]
interface_path	include/linux/edd.h	/^	} interface_path;$/;"	m	struct:edd_device_params	typeref:union:edd_device_params::__anon8a8b619a010a
interface_state	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u8 interface_state[MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u8[]
interface_support	include/linux/edd.h	/^	__u16 interface_support;$/;"	m	struct:edd_info	typeref:typename:__u16
interface_temp	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	enum hws_temperature interface_temp;$/;"	m	struct:if_params	typeref:enum:hws_temperature
interface_type	arch/arm/include/asm/omap_musb.h	/^	u8 interface_type;$/;"	m	struct:omap_musb_board_data	typeref:typename:u8
interface_type	include/linux/edd.h	/^	__u8 interface_type[8];$/;"	m	struct:edd_device_params	typeref:typename:__u8[8]
interface_version	board/corscience/tricorder/tricorder-eeprom.h	/^	char interface_version[TRICORDER_INTERFACE_VERSION_LENGTH];$/;"	m	struct:tricorder_eeprom	typeref:typename:char[]
interfaces	include/usbdevice.h	/^	int interfaces;$/;"	m	struct:usb_configuration_instance	typeref:typename:int
interfsel	drivers/usb/musb/omap3.c	/^	u32	interfsel;$/;"	m	struct:omap3_otg_regs	typeref:typename:u32	file:
interlaced	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int interlaced;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
interlaced	drivers/video/ipu.h	/^		unsigned char interlaced;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0508	typeref:typename:unsigned char
interlaced	drivers/video/ipu.h	/^		unsigned char interlaced;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0708	typeref:typename:unsigned char
interlaced	drivers/video/ipu.h	/^		unsigned char interlaced;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0908	typeref:typename:unsigned char
interlaced	drivers/video/ipu.h	/^	unsigned interlaced:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
interleave	disk/part_amiga.h	/^    u32 interleave;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
interleave	disk/part_amiga.h	/^    u32 interleave;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
interleave	include/linux/mtd/doc2000.h	/^	char interleave; \/* Internal interleaving - Millennium Plus style *\/$/;"	m	struct:DiskOnChip	typeref:typename:char
interleaved_bits	include/linux/mtd/nand.h	/^	u8 interleaved_bits;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
interleaved_ops	include/linux/mtd/nand.h	/^	u8 interleaved_ops;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
intermediate_anchor	include/smbios.h	/^	u8 intermediate_anchor[5];$/;"	m	struct:smbios_entry	typeref:typename:u8[5]
intermediate_checksum	include/smbios.h	/^	u8 intermediate_checksum;$/;"	m	struct:smbios_entry	typeref:typename:u8
internal	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_tnode *internal[YAFFS_NTNODES_INTERNAL];$/;"	m	struct:yaffs_tnode	typeref:struct:yaffs_tnode * []
internal_end_block	fs/yaffs2/yaffs_guts.h	/^	int internal_end_block;$/;"	m	struct:yaffs_dev	typeref:typename:int
internal_interrupt	arch/nds32/cpu/n1213/start.S	/^internal_interrupt:$/;"	l
internal_ram_init	board/samsung/goni/lowlevel_init.S	/^internal_ram_init:$/;"	l
internal_start_block	fs/yaffs2/yaffs_guts.h	/^	int internal_start_block;$/;"	m	struct:yaffs_dev	typeref:typename:int
internal_state	include/u-boot/zlib.h	/^	struct internal_state {int dummy;}; \/* hack for buggy compilers *\/$/;"	s
internal_state	lib/zlib/deflate.h	/^typedef struct internal_state {$/;"	s
internal_state	lib/zlib/zutil.c	/^struct internal_state      {int dummy;}; \/* for buggy compilers *\/$/;"	s	file:
internalfunctions	scripts/docproc.c	/^FILEONLY *internalfunctions;$/;"	v	typeref:typename:FILEONLY *
interpret_user_input	fs/ubifs/debug.c	/^static int interpret_user_input(const char __user *u, size_t count)$/;"	f	typeref:typename:int	file:
interrupt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t interrupt;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
interrupt	examples/standalone/interrupt.c	/^int interrupt (int argc, char * const argv[])$/;"	f	typeref:typename:int
interrupt	include/tegra-kbc.h	/^	u32 interrupt;$/;"	m	struct:kbc_tegra	typeref:typename:u32
interrupt	include/usb.h	/^	int (*interrupt)(struct udevice *bus, struct usb_device *udev,$/;"	m	struct:dm_usb_ops	typeref:typename:int (*)(struct udevice * bus,struct usb_device * udev,unsigned long pipe,void * buffer,int length,int interval)
interrupt_action	arch/m68k/lib/interrupts.c	/^struct interrupt_action {$/;"	s	file:
interrupt_action	arch/powerpc/cpu/mpc5xx/interrupts.c	/^struct interrupt_action {$/;"	s	file:
interrupt_action	arch/powerpc/cpu/mpc8xx/interrupts.c	/^struct interrupt_action {$/;"	s	file:
interrupt_clear	drivers/block/mxc_ata.c	/^	u32	interrupt_clear;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
interrupt_clear	drivers/block/sata_dwc.c	/^	struct dma_interrupt_regs	interrupt_clear;$/;"	m	struct:ahb_dma_regs	typeref:struct:dma_interrupt_regs	file:
interrupt_controller	arch/powerpc/include/asm/immap_8260.h	/^typedef struct interrupt_controller {$/;"	s
interrupt_data	drivers/usb/gadget/storage_common.c	/^struct interrupt_data {$/;"	s	file:
interrupt_disable	drivers/i2c/i2c-cdns.c	/^	u32 interrupt_disable;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
interrupt_disable	drivers/i2c/zynq_i2c.c	/^	u32 interrupt_disable;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
interrupt_enable	arch/x86/include/asm/me_common.h	/^	u32 interrupt_enable:1;$/;"	m	struct:mei_csr	typeref:typename:u32:1
interrupt_enable	drivers/block/mxc_ata.c	/^	u32	interrupt_enable;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
interrupt_enable	drivers/i2c/i2c-cdns.c	/^	u32 interrupt_enable;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
interrupt_enable	drivers/i2c/zynq_i2c.c	/^	u32 interrupt_enable;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
interrupt_enable	include/gdsys_fpga.h	/^	u16 interrupt_enable;$/;"	m	struct:ihs_i2c	typeref:typename:u16
interrupt_generate	arch/x86/include/asm/me_common.h	/^	u32 interrupt_generate:1;$/;"	m	struct:mei_csr	typeref:typename:u32:1
interrupt_handler	arch/microblaze/cpu/interrupts.c	/^void interrupt_handler(void)$/;"	f	typeref:typename:void
interrupt_handler	arch/openrisc/cpu/interrupts.c	/^void interrupt_handler(void)$/;"	f	typeref:typename:void
interrupt_handler	arch/x86/lib/bios.c	/^asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses,$/;"	f	typeref:typename:asmlinkage int
interrupt_handler_t	include/common.h	/^typedef void (interrupt_handler_t)(void *);$/;"	t	typeref:typename:void ()(void *)
interrupt_init	arch/arc/lib/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/arm/lib/interrupts.c	/^int interrupt_init (void)$/;"	f	typeref:typename:int
interrupt_init	arch/arm/lib/interrupts_64.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/arm/lib/interrupts_m.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/avr32/lib/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/blackfin/cpu/cpu.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf5227x/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf523x/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf52x2/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf530x/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf532x/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf5445x/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/m68k/cpu/mcf547x_8x/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/microblaze/cpu/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/mips/cpu/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/nds32/lib/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/nios2/cpu/interrupts.c	/^int interrupt_init (void)$/;"	f	typeref:typename:int
interrupt_init	arch/openrisc/cpu/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/powerpc/lib/interrupts.c	/^int interrupt_init (void)$/;"	f	typeref:typename:int
interrupt_init	arch/sandbox/lib/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/sh/cpu/sh2/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/sh/cpu/sh3/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/sh/cpu/sh4/interrupts.c	/^int interrupt_init (void)$/;"	f	typeref:typename:int
interrupt_init	arch/sparc/lib/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/x86/cpu/interrupts.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init	arch/xtensa/cpu/exceptions.c	/^int interrupt_init(void)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc512x/interrupts.c	/^int interrupt_init_cpu (unsigned *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc5xx/interrupts.c	/^int interrupt_init_cpu (ulong *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^int interrupt_init_cpu(ulong * decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc8260/interrupts.c	/^int interrupt_init_cpu (unsigned *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc83xx/interrupts.c	/^int interrupt_init_cpu (unsigned *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc85xx/interrupts.c	/^int interrupt_init_cpu(unsigned int *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc86xx/interrupts.c	/^int interrupt_init_cpu(unsigned long *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/mpc8xx/interrupts.c	/^int interrupt_init_cpu (unsigned *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/powerpc/cpu/ppc4xx/interrupts.c	/^int interrupt_init_cpu (unsigned *decrementer_count)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/sparc/cpu/leon2/interrupts.c	/^int interrupt_init_cpu(void)$/;"	f	typeref:typename:int
interrupt_init_cpu	arch/sparc/cpu/leon3/interrupts.c	/^int interrupt_init_cpu(void)$/;"	f	typeref:typename:int
interrupt_is_enabled	arch/sparc/lib/interrupts.c	/^int interrupt_is_enabled(void)$/;"	f	typeref:typename:int
interrupt_mask	drivers/block/sata_dwc.c	/^	struct dma_interrupt_regs	interrupt_mask;$/;"	m	struct:ahb_dma_regs	typeref:struct:dma_interrupt_regs	file:
interrupt_mask	drivers/i2c/i2c-cdns.c	/^	u32 interrupt_mask;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
interrupt_mask	drivers/i2c/zynq_i2c.c	/^	u32 interrupt_mask;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
interrupt_mask	include/faraday/fttmr010.h	/^	unsigned int	interrupt_mask;		\/* 0x38 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
interrupt_pending	drivers/block/mxc_ata.c	/^	u32	interrupt_pending;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u32	file:
interrupt_raw	drivers/block/sata_dwc.c	/^	struct dma_interrupt_regs	interrupt_raw;$/;"	m	struct:ahb_dma_regs	typeref:struct:dma_interrupt_regs	file:
interrupt_run_handler	arch/powerpc/cpu/ppc4xx/interrupts.c	/^void interrupt_run_handler(int vec)$/;"	f	typeref:typename:void
interrupt_state	include/faraday/fttmr010.h	/^	unsigned int	interrupt_state;	\/* 0x34 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
interrupt_status	arch/x86/include/asm/me_common.h	/^	u32 interrupt_status:1;$/;"	m	struct:mei_csr	typeref:typename:u32:1
interrupt_status	drivers/block/sata_dwc.c	/^	struct dma_interrupt_regs	interrupt_status;$/;"	m	struct:ahb_dma_regs	typeref:struct:dma_interrupt_regs	file:
interrupt_status	drivers/i2c/i2c-cdns.c	/^	u32 interrupt_status;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
interrupt_status	drivers/i2c/zynq_i2c.c	/^	u32 interrupt_status;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
interrupt_status	include/gdsys_fpga.h	/^	u16 interrupt_status;$/;"	m	struct:ihs_i2c	typeref:typename:u16
interrupt_vectors	tools/zynqimage.c	/^	uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; \/* 0x0 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t[]	file:
interrupt_vectors	tools/zynqmpimage.c	/^	uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; \/* 0x0 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t[]	file:
interrupts	drivers/qe/uec_phy.h	/^	u32 interrupts;$/;"	m	struct:uec_mii_info	typeref:typename:u32
interrupts_enabled	arch/arm/include/asm/proc-armv/ptrace.h	/^#define interrupts_enabled(/;"	d
interrupts_enabled	arch/nds32/include/asm/ptrace.h	/^#define interrupts_enabled(/;"	d
interval	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int interval;$/;"	m	struct:virt_root_hub	typeref:typename:int
interval	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int interval;$/;"	m	struct:virt_root_hub	typeref:typename:int
interval	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int interval;$/;"	m	struct:virt_root_hub	typeref:typename:int
interval	drivers/usb/dwc3/core.h	/^	u32			interval;$/;"	m	struct:dwc3_ep	typeref:typename:u32
interval	drivers/usb/host/ohci-s3c24xx.h	/^	int interval;$/;"	m	struct:virt_root_hub	typeref:typename:int
interval	drivers/usb/host/ohci.h	/^	int interval;$/;"	m	struct:__anone9fd91320108	typeref:typename:int
interval	drivers/usb/host/ohci.h	/^	int interval;$/;"	m	struct:virt_root_hub	typeref:typename:int
inteval	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	inteval;	\/* 0x018 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
intf	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	enum ks2_serdes_interface intf;$/;"	m	struct:ks2_serdes	typeref:enum:ks2_serdes_interface
intf	drivers/usb/eth/r8152.h	/^	struct usb_interface *intf;$/;"	m	struct:r8152	typeref:struct:usb_interface *
intf	include/u-boot/zlib.h	/^#  define intf /;"	d
intf	include/u-boot/zlib.h	/^typedef int   FAR intf;$/;"	t	typeref:typename:int FAR
intfunc	scripts/docproc.c	/^static void intfunc(char * filename) {	docfunctions(filename, NOFUNCTION); }$/;"	f	typeref:typename:void	file:
intgack_ctrl1	arch/m68k/include/asm/coldfire/intctrl.h	/^typedef struct intgack_ctrl1 {$/;"	s
intgack_t	arch/m68k/include/asm/coldfire/intctrl.h	/^} intgack_t;$/;"	t	typeref:struct:intgack_ctrl1
intinterval	common/usb_kbd.c	/^	int		intinterval;$/;"	m	struct:usb_kbd_pdata	typeref:typename:int	file:
intm1	include/tsi148.h	/^	unsigned int intm1;                   \/* 0x458         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
intm2	include/tsi148.h	/^	unsigned int intm2;                   \/* 0x45c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
intmask	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 intmask;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
intmask	drivers/net/designware.h	/^	u32 intmask;		\/* 0x3c *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
intmod	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	intmod;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
intmr	drivers/block/sata_dwc.c	/^	u32 intmr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
intmsk	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	intmsk;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
intmsk	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intmsk;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intmsk	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	intmsk;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
intmsk	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 intmsk;$/;"	m	struct:rcar_gpio	typeref:typename:u32
intmsk_clr	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intmsk_clr;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intmsk_set	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intmsk_set;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intmskr	drivers/usb/musb/davinci.h	/^	u32 	intmskr;$/;"	m	struct:davinci_usb_regs	typeref:typename:u32
intmsks	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 intmsks;$/;"	m	struct:rcar_gpio	typeref:typename:u32
intmsksetr	drivers/usb/musb/davinci.h	/^	u32 	intmsksetr;$/;"	m	struct:davinci_usb_regs	typeref:typename:u32
intno	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 intno;$/;"	m	struct:__anon39451e6d0808	typeref:typename:u8
intoffset	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	intoffset;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
intpcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 intpcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
intpcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 intpcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
intpipe	common/usb_kbd.c	/^	unsigned long	intpipe;$/;"	m	struct:usb_kbd_pdata	typeref:typename:unsigned long	file:
intpktsize	common/usb_kbd.c	/^	int		intpktsize;$/;"	m	struct:usb_kbd_pdata	typeref:typename:int	file:
intpnd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	intpnd;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
intpr	drivers/block/sata_dwc.c	/^	u32 intpr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
intpri0	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri0;	\/* 0x30 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri1	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri1;	\/* 0x34 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri2	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri2;	\/* 0x38 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri3	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri3;	\/* 0x3c *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri4	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri4;	\/* 0x40 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri5	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri5;	\/* 0x44 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri6	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri6;	\/* 0x48 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intpri7	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	intpri7;	\/* 0x4c *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
intq	common/usb_kbd.c	/^	struct int_queue *intq;$/;"	m	struct:usb_kbd_pdata	typeref:struct:int_queue *	file:
intr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 intr;   	\/* interrupt *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 intr;$/;"	m	struct:cspi_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 intr;$/;"	m	struct:cspi_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 intr;	\/* interrupt *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 intr;$/;"	m	struct:cspi_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 intr;$/;"	m	struct:cspi_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 intr;$/;"	m	struct:cspi_regs	typeref:typename:u32
intr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 intr;$/;"	m	struct:cspi_regs	typeref:typename:u32
intr	arch/m68k/include/asm/coldfire/edma.h	/^	u16 intr;		\/* 0x26 Interrupt Request *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16
intr	arch/m68k/include/asm/immap_5329.h	/^	u32 intr;		\/* 0x148 USB Interrupt Enable *\/$/;"	m	struct:usb_otg	typeref:typename:u32
intr	arch/m68k/include/asm/immap_5445x.h	/^	u32 intr;		\/* 0xa8 Interrupt Register *\/$/;"	m	struct:pci	typeref:typename:u32
intr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 intr;		\/* 0xa8 NA *\/$/;"	m	struct:pci	typeref:typename:u32
intr	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 intr;		\/* Interrupts *\/$/;"	m	struct:gptmr	typeref:typename:u8
intr	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static struct mpc5xxx_intr *intr;$/;"	v	typeref:struct:mpc5xxx_intr *	file:
intr	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 intr;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
intr	drivers/bios_emulator/include/x86emu/regs.h	/^	volatile int intr;	\/* mask of pending interrupts *\/$/;"	m	struct:__anon39451e6d0808	typeref:typename:volatile int
intr	drivers/i2c/i2c-uniphier-f.c	/^	u32 intr;			\/* interrupt status *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
intr	drivers/rtc/ftrtc010.c	/^	unsigned int intr;		\/* 0x34 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
intr_aux	drivers/video/tegra124/displayport.h	/^	u32 intr_aux;$/;"	m	struct:dpaux_ctlr	typeref:typename:u32
intr_ctrl0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 intr_ctrl0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
intr_ctrl1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 intr_ctrl1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
intr_en_aux	drivers/video/tegra124/displayport.h	/^	u32 intr_en_aux;$/;"	m	struct:dpaux_ctlr	typeref:typename:u32
intr_line_pin	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 intr_line_pin;$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
intr_reserved0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 intr_reserved0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
intr_reserved1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 intr_reserved1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
intr_st	include/andestech/andes_pcu.h	/^	unsigned int	intr_st;	\/* 0x94 - PCU Interrupt Status *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
intr_target	drivers/usb/host/xhci.h	/^	volatile __le32 intr_target;$/;"	m	struct:xhci_link_trb	typeref:typename:volatile __le32
intram_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
intram_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
intram_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
intram_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
intram_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
intram_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
intram_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
intram_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	intram_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
intrcause	drivers/pci/pci_gt64120.c	/^	u32	intrcause;$/;"	m	struct:gt64120_regs	typeref:typename:u32	file:
intrdisable	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	intrdisable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrdisable	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	intrdisable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrdisable	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 intrdisable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrdisable	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 intrdisable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrdisable	drivers/usb/host/ohci.h	/^	__u32	intrdisable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intreg	drivers/net/calxedaxgmac.c	/^	u32 intreg;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
intreg	drivers/net/designware.h	/^	u32 intreg;		\/* 0x38 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
intren	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	intren;$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32
intrenable	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	intrenable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrenable	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	intrenable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrenable	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 intrenable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrenable	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 intrenable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrenable	drivers/usb/host/ohci.h	/^	__u32	intrenable;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrmsk	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 intrmsk;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
introduction1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="introduction1">$/;"	i
introm_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
introm_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
introm_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
introm_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
introm_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
introm_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
introm_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
introm_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	introm_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
intrrx	drivers/usb/musb/musb_core.h	/^	u16	intrrx;$/;"	m	struct:musb_regs	typeref:typename:u16
intrrxe	drivers/usb/musb-new/musb_core.h	/^	u16 intrtxe, intrrxe;$/;"	m	struct:musb_context_registers	typeref:typename:u16
intrrxe	drivers/usb/musb/musb_core.h	/^	u16	intrrxe;$/;"	m	struct:musb_regs	typeref:typename:u16
intrstat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 intrstat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
intrstat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 intrstat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
intrstatus	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	intrstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrstatus	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int intrstatus;$/;"	m	struct:ohci	typeref:typename:int
intrstatus	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	intrstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrstatus	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int intrstatus;$/;"	m	struct:ohci	typeref:typename:int
intrstatus	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 intrstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrstatus	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int intrstatus;$/;"	m	struct:ohci	typeref:typename:int
intrstatus	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 intrstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrstatus	drivers/usb/host/ohci-s3c24xx.h	/^	int intrstatus;$/;"	m	struct:ohci	typeref:typename:int
intrstatus	drivers/usb/host/ohci.h	/^	__u32	intrstatus;$/;"	m	struct:ohci_regs	typeref:typename:__u32
intrstatus	drivers/usb/host/ohci.h	/^	int intrstatus;$/;"	m	struct:ohci	typeref:typename:int
intrtx	drivers/usb/musb/musb_core.h	/^	u16	intrtx;$/;"	m	struct:musb_regs	typeref:typename:u16
intrtxe	drivers/usb/musb-new/musb_core.h	/^	u16 intrtxe, intrrxe;$/;"	m	struct:musb_context_registers	typeref:typename:u16
intrtxe	drivers/usb/musb/musb_core.h	/^	u16	intrtxe;$/;"	m	struct:musb_regs	typeref:typename:u16
intrusb	drivers/usb/musb/musb_core.h	/^	u8	intrusb;$/;"	m	struct:musb_regs	typeref:typename:u8
intrusbe	drivers/usb/musb-new/musb_core.h	/^	u8 intrusbe;$/;"	m	struct:musb_context_registers	typeref:typename:u8
intrusbe	drivers/usb/musb/musb_core.h	/^	u8	intrusbe;$/;"	m	struct:musb_regs	typeref:typename:u8
ints	include/tsi148.h	/^	unsigned int ints;                    \/* 0x450         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
intset	drivers/net/lpc32xx_eth.c	/^	u32 intset;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
intsig_enr	drivers/mtd/nand/arasan_nfc.c	/^	u32 intsig_enr;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
intsrc	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intsrc;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intsrc	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	intsrc;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
intsrc_clr	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intsrc_clr;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intsrc_set	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intsrc_set;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intsrcmsk	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intsrcmsk;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
intstat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	intstat;	\/* Interrupt Status *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
intstat	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	intstat;	\/* Interrupt Status *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
intstat	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int intstat;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
intstat	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 intstat;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
intstatus	drivers/net/lpc32xx_eth.c	/^	u32 intstatus;		\/* Interrupt status register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
intsts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t intsts;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
intsts_enr	drivers/mtd/nand/arasan_nfc.c	/^	u32 intsts_enr;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
intsts_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 intsts_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
intstsc	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t intstsc;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
intstsp	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t intstsp;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
intsubmsk	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	intsubmsk;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
inttype1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t inttype1;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
inttype2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t inttype2;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
inttype_level	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 inttype_level;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
intv_reg	drivers/usb/musb-new/musb_host.h	/^	u8			intv_reg;	\/* {rx,tx} interval register *\/$/;"	m	struct:musb_qh	typeref:typename:u8
intval1	include/dm/test.h	/^	int intval1;$/;"	m	struct:dm_test_perdev_uc_pdata	typeref:typename:int
intval2	include/dm/test.h	/^	int intval2;$/;"	m	struct:dm_test_perdev_uc_pdata	typeref:typename:int
intval3	include/dm/test.h	/^	int intval3;$/;"	m	struct:dm_test_perdev_uc_pdata	typeref:typename:int
intvec0	drivers/spi/davinci_spi.c	/^	dv_reg	intvec0;	\/* 0x60 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
intvec1	drivers/spi/davinci_spi.c	/^	dv_reg	intvec1;	\/* 0x64 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
intvector	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	intvector;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
inum	fs/ubifs/debug.c	/^	ino_t inum;$/;"	m	struct:fsck_inode	typeref:typename:ino_t	file:
inum	fs/ubifs/orphan.c	/^	ino_t inum;$/;"	m	struct:check_orphan	typeref:typename:ino_t	file:
inum	fs/ubifs/recovery.c	/^	ino_t inum;$/;"	m	struct:size_entry	typeref:typename:ino_t	file:
inum	fs/ubifs/ubifs-media.h	/^	__le32 inum;$/;"	m	struct:ubifs_trun_node	typeref:typename:__le32
inum	fs/ubifs/ubifs-media.h	/^	__le64 inum;$/;"	m	struct:ubifs_dent_node	typeref:typename:__le64
inum	fs/ubifs/ubifs.h	/^	ino_t inum;$/;"	m	struct:ubifs_orphan	typeref:typename:ino_t
inuse	common/dlmalloc.c	/^#define inuse(/;"	d	file:
inuse_bit_at_offset	common/dlmalloc.c	/^#define inuse_bit_at_offset(/;"	d	file:
inv	arch/mips/mach-pic32/include/mach/pic32.h	/^	u32 inv;$/;"	m	struct:pic32_reg_atomic	typeref:typename:u32
inv_mix_sub_columns	lib/aes.c	/^static void inv_mix_sub_columns(u8 *state)$/;"	f	typeref:typename:void	file:
inv_sbox	lib/aes.c	/^static const u8 inv_sbox[256] = {$/;"	v	typeref:typename:const u8[256]	file:
inv_shift_rows	lib/aes.c	/^static void inv_shift_rows(u8 *state)$/;"	f	typeref:typename:void	file:
inval_finished	arch/arm/cpu/armv7/cache_v7_asm.S	/^inval_finished:$/;"	l
inval_levels	arch/arm/cpu/armv7/cache_v7_asm.S	/^inval_levels:$/;"	l
inval_loop1	arch/arm/cpu/armv7/cache_v7_asm.S	/^inval_loop1:$/;"	l
inval_loop2	arch/arm/cpu/armv7/cache_v7_asm.S	/^inval_loop2:$/;"	l
inval_skip	arch/arm/cpu/armv7/cache_v7_asm.S	/^inval_skip:$/;"	l
invalid_key_init	fs/ubifs/key.h	/^static inline void invalid_key_init(const struct ubifs_info *c,$/;"	f	typeref:typename:void
invalidate	arch/arm/cpu/armv7/mx6/soc.c	/^	u32	invalidate;$/;"	m	struct:scu_regs	typeref:typename:u32	file:
invalidate_bats	arch/powerpc/cpu/mpc86xx/start.S	/^invalidate_bats:$/;"	l
invalidate_cache	drivers/net/sh_eth.c	/^#define invalidate_cache(/;"	d	file:
invalidate_cpc	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^#define invalidate_cpc(/;"	d	file:
invalidate_cpc	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^static void invalidate_cpc(void)$/;"	f	typeref:typename:void	file:
invalidate_dcac	arch/nds32/cpu/n1213/start.S	/^invalidate_dcac:$/;"	l
invalidate_dcache	arch/powerpc/cpu/mpc85xx/start.S	/^invalidate_dcache:$/;"	l
invalidate_dcache_all	arch/arc/lib/cache.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_all	arch/arm/cpu/arm11/cpu.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_all	arch/arm/cpu/arm926ejs/cache.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_all	arch/arm/cpu/armv7/cache_v7.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_all	arch/arm/cpu/armv8/cache_v8.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_all	arch/arm/cpu/pxa/cache.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_all	arch/xtensa/lib/cache.c	/^void invalidate_dcache_all(void)$/;"	f	typeref:typename:void
invalidate_dcache_buffer	drivers/usb/host/ohci-hcd.c	/^#define invalidate_dcache_buffer(/;"	d	file:
invalidate_dcache_ed	drivers/usb/host/ohci-hcd.c	/^#define invalidate_dcache_ed(/;"	d	file:
invalidate_dcache_hcca	drivers/usb/host/ohci-hcd.c	/^#define invalidate_dcache_hcca(/;"	d	file:
invalidate_dcache_iso_td	drivers/usb/host/ohci-hcd.c	/^#define invalidate_dcache_iso_td(/;"	d	file:
invalidate_dcache_range	arch/arc/lib/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/arm/cpu/arm11/cpu.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/arm/cpu/arm926ejs/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/arm/cpu/armv7/cache_v7.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/arm/cpu/armv8/cache_v8.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/arm/cpu/pxa/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/arm/lib/cache.c	/^__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:__weak void
invalidate_dcache_range	arch/avr32/cpu/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/blackfin/lib/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/m68k/lib/cache.c	/^__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:__weak void
invalidate_dcache_range	arch/mips/lib/cache.c	/^void invalidate_dcache_range(ulong start_addr, ulong stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/nds32/lib/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/nios2/lib/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/openrisc/cpu/cache.c	/^void invalidate_dcache_range(unsigned long addr, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/sh/cpu/sh4/cache.c	/^void invalidate_dcache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/x86/cpu/cpu.c	/^void invalidate_dcache_range(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
invalidate_dcache_range	arch/xtensa/lib/cache.c	/^void invalidate_dcache_range(ulong start, ulong stop)$/;"	f	typeref:typename:void
invalidate_dcache_td	drivers/usb/host/ohci-hcd.c	/^#define invalidate_dcache_td(/;"	d	file:
invalidate_fastmap	drivers/mtd/ubi/fastmap.c	/^static int invalidate_fastmap(struct ubi_device *ubi)$/;"	f	typeref:typename:int	file:
invalidate_icac	arch/nds32/cpu/n1213/start.S	/^invalidate_icac:$/;"	l
invalidate_icache	arch/powerpc/cpu/mpc85xx/start.S	/^invalidate_icache:$/;"	l
invalidate_icache_all	arch/arc/lib/cache.c	/^void invalidate_icache_all(void)$/;"	f	typeref:typename:void
invalidate_icache_all	arch/arm/cpu/armv7/cache_v7.c	/^void invalidate_icache_all(void)$/;"	f	typeref:typename:void
invalidate_icache_all	arch/arm/cpu/armv8/cache_v8.c	/^void invalidate_icache_all(void)$/;"	f	typeref:typename:void
invalidate_icache_all	arch/arm/mach-at91/arm926ejs/cache.c	/^void invalidate_icache_all(void)$/;"	f	typeref:typename:void
invalidate_icache_all	arch/xtensa/lib/cache.c	/^void invalidate_icache_all(void)$/;"	f	typeref:typename:void
invalidate_icache_all	cmd/cache.c	/^void __weak invalidate_icache_all(void)$/;"	f	typeref:typename:void __weak
invalidate_icache_all	lib/efi_loader/efi_image_loader.c	/^void __weak invalidate_icache_all(void)$/;"	f	typeref:typename:void __weak
invalidate_icache_range	arch/nds32/lib/cache.c	/^void invalidate_icache_range(unsigned long start, unsigned long end)$/;"	f	typeref:typename:void
invalidate_icache_range	arch/openrisc/cpu/cache.c	/^static void invalidate_icache_range(unsigned long addr, unsigned long stop)$/;"	f	typeref:typename:void	file:
invalidate_l2_cache	arch/arm/cpu/arm926ejs/cache.c	/^__weak void invalidate_l2_cache(void) {}$/;"	f	typeref:typename:__weak void
invalidate_l2_cache	arch/arm/cpu/pxa/cache.c	/^__weak void invalidate_l2_cache(void) {}$/;"	f	typeref:typename:__weak void
invalidate_l2_cache	arch/arm/include/asm/cache.h	/^static inline void invalidate_l2_cache(void)$/;"	f	typeref:typename:void
invalidate_l2_cache	arch/arm/lib/cache.c	/^void invalidate_l2_cache(void)$/;"	f	typeref:typename:void
invalidate_tlb	arch/powerpc/cpu/mpc85xx/tlb.c	/^void invalidate_tlb(u8 tlb)$/;"	f	typeref:typename:void
invd	arch/x86/include/asm/cache.h	/^static inline void invd(void)$/;"	f	typeref:typename:void
invert	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool invert;$/;"	m	struct:pin_info	typeref:typename:bool	file:
invert	drivers/gpio/pca953x_gpio.c	/^	int invert;$/;"	m	struct:pca953x_info	typeref:typename:int	file:
invert	drivers/phy/marvell/comphy.h	/^	u32 invert;$/;"	m	struct:comphy_map	typeref:typename:u32
invert	drivers/video/stb_truetype.h	/^   int invert;$/;"	m	struct:stbtt__edge	typeref:typename:int
invert	tools/fdtgrep.c	/^	int invert;		\/* Invert polarity of match *\/$/;"	m	struct:display_info	typeref:typename:int	file:
invert_frm_clock	drivers/video/da8xx-fb.h	/^	unsigned char invert_frm_clock;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
invert_led2_88e1514	board/gdsys/common/phy.c	/^struct mii_setupcmd invert_led2_88e1514[] = {$/;"	v	typeref:struct:mii_setupcmd[]
invert_line_clock	drivers/video/da8xx-fb.h	/^	unsigned char invert_line_clock;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
invert_pxl_clk	drivers/video/da8xx-fb.h	/^	unsigned char	invert_pxl_clk;	\/* Invert Pixel clock *\/$/;"	m	struct:da8xx_panel	typeref:typename:unsigned char
invl2	arch/powerpc/cpu/mpc86xx/cache.S	/^invl2:$/;"	l
invl2	arch/powerpc/cpu/mpc86xx/release.S	/^invl2:$/;"	l
invoke_mebx	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 invoke_mebx:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
invoke_mebx	arch/x86/include/asm/me_common.h	/^	u32 invoke_mebx:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
invoke_smc	drivers/fpga/zynqmppl.c	/^static int invoke_smc(ulong id, ulong reg0, ulong reg1, ulong reg2)$/;"	f	typeref:typename:int	file:
inw	arch/arm/include/asm/io.h	/^#define inw(/;"	d
inw	arch/avr32/include/asm/io.h	/^#define inw(/;"	d
inw	arch/blackfin/include/asm/io.h	/^#define inw(/;"	d
inw	arch/m68k/include/asm/io.h	/^#define inw(/;"	d
inw	arch/microblaze/include/asm/io.h	/^#define inw(/;"	d
inw	arch/nds32/include/asm/io.h	/^#define inw(/;"	d
inw	arch/nios2/include/asm/io.h	/^#define inw(/;"	d
inw	arch/powerpc/include/asm/io.h	/^#define inw(/;"	d
inw	arch/sandbox/lib/pci_io.c	/^int inw(unsigned int addr)$/;"	f	typeref:typename:int
inw	arch/sh/include/asm/io.h	/^#define inw(/;"	d
inw	arch/x86/include/asm/io.h	/^#define inw(/;"	d
inw	arch/xtensa/include/asm/io.h	/^#define inw(/;"	d
inw	include/usbdevice.h	/^#define inw(/;"	d
inw_p	arch/arm/include/asm/io.h	/^#define inw_p(/;"	d
inw_p	arch/blackfin/include/asm/io.h	/^#define inw_p(/;"	d
inw_p	arch/microblaze/include/asm/io.h	/^#define inw_p(/;"	d
inw_p	arch/nds32/include/asm/io.h	/^#define inw_p(/;"	d
inw_p	arch/powerpc/include/asm/io.h	/^#define inw_p(/;"	d
inw_p	arch/sh/include/asm/io.h	/^#define inw_p(/;"	d
inw_p	arch/xtensa/include/asm/io.h	/^#define inw_p(/;"	d
io	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 io:2;		\/* input or output PMUX_PIN_...     *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
io	drivers/serial/serial_bcm283x_mu.c	/^	u32 io;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
io0	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int io0;		\/* 0x444 *\/$/;"	m	struct:control_prog_io	typeref:typename:unsigned int
io1	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int io1;		\/* 0x448 *\/$/;"	m	struct:control_prog_io	typeref:typename:unsigned int
io2	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int io2;		\/* 0x408 *\/$/;"	m	struct:control_prog_io	typeref:typename:unsigned int
io_addr	include/linux/mtd/fsl_upm.h	/^	void __iomem *io_addr;$/;"	m	struct:fsl_upm	typeref:typename:void __iomem *
io_align	include/efi_api.h	/^	u32 io_align;$/;"	m	struct:efi_block_io_media	typeref:typename:u32
io_apic_read	arch/x86/cpu/ioapic.c	/^u32 io_apic_read(u32 reg)$/;"	f	typeref:typename:u32
io_apic_set_id	arch/x86/cpu/ioapic.c	/^void io_apic_set_id(int ioapic_id)$/;"	f	typeref:typename:void
io_apic_write	arch/x86/cpu/ioapic.c	/^void io_apic_write(u32 reg, u32 val)$/;"	f	typeref:typename:void
io_base	drivers/gpio/stm32_gpio.c	/^static const unsigned long io_base[] = {$/;"	v	typeref:typename:const unsigned long[]	file:
io_base	drivers/pci/pci_ftpci100.c	/^	unsigned int io_base;$/;"	m	struct:ftpci100_data	typeref:typename:unsigned int	file:
io_bb_delay	board/gdsys/common/miiphybb.c	/^static int io_bb_delay(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
io_bb_get_mdio	board/gdsys/common/miiphybb.c	/^static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)$/;"	f	typeref:typename:int	file:
io_bb_mdio_active	board/gdsys/common/miiphybb.c	/^static int io_bb_mdio_active(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
io_bb_mdio_tristate	board/gdsys/common/miiphybb.c	/^static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
io_bb_mii_init	board/gdsys/common/miiphybb.c	/^static int io_bb_mii_init(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
io_bb_pinset	board/gdsys/common/miiphybb.c	/^struct io_bb_pinset {$/;"	s	file:
io_bb_pinsets	board/gdsys/common/miiphybb.c	/^struct io_bb_pinset io_bb_pinsets[] = {$/;"	v	typeref:struct:io_bb_pinset[]
io_bb_set_mdc	board/gdsys/common/miiphybb.c	/^static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
io_bb_set_mdio	board/gdsys/common/miiphybb.c	/^static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
io_bus	arch/powerpc/include/asm/fsl_pci.h	/^	pci_addr_t io_bus;$/;"	m	struct:fsl_pci_info	typeref:typename:pci_addr_t
io_bus	drivers/pci/pcie_layerscape.c	/^	u64 io_bus;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
io_calibr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 io_calibr;		\/* 0x34: IO Calibration *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
io_check_status	board/gdsys/common/cmd_ioloop.c	/^static void io_check_status(unsigned int fpga, u16 status, bool silent)$/;"	f	typeref:typename:void	file:
io_conf	drivers/gpio/mvebu_gpio.c	/^	u32 io_conf;$/;"	m	struct:mvebu_gpio_regs	typeref:typename:u32	file:
io_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^struct socfpga_sdram_io_config io_config = {$/;"	v	typeref:struct:socfpga_sdram_io_config
io_control_can1_tx	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_can1_tx;		\/* CAN1_TX pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_can2_tx	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_can2_tx;		\/* CAN2_TX pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_ckstp_out	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_ckstp_out;		\/* CKSTP_OUT pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad00	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad00;		\/* EMB_AD00 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad01	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad01;		\/* EMB_AD01 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad02	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad02;		\/* EMB_AD02 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad03	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad03;		\/* EMB_AD03 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad04	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad04;		\/* EMB_AD04 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad05	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad05;		\/* EMB_AD05 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad06	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad06;		\/* EMB_AD06 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad07	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad07;		\/* EMB_AD07 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad08	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad08;		\/* EMB_AD08 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad09	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad09;		\/* EMB_AD09 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad10	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad10;		\/* EMB_AD10 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad11	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad11;		\/* EMB_AD11 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad12	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad12;		\/* EMB_AD12 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad13	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad13;		\/* EMB_AD13 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad14	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad14;		\/* EMB_AD14 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad15	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad15;		\/* EMB_AD15 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad16	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad16;		\/* EMB_AD16 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad17	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad17;		\/* EMB_AD17 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad18	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad18;		\/* EMB_AD18 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad19	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad19;		\/* EMB_AD19 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad20	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad20;		\/* EMB_AD20 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad21	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad21;		\/* EMB_AD21 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad22	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad22;		\/* EMB_AD22 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad23	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad23;		\/* EMB_AD23 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad24	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad24;		\/* EMB_AD24 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad25	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad25;		\/* EMB_AD25 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad26	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad26;		\/* EMB_AD26 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad27	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad27;		\/* EMB_AD27 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad28	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad28;		\/* EMB_AD28 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad29	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad29;		\/* EMB_AD29 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad30	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad30;		\/* EMB_AD30 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ad31	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ad31;		\/* EMB_AD31 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ax00	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ax00;		\/* EMB_AX00 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ax01	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ax01;		\/* EMB_AX01 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_emb_ax02	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_emb_ax02;		\/* EMB_AX02 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_gp	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_gp;			\/* GP pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_i2c0_scl	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_i2c0_scl;		\/* I2C0_SCL pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_i2c0_sda	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_i2c0_sda;		\/* I2C0_SDA pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_i2c1_scl	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_i2c1_scl;		\/* I2C1_SCL pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_i2c1_sda	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_i2c1_sda;		\/* I2C1_SDA pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_i2c2_scl	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_i2c2_scl;		\/* I2C2_SCL pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_i2c2_sda	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_i2c2_sda;		\/* I2C2_SDA pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_irq0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_irq0;		\/* IRQ0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_irq1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_irq1;		\/* IRQ1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_j1850_rx	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_j1850_rx;		\/* J1850_RX pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_j1850_tx	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_j1850_tx;		\/* J1850_TX pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_ack	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_ack;		\/* LPC_ACK pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_ax03	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_ax03;		\/* LPC_AX03 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_clk	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_clk;		\/* LPC_CLK pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_cs0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_cs0;		\/* LPC_CS0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_cs1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_cs1;		\/* LPC_CS1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_cs2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_cs2;		\/* LPC_CS2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_oe	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_oe;		\/* LPC_OE pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_lpc_rw	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_lpc_rw;		\/* LPC_R\/W pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_mem	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_mem;			\/* MEM pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_ale	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_ale;		\/* NFC_ALE pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_ce0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_ce0;		\/* NFC_CE0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_cle	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_cle;		\/* NFC_CLE pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_rb	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_rb;		\/* NFC_RB pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_re	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_re;		\/* NFC_RE pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_we	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_we;		\/* NFC_WE pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_nfc_wp	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_nfc_wp;		\/* NFC_WP pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_ce1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_ce1;		\/* PATA_CE1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_ce2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_ce2;		\/* PATA_CE2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_dack	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_dack;		\/* PATA_DACK pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_drq	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_drq;		\/* PATA_DRQ pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_intrq	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_intrq;		\/* PATA_INTRQ pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_iochrdy	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_iochrdy;	\/* PATA_IOCHRDY pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_ior	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_ior;		\/* PATA_IOR pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_iow	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_iow;		\/* PATA_IOW pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pata_isolate	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pata_isolate;	\/* PATA_ISOLATE pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad00	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad00;		\/* PCI_AD00 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad01	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad01;		\/* PCI_AD01 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad02	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad02;		\/* PCI_AD02 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad03	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad03;		\/* PCI_AD03 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad04	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad04;		\/* PCI_AD04 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad05	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad05;		\/* PCI_AD05 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad06	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad06;		\/* PCI_AD06 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad07	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad07;		\/* PCI_AD07 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad08	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad08;		\/* PCI_AD08 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad09	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad09;		\/* PCI_AD09 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad10	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad10;		\/* PCI_AD10 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad11	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad11;		\/* PCI_AD11 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad12	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad12;		\/* PCI_AD12 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad13	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad13;		\/* PCI_AD13 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad14	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad14;		\/* PCI_AD14 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad15	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad15;		\/* PCI_AD15 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad16	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad16;		\/* PCI_AD16 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad17	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad17;		\/* PCI_AD17 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad18	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad18;		\/* PCI_AD18 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad19	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad19;		\/* PCI_AD19 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad20	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad20;		\/* PCI_AD20 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad21	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad21;		\/* PCI_AD21 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad22	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad22;		\/* PCI_AD22 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad23	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad23;		\/* PCI_AD23 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad24	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad24;		\/* PCI_AD24 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad25	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad25;		\/* PCI_AD25 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad26	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad26;		\/* PCI_AD26 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad27	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad27;		\/* PCI_AD27 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad28	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad28;		\/* PCI_AD28 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad29	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad29;		\/* PCI_AD29 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad30	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad30;		\/* PCI_AD30 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_ad31	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_ad31;		\/* PCI_AD31 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_cbe0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_cbe0;		\/* PCI_CBE0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_cbe1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_cbe1;		\/* PCI_CBE1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_cbe2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_cbe2;		\/* PCI_CBE2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_cbe3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_cbe3;		\/* PCI_CBE3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_clk	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_clk;		\/* PCI_CLK pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_devsel	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_devsel;		\/* PCI_DEVSEL pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_frame	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_frame;		\/* PCI_FRAME pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_grant0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_grant0;		\/* PCI_GRANT0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_grant1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_grant1;		\/* PCI_GRANT1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_grant2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_grant2;		\/* PCI_GRANT2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_idsel	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_idsel;		\/* PCI_IDSEL pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_inta	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_inta;		\/* PCI_INTA pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_irdy	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_irdy;		\/* PCI_IRDY pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_par	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_par;		\/* PCI_PAR pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_perr	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_perr;		\/* PCI_PERR pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_req0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_req0;		\/* PCI_REQ0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_req1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_req1;		\/* PCI_REQ1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_req2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_req2;		\/* PCI_REQ2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_rst	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_rst;		\/* PCI_RST- pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_serr	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_serr;		\/* PCI_SERR pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_stop	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_stop;		\/* PCI_STOP pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_pci_trdy	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_pci_trdy;		\/* PCI_TRDY pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc0_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc0_0;		\/* PSC0_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc0_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc0_1;		\/* PSC0_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc0_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc0_2;		\/* PSC0_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc0_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc0_3;		\/* PSC0_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc0_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc0_4;		\/* PSC0_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc10_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc10_0;		\/* PSC10_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc10_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc10_1;		\/* PSC10_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc10_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc10_2;		\/* PSC10_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc10_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc10_3;		\/* PSC10_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc10_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc10_4;		\/* PSC10_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc11_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc11_0;		\/* PSC11_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc11_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc11_1;		\/* PSC11_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc11_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc11_2;		\/* PSC11_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc11_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc11_3;		\/* PSC11_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc11_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc11_4;		\/* PSC11_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc1_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc1_0;		\/* PSC1_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc1_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc1_1;		\/* PSC1_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc1_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc1_2;		\/* PSC1_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc1_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc1_3;		\/* PSC1_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc1_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc1_4;		\/* PSC1_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc2_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc2_0;		\/* PSC2_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc2_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc2_1;		\/* PSC2_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc2_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc2_2;		\/* PSC2_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc2_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc2_3;		\/* PSC2_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc2_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc2_4;		\/* PSC2_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc3_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc3_0;		\/* PSC3_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc3_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc3_1;		\/* PSC3_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc3_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc3_2;		\/* PSC3_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc3_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc3_3;		\/* PSC3_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc3_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc3_4;		\/* PSC3_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc4_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc4_0;		\/* PSC4_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc4_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc4_1;		\/* PSC4_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc4_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc4_2;		\/* PSC4_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc4_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc4_3;		\/* PSC4_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc4_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc4_4;		\/* PSC4_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc5_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc5_0;		\/* PSC5_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc5_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc5_1;		\/* PSC5_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc5_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc5_2;		\/* PSC5_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc5_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc5_3;		\/* PSC5_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc5_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc5_4;		\/* PSC5_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc6_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc6_0;		\/* PSC6_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc6_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc6_1;		\/* PSC6_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc6_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc6_2;		\/* PSC6_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc6_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc6_3;		\/* PSC6_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc6_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc6_4;		\/* PSC6_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc7_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc7_0;		\/* PSC7_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc7_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc7_1;		\/* PSC7_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc7_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc7_2;		\/* PSC7_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc7_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc7_3;		\/* PSC7_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc7_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc7_4;		\/* PSC7_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc8_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc8_0;		\/* PSC8_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc8_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc8_1;		\/* PSC8_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc8_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc8_2;		\/* PSC8_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc8_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc8_3;		\/* PSC8_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc8_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc8_4;		\/* PSC8_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc9_0	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc9_0;		\/* PSC9_0 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc9_1	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc9_1;		\/* PSC9_1 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc9_2	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc9_2;		\/* PSC9_2 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc9_3	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc9_3;		\/* PSC9_3 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc9_4	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc9_4;		\/* PSC9_4 pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_psc_mclk_in	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_psc_mclk_in;		\/* PSC_MCLK_IN pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_spdif_rx	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_spdif_rx;		\/* SPDIF_RX pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_spdif_tx	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_spdif_tx;		\/* SPDIF_TX pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_spdif_txclk	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_spdif_txclk;		\/* SPDIF_TXCLK pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_control_usb_phy_drvvbus	arch/powerpc/include/asm/immap_512x.h	/^	u32	io_control_usb_phy_drvvbus;	\/* USB2_DRVVBUS pad ctrl reg *\/$/;"	m	struct:ioctrl512x	typeref:typename:u32
io_ctrl	arch/powerpc/include/asm/immap_512x.h	/^	ioctrl512x_t		io_ctrl;	\/* IO Control *\/$/;"	m	struct:immap	typeref:typename:ioctrl512x_t
io_domains	arch/arm/dts/rk3288-popmetal.dtsi	/^	io_domains: io-domains {$/;"	l
io_domains	arch/arm/dts/rk3399.dtsi	/^		io_domains: io-domains {$/;"	l	label:grf
io_exp	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^static struct marvell_io_exp io_exp[] = {$/;"	v	typeref:struct:marvell_io_exp[]	file:
io_exp	board/solidrun/clearfog/clearfog.c	/^static struct marvell_io_exp io_exp[] = {$/;"	v	typeref:struct:marvell_io_exp[]	file:
io_generic_packet	board/gdsys/common/cmd_ioloop.c	/^struct io_generic_packet {$/;"	s	file:
io_in_delay_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	io_in_delay_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
io_init	drivers/mtd/ubi/build.c	/^static int io_init(struct ubi_device *ubi, int max_beb_per1024)$/;"	f	typeref:typename:int	file:
io_input	board/v38b/ethaddr.c	/^static void io_input()$/;"	f	typeref:typename:void	file:
io_insb	arch/microblaze/include/asm/io.h	/^static inline void io_insb (unsigned long port, void *dst, unsigned long count)$/;"	f	typeref:typename:void
io_insl	arch/microblaze/include/asm/io.h	/^static inline void io_insl (unsigned long port, void *dst, unsigned long count)$/;"	f	typeref:typename:void
io_insw	arch/microblaze/include/asm/io.h	/^static inline void io_insw (unsigned long port, void *dst, unsigned long count)$/;"	f	typeref:typename:void
io_mutex	fs/ubifs/ubifs.h	/^	struct mutex io_mutex;$/;"	m	struct:ubifs_wbuf	typeref:struct:mutex
io_out	board/v38b/ethaddr.c	/^static void io_out(int value)$/;"	f	typeref:typename:void	file:
io_out1_delay_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	io_out1_delay_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
io_out2_delay_max	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	io_out2_delay_max;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
io_output	board/v38b/ethaddr.c	/^static void io_output()$/;"	f	typeref:typename:void	file:
io_outsb	arch/microblaze/include/asm/io.h	/^io_outsb (unsigned long port, const void *src, unsigned long count)$/;"	f	typeref:typename:void
io_outsl	arch/microblaze/include/asm/io.h	/^io_outsl (unsigned long port, const void *src, unsigned long count)$/;"	f	typeref:typename:void
io_outsw	arch/microblaze/include/asm/io.h	/^io_outsw (unsigned long port, const void *src, unsigned long count)$/;"	f	typeref:typename:void
io_p2v	include/SA-1100.h	/^#define io_p2v(/;"	d
io_phys	arch/powerpc/include/asm/fsl_pci.h	/^	phys_size_t io_phys;$/;"	m	struct:fsl_pci_info	typeref:typename:phys_size_t
io_phys	drivers/pci/pcie_layerscape.c	/^	u64 io_phys;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
io_pin_capacitance_max	include/linux/mtd/nand.h	/^	u8 io_pin_capacitance_max;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
io_pin_capacitance_typ	include/linux/mtd/nand.h	/^	__le16 io_pin_capacitance_typ;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
io_pin_capacitance_typ	include/linux/mtd/nand.h	/^	__le16 io_pin_capacitance_typ;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
io_pll_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 io_pll_ctrl; \/* 0x108 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
io_port	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct io_port {$/;"	s
io_port	arch/powerpc/include/asm/immap_8260.h	/^typedef struct io_port {$/;"	s
io_port_base	arch/mips/include/asm/global_data.h	/^	unsigned long io_port_base;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
io_receive	board/gdsys/common/cmd_ioloop.c	/^static void io_receive(unsigned int fpga)$/;"	f	typeref:typename:void	file:
io_reflect	board/gdsys/common/cmd_ioloop.c	/^static void io_reflect(unsigned int fpga)$/;"	f	typeref:typename:void	file:
io_region_base	arch/nios2/include/asm/global_data.h	/^	u32 io_region_base;$/;"	m	struct:arch_global_data	typeref:typename:u32
io_sel	drivers/gpio/intel_ich6_gpio.c	/^	uint16_t io_sel;$/;"	m	struct:ich6_bank_priv	typeref:typename:uint16_t	file:
io_send	board/gdsys/common/cmd_ioloop.c	/^static void io_send(unsigned int fpga, unsigned int size)$/;"	f	typeref:typename:void	file:
io_settings_ddr3	arch/arm/cpu/armv7/omap5/hwinit.c	/^static void io_settings_ddr3(void)$/;"	f	typeref:typename:void	file:
io_settings_lpddr2	arch/arm/cpu/armv7/omap5/hwinit.c	/^static void io_settings_lpddr2(void)$/;"	f	typeref:typename:void	file:
io_size	arch/powerpc/include/asm/fsl_pci.h	/^	pci_size_t io_size;$/;"	m	struct:fsl_pci_info	typeref:typename:pci_size_t
io_size	drivers/pci/pcie_layerscape.c	/^	u64 io_size;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
io_vsel	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 io_vsel;$/;"	m	struct:rk3288_grf	typeref:typename:u32
io_vsel	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 io_vsel;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
io_width	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 io_width;$/;"	m	struct:dram_para	typeref:typename:u32
io_width	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 io_width;$/;"	m	struct:dram_para	typeref:typename:u32
io_width	arch/arm/include/asm/emif.h	/^	u8	io_width;$/;"	m	struct:lpddr2_device_details	typeref:typename:u8
ioaddr	drivers/block/pata_bfin.h	/^	struct ata_ioports ioaddr;	\/* ATA cmd\/ctl\/dma reg blks     *\/$/;"	m	struct:ata_port	typeref:struct:ata_ioports
ioaddr	drivers/block/sata_dwc.h	/^	struct ata_ioports	ioaddr;$/;"	m	struct:ata_port	typeref:struct:ata_ioports
ioaddr	drivers/block/sata_sil3114.h	/^	struct sata_ioports ioaddr;	\/* ATA cmd\/ctl\/dma reg blks     *\/$/;"	m	struct:sata_port	typeref:struct:sata_ioports
ioaddr	drivers/net/rtl8139.c	/^static int ioaddr;$/;"	v	typeref:typename:int	file:
ioaddr	drivers/net/rtl8169.c	/^static unsigned long ioaddr;$/;"	v	typeref:typename:unsigned long	file:
ioaddr	drivers/net/uli526x.c	/^	long ioaddr;			\/* I\/O base address *\/$/;"	m	struct:uli526x_board_info	typeref:typename:long	file:
ioaddr	include/dwmmc.h	/^	void *ioaddr;$/;"	m	struct:dwmci_host	typeref:typename:void *
ioaddr	include/sdhci.h	/^	void *ioaddr;$/;"	m	struct:sdhci_host	typeref:typename:void *
ioapic_addr	arch/x86/include/asm/acpi_table.h	/^	u32 ioapic_addr;	\/* I\/O APIC address *\/$/;"	m	struct:acpi_madt_ioapic	typeref:typename:u32
ioapic_id	arch/x86/include/asm/acpi_table.h	/^	u8 ioapic_id;		\/* I\/O APIC ID *\/$/;"	m	struct:acpi_madt_ioapic	typeref:typename:u8
ioareas	include/ambapp.h	/^	unsigned int	ioareas[6];	\/* PnP I\/O AREAs of AHB buses *\/$/;"	m	struct:ambapp_bus	typeref:typename:unsigned int[6]
ioata	include/linux/mtd/fsmc_nand.h	/^	u32 ioata;			\/* 0x50 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
iobar	include/ambapp.h	/^	const unsigned int	iobar;		\/* MASK, ADDRESS, TYPE,$/;"	m	struct:ambapp_pnp_apb	typeref:typename:const unsigned int
iobarrier_r	arch/powerpc/include/asm/io.h	/^#define iobarrier_r(/;"	d
iobarrier_rw	arch/powerpc/include/asm/io.h	/^#define iobarrier_rw(/;"	d
iobarrier_w	arch/powerpc/include/asm/io.h	/^#define iobarrier_w(/;"	d
iobase	arch/m68k/include/asm/fec.h	/^	u32 iobase;$/;"	m	struct:fec_info_s	typeref:typename:u32
iobase	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 iobase;$/;"	m	struct:fec_info_dma	typeref:typename:u32
iobase	drivers/block/sata_sil.h	/^	ulong iobase[3];$/;"	m	struct:sata_info	typeref:typename:ulong[3]
iobase	drivers/block/sata_sil3114.c	/^static u32 iobase[6] = { 0, 0, 0, 0, 0, 0};	\/* PCI BAR registers for device *\/$/;"	v	typeref:typename:u32[6]	file:
iobase	drivers/clk/clk_pic32.c	/^	void __iomem *iobase;$/;"	m	struct:pic32_clk_priv	typeref:typename:void __iomem *	file:
iobase	drivers/net/ethoc.c	/^	void __iomem *iobase;$/;"	m	struct:ethoc	typeref:typename:void __iomem *	file:
iobase	drivers/net/rtl8169.c	/^	ulong iobase;$/;"	m	struct:rtl8169_private	typeref:typename:ulong	file:
iobase	drivers/net/xilinx_axi_emac.c	/^	struct axi_regs *iobase;$/;"	m	struct:axidma_priv	typeref:struct:axi_regs *	file:
iobase	drivers/net/zynq_gem.c	/^	struct zynq_gem_regs *iobase;$/;"	m	struct:zynq_gem_priv	typeref:struct:zynq_gem_regs *	file:
iobase	drivers/pci/pci_mvebu.c	/^	void __iomem *iobase;$/;"	m	struct:mvebu_pcie	typeref:typename:void __iomem *	file:
iobase	drivers/serial/serial_sh.h	/^	unsigned long	iobase;		\/* in\/out[bwl] *\/$/;"	m	struct:uart_port	typeref:typename:unsigned long
iobase	include/net.h	/^	phys_addr_t iobase;$/;"	m	struct:eth_device	typeref:typename:phys_addr_t
iobase	include/net.h	/^	phys_addr_t iobase;$/;"	m	struct:eth_pdata	typeref:typename:phys_addr_t
iobp_poll	arch/x86/cpu/broadwell/iobp.c	/^static inline int iobp_poll(void)$/;"	f	typeref:typename:int	file:
iobp_poll	arch/x86/cpu/ivybridge/bd82x6x.c	/^static inline int iobp_poll(void)$/;"	f	typeref:typename:int	file:
iobus_clk	arch/arm/dts/uniphier-ld4.dtsi	/^		iobus_clk: iobus_clk {$/;"	l
iobus_clk	arch/arm/dts/uniphier-sld3.dtsi	/^		iobus_clk: iobus_clk {$/;"	l
iobus_clk	arch/arm/dts/uniphier-sld8.dtsi	/^		iobus_clk: iobus_clk {$/;"	l
iocfg	arch/arm/include/asm/arch-hi6220/pinmux.h	/^	uint32_t	iocfg[REG_NUM];$/;"	m	struct:hi6220_pinmux1_regs	typeref:typename:uint32_t[]
iocfg	drivers/ddr/altera/sequencer.c	/^const struct socfpga_sdram_io_config *iocfg;$/;"	v	typeref:typename:const struct socfpga_sdram_io_config *
iocr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 iocr;		\/* 0x08 i\/o configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
iocr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 iocr[11];		\/* 0x10 IO configuration register *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32[11]
iocr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 iocr;		\/* 0x08 i\/o configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
iocr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 iocr[11];		\/* 0x10 IO configuration register *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32[11]
iocr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	iocr;		\/* I\/O Configuration *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
iocsr_get_config_table	arch/arm/mach-socfpga/wrap_iocsr_config.c	/^int iocsr_get_config_table(const unsigned int chain_id,$/;"	f	typeref:typename:int
iocsr_scan_chain0_table	board/altera/arria5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/denx/mcvevk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/ebv/socrates/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/is1/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/samtec/vining_fpga/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/sr1500/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain0_table	board/terasic/sockit/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain0_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/altera/arria5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/denx/mcvevk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/ebv/socrates/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/is1/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/samtec/vining_fpga/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/sr1500/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain1_table	board/terasic/sockit/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain1_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/altera/arria5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/denx/mcvevk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/ebv/socrates/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/is1/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/samtec/vining_fpga/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/sr1500/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain2_table	board/terasic/sockit/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain2_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/altera/arria5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/altera/cyclone5-socdk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/denx/mcvevk/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/ebv/socrates/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/is1/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/samtec/vining_fpga/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/sr1500/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/terasic/de0-nano-soc/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
iocsr_scan_chain3_table	board/terasic/sockit/qts/iocsr_config.h	/^const unsigned long iocsr_scan_chain3_table[] = {$/;"	v	typeref:typename:const unsigned long[]
ioctl	include/linux/usb/gadget.h	/^	int	(*ioctl)(struct usb_gadget *,$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *,unsigned code,unsigned long param)
ioctl	include/misc.h	/^	int (*ioctl)(struct udevice *dev, unsigned long request, void *buf);$/;"	m	struct:misc_ops	typeref:typename:int (*)(struct udevice * dev,unsigned long request,void * buf)
ioctr_val	board/siemens/draco/board.h	/^	unsigned int ioctr_val;			\/* 0x0000014A *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
ioctrl512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct ioctrl512x {$/;"	s
ioctrl512x_t	arch/powerpc/include/asm/immap_512x.h	/^} ioctrl512x_t;$/;"	t	typeref:struct:ioctrl512x
ioctrl_reg	arch/arm/cpu/armv7/am33xx/ddr.c	/^static struct ddr_cmdtctrl *ioctrl_reg = {$/;"	v	typeref:struct:ddr_cmdtctrl *	file:
ioctrlr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	ioctrlr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
iodelay_cfg_array_am572x_idk	board/ti/am57xx/mux_data.h	/^const struct iodelay_cfg_entry iodelay_cfg_array_am572x_idk[] = {$/;"	v	typeref:typename:const struct iodelay_cfg_entry[]
iodelay_cfg_array_x15	board/ti/am57xx/mux_data.h	/^const struct iodelay_cfg_entry iodelay_cfg_array_x15[] = {$/;"	v	typeref:typename:const struct iodelay_cfg_entry[]
iodelay_cfg_entry	arch/arm/include/asm/arch-omap5/sys_proto.h	/^struct iodelay_cfg_entry {$/;"	s
iodelay_config_base	arch/arm/include/asm/omap_common.h	/^	u32 iodelay_config_base;$/;"	m	struct:omap_sys_ctrl_regs	typeref:typename:u32
ioea	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t ioea;$/;"	m	struct:paace::__anon6139da31040a::__anon6139da310508	typeref:typename:uint8_t
ioeb	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t ioeb;$/;"	m	struct:paace::__anon6139da31040a::__anon6139da310508	typeref:typename:uint8_t
ioep_fpga_has_osd	board/gdsys/common/ioep-fpga.c	/^bool ioep_fpga_has_osd(unsigned int fpga)$/;"	f	typeref:typename:bool
ioep_fpga_print_info	board/gdsys/common/ioep-fpga.c	/^void ioep_fpga_print_info(unsigned int fpga)$/;"	f	typeref:typename:void
iofr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 iofr;		\/* 0x3C PIO I\/O Freeze Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
iointsel	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 iointsel;$/;"	m	struct:rcar_gpio	typeref:typename:u32
iomap	drivers/block/sata_dwc.h	/^	void __iomem * const	*iomap;$/;"	m	struct:ata_host	typeref:typename:void __iomem * const *
iomem_base	include/ps2mult.h	/^	u8	*iomem_base;$/;"	m	struct:serial_state	typeref:typename:u8 *
iomg	arch/arm/include/asm/arch-hi6220/pinmux.h	/^	uint32_t	iomg[REG_NUM];$/;"	m	struct:hi6220_pinmux0_regs	typeref:typename:uint32_t[]
iomux	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	struct rockchip_iomux iomux[4];$/;"	m	struct:rockchip_pin_bank	typeref:struct:rockchip_iomux[4]	file:
iomux_boot	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^static const iomux_cfg_t iomux_boot[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]	file:
iomux_cfg_t	arch/arm/include/asm/arch-mxs/iomux.h	/^typedef u32 iomux_cfg_t;$/;"	t	typeref:typename:u32
iomux_doenv	common/iomux.c	/^int iomux_doenv(const int console, const char *arg)$/;"	f	typeref:typename:int
iomux_edp_hotplug	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_edp_hotplug;$/;"	m	union:rk3399_grf_regs::__anonbec5629a070a	typeref:typename:u32
iomux_gp_func	arch/arm/include/asm/arch-mx31/imx-regs.h	/^enum iomux_gp_func {$/;"	g
iomux_i2c0_scl	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_i2c0_scl;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0b0a	typeref:typename:u32
iomux_i2c0_sda	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_i2c0_sda;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0a0a	typeref:typename:u32
iomux_i2s0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_i2s0;$/;"	m	union:rk3399_grf_regs::__anonbec5629a040a	typeref:typename:u32
iomux_i2sclk	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_i2sclk;$/;"	m	union:rk3399_grf_regs::__anonbec5629a050a	typeref:typename:u32
iomux_lcd_gpio	board/sandisk/sansa_fuze_plus/sfp.c	/^const iomux_cfg_t iomux_lcd_gpio[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_lcd_lcd	board/sandisk/sansa_fuze_plus/sfp.c	/^const iomux_cfg_t iomux_lcd_lcd[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_pad_config	arch/arm/include/asm/arch-mx31/imx-regs.h	/^enum iomux_pad_config {$/;"	g
iomux_pins	arch/arm/include/asm/arch-mx31/imx-regs.h	/^enum iomux_pins {$/;"	g
iomux_printdevs	common/iomux.c	/^void iomux_printdevs(const int console)$/;"	f	typeref:typename:void
iomux_pwm_0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_pwm_0;$/;"	m	union:rk3399_grf_regs::__anonbec5629a070a	typeref:typename:u32
iomux_pwm_1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_pwm_1;$/;"	m	union:rk3399_grf_regs::__anonbec5629a070a	typeref:typename:u32
iomux_pwm_2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_pwm_2;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0b0a	typeref:typename:u32
iomux_pwm_3a	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_pwm_3a;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a080a	typeref:typename:u32
iomux_pwm_3b	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_pwm_3b;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0a0a	typeref:typename:u32
iomux_sdmmc	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_sdmmc;$/;"	m	union:rk3399_grf_regs::__anonbec5629a060a	typeref:typename:u32
iomux_setup	board/bluegiga/apx4devkit/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/creative/xfi3/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/denx/m28evk/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/freescale/mx23evk/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/freescale/mx28evk/iomux.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/olimex/mx23_olinuxino/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/ppcag/bg0900/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/sandisk/sansa_fuze_plus/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_setup	board/schulercontrol/sc_sps_1/spl_boot.c	/^const iomux_cfg_t iomux_setup[] = {$/;"	v	typeref:typename:const iomux_cfg_t[]
iomux_spi0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_spi0;$/;"	m	union:rk3399_grf_regs::__anonbec5629a030a	typeref:typename:u32
iomux_spi2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_spi2;$/;"	m	union:rk3399_grf_regs::__anonbec5629a010a	typeref:typename:u32
iomux_spi5	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_spi5;$/;"	m	union:rk3399_grf_regs::__anonbec5629a020a	typeref:typename:u32
iomux_uart2a	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_uart2a;$/;"	m	union:rk3399_grf_regs::__anonbec5629a060a	typeref:typename:u32
iomux_uart2b	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_uart2b;$/;"	m	union:rk3399_grf_regs::__anonbec5629a070a	typeref:typename:u32
iomux_uart2c	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 iomux_uart2c;$/;"	m	union:rk3399_grf_regs::__anonbec5629a070a	typeref:typename:u32
iomux_v3_cfg_t	arch/arm/include/asm/imx-common/iomux-v3.h	/^typedef u64 iomux_v3_cfg_t;$/;"	t	typeref:typename:u64
iomuxc	arch/arm/dts/imx6dl.dtsi	/^			iomuxc: iomuxc@020e0000 {$/;"	l	label:aips1
iomuxc	arch/arm/dts/imx6q.dtsi	/^			iomuxc: iomuxc@020e0000 {$/;"	l
iomuxc	arch/arm/dts/imx6qdl.dtsi	/^			iomuxc: iomuxc@020e0000 {$/;"	l
iomuxc	arch/arm/dts/imx6ull.dtsi	/^			iomuxc: iomuxc@020e0000 {$/;"	l
iomuxc	arch/arm/dts/imx7.dtsi	/^			iomuxc: iomuxc@30330000 {$/;"	l	label:aips1
iomuxc	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct iomuxc {$/;"	s
iomuxc	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct iomuxc {$/;"	s
iomuxc	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct iomuxc {$/;"	s
iomuxc_gpr_base_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct iomuxc_gpr_base_regs {$/;"	s
iomuxc_lpsr	arch/arm/dts/imx7.dtsi	/^			iomuxc_lpsr: iomuxc-lpsr@302c0000 {$/;"	l	label:aips1
iomuxc_regs	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct iomuxc_regs {$/;"	s
iomuxc_snvs	arch/arm/dts/imx6ull.dtsi	/^			iomuxc_snvs: iomuxc-snvs@02290000 {$/;"	l	label:aips3
iop8260_t	arch/powerpc/include/asm/immap_8260.h	/^} iop8260_t;$/;"	t	typeref:struct:io_port
iop8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} iop8xx_t;$/;"	t	typeref:struct:io_port
iop_conf_t	include/ioports.h	/^} iop_conf_t;$/;"	t	typeref:struct:__anonc67861fe0208
iop_conf_tab	board/freescale/mpc8541cds/mpc8541cds.c	/^const iop_conf_t iop_conf_tab[4][32] = {$/;"	v	typeref:typename:const iop_conf_t[4][32]
iop_conf_tab	board/freescale/mpc8555cds/mpc8555cds.c	/^const iop_conf_t iop_conf_tab[4][32] = {$/;"	v	typeref:typename:const iop_conf_t[4][32]
iop_conf_tab	board/freescale/mpc8560ads/mpc8560ads.c	/^const iop_conf_t iop_conf_tab[4][32] = {$/;"	v	typeref:typename:const iop_conf_t[4][32]
iop_conf_tab	board/keymile/km82xx/km82xx.c	/^const iop_conf_t iop_conf_tab[4][32] = {$/;"	v	typeref:typename:const iop_conf_t[4][32]
iop_padat	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_padat;$/;"	m	struct:io_port	typeref:typename:ushort
iop_padir	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_padir;$/;"	m	struct:io_port	typeref:typename:ushort
iop_paodr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_paodr;$/;"	m	struct:io_port	typeref:typename:ushort
iop_papar	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_papar;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pcdat	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pcdat;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pcdir	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pcdir;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pcint	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pcint;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pcpar	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pcpar;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pcso	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pcso;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pdata	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdata;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdatb	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdatb;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdatc	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdatc;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdatd	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdatd;$/;"	m	struct:io_port	typeref:typename:uint
iop_pddat	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pddat;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pddir	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pddir;$/;"	m	struct:io_port	typeref:typename:ushort
iop_pdira	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdira;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdirb	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdirb;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdirc	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdirc;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdird	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pdird;$/;"	m	struct:io_port	typeref:typename:uint
iop_pdpar	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	iop_pdpar;$/;"	m	struct:io_port	typeref:typename:ushort
iop_podra	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_podra;$/;"	m	struct:io_port	typeref:typename:uint
iop_podrb	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_podrb;$/;"	m	struct:io_port	typeref:typename:uint
iop_podrc	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_podrc;$/;"	m	struct:io_port	typeref:typename:uint
iop_podrd	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_podrd;$/;"	m	struct:io_port	typeref:typename:uint
iop_ppara	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_ppara;$/;"	m	struct:io_port	typeref:typename:uint
iop_pparb	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pparb;$/;"	m	struct:io_port	typeref:typename:uint
iop_pparc	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_pparc;$/;"	m	struct:io_port	typeref:typename:uint
iop_ppard	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_ppard;$/;"	m	struct:io_port	typeref:typename:uint
iop_psora	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_psora;$/;"	m	struct:io_port	typeref:typename:uint
iop_psorb	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_psorb;$/;"	m	struct:io_port	typeref:typename:uint
iop_psorc	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_psorc;$/;"	m	struct:io_port	typeref:typename:uint
iop_psord	arch/powerpc/include/asm/immap_8260.h	/^	uint	iop_psord;$/;"	m	struct:io_port	typeref:typename:uint
iopin_initialize	arch/powerpc/cpu/mpc512x/iopin.c	/^void iopin_initialize(iopin_t *ioregs_init, int len)$/;"	f	typeref:typename:void
iopin_initialize_bits	arch/powerpc/cpu/mpc512x/iopin.c	/^void iopin_initialize_bits(iopin_t *ioregs_init, int len)$/;"	f	typeref:typename:void
iopin_is_act	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_act(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_act	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_act(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_anyedge	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_anyedge(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_ded	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_ded(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_ded	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_ded(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_falledge	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_falledge(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_gen	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_gen(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_gen	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_gen(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_high	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_high(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_high	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_high(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_in	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_in(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_in	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_in(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_low	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_low(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_low	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_low(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_odr	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_odr(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_odr	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_odr(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_opt1	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_opt1(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_opt1	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_opt1(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_opt2	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_opt2(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_opt2	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_opt2(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_out	arch/powerpc/include/asm/iopin_8260.h	/^iopin_is_out(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_is_out	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_is_out(iopin_t *iopin)$/;"	f	typeref:typename:uint
iopin_set_act	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_act(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_act	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_act(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_anyedge	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_anyedge(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_ded	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_ded(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_ded	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_ded(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_falledge	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_falledge(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_gen	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_gen(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_gen	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_gen(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_high	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_high(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_high	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_high(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_in	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_in(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_in	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_in(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_low	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_low(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_low	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_low(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_odr	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_odr(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_odr	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_odr(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_opt1	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_opt1(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_opt1	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_opt1(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_opt2	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_opt2(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_opt2	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_opt2(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_out	arch/powerpc/include/asm/iopin_8260.h	/^iopin_set_out(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_set_out	arch/powerpc/include/asm/iopin_8xx.h	/^iopin_set_out(iopin_t *iopin)$/;"	f	typeref:typename:void
iopin_t	arch/powerpc/include/asm/immap_512x.h	/^typedef struct iopin_t {$/;"	s
iopin_t	arch/powerpc/include/asm/immap_512x.h	/^}iopin_t;$/;"	t	typeref:struct:iopin_t
iopin_t	arch/powerpc/include/asm/iopin_8260.h	/^iopin_t;$/;"	t	typeref:struct:__anonbeb4a0e80108
iopin_t	arch/powerpc/include/asm/iopin_8xx.h	/^} iopin_t;$/;"	t	typeref:struct:__anon728a0bc00108
iopll_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	armpll_clk, ddrpll_clk, iopll_clk,$/;"	e	enum:zynq_clk
ioport	arch/powerpc/include/asm/immap_83xx.h	/^	gpio_n_t ioport[0x7];$/;"	m	struct:qegpio83xx	typeref:typename:gpio_n_t[0x7]
ioport_addr	include/ioports.h	/^#define ioport_addr(/;"	d
ioport_t	include/ioports.h	/^} ioport_t;$/;"	t	typeref:struct:__anonc67861fe0108
ioread16	arch/blackfin/include/asm/io.h	/^#define ioread16(/;"	d
ioread16	arch/openrisc/include/asm/io.h	/^#define ioread16(/;"	d
ioread16_rep	arch/blackfin/include/asm/io.h	/^#define ioread16_rep(/;"	d
ioread16_rep	drivers/mtd/nand/nand_base.c	/^static void ioread16_rep(void *addr, void *buf, int len)$/;"	f	typeref:typename:void	file:
ioread32	arch/blackfin/include/asm/io.h	/^#define ioread32(/;"	d
ioread32	arch/openrisc/include/asm/io.h	/^#define ioread32(/;"	d
ioread32_rep	arch/blackfin/include/asm/io.h	/^#define ioread32_rep(/;"	d
ioread8	arch/blackfin/include/asm/io.h	/^#define ioread8(/;"	d
ioread8	arch/openrisc/include/asm/io.h	/^#define ioread8(/;"	d
ioread8_rep	arch/blackfin/include/asm/io.h	/^#define ioread8_rep(/;"	d
ioread8_rep	drivers/mtd/nand/nand_base.c	/^static void ioread8_rep(void *addr, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
ioreg	include/linux/mtd/doc2000.h	/^	int ioreg;$/;"	m	struct:DiskOnChip	typeref:typename:int
ioregs	board/compulab/cm_t335/spl.c	/^const struct ctrl_ioregs ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs	board/isee/igep0033/board.c	/^const struct ctrl_ioregs ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs	board/phytec/pcm051/board.c	/^const struct ctrl_ioregs ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs	board/tcl/sl50/board.c	/^const struct ctrl_ioregs ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs	board/ti/am335x/board.c	/^const struct ctrl_ioregs ioregs = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_baltos	board/vscom/baltos/board.c	/^const struct ctrl_ioregs ioregs_baltos = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_bonelt	board/birdland/bav335x/board.c	/^const struct ctrl_ioregs ioregs_bonelt = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_bonelt	board/tcl/sl50/board.c	/^const struct ctrl_ioregs ioregs_bonelt = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_bonelt	board/ti/am335x/board.c	/^const struct ctrl_ioregs ioregs_bonelt = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_ddr2	board/gumstix/pepper/board.c	/^const struct ctrl_ioregs ioregs_ddr2 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_ddr3	board/compulab/cm_t43/spl.c	/^const struct ctrl_ioregs ioregs_ddr3 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_ddr3	board/gumstix/pepper/board.c	/^const struct ctrl_ioregs ioregs_ddr3 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_ddr3	board/ti/am43xx/board.c	/^const struct ctrl_ioregs ioregs_ddr3 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_dra72x_es1	arch/arm/cpu/armv7/omap5/hw_data.c	/^const struct ctrl_ioregs ioregs_dra72x_es1 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_dra72x_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^const struct ctrl_ioregs ioregs_dra72x_es2 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_dra7xx_es1	arch/arm/cpu/armv7/omap5/hw_data.c	/^const struct ctrl_ioregs ioregs_dra7xx_es1 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_evm15	board/tcl/sl50/board.c	/^const struct ctrl_ioregs ioregs_evm15 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_evm15	board/ti/am335x/board.c	/^const struct ctrl_ioregs ioregs_evm15 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_evmsk	board/bosch/shc/board.c	/^const struct ctrl_ioregs ioregs_evmsk = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_evmsk	board/tcl/sl50/board.c	/^const struct ctrl_ioregs ioregs_evmsk = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_evmsk	board/ti/am335x/board.c	/^const struct ctrl_ioregs ioregs_evmsk = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_init	board/davedenx/aria/aria.c	/^static  iopin_t ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
ioregs_init	board/esd/mecp5123/mecp5123.c	/^static iopin_t ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
ioregs_init	board/freescale/mpc5121ads/mpc5121ads.c	/^static  iopin_t ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
ioregs_init	board/ifm/ac14xx/ac14xx.c	/^static  iopin_t ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
ioregs_init	board/pdm360ng/pdm360ng.c	/^static  iopin_t ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
ioregs_lpddr2	board/ti/am43xx/board.c	/^const struct ctrl_ioregs ioregs_lpddr2 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_omap5430	arch/arm/cpu/armv7/omap5/hw_data.c	/^const struct ctrl_ioregs ioregs_omap5430 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_omap5432_es1	arch/arm/cpu/armv7/omap5/hw_data.c	/^const struct ctrl_ioregs ioregs_omap5432_es1 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioregs_omap5432_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^const struct ctrl_ioregs ioregs_omap5432_es2 = {$/;"	v	typeref:typename:const struct ctrl_ioregs
ioremap	arch/microblaze/include/asm/io.h	/^#define ioremap(/;"	d
ioremap	arch/mips/include/asm/io.h	/^#define ioremap(/;"	d
ioremap	include/linux/io.h	/^static inline void __iomem *ioremap(resource_size_t offset,$/;"	f	typeref:typename:void __iomem *
ioremap_cachable	arch/mips/include/asm/io.h	/^#define ioremap_cachable(/;"	d
ioremap_cacheable_cow	arch/mips/include/asm/io.h	/^#define ioremap_cacheable_cow(/;"	d
ioremap_fullcache	arch/microblaze/include/asm/io.h	/^#define ioremap_fullcache(/;"	d
ioremap_nocache	arch/microblaze/include/asm/io.h	/^#define ioremap_nocache(/;"	d
ioremap_nocache	arch/mips/include/asm/io.h	/^#define ioremap_nocache(/;"	d
ioremap_uc	arch/mips/include/asm/io.h	/^#define ioremap_uc /;"	d
ioremap_uncached_accelerated	arch/mips/include/asm/io.h	/^#define ioremap_uncached_accelerated(/;"	d
ioremap_writethrough	arch/microblaze/include/asm/io.h	/^#define ioremap_writethrough(/;"	d
ioreset	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 ioreset:2;		\/* input\/output reset PMUX_PIN...   *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
ios	arch/powerpc/include/asm/immap_512x.h	/^	ios512x_t		ios;		\/* PCI Sequencer *\/$/;"	m	struct:immap	typeref:typename:ios512x_t
ios	arch/powerpc/include/asm/immap_83xx.h	/^	ios83xx_t		ios;		\/* Sequencer (IOS) *\/$/;"	m	struct:immap	typeref:typename:ios83xx_t
ios	arch/powerpc/include/asm/immap_83xx.h	/^	ios83xx_t		ios;		\/* Sequencer *\/$/;"	m	struct:immap	typeref:typename:ios83xx_t
ios512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct ios512x {$/;"	s
ios512x_t	arch/powerpc/include/asm/immap_512x.h	/^} ios512x_t;$/;"	t	typeref:struct:ios512x
ios83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct ios83xx {$/;"	s
ios83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} ios83xx_t;$/;"	t	typeref:struct:ios83xx
iosize	include/faraday/ftpci100.h	/^	unsigned int iosize;		\/* 0x00 - I\/O Space Size Signal *\/$/;"	m	struct:ftpci100_ahbc	typeref:typename:unsigned int
iostatr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	iostatr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
ioswabb	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define ioswabb(/;"	d
ioswabl	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define ioswabl(/;"	d
ioswabq	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define ioswabq(/;"	d
ioswabw	arch/mips/include/asm/mach-generic/mangle-port.h	/^# define ioswabw(/;"	d
iotrace	common/iotrace.c	/^static struct iotrace {$/;"	s	file:
iotrace	common/iotrace.c	/^} iotrace;$/;"	v	typeref:struct:iotrace
iotrace_flags	common/iotrace.c	/^enum iotrace_flags {$/;"	g	file:
iotrace_get_buffer	common/iotrace.c	/^void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong *count)$/;"	f	typeref:typename:void
iotrace_get_checksum	common/iotrace.c	/^u32 iotrace_get_checksum(void)$/;"	f	typeref:typename:u32
iotrace_get_enabled	common/iotrace.c	/^int iotrace_get_enabled(void)$/;"	f	typeref:typename:int
iotrace_readb	common/iotrace.c	/^u8 iotrace_readb(const void *ptr)$/;"	f	typeref:typename:u8
iotrace_readl	common/iotrace.c	/^u32 iotrace_readl(const void *ptr)$/;"	f	typeref:typename:u32
iotrace_readw	common/iotrace.c	/^u16 iotrace_readw(const void *ptr)$/;"	f	typeref:typename:u16
iotrace_record	common/iotrace.c	/^struct iotrace_record {$/;"	s	file:
iotrace_reset_checksum	common/iotrace.c	/^void iotrace_reset_checksum(void)$/;"	f	typeref:typename:void
iotrace_set_buffer	common/iotrace.c	/^void iotrace_set_buffer(ulong start, ulong size)$/;"	f	typeref:typename:void
iotrace_set_enabled	common/iotrace.c	/^void iotrace_set_enabled(int enable)$/;"	f	typeref:typename:void
iotrace_writeb	common/iotrace.c	/^void iotrace_writeb(ulong value, const void *ptr)$/;"	f	typeref:typename:void
iotrace_writel	common/iotrace.c	/^void iotrace_writel(ulong value, const void *ptr)$/;"	f	typeref:typename:void
iotrace_writew	common/iotrace.c	/^void iotrace_writew(ulong value, const void *ptr)$/;"	f	typeref:typename:void
iou_scntr	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define iou_scntr /;"	d
iou_scntr	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct iou_scntr {$/;"	s
iou_scntr_secure	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define iou_scntr_secure /;"	d
iou_scntr_secure	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct iou_scntr_secure {$/;"	s
iou_slcr_regs	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct iou_slcr_regs {$/;"	s
iounmap	arch/microblaze/include/asm/io.h	/^#define iounmap(/;"	d
iounmap	arch/mips/include/asm/io.h	/^static inline void iounmap(const volatile void __iomem *addr)$/;"	f	typeref:typename:void
iounmap	include/linux/io.h	/^static inline void iounmap(void __iomem *addr)$/;"	f	typeref:typename:void
iovalue_t	common/iotrace.c	/^typedef ulong iovalue_t;$/;"	t	typeref:typename:ulong	file:
iovcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 iovcr[2];		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
iovcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 iovcr[2];		\/* 0x238 IO VREF control register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
iovcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 iovcr[2];		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
iovcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 iovcr[2];		\/* 0x238 IO VREF control register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
iovcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 iovcr0;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 iovcr0;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 iovcr0;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 iovcr0;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 iovcr1;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 iovcr1;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 iovcr1;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovcr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 iovcr1;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
iovselsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iovselsr;	\/* I\/O voltage selection status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
iovselsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32     iovselsr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
iowrite16	arch/blackfin/include/asm/io.h	/^#define iowrite16(/;"	d
iowrite16	arch/openrisc/include/asm/io.h	/^#define iowrite16(/;"	d
iowrite16_rep	arch/blackfin/include/asm/io.h	/^#define iowrite16_rep(/;"	d
iowrite16_rep	drivers/mtd/nand/nand_base.c	/^static void iowrite16_rep(void *addr, void *buf, int len)$/;"	f	typeref:typename:void	file:
iowrite32	arch/blackfin/include/asm/io.h	/^#define iowrite32(/;"	d
iowrite32	arch/openrisc/include/asm/io.h	/^#define iowrite32(/;"	d
iowrite32_rep	arch/blackfin/include/asm/io.h	/^#define iowrite32_rep(/;"	d
iowrite8	arch/blackfin/include/asm/io.h	/^#define iowrite8(/;"	d
iowrite8	arch/openrisc/include/asm/io.h	/^#define iowrite8(/;"	d
iowrite8_rep	arch/blackfin/include/asm/io.h	/^#define iowrite8_rep(/;"	d
iowrite8_rep	drivers/mtd/nand/nand_base.c	/^static void iowrite8_rep(void *addr, const uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
iox74lv_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static void iox74lv_init(void)$/;"	f	typeref:typename:void	file:
iox74lv_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static void iox74lv_init(void)$/;"	f	typeref:typename:void	file:
iox_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const iox_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
iox_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const iox_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
ip	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	ip;		\/* PSC + 0x34 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
ip	drivers/net/xilinx_ll_temac.h	/^	u32 ip;		\/* Interrupt Pending *\/$/;"	m	struct:temac_reg	typeref:typename:u32
ip	drivers/video/mx3fb.c	/^	struct chan_param_mem_interleaved	ip;$/;"	m	union:chan_param_mem	typeref:struct:chan_param_mem_interleaved	file:
ip	include/linux/time.h	/^    _CONST int *ip;$/;"	m	struct:_DEFUN	typeref:typename:_CONST int *
ip	include/mpc5xxx.h	/^	volatile u8	ip;		\/* PSC + 0x34 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
ip	net/link_local.c	/^static struct in_addr ip;$/;"	v	typeref:struct:in_addr	file:
ip4_addr_string	lib/vsprintf.c	/^static char *ip4_addr_string(char *buf, char *end, u8 *addr, int field_width,$/;"	f	typeref:typename:char *	file:
ip4dst	include/linux/ethtool.h	/^	__be32	ip4dst;$/;"	m	struct:ethtool_ah_espip4_spec	typeref:typename:__be32
ip4dst	include/linux/ethtool.h	/^	__be32	ip4dst;$/;"	m	struct:ethtool_tcpip4_spec	typeref:typename:__be32
ip4dst	include/linux/ethtool.h	/^	__be32	ip4dst;$/;"	m	struct:ethtool_usrip4_spec	typeref:typename:__be32
ip4src	include/linux/ethtool.h	/^	__be32	ip4src;$/;"	m	struct:ethtool_ah_espip4_spec	typeref:typename:__be32
ip4src	include/linux/ethtool.h	/^	__be32	ip4src;$/;"	m	struct:ethtool_tcpip4_spec	typeref:typename:__be32
ip4src	include/linux/ethtool.h	/^	__be32	ip4src;$/;"	m	struct:ethtool_usrip4_spec	typeref:typename:__be32
ip6_addr_string	lib/vsprintf.c	/^static char *ip6_addr_string(char *buf, char *end, u8 *addr, int field_width,$/;"	f	typeref:typename:char *	file:
ip_addr	include/efi_api.h	/^	u8 ip_addr[16];$/;"	m	struct:efi_ip_address	typeref:typename:u8[16]
ip_checksum_ok	net/checksum.c	/^int ip_checksum_ok(const void *addr, unsigned nbytes)$/;"	f	typeref:typename:int
ip_config	drivers/net/e1000.h	/^		uint32_t ip_config;$/;"	m	union:e1000_context_desc::__anon7fc27345140a	typeref:typename:uint32_t
ip_data	common/usb_storage.c	/^	unsigned short	ip_data;		\/* interrupt data *\/$/;"	m	struct:us_data	typeref:typename:unsigned short	file:
ip_dst	include/net.h	/^	struct in_addr	ip_dst;		\/* Destination IP address	*\/$/;"	m	struct:ip_hdr	typeref:struct:in_addr
ip_dst	include/net.h	/^	struct in_addr	ip_dst;		\/* Destination IP address	*\/$/;"	m	struct:ip_udp_hdr	typeref:struct:in_addr
ip_fields	drivers/net/e1000.h	/^		} ip_fields;$/;"	m	union:e1000_context_desc::__anon7fc27345140a	typeref:struct:e1000_context_desc::__anon7fc27345140a::__anon7fc273451508
ip_hdr	include/net.h	/^struct ip_hdr {$/;"	s
ip_hl_v	include/net.h	/^	u8		ip_hl_v;	\/* header length and version	*\/$/;"	m	struct:ip_hdr	typeref:typename:u8
ip_hl_v	include/net.h	/^	u8		ip_hl_v;	\/* header length and version	*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u8
ip_id	drivers/crypto/fsl/sec.c	/^		u16 ip_id;$/;"	m	struct:caam_get_era::__anon5515d7630108	typeref:typename:u16	file:
ip_id	include/net.h	/^	u16		ip_id;		\/* identification		*\/$/;"	m	struct:ip_hdr	typeref:typename:u16
ip_id	include/net.h	/^	u16		ip_id;		\/* identification		*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
ip_len	include/net.h	/^	u16		ip_len;		\/* total length			*\/$/;"	m	struct:ip_hdr	typeref:typename:u16
ip_len	include/net.h	/^	u16		ip_len;		\/* total length			*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
ip_off	include/net.h	/^	u16		ip_off;		\/* fragment offset field	*\/$/;"	m	struct:ip_hdr	typeref:typename:u16
ip_off	include/net.h	/^	u16		ip_off;		\/* fragment offset field	*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
ip_p	include/net.h	/^	u8		ip_p;		\/* protocol			*\/$/;"	m	struct:ip_hdr	typeref:typename:u8
ip_p	include/net.h	/^	u8		ip_p;		\/* protocol			*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u8
ip_regs	drivers/mtd/nand/mxc_nand.c	/^	struct mxc_nand_ip_regs __iomem	*ip_regs;$/;"	m	struct:mxc_nand_host	typeref:struct:mxc_nand_ip_regs __iomem *	file:
ip_rev1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 ip_rev1;			\/* 0xbf8 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
ip_rev1	include/fsl_immap.h	/^	u32	ip_rev1;		\/* IP Block Revision 1 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ip_rev2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 ip_rev2;			\/* 0xbfc *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
ip_rev2	include/fsl_immap.h	/^	u32	ip_rev2;		\/* IP Block Revision 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
ip_rev_1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ip_rev_1;$/;"	m	struct:ccsr_bman	typeref:typename:u32
ip_rev_1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ip_rev_1;$/;"	m	struct:ccsr_qman	typeref:typename:u32
ip_rev_2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ip_rev_2;$/;"	m	struct:ccsr_bman	typeref:typename:u32
ip_rev_2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ip_rev_2;$/;"	m	struct:ccsr_qman	typeref:typename:u32
ip_src	include/net.h	/^	struct in_addr	ip_src;		\/* Source IP address		*\/$/;"	m	struct:ip_hdr	typeref:struct:in_addr
ip_src	include/net.h	/^	struct in_addr	ip_src;		\/* Source IP address		*\/$/;"	m	struct:ip_udp_hdr	typeref:struct:in_addr
ip_sum	include/net.h	/^	u16		ip_sum;		\/* checksum			*\/$/;"	m	struct:ip_hdr	typeref:typename:u16
ip_sum	include/net.h	/^	u16		ip_sum;		\/* checksum			*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
ip_sw_reset	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 ip_sw_reset;	\/* 0x328 *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32
ip_to_string	net/net.c	/^void ip_to_string(struct in_addr x, char *s)$/;"	f	typeref:typename:void
ip_tos	include/net.h	/^	u8		ip_tos;		\/* type of service		*\/$/;"	m	struct:ip_hdr	typeref:typename:u8
ip_tos	include/net.h	/^	u8		ip_tos;		\/* type of service		*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u8
ip_ttl	include/net.h	/^	u8		ip_ttl;		\/* time to live			*\/$/;"	m	struct:ip_hdr	typeref:typename:u8
ip_ttl	include/net.h	/^	u8		ip_ttl;		\/* time to live			*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u8
ip_udp_hdr	include/net.h	/^struct ip_udp_hdr {$/;"	s
ip_ver	include/linux/ethtool.h	/^	__u8    ip_ver;$/;"	m	struct:ethtool_usrip4_spec	typeref:typename:__u8
ip_wanted	common/usb_storage.c	/^	int		ip_wanted;		\/* needed *\/$/;"	m	struct:us_data	typeref:typename:int	file:
ipappend	cmd/pxe.c	/^	int ipappend;$/;"	m	struct:pxe_label	typeref:typename:int	file:
ipb_clk	arch/powerpc/include/asm/global_data.h	/^	unsigned long ipb_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
ipbi_ws_ctrl	include/mpc5xxx.h	/^	volatile u32	ipbi_ws_ctrl;	\/* 0x0054 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
ipbrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipbrr[2];	\/* IP Block Revision Register *\/$/;"	m	struct:rio_rev_ctrl	typeref:typename:u32[2]
ipc	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG ipc;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
ipc	drivers/mtd/nand/mxc_nand.h	/^	u32 ipc;$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32
ipce	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ipce[4];		\/* Interconnect Parity Checking Enable Register                 *\/$/;"	m	struct:mscm_ir	typeref:typename:u32[4]
ipcge	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ipcge;		\/* Interconnect Parity Checking Global Enable Register  *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ipcgie	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ipcgie;		\/* Interconnect Parity Checking Global Injection Enable Register        *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ipcie	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ipcie[4];		\/* Interconnect Parity Checking Injection Enable Register       *\/$/;"	m	struct:mscm_ir	typeref:typename:u32[4]
ipcr	arch/powerpc/include/asm/immap_512x.h	/^		volatile u8	ipcr;$/;"	m	union:psc512x::__anond569131d030a	typeref:typename:volatile u8
ipcr	drivers/spi/fsl_qspi.h	/^	u32 ipcr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
ipcr	include/mpc5xxx.h	/^		volatile u8	ipcr;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b030a	typeref:typename:volatile u8
ipcr_acr	arch/powerpc/include/asm/immap_512x.h	/^	} ipcr_acr;$/;"	m	struct:psc512x	typeref:union:psc512x::__anond569131d030a
ipcr_acr	include/mpc5xxx.h	/^	} ipcr_acr;$/;"	m	struct:mpc5xxx_psc	typeref:union:mpc5xxx_psc::__anon151a8a6b030a
ipcse	drivers/net/e1000.h	/^			uint16_t ipcse;	\/* IP checksum end *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345140a::__anon7fc273451508	typeref:typename:uint16_t
ipcso	drivers/net/e1000.h	/^			uint8_t ipcso;	\/* IP checksum offset *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345140a::__anon7fc273451508	typeref:typename:uint8_t
ipcss	drivers/net/e1000.h	/^			uint8_t ipcss;	\/* IP checksum start *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345140a::__anon7fc273451508	typeref:typename:uint8_t
ipd	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 ipd;$/;"	m	struct:i2c_regs	typeref:typename:u32
ipend	arch/blackfin/include/asm/ptrace.h	/^	long ipend;$/;"	m	struct:pt_regs	typeref:typename:long
ipend	include/grlib/irqmp.h	/^	volatile unsigned int ipend;$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int
ipgifg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipgifg;		\/* Inter Packet Gap\/Inter Frame Gap *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ipgifg	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipgifg;		\/* 0x24508 - Inter Packet Gap\/Inter Frame Gap Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
ipgifg	include/fsl_dtsec.h	/^	u32	ipgifg;		\/* inter-packet\/inter-frame gap *\/$/;"	m	struct:dtsec	typeref:typename:u32
ipgifg	include/linux/immap_qe.h	/^	u32 ipgifg;		\/* interframe gap reg.                 *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
ipgifg	include/tsec.h	/^	u32	ipgifg;		\/* Inter Packet Gap\/Inter Frame Gap *\/$/;"	m	struct:tsec	typeref:typename:u32
ipgr	drivers/net/lpc32xx_eth.c	/^	u32 ipgr;		\/* Non-back-to-back IPG register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
ipgr	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic ipgr; \/* 0x230*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
ipgt	drivers/net/lpc32xx_eth.c	/^	u32 ipgt;		\/* Back-to-back Inter-Packet Gap reg. *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
ipgt	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic ipgt; \/* 0x220*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
iphoffset	drivers/qe/uec.h	/^	u8   iphoffset[MAX_IPH_OFFSET_ENTRY];$/;"	m	struct:uec_tx_global_pram	typeref:typename:u8[]
ipi0dr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipi0dr0;	\/* Processor 0 Interprocessor IRQ Dispatch 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipi0dr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipi0dr0;	\/* 0x60040 - Processor 0 Interprocessor Interrupt Dispatch Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipi0dr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipi0dr1;	\/* Processor 0 Interprocessor IRQ Dispatch 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipi0dr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipi0dr1;	\/* 0x60050 - Processor 0 Interprocessor Interrupt Dispatch Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipi0dr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipi0dr2;	\/* Processor 0 Interprocessor IRQ Dispatch 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipi0dr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipi0dr2;	\/* 0x60060 - Processor 0 Interprocessor Interrupt Dispatch Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipi0dr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipi0dr3;	\/* Processor 0 Interprocessor IRQ Dispatch 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipi0dr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipi0dr3;	\/* 0x60070 - Processor 0 Interprocessor Interrupt Dispatch Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipic	arch/powerpc/include/asm/immap_512x.h	/^	ipic512x_t		ipic;		\/* Integrated Programmable Interrupt Controller *\/$/;"	m	struct:immap	typeref:typename:ipic512x_t
ipic	arch/powerpc/include/asm/immap_83xx.h	/^	ipic83xx_t		ipic;		\/* Integrated Programmable Interrupt Controller *\/$/;"	m	struct:immap	typeref:typename:ipic83xx_t
ipic512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct ipic512x {$/;"	s
ipic512x_t	arch/powerpc/include/asm/immap_512x.h	/^} ipic512x_t;$/;"	t	typeref:struct:ipic512x
ipic83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct ipic83xx {$/;"	s
ipic83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} ipic83xx_t;$/;"	t	typeref:struct:ipic83xx
ipidr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipidr0;		\/* Interprocessor IRQ Dispatch 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipidr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipidr0;		\/* 0x40040 - Interprocessor Interrupt Dispatch Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipidr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipidr1;		\/* Interprocessor IRQ Dispatch 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipidr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipidr1;		\/* 0x40050 - Interprocessor Interrupt Dispatch Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipidr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipidr2;		\/* Interprocessor IRQ Dispatch 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipidr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipidr2;		\/* 0x40060 - Interprocessor Interrupt Dispatch Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipidr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipidr3;		\/* Interprocessor IRQ Dispatch 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipidr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipidr3;		\/* 0x40070 - Interprocessor Interrupt Dispatch Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipier	drivers/spi/xilinx_spi.c	/^	u32 ipier;	\/* IP Interrupt Enable Register (IPIER) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
ipisr	drivers/spi/xilinx_spi.c	/^	u32 ipisr;	\/* IP Interrupt Status Register (IPISR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
ipivpr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipivpr0;	\/* IPI Vector\/Priority 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipivpr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipivpr0;	\/* 0x410a0 - IPI Vector\/Priority Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipivpr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipivpr1;	\/* IPI Vector\/Priority 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipivpr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipivpr1;	\/* 0x410b0 - IPI Vector\/Priority Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipivpr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipivpr2;	\/* IPI Vector\/Priority 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipivpr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipivpr2;	\/* 0x410c0 - IPI Vector\/Priority Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipivpr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipivpr3;	\/* IPI Vector\/Priority 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
ipivpr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ipivpr3;	\/* 0x410d0 - IPI Vector\/Priority Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
ipl_load	drivers/mtd/ubispl/ubispl.c	/^static int ipl_load(struct ubi_scan_info *ubi, const u32 vol_id, uint8_t *laddr)$/;"	f	typeref:typename:int	file:
ipl_scan	drivers/mtd/ubispl/ubispl.c	/^static void ipl_scan(struct ubi_scan_info *ubi)$/;"	f	typeref:typename:void	file:
ipll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ipll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ipll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ipll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ipll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ipll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ipll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned ipll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ipll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned ipll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ipll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned ipll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
ipll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ipll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ipll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ipll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ipll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ipll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ipll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ipll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ipp_di0	arch/arm/dts/imx6ull.dtsi	/^		ipp_di0: clock@2 {$/;"	l
ipp_di1	arch/arm/dts/imx6ull.dtsi	/^		ipp_di1: clock@3 {$/;"	l
ippdexpcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ippdexpcr[4];	\/* IP Powerdown Exception Control Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32[4]
ippdexpcr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ippdexpcr0;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ippdexpcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ippdexpcr0;	\/* IP Powerdown Exception Control 0 *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ippdexpcr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ippdexpcr1;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ippwrgatecr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ippwrgatecr;	\/* IP Power Gating Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
ipr	arch/m68k/include/asm/immap_5307.h	/^	u32 ipr;$/;"	m	struct:intctrl	typeref:typename:u32
ipr	arch/microblaze/include/asm/microblaze_intc.h	/^	int ipr; \/* interrupt pending register *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
ipr	drivers/spi/rk_spi.h	/^	u32 ipr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
ipr_cfg	include/fsl-mc/fsl_dpni.h	/^	} ipr_cfg;$/;"	m	struct:dpni_extended_cfg	typeref:struct:dpni_extended_cfg::__anonf56ef98e0208
iprh0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 iprh0;		\/* 0x00 Pending High *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32
iprh1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 iprh1;		\/* 0x00 Pending High *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32
iprl0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 iprl0;		\/* 0x04 Pending Low *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32
iprl1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 iprl1;		\/* 0x04 Pending Low *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32
ips_clk	arch/powerpc/include/asm/global_data.h	/^	u32 ips_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
ipsbar	arch/m68k/include/asm/immap_5235.h	/^	u32 ipsbar;		\/* 0x00 - MBAR *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
ipsbar	arch/m68k/include/asm/immap_5275.h	/^	u32 ipsbar;$/;"	m	struct:sys_ctrl	typeref:typename:u32
ipsbar	arch/m68k/include/asm/immap_5282.h	/^	u32 ipsbar;$/;"	m	struct:scm_ctrl	typeref:typename:u32
ipss_clk_ctrl	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 ipss_clk_ctrl;	\/* 0x32C *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32
ipsw	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG ipsw;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
iptr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 iptr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
iptr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 iptr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
ipu1	arch/arm/dts/imx6qdl.dtsi	/^		ipu1: ipu@02400000 {$/;"	l
ipu1_csi0	arch/arm/dts/imx6qdl.dtsi	/^			ipu1_csi0: port@0 {$/;"	l	label:ipu1
ipu1_csi1	arch/arm/dts/imx6qdl.dtsi	/^			ipu1_csi1: port@1 {$/;"	l	label:ipu1
ipu1_di0	arch/arm/dts/imx6qdl.dtsi	/^			ipu1_di0: port@2 {$/;"	l	label:ipu1
ipu1_di0_disp0	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di0_disp0: disp0-endpoint {$/;"	l	label:ipu1.ipu1_di0
ipu1_di0_hdmi	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di0_hdmi: hdmi-endpoint {$/;"	l	label:ipu1.ipu1_di0
ipu1_di0_lvds0	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di0_lvds0: lvds0-endpoint {$/;"	l	label:ipu1.ipu1_di0
ipu1_di0_lvds1	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di0_lvds1: lvds1-endpoint {$/;"	l	label:ipu1.ipu1_di0
ipu1_di0_mipi	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di0_mipi: mipi-endpoint {$/;"	l	label:ipu1.ipu1_di0
ipu1_di1	arch/arm/dts/imx6qdl.dtsi	/^			ipu1_di1: port@3 {$/;"	l	label:ipu1
ipu1_di1_disp1	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di1_disp1: disp1-endpoint {$/;"	l	label:ipu1.ipu1_di1
ipu1_di1_hdmi	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di1_hdmi: hdmi-endpoint {$/;"	l	label:ipu1.ipu1_di1
ipu1_di1_lvds0	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di1_lvds0: lvds0-endpoint {$/;"	l	label:ipu1.ipu1_di1
ipu1_di1_lvds1	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di1_lvds1: lvds1-endpoint {$/;"	l	label:ipu1.ipu1_di1
ipu1_di1_mipi	arch/arm/dts/imx6qdl.dtsi	/^				ipu1_di1_mipi: mipi-endpoint {$/;"	l	label:ipu1.ipu1_di1
ipu1_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	ipu1_gfclk_mux: ipu1_gfclk_mux {$/;"	l
ipu2	arch/arm/dts/imx6q.dtsi	/^		ipu2: ipu@02800000 {$/;"	l
ipu2_csi0	arch/arm/dts/imx6q.dtsi	/^			ipu2_csi0: port@0 {$/;"	l	label:ipu2
ipu2_csi1	arch/arm/dts/imx6q.dtsi	/^			ipu2_csi1: port@1 {$/;"	l	label:ipu2
ipu2_di0	arch/arm/dts/imx6q.dtsi	/^			ipu2_di0: port@2 {$/;"	l	label:ipu2
ipu2_di0_disp0	arch/arm/dts/imx6q.dtsi	/^				ipu2_di0_disp0: disp0-endpoint {$/;"	l	label:ipu2.ipu2_di0
ipu2_di0_hdmi	arch/arm/dts/imx6q.dtsi	/^				ipu2_di0_hdmi: hdmi-endpoint {$/;"	l	label:ipu2.ipu2_di0
ipu2_di0_lvds0	arch/arm/dts/imx6q.dtsi	/^				ipu2_di0_lvds0: lvds0-endpoint {$/;"	l	label:ipu2.ipu2_di0
ipu2_di0_lvds1	arch/arm/dts/imx6q.dtsi	/^				ipu2_di0_lvds1: lvds1-endpoint {$/;"	l	label:ipu2.ipu2_di0
ipu2_di0_mipi	arch/arm/dts/imx6q.dtsi	/^				ipu2_di0_mipi: mipi-endpoint {$/;"	l	label:ipu2.ipu2_di0
ipu2_di1	arch/arm/dts/imx6q.dtsi	/^			ipu2_di1: port@3 {$/;"	l	label:ipu2
ipu2_di1_hdmi	arch/arm/dts/imx6q.dtsi	/^				ipu2_di1_hdmi: hdmi-endpoint {$/;"	l	label:ipu2.ipu2_di1
ipu2_di1_lvds0	arch/arm/dts/imx6q.dtsi	/^				ipu2_di1_lvds0: lvds0-endpoint {$/;"	l	label:ipu2.ipu2_di1
ipu2_di1_lvds1	arch/arm/dts/imx6q.dtsi	/^				ipu2_di1_lvds1: lvds1-endpoint {$/;"	l	label:ipu2.ipu2_di1
ipu2_di1_mipi	arch/arm/dts/imx6q.dtsi	/^				ipu2_di1_mipi: mipi-endpoint {$/;"	l	label:ipu2.ipu2_di1
ipu_buffer_t	drivers/video/ipu.h	/^} ipu_buffer_t;$/;"	t	typeref:enum:__anon4a35f9fd0303
ipu_ch	drivers/video/mxc_ipuv3_fb.c	/^	ipu_channel_t ipu_ch;$/;"	m	struct:mxcfb_info	typeref:typename:ipu_channel_t	file:
ipu_ch_param	drivers/video/ipu_common.c	/^struct ipu_ch_param {$/;"	s	file:
ipu_ch_param_addr	drivers/video/ipu_common.c	/^#define ipu_ch_param_addr(/;"	d	file:
ipu_ch_param_dump	drivers/video/ipu_common.c	/^static inline void ipu_ch_param_dump(int ch)$/;"	f	typeref:typename:void	file:
ipu_ch_param_init	drivers/video/ipu_common.c	/^static void ipu_ch_param_init(int ch,$/;"	f	typeref:typename:void	file:
ipu_ch_param_mod_field	drivers/video/ipu_common.c	/^#define ipu_ch_param_mod_field(/;"	d	file:
ipu_ch_param_read_field	drivers/video/ipu_common.c	/^#define ipu_ch_param_read_field(/;"	d	file:
ipu_ch_param_set_buffer	drivers/video/ipu_common.c	/^static inline void ipu_ch_param_set_buffer(uint32_t ch, int bufNum,$/;"	f	typeref:typename:void	file:
ipu_ch_param_set_buffer	drivers/video/mx3fb.c	/^static void ipu_ch_param_set_buffer(union chan_param_mem *params,$/;"	f	typeref:typename:void	file:
ipu_ch_param_set_field	drivers/video/ipu_common.c	/^#define ipu_ch_param_set_field(/;"	d	file:
ipu_ch_param_set_high_priority	drivers/video/ipu_common.c	/^static inline void ipu_ch_param_set_high_priority(uint32_t ch)$/;"	f	typeref:typename:void	file:
ipu_ch_param_set_size	drivers/video/mx3fb.c	/^static void ipu_ch_param_set_size(union chan_param_mem *params,$/;"	f	typeref:typename:void	file:
ipu_ch_param_word	drivers/video/ipu_common.c	/^struct ipu_ch_param_word {$/;"	s	file:
ipu_ch_params_set_packing	drivers/video/ipu_common.c	/^static inline void ipu_ch_params_set_packing(struct ipu_ch_param *p,$/;"	f	typeref:typename:void	file:
ipu_channel	drivers/video/ipu.h	/^struct ipu_channel {$/;"	s
ipu_channel	drivers/video/mx3fb.c	/^enum ipu_channel {$/;"	g	file:
ipu_channel_params_t	drivers/video/ipu.h	/^} ipu_channel_params_t;$/;"	t	typeref:union:__anon4a35f9fd040a
ipu_channel_set_priority	drivers/video/mx3fb.c	/^static void ipu_channel_set_priority(enum ipu_channel channel,$/;"	f	typeref:typename:void	file:
ipu_channel_t	drivers/video/ipu.h	/^} ipu_channel_t;$/;"	t	typeref:enum:__anon4a35f9fd0203
ipu_clear_buffer_ready	drivers/video/ipu_common.c	/^void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type,$/;"	f	typeref:typename:void
ipu_clk	drivers/video/ipu_common.c	/^static struct clk ipu_clk = {$/;"	v	typeref:struct:clk	file:
ipu_cm	drivers/video/ipu_regs.h	/^struct ipu_cm {$/;"	s
ipu_color_space_t	drivers/video/ipu.h	/^} ipu_color_space_t;$/;"	t	typeref:enum:__anon4a35f9fd0b03
ipu_com_async	drivers/video/ipu_regs.h	/^struct ipu_com_async {$/;"	s
ipu_cpmem_base	drivers/video/ipu_common.c	/^u32 *ipu_cpmem_base;$/;"	v	typeref:typename:u32 *
ipu_dc	drivers/video/ipu_regs.h	/^struct ipu_dc {$/;"	s
ipu_dc_ch	drivers/video/ipu_regs.h	/^struct ipu_dc_ch {$/;"	s
ipu_dc_init	drivers/video/ipu_disp.c	/^void ipu_dc_init(int dc_chan, int di, unsigned char interlaced)$/;"	f	typeref:typename:void
ipu_dc_link_event	drivers/video/ipu_disp.c	/^static void ipu_dc_link_event(int chan, int event, int addr, int priority)$/;"	f	typeref:typename:void	file:
ipu_dc_map_clear	drivers/video/ipu_disp.c	/^static void ipu_dc_map_clear(int map)$/;"	f	typeref:typename:void	file:
ipu_dc_map_config	drivers/video/ipu_disp.c	/^static void ipu_dc_map_config(int map, int byte_num, int offset, int mask)$/;"	f	typeref:typename:void	file:
ipu_dc_tmpl_reg	drivers/video/ipu_common.c	/^u32 *ipu_dc_tmpl_reg;$/;"	v	typeref:typename:u32 *
ipu_dc_uninit	drivers/video/ipu_disp.c	/^void ipu_dc_uninit(int dc_chan)$/;"	f	typeref:typename:void
ipu_dc_use_count	drivers/video/ipu_common.c	/^static int ipu_dc_use_count;$/;"	v	typeref:typename:int	file:
ipu_dc_write_tmpl	drivers/video/ipu_disp.c	/^static void ipu_dc_write_tmpl(int word, u32 opcode, u32 operand, int map,$/;"	f	typeref:typename:void	file:
ipu_di	drivers/video/ipu_regs.h	/^struct ipu_di {$/;"	s
ipu_di	drivers/video/mxc_ipuv3_fb.c	/^	int ipu_di;$/;"	m	struct:mxcfb_info	typeref:typename:int	file:
ipu_di_data_pin_config	drivers/video/ipu_disp.c	/^static void ipu_di_data_pin_config(int di, int wave_gen, int di_pin, int set,$/;"	f	typeref:typename:void	file:
ipu_di_data_wave_config	drivers/video/ipu_disp.c	/^static void ipu_di_data_wave_config(int di,$/;"	f	typeref:typename:void	file:
ipu_di_pix_fmt	drivers/video/mxc_ipuv3_fb.c	/^	u32 ipu_di_pix_fmt;$/;"	m	struct:mxcfb_info	typeref:typename:u32	file:
ipu_di_signal_cfg_t	drivers/video/ipu.h	/^} ipu_di_signal_cfg_t;$/;"	t	typeref:struct:__anon4a35f9fd0a08
ipu_di_sync_config	drivers/video/ipu_disp.c	/^static void ipu_di_sync_config(int di, int wave_gen,$/;"	f	typeref:typename:void	file:
ipu_di_use_count	drivers/video/ipu_common.c	/^static int ipu_di_use_count[2];$/;"	v	typeref:typename:int[2]	file:
ipu_disable_channel	drivers/video/ipu_common.c	/^int32_t ipu_disable_channel(ipu_channel_t channel)$/;"	f	typeref:typename:int32_t
ipu_disp_set_color_key	drivers/video/ipu_disp.c	/^int32_t ipu_disp_set_color_key(ipu_channel_t channel, unsigned char enable,$/;"	f	typeref:typename:int32_t
ipu_disp_set_global_alpha	drivers/video/ipu_disp.c	/^int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, unsigned char enable,$/;"	f	typeref:typename:int32_t
ipu_dmfc	drivers/video/ipu_regs.h	/^struct ipu_dmfc {$/;"	s
ipu_dmfc_init	drivers/video/ipu_disp.c	/^void ipu_dmfc_init(int dmfc_type, int first)$/;"	f	typeref:typename:void
ipu_dmfc_set_wait4eot	drivers/video/ipu_disp.c	/^void ipu_dmfc_set_wait4eot(int dma_chan, int width)$/;"	f	typeref:typename:void
ipu_dmfc_type	drivers/video/ipu.h	/^enum ipu_dmfc_type {$/;"	g
ipu_dmfc_use_count	drivers/video/ipu_common.c	/^static int ipu_dmfc_use_count;$/;"	v	typeref:typename:int	file:
ipu_dp	drivers/video/ipu_regs.h	/^struct ipu_dp {$/;"	s
ipu_dp_csc_setup	drivers/video/ipu_disp.c	/^static void ipu_dp_csc_setup(int dp, struct dp_csc_param_t dp_csc_param,$/;"	f	typeref:typename:void	file:
ipu_dp_dc_disable	drivers/video/ipu_disp.c	/^void ipu_dp_dc_disable(ipu_channel_t channel, unsigned char swap)$/;"	f	typeref:typename:void
ipu_dp_dc_enable	drivers/video/ipu_disp.c	/^void ipu_dp_dc_enable(ipu_channel_t channel)$/;"	f	typeref:typename:void
ipu_dp_init	drivers/video/ipu_disp.c	/^int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt,$/;"	f	typeref:typename:int
ipu_dp_uninit	drivers/video/ipu_disp.c	/^void ipu_dp_uninit(ipu_channel_t channel)$/;"	f	typeref:typename:void
ipu_dp_use_count	drivers/video/ipu_common.c	/^static int ipu_dp_use_count;$/;"	v	typeref:typename:int	file:
ipu_dump_registers	drivers/video/ipu_common.c	/^void ipu_dump_registers(void)$/;"	f	typeref:typename:void
ipu_enable_channel	drivers/video/ipu_common.c	/^int32_t ipu_enable_channel(ipu_channel_t channel)$/;"	f	typeref:typename:int32_t
ipu_enable_channel	drivers/video/mx3fb.c	/^static int ipu_enable_channel(enum ipu_channel channel)$/;"	f	typeref:typename:int	file:
ipu_idmac	drivers/video/ipu_regs.h	/^struct ipu_idmac {$/;"	s
ipu_init_channel	drivers/video/ipu_common.c	/^int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params)$/;"	f	typeref:typename:int32_t
ipu_init_channel_buffer	drivers/video/ipu_common.c	/^int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,$/;"	f	typeref:typename:int32_t
ipu_init_channel_buffer	drivers/video/mx3fb.c	/^static void ipu_init_channel_buffer(enum ipu_channel channel, void *fbmem)$/;"	f	typeref:typename:void	file:
ipu_init_dc_mappings	drivers/video/ipu_disp.c	/^void ipu_init_dc_mappings(void)$/;"	f	typeref:typename:void
ipu_init_sync_panel	drivers/video/ipu_disp.c	/^int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,$/;"	f	typeref:typename:int32_t
ipu_irq_line	drivers/video/ipu.h	/^enum ipu_irq_line {$/;"	g
ipu_is_dmfc_chan	drivers/video/ipu_common.c	/^static inline int ipu_is_dmfc_chan(uint32_t dma_chan)$/;"	f	typeref:typename:int	file:
ipu_is_dp_graphic_chan	drivers/video/ipu_common.c	/^static inline int ipu_is_dp_graphic_chan(uint32_t dma_chan)$/;"	f	typeref:typename:int	file:
ipu_panel	drivers/video/mx3fb.c	/^enum ipu_panel {$/;"	g	file:
ipu_panel_t	drivers/video/ipu.h	/^} ipu_panel_t;$/;"	t	typeref:enum:__anon4a35f9fd0103
ipu_pixel_clk_disable	drivers/video/ipu_common.c	/^static void ipu_pixel_clk_disable(struct clk *clk)$/;"	f	typeref:typename:void	file:
ipu_pixel_clk_enable	drivers/video/ipu_common.c	/^static int ipu_pixel_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
ipu_pixel_clk_recalc	drivers/video/ipu_common.c	/^static void ipu_pixel_clk_recalc(struct clk *clk)$/;"	f	typeref:typename:void	file:
ipu_pixel_clk_round_rate	drivers/video/ipu_common.c	/^static unsigned long ipu_pixel_clk_round_rate(struct clk *clk,$/;"	f	typeref:typename:unsigned long	file:
ipu_pixel_clk_set_parent	drivers/video/ipu_common.c	/^static int ipu_pixel_clk_set_parent(struct clk *clk, struct clk *parent)$/;"	f	typeref:typename:int	file:
ipu_pixel_clk_set_rate	drivers/video/ipu_common.c	/^static int ipu_pixel_clk_set_rate(struct clk *clk, unsigned long rate)$/;"	f	typeref:typename:int	file:
ipu_pixfmt_to_map	drivers/video/ipu_disp.c	/^static int ipu_pixfmt_to_map(uint32_t fmt)$/;"	f	typeref:typename:int	file:
ipu_probe	drivers/video/ipu_common.c	/^int ipu_probe(void)$/;"	f	typeref:typename:int
ipu_reset	drivers/video/ipu_common.c	/^static void ipu_reset(void)$/;"	f	typeref:typename:void	file:
ipu_set_ldb_clock	drivers/video/ipu_common.c	/^int ipu_set_ldb_clock(int rate)$/;"	f	typeref:typename:int
ipu_stat	drivers/video/ipu_regs.h	/^struct ipu_stat {$/;"	s
ipu_uninit_channel	drivers/video/ipu_common.c	/^void ipu_uninit_channel(ipu_channel_t channel)$/;"	f	typeref:typename:void
ipu_update_channel_buffer	drivers/video/mx3fb.c	/^static int ipu_update_channel_buffer(enum ipu_channel channel, void *buf)$/;"	f	typeref:typename:int	file:
ipu_write_param_mem	drivers/video/mx3fb.c	/^static void ipu_write_param_mem(uint32_t addr, uint32_t *data,$/;"	f	typeref:typename:void	file:
iput	fs/ubifs/super.c	/^void iput(struct inode *inode)$/;"	f	typeref:typename:void
ipuv3_fb_init	drivers/video/mxc_ipuv3_fb.c	/^int ipuv3_fb_init(struct fb_videomode const *mode,$/;"	f	typeref:typename:int
ipuv3_fb_shutdown	drivers/video/mxc_ipuv3_fb.c	/^void ipuv3_fb_shutdown(void)$/;"	f	typeref:typename:void
ipv4_addr	drivers/net/e1000.h	/^	volatile uint32_t ipv4_addr;	\/* IP Address (RW) *\/$/;"	m	struct:e1000_ipv4_at_entry	typeref:typename:volatile uint32_t
ipv6	arch/x86/include/asm/me_common.h	/^	u32 ipv6:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
ipv6_addr	drivers/net/e1000.h	/^	volatile uint8_t ipv6_addr[16];$/;"	m	struct:e1000_ipv6_at_entry	typeref:typename:volatile uint8_t[16]
ipver1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipver1;		\/* PCIX IP block revision register 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
ipver2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ipver2;		\/* PCIX IP block revision register 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
ipvr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ipvr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
ipvr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ipvr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
iqdpar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iqdpar; \/* Inbound Doorbell Queue DPAR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
iqtpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	iqtpar;	        \/* 0xd346c - Inbound Doorbell Queue Tail Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ir	arch/arm/dts/rk3288-firefly.dtsi	/^	ir: ir-receiver {$/;"	l
ir	arch/arm/dts/rk3288-popmetal.dtsi	/^	ir: ir-receiver {$/;"	l
ir	arch/arm/dts/rk3288-rock2-square.dts	/^	ir: ir-receiver {$/;"	l
ir	arch/arm/dts/sun6i-a31.dtsi	/^		ir: ir@01f02000 {$/;"	l
ir	arch/arm/dts/sun8i-h3.dtsi	/^		ir: ir@01f02000 {$/;"	l
ir	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 ir;			\/* Interrupt Register		*\/$/;"	m	struct:timer_regs	typeref:typename:u32
ir	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ir;	\/* Interrupt Register *\/$/;"	m	struct:pwm_regs	typeref:typename:u32
ir	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	ir;$/;"	m	struct:pwm_regs	typeref:typename:u32
ir	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ir;$/;"	m	struct:wdog_regs	typeref:typename:u32
ir	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 ir;			\/* 0x0C Interrupt *\/$/;"	m	struct:qspi_ctrl	typeref:typename:u16
ir	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 ir;		\/* Input *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
ir	include/sja1000.h	/^	u8 ir;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
ir0	arch/arm/dts/sun4i-a10.dtsi	/^		ir0: ir@01c21800 {$/;"	l
ir0	arch/arm/dts/sun7i-a20.dtsi	/^		ir0: ir@01c21800 {$/;"	l
ir0	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG ir0;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
ir0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		ir0_clk: clk@01c200b0 {$/;"	l
ir0_clk	arch/arm/dts/sun5i.dtsi	/^		ir0_clk: clk@01c200b0 {$/;"	l
ir0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ir0_clk: clk@01c200b0 {$/;"	l
ir0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ir0_clk_cfg;	\/* 0xb0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ir0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ir0_clk_cfg;	\/* 0xb0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ir0_rx_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			ir0_rx_pins_a: ir0@0 {$/;"	l	label:pio
ir0_rx_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			ir0_rx_pins_a: ir0@0 {$/;"	l	label:pio
ir0_tx_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			ir0_tx_pins_a: ir0@1 {$/;"	l	label:pio
ir0_tx_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			ir0_tx_pins_a: ir0@1 {$/;"	l	label:pio
ir1	arch/arm/dts/sun4i-a10.dtsi	/^		ir1: ir@01c21c00 {$/;"	l
ir1	arch/arm/dts/sun7i-a20.dtsi	/^		ir1: ir@01c21c00 {$/;"	l
ir1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		ir1_clk: clk@01c200b4 {$/;"	l
ir1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ir1_clk: clk@01c200b4 {$/;"	l
ir1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ir1_clk_cfg;	\/* 0xb4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ir1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ir1_clk_cfg;	\/* 0xb4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ir1_rx_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			ir1_rx_pins_a: ir1@0 {$/;"	l	label:pio
ir1_rx_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			ir1_rx_pins_a: ir1@0 {$/;"	l	label:pio
ir1_tx_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			ir1_tx_pins_a: ir1@1 {$/;"	l	label:pio
ir1_tx_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			ir1_tx_pins_a: ir1@1 {$/;"	l	label:pio
ir_clk	arch/arm/dts/sun6i-a31.dtsi	/^			ir_clk: ir_clk {$/;"	l
ir_clk	arch/arm/dts/sun8i-h3.dtsi	/^		ir_clk: ir_clk@01f01454 {$/;"	l
ir_int	arch/arm/dts/rk3288-firefly.dts	/^		ir_int: ir-int {$/;"	l
ir_int	arch/arm/dts/rk3288-popmetal.dtsi	/^		ir_int: ir-int {$/;"	l
ir_int	arch/arm/dts/rk3288-rock2-square.dts	/^		ir_int: ir-int {$/;"	l
ir_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			ir_pins_a: ir@0 {$/;"	l	label:r_pio
ir_pins_a	arch/arm/dts/sun8i-h3.dtsi	/^			ir_pins_a: ir@0 {$/;"	l	label:r_pio
ir_set	drivers/usb/host/xhci.h	/^	struct xhci_intr_reg	ir_set[128];$/;"	m	struct:xhci_run_regs	typeref:struct:xhci_intr_reg[128]
ir_set	drivers/usb/host/xhci.h	/^	struct xhci_intr_reg *ir_set;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_intr_reg *
iram	arch/powerpc/include/asm/immap_85xx.h	/^	u32	iram[8192];$/;"	m	struct:ccsr_cpm_iram	typeref:typename:u32[8192]
iram	include/linux/immap_qe.h	/^	qe_iram_t iram;		\/* I-RAM *\/$/;"	m	struct:qe_immap	typeref:typename:qe_iram_t
iram_offset	include/fsl_qe.h	/^		u32 iram_offset;\/* Offset into I-RAM for the code *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u32
irba_h	include/fsl_sec.h	/^	u32 irba_h;$/;"	m	struct:jr_regs	typeref:typename:u32
irba_l	include/fsl_sec.h	/^	u32 irba_l;$/;"	m	struct:jr_regs	typeref:typename:u32
ircp0ir	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ircp0ir;		\/* Interrupt Router CP0 Interrupt Register                              *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ircp0ir	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ircp0ir;$/;"	m	struct:mscm_ir	typeref:typename:u32
ircp1ir	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ircp1ir;		\/* Interrupt Router CP1 Interrupt Register                              *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ircp1ir	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ircp1ir;$/;"	m	struct:mscm_ir	typeref:typename:u32
ircpgir	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ircpgir;		\/* Interrupt Router CPU Generate Interrupt Register             *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ircpgir	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ircpgir;$/;"	m	struct:mscm_ir	typeref:typename:u32
ircr1	include/mpc5xxx.h	/^	volatile u8	ircr1;		\/* PSC + 0x44 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
ircr2	include/mpc5xxx.h	/^	volatile u8	ircr2;		\/* PSC + 0x44 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
irda_synth_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 irda_synth_clk;	\/* 0x60 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
irdaclk	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 irdaclk;		\/* IrDA Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
iready	include/fsl_fman.h	/^	u32	iready;		\/* ready register *\/$/;"	m	struct:fm_imem	typeref:typename:u32
iready	include/linux/immap_qe.h	/^	u32 iready;$/;"	m	struct:qe_iram	typeref:typename:u32
irevision	include/pci_rom.h	/^	uint16_t irevision;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
irfdr	include/mpc5xxx.h	/^	volatile u8	irfdr;		\/* PSC + 0x54 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
irig_cf	board/esd/pmc440/pmc440.h	/^	u32 irig_cf;$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
irig_rx_time	board/esd/pmc440/pmc440.h	/^	u32 irig_rx_time;               \/* offset: 0x0050 *\/$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
irig_time	board/esd/pmc440/pmc440.h	/^	u32 irig_time;                  \/* offset: 0x0040 *\/$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
irig_tod	board/esd/pmc440/pmc440.h	/^	u32 irig_tod;$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
irix_oldctx	arch/mips/include/asm/processor.h	/^	unsigned long irix_oldctx;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
irix_trampoline	arch/mips/include/asm/processor.h	/^	unsigned long irix_trampoline;  \/* Wheee... *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
irja	include/fsl_sec.h	/^	u32 irja;$/;"	m	struct:jr_regs	typeref:typename:u32
irlr	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 irlr;		\/* 0x18 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
irlr	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 irlr;		\/* 0x18 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
irmdr	include/mpc5xxx.h	/^	volatile u8	irmdr;		\/* PSC + 0x50 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
irom_data_reg0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
irom_data_reg0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
irom_data_reg1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
irom_data_reg1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg1;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
irom_data_reg2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
irom_data_reg2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg2;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
irom_data_reg3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
irom_data_reg3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	irom_data_reg3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
irom_ptr_table	arch/arm/mach-exynos/spl_boot.c	/^u32 irom_ptr_table[] = {$/;"	v	typeref:typename:u32[]
irq	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	irq[4];			\/* IRQ *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
irq	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 irq;$/;"	m	struct:emi_regs	typeref:typename:u32
irq	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 irq;			\/* 0x008 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
irq	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 irq;	\/* 0x08 interrupt *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
irq	arch/arm/include/asm/arch/display.h	/^	u32 irq;			\/* 0x008 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
irq	arch/arm/include/asm/arch/p2wi.h	/^	u32 irq;	\/* 0x08 interrupt *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
irq	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	irq;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
irq	arch/arm/lib/vectors.S	/^irq:$/;"	l
irq	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int irq;$/;"	m	struct:ohci	typeref:typename:int
irq	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int irq;$/;"	m	struct:ohci	typeref:typename:int
irq	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int irq;$/;"	m	struct:ohci	typeref:typename:int
irq	arch/x86/include/asm/pirq_routing.h	/^	} irq[MAX_INTX_ENTRIES];$/;"	m	struct:irq_info	typeref:struct:irq_info::__packed[]
irq	arch/x86/include/asm/sfi.h	/^	u32	irq;$/;"	m	struct:sfi_rtc_table_entry	typeref:typename:u32
irq	arch/x86/include/asm/sfi.h	/^	u32	irq;$/;"	m	struct:sfi_timer_table_entry	typeref:typename:u32
irq	arch/x86/include/asm/sfi.h	/^	u8	irq;$/;"	m	struct:sfi_device_table_entry	typeref:typename:u8
irq	drivers/crypto/fsl/jr.h	/^	int irq;$/;"	m	struct:jobring	typeref:typename:int
irq	drivers/mmc/mxcmmc.c	/^	int			irq;$/;"	m	struct:mxcmci_host	typeref:typename:int	file:
irq	drivers/mtd/nand/denali.h	/^	int irq;$/;"	m	struct:denali_nand_info	typeref:typename:int
irq	drivers/mtd/nand/mpc5121_nfc.c	/^	int irq;$/;"	m	struct:mpc5121_nfc_prv	typeref:typename:int	file:
irq	drivers/net/greth.c	/^	int irq;$/;"	m	struct:__anonb53b88540108	typeref:typename:int	file:
irq	drivers/net/ks8851_mll.c	/^	int			irq;$/;"	m	struct:ks_net	typeref:typename:int	file:
irq	drivers/net/mvpp2.c	/^	int irq;$/;"	m	struct:mvpp2_port	typeref:typename:int	file:
irq	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic irq;  \/* 0xd0 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
irq	drivers/usb/gadget/atmel_usba_udc.h	/^	int irq;$/;"	m	struct:usba_udc	typeref:typename:int
irq	drivers/usb/gadget/fotg210.c	/^	uint8_t                   irq;$/;"	m	struct:fotg210_chip	typeref:typename:uint8_t	file:
irq	drivers/usb/host/ohci-s3c24xx.h	/^	int irq;$/;"	m	struct:ohci	typeref:typename:int
irq	drivers/usb/host/ohci.h	/^	int irq;$/;"	m	struct:ohci	typeref:typename:int
irq	drivers/video/da8xx-fb.c	/^	int irq;$/;"	m	struct:da8xx_fb_par	typeref:typename:int	file:
irq	include/ambapp.h	/^	unsigned char irq;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:unsigned char
irq	include/ambapp.h	/^	unsigned char irq;$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned char
irq	include/ps2mult.h	/^	int	irq;$/;"	m	struct:serial_state	typeref:typename:int
irq	include/sh_pfc.h	/^	int irq;$/;"	m	struct:pinmux_irq	typeref:typename:int
irq0	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	irq0;		\/* 0x08 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
irq0_offset	drivers/usb/dwc3/dwc3-omap.c	/^	u32			irq0_offset;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
irq1	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	irq1;		\/* 0x0c *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
irq2evt	arch/arm/mach-rmobile/include/mach/irqs.h	/^#define irq2evt(/;"	d
irq_act_len	include/usb.h	/^	int irq_act_len;		\/* transferred bytes *\/$/;"	m	struct:usb_device	typeref:typename:int
irq_action	arch/microblaze/include/asm/microblaze_intc.h	/^struct irq_action {$/;"	s
irq_action	arch/nios2/cpu/interrupts.c	/^struct	irq_action {$/;"	s	file:
irq_action	arch/openrisc/cpu/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/powerpc/cpu/mpc512x/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/powerpc/cpu/mpc8260/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/powerpc/cpu/mpc83xx/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/powerpc/cpu/ppc4xx/interrupts.c	/^struct	irq_action {$/;"	s	file:
irq_action	arch/sparc/cpu/leon2/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/sparc/cpu/leon3/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_action	arch/x86/lib/interrupts.c	/^struct irq_action {$/;"	s	file:
irq_already_routed	arch/x86/lib/pirq_routing.c	/^static bool irq_already_routed[16];$/;"	v	typeref:typename:bool[16]	file:
irq_cause	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 irq_cause;	\/* 0x10610 *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
irq_cause	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 irq_cause;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
irq_cause	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 irq_cause;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
irq_control	drivers/usb/host/xhci.h	/^	volatile __le32	irq_control;$/;"	m	struct:xhci_intr_reg	typeref:typename:volatile __le32
irq_count	include/fsl-mc/fsl_dprc.h	/^	uint8_t irq_count;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint8_t
irq_ctrl	board/amcc/canyonlands/canyonlands.c	/^	u8	irq_ctrl;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
irq_debug_array	drivers/mtd/nand/denali.h	/^	int irq_debug_array[32];$/;"	m	struct:denali_nand_info	typeref:typename:int[32]
irq_dma	drivers/block/sata_dwc.c	/^	int			irq_dma;$/;"	m	struct:sata_dwc_device	typeref:typename:int	file:
irq_en	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 irq_en;			\/* 0x000 IRQ enable *\/$/;"	m	struct:sunxi_dma	typeref:typename:u32
irq_en	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 irq_en;		\/* 0x00 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
irq_en	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 irq_en;			\/* 0x000 IRQ enable *\/$/;"	m	struct:sunxi_dma	typeref:typename:u32
irq_en	arch/arm/include/asm/arch/watchdog.h	/^	u32 irq_en;		\/* 0x00 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
irq_enable	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool irq_enable;$/;"	m	struct:pin_info	typeref:typename:bool	file:
irq_enable_sci	arch/x86/cpu/irq.c	/^static void irq_enable_sci(struct udevice *dev)$/;"	f	typeref:typename:void	file:
irq_eoi	drivers/usb/host/xhci-keystone.c	/^	u32 irq_eoi;$/;"	m	struct:kdwc3_irq_regs	typeref:typename:u32	file:
irq_eoi_offset	drivers/usb/dwc3/dwc3-omap.c	/^	u32			irq_eoi_offset;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
irq_flags	arch/blackfin/cpu/interrupts.c	/^int irq_flags;			\/* needed by asm-blackfin\/system.h *\/$/;"	v	typeref:typename:int
irq_flags	arch/nds32/lib/interrupts.c	/^int irq_flags;		\/* needed by asm-nds32\/system.h *\/$/;"	v	typeref:typename:int
irq_free_handler	arch/m68k/lib/interrupts.c	/^void irq_free_handler (int vec)$/;"	f	typeref:typename:void
irq_free_handler	arch/openrisc/cpu/interrupts.c	/^void irq_free_handler(int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc512x/interrupts.c	/^void irq_free_handler (int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc5xx/interrupts.c	/^void irq_free_handler (int vec)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^void irq_free_handler(int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc8260/interrupts.c	/^void irq_free_handler (int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc83xx/interrupts.c	/^void irq_free_handler (int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc85xx/interrupts.c	/^irq_free_handler(int vec)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc86xx/interrupts.c	/^void irq_free_handler(int vec)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/mpc8xx/interrupts.c	/^void irq_free_handler (int vec)$/;"	f	typeref:typename:void
irq_free_handler	arch/powerpc/cpu/ppc4xx/interrupts.c	/^void irq_free_handler(int vec)$/;"	f	typeref:typename:void
irq_free_handler	arch/sparc/cpu/leon2/interrupts.c	/^void irq_free_handler(int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/sparc/cpu/leon3/interrupts.c	/^void irq_free_handler(int irq)$/;"	f	typeref:typename:void
irq_free_handler	arch/x86/lib/interrupts.c	/^void irq_free_handler(int irq)$/;"	f	typeref:typename:void
irq_gpio	board/nokia/rx51/tag_omap.h	/^	s16 irq_gpio;$/;"	m	struct:omap_wlan_cx3110x_config	typeref:typename:s16
irq_handle	common/usb_storage.c	/^	int		*irq_handle;		\/* for USB int requests *\/$/;"	m	struct:us_data	typeref:typename:int *	file:
irq_handle	include/usb.h	/^	int (*irq_handle)(struct usb_device *dev);$/;"	m	struct:usb_device	typeref:typename:int (*)(struct usb_device * dev)
irq_handler	examples/standalone/interrupt.c	/^static void irq_handler (void *arg)$/;"	f	typeref:typename:void	file:
irq_handlers	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static struct irq_action irq_handlers[NR_IRQS];$/;"	v	typeref:struct:irq_action[]	file:
irq_handlers	arch/powerpc/cpu/mpc8260/interrupts.c	/^static struct irq_action irq_handlers[NR_IRQS];$/;"	v	typeref:struct:irq_action[]	file:
irq_handlers	arch/sparc/cpu/leon2/interrupts.c	/^static struct irq_action irq_handlers[NR_IRQS] = { {0}, };$/;"	v	typeref:struct:irq_action[]	file:
irq_handlers	arch/sparc/cpu/leon3/interrupts.c	/^static struct irq_action irq_handlers[NR_IRQS] = { {0}, };$/;"	v	typeref:struct:irq_action[]	file:
irq_handlers	arch/x86/lib/interrupts.c	/^static struct irq_action irq_handlers[SYS_NUM_IRQS] = { {0} };$/;"	v	typeref:struct:irq_action[]	file:
irq_id	arch/x86/include/asm/ptrace.h	/^	long irq_id;$/;"	m	struct:irq_regs	typeref:typename:long
irq_info	arch/x86/include/asm/pirq_routing.h	/^struct __packed irq_info {$/;"	s
irq_init	arch/arm/mach-davinci/misc.c	/^void irq_init(void)$/;"	f	typeref:typename:void
irq_init	arch/blackfin/cpu/cpu.c	/^int irq_init(void)$/;"	f	typeref:typename:int
irq_install_handler	arch/m68k/lib/interrupts.c	/^void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/nios2/cpu/interrupts.c	/^void irq_install_handler (int irq, interrupt_handler_t *hdlr, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/openrisc/cpu/interrupts.c	/^void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc512x/interrupts.c	/^irq_install_handler (int irq, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc5xx/interrupts.c	/^void irq_install_handler (int vec, interrupt_handler_t * handler,$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^void irq_install_handler(int irq, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc8260/interrupts.c	/^irq_install_handler (int irq, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc83xx/interrupts.c	/^irq_install_handler (int irq, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc85xx/interrupts.c	/^irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc86xx/interrupts.c	/^void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/mpc8xx/interrupts.c	/^void irq_install_handler (int vec, interrupt_handler_t * handler,$/;"	f	typeref:typename:void
irq_install_handler	arch/powerpc/cpu/ppc4xx/interrupts.c	/^void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/sparc/cpu/leon2/interrupts.c	/^void irq_install_handler(int irq, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/sparc/cpu/leon3/interrupts.c	/^void irq_install_handler(int irq, interrupt_handler_t * handler, void *arg)$/;"	f	typeref:typename:void
irq_install_handler	arch/x86/lib/interrupts.c	/^void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg)$/;"	f	typeref:typename:void
irq_level	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 irq_level;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
irq_level	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 irq_level;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
irq_llsr	arch/x86/cpu/interrupts.c	/^void irq_llsr(struct irq_regs *regs)$/;"	f	typeref:typename:void
irq_mask	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 irq_mask;	\/* 0x10614 *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
irq_mask	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int irq_mask;$/;"	m	struct:davinci_gpio_bank	typeref:typename:unsigned int
irq_mask	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 irq_mask;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
irq_mask	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 irq_mask;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
irq_mask	arch/x86/include/asm/irq.h	/^	u16 irq_mask;$/;"	m	struct:irq_router	typeref:typename:u16
irq_mr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 irq_mr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
irq_no	arch/microblaze/cpu/interrupts.c	/^static u32 irq_no;$/;"	v	typeref:typename:u32	file:
irq_nrerr	include/fsl-mc/fsl_qbman_base.h	/^	int irq_nrerr; \/* Non-recoverable error interrupt line *\/$/;"	m	struct:qbman_block_desc	typeref:typename:int
irq_num	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int irq_num;$/;"	m	struct:davinci_gpio_bank	typeref:typename:unsigned int
irq_pend	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 irq_pend;			\/* 0x004 IRQ pending *\/$/;"	m	struct:sunxi_dma	typeref:typename:u32
irq_pend	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 irq_pend;			\/* 0x004 IRQ pending *\/$/;"	m	struct:sunxi_dma	typeref:typename:u32
irq_pending	drivers/usb/host/xhci.h	/^	volatile __le32	irq_pending;$/;"	m	struct:xhci_intr_reg	typeref:typename:volatile __le32
irq_regs	arch/x86/include/asm/ptrace.h	/^struct irq_regs {$/;"	s
irq_rerr	include/fsl-mc/fsl_qbman_base.h	/^	int irq_rerr;  \/* Recoverable error interrupt line *\/$/;"	m	struct:qbman_block_desc	typeref:typename:int
irq_restore_user_regs	arch/arm/lib/vectors.S	/^	.macro	irq_restore_user_regs$/;"	m
irq_router	arch/x86/include/asm/irq.h	/^struct irq_router {$/;"	s
irq_router_common_init	arch/x86/cpu/irq.c	/^int irq_router_common_init(struct udevice *dev)$/;"	f	typeref:typename:int
irq_router_ids	arch/x86/cpu/irq.c	/^static const struct udevice_id irq_router_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
irq_router_probe	arch/x86/cpu/irq.c	/^int irq_router_probe(struct udevice *dev)$/;"	f	typeref:typename:int
irq_routing_table	arch/x86/include/asm/pirq_routing.h	/^struct __packed irq_routing_table {$/;"	s
irq_save_user_regs	arch/arm/lib/vectors.S	/^	.macro	irq_save_user_regs$/;"	m
irq_sp	include/asm-generic/global_data.h	/^	unsigned long irq_sp;		\/* irq stack pointer *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
irq_sr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 irq_sr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
irq_sta	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 irq_sta;		\/* 0x04 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
irq_sta	arch/arm/include/asm/arch/watchdog.h	/^	u32 irq_sta;		\/* 0x04 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
irq_status	drivers/mtd/nand/denali.h	/^	uint32_t irq_status;$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
irq_status	include/usb.h	/^	unsigned long irq_status;$/;"	m	struct:usb_device	typeref:typename:unsigned long
irq_to_siubit	arch/powerpc/cpu/mpc8260/interrupts.c	/^static u_char irq_to_siubit[] = {$/;"	v	typeref:typename:u_char[]	file:
irq_to_siureg	arch/powerpc/cpu/mpc8260/interrupts.c	/^static u_char irq_to_siureg[] = {$/;"	v	typeref:typename:u_char[]	file:
irq_vecs	arch/m68k/lib/interrupts.c	/^static struct interrupt_action irq_vecs[NR_IRQS];$/;"	v	typeref:struct:interrupt_action[]	file:
irq_vecs	arch/powerpc/cpu/mpc5xx/interrupts.c	/^static struct interrupt_action irq_vecs[NR_IRQS];$/;"	v	typeref:struct:interrupt_action[]	file:
irq_vecs	arch/powerpc/cpu/mpc8xx/interrupts.c	/^static struct interrupt_action irq_vecs[NR_IRQS];$/;"	v	typeref:struct:interrupt_action[]	file:
irq_vecs	arch/powerpc/cpu/ppc4xx/interrupts.c	/^static struct irq_action irq_vecs[IRQ_MAX];$/;"	v	typeref:struct:irq_action[]	file:
irq_wake	drivers/usb/musb-new/musb_core.h	/^	unsigned		irq_wake:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
irq_work	drivers/usb/musb-new/musb_core.h	/^	struct work_struct	irq_work;$/;"	m	struct:musb	typeref:struct:work_struct
irqen	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 irqen;		\/* 0x118 *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
irqen	arch/arm/include/asm/arch/timer.h	/^	u32 irqen;		\/* 0x118 *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
irqen	arch/arm/include/asm/ehci-omap.h	/^	u32 irqen;		\/* 0x1c *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
irqenable	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 irqenable;				\/* 0x1C *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
irqenable	drivers/spi/omap3_spi.c	/^	unsigned int irqenable;		\/* 0x1C *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
irqenable	include/linux/mtd/omap_elm.h	/^	u32 irqenable;				\/* 0x01c *\/$/;"	m	struct:elm	typeref:typename:u32
irqenable	include/linux/mtd/omap_gpmc.h	/^	u32 irqenable;		\/* 0x1C *\/$/;"	m	struct:gpmc	typeref:typename:u32
irqenable_clear	drivers/video/am335x-fb.c	/^	unsigned int		irqenable_clear;	\/* 0x64 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
irqenable_clr	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short irqenable_clr;   \/* 0x30 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
irqenable_clr	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short irqenable_clr;	\/* 0x30 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
irqenable_clr	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short irqenable_clr;	\/* 0x30 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
irqenable_clr_0	include/linux/usb/xhci-omap.h	/^	u32 irqenable_clr_0;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqenable_clr_1	include/linux/usb/xhci-omap.h	/^	u32 irqenable_clr_1;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqenable_l	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 irqenable_l[0x4];$/;"	m	struct:dma4	typeref:typename:u32[0x4]
irqenable_set	drivers/video/am335x-fb.c	/^	unsigned int		irqenable_set;		\/* 0x60 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
irqenable_set_0	include/linux/usb/xhci-omap.h	/^	u32 irqenable_set_0;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqenable_set_1	include/linux/usb/xhci-omap.h	/^	u32 irqenable_set_1;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqentry	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned int	irqentry;	\/* 0x14 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned int
irqinterval	common/usb_storage.c	/^	unsigned char	irqinterval;		\/* Intervall for IRQ Pipe *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
irqinterval	include/usb_ether.h	/^	unsigned char	irqinterval;	\/* Intervall for IRQ Pipe *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
irqmaxp	common/usb_storage.c	/^	unsigned char	irqmaxp;		\/* max packed for irq Pipe *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
irqmisc_offset	drivers/usb/dwc3/dwc3-omap.c	/^	u32			irqmisc_offset;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
irqmp	arch/sparc/cpu/leon3/cpu_init.c	/^ambapp_dev_irqmp *irqmp = NULL;$/;"	v	typeref:typename:ambapp_dev_irqmp *
irqmp_get_irqmask	arch/sparc/cpu/leon3/interrupts.c	/^static inline unsigned int irqmp_get_irqmask(unsigned int irq)$/;"	f	typeref:typename:unsigned int	file:
irqpar	arch/m68k/include/asm/immap_5307.h	/^	u8  irqpar;$/;"	m	struct:sim	typeref:typename:u8
irqpipe	common/usb_storage.c	/^	unsigned int	irqpipe;	 	\/* pipe for release_irq *\/$/;"	m	struct:us_data	typeref:typename:unsigned int	file:
irqreturn_t	include/linux/compat.h	/^typedef int irqreturn_t;$/;"	t	typeref:typename:int
irqs	drivers/usb/gadget/pxa25x_udc.h	/^	unsigned long			irqs;$/;"	m	struct:udc_stats	typeref:typename:unsigned long
irqs	drivers/usb/host/xhci-keystone.c	/^	} irqs[16];$/;"	m	struct:kdwc3_irq_regs	typeref:struct:kdwc3_irq_regs::__anoncc7370550108[16]	file:
irqs_disabled	arch/nios2/include/asm/system.h	/^#define	irqs_disabled(/;"	d
irqs_enabled_from_flags	arch/blackfin/include/asm/system.h	/^#define irqs_enabled_from_flags(/;"	d
irqs_enabled_from_flags	arch/nds32/include/asm/system.h	/^#define irqs_enabled_from_flags(/;"	d
irqsigen	drivers/mmc/fsl_esdhc.c	/^	uint    irqsigen;	\/* Interrupt signal enable register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
irqsr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	irqsr0;		\/* IRQ_OUT Summary 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
irqsr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	irqsr0;		\/* 0x41310 - IRQ_OUT Summary Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
irqsr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	irqsr1;		\/* IRQ_OUT Summary 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
irqsr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	irqsr1;		\/* 0x41320 - IRQ_OUT Summary Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
irqst	arch/arm/include/asm/ehci-omap.h	/^	u32 irqst;		\/* 0x18 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
irqsta	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 irqsta;		\/* 0x11c *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
irqsta	arch/arm/include/asm/arch/timer.h	/^	u32 irqsta;		\/* 0x11c *\/$/;"	m	struct:sunxi_alarm	typeref:typename:u32
irqstat	drivers/mmc/fsl_esdhc.c	/^	uint    irqstat;	\/* Interrupt status register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
irqstaten	drivers/mmc/fsl_esdhc.c	/^	uint    irqstaten;	\/* Interrupt status enable register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
irqstatus	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 irqstatus;				\/* 0x18 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
irqstatus	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 irqstatus;				\/* 0x18 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
irqstatus	drivers/spi/omap3_spi.c	/^	unsigned int irqstatus;		\/* 0x18 *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
irqstatus	drivers/video/am335x-fb.c	/^	unsigned int		irqstatus;		\/* 0x5C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
irqstatus	include/linux/mtd/omap_elm.h	/^	u32 irqstatus;				\/* 0x018 *\/$/;"	m	struct:elm	typeref:typename:u32
irqstatus	include/linux/mtd/omap_gpmc.h	/^	u32 irqstatus;		\/* 0x18 *\/$/;"	m	struct:gpmc	typeref:typename:u32
irqstatus_0	include/linux/usb/xhci-omap.h	/^	u32 irqstatus_0;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqstatus_1	include/linux/usb/xhci-omap.h	/^	u32 irqstatus_1;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqstatus_l	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 irqstatus_l[0x4];$/;"	m	struct:dma4	typeref:typename:u32[0x4]
irqstatus_raw	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short irqstatus_raw;   \/* 0x24 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
irqstatus_raw	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short irqstatus_raw;	\/* 0x24 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
irqstatus_raw	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short irqstatus_raw;	\/* 0x24 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
irqstatus_raw	drivers/video/am335x-fb.c	/^	unsigned int		irqstatus_raw;		\/* 0x58 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
irqstatus_raw_0	include/linux/usb/xhci-omap.h	/^	u32 irqstatus_raw_0; \/* offset of 0x24 *\/$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqstatus_raw_1	include/linux/usb/xhci-omap.h	/^	u32 irqstatus_raw_1; \/* offset of 0x34 *\/$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
irqvec	board/mpl/common/usb_uhci.c	/^static int irqvec = -1;            \/* irq vector, if -1 uhci is stopped \/ reseted *\/$/;"	v	typeref:typename:int	file:
irr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	irr;		\/* 0xC0 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
irri	include/fsl_sec.h	/^	u32 irri;$/;"	m	struct:jr_regs	typeref:typename:u32
irs	include/fsl_sec.h	/^	u32 irs;$/;"	m	struct:jr_regs	typeref:typename:u32
irsa	include/fsl_sec.h	/^	u32 irsa;$/;"	m	struct:jr_regs	typeref:typename:u32
irsdr	include/mpc5xxx.h	/^	volatile u8	irsdr;		\/* PSC + 0x4c *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
irsprc	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u16 irsprc[176];	\/* Interrupt Router Shared Peripheral Routing Control Register  *\/$/;"	m	struct:mscm_ir	typeref:typename:u16[176]
irsprc	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 irsprc[112];$/;"	m	struct:mscm_ir	typeref:typename:u16[112]
irsr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 irsr;	\/* 0x30 *\/$/;"	m	struct:dspi	typeref:typename:u32
irsr	include/fsl_dspi.h	/^	u32 irsr;	\/* 0x30 *\/$/;"	m	struct:dspi	typeref:typename:u32
irwc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 irwc;		\/* 0x09C *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
is	drivers/block/dwc_ahsata.c	/^	u32 is;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
is	drivers/block/dwc_ahsata.c	/^	u32 is;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
is	drivers/net/xilinx_axi_emac.c	/^	u32 is; \/* 0xC: Interrupt status *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
is	drivers/net/xilinx_ll_temac.h	/^	u32 is;		\/* Interrupt Status *\/$/;"	m	struct:temac_reg	typeref:typename:u32
is1h	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 is1h;	\/* Input Select 1 0..15 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
is1l	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 is1l;	\/* Input Select 1 16..31 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
is2h	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 is2h;	\/* Input Select 2 0..15 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
is2l	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 is2l;	\/* Input Select 2 16..31 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
is3h	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 is3h;	\/* Input Select 3 0..15 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
is3l	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 is3l;	\/* Input Select 3 16..31 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
is_10bit_address	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	int is_10bit_address;$/;"	m	struct:i2c_trans_info	typeref:typename:int
is_10g_interface	include/phy.h	/^static inline int is_10g_interface(phy_interface_t interface)$/;"	f	typeref:typename:int
is_16bit_nand	drivers/mtd/nand/mxc_nand.c	/^static int is_16bit_nand(void)$/;"	f	typeref:typename:int	file:
is_2gb	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static bool is_2gb(void)$/;"	f	typeref:typename:bool	file:
is_405exr	board/amcc/kilauea/kilauea.c	/^static int is_405exr(void)$/;"	f	typeref:typename:int	file:
is_a_node	fs/ubifs/lpt_commit.c	/^static int is_a_node(const struct ubifs_info *c, uint8_t *buf, int len)$/;"	f	typeref:typename:int	file:
is_a_peripheral	include/linux/usb/gadget.h	/^	unsigned			is_a_peripheral:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
is_active	drivers/usb/musb-new/musb_core.h	/^	unsigned		is_active:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
is_adll_calib_before_init	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 is_pll_before_init = 0, is_adll_calib_before_init = 0, is_dfs_in_init = 0;$/;"	v	typeref:typename:u32
is_adll_calib_before_init	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 is_pll_before_init = 0, is_adll_calib_before_init = 1, is_dfs_in_init = 0;$/;"	v	typeref:typename:u32
is_aligned	arch/arm/cpu/armv8/cache_v8.c	/^static bool is_aligned(u64 addr, u64 size, u64 align)$/;"	f	typeref:typename:bool	file:
is_allnoconfig_y	tools/buildman/kconfiglib.py	/^    def is_allnoconfig_y(self):$/;"	m	class:Symbol
is_any_but	lib/slre.c	/^is_any_but(const unsigned char *p, int len, const char *s, int *ofs)$/;"	f	typeref:typename:int	file:
is_any_of	lib/slre.c	/^is_any_of(const unsigned char *p, int len, const char *s, int *ofs)$/;"	f	typeref:typename:int	file:
is_assignment	common/cli_hush.c	/^static int is_assignment(const char *s)$/;"	f	typeref:typename:int	file:
is_badblock	drivers/mtd/nand/mxc_nand_spl.c	/^static int is_badblock(int pagenumber)$/;"	f	typeref:typename:int	file:
is_badblock	drivers/mtd/nand/mxs_nand_spl.c	/^static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)$/;"	f	typeref:typename:int	file:
is_bist_reset_bit	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 is_bist_reset_bit = 1;$/;"	v	typeref:typename:u32
is_blank	drivers/mtd/nand/fsl_ifc_nand.c	/^static int is_blank(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,$/;"	f	typeref:typename:int	file:
is_blank	drivers/mtd/nand/fsl_ifc_spl.c	/^static inline int is_blank(uchar *addr, int page_size)$/;"	f	typeref:typename:int	file:
is_boot0_magic	arch/arm/include/asm/arch-sunxi/spl.h	/^#define is_boot0_magic(/;"	d
is_boot0_magic	arch/arm/include/asm/arch/spl.h	/^#define is_boot0_magic(/;"	d
is_boot_from_usb	arch/arm/include/asm/arch-mx7/imx-regs.h	/^#define	is_boot_from_usb(/;"	d
is_boot_services	cmd/efi.c	/^static inline bool is_boot_services(int type)$/;"	f	typeref:typename:bool	file:
is_bootable	disk/part_dos.c	/^static inline int is_bootable(dos_partition_t *p)$/;"	f	typeref:typename:int	file:
is_bootable	disk/part_efi.c	/^static inline int is_bootable(gpt_entry *p)$/;"	f	typeref:typename:int	file:
is_broadcast	drivers/net/netconsole.c	/^static int is_broadcast(struct in_addr ip)$/;"	f	typeref:typename:int	file:
is_broadcast_ethaddr	include/net.h	/^static inline int is_broadcast_ethaddr(const u8 *addr)$/;"	f	typeref:typename:int
is_buf_blank	drivers/mtd/nand/pxa3xx_nand.c	/^static inline int is_buf_blank(uint8_t *buf, size_t len)$/;"	f	typeref:typename:int	file:
is_buffer_mapped	drivers/usb/musb-new/musb_gadget.c	/^#define is_buffer_mapped(/;"	d	file:
is_bus_access_done	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int is_bus_access_done(u32 dev_num, u32 if_id, u32 dunit_reg_adrr,$/;"	f	typeref:typename:int	file:
is_bus_powered	drivers/usb/musb-new/musb_core.h	/^	unsigned		is_bus_powered:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
is_cbe_required	drivers/ddr/marvell/a38x/ddr3_training.c	/^u8 is_cbe_required = 0;$/;"	v	typeref:typename:u8
is_cdc	drivers/usb/gadget/ether.c	/^static inline int is_cdc(struct eth_dev *dev)$/;"	f	typeref:typename:int	file:
is_cdp_packet	include/net.h	/^static inline int is_cdp_packet(const uchar *ethaddr)$/;"	f	typeref:typename:int
is_checkpointed	fs/yaffs2/yaffs_guts.h	/^	int is_checkpointed;$/;"	m	struct:yaffs_dev	typeref:typename:int
is_choice	tools/buildman/kconfiglib.py	/^    def is_choice(self):$/;"	m	class:Item
is_choice_selection	tools/buildman/kconfiglib.py	/^    def is_choice_selection(self):$/;"	m	class:Symbol
is_choice_symbol	tools/buildman/kconfiglib.py	/^    def is_choice_symbol(self):$/;"	m	class:Symbol
is_ck_swap	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	int is_ck_swap;$/;"	m	struct:bus_params	typeref:typename:int
is_clamp_enabled	arch/arm/mach-tegra/tegra114/cpu.c	/^static bool is_clamp_enabled(u32 partid)$/;"	f	typeref:typename:bool	file:
is_colibri_vf61	board/toradex/colibri_vf/colibri_vf.c	/^static inline int is_colibri_vf61(void)$/;"	f	typeref:typename:int	file:
is_comment	tools/buildman/kconfiglib.py	/^    def is_comment(self):$/;"	m	class:Item
is_compatible	drivers/usb/musb-new/musb_dma.h	/^	int			(*is_compatible)(struct dma_channel *channel,$/;"	m	struct:dma_controller	typeref:typename:int (*)(struct dma_channel * channel,u16 maxpacket,void * buf,u32 length)
is_complete	arch/x86/include/asm/me_common.h	/^	u32 is_complete:1;$/;"	m	struct:mei_header	typeref:typename:u32:1
is_core_disabled	arch/powerpc/cpu/mpc85xx/mp.c	/^int is_core_disabled(int nr) {$/;"	f	typeref:typename:int
is_core_disabled	arch/powerpc/cpu/mpc86xx/mp.c	/^int is_core_disabled(int nr) {$/;"	f	typeref:typename:int
is_core_online	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int is_core_online(u64 cpu_id)$/;"	f	typeref:typename:int
is_core_valid	arch/arm/cpu/armv7/mx6/mp.c	/^int is_core_valid(unsigned int core)$/;"	f	typeref:typename:int
is_core_valid	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^int is_core_valid(unsigned int core)$/;"	f	typeref:typename:int
is_core_valid	arch/arm/cpu/armv8/zynqmp/mp.c	/^int is_core_valid(unsigned int core)$/;"	f	typeref:typename:int
is_core_valid	arch/powerpc/cpu/mpc8xxx/cpu.c	/^int is_core_valid(unsigned int core)$/;"	f	typeref:typename:int
is_cppi_enabled	drivers/usb/musb-new/musb_dma.h	/^#define	is_cppi_enabled(/;"	d
is_cpu_powered	arch/arm/mach-tegra/cpu.c	/^static int is_cpu_powered(void)$/;"	f	typeref:typename:int	file:
is_cpu_type	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_cpu_type(/;"	d
is_cpu_virt_capable	arch/arm/cpu/armv7/nonsec_virt.S	/^.macro is_cpu_virt_capable	tmp$/;"	m
is_ctrl64_bit	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	int is_ctrl64_bit;$/;"	m	struct:init_cntr_param	typeref:typename:int
is_default_centralization	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_default_centralization = 0;$/;"	v	typeref:typename:u8
is_defined	tools/buildman/kconfiglib.py	/^    def is_defined(self):$/;"	m	class:Symbol
is_defined_config	scripts/basic/fixdep.c	/^static int is_defined_config(const char *name, int len, unsigned int hash)$/;"	f	typeref:typename:int	file:
is_deleted	fs/yaffs2/yaffs_guts.h	/^	unsigned is_deleted;	\/* The chunk is marked deleted *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
is_device_disabled	drivers/net/fm/b4860.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/ls1043.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/ls1046.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/p1023.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/p4080.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/p5020.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/p5040.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/t1024.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/t2080.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/fm/t4240.c	/^static int is_device_disabled(enum fm_port port)$/;"	f	typeref:typename:int	file:
is_device_disabled	drivers/net/ldpaa_eth/ls2080a.c	/^static int is_device_disabled(int dpmac_id)$/;"	f	typeref:typename:int	file:
is_devspec	drivers/usb/dwc3/core.h	/^	u32	is_devspec:1;$/;"	m	struct:dwc3_event_type	typeref:typename:u32:1
is_dfs_disabled	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_dfs_disabled = 0;$/;"	v	typeref:typename:u8
is_dfs_in_init	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 is_pll_before_init = 0, is_adll_calib_before_init = 0, is_dfs_in_init = 0;$/;"	v	typeref:typename:u32
is_dfs_in_init	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 is_pll_before_init = 0, is_adll_calib_before_init = 1, is_dfs_in_init = 0;$/;"	v	typeref:typename:u32
is_digit	lib/vsprintf.c	/^#define is_digit(/;"	d	file:
is_dma_capable	drivers/usb/musb-new/musb_dma.h	/^#define	is_dma_capable(/;"	d
is_dqs_swap	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	int is_dqs_swap;$/;"	m	struct:bus_params	typeref:typename:int
is_dra72x	arch/arm/include/asm/omap_common.h	/^static inline u8 is_dra72x(void)$/;"	f	typeref:typename:u8
is_dra7xx	arch/arm/include/asm/omap_common.h	/^static inline u8 is_dra7xx(void)$/;"	f	typeref:typename:u8
is_dualspeed	include/linux/usb/gadget.h	/^	unsigned			is_dualspeed:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
is_ecc_enabled	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static unsigned long is_ecc_enabled(void)$/;"	f	typeref:typename:unsigned long	file:
is_ecc_enabled	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static int is_ecc_enabled(void)$/;"	f	typeref:typename:int	file:
is_ecc_enabled	board/liebherr/lwmon5/sdram.c	/^static u32 is_ecc_enabled(void)$/;"	f	typeref:typename:u32	file:
is_ehci_hsic_mode	arch/arm/include/asm/ehci-omap.h	/^#define is_ehci_hsic_mode(/;"	d
is_ehci_phy_mode	arch/arm/include/asm/ehci-omap.h	/^#define is_ehci_phy_mode(/;"	d
is_ehci_tll_mode	arch/arm/include/asm/ehci-omap.h	/^#define is_ehci_tll_mode(/;"	d
is_empty	drivers/mtd/ubi/ubi.h	/^	int is_empty;$/;"	m	struct:ubi_attach_info	typeref:typename:int
is_empty	fs/ubifs/recovery.c	/^static int is_empty(void *buf, int len)$/;"	f	typeref:typename:int	file:
is_end_point	arch/powerpc/include/asm/4xx_pcie.h	/^static inline int is_end_point(int port)$/;"	f	typeref:typename:int
is_erased	drivers/mtd/nand/denali.c	/^static bool is_erased(uint8_t *buf, int len)$/;"	f	typeref:typename:bool	file:
is_error_sane	drivers/mtd/ubi/eba.c	/^static int is_error_sane(int err)$/;"	f	typeref:typename:int	file:
is_eth_addr_valid	drivers/usb/gadget/ether.c	/^static int is_eth_addr_valid(char *str)$/;"	f	typeref:typename:int	file:
is_eth_dev_on_usb_host	drivers/usb/eth/usb_ether.c	/^int is_eth_dev_on_usb_host(void)$/;"	f	typeref:typename:int
is_extended	disk/part_dos.c	/^static inline int is_extended(int part_type)$/;"	f	typeref:typename:int	file:
is_failure_analysis_mode	arch/arm/mach-tegra/tegra20/warmboot.c	/^static int is_failure_analysis_mode(struct fuse_regs *fuse)$/;"	f	typeref:typename:int	file:
is_field_start	tools/rkmux.py	/^    def is_field_start(line):$/;"	f	function:process_file	file:
is_flash_bank_valid	drivers/mtd/nand/denali.c	/^static inline bool is_flash_bank_valid(int flash_bank)$/;"	f	typeref:typename:bool	file:
is_fpga	drivers/usb/dwc3/core.h	/^	unsigned		is_fpga:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
is_fpgamgr_initdone_high	arch/arm/mach-socfpga/fpga_manager.c	/^static int is_fpgamgr_initdone_high(void)$/;"	f	typeref:typename:int	file:
is_freq_old	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_freq_old = 0;$/;"	v	typeref:typename:u8
is_from_environment	tools/buildman/kconfiglib.py	/^    def is_from_environment(self):$/;"	m	class:Symbol
is_full_id_nand	drivers/mtd/nand/nand_base.c	/^static inline bool is_full_id_nand(struct nand_flash_dev *type)$/;"	f	typeref:typename:bool	file:
is_gpio	drivers/pinctrl/meson/pinctrl-meson.h	/^	bool is_gpio;$/;"	m	struct:meson_pmx_group	typeref:typename:bool
is_gpio_cs	drivers/spi/bfin_spi.c	/^# define is_gpio_cs(/;"	d	file:
is_gpio_cs	drivers/spi/bfin_spi6xx.c	/^# define is_gpio_cs(/;"	d	file:
is_gpt_valid	disk/part_efi.c	/^static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,$/;"	f	typeref:typename:int	file:
is_hab_enabled	arch/arm/imx-common/hab.c	/^bool is_hab_enabled(void)$/;"	f	typeref:typename:bool
is_hash_key	fs/ubifs/key.h	/^static inline int is_hash_key(const struct ubifs_info *c,$/;"	f	typeref:typename:int
is_header_line	tools/buildman/kconfiglib.py	/^        def is_header_line(line):$/;"	f	member:Config.load_config	file:
is_hex_prefix	common/env_flags.c	/^static inline int is_hex_prefix(const char *value)$/;"	f	typeref:typename:int	file:
is_high	board/v38b/ethaddr.c	/^static int is_high()$/;"	f	typeref:typename:int	file:
is_highbank	board/highbank/highbank.c	/^static int is_highbank(void)$/;"	f	typeref:typename:int	file:
is_highspeed	drivers/i2c/s3c24x0_i2c.h	/^	int is_highspeed;	\/* High speed type, rather than I2C *\/$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:int
is_host	drivers/usb/musb-new/musb_core.h	/^	bool			is_host;$/;"	m	struct:musb	typeref:typename:bool
is_host_active	drivers/usb/musb-new/musb_core.h	/^#define is_host_active(/;"	d
is_host_capable	drivers/usb/musb-new/musb_core.h	/^#define	is_host_capable(/;"	d
is_host_enabled	drivers/usb/musb-new/musb_core.h	/^#define	is_host_enabled(/;"	d
is_hummingboard	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static bool is_hummingboard(void)$/;"	f	typeref:typename:bool	file:
is_hyp	arch/arm/include/asm/system.h	/^static inline int is_hyp(void)$/;"	f	typeref:typename:int
is_idx_node_in_tnc	fs/ubifs/tnc.c	/^int is_idx_node_in_tnc(struct ubifs_info *c, union ubifs_key *key, int level,$/;"	f	typeref:typename:int
is_in	drivers/usb/gadget/at91_udc.h	/^	unsigned			is_in:1;$/;"	m	struct:at91_ep	typeref:typename:unsigned:1
is_in	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				is_in:1;$/;"	m	struct:usba_ep	typeref:typename:unsigned int:1
is_in	drivers/usb/musb-new/musb_gadget.h	/^	u8				is_in;$/;"	m	struct:musb_ep	typeref:typename:u8
is_inst	drivers/spi/zynq_qspi.c	/^	unsigned int is_inst;$/;"	m	struct:zynq_qspi_priv	typeref:typename:unsigned int	file:
is_invalid	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 is_invalid;$/;"	m	struct:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a::__anon775fc5443d08	typeref:typename:u32
is_invalid	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 is_invalid;$/;"	m	struct:bcm2835_mbox_tag_test_palette::__anon775fc544380a::__anon775fc5443a08	typeref:typename:u32
is_iso	drivers/usb/gadget/at91_udc.h	/^	unsigned			is_iso:1;$/;"	m	struct:at91_ep	typeref:typename:unsigned:1
is_isoc	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				is_isoc:1;$/;"	m	struct:usba_ep	typeref:typename:unsigned int:1
is_key_revoked	board/freescale/common/fsl_validate.c	/^static u32 is_key_revoked(u32 keynum, u32 rev_flag)$/;"	f	typeref:typename:u32	file:
is_last_bud	fs/ubifs/replay.c	/^static int is_last_bud(struct ubifs_info *c, struct ubifs_bud *bud)$/;"	f	typeref:typename:int	file:
is_last_write	fs/ubifs/recovery.c	/^static int is_last_write(const struct ubifs_info *c, void *buf, int offs)$/;"	f	typeref:typename:int	file:
is_leaf_node_in_tnc	fs/ubifs/tnc.c	/^static int is_leaf_node_in_tnc(struct ubifs_info *c, union ubifs_key *key,$/;"	f	typeref:typename:int	file:
is_lm64	drivers/hwmon/lm63.c	/^static int is_lm64(int sensor)$/;"	f	typeref:typename:int	file:
is_lpddr2_sdram_present	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static u8 is_lpddr2_sdram_present(u32 base, u32 cs,$/;"	f	typeref:typename:u8	file:
is_lprops_dirty	fs/ubifs/lprops.c	/^static int is_lprops_dirty(struct ubifs_info *c, struct ubifs_lprops *lprops)$/;"	f	typeref:typename:int	file:
is_ma_present	arch/arm/include/asm/emif.h	/^	u8 is_ma_present;$/;"	m	struct:dmm_lisa_map_regs	typeref:typename:u8
is_mem_sdr	arch/arm/cpu/armv7/omap3/emif4.c	/^u32 is_mem_sdr(void)$/;"	f	typeref:typename:u32
is_mem_sdr	arch/arm/cpu/armv7/omap3/sdrc.c	/^u32 is_mem_sdr(void)$/;"	f	typeref:typename:u32
is_menu	tools/buildman/kconfiglib.py	/^    def is_menu(self):$/;"	m	class:Item
is_micron	board/freescale/mpc5121ads/mpc5121ads.c	/^int is_micron(void){$/;"	f	typeref:typename:int
is_modifiable	tools/buildman/kconfiglib.py	/^    def is_modifiable(self):$/;"	m	class:Symbol
is_monarch	board/esd/pmc405de/pmc405de.c	/^static int is_monarch(void)$/;"	f	typeref:typename:int	file:
is_monarch	board/esd/pmc440/pmc440.c	/^int is_monarch(void)$/;"	f	typeref:typename:int
is_mounted	fs/yaffs2/yaffs_guts.h	/^	int is_mounted;$/;"	m	struct:yaffs_dev	typeref:typename:int
is_mrc_cache	arch/x86/lib/mrccache.c	/^static int is_mrc_cache(struct mrc_data_container *cache)$/;"	f	typeref:typename:int	file:
is_multi_taskfile	include/libata.h	/^static inline int is_multi_taskfile(struct ata_taskfile *tf)$/;"	f	typeref:typename:int
is_multicast_ethaddr	include/net.h	/^static inline int is_multicast_ethaddr(const u8 *addr)$/;"	f	typeref:typename:int
is_multipoint	drivers/usb/musb-new/musb_core.h	/^	unsigned is_multipoint:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
is_mx6	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6(/;"	d
is_mx6dl	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6dl(/;"	d
is_mx6dq	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6dq(/;"	d
is_mx6dqp	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6dqp(/;"	d
is_mx6sdl	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6sdl(/;"	d
is_mx6sl	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6sl(/;"	d
is_mx6solo	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6solo(/;"	d
is_mx6sx	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6sx(/;"	d
is_mx6ul	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6ul(/;"	d
is_mx6ul_9x9_evk	include/configs/mx6ul_14x14_evk.h	/^#define is_mx6ul_9x9_evk(/;"	d
is_mx6ull	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx6ull(/;"	d
is_mx7	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_mx7(/;"	d
is_mx7d	arch/arm/cpu/armv7/mx7/soc.c	/^static bool is_mx7d(void)$/;"	f	typeref:typename:bool	file:
is_mxc_nfc_1	drivers/mtd/nand/mxc_nand.h	/^#define is_mxc_nfc_1(/;"	d
is_mxc_nfc_21	drivers/mtd/nand/mxc_nand.h	/^#define is_mxc_nfc_21(/;"	d
is_mxc_nfc_3	drivers/mtd/nand/mxc_nand.h	/^#define is_mxc_nfc_3(/;"	d
is_mxc_nfc_32	drivers/mtd/nand/mxc_nand.h	/^#define is_mxc_nfc_32(/;"	d
is_nand_selected	board/amcc/bamboo/bamboo.c	/^int is_nand_selected(void)$/;"	f	typeref:typename:int
is_next_clust	fs/fat/fat_write.c	/^static int is_next_clust(fsdata *mydata, dir_entry *dentptr)$/;"	f	typeref:typename:int	file:
is_odm_production_mode_fuse_set	arch/arm/mach-tegra/tegra20/warmboot.c	/^static int is_odm_production_mode_fuse_set(struct fuse_regs *fuse)$/;"	f	typeref:typename:int	file:
is_odpg_access_done	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^int is_odpg_access_done(u32 dev_num, u32 if_id)$/;"	f	typeref:typename:int
is_omap44xx	arch/arm/include/asm/omap_common.h	/^static inline u8 is_omap44xx(void)$/;"	f	typeref:typename:u8
is_omap54xx	arch/arm/include/asm/omap_common.h	/^static inline u8 is_omap54xx(void)$/;"	f	typeref:typename:u8
is_open	drivers/tpm/tpm_tis.h	/^	int is_open;$/;"	m	struct:tpm_chip	typeref:typename:int
is_optional	tools/buildman/kconfiglib.py	/^    def is_optional(self):$/;"	m	class:Choice
is_otg	include/linux/usb/gadget.h	/^	unsigned			is_otg:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
is_otg_enabled	drivers/usb/musb-new/musb_core.h	/^#define	is_otg_enabled(/;"	d
is_panda_es_rev_b3	board/ti/panda/panda.c	/^u8 is_panda_es_rev_b3(void)$/;"	f	typeref:typename:u8
is_partition_powered	arch/arm/mach-tegra/tegra114/cpu.c	/^static bool is_partition_powered(u32 partid)$/;"	f	typeref:typename:bool	file:
is_partition_powered	arch/arm/mach-tegra/tegra124/cpu.c	/^static bool is_partition_powered(u32 partid)$/;"	f	typeref:typename:bool	file:
is_pci_host	board/esd/pmc405de/pmc405de.c	/^int is_pci_host(struct pci_controller *hose)$/;"	f	typeref:typename:int
is_pci_host	board/esd/pmc440/pmc440.c	/^int is_pci_host(struct pci_controller *hose)$/;"	f	typeref:typename:int
is_pci_host	board/xes/xpedite1000/xpedite1000.c	/^int is_pci_host(struct pci_controller *hose)$/;"	f	typeref:typename:int
is_pck	drivers/clk/at91/clk-system.c	/^static inline int is_pck(int id)$/;"	f	typeref:typename:int	file:
is_peripheral_active	drivers/usb/musb-new/musb_core.h	/^#define is_peripheral_active(/;"	d
is_peripheral_capable	drivers/usb/musb-new/musb_core.h	/^#define	is_peripheral_capable(/;"	d
is_peripheral_enabled	drivers/usb/musb-new/musb_core.h	/^#define	is_peripheral_enabled(/;"	d
is_pex_x2	board/freescale/mpc837xemds/pci.c	/^static int is_pex_x2(void)$/;"	f	typeref:typename:int	file:
is_phy_connected	drivers/net/davinci_emac.h	/^	int	(*is_phy_connected)(int phy_addr);$/;"	m	struct:__anon759824920408	typeref:typename:int (*)(int phy_addr)
is_pingpong	drivers/usb/gadget/at91_udc.h	/^	unsigned			is_pingpong:1;$/;"	m	struct:at91_ep	typeref:typename:unsigned:1
is_pll_before_init	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 is_pll_before_init = 0, is_adll_calib_before_init = 0, is_dfs_in_init = 0;$/;"	v	typeref:typename:u32
is_pll_before_init	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 is_pll_before_init = 0, is_adll_calib_before_init = 1, is_dfs_in_init = 0;$/;"	v	typeref:typename:u32
is_pmbr_valid	disk/part_efi.c	/^static int is_pmbr_valid(legacy_mbr * mbr)$/;"	f	typeref:typename:int	file:
is_pos_valid	arch/arm/cpu/armv8/fsl-layerscape/mp.c	/^static int is_pos_valid(unsigned int pos)$/;"	f	typeref:typename:int	file:
is_power_of_2	include/linux/log2.h	/^bool is_power_of_2(unsigned long n)$/;"	f	typeref:typename:bool
is_power_of_two	fs/reiserfs/reiserfs_private.h	/^is_power_of_two (unsigned long word)$/;"	f	typeref:typename:int
is_powerpc440ep_pass1	board/amcc/bamboo/bamboo.c	/^int is_powerpc440ep_pass1(void)$/;"	f	typeref:typename:int
is_printable_string	cmd/fdt.c	/^static int is_printable_string(const void *data, int len)$/;"	f	typeref:typename:int	file:
is_production_mode_fuse_set	arch/arm/mach-tegra/tegra20/warmboot.c	/^static int is_production_mode_fuse_set(struct fuse_regs *fuse)$/;"	f	typeref:typename:int	file:
is_pte_valid	disk/part_efi.c	/^static int is_pte_valid(gpt_entry * pte)$/;"	f	typeref:typename:int	file:
is_public_exponent_bit_set	lib/rsa/rsa-mod-exp.c	/^static int is_public_exponent_bit_set(const struct rsa_public_key *key,$/;"	f	typeref:typename:int	file:
is_pup_fail	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^	int is_pup_fail;$/;"	m	struct:write_supp_result	typeref:typename:int
is_pxe	cmd/pxe.c	/^static bool is_pxe;$/;"	v	typeref:typename:bool	file:
is_qos_pri_gfx	board/renesas/alt/qos.c	/^#define is_qos_pri_gfx(/;"	d	file:
is_qos_pri_gfx	board/renesas/gose/qos.c	/^#define is_qos_pri_gfx(/;"	d	file:
is_qos_pri_gfx	board/renesas/koelsch/qos.c	/^#define is_qos_pri_gfx(/;"	d	file:
is_qos_pri_gfx	board/renesas/lager/qos.c	/^#define is_qos_pri_gfx(/;"	d	file:
is_qos_pri_gfx	board/renesas/stout/qos.c	/^#define is_qos_pri_gfx(/;"	d	file:
is_qos_pri_media	board/renesas/alt/qos.c	/^#define is_qos_pri_media(/;"	d	file:
is_qos_pri_media	board/renesas/gose/qos.c	/^#define is_qos_pri_media(/;"	d	file:
is_qos_pri_media	board/renesas/koelsch/qos.c	/^#define is_qos_pri_media(/;"	d	file:
is_qos_pri_media	board/renesas/lager/qos.c	/^#define is_qos_pri_media(/;"	d	file:
is_qos_pri_media	board/renesas/stout/qos.c	/^#define is_qos_pri_media(/;"	d	file:
is_qos_pri_normal	board/renesas/alt/qos.c	/^#define is_qos_pri_normal(/;"	d	file:
is_qos_pri_normal	board/renesas/gose/qos.c	/^#define is_qos_pri_normal(/;"	d	file:
is_qos_pri_normal	board/renesas/koelsch/qos.c	/^#define is_qos_pri_normal(/;"	d	file:
is_qos_pri_normal	board/renesas/lager/qos.c	/^#define is_qos_pri_normal(/;"	d	file:
is_qos_pri_normal	board/renesas/stout/qos.c	/^#define is_qos_pri_normal(/;"	d	file:
is_qsgmii_riser_card	drivers/net/fm/init.c	/^int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,$/;"	f	typeref:typename:int
is_ready	drivers/block/dwc_ahsata.c	/^static int is_ready;$/;"	v	typeref:typename:int	file:
is_ready	drivers/usb/musb-new/musb_host.h	/^	u8			is_ready;	\/* safe to modify hw_ep *\/$/;"	m	struct:musb_qh	typeref:typename:u8
is_receiving	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			is_receiving;	\/* sync with eth interrupt *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
is_reg_dump	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_reg_dump = 0;$/;"	v	typeref:typename:u8
is_registered	drivers/gpio/da8xx_gpio.c	/^	int is_registered;$/;"	m	struct:gpio_registry	typeref:typename:int	file:
is_reserved	arch/blackfin/cpu/gpio.c	/^#define is_reserved(/;"	d	file:
is_reserved	drivers/gpio/adi_gpio2.c	/^#define is_reserved(/;"	d	file:
is_response	arch/x86/include/asm/me_common.h	/^	u32 is_response:1;$/;"	m	struct:mkhi_header	typeref:typename:u32:1
is_revc1	board/wandboard/wandboard.c	/^static bool is_revc1(void)$/;"	f	typeref:typename:bool	file:
is_rl_old	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_rl_old = 0;$/;"	v	typeref:typename:u8
is_root_hub	drivers/usb/host/xhci.c	/^static bool is_root_hub(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
is_running	include/remoteproc.h	/^	int (*is_running)(struct udevice *dev);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev)
is_running_in_flash	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 is_running_in_flash(void)$/;"	f	typeref:typename:u32
is_running_in_sdram	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 is_running_in_sdram(void)$/;"	f	typeref:typename:u32
is_running_in_sram	arch/arm/cpu/armv7/omap3/sys_info.c	/^u32 is_running_in_sram(void)$/;"	f	typeref:typename:u32
is_same_clock	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline int is_same_clock(struct clk *a, struct clk *b)$/;"	f	typeref:typename:int
is_same_clock	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline int is_same_clock(struct clk *a, struct clk *b)$/;"	f	typeref:typename:int
is_self_powered	drivers/usb/musb-new/musb_core.h	/^	unsigned		is_self_powered:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
is_selfpowered	drivers/usb/dwc3/core.h	/^	unsigned		is_selfpowered:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
is_serdes_configured	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/p1023_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc85xx/p2020_serdes.c	/^int is_serdes_configured(enum srds_prtcl prtcl)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_configured	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^int is_serdes_configured(enum srds_prtcl device)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/p2041_serdes.c	/^int is_serdes_prtcl_valid(u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/p3041_serdes.c	/^int is_serdes_prtcl_valid(u32 prtcl) {$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/p4080_serdes.c	/^int is_serdes_prtcl_valid(u32 prtcl) {$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/p5020_serdes.c	/^int is_serdes_prtcl_valid(u32 prtcl) {$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/p5040_serdes.c	/^int is_serdes_prtcl_valid(u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/t1024_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/t1040_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_serdes_prtcl_valid	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^int is_serdes_prtcl_valid(int serdes, u32 prtcl)$/;"	f	typeref:typename:int
is_sh7757_b0	arch/sh/include/asm/cpu_sh7757.h	/^#define is_sh7757_b0(/;"	d
is_shadowed	fs/yaffs2/yaffs_guts.h	/^	u8 is_shadowed:1;	\/* This object is shadowed on the way$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
is_shared_fifo	drivers/usb/musb-new/musb_core.h	/^	bool			is_shared_fifo;$/;"	m	struct:musb_hw_ep	typeref:typename:bool
is_shrink	fs/yaffs2/yaffs_guts.h	/^	u32 is_shrink;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
is_slfm	arch/x86/include/asm/speedstep.h	/^	uint8_t is_slfm;$/;"	m	struct:sst_state	typeref:typename:uint8_t
is_small_request	common/dlmalloc.c	/^#define is_small_request(/;"	d	file:
is_soc_rev	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_soc_rev(/;"	d
is_soc_type	arch/arm/include/asm/imx-common/sys_proto.h	/^#define is_soc_type(/;"	d
is_sparse_image	include/image-sparse.h	/^static inline int is_sparse_image(void *buf)$/;"	f	typeref:typename:int
is_special	tools/buildman/kconfiglib.py	/^    def is_special(self):$/;"	m	class:Symbol
is_spl_build	scripts/basic/fixdep.c	/^int is_spl_build = 0; \/* hack for U-Boot *\/$/;"	v	typeref:typename:int
is_stalled	drivers/usb/gadget/atmel_usba_udc.c	/^static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)$/;"	f	typeref:typename:int	file:
is_stopped	common/cli_hush.c	/^	int is_stopped;				\/* is the program currently running? *\/$/;"	m	struct:child_prog	typeref:typename:int	file:
is_supported	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 is_supported;$/;"	m	struct:hws_tip_freq_config_info	typeref:typename:u8
is_suspended	drivers/usb/musb-new/musb_core.h	/^	unsigned		is_suspended:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
is_symbol	tools/buildman/kconfiglib.py	/^    def is_symbol(self):$/;"	m	class:Item
is_tune_result	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_tune_result = 0;$/;"	v	typeref:typename:u8
is_turbo	arch/x86/include/asm/speedstep.h	/^	uint8_t is_turbo;$/;"	m	struct:sst_state	typeref:typename:uint8_t
is_usbd_high_speed	drivers/usb/gadget/designware_udc.c	/^int is_usbd_high_speed(void)$/;"	f	typeref:typename:int
is_utmi_l1_suspend	drivers/usb/dwc3/core.h	/^	unsigned		is_utmi_l1_suspend:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
is_utmi_l1_suspend	include/dwc3-uboot.h	/^	unsigned is_utmi_l1_suspend;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
is_valid	board/freescale/common/sys_eeprom.c	/^#define is_valid /;"	d	file:
is_valid	board/varisys/common/sys_eeprom.c	/^#define is_valid /;"	d	file:
is_valid	drivers/video/tegra124/sor.h	/^	int	is_valid;$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
is_valid_dos_buf	disk/part_dos.c	/^int is_valid_dos_buf(void *buf)$/;"	f	typeref:typename:int
is_valid_ethaddr	include/net.h	/^static inline int is_valid_ethaddr(const u8 *addr)$/;"	f	typeref:typename:int
is_valid_gpt_buf	disk/part_efi.c	/^int is_valid_gpt_buf(struct blk_desc *dev_desc, void *buf)$/;"	f	typeref:typename:int
is_validate_window_per_if	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_validate_window_per_if = 0;$/;"	v	typeref:typename:u8
is_validate_window_per_pup	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 is_validate_window_per_pup = 0;$/;"	v	typeref:typename:u8
is_vblank_line	board/bf533-stamp/video.c	/^int is_vblank_line(const int line)$/;"	f	typeref:typename:int
is_veyron	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	bool is_veyron;$/;"	m	struct:dram_info	typeref:typename:bool	file:
is_visible	scripts/kconfig/nconf.c	/^	int is_visible;$/;"	m	struct:mitem	typeref:typename:int	file:
is_warm_boot	board/freescale/common/arm_sleep.c	/^bool is_warm_boot(void)$/;"	f	typeref:typename:bool
is_warm_boot	board/freescale/common/mpc85xx_sleep.c	/^bool is_warm_boot(void)$/;"	f	typeref:typename:bool
is_warm_boot	board/freescale/ls1043aqds/ls1043aqds.c	/^bool is_warm_boot(void)$/;"	f	typeref:typename:bool
is_warm_boot	board/freescale/ls1046aqds/ls1046aqds.c	/^bool is_warm_boot(void)$/;"	f	typeref:typename:bool
is_yaffs2	fs/yaffs2/yaffs_guts.h	/^	int is_yaffs2;		\/* Use yaffs2 mode on this device *\/$/;"	m	struct:yaffs_param	typeref:typename:int
is_zero_ethaddr	include/net.h	/^static inline int is_zero_ethaddr(const u8 *addr)$/;"	f	typeref:typename:int
isa	include/linux/edd.h	/^		} __attribute__ ((packed)) isa;$/;"	m	union:edd_device_params::__anon8a8b619a010a	typeref:struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0208
isaBase	include/video_fb.h	/^    unsigned int isaBase;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
isa_bus_to_virt	arch/mips/include/asm/io.h	/^static inline void *isa_bus_to_virt(unsigned long address)$/;"	f	typeref:typename:void *
isa_check_signature	arch/arm/include/asm/io.h	/^#define isa_check_signature(/;"	d
isa_check_signature	arch/arm/include/asm/io.h	/^isa_check_signature(unsigned long io_addr, const unsigned char *signature,$/;"	f	typeref:typename:int
isa_check_signature	arch/nds32/include/asm/io.h	/^#define isa_check_signature(/;"	d
isa_check_signature	arch/nds32/include/asm/io.h	/^isa_check_signature(unsigned long io_addr, const unsigned char *signature,$/;"	f	typeref:typename:int
isa_check_signature	arch/x86/include/asm/io.h	/^static inline int isa_check_signature(unsigned long io_addr,$/;"	f	typeref:typename:int
isa_eth_io_copy_and_sum	arch/arm/include/asm/io.h	/^#define isa_eth_io_copy_and_sum(/;"	d
isa_eth_io_copy_and_sum	arch/nds32/include/asm/io.h	/^#define isa_eth_io_copy_and_sum(/;"	d
isa_init	board/mpl/common/isa.c	/^int isa_init(void)$/;"	f	typeref:typename:int
isa_init_irq_contr	board/mpl/common/isa.c	/^void isa_init_irq_contr(void)$/;"	f	typeref:typename:void
isa_irq_action	board/mpl/common/isa.c	/^struct	isa_irq_action {$/;"	s	file:
isa_irq_free_handler	board/mpl/common/isa.c	/^void isa_irq_free_handler(int vec)$/;"	f	typeref:typename:void
isa_irq_get_count	board/mpl/common/isa.c	/^int isa_irq_get_count(int vec)$/;"	f	typeref:typename:int
isa_irq_install_handler	board/mpl/common/isa.c	/^void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)$/;"	f	typeref:typename:void
isa_irq_occupied	arch/x86/lib/mpspec.c	/^static bool isa_irq_occupied[16];$/;"	v	typeref:typename:bool[16]	file:
isa_irqs	board/mpl/common/isa.c	/^static struct isa_irq_action isa_irqs[16];$/;"	v	typeref:struct:isa_irq_action[16]	file:
isa_kbd_init	board/mpl/common/kbd.c	/^int isa_kbd_init(void)$/;"	f	typeref:typename:int
isa_memcpy_fromio	arch/arm/include/asm/io.h	/^#define isa_memcpy_fromio(/;"	d
isa_memcpy_fromio	arch/nds32/include/asm/io.h	/^#define isa_memcpy_fromio(/;"	d
isa_memcpy_fromio	arch/x86/include/asm/io.h	/^#define isa_memcpy_fromio(/;"	d
isa_memcpy_toio	arch/arm/include/asm/io.h	/^#define isa_memcpy_toio(/;"	d
isa_memcpy_toio	arch/nds32/include/asm/io.h	/^#define isa_memcpy_toio(/;"	d
isa_memcpy_toio	arch/x86/include/asm/io.h	/^#define isa_memcpy_toio(/;"	d
isa_memset_io	arch/arm/include/asm/io.h	/^#define isa_memset_io(/;"	d
isa_memset_io	arch/nds32/include/asm/io.h	/^#define isa_memset_io(/;"	d
isa_memset_io	arch/x86/include/asm/io.h	/^#define isa_memset_io(/;"	d
isa_page_to_bus	arch/mips/include/asm/io.h	/^#define isa_page_to_bus /;"	d
isa_readb	arch/arm/include/asm/io.h	/^#define isa_readb(/;"	d
isa_readb	arch/nds32/include/asm/io.h	/^#define isa_readb(/;"	d
isa_readb	arch/x86/include/asm/io.h	/^#define isa_readb(/;"	d
isa_readl	arch/arm/include/asm/io.h	/^#define isa_readl(/;"	d
isa_readl	arch/nds32/include/asm/io.h	/^#define isa_readl(/;"	d
isa_readl	arch/x86/include/asm/io.h	/^#define isa_readl(/;"	d
isa_readw	arch/arm/include/asm/io.h	/^#define isa_readw(/;"	d
isa_readw	arch/nds32/include/asm/io.h	/^#define isa_readw(/;"	d
isa_readw	arch/x86/include/asm/io.h	/^#define isa_readw(/;"	d
isa_show_irq	board/mpl/common/isa.c	/^void isa_show_irq(void)$/;"	f	typeref:typename:void
isa_sio_loadtable	board/mpl/common/isa.c	/^void isa_sio_loadtable(void)$/;"	f	typeref:typename:void
isa_sio_setup	board/mpl/common/isa.c	/^void isa_sio_setup(void)$/;"	f	typeref:typename:void
isa_virt_to_bus	arch/mips/include/asm/io.h	/^static inline unsigned long isa_virt_to_bus(volatile void *address)$/;"	f	typeref:typename:unsigned long
isa_write_table	board/mpl/common/isa.c	/^void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)$/;"	f	typeref:typename:void
isa_writeb	arch/arm/include/asm/io.h	/^#define isa_writeb(/;"	d
isa_writeb	arch/nds32/include/asm/io.h	/^#define isa_writeb(/;"	d
isa_writeb	arch/x86/include/asm/io.h	/^#define isa_writeb(/;"	d
isa_writel	arch/arm/include/asm/io.h	/^#define isa_writel(/;"	d
isa_writel	arch/nds32/include/asm/io.h	/^#define isa_writel(/;"	d
isa_writel	arch/x86/include/asm/io.h	/^#define isa_writel(/;"	d
isa_writew	arch/arm/include/asm/io.h	/^#define isa_writew(/;"	d
isa_writew	arch/nds32/include/asm/io.h	/^#define isa_writew(/;"	d
isa_writew	arch/x86/include/asm/io.h	/^#define isa_writew(/;"	d
isalive	test/py/u_boot_spawn.py	/^    def isalive(self):$/;"	m	class:Spawn
isalnum	include/linux/ctype.h	/^#define isalnum(/;"	d
isalpha	include/linux/ctype.h	/^#define isalpha(/;"	d
isar	drivers/i2c/mv_i2c.c	/^	u32 isar;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
isascii	include/linux/ctype.h	/^#define isascii(/;"	d
isb	arch/arm/include/asm/barriers.h	/^#define isb(/;"	d
isb	arch/powerpc/include/asm/io.h	/^#define isb(/;"	d
isbad_bbt	include/linux/mtd/bbm.h	/^	int (*isbad_bbt)(struct mtd_info *mtd, loff_t ofs, int allowbbt);$/;"	m	struct:bbm_info	typeref:typename:int (*)(struct mtd_info * mtd,loff_t ofs,int allowbbt)
isblank	include/bedbug/bedbug.h	/^#define isblank(/;"	d
isblank	include/linux/ctype.h	/^#define isblank(/;"	d
isc_clk	arch/arm/dts/sama5d2.dtsi	/^					isc_clk: isc_clk@46 {$/;"	l
iscck	arch/arm/dts/sama5d2.dtsi	/^					iscck: iscck@18 {$/;"	l	label:pmc
iscntrl	include/linux/ctype.h	/^#define iscntrl(/;"	d
isdigit	drivers/usb/gadget/epautoconf.c	/^#define isdigit(/;"	d	file:
isdigit	include/linux/ctype.h	/^#define isdigit(/;"	d
isempty_RL	lib/bzip2/bzlib.c	/^Bool isempty_RL ( EState* s )$/;"	f	typeref:typename:Bool	file:
isgraph	include/linux/ctype.h	/^#define isgraph(/;"	d
ishwaddr	board/Arcturus/ucp1020/cmd_arc.c	/^static int ishwaddr(char *hwaddr)$/;"	f	typeref:typename:int	file:
isi_clk	arch/arm/dts/at91sam9260.dtsi	/^					isi_clk: isi_clk {$/;"	l
isi_clk	arch/arm/dts/at91sam9263.dtsi	/^					isi_clk: isi_clk {$/;"	l
isi_clk	arch/arm/dts/at91sam9g45.dtsi	/^					isi_clk: isi_clk {$/;"	l
isiphyctrl	include/usb/ehci-ci.h	/^	u32	isiphyctrl;	\/* 0x204 - On-Chip PHY Control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
isize	fs/jffs2/jffs2_nand_private.h	/^	u32 isize;$/;"	m	struct:b_inode	typeref:typename:u32
isize	include/jffs2/jffs2.h	/^	__u32 isize;      \/* Total resultant size of this inode (used for truncations)  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
isleap	drivers/rtc/mcfrtc.c	/^#define isleap(/;"	d	file:
isleap	include/linux/time.h	/^#define isleap(/;"	d
isless	post/lib_powerpc/fpu/darwin-ldouble.c	/^#define isless(/;"	d	file:
islower	include/linux/ctype.h	/^#define islower(/;"	d
iso_boot_rec	disk/part_iso.h	/^typedef struct iso_boot_rec {$/;"	s
iso_boot_rec_t	disk/part_iso.h	/^} iso_boot_rec_t;$/;"	t	typeref:struct:iso_boot_rec
iso_dread	disk/part_iso.c	/^unsigned long iso_dread(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long
iso_dummy	disk/part_mac.h	/^	uchar   iso_dummy[2048];\/* Reservere enough room for an ISO partition block to fit *\/$/;"	m	struct:mac_partition	typeref:typename:uchar[2048]
iso_header_entry	disk/part_iso.h	/^typedef struct iso_header_entry {$/;"	s
iso_header_entry_t	disk/part_iso.h	/^} iso_header_entry_t;$/;"	t	typeref:struct:iso_header_entry
iso_idx	drivers/usb/musb-new/musb_host.h	/^	unsigned		iso_idx;	\/* in urb->iso_frame_desc[] *\/$/;"	m	struct:musb_qh	typeref:typename:unsigned
iso_init_def_entry	disk/part_iso.h	/^typedef struct iso_init_def_entry {$/;"	s
iso_init_def_entry_t	disk/part_iso.h	/^} iso_init_def_entry_t;$/;"	t	typeref:struct:iso_init_def_entry
iso_part_rec	disk/part_iso.h	/^typedef struct iso_part_rec {$/;"	s
iso_part_rec_t	disk/part_iso.h	/^}iso_part_rec_t;$/;"	t	typeref:struct:iso_part_rec
iso_pri_rec	disk/part_iso.h	/^typedef struct iso_pri_rec {$/;"	s
iso_pri_rec_t	disk/part_iso.h	/^} iso_pri_rec_t;$/;"	t	typeref:struct:iso_pri_rec
iso_sup_rec	disk/part_iso.h	/^typedef struct iso_sup_rec {$/;"	s
iso_sup_rec_t	disk/part_iso.h	/^}iso_sup_rec_t;$/;"	t	typeref:struct:iso_sup_rec
iso_val_entry	disk/part_iso.h	/^typedef struct iso_val_entry {$/;"	s
iso_val_entry_t	disk/part_iso.h	/^} iso_val_entry_t;$/;"	t	typeref:struct:iso_val_entry
isoch_delay	drivers/usb/dwc3/core.h	/^	u16			isoch_delay;$/;"	m	struct:dwc3	typeref:typename:u16
isoeasr	include/usb/fotg210.h	/^	uint32_t isoeasr;\/* 0x158: ISOC Error\/Abort Status Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
isolate_io	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^static int isolate_io(u32 isolate)$/;"	f	typeref:typename:int	file:
isolate_resource	arch/arm/cpu/armv7/mx7/soc.c	/^static void isolate_resource(void)$/;"	f	typeref:typename:void	file:
isolated_prts	include/vsc9953.h	/^	u32	isolated_prts;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
isp116x	drivers/usb/host/isp116x-hcd.c	/^	struct isp116x *isp116x = &isp116x_dev;$/;"	v	typeref:struct:isp116x *
isp116x	drivers/usb/host/isp116x.h	/^struct isp116x {$/;"	s
isp116x_board	drivers/usb/host/isp116x-hcd.c	/^struct isp116x_platform_data isp116x_board;$/;"	v	typeref:struct:isp116x_platform_data
isp116x_check_id	drivers/usb/host/isp116x-hcd.c	/^int isp116x_check_id(struct isp116x *isp116x)$/;"	f	typeref:typename:int
isp116x_delay	drivers/usb/host/isp116x.h	/^#define	isp116x_delay(/;"	d
isp116x_dev	drivers/usb/host/isp116x-hcd.c	/^struct isp116x isp116x_dev;$/;"	v	typeref:struct:isp116x
isp116x_ep	drivers/usb/host/isp116x.h	/^struct isp116x_ep {$/;"	s
isp116x_get_current_frame_number	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_get_current_frame_number(struct usb_device *usb_dev)$/;"	f	typeref:typename:int	file:
isp116x_interrupt	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_interrupt(struct isp116x *isp116x)$/;"	f	typeref:typename:int	file:
isp116x_platform_data	drivers/usb/host/isp116x.h	/^struct isp116x_platform_data {$/;"	s
isp116x_raw_read_data16	drivers/usb/host/isp116x.h	/^static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x)$/;"	f	typeref:typename:u16
isp116x_raw_write_data16	drivers/usb/host/isp116x.h	/^static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val)$/;"	f	typeref:typename:void
isp116x_read_data16	drivers/usb/host/isp116x.h	/^static inline u16 isp116x_read_data16(struct isp116x *isp116x)$/;"	f	typeref:typename:u16
isp116x_read_data32	drivers/usb/host/isp116x.h	/^static inline u32 isp116x_read_data32(struct isp116x *isp116x)$/;"	f	typeref:typename:u32
isp116x_read_reg16	drivers/usb/host/isp116x.h	/^static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg)$/;"	f	typeref:typename:u16
isp116x_read_reg32	drivers/usb/host/isp116x.h	/^static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg)$/;"	f	typeref:typename:u32
isp116x_reset	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_reset(struct isp116x *isp116x)$/;"	f	typeref:typename:int	file:
isp116x_show_reg	drivers/usb/host/isp116x-hcd.c	/^#define isp116x_show_reg(/;"	d	file:
isp116x_show_regs	drivers/usb/host/isp116x-hcd.c	/^#define isp116x_show_regs(/;"	d	file:
isp116x_start	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_start(struct isp116x *isp116x)$/;"	f	typeref:typename:int	file:
isp116x_stop	drivers/usb/host/isp116x-hcd.c	/^static void isp116x_stop(struct isp116x *isp116x)$/;"	f	typeref:typename:void	file:
isp116x_submit_job	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
isp116x_submit_rh_msg	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
isp116x_sw_reset	drivers/usb/host/isp116x-hcd.c	/^static int isp116x_sw_reset(struct isp116x *isp116x)$/;"	f	typeref:typename:int	file:
isp116x_write_addr	drivers/usb/host/isp116x.h	/^static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)$/;"	f	typeref:typename:void
isp116x_write_data16	drivers/usb/host/isp116x.h	/^static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val)$/;"	f	typeref:typename:void
isp116x_write_data32	drivers/usb/host/isp116x.h	/^static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val)$/;"	f	typeref:typename:void
isp116x_write_reg16	drivers/usb/host/isp116x.h	/^static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg,$/;"	f	typeref:typename:void
isp116x_write_reg32	drivers/usb/host/isp116x.h	/^static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg,$/;"	f	typeref:typename:void
isp1301_configure	drivers/usb/host/ohci-lpc32xx.c	/^static void isp1301_configure(void)$/;"	f	typeref:typename:void	file:
isp1301_set_value	drivers/usb/host/ohci-lpc32xx.c	/^static int isp1301_set_value(int reg, u8 value)$/;"	f	typeref:typename:int	file:
ispEN	include/lattice.h	/^#define ispEN	/;"	d
ispVM	drivers/fpga/lattice.c	/^signed char ispVM(void)$/;"	f	typeref:typename:signed char
ispVMAmble	drivers/fpga/ivm_core.c	/^signed char ispVMAmble(signed char Code)$/;"	f	typeref:typename:signed char
ispVMBitShift	drivers/fpga/ivm_core.c	/^signed char ispVMBitShift(signed char mode, unsigned short bits)$/;"	f	typeref:typename:signed char
ispVMBypass	drivers/fpga/ivm_core.c	/^void ispVMBypass(signed char ScanType, unsigned short Bits)$/;"	f	typeref:typename:void
ispVMCalculateCRC32	drivers/fpga/ivm_core.c	/^void ispVMCalculateCRC32(unsigned char a_ucData)$/;"	f	typeref:typename:void
ispVMClocks	drivers/fpga/ivm_core.c	/^void ispVMClocks(unsigned short Clocks)$/;"	f	typeref:typename:void
ispVMCode	drivers/fpga/ivm_core.c	/^signed char ispVMCode()$/;"	f	typeref:typename:signed char
ispVMComment	drivers/fpga/ivm_core.c	/^void ispVMComment(unsigned short a_usCommentSize)$/;"	f	typeref:typename:void
ispVMData	drivers/fpga/ivm_core.c	/^void ispVMData(unsigned char *ByteData)$/;"	f	typeref:typename:void
ispVMDataCode	drivers/fpga/ivm_core.c	/^signed char ispVMDataCode()$/;"	f	typeref:typename:signed char
ispVMDataSize	drivers/fpga/ivm_core.c	/^long int ispVMDataSize()$/;"	f	typeref:typename:long int
ispVMDelay	drivers/fpga/lattice.c	/^void ispVMDelay(unsigned short delay)$/;"	f	typeref:typename:void
ispVMEnd	drivers/fpga/ivm_core.c	/^void ispVMEnd()$/;"	f	typeref:typename:void
ispVMFreeMem	drivers/fpga/ivm_core.c	/^void ispVMFreeMem(void)$/;"	f	typeref:typename:void
ispVMHeader	drivers/fpga/ivm_core.c	/^void ispVMHeader(unsigned short a_usHeaderSize)$/;"	f	typeref:typename:void
ispVMLCOUNT	drivers/fpga/ivm_core.c	/^signed char ispVMLCOUNT(unsigned short a_usCountSize)$/;"	f	typeref:typename:signed char
ispVMLoop	drivers/fpga/ivm_core.c	/^signed char ispVMLoop(unsigned short a_usLoopCount)$/;"	f	typeref:typename:signed char
ispVMMemManager	drivers/fpga/ivm_core.c	/^void ispVMMemManager(signed char cTarget, unsigned short usSize)$/;"	f	typeref:typename:void
ispVMProcessLVDS	drivers/fpga/ivm_core.c	/^signed char ispVMProcessLVDS(unsigned short a_usLVDSCount)$/;"	f	typeref:typename:signed char
ispVMRead	drivers/fpga/ivm_core.c	/^signed char ispVMRead(unsigned short a_usiDataSize)$/;"	f	typeref:typename:signed char
ispVMReadandSave	drivers/fpga/ivm_core.c	/^signed char ispVMReadandSave(unsigned short int a_usiDataSize)$/;"	f	typeref:typename:signed char
ispVMSend	drivers/fpga/ivm_core.c	/^signed char ispVMSend(unsigned short a_usiDataSize)$/;"	f	typeref:typename:signed char
ispVMShift	drivers/fpga/ivm_core.c	/^signed char ispVMShift(signed char a_cCode)$/;"	f	typeref:typename:signed char
ispVMStart	drivers/fpga/ivm_core.c	/^void ispVMStart()$/;"	f	typeref:typename:void
ispVMStateMachine	drivers/fpga/ivm_core.c	/^void ispVMStateMachine(signed char cNextJTAGState)$/;"	f	typeref:typename:void
isp_arm_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_arm_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_arm_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_arm_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_arm_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_arm_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_arm_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_arm_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_arm_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_enable	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t isp_enable;			\/* Offset 0x004c *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
isp_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 isp_freq;		\/* offset 0xc *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
isp_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	isp_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ispblk_cfg	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	ispblk_cfg;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
isprime	lib/hashtable.c	/^static int isprime(unsigned int number)$/;"	f	typeref:typename:int	file:
isprint	include/linux/ctype.h	/^#define isprint(/;"	d
ispunct	include/linux/ctype.h	/^#define ispunct(/;"	d
isq	drivers/net/cs8900.h	/^	CS8900_REG isq;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
isr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 isr;		\/* 0x0A0 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
isr	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 isr;		\/* Interrupt Status Register		*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
isr	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 isr;$/;"	m	struct:gpio_regs	typeref:typename:u32
isr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^	uint32_t	isr;$/;"	m	struct:pxa_uart_regs	typeref:typename:uint32_t
isr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 isr;$/;"	m	struct:at91_emac	typeref:typename:u32
isr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	isr;		\/* 0x4C Interrupt Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
isr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	isr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
isr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 isr;		\/* 0x2C PIO Interrupt Status Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
isr	arch/m68k/include/asm/coldfire/ata.h	/^	u8 isr;			\/* 0x28 *\/$/;"	m	struct:atac	typeref:typename:u8
isr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 isr;		\/* 0x40 Interrupt Status Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
isr	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 isr;		\/* 0x10 Interrupt Status *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
isr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 isr;$/;"	m	struct:ssi	typeref:typename:u32
isr	arch/m68k/include/asm/immap_5445x.h	/^	u32 isr;		\/* 0x88 Initiator Status Register *\/$/;"	m	struct:pci	typeref:typename:u32
isr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 isr;		\/* 0x88 Initiator Status *\/$/;"	m	struct:pci	typeref:typename:u32
isr	arch/m68k/include/asm/rtc.h	/^	u32 isr;		\/* 0x14 Interrupt Status Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
isr	arch/microblaze/include/asm/microblaze_intc.h	/^	int isr; \/* interrupt status register *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
isr	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	isr;$/;"	m	union:psc512x::__anond569131d040a	typeref:typename:volatile u16
isr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	isr; \/* Inbound Status Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
isr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	isr;		\/* 0xd3064 - Inbound Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
isr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $isr   = $mbar - 1 + 0x030$/;"	t
isr	drivers/i2c/mv_i2c.c	/^	u32 isr;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
isr	drivers/mtd/altera_qspi.c	/^	u32	isr;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
isr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 isr;		\/* 0x28 PMECC Interrupt Status Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
isr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 isr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
isr	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 isr;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
isr	drivers/mtd/nand/tegra_nand.h	/^	u32	isr;		\/* offset 08h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
isr	drivers/net/ftgmac100.h	/^	unsigned int	isr;		\/* 0x00 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
isr	drivers/net/ftmac100.h	/^	unsigned int	isr;		\/* 0x00 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
isr	drivers/net/ftmac110.h	/^	uint32_t isr;    \/* 0x00: Interrups Status Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
isr	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 isr;	\/* Interrupt Status Register (RW) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
isr	drivers/spi/rk_spi.h	/^	u32 isr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
isr	drivers/spi/zynq_qspi.c	/^	u32 isr;	\/* 0x04 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
isr	drivers/spi/zynq_spi.c	/^	u32 isr;	\/* 0x04 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
isr	drivers/usb/musb-new/musb_core.h	/^	irqreturn_t		(*isr)(int, void *);$/;"	m	struct:musb	typeref:typename:irqreturn_t (*)(int,void *)
isr	include/mpc5xxx.h	/^		volatile u16	isr;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b040a	typeref:typename:volatile u16
isr	include/usb/fotg210.h	/^	uint32_t isr;	\/* 0xC0: Global Interrupt Status Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
isr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	isr1;$/;"	m	struct:gpc	typeref:typename:u32
isr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	isr2;$/;"	m	struct:gpc	typeref:typename:u32
isr3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	isr3;$/;"	m	struct:gpc	typeref:typename:u32
isr4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	isr4;$/;"	m	struct:gpc	typeref:typename:u32
isr_imr	arch/powerpc/include/asm/immap_512x.h	/^	} isr_imr;$/;"	m	struct:psc512x	typeref:union:psc512x::__anond569131d040a
isr_imr	include/mpc5xxx.h	/^	} isr_imr;$/;"	m	struct:mpc5xxx_psc	typeref:union:mpc5xxx_psc::__anon151a8a6b040a
isrxready	drivers/net/xilinx_axi_emac.c	/^static int isrxready(struct axidma_priv *priv)$/;"	f	typeref:typename:int	file:
isspace	include/linux/ctype.h	/^#define isspace(/;"	d
issue	board/esd/vme8349/caddy.h	/^	uint32_t issue;$/;"	m	struct:caddy_answer	typeref:typename:uint32_t
issue	board/esd/vme8349/caddy.h	/^	uint32_t issue;$/;"	m	struct:caddy_cmd	typeref:typename:uint32_t
issue_start_status	drivers/usb/gadget/ether.c	/^static void issue_start_status(struct eth_dev *dev)$/;"	f	typeref:typename:void	file:
issue_stop	drivers/i2c/i2c-uniphier-f.c	/^static int issue_stop(struct uniphier_fi2c_dev *dev, int old_ret)$/;"	f	typeref:typename:int	file:
ist_info	arch/x86/include/asm/bootparam.h	/^	struct ist_info ist_info;			\/* 0x060 *\/$/;"	m	struct:boot_params	typeref:struct:ist_info
ist_info	arch/x86/include/asm/ist.h	/^struct ist_info {$/;"	s
isupper	include/linux/ctype.h	/^#define isupper(/;"	d
isusbhost	board/Synology/ds109/ds109.h	/^	u32 isusbhost;$/;"	m	struct:tag_mv_uboot	typeref:typename:u32
iswgrp_handoff	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	iswgrp_handoff[8];		\/* 0x80 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[8]
iswgrp_handoff	arch/arm/mach-socfpga/misc.c	/^static uint32_t iswgrp_handoff[8];$/;"	v	typeref:typename:uint32_t[8]	file:
isxdigit	include/linux/ctype.h	/^#define isxdigit(/;"	d
isync	arch/powerpc/include/asm/io.h	/^static inline void isync(void)$/;"	f	typeref:typename:void
it	doc/README.x86	/^it to fsp.bin.$/;"	l
it6251_init	board/kosagi/novena/video.c	/^static int it6251_init(void)$/;"	f	typeref:typename:int	file:
it6251_is_stable	board/kosagi/novena/video.c	/^static int it6251_is_stable(void)$/;"	f	typeref:typename:int	file:
it6251_program_regs	board/kosagi/novena/video.c	/^static void it6251_program_regs(void)$/;"	f	typeref:typename:void	file:
it6251_ready	board/kosagi/novena/video.c	/^static int it6251_ready(void)$/;"	f	typeref:typename:int	file:
itat	include/tsi148.h	/^	unsigned int itat;                    \/* 0x018 inbound  translation attr  *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
itc	drivers/net/ftgmac100.h	/^	unsigned int	itc;		\/* 0x30 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
itc	drivers/net/ftmac100.h	/^	unsigned int	itc;		\/* 0x28 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
itc	drivers/net/ftmac110.h	/^	uint32_t itc;    \/* 0x28: Interrupt Timer Control Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
itcfg	include/fsl_fman.h	/^	u32	itcfg;		\/* timing config register *\/$/;"	m	struct:fm_imem	typeref:typename:u32
iteal	include/tsi148.h	/^	unsigned int iteal;                   \/* 0x00c inbound  end         lower *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
iteau	include/tsi148.h	/^	unsigned int iteau;                   \/* 0x008 inbound  end         upper *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
item	include/ec_commands.h	/^			struct ec_collect_item item[0];$/;"	m	struct:ec_result_keyscan_seq_ctrl::__anon71a6b2670a0a::__anon71a6b2670b08	typeref:struct:ec_collect_item[0]
item	scripts/basic/fixdep.c	/^struct item {$/;"	s	file:
item	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color item;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
item	scripts/kconfig/qconf.h	/^	ConfigItem *item;$/;"	m	class:ConfigLineEdit	typeref:typename:ConfigItem *
item_activate_selected	scripts/kconfig/lxdialog/util.c	/^int item_activate_selected(void)$/;"	f	typeref:typename:int
item_add_str	scripts/kconfig/lxdialog/util.c	/^void item_add_str(const char *fmt, ...)$/;"	f	typeref:typename:void
item_add_str	scripts/kconfig/nconf.c	/^static void item_add_str(const char *fmt, ...)$/;"	f	typeref:typename:void	file:
item_choice	common/menu.c	/^	char *(*item_choice)(void *);$/;"	m	struct:menu	typeref:typename:char * (*)(void *)	file:
item_choice_data	common/menu.c	/^	void *item_choice_data;$/;"	m	struct:menu	typeref:typename:void *	file:
item_count	scripts/kconfig/lxdialog/util.c	/^int item_count(void)$/;"	f	typeref:typename:int
item_cur	scripts/kconfig/lxdialog/util.c	/^struct dialog_list *item_cur;$/;"	v	typeref:struct:dialog_list *
item_data	scripts/kconfig/lxdialog/util.c	/^void *item_data(void)$/;"	f	typeref:typename:void *
item_data	scripts/kconfig/nconf.c	/^static void *item_data(void)$/;"	f	typeref:typename:void *	file:
item_data_print	common/menu.c	/^	void (*item_data_print)(void *);$/;"	m	struct:menu	typeref:typename:void (*)(void *)	file:
item_foreach	scripts/kconfig/lxdialog/dialog.h	/^#define item_foreach(/;"	d
item_head	fs/reiserfs/reiserfs_private.h	/^struct item_head$/;"	s
item_head	scripts/kconfig/lxdialog/util.c	/^struct dialog_list *item_head;$/;"	v	typeref:struct:dialog_list *
item_id	arch/x86/include/asm/me_common.h	/^	u32 item_id:8;$/;"	m	struct:mbp_item_header	typeref:typename:u32:8
item_is_selected	scripts/kconfig/lxdialog/util.c	/^int item_is_selected(void)$/;"	f	typeref:typename:int
item_is_tag	scripts/kconfig/lxdialog/util.c	/^int item_is_tag(char tag)$/;"	f	typeref:typename:int
item_is_tag	scripts/kconfig/nconf.c	/^static int item_is_tag(char tag)$/;"	f	typeref:typename:int	file:
item_make	scripts/kconfig/lxdialog/util.c	/^void item_make(const char *fmt, ...)$/;"	f	typeref:typename:void
item_make	scripts/kconfig/nconf.c	/^static void item_make(struct menu *menu, char tag, const char *fmt, ...)$/;"	f	typeref:typename:void	file:
item_n	scripts/kconfig/lxdialog/util.c	/^int item_n(void)$/;"	f	typeref:typename:int
item_nil	scripts/kconfig/lxdialog/util.c	/^struct dialog_list item_nil;$/;"	v	typeref:struct:dialog_list
item_reset	scripts/kconfig/lxdialog/util.c	/^void item_reset(void)$/;"	f	typeref:typename:void
item_selected	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color item_selected;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
item_set	scripts/kconfig/lxdialog/util.c	/^void item_set(int n)$/;"	f	typeref:typename:void
item_set_data	scripts/kconfig/lxdialog/util.c	/^void item_set_data(void *ptr)$/;"	f	typeref:typename:void
item_set_selected	scripts/kconfig/lxdialog/util.c	/^void item_set_selected(int val)$/;"	f	typeref:typename:void
item_set_tag	scripts/kconfig/lxdialog/util.c	/^void item_set_tag(char tag)$/;"	f	typeref:typename:void
item_str	scripts/kconfig/lxdialog/util.c	/^const char *item_str(void)$/;"	f	typeref:typename:const char *
item_tag	scripts/kconfig/lxdialog/util.c	/^char item_tag(void)$/;"	f	typeref:typename:char
item_tag	scripts/kconfig/nconf.c	/^static char item_tag(void)$/;"	f	typeref:typename:char	file:
item_x	scripts/kconfig/lxdialog/checklist.c	/^static int list_width, check_x, item_x;$/;"	v	typeref:typename:int	file:
item_x	scripts/kconfig/lxdialog/menubox.c	/^static int menu_width, item_x;$/;"	v	typeref:typename:int	file:
items	common/menu.c	/^	struct list_head items;$/;"	m	struct:menu	typeref:struct:list_head	file:
items	tools/patman/settings.py	/^    def items(self, section, *args, **kwargs):$/;"	m	class:_ProjectConfigParser
items_mem	drivers/usb/gadget/ci_udc.h	/^	uint8_t				*items_mem;$/;"	m	struct:ci_drv	typeref:typename:uint8_t *
items_num	scripts/kconfig/nconf.c	/^static int items_num;$/;"	v	typeref:typename:int	file:
iter_status	include/fsl-mc/fsl_dprc.h	/^	enum dprc_iter_status iter_status;$/;"	m	struct:dprc_res_ids_range_desc	typeref:enum:dprc_iter_status
iterate_zap	fs/zfs/zfs.c	/^static int iterate_zap(const char *name, uint64_t val, struct zfs_data *data)$/;"	f	typeref:typename:int	file:
iterate_zap_fs	fs/zfs/zfs.c	/^static int iterate_zap_fs(const char *name, uint64_t val, struct zfs_data *data)$/;"	f	typeref:typename:int	file:
iterate_zap_snap	fs/zfs/zfs.c	/^static int iterate_zap_snap(const char *name, uint64_t val, struct zfs_data *data)$/;"	f	typeref:typename:int	file:
itofl	include/tsi148.h	/^	unsigned int itofl;                   \/* 0x014 inbound  translation lower *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
itofu	include/tsi148.h	/^	unsigned int itofu;                   \/* 0x010 inbound  translation upper *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
its	arch/arm/dts/rk3399.dtsi	/^		its: interrupt-controller@fee20000 {$/;"	l	label:gic
its_a_go	tools/patman/patman	/^    its_a_go = ok or options.ignore_errors$/;"	v
its_a_go	tools/patman/patman.py	/^    its_a_go = ok or options.ignore_errors$/;"	v
itsal	include/tsi148.h	/^	unsigned int itsal;                   \/* 0x004 inbouud  start       lower *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
itsau	include/tsi148.h	/^	unsigned int itsau;                   \/* 0x000 inbound  start       upper *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
itype	include/mpc5xxx.h	/^	volatile u16 itype;		\/* WU_GPIO + 0x18 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u16
iuart_en	arch/x86/include/asm/arch-baytrail/global_nvs.h	/^	u8	iuart_en;	\/* internal UART enabled *\/$/;"	m	struct:acpi_global_nvs	typeref:typename:u8
iuneq	post/lib_powerpc/fpu/compare-fp-1.c	/^static void iuneq (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
iunge	post/lib_powerpc/fpu/compare-fp-1.c	/^static void iunge (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
iungt	post/lib_powerpc/fpu/compare-fp-1.c	/^static void iungt (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
iunle	post/lib_powerpc/fpu/compare-fp-1.c	/^static void iunle (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
iunlt	post/lib_powerpc/fpu/compare-fp-1.c	/^static void iunlt (float x, float y, int ok)$/;"	f	typeref:typename:void	file:
iv	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short iv;              \/* 0x34 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
iv	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short iv;	\/* 0x0C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
iv	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short iv;		\/* 0x34 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
iv	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short iv;		\/* 0x34 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
iv	tools/mxsimage.h	/^			uint8_t iv[16];$/;"	m	struct:sb_boot_image_header::__anonc4848c96010a::__anonc4848c960208	typeref:typename:uint8_t[16]
iv_size	arch/arm/mach-exynos/clock_init.h	/^	unsigned iv_size;$/;"	m	struct:mem_timings	typeref:typename:unsigned
iva	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *iva;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
iva	arch/arm/include/asm/omap_common.h	/^	struct volts iva;$/;"	m	struct:vcores_data	typeref:struct:volts
iva_36x_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^iva_36x_dpll_param:$/;"	l
iva_dclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	iva_dclk: iva_dclk {$/;"	l
iva_dpll_hs_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {$/;"	l
iva_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^iva_dpll_param:$/;"	l
iva_dpll_params_1862mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
iva_dpll_params_2330mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
iva_dpll_params_2330mhz_dra7xx	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params iva_dpll_params_2330mhz_dra7xx[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
iva_init_34xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void iva_init_34xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
iva_init_36xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void iva_init_36xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
ival	include/mpc5xxx.h	/^	volatile u8 ival;		\/* WU_GPIO + 0x20 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
ivb_pm_gt1	drivers/video/ivybridge_igd.c	/^static const struct gt_powermeter ivb_pm_gt1[] = {$/;"	v	typeref:typename:const struct gt_powermeter[]	file:
ivb_pm_gt2	drivers/video/ivybridge_igd.c	/^static const struct gt_powermeter ivb_pm_gt2[] = {$/;"	v	typeref:typename:const struct gt_powermeter[]	file:
ivb_pm_gt2_17w	drivers/video/ivybridge_igd.c	/^static const struct gt_powermeter ivb_pm_gt2_17w[] = {$/;"	v	typeref:typename:const struct gt_powermeter[]	file:
ivb_pm_gt2_35w	drivers/video/ivybridge_igd.c	/^static const struct gt_powermeter ivb_pm_gt2_35w[] = {$/;"	v	typeref:typename:const struct gt_powermeter[]	file:
ivc	drivers/misc/tegra186_bpmp.c	/^	struct tegra_ivc ivc;$/;"	m	struct:tegra186_bpmp	typeref:struct:tegra_ivc	file:
ivc_state	arch/arm/mach-tegra/ivc.c	/^enum ivc_state {$/;"	g	file:
ivc_state_ack	arch/arm/mach-tegra/ivc.c	/^	ivc_state_ack$/;"	e	enum:ivc_state	file:
ivc_state_established	arch/arm/mach-tegra/ivc.c	/^	ivc_state_established = 0,$/;"	e	enum:ivc_state	file:
ivc_state_sync	arch/arm/mach-tegra/ivc.c	/^	ivc_state_sync,$/;"	e	enum:ivc_state	file:
ivcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ivcontrol;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
ivcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ivcontrol;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
ivent_set	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ivent_set;		\/* MBAR_ETH + 0x020 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ivm_analyze_block2	board/keymile/common/ivm.c	/^static int ivm_analyze_block2(unsigned char *buf, int len)$/;"	f	typeref:typename:int	file:
ivm_analyze_eeprom	board/keymile/common/ivm.c	/^int ivm_analyze_eeprom(unsigned char *buf, int len)$/;"	f	typeref:typename:int
ivm_calc_crc	board/keymile/common/ivm.c	/^static int ivm_calc_crc(unsigned char *buf, int len)$/;"	f	typeref:typename:int	file:
ivm_check_crc	board/keymile/common/ivm.c	/^static int ivm_check_crc(unsigned char *buf, int block)$/;"	f	typeref:typename:int	file:
ivm_content	board/keymile/km82xx/km82xx.c	/^static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];$/;"	v	typeref:typename:uchar[]	file:
ivm_content	board/keymile/km83xx/km83xx.c	/^static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];$/;"	v	typeref:typename:uchar[]	file:
ivm_content	board/keymile/km_arm/km_arm.c	/^static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];$/;"	v	typeref:typename:uchar[]	file:
ivm_content	board/keymile/kmp204x/kmp204x.c	/^static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];$/;"	v	typeref:typename:uchar[]	file:
ivm_findinventorystring	board/keymile/common/ivm.c	/^static int ivm_findinventorystring(int type,$/;"	f	typeref:typename:int	file:
ivm_get_value	board/keymile/common/ivm.c	/^static int ivm_get_value(unsigned char *buf, int len, char *name, int off,$/;"	f	typeref:typename:int	file:
ivm_populate_env	board/keymile/common/ivm.c	/^static int ivm_populate_env(unsigned char *buf, int len)$/;"	f	typeref:typename:int	file:
ivm_read_eeprom	board/keymile/common/ivm.c	/^int ivm_read_eeprom(unsigned char *buf, int len)$/;"	f	typeref:typename:int
ivm_set_value	board/keymile/common/ivm.c	/^static int ivm_set_value(char *name, char *value)$/;"	f	typeref:typename:int	file:
ivr	arch/microblaze/include/asm/microblaze_intc.h	/^	int ivr; \/* interrupt vector register *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
ivr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	ivr;		\/* PSC + 0x30 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
ivr	include/mpc5xxx.h	/^	volatile u8	ivr;		\/* PSC + 0x30 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
ivsr	arch/m68k/include/asm/fec.h	/^	u32 ivsr;		\/* 0x0C *\/$/;"	m	struct:fec	typeref:typename:u32
ivt2_header	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^ivt2_header:            .long 0x0$/;"	l
ivt2_header	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^ivt2_header:            .long 0x0$/;"	l
ivt_header_t	tools/imximage.h	/^} __attribute__((packed)) ivt_header_t;$/;"	t	typeref:struct:__anon504a956c0808
ivt_prefix	tools/vybridimage.c	/^	uint8_t ivt_prefix[1024];	\/* 0x00040000 - 0x000403ff *\/$/;"	m	struct:nand_page_0_boot_header	typeref:typename:uint8_t[1024]	file:
ivybridge_syscon_ids	arch/x86/cpu/ivybridge/early_me.c	/^static const struct udevice_id ivybridge_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
iw0btar	arch/m68k/include/asm/immap_5445x.h	/^	u32 iw0btar;		\/* 0x70 Initiator Window 0 Base\/Translation addr *\/$/;"	m	struct:pci	typeref:typename:u32
iw0btar	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 iw0btar;		\/* 0x70 Initiator Win 0 Base\/Translation adr *\/$/;"	m	struct:pci	typeref:typename:u32
iw1btar	arch/m68k/include/asm/immap_5445x.h	/^	u32 iw1btar;		\/* 0x74 Initiator Window 1 Base\/Translation addr *\/$/;"	m	struct:pci	typeref:typename:u32
iw1btar	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 iw1btar;		\/* 0x74 Initiator Win 1 Base\/Translation adr *\/$/;"	m	struct:pci	typeref:typename:u32
iw2btar	arch/m68k/include/asm/immap_5445x.h	/^	u32 iw2btar;		\/* 0x78 Initiator Window 2 Base\/Translation addr *\/$/;"	m	struct:pci	typeref:typename:u32
iw2btar	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 iw2btar;		\/* 0x78 NA *\/$/;"	m	struct:pci	typeref:typename:u32
iwc	drivers/net/armada100_fec.h	/^	u32 iwc;			\/* Interrupt write to clear *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
iwcr	arch/m68k/include/asm/immap_5445x.h	/^	u32 iwcr;		\/* 0x80 Initiator Window Configuration Register *\/$/;"	m	struct:pci	typeref:typename:u32
iwcr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 iwcr;		\/* 0x80 Initiator Window Configuration *\/$/;"	m	struct:pci	typeref:typename:u32
ixMC_BIST_CTRL	include/radeon.h	/^#define ixMC_BIST_CTRL	/;"	d
ixMC_CHP_IO_CNTL_A0	include/radeon.h	/^#define ixMC_CHP_IO_CNTL_A0	/;"	d
ixMC_CHP_IO_CNTL_A1	include/radeon.h	/^#define ixMC_CHP_IO_CNTL_A1	/;"	d
ixMC_CHP_IO_CNTL_B0	include/radeon.h	/^#define ixMC_CHP_IO_CNTL_B0	/;"	d
ixMC_CHP_IO_CNTL_B1	include/radeon.h	/^#define ixMC_CHP_IO_CNTL_B1	/;"	d
ixMC_IMP_CNTL	include/radeon.h	/^#define ixMC_IMP_CNTL	/;"	d
ixMC_IMP_CNTL_0	include/radeon.h	/^#define ixMC_IMP_CNTL_0	/;"	d
ixMC_PERF_CNTL	include/radeon.h	/^#define ixMC_PERF_CNTL	/;"	d
ixMC_PERF_COUNT_0	include/radeon.h	/^#define ixMC_PERF_COUNT_0	/;"	d
ixMC_PERF_COUNT_1	include/radeon.h	/^#define ixMC_PERF_COUNT_1	/;"	d
ixMC_PERF_COUNT_2	include/radeon.h	/^#define ixMC_PERF_COUNT_2	/;"	d
ixMC_PERF_COUNT_3	include/radeon.h	/^#define ixMC_PERF_COUNT_3	/;"	d
ixMC_PERF_COUNT_MEMCH_A	include/radeon.h	/^#define ixMC_PERF_COUNT_MEMCH_A	/;"	d
ixMC_PERF_COUNT_MEMCH_B	include/radeon.h	/^#define ixMC_PERF_COUNT_MEMCH_B	/;"	d
ixMC_PERF_REGION_0	include/radeon.h	/^#define ixMC_PERF_REGION_0	/;"	d
ixMC_PERF_REGION_1	include/radeon.h	/^#define ixMC_PERF_REGION_1	/;"	d
ixMC_PERF_SEL	include/radeon.h	/^#define ixMC_PERF_SEL	/;"	d
ixR300_MC_BIST_CNTL_0	include/radeon.h	/^#define ixR300_MC_BIST_CNTL_0	/;"	d
ixR300_MC_BIST_CNTL_1	include/radeon.h	/^#define ixR300_MC_BIST_CNTL_1	/;"	d
ixR300_MC_BIST_CNTL_2	include/radeon.h	/^#define ixR300_MC_BIST_CNTL_2	/;"	d
ixR300_MC_BIST_CNTL_3	include/radeon.h	/^#define ixR300_MC_BIST_CNTL_3	/;"	d
ixR300_MC_BIST_CNTL_4	include/radeon.h	/^#define ixR300_MC_BIST_CNTL_4	/;"	d
ixR300_MC_BIST_CNTL_5	include/radeon.h	/^#define ixR300_MC_BIST_CNTL_5	/;"	d
ixR300_MC_CHP_IO_CNTL_A0	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_A0	/;"	d
ixR300_MC_CHP_IO_CNTL_A1	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_A1	/;"	d
ixR300_MC_CHP_IO_CNTL_B0	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_B0	/;"	d
ixR300_MC_CHP_IO_CNTL_B1	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_B1	/;"	d
ixR300_MC_CHP_IO_CNTL_C0	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_C0	/;"	d
ixR300_MC_CHP_IO_CNTL_C1	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_C1	/;"	d
ixR300_MC_CHP_IO_CNTL_D0	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_D0	/;"	d
ixR300_MC_CHP_IO_CNTL_D1	include/radeon.h	/^#define ixR300_MC_CHP_IO_CNTL_D1	/;"	d
ixR300_MC_CHP_IO_OE_CNTL_CD	include/radeon.h	/^#define ixR300_MC_CHP_IO_OE_CNTL_CD	/;"	d
ixR300_MC_DEBUG_CNTL	include/radeon.h	/^#define ixR300_MC_DEBUG_CNTL	/;"	d
ixR300_MC_DLL_CNTL	include/radeon.h	/^#define ixR300_MC_DLL_CNTL	/;"	d
ixR300_MC_ELPIDA_CNTL	include/radeon.h	/^#define ixR300_MC_ELPIDA_CNTL	/;"	d
ixR300_MC_IMP_CNTL	include/radeon.h	/^#define ixR300_MC_IMP_CNTL	/;"	d
ixR300_MC_IMP_CNTL_0	include/radeon.h	/^#define ixR300_MC_IMP_CNTL_0	/;"	d
ixR300_MC_IMP_STATUS	include/radeon.h	/^#define ixR300_MC_IMP_STATUS	/;"	d
ixR300_MC_MC_INIT_WR_LAT_TIMER	include/radeon.h	/^#define ixR300_MC_MC_INIT_WR_LAT_TIMER	/;"	d
ixR300_MC_READ_CNTL_CD	include/radeon.h	/^#define ixR300_MC_READ_CNTL_CD	/;"	d
ixREG_COLLAR_READ	include/radeon.h	/^#define ixREG_COLLAR_READ	/;"	d
ixREG_COLLAR_WRITE	include/radeon.h	/^#define ixREG_COLLAR_WRITE	/;"	d
ixTC_MISMATCH_1	include/radeon.h	/^#define ixTC_MISMATCH_1	/;"	d
ixTC_MISMATCH_2	include/radeon.h	/^#define ixTC_MISMATCH_2	/;"	d
j32	fs/ubifs/ubifs.h	/^	__le32 j32[UBIFS_SK_LEN\/4];$/;"	m	union:ubifs_key	typeref:typename:__le32[]
j_digest	fs/reiserfs/reiserfs_private.h	/^  char j_digest[16];			\/* md5 sum of all the blocks involved, including desc and commit. not us/;"	m	struct:reiserfs_journal_commit	typeref:typename:char[16]
j_first_unflushed_offset	fs/reiserfs/reiserfs_private.h	/^  __u32 j_first_unflushed_offset;$/;"	m	struct:reiserfs_journal_header	typeref:typename:__u32
j_last_flush_trans_id	fs/reiserfs/reiserfs_private.h	/^  __u32 j_last_flush_trans_id;$/;"	m	struct:reiserfs_journal_header	typeref:typename:__u32
j_len	fs/reiserfs/reiserfs_private.h	/^  __u32 j_len;				\/* length of commit. len +1 is the commit block *\/$/;"	m	struct:reiserfs_journal_desc	typeref:typename:__u32
j_len	fs/reiserfs/reiserfs_private.h	/^  __u32 j_len;			\/* ditto *\/$/;"	m	struct:reiserfs_journal_commit	typeref:typename:__u32
j_magic	fs/reiserfs/reiserfs_private.h	/^  char j_magic[12];$/;"	m	struct:reiserfs_journal_desc	typeref:typename:char[12]
j_mount_id	fs/reiserfs/reiserfs_private.h	/^  __u32 j_mount_id;			\/* mount id of this trans*\/$/;"	m	struct:reiserfs_journal_desc	typeref:typename:__u32
j_mount_id	fs/reiserfs/reiserfs_private.h	/^  __u32 j_mount_id;$/;"	m	struct:reiserfs_journal_header	typeref:typename:__u32
j_realblock	fs/reiserfs/reiserfs_private.h	/^  __u32 j_realblock[JOURNAL_TRANS_HALF]; \/* real locations for the first blocks *\/$/;"	m	struct:reiserfs_journal_desc	typeref:typename:__u32[]
j_realblock	fs/reiserfs/reiserfs_private.h	/^  __u32 j_realblock[JOURNAL_TRANS_HALF]; \/* real locations for the last blocks *\/$/;"	m	struct:reiserfs_journal_commit	typeref:typename:__u32[]
j_trans_id	fs/reiserfs/reiserfs_private.h	/^  __u32 j_trans_id;			\/* id of commit *\/$/;"	m	struct:reiserfs_journal_desc	typeref:typename:__u32
j_trans_id	fs/reiserfs/reiserfs_private.h	/^  __u32 j_trans_id;			\/* must match j_trans_id from the desc block *\/$/;"	m	struct:reiserfs_journal_commit	typeref:typename:__u32
jedec	drivers/mtd/spi/sf_internal.h	/^	u32 jedec;$/;"	m	struct:spi_flash_params	typeref:typename:u32
jedec_ac_timings	arch/arm/cpu/armv7/omap4/emif.c	/^			jedec_ac_timings[MAX_NUM_SPEEDBINS] = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings const * []	file:
jedec_ac_timings	arch/arm/cpu/armv7/omap5/emif.c	/^			jedec_ac_timings[MAX_NUM_SPEEDBINS] = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings const * []	file:
jedec_default_timings	arch/arm/cpu/armv7/omap4/emif.c	/^const struct lpddr2_device_timings jedec_default_timings = {$/;"	v	typeref:typename:const struct lpddr2_device_timings
jedec_default_timings	arch/arm/cpu/armv7/omap5/emif.c	/^static const struct lpddr2_device_timings jedec_default_timings = {$/;"	v	typeref:typename:const struct lpddr2_device_timings	file:
jedec_ecc_info	include/linux/mtd/nand.h	/^struct jedec_ecc_info {$/;"	s
jedec_feature	include/linux/mtd/nand.h	/^static inline int jedec_feature(struct nand_chip *chip)$/;"	f	typeref:typename:int
jedec_flash_match	drivers/mtd/jedec_flash.c	/^int jedec_flash_match(flash_info_t *info, ulong base)$/;"	f	typeref:typename:int
jedec_id	drivers/mtd/spi/sf_dataflash.c	/^	uint32_t	jedec_id;$/;"	m	struct:flash_info	typeref:typename:uint32_t	file:
jedec_id	include/linux/mtd/nand.h	/^	u8 jedec_id;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
jedec_id	include/linux/mtd/nand.h	/^	u8 jedec_id[6];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[6]
jedec_params	include/linux/mtd/nand.h	/^	struct nand_jedec_params jedec_params;$/;"	m	struct:nand_chip	typeref:struct:nand_jedec_params
jedec_probe	drivers/mtd/spi/sf_dataflash.c	/^static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id)$/;"	f	typeref:struct:flash_info *	file:
jedec_table	drivers/mtd/jedec_flash.c	/^static const struct amd_flash_info jedec_table[] = {$/;"	v	typeref:typename:const struct amd_flash_info[]	file:
jedec_version	include/linux/mtd/nand.h	/^	int jedec_version;$/;"	m	struct:nand_chip	typeref:typename:int
jetson_tk1_drvgrps	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^static const struct pmux_drvgrp_config jetson_tk1_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
jetson_tk1_gpio_inits	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^static const struct tegra_gpio_config jetson_tk1_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
jetson_tk1_mipipadctrlgrps	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^static const struct pmux_mipipadctrlgrp_config jetson_tk1_mipipadctrlgrps[] = {$/;"	v	typeref:typename:const struct pmux_mipipadctrlgrp_config[]
jetson_tk1_pingrps	board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h	/^static const struct pmux_pingrp_config jetson_tk1_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
jffs2	include/nand.h	/^	int jffs2;		\/* if true: format for jffs2 usage$/;"	m	struct:nand_erase_options	typeref:typename:int
jffs2_1pass_build_lists	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_build_lists(struct part_info * part)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_build_lists	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_build_lists(struct part_info * part)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_fill_info	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_fill_info	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_find_inode	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_find_inode(struct b_lists * pL, const char *name, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_find_inode	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_find_inode(struct b_lists * pL, const char *name, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_info	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_info(struct part_info * part)$/;"	f	typeref:typename:u32
jffs2_1pass_info	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_info(struct part_info * part)$/;"	f	typeref:typename:u32
jffs2_1pass_list_inodes	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_list_inodes	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_load	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_load(char *dest, struct part_info * part, const char *fname)$/;"	f	typeref:typename:u32
jffs2_1pass_load	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_load(char *dest, struct part_info * part, const char *fname)$/;"	f	typeref:typename:u32
jffs2_1pass_ls	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_ls(struct part_info * part, const char *fname)$/;"	f	typeref:typename:u32
jffs2_1pass_ls	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_ls(struct part_info * part, const char *fname)$/;"	f	typeref:typename:u32
jffs2_1pass_read_inode	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest)$/;"	f	typeref:typename:long	file:
jffs2_1pass_read_inode	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_read_inode(struct b_lists *pL, u32 ino, char *dest,$/;"	f	typeref:typename:long	file:
jffs2_1pass_rescan_needed	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_rescan_needed(struct part_info *part)$/;"	f	typeref:typename:unsigned char
jffs2_1pass_rescan_needed	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_rescan_needed(struct part_info *part)$/;"	f	typeref:typename:unsigned char
jffs2_1pass_resolve_inode	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_resolve_inode(struct b_lists * pL, u32 ino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_resolve_inode	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_resolve_inode(struct b_lists * pL, u32 ino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_search_inode	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_search_inode(struct b_lists * pL, const char *fname, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_search_inode	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_search_inode(struct b_lists * pL, const char *fname, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_search_list_inodes	fs/jffs2/jffs2_1pass.c	/^jffs2_1pass_search_list_inodes(struct b_lists * pL, const char *fname, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_1pass_search_list_inodes	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_1pass_search_list_inodes(struct b_lists * pL, const char *fname, u32 pino)$/;"	f	typeref:typename:u32	file:
jffs2_fill_scan_buf	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_fill_scan_buf(struct mtd_info *mtd, unsigned char *buf,$/;"	f	typeref:typename:int	file:
jffs2_free_cache	fs/jffs2/jffs2_1pass.c	/^jffs2_free_cache(struct part_info *part)$/;"	f	typeref:typename:void
jffs2_get_list	fs/jffs2/jffs2_1pass.c	/^jffs2_get_list(struct part_info * part, const char *who)$/;"	f	typeref:struct:b_lists *	file:
jffs2_get_list	fs/jffs2/jffs2_nand_1pass.c	/^jffs2_get_list(struct part_info * part, const char *who)$/;"	f	typeref:struct:b_lists *	file:
jffs2_node_union	include/jffs2/jffs2.h	/^union jffs2_node_union {$/;"	u
jffs2_part_info	cmd/jffs2.c	/^static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num)$/;"	f	typeref:struct:part_info *	file:
jffs2_priv	include/jffs2/load_kernel.h	/^	void *jffs2_priv;		\/* used internaly by jffs2 *\/$/;"	m	struct:part_info	typeref:typename:void *
jffs2_private_h	fs/jffs2/jffs2_nand_private.h	/^#define jffs2_private_h$/;"	d
jffs2_private_h	fs/jffs2/jffs2_private.h	/^#define jffs2_private_h$/;"	d
jffs2_raw_dirent	include/jffs2/jffs2.h	/^struct jffs2_raw_dirent$/;"	s
jffs2_raw_inode	include/jffs2/jffs2.h	/^struct jffs2_raw_inode$/;"	s
jffs2_raw_summary	include/jffs2/jffs2.h	/^struct jffs2_raw_summary$/;"	s
jffs2_sum_dirent_flash	fs/jffs2/summary.h	/^struct jffs2_sum_dirent_flash$/;"	s
jffs2_sum_dirent_mem	fs/jffs2/summary.h	/^struct jffs2_sum_dirent_mem$/;"	s
jffs2_sum_flash	fs/jffs2/summary.h	/^union jffs2_sum_flash$/;"	u
jffs2_sum_inode_flash	fs/jffs2/summary.h	/^struct jffs2_sum_inode_flash$/;"	s
jffs2_sum_inode_mem	fs/jffs2/summary.h	/^struct jffs2_sum_inode_mem$/;"	s
jffs2_sum_marker	fs/jffs2/summary.h	/^struct jffs2_sum_marker$/;"	s
jffs2_sum_mem	fs/jffs2/summary.h	/^union jffs2_sum_mem$/;"	u
jffs2_sum_process_sum_data	fs/jffs2/jffs2_1pass.c	/^static int jffs2_sum_process_sum_data(struct part_info *part, uint32_t offset,$/;"	f	typeref:typename:int	file:
jffs2_sum_scan_sumnode	fs/jffs2/jffs2_1pass.c	/^int jffs2_sum_scan_sumnode(struct part_info *part, uint32_t offset,$/;"	f	typeref:typename:int
jffs2_sum_unknown_flash	fs/jffs2/summary.h	/^struct jffs2_sum_unknown_flash$/;"	s
jffs2_sum_unknown_mem	fs/jffs2/summary.h	/^struct jffs2_sum_unknown_mem$/;"	s
jffs2_sum_xattr_flash	fs/jffs2/summary.h	/^struct jffs2_sum_xattr_flash$/;"	s
jffs2_sum_xattr_mem	fs/jffs2/summary.h	/^struct jffs2_sum_xattr_mem$/;"	s
jffs2_sum_xref_flash	fs/jffs2/summary.h	/^struct jffs2_sum_xref_flash$/;"	s
jffs2_sum_xref_mem	fs/jffs2/summary.h	/^struct jffs2_sum_xref_mem$/;"	s
jffs2_summary	fs/jffs2/summary.h	/^struct jffs2_summary$/;"	s
jffs2_unknown_node	include/jffs2/jffs2.h	/^struct jffs2_unknown_node$/;"	s
jffs_init_1pass_list	fs/jffs2/jffs2_1pass.c	/^jffs_init_1pass_list(struct part_info *part)$/;"	f	typeref:typename:u32	file:
jffs_init_1pass_list	fs/jffs2/jffs2_nand_1pass.c	/^jffs_init_1pass_list(struct part_info *part)$/;"	f	typeref:typename:u32	file:
jhead	fs/ubifs/ubifs-media.h	/^	__le32 jhead;$/;"	m	struct:ubifs_ref_node	typeref:typename:__le32
jhead	fs/ubifs/ubifs.h	/^	int jhead;$/;"	m	struct:ubifs_bud	typeref:typename:int
jhead	fs/ubifs/ubifs.h	/^	int jhead;$/;"	m	struct:ubifs_wbuf	typeref:typename:int
jhead_cnt	fs/ubifs/ubifs-media.h	/^	__le32 jhead_cnt;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
jhead_cnt	fs/ubifs/ubifs.h	/^	int jhead_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
jheads	fs/ubifs/ubifs.h	/^	struct ubifs_jhead *jheads;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_jhead *
jid	tools/ifdtool.h	/^	uint32_t jid;$/;"	m	struct:vscc_t	typeref:typename:uint32_t
jmp_buf	arch/arm/include/asm/setjmp.h	/^typedef struct jmp_buf_data jmp_buf[1];$/;"	t	typeref:struct:jmp_buf_data[1]
jmp_buf_data	arch/arm/include/asm/setjmp.h	/^struct jmp_buf_data {$/;"	s
jmp_buf_data	arch/x86/include/asm/setjmp.h	/^struct jmp_buf_data {$/;"	s
jmp_ctx	examples/standalone/sched.c	/^typedef	vu_char *jmp_ctx;$/;"	t	typeref:typename:vu_char *	file:
job_context	common/cli_hush.c	/^	int job_context;			\/* bitmask defining current context *\/$/;"	m	struct:pipe	typeref:typename:int	file:
job_list	common/cli_hush.c	/^static struct pipe *job_list;$/;"	v	typeref:struct:pipe *	file:
jobid	common/cli_hush.c	/^	int jobid;					\/* job number *\/$/;"	m	struct:pipe	typeref:typename:int	file:
jobring	drivers/crypto/fsl/jr.h	/^struct jobring {$/;"	s
journal_backup_type	include/ext_common.h	/^	uint8_t journal_backup_type;$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t
journal_block	fs/reiserfs/reiserfs_private.h	/^  __u32 journal_block;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u32
journal_block_count	fs/reiserfs/reiserfs_private.h	/^  __u32 journal_block_count;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u32
journal_blocks	include/ext_common.h	/^	__le32 journal_blocks[17];$/;"	m	struct:ext2_sblock	typeref:typename:__le32[17]
journal_dev	include/ext_common.h	/^	__le32 journal_dev;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
journal_first_desc	fs/reiserfs/reiserfs_private.h	/^  __u32 journal_first_desc;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u32
journal_header_t	fs/ext4/ext4_journal.h	/^struct journal_header_t {$/;"	s
journal_init	fs/reiserfs/reiserfs.c	/^journal_init (void)$/;"	f	typeref:typename:int	file:
journal_inode	include/ext_common.h	/^	__le32 journal_inode;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
journal_log	fs/ext4/ext4_journal.h	/^struct journal_log {$/;"	s
journal_ptr	fs/ext4/ext4_journal.c	/^struct journal_log *journal_ptr[MAX_JOURNAL_ENTRIES];$/;"	v	typeref:struct:journal_log * []
journal_read	fs/reiserfs/reiserfs.c	/^journal_read (int block, int len, char *buffer)$/;"	f	typeref:typename:int	file:
journal_revoke_header_t	fs/ext4/ext4_journal.h	/^struct journal_revoke_header_t {$/;"	s
journal_superblock_t	fs/ext4/ext4_journal.h	/^struct journal_superblock_t {$/;"	s
journal_transactions	fs/reiserfs/reiserfs_private.h	/^  __u16 journal_transactions;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u16
journal_uuid	include/ext_common.h	/^	uint8_t journal_uuid[16];$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t[16]
jp	arch/mips/include/asm/regdef.h	/^#define jp	/;"	d
jpeg_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	jpeg_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
jpeg_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	jpeg_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
jpeg_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	jpeg_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
jpeg_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	jpeg_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
jq	arch/powerpc/include/asm/immap_85xx.h	/^	} jq[2];$/;"	m	struct:ccsr_raide	typeref:struct:ccsr_raide::__anondcd7518a0c08[2]
jq_id	drivers/crypto/fsl/jr.h	/^	int jq_id;$/;"	m	struct:jobring	typeref:typename:int
jr0	drivers/crypto/fsl/jr.c	/^struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC];$/;"	v	typeref:struct:jobring[]
jr_dequeue	drivers/crypto/fsl/jr.c	/^static int jr_dequeue(int sec_idx)$/;"	f	typeref:typename:int	file:
jr_disable_irq	drivers/crypto/fsl/jr.c	/^static inline void jr_disable_irq(uint8_t sec_idx)$/;"	f	typeref:typename:void	file:
jr_enqueue	drivers/crypto/fsl/jr.c	/^static int jr_enqueue(uint32_t *desc_addr,$/;"	f	typeref:typename:int	file:
jr_hw_reset	drivers/crypto/fsl/jr.c	/^static int jr_hw_reset(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
jr_info	drivers/crypto/fsl/jr.h	/^struct jr_info {$/;"	s
jr_init	drivers/crypto/fsl/jr.c	/^static int jr_init(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
jr_initregs	drivers/crypto/fsl/jr.c	/^static void jr_initregs(uint8_t sec_idx)$/;"	f	typeref:typename:void	file:
jr_regs	include/fsl_sec.h	/^struct jr_regs {$/;"	s
jr_reset	drivers/crypto/fsl/jr.c	/^int jr_reset(void)$/;"	f	typeref:typename:int
jr_reset_liodn	drivers/crypto/fsl/jr.c	/^static inline void jr_reset_liodn(uint8_t sec_idx)$/;"	f	typeref:typename:void	file:
jr_reset_sec	drivers/crypto/fsl/jr.c	/^static inline int jr_reset_sec(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
jr_sw_cleanup	drivers/crypto/fsl/jr.c	/^static int jr_sw_cleanup(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
jrcfg0	include/fsl_sec.h	/^	u32 jrcfg0;$/;"	m	struct:jr_regs	typeref:typename:u32
jrcfg1	include/fsl_sec.h	/^	u32 jrcfg1;$/;"	m	struct:jr_regs	typeref:typename:u32
jrcr	include/fsl_sec.h	/^	u32 jrcr;$/;"	m	struct:jr_regs	typeref:typename:u32
jrint	include/fsl_sec.h	/^	u32 jrint;$/;"	m	struct:jr_regs	typeref:typename:u32
jrliodnr	include/fsl_sec.h	/^	} jrliodnr[4];$/;"	m	struct:ccsr_sec	typeref:struct:ccsr_sec::__anonc0d8802d0408[4]
jrnl_blk_idx	fs/ext4/ext4_journal.c	/^int jrnl_blk_idx;$/;"	v	typeref:typename:int
jrsta	include/fsl_sec.h	/^	u32 jrsta;$/;"	m	struct:jr_regs	typeref:typename:u32
jrstartr	include/fsl_sec.h	/^	u32	jrstartr;	\/* Job Ring Start Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
jt	examples/standalone/stubs.c	/^static struct jt_funcs *jt;$/;"	v	typeref:struct:jt_funcs *	file:
jt	examples/standalone/stubs.c	/^static void **jt;$/;"	v	typeref:typename:void **	file:
jt	include/asm-generic/global_data.h	/^	struct jt_funcs *jt;		\/* jump table *\/$/;"	m	struct:global_data	typeref:struct:jt_funcs *
jt_funcs	include/exports.h	/^struct jt_funcs {$/;"	s
jtag_con	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	jtag_con;$/;"	m	struct:exynos4_sysreg	typeref:typename:unsigned int
jtag_get_tdo	include/lattice.h	/^	Lattice_jtag_get_tdo	jtag_get_tdo;$/;"	m	struct:__anon773a64540508	typeref:typename:Lattice_jtag_get_tdo
jtag_getc	arch/blackfin/cpu/jtag-console.c	/^static int jtag_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
jtag_id	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^	u16	jtag_id;	\/* Used to determine OMAP type *\/$/;"	m	struct:omap_id	typeref:typename:u16	file:
jtag_init	include/lattice.h	/^	Lattice_jtag_init	jtag_init;$/;"	m	struct:__anon773a64540508	typeref:typename:Lattice_jtag_init
jtag_mode	include/xilinx.h	/^	jtag_mode,		\/* jtag\/tap serial (not used ) *\/$/;"	e	enum:__anon15c234ca0103
jtag_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux jtag_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
jtag_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux jtag_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
jtag_putc	arch/blackfin/cpu/jtag-console.c	/^static void jtag_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void	file:
jtag_puts	arch/blackfin/cpu/jtag-console.c	/^static void jtag_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
jtag_sel	board/freescale/p2041rdb/cpld.h	/^	u8 jtag_sel;		\/* 0x8 - JTAG or AURORA Selection *\/$/;"	m	struct:cpld_data	typeref:typename:u8
jtag_send	arch/blackfin/cpu/jtag-console.c	/^static void jtag_send(const char *raw_str, uint32_t len)$/;"	f	typeref:typename:void	file:
jtag_serial_init	arch/blackfin/cpu/jtag-console.c	/^int jtag_serial_init(void)$/;"	f	typeref:typename:int
jtag_serial_setbrg	arch/blackfin/cpu/jtag-console.c	/^void jtag_serial_setbrg(void)$/;"	f	typeref:typename:void
jtag_set_tck	include/lattice.h	/^	Lattice_jtag_set_tck	jtag_set_tck;$/;"	m	struct:__anon773a64540508	typeref:typename:Lattice_jtag_set_tck
jtag_set_tdi	include/lattice.h	/^	Lattice_jtag_set_tdi	jtag_set_tdi;$/;"	m	struct:__anon773a64540508	typeref:typename:Lattice_jtag_set_tdi
jtag_set_tms	include/lattice.h	/^	Lattice_jtag_set_tms	jtag_set_tms;$/;"	m	struct:__anon773a64540508	typeref:typename:Lattice_jtag_set_tms
jtag_tstc	arch/blackfin/cpu/jtag-console.c	/^static int jtag_tstc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
jtag_tstc_dbg	arch/blackfin/cpu/jtag-console.c	/^static int jtag_tstc_dbg(void)$/;"	f	typeref:typename:int	file:
jtag_uart	arch/nios2/dts/10m50_devboard.dts	/^		jtag_uart: serial@18001530 {$/;"	l	label:sopc0
jtag_uart	arch/nios2/dts/3c120_devboard.dts	/^			jtag_uart: serial@0x4d50 {$/;"	l	label:pb_cpu_to_io
jtag_write_emudat	arch/blackfin/cpu/jtag-console.c	/^static bool jtag_write_emudat(uint32_t emudat)$/;"	f	typeref:typename:bool	file:
jtagid	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 jtagid;		\/* 0x50 *\/$/;"	m	struct:siu	typeref:typename:u32
jtagid	include/mpc5xxx.h	/^	volatile u32	jtagid;		\/* 0x0000 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
jump	arch/x86/include/asm/bootparam.h	/^	__u16	jump;$/;"	m	struct:setup_header	typeref:typename:__u16
jump	tools/mxsimage.h	/^	} jump;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960908
jump_board_init_r	arch/sparc/cpu/leon2/start.S	/^jump_board_init_r:$/;"	l
jump_board_init_r	arch/sparc/cpu/leon3/start.S	/^jump_board_init_r:$/;"	l
jump_key	scripts/kconfig/expr.h	/^struct jump_key {$/;"	s
jump_to_P2	arch/sh/cpu/sh3/cache.c	/^#define jump_to_P2(/;"	d	file:
jump_to_P2	arch/sh/cpu/sh4/cache.c	/^#define jump_to_P2(/;"	d	file:
jump_to_P2	arch/sh/include/asm/system.h	/^#define jump_to_P2(/;"	d
jump_to_copy	common/board_f.c	/^static int jump_to_copy(void)$/;"	f	typeref:typename:int	file:
jump_to_image_linux	arch/arm/lib/spl.c	/^void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)$/;"	f	typeref:typename:void __noreturn
jump_to_image_linux	arch/microblaze/cpu/spl.c	/^void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)$/;"	f	typeref:typename:void __noreturn
jump_to_image_linux	arch/powerpc/lib/spl.c	/^void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)$/;"	f	typeref:typename:void __noreturn
jump_to_image_no_args	arch/arm/cpu/armv7/omap-common/boot-common.c	/^void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)$/;"	f	typeref:typename:void __noreturn
jump_to_image_no_args	arch/arm/mach-tegra/spl.c	/^void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)$/;"	f	typeref:typename:void __noreturn
jump_to_image_no_args	board/freescale/common/fsl_chain_of_trust.c	/^void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)$/;"	f	typeref:typename:void __noreturn
jump_to_image_no_args	common/spl/spl.c	/^__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)$/;"	f	typeref:typename:__weak void __noreturn
jump_to_uboot	lib/efi/efi_stub.c	/^static void jump_to_uboot(ulong cs32, ulong addr, ulong info)$/;"	f	typeref:typename:void	file:
jumped_fname	arch/sandbox/include/asm/state.h	/^	const char *jumped_fname;	\/* Jumped from previous U_Boot *\/$/;"	m	struct:sandbox_state	typeref:typename:const char *
jumptable_init	common/exports.c	/^void jumptable_init(void)$/;"	f	typeref:typename:void
k0	arch/mips/include/asm/regdef.h	/^#define k0	/;"	d
k0	lib/bzip2/bzlib_private.h	/^      Int32    k0;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
k1	arch/mips/include/asm/regdef.h	/^#define k1	/;"	d
k2g_evm_pin_cfg	board/ti/ks2_evm/mux-k2g.h	/^struct pin_cfg k2g_evm_pin_cfg[] = {$/;"	v	typeref:struct:pin_cfg[]
k2g_mux_config	board/ti/ks2_evm/mux-k2g.h	/^void k2g_mux_config(void)$/;"	f	typeref:typename:void
k2g_reset_mux_config	board/ti/ks2_evm/board_k2g.c	/^static void k2g_reset_mux_config(void)$/;"	f	typeref:typename:void	file:
k4s561632E	board/cm5200/cm5200.h	/^static mem_conf_t k4s561632E = {$/;"	v	typeref:typename:mem_conf_t
kAlignTableSize	lib/lzma/LzmaDec.c	/^#define kAlignTableSize /;"	d	file:
kBitModelTotal	lib/lzma/LzmaDec.c	/^#define kBitModelTotal /;"	d	file:
kEndPosModelIndex	lib/lzma/LzmaDec.c	/^#define kEndPosModelIndex /;"	d	file:
kLenNumHighBits	lib/lzma/LzmaDec.c	/^#define kLenNumHighBits /;"	d	file:
kLenNumHighSymbols	lib/lzma/LzmaDec.c	/^#define kLenNumHighSymbols /;"	d	file:
kLenNumLowBits	lib/lzma/LzmaDec.c	/^#define kLenNumLowBits /;"	d	file:
kLenNumLowSymbols	lib/lzma/LzmaDec.c	/^#define kLenNumLowSymbols /;"	d	file:
kLenNumMidBits	lib/lzma/LzmaDec.c	/^#define kLenNumMidBits /;"	d	file:
kLenNumMidSymbols	lib/lzma/LzmaDec.c	/^#define kLenNumMidSymbols /;"	d	file:
kMatchMinLen	lib/lzma/LzmaDec.c	/^#define kMatchMinLen /;"	d	file:
kMatchSpecLenStart	lib/lzma/LzmaDec.c	/^#define kMatchSpecLenStart /;"	d	file:
kNumAlignBits	lib/lzma/LzmaDec.c	/^#define kNumAlignBits /;"	d	file:
kNumBitModelTotalBits	lib/lzma/LzmaDec.c	/^#define kNumBitModelTotalBits /;"	d	file:
kNumFullDistances	lib/lzma/LzmaDec.c	/^#define kNumFullDistances /;"	d	file:
kNumLenProbs	lib/lzma/LzmaDec.c	/^#define kNumLenProbs /;"	d	file:
kNumLenToPosStates	lib/lzma/LzmaDec.c	/^#define kNumLenToPosStates /;"	d	file:
kNumLitStates	lib/lzma/LzmaDec.c	/^#define kNumLitStates /;"	d	file:
kNumMoveBits	lib/lzma/LzmaDec.c	/^#define kNumMoveBits /;"	d	file:
kNumPosBitsMax	lib/lzma/LzmaDec.c	/^#define kNumPosBitsMax /;"	d	file:
kNumPosSlotBits	lib/lzma/LzmaDec.c	/^#define kNumPosSlotBits /;"	d	file:
kNumPosStatesMax	lib/lzma/LzmaDec.c	/^#define kNumPosStatesMax /;"	d	file:
kNumStates	lib/lzma/LzmaDec.c	/^#define kNumStates /;"	d	file:
kNumTopBits	lib/lzma/LzmaDec.c	/^#define kNumTopBits /;"	d	file:
kPREC_UF1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define kPREC_UF1	/;"	d
kStartPosModelIndex	lib/lzma/LzmaDec.c	/^#define kStartPosModelIndex /;"	d	file:
kTopValue	lib/lzma/LzmaDec.c	/^#define kTopValue /;"	d	file:
k_data_char	cmd/load.c	/^static void k_data_char(char new_char)$/;"	f	typeref:typename:void	file:
k_data_escape	cmd/load.c	/^static int k_data_escape, k_data_escape_saved;$/;"	v	typeref:typename:int	file:
k_data_escape_saved	cmd/load.c	/^static int k_data_escape, k_data_escape_saved;$/;"	v	typeref:typename:int	file:
k_data_init	cmd/load.c	/^static void k_data_init(void)$/;"	f	typeref:typename:void	file:
k_data_restore	cmd/load.c	/^static void k_data_restore(void)$/;"	f	typeref:typename:void	file:
k_data_save	cmd/load.c	/^static void k_data_save(void)$/;"	f	typeref:typename:void	file:
k_dir_id	fs/reiserfs/reiserfs_private.h	/^  __u32 k_dir_id;$/;"	m	struct:fsys_reiser_fileinfo	typeref:typename:__u32
k_dir_id	fs/reiserfs/reiserfs_private.h	/^  __u32 k_dir_id;$/;"	m	struct:key	typeref:typename:__u32
k_dsm	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int k_dsm;		\/* k value of delta signal modulator *\/$/;"	m	struct:set_epll_con_val	typeref:typename:unsigned int
k_menu_items	scripts/kconfig/nconf.c	/^static struct mitem k_menu_items[MAX_MENU_ITEMS];$/;"	v	typeref:struct:mitem[]	file:
k_objectid	fs/reiserfs/reiserfs_private.h	/^  __u32 k_objectid;$/;"	m	struct:fsys_reiser_fileinfo	typeref:typename:__u32
k_objectid	fs/reiserfs/reiserfs_private.h	/^  __u32 k_objectid;$/;"	m	struct:key	typeref:typename:__u32
k_offset	fs/reiserfs/reiserfs_private.h	/^	    __u64 k_offset:60;$/;"	m	struct:offset_v2	typeref:typename:__u64:60
k_offset	fs/reiserfs/reiserfs_private.h	/^  __u32 k_offset;$/;"	m	struct:offset_v1	typeref:typename:__u32
k_recv	cmd/load.c	/^static int k_recv(void)$/;"	f	typeref:typename:int	file:
k_sigaction	arch/powerpc/include/asm/signal.h	/^struct k_sigaction {$/;"	s
k_type	fs/reiserfs/reiserfs_private.h	/^	    __u64 k_type: 4;$/;"	m	struct:offset_v2	typeref:typename:__u64:4
k_uniqueness	fs/reiserfs/reiserfs_private.h	/^  __u32 k_uniqueness;$/;"	m	struct:offset_v1	typeref:typename:__u32
kb9202_nand_hwcontrol	drivers/mtd/nand/kb9202_nand.c	/^static void kb9202_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
kb9202_nand_ready	drivers/mtd/nand/kb9202_nand.c	/^static int kb9202_nand_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
kb_wait	board/mpl/common/kbd.c	/^int kb_wait(void)$/;"	f	typeref:typename:int
kb_wait	drivers/input/pc_keyb.c	/^static int kb_wait(void)$/;"	f	typeref:typename:int	file:
kbc	drivers/input/tegra-kbc.c	/^	struct kbc_tegra *kbc;		\/* tegra keyboard controller *\/$/;"	m	struct:tegra_kbd_priv	typeref:struct:kbc_tegra *	file:
kbc_tegra	include/tegra-kbc.h	/^struct kbc_tegra {$/;"	s
kbd	include/image.h	/^	bd_t		*kbd;$/;"	m	struct:bootm_headers	typeref:typename:bd_t *
kbd_addr	board/liebherr/lwmon5/kbd.c	/^static uchar kbd_addr = CONFIG_SYS_I2C_KEYBD_ADDR;$/;"	v	typeref:typename:uchar	file:
kbd_buffer	board/mpl/common/kbd.c	/^static volatile char kbd_buffer[KBD_BUFFER_LEN];$/;"	v	typeref:typename:volatile char[]	file:
kbd_cmd_read	drivers/input/i8042.c	/^static int kbd_cmd_read(int cmd)$/;"	f	typeref:typename:int	file:
kbd_cmd_write	drivers/input/i8042.c	/^static int kbd_cmd_write(int cmd, int data)$/;"	f	typeref:typename:int	file:
kbd_command_active	drivers/input/ps2mult.c	/^static int kbd_command_active = 0;$/;"	v	typeref:typename:int	file:
kbd_command_prefix	board/boundary/nitrogen6x/nitrogen6x.c	/^static char const kbd_command_prefix[] = "key_cmd";$/;"	v	typeref:typename:char const[]	file:
kbd_command_prefix	board/liebherr/lwmon5/kbd.c	/^static uchar kbd_command_prefix[] = "key_cmd";$/;"	v	typeref:typename:uchar[]	file:
kbd_controller_present	drivers/input/i8042.c	/^static int kbd_controller_present(void)$/;"	f	typeref:typename:int	file:
kbd_ctrl_xlate	board/mpl/common/kbd.c	/^static unsigned char kbd_ctrl_xlate[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_ctrl_xlate	drivers/input/input.c	/^static unsigned char kbd_ctrl_xlate[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_entry	drivers/input/input.c	/^static struct kbd_entry {$/;"	s	file:
kbd_entry	drivers/input/input.c	/^} kbd_entry[] = {$/;"	v	typeref:struct:kbd_entry[]
kbd_getc	board/mpl/common/kbd.c	/^int kbd_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int
kbd_getc	drivers/input/keyboard.c	/^static int kbd_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
kbd_id_table	common/usb_kbd.c	/^static const struct usb_device_id kbd_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
kbd_init	board/liebherr/lwmon5/kbd.c	/^static void kbd_init (void)$/;"	f	typeref:typename:void	file:
kbd_init	drivers/input/keyboard.c	/^int kbd_init (void)$/;"	f	typeref:typename:int
kbd_init_hw	drivers/input/pc_keyb.c	/^int kbd_init_hw(void)$/;"	f	typeref:typename:int
kbd_initialize	board/mpl/common/kbd.c	/^char * kbd_initialize(void)$/;"	f	typeref:typename:char *
kbd_initialize	drivers/input/pc_keyb.c	/^static char * kbd_initialize(void)$/;"	f	typeref:typename:char *	file:
kbd_input_empty	drivers/input/i8042.c	/^static int kbd_input_empty(void)$/;"	f	typeref:typename:int	file:
kbd_interrupt	board/mpl/common/kbd.c	/^void kbd_interrupt(void)$/;"	f	typeref:typename:void
kbd_interrupt	drivers/input/pc_keyb.c	/^static void kbd_interrupt(void *dev_id)$/;"	f	typeref:typename:void	file:
kbd_magic_prefix	board/boundary/nitrogen6x/nitrogen6x.c	/^static char const kbd_magic_prefix[] = "key_magic";$/;"	v	typeref:typename:char const[]	file:
kbd_magic_prefix	board/liebherr/lwmon5/kbd.c	/^static uchar kbd_magic_prefix[] = "key_magic";$/;"	v	typeref:typename:uchar[]	file:
kbd_mask	drivers/input/input.c	/^	int kbd_mask;		\/* Which languages this is for *\/$/;"	m	struct:kbd_entry	typeref:typename:int	file:
kbd_mask	drivers/input/input.c	/^enum kbd_mask {$/;"	g	file:
kbd_output_full	drivers/input/i8042.c	/^static int kbd_output_full(void)$/;"	f	typeref:typename:int	file:
kbd_plain_xlate	board/mpl/common/kbd.c	/^static unsigned char kbd_plain_xlate[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_plain_xlate	drivers/input/input.c	/^static const uchar kbd_plain_xlate[] = {$/;"	v	typeref:typename:const uchar[]	file:
kbd_plain_xlate_german	drivers/input/input.c	/^static const uchar kbd_plain_xlate_german[] = {$/;"	v	typeref:typename:const uchar[]	file:
kbd_put_queue	board/mpl/common/kbd.c	/^void kbd_put_queue(char data)$/;"	f	typeref:typename:void
kbd_read	drivers/input/i8042.c	/^static int kbd_read(int reg)$/;"	f	typeref:typename:int	file:
kbd_read_data	board/mpl/common/kbd.c	/^int kbd_read_data(void)$/;"	f	typeref:typename:int
kbd_read_data	drivers/input/pc_keyb.c	/^static int kbd_read_data(void)$/;"	f	typeref:typename:int	file:
kbd_read_input	board/mpl/common/kbd.c	/^unsigned char kbd_read_input(void)$/;"	f	typeref:typename:unsigned char
kbd_read_input	include/ps2mult.h	/^#define kbd_read_input(/;"	d
kbd_read_keys	drivers/input/keyboard.c	/^static int kbd_read_keys(struct input_config *config)$/;"	f	typeref:typename:int	file:
kbd_read_status	board/mpl/common/kbd.c	/^unsigned char kbd_read_status(void)$/;"	f	typeref:typename:unsigned char
kbd_read_status	include/ps2mult.h	/^#define kbd_read_status(/;"	d
kbd_request_irq	include/ps2mult.h	/^#define kbd_request_irq(/;"	d
kbd_request_region	include/ps2mult.h	/^#define kbd_request_region(/;"	d
kbd_reset	drivers/input/i8042.c	/^static int kbd_reset(int quirk)$/;"	f	typeref:typename:int	file:
kbd_right_alt_xlate_german	drivers/input/input.c	/^static unsigned char kbd_right_alt_xlate_german[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_scan_code	drivers/input/input.c	/^	int kbd_scan_code;$/;"	m	struct:__anon5f1be7330208	typeref:typename:int	file:
kbd_send_data	board/mpl/common/kbd.c	/^void kbd_send_data(unsigned char data)$/;"	f	typeref:typename:void
kbd_send_data	drivers/input/pc_keyb.c	/^static void kbd_send_data(unsigned char data)$/;"	f	typeref:typename:void	file:
kbd_set_leds	board/mpl/common/kbd.c	/^void kbd_set_leds(void)$/;"	f	typeref:typename:void
kbd_shift_xlate	board/mpl/common/kbd.c	/^static unsigned char kbd_shift_xlate[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_shift_xlate	drivers/input/input.c	/^static unsigned char kbd_shift_xlate[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_shift_xlate_german	drivers/input/input.c	/^static unsigned char kbd_shift_xlate_german[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kbd_status	arch/powerpc/include/asm/global_data.h	/^	unsigned long kbd_status;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
kbd_testc	board/mpl/common/kbd.c	/^int kbd_testc(struct stdio_dev *dev)$/;"	f	typeref:typename:int
kbd_testc	drivers/input/keyboard.c	/^static int kbd_testc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
kbd_testc_tms	common/usb_kbd.c	/^static unsigned long __maybe_unused kbd_testc_tms;$/;"	v	typeref:typename:unsigned long __maybe_unused	file:
kbd_to_ansi364	drivers/input/input.c	/^} kbd_to_ansi364[] = {$/;"	v	typeref:struct:__anon5f1be7330208[]
kbd_wait_for_fifo_init	drivers/input/tegra-kbc.c	/^static void kbd_wait_for_fifo_init(struct tegra_kbd_priv *priv)$/;"	f	typeref:typename:void	file:
kbd_wait_for_input	board/mpl/common/kbd.c	/^int kbd_wait_for_input(void)$/;"	f	typeref:typename:int
kbd_wait_for_input	drivers/input/pc_keyb.c	/^static int kbd_wait_for_input(void)$/;"	f	typeref:typename:int	file:
kbd_write	drivers/input/i8042.c	/^static int kbd_write(int reg, int value)$/;"	f	typeref:typename:int	file:
kbd_write_command	board/mpl/common/kbd.c	/^void kbd_write_command(unsigned char cmd)$/;"	f	typeref:typename:void
kbd_write_command	include/ps2mult.h	/^#define kbd_write_command(/;"	d
kbd_write_command_w	board/mpl/common/kbd.c	/^void kbd_write_command_w(int data)$/;"	f	typeref:typename:void
kbd_write_command_w	drivers/input/pc_keyb.c	/^static void kbd_write_command_w(int data)$/;"	f	typeref:typename:void	file:
kbd_write_output	board/mpl/common/kbd.c	/^void kbd_write_output(unsigned char data)$/;"	f	typeref:typename:void
kbd_write_output	include/ps2mult.h	/^#define kbd_write_output(/;"	d
kbd_write_output_w	board/mpl/common/kbd.c	/^void kbd_write_output_w(int data)$/;"	f	typeref:typename:void
kbd_write_output_w	drivers/input/pc_keyb.c	/^static void kbd_write_output_w(int data)$/;"	f	typeref:typename:void	file:
kcalloc	include/linux/compat.h	/^static inline void *kcalloc(size_t n, size_t size, gfp_t flags)$/;"	f	typeref:typename:void *
kconf_id	scripts/kconfig/lkc.h	/^struct kconf_id {$/;"	s
kconf_id_hash	scripts/kconfig/zconf.hash.c	/^kconf_id_hash (register const char *str, register unsigned int len)$/;"	f	typeref:typename:unsigned int	file:
kconf_id_lookup	scripts/kconfig/zconf.hash.c	/^kconf_id_lookup (register const char *str, register unsigned int len)$/;"	f	typeref:typename:const struct kconf_id *
kconf_id_strings	scripts/kconfig/zconf.hash.c	/^#define kconf_id_strings /;"	d	file:
kconf_id_strings_contents	scripts/kconfig/zconf.hash.c	/^static const struct kconf_id_strings_t kconf_id_strings_contents =$/;"	v	typeref:typename:const struct kconf_id_strings_t	file:
kconf_id_strings_str12	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str12[sizeof("def_tristate")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str13	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str13[sizeof("def_bool")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str14	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str14[sizeof("defconfig_list")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str17	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str17[sizeof("on")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str18	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str18[sizeof("optional")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str2	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str2[sizeof("if")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str21	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str21[sizeof("option")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str22	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str22[sizeof("endmenu")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str23	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str23[sizeof("mainmenu")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str25	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str25[sizeof("menuconfig")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str27	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str27[sizeof("modules")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str28	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str28[sizeof("allnoconfig_y")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str29	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str29[sizeof("menu")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str3	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str3[sizeof("int")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str31	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str31[sizeof("select")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str32	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str32[sizeof("comment")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str33	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str33[sizeof("env")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str35	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str35[sizeof("range")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str36	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str36[sizeof("choice")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str39	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str39[sizeof("bool")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str41	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str41[sizeof("source")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str42	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str42[sizeof("visible")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str43	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str43[sizeof("hex")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str46	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str46[sizeof("config")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str47	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str47[sizeof("boolean")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str5	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str5[sizeof("endif")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str51	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str51[sizeof("string")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str54	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str54[sizeof("help")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str56	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str56[sizeof("prompt")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str7	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str7[sizeof("default")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str72	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str72[sizeof("depends")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str8	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str8[sizeof("tristate")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_str9	scripts/kconfig/zconf.hash.c	/^    char kconf_id_strings_str9[sizeof("endchoice")];$/;"	m	struct:kconf_id_strings_t	typeref:typename:char[]	file:
kconf_id_strings_t	scripts/kconfig/zconf.hash.c	/^struct kconf_id_strings_t$/;"	s	file:
kconfig_print_comment	scripts/kconfig/confdata.c	/^kconfig_print_comment(FILE *fp, const char *value, void *arg)$/;"	f	typeref:typename:void	file:
kconfig_print_symbol	scripts/kconfig/confdata.c	/^kconfig_print_symbol(FILE *fp, struct symbol *sym, const char *value, void *arg)$/;"	f	typeref:typename:void	file:
kconfig_printer_cb	scripts/kconfig/confdata.c	/^static struct conf_printer kconfig_printer_cb =$/;"	v	typeref:struct:conf_printer	file:
kcp_mask	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	kcp_mask:10;	\/* KCP\/CPCON MASK *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:10
kcp_shift	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	kcp_shift:5;	\/* KCP\/cpcon SHIFT *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:5
kdebug	common/kgdb.c	/^static int kdebug = 1;$/;"	v	typeref:typename:int	file:
kdr1	arch/m68k/include/asm/coldfire/skha.h	/^	u32 kdr1;		\/* 0x30 Key Data 1  *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kdr2	arch/m68k/include/asm/coldfire/skha.h	/^	u32 kdr2;		\/* 0x34 Key Data 2 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kdr3	arch/m68k/include/asm/coldfire/skha.h	/^	u32 kdr3;		\/* 0x38 Key Data 3 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kdr4	arch/m68k/include/asm/coldfire/skha.h	/^	u32 kdr4;		\/* 0x3C Key Data 4 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kdr5	arch/m68k/include/asm/coldfire/skha.h	/^	u32 kdr5;		\/* 0x40 Key Data 5 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kdr6	arch/m68k/include/asm/coldfire/skha.h	/^	u32 kdr6;		\/* 0x44 Key Data 6 *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kdwc3_irq_regs	drivers/usb/host/xhci-keystone.c	/^struct kdwc3_irq_regs {$/;"	s	file:
keep_config	drivers/mtd/nand/pxa3xx_nand.h	/^	int	keep_config;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:int
keepcost	include/malloc.h	/^  int keepcost; \/* top-most, releasable (via malloc_trim) space *\/$/;"	m	struct:mallinfo	typeref:typename:int
kern	drivers/video/stb_truetype.h	/^   int loca,head,glyf,hhea,hmtx,kern; \/\/ table locations as offset from start of .ttf$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
kernaddr	board/nokia/rx51/lowlevel_init.S	/^kernaddr:		\/* address of kernel after copying *\/$/;"	l
kernel	cmd/pxe.c	/^	char *kernel;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
kernel_addr	include/android_image.h	/^	u32 kernel_addr;	\/* physical load addr *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
kernel_alignment	arch/x86/include/asm/bootparam.h	/^	__u32	kernel_alignment;$/;"	m	struct:setup_header	typeref:typename:__u32
kernel_arg_promvec	arch/sparc/lib/bootm.c	/^struct linux_romvec *kernel_arg_promvec;$/;"	v	typeref:struct:linux_romvec *
kernel_entry_t	arch/mips/lib/bootm.c	/^	typedef void __noreturn (*kernel_entry_t)(int, ulong, ulong, ulong);$/;"	t	function:boot_jump_linux	typeref:typename:void __noreturn (*)(int,ulong,ulong,ulong)	file:
kernel_file_name	arch/sparc/include/asm/prom.h	/^	char *kernel_file_name;$/;"	m	struct:linux_arguments_v0	typeref:typename:char *
kernel_magic_ok	arch/x86/lib/zimage.c	/^static int kernel_magic_ok(struct setup_header *hdr)$/;"	f	typeref:typename:int	file:
kernel_mode	arch/microblaze/include/asm/ptrace.h	/^	microblaze_reg_t kernel_mode;	\/* 1 if in `kernel mode', 0 if user mode *\/$/;"	m	struct:pt_regs	typeref:typename:microblaze_reg_t
kernel_param	include/linux/compat.h	/^struct kernel_param { int i; };$/;"	s
kernel_size	include/android_image.h	/^	u32 kernel_size;	\/* size in bytes *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
kernel_stack_pointer	arch/mips/include/asm/ptrace.h	/^static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)$/;"	f	typeref:typename:unsigned long
kernel_version	arch/x86/include/asm/bootparam.h	/^	__u16	kernel_version;$/;"	m	struct:setup_header	typeref:typename:__u16
kernel_versions	drivers/tpm/tpm_tis_sandbox.c	/^	uint32_t kernel_versions;$/;"	m	struct:rollback_space_kernel	typeref:typename:uint32_t	file:
kernoffs	board/nokia/rx51/lowlevel_init.S	/^kernoffs:		\/* offset of kernel image in loaded u-boot *\/$/;"	l
kernsize	board/nokia/rx51/lowlevel_init.S	/^kernsize:		\/* maximal size of kernel image *\/$/;"	l
kernsrctree	scripts/docproc.c	/^static char *srctree, *kernsrctree;$/;"	v	typeref:typename:char *	file:
key	arch/x86/include/asm/me_common.h	/^	u32 key[8];$/;"	m	struct:mbp_platform_key	typeref:typename:u32[8]
key	board/imgtec/malta/superio.c	/^	u8 key;$/;"	m	struct:__anon9f50c37a0108	typeref:typename:u8	file:
key	cmd/bootmenu.c	/^	char key[3];			\/* key identifier of number *\/$/;"	m	struct:bootmenu_entry	typeref:typename:char[3]	file:
key	common/menu.c	/^	char *key;$/;"	m	struct:menu_item	typeref:typename:char *	file:
key	disk/part_iso.h	/^	unsigned char key[2];				\/* key[0]=55, key[1]=0xAA *\/$/;"	m	struct:iso_val_entry	typeref:typename:unsigned char[2]
key	drivers/mtd/pic32_flash.c	/^	struct pic32_reg_atomic key;$/;"	m	struct:pic32_reg_nvm	typeref:struct:pic32_reg_atomic	file:
key	drivers/mtd/stm32_flash.h	/^	u32 key;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
key	drivers/serial/serial_efi.c	/^	struct efi_input_key key;$/;"	m	struct:serial_efi_priv	typeref:struct:efi_input_key	file:
key	fs/reiserfs/reiserfs_private.h	/^struct key$/;"	s
key	fs/ubifs/replay.c	/^	union ubifs_key key;$/;"	m	struct:replay_entry	typeref:union:ubifs_key	file:
key	fs/ubifs/ubifs-media.h	/^	__u8 key[UBIFS_MAX_KEY_LEN];$/;"	m	struct:ubifs_data_node	typeref:typename:__u8[]
key	fs/ubifs/ubifs-media.h	/^	__u8 key[UBIFS_MAX_KEY_LEN];$/;"	m	struct:ubifs_dent_node	typeref:typename:__u8[]
key	fs/ubifs/ubifs-media.h	/^	__u8 key[UBIFS_MAX_KEY_LEN];$/;"	m	struct:ubifs_ino_node	typeref:typename:__u8[]
key	fs/ubifs/ubifs-media.h	/^	__u8 key[];$/;"	m	struct:ubifs_branch	typeref:typename:__u8[]
key	fs/ubifs/ubifs-media.h	/^	char key[];$/;"	m	struct:ubifs_branch	typeref:typename:char[]
key	fs/ubifs/ubifs.h	/^	union ubifs_key key;$/;"	m	struct:bu_info	typeref:union:ubifs_key
key	fs/ubifs/ubifs.h	/^	union ubifs_key key;$/;"	m	struct:ubifs_scan_node	typeref:union:ubifs_key
key	fs/ubifs/ubifs.h	/^	union ubifs_key key;$/;"	m	struct:ubifs_zbranch	typeref:union:ubifs_key
key	include/linux/edd.h	/^	__u16 key;		\/* = 0xBEDD *\/$/;"	m	struct:edd_device_params	typeref:typename:__u16
key	include/search.h	/^	const char *key;$/;"	m	struct:entry	typeref:typename:const char *
key	scripts/kconfig/nconf.c	/^	function_key key;$/;"	m	struct:function_keys	typeref:typename:function_key	file:
key	tools/mxsimage.h	/^	uint8_t		key[SB_BLOCK_SIZE];$/;"	m	struct:sb_key_dictionary_key	typeref:typename:uint8_t[]
keyPressEvent	scripts/kconfig/qconf.cc	/^void ConfigLineEdit::keyPressEvent(QKeyEvent* e)$/;"	f	class:ConfigLineEdit	typeref:typename:void
keyPressEvent	scripts/kconfig/qconf.cc	/^void ConfigList::keyPressEvent(QKeyEvent* ev)$/;"	f	class:ConfigList	typeref:typename:void
key_block	fs/ubifs/key.h	/^static inline unsigned int key_block(const struct ubifs_info *c,$/;"	f	typeref:typename:unsigned int
key_block_flash	fs/ubifs/key.h	/^static inline unsigned int key_block_flash(const struct ubifs_info *c,$/;"	f	typeref:typename:unsigned int
key_code	board/nokia/rx51/tag_omap.h	/^	unsigned int key_code:24; \/* Linux key code *\/$/;"	m	struct:omap_gpio_switch_config	typeref:typename:unsigned int:24
key_cols	drivers/input/cros_ec_keyb.c	/^	int key_cols;			\/* Number of keyboard columns *\/$/;"	m	struct:cros_ec_keyb_priv	typeref:typename:int	file:
key_copy	fs/ubifs/key.h	/^static inline void key_copy(const struct ubifs_info *c,$/;"	f	typeref:typename:void
key_count	include/key_matrix.h	/^	int key_count;	\/* number of keys in the matrix (= rows * cols) *\/$/;"	m	struct:key_matrix	typeref:typename:int
key_count	tools/mxsimage.h	/^	uint16_t	key_count;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
key_dictionary_block	tools/mxsimage.h	/^	uint16_t	key_dictionary_block;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
key_fmt	fs/ubifs/ubifs-media.h	/^	__u8 key_fmt;$/;"	m	struct:ubifs_sb_node	typeref:typename:__u8
key_fmt	fs/ubifs/ubifs.h	/^	int key_fmt;$/;"	m	struct:ubifs_info	typeref:typename:int
key_hash	fs/ubifs/key.h	/^static inline uint32_t key_hash(const struct ubifs_info *c,$/;"	f	typeref:typename:uint32_t
key_hash	fs/ubifs/ubifs-media.h	/^	__u8 key_hash;$/;"	m	struct:ubifs_sb_node	typeref:typename:__u8
key_hash	fs/ubifs/ubifs.h	/^	uint32_t (*key_hash)(const char *str, int len);$/;"	m	struct:ubifs_info	typeref:typename:uint32_t (*)(const char * str,int len)
key_hash_flash	fs/ubifs/key.h	/^static inline uint32_t key_hash_flash(const struct ubifs_info *c, const void *k)$/;"	f	typeref:typename:uint32_t
key_hash_type	fs/ubifs/ubifs.h	/^	uint8_t key_hash_type;$/;"	m	struct:ubifs_info	typeref:typename:uint8_t
key_in_range	fs/ubifs/tnc.c	/^static int key_in_range(struct ubifs_info *c, union ubifs_key *key,$/;"	f	typeref:typename:int	file:
key_inum	fs/ubifs/key.h	/^static inline ino_t key_inum(const struct ubifs_info *c, const void *k)$/;"	f	typeref:typename:ino_t
key_inum_flash	fs/ubifs/key.h	/^static inline ino_t key_inum_flash(const struct ubifs_info *c, const void *k)$/;"	f	typeref:typename:ino_t
key_len	fs/ubifs/ubifs.h	/^	int key_len;$/;"	m	struct:ubifs_info	typeref:typename:int
key_len	include/fsl_validate.h	/^		u32 key_len;		\/* pub key length in bytes *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c030a	typeref:typename:u32
key_len	include/fsl_validate.h	/^	u32 key_len;$/;"	m	struct:fsl_secboot_img_priv	typeref:typename:u32
key_len	include/fsl_validate.h	/^	u32 key_len;$/;"	m	struct:ie_key_table	typeref:typename:u32
key_len	include/fsl_validate.h	/^	u32 key_len;$/;"	m	struct:srk_table	typeref:typename:u32
key_mask_hash	fs/ubifs/key.h	/^static inline uint32_t key_mask_hash(uint32_t hash)$/;"	f	typeref:typename:uint32_t
key_match	board/liebherr/lwmon5/kbd.c	/^static uchar *key_match (uchar *kbd_data)$/;"	f	typeref:typename:uchar *	file:
key_matrix	include/key_matrix.h	/^struct key_matrix {$/;"	s
key_matrix_decode	drivers/input/key_matrix.c	/^int key_matrix_decode(struct key_matrix *config, struct key_matrix_key keys[],$/;"	f	typeref:typename:int
key_matrix_decode_fdt	drivers/input/key_matrix.c	/^int key_matrix_decode_fdt(struct key_matrix *config, const void *blob, int node)$/;"	f	typeref:typename:int
key_matrix_init	drivers/input/key_matrix.c	/^int key_matrix_init(struct key_matrix *config, int rows, int cols,$/;"	f	typeref:typename:int
key_matrix_key	include/key_matrix.h	/^struct key_matrix_key {$/;"	s
key_max_inode_size	fs/ubifs/key.h	/^static inline unsigned long long key_max_inode_size(const struct ubifs_info *c)$/;"	f	typeref:typename:unsigned long long
key_pins_inet9f	arch/arm/dts/sun4i-a10-inet9f-rev03.dts	/^	key_pins_inet9f: key_pins@0 {$/;"	l
key_pins_pcduino	arch/arm/dts/sun4i-a10-pcduino.dts	/^	key_pins_pcduino: key_pins@0 {$/;"	l
key_pins_pcduino3	arch/arm/dts/sun7i-a20-pcduino3.dts	/^	key_pins_pcduino3: key_pins@0 {$/;"	l
key_pressed	board/samsung/common/misc.c	/^static int key_pressed(int key)$/;"	f	typeref:typename:int	file:
key_program	board/gdsys/p1022/controlcenterd-id.c	/^struct key_program {$/;"	s	file:
key_prop	include/u-boot/rsa-mod-exp.h	/^struct key_prop {$/;"	s
key_r5_hash	fs/ubifs/key.h	/^static inline uint32_t key_r5_hash(const char *s, int len)$/;"	f	typeref:typename:uint32_t
key_read	fs/ubifs/key.h	/^static inline void key_read(const struct ubifs_info *c, const void *from,$/;"	f	typeref:typename:void
key_revok	include/fsl_validate.h	/^	uint32_t key_revok;$/;"	m	struct:ie_key_info	typeref:typename:uint32_t
key_rows	drivers/input/cros_ec_keyb.c	/^	int key_rows;			\/* Number of keyboard rows *\/$/;"	m	struct:cros_ec_keyb_priv	typeref:typename:int	file:
key_str	scripts/kconfig/nconf.c	/^	const char *key_str;$/;"	m	struct:function_keys	typeref:typename:const char *	file:
key_t	include/linux/types.h	/^typedef __kernel_key_t		key_t;$/;"	t	typeref:typename:__kernel_key_t
key_test_hash	fs/ubifs/key.h	/^static inline uint32_t key_test_hash(const char *str, int len)$/;"	f	typeref:typename:uint32_t
key_type	fs/ubifs/key.h	/^static inline int key_type(const struct ubifs_info *c,$/;"	f	typeref:typename:int
key_type_flash	fs/ubifs/key.h	/^static inline int key_type_flash(const struct ubifs_info *c, const void *k)$/;"	f	typeref:typename:int
key_write	fs/ubifs/key.h	/^static inline void key_write(const struct ubifs_info *c,$/;"	f	typeref:typename:void
key_write_idx	fs/ubifs/key.h	/^static inline void key_write_idx(const struct ubifs_info *c,$/;"	f	typeref:typename:void
keyb_config0	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_config_descriptor keyb_config0 = {$/;"	v	typeref:struct:usb_config_descriptor	file:
keyb_desc_list	drivers/usb/emul/sandbox_keyb.c	/^static void *keyb_desc_list[] = {$/;"	v	typeref:typename:void * []	file:
keyb_device_desc	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_device_descriptor keyb_device_desc = {$/;"	v	typeref:struct:usb_device_descriptor	file:
keyb_endpoint0_in	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_endpoint_descriptor keyb_endpoint0_in = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
keyb_endpoint1_in	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_endpoint_descriptor keyb_endpoint1_in = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
keyb_handler	drivers/input/ps2mult.c	/^static void (*keyb_handler)(void *dev_id);$/;"	v	typeref:typename:void (*)(void * dev_id)	file:
keyb_interface0	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_interface_descriptor keyb_interface0 = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
keyb_interface1	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_interface_descriptor keyb_interface1 = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
keyb_report0	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_class_hid_descriptor keyb_report0 = {$/;"	v	typeref:struct:usb_class_hid_descriptor	file:
keyb_report1	drivers/usb/emul/sandbox_keyb.c	/^static struct usb_class_hid_descriptor keyb_report1 = {$/;"	v	typeref:struct:usb_class_hid_descriptor	file:
keyb_strings	drivers/usb/emul/sandbox_keyb.c	/^	struct usb_string keyb_strings[STRINGID_COUNT];$/;"	m	struct:sandbox_keyb_plat	typeref:struct:usb_string[]	file:
keyboard_get_ops	include/keyboard.h	/^#define keyboard_get_ops(/;"	d
keyboard_getc	drivers/input/keyboard-uclass.c	/^static int keyboard_getc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
keyboard_ops	include/keyboard.h	/^struct keyboard_ops {$/;"	s
keyboard_pre_probe	drivers/input/keyboard-uclass.c	/^static int keyboard_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
keyboard_priv	include/keyboard.h	/^struct keyboard_priv {$/;"	s
keyboard_start	drivers/input/keyboard-uclass.c	/^static int keyboard_start(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
keyboard_stop	drivers/input/keyboard-uclass.c	/^static int keyboard_stop(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
keyboard_tstc	drivers/input/keyboard-uclass.c	/^static int keyboard_tstc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
keybuf	board/nokia/rx51/rx51.c	/^static u8 keybuf[KEYBUF_SIZE];$/;"	v	typeref:typename:u8[]	file:
keybuf_head	board/nokia/rx51/rx51.c	/^static u8 keybuf_head;$/;"	v	typeref:typename:u8	file:
keybuf_tail	board/nokia/rx51/rx51.c	/^static u8 keybuf_tail;$/;"	v	typeref:typename:u8	file:
keyclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 keyclk_ctrl;	\/* Keyboard Scan Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
keycode	drivers/misc/cros_ec_sandbox.c	/^	int keycode;	\/* corresponding linux key code *\/$/;"	m	struct:ec_keymatrix_entry	typeref:typename:int	file:
keydest	tools/imagetool.h	/^	const char *keydest;	\/* Destination .dtb for public key *\/$/;"	m	struct:image_tool_params	typeref:typename:const char *
keydir	include/image.h	/^	const char *keydir;		\/* Directory conaining keys *\/$/;"	m	struct:image_sign_info	typeref:typename:const char *
keydir	tools/imagetool.h	/^	const char *keydir;	\/* Directory holding private keys *\/$/;"	m	struct:image_tool_params	typeref:typename:const char *
keymap	board/nokia/rx51/rx51.c	/^static const char keymap[] = {$/;"	v	typeref:typename:const char[]	file:
keyname	include/image.h	/^	const char *keyname;		\/* Name of key to use *\/$/;"	m	struct:image_sign_info	typeref:typename:const char *
keypad_clk	arch/arm/dts/sun7i-a20.dtsi	/^		keypad_clk: clk@01c200c4 {$/;"	l
keypad_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 keypad_clk_cfg;	\/* 0xc4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
keypad_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 keypad_clk_cfg;	\/* 0xc4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
keyr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 keyr;$/;"	m	struct:stm32_flash_bank_regs	typeref:typename:u32
keyr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 keyr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
keyr2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 keyr2;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
keys	arch/arm/dts/rk3288-evb.dtsi	/^	keys: gpio-keys {$/;"	l
keys	arch/arm/dts/rk3288-firefly.dtsi	/^	keys: gpio-keys {$/;"	l
keys	board/nokia/rx51/rx51.c	/^static u8 keys[8];$/;"	v	typeref:typename:u8[8]	file:
keys	scripts/kconfig/mconf.c	/^	int *keys;$/;"	m	struct:search_data	typeref:typename:int *	file:
keys_cmp	fs/ubifs/key.h	/^static inline int keys_cmp(const struct ubifs_info *c,$/;"	f	typeref:typename:int
keys_eq	fs/ubifs/key.h	/^static inline int keys_eq(const struct ubifs_info *c,$/;"	f	typeref:typename:int
keys_init	board/samsung/common/misc.c	/^void keys_init(void)$/;"	f	typeref:typename:void
keyscan	drivers/misc/cros_ec_sandbox.c	/^	uint8_t keyscan[KEYBOARD_COLS];$/;"	m	struct:ec_state	typeref:typename:uint8_t[]	file:
keyscan_read_fdt_matrix	drivers/misc/cros_ec_sandbox.c	/^static int keyscan_read_fdt_matrix(struct ec_state *ec, const void *blob,$/;"	f	typeref:typename:int	file:
keystone	drivers/usb/host/xhci-keystone.c	/^struct keystone_xhci keystone;$/;"	v	typeref:struct:keystone_xhci
keystone2_emac_initialize	drivers/net/keystone_net.c	/^int keystone2_emac_initialize(struct eth_priv_t *eth_priv)$/;"	f	typeref:typename:int
keystone2_eth_bcast_addr	drivers/net/keystone_net.c	/^static int keystone2_eth_bcast_addr(struct eth_device *dev, u32 ip, u8 set)$/;"	f	typeref:typename:int	file:
keystone2_eth_close	drivers/net/keystone_net.c	/^void keystone2_eth_close(struct eth_device *dev)$/;"	f	typeref:typename:void
keystone2_eth_gigabit_enable	drivers/net/keystone_net.c	/^	keystone2_eth_gigabit_enable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
keystone2_eth_gigabit_enable	drivers/net/keystone_net.c	/^	keystone2_eth_gigabit_enable(struct udevice *dev)$/;"	f	typeref:typename:void	file:
keystone2_eth_open	drivers/net/keystone_net.c	/^static int keystone2_eth_open(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
keystone2_eth_rcv_packet	drivers/net/keystone_net.c	/^static int keystone2_eth_rcv_packet(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
keystone2_eth_read_mac_addr	drivers/net/keystone_net.c	/^int keystone2_eth_read_mac_addr(struct eth_device *dev)$/;"	f	typeref:typename:int
keystone2_eth_send_packet	drivers/net/keystone_net.c	/^static int keystone2_eth_send_packet(struct eth_device *dev,$/;"	f	typeref:typename:int	file:
keystone2_mdio_read	drivers/net/keystone_net.c	/^static int keystone2_mdio_read(struct mii_dev *bus,$/;"	f	typeref:typename:int	file:
keystone2_mdio_reset	drivers/net/keystone_net.c	/^static int keystone2_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
keystone2_mdio_write	drivers/net/keystone_net.c	/^static int keystone2_mdio_write(struct mii_dev *bus,$/;"	f	typeref:typename:int	file:
keystone2_net_serdes_setup	drivers/net/keystone_net.c	/^static void keystone2_net_serdes_setup(void)$/;"	f	typeref:typename:void	file:
keystone_pll_regs	arch/arm/mach-keystone/clock.c	/^const struct keystone_pll_regs keystone_pll_regs[] = {$/;"	v	typeref:typename:const struct keystone_pll_regs[]
keystone_pll_regs	arch/arm/mach-keystone/include/mach/clock.h	/^struct keystone_pll_regs {$/;"	s
keystone_rgmii_config	drivers/net/keystone_net.c	/^int keystone_rgmii_config(struct phy_device *phy_dev)$/;"	f	typeref:typename:int
keystone_sgmii_config	drivers/net/keystone_net.c	/^int keystone_sgmii_config(struct phy_device *phy_dev, int port, int interface)$/;"	f	typeref:typename:int
keystone_xhci	drivers/usb/host/xhci-keystone.c	/^struct keystone_xhci {$/;"	s	file:
keystone_xhci_core_init	drivers/usb/host/xhci-keystone.c	/^static int keystone_xhci_core_init(struct dwc3 *dwc3_reg)$/;"	f	typeref:typename:int	file:
keystone_xhci_phy	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^struct keystone_xhci_phy {$/;"	s
keystone_xhci_phy_set	drivers/usb/host/xhci-keystone.c	/^static void keystone_xhci_phy_set(struct keystone_xhci_phy *phy)$/;"	f	typeref:typename:void	file:
keystone_xhci_phy_suspend	drivers/usb/host/xhci-keystone.c	/^static int keystone_xhci_phy_suspend(void)$/;"	f	typeref:typename:int	file:
keystone_xhci_phy_unset	drivers/usb/host/xhci-keystone.c	/^static void keystone_xhci_phy_unset(struct keystone_xhci_phy *phy)$/;"	f	typeref:typename:void	file:
keytchclkdiv	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t keytchclkdiv;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
keyword	cmd/ethsw.c	/^} keyword[] = {$/;"	v	typeref:struct:keyword_def[]
keyword_def	cmd/ethsw.c	/^struct keyword_def {$/;"	s	file:
keyword_function	cmd/ethsw.c	/^	int (*keyword_function)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:keywords_to_function	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)	file:
keyword_match_aggr	cmd/ethsw.c	/^static int keyword_match_aggr(enum ethsw_keyword_id key_id, int argc,$/;"	f	typeref:typename:int	file:
keyword_match_gen	cmd/ethsw.c	/^static int keyword_match_gen(enum ethsw_keyword_id key_id, int argc,$/;"	f	typeref:typename:int	file:
keyword_match_mac_addr	cmd/ethsw.c	/^static int keyword_match_mac_addr(enum ethsw_keyword_id key_id, int argc,$/;"	f	typeref:typename:int	file:
keyword_match_port	cmd/ethsw.c	/^static int keyword_match_port(enum ethsw_keyword_id key_id, int argc,$/;"	f	typeref:typename:int	file:
keyword_match_pvid	cmd/ethsw.c	/^static int keyword_match_pvid(enum ethsw_keyword_id key_id, int argc,$/;"	f	typeref:typename:int	file:
keyword_match_vlan	cmd/ethsw.c	/^static int keyword_match_vlan(enum ethsw_keyword_id key_id, int argc,$/;"	f	typeref:typename:int	file:
keyword_name	cmd/ethsw.c	/^	const char *keyword_name;$/;"	m	struct:keyword_def	typeref:typename:const char *	file:
keywords	cmd/pxe.c	/^static const struct token keywords[] = {$/;"	v	typeref:typename:const struct token[]	file:
keywords_find	cmd/ethsw.c	/^static int keywords_find(int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
keywords_optional	cmd/ethsw.c	/^struct keywords_optional {$/;"	s	file:
keywords_to_function	cmd/ethsw.c	/^static struct keywords_to_function {$/;"	s	file:
kfc_common_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_common_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_common_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_common_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_common_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_common_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_common_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_common_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core0_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core0_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core0_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core0_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core0_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core1_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core1_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core1_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core1_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core3_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core3_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core3_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core3_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core3_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core3_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_core3_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_core3_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_l2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_l2_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_l2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_l2_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_l2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_l2_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_l2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_l2_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfc_swreset_mask_from_eagle	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kfc_swreset_mask_from_eagle;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kfree	include/linux/compat.h	/^static inline void kfree(const void *block)$/;"	f	typeref:typename:void
kgdb_active	common/kgdb.c	/^static int kgdb_active;$/;"	v	typeref:typename:int	file:
kgdb_breakpoint	arch/blackfin/lib/kgdb.c	/^void kgdb_breakpoint(int argc, char * const argv[])$/;"	f	typeref:typename:void
kgdb_breakpoint	arch/powerpc/lib/kgdb.c	/^kgdb_breakpoint(int argc, char * const argv[])$/;"	f	typeref:typename:void
kgdb_data	include/kgdb.h	/^kgdb_data;$/;"	t	typeref:struct:__anon584037260208
kgdb_enter	arch/blackfin/lib/kgdb.c	/^void kgdb_enter(struct pt_regs *regs, kgdb_data *kdp)$/;"	f	typeref:typename:void
kgdb_enter	arch/powerpc/lib/kgdb.c	/^kgdb_enter(struct pt_regs *regs, kgdb_data *kdp)$/;"	f	typeref:typename:void
kgdb_error	common/kgdb.c	/^kgdb_error(int errnum)$/;"	f	typeref:typename:void
kgdb_exit	arch/blackfin/lib/kgdb.c	/^void kgdb_exit(struct pt_regs *regs, kgdb_data *kdp)$/;"	f	typeref:typename:void
kgdb_exit	arch/powerpc/lib/kgdb.c	/^kgdb_exit(struct pt_regs *regs, kgdb_data *kdp)$/;"	f	typeref:typename:void
kgdb_flush_cache_all	arch/powerpc/cpu/mpc8260/kgdb.S	/^kgdb_flush_cache_all:$/;"	l
kgdb_flush_cache_all	arch/powerpc/cpu/mpc8xx/kgdb.S	/^kgdb_flush_cache_all:$/;"	l
kgdb_flush_cache_all	arch/powerpc/cpu/ppc4xx/kgdb.S	/^kgdb_flush_cache_all:$/;"	l
kgdb_flush_cache_all	common/kgdb_stubs.c	/^void kgdb_flush_cache_all(void)$/;"	f	typeref:typename:void
kgdb_flush_cache_range	arch/powerpc/cpu/mpc8260/kgdb.S	/^kgdb_flush_cache_range:$/;"	l
kgdb_flush_cache_range	arch/powerpc/cpu/mpc8xx/kgdb.S	/^kgdb_flush_cache_range:$/;"	l
kgdb_flush_cache_range	arch/powerpc/cpu/ppc4xx/kgdb.S	/^kgdb_flush_cache_range:$/;"	l
kgdb_flush_cache_range	common/kgdb_stubs.c	/^void kgdb_flush_cache_range(void *from, void *to)$/;"	f	typeref:typename:void
kgdb_getregs	arch/blackfin/lib/kgdb.c	/^int kgdb_getregs(struct pt_regs *regs, char *buf, int max)$/;"	f	typeref:typename:int
kgdb_getregs	arch/powerpc/lib/kgdb.c	/^kgdb_getregs(struct pt_regs *regs, char *buf, int max)$/;"	f	typeref:typename:int
kgdb_init	common/kgdb.c	/^kgdb_init(void)$/;"	f	typeref:typename:void
kgdb_interruptible	arch/powerpc/cpu/mpc8260/serial_scc.c	/^kgdb_interruptible(int yes)$/;"	f	typeref:typename:void
kgdb_interruptible	arch/powerpc/cpu/mpc8260/serial_smc.c	/^kgdb_interruptible(int yes)$/;"	f	typeref:typename:void
kgdb_interruptible	arch/powerpc/cpu/mpc8xx/serial.c	/^kgdb_interruptible (int yes)$/;"	f	typeref:typename:void
kgdb_interruptible	common/kgdb_stubs.c	/^void kgdb_interruptible(int yes)$/;"	f	typeref:typename:void
kgdb_longjmp	arch/powerpc/lib/kgdb.c	/^kgdb_longjmp(long *buf, int val)$/;"	f	typeref:typename:void
kgdb_output_string	common/kgdb.c	/^kgdb_output_string (const char* s, unsigned int count)$/;"	f	typeref:typename:int
kgdb_putreg	arch/blackfin/lib/kgdb.c	/^void kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length)$/;"	f	typeref:typename:void
kgdb_putreg	arch/powerpc/lib/kgdb.c	/^kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length)$/;"	f	typeref:typename:void
kgdb_putregs	arch/blackfin/lib/kgdb.c	/^void kgdb_putregs(struct pt_regs *regs, char *buf, int length)$/;"	f	typeref:typename:void
kgdb_putregs	arch/powerpc/lib/kgdb.c	/^kgdb_putregs(struct pt_regs *regs, char *buf, int length)$/;"	f	typeref:typename:void
kgdb_reg	include/kgdb.h	/^kgdb_reg;$/;"	t	typeref:struct:__anon584037260108
kgdb_serial_init	arch/powerpc/cpu/mpc8260/serial_scc.c	/^kgdb_serial_init (void)$/;"	f	typeref:typename:void
kgdb_serial_init	arch/powerpc/cpu/mpc8260/serial_smc.c	/^kgdb_serial_init (void)$/;"	f	typeref:typename:void
kgdb_serial_init	arch/powerpc/cpu/mpc8xx/serial.c	/^kgdb_serial_init(void)$/;"	f	typeref:typename:void
kgdb_serial_init	common/kgdb_stubs.c	/^void kgdb_serial_init(void)$/;"	f	typeref:typename:void
kgdb_setjmp	arch/powerpc/lib/kgdb.c	/^kgdb_setjmp(long *buf)$/;"	f	typeref:typename:int
kgdb_trap	arch/blackfin/lib/kgdb.c	/^int kgdb_trap(struct pt_regs *regs)$/;"	f	typeref:typename:int
kgdb_trap	arch/powerpc/lib/kgdb.c	/^kgdb_trap(struct pt_regs *regs)$/;"	f	typeref:typename:int
kgid_t	include/linux/compat.h	/^} kgid_t;$/;"	t	typeref:struct:__anon481401f10208
kick0	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	kick0;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
kick0r	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	kick0r;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
kick1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	kick1;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
kick1r	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	kick1r; \/* 0x70 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
kick_secondary_cpus_gic	arch/arm/cpu/armv7/virt-v7.c	/^static void kick_secondary_cpus_gic(unsigned long gicdaddr)$/;"	f	typeref:typename:void	file:
kick_trng	drivers/crypto/fsl/jr.c	/^static void kick_trng(int ent_delay, uint8_t sec_idx)$/;"	f	typeref:typename:void	file:
kill	test/py/u_boot_console_sandbox.py	/^    def kill(self, sig):$/;"	m	class:ConsoleSandbox
kill	test/py/u_boot_spawn.py	/^    def kill(self, sig):$/;"	m	class:Spawn
kill_orphans	fs/ubifs/orphan.c	/^static int kill_orphans(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
kill_sb	fs/ubifs/ubifs.h	/^	void (*kill_sb) (struct super_block *);$/;"	m	struct:file_system_type	typeref:typename:void (*)(struct super_block *)
kill_ubifs_super	fs/ubifs/super.c	/^static void kill_ubifs_super(struct super_block *s)$/;"	f	typeref:typename:void	file:
kill_volumes	drivers/mtd/ubi/build.c	/^static void kill_volumes(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
killer_pattern_32b	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 killer_pattern_32b[DQ_NUM][LEN_KILLER_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[DQ_NUM][LEN_KILLER_PATTERN]__aligned (32)
killer_pattern_32b	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 killer_pattern_32b[DQ_NUM][LEN_KILLER_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[DQ_NUM][LEN_KILLER_PATTERN]__aligned (32)
killer_pattern_64b	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 killer_pattern_64b[DQ_NUM][LEN_KILLER_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[DQ_NUM][LEN_KILLER_PATTERN]__aligned (32)
killer_pattern_64b	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 killer_pattern_64b[DQ_NUM][LEN_KILLER_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[DQ_NUM][LEN_KILLER_PATTERN]__aligned (32)
kirkwood_mpp_conf	arch/arm/mach-kirkwood/mpp.c	/^void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save)$/;"	f	typeref:typename:void
kirkwood_variant	arch/arm/mach-kirkwood/mpp.c	/^static u32 kirkwood_variant(void)$/;"	f	typeref:typename:u32	file:
kirq0	arch/arm/dts/keystone.dtsi	/^		kirq0: keystone_irq@26202a0 {$/;"	l
km_bec_fpga	board/keymile/common/common.h	/^struct km_bec_fpga {$/;"	s
kmalloc	lib/linux_compat.c	/^void *kmalloc(size_t size, int flags)$/;"	f	typeref:typename:void *
kmalloc_array	include/linux/compat.h	/^static inline void *kmalloc_array(size_t n, size_t size, gfp_t flags)$/;"	f	typeref:typename:void *
kmap	fs/ubifs/ubifs.c	/^static inline void *kmap(struct page *page)$/;"	f	typeref:typename:void *	file:
kmem_cache	include/linux/compat.h	/^struct kmem_cache { int sz; };$/;"	s
kmem_cache_alloc	lib/linux_compat.c	/^void *kmem_cache_alloc(struct kmem_cache *obj, int flag)$/;"	f	typeref:typename:void *
kmem_cache_create	include/linux/compat.h	/^#define kmem_cache_create(/;"	d
kmem_cache_destroy	include/linux/compat.h	/^static inline void kmem_cache_destroy(struct kmem_cache *cachep)$/;"	f	typeref:typename:void
kmem_cache_free	include/linux/compat.h	/^static inline void kmem_cache_free(struct kmem_cache *cachep, void *obj)$/;"	f	typeref:typename:void
kmemdup	fs/ubifs/ubifs.c	/^void *kmemdup(const void *src, size_t len, gfp_t gfp)$/;"	f	typeref:typename:void *
knav_dmas	arch/arm/dts/k2e-netcp.dtsi	/^knav_dmas: knav_dmas@0 {$/;"	l
knav_dmas	arch/arm/dts/k2g-netcp.dtsi	/^knav_dmas: knav_dmas@0 {$/;"	l
knav_dmas	arch/arm/dts/k2hk-netcp.dtsi	/^knav_dmas: knav_dmas@0 {$/;"	l
knav_dmas	arch/arm/dts/k2l-netcp.dtsi	/^knav_dmas: knav_dmas@0 {$/;"	l
known_cards	cmd/pcmcia.c	/^static uchar	*known_cards[] = {$/;"	v	typeref:typename:uchar * []	file:
known_cards	drivers/pcmcia/ti_pci1410a.c	/^static char *known_cards[] = {$/;"	v	typeref:typename:char * []	file:
kollmorgen_init	board/motionpro/motionpro.c	/^static void kollmorgen_init(void)$/;"	f	typeref:typename:void	file:
kona_get_dev	drivers/i2c/kona_i2c.c	/^struct bcm_kona_i2c_dev *kona_get_dev(struct i2c_adapter *adap)$/;"	f	typeref:struct:bcm_kona_i2c_dev *
kona_i2c_init	drivers/i2c/kona_i2c.c	/^static void kona_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
kona_i2c_msg	drivers/i2c/kona_i2c.c	/^struct kona_i2c_msg {$/;"	s	file:
kona_i2c_probe	drivers/i2c/kona_i2c.c	/^static int kona_i2c_probe(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
kona_i2c_read	drivers/i2c/kona_i2c.c	/^static int kona_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
kona_i2c_set_bus_speed	drivers/i2c/kona_i2c.c	/^static uint kona_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)$/;"	f	typeref:typename:uint	file:
kona_i2c_write	drivers/i2c/kona_i2c.c	/^static int kona_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
kona_sdhci_init	drivers/mmc/kona_sdhci.c	/^int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)$/;"	f	typeref:typename:int
kp	arch/powerpc/include/asm/mmu.h	/^	unsigned long kp:1;	\/* User 'key' (normally 1) *\/$/;"	m	struct:_SEGREG	typeref:typename:unsigned long:1
kp	arch/powerpc/include/asm/mmu.h	/^	unsigned long kp:1;	\/* User key (normally 1) *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:1
kp_ent	include/tegra-kbc.h	/^	u32 kp_ent[2];$/;"	m	struct:kbc_tegra	typeref:typename:u32[2]
kpc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 kpc;	\/*0x030*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
kpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con0_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con0_l8;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_con1_l8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_con1_l8;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	kpll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
kpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned kpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
kpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned kpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
kpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned kpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
kpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kpll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kpll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kpll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	kpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
kpm_ccu_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct ccu_clock kpm_ccu_clk = {$/;"	v	typeref:struct:ccu_clock	file:
kpm_ccu_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct ccu_clock kpm_ccu_clk = {$/;"	v	typeref:struct:ccu_clock	file:
kpn_chip_ready	drivers/mtd/nand/kmeter1_nand.c	/^static int kpn_chip_ready(void)$/;"	f	typeref:typename:int	file:
kpn_nand_dev_ready	drivers/mtd/nand/kmeter1_nand.c	/^static int kpn_nand_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
kpn_nand_hwcontrol	drivers/mtd/nand/kmeter1_nand.c	/^static void kpn_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
kpn_nand_read_buf	drivers/mtd/nand/kmeter1_nand.c	/^static void kpn_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
kpn_nand_read_byte	drivers/mtd/nand/kmeter1_nand.c	/^static u_char kpn_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u_char	file:
kpn_nand_write_buf	drivers/mtd/nand/kmeter1_nand.c	/^static void kpn_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)$/;"	f	typeref:typename:void	file:
kpn_wait_rdy	drivers/mtd/nand/kmeter1_nand.c	/^static void kpn_wait_rdy(void)$/;"	f	typeref:typename:void	file:
kpp	arch/arm/dts/imx6qdl.dtsi	/^			kpp: kpp@020b8000 {$/;"	l
kpp	arch/arm/dts/imx6ull.dtsi	/^			kpp: kpp@020b8000 {$/;"	l
kps_ccu_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct ccu_clock kps_ccu_clk = {$/;"	v	typeref:struct:ccu_clock	file:
kps_ccu_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct ccu_clock kps_ccu_clk = {$/;"	v	typeref:struct:ccu_clock	file:
kref	drivers/usb/gadget/f_mass_storage.c	/^struct kref {int x; };$/;"	s	file:
ks	arch/powerpc/include/asm/mmu.h	/^	unsigned long ks:1;	\/* Supervisor 'key' (normally 0) *\/$/;"	m	struct:_SEGREG	typeref:typename:unsigned long:1
ks	arch/powerpc/include/asm/mmu.h	/^	unsigned long ks:1;	\/* Supervisor key (normally 0) *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:1
ks	drivers/net/ks8851_mll.c	/^} ks_str, *ks;$/;"	v	typeref:struct:ks_net *
ks2_eth_bind_slaves	drivers/net/keystone_net.c	/^static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)$/;"	f	typeref:typename:int	file:
ks2_eth_free_pkt	drivers/net/keystone_net.c	/^static int ks2_eth_free_pkt(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
ks2_eth_ids	drivers/net/keystone_net.c	/^static const struct udevice_id ks2_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ks2_eth_ofdata_to_platdata	drivers/net/keystone_net.c	/^static int ks2_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ks2_eth_ops	drivers/net/keystone_net.c	/^static const struct eth_ops ks2_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
ks2_eth_parse_slave_interface	drivers/net/keystone_net.c	/^static int ks2_eth_parse_slave_interface(int netcp, int slave,$/;"	f	typeref:typename:int	file:
ks2_eth_priv	drivers/net/keystone_net.c	/^struct ks2_eth_priv {$/;"	s	file:
ks2_eth_probe	drivers/net/keystone_net.c	/^static int ks2_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ks2_eth_read_rom_hwaddr	drivers/net/keystone_net.c	/^int ks2_eth_read_rom_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
ks2_eth_recv	drivers/net/keystone_net.c	/^static int ks2_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
ks2_eth_remove	drivers/net/keystone_net.c	/^int ks2_eth_remove(struct udevice *dev)$/;"	f	typeref:typename:int
ks2_eth_send	drivers/net/keystone_net.c	/^static int ks2_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ks2_eth_start	drivers/net/keystone_net.c	/^static int ks2_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ks2_eth_stop	drivers/net/keystone_net.c	/^static void ks2_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
ks2_eth_write_hwaddr	drivers/net/keystone_net.c	/^int ks2_eth_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
ks2_serdes	arch/arm/include/asm/ti-common/keystone_serdes.h	/^struct ks2_serdes {$/;"	s
ks2_serdes_cfg_setup	drivers/soc/keystone/keystone_serdes.c	/^static void ks2_serdes_cfg_setup(u32 base, struct serdes_cfg *cfg, u32 size)$/;"	f	typeref:typename:void	file:
ks2_serdes_clock	arch/arm/include/asm/ti-common/keystone_serdes.h	/^enum ks2_serdes_clock {$/;"	g
ks2_serdes_cmu_comlane_enable	drivers/soc/keystone/keystone_serdes.c	/^static void ks2_serdes_cmu_comlane_enable(u32 base, struct ks2_serdes *serdes)$/;"	f	typeref:typename:void	file:
ks2_serdes_init	drivers/soc/keystone/keystone_serdes.c	/^int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes)$/;"	f	typeref:typename:int
ks2_serdes_init_cfg	drivers/soc/keystone/keystone_serdes.c	/^static int ks2_serdes_init_cfg(u32 base, struct cfg_entry *cfg, u32 num_lanes)$/;"	f	typeref:typename:int	file:
ks2_serdes_interface	arch/arm/include/asm/ti-common/keystone_serdes.h	/^enum ks2_serdes_interface {$/;"	g
ks2_serdes_lane_config	drivers/soc/keystone/keystone_serdes.c	/^static void ks2_serdes_lane_config(u32 base, struct serdes_cfg *cfg_lane,$/;"	f	typeref:typename:void	file:
ks2_serdes_lane_enable	drivers/soc/keystone/keystone_serdes.c	/^static void ks2_serdes_lane_enable(u32 base,$/;"	f	typeref:typename:void	file:
ks2_serdes_lane_reset	drivers/soc/keystone/keystone_serdes.c	/^static void ks2_serdes_lane_reset(u32 base, u32 reset, u32 lane)$/;"	f	typeref:typename:void	file:
ks2_serdes_pll_enable	drivers/soc/keystone/keystone_serdes.c	/^static void ks2_serdes_pll_enable(u32 base, struct ks2_serdes *serdes)$/;"	f	typeref:typename:void	file:
ks2_serdes_rate	arch/arm/include/asm/ti-common/keystone_serdes.h	/^enum ks2_serdes_rate {$/;"	g
ks2_serdes_rate_mode	arch/arm/include/asm/ti-common/keystone_serdes.h	/^enum ks2_serdes_rate_mode {$/;"	g
ks2_serdes_rmw	drivers/soc/keystone/keystone_serdes.c	/^static inline void ks2_serdes_rmw(u32 addr, u32 value, u32 mask)$/;"	f	typeref:typename:void	file:
ks2_serdes_sgmii_156p25mhz	drivers/net/keystone_net.c	/^struct ks2_serdes ks2_serdes_sgmii_156p25mhz = {$/;"	v	typeref:struct:ks2_serdes
ks2_sl_eth_ofdata_to_platdata	drivers/net/keystone_net.c	/^static int ks2_sl_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ks8851_mll_detect_chip	drivers/net/ks8851_mll.c	/^static int ks8851_mll_detect_chip(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ks8851_mll_enable	drivers/net/ks8851_mll.c	/^static void ks8851_mll_enable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks8851_mll_halt	drivers/net/ks8851_mll.c	/^static void ks8851_mll_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks8851_mll_init	drivers/net/ks8851_mll.c	/^static int ks8851_mll_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ks8851_mll_initialize	drivers/net/ks8851_mll.c	/^int ks8851_mll_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
ks8851_mll_phy_configure	drivers/net/ks8851_mll.c	/^static void ks8851_mll_phy_configure(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks8851_mll_recv	drivers/net/ks8851_mll.c	/^static int ks8851_mll_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ks8851_mll_reset	drivers/net/ks8851_mll.c	/^static void ks8851_mll_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks8851_mll_send	drivers/net/ks8851_mll.c	/^static int ks8851_mll_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ks8851_mll_write_hwaddr	drivers/net/ks8851_mll.c	/^static int ks8851_mll_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ks_clk_get_rate	arch/arm/mach-keystone/clock.c	/^unsigned long ks_clk_get_rate(unsigned int clk)$/;"	f	typeref:typename:unsigned long
ks_disable_qmu	drivers/net/ks8851_mll.c	/^static void ks_disable_qmu(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks_enable_int	drivers/net/ks8851_mll.c	/^static void ks_enable_int(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks_enable_qmu	drivers/net/ks8851_mll.c	/^void ks_enable_qmu(struct eth_device *dev)$/;"	f	typeref:typename:void
ks_inblk	drivers/net/ks8851_mll.c	/^static inline void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len)$/;"	f	typeref:typename:void	file:
ks_net	drivers/net/ks8851_mll.c	/^struct ks_net {$/;"	s	file:
ks_outblk	drivers/net/ks8851_mll.c	/^static inline void ks_outblk(struct eth_device *dev, u16 *wptr, u32 len)$/;"	f	typeref:typename:void	file:
ks_rcv	drivers/net/ks8851_mll.c	/^static void ks_rcv(struct eth_device *dev, uchar **pv_data)$/;"	f	typeref:typename:void	file:
ks_rdreg16	drivers/net/ks8851_mll.c	/^static u16 ks_rdreg16(struct eth_device *dev, u16 offset)$/;"	f	typeref:typename:u16	file:
ks_rdreg8	drivers/net/ks8851_mll.c	/^static u8 ks_rdreg8(struct eth_device *dev, u16 offset)$/;"	f	typeref:typename:u8	file:
ks_read_config	drivers/net/ks8851_mll.c	/^static void ks_read_config(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks_read_qmu	drivers/net/ks8851_mll.c	/^static inline void ks_read_qmu(struct eth_device *dev, u16 *buf, u32 len)$/;"	f	typeref:typename:void	file:
ks_read_selftest	drivers/net/ks8851_mll.c	/^static int ks_read_selftest(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ks_set_powermode	drivers/net/ks8851_mll.c	/^static void ks_set_powermode(struct eth_device *dev, unsigned pwrmode)$/;"	f	typeref:typename:void	file:
ks_setup	drivers/net/ks8851_mll.c	/^static void ks_setup(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks_setup_int	drivers/net/ks8851_mll.c	/^static void ks_setup_int(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ks_soft_reset	drivers/net/ks8851_mll.c	/^static void ks_soft_reset(struct eth_device *dev, unsigned op)$/;"	f	typeref:typename:void	file:
ks_str	drivers/net/ks8851_mll.c	/^} ks_str, *ks;$/;"	v	typeref:struct:ks_net
ks_tx_hdr	drivers/net/ks8851_mll.c	/^union ks_tx_hdr {$/;"	u	file:
ks_write_qmu	drivers/net/ks8851_mll.c	/^static void ks_write_qmu(struct eth_device *dev, u8 *pdata, u16 len)$/;"	f	typeref:typename:void	file:
ks_wrreg16	drivers/net/ks8851_mll.c	/^static void ks_wrreg16(struct eth_device *dev, u16 offset, u16 val)$/;"	f	typeref:typename:void	file:
ks_wrreg8	drivers/net/ks8851_mll.c	/^static void ks_wrreg8(struct eth_device *dev, u16 offset, u8 val)$/;"	f	typeref:typename:void	file:
kseg_to_phys	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define kseg_to_phys(/;"	d	file:
ksnav_close	drivers/dma/keystone_nav.c	/^int ksnav_close(struct pktdma_cfg *pktdma)$/;"	f	typeref:typename:int
ksnav_init	drivers/dma/keystone_nav.c	/^int ksnav_init(struct pktdma_cfg *pktdma, struct rx_buff_desc *rx_buffers)$/;"	f	typeref:typename:int
ksnav_recv	drivers/dma/keystone_nav.c	/^void *ksnav_recv(struct pktdma_cfg *pktdma, u32 **pkt, int *num_bytes)$/;"	f	typeref:typename:void *
ksnav_release_rxhd	drivers/dma/keystone_nav.c	/^void ksnav_release_rxhd(struct pktdma_cfg *pktdma, void *hd)$/;"	f	typeref:typename:void
ksnav_rx_disable	drivers/dma/keystone_nav.c	/^static int ksnav_rx_disable(struct pktdma_cfg *pktdma)$/;"	f	typeref:typename:int	file:
ksnav_send	drivers/dma/keystone_nav.c	/^int ksnav_send(struct pktdma_cfg *pktdma, u32 *pkt, int num_bytes, u32 swinfo2)$/;"	f	typeref:typename:int
ksnav_tx_disable	drivers/dma/keystone_nav.c	/^static int ksnav_tx_disable(struct pktdma_cfg *pktdma)$/;"	f	typeref:typename:int	file:
ksp	arch/avr32/include/asm/processor.h	/^	unsigned long ksp;	\/* Kernel stack pointer *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
ksp	arch/powerpc/include/asm/processor.h	/^	unsigned long	ksp;		\/* Kernel stack pointer *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
ksr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 ksr;		\/* 0x18 Key Size *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
kstrdup	drivers/mtd/mtdpart.c	/^char *kstrdup(const char *s, gfp_t gfp)$/;"	f	typeref:typename:char *
kstrtoint	drivers/mtd/ubi/build.c	/^int kstrtoint(const char *s, unsigned int base, int *res)$/;"	f	typeref:typename:int
ksz8051_config	drivers/net/phy/micrel.c	/^static int ksz8051_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz886x_config	drivers/net/phy/micrel.c	/^int ksz886x_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
ksz886x_driver	drivers/net/phy/micrel.c	/^static struct phy_driver ksz886x_driver = {$/;"	v	typeref:struct:phy_driver	file:
ksz886x_startup	drivers/net/phy/micrel.c	/^static int ksz886x_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz8873_auto_negotiate	arch/arm/mach-davinci/ksz8873.c	/^int ksz8873_auto_negotiate(int phy_addr)$/;"	f	typeref:typename:int
ksz8873_get_link_speed	arch/arm/mach-davinci/ksz8873.c	/^int ksz8873_get_link_speed(int phy_addr)$/;"	f	typeref:typename:int
ksz8873_init_phy	arch/arm/mach-davinci/ksz8873.c	/^int ksz8873_init_phy(int phy_addr)$/;"	f	typeref:typename:int
ksz8873_is_phy_connected	arch/arm/mach-davinci/ksz8873.c	/^int ksz8873_is_phy_connected(int phy_addr)$/;"	f	typeref:typename:int
ksz8893m_reg_clear	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)$/;"	f	typeref:typename:int	file:
ksz8893m_reg_read	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)$/;"	f	typeref:typename:int	file:
ksz8893m_reg_set	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)$/;"	f	typeref:typename:int	file:
ksz8893m_reset	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static int ksz8893m_reset(struct spi_slave *slave)$/;"	f	typeref:typename:int	file:
ksz8893m_transfer	board/bf518f-ezbrd/bf518f-ezbrd.c	/^static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,$/;"	f	typeref:typename:int	file:
ksz8895_config	drivers/net/phy/micrel.c	/^int ksz8895_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
ksz8895_driver	drivers/net/phy/micrel.c	/^static struct phy_driver ksz8895_driver = {$/;"	v	typeref:struct:phy_driver	file:
ksz8895_startup	drivers/net/phy/micrel.c	/^static int ksz8895_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz8895_write_smireg	drivers/net/phy/micrel.c	/^static void ksz8895_write_smireg(struct phy_device *phydev, int smireg, int val)$/;"	f	typeref:typename:void	file:
ksz9021_clk_grp	drivers/net/phy/micrel.c	/^static const struct ksz90x1_reg_field ksz9021_clk_grp[] = {$/;"	v	typeref:typename:const struct ksz90x1_reg_field[]	file:
ksz9021_config	drivers/net/phy/micrel.c	/^static int ksz9021_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz9021_driver	drivers/net/phy/micrel.c	/^static struct phy_driver ksz9021_driver = {$/;"	v	typeref:struct:phy_driver	file:
ksz9021_of_config	drivers/net/phy/micrel.c	/^static int ksz9021_of_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz9021_phy_extended_read	drivers/net/phy/micrel.c	/^int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)$/;"	f	typeref:typename:int
ksz9021_phy_extended_write	drivers/net/phy/micrel.c	/^int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)$/;"	f	typeref:typename:int
ksz9021_phy_extread	drivers/net/phy/micrel.c	/^static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,$/;"	f	typeref:typename:int	file:
ksz9021_phy_extwrite	drivers/net/phy/micrel.c	/^static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,$/;"	f	typeref:typename:int	file:
ksz9031_center_flp_timing	drivers/net/phy/micrel.c	/^static int ksz9031_center_flp_timing(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz9031_clk_grp	drivers/net/phy/micrel.c	/^static const struct ksz90x1_reg_field ksz9031_clk_grp[] =$/;"	v	typeref:typename:const struct ksz90x1_reg_field[]	file:
ksz9031_config	drivers/net/phy/micrel.c	/^static int ksz9031_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz9031_ctl_grp	drivers/net/phy/micrel.c	/^static const struct ksz90x1_reg_field ksz9031_ctl_grp[] =$/;"	v	typeref:typename:const struct ksz90x1_reg_field[]	file:
ksz9031_driver	drivers/net/phy/micrel.c	/^static struct phy_driver ksz9031_driver = {$/;"	v	typeref:struct:phy_driver	file:
ksz9031_of_config	drivers/net/phy/micrel.c	/^static int ksz9031_of_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz9031_phy_extended_read	drivers/net/phy/micrel.c	/^int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,$/;"	f	typeref:typename:int
ksz9031_phy_extended_write	drivers/net/phy/micrel.c	/^int ksz9031_phy_extended_write(struct phy_device *phydev,$/;"	f	typeref:typename:int
ksz9031_phy_extread	drivers/net/phy/micrel.c	/^static int ksz9031_phy_extread(struct phy_device *phydev, int addr, int devaddr,$/;"	f	typeref:typename:int	file:
ksz9031_phy_extwrite	drivers/net/phy/micrel.c	/^static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,$/;"	f	typeref:typename:int	file:
ksz90x1_of_config_group	drivers/net/phy/micrel.c	/^static int ksz90x1_of_config_group(struct phy_device *phydev,$/;"	f	typeref:typename:int	file:
ksz90x1_ofcfg	drivers/net/phy/micrel.c	/^struct ksz90x1_ofcfg {$/;"	s	file:
ksz90x1_reg_field	drivers/net/phy/micrel.c	/^struct ksz90x1_reg_field {$/;"	s	file:
ksz90x1_rxd_grp	drivers/net/phy/micrel.c	/^static const struct ksz90x1_reg_field ksz90x1_rxd_grp[] = {$/;"	v	typeref:typename:const struct ksz90x1_reg_field[]	file:
ksz90x1_txd_grp	drivers/net/phy/micrel.c	/^static const struct ksz90x1_reg_field ksz90x1_txd_grp[] = {$/;"	v	typeref:typename:const struct ksz90x1_reg_field[]	file:
ksz90xx_startup	drivers/net/phy/micrel.c	/^static int ksz90xx_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ksz_genconfig_bcastoff	drivers/net/phy/micrel.c	/^static int ksz_genconfig_bcastoff(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
ktcr_adv_1000F	drivers/net/ns8382x.c	/^	ktcr_adv_1000F = 0x0200,$/;"	e	enum:ktcr_bits	file:
ktcr_adv_1000H	drivers/net/ns8382x.c	/^	ktcr_adv_1000H = 0x0100,$/;"	e	enum:ktcr_bits	file:
ktcr_bits	drivers/net/ns8382x.c	/^enum ktcr_bits {$/;"	g	file:
kthread_create	drivers/usb/gadget/f_mass_storage.c	/^#define kthread_create(/;"	d	file:
kthread_create	include/linux/compat.h	/^#define kthread_create(/;"	d
kthread_should_stop	include/linux/compat.h	/^#define kthread_should_stop(/;"	d
kthread_stop	include/linux/compat.h	/^#define kthread_stop(/;"	d
ktrans	cmd/load.c	/^static char ktrans(char in)$/;"	f	typeref:typename:char	file:
kuid_t	include/linux/compat.h	/^} kuid_t;$/;"	t	typeref:struct:__anon481401f10108
kvco_mask	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	kvco_mask:10;	\/* KVCO\/LFCON MASK *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:10
kvco_shift	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	kvco_shift:5;	\/* KVCO\/lfcon SHIFT *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:5
kvm	arch/x86/include/asm/me_common.h	/^	u32 kvm:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
kvmconfig	scripts/kconfig/Makefile	/^kvmconfig: kvm_guest.config$/;"	t
kw_config_adr_windows	arch/arm/mach-kirkwood/cpu.c	/^int kw_config_adr_windows(void)$/;"	f	typeref:typename:int
kw_gpio_direction_input	drivers/gpio/kw_gpio.c	/^int kw_gpio_direction_input(unsigned pin)$/;"	f	typeref:typename:int
kw_gpio_direction_output	drivers/gpio/kw_gpio.c	/^int kw_gpio_direction_output(unsigned pin, int value)$/;"	f	typeref:typename:int
kw_gpio_get_value	drivers/gpio/kw_gpio.c	/^int kw_gpio_get_value(unsigned pin)$/;"	f	typeref:typename:int
kw_gpio_is_valid	drivers/gpio/kw_gpio.c	/^int kw_gpio_is_valid(unsigned pin, int mode)$/;"	f	typeref:typename:int
kw_gpio_set_blink	drivers/gpio/kw_gpio.c	/^void kw_gpio_set_blink(unsigned pin, int blink)$/;"	f	typeref:typename:void
kw_gpio_set_valid	drivers/gpio/kw_gpio.c	/^void kw_gpio_set_valid(unsigned pin, int mode)$/;"	f	typeref:typename:void
kw_gpio_set_value	drivers/gpio/kw_gpio.c	/^void kw_gpio_set_value(unsigned pin, int value)$/;"	f	typeref:typename:void
kw_nand_hwcontrol	drivers/mtd/nand/kirkwood_nand.c	/^static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd,$/;"	f	typeref:typename:void	file:
kw_nand_select_chip	drivers/mtd/nand/kirkwood_nand.c	/^void kw_nand_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void
kw_sysrst_action	arch/arm/mach-kirkwood/cpu.c	/^static void kw_sysrst_action(void)$/;"	f	typeref:typename:void	file:
kw_sysrst_check	arch/arm/mach-kirkwood/cpu.c	/^static void kw_sysrst_check(void)$/;"	f	typeref:typename:void	file:
kw_winctrl_calcsize	arch/arm/mach-kirkwood/cpu.c	/^unsigned int kw_winctrl_calcsize(unsigned int sizeval)$/;"	f	typeref:typename:unsigned int
kwb_exthdr	tools/kwbimage.h	/^	struct ext_hdr_v0	kwb_exthdr;$/;"	m	struct:kwb_header	typeref:struct:ext_hdr_v0
kwb_hdr	tools/kwbimage.h	/^	struct main_hdr_v0	kwb_hdr;$/;"	m	struct:kwb_header	typeref:struct:main_hdr_v0
kwb_header	tools/kwbimage.h	/^struct kwb_header {$/;"	s
kwbimage_check_image_types	tools/kwbimage.c	/^static int kwbimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
kwbimage_check_params	tools/kwbimage.c	/^static int kwbimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
kwbimage_cmd	tools/kwbimage.h	/^enum kwbimage_cmd {$/;"	g
kwbimage_cmd_types	tools/kwbimage.h	/^enum kwbimage_cmd_types {$/;"	g
kwbimage_generate	tools/kwbimage.c	/^static int kwbimage_generate(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
kwbimage_print_header	tools/kwbimage.c	/^static void kwbimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
kwbimage_set_header	tools/kwbimage.c	/^static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
kwbimage_verify_header	tools/kwbimage.c	/^static int kwbimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
kwboot_block	tools/kwboot.c	/^struct kwboot_block {$/;"	s	file:
kwboot_bootmsg	tools/kwboot.c	/^kwboot_bootmsg(int tty, void *msg)$/;"	f	typeref:typename:int	file:
kwboot_debugmsg	tools/kwboot.c	/^kwboot_debugmsg(int tty, void *msg)$/;"	f	typeref:typename:int	file:
kwboot_img_csum8	tools/kwboot.c	/^kwboot_img_csum8(void *_data, size_t size)$/;"	f	typeref:typename:uint8_t	file:
kwboot_img_patch_hdr	tools/kwboot.c	/^kwboot_img_patch_hdr(void *img, size_t size)$/;"	f	typeref:typename:int	file:
kwboot_mmap_image	tools/kwboot.c	/^kwboot_mmap_image(const char *path, size_t *size, int prot)$/;"	f	typeref:typename:void *	file:
kwboot_msg_boot	tools/kwboot.c	/^static unsigned char kwboot_msg_boot[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kwboot_msg_debug	tools/kwboot.c	/^static unsigned char kwboot_msg_debug[] = {$/;"	v	typeref:typename:unsigned char[]	file:
kwboot_open_tty	tools/kwboot.c	/^kwboot_open_tty(const char *path, speed_t speed)$/;"	f	typeref:typename:int	file:
kwboot_printv	tools/kwboot.c	/^kwboot_printv(const char *fmt, ...)$/;"	f	typeref:typename:void	file:
kwboot_progress	tools/kwboot.c	/^kwboot_progress(int _pct, char c)$/;"	f	typeref:typename:void	file:
kwboot_spinner	tools/kwboot.c	/^kwboot_spinner(void)$/;"	f	typeref:typename:void	file:
kwboot_term_pipe	tools/kwboot.c	/^kwboot_term_pipe(int in, int out, char *quit, int *s)$/;"	f	typeref:typename:int	file:
kwboot_terminal	tools/kwboot.c	/^kwboot_terminal(int tty)$/;"	f	typeref:typename:int	file:
kwboot_tty_recv	tools/kwboot.c	/^kwboot_tty_recv(int fd, void *buf, size_t len, int timeo)$/;"	f	typeref:typename:int	file:
kwboot_tty_send	tools/kwboot.c	/^kwboot_tty_send(int fd, const void *buf, size_t len)$/;"	f	typeref:typename:int	file:
kwboot_tty_send_char	tools/kwboot.c	/^kwboot_tty_send_char(int fd, unsigned char c)$/;"	f	typeref:typename:int	file:
kwboot_tty_speed	tools/kwboot.c	/^kwboot_tty_speed(int baudrate)$/;"	f	typeref:typename:speed_t	file:
kwboot_usage	tools/kwboot.c	/^kwboot_usage(FILE *stream, char *progname)$/;"	f	typeref:typename:void	file:
kwboot_verbose	tools/kwboot.c	/^static int kwboot_verbose;$/;"	v	typeref:typename:int	file:
kwboot_xm_makeblock	tools/kwboot.c	/^kwboot_xm_makeblock(struct kwboot_block *block, const void *data,$/;"	f	typeref:typename:int	file:
kwboot_xm_sendblock	tools/kwboot.c	/^kwboot_xm_sendblock(int fd, struct kwboot_block *block)$/;"	f	typeref:typename:int	file:
kwboot_xmodem	tools/kwboot.c	/^kwboot_xmodem(int tty, const void *_data, size_t size)$/;"	f	typeref:typename:int	file:
kwcpu_attrib	arch/arm/mach-kirkwood/include/mach/cpu.h	/^enum kwcpu_attrib {$/;"	g
kwcpu_registers	arch/arm/mach-kirkwood/include/mach/cpu.h	/^struct kwcpu_registers {$/;"	s
kwcpu_target	arch/arm/mach-kirkwood/include/mach/cpu.h	/^enum kwcpu_target {$/;"	g
kwcpu_winen	arch/arm/mach-kirkwood/include/mach/cpu.h	/^enum kwcpu_winen {$/;"	g
kwgpio_registers	arch/arm/mach-kirkwood/include/mach/cpu.h	/^struct kwgpio_registers {$/;"	s
kwgpio_registers	arch/arm/mach-mvebu/include/mach/cpu.h	/^struct kwgpio_registers {$/;"	s
kwh043st20_f01_spi_startup	drivers/video/formike.c	/^int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs,$/;"	f	typeref:typename:int
kwmpp_config	board/keymile/km_arm/km_arm.c	/^static const u32 kwmpp_config[] = {$/;"	v	typeref:typename:const u32[]	file:
kwnandf_registers	drivers/mtd/nand/kirkwood_nand.c	/^struct kwnandf_registers {$/;"	s	file:
kwspi_registers	arch/arm/include/asm/arch-mvebu/spi.h	/^struct kwspi_registers {$/;"	s
kwwin_registers	arch/arm/mach-kirkwood/include/mach/cpu.h	/^struct kwwin_registers {$/;"	s
kxgettext-objs	scripts/kconfig/Makefile	/^kxgettext-objs	:= kxgettext.o zconf.tab.o$/;"	m
kzalloc	include/linux/compat.h	/^static inline void *kzalloc(size_t size, gfp_t flags)$/;"	f	typeref:typename:void *
l	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 l;$/;"	m	struct:rk3288_grf_gpio_lh	typeref:typename:u32
l	arch/x86/include/asm/msr.h	/^			u32 l;$/;"	m	struct:msr::__anonc18a15d2010a::__anonc18a15d20208	typeref:typename:u32
l	drivers/qe/uec.h	/^	u16  l;       \/* address (LSB) *\/$/;"	m	struct:uec_82xx_enet_address	typeref:typename:u16
l	tools/pblimage.c	/^	unsigned char l;$/;"	m	union:__anon5825b7b7010a	typeref:typename:unsigned char	file:
l0	arch/blackfin/cpu/start.S	/^	l0 = r1;$/;"	d
l0	arch/blackfin/include/asm/ptrace.h	/^	long l0;$/;"	m	struct:pt_regs	typeref:typename:long
l1	arch/blackfin/cpu/start.S	/^	l1 = r1;$/;"	d
l1	arch/blackfin/include/asm/ptrace.h	/^	long l1;$/;"	m	struct:pt_regs	typeref:typename:long
l1_cache_handle	include/smbios.h	/^	u16 l1_cache_handle;$/;"	m	struct:smbios_type4	typeref:typename:u16
l1_info	arch/mips/lib/cache_init.S	/^	.macro	l1_info		sz, line_sz, off$/;"	m
l1_init	arch/mips/lib/cache_init.S	/^l1_init:$/;"	l
l1d_line_size	arch/mips/include/asm/global_data.h	/^	unsigned short l1d_line_size;$/;"	m	struct:arch_global_data	typeref:typename:unsigned short
l1i_line_size	arch/mips/include/asm/global_data.h	/^	unsigned short l1i_line_size;$/;"	m	struct:arch_global_data	typeref:typename:unsigned short
l1icache_enable	include/mpc86xx.h	/^#define l1icache_enable	/;"	d
l2	arch/arm/dts/uniphier-ld4.dtsi	/^	l2: l2-cache@500c0000 {$/;"	l
l2	arch/arm/dts/uniphier-pro4.dtsi	/^	l2: l2-cache@500c0000 {$/;"	l
l2	arch/arm/dts/uniphier-pro5.dtsi	/^	l2: l2-cache@500c0000 {$/;"	l
l2	arch/arm/dts/uniphier-pxs2.dtsi	/^	l2: l2-cache@500c0000 {$/;"	l
l2	arch/arm/dts/uniphier-sld3.dtsi	/^		l2: l2-cache@500c0000 {$/;"	l
l2	arch/arm/dts/uniphier-sld8.dtsi	/^	l2: l2-cache@500c0000 {$/;"	l
l2	arch/blackfin/cpu/start.S	/^	l2 = r1;$/;"	d
l2	arch/blackfin/include/asm/ptrace.h	/^	long l2;$/;"	m	struct:pt_regs	typeref:typename:long
l21__wc_ctl	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 l21__wc_ctl;			\/* 0x5C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
l2_cache_disable	arch/arm/cpu/arm926ejs/cache.c	/^__weak void l2_cache_disable(void) {}$/;"	f	typeref:typename:__weak void
l2_cache_disable	arch/arm/cpu/pxa/cache.c	/^__weak void l2_cache_disable(void) {}$/;"	f	typeref:typename:__weak void
l2_cache_disable	arch/arm/mach-kirkwood/cache.c	/^void l2_cache_disable()$/;"	f	typeref:typename:void
l2_cache_handle	include/smbios.h	/^	u16 l2_cache_handle;$/;"	m	struct:smbios_type4	typeref:typename:u16
l2_cache_params	arch/arm/mach-exynos/common_setup.h	/^enum l2_cache_params {$/;"	g
l2_cfg	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 l2_cfg;	\/* 0x20128 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
l2_disabled	arch/powerpc/cpu/mpc85xx/start.S	/^l2_disabled:$/;"	l
l2_init	arch/mips/lib/cache_init.S	/^l2_init:$/;"	l
l2_line_size	arch/mips/include/asm/global_data.h	/^	unsigned short l2_line_size;$/;"	m	struct:arch_global_data	typeref:typename:unsigned short
l2_probe_cop0	arch/mips/lib/cache_init.S	/^l2_probe_cop0:$/;"	l
l2_probe_done	arch/mips/lib/cache_init.S	/^l2_probe_done:$/;"	l
l2_status	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 l2_status;		\/* 0x188 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
l2_status	arch/arm/include/asm/arch/cpucfg.h	/^	u32 l2_status;		\/* 0x188 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
l2_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	l2_status;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
l2_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	l2_status;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
l2_status_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	l2_status_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
l2_unbypass	arch/mips/lib/cache_init.S	/^l2_unbypass:$/;"	l
l2cache_disable	board/amcc/luan/luan.c	/^static void l2cache_disable(void)$/;"	f	typeref:typename:void	file:
l2cache_disable_no_flush	arch/powerpc/cpu/mpc86xx/cache.S	/^l2cache_disable_no_flush:		\/* provide way to disable L2 w\/o flushing *\/$/;"	l
l2cache_enable	board/amcc/luan/luan.c	/^static void l2cache_enable(void)	\/* see p258 7.4.1 Enabling L2 Cache *\/$/;"	f	typeref:typename:void	file:
l2cache_init	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^int l2cache_init(void)$/;"	f	typeref:typename:int
l2cache_size	arch/powerpc/cpu/mpc85xx/fdt.c	/^static inline u32 l2cache_size(void)$/;"	f	typeref:typename:u32	file:
l2cache_status	board/amcc/luan/luan.c	/^static int l2cache_status(void)$/;"	f	typeref:typename:int	file:
l2captdatahi	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2captdatahi;	\/* L2 error data high capture *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2captdatahi	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2captdatahi; \/* 0xe20 L2 cache error capture data high *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2captdatalo	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2captdatalo;	\/* L2 error data low capture *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2captdatalo	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2captdatalo; \/* 0xe24 L2 cache error capture data low *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2captecc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2captecc;	\/* L2 error ECC capture *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2captecc	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2captecc;	\/* 0xe28 L2 cache error capture ECC syndrome *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2cc_hramc	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 l2cc_hramc;	\/* 0x58 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
l2cewar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewar0;	\/* L2 cache external write addr 0 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewar1;	\/* L2 cache external write addr 1 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewar2;	\/* L2 cache external write addr 2 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewar3;	\/* L2 cache external write addr 3 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewcr0;	\/* L2 cache external write control 0 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewcr1;	\/* L2 cache external write control 1 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewcr2;	\/* L2 cache external write control 2 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cewcr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2cewcr3;	\/* L2 cache external write control 3 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2cfg0	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2cfg0;	\/* 0x008 L2 cache configuration register 0 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2cr	include/mpc86xx.h	/^#define l2cr	/;"	d
l2csr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2csr0;	\/* 0x000 L2 cache control and status register 0 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2csr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2csr1;	\/* 0x004 L2 cache control and status register 1 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2ctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2ctl;		\/* L2 configuration 0 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2erraddr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2erraddr;	\/* L2 error addr capture *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2erraddr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2erraddr;	\/* 0xe54 L2 cache error address *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errattr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errattr;	\/* L2 error attributes capture *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errattr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errattr;	\/* 0xe4c L2 cache error attribute *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errctl;	\/* L2 error control *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errctl;	\/* 0xe58 L2 cache error control *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errdet	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errdet;	\/* L2 error detect *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errdet	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errdet;	\/* 0xe40 L2 cache error detect *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errdis	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errdis;	\/* L2 error disable *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errdis	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errdis;	\/* 0xe44 L2 cache error disable *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2erreaddr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2erreaddr;	\/* 0xe50 L2 cache error extended address *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errinjctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errinjctl;	\/* L2 error injection tag\/ECC control *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errinjctl	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errinjctl;\/* 0xe08 L2 cache error injection control *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errinjhi	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errinjhi;	\/* L2 error injection mask high *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errinjhi	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errinjhi;	\/* 0xe00 L2 cache error injection mask high *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errinjlo	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errinjlo;	\/* L2 error injection mask low *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errinjlo	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errinjlo;	\/* 0xe04 L2 cache error injection mask low *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2errinten	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2errinten;	\/* L2 error interrupt enable *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2errinten	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2errinten;	\/* 0xe48 L2 cache error interrupt enable *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par0	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par0;	\/* 0x208 L2 cache partitioning allocation register 0 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par1	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par1;	\/* 0x218 L2 cache partitioning allocation register 1 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par2	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par2;	\/* 0x228 L2 cache partitioning allocation register 2 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par3	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par3;	\/* 0x238 L2 cache partitining allocation register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par4	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par4;	\/* 0x248 L2 cache partitioning allocation register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par5	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par5;	\/* 0x258 L2 cache partitioning allocation register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par6	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par6;	\/* 0x268 L2 cache partitioning allocation register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2par7	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2par7;	\/* 0x278 L2 cache partitioning allocation register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir0	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir0;	\/* 0x200 L2 cache partitioning ID register 0 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir1	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir1;	\/* 0x210 L2 cache partitioning ID register 1 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir3	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir3;	\/* 0x230 L2 cache partitioning ID register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir4	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir4;	\/* 0x240 L2 cache partitioning ID register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir5	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir5;	\/* 0x250 L2 cache partitioning ID register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir6	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir6;	\/* 0x260 L2 cache partitioning ID register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pir7	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pir7;	\/* 0x270 L2 cache partitioning ID register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr0;	\/* 0x20c L2 cache partitioning way register 0 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr1;	\/* 0x21c L2 cache partitioning way register 1 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr2;	\/* 0x22c L2 cache partitioning way register 2 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr3;	\/* 0x23c L2 cache partitining way register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr4;	\/* 0x24c L2 cache partitioning way register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr5	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr5;	\/* 0x25c L2 cache partitioning way register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr6	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr6;	\/* 0x26c L2 cache partitioning way register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2pwr7	arch/powerpc/include/asm/immap_85xx.h	/^	u32 l2pwr7;	\/* 0x27c L2 cache partitioning way register 3 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
l2qt	drivers/qe/uec.h	/^	u32  l2qt;                \/* VLAN priority mapping table. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
l2srbar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2srbar0;	\/* L2 memory-mapped SRAM base addr 0 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l2srbar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	l2srbar1;	\/* L2 memory-mapped SRAM base addr 1 *\/$/;"	m	struct:ccsr_l2cache	typeref:typename:u32
l3	arch/arm/dts/uniphier-pro5.dtsi	/^	l3: l3-cache@500c8000 {$/;"	l
l3	arch/blackfin/cpu/start.S	/^	l3 = r1;$/;"	d
l3	arch/blackfin/include/asm/ptrace.h	/^	long l3;$/;"	m	struct:pt_regs	typeref:typename:long
l3_cache_handle	include/smbios.h	/^	u16 l3_cache_handle;$/;"	m	struct:smbios_type4	typeref:typename:u16
l3_chksum_gen	include/fsl-mc/fsl_dpni.h	/^	int		l3_chksum_gen;$/;"	m	struct:dpni_tx_flow_cfg	typeref:typename:int
l3_chksum_gen	include/fsl-mc/fsl_dpni.h	/^	int	l3_chksum_gen;$/;"	m	struct:dpni_tx_flow_attr	typeref:typename:int
l3_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	l3_gclk: l3_gclk {$/;"	l
l3_gclk	arch/arm/dts/am43xx-clocks.dtsi	/^	l3_gclk: l3_gclk {$/;"	l
l3_iclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	l3_iclk_div: l3_iclk_div {$/;"	l
l3_main_clk	arch/arm/dts/socfpga.dtsi	/^					l3_main_clk: l3_main_clk {$/;"	l
l3_mp_clk	arch/arm/dts/socfpga.dtsi	/^					l3_mp_clk: l3_mp_clk {$/;"	l
l3_pll_config	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static void l3_pll_config(void)$/;"	f	typeref:typename:void	file:
l3_sp_clk	arch/arm/dts/socfpga.dtsi	/^					l3_sp_clk: l3_sp_clk {$/;"	l
l3clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l3clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
l3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3clkctrl;		\/* Offset 0x20 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3clkctrl;		\/* Offset 0xE0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3clkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3clkstctrl;	\/* offset 0x00 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3clkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3clkstctrl;	\/* offset 0x0c *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3f_cfg_bwlimiter	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct l3f_cfg_bwlimiter {$/;"	s
l3fastclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l3fastclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
l3fastclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l3fastclkstctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
l3g4200d	arch/arm/dts/rk3288-popmetal.dtsi	/^	l3g4200d: l3g4200d@68 {$/;"	l
l3init_480m_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	l3init_480m_dclk_div: l3init_480m_dclk_div {$/;"	l
l3init_60m_fclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	l3init_60m_fclk: l3init_60m_fclk {$/;"	l
l3init_960m_gfclk	arch/arm/dts/dra7xx-clocks.dtsi	/^	l3init_960m_gfclk: l3init_960m_gfclk {$/;"	l
l3instr_ts_gclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	l3instr_ts_gclk_div: l3instr_ts_gclk_div {$/;"	l
l3instrclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3instrclkctrl;	\/* offset 0x40 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3instrclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3instrclkctrl;	\/* offset 0xDC *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3manageability	arch/x86/include/asm/me_common.h	/^	u32 l3manageability:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
l3medclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l3medclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
l3qt	drivers/qe/uec.h	/^	u32  l3qt[0x8];           \/* IP   priority mapping table. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32[0x8]
l3s_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	l3s_gclk: l3s_gclk {$/;"	l
l3s_gclk	arch/arm/dts/am43xx-clocks.dtsi	/^	l3s_gclk: l3s_gclk {$/;"	l
l3sclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3sclkstctrl;	\/* offset 0x04 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3sclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l3sclkstctrl;	\/* offset 0x200 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l3slowclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l3slowclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
l4_4_bytes	include/linux/ethtool.h	/^	__be32	l4_4_bytes;$/;"	m	struct:ethtool_usrip4_spec	typeref:typename:__be32
l4_cfg	arch/arm/dts/dra7.dtsi	/^		l4_cfg: l4@4a000000 {$/;"	l
l4_chksum_gen	include/fsl-mc/fsl_dpni.h	/^	int		l4_chksum_gen;$/;"	m	struct:dpni_tx_flow_cfg	typeref:typename:int
l4_chksum_gen	include/fsl-mc/fsl_dpni.h	/^	int	l4_chksum_gen;$/;"	m	struct:dpni_tx_flow_attr	typeref:typename:int
l4_main_clk	arch/arm/dts/socfpga.dtsi	/^					l4_main_clk: l4_main_clk {$/;"	l
l4_mp_clk	arch/arm/dts/socfpga.dtsi	/^					l4_mp_clk: l4_mp_clk {$/;"	l
l4_root_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	l4_root_clk_div: l4_root_clk_div {$/;"	l
l4_rtc_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	l4_rtc_gclk: l4_rtc_gclk {$/;"	l
l4_sp_clk	arch/arm/dts/socfpga.dtsi	/^					l4_sp_clk: l4_sp_clk {$/;"	l
l4_wkup	arch/arm/dts/am33xx.dtsi	/^		l4_wkup: l4_wkup@44c00000 {$/;"	l
l4_wkup	arch/arm/dts/am4372.dtsi	/^		l4_wkup: l4_wkup@44c00000 {$/;"	l
l4_wkup	arch/arm/dts/dra7.dtsi	/^		l4_wkup: l4@4ae00000 {$/;"	l
l4fw_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	l4fw_gclk: l4fw_gclk {$/;"	l
l4fwclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4fwclkctrl;	\/* offset 0x0A8 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4fwclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4fwclkctrl;	\/* offset 0x64 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4fwclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4fwclkstctrl;	\/* offset 0x08 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4hs_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	l4hs_gclk: l4hs_gclk {$/;"	l
l4hs_gclk	arch/arm/dts/am43xx-clocks.dtsi	/^	l4hs_gclk: l4hs_gclk {$/;"	l
l4hsclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l4hsclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
l4hsclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4hsclkctrl;	\/* offset 0x0A0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4hsclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4hsclkctrl;	\/* offset 0x120 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4hsclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4hsclkstctrl;	\/* offset 0x11C *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4i_chk	drivers/net/mvgbe.h	/^	u16 l4i_chk;		\/* CPU provided TCP Checksum *\/$/;"	m	struct:mvgbe_txdesc	typeref:typename:u16
l4ls_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	l4ls_gclk: l4ls_gclk {$/;"	l
l4ls_gclk	arch/arm/dts/am43xx-clocks.dtsi	/^	l4ls_gclk: l4ls_gclk {$/;"	l
l4lsclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int l4lsclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
l4lsclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4lsclkctrl;	\/* offset 0x420 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4lsclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4lsclkctrl;	\/* offset 0x60 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4lsclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4lsclkstctrl;	\/* offset 0x00 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4lsclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int l4lsclkstctrl;	\/* offset 0x400 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
l4main	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4main;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4main_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4main_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4mp	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4mp;				\/* 0x10 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
l4mp_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4mp_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4osc1	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4osc1;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4osc_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4osc_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4sp	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4sp;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4sp_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4sp_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4spim	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4spim;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4spim_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	l4spim_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
l4src	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	l4src;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
l4src	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t l4src;$/;"	m	struct:cm_config	typeref:typename:uint32_t
l5f31188_ctl_memory_access	drivers/video/l5f31188.c	/^static void l5f31188_ctl_memory_access(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_display_enable	drivers/video/l5f31188.c	/^static void l5f31188_display_enable(struct mipi_dsim_device *dev)$/;"	f	typeref:typename:void	file:
l5f31188_display_off	drivers/video/l5f31188.c	/^static void l5f31188_display_off(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_display_on	drivers/video/l5f31188.c	/^static void l5f31188_display_on(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_dsim_ddi_driver	drivers/video/l5f31188.c	/^static struct mipi_dsim_lcd_driver l5f31188_dsim_ddi_driver = {$/;"	v	typeref:struct:mipi_dsim_lcd_driver	file:
l5f31188_init	drivers/video/l5f31188.c	/^void l5f31188_init(void)$/;"	f	typeref:typename:void
l5f31188_panel_init	drivers/video/l5f31188.c	/^static int l5f31188_panel_init(struct mipi_dsim_device *dev)$/;"	f	typeref:typename:int	file:
l5f31188_set_dgc_lut	drivers/video/l5f31188.c	/^static void l5f31188_set_dgc_lut(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_set_eco	drivers/video/l5f31188.c	/^static void l5f31188_set_eco(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_set_extension	drivers/video/l5f31188.c	/^static void l5f31188_set_extension(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_set_gamma	drivers/video/l5f31188.c	/^static void l5f31188_set_gamma(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_set_pixel_format	drivers/video/l5f31188.c	/^static void l5f31188_set_pixel_format(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_set_ptba	drivers/video/l5f31188.c	/^static void l5f31188_set_ptba(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_set_tcon	drivers/video/l5f31188.c	/^static void l5f31188_set_tcon(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_sleep_in	drivers/video/l5f31188.c	/^static void l5f31188_sleep_in(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_sleep_out	drivers/video/l5f31188.c	/^static void l5f31188_sleep_out(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_write_cabc	drivers/video/l5f31188.c	/^static void l5f31188_write_cabc(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_write_cabcmb	drivers/video/l5f31188.c	/^static void l5f31188_write_cabcmb(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_write_ctrld	drivers/video/l5f31188.c	/^static void l5f31188_write_ctrld(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
l5f31188_write_disbv	drivers/video/l5f31188.c	/^static void l5f31188_write_disbv(struct mipi_dsim_device *dev,$/;"	f	typeref:typename:void	file:
lCommandCount	board/esd/common/xilinx_jtag/micro.c	/^	long            lCommandCount;      \/* Number of commands processed *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:long	file:
lRunTestTime	board/esd/common/xilinx_jtag/micro.c	/^	long            lRunTestTime;       \/* Pre-specified RUNTEST time (usec) *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:long	file:
lShiftLengthBits	board/esd/common/xilinx_jtag/micro.c	/^	long            lShiftLengthBits;   \/* Len. current shift data in bits *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:long	file:
l_array	include/zfs/zap_leaf.h	/^	} l_array;$/;"	m	union:zap_leaf_chunk	typeref:struct:zap_leaf_chunk::zap_leaf_array
l_buf	lib/zlib/deflate.h	/^    uchf *l_buf;          \/* buffer for literals or lengths *\/$/;"	m	struct:internal_state	typeref:typename:uchf *
l_cmderr	include/universe.h	/^	unsigned int l_cmderr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
l_desc	lib/zlib/deflate.h	/^    struct tree_desc_s l_desc;               \/* desc. for literal tree *\/$/;"	m	struct:internal_state	typeref:struct:tree_desc_s
l_entry	include/zfs/zap_leaf.h	/^	} l_entry;$/;"	m	union:zap_leaf_chunk	typeref:struct:zap_leaf_chunk::zap_leaf_entry
l_ethdev	drivers/usb/gadget/ether.c	/^static struct eth_dev l_ethdev;$/;"	v	typeref:struct:eth_dev	file:
l_free	include/zfs/zap_leaf.h	/^	} l_free;$/;"	m	union:zap_leaf_chunk	typeref:struct:zap_leaf_chunk::zap_leaf_free
l_hash	include/zfs/zap_leaf.h	/^	uint16_t l_hash[1];$/;"	m	struct:zap_leaf_phys	typeref:typename:uint16_t[1]
l_hdr	include/zfs/zap_leaf.h	/^	} l_hdr; \/* 2 24-byte chunks *\/$/;"	m	struct:zap_leaf_phys	typeref:struct:zap_leaf_phys::zap_leaf_header
l_netdev	drivers/usb/gadget/ether.c	/^static struct eth_device l_netdev;$/;"	v	typeref:struct:eth_device	file:
l_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 filler0, filler1, h_reg, l_reg;$/;"	m	struct:__anon39451e6d0308	typeref:typename:u8
l_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 l_reg, h_reg;$/;"	m	struct:__anon39451e6d0608	typeref:typename:u8
la	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	la;$/;"	m	struct:iim_regs	typeref:typename:u32
la	arch/powerpc/include/asm/immap_512x.h	/^	u32 la;			\/* IIM lower address register *\/$/;"	m	struct:iim512x	typeref:typename:u32
la	drivers/misc/fsl_iim.c	/^	u32 la;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
la_array	include/zfs/zap_leaf.h	/^			uint8_t la_array[ZAP_LEAF_ARRAY_BYTES];$/;"	m	union:zap_leaf_chunk::zap_leaf_array::__anon09dc1572010a	typeref:typename:uint8_t[]
la_array64	include/zfs/zap_leaf.h	/^			uint64_t la_array64;$/;"	m	union:zap_leaf_chunk::zap_leaf_array::__anon09dc1572010a	typeref:typename:uint64_t
la_next	include/zfs/zap_leaf.h	/^		uint16_t la_next;		\/* next blk or CHAIN_END *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_array	typeref:typename:uint16_t
la_type	include/zfs/zap_leaf.h	/^		uint8_t la_type;		\/* always ZAP_CHUNK_ARRAY *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_array	typeref:typename:uint8_t
lab	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		char *lab;$/;"	m	struct:__anon7d79ed4b0108	typeref:typename:char *	file:
label	arch/powerpc/include/asm/ppc4xx_config.h	/^	char label[16];$/;"	m	struct:ppc4xx_config	typeref:typename:char[16]
label	drivers/gpio/sandbox.c	/^	const char *label;	\/* label given by requester *\/$/;"	m	struct:gpio_state	typeref:typename:const char *	file:
label	drivers/gpio/zynq_gpio.c	/^	const char *label;$/;"	m	struct:zynq_platform_data	typeref:typename:const char *	file:
label	include/dataflash.h	/^	unsigned char label[20];$/;"	m	struct:__anona98984760108	typeref:typename:unsigned char[20]
label	include/fsl-mc/fsl_dprc.h	/^	char label[16];$/;"	m	struct:dprc_cfg	typeref:typename:char[16]
label	include/fsl-mc/fsl_dprc.h	/^	char label[16];$/;"	m	struct:dprc_obj_desc	typeref:typename:char[16]
label	include/led.h	/^	const char *label;$/;"	m	struct:led_uclass_plat	typeref:typename:const char *
label	include/linux/usb/composite.h	/^	const char			*label;$/;"	m	struct:usb_configuration	typeref:typename:const char *
label1	arch/x86/lib/efi/crt0-efi-x86_64.S	/^label1:$/;"	l
label_boot	cmd/pxe.c	/^static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)$/;"	f	typeref:typename:int	file:
label_create	cmd/pxe.c	/^static struct pxe_label *label_create(void)$/;"	f	typeref:struct:pxe_label *	file:
label_destroy	cmd/pxe.c	/^static void label_destroy(struct pxe_label *label)$/;"	f	typeref:typename:void	file:
label_localboot	cmd/pxe.c	/^static int label_localboot(struct pxe_label *label)$/;"	f	typeref:typename:int	file:
label_print	cmd/pxe.c	/^static void label_print(void *data)$/;"	f	typeref:typename:void	file:
label_txg	fs/zfs/zfs.c	/^	uint64_t label_txg;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
labels	cmd/pxe.c	/^	struct list_head labels;$/;"	m	struct:pxe_menu	typeref:struct:list_head	file:
lacie_read_mac_address	board/LaCie/common/common.c	/^int lacie_read_mac_address(uchar *mac_addr)$/;"	f	typeref:typename:int
lad0	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	lad0;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
lad1	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	lad1;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
lad2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	lad2;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
lad3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	lad3;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
lad4	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	lad4;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
lad5	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	lad5;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
laddr	drivers/net/zynq_gem.c	/^	u32 laddr[4][LADDR_HIGH + 1]; \/* 0x8c - Specific1 addr low\/high reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[4][]	file:
ladmsk0	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ladmsk0;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
ladmsk1	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ladmsk1;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
ladmsk2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ladmsk2;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
ladmsk3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ladmsk3;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
ladmsk4	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ladmsk4;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
ladmsk5	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ladmsk5;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
laerr	include/universe.h	/^	unsigned int laerr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
lal__phase_reset	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 lal__phase_reset;			\/* 0x6C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
lan8700_driver	drivers/net/phy/smsc.c	/^static struct phy_driver lan8700_driver = {$/;"	v	typeref:struct:phy_driver	file:
lan8710_driver	drivers/net/phy/smsc.c	/^static struct phy_driver lan8710_driver = {$/;"	v	typeref:struct:phy_driver	file:
lan8740_driver	drivers/net/phy/smsc.c	/^static struct phy_driver lan8740_driver = {$/;"	v	typeref:struct:phy_driver	file:
lan911x_driver	drivers/net/phy/smsc.c	/^static struct phy_driver lan911x_driver = {$/;"	v	typeref:struct:phy_driver	file:
lan91c96_detect_chip	drivers/net/lan91c96.c	/^static int lan91c96_detect_chip(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
lan91c96_halt	drivers/net/lan91c96.c	/^static void lan91c96_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
lan91c96_init	drivers/net/lan91c96.c	/^static int  lan91c96_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
lan91c96_initialize	drivers/net/lan91c96.c	/^int lan91c96_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
lan91c96_recv	drivers/net/lan91c96.c	/^static int lan91c96_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
lan91c96_send	drivers/net/lan91c96.c	/^static int lan91c96_send(struct eth_device *dev, void *packet,$/;"	f	typeref:typename:int	file:
lane	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} lane[4];	\/* Lane A, B, C, D *\/$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0608[4]
lane	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} lane[4];	\/* Lane A, B, C, D, E, F, G, H *\/$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon58ea331d0608[4]
lane	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const struct tegra_xusb_padctl_lane *lane;$/;"	m	struct:tegra_xusb_padctl_pin	typeref:typename:const struct tegra_xusb_padctl_lane *
lane	arch/powerpc/include/asm/immap_85xx.h	/^	} lane[24];$/;"	m	struct:serdes_corenet	typeref:struct:serdes_corenet::serdes_lane[24]
lane	arch/powerpc/include/asm/immap_85xx.h	/^	} lane[8];	\/* Lane A, B, C, D, E, F, G, H *\/$/;"	m	struct:serdes_corenet	typeref:struct:serdes_corenet::__anondcd7518a0808[8]
lane	drivers/pci/pci_mvebu.c	/^	u32 lane;$/;"	m	struct:mvebu_pcie	typeref:typename:u32	file:
lane	drivers/soc/keystone/keystone_serdes.c	/^	struct serdes_cfg lane[SERDES_LANE_CFG_NUM];$/;"	m	struct:cfg_entry	typeref:struct:serdes_cfg[]	file:
lane_bw	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned char lane_bw;$/;"	m	struct:exynos_dp_priv	typeref:typename:unsigned char
lane_cnt	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned char lane_cnt;$/;"	m	struct:exynos_dp_priv	typeref:typename:unsigned char
lane_count	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8 lane_count;$/;"	m	struct:link_train	typeref:typename:u8
lane_count	drivers/video/tegra124/sor.h	/^	u8	lane_count;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u8
lane_count_set	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	lane_count_set;$/;"	m	struct:rk3288_edp	typeref:typename:u32
lane_count_set	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	lane_count_set;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
lane_map	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	lane_map;$/;"	m	struct:rk3288_edp	typeref:typename:u32
lane_map	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	lane_map;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
lane_mask	drivers/pci/pci_mvebu.c	/^	u32 lane_mask;$/;"	m	struct:mvebu_pcie	typeref:typename:u32	file:
lane_to_slot	board/freescale/b4860qds/eth_b4860qds.c	/^static u8 lane_to_slot[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/corenet_ds/eth_hydra.c	/^static u8 lane_to_slot[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/corenet_ds/eth_p4080.c	/^static u8 lane_to_slot[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/corenet_ds/eth_superhydra.c	/^static u8 lane_to_slot[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/ls1043aqds/eth.c	/^static u8 lane_to_slot[] = {1, 2, 3, 4};$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/ls1046aqds/eth.c	/^static u8 lane_to_slot[] = {1, 1, 1, 1, 0, 4, 0 , 0};$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/p2041rdb/eth.c	/^static u8 lane_to_slot[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/t102xqds/eth_t102xqds.c	/^static u8 lane_to_slot[] = {2, 3, 4, 5};$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/t1040qds/eth.c	/^static u8 lane_to_slot[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/t208xqds/eth_t208xqds.c	/^static u8 lane_to_slot[] = {2, 2, 2, 2, 1, 1, 1, 1};$/;"	v	typeref:typename:u8[]	file:
lane_to_slot	board/freescale/t208xqds/eth_t208xqds.c	/^static u8 lane_to_slot[] = {3, 3, 3, 3, 1, 1, 1, 1};$/;"	v	typeref:typename:u8[]	file:
lane_to_slot_fsm1	board/freescale/ls2080aqds/eth.c	/^static u8 lane_to_slot_fsm1[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot_fsm1	board/freescale/t4qds/eth.c	/^static u8 lane_to_slot_fsm1[] = {1, 1, 1, 1, 2, 2, 2, 2};$/;"	v	typeref:typename:u8[]	file:
lane_to_slot_fsm2	board/freescale/ls2080aqds/eth.c	/^static u8 lane_to_slot_fsm2[] = {$/;"	v	typeref:typename:u8[]	file:
lane_to_slot_fsm2	board/freescale/t4qds/eth.c	/^static u8 lane_to_slot_fsm2[] = {3, 3, 3, 3, 4, 4, 4, 4};$/;"	v	typeref:typename:u8[]	file:
lanes	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const struct tegra_xusb_padctl_lane *lanes;$/;"	m	struct:tegra_xusb_padctl_soc	typeref:typename:const struct tegra_xusb_padctl_lane *
lanes	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^	u8 lanes[SRDS1_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^} lanes[SRDS_MAX_LANES] = {$/;"	v	typeref:typename:const struct __anon0f7aec2e0108[]
lanes	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
lanes	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^	u8 lanes[SRDS_MAX_LANES];$/;"	m	struct:serdes_config	typeref:typename:u8[]	file:
language	include/linux/usb/gadget.h	/^	u16			language;	\/* 0x0409 for en-us *\/$/;"	m	struct:usb_gadget_strings	typeref:typename:u16
lapic_addr	arch/x86/include/asm/acpi_table.h	/^	u32 lapic_addr;			\/* Local APIC address *\/$/;"	m	struct:acpi_madt	typeref:typename:u32
lapic_read	arch/x86/cpu/lapic.c	/^unsigned long lapic_read(unsigned long reg)$/;"	f	typeref:typename:unsigned long
lapic_remote_read	arch/x86/cpu/lapic.c	/^int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)$/;"	f	typeref:typename:int
lapic_setup	arch/x86/cpu/lapic.c	/^void lapic_setup(void)$/;"	f	typeref:typename:void
lapic_wait_icr_idle	arch/x86/cpu/lapic.c	/^static void lapic_wait_icr_idle(void)$/;"	f	typeref:typename:void	file:
lapic_write	arch/x86/cpu/lapic.c	/^void lapic_write(unsigned long reg, unsigned long v)$/;"	f	typeref:typename:void
lapicid	arch/x86/cpu/lapic.c	/^unsigned long lapicid(void)$/;"	f	typeref:typename:unsigned long
large_divisor	arch/sh/lib/udivsi3.S	/^large_divisor:$/;"	l
large_divisor	arch/sh/lib/udivsi3_i4i-Os.S	/^large_divisor:$/;"	l
largepage_memorybased	drivers/mtd/nand/fsl_elbc_nand.c	/^static struct nand_bbt_descr largepage_memorybased = {$/;"	v	typeref:struct:nand_bbt_descr	file:
largepage_memorybased	drivers/mtd/onenand/onenand_bbt.c	/^static struct nand_bbt_descr largepage_memorybased = {$/;"	v	typeref:struct:nand_bbt_descr	file:
largestexternallookupkeysize	drivers/qe/uec.h	/^	u8   largestexternallookupkeysize;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u8
last	common/dlmalloc.c	/^#define last(/;"	d	file:
last	drivers/usb/host/ehci-hcd.c	/^	struct QH *last;$/;"	m	struct:int_queue	typeref:struct:QH *	file:
last	include/usbdevice.h	/^	int last;		\/* data sent in last packet XXX do we need this *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
last	lib/zlib/inflate.h	/^    int last;                   \/* true if processing last block *\/$/;"	m	struct:inflate_state	typeref:typename:int
lastDestAddr	include/MCD_dma.h	/^	s8 *lastDestAddr;$/;"	m	struct:MCD_XferProg_struct	typeref:typename:s8 *
lastDestAddr	include/MCD_dma.h	/^	s8 *lastDestAddr;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:s8 *
lastErr	lib/bzip2/bzlib.c	/^      Int32     lastErr;$/;"	m	struct:__anonb9ba2b050108	typeref:typename:Int32	file:
lastSrcAddr	include/MCD_dma.h	/^	s8 *lastSrcAddr;$/;"	m	struct:MCD_XferProg_struct	typeref:typename:s8 *
last_addr	cmd/strings.c	/^static char *start_addr, *last_addr;$/;"	v	typeref:typename:char *	file:
last_addr_hi	cmd/mdio.c	/^static uint last_addr_hi;$/;"	v	typeref:typename:uint	file:
last_addr_hi	cmd/mii.c	/^static uint last_addr_hi;$/;"	v	typeref:typename:uint	file:
last_addr_lo	cmd/mdio.c	/^static uint last_addr_lo;$/;"	v	typeref:typename:uint	file:
last_addr_lo	cmd/mii.c	/^static uint last_addr_lo;$/;"	v	typeref:typename:uint	file:
last_bd_completed_address	drivers/qe/uec.h	/^	u32    last_bd_completed_address; \/* last entry in BD ring *\/$/;"	m	struct:uec_send_queue_qd	typeref:typename:u32
last_bg_pid	common/cli_hush.c	/^static unsigned int last_bg_pid;$/;"	v	typeref:typename:unsigned int	file:
last_block	drivers/mtd/ubispl/ubispl.h	/^	u32				last_block;$/;"	m	struct:ubi_vol_info	typeref:typename:u32
last_block	include/efi_api.h	/^	u64 last_block;$/;"	m	struct:efi_block_io_media	typeref:typename:u64
last_block_addr	drivers/usb/emul/sandbox_flash.c	/^	u32 last_block_addr;$/;"	m	struct:scsi_read_capacity_resp	typeref:typename:u32	file:
last_busno	include/pci.h	/^	int last_busno;$/;"	m	struct:pci_controller	typeref:typename:int
last_byte	net/net.c	/^	u16 last_byte;	\/* last byte in this hole + 1 (begin of next hole) *\/$/;"	m	struct:hole	typeref:typename:u16	file:
last_ch	include/video_console.h	/^	int last_ch;$/;"	m	struct:vidconsole_priv	typeref:typename:int
last_cmd	drivers/mmc/sh_mmcif.h	/^	u8			last_cmd;$/;"	m	struct:sh_mmcif_host	typeref:typename:u8
last_comp_version	include/fdt.h	/^	fdt32_t last_comp_version;	 \/* last compatible version *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
last_ctl	drivers/block/pata_bfin.h	/^	unsigned char last_ctl;$/;"	m	struct:ata_port	typeref:typename:unsigned char
last_ctl	drivers/block/sata_dwc.h	/^	u8			last_ctl;$/;"	m	struct:ata_port	typeref:typename:u8
last_ctl	drivers/block/sata_sil3114.h	/^	unsigned char last_ctl;$/;"	m	struct:sata_port	typeref:typename:unsigned char
last_ctrl	include/linux/mtd/fsl_upm.h	/^	int last_ctrl;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
last_data	cmd/mdio.c	/^static uint last_data;$/;"	v	typeref:typename:uint	file:
last_data	cmd/mii.c	/^static uint last_data;$/;"	v	typeref:typename:uint	file:
last_data_size	drivers/mtd/ubi/ubi.h	/^	int last_data_size;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
last_desc	drivers/net/mvneta.c	/^	int last_desc;$/;"	m	struct:mvneta_rx_queue	typeref:typename:int	file:
last_desc	drivers/net/mvneta.c	/^	int last_desc;$/;"	m	struct:mvneta_tx_queue	typeref:typename:int	file:
last_desc	drivers/net/mvpp2.c	/^	int last_desc;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:int	file:
last_desc	drivers/net/mvpp2.c	/^	int last_desc;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:int	file:
last_devad_hi	cmd/mdio.c	/^static uint last_devad_hi;$/;"	v	typeref:typename:uint	file:
last_devad_lo	cmd/mdio.c	/^static uint last_devad_lo;$/;"	v	typeref:typename:uint	file:
last_eb_bytes	drivers/mtd/ubi/ubi-media.h	/^	__be32 last_eb_bytes;$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__be32
last_eb_bytes	drivers/mtd/ubi/ubi.h	/^	int last_eb_bytes;$/;"	m	struct:ubi_volume	typeref:typename:int
last_eb_bytes	drivers/mtd/ubi/ubi.h	/^	u32 last_eb_bytes;$/;"	m	struct:ubi_volume	typeref:typename:u32
last_entry_ptr	scripts/kconfig/menu.c	/^static struct menu **last_entry_ptr;$/;"	v	typeref:struct:menu **	file:
last_eob_len	lib/zlib/deflate.h	/^    int last_eob_len;   \/* bit length of EOB code for last block *\/$/;"	m	struct:internal_state	typeref:typename:int
last_flush	lib/zlib/deflate.h	/^    int   last_flush;    \/* value of flush param for previous deflate call *\/$/;"	m	struct:internal_state	typeref:typename:int
last_gpio	include/sh_pfc.h	/^	unsigned first_gpio, last_gpio;$/;"	m	struct:pinmux_info	typeref:typename:unsigned
last_hw_screen	drivers/video/sed156x.c	/^static u8 last_hw_screen[LCD_PAGES][LCD_COLUMNS];$/;"	v	typeref:typename:u8[][]	file:
last_id	include/fsl-mc/fsl_dprc.h	/^	int last_id;$/;"	m	struct:dprc_res_ids_range_desc	typeref:typename:int
last_ids	cmd/mtdparts.c	/^static char last_ids[MTDIDS_MAXLEN];$/;"	v	typeref:typename:char[]	file:
last_ino	fs/ubifs/orphan.c	/^	unsigned long last_ino;$/;"	m	struct:check_info	typeref:typename:unsigned long	file:
last_int_usb	drivers/usb/musb-new/sunxi.c	/^static u8 last_int_usb;$/;"	v	typeref:typename:u8	file:
last_iso	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u16 last_iso;$/;"	m	struct:ed	typeref:typename:__u16
last_iso	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u16 last_iso;$/;"	m	struct:ed	typeref:typename:__u16
last_iso	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u16 last_iso;$/;"	m	struct:ed	typeref:typename:__u16
last_iso	drivers/usb/host/ohci-s3c24xx.h	/^	__u16 last_iso;$/;"	m	struct:ed	typeref:typename:__u16
last_iso	drivers/usb/host/ohci.h	/^	__u16 last_iso;$/;"	m	struct:ed	typeref:typename:__u16
last_jobid	common/cli_hush.c	/^static unsigned int last_jobid;$/;"	v	typeref:typename:unsigned int	file:
last_lit	lib/zlib/deflate.h	/^    uInt last_lit;      \/* running index in l_buf *\/$/;"	m	struct:internal_state	typeref:typename:uInt
last_lun	include/ata.h	/^	unsigned short	last_lun;	\/* reserved (word 126) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
last_mask	cmd/mii.c	/^static uint last_mask;$/;"	v	typeref:typename:uint	file:
last_mounted_on	include/ext_common.h	/^	char last_mounted_on[64];$/;"	m	struct:ext2_sblock	typeref:typename:char[64]
last_op	cmd/mdio.c	/^static char last_op[2];$/;"	v	typeref:typename:char[2]	file:
last_op	cmd/mii.c	/^static char last_op[2];$/;"	v	typeref:typename:char[2]	file:
last_opcode	include/faraday/ftsdc010.h	/^	unsigned int last_opcode;	\/* Last OP Code *\/$/;"	m	struct:mmc_host	typeref:typename:unsigned int
last_orphan	include/ext_common.h	/^	__le32 last_orphan;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
last_page_read	fs/ubifs/ubifs.h	/^	pgoff_t last_page_read;$/;"	m	struct:ubifs_inode	typeref:typename:pgoff_t
last_partition	cmd/mtdparts.c	/^static char last_partition[PARTITION_MAXLEN];$/;"	v	typeref:typename:char[]	file:
last_parts	cmd/mtdparts.c	/^static char last_parts[MTDPARTS_MAXLEN];$/;"	v	typeref:typename:char[]	file:
last_poll_ms	drivers/input/tegra-kbc.c	/^	unsigned int last_poll_ms;	\/* Time we should last polled *\/$/;"	m	struct:tegra_kbd_priv	typeref:typename:unsigned int	file:
last_read	arch/arm/cpu/arm920t/ep93xx/timer.c	/^	unsigned long last_read;$/;"	m	struct:ep93xx_timer	typeref:typename:unsigned long	file:
last_reg_hi	cmd/mdio.c	/^static uint last_reg_hi;$/;"	v	typeref:typename:uint	file:
last_reg_hi	cmd/mii.c	/^static uint last_reg_hi;$/;"	v	typeref:typename:uint	file:
last_reg_lo	cmd/mdio.c	/^static uint last_reg_lo;$/;"	v	typeref:typename:uint	file:
last_reg_lo	cmd/mii.c	/^static uint last_reg_lo;$/;"	v	typeref:typename:uint	file:
last_remainder	common/dlmalloc.c	/^#define last_remainder /;"	d	file:
last_report	common/usb_kbd.c	/^	unsigned long	last_report;$/;"	m	struct:usb_kbd_pdata	typeref:typename:unsigned long	file:
last_return_code	common/cli_hush.c	/^static unsigned int last_return_code;$/;"	v	typeref:typename:unsigned int	file:
last_speed_hz	drivers/spi/rk_spi.c	/^	unsigned int last_speed_hz;$/;"	m	struct:rockchip_spi_priv	typeref:typename:unsigned int	file:
last_stage_init	arch/x86/cpu/coreboot/coreboot.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	arch/x86/cpu/cpu.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/Arcturus/ucp1020/ucp1020.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/cm5200/cm5200.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/freescale/mpc8544ds/mpc8544ds.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/freescale/qemu-ppce500/qemu-ppce500.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/405ep/dlvision-10g.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/405ep/io.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/405ep/iocon.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/405ep/neo.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/405ex/io64.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/mpc8308/hrcon.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/mpc8308/strider.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/gdsys/p1022/controlcenterd.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/keymile/km82xx/km82xx.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/keymile/km83xx/km83xx.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/keymile/kmp204x/kmp204x.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/mpl/mip405/mip405.c	/^int last_stage_init (void)$/;"	f	typeref:typename:int
last_stage_init	board/mpl/pati/pati.c	/^int last_stage_init (void)$/;"	f	typeref:typename:int
last_stage_init	board/mpl/pip405/pip405.c	/^int last_stage_init (void)$/;"	f	typeref:typename:int
last_stage_init	board/sbc8548/sbc8548.c	/^int last_stage_init(void)$/;"	f	typeref:typename:int
last_stage_init	board/tqc/tqm5200/tqm5200.c	/^int last_stage_init (void)$/;"	f	typeref:typename:int
last_syscall	arch/powerpc/include/asm/processor.h	/^	signed long	last_syscall;$/;"	m	struct:thread_struct	typeref:typename:signed long
last_sysreset	arch/sandbox/include/asm/state.h	/^	enum sysreset_t last_sysreset;	\/* Last system reset type *\/$/;"	m	struct:sandbox_state	typeref:enum:sysreset_t
last_theft_trigger	arch/x86/include/asm/me_common.h	/^	u8 last_theft_trigger;$/;"	m	struct:tdt_state_info	typeref:typename:u8
last_time	arch/blackfin/cpu/interrupts.c	/^static ulong last_time;$/;"	v	typeref:typename:ulong	file:
last_transaction	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				last_transaction:1;$/;"	m	struct:usba_request	typeref:typename:unsigned int:1
last_transaction_us	drivers/spi/exynos_spi.c	/^	ulong last_transaction_us;	\/* Time of last transaction end *\/$/;"	m	struct:exynos_spi_priv	typeref:typename:ulong	file:
last_transaction_us	drivers/spi/rk_spi.c	/^	ulong last_transaction_us;	\/* Time of last transaction end *\/$/;"	m	struct:rockchip_spi_priv	typeref:typename:ulong	file:
last_transaction_us	drivers/spi/tegra114_spi.c	/^	int last_transaction_us;$/;"	m	struct:tegra114_spi_priv	typeref:typename:int	file:
last_transaction_us	drivers/spi/tegra20_sflash.c	/^	int last_transaction_us;$/;"	m	struct:tegra20_sflash_priv	typeref:typename:int	file:
last_transaction_us	drivers/spi/tegra20_slink.c	/^	int last_transaction_us;$/;"	m	struct:tegra30_spi_priv	typeref:typename:int	file:
last_transaction_us	drivers/spi/tegra210_qspi.c	/^	int last_transaction_us;$/;"	m	struct:tegra210_qspi_priv	typeref:typename:int	file:
last_trb	drivers/usb/host/xhci-ring.c	/^static int last_trb(struct xhci_ctrl *ctrl, struct xhci_ring *ring,$/;"	f	typeref:typename:int	file:
last_trb_on_last_seg	drivers/usb/host/xhci-ring.c	/^static bool last_trb_on_last_seg(struct xhci_ctrl *ctrl,$/;"	f	typeref:typename:bool	file:
last_ts	scripts/kconfig/zconf.lex.c	/^static int last_ts, first_ts;$/;"	v	typeref:typename:int	file:
last_usable_lba	include/part_efi.h	/^	__le64 last_usable_lba;$/;"	m	struct:_gpt_header	typeref:typename:__le64
last_use	fs/yaffs2/yaffs_guts.h	/^	int last_use;$/;"	m	struct:yaffs_cache	typeref:typename:int
last_valid_window	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u16 last_valid_window[MAX_BUS_NUM][MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u16[][]
last_vref	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u8 last_vref[MAX_BUS_NUM][MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u8[][]
last_write	drivers/mmc/bcm2835_sdhci.c	/^	ulong last_write;$/;"	m	struct:bcm2835_sdhci_host	typeref:typename:ulong	file:
lastcheck	include/ext_common.h	/^	__le32 lastcheck;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
lastctx	arch/sparc/include/asm/stack.h	/^		unsigned long lastctx;$/;"	m	struct:sparc_fpuwindow_regs	typeref:typename:unsigned long
lastdec	arch/arm/cpu/arm720t/interrupts.c	/^static ulong lastdec;$/;"	v	typeref:typename:ulong	file:
lastdec	arch/arm/cpu/arm926ejs/mxs/timer.c	/^#define lastdec /;"	d	file:
lastdec	arch/arm/cpu/arm926ejs/omap/timer.c	/^#define lastdec /;"	d	file:
lastdec	arch/arm/cpu/arm926ejs/spear/timer.c	/^#define lastdec /;"	d	file:
lastdec	arch/arm/cpu/armv7/stv0991/timer.c	/^#define lastdec /;"	d	file:
lastdec	arch/arm/mach-orion5x/timer.c	/^#define lastdec /;"	d	file:
lastdec	arch/arm/mach-stm32/stm32f7/timer.c	/^#define lastdec /;"	d	file:
lastdec	arch/nds32/cpu/n1213/ag101/timer.c	/^static ulong lastdec;$/;"	v	typeref:typename:ulong	file:
lastdec	board/armltd/integrator/timer.c	/^static unsigned long long lastdec;	 \/* Timer reading at last call	   *\/$/;"	v	typeref:typename:unsigned long long	file:
lastinc	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define lastinc	/;"	d	file:
lastinc	arch/arm/include/asm/global_data.h	/^	unsigned long lastinc;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
lastinc	arch/m68k/lib/time.c	/^static unsigned short lastinc;$/;"	v	typeref:typename:unsigned short	file:
lat	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic lat;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
lat	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic lat;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
late_analysis	drivers/mtd/ubi/attach.c	/^static int late_analysis(struct ubi_device *ubi, struct ubi_attach_info *ai)$/;"	f	typeref:typename:int	file:
late_initcall	include/linux/compat.h	/^#define late_initcall(/;"	d
latecol	drivers/net/e1000.h	/^	uint64_t latecol;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
latecoltxfr	drivers/qe/uec.h	/^	u32  latecoltxfr;        \/* late collision *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
latency	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t latency;$/;"	m	struct:emc_dvfs_latency	typeref:typename:uint32_t
latency	arch/x86/include/asm/sfi.h	/^	u32	latency;	\/* latency in ms *\/$/;"	m	struct:sfi_cstate_table_entry	typeref:typename:u32
latency	arch/x86/include/asm/sfi.h	/^	u32	latency;	\/* transition latency in ms *\/$/;"	m	struct:sfi_freq_table_entry	typeref:typename:u32
latency	drivers/tpm/tpm_tis_st33zp24_spi.c	/^	int latency;$/;"	m	struct:st33zp24_spi_phy	typeref:typename:int	file:
latency_regu	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 latency_regu;	\/* Latency Regulation *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
latency_regu	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 latency_regu;	\/* Latency Regulation *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
lattice_board_specific_func	include/lattice.h	/^} lattice_board_specific_func;$/;"	t	typeref:struct:__anon773a64540508
lattice_dump	drivers/fpga/lattice.c	/^int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
lattice_info	drivers/fpga/lattice.c	/^int lattice_info(Lattice_desc *desc)$/;"	f	typeref:typename:int
lattice_jtag_mode	include/lattice.h	/^	lattice_jtag_mode,		\/* jtag\/tap  *\/$/;"	e	enum:__anon773a64540203
lattice_load	drivers/fpga/lattice.c	/^int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
lattice_validate	drivers/fpga/lattice.c	/^static int lattice_validate(Lattice_desc *desc, const char *fn)$/;"	f	typeref:typename:int	file:
launch	drivers/mtd/nand/mxc_nand.h	/^	u32 launch;$/;"	m	struct:mxc_nand_regs	typeref:typename:u32
lausccr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lausccr;	\/* AUS mode Cursor Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lauscr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lauscr;	\/* AUS Mode Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
law	arch/powerpc/include/asm/fsl_pci.h	/^	enum law_trgt_if law;$/;"	m	struct:fsl_pci_info	typeref:enum:law_trgt_if
law	arch/powerpc/include/asm/immap_85xx.h	/^	} law[32];$/;"	m	struct:ccsr_local	typeref:struct:ccsr_local::__anondcd7518a0108[32]
law512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct law512x {$/;"	s
law512x_t	arch/powerpc/include/asm/immap_512x.h	/^} law512x_t;$/;"	t	typeref:struct:law512x
law83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct law83xx {$/;"	s
law83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} law83xx_t;$/;"	t	typeref:struct:law83xx
law_entry	arch/powerpc/include/asm/fsl_law.h	/^struct law_entry {$/;"	s
law_size	arch/powerpc/include/asm/fsl_law.h	/^enum law_size {$/;"	g
law_size_bits	arch/powerpc/include/asm/fsl_law.h	/^#define law_size_bits(/;"	d
law_table	board/Arcturus/ucp1020/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/b4860qds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/bsc9131rdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/bsc9132qds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/c29xpcie/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/common/p_corenet/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8536ds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8540ads/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8541cds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8544ds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8548cds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8555cds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8560ads/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8568mds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8569mds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8572ds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8610hpcd/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/mpc8641hpcn/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/p1010rdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/p1022ds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/p1023rdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/p1_p2_rdb_pc/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/p1_twr/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t102xqds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t102xrdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t1040qds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t104xrdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t208xqds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t208xrdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t4qds/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/freescale/t4rdb/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/gdsys/p1022/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/keymile/kmp204x/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/sbc8548/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/sbc8641d/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/socrates/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/varisys/cyrus/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/xes/xpedite517x/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/xes/xpedite520x/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/xes/xpedite537x/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_table	board/xes/xpedite550x/law.c	/^struct law_entry law_table[] = {$/;"	v	typeref:struct:law_entry[]
law_trgt_if	arch/powerpc/include/asm/fsl_law.h	/^enum law_trgt_if {$/;"	g
lawar	arch/powerpc/include/asm/immap_85xx.h	/^		u32	lawar;		\/* LAWn attributes *\/$/;"	m	struct:ccsr_local::__anondcd7518a0108	typeref:typename:u32
lawar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar0;		\/* Local Access Window 0 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar0;		\/* 0xc10 - Local Access Window 0 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar1;		\/* Local Access Window 1 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar1;		\/* 0xc30 - Local Access Window 1 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar10;	\/* Local Access Window 10 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar11;	\/* Local Access Window 11 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar2;		\/* Local Access Window 2 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar2;		\/* 0xc50 - Local Access Window 2 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar3;		\/* Local Access Window 3 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar3;		\/* 0xc70 - Local Access Window 3 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar4;		\/* Local Access Window 4 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar4;		\/* 0xc90 - Local Access Window 4 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar5;		\/* Local Access Window 5 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar5;		\/* 0xcb0 - Local Access Window 5 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar6;		\/* Local Access Window 6 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar6;		\/* 0xcd0 - Local Access Window 6 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar7;		\/* Local Access Window 7 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar7;		\/* 0xcf0 - Local Access Window 7 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar8;		\/* Local Access Window 8 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar8;		\/* 0xd10 - Local Access Window 8 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawar9;		\/* Local Access Window 9 Attrs *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawar9	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawar9;		\/* 0xd30 - Local Access Window 9 Attributes Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawar_size	arch/powerpc/include/asm/fsl_law.h	/^#define lawar_size(/;"	d
lawbar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar0;	\/* Local Access Window 0 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar0;	\/* 0xc08 - Local Access Window 0 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar1;	\/* Local Access Window 1 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar1;	\/* 0xc28 - Local Access Window 1 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar10;	\/* Local Access Window 10 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar11;	\/* Local Access Window 11 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar2;	\/* Local Access Window 2 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar2;	\/* 0xc48 - Local Access Window 2 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar3;	\/* Local Access Window 3 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar3;	\/* 0xc68 - Local Access Window 3 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar4;	\/* Local Access Window 4 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar4;	\/* 0xc88 - Local Access Window 4 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar5;	\/* Local Access Window 5 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar5;	\/* 0xca8 - Local Access Window 5 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar6;	\/* Local Access Window 6 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar6;	\/* 0xcc8 - Local Access Window 6 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar7;	\/* Local Access Window 7 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar7;	\/* 0xce8 - Local Access Window 7 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar8;	\/* Local Access Window 8 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar8;	\/* 0xd08 - Local Access Window 8 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbar9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lawbar9;	\/* Local Access Window 9 Base Addr *\/$/;"	m	struct:ccsr_local_ecm	typeref:typename:u32
lawbar9	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lawbar9;	\/* 0xd28 - Local Access Window 9 Base Address Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
lawbarh	arch/powerpc/include/asm/immap_85xx.h	/^		u32	lawbarh;	\/* LAWn base addr high *\/$/;"	m	struct:ccsr_local::__anondcd7518a0108	typeref:typename:u32
lawbarl	arch/powerpc/include/asm/immap_85xx.h	/^		u32	lawbarl;	\/* LAWn base addr low *\/$/;"	m	struct:ccsr_local::__anondcd7518a0108	typeref:typename:u32
layer0_addr_high4b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_addr_high4b;		\/* 0x860 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_addr_high4b	arch/arm/include/asm/arch/display.h	/^	u32 layer0_addr_high4b;		\/* 0x860 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_addr_low32b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_addr_low32b;		\/* 0x850 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_addr_low32b	arch/arm/include/asm/arch/display.h	/^	u32 layer0_addr_low32b;		\/* 0x850 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_attr0_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_attr0_ctrl;		\/* 0x890 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_attr0_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer0_attr0_ctrl;		\/* 0x890 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_attr1_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_attr1_ctrl;		\/* 0x8a0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_attr1_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer0_attr1_ctrl;		\/* 0x8a0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_pos	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_pos;			\/* 0x820 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_pos	arch/arm/include/asm/arch/display.h	/^	u32 layer0_pos;			\/* 0x820 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_size	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_size;		\/* 0x810 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_size	arch/arm/include/asm/arch/display.h	/^	u32 layer0_size;		\/* 0x810 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer0_stride;		\/* 0x840 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer0_stride	arch/arm/include/asm/arch/display.h	/^	u32 layer0_stride;		\/* 0x840 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_addr_high4b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_addr_high4b;		\/* 0x864 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_addr_high4b	arch/arm/include/asm/arch/display.h	/^	u32 layer1_addr_high4b;		\/* 0x864 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_addr_low32b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_addr_low32b;		\/* 0x854 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_addr_low32b	arch/arm/include/asm/arch/display.h	/^	u32 layer1_addr_low32b;		\/* 0x854 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_attr0_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_attr0_ctrl;		\/* 0x894 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_attr0_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer1_attr0_ctrl;		\/* 0x894 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_attr1_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_attr1_ctrl;		\/* 0x8a4 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_attr1_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer1_attr1_ctrl;		\/* 0x8a4 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_pos	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_pos;			\/* 0x824 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_pos	arch/arm/include/asm/arch/display.h	/^	u32 layer1_pos;			\/* 0x824 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_size	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_size;		\/* 0x814 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_size	arch/arm/include/asm/arch/display.h	/^	u32 layer1_size;		\/* 0x814 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer1_stride;		\/* 0x844 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer1_stride	arch/arm/include/asm/arch/display.h	/^	u32 layer1_stride;		\/* 0x844 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_addr_high4b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_addr_high4b;		\/* 0x868 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_addr_high4b	arch/arm/include/asm/arch/display.h	/^	u32 layer2_addr_high4b;		\/* 0x868 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_addr_low32b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_addr_low32b;		\/* 0x858 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_addr_low32b	arch/arm/include/asm/arch/display.h	/^	u32 layer2_addr_low32b;		\/* 0x858 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_attr0_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_attr0_ctrl;		\/* 0x898 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_attr0_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer2_attr0_ctrl;		\/* 0x898 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_attr1_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_attr1_ctrl;		\/* 0x8a8 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_attr1_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer2_attr1_ctrl;		\/* 0x8a8 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_pos	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_pos;			\/* 0x828 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_pos	arch/arm/include/asm/arch/display.h	/^	u32 layer2_pos;			\/* 0x828 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_size	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_size;		\/* 0x818 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_size	arch/arm/include/asm/arch/display.h	/^	u32 layer2_size;		\/* 0x818 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer2_stride;		\/* 0x848 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer2_stride	arch/arm/include/asm/arch/display.h	/^	u32 layer2_stride;		\/* 0x848 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_addr_high4b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_addr_high4b;		\/* 0x86c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_addr_high4b	arch/arm/include/asm/arch/display.h	/^	u32 layer3_addr_high4b;		\/* 0x86c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_addr_low32b	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_addr_low32b;		\/* 0x85c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_addr_low32b	arch/arm/include/asm/arch/display.h	/^	u32 layer3_addr_low32b;		\/* 0x85c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_attr0_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_attr0_ctrl;		\/* 0x89c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_attr0_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer3_attr0_ctrl;		\/* 0x89c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_attr1_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_attr1_ctrl;		\/* 0x8ac *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_attr1_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 layer3_attr1_ctrl;		\/* 0x8ac *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_pos	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_pos;			\/* 0x82c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_pos	arch/arm/include/asm/arch/display.h	/^	u32 layer3_pos;			\/* 0x82c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_size	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_size;		\/* 0x81c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_size	arch/arm/include/asm/arch/display.h	/^	u32 layer3_size;		\/* 0x81c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_stride	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 layer3_stride;		\/* 0x84c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer3_stride	arch/arm/include/asm/arch/display.h	/^	u32 layer3_stride;		\/* 0x84c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
layer_ctrldesc_init	drivers/video/fsl_dcu_fb.c	/^static int layer_ctrldesc_init(int index, u32 pixel_format)$/;"	f	typeref:typename:int	file:
layout	drivers/mtd/nand/sunxi_nand.c	/^	struct nand_ecclayout layout;$/;"	m	struct:sunxi_nand_hw_ecc	typeref:struct:nand_ecclayout	file:
layout	include/dfu.h	/^	enum dfu_layout         layout;$/;"	m	struct:dfu_entity	typeref:enum:dfu_layout
layout	include/linux/mtd/nand.h	/^	struct nand_ecclayout	*layout;$/;"	m	struct:nand_ecc_ctrl	typeref:struct:nand_ecclayout *
layout_cnodes	fs/ubifs/lpt_commit.c	/^static int layout_cnodes(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
layout_legacy	board/compulab/common/eeprom.c	/^#define layout_legacy /;"	d	file:
layout_legacy	board/compulab/common/eeprom.c	/^struct eeprom_field layout_legacy[5] = {$/;"	v	typeref:struct:eeprom_field[5]
layout_unknown	common/eeprom/eeprom_layout.c	/^struct eeprom_field layout_unknown[1] = {$/;"	v	typeref:struct:eeprom_field[1]
layout_v1	board/compulab/common/eeprom.c	/^#define layout_v1 /;"	d	file:
layout_v1	board/compulab/common/eeprom.c	/^struct eeprom_field layout_v1[12] = {$/;"	v	typeref:struct:eeprom_field[12]
layout_v2	board/compulab/common/eeprom.c	/^struct eeprom_field layout_v2[15] = {$/;"	v	typeref:struct:eeprom_field[15]
layout_v3	board/compulab/common/eeprom.c	/^struct eeprom_field layout_v3[16] = {$/;"	v	typeref:struct:eeprom_field[16]
layout_version	include/eeprom_layout.h	/^	int layout_version;$/;"	m	struct:eeprom_layout	typeref:typename:int
lazy_loaded	fs/yaffs2/yaffs_guts.h	/^	u8 lazy_loaded:1;	\/* This object has been lazy loaded and$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
lb0	arch/blackfin/include/asm/ptrace.h	/^	long lb0;$/;"	m	struct:pt_regs	typeref:typename:long
lb043wv_display_mode_settings	drivers/video/lg4573.c	/^static void lb043wv_display_mode_settings(struct spi_slave *spi)$/;"	f	typeref:typename:void	file:
lb043wv_display_on	drivers/video/lg4573.c	/^static void lb043wv_display_on(struct spi_slave *spi)$/;"	f	typeref:typename:void	file:
lb043wv_gamma_settings	drivers/video/lg4573.c	/^static void lb043wv_gamma_settings(struct spi_slave *spi)$/;"	f	typeref:typename:void	file:
lb043wv_power_settings	drivers/video/lg4573.c	/^static void lb043wv_power_settings(struct spi_slave *spi)$/;"	f	typeref:typename:void	file:
lb043wv_spi_write_u16	drivers/video/lg4573.c	/^static int lb043wv_spi_write_u16(struct spi_slave *spi, u16 val)$/;"	f	typeref:typename:int	file:
lb043wv_spi_write_u16_array	drivers/video/lg4573.c	/^static void lb043wv_spi_write_u16_array(struct spi_slave *spi, u16 *buff,$/;"	f	typeref:typename:void	file:
lb1	arch/blackfin/include/asm/ptrace.h	/^	long lb1;$/;"	m	struct:pt_regs	typeref:typename:long
lb_12_25_pf	arch/arm/include/asm/arch-omap5/omap.h	/^#define lb_12_25_pf	/;"	d
lb_25_50_pf	arch/arm/include/asm/arch-omap5/omap.h	/^#define lb_25_50_pf	/;"	d
lb_50_80_pf	arch/arm/include/asm/arch-omap5/omap.h	/^#define lb_50_80_pf	/;"	d
lb_5_12_pf	arch/arm/include/asm/arch-omap5/omap.h	/^#define lb_5_12_pf	/;"	d
lb_mask	arch/arm/include/asm/arch-omap5/omap.h	/^#define lb_mask	/;"	d
lba	drivers/usb/emul/sandbox_flash.c	/^	u32 lba;$/;"	m	struct:scsi_read10_req	typeref:typename:u32	file:
lba	include/blk.h	/^	lbaint_t	lba;		\/* number of blocks *\/$/;"	m	struct:blk_desc	typeref:typename:lbaint_t
lba48	drivers/block/fsl_sata.h	/^	int		lba48;$/;"	m	struct:fsl_sata	typeref:typename:int
lba48	drivers/block/sata_sil.h	/^	int		lba48;$/;"	m	struct:sil_sata	typeref:typename:int
lba48	include/blk.h	/^	unsigned char	lba48;$/;"	m	struct:blk_desc	typeref:typename:unsigned char
lba48_capacity	include/ata.h	/^	unsigned short	lba48_capacity[4]; \/* 4 16bit values containing lba 48 total number of sectors /;"	m	struct:hd_driveid	typeref:typename:unsigned short[4]
lba512_muldiv	disk/part.c	/^static lba512_t lba512_muldiv(lba512_t block_count, lba512_t mul_by, lba512_t div_by)$/;"	f	typeref:typename:lba512_t	file:
lba512_t	disk/part.c	/^typedef lbaint_t lba512_t;$/;"	t	typeref:typename:lbaint_t	file:
lba512_t	disk/part.c	/^typedef uint64_t lba512_t;$/;"	t	typeref:typename:uint64_t	file:
lba_28_ok	include/libata.h	/^static inline int lba_28_ok(u64 block, u32 n_block)$/;"	f	typeref:typename:int
lba_48_ok	include/libata.h	/^static inline int lba_48_ok(u64 block, u32 n_block)$/;"	f	typeref:typename:int
lba_blk_size	include/dfu.h	/^	unsigned int lba_blk_size;$/;"	m	struct:mmc_internal_data	typeref:typename:unsigned int
lba_capacity	include/ata.h	/^	unsigned int	lba_capacity;	\/* total number of sectors *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned int
lba_high	include/fis.h	/^	u8 lba_high;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
lba_high	include/fis.h	/^	u8 lba_high;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
lba_high	include/fis.h	/^	u8 lba_high;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
lba_high	include/fis.h	/^	u8 lba_high;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
lba_high_exp	include/fis.h	/^	u8 lba_high_exp;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
lba_high_exp	include/fis.h	/^	u8 lba_high_exp;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
lba_high_exp	include/fis.h	/^	u8 lba_high_exp;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
lba_high_exp	include/fis.h	/^	u8 lba_high_exp;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
lba_low	include/fis.h	/^	u8 lba_low;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
lba_low	include/fis.h	/^	u8 lba_low;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
lba_low	include/fis.h	/^	u8 lba_low;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
lba_low	include/fis.h	/^	u8 lba_low;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
lba_low_exp	include/fis.h	/^	u8 lba_low_exp;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
lba_low_exp	include/fis.h	/^	u8 lba_low_exp;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
lba_low_exp	include/fis.h	/^	u8 lba_low_exp;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
lba_low_exp	include/fis.h	/^	u8 lba_low_exp;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
lba_mid	include/fis.h	/^	u8 lba_mid;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
lba_mid	include/fis.h	/^	u8 lba_mid;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
lba_mid	include/fis.h	/^	u8 lba_mid;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
lba_mid	include/fis.h	/^	u8 lba_mid;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
lba_mid_exp	include/fis.h	/^	u8 lba_mid_exp;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
lba_mid_exp	include/fis.h	/^	u8 lba_mid_exp;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
lba_mid_exp	include/fis.h	/^	u8 lba_mid_exp;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
lba_mid_exp	include/fis.h	/^	u8 lba_mid_exp;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
lba_size	include/dfu.h	/^	unsigned int lba_size;$/;"	m	struct:mmc_internal_data	typeref:typename:unsigned int
lba_start	include/dfu.h	/^	unsigned int lba_start;$/;"	m	struct:mmc_internal_data	typeref:typename:unsigned int
lbah	include/libata.h	/^	u8			lbah;$/;"	m	struct:ata_taskfile	typeref:typename:u8
lbah_addr	drivers/block/pata_bfin.h	/^	unsigned long lbah_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
lbah_addr	drivers/block/sata_dwc.h	/^	void __iomem		*lbah_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
lbah_addr	drivers/block/sata_sil3114.h	/^	unsigned long lbah_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
lbaint_t	include/blk.h	/^typedef uint64_t lbaint_t;$/;"	t	typeref:typename:uint64_t
lbaint_t	include/blk.h	/^typedef ulong lbaint_t;$/;"	t	typeref:typename:ulong
lbal	include/libata.h	/^	u8			lbal;$/;"	m	struct:ata_taskfile	typeref:typename:u8
lbal_addr	drivers/block/pata_bfin.h	/^	unsigned long lbal_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
lbal_addr	drivers/block/sata_dwc.h	/^	void __iomem		*lbal_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
lbal_addr	drivers/block/sata_sil3114.h	/^	unsigned long lbal_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
lbam	include/libata.h	/^	u8			lbam;$/;"	m	struct:ata_taskfile	typeref:typename:u8
lbam_addr	drivers/block/pata_bfin.h	/^	unsigned long lbam_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
lbam_addr	drivers/block/sata_dwc.h	/^	void __iomem		*lbam_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
lbam_addr	drivers/block/sata_sil3114.h	/^	unsigned long lbam_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
lbasize_t	include/api_public.h	/^typedef	u_int64_t lbasize_t;$/;"	t	typeref:typename:u_int64_t
lbasize_t	include/api_public.h	/^typedef unsigned long lbasize_t;$/;"	t	typeref:typename:unsigned long
lbastart_t	include/api_public.h	/^typedef unsigned long lbastart_t;$/;"	t	typeref:typename:unsigned long
lbc_bank	arch/powerpc/include/asm/fsl_lbc.h	/^typedef struct lbc_bank {$/;"	s
lbc_bank_t	arch/powerpc/include/asm/fsl_lbc.h	/^} lbc_bank_t;$/;"	t	typeref:struct:lbc_bank
lbc_clk	arch/powerpc/include/asm/global_data.h	/^	u32 lbc_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
lbc_lcs0_ba	board/freescale/p1022ds/diu.c	/^static void *lbc_lcs0_ba;$/;"	v	typeref:typename:void *	file:
lbc_lcs1_ba	board/freescale/p1022ds/diu.c	/^static void *lbc_lcs1_ba;$/;"	v	typeref:typename:void *	file:
lbc_sdram_init	board/freescale/mpc8540ads/mpc8540ads.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbc_sdram_init	board/freescale/mpc8541cds/mpc8541cds.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbc_sdram_init	board/freescale/mpc8548cds/mpc8548cds.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbc_sdram_init	board/freescale/mpc8555cds/mpc8555cds.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbc_sdram_init	board/freescale/mpc8560ads/mpc8560ads.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbc_sdram_init	board/freescale/mpc8568mds/mpc8568mds.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbc_sdram_init	board/sbc8548/sbc8548.c	/^void lbc_sdram_init(void)$/;"	f	typeref:typename:void
lbcdllcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lbcdllcr;	\/* LBC DLL control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
lbcdllcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lbcdllcr;	\/* 0xe0e20 - LBC DLL control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
lbcr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lbcr;           \/* LBC Configuration *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lbeg	arch/xtensa/include/asm/ptrace.h	/^	unsigned long lbeg;		\/*  32 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
lbiu_clk	arch/powerpc/include/asm/global_data.h	/^	u32 lbiu_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
lbiuiplldcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lbiuiplldcr0;	\/* LBIU PLL Debug Reg 0 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
lbiuiplldcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lbiuiplldcr1;	\/* LBIU PLL Debug Reg 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
lblaw	arch/powerpc/include/asm/immap_83xx.h	/^	law83xx_t lblaw[4];	\/* LBIU local access window *\/$/;"	m	struct:sysconf83xx	typeref:typename:law83xx_t[4]
lbmcar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 lbmcar;		\/* Local bus memory controller attributes *\/$/;"	m	struct:qesba83xx	typeref:typename:u32
lbmcear	arch/powerpc/include/asm/immap_83xx.h	/^	u32 lbmcear;		\/* Local bus memory controller end address *\/$/;"	m	struct:qesba83xx	typeref:typename:u32
lbmcsar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 lbmcsar;		\/* Local bus memory controller start address *\/$/;"	m	struct:qesba83xx	typeref:typename:u32
lbsc_29bit	board/renesas/sh7785lcr/lowlevel_init.S	/^lbsc_29bit:$/;"	l
lbsc_end	board/renesas/sh7785lcr/lowlevel_init.S	/^lbsc_end:$/;"	l
lbuf	cmd/log.c	/^static char *lbuf;$/;"	v	typeref:typename:char *	file:
lc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
lc	lib/lzma/LzmaDec.h	/^  unsigned lc, lp, pb;$/;"	m	struct:_CLzmaProps	typeref:typename:unsigned
lc0	arch/blackfin/cpu/start.S	/^	lc0 = r1;$/;"	d
lc0	arch/blackfin/include/asm/ptrace.h	/^	long lc0;$/;"	m	struct:pt_regs	typeref:typename:long
lc1	arch/blackfin/cpu/start.S	/^	lc1 = r1;$/;"	d
lc1	arch/blackfin/include/asm/ptrace.h	/^	long lc1;$/;"	m	struct:pt_regs	typeref:typename:long
lcase	include/fat.h	/^	__u8	lcase;		\/* Case for base and extension *\/$/;"	m	struct:dir_entry	typeref:typename:__u8
lccmr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lccmr;	\/* Color Cursor Mapping *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lcd	arch/mips/dts/img,boston.dts	/^	lcd: lcd@17fff000 {$/;"	l
lcd	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct lcd {$/;"	s
lcd	board/nokia/rx51/tag_omap.h	/^		struct omap_lcd_config lcd;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_lcd_config
lcd0	arch/arm/dts/am437x-gp-evm.dts	/^	lcd0: display {$/;"	l
lcd0	arch/arm/dts/am437x-sk-evm.dts	/^	lcd0: display {$/;"	l
lcd0	arch/arm/dts/am43x-epos-evm.dts	/^	lcd0: display {$/;"	l
lcd0_ch0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 lcd0_ch0_clk_cfg;	\/* 0x118 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 lcd0_ch0_clk_cfg;	\/* 0x118 LCD0 CH0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 lcd0_ch0_clk_cfg;	\/* 0x118 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 lcd0_ch0_clk_cfg;	\/* 0x118 LCD0 CH0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 lcd0_ch1_clk_cfg;	\/* 0x12c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 lcd0_ch1_clk_cfg;	\/* 0x12c LCD0 CH1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 lcd0_ch1_clk_cfg;	\/* 0x12c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_ch1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 lcd0_ch1_clk_cfg;	\/* 0x12c LCD0 CH1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 lcd0_clk_cfg;	\/* 0x118 LCD0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 lcd0_clk_cfg;	\/* 0x49c LCD0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 lcd0_clk_cfg;	\/* 0x118 LCD0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 lcd0_clk_cfg;	\/* 0x49c LCD0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd0_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd0_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd0_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd0_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd0_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd1_ch0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 lcd1_ch0_clk_cfg;	\/* 0x11c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 lcd1_ch0_clk_cfg;	\/* 0x11c LCD1 CH0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 lcd1_ch0_clk_cfg;	\/* 0x11c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 lcd1_ch0_clk_cfg;	\/* 0x11c LCD1 CH0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 lcd1_ch1_clk_cfg;	\/* 0x130 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 lcd1_ch1_clk_cfg;	\/* 0x130 LCD1 CH1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 lcd1_ch1_clk_cfg;	\/* 0x130 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_ch1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 lcd1_ch1_clk_cfg;	\/* 0x130 LCD1 CH1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 lcd1_clk_cfg;	\/* 0x11c LCD1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 lcd1_clk_cfg;	\/* 0x4a0 LCD1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 lcd1_clk_cfg;	\/* 0x11c LCD1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 lcd1_clk_cfg;	\/* 0x4a0 LCD1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lcd1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd1_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd1_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd1_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lcd1_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
lcd823_t	arch/powerpc/include/asm/8xx_immap.h	/^} lcd823_t;$/;"	t	typeref:struct:lcd
lcd_ac_bias_en	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_ac_bias_en;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_ac_bias_en	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_ac_bias_en;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_base	common/lcd.c	/^static void *lcd_base;			\/* Start of framebuffer memory	*\/$/;"	v	typeref:typename:void *	file:
lcd_blit	drivers/video/da8xx-fb.c	/^static void lcd_blit(int load_mode, struct da8xx_fb_par *par)$/;"	f	typeref:typename:void	file:
lcd_bmp	board/esd/common/lcd.c	/^int lcd_bmp(uchar *logo_bmp)$/;"	f	typeref:typename:int
lcd_calc_clk_divider	drivers/video/da8xx-fb.c	/^static void lcd_calc_clk_divider(struct da8xx_fb_par *par)$/;"	f	typeref:typename:void	file:
lcd_cfg	board/davinci/ea20/ea20.c	/^static const struct lcd_ctrl_config lcd_cfg = {$/;"	v	typeref:typename:const struct lcd_ctrl_config	file:
lcd_cfg	board/htkw/mcx/mcx.c	/^static struct panel_config lcd_cfg = {$/;"	v	typeref:struct:panel_config	file:
lcd_cfg	board/siemens/pxm2/board.c	/^static const struct lcd_ctrl_config lcd_cfg = {$/;"	v	typeref:typename:const struct lcd_ctrl_config	file:
lcd_cfg	board/teejet/mt_ventoux/mt_ventoux.c	/^static struct panel_config lcd_cfg[] = {$/;"	v	typeref:struct:panel_config[]	file:
lcd_cfg_ac_bias	drivers/video/da8xx-fb.c	/^static void lcd_cfg_ac_bias(int period, int transitions_per_int)$/;"	f	typeref:typename:void	file:
lcd_cfg_display	drivers/video/da8xx-fb.c	/^static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)$/;"	f	typeref:typename:int	file:
lcd_cfg_dma	drivers/video/da8xx-fb.c	/^static int lcd_cfg_dma(int burst_size)$/;"	f	typeref:typename:int	file:
lcd_cfg_frame_buffer	drivers/video/da8xx-fb.c	/^static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,$/;"	f	typeref:typename:int	file:
lcd_cfg_horizontal_sync	drivers/video/da8xx-fb.c	/^static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width,$/;"	f	typeref:typename:void	file:
lcd_cfg_vertical_sync	drivers/video/da8xx-fb.c	/^static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,$/;"	f	typeref:typename:void	file:
lcd_cfgs	board/siemens/rut/board.c	/^static const struct lcd_ctrl_config lcd_cfgs[] = {$/;"	v	typeref:typename:const struct lcd_ctrl_config[]	file:
lcd_clear	common/lcd.c	/^void lcd_clear(void)$/;"	f	typeref:typename:void
lcd_clk	arch/arm/dts/at91sam9261.dtsi	/^					lcd_clk: lcd_clk {$/;"	l
lcd_clk	arch/arm/dts/at91sam9263.dtsi	/^					lcd_clk: lcd_clk {$/;"	l
lcd_clk	arch/arm/dts/at91sam9g45.dtsi	/^					lcd_clk: lcd_clk {$/;"	l
lcd_cmap	arch/powerpc/include/asm/8xx_immap.h	/^#define lcd_cmap	/;"	d
lcd_color_bg	common/lcd.c	/^static int lcd_color_bg;$/;"	v	typeref:typename:int	file:
lcd_color_fg	common/lcd.c	/^static int lcd_color_fg;$/;"	v	typeref:typename:int	file:
lcd_ctrl	arch/m68k/include/asm/coldfire/lcd.h	/^typedef struct lcd_ctrl {$/;"	s
lcd_ctrl_config	drivers/video/da8xx-fb.h	/^struct lcd_ctrl_config {$/;"	s
lcd_ctrl_init	board/BuR/common/common.c	/^void lcd_ctrl_init(void *lcdbase)$/;"	f	typeref:typename:void
lcd_ctrl_init	board/compulab/common/omap3_display.c	/^void lcd_ctrl_init(void *lcdbase)$/;"	f	typeref:typename:void
lcd_ctrl_init	drivers/video/atmel_hlcdfb.c	/^void lcd_ctrl_init(void *lcdbase)$/;"	f	typeref:typename:void
lcd_ctrl_init	drivers/video/atmel_lcdfb.c	/^void lcd_ctrl_init(void *lcdbase)$/;"	f	typeref:typename:void
lcd_ctrl_init	drivers/video/bcm2835.c	/^void lcd_ctrl_init(void *lcdbase)$/;"	f	typeref:typename:void
lcd_ctrl_init	drivers/video/mpc8xx_lcd.c	/^void lcd_ctrl_init (void *lcdbase)$/;"	f	typeref:typename:void
lcd_ctrl_init	drivers/video/pxa_lcd.c	/^void lcd_ctrl_init (void *lcdbase)$/;"	f	typeref:typename:void
lcd_data	board/zipitz2/zipitz2.c	/^} lcd_data[] = {$/;"	v	typeref:struct:__anonddc6b5340108[]
lcd_data0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data0;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data0;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data1;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data1;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data10	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data10;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data10	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data10;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data11	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data11;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data11	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data11;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data12	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data12;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data12	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data12;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data13	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data13;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data13	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data13;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data14	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data14;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data14	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data14;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data15	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data15;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data15	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data15;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data2;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data2;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data3;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data3;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data4	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data4;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data4	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data4;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data5	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data5;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data5	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data5;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data6	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data6;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data6	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data6;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data7	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data7;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data7	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data7;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data8	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data8;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data8	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data8;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data9	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_data9;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_data9	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_data9;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_def	board/compulab/common/omap3_display.c	/^static enum display_type lcd_def;$/;"	v	typeref:enum:display_type	file:
lcd_depth	board/esd/common/lcd.c	/^int lcd_depth;$/;"	v	typeref:typename:int
lcd_disable	board/atmel/at91sam9261ek/at91sam9261ek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/at91sam9263ek/at91sam9263ek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/at91sam9rlek/at91sam9rlek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void lcd_disable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_disable	board/atmel/sama5d3xek/sama5d3xek.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void lcd_disable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_disable	board/atmel/sama5d4ek/sama5d4ek.c	/^void lcd_disable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_disable	board/denx/ma5d4evk/ma5d4evk.c	/^void lcd_disable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_disable	board/mini-box/picosam9g45/picosam9g45.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/ronetix/pm9261/pm9261.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable	board/ronetix/pm9263/pm9263.c	/^void lcd_disable(void)$/;"	f	typeref:typename:void
lcd_disable_raster	drivers/video/da8xx-fb.c	/^static inline void lcd_disable_raster(bool wait_for_frame_done)$/;"	f	typeref:typename:void	file:
lcd_display_bitmap	common/lcd.c	/^int lcd_display_bitmap(ulong bmp_image, int x, int y)$/;"	f	typeref:typename:int
lcd_display_rle8_bitmap	common/lcd.c	/^static void lcd_display_rle8_bitmap(struct bmp_image *bmp, ushort *cmap,$/;"	f	typeref:typename:void	file:
lcd_dma_desc	include/atmel_hlcdc.h	/^struct lcd_dma_desc {$/;"	s
lcd_dt_simplefb_add_node	common/lcd_simplefb.c	/^int lcd_dt_simplefb_add_node(void *blob)$/;"	f	typeref:typename:int
lcd_dt_simplefb_configure_node	common/lcd_simplefb.c	/^static int lcd_dt_simplefb_configure_node(void *blob, int off)$/;"	f	typeref:typename:int	file:
lcd_dt_simplefb_enable_existing_node	common/lcd_simplefb.c	/^int lcd_dt_simplefb_enable_existing_node(void *blob)$/;"	f	typeref:typename:int
lcd_enable	arch/arm/include/asm/imx-common/mx5_video.h	/^static inline void lcd_enable(void) { }$/;"	f	typeref:typename:void
lcd_enable	board/BuR/common/common.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/at91sam9261ek/at91sam9261ek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/at91sam9263ek/at91sam9263ek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/at91sam9rlek/at91sam9rlek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void lcd_enable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_enable	board/atmel/sama5d3xek/sama5d3xek.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void lcd_enable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_enable	board/atmel/sama5d4ek/sama5d4ek.c	/^void lcd_enable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_enable	board/compulab/common/omap3_display.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/denx/ma5d4evk/ma5d4evk.c	/^void lcd_enable(void)	{ \/* Empty! *\/ }$/;"	f	typeref:typename:void
lcd_enable	board/mini-box/picosam9g45/picosam9g45.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/ronetix/pm9261/pm9261.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	board/ronetix/pm9263/pm9263.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	drivers/video/bcm2835.c	/^void lcd_enable(void)$/;"	f	typeref:typename:void
lcd_enable	drivers/video/mpc8xx_lcd.c	/^void lcd_enable (void)$/;"	f	typeref:typename:void
lcd_enable	drivers/video/pxa_lcd.c	/^__weak void lcd_enable(void)$/;"	f	typeref:typename:__weak void
lcd_enable_h	arch/arm/dts/rk3288-jerry.dts	/^		lcd_enable_h: lcd-en {$/;"	l
lcd_enable_raster	drivers/video/da8xx-fb.c	/^static inline void lcd_enable_raster(void)$/;"	f	typeref:typename:void	file:
lcd_flush_dcache	common/lcd.c	/^static char lcd_flush_dcache;	\/* 1 to flush dcache after each lcd update *\/$/;"	v	typeref:typename:char	file:
lcd_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	lcd_gclk: lcd_gclk {$/;"	l
lcd_get_pixel_height	common/lcd.c	/^int lcd_get_pixel_height(void)$/;"	f	typeref:typename:int
lcd_get_pixel_width	common/lcd.c	/^int lcd_get_pixel_width(void)$/;"	f	typeref:typename:int
lcd_get_screen_columns	common/lcd_console.c	/^int lcd_get_screen_columns(void)$/;"	f	typeref:typename:int
lcd_get_screen_rows	common/lcd_console.c	/^int lcd_get_screen_rows(void)$/;"	f	typeref:typename:int
lcd_get_size	common/lcd.c	/^__weak int lcd_get_size(int *line_length)$/;"	f	typeref:typename:__weak int
lcd_get_size	drivers/video/am335x-fb.c	/^int lcd_get_size(int *line_length)$/;"	f	typeref:typename:int
lcd_get_size	drivers/video/bcm2835.c	/^int lcd_get_size(int *line_length)$/;"	f	typeref:typename:int
lcd_getbgcolor	common/lcd.c	/^int lcd_getbgcolor(void)$/;"	f	typeref:typename:int
lcd_getfgcolor	common/lcd.c	/^int lcd_getfgcolor(void)$/;"	f	typeref:typename:int
lcd_hsync	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_hsync;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_hsync	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_hsync;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_in	arch/arm/dts/am437x-gp-evm.dts	/^			lcd_in: endpoint {$/;"	l
lcd_in	arch/arm/dts/am437x-sk-evm.dts	/^			lcd_in: endpoint {$/;"	l
lcd_in	arch/arm/dts/am43x-epos-evm.dts	/^			lcd_in: endpoint {$/;"	l
lcd_init	arch/arm/dts/am335x-rut.dts	/^	lcd_init: lcd@0 {$/;"	l
lcd_init	board/esd/common/lcd.c	/^int lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,$/;"	f	typeref:typename:int
lcd_init	common/lcd.c	/^static int lcd_init(void *lcdbase)$/;"	f	typeref:typename:int	file:
lcd_init	drivers/video/da8xx-fb.c	/^static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,$/;"	f	typeref:typename:int	file:
lcd_init_console	common/lcd_console.c	/^void lcd_init_console(void *address, int vl_cols, int vl_rows, int vl_rot)$/;"	f	typeref:typename:void
lcd_init_console_rot	common/lcd_console.c	/^void __weak lcd_init_console_rot(struct console_t *pcons)$/;"	f	typeref:typename:void __weak
lcd_init_console_rot	common/lcd_console_rotation.c	/^void lcd_init_console_rot(struct console_t *pcons)$/;"	f	typeref:typename:void
lcd_is_enabled	common/lcd.c	/^char lcd_is_enabled = 0;$/;"	v	typeref:typename:char
lcd_lccr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	lcd_lccr;$/;"	m	struct:lcd	typeref:typename:uint
lcd_lcfaa	arch/powerpc/include/asm/8xx_immap.h	/^	uint	lcd_lcfaa;$/;"	m	struct:lcd	typeref:typename:uint
lcd_lcfba	arch/powerpc/include/asm/8xx_immap.h	/^	uint	lcd_lcfba;$/;"	m	struct:lcd	typeref:typename:uint
lcd_lchcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	lcd_lchcr;$/;"	m	struct:lcd	typeref:typename:uint
lcd_lcsr	arch/powerpc/include/asm/8xx_immap.h	/^	char	lcd_lcsr;$/;"	m	struct:lcd	typeref:typename:char
lcd_lcvcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	lcd_lcvcr;$/;"	m	struct:lcd	typeref:typename:uint
lcd_line_length	common/lcd.c	/^int lcd_line_length;$/;"	v	typeref:typename:int
lcd_logo	common/lcd.c	/^static void lcd_logo(void)$/;"	f	typeref:typename:void	file:
lcd_logo_plot	common/lcd.c	/^static inline void lcd_logo_plot(int x, int y) {}$/;"	f	typeref:typename:void	file:
lcd_logo_plot	common/lcd.c	/^void lcd_logo_plot(int x, int y)$/;"	f	typeref:typename:void
lcd_logo_set_cmap	common/lcd.c	/^__weak void lcd_logo_set_cmap(void)$/;"	f	typeref:typename:__weak void
lcd_logo_set_cmap	drivers/video/atmel_lcdfb.c	/^void lcd_logo_set_cmap(void)$/;"	f	typeref:typename:void
lcd_logo_set_cmap	drivers/video/mpc8xx_lcd.c	/^void lcd_logo_set_cmap(void)$/;"	f	typeref:typename:void
lcd_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const lcd_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
lcd_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const lcd_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
lcd_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const lcd_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
lcd_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const lcd_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
lcd_panel	arch/arm/dts/tegra20-colibri.dts	/^	lcd_panel: panel {$/;"	l
lcd_panel	arch/arm/dts/tegra20-medcom-wide.dts	/^	lcd_panel: panel {$/;"	l
lcd_panel	arch/arm/dts/tegra20-paz00.dts	/^	lcd_panel: panel {$/;"	l
lcd_panel	arch/arm/dts/tegra20-tec.dts	/^	lcd_panel: panel {$/;"	l
lcd_panel	board/davinci/ea20/ea20.c	/^static const struct da8xx_panel lcd_panel = {$/;"	v	typeref:typename:const struct da8xx_panel	file:
lcd_panel	drivers/video/da8xx-fb.c	/^static const struct da8xx_panel *lcd_panel;$/;"	v	typeref:typename:const struct da8xx_panel *	file:
lcd_panel_info	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	void				*lcd_panel_info;$/;"	m	struct:exynos_platform_mipi_dsim	typeref:typename:void *
lcd_panel_name	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	char				lcd_panel_name[PANEL_NAME_SIZE];$/;"	m	struct:exynos_platform_mipi_dsim	typeref:typename:char[]
lcd_panel_spi_write	drivers/video/hitachi_tx18d42vm_lcd.c	/^static void lcd_panel_spi_write(int cs, int clk, int mosi,$/;"	f	typeref:typename:void	file:
lcd_panels	board/siemens/pxm2/board.c	/^static struct da8xx_panel lcd_panels[] = {$/;"	v	typeref:struct:da8xx_panel[]	file:
lcd_panels	board/siemens/rut/board.c	/^static struct da8xx_panel lcd_panels[] = {$/;"	v	typeref:struct:da8xx_panel[]	file:
lcd_pclk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_pclk;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_pclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_pclk;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux lcd_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
lcd_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux lcd_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
lcd_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux lcd_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
lcd_pins	arch/arm/dts/am437x-gp-evm.dts	/^	lcd_pins: lcd_pins {$/;"	l
lcd_pins	arch/arm/dts/am437x-sk-evm.dts	/^	lcd_pins: lcd_pins {$/;"	l
lcd_pins	board/davinci/ea20/ea20.c	/^const struct pinmux_config lcd_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
lcd_pins_default	arch/arm/dts/am335x-evmsk.dts	/^	lcd_pins_default: lcd_pins_default {$/;"	l
lcd_pins_s0	arch/arm/dts/am335x-evm.dts	/^	lcd_pins_s0: lcd_pins_s0 {$/;"	l
lcd_pins_s0	arch/arm/dts/am335x-pxm2.dtsi	/^	lcd_pins_s0: lcd_pins_s0 {$/;"	l
lcd_pins_s0	arch/arm/dts/am335x-rut.dts	/^	lcd_pins_s0: lcd_pins_s0 {$/;"	l
lcd_pins_sleep	arch/arm/dts/am335x-evmsk.dts	/^	lcd_pins_sleep: lcd_pins_sleep {$/;"	l
lcd_position_cursor	common/lcd_console.c	/^void lcd_position_cursor(unsigned col, unsigned row)$/;"	f	typeref:typename:void
lcd_power	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*lcd_power)(void);$/;"	m	struct:exynos_platform_mipi_dsim	typeref:typename:int (*)(void)
lcd_power	board/samsung/trats/trats.c	/^int lcd_power(void)$/;"	f	typeref:typename:int
lcd_printf	common/lcd_console.c	/^void lcd_printf(const char *fmt, ...)$/;"	f	typeref:typename:void
lcd_putc	common/lcd_console.c	/^void lcd_putc(const char c)$/;"	f	typeref:typename:void
lcd_putc_xy0	common/lcd_console.c	/^static void lcd_putc_xy0(struct console_t *pcons, ushort x, ushort y, char c)$/;"	f	typeref:typename:void	file:
lcd_putc_xy180	common/lcd_console_rotation.c	/^static void lcd_putc_xy180(struct console_t *pcons, ushort x, ushort y, char c)$/;"	f	typeref:typename:void	file:
lcd_putc_xy270	common/lcd_console_rotation.c	/^static void lcd_putc_xy270(struct console_t *pcons, ushort x, ushort y, char c)$/;"	f	typeref:typename:void	file:
lcd_putc_xy90	common/lcd_console_rotation.c	/^static void lcd_putc_xy90(struct console_t *pcons, ushort x, ushort y, char c)$/;"	f	typeref:typename:void	file:
lcd_puts	common/lcd_console.c	/^void lcd_puts(const char *s)$/;"	f	typeref:typename:void
lcd_regs	board/creative/xfi3/xfi3.c	/^} lcd_regs[] = {$/;"	v	typeref:typename:const struct __anond31a65320108[]
lcd_regs	board/sandisk/sansa_fuze_plus/sfp.c	/^} lcd_regs[] = {$/;"	v	typeref:typename:const struct __anon24bc4dd30108[]
lcd_reset	drivers/video/da8xx-fb.c	/^static void lcd_reset(struct da8xx_fb_par *par)$/;"	f	typeref:typename:void	file:
lcd_revision	drivers/video/da8xx-fb.c	/^static unsigned int lcd_revision;$/;"	v	typeref:typename:unsigned int	file:
lcd_rgb666_pins	arch/arm/dts/sun5i-a13.dtsi	/^	lcd_rgb666_pins: lcd_rgb666@0 {$/;"	l
lcd_set_cmap	common/lcd.c	/^__weak void lcd_set_cmap(struct bmp_image *bmp, unsigned colors)$/;"	f	typeref:typename:__weak void
lcd_set_cmap	drivers/video/atmel_lcdfb.c	/^void lcd_set_cmap(struct bmp_image *bmp, unsigned colors)$/;"	f	typeref:typename:void
lcd_set_col	common/lcd_console.c	/^void lcd_set_col(short col)$/;"	f	typeref:typename:void
lcd_set_flush_dcache	common/lcd.c	/^void lcd_set_flush_dcache(int flush)$/;"	f	typeref:typename:void
lcd_set_row	common/lcd_console.c	/^void lcd_set_row(short row)$/;"	f	typeref:typename:void
lcd_setbgcolor	common/lcd.c	/^static void lcd_setbgcolor(int color)$/;"	f	typeref:typename:void	file:
lcd_setcolreg	board/compulab/common/omap3_display.c	/^void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {}$/;"	f	typeref:typename:void
lcd_setcolreg	drivers/video/atmel_hlcdfb.c	/^void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)$/;"	f	typeref:typename:void
lcd_setcolreg	drivers/video/atmel_lcdfb.c	/^void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)$/;"	f	typeref:typename:void
lcd_setcolreg	drivers/video/mpc8xx_lcd.c	/^lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)$/;"	f	typeref:typename:void
lcd_setcolreg	drivers/video/pxa_lcd.c	/^lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)$/;"	f	typeref:typename:void
lcd_setfgcolor	common/lcd.c	/^static void lcd_setfgcolor(int color)$/;"	f	typeref:typename:void	file:
lcd_setmem	common/lcd.c	/^ulong lcd_setmem(ulong addr)$/;"	f	typeref:typename:ulong
lcd_setup	board/esd/common/lcd.c	/^void lcd_setup(int lcd, int config)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/at91sam9261ek/at91sam9261ek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/at91sam9263ek/at91sam9263ek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/at91sam9rlek/at91sam9rlek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/sama5d3xek/sama5d3xek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/atmel/sama5d4ek/sama5d4ek.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/mini-box/picosam9g45/picosam9g45.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/ronetix/pm9261/pm9261.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/ronetix/pm9263/pm9263.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_show_board_info	board/tqc/tqm8xx/tqm8xx.c	/^void lcd_show_board_info(void)$/;"	f	typeref:typename:void
lcd_size	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 lcd_size;$/;"	m	struct:panel_config	typeref:typename:u32
lcd_spi_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint lcd_spi_opt;		\/* _DISP_LCD_SPI_OPTIONS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
lcd_splash	board/bluewater/gurnard/gurnard.c	/^static void lcd_splash(int width, int height)$/;"	f	typeref:typename:void	file:
lcd_splash	common/splash.c	/^int lcd_splash(ulong addr)$/;"	f	typeref:typename:int
lcd_splash	include/splash.h	/^static inline int lcd_splash(ulong addr)$/;"	f	typeref:typename:int
lcd_start	board/zipitz2/zipitz2.c	/^inline void lcd_start(void) {};$/;"	f	typeref:typename:void
lcd_start	board/zipitz2/zipitz2.c	/^void lcd_start(void)$/;"	f	typeref:typename:void
lcd_stub_putc	common/lcd.c	/^static void lcd_stub_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void	file:
lcd_stub_puts	common/lcd.c	/^static void lcd_stub_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
lcd_sync	common/lcd.c	/^void lcd_sync(void)$/;"	f	typeref:typename:void
lcd_sync_arg	drivers/video/da8xx-fb.h	/^struct lcd_sync_arg {$/;"	s
lcd_t	arch/m68k/include/asm/coldfire/lcd.h	/^} lcd_t;$/;"	t	typeref:struct:lcd_ctrl
lcd_vsync	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int lcd_vsync;$/;"	m	struct:pad_signals	typeref:typename:int
lcd_vsync	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int lcd_vsync;$/;"	m	struct:pad_signals	typeref:typename:int
lcdbacklight	board/BuR/common/common.c	/^void lcdbacklight(int on)$/;"	f	typeref:typename:void
lcdbg_ctrl	arch/m68k/include/asm/coldfire/lcd.h	/^typedef struct lcdbg_ctrl {$/;"	s
lcdbg_t	arch/m68k/include/asm/coldfire/lcd.h	/^} lcdbg_t;$/;"	t	typeref:struct:lcdbg_ctrl
lcdc	arch/arm/dts/am33xx.dtsi	/^		lcdc: lcdc@4830e000 {$/;"	l
lcdc0_ctl	arch/arm/dts/rk3288.dtsi	/^			lcdc0_ctl: lcdc0-ctl {$/;"	l
lcdc_baseaddr	include/atmel_hlcdc.h	/^	u32	lcdc_baseaddr;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basecfg0	include/atmel_hlcdc.h	/^	u32	lcdc_basecfg0;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basecfg1	include/atmel_hlcdc.h	/^	u32	lcdc_basecfg1;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basecfg2	include/atmel_hlcdc.h	/^	u32	lcdc_basecfg2;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basecfg3	include/atmel_hlcdc.h	/^	u32	lcdc_basecfg3;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basecfg4	include/atmel_hlcdc.h	/^	u32	lcdc_basecfg4;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basecher	include/atmel_hlcdc.h	/^	u32	lcdc_basecher;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basectrl	include/atmel_hlcdc.h	/^	u32	lcdc_basectrl;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_baseidr	include/atmel_hlcdc.h	/^	u32	lcdc_baseidr;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_basenext	include/atmel_hlcdc.h	/^	u32	lcdc_basenext;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_clk	arch/arm/dts/sama5d2.dtsi	/^					lcdc_clk: lcdc_clk@45 {$/;"	l
lcdc_clk	drivers/video/da8xx-fb.c	/^	struct clk *lcdc_clk;$/;"	m	struct:da8xx_fb_par	typeref:struct:clk *	file:
lcdc_dma_start	drivers/video/da8xx-fb.c	/^static void lcdc_dma_start(void)$/;"	f	typeref:typename:void	file:
lcdc_irq_handler	drivers/video/da8xx-fb.c	/^static u32 lcdc_irq_handler(void)$/;"	f	typeref:typename:u32	file:
lcdc_irq_handler_rev01	drivers/video/da8xx-fb.c	/^static u32 lcdc_irq_handler_rev01(void)$/;"	f	typeref:typename:u32	file:
lcdc_irq_handler_rev02	drivers/video/da8xx-fb.c	/^static u32 lcdc_irq_handler_rev02(void)$/;"	f	typeref:typename:u32	file:
lcdc_lcdcfg0	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg0;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdcfg1	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg1;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdcfg2	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg2;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdcfg3	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg3;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdcfg4	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg4;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdcfg5	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg5;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdcfg6	include/atmel_hlcdc.h	/^	u32	lcdc_lcdcfg6;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcddis	include/atmel_hlcdc.h	/^	u32	lcdc_lcddis;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcden	include/atmel_hlcdc.h	/^	u32	lcdc_lcden;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdidr	include/atmel_hlcdc.h	/^	u32	lcdc_lcdidr;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_lcdsr	include/atmel_hlcdc.h	/^	u32	lcdc_lcdsr;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
lcdc_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux lcdc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
lcdc_read	drivers/video/da8xx-fb.c	/^static inline unsigned int lcdc_read(u32 *addr)$/;"	f	typeref:typename:unsigned int	file:
lcdc_readl	drivers/video/atmel_hlcdfb.c	/^#define lcdc_readl(/;"	d	file:
lcdc_readl	drivers/video/atmel_lcdfb.c	/^#define lcdc_readl(/;"	d	file:
lcdc_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct lcdc_regs {$/;"	s
lcdc_write	drivers/video/da8xx-fb.c	/^static inline void lcdc_write(unsigned int val, u32 *addr)$/;"	f	typeref:typename:void	file:
lcdc_writel	drivers/video/atmel_hlcdfb.c	/^#define lcdc_writel(/;"	d	file:
lcdc_writel	drivers/video/atmel_lcdfb.c	/^#define lcdc_writel(/;"	d	file:
lcdcclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int lcdcclkstctrl;	\/* offset 0x148 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
lcdcfg1	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	lcdcfg1;	\/* 0x98: APB_MISC_GP_LCDCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
lcdcfg1	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	lcdcfg1;	\/* 0xA4: APB_MISC_GP_LCDCFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
lcdcfg2	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	lcdcfg2;	\/* 0x9C: APB_MISC_GP_LCDCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
lcdcfg2	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	lcdcfg2;	\/* 0xA8: APB_MISC_GP_LCDCFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
lcdck	arch/arm/dts/sama5d2.dtsi	/^					lcdck: lcdck@3 {$/;"	l	label:pmc
lcdclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 lcdclk_ctrl;	\/* LCD Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
lcdclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int lcdclkctrl;	\/* offset 0x18 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
lcdclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int lcdclkctrl;	\/* offset 0x820 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
lcdcon1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdcon1;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdcon2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdcon2;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdcon3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdcon3;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdcon4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdcon4;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdcon5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdcon5;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdcrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 lcdcrc;		\/* 0x04C *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
lcddma_ctrl	drivers/video/am335x-fb.c	/^	unsigned int		lcddma_ctrl;		\/* 0x40 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lcddma_fb0_base	drivers/video/am335x-fb.c	/^	unsigned int		lcddma_fb0_base;	\/* 0x44 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lcddma_fb0_ceiling	drivers/video/am335x-fb.c	/^	unsigned int		lcddma_fb0_ceiling;	\/* 0x48 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lcddma_fb1_base	drivers/video/am335x-fb.c	/^	unsigned int		lcddma_fb1_base;	\/* 0x4C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lcddma_fb1_ceiling	drivers/video/am335x-fb.c	/^	unsigned int		lcddma_fb1_ceiling;	\/* 0x50 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lcdgw_ctrl	arch/m68k/include/asm/coldfire/lcd.h	/^typedef struct lcdgw_ctrl {$/;"	s
lcdgw_t	arch/m68k/include/asm/coldfire/lcd.h	/^} lcdgw_t;$/;"	t	typeref:struct:lcdgw_ctrl
lcdhw	drivers/video/am335x-fb.c	/^static struct am335x_lcdhw *lcdhw = (void *)LCD_CNTL_BASE;$/;"	v	typeref:struct:am335x_lcdhw *	file:
lcdif	arch/arm/dts/imx6dl.dtsi	/^			lcdif: lcdif@020f8000 {$/;"	l	label:aips1
lcdif	arch/arm/dts/imx6ull.dtsi	/^			lcdif: lcdif@021c8000 {$/;"	l
lcdif_power_down	drivers/video/mxsfb.c	/^void lcdif_power_down(void)$/;"	f	typeref:typename:void
lcdintmsk	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdintmsk;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdintpnd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdintpnd;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdlr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 lcdlr[3];		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32[3]
lcdlr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 lcdlr[3];        \/* DATX8 local calibrated delay line reg *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[3]
lcdlr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 lcdlr[3];		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32[3]
lcdlr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 lcdlr[3];        \/* DATX8 local calibrated delay line reg *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32[3]
lcdpower	board/BuR/common/common.c	/^void lcdpower(int on)$/;"	f	typeref:typename:void
lcdrot	include/lcd_console.h	/^	u32 lcdsizex, lcdsizey, lcdrot;$/;"	m	struct:console_t	typeref:typename:u32
lcdsaddr1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdsaddr1;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdsaddr2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdsaddr2;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdsaddr3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdsaddr3;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lcdsizex	include/lcd_console.h	/^	u32 lcdsizex, lcdsizey, lcdrot;$/;"	m	struct:console_t	typeref:typename:u32
lcdsizey	include/lcd_console.h	/^	u32 lcdsizex, lcdsizey, lcdrot;$/;"	m	struct:console_t	typeref:typename:u32
lcdsrcpnd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lcdsrcpnd;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lckcr	drivers/spi/fsl_qspi.h	/^	u32 lckcr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
lckr	drivers/gpio/stm32_gpio.c	/^	u32 lckr;	\/* GPIO port configuration lock *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
lclk_clk	arch/powerpc/include/asm/global_data.h	/^	u32 lclk_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
lcol	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 lcol;$/;"	m	struct:at91_emac	typeref:typename:u32
lcount	arch/xtensa/include/asm/ptrace.h	/^	unsigned long lcount;		\/*  40 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
lcpr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lcpr;	\/* Cursor Position *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lcr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^	uint32_t	lcr;$/;"	m	struct:pxa_uart_regs	typeref:typename:uint32_t
lcr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int lcr; \/* Line control register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
lcr	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 lcr;	\/* 0x24 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
lcr	arch/arm/include/asm/arch/rsb.h	/^	u32 lcr;	\/* 0x24 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
lcr	arch/blackfin/include/asm/serial1.h	/^	u16 lcr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
lcr	drivers/serial/serial_bcm283x_mu.c	/^	u32 lcr;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
lcr_mcr	drivers/serial/serial_uniphier.c	/^	u32 lcr_mcr;		\/* Line\/Modem Control Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
lcrr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lcrr;           \/* LBC Clock Ratio *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lcsbacsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lcsbacsr;	\/* Local Configuration Space BACSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
lcsbacsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lcsbacsr;	\/* 0xc005c - Local Configuration Space Base Address Command and Status Register/;"	m	struct:ccsr_rio	typeref:typename:uint
lctl	drivers/i2c/i2c-uniphier-f.c	/^	u32 lctl;			\/* clock low period control *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
lcwhb	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lcwhb;	\/* Cursor Width Height and Blink *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lcyc	arch/powerpc/cpu/mpc8xx/video.c	/^			lcyc:11,	\/* Loop\/video cycles *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:11	file:
ld4_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^ld4_end:$/;"	l
ld6b_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^ld6b_end:$/;"	l
ld9040_cfg_ldo	drivers/video/ld9040.c	/^void ld9040_cfg_ldo(void)$/;"	f	typeref:typename:void
ld9040_enable_ldo	drivers/video/ld9040.c	/^void ld9040_enable_ldo(unsigned int onoff)$/;"	f	typeref:typename:void
ld9040_spi_write	drivers/video/ld9040.c	/^static void ld9040_spi_write(const unsigned char *wbuf, unsigned int size_cmd)$/;"	f	typeref:typename:void	file:
ld_le16	arch/m68k/include/asm/byteorder.h	/^static __inline__ unsigned ld_le16(const volatile unsigned short *addr)$/;"	f	typeref:typename:unsigned
ld_le16	arch/powerpc/include/asm/byteorder.h	/^static __inline__ unsigned ld_le16(const volatile unsigned short *addr)$/;"	f	typeref:typename:unsigned
ld_le32	arch/m68k/include/asm/byteorder.h	/^static __inline__ unsigned ld_le32(const volatile unsigned *addr)$/;"	f	typeref:typename:unsigned
ld_le32	arch/powerpc/include/asm/byteorder.h	/^static __inline__ unsigned ld_le32(const volatile unsigned *addr)$/;"	f	typeref:typename:unsigned
ld_seg	disk/part_iso.h	/^	unsigned char ld_seg[2];		\/* Load segment (flat model=addr\/10) *\/$/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char[2]
ldb	arch/arm/dts/imx6qdl.dtsi	/^			ldb: ldb@020e0008 {$/;"	l
ldb_clk	drivers/video/ipu_common.c	/^static struct clk ldb_clk = {$/;"	v	typeref:struct:clk	file:
ldb_di_clock	arch/arm/include/asm/arch-mx6/clock.h	/^enum ldb_di_clock {$/;"	g
ldc	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ldc;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ldcmd	include/pxa_lcd.h	/^	u_long	ldcmd;		\/* Command register *\/$/;"	m	struct:pxafb_dma_descriptor	typeref:typename:u_long
ldcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ldcr;	\/* DMA Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
ldev	board/mpl/common/isa.h	/^	const uchar ldev;$/;"	m	struct:__anonabff7a9f0208	typeref:typename:const uchar
ldev_table	board/mpl/common/isa.h	/^	const SIO_LOGDEV_TABLE *ldev_table;$/;"	m	struct:__anonabff7a9f0208	typeref:typename:const SIO_LOGDEV_TABLE *
ldflags	scripts/kconfig/lxdialog/check-lxdialog.sh	/^ldflags()$/;"	f
ldflags-$(CONFIG_MCF5441x)	arch/m68k/Makefile	/^ldflags-$(CONFIG_MCF5441x)	:= --got=single$/;"	m
ldflags-$(CONFIG_MCF5445x)	arch/m68k/Makefile	/^ldflags-$(CONFIG_MCF5445x)	:= --got=single$/;"	m
ldflags-$(CONFIG_MCF547x_8x)	arch/m68k/Makefile	/^ldflags-$(CONFIG_MCF547x_8x)	:= --got=single$/;"	m
ldi_cmdcon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int ldi_cmdcon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
ldi_cmdcon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int ldi_cmdcon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
ldiv	lib/ldiv.c	/^ldiv (long int numer, long int denom)$/;"	f	typeref:typename:ldiv_t
ldiv_t	board/mpl/mip405/mip405.c	/^} ldiv_t;$/;"	t	typeref:struct:__anon0274db920108	file:
ldiv_t	board/mpl/pip405/pip405.c	/^} ldiv_t;$/;"	t	typeref:struct:__anonb110a3780108	file:
ldiv_t	disk/part_mac.c	/^} ldiv_t;$/;"	t	typeref:struct:__anon2bd24a970108	file:
ldiv_t	lib/ldiv.c	/^} ldiv_t;$/;"	t	typeref:struct:__anon478c5e8b0108	file:
ldo1	arch/arm/dts/am437x-gp-evm.dts	/^		ldo1: regulator-ldo1 {$/;"	l	label:tps65218
ldo1	arch/arm/dts/am437x-sk-evm.dts	/^		ldo1: regulator-ldo1 {$/;"	l
ldo1	arch/arm/dts/am43x-epos-evm.dts	/^		ldo1: regulator-ldo1 {$/;"	l	label:tps65218
ldo10_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo10_reg: LDO10 {$/;"	l
ldo10_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo10_reg: LDO10 {$/;"	l
ldo10_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo10_reg: LDO10 {$/;"	l
ldo10_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo10_reg: LDO10 {$/;"	l	label:max77686
ldo10_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo10_reg: LDO10 {$/;"	l
ldo11_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo11_reg: LDO11 {$/;"	l
ldo11_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo11_reg: LDO11 {$/;"	l
ldo11_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo11_reg: LDO11 {$/;"	l
ldo11_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo11_reg: LDO11 {$/;"	l
ldo12_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo12_reg: LDO12 {$/;"	l
ldo12_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo12_reg: LDO12 {$/;"	l
ldo12_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo12_reg: LDO12 {$/;"	l
ldo12_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo12_reg: LDO12 {$/;"	l	label:max77686
ldo12_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo12_reg: LDO12 {$/;"	l
ldo13_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo13_reg: LDO13 {$/;"	l
ldo13_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo13_reg: LDO13 {$/;"	l
ldo13_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo13_reg: LDO13 {$/;"	l
ldo13_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo13_reg: LDO13 {$/;"	l
ldo14_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo14_reg: LDO14 {$/;"	l
ldo14_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo14_reg: LDO14 {$/;"	l
ldo14_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo14_reg: LDO14 {$/;"	l
ldo14_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo14_reg: LDO14 {$/;"	l	label:max77686
ldo14_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo14_reg: LDO14 {$/;"	l
ldo15_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo15_reg: LDO15 {$/;"	l
ldo15_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo15_reg: LDO15 {$/;"	l
ldo15_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo15_reg: LDO15 {$/;"	l
ldo15_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo15_reg: LDO15 {$/;"	l	label:max77686
ldo15_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo15_reg: LDO15 {$/;"	l
ldo16_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo16_reg: LDO16 {$/;"	l
ldo16_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo16_reg: LDO16 {$/;"	l
ldo16_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo16_reg: LDO16 {$/;"	l
ldo16_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo16_reg: LDO16 {$/;"	l	label:max77686
ldo16_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo16_reg: LDO16 {$/;"	l
ldo17_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo17_reg: LDO17 {$/;"	l
ldo17_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo17_reg: LDO17 {$/;"	l
ldo17_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo17_reg: LDO17 {$/;"	l	label:max77686
ldo17_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo17_reg: LDO17 {$/;"	l
ldo18_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo18_reg: LDO18 {$/;"	l
ldo19_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo19_reg: LDO19 {$/;"	l
ldo1_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		ldo1_reg: regulator@3 {$/;"	l
ldo1_reg	arch/arm/dts/am335x-rut.dts	/^		ldo1_reg: regulator@3 {$/;"	l
ldo1_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				ldo1_reg: ldo1 {$/;"	l	label:tps659038
ldo1_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldo1_reg: ldo1 {$/;"	l	label:tps659038
ldo1_reg	arch/arm/dts/dra7-evm.dts	/^				ldo1_reg: ldo1 {$/;"	l	label:tps659038
ldo1_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				ldo1_reg: ldo1 {$/;"	l	label:tps65917.tps65917_regulators
ldo1_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo1_reg: LDO1 {$/;"	l
ldo1_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo1_reg: LDO1 {$/;"	l
ldo1_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo1_reg: LDO1 {$/;"	l
ldo1_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo1_reg: LDO1 {$/;"	l	label:max77686
ldo1_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo1_reg: ldo1 {$/;"	l	label:pmic
ldo1_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo1_reg: ldo1 {$/;"	l	label:pmic
ldo1_reg	arch/arm/dts/tps65217.dtsi	/^		ldo1_reg: regulator@3 {$/;"	l
ldo20_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo20_reg: LDO20 {$/;"	l
ldo20_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo20_reg: LDO20 {$/;"	l
ldo21_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo21_reg: LDO21 {$/;"	l
ldo21_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo21_reg: LDO21 {$/;"	l
ldo22_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo22_reg: LDO22 {$/;"	l
ldo22_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo22_reg: LDO22 {$/;"	l
ldo23_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo23_reg: LDO23 {$/;"	l
ldo24_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo24_reg: LDO24 {$/;"	l
ldo25_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo25_reg: LDO25 {$/;"	l
ldo25_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo25_reg: LDO25 {$/;"	l
ldo25_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo25_reg: LDO25 {$/;"	l
ldo26_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo26_reg: LDO26 {$/;"	l
ldo2_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		ldo2_reg: regulator@4 {$/;"	l
ldo2_reg	arch/arm/dts/am335x-rut.dts	/^		ldo2_reg: regulator@4 {$/;"	l
ldo2_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				ldo2_reg: ldo2 {$/;"	l	label:tps659038
ldo2_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldo2_reg: ldo2 {$/;"	l	label:tps659038
ldo2_reg	arch/arm/dts/dra7-evm.dts	/^				ldo2_reg: ldo2 {$/;"	l	label:tps659038
ldo2_reg	arch/arm/dts/dra72-evm-revc.dts	/^	ldo2_reg: ldo2 {$/;"	l
ldo2_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo2_reg: LDO2 {$/;"	l
ldo2_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo2_reg: LDO2 {$/;"	l
ldo2_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo2_reg: LDO2 {$/;"	l
ldo2_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo2_reg: LDO2 {$/;"	l	label:max77686
ldo2_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo2_reg: ldo2 {$/;"	l	label:pmic
ldo2_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo2_reg: ldo2 {$/;"	l	label:pmic
ldo2_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo2_reg: ldo2 {$/;"	l	label:pmic
ldo2_reg	arch/arm/dts/tps65217.dtsi	/^		ldo2_reg: regulator@4 {$/;"	l
ldo3_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		ldo3_reg: regulator@5 {$/;"	l
ldo3_reg	arch/arm/dts/am335x-rut.dts	/^		ldo3_reg: regulator@5 {$/;"	l
ldo3_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				ldo3_reg: ldo3 {$/;"	l	label:tps659038
ldo3_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldo3_reg: ldo3 {$/;"	l	label:tps659038
ldo3_reg	arch/arm/dts/dra7-evm.dts	/^				ldo3_reg: ldo3 {$/;"	l	label:tps659038
ldo3_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				ldo3_reg: ldo3 {$/;"	l	label:tps65917.tps65917_regulators
ldo3_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo3_reg: LDO3 {$/;"	l
ldo3_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo3_reg: LDO3 {$/;"	l
ldo3_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo3_reg: LDO3 {$/;"	l
ldo3_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo3_reg: LDO3 {$/;"	l	label:max77686
ldo3_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo3_reg: ldo3 {$/;"	l	label:pmic
ldo3_reg	arch/arm/dts/tps65217.dtsi	/^		ldo3_reg: regulator@5 {$/;"	l
ldo4_reg	arch/arm/dts/am335x-bone-common.dtsi	/^		ldo4_reg: regulator@6 {$/;"	l
ldo4_reg	arch/arm/dts/am335x-rut.dts	/^		ldo4_reg: regulator@6 {$/;"	l
ldo4_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldo4_reg: ldo4 {$/;"	l	label:tps659038
ldo4_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				ldo4_reg: ldo4 {$/;"	l	label:tps65917.tps65917_regulators
ldo4_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo4_reg: LDO4 {$/;"	l
ldo4_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo4_reg: LDO4 {$/;"	l
ldo4_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo4_reg: LDO4 {$/;"	l
ldo4_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo4_reg: LDO4 {$/;"	l
ldo4_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo4_reg: ldo4 {$/;"	l	label:pmic
ldo4_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo4_reg: ldo4 {$/;"	l	label:pmic
ldo4_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo4_reg: ldo4 {$/;"	l	label:pmic
ldo4_reg	arch/arm/dts/tps65217.dtsi	/^		ldo4_reg: regulator@6 {$/;"	l
ldo5	arch/arm/dts/rk3288-popmetal.dtsi	/^			ldo5: LDO_REG5 {$/;"	l
ldo5_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				ldo5_reg: ldo5 {$/;"	l	label:tps65917.tps65917_regulators
ldo5_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo5_reg: LDO5 {$/;"	l
ldo5_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo5_reg: LDO5 {$/;"	l
ldo5_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo5_reg: LDO5 {$/;"	l
ldo5_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo5_reg: LDO5 {$/;"	l
ldo5_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo5_reg: ldo5 {$/;"	l	label:pmic
ldo5_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo5_reg: ldo5 {$/;"	l	label:pmic
ldo5_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo5_reg: ldo5 {$/;"	l	label:pmic
ldo6_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo6_reg: LDO6 {$/;"	l
ldo6_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo6_reg: LDO6 {$/;"	l
ldo6_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo6_reg: LDO6 {$/;"	l
ldo6_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo6_reg: LDO6 {$/;"	l
ldo6_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo6_reg: ldo6 {$/;"	l	label:pmic
ldo6_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo6_reg: ldo6 {$/;"	l	label:pmic
ldo6_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo6_reg: ldo6 {$/;"	l	label:pmic
ldo7_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo7_reg: LDO7 {$/;"	l
ldo7_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo7_reg: LDO7 {$/;"	l
ldo7_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo7_reg: LDO7 {$/;"	l
ldo7_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo7_reg: LDO7 {$/;"	l	label:max77686
ldo7_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo7_reg: LDO7 {$/;"	l
ldo7_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo7_reg: ldo7 {$/;"	l	label:pmic
ldo7_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo7_reg: ldo7 {$/;"	l	label:pmic
ldo7_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo7_reg: ldo7 {$/;"	l	label:pmic
ldo8_reg	arch/arm/dts/exynos4412-odroid.dts	/^				ldo8_reg: LDO8 {$/;"	l
ldo8_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo8_reg: LDO8 {$/;"	l
ldo8_reg	arch/arm/dts/exynos5250-smdk5250.dts	/^			ldo8_reg: LDO8 {$/;"	l
ldo8_reg	arch/arm/dts/exynos5250-snow.dts	/^			ldo8_reg: LDO8 {$/;"	l	label:max77686
ldo8_reg	arch/arm/dts/exynos5250-spring.dts	/^			ldo8_reg: LDO8 {$/;"	l
ldo8_reg	arch/arm/dts/tegra30-apalis.dts	/^				ldo8_reg: ldo8 {$/;"	l	label:pmic
ldo8_reg	arch/arm/dts/tegra30-beaver.dts	/^				ldo8_reg: ldo8 {$/;"	l	label:pmic
ldo8_reg	arch/arm/dts/tegra30-cardhu.dts	/^				ldo8_reg: ldo8 {$/;"	l	label:pmic
ldo9_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				ldo9_reg: ldo9 {$/;"	l	label:tps659038
ldo9_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldo9_reg: ldo9 {$/;"	l	label:tps659038
ldo9_reg	arch/arm/dts/dra7-evm.dts	/^				ldo9_reg: ldo9 {$/;"	l	label:tps659038
ldo9_reg	arch/arm/dts/exynos4412-trats2.dts	/^				ldo9_reg: LDO9 {$/;"	l
ldo_current_range	drivers/power/regulator/sandbox.c	/^static struct output_range ldo_current_range[] = {$/;"	v	typeref:struct:output_range[]	file:
ldo_get_current	drivers/power/regulator/sandbox.c	/^static int ldo_get_current(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_enable	drivers/power/regulator/lp873x_regulator.c	/^static bool ldo_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
ldo_get_enable	drivers/power/regulator/max77686.c	/^static bool ldo_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
ldo_get_enable	drivers/power/regulator/palmas_regulator.c	/^static bool ldo_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
ldo_get_enable	drivers/power/regulator/rk808.c	/^static bool ldo_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
ldo_get_enable	drivers/power/regulator/s5m8767.c	/^static bool ldo_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
ldo_get_enable	drivers/power/regulator/sandbox.c	/^static bool ldo_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
ldo_get_mode	drivers/power/regulator/max77686.c	/^static int ldo_get_mode(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_value	drivers/power/regulator/lp873x_regulator.c	/^static int ldo_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_value	drivers/power/regulator/max77686.c	/^static int ldo_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_value	drivers/power/regulator/palmas_regulator.c	/^static int ldo_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_value	drivers/power/regulator/rk808.c	/^static int ldo_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_value	drivers/power/regulator/s5m8767.c	/^static int ldo_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_get_voltage	drivers/power/regulator/sandbox.c	/^static int ldo_get_voltage(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ldo_param	drivers/power/regulator/s5m8767.c	/^static const struct s5m8767_para ldo_param[] = {$/;"	v	typeref:typename:const struct s5m8767_para[]	file:
ldo_reg	arch/arm/cpu/armv7/mx6/soc.c	/^enum ldo_reg {$/;"	g	file:
ldo_set_current	drivers/power/regulator/sandbox.c	/^static int ldo_set_current(struct udevice *dev, int uA)$/;"	f	typeref:typename:int	file:
ldo_set_enable	drivers/power/regulator/lp873x_regulator.c	/^static int ldo_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
ldo_set_enable	drivers/power/regulator/max77686.c	/^static int ldo_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
ldo_set_enable	drivers/power/regulator/palmas_regulator.c	/^static int ldo_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
ldo_set_enable	drivers/power/regulator/rk808.c	/^static int ldo_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
ldo_set_enable	drivers/power/regulator/s5m8767.c	/^static int ldo_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
ldo_set_enable	drivers/power/regulator/sandbox.c	/^static int ldo_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
ldo_set_mode	drivers/power/regulator/max77686.c	/^static int ldo_set_mode(struct udevice *dev, int mode)$/;"	f	typeref:typename:int	file:
ldo_set_value	drivers/power/regulator/lp873x_regulator.c	/^static int ldo_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
ldo_set_value	drivers/power/regulator/max77686.c	/^static int ldo_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
ldo_set_value	drivers/power/regulator/palmas_regulator.c	/^static int ldo_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
ldo_set_value	drivers/power/regulator/rk808.c	/^static int ldo_set_value(struct udevice *dev, int uvolt)$/;"	f	typeref:typename:int	file:
ldo_set_value	drivers/power/regulator/s5m8767.c	/^static int ldo_set_value(struct udevice *dev, int uv)$/;"	f	typeref:typename:int	file:
ldo_set_voltage	drivers/power/regulator/sandbox.c	/^static int ldo_set_voltage(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
ldo_v1	drivers/power/regulator/s5m8767.c	/^static const struct sec_voltage_desc ldo_v1 = {$/;"	v	typeref:typename:const struct sec_voltage_desc	file:
ldo_v2	drivers/power/regulator/s5m8767.c	/^static const struct sec_voltage_desc ldo_v2 = {$/;"	v	typeref:typename:const struct sec_voltage_desc	file:
ldo_voltage_range	drivers/power/regulator/sandbox.c	/^static struct output_range ldo_voltage_range[] = {$/;"	v	typeref:struct:output_range[]	file:
ldoln_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				ldoln_reg: ldoln {$/;"	l	label:tps659038
ldoln_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldoln_reg: ldoln {$/;"	l	label:tps659038
ldoln_reg	arch/arm/dts/dra7-evm.dts	/^				ldoln_reg: ldoln {$/;"	l	label:tps659038
ldortc_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldortc_reg: ldortc {$/;"	l	label:tps659038
ldousb_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				ldousb_reg: ldousb {$/;"	l	label:tps659038
ldousb_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				ldousb_reg: ldousb {$/;"	l	label:tps659038
ldousb_reg	arch/arm/dts/dra7-evm.dts	/^				ldousb_reg: ldousb {$/;"	l	label:tps659038
ldpaa_bp_add_7	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_bp_add_7(uint16_t bpid)$/;"	f	typeref:typename:int	file:
ldpaa_dpbp_drain	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_dpbp_drain(void)$/;"	f	typeref:typename:void	file:
ldpaa_dpbp_drain_cnt	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_dpbp_drain_cnt(int count)$/;"	f	typeref:typename:void	file:
ldpaa_dpbp_free	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_dpbp_free(void)$/;"	f	typeref:typename:void	file:
ldpaa_dpbp_seed	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpbp_seed(uint16_t bpid)$/;"	f	typeref:typename:int	file:
ldpaa_dpbp_setup	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpbp_setup(void)$/;"	f	typeref:typename:int	file:
ldpaa_dpmac_bind	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpmac_bind(struct ldpaa_eth_priv *priv)$/;"	f	typeref:typename:int	file:
ldpaa_dpmac_setup	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpmac_setup(struct ldpaa_eth_priv *priv)$/;"	f	typeref:typename:int	file:
ldpaa_dpmac_version_check	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpmac_version_check(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int	file:
ldpaa_dpni_bind	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv)$/;"	f	typeref:typename:int	file:
ldpaa_dpni_setup	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv)$/;"	f	typeref:typename:int	file:
ldpaa_dq	include/fsl-mc/fsl_dpaa_fd.h	/^struct ldpaa_dq {$/;"	s
ldpaa_dq_fd	drivers/net/fsl-mc/dpio/qbman_portal.c	/^const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)$/;"	f	typeref:typename:const struct dpaa_fd *
ldpaa_dq_flags	drivers/net/fsl-mc/dpio/qbman_portal.c	/^uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)$/;"	f	typeref:typename:uint32_t
ldpaa_dq_is_pull	include/fsl-mc/fsl_dpaa_fd.h	/^static inline int ldpaa_dq_is_pull(const struct ldpaa_dq *dq)$/;"	f	typeref:typename:int
ldpaa_dq_is_pull_complete	include/fsl-mc/fsl_dpaa_fd.h	/^static inline int ldpaa_dq_is_pull_complete($/;"	f	typeref:typename:int
ldpaa_eth_get_dpmac_counter	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_eth_get_dpmac_counter(struct eth_device *net_dev)$/;"	f	typeref:typename:void	file:
ldpaa_eth_get_dpni_counter	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_eth_get_dpni_counter(void)$/;"	f	typeref:typename:void	file:
ldpaa_eth_init	drivers/net/ldpaa_eth/ldpaa_eth.c	/^int ldpaa_eth_init(int dpmac_id, phy_interface_t enet_if)$/;"	f	typeref:typename:int
ldpaa_eth_netdev_init	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_eth_netdev_init(struct eth_device *net_dev,$/;"	f	typeref:typename:int	file:
ldpaa_eth_open	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ldpaa_eth_priv	drivers/net/ldpaa_eth/ldpaa_eth.h	/^struct ldpaa_eth_priv {$/;"	s
ldpaa_eth_pull_dequeue_rx	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ldpaa_eth_rx	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_eth_rx(struct ldpaa_eth_priv *priv,$/;"	f	typeref:typename:void	file:
ldpaa_eth_stop	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static void ldpaa_eth_stop(struct eth_device *net_dev)$/;"	f	typeref:typename:void	file:
ldpaa_eth_tx	drivers/net/ldpaa_eth/ldpaa_eth.c	/^static int ldpaa_eth_tx(struct eth_device *net_dev, void *buf, int len)$/;"	f	typeref:typename:int	file:
ldpaa_eth_type	drivers/net/ldpaa_eth/ldpaa_eth.h	/^enum ldpaa_eth_type {$/;"	g
ldpaa_fas	drivers/net/ldpaa_eth/ldpaa_eth.h	/^struct ldpaa_fas {$/;"	s
ldpaa_fd_get_addr	include/fsl-mc/fsl_dpaa_fd.h	/^static inline u64 ldpaa_fd_get_addr(const struct dpaa_fd *fd)$/;"	f	typeref:typename:u64
ldpaa_fd_get_bpid	include/fsl-mc/fsl_dpaa_fd.h	/^static inline uint16_t ldpaa_fd_get_bpid(const struct dpaa_fd *fd)$/;"	f	typeref:typename:uint16_t
ldpaa_fd_get_len	include/fsl-mc/fsl_dpaa_fd.h	/^static inline u32 ldpaa_fd_get_len(const struct dpaa_fd *fd)$/;"	f	typeref:typename:u32
ldpaa_fd_get_offset	include/fsl-mc/fsl_dpaa_fd.h	/^static inline uint16_t ldpaa_fd_get_offset(const struct dpaa_fd *fd)$/;"	f	typeref:typename:uint16_t
ldpaa_fd_set_addr	include/fsl-mc/fsl_dpaa_fd.h	/^static inline void ldpaa_fd_set_addr(struct dpaa_fd *fd, u64 addr)$/;"	f	typeref:typename:void
ldpaa_fd_set_bpid	include/fsl-mc/fsl_dpaa_fd.h	/^static inline void ldpaa_fd_set_bpid(struct dpaa_fd *fd, uint16_t bpid)$/;"	f	typeref:typename:void
ldpaa_fd_set_len	include/fsl-mc/fsl_dpaa_fd.h	/^static inline void ldpaa_fd_set_len(struct dpaa_fd *fd, u32 len)$/;"	f	typeref:typename:void
ldpaa_fd_set_offset	include/fsl-mc/fsl_dpaa_fd.h	/^static inline void ldpaa_fd_set_offset(struct dpaa_fd *fd, uint16_t offset)$/;"	f	typeref:typename:void
ldr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ldr;		\/* load register *\/$/;"	m	struct:rtclk83xx	typeref:typename:u32
ldr1b	arch/arm/lib/memcpy.S	/^	.macro ldr1b ptr reg cond=al abort$/;"	m
ldr1w	arch/arm/lib/memcpy.S	/^	.macro ldr1w ptr reg abort$/;"	m
ldr4w	arch/arm/lib/memcpy.S	/^	.macro ldr4w ptr reg1 reg2 reg3 reg4 abort$/;"	m
ldr8w	arch/arm/lib/memcpy.S	/^	.macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort$/;"	m
ldr_exec	cmd/bootldr.c	/^static void ldr_exec(void *addr)$/;"	f	typeref:typename:void	file:
ldr_flag	cmd/ldrinfo.c	/^struct ldr_flag {$/;"	s	file:
ldr_load	cmd/bootldr.c	/^static void ldr_load(uint8_t *base_addr)$/;"	f	typeref:typename:void	file:
ldr_memcpy	include/jffs2/load_kernel.h	/^#define ldr_memcpy	/;"	d
ldr_output_string	include/jffs2/load_kernel.h	/^#define ldr_output_string(/;"	d
ldr_strlen	include/jffs2/load_kernel.h	/^#define ldr_strlen	/;"	d
ldr_strncmp	include/jffs2/load_kernel.h	/^#define ldr_strncmp	/;"	d
ldr_valid_signature	cmd/bootldr.c	/^static bool ldr_valid_signature(uint8_t *data)$/;"	f	typeref:typename:bool	file:
ldrinfo_block	cmd/ldrinfo.c	/^static uint32_t ldrinfo_block(const void *base_addr)$/;"	f	typeref:typename:uint32_t	file:
ldrinfo_header	cmd/ldrinfo.c	/^static uint32_t ldrinfo_header(const void *addr)$/;"	f	typeref:typename:uint32_t	file:
ldval	post/lib_powerpc/fpu/darwin-ldouble.c	/^	long double ldval;$/;"	m	union:__anon31388ce3010a	typeref:typename:long double	file:
ldval0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ldval0;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval0;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ldval1;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval1;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ldval2;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval2;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ldval3;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval3;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ldval4;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval4;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval5	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ldval5;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval5;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval6	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval6;$/;"	m	struct:pit_reg	typeref:typename:u32
ldval7	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ldval7;$/;"	m	struct:pit_reg	typeref:typename:u32
le16_to_cpu	include/compiler.h	/^# define le16_to_cpu(/;"	d
le16_to_cpu	include/compiler.h	/^#define le16_to_cpu(/;"	d
le16_to_cpu	include/linux/byteorder/generic.h	/^#define le16_to_cpu /;"	d
le16_to_cpu	include/usbdevice.h	/^#define le16_to_cpu(/;"	d
le16_to_cpu	tools/easylogo/easylogo.c	/^static inline unsigned short le16_to_cpu (unsigned short val)$/;"	f	typeref:typename:unsigned short	file:
le16_to_cpup	include/linux/byteorder/generic.h	/^#define le16_to_cpup /;"	d
le16_to_cpus	include/linux/byteorder/generic.h	/^#define le16_to_cpus /;"	d
le32_to_cpu	include/compiler.h	/^# define le32_to_cpu(/;"	d
le32_to_cpu	include/compiler.h	/^#define le32_to_cpu(/;"	d
le32_to_cpu	include/linux/byteorder/generic.h	/^#define le32_to_cpu /;"	d
le32_to_cpup	include/linux/byteorder/generic.h	/^#define le32_to_cpup /;"	d
le32_to_cpus	include/linux/byteorder/generic.h	/^#define le32_to_cpus /;"	d
le32_to_int	disk/part_dos.c	/^static inline unsigned int le32_to_int(unsigned char *le32)$/;"	f	typeref:typename:unsigned int	file:
le64	tools/relocate-rela.c	/^static inline uint64_t le64(uint64_t val)$/;"	f	typeref:typename:uint64_t	file:
le64_to_cpu	include/compiler.h	/^# define le64_to_cpu(/;"	d
le64_to_cpu	include/compiler.h	/^#define le64_to_cpu(/;"	d
le64_to_cpu	include/linux/byteorder/generic.h	/^#define le64_to_cpu /;"	d
le64_to_cpup	include/linux/byteorder/generic.h	/^#define le64_to_cpup /;"	d
le64_to_cpus	include/linux/byteorder/generic.h	/^#define le64_to_cpus /;"	d
le_cd	include/zfs/zap_leaf.h	/^		uint32_t le_cd;		\/* collision differentiator *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint32_t
le_hash	include/zfs/zap_leaf.h	/^		uint64_t le_hash;		\/* hash value of the name *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint64_t
le_int_size	include/zfs/zap_leaf.h	/^		uint8_t le_int_size;		\/* size of ints *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint8_t
le_name_chunk	include/zfs/zap_leaf.h	/^		uint16_t le_name_chunk;		\/* first chunk of the name *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint16_t
le_name_length	include/zfs/zap_leaf.h	/^		uint16_t le_name_length;	\/* bytes in name, incl null *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint16_t
le_next	include/zfs/zap_leaf.h	/^		uint16_t le_next;		\/* next entry in hash chain *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint16_t
le_short	tools/bmp_logo.c	/^uint16_t le_short(uint16_t x)$/;"	f	typeref:typename:uint16_t
le_type	include/zfs/zap_leaf.h	/^		uint8_t le_type;		\/* always ZAP_CHUNK_ENTRY *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint8_t
le_value_chunk	include/zfs/zap_leaf.h	/^		uint16_t le_value_chunk;	\/* first chunk of the value *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint16_t
le_value_length	include/zfs/zap_leaf.h	/^		uint16_t le_value_length;	\/* value length in ints *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_entry	typeref:typename:uint16_t
leaf	fs/ubifs/ubifs.h	/^		void *leaf;$/;"	m	union:ubifs_zbranch::__anonf648d084100a	typeref:typename:void *
leaf_cnt	fs/ubifs/orphan.c	/^	unsigned long long leaf_cnt;$/;"	m	struct:check_info	typeref:typename:unsigned long long	file:
leapyear	drivers/rtc/date.c	/^#define	leapyear(/;"	d	file:
learn_disc	include/vsc9953.h	/^	u32	learn_disc;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
leb_cnt	fs/ubifs/ubifs-media.h	/^	__le32 leb_cnt;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
leb_cnt	fs/ubifs/ubifs-media.h	/^	__le32 leb_cnt;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
leb_cnt	fs/ubifs/ubifs.h	/^	int leb_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
leb_count	drivers/mtd/ubi/ubi.h	/^	int leb_count;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
leb_overhead	fs/ubifs/ubifs.h	/^	int leb_overhead;$/;"	m	struct:ubifs_info	typeref:typename:int
leb_read_lock	drivers/mtd/ubi/eba.c	/^static int leb_read_lock(struct ubi_device *ubi, int vol_id, int lnum)$/;"	f	typeref:typename:int	file:
leb_read_sanity_check	drivers/mtd/ubi/kapi.c	/^static int leb_read_sanity_check(struct ubi_volume_desc *desc, int lnum,$/;"	f	typeref:typename:int	file:
leb_read_unlock	drivers/mtd/ubi/eba.c	/^static void leb_read_unlock(struct ubi_device *ubi, int vol_id, int lnum)$/;"	f	typeref:typename:void	file:
leb_size	drivers/mtd/ubi/ubi.h	/^	int leb_size;$/;"	m	struct:ubi_device	typeref:typename:int
leb_size	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			leb_size;$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long
leb_size	fs/ubifs/ubifs-media.h	/^	__le32 leb_size;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
leb_size	fs/ubifs/ubifs.h	/^	int leb_size;$/;"	m	struct:ubifs_info	typeref:typename:int
leb_size	include/linux/mtd/ubi.h	/^	int leb_size;$/;"	m	struct:ubi_device_info	typeref:typename:int
leb_start	drivers/mtd/ubi/ubi.h	/^	int leb_start;$/;"	m	struct:ubi_device	typeref:typename:int
leb_start	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			leb_start;$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long
leb_start	fs/ubifs/ubifs.h	/^	int leb_start;$/;"	m	struct:ubifs_info	typeref:typename:int
leb_start	include/linux/mtd/ubi.h	/^	int leb_start;$/;"	m	struct:ubi_device_info	typeref:typename:int
leb_start	include/ubispl.h	/^	u32			leb_start;$/;"	m	struct:ubispl_info	typeref:typename:u32
leb_write_lock	drivers/mtd/ubi/eba.c	/^static int leb_write_lock(struct ubi_device *ubi, int vol_id, int lnum)$/;"	f	typeref:typename:int	file:
leb_write_trylock	drivers/mtd/ubi/eba.c	/^static int leb_write_trylock(struct ubi_device *ubi, int vol_id, int lnum)$/;"	f	typeref:typename:int	file:
leb_write_unlock	drivers/mtd/ubi/eba.c	/^static void leb_write_unlock(struct ubi_device *ubi, int vol_id, int lnum)$/;"	f	typeref:typename:void	file:
lebs_to_pebs	drivers/mtd/ubispl/ubispl.h	/^	u32				lebs_to_pebs[UBI_MAX_VOL_LEBS];$/;"	m	struct:ubi_vol_info	typeref:typename:u32[]
led	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^.macro	led, num$/;"	m
led	board/freescale/common/ngpixis.h	/^	u8 led;$/;"	m	struct:ngpixis	typeref:typename:u8
led	board/freescale/common/pixis.h	/^	u8 led;$/;"	m	struct:pixis	typeref:typename:u8
led	include/ec_commands.h	/^			uint8_t led, red, green, blue;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::rgb	typeref:typename:uint8_t
led_blink	include/jffs2/load_kernel.h	/^#define led_blink(/;"	d
led_brightness	include/linux/compat.h	/^enum led_brightness {$/;"	g
led_cmd	cmd/led.c	/^enum led_cmd { LED_ON, LED_OFF, LED_TOGGLE, LED_BLINK };$/;"	g	file:
led_commands	cmd/led.c	/^static const led_tbl_t led_commands[] = {$/;"	v	typeref:typename:const led_tbl_t[]	file:
led_csr	board/freescale/t208xrdb/cpld.h	/^	u8 led_csr;		\/* 0x13 - LED control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
led_ctl_status	board/freescale/t102xrdb/cpld.h	/^	u8 led_ctl_status;	\/* 0x15 - LED control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
led_ctl_status	board/freescale/t104xrdb/cpld.h	/^	u8 led_ctl_status;	\/* 0x15 - LED control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
led_dev	drivers/misc/status_led.c	/^led_dev_t led_dev[] = {$/;"	v	typeref:typename:led_dev_t[]
led_dev_t	drivers/misc/status_led.c	/^} led_dev_t;$/;"	t	typeref:struct:__anonb49c34f70108	file:
led_fpga0	arch/nios2/dts/10m50_devboard.dts	/^			led_fpga0: fpga0 {$/;"	l	label:sopc0.fpga_leds
led_fpga1	arch/nios2/dts/10m50_devboard.dts	/^			led_fpga1: fpga1 {$/;"	l	label:sopc0.fpga_leds
led_fpga2	arch/nios2/dts/10m50_devboard.dts	/^			led_fpga2: fpga2 {$/;"	l	label:sopc0.fpga_leds
led_fpga3	arch/nios2/dts/10m50_devboard.dts	/^			led_fpga3: fpga3 {$/;"	l	label:sopc0.fpga_leds
led_get_by_label	drivers/led/led-uclass.c	/^int led_get_by_label(const char *label, struct udevice **devp)$/;"	f	typeref:typename:int
led_get_ops	include/led.h	/^#define led_get_ops(/;"	d
led_gpio_bind	drivers/led/led_gpio.c	/^static int led_gpio_bind(struct udevice *parent)$/;"	f	typeref:typename:int	file:
led_gpio_ids	drivers/led/led_gpio.c	/^static const struct udevice_id led_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
led_gpio_priv	drivers/led/led_gpio.c	/^struct led_gpio_priv {$/;"	s	file:
led_gpio_probe	drivers/led/led_gpio.c	/^static int led_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
led_gpio_remove	drivers/led/led_gpio.c	/^static int led_gpio_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
led_id	include/ec_commands.h	/^	uint8_t led_id;     \/* Which LED to control *\/$/;"	m	struct:ec_params_led_control	typeref:typename:uint8_t
led_id_t	arch/powerpc/include/asm/status_led.h	/^typedef unsigned long led_id_t;$/;"	t	typeref:typename:unsigned long
led_id_t	include/configs/motionpro.h	/^typedef volatile unsigned long * led_id_t;$/;"	t	typeref:typename:volatile unsigned long *
led_id_t	include/configs/v38b.h	/^typedef unsigned int led_id_t;$/;"	t	typeref:typename:unsigned int
led_id_t	include/status_led.h	/^typedef unsigned long led_id_t;$/;"	t	typeref:typename:unsigned long
led_init	board/tqc/tqm5200/cmd_stk52xx.c	/^void led_init(void)$/;"	f	typeref:typename:void
led_names	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static const char *led_names[] = {$/;"	v	typeref:typename:const char * []	file:
led_on	board/keymile/common/common.h	/^	u8	led_on;		\/* Leds *\/$/;"	m	struct:bfticu_iomap	typeref:typename:u8
led_ops	include/led.h	/^struct led_ops {$/;"	s
led_pin_d978	arch/arm/dts/sun8i-a33-inet-d978-rev2.dts	/^	led_pin_d978: led_pin_d978@0 {$/;"	l
led_pin_olinuxino	arch/arm/dts/sun8i-a33-olinuxino.dts	/^	led_pin_olinuxino: led_pins@0 {$/;"	l
led_pin_sina31s	arch/arm/dts/sun6i-a31s-sina31s.dts	/^	led_pin_sina31s: led_pin@0 {$/;"	l
led_pins_a1000	arch/arm/dts/sun4i-a10-a1000.dts	/^	led_pins_a1000: led_pins@0 {$/;"	l
led_pins_bananapi	arch/arm/dts/sun7i-a20-bananapi.dts	/^	led_pins_bananapi: led_pins@0 {$/;"	l
led_pins_bananapro	arch/arm/dts/sun7i-a20-bananapro.dts	/^	led_pins_bananapro: led_pins@0 {$/;"	l
led_pins_bpi_m1p	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	led_pins_bpi_m1p: led_pins@0 {$/;"	l
led_pins_bpi_m2	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	led_pins_bpi_m2: led_pins@0 {$/;"	l
led_pins_cubieboard	arch/arm/dts/sun4i-a10-cubieboard.dts	/^	led_pins_cubieboard: led_pins@0 {$/;"	l
led_pins_cubieboard2	arch/arm/dts/sun7i-a20-cubieboard2.dts	/^	led_pins_cubieboard2: led_pins@0 {$/;"	l
led_pins_cubieboard4	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^	led_pins_cubieboard4: led-pins@0 {$/;"	l
led_pins_cubietruck	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	led_pins_cubietruck: led_pins@0 {$/;"	l
led_pins_i12_tvbox	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	led_pins_i12_tvbox: led_pins@0 {$/;"	l
led_pins_i7	arch/arm/dts/sun6i-a31-i7.dts	/^	led_pins_i7: led_pins@0 {$/;"	l
led_pins_itead_core	arch/arm/dts/sun7i-a20-itead-ibox.dts	/^	led_pins_itead_core: led_pins@0 {$/;"	l
led_pins_lamobo_r1	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^	led_pins_lamobo_r1: led_pins@0 {$/;"	l
led_pins_m3	arch/arm/dts/sun7i-a20-m3.dts	/^	led_pins_m3: led_pins@0 {$/;"	l
led_pins_m9	arch/arm/dts/sun6i-a31-m9.dts	/^	led_pins_m9: led_pins@0 {$/;"	l
led_pins_m9	arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts	/^	led_pins_m9: led_pins@0 {$/;"	l
led_pins_marsboard	arch/arm/dts/sun4i-a10-marsboard.dts	/^	led_pins_marsboard: led_pins@0 {$/;"	l
led_pins_mk802	arch/arm/dts/sun5i-a10s-mk802.dts	/^	led_pins_mk802: led_pins@0 {$/;"	l
led_pins_olimex_som_evb	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	led_pins_olimex_som_evb: led_pins@0 {$/;"	l
led_pins_olinuxino	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	led_pins_olinuxino: led_pins@0 {$/;"	l
led_pins_olinuxino	arch/arm/dts/sun5i-a13-olinuxino.dts	/^	led_pins_olinuxino: led_pins@0 {$/;"	l
led_pins_olinuxino	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	led_pins_olinuxino: led_pins@0 {$/;"	l
led_pins_olinuxinolime	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	led_pins_olinuxinolime: led_pins@0 {$/;"	l
led_pins_olinuxinolime	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	led_pins_olinuxinolime: led_pins@0 {$/;"	l
led_pins_olinuxinolime	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	led_pins_olinuxinolime: led_pins@0 {$/;"	l
led_pins_olinuxinom	arch/arm/dts/sun5i-a13-olinuxino-micro.dts	/^	led_pins_olinuxinom: led_pins@0 {$/;"	l
led_pins_optimus	arch/arm/dts/sun9i-a80-optimus.dts	/^	led_pins_optimus: led-pins@0 {$/;"	l
led_pins_orangepi	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	led_pins_orangepi: led_pins@0 {$/;"	l
led_pins_orangepi	arch/arm/dts/sun7i-a20-orangepi.dts	/^	led_pins_orangepi: led_pins@0 {$/;"	l
led_pins_parrot	arch/arm/dts/sun8i-r16-parrot.dts	/^	led_pins_parrot: led_pins@0 {$/;"	l
led_pins_pcduino	arch/arm/dts/sun4i-a10-pcduino.dts	/^	led_pins_pcduino: led_pins@0 {$/;"	l
led_pins_pcduino3	arch/arm/dts/sun7i-a20-pcduino3.dts	/^	led_pins_pcduino3: led_pins@0 {$/;"	l
led_pins_pcduino3_nano	arch/arm/dts/sun7i-a20-pcduino3-nano.dts	/^	led_pins_pcduino3_nano: led_pins@0 {$/;"	l
led_pins_q5	arch/arm/dts/sun4i-a10-jesurun-q5.dts	/^	led_pins_q5: led_pins@0 {$/;"	l
led_pins_r7	arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts	/^	led_pins_r7: led_pins@0 {$/;"	l
led_pins_t003	arch/arm/dts/sun5i-a10s-auxtek-t003.dts	/^	led_pins_t003: led_pins@0 {$/;"	l
led_pins_t004	arch/arm/dts/sun5i-a10s-auxtek-t004.dts	/^	led_pins_t004: led_pins@0 {$/;"	l
led_pins_wobo_i5	arch/arm/dts/sun5i-a10s-wobo-i5.dts	/^	led_pins_wobo_i5: led_pins@0 {$/;"	l
led_pio	arch/nios2/dts/10m50_devboard.dts	/^		led_pio: gpio@180014d0 {$/;"	l	label:sopc0
led_post_test	arch/blackfin/lib/post.c	/^int led_post_test(int flags)$/;"	f	typeref:typename:int
led_puts	arch/arm/mach-uniphier/micro-support-card.c	/^void led_puts(const char *s)$/;"	f	typeref:typename:void
led_puts	arch/arm/mach-uniphier/micro-support-card.h	/^static inline void led_puts(const char *s)$/;"	f	typeref:typename:void
led_r_pins_optimus	arch/arm/dts/sun9i-a80-optimus.dts	/^	led_r_pins_optimus: led-pins@1 {$/;"	l
led_set_on	drivers/led/led-uclass.c	/^int led_set_on(struct udevice *dev, int on)$/;"	f	typeref:typename:int
led_set_state	board/espt/espt.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/ms7720se/ms7720se.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/ms7722se/ms7722se.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/MigoR/migo_r.c	/^void led_set_state (unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/ap325rxa/ap325rxa.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/r7780mp/r7780mp.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/rsk7203/rsk7203.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/rsk7264/rsk7264.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/rsk7269/rsk7269.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/renesas/sh7763rdp/sh7763rdp.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_set_state	board/shmin/shmin.c	/^void led_set_state(unsigned short value)$/;"	f	typeref:typename:void
led_tbl_s	cmd/led.c	/^struct led_tbl_s {$/;"	s	file:
led_tbl_t	cmd/led.c	/^typedef struct led_tbl_s led_tbl_t;$/;"	t	typeref:struct:led_tbl_s	file:
led_trigger	include/linux/compat.h	/^struct led_trigger {};$/;"	s
led_trigger_event	include/linux/compat.h	/^static inline void led_trigger_event(struct led_trigger *trigger,$/;"	f	typeref:typename:void
led_trigger_register_simple	include/linux/compat.h	/^static inline void led_trigger_register_simple(const char *name,$/;"	f	typeref:typename:void
led_trigger_unregister_simple	include/linux/compat.h	/^static inline void led_trigger_unregister_simple(struct led_trigger *trigger) {}$/;"	f	typeref:typename:void
led_uclass_plat	include/led.h	/^struct led_uclass_plat {$/;"	s
led_user	board/amcc/canyonlands/canyonlands.c	/^	u8	led_user;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
ledcsr	board/freescale/c29xpcie/cpld.h	/^	u8 ledcsr;	\/* 0x15 - LED control and status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
leds	board/amcc/luan/epld.h	/^    unsigned char  leds;		\/* LED register *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
leds	board/gateworks/gw_ventana/common.h	/^	int leds[3];$/;"	m	struct:ventana	typeref:typename:int[3]
leds	board/mpl/common/kbd.c	/^static unsigned char leds = 0;$/;"	v	typeref:typename:unsigned char	file:
leds	include/input.h	/^	uchar leds;		\/* active LEDs (INPUT_LED_...) *\/$/;"	m	struct:input_config	typeref:typename:uchar
leds_changed	include/input.h	/^	uchar leds_changed;	\/* LEDs that just changed *\/$/;"	m	struct:input_config	typeref:typename:uchar
leds_on	board/bachmann/ot1200/ot1200.c	/^static void leds_on(void)$/;"	f	typeref:typename:void	file:
leds_opc	arch/arm/dts/sun8i-h3-nanopi-neo.dts	/^	leds_opc: led-pins {$/;"	l
leds_opc	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	leds_opc: led_pins@0 {$/;"	l
leds_opc	arch/arm/dts/sun8i-h3-orangepi-lite.dts	/^	leds_opc: led_pins@0 {$/;"	l
leds_opc	arch/arm/dts/sun8i-h3-orangepi-one.dts	/^	leds_opc: led_pins@0 {$/;"	l
leds_opc	arch/arm/dts/sun8i-h3-orangepi-pc.dts	/^	leds_opc: led_pins@0 {$/;"	l
leds_pins	arch/arm/dts/am437x-sk-evm.dts	/^	leds_pins: leds_pins {$/;"	l
leds_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	leds_pins_default: leds_pins_default {$/;"	l
leds_r_opc	arch/arm/dts/sun8i-h3-nanopi-neo.dts	/^	leds_r_opc: led-pins {$/;"	l
leds_r_opc	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	leds_r_opc: led_pins@0 {$/;"	l
leds_r_opc	arch/arm/dts/sun8i-h3-orangepi-lite.dts	/^	leds_r_opc: led_pins@0 {$/;"	l
leds_r_opc	arch/arm/dts/sun8i-h3-orangepi-one.dts	/^	leds_r_opc: led_pins@0 {$/;"	l
leds_r_opc	arch/arm/dts/sun8i-h3-orangepi-pc.dts	/^	leds_r_opc: led_pins@0 {$/;"	l
leds_set_booting	board/bosch/shc/board.c	/^static void __maybe_unused leds_set_booting(void)$/;"	f	typeref:typename:void __maybe_unused	file:
leds_set_failure	board/bosch/shc/board.c	/^static void leds_set_failure(int state)$/;"	f	typeref:typename:void	file:
leds_set_finish	board/bosch/shc/board.c	/^static void leds_set_finish(void)$/;"	f	typeref:typename:void	file:
ledval_alpha	arch/arm/mach-uniphier/micro-support-card.c	/^static const u8 ledval_alpha[] = {$/;"	v	typeref:typename:const u8[]	file:
ledval_num	arch/arm/mach-uniphier/micro-support-card.c	/^static const u8 ledval_num[] = {$/;"	v	typeref:typename:const u8[]	file:
left	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 left;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443308	typeref:typename:u32
left	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 left;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443408	typeref:typename:u32
left	scripts/kconfig/expr.h	/^	union expr_data left, right;$/;"	m	struct:expr	typeref:union:expr_data
left_keycode	drivers/input/input.c	/^	int left_keycode;	\/* Left keycode to select this map *\/$/;"	m	struct:kbd_entry	typeref:typename:int	file:
left_keycode	include/input.h	/^	int left_keycode;$/;"	m	struct:input_key_xlate	typeref:typename:int
left_margin	drivers/video/videomodes.h	/^	int left_margin;	\/* time from sync to picture	*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
left_margin	include/linux/fb.h	/^	__u32 left_margin;		\/* time from sync to picture	*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
left_margin	include/linux/fb.h	/^	u32 left_margin;$/;"	m	struct:fb_videomode	typeref:typename:u32
left_shift_vector	arch/arm/mach-tegra/tegra20/crypto.c	/^static void left_shift_vector(u8 *in, u8 *out, int size)$/;"	f	typeref:typename:void	file:
left_znode	fs/ubifs/tnc.c	/^static struct ubifs_znode *left_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
leftovers	arch/blackfin/cpu/jtag-console.c	/^static uint32_t leftovers;$/;"	v	typeref:typename:uint32_t	file:
leftovers_len	arch/blackfin/cpu/jtag-console.c	/^static size_t inbound_len, leftovers_len;$/;"	v	typeref:typename:size_t	file:
legacy_bios_bootable	include/part_efi.h	/^		u64 legacy_bios_bootable:1;$/;"	m	struct:_gpt_entry_attributes::__anon7effa4980208	typeref:typename:u64:1
legacy_hdr_os	include/image.h	/^	image_header_t	*legacy_hdr_os;		\/* image header pointer *\/$/;"	m	struct:bootm_headers	typeref:typename:image_header_t *
legacy_hdr_os_copy	include/image.h	/^	image_header_t	legacy_hdr_os_copy;	\/* header copy *\/$/;"	m	struct:bootm_headers	typeref:typename:image_header_t
legacy_hdr_valid	include/image.h	/^	ulong		legacy_hdr_valid;$/;"	m	struct:bootm_headers	typeref:typename:ulong
legacy_hole_base_k	arch/x86/cpu/ivybridge/northbridge.c	/^static const int legacy_hole_base_k = 0xa0000 \/ 1024;$/;"	v	typeref:typename:const int	file:
legacy_hole_size_k	arch/x86/cpu/ivybridge/northbridge.c	/^static const int legacy_hole_size_k = 384;$/;"	v	typeref:typename:const int	file:
legacy_hub_port_reset	common/usb_hub.c	/^int legacy_hub_port_reset(struct usb_device *dev, int port,$/;"	f	typeref:typename:int
legacy_max_cylinder	include/linux/edd.h	/^	__u16 legacy_max_cylinder;$/;"	m	struct:edd_info	typeref:typename:__u16
legacy_max_head	include/linux/edd.h	/^	__u8 legacy_max_head;$/;"	m	struct:edd_info	typeref:typename:__u8
legacy_mbr	include/part_efi.h	/^} __packed legacy_mbr;$/;"	t	typeref:struct:_legacy_mbr __packed
legacy_sectors_per_track	include/linux/edd.h	/^	__u8 legacy_sectors_per_track;$/;"	m	struct:edd_info	typeref:typename:__u8
legacy_seg_decode	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	legacy_seg_decode;	\/* Offset 0x0028 *\/$/;"	m	struct:vpd_region	typeref:typename:u8
legacy_unlock	include/flash.h	/^	ushort	legacy_unlock;		\/* support Intel legacy (un)locking	*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
len	arch/arm/imx-common/hab.c	/^	uint8_t  len[2];					\/* Length *\/$/;"	m	struct:record	typeref:typename:uint8_t[2]	file:
len	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t len;$/;"	m	struct:serial_i2c_request	typeref:typename:uint16_t
len	arch/arm/lib/semihosting.c	/^		size_t len;$/;"	m	struct:smh_open::smh_open_s	typeref:typename:size_t	file:
len	arch/arm/lib/semihosting.c	/^		size_t len;$/;"	m	struct:smh_read::smh_read_s	typeref:typename:size_t	file:
len	arch/mips/mach-au1x00/au1x00_eth.c	/^	u32 len; \/* Only used for tx *\/$/;"	m	struct:__anon03662d5e0108	typeref:typename:u32	file:
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length	lib/zlib/inflate.h	/^    unsigned length;            \/* literal or length of data to copy *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
length	net/eth_legacy.c	/^	int length;$/;"	m	struct:__anon71b287410108	typeref:typename:int	file:
length	tools/imximage.h	/^	uint16_t length;$/;"	m	struct:__anon504a956c0808	typeref:typename:uint16_t
length	tools/imximage.h	/^	uint16_t length;$/;"	m	struct:__anon504a956c0908	typeref:typename:uint16_t
length	tools/imximage.h	/^	uint32_t length; 	\/* Length of data to be read from flash *\/$/;"	m	struct:__anon504a956c0508	typeref:typename:uint32_t
length	tools/imximage.h	/^	uint32_t length; \/* Device configuration length (without preamble) *\/$/;"	m	struct:__anon504a956c0208	typeref:typename:uint32_t
length	tools/mxsimage.c	/^	uint32_t			length;$/;"	m	struct:sb_cmd_ctx	typeref:typename:uint32_t	file:
length_count	include/jffs2/mini_inflate.h	/^	int  length_count[16];$/;"	m	struct:bitstream	typeref:typename:int[16]
length_first	include/jffs2/mini_inflate.h	/^	int  length_first[16];$/;"	m	struct:bitstream	typeref:typename:int[16]
length_insecure	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 length_insecure;	\/* length of the code header *\/$/;"	m	struct:wb_header	typeref:typename:u32
length_lengths	include/jffs2/mini_inflate.h	/^	int  length_lengths[288];$/;"	m	struct:bitstream	typeref:typename:int[288]
length_pos	include/jffs2/mini_inflate.h	/^	int  length_pos[16];$/;"	m	struct:bitstream	typeref:typename:int[16]
length_secure	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 length_secure;	\/* length of the code header *\/$/;"	m	struct:wb_header	typeref:typename:u32
length_symbols	include/jffs2/mini_inflate.h	/^	int  length_symbols[288];$/;"	m	struct:bitstream	typeref:typename:int[288]
length_u32	tools/socfpgaimage.c	/^	uint16_t length_u32;$/;"	m	struct:socfpga_header	typeref:typename:uint16_t	file:
lengths	include/jffs2/mini_inflate.h	/^	int *lengths;	 \/* The bit length of symbols *\/$/;"	m	struct:huffman_set	typeref:typename:int *
lengths	include/jffs2/mini_inflate.h	/^	struct huffman_set lengths;$/;"	m	struct:bitstream	typeref:struct:huffman_set
lens	lib/zlib/inflate.h	/^    unsigned short lens[320];   \/* temporary storage for code lengths *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned short[320]
lenval_dot_h	board/esd/common/xilinx_jtag/lenval.h	/^#define lenval_dot_h$/;"	d
leon2_force_int	arch/sparc/cpu/leon2/interrupts.c	/^void leon2_force_int(int irq)$/;"	f	typeref:typename:void
leon2_get_irqmask	arch/sparc/cpu/leon2/interrupts.c	/^static inline unsigned int leon2_get_irqmask(unsigned int irq)$/;"	f	typeref:typename:unsigned int	file:
leon2_get_uart_regs	arch/sparc/cpu/leon2/serial.c	/^static inline LEON2_Uart_regs *leon2_get_uart_regs(void)$/;"	f	typeref:typename:LEON2_Uart_regs *	file:
leon2_ic_disable	arch/sparc/cpu/leon2/interrupts.c	/^static void leon2_ic_disable(unsigned int irq)$/;"	f	typeref:typename:void	file:
leon2_ic_enable	arch/sparc/cpu/leon2/interrupts.c	/^static void leon2_ic_enable(unsigned int irq)$/;"	f	typeref:typename:void	file:
leon2_init	arch/sparc/cpu/leon2/start.S	/^leon2_init:$/;"	l
leon2_init_cache	arch/sparc/cpu/leon2/start.S	/^leon2_init_cache:$/;"	l
leon2_init_clear	arch/sparc/cpu/leon2/start.S	/^leon2_init_clear:$/;"	l
leon2_init_ioport	arch/sparc/cpu/leon2/start.S	/^leon2_init_ioport:$/;"	l
leon2_init_mctrl	arch/sparc/cpu/leon2/start.S	/^leon2_init_mctrl:$/;"	l
leon2_init_psr	arch/sparc/cpu/leon2/start.S	/^leon2_init_psr:$/;"	l
leon2_init_stackp	arch/sparc/cpu/leon2/start.S	/^leon2_init_stackp:$/;"	l
leon2_init_tbr	arch/sparc/cpu/leon2/start.S	/^leon2_init_tbr:$/;"	l
leon2_init_wim	arch/sparc/cpu/leon2/start.S	/^leon2_init_wim:$/;"	l
leon2_serial_calc_scaler	arch/sparc/cpu/leon2/serial.c	/^static unsigned leon2_serial_calc_scaler(unsigned freq, unsigned baud)$/;"	f	typeref:typename:unsigned	file:
leon2_serial_drv	arch/sparc/cpu/leon2/serial.c	/^static struct serial_device leon2_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
leon2_serial_getc	arch/sparc/cpu/leon2/serial.c	/^static int leon2_serial_getc(void)$/;"	f	typeref:typename:int	file:
leon2_serial_init	arch/sparc/cpu/leon2/serial.c	/^static int leon2_serial_init(void)$/;"	f	typeref:typename:int	file:
leon2_serial_initialize	arch/sparc/cpu/leon2/serial.c	/^void leon2_serial_initialize(void)$/;"	f	typeref:typename:void
leon2_serial_putc	arch/sparc/cpu/leon2/serial.c	/^static void leon2_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
leon2_serial_putc_raw	arch/sparc/cpu/leon2/serial.c	/^static void leon2_serial_putc_raw(const char c)$/;"	f	typeref:typename:void	file:
leon2_serial_setbrg	arch/sparc/cpu/leon2/serial.c	/^static void leon2_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
leon2_serial_tstc	arch/sparc/cpu/leon2/serial.c	/^static int leon2_serial_tstc(void)$/;"	f	typeref:typename:int	file:
leon3_apbuart	arch/sparc/cpu/leon3/prom.c	/^	ambapp_dev_apbuart *leon3_apbuart;$/;"	m	struct:leon_reloc_func	typeref:typename:ambapp_dev_apbuart *	file:
leon3_force_int	arch/sparc/cpu/leon3/interrupts.c	/^void leon3_force_int(int irq)$/;"	f	typeref:typename:void
leon3_get_uart_regs	arch/sparc/cpu/leon3/serial.c	/^static inline ambapp_dev_apbuart *leon3_get_uart_regs(void)$/;"	f	typeref:typename:ambapp_dev_apbuart *	file:
leon3_ic_disable	arch/sparc/cpu/leon3/interrupts.c	/^static void leon3_ic_disable(unsigned int irq)$/;"	f	typeref:typename:void	file:
leon3_ic_enable	arch/sparc/cpu/leon3/interrupts.c	/^static void leon3_ic_enable(unsigned int irq)$/;"	f	typeref:typename:void	file:
leon3_serial_drv	arch/sparc/cpu/leon3/serial.c	/^static struct serial_device leon3_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
leon3_serial_getc	arch/sparc/cpu/leon3/serial.c	/^static int leon3_serial_getc(void)$/;"	f	typeref:typename:int	file:
leon3_serial_init	arch/sparc/cpu/leon3/serial.c	/^static int leon3_serial_init(void)$/;"	f	typeref:typename:int	file:
leon3_serial_initialize	arch/sparc/cpu/leon3/serial.c	/^void leon3_serial_initialize(void)$/;"	f	typeref:typename:void
leon3_serial_putc	arch/sparc/cpu/leon3/serial.c	/^static void leon3_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
leon3_serial_putc_raw	arch/sparc/cpu/leon3/serial.c	/^static void leon3_serial_putc_raw(const char c)$/;"	f	typeref:typename:void	file:
leon3_serial_setbrg	arch/sparc/cpu/leon3/serial.c	/^static void leon3_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
leon3_serial_tstc	arch/sparc/cpu/leon3/serial.c	/^static int leon3_serial_tstc(void)$/;"	f	typeref:typename:int	file:
leon_cpu_cnt	arch/sparc/cpu/leon3/cpu.c	/^int leon_cpu_cnt = 1;$/;"	v	typeref:typename:int
leon_cpu_freq	arch/sparc/cpu/leon3/cpu.c	/^unsigned int leon_cpu_freq = CONFIG_SYS_CLK_FREQ;$/;"	v	typeref:typename:unsigned int
leon_flush_cache_all	arch/sparc/cpu/leon2/prom.c	/^void __inline__ leon_flush_cache_all(void)$/;"	f	typeref:typename:void
leon_flush_cache_all	arch/sparc/cpu/leon3/prom.c	/^void __inline__ leon_flush_cache_all(void)$/;"	f	typeref:typename:void
leon_flush_tlb_all	arch/sparc/cpu/leon2/prom.c	/^void __inline__ leon_flush_tlb_all(void)$/;"	f	typeref:typename:void
leon_flush_tlb_all	arch/sparc/cpu/leon3/prom.c	/^void __inline__ leon_flush_tlb_all(void)$/;"	f	typeref:typename:void
leon_halt	arch/sparc/cpu/leon2/prom.c	/^static void PROM_TEXT leon_halt(void)$/;"	f	typeref:typename:void PROM_TEXT	file:
leon_halt	arch/sparc/cpu/leon3/prom.c	/^static void PROM_TEXT leon_halt(void)$/;"	f	typeref:typename:void PROM_TEXT	file:
leon_memcpy	arch/sparc/cpu/leon2/prom.c	/^static void *PROM_TEXT leon_memcpy(void *dest, const void *src, size_t n)$/;"	f	typeref:typename:void * PROM_TEXT	file:
leon_memcpy	arch/sparc/cpu/leon3/prom.c	/^static void *PROM_TEXT leon_memcpy(void *dest, const void *src, size_t n)$/;"	f	typeref:typename:void * PROM_TEXT	file:
leon_nbgetchar	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT leon_nbgetchar(void)$/;"	f	typeref:typename:int PROM_TEXT	file:
leon_nbgetchar	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT leon_nbgetchar(void)$/;"	f	typeref:typename:int PROM_TEXT	file:
leon_nbputchar	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT leon_nbputchar(int c)$/;"	f	typeref:typename:int PROM_TEXT	file:
leon_nbputchar	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT leon_nbputchar(int c)$/;"	f	typeref:typename:int PROM_TEXT	file:
leon_nctx	arch/sparc/cpu/leon2/prom.c	/^	int leon_nctx;$/;"	m	struct:leon_prom_info	typeref:typename:int	file:
leon_nctx	arch/sparc/cpu/leon3/prom.c	/^	int leon_nctx;$/;"	m	struct:leon_prom_info	typeref:typename:int	file:
leon_prom_info	arch/sparc/cpu/leon2/prom.c	/^struct leon_prom_info {$/;"	s	file:
leon_prom_info	arch/sparc/cpu/leon3/prom.c	/^struct leon_prom_info {$/;"	s	file:
leon_prom_init	arch/sparc/cpu/leon2/prom.c	/^void leon_prom_init(struct leon_prom_info *pspi)$/;"	f	typeref:typename:void
leon_prom_init	arch/sparc/cpu/leon3/prom.c	/^void leon_prom_init(struct leon_prom_info *pspi)$/;"	f	typeref:typename:void
leon_reboot	arch/sparc/cpu/leon2/prom.c	/^static void PROM_TEXT leon_reboot(char *bcommand)$/;"	f	typeref:typename:void PROM_TEXT	file:
leon_reboot	arch/sparc/cpu/leon3/prom.c	/^static void PROM_TEXT leon_reboot(char *bcommand)$/;"	f	typeref:typename:void PROM_TEXT	file:
leon_reboot_physical	arch/sparc/cpu/leon2/prom.c	/^static void PROM_TEXT leon_reboot_physical(char *bcommand)$/;"	f	typeref:typename:void PROM_TEXT	file:
leon_reboot_physical	arch/sparc/cpu/leon3/prom.c	/^static void PROM_TEXT leon_reboot_physical(char *bcommand)$/;"	f	typeref:typename:void PROM_TEXT	file:
leon_reloc_func	arch/sparc/cpu/leon2/prom.c	/^struct leon_reloc_func {$/;"	s	file:
leon_reloc_func	arch/sparc/cpu/leon3/prom.c	/^struct leon_reloc_func {$/;"	s	file:
leon_strcmp	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT leon_strcmp(const char *s1, const char *s2)$/;"	f	typeref:typename:int PROM_TEXT	file:
leon_strcmp	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT leon_strcmp(const char *s1, const char *s2)$/;"	f	typeref:typename:int PROM_TEXT	file:
leon_ver	arch/sparc/cpu/leon3/cpu.c	/^int leon_ver = 3;$/;"	v	typeref:typename:int
letechsftrstcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 letechsftrstcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
level	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 level;		\/* FIFO Level Register		*\/$/;"	m	struct:hsuart_regs	typeref:typename:u32
level	arch/sparc/cpu/leon2/prom.c	/^	int level;$/;"	m	struct:node	typeref:typename:int	file:
level	arch/sparc/cpu/leon3/prom.c	/^	int level;$/;"	m	struct:node	typeref:typename:int	file:
level	fs/ubifs/ubifs-media.h	/^	__le16 level;$/;"	m	struct:ubifs_idx_node	typeref:typename:__le16
level	fs/ubifs/ubifs.h	/^	int level;$/;"	m	struct:ubifs_cnode	typeref:typename:int
level	fs/ubifs/ubifs.h	/^	int level;$/;"	m	struct:ubifs_nnode	typeref:typename:int
level	fs/ubifs/ubifs.h	/^	int level;$/;"	m	struct:ubifs_pnode	typeref:typename:int
level	fs/ubifs/ubifs.h	/^	int level;$/;"	m	struct:ubifs_znode	typeref:typename:int
level	lib/zlib/deflate.h	/^    int level;    \/* compression level (1..9) *\/$/;"	m	struct:internal_state	typeref:typename:int
level2shift	arch/arm/cpu/armv8/cache_v8.c	/^static int level2shift(int level)$/;"	f	typeref:typename:int	file:
lex_state	cmd/pxe.c	/^enum lex_state {$/;"	g	file:
lf_next	include/zfs/zap_leaf.h	/^		uint16_t lf_next;	\/* next in free list, or CHAIN_END *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_free	typeref:typename:uint16_t
lf_pad	include/zfs/zap_leaf.h	/^		uint8_t lf_pad[ZAP_LEAF_ARRAY_BYTES];$/;"	m	struct:zap_leaf_chunk::zap_leaf_free	typeref:typename:uint8_t[]
lf_type	include/zfs/zap_leaf.h	/^		uint8_t lf_type;		\/* always ZAP_CHUNK_FREE *\/$/;"	m	struct:zap_leaf_chunk::zap_leaf_free	typeref:typename:uint8_t
lfb_base	arch/arm/include/asm/setup.h	/^	u32		lfb_base;$/;"	m	struct:tag_videolfb	typeref:typename:u32
lfb_base	arch/nds32/include/asm/setup.h	/^	u32		lfb_base;$/;"	m	struct:tag_videolfb	typeref:typename:u32
lfb_base	include/linux/screen_info.h	/^	__u32 lfb_base;		\/* 0x18 *\/$/;"	m	struct:screen_info	typeref:typename:__u32
lfb_depth	arch/arm/include/asm/setup.h	/^	u16		lfb_depth;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_depth	arch/nds32/include/asm/setup.h	/^	u16		lfb_depth;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_depth	include/linux/screen_info.h	/^	__u16 lfb_depth;	\/* 0x16 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
lfb_height	arch/arm/include/asm/setup.h	/^	u16		lfb_height;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_height	arch/nds32/include/asm/setup.h	/^	u16		lfb_height;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_height	include/linux/screen_info.h	/^	__u16 lfb_height;	\/* 0x14 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
lfb_linelength	arch/arm/include/asm/setup.h	/^	u16		lfb_linelength;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_linelength	arch/nds32/include/asm/setup.h	/^	u16		lfb_linelength;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_linelength	include/linux/screen_info.h	/^	__u16 lfb_linelength;	\/* 0x24 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
lfb_size	arch/arm/include/asm/setup.h	/^	u32		lfb_size;$/;"	m	struct:tag_videolfb	typeref:typename:u32
lfb_size	arch/nds32/include/asm/setup.h	/^	u32		lfb_size;$/;"	m	struct:tag_videolfb	typeref:typename:u32
lfb_size	include/linux/screen_info.h	/^	__u32 lfb_size;		\/* 0x1c *\/$/;"	m	struct:screen_info	typeref:typename:__u32
lfb_width	arch/arm/include/asm/setup.h	/^	u16		lfb_width;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_width	arch/nds32/include/asm/setup.h	/^	u16		lfb_width;$/;"	m	struct:tag_videolfb	typeref:typename:u16
lfb_width	include/linux/screen_info.h	/^	__u16 lfb_width;	\/* 0x12 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
lfcon	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 lfcon:4;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:4
lflag	tools/imagetool.h	/^	int lflag;$/;"	m	struct:image_tool_params	typeref:typename:int
lfps_filter_quirk	drivers/usb/dwc3/core.h	/^	unsigned		lfps_filter_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
lfps_filter_quirk	include/dwc3-uboot.h	/^	unsigned lfps_filter_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
lfsr32	arch/x86/cpu/quark/mrc_util.c	/^void lfsr32(uint32_t *lfsr_ptr)$/;"	f	typeref:typename:void
lfsr_wr_rd_bank_0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_bank_0;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_bank_0_data	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_bank_0_data;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_bank_0_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_bank_0_dqs;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_bank_0_nop	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_bank_0_nop;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_bank_0_wait	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_bank_0_wait;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_bank_0_wl_1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_bank_0_wl_1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_dm_bank_0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_dm_bank_0;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_dm_bank_0_data	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_dm_bank_0_data;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_dm_bank_0_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_dm_bank_0_dqs;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_dm_bank_0_nop	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_dm_bank_0_nop;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_dm_bank_0_wait	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_dm_bank_0_wait;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfsr_wr_rd_dm_bank_0_wl_1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	lfsr_wr_rd_dm_bank_0_wl_1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
lfuart	drivers/serial/serial_linflexuart.c	/^	struct linflex_fsl *lfuart;$/;"	m	struct:linflex_serial_priv	typeref:struct:linflex_fsl *	file:
lg	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
lg4573_spi_startup	drivers/video/lg4573.c	/^int lg4573_spi_startup(unsigned int bus, unsigned int cs,$/;"	f	typeref:typename:int
lgwcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwcr;	\/* Graphic Window Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lgwdcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwdcr;	\/* Graphic Window DMA Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lgwpor	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwpor;	\/* Graphic Window Panning Offset *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lgwpr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwpr;	\/* Graphic Window Position *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lgwsar	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwsar;	\/* Graphic Window Start Address *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lgwsr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwsr;	\/* Graphic Window Size *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lgwvpwr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lgwvpwr;	\/* Graphic Window Virtual Page Width Regist *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lh	drivers/block/blkcache.c	/^	struct list_head lh;$/;"	m	struct:block_cache_node	typeref:struct:list_head	file:
lh_block_type	include/zfs/zap_leaf.h	/^		uint64_t lh_block_type;		\/* ZBT_LEAF *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint64_t
lh_freelist	include/zfs/zap_leaf.h	/^		uint16_t lh_freelist;		\/* chunk head of free list *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint16_t
lh_magic	include/zfs/zap_leaf.h	/^		uint32_t lh_magic;		\/* ZAP_LEAF_MAGIC *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint32_t
lh_nentries	include/zfs/zap_leaf.h	/^		uint16_t lh_nentries;		\/* number of entries *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint16_t
lh_nfree	include/zfs/zap_leaf.h	/^		uint16_t lh_nfree;		\/* number free chunks *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint16_t
lh_pad1	include/zfs/zap_leaf.h	/^		uint64_t lh_pad1;$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint64_t
lh_pad2	include/zfs/zap_leaf.h	/^		uint8_t lh_pad2[12];$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint8_t[12]
lh_prefix	include/zfs/zap_leaf.h	/^		uint64_t lh_prefix;		\/* hash prefix of this leaf *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint64_t
lh_prefix_len	include/zfs/zap_leaf.h	/^		uint16_t lh_prefix_len;		\/* num bits used to id this *\/$/;"	m	struct:zap_leaf_phys::zap_leaf_header	typeref:typename:uint16_t
lhcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lhcr;	\/* Horizontal Configuration *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lhead_lnum	fs/ubifs/ubifs.h	/^	int lhead_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
lhead_offs	fs/ubifs/ubifs.h	/^	int lhead_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
li	net/sntp.h	/^	uchar li:2;$/;"	m	struct:sntp_pkt_t	typeref:typename:uchar:2
lib_sysinfo	arch/x86/cpu/coreboot/tables.c	/^struct sysinfo_t lib_sysinfo __attribute__((section(".data")));$/;"	v	typeref:struct:sysinfo_t
libfdt	tools/Makefile	/^libfdt:$/;"	t
libfdt_module	lib/libfdt/setup.py	/^libfdt_module = Extension($/;"	v
libs-y	Makefile	/^libs-y		:= $(patsubst %\/, %\/built-in.o, $(libs-y))$/;"	m
libs-y	Makefile	/^libs-y := $(sort $(libs-y))$/;"	m
lic	arch/arm/dts/tegra114.dtsi	/^	lic: interrupt-controller@60004000 {$/;"	l
lic	arch/arm/dts/tegra124.dtsi	/^	lic: interrupt-controller@60004000 {$/;"	l
lic	arch/arm/dts/tegra20.dtsi	/^	lic: interrupt-controller@60004000 {$/;"	l
lic	arch/arm/dts/tegra210.dtsi	/^	lic: interrupt-controller@60004000 {$/;"	l
lic	arch/arm/dts/tegra30.dtsi	/^	lic: interrupt-controller@60004000 {$/;"	l
license1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="license1">$/;"	i
licr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 licr;	\/* Interrupt Configuration *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lidd_cs0_addr	drivers/video/am335x-fb.c	/^	unsigned int		lidd_cs0_addr;		\/* 0x14 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_cs0_addr	drivers/video/da8xx-fb.c	/^	u32	lidd_cs0_addr;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lidd_cs0_conf	drivers/video/am335x-fb.c	/^	unsigned int		lidd_cs0_conf;		\/* 0x10 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_cs0_conf	drivers/video/da8xx-fb.c	/^	u32	lidd_cs0_conf;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lidd_cs0_data	drivers/video/am335x-fb.c	/^	unsigned int		lidd_cs0_data;		\/* 0x18 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_cs0_data	drivers/video/da8xx-fb.c	/^	u32	lidd_cs0_data;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lidd_cs1_addr	drivers/video/am335x-fb.c	/^	unsigned int		lidd_cs1_addr;		\/* 0x20 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_cs1_addr	drivers/video/da8xx-fb.c	/^	u32	lidd_cs1_addr;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lidd_cs1_conf	drivers/video/am335x-fb.c	/^	unsigned int		lidd_cs1_conf;		\/* 0x1C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_cs1_conf	drivers/video/da8xx-fb.c	/^	u32	lidd_cs1_conf;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lidd_cs1_data	drivers/video/am335x-fb.c	/^	unsigned int		lidd_cs1_data;		\/* 0x24 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_cs1_data	drivers/video/da8xx-fb.c	/^	u32	lidd_cs1_data;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lidd_ctrl	drivers/video/am335x-fb.c	/^	unsigned int		lidd_ctrl;		\/* 0x0C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
lidd_ctrl	drivers/video/da8xx-fb.c	/^	u32	lidd_ctrl;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
lier	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lier;	\/* Interrupt Enable *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lightbar_command	include/ec_commands.h	/^enum lightbar_command {$/;"	g
lightbar_params	include/ec_commands.h	/^struct lightbar_params {$/;"	s
likely	include/compiler.h	/^#define likely(/;"	d
likely	include/linux/compiler.h	/^#  define likely(/;"	d
likely	include/linux/compiler.h	/^# define likely(/;"	d
likely_notrace	include/linux/compiler.h	/^#define likely_notrace(/;"	d
lim	include/nand.h	/^	loff_t lim;$/;"	m	struct:nand_erase_options	typeref:typename:loff_t
lim_vref	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u8 lim_vref[MAX_BUS_NUM][MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u8[][]
lime_probe	board/socrates/socrates.c	/^int lime_probe(void)$/;"	f	typeref:typename:int
limit	include/ec_commands.h	/^	uint32_t limit; \/* in mA *\/$/;"	m	struct:ec_params_current_limit	typeref:typename:uint32_t
limit	include/ec_commands.h	/^	uint32_t limit; \/* in mA *\/$/;"	m	struct:ec_params_ext_power_current_limit	typeref:typename:uint32_t
limit	lib/bzip2/bzlib_private.h	/^      Int32    limit  [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[][]
limit	lib/efi/efi_stub.c	/^	uint16_t limit;$/;"	m	struct:desctab_info	typeref:typename:uint16_t	file:
limit	tools/ifdtool.h	/^	int base, limit, size;$/;"	m	struct:region_t	typeref:typename:int
lincfr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 lincfr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
lincr1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 lincr1;$/;"	m	struct:linflex_fsl	typeref:typename:u32
lincr2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 lincr2;$/;"	m	struct:linflex_fsl	typeref:typename:u32
line	include/linux/compiler.h	/^	unsigned line;$/;"	m	struct:ftrace_branch_data	typeref:typename:unsigned
line	scripts/kconfig/conf.c	/^static char line[128];$/;"	v	typeref:typename:char[128]	file:
line0_7	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32 line0_7; \/* Lines 0 to 7 SERDES MUX one nibble per line *\/$/;"	m	struct:board_serdes_conf	typeref:typename:u32
line21	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 line21;				\/* 0x54 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
line8_15	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32 line8_15; \/* Lines 8 to 15 SERDES MUX one nibble per line *\/$/;"	m	struct:board_serdes_conf	typeref:typename:u32
lineEdit	scripts/kconfig/qconf.h	/^	ConfigLineEdit* lineEdit;$/;"	m	class:ConfigView	typeref:typename:ConfigLineEdit *
line_int_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 line_int_ctrl;		\/* 0x010 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
line_int_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 line_int_ctrl;		\/* 0x010 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
line_len	arch/arc/lib/cache.c	/^			unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;$/;"	m	struct:read_decode_cache_bcr::__anon3b450cc2060a::__anon3b450cc20708	typeref:typename:unsigned int:4	file:
line_length	include/linux/fb.h	/^	__u32 line_length;		\/* length of a line in bytes	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u32
line_length	include/video.h	/^	int line_length;$/;"	m	struct:video_priv	typeref:typename:int
line_num	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 line_num;			\/* 0x01c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
line_num	arch/arm/include/asm/arch/display.h	/^	u32 line_num;			\/* 0x01c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
line_number	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 line_number;			\/* 0x60 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
line_parity	fs/yaffs2/yaffs_ecc.h	/^	unsigned line_parity;$/;"	m	struct:yaffs_ecc_other	typeref:typename:unsigned
line_parity_prime	fs/yaffs2/yaffs_ecc.h	/^	unsigned line_parity_prime;$/;"	m	struct:yaffs_ecc_other	typeref:typename:unsigned
line_stats	scripts/checkpatch.pl	/^sub line_stats {$/;"	s
line_status	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 line_status;			\/* 0x5C *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
line_stride	arch/arm/include/asm/arch-tegra/dc.h	/^	uint line_stride;		\/* _WIN_LINE_STRIDE_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
linear	fs/reiserfs/reiserfs_private.h	/^    __u64 linear;$/;"	m	union:__anona10af8d2010a	typeref:typename:__u64
linebuf	lib/display_options.c	/^	union linebuf {$/;"	u	function:print_buffer	file:
linectrl	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 linectrl;	\/* 0x24 line control *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
linectrl	arch/arm/include/asm/arch/p2wi.h	/^	u32 linectrl;	\/* 0x24 line control *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
lineno	scripts/kconfig/expr.h	/^	int lineno;                \/* what lineno was this property defined *\/$/;"	m	struct:property	typeref:typename:int
lineno	scripts/kconfig/expr.h	/^	int lineno;$/;"	m	struct:file	typeref:typename:int
lineno	scripts/kconfig/expr.h	/^	int lineno;$/;"	m	struct:menu	typeref:typename:int
lineno	scripts/kconfig/kxgettext.c	/^	int lineno;$/;"	m	struct:file_line	typeref:typename:int	file:
lineno	scripts/kconfig/zconf.lex.c	/^	int lineno;$/;"	m	struct:__anonb93376940108	typeref:typename:int	file:
lineno	tools/mxsimage.c	/^	unsigned int			lineno;$/;"	m	struct:sb_cmd_list	typeref:typename:unsigned int	file:
lineno	tools/pblimage.c	/^static int lineno = -1;$/;"	v	typeref:typename:int	file:
linesr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 linesr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
linfbrr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 linfbrr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
linflex_fsl	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^struct linflex_fsl {$/;"	s
linflex_serial_getc	drivers/serial/serial_linflexuart.c	/^static int linflex_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
linflex_serial_init_internal	drivers/serial/serial_linflexuart.c	/^static void linflex_serial_init_internal(struct linflex_fsl *lfuart)$/;"	f	typeref:typename:void	file:
linflex_serial_ops	drivers/serial/serial_linflexuart.c	/^static const struct dm_serial_ops linflex_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
linflex_serial_pending	drivers/serial/serial_linflexuart.c	/^static int linflex_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
linflex_serial_platdata	drivers/serial/serial_linflexuart.c	/^struct linflex_serial_platdata {$/;"	s	file:
linflex_serial_priv	drivers/serial/serial_linflexuart.c	/^struct linflex_serial_priv {$/;"	s	file:
linflex_serial_probe	drivers/serial/serial_linflexuart.c	/^static int linflex_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
linflex_serial_putc	drivers/serial/serial_linflexuart.c	/^static int linflex_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
linflex_serial_setbrg	drivers/serial/serial_linflexuart.c	/^int linflex_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
linibrr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 linibrr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
linier	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 linier;$/;"	m	struct:linflex_fsl	typeref:typename:u32
link	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 link;$/;"	m	struct:mdio_regs	typeref:typename:u32
link	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int link;$/;"	m	struct:edma3_slot_config	typeref:typename:int
link	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG link;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
link	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long link;	\/* next td\/qh (LE) *\/$/;"	m	struct:__anon66fd0d690108	typeref:typename:unsigned long
link	arch/x86/include/asm/pirq_routing.h	/^		u8 link;	\/* IRQ line ID, 0=not routed *\/$/;"	m	struct:irq_info::__packed	typeref:typename:u8
link	board/mpl/common/usb_uhci.h	/^	unsigned long link;     \/* next td\/qh (LE)*\/$/;"	m	struct:__anon0a2b4c740108	typeref:typename:unsigned long
link	drivers/block/fsl_sata.h	/^	int		link;			\/* PHY link status *\/$/;"	m	struct:fsl_sata	typeref:typename:int
link	drivers/block/sata_dwc.h	/^	struct ata_link		*link;$/;"	m	struct:ata_device	typeref:struct:ata_link *
link	drivers/block/sata_dwc.h	/^	struct ata_link		link;$/;"	m	struct:ata_port	typeref:struct:ata_link
link	drivers/block/sata_mv.c	/^	u32 link;$/;"	m	struct:mv_priv	typeref:typename:u32	file:
link	drivers/net/cpsw.c	/^	u32	link;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
link	drivers/net/eepro100.c	/^	volatile u32 link;		\/* struct RxFD * *\/$/;"	m	struct:RxFD	typeref:typename:volatile u32	file:
link	drivers/net/eepro100.c	/^	volatile u32 link;		\/* struct descriptor *	*\/$/;"	m	struct:descriptor	typeref:typename:volatile u32	file:
link	drivers/net/eepro100.c	/^	volatile u32 link;		\/* void * *\/$/;"	m	struct:TxFD	typeref:typename:volatile u32	file:
link	drivers/net/mvneta.c	/^	unsigned int link;$/;"	m	struct:mvneta_port	typeref:typename:unsigned int	file:
link	drivers/net/mvpp2.c	/^	unsigned int link;$/;"	m	struct:mvpp2_port	typeref:typename:unsigned int	file:
link	drivers/net/natsemi.c	/^	u32 link;$/;"	m	struct:_BufferDesc	typeref:typename:u32	file:
link	drivers/net/ns8382x.c	/^	u32 link;$/;"	m	struct:_BufferDesc	typeref:typename:u32	file:
link	drivers/net/sun8i_emac.c	/^	u32 link;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
link	drivers/qe/uec_phy.h	/^	int link;$/;"	m	struct:uec_mii_info	typeref:typename:int
link	drivers/usb/host/xhci.h	/^	struct xhci_link_trb		link;$/;"	m	union:xhci_trb	typeref:struct:xhci_link_trb
link	include/efi.h	/^	u32 link;$/;"	m	struct:efi_entry_hdr	typeref:typename:u32
link	include/efi_loader.h	/^	struct list_head link;$/;"	m	struct:efi_object	typeref:struct:list_head
link	include/jffs2/load_kernel.h	/^	struct list_head link;$/;"	m	struct:mtd_device	typeref:struct:list_head
link	include/jffs2/load_kernel.h	/^	struct list_head link;$/;"	m	struct:mtdids	typeref:struct:list_head
link	include/jffs2/load_kernel.h	/^	struct list_head link;$/;"	m	struct:part_info	typeref:struct:list_head
link	include/mmc.h	/^	struct list_head link;$/;"	m	struct:mmc	typeref:struct:list_head
link	include/phy.h	/^	int link;$/;"	m	struct:phy_device	typeref:typename:int
link	include/phy.h	/^	struct list_head link;$/;"	m	struct:mii_dev	typeref:struct:list_head
link	include/usbdevice.h	/^	struct urb_link link;	\/* embedded struct for circular doubly linked list of urbs *\/$/;"	m	struct:urb	typeref:struct:urb_link
link	lib/efi_loader/efi_memory.c	/^	struct list_head link;$/;"	m	struct:efi_mem_list	typeref:struct:list_head	file:
link	lib/efi_loader/efi_runtime.c	/^	struct list_head link;$/;"	m	struct:efi_runtime_mmio_list	typeref:struct:list_head	file:
link_base	arch/x86/include/asm/irq.h	/^	u32 link_base;$/;"	m	struct:irq_router	typeref:typename:u32
link_bcntrld	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 link_bcntrld;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
link_bw	drivers/video/tegra124/sor.h	/^	u8	link_bw;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u8
link_bw_set	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	link_bw_set;$/;"	m	struct:rk3288_edp	typeref:typename:u32
link_bw_set	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	link_bw_set;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
link_debug_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	link_debug_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
link_flags	drivers/block/sata_dwc.h	/^	unsigned long			link_flags;$/;"	m	struct:ata_port_info	typeref:typename:unsigned long
link_lane_count_type	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum link_lane_count_type {$/;"	g
link_last_remainder	common/dlmalloc.c	/^#define link_last_remainder(/;"	d	file:
link_local_receive_arp	net/link_local.c	/^void link_local_receive_arp(struct arp_hdr *arp, int len)$/;"	f	typeref:typename:void
link_local_start	net/link_local.c	/^void link_local_start(void)$/;"	f	typeref:typename:void
link_local_timeout	net/link_local.c	/^static void link_local_timeout(void)$/;"	f	typeref:typename:void	file:
link_port	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int link_port;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
link_port_map	include/ahci.h	/^	u32	link_port_map; \/*linkup port map*\/$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
link_printed	drivers/net/sunxi_emac.c	/^	int link_printed;$/;"	m	struct:emac_eth_dev	typeref:typename:int	file:
link_ram_base0	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	link_ram_base0;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
link_ram_base1	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	link_ram_base1;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
link_ram_base2	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	link_ram_base2;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
link_ram_size0	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	link_ram_size0;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
link_ram_size1	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	link_ram_size1;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
link_rate	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8 link_rate;$/;"	m	struct:link_train	typeref:typename:u8
link_rate_type	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum link_rate_type {$/;"	g
link_speed	include/phy.h	/^	int link_speed;$/;"	m	struct:fixed_link	typeref:typename:int
link_state	drivers/usb/dwc3/core.h	/^	enum dwc3_link_state	link_state;$/;"	m	struct:dwc3	typeref:enum:dwc3_link_state
link_system	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int link_system;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
link_train	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^struct link_train {$/;"	s
link_train	drivers/video/rockchip/rk_edp.c	/^	struct link_train link_train;$/;"	m	struct:rk_edp_priv	typeref:struct:link_train	file:
link_training_state	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum link_training_state {$/;"	g
link_type	drivers/net/keystone_net.c	/^	enum link_type			link_type;$/;"	m	struct:ks2_eth_priv	typeref:enum:link_type	file:
link_type	drivers/net/keystone_net.c	/^enum link_type {$/;"	g	file:
link_type	include/fsl-mc/fsl_dpmac.h	/^	enum dpmac_link_type	link_type;$/;"	m	struct:dpmac_attr	typeref:enum:dpmac_link_type
linkcfg	drivers/block/fsl_sata.h	/^	u32 linkcfg;		\/* Link layer configuration *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
linkcfg1	drivers/block/fsl_sata.h	/^	u32 linkcfg1;		\/* Link layer configuration1 *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
linkcfg2	drivers/block/fsl_sata.h	/^	u32 linkcfg2;		\/* Link layer configuration2 *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
linkconfset	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	linkconfset[4];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[4]
linker	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *linker;$/;"	m	struct:sysinfo_t	typeref:typename:char *
linkinfo	drivers/usb/musb/musb_core.h	/^	u8	linkinfo;$/;"	m	struct:musb_regs	typeref:typename:u8
linkintmasked	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 linkintmasked;$/;"	m	struct:mdio_regs	typeref:typename:u32
linkintmasked	drivers/net/cpsw.c	/^	u32	linkintmasked;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
linkintraw	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 linkintraw;$/;"	m	struct:mdio_regs	typeref:typename:u32
linkintraw	drivers/net/cpsw.c	/^	u32	linkintraw;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
linkready	drivers/net/enc28j60.c	/^enum enc_initstate {none=0, setupdone, linkready};$/;"	e	enum:enc_initstate	file:
linkstatus	drivers/block/fsl_sata.h	/^	u32 linkstatus;		\/* Link layer status *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
linkstatus1	drivers/block/fsl_sata.h	/^	u32 linkstatus1;	\/* Link layer status1 *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
linocr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 linocr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
linsr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 linsr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
lint	arch/x86/include/asm/acpi_table.h	/^	u8 lint;		\/* Local APIC LINT# *\/$/;"	m	struct:acpi_madt_lapic_nmi	typeref:typename:u8
lint_en	include/universe.h	/^	unsigned int lint_en;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
lint_map0	include/universe.h	/^	unsigned int lint_map0;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
lint_map1	include/universe.h	/^	unsigned int lint_map1;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
lint_stat	include/universe.h	/^	unsigned int lint_stat;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
lintcsr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 lintcsr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
lintocr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 lintocr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
linux_argc	arch/mips/lib/bootm.c	/^static int linux_argc;$/;"	v	typeref:typename:int	file:
linux_argp	arch/mips/lib/bootm.c	/^static char *linux_argp;$/;"	v	typeref:typename:char *	file:
linux_arguments_v0	arch/sparc/include/asm/prom.h	/^struct linux_arguments_v0 {$/;"	s
linux_argv	arch/mips/lib/bootm.c	/^static char **linux_argv;$/;"	v	typeref:typename:char **	file:
linux_bootargs_v2	arch/sparc/include/asm/prom.h	/^struct linux_bootargs_v2 {$/;"	s
linux_cmdline_append	arch/mips/lib/bootm.c	/^static void linux_cmdline_append(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
linux_cmdline_dump	arch/mips/lib/bootm.c	/^static void linux_cmdline_dump(void)$/;"	f	typeref:typename:void	file:
linux_cmdline_init	arch/mips/lib/bootm.c	/^static void linux_cmdline_init(void)$/;"	f	typeref:typename:void	file:
linux_cmdline_legacy	arch/mips/lib/bootm.c	/^static void linux_cmdline_legacy(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
linux_cmdline_set	arch/mips/lib/bootm.c	/^static void linux_cmdline_set(const char *value, size_t len)$/;"	f	typeref:typename:void	file:
linux_dev_v0_funcs	arch/sparc/include/asm/prom.h	/^struct linux_dev_v0_funcs {$/;"	s
linux_dev_v2_funcs	arch/sparc/include/asm/prom.h	/^struct linux_dev_v2_funcs {$/;"	s
linux_env	arch/mips/lib/bootm.c	/^static char **linux_env;$/;"	v	typeref:typename:char **	file:
linux_env_idx	arch/mips/lib/bootm.c	/^static int linux_env_idx;$/;"	v	typeref:typename:int	file:
linux_env_init	arch/mips/lib/bootm.c	/^static void linux_env_init(void)$/;"	f	typeref:typename:void	file:
linux_env_legacy	arch/mips/lib/bootm.c	/^static void linux_env_legacy(bootm_headers_t *images)$/;"	f	typeref:typename:void	file:
linux_env_p	arch/mips/lib/bootm.c	/^static char *linux_env_p;$/;"	v	typeref:typename:char *	file:
linux_env_set	arch/mips/lib/bootm.c	/^static void linux_env_set(const char *env_name, const char *env_val)$/;"	f	typeref:typename:void	file:
linux_hdr	arch/sparc/lib/bootm.c	/^} *linux_hdr;$/;"	v	typeref:struct:__anon0049f2d20108 *
linux_logo	include/linux_logo.h	/^unsigned char linux_logo[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo16	include/linux_logo.h	/^unsigned char linux_logo16[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo16_blue	include/linux_logo.h	/^unsigned char linux_logo16_blue[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo16_green	include/linux_logo.h	/^unsigned char linux_logo16_green[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo16_red	include/linux_logo.h	/^unsigned char linux_logo16_red[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo_blue	include/linux_logo.h	/^unsigned char linux_logo_blue[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo_bw	include/linux_logo.h	/^unsigned char linux_logo_bw[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo_green	include/linux_logo.h	/^unsigned char linux_logo_green[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_logo_red	include/linux_logo.h	/^unsigned char linux_logo_red[] __initdata = {$/;"	v	typeref:typename:unsigned char[]__initdata
linux_mem_v0	arch/sparc/include/asm/prom.h	/^struct linux_mem_v0 {$/;"	s
linux_mlist_v0	arch/sparc/include/asm/prom.h	/^struct linux_mlist_v0 {$/;"	s
linux_nodeops	arch/sparc/include/asm/prom.h	/^struct linux_nodeops {$/;"	s
linux_prom_ebus_ranges	arch/sparc/include/asm/prom.h	/^struct linux_prom_ebus_ranges {$/;"	s
linux_prom_irqs	arch/sparc/include/asm/prom.h	/^struct linux_prom_irqs {$/;"	s
linux_prom_pci_assigned_addresses	arch/sparc/include/asm/prom.h	/^struct linux_prom_pci_assigned_addresses {$/;"	s
linux_prom_pci_ranges	arch/sparc/include/asm/prom.h	/^struct linux_prom_pci_ranges {$/;"	s
linux_prom_pci_registers	arch/sparc/include/asm/prom.h	/^struct linux_prom_pci_registers {$/;"	s
linux_prom_ranges	arch/sparc/include/asm/prom.h	/^struct linux_prom_ranges {$/;"	s
linux_prom_registers	arch/sparc/include/asm/prom.h	/^struct linux_prom_registers {$/;"	s
linux_romvec	arch/sparc/include/asm/prom.h	/^struct linux_romvec {$/;"	s
linuxver_major	arch/sparc/lib/bootm.c	/^	unsigned char linuxver_major;$/;"	m	struct:__anon0049f2d20108	typeref:typename:unsigned char	file:
linuxver_mega_major	arch/sparc/lib/bootm.c	/^	unsigned char linuxver_mega_major;$/;"	m	struct:__anon0049f2d20108	typeref:typename:unsigned char	file:
linuxver_minor	arch/sparc/lib/bootm.c	/^	unsigned char linuxver_minor;$/;"	m	struct:__anon0049f2d20108	typeref:typename:unsigned char	file:
linuxver_revision	arch/sparc/lib/bootm.c	/^	unsigned char linuxver_revision;$/;"	m	struct:__anon0049f2d20108	typeref:typename:unsigned char	file:
liodn	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_liodn liodn[CONFIG_SYS_FSL_SRIO_MAX_PORTS];$/;"	m	struct:ccsr_rio	typeref:struct:rio_liodn[]
liodn	drivers/crypto/fsl/jr.h	/^	int liodn;$/;"	m	struct:jobring	typeref:typename:int
liodn_base	arch/powerpc/include/asm/immap_85xx.h	/^	u32	liodn_base;	\/* PCIX LIODN base register *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
liodn_bases	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_bases	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct liodn_id_table liodn_bases[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_id_table	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^struct liodn_id_table {$/;"	s
liodn_id_table	arch/powerpc/include/asm/fsl_liodn.h	/^struct liodn_id_table {$/;"	s
liodn_offset	arch/powerpc/include/asm/fsl_portals.h	/^	u16	liodn_offset;$/;"	m	struct:qportal_info	typeref:typename:u16
liodn_tbl	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct liodn_id_table liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);$/;"	v	typeref:typename:int
liodnbr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	liodnbr;			\/* LIODN Base Register *\/$/;"	m	struct:ccsr_raide	typeref:typename:u32
liodnbr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	liodnbr;	\/* LIODN Base Register *\/$/;"	m	struct:ccsr_pme	typeref:typename:u32
liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	liodnr;		\/* LIODN Register *\/$/;"	m	struct:ccsr_bman	typeref:typename:u32
liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	liodnr;		\/* LIODN Register *\/$/;"	m	struct:ccsr_pme	typeref:typename:u32
liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	liodnr;		\/* LIODN Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
lis331dlh	arch/arm/dts/am335x-evm.dts	/^	lis331dlh: lis331dlh@18 {$/;"	l
lis331dlh	arch/arm/dts/am335x-evmsk.dts	/^	lis331dlh: lis331dlh@18 {$/;"	l
lis3_reg	arch/arm/dts/am335x-evm.dts	/^	lis3_reg: fixedregulator@1 {$/;"	l
lis3_reg	arch/arm/dts/am335x-evmsk.dts	/^	lis3_reg: fixedregulator@1 {$/;"	l
lisa_map_2G_x_1_x_2	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
lisa_map_2G_x_2	board/ti/dra7xx/evm.c	/^static const struct dmm_lisa_map_regs lisa_map_2G_x_2 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs	file:
lisa_map_2G_x_2_x_2	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
lisa_map_2G_x_4	board/ti/dra7xx/evm.c	/^const struct dmm_lisa_map_regs lisa_map_2G_x_4 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
lisa_map_4G_x_2_x_2	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
lisa_map_cm_t54	board/compulab/cm_t54/spl.c	/^const struct dmm_lisa_map_regs lisa_map_cm_t54 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
lisa_map_dra7_1536MB	board/ti/dra7xx/evm.c	/^static const struct dmm_lisa_map_regs lisa_map_dra7_1536MB = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs	file:
lisa_map_dra7_2GB	board/ti/dra7xx/evm.c	/^const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
lisr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lisr;	\/* Interrupt Status *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
list	cmd/pxe.c	/^	struct list_head list;$/;"	m	struct:pxe_label	typeref:struct:list_head	file:
list	common/menu.c	/^	struct list_head list;$/;"	m	struct:menu_item	typeref:struct:list_head	file:
list	common/usb_hub.c	/^	struct list_head list;$/;"	m	struct:usb_device_scan	typeref:struct:list_head	file:
list	drivers/gpio/xilinx_gpio.c	/^	struct list_head list;$/;"	m	struct:xilinx_gpio_priv	typeref:struct:list_head	file:
list	drivers/mtd/mtdpart.c	/^	struct list_head list;$/;"	m	struct:mtd_part	typeref:struct:list_head	file:
list	drivers/mtd/ubi/ubi.h	/^		struct list_head list;$/;"	m	union:ubi_ainf_peb::__anon5a04ca2c060a	typeref:struct:list_head
list	drivers/mtd/ubi/ubi.h	/^		struct list_head list;$/;"	m	union:ubi_wl_entry::__anon5a04ca2c050a	typeref:struct:list_head
list	drivers/mtd/ubi/ubi.h	/^	struct list_head list;$/;"	m	struct:ubi_rename_entry	typeref:struct:list_head
list	drivers/mtd/ubi/ubi.h	/^	struct list_head list;$/;"	m	struct:ubi_work	typeref:struct:list_head
list	drivers/pci/pci_tegra.c	/^	struct list_head list;$/;"	m	struct:tegra_pcie_port	typeref:struct:list_head	file:
list	drivers/usb/dwc3/core.h	/^	struct list_head	list;$/;"	m	struct:dwc3_request	typeref:struct:list_head
list	drivers/usb/dwc3/core.h	/^	struct list_head        list;$/;"	m	struct:dwc3	typeref:struct:list_head
list	drivers/usb/dwc3/dwc3-omap.c	/^	struct list_head	list;$/;"	m	struct:dwc3_omap	typeref:struct:list_head	file:
list	drivers/usb/dwc3/ti_usb_phy.c	/^	struct list_head list;$/;"	m	struct:ti_usb_phy	typeref:struct:list_head	file:
list	drivers/usb/gadget/rndis.h	/^	struct list_head	list;$/;"	m	struct:rndis_resp_t	typeref:struct:list_head
list	drivers/usb/gadget/udc/udc-core.c	/^	struct list_head		list;$/;"	m	struct:usb_udc	typeref:struct:list_head	file:
list	drivers/usb/musb-new/musb_gadget.c	/^	struct list_head	list;$/;"	m	struct:free_record	typeref:struct:list_head	file:
list	drivers/usb/musb-new/musb_gadget.h	/^	struct list_head	list;$/;"	m	struct:musb_request	typeref:struct:list_head
list	drivers/video/exynos/exynos_mipi_dsi.c	/^	struct list_head		list;$/;"	m	struct:mipi_dsim_ddi	typeref:struct:list_head	file:
list	fs/ubifs/replay.c	/^	struct list_head list;$/;"	m	struct:bud_entry	typeref:struct:list_head	file:
list	fs/ubifs/replay.c	/^	struct list_head list;$/;"	m	struct:replay_entry	typeref:struct:list_head	file:
list	fs/ubifs/ubifs.h	/^		struct list_head list;$/;"	m	union:ubifs_lprops::__anonf648d0840d0a	typeref:struct:list_head
list	fs/ubifs/ubifs.h	/^	struct list_head list;$/;"	m	struct:ubifs_bud	typeref:struct:list_head
list	fs/ubifs/ubifs.h	/^	struct list_head list;$/;"	m	struct:ubifs_gced_idx_leb	typeref:struct:list_head
list	fs/ubifs/ubifs.h	/^	struct list_head list;$/;"	m	struct:ubifs_orphan	typeref:struct:list_head
list	fs/ubifs/ubifs.h	/^	struct list_head list;$/;"	m	struct:ubifs_scan_node	typeref:struct:list_head
list	fs/ubifs/ubifs.h	/^	struct list_head list;$/;"	m	struct:ubifs_unclean_leb	typeref:struct:list_head
list	fs/yaffs2/yaffs_guts.h	/^	struct list_head list;$/;"	m	struct:yaffs_obj_bucket	typeref:struct:list_head
list	include/dfu.h	/^	struct list_head list;$/;"	m	struct:dfu_entity	typeref:struct:list_head
list	include/linux/mtd/mtd.h	/^	struct list_head list;$/;"	m	struct:mtd_notifier	typeref:struct:list_head
list	include/linux/mtd/partitions.h	/^	struct list_head list;$/;"	m	struct:mtd_part_parser	typeref:struct:list_head
list	include/linux/usb/composite.h	/^	struct list_head		list;$/;"	m	struct:usb_function	typeref:struct:list_head
list	include/linux/usb/composite.h	/^	struct list_head	list;$/;"	m	struct:usb_configuration	typeref:struct:list_head
list	include/linux/usb/gadget.h	/^	struct list_head	list;$/;"	m	struct:usb_request	typeref:struct:list_head
list	include/phy.h	/^	struct list_head list;$/;"	m	struct:phy_driver	typeref:struct:list_head
list	include/power/pmic.h	/^	struct list_head list;$/;"	m	struct:pmic	typeref:struct:list_head
list	include/qfw.h	/^	struct list_head list;  \/* list node to link to fw_list *\/$/;"	m	struct:fw_file	typeref:struct:list_head
list	include/stdio_dev.h	/^	struct list_head list;$/;"	m	struct:stdio_dev	typeref:struct:list_head
list	lib/list_sort.c	/^	struct list_head list;$/;"	m	struct:debug_el	typeref:struct:list_head	file:
list	scripts/kconfig/expr.h	/^	struct menu *list;$/;"	m	struct:menu	typeref:struct:menu *
list	scripts/kconfig/qconf.h	/^	ConfigList* list;$/;"	m	class:ConfigView	typeref:typename:ConfigList *
list	scripts/kconfig/qconf.h	/^	ConfigView* list;$/;"	m	class:ConfigSearchWindow	typeref:typename:ConfigView *
listCompare	fs/jffs2/jffs2_private.h	/^	int (*listCompare)(struct b_node *new, struct b_node *node);$/;"	m	struct:b_list	typeref:typename:int (*)(struct b_node * new,struct b_node * node)
listCount	fs/jffs2/jffs2_nand_private.h	/^	unsigned int listCount;$/;"	m	struct:b_list	typeref:typename:unsigned int
listCount	fs/jffs2/jffs2_private.h	/^	u32 listCount;$/;"	m	struct:b_list	typeref:typename:u32
listFocusChanged	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::listFocusChanged(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
listHead	fs/jffs2/jffs2_nand_private.h	/^	struct b_node *listHead;$/;"	m	struct:b_list	typeref:struct:b_node *
listHead	fs/jffs2/jffs2_private.h	/^	struct b_node *listHead;$/;"	m	struct:b_list	typeref:struct:b_node *
listLast	fs/jffs2/jffs2_private.h	/^	struct b_node *listLast;$/;"	m	struct:b_list	typeref:struct:b_node *
listLoops	fs/jffs2/jffs2_private.h	/^	u32 listLoops;$/;"	m	struct:b_list	typeref:typename:u32
listMemBase	fs/jffs2/jffs2_nand_private.h	/^	struct mem_block *listMemBase;$/;"	m	struct:b_list	typeref:struct:mem_block *
listMemBase	fs/jffs2/jffs2_private.h	/^	struct mem_block *listMemBase;$/;"	m	struct:b_list	typeref:struct:mem_block *
listMode	scripts/kconfig/qconf.h	/^	singleMode, menuMode, symbolMode, fullMode, listMode$/;"	e	enum:listMode
listMode	scripts/kconfig/qconf.h	/^enum listMode {$/;"	g
listTail	fs/jffs2/jffs2_nand_private.h	/^	struct b_node *listTail;$/;"	m	struct:b_list	typeref:struct:b_node *
listTail	fs/jffs2/jffs2_private.h	/^	struct b_node *listTail;$/;"	m	struct:b_list	typeref:struct:b_node *
listView	scripts/kconfig/qconf.h	/^	ConfigList* listView() const$/;"	f	class:ConfigItem	typeref:typename:ConfigList *
listView	scripts/kconfig/qconf.h	/^	ConfigList* listView()$/;"	f	class:ConfigList	typeref:typename:ConfigList *
list_add	include/linux/list.h	/^static inline void list_add(struct list_head *new, struct list_head *head)$/;"	f	typeref:typename:void
list_add_tail	include/linux/list.h	/^static inline void list_add_tail(struct list_head *new, struct list_head *head)$/;"	f	typeref:typename:void
list_add_tail	scripts/kconfig/list.h	/^static inline void list_add_tail(struct list_head *_new, struct list_head *head)$/;"	f	typeref:typename:void
list_count	test/dm/regulator.c	/^static int list_count = ARRAY_SIZE(expected_setting_list);$/;"	v	typeref:typename:int	file:
list_count_items	drivers/core/util.c	/^int list_count_items(struct list_head *head)$/;"	f	typeref:typename:int
list_cut_position	include/linux/list.h	/^static inline void list_cut_position(struct list_head *list,$/;"	f	typeref:typename:void
list_del	include/linux/list.h	/^static inline void list_del(struct list_head *entry)$/;"	f	typeref:typename:void
list_del	scripts/kconfig/list.h	/^static inline void list_del(struct list_head *entry)$/;"	f	typeref:typename:void
list_del_init	include/linux/list.h	/^static inline void list_del_init(struct list_head *entry)$/;"	f	typeref:typename:void
list_empty	include/linux/list.h	/^static inline int list_empty(const struct list_head *head)$/;"	f	typeref:typename:int
list_empty	scripts/kconfig/list.h	/^static inline int list_empty(const struct list_head *head)$/;"	f	typeref:typename:int
list_empty_careful	include/linux/list.h	/^static inline int list_empty_careful(const struct list_head *head)$/;"	f	typeref:typename:int
list_entry	include/linux/list.h	/^#define list_entry(/;"	d
list_entry	scripts/kconfig/list.h	/^#define list_entry(/;"	d
list_first_entry	include/linux/list.h	/^#define list_first_entry(/;"	d
list_for_each	include/linux/list.h	/^#define list_for_each(/;"	d
list_for_each_entry	include/linux/list.h	/^#define list_for_each_entry(/;"	d
list_for_each_entry	scripts/kconfig/list.h	/^#define list_for_each_entry(/;"	d
list_for_each_entry_continue	include/linux/list.h	/^#define list_for_each_entry_continue(/;"	d
list_for_each_entry_continue_reverse	include/linux/list.h	/^#define list_for_each_entry_continue_reverse(/;"	d
list_for_each_entry_from	include/linux/list.h	/^#define list_for_each_entry_from(/;"	d
list_for_each_entry_reverse	include/linux/list.h	/^#define list_for_each_entry_reverse(/;"	d
list_for_each_entry_safe	include/linux/list.h	/^#define list_for_each_entry_safe(/;"	d
list_for_each_entry_safe	scripts/kconfig/list.h	/^#define list_for_each_entry_safe(/;"	d
list_for_each_entry_safe_continue	include/linux/list.h	/^#define list_for_each_entry_safe_continue(/;"	d
list_for_each_entry_safe_from	include/linux/list.h	/^#define list_for_each_entry_safe_from(/;"	d
list_for_each_entry_safe_reverse	include/linux/list.h	/^#define list_for_each_entry_safe_reverse(/;"	d
list_for_each_prev	include/linux/list.h	/^#define list_for_each_prev(/;"	d
list_for_each_prev_safe	include/linux/list.h	/^#define list_for_each_prev_safe(/;"	d
list_for_each_safe	include/linux/list.h	/^#define list_for_each_safe(/;"	d
list_guid	lib/uuid.c	/^} list_guid[] = {$/;"	v	typeref:typename:const struct __anon5dbe20330108[]
list_head	common/cli_hush.c	/^	struct pipe *list_head;$/;"	m	struct:p_context	typeref:struct:pipe *	file:
list_head	include/linux/list.h	/^struct list_head {$/;"	s
list_head	scripts/kconfig/list.h	/^struct list_head {$/;"	s
list_image	test/image/test-imagetools.sh	/^list_image()$/;"	f
list_is_last	include/linux/list.h	/^static inline int list_is_last(const struct list_head *list,$/;"	f	typeref:typename:int
list_is_singular	include/linux/list.h	/^static inline int list_is_singular(const struct list_head *head)$/;"	f	typeref:typename:int
list_last_entry	include/linux/list.h	/^#define list_last_entry(/;"	d
list_move	include/linux/list.h	/^static inline void list_move(struct list_head *list, struct list_head *head)$/;"	f	typeref:typename:void
list_move_tail	include/linux/list.h	/^static inline void list_move_tail(struct list_head *list,$/;"	f	typeref:typename:void
list_node	drivers/net/e1000.h	/^	struct list_head list_node;$/;"	m	struct:e1000_hw	typeref:struct:list_head
list_partitions	cmd/mtdparts.c	/^static void list_partitions(void)$/;"	f	typeref:typename:void	file:
list_pos	include/linux/mtd/ubi.h	/^	int list_pos;$/;"	m	struct:ubi_sgl	typeref:typename:int
list_prepare_entry	include/linux/list.h	/^#define list_prepare_entry(/;"	d
list_replace	include/linux/list.h	/^static inline void list_replace(struct list_head *old,$/;"	f	typeref:typename:void
list_replace_init	include/linux/list.h	/^static inline void list_replace_init(struct list_head *old,$/;"	f	typeref:typename:void
list_sort	lib/list_sort.c	/^void list_sort(void *priv, struct list_head *head,$/;"	f	typeref:typename:void
list_sort_test	lib/list_sort.c	/^static int __init list_sort_test(void)$/;"	f	typeref:typename:int __init	file:
list_splice	include/linux/list.h	/^static inline void list_splice(const struct list_head *list,$/;"	f	typeref:typename:void
list_splice_init	include/linux/list.h	/^static inline void list_splice_init(struct list_head *list,$/;"	f	typeref:typename:void
list_splice_tail	include/linux/list.h	/^static inline void list_splice_tail(struct list_head *list,$/;"	f	typeref:typename:void
list_splice_tail_init	include/linux/list.h	/^static inline void list_splice_tail_init(struct list_head *list,$/;"	f	typeref:typename:void
list_strings	tools/fdtgrep.c	/^	int list_strings;	\/* List strings in string table *\/$/;"	m	struct:display_info	typeref:typename:int	file:
list_width	scripts/kconfig/lxdialog/checklist.c	/^static int list_width, check_x, item_x;$/;"	v	typeref:typename:int	file:
listnewconfig	scripts/kconfig/conf.c	/^	listnewconfig,$/;"	e	enum:input_mode	file:
lists_bind_drivers	drivers/core/lists.c	/^int lists_bind_drivers(struct udevice *parent, bool pre_reloc_only)$/;"	f	typeref:typename:int
lists_bind_fdt	drivers/core/lists.c	/^int lists_bind_fdt(struct udevice *parent, const void *blob, int offset,$/;"	f	typeref:typename:int
lists_driver_lookup_name	drivers/core/lists.c	/^struct driver *lists_driver_lookup_name(const char *name)$/;"	f	typeref:struct:driver *
lists_uclass_lookup	drivers/core/lists.c	/^struct uclass_driver *lists_uclass_lookup(enum uclass_id id)$/;"	f	typeref:struct:uclass_driver *
lit_bufsize	lib/zlib/deflate.h	/^    uInt  lit_bufsize;$/;"	m	struct:internal_state	typeref:typename:uInt
literal	common/cli_hush.c	/^	char *literal;$/;"	m	struct:reserved_combo	typeref:typename:char *	file:
literalBases	include/MCD_dma.h	/^	u32 literalBases;$/;"	m	struct:__anon0c34f9b30108	typeref:typename:u32
little	doc/README.x86	/^little bit tricky, as generally it requires several binary blobs which are not$/;"	l
little_endian	board/dbau1x00/lowlevel_init.S	/^little_endian:$/;"	l
little_endian	board/pb1x00/lowlevel_init.S	/^little_endian:$/;"	l
lkpid	drivers/net/mvpp2.c	/^	u32 lkpid;$/;"	m	struct:mvpp2_cls_lookup_entry	typeref:typename:u32	file:
ll	arch/arc/lib/libgcc2.h	/^	DWtype ll;$/;"	m	union:__anon4bd294e9010a	typeref:typename:DWtype
ll	arch/blackfin/lib/muldi3.c	/^	DItype ll;$/;"	m	union:__anonc48de1c0010a	typeref:typename:DItype	file:
ll	arch/m68k/lib/ashldi3.c	/^  DItype ll;$/;"	m	union:__anonebfd3a86010a	typeref:typename:DItype	file:
ll	arch/m68k/lib/lshrdi3.c	/^  DItype ll;$/;"	m	union:__anonfb550957010a	typeref:typename:DItype	file:
ll	arch/m68k/lib/muldi3.c	/^	DItype ll;$/;"	m	union:__anon962d2c0c010a	typeref:typename:DItype	file:
ll	arch/microblaze/lib/muldi3.c	/^	DItype ll;$/;"	m	union:__anon8848586e010a	typeref:typename:DItype	file:
ll	arch/mips/lib/libgcc.h	/^	long long ll;$/;"	m	union:__anonf7490e5a010a	typeref:typename:long long
ll	arch/nios2/lib/libgcc.c	/^  DWtype ll;$/;"	m	union:__anona37ae167010a	typeref:typename:DWtype	file:
ll	arch/sh/lib/libgcc.h	/^	long long ll;$/;"	m	union:__anon2b75257c010a	typeref:typename:long long
ll16	lib/bzip2/bzlib_private.h	/^      UInt16   *ll16;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt16 *
ll4	lib/bzip2/bzlib_private.h	/^      UChar    *ll4;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UChar *
ll_alloc_task_struct	arch/arm/include/asm/proc-armv/processor.h	/^#define ll_alloc_task_struct(/;"	d
ll_boot_init	include/common.h	/^#define ll_boot_init(/;"	d
ll_disp3_enable	drivers/video/mx3fb.c	/^static void ll_disp3_enable(void *base)$/;"	f	typeref:typename:void	file:
ll_end	include/linker_lists.h	/^#define ll_end(/;"	d
ll_entry_count	include/linker_lists.h	/^#define ll_entry_count(/;"	d
ll_entry_declare	include/linker_lists.h	/^#define ll_entry_declare(/;"	d
ll_entry_declare_list	include/linker_lists.h	/^#define ll_entry_declare_list(/;"	d
ll_entry_end	include/linker_lists.h	/^#define ll_entry_end(/;"	d
ll_entry_get	include/linker_lists.h	/^#define ll_entry_get(/;"	d
ll_entry_start	include/linker_lists.h	/^#define ll_entry_start(/;"	d
ll_free_task_struct	arch/arm/include/asm/proc-armv/processor.h	/^#define ll_free_task_struct(/;"	d
ll_start	include/linker_lists.h	/^#define ll_start(/;"	d
ll_state_t	net/link_local.c	/^static enum ll_state_t {$/;"	g	file:
ll_temac	drivers/net/xilinx_ll_temac.h	/^struct ll_temac {$/;"	s
ll_temac_adjust_link	drivers/net/xilinx_ll_temac.c	/^static int ll_temac_adjust_link(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ll_temac_check_status	drivers/net/xilinx_ll_temac.c	/^int ll_temac_check_status(struct temac_reg *regs, u32 mask)$/;"	f	typeref:typename:int
ll_temac_collect_xldcr_sdma_reg_addr	drivers/net/xilinx_ll_temac_sdma.c	/^void ll_temac_collect_xldcr_sdma_reg_addr(struct eth_device *dev)$/;"	f	typeref:typename:void
ll_temac_collect_xlplb_sdma_reg_addr	drivers/net/xilinx_ll_temac_sdma.c	/^void ll_temac_collect_xlplb_sdma_reg_addr(struct eth_device *dev)$/;"	f	typeref:typename:void
ll_temac_halt	drivers/net/xilinx_ll_temac.c	/^static void ll_temac_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ll_temac_halt_sdma	drivers/net/xilinx_ll_temac_sdma.c	/^int ll_temac_halt_sdma(struct eth_device *dev)$/;"	f	typeref:typename:int
ll_temac_indirect_get	drivers/net/xilinx_ll_temac.c	/^int ll_temac_indirect_get(struct temac_reg *regs, u16 regn, u32* reg_data)$/;"	f	typeref:typename:int
ll_temac_indirect_set	drivers/net/xilinx_ll_temac.c	/^int ll_temac_indirect_set(struct temac_reg *regs, u16 regn, u32 reg_data)$/;"	f	typeref:typename:int
ll_temac_info	drivers/net/xilinx_ll_temac.c	/^struct ll_temac_info {$/;"	s	file:
ll_temac_init	drivers/net/xilinx_ll_temac.c	/^static int ll_temac_init(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
ll_temac_init_sdma	drivers/net/xilinx_ll_temac_sdma.c	/^int ll_temac_init_sdma(struct eth_device *dev)$/;"	f	typeref:typename:int
ll_temac_local_mdio_read	drivers/net/xilinx_ll_temac_mdio.c	/^int ll_temac_local_mdio_read(struct temac_reg *regs, int addr, int devad,$/;"	f	typeref:typename:int
ll_temac_local_mdio_write	drivers/net/xilinx_ll_temac_mdio.c	/^void ll_temac_local_mdio_write(struct temac_reg *regs, int addr, int devad,$/;"	f	typeref:typename:void
ll_temac_mdio_info	drivers/net/xilinx_ll_temac_mdio.h	/^struct ll_temac_mdio_info {$/;"	s
ll_temac_mdio_setup	drivers/net/xilinx_ll_temac_mdio.c	/^static int ll_temac_mdio_setup(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ll_temac_phy_addr	drivers/net/xilinx_ll_temac_mdio.c	/^int ll_temac_phy_addr(struct mii_dev *bus)$/;"	f	typeref:typename:int
ll_temac_phy_init	drivers/net/xilinx_ll_temac.c	/^static int ll_temac_phy_init(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ll_temac_phy_read	drivers/net/xilinx_ll_temac_mdio.c	/^int ll_temac_phy_read(struct mii_dev *bus, int addr, int devad, int regnum)$/;"	f	typeref:typename:int
ll_temac_phy_write	drivers/net/xilinx_ll_temac_mdio.c	/^int ll_temac_phy_write(struct mii_dev *bus, int addr, int devad, int regnum,$/;"	f	typeref:typename:int
ll_temac_recv_fifo	drivers/net/xilinx_ll_temac_fifo.c	/^int ll_temac_recv_fifo(struct eth_device *dev)$/;"	f	typeref:typename:int
ll_temac_recv_sdma	drivers/net/xilinx_ll_temac_sdma.c	/^int ll_temac_recv_sdma(struct eth_device *dev)$/;"	f	typeref:typename:int
ll_temac_reset_fifo	drivers/net/xilinx_ll_temac_fifo.c	/^int ll_temac_reset_fifo(struct eth_device *dev)$/;"	f	typeref:typename:int
ll_temac_reset_sdma	drivers/net/xilinx_ll_temac_sdma.c	/^int ll_temac_reset_sdma(struct eth_device *dev)$/;"	f	typeref:typename:int
ll_temac_sdma_error	drivers/net/xilinx_ll_temac_sdma.c	/^static inline int ll_temac_sdma_error(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ll_temac_send_fifo	drivers/net/xilinx_ll_temac_fifo.c	/^int ll_temac_send_fifo(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int
ll_temac_send_sdma	drivers/net/xilinx_ll_temac_sdma.c	/^int ll_temac_send_sdma(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int
ll_temac_setup_ctrl	drivers/net/xilinx_ll_temac.c	/^static int ll_temac_setup_ctrl(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ll_temac_setup_mac_addr	drivers/net/xilinx_ll_temac.c	/^static int ll_temac_setup_mac_addr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ll_temac_xldcr_in32	drivers/net/xilinx_ll_temac_sdma.c	/^inline unsigned ll_temac_xldcr_in32(phys_addr_t addr)$/;"	f	typeref:typename:unsigned
ll_temac_xldcr_out32	drivers/net/xilinx_ll_temac_sdma.c	/^inline void ll_temac_xldcr_out32(phys_addr_t addr, unsigned value)$/;"	f	typeref:typename:void
ll_temac_xlplb_in32	drivers/net/xilinx_ll_temac_sdma.c	/^inline unsigned ll_temac_xlplb_in32(phys_addr_t addr)$/;"	f	typeref:typename:unsigned
ll_temac_xlplb_out32	drivers/net/xilinx_ll_temac_sdma.c	/^inline void ll_temac_xlplb_out32(phys_addr_t addr, unsigned value)$/;"	f	typeref:typename:void
lla	drivers/video/ipu_regs.h	/^	u32 lla[2];$/;"	m	struct:ipu_dc	typeref:typename:u32[2]
llcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	llcr;	\/* Logical Layer Configuration Register *\/$/;"	m	struct:rio_impl_common	typeref:typename:u32
llcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	llcr;		\/* 0xd0004 - Logical Layer Configuration Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
llcr	drivers/block/sata_dwc.c	/^	u32 llcr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
lldd_task	drivers/block/sata_dwc.h	/^	void			*lldd_task;$/;"	m	struct:ata_queued_cmd	typeref:typename:void *
lldiv	include/div64.h	/^static inline uint64_t lldiv(uint64_t dividend, uint32_t divisor)$/;"	f	typeref:typename:uint64_t
llen	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 llen;				\/* 0x1C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
lli	drivers/dma/lpc32xx_dma.c	/^	u32 lli;$/;"	m	struct:dmac_chan_reg	typeref:typename:u32	file:
llp	drivers/block/sata_dwc.c	/^	struct dmareg llp;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
llr	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 llr;	\/* LocalLink Reset (WO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
llsym	include/linker_lists.h	/^#define llsym(/;"	d
lm_init	lib/zlib/deflate.c	/^local void lm_init (s)$/;"	f
lmadr	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 lmadr;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
lmaer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lmaer;$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u32
lmat	include/tsi148.h	/^	unsigned int lmat;                    \/* 0x42c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
lmb	include/image.h	/^	struct lmb	lmb;		\/* for memory mgmt *\/$/;"	m	struct:bootm_headers	typeref:struct:lmb
lmb	include/lmb.h	/^struct lmb {$/;"	s
lmb_add	lib/lmb.c	/^long lmb_add(struct lmb *lmb, phys_addr_t base, phys_size_t size)$/;"	f	typeref:typename:long
lmb_add_region	lib/lmb.c	/^static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t size)$/;"	f	typeref:typename:long	file:
lmb_addrs_adjacent	lib/lmb.c	/^static long lmb_addrs_adjacent(phys_addr_t base1, phys_size_t size1,$/;"	f	typeref:typename:long	file:
lmb_addrs_overlap	lib/lmb.c	/^static long lmb_addrs_overlap(phys_addr_t base1,$/;"	f	typeref:typename:long	file:
lmb_align_down	lib/lmb.c	/^static phys_addr_t lmb_align_down(phys_addr_t addr, phys_size_t size)$/;"	f	typeref:typename:phys_addr_t	file:
lmb_align_up	lib/lmb.c	/^static phys_addr_t lmb_align_up(phys_addr_t addr, ulong size)$/;"	f	typeref:typename:phys_addr_t	file:
lmb_alloc	lib/lmb.c	/^phys_addr_t lmb_alloc(struct lmb *lmb, phys_size_t size, ulong align)$/;"	f	typeref:typename:phys_addr_t
lmb_alloc_base	lib/lmb.c	/^phys_addr_t lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align, phys_addr_t max_addr)$/;"	f	typeref:typename:phys_addr_t
lmb_coalesce_regions	lib/lmb.c	/^static void lmb_coalesce_regions(struct lmb_region *rgn,$/;"	f	typeref:typename:void	file:
lmb_dump_all	lib/lmb.c	/^void lmb_dump_all(struct lmb *lmb)$/;"	f	typeref:typename:void
lmb_free	lib/lmb.c	/^long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size)$/;"	f	typeref:typename:long
lmb_init	lib/lmb.c	/^void lmb_init(struct lmb *lmb)$/;"	f	typeref:typename:void
lmb_is_reserved	lib/lmb.c	/^int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr)$/;"	f	typeref:typename:int
lmb_overlaps_region	lib/lmb.c	/^static long lmb_overlaps_region(struct lmb_region *rgn, phys_addr_t base,$/;"	f	typeref:typename:long	file:
lmb_property	include/lmb.h	/^struct lmb_property {$/;"	s
lmb_region	include/lmb.h	/^struct lmb_region {$/;"	s
lmb_regions_adjacent	lib/lmb.c	/^static long lmb_regions_adjacent(struct lmb_region *rgn,$/;"	f	typeref:typename:long	file:
lmb_remove_region	lib/lmb.c	/^static void lmb_remove_region(struct lmb_region *rgn, unsigned long r)$/;"	f	typeref:typename:void	file:
lmb_reserve	common/bootm.c	/^#define lmb_reserve(/;"	d	file:
lmb_reserve	lib/lmb.c	/^long lmb_reserve(struct lmb *lmb, phys_addr_t base, phys_size_t size)$/;"	f	typeref:typename:long
lmb_size_bytes	include/lmb.h	/^lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)$/;"	f	typeref:typename:phys_size_t
lmbal	include/tsi148.h	/^	unsigned int lmbal;                   \/* 0x428         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
lmbau	include/tsi148.h	/^	unsigned int lmbau;                   \/* 0x424         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
lmevr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lmevr;$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u32
lmisc	include/universe.h	/^	unsigned int lmisc;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
lms_base	drivers/net/mvpp2.c	/^	void __iomem *lms_base;$/;"	m	struct:mvpp2	typeref:typename:void __iomem *	file:
lmser	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lmser;$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u32
ln0_link_training_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	ln0_link_training_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
ln1_link_training_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	ln1_link_training_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
ln2_link_training_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	ln2_link_training_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
ln3_link_training_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	ln3_link_training_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
ln_link_trn_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	ln_link_trn_ctl[4];$/;"	m	struct:rk3288_edp	typeref:typename:u32[4]
ln_sel	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 ln_sel;				\/* 0x58 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
lname	include/image.h	/^	char	*lname;		\/* long (output) name to print for messages *\/$/;"	m	struct:table_entry	typeref:typename:char *
lnc_add	fs/ubifs/tnc.c	/^static int lnc_add(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int	file:
lnc_add_directly	fs/ubifs/tnc.c	/^static int lnc_add_directly(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int	file:
lnc_free	fs/ubifs/tnc.c	/^static void lnc_free(struct ubifs_zbranch *zbr)$/;"	f	typeref:typename:void	file:
lnkup	drivers/net/ftmac110.c	/^	uint32_t lnkup;$/;"	m	struct:ftmac110_chip	typeref:typename:uint32_t	file:
lnpb	drivers/video/mx3fb.c	/^	u32	lnpb:6;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:6	file:
lnpb	drivers/video/mx3fb.c	/^	u32	lnpb:6;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:6	file:
lnpssr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} lnpssr[4];	\/* Lane A, B, C, D *\/$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0508[4]
lnpssr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	lnpssr;	\/* 0x100, 0x120, ..., 0x1e0 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0508	typeref:typename:u32
lnpssr	arch/powerpc/include/asm/immap_85xx.h	/^		u32	lnpssr;	\/* 0x100, 0x120, ..., 0x1e0 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0708	typeref:typename:u32
lnpssr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	lnpssr0;	\/* 0x100, 0x120, 0x140, 0x160 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0508	typeref:typename:u32
lnum	drivers/mtd/ubi/ubi-media.h	/^	__be32  lnum;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
lnum	drivers/mtd/ubi/ubi.h	/^	int lnum;$/;"	m	struct:ubi_ainf_peb	typeref:typename:int
lnum	drivers/mtd/ubi/ubi.h	/^	int lnum;$/;"	m	struct:ubi_ltree_entry	typeref:typename:int
lnum	drivers/mtd/ubi/ubi.h	/^	int lnum;$/;"	m	struct:ubi_work	typeref:typename:int
lnum	fs/ubifs/log.c	/^	int lnum;$/;"	m	struct:done_ref	typeref:typename:int	file:
lnum	fs/ubifs/replay.c	/^	int lnum;$/;"	m	struct:replay_entry	typeref:typename:int	file:
lnum	fs/ubifs/ubifs-media.h	/^	__le32 lnum;$/;"	m	struct:ubifs_branch	typeref:typename:__le32
lnum	fs/ubifs/ubifs-media.h	/^	__le32 lnum;$/;"	m	struct:ubifs_ref_node	typeref:typename:__le32
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_bud	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_gced_idx_leb	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_lprops	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_nbranch	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_old_idx	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_scan_leb	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_unclean_leb	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_wbuf	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_zbranch	typeref:typename:int
lnum	fs/ubifs/ubifs.h	/^	int lnum;$/;"	m	struct:ubifs_znode	typeref:typename:int
lnum	include/mtd/ubi-user.h	/^	__s32 lnum;$/;"	m	struct:ubi_leb_change_req	typeref:typename:__s32
lnum	include/mtd/ubi-user.h	/^	__s32 lnum;$/;"	m	struct:ubi_map_req	typeref:typename:__s32
lnum_bits	fs/ubifs/ubifs.h	/^	int lnum_bits;$/;"	m	struct:ubifs_info	typeref:typename:int
lo	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 lo;			\/* 0xa4 *\/$/;"	m	struct:sunxi_64cnt	typeref:typename:u32
lo	arch/arm/include/asm/arch/timer.h	/^	u32 lo;			\/* 0xa4 *\/$/;"	m	struct:sunxi_64cnt	typeref:typename:u32
lo	arch/blackfin/include/asm/blackfin_local.h	/^#define lo(/;"	d
lo	arch/mips/include/asm/ptrace.h	/^	unsigned long lo;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
lo	arch/x86/cpu/mp_init.c	/^	uint32_t lo;$/;"	m	struct:saved_msr	typeref:typename:uint32_t	file:
lo	arch/x86/include/asm/coreboot_tables.h	/^	u32 lo;$/;"	m	struct:cbuint64	typeref:typename:u32
lo	arch/x86/include/asm/msr.h	/^	uint32_t lo;$/;"	m	struct:msr_t	typeref:typename:uint32_t
lo	cmd/mii.c	/^	ushort lo;$/;"	m	struct:_MII_field_desc_t	typeref:typename:ushort	file:
lo	drivers/net/armada100_fec.h	/^	u32 lo;$/;"	m	struct:addr_table_entry_t	typeref:typename:u32
lo	drivers/net/calxedaxgmac.c	/^		u32 lo;         \/* 0x44 *\/$/;"	m	struct:xgmac_regs::__anon986dd3dc0108	typeref:typename:u32	file:
lo_cylinder	disk/part_amiga.h	/^    u32 lo_cylinder;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
lo_prot_id	drivers/ddr/altera/sdram.c	/^	u32	lo_prot_id;$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
load	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t load;$/;"	m	struct:timer	typeref:typename:uint32_t
load	arch/arm/include/debug/8250.S	/^		.macro	load, rd, rx:vararg$/;"	m
load	arch/arm/mach-zynq/timer.c	/^	u32 load; \/* Timer Load Register *\/$/;"	m	struct:scu_timer	typeref:typename:u32	file:
load	drivers/fpga/altera.c	/^	int			(*load)(Altera_desc *, const void *, size_t);$/;"	m	struct:altera_fpga	typeref:typename:int (*)(Altera_desc *,const void *,size_t)	file:
load	include/image.h	/^	ulong		load;			\/* load addr for the image *\/$/;"	m	struct:image_info	typeref:typename:ulong
load	include/remoteproc.h	/^	int (*load)(struct udevice *dev, ulong addr, ulong size);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev,ulong addr,ulong size)
load	include/xilinx.h	/^	int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);$/;"	m	struct:xilinx_fpga_op	typeref:typename:int (*)(xilinx_desc *,const void *,size_t,bitstream_type)
load	tools/mxsimage.h	/^	} load;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960708
load1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="load1">$/;"	i
loadConfig	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::loadConfig(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
load_addr	common/image.c	/^ulong load_addr = CONFIG_SYS_LOAD_ADDR;	\/* Default Load Address *\/$/;"	v	typeref:typename:ulong
load_addr	include/spl.h	/^	u32 load_addr;$/;"	m	struct:spl_image_info	typeref:typename:u32
load_addr	include/ubispl.h	/^	void		*load_addr;$/;"	m	struct:ubispl_load	typeref:typename:void *
load_addr	tools/gpheader.h	/^	uint32_t load_addr;$/;"	m	struct:gp_header	typeref:typename:uint32_t
load_address	cmd/armflash.c	/^	u32 load_address;$/;"	m	struct:afs_region	typeref:typename:u32	file:
load_block	net/tftp.c	/^static int load_block(unsigned block, uchar *dst, unsigned len)$/;"	f	typeref:typename:int	file:
load_cntr0	drivers/ddr/altera/sequencer.h	/^	u32	load_cntr0;$/;"	m	struct:socfpga_sdr_rw_load_manager	typeref:typename:u32
load_cntr1	drivers/ddr/altera/sequencer.h	/^	u32	load_cntr1;$/;"	m	struct:socfpga_sdr_rw_load_manager	typeref:typename:u32
load_cntr2	drivers/ddr/altera/sequencer.h	/^	u32	load_cntr2;$/;"	m	struct:socfpga_sdr_rw_load_manager	typeref:typename:u32
load_cntr3	drivers/ddr/altera/sequencer.h	/^	u32	load_cntr3;$/;"	m	struct:socfpga_sdr_rw_load_manager	typeref:typename:u32
load_config	tools/buildman/kconfiglib.py	/^    def load_config(self, filename, replace=True):$/;"	m	class:Config
load_config_help	scripts/kconfig/mconf.c	/^load_config_help[] = N_($/;"	v	typeref:typename:const char[]	file:
load_config_help	scripts/kconfig/nconf.c	/^load_config_help[] = N_($/;"	v	typeref:typename:const char[]	file:
load_config_text	scripts/kconfig/mconf.c	/^load_config_text[] = N_($/;"	v	typeref:typename:const char[]	file:
load_config_text	scripts/kconfig/nconf.c	/^load_config_text[] = N_($/;"	v	typeref:typename:const char[]	file:
load_data	disk/part_amiga.h	/^    u32   load_data[123];$/;"	m	struct:bootcode_block	typeref:typename:u32[123]
load_default_n	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 load_default_n;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
load_devicetree	board/BuR/common/common.c	/^static int load_devicetree(void)$/;"	f	typeref:typename:int	file:
load_ds	arch/x86/cpu/cpu.c	/^static void load_ds(u32 segment)$/;"	f	typeref:typename:void	file:
load_ecc8	lib/bch.c	/^static void load_ecc8(struct bch_control *bch, uint32_t *dst,$/;"	f	typeref:typename:void	file:
load_elf_image_phdr	cmd/elf.c	/^static unsigned long load_elf_image_phdr(unsigned long addr)$/;"	f	typeref:typename:unsigned long	file:
load_elf_image_shdr	cmd/elf.c	/^static unsigned long load_elf_image_shdr(unsigned long addr)$/;"	f	typeref:typename:unsigned long	file:
load_es	arch/x86/cpu/cpu.c	/^static void load_es(u32 segment)$/;"	f	typeref:typename:void	file:
load_filename	scripts/kconfig/gconf.c	/^load_filename(GtkFileSelection * file_selector, gpointer user_data)$/;"	f	typeref:typename:void	file:
load_fs	arch/x86/cpu/cpu.c	/^static void load_fs(u32 segment)$/;"	f	typeref:typename:void	file:
load_gdt	arch/x86/cpu/cpu.c	/^static void load_gdt(const u64 *boot_gdt, u16 num_entries)$/;"	f	typeref:typename:void	file:
load_gs	arch/x86/cpu/cpu.c	/^static void load_gs(u32 segment)$/;"	f	typeref:typename:void	file:
load_idt	arch/x86/cpu/interrupts.c	/^static inline void load_idt(const struct desc_ptr *dtr)$/;"	f	typeref:typename:void	file:
load_image	cmd/armflash.c	/^static int load_image(const char * const name, const ulong address)$/;"	f	typeref:typename:int	file:
load_image	include/spl.h	/^	int (*load_image)(struct spl_image_info *spl_image,$/;"	m	struct:spl_image_loader	typeref:typename:int (*)(struct spl_image_info * spl_image,struct spl_boot_device * bootdev)
load_jump_add0	drivers/ddr/altera/sequencer.h	/^	u32	load_jump_add0;$/;"	m	struct:socfpga_sdr_rw_load_jump_manager	typeref:typename:u32
load_jump_add1	drivers/ddr/altera/sequencer.h	/^	u32	load_jump_add1;$/;"	m	struct:socfpga_sdr_rw_load_jump_manager	typeref:typename:u32
load_jump_add2	drivers/ddr/altera/sequencer.h	/^	u32	load_jump_add2;$/;"	m	struct:socfpga_sdr_rw_load_jump_manager	typeref:typename:u32
load_jump_add3	drivers/ddr/altera/sequencer.h	/^	u32	load_jump_add3;$/;"	m	struct:socfpga_sdr_rw_load_jump_manager	typeref:typename:u32
load_kernel_h	include/jffs2/load_kernel.h	/^#define load_kernel_h$/;"	d
load_key_chunk	board/gdsys/p1022/controlcenterd-id.c	/^static struct key_program *load_key_chunk(const char *ifname,$/;"	f	typeref:struct:key_program *	file:
load_lcdtiming	board/BuR/common/common.c	/^int load_lcdtiming(struct am335x_lcdpanel *panel)$/;"	f	typeref:typename:int
load_mc_aiop_img	drivers/net/fsl-mc/mc.c	/^static int load_mc_aiop_img(u64 aiop_fw_addr)$/;"	f	typeref:typename:int	file:
load_mc_dpc	drivers/net/fsl-mc/mc.c	/^static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)$/;"	f	typeref:typename:int	file:
load_mc_dpl	drivers/net/fsl-mc/mc.c	/^static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)$/;"	f	typeref:typename:int	file:
load_microcode	arch/x86/cpu/sipi_vector.S	/^load_microcode:$/;"	l
load_mode	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 load_mode;$/;"	m	struct:panel_config	typeref:typename:u32
load_msr	arch/x86/cpu/sipi_vector.S	/^load_msr:$/;"	l
load_options	include/efi_api.h	/^	void *load_options;$/;"	m	struct:efi_loaded_image	typeref:typename:void *
load_options_size	include/efi_api.h	/^	u32 load_options_size;$/;"	m	struct:efi_loaded_image	typeref:typename:u32
load_rescue_image	board/cm5200/fwupdate.c	/^static int load_rescue_image(ulong addr)$/;"	f	typeref:typename:int	file:
load_sd_key_program	board/gdsys/p1022/controlcenterd-id.c	/^static struct key_program *load_sd_key_program(void)$/;"	f	typeref:struct:key_program *	file:
load_serial	cmd/load.c	/^static ulong load_serial(long offset)$/;"	f	typeref:typename:ulong	file:
load_serial_bin	cmd/load.c	/^static ulong load_serial_bin(ulong offset)$/;"	f	typeref:typename:ulong	file:
load_serial_ymodem	cmd/load.c	/^static ulong load_serial_ymodem(ulong offset, int mode)$/;"	f	typeref:typename:ulong	file:
load_sernum_ethaddr	board/tqc/tqm8xx/load_sernum_ethaddr.c	/^void load_sernum_ethaddr (void)$/;"	f	typeref:typename:void
load_sipi_vector	arch/x86/cpu/mp_init.c	/^static int load_sipi_vector(atomic_t **ap_countp, int num_cpus)$/;"	f	typeref:typename:int	file:
load_ss	arch/x86/cpu/cpu.c	/^static void load_ss(u32 segment)$/;"	f	typeref:typename:void	file:
load_uboot	tools/pblimage.c	/^static void load_uboot(FILE *fp_uboot)$/;"	f	typeref:typename:void	file:
load_val	arch/arm/mach-socfpga/include/mach/timer.h	/^	u32	load_val;$/;"	m	struct:socfpga_timer	typeref:typename:u32
load_word	drivers/fpga/zynqmppl.c	/^static u32 load_word(const void *buf, u32 swap)$/;"	f	typeref:typename:u32	file:
load_word	drivers/fpga/zynqpl.c	/^static u32 load_word(const void *buf, u32 swap)$/;"	f	typeref:typename:u32	file:
load_zimage	arch/x86/lib/zimage.c	/^struct boot_params *load_zimage(char *image, unsigned long kernel_size,$/;"	f	typeref:struct:boot_params *
loadaddr	drivers/remoteproc/ti_power_proc.c	/^	phys_addr_t loadaddr;$/;"	m	struct:ti_powerproc_privdata	typeref:typename:phys_addr_t	file:
loaded_image_info	cmd/bootefi.c	/^static struct efi_loaded_image loaded_image_info = {$/;"	v	typeref:struct:efi_loaded_image	file:
loaded_image_info_obj	cmd/bootefi.c	/^static struct efi_object loaded_image_info_obj = {$/;"	v	typeref:struct:efi_object	file:
loader_revision	arch/x86/cpu/intel_common/microcode.c	/^	uint loader_revision;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
loadflags	arch/x86/include/asm/bootparam.h	/^	__u8	loadflags;$/;"	m	struct:setup_header	typeref:typename:__u8
loadfs	include/xilinx.h	/^	int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *);$/;"	m	struct:xilinx_fpga_op	typeref:typename:int (*)(xilinx_desc *,const void *,size_t,fpga_fs_info *)
loadreduced	include/ddr_spd.h	/^		} loadreduced;$/;"	m	union:ddr4_spd_eeprom_s::__anoncde79dee040a	typeref:struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708
loadreg	arch/microblaze/include/asm/microblaze_timer.h	/^	int loadreg; \/* load register TLR *\/$/;"	m	struct:microblaze_timer_t	typeref:typename:int
loadtask	arch/powerpc/cpu/mpc5xxx/loadtask.c	/^void loadtask(int basetask, int tasks)$/;"	f	typeref:typename:void
loca	drivers/video/stb_truetype.h	/^   int loca,head,glyf,hhea,hmtx,kern; \/\/ table locations as offset from start of .ttf$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
local	arch/sandbox/include/asm/eth-raw-os.h	/^	int local;$/;"	m	struct:eth_sandbox_raw_priv	typeref:typename:int
local	drivers/usb/host/dwc2.c	/^static struct dwc2_priv local;$/;"	v	typeref:struct:dwc2_priv	file:
local	lib/crc32.c	/^#define local /;"	d	file:
local	lib/zlib/zutil.h	/^#  define local /;"	d
local	test/overlay/test-fdt-overlay.dts	/^			local: new-local-node {$/;"	l
local_bind_sd	arch/sandbox/include/asm/eth-raw-os.h	/^	int local_bind_sd;$/;"	m	struct:eth_sandbox_raw_priv	typeref:typename:int
local_bind_udp_port	arch/sandbox/include/asm/eth-raw-os.h	/^	unsigned short local_bind_udp_port;$/;"	m	struct:eth_sandbox_raw_priv	typeref:typename:unsigned short
local_bus_init	board/freescale/mpc8540ads/mpc8540ads.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/freescale/mpc8541cds/mpc8541cds.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/freescale/mpc8548cds/mpc8548cds.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/freescale/mpc8555cds/mpc8555cds.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/freescale/mpc8560ads/mpc8560ads.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/freescale/mpc8568mds/mpc8568mds.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/freescale/mpc8569mds/mpc8569mds.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/sbc8548/sbc8548.c	/^local_bus_init(void)$/;"	f	typeref:typename:void
local_bus_init	board/socrates/socrates.c	/^void local_bus_init (void)$/;"	f	typeref:typename:void
local_hose	drivers/pci/pci_ftpci100.c	/^static struct pci_controller local_hose;$/;"	v	typeref:struct:pci_controller	file:
local_hose	drivers/pci/tsi108_pci.c	/^struct pci_controller local_hose;$/;"	v	typeref:struct:pci_controller
local_irq_disable	arch/arm/include/asm/proc-armv/system.h	/^#define local_irq_disable(/;"	d
local_irq_disable	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void local_irq_disable(void)$/;"	f	typeref:typename:void
local_irq_disable	arch/blackfin/include/asm/system.h	/^#define local_irq_disable(/;"	d
local_irq_disable	arch/microblaze/include/asm/system.h	/^#define local_irq_disable(/;"	d
local_irq_disable	arch/mips/include/asm/system.h	/^#define local_irq_disable(/;"	d
local_irq_disable	arch/nds32/include/asm/system.h	/^#define local_irq_disable(/;"	d
local_irq_disable	arch/nios2/include/asm/system.h	/^#define local_irq_disable(/;"	d
local_irq_disable	arch/sandbox/include/asm/system.h	/^#define local_irq_disable(/;"	d
local_irq_enable	arch/arm/include/asm/proc-armv/system.h	/^#define local_irq_enable(/;"	d
local_irq_enable	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void local_irq_enable(void)$/;"	f	typeref:typename:void
local_irq_enable	arch/blackfin/include/asm/system.h	/^#define local_irq_enable(/;"	d
local_irq_enable	arch/microblaze/include/asm/system.h	/^#define local_irq_enable(/;"	d
local_irq_enable	arch/mips/include/asm/system.h	/^#define local_irq_enable(/;"	d
local_irq_enable	arch/nds32/include/asm/system.h	/^#define local_irq_enable(/;"	d
local_irq_enable	arch/nios2/include/asm/system.h	/^#define local_irq_enable(/;"	d
local_irq_enable	arch/sandbox/include/asm/system.h	/^#define local_irq_enable(/;"	d
local_irq_restore	arch/arm/include/asm/proc-armv/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void local_irq_restore($/;"	f	typeref:typename:void
local_irq_restore	arch/blackfin/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/microblaze/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/mips/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/nds32/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/nios2/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/sandbox/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_restore	arch/sh/include/asm/irqflags.h	/^#define local_irq_restore /;"	d
local_irq_restore	arch/xtensa/include/asm/system.h	/^#define local_irq_restore(/;"	d
local_irq_save	arch/arm/include/asm/proc-armv/system.h	/^#define local_irq_save(/;"	d
local_irq_save	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void local_irq_save($/;"	f	typeref:typename:void
local_irq_save	arch/blackfin/include/asm/system.h	/^# define local_irq_save(/;"	d
local_irq_save	arch/microblaze/include/asm/system.h	/^#define local_irq_save(/;"	d
local_irq_save	arch/mips/include/asm/system.h	/^#define local_irq_save(/;"	d
local_irq_save	arch/nds32/include/asm/system.h	/^#define local_irq_save(/;"	d
local_irq_save	arch/nios2/include/asm/system.h	/^#define local_irq_save(/;"	d
local_irq_save	arch/sandbox/include/asm/system.h	/^#define local_irq_save(/;"	d
local_irq_save	arch/sh/include/asm/irqflags.h	/^#define local_irq_save /;"	d
local_irq_save	arch/xtensa/include/asm/system.h	/^#define local_irq_save(/;"	d
local_irq_set	arch/microblaze/include/asm/system.h	/^#define local_irq_set(/;"	d
local_rx	drivers/net/e1000.h	/^	e1000_1000t_rx_status local_rx;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_1000t_rx_status
local_save_flags	arch/arm/include/asm/proc-armv/system.h	/^#define local_save_flags(/;"	d
local_save_flags	arch/arm/thumb1/include/asm/proc-armv/system.h	/^static inline void local_save_flags($/;"	f	typeref:typename:void
local_save_flags	arch/blackfin/include/asm/system.h	/^#define local_save_flags(/;"	d
local_save_flags	arch/nds32/include/asm/system.h	/^#define local_save_flags(/;"	d
local_save_flags	arch/nios2/include/asm/system.h	/^#define local_save_flags(/;"	d
local_save_flags	arch/sandbox/include/asm/system.h	/^#define local_save_flags(/;"	d
local_unescape	scripts/kernel-doc	/^sub local_unescape($) {$/;"	s
localboot	cmd/pxe.c	/^	int localboot;$/;"	m	struct:pxe_label	typeref:typename:int	file:
localboot_val	cmd/pxe.c	/^	int localboot_val;$/;"	m	struct:pxe_label	typeref:typename:int	file:
locality	drivers/tpm/tpm_tis.h	/^	int locality;$/;"	m	struct:tpm_chip	typeref:typename:int
localmodconfig	scripts/kconfig/Makefile	/^localyesconfig localmodconfig: $(obj)\/streamline_config.pl $(obj)\/conf$/;"	t
locals	arch/sparc/include/asm/ptrace.h	/^	unsigned long locals[8];$/;"	m	struct:reg_window	typeref:typename:unsigned long[8]
locals	arch/sparc/include/asm/ptrace.h	/^	unsigned long locals[8];$/;"	m	struct:sparc_stackf	typeref:typename:unsigned long[8]
locals	arch/sparc/include/asm/stack.h	/^		unsigned long locals[32];$/;"	m	struct:sparc_fpuwindow_regs	typeref:typename:unsigned long[32]
locals	arch/sparc/include/asm/stack.h	/^		unsigned long locals[8];$/;"	m	struct:sparc_regwindow_regs	typeref:typename:unsigned long[8]
localyesconfig	scripts/kconfig/Makefile	/^localyesconfig localmodconfig: $(obj)\/streamline_config.pl $(obj)\/conf$/;"	t
location	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t location;$/;"	m	struct:usb2_port_setting	typeref:typename:uint8_t
location	arch/x86/include/asm/coreboot_tables.h	/^	u32 location;$/;"	m	struct:cb_cmos_checksum	typeref:typename:u32
location	include/linux/mtd/omap_elm.h	/^struct location {$/;"	s
location_config	include/linux/mtd/omap_elm.h	/^	u32 location_config;			\/* 0x020 *\/$/;"	m	struct:elm	typeref:typename:u32
location_status	include/linux/mtd/omap_elm.h	/^	u32 location_status;		\/* 0x800 *\/$/;"	m	struct:location	typeref:typename:u32
lock	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	lock;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
lock	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 lock;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
lock	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 lock:2;		\/* lock enable\/disable PMUX_PIN...  *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
lock	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 lock:1;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:1
lock	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 lock;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
lock	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^lock:$/;"	l
lock	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 lock; \/* 0x4 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
lock	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long lock;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
lock	board/spear/common/spr_lowlevel_init.S	/^lock:$/;"	l
lock	drivers/usb/dwc3/core.h	/^	spinlock_t		lock;$/;"	m	struct:dwc3	typeref:typename:spinlock_t
lock	drivers/usb/gadget/at91_udc.h	/^	spinlock_t			lock;$/;"	m	struct:at91_udc	typeref:typename:spinlock_t
lock	drivers/usb/musb-new/musb_core.h	/^	spinlock_t		lock;$/;"	m	struct:musb	typeref:typename:spinlock_t
lock	fs/ubifs/ubifs.h	/^	spinlock_t lock;$/;"	m	struct:ubifs_wbuf	typeref:typename:spinlock_t
lock	include/linux/fb.h	/^	struct mutex lock; \/* mutex that protects the page list *\/$/;"	m	struct:fb_deferred_io	typeref:struct:mutex
lock	include/linux/mtd/flashchip.h	/^	struct mutex lock;$/;"	m	struct:flchip_shared	typeref:struct:mutex
lock	include/linux/mtd/nand.h	/^	spinlock_t lock;$/;"	m	struct:nand_hw_control	typeref:typename:spinlock_t
lock_cache_for_stack	arch/arm/cpu/pxa/start.S	/^lock_cache_for_stack:$/;"	l
lock_descriptor	tools/ifdtool.c	/^static void lock_descriptor(char *image, int size)$/;"	f	typeref:typename:void	file:
lock_det	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	lock_det:6;	\/* LOCK_DETECT\/LOCKED shift *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:6
lock_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void lock_dpll(u32 const base)$/;"	f	typeref:typename:void
lock_en	drivers/video/ipu_regs.h	/^	u32 lock_en[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
lock_ena	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	lock_ena:6;	\/* LOCK_ENABLE\/EN_LOCKDET shift *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:6
lock_enable	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 lock_enable:1;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:1
lock_map	fs/ubifs/ubifs.h	/^	struct lockdep_map	lock_map[SB_FREEZE_LEVELS];$/;"	m	struct:sb_writers	typeref:struct:lockdep_map[]
lock_microcode	arch/x86/cpu/sipi_vector.S	/^lock_microcode:$/;"	l
lock_pr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 lock_pr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
lock_pups	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static void lock_pups(u32 pup, u32 *pup_locked, u8 *unlock_pup_dq_array,$/;"	f	typeref:typename:void	file:
lock_ram_in_cache	arch/powerpc/cpu/mpc83xx/start.S	/^lock_ram_in_cache:$/;"	l
lock_ram_in_cache	arch/powerpc/cpu/mpc86xx/start.S	/^lock_ram_in_cache:$/;"	l
lock_registers	arch/x86/cpu/quark/smc.c	/^void lock_registers(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
lock_sel	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 lock_sel:6;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:6
lock_state	arch/x86/include/asm/me_common.h	/^	u16 lock_state:1;$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
locked	drivers/spi/ich.h	/^	int locked;$/;"	m	struct:ich_spi_priv	typeref:typename:int
locked	fs/yaffs2/yaffs_guts.h	/^	int locked;		\/* Can't push out or flush while locked. *\/$/;"	m	struct:yaffs_cache	typeref:typename:int
locked	include/mtd/mtd-abi.h	/^	__u32 locked;$/;"	m	struct:otp_info	typeref:typename:__u32
lockless_dereference	include/linux/compiler.h	/^#define lockless_dereference(/;"	d
lockloop	board/samsung/goni/lowlevel_init.S	/^lockloop:$/;"	l
lockmap	include/linux/mtd/mtd.h	/^	unsigned long *lockmap;		\/* If keeping bitmap of locks *\/$/;"	m	struct:mtd_erase_region_info	typeref:typename:unsigned long *
lockname	tools/env/fw_env.h	/^	char *lockname;$/;"	m	struct:env_opts	typeref:typename:char *
locksr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	locksr;		\/* 0xE0 Lock Status *\/$/;"	m	struct:at91_port	typeref:typename:u32
locksr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 locksr;		\/* 0x0C PIO Lock Status Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
locktime	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	locktime;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
loff_t	include/linux/types.h	/^typedef __kernel_loff_t		loff_t;$/;"	t	typeref:typename:__kernel_loff_t
log	board/bf537-stamp/post-memory.c	/^const char *const log[CCLK_NUM][SCLK_NUM] = {$/;"	v	typeref:typename:const char * const[][]
log	cmd/log.c	/^static logbuff_t *log;$/;"	v	typeref:typename:logbuff_t *	file:
log	cmd/log.c	/^static volatile logbuff_t *log;$/;"	v	typeref:typename:volatile logbuff_t *	file:
log	doc/README.x86	/^log in as 'root'):$/;"	l
log	test/py/conftest.py	/^log = None$/;"	v
log2	fs/reiserfs/reiserfs_private.h	/^log2 (unsigned long word)$/;"	f	typeref:typename:unsigned long
log2_block_size	include/ext_common.h	/^	__le32 log2_block_size;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
log2_bpp	drivers/video/tegra.c	/^	enum video_log2_bpp log2_bpp;	\/* colour depth *\/$/;"	m	struct:tegra_lcd_priv	typeref:enum:video_log2_bpp	file:
log2_fragment_size	include/ext_common.h	/^	__le32 log2_fragment_size;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
log2_groups_per_flex	include/ext_common.h	/^	uint8_t log2_groups_per_flex;$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t
log2blksz	include/blk.h	/^	int		log2blksz;	\/* for convenience: log2(blksz) *\/$/;"	m	struct:blk_desc	typeref:typename:int
log_2_n_round_down	arch/arm/include/asm/utils.h	/^static inline s32 log_2_n_round_down(u32 n)$/;"	f	typeref:typename:s32
log_2_n_round_up	arch/arm/include/asm/utils.h	/^static inline s32 log_2_n_round_up(u32 n)$/;"	f	typeref:typename:s32
log_bytes	fs/ubifs/ubifs.h	/^	long long log_bytes;$/;"	m	struct:ubifs_info	typeref:typename:long long
log_id	drivers/net/mvpp2.c	/^	u8 log_id;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:u8	file:
log_last	fs/ubifs/ubifs.h	/^	int log_last;$/;"	m	struct:ubifs_info	typeref:typename:int
log_lebs	fs/ubifs/ubifs-media.h	/^	__le32 log_lebs;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
log_lebs	fs/ubifs/ubifs.h	/^	int log_lebs;$/;"	m	struct:ubifs_info	typeref:typename:int
log_level	drivers/ddr/marvell/a38x/ddr3_init.h	/^enum log_level  {$/;"	g
log_level	drivers/ddr/marvell/axp/ddr3_init.c	/^static u32 log_level = DDR3_LOG_LEVEL;$/;"	v	typeref:typename:u32	file:
log_level	drivers/ddr/marvell/axp/ddr3_init.h	/^enum log_level  {$/;"	g
log_lnum	fs/ubifs/ubifs-media.h	/^	__le32 log_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
log_mutex	fs/ubifs/ubifs.h	/^	struct mutex log_mutex;$/;"	m	struct:ubifs_info	typeref:struct:mutex
log_version	cmd/log.c	/^static unsigned log_version = 1;$/;"	v	typeref:typename:unsigned	file:
logbuff_init_ptrs	cmd/log.c	/^void logbuff_init_ptrs(void)$/;"	f	typeref:typename:void
logbuff_log	cmd/log.c	/^void logbuff_log(char *msg)$/;"	f	typeref:typename:void
logbuff_printk	cmd/log.c	/^static int logbuff_printk(const char *line)$/;"	f	typeref:typename:int	file:
logbuff_putc	cmd/log.c	/^static void logbuff_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void	file:
logbuff_puts	cmd/log.c	/^static void logbuff_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
logbuff_reset	cmd/log.c	/^void logbuff_reset(void)$/;"	f	typeref:typename:void
logbuff_t	include/logbuff.h	/^} logbuff_t;$/;"	t	typeref:struct:__anon50fce6f30108
logbuffer_base	common/board_r.c	/^unsigned long logbuffer_base(void)$/;"	f	typeref:typename:unsigned long
logic_reset_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
logic_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
logic_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	logic_reset_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
logic_rxq	drivers/net/mvpp2.c	/^	int logic_rxq;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:int	file:
logic_state	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t logic_state;$/;"	m	struct:mrq_pg_read_state_response	typeref:typename:uint32_t
logic_state	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t logic_state;$/;"	m	struct:mrq_pg_update_state_request	typeref:typename:uint32_t
logical_address	include/dataflash.h	/^	unsigned long logical_address;$/;"	m	struct:_AT91S_DATAFLASH_INFO	typeref:typename:unsigned long
logical_err	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_logical_err	logical_err;$/;"	m	struct:ccsr_rio	typeref:struct:rio_logical_err
logical_partition	include/efi_api.h	/^	char logical_partition;$/;"	m	struct:efi_block_io_media	typeref:typename:char
logo_addr	drivers/video/exynos/exynos_fb.c	/^	unsigned long logo_addr;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned long	file:
logo_addr	include/exynos_lcd.h	/^	unsigned long logo_addr;$/;"	m	struct:vidinfo	typeref:typename:unsigned long
logo_black	drivers/video/cfb_console.c	/^static void logo_black(void)$/;"	f	typeref:typename:void	file:
logo_height	drivers/video/exynos/exynos_fb.c	/^	unsigned int logo_height;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
logo_height	include/exynos_lcd.h	/^	unsigned int logo_height;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
logo_on	drivers/video/exynos/exynos_fb.c	/^	unsigned int logo_on;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
logo_on	include/exynos_lcd.h	/^	unsigned int logo_on;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
logo_plot	drivers/video/cfb_console.c	/^static void logo_plot(void *screen, int x, int y)$/;"	f	typeref:typename:void	file:
logo_width	drivers/video/exynos/exynos_fb.c	/^	unsigned int logo_width;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
logo_width	include/exynos_lcd.h	/^	unsigned int logo_width;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
logo_x_offset	drivers/video/exynos/exynos_fb.c	/^	int logo_x_offset;$/;"	m	struct:exynos_fb_priv	typeref:typename:int	file:
logo_x_offset	include/exynos_lcd.h	/^	int logo_x_offset;$/;"	m	struct:vidinfo	typeref:typename:int
logo_y_offset	drivers/video/exynos/exynos_fb.c	/^	int logo_y_offset;$/;"	m	struct:exynos_fb_priv	typeref:typename:int	file:
logo_y_offset	include/exynos_lcd.h	/^	int logo_y_offset;$/;"	m	struct:vidinfo	typeref:typename:int
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long    :3;	\/* Unused *\/$/;"	m	struct:_PTE	typeref:typename:unsigned:3
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long  :1;	\/* Unused *\/$/;"	m	struct:_PTE	typeref:typename:unsigned:1
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :10;	\/* Unused *\/$/;"	m	struct:_BATL	typeref:typename:unsigned:10
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :10;	\/* Unused *\/$/;"	m	struct:_P601_BATL	typeref:typename:unsigned:10
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :1;	\/* Unused *\/$/;"	m	struct:_BATL	typeref:typename:unsigned:1
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :4;	\/* Unused *\/$/;"	m	struct:_BATU	typeref:typename:unsigned:4
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :4;	\/* Unused *\/$/;"	m	struct:_SEGREG	typeref:typename:unsigned:4
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :5;$/;"	m	struct:_PTE	typeref:typename:unsigned:5
long	arch/powerpc/include/asm/mmu.h	/^	unsigned long :8;	\/* unused *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned:8
longDblUnion	post/lib_powerpc/fpu/darwin-ldouble.c	/^} longDblUnion;$/;"	t	typeref:union:__anon31388ce3010a	file:
long_length_counter	drivers/net/dm9000x.c	/^	u32 long_length_counter;	\/* counter: RX length > 1514byte *\/$/;"	m	struct:board_info	typeref:typename:u32	file:
long_options	tools/env/fw_env_main.c	/^static struct option long_options[] = {$/;"	v	typeref:struct:option[]	file:
long_opts	arch/sandbox/cpu/os.c	/^static struct option *long_opts;$/;"	v	typeref:struct:option *	file:
long_opts	scripts/kconfig/conf.c	/^static struct option long_opts[] = {$/;"	v	typeref:struct:option[]	file:
longest_match	lib/zlib/deflate.c	/^local uInt longest_match(s, cur_match)$/;"	f
longjmp	arch/arm/include/asm/setjmp.h	/^static inline __noreturn void longjmp(jmp_buf jmp, int ret)$/;"	f	typeref:typename:__noreturn void
longjmp	arch/x86/cpu/setjmp.S	/^longjmp:$/;"	l
longjmp	examples/standalone/sched.c	/^#define longjmp	/;"	d	file:
longjmp_on_fault	common/kgdb.c	/^static int longjmp_on_fault = 0;$/;"	v	typeref:typename:int	file:
lookahead	lib/zlib/deflate.h	/^    uInt lookahead;              \/* number of valid bytes ahead in window *\/$/;"	m	struct:internal_state	typeref:typename:uInt
lookup_level0_dirty	fs/ubifs/tnc.c	/^static int lookup_level0_dirty(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int	file:
lookup_param	common/cli_hush.c	/^static char *lookup_param(char *src)$/;"	f	typeref:typename:char *	file:
lookup_string	drivers/usb/gadget/composite.c	/^static int lookup_string($/;"	f	typeref:typename:int	file:
lookup_znode	fs/ubifs/tnc.c	/^static struct ubifs_znode *lookup_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
lookuptbl	drivers/mtd/ubi/ubi.h	/^	struct ubi_wl_entry **lookuptbl;$/;"	m	struct:ubi_device	typeref:struct:ubi_wl_entry **
loop	arch/arc/lib/strcpy-700.S	/^loop:$/;"	l
loop	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 loop;		\/* Loopback Control Register	*\/$/;"	m	struct:uart_ctrl_regs	typeref:typename:u32
loop	arch/sh/cpu/sh2/start.S	/^loop:$/;"	l
loop	arch/sh/cpu/sh3/start.S	/^loop:$/;"	l
loop	arch/sh/cpu/sh4/start.S	/^loop:$/;"	l
loop	doc/README.x86	/^loop during the FspInit call. This bug was published by Intel although Intel$/;"	l
loop	include/serial.h	/^	int (*loop)(struct udevice *dev, int on);$/;"	m	struct:dm_serial_ops	typeref:typename:int (*)(struct udevice * dev,int on)
loop	include/serial.h	/^	void	(*loop)(int);$/;"	m	struct:serial_device	typeref:typename:void (*)(int)
loop	scripts/kconfig/streamline_config.pl	/^loop:$/;"	l
loop0	arch/arm/mach-rmobile/lowlevel_init.S	/^loop0:$/;"	l
loop1	arch/arm/cpu/armv7/cache_v7_asm.S	/^loop1:$/;"	l
loop1	arch/arm/cpu/armv7/psci.S	/^loop1:$/;"	l
loop2	arch/arm/cpu/armv7/cache_v7_asm.S	/^loop2:$/;"	l
loop2	arch/arm/cpu/armv7/psci.S	/^loop2:$/;"	l
loop_depend	scripts/kconfig/streamline_config.pl	/^sub loop_depend {$/;"	s
loop_greedy	lib/slre.c	/^loop_greedy(const struct slre *r, int pc, const char *s, int len, int *ofs)$/;"	f	typeref:typename:void	file:
loop_level	arch/arm/cpu/armv8/cache.S	/^loop_level:$/;"	l
loop_non_greedy	lib/slre.c	/^loop_non_greedy(const struct slre *r, int pc, const char *s, int len, int *ofs)$/;"	f	typeref:typename:void	file:
loop_select	scripts/kconfig/streamline_config.pl	/^sub loop_select {$/;"	s
loop_set	arch/arm/cpu/armv8/cache.S	/^loop_set:$/;"	l
loop_start	arch/arc/lib/strcpy-700.S	/^loop_start:$/;"	l
loop_way	arch/arm/cpu/armv8/cache.S	/^loop_way:$/;"	l
loopback	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	u32 loopback;$/;"	m	struct:ks2_serdes	typeref:typename:u32
loops_per_jiffy	arch/avr32/include/asm/processor.h	/^	unsigned long loops_per_jiffy;$/;"	m	struct:avr32_cpuinfo	typeref:typename:unsigned long
lopttlcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lopttlcr;$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
lost_n_found	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *lost_n_found;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_obj *
lotkninasyncpkt	drivers/net/mvgbe.h	/^	u32 lotkninasyncpkt;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
low	arch/arc/lib/libgcc2.h	/^	struct DWstruct {Wtype high, low;};$/;"	m	struct:DWstruct	typeref:typename:Wtype
low	arch/arc/lib/libgcc2.h	/^	struct DWstruct {Wtype low, high;};$/;"	m	struct:DWstruct	typeref:typename:Wtype
low	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t low;$/;"	m	struct:cmd_thermal_set_trip_request	typeref:typename:int32_t
low	arch/arm/include/asm/setup.h	/^	u32 low;$/;"	m	struct:tag_serialnr	typeref:typename:u32
low	arch/blackfin/lib/muldi3.c	/^	SItype low, high;$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
low	arch/m68k/lib/ashldi3.c	/^struct DIstruct {SItype high, low;};$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
low	arch/m68k/lib/lshrdi3.c	/^struct DIstruct {SItype high, low;};$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
low	arch/m68k/lib/muldi3.c	/^struct DIstruct {SItype high, low;};$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
low	arch/microblaze/lib/muldi3.c	/^	SItype low, high;$/;"	m	struct:DIstruct	typeref:typename:SItype	file:
low	arch/mips/lib/libgcc.h	/^	int high, low;$/;"	m	struct:DWstruct	typeref:typename:int
low	arch/mips/lib/libgcc.h	/^	int low, high;$/;"	m	struct:DWstruct	typeref:typename:int
low	arch/nds32/include/asm/setup.h	/^	u32 low;$/;"	m	struct:tag_serialnr	typeref:typename:u32
low	arch/nios2/lib/libgcc.c	/^struct DWstruct { Wtype low, high;};$/;"	m	struct:DWstruct	typeref:typename:Wtype	file:
low	arch/sh/lib/libgcc.h	/^	int high, low;$/;"	m	struct:DWstruct	typeref:typename:int
low	arch/sh/lib/libgcc.h	/^	int low, high;$/;"	m	struct:DWstruct	typeref:typename:int
low	drivers/block/sata_dwc.c	/^	u32 low;$/;"	m	struct:dmareg	typeref:typename:u32	file:
low	drivers/crypto/fsl/desc_constr.h	/^		u32 low;$/;"	m	struct:ptr_addr_t::__anona38440c40108	typeref:typename:u32
low	drivers/net/e1000.h	/^	volatile uint32_t low;	\/* receive address low *\/$/;"	m	struct:e1000_rar	typeref:typename:volatile uint32_t
low	drivers/net/pch_gbe.h	/^	u32 low;$/;"	m	struct:pch_gbe_regs_mac_adr	typeref:typename:u32
low_cyl	disk/part_amiga.h	/^    u32 low_cyl;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
low_freq	drivers/ddr/marvell/a38x/ddr3_training.c	/^enum hws_ddr_freq low_freq = DDR_FREQ_LOW_FREQ;$/;"	v	typeref:enum:hws_ddr_freq
low_power_mode	include/power/pmic.h	/^	void (*low_power_mode) (void);$/;"	m	struct:pmic	typeref:typename:void (*)(void)
low_power_start	arch/arm/mach-exynos/lowlevel_init.c	/^static void low_power_start(void)$/;"	f	typeref:typename:void	file:
lowboot_reentry	arch/powerpc/cpu/mpc5xxx/start.S	/^lowboot_reentry:$/;"	l
lower	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32     lower;$/;"	m	struct:ccsr_gur::__anon245f04be0108	typeref:typename:u32
lower	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u32	lower;$/;"	m	struct:ccsr_gur::__anon245f08ff0108	typeref:typename:u32
lower	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32     lower;$/;"	m	struct:ccsr_gur::__anon58ea331d0108	typeref:typename:u32
lower	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 lower;$/;"	m	struct:mx31_weim_cscr	typeref:typename:u32
lower	arch/arm/include/asm/arch-mx31/sys_proto.h	/^	u32 lower;$/;"	m	struct:mxc_weimcs	typeref:typename:u32
lower	arch/powerpc/include/asm/immap_85xx.h	/^		u32	lower;$/;"	m	struct:ccsr_gur::__anondcd7518a0308	typeref:typename:u32
lower	drivers/net/e1000.h	/^	} lower;$/;"	m	struct:e1000_data_desc	typeref:union:e1000_data_desc::__anon7fc273451a0a
lower	drivers/net/e1000.h	/^	} lower;$/;"	m	struct:e1000_tx_desc	typeref:union:e1000_tx_desc::__anon7fc27345100a
lower32	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define lower32(/;"	d
lower_32_bits	include/linux/kernel.h	/^#define lower_32_bits(/;"	d
lower_margin	drivers/video/videomodes.h	/^	int lower_margin;$/;"	m	struct:ctfb_res_modes	typeref:typename:int
lower_margin	include/linux/fb.h	/^	__u32 lower_margin;$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
lower_margin	include/linux/fb.h	/^	u32 lower_margin;$/;"	m	struct:fb_videomode	typeref:typename:u32
lower_setup	drivers/net/e1000.h	/^	} lower_setup;$/;"	m	struct:e1000_context_desc	typeref:union:e1000_context_desc::__anon7fc27345140a
lowest_common_dimm_parameters_edit	drivers/ddr/fsl/interactive.c	/^static void lowest_common_dimm_parameters_edit(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:void	file:
lowest_common_spd_caslat	include/common_timing_params.h	/^	unsigned int lowest_common_spd_caslat;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
lowest_dent_key	fs/ubifs/key.h	/^static inline void lowest_dent_key(const struct ubifs_info *c,$/;"	f	typeref:typename:void
lowest_ino_key	fs/ubifs/key.h	/^static inline void lowest_ino_key(const struct ubifs_info *c,$/;"	f	typeref:typename:void
lowest_mV	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint16_t		lowest_mV;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint16_t	file:
lowest_xent_key	fs/ubifs/key.h	/^static inline void lowest_xent_key(const struct ubifs_info *c,$/;"	f	typeref:typename:void
lowlevel_clock_init	arch/arm/mach-at91/spl_at91.c	/^void lowlevel_clock_init(void)$/;"	f	typeref:typename:void
lowlevel_init	arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^void lowlevel_init(void) {}$/;"	f	typeref:typename:void
lowlevel_init	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/arm/mach-at91/arm926ejs/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/arm/mach-bcm283x/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/arm/mach-davinci/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/arm/mach-exynos/soc.c	/^void lowlevel_init(void)$/;"	f	typeref:typename:void
lowlevel_init	arch/arm/mach-mvebu/cpu.c	/^void lowlevel_init(void)$/;"	f	typeref:typename:void
lowlevel_init	arch/arm/mach-orion5x/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	arch/mips/mach-ath79/ar934x/cpu.c	/^void lowlevel_init(void) {}$/;"	f	typeref:typename:void
lowlevel_init	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/CarMediaLab/flea3/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/alphaproject/ap_sh4a_4a/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/armadeus/apf27/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/armltd/integrator/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/armltd/vexpress/vexpress_common.c	/^void lowlevel_init(void)$/;"	f	typeref:typename:void
lowlevel_init	board/dbau1x00/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/espt/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/freescale/mx25pdk/mx25pdk.c	/^void lowlevel_init(void) {}$/;"	f	typeref:typename:void
lowlevel_init	board/freescale/mx31ads/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/freescale/mx31pdk/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/freescale/mx35pdk/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/imgtec/malta/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/imx31_phycore/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/mpl/vcma9/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/mpr2/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/ms7720se/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/ms7722se/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/ms7750se/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/pb1x00/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/qemu-mips/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/MigoR/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/ap325rxa/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/ecovec/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/r0p7734/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/r2dplus/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/r7780mp/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/rsk7203/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/rsk7264/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/rsk7269/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/sh7752evb/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/sh7753evb/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/sh7757lcr/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/sh7763rdp/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/renesas/sh7785lcr/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/samsung/goni/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/samsung/smdk2410/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/samsung/smdkc100/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/shmin/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/spear/common/spr_lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/syteco/zmx25/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init	board/woodburn/lowlevel_init.S	/^lowlevel_init:$/;"	l
lowlevel_init__	arch/arm/mach-rmobile/lowlevel_init.S	/^lowlevel_init__:$/;"	l
lowpwr_ack	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	lowpwr_ack;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
lowpwr_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t lowpwr_ctrl;			\/* offset 0x0330 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
lowpwr_ctrl_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t lowpwr_ctrl_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
lowpwr_ctrl_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t lowpwr_ctrl_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
lowpwr_ctrl_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t lowpwr_ctrl_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
lowpwr_eq	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	lowpwr_eq;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
lowpwr_eq	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	lowpwr_eq;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
lowpwr_timing	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	lowpwr_timing;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
lowpwr_timing	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	lowpwr_timing;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
lowup	cmd/otp.c	/^#define lowup(/;"	d	file:
lp	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG lp;		\/* r30 *\/$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
lp	arch/powerpc/cpu/mpc8xx/video.c	/^			lp:1,		\/* Loop start\/end *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:1	file:
lp	drivers/net/pcnet.c	/^static pcnet_priv_t *lp;$/;"	v	typeref:typename:pcnet_priv_t *	file:
lp	lib/lzma/LzmaDec.h	/^  unsigned lc, lp, pb;$/;"	m	struct:_CLzmaProps	typeref:typename:unsigned
lp2zqcfg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 lp2zqcfg;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
lp2zqcfg	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 lp2zqcfg;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
lp873x_bind	drivers/power/pmic/lp873x.c	/^static int lp873x_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lp873x_buck_ctrl	drivers/power/regulator/lp873x_regulator.c	/^static const char lp873x_buck_ctrl[LP873X_BUCK_NUM] = {0x2, 0x4};$/;"	v	typeref:typename:const char[]	file:
lp873x_buck_enable	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_buck_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
lp873x_buck_hex2volt	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_buck_hex2volt(int hex)$/;"	f	typeref:typename:int	file:
lp873x_buck_ops	drivers/power/regulator/lp873x_regulator.c	/^static const struct dm_regulator_ops lp873x_buck_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
lp873x_buck_probe	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_buck_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lp873x_buck_val	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_buck_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
lp873x_buck_volt	drivers/power/regulator/lp873x_regulator.c	/^static const char lp873x_buck_volt[LP873X_BUCK_NUM] = {0x6, 0x7};$/;"	v	typeref:typename:const char[]	file:
lp873x_buck_volt2hex	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_buck_volt2hex(int uV)$/;"	f	typeref:typename:int	file:
lp873x_ids	drivers/power/pmic/lp873x.c	/^static const struct udevice_id lp873x_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
lp873x_ldo_ctrl	drivers/power/regulator/lp873x_regulator.c	/^static const char lp873x_ldo_ctrl[LP873X_LDO_NUM] = {0x8, 0x9};$/;"	v	typeref:typename:const char[]	file:
lp873x_ldo_enable	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_ldo_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
lp873x_ldo_hex2volt	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_ldo_hex2volt(int hex)$/;"	f	typeref:typename:int	file:
lp873x_ldo_ops	drivers/power/regulator/lp873x_regulator.c	/^static const struct dm_regulator_ops lp873x_ldo_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
lp873x_ldo_probe	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_ldo_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lp873x_ldo_val	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_ldo_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
lp873x_ldo_volt	drivers/power/regulator/lp873x_regulator.c	/^static const char lp873x_ldo_volt[LP873X_LDO_NUM] = {0xA, 0xB};$/;"	v	typeref:typename:const char[]	file:
lp873x_ldo_volt2hex	drivers/power/regulator/lp873x_regulator.c	/^static int lp873x_ldo_volt2hex(int uV)$/;"	f	typeref:typename:int	file:
lp873x_ops	drivers/power/pmic/lp873x.c	/^static struct dm_pmic_ops lp873x_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
lp873x_read	drivers/power/pmic/lp873x.c	/^static int lp873x_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
lp873x_write	drivers/power/pmic/lp873x.c	/^static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
lp_advertising	include/linux/ethtool.h	/^	__u32	lp_advertising;	\/* Features the link partner advertises *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u32
lp_count	arch/arc/include/asm/ptrace.h	/^	long lp_count;$/;"	m	struct:pt_regs	typeref:typename:long
lp_end	arch/arc/include/asm/ptrace.h	/^	long lp_end;$/;"	m	struct:pt_regs	typeref:typename:long
lp_mutex	fs/ubifs/ubifs.h	/^	struct mutex lp_mutex;$/;"	m	struct:ubifs_info	typeref:struct:mutex
lp_serial	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_lp_serial	lp_serial;$/;"	m	struct:ccsr_rio	typeref:struct:rio_lp_serial
lp_start	arch/arc/include/asm/ptrace.h	/^	long lp_start;$/;"	m	struct:pt_regs	typeref:typename:long
lpbaw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpbaw;		\/* LP Boot Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpc	arch/powerpc/include/asm/immap_512x.h	/^	lpc512x_t		lpc;		\/* LocalPlus Controller *\/$/;"	m	struct:immap	typeref:typename:lpc512x_t
lpc32xx-boot-0.bin	Makefile	/^lpc32xx-boot-0.bin: lpc32xx-spl.img FORCE$/;"	t
lpc32xx-boot-1.bin	Makefile	/^lpc32xx-boot-1.bin: lpc32xx-spl.img FORCE$/;"	t
lpc32xx-full.bin	Makefile	/^lpc32xx-full.bin: lpc32xx-boot-0.bin lpc32xx-boot-1.bin u-boot.img FORCE$/;"	t
lpc32xx-spl.img	Makefile	/^lpc32xx-spl.img: spl\/u-boot-spl.bin FORCE$/;"	t
lpc32xx_chip	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static struct nand_chip lpc32xx_chip;$/;"	v	typeref:struct:nand_chip	file:
lpc32xx_cmd_ctrl	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static void lpc32xx_cmd_ctrl(struct mtd_info *mtd, int cmd,$/;"	f	typeref:typename:void	file:
lpc32xx_correct_data	drivers/mtd/nand/lpc32xx_nand_slc.c	/^int lpc32xx_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int
lpc32xx_dev_ready	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
lpc32xx_dma_get_channel	drivers/dma/lpc32xx_dma.c	/^int lpc32xx_dma_get_channel(void)$/;"	f	typeref:typename:int
lpc32xx_dma_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_dma_init(void)$/;"	f	typeref:typename:void
lpc32xx_dma_read_buf	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_dma_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
lpc32xx_dma_start_xfer	drivers/dma/lpc32xx_dma.c	/^int lpc32xx_dma_start_xfer(unsigned int channel,$/;"	f	typeref:typename:int
lpc32xx_dma_wait_status	drivers/dma/lpc32xx_dma.c	/^int lpc32xx_dma_wait_status(unsigned int channel)$/;"	f	typeref:typename:int
lpc32xx_dma_write_buf	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_dma_write_buf(struct mtd_info *mtd, const uint8_t *buf,$/;"	f	typeref:typename:void	file:
lpc32xx_dmac_ll	arch/arm/include/asm/arch-lpc32xx/dma.h	/^struct lpc32xx_dmac_ll {$/;"	s
lpc32xx_dmac_next_lli	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define lpc32xx_dmac_next_lli(/;"	d	file:
lpc32xx_dmac_set_dma_data	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define lpc32xx_dmac_set_dma_data(/;"	d	file:
lpc32xx_dmac_set_ecc	drivers/mtd/nand/lpc32xx_nand_slc.c	/^#define lpc32xx_dmac_set_ecc(/;"	d	file:
lpc32xx_ecc_calculate	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static int lpc32xx_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,$/;"	f	typeref:typename:int	file:
lpc32xx_eth	drivers/net/lpc32xx_eth.c	/^static struct lpc32xx_eth_device lpc32xx_eth = {$/;"	v	typeref:struct:lpc32xx_eth_device	file:
lpc32xx_eth_buffers	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_buffers {$/;"	s	file:
lpc32xx_eth_device	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_device {$/;"	s	file:
lpc32xx_eth_halt	drivers/net/lpc32xx_eth.c	/^static int lpc32xx_eth_halt(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_eth_init	drivers/net/lpc32xx_eth.c	/^static int lpc32xx_eth_init(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_eth_initialize	drivers/net/lpc32xx_eth.c	/^int lpc32xx_eth_initialize(bd_t *bis)$/;"	f	typeref:typename:int
lpc32xx_eth_phylib_init	drivers/net/lpc32xx_eth.c	/^int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)$/;"	f	typeref:typename:int
lpc32xx_eth_recv	drivers/net/lpc32xx_eth.c	/^static int lpc32xx_eth_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_eth_registers	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_registers {$/;"	s	file:
lpc32xx_eth_rxdesc	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_rxdesc {$/;"	s	file:
lpc32xx_eth_rxstat	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_rxstat {$/;"	s	file:
lpc32xx_eth_send	drivers/net/lpc32xx_eth.c	/^static int lpc32xx_eth_send(struct eth_device *dev, void *dataptr, int datasize)$/;"	f	typeref:typename:int	file:
lpc32xx_eth_txdesc	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_txdesc {$/;"	s	file:
lpc32xx_eth_txstat	drivers/net/lpc32xx_eth.c	/^struct lpc32xx_eth_txstat {$/;"	s	file:
lpc32xx_eth_write_hwaddr	drivers/net/lpc32xx_eth.c	/^static int lpc32xx_eth_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_gpio_direction_input	drivers/gpio/lpc32xx_gpio.c	/^static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
lpc32xx_gpio_direction_output	drivers/gpio/lpc32xx_gpio.c	/^static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
lpc32xx_gpio_get_function	drivers/gpio/lpc32xx_gpio.c	/^static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
lpc32xx_gpio_get_value	drivers/gpio/lpc32xx_gpio.c	/^static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
lpc32xx_gpio_priv	drivers/gpio/lpc32xx_gpio.c	/^struct lpc32xx_gpio_priv {$/;"	s	file:
lpc32xx_gpio_probe	drivers/gpio/lpc32xx_gpio.c	/^static int lpc32xx_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_gpio_set_value	drivers/gpio/lpc32xx_gpio.c	/^static int lpc32xx_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
lpc32xx_hsuart	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^static const struct lpc32xx_hsuart_platdata lpc32xx_hsuart[] = {$/;"	v	typeref:typename:const struct lpc32xx_hsuart_platdata[]	file:
lpc32xx_hsuart_ops	drivers/serial/lpc32xx_hsuart.c	/^static const struct dm_serial_ops lpc32xx_hsuart_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
lpc32xx_hsuart_platdata	include/dm/platform_data/lpc32xx_hsuart.h	/^struct lpc32xx_hsuart_platdata {$/;"	s
lpc32xx_hsuart_priv	drivers/serial/lpc32xx_hsuart.c	/^struct lpc32xx_hsuart_priv {$/;"	s	file:
lpc32xx_hsuart_probe	drivers/serial/lpc32xx_hsuart.c	/^static int lpc32xx_hsuart_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_hwecc_enable	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_hwecc_enable(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void	file:
lpc32xx_i2c	drivers/i2c/lpc32xx_i2c.c	/^static struct lpc32xx_i2c_registers *lpc32xx_i2c[] = {$/;"	v	typeref:struct:lpc32xx_i2c_registers * []	file:
lpc32xx_i2c_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_i2c_init(unsigned int devnum)$/;"	f	typeref:typename:void
lpc32xx_i2c_probe	drivers/i2c/lpc32xx_i2c.c	/^static int lpc32xx_i2c_probe(struct i2c_adapter *adap, u8 dev)$/;"	f	typeref:typename:int	file:
lpc32xx_i2c_read	drivers/i2c/lpc32xx_i2c.c	/^static int lpc32xx_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
lpc32xx_i2c_registers	drivers/i2c/lpc32xx_i2c.c	/^struct lpc32xx_i2c_registers {$/;"	s	file:
lpc32xx_i2c_set_bus_speed	drivers/i2c/lpc32xx_i2c.c	/^static unsigned int lpc32xx_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
lpc32xx_i2c_write	drivers/i2c/lpc32xx_i2c.c	/^static int lpc32xx_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
lpc32xx_largepage_ecclayout	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static struct nand_ecclayout lpc32xx_largepage_ecclayout = {$/;"	v	typeref:struct:nand_ecclayout	file:
lpc32xx_mac_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_mac_init(void)$/;"	f	typeref:typename:void
lpc32xx_mlc_nand_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_mlc_nand_init(void)$/;"	f	typeref:typename:void
lpc32xx_nand_cmd_ctrl	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_nand_cmd_ctrl(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
lpc32xx_nand_dev_ready	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static int lpc32xx_nand_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
lpc32xx_nand_dma_configure	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_nand_dma_configure(struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
lpc32xx_nand_init	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static void lpc32xx_nand_init(void)$/;"	f	typeref:typename:void	file:
lpc32xx_nand_init	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_nand_init(void)$/;"	f	typeref:typename:void	file:
lpc32xx_nand_mlc_registers	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static struct lpc32xx_nand_mlc_registers __iomem *lpc32xx_nand_mlc_registers$/;"	v	typeref:struct:lpc32xx_nand_mlc_registers __iomem *	file:
lpc32xx_nand_mlc_registers	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^struct lpc32xx_nand_mlc_registers {$/;"	s	file:
lpc32xx_nand_oob_16	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static struct nand_ecclayout lpc32xx_nand_oob_16 = {$/;"	v	typeref:struct:nand_ecclayout	file:
lpc32xx_nand_slc_regs	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static struct lpc32xx_nand_slc_regs __iomem *lpc32xx_nand_slc_regs$/;"	v	typeref:struct:lpc32xx_nand_slc_regs __iomem *	file:
lpc32xx_nand_slc_regs	drivers/mtd/nand/lpc32xx_nand_slc.c	/^struct lpc32xx_nand_slc_regs {$/;"	s	file:
lpc32xx_nand_xfer	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_nand_xfer(struct mtd_info *mtd, const u8 *buf,$/;"	f	typeref:typename:void	file:
lpc32xx_oob	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^struct lpc32xx_oob {$/;"	s	file:
lpc32xx_read_buf	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
lpc32xx_read_byte	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static uint8_t lpc32xx_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
lpc32xx_read_byte	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static uint8_t lpc32xx_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
lpc32xx_read_oob	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_read_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
lpc32xx_read_page_hwecc	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_read_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
lpc32xx_read_page_hwecc	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static int lpc32xx_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
lpc32xx_read_page_raw	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_read_page_raw(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
lpc32xx_serial_getc	drivers/serial/lpc32xx_hsuart.c	/^static int lpc32xx_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpc32xx_serial_init	drivers/serial/lpc32xx_hsuart.c	/^static int lpc32xx_serial_init(struct hsuart_regs *hsuart)$/;"	f	typeref:typename:int	file:
lpc32xx_serial_pending	drivers/serial/lpc32xx_hsuart.c	/^static int lpc32xx_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
lpc32xx_serial_putc	drivers/serial/lpc32xx_hsuart.c	/^static int lpc32xx_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
lpc32xx_serial_setbrg	drivers/serial/lpc32xx_hsuart.c	/^static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
lpc32xx_slc_nand_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_slc_nand_init(void)$/;"	f	typeref:typename:void
lpc32xx_spi_slave	drivers/spi/lpc32xx_ssp.c	/^struct lpc32xx_spi_slave {$/;"	s	file:
lpc32xx_ssp_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_ssp_init(void)$/;"	f	typeref:typename:void
lpc32xx_timer_clock	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^static void lpc32xx_timer_clock(u32 bit, int enable)$/;"	f	typeref:typename:void	file:
lpc32xx_timer_count	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^static void lpc32xx_timer_count(struct timer_regs *timer, int enable)$/;"	f	typeref:typename:void	file:
lpc32xx_timer_reset	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^static void lpc32xx_timer_reset(struct timer_regs *timer, u32 freq)$/;"	f	typeref:typename:void	file:
lpc32xx_uart	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^static const struct ns16550_platdata lpc32xx_uart[] = {$/;"	v	typeref:typename:const struct ns16550_platdata[]	file:
lpc32xx_uart_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_uart_init(unsigned int uart_id)$/;"	f	typeref:typename:void
lpc32xx_usb_init	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^void lpc32xx_usb_init(void)$/;"	f	typeref:typename:void
lpc32xx_waitfunc	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)$/;"	f	typeref:typename:int	file:
lpc32xx_write_buf	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
lpc32xx_write_byte	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte)$/;"	f	typeref:typename:void	file:
lpc32xx_write_oob	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_write_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
lpc32xx_write_page_hwecc	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_write_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
lpc32xx_write_page_hwecc	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static int lpc32xx_write_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
lpc32xx_write_page_raw	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int lpc32xx_write_page_raw(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
lpc32xximage_check_image_types	tools/lpc32xximage.c	/^static int lpc32xximage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
lpc32xximage_header	tools/lpc32xximage.c	/^static struct nand_page_0_boot_header lpc32xximage_header;$/;"	v	typeref:struct:nand_page_0_boot_header	file:
lpc32xximage_print_header	tools/lpc32xximage.c	/^static void lpc32xximage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
lpc32xximage_set_header	tools/lpc32xximage.c	/^static void lpc32xximage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
lpc32xximage_verify_header	tools/lpc32xximage.c	/^static int lpc32xximage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
lpc47m_enable_kbc	drivers/misc/smsc_lpc47m.c	/^void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1)$/;"	f	typeref:typename:void
lpc47m_enable_serial	drivers/misc/smsc_lpc47m.c	/^void lpc47m_enable_serial(uint dev, uint iobase, uint irq)$/;"	f	typeref:typename:void
lpc512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct lpc512x {$/;"	s
lpc512x_t	arch/powerpc/include/asm/immap_512x.h	/^} lpc512x_t;$/;"	t	typeref:struct:lpc512x
lpc_ar	arch/powerpc/include/asm/immap_512x.h	/^	u32	lpc_ar;		\/* LPC RX\/TX FIFO Alarm Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
lpc_common_early_init	arch/x86/cpu/intel_common/lpc.c	/^int lpc_common_early_init(struct udevice *dev)$/;"	f	typeref:typename:int
lpc_cr	arch/powerpc/include/asm/immap_512x.h	/^	u32	lpc_cr;		\/* LPC RX\/TX FIFO Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
lpc_fdwr	arch/powerpc/include/asm/immap_512x.h	/^	u32	lpc_fdwr;	\/* LPC RX\/TX FIFO Data Word Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
lpc_fsr	arch/powerpc/include/asm/immap_512x.h	/^	u32	lpc_fsr;	\/* LPC RX\/TX FIFO Status Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
lpc_init_extra	arch/x86/cpu/broadwell/lpc.c	/^static int lpc_init_extra(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpc_init_extra	arch/x86/cpu/ivybridge/lpc.c	/^static int lpc_init_extra(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpc_set_spi_protect	arch/x86/cpu/intel_common/lpc.c	/^int lpc_set_spi_protect(struct udevice *dev, int bios_ctrl, bool protect)$/;"	f	typeref:typename:int
lpccr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lpccr;	\/* PWM Contrast Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lpcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lpcr;	\/* Panel Configuration *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lpcr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpcr;		\/* 0x10 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpcr	arch/m68k/include/asm/immap_5235.h	/^	u16 lpcr;		\/* 0x06 Low-power Control register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
lpcs0aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs0aw;		\/* LP CS0 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs1aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs1aw;		\/* LP CS1 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs2aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs2aw;		\/* LP CS2 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs3aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs3aw;		\/* LP CS3 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs4aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs4aw;		\/* LP CS4 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs5aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs5aw;		\/* LP CS5 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs6aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs6aw;		\/* LP CS6 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcs7aw	arch/powerpc/include/asm/immap_512x.h	/^	u32 lpcs7aw;		\/* LP CS7 Access Window *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
lpcsel	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	lpcsel;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
lpd	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^	unsigned int lpd; \/* RCW lane powerdown bit *\/$/;"	m	struct:__anon0f7aec2e0108	typeref:typename:unsigned int	file:
lpd_dma_chan1	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan1: dma@ffa80000 {$/;"	l
lpd_dma_chan2	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan2: dma@ffa90000 {$/;"	l
lpd_dma_chan3	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan3: dma@ffaa0000 {$/;"	l
lpd_dma_chan4	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan4: dma@ffab0000 {$/;"	l
lpd_dma_chan5	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan5: dma@ffac0000 {$/;"	l
lpd_dma_chan6	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan6: dma@ffad0000 {$/;"	l
lpd_dma_chan7	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan7: dma@ffae0000 {$/;"	l
lpd_dma_chan8	arch/arm/dts/zynqmp.dtsi	/^		lpd_dma_chan8: dma@ffaf0000 {$/;"	l
lpddr23_lpr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 lpddr23_lpr;	\/* 0x28: LPDDR2-LPDDR3 Low-power Register*\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
lpddr2_ac_timings	arch/arm/include/asm/emif.h	/^struct lpddr2_ac_timings {$/;"	s
lpddr2_addressing	arch/arm/include/asm/emif.h	/^struct lpddr2_addressing {$/;"	s
lpddr2_config_iomux	board/freescale/s32v234evb/lpddr2.c	/^void lpddr2_config_iomux(uint8_t module)$/;"	f	typeref:typename:void
lpddr2_density_2_size_in_mbytes	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static const u32 lpddr2_density_2_size_in_mbytes[] = {$/;"	v	typeref:typename:const u32[]	file:
lpddr2_device_details	arch/arm/include/asm/emif.h	/^struct lpddr2_device_details {$/;"	s
lpddr2_device_timings	arch/arm/include/asm/emif.h	/^struct lpddr2_device_timings {$/;"	s
lpddr2_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void lpddr2_init(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
lpddr2_min_tck	arch/arm/include/asm/emif.h	/^struct lpddr2_min_tck {$/;"	s
lpddr2_mr_regs	arch/arm/include/asm/emif.h	/^struct lpddr2_mr_regs {$/;"	s
lpddr2_rl	arch/arm/cpu/armv7/mx6/ddr.c	/^static int lpddr2_rl(uint32_t mem_speed)$/;"	f	typeref:typename:int	file:
lpddr2_wl	arch/arm/cpu/armv7/mx6/ddr.c	/^static int lpddr2_wl(uint32_t mem_speed)$/;"	f	typeref:typename:int	file:
lpddr2zqcfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 lpddr2zqcfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
lpddr2zqcfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 lpddr2zqcfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
lpddr3_ctrl_phy_reset	arch/arm/mach-exynos/clock_init.h	/^	unsigned lpddr3_ctrl_phy_reset;$/;"	m	struct:mem_timings	typeref:typename:unsigned
lpddr3phy_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
lpddr3phy_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
lpddr3phy_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
lpddr3phy_con3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_con3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
lpddr3phy_con4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_con5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_con5;		\/* 0x10030a28 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_ctrl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
lpddr3phy_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	lpddr3phy_ctrl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
lpgr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpgr;		\/* 0x1c *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpi_mask0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lpi_mask0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
lpi_mask1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	lpi_mask1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
lpicr	arch/m68k/include/asm/immap_5235.h	/^	u8 lpicr;		\/* 0x12 Low-Power Interrupt Control Register *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
lpicr	arch/m68k/include/asm/immap_5275.h	/^	u8 lpicr;$/;"	m	struct:sys_ctrl	typeref:typename:u8
lpicr	arch/m68k/include/asm/immap_5282.h	/^	u8 lpicr;$/;"	m	struct:scm_ctrl	typeref:typename:u8
lpimr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lpimr0;	\/* Low Power Interrupt Mask 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
lpimr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lpimr1;	\/* Low Power Interrupt Mask 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
lpm_nyet_threshold	drivers/usb/dwc3/core.h	/^	u8			lpm_nyet_threshold;$/;"	m	struct:dwc3	typeref:typename:u8
lpm_nyet_threshold	include/dwc3-uboot.h	/^	u8 lpm_nyet_threshold;$/;"	m	struct:dwc3_device	typeref:typename:u8
lpmcsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 lpmcsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
lpmd	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 lpmd:3;		\/* low-power mode selection  *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:3
lpmd	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 lpmd:2;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:2	file:
lpor	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lpor;	\/* Panning Offset *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lpos	drivers/usb/dwc3/core.h	/^	unsigned int		lpos;$/;"	m	struct:dwc3_event_buffer	typeref:typename:unsigned int
lppdr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lppdr;		\/* 0x18 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	lpr; 	\/* 0x10 SDRAMC Low Power Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
lpr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	lpr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
lpr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 lpr;		\/* 0x1c: Low-power Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
lprops	fs/ubifs/ubifs.h	/^	struct ubifs_lprops lprops[UBIFS_LPT_FANOUT];$/;"	m	struct:ubifs_pnode	typeref:struct:ubifs_lprops[]
lpsar	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpsar;		\/* 0x08 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpsc	board/Barix/ipam390/ipam390.c	/^const struct lpsc_resource lpsc[] = {$/;"	v	typeref:typename:const struct lpsc_resource[]
lpsc	board/davinci/da8xxevm/da850evm.c	/^const struct lpsc_resource lpsc[] = {$/;"	v	typeref:typename:const struct lpsc_resource[]
lpsc	board/davinci/da8xxevm/omapl138_lcdk.c	/^const struct lpsc_resource lpsc[] = {$/;"	v	typeref:typename:const struct lpsc_resource[]
lpsc	board/davinci/ea20/ea20.c	/^static const struct lpsc_resource lpsc[] = {$/;"	v	typeref:typename:const struct lpsc_resource[]	file:
lpsc	board/lego/ev3/legoev3.c	/^const struct lpsc_resource lpsc[] = {$/;"	v	typeref:typename:const struct lpsc_resource[]
lpsc	board/omicron/calimain/calimain.c	/^const struct lpsc_resource lpsc[] = {$/;"	v	typeref:typename:const struct lpsc_resource[]
lpsc_disable	arch/arm/mach-davinci/psc.c	/^void lpsc_disable(unsigned int id)$/;"	f	typeref:typename:void
lpsc_no	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^	const int	lpsc_no;$/;"	m	struct:lpsc_resource	typeref:typename:const int
lpsc_on	arch/arm/mach-davinci/psc.c	/^void lpsc_on(unsigned int id)$/;"	f	typeref:typename:void
lpsc_resource	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^struct lpsc_resource {$/;"	s
lpsc_size	board/Barix/ipam390/ipam390.c	/^const int lpsc_size = ARRAY_SIZE(lpsc);$/;"	v	typeref:typename:const int
lpsc_size	board/davinci/da8xxevm/da850evm.c	/^const int lpsc_size = ARRAY_SIZE(lpsc);$/;"	v	typeref:typename:const int
lpsc_size	board/davinci/da8xxevm/omapl138_lcdk.c	/^const int lpsc_size = ARRAY_SIZE(lpsc);$/;"	v	typeref:typename:const int
lpsc_size	board/lego/ev3/legoev3.c	/^const int lpsc_size = ARRAY_SIZE(lpsc);$/;"	v	typeref:typename:const int
lpsc_size	board/omicron/calimain/calimain.c	/^const int lpsc_size = ARRAY_SIZE(lpsc);$/;"	v	typeref:typename:const int
lpsc_syncreset	arch/arm/mach-davinci/psc.c	/^void lpsc_syncreset(unsigned int id)$/;"	f	typeref:typename:void
lpsc_transition	arch/arm/mach-davinci/psc.c	/^static void lpsc_transition(unsigned int id, unsigned int state)$/;"	f	typeref:typename:void	file:
lpsclr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpsclr;		\/* 0x04 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpscmr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpscmr;		\/* 0x00 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpsmcr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpsmcr;		\/* 0x0c *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpsr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	lpsr;		\/* 0x14 *\/$/;"	m	struct:srtc_regs	typeref:typename:u32
lpss_sio_enable_pci_mode	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t lpss_sio_enable_pci_mode;	\/* Offset 0x0036 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
lpt_buf	fs/ubifs/ubifs.h	/^	void *lpt_buf;$/;"	m	struct:ubifs_info	typeref:typename:void *
lpt_cnext	fs/ubifs/ubifs.h	/^	struct ubifs_cnode *lpt_cnext;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_cnode *
lpt_drty_flgs	fs/ubifs/ubifs.h	/^	int lpt_drty_flgs;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_first	fs/ubifs/ubifs.h	/^	int lpt_first;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_gc	fs/ubifs/lpt_commit.c	/^static int lpt_gc(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
lpt_gc_lnum	fs/ubifs/lpt_commit.c	/^static int lpt_gc_lnum(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int	file:
lpt_heap	fs/ubifs/ubifs.h	/^	struct ubifs_lpt_heap lpt_heap[LPROPS_HEAP_CNT];$/;"	m	struct:ubifs_info	typeref:struct:ubifs_lpt_heap[]
lpt_heap_replace	fs/ubifs/lprops.c	/^static void lpt_heap_replace(struct ubifs_info *c,$/;"	f	typeref:typename:void	file:
lpt_hght	fs/ubifs/ubifs.h	/^	int lpt_hght;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_init_rd	fs/ubifs/lpt.c	/^static int lpt_init_rd(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
lpt_init_wr	fs/ubifs/lpt.c	/^static int lpt_init_wr(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
lpt_last	fs/ubifs/ubifs.h	/^	int lpt_last;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_lebs	fs/ubifs/ubifs-media.h	/^	__le32 lpt_lebs;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
lpt_lebs	fs/ubifs/ubifs.h	/^	int lpt_lebs;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_lnum	fs/ubifs/ubifs-media.h	/^	__le32 lpt_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
lpt_lnum	fs/ubifs/ubifs.h	/^	int lpt_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_lnum_bits	fs/ubifs/ubifs.h	/^	int lpt_lnum_bits;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_nod_buf	fs/ubifs/ubifs.h	/^	void *lpt_nod_buf;$/;"	m	struct:ubifs_info	typeref:typename:void *
lpt_offs	fs/ubifs/ubifs-media.h	/^	__le32 lpt_offs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
lpt_offs	fs/ubifs/ubifs.h	/^	int lpt_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_offs_bits	fs/ubifs/ubifs.h	/^	int lpt_offs_bits;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_scan_node	fs/ubifs/lpt.c	/^struct lpt_scan_node {$/;"	s	file:
lpt_spc_bits	fs/ubifs/ubifs.h	/^	int lpt_spc_bits;$/;"	m	struct:ubifs_info	typeref:typename:int
lpt_sz	fs/ubifs/ubifs.h	/^	long long lpt_sz;$/;"	m	struct:ubifs_info	typeref:typename:long long
lpt_tgc_end	fs/ubifs/lpt_commit.c	/^static int lpt_tgc_end(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
lpt_tgc_start	fs/ubifs/lpt_commit.c	/^static void lpt_tgc_start(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
lpuart0	arch/arm/dts/fsl-ls1043a.dtsi	/^		lpuart0: serial@2950000 {$/;"	l
lpuart0	arch/arm/dts/ls1021a.dtsi	/^		lpuart0: serial@2950000 {$/;"	l
lpuart1	arch/arm/dts/fsl-ls1043a.dtsi	/^		lpuart1: serial@2960000 {$/;"	l
lpuart1	arch/arm/dts/ls1021a.dtsi	/^		lpuart1: serial@2960000 {$/;"	l
lpuart2	arch/arm/dts/fsl-ls1043a.dtsi	/^		lpuart2: serial@2970000 {$/;"	l
lpuart2	arch/arm/dts/ls1021a.dtsi	/^		lpuart2: serial@2970000 {$/;"	l
lpuart3	arch/arm/dts/fsl-ls1043a.dtsi	/^		lpuart3: serial@2980000 {$/;"	l
lpuart3	arch/arm/dts/ls1021a.dtsi	/^		lpuart3: serial@2980000 {$/;"	l
lpuart32_serial_getc	drivers/serial/serial_lpuart.c	/^static int lpuart32_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpuart32_serial_ids	drivers/serial/serial_lpuart.c	/^static const struct udevice_id lpuart32_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
lpuart32_serial_ops	drivers/serial/serial_lpuart.c	/^static const struct dm_serial_ops lpuart32_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
lpuart32_serial_pending	drivers/serial/serial_lpuart.c	/^static int lpuart32_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
lpuart32_serial_probe	drivers/serial/serial_lpuart.c	/^static int lpuart32_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpuart32_serial_putc	drivers/serial/serial_lpuart.c	/^static int lpuart32_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
lpuart32_serial_setbrg	drivers/serial/serial_lpuart.c	/^static int lpuart32_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
lpuart4	arch/arm/dts/fsl-ls1043a.dtsi	/^		lpuart4: serial@2990000 {$/;"	l
lpuart4	arch/arm/dts/ls1021a.dtsi	/^		lpuart4: serial@2990000 {$/;"	l
lpuart5	arch/arm/dts/fsl-ls1043a.dtsi	/^		lpuart5: serial@29a0000 {$/;"	l
lpuart5	arch/arm/dts/ls1021a.dtsi	/^		lpuart5: serial@29a0000 {$/;"	l
lpuart_fsl	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^struct lpuart_fsl {$/;"	s
lpuart_fsl	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^struct lpuart_fsl {$/;"	s
lpuart_fsl	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct lpuart_fsl {$/;"	s
lpuart_serial_getc	drivers/serial/serial_lpuart.c	/^static int lpuart_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpuart_serial_ids	drivers/serial/serial_lpuart.c	/^static const struct udevice_id lpuart_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
lpuart_serial_ofdata_to_platdata	drivers/serial/serial_lpuart.c	/^static int lpuart_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpuart_serial_ops	drivers/serial/serial_lpuart.c	/^static const struct dm_serial_ops lpuart_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
lpuart_serial_pending	drivers/serial/serial_lpuart.c	/^static int lpuart_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
lpuart_serial_platdata	drivers/serial/serial_lpuart.c	/^struct lpuart_serial_platdata {$/;"	s	file:
lpuart_serial_probe	drivers/serial/serial_lpuart.c	/^static int lpuart_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
lpuart_serial_putc	drivers/serial/serial_lpuart.c	/^static int lpuart_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
lpuart_serial_setbrg	drivers/serial/serial_lpuart.c	/^static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
lpwake_timer	include/fsl_memac.h	/^	u32	lpwake_timer;	\/* EEE low power wakeup timer register *\/$/;"	m	struct:memac	typeref:typename:u32
lq035q1_control	board/bf527-ezkit/video.c	/^static int lq035q1_control(unsigned char reg, unsigned short value)$/;"	f	typeref:typename:int	file:
lqspi_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	uart0_aper_clk, uart1_aper_clk, gpio_aper_clk, lqspi_aper_clk,$/;"	e	enum:zynq_clk
lqspi_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	lqspi_clk, smc_clk, pcap_clk, gem0_clk, gem1_clk,$/;"	e	enum:zynq_clk
lqspi_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 lqspi_clk_ctrl; \/* 0x14c *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
lqspicfg	drivers/spi/zynq_qspi.c	/^	u32 lqspicfg;	\/* 0xA0 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
lqspists	drivers/spi/zynq_qspi.c	/^	u32 lqspists;	\/* 0xA4 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
lr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lr;	\/* Load register *\/$/;"	m	struct:epit_regs	typeref:typename:u32
lr	arch/arm/mach-sunxi/board.c	/^	uint32_t lr;$/;"	m	struct:fel_stash	typeref:typename:uint32_t	file:
lr	arch/avr32/include/asm/ptrace.h	/^	unsigned long lr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
lradc	arch/arm/dts/sun4i-a10.dtsi	/^		lradc: lradc@01c22800 {$/;"	l
lradc	arch/arm/dts/sun5i.dtsi	/^		lradc: lradc@01c22800 {$/;"	l
lradc	arch/arm/dts/sun6i-a31.dtsi	/^		lradc: lradc@01c22800 {$/;"	l
lradc	arch/arm/dts/sun7i-a20.dtsi	/^		lradc: lradc@01c22800 {$/;"	l
lradc	arch/arm/dts/sun8i-a23-a33.dtsi	/^		lradc: lradc@01c22800 {$/;"	l
lret_target	arch/x86/cpu/call64.S	/^lret_target:$/;"	l
lretcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	lretcr;	\/* Logical Retry Error Threshold CR *\/$/;"	m	struct:rio_impl_common	typeref:typename:u32
lretcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	lretcr;		\/* 0xd0020 - Logical Retry Error Threshold Configuration Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
lrmcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lrmcr;	\/* Refresh Mode Control *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
ls	fs/fs.c	/^	int (*ls)(const char *dirname);$/;"	m	struct:fstype_info	typeref:typename:int (*)(const char * dirname)	file:
ls	include/fat.h	/^	file_ls_func		*ls;$/;"	m	struct:filesystem	typeref:typename:file_ls_func *
ls	include/fsl_sec.h	/^		u32	ls;	\/* DECO LIODN Register, LS *\/$/;"	m	struct:ccsr_sec::__anonc0d8802d0608	typeref:typename:u32
ls	include/fsl_sec.h	/^		u32	ls;	\/* Job Ring LIODN Register, LS *\/$/;"	m	struct:ccsr_sec::__anonc0d8802d0408	typeref:typename:u32
ls	include/fsl_sec.h	/^		u32	ls;	\/* RTIC LIODN Register, LS *\/$/;"	m	struct:ccsr_sec::__anonc0d8802d0508	typeref:typename:u32
ls1021a_mdio	board/freescale/ls1021aqds/eth.c	/^struct ls1021a_mdio {$/;"	s	file:
ls1021a_mdio_init	board/freescale/ls1021aqds/eth.c	/^static int ls1021a_mdio_init(char *realbusname, char *fakebusname)$/;"	f	typeref:typename:int	file:
ls1021a_mdio_read	board/freescale/ls1021aqds/eth.c	/^static int ls1021a_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls1021a_mdio_reset	board/freescale/ls1021aqds/eth.c	/^static int ls1021a_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ls1021a_mdio_write	board/freescale/ls1021aqds/eth.c	/^static int ls1021a_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls1021a_mux_mdio	board/freescale/ls1021aqds/eth.c	/^static void ls1021a_mux_mdio(int addr)$/;"	f	typeref:typename:void	file:
ls1021a_sata_init	arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c	/^int ls1021a_sata_init(void)$/;"	f	typeref:typename:int
ls1021amdio0	arch/arm/dts/ls1021a-qds.dtsi	/^			ls1021amdio0: mdio@0 {$/;"	l	label:fpga
ls1021amdio1	arch/arm/dts/ls1021a-qds.dtsi	/^			ls1021amdio1: mdio@20 {$/;"	l	label:fpga
ls1021amdio2	arch/arm/dts/ls1021a-qds.dtsi	/^			ls1021amdio2: mdio@40 {$/;"	l	label:fpga
ls1021amdio3	arch/arm/dts/ls1021a-qds.dtsi	/^			ls1021amdio3: mdio@60 {$/;"	l	label:fpga
ls1021amdio4	arch/arm/dts/ls1021a-qds.dtsi	/^			ls1021amdio4: mdio@80 {$/;"	l	label:fpga
ls1021x_config_caam_stream_id	board/freescale/common/ls102xa_stream_id.c	/^void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size)$/;"	f	typeref:typename:void
ls102xa_config_smmu_stream_id	board/freescale/common/ls102xa_stream_id.c	/^void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)$/;"	f	typeref:typename:void
ls102xa_smmu_stream_id_init	arch/arm/cpu/armv7/ls102xa/soc.c	/^int ls102xa_smmu_stream_id_init(void)$/;"	f	typeref:typename:int
ls1043aqds_mdio	board/freescale/ls1043aqds/eth.c	/^struct ls1043aqds_mdio {$/;"	s	file:
ls1043aqds_mdio_init	board/freescale/ls1043aqds/eth.c	/^static int ls1043aqds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
ls1043aqds_mdio_name_for_muxval	board/freescale/ls1043aqds/eth.c	/^static const char *ls1043aqds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
ls1043aqds_mdio_read	board/freescale/ls1043aqds/eth.c	/^static int ls1043aqds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls1043aqds_mdio_reset	board/freescale/ls1043aqds/eth.c	/^static int ls1043aqds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ls1043aqds_mdio_write	board/freescale/ls1043aqds/eth.c	/^static int ls1043aqds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls1043aqds_mux_mdio	board/freescale/ls1043aqds/eth.c	/^static void ls1043aqds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
ls1046aqds_mdio	board/freescale/ls1046aqds/eth.c	/^struct ls1046aqds_mdio {$/;"	s	file:
ls1046aqds_mdio_init	board/freescale/ls1046aqds/eth.c	/^static int ls1046aqds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
ls1046aqds_mdio_name_for_muxval	board/freescale/ls1046aqds/eth.c	/^static const char *ls1046aqds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
ls1046aqds_mdio_read	board/freescale/ls1046aqds/eth.c	/^static int ls1046aqds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls1046aqds_mdio_reset	board/freescale/ls1046aqds/eth.c	/^static int ls1046aqds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ls1046aqds_mdio_write	board/freescale/ls1046aqds/eth.c	/^static int ls1046aqds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls1046aqds_mux_mdio	board/freescale/ls1046aqds/eth.c	/^static void ls1046aqds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
ls1_deep_sleep	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_deep_sleep(u32 entry_point)$/;"	f	typeref:typename:void __secure	file:
ls1_deepsleep_irq_cfg	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_deepsleep_irq_cfg(void)$/;"	f	typeref:typename:void __secure	file:
ls1_delay	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_delay(unsigned int loop)$/;"	f	typeref:typename:void __secure	file:
ls1_fsm_setup	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_fsm_setup(void)$/;"	f	typeref:typename:void __secure	file:
ls1_psci_resume_fixup	board/freescale/common/arm_sleep.c	/^void ls1_psci_resume_fixup(void)$/;"	f	typeref:typename:void
ls1_save_ddr_head	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_save_ddr_head(void)$/;"	f	typeref:typename:void __secure	file:
ls1_sleep	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_sleep(void)$/;"	f	typeref:typename:void __secure	file:
ls1_start_fsm	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^static void __secure ls1_start_fsm(void)$/;"	f	typeref:typename:void __secure	file:
ls1_system_suspend	arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c	/^void __secure ls1_system_suspend(u32 fn, u32 entry_point, u32 context_id)$/;"	f	typeref:typename:void __secure
ls1twr_program_regulator	board/freescale/ls1021atwr/ls1021atwr.c	/^void ls1twr_program_regulator(void)$/;"	f	typeref:typename:void
ls2080a_handle_phy_interface_qsgmii	board/freescale/ls2080aqds/eth.c	/^void ls2080a_handle_phy_interface_qsgmii(int dpmac_id)$/;"	f	typeref:typename:void
ls2080a_handle_phy_interface_sgmii	board/freescale/ls2080aqds/eth.c	/^void ls2080a_handle_phy_interface_sgmii(int dpmac_id)$/;"	f	typeref:typename:void
ls2080a_handle_phy_interface_xsgmii	board/freescale/ls2080aqds/eth.c	/^void ls2080a_handle_phy_interface_xsgmii(int i)$/;"	f	typeref:typename:void
ls2080a_qds_enable_SFP_TX	board/freescale/ls2080aqds/eth.c	/^static void ls2080a_qds_enable_SFP_TX(u8 muxval)$/;"	f	typeref:typename:void	file:
ls2080a_qds_mdio	board/freescale/ls2080aqds/eth.c	/^struct ls2080a_qds_mdio {$/;"	s	file:
ls2080a_qds_mdio_init	board/freescale/ls2080aqds/eth.c	/^static int ls2080a_qds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
ls2080a_qds_mdio_name_for_muxval	board/freescale/ls2080aqds/eth.c	/^static const char *ls2080a_qds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
ls2080a_qds_mdio_read	board/freescale/ls2080aqds/eth.c	/^static int ls2080a_qds_mdio_read(struct mii_dev *bus, int addr,$/;"	f	typeref:typename:int	file:
ls2080a_qds_mdio_reset	board/freescale/ls2080aqds/eth.c	/^static int ls2080a_qds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
ls2080a_qds_mdio_write	board/freescale/ls2080aqds/eth.c	/^static int ls2080a_qds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
ls2080a_qds_mux_mdio	board/freescale/ls2080aqds/eth.c	/^static void ls2080a_qds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
ls_pcie	drivers/pci/pcie_layerscape.c	/^struct ls_pcie {$/;"	s	file:
ls_pcie_addr_valid	drivers/pci/pcie_layerscape.c	/^static int ls_pcie_addr_valid(struct pci_controller *hose, pci_dev_t d)$/;"	f	typeref:typename:int	file:
ls_pcie_cfg0_set_busdev	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_cfg0_set_busdev(struct ls_pcie *pcie, u32 busdev)$/;"	f	typeref:typename:void	file:
ls_pcie_cfg1_set_busdev	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_cfg1_set_busdev(struct ls_pcie *pcie, u32 busdev)$/;"	f	typeref:typename:void	file:
ls_pcie_ep_setup_atu	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie,$/;"	f	typeref:typename:void	file:
ls_pcie_ep_setup_bar	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_ep_setup_bar(void *bar_base, int bar, u32 size)$/;"	f	typeref:typename:void	file:
ls_pcie_ep_setup_bars	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_ep_setup_bars(void *bar_base)$/;"	f	typeref:typename:void	file:
ls_pcie_iatu_inbound_set	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_iatu_inbound_set(struct ls_pcie *pcie, int idx,$/;"	f	typeref:typename:void	file:
ls_pcie_iatu_outbound_set	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_iatu_outbound_set(struct ls_pcie *pcie, int idx, int type,$/;"	f	typeref:typename:void	file:
ls_pcie_info	drivers/pci/pcie_layerscape.c	/^struct ls_pcie_info {$/;"	s	file:
ls_pcie_init_board	drivers/pci/pcie_layerscape.c	/^int ls_pcie_init_board(int busno)$/;"	f	typeref:typename:int
ls_pcie_init_ctrl	drivers/pci/pcie_layerscape.c	/^int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info)$/;"	f	typeref:typename:int
ls_pcie_link_state	drivers/pci/pcie_layerscape.c	/^static int ls_pcie_link_state(struct ls_pcie *pcie)$/;"	f	typeref:typename:int	file:
ls_pcie_link_up	drivers/pci/pcie_layerscape.c	/^static int ls_pcie_link_up(struct ls_pcie *pcie)$/;"	f	typeref:typename:int	file:
ls_pcie_lut_set_mapping	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie, int index, u32 devid,$/;"	f	typeref:typename:void	file:
ls_pcie_next_lut_index	drivers/pci/pcie_layerscape.c	/^static int ls_pcie_next_lut_index(struct ls_pcie *pcie)$/;"	f	typeref:typename:int	file:
ls_pcie_next_streamid	drivers/pci/pcie_layerscape.c	/^static u32 ls_pcie_next_streamid(void)$/;"	f	typeref:typename:u32	file:
ls_pcie_read_config	drivers/pci/pcie_layerscape.c	/^static int ls_pcie_read_config(struct pci_controller *hose, pci_dev_t d,$/;"	f	typeref:typename:int	file:
ls_pcie_setup_atu	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_setup_atu(struct ls_pcie *pcie, struct ls_pcie_info *info)$/;"	f	typeref:typename:void	file:
ls_pcie_setup_ctrl	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_setup_ctrl(struct ls_pcie *pcie,$/;"	f	typeref:typename:void	file:
ls_pcie_setup_ep	drivers/pci/pcie_layerscape.c	/^static void ls_pcie_setup_ep(struct ls_pcie *pcie, struct ls_pcie_info *info)$/;"	f	typeref:typename:void	file:
ls_pcie_write_config	drivers/pci/pcie_layerscape.c	/^static int ls_pcie_write_config(struct pci_controller *hose, pci_dev_t d,$/;"	f	typeref:typename:int	file:
ls_sync	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 ls_sync;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
lsadr	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 lsadr;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
lsave	fs/ubifs/ubifs.h	/^	int *lsave;$/;"	m	struct:ubifs_info	typeref:typename:int *
lsave_cnt	fs/ubifs/ubifs-media.h	/^	__le32 lsave_cnt;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
lsave_cnt	fs/ubifs/ubifs.h	/^	int lsave_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
lsave_lnum	fs/ubifs/ubifs-media.h	/^	__le32 lsave_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
lsave_lnum	fs/ubifs/ubifs.h	/^	int lsave_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
lsave_offs	fs/ubifs/ubifs-media.h	/^	__le32 lsave_offs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
lsave_offs	fs/ubifs/ubifs.h	/^	int lsave_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
lsave_sz	fs/ubifs/ubifs.h	/^	int lsave_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
lsb	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^		u32 lsb;$/;"	m	struct:rk3288_hdmi::__anonae42e8fa0108	typeref:typename:u32
lscan_lnum	fs/ubifs/ubifs-media.h	/^	__le32 lscan_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
lscan_lnum	fs/ubifs/ubifs.h	/^	int lscan_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
lscr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lscr;	\/* Sharp Configuration *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lsdmr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lsdmr;          \/* LBC SDRAM Mode *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lseof1	drivers/usb/musb/musb_core.h	/^	u8	lseof1;$/;"	m	struct:musb_regs	typeref:typename:u8
lsi	include/universe.h	/^	SLAVE_IMAGE  lsi[4];$/;"	m	struct:_UNIVERSE	typeref:typename:SLAVE_IMAGE[4]
lskip	cmd/ini.c	/^static char *lskip(const char *s)$/;"	f	typeref:typename:char *	file:
lsoffset	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	unsigned int lsoffset; \/* encoding offset from ls-bit *\/$/;"	m	struct:qb_attr_code	typeref:typename:unsigned int
lsor	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lsor;$/;"	m	struct:fsl_lbc	typeref:typename:u32
lspull	arch/arm/include/asm/assembler.h	/^#define lspull	/;"	d
lspush	arch/arm/include/asm/assembler.h	/^#define lspush	/;"	d
lsr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lsr;	\/* Size *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lsr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^	uint32_t	lsr;$/;"	m	struct:pxa_uart_regs	typeref:typename:uint32_t
lsr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int lsr; \/* Line status register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
lsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	lsr;		\/* 0xC4 Level Select Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
lsr	arch/blackfin/include/asm/serial1.h	/^	u16 lsr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
lsr	drivers/serial/serial_bcm283x_mu.c	/^	u32 lsr;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
lsr	drivers/serial/serial_uniphier.c	/^	u32 lsr;		\/* In: Line Status Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
lsrt	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lsrt;           \/* LBC SDRAM Refresh Timer *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lssar	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lssar;	\/* Screen Start Address *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lst	arch/powerpc/cpu/mpc8xx/video.c	/^			lst:1;		\/* Last entry *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:1	file:
lst	fs/ubifs/ubifs.h	/^	struct ubifs_lp_stats lst;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_lp_stats
lsthresh	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	lsthresh;$/;"	m	struct:ohci_regs	typeref:typename:__u32
lsthresh	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	lsthresh;$/;"	m	struct:ohci_regs	typeref:typename:__u32
lsthresh	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 lsthresh;$/;"	m	struct:ohci_regs	typeref:typename:__u32
lsthresh	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 lsthresh;$/;"	m	struct:ohci_regs	typeref:typename:__u32
lsthresh	drivers/usb/host/ohci.h	/^	__u32	lsthresh;$/;"	m	struct:ohci_regs	typeref:typename:__u32
lsw	drivers/net/xilinx_ll_temac.h	/^	u32 lsw;	\/* Least Significant Word Data *\/$/;"	m	struct:temac_reg	typeref:typename:u32
lsz	arch/arc/lib/cache.c	/^			unsigned int pad:24, way:2, lsz:2, sz:4;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2010a::__anon3b450cc20208	typeref:typename:unsigned int:2	file:
lt0	arch/blackfin/include/asm/ptrace.h	/^	long lt0;$/;"	m	struct:pt_regs	typeref:typename:long
lt1	arch/blackfin/include/asm/ptrace.h	/^	long lt1;$/;"	m	struct:pt_regs	typeref:typename:long
lt_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^	struct edp_link_train_info lt_info;$/;"	m	struct:exynos_dp_priv	typeref:struct:edp_link_train_info
lt_status	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int lt_status;$/;"	m	struct:edp_link_train_info	typeref:typename:unsigned int
ltab	fs/ubifs/ubifs.h	/^	struct ubifs_lpt_lprops *ltab;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_lpt_lprops *
ltab_cmt	fs/ubifs/ubifs.h	/^	struct ubifs_lpt_lprops *ltab_cmt;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_lpt_lprops *
ltab_lnum	fs/ubifs/ubifs-media.h	/^	__le32 ltab_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
ltab_lnum	fs/ubifs/ubifs.h	/^	int ltab_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
ltab_offs	fs/ubifs/ubifs-media.h	/^	__le32 ltab_offs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
ltab_offs	fs/ubifs/ubifs.h	/^	int ltab_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
ltab_sz	fs/ubifs/ubifs.h	/^	int ltab_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
ltail_lnum	fs/ubifs/ubifs.h	/^	int ltail_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
ltbr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ltbr0;	\/* Load Tracking Buffer 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltbr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ltbr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ltbr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ltbr0;	\/* Load Tracking Buffer 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltbr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ltbr1;	\/* Load Tracking Buffer 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltbr1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ltbr1;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ltear	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     ltear;          \/* LBC Transfer Error Addr *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lteatr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lteatr;         \/* LBC Transfer Error Attrs *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
ltedr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     ltedr;          \/* LBC Transfer Error Disable *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lteir	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lteir;          \/* LBC Transfer Error IRQ *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
ltesr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     ltesr;          \/* LBC Transfer Error Status *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lthread	examples/standalone/sched.c	/^struct lthread {$/;"	s	file:
lthreads	examples/standalone/sched.c	/^static volatile struct lthread lthreads[MAX_THREADS];$/;"	v	typeref:typename:volatile struct lthread[]	file:
ltlaccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ltlaccsr;	\/* Logical\/Transport layer ACCSR *\/$/;"	m	struct:rio_logical_err	typeref:typename:u32
ltlaccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ltlaccsr;	\/* 0xc0614 - Logical\/Transport layer addresss capture register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ltlcccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ltlcccsr;	\/* Logical\/Transport layer control CCSR *\/$/;"	m	struct:rio_logical_err	typeref:typename:u32
ltlcccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ltlcccsr;	\/* 0xc061c - Logical\/Transport layer control capture register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ltldidccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ltldidccsr;	\/* Logical\/Transport layer DID CCSR *\/$/;"	m	struct:rio_logical_err	typeref:typename:u32
ltldidccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ltldidccsr;	\/* 0xc0618 - Logical\/Transport layer device ID capture register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ltledcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ltledcsr;	\/* Logical\/Transport layer error DCSR *\/$/;"	m	struct:rio_logical_err	typeref:typename:u32
ltledcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ltledcsr;	\/* 0xc0608 - Logical\/Transport layer error detect status register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ltleecsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ltleecsr;	\/* Logical\/Transport layer error ECSR *\/$/;"	m	struct:rio_logical_err	typeref:typename:u32
ltleecsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ltleecsr;	\/* 0xc060c - Logical\/Transport layer error enable register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ltmode	drivers/block/mvsata_ide.c	/^	u32 ltmode;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
ltmr64h	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ltmr64h;$/;"	m	struct:pit_reg	typeref:typename:u32
ltmr64h	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ltmr64h;$/;"	m	struct:pit_reg	typeref:typename:u32
ltmr64l	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ltmr64l;$/;"	m	struct:pit_reg	typeref:typename:u32
ltmr64l	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 ltmr64l;$/;"	m	struct:pit_reg	typeref:typename:u32
ltr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ltr0;	\/* Load Tracking 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ltr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ltr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ltr0;	\/* Load Tracking 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ltr1;	\/* Load Tracking 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ltr1;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ltr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ltr1;	\/* Load Tracking 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ltr2;	\/* Load Tracking 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ltr2;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ltr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ltr2;	\/* Load Tracking 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ltr3;	\/* Load Tracking 3 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltr3	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 ltr3;$/;"	m	struct:clock_control_regs	typeref:typename:u32
ltr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ltr3;	\/* Load Tracking 3 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ltree	drivers/mtd/ubi/ubi.h	/^	struct rb_root ltree;$/;"	m	struct:ubi_device	typeref:struct:rb_root
ltree_add_entry	drivers/mtd/ubi/eba.c	/^static struct ubi_ltree_entry *ltree_add_entry(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_ltree_entry *	file:
ltree_lock	drivers/mtd/ubi/ubi.h	/^	spinlock_t ltree_lock;$/;"	m	struct:ubi_device	typeref:typename:spinlock_t
ltree_lookup	drivers/mtd/ubi/eba.c	/^static struct ubi_ltree_entry *ltree_lookup(struct ubi_device *ubi, int vol_id,$/;"	f	typeref:struct:ubi_ltree_entry *	file:
ltrim	scripts/checkpatch.pl	/^sub ltrim {$/;"	s
lu	drivers/net/mvpp2.c	/^	int lu;$/;"	m	struct:mvpp2_prs_shadow	typeref:typename:int	file:
luma_comp	drivers/video/fsl_dcu_fb.c	/^	u32 luma_comp;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
lun	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		lun;$/;"	m	struct:fsg_common	typeref:typename:unsigned int	file:
lun	include/blk.h	/^	unsigned char	lun;		\/* target LUN *\/$/;"	m	struct:blk_desc	typeref:typename:unsigned char
lun	include/linux/edd.h	/^			__u64 lun;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0b08	typeref:typename:__u64
lun	include/linux/edd.h	/^			__u64 lun;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0e08	typeref:typename:__u64
lun	include/linux/edd.h	/^			__u8 lun;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08	typeref:typename:__u8
lun	include/scsi.h	/^	unsigned char		lun;							\/* Target LUN        *\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char
lun_count	include/linux/mtd/nand.h	/^	u8 lun_count;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
lun_count	include/linux/mtd/nand.h	/^	u8 lun_count;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
lun_flags	drivers/usb/emul/sandbox_flash.c	/^	u8 lun_flags;$/;"	m	struct:scsi_read10_req	typeref:typename:u8	file:
luns	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_lun          luns[FSG_MAX_LUNS];$/;"	m	struct:fsg_common	typeref:struct:fsg_lun[]	file:
luns	drivers/usb/gadget/f_mass_storage.c	/^	} luns[FSG_MAX_LUNS];$/;"	m	struct:fsg_config	typeref:struct:fsg_config::fsg_lun_config[]	file:
lurt	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     lurt;           \/* LBC UPM Refresh Timer *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
lut	drivers/spi/fsl_qspi.h	/^	u32 lut[64];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[64]
lut_table0_alternate_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table0_alternate_lower; \/* LUT0 Alternate Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table0_alternate_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table0_alternate_upper;	\/* LUT0 Alternate Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table0_main_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table0_main_lower;	\/* LUT0 Main Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table0_main_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table0_main_upper;	\/* LUT0 Main Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table1_alternate_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table1_alternate_lower; \/* LUT1 Alternate Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table1_alternate_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table1_alternate_upper; \/* LUT1 Alternate Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table1_main_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table1_main_lower;	\/* LUT1 Main Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table1_main_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table1_main_upper;	\/* LUT1 Main Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table2_alternate_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table2_alternate_lower; \/* LUT2 Alternate Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table2_alternate_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table2_alternate_upper; \/* LUT2 Alternate Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table2_main_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table2_main_lower;	\/* LUT2 Main Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table2_main_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table2_main_upper;	\/* LUT2 Main Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table3_alternate_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table3_alternate_lower; \/* LUT3 Alternate Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table3_alternate_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table3_alternate_upper; \/* LUT3 Alternate Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table3_main_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table3_main_lower;	\/* LUT3 Main Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table3_main_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table3_main_upper;	\/* LUT3 Main Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table4_alternate_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table4_alternate_lower; \/* LUT4 Alternate Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table4_alternate_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table4_alternate_upper; \/* LUT4 Alternate Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table4_main_lower	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table4_main_lower;	\/* LUT4 Main Lower *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lut_table4_main_upper	arch/powerpc/include/asm/immap_512x.h	/^	u32 lut_table4_main_upper;	\/* LUT4 Main Upper *\/$/;"	m	struct:ddr512x	typeref:typename:u32
lutkey	drivers/spi/fsl_qspi.h	/^	u32 lutkey;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
lvAddressMask	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvAddressMask;      \/* Address mask for XSDRINC *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvDataMask	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvDataMask;         \/* Data mask for XSDRINC *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvNextData	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvNextData;         \/* Next data for XSDRINC *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvTdi	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvTdi;              \/* Current TDI shift data *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvTdoCaptured	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvTdoCaptured;      \/* Captured TDO shift data *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvTdoExpected	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvTdoExpected;      \/* Expected TDO shift data *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvTdoMask	board/esd/common/xilinx_jtag/micro.c	/^	lenVal          lvTdoMask;          \/* TDO mask: 0=dontcare; 1=compare *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:lenVal	file:
lvcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lvcr;	\/* Vertical Configuration *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lvds	arch/arm/dts/rk3288.dtsi	/^	lvds: lvds@ff96c000 {$/;"	l
lvds0_mux_0	arch/arm/dts/imx6qdl.dtsi	/^						lvds0_mux_0: endpoint {$/;"	l	label:ldb
lvds0_mux_1	arch/arm/dts/imx6qdl.dtsi	/^						lvds0_mux_1: endpoint {$/;"	l
lvds0_mux_2	arch/arm/dts/imx6q.dtsi	/^			lvds0_mux_2: endpoint {$/;"	l
lvds0_mux_3	arch/arm/dts/imx6q.dtsi	/^			lvds0_mux_3: endpoint {$/;"	l
lvds1_mux_0	arch/arm/dts/imx6qdl.dtsi	/^						lvds1_mux_0: endpoint {$/;"	l
lvds1_mux_1	arch/arm/dts/imx6qdl.dtsi	/^						lvds1_mux_1: endpoint {$/;"	l
lvds1_mux_2	arch/arm/dts/imx6q.dtsi	/^			lvds1_mux_2: endpoint {$/;"	l
lvds1_mux_3	arch/arm/dts/imx6q.dtsi	/^			lvds1_mux_3: endpoint {$/;"	l
lvds_ana0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 lvds_ana0;			\/* 0x220 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
lvds_ana0	arch/arm/include/asm/arch/display.h	/^	u32 lvds_ana0;			\/* 0x220 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
lvds_ana1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 lvds_ana1;			\/* 0x224 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
lvds_ana1	arch/arm/include/asm/arch/display.h	/^	u32 lvds_ana1;			\/* 0x224 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
lvds_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 lvds_clk_cfg;	\/* 0x14c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lvds_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 lvds_clk_cfg;	\/* 0x14c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
lvds_ddc	arch/arm/dts/tegra20-seaboard.dts	/^		lvds_ddc: i2c@1 {$/;"	l
lvds_ddc	arch/arm/dts/tegra20-ventana.dts	/^		lvds_ddc: i2c@1 {$/;"	l
lvds_enabled	board/kosagi/novena/video.c	/^static int lvds_enabled;$/;"	v	typeref:typename:int	file:
lvds_gen_cntl	drivers/video/ati_radeon_fb.h	/^	u32		lvds_gen_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
lvds_in	arch/arm/dts/rk3288.dtsi	/^			lvds_in: port@0 {$/;"	l	label:lvds
lvds_in_vopb	arch/arm/dts/rk3288.dtsi	/^				lvds_in_vopb: endpoint@0 {$/;"	l	label:lvds.lvds_in
lvds_in_vopl	arch/arm/dts/rk3288.dtsi	/^				lvds_in_vopl: endpoint@1 {$/;"	l	label:lvds.lvds_in
lvds_pll_cntl	drivers/video/ati_radeon_fb.h	/^	u32		lvds_pll_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
lvds_rockchip_ops	drivers/video/rockchip/rk_lvds.c	/^static const struct dm_display_ops lvds_rockchip_ops = {$/;"	v	typeref:typename:const struct dm_display_ops	file:
lvds_writel	drivers/video/rockchip/rk_lvds.c	/^static inline void lvds_writel(struct rk_lvds_priv *lvds, u32 offset, u32 val)$/;"	f	typeref:typename:void	file:
lvglvolt_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 lvglvolt_params_sn20[]	= {0x08};$/;"	v	typeref:typename:u16[]	file:
lvl	drivers/gpio/intel_ich6_gpio.c	/^	uint16_t lvl;$/;"	m	struct:ich6_bank_priv	typeref:typename:uint16_t	file:
lvl	drivers/spi/davinci_spi.c	/^	dv_reg	lvl;		\/* 0x0c *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
lvl2_mst_cfg	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 lvl2_mst_cfg;          \/* 0x10c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
lvl2_mst_cfg	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 lvl2_mst_cfg;          \/* 0x10c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
lvl_intr_clr	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 lvl_intr_clr;	\/* 0x324 *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32
lvl_shftr_en	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 lvl_shftr_en; \/* 0x900 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
lvm_en_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long lvm_en_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
lvm_en_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long lvm_en_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
lvpwr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 lvpwr;	\/* Virtual Page Width *\/$/;"	m	struct:lcdc_regs	typeref:typename:u32
lvscc	drivers/spi/ich.h	/^	uint32_t lvscc;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
lwhps2fpga_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	lwhps2fpga_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
lwhps2fpga_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	lwhps2fpga_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
lwhps2fpgaregs	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	lwhps2fpgaregs;			\/* 0x20 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
lwmon5_cfi_flash_bank_addr	board/liebherr/lwmon5/lwmon5.c	/^static phys_addr_t lwmon5_cfi_flash_bank_addr[2] = CONFIG_SYS_FLASH_BANKS_LIST;$/;"	v	typeref:typename:phys_addr_t[2]	file:
lwmon5_watchdog_post_test	post/board/lwmon5/watchdog.c	/^int lwmon5_watchdog_post_test(int flags)$/;"	f	typeref:typename:int
lwsync	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define lwsync(/;"	d
lxdialog	scripts/kconfig/Makefile	/^lxdialog := lxdialog\/checklist.o lxdialog\/util.o lxdialog\/inputbox.o$/;"	m
lxt971_no_sleep	board/esd/common/misc.c	/^void lxt971_no_sleep(void)$/;"	f	typeref:typename:void
lxt971_parse_status	drivers/net/phy/lxt.c	/^static int lxt971_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
lxt971_startup	drivers/net/phy/lxt.c	/^static int lxt971_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
lxt972_auto_negotiate	arch/arm/mach-davinci/lxt972.c	/^int lxt972_auto_negotiate(int phy_addr)$/;"	f	typeref:typename:int
lxt972_get_link_speed	arch/arm/mach-davinci/lxt972.c	/^int lxt972_get_link_speed(int phy_addr)$/;"	f	typeref:typename:int
lxt972_init_phy	arch/arm/mach-davinci/lxt972.c	/^int lxt972_init_phy(int phy_addr)$/;"	f	typeref:typename:int
lxt972_is_phy_connected	arch/arm/mach-davinci/lxt972.c	/^int lxt972_is_phy_connected(int phy_addr)$/;"	f	typeref:typename:int
lynxkdi_boot	common/lynxkdi.c	/^void lynxkdi_boot(image_header_t *hdr)$/;"	f	typeref:typename:void
lynxos_bootparms_t	include/lynxkdi.h	/^typedef struct lynxos_bootparms_t {$/;"	s
lynxos_bootparms_t	include/lynxkdi.h	/^} lynxos_bootparms_t;$/;"	t	typeref:struct:lynxos_bootparms_t
lyr_chrm_blue	drivers/video/fsl_dcu_fb.c	/^	u32 lyr_chrm_blue;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
lyr_chrm_grn	drivers/video/fsl_dcu_fb.c	/^	u32 lyr_chrm_grn;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
lyr_chrm_red	drivers/video/fsl_dcu_fb.c	/^	u32 lyr_chrm_red;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
lyr_intpol_en	drivers/video/fsl_dcu_fb.c	/^	u32 lyr_intpol_en;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
lyr_luma_comp	drivers/video/fsl_dcu_fb.c	/^	u32 lyr_luma_comp;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
lz4_block_header	lib/lz4_wrapper.c	/^struct lz4_block_header {$/;"	s	file:
lz4_compressed	test/compression.c	/^static const char lz4_compressed[] =$/;"	v	typeref:typename:const char[]	file:
lz4_compressed_size	test/compression.c	/^static const unsigned long lz4_compressed_size = 276;$/;"	v	typeref:typename:const unsigned long	file:
lz4_frame_header	lib/lz4_wrapper.c	/^struct lz4_frame_header {$/;"	s	file:
lzjb_decompress	fs/zfs/zfs_lzjb.c	/^lzjb_decompress(void *s_start, void *d_start, uint32_t s_len,$/;"	f	typeref:typename:int
lzmaBuffToBuffDecompress	lib/lzma/LzmaTools.c	/^int lzmaBuffToBuffDecompress (unsigned char *outStream, SizeT *uncompressedSize,$/;"	f	typeref:typename:int
lzma_compressed	test/compression.c	/^static const char lzma_compressed[] =$/;"	v	typeref:typename:const char[]	file:
lzma_compressed_size	test/compression.c	/^static const unsigned long lzma_compressed_size = 229;$/;"	v	typeref:typename:const unsigned long	file:
lzo1x_decompress	fs/jffs2/compr_lzo.c	/^lzo1x_decompress (const lzo_byte * in, lzo_uint in_len,$/;"	f	typeref:typename:int	file:
lzo1x_decompress_safe	lib/lzo/lzo1x_decompress.c	/^int lzo1x_decompress_safe(const unsigned char *in, size_t in_len,$/;"	f	typeref:typename:int
lzo1x_worst_compress	include/linux/lzo.h	/^#define lzo1x_worst_compress(/;"	d
lzo_bool	fs/jffs2/compr_lzo.c	/^typedef int lzo_bool;$/;"	t	typeref:typename:int	file:
lzo_byte	fs/jffs2/compr_lzo.c	/^#define lzo_byte	/;"	d	file:
lzo_bytep	fs/jffs2/compr_lzo.c	/^#define lzo_bytep	/;"	d	file:
lzo_bytepp	fs/jffs2/compr_lzo.c	/^#define lzo_bytepp	/;"	d	file:
lzo_charp	fs/jffs2/compr_lzo.c	/^#define lzo_charp	/;"	d	file:
lzo_compr	fs/ubifs/ubifs.c	/^static struct ubifs_compressor lzo_compr = {$/;"	v	typeref:struct:ubifs_compressor	file:
lzo_compressed	test/compression.c	/^static const char lzo_compressed[] =$/;"	v	typeref:typename:const char[]	file:
lzo_compressed_size	test/compression.c	/^static const unsigned long lzo_compressed_size = 334;$/;"	v	typeref:typename:const unsigned long	file:
lzo_decompress	fs/jffs2/compr_lzo.c	/^int lzo_decompress(unsigned char *data_in, unsigned char *cpage_out,$/;"	f	typeref:typename:int
lzo_int	fs/jffs2/compr_lzo.c	/^typedef I32 lzo_int;$/;"	t	typeref:typename:I32	file:
lzo_int32	fs/jffs2/compr_lzo.c	/^typedef I32 lzo_int32;$/;"	t	typeref:typename:I32	file:
lzo_int32p	fs/jffs2/compr_lzo.c	/^#define lzo_int32p	/;"	d	file:
lzo_intp	fs/jffs2/compr_lzo.c	/^#define lzo_intp	/;"	d	file:
lzo_ptr_t	fs/jffs2/compr_lzo.c	/^typedef unsigned long lzo_ptr_t;$/;"	t	typeref:typename:unsigned long	file:
lzo_ptrdiff_t	fs/jffs2/compr_lzo.c	/^typedef ptrdiff_t lzo_ptrdiff_t;$/;"	t	typeref:typename:ptrdiff_t	file:
lzo_shortp	fs/jffs2/compr_lzo.c	/^#define lzo_shortp	/;"	d	file:
lzo_sizeof_dict_t	fs/jffs2/compr_lzo.c	/^#define lzo_sizeof_dict_t	/;"	d	file:
lzo_sptr_t	fs/jffs2/compr_lzo.c	/^typedef long lzo_sptr_t;$/;"	t	typeref:typename:long	file:
lzo_uint	fs/jffs2/compr_lzo.c	/^typedef U32 lzo_uint;$/;"	t	typeref:typename:U32	file:
lzo_uint32	fs/jffs2/compr_lzo.c	/^typedef U32 lzo_uint32;$/;"	t	typeref:typename:U32	file:
lzo_uint32p	fs/jffs2/compr_lzo.c	/^#define lzo_uint32p	/;"	d	file:
lzo_uintp	fs/jffs2/compr_lzo.c	/^#define lzo_uintp	/;"	d	file:
lzo_ushortp	fs/jffs2/compr_lzo.c	/^#define lzo_ushortp	/;"	d	file:
lzo_voidp	fs/jffs2/compr_lzo.c	/^#define lzo_voidp	/;"	d	file:
lzo_voidpp	fs/jffs2/compr_lzo.c	/^#define lzo_voidpp	/;"	d	file:
lzop_decompress	lib/lzo/lzo1x_decompress.c	/^int lzop_decompress(const unsigned char *src, size_t src_len,$/;"	f	typeref:typename:int
lzop_magic	lib/lzo/lzo1x_decompress.c	/^static const unsigned char lzop_magic[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
m	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	u16     m;$/;"	m	struct:pipe3_dpll_params	typeref:typename:u16
m	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 m;$/;"	m	struct:dpll_params	typeref:typename:u32
m	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m;$/;"	m	struct:__anonc27596e00108	typeref:typename:unsigned int
m	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m	arch/arm/include/asm/omap_common.h	/^	u32 m;$/;"	m	struct:dpll_params	typeref:typename:u32
m	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned short			m;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned short
m	arch/arm/mach-tegra/cpu.h	/^	u16	m;$/;"	m	struct:clk_pll_table	typeref:typename:u16
m	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
m	arch/powerpc/include/asm/mmu.h	/^	unsigned long m:1;	\/* Memory coherence *\/$/;"	m	struct:_BATL	typeref:typename:unsigned long:1
m	arch/powerpc/include/asm/mmu.h	/^	unsigned long m:1;	\/* Memory coherence *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:1
m	arch/powerpc/include/asm/mmu.h	/^	unsigned long m:1;	\/* Memory coherence *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
m	drivers/qe/uec.h	/^	u16  m;       \/* address       *\/$/;"	m	struct:uec_82xx_enet_address	typeref:typename:u16
m	drivers/usb/dwc3/ti_usb_phy.c	/^	u16	m;$/;"	m	struct:usb3_dpll_params	typeref:typename:u16	file:
m	drivers/usb/phy/omap_usb_phy.c	/^	u16	m;$/;"	m	struct:usb3_dpll_params	typeref:typename:u16	file:
m	include/linux/bch.h	/^	unsigned int    m;$/;"	m	struct:bch_control	typeref:typename:unsigned int
m0	arch/blackfin/include/asm/ptrace.h	/^	long m0;$/;"	m	struct:pt_regs	typeref:typename:long
m0	arch/sh/include/asm/ptrace.h	/^	unsigned long	m0;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
m0_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint m0_ctrl;			\/* _DISP_M0_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
m1	arch/blackfin/include/asm/ptrace.h	/^	long m1;$/;"	m	struct:pt_regs	typeref:typename:long
m1	arch/sh/include/asm/ptrace.h	/^	unsigned long	m1;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
m16_swap	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define m16_swap(/;"	d	file:
m16_swap	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define m16_swap(/;"	d	file:
m16_swap	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define m16_swap(/;"	d	file:
m16_swap	drivers/usb/host/ohci-hcd.c	/^# define m16_swap(/;"	d	file:
m16_swap	drivers/usb/host/ohci-s3c24xx.c	/^#define m16_swap(/;"	d	file:
m1_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint m1_ctrl;			\/* _DISP_M1_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
m2	arch/arm/include/asm/arch-am33xx/clock.h	/^	s8 m2;$/;"	m	struct:dpll_params	typeref:typename:s8
m2	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m2;$/;"	m	struct:__anonc27596e00108	typeref:typename:unsigned int
m2	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m2;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m2	arch/arm/include/asm/omap_common.h	/^	s8 m2;$/;"	m	struct:dpll_params	typeref:typename:s8
m2	arch/blackfin/include/asm/ptrace.h	/^	long m2;$/;"	m	struct:pt_regs	typeref:typename:long
m256_w	arch/sh/lib/udivsi3_i4i.S	/^m256_w:$/;"	l
m28_mmc_wp	board/denx/m28evk/m28evk.c	/^static int m28_mmc_wp(int id)$/;"	f	typeref:typename:int	file:
m2div	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m2div;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m2m_channel_0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2m_channel_0;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2m_channel_1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2m_channel_1;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2ndiv	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int m2ndiv;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
m2p_channel_0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_0;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_1;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_2;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_3;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_4	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_4;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_5	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_5;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_6	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_6;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_7	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_7;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_8	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_8;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m2p_channel_9	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct dma_channel m2p_channel_9;$/;"	m	struct:dma_regs	typeref:struct:dma_channel
m3	arch/arm/include/asm/arch-am33xx/clock.h	/^	s8 m3;$/;"	m	struct:dpll_params	typeref:typename:s8
m3	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m3;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m3	arch/arm/include/asm/omap_common.h	/^	s8 m3;$/;"	m	struct:dpll_params	typeref:typename:s8
m3	arch/blackfin/include/asm/ptrace.h	/^	long m3;$/;"	m	struct:pt_regs	typeref:typename:long
m32_swap	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define m32_swap(/;"	d	file:
m32_swap	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define m32_swap(/;"	d	file:
m32_swap	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define m32_swap(/;"	d	file:
m32_swap	drivers/usb/host/ohci-hcd.c	/^# define m32_swap(/;"	d	file:
m32_swap	drivers/usb/host/ohci-s3c24xx.c	/^#define m32_swap(/;"	d	file:
m3div	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int m3div;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
m3if_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct m3if_regs {$/;"	s
m4	arch/arm/include/asm/arch-am33xx/clock.h	/^	s8 m4;$/;"	m	struct:dpll_params	typeref:typename:s8
m4	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m4;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m4_h11	arch/arm/include/asm/omap_common.h	/^	s8 m4_h11;$/;"	m	struct:dpll_params	typeref:typename:s8
m4rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 m4rcr;$/;"	m	struct:src	typeref:typename:u32
m5	arch/arm/include/asm/arch-am33xx/clock.h	/^	s8 m5;$/;"	m	struct:dpll_params	typeref:typename:s8
m5	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m5;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m5253_h	arch/m68k/include/asm/m5253.h	/^#define m5253_h$/;"	d
m5282_h	arch/m68k/include/asm/m5282.h	/^#define	m5282_h$/;"	d
m5301x_h	arch/m68k/include/asm/m5301x.h	/^#define m5301x_h$/;"	d
m53_set_clock	board/denx/m53evk/m53evk.c	/^static void m53_set_clock(void)$/;"	f	typeref:typename:void	file:
m53_set_nand	board/denx/m53evk/m53evk.c	/^static void m53_set_nand(void)$/;"	f	typeref:typename:void	file:
m5_h12	arch/arm/include/asm/omap_common.h	/^	s8 m5_h12;$/;"	m	struct:dpll_params	typeref:typename:s8
m6	arch/arm/include/asm/arch-am33xx/clock.h	/^	s8 m6;$/;"	m	struct:dpll_params	typeref:typename:s8
m6	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int m6;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
m6_h13	arch/arm/include/asm/omap_common.h	/^	s8 m6_h13;$/;"	m	struct:dpll_params	typeref:typename:s8
m7_h14	arch/arm/include/asm/omap_common.h	/^	s8 m7_h14;$/;"	m	struct:dpll_params	typeref:typename:s8
m8260_cpm_dpalloc	arch/powerpc/cpu/mpc8260/commproc.c	/^m8260_cpm_dpalloc(uint size, uint align)$/;"	f	typeref:typename:uint
m8260_cpm_extcbrg	arch/powerpc/cpu/mpc8260/commproc.c	/^m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)$/;"	f	typeref:typename:void
m8260_cpm_fastbrg	arch/powerpc/cpu/mpc8260/commproc.c	/^m8260_cpm_fastbrg(uint brg, uint rate, int div16)$/;"	f	typeref:typename:void
m8260_cpm_hostalloc	arch/powerpc/cpu/mpc8260/commproc.c	/^m8260_cpm_hostalloc(uint size, uint align)$/;"	f	typeref:typename:uint
m8260_cpm_reset	arch/powerpc/cpu/mpc8260/commproc.c	/^m8260_cpm_reset(void)$/;"	f	typeref:typename:void
m8260_cpm_setbrg	arch/powerpc/cpu/mpc8260/commproc.c	/^m8260_cpm_setbrg(uint brg, uint rate)$/;"	f	typeref:typename:void
m8260_get_irq	arch/powerpc/cpu/mpc8260/interrupts.c	/^static int m8260_get_irq (struct pt_regs *regs)$/;"	f	typeref:typename:int	file:
m8260_mask_and_ack	arch/powerpc/cpu/mpc8260/interrupts.c	/^static void m8260_mask_and_ack (unsigned int irq_nr)$/;"	f	typeref:typename:void	file:
m8260_mask_irq	arch/powerpc/cpu/mpc8260/interrupts.c	/^static void m8260_mask_irq (unsigned int irq_nr)$/;"	f	typeref:typename:void	file:
m8260_unmask_irq	arch/powerpc/cpu/mpc8260/interrupts.c	/^static void m8260_unmask_irq (unsigned int irq_nr)$/;"	f	typeref:typename:void	file:
m8560_cpm_dpalloc	arch/powerpc/cpu/mpc85xx/commproc.c	/^m8560_cpm_dpalloc(uint size, uint align)$/;"	f	typeref:typename:uint
m8560_cpm_extcbrg	arch/powerpc/cpu/mpc85xx/commproc.c	/^m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)$/;"	f	typeref:typename:void
m8560_cpm_fastbrg	arch/powerpc/cpu/mpc85xx/commproc.c	/^m8560_cpm_fastbrg(uint brg, uint rate, int div16)$/;"	f	typeref:typename:void
m8560_cpm_hostalloc	arch/powerpc/cpu/mpc85xx/commproc.c	/^m8560_cpm_hostalloc(uint size, uint align)$/;"	f	typeref:typename:uint
m8560_cpm_reset	arch/powerpc/cpu/mpc85xx/commproc.c	/^m8560_cpm_reset(void)$/;"	f	typeref:typename:void
m8560_cpm_setbrg	arch/powerpc/cpu/mpc85xx/commproc.c	/^m8560_cpm_setbrg(uint brg, uint rate)$/;"	f	typeref:typename:void
m88e1011s_config	drivers/net/phy/marvell.c	/^static int m88e1011s_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1011s_startup	drivers/net/phy/marvell.c	/^static int m88e1011s_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1111s_config	drivers/net/phy/marvell.c	/^static int m88e1111s_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1118_config	drivers/net/phy/marvell.c	/^static int m88e1118_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1118_startup	drivers/net/phy/marvell.c	/^static int m88e1118_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1121_config	drivers/net/phy/marvell.c	/^static int m88e1121_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1145_config	drivers/net/phy/marvell.c	/^static int m88e1145_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1145_startup	drivers/net/phy/marvell.c	/^static int m88e1145_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1149_config	drivers/net/phy/marvell.c	/^static int m88e1149_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1310_config	drivers/net/phy/marvell.c	/^static int m88e1310_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1510_config	drivers/net/phy/marvell.c	/^static int m88e1510_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1518_config	drivers/net/phy/marvell.c	/^static int m88e1518_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m88e1518_phy_writebits	drivers/net/phy/marvell.c	/^void m88e1518_phy_writebits(struct phy_device *phydev,$/;"	f	typeref:typename:void
m88e1xxx_parse_status	drivers/net/phy/marvell.c	/^static int m88e1xxx_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
m8xx_get_graycode	drivers/pcmcia/mpc8xx_pcmcia.c	/^static u_int m8xx_get_graycode(u_int size)$/;"	f	typeref:typename:u_int	file:
m8xx_size_to_gray	drivers/pcmcia/mpc8xx_pcmcia.c	/^static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =$/;"	v	typeref:typename:const u_int[]	file:
mALLINFo	common/dlmalloc.c	/^struct mallinfo mALLINFo()$/;"	f	typeref:struct:mallinfo
mALLINFo	include/malloc.h	/^# define mALLINFo	/;"	d
mALLINFo	include/malloc.h	/^#define mALLINFo	/;"	d
mALLOPt	common/dlmalloc.c	/^int mALLOPt(int param_number, int value)$/;"	f	typeref:typename:int
mALLOPt	include/malloc.h	/^# define mALLOPt	/;"	d
mALLOPt	include/malloc.h	/^#define mALLOPt	/;"	d
mALLOc	common/dlmalloc.c	/^Void_t* mALLOc(size_t bytes)$/;"	f	typeref:typename:Void_t *
mALLOc	include/malloc.h	/^# define mALLOc	/;"	d
mALLOc	include/malloc.h	/^#define mALLOc	/;"	d
mEMALIGn	common/dlmalloc.c	/^Void_t* mEMALIGn(size_t alignment, size_t bytes)$/;"	f	typeref:typename:Void_t *
mEMALIGn	include/malloc.h	/^# define mEMALIGn	/;"	d
mEMALIGn	include/malloc.h	/^#define mEMALIGn	/;"	d
m_aud_gen_filter_th	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	m_aud_gen_filter_th;$/;"	m	struct:rk3288_edp	typeref:typename:u32
m_aud_gen_filter_th	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_aud_gen_filter_th;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_cal_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_cal_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 m_control;				\/* 0x48 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
m_def0	board/keymile/common/common.h	/^	u8	m_def0;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def1	board/keymile/common/common.h	/^	u8	m_def1;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def2	board/keymile/common/common.h	/^	u8	m_def2;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def3	board/keymile/common/common.h	/^	u8	m_def3;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def4	board/keymile/common/common.h	/^	u8	m_def4;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def5	board/keymile/common/common.h	/^	u8	m_def5;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_mask0	board/keymile/common/common.h	/^	u8	m_def_mask0;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_mask1	board/keymile/common/common.h	/^	u8	m_def_mask1;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_mask2	board/keymile/common/common.h	/^	u8	m_def_mask2;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_mask3	board/keymile/common/common.h	/^	u8	m_def_mask3;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_mask4	board/keymile/common/common.h	/^	u8	m_def_mask4;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_mask5	board/keymile/common/common.h	/^	u8	m_def_mask5;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_pri	board/keymile/common/common.h	/^	u8	m_def_pri;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_trap0	board/keymile/common/common.h	/^	u8	m_def_trap0;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_trap1	board/keymile/common/common.h	/^	u8	m_def_trap1;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_trap2	board/keymile/common/common.h	/^	u8	m_def_trap2;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_trap3	board/keymile/common/common.h	/^	u8	m_def_trap3;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_trap4	board/keymile/common/common.h	/^	u8	m_def_trap4;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_def_trap5	board/keymile/common/common.h	/^	u8	m_def_trap5;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_div	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int m_div;		\/* m divider value *\/$/;"	m	struct:set_epll_con_val	typeref:typename:unsigned int
m_halfs	drivers/crypto/fsl/desc_constr.h	/^	} m_halfs;$/;"	m	union:ptr_addr_t	typeref:struct:ptr_addr_t::__anona38440c40108
m_mask	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	m_mask:10;	\/* DIVM_MASK *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:10
m_mask_def0	board/keymile/common/common.h	/^	u8	m_mask_def0;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_mask_def1	board/keymile/common/common.h	/^	u8	m_mask_def1;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_mask_def2	board/keymile/common/common.h	/^	u8	m_mask_def2;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_mask_def3	board/keymile/common/common.h	/^	u8	m_mask_def3;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_mask_def4	board/keymile/common/common.h	/^	u8	m_mask_def4;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_mask_def5	board/keymile/common/common.h	/^	u8	m_mask_def5;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
m_shift	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	m_shift:5;	\/* DIVM_SHIFT *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:5
m_vid0	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_vid0;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_vid1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_vid1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_vid2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_vid2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_vid_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	m_vid_0;$/;"	m	struct:rk3288_edp	typeref:typename:u32
m_vid_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	m_vid_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
m_vid_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	m_vid_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
m_vid_gen_filter_th	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	m_vid_gen_filter_th;$/;"	m	struct:rk3288_edp	typeref:typename:u32
m_vid_gen_filter_th	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_vid_gen_filter_th;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_vid_mon	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	m_vid_mon;$/;"	m	struct:rk3288_edp	typeref:typename:u32
m_vid_mon	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	m_vid_mon;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
m_whole	drivers/crypto/fsl/desc_constr.h	/^	u64 m_whole;$/;"	m	union:ptr_addr_t	typeref:typename:u64
ma5d4evk_lcd_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^static void ma5d4evk_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
ma5d4evk_macb0_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^void ma5d4evk_macb0_hw_init(void)$/;"	f	typeref:typename:void
ma5d4evk_mci0_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^void ma5d4evk_mci0_hw_init(void)$/;"	f	typeref:typename:void
ma5d4evk_mci1_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^void ma5d4evk_mci1_hw_init(void)$/;"	f	typeref:typename:void
ma5d4evk_serial_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^static void ma5d4evk_serial_hw_init(void)$/;"	f	typeref:typename:void	file:
ma5d4evk_spi0_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^static void ma5d4evk_spi0_hw_init(void)$/;"	f	typeref:typename:void	file:
ma5d4evk_usb_hw_init	board/denx/ma5d4evk/ma5d4evk.c	/^static void ma5d4evk_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
ma_lisa_map_2G_x_2_x_2	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2 = {$/;"	v	typeref:typename:const struct dmm_lisa_map_regs
maarcr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 maarcr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
maarcr	include/fsl_mmdc.h	/^	u32 maarcr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mac	arch/arm/dts/am33xx.dtsi	/^		mac: ethernet@4a100000 {$/;"	l
mac	arch/arm/dts/am4372.dtsi	/^		mac: ethernet@4a100000 {$/;"	l
mac	arch/arm/dts/dra7.dtsi	/^		mac: ethernet@48484000 {$/;"	l
mac	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u8 mac[6];$/;"	m	struct:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a::__anon775fc5440608	typeref:typename:u8[6]
mac	board/freescale/common/sys_eeprom.c	/^	u8 mac[MAX_NUM_PORTS][6];     \/* 0x42 - 0x71 MAC addresses *\/$/;"	m	struct:eeprom	typeref:typename:u8[][6]	file:
mac	board/freescale/common/sys_eeprom.c	/^	u8 mac[MAX_NUM_PORTS][6];     \/* 0x42 - 0xa1 MAC addresses *\/$/;"	m	struct:eeprom	typeref:typename:u8[][6]	file:
mac	board/kosagi/novena/novena.c	/^	uint8_t		mac[6];$/;"	m	struct:novena_eeprom_data	typeref:typename:uint8_t[6]	file:
mac	board/siemens/common/factoryset.h	/^	uchar mac[6];$/;"	m	struct:factorysetcontainer	typeref:typename:uchar[6]
mac	board/varisys/common/sys_eeprom.c	/^	u8 mac[MAX_NUM_PORTS][6];     \/* 0x42 - x MAC addresses *\/$/;"	m	struct:eeprom	typeref:typename:u8[][6]	file:
mac	drivers/mmc/rpmb.c	/^	unsigned char mac[RPMB_SZ_MAC];$/;"	m	struct:s_rpmb	typeref:typename:unsigned char[]	file:
mac	drivers/net/fm/fm.h	/^	struct fsl_enet_mac *mac;	\/* MAC controller *\/$/;"	m	struct:fm_eth	typeref:struct:fsl_enet_mac *
mac	drivers/net/ftmac110.h	/^	uint32_t mac[2]; \/* 0x08: MAC Address *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t[2]
mac0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 mac0[6];          \/* 0x00: MAC1 *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[6]
mac01addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac01addr1;     \/* 0x24548 - MAC exact match address 1, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac01addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac01addr2;     \/* 0x2454C - MAC exact match address 1, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac02addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac02addr1;     \/* 0x24550 - MAC exact match address 2, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac02addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac02addr2;     \/* 0x24554 - MAC exact match address 2, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac03addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac03addr1;     \/* 0x24558 - MAC exact match address 3, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac03addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac03addr2;     \/* 0x2455C - MAC exact match address 3, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac04addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac04addr1;     \/* 0x24560 - MAC exact match address 4, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac04addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac04addr2;     \/* 0x24564 - MAC exact match address 4, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac05addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac05addr1;     \/* 0x24568 - MAC exact match address 5, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac05addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac05addr2;     \/* 0x2456C - MAC exact match address 5, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac06addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac06addr1;     \/* 0x24570 - MAC exact match address 6, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac06addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac06addr2;     \/* 0x24574 - MAC exact match address 6, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac07addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac07addr1;     \/* 0x24578 - MAC exact match address 7, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac07addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac07addr2;     \/* 0x2457C - MAC exact match address 7, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac08addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac08addr1;     \/* 0x24580 - MAC exact match address 8, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac08addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac08addr2;     \/* 0x24584 - MAC exact match address 8, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac09addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac09addr1;     \/* 0x24588 - MAC exact match address 9, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac09addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac09addr2;     \/* 0x2458C - MAC exact match address 9, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac1	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 mac1[6];          \/* 0x06: MAC2 *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[6]
mac1	drivers/net/lpc32xx_eth.c	/^	u32 mac1;		\/* MAC configuration register 1 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mac10addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac10addr1;     \/* 0x24590 - MAC exact match address 10, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac10addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac10addr2;     \/* 0x24594 - MAC exact match address 10, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac11addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac11addr1;     \/* 0x24598 - MAC exact match address 11, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac11addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac11addr2;     \/* 0x2459C - MAC exact match address 11, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac12addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac12addr1;     \/* 0x245A0 - MAC exact match address 12, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac12addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac12addr2;     \/* 0x245A4 - MAC exact match address 12, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac13addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac13addr1;     \/* 0x245A8 - MAC exact match address 13, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac13addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac13addr2;     \/* 0x245AC - MAC exact match address 13, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac14addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac14addr1;     \/* 0x245B0 - MAC exact match address 14, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac14addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac14addr2;     \/* 0x245B4 - MAC exact match address 14, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac15addr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac15addr1;     \/* 0x245B8 - MAC exact match address 15, part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac15addr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    mac15addr2;     \/* 0x245BC - MAC exact match address 15, part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mac1_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 mac1_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
mac2	drivers/net/lpc32xx_eth.c	/^	u32 mac2;		\/* MAC configuration register 2 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mac2_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 mac2_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
mac3_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 mac3_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
mac_10g	include/fsl_fman.h	/^	} mac_10g[1];$/;"	m	struct:ccsr_fman	typeref:struct:ccsr_fman::__anonbe262a140408[1]
mac_1g	include/fsl_fman.h	/^	} mac_1g[8];		\/* support up to 8 1g controllers *\/$/;"	m	struct:ccsr_fman	typeref:struct:ccsr_fman::__anonbe262a140308[8]
mac_a0	drivers/net/sunxi_emac.c	/^	u32 mac_a0;	\/* 0x98 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_a1	drivers/net/sunxi_emac.c	/^	u32 mac_a1;	\/* 0x9c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_access	include/vsc9953.h	/^	u32	mac_access;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
mac_addr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mac_addr[6];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[6]
mac_addr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 mac_addr[6];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[6]
mac_addr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	mac_addr[6];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[6]
mac_addr	board/birdland/bav335x/board.h	/^	char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];$/;"	m	struct:board_eeconfig	typeref:typename:char[][]
mac_addr	board/bosch/shc/board.h	/^	uint8_t mac_addr[HDR_ETH_ALEN];$/;"	m	struct:shc_eeprom	typeref:typename:uint8_t[]
mac_addr	board/ti/common/board_detect.h	/^	char mac_addr[TI_EEPROM_HDR_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];$/;"	m	struct:ti_am_eeprom	typeref:typename:char[][]
mac_addr	board/ti/common/board_detect.h	/^	char mac_addr[TI_EEPROM_HDR_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];$/;"	m	struct:ti_common_eeprom	typeref:typename:char[][]
mac_addr	board/vscom/baltos/board.h	/^	char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];$/;"	m	struct:am335x_baseboard_id	typeref:typename:char[][]
mac_addr	drivers/net/ks8851_mll.c	/^	u8			mac_addr[6];$/;"	m	struct:ks_net	typeref:typename:u8[6]	file:
mac_addr	drivers/net/sh_eth.h	/^	u8 mac_addr[6];$/;"	m	struct:sh_eth_info	typeref:typename:u8[6]
mac_addr	include/efi_api.h	/^	char mac_addr[32];$/;"	m	struct:efi_mac_address	typeref:typename:char[32]
mac_addr	include/fsl-mc/fsl_dpni.h	/^	uint8_t mac_addr[6];$/;"	m	struct:dpni_cfg	typeref:typename:uint8_t[6]
mac_addr	include/fsl_memac.h	/^	u32	mac_addr[14];	\/* MAC address *\/$/;"	m	struct:memac	typeref:typename:u32[14]
mac_addr0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 mac_addr0;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 mac_addr0;$/;"	m	struct:fuse_bank9_regs	typeref:typename:u32
mac_addr0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 mac_addr0;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 mac_addr1;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 mac_addr1;$/;"	m	struct:fuse_bank9_regs	typeref:typename:u32
mac_addr1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 mac_addr1;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 mac_addr2; \/*For i.MX6SX and i.MX6UL*\/$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 mac_addr2;$/;"	m	struct:fuse_bank9_regs	typeref:typename:u32
mac_addr2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 mac_addr2;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 mac_addr3;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
mac_addr_0	drivers/net/altera_tse.h	/^	u32 mac_addr_0;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
mac_addr_0	include/fsl_memac.h	/^	u32	mac_addr_0;	\/* Lower 32 bits of 48-bit MAC address *\/$/;"	m	struct:memac	typeref:typename:u32
mac_addr_0	include/fsl_tgec.h	/^	u32	mac_addr_0;	\/* Lower 32 bits of 48-bit MAC address *\/$/;"	m	struct:tgec	typeref:typename:u32
mac_addr_1	drivers/net/altera_tse.h	/^	u32 mac_addr_1;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
mac_addr_1	include/fsl_memac.h	/^	u32	mac_addr_1;	\/* Upper 16 bits of 48-bit MAC address *\/$/;"	m	struct:memac	typeref:typename:u32
mac_addr_1	include/fsl_tgec.h	/^	u32	mac_addr_1;	\/* Upper 16 bits of 48-bit MAC address *\/$/;"	m	struct:tgec	typeref:typename:u32
mac_addr_2	include/fsl_tgec.h	/^	u32	mac_addr_2;	\/* Lower 32 bits of the 2nd 48-bit MAC addr *\/$/;"	m	struct:tgec	typeref:typename:u32
mac_addr_3	include/fsl_tgec.h	/^	u32	mac_addr_3;	\/* Upper 16 bits of the 2nd 48-bit MAC addr *\/$/;"	m	struct:tgec	typeref:typename:u32
mac_addr_load	drivers/net/pch_gbe.h	/^	u32 mac_addr_load;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
mac_address	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned char	mac_address[ENET_ADDR_LENGTH];$/;"	m	struct:arp_entry	typeref:typename:unsigned char[]
mac_address_string	lib/vsprintf.c	/^static char *mac_address_string(char *buf, char *end, u8 *addr, int field_width,$/;"	f	typeref:typename:char *	file:
mac_adr	drivers/net/pch_gbe.h	/^	struct pch_gbe_regs_mac_adr mac_adr[16];$/;"	m	struct:pch_gbe_regs	typeref:struct:pch_gbe_regs_mac_adr[16]
mac_adv_chk_cfg	include/vsc9953.h	/^	u32	mac_adv_chk_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_busy	board/micronas/vct/smc_eeprom.c	/^static int mac_busy(int req_to)$/;"	f	typeref:typename:int	file:
mac_cfg_status	include/vsc9953.h	/^	struct vsc9953_dev_gmii_mac_cfg_status	mac_cfg_status;$/;"	m	struct:vsc9953_dev_gmii	typeref:struct:vsc9953_dev_gmii_mac_cfg_status
mac_changeable	include/efi_api.h	/^	u8 mac_changeable;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u8
mac_clrt	drivers/net/sunxi_emac.c	/^	u32 mac_clrt;	\/* 0x6c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_control	drivers/net/cpsw.c	/^	u32				mac_control;$/;"	m	struct:cpsw_slave	typeref:typename:u32	file:
mac_control	drivers/net/cpsw.c	/^	u32	mac_control;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
mac_control	include/cpsw.h	/^	u32	mac_control;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
mac_count	board/freescale/common/sys_eeprom.c	/^	u8 mac_count;     \/* 0x40        Number of MAC addresses *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
mac_count	board/varisys/common/sys_eeprom.c	/^	u8 mac_count;     \/* 0x40        Number of MAC addresses *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
mac_cr	drivers/usb/eth/smsc95xx.c	/^	u32 mac_cr;  \/* MAC control register value *\/$/;"	m	struct:smsc95xx_private	typeref:typename:u32	file:
mac_ctl0	drivers/net/sunxi_emac.c	/^	u32 mac_ctl0;	\/* 0x5c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_ctl1	drivers/net/sunxi_emac.c	/^	u32 mac_ctl1;	\/* 0x60 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_delay	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void mac_delay(unsigned int cnt)$/;"	f	typeref:typename:void	file:
mac_dev	drivers/net/altera_tse.h	/^	struct alt_tse_mac *mac_dev;$/;"	m	struct:altera_tse_priv	typeref:struct:alt_tse_mac *
mac_diag	board/ifm/ac14xx/ac14xx.c	/^static int mac_diag;$/;"	v	typeref:typename:int	file:
mac_driver_desc	disk/part_mac.h	/^typedef struct mac_driver_desc {$/;"	s
mac_driver_desc_t	disk/part_mac.h	/^} mac_driver_desc_t;$/;"	t	typeref:struct:mac_driver_desc
mac_driver_entry	disk/part_mac.h	/^typedef struct mac_driver_entry {$/;"	s
mac_driver_entry_t	disk/part_mac.h	/^} mac_driver_entry_t;$/;"	t	typeref:struct:mac_driver_entry
mac_ena_cfg	include/vsc9953.h	/^	u32	mac_ena_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_fc_cfg	include/vsc9953.h	/^	u32	mac_fc_cfg[10];$/;"	m	struct:vsc9953_sys_pause_cfg	typeref:typename:u32[10]
mac_fc_mac_high_cfg	include/vsc9953.h	/^	u32	mac_fc_mac_high_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_fc_mac_low_cfg	include/vsc9953.h	/^	u32	mac_fc_mac_low_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_fifo	arch/mips/mach-au1x00/au1x00_eth.c	/^mac_fifo_t mac_fifo[NO_OF_FIFOS];$/;"	v	typeref:typename:mac_fifo_t[]
mac_fifo_t	arch/mips/mach-au1x00/au1x00_eth.c	/^} mac_fifo_t;$/;"	t	typeref:struct:__anon03662d5e0108	file:
mac_flag	board/freescale/common/sys_eeprom.c	/^	u8 mac_flag;      \/* 0x41        MAC table flags *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
mac_flag	board/varisys/common/sys_eeprom.c	/^	u8 mac_flag;      \/* 0x41        MAC table flags *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
mac_hdx_cfg	include/vsc9953.h	/^	u32	mac_hdx_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_hi	drivers/net/cpsw.c	/^#define mac_hi(/;"	d	file:
mac_hi	drivers/net/keystone_net.c	/^#define mac_hi(/;"	d	file:
mac_id	include/cpsw.h	/^	u32	mac_id;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
mac_id	include/fsl-mc/fsl_dpmac.h	/^	int mac_id;$/;"	m	struct:dpmac_cfg	typeref:typename:int
mac_ifg_cfg	include/vsc9953.h	/^	u32	mac_ifg_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_index	arch/avr32/include/asm/setup.h	/^	u8	mac_index;$/;"	m	struct:tag_ethernet	typeref:typename:u8
mac_init	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void mac_init(void)$/;"	f	typeref:typename:void	file:
mac_init	drivers/net/bcm-sf2-eth.h	/^	int (*mac_init)(struct eth_device *dev);$/;"	m	struct:eth_info	typeref:typename:int (*)(struct eth_device * dev)
mac_ipgr	drivers/net/sunxi_emac.c	/^	u32 mac_ipgr;	\/* 0x68 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_ipgt	drivers/net/sunxi_emac.c	/^	u32 mac_ipgt;	\/* 0x64 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_ladr	drivers/net/ftgmac100.h	/^	unsigned int	mac_ladr;	\/* 0x0c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
mac_ladr	drivers/net/ftmac100.h	/^	unsigned int	mac_ladr;	\/* 0x0c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
mac_lo	drivers/net/cpsw.c	/^#define mac_lo(/;"	d	file:
mac_lo	drivers/net/keystone_net.c	/^#define mac_lo(/;"	d	file:
mac_madr	drivers/net/ftgmac100.h	/^	unsigned int	mac_madr;	\/* 0x08 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
mac_madr	drivers/net/ftmac100.h	/^	unsigned int	mac_madr;	\/* 0x08 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
mac_madr	drivers/net/sunxi_emac.c	/^	u32 mac_madr;	\/* 0x84 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_maxf	drivers/net/sunxi_emac.c	/^	u32 mac_maxf;	\/* 0x70 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_maxlen_cfg	include/vsc9953.h	/^	u32	mac_maxlen_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_mcfg	drivers/net/sunxi_emac.c	/^	u32 mac_mcfg;	\/* 0x7c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_mcmd	drivers/net/sunxi_emac.c	/^	u32 mac_mcmd;	\/* 0x80 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_mind	drivers/net/sunxi_emac.c	/^	u32 mac_mind;	\/* 0x90 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_mode_cfg	include/vsc9953.h	/^	u32	mac_mode_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_mrdd	drivers/net/sunxi_emac.c	/^	u32 mac_mrdd;	\/* 0x8c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_mwtd	drivers/net/sunxi_emac.c	/^	u32 mac_mwtd;	\/* 0x88 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_options	include/vsc9953.h	/^	u32	mac_options;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
mac_partition	disk/part_mac.h	/^typedef struct mac_partition {$/;"	s
mac_partition_t	disk/part_mac.h	/^} mac_partition_t;$/;"	t	typeref:struct:mac_partition
mac_pci_setup	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void mac_pci_setup(void)$/;"	f	typeref:typename:void	file:
mac_queue	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct mac_queue {$/;"	s
mac_read	board/renesas/sh7785lcr/rtl8169_mac.c	/^void mac_read(void)$/;"	f	typeref:typename:void
mac_read_from_eeprom	board/freescale/common/sys_eeprom.c	/^int mac_read_from_eeprom(void)$/;"	f	typeref:typename:int
mac_read_from_eeprom	board/freescale/mpc8323erdb/mpc8323erdb.c	/^int mac_read_from_eeprom(void)$/;"	f	typeref:typename:int
mac_read_from_eeprom	board/ifm/ac14xx/ac14xx.c	/^int mac_read_from_eeprom(void)$/;"	f	typeref:typename:int
mac_read_from_eeprom	board/varisys/cyrus/cyrus.c	/^int mac_read_from_eeprom(void)$/;"	f	typeref:typename:int
mac_read_from_eeprom_common	board/varisys/common/sys_eeprom.c	/^int mac_read_from_eeprom_common(void)$/;"	f	typeref:typename:int
mac_read_from_fixed_id	board/varisys/common/sys_eeprom.c	/^void mac_read_from_fixed_id(void)$/;"	f	typeref:typename:void
mac_read_from_generic_eeprom	board/varisys/common/sys_eeprom.c	/^int mac_read_from_generic_eeprom(const char *envvar, int chip,$/;"	f	typeref:typename:int
mac_reg	drivers/net/sun8i_emac.c	/^	void *mac_reg;$/;"	m	struct:emac_eth_dev	typeref:typename:void *	file:
mac_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct mac_regs {$/;"	s
mac_regs	drivers/net/dwc_eth_qos.c	/^	struct eqos_mac_regs *mac_regs;$/;"	m	struct:eqos_priv	typeref:struct:eqos_mac_regs *	file:
mac_regs	drivers/net/pch_gbe.h	/^	struct pch_gbe_regs *mac_regs;$/;"	m	struct:pch_gbe_priv	typeref:struct:pch_gbe_regs *
mac_regs_p	drivers/net/designware.h	/^	struct eth_mac_regs *mac_regs_p;$/;"	m	struct:dw_eth_dev	typeref:struct:eth_mac_regs *
mac_rx_en	drivers/net/pch_gbe.h	/^	u32 mac_rx_en;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
mac_rx_enabled	drivers/qe/uec.h	/^	int				mac_rx_enabled;$/;"	m	struct:uec_private	typeref:typename:int
mac_sl_cfg	arch/arm/include/asm/ti-common/keystone_net.h	/^struct mac_sl_cfg {$/;"	s
mac_sl_config	drivers/net/keystone_net.c	/^int mac_sl_config(u_int16_t port, struct mac_sl_cfg *cfg)$/;"	f	typeref:typename:int
mac_sl_reset	drivers/net/keystone_net.c	/^int mac_sl_reset(u32 port)$/;"	f	typeref:typename:int
mac_ssrr	drivers/net/sunxi_emac.c	/^	u32 mac_ssrr;	\/* 0x94 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_status	drivers/net/cpsw.c	/^	u32	mac_status;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
mac_sticky	include/vsc9953.h	/^	u32	mac_sticky;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_supp	drivers/net/sunxi_emac.c	/^	u32 mac_supp;	\/* 0x74 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_table_cmd	drivers/net/vsc9953.c	/^enum mac_table_cmd {$/;"	g	file:
mac_tags_cfg	include/vsc9953.h	/^	u32	mac_tags_cfg;$/;"	m	struct:vsc9953_dev_gmii_mac_cfg_status	typeref:typename:u32
mac_test	drivers/net/sunxi_emac.c	/^	u32 mac_test;	\/* 0x78 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
mac_to_u64	board/ti/am57xx/board.c	/^static u64 mac_to_u64(u8 mac[6])$/;"	f	typeref:typename:u64	file:
mac_tx_enabled	drivers/qe/uec.h	/^	int				mac_tx_enabled;$/;"	m	struct:uec_private	typeref:typename:int
mac_type	drivers/net/e1000.h	/^	e1000_mac_type mac_type;$/;"	m	struct:e1000_hw	typeref:typename:e1000_mac_type
mac_write	board/renesas/sh7785lcr/rtl8169_mac.c	/^void mac_write(unsigned short *data)$/;"	f	typeref:typename:void
macaddr	board/Synology/ds109/ds109.h	/^	char macaddr[4][6];$/;"	m	struct:tag_mv_uboot	typeref:typename:char[4][6]
macaddr	drivers/net/calxedaxgmac.c	/^	} macaddr[16];$/;"	m	struct:xgmac_regs	typeref:struct:xgmac_regs::__anon986dd3dc0108[16]	file:
macaddr0hi	drivers/net/designware.h	/^	u32 macaddr0hi;		\/* 0x40 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
macaddr0lo	drivers/net/designware.h	/^	u32 macaddr0lo;		\/* 0x44 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
macaddress	board/ifm/ac14xx/ac14xx.c	/^	u8	macaddress[6];	\/** ethernet MAC (for the mainboard) @0x40 *\/$/;"	m	struct:eeprom_layout	typeref:typename:u8[6]	file:
macah	drivers/net/mvgbe.h	/^	u32 macah;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
macal	drivers/net/mvgbe.h	/^	u32 macal;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
macb0	arch/arm/dts/at91-sama5d2_xplained.dts	/^			macb0: ethernet@f8008000 {$/;"	l
macb0	arch/arm/dts/at91sam9260-smartweb.dts	/^			macb0: ethernet@fffc4000 {$/;"	l
macb0	arch/arm/dts/at91sam9260.dtsi	/^			macb0: ethernet@fffc4000 {$/;"	l
macb0	arch/arm/dts/at91sam9263.dtsi	/^			macb0: ethernet@fffbc000 {$/;"	l
macb0	arch/arm/dts/at91sam9g20-taurus.dts	/^			macb0: ethernet@fffc4000 {$/;"	l
macb0	arch/arm/dts/at91sam9g45-corvus.dts	/^			macb0: ethernet@fffbc000 {$/;"	l
macb0	arch/arm/dts/at91sam9g45-gurnard.dts	/^			macb0: ethernet@fffbc000 {$/;"	l
macb0	arch/arm/dts/at91sam9g45.dtsi	/^			macb0: ethernet@fffbc000 {$/;"	l
macb0	arch/arm/dts/sama5d2.dtsi	/^			macb0: ethernet@f8008000 {$/;"	l
macb0_clk	arch/arm/dts/at91sam9260.dtsi	/^					macb0_clk: macb0_clk {$/;"	l
macb0_clk	arch/arm/dts/at91sam9263.dtsi	/^					macb0_clk: macb0_clk {$/;"	l
macb0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					macb0_clk: macb0_clk {$/;"	l
macb0_clk	arch/arm/dts/sama5d2.dtsi	/^					macb0_clk: macb0_clk@5 {$/;"	l
macb_dbw	drivers/net/macb.c	/^static u32 macb_dbw(struct macb_device *macb)$/;"	f	typeref:typename:u32	file:
macb_device	drivers/net/macb.c	/^struct macb_device {$/;"	s	file:
macb_dma_desc	drivers/net/macb.c	/^struct macb_dma_desc {$/;"	s	file:
macb_eth_ids	drivers/net/macb.c	/^static const struct udevice_id macb_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
macb_eth_initialize	drivers/net/macb.c	/^int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)$/;"	f	typeref:typename:int
macb_eth_ofdata_to_platdata	drivers/net/macb.c	/^static int macb_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
macb_eth_ops	drivers/net/macb.c	/^static const struct eth_ops macb_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
macb_eth_probe	drivers/net/macb.c	/^static int macb_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
macb_flush_ring_desc	drivers/net/macb.c	/^static inline void macb_flush_ring_desc(struct macb_device *macb, bool rx)$/;"	f	typeref:typename:void	file:
macb_flush_rx_buffer	drivers/net/macb.c	/^static inline void macb_flush_rx_buffer(struct macb_device *macb)$/;"	f	typeref:typename:void	file:
macb_free_pkt	drivers/net/macb.c	/^static int macb_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
macb_halt	drivers/net/macb.c	/^static void macb_halt(struct eth_device *netdev)$/;"	f	typeref:typename:void	file:
macb_hw_init	board/bluewater/snapper9260/snapper9260.c	/^static void macb_hw_init(void)$/;"	f	typeref:typename:void	file:
macb_init	drivers/net/macb.c	/^static int macb_init(struct eth_device *netdev, bd_t *bd)$/;"	f	typeref:typename:int	file:
macb_invalidate_ring_desc	drivers/net/macb.c	/^static inline void macb_invalidate_ring_desc(struct macb_device *macb, bool rx)$/;"	f	typeref:typename:void	file:
macb_invalidate_rx_buffer	drivers/net/macb.c	/^static inline void macb_invalidate_rx_buffer(struct macb_device *macb)$/;"	f	typeref:typename:void	file:
macb_is_gem	drivers/net/macb.c	/^static int macb_is_gem(struct macb_device *macb)$/;"	f	typeref:typename:int	file:
macb_mdc_clk_div	drivers/net/macb.c	/^static u32 macb_mdc_clk_div(int id, struct macb_device *macb)$/;"	f	typeref:typename:u32	file:
macb_mdio_read	drivers/net/macb.c	/^static u16 macb_mdio_read(struct macb_device *macb, u8 reg)$/;"	f	typeref:typename:u16	file:
macb_mdio_write	drivers/net/macb.c	/^static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)$/;"	f	typeref:typename:void	file:
macb_miiphy_read	drivers/net/macb.c	/^int macb_miiphy_read(struct mii_dev *bus, int phy_adr, int devad, int reg)$/;"	f	typeref:typename:int
macb_miiphy_write	drivers/net/macb.c	/^int macb_miiphy_write(struct mii_dev *bus, int phy_adr, int devad, int reg,$/;"	f	typeref:typename:int
macb_phy_find	drivers/net/macb.c	/^static int macb_phy_find(struct macb_device *macb, const char *name)$/;"	f	typeref:typename:int	file:
macb_phy_init	drivers/net/macb.c	/^static int macb_phy_init(struct udevice *dev, const char *name)$/;"	f	typeref:typename:int	file:
macb_phy_reset	drivers/net/macb.c	/^static void macb_phy_reset(struct macb_device *macb, const char *name)$/;"	f	typeref:typename:void	file:
macb_readl	drivers/net/macb.h	/^#define macb_readl(/;"	d
macb_recv	drivers/net/macb.c	/^static int macb_recv(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
macb_recv	drivers/net/macb.c	/^static int macb_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
macb_send	drivers/net/macb.c	/^static int macb_send(struct eth_device *netdev, void *packet, int length)$/;"	f	typeref:typename:int	file:
macb_send	drivers/net/macb.c	/^static int macb_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
macb_start	drivers/net/macb.c	/^static int macb_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
macb_stop	drivers/net/macb.c	/^static void macb_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
macb_write_hwaddr	drivers/net/macb.c	/^static int macb_write_hwaddr(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
macb_write_hwaddr	drivers/net/macb.c	/^static int macb_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
macb_writel	drivers/net/macb.h	/^#define macb_writel(/;"	d
maccfg1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	maccfg1;	\/* MAC Configuration 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
maccfg1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	maccfg1;	\/* 0x24500 - MAC Configuration 1 Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
maccfg1	include/fsl_dtsec.h	/^	u32	maccfg1;	\/* MAC configuration register 1 *\/$/;"	m	struct:dtsec	typeref:typename:u32
maccfg1	include/linux/immap_qe.h	/^	u32 maccfg1;		\/* mac configuration reg. 1            *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
maccfg1	include/tsec.h	/^	u32	maccfg1;	\/* MAC Configuration #1 *\/$/;"	m	struct:tsec	typeref:typename:u32
maccfg2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	maccfg2;	\/* MAC Configuration 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
maccfg2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	maccfg2;	\/* 0x24504 - MAC Configuration 2 Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
maccfg2	include/fsl_dtsec.h	/^	u32	maccfg2;	\/* MAC configuration register 2 *\/$/;"	m	struct:dtsec	typeref:typename:u32
maccfg2	include/linux/immap_qe.h	/^	u32 maccfg2;		\/* mac configuration reg. 2            *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
maccfg2	include/tsec.h	/^	u32	maccfg2;	\/* MAC Configuration #2 *\/$/;"	m	struct:tsec	typeref:typename:u32
macclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 macclk_ctrl;	\/* Ethernet MAC Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
maccr	drivers/net/ftgmac100.h	/^	unsigned int	maccr;		\/* 0x50 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
maccr	drivers/net/ftmac100.h	/^	unsigned int	maccr;		\/* 0x88 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
maccr	drivers/net/ftmac110.c	/^	uint32_t maccr;$/;"	m	struct:ftmac110_chip	typeref:typename:uint32_t	file:
maccr	drivers/net/ftmac110.h	/^	uint32_t maccr;  \/* 0x88: MAC Control Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
mach	arch/sh/include/asm/ptrace.h	/^	unsigned long mach;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
mach	drivers/usb/gadget/pxa25x_udc.h	/^	struct pxa2xx_udc_mach_info		*mach;$/;"	m	struct:pxa25x_udc	typeref:struct:pxa2xx_udc_mach_info *
mach_cpu_init	arch/mips/mach-ath79/cpu.c	/^int mach_cpu_init(void)$/;"	f	typeref:typename:int
mach_cpu_init	common/board_f.c	/^__weak int mach_cpu_init(void)$/;"	f	typeref:typename:__weak int
mach_data	include/vsc9953.h	/^	u32	mach_data;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
mach_info	drivers/usb/gadget/pxa25x_udc.c	/^static struct pxa2xx_udc_mach_info mach_info = {$/;"	v	typeref:struct:pxa2xx_udc_mach_info	file:
machdirs	arch/arm/Makefile	/^machdirs := $(patsubst %,arch\/arm\/mach-%\/,$(machine-y))$/;"	m
machdirs	arch/mips/Makefile	/^machdirs := $(patsubst %,arch\/mips\/mach-%\/,$(machine-y))$/;"	m
machine_arch_type	arch/arm/include/asm/mach-types.h	/^#  define machine_arch_type	/;"	d
machine_arch_type	arch/arm/include/asm/mach-types.h	/^#  define machine_arch_type /;"	d
machine_arch_type	arch/arm/include/asm/mach-types.h	/^#define machine_arch_type	/;"	d
machine_arch_type	arch/nds32/include/asm/mach-types.h	/^#  define machine_arch_type	/;"	d
machine_check_disable	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static inline void machine_check_disable(void)$/;"	f	typeref:typename:void	file:
machine_check_enable	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static inline void machine_check_enable(void)$/;"	f	typeref:typename:void	file:
machine_error	arch/nds32/cpu/n1213/start.S	/^machine_error:$/;"	l
machine_id	board/logicpd/omap3som/omap3logic.c	/^	int machine_id;$/;"	m	struct:board_id	typeref:typename:int	file:
machine_is_a0	arch/arm/include/asm/mach-types.h	/^# define machine_is_a0(/;"	d
machine_is_a2f	arch/arm/include/asm/mach-types.h	/^# define machine_is_a2f(/;"	d
machine_is_aaed2000	arch/arm/include/asm/mach-types.h	/^# define machine_is_aaed2000(/;"	d
machine_is_abacus	arch/arm/include/asm/mach-types.h	/^# define machine_is_abacus(/;"	d
machine_is_abb_gma_1_1	arch/arm/include/asm/mach-types.h	/^# define machine_is_abb_gma_1_1(/;"	d
machine_is_abilene	arch/arm/include/asm/mach-types.h	/^# define machine_is_abilene(/;"	d
machine_is_able	arch/arm/include/asm/mach-types.h	/^# define machine_is_able(/;"	d
machine_is_acer_a5	arch/arm/include/asm/mach-types.h	/^# define machine_is_acer_a5(/;"	d
machine_is_acer_a8	arch/arm/include/asm/mach-types.h	/^# define machine_is_acer_a8(/;"	d
machine_is_acer_gauguin	arch/arm/include/asm/mach-types.h	/^# define machine_is_acer_gauguin(/;"	d
machine_is_acer_maya	arch/arm/include/asm/mach-types.h	/^# define machine_is_acer_maya(/;"	d
machine_is_acmenetusfoxg20	arch/arm/include/asm/mach-types.h	/^# define machine_is_acmenetusfoxg20(/;"	d
machine_is_acmerover1	arch/arm/include/asm/mach-types.h	/^# define machine_is_acmerover1(/;"	d
machine_is_acro37xbrd	arch/arm/include/asm/mach-types.h	/^# define machine_is_acro37xbrd(/;"	d
machine_is_acs5k	arch/arm/include/asm/mach-types.h	/^# define machine_is_acs5k(/;"	d
machine_is_acsx106	arch/arm/include/asm/mach-types.h	/^# define machine_is_acsx106(/;"	d
machine_is_adi_coyote	arch/arm/include/asm/mach-types.h	/^# define machine_is_adi_coyote(/;"	d
machine_is_adpag101p	arch/nds32/include/asm/mach-types.h	/^# define machine_is_adpag101p(/;"	d
machine_is_adsbitsy	arch/arm/include/asm/mach-types.h	/^# define machine_is_adsbitsy(/;"	d
machine_is_adssphere	arch/arm/include/asm/mach-types.h	/^# define machine_is_adssphere(/;"	d
machine_is_aebl	arch/arm/include/asm/mach-types.h	/^# define machine_is_aebl(/;"	d
machine_is_af4000	arch/arm/include/asm/mach-types.h	/^# define machine_is_af4000(/;"	d
machine_is_afeb9260	arch/arm/include/asm/mach-types.h	/^# define machine_is_afeb9260(/;"	d
machine_is_ag11005	arch/arm/include/asm/mach-types.h	/^# define machine_is_ag11005(/;"	d
machine_is_ag5evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_ag5evm(/;"	d
machine_is_akita	arch/arm/include/asm/mach-types.h	/^# define machine_is_akita(/;"	d
machine_is_amk_a4	arch/arm/include/asm/mach-types.h	/^# define machine_is_amk_a4(/;"	d
machine_is_aml_m5900	arch/arm/include/asm/mach-types.h	/^# define machine_is_aml_m5900(/;"	d
machine_is_ams_delta	arch/arm/include/asm/mach-types.h	/^# define machine_is_ams_delta(/;"	d
machine_is_anchovy	arch/arm/include/asm/mach-types.h	/^# define machine_is_anchovy(/;"	d
machine_is_antares	arch/arm/include/asm/mach-types.h	/^# define machine_is_antares(/;"	d
machine_is_antero	arch/arm/include/asm/mach-types.h	/^# define machine_is_antero(/;"	d
machine_is_anubis	arch/arm/include/asm/mach-types.h	/^# define machine_is_anubis(/;"	d
machine_is_anw6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_anw6410(/;"	d
machine_is_ap4evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_ap4evb(/;"	d
machine_is_apalis_t30	arch/arm/include/asm/mach-types.h	/^# define machine_is_apalis_t30(/;"	d
machine_is_app3k_robin	arch/arm/include/asm/mach-types.h	/^# define machine_is_app3k_robin(/;"	d
machine_is_aquarius	arch/arm/include/asm/mach-types.h	/^# define machine_is_aquarius(/;"	d
machine_is_aquila	arch/arm/include/asm/mach-types.h	/^# define machine_is_aquila(/;"	d
machine_is_arcom_vulcan	arch/arm/include/asm/mach-types.h	/^# define machine_is_arcom_vulcan(/;"	d
machine_is_arcom_zeus	arch/arm/include/asm/mach-types.h	/^# define machine_is_arcom_zeus(/;"	d
machine_is_ark9431	arch/arm/include/asm/mach-types.h	/^# define machine_is_ark9431(/;"	d
machine_is_armada_xp_db	arch/arm/include/asm/mach-types.h	/^# define machine_is_armada_xp_db(/;"	d
machine_is_armadillo460	arch/arm/include/asm/mach-types.h	/^# define machine_is_armadillo460(/;"	d
machine_is_armadillo5x0	arch/arm/include/asm/mach-types.h	/^# define machine_is_armadillo5x0(/;"	d
machine_is_armadillo800eva	arch/arm/include/asm/mach-types.h	/^# define machine_is_armadillo800eva(/;"	d
machine_is_armcore	arch/arm/include/asm/mach-types.h	/^# define machine_is_armcore(/;"	d
machine_is_armlex4210	arch/arm/include/asm/mach-types.h	/^# define machine_is_armlex4210(/;"	d
machine_is_armlguest	arch/arm/include/asm/mach-types.h	/^# define machine_is_armlguest(/;"	d
machine_is_arowana	arch/arm/include/asm/mach-types.h	/^# define machine_is_arowana(/;"	d
machine_is_arthur	arch/arm/include/asm/mach-types.h	/^# define machine_is_arthur(/;"	d
machine_is_aruba	arch/arm/include/asm/mach-types.h	/^# define machine_is_aruba(/;"	d
machine_is_as1167	arch/arm/include/asm/mach-types.h	/^# define machine_is_as1167(/;"	d
machine_is_asl_phoenix	arch/arm/include/asm/mach-types.h	/^# define machine_is_asl_phoenix(/;"	d
machine_is_aspen	arch/arm/include/asm/mach-types.h	/^# define machine_is_aspen(/;"	d
machine_is_aspenite	arch/arm/include/asm/mach-types.h	/^# define machine_is_aspenite(/;"	d
machine_is_assabet	arch/arm/include/asm/mach-types.h	/^# define machine_is_assabet(/;"	d
machine_is_ast2200	arch/arm/include/asm/mach-types.h	/^# define machine_is_ast2200(/;"	d
machine_is_at2440evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_at2440evb(/;"	d
machine_is_at572d940hfek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at572d940hfek(/;"	d
machine_is_at91cap7stk	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91cap7stk(/;"	d
machine_is_at91cap7xdk	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91cap7xdk(/;"	d
machine_is_at91cap9adk	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91cap9adk(/;"	d
machine_is_at91eb01	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91eb01(/;"	d
machine_is_at91rm9200dk	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91rm9200dk(/;"	d
machine_is_at91rm9200ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91rm9200ek(/;"	d
machine_is_at91sam9260ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9260ek(/;"	d
machine_is_at91sam9261ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9261ek(/;"	d
machine_is_at91sam9263desk16l	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9263desk16l(/;"	d
machine_is_at91sam9263ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9263ek(/;"	d
machine_is_at91sam9263otlite	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9263otlite(/;"	d
machine_is_at91sam9g10ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9g10ek(/;"	d
machine_is_at91sam9g20ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9g20ek(/;"	d
machine_is_at91sam9g20ek_2mmc	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9g20ek_2mmc(/;"	d
machine_is_at91sam9g45ekes	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9g45ekes(/;"	d
machine_is_at91sam9m10g45ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9m10g45ek(/;"	d
machine_is_at91sam9rlek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9rlek(/;"	d
machine_is_at91sam9x5ek	arch/arm/include/asm/mach-types.h	/^# define machine_is_at91sam9x5ek(/;"	d
machine_is_atdgp318	arch/arm/include/asm/mach-types.h	/^# define machine_is_atdgp318(/;"	d
machine_is_ateb9200	arch/arm/include/asm/mach-types.h	/^# define machine_is_ateb9200(/;"	d
machine_is_athene	arch/arm/include/asm/mach-types.h	/^# define machine_is_athene(/;"	d
machine_is_atlas5_c1	arch/arm/include/asm/mach-types.h	/^# define machine_is_atlas5_c1(/;"	d
machine_is_autcpu12	arch/arm/include/asm/mach-types.h	/^# define machine_is_autcpu12(/;"	d
machine_is_autobot	arch/arm/include/asm/mach-types.h	/^# define machine_is_autobot(/;"	d
machine_is_avengers_lite	arch/arm/include/asm/mach-types.h	/^# define machine_is_avengers_lite(/;"	d
machine_is_avila	arch/arm/include/asm/mach-types.h	/^# define machine_is_avila(/;"	d
machine_is_awm2	arch/arm/include/asm/mach-types.h	/^# define machine_is_awm2(/;"	d
machine_is_ax502	arch/arm/include/asm/mach-types.h	/^# define machine_is_ax502(/;"	d
machine_is_ax8008	arch/arm/include/asm/mach-types.h	/^# define machine_is_ax8008(/;"	d
machine_is_b5500	arch/arm/include/asm/mach-types.h	/^# define machine_is_b5500(/;"	d
machine_is_badge4	arch/arm/include/asm/mach-types.h	/^# define machine_is_badge4(/;"	d
machine_is_basi	arch/arm/include/asm/mach-types.h	/^# define machine_is_basi(/;"	d
machine_is_bast	arch/arm/include/asm/mach-types.h	/^# define machine_is_bast(/;"	d
machine_is_bcm2708	arch/arm/include/asm/mach-types.h	/^# define machine_is_bcm2708(/;"	d
machine_is_bcm589x	arch/arm/include/asm/mach-types.h	/^# define machine_is_bcm589x(/;"	d
machine_is_bcmhana_sv	arch/arm/include/asm/mach-types.h	/^# define machine_is_bcmhana_sv(/;"	d
machine_is_bcmhana_tablet	arch/arm/include/asm/mach-types.h	/^# define machine_is_bcmhana_tablet(/;"	d
machine_is_bcmring	arch/arm/include/asm/mach-types.h	/^# define machine_is_bcmring(/;"	d
machine_is_beect	arch/arm/include/asm/mach-types.h	/^# define machine_is_beect(/;"	d
machine_is_bigdisk	arch/arm/include/asm/mach-types.h	/^# define machine_is_bigdisk(/;"	d
machine_is_bio3k	arch/arm/include/asm/mach-types.h	/^# define machine_is_bio3k(/;"	d
machine_is_bipnet	arch/arm/include/asm/mach-types.h	/^# define machine_is_bipnet(/;"	d
machine_is_bliss	arch/arm/include/asm/mach-types.h	/^# define machine_is_bliss(/;"	d
machine_is_blissc	arch/arm/include/asm/mach-types.h	/^# define machine_is_blissc(/;"	d
machine_is_bluecheese	arch/arm/include/asm/mach-types.h	/^# define machine_is_bluecheese(/;"	d
machine_is_bluepoint	arch/arm/include/asm/mach-types.h	/^# define machine_is_bluepoint(/;"	d
machine_is_blueshark	arch/arm/include/asm/mach-types.h	/^# define machine_is_blueshark(/;"	d
machine_is_bockw	arch/arm/include/asm/mach-types.h	/^# define machine_is_bockw(/;"	d
machine_is_bonaire	arch/arm/include/asm/mach-types.h	/^# define machine_is_bonaire(/;"	d
machine_is_borabora	arch/arm/include/asm/mach-types.h	/^# define machine_is_borabora(/;"	d
machine_is_borzoi	arch/arm/include/asm/mach-types.h	/^# define machine_is_borzoi(/;"	d
machine_is_brownstone	arch/arm/include/asm/mach-types.h	/^# define machine_is_brownstone(/;"	d
machine_is_brutus	arch/arm/include/asm/mach-types.h	/^# define machine_is_brutus(/;"	d
machine_is_bstbrd	arch/arm/include/asm/mach-types.h	/^# define machine_is_bstbrd(/;"	d
machine_is_btmavb101	arch/arm/include/asm/mach-types.h	/^# define machine_is_btmavb101(/;"	d
machine_is_btmawb101	arch/arm/include/asm/mach-types.h	/^# define machine_is_btmawb101(/;"	d
machine_is_bubba3	arch/arm/include/asm/mach-types.h	/^# define machine_is_bubba3(/;"	d
machine_is_bug	arch/arm/include/asm/mach-types.h	/^# define machine_is_bug(/;"	d
machine_is_bug20	arch/arm/include/asm/mach-types.h	/^# define machine_is_bug20(/;"	d
machine_is_bury_bl7582	arch/arm/include/asm/mach-types.h	/^# define machine_is_bury_bl7582(/;"	d
machine_is_bury_bps5270	arch/arm/include/asm/mach-types.h	/^# define machine_is_bury_bps5270(/;"	d
machine_is_bv07	arch/arm/include/asm/mach-types.h	/^# define machine_is_bv07(/;"	d
machine_is_c2mmi	arch/arm/include/asm/mach-types.h	/^# define machine_is_c2mmi(/;"	d
machine_is_callisto	arch/arm/include/asm/mach-types.h	/^# define machine_is_callisto(/;"	d
machine_is_cam60	arch/arm/include/asm/mach-types.h	/^# define machine_is_cam60(/;"	d
machine_is_capc7117	arch/arm/include/asm/mach-types.h	/^# define machine_is_capc7117(/;"	d
machine_is_cardhu	arch/arm/include/asm/mach-types.h	/^# define machine_is_cardhu(/;"	d
machine_is_carmeva	arch/arm/include/asm/mach-types.h	/^# define machine_is_carmeva(/;"	d
machine_is_cats	arch/arm/include/asm/mach-types.h	/^# define machine_is_cats(/;"	d
machine_is_cayenne	arch/arm/include/asm/mach-types.h	/^# define machine_is_cayenne(/;"	d
machine_is_cc9p9360dev	arch/arm/include/asm/mach-types.h	/^# define machine_is_cc9p9360dev(/;"	d
machine_is_cc9p9360js	arch/arm/include/asm/mach-types.h	/^# define machine_is_cc9p9360js(/;"	d
machine_is_ccmx53	arch/arm/include/asm/mach-types.h	/^# define machine_is_ccmx53(/;"	d
machine_is_ccmx53js	arch/arm/include/asm/mach-types.h	/^# define machine_is_ccmx53js(/;"	d
machine_is_ccwmx51mut	arch/arm/include/asm/mach-types.h	/^# define machine_is_ccwmx51mut(/;"	d
machine_is_ccwmx53	arch/arm/include/asm/mach-types.h	/^# define machine_is_ccwmx53(/;"	d
machine_is_ccwmx53js	arch/arm/include/asm/mach-types.h	/^# define machine_is_ccwmx53js(/;"	d
machine_is_cdb89712	arch/arm/include/asm/mach-types.h	/^# define machine_is_cdb89712(/;"	d
machine_is_ceiva	arch/arm/include/asm/mach-types.h	/^# define machine_is_ceiva(/;"	d
machine_is_centro	arch/arm/include/asm/mach-types.h	/^# define machine_is_centro(/;"	d
machine_is_cerf	arch/arm/include/asm/mach-types.h	/^# define machine_is_cerf(/;"	d
machine_is_cetus9263	arch/arm/include/asm/mach-types.h	/^# define machine_is_cetus9263(/;"	d
machine_is_chacha	arch/arm/include/asm/mach-types.h	/^# define machine_is_chacha(/;"	d
machine_is_chalten_xa1	arch/arm/include/asm/mach-types.h	/^# define machine_is_chalten_xa1(/;"	d
machine_is_charon	arch/arm/include/asm/mach-types.h	/^# define machine_is_charon(/;"	d
machine_is_cintegrator	arch/arm/include/asm/mach-types.h	/^# define machine_is_cintegrator(/;"	d
machine_is_clep7212	arch/arm/include/asm/mach-types.h	/^# define machine_is_clep7212(/;"	d
machine_is_clod	arch/arm/include/asm/mach-types.h	/^# define machine_is_clod(/;"	d
machine_is_cm4745	arch/arm/include/asm/mach-types.h	/^# define machine_is_cm4745(/;"	d
machine_is_cm_a510	arch/arm/include/asm/mach-types.h	/^# define machine_is_cm_a510(/;"	d
machine_is_cm_t35	arch/arm/include/asm/mach-types.h	/^# define machine_is_cm_t35(/;"	d
machine_is_cm_t3517	arch/arm/include/asm/mach-types.h	/^# define machine_is_cm_t3517(/;"	d
machine_is_cm_t3730	arch/arm/include/asm/mach-types.h	/^# define machine_is_cm_t3730(/;"	d
machine_is_cm_x300	arch/arm/include/asm/mach-types.h	/^# define machine_is_cm_x300(/;"	d
machine_is_cns2133evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_cns2133evb(/;"	d
machine_is_cns21xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_cns21xx(/;"	d
machine_is_cns3420vb	arch/arm/include/asm/mach-types.h	/^# define machine_is_cns3420vb(/;"	d
machine_is_cobral138	arch/arm/include/asm/mach-types.h	/^# define machine_is_cobral138(/;"	d
machine_is_coconut	arch/arm/include/asm/mach-types.h	/^# define machine_is_coconut(/;"	d
machine_is_colibri	arch/arm/include/asm/mach-types.h	/^# define machine_is_colibri(/;"	d
machine_is_colibri300	arch/arm/include/asm/mach-types.h	/^# define machine_is_colibri300(/;"	d
machine_is_colibri320	arch/arm/include/asm/mach-types.h	/^# define machine_is_colibri320(/;"	d
machine_is_colibri_t20	arch/arm/include/asm/mach-types.h	/^# define machine_is_colibri_t20(/;"	d
machine_is_colibri_t30	arch/arm/include/asm/mach-types.h	/^# define machine_is_colibri_t30(/;"	d
machine_is_collie	arch/arm/include/asm/mach-types.h	/^# define machine_is_collie(/;"	d
machine_is_consus	arch/arm/include/asm/mach-types.h	/^# define machine_is_consus(/;"	d
machine_is_controltek9g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_controltek9g20(/;"	d
machine_is_coretec_vcx7400	arch/arm/include/asm/mach-types.h	/^# define machine_is_coretec_vcx7400(/;"	d
machine_is_corgi	arch/arm/include/asm/mach-types.h	/^# define machine_is_corgi(/;"	d
machine_is_cpuat9g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_cpuat9g20(/;"	d
machine_is_cpx2	arch/arm/include/asm/mach-types.h	/^# define machine_is_cpx2(/;"	d
machine_is_craneboard	arch/arm/include/asm/mach-types.h	/^# define machine_is_craneboard(/;"	d
machine_is_crux	arch/arm/include/asm/mach-types.h	/^# define machine_is_crux(/;"	d
machine_is_csb337	arch/arm/include/asm/mach-types.h	/^# define machine_is_csb337(/;"	d
machine_is_csb637	arch/arm/include/asm/mach-types.h	/^# define machine_is_csb637(/;"	d
machine_is_csb726	arch/arm/include/asm/mach-types.h	/^# define machine_is_csb726(/;"	d
machine_is_csc	arch/arm/include/asm/mach-types.h	/^# define machine_is_csc(/;"	d
machine_is_ctbu_gen2	arch/arm/include/asm/mach-types.h	/^# define machine_is_ctbu_gen2(/;"	d
machine_is_ctera_plug_c2	arch/arm/include/asm/mach-types.h	/^# define machine_is_ctera_plug_c2(/;"	d
machine_is_curacao	arch/arm/include/asm/mach-types.h	/^# define machine_is_curacao(/;"	d
machine_is_cv2201	arch/arm/include/asm/mach-types.h	/^# define machine_is_cv2201(/;"	d
machine_is_cv2202	arch/arm/include/asm/mach-types.h	/^# define machine_is_cv2202(/;"	d
machine_is_cv2203	arch/arm/include/asm/mach-types.h	/^# define machine_is_cv2203(/;"	d
machine_is_cwam1808	arch/arm/include/asm/mach-types.h	/^# define machine_is_cwam1808(/;"	d
machine_is_cwdm365	arch/arm/include/asm/mach-types.h	/^# define machine_is_cwdm365(/;"	d
machine_is_cwme9210	arch/arm/include/asm/mach-types.h	/^# define machine_is_cwme9210(/;"	d
machine_is_cwme9210js	arch/arm/include/asm/mach-types.h	/^# define machine_is_cwme9210js(/;"	d
machine_is_cwmx233	arch/arm/include/asm/mach-types.h	/^# define machine_is_cwmx233(/;"	d
machine_is_d2net	arch/arm/include/asm/mach-types.h	/^# define machine_is_d2net(/;"	d
machine_is_d2net_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_d2net_v2(/;"	d
machine_is_d2plug	arch/arm/include/asm/mach-types.h	/^# define machine_is_d2plug(/;"	d
machine_is_da850_k5	arch/arm/include/asm/mach-types.h	/^# define machine_is_da850_k5(/;"	d
machine_is_daintree_cwac	arch/arm/include/asm/mach-types.h	/^# define machine_is_daintree_cwac(/;"	d
machine_is_dataway	arch/arm/include/asm/mach-types.h	/^# define machine_is_dataway(/;"	d
machine_is_davinci_da830_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_da830_evm(/;"	d
machine_is_davinci_da850_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_da850_evm(/;"	d
machine_is_davinci_dm355_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm355_evm(/;"	d
machine_is_davinci_dm355_mmm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm355_mmm(/;"	d
machine_is_davinci_dm365_bv	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm365_bv(/;"	d
machine_is_davinci_dm365_dvr	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm365_dvr(/;"	d
machine_is_davinci_dm365_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm365_evm(/;"	d
machine_is_davinci_dm6467_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm6467_evm(/;"	d
machine_is_davinci_dm6467tevm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_dm6467tevm(/;"	d
machine_is_davinci_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_evm(/;"	d
machine_is_davinci_picto	arch/arm/include/asm/mach-types.h	/^# define machine_is_davinci_picto(/;"	d
machine_is_dawad7	arch/arm/include/asm/mach-types.h	/^# define machine_is_dawad7(/;"	d
machine_is_db78x00_bp	arch/arm/include/asm/mach-types.h	/^# define machine_is_db78x00_bp(/;"	d
machine_is_db88f5281	arch/arm/include/asm/mach-types.h	/^# define machine_is_db88f5281(/;"	d
machine_is_db88f6281_bp	arch/arm/include/asm/mach-types.h	/^# define machine_is_db88f6281_bp(/;"	d
machine_is_ddnas	arch/arm/include/asm/mach-types.h	/^# define machine_is_ddnas(/;"	d
machine_is_ddplug	arch/arm/include/asm/mach-types.h	/^# define machine_is_ddplug(/;"	d
machine_is_dds	arch/arm/include/asm/mach-types.h	/^# define machine_is_dds(/;"	d
machine_is_deep_r_ek_1	arch/arm/include/asm/mach-types.h	/^# define machine_is_deep_r_ek_1(/;"	d
machine_is_devixp	arch/arm/include/asm/mach-types.h	/^# define machine_is_devixp(/;"	d
machine_is_devkit8000	arch/arm/include/asm/mach-types.h	/^# define machine_is_devkit8000(/;"	d
machine_is_dgm3240	arch/arm/include/asm/mach-types.h	/^# define machine_is_dgm3240(/;"	d
machine_is_dimm_imx28	arch/arm/include/asm/mach-types.h	/^# define machine_is_dimm_imx28(/;"	d
machine_is_dimm_mx257	arch/arm/include/asm/mach-types.h	/^# define machine_is_dimm_mx257(/;"	d
machine_is_dimmsam9g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_dimmsam9g20(/;"	d
machine_is_dingo	arch/arm/include/asm/mach-types.h	/^# define machine_is_dingo(/;"	d
machine_is_dir665	arch/arm/include/asm/mach-types.h	/^# define machine_is_dir665(/;"	d
machine_is_dm355_leopard	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm355_leopard(/;"	d
machine_is_dm365_cv100	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm365_cv100(/;"	d
machine_is_dm368_leopard	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm368_leopard(/;"	d
machine_is_dm3730_som_lv	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm3730_som_lv(/;"	d
machine_is_dm3730_torpedo	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm3730_torpedo(/;"	d
machine_is_dm6441_esp	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm6441_esp(/;"	d
machine_is_dm6446_adbox	arch/arm/include/asm/mach-types.h	/^# define machine_is_dm6446_adbox(/;"	d
machine_is_dma_6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_dma_6410(/;"	d
machine_is_dma_thunderbug	arch/arm/include/asm/mach-types.h	/^# define machine_is_dma_thunderbug(/;"	d
machine_is_dmw96	arch/arm/include/asm/mach-types.h	/^# define machine_is_dmw96(/;"	d
machine_is_dns323	arch/arm/include/asm/mach-types.h	/^# define machine_is_dns323(/;"	d
machine_is_dockstar	arch/arm/include/asm/mach-types.h	/^# define machine_is_dockstar(/;"	d
machine_is_doorboy	arch/arm/include/asm/mach-types.h	/^# define machine_is_doorboy(/;"	d
machine_is_doubleshot	arch/arm/include/asm/mach-types.h	/^# define machine_is_doubleshot(/;"	d
machine_is_dove_avng_v3	arch/arm/include/asm/mach-types.h	/^# define machine_is_dove_avng_v3(/;"	d
machine_is_dove_db	arch/arm/include/asm/mach-types.h	/^# define machine_is_dove_db(/;"	d
machine_is_dp6xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_dp6xx(/;"	d
machine_is_dragonet	arch/arm/include/asm/mach-types.h	/^# define machine_is_dragonet(/;"	d
machine_is_dsm320	arch/arm/include/asm/mach-types.h	/^# define machine_is_dsm320(/;"	d
machine_is_dsmg600	arch/arm/include/asm/mach-types.h	/^# define machine_is_dsmg600(/;"	d
machine_is_durian	arch/arm/include/asm/mach-types.h	/^# define machine_is_durian(/;"	d
machine_is_dynasty	arch/arm/include/asm/mach-types.h	/^# define machine_is_dynasty(/;"	d
machine_is_e10	arch/arm/include/asm/mach-types.h	/^# define machine_is_e10(/;"	d
machine_is_e330	arch/arm/include/asm/mach-types.h	/^# define machine_is_e330(/;"	d
machine_is_e350	arch/arm/include/asm/mach-types.h	/^# define machine_is_e350(/;"	d
machine_is_e400	arch/arm/include/asm/mach-types.h	/^# define machine_is_e400(/;"	d
machine_is_e740	arch/arm/include/asm/mach-types.h	/^# define machine_is_e740(/;"	d
machine_is_e750	arch/arm/include/asm/mach-types.h	/^# define machine_is_e750(/;"	d
machine_is_e800	arch/arm/include/asm/mach-types.h	/^# define machine_is_e800(/;"	d
machine_is_ea20	arch/arm/include/asm/mach-types.h	/^# define machine_is_ea20(/;"	d
machine_is_ea2478devkit	arch/arm/include/asm/mach-types.h	/^# define machine_is_ea2478devkit(/;"	d
machine_is_eag_ci4000	arch/arm/include/asm/mach-types.h	/^# define machine_is_eag_ci4000(/;"	d
machine_is_easycrrh	arch/arm/include/asm/mach-types.h	/^# define machine_is_easycrrh(/;"	d
machine_is_ebsa110	arch/arm/include/asm/mach-types.h	/^# define machine_is_ebsa110(/;"	d
machine_is_ebsa285	arch/arm/include/asm/mach-types.h	/^# define machine_is_ebsa285(/;"	d
machine_is_ec4350sdb	arch/arm/include/asm/mach-types.h	/^# define machine_is_ec4350sdb(/;"	d
machine_is_ec4350tbm	arch/arm/include/asm/mach-types.h	/^# define machine_is_ec4350tbm(/;"	d
machine_is_ecbat91	arch/arm/include/asm/mach-types.h	/^# define machine_is_ecbat91(/;"	d
machine_is_eco920	arch/arm/include/asm/mach-types.h	/^# define machine_is_eco920(/;"	d
machine_is_ecuv5	arch/arm/include/asm/mach-types.h	/^# define machine_is_ecuv5(/;"	d
machine_is_edb7211	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb7211(/;"	d
machine_is_edb9301	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9301(/;"	d
machine_is_edb9302	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9302(/;"	d
machine_is_edb9302a	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9302a(/;"	d
machine_is_edb9307	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9307(/;"	d
machine_is_edb9307a	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9307a(/;"	d
machine_is_edb9312	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9312(/;"	d
machine_is_edb9315	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9315(/;"	d
machine_is_edb9315a	arch/arm/include/asm/mach-types.h	/^# define machine_is_edb9315a(/;"	d
machine_is_edison	arch/arm/include/asm/mach-types.h	/^# define machine_is_edison(/;"	d
machine_is_edmini_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_edmini_v2(/;"	d
machine_is_eelx2	arch/arm/include/asm/mach-types.h	/^# define machine_is_eelx2(/;"	d
machine_is_eigen_ttr	arch/arm/include/asm/mach-types.h	/^# define machine_is_eigen_ttr(/;"	d
machine_is_elephant	arch/arm/include/asm/mach-types.h	/^# define machine_is_elephant(/;"	d
machine_is_elke	arch/arm/include/asm/mach-types.h	/^# define machine_is_elke(/;"	d
machine_is_elog	arch/arm/include/asm/mach-types.h	/^# define machine_is_elog(/;"	d
machine_is_em1sy	arch/arm/include/asm/mach-types.h	/^# define machine_is_em1sy(/;"	d
machine_is_em7210	arch/arm/include/asm/mach-types.h	/^# define machine_is_em7210(/;"	d
machine_is_em_x270	arch/arm/include/asm/mach-types.h	/^# define machine_is_em_x270(/;"	d
machine_is_emerald	arch/arm/include/asm/mach-types.h	/^# define machine_is_emerald(/;"	d
machine_is_encore	arch/arm/include/asm/mach-types.h	/^# define machine_is_encore(/;"	d
machine_is_endian_mini	arch/arm/include/asm/mach-types.h	/^# define machine_is_endian_mini(/;"	d
machine_is_enp2611	arch/arm/include/asm/mach-types.h	/^# define machine_is_enp2611(/;"	d
machine_is_ep80219	arch/arm/include/asm/mach-types.h	/^# define machine_is_ep80219(/;"	d
machine_is_epc10	arch/arm/include/asm/mach-types.h	/^# define machine_is_epc10(/;"	d
machine_is_epiphan	arch/arm/include/asm/mach-types.h	/^# define machine_is_epiphan(/;"	d
machine_is_es2440	arch/arm/include/asm/mach-types.h	/^# define machine_is_es2440(/;"	d
machine_is_esl_mobilis_a	arch/arm/include/asm/mach-types.h	/^# define machine_is_esl_mobilis_a(/;"	d
machine_is_esl_mobilis_b	arch/arm/include/asm/mach-types.h	/^# define machine_is_esl_mobilis_b(/;"	d
machine_is_esl_wave_a	arch/arm/include/asm/mach-types.h	/^# define machine_is_esl_wave_a(/;"	d
machine_is_esl_wave_b	arch/arm/include/asm/mach-types.h	/^# define machine_is_esl_wave_b(/;"	d
machine_is_espresso	arch/arm/include/asm/mach-types.h	/^# define machine_is_espresso(/;"	d
machine_is_etherpro_isp	arch/arm/include/asm/mach-types.h	/^# define machine_is_etherpro_isp(/;"	d
machine_is_etna	arch/arm/include/asm/mach-types.h	/^# define machine_is_etna(/;"	d
machine_is_eukrea_cpuimx25sd	arch/arm/include/asm/mach-types.h	/^# define machine_is_eukrea_cpuimx25sd(/;"	d
machine_is_eukrea_cpuimx35sd	arch/arm/include/asm/mach-types.h	/^# define machine_is_eukrea_cpuimx35sd(/;"	d
machine_is_eukrea_cpuimx51	arch/arm/include/asm/mach-types.h	/^# define machine_is_eukrea_cpuimx51(/;"	d
machine_is_eukrea_cpuimx51sd	arch/arm/include/asm/mach-types.h	/^# define machine_is_eukrea_cpuimx51sd(/;"	d
machine_is_eva2000	arch/arm/include/asm/mach-types.h	/^# define machine_is_eva2000(/;"	d
machine_is_evsy	arch/arm/include/asm/mach-types.h	/^# define machine_is_evsy(/;"	d
machine_is_exeda	arch/arm/include/asm/mach-types.h	/^# define machine_is_exeda(/;"	d
machine_is_express	arch/arm/include/asm/mach-types.h	/^# define machine_is_express(/;"	d
machine_is_express_kt	arch/arm/include/asm/mach-types.h	/^# define machine_is_express_kt(/;"	d
machine_is_expressct	arch/arm/include/asm/mach-types.h	/^# define machine_is_expressct(/;"	d
machine_is_expressh	arch/arm/include/asm/mach-types.h	/^# define machine_is_expressh(/;"	d
machine_is_ezx_a1200	arch/arm/include/asm/mach-types.h	/^# define machine_is_ezx_a1200(/;"	d
machine_is_ezx_a780	arch/arm/include/asm/mach-types.h	/^# define machine_is_ezx_a780(/;"	d
machine_is_ezx_a910	arch/arm/include/asm/mach-types.h	/^# define machine_is_ezx_a910(/;"	d
machine_is_ezx_e2	arch/arm/include/asm/mach-types.h	/^# define machine_is_ezx_e2(/;"	d
machine_is_ezx_e6	arch/arm/include/asm/mach-types.h	/^# define machine_is_ezx_e6(/;"	d
machine_is_ezx_e680	arch/arm/include/asm/mach-types.h	/^# define machine_is_ezx_e680(/;"	d
machine_is_fa9x27	arch/arm/include/asm/mach-types.h	/^# define machine_is_fa9x27(/;"	d
machine_is_ffcore	arch/arm/include/asm/mach-types.h	/^# define machine_is_ffcore(/;"	d
machine_is_flexanet	arch/arm/include/asm/mach-types.h	/^# define machine_is_flexanet(/;"	d
machine_is_flexibity	arch/arm/include/asm/mach-types.h	/^# define machine_is_flexibity(/;"	d
machine_is_flint	arch/arm/include/asm/mach-types.h	/^# define machine_is_flint(/;"	d
machine_is_flyer	arch/arm/include/asm/mach-types.h	/^# define machine_is_flyer(/;"	d
machine_is_fortunet	arch/arm/include/asm/mach-types.h	/^# define machine_is_fortunet(/;"	d
machine_is_frisms	arch/arm/include/asm/mach-types.h	/^# define machine_is_frisms(/;"	d
machine_is_frrhwcdma60w	arch/arm/include/asm/mach-types.h	/^# define machine_is_frrhwcdma60w(/;"	d
machine_is_fs_s5pc100	arch/arm/include/asm/mach-types.h	/^# define machine_is_fs_s5pc100(/;"	d
machine_is_fsg	arch/arm/include/asm/mach-types.h	/^# define machine_is_fsg(/;"	d
machine_is_fsm9xxx_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_fsm9xxx_ffa(/;"	d
machine_is_fsm9xxx_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_fsm9xxx_surf(/;"	d
machine_is_fuji	arch/arm/include/asm/mach-types.h	/^# define machine_is_fuji(/;"	d
machine_is_fwbd_0404	arch/arm/include/asm/mach-types.h	/^# define machine_is_fwbd_0404(/;"	d
machine_is_g3evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_g3evm(/;"	d
machine_is_g4evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_g4evm(/;"	d
machine_is_gateway7001	arch/arm/include/asm/mach-types.h	/^# define machine_is_gateway7001(/;"	d
machine_is_geneva_b5	arch/arm/include/asm/mach-types.h	/^# define machine_is_geneva_b5(/;"	d
machine_is_gesbc9312	arch/arm/include/asm/mach-types.h	/^# define machine_is_gesbc9312(/;"	d
machine_is_gfs_spm	arch/arm/include/asm/mach-types.h	/^# define machine_is_gfs_spm(/;"	d
machine_is_ginger	arch/arm/include/asm/mach-types.h	/^# define machine_is_ginger(/;"	d
machine_is_gira_knxip_router	arch/arm/include/asm/mach-types.h	/^# define machine_is_gira_knxip_router(/;"	d
machine_is_glantank	arch/arm/include/asm/mach-types.h	/^# define machine_is_glantank(/;"	d
machine_is_gnet_sgce	arch/arm/include/asm/mach-types.h	/^# define machine_is_gnet_sgce(/;"	d
machine_is_gnet_sgme	arch/arm/include/asm/mach-types.h	/^# define machine_is_gnet_sgme(/;"	d
machine_is_gnet_slc	arch/arm/include/asm/mach-types.h	/^# define machine_is_gnet_slc(/;"	d
machine_is_goflexhome	arch/arm/include/asm/mach-types.h	/^# define machine_is_goflexhome(/;"	d
machine_is_goflexnet	arch/arm/include/asm/mach-types.h	/^# define machine_is_goflexnet(/;"	d
machine_is_goldengate	arch/arm/include/asm/mach-types.h	/^# define machine_is_goldengate(/;"	d
machine_is_goni	arch/arm/include/asm/mach-types.h	/^# define machine_is_goni(/;"	d
machine_is_goramo_mlr	arch/arm/include/asm/mach-types.h	/^# define machine_is_goramo_mlr(/;"	d
machine_is_gpsdisplay	arch/arm/include/asm/mach-types.h	/^# define machine_is_gpsdisplay(/;"	d
machine_is_graphicsclient	arch/arm/include/asm/mach-types.h	/^# define machine_is_graphicsclient(/;"	d
machine_is_graphicsmaster	arch/arm/include/asm/mach-types.h	/^# define machine_is_graphicsmaster(/;"	d
machine_is_greeco	arch/arm/include/asm/mach-types.h	/^# define machine_is_greeco(/;"	d
machine_is_gsia18s	arch/arm/include/asm/mach-types.h	/^# define machine_is_gsia18s(/;"	d
machine_is_gsl_diamond	arch/arm/include/asm/mach-types.h	/^# define machine_is_gsl_diamond(/;"	d
machine_is_gsncomm	arch/arm/include/asm/mach-types.h	/^# define machine_is_gsncomm(/;"	d
machine_is_gt_i5700	arch/arm/include/asm/mach-types.h	/^# define machine_is_gt_i5700(/;"	d
machine_is_gta04	arch/arm/include/asm/mach-types.h	/^# define machine_is_gta04(/;"	d
machine_is_gtib	arch/arm/include/asm/mach-types.h	/^# define machine_is_gtib(/;"	d
machine_is_gtl_it5100	arch/arm/include/asm/mach-types.h	/^# define machine_is_gtl_it5100(/;"	d
machine_is_gtwx5715	arch/arm/include/asm/mach-types.h	/^# define machine_is_gtwx5715(/;"	d
machine_is_gumstix	arch/arm/include/asm/mach-types.h	/^# define machine_is_gumstix(/;"	d
machine_is_guppy	arch/arm/include/asm/mach-types.h	/^# define machine_is_guppy(/;"	d
machine_is_gurnard	arch/arm/include/asm/mach-types.h	/^# define machine_is_gurnard(/;"	d
machine_is_guruplug	arch/arm/include/asm/mach-types.h	/^# define machine_is_guruplug(/;"	d
machine_is_gw2361	arch/arm/include/asm/mach-types.h	/^# define machine_is_gw2361(/;"	d
machine_is_h1600	arch/arm/include/asm/mach-types.h	/^# define machine_is_h1600(/;"	d
machine_is_h1940	arch/arm/include/asm/mach-types.h	/^# define machine_is_h1940(/;"	d
machine_is_h3100	arch/arm/include/asm/mach-types.h	/^# define machine_is_h3100(/;"	d
machine_is_h3600	arch/arm/include/asm/mach-types.h	/^# define machine_is_h3600(/;"	d
machine_is_h4700	arch/arm/include/asm/mach-types.h	/^# define machine_is_h4700(/;"	d
machine_is_h5400	arch/arm/include/asm/mach-types.h	/^# define machine_is_h5400(/;"	d
machine_is_h7201	arch/arm/include/asm/mach-types.h	/^# define machine_is_h7201(/;"	d
machine_is_h7202	arch/arm/include/asm/mach-types.h	/^# define machine_is_h7202(/;"	d
machine_is_haba_knx_explorer	arch/arm/include/asm/mach-types.h	/^# define machine_is_haba_knx_explorer(/;"	d
machine_is_hackkit	arch/arm/include/asm/mach-types.h	/^# define machine_is_hackkit(/;"	d
machine_is_halibut	arch/arm/include/asm/mach-types.h	/^# define machine_is_halibut(/;"	d
machine_is_hammerhead	arch/arm/include/asm/mach-types.h	/^# define machine_is_hammerhead(/;"	d
machine_is_harmony	arch/arm/include/asm/mach-types.h	/^# define machine_is_harmony(/;"	d
machine_is_harvest_desoto	arch/arm/include/asm/mach-types.h	/^# define machine_is_harvest_desoto(/;"	d
machine_is_hawks	arch/arm/include/asm/mach-types.h	/^# define machine_is_hawks(/;"	d
machine_is_hdgu	arch/arm/include/asm/mach-types.h	/^# define machine_is_hdgu(/;"	d
machine_is_hdmini	arch/arm/include/asm/mach-types.h	/^# define machine_is_hdmini(/;"	d
machine_is_hdnvp	arch/arm/include/asm/mach-types.h	/^# define machine_is_hdnvp(/;"	d
machine_is_helios_v1	arch/arm/include/asm/mach-types.h	/^# define machine_is_helios_v1(/;"	d
machine_is_helios_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_helios_v2(/;"	d
machine_is_herald	arch/arm/include/asm/mach-types.h	/^# define machine_is_herald(/;"	d
machine_is_herring	arch/arm/include/asm/mach-types.h	/^# define machine_is_herring(/;"	d
machine_is_himalaya	arch/arm/include/asm/mach-types.h	/^# define machine_is_himalaya(/;"	d
machine_is_hjsdu	arch/arm/include/asm/mach-types.h	/^# define machine_is_hjsdu(/;"	d
machine_is_hkdkc100	arch/arm/include/asm/mach-types.h	/^# define machine_is_hkdkc100(/;"	d
machine_is_hmt	arch/arm/include/asm/mach-types.h	/^# define machine_is_hmt(/;"	d
machine_is_holiday	arch/arm/include/asm/mach-types.h	/^# define machine_is_holiday(/;"	d
machine_is_hrefv60	arch/arm/include/asm/mach-types.h	/^# define machine_is_hrefv60(/;"	d
machine_is_hsgx6d	arch/arm/include/asm/mach-types.h	/^# define machine_is_hsgx6d(/;"	d
machine_is_htc_hd_mini	arch/arm/include/asm/mach-types.h	/^# define machine_is_htc_hd_mini(/;"	d
machine_is_htc_spv_m700	arch/arm/include/asm/mach-types.h	/^# define machine_is_htc_spv_m700(/;"	d
machine_is_htcmega	arch/arm/include/asm/mach-types.h	/^# define machine_is_htcmega(/;"	d
machine_is_htctornado	arch/arm/include/asm/mach-types.h	/^# define machine_is_htctornado(/;"	d
machine_is_huashan	arch/arm/include/asm/mach-types.h	/^# define machine_is_huashan(/;"	d
machine_is_husky	arch/arm/include/asm/mach-types.h	/^# define machine_is_husky(/;"	d
machine_is_hwgw6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_hwgw6410(/;"	d
machine_is_iam28	arch/arm/include/asm/mach-types.h	/^# define machine_is_iam28(/;"	d
machine_is_icon	arch/arm/include/asm/mach-types.h	/^# define machine_is_icon(/;"	d
machine_is_icon_g	arch/arm/include/asm/mach-types.h	/^# define machine_is_icon_g(/;"	d
machine_is_icong	arch/arm/include/asm/mach-types.h	/^# define machine_is_icong(/;"	d
machine_is_iconnect	arch/arm/include/asm/mach-types.h	/^# define machine_is_iconnect(/;"	d
machine_is_icontrol	arch/arm/include/asm/mach-types.h	/^# define machine_is_icontrol(/;"	d
machine_is_ics_if_voip	arch/arm/include/asm/mach-types.h	/^# define machine_is_ics_if_voip(/;"	d
machine_is_idea6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_idea6410(/;"	d
machine_is_igep0020	arch/arm/include/asm/mach-types.h	/^# define machine_is_igep0020(/;"	d
machine_is_igep0030	arch/arm/include/asm/mach-types.h	/^# define machine_is_igep0030(/;"	d
machine_is_igep0032	arch/arm/include/asm/mach-types.h	/^# define machine_is_igep0032(/;"	d
machine_is_ij3k_2440	arch/arm/include/asm/mach-types.h	/^# define machine_is_ij3k_2440(/;"	d
machine_is_imate8502	arch/arm/include/asm/mach-types.h	/^# define machine_is_imate8502(/;"	d
machine_is_imx27_visstrim_m10	arch/arm/include/asm/mach-types.h	/^# define machine_is_imx27_visstrim_m10(/;"	d
machine_is_imx27ipcam	arch/arm/include/asm/mach-types.h	/^# define machine_is_imx27ipcam(/;"	d
machine_is_imx27lite	arch/arm/include/asm/mach-types.h	/^# define machine_is_imx27lite(/;"	d
machine_is_income	arch/arm/include/asm/mach-types.h	/^# define machine_is_income(/;"	d
machine_is_inetspace_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_inetspace_v2(/;"	d
machine_is_inhand_apeiron	arch/arm/include/asm/mach-types.h	/^# define machine_is_inhand_apeiron(/;"	d
machine_is_inhand_fury	arch/arm/include/asm/mach-types.h	/^# define machine_is_inhand_fury(/;"	d
machine_is_inhand_siren	arch/arm/include/asm/mach-types.h	/^# define machine_is_inhand_siren(/;"	d
machine_is_integrator	arch/arm/include/asm/mach-types.h	/^# define machine_is_integrator(/;"	d
machine_is_intelmote2	arch/arm/include/asm/mach-types.h	/^# define machine_is_intelmote2(/;"	d
machine_is_iomega_ix2_200	arch/arm/include/asm/mach-types.h	/^# define machine_is_iomega_ix2_200(/;"	d
machine_is_iq31244	arch/arm/include/asm/mach-types.h	/^# define machine_is_iq31244(/;"	d
machine_is_iq80321	arch/arm/include/asm/mach-types.h	/^# define machine_is_iq80321(/;"	d
machine_is_iq80331	arch/arm/include/asm/mach-types.h	/^# define machine_is_iq80331(/;"	d
machine_is_iq80332	arch/arm/include/asm/mach-types.h	/^# define machine_is_iq80332(/;"	d
machine_is_iq81340mc	arch/arm/include/asm/mach-types.h	/^# define machine_is_iq81340mc(/;"	d
machine_is_iq81340sc	arch/arm/include/asm/mach-types.h	/^# define machine_is_iq81340sc(/;"	d
machine_is_isc3	arch/arm/include/asm/mach-types.h	/^# define machine_is_isc3(/;"	d
machine_is_ixcdp1100	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixcdp1100(/;"	d
machine_is_ixdp2351	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp2351(/;"	d
machine_is_ixdp2400	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp2400(/;"	d
machine_is_ixdp2401	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp2401(/;"	d
machine_is_ixdp2800	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp2800(/;"	d
machine_is_ixdp2801	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp2801(/;"	d
machine_is_ixdp28x5	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp28x5(/;"	d
machine_is_ixdp425	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp425(/;"	d
machine_is_ixdp465	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdp465(/;"	d
machine_is_ixdpg425	arch/arm/include/asm/mach-types.h	/^# define machine_is_ixdpg425(/;"	d
machine_is_janus	arch/arm/include/asm/mach-types.h	/^# define machine_is_janus(/;"	d
machine_is_jigen301	arch/arm/include/asm/mach-types.h	/^# define machine_is_jigen301(/;"	d
machine_is_jive	arch/arm/include/asm/mach-types.h	/^# define machine_is_jive(/;"	d
machine_is_jocpu550	arch/arm/include/asm/mach-types.h	/^# define machine_is_jocpu550(/;"	d
machine_is_jornada720	arch/arm/include/asm/mach-types.h	/^# define machine_is_jornada720(/;"	d
machine_is_kaen	arch/arm/include/asm/mach-types.h	/^# define machine_is_kaen(/;"	d
machine_is_kafa	arch/arm/include/asm/mach-types.h	/^# define machine_is_kafa(/;"	d
machine_is_kb9200	arch/arm/include/asm/mach-types.h	/^# define machine_is_kb9200(/;"	d
machine_is_kev7a400	arch/arm/include/asm/mach-types.h	/^# define machine_is_kev7a400(/;"	d
machine_is_kingdom	arch/arm/include/asm/mach-types.h	/^# define machine_is_kingdom(/;"	d
machine_is_kixrp435	arch/arm/include/asm/mach-types.h	/^# define machine_is_kixrp435(/;"	d
machine_is_kmm2m01	arch/arm/include/asm/mach-types.h	/^# define machine_is_kmm2m01(/;"	d
machine_is_kmp_am17_01	arch/arm/include/asm/mach-types.h	/^# define machine_is_kmp_am17_01(/;"	d
machine_is_koi	arch/arm/include/asm/mach-types.h	/^# define machine_is_koi(/;"	d
machine_is_kronos	arch/arm/include/asm/mach-types.h	/^# define machine_is_kronos(/;"	d
machine_is_ks8695	arch/arm/include/asm/mach-types.h	/^# define machine_is_ks8695(/;"	d
machine_is_kt_sbc_sam9_1	arch/arm/include/asm/mach-types.h	/^# define machine_is_kt_sbc_sam9_1(/;"	d
machine_is_kurobox_pro	arch/arm/include/asm/mach-types.h	/^# define machine_is_kurobox_pro(/;"	d
machine_is_kx33xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_kx33xx(/;"	d
machine_is_kzm9d	arch/arm/include/asm/mach-types.h	/^# define machine_is_kzm9d(/;"	d
machine_is_kzm9g	arch/arm/include/asm/mach-types.h	/^# define machine_is_kzm9g(/;"	d
machine_is_kzm_arm11_01	arch/arm/include/asm/mach-types.h	/^# define machine_is_kzm_arm11_01(/;"	d
machine_is_l7200	arch/arm/include/asm/mach-types.h	/^# define machine_is_l7200(/;"	d
machine_is_lanreadyfn511	arch/arm/include/asm/mach-types.h	/^# define machine_is_lanreadyfn511(/;"	d
machine_is_lart	arch/arm/include/asm/mach-types.h	/^# define machine_is_lart(/;"	d
machine_is_lausanne	arch/arm/include/asm/mach-types.h	/^# define machine_is_lausanne(/;"	d
machine_is_lb88rc8480	arch/arm/include/asm/mach-types.h	/^# define machine_is_lb88rc8480(/;"	d
machine_is_lead	arch/arm/include/asm/mach-types.h	/^# define machine_is_lead(/;"	d
machine_is_legacy	arch/arm/include/asm/mach-types.h	/^# define machine_is_legacy(/;"	d
machine_is_lemon	arch/arm/include/asm/mach-types.h	/^# define machine_is_lemon(/;"	d
machine_is_libra	arch/arm/include/asm/mach-types.h	/^# define machine_is_libra(/;"	d
machine_is_lightning	arch/arm/include/asm/mach-types.h	/^# define machine_is_lightning(/;"	d
machine_is_lilly1131	arch/arm/include/asm/mach-types.h	/^# define machine_is_lilly1131(/;"	d
machine_is_linkstation_chlv2	arch/arm/include/asm/mach-types.h	/^# define machine_is_linkstation_chlv2(/;"	d
machine_is_linkstation_ls_hgl	arch/arm/include/asm/mach-types.h	/^# define machine_is_linkstation_ls_hgl(/;"	d
machine_is_linkstation_lschl	arch/arm/include/asm/mach-types.h	/^# define machine_is_linkstation_lschl(/;"	d
machine_is_linkstation_mini	arch/arm/include/asm/mach-types.h	/^# define machine_is_linkstation_mini(/;"	d
machine_is_linkstation_pro	arch/arm/include/asm/mach-types.h	/^# define machine_is_linkstation_pro(/;"	d
machine_is_littleton	arch/arm/include/asm/mach-types.h	/^# define machine_is_littleton(/;"	d
machine_is_loft	arch/arm/include/asm/mach-types.h	/^# define machine_is_loft(/;"	d
machine_is_logicpd_pxa270	arch/arm/include/asm/mach-types.h	/^# define machine_is_logicpd_pxa270(/;"	d
machine_is_lpc24xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_lpc24xx(/;"	d
machine_is_lpd7a400	arch/arm/include/asm/mach-types.h	/^# define machine_is_lpd7a400(/;"	d
machine_is_lpd7a404	arch/arm/include/asm/mach-types.h	/^# define machine_is_lpd7a404(/;"	d
machine_is_lq2	arch/arm/include/asm/mach-types.h	/^# define machine_is_lq2(/;"	d
machine_is_ls9g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_ls9g20(/;"	d
machine_is_lswxl	arch/arm/include/asm/mach-types.h	/^# define machine_is_lswxl(/;"	d
machine_is_lubbock	arch/arm/include/asm/mach-types.h	/^# define machine_is_lubbock(/;"	d
machine_is_m502	arch/arm/include/asm/mach-types.h	/^# define machine_is_m502(/;"	d
machine_is_mackerel	arch/arm/include/asm/mach-types.h	/^# define machine_is_mackerel(/;"	d
machine_is_magician	arch/arm/include/asm/mach-types.h	/^# define machine_is_magician(/;"	d
machine_is_magx_zn5	arch/arm/include/asm/mach-types.h	/^# define machine_is_magx_zn5(/;"	d
machine_is_mahimahi	arch/arm/include/asm/mach-types.h	/^# define machine_is_mahimahi(/;"	d
machine_is_mainstone	arch/arm/include/asm/mach-types.h	/^# define machine_is_mainstone(/;"	d
machine_is_manuae	arch/arm/include/asm/mach-types.h	/^# define machine_is_manuae(/;"	d
machine_is_maple1	arch/arm/include/asm/mach-types.h	/^# define machine_is_maple1(/;"	d
machine_is_marvel	arch/arm/include/asm/mach-types.h	/^# define machine_is_marvel(/;"	d
machine_is_marvelc	arch/arm/include/asm/mach-types.h	/^# define machine_is_marvelc(/;"	d
machine_is_marvelct	arch/arm/include/asm/mach-types.h	/^# define machine_is_marvelct(/;"	d
machine_is_marvell_jasper	arch/arm/include/asm/mach-types.h	/^# define machine_is_marvell_jasper(/;"	d
machine_is_matrix505	arch/arm/include/asm/mach-types.h	/^# define machine_is_matrix505(/;"	d
machine_is_matrix518	arch/arm/include/asm/mach-types.h	/^# define machine_is_matrix518(/;"	d
machine_is_maximasp	arch/arm/include/asm/mach-types.h	/^# define machine_is_maximasp(/;"	d
machine_is_mb3	arch/arm/include/asm/mach-types.h	/^# define machine_is_mb3(/;"	d
machine_is_mecha	arch/arm/include/asm/mach-types.h	/^# define machine_is_mecha(/;"	d
machine_is_meno_qng	arch/arm/include/asm/mach-types.h	/^# define machine_is_meno_qng(/;"	d
machine_is_meson	arch/arm/include/asm/mach-types.h	/^# define machine_is_meson(/;"	d
machine_is_meson_6236m	arch/arm/include/asm/mach-types.h	/^# define machine_is_meson_6236m(/;"	d
machine_is_meson_8626m	arch/arm/include/asm/mach-types.h	/^# define machine_is_meson_8626m(/;"	d
machine_is_messina	arch/arm/include/asm/mach-types.h	/^# define machine_is_messina(/;"	d
machine_is_mic256	arch/arm/include/asm/mach-types.h	/^# define machine_is_mic256(/;"	d
machine_is_miccpt	arch/arm/include/asm/mach-types.h	/^# define machine_is_miccpt(/;"	d
machine_is_micro9	arch/arm/include/asm/mach-types.h	/^# define machine_is_micro9(/;"	d
machine_is_micro9l	arch/arm/include/asm/mach-types.h	/^# define machine_is_micro9l(/;"	d
machine_is_micro9m	arch/arm/include/asm/mach-types.h	/^# define machine_is_micro9m(/;"	d
machine_is_micro9s	arch/arm/include/asm/mach-types.h	/^# define machine_is_micro9s(/;"	d
machine_is_mif10p	arch/arm/include/asm/mach-types.h	/^# define machine_is_mif10p(/;"	d
machine_is_mimas	arch/arm/include/asm/mach-types.h	/^# define machine_is_mimas(/;"	d
machine_is_mini210	arch/arm/include/asm/mach-types.h	/^# define machine_is_mini210(/;"	d
machine_is_mini2440	arch/arm/include/asm/mach-types.h	/^# define machine_is_mini2440(/;"	d
machine_is_mini6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_mini6410(/;"	d
machine_is_mini8168	arch/arm/include/asm/mach-types.h	/^# define machine_is_mini8168(/;"	d
machine_is_mioa502	arch/arm/include/asm/mach-types.h	/^# define machine_is_mioa502(/;"	d
machine_is_mioa701	arch/arm/include/asm/mach-types.h	/^# define machine_is_mioa701(/;"	d
machine_is_mione	arch/arm/include/asm/mach-types.h	/^# define machine_is_mione(/;"	d
machine_is_mios_v1	arch/arm/include/asm/mach-types.h	/^# define machine_is_mios_v1(/;"	d
machine_is_mityomapl138	arch/arm/include/asm/mach-types.h	/^# define machine_is_mityomapl138(/;"	d
machine_is_mmm	arch/arm/include/asm/mach-types.h	/^# define machine_is_mmm(/;"	d
machine_is_monch	arch/arm/include/asm/mach-types.h	/^# define machine_is_monch(/;"	d
machine_is_mone	arch/arm/include/asm/mach-types.h	/^# define machine_is_mone(/;"	d
machine_is_moon	arch/arm/include/asm/mach-types.h	/^# define machine_is_moon(/;"	d
machine_is_mora	arch/arm/include/asm/mach-types.h	/^# define machine_is_mora(/;"	d
machine_is_mr301a	arch/arm/include/asm/mach-types.h	/^# define machine_is_mr301a(/;"	d
machine_is_msm7x25_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x25_ffa(/;"	d
machine_is_msm7x25_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x25_surf(/;"	d
machine_is_msm7x27_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x27_ffa(/;"	d
machine_is_msm7x27_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x27_surf(/;"	d
machine_is_msm7x27a_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x27a_ffa(/;"	d
machine_is_msm7x27a_rumi3	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x27a_rumi3(/;"	d
machine_is_msm7x27a_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x27a_surf(/;"	d
machine_is_msm7x30_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x30_ffa(/;"	d
machine_is_msm7x30_fluid	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x30_fluid(/;"	d
machine_is_msm7x30_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm7x30_surf(/;"	d
machine_is_msm8960_apq	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8960_apq(/;"	d
machine_is_msm8960_cdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8960_cdp(/;"	d
machine_is_msm8960_fluid	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8960_fluid(/;"	d
machine_is_msm8960_mdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8960_mdp(/;"	d
machine_is_msm8960_rumi3	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8960_rumi3(/;"	d
machine_is_msm8960_sim	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8960_sim(/;"	d
machine_is_msm8x55_svlte_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x55_svlte_ffa(/;"	d
machine_is_msm8x55_svlte_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x55_svlte_surf(/;"	d
machine_is_msm8x60_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_ffa(/;"	d
machine_is_msm8x60_fluid	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_fluid(/;"	d
machine_is_msm8x60_qrdc	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_qrdc(/;"	d
machine_is_msm8x60_qt	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_qt(/;"	d
machine_is_msm8x60_rumi3	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_rumi3(/;"	d
machine_is_msm8x60_sim	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_sim(/;"	d
machine_is_msm8x60_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_msm8x60_surf(/;"	d
machine_is_mss2	arch/arm/include/asm/mach-types.h	/^# define machine_is_mss2(/;"	d
machine_is_multhsu	arch/arm/include/asm/mach-types.h	/^# define machine_is_multhsu(/;"	d
machine_is_mv2120	arch/arm/include/asm/mach-types.h	/^# define machine_is_mv2120(/;"	d
machine_is_mv88f6281gtw_ge	arch/arm/include/asm/mach-types.h	/^# define machine_is_mv88f6281gtw_ge(/;"	d
machine_is_mvblx	arch/arm/include/asm/mach-types.h	/^# define machine_is_mvblx(/;"	d
machine_is_mx1ads	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx1ads(/;"	d
machine_is_mx21ads	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx21ads(/;"	d
machine_is_mx23evk	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx23evk(/;"	d
machine_is_mx257sol	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx257sol(/;"	d
machine_is_mx257sx	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx257sx(/;"	d
machine_is_mx25_3ds	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx25_3ds(/;"	d
machine_is_mx25_e2s_uc	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx25_e2s_uc(/;"	d
machine_is_mx27_3ds	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx27_3ds(/;"	d
machine_is_mx27_wmultra	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx27_wmultra(/;"	d
machine_is_mx27ads	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx27ads(/;"	d
machine_is_mx27su2	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx27su2(/;"	d
machine_is_mx28evk	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx28evk(/;"	d
machine_is_mx31_3ds	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx31_3ds(/;"	d
machine_is_mx31ads	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx31ads(/;"	d
machine_is_mx31lite	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx31lite(/;"	d
machine_is_mx31moboard	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx31moboard(/;"	d
machine_is_mx35_3ds	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx35_3ds(/;"	d
machine_is_mx50_arm2	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx50_arm2(/;"	d
machine_is_mx50_rdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx50_rdp(/;"	d
machine_is_mx51_3ds	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_3ds(/;"	d
machine_is_mx51_aster7	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_aster7(/;"	d
machine_is_mx51_babbage	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_babbage(/;"	d
machine_is_mx51_bravo	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_bravo(/;"	d
machine_is_mx51_efikamx	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_efikamx(/;"	d
machine_is_mx51_efikasb	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_efikasb(/;"	d
machine_is_mx51_ggc	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_ggc(/;"	d
machine_is_mx51_moray	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_moray(/;"	d
machine_is_mx51_tulip	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51_tulip(/;"	d
machine_is_mx51erebus	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx51erebus(/;"	d
machine_is_mx53_ard	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx53_ard(/;"	d
machine_is_mx53_evk	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx53_evk(/;"	d
machine_is_mx53_loco	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx53_loco(/;"	d
machine_is_mx53_smd	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx53_smd(/;"	d
machine_is_mx61_ard	arch/arm/include/asm/mach-types.h	/^# define machine_is_mx61_ard(/;"	d
machine_is_mxc25_topaz	arch/arm/include/asm/mach-types.h	/^# define machine_is_mxc25_topaz(/;"	d
machine_is_mxlads	arch/arm/include/asm/mach-types.h	/^# define machine_is_mxlads(/;"	d
machine_is_mxt_td60	arch/arm/include/asm/mach-types.h	/^# define machine_is_mxt_td60(/;"	d
machine_is_mxt_td61	arch/arm/include/asm/mach-types.h	/^# define machine_is_mxt_td61(/;"	d
machine_is_n2100	arch/arm/include/asm/mach-types.h	/^# define machine_is_n2100(/;"	d
machine_is_n30	arch/arm/include/asm/mach-types.h	/^# define machine_is_n30(/;"	d
machine_is_n35	arch/arm/include/asm/mach-types.h	/^# define machine_is_n35(/;"	d
machine_is_najay_a9263	arch/arm/include/asm/mach-types.h	/^# define machine_is_najay_a9263(/;"	d
machine_is_nanoengine	arch/arm/include/asm/mach-types.h	/^# define machine_is_nanoengine(/;"	d
machine_is_nanos	arch/arm/include/asm/mach-types.h	/^# define machine_is_nanos(/;"	d
machine_is_nanozoom	arch/arm/include/asm/mach-types.h	/^# define machine_is_nanozoom(/;"	d
machine_is_nas100d	arch/arm/include/asm/mach-types.h	/^# define machine_is_nas100d(/;"	d
machine_is_nas4220b	arch/arm/include/asm/mach-types.h	/^# define machine_is_nas4220b(/;"	d
machine_is_nas6210	arch/arm/include/asm/mach-types.h	/^# define machine_is_nas6210(/;"	d
machine_is_navefihid	arch/arm/include/asm/mach-types.h	/^# define machine_is_navefihid(/;"	d
machine_is_naxy1200	arch/arm/include/asm/mach-types.h	/^# define machine_is_naxy1200(/;"	d
machine_is_naxy400	arch/arm/include/asm/mach-types.h	/^# define machine_is_naxy400(/;"	d
machine_is_nb31	arch/arm/include/asm/mach-types.h	/^# define machine_is_nb31(/;"	d
machine_is_ncp	arch/arm/include/asm/mach-types.h	/^# define machine_is_ncp(/;"	d
machine_is_nda_evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_nda_evm(/;"	d
machine_is_nec_mp900	arch/arm/include/asm/mach-types.h	/^# define machine_is_nec_mp900(/;"	d
machine_is_neo1973_gta02	arch/arm/include/asm/mach-types.h	/^# define machine_is_neo1973_gta02(/;"	d
machine_is_neocore926	arch/arm/include/asm/mach-types.h	/^# define machine_is_neocore926(/;"	d
machine_is_nery_1000	arch/arm/include/asm/mach-types.h	/^# define machine_is_nery_1000(/;"	d
machine_is_net2big	arch/arm/include/asm/mach-types.h	/^# define machine_is_net2big(/;"	d
machine_is_net2big_nand_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_net2big_nand_v2(/;"	d
machine_is_net2big_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_net2big_v2(/;"	d
machine_is_net5big_nand_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_net5big_nand_v2(/;"	d
machine_is_net5big_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_net5big_v2(/;"	d
machine_is_netspace_lite_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_netspace_lite_v2(/;"	d
machine_is_netspace_max_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_netspace_max_v2(/;"	d
machine_is_netspace_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_netspace_v2(/;"	d
machine_is_netviz	arch/arm/include/asm/mach-types.h	/^# define machine_is_netviz(/;"	d
machine_is_netwalker	arch/arm/include/asm/mach-types.h	/^# define machine_is_netwalker(/;"	d
machine_is_netwinder	arch/arm/include/asm/mach-types.h	/^# define machine_is_netwinder(/;"	d
machine_is_neuros_osd2	arch/arm/include/asm/mach-types.h	/^# define machine_is_neuros_osd2(/;"	d
machine_is_nexcoder_2440	arch/arm/include/asm/mach-types.h	/^# define machine_is_nexcoder_2440(/;"	d
machine_is_nitrogen_imx51	arch/arm/include/asm/mach-types.h	/^# define machine_is_nitrogen_imx51(/;"	d
machine_is_nitrogen_imx53	arch/arm/include/asm/mach-types.h	/^# define machine_is_nitrogen_imx53(/;"	d
machine_is_nitrogen_vm_imx51	arch/arm/include/asm/mach-types.h	/^# define machine_is_nitrogen_vm_imx51(/;"	d
machine_is_nmh	arch/arm/include/asm/mach-types.h	/^# define machine_is_nmh(/;"	d
machine_is_nokia770	arch/arm/include/asm/mach-types.h	/^# define machine_is_nokia770(/;"	d
machine_is_nokia_n800	arch/arm/include/asm/mach-types.h	/^# define machine_is_nokia_n800(/;"	d
machine_is_nokia_n810	arch/arm/include/asm/mach-types.h	/^# define machine_is_nokia_n810(/;"	d
machine_is_nokia_n810_wimax	arch/arm/include/asm/mach-types.h	/^# define machine_is_nokia_n810_wimax(/;"	d
machine_is_nokia_rm680	arch/arm/include/asm/mach-types.h	/^# define machine_is_nokia_rm680(/;"	d
machine_is_nokia_rx51	arch/arm/include/asm/mach-types.h	/^# define machine_is_nokia_rx51(/;"	d
machine_is_nomadik	arch/arm/include/asm/mach-types.h	/^# define machine_is_nomadik(/;"	d
machine_is_notle	arch/arm/include/asm/mach-types.h	/^# define machine_is_notle(/;"	d
machine_is_ns2416	arch/arm/include/asm/mach-types.h	/^# define machine_is_ns2416(/;"	d
machine_is_ns2816_ntnb	arch/arm/include/asm/mach-types.h	/^# define machine_is_ns2816_ntnb(/;"	d
machine_is_ns2816_ntpad	arch/arm/include/asm/mach-types.h	/^# define machine_is_ns2816_ntpad(/;"	d
machine_is_ns2816tb	arch/arm/include/asm/mach-types.h	/^# define machine_is_ns2816tb(/;"	d
machine_is_ns_k330	arch/arm/include/asm/mach-types.h	/^# define machine_is_ns_k330(/;"	d
machine_is_nsb3ast	arch/arm/include/asm/mach-types.h	/^# define machine_is_nsb3ast(/;"	d
machine_is_nsk330	arch/arm/include/asm/mach-types.h	/^# define machine_is_nsk330(/;"	d
machine_is_nslu2	arch/arm/include/asm/mach-types.h	/^# define machine_is_nslu2(/;"	d
machine_is_nsslsboard	arch/arm/include/asm/mach-types.h	/^# define machine_is_nsslsboard(/;"	d
machine_is_nuc700evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuc700evb(/;"	d
machine_is_nuc710evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuc710evb(/;"	d
machine_is_nuc740evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuc740evb(/;"	d
machine_is_nuc745evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuc745evb(/;"	d
machine_is_nuc932evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuc932evb(/;"	d
machine_is_nuc950ts	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuc950ts(/;"	d
machine_is_nuri	arch/arm/include/asm/mach-types.h	/^# define machine_is_nuri(/;"	d
machine_is_nv1000	arch/arm/include/asm/mach-types.h	/^# define machine_is_nv1000(/;"	d
machine_is_nxdb500	arch/arm/include/asm/mach-types.h	/^# define machine_is_nxdb500(/;"	d
machine_is_nxdkn	arch/arm/include/asm/mach-types.h	/^# define machine_is_nxdkn(/;"	d
machine_is_nxeb500hmi	arch/arm/include/asm/mach-types.h	/^# define machine_is_nxeb500hmi(/;"	d
machine_is_oce_nigma	arch/arm/include/asm/mach-types.h	/^# define machine_is_oce_nigma(/;"	d
machine_is_omap2evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap2evm(/;"	d
machine_is_omap3505nova8	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3505nova8(/;"	d
machine_is_omap3517evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3517evm(/;"	d
machine_is_omap3530_lv_som	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3530_lv_som(/;"	d
machine_is_omap3621_edp1	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3621_edp1(/;"	d
machine_is_omap3_baia	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_baia(/;"	d
machine_is_omap3_bc10	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_bc10(/;"	d
machine_is_omap3_beagle	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_beagle(/;"	d
machine_is_omap3_braillo	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_braillo(/;"	d
machine_is_omap3_ibiza	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_ibiza(/;"	d
machine_is_omap3_pandora	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_pandora(/;"	d
machine_is_omap3_rfs200	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_rfs200(/;"	d
machine_is_omap3_tdm3730	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_tdm3730(/;"	d
machine_is_omap3_torpedo	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_torpedo(/;"	d
machine_is_omap3_waldo1	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3_waldo1(/;"	d
machine_is_omap3evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3evm(/;"	d
machine_is_omap3smartdisplay	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap3smartdisplay(/;"	d
machine_is_omap4_panda	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap4_panda(/;"	d
machine_is_omap5_sevm	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap5_sevm(/;"	d
machine_is_omap_2430sdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_2430sdp(/;"	d
machine_is_omap_3430sdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_3430sdp(/;"	d
machine_is_omap_3630sdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_3630sdp(/;"	d
machine_is_omap_4430sdp	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_4430sdp(/;"	d
machine_is_omap_apollon	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_apollon(/;"	d
machine_is_omap_bender	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_bender(/;"	d
machine_is_omap_fsample	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_fsample(/;"	d
machine_is_omap_generic	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_generic(/;"	d
machine_is_omap_h2	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_h2(/;"	d
machine_is_omap_h3	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_h3(/;"	d
machine_is_omap_h4	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_h4(/;"	d
machine_is_omap_innovator	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_innovator(/;"	d
machine_is_omap_ldp	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_ldp(/;"	d
machine_is_omap_mcop	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_mcop(/;"	d
machine_is_omap_osk	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_osk(/;"	d
machine_is_omap_palmte	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_palmte(/;"	d
machine_is_omap_palmtt	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_palmtt(/;"	d
machine_is_omap_palmz71	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_palmz71(/;"	d
machine_is_omap_perseus2	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_perseus2(/;"	d
machine_is_omap_zoom2	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_zoom2(/;"	d
machine_is_omap_zoom3	arch/arm/include/asm/mach-types.h	/^# define machine_is_omap_zoom3(/;"	d
machine_is_omapl138_case_a3	arch/arm/include/asm/mach-types.h	/^# define machine_is_omapl138_case_a3(/;"	d
machine_is_omapl138_europalc	arch/arm/include/asm/mach-types.h	/^# define machine_is_omapl138_europalc(/;"	d
machine_is_omapl138_hawkboard	arch/arm/include/asm/mach-types.h	/^# define machine_is_omapl138_hawkboard(/;"	d
machine_is_omn_at91sam9g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_omn_at91sam9g20(/;"	d
machine_is_onearm	arch/arm/include/asm/mach-types.h	/^# define machine_is_onearm(/;"	d
machine_is_openrd_base	arch/arm/include/asm/mach-types.h	/^# define machine_is_openrd_base(/;"	d
machine_is_openrd_client	arch/arm/include/asm/mach-types.h	/^# define machine_is_openrd_client(/;"	d
machine_is_openrd_ultimate	arch/arm/include/asm/mach-types.h	/^# define machine_is_openrd_ultimate(/;"	d
machine_is_oratisaes	arch/arm/include/asm/mach-types.h	/^# define machine_is_oratisaes(/;"	d
machine_is_oratislink	arch/arm/include/asm/mach-types.h	/^# define machine_is_oratislink(/;"	d
machine_is_origen	arch/arm/include/asm/mach-types.h	/^# define machine_is_origen(/;"	d
machine_is_osiris	arch/arm/include/asm/mach-types.h	/^# define machine_is_osiris(/;"	d
machine_is_oslo_amundsen	arch/arm/include/asm/mach-types.h	/^# define machine_is_oslo_amundsen(/;"	d
machine_is_otom	arch/arm/include/asm/mach-types.h	/^# define machine_is_otom(/;"	d
machine_is_overo	arch/arm/include/asm/mach-types.h	/^# define machine_is_overo(/;"	d
machine_is_overo_ctu_inertial	arch/arm/include/asm/mach-types.h	/^# define machine_is_overo_ctu_inertial(/;"	d
machine_is_p720t	arch/arm/include/asm/mach-types.h	/^# define machine_is_p720t(/;"	d
machine_is_p87_smartsim	arch/arm/include/asm/mach-types.h	/^# define machine_is_p87_smartsim(/;"	d
machine_is_palmld	arch/arm/include/asm/mach-types.h	/^# define machine_is_palmld(/;"	d
machine_is_palmt5	arch/arm/include/asm/mach-types.h	/^# define machine_is_palmt5(/;"	d
machine_is_palmtc	arch/arm/include/asm/mach-types.h	/^# define machine_is_palmtc(/;"	d
machine_is_palmte2	arch/arm/include/asm/mach-types.h	/^# define machine_is_palmte2(/;"	d
machine_is_palmtx	arch/arm/include/asm/mach-types.h	/^# define machine_is_palmtx(/;"	d
machine_is_palmz72	arch/arm/include/asm/mach-types.h	/^# define machine_is_palmz72(/;"	d
machine_is_paz00	arch/arm/include/asm/mach-types.h	/^# define machine_is_paz00(/;"	d
machine_is_pc7302	arch/arm/include/asm/mach-types.h	/^# define machine_is_pc7302(/;"	d
machine_is_pc7308	arch/arm/include/asm/mach-types.h	/^# define machine_is_pc7308(/;"	d
machine_is_pc9260_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_pc9260_v2(/;"	d
machine_is_pca100	arch/arm/include/asm/mach-types.h	/^# define machine_is_pca100(/;"	d
machine_is_pca102	arch/arm/include/asm/mach-types.h	/^# define machine_is_pca102(/;"	d
machine_is_pcats_overlay	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcats_overlay(/;"	d
machine_is_pcm027	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcm027(/;"	d
machine_is_pcm037	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcm037(/;"	d
machine_is_pcm038	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcm038(/;"	d
machine_is_pcm043	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcm043(/;"	d
machine_is_pcm048	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcm048(/;"	d
machine_is_pcm049	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcm049(/;"	d
machine_is_pcontrol_g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_pcontrol_g20(/;"	d
machine_is_pec_hc2	arch/arm/include/asm/mach-types.h	/^# define machine_is_pec_hc2(/;"	d
machine_is_pec_tc	arch/arm/include/asm/mach-types.h	/^# define machine_is_pec_tc(/;"	d
machine_is_pemp_omap3_apollo	arch/arm/include/asm/mach-types.h	/^# define machine_is_pemp_omap3_apollo(/;"	d
machine_is_personal_server	arch/arm/include/asm/mach-types.h	/^# define machine_is_personal_server(/;"	d
machine_is_pfs168	arch/arm/include/asm/mach-types.h	/^# define machine_is_pfs168(/;"	d
machine_is_pgs_v1	arch/arm/include/asm/mach-types.h	/^# define machine_is_pgs_v1(/;"	d
machine_is_philhwani	arch/arm/include/asm/mach-types.h	/^# define machine_is_philhwani(/;"	d
machine_is_phy3250	arch/arm/include/asm/mach-types.h	/^# define machine_is_phy3250(/;"	d
machine_is_picasso	arch/arm/include/asm/mach-types.h	/^# define machine_is_picasso(/;"	d
machine_is_pico	arch/arm/include/asm/mach-types.h	/^# define machine_is_pico(/;"	d
machine_is_picocom3	arch/arm/include/asm/mach-types.h	/^# define machine_is_picocom3(/;"	d
machine_is_picocom4	arch/arm/include/asm/mach-types.h	/^# define machine_is_picocom4(/;"	d
machine_is_picotux2xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_picotux2xx(/;"	d
machine_is_pivicc	arch/arm/include/asm/mach-types.h	/^# define machine_is_pivicc(/;"	d
machine_is_pleb	arch/arm/include/asm/mach-types.h	/^# define machine_is_pleb(/;"	d
machine_is_pnx4008	arch/arm/include/asm/mach-types.h	/^# define machine_is_pnx4008(/;"	d
machine_is_polysat1	arch/arm/include/asm/mach-types.h	/^# define machine_is_polysat1(/;"	d
machine_is_poodle	arch/arm/include/asm/mach-types.h	/^# define machine_is_poodle(/;"	d
machine_is_portuxg20	arch/arm/include/asm/mach-types.h	/^# define machine_is_portuxg20(/;"	d
machine_is_pov15hd	arch/arm/include/asm/mach-types.h	/^# define machine_is_pov15hd(/;"	d
machine_is_premierwave_en	arch/arm/include/asm/mach-types.h	/^# define machine_is_premierwave_en(/;"	d
machine_is_prima2_evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_prima2_evb(/;"	d
machine_is_pt_system3	arch/arm/include/asm/mach-types.h	/^# define machine_is_pt_system3(/;"	d
machine_is_ptx7510	arch/arm/include/asm/mach-types.h	/^# define machine_is_ptx7510(/;"	d
machine_is_ptx7545	arch/arm/include/asm/mach-types.h	/^# define machine_is_ptx7545(/;"	d
machine_is_punica	arch/arm/include/asm/mach-types.h	/^# define machine_is_punica(/;"	d
machine_is_pupitre	arch/arm/include/asm/mach-types.h	/^# define machine_is_pupitre(/;"	d
machine_is_pvm2030	arch/arm/include/asm/mach-types.h	/^# define machine_is_pvm2030(/;"	d
machine_is_pwb3090	arch/arm/include/asm/mach-types.h	/^# define machine_is_pwb3090(/;"	d
machine_is_pxa_idp	arch/arm/include/asm/mach-types.h	/^# define machine_is_pxa_idp(/;"	d
machine_is_pxwnas_500_1000	arch/arm/include/asm/mach-types.h	/^# define machine_is_pxwnas_500_1000(/;"	d
machine_is_pyramid	arch/arm/include/asm/mach-types.h	/^# define machine_is_pyramid(/;"	d
machine_is_qbc9263	arch/arm/include/asm/mach-types.h	/^# define machine_is_qbc9263(/;"	d
machine_is_qil_a9260	arch/arm/include/asm/mach-types.h	/^# define machine_is_qil_a9260(/;"	d
machine_is_qong	arch/arm/include/asm/mach-types.h	/^# define machine_is_qong(/;"	d
machine_is_qsd8x50_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_qsd8x50_surf(/;"	d
machine_is_qsd8x50a_st1_5	arch/arm/include/asm/mach-types.h	/^# define machine_is_qsd8x50a_st1_5(/;"	d
machine_is_qsd8x72_ffa	arch/arm/include/asm/mach-types.h	/^# define machine_is_qsd8x72_ffa(/;"	d
machine_is_qsd8x72_surf	arch/arm/include/asm/mach-types.h	/^# define machine_is_qsd8x72_surf(/;"	d
machine_is_qt2410	arch/arm/include/asm/mach-types.h	/^# define machine_is_qt2410(/;"	d
machine_is_quad_salsa	arch/arm/include/asm/mach-types.h	/^# define machine_is_quad_salsa(/;"	d
machine_is_quickstep	arch/arm/include/asm/mach-types.h	/^# define machine_is_quickstep(/;"	d
machine_is_r1801e	arch/arm/include/asm/mach-types.h	/^# define machine_is_r1801e(/;"	d
machine_is_rascal	arch/arm/include/asm/mach-types.h	/^# define machine_is_rascal(/;"	d
machine_is_raumfeld_connector	arch/arm/include/asm/mach-types.h	/^# define machine_is_raumfeld_connector(/;"	d
machine_is_raumfeld_rc	arch/arm/include/asm/mach-types.h	/^# define machine_is_raumfeld_rc(/;"	d
machine_is_raumfeld_speaker	arch/arm/include/asm/mach-types.h	/^# define machine_is_raumfeld_speaker(/;"	d
machine_is_rd78x00_masa	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd78x00_masa(/;"	d
machine_is_rd88f5181l_fxo	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd88f5181l_fxo(/;"	d
machine_is_rd88f5181l_ge	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd88f5181l_ge(/;"	d
machine_is_rd88f5182	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd88f5182(/;"	d
machine_is_rd88f6183ap_ge	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd88f6183ap_ge(/;"	d
machine_is_rd88f6192_nas	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd88f6192_nas(/;"	d
machine_is_rd88f6281	arch/arm/include/asm/mach-types.h	/^# define machine_is_rd88f6281(/;"	d
machine_is_rdstor	arch/arm/include/asm/mach-types.h	/^# define machine_is_rdstor(/;"	d
machine_is_re2rev20	arch/arm/include/asm/mach-types.h	/^# define machine_is_re2rev20(/;"	d
machine_is_re2rev21	arch/arm/include/asm/mach-types.h	/^# define machine_is_re2rev21(/;"	d
machine_is_real6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_real6410(/;"	d
machine_is_realview_eb	arch/arm/include/asm/mach-types.h	/^# define machine_is_realview_eb(/;"	d
machine_is_realview_pb1176	arch/arm/include/asm/mach-types.h	/^# define machine_is_realview_pb1176(/;"	d
machine_is_realview_pb11mp	arch/arm/include/asm/mach-types.h	/^# define machine_is_realview_pb11mp(/;"	d
machine_is_realview_pba8	arch/arm/include/asm/mach-types.h	/^# define machine_is_realview_pba8(/;"	d
machine_is_realview_pbx	arch/arm/include/asm/mach-types.h	/^# define machine_is_realview_pbx(/;"	d
machine_is_remus	arch/arm/include/asm/mach-types.h	/^# define machine_is_remus(/;"	d
machine_is_rexmas	arch/arm/include/asm/mach-types.h	/^# define machine_is_rexmas(/;"	d
machine_is_rfl109145_ssrv	arch/arm/include/asm/mach-types.h	/^# define machine_is_rfl109145_ssrv(/;"	d
machine_is_rhino	arch/arm/include/asm/mach-types.h	/^# define machine_is_rhino(/;"	d
machine_is_rib	arch/arm/include/asm/mach-types.h	/^# define machine_is_rib(/;"	d
machine_is_rider	arch/arm/include/asm/mach-types.h	/^# define machine_is_rider(/;"	d
machine_is_riot_bei2	arch/arm/include/asm/mach-types.h	/^# define machine_is_riot_bei2(/;"	d
machine_is_riot_x37	arch/arm/include/asm/mach-types.h	/^# define machine_is_riot_x37(/;"	d
machine_is_riscpc	arch/arm/include/asm/mach-types.h	/^# define machine_is_riscpc(/;"	d
machine_is_roadrunner	arch/arm/include/asm/mach-types.h	/^# define machine_is_roadrunner(/;"	d
machine_is_rockhopper	arch/arm/include/asm/mach-types.h	/^# define machine_is_rockhopper(/;"	d
machine_is_rover_g8	arch/arm/include/asm/mach-types.h	/^# define machine_is_rover_g8(/;"	d
machine_is_roverpcs8	arch/arm/include/asm/mach-types.h	/^# define machine_is_roverpcs8(/;"	d
machine_is_roverx7	arch/arm/include/asm/mach-types.h	/^# define machine_is_roverx7(/;"	d
machine_is_rpc353	arch/arm/include/asm/mach-types.h	/^# define machine_is_rpc353(/;"	d
machine_is_ruby	arch/arm/include/asm/mach-types.h	/^# define machine_is_ruby(/;"	d
machine_is_rubys	arch/arm/include/asm/mach-types.h	/^# define machine_is_rubys(/;"	d
machine_is_rump	arch/arm/include/asm/mach-types.h	/^# define machine_is_rump(/;"	d
machine_is_rut100	arch/arm/include/asm/mach-types.h	/^# define machine_is_rut100(/;"	d
machine_is_rv082	arch/arm/include/asm/mach-types.h	/^# define machine_is_rv082(/;"	d
machine_is_rx1950	arch/arm/include/asm/mach-types.h	/^# define machine_is_rx1950(/;"	d
machine_is_rx3715	arch/arm/include/asm/mach-types.h	/^# define machine_is_rx3715(/;"	d
machine_is_s3c2413	arch/arm/include/asm/mach-types.h	/^# define machine_is_s3c2413(/;"	d
machine_is_s3c2440	arch/arm/include/asm/mach-types.h	/^# define machine_is_s3c2440(/;"	d
machine_is_s5500	arch/arm/include/asm/mach-types.h	/^# define machine_is_s5500(/;"	d
machine_is_s5pc110_crespo	arch/arm/include/asm/mach-types.h	/^# define machine_is_s5pc110_crespo(/;"	d
machine_is_saar	arch/arm/include/asm/mach-types.h	/^# define machine_is_saar(/;"	d
machine_is_saarb	arch/arm/include/asm/mach-types.h	/^# define machine_is_saarb(/;"	d
machine_is_saarb_mg1	arch/arm/include/asm/mach-types.h	/^# define machine_is_saarb_mg1(/;"	d
machine_is_saga	arch/arm/include/asm/mach-types.h	/^# define machine_is_saga(/;"	d
machine_is_saluda	arch/arm/include/asm/mach-types.h	/^# define machine_is_saluda(/;"	d
machine_is_sam9_l9260	arch/arm/include/asm/mach-types.h	/^# define machine_is_sam9_l9260(/;"	d
machine_is_sam9repeater	arch/arm/include/asm/mach-types.h	/^# define machine_is_sam9repeater(/;"	d
machine_is_santiago	arch/arm/include/asm/mach-types.h	/^# define machine_is_santiago(/;"	d
machine_is_sapphire	arch/arm/include/asm/mach-types.h	/^# define machine_is_sapphire(/;"	d
machine_is_sbc3530	arch/arm/include/asm/mach-types.h	/^# define machine_is_sbc3530(/;"	d
machine_is_sbc6000x	arch/arm/include/asm/mach-types.h	/^# define machine_is_sbc6000x(/;"	d
machine_is_sbca11	arch/arm/include/asm/mach-types.h	/^# define machine_is_sbca11(/;"	d
machine_is_sc575hmi	arch/arm/include/asm/mach-types.h	/^# define machine_is_sc575hmi(/;"	d
machine_is_sc575plc	arch/arm/include/asm/mach-types.h	/^# define machine_is_sc575plc(/;"	d
machine_is_scb9328	arch/arm/include/asm/mach-types.h	/^# define machine_is_scb9328(/;"	d
machine_is_sciphone_g2	arch/arm/include/asm/mach-types.h	/^# define machine_is_sciphone_g2(/;"	d
machine_is_sdh001	arch/arm/include/asm/mach-types.h	/^# define machine_is_sdh001(/;"	d
machine_is_sdi_ess_9263	arch/arm/include/asm/mach-types.h	/^# define machine_is_sdi_ess_9263(/;"	d
machine_is_sdvr	arch/arm/include/asm/mach-types.h	/^# define machine_is_sdvr(/;"	d
machine_is_seaboard	arch/arm/include/asm/mach-types.h	/^# define machine_is_seaboard(/;"	d
machine_is_serrano	arch/arm/include/asm/mach-types.h	/^# define machine_is_serrano(/;"	d
machine_is_sffsdr	arch/arm/include/asm/mach-types.h	/^# define machine_is_sffsdr(/;"	d
machine_is_sgh_i740	arch/arm/include/asm/mach-types.h	/^# define machine_is_sgh_i740(/;"	d
machine_is_shannon	arch/arm/include/asm/mach-types.h	/^# define machine_is_shannon(/;"	d
machine_is_sharespace	arch/arm/include/asm/mach-types.h	/^# define machine_is_sharespace(/;"	d
machine_is_shark	arch/arm/include/asm/mach-types.h	/^# define machine_is_shark(/;"	d
machine_is_sheeva_esata	arch/arm/include/asm/mach-types.h	/^# define machine_is_sheeva_esata(/;"	d
machine_is_sheevaplug	arch/arm/include/asm/mach-types.h	/^# define machine_is_sheevaplug(/;"	d
machine_is_shenzhou	arch/arm/include/asm/mach-types.h	/^# define machine_is_shenzhou(/;"	d
machine_is_shepherd	arch/arm/include/asm/mach-types.h	/^# define machine_is_shepherd(/;"	d
machine_is_shooter	arch/arm/include/asm/mach-types.h	/^# define machine_is_shooter(/;"	d
machine_is_shooter_ct	arch/arm/include/asm/mach-types.h	/^# define machine_is_shooter_ct(/;"	d
machine_is_shooter_u	arch/arm/include/asm/mach-types.h	/^# define machine_is_shooter_u(/;"	d
machine_is_shortloin	arch/arm/include/asm/mach-types.h	/^# define machine_is_shortloin(/;"	d
machine_is_siemens_l0	arch/arm/include/asm/mach-types.h	/^# define machine_is_siemens_l0(/;"	d
machine_is_sim_one	arch/arm/include/asm/mach-types.h	/^# define machine_is_sim_one(/;"	d
machine_is_simpad	arch/arm/include/asm/mach-types.h	/^# define machine_is_simpad(/;"	d
machine_is_simplenet	arch/arm/include/asm/mach-types.h	/^# define machine_is_simplenet(/;"	d
machine_is_simtec_kirkmod	arch/arm/include/asm/mach-types.h	/^# define machine_is_simtec_kirkmod(/;"	d
machine_is_sky25	arch/arm/include/asm/mach-types.h	/^# define machine_is_sky25(/;"	d
machine_is_sky6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_sky6410(/;"	d
machine_is_sm1k	arch/arm/include/asm/mach-types.h	/^# define machine_is_sm1k(/;"	d
machine_is_smartq5	arch/arm/include/asm/mach-types.h	/^# define machine_is_smartq5(/;"	d
machine_is_smartq7	arch/arm/include/asm/mach-types.h	/^# define machine_is_smartq7(/;"	d
machine_is_smartqv3	arch/arm/include/asm/mach-types.h	/^# define machine_is_smartqv3(/;"	d
machine_is_smartqv5	arch/arm/include/asm/mach-types.h	/^# define machine_is_smartqv5(/;"	d
machine_is_smartqv7	arch/arm/include/asm/mach-types.h	/^# define machine_is_smartqv7(/;"	d
machine_is_smdk2410	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk2410(/;"	d
machine_is_smdk2412	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk2412(/;"	d
machine_is_smdk2413	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk2413(/;"	d
machine_is_smdk2416	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk2416(/;"	d
machine_is_smdk2443	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk2443(/;"	d
machine_is_smdk6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk6410(/;"	d
machine_is_smdk6440	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk6440(/;"	d
machine_is_smdk6442	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk6442(/;"	d
machine_is_smdk6450	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdk6450(/;"	d
machine_is_smdkc100	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdkc100(/;"	d
machine_is_smdkc110	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdkc110(/;"	d
machine_is_smdkc210	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdkc210(/;"	d
machine_is_smdkv210	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdkv210(/;"	d
machine_is_smdkv310	arch/arm/include/asm/mach-types.h	/^# define machine_is_smdkv310(/;"	d
machine_is_snapper_9260	arch/arm/include/asm/mach-types.h	/^# define machine_is_snapper_9260(/;"	d
machine_is_snapper_cl15	arch/arm/include/asm/mach-types.h	/^# define machine_is_snapper_cl15(/;"	d
machine_is_softwinner	arch/arm/include/asm/mach-types.h	/^# define machine_is_softwinner(/;"	d
machine_is_soli_01	arch/arm/include/asm/mach-types.h	/^# define machine_is_soli_01(/;"	d
machine_is_spade	arch/arm/include/asm/mach-types.h	/^# define machine_is_spade(/;"	d
machine_is_spade_lte	arch/arm/include/asm/mach-types.h	/^# define machine_is_spade_lte(/;"	d
machine_is_spdm	arch/arm/include/asm/mach-types.h	/^# define machine_is_spdm(/;"	d
machine_is_spear1310	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear1310(/;"	d
machine_is_spear1340	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear1340(/;"	d
machine_is_spear300	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear300(/;"	d
machine_is_spear310	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear310(/;"	d
machine_is_spear320	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear320(/;"	d
machine_is_spear600	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear600(/;"	d
machine_is_spear900	arch/arm/include/asm/mach-types.h	/^# define machine_is_spear900(/;"	d
machine_is_spica	arch/arm/include/asm/mach-types.h	/^# define machine_is_spica(/;"	d
machine_is_spitz	arch/arm/include/asm/mach-types.h	/^# define machine_is_spitz(/;"	d
machine_is_splendor	arch/arm/include/asm/mach-types.h	/^# define machine_is_splendor(/;"	d
machine_is_spx_sakura	arch/arm/include/asm/mach-types.h	/^# define machine_is_spx_sakura(/;"	d
machine_is_spyplug	arch/arm/include/asm/mach-types.h	/^# define machine_is_spyplug(/;"	d
machine_is_ssc	arch/arm/include/asm/mach-types.h	/^# define machine_is_ssc(/;"	d
machine_is_stamp9g20	arch/arm/include/asm/mach-types.h	/^# define machine_is_stamp9g20(/;"	d
machine_is_stamp9g45	arch/arm/include/asm/mach-types.h	/^# define machine_is_stamp9g45(/;"	d
machine_is_stargate2	arch/arm/include/asm/mach-types.h	/^# define machine_is_stargate2(/;"	d
machine_is_steelyard	arch/arm/include/asm/mach-types.h	/^# define machine_is_steelyard(/;"	d
machine_is_stella	arch/arm/include/asm/mach-types.h	/^# define machine_is_stella(/;"	d
machine_is_stmp378x	arch/arm/include/asm/mach-types.h	/^# define machine_is_stmp378x(/;"	d
machine_is_stmp37xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_stmp37xx(/;"	d
machine_is_strasbourg	arch/arm/include/asm/mach-types.h	/^# define machine_is_strasbourg(/;"	d
machine_is_strasbourg_a2	arch/arm/include/asm/mach-types.h	/^# define machine_is_strasbourg_a2(/;"	d
machine_is_stretchs7000	arch/arm/include/asm/mach-types.h	/^# define machine_is_stretchs7000(/;"	d
machine_is_sunfire	arch/arm/include/asm/mach-types.h	/^# define machine_is_sunfire(/;"	d
machine_is_sunflower	arch/arm/include/asm/mach-types.h	/^# define machine_is_sunflower(/;"	d
machine_is_svcid	arch/arm/include/asm/mach-types.h	/^# define machine_is_svcid(/;"	d
machine_is_svp5500	arch/arm/include/asm/mach-types.h	/^# define machine_is_svp5500(/;"	d
machine_is_svp8500v1	arch/arm/include/asm/mach-types.h	/^# define machine_is_svp8500v1(/;"	d
machine_is_svp8500v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_svp8500v2(/;"	d
machine_is_swarcoextmodem	arch/arm/include/asm/mach-types.h	/^# define machine_is_swarcoextmodem(/;"	d
machine_is_sweda_tms2	arch/arm/include/asm/mach-types.h	/^# define machine_is_sweda_tms2(/;"	d
machine_is_sx1	arch/arm/include/asm/mach-types.h	/^# define machine_is_sx1(/;"	d
machine_is_synergy	arch/arm/include/asm/mach-types.h	/^# define machine_is_synergy(/;"	d
machine_is_synology_6282	arch/arm/include/asm/mach-types.h	/^# define machine_is_synology_6282(/;"	d
machine_is_t20	arch/arm/include/asm/mach-types.h	/^# define machine_is_t20(/;"	d
machine_is_t5325	arch/arm/include/asm/mach-types.h	/^# define machine_is_t5325(/;"	d
machine_is_t5388p	arch/arm/include/asm/mach-types.h	/^# define machine_is_t5388p(/;"	d
machine_is_t55	arch/arm/include/asm/mach-types.h	/^# define machine_is_t55(/;"	d
machine_is_tag	arch/arm/include/asm/mach-types.h	/^# define machine_is_tag(/;"	d
machine_is_tagw	arch/arm/include/asm/mach-types.h	/^# define machine_is_tagw(/;"	d
machine_is_tanna	arch/arm/include/asm/mach-types.h	/^# define machine_is_tanna(/;"	d
machine_is_tavorevb	arch/arm/include/asm/mach-types.h	/^# define machine_is_tavorevb(/;"	d
machine_is_tavorevb3	arch/arm/include/asm/mach-types.h	/^# define machine_is_tavorevb3(/;"	d
machine_is_tcc8000_sdk	arch/arm/include/asm/mach-types.h	/^# define machine_is_tcc8000_sdk(/;"	d
machine_is_tct_hammer	arch/arm/include/asm/mach-types.h	/^# define machine_is_tct_hammer(/;"	d
machine_is_td3_rev1	arch/arm/include/asm/mach-types.h	/^# define machine_is_td3_rev1(/;"	d
machine_is_teenote	arch/arm/include/asm/mach-types.h	/^# define machine_is_teenote(/;"	d
machine_is_tegra_daytona	arch/arm/include/asm/mach-types.h	/^# define machine_is_tegra_daytona(/;"	d
machine_is_tegra_e1165	arch/arm/include/asm/mach-types.h	/^# define machine_is_tegra_e1165(/;"	d
machine_is_tegra_swordfish	arch/arm/include/asm/mach-types.h	/^# define machine_is_tegra_swordfish(/;"	d
machine_is_tegra_vogue	arch/arm/include/asm/mach-types.h	/^# define machine_is_tegra_vogue(/;"	d
machine_is_tem3x30	arch/arm/include/asm/mach-types.h	/^# define machine_is_tem3x30(/;"	d
machine_is_tenderloin	arch/arm/include/asm/mach-types.h	/^# define machine_is_tenderloin(/;"	d
machine_is_tera_pro2_rack	arch/arm/include/asm/mach-types.h	/^# define machine_is_tera_pro2_rack(/;"	d
machine_is_terastation_pro2	arch/arm/include/asm/mach-types.h	/^# define machine_is_terastation_pro2(/;"	d
machine_is_terastation_wxl	arch/arm/include/asm/mach-types.h	/^# define machine_is_terastation_wxl(/;"	d
machine_is_teton_bga	arch/arm/include/asm/mach-types.h	/^# define machine_is_teton_bga(/;"	d
machine_is_thales_adc	arch/arm/include/asm/mach-types.h	/^# define machine_is_thales_adc(/;"	d
machine_is_thales_cbc	arch/arm/include/asm/mach-types.h	/^# define machine_is_thales_cbc(/;"	d
machine_is_thebe	arch/arm/include/asm/mach-types.h	/^# define machine_is_thebe(/;"	d
machine_is_ti8148evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_ti8148evm(/;"	d
machine_is_ti8168evm	arch/arm/include/asm/mach-types.h	/^# define machine_is_ti8168evm(/;"	d
machine_is_timu	arch/arm/include/asm/mach-types.h	/^# define machine_is_timu(/;"	d
machine_is_tin307	arch/arm/include/asm/mach-types.h	/^# define machine_is_tin307(/;"	d
machine_is_tin510	arch/arm/include/asm/mach-types.h	/^# define machine_is_tin510(/;"	d
machine_is_tiny_gurnard	arch/arm/include/asm/mach-types.h	/^# define machine_is_tiny_gurnard(/;"	d
machine_is_titan	arch/arm/include/asm/mach-types.h	/^# define machine_is_titan(/;"	d
machine_is_tjinc1000	arch/arm/include/asm/mach-types.h	/^# define machine_is_tjinc1000(/;"	d
machine_is_tm_efdc	arch/arm/include/asm/mach-types.h	/^# define machine_is_tm_efdc(/;"	d
machine_is_tn200	arch/arm/include/asm/mach-types.h	/^# define machine_is_tn200(/;"	d
machine_is_tnetv107x	arch/arm/include/asm/mach-types.h	/^# define machine_is_tnetv107x(/;"	d
machine_is_tny_t3530	arch/arm/include/asm/mach-types.h	/^# define machine_is_tny_t3530(/;"	d
machine_is_tonga2_tfttimer	arch/arm/include/asm/mach-types.h	/^# define machine_is_tonga2_tfttimer(/;"	d
machine_is_top9000	arch/arm/include/asm/mach-types.h	/^# define machine_is_top9000(/;"	d
machine_is_top9000_bsl	arch/arm/include/asm/mach-types.h	/^# define machine_is_top9000_bsl(/;"	d
machine_is_top9000_eval	arch/arm/include/asm/mach-types.h	/^# define machine_is_top9000_eval(/;"	d
machine_is_top9000_su	arch/arm/include/asm/mach-types.h	/^# define machine_is_top9000_su(/;"	d
machine_is_top9000_tcu	arch/arm/include/asm/mach-types.h	/^# define machine_is_top9000_tcu(/;"	d
machine_is_torbreck	arch/arm/include/asm/mach-types.h	/^# define machine_is_torbreck(/;"	d
machine_is_tornado3240	arch/arm/include/asm/mach-types.h	/^# define machine_is_tornado3240(/;"	d
machine_is_tosa	arch/arm/include/asm/mach-types.h	/^# define machine_is_tosa(/;"	d
machine_is_touchbook	arch/arm/include/asm/mach-types.h	/^# define machine_is_touchbook(/;"	d
machine_is_tpt_2_0	arch/arm/include/asm/mach-types.h	/^# define machine_is_tpt_2_0(/;"	d
machine_is_tq6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_tq6410(/;"	d
machine_is_tqma35	arch/arm/include/asm/mach-types.h	/^# define machine_is_tqma35(/;"	d
machine_is_tqma9263	arch/arm/include/asm/mach-types.h	/^# define machine_is_tqma9263(/;"	d
machine_is_transcede	arch/arm/include/asm/mach-types.h	/^# define machine_is_transcede(/;"	d
machine_is_treo680	arch/arm/include/asm/mach-types.h	/^# define machine_is_treo680(/;"	d
machine_is_tricorder	arch/arm/include/asm/mach-types.h	/^# define machine_is_tricorder(/;"	d
machine_is_trident	arch/arm/include/asm/mach-types.h	/^# define machine_is_trident(/;"	d
machine_is_trimslice	arch/arm/include/asm/mach-types.h	/^# define machine_is_trimslice(/;"	d
machine_is_tripel	arch/arm/include/asm/mach-types.h	/^# define machine_is_tripel(/;"	d
machine_is_tritip	arch/arm/include/asm/mach-types.h	/^# define machine_is_tritip(/;"	d
machine_is_trizeps4	arch/arm/include/asm/mach-types.h	/^# define machine_is_trizeps4(/;"	d
machine_is_trizeps4wl	arch/arm/include/asm/mach-types.h	/^# define machine_is_trizeps4wl(/;"	d
machine_is_trout	arch/arm/include/asm/mach-types.h	/^# define machine_is_trout(/;"	d
machine_is_ts219	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts219(/;"	d
machine_is_ts3	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts3(/;"	d
machine_is_ts409	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts409(/;"	d
machine_is_ts41x	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts41x(/;"	d
machine_is_ts42xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts42xx(/;"	d
machine_is_ts47xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts47xx(/;"	d
machine_is_ts4800	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts4800(/;"	d
machine_is_ts48xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts48xx(/;"	d
machine_is_ts72xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts72xx(/;"	d
machine_is_ts75xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts75xx(/;"	d
machine_is_ts78xx	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts78xx(/;"	d
machine_is_ts_x09	arch/arm/include/asm/mach-types.h	/^# define machine_is_ts_x09(/;"	d
machine_is_tsoploader	arch/arm/include/asm/mach-types.h	/^# define machine_is_tsoploader(/;"	d
machine_is_tsunagi	arch/arm/include/asm/mach-types.h	/^# define machine_is_tsunagi(/;"	d
machine_is_ttc_dkb	arch/arm/include/asm/mach-types.h	/^# define machine_is_ttc_dkb(/;"	d
machine_is_tube	arch/arm/include/asm/mach-types.h	/^# define machine_is_tube(/;"	d
machine_is_tulip	arch/arm/include/asm/mach-types.h	/^# define machine_is_tulip(/;"	d
machine_is_tuna	arch/arm/include/asm/mach-types.h	/^# define machine_is_tuna(/;"	d
machine_is_tuxrail	arch/arm/include/asm/mach-types.h	/^# define machine_is_tuxrail(/;"	d
machine_is_tx28	arch/arm/include/asm/mach-types.h	/^# define machine_is_tx28(/;"	d
machine_is_tx53	arch/arm/include/asm/mach-types.h	/^# define machine_is_tx53(/;"	d
machine_is_u300	arch/arm/include/asm/mach-types.h	/^# define machine_is_u300(/;"	d
machine_is_u5500	arch/arm/include/asm/mach-types.h	/^# define machine_is_u5500(/;"	d
machine_is_ubisys_p9d_evp	arch/arm/include/asm/mach-types.h	/^# define machine_is_ubisys_p9d_evp(/;"	d
machine_is_uemd	arch/arm/include/asm/mach-types.h	/^# define machine_is_uemd(/;"	d
machine_is_unino1	arch/arm/include/asm/mach-types.h	/^# define machine_is_unino1(/;"	d
machine_is_unisdev	arch/arm/include/asm/mach-types.h	/^# define machine_is_unisdev(/;"	d
machine_is_unisense_mmm	arch/arm/include/asm/mach-types.h	/^# define machine_is_unisense_mmm(/;"	d
machine_is_unit2s	arch/arm/include/asm/mach-types.h	/^# define machine_is_unit2s(/;"	d
machine_is_universal_c210	arch/arm/include/asm/mach-types.h	/^# define machine_is_universal_c210(/;"	d
machine_is_usb_a9260	arch/arm/include/asm/mach-types.h	/^# define machine_is_usb_a9260(/;"	d
machine_is_usb_a9263	arch/arm/include/asm/mach-types.h	/^# define machine_is_usb_a9263(/;"	d
machine_is_usdloader	arch/arm/include/asm/mach-types.h	/^# define machine_is_usdloader(/;"	d
machine_is_utm300	arch/arm/include/asm/mach-types.h	/^# define machine_is_utm300(/;"	d
machine_is_valdez	arch/arm/include/asm/mach-types.h	/^# define machine_is_valdez(/;"	d
machine_is_vangogh	arch/arm/include/asm/mach-types.h	/^# define machine_is_vangogh(/;"	d
machine_is_vc0718	arch/arm/include/asm/mach-types.h	/^# define machine_is_vc0718(/;"	d
machine_is_ventana	arch/arm/include/asm/mach-types.h	/^# define machine_is_ventana(/;"	d
machine_is_verdi	arch/arm/include/asm/mach-types.h	/^# define machine_is_verdi(/;"	d
machine_is_verdi_lte	arch/arm/include/asm/mach-types.h	/^# define machine_is_verdi_lte(/;"	d
machine_is_veridis_a300	arch/arm/include/asm/mach-types.h	/^# define machine_is_veridis_a300(/;"	d
machine_is_versatile_ab	arch/arm/include/asm/mach-types.h	/^# define machine_is_versatile_ab(/;"	d
machine_is_versatile_pb	arch/arm/include/asm/mach-types.h	/^# define machine_is_versatile_pb(/;"	d
machine_is_vexpress	arch/arm/include/asm/mach-types.h	/^# define machine_is_vexpress(/;"	d
machine_is_vigor	arch/arm/include/asm/mach-types.h	/^# define machine_is_vigor(/;"	d
machine_is_viper	arch/arm/include/asm/mach-types.h	/^# define machine_is_viper(/;"	d
machine_is_viprinet	arch/arm/include/asm/mach-types.h	/^# define machine_is_viprinet(/;"	d
machine_is_vit_ibox	arch/arm/include/asm/mach-types.h	/^# define machine_is_vit_ibox(/;"	d
machine_is_vivo	arch/arm/include/asm/mach-types.h	/^# define machine_is_vivo(/;"	d
machine_is_vivow_ct	arch/arm/include/asm/mach-types.h	/^# define machine_is_vivow_ct(/;"	d
machine_is_vmx25	arch/arm/include/asm/mach-types.h	/^# define machine_is_vmx25(/;"	d
machine_is_vmx51	arch/arm/include/asm/mach-types.h	/^# define machine_is_vmx51(/;"	d
machine_is_vmx53	arch/arm/include/asm/mach-types.h	/^# define machine_is_vmx53(/;"	d
machine_is_voiceblue	arch/arm/include/asm/mach-types.h	/^# define machine_is_voiceblue(/;"	d
machine_is_vpac270	arch/arm/include/asm/mach-types.h	/^# define machine_is_vpac270(/;"	d
machine_is_vpr200	arch/arm/include/asm/mach-types.h	/^# define machine_is_vpr200(/;"	d
machine_is_vr1000	arch/arm/include/asm/mach-types.h	/^# define machine_is_vr1000(/;"	d
machine_is_vstms	arch/arm/include/asm/mach-types.h	/^# define machine_is_vstms(/;"	d
machine_is_vvbox_sdlite2	arch/arm/include/asm/mach-types.h	/^# define machine_is_vvbox_sdlite2(/;"	d
machine_is_vvbox_sdorig2	arch/arm/include/asm/mach-types.h	/^# define machine_is_vvbox_sdorig2(/;"	d
machine_is_vvbox_sdpro4	arch/arm/include/asm/mach-types.h	/^# define machine_is_vvbox_sdpro4(/;"	d
machine_is_w21	arch/arm/include/asm/mach-types.h	/^# define machine_is_w21(/;"	d
machine_is_w90n960evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_w90n960evb(/;"	d
machine_is_w90p910evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_w90p910evb(/;"	d
machine_is_w90p950evb	arch/arm/include/asm/mach-types.h	/^# define machine_is_w90p950evb(/;"	d
machine_is_wario	arch/arm/include/asm/mach-types.h	/^# define machine_is_wario(/;"	d
machine_is_wasabi	arch/arm/include/asm/mach-types.h	/^# define machine_is_wasabi(/;"	d
machine_is_watson_efm_plugin	arch/arm/include/asm/mach-types.h	/^# define machine_is_watson_efm_plugin(/;"	d
machine_is_wb40n	arch/arm/include/asm/mach-types.h	/^# define machine_is_wb40n(/;"	d
machine_is_wbd111	arch/arm/include/asm/mach-types.h	/^# define machine_is_wbd111(/;"	d
machine_is_wbd222	arch/arm/include/asm/mach-types.h	/^# define machine_is_wbd222(/;"	d
machine_is_wg302v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_wg302v2(/;"	d
machine_is_whistler	arch/arm/include/asm/mach-types.h	/^# define machine_is_whistler(/;"	d
machine_is_wlan_computer	arch/arm/include/asm/mach-types.h	/^# define machine_is_wlan_computer(/;"	d
machine_is_wlf_cragg_6410	arch/arm/include/asm/mach-types.h	/^# define machine_is_wlf_cragg_6410(/;"	d
machine_is_wm8505_7in_netbook	arch/arm/include/asm/mach-types.h	/^# define machine_is_wm8505_7in_netbook(/;"	d
machine_is_wm8650refboard	arch/arm/include/asm/mach-types.h	/^# define machine_is_wm8650refboard(/;"	d
machine_is_wn802t	arch/arm/include/asm/mach-types.h	/^# define machine_is_wn802t(/;"	d
machine_is_wnr854t	arch/arm/include/asm/mach-types.h	/^# define machine_is_wnr854t(/;"	d
machine_is_wrt350n_v2	arch/arm/include/asm/mach-types.h	/^# define machine_is_wrt350n_v2(/;"	d
machine_is_wtplug	arch/arm/include/asm/mach-types.h	/^# define machine_is_wtplug(/;"	d
machine_is_xarina	arch/arm/include/asm/mach-types.h	/^# define machine_is_xarina(/;"	d
machine_is_xcep	arch/arm/include/asm/mach-types.h	/^# define machine_is_xcep(/;"	d
machine_is_xilinx	arch/arm/include/asm/mach-types.h	/^# define machine_is_xilinx(/;"	d
machine_is_xilinx_ep107	arch/arm/include/asm/mach-types.h	/^# define machine_is_xilinx_ep107(/;"	d
machine_is_xp860	arch/arm/include/asm/mach-types.h	/^# define machine_is_xp860(/;"	d
machine_is_xsbase255	arch/arm/include/asm/mach-types.h	/^# define machine_is_xsbase255(/;"	d
machine_is_yanomami	arch/arm/include/asm/mach-types.h	/^# define machine_is_yanomami(/;"	d
machine_is_yl9200	arch/arm/include/asm/mach-types.h	/^# define machine_is_yl9200(/;"	d
machine_is_z3_814x_mod	arch/arm/include/asm/mach-types.h	/^# define machine_is_z3_814x_mod(/;"	d
machine_is_z3_816x_mod	arch/arm/include/asm/mach-types.h	/^# define machine_is_z3_816x_mod(/;"	d
machine_is_zipit2	arch/arm/include/asm/mach-types.h	/^# define machine_is_zipit2(/;"	d
machine_is_zmx25	arch/arm/include/asm/mach-types.h	/^# define machine_is_zmx25(/;"	d
machine_is_zylonite	arch/arm/include/asm/mach-types.h	/^# define machine_is_zylonite(/;"	d
machine_is_zylonite2	arch/arm/include/asm/mach-types.h	/^# define machine_is_zylonite2(/;"	d
machine_param	board/samsung/arndale/arndale_spl.c	/^static struct spl_machine_param machine_param$/;"	v	typeref:struct:spl_machine_param	file:
machine_param	board/samsung/smdk5250/smdk5250_spl.c	/^static struct spl_machine_param machine_param$/;"	v	typeref:struct:spl_machine_param	file:
machine_param	board/samsung/smdk5420/smdk5420_spl.c	/^static struct spl_machine_param machine_param$/;"	v	typeref:struct:spl_machine_param	file:
machinecheck_count	arch/powerpc/cpu/mpc85xx/traps.c	/^int machinecheck_count = 0;$/;"	v	typeref:typename:int
machinecheck_error	arch/powerpc/cpu/mpc85xx/traps.c	/^int machinecheck_error = 0;$/;"	v	typeref:typename:int
macid0h	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int macid0h;		\/* offset 0x34 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
macid0l	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int macid0l;		\/* offset 0x30 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
macid1h	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int macid1h;		\/* offset 0x3c *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
macid1l	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int macid1l;		\/* offset 0x38 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
macl	arch/sh/include/asm/ptrace.h	/^	unsigned long macl;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
macl_data	include/vsc9953.h	/^	u32	macl_data;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
macronix_quad_enable	drivers/mtd/spi/spi_flash.c	/^static int macronix_quad_enable(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
macsr	drivers/net/ftgmac100.h	/^	unsigned int	macsr;		\/* 0x54 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
macsr	drivers/net/ftmac100.h	/^	unsigned int	macsr;		\/* 0x8c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
macsr	drivers/net/ftmac110.h	/^	uint32_t macsr;  \/* 0x8C: MAC Status Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
macstnaddr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	macstnaddr1;	\/* Station Addr Part 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
macstnaddr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	macstnaddr1;	\/* 0x24540 - Station Address Part 1 Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
macstnaddr1	include/fsl_dtsec.h	/^	u32	macstnaddr1;	\/* MAC station address 1 *\/$/;"	m	struct:dtsec	typeref:typename:u32
macstnaddr1	include/linux/immap_qe.h	/^	u32 macstnaddr1;	\/* mac station address part 1 reg      *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
macstnaddr1	include/tsec.h	/^	u32	macstnaddr1;	\/* Station Address, part 1 *\/$/;"	m	struct:tsec	typeref:typename:u32
macstnaddr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	macstnaddr2;	\/* Station Addr Part 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
macstnaddr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	macstnaddr2;	\/* 0x24544 - Station Address Part 2 Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
macstnaddr2	include/fsl_dtsec.h	/^	u32	macstnaddr2;	\/* MAC station address 2 *\/$/;"	m	struct:dtsec	typeref:typename:u32
macstnaddr2	include/linux/immap_qe.h	/^	u32 macstnaddr2;	\/* mac station address part 2 reg      *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
macstnaddr2	include/tsec.h	/^	u32	macstnaddr2;	\/* Station Address, part 2 *\/$/;"	m	struct:tsec	typeref:typename:u32
mact_indx	include/vsc9953.h	/^	u32	mact_indx;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
madpcr0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpcr0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpcr0	include/fsl_mmdc.h	/^	u32 madpcr0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpcr1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpcr1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpcr1	include/fsl_mmdc.h	/^	u32 madpcr1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpsr0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpsr0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpsr0	include/fsl_mmdc.h	/^	u32 madpsr0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpsr1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpsr1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpsr1	include/fsl_mmdc.h	/^	u32 madpsr1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpsr2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpsr2;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpsr2	include/fsl_mmdc.h	/^	u32 madpsr2;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpsr3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpsr3;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpsr3	include/fsl_mmdc.h	/^	u32 madpsr3;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpsr4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpsr4;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpsr4	include/fsl_mmdc.h	/^	u32 madpsr4;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madpsr5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 madpsr5;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
madpsr5	include/fsl_mmdc.h	/^	u32 madpsr5;$/;"	m	struct:mmdc_regs	typeref:typename:u32
madr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 madr;		\/* I2Cn + 0x00 *\/$/;"	m	struct:i2c512x_dev	typeref:typename:volatile u32
madr	drivers/net/lpc32xx_eth.c	/^	u32 madr;		\/* MII management address register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
madr	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic madr; \/* 0x2a0 *\/$/;"	m	struct:pic32_mii_regs	typeref:struct:pic32_reg_atomic
madr	include/mpc5xxx.h	/^	volatile u32 madr;		\/* I2Cn + 0x00 *\/$/;"	m	struct:mpc5xxx_i2c	typeref:typename:volatile u32
maer	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 maer;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 maer;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 maer;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 maer;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 maer;		\/* 0x94 master enable register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 maer;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 maer;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 maer;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 maer;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 maer;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 maer;		\/* 0x94 master enable register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maer	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 maer;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
maexidr0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 maexidr0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
maexidr0	include/fsl_mmdc.h	/^	u32 maexidr0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
maexidr1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 maexidr1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
maexidr1	include/fsl_mmdc.h	/^	u32 maexidr1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
magenp	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 magenp;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
magenp	include/fsl_mmdc.h	/^	u32 magenp;$/;"	m	struct:mmdc_regs	typeref:typename:u32
magic	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint8_t magic[8];	\/* ="eGON.BT0" or "eGON.BT1", not C-style str *\/$/;"	m	struct:boot_file_head	typeref:typename:uint8_t[8]
magic	arch/arm/include/asm/arch/spl.h	/^	uint8_t magic[8];	\/* ="eGON.BT0" or "eGON.BT1", not C-style str *\/$/;"	m	struct:boot_file_head	typeref:typename:uint8_t[8]
magic	arch/arm/include/asm/setup.h	/^	    unsigned long magic;$/;"	m	struct:param_struct::__anon61e8c52b030a::__anon61e8c52b0408	typeref:typename:unsigned long
magic	arch/x86/cpu/broadwell/refcode.c	/^	uint16_t magic;$/;"	m	struct:rmodule_header	typeref:typename:uint16_t	file:
magic	arch/x86/include/asm/coreboot_tables.h	/^	u32 magic;$/;"	m	struct:cbmem_entry	typeref:typename:u32
magic	board/birdland/bav335x/board.h	/^	unsigned int  magic;$/;"	m	struct:board_eeconfig	typeref:typename:unsigned int
magic	board/bosch/shc/board.h	/^	u32  magic;$/;"	m	struct:shc_eeprom	typeref:typename:u32
magic	board/corscience/tricorder/tricorder-eeprom.c	/^		uint32_t magic;$/;"	m	struct:handle_eeprom_v0::tricorder_eeprom_v0	typeref:typename:uint32_t	file:
magic	board/corscience/tricorder/tricorder-eeprom.h	/^	uint32_t magic;$/;"	m	struct:tricorder_eeprom	typeref:typename:uint32_t
magic	board/esd/vme8349/caddy.h	/^	uint8_t  magic[16];$/;"	m	struct:caddy_interface	typeref:typename:uint8_t[16]
magic	board/gdsys/p1022/controlcenterd-id.c	/^	uint32_t magic;$/;"	m	struct:key_program	typeref:typename:uint32_t	file:
magic	board/ifm/ac14xx/ac14xx.c	/^	char	magic[3];	\/** 'ifm' *\/$/;"	m	struct:eeprom_layout	typeref:typename:char[3]	file:
magic	board/siemens/draco/board.c	/^	u32 magic;$/;"	m	struct:am335x_nand_geometry	typeref:typename:u32	file:
magic	board/siemens/draco/board.h	/^	unsigned int  magic;$/;"	m	struct:chip_data	typeref:typename:unsigned int
magic	board/siemens/draco/board.h	/^	unsigned int magic;			\/* 0x33524444 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
magic	board/vscom/baltos/board.h	/^	unsigned int  magic;$/;"	m	struct:am335x_baseboard_id	typeref:typename:unsigned int
magic	cmd/booti.c	/^	uint32_t	magic;		\/* Magic number *\/$/;"	m	struct:Image_header	typeref:typename:uint32_t	file:
magic	common/bootstage.c	/^	uint32_t magic;		\/* Unused *\/$/;"	m	struct:bootstage_hdr	typeref:typename:uint32_t	file:
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32  magic;$/;"	m	struct:ubi_ec_hdr	typeref:typename:__be32
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32  magic;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32 magic;$/;"	m	struct:ubi_fm_eba	typeref:typename:__be32
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32 magic;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32 magic;$/;"	m	struct:ubi_fm_sb	typeref:typename:__be32
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32 magic;$/;"	m	struct:ubi_fm_scan_pool	typeref:typename:__be32
magic	drivers/mtd/ubi/ubi-media.h	/^	__be32 magic;$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__be32
magic	fs/jffs2/summary.h	/^	__u32 magic; 	\/* == JFFS2_SUM_MAGIC *\/$/;"	m	struct:jffs2_sum_marker	typeref:typename:__u32
magic	fs/ubifs/ubifs-media.h	/^	__le32 magic;$/;"	m	struct:ubifs_ch	typeref:typename:__le32
magic	fs/yaffs2/yaffs_guts.h	/^	u32 magic;$/;"	m	struct:yaffs_checkpt_validity	typeref:typename:u32
magic	include/android_image.h	/^	char magic[ANDR_BOOT_MAGIC_SIZE];$/;"	m	struct:andr_img_hdr	typeref:typename:char[]
magic	include/api_public.h	/^	char		magic[API_SIG_MAGLEN];	\/* magic string *\/$/;"	m	struct:api_signature	typeref:typename:char[]
magic	include/cbfs.h	/^	u32 magic;$/;"	m	struct:cbfs_header	typeref:typename:u32
magic	include/cbfs.h	/^	u8 magic[8];$/;"	m	struct:cbfs_fileheader	typeref:typename:u8[8]
magic	include/cramfs/cramfs_fs.h	/^	u32 magic;			\/* 0x28cd3d45 - random number *\/$/;"	m	struct:cramfs_super	typeref:typename:u32
magic	include/ext_common.h	/^	__le16 magic;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
magic	include/fdt.h	/^	fdt32_t magic;			 \/* magic word FDT_MAGIC *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
magic	include/fsl_qe.h	/^		u8 magic[3];	\/* Set to { 'Q', 'E', 'F' } *\/$/;"	m	struct:qe_firmware::qe_header	typeref:typename:u8[3]
magic	include/jffs2/jffs2.h	/^	__u16 magic;      \/* A constant magic number.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u16
magic	include/jffs2/jffs2.h	/^	__u16 magic;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u16
magic	include/jffs2/jffs2.h	/^	__u16 magic;$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u16
magic	include/jffs2/jffs2.h	/^	__u16 magic;$/;"	m	struct:jffs2_unknown_node	typeref:typename:__u16
magic	include/linux/ethtool.h	/^	__u32	magic;$/;"	m	struct:ethtool_eeprom	typeref:typename:__u32
magic	include/sparse_format.h	/^  __le32	magic;		\/* 0xed26ff3a *\/$/;"	m	struct:sparse_header	typeref:typename:__le32
magic	lib/lz4_wrapper.c	/^	u32 magic;$/;"	m	struct:lz4_frame_header	typeref:typename:u32	file:
magic	tools/aisimage.h	/^	uint32_t magic;$/;"	m	struct:ais_header	typeref:typename:uint32_t
magic	tools/ublimage.h	/^	uint32_t	magic;	\/* Magic Number, see UBL_* defines *\/$/;"	m	struct:ubl_header	typeref:typename:uint32_t
mahr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	mahr;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
mahr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	mahr;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
mahr	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	mahr;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
maht0	drivers/net/ftgmac100.h	/^	unsigned int	maht0;		\/* 0x10 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
maht0	drivers/net/ftmac100.h	/^	unsigned int	maht0;		\/* 0x10 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
maht1	drivers/net/ftgmac100.h	/^	unsigned int	maht1;		\/* 0x14 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
maht1	drivers/net/ftmac100.h	/^	unsigned int	maht1;		\/* 0x14 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
mail	scripts/mailmapper	/^    mail = '<' + mail.rstrip()$/;"	v
mail	scripts/mailmapper	/^    tmp, mail = line.split('<')$/;"	v
mail_vs_name	scripts/mailmapper	/^mail_vs_name = {}$/;"	v
mailbox	arch/arm/dts/am33xx.dtsi	/^		mailbox: mailbox@480C8000 {$/;"	l
mailbox	arch/arm/dts/am4372.dtsi	/^		mailbox: mailbox@480C8000 {$/;"	l
mailbox1	arch/arm/dts/dra7.dtsi	/^		mailbox1: mailbox@4a0f4000 {$/;"	l
mailbox10	arch/arm/dts/dra7.dtsi	/^		mailbox10: mailbox@48860000 {$/;"	l
mailbox11	arch/arm/dts/dra7.dtsi	/^		mailbox11: mailbox@48862000 {$/;"	l
mailbox12	arch/arm/dts/dra7.dtsi	/^		mailbox12: mailbox@48864000 {$/;"	l
mailbox13	arch/arm/dts/dra7.dtsi	/^		mailbox13: mailbox@48802000 {$/;"	l
mailbox2	arch/arm/dts/dra7.dtsi	/^		mailbox2: mailbox@4883a000 {$/;"	l
mailbox3	arch/arm/dts/dra7.dtsi	/^		mailbox3: mailbox@4883c000 {$/;"	l
mailbox4	arch/arm/dts/dra7.dtsi	/^		mailbox4: mailbox@4883e000 {$/;"	l
mailbox5	arch/arm/dts/dra7.dtsi	/^		mailbox5: mailbox@48840000 {$/;"	l
mailbox6	arch/arm/dts/dra7.dtsi	/^		mailbox6: mailbox@48842000 {$/;"	l
mailbox7	arch/arm/dts/dra7.dtsi	/^		mailbox7: mailbox@48844000 {$/;"	l
mailbox8	arch/arm/dts/dra7.dtsi	/^		mailbox8: mailbox@48846000 {$/;"	l
mailbox9	arch/arm/dts/dra7.dtsi	/^		mailbox9: mailbox@4885e000 {$/;"	l
mailboxclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mailboxclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mailmap	scripts/get_maintainer.pl	/^sub mailmap {$/;"	s
mailmap_email	scripts/get_maintainer.pl	/^sub mailmap_email {$/;"	s
mailmap_files	scripts/mailmapper	/^mailmap_files = []$/;"	v
main	arch/arm/dts/at91sam9260.dtsi	/^				main: mainck {$/;"	l	label:pmc
main	arch/arm/dts/at91sam9261.dtsi	/^				main: mainck {$/;"	l	label:pmc
main	arch/arm/dts/at91sam9263.dtsi	/^				main: mainck {$/;"	l	label:pmc
main	arch/arm/dts/at91sam9g45.dtsi	/^				main: mainck {$/;"	l	label:pmc
main	arch/arm/dts/sama5d2.dtsi	/^				main: mainck {$/;"	l	label:pmc
main	arch/arm/lib/asm-offsets.c	/^int main(void)$/;"	f	typeref:typename:int
main	arch/arm/lib/asm-offsets.s	/^main:$/;"	l
main	arch/nds32/lib/asm-offsets.c	/^int main(void)$/;"	f	typeref:typename:int
main	arch/sandbox/cpu/start.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	arch/x86/lib/asm-offsets.c	/^int main(void)$/;"	f	typeref:typename:int
main	board/samsung/origen/tools/mkorigenspl.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	board/samsung/smdkv310/tools/mksmdkv310spl.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	common/hwconfig.c	/^int main()$/;"	f	typeref:typename:int
main	drivers/mtd/ubi/crc32.c	/^int main(void)$/;"	f	typeref:typename:int
main	examples/api/demo.c	/^int main(int argc, char * const argv[])$/;"	f	typeref:typename:int
main	lib/asm-offsets.c	/^int main(void)$/;"	f	typeref:typename:int
main	lib/asm-offsets.s	/^main:$/;"	l
main	lib/slre.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	scripts/basic/fixdep.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	scripts/docproc.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	scripts/fill_scrapyard.py	/^def main():$/;"	f
main	scripts/kconfig/conf.c	/^int main(int ac, char **av)$/;"	f	typeref:typename:int
main	scripts/kconfig/gconf.c	/^int main(int ac, char *av[])$/;"	f	typeref:typename:int
main	scripts/kconfig/kxgettext.c	/^int main(int ac, char **av)$/;"	f	typeref:typename:int
main	scripts/kconfig/mconf.c	/^int main(int ac, char **av)$/;"	f	typeref:typename:int
main	scripts/kconfig/nconf.c	/^int main(int ac, char **av)$/;"	f	typeref:typename:int
main	scripts/kconfig/qconf.cc	/^int main(int ac, char** av)$/;"	f	typeref:typename:int
main	test/image/test-imagetools.sh	/^main()$/;"	f
main	tools/atmel_pmecc_params.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/bin2header.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/bmp_logo.c	/^int main (int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/dumpimage.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/easylogo/easylogo.c	/^int main (int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/env/fw_env_main.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/envcrc.c	/^int main (int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/fdtgrep.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/fit_check_sign.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/fit_info.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/gdb/gdbcont.c	/^main(int ac, char **av)$/;"	f	typeref:typename:int
main	tools/gdb/gdbsend.c	/^main(int ac, char **av)$/;"	f	typeref:typename:int
main	tools/gen_eth_addr.c	/^main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/genboardscfg.py	/^def main():$/;"	f
main	tools/ifdtool.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/img2srec.c	/^int main( int argc, char *argv[ ])$/;"	f	typeref:typename:int
main	tools/kwboot.c	/^main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/mkenvimage.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/mkexynosspl.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/mkimage.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/mksunxiboot.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/moveconfig.py	/^def main():$/;"	f
main	tools/mxsboot.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/ncb.c	/^int main (int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/omap/clocks_get_m_n.c	/^void main(void)$/;"	f	typeref:typename:void
main	tools/proftool.c	/^int main(int argc, char *argv[])$/;"	f	typeref:typename:int
main	tools/relocate-rela.c	/^int main(int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/ubsha1.c	/^int main (int argc, char **argv)$/;"	f	typeref:typename:int
main	tools/xway-swap-bytes.c	/^int main (void)$/;"	f	typeref:typename:int
mainGtU	lib/bzip2/bzlib_blocksort.c	/^Bool mainGtU ( UInt32  i1, $/;"	f	typeref:typename:Bool	file:
mainQSort3	lib/bzip2/bzlib_blocksort.c	/^void mainQSort3 ( UInt32* ptr,$/;"	f	typeref:typename:void	file:
mainSimpleSort	lib/bzip2/bzlib_blocksort.c	/^void mainSimpleSort ( UInt32* ptr,$/;"	f	typeref:typename:void	file:
mainSort	lib/bzip2/bzlib_blocksort.c	/^void mainSort ( UInt32* ptr, $/;"	f	typeref:typename:void	file:
main_area	drivers/mtd/nand/mxc_nand.h	/^	u8 main_area[NAND_MXC_NR_BUFS][0x200];$/;"	m	struct:mxc_nand_regs	typeref:typename:u8[][0x200]
main_buf	include/linux/mtd/onenand.h	/^	unsigned char		*main_buf;$/;"	m	struct:onenand_chip	typeref:typename:unsigned char *
main_bytes	fs/ubifs/ubifs.h	/^	long long main_bytes;$/;"	m	struct:ubifs_info	typeref:typename:long long
main_clk_rate_hz	arch/arm/include/asm/global_data.h	/^	unsigned long	main_clk_rate_hz;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
main_first	fs/ubifs/ubifs.h	/^	int main_first;$/;"	m	struct:ubifs_info	typeref:typename:int
main_hdr_v0	tools/kwbimage.h	/^struct main_hdr_v0 {$/;"	s
main_hdr_v1	tools/kwbimage.h	/^struct main_hdr_v1 {$/;"	s
main_idx	doc/DocBook/Makefile	/^main_idx = $(obj)\/$(index)$/;"	m
main_lebs	fs/ubifs/ubifs.h	/^	int main_lebs;$/;"	m	struct:ubifs_info	typeref:typename:int
main_loop	common/main.c	/^void main_loop(void)$/;"	f	typeref:typename:void
main_mask	include/mpc5xxx.h	/^	volatile u32	main_mask;	\/* INTR + 0x14 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
main_nand_sdmmc_clk	arch/arm/dts/socfpga.dtsi	/^						main_nand_sdmmc_clk: main_nand_sdmmc_clk {$/;"	l	label:main_pll
main_osc	arch/arm/dts/at91sam9260.dtsi	/^				main_osc: main_osc {$/;"	l	label:pmc
main_osc	arch/arm/dts/at91sam9261.dtsi	/^				main_osc: main_osc {$/;"	l	label:pmc
main_osc	arch/arm/dts/at91sam9263.dtsi	/^				main_osc: main_osc {$/;"	l	label:pmc
main_osc	arch/arm/dts/at91sam9g45.dtsi	/^				main_osc: main_osc {$/;"	l	label:pmc
main_osc_clk_enable	drivers/clk/at91/clk-main.c	/^static int main_osc_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
main_osc_clk_get_rate	drivers/clk/at91/clk-main.c	/^static ulong main_osc_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
main_osc_clk_match	drivers/clk/at91/clk-main.c	/^static const struct udevice_id main_osc_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
main_osc_clk_ops	drivers/clk/at91/clk-main.c	/^static struct clk_ops main_osc_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
main_osc_clk_probe	drivers/clk/at91/clk-main.c	/^static int main_osc_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
main_pll	arch/arm/dts/socfpga.dtsi	/^					main_pll: main_pll {$/;"	l
main_pll	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	struct socfpga_clock_manager_main_pll main_pll;$/;"	m	struct:socfpga_clock_manager	typeref:struct:socfpga_clock_manager_main_pll
main_pll_config	board/ti/ks2_evm/board_k2g.c	/^static struct pll_init_data main_pll_config[NUM_SPDS] = {$/;"	v	typeref:struct:pll_init_data[]	file:
main_pll_init_ti816x	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^static void main_pll_init_ti816x(void)$/;"	f	typeref:typename:void	file:
main_pri1	include/mpc5xxx.h	/^	volatile u32	main_pri1;	\/* INTR + 0x18 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
main_pri2	include/mpc5xxx.h	/^	volatile u32	main_pri2;	\/* INTR + 0x1c *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
main_qspi_clk	arch/arm/dts/socfpga.dtsi	/^						main_qspi_clk: main_qspi_clk {$/;"	l	label:main_pll
main_state	arch/sandbox/cpu/state.c	/^static struct sandbox_state main_state;$/;"	v	typeref:struct:sandbox_state	file:
main_status	include/mpc5xxx.h	/^	volatile u32	main_status;	\/* INTR + 0x2c *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
main_vco_base	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t main_vco_base;$/;"	m	struct:cm_config	typeref:typename:uint32_t
main_window	scripts/kconfig/nconf.c	/^static WINDOW *main_window;$/;"	v	typeref:typename:WINDOW *	file:
main_wnd	scripts/kconfig/gconf.c	/^GtkWidget *main_wnd = NULL;$/;"	v	typeref:typename:GtkWidget *
main_xtal	arch/arm/dts/at91sam9260.dtsi	/^		main_xtal: main_xtal {$/;"	l
main_xtal	arch/arm/dts/at91sam9261.dtsi	/^		main_xtal: main_xtal {$/;"	l
main_xtal	arch/arm/dts/at91sam9263.dtsi	/^		main_xtal: main_xtal {$/;"	l
main_xtal	arch/arm/dts/at91sam9g45.dtsi	/^		main_xtal: main_xtal {$/;"	l
main_xtal	arch/arm/dts/sama5d2.dtsi	/^		main_xtal: main_xtal {$/;"	l
mainboard_fill_pei_data	arch/x86/cpu/broadwell/sdram.c	/^void mainboard_fill_pei_data(struct pei_data *pei_data)$/;"	f	typeref:typename:void
mainclk	arch/arm/dts/socfpga.dtsi	/^						mainclk: mainclk {$/;"	l	label:main_pll
mainclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	mainclk;$/;"	m	struct:socfpga_clock_manager_altera	typeref:typename:u32
mainclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	mainclk;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
mainclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t mainclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
maindiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	maindiv;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
maindiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t maindiv;$/;"	m	struct:cm_config	typeref:typename:uint32_t
mainmenu_stmt	scripts/kconfig/zconf.y	/^mainmenu_stmt: T_MAINMENU prompt nl$/;"	l
mainmuxclk	arch/arm/dts/keystone-clocks.dtsi	/^	mainmuxclk: mainmuxclk@2310108 {$/;"	l
mainnandsdmmcclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	mainnandsdmmcclk;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
mainnandsdmmcclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t mainnandsdmmcclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
mainpll	arch/arm/dts/armada-370-xp.dtsi	/^		mainpll: mainpll {$/;"	l
mainpll	arch/arm/dts/armada-375.dtsi	/^		mainpll: mainpll {$/;"	l
mainpll	arch/arm/dts/armada-38x.dtsi	/^		mainpll: mainpll {$/;"	l
mainpll_ctrl	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_ctrl;	\/* offset 0x400 *\/$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div1;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div4;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div5;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div6	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div6;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_div7	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_div7;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_freq1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_freq1;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_freq2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_freq2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_freq3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_freq3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_freq4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_freq4;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_freq5	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_freq5;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpll_pwd	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int mainpll_pwd;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
mainpllclk	arch/arm/dts/k2e-clocks.dtsi	/^	mainpllclk: mainpllclk@2310110 {$/;"	l
mainpllclk	arch/arm/dts/k2hk-clocks.dtsi	/^	mainpllclk: mainpllclk@2310110 {$/;"	l
mainpllclk	arch/arm/dts/k2l-clocks.dtsi	/^	mainpllclk: mainpllclk@2310110 {$/;"	l
mainqspiclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	mainqspiclk;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
mainqspiclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t mainqspiclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
maint_wanted	scripts/get_maintainer.pl	/^sub maint_wanted {$/;"	s
maintenance_done	include/tpm.h	/^	u8	maintenance_done;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
maj_rev	drivers/crypto/fsl/sec.c	/^		u8 maj_rev;$/;"	m	struct:caam_get_era::__anon5515d7630108	typeref:typename:u8	file:
major	arch/mips/mach-ath79/cpu.c	/^	const int major;$/;"	m	struct:ath79_soc_desc	typeref:typename:const int	file:
major	board/freescale/common/sys_eeprom.c	/^		u8 major;         \/* 0x04        Board revision, major *\/$/;"	m	struct:get_cpu_board_revision::board_eeprom	typeref:typename:u8	file:
major	board/freescale/common/sys_eeprom.c	/^	u8 major;         \/* 0x04        Board revision, major *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
major	include/fsl-mc/fsl_dpbp.h	/^		uint16_t major;$/;"	m	struct:dpbp_attr::__anonf56882c90108	typeref:typename:uint16_t
major	include/fsl-mc/fsl_dpio.h	/^		uint16_t major;$/;"	m	struct:dpio_attr::__anonf56c552f0108	typeref:typename:uint16_t
major	include/fsl-mc/fsl_dpmac.h	/^		uint16_t major;$/;"	m	struct:dpmac_attr::__anona3388a280108	typeref:typename:uint16_t
major	include/fsl-mc/fsl_dpmng.h	/^	uint32_t major;$/;"	m	struct:mc_version	typeref:typename:uint32_t
major	include/fsl-mc/fsl_dpni.h	/^		uint16_t major;$/;"	m	struct:dpni_attr::__anonf56ef98e0508	typeref:typename:uint16_t
major	include/fsl-mc/fsl_dprc.h	/^		uint16_t major;$/;"	m	struct:dprc_attributes::__anonf571118c0108	typeref:typename:uint16_t
major	include/fsl_qe.h	/^		u8 major;	\/* The SOC revision major *\/$/;"	m	struct:qe_firmware::__anon7a33fbc80108	typeref:typename:u8
major	include/fsl_qe.h	/^		u8 major;	\/* The microcode version major *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u8
major	tools/mxsimage.h	/^	uint16_t	major;$/;"	m	struct:sb_boot_image_version	typeref:typename:uint16_t
major_name	scripts/mailmapper	/^        major_name = sorted([prev_name, name],$/;"	v
major_rev_num	include/ata.h	/^	unsigned short  major_rev_num;	\/*  *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
major_ver	include/smbios.h	/^	u8 major_ver;$/;"	m	struct:smbios_entry	typeref:typename:u8
major_version	arch/x86/include/asm/arch-broadwell/me.h	/^	u32	major_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
major_version	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 major_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
major_version	include/mtd/cfi_flash.h	/^	u8	major_version;$/;"	m	struct:cfi_pri_hdr	typeref:typename:u8
major_version	include/sparse_format.h	/^  __le16	major_version;	\/* (0x1) - reject images with higher major versions *\/$/;"	m	struct:sparse_header	typeref:typename:__le16
major_version	tools/mxsimage.h	/^	uint8_t		major_version;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint8_t
makeGmListElement	common/dlmalloc.c	/^GmListElement* makeGmListElement (void* bas)$/;"	f	typeref:typename:GmListElement *	file:
makeMaps_d	lib/bzip2/bzlib_decompress.c	/^void makeMaps_d ( DState* s )$/;"	f	typeref:typename:void	file:
makeMaps_e	lib/bzip2/bzlib_compress.c	/^void makeMaps_e ( EState* s )$/;"	f	typeref:typename:void	file:
make_a_file	fs/yaffs2/yaffs_uboot_glue.c	/^void make_a_file(char *yaffsName, char bval, int sizeOfFile)$/;"	f	typeref:typename:void
make_argv	common/command.c	/^static int make_argv(char *s, int argvsz, char *argv[])$/;"	f	typeref:typename:int	file:
make_command_line	arch/blackfin/lib/boot.c	/^static char *make_command_line(void)$/;"	f	typeref:typename:char *	file:
make_crc_table	lib/crc32.c	/^local void make_crc_table()$/;"	f	typeref:typename:local void
make_crc_table	tools/pbl_crc32.c	/^static void make_crc_table(void)$/;"	f	typeref:typename:void	file:
make_cs1_contiguous	arch/arm/cpu/armv7/omap3/sdrc.c	/^void make_cs1_contiguous(void)$/;"	f	typeref:typename:void
make_devsel	drivers/usb/host/r8a66597.h	/^#define make_devsel(/;"	d
make_dtb	test/image/test-fit.py	/^def make_dtb():$/;"	f
make_exec	arch/sandbox/cpu/os.c	/^static int make_exec(char *fname, const void *data, int size)$/;"	f	typeref:typename:int	file:
make_fdt	lib/fdtdec_test.c	/^static int make_fdt(void *fdt, int size, const char *aliases,$/;"	f	typeref:typename:int	file:
make_fit	test/image/test-fit.py	/^def make_fit(mkimage, params):$/;"	f
make_fit	test/py/tests/test_vboot.py	/^    def make_fit(its):$/;"	f	function:test_vboot	file:
make_fname	test/image/test-fit.py	/^def make_fname(leaf):$/;"	f
make_free_space	fs/ubifs/budget.c	/^static int make_free_space(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
make_ftrace	tools/proftool.c	/^static int make_ftrace(void)$/;"	f	typeref:typename:int	file:
make_its	test/image/test-fit.py	/^def make_its(params):$/;"	f
make_kernel	test/image/test-fit.py	/^def make_kernel(filename, text):$/;"	f
make_le32	drivers/net/fsl-mc/dpio/qbman_sys.h	/^#define make_le32(/;"	d
make_le32	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline uint32_t make_le32(uint32_t val)$/;"	f	typeref:typename:uint32_t
make_le32_n	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void make_le32_n(uint32_t *val, unsigned int num)$/;"	f	typeref:typename:void
make_list_in	common/cli_hush.c	/^static char **make_list_in(char **inp, char *name)$/;"	f	typeref:typename:char **	file:
make_lsave_dirty	fs/ubifs/lpt_commit.c	/^static int make_lsave_dirty(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
make_ltab_dirty	fs/ubifs/lpt_commit.c	/^static int make_ltab_dirty(struct ubifs_info *c, int lnum, int offs)$/;"	f	typeref:typename:int	file:
make_mdn	fs/zfs/zfs.c	/^make_mdn(dnode_end_t *mdn, struct zfs_data *data)$/;"	f	typeref:typename:int	file:
make_nnode_dirty	fs/ubifs/lpt_commit.c	/^static int make_nnode_dirty(struct ubifs_info *c, int node_num, int lnum,$/;"	f	typeref:typename:int	file:
make_node_dirty	fs/ubifs/lpt_commit.c	/^static int make_node_dirty(struct ubifs_info *c, int node_type, int node_num,$/;"	f	typeref:typename:int	file:
make_options	board/hisilicon/hikey/build-tf.mak	/^make_options	:= GCC49_AARCH64_PREFIX=$CROSS_COMPILE \\$/;"	m
make_pnode_dirty	fs/ubifs/lpt_commit.c	/^static int make_pnode_dirty(struct ubifs_info *c, int node_num, int lnum,$/;"	f	typeref:typename:int	file:
make_ramdisk	test/image/test-fit.py	/^def make_ramdisk(filename, text):$/;"	f
make_rfc822re	scripts/get_maintainer.pl	/^sub make_rfc822re {$/;"	s
make_signed_byte	arch/arm/mach-exynos/dmc_init_ddr3.c	/^unsigned char make_signed_byte(signed char b)$/;"	f	typeref:typename:unsigned char
make_string	common/cli_hush.c	/^static char *make_string(char **inp, int *nonnull)$/;"	f	typeref:typename:char *	file:
make_tree_dirty	fs/ubifs/lpt_commit.c	/^static int make_tree_dirty(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
makejobs	board/hisilicon/hikey/build-tf.mak	/^makejobs	:= $(shell grep '^processor' \/proc\/cpuinfo | sort -u | wc -l)$/;"	m
makethreads	board/hisilicon/hikey/build-tf.mak	/^makethreads	:= $(shell dc -e "$(makejobs) 1 + p")$/;"	m
mal_desc_t	arch/powerpc/include/asm/ppc4xx-mal.h	/^} mal_desc_t;$/;"	t	typeref:struct:__anonf209d9e80108
mal_err	drivers/net/4xx_enet.c	/^static void mal_err (struct eth_device *dev, unsigned long isr,$/;"	f	typeref:typename:void	file:
mali_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 mali_clk_cfg;	\/* 0x154 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mali_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 mali_clk_cfg;	\/* 0x154 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mallinfo	include/malloc.h	/^#pragma weak mallinfo /;"	d
mallinfo	include/malloc.h	/^struct mallinfo {$/;"	s
malloc	examples/api/libgenwrap.c	/^void *malloc (size_t len)$/;"	f	typeref:typename:void *
malloc	include/malloc.h	/^#define malloc /;"	d
malloc	include/malloc.h	/^#pragma weak malloc /;"	d
malloc_aligned	drivers/net/4xx_enet.c	/^static inline void *malloc_aligned(u32 size, u32 align)$/;"	f	typeref:typename:void *	file:
malloc_base	include/asm-generic/global_data.h	/^	unsigned long malloc_base;	\/* base address of early malloc() *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
malloc_bin_reloc	common/dlmalloc.c	/^static inline void malloc_bin_reloc(void) {}$/;"	f	typeref:typename:void	file:
malloc_bin_reloc	common/dlmalloc.c	/^static void malloc_bin_reloc(void)$/;"	f	typeref:typename:void	file:
malloc_cache_aligned	include/memalign.h	/^static inline void *malloc_cache_aligned(size_t size)$/;"	f	typeref:typename:void *
malloc_chunk	common/dlmalloc.c	/^struct malloc_chunk$/;"	s	file:
malloc_extend_top	common/dlmalloc.c	/^static void malloc_extend_top(INTERNAL_SIZE_T nb)$/;"	f	typeref:typename:void	file:
malloc_getpagesize	include/malloc.h	/^#                define malloc_getpagesize /;"	d
malloc_getpagesize	include/malloc.h	/^#              define malloc_getpagesize /;"	d
malloc_getpagesize	include/malloc.h	/^#          define malloc_getpagesize /;"	d
malloc_getpagesize	include/malloc.h	/^#        define malloc_getpagesize /;"	d
malloc_getpagesize	include/malloc.h	/^#      define malloc_getpagesize /;"	d
malloc_getpagesize	include/malloc.h	/^#    define malloc_getpagesize /;"	d
malloc_getpagesize	include/malloc.h	/^#define	malloc_getpagesize	/;"	d
malloc_limit	include/asm-generic/global_data.h	/^	unsigned long malloc_limit;	\/* limit address *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
malloc_ptr	include/asm-generic/global_data.h	/^	unsigned long malloc_ptr;	\/* current address *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
malloc_simple	common/malloc_simple.c	/^void *malloc_simple(size_t bytes)$/;"	f	typeref:typename:void *
malloc_stats	common/dlmalloc.c	/^void malloc_stats()$/;"	f	typeref:typename:void
malloc_trim	common/dlmalloc.c	/^int malloc_trim(size_t pad)$/;"	f	typeref:typename:int
malloc_update_mallinfo	common/dlmalloc.c	/^static void malloc_update_mallinfo()$/;"	f	typeref:typename:void	file:
malloc_usable_size	common/dlmalloc.c	/^size_t malloc_usable_size(Void_t* mem)$/;"	f	typeref:typename:size_t
mallopt	include/malloc.h	/^#pragma weak mallopt /;"	d
malr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	malr;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
malr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	malr;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
malr	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	malr;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
malta_core_card	board/imgtec/malta/malta.c	/^static enum core_card malta_core_card(void)$/;"	f	typeref:enum:core_card	file:
malta_lcd_puts	board/imgtec/malta/malta.c	/^static void malta_lcd_puts(const char *str)$/;"	f	typeref:typename:void	file:
malta_superio_init	board/imgtec/malta/superio.c	/^void malta_superio_init(void)$/;"	f	typeref:typename:void
malta_sys_con	board/imgtec/malta/malta.c	/^static enum sys_con malta_sys_con(void)$/;"	f	typeref:enum:sys_con	file:
mamr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     mamr;           \/* LBC UPMA Mode *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
man	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 man;$/;"	m	struct:at91_emac	typeref:typename:u32
man	drivers/serial/atmel_usart.h	/^	u32	man;$/;"	m	struct:atmel_usart3	typeref:typename:u32
manageability	arch/x86/include/asm/me_common.h	/^	u32 manageability:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
mandocs	doc/DocBook/Makefile	/^mandocs: $(MAN)$/;"	t
manu_marking	board/siemens/draco/board.h	/^	char manu_marking[32];			\/* "default \\0" *\/$/;"	m	struct:ddr3_data	typeref:typename:char[32]
manu_name	board/siemens/draco/board.h	/^	char manu_name[32];			\/* "default@303MHz \\0" *\/$/;"	m	struct:ddr3_data	typeref:typename:char[32]
manu_name	drivers/video/da8xx-fb.h	/^	const char manu_name[10];$/;"	m	struct:da8xx_lcdc_platform_data	typeref:typename:const char[10]
manu_str	disk/part_iso.h	/^	char					manu_str[0x18]; \/* Ident String of manufacturer\/developer *\/$/;"	m	struct:iso_val_entry	typeref:typename:char[0x18]
manual	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 manual;		\/* 0xA8 || 0xD8 *\/$/;"	m	struct:sdrc_cs	typeref:typename:u32
manufact_id	include/linux/mtd/samsung_onenand.h	/^	unsigned int	manufact_id;	\/* 0x0070 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
manufact_match	drivers/mtd/cfi_flash.c	/^static inline int manufact_match(flash_info_t *info, u32 manu)$/;"	f	typeref:typename:int	file:
manufacturer	arch/arm/include/asm/emif.h	/^	u8	manufacturer;$/;"	m	struct:lpddr2_device_details	typeref:typename:u8
manufacturer	drivers/usb/gadget/ether.c	/^static char manufacturer[50];$/;"	v	typeref:typename:char[50]	file:
manufacturer	drivers/usb/gadget/g_dnl.c	/^static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER;$/;"	v	typeref:typename:const char[]	file:
manufacturer	include/linux/fb.h	/^	__u8  manufacturer[4];		\/* Manufacturer *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8[4]
manufacturer	include/linux/mtd/nand.h	/^	char manufacturer[12];$/;"	m	struct:nand_jedec_params	typeref:typename:char[12]
manufacturer	include/linux/mtd/nand.h	/^	char manufacturer[12];$/;"	m	struct:nand_onfi_params	typeref:typename:char[12]
manufacturer	include/smbios.h	/^	u8 manufacturer;$/;"	m	struct:smbios_type1	typeref:typename:u8
manufacturer	include/smbios.h	/^	u8 manufacturer;$/;"	m	struct:smbios_type2	typeref:typename:u8
manufacturer	include/smbios.h	/^	u8 manufacturer;$/;"	m	struct:smbios_type3	typeref:typename:u8
manufacturer_id	include/flash.h	/^	ushort	manufacturer_id;	\/* manufacturer id			*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
manufacturer_name	include/edid.h	/^	unsigned char manufacturer_name[2];$/;"	m	struct:edid1_info	typeref:typename:unsigned char[2]
map	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct regmap *map;$/;"	m	struct:rk3288_sdram_params	typeref:struct:regmap *	file:
map	arch/x86/include/asm/coreboot_tables.h	/^	struct cb_memory_range map[0];$/;"	m	struct:cb_memory	typeref:struct:cb_memory_range[0]
map	common/cli_hush.c	/^static char map[256];$/;"	v	typeref:typename:char[256]	file:
map	common/fdt_support.c	/^	u64		(*map)(fdt32_t *addr, const fdt32_t *range,$/;"	m	struct:of_bus	typeref:typename:u64 (*)(fdt32_t * addr,const fdt32_t * range,int na,int ns,int pna)	file:
mapIdx	scripts/kconfig/qconf.h	/^	int mapIdx(colIdx idx)$/;"	f	class:ConfigList	typeref:typename:int
map_addrspace_size_to_wse	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)$/;"	f	typeref:typename:unsigned int	file:
map_count	disk/part_mac.h	/^	__u32	map_count;	\/* # blocks in partition map		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
map_dev	arch/sandbox/cpu/cpu.c	/^static struct udevice *map_dev;$/;"	v	typeref:struct:udevice *	file:
map_dma_buffer	drivers/usb/musb-new/musb_gadget.c	/^static inline void map_dma_buffer(struct musb_request *request,$/;"	f	typeref:typename:void	file:
map_entry	arch/blackfin/cpu/gpio.c	/^#define map_entry(/;"	d	file:
map_entry	drivers/gpio/adi_gpio2.c	/^#define map_entry(/;"	d	file:
map_fdt_as	board/freescale/qemu-ppce500/qemu-ppce500.c	/^static void map_fdt_as(int esel)$/;"	f	typeref:typename:void	file:
map_flash_by_law1	arch/powerpc/cpu/mpc83xx/start.S	/^map_flash_by_law1:$/;"	l
map_len	arch/sandbox/cpu/cpu.c	/^unsigned long map_len;$/;"	v	typeref:typename:unsigned long
map_physmem	arch/arc/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/arm/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/blackfin/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/m68k/include/asm/io.h	/^static inline void *map_physmem(phys_addr_t paddr, unsigned long len,$/;"	f	typeref:typename:void *
map_physmem	arch/microblaze/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/mips/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/nds32/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/nios2/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/openrisc/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/powerpc/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/sandbox/cpu/cpu.c	/^void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/sh/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/sparc/include/asm/io.h	/^static inline void *map_physmem(phys_addr_t paddr, unsigned long len,$/;"	f	typeref:typename:void *
map_physmem	arch/x86/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	arch/xtensa/include/asm/io.h	/^map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)$/;"	f	typeref:typename:void *
map_physmem	include/pci.h	/^	int (*map_physmem)(struct udevice *dev, phys_addr_t addr,$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev,phys_addr_t addr,unsigned long * lenp,void ** ptrp)
map_state	drivers/usb/musb-new/musb_gadget.h	/^	enum buffer_map_state map_state;$/;"	m	struct:musb_request	typeref:enum:buffer_map_state
map_subwindow_cnt_to_wce	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)$/;"	f	typeref:typename:unsigned int	file:
map_sysmem	arch/sandbox/include/asm/io.h	/^static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)$/;"	f	typeref:typename:void *
map_sysmem	include/mapmem.h	/^static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)$/;"	f	typeref:typename:void *
map_sysmem	tools/mkimage.h	/^static inline void *map_sysmem(ulong paddr, unsigned long len)$/;"	f	typeref:typename:void *
map_to_sysmem	arch/sandbox/cpu/cpu.c	/^phys_addr_t map_to_sysmem(const void *ptr)$/;"	f	typeref:typename:phys_addr_t
map_to_sysmem	include/mapmem.h	/^static inline phys_addr_t map_to_sysmem(const void *ptr)$/;"	f	typeref:typename:phys_addr_t
map_to_sysmem	tools/mkimage.h	/^static inline ulong map_to_sysmem(void *ptr)$/;"	f	typeref:typename:ulong
mapbase	drivers/serial/serial_sh.h	/^	unsigned long	mapbase;	\/* for ioremap *\/$/;"	m	struct:uart_port	typeref:typename:unsigned long
mapped	drivers/usb/dwc3/core.h	/^	unsigned		mapped:1;$/;"	m	struct:dwc3_request	typeref:typename:unsigned:1
mapped	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				mapped:1;$/;"	m	struct:usba_request	typeref:typename:unsigned int:1
mapped_reg	include/sh_pfc.h	/^	void *mapped_reg;$/;"	m	struct:pinmux_data_reg	typeref:typename:void *
mapped_vram	drivers/video/ati_radeon_fb.h	/^	u32			mapped_vram;$/;"	m	struct:radeonfb_info	typeref:typename:u32
mapping	include/ddr_spd.h	/^	uint8_t mapping[78-60];		\/* 60~77 Connector to SDRAM bit map *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[]
mapr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mapr;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mapr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mapr;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mapr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 mapr;		\/* 0x98 master priority register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mapr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mapr;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mapr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mapr;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mapr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 mapr;		\/* 0x98 master priority register *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mapset	common/cli_hush.c	/^static void mapset(const unsigned char *set, int code)$/;"	f	typeref:typename:void	file:
mapsr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mapsr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mapsr	include/fsl_mmdc.h	/^	u32 mapsr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mar	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     mar;            \/* LBC UPM Addr *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
mar	include/linux/mtd/fsl_upm.h	/^	void __iomem *mar;$/;"	m	struct:fsl_upm	typeref:typename:void __iomem *
mark	include/sh_pfc.h	/^	struct pinmux_range mark;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
markBlockBad	fs/yaffs2/yaffs_nandif.h	/^	int (*markBlockBad)(struct yaffs_dev *dev, unsigned blockId);$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev,unsigned blockId)
mark_bbt_region	drivers/mtd/nand/nand_bbt.c	/^static void mark_bbt_region(struct mtd_info *mtd, struct nand_bbt_descr *td)$/;"	f	typeref:typename:void	file:
mark_binblock	common/dlmalloc.c	/^#define mark_binblock(/;"	d	file:
mark_bootstage	common/board_f.c	/^static int mark_bootstage(void)$/;"	f	typeref:typename:int	file:
mark_closed	common/cli_hush.c	/^static void mark_closed(int fd)$/;"	f	typeref:typename:void	file:
mark_open	common/cli_hush.c	/^static void mark_open(int fd)$/;"	f	typeref:typename:void	file:
markers	test/py/pytest.ini	/^markers =$/;"	k	section:pytest
marking_block_bad	drivers/mtd/nand/mxs_nand.c	/^	uint8_t		marking_block_bad;$/;"	m	struct:mxs_nand_info	typeref:typename:uint8_t	file:
marsboard_boot_modes	board/embest/mx6boards/mx6boards.c	/^static const struct boot_mode marsboard_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
marvell_88e_phy_config	drivers/net/tsi108_eth.c	/^static int marvell_88e_phy_config (struct eth_device *dev, int *speed,$/;"	f	typeref:typename:int	file:
marvell_ack_interrupt	drivers/qe/uec_phy.c	/^static int marvell_ack_interrupt (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
marvell_config_aneg	drivers/qe/uec_phy.c	/^static int marvell_config_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
marvell_config_intr	drivers/qe/uec_phy.c	/^static int marvell_config_intr (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
marvell_ehci_ops	drivers/usb/host/ehci-marvell.c	/^static struct ehci_ops marvell_ehci_ops = {$/;"	v	typeref:struct:ehci_ops	file:
marvell_ehci_powerup_fixup	drivers/usb/host/ehci-marvell.c	/^static void marvell_ehci_powerup_fixup(struct ehci_ctrl *ctrl,$/;"	f	typeref:typename:void	file:
marvell_io_exp	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^struct marvell_io_exp {$/;"	s	file:
marvell_io_exp	board/solidrun/clearfog/clearfog.c	/^struct marvell_io_exp {$/;"	s	file:
marvell_phy_interface_mode	drivers/qe/uec_phy.c	/^void marvell_phy_interface_mode(struct eth_device *dev, phy_interface_t type,$/;"	f	typeref:typename:void
marvell_read_status	drivers/qe/uec_phy.c	/^static int marvell_read_status (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
mas0	arch/powerpc/include/asm/mmu.h	/^	u32	mas0;$/;"	m	struct:fsl_e_tlb_entry	typeref:typename:u32
mas1	arch/powerpc/include/asm/mmu.h	/^	u32	mas1;$/;"	m	struct:fsl_e_tlb_entry	typeref:typename:u32
mas2	arch/powerpc/include/asm/mmu.h	/^	u32	mas2;$/;"	m	struct:fsl_e_tlb_entry	typeref:typename:u32
mas3	arch/powerpc/include/asm/mmu.h	/^	u32	mas3;$/;"	m	struct:fsl_e_tlb_entry	typeref:typename:u32
mas7	arch/powerpc/include/asm/mmu.h	/^	u32	mas7;$/;"	m	struct:fsl_e_tlb_entry	typeref:typename:u32
mas_data	drivers/spi/tegra20_slink.c	/^	u32 mas_data;	\/* SLINK_MAS_DATA_0 reg *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
masbs0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 masbs0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
masbs0	include/fsl_mmdc.h	/^	u32 masbs0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
masbs1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 masbs1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
masbs1	include/fsl_mmdc.h	/^	u32 masbs1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mask	arch/arm/cpu/armv8/zynqmp/slcr.c	/^	u32 mask;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:u32	file:
mask	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t mask;$/;"	m	struct:mrq_trace_modify_response	typeref:typename:uint32_t
mask	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u32 mask;$/;"	m	struct:op_params	typeref:typename:u32
mask	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int mask;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:unsigned int
mask	arch/arm/mach-zynq/slcr.c	/^	u32 mask;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:u32	file:
mask	arch/powerpc/cpu/mpc8260/cpu_init.c	/^		ulong mask;$/;"	m	struct:prt_8260_rsr::__anon018255430108	typeref:typename:ulong	file:
mask	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^		ulong mask;$/;"	m	struct:prt_83xx_rsr::__anon77b5456e0108	typeref:typename:ulong	file:
mask	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mask;		\/* eSPI mask *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32
mask	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u32 mask;	\/* mask register  *\/$/;"	m	struct:spi8xxx	typeref:typename:u32
mask	arch/powerpc/include/asm/processor.h	/^	u32 mask;	\/* which cpu(s) actually exist *\/$/;"	m	struct:cpu_type	typeref:typename:u32
mask	arch/sparc/cpu/leon3/memcfg.h	/^		unsigned int mask;	\/* Mask used keep reg bits unchanged *\/$/;"	m	struct:ahbmctrl_setup::__anon8a0508e60208	typeref:typename:unsigned int
mask	arch/sparc/cpu/leon3/memcfg.h	/^		unsigned int mask;	\/* Mask used keep reg bits unchanged *\/$/;"	m	struct:mctrl_setup::__anon8a0508e60108	typeref:typename:unsigned int
mask	arch/x86/include/asm/arch-broadwell/me.h	/^	u16 mask;$/;"	m	struct:icc_address_mask	typeref:typename:u16
mask	board/freescale/corenet_ds/eth_hydra.c	/^	u8 mask;$/;"	m	struct:__anon5adf8b530108	typeref:typename:u8	file:
mask	board/freescale/corenet_ds/eth_hydra.c	/^	u8 mask;$/;"	m	struct:hydra_mdio	typeref:typename:u8	file:
mask	board/freescale/corenet_ds/eth_superhydra.c	/^	u8 mask;$/;"	m	struct:__anona3cdf2e20108	typeref:typename:u8	file:
mask	board/freescale/corenet_ds/eth_superhydra.c	/^	u8 mask;$/;"	m	struct:super_hydra_mdio	typeref:typename:u8	file:
mask	board/gdsys/common/phy.c	/^	u16 mask;$/;"	m	struct:mii_setupcmd	typeref:typename:u16	file:
mask	board/renesas/blanche/blanche.c	/^	u32	mask;	\/* mask value *\/$/;"	m	struct:pin_db	typeref:typename:u32	file:
mask	cmd/led.c	/^	led_id_t	mask;		\/* Mask used for calling __led_set() *\/$/;"	m	struct:led_tbl_s	typeref:typename:led_id_t	file:
mask	cmd/mii.c	/^	ushort mask;$/;"	m	struct:_MII_field_desc_t	typeref:typename:ushort	file:
mask	disk/part_amiga.h	/^    u32 mask;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
mask	drivers/misc/status_led.c	/^	led_id_t mask;$/;"	m	struct:__anonb49c34f70108	typeref:typename:led_id_t	file:
mask	drivers/net/e1000.h	/^	volatile uint32_t mask;	\/* Flexible Filter Mask (RW) *\/$/;"	m	struct:e1000_ffmt_entry	typeref:typename:volatile uint32_t
mask	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	const unsigned int	mask;$/;"	m	struct:exynos_pinctrl_config_data	typeref:typename:const unsigned int
mask	drivers/soc/keystone/keystone_serdes.c	/^	u32 mask;$/;"	m	struct:serdes_cfg	typeref:typename:u32	file:
mask	include/ambapp.h	/^	unsigned int mask;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:unsigned int
mask	include/ambapp.h	/^	unsigned int mask[4];$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned int[4]
mask	include/bedbug/ppc.h	/^  unsigned long	mask;		\/* The mask to use on an instruction$/;"	m	struct:opcode	typeref:typename:unsigned long
mask	include/ec_commands.h	/^	uint32_t mask;   \/* Bits in flags to apply *\/$/;"	m	struct:ec_params_flash_protect	typeref:typename:uint32_t
mask	include/ec_commands.h	/^	uint32_t mask;$/;"	m	struct:ec_params_host_event_mask	typeref:typename:uint32_t
mask	include/ec_commands.h	/^	uint32_t mask;$/;"	m	struct:ec_response_host_event_mask	typeref:typename:uint32_t
mask	include/fsl_devdis.h	/^	u32 mask;$/;"	m	struct:devdis_table	typeref:typename:u32
mask	include/linux/fb.h	/^	const char *mask;	\/* cursor mask bits *\/$/;"	m	struct:fb_cursor	typeref:typename:const char *
mask	include/linux/fb.h	/^	const char *mask;	\/* cursor mask bits *\/$/;"	m	struct:fb_cursor_user	typeref:typename:const char *
mask	include/phy.h	/^	unsigned int mask;$/;"	m	struct:phy_driver	typeref:typename:unsigned int
mask	post/cpu/mpc8xx/spr.c	/^    unsigned long mask;$/;"	m	struct:__anonf88dfa8e0108	typeref:typename:unsigned long	file:
mask	post/cpu/ppc4xx/spr.c	/^	unsigned long mask;$/;"	m	struct:__anonb9764ead0108	typeref:typename:unsigned long	file:
mask0	drivers/mmc/arm_pl180_mmci.h	/^	u32 mask0;		\/* 0x3c*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
mask1	drivers/mmc/arm_pl180_mmci.h	/^	u32 mask1;		\/* 0x40*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
mask_a	drivers/video/ipu_disp.c	/^#define mask_a(/;"	d	file:
mask_and_ack_8259A	board/mpl/common/isa.c	/^void mask_and_ack_8259A(unsigned int irq)$/;"	f	typeref:typename:void
mask_b	drivers/video/ipu_disp.c	/^#define mask_b(/;"	d	file:
mask_flags	board/nokia/rx51/tag_omap.h	/^	unsigned int mask_flags;$/;"	m	struct:omap_partition_config	typeref:typename:unsigned int
mask_flags	include/jffs2/load_kernel.h	/^	u32 mask_flags;			\/* kernel MTD mask flags *\/$/;"	m	struct:part_info	typeref:typename:u32
mask_flags	include/linux/mtd/partitions.h	/^	uint32_t mask_flags;		\/* master MTD flags to mask out for this partition *\/$/;"	m	struct:mtd_partition	typeref:typename:uint32_t
mask_irq	arch/x86/lib/i8259.c	/^void mask_irq(int irq)$/;"	f	typeref:typename:void
mask_last	drivers/misc/pca9551_led.c	/^static int mask_last = -1;$/;"	v	typeref:typename:int	file:
mask_poll	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^int mask_poll(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:int
mask_poll	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^int mask_poll(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:int
mask_poll	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^int mask_poll(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:int
mask_poll	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^int mask_poll(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:int
mask_poll	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^int mask_poll(unsigned long add, unsigned long mask)$/;"	f	typeref:typename:int
mask_read	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long mask_read(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:unsigned long
mask_read	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long mask_read(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:unsigned long
mask_read	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long mask_read(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:unsigned long
mask_read	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long mask_read(unsigned long add , unsigned long mask ) {$/;"	f	typeref:typename:unsigned long
mask_read	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long mask_read(unsigned long add, unsigned long mask)$/;"	f	typeref:typename:unsigned long
mask_results_dq_reg_map	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u16 mask_results_dq_reg_map[] = {$/;"	v	typeref:typename:u16[]
mask_results_dq_reg_map_pup3_ecc	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u16 mask_results_dq_reg_map_pup3_ecc[] = {$/;"	v	typeref:typename:u16[]
mask_results_pup_reg_map	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u16 mask_results_pup_reg_map[] = {$/;"	v	typeref:typename:u16[]
mask_results_pup_reg_map_pup3_ecc	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u16 mask_results_pup_reg_map_pup3_ecc[] = {$/;"	v	typeref:typename:u16[]
mask_tune_func	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 mask_tune_func = (SET_MEDIUM_FREQ_MASK_BIT |$/;"	v	typeref:typename:u32
mask_wdt_reset_request	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mask_wdt_reset_request;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mask_wdt_reset_request	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mask_wdt_reset_request;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mask_wreset_request	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mask_wreset_request;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mask_wreset_request	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mask_wreset_request;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mask_write	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^void mask_write (unsigned long add , unsigned long  mask, unsigned long val ) {$/;"	f	typeref:typename:void
mask_write	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^void mask_write (unsigned long add , unsigned long  mask, unsigned long val ) {$/;"	f	typeref:typename:void
mask_write	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^void mask_write (unsigned long add , unsigned long  mask, unsigned long val ) {$/;"	f	typeref:typename:void
mask_write	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^void mask_write (unsigned long add , unsigned long  mask, unsigned long val ) {$/;"	f	typeref:typename:void
mask_write	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^void mask_write(unsigned long add, unsigned long mask, unsigned long val)$/;"	f	typeref:typename:void
maska	arch/blackfin/include/asm/gpio.h	/^	unsigned short maska;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maska_clear	arch/blackfin/include/asm/gpio.h	/^	unsigned short maska_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maska_set	arch/blackfin/include/asm/gpio.h	/^	unsigned short maska_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maska_toggle	arch/blackfin/include/asm/gpio.h	/^	unsigned short maska_toggle;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maskb	arch/blackfin/include/asm/gpio.h	/^	unsigned short maskb;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maskb_clear	arch/blackfin/include/asm/gpio.h	/^	unsigned short maskb_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maskb_set	arch/blackfin/include/asm/gpio.h	/^	unsigned short maskb_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
maskb_toggle	arch/blackfin/include/asm/gpio.h	/^	unsigned short maskb_toggle;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
masked_stat	drivers/video/da8xx-fb.c	/^	u32	masked_stat;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
masks	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int masks[UNIPHIER_CLK_MAX_NR_MUXS];$/;"	m	struct:uniphier_clk_mux_data	typeref:typename:unsigned int[]
mass_storage_id_table	common/usb_storage.c	/^static const struct usb_device_id mass_storage_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
mast_ctl	include/universe.h	/^	unsigned int mast_ctl;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
master	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct mipi_dsim_device *master;$/;"	m	struct:mipi_dsim_lcd_device	typeref:struct:mipi_dsim_device *
master	drivers/mtd/mtdpart.c	/^	struct mtd_info *master;$/;"	m	struct:mtd_part	typeref:struct:mtd_info *	file:
master_ahb_freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^unsigned long master_ahb_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
master_ahb_freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^unsigned long master_ahb_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
master_axi_freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^unsigned long master_axi_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
master_axi_freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^unsigned long master_axi_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
master_cpu	arch/arm/cpu/armv8/start.S	/^master_cpu:$/;"	l
master_en	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	master_en[4];		\/* Master enable *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
master_enable	include/mpc5xxx.h	/^	volatile u8 master_enable;	\/* WU_GPIO + 0x1c *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
master_mode	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int master_mode;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
master_ops	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct mipi_dsim_master_ops	*master_ops;$/;"	m	struct:mipi_dsim_device	typeref:struct:mipi_dsim_master_ops *
master_ops	drivers/video/exynos/exynos_mipi_dsi.c	/^static struct mipi_dsim_master_ops master_ops = {$/;"	v	typeref:struct:mipi_dsim_master_ops	file:
master_pri_enable	include/mpc5xxx.h	/^	volatile u32 master_pri_enable; \/* XLB + 0x64 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
master_priority	include/mpc5xxx.h	/^	volatile u32 master_priority;	\/* XLB + 0x68 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
master_selectmap	include/xilinx.h	/^	master_selectmap,	\/* master SelectMap (virtex2)           *\/$/;"	e	enum:__anon15c234ca0103
master_serial	include/xilinx.h	/^	master_serial,		\/* serial data w\/ internal clock (not used) *\/$/;"	e	enum:__anon15c234ca0103
master_slave	drivers/net/e1000.h	/^	e1000_ms_type		master_slave;$/;"	m	struct:e1000_hw	typeref:typename:e1000_ms_type
master_to_device	drivers/video/exynos/exynos_mipi_dsi.c	/^#define master_to_device(/;"	d	file:
master_to_driver	drivers/video/exynos/exynos_mipi_dsi.c	/^#define master_to_driver(/;"	d	file:
masters	include/ambapp.h	/^	struct ambapp_pnp_ahb	masters[64];$/;"	m	struct:ambapp_pnp_info	typeref:struct:ambapp_pnp_ahb[64]
match	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 match[9];	\/* Timer match registers *\/$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[9]	file:
match	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 match;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
match	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 match;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
match	cmd/ethsw.c	/^	int (*match)(enum ethsw_keyword_id key_id, int argc, char *const argv[],$/;"	m	struct:keyword_def	typeref:typename:int (*)(enum ethsw_keyword_id key_id,int argc,char * const argv[],int * argc_nr,struct ethsw_command_def * parsed_cmd)	file:
match	common/fdt_support.c	/^	int		(*match)(const void *blob, int parentoffset);$/;"	m	struct:of_bus	typeref:typename:int (*)(const void * blob,int parentoffset)	file:
match	drivers/net/zynq_gem.c	/^	u32 match[4]; \/* 0xa8 - Type ID1 Match reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[4]	file:
match	include/pci.h	/^	const struct pci_device_id *match;$/;"	m	struct:pci_driver_entry	typeref:typename:const struct pci_device_id *
match	include/usb.h	/^	const struct usb_device_id *match;$/;"	m	struct:usb_driver_entry	typeref:typename:const struct usb_device_id *
match	lib/slre.c	/^match(const struct slre *r, int pc, const char *s, int len,$/;"	f	typeref:typename:int	file:
match	tools/patman/patman	/^        match = re_line.match(line)$/;"	v
match	tools/patman/patman.py	/^        match = re_line.match(line)$/;"	v
match0	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 match0;		\/* Match 0 Register			*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
match_available	lib/zlib/deflate.h	/^    int match_available;         \/* set if previous match exists *\/$/;"	m	struct:internal_state	typeref:typename:int
match_cpu	drivers/timer/tsc_timer.c	/^static int match_cpu(u8 family, u8 model)$/;"	f	typeref:typename:int	file:
match_direction	scripts/kconfig/nconf.c	/^	match_f match_direction;$/;"	m	struct:match_state	typeref:typename:match_f	file:
match_entry	lib/hashtable.c	/^static int match_entry(ENTRY *ep, int flag,$/;"	f	typeref:typename:int	file:
match_f	scripts/kconfig/nconf.c	/^	FIND_NEXT_MATCH_DOWN, FIND_NEXT_MATCH_UP} match_f;$/;"	t	typeref:enum:__anon6c8863710103	file:
match_flags	include/usb.h	/^	u16 match_flags;$/;"	m	struct:usb_device_id	typeref:typename:u16
match_length	lib/zlib/deflate.h	/^    uInt match_length;           \/* length of best match *\/$/;"	m	struct:internal_state	typeref:typename:uInt
match_start	lib/zlib/deflate.h	/^    uInt match_start;            \/* start of matching string *\/$/;"	m	struct:internal_state	typeref:typename:uInt
match_state	scripts/kconfig/nconf.c	/^struct match_state$/;"	s	file:
match_string	lib/hashtable.c	/^static int match_string(int flag, const char *str, const char *pat, void *priv)$/;"	f	typeref:typename:int	file:
matches	lib/zlib/deflate.h	/^    uInt matches;       \/* number of string matches in current block *\/$/;"	m	struct:internal_state	typeref:typename:uInt
matches_name	fs/ubifs/tnc.c	/^static int matches_name(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int	file:
matches_position	fs/ubifs/tnc.c	/^static int matches_position(struct ubifs_zbranch *zbr, int lnum, int offs)$/;"	f	typeref:typename:int	file:
matrix	arch/arm/dts/at91sam9261.dtsi	/^			matrix: matrix@ffffee00 {$/;"	l
matrix	drivers/input/cros_ec_keyb.c	/^	struct key_matrix matrix;	\/* The key matrix layer *\/$/;"	m	struct:cros_ec_keyb_priv	typeref:struct:key_matrix	file:
matrix	drivers/input/tegra-kbc.c	/^	struct key_matrix matrix;	\/* The key matrix layer *\/$/;"	m	struct:tegra_kbd_priv	typeref:struct:key_matrix	file:
matrix	drivers/misc/cros_ec_sandbox.c	/^	struct ec_keymatrix_entry *matrix;	\/* the key matrix info *\/$/;"	m	struct:ec_state	typeref:struct:ec_keymatrix_entry *	file:
matrix	drivers/usb/gadget/at91_udc.h	/^	struct at91_matrix		*matrix;$/;"	m	struct:at91_udc	typeref:struct:at91_matrix *
matrix0_clk	arch/arm/dts/sama5d2.dtsi	/^					matrix0_clk: matrix0_clk@15 {$/;"	l
matrix1_clk	arch/arm/dts/sama5d2.dtsi	/^					matrix1_clk: matrix1_clk@14 {$/;"	l
matrix_count	drivers/misc/cros_ec_sandbox.c	/^	int matrix_count;$/;"	m	struct:ec_state	typeref:typename:int	file:
matrix_init	arch/arm/mach-at91/matrix.c	/^void matrix_init(void)$/;"	f	typeref:typename:void
matrix_init	arch/arm/mach-at91/spl_at91.c	/^void __weak matrix_init(void)$/;"	f	typeref:typename:void __weak
matrix_init	arch/arm/mach-at91/spl_atmel.c	/^__weak void matrix_init(void)$/;"	f	typeref:typename:__weak void
matrix_init	board/siemens/smartweb/smartweb.c	/^void matrix_init(void)$/;"	f	typeref:typename:void
matrix_init	board/siemens/taurus/taurus.c	/^void matrix_init(void)$/;"	f	typeref:typename:void
matrix_keypad	arch/arm/dts/am335x-evm.dts	/^	matrix_keypad: matrix_keypad@0 {$/;"	l
matrix_keypad	arch/arm/dts/am437x-gp-evm.dts	/^	matrix_keypad: matrix_keypad@0 {$/;"	l
matrix_keypad	arch/arm/dts/am437x-sk-evm.dts	/^	matrix_keypad: matrix_keypad@0 {$/;"	l
matrix_keypad	arch/arm/dts/am43x-epos-evm.dts	/^	matrix_keypad: matrix_keypad@0 {$/;"	l
matrix_keypad_pins	arch/arm/dts/am437x-sk-evm.dts	/^	matrix_keypad_pins: matrix_keypad_pins {$/;"	l
matrix_keypad_s0	arch/arm/dts/am335x-evm.dts	/^	matrix_keypad_s0: matrix_keypad_s0 {$/;"	l
mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mau_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
maudio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	maudio_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
max	arch/x86/include/asm/speedstep.h	/^	struct sst_state max;$/;"	m	struct:sst_params	typeref:struct:sst_state
max	drivers/power/regulator/sandbox.c	/^	int max;$/;"	m	struct:output_range	typeref:typename:int	file:
max	drivers/video/ct69000.c	/^#define max(/;"	d	file:
max	include/fdtdec.h	/^	u32 max;$/;"	m	struct:timing_entry	typeref:typename:u32
max	include/linux/kernel.h	/^#define max(/;"	d
max	include/power/s5m8767.h	/^	int max;$/;"	m	struct:sec_voltage_desc	typeref:typename:int
max	scripts/kconfig/nconf.h	/^#define max(/;"	d
max	tools/gdb/remote.c	/^#define max(/;"	d	file:
max3	include/linux/kernel.h	/^#define max3(/;"	d
max6957aax_help_text	board/work-microwave/work_92105/work_92105_display.c	/^static char max6957aax_help_text[] =$/;"	v	typeref:typename:char[]	file:
max6957aax_read	board/work-microwave/work_92105/work_92105_display.c	/^static uint8_t max6957aax_read(uint8_t reg)$/;"	f	typeref:typename:uint8_t	file:
max6957aax_write	board/work-microwave/work_92105/work_92105_display.c	/^static void max6957aax_write(uint8_t reg, uint8_t value)$/;"	f	typeref:typename:void	file:
max77686	arch/arm/dts/exynos5250-snow.dts	/^	max77686: max77686@09 {$/;"	l
max77686_bind	drivers/power/pmic/max77686.c	/^static int max77686_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
max77686_buck_addr	drivers/power/pmic/pmic_max77686.c	/^static const char max77686_buck_addr[] = {$/;"	v	typeref:typename:const char[]	file:
max77686_buck_ctrl	drivers/power/regulator/max77686.c	/^static const char max77686_buck_ctrl[] = {$/;"	v	typeref:typename:const char[]	file:
max77686_buck_enable	drivers/power/regulator/max77686.c	/^static int max77686_buck_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
max77686_buck_hex2mode	drivers/power/regulator/max77686.c	/^static int max77686_buck_hex2mode(int buck, int hex)$/;"	f	typeref:typename:int	file:
max77686_buck_hex2volt	drivers/power/regulator/max77686.c	/^static int max77686_buck_hex2volt(int buck, int hex)$/;"	f	typeref:typename:int	file:
max77686_buck_mode	drivers/power/regulator/max77686.c	/^static int max77686_buck_mode(struct udevice *dev, int op, int *opmode)$/;"	f	typeref:typename:int	file:
max77686_buck_mode_lpm	drivers/power/regulator/max77686.c	/^static struct dm_regulator_mode max77686_buck_mode_lpm[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
max77686_buck_mode_onoff	drivers/power/regulator/max77686.c	/^static struct dm_regulator_mode max77686_buck_mode_onoff[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
max77686_buck_mode_standby	drivers/power/regulator/max77686.c	/^static struct dm_regulator_mode max77686_buck_mode_standby[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
max77686_buck_modes	drivers/power/regulator/max77686.c	/^static int max77686_buck_modes(int buck, struct dm_regulator_mode **modesp)$/;"	f	typeref:typename:int	file:
max77686_buck_ops	drivers/power/regulator/max77686.c	/^static const struct dm_regulator_ops max77686_buck_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
max77686_buck_out	drivers/power/regulator/max77686.c	/^static const char max77686_buck_out[] = {$/;"	v	typeref:typename:const char[]	file:
max77686_buck_probe	drivers/power/regulator/max77686.c	/^static int max77686_buck_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
max77686_buck_val	drivers/power/regulator/max77686.c	/^static int max77686_buck_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
max77686_buck_volt2hex	drivers/power/pmic/pmic_max77686.c	/^static int max77686_buck_volt2hex(int buck, ulong uV)$/;"	f	typeref:typename:int	file:
max77686_buck_volt2hex	drivers/power/regulator/max77686.c	/^static int max77686_buck_volt2hex(int buck, int uV)$/;"	f	typeref:typename:int	file:
max77686_ids	drivers/power/pmic/max77686.c	/^static const struct udevice_id max77686_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
max77686_ldo_enable	drivers/power/regulator/max77686.c	/^static int max77686_ldo_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
max77686_ldo_hex2mode	drivers/power/regulator/max77686.c	/^static int max77686_ldo_hex2mode(int ldo, int hex)$/;"	f	typeref:typename:int	file:
max77686_ldo_hex2volt	drivers/power/regulator/max77686.c	/^static int max77686_ldo_hex2volt(int ldo, int hex)$/;"	f	typeref:typename:int	file:
max77686_ldo_mode	drivers/power/regulator/max77686.c	/^static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode)$/;"	f	typeref:typename:int	file:
max77686_ldo_mode_standby1	drivers/power/regulator/max77686.c	/^static struct dm_regulator_mode max77686_ldo_mode_standby1[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
max77686_ldo_mode_standby2	drivers/power/regulator/max77686.c	/^static struct dm_regulator_mode max77686_ldo_mode_standby2[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
max77686_ldo_modes	drivers/power/regulator/max77686.c	/^static int max77686_ldo_modes(int ldo, struct dm_regulator_mode **modesp,$/;"	f	typeref:typename:int	file:
max77686_ldo_ops	drivers/power/regulator/max77686.c	/^static const struct dm_regulator_ops max77686_ldo_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
max77686_ldo_probe	drivers/power/regulator/max77686.c	/^static int max77686_ldo_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
max77686_ldo_val	drivers/power/regulator/max77686.c	/^static int max77686_ldo_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
max77686_ldo_volt2hex	drivers/power/pmic/pmic_max77686.c	/^static unsigned int max77686_ldo_volt2hex(int ldo, ulong uV)$/;"	f	typeref:typename:unsigned int	file:
max77686_ldo_volt2hex	drivers/power/regulator/max77686.c	/^static int max77686_ldo_volt2hex(int ldo, int uV)$/;"	f	typeref:typename:int	file:
max77686_ops	drivers/power/pmic/max77686.c	/^static struct dm_pmic_ops max77686_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
max77686_read	drivers/power/pmic/max77686.c	/^static int max77686_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
max77686_reg_count	drivers/power/pmic/max77686.c	/^static int max77686_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
max77686_set_buck_mode	drivers/power/pmic/pmic_max77686.c	/^int max77686_set_buck_mode(struct pmic *p, int buck, char opmode)$/;"	f	typeref:typename:int
max77686_set_buck_voltage	drivers/power/pmic/pmic_max77686.c	/^int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV)$/;"	f	typeref:typename:int
max77686_set_ldo_mode	drivers/power/pmic/pmic_max77686.c	/^int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode)$/;"	f	typeref:typename:int
max77686_set_ldo_voltage	drivers/power/pmic/pmic_max77686.c	/^int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV)$/;"	f	typeref:typename:int
max77686_write	drivers/power/pmic/max77686.c	/^static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
max77693_charger_bat_present	drivers/power/mfd/pmic_max77693.c	/^static int max77693_charger_bat_present(struct pmic *p)$/;"	f	typeref:typename:int	file:
max77693_charger_state	drivers/power/mfd/pmic_max77693.c	/^static int max77693_charger_state(struct pmic *p, int state, int current)$/;"	f	typeref:typename:int	file:
max77693_get_soc	drivers/power/mfd/fg_max77693.c	/^static int max77693_get_soc(u32 *soc)$/;"	f	typeref:typename:int	file:
max77693_get_vcell	drivers/power/mfd/fg_max77693.c	/^static int max77693_get_vcell(u32 *vcell)$/;"	f	typeref:typename:int	file:
max8997_reg_ldo	drivers/power/pmic/pmic_max8997.c	/^unsigned char max8997_reg_ldo(int uV)$/;"	f	typeref:typename:unsigned char
max98090	arch/arm/dts/rk3288-veyron.dtsi	/^	max98090: max98090@10 {$/;"	l
max98095_device_init	drivers/sound/max98095.c	/^static int max98095_device_init(struct max98095_priv *max98095,$/;"	f	typeref:typename:int	file:
max98095_do_init	drivers/sound/max98095.c	/^static int max98095_do_init(struct sound_codec_info *pcodec_info,$/;"	f	typeref:typename:int	file:
max98095_hw_params	drivers/sound/max98095.c	/^static int max98095_hw_params(struct max98095_priv *max98095,$/;"	f	typeref:typename:int	file:
max98095_i2c_read	drivers/sound/max98095.c	/^static unsigned int max98095_i2c_read(unsigned int reg, unsigned char *data)$/;"	f	typeref:typename:unsigned int	file:
max98095_i2c_write	drivers/sound/max98095.c	/^static int max98095_i2c_write(unsigned int reg, unsigned char data)$/;"	f	typeref:typename:int	file:
max98095_init	drivers/sound/max98095.c	/^int max98095_init(const void *blob, enum en_max_audio_interface aif_id,$/;"	f	typeref:typename:int
max98095_priv	drivers/sound/max98095.c	/^struct max98095_priv {$/;"	s	file:
max98095_reset	drivers/sound/max98095.c	/^static int max98095_reset(void)$/;"	f	typeref:typename:int	file:
max98095_set_fmt	drivers/sound/max98095.c	/^static int max98095_set_fmt(struct max98095_priv *max98095, int fmt,$/;"	f	typeref:typename:int	file:
max98095_set_sysclk	drivers/sound/max98095.c	/^static int max98095_set_sysclk(struct max98095_priv *max98095,$/;"	f	typeref:typename:int	file:
max98095_type	drivers/sound/max98095.c	/^enum max98095_type {$/;"	g	file:
max98095_update_bits	drivers/sound/max98095.c	/^static int max98095_update_bits(unsigned int reg, unsigned char mask,$/;"	f	typeref:typename:int	file:
max_adll_per_pup	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 max_adll_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
max_altera_iface_type	include/altera.h	/^	max_altera_iface_type,$/;"	e	enum:altera_iface
max_altera_type	include/altera.h	/^	max_altera_type,$/;"	e	enum:altera_family
max_bank	drivers/gpio/zynq_gpio.c	/^	int max_bank;$/;"	m	struct:zynq_platform_data	typeref:typename:int	file:
max_banks	drivers/mtd/nand/denali.h	/^	uint32_t max_banks;$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
max_beb_per1024	drivers/mtd/ubi/build.c	/^	int max_beb_per1024;$/;"	m	struct:mtd_dev_param	typeref:typename:int	file:
max_beb_per1024	include/mtd/ubi-user.h	/^	__s16 max_beb_per1024;$/;"	m	struct:ubi_attach_req	typeref:typename:__s16
max_bitflips	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		max_bitflips;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
max_blks	drivers/net/cpsw.c	/^	u32	max_blks;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
max_blks	drivers/net/cpsw.c	/^	u32	max_blks;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
max_block_size	lib/lz4_wrapper.c	/^			u8 max_block_size:3;$/;"	m	struct:lz4_frame_header::__anonc9492e16030a::__anonc9492e160408	typeref:typename:u8:3	file:
max_blocks_per_entry	include/blk.h	/^	unsigned max_blocks_per_entry;$/;"	m	struct:block_cache_stats	typeref:typename:unsigned
max_bpp	drivers/video/da8xx-fb.h	/^	int max_bpp;$/;"	m	struct:display_panel	typeref:typename:int
max_brightness	arch/arm/mach-exynos/include/mach/pwm_backlight.h	/^	int max_brightness;$/;"	m	struct:pwm_backlight_data	typeref:typename:int
max_bu_buf_len	fs/ubifs/ubifs.h	/^	int max_bu_buf_len;$/;"	m	struct:ubifs_info	typeref:typename:int
max_bud_bytes	fs/ubifs/ubifs-media.h	/^	__le64 max_bud_bytes;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le64
max_bud_bytes	fs/ubifs/ubifs.h	/^	long long max_bud_bytes;$/;"	m	struct:ubifs_info	typeref:typename:long long
max_bud_cnt	fs/ubifs/ubifs.h	/^	int max_bud_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
max_buf_size	include/dfu.h	/^	unsigned long           max_buf_size;$/;"	m	struct:dfu_entity	typeref:typename:unsigned long
max_buf_write_size	include/mtd/cfi_flash.h	/^	u16	max_buf_write_size;	\/* aligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u16
max_bus_width	include/fsl_esdhc.h	/^	u8	max_bus_width;$/;"	m	struct:fsl_esdhc_cfg	typeref:typename:u8
max_bus_width	include/mvebu_mmc.h	/^	u8	max_bus_width;$/;"	m	struct:mvebu_mmc_cfg	typeref:typename:u8
max_chain	lib/zlib/deflate.c	/^   ush max_chain;$/;"	m	struct:config_s	typeref:typename:ush	file:
max_chain_length	lib/zlib/deflate.h	/^    uInt max_chain_length;$/;"	m	struct:internal_state	typeref:typename:uInt
max_cnt	fs/ubifs/ubifs.h	/^	int max_cnt;$/;"	m	struct:ubifs_lpt_heap	typeref:typename:int
max_cnt	include/commproc.h	/^	ushort	max_cnt;	\/* maximum length counter *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
max_code	lib/zlib/deflate.h	/^    int     max_code;            \/* largest code with non zero frequency *\/$/;"	m	struct:tree_desc_s	typeref:typename:int
max_congestion_ctrl	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_congestion_ctrl;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_congestion_ctrl	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_congestion_ctrl;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_dcd_entries	tools/imximage.c	/^static uint32_t max_dcd_entries;$/;"	v	typeref:typename:uint32_t	file:
max_ddr3_freq	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int max_ddr3_freq;$/;"	m	struct:pei_data	typeref:typename:int
max_ddr3_freq	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t max_ddr3_freq;$/;"	m	struct:pei_data	typeref:typename:uint32_t
max_depth	lib/trace.c	/^	int max_depth;$/;"	m	struct:trace_hdr	typeref:typename:int	file:
max_dev	api/api_storage.c	/^	int		max_dev;$/;"	m	struct:stor_spec	typeref:typename:int	file:
max_devs	include/blk.h	/^	int max_devs;$/;"	m	struct:blk_driver	typeref:typename:int
max_dist	include/fsl-mc/fsl_dpni.h	/^		uint16_t	max_dist;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0108	typeref:typename:uint16_t
max_dist_key_size	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_dist_key_size;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_dist_key_size	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_dist_key_size;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_ec	drivers/mtd/ubi/ubi.h	/^	int max_ec;$/;"	m	struct:ubi_attach_info	typeref:typename:int
max_ec	drivers/mtd/ubi/ubi.h	/^	int max_ec;$/;"	m	struct:ubi_device	typeref:typename:int
max_endpoints	include/usbdevice.h	/^	int max_endpoints;	\/* maximimum number of rx enpoints *\/$/;"	m	struct:usb_bus_instance	typeref:typename:int
max_entries	arch/x86/cpu/coreboot/timestamp.c	/^	uint32_t	max_entries;$/;"	m	struct:timestamp_table	typeref:typename:uint32_t	file:
max_entries	include/blk.h	/^	unsigned max_entries;$/;"	m	struct:block_cache_stats	typeref:typename:unsigned
max_entries	include/part.h	/^	const int max_entries;	\/* maximum number of entries to search *\/$/;"	m	struct:part_driver	typeref:typename:const int
max_ep_writesize	drivers/usb/musb-new/musb_gadget.c	/^static inline int max_ep_writesize(struct musb *musb, struct musb_ep *ep)$/;"	f	typeref:typename:int	file:
max_erroneous	drivers/mtd/ubi/ubi.h	/^	int max_erroneous;$/;"	m	struct:ubi_device	typeref:typename:int
max_frame_length	drivers/net/altera_tse.h	/^	u32 max_frame_length;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
max_freq	arch/arm/include/asm/emif.h	/^	u32 max_freq;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u32
max_freq	arch/x86/include/asm/sfi.h	/^	u32	max_freq;$/;"	m	struct:sfi_device_table_entry	typeref:typename:u32
max_freq	drivers/spi/rk_spi.c	/^	unsigned int max_freq;$/;"	m	struct:rockchip_spi_priv	typeref:typename:unsigned int	file:
max_freq	include/fsl_ddr_sdram.h	/^	int max_freq;$/;"	m	struct:fixed_ddr_parm	typeref:typename:int
max_fs_entries	include/fsl-mc/fsl_dpni.h	/^		uint16_t	max_fs_entries;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0108	typeref:typename:uint16_t
max_gpio	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int max_gpio;	\/* Maximum GPIO in this part *\/$/;"	m	struct:gpio_info	typeref:typename:unsigned int
max_gpio	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int max_gpio;	\/* Maximum GPIO in this part *\/$/;"	m	struct:gpio_info	typeref:typename:unsigned int
max_hz	drivers/spi/cadence_qspi.h	/^	unsigned int	max_hz;$/;"	m	struct:cadence_spi_platdata	typeref:typename:unsigned int
max_hz	drivers/spi/mxc_spi.c	/^	unsigned int	max_hz;$/;"	m	struct:mxc_spi_slave	typeref:typename:unsigned int	file:
max_hz	include/spi.h	/^	uint max_hz;$/;"	m	struct:dm_spi_bus	typeref:typename:uint
max_hz	include/spi.h	/^	uint max_hz;$/;"	m	struct:dm_spi_slave_platdata	typeref:typename:uint
max_hz	include/spi.h	/^	uint max_hz;$/;"	m	struct:spi_slave	typeref:typename:uint
max_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t max_id;$/;"	m	struct:cmd_clk_get_max_clk_id_response	typeref:typename:uint32_t
max_idx_node_sz	fs/ubifs/ubifs.h	/^	int max_idx_node_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
max_inode_sz	fs/ubifs/ubifs.h	/^	long long max_inode_sz;$/;"	m	struct:ubifs_info	typeref:typename:long long
max_insert_length	lib/zlib/deflate.h	/^#   define max_insert_length /;"	d
max_khz	drivers/spi/mxs_spi.c	/^	uint32_t		max_khz;$/;"	m	struct:mxs_spi_slave	typeref:typename:uint32_t	file:
max_lane_count	drivers/video/tegra124/sor.h	/^	u8	max_lane_count;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u8
max_lane_values	drivers/phy/marvell/comphy.h	/^	u32 max_lane_values;$/;"	m	struct:comphy_mux_data	typeref:typename:u32
max_latency_count_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	max_latency_count_width;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
max_lattice_iface_type	include/lattice.h	/^	max_lattice_iface_type		\/* insert all new types before this *\/$/;"	e	enum:__anon773a64540203
max_lattice_type	include/lattice.h	/^	max_lattice_type		\/* insert all new types before this *\/$/;"	e	enum:__anon773a64540303
max_lazy	lib/zlib/deflate.c	/^   ush max_lazy;    \/* do not perform lazy search above this match length *\/$/;"	m	struct:config_s	typeref:typename:ush	file:
max_lazy_match	lib/zlib/deflate.h	/^    uInt max_lazy_match;$/;"	m	struct:internal_state	typeref:typename:uInt
max_leb_cnt	fs/ubifs/ubifs-media.h	/^	__le32 max_leb_cnt;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
max_leb_cnt	fs/ubifs/ubifs.h	/^	int max_leb_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
max_len	drivers/usb/musb-new/musb_dma.h	/^	size_t			max_len;$/;"	m	struct:dma_channel	typeref:typename:size_t
max_len	fs/ubifs/ubifs.h	/^	int max_len;$/;"	m	struct:ubifs_node_range	typeref:typename:int
max_length	lib/zlib/trees.c	/^    int     max_length;          \/* max bit length for the codes *\/$/;"	m	struct:static_tree_desc_s	typeref:typename:int	file:
max_level	drivers/video/pwm_backlight.c	/^	uint max_level;$/;"	m	struct:pwm_backlight_priv	typeref:typename:uint	file:
max_link_bw	drivers/video/tegra124/sor.h	/^	u8	max_link_bw;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u8
max_local	drivers/hwmon/adm1021.c	/^		uint max_local:8;	\/* internal temp maximum *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:8	file:
max_mcast_filter_count	include/efi_api.h	/^	u32 max_mcast_filter_count;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
max_mem	drivers/video/ct69000.c	/^	unsigned long max_mem;	\/* memory for frame buffer *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:unsigned long	file:
max_mmapped_mem	common/dlmalloc.c	/^static unsigned long max_mmapped_mem = 0;$/;"	v	typeref:typename:unsigned long	file:
max_mnt_count	include/ext_common.h	/^	__le16 max_mnt_count;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
max_mode	include/efi_api.h	/^	s32 max_mode;$/;"	m	struct:simple_text_output_mode	typeref:typename:s32
max_mode	include/efi_api.h	/^	u32 max_mode;$/;"	m	struct:efi_gop_mode	typeref:typename:u32
max_multicast_filters	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_multicast_filters;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_multicast_filters	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_multicast_filters;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_multsect	include/ata.h	/^	unsigned char	max_multsect;	\/* 0=not_implemented *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
max_n_mmaps	common/dlmalloc.c	/^static unsigned int max_n_mmaps = 0;$/;"	v	typeref:typename:unsigned int	file:
max_objects	fs/yaffs2/yaffs_guts.h	/^	int max_objects;	\/*$/;"	m	struct:yaffs_param	typeref:typename:int
max_open_frames_ipv4	include/fsl-mc/fsl_dpni.h	/^		uint16_t max_open_frames_ipv4;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0208	typeref:typename:uint16_t
max_open_frames_ipv6	include/fsl-mc/fsl_dpni.h	/^		uint16_t max_open_frames_ipv6;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0208	typeref:typename:uint16_t
max_orphans	fs/ubifs/ubifs.h	/^	int max_orphans;$/;"	m	struct:ubifs_info	typeref:typename:int
max_ot	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 max_ot;		\/* Max OT *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
max_ot	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 max_ot;		\/* Max OT *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
max_packet_size	include/efi_api.h	/^	u32 max_packet_size;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
max_packet_sz_rx	drivers/usb/musb-new/musb_core.h	/^	u16			max_packet_sz_rx;$/;"	m	struct:musb_hw_ep	typeref:typename:u16
max_packet_sz_tx	drivers/usb/musb-new/musb_core.h	/^	u16			max_packet_sz_tx;$/;"	m	struct:musb_hw_ep	typeref:typename:u16
max_pbs_per_pup	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 max_pbs_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
max_policers	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_policers;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_policers	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_policers;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_polling_for_done	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 max_polling_for_done = 1000000;$/;"	v	typeref:typename:u32
max_pool_size	drivers/mtd/ubi/ubi.h	/^	int max_pool_size;$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int
max_pool_size	drivers/mtd/ubispl/ubi-wrapper.h	/^	int max_pool_size;$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int
max_qos_entries	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_qos_entries;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_qos_entries	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_qos_entries;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_qos_key_size	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_qos_key_size;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_qos_key_size	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_qos_key_size;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_rate	include/fsl-mc/fsl_dpmac.h	/^	uint32_t		max_rate;$/;"	m	struct:dpmac_attr	typeref:typename:uint32_t
max_rate	include/fsl-mc/fsl_dprc.h	/^	uint32_t max_rate;$/;"	m	struct:dprc_connection_cfg	typeref:typename:uint32_t
max_reass_frm_size	include/fsl-mc/fsl_dpni.h	/^		uint16_t max_reass_frm_size;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0208	typeref:typename:uint16_t
max_regions	include/libfdt.h	/^	int max_regions;		\/* Maximum regions to find *\/$/;"	m	struct:fdt_region_state	typeref:typename:int
max_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct max_regs {$/;"	s
max_regs	arch/arm/include/asm/arch-mx35/imx-regs.h	/^struct max_regs {$/;"	s
max_remote	drivers/hwmon/adm1021.c	/^		uint max_remote:8;	\/* remote temp maximum *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:8	file:
max_request_packet_size	include/ec_commands.h	/^	uint16_t max_request_packet_size;$/;"	m	struct:ec_response_get_protocol_info	typeref:typename:uint16_t
max_response_packet_size	include/ec_commands.h	/^	uint16_t max_response_packet_size;$/;"	m	struct:ec_response_get_protocol_info	typeref:typename:uint16_t
max_rx_len	arch/arm/include/asm/ti-common/keystone_net.h	/^	u_int32_t max_rx_len;	\/* Maximum receive packet length. *\/$/;"	m	struct:mac_sl_cfg	typeref:typename:u_int32_t
max_rx_len	drivers/net/fm/fm.h	/^	int max_rx_len;$/;"	m	struct:fm_eth	typeref:typename:int
max_rx_len	drivers/net/fm/fm.h	/^	int max_rx_len;$/;"	m	struct:fsl_enet_mac	typeref:typename:int
max_sbrked_mem	common/dlmalloc.c	/^static unsigned long max_sbrked_mem = 0;$/;"	v	typeref:typename:unsigned long	file:
max_screen_width	include/vbe.h	/^	u16 max_screen_width;$/;"	m	struct:vbe_screen_info_input	typeref:typename:u16
max_sectors	drivers/block/sata_dwc.h	/^	unsigned int		max_sectors;$/;"	m	struct:ata_device	typeref:typename:unsigned int
max_senders	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_senders;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_senders	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_senders;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_size	drivers/mtd/ubi/ubi-media.h	/^	__be16 max_size;$/;"	m	struct:ubi_fm_scan_pool	typeref:typename:__be16
max_size	drivers/mtd/ubi/ubi.h	/^	int max_size;$/;"	m	struct:ubi_fm_pool	typeref:typename:int
max_size	drivers/mtd/ubispl/ubi-wrapper.h	/^	int max_size;$/;"	m	struct:ubi_fm_pool	typeref:typename:int
max_size_horizontal	include/edid.h	/^	unsigned char max_size_horizontal;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
max_size_vertical	include/edid.h	/^	unsigned char max_size_vertical;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
max_speed	drivers/net/designware.h	/^	u32 max_speed;$/;"	m	struct:dw_eth_dev	typeref:typename:u32
max_speed	drivers/spi/ich.h	/^	ulong max_speed;	\/* Maximum bus speed in MHz *\/$/;"	m	struct:ich_spi_priv	typeref:typename:ulong
max_speed	include/linux/usb/gadget.h	/^	enum usb_device_speed		max_speed;$/;"	m	struct:usb_gadget	typeref:enum:usb_device_speed
max_speed	include/net.h	/^	int max_speed;$/;"	m	struct:eth_pdata	typeref:typename:int
max_speed	include/smbios.h	/^	u16 max_speed;$/;"	m	struct:smbios_type4	typeref:typename:u16
max_sqnum	drivers/mtd/ubi/ubi.h	/^	unsigned long long max_sqnum;$/;"	m	struct:ubi_attach_info	typeref:typename:unsigned long long
max_sqnum	fs/ubifs/ubifs.h	/^	unsigned long long max_sqnum;$/;"	m	struct:ubifs_info	typeref:typename:unsigned long long
max_streams	include/linux/usb/gadget.h	/^	unsigned		max_streams:16;$/;"	m	struct:usb_ep	typeref:typename:unsigned:16
max_struct_size	include/smbios.h	/^	u16 max_struct_size;$/;"	m	struct:smbios_entry	typeref:typename:u16
max_t	include/linux/kernel.h	/^#define max_t(/;"	d
max_tcs	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_tcs;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_tcs	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_tcs;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_temp	fs/yaffs2/yaffs_guts.h	/^	int max_temp;$/;"	m	struct:yaffs_dev	typeref:typename:int
max_total_mem	common/dlmalloc.c	/^static unsigned long max_total_mem = 0;$/;"	v	typeref:typename:unsigned long	file:
max_transfer	disk/part_amiga.h	/^    u32 max_transfer;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
max_transfer_len	drivers/usb/host/isp116x-hcd.c	/^static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)$/;"	f	typeref:typename:int	file:
max_transfer_length	drivers/spi/fsl_espi.c	/^	unsigned int    max_transfer_length;$/;"	m	struct:fsl_spi_slave	typeref:typename:unsigned int	file:
max_uA	include/power/regulator.h	/^	int max_uA;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:int
max_uV	include/power/regulator.h	/^	int max_uV;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:int
max_unicast_filters	include/fsl-mc/fsl_dpni.h	/^		uint8_t		max_unicast_filters;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_unicast_filters	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_unicast_filters;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_val	drivers/power/exynos-tmu.c	/^	unsigned max_val;$/;"	m	struct:temperature_params	typeref:typename:unsigned	file:
max_vlan_filters	include/fsl-mc/fsl_dpni.h	/^		uint8_t			max_vlan_filters;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint8_t
max_vlan_filters	include/fsl-mc/fsl_dpni.h	/^	uint8_t max_vlan_filters;$/;"	m	struct:dpni_attr	typeref:typename:uint8_t
max_voltage	drivers/power/regulator/pwm_regulator.c	/^	unsigned int max_voltage;$/;"	m	struct:pwm_regulator_info	typeref:typename:unsigned int	file:
max_width	scripts/kconfig/lkc.h	/^	int max_width;$/;"	m	struct:gstr	typeref:typename:int
max_wl_pool_size	drivers/mtd/ubi/ubi.h	/^	int max_wl_pool_size;$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int
max_wl_pool_size	drivers/mtd/ubispl/ubi-wrapper.h	/^	int max_wl_pool_size;$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int
max_write_shift	fs/ubifs/ubifs.h	/^	int max_write_shift;$/;"	m	struct:ubifs_info	typeref:typename:int
max_write_size	drivers/mtd/ubi/ubi.h	/^	int max_write_size;$/;"	m	struct:ubi_device	typeref:typename:int
max_write_size	fs/ubifs/ubifs.h	/^	int max_write_size;$/;"	m	struct:ubifs_info	typeref:typename:int
max_write_size	include/linux/mtd/ubi.h	/^	int max_write_size;$/;"	m	struct:ubi_device_info	typeref:typename:int
max_write_size	include/spi.h	/^	unsigned int max_write_size;$/;"	m	struct:spi_slave	typeref:typename:unsigned int
max_x	include/linux/fb.h	/^	__u8  max_x;			\/* Maximum horizontal size (cm) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8
max_xilinx_iface_type	include/xilinx.h	/^	max_xilinx_iface_type	\/* insert all new types before this *\/$/;"	e	enum:__anon15c234ca0103
max_xilinx_type	include/xilinx.h	/^	max_xilinx_type		\/* insert all new types before this *\/$/;"	e	enum:__anon15c234ca0203
max_y	include/linux/fb.h	/^	__u8  max_y;			\/* Maximum vertical size (cm) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8
max_znode_sz	fs/ubifs/ubifs.h	/^	int max_znode_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
maxargs	include/command.h	/^	int		maxargs;	\/* maximum number of arguments	*\/$/;"	m	struct:cmd_tbl_s	typeref:typename:int
maxbcm_ddr_modes	board/maxbcm/maxbcm.c	/^MV_DRAM_MODES maxbcm_ddr_modes[MV_DDR3_MODES_NUMBER] = {$/;"	v	typeref:typename:MV_DRAM_MODES[]
maxbcm_serdes_cfg	board/maxbcm/maxbcm.c	/^MV_BIN_SERDES_CFG maxbcm_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
maxblocks	include/linux/mtd/bbm.h	/^	int maxblocks;$/;"	m	struct:nand_bbt_descr	typeref:typename:int
maxburst	include/linux/usb/gadget.h	/^	unsigned		maxburst:5;$/;"	m	struct:usb_ep	typeref:typename:unsigned:5
maxc	drivers/thermal/imx_thermal.c	/^	int maxc;$/;"	m	struct:thermal_data	typeref:typename:int	file:
maxchild	include/usb.h	/^	int maxchild;			\/* Number of ports if hub *\/$/;"	m	struct:usb_device	typeref:typename:int
maxcnt0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t maxcnt0;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
maxcnt1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t maxcnt1;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
maxcurr	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	maxcurr;	\/* _MAXIMUM_CURRENT_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
maxd1	drivers/qe/uec.h	/^	u16  maxd1;               \/* max dma1 length reg. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
maxd2	drivers/qe/uec.h	/^	u16  maxd2;               \/* max dma2 length reg. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
maxf	drivers/net/lpc32xx_eth.c	/^	u32 maxf;		\/* Maximum Frame register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
maxf	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic maxf; \/* 0x250*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
maxfrm	arch/powerpc/include/asm/immap_85xx.h	/^	u32	maxfrm;		\/* Maximum Frame Len *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
maxfrm	arch/powerpc/include/asm/immap_86xx.h	/^	uint	maxfrm;		\/* 0x24510 - Maximum Frame Length Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
maxfrm	include/fsl_dtsec.h	/^	u32	maxfrm;		\/* Maximum frame size *\/$/;"	m	struct:dtsec	typeref:typename:u32
maxfrm	include/fsl_memac.h	/^	u32	maxfrm;		\/* Maximum frame length register *\/$/;"	m	struct:memac	typeref:typename:u32
maxfrm	include/fsl_tgec.h	/^	u32	maxfrm;		\/* Maximum frame length register *\/$/;"	m	struct:tgec	typeref:typename:u32
maxfrm	include/tsec.h	/^	u32	maxfrm;		\/* Maximum Frame *\/$/;"	m	struct:tsec	typeref:typename:u32
maxfrmlen	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t maxfrmlen;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
maxhdrlen	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t maxhdrlen;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
maximum_speed	drivers/usb/dwc3/core.h	/^	u32			maximum_speed;$/;"	m	struct:dwc3	typeref:typename:u32
maximum_speed	include/dwc3-uboot.h	/^	u32 maximum_speed;$/;"	m	struct:dwc3_device	typeref:typename:u32
maxlen	common/cli_hush.c	/^	int maxlen;$/;"	m	struct:__anon62a9299d0508	typeref:typename:int	file:
maxp_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	maxp_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
maxpacket	drivers/usb/gadget/at91_udc.h	/^	unsigned			maxpacket:16;$/;"	m	struct:at91_ep	typeref:typename:unsigned:16
maxpacket	drivers/usb/gadget/fotg210.c	/^	uint maxpacket;$/;"	m	struct:fotg210_ep	typeref:typename:uint	file:
maxpacket	drivers/usb/host/isp116x.h	/^	u8 maxpacket;$/;"	m	struct:isp116x_ep	typeref:typename:u8
maxpacket	drivers/usb/musb-new/musb_host.h	/^	u16			maxpacket;$/;"	m	struct:musb_qh	typeref:typename:u16
maxpacket	include/linux/usb/gadget.h	/^	unsigned		maxpacket:16;$/;"	m	struct:usb_ep	typeref:typename:unsigned:16
maxpacket	include/linux/usb/musb.h	/^	u16			maxpacket;$/;"	m	struct:musb_fifo_cfg	typeref:typename:u16
maxpacket_limit	include/linux/usb/gadget.h	/^	unsigned		maxpacket_limit:16;$/;"	m	struct:usb_ep	typeref:typename:unsigned:16
maxpacketsize	drivers/usb/eth/asix88179.c	/^	int maxpacketsize;$/;"	m	struct:asix_private	typeref:typename:int	file:
maxpacketsize	include/usb.h	/^	int maxpacketsize;$/;"	m	struct:usb_device	typeref:typename:int
maxpacketsize	include/usbdevice.h	/^	unsigned char			maxpacketsize;$/;"	m	struct:usb_bus_instance	typeref:typename:unsigned char
maxperf	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	maxperf;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
maxperf	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	maxperf;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
maxperf	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	maxperf;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
maxperf	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	maxperf;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
maxport	drivers/block/sata_sil.h	/^	int maxport;$/;"	m	struct:sata_info	typeref:typename:int
maxrxpkt	include/linux/ethtool.h	/^	__u32	maxrxpkt;	\/* Rx pkts before generating rx int *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u32
maxstrings	drivers/usb/gadget/core.c	/^int maxstrings = 20;$/;"	v	typeref:typename:int
maxtxpkt	include/linux/ethtool.h	/^	__u32	maxtxpkt;	\/* Tx pkts before generating tx int *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u32
maxvalue	drivers/qe/uec.h	/^	u32   maxvalue;$/;"	m	struct:uec_rx_interrupt_coalescing_entry	typeref:typename:u32
may_reserve_for_fm	drivers/mtd/ubi/fastmap-wl.c	/^static struct ubi_wl_entry *may_reserve_for_fm(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_wl_entry *	file:
may_reserve_for_fm	drivers/mtd/ubi/wl.h	/^static struct ubi_wl_entry *may_reserve_for_fm(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_wl_entry *
may_wakeup	drivers/usb/musb-new/musb_core.h	/^	unsigned		may_wakeup:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
maybe_bad_peb_count	drivers/mtd/ubi/ubi.h	/^	int maybe_bad_peb_count;$/;"	m	struct:ubi_attach_info	typeref:typename:int
maybe_leb_gced	fs/ubifs/tnc.c	/^static int maybe_leb_gced(struct ubifs_info *c, int lnum, int gc_seq1)$/;"	f	typeref:typename:int	file:
maybe_print_eds	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void maybe_print_eds (char *label, __u32 value)$/;"	f	typeref:typename:void	file:
maybe_print_eds	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void maybe_print_eds (char *label, __u32 value)$/;"	f	typeref:typename:void	file:
maybe_print_eds	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void maybe_print_eds (char *label, __u32 value)$/;"	f	typeref:typename:void	file:
maybe_print_eds	drivers/usb/host/ohci-hcd.c	/^static void maybe_print_eds(char *label, __u32 value)$/;"	f	typeref:typename:void	file:
maybe_print_eds	drivers/usb/host/ohci-s3c24xx.c	/^static void maybe_print_eds(char *label, __u32 value)$/;"	f	typeref:typename:void	file:
maybe_self_refresh	arch/blackfin/cpu/initcode.c	/^maybe_self_refresh(ADI_BOOT_DATA *bs)$/;"	f	typeref:typename:bool	file:
mb	arch/arc/include/asm/io.h	/^#define mb(/;"	d
mb	arch/arm/include/asm/io.h	/^#define mb(/;"	d
mb	arch/blackfin/include/asm/system.h	/^#define mb(/;"	d
mb	arch/m68k/include/asm/io.h	/^#define mb(/;"	d
mb	arch/microblaze/include/asm/system.h	/^#define mb(/;"	d
mb	arch/mips/include/asm/system.h	/^#define mb(/;"	d
mb	arch/nds32/include/asm/system.h	/^#define mb(/;"	d
mb	arch/powerpc/include/asm/io.h	/^#define mb(/;"	d
mb	arch/sh/include/asm/system.h	/^#define mb(/;"	d
mb	post/lib_powerpc/rlwimi.c	/^    uchar mb;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:uchar	file:
mb	post/lib_powerpc/rlwinm.c	/^    uchar mb;$/;"	m	struct:cpu_post_rlwinm_s	typeref:typename:uchar	file:
mb	post/lib_powerpc/rlwnm.c	/^    uchar mb;$/;"	m	struct:cpu_post_rlwnm_s	typeref:typename:uchar	file:
mb0cf	arch/powerpc/cpu/ppc4xx/sdram.c	/^sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE;$/;"	v	typeref:typename:sdram_conf_t[]
mb0cf	arch/powerpc/cpu/ppc4xx/sdram.c	/^sdram_conf_t mb0cf[] = {$/;"	v	typeref:typename:sdram_conf_t[]
mb862xx	drivers/video/mb862xx.c	/^GraphicDevice mb862xx;$/;"	v	typeref:typename:GraphicDevice
mb862xx_probe	drivers/video/mb862xx.c	/^int mb862xx_probe(unsigned int addr)$/;"	f	typeref:typename:int
mba6_ecspi1_cs	board/tqc/tqma6/tqma6_mba6.c	/^static unsigned const mba6_ecspi1_cs[] = {$/;"	v	typeref:typename:unsigned const[]	file:
mba6_ecspi1_pads	board/tqc/tqma6/tqma6_mba6.c	/^static iomux_v3_cfg_t const mba6_ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
mba6_enet_pads	board/tqc/tqma6/tqma6_mba6.c	/^static iomux_v3_cfg_t const mba6_enet_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
mba6_i2c1_pads	board/tqc/tqma6/tqma6_mba6.c	/^static struct i2c_pads_info mba6_i2c1_pads = {$/;"	v	typeref:struct:i2c_pads_info	file:
mba6_setup_i2c	board/tqc/tqma6/tqma6_mba6.c	/^static void mba6_setup_i2c(void)$/;"	f	typeref:typename:void	file:
mba6_setup_iomuxc_enet	board/tqc/tqma6/tqma6_mba6.c	/^static void mba6_setup_iomuxc_enet(void)$/;"	f	typeref:typename:void	file:
mba6_setup_iomuxc_spi	board/tqc/tqma6/tqma6_mba6.c	/^static void mba6_setup_iomuxc_spi(void)$/;"	f	typeref:typename:void	file:
mba6_setup_iomuxc_uart	board/tqc/tqma6/tqma6_mba6.c	/^static void mba6_setup_iomuxc_uart(void)$/;"	f	typeref:typename:void	file:
mba6_uart2_pads	board/tqc/tqma6/tqma6_mba6.c	/^static iomux_v3_cfg_t const mba6_uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
mba6_usdhc2_pads	board/tqc/tqma6/tqma6_mba6.c	/^static iomux_v3_cfg_t const mba6_usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
mba6_usdhc_cfg	board/tqc/tqma6/tqma6_mba6.c	/^static struct fsl_esdhc_cfg mba6_usdhc_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
mbacr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mbacr;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mbacr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mbacr;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mbagcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mbagcr[6];		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[6]
mbagcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mbagcr;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mbagcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mbagcr[6];		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[6]
mbagcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mbagcr;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mbar	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 mbar;		\/* 0x00 *\/$/;"	m	struct:siu	typeref:typename:u32
mbar	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $mbar  = 0x10000001$/;"	t
mbar	include/ambapp.h	/^	const unsigned int	mbar[4];	\/* MASK, ADDRESS, TYPE,$/;"	m	struct:ambapp_pnp_ahb	typeref:typename:const unsigned int[4]
mbar	include/mpc5xxx.h	/^	volatile u32	mbar;$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
mbar2_readLong	arch/m68k/include/asm/m5249.h	/^#define mbar2_readLong(/;"	d
mbar2_writeByte	arch/m68k/include/asm/m5249.h	/^#define mbar2_writeByte(/;"	d
mbar2_writeLong	arch/m68k/include/asm/m5249.h	/^#define mbar2_writeLong(/;"	d
mbar2_writeShort	arch/m68k/include/asm/m5249.h	/^#define mbar2_writeShort(/;"	d
mbar_readByte	arch/m68k/include/asm/m5271.h	/^#define mbar_readByte(/;"	d
mbar_readLong	arch/m68k/include/asm/m5249.h	/^#define mbar_readLong(/;"	d
mbar_readLong	arch/m68k/include/asm/m5271.h	/^#define mbar_readLong(/;"	d
mbar_readShort	arch/m68k/include/asm/m5271.h	/^#define mbar_readShort(/;"	d
mbar_writeByte	arch/m68k/include/asm/m5249.h	/^#define mbar_writeByte(/;"	d
mbar_writeByte	arch/m68k/include/asm/m5271.h	/^#define mbar_writeByte(/;"	d
mbar_writeLong	arch/m68k/include/asm/m5249.h	/^#define mbar_writeLong(/;"	d
mbar_writeLong	arch/m68k/include/asm/m5271.h	/^#define mbar_writeLong(/;"	d
mbar_writeShort	arch/m68k/include/asm/m5249.h	/^#define mbar_writeShort(/;"	d
mbar_writeShort	arch/m68k/include/asm/m5271.h	/^#define mbar_writeShort(/;"	d
mbinptr	common/dlmalloc.c	/^typedef struct malloc_chunk* mbinptr;$/;"	t	typeref:struct:malloc_chunk *	file:
mbkp_keyscan	include/cros_ec.h	/^struct mbkp_keyscan {$/;"	s
mblinterval	drivers/qe/uec.h	/^	u32  mblinterval;      \/* max burst length interval        *\/$/;"	m	struct:uec_scheduler	typeref:typename:u32
mbmr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     mbmr;           \/* LBC UPMB Mode *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
mbox	arch/sandbox/dts/test.dts	/^	mbox: mbox {$/;"	l
mbox	drivers/misc/tegra186_bpmp.c	/^	struct mbox_chan mbox;$/;"	m	struct:tegra186_bpmp	typeref:struct:mbox_chan	file:
mbox0	include/tsi148.h	/^	unsigned int mbox0;                   \/* 0x610         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
mbox1	include/tsi148.h	/^	unsigned int mbox1;                   \/* 0x614         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
mbox2	include/tsi148.h	/^	unsigned int mbox2;                   \/* 0x618         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
mbox3	include/tsi148.h	/^	unsigned int mbox3;                   \/* 0x61c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
mbox_chan	include/mailbox.h	/^struct mbox_chan {$/;"	s
mbox_dev_ops	drivers/mailbox/mailbox-uclass.c	/^static inline struct mbox_ops *mbox_dev_ops(struct udevice *dev)$/;"	f	typeref:struct:mbox_ops *	file:
mbox_free	drivers/mailbox/mailbox-uclass.c	/^int mbox_free(struct mbox_chan *chan)$/;"	f	typeref:typename:int
mbox_get_by_index	drivers/mailbox/mailbox-uclass.c	/^int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan)$/;"	f	typeref:typename:int
mbox_get_by_name	drivers/mailbox/mailbox-uclass.c	/^int mbox_get_by_name(struct udevice *dev, const char *name,$/;"	f	typeref:typename:int
mbox_of_xlate_default	drivers/mailbox/mailbox-uclass.c	/^static int mbox_of_xlate_default(struct mbox_chan *chan,$/;"	f	typeref:typename:int	file:
mbox_ops	include/mailbox-uclass.h	/^struct mbox_ops {$/;"	s
mbox_recv	drivers/mailbox/mailbox-uclass.c	/^int mbox_recv(struct mbox_chan *chan, void *data, ulong timeout_us)$/;"	f	typeref:typename:int
mbox_send	drivers/mailbox/mailbox-uclass.c	/^int mbox_send(struct mbox_chan *chan, const void *data)$/;"	f	typeref:typename:int
mbox_wkupm3	arch/arm/dts/am33xx.dtsi	/^			mbox_wkupm3: wkup_m3 {$/;"	l	label:mailbox
mbox_wkupm3	arch/arm/dts/am4372.dtsi	/^			mbox_wkupm3: wkup_m3 {$/;"	l	label:mailbox
mbp_cleared	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 mbp_cleared:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
mbp_fw_caps	arch/x86/include/asm/arch-ivybridge/me.h	/^struct __packed mbp_fw_caps {$/;"	s
mbp_fw_version_name	arch/x86/include/asm/arch-broadwell/me.h	/^struct mbp_fw_version_name {$/;"	s
mbp_fw_version_name	arch/x86/include/asm/arch-ivybridge/me.h	/^struct __packed mbp_fw_version_name {$/;"	s
mbp_header	arch/x86/include/asm/me_common.h	/^struct __packed mbp_header {$/;"	s
mbp_icc_profile	arch/x86/include/asm/arch-broadwell/me.h	/^struct mbp_icc_profile {$/;"	s
mbp_icc_profile	arch/x86/include/asm/arch-ivybridge/me.h	/^struct __packed mbp_icc_profile {$/;"	s
mbp_item_header	arch/x86/include/asm/me_common.h	/^struct __packed mbp_item_header {$/;"	s
mbp_plat_type	arch/x86/include/asm/arch-ivybridge/me.h	/^struct __packed mbp_plat_type {$/;"	s
mbp_platform_key	arch/x86/include/asm/me_common.h	/^struct __packed mbp_platform_key {$/;"	s
mbp_rdy	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 mbp_rdy:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
mbp_rdy	arch/x86/include/asm/me_common.h	/^	u32 mbp_rdy:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
mbp_rom_bist_data	arch/x86/include/asm/me_common.h	/^struct __packed mbp_rom_bist_data {$/;"	s
mbp_size	arch/x86/include/asm/me_common.h	/^	u32 mbp_size:8;$/;"	m	struct:mbp_header	typeref:typename:u32:8
mbr_signature	include/linux/edd.h	/^	unsigned int mbr_signature[EDD_MBR_SIG_MAX];$/;"	m	struct:edd	typeref:typename:unsigned int[]
mbr_signature_nr	include/linux/edd.h	/^	unsigned char mbr_signature_nr;$/;"	m	struct:edd	typeref:typename:unsigned char
mbus0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mbus0_clk_cfg;	\/* 0x15c MBUS0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mbus0_clk_cfg;	\/* 0x15c MBUS0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mbus1_clk_cfg;	\/* 0x160 MBUS1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mbus1_clk_cfg;	\/* 0x160 MBUS1 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_attr	include/linux/mbus.h	/^		u8	mbus_attr;$/;"	m	struct:mbus_dram_target_info::mbus_dram_window	typeref:typename:u8
mbus_clk	arch/arm/dts/sun5i.dtsi	/^		mbus_clk: clk@01c2015c {$/;"	l
mbus_clk	arch/arm/dts/sun7i-a20.dtsi	/^		mbus_clk: clk@01c2015c {$/;"	l
mbus_clk	arch/arm/dts/sun8i-a23.dtsi	/^		mbus_clk: clk@01c2015c {$/;"	l
mbus_clk	arch/arm/dts/sun8i-a33.dtsi	/^		mbus_clk: clk@01c2015c {$/;"	l
mbus_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 mbus_clk_cfg;	\/* 0x15c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 mbus_clk_cfg;	\/* 0x15c MBUS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 mbus_clk_cfg;	\/* 0x15c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 mbus_clk_cfg;	\/* 0x15c MBUS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_clock	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 mbus_clock;$/;"	m	struct:dram_para	typeref:typename:u32
mbus_clock	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 mbus_clock;$/;"	m	struct:dram_para	typeref:typename:u32
mbus_dram_info	arch/arm/mach-mvebu/mbus.c	/^static struct mbus_dram_target_info mbus_dram_info$/;"	v	typeref:struct:mbus_dram_target_info	file:
mbus_dram_target_id	include/linux/mbus.h	/^	u8		mbus_dram_target_id;$/;"	m	struct:mbus_dram_target_info	typeref:typename:u8
mbus_dram_target_info	include/linux/mbus.h	/^struct mbus_dram_target_info {$/;"	s
mbus_dram_window	include/linux/mbus.h	/^	struct mbus_dram_window {$/;"	s	struct:mbus_dram_target_info
mbus_dt_setup_win	arch/arm/mach-mvebu/mbus.c	/^int mbus_dt_setup_win(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:int
mbus_reset	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mbus_reset;		\/* 0xfc MBUS reset control, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_reset	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 mbus_reset;		\/* 0xfc MBUS reset control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_reset	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mbus_reset;		\/* 0xfc MBUS reset control, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_reset	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 mbus_reset;		\/* 0xfc MBUS reset control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mbus_state	arch/arm/mach-mvebu/mbus.c	/^struct mvebu_mbus_state mbus_state$/;"	v	typeref:struct:mvebu_mbus_state
mbus_win	arch/arm/mach-mvebu/include/mach/cpu.h	/^struct mbus_win {$/;"	s
mbusc	arch/arm/dts/armada-370-xp.dtsi	/^			mbusc: mbus-controller@20000 {$/;"	l
mbusc	arch/arm/dts/armada-375.dtsi	/^			mbusc: mbus-controller@20000 {$/;"	l
mbusc	arch/arm/dts/armada-38x.dtsi	/^			mbusc: mbus-controller@20000 {$/;"	l
mbuswins_base	include/linux/mbus.h	/^	void __iomem *mbuswins_base;$/;"	m	struct:mvebu_mbus_state	typeref:typename:void __iomem *
mbxbar	arch/powerpc/include/asm/immap_512x.h	/^	u32 mbxbar;		\/* MBX Base Address *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
mbz_0	arch/x86/lib/physmem.c	/^	uint64_t mbz_0:2;$/;"	m	struct:pdpe	typeref:typename:uint64_t:2	file:
mbz_0	arch/x86/lib/physmem.c	/^	uint64_t mbz_0:8;  \/* must be zero *\/$/;"	m	struct:pde	typeref:typename:uint64_t:8	file:
mbz_1	arch/x86/lib/physmem.c	/^	uint64_t mbz_1:4;$/;"	m	struct:pdpe	typeref:typename:uint64_t:4	file:
mbz_2	arch/x86/lib/physmem.c	/^	uint64_t mbz_2:12;$/;"	m	struct:pdpe	typeref:typename:uint64_t:12	file:
mc	arch/arm/dts/tegra114.dtsi	/^	mc: memory-controller@70019000 {$/;"	l
mc	arch/arm/dts/tegra124.dtsi	/^	mc: memory-controller@70019000 {$/;"	l
mc	arch/arm/dts/tegra210.dtsi	/^	mc: memory-controller@70019000 {$/;"	l
mc	arch/arm/dts/tegra30.dtsi	/^	mc: memory-controller@7000f000 {$/;"	l
mc	arch/arm/dts/zynq-7000.dtsi	/^		mc: memory-controller@f8006000 {$/;"	l	label:amba
mc	arch/arm/dts/zynqmp.dtsi	/^		mc: memory-controller@fd070000 {$/;"	l
mc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
mc	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	} mc;$/;"	m	struct:qbman_swp	typeref:struct:qbman_swp::__anonadc6216b0108
mc146818_get	drivers/rtc/mc146818.c	/^static int mc146818_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int	file:
mc146818_init	drivers/rtc/mc146818.c	/^static void mc146818_init(void)$/;"	f	typeref:typename:void	file:
mc146818_read8	drivers/rtc/mc146818.c	/^static int mc146818_read8(int reg)$/;"	f	typeref:typename:int	file:
mc146818_reset	drivers/rtc/mc146818.c	/^static void mc146818_reset(void)$/;"	f	typeref:typename:void	file:
mc146818_set	drivers/rtc/mc146818.c	/^static int mc146818_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int	file:
mc146818_write8	drivers/rtc/mc146818.c	/^static void mc146818_write8(int reg, uchar val)$/;"	f	typeref:typename:void	file:
mc9sdz60_reg	include/mc9sdz60.h	/^enum mc9sdz60_reg {$/;"	g
mc9sdz60_reg_read	drivers/misc/mc9sdz60.c	/^u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg)$/;"	f	typeref:typename:u8
mc9sdz60_reg_write	drivers/misc/mc9sdz60.c	/^void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val)$/;"	f	typeref:typename:void
mc_aiop_applied	drivers/net/fsl-mc/mc.c	/^static int mc_aiop_applied = -1;$/;"	v	typeref:typename:int	file:
mc_apply_dpl	drivers/net/fsl-mc/mc.c	/^int mc_apply_dpl(u64 mc_dpl_addr)$/;"	f	typeref:typename:int
mc_boot_status	drivers/net/fsl-mc/mc.c	/^static int mc_boot_status = -1;$/;"	v	typeref:typename:int	file:
mc_ccsr_registers	include/fsl-mc/fsl_mc.h	/^struct mc_ccsr_registers {$/;"	s
mc_clkdis	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_clkdis;			\/* 0x4001 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_clkdis	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_clkdis;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_cmd_status	include/fsl-mc/fsl_mc_cmd.h	/^enum mc_cmd_status {$/;"	g
mc_command	include/fsl-mc/fsl_mc_cmd.h	/^struct mc_command {$/;"	s
mc_control	include/gdsys_fpga.h	/^	u16 mc_control;		\/* 0x0046 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_control	include/gdsys_fpga.h	/^	u16 mc_control;		\/* 0x0066 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_copy_image	drivers/net/fsl-mc/mc.c	/^static int mc_copy_image(const char *title,$/;"	f	typeref:typename:int	file:
mc_ctlr	arch/arm/include/asm/arch-tegra114/mc.h	/^struct mc_ctlr {$/;"	s
mc_ctlr	arch/arm/include/asm/arch-tegra124/mc.h	/^struct mc_ctlr {$/;"	s
mc_ctlr	arch/arm/include/asm/arch-tegra20/mc.h	/^struct mc_ctlr {$/;"	s
mc_ctlr	arch/arm/include/asm/arch-tegra210/mc.h	/^struct mc_ctlr {$/;"	s
mc_ctlr	arch/arm/include/asm/arch-tegra30/mc.h	/^struct mc_ctlr {$/;"	s
mc_dec	include/fsl-mc/fsl_mc_cmd.h	/^static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)$/;"	f	typeref:typename:uint64_t
mc_decerr_emem_others_adr	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_decerr_emem_others_adr;		\/* offset 0x5C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_decerr_emem_others_status	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_decerr_emem_others_status;	\/* offset 0x58 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_dpl_applied	drivers/net/fsl-mc/mc.c	/^static int mc_dpl_applied = -1;$/;"	v	typeref:typename:int	file:
mc_emem_adr_cfg	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_emem_adr_cfg;			\/* offset 0x54 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_emem_adr_cfg;			\/* offset 0x54 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_emem_adr_cfg;			\/* offset 0x10 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_emem_adr_cfg;			\/* offset 0x54 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_emem_adr_cfg;			\/* offset 0x54 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev0	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_emem_adr_cfg_dev0;		\/* offset 0x58 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev0	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_emem_adr_cfg_dev0;		\/* offset 0x58 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev0	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_emem_adr_cfg_dev0;		\/* offset 0x58 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev0	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_emem_adr_cfg_dev0;		\/* offset 0x58 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev1	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_emem_adr_cfg_dev1;		\/* offset 0x5C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev1	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_emem_adr_cfg_dev1;		\/* offset 0x5C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev1	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_emem_adr_cfg_dev1;		\/* offset 0x5C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_adr_cfg_dev1	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_emem_adr_cfg_dev1;		\/* offset 0x5C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_arb_cfg0	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_emem_arb_cfg0;			\/* offset 0x14 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_arb_cfg1	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_emem_arb_cfg1;			\/* offset 0x18 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_arb_cfg2	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_emem_arb_cfg2;			\/* offset 0x1C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_arb_reserved	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_emem_arb_reserved[28];		\/* offset 0x90 - 0xFC *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[28]
mc_emem_arb_reserved	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_emem_arb_reserved[28];		\/* offset 0x90 - 0xFC *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[28]
mc_emem_arb_reserved	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_emem_arb_reserved[28];		\/* offset 0x90 - 0xFC *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[28]
mc_emem_arb_reserved	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_emem_arb_reserved[28];		\/* offset 0x90 - 0xFC *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[28]
mc_emem_cfg	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_emem_cfg;			\/* offset 0x50 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_cfg	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_emem_cfg;			\/* offset 0x50 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_cfg	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_emem_cfg;			\/* offset 0x0C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_cfg	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_emem_cfg;			\/* offset 0x50 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_emem_cfg	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_emem_cfg;			\/* offset 0x50 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_enc	include/fsl-mc/fsl_mc_cmd.h	/^static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)$/;"	f	typeref:typename:uint64_t
mc_encode_cmd_header	include/fsl-mc/fsl_mc_cmd.h	/^static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,$/;"	f	typeref:typename:uint64_t
mc_fixup_dpc	drivers/net/fsl-mc/mc.c	/^static int mc_fixup_dpc(u64 dpc_addr)$/;"	f	typeref:typename:int	file:
mc_flowctrl	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_flowctrl;			\/* 0x4004 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_flowctrl	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_flowctrl;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_gart_cfg	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_gart_cfg;			\/* offset 0x24 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_gart_entry_addr	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_gart_entry_addr;			\/* offset 0x28 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_gart_entry_data	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_gart_entry_data;			\/* offset 0x2C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_gart_error_addr	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_gart_error_addr;			\/* offset 0x34 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_gart_error_req	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_gart_error_req;			\/* offset 0x30 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_get_dram_addr	drivers/net/fsl-mc/mc.c	/^u64 mc_get_dram_addr(void)$/;"	f	typeref:typename:u64
mc_get_dram_block_size	drivers/net/fsl-mc/mc.c	/^unsigned long mc_get_dram_block_size(void)$/;"	f	typeref:typename:unsigned long
mc_get_version	drivers/net/fsl-mc/dpmng.c	/^int mc_get_version(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
mc_heacphy_rst	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_heacphy_rst;		\/* 0x4007 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_heacphy_rst	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_heacphy_rst;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_init	drivers/net/fsl-mc/mc.c	/^int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)$/;"	f	typeref:typename:int
mc_init_object	drivers/net/fsl-mc/mc.c	/^static int mc_init_object(void)$/;"	f	typeref:typename:int	file:
mc_int	include/gdsys_fpga.h	/^	u16 mc_int;		\/* 0x0040 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_int	include/gdsys_fpga.h	/^	u16 mc_int;		\/* 0x0060 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_int_en	include/gdsys_fpga.h	/^	u16 mc_int_en;		\/* 0x0042 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_int_en	include/gdsys_fpga.h	/^	u16 mc_int_en;		\/* 0x0062 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_lockonclock	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_lockonclock;		\/* 0x4006 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_lockonclock	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_lockonclock;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_opctrl	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_opctrl;			\/* 0x4003 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_opctrl	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_opctrl;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_phyrstz	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_phyrstz;			\/* 0x4005 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_phyrstz	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_phyrstz;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_read_response	include/fsl-mc/fsl_mc_cmd.h	/^static inline enum mc_cmd_status mc_read_response($/;"	f	typeref:enum:mc_cmd_status
mc_res	include/gdsys_fpga.h	/^	u16 mc_res;		\/* 0x004e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_res	include/gdsys_fpga.h	/^	u16 mc_res;		\/* 0x006e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_rx_cmd_status	include/gdsys_fpga.h	/^	u16 mc_rx_cmd_status;	\/* 0x0050 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_rx_cmd_status	include/gdsys_fpga.h	/^	u16 mc_rx_cmd_status;	\/* 0x0070 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_rx_data	include/gdsys_fpga.h	/^	u16 mc_rx_data;		\/* 0x0052 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_rx_data	include/gdsys_fpga.h	/^	u16 mc_rx_data;		\/* 0x0072 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_security_cfg0	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_security_cfg0;			\/* offset 0x70 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_security_cfg0	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_security_cfg0;			\/* offset 0x70 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_security_cfg1	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_security_cfg1;			\/* offset 0x74 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_security_cfg1	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_security_cfg1;			\/* offset 0x74 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_send_command	drivers/net/fsl-mc/mc_sys.c	/^int mc_send_command(struct fsl_mc_io *mc_io,$/;"	f	typeref:typename:int
mc_sfrdiv	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_sfrdiv;			\/* 0x4000 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_sfrdiv	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_sfrdiv;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_smmu_afi_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_afi_asid;			\/* offset 0x238 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_afi_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_afi_asid;			\/* offset 0x238 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_asid_security	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_asid_security;		\/* offset 0x38 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_avpc_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_avpc_asid;			\/* offset 0x23C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_avpc_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_avpc_asid;			\/* offset 0x23C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_config	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_config;			\/* offset 0x10 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_config	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_config;			\/* offset 0x10 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_config	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_config;			\/* offset 0x10 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_config	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_config;			\/* offset 0x10 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_dc_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_dc_asid;			\/* offset 0x240 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_dc_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_dc_asid;			\/* offset 0x240 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_dcb_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_dcb_asid;			\/* offset 0x244 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_dcb_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_dcb_asid;			\/* offset 0x244 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_hc_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_hc_asid;			\/* offset 0x250 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_hc_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_hc_asid;			\/* offset 0x250 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_hda_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_hda_asid;			\/* offset 0x254 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_hda_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_hda_asid;			\/* offset 0x254 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_isp2_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_isp2_asid;			\/* offset 0x258 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_isp2_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_isp2_asid;			\/* offset 0x258 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_msenc_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_msenc_asid;			\/* offset 0x264 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_msenc_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_msenc_asid;			\/* offset 0x264 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_nv2_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_nv2_asid;			\/* offset 0x26C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_nv2_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_nv2_asid;			\/* offset 0x26C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_nv_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_nv_asid;			\/* offset 0x268 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_nv_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_nv_asid;			\/* offset 0x268 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ppcs1_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_ppcs1_asid;			\/* offset 0x298 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ppcs1_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_ppcs1_asid;			\/* offset 0x298 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ppcs_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_ppcs_asid;			\/* offset 0x270 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ppcs_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_ppcs_asid;			\/* offset 0x270 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_asid	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_ptb_asid;			\/* offset 0x1C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_ptb_asid;			\/* offset 0x1C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_ptb_asid;			\/* offset 0x1C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_asid	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_ptb_asid;			\/* offset 0x1C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_data	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_ptb_data;			\/* offset 0x20 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_data	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_ptb_data;			\/* offset 0x20 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_data	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_ptb_data;			\/* offset 0x20 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptb_data	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_ptb_data;			\/* offset 0x20 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_config	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_ptc_config;			\/* offset 0x18 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_config	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_ptc_config;			\/* offset 0x18 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_config	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_ptc_config;			\/* offset 0x18 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_config	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_ptc_config;			\/* offset 0x18 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_flush	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_ptc_flush;			\/* offset 0x34 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_flush	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_ptc_flush;			\/* offset 0x34 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_flush	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_ptc_flush;			\/* offset 0x34 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_ptc_flush	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_ptc_flush;			\/* offset 0x34 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_sata_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_sata_asid;			\/* offset 0x274 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_sata_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_sata_asid;			\/* offset 0x274 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_config	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_tlb_config;			\/* offset 0x14 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_config	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_tlb_config;			\/* offset 0x14 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_config	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_tlb_config;			\/* offset 0x14 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_config	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_tlb_config;			\/* offset 0x14 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_flush	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_smmu_tlb_flush;			\/* offset 0x30 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_flush	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_tlb_flush;			\/* offset 0x30 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_flush	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_tlb_flush;			\/* offset 0x30 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tlb_flush	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_smmu_tlb_flush;			\/* offset 0x30 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_0	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_translation_enable_0;	\/* offset 0x228 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_0	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_translation_enable_0;	\/* offset 0x228 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_1	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_translation_enable_1;	\/* offset 0x22C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_1	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_translation_enable_1;	\/* offset 0x22C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_2	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_translation_enable_2;	\/* offset 0x230 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_2	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_translation_enable_2;	\/* offset 0x230 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_3	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_translation_enable_3;	\/* offset 0x234 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_translation_enable_3	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_translation_enable_3;	\/* offset 0x234 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tsec_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_tsec_asid;			\/* offset 0x294 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_tsec_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_tsec_asid;			\/* offset 0x294 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_vde_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_vde_asid;			\/* offset 0x27C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_vde_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_vde_asid;			\/* offset 0x27C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_vi_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_vi_asid;			\/* offset 0x280 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_vi_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_vi_asid;			\/* offset 0x280 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_vic_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_vic_asid;			\/* offset 0x284 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_vic_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_vic_asid;			\/* offset 0x284 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_xusb_dev_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_xusb_dev_asid;		\/* offset 0x28C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_xusb_dev_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_xusb_dev_asid;		\/* offset 0x28C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_xusb_host_asid	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_smmu_xusb_host_asid;		\/* offset 0x288 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_smmu_xusb_host_asid	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_smmu_xusb_host_asid;		\/* offset 0x288 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_status	include/gdsys_fpga.h	/^	u16 mc_status;		\/* 0x0044 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_status	include/gdsys_fpga.h	/^	u16 mc_status;		\/* 0x0064 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_swrstz	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 mc_swrstz;			\/* 0x4002 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
mc_swrstz	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 mc_swrstz;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
mc_timeout_ctrl	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 mc_timeout_ctrl;			\/* offset 0x3C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_tx_address	include/gdsys_fpga.h	/^	u16 mc_tx_address;	\/* 0x004a *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_tx_address	include/gdsys_fpga.h	/^	u16 mc_tx_address;	\/* 0x006a *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_tx_cmd	include/gdsys_fpga.h	/^	u16 mc_tx_cmd;		\/* 0x004c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_tx_cmd	include/gdsys_fpga.h	/^	u16 mc_tx_cmd;		\/* 0x006c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_tx_data	include/gdsys_fpga.h	/^	u16 mc_tx_data;		\/* 0x0048 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_tx_data	include/gdsys_fpga.h	/^	u16 mc_tx_data;		\/* 0x0068 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mc_version	include/fsl-mc/fsl_dpmng.h	/^struct mc_version {$/;"	s
mc_video_protect_bom	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_video_protect_bom;		\/* offset 0x648 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_bom	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_video_protect_bom;		\/* offset 0x648 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_bom	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_video_protect_bom;		\/* offset 0x648 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_bom	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_video_protect_bom;		\/* offset 0x648 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_reg_ctrl	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_video_protect_reg_ctrl;		\/* offset 0x650 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_reg_ctrl	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_video_protect_reg_ctrl;		\/* offset 0x650 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_reg_ctrl	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_video_protect_reg_ctrl;		\/* offset 0x650 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_reg_ctrl	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_video_protect_reg_ctrl;		\/* offset 0x650 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_size_mb	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 mc_video_protect_size_mb;		\/* offset 0x64c *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_size_mb	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 mc_video_protect_size_mb;		\/* offset 0x64c *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_size_mb	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 mc_video_protect_size_mb;		\/* offset 0x64c *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_video_protect_size_mb	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 mc_video_protect_size_mb;		\/* offset 0x64c *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
mc_write_command	include/fsl-mc/fsl_mc_cmd.h	/^static inline void mc_write_command(struct mc_command __iomem *portal,$/;"	f	typeref:typename:void
mcasp0	arch/arm/dts/am33xx.dtsi	/^		mcasp0: mcasp@48038000 {$/;"	l
mcasp0	arch/arm/dts/am4372.dtsi	/^		mcasp0: mcasp@48038000 {$/;"	l
mcasp0_aclkr	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_aclkr;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_aclkr	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_aclkr;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_aclkx	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_aclkx;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_aclkx	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_aclkx;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_ahclkr	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_ahclkr;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_ahclkr	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_ahclkr;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_ahclkx	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_ahclkx;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_ahclkx	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_ahclkx;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_axr0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_axr0;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_axr0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_axr0;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_axr1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_axr1;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_axr1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_axr1;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	mcasp0_fck: mcasp0_fck {$/;"	l
mcasp0_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	mcasp0_fck: mcasp0_fck {$/;"	l
mcasp0_fsr	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_fsr;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_fsr	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_fsr;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_fsx	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mcasp0_fsx;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0_fsx	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mcasp0_fsx;$/;"	m	struct:pad_signals	typeref:typename:int
mcasp0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mcasp0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mcasp0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mcasp0clkctrl;	\/* offset 0x238 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mcasp0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mcasp0clkctrl;	\/* offset 0x34 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mcasp1	arch/arm/dts/am33xx.dtsi	/^		mcasp1: mcasp@4803C000 {$/;"	l
mcasp1	arch/arm/dts/am4372.dtsi	/^		mcasp1: mcasp@4803C000 {$/;"	l
mcasp1_ahclkr_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp1_ahclkr_mux: mcasp1_ahclkr_mux {$/;"	l
mcasp1_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp1_ahclkx_mux: mcasp1_ahclkx_mux {$/;"	l
mcasp1_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp1_aux_gfclk_mux: mcasp1_aux_gfclk_mux {$/;"	l
mcasp1_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	mcasp1_fck: mcasp1_fck {$/;"	l
mcasp1_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	mcasp1_fck: mcasp1_fck {$/;"	l
mcasp1_pins	arch/arm/dts/am335x-evmsk.dts	/^	mcasp1_pins: mcasp1_pins {$/;"	l
mcasp1_pins	arch/arm/dts/am437x-sk-evm.dts	/^	mcasp1_pins: mcasp1_pins {$/;"	l
mcasp1_pins	arch/arm/dts/am43x-epos-evm.dts	/^		mcasp1_pins: mcasp1_pins {$/;"	l
mcasp1_pins_sleep	arch/arm/dts/am335x-evmsk.dts	/^	mcasp1_pins_sleep: mcasp1_pins_sleep {$/;"	l
mcasp1_sleep_pins	arch/arm/dts/am43x-epos-evm.dts	/^		mcasp1_sleep_pins: mcasp1_sleep_pins {$/;"	l
mcasp1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mcasp1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mcasp1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mcasp1clkctrl;	\/* offset 0x240 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mcasp1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mcasp1clkctrl;	\/* offset 0x68 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mcasp2_ahclkr_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp2_ahclkr_mux: mcasp2_ahclkr_mux {$/;"	l
mcasp2_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp2_ahclkx_mux: mcasp2_ahclkx_mux {$/;"	l
mcasp2_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp2_aux_gfclk_mux: mcasp2_aux_gfclk_mux {$/;"	l
mcasp2clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mcasp2clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mcasp345clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mcasp345clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mcasp3_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp3_ahclkx_mux: mcasp3_ahclkx_mux {$/;"	l
mcasp3_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp3_aux_gfclk_mux: mcasp3_aux_gfclk_mux {$/;"	l
mcasp4_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp4_ahclkx_mux: mcasp4_ahclkx_mux {$/;"	l
mcasp4_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp4_aux_gfclk_mux: mcasp4_aux_gfclk_mux {$/;"	l
mcasp5_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp5_ahclkx_mux: mcasp5_ahclkx_mux {$/;"	l
mcasp5_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp5_aux_gfclk_mux: mcasp5_aux_gfclk_mux {$/;"	l
mcasp6_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp6_ahclkx_mux: mcasp6_ahclkx_mux {$/;"	l
mcasp6_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp6_aux_gfclk_mux: mcasp6_aux_gfclk_mux {$/;"	l
mcasp7_ahclkx_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp7_ahclkx_mux: mcasp7_ahclkx_mux {$/;"	l
mcasp7_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp7_aux_gfclk_mux: mcasp7_aux_gfclk_mux {$/;"	l
mcasp8_ahclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp8_ahclk_mux: mcasp8_ahclk_mux {$/;"	l
mcasp8_aux_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mcasp8_aux_gfclk_mux: mcasp8_aux_gfclk_mux {$/;"	l
mcast	include/net.h	/^	int (*mcast)(struct eth_device *, const u8 *enetaddr, u8 set);$/;"	m	struct:eth_device	typeref:typename:int (*)(struct eth_device *,const u8 * enetaddr,u8 set)
mcast	include/net.h	/^	int (*mcast)(struct udevice *dev, const u8 *enetaddr, int join);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev,const u8 * enetaddr,int join)
mcast_bits	drivers/net/ks8851_mll.c	/^	u8			mcast_bits[HW_MCAST_SIZE];$/;"	m	struct:ks_net	typeref:typename:u8[]	file:
mcast_cleanup	net/tftp.c	/^static void mcast_cleanup(void)$/;"	f	typeref:typename:void	file:
mcast_count	drivers/net/mvneta.c	/^	u8 mcast_count[256];$/;"	m	struct:mvneta_port	typeref:typename:u8[256]	file:
mcast_filter	include/efi_api.h	/^	struct efi_mac_address mcast_filter[16];$/;"	m	struct:efi_simple_network_mode	typeref:struct:efi_mac_address[16]
mcast_filter_count	include/efi_api.h	/^	u32 mcast_filter_count;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
mcast_lst	drivers/net/ks8851_mll.c	/^	u8			mcast_lst[MAX_MCAST_LST][MAC_ADDR_LEN];$/;"	m	struct:ks_net	typeref:typename:u8[][]	file:
mcast_lst_size	drivers/net/ks8851_mll.c	/^	u16			mcast_lst_size;$/;"	m	struct:ks_net	typeref:typename:u16	file:
mcb_conf	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 mcb_conf;		\/* MCB Conf Reg *\/$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
mcbspclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mcbspclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mcc	arch/powerpc/include/asm/immap_8260.h	/^typedef struct mcc {$/;"	s
mcc	drivers/net/e1000.h	/^	uint64_t mcc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mcc	include/linux/immap_qe.h	/^	mcc_t mcc;		\/* mcc *\/$/;"	m	struct:qe_immap	typeref:typename:mcc_t
mcc	include/linux/immap_qe.h	/^typedef struct mcc {$/;"	s
mcc_mcce	arch/powerpc/include/asm/immap_8260.h	/^	ushort	mcc_mcce;$/;"	m	struct:mcc	typeref:typename:ushort
mcc_mccf	arch/powerpc/include/asm/immap_8260.h	/^	u_char	mcc_mccf;$/;"	m	struct:mcc	typeref:typename:u_char
mcc_mccm	arch/powerpc/include/asm/immap_8260.h	/^	ushort	mcc_mccm;$/;"	m	struct:mcc	typeref:typename:ushort
mcc_t	arch/powerpc/include/asm/immap_8260.h	/^} mcc_t;$/;"	t	typeref:struct:mcc
mcc_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) mcc_t;$/;"	t	typeref:struct:mcc
mcce	include/linux/immap_qe.h	/^	u32 mcce;		\/* MCC event register *\/$/;"	m	struct:mcc	typeref:typename:u32
mccf	include/linux/immap_qe.h	/^	u32 mccf;		\/* MCC configuration register *\/$/;"	m	struct:mcc	typeref:typename:u32
mccif_disp0a_hyst	arch/arm/include/asm/arch-tegra/dc.h	/^	uint mccif_disp0a_hyst;		\/* _DISP_MCCIF_DISPLAY0A_HYST_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
mccif_disp0b_hyst	arch/arm/include/asm/arch-tegra/dc.h	/^	uint mccif_disp0b_hyst;		\/* _DISP_MCCIF_DISPLAY0B_HYST_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
mccif_disp0c_hyst	arch/arm/include/asm/arch-tegra/dc.h	/^	uint mccif_disp0c_hyst;		\/* _DISP_MCCIF_DISPLAY0C_HYST_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
mccif_disp1b_hyst	arch/arm/include/asm/arch-tegra/dc.h	/^	uint mccif_disp1b_hyst;		\/* _DISP_MCCIF_DISPLAY1B_HYST_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
mccm	include/linux/immap_qe.h	/^	u32 mccm;		\/* MCC mask register *\/$/;"	m	struct:mcc	typeref:typename:u32
mcdmafec_initialize	drivers/net/fsl_mcdmafec.c	/^int mcdmafec_initialize(bd_t * bis)$/;"	f	typeref:typename:int
mcf5235_h	arch/m68k/include/asm/m5235.h	/^#define mcf5235_h$/;"	d
mcf5249_h	arch/m68k/include/asm/m5249.h	/^#define	mcf5249_h$/;"	d
mcf5272_h	arch/m68k/include/asm/m5272.h	/^#define	mcf5272_h$/;"	d
mcf5307_h	arch/m68k/include/asm/m5307.h	/^#define	mcf5307_h$/;"	d
mcf5307_serial_plat	board/sysam/amcore/amcore.c	/^static struct coldfire_serial_platdata mcf5307_serial_plat = {$/;"	v	typeref:struct:coldfire_serial_platdata	file:
mcf5329_h	arch/m68k/include/asm/m5329.h	/^#define mcf5329_h$/;"	d
mcf547x_8x_h	arch/m68k/include/asm/m547x_8x.h	/^#define mcf547x_8x_h$/;"	d
mcf_getimr	arch/m68k/include/asm/m5249.h	/^#define	mcf_getimr(/;"	d
mcf_serial_drv	drivers/serial/mcfuart.c	/^static struct serial_device mcf_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
mcf_serial_getc	drivers/serial/mcfuart.c	/^static int mcf_serial_getc(void)$/;"	f	typeref:typename:int	file:
mcf_serial_init	drivers/serial/mcfuart.c	/^static int mcf_serial_init(void)$/;"	f	typeref:typename:int	file:
mcf_serial_init_common	drivers/serial/mcfuart.c	/^static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate)$/;"	f	typeref:typename:int	file:
mcf_serial_initialize	drivers/serial/mcfuart.c	/^void mcf_serial_initialize(void)$/;"	f	typeref:typename:void
mcf_serial_putc	drivers/serial/mcfuart.c	/^static void mcf_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
mcf_serial_setbrg	drivers/serial/mcfuart.c	/^static void mcf_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
mcf_serial_setbrg_common	drivers/serial/mcfuart.c	/^static void mcf_serial_setbrg_common(uart_t *uart, int baudrate)$/;"	f	typeref:typename:void	file:
mcf_serial_tstc	drivers/serial/mcfuart.c	/^static int mcf_serial_tstc(void)$/;"	f	typeref:typename:int	file:
mcf_setimr	arch/m68k/include/asm/m5249.h	/^#define	mcf_setimr(/;"	d
mcffec_initialize	drivers/net/mcffec.c	/^int mcffec_initialize(bd_t * bis)$/;"	f	typeref:typename:int
mcffec_miiphy_read	drivers/net/mcfmii.c	/^int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int
mcffec_miiphy_write	drivers/net/mcfmii.c	/^int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int
mcfg	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 mcfg;		\/* 0x80 || 0xB0 *\/$/;"	m	struct:sdrc_cs	typeref:typename:u32
mcfg	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 mcfg;$/;"	m	struct:board_sdrc_timings	typeref:typename:u32
mcfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mcfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mcfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mcfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mcfg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mcfg;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mcfg	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mcfg;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mcfg	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		mcfg[AT91_MATRIX_MASTERS];$/;"	m	struct:at91_matrix	typeref:typename:u32[]
mcfg	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^	u32	mcfg[16];	\/* Master Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
mcfg	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^	u32	mcfg;	\/* Master Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mcfg	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^	u32	mcfg[16];	\/* Master Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
mcfg	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	mcfg[16];$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
mcfg	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^	u32	mcfg[16];	\/* Master Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
mcfg	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	mcfg[16];$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
mcfg	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 mcfg[16];	\/* 0x00 ~ 0x3c: Master Configuration Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16]
mcfg	drivers/net/lpc32xx_eth.c	/^	u32 mcfg;		\/* MII management configuration reg. *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mcfg	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic mcfg; \/* 0x280 *\/$/;"	m	struct:pic32_mii_regs	typeref:struct:pic32_reg_atomic
mcfg1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mcfg1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mcfg1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mcfg1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mcfg1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mcfg1;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mcfg1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mcfg1;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mcfgr	include/fsl_sec.h	/^	u32	mcfgr;		\/* Master CFG Register *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
mcfr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	mcfr;		\/* 0x24 Main Clock Frequency Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcgcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 mcgcr;		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mchash	drivers/usb/eth/mcs7830.c	/^	uint8_t mchash[8];$/;"	m	struct:mcs7830_private	typeref:typename:uint8_t[8]	file:
mchbar	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t mchbar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
mchunkptr	common/dlmalloc.c	/^typedef struct malloc_chunk* mchunkptr;$/;"	t	typeref:struct:malloc_chunk *	file:
mci	drivers/mmc/gen_atmel_mci.c	/^	struct atmel_mci	*mci;$/;"	m	struct:atmel_mci_priv	typeref:struct:atmel_mci *	file:
mci0_clk	arch/arm/dts/at91sam9260.dtsi	/^					mci0_clk: mci0_clk {$/;"	l
mci0_clk	arch/arm/dts/at91sam9261.dtsi	/^					mci0_clk: mci0_clk {$/;"	l
mci0_clk	arch/arm/dts/at91sam9263.dtsi	/^					mci0_clk: mci0_clk {$/;"	l
mci0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					mci0_clk: mci0_clk {$/;"	l
mci1_clk	arch/arm/dts/at91sam9263.dtsi	/^					mci1_clk: mci1_clk {$/;"	l
mci1_clk	arch/arm/dts/at91sam9g45.dtsi	/^					mci1_clk: mci1_clk {$/;"	l
mci_cfg_id	board/micronas/vct/scc.h	/^		u32 mci_cfg_id:1;	\/* MCI_CFG register selector	*\/$/;"	m	struct:scc_dma_cfg::__anon903167320208	typeref:typename:u32:1
mci_data_read	drivers/mmc/gen_atmel_mci.c	/^static u32 mci_data_read(atmel_mci_t *mci, u32* data, u32 error_flags)$/;"	f	typeref:typename:u32	file:
mci_data_write	drivers/mmc/gen_atmel_mci.c	/^static u32 mci_data_write(atmel_mci_t *mci, u32* data, u32 error_flags)$/;"	f	typeref:typename:u32	file:
mci_encode_cmd	drivers/mmc/gen_atmel_mci.c	/^static u32 mci_encode_cmd($/;"	f	typeref:typename:u32	file:
mci_init	drivers/mmc/gen_atmel_mci.c	/^static int mci_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mci_send_cmd	drivers/mmc/gen_atmel_mci.c	/^mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
mci_set_ios	drivers/mmc/gen_atmel_mci.c	/^static void mci_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
mci_set_mode	drivers/mmc/gen_atmel_mci.c	/^static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)$/;"	f	typeref:typename:void	file:
mck	arch/arm/dts/at91sam9260.dtsi	/^				mck: masterck {$/;"	l	label:pmc
mck	arch/arm/dts/at91sam9261.dtsi	/^				mck: masterck {$/;"	l	label:pmc
mck	arch/arm/dts/at91sam9263.dtsi	/^				mck: masterck {$/;"	l	label:pmc
mck	arch/arm/dts/at91sam9g20.dtsi	/^				mck: masterck {$/;"	l	label:pmc
mck	arch/arm/dts/at91sam9g45.dtsi	/^				mck: masterck {$/;"	l	label:pmc
mck	arch/arm/dts/sama5d2.dtsi	/^				mck: masterck {$/;"	l	label:pmc
mck_rate_hz	arch/arm/include/asm/global_data.h	/^	unsigned long	mck_rate_hz;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
mck_return	arch/powerpc/cpu/ppc4xx/start.S	/^mck_return:$/;"	l
mckout0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	mckout0;	\/* 0x520 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
mckout1	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	mckout1;	\/* 0x524 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
mckr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	mckr;		\/* 0x30 Master Clock Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
mclink_fpgacount	board/gdsys/405ep/iocon.c	/^unsigned int mclink_fpgacount;$/;"	v	typeref:typename:unsigned int
mclink_fpgacount	board/gdsys/mpc8308/hrcon.c	/^unsigned int mclink_fpgacount;$/;"	v	typeref:typename:unsigned int
mclink_fpgacount	board/gdsys/mpc8308/strider.c	/^unsigned int mclink_fpgacount;$/;"	v	typeref:typename:unsigned int
mclink_probe	board/gdsys/common/mclink.c	/^int mclink_probe(void)$/;"	f	typeref:typename:int
mclink_receive	board/gdsys/common/mclink.c	/^int mclink_receive(u8 slave, u16 addr, u16 *data)$/;"	f	typeref:typename:int
mclink_send	board/gdsys/common/mclink.c	/^int mclink_send(u8 slave, u16 addr, u16 data)$/;"	f	typeref:typename:int
mclk	drivers/mmc/uniphier-sd.c	/^	unsigned long mclk;$/;"	m	struct:uniphier_sd_priv	typeref:typename:unsigned long	file:
mclk	drivers/sound/wm8994.c	/^	int mclk[WM8994_MAX_AIF];	\/* master clock frequency in Hz *\/$/;"	m	struct:wm8994_priv	typeref:typename:int[]	file:
mclk_to_picos	drivers/ddr/fsl/util.c	/^unsigned int mclk_to_picos(const unsigned int ctrl_num, unsigned int mclk)$/;"	f	typeref:typename:unsigned int
mclkreg	drivers/mmc/sunxi_mmc.c	/^	uint32_t *mclkreg;$/;"	m	struct:sunxi_mmc_host	typeref:typename:uint32_t *	file:
mcmd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mcmd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mcmd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mcmd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mcmd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mcmd;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mcmd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mcmd;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mcmd	drivers/net/lpc32xx_eth.c	/^	u32 mcmd;		\/* MII management command register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mcmd	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic mcmd; \/* 0x290 *\/$/;"	m	struct:pic32_mii_regs	typeref:struct:pic32_reg_atomic
mcmr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     mcmr;           \/* LBC UPMC Mode *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
mconf-objs	scripts/kconfig/Makefile	/^mconf-objs     := mconf.o zconf.tab.o $(lxdialog)$/;"	m
mconf_readme	scripts/kconfig/mconf.c	/^static const char mconf_readme[] = N_($/;"	v	typeref:typename:const char[]	file:
mcp79410_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	mcp79410_pins_default: mcp79410_pins_default {$/;"	l
mcp_rtc	arch/arm/dts/am57xx-beagle-x15.dts	/^	mcp_rtc: rtc@6f {$/;"	l
mcpsumr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mcpsumr;	\/* Machine check summary *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
mcpsumr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mcpsumr;	\/* 0xe0090 - Machine check summary register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
mcpu_vote_msk0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_vote_msk0;	\/*0x8E0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcpu_vote_msk1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_vote_msk1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcpu_votedis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_votedis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcpu_voteen	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_voteen;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcpu_votestat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_votestat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcpu_votestat0_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_votestat0_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcpu_votestat1_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcpu_votestat1_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 mcr;		\/* Match Control Register	*\/$/;"	m	struct:timer_regs	typeref:typename:u32
mcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mcr;	\/* Miscellaneous Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
mcr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^	uint32_t	mcr;$/;"	m	struct:pxa_uart_regs	typeref:typename:uint32_t
mcr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int mcr; \/* Modem control register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
mcr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 mcr;$/;"	m	struct:pit_reg	typeref:typename:u32
mcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 mcr;		\/* 0x230 mode configure register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
mcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 mcr[16][2];		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[16][2]
mcr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 mcr;$/;"	m	struct:pit_reg	typeref:typename:u32
mcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 mcr;		\/* 0x230 mode configure register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
mcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 mcr[16][2];		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[16][2]
mcr	arch/blackfin/include/asm/serial1.h	/^	u16 mcr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
mcr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 mcr;	\/* 0x00 *\/$/;"	m	struct:dspi	typeref:typename:u32
mcr	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 mcr;		\/* 0x00 Module Configuration *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
mcr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 mcr;		\/* I2Cn + 0x08 *\/$/;"	m	struct:i2c512x_dev	typeref:typename:volatile u32
mcr	drivers/serial/serial_bcm283x_mu.c	/^	u32 mcr;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
mcr	drivers/spi/fsl_qspi.h	/^	u32 mcr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
mcr	include/fsl_dspi.h	/^	u32 mcr;	\/* 0x00 *\/$/;"	m	struct:dspi	typeref:typename:u32
mcr	include/mpc5xxx.h	/^	volatile u32 mcr;		\/* I2Cn + 0x08 *\/$/;"	m	struct:mpc5xxx_i2c	typeref:typename:volatile u32
mcr0_0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_1;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_1;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_1;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_1;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_1;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_1;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_10;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_10;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_10;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_10	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_10;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_10	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_10;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_10	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_10;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_11;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_11;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_11;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_11	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_11;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_11	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_11;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_11	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_11;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_12;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_12;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_12;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_12	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_12;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_12	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_12;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_12	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_12;		\/* 0x70 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_13;		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_13;		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_13;		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_13	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_13;		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_13	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_13;		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_13	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_13;		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_14;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_14;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_14;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_14	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_14;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_14	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_14;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_14	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_14;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_15	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_15;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_15	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_15;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_15	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_15;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_15	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_15;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_15	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_15;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_15	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_15;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_4;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_4;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_4;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_4;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_4	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_4;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_4	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_4;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_5;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_5;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_5;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_5	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_5;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_5	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_5;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_5	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_5;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_6;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_6;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_6;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_6	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_6;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_6	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_6;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_6	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_6;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_7;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_7;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_7;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_7	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_7;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_7	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_7;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_7	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_7;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_8;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_8;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_8;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_8	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_8;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_8	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_8;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_8	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_8;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr0_9;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr0_9;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr0_9;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_9	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr0_9;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_9	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr0_9;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr0_9	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr0_9;		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_0;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_0;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_0;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_0;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_0;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_0;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_10;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_10;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_10;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_10	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_10;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_10	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_10;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_10	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_10;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_11;		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_11;		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_11;		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_11	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_11;		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_11	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_11;		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_11	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_11;		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_12;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_12;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_12;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_12	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_12;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_12	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_12;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_12	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_12;		\/* 0x74 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_13;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_13;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_13;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_13	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_13;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_13	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_13;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_13	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_13;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_14;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_14;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_14;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_14	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_14;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_14	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_14;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_14	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_14;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_15	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_15;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_15	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_15;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_15	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_15;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_15	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_15;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_15	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_15;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_15	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_15;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_3;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_3;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_3;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_3;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_3;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_3;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_4;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_4;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_4;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_4;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_4	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_4;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_4	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_4;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_5;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_5;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_5;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_5	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_5;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_5	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_5;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_5	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_5;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_6;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_6;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_6;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_6	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_6;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_6	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_6;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_6	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_6;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_7;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_7;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_7;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_7	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_7;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_7	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_7;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_7	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_7;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_8;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_8;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_8;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_8	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_8;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_8	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_8;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_8	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_8;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mcr1_9;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mcr1_9;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mcr1_9;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_9	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mcr1_9;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_9	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mcr1_9;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr1_9	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mcr1_9;		\/* 0x5c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mcr_auxr	arch/arm/mach-exynos/include/mach/system.h	/^#define mcr_auxr(/;"	d
mcr_icache	arch/arm/mach-exynos/include/mach/system.h	/^#define mcr_icache(/;"	d
mcr_l2_aux_ctlr	arch/arm/mach-exynos/include/mach/system.h	/^#define mcr_l2_aux_ctlr(/;"	d
mcr_l2_ctlr	arch/arm/mach-exynos/include/mach/system.h	/^#define mcr_l2_ctlr(/;"	d
mcr_sctlr	arch/arm/mach-exynos/include/mach/system.h	/^#define mcr_sctlr(/;"	d
mcr_tlb	arch/arm/mach-exynos/include/mach/system.h	/^#define mcr_tlb(/;"	d
mcr_val	drivers/spi/fsl_dspi.c	/^	uint mcr_val;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
mcs7830_apply_fixup	drivers/usb/eth/mcs7830.c	/^static int mcs7830_apply_fixup(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
mcs7830_basic_reset	drivers/usb/eth/mcs7830.c	/^static int mcs7830_basic_reset(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
mcs7830_dongle	drivers/usb/eth/mcs7830.c	/^struct mcs7830_dongle {$/;"	s	file:
mcs7830_dongles	drivers/usb/eth/mcs7830.c	/^static const struct mcs7830_dongle mcs7830_dongles[] = {$/;"	v	typeref:typename:const struct mcs7830_dongle[]	file:
mcs7830_eth_before_probe	drivers/usb/eth/mcs7830.c	/^void mcs7830_eth_before_probe(void)$/;"	f	typeref:typename:void
mcs7830_eth_get_info	drivers/usb/eth/mcs7830.c	/^int mcs7830_eth_get_info(struct usb_device *dev, struct ueth_data *ss,$/;"	f	typeref:typename:int
mcs7830_eth_id_table	drivers/usb/eth/mcs7830.c	/^static const struct usb_device_id mcs7830_eth_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
mcs7830_eth_ops	drivers/usb/eth/mcs7830.c	/^static const struct eth_ops mcs7830_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
mcs7830_eth_probe	drivers/usb/eth/mcs7830.c	/^int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum,$/;"	f	typeref:typename:int
mcs7830_eth_probe	drivers/usb/eth/mcs7830.c	/^static int mcs7830_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mcs7830_eth_recv	drivers/usb/eth/mcs7830.c	/^int mcs7830_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
mcs7830_eth_send	drivers/usb/eth/mcs7830.c	/^int mcs7830_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
mcs7830_eth_start	drivers/usb/eth/mcs7830.c	/^static int mcs7830_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mcs7830_eth_stop	drivers/usb/eth/mcs7830.c	/^void mcs7830_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void
mcs7830_free_pkt	drivers/usb/eth/mcs7830.c	/^static int mcs7830_free_pkt(struct udevice *dev, uchar *packet, int packet_len)$/;"	f	typeref:typename:int	file:
mcs7830_get_rev	drivers/usb/eth/mcs7830.c	/^static int mcs7830_get_rev(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
mcs7830_halt	drivers/usb/eth/mcs7830.c	/^static void mcs7830_halt(struct eth_device *eth)$/;"	f	typeref:typename:void	file:
mcs7830_iface_idx	drivers/usb/eth/mcs7830.c	/^static int mcs7830_iface_idx;$/;"	v	typeref:typename:int	file:
mcs7830_init	drivers/usb/eth/mcs7830.c	/^static int mcs7830_init(struct eth_device *eth, bd_t *bd)$/;"	f	typeref:typename:int	file:
mcs7830_init_common	drivers/usb/eth/mcs7830.c	/^static int mcs7830_init_common(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
mcs7830_phy_emit_wait	drivers/usb/eth/mcs7830.c	/^static int mcs7830_phy_emit_wait(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
mcs7830_private	drivers/usb/eth/mcs7830.c	/^struct mcs7830_private {$/;"	s	file:
mcs7830_read_mac	drivers/usb/eth/mcs7830.c	/^static int mcs7830_read_mac(struct usb_device *udev, unsigned char enetaddr[])$/;"	f	typeref:typename:int	file:
mcs7830_read_phy	drivers/usb/eth/mcs7830.c	/^static int mcs7830_read_phy(struct usb_device *udev, uint8_t index)$/;"	f	typeref:typename:int	file:
mcs7830_read_reg	drivers/usb/eth/mcs7830.c	/^static int mcs7830_read_reg(struct usb_device *udev, uint8_t idx,$/;"	f	typeref:typename:int	file:
mcs7830_recv	drivers/usb/eth/mcs7830.c	/^static int mcs7830_recv(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
mcs7830_recv_common	drivers/usb/eth/mcs7830.c	/^static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf)$/;"	f	typeref:typename:int	file:
mcs7830_regs	drivers/usb/eth/mcs7830.c	/^struct mcs7830_regs {$/;"	s	file:
mcs7830_send	drivers/usb/eth/mcs7830.c	/^static int mcs7830_send(struct eth_device *eth, void *packet, int length)$/;"	f	typeref:typename:int	file:
mcs7830_send_common	drivers/usb/eth/mcs7830.c	/^static int mcs7830_send_common(struct ueth_data *ueth, void *packet,$/;"	f	typeref:typename:int	file:
mcs7830_set_autoneg	drivers/usb/eth/mcs7830.c	/^static int mcs7830_set_autoneg(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
mcs7830_write_config	drivers/usb/eth/mcs7830.c	/^static int mcs7830_write_config(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
mcs7830_write_hwaddr	drivers/usb/eth/mcs7830.c	/^int mcs7830_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
mcs7830_write_mac	drivers/usb/eth/mcs7830.c	/^static int mcs7830_write_mac(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
mcs7830_write_mac_common	drivers/usb/eth/mcs7830.c	/^static int mcs7830_write_mac_common(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
mcs7830_write_mchash	drivers/usb/eth/mcs7830.c	/^static int mcs7830_write_mchash(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
mcs7830_write_phy	drivers/usb/eth/mcs7830.c	/^static int mcs7830_write_phy(struct usb_device *udev, uint8_t index,$/;"	f	typeref:typename:int	file:
mcs7830_write_reg	drivers/usb/eth/mcs7830.c	/^static int mcs7830_write_reg(struct usb_device *udev, uint8_t idx,$/;"	f	typeref:typename:int	file:
mcspi	drivers/spi/omap3_spi.c	/^struct mcspi {$/;"	s	file:
mcspi1	arch/arm/dts/dra7.dtsi	/^		mcspi1: spi@48098000 {$/;"	l
mcspi1_pins	arch/arm/dts/dra7-evm.dts	/^	mcspi1_pins: pinmux_mcspi1_pins {$/;"	l
mcspi2	arch/arm/dts/dra7.dtsi	/^		mcspi2: spi@4809a000 {$/;"	l
mcspi2_pins	arch/arm/dts/dra7-evm.dts	/^	mcspi2_pins: pinmux_mcspi2_pins {$/;"	l
mcspi3	arch/arm/dts/dra7.dtsi	/^		mcspi3: spi@480b8000 {$/;"	l
mcspi4	arch/arm/dts/dra7.dtsi	/^		mcspi4: spi@480ba000 {$/;"	l
mcspi_channel	drivers/spi/omap3_spi.c	/^struct mcspi_channel {$/;"	s	file:
mcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mcsr;	\/* Mailbox CSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
mct_map	arch/arm/dts/exynos4210.dtsi	/^		mct_map: mct-map {$/;"	l
mct_map	arch/arm/dts/exynos4x12.dtsi	/^		mct_map: mct-map {$/;"	l
mctime	include/jffs2/jffs2.h	/^	__u32 mctime;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
mctl_apply_odt_correction	arch/arm/mach-sunxi/dram_sun8i_a23.c	/^static void mctl_apply_odt_correction(u32 *reg, int correction)$/;"	f	typeref:typename:void	file:
mctl_auto_detect_dram_size	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_auto_detect_dram_size(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_await_completion	arch/arm/mach-sunxi/dram_helpers.c	/^void mctl_await_completion(u32 *reg, u32 mask, u32 val)$/;"	f	typeref:typename:void
mctl_channel_init	arch/arm/mach-sunxi/dram_sun6i.c	/^static void mctl_channel_init(int ch_index, struct dram_sun6i_para *para)$/;"	f	typeref:typename:void	file:
mctl_channel_init	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static int mctl_channel_init(struct dram_para *para)$/;"	f	typeref:typename:int	file:
mctl_channel_init	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static int mctl_channel_init(struct dram_para *para)$/;"	f	typeref:typename:int	file:
mctl_channel_init	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static int mctl_channel_init(struct dram_para *para)$/;"	f	typeref:typename:int	file:
mctl_channel_init	arch/arm/mach-sunxi/dram_sun9i.c	/^static u32 mctl_channel_init(u32 ch_index, struct dram_sun9i_para *para)$/;"	f	typeref:typename:u32	file:
mctl_com_init	arch/arm/mach-sunxi/dram_sun6i.c	/^static void mctl_com_init(struct dram_sun6i_para *para)$/;"	f	typeref:typename:void	file:
mctl_com_init	arch/arm/mach-sunxi/dram_sun9i.c	/^static void mctl_com_init(struct dram_sun9i_para *para)$/;"	f	typeref:typename:void	file:
mctl_configure_hostport	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_configure_hostport(void)$/;"	f	typeref:typename:void	file:
mctl_ctl_sched_init	arch/arm/mach-sunxi/dram_sun9i.c	/^static void mctl_ctl_sched_init(unsigned long  base)$/;"	f	typeref:typename:void	file:
mctl_data_train_cfg	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static void mctl_data_train_cfg(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_data_train_cfg	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void mctl_data_train_cfg(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_ddr3_initialize	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_ddr3_initialize(void)$/;"	f	typeref:typename:void	file:
mctl_ddr3_reset	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_ddr3_reset(void)$/;"	f	typeref:typename:void	file:
mctl_disable_power_save	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_disable_power_save(void)$/;"	f	typeref:typename:void	file:
mctl_dll_init	arch/arm/mach-sunxi/dram_sun6i.c	/^static void mctl_dll_init(int ch_index, struct dram_sun6i_para *para)$/;"	f	typeref:typename:void	file:
mctl_dq_delay	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_dq_delay(u32 read, u32 write)$/;"	f	typeref:typename:void	file:
mctl_enable_dll0	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_enable_dll0(u32 phase)$/;"	f	typeref:typename:void	file:
mctl_enable_dllx	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_enable_dllx(u32 phase)$/;"	f	typeref:typename:void	file:
mctl_get_number_of_lanes	arch/arm/mach-sunxi/dram_sun4i.c	/^static u32 mctl_get_number_of_lanes(void)$/;"	f	typeref:typename:u32	file:
mctl_init	arch/arm/mach-sunxi/dram_sun8i_a23.c	/^static void mctl_init(u32 *bus_width)$/;"	f	typeref:typename:void	file:
mctl_itm_disable	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_itm_disable(void)$/;"	f	typeref:typename:void	file:
mctl_itm_enable	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_itm_enable(void)$/;"	f	typeref:typename:void	file:
mctl_itm_reset	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_itm_reset(void)$/;"	f	typeref:typename:void	file:
mctl_mem_matches	arch/arm/mach-sunxi/dram_helpers.c	/^bool mctl_mem_matches(u32 offset)$/;"	f	typeref:typename:bool
mctl_phy_init	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_phy_init(u32 val)$/;"	f	typeref:typename:void	file:
mctl_port_cfg	arch/arm/mach-sunxi/dram_sun6i.c	/^static void mctl_port_cfg(void)$/;"	f	typeref:typename:void	file:
mctl_rank_detect	arch/arm/mach-sunxi/dram_sun6i.c	/^static bool mctl_rank_detect(u32 *gsr0, int rank)$/;"	f	typeref:typename:bool	file:
mctl_set_cke_delay	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_set_cke_delay(void)$/;"	f	typeref:typename:void	file:
mctl_set_cr	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static void mctl_set_cr(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_set_cr	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void mctl_set_cr(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_set_cr	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_set_cr(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_set_dqs_gating_delay	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_set_dqs_gating_delay(int rank, u32 dqs_gating_delay)$/;"	f	typeref:typename:void	file:
mctl_set_drive	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_set_drive(void)$/;"	f	typeref:typename:void	file:
mctl_set_impedance	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_set_impedance(u32 zq, bool odt_en)$/;"	f	typeref:typename:void	file:
mctl_set_master_priority	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_set_master_priority(void)$/;"	f	typeref:typename:void	file:
mctl_set_pir	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static void mctl_set_pir(u32 val)$/;"	f	typeref:typename:void	file:
mctl_set_pir	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void mctl_set_pir(u32 val)$/;"	f	typeref:typename:void	file:
mctl_set_timing_params	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_set_timing_params(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_setup_dram_clock	arch/arm/mach-sunxi/dram_sun4i.c	/^static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk)$/;"	f	typeref:typename:void	file:
mctl_sys_init	arch/arm/mach-sunxi/dram_sun6i.c	/^static void mctl_sys_init(void)$/;"	f	typeref:typename:void	file:
mctl_sys_init	arch/arm/mach-sunxi/dram_sun8i_a23.c	/^static void mctl_sys_init(void)$/;"	f	typeref:typename:void	file:
mctl_sys_init	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static void mctl_sys_init(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_sys_init	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void mctl_sys_init(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_sys_init	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_sys_init(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctl_sys_init	arch/arm/mach-sunxi/dram_sun9i.c	/^static void mctl_sys_init(void)$/;"	f	typeref:typename:void	file:
mctl_train_dram	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static int mctl_train_dram(struct dram_para *para)$/;"	f	typeref:typename:int	file:
mctl_train_dram	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static int mctl_train_dram(struct dram_para *para)$/;"	f	typeref:typename:int	file:
mctl_zq_calibration	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static void mctl_zq_calibration(struct dram_para *para)$/;"	f	typeref:typename:void	file:
mctrl	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 mctrl;		\/* Match Control Register		*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
mctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 mctrl; \/* 0x80 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
mctrl_handler_t	arch/sparc/cpu/leon3/memcfg.h	/^typedef void (*mctrl_handler_t)($/;"	t	typeref:typename:void (*)(struct grlib_mctrl_handler * dev,void * conf,unsigned int ioarea)
mctrl_setup	arch/sparc/cpu/leon3/memcfg.h	/^struct mctrl_setup {$/;"	s
mcu_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 mcu_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
mcu_imctrl	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_imctrl;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_imstat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_imstat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl0;	\/*0x400*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl2;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl3	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl3;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl4;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl5;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl6;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_ctrl7	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_ctrl7;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat0;	\/*0x440*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat2;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat3	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat3;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat4;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat5;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat6;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_subsys_stat7	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_subsys_stat7;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote2_msk0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote2_msk0;	\/*0x990*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote2_msk1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote2_msk1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote2stat0_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote2stat0_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote2stat1_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote2stat1_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_msk0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_msk0;	\/*0x940*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_msk1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_msk1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1_msk0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1_msk0;\/*0x970*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1_msk1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1_msk1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1en;	\/*0x960*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1stat0_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1stat0_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote1stat1_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote1stat1_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote2dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote2dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote2en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote2en;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_vote2stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_vote2stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_votestat0_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_votestat0_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_vote_votestat1_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_vote_votestat1_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_votedis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_votedis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_voteen	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_voteen;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_votestat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_votestat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_en0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_en0;	\/*0xa8*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_en1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_en1;	\/*0xb4*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_en4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_en4;	\/*0x94*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_en5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_en5;	\/*0x64*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_en6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_en6;	\/*0x54*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statm0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statm0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statm1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statm1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statm4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statm4;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statm5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statm5;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statm6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statm6;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statr0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statr0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statr1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statr1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statr4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statr4;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statr5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statr5;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcu_wkup_int_statr6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 mcu_wkup_int_statr6;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
mcuiop_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mcuiop_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mcuiop_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mcuiop_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mcuiop_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mcuiop_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mcuiop_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mcuiop_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mcuiop_pwr_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mcuiop_pwr_ctrl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mcuisp_pwr_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mcuisp_pwr_ctrl;		\/* 0x1001c910 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mcuisp_pwr_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mcuisp_pwr_ctrl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
md	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 md;			\/* 0x20: Memory Device Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
md	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 md;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
md5	drivers/usb/gadget/f_thor.h	/^	char md5[32];		\/* md5 checksum *\/$/;"	m	struct:rqt_box	typeref:typename:char[32]
md5	lib/md5.c	/^md5 (unsigned char *input, int len, unsigned char output[16])$/;"	f	typeref:typename:void
md5_wd	lib/md5.c	/^md5_wd (unsigned char *input, int len, unsigned char output[16],$/;"	f	typeref:typename:void
md5sum_data	test/py/u_boot_utils.py	/^def md5sum_data(data):$/;"	f
md5sum_file	test/py/u_boot_utils.py	/^def md5sum_file(fn, max_length=None):$/;"	f
md_ctx	tools/mxsimage.c	/^	EVP_MD_CTX			md_ctx;$/;"	m	struct:sb_image_ctx	typeref:typename:EVP_MD_CTX	file:
mda	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mda[32];	\/* Master Domain Assignment *\/$/;"	m	struct:rdc_regs	typeref:typename:u32[32]
mda	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	mda[27];		\/* Master Domain Assignment *\/$/;"	m	struct:rdc_regs	typeref:typename:u32[27]
mda0	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mda0;		\/* 0x30 Message Digest AO *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mda1	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mda1;		\/* 0x70 Message Digest A1 *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdasm11scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm11scrd, mdasm11scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm12scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm12scrd, mdasm12scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm13scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm13scrd, mdasm13scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm14scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm14scrd, mdasm14scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm15scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm15scrd, mdasm15scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm27scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm27scrd, mdasm27scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm28scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm28scrd, mdasm28scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm29scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm29scrd, mdasm29scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm30scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm30scrd, mdasm30scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasm31scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm31scrd, mdasm31scr;$/;"	m	struct:mios	typeref:typename:ushort
mdasp	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdasp;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdasp	include/fsl_mmdc.h	/^	u32 mdasp;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdasp	include/fsl_mmdc.h	/^	u32 mdasp;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdata	drivers/usb/musb-new/pic32.c	/^	struct musb_host_data mdata;$/;"	m	struct:pic32_musb_data	typeref:struct:musb_host_data	file:
mdate	include/ddr_spd.h	/^	uint8_t mdate[2];		\/* 323~324 Mfg Date *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[2]
mdate	include/ddr_spd.h	/^	unsigned char mdate[2];        \/* 120-121 Mfg Date *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[2]
mdate	include/ddr_spd.h	/^	unsigned char mdate[2];    \/* 93 Manufacturing Date *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[2]
mdate	include/ddr_spd.h	/^	unsigned char mdate[2];    \/* 93 Manufacturing Date *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char[2]
mdate	include/spd.h	/^	unsigned char mdate[2];    \/* 93 Manufacturing Date *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[2]
mdb0	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdb0;		\/* 0x34 Message Digest BO *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdb1	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdb1;		\/* 0x74 Message Digest B1 *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdbtrick	arch/arc/Makefile	/^mdbtrick: u-boot$/;"	t
mdbuf	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 mdbuf;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
mdc	board/gdsys/common/miiphybb.c	/^	int mdc;$/;"	m	struct:io_bb_pinset	typeref:typename:int	file:
mdc0	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdc0;		\/* 0x38 Message Digest CO *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdc1	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdc1;		\/* 0x78 Message Digest C1 *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdcfg0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdcfg0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdcfg0	include/fsl_mmdc.h	/^	u32 mdcfg0;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdcfg0	include/fsl_mmdc.h	/^	u32 mdcfg0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdcfg1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdcfg1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdcfg1	include/fsl_mmdc.h	/^	u32 mdcfg1;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdcfg1	include/fsl_mmdc.h	/^	u32 mdcfg1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdcfg2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdcfg2;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdcfg2	include/fsl_mmdc.h	/^	u32 mdcfg2;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdcfg2	include/fsl_mmdc.h	/^	u32 mdcfg2;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdcfg3lp	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdcfg3lp;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdcfg3lp	include/fsl_mmdc.h	/^	u32 mdcfg3lp;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdcntl	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 mdcntl;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
mdctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdctl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdctl	arch/arm/mach-davinci/include/mach/hardware.h	/^			dv_reg	mdctl[PSC_PSC0_MODULE_ID_CNT];$/;"	m	struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330208	typeref:typename:dv_reg[]
mdctl	arch/arm/mach-davinci/include/mach/hardware.h	/^			dv_reg	mdctl[PSC_PSC1_MODULE_ID_CNT];$/;"	m	struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330308	typeref:typename:dv_reg[]
mdctl	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	mdctl[52];	\/* 0xA00 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int[52]
mdctl	include/fsl_mmdc.h	/^	u32 mdctl;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdctl	include/fsl_mmdc.h	/^	u32 mdctl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdd0	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdd0;		\/* 0x3C Message Digest DO *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdd1	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdd1;		\/* 0x7C Message Digest D1 *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mddr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	mddr;		\/* 0x54 Multi-driver Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
mddrc	arch/powerpc/include/asm/immap_512x.h	/^	ddr512x_t		mddrc;		\/* Multi-port DDR Memory Controller *\/$/;"	m	struct:immap	typeref:typename:ddr512x_t
mddrc_config	board/pdm360ng/pdm360ng.c	/^sdram_conf_t mddrc_config[] = {$/;"	v	typeref:typename:sdram_conf_t[]
mde0	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mde0;		\/* 0x40 Message Digest EO *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mde1	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mde1;		\/* 0x80 Message Digest E1 *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdelay	board/zipitz2/zipitz2.c	/^	unsigned char	mdelay;$/;"	m	struct:__anonddc6b5340108	typeref:typename:unsigned char	file:
mdelay	lib/time.c	/^void mdelay(unsigned long msec)$/;"	f	typeref:typename:void
mder	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	mder;		\/* 0x50 Multi-driver Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
mdfs_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mdfs_clk_cfg;	\/* 0xf0 MDFS clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mdfs_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mdfs_clk_cfg;	\/* 0xf0 MDFS clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfscr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfscr;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsgcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfsgcr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsgcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfsgcr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsgcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfsgcr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsgcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfsgcr;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsivr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfsivr;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsivr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfsivr;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsivr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfsivr;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsivr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfsivr;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmer	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfsmer;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmrmr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfsmrmr;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmrmr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfsmrmr;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmrmr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfsmrmr;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfsmrmr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfsmrmr;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfstcr;		\/* 0x14c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfstcr;		\/* 0x14c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfstcr;		\/* 0x14c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfstcr;		\/* 0x14c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mdfstr[4];		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[4]
mdfstr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mdfstr[4];		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[4]
mdfstr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfstr0;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfstr0;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfstr1;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfstr1;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfstr2;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfstr2;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mdfstr3;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdfstr3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mdfstr3;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mdha_ctrl	arch/m68k/include/asm/coldfire/mdha.h	/^typedef struct mdha_ctrl {$/;"	s
mdha_t	arch/m68k/include/asm/coldfire/mdha.h	/^} mdha_t;$/;"	t	typeref:struct:mdha_ctrl
mdio	arch/arm/dts/armada-370-xp.dtsi	/^			mdio: mdio {$/;"	l
mdio	arch/arm/dts/armada-38x.dtsi	/^			mdio: mdio@72004 {$/;"	l
mdio	arch/arm/dts/k2e.dtsi	/^		mdio: mdio@24200f00 {$/;"	l
mdio	arch/arm/dts/k2g.dtsi	/^		mdio: mdio@4200f00 {$/;"	l
mdio	arch/arm/dts/k2hk.dtsi	/^		mdio: mdio@02090300 {$/;"	l
mdio	arch/arm/dts/k2l.dtsi	/^		mdio: mdio@26200f00 {$/;"	l
mdio	arch/arm/dts/sun4i-a10.dtsi	/^		mdio: mdio@01c0b080 {$/;"	l
mdio	arch/arm/dts/sun5i-a10s.dtsi	/^		mdio: mdio@01c0b080 {$/;"	l
mdio	arch/arm/dts/sun7i-a20.dtsi	/^		mdio: mdio@01c0b080 {$/;"	l
mdio	board/gdsys/405ep/iocon.c	/^	int mdio;$/;"	m	struct:fpga_mii	typeref:typename:int	file:
mdio	board/gdsys/common/miiphybb.c	/^	int mdio;$/;"	m	struct:io_bb_pinset	typeref:typename:int	file:
mdio	board/gdsys/mpc8308/hrcon.c	/^	int mdio;$/;"	m	struct:fpga_mii	typeref:typename:int	file:
mdio	board/gdsys/mpc8308/strider.c	/^	int mdio;$/;"	m	struct:fpga_mii	typeref:typename:int	file:
mdio	drivers/net/greth.h	/^	volatile unsigned int mdio;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
mdio	include/grlib/greth.h	/^	volatile unsigned int mdio;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
mdio0	arch/arm/dts/am335x-draco.dts	/^	mdio0: gpio {$/;"	l
mdio0	arch/arm/dts/ls1021a.dtsi	/^		mdio0: mdio@2d24000 {$/;"	l
mdio_active	include/miiphy.h	/^	int (*mdio_active)(struct bb_miiphy_bus *bus);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus)
mdio_addr	include/fsl_memac.h	/^	u32	mdio_addr;	\/* MDIO address *\/$/;"	m	struct:memac_mdio_controller	typeref:typename:u32
mdio_addr	include/fsl_tgec.h	/^	u32	mdio_addr;	\/* MDIO address *\/$/;"	m	struct:tgec_mdio_controller	typeref:typename:u32
mdio_address	drivers/net/dwc_eth_qos.c	/^	uint32_t mdio_address;				\/* 0x200 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
mdio_alloc	common/miiphyutil.c	/^struct mii_dev *mdio_alloc(void)$/;"	f	typeref:struct:mii_dev *
mdio_base	drivers/net/keystone_net.c	/^	void				*mdio_base;$/;"	m	struct:ks2_eth_priv	typeref:typename:void *	file:
mdio_base	include/cpsw.h	/^	u32	mdio_base;$/;"	m	struct:cpsw_platform_data	typeref:typename:u32
mdio_bus	drivers/net/keystone_net.c	/^	struct mii_dev			*mdio_bus;$/;"	m	struct:ks2_eth_priv	typeref:struct:mii_dev *	file:
mdio_bus	drivers/net/keystone_net.c	/^static struct mii_dev *mdio_bus;$/;"	v	typeref:struct:mii_dev *	file:
mdio_bus	drivers/net/phy/mv88e61xx.c	/^	struct mii_dev *mdio_bus;$/;"	m	struct:mv88e61xx_phy_priv	typeref:struct:mii_dev *	file:
mdio_busname	drivers/net/xilinx_ll_temac.c	/^	char			*mdio_busname;$/;"	m	struct:ll_temac_info	typeref:typename:char *	file:
mdio_busname	drivers/net/xilinx_ll_temac.h	/^	char			mdio_busname[MDIO_NAME_LEN];$/;"	m	struct:ll_temac	typeref:typename:char[]
mdio_clk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mdio_clk;$/;"	m	struct:pad_signals	typeref:typename:int
mdio_clk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mdio_clk;$/;"	m	struct:pad_signals	typeref:typename:int
mdio_ctl	include/fsl_memac.h	/^	u32	mdio_ctl;	\/* MDIO control *\/$/;"	m	struct:memac_mdio_controller	typeref:typename:u32
mdio_ctl	include/fsl_tgec.h	/^	u32	mdio_ctl;	\/* MDIO control *\/$/;"	m	struct:tgec_mdio_controller	typeref:typename:u32
mdio_data	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mdio_data;$/;"	m	struct:pad_signals	typeref:typename:int
mdio_data	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mdio_data;$/;"	m	struct:pad_signals	typeref:typename:int
mdio_data	drivers/net/dwc_eth_qos.c	/^	uint32_t mdio_data;				\/* 0x204 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
mdio_data	include/fsl_memac.h	/^	u32	mdio_data;	\/* MDIO data *\/$/;"	m	struct:memac_mdio_controller	typeref:typename:u32
mdio_data	include/fsl_tgec.h	/^	u32	mdio_data;	\/* MDIO data *\/$/;"	m	struct:tgec_mdio_controller	typeref:typename:u32
mdio_delay	drivers/net/ns8382x.c	/^#define mdio_delay(/;"	d	file:
mdio_div	include/cpsw.h	/^	int	mdio_div;$/;"	m	struct:cpsw_platform_data	typeref:typename:int
mdio_free	common/miiphyutil.c	/^void mdio_free(struct mii_dev *bus)$/;"	f	typeref:typename:void
mdio_get_current_dev	common/exports.c	/^# define mdio_get_current_dev	/;"	d	file:
mdio_get_current_dev	common/miiphyutil.c	/^struct mii_dev *mdio_get_current_dev(void)$/;"	f	typeref:struct:mii_dev *
mdio_list_devices	common/miiphyutil.c	/^void mdio_list_devices(void)$/;"	f	typeref:typename:void
mdio_mc	drivers/net/xilinx_axi_emac.c	/^	u32 mdio_mc; \/* 0x500: MII Management Config *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
mdio_mcr	drivers/net/xilinx_axi_emac.c	/^	u32 mdio_mcr; \/* 0x504: MII Management Control *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
mdio_mrd	drivers/net/xilinx_axi_emac.c	/^	u32 mdio_mrd; \/* 0x50C: MII Management Read Data *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
mdio_mux	board/freescale/corenet_ds/eth_hydra.c	/^} mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:struct:__anon5adf8b530108[]
mdio_mux	board/freescale/corenet_ds/eth_p4080.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mux	board/freescale/corenet_ds/eth_superhydra.c	/^} mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:struct:__anona3cdf2e20108[]
mdio_mux	board/freescale/ls1043aqds/eth.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mux	board/freescale/ls1046aqds/eth.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mux	board/freescale/t102xqds/eth_t102xqds.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mux	board/freescale/t1040qds/eth.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mux	board/freescale/t208xqds/eth_t208xqds.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mux	board/freescale/t4qds/eth.c	/^static int mdio_mux[NUM_FM_PORTS];$/;"	v	typeref:typename:int[]	file:
mdio_mwd	drivers/net/xilinx_axi_emac.c	/^	u32 mdio_mwd; \/* 0x508: MII Management Write Data *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
mdio_names	board/freescale/corenet_ds/eth_p4080.c	/^static char *mdio_names[16] = {$/;"	v	typeref:typename:char * [16]	file:
mdio_names	board/freescale/ls1043aqds/eth.c	/^static const char * const mdio_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
mdio_names	board/freescale/ls1046aqds/eth.c	/^static const char * const mdio_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
mdio_names	board/freescale/ls2080aqds/eth.c	/^static const char * const mdio_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
mdio_names	board/freescale/t102xqds/eth_t102xqds.c	/^static const char * const mdio_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
mdio_names	board/freescale/t1040qds/eth.c	/^static const char * const mdio_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
mdio_names	board/freescale/t208xqds/eth_t208xqds.c	/^static const char * const mdio_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
mdio_names	board/freescale/t4qds/eth.c	/^static const char *mdio_names[] = {$/;"	v	typeref:typename:const char * []	file:
mdio_phy0	drivers/net/altera_tse.h	/^	u32 mdio_phy0[0x20];$/;"	m	struct:alt_tse_mac	typeref:typename:u32[0x20]
mdio_phy0_addr	drivers/net/altera_tse.h	/^	u32 mdio_phy0_addr;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
mdio_phy1	drivers/net/altera_tse.h	/^	u32 mdio_phy1[0x20];$/;"	m	struct:alt_tse_mac	typeref:typename:u32[0x20]
mdio_phy1_addr	drivers/net/altera_tse.h	/^	u32 mdio_phy1_addr;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
mdio_phydev_for_ethname	common/exports.c	/^# define mdio_phydev_for_ethname	/;"	d	file:
mdio_phydev_for_ethname	common/miiphyutil.c	/^struct phy_device *mdio_phydev_for_ethname(const char *ethname)$/;"	f	typeref:struct:phy_device *
mdio_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux mdio_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mdio_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux mdio_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mdio_pins	arch/arm/dts/armada-38x.dtsi	/^				mdio_pins: mdio-pins {$/;"	l	label:pinctrl
mdio_read	drivers/net/ftmac110.c	/^static uint16_t mdio_read(struct eth_device *dev,$/;"	f	typeref:typename:uint16_t	file:
mdio_read	drivers/net/natsemi.c	/^mdio_read(struct eth_device *dev, int phy_id, int location)$/;"	f	typeref:typename:int	file:
mdio_read	drivers/net/ns8382x.c	/^mdio_read(struct eth_device *dev, int phy_id, int addr)$/;"	f	typeref:typename:int	file:
mdio_read	drivers/net/rtl8169.c	/^int mdio_read(int RegAddr)$/;"	f	typeref:typename:int
mdio_read	drivers/qe/uec_phy.h	/^	int (*mdio_read) (struct eth_device * dev, int mii_id, int reg);$/;"	m	struct:uec_mii_info	typeref:typename:int (*)(struct eth_device * dev,int mii_id,int reg)
mdio_read_ranges	cmd/mdio.c	/^static int mdio_read_ranges(struct phy_device *phydev, struct mii_dev *bus,$/;"	f	typeref:typename:int	file:
mdio_register	common/miiphyutil.c	/^int mdio_register(struct mii_dev *bus)$/;"	f	typeref:typename:int
mdio_regs	arch/arm/include/asm/ti-common/keystone_net.h	/^struct mdio_regs {$/;"	s
mdio_regs	drivers/net/cpsw.c	/^static struct cpsw_mdio_regs *mdio_regs;$/;"	v	typeref:struct:cpsw_mdio_regs *	file:
mdio_regs	drivers/net/davinci_emac.h	/^} mdio_regs;$/;"	t	typeref:struct:__anon759824920308
mdio_stat	include/fsl_memac.h	/^	u32	mdio_stat;	\/* MDIO configuration and status *\/$/;"	m	struct:memac_mdio_controller	typeref:typename:u32
mdio_stat	include/fsl_tgec.h	/^	u32	mdio_stat;	\/* MDIO configuration and status *\/$/;"	m	struct:tgec_mdio_controller	typeref:typename:u32
mdio_support	include/linux/ethtool.h	/^	__u8	mdio_support;$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
mdio_sync	drivers/net/ns8382x.c	/^mdio_sync(struct eth_device *dev, u32 offset)$/;"	f	typeref:typename:void	file:
mdio_tristate	include/miiphy.h	/^	int (*mdio_tristate)(struct bb_miiphy_bus *bus);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus)
mdio_unregister	common/miiphyutil.c	/^int mdio_unregister(struct mii_dev *bus)$/;"	f	typeref:typename:int
mdio_wait	drivers/net/xilinx_axi_emac.c	/^static inline int mdio_wait(struct axi_regs *regs)$/;"	f	typeref:typename:int	file:
mdio_wait	drivers/net/xilinx_emaclite.c	/^static int mdio_wait(struct emaclite_regs *regs)$/;"	f	typeref:typename:int	file:
mdio_wait	drivers/net/zynq_gem.c	/^static inline int mdio_wait(struct zynq_gem_regs *regs)$/;"	f	typeref:typename:int	file:
mdio_write	drivers/net/ftmac110.c	/^static void mdio_write(struct eth_device *dev,$/;"	f	typeref:typename:void	file:
mdio_write	drivers/net/ns8382x.c	/^mdio_write(struct eth_device *dev, int phy_id, int addr, int value)$/;"	f	typeref:typename:void	file:
mdio_write	drivers/net/rtl8169.c	/^void mdio_write(int RegAddr, int value)$/;"	f	typeref:typename:void
mdio_write	drivers/qe/uec_phy.h	/^	void (*mdio_write) (struct eth_device * dev, int mii_id, int reg,$/;"	m	struct:uec_mii_info	typeref:typename:void (*)(struct eth_device * dev,int mii_id,int reg,int val)
mdio_write_ranges	cmd/mdio.c	/^static int mdio_write_ranges(struct phy_device *phydev, struct mii_dev *bus,$/;"	f	typeref:typename:int	file:
mdioaddr	drivers/net/xilinx_emaclite.c	/^	u32 mdioaddr; \/* 0x7e4 - MDIO Address Register *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
mdioctrl	drivers/net/xilinx_emaclite.c	/^	u32 mdioctrl; \/* 0x7f0 - MDIO Control Register *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
mdiord	drivers/net/xilinx_emaclite.c	/^	u32 mdiord;\/* 0x7ec - MDIO Read Data Register *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
mdiowr	drivers/net/xilinx_emaclite.c	/^	u32 mdiowr; \/* 0x7e8 - MDIO Write Data Register *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
mdiv	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t mdiv; \/**< input divider value *\/$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
mdix	drivers/net/e1000.h	/^	uint8_t mdix;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t
mdix_mode	drivers/net/e1000.h	/^	e1000_auto_x_mode mdix_mode;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_auto_x_mode
mdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void mdl_dump(void)$/;"	f	typeref:typename:void	file:
mdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void mdl_dump(const struct phy_param *phy_param)$/;"	f	typeref:typename:void	file:
mdlm_desc	drivers/usb/gadget/ether.c	/^static const struct usb_cdc_mdlm_desc mdlm_desc = {$/;"	v	typeref:typename:const struct usb_cdc_mdlm_desc	file:
mdlm_detail_desc	drivers/usb/gadget/ether.c	/^static const u8 mdlm_detail_desc[] = {$/;"	v	typeref:typename:const u8[]	file:
mdlr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u32 mdlr;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u32
mdlr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 mdlr;            \/* DATX8 master delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32
mdlr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u32 mdlr;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u32
mdlr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 mdlr;            \/* DATX8 master delay line register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u32
mdma_fsclk	drivers/block/pata_bfin.c	/^static const u32 mdma_fsclk[] = { 33333333, 33333333, 33333333 };$/;"	v	typeref:typename:const u32[]	file:
mdma_t0min	drivers/block/pata_bfin.c	/^static const u32 mdma_t0min[]  = { 480, 150, 120 };$/;"	v	typeref:typename:const u32[]	file:
mdma_tdmin	drivers/block/pata_bfin.c	/^static const u32 mdma_tdmin[]  = { 215, 80,  70  };$/;"	v	typeref:typename:const u32[]	file:
mdma_thmin	drivers/block/pata_bfin.c	/^static const u32 mdma_thmin[]  = { 20,  15,  10  };$/;"	v	typeref:typename:const u32[]	file:
mdma_tjmin	drivers/block/pata_bfin.c	/^static const u32 mdma_tjmin[]  = { 20,  5,   5   };$/;"	v	typeref:typename:const u32[]	file:
mdma_tkrmin	drivers/block/pata_bfin.c	/^static const u32 mdma_tkrmin[] = { 50,  50,  25  };$/;"	v	typeref:typename:const u32[]	file:
mdma_tkwmin	drivers/block/pata_bfin.c	/^static const u32 mdma_tkwmin[] = { 215, 50,  25  };$/;"	v	typeref:typename:const u32[]	file:
mdma_tmmin	drivers/block/pata_bfin.c	/^static const u32 mdma_tmmin[]  = { 50,  30,  25  };$/;"	v	typeref:typename:const u32[]	file:
mdma_tzmax	drivers/block/pata_bfin.c	/^static const u32 mdma_tzmax[]  = { 20,  25,  25  };$/;"	v	typeref:typename:const u32[]	file:
mdmisc	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdmisc;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdmisc	include/fsl_mmdc.h	/^	u32 mdmisc;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdmisc	include/fsl_mmdc.h	/^	u32 mdmisc;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdmr4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdmr4;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdmr4	include/fsl_mmdc.h	/^	u32 mdmr4;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdmrr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdmrr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdmrr	include/fsl_mmdc.h	/^	u32 mdmrr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdn	fs/zfs/zfs.c	/^	dnode_end_t mdn;$/;"	m	struct:zfs_data	typeref:typename:dnode_end_t	file:
mdor	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdor;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdor	include/fsl_mmdc.h	/^	u32 mdor;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdor	include/fsl_mmdc.h	/^	u32 mdor;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdotc	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdotc;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdotc	include/fsl_mmdc.h	/^	u32 mdotc;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdotc	include/fsl_mmdc.h	/^	u32 mdotc;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdpdc	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdpdc;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdpdc	include/fsl_mmdc.h	/^	u32 mdpdc;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdpdc	include/fsl_mmdc.h	/^	u32 mdpdc;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	mdr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
mdr	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	mdr;$/;"	m	struct:davinci_uart_ctrl_regs	typeref:typename:dv_reg
mdr	arch/m68k/include/asm/immap_520x.h	/^	u8 mdr;			\/* 0x04 Modulation Divider *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
mdr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     mdr;            \/* LBC UPM Data *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
mdr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 mdr;		\/* I2Cn + 0x10 *\/$/;"	m	struct:i2c512x_dev	typeref:typename:volatile u32
mdr	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int mdr;        \/* UPM\/FCM Data Register value           *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
mdr	include/linux/mtd/fsl_upm.h	/^	void __iomem *mdr;$/;"	m	struct:fsl_upm	typeref:typename:void __iomem *
mdr	include/mpc5xxx.h	/^	volatile u32 mdr;		\/* I2Cn + 0x10 *\/$/;"	m	struct:mpc5xxx_i2c	typeref:typename:volatile u32
mdr1	arch/powerpc/include/asm/immap_83xx.h	/^	u16 mdr1;		\/* Timer1 Mode Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
mdr2	arch/powerpc/include/asm/immap_83xx.h	/^	u16 mdr2;		\/* Timer2 Mode Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
mdr3	arch/powerpc/include/asm/immap_83xx.h	/^	u16 mdr3;		\/* Timer3 Mode Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
mdr4	arch/powerpc/include/asm/immap_83xx.h	/^	u16 mdr4;		\/* Timer4 Mode Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
mdref	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdref;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdref	include/fsl_mmdc.h	/^	u32 mdref;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdref	include/fsl_mmdc.h	/^	u32 mdref;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdresol	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	mdresol;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
mdrwd	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdrwd;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdrwd	include/fsl_mmdc.h	/^	u32 mdrwd;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mdrwd	include/fsl_mmdc.h	/^	u32 mdrwd;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdscr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mdscr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mdscr	include/fsl_mmdc.h	/^	u32 mdscr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mdsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	mdsr;		\/* 0x58 Multi-driver Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
mdstat	arch/arm/mach-davinci/include/mach/hardware.h	/^			dv_reg	mdstat[PSC_PSC0_MODULE_ID_CNT];$/;"	m	struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330208	typeref:typename:dv_reg[]
mdstat	arch/arm/mach-davinci/include/mach/hardware.h	/^			dv_reg	mdstat[PSC_PSC1_MODULE_ID_CNT];$/;"	m	struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330308	typeref:typename:dv_reg[]
mdstat	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	mdstat[52];	\/* 0x800 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int[52]
mdsz	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mdsz;		\/* 0x44 Message Data Size *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mdt	include/mmc.h	/^	unsigned char mdt;$/;"	m	struct:mmc_cid	typeref:typename:unsigned char
me	post/lib_powerpc/rlwimi.c	/^    uchar me;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:uchar	file:
me	post/lib_powerpc/rlwinm.c	/^    uchar me;$/;"	m	struct:cpu_post_rlwinm_s	typeref:typename:uchar	file:
me	post/lib_powerpc/rlwnm.c	/^    uchar me;$/;"	m	struct:cpu_post_rlwnm_s	typeref:typename:uchar	file:
me_ack_values	arch/x86/cpu/ivybridge/early_me.c	/^static const char *const me_ack_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_bios_path	arch/x86/include/asm/me_common.h	/^enum me_bios_path {$/;"	g
me_bios_payload	arch/x86/include/asm/arch-broadwell/me.h	/^struct me_bios_payload {$/;"	s
me_bios_payload	arch/x86/include/asm/arch-ivybridge/me.h	/^struct __packed me_bios_payload {$/;"	s
me_cws_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_cws_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_did	arch/x86/include/asm/me_common.h	/^struct me_did {$/;"	s
me_error_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_error_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_fw_version	arch/x86/include/asm/me_common.h	/^struct me_fw_version {$/;"	s
me_fwcaps	arch/x86/include/asm/me_common.h	/^struct __packed me_fwcaps {$/;"	s
me_global_reset	arch/x86/include/asm/me_common.h	/^struct me_global_reset {$/;"	s
me_gmes	arch/x86/include/asm/me_common.h	/^struct me_gmes {$/;"	s
me_heres	arch/x86/include/asm/me_common.h	/^struct me_heres {$/;"	s
me_hfs	arch/x86/include/asm/me_common.h	/^struct me_hfs {$/;"	s
me_hfs2	arch/x86/include/asm/arch-broadwell/me.h	/^struct me_hfs2 {$/;"	s
me_opmode_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_opmode_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_opstate_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_opstate_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_pmevent_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_pmevent_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_progress_bup_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_progress_bup_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_progress_policy_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_progress_policy_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_progress_rom_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_progress_rom_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_progress_values	arch/x86/cpu/intel_common/me_status.c	/^static const char *const me_progress_values[] = {$/;"	v	typeref:typename:const char * const[]	file:
me_read_dword_ptr	arch/x86/cpu/broadwell/me.c	/^static inline void me_read_dword_ptr(struct udevice *dev, void *ptr, int offset)$/;"	f	typeref:typename:void	file:
me_uma	arch/x86/include/asm/me_common.h	/^struct me_uma {$/;"	s
mean_ec	drivers/mtd/ubi/ubi.h	/^	int mean_ec;$/;"	m	struct:ubi_attach_info	typeref:typename:int
mean_ec	drivers/mtd/ubi/ubi.h	/^	int mean_ec;$/;"	m	struct:ubi_device	typeref:typename:int
mear	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 mear[16];	\/* 0x160 ~ 0x19c: Master Error Address Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16]
measure_gclk	arch/powerpc/cpu/mpc8xx/speed.c	/^unsigned long measure_gclk(void)$/;"	f	typeref:typename:unsigned long
mech_char	include/ddr_spd.h	/^	unsigned char mech_char;   \/* 19 DIMM Mechanical Characteristics *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
med3	fs/yaffs2/yaffs_qsort.c	/^med3(char *a, char *b, char *c, int (*cmp)(const void *, const void *))$/;"	f	typeref:typename:char *	file:
media	drivers/net/rtl8169.c	/^static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };$/;"	v	typeref:typename:int[]	file:
media	include/efi_api.h	/^	struct efi_block_io_media *media;$/;"	m	struct:efi_block_io	typeref:struct:efi_block_io_media *
media	include/fat.h	/^	__u8	media;		\/* Media code *\/$/;"	m	struct:boot_sector	typeref:typename:__u8
media	lib/efi_loader/efi_disk.c	/^	struct efi_block_io_media media;$/;"	m	struct:efi_disk_obj	typeref:struct:efi_block_io_media	file:
media_ctrl	arch/arm/dts/hi6220.dtsi	/^		media_ctrl: media_ctrl@f4410000 {$/;"	l
media_header_size	include/efi_api.h	/^	u32 media_header_size;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
media_id	include/efi_api.h	/^	u32 media_id;$/;"	m	struct:efi_block_io_media	typeref:typename:u32
media_mode	drivers/net/uli526x.c	/^	u8 media_mode;			\/* user specify media mode *\/$/;"	m	struct:uli526x_board_info	typeref:typename:u8	file:
media_present	include/efi_api.h	/^	char media_present;$/;"	m	struct:efi_block_io_media	typeref:typename:char
media_present	include/efi_api.h	/^	u8 media_present;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u8
media_present_supported	include/efi_api.h	/^	u8 media_present_supported;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u8
media_state	drivers/usb/gadget/rndis.h	/^	u32			media_state;$/;"	m	struct:rndis_params	typeref:typename:u32
media_type	drivers/net/e1000.h	/^	e1000_media_type media_type;$/;"	m	struct:e1000_hw	typeref:typename:e1000_media_type
medium	drivers/usb/gadget/rndis.h	/^	u32			medium;$/;"	m	struct:rndis_params	typeref:typename:u32
medium_freq	drivers/ddr/marvell/a38x/ddr3_training.c	/^enum hws_ddr_freq medium_freq;$/;"	v	typeref:enum:hws_ddr_freq
meesc_ethercat_hw_init	board/esd/meesc/meesc.c	/^static void meesc_ethercat_hw_init(void)$/;"	f	typeref:typename:void	file:
meesc_macb_hw_init	board/esd/meesc/meesc.c	/^static void meesc_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
meesc_nand_hw_init	board/esd/meesc/meesc.c	/^static void meesc_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
mefwcaps_sku	arch/x86/include/asm/me_common.h	/^struct __packed mefwcaps_sku {$/;"	s
megacore_revision	drivers/net/altera_tse.h	/^	u32 megacore_revision;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
mei_csr	arch/x86/include/asm/me_common.h	/^struct mei_csr {$/;"	s
mei_header	arch/x86/include/asm/me_common.h	/^struct mei_header {$/;"	s
meidr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 meidr;	\/* 0x154: Master Error Interrupt Disable Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32
meier	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 meier;	\/* 0x150: Master Error Interrupt Enable Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32
meimr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 meimr;	\/* 0x158: Master Error Interrupt Mask Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32
mem	arch/arm/include/asm/setup.h	/^		struct tag_mem32	mem;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_mem32
mem	arch/arm/mach-exynos/dmc_init_exynos4.c	/^struct mem_timings mem = {$/;"	v	typeref:struct:mem_timings
mem	arch/nds32/include/asm/setup.h	/^		struct tag_mem32	mem;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_mem32
mem	arch/powerpc/include/asm/immap_83xx.h	/^	u8 mem[0x8000];$/;"	m	struct:rom83xx	typeref:typename:u8[0x8000]
mem	drivers/pci/pci_mvebu.c	/^	struct resource mem;$/;"	m	struct:mvebu_pcie	typeref:struct:resource	file:
mem	drivers/usb/dwc3/core.h	/^	void			*mem;$/;"	m	struct:dwc3	typeref:typename:void *
mem0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mem0;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
mem1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mem1;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
mem2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mem2;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
mem2_clk	arch/arm/include/asm/global_data.h	/^	unsigned long mem2_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
mem2chunk	common/dlmalloc.c	/^#define mem2chunk(/;"	d	file:
mem2hex	common/kgdb.c	/^mem2hex(char *mem, char *buf, int count)$/;"	f	typeref:typename:unsigned char *	file:
mem3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mem3;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
mem4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mem4;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
memSize	include/video_fb.h	/^    unsigned int memSize;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
mem_access_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 mem_access_word(int addr)$/;"	f	typeref:typename:u16
mem_addr	drivers/mtd/onenand/samsung.c	/^	unsigned int	(*mem_addr)(int fba, int fpa, int fsa);$/;"	m	struct:s3c_onenand	typeref:typename:unsigned int (*)(int fba,int fpa,int fsa)	file:
mem_address_mirroring	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_address_mirroring;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_attr	cmd/efi.c	/^} mem_attr[] = {$/;"	v	typeref:struct:attr_info[]
mem_base	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 mem_base;$/;"	m	struct:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a::__anon775fc5440a08	typeref:typename:u32
mem_base	arch/x86/include/asm/fsp/fsp_hob.h	/^	phys_addr_t		mem_base;$/;"	m	struct:hob_mem_alloc	typeref:typename:phys_addr_t
mem_base	drivers/bios_emulator/include/x86emu/regs.h	/^	u8 *mem_base;$/;"	m	struct:__anon39451e6d0908	typeref:typename:u8 *
mem_base	drivers/pci/pci_ftpci100.c	/^	unsigned int mem_base;$/;"	m	struct:ftpci100_data	typeref:typename:unsigned int	file:
mem_base	include/fsl_ddr.h	/^	unsigned long long mem_base;$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:unsigned long long
mem_block	fs/jffs2/jffs2_1pass.c	/^struct mem_block {$/;"	s	file:
mem_block	fs/jffs2/jffs2_nand_1pass.c	/^struct mem_block {$/;"	s	file:
mem_buf	tools/pblimage.c	/^static unsigned char mem_buf[1000000];$/;"	v	typeref:typename:unsigned char[1000000]	file:
mem_bus	arch/powerpc/include/asm/fsl_pci.h	/^	pci_addr_t mem_bus;$/;"	m	struct:fsl_pci_info	typeref:typename:pci_addr_t
mem_bus	drivers/pci/pcie_layerscape.c	/^	u64 mem_bus;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
mem_calibrate	drivers/ddr/altera/sequencer.c	/^static u32 mem_calibrate(void)$/;"	f	typeref:typename:u32	file:
mem_cfg	include/linux/mtd/samsung_onenand.h	/^	unsigned int	mem_cfg;	\/* 0x0000 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
mem_clk	include/asm-generic/global_data.h	/^	unsigned long mem_clk;$/;"	m	struct:global_data	typeref:typename:unsigned long
mem_conf_t	board/cm5200/cm5200.h	/^} mem_conf_t;$/;"	t	typeref:struct:__anonb595836f0408
mem_config	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	struct memory_config *mem_config;$/;"	m	struct:fspinit_rtbuf	typeref:struct:memory_config *
mem_config	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	struct memory_config mem_config;$/;"	m	struct:fsp_config_data	typeref:struct:memory_config
mem_ctlr	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct	mem_ctlr {$/;"	s
mem_ctlr	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct	mem_ctlr {$/;"	s
mem_ctlr	arch/powerpc/include/asm/immap_8260.h	/^typedef struct	mem_ctlr {$/;"	s
mem_ctrl_init	arch/arm/mach-exynos/dmc_common.c	/^void mem_ctrl_init(int reset)$/;"	f	typeref:typename:void
mem_ctrl_init	arch/arm/mach-exynos/dmc_init_exynos4.c	/^void mem_ctrl_init(int reset)$/;"	f	typeref:typename:void
mem_data_mask_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_data_mask_width;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_data_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_data_width;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_dc_sync	drivers/video/ipu.h	/^	} mem_dc_sync;$/;"	m	union:__anon4a35f9fd040a	typeref:struct:__anon4a35f9fd040a::__anon4a35f9fd0508
mem_ddr	board/ccv/xpress/spl.c	/^static struct mx6_ddr3_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr	board/el/el6x/el6x.c	/^static struct mx6_ddr3_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr	board/freescale/mx6slevk/mx6slevk.c	/^static struct mx6_lpddr2_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_lpddr2_cfg	file:
mem_ddr	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static struct mx6_ddr3_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct mx6_ddr3_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct mx6_lpddr2_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_lpddr2_cfg	file:
mem_ddr	board/phytec/pcm058/pcm058.c	/^static struct mx6_ddr3_cfg mem_ddr = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr_2g	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static struct mx6_ddr3_cfg mem_ddr_2g = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr_2g	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static struct mx6_ddr3_cfg mem_ddr_2g = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr_4g	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static struct mx6_ddr3_cfg mem_ddr_4g = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_ddr_4g	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static struct mx6_ddr3_cfg mem_ddr_4g = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mem_dl	board/engicam/icorem6/icorem6.c	/^static struct mx6_ddr_sysinfo mem_dl = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_dl	board/wandboard/spl.c	/^static struct mx6_ddr_sysinfo mem_dl = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_dp_bg_sync	drivers/video/ipu.h	/^	} mem_dp_bg_sync;$/;"	m	union:__anon4a35f9fd040a	typeref:struct:__anon4a35f9fd040a::__anon4a35f9fd0708
mem_dp_fg_sync	drivers/video/ipu.h	/^	} mem_dp_fg_sync;$/;"	m	union:__anon4a35f9fd040a	typeref:struct:__anon4a35f9fd040a::__anon4a35f9fd0908
mem_dq_per_read_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_dq_per_read_dqs;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_dq_per_write_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_dq_per_write_dqs;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_dram_size	arch/arm/include/asm/arch-mxs/sys_proto.h	/^	uint32_t	mem_dram_size;$/;"	m	struct:mxs_spl_data	typeref:typename:uint32_t
mem_fclk_21285	arch/arm/include/asm/setup.h	/^	    unsigned long mem_fclk_21285;       \/* 88 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
mem_high_pri	arch/arm/include/asm/arch-tegra/dc.h	/^	uint mem_high_pri;		\/* _DISP_MEM_HIGH_PRIORITY_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
mem_high_pri_timer	arch/arm/include/asm/arch-tegra/dc.h	/^	uint mem_high_pri_timer;	\/* _DISP_MEM_HIGH_PRIORITY_TIMER_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
mem_if_read_dqs_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_if_read_dqs_width;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_if_write_dqs_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_if_write_dqs_width;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_init	arch/arm/cpu/armv7/omap3/emif4.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	arch/arm/cpu/armv7/omap3/sdrc.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^mem_init:$/;"	l
mem_init	arch/x86/include/asm/arch-quark/mrc.h	/^struct mem_init {$/;"	s
mem_init	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/sama5d3xek/sama5d3xek.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/atmel/sama5d4ek/sama5d4ek.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/denx/ma5d4evk/ma5d4evk.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/mini-box/picosam9g45/picosam9g45.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/siemens/corvus/board.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/siemens/smartweb/smartweb.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init	board/siemens/taurus/taurus.c	/^void mem_init(void)$/;"	f	typeref:typename:void
mem_init_latency	drivers/ddr/altera/sequencer.c	/^static void mem_init_latency(void)$/;"	f	typeref:typename:void	file:
mem_is_flash	arch/arm/mach-uniphier/micro-support-card.c	/^static int mem_is_flash(const struct memory_bank *mem)$/;"	f	typeref:typename:int	file:
mem_iv_size	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		mem_iv_size;	\/* Memory channel interleaving size *\/$/;"	m	struct:spl_machine_param	typeref:typename:u32
mem_len	arch/x86/include/asm/fsp/fsp_hob.h	/^	phys_size_t		mem_len;$/;"	m	struct:hob_mem_alloc	typeref:typename:phys_size_t
mem_malloc_brk	common/dlmalloc.c	/^ulong mem_malloc_brk = 0;$/;"	v	typeref:typename:ulong
mem_malloc_end	common/dlmalloc.c	/^ulong mem_malloc_end = 0;$/;"	v	typeref:typename:ulong
mem_malloc_init	common/dlmalloc.c	/^void mem_malloc_init(ulong start, ulong size)$/;"	f	typeref:typename:void
mem_malloc_start	common/dlmalloc.c	/^ulong mem_malloc_start = 0;$/;"	v	typeref:typename:ulong
mem_manuf	arch/arm/mach-exynos/clock_init.h	/^	enum mem_manuf mem_manuf;	\/* Memory manufacturer *\/$/;"	m	struct:mem_timings	typeref:enum:mem_manuf
mem_manuf	arch/arm/mach-exynos/include/mach/dmc.h	/^enum mem_manuf {$/;"	g
mem_manuf	arch/arm/mach-exynos/include/mach/spl.h	/^	enum mem_manuf	mem_manuf;	\/* Memory Manufacturer *\/$/;"	m	struct:spl_machine_param	typeref:enum:mem_manuf
mem_map	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^struct mm_region *mem_map = early_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/cpu/armv8/s32v234/cpu.c	/^struct mm_region *mem_map = s32v234_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/cpu/armv8/zynqmp/cpu.c	/^struct mm_region *mem_map = zynqmp_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-exynos/mmu-arm64.c	/^struct mm_region *mem_map = exynos7420_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-meson/board.c	/^struct mm_region *mem_map = gxbb_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-mvebu/armada3700/cpu.c	/^struct mm_region *mem_map = mvebu_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-mvebu/armada8k/cpu.c	/^struct mm_region *mem_map = mvebu_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-rmobile/memmap-r8a7795.c	/^struct mm_region *mem_map = r8a7795_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-rockchip/rk3399/rk3399.c	/^struct mm_region *mem_map = rk3399_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-snapdragon/sysmap-apq8016.c	/^struct mm_region *mem_map = apq8016_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-sunxi/board.c	/^struct mm_region *mem_map = sunxi_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-tegra/arm64-mmu.c	/^struct mm_region *mem_map = tegra_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	arch/arm/mach-uniphier/arm64/mem_map.c	/^struct mm_region *mem_map = uniphier_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	board/armltd/vexpress64/vexpress64.c	/^struct mm_region *mem_map = vexpress64_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	board/cavium/thunderx/thunderx.c	/^struct mm_region *mem_map = thunderx_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	board/hisilicon/hikey/hikey.c	/^struct mm_region *mem_map = hikey_mem_map;$/;"	v	typeref:struct:mm_region *
mem_map	board/raspberrypi/rpi/rpi.c	/^struct mm_region *mem_map = bcm2837_mem_map;$/;"	v	typeref:struct:mm_region *
mem_number_of_cs_per_dimm	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_number_of_cs_per_dimm;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_number_of_ranks	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_number_of_ranks;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_ok	arch/arm/cpu/armv7/omap-common/mem-common.c	/^u32 mem_ok(u32 cs)$/;"	f	typeref:typename:u32
mem_op	drivers/mtd/altera_qspi.c	/^	u32	mem_op;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
mem_phys	arch/powerpc/include/asm/fsl_pci.h	/^	phys_size_t mem_phys;$/;"	m	struct:fsl_pci_info	typeref:typename:phys_size_t
mem_phys	drivers/pci/pcie_layerscape.c	/^	u64 mem_phys;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
mem_precharge_and_activate	drivers/ddr/altera/sequencer.c	/^static void mem_precharge_and_activate(void)$/;"	f	typeref:typename:void	file:
mem_probe	include/ddr_spd.h	/^	unsigned char mem_probe;   \/* 39 Mem analysis probe characteristics *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
mem_probe	include/spd.h	/^	unsigned char mem_probe;   \/* 39 Mem analysis probe characteristics *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
mem_q	board/engicam/icorem6/icorem6.c	/^static struct mx6_ddr_sysinfo mem_q = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_q	board/wandboard/spl.c	/^static struct mx6_ddr_sysinfo mem_q = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_qdl	board/udoo/udoo_spl.c	/^static struct mx6_ddr_sysinfo mem_qdl = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_range	arch/avr32/include/asm/setup.h	/^		struct tag_mem_range mem_range;$/;"	m	union:tag::__anon5c2aea39010a	typeref:struct:tag_mem_range
mem_region	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	} mem_region[55];$/;"	m	struct:rdc_regs	typeref:struct:rdc_regs::__anon75a4c95b0108[55]
mem_region	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	} mem_region[52];$/;"	m	struct:rdc_regs	typeref:struct:rdc_regs::__anona69826bc0108[52]
mem_region	include/api_public.h	/^struct mem_region {$/;"	s
mem_region_base	arch/nios2/include/asm/global_data.h	/^	u32 mem_region_base;$/;"	m	struct:arch_global_data	typeref:typename:u32
mem_reset	include/linux/mtd/samsung_onenand.h	/^	unsigned int	mem_reset;	\/* 0x0020 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
mem_rst	drivers/video/ipu_regs.h	/^	u32 mem_rst;$/;"	m	struct:ipu_cm	typeref:typename:u32
mem_s	board/engicam/icorem6/icorem6.c	/^static struct mx6_ddr_sysinfo mem_s = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_s	board/wandboard/spl.c	/^static struct mx6_ddr_sysinfo mem_s = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
mem_sdc_bg	drivers/video/ipu.h	/^	} mem_sdc_bg;$/;"	m	union:__anon4a35f9fd040a	typeref:struct:__anon4a35f9fd040a::__anon4a35f9fd0808
mem_sdc_fg	drivers/video/ipu.h	/^	} mem_sdc_fg;$/;"	m	union:__anon4a35f9fd040a	typeref:struct:__anon4a35f9fd040a::__anon4a35f9fd0608
mem_sec_clk	arch/powerpc/include/asm/global_data.h	/^	u32 mem_sec_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
mem_size	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 mem_size;$/;"	m	struct:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a::__anon775fc5440a08	typeref:typename:u32
mem_size	arch/powerpc/include/asm/fsl_pci.h	/^	pci_size_t mem_size;$/;"	m	struct:fsl_pci_info	typeref:typename:pci_size_t
mem_size	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t mem_size;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
mem_size	drivers/bios_emulator/include/x86emu/regs.h	/^	u32 mem_size;$/;"	m	struct:__anon39451e6d0908	typeref:typename:u32
mem_size	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 mem_size[] = {$/;"	v	typeref:typename:u32[]
mem_size	drivers/pci/pcie_layerscape.c	/^	u64 mem_size;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
mem_size_config	drivers/ddr/marvell/a38x/ddr3_training.c	/^static u8 mem_size_config[MEM_SIZE_LAST] = {$/;"	v	typeref:typename:u8[]	file:
mem_skip_calibrate	drivers/ddr/altera/sequencer.c	/^static void mem_skip_calibrate(void)$/;"	f	typeref:typename:void	file:
mem_speed	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 mem_speed;	\/* ie 1600 for DDR3-1600 (800,1066,1333,1600) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u16
mem_speed	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 mem_speed;	\/* ie 800 for LPDDR2-800 *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u16
mem_t_add	drivers/ddr/altera/sequencer.h	/^	u32	mem_t_add;$/;"	m	struct:socfpga_data_mgr	typeref:typename:u32
mem_test_alt	cmd/mem.c	/^static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr,$/;"	f	typeref:typename:ulong	file:
mem_test_quick	cmd/mem.c	/^static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,$/;"	f	typeref:typename:ulong	file:
mem_text	drivers/misc/swap_case.c	/^	char mem_text[MEM_TEXT_SIZE];$/;"	m	struct:swap_case_priv	typeref:typename:char[]	file:
mem_timings	arch/arm/mach-exynos/clock_init.h	/^struct mem_timings {$/;"	s
mem_timings	arch/arm/mach-exynos/clock_init_exynos5.c	/^struct mem_timings mem_timings[] = {$/;"	v	typeref:struct:mem_timings[]
mem_timings	arch/arm/mach-exynos/exynos4_setup.h	/^struct mem_timings {$/;"	s
mem_to_mem_idma2intr	examples/standalone/mem_to_mem_idma2intr.c	/^int mem_to_mem_idma2intr (int argc, char * const argv[])$/;"	f	typeref:typename:int
mem_trim0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 mem_trim0;$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32
mem_trim1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 mem_trim1;$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32
mem_type	arch/arm/mach-exynos/clock_init.h	/^	enum ddr_mode mem_type;		\/* Memory type *\/$/;"	m	struct:mem_timings	typeref:enum:ddr_mode
mem_type	arch/arm/mach-exynos/include/mach/spl.h	/^	enum ddr_mode	mem_type;	\/* Type of on-board memory *\/$/;"	m	struct:spl_machine_param	typeref:enum:ddr_mode
mem_type	arch/x86/include/asm/fsp/fsp_hob.h	/^	enum efi_mem_type	mem_type;$/;"	m	struct:hob_mem_alloc	typeref:enum:efi_mem_type
mem_type	include/ddr_spd.h	/^	uint8_t mem_type;		\/*  2 Key Byte \/ mem type *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
mem_type	include/ddr_spd.h	/^	unsigned char mem_type;        \/*  2 Key Byte \/ Fundamental mem type *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
mem_type	include/ddr_spd.h	/^	unsigned char mem_type;    \/*  2 Fundamental memory type *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
mem_type	include/ddr_spd.h	/^	unsigned char mem_type;    \/*  2 Fundamental memory type *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
mem_type	include/remoteproc.h	/^	enum rproc_mem_type mem_type;$/;"	m	struct:dm_rproc_uclass_pdata	typeref:enum:rproc_mem_type
mem_type	include/spd.h	/^	unsigned char mem_type;    \/*  2 Fundamental memory type *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
mem_virtual_groups_per_read_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_virtual_groups_per_read_dqs;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mem_virtual_groups_per_write_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mem_virtual_groups_per_write_dqs;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
memac	include/fsl_fman.h	/^	} memac[10];$/;"	m	struct:ccsr_fman	typeref:struct:ccsr_fman::__anonbe262a140208[10]
memac	include/fsl_memac.h	/^struct memac {$/;"	s
memac_clrbits_32	drivers/net/fm/memac_phy.c	/^#define memac_clrbits_32(/;"	d	file:
memac_disable_mac	drivers/net/fm/memac.c	/^static void memac_disable_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
memac_enable_mac	drivers/net/fm/memac.c	/^static void memac_enable_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
memac_in_32	drivers/net/fm/memac_phy.c	/^static u32 memac_in_32(u32 *reg)$/;"	f	typeref:typename:u32	file:
memac_init_mac	drivers/net/fm/memac.c	/^static void memac_init_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
memac_mdio_controller	include/fsl_memac.h	/^struct memac_mdio_controller {$/;"	s
memac_mdio_info	include/fm_eth.h	/^struct memac_mdio_info {$/;"	s
memac_mdio_read	drivers/net/fm/memac_phy.c	/^int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,$/;"	f	typeref:typename:int
memac_mdio_reset	drivers/net/fm/memac_phy.c	/^int memac_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int
memac_mdio_write	drivers/net/fm/memac_phy.c	/^int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,$/;"	f	typeref:typename:int
memac_out_32	drivers/net/fm/memac_phy.c	/^#define memac_out_32(/;"	d	file:
memac_set_interface_mode	drivers/net/fm/memac.c	/^static void memac_set_interface_mode(struct fsl_enet_mac *mac,$/;"	f	typeref:typename:void	file:
memac_set_mac_addr	drivers/net/fm/memac.c	/^static void memac_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)$/;"	f	typeref:typename:void	file:
memac_setbits_32	drivers/net/fm/memac_phy.c	/^#define memac_setbits_32(/;"	d	file:
memaccess_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 memaccess_params_sn04[]	= {0x08};$/;"	v	typeref:typename:u16[]	file:
memaccess_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 memaccess_params_sn20[]	= {0x00};$/;"	v	typeref:typename:u16[]	file:
memacchr	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	memacchr;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
memadr_reg1	drivers/mtd/nand/arasan_nfc.c	/^	u32 memadr_reg1;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
memadr_reg2	drivers/mtd/nand/arasan_nfc.c	/^	u32 memadr_reg2;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
memalign	include/malloc.h	/^#define memalign /;"	d
memalign	include/malloc.h	/^#pragma weak memalign /;"	d
memalign_simple	common/malloc_simple.c	/^void *memalign_simple(size_t align, size_t bytes)$/;"	f	typeref:typename:void *
membase	drivers/pci/pci_mvebu.c	/^	void __iomem *membase;$/;"	m	struct:mvebu_pcie	typeref:typename:void __iomem *	file:
membase	drivers/serial/serial_sh.h	/^	unsigned char	*membase;	\/* read\/write[bwl] *\/$/;"	m	struct:uart_port	typeref:typename:unsigned char *
membase	drivers/serial/serial_uniphier.c	/^	struct uniphier_serial __iomem *membase;$/;"	m	struct:uniphier_serial_private_data	typeref:struct:uniphier_serial __iomem *	file:
membaseconfig0	arch/arm/mach-exynos/clock_init.h	/^	unsigned membaseconfig0;$/;"	m	struct:mem_timings	typeref:typename:unsigned
membaseconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int membaseconfig0;$/;"	m	struct:exynos5420_tzasc	typeref:typename:unsigned int
membaseconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int membaseconfig0;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
membaseconfig1	arch/arm/mach-exynos/clock_init.h	/^	unsigned membaseconfig1;$/;"	m	struct:mem_timings	typeref:typename:unsigned
membaseconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int membaseconfig1;$/;"	m	struct:exynos5420_tzasc	typeref:typename:unsigned int
membaseconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int membaseconfig1;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
member_offset	include/usbdevice.h	/^#define member_offset(/;"	d
membuff	include/membuff.h	/^struct membuff {$/;"	s
membuff_avail	lib/membuff.c	/^int membuff_avail(struct membuff *mb)$/;"	f	typeref:typename:int
membuff_dispose	lib/membuff.c	/^void membuff_dispose(struct membuff *mb)$/;"	f	typeref:typename:void
membuff_extend_by	lib/membuff.c	/^int membuff_extend_by(struct membuff *mb, int by, int max)$/;"	f	typeref:typename:int
membuff_free	lib/membuff.c	/^int membuff_free(struct membuff *mb)$/;"	f	typeref:typename:int
membuff_get	lib/membuff.c	/^int membuff_get(struct membuff *mb, char *buff, int maxlen)$/;"	f	typeref:typename:int
membuff_getbyte	lib/membuff.c	/^int membuff_getbyte(struct membuff *mb)$/;"	f	typeref:typename:int
membuff_getraw	lib/membuff.c	/^int membuff_getraw(struct membuff *mb, int maxlen, bool update, char **data)$/;"	f	typeref:typename:int
membuff_init	lib/membuff.c	/^void membuff_init(struct membuff *mb, char *buff, int size)$/;"	f	typeref:typename:void
membuff_isempty	lib/membuff.c	/^bool membuff_isempty(struct membuff *mb)$/;"	f	typeref:typename:bool
membuff_makecontig	lib/membuff.c	/^bool membuff_makecontig(struct membuff *mb)$/;"	f	typeref:typename:bool
membuff_new	lib/membuff.c	/^int membuff_new(struct membuff *mb, int size)$/;"	f	typeref:typename:int
membuff_peekbyte	lib/membuff.c	/^int membuff_peekbyte(struct membuff *mb)$/;"	f	typeref:typename:int
membuff_purge	lib/membuff.c	/^void membuff_purge(struct membuff *mb)$/;"	f	typeref:typename:void
membuff_put	lib/membuff.c	/^int membuff_put(struct membuff *mb, const char *buff, int length)$/;"	f	typeref:typename:int
membuff_putbyte	lib/membuff.c	/^bool membuff_putbyte(struct membuff *mb, int ch)$/;"	f	typeref:typename:bool
membuff_putraw	lib/membuff.c	/^int membuff_putraw(struct membuff *mb, int maxlen, bool update, char **data)$/;"	f	typeref:typename:int
membuff_putrawflex	lib/membuff.c	/^static int membuff_putrawflex(struct membuff *mb, int maxlen, bool update,$/;"	f	typeref:typename:int	file:
membuff_readline	lib/membuff.c	/^int membuff_readline(struct membuff *mb, char *str, int maxlen, int minch)$/;"	f	typeref:typename:int
membuff_size	lib/membuff.c	/^int membuff_size(struct membuff *mb)$/;"	f	typeref:typename:int
membuff_uninit	lib/membuff.c	/^void membuff_uninit(struct membuff *mb)$/;"	f	typeref:typename:void
memc_br0	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_br0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br0	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br1	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_br1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br1	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br10	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br10;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br11	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br11;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br2	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_br2;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br2	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br2;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br2	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br2;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br3	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_br3;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br3	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br3;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br3	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br3;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br4;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br4	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br4;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br5	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br5;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br5	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br5;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br6	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br6;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br6	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br6;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br7	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_br7;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br7	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br7;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br8	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br8;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_br9	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_br9;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_control_reg	arch/arm/include/asm/setup.h	/^	    unsigned long memc_control_reg;	\/* 36 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
memc_control_reg	arch/arm/include/asm/setup.h	/^	u32 memc_control_reg;$/;"	m	struct:tag_acorn	typeref:typename:u32
memc_dmbr	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_dmbr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_dmor	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_dmor;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_immr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_immr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_lsdmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_lsdmr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_lsrt	arch/powerpc/include/asm/immap_8260.h	/^	u_char	memc_lsrt;$/;"	m	struct:mem_ctlr	typeref:typename:u_char
memc_lurt	arch/powerpc/include/asm/immap_8260.h	/^	u_char	memc_lurt;$/;"	m	struct:mem_ctlr	typeref:typename:u_char
memc_mamr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_mamr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mamr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_mamr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mar	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_mar;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mar	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_mar;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mbmr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_mbmr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mbmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_mbmr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mcmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_mcmr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_mcr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mdr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_mdr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mdr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_mdr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_mptpr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	memc_mptpr;$/;"	m	struct:mem_ctlr	typeref:typename:ushort
memc_mptpr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	memc_mptpr;$/;"	m	struct:mem_ctlr	typeref:typename:ushort
memc_mstat	arch/powerpc/include/asm/5xx_immap.h	/^	ushort memc_mstat;$/;"	m	struct:mem_ctlr	typeref:typename:ushort
memc_mstat	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	memc_mstat;$/;"	m	struct:mem_ctlr	typeref:typename:ushort
memc_or0	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_or0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or0	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or1	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_or1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or1	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or10	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or10;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or11	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or11;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or2	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_or2;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or2	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or2;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or2	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or2;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or3	arch/powerpc/include/asm/5xx_immap.h	/^	uint memc_or3;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or3	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or3;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or3	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or3;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or4;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or4	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or4;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or5	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or5;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or5	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or5;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or6	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or6;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or6	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or6;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or7	arch/powerpc/include/asm/8xx_immap.h	/^	uint	memc_or7;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or7	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or7;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or8	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or8;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_or9	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_or9;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_pcibr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_pcibr0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_pcibr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_pcibr1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_pcimsk0	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_pcimsk0;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_pcimsk1	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_pcimsk1;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_psdmr	arch/powerpc/include/asm/immap_8260.h	/^	uint	memc_psdmr;$/;"	m	struct:mem_ctlr	typeref:typename:uint
memc_psrt	arch/powerpc/include/asm/immap_8260.h	/^	u_char	memc_psrt;$/;"	m	struct:mem_ctlr	typeref:typename:u_char
memc_purt	arch/powerpc/include/asm/immap_8260.h	/^	u_char	memc_purt;$/;"	m	struct:mem_ctlr	typeref:typename:u_char
memc_res4a	arch/powerpc/include/asm/5xx_immap.h	/^	ushort memc_res4a;$/;"	m	struct:mem_ctlr	typeref:typename:ushort
memcfg0	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memcfg0;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memcfg1	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memcfg1;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memcfg2	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memcfg2;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memcfg3	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memcfg3;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memcfg4	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memcfg4;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memchr	arch/powerpc/lib/ppcstring.S	/^memchr:$/;"	l
memchr	lib/string.c	/^void *memchr(const void *s, int c, size_t n)$/;"	f	typeref:typename:void *
memchr_inv	lib/string.c	/^void *memchr_inv(const void *start, int c, size_t bytes)$/;"	f	typeref:typename:void *
memclk	arch/arm/include/asm/setup.h	/^		struct tag_memclk	memclk;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_memclk
memcmp	arch/arc/lib/memcmp.S	/^memcmp:$/;"	l
memcmp	arch/powerpc/lib/ppcstring.S	/^memcmp:$/;"	l
memcmp	examples/standalone/mem_to_mem_idma2intr.c	/^int memcmp(const void * cs,const void * ct,size_t count)$/;"	f	typeref:typename:int
memcmp	lib/string.c	/^int memcmp(const void * cs,const void * ct,size_t count)$/;"	f	typeref:typename:int
memcomp	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	memcomp;	\/* 0xD4: APB_MISC_GP_MEMCOMPPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
memcon	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memcon;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memconf_init	arch/arm/mach-uniphier/memconf/memconf.c	/^int memconf_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
memconfig	arch/arm/mach-exynos/clock_init.h	/^	unsigned memconfig;$/;"	m	struct:mem_timings	typeref:typename:unsigned
memconfig0	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned memconfig0;$/;"	m	struct:mem_timings	typeref:typename:unsigned
memconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memconfig0;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
memconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memconfig0;$/;"	m	struct:exynos5420_tzasc	typeref:typename:unsigned int
memconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memconfig0;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
memconfig1	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned memconfig1;$/;"	m	struct:mem_timings	typeref:typename:unsigned
memconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memconfig1;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
memconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memconfig1;$/;"	m	struct:exynos5420_tzasc	typeref:typename:unsigned int
memconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memconfig1;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
memcontrol	arch/arm/mach-exynos/clock_init.h	/^	unsigned memcontrol;$/;"	m	struct:mem_timings	typeref:typename:unsigned
memcontrol	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned memcontrol;$/;"	m	struct:mem_timings	typeref:typename:unsigned
memcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memcontrol;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
memcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memcontrol;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
memcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int memcontrol;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
memcpy	arch/arc/lib/memcpy-700.S	/^memcpy:$/;"	l
memcpy	arch/blackfin/lib/string.c	/^void *memcpy(void *dst, const void *src, size_t count)$/;"	f	typeref:typename:void *
memcpy	arch/powerpc/lib/memcpy_mpc5200.c	/^void *memcpy(void *trg, const void *src, size_t len)$/;"	f	typeref:typename:void *
memcpy	arch/powerpc/lib/ppcstring.S	/^memcpy:$/;"	l
memcpy	arch/sparc/cpu/leon2/prom.c	/^	void *(*memcpy) (void *dest, const void *src, size_t n);$/;"	m	struct:leon_reloc_func	typeref:typename:void * (*)(void * dest,const void * src,size_t n)	file:
memcpy	arch/sparc/cpu/leon3/prom.c	/^	void *(*memcpy) (void *dest, const void *src, size_t n);$/;"	m	struct:leon_reloc_func	typeref:typename:void * (*)(void * dest,const void * src,size_t n)	file:
memcpy	arch/x86/lib/string.c	/^void *memcpy(void *dstpp, const void *srcpp, size_t len)$/;"	f	typeref:typename:void *
memcpy	include/jffs2/mini_inflate.h	/^	void *(*memcpy)(void *, const void *, size);$/;"	m	struct:bitstream	typeref:typename:void * (*)(void *,const void *,size)
memcpy	lib/dhry/dhry_1.c	/^memcpy (d, s, l)$/;"	f
memcpy	lib/efi/efi_stub.c	/^void *memcpy(void *dest, const void *src, size_t size)$/;"	f	typeref:typename:DEBUG_UART_FUNCS void *
memcpy	lib/string.c	/^void * memcpy(void *dest, const void *src, size_t count)$/;"	f	typeref:typename:void *
memcpy_16	drivers/mtd/onenand/onenand_base.c	/^static void *memcpy_16(void *dst, const void *src, unsigned int len)$/;"	f	typeref:typename:void *	file:
memcpy_16_from_onenand	board/micronas/vct/ebi_onenand.c	/^static void *memcpy_16_from_onenand(void *dst, const void *src, unsigned int len)$/;"	f	typeref:typename:void *	file:
memcpy_16_to_onenand	board/micronas/vct/ebi_onenand.c	/^static void *memcpy_16_to_onenand(void *dst, const void *src, unsigned int len)$/;"	f	typeref:typename:void *	file:
memcpy_32_from_onenand	board/micronas/vct/ebi_onenand.c	/^static void *memcpy_32_from_onenand(void *dst, const void *src, unsigned int len)$/;"	f	typeref:typename:void *	file:
memcpy_fromio	arch/arm/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/blackfin/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/microblaze/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/mips/include/asm/io.h	/^static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)$/;"	f	typeref:typename:void
memcpy_fromio	arch/nds32/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/nios2/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/openrisc/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/powerpc/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/sh/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/x86/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_fromio	arch/xtensa/include/asm/io.h	/^#define memcpy_fromio(/;"	d
memcpy_toio	arch/arm/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/blackfin/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/microblaze/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/mips/include/asm/io.h	/^static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)$/;"	f	typeref:typename:void
memcpy_toio	arch/nds32/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/nios2/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/openrisc/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/powerpc/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/sh/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/x86/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpy_toio	arch/xtensa/include/asm/io.h	/^#define memcpy_toio(/;"	d
memcpyl	arch/powerpc/cpu/mpc8xx/video.c	/^static void memcpyl (int *d, int *s, int c)$/;"	f	typeref:typename:void	file:
memcpyl	drivers/video/cfb_console.c	/^static void memcpyl(int *d, int *s, int c)$/;"	f	typeref:typename:void	file:
memctl5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} memctl5xx_t;$/;"	t	typeref:struct:mem_ctlr
memctl8260_t	arch/powerpc/include/asm/immap_8260.h	/^} memctl8260_t;$/;"	t	typeref:struct:mem_ctlr
memctl8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} memctl8xx_t;$/;"	t	typeref:struct:mem_ctlr
memctl_interleaving	include/fsl_ddr_sdram.h	/^	unsigned int memctl_interleaving;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
memctl_interleaving_mode	include/fsl_ddr_sdram.h	/^	unsigned int memctl_interleaving_mode;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
memctl_options_partial_s	include/fsl_ddr_sdram.h	/^typedef struct memctl_options_partial_s {$/;"	s
memctl_options_partial_t	include/fsl_ddr_sdram.h	/^} memctl_options_partial_t;$/;"	t	typeref:struct:memctl_options_partial_s
memctl_options_s	include/fsl_ddr_sdram.h	/^typedef struct memctl_options_s {$/;"	s
memctl_options_t	include/fsl_ddr_sdram.h	/^} memctl_options_t;$/;"	t	typeref:struct:memctl_options_s
memctl_opts	include/fsl_ddr.h	/^	memctl_options_t memctl_opts[CONFIG_SYS_NUM_DDR_CTLRS];$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:memctl_options_t[]
memdump	arch/powerpc/cpu/mpc5xx/spi.c	/^static void memdump (void *pv, int num)$/;"	f	typeref:typename:void	file:
memdump	arch/powerpc/cpu/mpc8260/spi.c	/^static void memdump (void *pv, int num)$/;"	f	typeref:typename:void	file:
memdump	arch/powerpc/cpu/mpc8xx/spi.c	/^static void memdump (void *pv, int num)$/;"	f	typeref:typename:void	file:
memgets	cmd/ini.c	/^static char *memgets(char *str, int num, char **mem, size_t *memsize)$/;"	f	typeref:typename:char *	file:
meminfo	arch/arm/include/asm/setup.h	/^struct meminfo {$/;"	s
meminfo	arch/nds32/include/asm/setup.h	/^struct meminfo {$/;"	s
meminfo	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	struct pei_memory_info meminfo;$/;"	m	struct:pei_data	typeref:struct:pei_memory_info
meminfo	arch/x86/include/asm/global_data.h	/^	struct memory_info meminfo;	\/* Memory information *\/$/;"	m	struct:arch_global_data	typeref:struct:memory_info
meminfo	arch/xtensa/include/asm/bootparam.h	/^struct meminfo {$/;"	s
memmove	arch/powerpc/lib/ppcstring.S	/^memmove:$/;"	l
memmove	arch/x86/lib/string.c	/^void *memmove(void *dest, const void *src, size_t n)$/;"	f	typeref:typename:void *
memmove	lib/string.c	/^void * memmove(void * dest,const void *src,size_t count)$/;"	f	typeref:typename:void *
memmove_wd	common/bootm.c	/^void memmove_wd(void *to, void *from, size_t len, ulong chunksz)$/;"	f	typeref:typename:void
memmove_wd	common/image.c	/^void memmove_wd(void *to, void *from, size_t len, ulong chunksz)$/;"	f	typeref:typename:void
memory	doc/README.x86	/^memory controller, chipset and certain bus interfaces.$/;"	l
memory	drivers/usb/gadget/dwc2_udc_otg.c	/^static struct dwc2_udc memory = {$/;"	v	typeref:struct:dwc2_udc	file:
memory	drivers/usb/gadget/pxa25x_udc.c	/^static struct pxa25x_udc memory = {$/;"	v	typeref:struct:pxa25x_udc	file:
memory	drivers/usb/gadget/pxa25x_udc.c	/^static struct pxa25x_udc memory;$/;"	v	typeref:struct:pxa25x_udc	file:
memory	include/lmb.h	/^	struct lmb_region memory;$/;"	m	struct:lmb	typeref:struct:lmb_region
memory_area	arch/x86/include/asm/global_data.h	/^struct memory_area {$/;"	s
memory_bank	arch/arm/mach-kirkwood/include/mach/cpu.h	/^enum memory_bank {$/;"	g
memory_bank	arch/arm/mach-mvebu/include/mach/cpu.h	/^enum memory_bank {$/;"	g
memory_bank	arch/arm/mach-orion5x/include/mach/cpu.h	/^enum memory_bank {$/;"	g
memory_bank	arch/arm/mach-uniphier/micro-support-card.c	/^struct memory_bank {$/;"	s	file:
memory_banks	arch/arm/mach-uniphier/micro-support-card.c	/^static const struct memory_bank memory_banks[] = {$/;"	v	typeref:typename:const struct memory_bank[]	file:
memory_config	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^struct memory_config {$/;"	s
memory_config	board/cm5200/cm5200.h	/^static mem_conf_t* memory_config[] = {$/;"	v	typeref:typename:mem_conf_t * []
memory_ctrl_init	arch/sparc/cpu/leon3/start.S	/^memory_ctrl_init:$/;"	l
memory_ctrl_init_failed	arch/sparc/cpu/leon3/start.S	/^memory_ctrl_init_failed:$/;"	l
memory_down_data	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^struct memory_down_data {$/;"	s
memory_freq	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	enum hws_ddr_freq memory_freq;$/;"	m	struct:if_params	typeref:enum:hws_ddr_freq
memory_info	arch/x86/include/asm/global_data.h	/^struct memory_info {$/;"	s
memory_init	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void memory_init(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
memory_init	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void memory_init(struct rk3288_ddr_publ *publ,$/;"	f	typeref:typename:void	file:
memory_map	arch/blackfin/cpu/traps.c	/^struct memory_map {$/;"	s	file:
memory_map	include/spi.h	/^	void *memory_map;$/;"	m	struct:spi_slave	typeref:typename:void *
memory_map	include/spi_flash.h	/^	void *memory_map;$/;"	m	struct:spi_flash	typeref:typename:void *
memory_model	include/vbe.h	/^	u8 memory_model;	\/* 21 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
memory_params	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	struct memory_down_data memory_params;	\/* Offset 0x00f0 *\/$/;"	m	struct:upd_region	typeref:struct:memory_down_data
memory_post_addrline	post/drivers/memory.c	/^static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)$/;"	f	typeref:typename:int	file:
memory_post_dataline	post/drivers/memory.c	/^static int memory_post_dataline(unsigned long long * pmem)$/;"	f	typeref:typename:int	file:
memory_post_test	board/bf537-stamp/post-memory.c	/^int memory_post_test(int flags)$/;"	f	typeref:typename:int
memory_post_test	post/drivers/memory.c	/^int memory_post_test(int flags)$/;"	f	typeref:typename:int
memory_post_test1	post/drivers/memory.c	/^static int memory_post_test1(unsigned long start,$/;"	f	typeref:typename:int	file:
memory_post_test2	post/drivers/memory.c	/^static int memory_post_test2(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_post_test3	post/drivers/memory.c	/^static int memory_post_test3(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_post_test4	post/drivers/memory.c	/^static int memory_post_test4(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_post_test_lines	post/drivers/memory.c	/^static int memory_post_test_lines(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_post_test_patterns	post/drivers/memory.c	/^static int memory_post_test_patterns(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_post_test_regions	post/drivers/memory.c	/^static int memory_post_test_regions(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_post_tests	post/drivers/memory.c	/^static int memory_post_tests(unsigned long start, unsigned long size)$/;"	f	typeref:typename:int	file:
memory_regions_post_test	post/drivers/memory.c	/^int memory_regions_post_test(int flags)$/;"	f	typeref:typename:int
memory_size	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	enum hws_mem_size memory_size;$/;"	m	struct:if_params	typeref:enum:hws_mem_size
memory_test	arch/x86/cpu/quark/smc.c	/^void memory_test(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
memory_type	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	enum memory_type memory_type;$/;"	m	struct:sdram_params	typeref:enum:memory_type
memory_type	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^enum memory_type {$/;"	g
memory_type	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 memory_type:3;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:3	file:
memory_type	drivers/ddr/marvell/axp/ddr3_spd.c	/^enum memory_type {$/;"	g	file:
memp	arch/arm/lib/semihosting.c	/^		void *memp;$/;"	m	struct:smh_read::smh_read_s	typeref:typename:void *	file:
memrange	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	struct memrange {$/;"	s	struct:sysinfo_t
memrange	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	} memrange[SYSINFO_MAX_MEM_RANGES];$/;"	m	struct:sysinfo_t	typeref:struct:sysinfo_t::memrange[]
memscan	lib/string.c	/^void * memscan(void * addr, int c, size_t size)$/;"	f	typeref:typename:void *
memset	arch/arc/lib/memset.S	/^memset:$/;"	l
memset	arch/avr32/lib/memset.S	/^memset:$/;"	l
memset	arch/nds32/include/asm/string.h	/^#define memset(/;"	d
memset	arch/powerpc/lib/ppcstring.S	/^memset:$/;"	l
memset	arch/x86/lib/string.c	/^void *memset(void *dstpp, int c, size_t len)$/;"	f	typeref:typename:void *
memset	lib/efi/efi_stub.c	/^void *memset(void *inptr, int ch, size_t size)$/;"	f	typeref:typename:void *
memset	lib/string.c	/^void * memset(void * s,int c,size_t count)$/;"	f	typeref:typename:void *
memset_io	arch/arm/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/blackfin/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/microblaze/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/nds32/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/nios2/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/openrisc/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/powerpc/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/sh/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/x86/include/asm/io.h	/^#define memset_io(/;"	d
memset_io	arch/xtensa/include/asm/io.h	/^#define memset_io(/;"	d
memsetl	arch/powerpc/cpu/mpc8xx/video.c	/^static void memsetl (int *p, int c, int v)$/;"	f	typeref:typename:void	file:
memsetl	drivers/video/cfb_console.c	/^static void memsetl(int *p, int c, int v)$/;"	f	typeref:typename:void	file:
memsize_format	cmd/mtdparts.c	/^static void memsize_format(char *buf, u64 size)$/;"	f	typeref:typename:void	file:
memsize_parse	cmd/mtdparts.c	/^static u64 memsize_parse (const char *const ptr, const char **retptr)$/;"	f	typeref:typename:u64	file:
memstr	cmd/setexpr.c	/^static char *memstr(const char *s1, int l1, const char *s2, int l2)$/;"	f	typeref:typename:char *	file:
memswitch	drivers/spi/ti_qspi.c	/^	u32 memswitch;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
memwidth	drivers/ddr/microchip/ddr2_regs.h	/^	u32 memwidth;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
memzero	arch/arc/lib/memset.S	/^memzero:$/;"	l
memzero	arch/arm/mach-exynos/spl_boot.c	/^void memzero(void *s, size_t n)$/;"	f	typeref:typename:void
memzero	arch/nds32/include/asm/string.h	/^#define memzero(/;"	d
menu	cmd/bootmenu.c	/^	struct bootmenu_data *menu;	\/* this bootmenu *\/$/;"	m	struct:bootmenu_entry	typeref:struct:bootmenu_data *	file:
menu	cmd/pxe.c	/^	char *menu;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
menu	common/menu.c	/^struct menu {$/;"	s	file:
menu	scripts/kconfig/expr.h	/^	struct menu *menu;         \/* the menu the property are associated with$/;"	m	struct:property	typeref:struct:menu *
menu	scripts/kconfig/expr.h	/^struct menu {$/;"	s
menu	scripts/kconfig/qconf.h	/^	struct menu *menu;$/;"	m	class:ConfigItem	typeref:struct:menu *
menu	scripts/kconfig/zconf.tab.c	/^	struct menu *menu;$/;"	m	union:YYSTYPE	typeref:struct:menu *	file:
menu	scripts/kconfig/zconf.y	/^menu: T_MENU prompt T_EOL$/;"	l
menuBackPix	scripts/kconfig/qconf.h	/^	QPixmap menuPix, menuInvPix, menuBackPix, voidPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
menuInfo	scripts/kconfig/qconf.cc	/^void ConfigInfoView::menuInfo(void)$/;"	f	class:ConfigInfoView	typeref:typename:void
menuInvPix	scripts/kconfig/qconf.h	/^	QPixmap menuPix, menuInvPix, menuBackPix, voidPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
menuList	scripts/kconfig/qconf.h	/^	ConfigList *menuList;$/;"	m	class:ConfigMainWindow	typeref:typename:ConfigList *
menuMode	scripts/kconfig/qconf.h	/^	singleMode, menuMode, symbolMode, fullMode, listMode$/;"	e	enum:listMode
menuPix	scripts/kconfig/qconf.h	/^	QPixmap menuPix, menuInvPix, menuBackPix, voidPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
menuSkip	scripts/kconfig/qconf.cc	/^bool ConfigList::menuSkip(struct menu *menu)$/;"	f	class:ConfigList	typeref:typename:bool
menuView	scripts/kconfig/qconf.h	/^	ConfigView *menuView;$/;"	m	class:ConfigMainWindow	typeref:typename:ConfigView *
menu__xgettext	scripts/kconfig/kxgettext.c	/^static void menu__xgettext(void)$/;"	f	typeref:typename:void	file:
menu_add_dep	scripts/kconfig/menu.c	/^void menu_add_dep(struct expr *dep)$/;"	f	typeref:typename:void
menu_add_entry	scripts/kconfig/menu.c	/^void menu_add_entry(struct symbol *sym)$/;"	f	typeref:typename:void
menu_add_expr	scripts/kconfig/menu.c	/^void menu_add_expr(enum prop_type type, struct expr *expr, struct expr *dep)$/;"	f	typeref:typename:void
menu_add_menu	scripts/kconfig/menu.c	/^struct menu *menu_add_menu(void)$/;"	f	typeref:struct:menu *
menu_add_option	scripts/kconfig/menu.c	/^void menu_add_option(int token, char *arg)$/;"	f	typeref:typename:void
menu_add_prompt	scripts/kconfig/menu.c	/^struct property *menu_add_prompt(enum prop_type type, char *prompt, struct expr *dep)$/;"	f	typeref:struct:property *
menu_add_prop	scripts/kconfig/menu.c	/^static struct property *menu_add_prop(enum prop_type type, char *prompt, struct expr *expr, stru/;"	f	typeref:struct:property *	file:
menu_add_symbol	scripts/kconfig/menu.c	/^void menu_add_symbol(enum prop_type type, struct symbol *sym, struct expr *dep)$/;"	f	typeref:typename:void
menu_add_visibility	scripts/kconfig/menu.c	/^void menu_add_visibility(struct expr *expr)$/;"	f	typeref:typename:void
menu_after_mrc	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t menu_after_mrc;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
menu_backtitle	scripts/kconfig/nconf.c	/^static char menu_backtitle[PATH_MAX+128];$/;"	v	typeref:typename:char[]	file:
menu_block	scripts/kconfig/zconf.y	/^menu_block:$/;"	l
menu_build_message_list	scripts/kconfig/kxgettext.c	/^static void menu_build_message_list(struct menu *menu)$/;"	f	typeref:typename:void	file:
menu_check_dep	scripts/kconfig/menu.c	/^static struct expr *menu_check_dep(struct expr *e)$/;"	f	typeref:struct:expr *	file:
menu_create	common/menu.c	/^struct menu *menu_create(char *title, int timeout, int prompt,$/;"	f	typeref:struct:menu *
menu_default_choice	common/menu.c	/^int menu_default_choice(struct menu *m, void **choice)$/;"	f	typeref:typename:int
menu_default_set	common/menu.c	/^int menu_default_set(struct menu *m, char *item_key)$/;"	f	typeref:typename:int
menu_destroy	common/menu.c	/^int menu_destroy(struct menu *m)$/;"	f	typeref:typename:int
menu_display	common/menu.c	/^static inline void menu_display(struct menu *m)$/;"	f	typeref:typename:void	file:
menu_display_statusline	cmd/bootmenu.c	/^void menu_display_statusline(struct menu *m)$/;"	f	typeref:typename:void
menu_display_statusline	common/menu.c	/^__weak void menu_display_statusline(struct menu *m)$/;"	f	typeref:typename:__weak void
menu_end	scripts/kconfig/zconf.y	/^menu_end: end$/;"	l
menu_end_entry	scripts/kconfig/menu.c	/^void menu_end_entry(void)$/;"	f	typeref:typename:void
menu_end_menu	scripts/kconfig/menu.c	/^void menu_end_menu(void)$/;"	f	typeref:typename:void
menu_entry	scripts/kconfig/zconf.y	/^menu_entry: menu visibility_list depends_list$/;"	l	typeref:typename:menu
menu_finalize	scripts/kconfig/menu.c	/^void menu_finalize(struct menu *parent)$/;"	f	typeref:typename:void
menu_get_choice	common/menu.c	/^int menu_get_choice(struct menu *m, void **choice)$/;"	f	typeref:typename:int
menu_get_ext_help	scripts/kconfig/menu.c	/^void menu_get_ext_help(struct menu *menu, struct gstr *help)$/;"	f	typeref:typename:void
menu_get_help	scripts/kconfig/menu.c	/^const char *menu_get_help(struct menu *menu)$/;"	f	typeref:typename:const char *
menu_get_parent_menu	scripts/kconfig/menu.c	/^struct menu *menu_get_parent_menu(struct menu *menu)$/;"	f	typeref:struct:menu *
menu_get_prompt	scripts/kconfig/menu.c	/^const char *menu_get_prompt(struct menu *menu)$/;"	f	typeref:typename:const char *
menu_get_root_menu	scripts/kconfig/menu.c	/^struct menu *menu_get_root_menu(struct menu *menu)$/;"	f	typeref:struct:menu *
menu_has_help	scripts/kconfig/menu.c	/^bool menu_has_help(struct menu *menu)$/;"	f	typeref:typename:bool
menu_has_prompt	scripts/kconfig/menu.c	/^bool menu_has_prompt(struct menu *menu)$/;"	f	typeref:typename:bool
menu_instructions	scripts/kconfig/mconf.c	/^menu_instructions[] = N_($/;"	v	typeref:typename:const char[]	file:
menu_instructions	scripts/kconfig/nconf.c	/^menu_instructions[] = N_($/;"	v	typeref:typename:const char[]	file:
menu_interactive_choice	common/menu.c	/^static inline int menu_interactive_choice(struct menu *m, void **choice)$/;"	f	typeref:typename:int	file:
menu_is_empty	scripts/kconfig/menu.c	/^bool menu_is_empty(struct menu *menu)$/;"	f	typeref:typename:bool
menu_is_visible	scripts/kconfig/menu.c	/^bool menu_is_visible(struct menu *menu)$/;"	f	typeref:typename:bool
menu_item	common/menu.c	/^struct menu_item {$/;"	s	file:
menu_item_add	common/menu.c	/^int menu_item_add(struct menu *m, char *item_key, void *item_data)$/;"	f	typeref:typename:int
menu_item_by_key	common/menu.c	/^static inline struct menu_item *menu_item_by_key(struct menu *m,$/;"	f	typeref:struct:menu_item *	file:
menu_item_destroy	common/menu.c	/^static inline void *menu_item_destroy(struct menu *m,$/;"	f	typeref:typename:void *	file:
menu_item_key_match	common/menu.c	/^static inline void *menu_item_key_match(struct menu *m,$/;"	f	typeref:typename:void *	file:
menu_item_print	common/menu.c	/^static inline void *menu_item_print(struct menu *m,$/;"	f	typeref:typename:void *	file:
menu_items_iter	common/menu.c	/^static inline void *menu_items_iter(struct menu *m,$/;"	f	typeref:typename:void *	file:
menu_no_f_instructions	scripts/kconfig/nconf.c	/^menu_no_f_instructions[] = N_($/;"	v	typeref:typename:const char[]	file:
menu_set_type	scripts/kconfig/menu.c	/^void menu_set_type(int type)$/;"	f	typeref:typename:void
menu_show	cmd/bootmenu.c	/^int menu_show(int bootdelay)$/;"	f	typeref:typename:int
menu_stmt	scripts/kconfig/zconf.y	/^menu_stmt: menu_entry menu_block menu_end$/;"	l
menu_validate_number	scripts/kconfig/menu.c	/^static int menu_validate_number(struct symbol *sym, struct symbol *sym2)$/;"	f	typeref:typename:int	file:
menu_warn	scripts/kconfig/menu.c	/^void menu_warn(struct menu *menu, const char *fmt, ...)$/;"	f	typeref:typename:void
menu_width	scripts/kconfig/lxdialog/menubox.c	/^static int menu_width, item_x;$/;"	v	typeref:typename:int	file:
menubar1	scripts/kconfig/gconf.glade	/^	<widget class="GtkMenuBar" id="menubar1">$/;"	i
menubox	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color menubox;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
menubox_border	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color menubox_border;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
menubytes	drivers/spi/ich.h	/^	int menubytes;$/;"	m	struct:ich_spi_priv	typeref:typename:int
menuconfig	scripts/kconfig/Makefile	/^menuconfig: $(obj)\/mconf$/;"	t
menuconfig_entry_start	scripts/kconfig/zconf.y	/^menuconfig_entry_start: T_MENUCONFIG T_WORD T_EOL$/;"	l
menuconfig_stmt	scripts/kconfig/zconf.y	/^menuconfig_stmt: menuconfig_entry_start config_option_list$/;"	l
menukey	common/autoboot.c	/^static int menukey;$/;"	v	typeref:typename:int	file:
mer	arch/microblaze/include/asm/microblaze_intc.h	/^	int mer; \/* master enable register *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
mer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mer;		\/* Message Enable *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
mer	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mer;		\/* 0x41500 - Message Enable Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
merge	lib/list_sort.c	/^static struct list_head *merge(void *priv,$/;"	f	typeref:struct:list_head *	file:
merge_and_restore_back_links	lib/list_sort.c	/^static void merge_and_restore_back_links(void *priv,$/;"	f	typeref:typename:void	file:
merge_by_realname	scripts/get_maintainer.pl	/^sub merge_by_realname {$/;"	s
merge_email	scripts/get_maintainer.pl	/^sub merge_email {$/;"	s
merl	include/linux/immap_qe.h	/^	u32 merl;		\/* MCC emergency request level register *\/$/;"	m	struct:mcc	typeref:typename:u32
merrcr0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	merrcr0;	\/* 0x050 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
merrcr1	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	merrcr1;	\/* 0x054 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
merrpr0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	merrpr0;	\/* 0x040 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
merrpr1	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	merrpr1;	\/* 0x044 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
mesage__find	scripts/kconfig/kxgettext.c	/^static struct message *mesage__find(const char *msg)$/;"	f	typeref:struct:message *	file:
meson_gxbb_aobus_functions	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static struct meson_pmx_func meson_gxbb_aobus_functions[] = {$/;"	v	typeref:struct:meson_pmx_func[]	file:
meson_gxbb_aobus_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static struct meson_pmx_group meson_gxbb_aobus_groups[] = {$/;"	v	typeref:struct:meson_pmx_group[]	file:
meson_gxbb_aobus_pinctrl_data	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {$/;"	v	typeref:struct:meson_pinctrl_data
meson_gxbb_periphs_functions	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static struct meson_pmx_func meson_gxbb_periphs_functions[] = {$/;"	v	typeref:struct:meson_pmx_func[]	file:
meson_gxbb_periphs_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static struct meson_pmx_group meson_gxbb_periphs_groups[] = {$/;"	v	typeref:struct:meson_pmx_group[]	file:
meson_gxbb_periphs_pinctrl_data	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {$/;"	v	typeref:struct:meson_pinctrl_data
meson_gxbb_pinctrl_match	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const struct udevice_id meson_gxbb_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
meson_init_shmem	arch/arm/mach-meson/sm.c	/^static void meson_init_shmem(void)$/;"	f	typeref:typename:void	file:
meson_pinctrl	drivers/pinctrl/meson/pinctrl-meson.h	/^struct meson_pinctrl {$/;"	s
meson_pinctrl_data	drivers/pinctrl/meson/pinctrl-meson.h	/^struct meson_pinctrl_data {$/;"	s
meson_pinctrl_dummy_name	drivers/pinctrl/meson/pinctrl-meson.c	/^static const char *meson_pinctrl_dummy_name = "_dummy";$/;"	v	typeref:typename:const char *	file:
meson_pinctrl_get_group_name	drivers/pinctrl/meson/pinctrl-meson.c	/^static const char *meson_pinctrl_get_group_name(struct udevice *dev,$/;"	f	typeref:typename:const char *	file:
meson_pinctrl_get_groups_count	drivers/pinctrl/meson/pinctrl-meson.c	/^static int meson_pinctrl_get_groups_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
meson_pinctrl_ops	drivers/pinctrl/meson/pinctrl-meson.c	/^const struct pinctrl_ops meson_pinctrl_ops = {$/;"	v	typeref:typename:const struct pinctrl_ops
meson_pinctrl_probe	drivers/pinctrl/meson/pinctrl-meson.c	/^int meson_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int
meson_pinmux_disable_other_groups	drivers/pinctrl/meson/pinctrl-meson.c	/^static void meson_pinmux_disable_other_groups(struct meson_pinctrl *priv,$/;"	f	typeref:typename:void	file:
meson_pinmux_get_function_name	drivers/pinctrl/meson/pinctrl-meson.c	/^static const char *meson_pinmux_get_function_name(struct udevice *dev,$/;"	f	typeref:typename:const char *	file:
meson_pinmux_get_functions_count	drivers/pinctrl/meson/pinctrl-meson.c	/^static int meson_pinmux_get_functions_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
meson_pinmux_group_set	drivers/pinctrl/meson/pinctrl-meson.c	/^static int meson_pinmux_group_set(struct udevice *dev,$/;"	f	typeref:typename:int	file:
meson_pmx_func	drivers/pinctrl/meson/pinctrl-meson.h	/^struct meson_pmx_func {$/;"	s
meson_pmx_group	drivers/pinctrl/meson/pinctrl-meson.h	/^struct meson_pmx_group {$/;"	s
meson_serial_getc	drivers/serial/serial_meson.c	/^static int meson_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
meson_serial_ids	drivers/serial/serial_meson.c	/^static const struct udevice_id meson_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
meson_serial_init	drivers/serial/serial_meson.c	/^static void meson_serial_init(struct meson_uart *uart)$/;"	f	typeref:typename:void	file:
meson_serial_ofdata_to_platdata	drivers/serial/serial_meson.c	/^static int meson_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
meson_serial_ops	drivers/serial/serial_meson.c	/^static const struct dm_serial_ops meson_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
meson_serial_pending	drivers/serial/serial_meson.c	/^static int meson_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
meson_serial_platdata	drivers/serial/serial_meson.c	/^struct meson_serial_platdata {$/;"	s	file:
meson_serial_probe	drivers/serial/serial_meson.c	/^static int meson_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
meson_serial_putc	drivers/serial/serial_meson.c	/^static int meson_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
meson_sm_read_efuse	arch/arm/mach-meson/sm.c	/^ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size)$/;"	f	typeref:typename:ssize_t
meson_uart	drivers/serial/serial_meson.c	/^struct meson_uart {$/;"	s	file:
mesr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 mesr;	\/* 0x15c: Master Error Status Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32
message	scripts/kconfig/kxgettext.c	/^struct message {$/;"	s	file:
message__add	scripts/kconfig/kxgettext.c	/^static int message__add(const char *msg, char *option, const char *file,$/;"	f	typeref:typename:int	file:
message__add_file_line	scripts/kconfig/kxgettext.c	/^static int message__add_file_line(struct message *self, const char *file,$/;"	f	typeref:typename:int	file:
message__list	scripts/kconfig/kxgettext.c	/^static struct message *message__list;$/;"	v	typeref:struct:message *	file:
message__new	scripts/kconfig/kxgettext.c	/^static struct message *message__new(const char *msg, char *option,$/;"	f	typeref:struct:message *	file:
message__print_file_lineno	scripts/kconfig/kxgettext.c	/^static void message__print_file_lineno(struct message *self)$/;"	f	typeref:typename:void	file:
message__print_gettext_msgid_msgstr	scripts/kconfig/kxgettext.c	/^static void message__print_gettext_msgid_msgstr(struct message *self)$/;"	f	typeref:typename:void	file:
meta_chars	lib/slre.c	/^static const char *meta_chars = "|.^$*+?()[\\\\";$/;"	v	typeref:typename:const char *	file:
metadata_bytes	tools/mxsboot.c	/^	uint32_t		metadata_bytes;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
metadata_bytes_sdk	tools/mxsboot.c	/^	uint32_t		metadata_bytes_sdk;		\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
metaonly	drivers/mtd/ubi/ubi.h	/^	int metaonly;$/;"	m	struct:ubi_volume	typeref:typename:int
method	lib/zlib/deflate.h	/^    Byte  method;        \/* STORED (for zip only) or DEFLATED *\/$/;"	m	struct:internal_state	typeref:typename:Byte
mezz_irq	board/gateworks/gw_ventana/common.h	/^	int mezz_irq;$/;"	m	struct:ventana	typeref:typename:int
mezz_pwren	board/gateworks/gw_ventana/common.h	/^	int mezz_pwren;$/;"	m	struct:ventana	typeref:typename:int
mf	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	u32     mf;$/;"	m	struct:pipe3_dpll_params	typeref:typename:u32
mf	drivers/usb/dwc3/ti_usb_phy.c	/^	u32	mf;$/;"	m	struct:usb3_dpll_params	typeref:typename:u32	file:
mf	drivers/usb/phy/omap_usb_phy.c	/^	u32	mf;$/;"	m	struct:usb3_dpll_params	typeref:typename:u32	file:
mf	include/usb.h	/^	char	mf[32];			\/* manufacturer *\/$/;"	m	struct:usb_device	typeref:typename:char[32]
mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mfc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mfc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mfc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mfc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mfc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mfck1cr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mfck1cr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mfck2cr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mfck2cr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mfcpr	arch/powerpc/include/asm/ppc4xx.h	/^#define mfcpr(/;"	d
mfd	arch/arm/cpu/armv7/mx5/clock.c	/^	u32 mfd;$/;"	m	struct:fixed_pll_mfd	typeref:typename:u32	file:
mfd	arch/arm/cpu/armv7/mx5/clock.c	/^	u32 mfd;$/;"	m	struct:pll_param	typeref:typename:u32	file:
mfd	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 mfd;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
mfdcr	arch/powerpc/include/asm/processor.h	/^#define mfdcr(/;"	d
mfdcr_any	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^u32 mfdcr_any(u32 dcr)$/;"	f	typeref:typename:u32
mfdr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 mfdr;		\/* I2Cn + 0x04 *\/$/;"	m	struct:i2c512x_dev	typeref:typename:volatile u32
mfdr	include/mpc5xxx.h	/^	volatile u32 mfdr;		\/* I2Cn + 0x04 *\/$/;"	m	struct:mpc5xxx_i2c	typeref:typename:volatile u32
mfebc	arch/powerpc/include/asm/ppc4xx.h	/^#define mfebc(/;"	d
mfence	arch/x86/include/asm/cpu.h	/^static inline void mfence(void)$/;"	f	typeref:typename:void
mfg_mode	arch/x86/include/asm/me_common.h	/^	u32 mfg_mode:1;$/;"	m	struct:me_hfs	typeref:typename:u32:1
mfgdata	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^struct mfgdata {$/;"	s	file:
mfgdate	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 mfgdate[4];       \/* 0x20: MFG date (read only) *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[4]
mfhi0	arch/mips/include/asm/mipsregs.h	/^#define mfhi0(/;"	d
mfhi1	arch/mips/include/asm/mipsregs.h	/^#define mfhi1(/;"	d
mfhi2	arch/mips/include/asm/mipsregs.h	/^#define mfhi2(/;"	d
mfhi3	arch/mips/include/asm/mipsregs.h	/^#define mfhi3(/;"	d
mfi	arch/arm/cpu/armv7/mx5/clock.c	/^	u32 mfi;$/;"	m	struct:pll_param	typeref:typename:u32	file:
mflo0	arch/mips/include/asm/mipsregs.h	/^#define mflo0(/;"	d
mflo1	arch/mips/include/asm/mipsregs.h	/^#define mflo1(/;"	d
mflo2	arch/mips/include/asm/mipsregs.h	/^#define mflo2(/;"	d
mflo3	arch/mips/include/asm/mipsregs.h	/^#define mflo3(/;"	d
mflr	drivers/qe/uec.h	/^	u16  mflr;                \/* max frame length reg. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
mflr	include/commproc.h	/^	ushort	mflr;		\/* maximum frame length reg *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
mfmsr	arch/powerpc/include/asm/processor.h	/^#define mfmsr(/;"	d
mfn	arch/arm/cpu/armv7/mx5/clock.c	/^	u32 mfn;$/;"	m	struct:pll_param	typeref:typename:u32	file:
mfn	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 mfn;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
mfn_minus	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 mfn_minus;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
mfn_plus	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 mfn_plus;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
mfn_togc	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 mfn_togc;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
mfp_config	drivers/gpio/mvmfp.c	/^void mfp_config(u32 *mfp_cfgs)$/;"	f	typeref:typename:void
mfpsr0	include/andestech/andes_pcu.h	/^	unsigned int	mfpsr0;		\/* 0x30 - Multi-Func Port Setting 0 *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
mfpsr1	include/andestech/andes_pcu.h	/^	unsigned int	mfpsr1;		\/* 0x34 - Multi-Func Port Setting 1 *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
mfr	include/linux/mtd/doc2000.h	/^	unsigned long mfr; \/* Flash IDs - only one type of flash per device *\/$/;"	m	struct:DiskOnChip	typeref:typename:unsigned long
mfr_id	drivers/mtd/jedec_flash.c	/^	const __u16 mfr_id;$/;"	m	struct:amd_flash_info	typeref:typename:const __u16	file:
mfr_id	include/linux/mtd/nand.h	/^			uint8_t mfr_id;$/;"	m	struct:nand_flash_dev::__anon4f3885c2020a::__anon4f3885c20308	typeref:typename:uint8_t
mfs_failure	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 mfs_failure:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
mfs_failure	arch/x86/include/asm/me_common.h	/^	u32 mfs_failure:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
mfsdr	arch/powerpc/include/asm/ppc4xx.h	/^#define mfsdr(/;"	d
mfsdram	arch/powerpc/include/asm/ppc4xx.h	/^#define mfsdram(/;"	d
mfsintegrity	arch/x86/include/asm/arch-broadwell/me.h	/^	u32		*mfsintegrity;$/;"	m	struct:me_bios_payload	typeref:typename:u32 *
mfsintegrity	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 mfsintegrity;$/;"	m	struct:me_bios_payload	typeref:typename:u32
mfspr	arch/openrisc/include/asm/system.h	/^static inline unsigned long mfspr(unsigned long add)$/;"	f	typeref:typename:unsigned long
mfspr	arch/powerpc/include/asm/processor.h	/^#define mfspr(/;"	d
mg_disk_get_dev	include/part.h	/^static inline struct blk_desc *mg_disk_get_dev(int dev) { return NULL; }$/;"	f	typeref:struct:blk_desc *
mgpcr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mgpcr0;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mgpcr0;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mgpcr1;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mgpcr1;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mgpcr2;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mgpcr2;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mgpcr3;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mgpcr3;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mgpcr4;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr4	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mgpcr4;$/;"	m	struct:max_regs	typeref:typename:u32
mgpcr5	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mgpcr5;$/;"	m	struct:max_regs	typeref:typename:u32
mgpdc	drivers/net/e1000.h	/^	uint64_t mgpdc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mgprc	drivers/net/e1000.h	/^	uint64_t mgprc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mgptc	drivers/net/e1000.h	/^	uint64_t mgptc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mgray_to_bin	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static int mgray_to_bin(u32 val)$/;"	f	typeref:typename:int	file:
mhporch	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	mhporch;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
mhst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 mhst;		\/* 0x0B0 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
mht	drivers/net/ftmac110.h	/^	uint32_t mht[2]; \/* 0x10: Multicast Hash Table Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t[2]
mib	arch/powerpc/include/asm/immap_512x.h	/^	u32	mib[128];	\/* MIB Block Counters *\/$/;"	m	struct:fec512x	typeref:typename:u32[128]
mib_control	arch/powerpc/include/asm/immap_512x.h	/^	u32	mib_control;	\/* MIB control\/status register *\/$/;"	m	struct:fec512x	typeref:typename:u32
mib_control	drivers/net/fec_mxc.h	/^	uint32_t mib_control;		\/* MBAR_ETH + 0x064 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
mib_control	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 mib_control;		\/* MBAR_ETH + 0x064 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
mib_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 mib_data;		\/* MBAR_ETH + 0x060 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
mibc	arch/m68k/include/asm/fec.h	/^	u32 mibc;		\/* 0x108 *\/$/;"	m	struct:fec	typeref:typename:u32
mibc	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 mibc;		\/* 0x064 *\/$/;"	m	struct:fecdma	typeref:typename:u32
mic_det	arch/arm/dts/rk3288-veyron.dtsi	/^		mic_det: mic-det {$/;"	l
mic_vcc	arch/arm/dts/rk3288-jerry.dts	/^		mic_vcc: LDO_REG2 {$/;"	l
microblaze_intc_t	arch/microblaze/include/asm/microblaze_intc.h	/^typedef volatile struct microblaze_intc_t {$/;"	s
microblaze_intc_t	arch/microblaze/include/asm/microblaze_intc.h	/^} microblaze_intc_t;$/;"	t	typeref:typename:volatile struct microblaze_intc_t
microblaze_reg_t	arch/microblaze/include/asm/ptrace.h	/^typedef unsigned long microblaze_reg_t;$/;"	t	typeref:typename:unsigned long
microblaze_timer_t	arch/microblaze/include/asm/microblaze_timer.h	/^typedef volatile struct microblaze_timer_t {$/;"	s
microblaze_timer_t	arch/microblaze/include/asm/microblaze_timer.h	/^} microblaze_timer_t;$/;"	t	typeref:typename:volatile struct microblaze_timer_t
microcode	include/fsl_qe.h	/^	} __attribute__ ((packed)) microcode[1];$/;"	m	struct:qe_firmware	typeref:struct:qe_firmware::qe_microcode[1]
microcode_decode_node	arch/x86/cpu/intel_common/microcode.c	/^static int microcode_decode_node(const void *blob, int node,$/;"	f	typeref:typename:int	file:
microcode_done	arch/x86/cpu/sipi_vector.S	/^microcode_done:$/;"	l
microcode_lock	arch/x86/cpu/sipi_vector.S	/^microcode_lock:$/;"	l
microcode_lock	arch/x86/include/asm/sipi.h	/^	u32 microcode_lock;$/;"	m	struct:sipi_params	typeref:typename:u32
microcode_pointer	arch/x86/include/asm/mp.h	/^	const void *microcode_pointer;$/;"	m	struct:mp_params	typeref:typename:const void *
microcode_ptr	arch/x86/cpu/sipi_vector.S	/^microcode_ptr:$/;"	l
microcode_ptr	arch/x86/include/asm/sipi.h	/^	u32 microcode_ptr;$/;"	m	struct:sipi_params	typeref:typename:u32
microcode_read_cpu	arch/x86/cpu/intel_common/microcode.c	/^static void microcode_read_cpu(struct microcode_update *cpu)$/;"	f	typeref:typename:void	file:
microcode_read_rev	arch/x86/cpu/intel_common/microcode.c	/^int microcode_read_rev(void)$/;"	f	typeref:typename:int
microcode_update	arch/x86/cpu/intel_common/microcode.c	/^struct microcode_update {$/;"	s	file:
microcode_update_intel	arch/x86/cpu/intel_common/microcode.c	/^int microcode_update_intel(void)$/;"	f	typeref:typename:int
microframe_index	drivers/usb/host/xhci.h	/^	__le32			microframe_index;$/;"	m	struct:xhci_run_regs	typeref:typename:__le32
micron_2gib_1600	board/bachmann/ot1200/ot1200_spl.c	/^static struct mx6_ddr3_cfg micron_2gib_1600 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
micron_2gib_1600_mmdc_calib	board/bachmann/ot1200/ot1200_spl.c	/^static struct mx6_mmdc_calibration micron_2gib_1600_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
micron_quad_enable	drivers/mtd/spi/spi_flash.c	/^static int micron_quad_enable(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
mid	include/ddr_spd.h	/^	unsigned char mid[8];      \/* 64 Mfr's JEDEC ID code per JEP-106 *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char[8]
mid	include/ddr_spd.h	/^	unsigned char mid[8];      \/* 64-71 Mfr's JEDEC ID code per JEP-106 *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[8]
mid	include/mmc.h	/^	unsigned char mid;$/;"	m	struct:mmc_cid	typeref:typename:unsigned char
mid	include/spd.h	/^	unsigned char mid[8];      \/* 64 Mfr's JEDEC ID code per JEP-108E *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[8]
midr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	midr0;		\/* Messaging IRQ Destination 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
midr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	midr0;		\/* 0x51610 - Messaging Interrupt Destination Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
midr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	midr1;		\/* Messaging IRQ Destination 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
midr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	midr1;		\/* 0x51630 - Messaging Interrupt Destination Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
midr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	midr2;		\/* Messaging IRQ Destination 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
midr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	midr2;		\/* 0x51650 - Messaging Interrupt Destination Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
midr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	midr3;		\/* Messaging IRQ Destination 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
midr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	midr3;		\/* 0x51670 - Messaging Interrupt Destination Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
mids	arch/sparc/cpu/leon2/prom.c	/^	int mids[32];$/;"	m	struct:leon_prom_info	typeref:typename:int[32]	file:
mids	arch/sparc/cpu/leon3/prom.c	/^	int mids[32];$/;"	m	struct:leon_prom_info	typeref:typename:int[32]	file:
mif3_mode	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 mif3_mode;	\/* Command prediction working mode *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
mifdcr_xilinx	drivers/net/xilinx_ll_temac_sdma.c	/^inline unsigned mifdcr_xilinx(const unsigned dcrn)$/;"	f	typeref:typename:unsigned
mifr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 mifr;$/;"	m	struct:i2c512x	typeref:typename:volatile u32
mii	drivers/net/dwc_eth_qos.c	/^	struct mii_dev *mii;$/;"	m	struct:eqos_priv	typeref:struct:mii_dev *	file:
mii	drivers/net/pic32_eth.h	/^	struct pic32_mii_regs mii;    \/* 0x280 - 0x2d0 *\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_mii_regs
mii1_col	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_col;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_col	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_col;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_crs	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_crs;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_crs	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_crs;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_pin_mux	board/silica/pengwyn/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux mii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii1_rxclk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxclk;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxclk;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxd0;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxd0;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxd1;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxd1;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxd2;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxd2;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxd3;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxd3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxd3;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxdv	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxdv;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxdv	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxdv;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxerr	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_rxerr;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_rxerr	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_rxerr;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txclk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_txclk;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_txclk;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_txd0;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_txd0;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_txd1;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_txd1;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_txd2;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_txd2;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_txd3;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txd3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_txd3;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txen	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mii1_txen;$/;"	m	struct:pad_signals	typeref:typename:int
mii1_txen	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mii1_txen;$/;"	m	struct:pad_signals	typeref:typename:int
mii2_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux mii2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii_clear_phy_interrupt	drivers/qe/uec_phy.c	/^void mii_clear_phy_interrupt (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:void
mii_configure_phy_interrupt	drivers/qe/uec_phy.c	/^void mii_configure_phy_interrupt (struct uec_mii_info *mii_info,$/;"	f	typeref:typename:void
mii_data	arch/powerpc/include/asm/immap_512x.h	/^	u32	mii_data;	\/* MII data register *\/$/;"	m	struct:fec512x	typeref:typename:u32
mii_data	drivers/net/fec_mxc.h	/^	uint32_t mii_data;		\/* MBAR_ETH + 0x040 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
mii_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 mii_data;		\/* MBAR_ETH + 0x040 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
mii_delay	board/gdsys/405ep/iocon.c	/^static int mii_delay(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_delay	board/gdsys/mpc8308/hrcon.c	/^static int mii_delay(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_delay	board/gdsys/mpc8308/strider.c	/^static int mii_delay(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_dev	include/phy.h	/^struct mii_dev {$/;"	s
mii_dev_for_muxval	board/freescale/corenet_ds/eth_p4080.c	/^struct mii_dev *mii_dev_for_muxval(u32 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/ls1043aqds/eth.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/ls1046aqds/eth.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/ls2080aqds/eth.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/t102xqds/eth_t102xqds.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/t1040qds/eth.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/t208xqds/eth_t208xqds.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_dev_for_muxval	board/freescale/t4qds/eth.c	/^struct mii_dev *mii_dev_for_muxval(u8 muxval)$/;"	f	typeref:struct:mii_dev *
mii_devname	include/tsec.h	/^	char *mii_devname;$/;"	m	struct:tsec_info_struct	typeref:typename:char *
mii_devname	include/tsec.h	/^	char mii_devname[16];$/;"	m	struct:tsec_private	typeref:typename:char[16]
mii_devs	common/miiphyutil.c	/^static struct list_head mii_devs;$/;"	v	typeref:struct:list_head	file:
mii_discover_phy	arch/powerpc/cpu/mpc8xx/fec.c	/^static int mii_discover_phy(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mii_discover_phy	drivers/net/mcfmii.c	/^int mii_discover_phy(struct eth_device *dev)$/;"	f	typeref:typename:int
mii_dummy_init	board/gdsys/405ep/iocon.c	/^static int mii_dummy_init(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_dummy_init	board/gdsys/mpc8308/hrcon.c	/^static int mii_dummy_init(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_dummy_init	board/gdsys/mpc8308/strider.c	/^static int mii_dummy_init(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_duplex	include/linux/mii.h	/^static inline unsigned int mii_duplex (unsigned int duplex_lock,$/;"	f	typeref:typename:unsigned int
mii_get_mdio	board/gdsys/405ep/iocon.c	/^static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)$/;"	f	typeref:typename:int	file:
mii_get_mdio	board/gdsys/mpc8308/hrcon.c	/^static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)$/;"	f	typeref:typename:int	file:
mii_get_mdio	board/gdsys/mpc8308/strider.c	/^static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)$/;"	f	typeref:typename:int	file:
mii_id	drivers/qe/uec_phy.h	/^	int mii_id;$/;"	m	struct:uec_mii_info	typeref:typename:int
mii_info	drivers/qe/uec.h	/^	struct uec_mii_info		*mii_info;$/;"	m	struct:uec_private	typeref:struct:uec_mii_info *
mii_init	arch/powerpc/cpu/mpc8xx/fec.c	/^void mii_init (void)$/;"	f	typeref:typename:void
mii_mdio_active	board/gdsys/405ep/iocon.c	/^static int mii_mdio_active(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_mdio_active	board/gdsys/mpc8308/hrcon.c	/^static int mii_mdio_active(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_mdio_active	board/gdsys/mpc8308/strider.c	/^static int mii_mdio_active(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_mdio_tristate	board/gdsys/405ep/iocon.c	/^static int mii_mdio_tristate(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_mdio_tristate	board/gdsys/mpc8308/hrcon.c	/^static int mii_mdio_tristate(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_mdio_tristate	board/gdsys/mpc8308/strider.c	/^static int mii_mdio_tristate(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
mii_mng	include/vsc9953.h	/^	struct vsc9953_mii_mng	mii_mng[2];$/;"	m	struct:vsc9953_devcpu_gcb	typeref:struct:vsc9953_mii_mng[2]
mii_nway_restart	drivers/usb/eth/asix.c	/^static int mii_nway_restart(struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
mii_nway_restart	drivers/usb/eth/smsc95xx.c	/^static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)$/;"	f	typeref:typename:int	file:
mii_nway_result	include/linux/mii.h	/^static inline unsigned int mii_nway_result (unsigned int negotiated)$/;"	f	typeref:typename:unsigned int
mii_phy_addr	arch/avr32/include/asm/setup.h	/^	u8	mii_phy_addr;$/;"	m	struct:tag_ethernet	typeref:typename:u8
mii_phy_tx_clk	arch/arm/dts/sun6i-a31.dtsi	/^		mii_phy_tx_clk: clk@1 {$/;"	l
mii_phy_tx_clk	arch/arm/dts/sun7i-a20.dtsi	/^		mii_phy_tx_clk: clk@2 {$/;"	l
mii_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux mii_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mii_postcall	drivers/net/fec_mxc.h	/^	int (*mii_postcall)(int);$/;"	m	struct:fec_priv	typeref:typename:int (*)(int)
mii_read_scan	include/vsc9953.h	/^	struct vsc9953_mii_read_scan	mii_read_scan;$/;"	m	struct:vsc9953_devcpu_gcb	typeref:struct:vsc9953_mii_read_scan
mii_reg_bits	drivers/net/ns8382x.c	/^enum mii_reg_bits {$/;"	g	file:
mii_reg_read	drivers/net/lpc32xx_eth.c	/^static int mii_reg_read(struct mii_dev *bus, int phy_adr, int devad,$/;"	f	typeref:typename:int	file:
mii_reg_write	drivers/net/lpc32xx_eth.c	/^static int mii_reg_write(struct mii_dev *bus, int phy_adr, int devad,$/;"	f	typeref:typename:int	file:
mii_reset	drivers/net/mcfmii.c	/^void mii_reset(FEC_INFO_T *info)$/;"	f	typeref:typename:void
mii_scan_results_sticky	include/vsc9953.h	/^	u32	mii_scan_results_sticky[2];$/;"	m	struct:vsc9953_mii_read_scan	typeref:typename:u32[2]
mii_send	arch/powerpc/cpu/mpc8xx/fec.c	/^mii_send(uint mii_cmd)$/;"	f	typeref:typename:uint	file:
mii_send	drivers/net/mcfmii.c	/^uint mii_send(uint mii_cmd)$/;"	f	typeref:typename:uint
mii_ser_params	drivers/net/mvgbe.h	/^	u32 mii_ser_params;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
mii_set_mdc	board/gdsys/405ep/iocon.c	/^static int mii_set_mdc(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
mii_set_mdc	board/gdsys/mpc8308/hrcon.c	/^static int mii_set_mdc(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
mii_set_mdc	board/gdsys/mpc8308/strider.c	/^static int mii_set_mdc(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
mii_set_mdio	board/gdsys/405ep/iocon.c	/^static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
mii_set_mdio	board/gdsys/mpc8308/hrcon.c	/^static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
mii_set_mdio	board/gdsys/mpc8308/strider.c	/^static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
mii_setupcmd	board/gdsys/common/phy.c	/^struct mii_setupcmd {$/;"	s	file:
mii_speed	arch/powerpc/include/asm/immap_512x.h	/^	u32	mii_speed;	\/* MII speed register *\/$/;"	m	struct:fec512x	typeref:typename:u32
mii_speed	drivers/net/fec_mxc.h	/^	uint32_t mii_speed;		\/* MBAR_ETH + 0x044 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
mii_speed	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 mii_speed;		\/* MBAR_ETH + 0x044 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
mii_status	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 mii_status;		\/* MBAR_ETH + 0x048 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
mii_to_copper_88e1514	board/gdsys/common/phy.c	/^struct mii_setupcmd mii_to_copper_88e1514[] = {$/;"	v	typeref:struct:mii_setupcmd[]
miiaddr	drivers/net/designware.h	/^	u32 miiaddr;		\/* 0x10 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
miibase	arch/m68k/include/asm/fec.h	/^	u32 miibase;$/;"	m	struct:fec_info_s	typeref:typename:u32
miibase	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 miibase;$/;"	m	struct:fec_info_dma	typeref:typename:u32
miicmd	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t miicmd;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
miidata	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t miidata;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
miidata	drivers/net/designware.h	/^	u32 miidata;		\/* 0x14 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
miigsk_cfgr	drivers/net/fec_mxc.h	/^	uint16_t miigsk_cfgr;		\/* MBAR_ETH + 0x300 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint16_t
miigsk_enr	drivers/net/fec_mxc.h	/^	uint16_t miigsk_enr;		\/* MBAR_ETH + 0x308 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint16_t
miim	drivers/net/pch_gbe.h	/^	u32 miim;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
miimadd	arch/powerpc/include/asm/immap_85xx.h	/^	u32	miimadd;	\/* MII Management Addr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
miimadd	arch/powerpc/include/asm/immap_86xx.h	/^	uint	miimadd;	\/* 0x24528 - MII Management Address Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
miimadd	include/fsl_dtsec.h	/^	u32	miimadd;	\/* MII management address *\/$/;"	m	struct:dtsec	typeref:typename:u32
miimadd	include/fsl_fman.h	/^	u32	miimadd;	\/* MII management address reg *\/$/;"	m	struct:fm_mdio	typeref:typename:u32
miimadd	include/fsl_mdio.h	/^	u32 miimadd;		\/* MII management address reg *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
miimadd	include/linux/immap_qe.h	/^	u32 miimadd;		\/* MII management address reg          *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
miimadd	include/linux/immap_qe.h	/^	u32 miimadd;		\/* MII management address reg          *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
miimcfg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	miimcfg;	\/* MII Management Configuration *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
miimcfg	arch/powerpc/include/asm/immap_86xx.h	/^	uint	miimcfg;	\/* 0x24520 - MII Management Configuration Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
miimcfg	include/fsl_dtsec.h	/^	u32	miimcfg;	\/* MII management configuration *\/$/;"	m	struct:dtsec	typeref:typename:u32
miimcfg	include/fsl_fman.h	/^	u32	miimcfg;	\/* MII management configuration reg *\/$/;"	m	struct:fm_mdio	typeref:typename:u32
miimcfg	include/fsl_mdio.h	/^	u32 miimcfg;		\/* MII management configuration reg *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
miimcfg	include/linux/immap_qe.h	/^	u32 miimcfg;		\/* MII management configuration reg    *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
miimcfg	include/linux/immap_qe.h	/^	u32 miimcfg;		\/* MII management configuration reg    *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
miimcfg	include/vsc9953.h	/^	u32	miimcfg;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miimcmd	include/vsc9953.h	/^	u32	miimcmd;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miimcom	arch/powerpc/include/asm/immap_85xx.h	/^	u32	miimcom;	\/* MII Management Cmd *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
miimcom	arch/powerpc/include/asm/immap_86xx.h	/^	uint	miimcom;	\/* 0x24524 - MII Management Command Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
miimcom	include/fsl_dtsec.h	/^	u32	miimcom;	\/* MII management command *\/$/;"	m	struct:dtsec	typeref:typename:u32
miimcom	include/fsl_fman.h	/^	u32	miimcom;	\/* MII management command reg *\/$/;"	m	struct:fm_mdio	typeref:typename:u32
miimcom	include/fsl_mdio.h	/^	u32 miimcom;		\/* MII management command reg *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
miimcom	include/linux/immap_qe.h	/^	u32 miimcom;		\/* MII management command reg          *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
miimcom	include/linux/immap_qe.h	/^	u32 miimcom;		\/* MII management command reg          *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
miimcon	arch/powerpc/include/asm/immap_85xx.h	/^	u32	miimcon;	\/* MII Management Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
miimcon	arch/powerpc/include/asm/immap_86xx.h	/^	uint	miimcon;	\/* 0x2452c - MII Management Control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
miimcon	include/fsl_dtsec.h	/^	u32	miimcon;	\/* MII management control *\/$/;"	m	struct:dtsec	typeref:typename:u32
miimcon	include/fsl_fman.h	/^	u32	miimcon;	\/* MII management control reg *\/$/;"	m	struct:fm_mdio	typeref:typename:u32
miimcon	include/fsl_mdio.h	/^	u32 miimcon;		\/* MII management control reg *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
miimcon	include/linux/immap_qe.h	/^	u32 miimcon;		\/* MII management control reg          *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
miimcon	include/linux/immap_qe.h	/^	u32 miimcon;		\/* MII management control reg          *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
miimdata	include/vsc9953.h	/^	u32	miimdata;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miimind	arch/powerpc/include/asm/immap_85xx.h	/^	u32	miimind;	\/* MII Management Indicator *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
miimind	arch/powerpc/include/asm/immap_86xx.h	/^	uint	miimind;	\/* 0x24534 - MII Management Indicator Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
miimind	include/fsl_dtsec.h	/^	u32	miimind;	\/* MII management indicator *\/$/;"	m	struct:dtsec	typeref:typename:u32
miimind	include/fsl_fman.h	/^	u32	miimind;	\/* MII management indication reg *\/$/;"	m	struct:fm_mdio	typeref:typename:u32
miimind	include/fsl_mdio.h	/^	u32 miimind;		\/* MII management indication reg *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
miimind	include/linux/immap_qe.h	/^	u32 miimind;		\/* MII management indication reg       *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
miimind	include/linux/immap_qe.h	/^	u32 miimind;		\/* MII management indication reg       *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
miimscan_0	include/vsc9953.h	/^	u32	miimscan_0;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miimscan_1	include/vsc9953.h	/^	u32	miimscan_1;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miimstat	arch/powerpc/include/asm/immap_85xx.h	/^	u32	miimstat;	\/* MII Management Status *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
miimstat	arch/powerpc/include/asm/immap_86xx.h	/^	uint	miimstat;	\/* 0x24530 - MII Management Status Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
miimstat	include/fsl_dtsec.h	/^	u32	miimstat;	\/* MII management status *\/$/;"	m	struct:dtsec	typeref:typename:u32
miimstat	include/fsl_fman.h	/^	u32	miimstat;	\/* MII management status reg  *\/$/;"	m	struct:fm_mdio	typeref:typename:u32
miimstat	include/fsl_mdio.h	/^	u32 miimstat;		\/* MII management status reg  *\/$/;"	m	struct:tsec_mii_mng	typeref:typename:u32
miimstat	include/linux/immap_qe.h	/^	u32 miimstat;		\/* MII management status reg           *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
miimstat	include/linux/immap_qe.h	/^	u32 miimstat;		\/* MII management status reg           *\/$/;"	m	struct:ucc_mii_mng	typeref:typename:u32
miimstatus	include/vsc9953.h	/^	u32	miimstatus;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miiphy_dump	arch/powerpc/cpu/ppc4xx/miiphy.c	/^void miiphy_dump (char *devname, unsigned char addr)$/;"	f	typeref:typename:void
miiphy_duplex	common/miiphyutil.c	/^int miiphy_duplex(const char *devname, unsigned char addr)$/;"	f	typeref:typename:int
miiphy_get_active_dev	common/miiphyutil.c	/^static struct mii_dev *miiphy_get_active_dev(const char *devname)$/;"	f	typeref:struct:mii_dev *	file:
miiphy_get_current_dev	common/miiphyutil.c	/^const char *miiphy_get_current_dev(void)$/;"	f	typeref:typename:const char *
miiphy_get_dev_by_name	common/miiphyutil.c	/^struct mii_dev *miiphy_get_dev_by_name(const char *devname)$/;"	f	typeref:struct:mii_dev *
miiphy_getemac_offset	arch/powerpc/cpu/ppc4xx/miiphy.c	/^unsigned int miiphy_getemac_offset(u8 addr)$/;"	f	typeref:typename:unsigned int
miiphy_info	common/miiphyutil.c	/^int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,$/;"	f	typeref:typename:int
miiphy_init	common/miiphyutil.c	/^void miiphy_init(void)$/;"	f	typeref:typename:void
miiphy_is_1000base_x	common/miiphyutil.c	/^int miiphy_is_1000base_x(const char *devname, unsigned char addr)$/;"	f	typeref:typename:int
miiphy_link	common/miiphyutil.c	/^int miiphy_link(const char *devname, unsigned char addr)$/;"	f	typeref:typename:int
miiphy_listdev	common/miiphyutil.c	/^void miiphy_listdev(void)$/;"	f	typeref:typename:void
miiphy_pre	drivers/net/phy/miiphybb.c	/^static void miiphy_pre(struct bb_miiphy_bus *bus, char read,$/;"	f	typeref:typename:void	file:
miiphy_read	common/miiphyutil.c	/^int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,$/;"	f	typeref:typename:int
miiphy_read	drivers/net/bcm-sf2-eth.h	/^	int (*miiphy_read)(struct mii_dev *bus, int phyaddr, int devad,$/;"	m	struct:eth_info	typeref:typename:int (*)(struct mii_dev * bus,int phyaddr,int devad,int reg)
miiphy_reset	common/miiphyutil.c	/^int miiphy_reset(const char *devname, unsigned char addr)$/;"	f	typeref:typename:int
miiphy_reset	drivers/net/phy/phy.c	/^int miiphy_reset(const char *devname, unsigned char addr)$/;"	f	typeref:typename:int
miiphy_restart_aneg	drivers/net/fec_mxc.c	/^static int miiphy_restart_aneg(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
miiphy_set_current_dev	common/exports.c	/^# define miiphy_set_current_dev	/;"	d	file:
miiphy_set_current_dev	common/miiphyutil.c	/^int miiphy_set_current_dev(const char *devname)$/;"	f	typeref:typename:int
miiphy_speed	common/miiphyutil.c	/^int miiphy_speed(const char *devname, unsigned char addr)$/;"	f	typeref:typename:int
miiphy_wait_aneg	drivers/net/fec_mxc.c	/^static int miiphy_wait_aneg(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
miiphy_write	common/miiphyutil.c	/^int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,$/;"	f	typeref:typename:int
miiphy_write	drivers/net/bcm-sf2-eth.h	/^	int (*miiphy_write)(struct mii_dev *bus, int phyaddr, int devad,$/;"	m	struct:eth_info	typeref:typename:int (*)(struct mii_dev * bus,int phyaddr,int devad,int reg,u16 value)
miiregs_sgmii	include/tsec.h	/^	struct tsec_mii_mng __iomem *miiregs_sgmii;$/;"	m	struct:tsec_info_struct	typeref:struct:tsec_mii_mng __iomem *
miiscan_lst_rslts	include/vsc9953.h	/^	u32	miiscan_lst_rslts;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miiscan_lst_rslts_valid	include/vsc9953.h	/^	u32	miiscan_lst_rslts_valid;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
miisel	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int miisel;		\/* offset 0x50 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
miists	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t miists;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
mikro_pins	arch/arm/dts/armada-388-clearfog.dts	/^				mikro_pins: mikro-pins {$/;"	l
mikro_spi_pins	arch/arm/dts/armada-388-clearfog.dts	/^				mikro_spi_pins: mikro-spi-pins {$/;"	l
mikro_uart_pins	arch/arm/dts/armada-388-clearfog.dts	/^				mikro_uart_pins: mikro-uart-pins {$/;"	l
mikrobus_adc	arch/arm/dts/armada-388-clearfog.dts	/^				mikrobus_adc: mcp3021@4c {$/;"	l
min	arch/x86/include/asm/speedstep.h	/^	struct sst_state min;$/;"	m	struct:sst_params	typeref:struct:sst_state
min	common/hwconfig.c	/^#define min(/;"	d	file:
min	drivers/power/regulator/sandbox.c	/^	int min;$/;"	m	struct:output_range	typeref:typename:int	file:
min	drivers/rtc/ds1302.c	/^	unsigned char min:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
min	drivers/rtc/ftrtc010.c	/^	unsigned int min;		\/* 0x04 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
min	drivers/video/ct69000.c	/^#define min(/;"	d	file:
min	fs/yaffs2/yaffs_qsort.c	/^#define min(/;"	d	file:
min	include/fdtdec.h	/^	u32 min;$/;"	m	struct:timing_entry	typeref:typename:u32
min	include/linux/kernel.h	/^#define min(/;"	d
min	include/power/s5m8767.h	/^	int min;$/;"	m	struct:sec_voltage_desc	typeref:typename:int
min	scripts/kconfig/nconf.h	/^#define min(/;"	d
min	tools/env/fw_env.c	/^#define min(/;"	d	file:
min	tools/gdb/remote.c	/^#define min(/;"	d	file:
min10	drivers/rtc/ds1302.c	/^	unsigned char min10:3;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:3	file:
min3	include/linux/kernel.h	/^#define min3(/;"	d
minLens	lib/bzip2/bzlib_private.h	/^      Int32    minLens[BZ_N_GROUPS];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[]
min_active_to_precharge	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_active_to_precharge;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_adll_per_pup	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 min_adll_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
min_altera_iface_type	include/altera.h	/^	min_altera_iface_type,$/;"	e	enum:altera_iface
min_altera_type	include/altera.h	/^	min_altera_type,$/;"	e	enum:altera_family
min_bpp	drivers/video/da8xx-fb.h	/^	int min_bpp;$/;"	m	struct:display_panel	typeref:typename:int
min_cas_lat_time	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_cas_lat_time;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_cmd_acpt	arch/mips/mach-pic32/include/mach/ddr.h	/^	u32 min_cmd_acpt; \/* min number of accepted cmds *\/$/;"	m	struct:ddr2_arbiter_params	typeref:typename:u32
min_cycle_time	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_cycle_time;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_delay	include/ddr_spd.h	/^	unsigned char min_delay;   \/* 15 for Back to Back Random Address *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
min_delay	include/spd.h	/^	unsigned char min_delay;   \/* 15 for Back to Back Random Address *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
min_ec	drivers/mtd/ubi/ubi.h	/^	int min_ec;$/;"	m	struct:ubi_attach_info	typeref:typename:int
min_extra_inode_size	include/ext_common.h	/^	__le16 min_extra_inode_size;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
min_four_active_win_delay	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_four_active_win_delay;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_frag_size_ipv4	include/fsl-mc/fsl_dpni.h	/^		uint16_t min_frag_size_ipv4;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0208	typeref:typename:uint16_t
min_frag_size_ipv6	include/fsl-mc/fsl_dpni.h	/^		uint16_t min_frag_size_ipv6;$/;"	m	struct:dpni_extended_cfg::__anonf56ef98e0208	typeref:typename:uint16_t
min_freq	include/fsl_ddr_sdram.h	/^	int min_freq;$/;"	m	struct:fixed_ddr_parm	typeref:typename:int
min_idx_lebs	fs/ubifs/ubifs.h	/^	int min_idx_lebs;$/;"	m	struct:ubifs_budg_info	typeref:typename:int
min_idx_node_sz	fs/ubifs/ubifs.h	/^	int min_idx_node_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
min_io_shift	fs/ubifs/ubifs.h	/^	int min_io_shift;$/;"	m	struct:ubifs_info	typeref:typename:int
min_io_size	drivers/mtd/ubi/ubi.h	/^	int min_io_size;$/;"	m	struct:ubi_device	typeref:typename:int
min_io_size	fs/ubifs/ubifs-media.h	/^	__le32 min_io_size;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
min_io_size	fs/ubifs/ubifs.h	/^	int min_io_size;$/;"	m	struct:ubifs_info	typeref:typename:int
min_io_size	include/linux/mtd/ubi.h	/^	int min_io_size;$/;"	m	struct:ubi_device_info	typeref:typename:int
min_lattice_iface_type	include/lattice.h	/^	min_lattice_iface_type,		\/* insert all new types after this *\/$/;"	e	enum:__anon773a64540203
min_lattice_type	include/lattice.h	/^	min_lattice_type,$/;"	e	enum:__anon773a64540303
min_len	fs/ubifs/ubifs.h	/^		int min_len;$/;"	m	union:ubifs_node_range::__anonf648d084110a	typeref:typename:int
min_level	drivers/video/pwm_backlight.c	/^	uint min_level;$/;"	m	struct:pwm_backlight_priv	typeref:typename:uint	file:
min_limit	arch/mips/mach-pic32/include/mach/ddr.h	/^	u32 min_limit;	\/* min bursts to execute per arbitration *\/$/;"	m	struct:ddr2_arbiter_params	typeref:typename:u32
min_local	drivers/hwmon/adm1021.c	/^		uint min_local:8;	\/* internal temp minimum *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:8	file:
min_log_bytes	fs/ubifs/ubifs.h	/^	int min_log_bytes;$/;"	m	struct:ubifs_info	typeref:typename:int
min_mode	drivers/video/tegra124/display.c	/^static struct display_timing min_mode = {$/;"	v	typeref:struct:display_timing	file:
min_not_zero	include/linux/kernel.h	/^#define min_not_zero(/;"	d
min_pbs_per_pup	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 min_pbs_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
min_post_scan_delay_us	include/ec_commands.h	/^	uint16_t min_post_scan_delay_us;$/;"	m	struct:ec_mkbp_config	typeref:typename:uint16_t
min_power	drivers/usb/musb-new/musb_core.h	/^	u8			min_power;	\/* vbus for periph, in mA\/2 *\/$/;"	m	struct:musb	typeref:typename:u8
min_power	include/linux/usb/musb.h	/^	u8		min_power;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:u8
min_ras_to_cas_delay	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_ras_to_cas_delay;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_read_to_prech_cmd_delay	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_read_to_prech_cmd_delay;	\/* DDR3\/2 only *\/$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_refresh_recovery	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_refresh_recovery;		\/* DDR3\/2 only *\/$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_remote	drivers/hwmon/adm1021.c	/^		uint min_remote:8;	\/* remote temp minimum *\/$/;"	m	struct:__anon6adf13920108	typeref:typename:uint:8	file:
min_row_active_to_row_active	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_row_active_to_row_active;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_row_precharge_time	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_row_precharge_time;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_t	include/linux/kernel.h	/^#define min_t(/;"	d
min_tck	arch/arm/cpu/armv7/omap5/sdram.c	/^static const struct lpddr2_min_tck min_tck = {$/;"	v	typeref:typename:const struct lpddr2_min_tck	file:
min_tck	arch/arm/include/asm/emif.h	/^	const struct lpddr2_min_tck *min_tck;$/;"	m	struct:lpddr2_device_timings	typeref:typename:const struct lpddr2_min_tck *
min_tck_elpida	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static const struct lpddr2_min_tck min_tck_elpida = {$/;"	v	typeref:typename:const struct lpddr2_min_tck	file:
min_tck_jedec	arch/arm/cpu/armv7/omap4/emif.c	/^static const struct lpddr2_min_tck min_tck_jedec = {$/;"	v	typeref:typename:const struct lpddr2_min_tck	file:
min_tck_jedec	arch/arm/cpu/armv7/omap5/emif.c	/^static const struct lpddr2_min_tck min_tck_jedec = {$/;"	v	typeref:typename:const struct lpddr2_min_tck	file:
min_uA	include/power/regulator.h	/^	int min_uA;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:int
min_uV	include/power/regulator.h	/^	int min_uV;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:int
min_uv	drivers/power/regulator/rk808.c	/^	uint min_uv;$/;"	m	struct:rk808_reg_info	typeref:typename:uint	file:
min_val	drivers/power/exynos-tmu.c	/^	unsigned min_val;$/;"	m	struct:temperature_params	typeref:typename:unsigned	file:
min_voltage	drivers/power/regulator/pwm_regulator.c	/^	unsigned int min_voltage;$/;"	m	struct:pwm_regulator_info	typeref:typename:unsigned int	file:
min_write_recovery_time	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_write_recovery_time;		\/* DDR3\/2 only *\/$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_write_to_read_cmd_delay	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 min_write_to_read_cmd_delay;	\/* DDR3\/2 only *\/$/;"	m	struct:dimm_info	typeref:typename:u32	file:
min_xilinx_iface_type	include/xilinx.h	/^	min_xilinx_iface_type,	\/* low range check value *\/$/;"	e	enum:__anon15c234ca0103
min_xilinx_type	include/xilinx.h	/^	min_xilinx_type,	\/* low range check value *\/$/;"	e	enum:__anon15c234ca0203
minc	drivers/thermal/imx_thermal.c	/^	int minc;$/;"	m	struct:thermal_data	typeref:typename:int	file:
mincmd	drivers/ddr/microchip/ddr2_regs.h	/^	u32 mincmd;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
mind	drivers/net/lpc32xx_eth.c	/^	u32 mind;		\/* MII management indicators register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mind	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic mind; \/* 0x2d0 *\/$/;"	m	struct:pic32_mii_regs	typeref:struct:pic32_reg_atomic
minflr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	minflr;		\/* Minimum Frame Len *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
minflr	drivers/qe/uec.h	/^	u16  minflr;              \/* min frame length reg. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
minflr	include/tsec.h	/^	u32	minflr;		\/* Minimum Frame Length *\/$/;"	m	struct:tsec	typeref:typename:u32
miniport_data	arch/x86/include/asm/pirq_routing.h	/^	u32 miniport_data;$/;"	m	struct:irq_routing_table	typeref:typename:u32
minix_find_first_zero_bit	arch/arm/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/blackfin/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/microblaze/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/mips/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/nds32/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/powerpc/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/sandbox/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_find_first_zero_bit	arch/x86/include/asm/bitops.h	/^#define minix_find_first_zero_bit(/;"	d
minix_set_bit	arch/arm/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/blackfin/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/microblaze/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/mips/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/nds32/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/powerpc/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/sandbox/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_set_bit	arch/x86/include/asm/bitops.h	/^#define minix_set_bit(/;"	d
minix_test_and_clear_bit	arch/arm/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/blackfin/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/microblaze/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/mips/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/nds32/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/powerpc/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/sandbox/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_clear_bit	arch/x86/include/asm/bitops.h	/^#define minix_test_and_clear_bit(/;"	d
minix_test_and_set_bit	arch/arm/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/blackfin/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/microblaze/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/mips/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/nds32/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/powerpc/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/sandbox/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_and_set_bit	arch/x86/include/asm/bitops.h	/^#define minix_test_and_set_bit(/;"	d
minix_test_bit	arch/arm/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/blackfin/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/microblaze/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/mips/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/nds32/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/powerpc/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/sandbox/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minix_test_bit	arch/x86/include/asm/bitops.h	/^#define minix_test_bit(/;"	d
minlim	drivers/ddr/microchip/ddr2_regs.h	/^	u32 minlim;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
minmax	drivers/mmc/rockchip_dw_mmc.c	/^	u32 minmax[2];$/;"	m	struct:rockchip_dwmmc_priv	typeref:typename:u32[2]	file:
minmax	drivers/video/ct69000.c	/^#define minmax(/;"	d	file:
minor	arch/mips/mach-ath79/cpu.c	/^	const int minor;$/;"	m	struct:ath79_soc_desc	typeref:typename:const int	file:
minor	board/freescale/common/sys_eeprom.c	/^		u8 minor;         \/* 0x05        Board revision, minor *\/$/;"	m	struct:get_cpu_board_revision::board_eeprom	typeref:typename:u8	file:
minor	board/freescale/common/sys_eeprom.c	/^	u8 minor;         \/* 0x05        Board revision, minor *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
minor	include/fsl-mc/fsl_dpbp.h	/^		uint16_t minor;$/;"	m	struct:dpbp_attr::__anonf56882c90108	typeref:typename:uint16_t
minor	include/fsl-mc/fsl_dpio.h	/^		uint16_t minor;$/;"	m	struct:dpio_attr::__anonf56c552f0108	typeref:typename:uint16_t
minor	include/fsl-mc/fsl_dpmac.h	/^		uint16_t minor;$/;"	m	struct:dpmac_attr::__anona3388a280108	typeref:typename:uint16_t
minor	include/fsl-mc/fsl_dpmng.h	/^	uint32_t minor;$/;"	m	struct:mc_version	typeref:typename:uint32_t
minor	include/fsl-mc/fsl_dpni.h	/^		uint16_t minor;$/;"	m	struct:dpni_attr::__anonf56ef98e0508	typeref:typename:uint16_t
minor	include/fsl-mc/fsl_dprc.h	/^		uint16_t minor;$/;"	m	struct:dprc_attributes::__anonf571118c0108	typeref:typename:uint16_t
minor	include/fsl_qe.h	/^		u8 minor;	\/* The SOC revision minor *\/$/;"	m	struct:qe_firmware::__anon7a33fbc80108	typeref:typename:u8
minor	include/fsl_qe.h	/^		u8 minor;	\/* The microcode version minor *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u8
minor	tools/mxsimage.h	/^	uint16_t	minor;$/;"	m	struct:sb_boot_image_version	typeref:typename:uint16_t
minor_rev_num	include/ata.h	/^	unsigned short  minor_rev_num;	\/*  *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
minor_revision_level	include/ext_common.h	/^	__le16 minor_revision_level;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
minor_ver	include/smbios.h	/^	u8 minor_ver;$/;"	m	struct:smbios_entry	typeref:typename:u8
minor_version	arch/x86/include/asm/arch-broadwell/me.h	/^	u32	minor_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
minor_version	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 minor_version:16;$/;"	m	struct:mbp_fw_version_name	typeref:typename:u32:16
minor_version	include/mtd/cfi_flash.h	/^	u8	minor_version;$/;"	m	struct:cfi_pri_hdr	typeref:typename:u8
minor_version	include/sparse_format.h	/^  __le16	minor_version;	\/* (0x0) - allow images with higer minor versions *\/$/;"	m	struct:sparse_header	typeref:typename:__le16
minor_version	tools/mxsimage.h	/^	uint8_t		minor_version;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint8_t
mint	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 mint;		\/* 0x34 masked interrupt status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
mint	arch/arm/include/asm/arch/mmc.h	/^	u32 mint;		\/* 0x34 masked interrupt status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
minute	include/efi.h	/^	u8 minute;$/;"	m	struct:efi_time	typeref:typename:u8
minutes	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	minutes;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
minw	drivers/qe/uec.h	/^	u32  minw;             \/* temporary variable handled by QE *\/$/;"	m	struct:uec_scheduler	typeref:typename:u32
mio_clk	arch/arm/dts/uniphier-common32.dtsi	/^			mio_clk: clock {$/;"	l
mio_clk	arch/arm/dts/uniphier-ld11.dtsi	/^			mio_clk: clock {$/;"	l
mio_clk	arch/arm/dts/uniphier-ld20.dtsi	/^			mio_clk: clock {$/;"	l
mio_clk	arch/arm/dts/uniphier-sld3.dtsi	/^			mio_clk: clock {$/;"	l
mio_periphs	arch/arm/cpu/armv8/zynqmp/slcr.c	/^static const struct zynq_slcr_mio_get_status mio_periphs[] = {$/;"	v	typeref:typename:const struct zynq_slcr_mio_get_status[]	file:
mio_periphs	arch/arm/mach-zynq/slcr.c	/^static const struct zynq_slcr_mio_get_status mio_periphs[] = {$/;"	v	typeref:typename:const struct zynq_slcr_mio_get_status[]	file:
mio_pin	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 mio_pin[78];$/;"	m	struct:iou_slcr_regs	typeref:typename:u32[78]
mio_pin	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 mio_pin[54]; \/* 0x700 - 0x7D4 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32[54]
mio_rst	arch/arm/dts/uniphier-common32.dtsi	/^			mio_rst: reset {$/;"	l
mio_rst	arch/arm/dts/uniphier-ld11.dtsi	/^			mio_rst: reset {$/;"	l
mio_rst	arch/arm/dts/uniphier-ld20.dtsi	/^			mio_rst: reset {$/;"	l
mio_rst	arch/arm/dts/uniphier-sld3.dtsi	/^			mio_rst: reset {$/;"	l
mios	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct mios {$/;"	s
mios5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} mios5xx_t;$/;"	t	typeref:struct:mios
mios_mcpsmscr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mcpsmscr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm11ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm11ar;                   \/* mdasm11 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm11br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm11br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm11scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm11scrd, mdasm11scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm12ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm12ar;                   \/* mdasm12 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm12br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm12br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm12scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm12scrd, mdasm12scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm13ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm13ar;                   \/* mdasm13 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm13br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm13br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm13scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm13scrd, mdasm13scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm14ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm14ar;                   \/* mdasm14 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm14br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm14br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm14scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm14scrd, mdasm14scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm15ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm15ar;                   \/* mdasm15 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm15br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm15br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm15scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm15scrd, mdasm15scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm27ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm27ar;                   \/* mdasm27 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm27br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm27br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm27scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm27scrd, mdasm27scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm28ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm28ar;                   \/*mdasm28 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm28br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm28br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm28scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm28scrd, mdasm28scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm29ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm29ar;                   \/* mdasm29 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm29br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm29br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm29scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm29scrd, mdasm29scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm30ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm30ar;                   \/* mdasm30 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm30br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm30br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm30scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm30scrd, mdasm30scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm31ar	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm31ar;                   \/* mdasm31 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm31br	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm31br;$/;"	m	struct:mios	typeref:typename:ushort
mios_mdasm31scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mdasm31scrd, mdasm31scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1er0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1er0;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1er1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1er1;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1lvl0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1lvl0;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1lvl1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1lvl1;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1mcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1mcr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1rpr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1rpr0;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1rpr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1rpr1;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1sr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1sr0;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1sr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1sr1;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1tpcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1tpcr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mios1vnr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mios1vnr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mmcsm22cnt	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm22cnt;                  \/* mmcsm22 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mmcsm22mlr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm22mlr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mmcsm22scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm22scrd, mmcsm22scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mmcsm6cnt	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm6cnt;                   \/* mmcsm6 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mmcsm6mlr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm6mlr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mmcsm6scrd	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm6scrd, mmcsm6scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpiosm32ddr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpiosm32ddr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpiosm32dr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpiosm32dr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm0cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm0cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm0perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm0perr;                 \/* mpwmsm0 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm0pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm0pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm0scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm0scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm16cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm16cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm16perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm16perr;                \/* mpwmsm16 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm16pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm16pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm16scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm16scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm17cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm17cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm17perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm17perr;                \/* mpwmsm17 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm17pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm17pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm17scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm17scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm18cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm18cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm18perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm18perr;                \/* mpwmsm18 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm18pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm18pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm18scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm18scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm19cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm19cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm19perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm19perr;                \/* mpwmsm19 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm19pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm19pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm19scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm19scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm1cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm1cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm1perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm1perr;                 \/* mpwmsm1 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm1pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm1pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm1scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm1scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm2cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm2cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm2perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm2perr;                 \/* mpwmsm2 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm2pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm2pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm2scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm2scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm3cntr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm3cntr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm3perr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm3perr;                 \/* mpwmsm3 *\/$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm3pulr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm3pulr;$/;"	m	struct:mios	typeref:typename:ushort
mios_mpwmsm3scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mpwmsm3scr;$/;"	m	struct:mios	typeref:typename:ushort
mios_res13	arch/powerpc/include/asm/5xx_immap.h	/^	char mios_res13[2];$/;"	m	struct:mios	typeref:typename:char[2]
mios_res42z	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_res42z;$/;"	m	struct:mios	typeref:typename:ushort
mipi	arch/arm/dts/tegra114.dtsi	/^	mipi: mipi@700e3000 {$/;"	l
mipi	arch/arm/dts/tegra210.dtsi	/^	mipi: mipi@700e3000 {$/;"	l
mipi_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mipi_bias_cfg;	\/* 0x240 MIPI Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mipi_bias_cfg;	\/* 0x240 MIPI Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_csi	arch/arm/dts/imx6qdl.dtsi	/^			mipi_csi: mipi@021dc000 {$/;"	l
mipi_csi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mipi_csi_clk_cfg;	\/* 0x16c MIPI CSI clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_csi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 mipi_csi_clk_cfg;	\/* 0x130 MIPI CSI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_csi_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mipi_csi_clk_cfg;	\/* 0x16c MIPI CSI clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_csi_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 mipi_csi_clk_cfg;	\/* 0x130 MIPI CSI module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_display_on	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	void	(*mipi_display_on)(struct mipi_dsim_device *dsim_dev);$/;"	m	struct:mipi_dsim_lcd_driver	typeref:typename:void (*)(struct mipi_dsim_device * dsim_dev)
mipi_dphy	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	mipi_dphy;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
mipi_dsi	arch/arm/dts/imx6qdl.dtsi	/^			mipi_dsi: mipi@021e0000 {$/;"	l
mipi_dsi_bitrate_per_data_lane_mbps	drivers/video/ssd2828.h	/^	int mipi_dsi_bitrate_per_data_lane_mbps;$/;"	m	struct:ssd2828_config	typeref:typename:int
mipi_dsi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mipi_dsi_clk_cfg;	\/* 0x168 MIPI DSI clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_dsi_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 mipi_dsi_clk_cfg;	\/* 0x168 MIPI DSI clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_dsi_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mipi_dsi_clk_cfg;	\/* 0x168 MIPI DSI clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_dsi_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 mipi_dsi_clk_cfg;	\/* 0x168 MIPI DSI clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_dsi_delay_after_exit_sleep_mode_ms	drivers/video/ssd2828.h	/^	int mipi_dsi_delay_after_exit_sleep_mode_ms;$/;"	m	struct:ssd2828_config	typeref:typename:int
mipi_dsi_delay_after_set_display_on_ms	drivers/video/ssd2828.h	/^	int mipi_dsi_delay_after_set_display_on_ms;$/;"	m	struct:ssd2828_config	typeref:typename:int
mipi_dsi_loosely_packed_pixel_format	drivers/video/ssd2828.h	/^	int mipi_dsi_loosely_packed_pixel_format;$/;"	m	struct:ssd2828_config	typeref:typename:int
mipi_dsi_number_of_data_lanes	drivers/video/ssd2828.h	/^	int mipi_dsi_number_of_data_lanes;$/;"	m	struct:ssd2828_config	typeref:typename:int
mipi_dsim_burst_mode_type	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^enum mipi_dsim_burst_mode_type {$/;"	g
mipi_dsim_byte_clk_src	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^enum mipi_dsim_byte_clk_src {$/;"	g
mipi_dsim_config	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^struct mipi_dsim_config {$/;"	s
mipi_dsim_ddi	drivers/video/exynos/exynos_mipi_dsi.c	/^struct mipi_dsim_ddi {$/;"	s	file:
mipi_dsim_device	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^struct mipi_dsim_device {$/;"	s
mipi_dsim_interface_type	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^enum mipi_dsim_interface_type {$/;"	g
mipi_dsim_lcd_device	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^struct mipi_dsim_lcd_device {$/;"	s
mipi_dsim_lcd_driver	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^struct mipi_dsim_lcd_driver {$/;"	s
mipi_dsim_master_ops	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^struct mipi_dsim_master_ops {$/;"	s
mipi_dsim_no_of_data_lane	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^enum mipi_dsim_no_of_data_lane {$/;"	g
mipi_dsim_pixel_format	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^enum mipi_dsim_pixel_format {$/;"	g
mipi_dsim_virtual_ch_no	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^enum mipi_dsim_virtual_ch_no {$/;"	g
mipi_enabled	drivers/video/exynos/exynos_fb.c	/^	unsigned int mipi_enabled;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
mipi_enabled	include/exynos_lcd.h	/^	unsigned int mipi_enabled;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
mipi_levels	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static struct interface_level mipi_levels[] = {$/;"	v	typeref:struct:interface_level[]	file:
mipi_mux_0	arch/arm/dts/imx6qdl.dtsi	/^						mipi_mux_0: endpoint {$/;"	l	label:mipi_dsi
mipi_mux_1	arch/arm/dts/imx6qdl.dtsi	/^						mipi_mux_1: endpoint {$/;"	l
mipi_mux_2	arch/arm/dts/imx6q.dtsi	/^			mipi_mux_2: endpoint {$/;"	l
mipi_mux_3	arch/arm/dts/imx6q.dtsi	/^			mipi_mux_3: endpoint {$/;"	l
mipi_panel_init	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int	(*mipi_panel_init)(struct mipi_dsim_device *dsim_dev);$/;"	m	struct:mipi_dsim_lcd_driver	typeref:typename:int (*)(struct mipi_dsim_device * dsim_dev)
mipi_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mipi_pattern_cfg;	\/* 0x2a0 MIPI Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mipi_pattern_cfg;	\/* 0x2a0 MIPI Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_phy0_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy0_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mipi_phy0_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy0_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mipi_phy0_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy0_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mipi_phy1_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy1_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mipi_phy1_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy1_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mipi_phy1_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy1_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mipi_phy2_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mipi_phy2_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mipi_pll_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mipi_pll_cfg;	\/* 0x40 MIPI pll control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_pll_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mipi_pll_cfg;	\/* 0x40 MIPI pll control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mipi_power	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int (*mipi_power)(void);$/;"	m	struct:exynos_platform_mipi_dsim	typeref:typename:int (*)(void)
mipi_power	board/samsung/trats/trats.c	/^int mipi_power(void)$/;"	f	typeref:typename:int
mipi_power	board/samsung/trats2/trats2.c	/^int mipi_power(void)$/;"	f	typeref:typename:int
mipi_power	board/samsung/universal_c210/universal.c	/^int mipi_power(void)$/;"	f	typeref:typename:int
mipiphy_rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 mipiphy_rcr;$/;"	m	struct:src	typeref:typename:u32
mips32	board/dbau1x00/lowlevel_init.S	/^	.set mips32$/;"	d
mips32	board/pb1x00/lowlevel_init.S	/^	.set mips32$/;"	d
mips32	board/qemu-mips/lowlevel_init.S	/^	.set mips32$/;"	d
mips_cache	arch/mips/include/asm/cacheops.h	/^static inline void mips_cache(int op, const volatile void *addr)$/;"	f	typeref:typename:void
mips_cache_probe	arch/mips/lib/cache.c	/^void mips_cache_probe(void)$/;"	f	typeref:typename:void
mips_cm_base	arch/mips/include/asm/cm.h	/^static inline void *mips_cm_base(void)$/;"	f	typeref:typename:void *
mips_cm_l2_line_size	arch/mips/include/asm/cm.h	/^static inline unsigned long mips_cm_l2_line_size(void)$/;"	f	typeref:typename:unsigned long
mips_dsp_state	arch/mips/include/asm/processor.h	/^struct mips_dsp_state {$/;"	s
mips_fpu_struct	arch/mips/include/asm/processor.h	/^struct mips_fpu_struct {$/;"	s
mips_io_port_base	arch/mips/include/asm/io.h	/^static inline ulong mips_io_port_base(void)$/;"	f	typeref:typename:ulong
mirclkdiv	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t mirclkdiv;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
mirror_enable_bitmask	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	int mirror_enable_bitmask;$/;"	m	struct:bus_params	typeref:typename:int
mirror_pattern	drivers/mtd/nand/fsl_elbc_nand.c	/^static u8 mirror_pattern[] = {'1', 't', 'b', 'B' };$/;"	v	typeref:typename:u8[]	file:
mirror_pattern	drivers/mtd/nand/fsl_ifc_nand.c	/^static u8 mirror_pattern[] = {'1', 't', 'b', 'B' };$/;"	v	typeref:typename:u8[]	file:
mirror_pattern	drivers/mtd/nand/mxc_nand.c	/^static u8 mirror_pattern[] = {'1', 't', 'b', 'B' };$/;"	v	typeref:typename:u8[]	file:
mirror_pattern	drivers/mtd/nand/nand_bbt.c	/^static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };$/;"	v	typeref:typename:uint8_t[]	file:
mirror_ports	include/vsc9953.h	/^	u32	mirror_ports;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
mirrored	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 mirrored;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
mirrored_dimm	include/fsl_ddr_dimm_params.h	/^	unsigned int mirrored_dimm;	\/* only for ddr3 *\/$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
mirrored_dimm	include/fsl_ddr_sdram.h	/^	unsigned int mirrored_dimm;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
mis	drivers/spi/lpc32xx_ssp.c	/^	u32 mis;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
misc	arch/arm/imx-common/cpu.c	/^	uint32_t	misc;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
misc	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 misc; 	\/* miscellaneous *\/$/;"	m	struct:esdramc_regs	typeref:typename:u32
misc	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 misc;$/;"	m	struct:esdc_regs	typeref:typename:u32
misc	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t misc;				\/* offset 0x0400 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
misc	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	misc;		\/* 0x38 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
misc	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	misc;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
misc	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	misc;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
misc	drivers/net/pcnet.c	/^	u32 misc;$/;"	m	struct:pcnet_tx_head	typeref:typename:u32	file:
misc	drivers/serial/serial_meson.c	/^	u32 misc;$/;"	m	struct:meson_uart	typeref:typename:u32	file:
misc	drivers/usb/musb-new/musb_core.h	/^	u8 devctl, busctl, misc;$/;"	m	struct:musb_context_registers	typeref:typename:u8
misc	include/linux/fb.h	/^	__u16 misc;			\/* Misc flags - see FB_MISC_* *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
misc0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 misc0;$/;"	m	struct:src	typeref:typename:u32
misc1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 misc1;$/;"	m	struct:src	typeref:typename:u32
misc2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 misc2;$/;"	m	struct:src	typeref:typename:u32
misc3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 misc3;$/;"	m	struct:src	typeref:typename:u32
misc_call	drivers/misc/misc-uclass.c	/^int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,$/;"	f	typeref:typename:int
misc_clk	arch/arm/dts/zynqmp-ep108-clk.dtsi	/^	misc_clk: misc_clk {$/;"	l
misc_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 misc_con;$/;"	m	struct:rk3399_cru	typeref:typename:u32
misc_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^struct socfpga_sdram_misc_config misc_config = {$/;"	v	typeref:struct:socfpga_sdram_misc_config
misc_csr	board/freescale/t208xrdb/cpld.h	/^	u8 misc_csr;		\/* 0x15 - Misc control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
misc_ctl	include/universe.h	/^	unsigned int misc_ctl;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
misc_ctl_status	board/freescale/t102xrdb/cpld.h	/^	u8 misc_ctl_status;	\/* 0x17 - Miscellanies ctrl & status register*\/$/;"	m	struct:cpld_data	typeref:typename:u8
misc_ctl_status	board/freescale/t104xrdb/cpld.h	/^	u8 misc_ctl_status;	\/* 0x17 - Miscellanies ctrl & status register*\/$/;"	m	struct:cpld_data	typeref:typename:u8
misc_deregister	include/linux/compat.h	/^#define misc_deregister(/;"	d
misc_init_f	board/amcc/acadia/acadia.c	/^int misc_init_f(void)$/;"	f	typeref:typename:int
misc_init_f	board/amcc/yucca/yucca.c	/^int misc_init_f (void)$/;"	f	typeref:typename:int
misc_init_f	board/esd/pmc440/pmc440.c	/^int misc_init_f(void)$/;"	f	typeref:typename:int
misc_init_f	board/freescale/mpc8349itx/mpc8349itx.c	/^int misc_init_f(void)$/;"	f	typeref:typename:int
misc_init_f	board/inka4x0/inka4x0.c	/^int misc_init_f (void)$/;"	f	typeref:typename:int
misc_init_f	board/keymile/kmp204x/kmp204x.c	/^int misc_init_f(void)$/;"	f	typeref:typename:int
misc_init_r	arch/arm/cpu/armv7/omap3/board.c	/^int __weak misc_init_r(void)$/;"	f	typeref:typename:int __weak
misc_init_r	arch/arm/mach-keystone/keystone.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	arch/mips/mach-pic32/cpu.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	arch/x86/cpu/broadwell/sdram.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	arch/x86/cpu/coreboot/coreboot.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	arch/x86/cpu/efi/efi.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	arch/x86/cpu/ivybridge/sdram.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/Barix/ipam390/ipam390.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/BuS/eb_cpu5282/eb_cpu5282.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/LaCie/net2big_v2/net2big_v2.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/LaCie/netspace_v2/netspace_v2.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/a3m071/a3m071.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/a4m072/a4m072.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amazon/kc1/kc1.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amcc/canyonlands/canyonlands.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amcc/kilauea/kilauea.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amcc/luan/luan.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amcc/makalu/makalu.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amcc/sequoia/sequoia.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/amcc/yosemite/yosemite.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/amlogic/odroid-c2/odroid-c2.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/armltd/integrator/integrator.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/astro/mcf5373l/mcf5373l.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bachmann/ot1200/ot1200.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/barco/platinum/platinum.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/barco/titanium/titanium.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bct-brettl2/bct-brettl2.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf518f-ezbrd/bf518f-ezbrd.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf526-ezbrd/bf526-ezbrd.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf527-ad7160-eval/bf527-ad7160-eval.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf527-ezkit/bf527-ezkit.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf527-sdp/bf527-sdp.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf533-ezkit/bf533-ezkit.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf533-stamp/bf533-stamp.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf537-stamp/bf537-stamp.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/bf609-ezkit/bf609-ezkit.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/boundary/nitrogen6x/nitrogen6x.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/broadcom/bcm23550_w1d/bcm23550_w1d.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/broadcom/bcm28155_ap/bcm28155_ap.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/buffalo/lsxl/lsxl.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/cadence/xtfpga/xtfpga.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/cm-bf527/cm-bf527.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/cm-bf537e/cm-bf537e.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/cm-bf537u/cm-bf537u.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/cm5200/cm5200.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/compulab/cm_fx6/cm_fx6.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/compulab/cm_t35/cm_t35.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/compulab/cm_t3517/cm_t3517.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/corscience/tricorder/tricorder.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/davedenx/aria/aria.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/davinci/da8xxevm/da850evm.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/davinci/da8xxevm/omapl138_lcdk.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/dnp5370/dnp5370.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/cpci2dp/cpci2dp.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/cpci405/cpci405.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/mecp5123/mecp5123.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/meesc/meesc.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/plu405/plu405.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/pmc405de/pmc405de.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/pmc440/pmc440.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/esd/vme8349/vme8349.c	/^int misc_init_r()$/;"	f	typeref:typename:int
misc_init_r	board/esd/vom405/vom405.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/b4860qds/b4860qds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/bsc9132qds/bsc9132qds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/corenet_ds/corenet_ds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1012aqds/ls1012aqds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1021aqds/ls1021aqds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1021atwr/ls1021atwr.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1043aqds/ls1043aqds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1043ardb/ls1043ardb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1046aqds/ls1046aqds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls1046ardb/ls1046ardb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/ls2080ardb/ls2080ardb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/mpc5121ads/mpc5121ads.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/mpc8308rdb/mpc8308rdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/mpc8313erdb/mpc8313erdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/mpc8349itx/mpc8349itx.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/mpc837xerdb/mpc837xerdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/p1010rdb/p1010rdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/p1022ds/p1022ds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/p2041rdb/p2041rdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t102xqds/t102xqds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t102xrdb/t102xrdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t1040qds/t1040qds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t104xrdb/t104xrdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t208xqds/t208xqds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t208xrdb/t208xrdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t4qds/t4240emu.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t4qds/t4240qds.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/freescale/t4rdb/t4240rdb.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gaisler/gr_ep2s60/gr_ep2s60.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gaisler/grsim/grsim.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gaisler/grsim_leon2/grsim_leon2.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gateworks/gw_ventana/gw_ventana.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/405ep/dlvision-10g.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/405ep/io.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/405ep/neo.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/405ex/io64.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/dlvision/dlvision.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/gdppc440etx/gdppc440etx.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/intip/intip.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gdsys/p1022/controlcenterd.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/gumstix/duovero/duovero.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/highbank/highbank.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/hisilicon/hikey/hikey.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ids/ids8313/ids8313.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ifm/ac14xx/ac14xx.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/imgtec/malta/malta.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/intercontrol/digsy_mtc/digsy_mtc.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ipek01/ipek01.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/isee/igep00x0/igep00x0.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/keymile/km82xx/km82xx.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/keymile/km83xx/km83xx.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/keymile/km_arm/km_arm.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/keymile/kmp204x/kmp204x.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/kosagi/novena/novena.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/lg/sniper/sniper.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/liebherr/lwmon5/lwmon5.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/logicpd/am3517evm/am3517evm.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/logicpd/omap3som/omap3logic.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/logicpd/zoom1/zoom1.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/mpl/mip405/mip405.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/mpl/pip405/pip405.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/nokia/rx51/rx51.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/overo/overo.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/pandora/pandora.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/pdm360ng/pdm360ng.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/qemu-mips/qemu-mips.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/qualcomm/dragonboard410c/dragonboard410c.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/raspberrypi/rpi/rpi.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/samsung/common/board.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/samsung/goni/goni.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/samtec/vining_fpga/socfpga.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/socrates/socrates.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/spear/common/spr_misc.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/st/stm32f429-discovery/stm32f429-discovery.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/sunxi/board.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/t3corp/t3corp.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/tcm-bf537/tcm-bf537.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/technexion/tao3530/tao3530.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/technexion/twister/twister.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/teejet/mt_ventoux/mt_ventoux.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ti/am3517crane/am3517crane.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ti/beagle/beagle.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ti/evm/evm.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ti/omap5_uevm/evm.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ti/panda/panda.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/ti/sdp4430/sdp.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/timll/devkit8000/devkit8000.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/tqc/tqm8xx/tqm8xx.c	/^int misc_init_r (void)$/;"	f	typeref:typename:int
misc_init_r	board/tqc/tqma6/tqma6_wru4.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/v38b/v38b.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r	board/varisys/cyrus/cyrus.c	/^int misc_init_r(void)$/;"	f	typeref:typename:int
misc_init_r_kbd	board/liebherr/lwmon5/kbd.c	/^int misc_init_r_kbd (void)$/;"	f	typeref:typename:int
misc_ioctl	drivers/misc/misc-uclass.c	/^int misc_ioctl(struct udevice *dev, unsigned long request, void *buf)$/;"	f	typeref:typename:int
misc_mod_reset	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	misc_mod_reset;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
misc_ops	include/misc.h	/^struct misc_ops {$/;"	s
misc_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const misc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
misc_pads	board/aristainetos/aristainetos-v1.c	/^static iomux_v3_cfg_t const misc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
misc_pads	board/aristainetos/aristainetos-v2.c	/^static iomux_v3_cfg_t const misc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
misc_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const misc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
misc_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const misc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
misc_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux misc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
misc_read	drivers/misc/misc-uclass.c	/^int misc_read(struct udevice *dev, int offset, void *buf, int size)$/;"	f	typeref:typename:int
misc_register	include/linux/compat.h	/^#define misc_register(/;"	d
misc_regs	arch/arm/include/asm/arch-spear/spr_misc.h	/^struct misc_regs {$/;"	s
misc_regs_p	arch/arm/cpu/arm926ejs/spear/timer.c	/^static struct misc_regs *const misc_regs_p =$/;"	v	typeref:struct:misc_regs * const	file:
misc_stat	include/universe.h	/^	unsigned int misc_stat;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
misc_write	drivers/misc/misc-uclass.c	/^int misc_write(struct udevice *dev, int offset, void *buf, int size)$/;"	f	typeref:typename:int
misccfg	drivers/ddr/altera/sequencer.c	/^const struct socfpga_sdram_misc_config *misccfg;$/;"	v	typeref:typename:const struct socfpga_sdram_misc_config *
misccr	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	misccr;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
misccr	arch/m68k/include/asm/immap_5227x.h	/^	u16 misccr;		\/* Miscellaneous Control *\/$/;"	m	struct:ccm	typeref:typename:u16
misccr	arch/m68k/include/asm/immap_5301x.h	/^	u16 misccr;		\/* 0x0A Misc Ctrl *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
misccr	arch/m68k/include/asm/immap_5329.h	/^	u16 misccr;		\/* 0x0A Miscellaneous control register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
misccr	arch/m68k/include/asm/immap_5441x.h	/^	u16 misccr;		\/* 0x0E Miscellaneous Control *\/$/;"	m	struct:ccm	typeref:typename:u16
misccr	arch/m68k/include/asm/immap_5445x.h	/^	u16 misccr;		\/* Miscellaneous Control Register *\/$/;"	m	struct:ccm	typeref:typename:u16
misccr2	arch/m68k/include/asm/immap_5301x.h	/^	u16 misccr2;		\/* 0x18 Misc2 Ctrl *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
misccr2	arch/m68k/include/asm/immap_5441x.h	/^	u16 misccr2;		\/* 0x1A *\/$/;"	m	struct:ccm	typeref:typename:u16
misccr3	arch/m68k/include/asm/immap_5441x.h	/^	u16 misccr3;		\/* 0x18 *\/$/;"	m	struct:ccm	typeref:typename:u16
misccsr	board/freescale/c29xpcie/cpld.h	/^	u8 misccsr;	\/* 0x16 - Misc control and status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
misci	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	misci;			\/* 0x18 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
miscr	include/usb/fotg210.h	/^	uint32_t miscr;	\/* 0x40: Miscellaneous Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
mismatchdrop	drivers/qe/uec.h	/^	u32   mismatchdrop;      \/* drop because of MAC filtering *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
miso	drivers/spi/soft_spi.c	/^	struct gpio_desc miso;$/;"	m	struct:soft_spi_platdata	typeref:struct:gpio_desc	file:
miss	include/linux/compiler.h	/^			unsigned long miss;$/;"	m	struct:ftrace_branch_data::__anonaf531ce8010a::__anonaf531ce80308	typeref:typename:unsigned long
miss_hit	include/linux/compiler.h	/^		unsigned long miss_hit[2];$/;"	m	union:ftrace_branch_data::__anonaf531ce8010a	typeref:typename:unsigned long[2]
misses	include/blk.h	/^	unsigned misses;$/;"	m	struct:block_cache_stats	typeref:typename:unsigned
missing	fs/ubifs/orphan.c	/^	unsigned long missing;$/;"	m	struct:check_info	typeref:typename:unsigned long	file:
mitdcr_xilinx	drivers/net/xilinx_ll_temac_sdma.c	/^inline void mitdcr_xilinx(const unsigned dcrn, int val)$/;"	f	typeref:typename:void
mitem	scripts/kconfig/nconf.c	/^struct mitem {$/;"	s	file:
mivpr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mivpr0;		\/* Messaging IRQ Vector\/Priority 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
mivpr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mivpr0;		\/* 0x51600 - Messaging Interrupt Vector\/Priority Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
mivpr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mivpr1;		\/* Messaging IRQ Vector\/Priority 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
mivpr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mivpr1;		\/* 0x51620 - Messaging Interrupt Vector\/Priority Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
mivpr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mivpr2;		\/* Messaging IRQ Vector\/Priority 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
mivpr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mivpr2;		\/* 0x51640 - Messaging Interrupt Vector\/Priority Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
mivpr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mivpr3;		\/* Messaging IRQ Vector\/Priority 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
mivpr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mivpr3;		\/* 0x51660 - Messaging Interrupt Vector\/Priority Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
mix_sub_columns	lib/aes.c	/^static void mix_sub_columns(u8 *state)$/;"	f	typeref:typename:void	file:
mixctrl	drivers/mmc/fsl_esdhc.c	/^	uint    mixctrl;	\/* For USDHC *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
mixed-targets	Makefile	/^                        mixed-targets := 1$/;"	m
mixed-targets	Makefile	/^mixed-targets  := 0$/;"	m
mixed1io	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	mixed1io[22];			\/* 0x500 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[22]
mixed2io	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	mixed2io[8];			\/* 0x558 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32[8]
mk_cr_cmd	arch/powerpc/include/asm/cpm_8260.h	/^#define mk_cr_cmd(/;"	d
mk_cr_cmd	arch/powerpc/include/asm/cpm_85xx.h	/^#define mk_cr_cmd(/;"	d
mk_cr_cmd	examples/standalone/mem_to_mem_idma2intr.c	/^#define mk_cr_cmd(/;"	d	file:
mk_cr_cmd	include/commproc.h	/^#define mk_cr_cmd(/;"	d
mk_date	cmd/date.c	/^int mk_date (const char *datestr, struct rtc_time *tmp)$/;"	f	typeref:typename:int
mk_int_int_mask	include/mpc8xx_irq.h	/^#define	mk_int_int_mask(/;"	d
mk_mii_read	arch/powerpc/cpu/mpc8xx/fec.c	/^#define mk_mii_read(/;"	d	file:
mk_mii_read	drivers/net/mcfmii.c	/^#define mk_mii_read(/;"	d	file:
mk_mii_write	arch/powerpc/cpu/mpc8xx/fec.c	/^#define mk_mii_write(/;"	d	file:
mk_mii_write	drivers/net/mcfmii.c	/^#define mk_mii_write(/;"	d	file:
mk_pmb_addr_val	arch/sh/include/asm/cpu_sh4.h	/^#define mk_pmb_addr_val(/;"	d
mk_pmb_data_val	arch/sh/include/asm/cpu_sh4.h	/^#define mk_pmb_data_val(/;"	d
mkattr	scripts/kconfig/nconf.gui.c	/^#define mkattr(/;"	d	file:
mkattrn	scripts/kconfig/nconf.gui.c	/^#define mkattrn(/;"	d	file:
mkbp_config_flags	include/ec_commands.h	/^enum mkbp_config_flags {$/;"	g
mkbp_config_valid	include/ec_commands.h	/^enum mkbp_config_valid {$/;"	g
mkcksum	fs/fat/fat.c	/^static __u8 mkcksum(const char name[8], const char ext[3])$/;"	f	typeref:typename:__u8	file:
mkdir_p	test/py/conftest.py	/^def mkdir_p(path):$/;"	f
mkenvimage-objs	tools/Makefile	/^mkenvimage-objs := mkenvimage.o os_support.o lib\/crc32.o$/;"	m
mkfs_time	include/ext_common.h	/^	__le32 mkfs_time;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
mkhi_header	arch/x86/include/asm/me_common.h	/^struct mkhi_header {$/;"	s
mkimage-objs	tools/Makefile	/^mkimage-objs   := $(dumpimage-mkimage-objs) mkimage.o$/;"	m
mkmodestr	cmd/cramfs.c	/^char *mkmodestr(unsigned long mode, char *str)$/;"	f	typeref:typename:char *
mkmodestr	fs/jffs2/jffs2_1pass.c	/^char *mkmodestr(unsigned long mode, char *str)$/;"	f	typeref:typename:char *
mkmodestr	fs/jffs2/jffs2_nand_1pass.c	/^char *mkmodestr(unsigned long mode, char *str)$/;"	f	typeref:typename:char *
mlb_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	mlb_clk: mlb_clk {$/;"	l
mlb_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	mlb_clkin_ck: mlb_clkin_ck {$/;"	l
mlbclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mlbclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mlbp_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	mlbp_clk: mlbp_clk {$/;"	l
mlbp_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	mlbp_clkin_ck: mlbp_clkin_ck {$/;"	l
mloc	include/ddr_spd.h	/^	uint8_t mloc;			\/* 322 Mfg Location *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
mloc	include/ddr_spd.h	/^	unsigned char mloc;            \/* 119 Mfg Location *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
mloc	include/ddr_spd.h	/^	unsigned char mloc;        \/* 72 Manufacturing Location *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
mloc	include/ddr_spd.h	/^	unsigned char mloc;        \/* 72 Manufacturing Location *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
mloc	include/spd.h	/^	unsigned char mloc;        \/* 72 Manufacturing Location *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
mlwe0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mlwe0;	\/* Master Lock WEIM CS0 Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
mlwe1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mlwe1;	\/* Master Lock WEIM CS1 Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
mlwe2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mlwe2;	\/* Master Lock WEIM CS2 Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
mlwe3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mlwe3;	\/* Master Lock WEIM CS3 Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
mlwe4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mlwe4;	\/* Master Lock WEIM CS4 Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
mlwe5	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mlwe5;	\/* Master Lock WEIM CS5 Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
mm	arch/arm/include/asm/omap_common.h	/^	struct volts mm;$/;"	m	struct:vcores_data	typeref:struct:volts
mm_insn_16bit	arch/mips/include/asm/mipsregs.h	/^static inline int mm_insn_16bit(u16 insn)$/;"	f	typeref:typename:int
mm_last_addr	cmd/mem.c	/^static ulong	mm_last_addr, mm_last_size;$/;"	v	typeref:typename:ulong	file:
mm_last_size	cmd/mem.c	/^static ulong	mm_last_addr, mm_last_size;$/;"	v	typeref:typename:ulong	file:
mm_region	arch/arm/include/asm/armv8/mmu.h	/^struct mm_region {$/;"	s
mm_segment_t	arch/arm/include/asm/processor.h	/^typedef unsigned long mm_segment_t;		\/* domain register	*\/$/;"	t	typeref:typename:unsigned long
mm_segment_t	arch/mips/include/asm/processor.h	/^} mm_segment_t;$/;"	t	typeref:struct:__anonbd509b130108
mm_segment_t	arch/powerpc/include/asm/processor.h	/^} mm_segment_t;$/;"	t	typeref:struct:__anona42cec3a0108
mma8452	arch/arm/dts/rk3288-popmetal.dtsi	/^	mma8452: mma8452@1d {$/;"	l
mma8452	arch/arm/dts/sun6i-a31-colombus.dts	/^	mma8452: mma8452@1d {$/;"	l
mma8452_int_primo81	arch/arm/dts/sun6i-a31s-primo81.dts	/^	mma8452_int_primo81: mma8452_int_pin@0 {$/;"	l
mmalloc	include/jffs2/load_kernel.h	/^#define mmalloc	/;"	d
mmap	arch/arm/cpu/arm926ejs/armada100/dram.c	/^	struct armd1ddr_map_registers mmap[2];$/;"	m	struct:armd1ddr_registers	typeref:struct:armd1ddr_map_registers[2]	file:
mmap	tools/mingw_support.c	/^void *mmap(void *addr, size_t len, int prot, int flags, int fd, int offset)$/;"	f	typeref:typename:void *
mmap_chunk	common/dlmalloc.c	/^static mchunkptr mmap_chunk(size_t size)$/;"	f	typeref:typename:mchunkptr	file:
mmap_fdt	tools/fit_common.c	/^int mmap_fdt(const char *cmdname, const char *fname, size_t size_inc,$/;"	f	typeref:typename:int
mmap_threshold	common/dlmalloc.c	/^static unsigned long mmap_threshold   = DEFAULT_MMAP_THRESHOLD;$/;"	v	typeref:typename:unsigned long	file:
mmapped_mem	common/dlmalloc.c	/^static unsigned long mmapped_mem = 0;$/;"	v	typeref:typename:unsigned long	file:
mmc	drivers/mmc/atmel_sdhci.c	/^	struct mmc mmc;$/;"	m	struct:atmel_sdhci_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/exynos_dw_mmc.c	/^	struct mmc mmc;$/;"	m	struct:exynos_mmc_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/fsl_esdhc.c	/^	struct mmc *mmc;$/;"	m	struct:fsl_esdhc_priv	typeref:struct:mmc *	file:
mmc	drivers/mmc/msm_sdhci.c	/^	struct mmc mmc;$/;"	m	struct:msm_sdhc_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/mxcmmc.c	/^	struct mmc		*mmc;$/;"	m	struct:mxcmci_host	typeref:struct:mmc *	file:
mmc	drivers/mmc/rockchip_dw_mmc.c	/^	struct mmc mmc;$/;"	m	struct:rockchip_mmc_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/rockchip_sdhci.c	/^	struct mmc mmc;$/;"	m	struct:rockchip_sdhc_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/s5p_sdhci.c	/^	struct mmc mmc;$/;"	m	struct:s5p_sdhci_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/sandbox_mmc.c	/^	struct mmc mmc;$/;"	m	struct:sandbox_mmc_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/socfpga_dw_mmc.c	/^	struct mmc mmc;$/;"	m	struct:socfpga_dwmci_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/tegra_mmc.c	/^	struct mmc *mmc;$/;"	m	struct:tegra_mmc_priv	typeref:struct:mmc *	file:
mmc	drivers/mmc/uniphier-sd.c	/^	struct mmc mmc;$/;"	m	struct:uniphier_sd_plat	typeref:struct:mmc	file:
mmc	drivers/mmc/zynq_sdhci.c	/^	struct mmc mmc;$/;"	m	struct:arasan_sdhci_plat	typeref:struct:mmc	file:
mmc	include/dfu.h	/^		struct mmc_internal_data mmc;$/;"	m	union:dfu_entity::__anona51660ed010a	typeref:struct:mmc_internal_data
mmc	include/dwmmc.h	/^	struct mmc *mmc;$/;"	m	struct:dwmci_host	typeref:struct:mmc *
mmc	include/mmc.h	/^	struct mmc *mmc;$/;"	m	struct:mmc_uclass_priv	typeref:struct:mmc *
mmc	include/mmc.h	/^struct mmc {$/;"	s
mmc	include/sdhci.h	/^	struct mmc *mmc;$/;"	m	struct:sdhci_host	typeref:struct:mmc *
mmc0	arch/arm/dts/at91sam9260.dtsi	/^			mmc0: mmc@fffa8000 {$/;"	l
mmc0	arch/arm/dts/at91sam9261.dtsi	/^			mmc0: mmc@fffa8000 {$/;"	l
mmc0	arch/arm/dts/at91sam9263.dtsi	/^			mmc0: mmc@fff80000 {$/;"	l
mmc0	arch/arm/dts/at91sam9g45-gurnard.dts	/^			mmc0: mmc@fff80000 {$/;"	l
mmc0	arch/arm/dts/at91sam9g45.dtsi	/^			mmc0: mmc@fff80000 {$/;"	l
mmc0	arch/arm/dts/k2g.dtsi	/^		mmc0: mmc@23000000 {$/;"	l
mmc0	arch/arm/dts/socfpga.dtsi	/^		mmc0: dwmmc0@ff704000 {$/;"	l
mmc0	arch/arm/dts/socfpga_arria5.dtsi	/^		mmc0: dwmmc0@ff704000 {$/;"	l
mmc0	arch/arm/dts/socfpga_cyclone5.dtsi	/^		mmc0: dwmmc0@ff704000 {$/;"	l
mmc0	arch/arm/dts/sun4i-a10.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun50i-a64.dtsi	/^		mmc0: mmc@1c0f000 {$/;"	l
mmc0	arch/arm/dts/sun5i.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun6i-a31.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun7i-a20-primo73.dts	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun7i-a20.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun8i-a23-a33.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun8i-h3.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0	arch/arm/dts/sun9i-a80.dtsi	/^		mmc0: mmc@01c0f000 {$/;"	l
mmc0_cd_pin	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	mmc0_cd_pin: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin	arch/arm/dts/sun8i-h3.dtsi	/^			mmc0_cd_pin: mmc0_cd_pin@0 {$/;"	l	label:pio
mmc0_cd_pin	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	mmc0_cd_pin: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_bananapi	arch/arm/dts/sun7i-a20-bananapi.dts	/^	mmc0_cd_pin_bananapi: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_bananapro	arch/arm/dts/sun7i-a20-bananapro.dts	/^	mmc0_cd_pin_bananapro: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_bpi_m1p	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	mmc0_cd_pin_bpi_m1p: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_bpi_m2	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	mmc0_cd_pin_bpi_m2: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_bs1078v2	arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts	/^	mmc0_cd_pin_bs1078v2: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_colombus	arch/arm/dts/sun6i-a31-colombus.dts	/^	mmc0_cd_pin_colombus: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_cubieboard4	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^	mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_d709	arch/arm/dts/sun5i-a13-empire-electronix-d709.dts	/^	mmc0_cd_pin_d709: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_e708_q1	arch/arm/dts/sun6i-reference-design-tablet.dtsi	/^	mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_evb	arch/arm/dts/sun8i-a23-evb.dts	/^	mmc0_cd_pin_evb: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_h702	arch/arm/dts/sun5i-a13-hsg-h702.dts	/^	mmc0_cd_pin_h702: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_hummingbird	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_i7	arch/arm/dts/sun6i-a31-i7.dts	/^	mmc0_cd_pin_i7: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_inet98fv2	arch/arm/dts/sun5i-a13-inet-98v-rev2.dts	/^	mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_lamobo_r1	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^	mmc0_cd_pin_lamobo_r1: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_m9	arch/arm/dts/sun6i-a31-m9.dts	/^	mmc0_cd_pin_m9: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_m9	arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts	/^	mmc0_cd_pin_m9: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_mk802	arch/arm/dts/sun5i-a10s-mk802.dts	/^	mmc0_cd_pin_mk802: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_olinuxino	arch/arm/dts/sun5i-a13-olinuxino.dts	/^	mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_olinuxino	arch/arm/dts/sun8i-a33-olinuxino.dts	/^	mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_olinuxino_micro	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_olinuxinom	arch/arm/dts/sun5i-a13-olinuxino-micro.dts	/^	mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_optimus	arch/arm/dts/sun9i-a80-optimus.dts	/^	mmc0_cd_pin_optimus: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_orangepi	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_orangepi	arch/arm/dts/sun7i-a20-orangepi.dts	/^	mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_parrot	arch/arm/dts/sun8i-r16-parrot.dts	/^	mmc0_cd_pin_parrot: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_primo81	arch/arm/dts/sun6i-a31s-primo81.dts	/^	mmc0_cd_pin_primo81: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_q8	arch/arm/dts/sun5i-q8-common.dtsi	/^	mmc0_cd_pin_q8: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_r7	arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts	/^	mmc0_cd_pin_r7: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_reference_design	arch/arm/dts/sun4i-a10.dtsi	/^			mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {$/;"	l	label:pio
mmc0_cd_pin_reference_design	arch/arm/dts/sun7i-a20.dtsi	/^			mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {$/;"	l	label:pio
mmc0_cd_pin_sina31s	arch/arm/dts/sun6i-a31s-sina31s.dts	/^	mmc0_cd_pin_sina31s: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_sina33	arch/arm/dts/sun8i-a33-sinlinx-sina33.dts	/^	mmc0_cd_pin_sina33: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_t003	arch/arm/dts/sun5i-a10s-auxtek-t003.dts	/^	mmc0_cd_pin_t003: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_t004	arch/arm/dts/sun5i-a10s-auxtek-t004.dts	/^	mmc0_cd_pin_t004: mmc0_cd_pin@0 {$/;"	l
mmc0_cd_pin_wobo_i5	arch/arm/dts/sun5i-a10s-wobo-i5.dts	/^	mmc0_cd_pin_wobo_i5: mmc0_cd_pin@0 {$/;"	l
mmc0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		mmc0_clk: clk@01c20088 {$/;"	l
mmc0_clk	arch/arm/dts/sun50i-a64.dtsi	/^		mmc0_clk: mmc0_clk@1c20088 {$/;"	l
mmc0_clk	arch/arm/dts/sun5i.dtsi	/^		mmc0_clk: clk@01c20088 {$/;"	l
mmc0_clk	arch/arm/dts/sun6i-a31.dtsi	/^		mmc0_clk: clk@01c20088 {$/;"	l
mmc0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		mmc0_clk: clk@01c20088 {$/;"	l
mmc0_clk	arch/arm/dts/sun8i-a23-a33.dtsi	/^		mmc0_clk: clk@01c20088 {$/;"	l
mmc0_clk	arch/arm/dts/sun9i-a80.dtsi	/^		mmc0_clk: clk@06000410 {$/;"	l
mmc0_clk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mmc0_clk;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_clk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mmc0_clk;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_cmd	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mmc0_cmd;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_cmd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mmc0_cmd;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mmc0_dat0;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mmc0_dat0;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mmc0_dat1;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mmc0_dat1;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mmc0_dat2;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mmc0_dat2;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat3	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int mmc0_dat3;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_dat3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int mmc0_dat3;$/;"	m	struct:pad_signals	typeref:typename:int
mmc0_default_cd_pin	arch/arm/dts/sun50i-a64.dtsi	/^			mmc0_default_cd_pin: mmc0_cd_pin@0 {$/;"	l	label:pio
mmc0_no_cd_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux mmc0_no_cd_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/gumstix/pepper/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/isee/igep0033/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/silica/pengwyn/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux mmc0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pin_mux_sk_evm	board/ti/am335x/mux.c	/^static struct module_pin_mux mmc0_pin_mux_sk_evm[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc0_pins	arch/arm/dts/sun50i-a64.dtsi	/^			mmc0_pins: mmc0@0 {$/;"	l	label:pio
mmc0_pins	arch/arm/dts/sun9i-a80.dtsi	/^			mmc0_pins: mmc0 {$/;"	l	label:pio
mmc0_pins	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config mmc0_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
mmc0_pins	board/davinci/da8xxevm/omapl138_lcdk.c	/^const struct pinmux_config mmc0_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
mmc0_pins_8bit	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config mmc0_pins_8bit[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
mmc0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_a	arch/arm/dts/sun5i.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_a	arch/arm/dts/sun8i-a83t.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_a	arch/arm/dts/sun8i-h3.dtsi	/^			mmc0_pins_a: mmc0@0 {$/;"	l	label:pio
mmc0_pins_default	arch/arm/dts/am335x-icev2.dts	/^	mmc0_pins_default: mmc0_pins_default {$/;"	l
mmc0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mmc0clkctrl;	\/* offset 0x3C *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mmc0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mmc0clkctrl;	\/* offset 0x4C0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mmc1	arch/arm/dts/am33xx.dtsi	/^		mmc1: mmc@48060000 {$/;"	l
mmc1	arch/arm/dts/am4372.dtsi	/^		mmc1: mmc@48060000 {$/;"	l
mmc1	arch/arm/dts/at91sam9263.dtsi	/^			mmc1: mmc@fff84000 {$/;"	l
mmc1	arch/arm/dts/at91sam9g45.dtsi	/^			mmc1: mmc@fffd0000 {$/;"	l
mmc1	arch/arm/dts/dra7.dtsi	/^		mmc1: mmc@4809c000 {$/;"	l
mmc1	arch/arm/dts/k2g.dtsi	/^		mmc1: mmc@23100000 {$/;"	l
mmc1	arch/arm/dts/sun4i-a10.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1	arch/arm/dts/sun50i-a64.dtsi	/^		mmc1: mmc@1c10000 {$/;"	l
mmc1	arch/arm/dts/sun5i.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1	arch/arm/dts/sun6i-a31.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1	arch/arm/dts/sun7i-a20.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1	arch/arm/dts/sun8i-a23-a33.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1	arch/arm/dts/sun8i-h3.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1	arch/arm/dts/sun9i-a80.dtsi	/^		mmc1: mmc@01c10000 {$/;"	l
mmc1_cd_pin_olinuxino_micro	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {$/;"	l
mmc1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		mmc1_clk: clk@01c2008c {$/;"	l
mmc1_clk	arch/arm/dts/sun50i-a64.dtsi	/^		mmc1_clk: mmc1_clk@1c2008c {$/;"	l
mmc1_clk	arch/arm/dts/sun5i.dtsi	/^		mmc1_clk: clk@01c2008c {$/;"	l
mmc1_clk	arch/arm/dts/sun6i-a31.dtsi	/^		mmc1_clk: clk@01c2008c {$/;"	l
mmc1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		mmc1_clk: clk@01c2008c {$/;"	l
mmc1_clk	arch/arm/dts/sun8i-a23-a33.dtsi	/^		mmc1_clk: clk@01c2008c {$/;"	l
mmc1_clk	arch/arm/dts/sun9i-a80.dtsi	/^		mmc1_clk: clk@06000414 {$/;"	l
mmc1_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc1_clk32k: mmc1_clk32k {$/;"	l
mmc1_fclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc1_fclk_div: mmc1_fclk_div {$/;"	l
mmc1_fclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc1_fclk_mux: mmc1_fclk_mux {$/;"	l
mmc1_init_pll	board/hisilicon/hikey/hikey.c	/^static void mmc1_init_pll(void)$/;"	f	typeref:typename:void	file:
mmc1_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pin_mux	board/ti/ti814x/mux.c	/^static struct module_pin_mux mmc1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc1_pins	arch/arm/dts/am335x-bone-common.dtsi	/^	mmc1_pins: pinmux_mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/am335x-evm.dts	/^	mmc1_pins: pinmux_mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/am335x-evmsk.dts	/^	mmc1_pins: pinmux_mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/am335x-rut.dts	/^	mmc1_pins: mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/am437x-gp-evm.dts	/^	mmc1_pins: pinmux_mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/am437x-sk-evm.dts	/^	mmc1_pins: pinmux_mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/am43x-epos-evm.dts	/^		mmc1_pins: pinmux_mmc1_pins {$/;"	l
mmc1_pins	arch/arm/dts/sun50i-a64.dtsi	/^			mmc1_pins: mmc1@0 {$/;"	l	label:pio
mmc1_pins_a	arch/arm/dts/sun5i-a10s.dtsi	/^	mmc1_pins_a: mmc1@0 {$/;"	l
mmc1_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			mmc1_pins_a: mmc1@0 {$/;"	l	label:pio
mmc1_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			mmc1_pins_a: mmc1@0 {$/;"	l	label:pio
mmc1_pins_a	arch/arm/dts/sun8i-h3.dtsi	/^			mmc1_pins_a: mmc1@0 {$/;"	l	label:pio
mmc1_pins_default	arch/arm/dts/am437x-idk-evm.dts	/^	mmc1_pins_default: pinmux_mmc1_pins_default {$/;"	l
mmc1_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	mmc1_pins_default: mmc1_pins_default {$/;"	l
mmc1_pins_default	arch/arm/dts/dra72-evm-common.dtsi	/^	mmc1_pins_default: mmc1_pins_default {$/;"	l
mmc1_pins_sleep	arch/arm/dts/am437x-idk-evm.dts	/^	mmc1_pins_sleep: pinmux_mmc1_pins_sleep {$/;"	l
mmc1_reset_clk	board/hisilicon/hikey/hikey.c	/^static void mmc1_reset_clk(void)$/;"	f	typeref:typename:void	file:
mmc1_vcc_en_pin_t004	arch/arm/dts/sun5i-a10s-auxtek-t004.dts	/^	mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin@0 {$/;"	l
mmc1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mmc1clkctrl;	\/* offset 0x4C8 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mmc1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mmc1clkctrl;	\/* offset 0xF4 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mmc2	arch/arm/dts/am33xx.dtsi	/^		mmc2: mmc@481d8000 {$/;"	l
mmc2	arch/arm/dts/am4372.dtsi	/^		mmc2: mmc@481d8000 {$/;"	l
mmc2	arch/arm/dts/dra7.dtsi	/^		mmc2: mmc@480b4000 {$/;"	l
mmc2	arch/arm/dts/sun4i-a10.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2	arch/arm/dts/sun50i-a64.dtsi	/^		mmc2: mmc@1c11000 {$/;"	l
mmc2	arch/arm/dts/sun5i.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2	arch/arm/dts/sun6i-a31.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2	arch/arm/dts/sun7i-a20.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2	arch/arm/dts/sun8i-a23-a33.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2	arch/arm/dts/sun8i-h3.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2	arch/arm/dts/sun9i-a80.dtsi	/^		mmc2: mmc@01c11000 {$/;"	l
mmc2_3v3	arch/arm/dts/dra7-evm.dts	/^	mmc2_3v3: fixedregulator-mmc2 {$/;"	l
mmc2_8bit_emmc_pins	arch/arm/dts/sun6i-a31.dtsi	/^			mmc2_8bit_emmc_pins: mmc2@1 {$/;"	l	label:pio
mmc2_8bit_pins	arch/arm/dts/sun8i-a23-a33.dtsi	/^			mmc2_8bit_pins: mmc2_8bit {$/;"	l	label:pio
mmc2_8bit_pins	arch/arm/dts/sun8i-h3.dtsi	/^			mmc2_8bit_pins: mmc2_8bit {$/;"	l	label:pio
mmc2_8bit_pins	arch/arm/dts/sun9i-a80.dtsi	/^			mmc2_8bit_pins: mmc2_8bit {$/;"	l	label:pio
mmc2_clk	arch/arm/dts/sun4i-a10.dtsi	/^		mmc2_clk: clk@01c20090 {$/;"	l
mmc2_clk	arch/arm/dts/sun50i-a64.dtsi	/^		mmc2_clk: mmc2_clk@1c20090 {$/;"	l
mmc2_clk	arch/arm/dts/sun5i.dtsi	/^		mmc2_clk: clk@01c20090 {$/;"	l
mmc2_clk	arch/arm/dts/sun6i-a31.dtsi	/^		mmc2_clk: clk@01c20090 {$/;"	l
mmc2_clk	arch/arm/dts/sun7i-a20.dtsi	/^		mmc2_clk: clk@01c20090 {$/;"	l
mmc2_clk	arch/arm/dts/sun8i-a23-a33.dtsi	/^		mmc2_clk: clk@01c20090 {$/;"	l
mmc2_clk	arch/arm/dts/sun9i-a80.dtsi	/^		mmc2_clk: clk@06000418 {$/;"	l
mmc2_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc2_clk32k: mmc2_clk32k {$/;"	l
mmc2_fclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc2_fclk_div: mmc2_fclk_div {$/;"	l
mmc2_fclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc2_fclk_mux: mmc2_fclk_mux {$/;"	l
mmc2_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux mmc2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc2_pins	arch/arm/dts/am335x-evmsk.dts	/^	mmc2_pins: pinmux_mmc2_pins {$/;"	l
mmc2_pins	arch/arm/dts/sun50i-a64.dtsi	/^			mmc2_pins: mmc2@0 {$/;"	l	label:pio
mmc2_pins_a	arch/arm/dts/sun5i.dtsi	/^			mmc2_pins_a: mmc2@0 {$/;"	l	label:pio
mmc2_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			mmc2_pins_a: mmc2@0 {$/;"	l	label:pio
mmc2_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			mmc2_pins_a: mmc2@0 {$/;"	l	label:pio
mmc2_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	mmc2_pins_default: mmc2_pins_default {$/;"	l
mmc2_pins_default	arch/arm/dts/dra72-evm-common.dtsi	/^	mmc2_pins_default: mmc2_pins_default {$/;"	l
mmc2_pins_nrst	arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts	/^	mmc2_pins_nrst: mmc2@0 {$/;"	l
mmc2_pwrseq	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	mmc2_pwrseq: mmc2_pwrseq {$/;"	l
mmc2_pwrseq	arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts	/^	mmc2_pwrseq: pwrseq {$/;"	l
mmc2_pwrseq_pin_bpi_m2	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin@0 {$/;"	l
mmc2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mmc2clkctrl;	\/* offset 0x248 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mmc2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mmc2clkctrl;	\/* offset 0xF8 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
mmc3	arch/arm/dts/am33xx.dtsi	/^		mmc3: mmc@47810000 {$/;"	l
mmc3	arch/arm/dts/am4372.dtsi	/^		mmc3: mmc@47810000 {$/;"	l
mmc3	arch/arm/dts/dra7.dtsi	/^		mmc3: mmc@480ad000 {$/;"	l
mmc3	arch/arm/dts/sun4i-a10.dtsi	/^		mmc3: mmc@01c12000 {$/;"	l
mmc3	arch/arm/dts/sun6i-a31.dtsi	/^		mmc3: mmc@01c12000 {$/;"	l
mmc3	arch/arm/dts/sun7i-a20.dtsi	/^		mmc3: mmc@01c12000 {$/;"	l
mmc3	arch/arm/dts/sun9i-a80.dtsi	/^		mmc3: mmc@01c12000 {$/;"	l
mmc3_8bit_emmc_pins	arch/arm/dts/sun6i-a31.dtsi	/^			mmc3_8bit_emmc_pins: mmc3@1 {$/;"	l	label:pio
mmc3_cd_pin_olimex_som_evb	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin@0 {$/;"	l
mmc3_cd_pin_olinuxinom	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {$/;"	l
mmc3_cd_pin_orangepi	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	mmc3_cd_pin_orangepi: mmc3_cd_pin@0 {$/;"	l
mmc3_clk	arch/arm/dts/sun4i-a10.dtsi	/^		mmc3_clk: clk@01c20094 {$/;"	l
mmc3_clk	arch/arm/dts/sun6i-a31.dtsi	/^		mmc3_clk: clk@01c20094 {$/;"	l
mmc3_clk	arch/arm/dts/sun7i-a20.dtsi	/^		mmc3_clk: clk@01c20094 {$/;"	l
mmc3_clk	arch/arm/dts/sun9i-a80.dtsi	/^		mmc3_clk: clk@0600041c {$/;"	l
mmc3_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc3_clk32k: mmc3_clk32k {$/;"	l
mmc3_gfclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc3_gfclk_div: mmc3_gfclk_div {$/;"	l
mmc3_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc3_gfclk_mux: mmc3_gfclk_mux {$/;"	l
mmc3_pins	arch/arm/dts/am335x-evm.dts	/^	mmc3_pins: pinmux_mmc3_pins {$/;"	l
mmc3_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			mmc3_pins_a: mmc3@0 {$/;"	l	label:pio
mmc3_pins_default	arch/arm/dts/am437x-gp-evm.dts	/^	mmc3_pins_default: pinmux_mmc3_pins_default {$/;"	l
mmc3_pins_sleep	arch/arm/dts/am437x-gp-evm.dts	/^	mmc3_pins_sleep: pinmux_mmc3_pins_sleep {$/;"	l
mmc3_pwrseq	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	mmc3_pwrseq: mmc3_pwrseq {$/;"	l
mmc3_pwrseq	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	mmc3_pwrseq: mmc3_pwrseq {$/;"	l
mmc3_pwrseq	arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts	/^	mmc3_pwrseq: mmc3_pwrseq {$/;"	l
mmc3_pwrseq_pin_bpi_m1p	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin@0 {$/;"	l
mmc3_pwrseq_pin_cubietruck	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	mmc3_pwrseq_pin_cubietruck: mmc3_pwrseq_pin@0 {$/;"	l
mmc3_vdd_pin_a20_hummingbird	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin@0 {$/;"	l
mmc4	arch/arm/dts/dra7.dtsi	/^		mmc4: mmc@480d1000 {$/;"	l
mmc4_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc4_clk32k: mmc4_clk32k {$/;"	l
mmc4_gfclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc4_gfclk_div: mmc4_gfclk_div {$/;"	l
mmc4_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	mmc4_gfclk_mux: mmc4_gfclk_mux {$/;"	l
mmc_adapter_card_type_ident	drivers/mmc/fsl_esdhc.c	/^void mmc_adapter_card_type_ident(void)$/;"	f	typeref:typename:void
mmc_berase	drivers/mmc/mmc_private.h	/^static inline unsigned long mmc_berase(struct blk_desc *block_dev,$/;"	f	typeref:typename:unsigned long
mmc_berase	drivers/mmc/mmc_private.h	/^static inline unsigned long mmc_berase(struct udevice *dev,$/;"	f	typeref:typename:unsigned long
mmc_berase	drivers/mmc/mmc_write.c	/^ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)$/;"	f	typeref:typename:ulong
mmc_bind	drivers/mmc/mmc-uclass.c	/^int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)$/;"	f	typeref:typename:int
mmc_blk_ops	drivers/mmc/mmc-uclass.c	/^static const struct blk_ops mmc_blk_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
mmc_block_op	drivers/dfu/dfu_mmc.c	/^static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
mmc_board_init	drivers/mmc/omap_hsmmc.c	/^static unsigned char mmc_board_init(struct mmc *mmc)$/;"	f	typeref:typename:unsigned char	file:
mmc_boot	drivers/mmc/fsl_esdhc_spl.c	/^void __noreturn mmc_boot(void)$/;"	f	typeref:typename:void __noreturn
mmc_boot_partition_size_change	drivers/mmc/mmc_boot.c	/^int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,$/;"	f	typeref:typename:int
mmc_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int mmc_boot_selected(void)$/;"	f	typeref:typename:int
mmc_bread	drivers/mmc/mmc.c	/^ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)$/;"	f	typeref:typename:ulong
mmc_bwrite	drivers/mmc/mmc_private.h	/^static inline ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:ulong
mmc_bwrite	drivers/mmc/mmc_private.h	/^static inline ulong mmc_bwrite(struct udevice *dev, lbaint_t start,$/;"	f	typeref:typename:ulong
mmc_bwrite	drivers/mmc/mmc_write.c	/^ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong
mmc_card_blockaddr	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^	void *mmc_card_blockaddr;$/;"	m	struct:uniphier_romfunc_table	typeref:typename:void *	file:
mmc_cd	drivers/mmc/mxsmmc.c	/^	int			(*mmc_cd)(int);$/;"	m	struct:mxsmmc_priv	typeref:typename:int (*)(int)	file:
mmc_change_freq	drivers/mmc/mmc.c	/^static int mmc_change_freq(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_cid	include/mmc.h	/^struct mmc_cid {$/;"	s
mmc_clk	arch/arm/dts/am33xx-clocks.dtsi	/^	mmc_clk: mmc_clk {$/;"	l
mmc_clk	arch/arm/dts/am43xx-clocks.dtsi	/^	mmc_clk: mmc_clk {$/;"	l
mmc_clk_io_on	drivers/mmc/sunxi_mmc.c	/^static int mmc_clk_io_on(int sdc_no)$/;"	f	typeref:typename:int	file:
mmc_cmd	include/mmc.h	/^struct mmc_cmd {$/;"	s
mmc_complete_init	drivers/mmc/mmc.c	/^static int mmc_complete_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_complete_op_cond	drivers/mmc/mmc.c	/^static int mmc_complete_op_cond(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_config	include/mmc.h	/^struct mmc_config {$/;"	s
mmc_config_clk	arch/arm/dts/sun9i-a80.dtsi	/^		mmc_config_clk: clk@01c13000 {$/;"	l
mmc_config_clock	drivers/mmc/sunxi_mmc.c	/^static int mmc_config_clock(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_create	drivers/mmc/mmc_legacy.c	/^struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)$/;"	f	typeref:struct:mmc *
mmc_data	include/mmc.h	/^struct mmc_data {$/;"	s
mmc_destroy	drivers/mmc/mmc_legacy.c	/^void mmc_destroy(struct mmc *mmc)$/;"	f	typeref:typename:void
mmc_devices	drivers/mmc/mmc_legacy.c	/^static struct list_head mmc_devices;$/;"	v	typeref:struct:list_head	file:
mmc_do_preinit	drivers/mmc/mmc-uclass.c	/^void mmc_do_preinit(void)$/;"	f	typeref:typename:void
mmc_do_preinit	drivers/mmc/mmc_legacy.c	/^void mmc_do_preinit(void)$/;"	f	typeref:typename:void
mmc_erase_t	drivers/mmc/mmc_write.c	/^static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)$/;"	f	typeref:typename:ulong	file:
mmc_file_buffer	drivers/dfu/dfu_mmc.c	/^static int mmc_file_buffer(struct dfu_entity *dfu, void *buf, long *len)$/;"	f	typeref:typename:int	file:
mmc_file_op	drivers/dfu/dfu_mmc.c	/^static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
mmc_file_unbuffer	drivers/dfu/dfu_mmc.c	/^static int mmc_file_unbuffer(struct dfu_entity *dfu, u64 offset, void *buf,$/;"	f	typeref:typename:int	file:
mmc_get_blk_desc	drivers/mmc/mmc-uclass.c	/^struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)$/;"	f	typeref:struct:blk_desc *
mmc_get_blk_desc	drivers/mmc/mmc_legacy.c	/^struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)$/;"	f	typeref:struct:blk_desc *
mmc_get_boot_dev	arch/arm/cpu/armv7/mx6/soc.c	/^static int mmc_get_boot_dev(void)$/;"	f	typeref:typename:int	file:
mmc_get_dev	drivers/mmc/mmc_legacy.c	/^static int mmc_get_dev(int dev, struct blk_desc **descp)$/;"	f	typeref:typename:int	file:
mmc_get_env_addr	board/freescale/common/sdhc_boot.c	/^int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)$/;"	f	typeref:typename:int
mmc_get_env_addr	board/gdsys/p1022/sdhc_boot.c	/^int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)$/;"	f	typeref:typename:int
mmc_get_env_addr	common/env_mmc.c	/^__weak int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)$/;"	f	typeref:typename:__weak int
mmc_get_env_dev	arch/arm/cpu/armv7/mx6/soc.c	/^int mmc_get_env_dev(void)$/;"	f	typeref:typename:int
mmc_get_env_dev	arch/arm/cpu/armv7/mx7/soc.c	/^int mmc_get_env_dev(void)$/;"	f	typeref:typename:int
mmc_get_env_dev	arch/arm/mach-uniphier/boot-mode/boot-mode.c	/^int mmc_get_env_dev(void)$/;"	f	typeref:typename:int
mmc_get_env_dev	common/env_mmc.c	/^__weak int mmc_get_env_dev(void)$/;"	f	typeref:typename:__weak int
mmc_get_env_part	arch/arm/cpu/armv7/mx6/soc.c	/^uint mmc_get_env_part(struct mmc *mmc)$/;"	f	typeref:typename:uint
mmc_get_env_part	board/compulab/cm_t54/cm_t54.c	/^uint mmc_get_env_part(struct mmc *mmc)$/;"	f	typeref:typename:uint
mmc_get_env_part	common/env_mmc.c	/^__weak uint mmc_get_env_part(struct mmc *mmc)$/;"	f	typeref:typename:__weak uint
mmc_get_mmc_dev	drivers/mmc/mmc-uclass.c	/^struct mmc *mmc_get_mmc_dev(struct udevice *dev)$/;"	f	typeref:struct:mmc *
mmc_get_next_devnum	drivers/mmc/mmc-uclass.c	/^int mmc_get_next_devnum(void)$/;"	f	typeref:typename:int
mmc_get_next_devnum	drivers/mmc/mmc_legacy.c	/^int mmc_get_next_devnum(void)$/;"	f	typeref:typename:int
mmc_get_ops	include/mmc.h	/^#define mmc_get_ops(/;"	d
mmc_getcd	drivers/mmc/mmc-uclass.c	/^int mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_getcd	drivers/mmc/mmc.c	/^int mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_getwp	drivers/mmc/mmc-uclass.c	/^int mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_getwp	drivers/mmc/mmc.c	/^int mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_go_idle	drivers/mmc/mmc.c	/^static int mmc_go_idle(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_host	drivers/mmc/sunxi_mmc.c	/^struct sunxi_mmc_host mmc_host[4];$/;"	v	typeref:struct:sunxi_mmc_host[4]
mmc_host	include/faraday/ftsdc010.h	/^struct mmc_host {$/;"	s
mmc_host_is_spi	include/mmc.h	/^#define mmc_host_is_spi(/;"	d
mmc_host_reset	drivers/mmc/arm_pl180_mmci.c	/^static int mmc_host_reset(struct mmc *dev)$/;"	f	typeref:typename:int	file:
mmc_hwpart_conf	include/mmc.h	/^struct mmc_hwpart_conf {$/;"	s
mmc_hwpart_conf_mode	include/mmc.h	/^enum mmc_hwpart_conf_mode {$/;"	g
mmc_hwpart_config	drivers/mmc/mmc.c	/^int mmc_hwpart_config(struct mmc *mmc,$/;"	f	typeref:typename:int
mmc_init	drivers/mmc/mmc.c	/^int mmc_init(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_init_stream	drivers/mmc/omap_hsmmc.c	/^void mmc_init_stream(struct hsmmc *mmc_base)$/;"	f	typeref:typename:void
mmc_initialize	drivers/mmc/mmc.c	/^int mmc_initialize(bd_t *bis)$/;"	f	typeref:typename:int
mmc_internal_data	include/dfu.h	/^struct mmc_internal_data {$/;"	s
mmc_intr_time	include/faraday/ftsdc010.h	/^	unsigned int	mmc_intr_time;	\/* 0x44 - MMC int resp time reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
mmc_is_wp	drivers/mmc/mxsmmc.c	/^	int			(*mmc_is_wp)(int);$/;"	m	struct:mxsmmc_priv	typeref:typename:int (*)(int)	file:
mmc_late_init	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static void mmc_late_init(void)$/;"	f	typeref:typename:void	file:
mmc_list_add	drivers/mmc/mmc_legacy.c	/^void mmc_list_add(struct mmc *mmc)$/;"	f	typeref:typename:void
mmc_list_init	drivers/mmc/mmc_legacy.c	/^void mmc_list_init(void)$/;"	f	typeref:typename:void
mmc_load_image	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^	void *mmc_load_image;$/;"	m	struct:uniphier_romfunc_table	typeref:typename:void *	file:
mmc_load_image_raw_os	common/spl/spl_mmc.c	/^static int mmc_load_image_raw_os(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
mmc_load_image_raw_partition	common/spl/spl_mmc.c	/^static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
mmc_load_image_raw_sector	common/spl/spl_mmc.c	/^static int mmc_load_image_raw_sector(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
mmc_load_legacy	common/spl/spl_mmc.c	/^static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,$/;"	f	typeref:typename:int	file:
mmc_map_to_kernel_blk	board/freescale/mx6ullevk/mx6ullevk.c	/^int mmc_map_to_kernel_blk(int devno)$/;"	f	typeref:typename:int
mmc_map_to_kernel_blk	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static int mmc_map_to_kernel_blk(int dev_no)$/;"	f	typeref:typename:int	file:
mmc_no	drivers/mmc/sunxi_mmc.c	/^	unsigned mmc_no;$/;"	m	struct:sunxi_mmc_host	typeref:typename:unsigned	file:
mmc_nspi	cmd/dataflash_mmc_mux.c	/^static int mmc_nspi (const char *s)$/;"	f	typeref:typename:int	file:
mmc_ops	include/mmc.h	/^struct mmc_ops {$/;"	s
mmc_pin_mux	board/ti/ti816x/evm.c	/^static struct module_pin_mux mmc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
mmc_pinmux_setup	board/sunxi/board.c	/^static void mmc_pinmux_setup(int sdc)$/;"	f	typeref:typename:void	file:
mmc_power_init	drivers/mmc/mmc.c	/^static int mmc_power_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_priv	drivers/mmc/sh_sdhi.c	/^static void *mmc_priv(struct mmc *mmc)$/;"	f	typeref:typename:void *	file:
mmc_probe	drivers/mmc/mmc.c	/^static int mmc_probe(bd_t *bis)$/;"	f	typeref:typename:int	file:
mmc_read_blocks	drivers/mmc/mmc.c	/^static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,$/;"	f	typeref:typename:int	file:
mmc_read_data	drivers/mmc/omap_hsmmc.c	/^static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size)$/;"	f	typeref:typename:int	file:
mmc_reg_out	arch/arm/include/asm/omap_mmc.h	/^#define mmc_reg_out(/;"	d
mmc_reset_controller_fsm	drivers/mmc/omap_hsmmc.c	/^static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit)$/;"	f	typeref:typename:void	file:
mmc_resource_init	drivers/mmc/sunxi_mmc.c	/^static int mmc_resource_init(int sdc_no)$/;"	f	typeref:typename:int	file:
mmc_rint_wait	drivers/mmc/sunxi_mmc.c	/^static int mmc_rint_wait(struct mmc *mmc, unsigned int timeout_msecs,$/;"	f	typeref:typename:int	file:
mmc_rpmb_get_counter	drivers/mmc/rpmb.c	/^int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *pcounter)$/;"	f	typeref:typename:int
mmc_rpmb_read	drivers/mmc/rpmb.c	/^int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,$/;"	f	typeref:typename:int
mmc_rpmb_request	drivers/mmc/rpmb.c	/^static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,$/;"	f	typeref:typename:int	file:
mmc_rpmb_response	drivers/mmc/rpmb.c	/^static int mmc_rpmb_response(struct mmc *mmc, struct s_rpmb *s,$/;"	f	typeref:typename:int	file:
mmc_rpmb_set_key	drivers/mmc/rpmb.c	/^int mmc_rpmb_set_key(struct mmc *mmc, void *key)$/;"	f	typeref:typename:int
mmc_rpmb_status	drivers/mmc/rpmb.c	/^static int mmc_rpmb_status(struct mmc *mmc, unsigned short expected)$/;"	f	typeref:typename:int	file:
mmc_rpmb_write	drivers/mmc/rpmb.c	/^int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,$/;"	f	typeref:typename:int
mmc_sd0	board/davinci/da8xxevm/da850evm.c	/^static struct davinci_mmc mmc_sd0 = {$/;"	v	typeref:struct:davinci_mmc	file:
mmc_sd0	board/davinci/da8xxevm/omapl138_lcdk.c	/^static struct davinci_mmc mmc_sd0 = {$/;"	v	typeref:struct:davinci_mmc	file:
mmc_sd0	board/lego/ev3/legoev3.c	/^static struct davinci_mmc mmc_sd0 = {$/;"	v	typeref:struct:davinci_mmc	file:
mmc_select_hwpart	drivers/mmc/mmc-uclass.c	/^static int mmc_select_hwpart(struct udevice *bdev, int hwpart)$/;"	f	typeref:typename:int	file:
mmc_select_hwpartp	drivers/mmc/mmc_legacy.c	/^static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)$/;"	f	typeref:typename:int	file:
mmc_send_cmd	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^	void *mmc_send_cmd;$/;"	m	struct:uniphier_romfunc_table	typeref:typename:void *	file:
mmc_send_cmd	drivers/mmc/mmc-uclass.c	/^int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int
mmc_send_cmd	drivers/mmc/mmc.c	/^int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int
mmc_send_ext_csd	drivers/mmc/mmc.c	/^static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)$/;"	f	typeref:typename:int	file:
mmc_send_if_cond	drivers/mmc/mmc.c	/^static int mmc_send_if_cond(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_send_op_cond	drivers/mmc/mmc.c	/^static int mmc_send_op_cond(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_send_op_cond_iter	drivers/mmc/mmc.c	/^static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)$/;"	f	typeref:typename:int	file:
mmc_send_status	drivers/mmc/mmc.c	/^int mmc_send_status(struct mmc *mmc, int timeout)$/;"	f	typeref:typename:int
mmc_set_blockcount	drivers/mmc/rpmb.c	/^static int mmc_set_blockcount(struct mmc *mmc, unsigned int blockcount,$/;"	f	typeref:typename:int	file:
mmc_set_blocklen	drivers/mmc/mmc.c	/^int mmc_set_blocklen(struct mmc *mmc, int len)$/;"	f	typeref:typename:int
mmc_set_boot_bus_width	drivers/mmc/mmc_boot.c	/^int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)$/;"	f	typeref:typename:int
mmc_set_bus_width	drivers/mmc/mmc.c	/^static void mmc_set_bus_width(struct mmc *mmc, uint width)$/;"	f	typeref:typename:void	file:
mmc_set_capacity	drivers/mmc/mmc.c	/^static int mmc_set_capacity(struct mmc *mmc, int part_num)$/;"	f	typeref:typename:int	file:
mmc_set_clock	drivers/mmc/mmc.c	/^void mmc_set_clock(struct mmc *mmc, uint clock)$/;"	f	typeref:typename:void
mmc_set_dsr	drivers/mmc/mmc.c	/^int mmc_set_dsr(struct mmc *mmc, u16 val)$/;"	f	typeref:typename:int
mmc_set_env_part	common/env_mmc.c	/^static inline int mmc_set_env_part(struct mmc *mmc) {return 0; };$/;"	f	typeref:typename:int	file:
mmc_set_env_part	common/env_mmc.c	/^static int mmc_set_env_part(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_set_ios	drivers/mmc/mmc-uclass.c	/^int mmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_set_ios	drivers/mmc/mmc.c	/^static void mmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
mmc_set_mod_clk	drivers/mmc/sunxi_mmc.c	/^static int mmc_set_mod_clk(struct sunxi_mmc_host *mmchost, unsigned int hz)$/;"	f	typeref:typename:int	file:
mmc_set_part_conf	drivers/mmc/mmc_boot.c	/^int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)$/;"	f	typeref:typename:int
mmc_set_preinit	drivers/mmc/mmc.c	/^void mmc_set_preinit(struct mmc *mmc, int preinit)$/;"	f	typeref:typename:void
mmc_set_rst_n_function	drivers/mmc/mmc_boot.c	/^int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)$/;"	f	typeref:typename:int
mmc_spi_cfg	drivers/mmc/mmc_spi.c	/^static struct mmc_config mmc_spi_cfg = {$/;"	v	typeref:struct:mmc_config	file:
mmc_spi_init	drivers/mmc/mmc_spi.c	/^struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)$/;"	f	typeref:struct:mmc *
mmc_spi_init_p	drivers/mmc/mmc_spi.c	/^static int mmc_spi_init_p(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_spi_ops	drivers/mmc/mmc_spi.c	/^static const struct mmc_ops mmc_spi_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
mmc_spi_readdata	drivers/mmc/mmc_spi.c	/^static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf,$/;"	f	typeref:typename:uint	file:
mmc_spi_request	drivers/mmc/mmc_spi.c	/^static int mmc_spi_request(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
mmc_spi_sendcmd	drivers/mmc/mmc_spi.c	/^static uint mmc_spi_sendcmd(struct mmc *mmc, ushort cmdidx, u32 cmdarg)$/;"	f	typeref:typename:uint	file:
mmc_spi_set_ios	drivers/mmc/mmc_spi.c	/^static void mmc_spi_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
mmc_spi_writedata	drivers/mmc/mmc_spi.c	/^static uint mmc_spi_writedata(struct mmc *mmc, const void *xbuf,$/;"	f	typeref:typename:uint	file:
mmc_spl_load_image	drivers/mmc/fsl_esdhc_spl.c	/^void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst)$/;"	f	typeref:typename:void
mmc_start_init	drivers/mmc/mmc.c	/^int mmc_start_init(struct mmc *mmc)$/;"	f	typeref:typename:int
mmc_startup	drivers/mmc/mmc.c	/^static int mmc_startup(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_supported	arch/x86/cpu/baytrail/valleyview.c	/^static struct pci_device_id mmc_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
mmc_supported	arch/x86/cpu/quark/quark.c	/^static struct pci_device_id mmc_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
mmc_supported	arch/x86/cpu/queensbay/topcliff.c	/^static struct pci_device_id mmc_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
mmc_switch	drivers/mmc/mmc.c	/^int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)$/;"	f	typeref:typename:int
mmc_switch_part	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^	void *mmc_switch_part;$/;"	m	struct:uniphier_romfunc_table	typeref:typename:void *	file:
mmc_switch_part	drivers/mmc/mmc.c	/^int mmc_switch_part(struct mmc *mmc, unsigned int part_num)$/;"	f	typeref:typename:int
mmc_trace_state	drivers/mmc/mmc.c	/^void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)$/;"	f	typeref:typename:void
mmc_trace_state	drivers/mmc/mmc_private.h	/^static inline void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)$/;"	f	typeref:typename:void
mmc_trans_data_by_cpu	drivers/mmc/sunxi_mmc.c	/^static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
mmc_uclass_priv	include/mmc.h	/^struct mmc_uclass_priv {$/;"	s
mmc_unbind	drivers/mmc/mmc-uclass.c	/^int mmc_unbind(struct udevice *dev)$/;"	f	typeref:typename:int
mmc_update_clk	drivers/mmc/sunxi_mmc.c	/^static int mmc_update_clk(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mmc_write_blocks	drivers/mmc/mmc_write.c	/^static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start,$/;"	f	typeref:typename:ulong	file:
mmc_write_data	drivers/mmc/omap_hsmmc.c	/^static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,$/;"	f	typeref:typename:int	file:
mmcarghl	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcarghl;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcblen	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcblen;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcblnc	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcblnc;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcboot	drivers/mmc/fsl_esdhc.c	/^	uint    mmcboot;$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
mmccard	arch/arm/dts/sun5i-a13-utoo-p66.dts	/^	mmccard: mmccard@0 {$/;"	l
mmccidx	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmccidx;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcckc	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcckc;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcclk	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcclk;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmccmd	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmccmd;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcctl	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcctl;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcdrr	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcdrr;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcdrsp	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcdrsp;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcdxr	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcdxr;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcetok	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcetok;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcfifoctl	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcfifoctl;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmchs0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmchs0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmchs1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmchs1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmchs2clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmchs2clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmcif_mmc_init	drivers/mmc/sh_mmcif.c	/^int mmcif_mmc_init(void)$/;"	f	typeref:typename:int
mmcif_wait_interrupt_flag	drivers/mmc/sh_mmcif.c	/^static int mmcif_wait_interrupt_flag(struct sh_mmcif_host *host)$/;"	f	typeref:typename:int	file:
mmcim	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcim;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmckargs	board/Arcturus/ucp1020/ucp1020.h	/^static char *mmckargs = "root=\/dev\/mmcblk0p1 rootwait rw";$/;"	v	typeref:typename:char *
mmcmd0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmcmd0;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmcmd1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	mmcmd1;$/;"	m	struct:s3c2400_mmc	typeref:typename:u32
mmcnblc	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcnblc;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcnblk	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcnblk;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmcon;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmcontrol	include/linux/mtd/onenand.h	/^	void (*mmcontrol) (struct mtd_info *mtd, int sync_read);$/;"	m	struct:onenand_chip	typeref:typename:void (*)(struct mtd_info * mtd,int sync_read)
mmcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mmcr[16];		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[16]
mmcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mmcr;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mmcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mmcr[16];		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[16]
mmcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mmcr;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
mmcr16	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	mmcr16;$/;"	m	struct:s3c2400_mmc	typeref:typename:u16
mmcr7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmcr7;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmcrr	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmcrr;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmcrsp01	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcrsp01;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcrsp23	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcrsp23;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcrsp45	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcrsp45;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcrsp67	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcrsp67;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcsm22scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm22scrd, mmcsm22scr;$/;"	m	struct:mios	typeref:typename:ushort
mmcsm6scr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort mios_mmcsm6scrd, mmcsm6scr;$/;"	m	struct:mios	typeref:typename:ushort
mmcst0	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcst0;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmcst1	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmcst1;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmctod	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmctod;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmctodc	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmctodc;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmctor	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmctor;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmctorc	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg mmctorc;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
mmdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmdat;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmdc	arch/arm/dts/imx6ull.dtsi	/^			mmdc: mmdc@021b0000 {$/;"	l
mmdc0	arch/arm/dts/imx6qdl.dtsi	/^			mmdc0: mmdc@021b0000 { \/* MMDC0 *\/$/;"	l
mmdc1	arch/arm/dts/imx6qdl.dtsi	/^			mmdc1: mmdc@021b4000 { \/* MMDC1 *\/$/;"	l
mmdc_do_dqs_calibration	arch/arm/cpu/armv7/mx6/ddr.c	/^int mmdc_do_dqs_calibration(void)$/;"	f	typeref:typename:int
mmdc_do_write_level_calibration	arch/arm/cpu/armv7/mx6/ddr.c	/^int mmdc_do_write_level_calibration(void)$/;"	f	typeref:typename:int
mmdc_init	drivers/ddr/fsl/fsl_mmdc.c	/^void mmdc_init(const struct fsl_mmdc_info *priv)$/;"	f	typeref:typename:void
mmdc_p_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mmdc_p_regs {$/;"	s
mmdc_regs	include/fsl_mmdc.h	/^struct mmdc_regs {$/;"	s
mmds	include/phy.h	/^	u32 mmds;$/;"	m	struct:phy_device	typeref:typename:u32
mmds	include/phy.h	/^	unsigned int mmds;$/;"	m	struct:phy_driver	typeref:typename:unsigned int
mmed3	lib/bzip2/bzlib_blocksort.c	/^UChar mmed3 ( UChar a, UChar b, UChar c )$/;"	f	typeref:typename:UChar	file:
mmfcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmfcon;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmfr	arch/m68k/include/asm/fec.h	/^	u32 mmfr;		\/* 0x40 *\/$/;"	m	struct:fec	typeref:typename:u32
mmfr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 mmfr;		\/* 0x040 *\/$/;"	m	struct:fecdma	typeref:typename:u32
mmfsta	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	mmfsta;$/;"	m	struct:s3c2400_mmc	typeref:typename:u16
mmgcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	mmgcr;		\/* Memory Manager General Config *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
mmgt	include/vsc9953.h	/^	struct vsc9953_qsys_mmgt	mmgt;$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_mmgt
mmgt	include/vsc9953.h	/^	struct vsc9953_sys_mmgt	mmgt;$/;"	m	struct:vsc9953_system_reg	typeref:struct:vsc9953_sys_mmgt
mmid_lsb	include/ddr_spd.h	/^	uint8_t mmid_lsb;		\/* 320 Module MfgID Code LSB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
mmid_lsb	include/ddr_spd.h	/^	unsigned char mmid_lsb;        \/* 117 Module MfgID Code LSB - JEP-106 *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
mmid_msb	include/ddr_spd.h	/^	uint8_t mmid_msb;		\/* 321 Module MfgID Code MSB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
mmid_msb	include/ddr_spd.h	/^	unsigned char mmid_msb;        \/* 118 Module MfgID Code MSB - JEP-106 *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
mmin	lib/bzip2/bzlib_blocksort.c	/^#define mmin(/;"	d	file:
mmio	include/atmel_lcd.h	/^	u_long	mmio;		\/* Memory mapped registers *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
mmio_addr	drivers/net/rtl8169.c	/^	void *mmio_addr;	\/* memory map physical address *\/$/;"	m	struct:rtl8169_private	typeref:typename:void *	file:
mmio_base	drivers/mtd/nand/pxa3xx_nand.c	/^	void __iomem		*mmio_base;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:void __iomem *	file:
mmio_base	drivers/pci/pci_ftpci100.c	/^	unsigned int mmio_base;$/;"	m	struct:ftpci100_data	typeref:typename:unsigned int	file:
mmio_base	drivers/video/ati_radeon_fb.h	/^	void			*mmio_base;$/;"	m	struct:radeonfb_info	typeref:typename:void *
mmio_base	include/ahci.h	/^	void __iomem *mmio_base;$/;"	m	struct:ahci_probe_ent	typeref:typename:void __iomem *
mmio_base_bus	drivers/video/ati_radeon_fb.h	/^	u32			mmio_base_bus;$/;"	m	struct:radeonfb_info	typeref:typename:u32
mmio_insb	include/usbdevice.h	/^#define mmio_insb(/;"	d
mmio_insw	include/usbdevice.h	/^#define mmio_insw(/;"	d
mmio_len	include/linux/fb.h	/^	__u32 mmio_len;			\/* Length of Memory Mapped I\/O	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u32
mmio_outsw	include/usbdevice.h	/^#define mmio_outsw(/;"	d
mmio_phys	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned long		mmio_phys;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned long	file:
mmio_regs	include/fsl-mc/fsl_mc_sys.h	/^	struct mc_command __iomem *mmio_regs;$/;"	m	struct:fsl_mc_io	typeref:struct:mc_command __iomem *
mmio_start	include/linux/fb.h	/^	unsigned long mmio_start;	\/* Start of Memory Mapped I\/O	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:unsigned long
mmiowb	arch/blackfin/include/asm/io.h	/^#define mmiowb(/;"	d
mmiowb	arch/mips/include/asm/io.h	/^#define mmiowb(/;"	d
mmitar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mmitar;		\/* RMAN Inbound Translation Address Register *\/$/;"	m	struct:ccsr_rman	typeref:typename:u32
mmitdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mmitdr;		\/* RMAN Inbound Translation Data Register *\/$/;"	m	struct:ccsr_rman	typeref:typename:u32
mmlen	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	mmlen;$/;"	m	struct:s3c2400_mmc	typeref:typename:u16
mmliodnbr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mmliodnbr;	\/* Message Manager LIODN Base Register *\/$/;"	m	struct:ccsr_rman	typeref:typename:u32
mmmc_trace_after_send	drivers/mmc/mmc.c	/^void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)$/;"	f	typeref:typename:void
mmmc_trace_after_send	drivers/mmc/mmc_private.h	/^static inline void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:void
mmmc_trace_before_send	drivers/mmc/mmc.c	/^void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)$/;"	f	typeref:typename:void
mmmc_trace_before_send	drivers/mmc/mmc_private.h	/^static inline void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)$/;"	f	typeref:typename:void
mmp_block	include/ext_common.h	/^	__le64 mmp_block;$/;"	m	struct:ext2_sblock	typeref:typename:__le64
mmp_interval	include/ext_common.h	/^	__le16 mmp_interval;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
mmpre	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmpre;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmr	drivers/i2c/at91_i2c.h	/^	u32 mmr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
mmr_base	drivers/spi/bfin_spi.c	/^	void *mmr_base;$/;"	m	struct:bfin_spi_slave	typeref:typename:void *	file:
mmrsp	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	mmrsp[4];$/;"	m	struct:s3c2400_mmc	typeref:typename:u32[4]
mmsta	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	mmsta;$/;"	m	struct:s3c2400_mmc	typeref:typename:u8
mmu_clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmu_clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmu_disable	arch/arm/cpu/arm1176/start.S	/^mmu_disable:$/;"	l
mmu_disable	arch/arm/mach-mvebu/cpu.c	/^void mmu_disable(void)$/;"	f	typeref:typename:void
mmu_disable_notreq	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^mmu_disable_notreq:$/;"	l
mmu_disable_phys	arch/arm/cpu/arm1176/start.S	/^mmu_disable_phys:$/;"	l
mmu_enabled	arch/arm/lib/cache-cp15.c	/^static int mmu_enabled(void)$/;"	f	typeref:typename:int	file:
mmu_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	mmu_fck: mmu_fck {$/;"	l
mmu_handle_tlb_miss	arch/avr32/cpu/at32ap700x/mmu.c	/^int mmu_handle_tlb_miss(void)$/;"	f	typeref:typename:int
mmu_init	examples/standalone/test_burst_lib.S	/^mmu_init:$/;"	l
mmu_init_r	arch/avr32/cpu/at32ap700x/mmu.c	/^void mmu_init_r(unsigned long dest_addr)$/;"	f	typeref:typename:void
mmu_page_table_flush	arch/arm/cpu/armv7/cache_v7.c	/^void mmu_page_table_flush(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:void
mmu_page_table_flush	arch/arm/lib/cache-cp15.c	/^__weak void mmu_page_table_flush(unsigned long start, unsigned long stop)$/;"	f	typeref:typename:__weak void
mmu_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct mmu_regs {$/;"	s
mmu_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct mmu_regs {$/;"	s
mmu_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct mmu_regs {$/;"	s
mmu_set_region_dcache_behaviour	arch/arm/cpu/armv8/cache_v8.c	/^void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,$/;"	f	typeref:typename:void
mmu_set_region_dcache_behaviour	arch/arm/lib/cache-cp15.c	/^void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,$/;"	f	typeref:typename:void
mmu_setup	arch/arm/cpu/armv7/ls102xa/cpu.c	/^static void mmu_setup(void)$/;"	f	typeref:typename:void	file:
mmu_setup	arch/arm/cpu/armv8/cache_v8.c	/^__weak void mmu_setup(void)$/;"	f	typeref:typename:__weak void
mmu_setup	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^void mmu_setup(void)$/;"	f	typeref:typename:void
mmu_setup	arch/arm/lib/cache-cp15.c	/^static inline void mmu_setup(void)$/;"	f	typeref:typename:void	file:
mmu_vm_range	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^struct mmu_vm_range {$/;"	s
mmu_vmr_table	board/atmel/atngw100/atngw100.c	/^struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {$/;"	v	typeref:struct:mmu_vm_range[]
mmu_vmr_table	board/atmel/atngw100mkii/atngw100mkii.c	/^struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {$/;"	v	typeref:struct:mmu_vm_range[]
mmu_vmr_table	board/atmel/atstk1000/atstk1000.c	/^struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {$/;"	v	typeref:struct:mmu_vm_range[]
mmu_vmr_table	board/in-circuit/grasshopper/grasshopper.c	/^struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {$/;"	v	typeref:struct:mmu_vm_range[]
mmucfg_clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmucfg_clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmucfgclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmucfgclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmucr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	mmucr;$/;"	m	struct:mmu_regs	typeref:typename:unsigned int
mmucr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	mmucr;$/;"	m	struct:mmu_regs	typeref:typename:unsigned int
mmucr	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	mmucr;$/;"	m	struct:mmu_regs	typeref:typename:unsigned int
mmudataclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mmudataclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mmutable	arch/arm/cpu/pxa/start.S	/^mmutable:$/;"	l
mn2div	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int mn2div;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
mn_diff	drivers/video/ct69000.c	/^	int mn_diff;		\/* difference between M\/N Value + mn_diff = M\/N Register *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
mn_max	drivers/video/ct69000.c	/^	int mn_max;		\/* max value of M\/N Value *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
mn_min	drivers/video/ct69000.c	/^	int mn_min;		\/* min value of M\/N Value *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
mnextsize	lib/bzip2/bzlib_blocksort.c	/^#define mnextsize(/;"	d	file:
mnextswap	lib/bzip2/bzlib_blocksort.c	/^#define mnextswap(/;"	d	file:
mngr_cfg	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct qm_cfg_reg *mngr_cfg;$/;"	m	struct:qm_config	typeref:struct:qm_cfg_reg *
mngr_vbusm	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	mngr_vbusm;	\/* management region (VBUSM)	*\/$/;"	m	struct:qm_config	typeref:typename:u32
mnt	fs/ubifs/ubifs.h	/^	struct vfsmount *mnt;$/;"	m	struct:path	typeref:struct:vfsmount *
mnt_count	include/ext_common.h	/^	__le16 mnt_count;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
mnt_flags	fs/ubifs/ubifs.h	/^	int mnt_flags;$/;"	m	struct:vfsmount	typeref:typename:int
mnt_root	fs/ubifs/ubifs.h	/^	struct dentry *mnt_root;	\/* root of the mounted tree *\/$/;"	m	struct:vfsmount	typeref:struct:dentry *
mnt_sb	fs/ubifs/ubifs.h	/^	struct super_block *mnt_sb;	\/* pointer to superblock *\/$/;"	m	struct:vfsmount	typeref:struct:super_block *
mobile_direct	include/usbdescriptors.h	/^		struct usb_class_mdlm_descriptor mobile_direct;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_mdlm_descriptor
mobile_direct_detail	include/usbdescriptors.h	/^		struct usb_class_mdlmd_descriptor mobile_direct_detail;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_mdlmd_descriptor
mocl	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 mocl;$/;"	m	struct:at91_emac	typeref:typename:u32
mod	arch/sh/include/asm/ptrace.h	/^	unsigned long	mod;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
mod	include/i2s.h	/^	unsigned int mod;	\/* Mode register *\/$/;"	m	struct:i2s_reg	typeref:typename:unsigned int
mod	scripts/kconfig/expr.h	/^	no, mod, yes$/;"	e	enum:tristate
mod8_tab	include/linux/bch.h	/^	uint32_t       *mod8_tab;$/;"	m	struct:bch_control	typeref:typename:uint32_t *
modColIdx	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
mod_attr	include/ddr_spd.h	/^	unsigned char mod_attr;    \/* 21 SDRAM Module Attributes *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
mod_attr	include/ddr_spd.h	/^	unsigned char mod_attr;    \/* 21 SDRAM Module Attributes *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
mod_attr	include/spd.h	/^	unsigned char mod_attr;    \/* 21 SDRAM Module Attributes *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
mod_clk	drivers/mtd/nand/sunxi_nand.c	/^	struct clk *mod_clk;$/;"	m	struct:sunxi_nfc	typeref:struct:clk *	file:
mod_dent	fs/ubifs/ubifs.h	/^	unsigned int mod_dent:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
mod_dent	fs/ubifs/ubifs.h	/^	unsigned int mod_dent;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
mod_dir	test/py/multiplexed_log.py	/^mod_dir = os.path.dirname(os.path.abspath(__file__))$/;"	v
mod_exp	include/u-boot/rsa-mod-exp.h	/^	int (*mod_exp)(struct udevice *dev, const uint8_t *sig,$/;"	m	struct:mod_exp_ops	typeref:typename:int (*)(struct udevice * dev,const uint8_t * sig,uint32_t sig_len,struct key_prop * node,uint8_t * outp)
mod_exp_ops	include/u-boot/rsa-mod-exp.h	/^struct mod_exp_ops {$/;"	s
mod_exp_ops_sw	drivers/crypto/rsa_mod_exp/mod_exp_sw.c	/^static const struct mod_exp_ops mod_exp_ops_sw = {$/;"	v	typeref:typename:const struct mod_exp_ops	file:
mod_exp_sw	drivers/crypto/rsa_mod_exp/mod_exp_sw.c	/^int mod_exp_sw(struct udevice *dev, const uint8_t *sig, uint32_t sig_len,$/;"	f	typeref:typename:int
mod_height	include/ddr_spd.h	/^			uint8_t mod_height;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508	typeref:typename:uint8_t
mod_height	include/ddr_spd.h	/^			uint8_t mod_height;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
mod_height	include/ddr_spd.h	/^			uint8_t mod_height;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
mod_height	include/ddr_spd.h	/^			unsigned char mod_height;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0208	typeref:typename:unsigned char
mod_height	include/ddr_spd.h	/^			unsigned char mod_height;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
mod_i2c_mem	cmd/i2c.c	/^mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
mod_id	arch/x86/include/asm/global_data.h	/^	uint16_t mod_id;$/;"	m	struct:dimm_info	typeref:typename:uint16_t
mod_mem	cmd/mem.c	/^mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
mod_ranks	include/ddr_spd.h	/^	unsigned char mod_ranks;   \/*  5 Number of DIMM Ranks *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
mod_s	lib/bch.c	/^static inline int mod_s(struct bch_control *bch, unsigned int v)$/;"	f	typeref:typename:int	file:
mod_section	include/ddr_spd.h	/^	} mod_section;$/;"	m	struct:ddr3_spd_eeprom_s	typeref:union:ddr3_spd_eeprom_s::__anoncde79dee010a
mod_section	include/ddr_spd.h	/^	} mod_section;$/;"	m	struct:ddr4_spd_eeprom_s	typeref:union:ddr4_spd_eeprom_s::__anoncde79dee040a
mod_thickness	include/ddr_spd.h	/^			uint8_t mod_thickness;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508	typeref:typename:uint8_t
mod_thickness	include/ddr_spd.h	/^			uint8_t mod_thickness;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
mod_thickness	include/ddr_spd.h	/^			uint8_t mod_thickness;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
mod_thickness	include/ddr_spd.h	/^			unsigned char mod_thickness;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0208	typeref:typename:unsigned char
mod_thickness	include/ddr_spd.h	/^			unsigned char mod_thickness;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
mod_type	arch/x86/include/asm/global_data.h	/^	uint8_t mod_type;$/;"	m	struct:dimm_info	typeref:typename:uint8_t
mode	arch/arm/cpu/armv7/iproc-common/armpll.c	/^	unsigned int mode;$/;"	m	struct:armpll_parameters	typeref:typename:unsigned int	file:
mode	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	mode;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
mode	arch/arm/include/asm/arch-mxs/sys_proto.h	/^	const char *mode;$/;"	m	struct:mxs_pair	typeref:typename:const char *
mode	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_mode	mode;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_mode
mode	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_mode	mode;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_mode
mode	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_mode	mode;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_mode
mode	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 mode;			\/* 0x800 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
mode	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 mode;		\/* 0x04 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
mode	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 mode;		\/* 0x18 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
mode	arch/arm/include/asm/arch/display.h	/^	u32 mode;			\/* 0x800 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
mode	arch/arm/include/asm/arch/watchdog.h	/^	u32 mode;		\/* 0x04 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
mode	arch/arm/include/asm/arch/watchdog.h	/^	u32 mode;		\/* 0x18 *\/$/;"	m	struct:sunxi_wdog	typeref:typename:u32
mode	arch/arm/include/asm/imx-common/video.h	/^	struct	fb_videomode mode;$/;"	m	struct:display_info_t	typeref:struct:fb_videomode
mode	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned mode;$/;"	m	struct:aemif_config	typeref:typename:unsigned
mode	arch/arm/lib/semihosting.c	/^		unsigned long mode;$/;"	m	struct:smh_open::smh_open_s	typeref:typename:unsigned long	file:
mode	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^	u32	mode;		\/* 0x0C SMC Mode Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
mode	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	u32	mode;		\/* 0x610 SMC Mode Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
mode	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	mode;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
mode	arch/arm/mach-socfpga/misc.c	/^	const char	*mode;$/;"	m	struct:__anon0d396cd60108	typeref:typename:const char *	file:
mode	arch/m68k/include/asm/immap_520x.h	/^	u32 mode;		\/* 0x00 Mode\/Extended Mode *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
mode	arch/m68k/include/asm/immap_5301x.h	/^	u32 mode;		\/* 0x00 Mode\/Extended Mode *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
mode	arch/m68k/include/asm/immap_5329.h	/^	u32 mode;		\/* 0x00 Mode\/Extended Mode register *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32
mode	arch/m68k/include/asm/immap_5329.h	/^	u32 mode;		\/* 0x1A8 USB mode register *\/$/;"	m	struct:usb_otg	typeref:typename:u32
mode	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 mode;		\/* 0x00 *\/$/;"	m	struct:sdram	typeref:typename:u32
mode	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 mode;$/;"	m	struct:gptmr	typeref:typename:u8
mode	arch/mips/mach-ath79/ar934x/ddr.c	/^	u32	mode;$/;"	m	struct:ar934x_mem_config	typeref:typename:u32	file:
mode	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	mode;		\/* PSC + 0x00 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
mode	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mode;		\/* eSPI mode *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32
mode	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u32 mode;	\/* mode register  *\/$/;"	m	struct:spi8xxx	typeref:typename:u32
mode	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint16_t mode;$/;"	m	struct:pch_usb3_controller_settings	typeref:typename:uint16_t
mode	board/astro/mcf5373l/astro.h	/^	unsigned char mode;$/;"	m	struct:__anona9f590f60108	typeref:typename:unsigned char
mode	board/cm5200/cm5200.h	/^	ulong mode;$/;"	m	struct:__anonb595836f0408	typeref:typename:ulong
mode	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	struct fb_videomode mode;$/;"	m	struct:display_info_t	typeref:struct:fb_videomode	file:
mode	board/mpl/pip405/pip405.c	/^	const unsigned char mode;$/;"	m	struct:__anonb110a3780308	typeref:typename:const unsigned char	file:
mode	cmd/spi.c	/^static unsigned int	mode;$/;"	v	typeref:typename:unsigned int	file:
mode	common/cli_hush.c	/^struct {int mode; int default_fd; char *descrip;} redir_table[] = {$/;"	m	struct:__anon62a9299d0208	typeref:typename:int	file:
mode	common/xyzModem.c	/^  int len, mode, total_retries;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:int	file:
mode	drivers/bios_emulator/include/x86emu/regs.h	/^	long mode;$/;"	m	struct:__anon39451e6d0808	typeref:typename:long
mode	drivers/mtd/nand/sunxi_nand.c	/^	int mode;$/;"	m	struct:sunxi_nand_hw_ecc	typeref:typename:int	file:
mode	drivers/mtd/ubi/ubi.h	/^	int mode;$/;"	m	struct:ubi_volume_desc	typeref:typename:int
mode	drivers/net/dwc_eth_qos.c	/^	uint32_t mode;					\/* 0x1000 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
mode	drivers/net/fm/fm.h	/^	u32 mode;	\/* independent mode register *\/$/;"	m	struct:fm_port_global_pram	typeref:typename:u32
mode	drivers/net/pch_gbe.h	/^	u32 mode;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
mode	drivers/net/pcnet.c	/^	u16 mode;$/;"	m	struct:pcnet_init_block	typeref:typename:u16	file:
mode	drivers/net/uli526x.c	/^static int mode = 8;$/;"	v	typeref:typename:int	file:
mode	drivers/serial/serial_zynq.c	/^	u32 mode; \/* 0x4 - Mode Register [10:0] *\/$/;"	m	struct:uart_zynq	typeref:typename:u32	file:
mode	drivers/spi/atmel_spi.c	/^	unsigned int mode;$/;"	m	struct:atmel_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/davinci_spi.c	/^	unsigned int mode; \/* current SPI mode used *\/$/;"	m	struct:davinci_spi_slave	typeref:typename:unsigned int	file:
mode	drivers/spi/designware_spi.c	/^	unsigned int mode;$/;"	m	struct:dw_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/exynos_spi.c	/^	unsigned int mode;$/;"	m	struct:exynos_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/fsl_dspi.c	/^	uint mode;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
mode	drivers/spi/fsl_espi.c	/^	unsigned int	mode;$/;"	m	struct:fsl_spi_slave	typeref:typename:unsigned int	file:
mode	drivers/spi/mxc_spi.c	/^	unsigned int	mode;$/;"	m	struct:mxc_spi_slave	typeref:typename:unsigned int	file:
mode	drivers/spi/mxs_spi.c	/^	uint32_t		mode;$/;"	m	struct:mxs_spi_slave	typeref:typename:uint32_t	file:
mode	drivers/spi/omap3_spi.c	/^	unsigned int mode;$/;"	m	struct:omap3_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/pic32_spi.c	/^	int			mode;$/;"	m	struct:pic32_spi_priv	typeref:typename:int	file:
mode	drivers/spi/rk_spi.c	/^	unsigned int mode;$/;"	m	struct:rockchip_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/soft_spi.c	/^	unsigned int mode;$/;"	m	struct:soft_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/soft_spi_legacy.c	/^	unsigned int mode;$/;"	m	struct:soft_spi_slave	typeref:typename:unsigned int	file:
mode	drivers/spi/tegra114_spi.c	/^	unsigned int mode;$/;"	m	struct:tegra114_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/tegra20_sflash.c	/^	unsigned int mode;$/;"	m	struct:tegra20_sflash_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/tegra20_slink.c	/^	unsigned int mode;$/;"	m	struct:tegra30_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/tegra210_qspi.c	/^	unsigned int mode;$/;"	m	struct:tegra210_qspi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/ti_qspi.c	/^	unsigned int mode;$/;"	m	struct:ti_qspi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/xilinx_spi.c	/^	unsigned int mode;$/;"	m	struct:xilinx_spi_priv	typeref:typename:unsigned int	file:
mode	drivers/spi/zynq_qspi.c	/^	u8 mode;$/;"	m	struct:zynq_qspi_priv	typeref:typename:u8	file:
mode	drivers/spi/zynq_spi.c	/^	u8 mode;$/;"	m	struct:zynq_spi_priv	typeref:typename:u8	file:
mode	drivers/usb/musb-new/musb_dsps.c	/^	u16	mode;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
mode	drivers/video/fsl_dcu_fb.c	/^	u32 mode;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
mode	drivers/video/ipu_disp.c	/^	int mode;$/;"	m	struct:dp_csc_param_t	typeref:typename:int	file:
mode	drivers/video/mx3fb.c	/^static struct ctfb_res_modes *mode;$/;"	v	typeref:struct:ctfb_res_modes *	file:
mode	fs/ubifs/debug.c	/^	umode_t mode;$/;"	m	struct:fsck_inode	typeref:typename:umode_t	file:
mode	fs/ubifs/ubifs-media.h	/^	__le32 mode;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
mode	include/cramfs/cramfs_fs.h	/^	u32 mode:CRAMFS_MODE_WIDTH, uid:CRAMFS_UID_WIDTH;$/;"	m	struct:cramfs_inode	typeref:typename:u32
mode	include/ec_commands.h	/^	uint8_t mode;$/;"	m	struct:ec_params_usb_charge_set_mode	typeref:typename:uint8_t
mode	include/efi_api.h	/^	s32 mode;$/;"	m	struct:simple_text_output_mode	typeref:typename:s32
mode	include/efi_api.h	/^	struct efi_gop_mode *mode;$/;"	m	struct:efi_gop	typeref:struct:efi_gop_mode *
mode	include/efi_api.h	/^	struct efi_pxe_mode *mode;$/;"	m	struct:efi_pxe	typeref:struct:efi_pxe_mode *
mode	include/efi_api.h	/^	struct efi_simple_network_mode *mode;$/;"	m	struct:efi_simple_network	typeref:struct:efi_simple_network_mode *
mode	include/efi_api.h	/^	struct simple_text_output_mode *mode;$/;"	m	struct:efi_simple_text_output_protocol	typeref:struct:simple_text_output_mode *
mode	include/efi_api.h	/^	u32 mode;$/;"	m	struct:efi_gop_mode	typeref:typename:u32
mode	include/ext_common.h	/^	__le16 mode;$/;"	m	struct:ext2_inode	typeref:typename:__le16
mode	include/jffs2/jffs2.h	/^	__u32 mode;       \/* The file's type or mode.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
mode	include/linux/fb.h	/^	struct fb_videomode *mode;	\/* current mode *\/$/;"	m	struct:fb_info	typeref:struct:fb_videomode *
mode	include/linux/mtd/mtd.h	/^	unsigned int	mode;$/;"	m	struct:mtd_oob_ops	typeref:typename:unsigned int
mode	include/linux/mtd/nand.h	/^	nand_ecc_modes_t mode;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:nand_ecc_modes_t
mode	include/linux/usb/musb.h	/^	enum musb_buf_mode	mode;$/;"	m	struct:musb_fifo_cfg	typeref:enum:musb_buf_mode
mode	include/linux/usb/musb.h	/^	u8		mode;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:u8
mode	include/mpc5xxx.h	/^	volatile u32	mode;$/;"	m	struct:mpc5xxx_sdram	typeref:typename:volatile u32
mode	include/mpc5xxx.h	/^	volatile u8	mode;		\/* PSC + 0x00 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
mode	include/mtd/mtd-abi.h	/^	__u8 mode;$/;"	m	struct:mtd_write_req	typeref:typename:__u8
mode	include/power/pmic.h	/^	unsigned int mode;$/;"	m	struct:p_spi	typeref:typename:unsigned int
mode	include/power/regulator.h	/^	struct dm_regulator_mode *mode;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:struct:dm_regulator_mode *
mode	include/spi.h	/^	uint mode;$/;"	m	struct:dm_spi_slave_platdata	typeref:typename:uint
mode	include/spi.h	/^	uint mode;$/;"	m	struct:spi_slave	typeref:typename:uint
mode	include/video_fb.h	/^    unsigned int mode;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
mode	include/xyzModem.h	/^    int   mode;$/;"	m	struct:__anon582e218b0108	typeref:typename:int
mode	lib/bzip2/bzlib_private.h	/^      Int32    mode;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
mode	lib/efi_loader/efi_gop.c	/^	struct efi_gop_mode mode;$/;"	m	struct:efi_gop_obj	typeref:struct:efi_gop_mode	file:
mode	lib/zlib/inflate.h	/^    inflate_mode mode;          \/* current inflate mode *\/$/;"	m	struct:inflate_state	typeref:typename:inflate_mode
mode	net/sntp.h	/^	uchar mode:3;$/;"	m	struct:sntp_pkt_t	typeref:typename:uchar:3
mode	scripts/kconfig/qconf.h	/^	enum listMode mode;$/;"	m	class:ConfigList	typeref:enum:listMode
mode	tools/mxsimage.h	/^		uint32_t	mode;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960b08	typeref:typename:uint32_t
mode	tools/mxsimage.h	/^	const uint8_t	mode;$/;"	m	struct:__anonc4848c960c08	typeref:typename:const uint8_t
mode	tools/mxsimage.h	/^	} mode;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960b08
mode2_t	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 mode2_t = 0xff;$/;"	v	typeref:typename:u32
modeIdent	include/video_fb.h	/^    char modeIdent[80];$/;"	m	struct:graphic_device	typeref:typename:char[80]
mode_0_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata mode_0_cfg[] = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata[]	file:
mode_1_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata mode_1_cfg[] = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata[]	file:
mode_2_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata mode_2_cfg[] = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata[]	file:
mode_2t	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 mode_2t;$/;"	m	struct:dram_info	typeref:typename:u32
mode_3_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata mode_3_cfg[] = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata[]	file:
mode_4_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata mode_4_cfg[] = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata[]	file:
mode_5_cfg	drivers/usb/musb-new/musb_core.c	/^static struct musb_fifo_cfg __devinitdata mode_5_cfg[] = {$/;"	v	typeref:struct:musb_fifo_cfg __devinitdata[]	file:
mode_attributes	include/vbe.h	/^	u16 mode_attributes;	\/* 00 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
mode_cfg	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		mode_cfg;	\/* 0x08 *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
mode_chars	fs/reiserfs/mode_string.c	/^static const char mode_chars[7] = "rwxSTst";$/;"	v	typeref:typename:const char[7]	file:
mode_cmd	board/samsung/common/misc.c	/^mode_cmd[BOOT_MODE_EXIT + 1] = {$/;"	v	typeref:typename:char * []	file:
mode_count	include/power/regulator.h	/^	int mode_count;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:int
mode_flags	fs/reiserfs/mode_string.c	/^static const mode_t mode_flags[] = {$/;"	v	typeref:typename:const mode_t[]	file:
mode_gpio	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool mode_gpio;$/;"	m	struct:pin_info	typeref:typename:bool	file:
mode_info	board/samsung/common/misc.c	/^mode_info[BOOT_MODE_EXIT + 1] = {$/;"	v	typeref:typename:char * []	file:
mode_info	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct mode_info {$/;"	s
mode_info	drivers/pci/pci_rom.c	/^struct vbe_mode_info mode_info;$/;"	v	typeref:struct:vbe_mode_info
mode_info_block	include/vbe.h	/^		u8 mode_info_block[256];$/;"	m	union:vbe_mode_info::__anona659a46b010a	typeref:typename:u8[256]
mode_last	drivers/misc/pca9551_led.c	/^static int mode_last;$/;"	v	typeref:typename:int	file:
mode_leave_menu	board/samsung/common/misc.c	/^static int mode_leave_menu(int mode)$/;"	f	typeref:typename:int	file:
mode_name	board/samsung/common/misc.c	/^mode_name[BOOT_MODE_EXIT + 1][2] = {$/;"	v	typeref:typename:char * [][2]	file:
mode_name	drivers/ddr/marvell/a38x/ddr3_init.c	/^	char *mode_name;$/;"	m	struct:dram_modes	typeref:typename:char *	file:
mode_name	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	char *mode_name;$/;"	m	struct:dram_modes	typeref:typename:char *
mode_t	fs/reiserfs/mode_string.c	/^#define mode_t /;"	d	file:
mode_t	include/linux/types.h	/^typedef __kernel_mode_t		mode_t;$/;"	t	typeref:typename:__kernel_mode_t
modectl_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 modectl_params_sn04[]	= {0x01};$/;"	v	typeref:typename:u16[]	file:
modedb	include/linux/fb.h	/^	struct fb_videomode *modedb;	\/* mode database *\/$/;"	m	struct:fb_monspecs	typeref:struct:fb_videomode *
modedb_len	include/linux/fb.h	/^	__u32 modedb_len;		\/* mode database length *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
model	board/freescale/common/qixis.h	/^	u8 model;   \/* Information of software programming model version *\/$/;"	m	struct:qixis	typeref:typename:u8
model	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 model[16];        \/* 0x30: model string *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[16]
model	board/raspberrypi/rpi/rpi.c	/^static const struct rpi_model *model;$/;"	v	typeref:typename:const struct rpi_model *	file:
model	drivers/net/ag7xxx.c	/^	enum ag7xxx_model	model;$/;"	m	struct:ar7xxx_eth_priv	typeref:enum:ag7xxx_model	file:
model	include/ata.h	/^	unsigned char	model[40];	\/* 0 = not_specified *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char[40]
model	include/fsl_qe.h	/^		u16 model;	\/* The SOC model  *\/$/;"	m	struct:qe_firmware::__anon7a33fbc80108	typeref:typename:u16
model	include/linux/fb.h	/^	__u32 model;			\/* Monitor Model *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
model	include/linux/mtd/nand.h	/^	char model[20];$/;"	m	struct:nand_jedec_params	typeref:typename:char[20]
model	include/linux/mtd/nand.h	/^	char model[20];$/;"	m	struct:nand_onfi_params	typeref:typename:char[20]
model1	scripts/kconfig/gconf.c	/^GtkTreeModel *model1, *model2;$/;"	v	typeref:typename:GtkTreeModel *
model2	scripts/kconfig/gconf.c	/^GtkTreeModel *model1, *model2;$/;"	v	typeref:typename:GtkTreeModel *
model_206ax_get_count	arch/x86/cpu/ivybridge/model_206ax.c	/^static int model_206ax_get_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
model_206ax_get_info	arch/x86/cpu/ivybridge/model_206ax.c	/^static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info)$/;"	f	typeref:typename:int	file:
model_206ax_init	arch/x86/cpu/ivybridge/model_206ax.c	/^static int model_206ax_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
modelist	include/linux/fb.h	/^	struct list_head modelist;	\/* mode list *\/$/;"	m	struct:fb_info	typeref:struct:list_head
modem_3v3_reg	arch/arm/dts/tegra30-cardhu.dts	/^		modem_3v3_reg: regulator@4 {$/;"	l
modemif_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	modemif_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
modena_init0_bw_fractional	arch/arm/include/asm/arch-am33xx/cpu.h	/^	u32 modena_init0_bw_fractional;$/;"	m	struct:l3f_cfg_bwlimiter	typeref:typename:u32
modena_init0_bw_integer	arch/arm/include/asm/arch-am33xx/cpu.h	/^	u32 modena_init0_bw_integer;$/;"	m	struct:l3f_cfg_bwlimiter	typeref:typename:u32
modena_init0_watermark_0	arch/arm/include/asm/arch-am33xx/cpu.h	/^	u32 modena_init0_watermark_0;$/;"	m	struct:l3f_cfg_bwlimiter	typeref:typename:u32
moder	drivers/gpio/stm32_gpio.c	/^	u32 moder;	\/* GPIO port mode *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
modereg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	modereg;	\/* 0x00: APB_MISC_GP_MODEREG *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
modereg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	modereg;	\/* 0x00: APB_MISC_GP_MODEREG *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
modereg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	modereg;	\/* 0x00: APB_MISC_GP_MODEREG *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
modereg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	modereg;	\/* 0x00: APB_MISC_GP_MODEREG *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
modereg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	modereg;	\/* 0x00: APB_MISC_GP_MODEREG *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
modes	arch/arm/imx-common/cmd_bmode.c	/^static const struct boot_mode *modes[2];$/;"	v	typeref:typename:const struct boot_mode * [2]	file:
modes_ptr	include/vbe.h	/^	u32 modes_ptr;$/;"	m	struct:vbe_info	typeref:typename:u32
modetable	tools/mxsimage.h	/^} modetable[] = {$/;"	v	typeref:typename:const struct __anonc4848c960c08[]
modifiedVarTab	include/MCD_dma.h	/^	volatile u32 modifiedVarTab;$/;"	m	struct:__anon0c34f9b30108	typeref:typename:volatile u32
modifiers	include/input.h	/^	uchar modifiers;$/;"	m	struct:input_config	typeref:typename:uchar
modify	disk/part_iso.h	/^	unsigned char modify[17];		\/* modification date *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[17]
modify	disk/part_iso.h	/^	unsigned char modify[17];		\/* modification date *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[17]
modify_dg_result	arch/arm/cpu/armv7/mx6/ddr.c	/^static void modify_dg_result(u32 *reg_st0, u32 *reg_st1, u32 *reg_ctrl)$/;"	f	typeref:typename:void	file:
modify_domain	arch/arm/include/asm/proc-armv/domain.h	/^#define modify_domain(/;"	d
modir	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 modir;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
modir	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 modir;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
modtime	fs/yaffs2/yaffsfs.h	/^	unsigned long modtime;$/;"	m	struct:yaffs_utimbuf	typeref:typename:unsigned long
modu_attr	include/ddr_spd.h	/^			uint8_t modu_attr;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
modu_attr	include/ddr_spd.h	/^			uint8_t modu_attr;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
modu_attr	include/ddr_spd.h	/^			unsigned char modu_attr;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
modulctrl	drivers/spi/omap3_spi.c	/^	unsigned int modulctrl;		\/* 0x28 *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
module_base	board/micronas/vct/gpio.c	/^static u32 module_base[] = {$/;"	v	typeref:typename:u32[]	file:
module_entry_point	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t module_entry_point;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
module_exit	include/linux/compat.h	/^#define module_exit(/;"	d
module_init	include/linux/compat.h	/^#define module_init(/;"	d
module_link_start_address	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t module_link_start_address;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
module_param	include/linux/compat.h	/^#define module_param(/;"	d
module_param_call	include/linux/compat.h	/^#define module_param_call(/;"	d
module_param_named	fs/ubifs/ubifs.h	/^#define module_param_named(/;"	d
module_part_number	arch/x86/include/asm/global_data.h	/^	uint8_t module_part_number[19];$/;"	m	struct:dimm_info	typeref:typename:uint8_t[19]
module_pin_mux	arch/arm/include/asm/arch-am33xx/mux.h	/^struct module_pin_mux {$/;"	s
module_program_size	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t module_program_size;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
module_put	include/linux/compat.h	/^#define module_put(/;"	d
module_type	include/ddr_spd.h	/^	uint8_t module_type;		\/*  3 Key Byte \/ Module Type *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
module_type	include/ddr_spd.h	/^	unsigned char module_type;     \/*  3 Key Byte \/ Module Type *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
module_vdd	include/ddr_spd.h	/^	uint8_t module_vdd;		\/* 11 Module nominal voltage *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
module_vdd	include/ddr_spd.h	/^	unsigned char module_vdd;      \/*  6 Module nominal voltage, VDD *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
modules_sym	scripts/kconfig/symbol.c	/^struct symbol *modules_sym;$/;"	v	typeref:struct:symbol *
modules_val	scripts/kconfig/symbol.c	/^tristate modules_val;$/;"	v	typeref:typename:tristate
modulo	lib/bch.c	/^static inline int modulo(struct bch_control *bch, unsigned int v)$/;"	f	typeref:typename:int	file:
modulus	include/u-boot/rsa-mod-exp.h	/^	const void *modulus;	\/* modulus as byte array *\/$/;"	m	struct:key_prop	typeref:typename:const void *
modulus	include/u-boot/rsa.h	/^	uint32_t *modulus;	\/* modulus as little endian array *\/$/;"	m	struct:rsa_public_key	typeref:typename:uint32_t *
moea	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t moea;$/;"	m	struct:paace::__anon6139da31040a::__anon6139da310508	typeref:typename:uint8_t
moeb	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t moeb;$/;"	m	struct:paace::__anon6139da31040a::__anon6139da310508	typeref:typename:uint8_t
mon_alrm	arch/x86/include/asm/acpi_table.h	/^	u8 mon_alrm;$/;"	m	struct:acpi_fadt	typeref:typename:u8
mon_install	arch/arm/mach-keystone/mon.c	/^int mon_install(u32 addr, u32 dpsc, u32 freq)$/;"	f	typeref:typename:int
mon_len	include/asm-generic/global_data.h	/^	unsigned long mon_len;		\/* monitor len *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
mon_lengths	include/linux/time.h	/^    static _CONST int mon_lengths[2][MONSPERYEAR] = {$/;"	m	struct:_DEFUN	typeref:typename:_CONST int[2][]
mon_name	include/linux/time.h	/^    static _CONST char mon_name[12][3] = {$/;"	v	typeref:typename:_CONST char[12][3]
mon_power_off	arch/arm/mach-keystone/mon.c	/^int mon_power_off(int core_id)$/;"	f	typeref:typename:int
mon_power_on	arch/arm/mach-keystone/mon.c	/^int mon_power_on(int core_id, void *ep)$/;"	f	typeref:typename:int
monitor	drivers/video/sunxi_display.c	/^	enum sunxi_monitor monitor;$/;"	m	struct:sunxi_display	typeref:enum:sunxi_monitor	file:
monitor	drivers/video/sunxi_display2.c	/^	enum sunxi_monitor monitor;$/;"	m	struct:sunxi_display	typeref:enum:sunxi_monitor	file:
monitor	include/linux/fb.h	/^	__u8  monitor[14];		\/* Monitor String *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8[14]
monitor_details	include/edid.h	/^	} monitor_details;$/;"	m	struct:edid1_info	typeref:union:edid1_info::__anon4a0dc044040a
monitor_flash_len	common/board_r.c	/^ulong monitor_flash_len;$/;"	v	typeref:typename:ulong
monitor_number	include/vbe.h	/^	u8 monitor_number;$/;"	m	struct:vbe_screen_info_input	typeref:typename:u8
mono_8bit_mode	drivers/video/da8xx-fb.h	/^	unsigned char mono_8bit_mode;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
monspecs	include/linux/fb.h	/^	struct fb_monspecs monspecs;	\/* Current Monitor specs *\/$/;"	m	struct:fb_info	typeref:struct:fb_monspecs
montgomery_mul	lib/rsa/rsa-mod-exp.c	/^static void montgomery_mul(const struct rsa_public_key *key,$/;"	f	typeref:typename:void	file:
montgomery_mul_add_step	lib/rsa/rsa-mod-exp.c	/^static void montgomery_mul_add_step(const struct rsa_public_key *key,$/;"	f	typeref:typename:void	file:
month	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	month; \/* 0x10 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
month	drivers/rtc/ds1302.c	/^	unsigned char month:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
month	include/efi.h	/^	u8 month;$/;"	m	struct:efi_time	typeref:typename:u8
month10	drivers/rtc/ds1302.c	/^	unsigned char month10:1;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:1	file:
month_days	drivers/rtc/date.c	/^static int month_days[12] = {$/;"	v	typeref:typename:int[12]	file:
month_offset	drivers/rtc/date.c	/^static int month_offset[] = {$/;"	v	typeref:typename:int[]	file:
months	board/compulab/common/eeprom.c	/^char *months[12] = {"Jan", "Feb", "Mar", "Apr", "May", "Jun",$/;"	v	typeref:typename:char * [12]
mop_sop_en	drivers/usb/musb/am35x.h	/^	u32	mop_sop_en;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
mor	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	mor;		\/* 0x20 Main Oscilator Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
mos	fs/zfs/zfs.c	/^	dnode_end_t mos;$/;"	m	struct:zfs_data	typeref:typename:dnode_end_t	file:
mosi	drivers/spi/soft_spi.c	/^	struct gpio_desc mosi;$/;"	m	struct:soft_spi_platdata	typeref:struct:gpio_desc	file:
most	doc/README.x86	/^most of the low-level details.$/;"	l
motor_pins	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	motor_pins: motor_pins@0 {$/;"	l
mount	fs/ubifs/ubifs.h	/^	struct dentry *(*mount) (struct file_system_type *, int,$/;"	m	struct:file_system_type	typeref:struct:dentry * (*)(struct file_system_type *,int,const char *,void *)
mount	test/py/tests/test_ums.py	/^    def mount():$/;"	f	function:test_ums	file:
mount_opts	fs/ubifs/ubifs.h	/^	struct ubifs_mount_opts mount_opts;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_mount_opts
mount_ubifs	fs/ubifs/super.c	/^static int mount_ubifs(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
mounting	fs/ubifs/ubifs.h	/^	unsigned int mounting:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
mouse_command_active	drivers/input/ps2mult.c	/^static int mouse_command_active = 0;$/;"	v	typeref:typename:int	file:
mout_top0_bus0_pll_half	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned long mout_top0_bus0_pll_half;$/;"	m	struct:exynos7420_clk_top0_priv	typeref:typename:unsigned long	file:
mov_l	arch/arc/lib/_millicodethunk.S	/^#define mov_l /;"	d	file:
move64	post/drivers/memory.c	/^static void move64(const unsigned long long *src, unsigned long long *dest)$/;"	f	typeref:typename:void	file:
move_config	tools/moveconfig.py	/^def move_config(configs, options):$/;"	f
move_from	drivers/mtd/ubi/ubi.h	/^	struct ubi_wl_entry *move_from;$/;"	m	struct:ubi_device	typeref:struct:ubi_wl_entry *
move_mutex	drivers/mtd/ubi/ubi.h	/^	struct mutex move_mutex;$/;"	m	struct:ubi_device	typeref:struct:mutex
move_node	fs/ubifs/gc.c	/^static int move_node(struct ubifs_info *c, struct ubifs_scan_leb *sleb,$/;"	f	typeref:typename:int	file:
move_nodes	fs/ubifs/gc.c	/^static int move_nodes(struct ubifs_info *c, struct ubifs_scan_leb *sleb)$/;"	f	typeref:typename:int	file:
move_rows	include/video_console.h	/^	int (*move_rows)(struct udevice *dev, uint rowdst, uint rowsrc,$/;"	m	struct:vidconsole_ops	typeref:typename:int (*)(struct udevice * dev,uint rowdst,uint rowsrc,uint count)
move_to	drivers/mtd/ubi/ubi.h	/^	struct ubi_wl_entry *move_to;$/;"	m	struct:ubi_device	typeref:struct:ubi_wl_entry *
move_to_access_state	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void move_to_access_state(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
move_to_access_state	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void move_to_access_state(const struct chan_info *chan)$/;"	f	typeref:typename:void	file:
move_to_config_state	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void move_to_config_state(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
move_to_config_state	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void move_to_config_state(struct rk3288_ddr_publ *publ,$/;"	f	typeref:typename:void	file:
move_to_put	drivers/mtd/ubi/ubi.h	/^	int move_to_put;$/;"	m	struct:ubi_device	typeref:typename:int
move_to_topdir	scripts/fill_scrapyard.py	/^def move_to_topdir():$/;"	f
move_up_lpt_heap	fs/ubifs/lprops.c	/^static void move_up_lpt_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap,$/;"	f	typeref:typename:void	file:
movmem_done	arch/sh/lib/movmem.S	/^movmem_done: ! share slot insn, works out aligned.$/;"	l
movmem_loop	arch/sh/lib/movmem.S	/^movmem_loop: \/* Reached with rts *\/$/;"	l
mp_add_mpc_entry	arch/x86/include/asm/mpspec.h	/^static inline void mp_add_mpc_entry(struct mp_config_table *mc, uint length)$/;"	f	typeref:typename:void
mp_add_mpe_entry	arch/x86/include/asm/mpspec.h	/^static inline void mp_add_mpe_entry(struct mp_config_table *mc,$/;"	f	typeref:typename:void
mp_alloc_base	arch/arm/include/asm/global_data.h	/^	uint mp_alloc_base;$/;"	m	struct:arch_global_data	typeref:typename:uint
mp_alloc_base	arch/powerpc/include/asm/global_data.h	/^	uint mp_alloc_base;$/;"	m	struct:arch_global_data	typeref:typename:uint
mp_alloc_top	arch/arm/include/asm/global_data.h	/^	uint mp_alloc_top;$/;"	m	struct:arch_global_data	typeref:typename:uint
mp_alloc_top	arch/powerpc/include/asm/global_data.h	/^	uint mp_alloc_top;$/;"	m	struct:arch_global_data	typeref:typename:uint
mp_base_config_entry_type	arch/x86/include/asm/mpspec.h	/^enum mp_base_config_entry_type {$/;"	g
mp_callback_t	arch/x86/include/asm/mp.h	/^typedef int (*mp_callback_t)(struct udevice *cpu, void *arg);$/;"	t	typeref:typename:int (*)(struct udevice * cpu,void * arg)
mp_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 mp_clk_cfg;		\/* 0x114 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mp_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mp_clk_cfg;		\/* 0x114 MP module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mp_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 mp_clk_cfg;		\/* 0x498 mp clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mp_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 mp_clk_cfg;		\/* 0x114 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mp_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mp_clk_cfg;		\/* 0x114 MP module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mp_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 mp_clk_cfg;		\/* 0x498 mp clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mp_config_table	arch/x86/include/asm/mpspec.h	/^struct mp_config_table {$/;"	s
mp_config_table_init	arch/x86/lib/mpspec.c	/^void mp_config_table_init(struct mp_config_table *mc)$/;"	f	typeref:typename:void
mp_determine_pci_dstirq	arch/x86/cpu/qemu/qemu.c	/^int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq)$/;"	f	typeref:typename:int
mp_determine_pci_dstirq	arch/x86/lib/mpspec.c	/^__weak int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq)$/;"	f	typeref:typename:__weak int
mp_ext_bus_hierarchy	arch/x86/include/asm/mpspec.h	/^struct mp_ext_bus_hierarchy {$/;"	s
mp_ext_compat_address_space	arch/x86/include/asm/mpspec.h	/^struct mp_ext_compat_address_space {$/;"	s
mp_ext_config	arch/x86/include/asm/mpspec.h	/^struct mp_ext_config {$/;"	s
mp_ext_config_entry_type	arch/x86/include/asm/mpspec.h	/^enum mp_ext_config_entry_type {$/;"	g
mp_ext_system_address_space	arch/x86/include/asm/mpspec.h	/^struct mp_ext_system_address_space {$/;"	s
mp_flight_plan	arch/x86/cpu/mp_init.c	/^struct mp_flight_plan {$/;"	s	file:
mp_flight_record	arch/x86/include/asm/mp.h	/^struct mp_flight_record {$/;"	s
mp_floating_table	arch/x86/include/asm/mpspec.h	/^struct mp_floating_table {$/;"	s
mp_info	arch/x86/cpu/mp_init.c	/^static struct mp_flight_plan mp_info;$/;"	v	typeref:struct:mp_flight_plan	file:
mp_init	arch/x86/cpu/mp_init.c	/^int mp_init(struct mp_params *p)$/;"	f	typeref:typename:int
mp_init_cpu	arch/x86/cpu/mp_init.c	/^int mp_init_cpu(struct udevice *cpu, void *unused)$/;"	f	typeref:typename:int
mp_irq_source_types	arch/x86/include/asm/mpspec.h	/^enum mp_irq_source_types {$/;"	g
mp_next_mpc_entry	arch/x86/include/asm/mpspec.h	/^static inline u32 mp_next_mpc_entry(struct mp_config_table *mc)$/;"	f	typeref:typename:u32
mp_next_mpe_entry	arch/x86/include/asm/mpspec.h	/^static inline u32 mp_next_mpe_entry(struct mp_config_table *mc)$/;"	f	typeref:typename:u32
mp_pacing0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing0;	\/* 0xc0 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_pacing0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing0;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_pacing1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing1;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_pacing1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing1;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_pacing2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing2;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_pacing2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing2;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_pacing3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing3;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_pacing3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_pacing3;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_params	arch/x86/include/asm/mp.h	/^struct mp_params {$/;"	s
mp_priority	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_priority;	\/* 0xac *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_priority	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_priority;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_steps	arch/x86/cpu/cpu.c	/^static struct mp_flight_record mp_steps[] = {$/;"	v	typeref:struct:mp_flight_record[]	file:
mp_threshold0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_threshold0;	\/* 0xd0 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_threshold0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_threshold0;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_threshold1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_threshold1;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_threshold1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_threshold1;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_threshold2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_threshold2;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_threshold2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_threshold2;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_weight0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight0;	\/* 0xb0 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_weight0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight0;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_weight1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight1;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_weight1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight1;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_weight2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight2;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_weight2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight2;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_weight3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight3;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
mp_weight3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	mp_weight3;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
mp_write_address_space	arch/x86/lib/mpspec.c	/^void mp_write_address_space(struct mp_config_table *mc,$/;"	f	typeref:typename:void
mp_write_bus	arch/x86/lib/mpspec.c	/^void mp_write_bus(struct mp_config_table *mc, int id, const char *bustype)$/;"	f	typeref:typename:void
mp_write_bus_hierarchy	arch/x86/lib/mpspec.c	/^void mp_write_bus_hierarchy(struct mp_config_table *mc,$/;"	f	typeref:typename:void
mp_write_compat_address_space	arch/x86/lib/mpspec.c	/^void mp_write_compat_address_space(struct mp_config_table *mc, int busid,$/;"	f	typeref:typename:void
mp_write_floating_table	arch/x86/lib/mpspec.c	/^struct mp_config_table *mp_write_floating_table(struct mp_floating_table *mf)$/;"	f	typeref:struct:mp_config_table *
mp_write_intsrc	arch/x86/lib/mpspec.c	/^void mp_write_intsrc(struct mp_config_table *mc, int irqtype, int irqflag,$/;"	f	typeref:typename:void
mp_write_ioapic	arch/x86/lib/mpspec.c	/^void mp_write_ioapic(struct mp_config_table *mc, int id, int ver, u32 apicaddr)$/;"	f	typeref:typename:void
mp_write_lintsrc	arch/x86/lib/mpspec.c	/^void mp_write_lintsrc(struct mp_config_table *mc, int irqtype, int irqflag,$/;"	f	typeref:typename:void
mp_write_pci_intsrc	arch/x86/lib/mpspec.c	/^void mp_write_pci_intsrc(struct mp_config_table *mc, int irqtype,$/;"	f	typeref:typename:void
mp_write_processor	arch/x86/lib/mpspec.c	/^void mp_write_processor(struct mp_config_table *mc)$/;"	f	typeref:typename:void
mpacctl	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mpacctl; \/* 0x04 *\/$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
mpark	arch/m68k/include/asm/immap_5235.h	/^	u32 mpark;		\/* 0x1C *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
mpark	arch/m68k/include/asm/immap_5275.h	/^	u32 mpark;$/;"	m	struct:sys_ctrl	typeref:typename:u32
mpark	arch/m68k/include/asm/immap_5282.h	/^	u8 mpark;$/;"	m	struct:scm_ctrl	typeref:typename:u8
mpark	arch/m68k/include/asm/immap_5307.h	/^	u8  mpark;$/;"	m	struct:sim	typeref:typename:u8
mparr_err_status1	drivers/video/fsl_dcu_fb.c	/^	u32 mparr_err_status1;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
mparr_err_status3	drivers/video/fsl_dcu_fb.c	/^	u32 mparr_err_status3;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
mpart	include/ddr_spd.h	/^	uint8_t mpart[20];		\/* 329~348 Mfg's Module Part Number *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[20]
mpart	include/ddr_spd.h	/^	unsigned char mpart[18];       \/* 128-145 Mfg's Module Part Number *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[18]
mpart	include/ddr_spd.h	/^	unsigned char mpart[18];   \/* 73 Manufacturer's Part Number *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[18]
mpart	include/ddr_spd.h	/^	unsigned char mpart[18];   \/* 73 Manufacturer's Part Number *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char[18]
mpart	include/fsl_ddr_dimm_params.h	/^	char mpart[19];		\/* guaranteed null terminated *\/$/;"	m	struct:dimm_params_s	typeref:typename:char[19]
mpart	include/spd.h	/^	unsigned char mpart[18];   \/* 73 Manufacturer's Part Number *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[18]
mpax	arch/arm/mach-keystone/msmc.c	/^struct mpax {$/;"	s	file:
mpax_seg_size	arch/arm/mach-keystone/include/mach/msmc.h	/^enum mpax_seg_size {$/;"	g
mpaxh	arch/arm/mach-keystone/msmc.c	/^	u32	mpaxh;$/;"	m	struct:mpax	typeref:typename:u32	file:
mpaxl	arch/arm/mach-keystone/msmc.c	/^	u32	mpaxl;$/;"	m	struct:mpax	typeref:typename:u32	file:
mpc	drivers/net/e1000.h	/^	uint64_t mpc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mpc3w_control	include/gdsys_fpga.h	/^	u16 mpc3w_control;	\/* 0x001a *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mpc3w_control	include/gdsys_fpga.h	/^	u16 mpc3w_control;	\/* 0x0058 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
mpc5121_nfc_addr_cycle	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_buf_copy	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len,$/;"	f	typeref:typename:void	file:
mpc5121_nfc_chip	drivers/mtd/nand/mpc5121_nfc.c	/^int mpc5121_nfc_chip = 0;$/;"	v	typeref:typename:int
mpc5121_nfc_command	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,$/;"	f	typeref:typename:void	file:
mpc5121_nfc_copy_spare	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,$/;"	f	typeref:typename:void	file:
mpc5121_nfc_dev_ready	drivers/mtd/nand/mpc5121_nfc.c	/^static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
mpc5121_nfc_done	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_done(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_prv	drivers/mtd/nand/mpc5121_nfc.c	/^struct mpc5121_nfc_prv {$/;"	s	file:
mpc5121_nfc_read_buf	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_read_byte	drivers/mtd/nand/mpc5121_nfc.c	/^static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
mpc5121_nfc_read_hw_config	drivers/mtd/nand/mpc5121_nfc.c	/^static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
mpc5121_nfc_read_word	drivers/mtd/nand/mpc5121_nfc.c	/^static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:u16	file:
mpc5121_nfc_select_chip	board/freescale/mpc5121ads/mpc5121ads.c	/^void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void
mpc5121_nfc_send_addr	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_send_cmd	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_send_prog_page	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_send_read_id	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_send_read_page	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_send_read_status	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
mpc5121_nfc_write_buf	drivers/mtd/nand/mpc5121_nfc.c	/^static void mpc5121_nfc_write_buf(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
mpc512x CPU	arch/powerpc/cpu/mpc512x/Kconfig	/^menu "mpc512x CPU"$/;"	m
mpc512x_buff_descs	drivers/net/mpc512x_fec.h	/^} mpc512x_buff_descs;$/;"	t	typeref:struct:__anonf8b8c0fc0408
mpc512x_fec_bd_init	drivers/net/mpc512x_fec.c	/^static int mpc512x_fec_bd_init (mpc512x_fec_priv *fec)$/;"	f	typeref:typename:int	file:
mpc512x_fec_halt	drivers/net/mpc512x_fec.c	/^static void mpc512x_fec_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
mpc512x_fec_init	drivers/net/mpc512x_fec.c	/^static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
mpc512x_fec_init_phy	drivers/net/mpc512x_fec.c	/^int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int
mpc512x_fec_initialize	drivers/net/mpc512x_fec.c	/^int mpc512x_fec_initialize (bd_t * bis)$/;"	f	typeref:typename:int
mpc512x_fec_phydump	drivers/net/mpc512x_fec.c	/^static void mpc512x_fec_phydump (char *devname)$/;"	f	typeref:typename:void	file:
mpc512x_fec_priv	drivers/net/mpc512x_fec.h	/^} mpc512x_fec_priv;$/;"	t	typeref:struct:__anonf8b8c0fc0508
mpc512x_fec_rbd_clean	drivers/net/mpc512x_fec.c	/^static void mpc512x_fec_rbd_clean (mpc512x_fec_priv *fec, volatile FEC_RBD * pRbd)$/;"	f	typeref:typename:void	file:
mpc512x_fec_recv	drivers/net/mpc512x_fec.c	/^static int mpc512x_fec_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mpc512x_fec_send	drivers/net/mpc512x_fec.c	/^static int mpc512x_fec_send(struct eth_device *dev, void *eth_data,$/;"	f	typeref:typename:int	file:
mpc512x_fec_set_hwaddr	drivers/net/mpc512x_fec.c	/^static void mpc512x_fec_set_hwaddr (mpc512x_fec_priv *fec, unsigned char *mac)$/;"	f	typeref:typename:void	file:
mpc512x_fec_tbd_scrub	drivers/net/mpc512x_fec.c	/^static void mpc512x_fec_tbd_scrub (mpc512x_fec_priv *fec)$/;"	f	typeref:typename:void	file:
mpc512x_frame	drivers/net/mpc512x_fec.h	/^} mpc512x_frame;$/;"	t	typeref:struct:__anonf8b8c0fc0308
mpc512x_i2c_tap	arch/powerpc/cpu/mpc512x/i2c.c	/^struct mpc512x_i2c_tap {$/;"	s	file:
mpc512x_serial_initialize	arch/powerpc/cpu/mpc512x/serial.c	/^void mpc512x_serial_initialize(void)$/;"	f	typeref:typename:void
mpc5200_read_config_dword	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^static int mpc5200_read_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
mpc5200_write_config_dword	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^static int mpc5200_write_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
mpc5xx CPU	arch/powerpc/cpu/mpc5xx/Kconfig	/^menu "mpc5xx CPU"$/;"	m
mpc5xx_serial_drv	arch/powerpc/cpu/mpc5xx/serial.c	/^static struct serial_device mpc5xx_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
mpc5xx_serial_getc	arch/powerpc/cpu/mpc5xx/serial.c	/^static int mpc5xx_serial_getc(void)$/;"	f	typeref:typename:int	file:
mpc5xx_serial_init	arch/powerpc/cpu/mpc5xx/serial.c	/^static int mpc5xx_serial_init(void)$/;"	f	typeref:typename:int	file:
mpc5xx_serial_initialize	arch/powerpc/cpu/mpc5xx/serial.c	/^void mpc5xx_serial_initialize(void)$/;"	f	typeref:typename:void
mpc5xx_serial_putc	arch/powerpc/cpu/mpc5xx/serial.c	/^static void mpc5xx_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
mpc5xx_serial_setbrg	arch/powerpc/cpu/mpc5xx/serial.c	/^static void mpc5xx_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
mpc5xx_serial_tstc	arch/powerpc/cpu/mpc5xx/serial.c	/^static int mpc5xx_serial_tstc(void)$/;"	f	typeref:typename:int	file:
mpc5xxx CPU	arch/powerpc/cpu/mpc5xxx/Kconfig	/^menu "mpc5xxx CPU"$/;"	m
mpc5xxx_cdm	include/mpc5xxx.h	/^struct mpc5xxx_cdm {$/;"	s
mpc5xxx_fec_halt	drivers/net/mpc5xxx_fec.c	/^static void mpc5xxx_fec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
mpc5xxx_fec_init	drivers/net/mpc5xxx_fec.c	/^static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
mpc5xxx_fec_init_phy	drivers/net/mpc5xxx_fec.c	/^static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
mpc5xxx_fec_initialize	drivers/net/mpc5xxx_fec.c	/^int mpc5xxx_fec_initialize(bd_t * bis)$/;"	f	typeref:typename:int
mpc5xxx_fec_phydump	drivers/net/mpc5xxx_fec.c	/^static void mpc5xxx_fec_phydump (char *devname)$/;"	f	typeref:typename:void	file:
mpc5xxx_fec_priv	drivers/net/mpc5xxx_fec.h	/^} mpc5xxx_fec_priv;$/;"	t	typeref:struct:__anone13c4dc90308
mpc5xxx_fec_rbd_clean	drivers/net/mpc5xxx_fec.c	/^static void mpc5xxx_fec_rbd_clean(mpc5xxx_fec_priv *fec, volatile FEC_RBD * pRbd)$/;"	f	typeref:typename:void	file:
mpc5xxx_fec_rbd_init	drivers/net/mpc5xxx_fec.c	/^static int mpc5xxx_fec_rbd_init(mpc5xxx_fec_priv *fec)$/;"	f	typeref:typename:int	file:
mpc5xxx_fec_recv	drivers/net/mpc5xxx_fec.c	/^static int mpc5xxx_fec_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mpc5xxx_fec_send	drivers/net/mpc5xxx_fec.c	/^static int mpc5xxx_fec_send(struct eth_device *dev, void *eth_data,$/;"	f	typeref:typename:int	file:
mpc5xxx_fec_set_hwaddr	drivers/net/mpc5xxx_fec.c	/^static void mpc5xxx_fec_set_hwaddr(mpc5xxx_fec_priv *fec, char *mac)$/;"	f	typeref:typename:void	file:
mpc5xxx_fec_tbd_init	drivers/net/mpc5xxx_fec.c	/^static void mpc5xxx_fec_tbd_init(mpc5xxx_fec_priv *fec)$/;"	f	typeref:typename:void	file:
mpc5xxx_fec_tbd_scrub	drivers/net/mpc5xxx_fec.c	/^static void mpc5xxx_fec_tbd_scrub(mpc5xxx_fec_priv *fec)$/;"	f	typeref:typename:void	file:
mpc5xxx_get_irq	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^int mpc5xxx_get_irq(struct pt_regs *regs)$/;"	f	typeref:typename:int
mpc5xxx_gpio	include/mpc5xxx.h	/^struct mpc5xxx_gpio {$/;"	s
mpc5xxx_gpt	include/mpc5xxx.h	/^struct mpc5xxx_gpt {$/;"	s
mpc5xxx_gpt_0_7	include/mpc5xxx.h	/^struct mpc5xxx_gpt_0_7 {$/;"	s
mpc5xxx_i2c	include/mpc5xxx.h	/^struct mpc5xxx_i2c {$/;"	s
mpc5xxx_i2c_tap	arch/powerpc/cpu/mpc5xxx/i2c.c	/^struct mpc5xxx_i2c_tap {$/;"	s	file:
mpc5xxx_ic_ack	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static void mpc5xxx_ic_ack(unsigned int irq)$/;"	f	typeref:typename:void	file:
mpc5xxx_ic_disable	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static void mpc5xxx_ic_disable(unsigned int irq)$/;"	f	typeref:typename:void	file:
mpc5xxx_ic_disable_and_ack	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static void mpc5xxx_ic_disable_and_ack(unsigned int irq)$/;"	f	typeref:typename:void	file:
mpc5xxx_ic_enable	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static void mpc5xxx_ic_enable(unsigned int irq)$/;"	f	typeref:typename:void	file:
mpc5xxx_ic_end	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static void mpc5xxx_ic_end(unsigned int irq)$/;"	f	typeref:typename:void	file:
mpc5xxx_init_irq	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^void mpc5xxx_init_irq(void)$/;"	f	typeref:typename:void
mpc5xxx_intr	include/mpc5xxx.h	/^struct mpc5xxx_intr {$/;"	s
mpc5xxx_lpb	include/mpc5xxx.h	/^struct mpc5xxx_lpb {$/;"	s
mpc5xxx_mmap_ctl	include/mpc5xxx.h	/^struct mpc5xxx_mmap_ctl {$/;"	s
mpc5xxx_mscan	include/mpc5xxx.h	/^struct mpc5xxx_mscan {$/;"	s
mpc5xxx_psc	include/mpc5xxx.h	/^struct mpc5xxx_psc {$/;"	s
mpc5xxx_sdma	include/mpc5xxx.h	/^struct mpc5xxx_sdma {$/;"	s
mpc5xxx_sdram	include/mpc5xxx.h	/^struct mpc5xxx_sdram {$/;"	s
mpc5xxx_spi	include/mpc5xxx.h	/^struct mpc5xxx_spi {$/;"	s
mpc5xxx_wu_gpio	include/mpc5xxx.h	/^struct mpc5xxx_wu_gpio {$/;"	s
mpc5xxx_xlb	include/mpc5xxx.h	/^struct mpc5xxx_xlb {$/;"	s
mpc8260 CPU	arch/powerpc/cpu/mpc8260/Kconfig	/^menu "mpc8260 CPU"$/;"	m
mpc8260_scc_serial_drv	arch/powerpc/cpu/mpc8260/serial_scc.c	/^static struct serial_device mpc8260_scc_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
mpc8260_scc_serial_getc	arch/powerpc/cpu/mpc8260/serial_scc.c	/^static int mpc8260_scc_serial_getc(void)$/;"	f	typeref:typename:int	file:
mpc8260_scc_serial_init	arch/powerpc/cpu/mpc8260/serial_scc.c	/^static int mpc8260_scc_serial_init(void)$/;"	f	typeref:typename:int	file:
mpc8260_scc_serial_initialize	arch/powerpc/cpu/mpc8260/serial_scc.c	/^void mpc8260_scc_serial_initialize(void)$/;"	f	typeref:typename:void
mpc8260_scc_serial_putc	arch/powerpc/cpu/mpc8260/serial_scc.c	/^static void mpc8260_scc_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
mpc8260_scc_serial_setbrg	arch/powerpc/cpu/mpc8260/serial_scc.c	/^static void mpc8260_scc_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
mpc8260_scc_serial_tstc	arch/powerpc/cpu/mpc8260/serial_scc.c	/^static int mpc8260_scc_serial_tstc(void)$/;"	f	typeref:typename:int	file:
mpc8260_smc_serial_drv	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static struct serial_device mpc8260_smc_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
mpc8260_smc_serial_getc	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static int mpc8260_smc_serial_getc(void)$/;"	f	typeref:typename:int	file:
mpc8260_smc_serial_init	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static int mpc8260_smc_serial_init(void)$/;"	f	typeref:typename:int	file:
mpc8260_smc_serial_initialize	arch/powerpc/cpu/mpc8260/serial_smc.c	/^void mpc8260_smc_serial_initialize(void)$/;"	f	typeref:typename:void
mpc8260_smc_serial_putc	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static void mpc8260_smc_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
mpc8260_smc_serial_setbrg	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static void mpc8260_smc_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
mpc8260_smc_serial_tstc	arch/powerpc/cpu/mpc8260/serial_smc.c	/^static int mpc8260_smc_serial_tstc(void)$/;"	f	typeref:typename:int	file:
mpc82xx_scc_enet_initialize	arch/powerpc/cpu/mpc8260/ether_scc.c	/^int mpc82xx_scc_enet_initialize(bd_t *bis)$/;"	f	typeref:typename:int
mpc8308_get_fpga_done	board/gdsys/mpc8308/hrcon.c	/^int mpc8308_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
mpc8308_get_fpga_done	board/gdsys/mpc8308/strider.c	/^int mpc8308_get_fpga_done(unsigned fpga)$/;"	f	typeref:typename:int
mpc8308_init	board/gdsys/mpc8308/hrcon.c	/^void mpc8308_init(void)$/;"	f	typeref:typename:void
mpc8308_init	board/gdsys/mpc8308/strider.c	/^void mpc8308_init(void)$/;"	f	typeref:typename:void
mpc8308_set_fpga_reset	board/gdsys/mpc8308/hrcon.c	/^void mpc8308_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
mpc8308_set_fpga_reset	board/gdsys/mpc8308/strider.c	/^void mpc8308_set_fpga_reset(unsigned state)$/;"	f	typeref:typename:void
mpc8308_setup_hw	board/gdsys/mpc8308/hrcon.c	/^void mpc8308_setup_hw(void)$/;"	f	typeref:typename:void
mpc8308_setup_hw	board/gdsys/mpc8308/strider.c	/^void mpc8308_setup_hw(void)$/;"	f	typeref:typename:void
mpc83xx CPU	arch/powerpc/cpu/mpc83xx/Kconfig	/^menu "mpc83xx CPU"$/;"	m
mpc83xx_gpio_init_f	drivers/gpio/mpc83xx_gpio.c	/^void mpc83xx_gpio_init_f(void)$/;"	f	typeref:typename:void
mpc83xx_gpio_init_r	drivers/gpio/mpc83xx_gpio.c	/^void mpc83xx_gpio_init_r(void)$/;"	f	typeref:typename:void
mpc83xx_pci_init	arch/powerpc/cpu/mpc83xx/pci.c	/^void mpc83xx_pci_init(int num_buses, struct pci_region **reg)$/;"	f	typeref:typename:void
mpc83xx_pcie_cfg_space	arch/powerpc/cpu/mpc83xx/pcie.c	/^} mpc83xx_pcie_cfg_space[] = {$/;"	v	typeref:struct:__anoncce71cd40108[]
mpc83xx_pcie_init	arch/powerpc/cpu/mpc83xx/pcie.c	/^void mpc83xx_pcie_init(int num_buses, struct pci_region **reg)$/;"	f	typeref:typename:void
mpc83xx_pcie_init_bus	arch/powerpc/cpu/mpc83xx/pcie.c	/^static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg)$/;"	f	typeref:typename:void	file:
mpc83xx_pcie_priv	arch/powerpc/cpu/mpc83xx/pcie.c	/^static struct mpc83xx_pcie_priv {$/;"	s	file:
mpc83xx_pcie_register_hose	arch/powerpc/cpu/mpc83xx/pcie.c	/^static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,$/;"	f	typeref:typename:void	file:
mpc83xx_pcie_remap_cfg	arch/powerpc/cpu/mpc83xx/pcie.c	/^static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:int	file:
mpc83xx_pcislave_unlock	arch/powerpc/cpu/mpc83xx/pci.c	/^void mpc83xx_pcislave_unlock(int bus)$/;"	f	typeref:typename:void
mpc85xx CPU	arch/powerpc/cpu/mpc85xx/Kconfig	/^menu "mpc85xx CPU"$/;"	m
mpc85xx_config_via	board/freescale/common/cds_via.c	/^void mpc85xx_config_via(struct pci_controller *hose,$/;"	f	typeref:typename:void
mpc85xx_config_via_ac97	board/freescale/common/cds_via.c	/^void mpc85xx_config_via_ac97(struct pci_controller *hose,$/;"	f	typeref:typename:void
mpc85xx_config_via_power	board/freescale/common/cds_via.c	/^void mpc85xx_config_via_power(struct pci_controller *hose,$/;"	f	typeref:typename:void
mpc85xx_config_via_usb	board/freescale/common/cds_via.c	/^void mpc85xx_config_via_usb(struct pci_controller *hose,$/;"	f	typeref:typename:void
mpc85xx_config_via_usb2	board/freescale/common/cds_via.c	/^void mpc85xx_config_via_usb2(struct pci_controller *hose,$/;"	f	typeref:typename:void
mpc85xx_config_via_usbide	board/freescale/common/cds_via.c	/^void mpc85xx_config_via_usbide(struct pci_controller *hose,$/;"	f	typeref:typename:void
mpc85xx_gpio_data	drivers/gpio/mpc85xx_gpio.c	/^struct mpc85xx_gpio_data {$/;"	s	file:
mpc85xx_gpio_direction_input	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_direction_input(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_direction_output	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_get	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline unsigned int mpc85xx_gpio_get(unsigned int mask)$/;"	f	typeref:typename:unsigned int
mpc85xx_gpio_get_dir	drivers/gpio/mpc85xx_gpio.c	/^static inline u32 mpc85xx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)$/;"	f	typeref:typename:u32	file:
mpc85xx_gpio_get_function	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_get_function(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_get_open_drain	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_get_open_drain(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_get_val	drivers/gpio/mpc85xx_gpio.c	/^static inline u32 mpc85xx_gpio_get_val(struct ccsr_gpio *base, u32 mask)$/;"	f	typeref:typename:u32	file:
mpc85xx_gpio_get_value	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_ids	drivers/gpio/mpc85xx_gpio.c	/^static const struct udevice_id mpc85xx_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mpc85xx_gpio_ofdata_to_platdata	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_ofdata_to_platdata(struct udevice *dev) {$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_open_drain_off	drivers/gpio/mpc85xx_gpio.c	/^static inline void mpc85xx_gpio_open_drain_off(struct ccsr_gpio *base,$/;"	f	typeref:typename:void	file:
mpc85xx_gpio_open_drain_on	drivers/gpio/mpc85xx_gpio.c	/^static inline void mpc85xx_gpio_open_drain_on(struct ccsr_gpio *base, u32$/;"	f	typeref:typename:void	file:
mpc85xx_gpio_open_drain_val	drivers/gpio/mpc85xx_gpio.c	/^static inline int mpc85xx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_plat	arch/powerpc/include/asm/arch-mpc85xx/gpio.h	/^struct mpc85xx_gpio_plat {$/;"	s
mpc85xx_gpio_platdata_to_priv	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_platdata_to_priv(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_probe	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_set	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline void mpc85xx_gpio_set(unsigned int mask,$/;"	f	typeref:typename:void
mpc85xx_gpio_set_high	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline void mpc85xx_gpio_set_high(unsigned int gpios)$/;"	f	typeref:typename:void
mpc85xx_gpio_set_high	drivers/gpio/mpc85xx_gpio.c	/^static inline void mpc85xx_gpio_set_high(struct ccsr_gpio *base, u32 gpios)$/;"	f	typeref:typename:void	file:
mpc85xx_gpio_set_in	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline void mpc85xx_gpio_set_in(unsigned int gpios)$/;"	f	typeref:typename:void
mpc85xx_gpio_set_in	drivers/gpio/mpc85xx_gpio.c	/^static inline void mpc85xx_gpio_set_in(struct ccsr_gpio *base, u32 gpios)$/;"	f	typeref:typename:void	file:
mpc85xx_gpio_set_low	arch/powerpc/include/asm/mpc85xx_gpio.h	/^static inline void mpc85xx_gpio_set_low(unsigned int gpios)$/;"	f	typeref:typename:void
mpc85xx_gpio_set_low	drivers/gpio/mpc85xx_gpio.c	/^static inline void mpc85xx_gpio_set_low(struct ccsr_gpio *base, u32 gpios)$/;"	f	typeref:typename:void	file:
mpc85xx_gpio_set_open_drain	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_set_open_drain(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
mpc85xx_gpio_set_value	drivers/gpio/mpc85xx_gpio.c	/^static int mpc85xx_gpio_set_value(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
mpc85xx_reginfo	arch/powerpc/cpu/mpc85xx/cpu.c	/^void mpc85xx_reginfo(void)$/;"	f	typeref:typename:void
mpc85xx_serial_drv	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^static struct serial_device mpc85xx_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
mpc85xx_serial_getc	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^static int mpc85xx_serial_getc(void)$/;"	f	typeref:typename:int	file:
mpc85xx_serial_init	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^static int mpc85xx_serial_init(void)$/;"	f	typeref:typename:int	file:
mpc85xx_serial_initialize	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^void mpc85xx_serial_initialize(void)$/;"	f	typeref:typename:void
mpc85xx_serial_putc	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^static void mpc85xx_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
mpc85xx_serial_setbrg	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^static void mpc85xx_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
mpc85xx_serial_tstc	arch/powerpc/cpu/mpc85xx/serial_scc.c	/^static int mpc85xx_serial_tstc(void)$/;"	f	typeref:typename:int	file:
mpc86xx CPU	arch/powerpc/cpu/mpc86xx/Kconfig	/^menu "mpc86xx CPU"$/;"	m
mpc86xx_reginfo	arch/powerpc/cpu/mpc86xx/cpu.c	/^void mpc86xx_reginfo(void)$/;"	f	typeref:typename:void
mpc8xx CPU	arch/powerpc/cpu/mpc8xx/Kconfig	/^menu "mpc8xx CPU"$/;"	m
mpc8xx_ep	include/usb/mpc8xx_udc.h	/^struct mpc8xx_ep {$/;"	s
mpc8xx_parameter_ram	include/usb/mpc8xx_udc.h	/^typedef struct mpc8xx_parameter_ram{$/;"	s
mpc8xx_serial_initialize	arch/powerpc/cpu/mpc8xx/serial.c	/^void mpc8xx_serial_initialize(void)$/;"	f	typeref:typename:void
mpc8xx_udc_advance_rx	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_alloc	drivers/usb/gadget/mpc8xx_udc.c	/^static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment)$/;"	f	typeref:typename:u32	file:
mpc8xx_udc_assign_urb	drivers/usb/gadget/mpc8xx_udc.c	/^static int mpc8xx_udc_assign_urb (int ep, char direction)$/;"	f	typeref:typename:int	file:
mpc8xx_udc_cbd_attach	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_cbd_init	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_cbd_init (void)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_clear_rxbd	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_clock_init	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_clock_init (volatile immap_t * immr,$/;"	f	typeref:typename:void	file:
mpc8xx_udc_dump_request	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_dump_request (struct usb_device_request *request)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_endpoint_init	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_endpoint_init (void)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_ep0_rx	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_ep0_rx_setup	drivers/usb/gadget/mpc8xx_udc.c	/^static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp)$/;"	f	typeref:typename:int	file:
mpc8xx_udc_ep_tx	drivers/usb/gadget/mpc8xx_udc.c	/^static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi)$/;"	f	typeref:typename:int	file:
mpc8xx_udc_epn_rx	drivers/usb/gadget/mpc8xx_udc.c	/^static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp)$/;"	f	typeref:typename:int	file:
mpc8xx_udc_flush_rx_fifo	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_flush_rx_fifo ()$/;"	f	typeref:typename:void	file:
mpc8xx_udc_flush_tx_fifo	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_flush_tx_fifo (int epid)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_handle_txerr	drivers/usb/gadget/mpc8xx_udc.c	/^static short mpc8xx_udc_handle_txerr ()$/;"	f	typeref:typename:short	file:
mpc8xx_udc_init_tx	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,$/;"	f	typeref:typename:void	file:
mpc8xx_udc_set_nak	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_set_nak (unsigned int ep)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_stall	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_stall (unsigned int ep)$/;"	f	typeref:typename:void	file:
mpc8xx_udc_state	include/usb/mpc8xx_udc.h	/^typedef enum mpc8xx_udc_state{$/;"	g
mpc8xx_udc_state_t	include/usb/mpc8xx_udc.h	/^}mpc8xx_udc_state_t;$/;"	t	typeref:enum:mpc8xx_udc_state
mpc8xx_udc_state_transition_down	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,$/;"	f	typeref:typename:void	file:
mpc8xx_udc_state_transition_up	drivers/usb/gadget/mpc8xx_udc.c	/^static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,$/;"	f	typeref:typename:void	file:
mpc8xx_udc_tx_irq	drivers/usb/gadget/mpc8xx_udc.c	/^static int mpc8xx_udc_tx_irq (int ep)$/;"	f	typeref:typename:int	file:
mpc8xx_usb	include/usb/mpc8xx_udc.h	/^typedef struct mpc8xx_usb{$/;"	s
mpc92469ac_calc_parameters	board/gdsys/common/osd.c	/^static void mpc92469ac_calc_parameters(unsigned int fout,$/;"	f	typeref:typename:void	file:
mpc92469ac_set	board/gdsys/common/osd.c	/^static void mpc92469ac_set(unsigned screen, unsigned int fout)$/;"	f	typeref:typename:void	file:
mpc_apicaddr	arch/x86/include/asm/mpspec.h	/^	u32 mpc_apicaddr;$/;"	m	struct:mpc_config_ioapic	typeref:typename:u32
mpc_apicid	arch/x86/include/asm/mpspec.h	/^	u8 mpc_apicid;$/;"	m	struct:mpc_config_ioapic	typeref:typename:u8
mpc_apicid	arch/x86/include/asm/mpspec.h	/^	u8 mpc_apicid;$/;"	m	struct:mpc_config_processor	typeref:typename:u8
mpc_apicver	arch/x86/include/asm/mpspec.h	/^	u8 mpc_apicver;$/;"	m	struct:mpc_config_ioapic	typeref:typename:u8
mpc_apicver	arch/x86/include/asm/mpspec.h	/^	u8 mpc_apicver;$/;"	m	struct:mpc_config_processor	typeref:typename:u8
mpc_busid	arch/x86/include/asm/mpspec.h	/^	u8 mpc_busid;$/;"	m	struct:mpc_config_bus	typeref:typename:u8
mpc_bustype	arch/x86/include/asm/mpspec.h	/^	u8 mpc_bustype[6];$/;"	m	struct:mpc_config_bus	typeref:typename:u8[6]
mpc_checksum	arch/x86/include/asm/mpspec.h	/^	u8 mpc_checksum;	\/* Checksum (makes sum 0) *\/$/;"	m	struct:mp_config_table	typeref:typename:u8
mpc_config_bus	arch/x86/include/asm/mpspec.h	/^struct mpc_config_bus {$/;"	s
mpc_config_intsrc	arch/x86/include/asm/mpspec.h	/^struct mpc_config_intsrc {$/;"	s
mpc_config_ioapic	arch/x86/include/asm/mpspec.h	/^struct mpc_config_ioapic {$/;"	s
mpc_config_lintsrc	arch/x86/include/asm/mpspec.h	/^struct mpc_config_lintsrc {$/;"	s
mpc_config_processor	arch/x86/include/asm/mpspec.h	/^struct mpc_config_processor {$/;"	s
mpc_cpufeature	arch/x86/include/asm/mpspec.h	/^	u32 mpc_cpufeature;$/;"	m	struct:mpc_config_processor	typeref:typename:u32
mpc_cpuflag	arch/x86/include/asm/mpspec.h	/^	u8 mpc_cpuflag;$/;"	m	struct:mpc_config_processor	typeref:typename:u8
mpc_cpusignature	arch/x86/include/asm/mpspec.h	/^	u32 mpc_cpusignature;$/;"	m	struct:mpc_config_processor	typeref:typename:u32
mpc_destapic	arch/x86/include/asm/mpspec.h	/^	u8 mpc_destapic;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u8
mpc_destlint	arch/x86/include/asm/mpspec.h	/^	u8 mpc_destlint;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u8
mpc_dstapic	arch/x86/include/asm/mpspec.h	/^	u8 mpc_dstapic;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u8
mpc_dstirq	arch/x86/include/asm/mpspec.h	/^	u8 mpc_dstirq;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u8
mpc_entry_count	arch/x86/include/asm/mpspec.h	/^	u16 mpc_entry_count;	\/* Number of entries in the table *\/$/;"	m	struct:mp_config_table	typeref:typename:u16
mpc_flags	arch/x86/include/asm/mpspec.h	/^	u8 mpc_flags;$/;"	m	struct:mpc_config_ioapic	typeref:typename:u8
mpc_get_fdr	arch/powerpc/cpu/mpc512x/i2c.c	/^static int mpc_get_fdr (int speed)$/;"	f	typeref:typename:int	file:
mpc_get_fdr	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int mpc_get_fdr(int speed)$/;"	f	typeref:typename:int	file:
mpc_irqflag	arch/x86/include/asm/mpspec.h	/^	u16 mpc_irqflag;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u16
mpc_irqflag	arch/x86/include/asm/mpspec.h	/^	u16 mpc_irqflag;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u16
mpc_irqtype	arch/x86/include/asm/mpspec.h	/^	u8 mpc_irqtype;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u8
mpc_irqtype	arch/x86/include/asm/mpspec.h	/^	u8 mpc_irqtype;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u8
mpc_lapic	arch/x86/include/asm/mpspec.h	/^	u32 mpc_lapic;		\/* Local APIC address *\/$/;"	m	struct:mp_config_table	typeref:typename:u32
mpc_length	arch/x86/include/asm/mpspec.h	/^	u16 mpc_length;		\/* Size of table *\/$/;"	m	struct:mp_config_table	typeref:typename:u16
mpc_oem	arch/x86/include/asm/mpspec.h	/^	char mpc_oem[8];	\/* OEM ID *\/$/;"	m	struct:mp_config_table	typeref:typename:char[8]
mpc_oemptr	arch/x86/include/asm/mpspec.h	/^	u32 mpc_oemptr;		\/* OEM table address *\/$/;"	m	struct:mp_config_table	typeref:typename:u32
mpc_oemsize	arch/x86/include/asm/mpspec.h	/^	u16 mpc_oemsize;	\/* OEM table size *\/$/;"	m	struct:mp_config_table	typeref:typename:u16
mpc_product	arch/x86/include/asm/mpspec.h	/^	char mpc_product[12];	\/* Product ID *\/$/;"	m	struct:mp_config_table	typeref:typename:char[12]
mpc_reg_in	arch/powerpc/cpu/mpc512x/i2c.c	/^static int mpc_reg_in (volatile u32 *reg)$/;"	f	typeref:typename:int	file:
mpc_reg_in	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int mpc_reg_in(volatile u32 *reg)$/;"	f	typeref:typename:int	file:
mpc_reg_out	arch/powerpc/cpu/mpc512x/i2c.c	/^static void mpc_reg_out (volatile u32 *reg, int val, int mask)$/;"	f	typeref:typename:void	file:
mpc_reg_out	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static void mpc_reg_out(volatile u32 *reg, int val, int mask)$/;"	f	typeref:typename:void	file:
mpc_reserved	arch/x86/include/asm/mpspec.h	/^	u32 mpc_reserved[2];$/;"	m	struct:mpc_config_processor	typeref:typename:u32[2]
mpc_signature	arch/x86/include/asm/mpspec.h	/^	char mpc_signature[4];	\/* "PCMP" *\/$/;"	m	struct:mp_config_table	typeref:typename:char[4]
mpc_spec	arch/x86/include/asm/mpspec.h	/^	u8 mpc_spec;		\/* Specification version *\/$/;"	m	struct:mp_config_table	typeref:typename:u8
mpc_srcbus	arch/x86/include/asm/mpspec.h	/^	u8 mpc_srcbus;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u8
mpc_srcbusid	arch/x86/include/asm/mpspec.h	/^	u8 mpc_srcbusid;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u8
mpc_srcbusirq	arch/x86/include/asm/mpspec.h	/^	u8 mpc_srcbusirq;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u8
mpc_srcbusirq	arch/x86/include/asm/mpspec.h	/^	u8 mpc_srcbusirq;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u8
mpc_type	arch/x86/include/asm/mpspec.h	/^	u8 mpc_type;$/;"	m	struct:mpc_config_bus	typeref:typename:u8
mpc_type	arch/x86/include/asm/mpspec.h	/^	u8 mpc_type;$/;"	m	struct:mpc_config_intsrc	typeref:typename:u8
mpc_type	arch/x86/include/asm/mpspec.h	/^	u8 mpc_type;$/;"	m	struct:mpc_config_ioapic	typeref:typename:u8
mpc_type	arch/x86/include/asm/mpspec.h	/^	u8 mpc_type;$/;"	m	struct:mpc_config_lintsrc	typeref:typename:u8
mpc_type	arch/x86/include/asm/mpspec.h	/^	u8 mpc_type;$/;"	m	struct:mpc_config_processor	typeref:typename:u8
mpcore_mccif_fifoctrl	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 mpcore_mccif_fifoctrl;	\/* _MPCORE_MCCIF_FIFOCTRL_0,	12ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
mpcore_mccif_fifoctrl	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 mpcore_mccif_fifoctrl;	\/* _MPCORE_MCCIF_FIFOCTRL_0,	12ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
mpcorelp_mccif_fifoctrl	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 mpcorelp_mccif_fifoctrl;	\/* _MPCORELP_MCCIF_FIFOCTRL_0,	128h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
mpcorelp_mccif_fifoctrl	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 mpcorelp_mccif_fifoctrl;	\/* _MPCORELP_MCCIF_FIFOCTRL_0,	128h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
mpctl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpctl;	\/* Core PLL Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
mpctl	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 mpctl;$/;"	m	struct:clock_control_regs	typeref:typename:u32
mpctl	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpctl;	\/* Core PLL Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
mpctl0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 mpctl0;	\/* MCU PLL Control Register 0 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
mpctl1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 mpctl1;	\/* MCU PLL Control Register 1 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
mpdccr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdccr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdccr	include/fsl_mmdc.h	/^	u32 mpdccr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpddr_clk	arch/arm/dts/sama5d2.dtsi	/^					mpddr_clk: mpddr_clk@13 {$/;"	l
mpdgctrl0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdgctrl0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdgctrl0	include/fsl_mmdc.h	/^	u32 mpdgctrl0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpdgctrl1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdgctrl1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdgctrl1	include/fsl_mmdc.h	/^	u32 mpdgctrl1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpdgdlst0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdgdlst0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdgdlst0	include/fsl_mmdc.h	/^	u32 mpdgdlst0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpdghwst0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdghwst0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdghwst0	include/fsl_mmdc.h	/^	u32 mpdghwst0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpdghwst1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdghwst1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdghwst1	include/fsl_mmdc.h	/^	u32 mpdghwst1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpdghwst2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdghwst2;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdghwst2	include/fsl_mmdc.h	/^	u32 mpdghwst2;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpdghwst3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpdghwst3;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpdghwst3	include/fsl_mmdc.h	/^	u32 mpdghwst3;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpe_addr_base_high	arch/x86/include/asm/mpspec.h	/^	u32 mpe_addr_base_high;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u32
mpe_addr_base_low	arch/x86/include/asm/mpspec.h	/^	u32 mpe_addr_base_low;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u32
mpe_addr_length_high	arch/x86/include/asm/mpspec.h	/^	u32 mpe_addr_length_high;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u32
mpe_addr_length_low	arch/x86/include/asm/mpspec.h	/^	u32 mpe_addr_length_low;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u32
mpe_addr_modifier	arch/x86/include/asm/mpspec.h	/^	u8 mpe_addr_modifier;$/;"	m	struct:mp_ext_compat_address_space	typeref:typename:u8
mpe_addr_type	arch/x86/include/asm/mpspec.h	/^	u8 mpe_addr_type;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u8
mpe_bus_info	arch/x86/include/asm/mpspec.h	/^	u8 mpe_bus_info;$/;"	m	struct:mp_ext_bus_hierarchy	typeref:typename:u8
mpe_busid	arch/x86/include/asm/mpspec.h	/^	u8 mpe_busid;$/;"	m	struct:mp_ext_bus_hierarchy	typeref:typename:u8
mpe_busid	arch/x86/include/asm/mpspec.h	/^	u8 mpe_busid;$/;"	m	struct:mp_ext_compat_address_space	typeref:typename:u8
mpe_busid	arch/x86/include/asm/mpspec.h	/^	u8 mpe_busid;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u8
mpe_checksum	arch/x86/include/asm/mpspec.h	/^	u8 mpe_checksum;	\/* Extended table checksum *\/$/;"	m	struct:mp_config_table	typeref:typename:u8
mpe_length	arch/x86/include/asm/mpspec.h	/^	u16 mpe_length;		\/* Extended table size *\/$/;"	m	struct:mp_config_table	typeref:typename:u16
mpe_length	arch/x86/include/asm/mpspec.h	/^	u8 mpe_length;$/;"	m	struct:mp_ext_bus_hierarchy	typeref:typename:u8
mpe_length	arch/x86/include/asm/mpspec.h	/^	u8 mpe_length;$/;"	m	struct:mp_ext_compat_address_space	typeref:typename:u8
mpe_length	arch/x86/include/asm/mpspec.h	/^	u8 mpe_length;$/;"	m	struct:mp_ext_config	typeref:typename:u8
mpe_length	arch/x86/include/asm/mpspec.h	/^	u8 mpe_length;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u8
mpe_parent_busid	arch/x86/include/asm/mpspec.h	/^	u8 mpe_parent_busid;$/;"	m	struct:mp_ext_bus_hierarchy	typeref:typename:u8
mpe_range_list	arch/x86/include/asm/mpspec.h	/^	u32 mpe_range_list;$/;"	m	struct:mp_ext_compat_address_space	typeref:typename:u32
mpe_type	arch/x86/include/asm/mpspec.h	/^	u8 mpe_type;$/;"	m	struct:mp_ext_bus_hierarchy	typeref:typename:u8
mpe_type	arch/x86/include/asm/mpspec.h	/^	u8 mpe_type;$/;"	m	struct:mp_ext_compat_address_space	typeref:typename:u8
mpe_type	arch/x86/include/asm/mpspec.h	/^	u8 mpe_type;$/;"	m	struct:mp_ext_config	typeref:typename:u8
mpe_type	arch/x86/include/asm/mpspec.h	/^	u8 mpe_type;$/;"	m	struct:mp_ext_system_address_space	typeref:typename:u8
mpf_checksum	arch/x86/include/asm/mpspec.h	/^	u8 mpf_checksum;	\/* Checksum (makes sum 0) *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_feature1	arch/x86/include/asm/mpspec.h	/^	u8 mpf_feature1;	\/* Predefined or Unique configuration? *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_feature2	arch/x86/include/asm/mpspec.h	/^	u8 mpf_feature2;	\/* Bit7 set for IMCR\/PIC *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_feature3	arch/x86/include/asm/mpspec.h	/^	u8 mpf_feature3;	\/* Unused (0) *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_feature4	arch/x86/include/asm/mpspec.h	/^	u8 mpf_feature4;	\/* Unused (0) *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_feature5	arch/x86/include/asm/mpspec.h	/^	u8 mpf_feature5;	\/* Unused (0) *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_length	arch/x86/include/asm/mpspec.h	/^	u8 mpf_length;		\/* Our length (paragraphs) *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpf_physptr	arch/x86/include/asm/mpspec.h	/^	u32 mpf_physptr;	\/* Configuration table address *\/$/;"	m	struct:mp_floating_table	typeref:typename:u32
mpf_signature	arch/x86/include/asm/mpspec.h	/^	char mpf_signature[4];	\/* "_MP_" *\/$/;"	m	struct:mp_floating_table	typeref:typename:char[4]
mpf_spec	arch/x86/include/asm/mpspec.h	/^	u8 mpf_spec;		\/* Specification version *\/$/;"	m	struct:mp_floating_table	typeref:typename:u8
mpic	arch/arm/dts/armada-370-xp.dtsi	/^			mpic: interrupt-controller@20a00 {$/;"	l
mpic	arch/arm/dts/armada-375.dtsi	/^			mpic: interrupt-controller@20a00 {$/;"	l
mpic	arch/arm/dts/armada-38x.dtsi	/^			mpic: interrupt-controller@20a00 {$/;"	l
mpid	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 mpid;		\/* offset 0x3c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
mpid	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 mpid;		\/* offset 0x3c *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
mpixelclock	drivers/video/rockchip/rk_hdmi.c	/^	u64 mpixelclock;$/;"	m	struct:hdmi_mpll_config	typeref:typename:u64	file:
mpixelclock	drivers/video/rockchip/rk_hdmi.c	/^	u64 mpixelclock;$/;"	m	struct:hdmi_phy_config	typeref:typename:u64	file:
mpl	arch/mips/include/asm/ptrace.h	/^	unsigned long long mpl[6];        \/* MTM{0-5} *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long long[6]
mpl_prg	board/mpl/common/common_util.c	/^mpl_prg(uchar *src, ulong size)$/;"	f	typeref:typename:int	file:
mpl_prg_image	board/mpl/common/common_util.c	/^mpl_prg_image(uchar *ld_addr)$/;"	f	typeref:typename:int	file:
mpll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	mpll_con;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
mpll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	mpll_con;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
mpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_lock;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_lock;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mpll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mpll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	mpll_lock;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
mpll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	mpll_lock;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
mpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned mpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
mpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned mpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
mpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned mpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
mpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
mpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mpllcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	mpllcon;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
mplluser_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mplluser_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mplluser_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mplluser_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mplluser_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mplluser_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mplluser_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mplluser_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mplluser_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mpmc_conf_vals	arch/arm/cpu/arm926ejs/spear/spr600_mt47h128m8_3_266_cl5_async.c	/^const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {$/;"	v	typeref:typename:const u32[]
mpmc_conf_vals	arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_333_cl5_psync.c	/^const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {$/;"	v	typeref:typename:const u32[]
mpmc_conf_vals	arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_37e_166_cl4_sync.c	/^const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {$/;"	v	typeref:typename:const u32[]
mpmc_conf_vals	arch/arm/cpu/arm926ejs/spear/spr600_mt47h64m16_3_333_cl5_psync.c	/^const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {$/;"	v	typeref:typename:const u32[]
mpmc_init	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void mpmc_init(void)$/;"	f	typeref:typename:void	file:
mpmc_init_values	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void mpmc_init_values(void)$/;"	f	typeref:typename:void	file:
mpmode	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mpmode;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mpmur0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpmur0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpmur0	include/fsl_mmdc.h	/^	u32 mpmur0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpodtctrl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpodtctrl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpodtctrl	include/fsl_mmdc.h	/^	u32 mpodtctrl;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mpodtctrl	include/fsl_mmdc.h	/^	u32 mpodtctrl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpop	lib/bzip2/bzlib_blocksort.c	/^#define mpop(/;"	d	file:
mpp2_mdio_read	drivers/net/mvpp2.c	/^static int mpp2_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
mpp2_mdio_write	drivers/net/mvpp2.c	/^static int mpp2_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
mpp_gp_config	drivers/video/ati_radeon_fb.h	/^	u32		mpp_gp_config;$/;"	m	struct:radeon_regs	typeref:typename:u32
mpp_tb_config	drivers/video/ati_radeon_fb.h	/^	u32		mpp_tb_config;$/;"	m	struct:radeon_regs	typeref:typename:u32
mppdcmpr1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mppdcmpr1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mppdcmpr1	include/fsl_mmdc.h	/^	u32 mppdcmpr1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mppdcmpr2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mppdcmpr2;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mppdcmpr2	include/fsl_mmdc.h	/^	u32 mppdcmpr2;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32		mpr;		\/* 0x0C MC Master Priority Register *\/$/;"	m	struct:at91_mc	typeref:typename:u32
mpr	arch/m68k/include/asm/immap_520x.h	/^	u32 mpr;		\/* 0x00 Master Privilege *\/$/;"	m	struct:scm1	typeref:typename:u32
mpr	arch/m68k/include/asm/immap_5227x.h	/^	u32 mpr;		\/* 0x00 Master Privilege *\/$/;"	m	struct:scm1	typeref:typename:u32
mpr	arch/m68k/include/asm/immap_5235.h	/^	u8 mpr;			\/* 0x20 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
mpr	arch/m68k/include/asm/immap_5275.h	/^	u8 mpr;$/;"	m	struct:sys_ctrl	typeref:typename:u8
mpr	arch/m68k/include/asm/immap_5301x.h	/^	u32 mpr;		\/* 0x00 Master Privilege *\/$/;"	m	struct:scm1	typeref:typename:u32
mpr	arch/m68k/include/asm/immap_5445x.h	/^	u32 mpr;		\/* 0x00 Master Privilege Register *\/$/;"	m	struct:scm1	typeref:typename:u32
mpr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr0;$/;"	m	struct:max_regs	typeref:typename:u32
mpr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr0;$/;"	m	struct:max_regs	typeref:typename:u32
mpr0	arch/m68k/include/asm/immap_5329.h	/^	u32 mpr0;		\/* 0x00 Master Privilege Register 0 *\/$/;"	m	struct:scm1_ctrl	typeref:typename:u32
mpr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr1;$/;"	m	struct:max_regs	typeref:typename:u32
mpr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr1;$/;"	m	struct:max_regs	typeref:typename:u32
mpr1	arch/m68k/include/asm/immap_5329.h	/^	u32 mpr1;		\/* 0x00 Master Privilege Register *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
mpr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr2;$/;"	m	struct:max_regs	typeref:typename:u32
mpr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr2;$/;"	m	struct:max_regs	typeref:typename:u32
mpr3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr3;$/;"	m	struct:max_regs	typeref:typename:u32
mpr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr3;$/;"	m	struct:max_regs	typeref:typename:u32
mpr4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr4;$/;"	m	struct:max_regs	typeref:typename:u32
mpr4	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr4;$/;"	m	struct:max_regs	typeref:typename:u32
mpr_0_7	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr_0_7;$/;"	m	struct:aips_regs	typeref:typename:u32
mpr_0_7	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr_0_7;$/;"	m	struct:aips_regs	typeref:typename:u32
mpr_8_15	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 mpr_8_15;$/;"	m	struct:aips_regs	typeref:typename:u32
mpr_8_15	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 mpr_8_15;$/;"	m	struct:aips_regs	typeref:typename:u32
mprc	drivers/net/e1000.h	/^	uint64_t mprc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mprddlctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddlctl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddlctl	include/fsl_mmdc.h	/^	u32 mprddlctl;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mprddlctl	include/fsl_mmdc.h	/^	u32 mprddlctl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddlhwctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddlhwctl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddlhwctl	include/fsl_mmdc.h	/^	u32 mprddlhwctl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddlhwst0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddlhwst0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddlhwst0	include/fsl_mmdc.h	/^	u32 mprddlhwst0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddlhwst1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddlhwst1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddlhwst1	include/fsl_mmdc.h	/^	u32 mprddlhwst1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddlst	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddlst;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddlst	include/fsl_mmdc.h	/^	u32 mprddlst;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddqby0dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddqby0dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddqby0dl	include/fsl_mmdc.h	/^	u32 mprddqby0dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddqby1dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddqby1dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddqby1dl	include/fsl_mmdc.h	/^	u32 mprddqby1dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddqby2dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddqby2dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddqby2dl	include/fsl_mmdc.h	/^	u32 mprddqby2dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprddqby3dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mprddqby3dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mprddqby3dl	include/fsl_mmdc.h	/^	u32 mprddqby3dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mprot0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mprot0;$/;"	m	struct:aipstz_regs	typeref:typename:u32
mprot0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	mprot0;$/;"	m	struct:aipstz_regs	typeref:typename:u32
mprot1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	mprot1;$/;"	m	struct:aipstz_regs	typeref:typename:u32
mprot1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	mprot1;$/;"	m	struct:aipstz_regs	typeref:typename:u32
mps	drivers/usb/host/isp116x.h	/^	u16 mps;$/;"	m	struct:ptd	typeref:typename:u16
mpsdctrl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpsdctrl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpsdctrl	include/fsl_mmdc.h	/^	u32 mpsdctrl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpsrc	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mpsrc; \/* 0x00 *\/$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
mpswdar0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdar0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdar0	include/fsl_mmdc.h	/^	u32 mpswdar0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr0	include/fsl_mmdc.h	/^	u32 mpswdrdr0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr1	include/fsl_mmdc.h	/^	u32 mpswdrdr1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr2;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr2	include/fsl_mmdc.h	/^	u32 mpswdrdr2;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr3;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr3	include/fsl_mmdc.h	/^	u32 mpswdrdr3;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr4;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr4	include/fsl_mmdc.h	/^	u32 mpswdrdr4;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr5;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr5	include/fsl_mmdc.h	/^	u32 mpswdrdr5;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr6	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr6;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr6	include/fsl_mmdc.h	/^	u32 mpswdrdr6;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpswdrdr7	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpswdrdr7;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpswdrdr7	include/fsl_mmdc.h	/^	u32 mpswdrdr7;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mptable_add_intsrc	arch/x86/lib/mpspec.c	/^static int mptable_add_intsrc(struct mp_config_table *mc,$/;"	f	typeref:typename:int	file:
mptable_add_isa_interrupts	arch/x86/lib/mpspec.c	/^static void mptable_add_isa_interrupts(struct mp_config_table *mc, int bus_isa,$/;"	f	typeref:typename:void	file:
mptable_add_lintsrc	arch/x86/lib/mpspec.c	/^static void mptable_add_lintsrc(struct mp_config_table *mc, int bus_isa)$/;"	f	typeref:typename:void	file:
mptable_finalize	arch/x86/lib/mpspec.c	/^u32 mptable_finalize(struct mp_config_table *mc)$/;"	f	typeref:typename:u32
mptc	drivers/net/e1000.h	/^	uint64_t mptc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
mpu	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *mpu;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
mpu	arch/arm/include/asm/omap_common.h	/^	struct volts mpu;$/;"	m	struct:vcores_data	typeref:struct:volts
mpu_36x_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^mpu_36x_dpll_param:$/;"	l
mpu_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	mpu_dclk_div: mpu_dclk_div {$/;"	l
mpu_dpll_hs_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div {$/;"	l
mpu_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^mpu_dpll_param:$/;"	l
mpu_dpll_params_1200mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params mpu_dpll_params_1200mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_1400mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_1600mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params mpu_dpll_params_1600mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_1_5ghz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params mpu_dpll_params_1_5ghz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_1ghz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_400mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params mpu_dpll_params_400mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_499mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params mpu_dpll_params_499mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_dpll_params_800mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
mpu_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	mpu_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
mpu_init_34xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void mpu_init_34xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
mpu_init_36xx	arch/arm/cpu/armv7/omap3/clock.c	/^static void mpu_init_36xx(u32 sil_index, u32 clk_index)$/;"	f	typeref:typename:void	file:
mpu_l2_ram_clk	arch/arm/dts/socfpga.dtsi	/^					mpu_l2_ram_clk: mpu_l2_ram_clk {$/;"	l
mpu_mod_reset	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	mpu_mod_reset;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
mpu_periph_clk	arch/arm/dts/socfpga.dtsi	/^					mpu_periph_clk: mpu_periph_clk {$/;"	l
mpu_pll_config	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static void mpu_pll_config(void)$/;"	f	typeref:typename:void	file:
mpu_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	mpu_read_qos;			\/* 0x43100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
mpu_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	mpu_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
mpuclk	arch/arm/dts/socfpga.dtsi	/^						mpuclk: mpuclk {$/;"	l	label:main_pll
mpuclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	mpuclk;$/;"	m	struct:socfpga_clock_manager_altera	typeref:typename:u32
mpuclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	mpuclk;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
mpuclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t mpuclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
mpuclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mpuclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mpuclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int mpuclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
mpush	lib/bzip2/bzlib_blocksort.c	/^#define mpush(/;"	d	file:
mpwldectrl0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwldectrl0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwldectrl0	include/fsl_mmdc.h	/^	u32 mpwldectrl0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwldectrl1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwldectrl1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwldectrl1	include/fsl_mmdc.h	/^	u32 mpwldectrl1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwldlst	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwldlst;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwldlst	include/fsl_mmdc.h	/^	u32 mpwldlst;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwlgcr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwlgcr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwlgcr	include/fsl_mmdc.h	/^	u32 mpwlgcr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwlhwerr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwlhwerr;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwlhwerr	include/fsl_mmdc.h	/^	u32 mpwlhwerr;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrcadl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrcadl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrcadl	include/fsl_mmdc.h	/^	u32 mpwrcadl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdlctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdlctl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdlctl	include/fsl_mmdc.h	/^	u32 mpwrdlctl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdlhwctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdlhwctl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdlhwctl	include/fsl_mmdc.h	/^	u32 mpwrdlhwctl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdlhwst0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdlhwst0;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdlhwst0	include/fsl_mmdc.h	/^	u32 mpwrdlhwst0;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdlhwst1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdlhwst1;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdlhwst1	include/fsl_mmdc.h	/^	u32 mpwrdlhwst1;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdlst	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdlst;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdlst	include/fsl_mmdc.h	/^	u32 mpwrdlst;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdqby0dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdqby0dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdqby0dl	include/fsl_mmdc.h	/^	u32 mpwrdqby0dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdqby1dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdqby1dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdqby1dl	include/fsl_mmdc.h	/^	u32 mpwrdqby1dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdqby2dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdqby2dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdqby2dl	include/fsl_mmdc.h	/^	u32 mpwrdqby2dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpwrdqby3dl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpwrdqby3dl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpwrdqby3dl	include/fsl_mmdc.h	/^	u32 mpwrdqby3dl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpzqhwctrl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpzqhwctrl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpzqhwctrl	include/fsl_mmdc.h	/^	u32 mpzqhwctrl;$/;"	m	struct:fsl_mmdc_info	typeref:typename:u32
mpzqhwctrl	include/fsl_mmdc.h	/^	u32 mpzqhwctrl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpzqlp2ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpzqlp2ctl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpzqlp2ctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpzqlp2ctl;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
mpzqlp2ctl	include/fsl_mmdc.h	/^	u32 mpzqlp2ctl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mpzqswctrl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 mpzqswctrl;$/;"	m	struct:mmdc_p_regs	typeref:typename:u32
mpzqswctrl	include/fsl_mmdc.h	/^	u32 mpzqswctrl;$/;"	m	struct:mmdc_regs	typeref:typename:u32
mq	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG mq;		\/* 601 only (not used at present) *\/$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
mqs	arch/arm/dts/imx6ull.dtsi	/^			mqs: mqs {$/;"	l
mr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 mr[4];		\/* Match Registers		*\/$/;"	m	struct:timer_regs	typeref:typename:u32[4]
mr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 mr;			\/* 0x84 || 0xB4 *\/$/;"	m	struct:sdrc_cs	typeref:typename:u32
mr	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 mr;$/;"	m	struct:board_sdrc_timings	typeref:typename:u32
mr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mr[4];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[4]
mr	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 mr[4];$/;"	m	struct:rk3288_sdram_phy_timing	typeref:typename:u32[4]
mr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mr[4];$/;"	m	struct:rk3036_phy_timing	typeref:typename:u32[4]
mr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 mr;			\/* 0x1f0 mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
mr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 mr[4];		\/* 0x30 mode registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
mr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 mr;			\/* 0x1f0 mode register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
mr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 mr[4];		\/* 0x30 mode registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
mr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	mr;	\/* Mode Register  RW *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	mr; 	\/* 0x00 SDRAMC Mode Register *\/$/;"	m	struct:at91_bfc	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	mr; 	\/* 0x00 SDRAMC Mode Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_pit.h	/^	u32	mr;	\/* 0x00 Mode Register *\/$/;"	m	struct:at91_pit	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_rstc.h	/^	u32	mr;	\/* Reset Controller Mode Register *\/$/;"	m	struct:at91_rstc	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_rtt.h	/^	u32	mr;	\/* Mode Register   RW 0x00008000 *\/$/;"	m	struct:at91_rtt	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		mr;		\/* 0x04 Mode Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91_wdt.h	/^	u32	mr;$/;"	m	struct:at91_wdt	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	mr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 mr;			\/* 0x00: Mode Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
mr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 mr;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
mr	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 mr;			\/* 0x00 MDHA Mode *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
mr	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 mr;			\/* 0x00 Mode *\/$/;"	m	struct:qspi_ctrl	typeref:typename:u16
mr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 mr;			\/* 0x00 Mode *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
mr	arch/m68k/include/asm/immap_520x.h	/^	u16 mr;			\/* 0x02 Modulus *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
mr	arch/m68k/include/asm/immap_5235.h	/^	u16 mr;			\/* 0x02 Modulus register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
mr	arch/m68k/include/asm/immap_5329.h	/^	u16 mr;			\/* 0x02 Modulus register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
mr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	mr;		\/* DMA mode register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
mr	drivers/serial/atmel_usart.h	/^	u32	mr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
mr	drivers/spi/atmel_spi.h	/^	u32		mr;$/;"	m	struct:atmel_spi_slave	typeref:typename:u32
mr	examples/api/glue.c	/^static struct mem_region mr[UB_MAX_MR];$/;"	v	typeref:struct:mem_region[]	file:
mr	include/api_public.h	/^	struct mem_region	*mr;$/;"	m	struct:sys_info	typeref:struct:mem_region *
mr	include/atmel_mci.h	/^	u32	mr;	\/* 0x04 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
mr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	mr;		\/* Mode Register *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
mr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mr0;		\/* 0x40 mode register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr0;		\/* 0x54 mode register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr0;$/;"	m	struct:dram_para	typeref:typename:u32
mr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mr0;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mr0;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mr0;		\/* 0x9c mode register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mr0;		\/* 0x40 mode register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr0;		\/* 0x54 mode register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr0;$/;"	m	struct:dram_para	typeref:typename:u32
mr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mr0;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mr0;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr0	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mr0;		\/* 0x9c mode register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr0	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int mr0;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
mr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mr1;		\/* 0x44 mode register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr1;		\/* 0x58 mode register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr1;$/;"	m	struct:dram_para	typeref:typename:u32
mr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mr1;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mr1;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mr1;		\/* 0xa0 mode register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mr1;		\/* 0x44 mode register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr1;		\/* 0x58 mode register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr1;$/;"	m	struct:dram_para	typeref:typename:u32
mr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mr1;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mr1;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mr1;		\/* 0xa0 mode register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr1	arch/arm/include/asm/emif.h	/^	s8 mr1;$/;"	m	struct:lpddr2_mr_regs	typeref:typename:s8
mr1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int mr1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
mr10	arch/arm/include/asm/emif.h	/^	s8 mr10;$/;"	m	struct:lpddr2_mr_regs	typeref:typename:s8
mr16	arch/arm/include/asm/emif.h	/^	s8 mr16;$/;"	m	struct:lpddr2_mr_regs	typeref:typename:s8
mr2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mr2;		\/* 0x48 mode register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr2;		\/* 0x5c mode register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr2;$/;"	m	struct:dram_para	typeref:typename:u32
mr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mr2;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mr2;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mr2;		\/* 0xa4 mode register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mr2;		\/* 0x48 mode register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr2;		\/* 0x5c mode register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr2;$/;"	m	struct:dram_para	typeref:typename:u32
mr2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mr2;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mr2;		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr2	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mr2;		\/* 0xa4 mode register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr2	arch/arm/include/asm/emif.h	/^	s8 mr2;$/;"	m	struct:lpddr2_mr_regs	typeref:typename:s8
mr2	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int mr2;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
mr3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mr3;		\/* 0x4c mode register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr3;		\/* 0x60 mode register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mr3;$/;"	m	struct:dram_para	typeref:typename:u32
mr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mr3;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mr3;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mr3;		\/* 0xa8 mode register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mr3;		\/* 0x4c mode register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr3;		\/* 0x60 mode register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mr3;$/;"	m	struct:dram_para	typeref:typename:u32
mr3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mr3;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mr3;		\/* 0x3c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mr3	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mr3;		\/* 0xa8 mode register 3 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
mr3	arch/arm/include/asm/emif.h	/^	s8 mr3;$/;"	m	struct:lpddr2_mr_regs	typeref:typename:s8
mr_no	include/api_public.h	/^	int			mr_no;	\/* number of memory regions *\/$/;"	m	struct:sys_info	typeref:typename:int
mr_regs	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^const struct lpddr2_mr_regs mr_regs = {$/;"	v	typeref:typename:const struct lpddr2_mr_regs
mr_regs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct lpddr2_mr_regs mr_regs = {$/;"	v	typeref:typename:const struct lpddr2_mr_regs
mram_offset	include/linux/usb/xhci-omap.h	/^	u32 mram_offset; \/* offset of 0x100 *\/$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
mrblr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mrblr;		\/* Maximum RX Buffer Len *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
mrblr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	mrblr;		\/* 0x24340 - Maximum Receive Buffer Length Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
mrblr	drivers/net/fm/fm.h	/^	u16 mrblr;	\/* max Rx buffer length *\/$/;"	m	struct:fm_port_global_pram	typeref:typename:u16
mrblr	drivers/qe/uec.h	/^	u16  mrblr;               \/* max receive buffer length reg. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
mrblr	include/commproc.h	/^	ushort	mrblr;		\/* Rx buffer length *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
mrblr	include/tsec.h	/^	u32	mrblr;		\/* Maximum Receive Buffer Length *\/$/;"	m	struct:tsec	typeref:typename:u32
mrblr	include/usb/mpc8xx_udc.h	/^	ushort mrblr;	\/* Maximum Receive Buffer Length *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
mrblr	post/cpu/mpc8xx/usb.c	/^	ushort mrblr;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
mrblr2r3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mrblr2r3;	\/* Maximum RX Buffer Len R2R3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
mrc	arch/arm/include/asm/arch-mx6/imx-regs.h	/^		u32 mrc;	\/* Memory Region Control *\/$/;"	m	struct:rdc_regs::__anon75a4c95b0108	typeref:typename:u32
mrc	arch/arm/include/asm/arch-mx7/imx-regs.h	/^		u32 mrc;		\/* Memory Region Control *\/$/;"	m	struct:rdc_regs::__anona69826bc0108	typeref:typename:u32
mrc_add_memory_area	arch/x86/cpu/intel_common/mrc.c	/^int mrc_add_memory_area(struct memory_info *info, uint64_t start,$/;"	f	typeref:typename:int
mrc_adjust_params	arch/x86/cpu/quark/mrc.c	/^static void mrc_adjust_params(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void	file:
mrc_alt_write_mask	arch/x86/cpu/quark/mrc_util.c	/^void mrc_alt_write_mask(u32 unit, u32 addr, u32 data, u32 mask)$/;"	f	typeref:typename:void
mrc_auxr	arch/arm/mach-exynos/include/mach/system.h	/^#define mrc_auxr(/;"	d
mrc_common_board_get_usable_ram_top	arch/x86/cpu/intel_common/mrc.c	/^ulong mrc_common_board_get_usable_ram_top(ulong total_size)$/;"	f	typeref:typename:ulong
mrc_common_dram_init_banksize	arch/x86/cpu/intel_common/mrc.c	/^void mrc_common_dram_init_banksize(void)$/;"	f	typeref:typename:void
mrc_common_init	arch/x86/cpu/intel_common/mrc.c	/^int mrc_common_init(struct udevice *dev, void *pei_data, bool use_asm_linkage)$/;"	f	typeref:typename:int
mrc_configure_params	arch/x86/cpu/quark/dram.c	/^static int mrc_configure_params(struct mrc_params *mrc_params)$/;"	f	typeref:typename:int	file:
mrc_data_container	arch/x86/include/asm/mrccache.h	/^struct __packed mrc_data_container {$/;"	s
mrc_debug_msg	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t mrc_debug_msg;			\/* Offset 0x004b *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
mrc_init	arch/x86/cpu/quark/mrc.c	/^void mrc_init(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
mrc_init_mmio_size	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint16_t mrc_init_mmio_size;		\/* Offset 0x0022 *\/$/;"	m	struct:upd_region	typeref:typename:uint16_t
mrc_init_spd_addr1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t mrc_init_spd_addr1;		\/* Offset 0x0024 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
mrc_init_spd_addr2	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t mrc_init_spd_addr2;		\/* Offset 0x0025 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
mrc_init_tseg_size	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint16_t mrc_init_tseg_size;		\/* Offset 0x0020 *\/$/;"	m	struct:upd_region	typeref:typename:uint16_t
mrc_input	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	unsigned char *mrc_input;$/;"	m	struct:pei_data	typeref:typename:unsigned char *
mrc_input_len	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	unsigned int mrc_input_len;$/;"	m	struct:pei_data	typeref:typename:unsigned int
mrc_l2_aux_ctlr	arch/arm/mach-exynos/include/mach/system.h	/^#define mrc_l2_aux_ctlr(/;"	d
mrc_l2_ctlr	arch/arm/mach-exynos/include/mach/system.h	/^#define mrc_l2_ctlr(/;"	d
mrc_locate_spd	arch/x86/cpu/intel_common/mrc.c	/^int mrc_locate_spd(struct udevice *dev, int size, const void **spd_datap)$/;"	f	typeref:typename:int
mrc_mem_init	arch/x86/cpu/quark/mrc.c	/^static void mrc_mem_init(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void	file:
mrc_midr	arch/arm/mach-exynos/include/mach/system.h	/^#define mrc_midr(/;"	d
mrc_mpafr	arch/arm/mach-exynos/include/mach/system.h	/^#define mrc_mpafr(/;"	d
mrc_output	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	unsigned char *mrc_output;$/;"	m	struct:pei_data	typeref:typename:unsigned char *
mrc_output	arch/x86/include/asm/global_data.h	/^	char *mrc_output;$/;"	m	struct:arch_global_data	typeref:typename:char *
mrc_output_len	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	unsigned int mrc_output_len;$/;"	m	struct:pei_data	typeref:typename:unsigned int
mrc_output_len	arch/x86/include/asm/global_data.h	/^	unsigned int mrc_output_len;$/;"	m	struct:arch_global_data	typeref:typename:unsigned int
mrc_params	arch/x86/include/asm/arch-quark/mrc.h	/^struct mrc_params {$/;"	s
mrc_post_code	arch/x86/cpu/quark/mrc_util.c	/^void mrc_post_code(uint8_t major, uint8_t minor)$/;"	f	typeref:typename:void
mrc_region	arch/x86/include/asm/mrccache.h	/^struct mrc_region {$/;"	s
mrc_sctlr	arch/arm/mach-exynos/include/mach/system.h	/^#define mrc_sctlr(/;"	d
mrc_timings	arch/x86/include/asm/arch-quark/mrc.h	/^struct mrc_timings {$/;"	s
mrc_write_mask	arch/x86/cpu/quark/mrc_util.c	/^void mrc_write_mask(u32 unit, u32 addr, u32 data, u32 mask)$/;"	f	typeref:typename:void
mrccache_find_current	arch/x86/lib/mrccache.c	/^struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)$/;"	f	typeref:struct:mrc_data_container *
mrccache_get_region	arch/x86/lib/mrccache.c	/^int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)$/;"	f	typeref:typename:int
mrccache_reserve	arch/x86/lib/mrccache.c	/^int mrccache_reserve(void)$/;"	f	typeref:typename:int
mrccache_save	arch/x86/lib/mrccache.c	/^int mrccache_save(void)$/;"	f	typeref:typename:int
mrccache_update	arch/x86/lib/mrccache.c	/^int mrccache_update(struct udevice *sf, struct mrc_region *entry,$/;"	f	typeref:typename:int
mrcr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		mrcr;		\/* 0x100 Master Remap Control *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mrcr	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^	u32	mrcr;		\/* Master Remap Control Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mrcr	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^	u32	mrcr;		\/* Master Remap Control Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mrcr	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	mrcr;           \/* 0x100 Master Remap Control *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mrcr	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^	u32	mrcr;		\/* Master Remap Control Register *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mrcr	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	mrcr;           \/* 0x100 Master Remap Control *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
mrctrl	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 mrctrl;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mrctrl[2];		\/* 0x10 mode register read\/write control reg *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
mrctrl	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 mrctrl;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mrctrl[2];		\/* 0x10 mode register read\/write control reg *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
mrctrl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mrctrl0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 mrctrl0;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 mrctrl0;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mrctrl0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 mrctrl0;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 mrctrl0;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mrctrl1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrctrl1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mrctrl1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrdd	drivers/net/lpc32xx_eth.c	/^	u32 mrdd;		\/* MII management read data register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mrdd	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic mrdd; \/* 0x2c0 *\/$/;"	m	struct:pic32_mii_regs	typeref:struct:pic32_reg_atomic
mrea	arch/arm/include/asm/arch-mx6/imx-regs.h	/^		u32 mrea;	\/* Memory Region End Address *\/$/;"	m	struct:rdc_regs::__anon75a4c95b0108	typeref:typename:u32
mrea	arch/arm/include/asm/arch-mx7/imx-regs.h	/^		u32 mrea;		\/* Memory Region End Address *\/$/;"	m	struct:rdc_regs::__anona69826bc0108	typeref:typename:u32
mregs	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*mregs;$/;"	m	struct:musb	typeref:typename:void __iomem *
mremap_chunk	common/dlmalloc.c	/^static mchunkptr mremap_chunk(mchunkptr p, size_t new_size)$/;"	f	typeref:typename:mchunkptr	file:
mreqprio_0	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mreqprio_0;	\/* offset 0x70 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
mreqprio_1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int mreqprio_1;	\/* offset 0x74 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
mreqtxbacr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mreqtxbacr[3];	\/* Port Request Tx Buffer ACR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32[3]
mrev	include/ddr_spd.h	/^	uint8_t mrev;			\/* 349 Module Revision Code *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
mrev	include/ddr_spd.h	/^	unsigned char mrev[2];         \/* 146-147 Module Revision Code *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[2]
mrproper	Makefile	/^mrproper: clean $(mrproper-dirs)$/;"	t
mrproper	Makefile	/^mrproper: rm-dirs  := $(wildcard $(MRPROPER_DIRS))$/;"	t
mrproper	Makefile	/^mrproper: rm-files := $(wildcard $(MRPROPER_FILES))$/;"	t
mrproper-dirs	Makefile	/^mrproper-dirs      := $(addprefix _mrproper_,scripts)$/;"	m
mrq	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t mrq;$/;"	m	struct:mrq_query_abi_request	typeref:typename:uint32_t
mrq	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t mrq;$/;"	m	struct:mrq_request	typeref:typename:uint32_t
mrq_abi_ratchet_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_abi_ratchet_request {$/;"	s
mrq_abi_ratchet_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_abi_ratchet_response {$/;"	s
mrq_clk_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_clk_request {$/;"	s
mrq_clk_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_clk_response {$/;"	s
mrq_cpu_vhint_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_cpu_vhint_request {$/;"	s
mrq_debugfs_commands	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^enum mrq_debugfs_commands {$/;"	g
mrq_debugfs_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_debugfs_request {$/;"	s
mrq_debugfs_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_debugfs_response {$/;"	s
mrq_emc_dvfs_latency_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_emc_dvfs_latency_response {$/;"	s
mrq_i2c_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_i2c_request {$/;"	s
mrq_i2c_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_i2c_response {$/;"	s
mrq_module_load_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_module_load_request {$/;"	s
mrq_module_load_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_module_load_response {$/;"	s
mrq_module_mail_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_module_mail_request {$/;"	s
mrq_module_mail_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_module_mail_response {$/;"	s
mrq_module_unload_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_module_unload_request {$/;"	s
mrq_pg_read_state_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_pg_read_state_request {$/;"	s
mrq_pg_read_state_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_pg_read_state_response {$/;"	s
mrq_pg_update_state_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_pg_update_state_request {$/;"	s
mrq_ping_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_ping_request {$/;"	s
mrq_ping_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_ping_response {$/;"	s
mrq_query_abi_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_query_abi_request {$/;"	s
mrq_query_abi_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_query_abi_response {$/;"	s
mrq_query_tag_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_query_tag_request {$/;"	s
mrq_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_request {$/;"	s
mrq_reset_commands	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^enum mrq_reset_commands {$/;"	g
mrq_reset_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_reset_request {$/;"	s
mrq_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_response {$/;"	s
mrq_thermal_bpmp_to_host_cmd	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^enum mrq_thermal_bpmp_to_host_cmd {$/;"	g
mrq_thermal_bpmp_to_host_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_thermal_bpmp_to_host_request {$/;"	s
mrq_thermal_bpmp_to_host_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^union mrq_thermal_bpmp_to_host_response {$/;"	u
mrq_thermal_host_to_bpmp_cmd	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^enum mrq_thermal_host_to_bpmp_cmd {$/;"	g
mrq_thermal_host_to_bpmp_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_thermal_host_to_bpmp_request {$/;"	s
mrq_threaded_ping_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_threaded_ping_request {$/;"	s
mrq_threaded_ping_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_threaded_ping_response {$/;"	s
mrq_trace_iter_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_trace_iter_request {$/;"	s
mrq_trace_modify_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_trace_modify_request {$/;"	s
mrq_trace_modify_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_trace_modify_response {$/;"	s
mrq_write_trace_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_write_trace_request {$/;"	s
mrq_write_trace_response	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct mrq_write_trace_response {$/;"	s
mrr	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 mrr;		\/* 0xEC: EMC_MRR *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
mrrcfg0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mrrcfg0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mrrcfg0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mrrcfg0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mrrcfg0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mrrcfg0;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrrcfg0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mrrcfg0;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrrstat0	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mrrstat0;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mrrstat0	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mrrstat0;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mrrstat0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mrrstat0;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrrstat0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mrrstat0;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrrstat1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mrrstat1;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mrrstat1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mrrstat1;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mrrstat1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mrrstat1;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrrstat1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mrrstat1;		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrs	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 mrs;		\/* 0xCC: EMC_MRS *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
mrs0_dll_reset	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs0_dll_reset;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs0_dll_reset_mirr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs0_dll_reset_mirr;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs0_user	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs0_user;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs0_user_mirr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs0_user_mirr;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs1	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t mrs1;		\/* register content saved during training *\/$/;"	m	struct:mrc_params	typeref:typename:uint32_t
mrs1_mirr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs1_mirr;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs2;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs2_mirr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs2_mirr;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs3	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs3;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrs3_mirr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	mrs3_mirr;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
mrsa	arch/arm/include/asm/arch-mx6/imx-regs.h	/^		u32 mrsa;	\/* Memory Region Start Address *\/$/;"	m	struct:rdc_regs::__anon75a4c95b0108	typeref:typename:u32
mrsa	arch/arm/include/asm/arch-mx7/imx-regs.h	/^		u32 mrsa;		\/* Memory Region Start Address *\/$/;"	m	struct:rdc_regs::__anona69826bc0108	typeref:typename:u32
mrspfctxbacr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	mrspfctxbacr;	\/* Port Response\/Flow Control Tx Buffer ACR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
mrsrb6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	mrsrb6;$/;"	m	struct:s3c24x0_memctl	typeref:typename:u32
mrsrb7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	mrsrb7;$/;"	m	struct:s3c24x0_memctl	typeref:typename:u32
mrstatr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mrstatr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrstatr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mrstatr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mrstatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int mrstatus;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
mrstatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int mrstatus;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
mrstatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int mrstatus;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
mrtpr	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     mrtpr;          \/* LBC Memory Refresh Timer Prescaler *\/$/;"	m	struct:fsl_lbc	typeref:typename:u32
mrvl_header	drivers/net/mvgbe.h	/^	u32 mrvl_header;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
mrvs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^		u32 mrvs;	\/* Memory Region Violation Status *\/$/;"	m	struct:rdc_regs::__anon75a4c95b0108	typeref:typename:u32
mrvs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^		u32 mrvs;		\/* Memory Region Violation Status *\/$/;"	m	struct:rdc_regs::__anona69826bc0108	typeref:typename:u32
mrw	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 mrw;		\/* 0xE8: EMC_MRW *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
mrxaddr	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 mrxaddr;$/;"	m	struct:i2c_regs	typeref:typename:u32
mrxcnt	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 mrxcnt;$/;"	m	struct:i2c_regs	typeref:typename:u32
mrxraddr	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 mrxraddr;$/;"	m	struct:i2c_regs	typeref:typename:u32
ms	include/fsl_sec.h	/^		u32	ms;	\/* DECO LIODN Register, MS *\/$/;"	m	struct:ccsr_sec::__anonc0d8802d0608	typeref:typename:u32
ms	include/fsl_sec.h	/^		u32	ms;	\/* Job Ring LIODN Register, MS *\/$/;"	m	struct:ccsr_sec::__anonc0d8802d0408	typeref:typename:u32
ms	include/fsl_sec.h	/^		u32	ms;	\/* RTIC LIODN Register, MS *\/$/;"	m	struct:ccsr_sec::__anonc0d8802d0508	typeref:typename:u32
ms_clk	arch/arm/dts/sun4i-a10.dtsi	/^		ms_clk: clk@01c20084 {$/;"	l
ms_clk	arch/arm/dts/sun5i.dtsi	/^		ms_clk: clk@01c20084 {$/;"	l
ms_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ms_clk: clk@01c20084 {$/;"	l
ms_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 ms_ctrl;		\/* Memory Card Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
ms_sclk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ms_sclk_cfg;	\/* 0x84 memory stick sub clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ms_sclk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ms_sclk_cfg;	\/* 0x84 memory stick sub clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ms_to_ticks	drivers/watchdog/at91sam9_wdt.c	/^#define ms_to_ticks(/;"	d	file:
msata_en	board/gateworks/gw_ventana/common.h	/^	int msata_en;$/;"	m	struct:ventana	typeref:typename:int
msb	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^		u32 msb;$/;"	m	struct:rk3288_hdmi::__anonae42e8fa0108	typeref:typename:u32
msb_right	include/linux/fb.h	/^	__u32 msb_right;$/;"	m	struct:fb_bitfield	typeref:typename:__u32
msc01_config_access	drivers/pci/pci_msc01.c	/^static int msc01_config_access(struct msc01_pci_controller *msc01,$/;"	f	typeref:typename:int	file:
msc01_pci_controller	drivers/pci/pci_msc01.c	/^struct msc01_pci_controller {$/;"	s	file:
msc01_pci_init	drivers/pci/pci_msc01.c	/^void msc01_pci_init(void *base, unsigned long sys_bus, unsigned long sys_phys,$/;"	f	typeref:typename:void
msc01_read_config_dword	drivers/pci/pci_msc01.c	/^static int msc01_read_config_dword(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int	file:
msc01_write_config_dword	drivers/pci/pci_msc01.c	/^static int msc01_write_config_dword(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int	file:
msc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	msc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
msc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	msc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
msc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	msc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
msc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	msc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mscan	arch/powerpc/include/asm/immap_512x.h	/^	mscan512x_t		mscan;		\/* MSCAN *\/$/;"	m	struct:immap	typeref:typename:mscan512x_t
mscan512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct mscan512x {$/;"	s
mscan512x_t	arch/powerpc/include/asm/immap_512x.h	/^} mscan512x_t;$/;"	t	typeref:struct:mscan512x
mscan_buffer	include/mpc5xxx.h	/^struct mscan_buffer {$/;"	s
msccr	arch/powerpc/include/asm/immap_512x.h	/^	u32 msccr[4];		\/* MSCAN1-4 Clock Control Registers *\/$/;"	m	struct:clk512x	typeref:typename:u32[4]
msch	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_msch *msch;$/;"	m	struct:chan_info	typeref:struct:rk3288_msch *	file:
mscm	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct mscm {$/;"	s
mscm_init	board/freescale/s32v234evb/s32v234evb.c	/^static void mscm_init(void)$/;"	f	typeref:typename:void	file:
mscm_init	board/freescale/vf610twr/vf610twr.c	/^static void mscm_init(void)$/;"	f	typeref:typename:void	file:
mscm_init	board/phytec/pcm052/pcm052.c	/^static void mscm_init(void)$/;"	f	typeref:typename:void	file:
mscm_init	board/toradex/colibri_vf/colibri_vf.c	/^static void mscm_init(void)$/;"	f	typeref:typename:void	file:
mscm_ir	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^struct mscm_ir {$/;"	s
mscm_ir	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct mscm_ir {$/;"	s
mscr	arch/m68k/include/asm/fec.h	/^	u32 mscr;		\/* 0x44 *\/$/;"	m	struct:fec	typeref:typename:u32
mscr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 mscr;		\/* 0x044 *\/$/;"	m	struct:fecdma	typeref:typename:u32
mscr_fb	arch/m68k/include/asm/immap_520x.h	/^	u8 mscr_fb;		\/* 0x3A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_fb	arch/m68k/include/asm/immap_5227x.h	/^	u8 mscr_fb;		\/* 0x44 *\/$/;"	m	struct:gpio	typeref:typename:u8
mscr_flexbus	arch/m68k/include/asm/immap_5329.h	/^	u8 mscr_flexbus;	\/* 0x64 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_mscr1	arch/m68k/include/asm/immap_5301x.h	/^	u8 mscr_mscr1;		\/* 0x68 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_mscr2	arch/m68k/include/asm/immap_5301x.h	/^	u8 mscr_mscr2;		\/* 0x69 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_mscr3	arch/m68k/include/asm/immap_5301x.h	/^	u8 mscr_mscr3;		\/* 0x6A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_mscr45	arch/m68k/include/asm/immap_5301x.h	/^	u8 mscr_mscr45;		\/* 0x6B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_offset_ck0	board/freescale/s32v234evb/lpddr2.c	/^volatile int mscr_offset_ck0;$/;"	v	typeref:typename:volatile int
mscr_pci	arch/m68k/include/asm/immap_5445x.h	/^	u8 mscr_pci;		\/* PCI Mode Select Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
mscr_sdram	arch/m68k/include/asm/immap_520x.h	/^	u8 mscr_sdram;		\/* 0x3B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_sdram	arch/m68k/include/asm/immap_5227x.h	/^	u8 mscr_sdram;		\/* 0x45 *\/$/;"	m	struct:gpio	typeref:typename:u8
mscr_sdram	arch/m68k/include/asm/immap_5329.h	/^	u8 mscr_sdram;		\/* 0x65 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
mscr_sdram	arch/m68k/include/asm/immap_5441x.h	/^	u8 mscr_sdram;		\/* 0x60 *\/$/;"	m	struct:gpio	typeref:typename:u8
mscr_sdram	arch/m68k/include/asm/immap_5445x.h	/^	u8 mscr_sdram;		\/* SDRAM Mode Select Control Register *\/$/;"	m	struct:gpio	typeref:typename:u8
msd	include/ddr_spd.h	/^	uint8_t msd[29];		\/* 353~381 Mfg's Specific Data *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[29]
msd	include/ddr_spd.h	/^	unsigned char msd[26];         \/* 150-175 Mfg's Specific Data *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[26]
mseq_edc_bist_done	include/cortina.h	/^#define mseq_edc_bist_done /;"	d
mseq_edc_bist_fail	include/cortina.h	/^#define mseq_edc_bist_fail /;"	d
msg	arch/m68k/include/asm/immap_5227x.h	/^	can_msg_t msg[16];	\/* 0x00 Message Buffer 0-15 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[16]
msg	arch/m68k/include/asm/immap_5235.h	/^	can_msg_t msg[16];	\/* 0x00 Message Buffer 0-15 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[16]
msg	arch/m68k/include/asm/immap_5253.h	/^	can_msg_t msg[32];	\/* 0x80 Message Buffer 0-31 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[32]
msg	arch/m68k/include/asm/immap_5282.h	/^	can_msg_t msg[16];	\/* 0x00 Message Buffer 0-15 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[16]
msg	arch/m68k/include/asm/immap_5329.h	/^	can_msg_t msg[16];	\/* 0x00 Message Buffer 0-15 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[16]
msg	arch/m68k/include/asm/immap_547x_8x.h	/^	can_msg_t msg[16];	\/* 0x00 Message Buffer 0-15 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[16]
msg	arch/powerpc/cpu/mpc85xx/fdt.c	/^static void msg(const char *name, uint64_t uaddr, uint64_t daddr)$/;"	f	typeref:typename:void	file:
msg	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_msg	msg[CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM];$/;"	m	struct:ccsr_rio	typeref:struct:rio_msg[]
msg	include/ec_commands.h	/^	struct ec_params_i2c_passthru_msg msg[];$/;"	m	struct:ec_params_i2c_passthru	typeref:struct:ec_params_i2c_passthru_msg[]
msg	include/u-boot/zlib.h	/^	char	*msg;	\/* last error message, NULL if no error *\/$/;"	m	struct:z_stream_s	typeref:typename:char *
msg	scripts/kconfig/kxgettext.c	/^	const char	 *msg;$/;"	m	struct:message	typeref:typename:const char *	file:
msg_ddr_cal	board/imgtec/boston/lowlevel_init.S	/^msg_ddr_cal:	.ascii "DDR Cal "$/;"	l
msg_ddr_ok	board/imgtec/boston/lowlevel_init.S	/^msg_ddr_ok:	.ascii "DDR OK  "$/;"	l
msg_enable	drivers/block/sata_dwc.h	/^	u32			msg_enable;$/;"	m	struct:ata_port	typeref:typename:u32
msg_enable	drivers/net/ks8851_mll.c	/^	u32			msg_enable;$/;"	m	struct:ks_net	typeref:typename:u32	file:
msg_get_arm_mem	board/raspberrypi/rpi/rpi.c	/^struct msg_get_arm_mem {$/;"	s	file:
msg_get_board_rev	board/raspberrypi/rpi/rpi.c	/^struct msg_get_board_rev {$/;"	s	file:
msg_get_board_serial	board/raspberrypi/rpi/rpi.c	/^struct msg_get_board_serial {$/;"	s	file:
msg_get_clock_rate	board/raspberrypi/rpi/rpi.c	/^struct msg_get_clock_rate {$/;"	s	file:
msg_get_mac_address	board/raspberrypi/rpi/rpi.c	/^struct msg_get_mac_address {$/;"	s	file:
msg_length	drivers/net/pcnet.c	/^	u32 msg_length;$/;"	m	struct:pcnet_rx_head	typeref:typename:u32	file:
msg_port_alt_clrbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_alt_clrbits(/;"	d
msg_port_alt_clrsetbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_alt_clrsetbits(/;"	d
msg_port_alt_read	arch/x86/cpu/quark/msg_port.c	/^u32 msg_port_alt_read(u8 port, u32 reg)$/;"	f	typeref:typename:u32
msg_port_alt_setbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_alt_setbits(/;"	d
msg_port_alt_write	arch/x86/cpu/quark/msg_port.c	/^void msg_port_alt_write(u8 port, u32 reg, u32 value)$/;"	f	typeref:typename:void
msg_port_clrbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_clrbits(/;"	d
msg_port_clrsetbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_clrsetbits(/;"	d
msg_port_generic_clrsetbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_generic_clrsetbits(/;"	d
msg_port_io_clrbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_io_clrbits(/;"	d
msg_port_io_clrsetbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_io_clrsetbits(/;"	d
msg_port_io_read	arch/x86/cpu/quark/msg_port.c	/^u32 msg_port_io_read(u8 port, u32 reg)$/;"	f	typeref:typename:u32
msg_port_io_setbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_io_setbits(/;"	d
msg_port_io_write	arch/x86/cpu/quark/msg_port.c	/^void msg_port_io_write(u8 port, u32 reg, u32 value)$/;"	f	typeref:typename:void
msg_port_normal_read	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_normal_read	/;"	d
msg_port_normal_write	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_normal_write	/;"	d
msg_port_read	arch/x86/cpu/quark/car.S	/^msg_port_read:$/;"	l
msg_port_read	arch/x86/cpu/quark/msg_port.c	/^u32 msg_port_read(u8 port, u32 reg)$/;"	f	typeref:typename:u32
msg_port_setbits	arch/x86/include/asm/arch-quark/msg_port.h	/^#define msg_port_setbits(/;"	d
msg_port_setup	arch/x86/cpu/quark/msg_port.c	/^void msg_port_setup(int op, int port, int reg)$/;"	f	typeref:typename:void
msg_port_write	arch/x86/cpu/quark/car.S	/^msg_port_write:$/;"	l
msg_port_write	arch/x86/cpu/quark/msg_port.c	/^void msg_port_write(u8 port, u32 reg, u32 value)$/;"	f	typeref:typename:void
msg_query	drivers/video/bcm2835.c	/^struct msg_query {$/;"	s	file:
msg_req_delay	tools/kwboot.c	/^static int msg_req_delay = KWBOOT_MSG_REQ_DELAY;$/;"	v	typeref:typename:int	file:
msg_rsp_timeo	tools/kwboot.c	/^static int msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO;$/;"	v	typeref:typename:int	file:
msg_set_power_state	board/raspberrypi/rpi/rpi.c	/^struct msg_set_power_state {$/;"	s	file:
msg_setup	drivers/video/bcm2835.c	/^struct msg_setup {$/;"	s	file:
msgbuf	arch/m68k/include/asm/coldfire/flexcan.h	/^	void *msgbuf;		\/* 0x80 Message Buffer 0-15 *\/$/;"	m	struct:can_ctrl	typeref:typename:void *
msgdma_csr	drivers/net/altera_tse.h	/^struct msgdma_csr {$/;"	s
msgdma_extended_desc	drivers/net/altera_tse.h	/^struct msgdma_extended_desc {$/;"	s
msgdma_reset	drivers/net/altera_tse.c	/^static void msgdma_reset(struct msgdma_csr *csr)$/;"	f	typeref:typename:void	file:
msgdma_response	drivers/net/altera_tse.h	/^struct msgdma_response {$/;"	s
msgdma_wait	drivers/net/altera_tse.c	/^static u32 msgdma_wait(struct msgdma_csr *csr)$/;"	f	typeref:typename:u32	file:
msgin	include/scsi.h	/^	unsigned char		msgin[12];				\/* Message in buffer	*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char[12]
msgout	include/scsi.h	/^	unsigned char		msgout[12];				\/* Messge out buffer (NOT USED) *\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char[12]
msgr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	msgr0;		\/* Message 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
msgr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	msgr0;		\/* 0x41400 - Message Register 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
msgr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	msgr1;		\/* Message 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
msgr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	msgr1;		\/* 0x41410 - Message Register 1 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
msgr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	msgr2;		\/* Message 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
msgr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	msgr2;		\/* 0x41420 - Message Register 2 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
msgr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	msgr3;		\/* Message 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
msgr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	msgr3;		\/* 0x41430 - Message Register 3 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
msgs	include/i2c.h	/^	struct i2c_msg *msgs;$/;"	m	struct:i2c_msg_list	typeref:struct:i2c_msg *
mshc_0	arch/arm/dts/exynos4x12.dtsi	/^	mshc_0: mmc@12550000 {$/;"	l
msimap	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	msimap;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
msk_isa16_mode	arch/mips/include/asm/mipsregs.h	/^#define msk_isa16_mode(/;"	d
mskclrs	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mskclrs;$/;"	m	struct:rcar_gpio	typeref:typename:u32
mskr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 mskr;		\/* 0x00 PIO Mask Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
mslcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	mslcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
msleep	arch/arm/mach-exynos/include/mach/dp_info.h	/^#define msleep(/;"	d
msleep	drivers/block/ahci.c	/^#define msleep(/;"	d	file:
msleep	drivers/block/pata_bfin.c	/^static void msleep(int count)$/;"	f	typeref:typename:void	file:
msleep	drivers/block/sata_dwc.c	/^#define msleep(/;"	d	file:
msleep	drivers/block/sata_sil3114.c	/^static void msleep (int count)$/;"	f	typeref:typename:void	file:
msleep	drivers/usb/musb-new/linux-compat.h	/^#define msleep(/;"	d
msm_clk_ids	arch/arm/mach-snapdragon/clock-apq8016.c	/^static const struct udevice_id msm_clk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
msm_clk_ops	arch/arm/mach-snapdragon/clock-apq8016.c	/^static struct clk_ops msm_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
msm_clk_priv	arch/arm/mach-snapdragon/clock-apq8016.c	/^struct msm_clk_priv {$/;"	s	file:
msm_clk_probe	arch/arm/mach-snapdragon/clock-apq8016.c	/^static int msm_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_ehci_ops	drivers/usb/host/ehci-msm.c	/^static const struct ehci_ops msm_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
msm_ehci_priv	drivers/usb/host/ehci-msm.c	/^struct msm_ehci_priv {$/;"	s	file:
msm_gpio_bank	drivers/gpio/msm_gpio.c	/^struct msm_gpio_bank {$/;"	s	file:
msm_gpio_direction_input	drivers/gpio/msm_gpio.c	/^static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)$/;"	f	typeref:typename:int	file:
msm_gpio_direction_output	drivers/gpio/msm_gpio.c	/^static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
msm_gpio_get_function	drivers/gpio/msm_gpio.c	/^static int msm_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
msm_gpio_get_value	drivers/gpio/msm_gpio.c	/^static int msm_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
msm_gpio_ids	drivers/gpio/msm_gpio.c	/^static const struct udevice_id msm_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
msm_gpio_ofdata_to_platdata	drivers/gpio/msm_gpio.c	/^static int msm_gpio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_gpio_probe	drivers/gpio/msm_gpio.c	/^static int msm_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_gpio_set_value	drivers/gpio/msm_gpio.c	/^static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)$/;"	f	typeref:typename:int	file:
msm_init_after_reset	drivers/usb/host/ehci-msm.c	/^static int msm_init_after_reset(struct ehci_ctrl *dev)$/;"	f	typeref:typename:int	file:
msm_mmc_ids	drivers/mmc/msm_sdhci.c	/^static const struct udevice_id msm_mmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
msm_ofdata_to_platdata	drivers/mmc/msm_sdhci.c	/^static int msm_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_sdc_bind	drivers/mmc/msm_sdhci.c	/^static int msm_sdc_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_sdc_clk_init	drivers/mmc/msm_sdhci.c	/^static int msm_sdc_clk_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_sdc_probe	drivers/mmc/msm_sdhci.c	/^static int msm_sdc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_sdc_remove	drivers/mmc/msm_sdhci.c	/^static int msm_sdc_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_sdhc	drivers/mmc/msm_sdhci.c	/^struct msm_sdhc {$/;"	s	file:
msm_sdhc_plat	drivers/mmc/msm_sdhci.c	/^struct msm_sdhc_plat {$/;"	s	file:
msm_serial_data	drivers/serial/serial_msm.c	/^struct msm_serial_data {$/;"	s	file:
msm_serial_fetch	drivers/serial/serial_msm.c	/^static int msm_serial_fetch(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_serial_getc	drivers/serial/serial_msm.c	/^static int msm_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_serial_ids	drivers/serial/serial_msm.c	/^static const struct udevice_id msm_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
msm_serial_ofdata_to_platdata	drivers/serial/serial_msm.c	/^static int msm_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_serial_ops	drivers/serial/serial_msm.c	/^static const struct dm_serial_ops msm_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
msm_serial_pending	drivers/serial/serial_msm.c	/^static int msm_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
msm_serial_probe	drivers/serial/serial_msm.c	/^static int msm_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_serial_putc	drivers/serial/serial_msm.c	/^static int msm_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
msm_set_rate	arch/arm/mach-snapdragon/clock-apq8016.c	/^ulong msm_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong
msm_spmi_ids	drivers/spmi/spmi-msm.c	/^static const struct udevice_id msm_spmi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
msm_spmi_ops	drivers/spmi/spmi-msm.c	/^static struct dm_spmi_ops msm_spmi_ops = {$/;"	v	typeref:struct:dm_spmi_ops	file:
msm_spmi_priv	drivers/spmi/spmi-msm.c	/^struct msm_spmi_priv {$/;"	s	file:
msm_spmi_probe	drivers/spmi/spmi-msm.c	/^static int msm_spmi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msm_spmi_read	drivers/spmi/spmi-msm.c	/^static int msm_spmi_read(struct udevice *dev, int usid, int pid, int off)$/;"	f	typeref:typename:int	file:
msm_spmi_write	drivers/spmi/spmi-msm.c	/^static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,$/;"	f	typeref:typename:int	file:
msm_sysreset_ids	drivers/sysreset/sysreset_snapdragon.c	/^static const struct udevice_id msm_sysreset_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
msm_sysreset_ops	drivers/sysreset/sysreset_snapdragon.c	/^static struct sysreset_ops msm_sysreset_ops = {$/;"	v	typeref:struct:sysreset_ops	file:
msm_sysreset_request	drivers/sysreset/sysreset_snapdragon.c	/^static int msm_sysreset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int	file:
msm_uart_clk_init	drivers/serial/serial_msm.c	/^static int msm_uart_clk_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
msmc_get_ses_mpax	arch/arm/mach-keystone/msmc.c	/^void msmc_get_ses_mpax(int priv_id, int ses_pair, u32 *mpax)$/;"	f	typeref:typename:void
msmc_k2e_setup	arch/arm/mach-keystone/init.c	/^static inline void msmc_k2e_setup(void)$/;"	f	typeref:typename:void	file:
msmc_k2g_setup	arch/arm/mach-keystone/init.c	/^static void msmc_k2g_setup(void)$/;"	f	typeref:typename:void	file:
msmc_k2hk_setup	arch/arm/mach-keystone/init.c	/^static void msmc_k2hk_setup(void)$/;"	f	typeref:typename:void	file:
msmc_k2hkle_common_setup	arch/arm/mach-keystone/init.c	/^static void msmc_k2hkle_common_setup(void)$/;"	f	typeref:typename:void	file:
msmc_k2l_setup	arch/arm/mach-keystone/init.c	/^static inline void msmc_k2l_setup(void)$/;"	f	typeref:typename:void	file:
msmc_map_ses_segment	arch/arm/mach-keystone/msmc.c	/^void msmc_map_ses_segment(int priv_id, int ses_pair,$/;"	f	typeref:typename:void
msmc_set_ses_mpax	arch/arm/mach-keystone/msmc.c	/^void msmc_set_ses_mpax(int priv_id, int ses_pair, u32 *mpax)$/;"	f	typeref:typename:void
msmc_share_all_segments	arch/arm/mach-keystone/msmc.c	/^void msmc_share_all_segments(int priv_id)$/;"	f	typeref:typename:void
msms_regs	arch/arm/mach-keystone/msmc.c	/^struct msms_regs {$/;"	s	file:
msovr	arch/m68k/include/asm/immap_5441x.h	/^	u32 msovr;		\/* 0x18C *\/$/;"	m	struct:sdramc	typeref:typename:u32
msp430_xfer	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static int msp430_xfer(const void *dout, void *din)$/;"	f	typeref:typename:int	file:
mspcrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 mspcrc;		\/* 0x0F4 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
mspec	include/ddr_spd.h	/^	unsigned char mspec[27];   \/* 99-127 Manufacturer Specific Data *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[27]
mspec	include/ddr_spd.h	/^	unsigned char mspec[27];   \/* 99-127 Manufacturer Specific Data *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char[27]
mspec	include/spd.h	/^	unsigned char mspec[27];   \/* 99 Manufacturer Specific Data *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[27]
msr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 msr;		\/* 0x0B4 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
msr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^	uint32_t	msr;$/;"	m	struct:pxa_uart_regs	typeref:typename:uint32_t
msr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int msr; \/* Modem status register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
msr	arch/blackfin/include/asm/serial1.h	/^	u16 msr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
msr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32 msr;		\/* I2Cn + 0x0C *\/$/;"	m	struct:i2c512x_dev	typeref:typename:volatile u32
msr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	msr;		\/* Message Status *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
msr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	msr;		\/* 0x41510 - Message Status Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
msr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	msr;		\/* 0xc0040 - Mailbox Command And Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
msr	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG msr;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
msr	arch/x86/include/asm/msr.h	/^struct msr {$/;"	s
msr	drivers/serial/serial_bcm283x_mu.c	/^	u32 msr;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
msr	drivers/serial/serial_uniphier.c	/^	u32 msr;		\/* In: Modem Status Register *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
msr	include/mpc5xxx.h	/^	volatile u32 msr;		\/* I2Cn + 0x0C *\/$/;"	m	struct:mpc5xxx_i2c	typeref:typename:volatile u32
msr_clrbits_64	arch/x86/include/asm/msr.h	/^static inline void msr_clrbits_64(unsigned msr, u64 clear)$/;"	f	typeref:typename:void
msr_clrsetbits_64	arch/x86/include/asm/msr.h	/^static inline void msr_clrsetbits_64(unsigned msr, u64 clear, u64 set)$/;"	f	typeref:typename:void
msr_count	arch/x86/cpu/sipi_vector.S	/^msr_count:$/;"	l
msr_count	arch/x86/include/asm/sipi.h	/^	u32 msr_count;$/;"	m	struct:sipi_params	typeref:typename:u32
msr_info	arch/x86/include/asm/msr.h	/^struct msr_info {$/;"	s
msr_no	arch/x86/include/asm/msr.h	/^	u32 msr_no;$/;"	m	struct:msr_info	typeref:typename:u32
msr_plat	drivers/timer/tsc_timer.c	/^	u8 msr_plat;$/;"	m	struct:freq_desc	typeref:typename:u8	file:
msr_read	arch/x86/include/asm/msr.h	/^static inline struct msr_t msr_read(unsigned msr_num)$/;"	f	typeref:struct:msr_t
msr_regs_info	arch/x86/include/asm/msr.h	/^struct msr_regs_info {$/;"	s
msr_setbits_64	arch/x86/include/asm/msr.h	/^static inline void msr_setbits_64(unsigned msr, u64 set)$/;"	f	typeref:typename:void
msr_t	arch/x86/include/asm/msr.h	/^typedef struct msr_t {$/;"	s
msr_t	arch/x86/include/asm/msr.h	/^} msr_t;$/;"	t	typeref:struct:msr_t
msr_table_ptr	arch/x86/cpu/sipi_vector.S	/^msr_table_ptr:$/;"	l
msr_table_ptr	arch/x86/include/asm/sipi.h	/^	u32 msr_table_ptr;$/;"	m	struct:sipi_params	typeref:typename:u32
msr_write	arch/x86/include/asm/msr.h	/^static inline void msr_write(unsigned msr_num, msr_t msr)$/;"	f	typeref:typename:void
msrs	arch/x86/include/asm/msr.h	/^	struct msr *msrs;$/;"	m	struct:msr_info	typeref:struct:msr *
mss	drivers/net/e1000.h	/^			uint16_t mss;	\/* Maximum segment size *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345180a::__anon7fc273451908	typeref:typename:uint16_t
msst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 msst;		\/* 0x0C0 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
mst_cfg	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 mst_cfg[36];           \/* 0x000 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[36]
mst_cfg	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 mst_cfg[36];           \/* 0x000 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[36]
mst_node	fs/ubifs/ubifs.h	/^	struct ubifs_mst_node *mst_node;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_mst_node *
mst_node_alsz	fs/ubifs/ubifs.h	/^	int mst_node_alsz;$/;"	m	struct:ubifs_info	typeref:typename:int
mst_offs	fs/ubifs/ubifs.h	/^	int mst_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
mst_read_prio_cfg	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 mst_read_prio_cfg[2];  \/* 0x104 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[2]
mst_read_prio_cfg	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 mst_read_prio_cfg[2];  \/* 0x104 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[2]
mstat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 mstat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
mstat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 mstat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
mstat	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 mstat;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstat	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mstat;		\/* 0x18 mode register read\/write status reg *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstat	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 mstat;		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstat	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mstat;		\/* 0x18 mode register read\/write status reg *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstatus	include/grlib/irqmp.h	/^	volatile unsigned int mstatus;$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int
mstp_clrbits	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define mstp_clrbits(/;"	d
mstp_clrbits_le32	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define mstp_clrbits_le32(/;"	d
mstp_ctl	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^struct mstp_ctl {$/;"	s
mstp_setbits	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define mstp_setbits(/;"	d
mstp_setbits_le32	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define mstp_setbits_le32(/;"	d
mstp_setclrbits	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define mstp_setclrbits(/;"	d
mstp_setclrbits_le32	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^#define mstp_setclrbits_le32(/;"	d
mstpri	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	mstpri[3];$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg[3]
mstpri	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	mstpri[2];	\/* 0x3C *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int[2]
mstpsr0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 mstpsr0;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
mstpsr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mstpsr0;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mstpsr1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 mstpsr1;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
mstpsr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mstpsr1;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mstpsr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 mstpsr2;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
mstpsr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mstpsr2;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mstpsr3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 mstpsr3;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
mstpsr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mstpsr3;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mstpsr4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 mstpsr4;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
mstpsr4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mstpsr4;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mstpsr5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 mstpsr5;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
mstpsr5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 mstpsr5;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
mstptbl	board/renesas/rcar-common/common.c	/^static struct mstp_ctl mstptbl[] = {$/;"	v	typeref:struct:mstp_ctl[]	file:
mstr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 mstr;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 mstr;		\/* 0x00 master register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 mstr;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
mstr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 mstr;		\/* 0x00 master register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
msuckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 msuckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
msw	drivers/net/xilinx_ll_temac.h	/^	u32 msw;	\/* Most Significant Word Data *\/$/;"	m	struct:temac_reg	typeref:typename:u32
mswap	lib/bzip2/bzlib_blocksort.c	/^#define mswap(/;"	d	file:
mswitch	board/keymile/common/common.h	/^	u8	mswitch;	\/* Read mode switch *\/$/;"	m	struct:bfticu_iomap	typeref:typename:u8
msync	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	msync;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
msys_init	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	int msys_init;$/;"	m	struct:init_cntr_param	typeref:typename:int
mt41j128m16jt_125	board/barco/platinum/spl_titanium.c	/^static struct mx6_ddr3_cfg mt41j128m16jt_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41j256	board/engicam/icorem6/icorem6.c	/^static struct mx6_ddr3_cfg mt41j256 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41k128m16jt_125	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_ddr3_cfg mt41k128m16jt_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41k128m16jt_125	board/udoo/udoo_spl.c	/^static struct mx6_ddr3_cfg mt41k128m16jt_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41k256m16ha_125	board/barco/platinum/spl_picon.c	/^static struct mx6_ddr3_cfg mt41k256m16ha_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41k256m16ha_125	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_ddr3_cfg mt41k256m16ha_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41k512m16ha_125	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_ddr3_cfg mt41k512m16ha_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt41k64m16jt_125	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_ddr3_cfg mt41k64m16jt_125 = {$/;"	v	typeref:struct:mx6_ddr3_cfg	file:
mt48lc32m16a2	board/cm5200/cm5200.h	/^static mem_conf_t mt48lc32m16a2 = {$/;"	v	typeref:typename:mem_conf_t
mt_ventoux_fpga_fns	board/teejet/mt_ventoux/mt_ventoux.c	/^xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = {$/;"	v	typeref:typename:xilinx_spartan3_slave_serial_fns
mt_ventoux_init_fpga	board/teejet/mt_ventoux/mt_ventoux.c	/^static void mt_ventoux_init_fpga(void)$/;"	f	typeref:typename:void	file:
mtb_dividend	include/ddr_spd.h	/^	unsigned char mtb_dividend;    \/* 10 Medium Timebase (MTB) Dividend *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
mtb_divisor	include/ddr_spd.h	/^	unsigned char mtb_divisor;     \/* 11 Medium Timebase (MTB) Divisor *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
mtb_ps	include/fsl_ddr_dimm_params.h	/^	int mtb_ps;	\/* medium timebase ps *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
mtc_calculate_checksum	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static void mtc_calculate_checksum(tx_msp_cmd *packet)$/;"	f	typeref:typename:void	file:
mtc_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 mtc_clk_cfg;	\/* 0x158 MTC module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mtc_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 mtc_clk_cfg;	\/* 0x158 MTC module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
mtcadc_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mtcadc_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
mtcadc_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	mtcadc_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
mtcpr	arch/powerpc/include/asm/ppc4xx.h	/^#define mtcpr(/;"	d
mtcr	include/fsl_immap.h	/^	u32	mtcr;			\/* Memory Test Control Register *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtd	cmd/onenand.c	/^static struct mtd_info *mtd;$/;"	v	typeref:struct:mtd_info *	file:
mtd	common/fb_nand.c	/^	struct mtd_info		*mtd;$/;"	m	struct:fb_nand_sparse	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/mtdconcat.c	/^	struct mtd_info mtd;$/;"	m	struct:mtd_concat	typeref:struct:mtd_info	file:
mtd	drivers/mtd/mtdpart.c	/^	struct mtd_info mtd;$/;"	m	struct:mtd_part	typeref:struct:mtd_info	file:
mtd	drivers/mtd/nand/am335x_spl_bch.c	/^static struct mtd_info *mtd;$/;"	v	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/nand/atmel_nand.c	/^static struct mtd_info *mtd;$/;"	v	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/nand/mxs_nand_spl.c	/^static struct mtd_info *mtd;$/;"	v	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/nand/nand_spl_simple.c	/^static struct mtd_info *mtd;$/;"	v	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/nand/pxa3xx_nand.c	/^	struct mtd_info         *mtd;$/;"	m	struct:pxa3xx_nand_host	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/onenand/samsung.c	/^	struct mtd_info	*mtd;$/;"	m	struct:s3c_onenand	typeref:struct:mtd_info *	file:
mtd	drivers/mtd/ubi/ubi.h	/^	struct mtd_info *mtd;$/;"	m	struct:ubi_device	typeref:struct:mtd_info *
mtd	fs/jffs2/jffs2_nand_1pass.c	/^static struct mtd_info *mtd;$/;"	v	typeref:struct:mtd_info *	file:
mtd	include/flash.h	/^	struct mtd_info *mtd;$/;"	m	struct:__anoneae1afdc0108	typeref:struct:mtd_info *
mtd	include/linux/mtd/mtd.h	/^	struct mtd_info *mtd;$/;"	m	struct:erase_info	typeref:struct:mtd_info *
mtd	include/linux/mtd/nand.h	/^	struct mtd_info mtd;$/;"	m	struct:nand_chip	typeref:struct:mtd_info
mtd_add_partition	drivers/mtd/mtdpart.c	/^int mtd_add_partition(struct mtd_info *master, const char *name,$/;"	f	typeref:typename:int
mtd_arg_off	drivers/mtd/mtd_uboot.c	/^int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,$/;"	f	typeref:typename:int
mtd_arg_off_size	drivers/mtd/mtd_uboot.c	/^int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,$/;"	f	typeref:typename:int
mtd_attrs	drivers/mtd/mtdcore.c	/^static struct attribute *mtd_attrs[] = {$/;"	v	typeref:struct:attribute * []	file:
mtd_bdi_init	drivers/mtd/mtdcore.c	/^static int __init mtd_bdi_init(struct backing_dev_info *bdi, const char *name)$/;"	f	typeref:typename:int __init	file:
mtd_bdi_ro_mappable	drivers/mtd/mtdcore.c	/^static struct backing_dev_info mtd_bdi_ro_mappable = {$/;"	v	typeref:struct:backing_dev_info	file:
mtd_bdi_rw_mappable	drivers/mtd/mtdcore.c	/^static struct backing_dev_info mtd_bdi_rw_mappable = {$/;"	v	typeref:struct:backing_dev_info	file:
mtd_bdi_unmappable	drivers/mtd/mtdcore.c	/^static struct backing_dev_info mtd_bdi_unmappable = {$/;"	v	typeref:struct:backing_dev_info	file:
mtd_bitflip_threshold_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_bitflip_threshold_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_bitflip_threshold_store	drivers/mtd/mtdcore.c	/^static ssize_t mtd_bitflip_threshold_store(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_block_isbad	drivers/mtd/mtdcore.c	/^int mtd_block_isbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int
mtd_block_isreserved	drivers/mtd/mtdcore.c	/^int mtd_block_isreserved(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int
mtd_block_markbad	drivers/mtd/mtdcore.c	/^int mtd_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int
mtd_can_have_bb	include/linux/mtd/mtd.h	/^static inline int mtd_can_have_bb(const struct mtd_info *mtd)$/;"	f	typeref:typename:int
mtd_class	drivers/mtd/mtdcore.c	/^static struct class mtd_class = {$/;"	v	typeref:struct:class	file:
mtd_cls_resume	drivers/mtd/mtdcore.c	/^static int mtd_cls_resume(struct device *dev)$/;"	f	typeref:typename:int	file:
mtd_cls_suspend	drivers/mtd/mtdcore.c	/^static int mtd_cls_suspend(struct device *dev, pm_message_t state)$/;"	f	typeref:typename:int	file:
mtd_concat	drivers/mtd/mtdconcat.c	/^struct mtd_concat {$/;"	s	file:
mtd_concat_create	drivers/mtd/mtdconcat.c	/^struct mtd_info *mtd_concat_create(struct mtd_info *subdev[],	\/* subdevices to concatenate *\/$/;"	f	typeref:struct:mtd_info *
mtd_concat_destroy	drivers/mtd/mtdconcat.c	/^void mtd_concat_destroy(struct mtd_info *mtd)$/;"	f	typeref:typename:void
mtd_del_partition	drivers/mtd/mtdpart.c	/^int mtd_del_partition(struct mtd_info *master, int partno)$/;"	f	typeref:typename:int
mtd_dev_param	drivers/mtd/ubi/build.c	/^static struct mtd_dev_param __initdata mtd_dev_param[UBI_MAX_DEVICES];$/;"	v	typeref:struct:mtd_dev_param __initdata[]	file:
mtd_dev_param	drivers/mtd/ubi/build.c	/^struct mtd_dev_param {$/;"	s	file:
mtd_device	include/jffs2/load_kernel.h	/^struct mtd_device {$/;"	s
mtd_device_parse_register	drivers/mtd/mtdcore.c	/^int mtd_device_parse_register(struct mtd_info *mtd, const char * const *types,$/;"	f	typeref:typename:int
mtd_device_register	include/linux/mtd/mtd.h	/^#define mtd_device_register(/;"	d
mtd_device_unregister	drivers/mtd/mtdcore.c	/^int mtd_device_unregister(struct mtd_info *master)$/;"	f	typeref:typename:int
mtd_device_validate	cmd/jffs2.c	/^static int mtd_device_validate(u8 type, u8 num, u32 *size)$/;"	f	typeref:typename:int	file:
mtd_device_validate	cmd/mtdparts.c	/^static int mtd_device_validate(u8 type, u8 num, u64 *size)$/;"	f	typeref:typename:int	file:
mtd_devices_init	cmd/mtdparts.c	/^static int mtd_devices_init(void)$/;"	f	typeref:typename:int	file:
mtd_devs	drivers/mtd/ubi/build.c	/^static int __initdata mtd_devs;$/;"	v	typeref:typename:int __initdata	file:
mtd_devtype	drivers/mtd/mtdcore.c	/^static struct device_type mtd_devtype = {$/;"	v	typeref:struct:device_type	file:
mtd_div_by_eb	include/linux/mtd/mtd.h	/^static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd)$/;"	f	typeref:typename:uint32_t
mtd_div_by_ws	include/linux/mtd/mtd.h	/^static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd)$/;"	f	typeref:typename:uint32_t
mtd_ecc_stats	include/mtd/mtd-abi.h	/^struct mtd_ecc_stats {$/;"	s
mtd_ecc_step_size_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_ecc_step_size_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_ecc_strength_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_ecc_strength_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_erase	drivers/mtd/mtdcore.c	/^int mtd_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int
mtd_erase_callback	drivers/mtd/mtdpart.c	/^void mtd_erase_callback(struct erase_info *instr)$/;"	f	typeref:typename:void
mtd_erase_callback	include/linux/mtd/mtd.h	/^static inline void mtd_erase_callback(struct erase_info *instr)$/;"	f	typeref:typename:void
mtd_erase_region_info	include/linux/mtd/mtd.h	/^struct mtd_erase_region_info {$/;"	s
mtd_erasesize_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_erasesize_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_file_modes	include/mtd/mtd-abi.h	/^enum mtd_file_modes {$/;"	g
mtd_flags_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_flags_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_for_each_device	drivers/mtd/mtdcore.h	/^#define mtd_for_each_device(/;"	d
mtd_get_device_size	drivers/mtd/mtdpart.c	/^uint64_t mtd_get_device_size(const struct mtd_info *mtd)$/;"	f	typeref:typename:uint64_t
mtd_get_fact_prot_info	drivers/mtd/mtdcore.c	/^int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,$/;"	f	typeref:typename:int
mtd_get_info	include/mtd.h	/^static inline struct mtd_info *mtd_get_info(struct udevice *dev)$/;"	f	typeref:struct:mtd_info *
mtd_get_len_incl_bad	drivers/mtd/mtdcore.c	/^void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,$/;"	f	typeref:typename:void
mtd_get_unmapped_area	drivers/mtd/mtdcore.c	/^unsigned long mtd_get_unmapped_area(struct mtd_info *mtd, unsigned long len,$/;"	f	typeref:typename:unsigned long
mtd_get_user_prot_info	drivers/mtd/mtdcore.c	/^int mtd_get_user_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,$/;"	f	typeref:typename:int
mtd_has_oob	include/linux/mtd/mtd.h	/^static inline int mtd_has_oob(const struct mtd_info *mtd)$/;"	f	typeref:typename:int
mtd_id	include/jffs2/load_kernel.h	/^	char *mtd_id;			\/* linux kernel device id *\/$/;"	m	struct:mtdids	typeref:typename:char *
mtd_id_parse	cmd/jffs2.c	/^static int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *dev_num)$/;"	f	typeref:typename:int	file:
mtd_id_parse	cmd/mtdparts.c	/^int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type,$/;"	f	typeref:typename:int
mtd_info	cmd/ubi.c	/^	struct mtd_info *mtd_info;$/;"	m	struct:selected_dev	typeref:struct:mtd_info *	file:
mtd_info	include/linux/mtd/mtd.h	/^struct mtd_info {$/;"	s
mtd_info_t	drivers/mtd/nand/nand_util.c	/^typedef struct mtd_info		mtd_info_t;$/;"	t	typeref:struct:mtd_info	file:
mtd_info_user	include/mtd/mtd-abi.h	/^struct mtd_info_user {$/;"	s
mtd_is_bitflip	include/linux/mtd/mtd.h	/^static inline int mtd_is_bitflip(int err) {$/;"	f	typeref:typename:int
mtd_is_bitflip_or_eccerr	include/linux/mtd/mtd.h	/^static inline int mtd_is_bitflip_or_eccerr(int err) {$/;"	f	typeref:typename:int
mtd_is_eccerr	include/linux/mtd/mtd.h	/^static inline int mtd_is_eccerr(int err) {$/;"	f	typeref:typename:int
mtd_is_locked	drivers/mtd/mtdcore.c	/^int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int
mtd_is_partition	drivers/mtd/mtdpart.c	/^int mtd_is_partition(const struct mtd_info *mtd)$/;"	f	typeref:typename:int
mtd_kmalloc_up_to	drivers/mtd/mtdcore.c	/^void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size)$/;"	f	typeref:typename:void *
mtd_lock	drivers/mtd/mtdcore.c	/^int mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int
mtd_lock_user_prot_reg	drivers/mtd/mtdcore.c	/^int mtd_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len)$/;"	f	typeref:typename:int
mtd_mod_by_eb	include/linux/mtd/mtd.h	/^static inline uint32_t mtd_mod_by_eb(uint64_t sz, struct mtd_info *mtd)$/;"	f	typeref:typename:uint32_t
mtd_mod_by_ws	include/linux/mtd/mtd.h	/^static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd)$/;"	f	typeref:typename:uint32_t
mtd_name_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_name_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_nand_has_bch	include/linux/mtd/nand_bch.h	/^static inline int mtd_nand_has_bch(void) { return 0; }$/;"	f	typeref:typename:int
mtd_nand_has_bch	include/linux/mtd/nand_bch.h	/^static inline int mtd_nand_has_bch(void) { return 1; }$/;"	f	typeref:typename:int
mtd_notifier	include/linux/mtd/mtd.h	/^struct mtd_notifier {$/;"	s
mtd_num	include/mtd/ubi-user.h	/^	__s32 mtd_num;$/;"	m	struct:ubi_attach_req	typeref:typename:__s32
mtd_numeraseregions_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_numeraseregions_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_oob_buf	include/mtd/mtd-abi.h	/^struct mtd_oob_buf {$/;"	s
mtd_oob_buf64	include/mtd/mtd-abi.h	/^struct mtd_oob_buf64 {$/;"	s
mtd_oob_ops	include/linux/mtd/mtd.h	/^struct mtd_oob_ops {$/;"	s
mtd_oob_ops_t	include/nand.h	/^typedef struct mtd_oob_ops mtd_oob_ops_t;$/;"	t	typeref:struct:mtd_oob_ops
mtd_oobavail	include/linux/mtd/mtd.h	/^static inline int mtd_oobavail(struct mtd_info *mtd, struct mtd_oob_ops *ops)$/;"	f	typeref:typename:int
mtd_oobsize_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_oobsize_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_panic_write	drivers/mtd/mtdcore.c	/^int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,$/;"	f	typeref:typename:int
mtd_part	drivers/mtd/mtdpart.c	/^struct mtd_part {$/;"	s	file:
mtd_part_info	cmd/mtdparts.c	/^static struct part_info* mtd_part_info(struct mtd_device *dev, unsigned int part_num)$/;"	f	typeref:struct:part_info *	file:
mtd_part_parser	include/linux/mtd/partitions.h	/^struct mtd_part_parser {$/;"	s
mtd_part_parser_data	include/linux/mtd/partitions.h	/^struct mtd_part_parser_data {$/;"	s
mtd_partition	include/linux/mtd/partitions.h	/^struct mtd_partition {$/;"	s
mtd_point	drivers/mtd/mtdcore.c	/^int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,$/;"	f	typeref:typename:int
mtd_proc_open	drivers/mtd/mtdcore.c	/^static int mtd_proc_open(struct inode *inode, struct file *file)$/;"	f	typeref:typename:int	file:
mtd_proc_ops	drivers/mtd/mtdcore.c	/^static const struct file_operations mtd_proc_ops = {$/;"	v	typeref:typename:const struct file_operations	file:
mtd_proc_show	drivers/mtd/mtdcore.c	/^static int mtd_proc_show(struct seq_file *m, void *v)$/;"	f	typeref:typename:int	file:
mtd_read	drivers/mtd/mtdcore.c	/^int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,$/;"	f	typeref:typename:int
mtd_read_fact_prot_reg	drivers/mtd/mtdcore.c	/^int mtd_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int
mtd_read_oob	drivers/mtd/mtdcore.c	/^int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)$/;"	f	typeref:typename:int
mtd_read_user_prot_reg	drivers/mtd/mtdcore.c	/^int mtd_read_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int
mtd_release	drivers/mtd/mtdcore.c	/^static void mtd_release(struct device *dev)$/;"	f	typeref:typename:void	file:
mtd_resume	include/linux/mtd/mtd.h	/^static inline void mtd_resume(struct mtd_info *mtd)$/;"	f	typeref:typename:void
mtd_size_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_size_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_subpagesize_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_subpagesize_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_suspend	include/linux/mtd/mtd.h	/^static inline int mtd_suspend(struct mtd_info *mtd)$/;"	f	typeref:typename:int
mtd_sync	include/linux/mtd/mtd.h	/^static inline void mtd_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void
mtd_table	drivers/mtd/mtdcore.c	/^struct mtd_info *mtd_table[MAX_MTD_DEVICES];$/;"	v	typeref:struct:mtd_info * []
mtd_to_denali	drivers/mtd/nand/denali.c	/^static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd)$/;"	f	typeref:struct:denali_nand_info *	file:
mtd_to_nand	include/linux/mtd/nand.h	/^static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)$/;"	f	typeref:struct:nand_chip *
mtd_to_nfc	drivers/mtd/nand/vf610_nfc.c	/^#define mtd_to_nfc(/;"	d	file:
mtd_type	tools/env/fw_env.c	/^	uint8_t mtd_type;		\/* type of the MTD device *\/$/;"	m	struct:envdev_s	typeref:typename:uint8_t	file:
mtd_type_is_nand	include/linux/mtd/mtd.h	/^static inline int mtd_type_is_nand(const struct mtd_info *mtd)$/;"	f	typeref:typename:int
mtd_type_is_nand_user	include/mtd/mtd-abi.h	/^static inline int mtd_type_is_nand_user(const struct mtd_info_user *mtd)$/;"	f	typeref:typename:int
mtd_type_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_type_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_unlock	drivers/mtd/mtdcore.c	/^int mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int
mtd_unpoint	drivers/mtd/mtdcore.c	/^int mtd_unpoint(struct mtd_info *mtd, loff_t from, size_t len)$/;"	f	typeref:typename:int
mtd_write	drivers/mtd/mtdcore.c	/^int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,$/;"	f	typeref:typename:int
mtd_write_oob	include/linux/mtd/mtd.h	/^static inline int mtd_write_oob(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int
mtd_write_req	include/mtd/mtd-abi.h	/^struct mtd_write_req {$/;"	s
mtd_write_user_prot_reg	drivers/mtd/mtdcore.c	/^int mtd_write_user_prot_reg(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int
mtd_writesize_show	drivers/mtd/mtdcore.c	/^static ssize_t mtd_writesize_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
mtd_writev	drivers/mtd/mtdcore.c	/^int mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,$/;"	f	typeref:typename:int
mtdcr	arch/powerpc/include/asm/processor.h	/^#define mtdcr(/;"	d
mtdcr_any	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^void mtdcr_any(u32 dcr, u32 val)$/;"	f	typeref:typename:void
mtdids	cmd/mtdparts.c	/^static struct list_head mtdids;$/;"	v	typeref:struct:list_head	file:
mtdids	include/jffs2/load_kernel.h	/^struct mtdids {$/;"	s
mtdids_default	cmd/mtdparts.c	/^static const char *mtdids_default = MTDIDS_DEFAULT;$/;"	v	typeref:typename:const char *	file:
mtdpart	include/splash.h	/^	char *mtdpart;	\/* MTD partition for ubi part *\/$/;"	m	struct:splash_location	typeref:typename:char *
mtdparts_default	cmd/mtdparts.c	/^static const char *mtdparts_default = MTDPARTS_DEFAULT;$/;"	v	typeref:typename:const char *	file:
mtdparts_help_text	cmd/mtdparts.c	/^static char mtdparts_help_text[] =$/;"	v	typeref:typename:char[]	file:
mtdparts_init	cmd/jffs2.c	/^int mtdparts_init(void)$/;"	f	typeref:typename:int
mtdparts_init	cmd/mtdparts.c	/^int mtdparts_init(void)$/;"	f	typeref:typename:int
mtebc	arch/powerpc/include/asm/ppc4xx.h	/^#define mtebc(/;"	d
mtfFreq	lib/bzip2/bzlib_private.h	/^      Int32    mtfFreq    [BZ_MAX_ALPHA_SIZE];$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32[]
mtfa	lib/bzip2/bzlib_private.h	/^      UChar    mtfa   [MTFA_SIZE];$/;"	m	struct:__anon93cbeec40208	typeref:typename:UChar[]
mtfbase	lib/bzip2/bzlib_private.h	/^      Int32    mtfbase[256 \/ MTFL_SIZE];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[]
mtfv	lib/bzip2/bzlib_private.h	/^      UInt16*  mtfv;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt16 *
mthi0	arch/mips/include/asm/mipsregs.h	/^#define mthi0(/;"	d
mthi1	arch/mips/include/asm/mipsregs.h	/^#define mthi1(/;"	d
mthi2	arch/mips/include/asm/mipsregs.h	/^#define mthi2(/;"	d
mthi3	arch/mips/include/asm/mipsregs.h	/^#define mthi3(/;"	d
mtime	include/ext_common.h	/^	__le32 mtime;$/;"	m	struct:ext2_inode	typeref:typename:__le32
mtime	include/ext_common.h	/^	__le32 mtime;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
mtime	include/jffs2/jffs2.h	/^	__u32 mtime;      \/* Last modification time.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
mtime	include/zfs_common.h	/^	time_t mtime;$/;"	m	struct:zfs_dirhook_info	typeref:typename:time_t
mtime2	include/zfs_common.h	/^	time_t mtime2;$/;"	m	struct:zfs_dirhook_info	typeref:typename:time_t
mtime_nsec	fs/ubifs/ubifs-media.h	/^	__le32 mtime_nsec;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
mtime_sec	fs/ubifs/ubifs-media.h	/^	__le64 mtime_sec;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le64
mtimeset	include/zfs_common.h	/^	int mtimeset;$/;"	m	struct:zfs_dirhook_info	typeref:typename:int
mtl_regs	drivers/net/dwc_eth_qos.c	/^	struct eqos_mtl_regs *mtl_regs;$/;"	m	struct:eqos_priv	typeref:struct:eqos_mtl_regs *	file:
mtlo0	arch/mips/include/asm/mipsregs.h	/^#define mtlo0(/;"	d
mtlo1	arch/mips/include/asm/mipsregs.h	/^#define mtlo1(/;"	d
mtlo2	arch/mips/include/asm/mipsregs.h	/^#define mtlo2(/;"	d
mtlo3	arch/mips/include/asm/mipsregs.h	/^#define mtlo3(/;"	d
mtmsr	arch/powerpc/include/asm/processor.h	/^#define mtmsr(/;"	d
mtp	arch/mips/include/asm/ptrace.h	/^	unsigned long long mtp[6];        \/* MTP{0-5} *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long long[6]
mtp1	include/fsl_immap.h	/^	u32	mtp1;			\/* Memory Test Pattern 1 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp10	include/fsl_immap.h	/^	u32	mtp10;			\/* Memory Test Pattern 10 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp2	include/fsl_immap.h	/^	u32	mtp2;			\/* Memory Test Pattern 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp3	include/fsl_immap.h	/^	u32	mtp3;			\/* Memory Test Pattern 3 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp4	include/fsl_immap.h	/^	u32	mtp4;			\/* Memory Test Pattern 4 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp5	include/fsl_immap.h	/^	u32	mtp5;			\/* Memory Test Pattern 5 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp6	include/fsl_immap.h	/^	u32	mtp6;			\/* Memory Test Pattern 6 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp7	include/fsl_immap.h	/^	u32	mtp7;			\/* Memory Test Pattern 7 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp8	include/fsl_immap.h	/^	u32	mtp8;			\/* Memory Test Pattern 8 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtp9	include/fsl_immap.h	/^	u32	mtp9;			\/* Memory Test Pattern 9 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
mtrr_add_request	arch/x86/cpu/mtrr.c	/^int mtrr_add_request(int type, uint64_t start, uint64_t size)$/;"	f	typeref:typename:int
mtrr_close	arch/x86/cpu/mtrr.c	/^void mtrr_close(struct mtrr_state *state)$/;"	f	typeref:typename:void
mtrr_commit	arch/x86/cpu/mtrr.c	/^int mtrr_commit(bool do_caches)$/;"	f	typeref:typename:int
mtrr_open	arch/x86/cpu/mtrr.c	/^void mtrr_open(struct mtrr_state *state)$/;"	f	typeref:typename:void
mtrr_req	arch/x86/include/asm/global_data.h	/^	struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];$/;"	m	struct:arch_global_data	typeref:struct:mtrr_request[]
mtrr_req_count	arch/x86/include/asm/global_data.h	/^	int mtrr_req_count;$/;"	m	struct:arch_global_data	typeref:typename:int
mtrr_request	arch/x86/include/asm/global_data.h	/^struct mtrr_request {$/;"	s
mtrr_set_valid	arch/x86/lib/cmd_mtrr.c	/^static int mtrr_set_valid(int reg, bool valid)$/;"	f	typeref:typename:int	file:
mtrr_state	arch/x86/include/asm/mtrr.h	/^struct mtrr_state {$/;"	s
mtrr_table	arch/x86/cpu/intel_common/car.S	/^mtrr_table:$/;"	l
mtrr_table_end	arch/x86/cpu/intel_common/car.S	/^mtrr_table_end:$/;"	l
mtrr_type_name	arch/x86/lib/cmd_mtrr.c	/^static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {$/;"	v	typeref:typename:const char * const[]	file:
mtsdr	arch/powerpc/include/asm/ppc4xx.h	/^#define mtsdr(/;"	d
mtsdram	arch/powerpc/include/asm/ppc4xx.h	/^#define mtsdram(/;"	d
mtspr	arch/openrisc/include/asm/system.h	/^static inline void mtspr(unsigned long add, unsigned long val)$/;"	f	typeref:typename:void
mtspr	arch/powerpc/include/asm/processor.h	/^#define mtspr(/;"	d
mtu	board/Synology/ds109/ds109.h	/^	u16 mtu[4];$/;"	m	struct:tag_mv_uboot	typeref:typename:u16[4]
mtu	drivers/usb/gadget/ether.c	/^	int			mtu;$/;"	m	struct:eth_dev	typeref:typename:int	file:
mtu	drivers/usb/gadget/rndis.h	/^	int			mtu;$/;"	m	struct:rndis_params	typeref:typename:int
mtu	include/net.h	/^			u16	mtu;$/;"	m	struct:icmp_hdr::__anona5cac555010a::__anona5cac5550308	typeref:typename:u16
mtxcnt	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 mtxcnt;$/;"	m	struct:i2c_regs	typeref:typename:u32
mtype	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 mtype;$/;"	m	struct:__anon6aa74aa60108	typeref:typename:u32
muic	include/power/pmic.h	/^	struct pmic *chrg, *fg, *muic;$/;"	m	struct:power_battery	typeref:struct:pmic *
muic_path	include/power/max77693_muic.h	/^enum muic_path {$/;"	g
mul_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^void mul_byte(u8 s)$/;"	f	typeref:typename:void
mul_long	drivers/bios_emulator/x86emu/prim_ops.c	/^void mul_long(u32 s)$/;"	f	typeref:typename:void
mul_word	drivers/bios_emulator/x86emu/prim_ops.c	/^void mul_word(u16 s)$/;"	f	typeref:typename:void
mulca	drivers/net/ftmac100.h	/^	unsigned int	mulca;		\/* 0xf0 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
mulcoltx	drivers/qe/uec.h	/^	u32  mulcoltx;           \/* multiple collision *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
mult	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	mult;		\/* 10 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
mult_bulk_rx	include/linux/usb/musb.h	/^	unsigned	mult_bulk_rx:1;	\/* Rx ep required for multbulk pkts *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned:1
mult_bulk_tx	include/linux/usb/musb.h	/^	unsigned	mult_bulk_tx:1;	\/* Tx ep required for multbulk pkts *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned:1
mult_frac	include/linux/kernel.h	/^#define mult_frac(/;"	d
mult_t	arch/powerpc/cpu/mpc83xx/speed.c	/^} mult_t;$/;"	t	typeref:enum:__anon6ec4fb040103	file:
multi_channel	include/usbdescriptors.h	/^		struct usb_class_multi_channel_descriptor multi_channel;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_multi_channel_descriptor
multi_count	drivers/block/sata_dwc.h	/^	unsigned int		multi_count;$/;"	m	struct:ata_device	typeref:typename:unsigned int
multi_cs_mr_support	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	int multi_cs_mr_support;$/;"	m	struct:dram_info	typeref:typename:int
multi_hash	common/hash.c	/^#define multi_hash(/;"	d	file:
multi_i2c_init	board/samsung/common/multi_i2c.c	/^int multi_i2c_init(void)$/;"	f	typeref:typename:int
multi_plane	include/linux/mtd/samsung_onenand.h	/^	unsigned int	multi_plane;	\/* 0x02C0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
multi_plane_addr	include/linux/mtd/nand.h	/^	u8 multi_plane_addr;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
multi_plane_op_attr	include/linux/mtd/nand.h	/^	u8 multi_plane_op_attr;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
multiboot_header	arch/x86/cpu/start.S	/^multiboot_header:$/;"	l
multicast	include/linux/netdevice.h	/^	unsigned long	multicast;		\/* multicast packets received	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
multicast_hashes	drivers/usb/eth/mcs7830.c	/^	uint8_t multicast_hashes[8];$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t[8]	file:
multicast_id	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 multicast_id = 0;$/;"	v	typeref:typename:u32
multidata_timeout_us	include/adc.h	/^	unsigned int multidata_timeout_us;$/;"	m	struct:adc_uclass_platdata	typeref:typename:unsigned int
multipliers	drivers/mmc/mmc.c	/^static const u8 multipliers[] = {$/;"	v	typeref:typename:const u8[]	file:
multiply_factor	arch/arm/include/asm/arch-omap5/omap.h	/^	s8 multiply_factor;$/;"	m	struct:srcomp_params	typeref:typename:s8
multipoint	include/linux/usb/musb.h	/^	unsigned	multipoint:1;	\/* multipoint device *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned:1
multitx_supported	include/efi_api.h	/^	u8 multitx_supported;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u8
multsect	include/ata.h	/^	unsigned char	multsect;	\/* current multiple sector count *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
multsect_valid	include/ata.h	/^	unsigned char	multsect_valid;	\/* when (bit0==1) multsect is ok *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
munmap	tools/mingw_support.c	/^int munmap(void *addr, size_t len)$/;"	f	typeref:typename:int
munmap_chunk	common/dlmalloc.c	/^static void munmap_chunk(mchunkptr p)$/;"	f	typeref:typename:void	file:
muram	drivers/net/fm/fm.c	/^struct fm_muram muram[CONFIG_SYS_NUM_FMAN];$/;"	v	typeref:struct:fm_muram[]
muram	include/fsl_fman.h	/^	u8			muram[0x80000];$/;"	m	struct:ccsr_fman	typeref:typename:u8[0x80000]
muram	include/linux/immap_qe.h	/^	u8 muram[QE_MURAM_SIZE];$/;"	m	struct:qe_immap	typeref:typename:u8[]
muram_readw	drivers/net/fm/eth.c	/^static u16 muram_readw(u16 *addr)$/;"	f	typeref:typename:u16	file:
muram_writew	drivers/net/fm/eth.c	/^static void muram_writew(u16 *addr, u16 val)$/;"	f	typeref:typename:void	file:
musb	arch/arm/dts/am335x-draco.dtsi	/^		musb: usb@47400000 {$/;"	l
musb	drivers/usb/musb-new/am35x.c	/^	struct platform_device	*musb;$/;"	m	struct:am35x_glue	typeref:struct:platform_device *	file:
musb	drivers/usb/musb-new/musb_core.h	/^	struct musb		*musb;$/;"	m	struct:musb_hw_ep	typeref:struct:musb *
musb	drivers/usb/musb-new/musb_core.h	/^struct musb {$/;"	s
musb	drivers/usb/musb-new/musb_dsps.c	/^	struct platform_device *musb;	\/* child musb pdev *\/$/;"	m	struct:dsps_glue	typeref:struct:platform_device *	file:
musb	drivers/usb/musb-new/musb_gadget.h	/^	struct musb			*musb;$/;"	m	struct:musb_ep	typeref:struct:musb *
musb	drivers/usb/musb-new/musb_gadget.h	/^	struct musb		*musb;$/;"	m	struct:musb_request	typeref:struct:musb *
musb	drivers/usb/musb-new/omap2430.c	/^	struct platform_device	*musb;$/;"	m	struct:omap2430_glue	typeref:struct:platform_device *	file:
musb_advance_schedule	drivers/usb/musb-new/musb_host.c	/^static void musb_advance_schedule(struct musb *musb, struct urb *urb,$/;"	f	typeref:typename:void	file:
musb_alloc_request	drivers/usb/musb-new/musb_gadget.c	/^struct usb_request *musb_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)$/;"	f	typeref:struct:usb_request *
musb_attr_group	drivers/usb/musb-new/musb_core.c	/^static const struct attribute_group musb_attr_group = {$/;"	v	typeref:typename:const struct attribute_group	file:
musb_attributes	drivers/usb/musb-new/musb_core.c	/^static struct attribute *musb_attributes[] = {$/;"	v	typeref:struct:attribute * []	file:
musb_board_data	board/amazon/kc1/kc1.c	/^static struct omap_musb_board_data musb_board_data = {$/;"	v	typeref:struct:omap_musb_board_data	file:
musb_board_data	board/lg/sniper/sniper.c	/^static struct omap_musb_board_data musb_board_data = {$/;"	v	typeref:struct:omap_musb_board_data	file:
musb_board_data	board/logicpd/am3517evm/am3517evm.c	/^static struct omap_musb_board_data musb_board_data = {$/;"	v	typeref:struct:omap_musb_board_data	file:
musb_board_data	board/logicpd/omap3som/omap3logic.c	/^static struct omap_musb_board_data musb_board_data = {$/;"	v	typeref:struct:omap_musb_board_data	file:
musb_board_data	board/ti/beagle/beagle.c	/^static struct omap_musb_board_data musb_board_data = {$/;"	v	typeref:struct:omap_musb_board_data	file:
musb_buf_mode	include/linux/usb/musb.h	/^enum musb_buf_mode {$/;"	g
musb_bulk_rx_nak_timeout	drivers/usb/musb-new/musb_host.c	/^static void musb_bulk_rx_nak_timeout(struct musb *musb, struct musb_hw_ep *ep)$/;"	f	typeref:typename:void	file:
musb_bus_resume	drivers/usb/musb-new/musb_host.c	/^static int musb_bus_resume(struct usb_hcd *hcd)$/;"	f	typeref:typename:int	file:
musb_bus_suspend	drivers/usb/musb-new/musb_host.c	/^static int musb_bus_suspend(struct usb_hcd *hcd)$/;"	f	typeref:typename:int	file:
musb_cfg	drivers/usb/musb/am35x.c	/^struct musb_config musb_cfg = {$/;"	v	typeref:struct:musb_config
musb_cfg	drivers/usb/musb/blackfin_usb.c	/^struct musb_config musb_cfg = {$/;"	v	typeref:struct:musb_config
musb_cfg	drivers/usb/musb/da8xx.c	/^struct musb_config musb_cfg = {$/;"	v	typeref:struct:musb_config
musb_cfg	drivers/usb/musb/davinci.c	/^struct musb_config musb_cfg = {$/;"	v	typeref:struct:musb_config
musb_cfg	drivers/usb/musb/omap3.c	/^struct musb_config musb_cfg = {$/;"	v	typeref:struct:musb_config
musb_cleanup	drivers/usb/musb-new/musb_core.c	/^static void __exit musb_cleanup(void)$/;"	f	typeref:typename:void __exit	file:
musb_cleanup_urb	drivers/usb/musb-new/musb_host.c	/^static int musb_cleanup_urb(struct urb *urb, struct musb_qh *qh)$/;"	f	typeref:typename:int	file:
musb_config	arch/arm/cpu/armv7/am33xx/board.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	board/amazon/kc1/kc1.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	board/lg/sniper/sniper.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	board/logicpd/am3517evm/am3517evm.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	board/logicpd/omap3som/omap3logic.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	board/ti/beagle/beagle.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	drivers/usb/musb-new/sunxi.c	/^static struct musb_hdrc_config musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
musb_config	drivers/usb/musb/musb_core.h	/^struct musb_config {$/;"	s
musb_configure_ep	drivers/usb/musb/musb_core.c	/^void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt)$/;"	f	typeref:typename:void
musb_configure_ep0	drivers/usb/musb-new/musb_core.h	/^static inline void musb_configure_ep0(struct musb *musb)$/;"	f	typeref:typename:void
musb_context_registers	drivers/usb/musb-new/musb_core.h	/^struct musb_context_registers {$/;"	s
musb_core_init	drivers/usb/musb-new/musb_core.c	/^static int __devinit musb_core_init(u16 musb_type, struct musb *musb)$/;"	f	typeref:typename:int __devinit	file:
musb_core_offset	drivers/usb/musb-new/musb_dsps.c	/^	u32		musb_core_offset;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
musb_create_int_queue	drivers/usb/musb-new/musb_uboot.c	/^static struct int_queue *musb_create_int_queue(struct udevice *dev,$/;"	f	typeref:struct:int_queue *	file:
musb_csr_regs	drivers/usb/musb-new/musb_core.h	/^struct musb_csr_regs {$/;"	s
musb_db_otg_regs	drivers/usb/musb/omap3.c	/^static void musb_db_otg_regs(void)$/;"	f	typeref:typename:void	file:
musb_db_regs	drivers/usb/musb/musb_udc.c	/^#define musb_db_regs(/;"	d	file:
musb_db_regs	drivers/usb/musb/musb_udc.c	/^static void musb_db_regs(void)$/;"	f	typeref:typename:void	file:
musb_destroy_int_queue	drivers/usb/musb-new/musb_uboot.c	/^static int musb_destroy_int_queue(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
musb_dev_pm_ops	drivers/usb/musb-new/musb_core.c	/^static const struct dev_pm_ops musb_dev_pm_ops = {$/;"	v	typeref:typename:const struct dev_pm_ops	file:
musb_dma_completion	drivers/usb/musb-new/musb_core.c	/^void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)$/;"	f	typeref:typename:void
musb_dmamask	drivers/usb/musb-new/musb_dsps.c	/^static u64 musb_dmamask = DMA_BIT_MASK(32);$/;"	v	typeref:typename:u64	file:
musb_do_idle	drivers/usb/musb-new/omap2430.c	/^static void musb_do_idle(unsigned long _musb)$/;"	f	typeref:typename:void	file:
musb_driver	drivers/usb/musb-new/musb_core.c	/^static struct platform_driver musb_driver = {$/;"	v	typeref:struct:platform_driver	file:
musb_driver_name	drivers/usb/musb-new/musb_core.c	/^const char musb_driver_name[] = MUSB_DRIVER_NAME;$/;"	v	typeref:typename:const char[]
musb_dsps_id_table	drivers/usb/musb-new/musb_dsps.c	/^static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {$/;"	v	typeref:typename:const struct platform_device_id[]__devinitconst	file:
musb_dsps_of_match	drivers/usb/musb-new/musb_dsps.c	/^static const struct of_device_id musb_dsps_of_match[] __devinitconst = {$/;"	v	typeref:typename:const struct of_device_id[]__devinitconst	file:
musb_ep	drivers/usb/musb-new/musb_gadget.h	/^struct musb_ep {$/;"	s
musb_ep0_regs	drivers/usb/musb/musb_core.h	/^struct musb_ep0_regs {$/;"	s
musb_ep0_tx_ready	drivers/usb/musb/musb_udc.c	/^static void musb_ep0_tx_ready(void)$/;"	f	typeref:typename:void	file:
musb_ep0_tx_ready_and_last	drivers/usb/musb/musb_udc.c	/^static void musb_ep0_tx_ready_and_last(void)$/;"	f	typeref:typename:void	file:
musb_epN_regs	drivers/usb/musb/musb_core.h	/^struct musb_epN_regs {$/;"	s
musb_ep_get_qh	drivers/usb/musb-new/musb_host.c	/^static struct musb_qh *musb_ep_get_qh(struct musb_hw_ep *ep, int is_in)$/;"	f	typeref:struct:musb_qh *	file:
musb_ep_ops	drivers/usb/musb-new/musb_gadget.c	/^static const struct usb_ep_ops musb_ep_ops = {$/;"	v	typeref:typename:const struct usb_ep_ops	file:
musb_ep_program	drivers/usb/musb-new/musb_host.c	/^static void musb_ep_program(struct musb *musb, u8 epnum,$/;"	f	typeref:typename:void	file:
musb_ep_regs	drivers/usb/musb/musb_core.h	/^	union musb_ep_regs {$/;"	u	struct:musb_regs
musb_ep_restart	drivers/usb/musb-new/musb_gadget.c	/^void musb_ep_restart(struct musb *musb, struct musb_request *req)$/;"	f	typeref:typename:void
musb_ep_select	drivers/usb/musb-new/musb_core.h	/^#define musb_ep_select(/;"	d
musb_ep_set_qh	drivers/usb/musb-new/musb_host.c	/^static void musb_ep_set_qh(struct musb_hw_ep *ep, int is_in, struct musb_qh *qh)$/;"	f	typeref:typename:void	file:
musb_epinfo	drivers/usb/musb/musb_core.h	/^struct musb_epinfo {$/;"	s
musb_exit_debugfs	drivers/usb/musb-new/musb_debug.h	/^static inline void musb_exit_debugfs(struct musb *musb)$/;"	f	typeref:typename:void
musb_fifo_cfg	include/linux/usb/musb.h	/^struct musb_fifo_cfg {$/;"	s
musb_fifo_style	include/linux/usb/musb.h	/^enum musb_fifo_style {$/;"	g
musb_free	drivers/usb/musb-new/musb_core.c	/^static void musb_free(struct musb *musb)$/;"	f	typeref:typename:void	file:
musb_free_request	drivers/usb/musb-new/musb_gadget.c	/^void musb_free_request(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void
musb_g_disconnect	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_disconnect(struct musb *musb)$/;"	f	typeref:typename:void
musb_g_ep0_dequeue	drivers/usb/musb-new/musb_gadget_ep0.c	/^static int musb_g_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:int	file:
musb_g_ep0_disable	drivers/usb/musb-new/musb_gadget_ep0.c	/^static int musb_g_ep0_disable(struct usb_ep *e)$/;"	f	typeref:typename:int	file:
musb_g_ep0_enable	drivers/usb/musb-new/musb_gadget_ep0.c	/^musb_g_ep0_enable(struct usb_ep *ep, const struct usb_endpoint_descriptor *desc)$/;"	f	typeref:typename:int	file:
musb_g_ep0_giveback	drivers/usb/musb-new/musb_gadget_ep0.c	/^static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req)$/;"	f	typeref:typename:void	file:
musb_g_ep0_halt	drivers/usb/musb-new/musb_gadget_ep0.c	/^static int musb_g_ep0_halt(struct usb_ep *e, int value)$/;"	f	typeref:typename:int	file:
musb_g_ep0_irq	drivers/usb/musb-new/musb_gadget_ep0.c	/^irqreturn_t musb_g_ep0_irq(struct musb *musb)$/;"	f	typeref:typename:irqreturn_t
musb_g_ep0_ops	drivers/usb/musb-new/musb_gadget_ep0.c	/^const struct usb_ep_ops musb_g_ep0_ops = {$/;"	v	typeref:typename:const struct usb_ep_ops
musb_g_ep0_queue	drivers/usb/musb-new/musb_gadget_ep0.c	/^musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)$/;"	f	typeref:typename:int	file:
musb_g_ep0_state	drivers/usb/musb-new/musb_core.h	/^enum musb_g_ep0_state {$/;"	g
musb_g_giveback	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_giveback($/;"	f	typeref:typename:void
musb_g_init_endpoints	drivers/usb/musb-new/musb_gadget.c	/^static inline void __devinit musb_g_init_endpoints(struct musb *musb)$/;"	f	typeref:typename:void __devinit	file:
musb_g_reset	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_reset(struct musb *musb)$/;"	f	typeref:typename:void
musb_g_resume	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_resume(struct musb *musb)$/;"	f	typeref:typename:void
musb_g_rx	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_rx(struct musb *musb, u8 epnum)$/;"	f	typeref:typename:void
musb_g_suspend	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_suspend(struct musb *musb)$/;"	f	typeref:typename:void
musb_g_tx	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_tx(struct musb *musb, u8 epnum)$/;"	f	typeref:typename:void
musb_g_wakeup	drivers/usb/musb-new/musb_gadget.c	/^void musb_g_wakeup(struct musb *musb)$/;"	f	typeref:typename:void
musb_gadget_cleanup	drivers/usb/musb-new/musb_gadget.c	/^void musb_gadget_cleanup(struct musb *musb)$/;"	f	typeref:typename:void
musb_gadget_dequeue	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_dequeue(struct usb_ep *ep, struct usb_request *request)$/;"	f	typeref:typename:int	file:
musb_gadget_disable	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_disable(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
musb_gadget_enable	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_enable(struct usb_ep *ep,$/;"	f	typeref:typename:int	file:
musb_gadget_fifo_flush	drivers/usb/musb-new/musb_gadget.c	/^static void musb_gadget_fifo_flush(struct usb_ep *ep)$/;"	f	typeref:typename:void	file:
musb_gadget_fifo_status	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_fifo_status(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
musb_gadget_get_frame	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_get_frame(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
musb_gadget_operations	drivers/usb/musb-new/musb_gadget.c	/^static const struct usb_gadget_ops musb_gadget_operations = {$/;"	v	typeref:typename:const struct usb_gadget_ops	file:
musb_gadget_pullup	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on)$/;"	f	typeref:typename:int	file:
musb_gadget_queue	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_queue(struct usb_ep *ep, struct usb_request *req,$/;"	f	typeref:typename:int	file:
musb_gadget_release	drivers/usb/musb-new/musb_gadget.c	/^static void musb_gadget_release(struct device *dev)$/;"	f	typeref:typename:void	file:
musb_gadget_set_halt	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_set_halt(struct usb_ep *ep, int value)$/;"	f	typeref:typename:int	file:
musb_gadget_set_self_powered	drivers/usb/musb-new/musb_gadget.c	/^musb_gadget_set_self_powered(struct usb_gadget *gadget, int is_selfpowered)$/;"	f	typeref:typename:int	file:
musb_gadget_set_wedge	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_set_wedge(struct usb_ep *ep)$/;"	f	typeref:typename:int	file:
musb_gadget_setup	drivers/usb/musb-new/musb_gadget.c	/^int __devinit musb_gadget_setup(struct musb *musb)$/;"	f	typeref:typename:int __devinit
musb_gadget_start	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_start(struct usb_gadget *g,$/;"	f	typeref:typename:int	file:
musb_gadget_stop	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_stop(struct usb_gadget *g,$/;"	f	typeref:typename:int	file:
musb_gadget_vbus_draw	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA)$/;"	f	typeref:typename:int	file:
musb_gadget_wakeup	drivers/usb/musb-new/musb_gadget.c	/^static int musb_gadget_wakeup(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
musb_generic_disable	drivers/usb/musb-new/musb_core.c	/^static void musb_generic_disable(struct musb *musb)$/;"	f	typeref:typename:void	file:
musb_giveback	drivers/usb/musb-new/musb_host.c	/^static void musb_giveback(struct musb *musb, struct urb *urb, int status)$/;"	f	typeref:typename:void	file:
musb_glue	drivers/usb/musb-new/pic32.c	/^	void __iomem *musb_glue;$/;"	m	struct:pic32_musb_data	typeref:typename:void __iomem *	file:
musb_h_disable	drivers/usb/musb-new/musb_host.c	/^musb_h_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)$/;"	f	typeref:typename:void	file:
musb_h_ep0_continue	drivers/usb/musb-new/musb_host.c	/^static bool musb_h_ep0_continue(struct musb *musb, u16 len, struct urb *urb)$/;"	f	typeref:typename:bool	file:
musb_h_ep0_flush_fifo	drivers/usb/musb-new/musb_host.c	/^static void musb_h_ep0_flush_fifo(struct musb_hw_ep *ep)$/;"	f	typeref:typename:void	file:
musb_h_ep0_irq	drivers/usb/musb-new/musb_host.c	/^irqreturn_t musb_h_ep0_irq(struct musb *musb)$/;"	f	typeref:typename:irqreturn_t
musb_h_ep0_state	drivers/usb/musb-new/musb_core.h	/^enum musb_h_ep0_state {$/;"	g
musb_h_flush_rxfifo	drivers/usb/musb-new/musb_host.c	/^static u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr)$/;"	f	typeref:typename:u16	file:
musb_h_get_frame_number	drivers/usb/musb-new/musb_host.c	/^static int musb_h_get_frame_number(struct usb_hcd *hcd)$/;"	f	typeref:typename:int	file:
musb_h_start	drivers/usb/musb-new/musb_host.c	/^static int musb_h_start(struct usb_hcd *hcd)$/;"	f	typeref:typename:int	file:
musb_h_stop	drivers/usb/musb-new/musb_host.c	/^static void musb_h_stop(struct usb_hcd *hcd)$/;"	f	typeref:typename:void	file:
musb_h_tx_dma_start	drivers/usb/musb-new/musb_host.c	/^static inline void musb_h_tx_dma_start(struct musb_hw_ep *ep)$/;"	f	typeref:typename:void	file:
musb_h_tx_flush_fifo	drivers/usb/musb-new/musb_host.c	/^static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep)$/;"	f	typeref:typename:void	file:
musb_h_tx_start	drivers/usb/musb-new/musb_host.c	/^static inline void musb_h_tx_start(struct musb_hw_ep *ep)$/;"	f	typeref:typename:void	file:
musb_hc_driver	drivers/usb/musb-new/musb_host.c	/^const struct hc_driver musb_hc_driver = {$/;"	v	typeref:typename:const struct hc_driver
musb_hdrc_config	include/linux/usb/musb.h	/^struct musb_hdrc_config {$/;"	s
musb_hdrc_eps_bits	include/linux/usb/musb.h	/^struct musb_hdrc_eps_bits {$/;"	s
musb_hdrc_platform_data	include/linux/usb/musb.h	/^struct musb_hdrc_platform_data {$/;"	s
musb_hnp_stop	drivers/usb/musb-new/musb_core.c	/^void musb_hnp_stop(struct musb *musb)$/;"	f	typeref:typename:void
musb_host	drivers/usb/musb-new/musb_uboot.c	/^struct musb_host_data musb_host;$/;"	v	typeref:struct:musb_host_data
musb_host_complete_urb	drivers/usb/musb-new/musb_uboot.c	/^static void musb_host_complete_urb(struct urb *urb)$/;"	f	typeref:typename:void	file:
musb_host_data	drivers/usb/musb-new/musb_uboot.h	/^struct musb_host_data {$/;"	s
musb_host_packet_rx	drivers/usb/musb-new/musb_host.c	/^musb_host_packet_rx(struct musb *musb, struct urb *urb, u8 epnum, u8 iso_err)$/;"	f	typeref:typename:bool	file:
musb_host_rx	drivers/usb/musb-new/musb_host.c	/^void musb_host_rx(struct musb *musb, u8 epnum)$/;"	f	typeref:typename:void
musb_host_tx	drivers/usb/musb-new/musb_host.c	/^void musb_host_tx(struct musb *musb, u8 epnum)$/;"	f	typeref:typename:void
musb_hw_ep	drivers/usb/musb-new/musb_core.h	/^struct musb_hw_ep {$/;"	s
musb_idle_timer	drivers/usb/musb-new/omap2430.c	/^static struct timer_list musb_idle_timer;$/;"	v	typeref:struct:timer_list	file:
musb_init	drivers/usb/musb-new/musb_core.c	/^static int __init musb_init(void)$/;"	f	typeref:typename:int __init	file:
musb_init_controller	drivers/usb/musb-new/musb_core.c	/^musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)$/;"	f	typeref:typename:int __devinit	file:
musb_init_debugfs	drivers/usb/musb-new/musb_debug.h	/^static inline int musb_init_debugfs(struct musb *musb)$/;"	f	typeref:typename:int
musb_interface	arch/arm/include/asm/omap_musb.h	/^enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};$/;"	g
musb_interrupt	drivers/usb/musb-new/musb_core.c	/^irqreturn_t musb_interrupt(struct musb *musb)$/;"	f	typeref:typename:irqreturn_t
musb_irq_work	drivers/usb/musb-new/musb_core.c	/^static void musb_irq_work(struct work_struct *data)$/;"	f	typeref:typename:void	file:
musb_ishighspeed	drivers/usb/musb/musb_hcd.h	/^#define musb_ishighspeed(/;"	d
musb_load_testpacket	drivers/usb/musb-new/musb_core.c	/^void musb_load_testpacket(struct musb *musb)$/;"	f	typeref:typename:void
musb_lowlevel_init	drivers/usb/musb-new/musb_uboot.c	/^int musb_lowlevel_init(struct musb_host_data *host)$/;"	f	typeref:typename:int
musb_mode	include/linux/usb/musb.h	/^enum musb_mode {$/;"	g
musb_mode_show	drivers/usb/musb-new/musb_core.c	/^musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf)$/;"	f	typeref:typename:ssize_t	file:
musb_mode_store	drivers/usb/musb-new/musb_core.c	/^musb_mode_store(struct device *dev, struct device_attribute *attr,$/;"	f	typeref:typename:ssize_t	file:
musb_otg_timer_func	drivers/usb/musb-new/musb_core.c	/^void musb_otg_timer_func(unsigned long data)$/;"	f	typeref:typename:void
musb_peri_ep0	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_ack_req	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_ack_req(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_idle	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_idle(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_last	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_last(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_rx	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_rx(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_rx_data_request	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_rx_data_request(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_set_address	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_set_address(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_stall	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_stall(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_tx	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_tx(void)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_tx_data_request	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_tx_data_request(int err)$/;"	f	typeref:typename:void	file:
musb_peri_ep0_zero_data_request	drivers/usb/musb/musb_udc.c	/^static void musb_peri_ep0_zero_data_request(int err)$/;"	f	typeref:typename:void	file:
musb_peri_reset	drivers/usb/musb/musb_udc.c	/^static void musb_peri_reset(void)$/;"	f	typeref:typename:void	file:
musb_peri_resume	drivers/usb/musb/musb_udc.c	/^static void musb_peri_resume(void)$/;"	f	typeref:typename:void	file:
musb_peri_rx	drivers/usb/musb/musb_udc.c	/^static void musb_peri_rx(u16 intr)$/;"	f	typeref:typename:void	file:
musb_peri_rx_ack	drivers/usb/musb/musb_udc.c	/^static void musb_peri_rx_ack(unsigned int ep)$/;"	f	typeref:typename:void	file:
musb_peri_rx_ep	drivers/usb/musb/musb_udc.c	/^static void musb_peri_rx_ep(unsigned int ep)$/;"	f	typeref:typename:void	file:
musb_peri_softconnect	drivers/usb/musb/musb_udc.c	/^static void musb_peri_softconnect(void)$/;"	f	typeref:typename:void	file:
musb_peri_tx	drivers/usb/musb/musb_udc.c	/^static void musb_peri_tx(u16 intr)$/;"	f	typeref:typename:void	file:
musb_peri_tx_ready	drivers/usb/musb/musb_udc.c	/^static void musb_peri_tx_ready(unsigned int ep)$/;"	f	typeref:typename:void	file:
musb_plat	board/logicpd/am3517evm/am3517evm.c	/^static struct musb_hdrc_platform_data musb_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
musb_plat	board/logicpd/omap3som/omap3logic.c	/^static struct musb_hdrc_platform_data musb_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
musb_plat	board/ti/beagle/beagle.c	/^static struct musb_hdrc_platform_data musb_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
musb_plat	drivers/usb/musb-new/sunxi.c	/^static struct musb_hdrc_platform_data musb_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
musb_platform_data	board/amazon/kc1/kc1.c	/^static struct musb_hdrc_platform_data musb_platform_data = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
musb_platform_data	board/lg/sniper/sniper.c	/^static struct musb_hdrc_platform_data musb_platform_data = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
musb_platform_deinit	drivers/usb/musb/am35x.c	/^void musb_platform_deinit(void)$/;"	f	typeref:typename:void
musb_platform_deinit	drivers/usb/musb/blackfin_usb.c	/^void musb_platform_deinit(void)$/;"	f	typeref:typename:void
musb_platform_deinit	drivers/usb/musb/da8xx.c	/^void musb_platform_deinit(void)$/;"	f	typeref:typename:void
musb_platform_deinit	drivers/usb/musb/davinci.c	/^void musb_platform_deinit(void)$/;"	f	typeref:typename:void
musb_platform_deinit	drivers/usb/musb/omap3.c	/^void musb_platform_deinit(void)$/;"	f	typeref:typename:void
musb_platform_disable	drivers/usb/musb-new/musb_core.h	/^static inline void musb_platform_disable(struct musb *musb)$/;"	f	typeref:typename:void
musb_platform_enable	drivers/usb/musb-new/musb_core.h	/^static inline int musb_platform_enable(struct musb *musb)$/;"	f	typeref:typename:int
musb_platform_enable	drivers/usb/musb-new/musb_core.h	/^static inline void musb_platform_enable(struct musb *musb)$/;"	f	typeref:typename:void
musb_platform_exit	drivers/usb/musb-new/musb_core.h	/^static inline int musb_platform_exit(struct musb *musb)$/;"	f	typeref:typename:int
musb_platform_get_vbus_status	drivers/usb/musb-new/musb_core.h	/^static inline int musb_platform_get_vbus_status(struct musb *musb)$/;"	f	typeref:typename:int
musb_platform_init	drivers/usb/musb-new/musb_core.h	/^static inline int musb_platform_init(struct musb *musb)$/;"	f	typeref:typename:int
musb_platform_init	drivers/usb/musb/am35x.c	/^int musb_platform_init(void)$/;"	f	typeref:typename:int
musb_platform_init	drivers/usb/musb/blackfin_usb.c	/^int musb_platform_init(void)$/;"	f	typeref:typename:int
musb_platform_init	drivers/usb/musb/da8xx.c	/^int musb_platform_init(void)$/;"	f	typeref:typename:int
musb_platform_init	drivers/usb/musb/davinci.c	/^int musb_platform_init(void)$/;"	f	typeref:typename:int
musb_platform_init	drivers/usb/musb/omap3.c	/^int musb_platform_init(void)$/;"	f	typeref:typename:int
musb_platform_ops	drivers/usb/musb-new/musb_core.h	/^struct musb_platform_ops {$/;"	s
musb_platform_set_mode	drivers/usb/musb-new/musb_core.h	/^static inline int musb_platform_set_mode(struct musb *musb, u8 mode)$/;"	f	typeref:typename:int
musb_platform_set_vbus	drivers/usb/musb-new/musb_core.h	/^static inline void musb_platform_set_vbus(struct musb *musb, int is_on)$/;"	f	typeref:typename:void
musb_platform_try_idle	drivers/usb/musb-new/musb_core.h	/^static inline void musb_platform_try_idle(struct musb *musb,$/;"	f	typeref:typename:void
musb_poll_int_queue	drivers/usb/musb-new/musb_uboot.c	/^static void *musb_poll_int_queue(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:void *	file:
musb_port_reset	drivers/usb/musb/musb_hcd.c	/^static void musb_port_reset(int do_reset)$/;"	f	typeref:typename:void	file:
musb_print_config	drivers/usb/musb/musb_debug.h	/^#define musb_print_config(/;"	d
musb_print_config	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_config(u8 b)$/;"	f	typeref:typename:void
musb_print_csr0	drivers/usb/musb/musb_debug.h	/^#define musb_print_csr0(/;"	d
musb_print_csr0	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_csr0(u16 w)$/;"	f	typeref:typename:void
musb_print_devctl	drivers/usb/musb/musb_debug.h	/^#define musb_print_devctl(/;"	d
musb_print_devctl	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_devctl(u8 b)$/;"	f	typeref:typename:void
musb_print_intrrx	drivers/usb/musb/musb_debug.h	/^#define musb_print_intrrx(/;"	d
musb_print_intrrx	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_intrrx(u16 w)$/;"	f	typeref:typename:void
musb_print_intrtx	drivers/usb/musb/musb_debug.h	/^#define musb_print_intrtx(/;"	d
musb_print_intrtx	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_intrtx(u16 w)$/;"	f	typeref:typename:void
musb_print_intrusb	drivers/usb/musb/musb_debug.h	/^#define musb_print_intrusb(/;"	d
musb_print_intrusb	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_intrusb(u8 b)$/;"	f	typeref:typename:void
musb_print_pwr	drivers/usb/musb/musb_debug.h	/^#define musb_print_pwr(/;"	d
musb_print_pwr	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_pwr(u8 b)$/;"	f	typeref:typename:void
musb_print_rxcsr	drivers/usb/musb/musb_debug.h	/^#define musb_print_rxcsr(/;"	d
musb_print_rxcsr	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_rxcsr(u16 w)$/;"	f	typeref:typename:void
musb_print_rxmaxp	drivers/usb/musb/musb_debug.h	/^#define musb_print_rxmaxp(/;"	d
musb_print_rxmaxp	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_rxmaxp(u16 w)$/;"	f	typeref:typename:void
musb_print_txcsr	drivers/usb/musb/musb_debug.h	/^#define musb_print_txcsr(/;"	d
musb_print_txcsr	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_txcsr(u16 w)$/;"	f	typeref:typename:void
musb_print_txmaxp	drivers/usb/musb/musb_debug.h	/^#define musb_print_txmaxp(/;"	d
musb_print_txmaxp	drivers/usb/musb/musb_debug.h	/^static inline void musb_print_txmaxp(u16 w)$/;"	f	typeref:typename:void
musb_probe	drivers/usb/musb-new/musb_core.c	/^static int __devinit musb_probe(struct platform_device *pdev)$/;"	f	typeref:typename:int __devinit	file:
musb_pullup	drivers/usb/musb-new/musb_gadget.c	/^static void musb_pullup(struct musb *musb, int is_on)$/;"	f	typeref:typename:void	file:
musb_qh	drivers/usb/musb-new/musb_host.h	/^struct musb_qh {$/;"	s
musb_read_configdata	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_configdata(void __iomem *mbase)$/;"	f	typeref:typename:u8
musb_read_fifo	drivers/usb/musb-new/am35x.c	/^void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)$/;"	f	typeref:typename:void
musb_read_fifo	drivers/usb/musb-new/musb_core.c	/^void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)$/;"	f	typeref:typename:void
musb_read_fifo	drivers/usb/musb-new/pic32.c	/^void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)$/;"	f	typeref:typename:void
musb_read_fifosize	drivers/usb/musb-new/musb_core.h	/^static inline int musb_read_fifosize(struct musb *musb,$/;"	f	typeref:typename:int
musb_read_hwvers	drivers/usb/musb-new/musb_regs.h	/^static inline u16 musb_read_hwvers(void __iomem *mbase)$/;"	f	typeref:typename:u16
musb_read_rxfifoadd	drivers/usb/musb-new/musb_regs.h	/^static inline u16  musb_read_rxfifoadd(void __iomem *mbase)$/;"	f	typeref:typename:u16
musb_read_rxfifosz	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_rxfifosz(void __iomem *mbase)$/;"	f	typeref:typename:u8
musb_read_rxfunaddr	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_rxhubaddr	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_rxhubport	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_setup	drivers/usb/musb-new/musb_gadget_ep0.c	/^musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req)$/;"	f	typeref:typename:void	file:
musb_read_target_reg_base	drivers/usb/musb-new/musb_regs.h	/^static inline void __iomem *musb_read_target_reg_base(u8 i, void __iomem *mbase)$/;"	f	typeref:typename:void __iomem *
musb_read_txfifoadd	drivers/usb/musb-new/musb_regs.h	/^static inline u16 musb_read_txfifoadd(void __iomem *mbase)$/;"	f	typeref:typename:u16
musb_read_txfifosz	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_txfifosz(void __iomem *mbase)$/;"	f	typeref:typename:u8
musb_read_txfunaddr	drivers/usb/musb-new/musb_regs.h	/^static inline u8  musb_read_txfunaddr(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_txhubaddr	drivers/usb/musb-new/musb_regs.h	/^static inline u8  musb_read_txhubaddr(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_txhubport	drivers/usb/musb-new/musb_regs.h	/^static inline u8  musb_read_txhubport(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_txhubport	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)$/;"	f	typeref:typename:u8
musb_read_ulpi_buscontrol	drivers/usb/musb-new/musb_regs.h	/^static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)$/;"	f	typeref:typename:u8
musb_read_ulpi_buscontrol	drivers/usb/musb/musb_core.h	/^static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)$/;"	f	typeref:typename:u8
musb_readb	drivers/usb/musb-new/musb_io.h	/^static inline u8 musb_readb(const void __iomem *addr, unsigned offset)$/;"	f	typeref:typename:u8
musb_readl	drivers/usb/musb-new/musb_io.h	/^static inline u32 musb_readl(const void __iomem *addr, unsigned offset)$/;"	f	typeref:typename:u32
musb_readw	drivers/usb/musb-new/musb_io.h	/^static inline u16 musb_readw(const void __iomem *addr, unsigned offset)$/;"	f	typeref:typename:u16
musb_register	drivers/usb/musb-new/musb_uboot.c	/^int musb_register(struct musb_hdrc_platform_data *plat, void *bdata,$/;"	f	typeref:typename:int
musb_regs	drivers/usb/musb/blackfin_usb.h	/^#define musb_regs /;"	d
musb_regs	drivers/usb/musb/blackfin_usb.h	/^struct musb_regs {$/;"	s
musb_regs	drivers/usb/musb/musb_core.h	/^struct musb_regs {$/;"	s
musb_remove	drivers/usb/musb-new/musb_core.c	/^static int __devexit musb_remove(struct platform_device *pdev)$/;"	f	typeref:typename:int __devexit	file:
musb_request	drivers/usb/musb-new/musb_gadget.h	/^struct musb_request {$/;"	s
musb_reset_root_port	drivers/usb/musb-new/musb_uboot.c	/^static int musb_reset_root_port(struct udevice *dev, struct usb_device *udev)$/;"	f	typeref:typename:int	file:
musb_restore_context	drivers/usb/musb-new/musb_core.c	/^static void musb_restore_context(struct musb *musb)$/;"	f	typeref:typename:void	file:
musb_resume_noirq	drivers/usb/musb-new/musb_core.c	/^static int musb_resume_noirq(struct device *dev)$/;"	f	typeref:typename:int	file:
musb_rh_init	drivers/usb/musb/musb_hcd.c	/^static void musb_rh_init(void) {}$/;"	f	typeref:typename:void	file:
musb_rh_init	drivers/usb/musb/musb_hcd.c	/^static void musb_rh_init(void)$/;"	f	typeref:typename:void	file:
musb_runtime_resume	drivers/usb/musb-new/musb_core.c	/^static int musb_runtime_resume(struct device *dev)$/;"	f	typeref:typename:int	file:
musb_runtime_suspend	drivers/usb/musb-new/musb_core.c	/^static int musb_runtime_suspend(struct device *dev)$/;"	f	typeref:typename:int	file:
musb_rx_reinit	drivers/usb/musb-new/musb_host.c	/^musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)$/;"	f	typeref:typename:void	file:
musb_save_context	drivers/usb/musb-new/musb_core.c	/^static void musb_save_context(struct musb *musb)$/;"	f	typeref:typename:void	file:
musb_save_toggle	drivers/usb/musb-new/musb_host.c	/^static inline void musb_save_toggle(struct musb_qh *qh, int is_in,$/;"	f	typeref:typename:void	file:
musb_schedule	drivers/usb/musb-new/musb_host.c	/^static int musb_schedule($/;"	f	typeref:typename:int	file:
musb_shutdown	drivers/usb/musb-new/musb_core.c	/^static void musb_shutdown(struct platform_device *pdev)$/;"	f	typeref:typename:void	file:
musb_speed	drivers/usb/musb/musb_core.h	/^	u8			musb_speed;$/;"	m	struct:musb_config	typeref:typename:u8
musb_srp_store	drivers/usb/musb-new/musb_core.c	/^musb_srp_store(struct device *dev, struct device_attribute *attr,$/;"	f	typeref:typename:ssize_t	file:
musb_stage0_irq	drivers/usb/musb-new/musb_core.c	/^static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,$/;"	f	typeref:typename:irqreturn_t	file:
musb_start	drivers/usb/musb-new/musb_core.c	/^void musb_start(struct musb *musb)$/;"	f	typeref:typename:void
musb_start	drivers/usb/musb/musb_core.c	/^void musb_start(void)$/;"	f	typeref:typename:void
musb_start_urb	drivers/usb/musb-new/musb_host.c	/^musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh)$/;"	f	typeref:typename:void	file:
musb_stop	drivers/usb/musb-new/musb_core.c	/^void musb_stop(struct musb *musb)$/;"	f	typeref:typename:void
musb_submit_bulk_msg	drivers/usb/musb-new/musb_uboot.c	/^static int musb_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
musb_submit_control_msg	drivers/usb/musb-new/musb_uboot.c	/^static int musb_submit_control_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
musb_submit_int_msg	drivers/usb/musb-new/musb_uboot.c	/^static int musb_submit_int_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
musb_submit_rh_msg	drivers/usb/musb/musb_hcd.c	/^static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
musb_suspend	drivers/usb/musb-new/musb_core.c	/^static int musb_suspend(struct device *dev)$/;"	f	typeref:typename:int	file:
musb_tar_regs	drivers/usb/musb/blackfin_usb.h	/^	struct musb_tar_regs {$/;"	s	struct:musb_regs
musb_tar_regs	drivers/usb/musb/musb_core.h	/^	struct musb_tar_regs {$/;"	s	struct:musb_regs
musb_test_packet	drivers/usb/musb-new/musb_core.c	/^static const u8 musb_test_packet[53] = {$/;"	v	typeref:typename:const u8[53]	file:
musb_to_hcd	drivers/usb/musb-new/musb_host.h	/^static inline struct usb_hcd *musb_to_hcd(struct musb *musb)$/;"	f	typeref:struct:usb_hcd *
musb_try_b_hnp_enable	drivers/usb/musb-new/musb_gadget_ep0.c	/^static inline void musb_try_b_hnp_enable(struct musb *musb)$/;"	f	typeref:typename:void	file:
musb_tx_dma_program	drivers/usb/musb-new/musb_host.c	/^static bool musb_tx_dma_program(struct dma_controller *dma,$/;"	f	typeref:typename:bool	file:
musb_ulpi_access	drivers/usb/musb-new/musb_core.c	/^static struct usb_phy_io_ops musb_ulpi_access = {$/;"	v	typeref:struct:usb_phy_io_ops	file:
musb_ulpi_read	drivers/usb/musb-new/musb_core.c	/^#define musb_ulpi_read	/;"	d	file:
musb_ulpi_read	drivers/usb/musb-new/musb_core.c	/^static int musb_ulpi_read(struct usb_phy *phy, u32 offset)$/;"	f	typeref:typename:int	file:
musb_ulpi_write	drivers/usb/musb-new/musb_core.c	/^#define musb_ulpi_write	/;"	d	file:
musb_ulpi_write	drivers/usb/musb-new/musb_core.c	/^static int musb_ulpi_write(struct usb_phy *phy, u32 offset, u32 data)$/;"	f	typeref:typename:int	file:
musb_urb_dequeue	drivers/usb/musb-new/musb_host.c	/^static int musb_urb_dequeue($/;"	f	typeref:typename:int	file:
musb_urb_enqueue	drivers/usb/musb-new/musb_host.c	/^static int musb_urb_enqueue($/;"	f	typeref:typename:int	file:
musb_usb_ops	drivers/usb/musb-new/musb_uboot.c	/^struct dm_usb_ops musb_usb_ops = {$/;"	v	typeref:struct:dm_usb_ops
musb_usb_probe	drivers/usb/musb-new/pic32.c	/^static int musb_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
musb_usb_probe	drivers/usb/musb-new/sunxi.c	/^static int musb_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
musb_usb_remove	drivers/usb/musb-new/pic32.c	/^static int musb_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
musb_usb_remove	drivers/usb/musb-new/sunxi.c	/^static int musb_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
musb_vbus_show	drivers/usb/musb-new/musb_core.c	/^musb_vbus_show(struct device *dev, struct device_attribute *attr, char *buf)$/;"	f	typeref:typename:ssize_t	file:
musb_vbus_store	drivers/usb/musb-new/musb_core.c	/^musb_vbus_store(struct device *dev, struct device_attribute *attr,$/;"	f	typeref:typename:ssize_t	file:
musb_write_fifo	drivers/usb/musb-new/musb_core.c	/^void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)$/;"	f	typeref:typename:void
musb_write_rxfifoadd	drivers/usb/musb-new/musb_regs.h	/^static inline void  musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)$/;"	f	typeref:typename:void
musb_write_rxfifosz	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size)$/;"	f	typeref:typename:void
musb_write_rxfunaddr	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_rxfunaddr(void __iomem *ep_target_regs,$/;"	f	typeref:typename:void
musb_write_rxhubaddr	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_rxhubaddr(void __iomem *ep_target_regs,$/;"	f	typeref:typename:void
musb_write_rxhubport	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_rxhubport(void __iomem *ep_target_regs,$/;"	f	typeref:typename:void
musb_write_txfifoadd	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off)$/;"	f	typeref:typename:void
musb_write_txfifosz	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size)$/;"	f	typeref:typename:void
musb_write_txfunaddr	drivers/usb/musb-new/musb_regs.h	/^static inline void  musb_write_txfunaddr(void __iomem *mbase, u8 epnum,$/;"	f	typeref:typename:void
musb_write_txhubaddr	drivers/usb/musb-new/musb_regs.h	/^static inline void  musb_write_txhubaddr(void __iomem *mbase, u8 epnum,$/;"	f	typeref:typename:void
musb_write_txhubport	drivers/usb/musb-new/musb_regs.h	/^static inline void  musb_write_txhubport(void __iomem *mbase, u8 epnum,$/;"	f	typeref:typename:void
musb_write_ulpi_buscontrol	drivers/usb/musb-new/musb_regs.h	/^static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val)$/;"	f	typeref:typename:void
musb_write_ulpi_buscontrol	drivers/usb/musb/musb_core.h	/^static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)$/;"	f	typeref:typename:void
musb_writeb	drivers/usb/musb-new/musb_io.h	/^static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data)$/;"	f	typeref:typename:void
musb_writel	drivers/usb/musb-new/musb_io.h	/^static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data)$/;"	f	typeref:typename:void
musb_writew	drivers/usb/musb-new/musb_io.h	/^static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data)$/;"	f	typeref:typename:void
musbr	drivers/usb/musb/musb_core.c	/^struct musb_regs *musbr;$/;"	v	typeref:struct:musb_regs *
mutate_func	test/compression.c	/^typedef int (*mutate_func)(void *, unsigned long, void *, unsigned long,$/;"	t	typeref:typename:int (*)(void *,unsigned long,void *,unsigned long,unsigned long *)	file:
mutex	drivers/mtd/ubi/ubi.h	/^	struct rw_semaphore mutex;$/;"	m	struct:ubi_ltree_entry	typeref:struct:rw_semaphore
mutex	include/linux/compat.h	/^struct mutex { int i; };$/;"	s
mutex	include/linux/mtd/flashchip.h	/^	struct mutex mutex;$/;"	m	struct:flchip	typeref:struct:mutex
mutex_init	include/linux/compat.h	/^#define mutex_init(/;"	d
mutex_is_locked	fs/ubifs/ubifs.h	/^#define mutex_is_locked(/;"	d
mutex_lock	include/linux/compat.h	/^#define mutex_lock(/;"	d
mutex_lock_nested	fs/ubifs/ubifs.h	/^#define mutex_lock_nested(/;"	d
mutex_unlock	include/linux/compat.h	/^#define mutex_unlock(/;"	d
mutex_unlock_nested	fs/ubifs/ubifs.h	/^#define mutex_unlock_nested(/;"	d
mux	arch/arm/cpu/arm926ejs/lpc32xx/devices.c	/^static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;$/;"	v	typeref:struct:mux_regs *	file:
mux	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^	u32 mux;$/;"	m	struct:clk_synth	typeref:typename:u32
mux	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^	dv_reg		*mux;		\/* Address of mux register *\/$/;"	m	struct:pinmux_config	typeref:typename:dv_reg *
mux	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned int mux;$/;"	m	struct:gpio_port_s	typeref:typename:unsigned int
mux	drivers/clk/uniphier/clk-uniphier.h	/^	const struct uniphier_clk_mux_data *mux;$/;"	m	struct:uniphier_clk_data	typeref:typename:const struct uniphier_clk_mux_data *
mux	drivers/usb/musb-new/musb_host.h	/^	u8			mux;		\/* qh multiplexed to hw_ep *\/$/;"	m	struct:musb_qh	typeref:typename:u8
mux	include/ec_commands.h	/^	uint8_t mux;$/;"	m	struct:ec_params_usb_mux	typeref:typename:uint8_t
mux	include/i2c.h	/^	struct i2c_mux		mux;$/;"	m	struct:i2c_next_hop	typeref:struct:i2c_mux
mux1	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux1;		\/* offset 0x100 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux10	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux10;		\/* offset 0x124 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux11	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux11;		\/* offset 0x128 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux12	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux12;		\/* offset 0x12c *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux13	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux13;		\/* offset 0x130 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux2	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux2;		\/* offset 0x104 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux3	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux3;		\/* offset 0x108 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux4	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux4;		\/* offset 0x10c *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux5	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux5;		\/* offset 0x110 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux6	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux6;		\/* offset 0x114 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux7	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux7;		\/* offset 0x118 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux8	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux8;		\/* offset 0x11c *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux9	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 mux9;		\/* offset 0x120 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
mux_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 mux_ctrl;			\/* 0x200 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
mux_ctrl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 mux_ctrl;			\/* 0x200 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
mux_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 mux_ctrl;			\/* 0x200 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
mux_ctrl	arch/arm/include/asm/arch/display2.h	/^	u32 mux_ctrl;			\/* 0x200 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
mux_data	drivers/phy/marvell/comphy.h	/^	struct comphy_mux_data *mux_data;$/;"	m	struct:chip_serdes_phy_config	typeref:struct:comphy_mux_data *
mux_in	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_in_mux *mux_in; \/* mux input function *\/$/;"	m	struct:pic32_pinctrl_priv	typeref:struct:pic32_reg_in_mux *	file:
mux_out	drivers/pinctrl/pinctrl_pic32.c	/^	void __iomem *mux_out;	\/* mux output function *\/$/;"	m	struct:pic32_pinctrl_priv	typeref:typename:void __iomem *	file:
mux_regs	arch/arm/include/asm/arch-lpc32xx/mux.h	/^struct mux_regs {$/;"	s
mux_sel	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	mux_sel[6];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[6]	file:
mux_sel	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	mux_sel[7];$/;"	m	struct:exynos7420_clk_cmu_top0	typeref:typename:unsigned int[7]	file:
mux_sel	drivers/ddr/altera/sequencer.h	/^	u32	mux_sel;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
mux_spi2	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 mux_spi2;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
mux_stat_cam1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cam1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cdrex;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cdrex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_core1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_core1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_cperi1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cperi1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cpu;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cpu;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cpu;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_cpu;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_dmc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_dmc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_g3d;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_g3d;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_image	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_image;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_kfc;		\/* 0x10038400 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_leftbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_leftbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_lex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_lex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_mfc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_mfc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_rightbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_rightbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
mux_stat_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top0;		\/* 0x10020400 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
mux_stat_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_top10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top10;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top11	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top11;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top12	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top12;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_top3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
mux_stat_top4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_stat_top7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	mux_stat_top7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
mux_synctimer32k_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	mux_synctimer32k_ck: mux_synctimer32k_ck {$/;"	l
mux_value	drivers/phy/marvell/comphy.h	/^	u32 mux_value;$/;"	m	struct:comphy_mux_options	typeref:typename:u32
mux_values	drivers/phy/marvell/comphy.h	/^	struct comphy_mux_options mux_values[MAX_LANE_OPTIONS];$/;"	m	struct:comphy_mux_data	typeref:struct:comphy_mux_options[]
muxval	board/freescale/corenet_ds/eth_p4080.c	/^	u32 muxval;$/;"	m	struct:p4080ds_mdio	typeref:typename:u32	file:
muxval	board/freescale/ls1043aqds/eth.c	/^	u8 muxval;$/;"	m	struct:ls1043aqds_mdio	typeref:typename:u8	file:
muxval	board/freescale/ls1046aqds/eth.c	/^	u8 muxval;$/;"	m	struct:ls1046aqds_mdio	typeref:typename:u8	file:
muxval	board/freescale/ls2080aqds/eth.c	/^	u8 muxval;$/;"	m	struct:ls2080a_qds_mdio	typeref:typename:u8	file:
muxval	board/freescale/t102xqds/eth_t102xqds.c	/^	u8 muxval;$/;"	m	struct:t1024qds_mdio	typeref:typename:u8	file:
muxval	board/freescale/t1040qds/eth.c	/^	u8 muxval;$/;"	m	struct:t1040_qds_mdio	typeref:typename:u8	file:
muxval	board/freescale/t208xqds/eth_t208xqds.c	/^	u8 muxval;$/;"	m	struct:t208xqds_mdio	typeref:typename:u8	file:
muxval	board/freescale/t4qds/eth.c	/^	u8 muxval;$/;"	m	struct:t4240qds_mdio	typeref:typename:u8	file:
muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	const int *muxvals;$/;"	m	struct:uniphier_pinctrl_group	typeref:typename:const int *
mv88E1118_PAGE_REG	board/keymile/kmp204x/eth.c	/^#define mv88E1118_PAGE_REG	/;"	d	file:
mv88e609x_driver	drivers/net/phy/mv88e61xx.c	/^static struct phy_driver mv88e609x_driver = {$/;"	v	typeref:struct:phy_driver	file:
mv88e61xx_6352_family	drivers/net/phy/mv88e61xx.c	/^static bool mv88e61xx_6352_family(struct phy_device *phydev)$/;"	f	typeref:typename:bool	file:
mv88e61xx_driver	drivers/net/phy/mv88e61xx.c	/^static struct phy_driver mv88e61xx_driver = {$/;"	v	typeref:struct:phy_driver	file:
mv88e61xx_fixed_port_setup	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_fixed_port_setup(struct phy_device *phydev, u8 port)$/;"	f	typeref:typename:int	file:
mv88e61xx_get_cmode	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_get_cmode(struct phy_device *phydev, u8 port)$/;"	f	typeref:typename:int	file:
mv88e61xx_get_switch_id	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_get_switch_id(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_hw_reset	drivers/net/phy/mv88e61xx.c	/^__weak int mv88e61xx_hw_reset(struct phy_device *phydev)$/;"	f	typeref:typename:__weak int
mv88e61xx_parse_status	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_config	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_config_port	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_config_port(struct phy_device *phydev, u8 phy)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_enable	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_enable(struct phy_device *phydev, u8 phy)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_is_connected	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_is_connected(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_priv	drivers/net/phy/mv88e61xx.c	/^struct mv88e61xx_phy_priv {$/;"	s	file:
mv88e61xx_phy_read	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_read(struct phy_device *phydev, int phy, int reg)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_read_indirect	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_read_indirect(struct mii_dev *smi_wrapper, int dev,$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_setup	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_setup(struct phy_device *phydev, u8 phy)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_startup	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_wait	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_wait(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_write	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_write(struct phy_device *phydev, int phy,$/;"	f	typeref:typename:int	file:
mv88e61xx_phy_write_indirect	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_phy_write_indirect(struct mii_dev *smi_wrapper, int dev,$/;"	f	typeref:typename:int	file:
mv88e61xx_port_enable	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_port_enable(struct phy_device *phydev, u8 port)$/;"	f	typeref:typename:int	file:
mv88e61xx_port_read	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_port_read(struct phy_device *phydev, u8 port, u8 reg)$/;"	f	typeref:typename:int	file:
mv88e61xx_port_set_vlan	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_port_set_vlan(struct phy_device *phydev, u8 port,$/;"	f	typeref:typename:int	file:
mv88e61xx_port_write	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_port_write(struct phy_device *phydev, u8 port, u8 reg,$/;"	f	typeref:typename:int	file:
mv88e61xx_probe	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_probe(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_read_port_config	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_read_port_config(struct phy_device *phydev, u8 port)$/;"	f	typeref:typename:int	file:
mv88e61xx_reg_read	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_reg_read(struct phy_device *phydev, int dev, int reg)$/;"	f	typeref:typename:int	file:
mv88e61xx_reg_write	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_reg_write(struct phy_device *phydev, int dev, int reg,$/;"	f	typeref:typename:int	file:
mv88e61xx_serdes_init	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_serdes_init(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_set_cpu_port	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_set_cpu_port(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_set_page	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_set_page(struct phy_device *phydev, u8 phy, u8 page)$/;"	f	typeref:typename:int	file:
mv88e61xx_smi_wait	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_smi_wait(struct mii_dev *bus, int smi_addr)$/;"	f	typeref:typename:int	file:
mv88e61xx_switch_init	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_switch_init(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e61xx_switch_reset	drivers/net/phy/mv88e61xx.c	/^static int mv88e61xx_switch_reset(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mv88e_sw_program	drivers/net/phy/mv88e6352.c	/^int mv88e_sw_program(const char *devname, u8 phy_addr,$/;"	f	typeref:typename:int
mv88e_sw_reg	include/mv88e6352.h	/^struct mv88e_sw_reg {$/;"	s
mv88e_sw_reset	drivers/net/phy/mv88e6352.c	/^int mv88e_sw_reset(const char *devname, u8 phy_addr)$/;"	f	typeref:typename:int
mv_ata_exec_ata_cmd	drivers/block/sata_mv.c	/^static int mv_ata_exec_ata_cmd(int port, struct sata_fis_h2d *cfis,$/;"	f	typeref:typename:int	file:
mv_ata_exec_ata_cmd_nondma	drivers/block/sata_mv.c	/^static int mv_ata_exec_ata_cmd_nondma(int port,$/;"	f	typeref:typename:int	file:
mv_board_id_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 mv_board_id_get(void)$/;"	f	typeref:typename:u32
mv_board_id_index_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 mv_board_id_index_get(u32 board_id)$/;"	f	typeref:typename:u32
mv_board_tclk_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 mv_board_tclk_get(void)$/;"	f	typeref:typename:u32
mv_command	drivers/ddr/marvell/a38x/xor.h	/^enum mv_command {$/;"	g
mv_command	drivers/ddr/marvell/axp/xor.h	/^enum mv_command {$/;"	g
mv_ctrl_rev_get	drivers/ddr/marvell/axp/ddr3_init.c	/^u8 mv_ctrl_rev_get(void)$/;"	f	typeref:typename:u8
mv_i2c	drivers/i2c/mv_i2c.c	/^struct mv_i2c {$/;"	s	file:
mv_i2c_ids	drivers/i2c/mv_i2c.c	/^static const struct udevice_id mv_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mv_i2c_msg	drivers/i2c/mv_i2c.c	/^struct mv_i2c_msg {$/;"	s	file:
mv_i2c_ops	drivers/i2c/mv_i2c.c	/^static const struct dm_i2c_ops mv_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
mv_i2c_priv	drivers/i2c/mv_i2c.c	/^struct mv_i2c_priv {$/;"	s	file:
mv_i2c_probe	drivers/i2c/mv_i2c.c	/^static int mv_i2c_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
mv_i2c_set_bus_speed	drivers/i2c/mv_i2c.c	/^static int mv_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int	file:
mv_i2c_xfer	drivers/i2c/mv_i2c.c	/^static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)$/;"	f	typeref:typename:int	file:
mv_op	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^enum mv_op {$/;"	g
mv_ops	drivers/mmc/mv_sdhci.c	/^static struct sdhci_ops mv_ops;$/;"	v	typeref:struct:sdhci_ops	file:
mv_phy_88e1116_init	board/LaCie/common/common.c	/^void mv_phy_88e1116_init(const char *name, u16 phyaddr)$/;"	f	typeref:typename:void
mv_phy_88e1116_init	board/Marvell/dreamplug/dreamplug.c	/^void mv_phy_88e1116_init(char *name)$/;"	f	typeref:typename:void
mv_phy_88e1121_init	board/Marvell/guruplug/guruplug.c	/^void mv_phy_88e1121_init(char *name)$/;"	f	typeref:typename:void
mv_phy_88e1318_init	board/LaCie/common/common.c	/^void mv_phy_88e1318_init(const char *name, u16 phyaddr)$/;"	f	typeref:typename:void
mv_phy_init	board/Marvell/openrd/openrd.c	/^void mv_phy_init(char *name)$/;"	f	typeref:typename:void
mv_priv	drivers/block/sata_mv.c	/^struct mv_priv {$/;"	s	file:
mv_reset_channel	drivers/block/sata_mv.c	/^static int mv_reset_channel(int port)$/;"	f	typeref:typename:int	file:
mv_reset_one_hc	drivers/block/sata_mv.c	/^static void mv_reset_one_hc(void)$/;"	f	typeref:typename:void	file:
mv_reset_port	drivers/block/sata_mv.c	/^static void mv_reset_port(int port)$/;"	f	typeref:typename:void	file:
mv_sata_identify	drivers/block/sata_mv.c	/^static int mv_sata_identify(int port, u16 *id)$/;"	f	typeref:typename:int	file:
mv_sata_rw_cmd	drivers/block/sata_mv.c	/^static u32 mv_sata_rw_cmd(int port, lbaint_t start, u32 blkcnt, u8 *buffer,$/;"	f	typeref:typename:u32	file:
mv_sata_rw_cmd_ext	drivers/block/sata_mv.c	/^static u32 mv_sata_rw_cmd_ext(int port, lbaint_t start, u32 blkcnt,$/;"	f	typeref:typename:u32	file:
mv_sata_set_features	drivers/block/sata_mv.c	/^static void mv_sata_set_features(int port)$/;"	f	typeref:typename:void	file:
mv_sata_spin_down	drivers/block/sata_mv.c	/^int mv_sata_spin_down(int dev)$/;"	f	typeref:typename:int
mv_sata_spin_up	drivers/block/sata_mv.c	/^int mv_sata_spin_up(int dev)$/;"	f	typeref:typename:int
mv_sata_xfer_mode	drivers/block/sata_mv.c	/^static void mv_sata_xfer_mode(int port, u16 *id)$/;"	f	typeref:typename:void	file:
mv_sdh_init	drivers/mmc/mv_sdhci.c	/^int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)$/;"	f	typeref:typename:int
mv_sdhci_writeb	drivers/mmc/mv_sdhci.c	/^#define mv_sdhci_writeb	/;"	d	file:
mv_sdhci_writeb	drivers/mmc/mv_sdhci.c	/^static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)$/;"	f	typeref:typename:void	file:
mv_seq_exec	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^int mv_seq_exec(u32 serdes_num, u32 seq_id)$/;"	f	typeref:typename:int
mv_start_edma_engine	drivers/block/sata_mv.c	/^static int mv_start_edma_engine(int port)$/;"	f	typeref:typename:int	file:
mv_state	drivers/ddr/marvell/a38x/xor.h	/^enum mv_state {$/;"	g
mv_state	drivers/ddr/marvell/axp/xor.h	/^enum mv_state {$/;"	g
mv_stop_edma_engine	drivers/block/sata_mv.c	/^static int mv_stop_edma_engine(int port)$/;"	f	typeref:typename:int	file:
mv_sys_xor_finish	drivers/ddr/marvell/a38x/xor.c	/^void mv_sys_xor_finish(void)$/;"	f	typeref:typename:void
mv_sys_xor_finish	drivers/ddr/marvell/axp/xor.c	/^void mv_sys_xor_finish(void)$/;"	f	typeref:typename:void
mv_sys_xor_init	drivers/ddr/marvell/a38x/xor.c	/^void mv_sys_xor_init(u32 num_of_cs, u32 cs_ena, u32 cs_size, u32 base_delta)$/;"	f	typeref:typename:void
mv_sys_xor_init	drivers/ddr/marvell/axp/xor.c	/^void mv_sys_xor_init(MV_DRAM_INFO *dram_info)$/;"	f	typeref:typename:void
mv_xor_cmd_set	drivers/ddr/marvell/axp/xor.c	/^static int mv_xor_cmd_set(u32 chan, int command)$/;"	f	typeref:typename:int	file:
mv_xor_command_set	drivers/ddr/marvell/a38x/xor.c	/^int mv_xor_command_set(u32 chan, enum mv_command command)$/;"	f	typeref:typename:int
mv_xor_ctrl_set	drivers/ddr/marvell/a38x/xor.c	/^int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl)$/;"	f	typeref:typename:int
mv_xor_ctrl_set	drivers/ddr/marvell/axp/xor.c	/^static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl)$/;"	f	typeref:typename:int	file:
mv_xor_finish2	arch/arm/mach-mvebu/dram.c	/^static void mv_xor_finish2(void)$/;"	f	typeref:typename:void	file:
mv_xor_hal_init	drivers/ddr/marvell/a38x/xor.c	/^void mv_xor_hal_init(u32 xor_chan_num)$/;"	f	typeref:typename:void
mv_xor_hal_init	drivers/ddr/marvell/axp/xor.c	/^void mv_xor_hal_init(u32 chan_num)$/;"	f	typeref:typename:void
mv_xor_init2	arch/arm/mach-mvebu/dram.c	/^static void mv_xor_init2(u32 cs)$/;"	f	typeref:typename:void	file:
mv_xor_mem_init	drivers/ddr/marvell/a38x/xor.c	/^int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size,$/;"	f	typeref:typename:int
mv_xor_mem_init	drivers/ddr/marvell/axp/xor.c	/^int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high,$/;"	f	typeref:typename:int
mv_xor_state_get	drivers/ddr/marvell/a38x/xor.c	/^enum mv_state mv_xor_state_get(u32 chan)$/;"	f	typeref:enum:mv_state
mv_xor_state_get	drivers/ddr/marvell/axp/xor.c	/^int mv_xor_state_get(u32 chan)$/;"	f	typeref:typename:int
mv_xor_transfer	drivers/ddr/marvell/axp/xor.c	/^int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr)$/;"	f	typeref:typename:int
mvebu_ahci_ids	arch/arm/mach-mvebu/sata.c	/^static const struct udevice_id mvebu_ahci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvebu_ahci_probe	arch/arm/mach-mvebu/sata.c	/^static int mvebu_ahci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvebu_config_gpio	arch/arm/mach-mvebu/gpio.c	/^void mvebu_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val,$/;"	f	typeref:typename:void
mvebu_config_mbus_bridge	arch/arm/mach-mvebu/mbus.c	/^static void mvebu_config_mbus_bridge(struct mvebu_mbus_state *mbus)$/;"	f	typeref:typename:void	file:
mvebu_get_nand_clock	arch/arm/mach-mvebu/cpu.c	/^u32 mvebu_get_nand_clock(void)$/;"	f	typeref:typename:u32
mvebu_get_port_lane	drivers/pci/pci_mvebu.c	/^static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx,$/;"	f	typeref:typename:void	file:
mvebu_gpio_direction_input	drivers/gpio/mvebu_gpio.c	/^static int mvebu_gpio_direction_input(struct udevice *dev, unsigned int gpio)$/;"	f	typeref:typename:int	file:
mvebu_gpio_direction_output	drivers/gpio/mvebu_gpio.c	/^static int mvebu_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
mvebu_gpio_get_function	drivers/gpio/mvebu_gpio.c	/^static int mvebu_gpio_get_function(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
mvebu_gpio_get_value	drivers/gpio/mvebu_gpio.c	/^static int mvebu_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
mvebu_gpio_ids	drivers/gpio/mvebu_gpio.c	/^static const struct udevice_id mvebu_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvebu_gpio_ops	drivers/gpio/mvebu_gpio.c	/^static const struct dm_gpio_ops mvebu_gpio_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
mvebu_gpio_priv	drivers/gpio/mvebu_gpio.c	/^struct mvebu_gpio_priv {$/;"	s	file:
mvebu_gpio_probe	drivers/gpio/mvebu_gpio.c	/^static int mvebu_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvebu_gpio_regs	drivers/gpio/mvebu_gpio.c	/^struct mvebu_gpio_regs {$/;"	s	file:
mvebu_gpio_set_value	drivers/gpio/mvebu_gpio.c	/^static int mvebu_gpio_set_value(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
mvebu_lcd_conf_mbus_registers	drivers/video/mvebu_lcd.c	/^static void mvebu_lcd_conf_mbus_registers(void)$/;"	f	typeref:typename:void	file:
mvebu_lcd_info	arch/arm/mach-mvebu/include/mach/cpu.h	/^struct mvebu_lcd_info {$/;"	s
mvebu_lcd_register_init	drivers/video/mvebu_lcd.c	/^int mvebu_lcd_register_init(struct mvebu_lcd_info *lcd_info)$/;"	f	typeref:typename:int
mvebu_mbus_add_window_by_id	arch/arm/mach-mvebu/mbus.c	/^int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,$/;"	f	typeref:typename:int
mvebu_mbus_add_window_remap_by_id	arch/arm/mach-mvebu/mbus.c	/^int mvebu_mbus_add_window_remap_by_id(unsigned int target,$/;"	f	typeref:typename:int
mvebu_mbus_alloc_window	arch/arm/mach-mvebu/mbus.c	/^static int mvebu_mbus_alloc_window(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:int	file:
mvebu_mbus_default_setup_cpu_target	arch/arm/mach-mvebu/mbus.c	/^static void mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)$/;"	f	typeref:typename:void	file:
mvebu_mbus_del_window	arch/arm/mach-mvebu/mbus.c	/^int mvebu_mbus_del_window(phys_addr_t base, size_t size)$/;"	f	typeref:typename:int
mvebu_mbus_disable_window	arch/arm/mach-mvebu/mbus.c	/^static void mvebu_mbus_disable_window(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:void	file:
mvebu_mbus_dram_info	arch/arm/mach-mvebu/arm64-common.c	/^const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)$/;"	f	typeref:typename:const struct mbus_dram_target_info *
mvebu_mbus_dram_info	arch/arm/mach-mvebu/mbus.c	/^const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)$/;"	f	typeref:typename:const struct mbus_dram_target_info *
mvebu_mbus_find_window	arch/arm/mach-mvebu/mbus.c	/^static int mvebu_mbus_find_window(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:int	file:
mvebu_mbus_get_lowest_base	arch/arm/mach-mvebu/mbus.c	/^static void mvebu_mbus_get_lowest_base(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:void	file:
mvebu_mbus_probe	arch/arm/mach-mvebu/mbus.c	/^int mvebu_mbus_probe(struct mbus_win windows[], int count)$/;"	f	typeref:typename:int
mvebu_mbus_read_window	arch/arm/mach-mvebu/mbus.c	/^static void mvebu_mbus_read_window(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:void	file:
mvebu_mbus_setup_window	arch/arm/mach-mvebu/mbus.c	/^static int mvebu_mbus_setup_window(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:int	file:
mvebu_mbus_soc_data	arch/arm/mach-mvebu/mbus.c	/^struct mvebu_mbus_soc_data {$/;"	s	file:
mvebu_mbus_state	include/linux/mbus.h	/^struct mvebu_mbus_state {$/;"	s
mvebu_mbus_window_conflicts	arch/arm/mach-mvebu/mbus.c	/^static int mvebu_mbus_window_conflicts(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:int	file:
mvebu_mbus_window_is_free	arch/arm/mach-mvebu/mbus.c	/^static int mvebu_mbus_window_is_free(struct mvebu_mbus_state *mbus,$/;"	f	typeref:typename:int	file:
mvebu_mem_map	arch/arm/mach-mvebu/armada3700/cpu.c	/^static struct mm_region mvebu_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
mvebu_mem_map	arch/arm/mach-mvebu/armada8k/cpu.c	/^static struct mm_region mvebu_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
mvebu_mmc_base	include/mvebu_mmc.h	/^	u32	mvebu_mmc_base;$/;"	m	struct:mvebu_mmc_cfg	typeref:typename:u32
mvebu_mmc_cfg	drivers/mmc/mvebu_mmc.c	/^static struct mmc_config mvebu_mmc_cfg = {$/;"	v	typeref:struct:mmc_config	file:
mvebu_mmc_cfg	include/mvebu_mmc.h	/^struct mvebu_mmc_cfg {$/;"	s
mvebu_mmc_clk	include/mvebu_mmc.h	/^	u32	mvebu_mmc_clk;$/;"	m	struct:mvebu_mmc_cfg	typeref:typename:u32
mvebu_mmc_init	drivers/mmc/mvebu_mmc.c	/^int mvebu_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
mvebu_mmc_initialize	drivers/mmc/mvebu_mmc.c	/^static int mvebu_mmc_initialize(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mvebu_mmc_ops	drivers/mmc/mvebu_mmc.c	/^static const struct mmc_ops mvebu_mmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
mvebu_mmc_power_up	drivers/mmc/mvebu_mmc.c	/^static void mvebu_mmc_power_up(void)$/;"	f	typeref:typename:void	file:
mvebu_mmc_read	drivers/mmc/mvebu_mmc.c	/^static u32 mvebu_mmc_read(u32 offs)$/;"	f	typeref:typename:u32	file:
mvebu_mmc_send_cmd	drivers/mmc/mvebu_mmc.c	/^static int mvebu_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
mvebu_mmc_set_bus	drivers/mmc/mvebu_mmc.c	/^static void mvebu_mmc_set_bus(unsigned int bus)$/;"	f	typeref:typename:void	file:
mvebu_mmc_set_clk	drivers/mmc/mvebu_mmc.c	/^static void mvebu_mmc_set_clk(unsigned int clock)$/;"	f	typeref:typename:void	file:
mvebu_mmc_set_ios	drivers/mmc/mvebu_mmc.c	/^static void mvebu_mmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
mvebu_mmc_setup_data	drivers/mmc/mvebu_mmc.c	/^static int mvebu_mmc_setup_data(struct mmc_data *data)$/;"	f	typeref:typename:int	file:
mvebu_mmc_write	drivers/mmc/mvebu_mmc.c	/^static void mvebu_mmc_write(u32 offs, u32 val)$/;"	f	typeref:typename:void	file:
mvebu_pcie	drivers/pci/pci_mvebu.c	/^struct mvebu_pcie {$/;"	s	file:
mvebu_pcie_get_local_bus_nr	drivers/pci/pci_mvebu.c	/^static int mvebu_pcie_get_local_bus_nr(struct mvebu_pcie *pcie)$/;"	f	typeref:typename:int	file:
mvebu_pcie_get_local_dev_nr	drivers/pci/pci_mvebu.c	/^static int mvebu_pcie_get_local_dev_nr(struct mvebu_pcie *pcie)$/;"	f	typeref:typename:int	file:
mvebu_pcie_link_up	drivers/pci/pci_mvebu.c	/^static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie)$/;"	f	typeref:typename:bool	file:
mvebu_pcie_membase	drivers/pci/pci_mvebu.c	/^static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;$/;"	v	typeref:typename:void __iomem *	file:
mvebu_pcie_read_config_dword	drivers/pci/pci_mvebu.c	/^static int mvebu_pcie_read_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
mvebu_pcie_set_local_bus_nr	drivers/pci/pci_mvebu.c	/^static void mvebu_pcie_set_local_bus_nr(struct mvebu_pcie *pcie, int busno)$/;"	f	typeref:typename:void	file:
mvebu_pcie_set_local_dev_nr	drivers/pci/pci_mvebu.c	/^static void mvebu_pcie_set_local_dev_nr(struct mvebu_pcie *pcie, int devno)$/;"	f	typeref:typename:void	file:
mvebu_pcie_setup_wins	drivers/pci/pci_mvebu.c	/^static void mvebu_pcie_setup_wins(struct mvebu_pcie *pcie)$/;"	f	typeref:typename:void	file:
mvebu_pcie_write_config_dword	drivers/pci/pci_mvebu.c	/^static int mvebu_pcie_write_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
mvebu_pex_unit_is_x4	drivers/pci/pci_mvebu.c	/^static int mvebu_pex_unit_is_x4(int pex_idx)$/;"	f	typeref:typename:int	file:
mvebu_platdata	drivers/serial/serial_mvebu_a3700.c	/^struct mvebu_platdata {$/;"	s	file:
mvebu_sdram_bar	arch/arm/mach-mvebu/dram.c	/^u32 mvebu_sdram_bar(enum memory_bank bank)$/;"	f	typeref:typename:u32
mvebu_sdram_bs	arch/arm/mach-mvebu/dram.c	/^u32 mvebu_sdram_bs(enum memory_bank bank)$/;"	f	typeref:typename:u32
mvebu_sdram_bs_set	arch/arm/mach-mvebu/dram.c	/^static void mvebu_sdram_bs_set(enum memory_bank bank, u32 size)$/;"	f	typeref:typename:void	file:
mvebu_sdram_size_adjust	arch/arm/mach-mvebu/dram.c	/^void mvebu_sdram_size_adjust(enum memory_bank bank)$/;"	f	typeref:typename:void
mvebu_serial_getc	drivers/serial/serial_mvebu_a3700.c	/^static int mvebu_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvebu_serial_ids	drivers/serial/serial_mvebu_a3700.c	/^static const struct udevice_id mvebu_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvebu_serial_ofdata_to_platdata	drivers/serial/serial_mvebu_a3700.c	/^static int mvebu_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvebu_serial_ops	drivers/serial/serial_mvebu_a3700.c	/^static const struct dm_serial_ops mvebu_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
mvebu_serial_pending	drivers/serial/serial_mvebu_a3700.c	/^static int mvebu_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
mvebu_serial_probe	drivers/serial/serial_mvebu_a3700.c	/^static int mvebu_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvebu_serial_putc	drivers/serial/serial_mvebu_a3700.c	/^static int mvebu_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
mvebu_serial_setbrg	drivers/serial/serial_mvebu_a3700.c	/^static int mvebu_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
mvebu_soc_family	arch/arm/mach-mvebu/cpu.c	/^int mvebu_soc_family(void)$/;"	f	typeref:typename:int
mvebu_spi_claim_bus	drivers/spi/kirkwood_spi.c	/^static int mvebu_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvebu_spi_ids	drivers/spi/kirkwood_spi.c	/^static const struct udevice_id mvebu_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvebu_spi_ids	drivers/spi/mvebu_a3700_spi.c	/^static const struct udevice_id mvebu_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvebu_spi_ofdata_to_platdata	drivers/spi/kirkwood_spi.c	/^static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
mvebu_spi_ofdata_to_platdata	drivers/spi/mvebu_a3700_spi.c	/^static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
mvebu_spi_ops	drivers/spi/kirkwood_spi.c	/^static const struct dm_spi_ops mvebu_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
mvebu_spi_ops	drivers/spi/mvebu_a3700_spi.c	/^static const struct dm_spi_ops mvebu_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
mvebu_spi_platdata	drivers/spi/kirkwood_spi.c	/^struct mvebu_spi_platdata {$/;"	s	file:
mvebu_spi_platdata	drivers/spi/mvebu_a3700_spi.c	/^struct mvebu_spi_platdata {$/;"	s	file:
mvebu_spi_priv	drivers/spi/kirkwood_spi.c	/^struct mvebu_spi_priv {$/;"	s	file:
mvebu_spi_probe	drivers/spi/kirkwood_spi.c	/^static int mvebu_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
mvebu_spi_probe	drivers/spi/mvebu_a3700_spi.c	/^static int mvebu_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
mvebu_spi_set_mode	drivers/spi/kirkwood_spi.c	/^static int mvebu_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
mvebu_spi_set_mode	drivers/spi/mvebu_a3700_spi.c	/^static int mvebu_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
mvebu_spi_set_speed	drivers/spi/kirkwood_spi.c	/^static int mvebu_spi_set_speed(struct udevice *bus, uint hz)$/;"	f	typeref:typename:int	file:
mvebu_spi_set_speed	drivers/spi/mvebu_a3700_spi.c	/^static int mvebu_spi_set_speed(struct udevice *bus, uint hz)$/;"	f	typeref:typename:int	file:
mvebu_spi_xfer	drivers/spi/kirkwood_spi.c	/^static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
mvebu_spi_xfer	drivers/spi/mvebu_a3700_spi.c	/^static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
mvebu_system_registers	arch/arm/mach-mvebu/include/mach/cpu.h	/^struct mvebu_system_registers {$/;"	s
mvebu_window_setup	drivers/mmc/mvebu_mmc.c	/^static void mvebu_window_setup(void)$/;"	f	typeref:typename:void	file:
mvebu_xhci	drivers/usb/host/xhci-mvebu.c	/^struct mvebu_xhci {$/;"	s	file:
mvebu_xhci_platdata	drivers/usb/host/xhci-mvebu.c	/^struct mvebu_xhci_platdata {$/;"	s	file:
mvgbe_adrwin	drivers/net/mvgbe.h	/^enum mvgbe_adrwin {$/;"	g
mvgbe_barsz	drivers/net/mvgbe.h	/^struct mvgbe_barsz {$/;"	s
mvgbe_device	drivers/net/mvgbe.h	/^struct mvgbe_device {$/;"	s
mvgbe_halt	drivers/net/mvgbe.c	/^static int mvgbe_halt(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mvgbe_init	drivers/net/mvgbe.c	/^static int mvgbe_init(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mvgbe_init_rx_desc_ring	drivers/net/mvgbe.c	/^static void mvgbe_init_rx_desc_ring(struct mvgbe_device *dmvgbe)$/;"	f	typeref:typename:void	file:
mvgbe_initialize	drivers/net/mvgbe.c	/^int mvgbe_initialize(bd_t *bis)$/;"	f	typeref:typename:int
mvgbe_phylib_init	drivers/net/mvgbe.c	/^int mvgbe_phylib_init(struct eth_device *dev, int phyid)$/;"	f	typeref:typename:int
mvgbe_recv	drivers/net/mvgbe.c	/^static int mvgbe_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mvgbe_registers	drivers/net/mvgbe.h	/^struct mvgbe_registers {$/;"	s
mvgbe_rxcdp	drivers/net/mvgbe.h	/^struct mvgbe_rxcdp {$/;"	s
mvgbe_rxdesc	drivers/net/mvgbe.h	/^struct mvgbe_rxdesc {$/;"	s
mvgbe_send	drivers/net/mvgbe.c	/^static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize)$/;"	f	typeref:typename:int	file:
mvgbe_target	drivers/net/mvgbe.h	/^enum mvgbe_target {$/;"	g
mvgbe_tqx	drivers/net/mvgbe.h	/^struct mvgbe_tqx {$/;"	s
mvgbe_txdesc	drivers/net/mvgbe.h	/^struct mvgbe_txdesc {$/;"	s
mvgbe_winparam	drivers/net/mvgbe.h	/^struct mvgbe_winparam {$/;"	s
mvgbe_write_hwaddr	drivers/net/mvgbe.c	/^static int mvgbe_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
mvneta_adjust_link	drivers/net/mvneta.c	/^static void mvneta_adjust_link(struct udevice *dev)$/;"	f	typeref:typename:void	file:
mvneta_bypass_mbus_windows	drivers/net/mvneta.c	/^static void mvneta_bypass_mbus_windows(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_cleanup_rxqs	drivers/net/mvneta.c	/^static void mvneta_cleanup_rxqs(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_cleanup_txqs	drivers/net/mvneta.c	/^static void mvneta_cleanup_txqs(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_conf_mbus_windows	drivers/net/mvneta.c	/^static void mvneta_conf_mbus_windows(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_defaults_set	drivers/net/mvneta.c	/^static void mvneta_defaults_set(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_ids	drivers/net/mvneta.c	/^static const struct udevice_id mvneta_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvneta_init	drivers/net/mvneta.c	/^static int mvneta_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvneta_init2	drivers/net/mvneta.c	/^static int mvneta_init2(struct mvneta_port *pp)$/;"	f	typeref:typename:int	file:
mvneta_mac_addr_set	drivers/net/mvneta.c	/^static void mvneta_mac_addr_set(struct mvneta_port *pp, unsigned char *addr,$/;"	f	typeref:typename:void	file:
mvneta_mdio_read	drivers/net/mvneta.c	/^static int mvneta_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
mvneta_mdio_write	drivers/net/mvneta.c	/^static int mvneta_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
mvneta_mib_counters_clear	drivers/net/mvneta.c	/^static void mvneta_mib_counters_clear(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_ofdata_to_platdata	drivers/net/mvneta.c	/^static int mvneta_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvneta_open	drivers/net/mvneta.c	/^static int mvneta_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvneta_ops	drivers/net/mvneta.c	/^static const struct eth_ops mvneta_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
mvneta_port	drivers/net/mvneta.c	/^struct mvneta_port {$/;"	s	file:
mvneta_port_disable	drivers/net/mvneta.c	/^static void mvneta_port_disable(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_port_down	drivers/net/mvneta.c	/^static void mvneta_port_down(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_port_enable	drivers/net/mvneta.c	/^static void mvneta_port_enable(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_port_power_up	drivers/net/mvneta.c	/^static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)$/;"	f	typeref:typename:int	file:
mvneta_port_up	drivers/net/mvneta.c	/^static void mvneta_port_up(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_probe	drivers/net/mvneta.c	/^static int mvneta_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvneta_recv	drivers/net/mvneta.c	/^static int mvneta_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
mvneta_rx_desc	drivers/net/mvneta.c	/^struct mvneta_rx_desc {$/;"	s	file:
mvneta_rx_desc_fill	drivers/net/mvneta.c	/^static void mvneta_rx_desc_fill(struct mvneta_rx_desc *rx_desc,$/;"	f	typeref:typename:void	file:
mvneta_rx_error	drivers/net/mvneta.c	/^static void mvneta_rx_error(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_rx_queue	drivers/net/mvneta.c	/^struct mvneta_rx_queue {$/;"	s	file:
mvneta_rxq_buf_size_set	drivers/net/mvneta.c	/^static void mvneta_rxq_buf_size_set(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_rxq_busy_desc_num_get	drivers/net/mvneta.c	/^static int mvneta_rxq_busy_desc_num_get(struct mvneta_port *pp,$/;"	f	typeref:typename:int	file:
mvneta_rxq_deinit	drivers/net/mvneta.c	/^static void mvneta_rxq_deinit(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_rxq_desc_is_first_last	drivers/net/mvneta.c	/^static int mvneta_rxq_desc_is_first_last(u32 status)$/;"	f	typeref:typename:int	file:
mvneta_rxq_desc_num_update	drivers/net/mvneta.c	/^static void mvneta_rxq_desc_num_update(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_rxq_drop_pkts	drivers/net/mvneta.c	/^static void mvneta_rxq_drop_pkts(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_rxq_fill	drivers/net/mvneta.c	/^static int mvneta_rxq_fill(struct mvneta_port *pp, struct mvneta_rx_queue *rxq,$/;"	f	typeref:typename:int	file:
mvneta_rxq_handle_get	drivers/net/mvneta.c	/^static struct mvneta_rx_queue *mvneta_rxq_handle_get(struct mvneta_port *pp,$/;"	f	typeref:struct:mvneta_rx_queue *	file:
mvneta_rxq_init	drivers/net/mvneta.c	/^static int mvneta_rxq_init(struct mvneta_port *pp,$/;"	f	typeref:typename:int	file:
mvneta_rxq_next_desc_get	drivers/net/mvneta.c	/^mvneta_rxq_next_desc_get(struct mvneta_rx_queue *rxq)$/;"	f	typeref:struct:mvneta_rx_desc *	file:
mvneta_rxq_non_occup_desc_add	drivers/net/mvneta.c	/^static void mvneta_rxq_non_occup_desc_add(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_send	drivers/net/mvneta.c	/^static int mvneta_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
mvneta_set_other_mcast_table	drivers/net/mvneta.c	/^static void mvneta_set_other_mcast_table(struct mvneta_port *pp, int queue)$/;"	f	typeref:typename:void	file:
mvneta_set_special_mcast_table	drivers/net/mvneta.c	/^static void mvneta_set_special_mcast_table(struct mvneta_port *pp, int queue)$/;"	f	typeref:typename:void	file:
mvneta_set_ucast_addr	drivers/net/mvneta.c	/^static void mvneta_set_ucast_addr(struct mvneta_port *pp, u8 last_nibble,$/;"	f	typeref:typename:void	file:
mvneta_set_ucast_table	drivers/net/mvneta.c	/^static void mvneta_set_ucast_table(struct mvneta_port *pp, int queue)$/;"	f	typeref:typename:void	file:
mvneta_setup_rxqs	drivers/net/mvneta.c	/^static int mvneta_setup_rxqs(struct mvneta_port *pp)$/;"	f	typeref:typename:int	file:
mvneta_setup_txqs	drivers/net/mvneta.c	/^static int mvneta_setup_txqs(struct mvneta_port *pp)$/;"	f	typeref:typename:int	file:
mvneta_start	drivers/net/mvneta.c	/^static int mvneta_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvneta_start_dev	drivers/net/mvneta.c	/^static void mvneta_start_dev(struct mvneta_port *pp)$/;"	f	typeref:typename:void	file:
mvneta_stop	drivers/net/mvneta.c	/^static void mvneta_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
mvneta_tx_desc	drivers/net/mvneta.c	/^struct mvneta_tx_desc {$/;"	s	file:
mvneta_tx_queue	drivers/net/mvneta.c	/^struct mvneta_tx_queue {$/;"	s	file:
mvneta_txq_deinit	drivers/net/mvneta.c	/^static void mvneta_txq_deinit(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_txq_init	drivers/net/mvneta.c	/^static int mvneta_txq_init(struct mvneta_port *pp,$/;"	f	typeref:typename:int	file:
mvneta_txq_next_desc_get	drivers/net/mvneta.c	/^mvneta_txq_next_desc_get(struct mvneta_tx_queue *txq)$/;"	f	typeref:struct:mvneta_tx_desc *	file:
mvneta_txq_pend_desc_add	drivers/net/mvneta.c	/^static void mvneta_txq_pend_desc_add(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_txq_sent_desc_dec	drivers/net/mvneta.c	/^static void mvneta_txq_sent_desc_dec(struct mvneta_port *pp,$/;"	f	typeref:typename:void	file:
mvneta_txq_sent_desc_num_get	drivers/net/mvneta.c	/^static int mvneta_txq_sent_desc_num_get(struct mvneta_port *pp,$/;"	f	typeref:typename:int	file:
mvporch	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	mvporch;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
mvpp2	drivers/net/mvpp2.c	/^struct mvpp2 {$/;"	s	file:
mvpp2_aggr_txq_init	drivers/net/mvpp2.c	/^static int mvpp2_aggr_txq_init(struct udevice *dev,$/;"	f	typeref:typename:int	file:
mvpp2_aggr_txq_pend_desc_add	drivers/net/mvpp2.c	/^static void mvpp2_aggr_txq_pend_desc_add(struct mvpp2_port *port, int pending)$/;"	f	typeref:typename:void	file:
mvpp2_base_bind	drivers/net/mvpp2.c	/^static int mvpp2_base_bind(struct udevice *parent)$/;"	f	typeref:typename:int	file:
mvpp2_base_probe	drivers/net/mvpp2.c	/^static int mvpp2_base_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvpp2_bm_bufs_add	drivers/net/mvpp2.c	/^static int mvpp2_bm_bufs_add(struct mvpp2_port *port,$/;"	f	typeref:typename:int	file:
mvpp2_bm_bufs_free	drivers/net/mvpp2.c	/^static void mvpp2_bm_bufs_free(struct udevice *dev, struct mvpp2 *priv,$/;"	f	typeref:typename:void	file:
mvpp2_bm_cookie_build	drivers/net/mvpp2.c	/^static u32 mvpp2_bm_cookie_build(struct mvpp2_rx_desc *rx_desc)$/;"	f	typeref:typename:u32	file:
mvpp2_bm_cookie_pool_get	drivers/net/mvpp2.c	/^static inline int mvpp2_bm_cookie_pool_get(u32 cookie)$/;"	f	typeref:typename:int	file:
mvpp2_bm_cookie_pool_set	drivers/net/mvpp2.c	/^static inline u32 mvpp2_bm_cookie_pool_set(u32 cookie, int pool)$/;"	f	typeref:typename:u32	file:
mvpp2_bm_init	drivers/net/mvpp2.c	/^static int mvpp2_bm_init(struct udevice *dev, struct mvpp2 *priv)$/;"	f	typeref:typename:int	file:
mvpp2_bm_pool	drivers/net/mvpp2.c	/^struct mvpp2_bm_pool {$/;"	s	file:
mvpp2_bm_pool_bufsize_set	drivers/net/mvpp2.c	/^static void mvpp2_bm_pool_bufsize_set(struct mvpp2 *priv,$/;"	f	typeref:typename:void	file:
mvpp2_bm_pool_create	drivers/net/mvpp2.c	/^static int mvpp2_bm_pool_create(struct udevice *dev,$/;"	f	typeref:typename:int	file:
mvpp2_bm_pool_destroy	drivers/net/mvpp2.c	/^static int mvpp2_bm_pool_destroy(struct udevice *dev,$/;"	f	typeref:typename:int	file:
mvpp2_bm_pool_put	drivers/net/mvpp2.c	/^static inline void mvpp2_bm_pool_put(struct mvpp2_port *port, int pool,$/;"	f	typeref:typename:void	file:
mvpp2_bm_pool_use	drivers/net/mvpp2.c	/^mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,$/;"	f	typeref:struct:mvpp2_bm_pool *	file:
mvpp2_bm_pools_init	drivers/net/mvpp2.c	/^static int mvpp2_bm_pools_init(struct udevice *dev,$/;"	f	typeref:typename:int	file:
mvpp2_bm_type	drivers/net/mvpp2.c	/^enum mvpp2_bm_type {$/;"	g	file:
mvpp2_buff_hdr	drivers/net/mvpp2.c	/^struct mvpp2_buff_hdr {$/;"	s	file:
mvpp2_cleanup_rxqs	drivers/net/mvpp2.c	/^static void mvpp2_cleanup_rxqs(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_cleanup_txqs	drivers/net/mvpp2.c	/^static void mvpp2_cleanup_txqs(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_cls_flow_entry	drivers/net/mvpp2.c	/^struct mvpp2_cls_flow_entry {$/;"	s	file:
mvpp2_cls_flow_write	drivers/net/mvpp2.c	/^static void mvpp2_cls_flow_write(struct mvpp2 *priv,$/;"	f	typeref:typename:void	file:
mvpp2_cls_init	drivers/net/mvpp2.c	/^static void mvpp2_cls_init(struct mvpp2 *priv)$/;"	f	typeref:typename:void	file:
mvpp2_cls_lookup_entry	drivers/net/mvpp2.c	/^struct mvpp2_cls_lookup_entry {$/;"	s	file:
mvpp2_cls_lookup_write	drivers/net/mvpp2.c	/^static void mvpp2_cls_lookup_write(struct mvpp2 *priv,$/;"	f	typeref:typename:void	file:
mvpp2_cls_oversize_rxq_set	drivers/net/mvpp2.c	/^static void mvpp2_cls_oversize_rxq_set(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_cls_port_config	drivers/net/mvpp2.c	/^static void mvpp2_cls_port_config(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_conf_mbus_windows	drivers/net/mvpp2.c	/^static void mvpp2_conf_mbus_windows(const struct mbus_dram_target_info *dram,$/;"	f	typeref:typename:void	file:
mvpp2_defaults_set	drivers/net/mvpp2.c	/^static void mvpp2_defaults_set(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_driver	drivers/net/mvpp2.c	/^static struct driver mvpp2_driver = {$/;"	v	typeref:struct:driver	file:
mvpp2_egress_disable	drivers/net/mvpp2.c	/^static void mvpp2_egress_disable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_egress_enable	drivers/net/mvpp2.c	/^static void mvpp2_egress_enable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_egress_port	drivers/net/mvpp2.c	/^static inline int mvpp2_egress_port(struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_get_rx_queue	drivers/net/mvpp2.c	/^static inline struct mvpp2_rx_queue *mvpp2_get_rx_queue(struct mvpp2_port *port,$/;"	f	typeref:struct:mvpp2_rx_queue *	file:
mvpp2_get_tx_queue	drivers/net/mvpp2.c	/^static inline struct mvpp2_tx_queue *mvpp2_get_tx_queue(struct mvpp2_port *port,$/;"	f	typeref:struct:mvpp2_tx_queue *	file:
mvpp2_gmac_max_rx_size_set	drivers/net/mvpp2.c	/^static inline void mvpp2_gmac_max_rx_size_set(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_ids	drivers/net/mvpp2.c	/^static const struct udevice_id mvpp2_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mvpp2_ingress_disable	drivers/net/mvpp2.c	/^static void mvpp2_ingress_disable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_ingress_enable	drivers/net/mvpp2.c	/^static void mvpp2_ingress_enable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_init	drivers/net/mvpp2.c	/^static int mvpp2_init(struct udevice *dev, struct mvpp2 *priv)$/;"	f	typeref:typename:int	file:
mvpp2_link_event	drivers/net/mvpp2.c	/^static void mvpp2_link_event(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_open	drivers/net/mvpp2.c	/^static int mvpp2_open(struct udevice *dev, struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_ops	drivers/net/mvpp2.c	/^static const struct eth_ops mvpp2_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
mvpp2_pcpu_stats	drivers/net/mvpp2.c	/^struct mvpp2_pcpu_stats {$/;"	s	file:
mvpp2_phy_connect	drivers/net/mvpp2.c	/^static int mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_pool_refill	drivers/net/mvpp2.c	/^static void mvpp2_pool_refill(struct mvpp2_port *port, u32 bm,$/;"	f	typeref:typename:void	file:
mvpp2_port	drivers/net/mvpp2.c	/^struct mvpp2_port {$/;"	s	file:
mvpp2_port_disable	drivers/net/mvpp2.c	/^static void mvpp2_port_disable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_enable	drivers/net/mvpp2.c	/^static void mvpp2_port_enable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_fc_adv_enable	drivers/net/mvpp2.c	/^static void mvpp2_port_fc_adv_enable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_init	drivers/net/mvpp2.c	/^static int mvpp2_port_init(struct udevice *dev, struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_port_loopback_set	drivers/net/mvpp2.c	/^static void mvpp2_port_loopback_set(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_mii_set	drivers/net/mvpp2.c	/^static void mvpp2_port_mii_set(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_periodic_xon_disable	drivers/net/mvpp2.c	/^static void mvpp2_port_periodic_xon_disable(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_power_up	drivers/net/mvpp2.c	/^static void mvpp2_port_power_up(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_port_probe	drivers/net/mvpp2.c	/^static int mvpp2_port_probe(struct udevice *dev,$/;"	f	typeref:typename:int	file:
mvpp2_port_reset	drivers/net/mvpp2.c	/^static void mvpp2_port_reset(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_probe	drivers/net/mvpp2.c	/^static int mvpp2_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvpp2_prs_def_flow	drivers/net/mvpp2.c	/^static int mvpp2_prs_def_flow(struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_prs_def_flow_init	drivers/net/mvpp2.c	/^static void mvpp2_prs_def_flow_init(struct mvpp2 *priv)$/;"	f	typeref:typename:void	file:
mvpp2_prs_default_init	drivers/net/mvpp2.c	/^static int mvpp2_prs_default_init(struct udevice *dev,$/;"	f	typeref:typename:int	file:
mvpp2_prs_entry	drivers/net/mvpp2.c	/^struct mvpp2_prs_entry {$/;"	s	file:
mvpp2_prs_etype_init	drivers/net/mvpp2.c	/^static int mvpp2_prs_etype_init(struct mvpp2 *priv)$/;"	f	typeref:typename:int	file:
mvpp2_prs_flow_find	drivers/net/mvpp2.c	/^static struct mvpp2_prs_entry *mvpp2_prs_flow_find(struct mvpp2 *priv, int flow)$/;"	f	typeref:struct:mvpp2_prs_entry *	file:
mvpp2_prs_hw_inv	drivers/net/mvpp2.c	/^static void mvpp2_prs_hw_inv(struct mvpp2 *priv, int index)$/;"	f	typeref:typename:void	file:
mvpp2_prs_hw_port_init	drivers/net/mvpp2.c	/^static void mvpp2_prs_hw_port_init(struct mvpp2 *priv, int port, int lu_first,$/;"	f	typeref:typename:void	file:
mvpp2_prs_hw_read	drivers/net/mvpp2.c	/^static int mvpp2_prs_hw_read(struct mvpp2 *priv, struct mvpp2_prs_entry *pe)$/;"	f	typeref:typename:int	file:
mvpp2_prs_hw_write	drivers/net/mvpp2.c	/^static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe)$/;"	f	typeref:typename:int	file:
mvpp2_prs_l3_cast	drivers/net/mvpp2.c	/^enum mvpp2_prs_l3_cast {$/;"	g	file:
mvpp2_prs_lookup	drivers/net/mvpp2.c	/^enum mvpp2_prs_lookup {$/;"	g	file:
mvpp2_prs_mac_da_accept	drivers/net/mvpp2.c	/^static int mvpp2_prs_mac_da_accept(struct mvpp2 *priv, int port,$/;"	f	typeref:typename:int	file:
mvpp2_prs_mac_da_range_find	drivers/net/mvpp2.c	/^mvpp2_prs_mac_da_range_find(struct mvpp2 *priv, int pmap, const u8 *da,$/;"	f	typeref:struct:mvpp2_prs_entry *	file:
mvpp2_prs_mac_drop_all_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add)$/;"	f	typeref:typename:void	file:
mvpp2_prs_mac_init	drivers/net/mvpp2.c	/^static void mvpp2_prs_mac_init(struct mvpp2 *priv)$/;"	f	typeref:typename:void	file:
mvpp2_prs_mac_multi_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_mac_multi_set(struct mvpp2 *priv, int port, int index,$/;"	f	typeref:typename:void	file:
mvpp2_prs_mac_promisc_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port, bool add)$/;"	f	typeref:typename:void	file:
mvpp2_prs_mac_range_equals	drivers/net/mvpp2.c	/^static bool mvpp2_prs_mac_range_equals(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:bool	file:
mvpp2_prs_match_etype	drivers/net/mvpp2.c	/^static void mvpp2_prs_match_etype(struct mvpp2_prs_entry *pe, int offset,$/;"	f	typeref:typename:void	file:
mvpp2_prs_mh_init	drivers/net/mvpp2.c	/^static void mvpp2_prs_mh_init(struct mvpp2 *priv)$/;"	f	typeref:typename:void	file:
mvpp2_prs_shadow	drivers/net/mvpp2.c	/^struct mvpp2_prs_shadow {$/;"	s	file:
mvpp2_prs_shadow_ri_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index,$/;"	f	typeref:typename:void	file:
mvpp2_prs_shadow_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_shadow_set(struct mvpp2 *priv, int index, int lu)$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_ai_get	drivers/net/mvpp2.c	/^static int mvpp2_prs_sram_ai_get(struct mvpp2_prs_entry *pe)$/;"	f	typeref:typename:int	file:
mvpp2_prs_sram_ai_update	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_ai_update(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_bits_clear	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_bits_clear(struct mvpp2_prs_entry *pe, int bit_num,$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_bits_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_bits_set(struct mvpp2_prs_entry *pe, int bit_num,$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_entry	drivers/net/mvpp2.c	/^union mvpp2_prs_sram_entry {$/;"	u	file:
mvpp2_prs_sram_next_lu_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_next_lu_set(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_offset_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_offset_set(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_ri_update	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_ri_update(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_sram_shift_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_sram_shift_set(struct mvpp2_prs_entry *pe, int shift,$/;"	f	typeref:typename:void	file:
mvpp2_prs_tcam_data_byte_get	drivers/net/mvpp2.c	/^static void mvpp2_prs_tcam_data_byte_get(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_tcam_data_byte_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_tcam_data_byte_set(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_tcam_entry	drivers/net/mvpp2.c	/^union mvpp2_prs_tcam_entry {$/;"	u	file:
mvpp2_prs_tcam_first_free	drivers/net/mvpp2.c	/^static int mvpp2_prs_tcam_first_free(struct mvpp2 *priv, unsigned char start,$/;"	f	typeref:typename:int	file:
mvpp2_prs_tcam_lu_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_tcam_lu_set(struct mvpp2_prs_entry *pe, unsigned int lu)$/;"	f	typeref:typename:void	file:
mvpp2_prs_tcam_port_map_get	drivers/net/mvpp2.c	/^static unsigned int mvpp2_prs_tcam_port_map_get(struct mvpp2_prs_entry *pe)$/;"	f	typeref:typename:unsigned int	file:
mvpp2_prs_tcam_port_map_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_tcam_port_map_set(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_tcam_port_set	drivers/net/mvpp2.c	/^static void mvpp2_prs_tcam_port_set(struct mvpp2_prs_entry *pe,$/;"	f	typeref:typename:void	file:
mvpp2_prs_udf	drivers/net/mvpp2.c	/^enum mvpp2_prs_udf {$/;"	g	file:
mvpp2_prs_update_mac_da	drivers/net/mvpp2.c	/^static int mvpp2_prs_update_mac_da(struct mvpp2_port *port, const u8 *da)$/;"	f	typeref:typename:int	file:
mvpp2_read	drivers/net/mvpp2.c	/^static u32 mvpp2_read(struct mvpp2 *priv, u32 offset)$/;"	f	typeref:typename:u32	file:
mvpp2_recv	drivers/net/mvpp2.c	/^static int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
mvpp2_rx_desc	drivers/net/mvpp2.c	/^struct mvpp2_rx_desc {$/;"	s	file:
mvpp2_rx_error	drivers/net/mvpp2.c	/^static void mvpp2_rx_error(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_rx_fifo_init	drivers/net/mvpp2.c	/^static void mvpp2_rx_fifo_init(struct mvpp2 *priv)$/;"	f	typeref:typename:void	file:
mvpp2_rx_queue	drivers/net/mvpp2.c	/^struct mvpp2_rx_queue {$/;"	s	file:
mvpp2_rx_refill	drivers/net/mvpp2.c	/^static int mvpp2_rx_refill(struct mvpp2_port *port,$/;"	f	typeref:typename:int	file:
mvpp2_rxq_deinit	drivers/net/mvpp2.c	/^static void mvpp2_rxq_deinit(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_rxq_drop_pkts	drivers/net/mvpp2.c	/^static void mvpp2_rxq_drop_pkts(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_rxq_init	drivers/net/mvpp2.c	/^static int mvpp2_rxq_init(struct mvpp2_port *port,$/;"	f	typeref:typename:int	file:
mvpp2_rxq_long_pool_set	drivers/net/mvpp2.c	/^static void mvpp2_rxq_long_pool_set(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_rxq_next_desc_get	drivers/net/mvpp2.c	/^mvpp2_rxq_next_desc_get(struct mvpp2_rx_queue *rxq)$/;"	f	typeref:struct:mvpp2_rx_desc *	file:
mvpp2_rxq_offset_set	drivers/net/mvpp2.c	/^static void mvpp2_rxq_offset_set(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_rxq_received	drivers/net/mvpp2.c	/^mvpp2_rxq_received(struct mvpp2_port *port, int rxq_id)$/;"	f	typeref:typename:int	file:
mvpp2_rxq_status_update	drivers/net/mvpp2.c	/^mvpp2_rxq_status_update(struct mvpp2_port *port, int rxq_id,$/;"	f	typeref:typename:void	file:
mvpp2_send	drivers/net/mvpp2.c	/^static int mvpp2_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
mvpp2_setup_rxqs	drivers/net/mvpp2.c	/^static int mvpp2_setup_rxqs(struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_setup_txqs	drivers/net/mvpp2.c	/^static int mvpp2_setup_txqs(struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_start	drivers/net/mvpp2.c	/^static int mvpp2_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mvpp2_start_dev	drivers/net/mvpp2.c	/^static void mvpp2_start_dev(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_stop	drivers/net/mvpp2.c	/^static void mvpp2_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
mvpp2_stop_dev	drivers/net/mvpp2.c	/^static void mvpp2_stop_dev(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_swf_bm_pool_init	drivers/net/mvpp2.c	/^static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)$/;"	f	typeref:typename:int	file:
mvpp2_tag_type	drivers/net/mvpp2.c	/^enum mvpp2_tag_type {$/;"	g	file:
mvpp2_tx_desc	drivers/net/mvpp2.c	/^struct mvpp2_tx_desc {$/;"	s	file:
mvpp2_tx_queue	drivers/net/mvpp2.c	/^struct mvpp2_tx_queue {$/;"	s	file:
mvpp2_txp_max_tx_size_set	drivers/net/mvpp2.c	/^static void mvpp2_txp_max_tx_size_set(struct mvpp2_port *port)$/;"	f	typeref:typename:void	file:
mvpp2_txq_bufs_free	drivers/net/mvpp2.c	/^static void mvpp2_txq_bufs_free(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_txq_clean	drivers/net/mvpp2.c	/^static void mvpp2_txq_clean(struct mvpp2_port *port, struct mvpp2_tx_queue *txq)$/;"	f	typeref:typename:void	file:
mvpp2_txq_deinit	drivers/net/mvpp2.c	/^static void mvpp2_txq_deinit(struct mvpp2_port *port,$/;"	f	typeref:typename:void	file:
mvpp2_txq_drain	drivers/net/mvpp2.c	/^static void mvpp2_txq_drain(struct mvpp2_port *port, struct mvpp2_tx_queue *txq,$/;"	f	typeref:typename:void	file:
mvpp2_txq_inc_get	drivers/net/mvpp2.c	/^static void mvpp2_txq_inc_get(struct mvpp2_txq_pcpu *txq_pcpu)$/;"	f	typeref:typename:void	file:
mvpp2_txq_init	drivers/net/mvpp2.c	/^static int mvpp2_txq_init(struct mvpp2_port *port,$/;"	f	typeref:typename:int	file:
mvpp2_txq_next_desc_get	drivers/net/mvpp2.c	/^mvpp2_txq_next_desc_get(struct mvpp2_tx_queue *txq)$/;"	f	typeref:struct:mvpp2_tx_desc *	file:
mvpp2_txq_pcpu	drivers/net/mvpp2.c	/^struct mvpp2_txq_pcpu {$/;"	s	file:
mvpp2_txq_pend_desc_num_get	drivers/net/mvpp2.c	/^static int mvpp2_txq_pend_desc_num_get(struct mvpp2_port *port,$/;"	f	typeref:typename:int	file:
mvpp2_txq_phys	drivers/net/mvpp2.c	/^static inline int mvpp2_txq_phys(int port, int txq)$/;"	f	typeref:typename:int	file:
mvpp2_txq_sent_counter_clear	drivers/net/mvpp2.c	/^static void mvpp2_txq_sent_counter_clear(void *arg)$/;"	f	typeref:typename:void	file:
mvpp2_txq_sent_desc_proc	drivers/net/mvpp2.c	/^static inline int mvpp2_txq_sent_desc_proc(struct mvpp2_port *port,$/;"	f	typeref:typename:int	file:
mvpp2_write	drivers/net/mvpp2.c	/^static void mvpp2_write(struct mvpp2 *priv, u32 offset, u32 data)$/;"	f	typeref:typename:void	file:
mvr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     mvr;            \/* Manufacturing version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
mvr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	mvr;		\/* Manufacturing version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
mvreg_read	drivers/net/mvneta.c	/^static u32 mvreg_read(struct mvneta_port *pp, u32 offset)$/;"	f	typeref:typename:u32	file:
mvreg_write	drivers/net/mvneta.c	/^static void mvreg_write(struct mvneta_port *pp, u32 offset, u32 data)$/;"	f	typeref:typename:void	file:
mvrtc_registers	drivers/rtc/mvrtc.h	/^struct mvrtc_registers {$/;"	s
mvsata_ide_conf_mbus_windows	drivers/block/mvsata_ide.c	/^static void mvsata_ide_conf_mbus_windows(void)$/;"	f	typeref:typename:void	file:
mvsata_ide_conf_mbus_windows	drivers/block/sata_mv.c	/^static void mvsata_ide_conf_mbus_windows(void)$/;"	f	typeref:typename:void	file:
mvsata_ide_initialize_port	drivers/block/mvsata_ide.c	/^static int mvsata_ide_initialize_port(struct mvsata_port_registers *port)$/;"	f	typeref:typename:int	file:
mvsata_port_registers	drivers/block/mvsata_ide.c	/^struct mvsata_port_registers {$/;"	s	file:
mvstwsi_status_values	drivers/i2c/mvtwsi.c	/^enum mvstwsi_status_values {$/;"	g	file:
mvswap	lib/bzip2/bzlib_blocksort.c	/^#define mvswap(/;"	d	file:
mvtwsi_ack_flags	drivers/i2c/mvtwsi.c	/^enum mvtwsi_ack_flags {$/;"	g	file:
mvtwsi_ctrl_register_fields	drivers/i2c/mvtwsi.c	/^enum mvtwsi_ctrl_register_fields {$/;"	g	file:
mvtwsi_error	drivers/i2c/mvtwsi.c	/^inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)$/;"	f	typeref:typename:uint
mvtwsi_error_class	drivers/i2c/mvtwsi.c	/^enum mvtwsi_error_class {$/;"	g	file:
mvtwsi_i2c_dev	drivers/i2c/mvtwsi.c	/^struct mvtwsi_i2c_dev {$/;"	s	file:
mvtwsi_registers	drivers/i2c/mvtwsi.c	/^struct  mvtwsi_registers {$/;"	s	file:
mw_eeprom_erase_disable	drivers/mtd/mw_eeprom.c	/^int mw_eeprom_erase_disable(int dev)$/;"	f	typeref:typename:int
mw_eeprom_erase_enable	drivers/mtd/mw_eeprom.c	/^int mw_eeprom_erase_enable(int dev)$/;"	f	typeref:typename:int
mw_eeprom_probe	drivers/mtd/mw_eeprom.c	/^int mw_eeprom_probe(int dev)$/;"	f	typeref:typename:int
mw_eeprom_read	drivers/mtd/mw_eeprom.c	/^int mw_eeprom_read(int dev, int addr, u8 *buffer, int len)$/;"	f	typeref:typename:int
mw_eeprom_read_word	drivers/mtd/mw_eeprom.c	/^u32 mw_eeprom_read_word(int dev, int addr)$/;"	f	typeref:typename:u32
mw_eeprom_select	drivers/mtd/mw_eeprom.c	/^static void mw_eeprom_select(int dev)$/;"	f	typeref:typename:void	file:
mw_eeprom_size	drivers/mtd/mw_eeprom.c	/^static int mw_eeprom_size(int dev)$/;"	f	typeref:typename:int	file:
mw_eeprom_write	drivers/mtd/mw_eeprom.c	/^int mw_eeprom_write(int dev, int addr, u8 *buffer, int len)$/;"	f	typeref:typename:int
mw_eeprom_write_word	drivers/mtd/mw_eeprom.c	/^int mw_eeprom_write_word(int dev, int addr, u16 data)$/;"	f	typeref:typename:int
mwdma	drivers/block/fsl_sata.h	/^	u16		mwdma;$/;"	m	struct:fsl_sata	typeref:typename:u16
mwdma	drivers/block/sata_mv.c	/^	u16 mwdma;$/;"	m	struct:mv_priv	typeref:typename:u16	file:
mwdma	drivers/block/sata_sil.h	/^	u16		mwdma;$/;"	m	struct:sil_sata	typeref:typename:u16
mwdma_mask	drivers/block/sata_dwc.h	/^	unsigned int		mwdma_mask;$/;"	m	struct:ata_port	typeref:typename:unsigned int
mwdma_mask	drivers/block/sata_dwc.h	/^	unsigned long			mwdma_mask;$/;"	m	struct:ata_port_info	typeref:typename:unsigned long
mwdma_mask	drivers/block/sata_dwc.h	/^	unsigned long		mwdma_mask;$/;"	m	struct:ata_device	typeref:typename:unsigned long
mwin_max_cols	scripts/kconfig/nconf.c	/^static int mwin_max_cols;$/;"	v	typeref:typename:int	file:
mwin_max_lines	scripts/kconfig/nconf.c	/^static int mwin_max_lines;$/;"	v	typeref:typename:int	file:
mwtd	drivers/net/lpc32xx_eth.c	/^	u32 mwtd;		\/* MII management wite data register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
mwtd	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic mwtd; \/* 0x2b0 *\/$/;"	m	struct:pic32_mii_regs	typeref:struct:pic32_reg_atomic
mx23_mem_init	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void mx23_mem_init(void)$/;"	f	typeref:typename:void	file:
mx23_mem_setup_vddmem	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void mx23_mem_setup_vddmem(void)$/;"	f	typeref:typename:void	file:
mx23_olx_mmc_cd	board/olimex/mx23_olinuxino/mx23_olinuxino.c	/^static int mx23_olx_mmc_cd(int id)$/;"	f	typeref:typename:int	file:
mx23evk_mmc_wp	board/freescale/mx23evk/mx23evk.c	/^static int mx23evk_mmc_wp(int id)$/;"	f	typeref:typename:int	file:
mx25pdk_fec_init	board/freescale/mx25pdk/mx25pdk.c	/^static void mx25pdk_fec_init(void)$/;"	f	typeref:typename:void	file:
mx25pdk_uart1_init	board/freescale/mx25pdk/mx25pdk.c	/^static void mx25pdk_uart1_init(void)$/;"	f	typeref:typename:void	file:
mx27_fec_init_pins	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void mx27_fec_init_pins(void)$/;"	f	typeref:typename:void
mx27_sd1_init_pins	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void mx27_sd1_init_pins(void)$/;"	f	typeref:typename:void
mx27_sd2_init_pins	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void mx27_sd2_init_pins(void)$/;"	f	typeref:typename:void
mx27_uart1_init_pins	arch/arm/cpu/arm926ejs/mx27/generic.c	/^void mx27_uart1_init_pins(void)$/;"	f	typeref:typename:void
mx28_adjust_mac	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^__weak void mx28_adjust_mac(int dev_id, unsigned char *mac)$/;"	f	typeref:typename:__weak void
mx28_create_nand_image	tools/mxsboot.c	/^static int mx28_create_nand_image(int infd, int outfd)$/;"	f	typeref:typename:int	file:
mx28_create_sd_image	tools/mxsboot.c	/^static int mx28_create_sd_image(int infd, int outfd)$/;"	f	typeref:typename:int	file:
mx28_fixup_vt	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^void mx28_fixup_vt(uint32_t start_addr)$/;"	f	typeref:typename:void
mx28_mem_init	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void mx28_mem_init(void)$/;"	f	typeref:typename:void	file:
mx28_nand_bbt	tools/mxsboot.c	/^struct mx28_nand_bbt {$/;"	s	file:
mx28_nand_block_csum	tools/mxsboot.c	/^static uint32_t mx28_nand_block_csum(uint8_t *block, uint32_t size)$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_dbbt	tools/mxsboot.c	/^struct mx28_nand_dbbt {$/;"	s	file:
mx28_nand_ecc_chunk_cnt	tools/mxsboot.c	/^static inline uint32_t mx28_nand_ecc_chunk_cnt(uint32_t page_data_size)$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_ecc_size_in_bits	tools/mxsboot.c	/^static inline uint32_t mx28_nand_ecc_size_in_bits(uint32_t ecc_strength)$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_fcb	tools/mxsboot.c	/^struct mx28_nand_fcb {$/;"	s	file:
mx28_nand_fcb_block	tools/mxsboot.c	/^static uint8_t *mx28_nand_fcb_block(struct mx28_nand_fcb *fcb)$/;"	f	typeref:typename:uint8_t *	file:
mx28_nand_get_dbbt	tools/mxsboot.c	/^static struct mx28_nand_dbbt *mx28_nand_get_dbbt(void)$/;"	f	typeref:struct:mx28_nand_dbbt *	file:
mx28_nand_get_ecc_strength	tools/mxsboot.c	/^static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size,$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_get_fcb	tools/mxsboot.c	/^static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t size)$/;"	f	typeref:struct:mx28_nand_fcb *	file:
mx28_nand_get_mark_offset	tools/mxsboot.c	/^static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_mark_bit_offset	tools/mxsboot.c	/^static inline uint32_t mx28_nand_mark_bit_offset(void)$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_mark_byte_offset	tools/mxsboot.c	/^static inline uint32_t mx28_nand_mark_byte_offset(void)$/;"	f	typeref:typename:uint32_t	file:
mx28_nand_parity_13_8	tools/mxsboot.c	/^static inline uint8_t mx28_nand_parity_13_8(const uint8_t b)$/;"	f	typeref:typename:uint8_t	file:
mx28_nand_write_dbbt	tools/mxsboot.c	/^static int mx28_nand_write_dbbt(struct mx28_nand_dbbt *dbbt, uint8_t *buf)$/;"	f	typeref:typename:int	file:
mx28_nand_write_fcb	tools/mxsboot.c	/^static int mx28_nand_write_fcb(struct mx28_nand_fcb *fcb, uint8_t *buf)$/;"	f	typeref:typename:int	file:
mx28_nand_write_firmware	tools/mxsboot.c	/^static int mx28_nand_write_firmware(struct mx28_nand_fcb *fcb, int infd,$/;"	f	typeref:typename:int	file:
mx28_sd_config_block	tools/mxsboot.c	/^struct mx28_sd_config_block {$/;"	s	file:
mx28_sd_drive_info	tools/mxsboot.c	/^struct mx28_sd_drive_info {$/;"	s	file:
mx28evk_mmc_wp	board/freescale/mx28evk/mx28evk.c	/^static int mx28evk_mmc_wp(int id)$/;"	f	typeref:typename:int	file:
mx31_cpu_type	arch/arm/cpu/arm1136/mx31/generic.c	/^struct mx3_cpu_type mx31_cpu_type[] = {$/;"	v	typeref:struct:mx3_cpu_type[]
mx31_decode_pll	arch/arm/cpu/arm1136/mx31/generic.c	/^static u32 mx31_decode_pll(u32 reg, u32 infreq)$/;"	f	typeref:typename:u32	file:
mx31_dump_clocks	arch/arm/cpu/arm1136/mx31/generic.c	/^void mx31_dump_clocks(void)$/;"	f	typeref:typename:void
mx31_get_hsp_clk	arch/arm/cpu/arm1136/mx31/generic.c	/^static u32 mx31_get_hsp_clk(void)$/;"	f	typeref:typename:u32	file:
mx31_get_ipg_clk	arch/arm/cpu/arm1136/mx31/generic.c	/^static u32 mx31_get_ipg_clk(void)$/;"	f	typeref:typename:u32	file:
mx31_get_mcu_main_clk	arch/arm/cpu/arm1136/mx31/generic.c	/^static u32 mx31_get_mcu_main_clk(void)$/;"	f	typeref:typename:u32	file:
mx31_get_mpl_dpdgck_clk	arch/arm/cpu/arm1136/mx31/generic.c	/^static u32 mx31_get_mpl_dpdgck_clk(void)$/;"	f	typeref:typename:u32	file:
mx31_gpio_mux	arch/arm/cpu/arm1136/mx31/generic.c	/^void mx31_gpio_mux(unsigned long mode)$/;"	f	typeref:typename:void
mx31_set_gpr	arch/arm/cpu/arm1136/mx31/generic.c	/^void mx31_set_gpr(enum iomux_gp_func gp, char en)$/;"	f	typeref:typename:void
mx31_set_pad	arch/arm/cpu/arm1136/mx31/generic.c	/^void mx31_set_pad(enum iomux_pins pin, u32 config)$/;"	f	typeref:typename:void
mx31_spi2_hw_init	arch/arm/cpu/arm1136/mx31/devices.c	/^void mx31_spi2_hw_init(void)$/;"	f	typeref:typename:void
mx31_uart1_hw_init	arch/arm/cpu/arm1136/mx31/devices.c	/^void mx31_uart1_hw_init(void)$/;"	f	typeref:typename:void
mx31_uart2_hw_init	arch/arm/cpu/arm1136/mx31/devices.c	/^void mx31_uart2_hw_init(void)$/;"	f	typeref:typename:void
mx31_weim	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct mx31_weim {$/;"	s
mx31_weim_cscr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct mx31_weim_cscr {$/;"	s
mx3_cpu_type	arch/arm/include/asm/arch-mx31/imx-regs.h	/^struct mx3_cpu_type {$/;"	s
mx3_setup_sdram_bank	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,$/;"	f	typeref:typename:void
mx3fb_set_par	drivers/video/mx3fb.c	/^static int mx3fb_set_par(void)$/;"	f	typeref:typename:int	file:
mx53_dram_size	board/denx/m53evk/m53evk.c	/^static uint32_t mx53_dram_size[2];$/;"	v	typeref:typename:uint32_t[2]	file:
mx53_dram_size	board/freescale/mx53loco/mx53loco.c	/^static uint32_t mx53_dram_size[2];$/;"	v	typeref:typename:uint32_t[2]	file:
mx5_ehci_ops	drivers/usb/host/ehci-mx5.c	/^static const struct ehci_ops mx5_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
mx5_ehci_powerup_fixup	drivers/usb/host/ehci-mx5.c	/^__weak void mx5_ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,$/;"	f	typeref:typename:__weak void
mx6_ddr3_cfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo,$/;"	f	typeref:typename:void
mx6_ddr3_cfg	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6_ddr3_cfg {$/;"	s
mx6_ddr_ioregs	board/ccv/xpress/spl.c	/^static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {$/;"	v	typeref:struct:mx6ul_iomux_ddr_regs	file:
mx6_ddr_ioregs	board/el/el6x/el6x.c	/^const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_ddr_regs
mx6_ddr_ioregs	board/freescale/mx6slevk/mx6slevk.c	/^const struct mx6sl_iomux_ddr_regs mx6_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6sl_iomux_ddr_regs
mx6_ddr_ioregs	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6sx_iomux_ddr_regs
mx6_ddr_ioregs	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {$/;"	v	typeref:struct:mx6ul_iomux_ddr_regs	file:
mx6_ddr_ioregs	board/phytec/pcm058/pcm058.c	/^static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_ddr_regs	file:
mx6_ddr_sysinfo	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6_ddr_sysinfo {$/;"	s
mx6_dram_cfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,$/;"	f	typeref:typename:void
mx6_ehci_ops	drivers/usb/host/ehci-mx6.c	/^static const struct ehci_ops mx6_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
mx6_grp_ioregs	board/ccv/xpress/spl.c	/^static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {$/;"	v	typeref:struct:mx6ul_iomux_grp_regs	file:
mx6_grp_ioregs	board/el/el6x/el6x.c	/^const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_grp_regs
mx6_grp_ioregs	board/freescale/mx6slevk/mx6slevk.c	/^const struct mx6sl_iomux_grp_regs mx6_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6sl_iomux_grp_regs
mx6_grp_ioregs	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^const struct mx6sx_iomux_grp_regs mx6_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6sx_iomux_grp_regs
mx6_grp_ioregs	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {$/;"	v	typeref:struct:mx6ul_iomux_grp_regs	file:
mx6_grp_ioregs	board/phytec/pcm058/pcm058.c	/^static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_grp_regs	file:
mx6_init_after_reset	drivers/usb/host/ehci-mx6.c	/^static int mx6_init_after_reset(struct ehci_ctrl *dev)$/;"	f	typeref:typename:int	file:
mx6_lpddr2_cfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6_lpddr2_cfg(const struct mx6_ddr_sysinfo *sysinfo,$/;"	f	typeref:typename:void
mx6_lpddr2_cfg	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6_lpddr2_cfg {$/;"	s
mx6_mmcd_calib	board/ccv/xpress/spl.c	/^static struct mx6_mmdc_calibration mx6_mmcd_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6_mmcd_calib	board/el/el6x/el6x.c	/^const struct mx6_mmdc_calibration mx6_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration
mx6_mmcd_calib	board/freescale/mx6slevk/mx6slevk.c	/^const struct mx6_mmdc_calibration mx6_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration
mx6_mmcd_calib	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^const struct mx6_mmdc_calibration mx6_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration
mx6_mmcd_calib	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct mx6_mmdc_calibration mx6_mmcd_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6_mmcd_calib	board/phytec/pcm058/pcm058.c	/^static const struct mx6_mmdc_calibration mx6_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration	file:
mx6_mmdc_calibration	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6_mmdc_calibration {$/;"	s
mx6_rgmii_rework	board/advantech/dms-ba16/dms-ba16.c	/^static int mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mx6_rgmii_rework	board/compulab/cm_fx6/cm_fx6.c	/^static int mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mx6_rgmii_rework	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int
mx6_rgmii_rework	board/embest/mx6boards/mx6boards.c	/^int mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int
mx6_rgmii_rework	board/ge/bx50v3/bx50v3.c	/^static int mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
mx6_rgmii_rework	board/udoo/udoo.c	/^int mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int
mx6_usb_ids	drivers/usb/host/ehci-mx6.c	/^static const struct udevice_id mx6_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mx6dl_1g_mmcd_calib	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6_mmdc_calibration mx6dl_1g_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration	file:
mx6dl_1g_mmdc_calib	board/udoo/udoo_spl.c	/^static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dl_1g_mmdc_calib	board/wandboard/spl.c	/^static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dl_512m_mmcd_calib	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6_mmdc_calibration mx6dl_512m_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration	file:
mx6dl_ddr_ioregs	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static const struct mx6sdl_iomux_ddr_regs mx6dl_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6sdl_iomux_ddr_regs	file:
mx6dl_ddr_ioregs	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6sdl_iomux_ddr_regs mx6dl_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6sdl_iomux_ddr_regs	file:
mx6dl_i2c2_pad_info	board/wandboard/wandboard.c	/^struct i2c_pads_info mx6dl_i2c2_pad_info = {$/;"	v	typeref:struct:i2c_pads_info
mx6dl_i2c_pad_info0	board/gateworks/gw_ventana/common.c	/^static struct i2c_pads_info mx6dl_i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info	file:
mx6dl_i2c_pad_info1	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^struct i2c_pads_info mx6dl_i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
mx6dl_i2c_pad_info1	board/gateworks/gw_ventana/common.c	/^static struct i2c_pads_info mx6dl_i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
mx6dl_i2c_pad_info2	board/gateworks/gw_ventana/common.c	/^static struct i2c_pads_info mx6dl_i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
mx6dl_mmcd_calib	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^const struct mx6_mmdc_calibration mx6dl_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration
mx6dl_mmdc_calib	board/engicam/icorem6/icorem6.c	/^static struct mx6_mmdc_calibration mx6dl_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_128x32_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6dq_128x32_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_128x64_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6dq_128x64_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_256x16_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6dq_256x16_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_256x32_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6dq_256x32_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_256x64_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_512x32_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_ddr_ioregs	board/barco/platinum/spl_titanium.c	/^struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs
mx6dq_ddr_ioregs	board/engicam/icorem6/icorem6.c	/^static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs	file:
mx6dq_ddr_ioregs	board/gateworks/gw_ventana/gw_ventana_spl.c	/^struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs
mx6dq_ddr_ioregs	board/udoo/udoo_spl.c	/^static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs	file:
mx6dq_ddr_ioregs	board/wandboard/spl.c	/^static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs	file:
mx6dq_dram_iocfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6dq_dram_iocfg(unsigned width,$/;"	f	typeref:typename:void
mx6dq_grp_ioregs	board/barco/platinum/spl_titanium.c	/^struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs
mx6dq_grp_ioregs	board/engicam/icorem6/icorem6.c	/^static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs	file:
mx6dq_grp_ioregs	board/gateworks/gw_ventana/gw_ventana_spl.c	/^struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs
mx6dq_grp_ioregs	board/udoo/udoo_spl.c	/^static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs	file:
mx6dq_grp_ioregs	board/wandboard/spl.c	/^static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs	file:
mx6dq_iomux_ddr_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6dq_iomux_ddr_regs {$/;"	s
mx6dq_iomux_grp_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6dq_iomux_grp_regs {$/;"	s
mx6dq_mmdc_calib	board/barco/platinum/spl_picon.c	/^static struct mx6_mmdc_calibration mx6dq_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_mmdc_calib	board/barco/platinum/spl_titanium.c	/^static struct mx6_mmdc_calibration mx6dq_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6dq_mmdc_calib	board/engicam/icorem6/icorem6.c	/^static struct mx6_mmdc_calibration mx6dq_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6q_1g_mmcd_calib	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6_mmdc_calibration mx6q_1g_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration	file:
mx6q_1g_mmdc_calib	board/udoo/udoo_spl.c	/^static struct mx6_mmdc_calibration mx6q_1g_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6q_2g_mmcd_calib	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^const struct mx6_mmdc_calibration mx6q_2g_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration
mx6q_2g_mmcd_calib	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6_mmdc_calibration mx6q_2g_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration	file:
mx6q_2g_mmdc_calib	board/wandboard/spl.c	/^static struct mx6_mmdc_calibration mx6q_2g_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6q_dcd_table	board/freescale/mx6sabresd/mx6sabresd.c	/^static int mx6q_dcd_table[] = {$/;"	v	typeref:typename:int[]	file:
mx6q_ddr_ioregs	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_ddr_regs
mx6q_ddr_ioregs	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_ddr_regs	file:
mx6q_grp_ioregs	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^const struct mx6dq_iomux_grp_regs mx6q_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_grp_regs
mx6q_grp_ioregs	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6dq_iomux_grp_regs mx6q_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6dq_iomux_grp_regs	file:
mx6q_i2c2_pad_info	board/wandboard/wandboard.c	/^struct i2c_pads_info mx6q_i2c2_pad_info = {$/;"	v	typeref:struct:i2c_pads_info
mx6q_i2c_pad_info0	board/gateworks/gw_ventana/common.c	/^static struct i2c_pads_info mx6q_i2c_pad_info0 = {$/;"	v	typeref:struct:i2c_pads_info	file:
mx6q_i2c_pad_info1	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^struct i2c_pads_info mx6q_i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info
mx6q_i2c_pad_info1	board/gateworks/gw_ventana/common.c	/^static struct i2c_pads_info mx6q_i2c_pad_info1 = {$/;"	v	typeref:struct:i2c_pads_info	file:
mx6q_i2c_pad_info2	board/gateworks/gw_ventana/common.c	/^static struct i2c_pads_info mx6q_i2c_pad_info2 = {$/;"	v	typeref:struct:i2c_pads_info	file:
mx6q_mmcd_calib	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^const struct mx6_mmdc_calibration mx6q_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration
mx6qp_dcd_table	board/freescale/mx6sabresd/mx6sabresd.c	/^static int mx6qp_dcd_table[] = {$/;"	v	typeref:typename:int[]	file:
mx6s_512m_mmdc_calib	board/wandboard/spl.c	/^static struct mx6_mmdc_calibration mx6s_512m_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6s_mmcd_calib	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static const struct mx6_mmdc_calibration mx6s_mmcd_calib = {$/;"	v	typeref:typename:const struct mx6_mmdc_calibration	file:
mx6sabre_rev	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static int mx6sabre_rev(void)$/;"	f	typeref:typename:int	file:
mx6sdl_128x32_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6sdl_128x32_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6sdl_128x64_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6sdl_128x64_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6sdl_256x16_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6sdl_256x16_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6sdl_256x32_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6sdl_256x32_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6sdl_64x16_mmdc_calib	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static struct mx6_mmdc_calibration mx6sdl_64x16_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
mx6sdl_ddr_ioregs	board/barco/platinum/spl_picon.c	/^struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_ddr_regs
mx6sdl_ddr_ioregs	board/engicam/icorem6/icorem6.c	/^struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_ddr_regs
mx6sdl_ddr_ioregs	board/gateworks/gw_ventana/gw_ventana_spl.c	/^struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_ddr_regs
mx6sdl_ddr_ioregs	board/udoo/udoo_spl.c	/^struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_ddr_regs
mx6sdl_ddr_ioregs	board/wandboard/spl.c	/^struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_ddr_regs
mx6sdl_dram_iocfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6sdl_dram_iocfg(unsigned width,$/;"	f	typeref:typename:void
mx6sdl_grp_ioregs	board/barco/platinum/spl_picon.c	/^struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_grp_regs
mx6sdl_grp_ioregs	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static const struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6sdl_iomux_grp_regs	file:
mx6sdl_grp_ioregs	board/engicam/icorem6/icorem6.c	/^struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_grp_regs
mx6sdl_grp_ioregs	board/gateworks/gw_ventana/gw_ventana_spl.c	/^struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_grp_regs
mx6sdl_grp_ioregs	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static const struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:typename:const struct mx6sdl_iomux_grp_regs	file:
mx6sdl_grp_ioregs	board/udoo/udoo_spl.c	/^struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_grp_regs
mx6sdl_grp_ioregs	board/wandboard/spl.c	/^struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {$/;"	v	typeref:struct:mx6sdl_iomux_grp_regs
mx6sdl_iomux_ddr_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6sdl_iomux_ddr_regs {$/;"	s
mx6sdl_iomux_grp_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6sdl_iomux_grp_regs {$/;"	s
mx6sl_dram_iocfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6sl_dram_iocfg(unsigned width,$/;"	f	typeref:typename:void
mx6sl_iomux_ddr_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6sl_iomux_ddr_regs {$/;"	s
mx6sl_iomux_grp_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6sl_iomux_grp_regs {$/;"	s
mx6sx_dram_iocfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6sx_dram_iocfg(unsigned width,$/;"	f	typeref:typename:void
mx6sx_iomux_ddr_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6sx_iomux_ddr_regs {$/;"	s
mx6sx_iomux_grp_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6sx_iomux_grp_regs {$/;"	s
mx6ul_dram_iocfg	arch/arm/cpu/armv7/mx6/ddr.c	/^void mx6ul_dram_iocfg(unsigned width,$/;"	f	typeref:typename:void
mx6ul_iomux_ddr_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6ul_iomux_ddr_regs {$/;"	s
mx6ul_iomux_grp_regs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^struct mx6ul_iomux_grp_regs {$/;"	s
mxaxiracr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxaxiracr;	\/* R8a7790 only *\/$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxaxirtcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxaxirtcr;	\/* R8a7792 only *\/$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxaxiwacr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxaxiwacr;	\/* R8a7790 only *\/$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxaxiwtcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxaxiwtcr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxc_ata_config_regs	drivers/block/mxc_ata.c	/^struct mxc_ata_config_regs {$/;"	s	file:
mxc_bank_info	drivers/gpio/mxc_gpio.c	/^struct mxc_bank_info {$/;"	s	file:
mxc_ccm	arch/arm/cpu/armv7/mx5/clock.c	/^struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;$/;"	v	typeref:struct:mxc_ccm_reg *
mxc_ccm_anatop_reg	arch/arm/include/asm/arch-mx7/crm_regs.h	/^struct mxc_ccm_anatop_reg {$/;"	s
mxc_ccm_ccgr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^struct mxc_ccm_ccgr {$/;"	s
mxc_ccm_reg	arch/arm/include/asm/arch-mx5/crm_regs.h	/^struct mxc_ccm_reg {$/;"	s
mxc_ccm_reg	arch/arm/include/asm/arch-mx6/crm_regs.h	/^struct mxc_ccm_reg {$/;"	s
mxc_ccm_reg	arch/arm/include/asm/arch-mx7/crm_regs.h	/^struct mxc_ccm_reg {$/;"	s
mxc_ccm_root_slice	arch/arm/include/asm/arch-mx7/crm_regs.h	/^struct mxc_ccm_root_slice {$/;"	s
mxc_clock	arch/arm/include/asm/arch-fsl-layerscape/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-ls102xa/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx25/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx27/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx31/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx35/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx5/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx6/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mx7/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-mxs/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-s32v234/clock.h	/^enum mxc_clock {$/;"	g
mxc_clock	arch/arm/include/asm/arch-vf610/clock.h	/^enum mxc_clock {$/;"	g
mxc_data_hdd_regs	drivers/block/mxc_ata.c	/^struct mxc_data_hdd_regs {$/;"	s	file:
mxc_get_clock	arch/arm/cpu/arm1136/mx31/generic.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/arm1136/mx35/generic.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/arm926ejs/mx25/generic.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/arm926ejs/mx27/generic.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/arm926ejs/mxs/clock.c	/^uint32_t mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:uint32_t
mxc_get_clock	arch/arm/cpu/armv7/ls102xa/clock.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv7/mx5/clock.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv7/mx6/clock.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv7/mx7/clock.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv7/vf610/generic.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_clock	arch/arm/cpu/armv8/s32v234/generic.c	/^unsigned int mxc_get_clock(enum mxc_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_main_clock	arch/arm/cpu/arm1136/mx35/generic.c	/^unsigned int mxc_get_main_clock(enum mxc_main_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_peri_clock	arch/arm/cpu/arm1136/mx35/generic.c	/^unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)$/;"	f	typeref:typename:unsigned int
mxc_get_pll_ddr_derive	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 mxc_get_pll_ddr_derive(int derive)$/;"	f	typeref:typename:u32	file:
mxc_get_pll_derive	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 mxc_get_pll_derive(enum pll_clocks pll, int derive)$/;"	f	typeref:typename:u32	file:
mxc_get_pll_enet_derive	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 mxc_get_pll_enet_derive(int derive)$/;"	f	typeref:typename:u32	file:
mxc_get_pll_pfd	arch/arm/cpu/armv7/mx6/clock.c	/^static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num)$/;"	f	typeref:typename:u32	file:
mxc_get_pll_sys_derive	arch/arm/cpu/armv7/mx7/clock.c	/^static u32 mxc_get_pll_sys_derive(int derive)$/;"	f	typeref:typename:u32	file:
mxc_gpio_bank_direction	drivers/gpio/mxc_gpio.c	/^static void mxc_gpio_bank_direction(struct gpio_regs *regs, int offset,$/;"	f	typeref:typename:void	file:
mxc_gpio_bank_get_value	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)$/;"	f	typeref:typename:int	file:
mxc_gpio_bank_set_value	drivers/gpio/mxc_gpio.c	/^static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset,$/;"	f	typeref:typename:void	file:
mxc_gpio_bind	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mxc_gpio_direction	drivers/gpio/mxc_gpio.c	/^enum mxc_gpio_direction {$/;"	g	file:
mxc_gpio_direction	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_direction(unsigned int gpio,$/;"	f	typeref:typename:int	file:
mxc_gpio_direction_input	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
mxc_gpio_direction_output	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
mxc_gpio_get_function	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
mxc_gpio_get_value	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
mxc_gpio_ids	drivers/gpio/mxc_gpio.c	/^static const struct udevice_id mxc_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mxc_gpio_is_output	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)$/;"	f	typeref:typename:int	file:
mxc_gpio_plat	drivers/gpio/mxc_gpio.c	/^struct mxc_gpio_plat {$/;"	s	file:
mxc_gpio_probe	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mxc_gpio_set_value	drivers/gpio/mxc_gpio.c	/^static int mxc_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
mxc_gpt	arch/arm/imx-common/timer.c	/^struct mxc_gpt {$/;"	s	file:
mxc_host	drivers/mtd/nand/mxc_nand.c	/^static struct mxc_nand_host mxc_host;$/;"	v	typeref:struct:mxc_nand_host	file:
mxc_i2c_bus	arch/arm/include/asm/imx-common/mxc_i2c.h	/^struct mxc_i2c_bus {$/;"	s
mxc_i2c_buses	drivers/i2c/mxc_i2c.c	/^static struct mxc_i2c_bus mxc_i2c_buses[] = {$/;"	v	typeref:struct:mxc_i2c_bus[]	file:
mxc_i2c_init	drivers/i2c/mxc_i2c.c	/^static void mxc_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
mxc_i2c_probe	drivers/i2c/mxc_i2c.c	/^static int mxc_i2c_probe(struct i2c_adapter *adap, uint8_t chip)$/;"	f	typeref:typename:int	file:
mxc_i2c_read	drivers/i2c/mxc_i2c.c	/^static int mxc_i2c_read(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
mxc_i2c_set_bus_speed	drivers/i2c/mxc_i2c.c	/^static u32 mxc_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)$/;"	f	typeref:typename:u32	file:
mxc_i2c_write	drivers/i2c/mxc_i2c.c	/^static int mxc_i2c_write(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
mxc_main_clock	arch/arm/include/asm/arch-mx35/clock.h	/^enum mxc_main_clock {$/;"	g
mxc_mmc_init	drivers/mmc/mxcmmc.c	/^int mxc_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
mxc_nand_calculate_ecc	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,$/;"	f	typeref:typename:int	file:
mxc_nand_command	drivers/mtd/nand/mxc_nand.c	/^void mxc_nand_command(struct mtd_info *mtd, unsigned command,$/;"	f	typeref:typename:void
mxc_nand_correct_data	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
mxc_nand_dev_ready	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
mxc_nand_enable_hwecc	drivers/mtd/nand/mxc_nand.c	/^static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void	file:
mxc_nand_host	drivers/mtd/nand/mxc_nand.c	/^struct mxc_nand_host {$/;"	s	file:
mxc_nand_ip_regs	drivers/mtd/nand/mxc_nand.h	/^struct mxc_nand_ip_regs {$/;"	s
mxc_nand_memcpy32	drivers/mtd/nand/mxc_nand.c	/^static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size)$/;"	f	typeref:typename:uint32_t *	file:
mxc_nand_read_buf	drivers/mtd/nand/mxc_nand.c	/^static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
mxc_nand_read_byte	drivers/mtd/nand/mxc_nand.c	/^static u_char mxc_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u_char	file:
mxc_nand_read_oob_syndrome	drivers/mtd/nand/mxc_nand.c	/^#define mxc_nand_read_oob_syndrome /;"	d	file:
mxc_nand_read_oob_syndrome	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxc_nand_read_page_raw_syndrome	drivers/mtd/nand/mxc_nand.c	/^#define mxc_nand_read_page_raw_syndrome /;"	d	file:
mxc_nand_read_page_raw_syndrome	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_read_page_raw_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxc_nand_read_page_syndrome	drivers/mtd/nand/mxc_nand.c	/^#define mxc_nand_read_page_syndrome /;"	d	file:
mxc_nand_read_page_syndrome	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxc_nand_read_word	drivers/mtd/nand/mxc_nand.c	/^static uint16_t mxc_nand_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:uint16_t	file:
mxc_nand_regs	drivers/mtd/nand/mxc_nand.h	/^struct mxc_nand_regs {$/;"	s
mxc_nand_select_chip	drivers/mtd/nand/mxc_nand.c	/^static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
mxc_nand_write_buf	drivers/mtd/nand/mxc_nand.c	/^static void mxc_nand_write_buf(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
mxc_nand_write_oob_syndrome	drivers/mtd/nand/mxc_nand.c	/^#define mxc_nand_write_oob_syndrome /;"	d	file:
mxc_nand_write_oob_syndrome	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_write_oob_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxc_nand_write_page_raw_syndrome	drivers/mtd/nand/mxc_nand.c	/^#define mxc_nand_write_page_raw_syndrome /;"	d	file:
mxc_nand_write_page_raw_syndrome	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_write_page_raw_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxc_nand_write_page_syndrome	drivers/mtd/nand/mxc_nand.c	/^#define mxc_nand_write_page_syndrome /;"	d	file:
mxc_nand_write_page_syndrome	drivers/mtd/nand/mxc_nand.c	/^static int mxc_nand_write_page_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxc_peri_clock	arch/arm/include/asm/arch-mx35/clock.h	/^enum mxc_peri_clock {$/;"	g
mxc_plat	drivers/gpio/mxc_gpio.c	/^static const struct mxc_gpio_plat mxc_plat[] = {$/;"	v	typeref:typename:const struct mxc_gpio_plat[]	file:
mxc_pll_reg	arch/arm/include/asm/arch-mx5/crm_regs.h	/^struct mxc_pll_reg {$/;"	s
mxc_plls	arch/arm/cpu/armv7/mx5/clock.c	/^struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = {$/;"	v	typeref:struct:mxc_pll_reg * []
mxc_serial_drv	drivers/serial/serial_mxc.c	/^static struct serial_device mxc_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
mxc_serial_getc	drivers/serial/serial_mxc.c	/^static int mxc_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mxc_serial_getc	drivers/serial/serial_mxc.c	/^static int mxc_serial_getc(void)$/;"	f	typeref:typename:int	file:
mxc_serial_ids	drivers/serial/serial_mxc.c	/^static const struct udevice_id mxc_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
mxc_serial_init	drivers/serial/serial_mxc.c	/^static int mxc_serial_init(void)$/;"	f	typeref:typename:int	file:
mxc_serial_initialize	drivers/serial/serial_mxc.c	/^void mxc_serial_initialize(void)$/;"	f	typeref:typename:void
mxc_serial_ofdata_to_platdata	drivers/serial/serial_mxc.c	/^static int mxc_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mxc_serial_ops	drivers/serial/serial_mxc.c	/^static const struct dm_serial_ops mxc_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
mxc_serial_pending	drivers/serial/serial_mxc.c	/^static int mxc_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
mxc_serial_platdata	include/dm/platform_data/serial_mxc.h	/^struct mxc_serial_platdata {$/;"	s
mxc_serial_probe	drivers/serial/serial_mxc.c	/^static int mxc_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
mxc_serial_putc	drivers/serial/serial_mxc.c	/^static int mxc_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
mxc_serial_putc	drivers/serial/serial_mxc.c	/^static void mxc_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
mxc_serial_setbrg	drivers/serial/serial_mxc.c	/^int mxc_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
mxc_serial_setbrg	drivers/serial/serial_mxc.c	/^static void mxc_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
mxc_serial_tstc	drivers/serial/serial_mxc.c	/^static int mxc_serial_tstc(void)$/;"	f	typeref:typename:int	file:
mxc_set_clock	arch/arm/cpu/armv7/mx5/clock.c	/^int mxc_set_clock(u32 ref, u32 freq, enum mxc_clock clk)$/;"	f	typeref:typename:int
mxc_set_sata_internal_clock	arch/arm/cpu/armv7/mx5/clock.c	/^void mxc_set_sata_internal_clock(void)$/;"	f	typeref:typename:void
mxc_set_usbcontrol	drivers/usb/host/ehci-mx5.c	/^int mxc_set_usbcontrol(int port, unsigned int flags)$/;"	f	typeref:typename:int
mxc_set_usbcontrol	drivers/usb/host/ehci-mxc.c	/^static int mxc_set_usbcontrol(int port, unsigned int flags)$/;"	f	typeref:typename:int	file:
mxc_setup_weimcs	arch/arm/cpu/arm1136/mx31/generic.c	/^void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)$/;"	f	typeref:typename:void
mxc_spi_slave	drivers/spi/mxc_spi.c	/^struct mxc_spi_slave {$/;"	s	file:
mxc_uart	drivers/serial/serial_mxc.c	/^struct mxc_uart {$/;"	s	file:
mxc_weimcs	arch/arm/include/asm/arch-mx31/sys_proto.h	/^struct mxc_weimcs {$/;"	s
mxcfb_check_var	drivers/video/mxc_ipuv3_fb.c	/^static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)$/;"	f	typeref:typename:int	file:
mxcfb_color_key	drivers/video/mxcfb.h	/^struct mxcfb_color_key {$/;"	s
mxcfb_gamma	drivers/video/mxcfb.h	/^struct mxcfb_gamma {$/;"	s
mxcfb_gbl_alpha	drivers/video/mxcfb.h	/^struct mxcfb_gbl_alpha {$/;"	s
mxcfb_info	drivers/video/mxc_ipuv3_fb.c	/^static struct fb_info *mxcfb_info[3];$/;"	v	typeref:struct:fb_info * [3]	file:
mxcfb_info	drivers/video/mxc_ipuv3_fb.c	/^struct mxcfb_info {$/;"	s	file:
mxcfb_init_fbinfo	drivers/video/mxc_ipuv3_fb.c	/^static struct fb_info *mxcfb_init_fbinfo(void)$/;"	f	typeref:struct:fb_info *	file:
mxcfb_loc_alpha	drivers/video/mxcfb.h	/^struct mxcfb_loc_alpha {$/;"	s
mxcfb_map_video_memory	drivers/video/mxc_ipuv3_fb.c	/^static int mxcfb_map_video_memory(struct fb_info *fbi)$/;"	f	typeref:typename:int	file:
mxcfb_pos	drivers/video/mxcfb.h	/^struct mxcfb_pos {$/;"	s
mxcfb_probe	drivers/video/mxc_ipuv3_fb.c	/^static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,$/;"	f	typeref:typename:int	file:
mxcfb_set_fix	drivers/video/mxc_ipuv3_fb.c	/^static int mxcfb_set_fix(struct fb_info *info)$/;"	f	typeref:typename:int	file:
mxcfb_set_par	drivers/video/mxc_ipuv3_fb.c	/^static int mxcfb_set_par(struct fb_info *fbi)$/;"	f	typeref:typename:int	file:
mxcfb_unmap_video_memory	drivers/video/mxc_ipuv3_fb.c	/^static int mxcfb_unmap_video_memory(struct fb_info *fbi)$/;"	f	typeref:typename:int	file:
mxcmci_cfg	drivers/mmc/mxcmmc.c	/^static struct mmc_config mxcmci_cfg = {$/;"	v	typeref:struct:mmc_config	file:
mxcmci_cmd_done	drivers/mmc/mxcmmc.c	/^static int mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat)$/;"	f	typeref:typename:int	file:
mxcmci_finish_data	drivers/mmc/mxcmmc.c	/^static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat)$/;"	f	typeref:typename:int	file:
mxcmci_finish_request	drivers/mmc/mxcmmc.c	/^static void mxcmci_finish_request(struct mxcmci_host *host,$/;"	f	typeref:typename:void	file:
mxcmci_host	drivers/mmc/mxcmmc.c	/^static struct mxcmci_host mxcmci_host;$/;"	v	typeref:struct:mxcmci_host	file:
mxcmci_host	drivers/mmc/mxcmmc.c	/^struct mxcmci_host {$/;"	s	file:
mxcmci_init	drivers/mmc/mxcmmc.c	/^static int mxcmci_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mxcmci_initialize	drivers/mmc/mxcmmc.c	/^static int mxcmci_initialize(bd_t *bis)$/;"	f	typeref:typename:int	file:
mxcmci_ops	drivers/mmc/mxcmmc.c	/^static const struct mmc_ops mxcmci_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
mxcmci_poll_status	drivers/mmc/mxcmmc.c	/^static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask)$/;"	f	typeref:typename:int	file:
mxcmci_pull	drivers/mmc/mxcmmc.c	/^static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes)$/;"	f	typeref:typename:int	file:
mxcmci_push	drivers/mmc/mxcmmc.c	/^static int mxcmci_push(struct mxcmci_host *host, const void *_buf, int bytes)$/;"	f	typeref:typename:int	file:
mxcmci_read_response	drivers/mmc/mxcmmc.c	/^static int mxcmci_read_response(struct mxcmci_host *host, unsigned int stat)$/;"	f	typeref:typename:int	file:
mxcmci_regs	drivers/mmc/mxcmmc.c	/^struct mxcmci_regs {$/;"	s	file:
mxcmci_request	drivers/mmc/mxcmmc.c	/^static int mxcmci_request(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
mxcmci_set_clk_rate	drivers/mmc/mxcmmc.c	/^static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)$/;"	f	typeref:typename:void	file:
mxcmci_set_ios	drivers/mmc/mxcmmc.c	/^static void mxcmci_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
mxcmci_setup_data	drivers/mmc/mxcmmc.c	/^static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)$/;"	f	typeref:typename:void	file:
mxcmci_softreset	drivers/mmc/mxcmmc.c	/^static void mxcmci_softreset(struct mxcmci_host *host)$/;"	f	typeref:typename:void	file:
mxcmci_start_cmd	drivers/mmc/mxcmmc.c	/^static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
mxcmci_transfer_data	drivers/mmc/mxcmmc.c	/^static int mxcmci_transfer_data(struct mxcmci_host *host)$/;"	f	typeref:typename:int	file:
mxcmci_use_dma	drivers/mmc/mxcmmc.c	/^static inline int mxcmci_use_dma(struct mxcmci_host *host)$/;"	f	typeref:typename:int	file:
mxmr	include/linux/mtd/fsl_upm.h	/^	void __iomem *mxmr;$/;"	m	struct:fsl_upm	typeref:typename:void __iomem *
mxrtcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxrtcr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxs3cracr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxs3cracr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxs3crtcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxs3crtcr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxs3cwacr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxs3cwacr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxs3cwtcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxs3cwtcr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxs_5v_boot	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_5v_boot(void)$/;"	f	typeref:typename:void	file:
mxs_adjust_memory_params	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^__weak void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:__weak void
mxs_adjust_memory_params	board/bluegiga/apx4devkit/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/creative/xfi3/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/freescale/mx23evk/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/freescale/mx28evk/iomux.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/olimex/mx23_olinuxino/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/ppcag/bg0900/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/sandisk/sansa_fuze_plus/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_adjust_memory_params	board/schulercontrol/sc_sps_1/spl_boot.c	/^void mxs_adjust_memory_params(uint32_t *dram_vals)$/;"	f	typeref:typename:void
mxs_apbh_regs	arch/arm/include/asm/imx-common/regs-apbh.h	/^struct mxs_apbh_regs {$/;"	s
mxs_batt_boot	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_batt_boot(void)$/;"	f	typeref:typename:void	file:
mxs_bch_regs	arch/arm/include/asm/imx-common/regs-bch.h	/^struct mxs_bch_regs {$/;"	s
mxs_boot_modes	arch/arm/include/asm/arch-mxs/sys_proto.h	/^static const struct mxs_pair mxs_boot_modes[] = {$/;"	v	typeref:typename:const struct mxs_pair[]
mxs_boot_valid_5v	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_boot_valid_5v(void)$/;"	f	typeref:typename:void	file:
mxs_clkctrl_regs	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^struct mxs_clkctrl_regs {$/;"	s
mxs_clkctrl_regs	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^struct mxs_clkctrl_regs {$/;"	s
mxs_common_spl_init	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,$/;"	f	typeref:typename:void
mxs_digctl_regs	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^struct mxs_digctl_regs {$/;"	s
mxs_dma_ack_irq	drivers/dma/apbh_dma.c	/^static int mxs_dma_ack_irq(int channel)$/;"	f	typeref:typename:int	file:
mxs_dma_chan	arch/arm/include/asm/imx-common/dma.h	/^struct mxs_dma_chan {$/;"	s
mxs_dma_channels	drivers/dma/apbh_dma.c	/^static struct mxs_dma_chan mxs_dma_channels[MXS_MAX_DMA_CHANNELS];$/;"	v	typeref:struct:mxs_dma_chan[]	file:
mxs_dma_circ_start	drivers/dma/apbh_dma.c	/^void mxs_dma_circ_start(int chan, struct mxs_dma_desc *pdesc)$/;"	f	typeref:typename:void
mxs_dma_cmd	arch/arm/include/asm/imx-common/dma.h	/^struct mxs_dma_cmd {$/;"	s
mxs_dma_cmd_address	drivers/dma/apbh_dma.c	/^static unsigned int mxs_dma_cmd_address(struct mxs_dma_desc *desc)$/;"	f	typeref:typename:unsigned int	file:
mxs_dma_desc	arch/arm/include/asm/imx-common/dma.h	/^struct mxs_dma_desc {$/;"	s
mxs_dma_desc_alloc	drivers/dma/apbh_dma.c	/^struct mxs_dma_desc *mxs_dma_desc_alloc(void)$/;"	f	typeref:struct:mxs_dma_desc *
mxs_dma_desc_append	drivers/dma/apbh_dma.c	/^int mxs_dma_desc_append(int channel, struct mxs_dma_desc *pdesc)$/;"	f	typeref:typename:int
mxs_dma_desc_free	drivers/dma/apbh_dma.c	/^void mxs_dma_desc_free(struct mxs_dma_desc *pdesc)$/;"	f	typeref:typename:void
mxs_dma_disable	drivers/dma/apbh_dma.c	/^static int mxs_dma_disable(int channel)$/;"	f	typeref:typename:int	file:
mxs_dma_enable	drivers/dma/apbh_dma.c	/^static int mxs_dma_enable(int channel)$/;"	f	typeref:typename:int	file:
mxs_dma_enable_irq	drivers/dma/apbh_dma.c	/^static int mxs_dma_enable_irq(int channel, int enable)$/;"	f	typeref:typename:int	file:
mxs_dma_finish	drivers/dma/apbh_dma.c	/^static int mxs_dma_finish(int channel, struct list_head *head)$/;"	f	typeref:typename:int	file:
mxs_dma_flush_desc	drivers/dma/apbh_dma.c	/^inline void mxs_dma_flush_desc(struct mxs_dma_desc *desc) {}$/;"	f	typeref:typename:void
mxs_dma_flush_desc	drivers/dma/apbh_dma.c	/^void mxs_dma_flush_desc(struct mxs_dma_desc *desc)$/;"	f	typeref:typename:void
mxs_dma_go	drivers/dma/apbh_dma.c	/^int mxs_dma_go(int chan)$/;"	f	typeref:typename:int
mxs_dma_init	drivers/dma/apbh_dma.c	/^void mxs_dma_init(void)$/;"	f	typeref:typename:void
mxs_dma_init_channel	drivers/dma/apbh_dma.c	/^int mxs_dma_init_channel(int channel)$/;"	f	typeref:typename:int
mxs_dma_read_semaphore	drivers/dma/apbh_dma.c	/^static int mxs_dma_read_semaphore(int channel)$/;"	f	typeref:typename:int	file:
mxs_dma_release	drivers/dma/apbh_dma.c	/^int mxs_dma_release(int channel)$/;"	f	typeref:typename:int
mxs_dma_request	drivers/dma/apbh_dma.c	/^static int mxs_dma_request(int channel)$/;"	f	typeref:typename:int	file:
mxs_dma_reset	drivers/dma/apbh_dma.c	/^static int mxs_dma_reset(int channel)$/;"	f	typeref:typename:int	file:
mxs_dma_validate_chan	drivers/dma/apbh_dma.c	/^int mxs_dma_validate_chan(int channel)$/;"	f	typeref:typename:int
mxs_dma_wait_complete	drivers/dma/apbh_dma.c	/^static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)$/;"	f	typeref:typename:int	file:
mxs_dram_init	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^int mxs_dram_init(void)$/;"	f	typeref:typename:int
mxs_enable_4p2_dcdc_input	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_enable_4p2_dcdc_input(int xfer)$/;"	f	typeref:typename:void	file:
mxs_enable_output_rail_protection	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_enable_output_rail_protection(void)$/;"	f	typeref:typename:void	file:
mxs_flash_ident	drivers/mtd/nand/mxs_nand_spl.c	/^static int mxs_flash_ident(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
mxs_get_batt_volt	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static int mxs_get_batt_volt(void)$/;"	f	typeref:typename:int	file:
mxs_get_bootmode_index	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^static uint8_t mxs_get_bootmode_index(void)$/;"	f	typeref:typename:uint8_t	file:
mxs_get_emiclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^static uint32_t mxs_get_emiclk(void)$/;"	f	typeref:typename:uint32_t	file:
mxs_get_gpmiclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^static uint32_t mxs_get_gpmiclk(void)$/;"	f	typeref:typename:uint32_t	file:
mxs_get_hclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^static uint32_t mxs_get_hclk(void)$/;"	f	typeref:typename:uint32_t	file:
mxs_get_ioclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^static uint32_t mxs_get_ioclk(enum mxs_ioclock io)$/;"	f	typeref:typename:uint32_t	file:
mxs_get_pclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^static uint32_t mxs_get_pclk(void)$/;"	f	typeref:typename:uint32_t	file:
mxs_get_sspclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)$/;"	f	typeref:typename:uint32_t	file:
mxs_get_vddd_power_source_off	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static int mxs_get_vddd_power_source_off(void)$/;"	f	typeref:typename:int	file:
mxs_get_vddio_power_source_off	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static int mxs_get_vddio_power_source_off(void)$/;"	f	typeref:typename:int	file:
mxs_gpio_init	arch/arm/include/asm/arch-mxs/gpio.h	/^inline void mxs_gpio_init(void) {}$/;"	f	typeref:typename:void
mxs_gpio_init	drivers/gpio/mxs_gpio.c	/^void mxs_gpio_init(void)$/;"	f	typeref:typename:void
mxs_gpmi_regs	arch/arm/include/asm/imx-common/regs-gpmi.h	/^struct mxs_gpmi_regs {$/;"	s
mxs_handle_5v_conflict	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_handle_5v_conflict(void)$/;"	f	typeref:typename:void	file:
mxs_i2c_get_base	drivers/i2c/mxs_i2c.c	/^static struct mxs_i2c_regs *mxs_i2c_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:mxs_i2c_regs *	file:
mxs_i2c_get_bus_speed	drivers/i2c/mxs_i2c.c	/^static unsigned int mxs_i2c_get_bus_speed(struct i2c_adapter *adap)$/;"	f	typeref:typename:unsigned int	file:
mxs_i2c_if_read	drivers/i2c/mxs_i2c.c	/^static int mxs_i2c_if_read(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
mxs_i2c_if_write	drivers/i2c/mxs_i2c.c	/^static int mxs_i2c_if_write(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
mxs_i2c_init	drivers/i2c/mxs_i2c.c	/^static void mxs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
mxs_i2c_probe	drivers/i2c/mxs_i2c.c	/^static int mxs_i2c_probe(struct i2c_adapter *adap, uint8_t chip)$/;"	f	typeref:typename:int	file:
mxs_i2c_regs	arch/arm/include/asm/arch-mxs/regs-i2c.h	/^struct mxs_i2c_regs {$/;"	s
mxs_i2c_reset	drivers/i2c/mxs_i2c.c	/^static void mxs_i2c_reset(struct i2c_adapter *adap)$/;"	f	typeref:typename:void	file:
mxs_i2c_set_bus_speed	drivers/i2c/mxs_i2c.c	/^static uint mxs_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)$/;"	f	typeref:typename:uint	file:
mxs_i2c_setup_read	drivers/i2c/mxs_i2c.c	/^static void mxs_i2c_setup_read(struct i2c_adapter *adap, uint8_t chip, int len)$/;"	f	typeref:typename:void	file:
mxs_i2c_wait_for_ack	drivers/i2c/mxs_i2c.c	/^static int mxs_i2c_wait_for_ack(struct i2c_adapter *adap)$/;"	f	typeref:typename:int	file:
mxs_i2c_write	drivers/i2c/mxs_i2c.c	/^static int mxs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
mxs_init_batt_bo	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_init_batt_bo(void)$/;"	f	typeref:typename:void	file:
mxs_ioclock	arch/arm/include/asm/arch-mxs/clock.h	/^enum mxs_ioclock {$/;"	g
mxs_iomux_setup_multiple_pads	arch/arm/cpu/arm926ejs/mxs/iomux.c	/^int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count)$/;"	f	typeref:typename:int
mxs_iomux_setup_pad	arch/arm/cpu/arm926ejs/mxs/iomux.c	/^int mxs_iomux_setup_pad(iomux_cfg_t pad)$/;"	f	typeref:typename:int
mxs_is_batt_good	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static int mxs_is_batt_good(void)$/;"	f	typeref:typename:int	file:
mxs_is_batt_ready	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static int mxs_is_batt_ready(void)$/;"	f	typeref:typename:int	file:
mxs_lcd_init	drivers/video/mxsfb.c	/^static void mxs_lcd_init(GraphicDevice *panel,$/;"	f	typeref:typename:void	file:
mxs_lcdif_regs	arch/arm/include/asm/imx-common/regs-lcdif.h	/^struct mxs_lcdif_regs {$/;"	s
mxs_lradc_enable_batt_measurement	arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c	/^void mxs_lradc_enable_batt_measurement(void)$/;"	f	typeref:typename:void
mxs_lradc_init	arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c	/^void mxs_lradc_init(void)$/;"	f	typeref:typename:void
mxs_lradc_regs	arch/arm/include/asm/arch-mxs/regs-lradc.h	/^struct mxs_lradc_regs {$/;"	s
mxs_mem_get_size	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^uint32_t mxs_mem_get_size(void)$/;"	f	typeref:typename:uint32_t
mxs_mem_init	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^void mxs_mem_init(void)$/;"	f	typeref:typename:void
mxs_mem_init_clock	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void mxs_mem_init_clock(void)$/;"	f	typeref:typename:void	file:
mxs_mem_setup_cpu_and_hbus	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void mxs_mem_setup_cpu_and_hbus(void)$/;"	f	typeref:typename:void	file:
mxs_mem_setup_vdda	arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c	/^static void mxs_mem_setup_vdda(void)$/;"	f	typeref:typename:void	file:
mxs_nand_alloc_buffers	drivers/mtd/nand/mxs_nand.c	/^int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)$/;"	f	typeref:typename:int
mxs_nand_aux_status_offset	drivers/mtd/nand/mxs_nand.c	/^static uint32_t mxs_nand_aux_status_offset(void)$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_block_bad	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_block_bad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
mxs_nand_cmd_ctrl	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
mxs_nand_command	drivers/mtd/nand/mxs_nand_spl.c	/^static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
mxs_nand_device_ready	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_device_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
mxs_nand_ecc_chunk_cnt	drivers/mtd/nand/mxs_nand.c	/^static uint32_t mxs_nand_ecc_chunk_cnt(uint32_t page_data_size)$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_ecc_read_oob	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *nand,$/;"	f	typeref:typename:int	file:
mxs_nand_ecc_read_page	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,$/;"	f	typeref:typename:int	file:
mxs_nand_ecc_size_in_bits	drivers/mtd/nand/mxs_nand.c	/^static uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength)$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_ecc_write_oob	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *nand,$/;"	f	typeref:typename:int	file:
mxs_nand_ecc_write_page	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_ecc_write_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
mxs_nand_flush_cmd_buf	drivers/mtd/nand/mxs_nand.c	/^static inline void mxs_nand_flush_cmd_buf(struct mxs_nand_info *info) {}$/;"	f	typeref:typename:void	file:
mxs_nand_flush_cmd_buf	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_flush_cmd_buf(struct mxs_nand_info *info)$/;"	f	typeref:typename:void	file:
mxs_nand_flush_data_buf	drivers/mtd/nand/mxs_nand.c	/^static inline void mxs_nand_flush_data_buf(struct mxs_nand_info *info) {}$/;"	f	typeref:typename:void	file:
mxs_nand_flush_data_buf	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_flush_data_buf(struct mxs_nand_info *info)$/;"	f	typeref:typename:void	file:
mxs_nand_get_dma_desc	drivers/mtd/nand/mxs_nand.c	/^static struct mxs_dma_desc *mxs_nand_get_dma_desc(struct mxs_nand_info *info)$/;"	f	typeref:struct:mxs_dma_desc *	file:
mxs_nand_get_ecc_strength	drivers/mtd/nand/mxs_nand.c	/^static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_get_mark_offset	drivers/mtd/nand/mxs_nand.c	/^static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_hook_block_markbad	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_hook_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
mxs_nand_hook_read_oob	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_hook_read_oob(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
mxs_nand_hook_write_oob	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_hook_write_oob(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
mxs_nand_info	drivers/mtd/nand/mxs_nand.c	/^struct mxs_nand_info {$/;"	s	file:
mxs_nand_init	drivers/mtd/nand/mxs_nand.c	/^int mxs_nand_init(struct mxs_nand_info *info)$/;"	f	typeref:typename:int
mxs_nand_init	drivers/mtd/nand/mxs_nand_spl.c	/^static int mxs_nand_init(void)$/;"	f	typeref:typename:int	file:
mxs_nand_inval_data_buf	drivers/mtd/nand/mxs_nand.c	/^static inline void mxs_nand_inval_data_buf(struct mxs_nand_info *info) {}$/;"	f	typeref:typename:void	file:
mxs_nand_inval_data_buf	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_inval_data_buf(struct mxs_nand_info *info)$/;"	f	typeref:typename:void	file:
mxs_nand_mark_bit_offset	drivers/mtd/nand/mxs_nand.c	/^static uint32_t mxs_nand_mark_bit_offset(struct mtd_info *mtd)$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_mark_byte_offset	drivers/mtd/nand/mxs_nand.c	/^static uint32_t mxs_nand_mark_byte_offset(struct mtd_info *mtd)$/;"	f	typeref:typename:uint32_t	file:
mxs_nand_read_buf	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int length)$/;"	f	typeref:typename:void	file:
mxs_nand_read_byte	drivers/mtd/nand/mxs_nand.c	/^static uint8_t mxs_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
mxs_nand_return_dma_descs	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_return_dma_descs(struct mxs_nand_info *info)$/;"	f	typeref:typename:void	file:
mxs_nand_scan_bbt	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_scan_bbt(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
mxs_nand_select_chip	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
mxs_nand_swap_block_mark	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_swap_block_mark(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
mxs_nand_wait_for_bch_complete	drivers/mtd/nand/mxs_nand.c	/^static int mxs_nand_wait_for_bch_complete(void)$/;"	f	typeref:typename:int	file:
mxs_nand_write_buf	drivers/mtd/nand/mxs_nand.c	/^static void mxs_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf,$/;"	f	typeref:typename:void	file:
mxs_ocotp_clear_error	drivers/misc/mxs_ocotp.c	/^static void mxs_ocotp_clear_error(void)$/;"	f	typeref:typename:void	file:
mxs_ocotp_read_bank_open	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_read_bank_open(bool open)$/;"	f	typeref:typename:int	file:
mxs_ocotp_read_fuse	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_read_fuse(uint32_t reg, uint32_t *val)$/;"	f	typeref:typename:int	file:
mxs_ocotp_regs	arch/arm/include/asm/arch-mxs/regs-ocotp.h	/^struct mxs_ocotp_regs {$/;"	s
mxs_ocotp_scale_hclk	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_scale_hclk(bool enter, uint32_t *val)$/;"	f	typeref:typename:int	file:
mxs_ocotp_scale_vddio	drivers/misc/mxs_ocotp.c	/^static void mxs_ocotp_scale_vddio(bool enter, uint32_t *val)$/;"	f	typeref:typename:void	file:
mxs_ocotp_valid	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_valid(u32 bank, u32 word)$/;"	f	typeref:typename:int	file:
mxs_ocotp_wait_busy_clear	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_wait_busy_clear(void)$/;"	f	typeref:typename:int	file:
mxs_ocotp_wait_hclk_ready	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_wait_hclk_ready(void)$/;"	f	typeref:typename:int	file:
mxs_ocotp_write_fuse	drivers/misc/mxs_ocotp.c	/^static int mxs_ocotp_write_fuse(uint32_t addr, uint32_t mask)$/;"	f	typeref:typename:int	file:
mxs_pair	arch/arm/include/asm/arch-mxs/sys_proto.h	/^struct mxs_pair {$/;"	s
mxs_pinctrl_regs	arch/arm/include/asm/arch-mxs/regs-pinctrl.h	/^struct mxs_pinctrl_regs {$/;"	s
mxs_port	drivers/usb/host/ehci-mxs.c	/^static const struct ehci_mxs_port mxs_port[] = {$/;"	v	typeref:typename:const struct ehci_mxs_port[]	file:
mxs_power_clock2pll	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_clock2pll(void)$/;"	f	typeref:typename:void	file:
mxs_power_clock2xtal	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_clock2xtal(void)$/;"	f	typeref:typename:void	file:
mxs_power_configure_power_source	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_configure_power_source(void)$/;"	f	typeref:typename:void	file:
mxs_power_enable_4p2	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_enable_4p2(void)$/;"	f	typeref:typename:void	file:
mxs_power_init	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^void mxs_power_init(void)$/;"	f	typeref:typename:void
mxs_power_init_4p2_params	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_init_4p2_params(void)$/;"	f	typeref:typename:void	file:
mxs_power_init_4p2_regulator	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_init_4p2_regulator(void)$/;"	f	typeref:typename:void	file:
mxs_power_init_dcdc_4p2_source	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_init_dcdc_4p2_source(void)$/;"	f	typeref:typename:void	file:
mxs_power_regs	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^struct mxs_power_regs {$/;"	s
mxs_power_regs	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^struct mxs_power_regs {$/;"	s
mxs_power_set_auto_restart	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_set_auto_restart(void)$/;"	f	typeref:typename:void	file:
mxs_power_set_linreg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_set_linreg(void)$/;"	f	typeref:typename:void	file:
mxs_power_set_vddx	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,$/;"	f	typeref:typename:void	file:
mxs_power_setup_5v_detect	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_power_setup_5v_detect(void)$/;"	f	typeref:typename:void	file:
mxs_power_setup_dcdc_clocksource	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^__weak void mxs_power_setup_dcdc_clocksource(void)$/;"	f	typeref:typename:__weak void
mxs_power_switch_dcdc_clocksource	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^void mxs_power_switch_dcdc_clocksource(uint32_t freqsel)$/;"	f	typeref:typename:void
mxs_power_wait_pswitch	arch/arm/cpu/arm926ejs/mxs/mxs_init.h	/^static inline void mxs_power_wait_pswitch(void) { }$/;"	f	typeref:typename:void
mxs_power_wait_pswitch	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^void mxs_power_wait_pswitch(void)$/;"	f	typeref:typename:void
mxs_powerdown	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_powerdown(void)$/;"	f	typeref:typename:void	file:
mxs_read_page_ecc	drivers/mtd/nand/mxs_nand_spl.c	/^static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)$/;"	f	typeref:typename:int	file:
mxs_reg_32	arch/arm/include/asm/imx-common/regs-common.h	/^#define	mxs_reg_32(/;"	d
mxs_reg_8	arch/arm/include/asm/imx-common/regs-common.h	/^#define	mxs_reg_8(/;"	d
mxs_register_32	arch/arm/include/asm/imx-common/regs-common.h	/^struct mxs_register_32 {$/;"	s
mxs_register_8	arch/arm/include/asm/imx-common/regs-common.h	/^struct mxs_register_8 {$/;"	s
mxs_reset_block	arch/arm/imx-common/misc.c	/^int mxs_reset_block(struct mxs_register_32 *reg)$/;"	f	typeref:typename:int
mxs_rtc_regs	arch/arm/include/asm/arch-mxs/regs-rtc.h	/^struct mxs_rtc_regs {$/;"	s
mxs_rtc_set_time	drivers/rtc/mxsrtc.c	/^int mxs_rtc_set_time(uint32_t secs)$/;"	f	typeref:typename:int
mxs_set_ioclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq)$/;"	f	typeref:typename:void
mxs_set_lcdclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq)$/;"	f	typeref:typename:void
mxs_set_lcdclk	arch/arm/cpu/armv7/mx6/clock.c	/^void mxs_set_lcdclk(u32 base_addr, u32 freq)$/;"	f	typeref:typename:void
mxs_set_lcdclk	arch/arm/cpu/armv7/mx7/clock.c	/^void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)$/;"	f	typeref:typename:void
mxs_set_ssp_busclock	arch/arm/cpu/arm926ejs/mxs/clock.c	/^void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)$/;"	f	typeref:typename:void
mxs_set_sspclk	arch/arm/cpu/arm926ejs/mxs/clock.c	/^void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)$/;"	f	typeref:typename:void
mxs_setup_batt_detect	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_setup_batt_detect(void)$/;"	f	typeref:typename:void	file:
mxs_spi_end_xfer	drivers/spi/mxs_spi.c	/^static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs)$/;"	f	typeref:typename:void	file:
mxs_spi_slave	drivers/spi/mxs_spi.c	/^struct mxs_spi_slave {$/;"	s	file:
mxs_spi_start_xfer	drivers/spi/mxs_spi.c	/^static void mxs_spi_start_xfer(struct mxs_ssp_regs *ssp_regs)$/;"	f	typeref:typename:void	file:
mxs_spi_xfer_dma	drivers/spi/mxs_spi.c	/^static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,$/;"	f	typeref:typename:int	file:
mxs_spi_xfer_pio	drivers/spi/mxs_spi.c	/^static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,$/;"	f	typeref:typename:int	file:
mxs_spl_console_init	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^static void mxs_spl_console_init(void)$/;"	f	typeref:typename:void	file:
mxs_spl_data	arch/arm/include/asm/arch-mxs/sys_proto.h	/^struct mxs_spl_data {$/;"	s
mxs_spl_fixup_vectors	arch/arm/cpu/arm926ejs/mxs/spl_boot.c	/^static void mxs_spl_fixup_vectors(void)$/;"	f	typeref:typename:void	file:
mxs_src_power_init	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_src_power_init(void)$/;"	f	typeref:typename:void	file:
mxs_ssp_bus_id_valid	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^static inline int mxs_ssp_bus_id_valid(int bus)$/;"	f	typeref:typename:int
mxs_ssp_clock_by_bus	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^static inline int mxs_ssp_clock_by_bus(unsigned int clock)$/;"	f	typeref:typename:int
mxs_ssp_regs	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^struct mxs_ssp_regs {$/;"	s
mxs_ssp_regs_by_bus	arch/arm/include/asm/arch-mxs/regs-ssp.h	/^static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)$/;"	f	typeref:struct:mxs_ssp_regs *
mxs_sspclock	arch/arm/include/asm/arch-mxs/clock.h	/^enum mxs_sspclock {$/;"	g
mxs_switch_vddd_to_dcdc_source	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_switch_vddd_to_dcdc_source(void)$/;"	f	typeref:typename:void	file:
mxs_timrot_regs	arch/arm/include/asm/arch-mxs/regs-timrot.h	/^struct mxs_timrot_regs {$/;"	s
mxs_uartapp_regs	arch/arm/include/asm/arch-mxs/regs-uartapp.h	/^struct mxs_uartapp_regs {$/;"	s
mxs_ungate_power	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static void mxs_ungate_power(void)$/;"	f	typeref:typename:void	file:
mxs_usb_regs	arch/arm/include/asm/arch-mxs/regs-usb.h	/^struct mxs_usb_regs {$/;"	s
mxs_usbphy_regs	arch/arm/include/asm/arch-mxs/regs-usbphy.h	/^struct mxs_usbphy_regs {$/;"	s
mxs_vddd_cfg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static const struct mxs_vddx_cfg mxs_vddd_cfg = {$/;"	v	typeref:typename:const struct mxs_vddx_cfg	file:
mxs_vddio_cfg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static const struct mxs_vddx_cfg mxs_vddio_cfg = {$/;"	v	typeref:typename:const struct mxs_vddx_cfg	file:
mxs_vddmem_cfg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^static const struct mxs_vddx_cfg mxs_vddmem_cfg = {$/;"	v	typeref:typename:const struct mxs_vddx_cfg	file:
mxs_vddx_cfg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^struct mxs_vddx_cfg {$/;"	s	file:
mxs_wait_mask_clr	arch/arm/imx-common/misc.c	/^int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned$/;"	f	typeref:typename:int
mxs_wait_mask_set	arch/arm/imx-common/misc.c	/^int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned$/;"	f	typeref:typename:int
mxsaar0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxsaar0;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxsaar1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxsaar1;$/;"	m	struct:rcar_mxi	typeref:typename:u32
mxsfb_read_register	board/sandisk/sansa_fuze_plus/sfp.c	/^static int mxsfb_read_register(uint32_t reg, uint32_t *value)$/;"	f	typeref:typename:int	file:
mxsfb_system_setup	board/creative/xfi3/xfi3.c	/^void mxsfb_system_setup(void)$/;"	f	typeref:typename:void
mxsfb_system_setup	drivers/video/mxsfb.c	/^__weak void mxsfb_system_setup(void)$/;"	f	typeref:typename:__weak void
mxsfb_write_byte	board/creative/xfi3/xfi3.c	/^static int mxsfb_write_byte(uint32_t payload, const unsigned int data)$/;"	f	typeref:typename:int	file:
mxsfb_write_byte	board/sandisk/sansa_fuze_plus/sfp.c	/^static int mxsfb_write_byte(uint32_t payload, const unsigned int data)$/;"	f	typeref:typename:int	file:
mxsfb_write_register	board/creative/xfi3/xfi3.c	/^static void mxsfb_write_register(uint32_t reg, uint32_t data)$/;"	f	typeref:typename:void	file:
mxsfb_write_register	board/sandisk/sansa_fuze_plus/sfp.c	/^static void mxsfb_write_register(uint32_t reg, uint32_t data)$/;"	f	typeref:typename:void	file:
mxsimage_check_image_types	tools/mxsimage.c	/^static int mxsimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
mxsimage_check_params	tools/mxsimage.c	/^int mxsimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
mxsimage_generate	tools/mxsimage.c	/^static int mxsimage_generate(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
mxsimage_print_header	tools/mxsimage.c	/^static void mxsimage_print_header(const void *hdr)$/;"	f	typeref:typename:void	file:
mxsimage_set_header	tools/mxsimage.c	/^static void mxsimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
mxsimage_verify_header	tools/mxsimage.c	/^static int mxsimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
mxsimage_verify_print_header	tools/mxsimage.c	/^static int mxsimage_verify_print_header(char *file, int silent)$/;"	f	typeref:typename:int	file:
mxsmmc_cd	drivers/mmc/mxsmmc.c	/^static int mxsmmc_cd(struct mxsmmc_priv *priv)$/;"	f	typeref:typename:int	file:
mxsmmc_init	drivers/mmc/mxsmmc.c	/^static int mxsmmc_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
mxsmmc_initialize	drivers/mmc/mxsmmc.c	/^int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))$/;"	f	typeref:typename:int
mxsmmc_ops	drivers/mmc/mxsmmc.c	/^static const struct mmc_ops mxsmmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
mxsmmc_priv	drivers/mmc/mxsmmc.c	/^struct mxsmmc_priv {$/;"	s	file:
mxsmmc_send_cmd	drivers/mmc/mxsmmc.c	/^mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
mxsmmc_send_cmd_dma	drivers/mmc/mxsmmc.c	/^static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
mxsmmc_send_cmd_pio	drivers/mmc/mxsmmc.c	/^static int mxsmmc_send_cmd_pio(struct mxsmmc_priv *priv, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
mxsmmc_set_ios	drivers/mmc/mxsmmc.c	/^static void mxsmmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
mxwtcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 mxwtcr;$/;"	m	struct:rcar_mxi	typeref:typename:u32
my_dev	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_dev *my_dev;	\/* The device I'm on *\/$/;"	m	struct:yaffs_obj	typeref:struct:yaffs_dev *
my_inode	fs/yaffs2/yaffs_guts.h	/^	void *my_inode;$/;"	m	struct:yaffs_obj	typeref:typename:void *
my_lba	include/part_efi.h	/^	__le64 my_lba;$/;"	m	struct:_gpt_header	typeref:typename:__le64
myad	drivers/i2c/i2c-uniphier.c	/^	u32 myad;			\/* slave address *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
myfeof	lib/bzip2/bzlib.c	/^static Bool myfeof ( FILE* f )$/;"	f	typeref:typename:Bool	file:
mz_block_type	include/zfs/zap_impl.h	/^	uint64_t mz_block_type;	\/* ZBT_MICRO *\/$/;"	m	struct:mzap_phys	typeref:typename:uint64_t
mz_chunk	include/zfs/zap_impl.h	/^	mzap_ent_phys_t mz_chunk[1];$/;"	m	struct:mzap_phys	typeref:typename:mzap_ent_phys_t[1]
mz_pad	include/zfs/zap_impl.h	/^	uint64_t mz_pad[6];$/;"	m	struct:mzap_phys	typeref:typename:uint64_t[6]
mz_salt	include/zfs/zap_impl.h	/^	uint64_t mz_salt;$/;"	m	struct:mzap_phys	typeref:typename:uint64_t
mzap_ent_phys	include/zfs/zap_impl.h	/^typedef struct mzap_ent_phys {$/;"	s
mzap_ent_phys_t	include/zfs/zap_impl.h	/^} mzap_ent_phys_t;$/;"	t	typeref:struct:mzap_ent_phys
mzap_iterate	fs/zfs/zfs.c	/^mzap_iterate(mzap_phys_t *zapobj, zfs_endian_t endian, int objsize,$/;"	f	typeref:typename:int	file:
mzap_lookup	fs/zfs/zfs.c	/^mzap_lookup(mzap_phys_t *zapobj, zfs_endian_t endian,$/;"	f	typeref:typename:int	file:
mzap_phys	include/zfs/zap_impl.h	/^typedef struct mzap_phys {$/;"	s
mzap_phys_t	include/zfs/zap_impl.h	/^} mzap_phys_t;$/;"	t	typeref:struct:mzap_phys
mze_cd	include/zfs/zap_impl.h	/^	uint32_t mze_cd;$/;"	m	struct:mzap_ent_phys	typeref:typename:uint32_t
mze_name	include/zfs/zap_impl.h	/^	char mze_name[MZAP_NAME_LEN];$/;"	m	struct:mzap_ent_phys	typeref:typename:char[]
mze_pad	include/zfs/zap_impl.h	/^	uint16_t mze_pad;	\/* in case we want to chain them someday *\/$/;"	m	struct:mzap_ent_phys	typeref:typename:uint16_t
mze_value	include/zfs/zap_impl.h	/^	uint64_t mze_value;$/;"	m	struct:mzap_ent_phys	typeref:typename:uint64_t
n	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	u8      n;$/;"	m	struct:pipe3_dpll_params	typeref:typename:u8
n	arch/arm/include/asm/arch-am33xx/clock.h	/^	u32 n;$/;"	m	struct:dpll_params	typeref:typename:u32
n	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int n;$/;"	m	struct:__anonc27596e00108	typeref:typename:unsigned int
n	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int n;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
n	arch/arm/include/asm/omap_common.h	/^	u32 n;$/;"	m	struct:dpll_params	typeref:typename:u32
n	arch/arm/include/asm/setup.h	/^	    char n[1024 - sizeof(unsigned long)];$/;"	m	struct:param_struct::__anon61e8c52b030a::__anon61e8c52b0408	typeref:typename:char[]
n	arch/arm/mach-tegra/cpu.h	/^	u16	n;$/;"	m	struct:clk_pll_table	typeref:typename:u16
n	arch/powerpc/include/asm/mmu.h	/^	unsigned long n:1;	\/* No-execute *\/$/;"	m	struct:_SEGREG	typeref:typename:unsigned long:1
n	drivers/crypto/fsl/rsa_caam.h	/^	const uint8_t *n;	\/* modulus as byte array *\/$/;"	m	struct:pk_in_params	typeref:typename:const uint8_t *
n	drivers/usb/dwc3/ti_usb_phy.c	/^	u8	n;$/;"	m	struct:usb3_dpll_params	typeref:typename:u8	file:
n	drivers/usb/phy/omap_usb_phy.c	/^	u8	n;$/;"	m	struct:usb3_dpll_params	typeref:typename:u8	file:
n	drivers/video/rockchip/rk_hdmi.c	/^	u32 n;$/;"	m	struct:tmds_n_cts	typeref:typename:u32	file:
n	include/linux/bch.h	/^	unsigned int    n;$/;"	m	struct:bch_control	typeref:typename:unsigned int
n	scripts/kconfig/zconf.l	/^n	[A-Za-z0-9_]$/;"	r
n0inv	include/u-boot/rsa-mod-exp.h	/^	uint32_t n0inv;		\/* -1 \/ modulus[0] mod 2^32 *\/$/;"	m	struct:key_prop	typeref:typename:uint32_t
n0inv	include/u-boot/rsa.h	/^	uint32_t n0inv;		\/* -1 \/ modulus[0] mod 2^32 *\/$/;"	m	struct:rsa_public_key	typeref:typename:uint32_t
n2k_inb	drivers/net/8390.h	/^#define n2k_inb(/;"	d
n2k_outb	drivers/net/8390.h	/^#define n2k_outb(/;"	d
nBE0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nBE0	/;"	d
nBE1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nBE1	/;"	d
nCS0	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nCS0	/;"	d
nCS1	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nCS1	/;"	d
nInUse	lib/bzip2/bzlib_private.h	/^      Int32    nInUse;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
nInUse	lib/bzip2/bzlib_private.h	/^      Int32    nInUse;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
nIrq	drivers/usb/musb-new/musb_core.h	/^	int nIrq;$/;"	m	struct:musb	typeref:typename:int
nLLA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nLLA	/;"	d
nLUA	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nLUA	/;"	d
nMTF	lib/bzip2/bzlib_private.h	/^      Int32    nMTF;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
nXCVREN	arch/arm/include/asm/arch-pxa/pxa-regs.h	/^#define	nXCVREN	/;"	d
n_banks_per_sdram_device	include/fsl_ddr_dimm_params.h	/^	unsigned int n_banks_per_sdram_device;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
n_bg_deletions	fs/yaffs2/yaffs_guts.h	/^	int n_bg_deletions;	\/* Count of background deletions. *\/$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:int
n_bg_deletions	fs/yaffs2/yaffs_guts.h	/^	int n_bg_deletions;	\/* Count of background deletions. *\/$/;"	m	struct:yaffs_dev	typeref:typename:int
n_bytes	drivers/spi/rk_spi.c	/^	u8 n_bytes;$/;"	m	struct:rockchip_spi_priv	typeref:typename:u8	file:
n_bytes	fs/yaffs2/yaffs_guts.h	/^	int n_bytes;		\/* Only valid if the cache is dirty *\/$/;"	m	struct:yaffs_cache	typeref:typename:int
n_bytes	fs/yaffs2/yaffs_guts.h	/^	unsigned n_bytes;	\/* Only valid for data chunks *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
n_bytes	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned n_bytes:10;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:10
n_bytes	fs/yaffs2/yaffs_packedtags2.h	/^	unsigned n_bytes;$/;"	m	struct:yaffs_packed_tags2_tags_only	typeref:typename:unsigned
n_bytes	fs/yaffs2/yaffs_summary.c	/^	unsigned n_bytes;$/;"	m	struct:yaffs_summary_tags	typeref:typename:unsigned	file:
n_bytes_lsb	fs/yaffs2/yaffs_guts.h	/^	unsigned n_bytes_lsb:10;$/;"	m	struct:yaffs_tags	typeref:typename:unsigned:10
n_bytes_msb	fs/yaffs2/yaffs_guts.h	/^	unsigned n_bytes_msb:2;$/;"	m	struct:yaffs_tags	typeref:typename:unsigned:2
n_caches	fs/yaffs2/yaffs_guts.h	/^	int n_caches;		\/* If <= 0, then short op caching is disabled,$/;"	m	struct:yaffs_param	typeref:typename:int
n_clean_ups	fs/yaffs2/yaffs_guts.h	/^	u32 n_clean_ups;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_col_addr	include/fsl_ddr_dimm_params.h	/^	unsigned int n_col_addr;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
n_cts_table	drivers/video/rockchip/rk_hdmi.c	/^static const struct tmds_n_cts n_cts_table[] = {$/;"	v	typeref:typename:const struct tmds_n_cts[]	file:
n_data_chunks	fs/yaffs2/yaffs_guts.h	/^	int n_data_chunks;	\/* Number of data chunks for this file. *\/$/;"	m	struct:yaffs_obj	typeref:typename:int
n_data_chunks	fs/yaffs2/yaffs_guts.h	/^	int n_data_chunks;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:int
n_deleted_files	fs/yaffs2/yaffs_guts.h	/^	int n_deleted_files;	\/* Count of files awaiting deletion; *\/$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:int
n_deleted_files	fs/yaffs2/yaffs_guts.h	/^	int n_deleted_files;	\/* Count of files awaiting deletion; *\/$/;"	m	struct:yaffs_dev	typeref:typename:int
n_deletions	fs/yaffs2/yaffs_guts.h	/^	u32 n_deletions;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_ecc_fixed	fs/yaffs2/yaffs_guts.h	/^	u32 n_ecc_fixed;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_ecc_unfixed	fs/yaffs2/yaffs_guts.h	/^	u32 n_ecc_unfixed;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_elem	drivers/block/sata_dwc.h	/^	unsigned int		n_elem;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
n_erase_failures	fs/yaffs2/yaffs_guts.h	/^	u32 n_erase_failures;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_erased_blocks	fs/yaffs2/yaffs_guts.h	/^	int n_erased_blocks;$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:int
n_erased_blocks	fs/yaffs2/yaffs_guts.h	/^	int n_erased_blocks;$/;"	m	struct:yaffs_dev	typeref:typename:int
n_erasures	fs/yaffs2/yaffs_guts.h	/^	u32 n_erasures;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_finger	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u32 n_finger;$/;"	m	struct:tune_train_params	typeref:typename:u32
n_finger_end	drivers/ddr/marvell/a38x/ddr3_training.c	/^	n_finger_start = 11, n_finger_end = 64,$/;"	v	typeref:typename:u32
n_finger_start	drivers/ddr/marvell/a38x/ddr3_training.c	/^	n_finger_start = 11, n_finger_end = 64,$/;"	v	typeref:typename:u32
n_finger_step	drivers/ddr/marvell/a38x/ddr3_training.c	/^	p_finger_step = 3, n_finger_step = 3;$/;"	v	typeref:typename:u32
n_free_chunks	fs/yaffs2/yaffs_guts.h	/^	int n_free_chunks;$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:int
n_free_chunks	fs/yaffs2/yaffs_guts.h	/^	int n_free_chunks;$/;"	m	struct:yaffs_dev	typeref:typename:int
n_free_objects	fs/yaffs2/yaffs_allocator.c	/^	int n_free_objects;$/;"	m	struct:yaffs_allocator	typeref:typename:int	file:
n_free_tnodes	fs/yaffs2/yaffs_allocator.c	/^	int n_free_tnodes;$/;"	m	struct:yaffs_allocator	typeref:typename:int	file:
n_gc_blocks	fs/yaffs2/yaffs_guts.h	/^	u32 n_gc_blocks;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_gc_copies	fs/yaffs2/yaffs_guts.h	/^	u32 n_gc_copies;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_hardlinks	fs/yaffs2/yaffs_guts.h	/^	int n_hardlinks;$/;"	m	struct:yaffs_dev	typeref:typename:int
n_mask	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	n_mask:12;	\/* DIVN_MASK *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:12
n_memranges	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	int n_memranges;$/;"	m	struct:sysinfo_t	typeref:typename:int
n_mmaps	common/dlmalloc.c	/^static unsigned int n_mmaps = 0;$/;"	v	typeref:typename:unsigned int	file:
n_mmaps_max	common/dlmalloc.c	/^static unsigned int  n_mmaps_max      = DEFAULT_MMAP_MAX;$/;"	v	typeref:typename:unsigned int	file:
n_obj	fs/yaffs2/yaffs_guts.h	/^	int n_obj;$/;"	m	struct:yaffs_dev	typeref:typename:int
n_obj_created	fs/yaffs2/yaffs_allocator.c	/^	int n_obj_created;$/;"	m	struct:yaffs_allocator	typeref:typename:int	file:
n_opcodes	include/bedbug/tables.h	/^const unsigned int n_opcodes = sizeof(opcodes) \/ sizeof(opcodes[0]);$/;"	v	typeref:typename:const unsigned int
n_operands	include/bedbug/tables.h	/^const unsigned int n_operands = sizeof(operands) \/ sizeof(operands[0]);$/;"	v	typeref:typename:const unsigned int
n_page_reads	fs/yaffs2/yaffs_guts.h	/^	u32 n_page_reads;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_page_writes	fs/yaffs2/yaffs_guts.h	/^	u32 n_page_writes;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_pins	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^	const int 			n_pins;$/;"	m	struct:pinmux_resource	typeref:typename:const int
n_ports	drivers/block/sata_dwc.h	/^	unsigned int		n_ports;$/;"	m	struct:ata_host	typeref:typename:unsigned int
n_ports	include/ahci.h	/^	u32	n_ports;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
n_priv_flags	include/linux/ethtool.h	/^	__u32	n_priv_flags;	\/* number of flags valid in ETHTOOL_GPFLAGS *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:__u32
n_ranks	board/freescale/b4860qds/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/corenet_ds/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/ls1021aqds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls1043aqds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls1043ardb/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls1046aqds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls1046ardb/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls2080a/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls2080aqds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/ls2080ardb/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/mpc8349emds/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/mpc8572ds/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/mpc8641hpcn/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/p1022ds/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/p2041rdb/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/t102xqds/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/t102xrdb/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	board/freescale/t1040qds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/t104xrdb/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/t208xqds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/t208xrdb/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/t4qds/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/freescale/t4rdb/ddr.h	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
n_ranks	board/varisys/cyrus/ddr.c	/^	u32 n_ranks;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
n_ranks	include/fsl_ddr_dimm_params.h	/^	unsigned int n_ranks;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
n_reserved_blocks	fs/yaffs2/yaffs_guts.h	/^	int n_reserved_blocks;	\/* Tuneable so that we can reduce$/;"	m	struct:yaffs_param	typeref:typename:int
n_retired_blocks	fs/yaffs2/yaffs_guts.h	/^	u32 n_retired_blocks;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_retried_writes	fs/yaffs2/yaffs_guts.h	/^	u32 n_retried_writes;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_row_addr	include/fsl_ddr_dimm_params.h	/^	unsigned int n_row_addr;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
n_sectors	drivers/block/sata_dwc.h	/^	u64			n_sectors;$/;"	m	struct:ata_device	typeref:typename:u64
n_shift	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	n_shift:5;	\/* DIVN_SHIFT *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:5
n_siz	drivers/crypto/fsl/rsa_caam.h	/^	uint32_t n_siz;		\/* size of n[] in number of bytes *\/$/;"	m	struct:pk_in_params	typeref:typename:uint32_t
n_sprs	include/bedbug/tables.h	/^const unsigned int n_sprs = sizeof(spr_map) \/ sizeof(spr_map[0]);$/;"	v	typeref:typename:const unsigned int
n_stats	include/linux/ethtool.h	/^	__u32	n_stats;	\/* number of u64's being returned *\/$/;"	m	struct:ethtool_stats	typeref:typename:__u32
n_stats	include/linux/ethtool.h	/^	__u32	n_stats;	\/* number of u64's from ETHTOOL_GSTATS *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:__u32
n_tags_ecc_fixed	fs/yaffs2/yaffs_guts.h	/^	u32 n_tags_ecc_fixed;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_tags_ecc_unfixed	fs/yaffs2/yaffs_guts.h	/^	u32 n_tags_ecc_unfixed;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_tnodes	fs/yaffs2/yaffs_guts.h	/^	int n_tnodes;$/;"	m	struct:yaffs_dev	typeref:typename:int
n_tnodes_created	fs/yaffs2/yaffs_allocator.c	/^	int n_tnodes_created;$/;"	m	struct:yaffs_allocator	typeref:typename:int	file:
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n_unmarked_deletions	fs/yaffs2/yaffs_guts.h	/^	u32 n_unmarked_deletions;$/;"	m	struct:yaffs_dev	typeref:typename:u32
n_vid0	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	n_vid0;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
n_vid1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	n_vid1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
n_vid2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	n_vid2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
n_vid_0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	n_vid_0;$/;"	m	struct:rk3288_edp	typeref:typename:u32
n_vid_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	n_vid_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
n_vid_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	n_vid_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
na1	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	na1;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
na2	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	na2;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
name	api/api_storage.c	/^	char		*name;$/;"	m	struct:stor_spec	typeref:typename:char *	file:
name	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^	const char *name;$/;"	m	struct:refclk_lkup	typeref:typename:const char *	file:
name	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	const char *name;$/;"	m	struct:clk	typeref:typename:const char *
name	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^	const char *name;$/;"	m	struct:refclk_lkup	typeref:typename:const char *	file:
name	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	const char *name;$/;"	m	struct:clk	typeref:typename:const char *
name	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	char name[15];$/;"	m	struct:cpu_type	typeref:typename:char[15]
name	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t name[MRQ_CLK_NAME_MAXLEN];$/;"	m	struct:cmd_clk_get_all_info_response	typeref:typename:uint8_t[]
name	arch/arm/include/asm/imx-common/boot_mode.h	/^	const char *name;$/;"	m	struct:boot_mode	typeref:typename:const char *
name	arch/arm/include/asm/imx-common/dma.h	/^	const char *name;$/;"	m	struct:mxs_dma_chan	typeref:typename:const char *
name	arch/arm/mach-exynos/include/mach/dp_info.h	/^	char *name;$/;"	m	struct:edp_disp_info	typeref:typename:char *
name	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	char			*name;$/;"	m	struct:mipi_dsim_lcd_device	typeref:typename:char *
name	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	char			*name;$/;"	m	struct:mipi_dsim_lcd_driver	typeref:typename:char *
name	arch/arm/mach-rockchip/rk3288-board.c	/^		char *name;$/;"	m	struct:do_clock::__anon78e9bd210108	typeref:typename:char *	file:
name	arch/arm/mach-socfpga/misc.c	/^	const char	*name;$/;"	m	struct:__anon0d396cd60108	typeref:typename:const char *	file:
name	arch/arm/mach-socfpga/misc.c	/^	const char	*name;$/;"	m	struct:__anon0d396cd60208	typeref:typename:const char *	file:
name	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const char *name;$/;"	m	struct:tegra_xusb_padctl_config	typeref:typename:const char *
name	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const char *name;$/;"	m	struct:tegra_xusb_padctl_group	typeref:typename:const char *
name	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const char *name;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:const char *
name	arch/arm/mach-zynq/clk.c	/^	char		*name;$/;"	m	struct:clk	typeref:typename:char *	file:
name	arch/blackfin/cpu/gpio.c	/^	char name[RESOURCE_LABEL_SIZE];$/;"	m	struct:str_ident	typeref:typename:char[]	file:
name	arch/powerpc/cpu/mpc83xx/cpu.c	/^		char name[15];$/;"	m	struct:checkcpu::cpu_type	typeref:typename:char[15]	file:
name	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	char *name;$/;"	m	struct:cpu_register	typeref:typename:char *	file:
name	arch/powerpc/include/asm/processor.h	/^	char name[15];$/;"	m	struct:cpu_type	typeref:typename:char[15]
name	arch/sandbox/include/asm/state.h	/^	const char *name;$/;"	m	struct:sandbox_state_io	typeref:typename:const char *
name	arch/sparc/cpu/leon2/prom.c	/^	char *name;$/;"	m	struct:property	typeref:typename:char *	file:
name	arch/sparc/cpu/leon3/prom.c	/^	char *name;$/;"	m	struct:property	typeref:typename:char *	file:
name	arch/sparc/include/asm/machines.h	/^	char *name;$/;"	m	struct:Sun_Machine_Models	typeref:typename:char *
name	arch/x86/cpu/cpu.c	/^	const char *name;$/;"	m	struct:__anonbde166970108	typeref:typename:const char *	file:
name	arch/x86/include/asm/coreboot_tables.h	/^	u8 name[CMOS_MAX_NAME_LENGTH];$/;"	m	struct:cb_cmos_defaults	typeref:typename:u8[]
name	arch/x86/include/asm/coreboot_tables.h	/^	u8 name[CMOS_MAX_NAME_LENGTH];$/;"	m	struct:cb_cmos_entries	typeref:typename:u8[]
name	arch/x86/include/asm/coreboot_tables.h	/^	u8 name[GPIO_MAX_NAME_LENGTH];$/;"	m	struct:cb_gpio	typeref:typename:u8[]
name	arch/x86/include/asm/fsp/fsp_ffs.h	/^	struct efi_guid		name;$/;"	m	struct:ffs_file_header	typeref:struct:efi_guid
name	arch/x86/include/asm/fsp/fsp_ffs.h	/^	struct efi_guid		name;$/;"	m	struct:ffs_file_header2	typeref:struct:efi_guid
name	arch/x86/include/asm/fsp/fsp_hob.h	/^	struct efi_guid		name;$/;"	m	struct:hob_guid	typeref:struct:efi_guid
name	arch/x86/include/asm/fsp/fsp_hob.h	/^	struct efi_guid		name;$/;"	m	struct:hob_mem_alloc	typeref:struct:efi_guid
name	arch/x86/include/asm/sfi.h	/^	char	name[SFI_NAME_LEN];$/;"	m	struct:sfi_device_table_entry	typeref:typename:char[]
name	board/birdland/bav335x/board.h	/^	char name[HDR_NAME_LEN];	\/* BAV3354 *\/$/;"	m	struct:board_eeconfig	typeref:typename:char[]
name	board/boundary/nitrogen6x/nitrogen6x.c	/^	char const	*name;$/;"	m	struct:button_key	typeref:typename:char const *	file:
name	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	char *name;$/;"	m	struct:interface_level	typeref:typename:char *	file:
name	board/gateworks/gw_ventana/ventana_eeprom.h	/^	const char *name;	\/* name of item *\/$/;"	m	struct:ventana_eeprom_config	typeref:typename:const char *
name	board/gdsys/common/ihs_mdio.h	/^	char *name;$/;"	m	struct:ihs_mdio_info	typeref:typename:char *
name	board/logicpd/omap3som/omap3logic.c	/^	char *name;$/;"	m	struct:board_id	typeref:typename:char *	file:
name	board/nokia/rx51/tag_omap.h	/^	char name[12];$/;"	m	struct:omap_gpio_switch_config	typeref:typename:char[12]
name	board/nokia/rx51/tag_omap.h	/^	char name[16];$/;"	m	struct:omap_partition_config	typeref:typename:char[16]
name	board/raspberrypi/rpi/rpi.c	/^	const char *name;$/;"	m	struct:rpi_model	typeref:typename:const char *	file:
name	board/ti/common/board_detect.h	/^	char name[DRA7_EEPROM_HDR_NAME_LEN];$/;"	m	struct:dra7_eeprom	typeref:typename:char[]
name	board/ti/common/board_detect.h	/^	char name[TI_EEPROM_HDR_NAME_LEN + 1];$/;"	m	struct:ti_common_eeprom	typeref:typename:char[]
name	board/ti/common/board_detect.h	/^	char name[TI_EEPROM_HDR_NAME_LEN];$/;"	m	struct:ti_am_eeprom	typeref:typename:char[]
name	board/vscom/baltos/board.h	/^	char name[HDR_NAME_LEN];$/;"	m	struct:am335x_baseboard_id	typeref:typename:char[]
name	board/xilinx/zynqmp/zynqmp.c	/^	char *name;$/;"	m	struct:__anon82c498450108	typeref:typename:char *	file:
name	cmd/ambapp.c	/^	char *name;$/;"	m	struct:__anon3d6428ea0108	typeref:typename:char *	file:
name	cmd/ambapp.c	/^	char *name;$/;"	m	struct:__anon3d6428ea0208	typeref:typename:char *	file:
name	cmd/armflash.c	/^	const char *name;$/;"	m	struct:afs_image	typeref:typename:const char *	file:
name	cmd/efi.c	/^	const char *name;$/;"	m	struct:attr_info	typeref:typename:const char *	file:
name	cmd/fdc.c	/^	const char	* name;	\/* used only for predefined formats *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:const char *	file:
name	cmd/mii.c	/^	char * name;$/;"	m	struct:_MII_field_desc_t	typeref:typename:char *	file:
name	cmd/mii.c	/^	char * name;$/;"	m	struct:_MII_reg_desc_t	typeref:typename:char *	file:
name	cmd/pci.c	/^	const char *name;$/;"	m	struct:pci_reg_info	typeref:typename:const char *	file:
name	cmd/pxe.c	/^	char *name;$/;"	m	struct:pxe_label	typeref:typename:char *	file:
name	common/bootstage.c	/^	const char *name;$/;"	m	struct:bootstage_record	typeref:typename:const char *	file:
name	common/cli_hush.c	/^	char *name;$/;"	m	struct:variables	typeref:typename:char *	file:
name	common/env_nand.c	/^	const char *name;$/;"	m	struct:env_location	typeref:typename:const char *	file:
name	common/fdt_support.c	/^	const char	*name;$/;"	m	struct:of_bus	typeref:typename:const char *	file:
name	common/spl/spl.c	/^	const char *name;$/;"	m	struct:boot_device_name	typeref:typename:const char *	file:
name	disk/part_mac.h	/^	uchar	name[32];	\/* partition name			*\/$/;"	m	struct:mac_partition	typeref:typename:uchar[32]
name	drivers/block/fsl_sata.h	/^	char		name[12];$/;"	m	struct:fsl_sata	typeref:typename:char[12]
name	drivers/block/sata_mv.c	/^	char name[12];$/;"	m	struct:mv_priv	typeref:typename:char[12]	file:
name	drivers/block/sata_sil.h	/^	char	name[12];$/;"	m	struct:sil_sata	typeref:typename:char[12]
name	drivers/core/devres.c	/^	const char			*name;$/;"	m	struct:devres	typeref:typename:const char *	file:
name	drivers/crypto/fsl/fsl_hash.c	/^	char name[CRYPTO_MAX_ALG_NAME];$/;"	m	struct:caam_hash_template	typeref:typename:char[]	file:
name	drivers/fpga/altera.c	/^	const char		*name;$/;"	m	struct:altera_fpga	typeref:typename:const char *	file:
name	drivers/gpio/adi_gpio2.c	/^	char name[RESOURCE_LABEL_SIZE];$/;"	m	struct:str_ident	typeref:typename:char[]	file:
name	drivers/gpio/da8xx_gpio.c	/^	char name[GPIO_NAME_SIZE];$/;"	m	struct:gpio_registry	typeref:typename:char[]	file:
name	drivers/gpio/dwapb_gpio.c	/^	const char	*name;$/;"	m	struct:gpio_dwapb_platdata	typeref:typename:const char *	file:
name	drivers/gpio/mvebu_gpio.c	/^	char name[2];$/;"	m	struct:mvebu_gpio_priv	typeref:typename:char[2]	file:
name	drivers/gpio/pic32_gpio.c	/^	char name[2];$/;"	m	struct:pic32_gpio_priv	typeref:typename:char[2]	file:
name	drivers/gpio/rk_gpio.c	/^	char name[2];$/;"	m	struct:rockchip_gpio_priv	typeref:typename:char[2]	file:
name	drivers/gpio/tegra186_gpio.c	/^	const char *name;$/;"	m	struct:tegra186_gpio_platdata	typeref:typename:const char *	file:
name	drivers/gpio/tegra186_gpio.c	/^	const char *name;$/;"	m	struct:tegra186_gpio_port_data	typeref:typename:const char *	file:
name	drivers/gpio/xilinx_gpio.c	/^	char name[GPIO_NAME_SIZE];$/;"	m	struct:gpio_names	typeref:typename:char[]	file:
name	drivers/gpio/xilinx_gpio.c	/^	char name[GPIO_NAME_SIZE];$/;"	m	struct:xilinx_gpio_priv	typeref:typename:char[]	file:
name	drivers/mmc/arm_pl180_mmci.h	/^	char name[32];$/;"	m	struct:pl180_mmc_host	typeref:typename:char[32]
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name	drivers/mtd/spi/sf_dataflash.c	/^	char		*name;$/;"	m	struct:flash_info	typeref:typename:char *	file:
name	drivers/mtd/spi/sf_internal.h	/^	const char *name;$/;"	m	struct:spi_flash_params	typeref:typename:const char *
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name	drivers/mtd/ubi/ubi-media.h	/^	char    name[UBI_VOL_NAME_MAX+1];$/;"	m	struct:ubi_vtbl_record	typeref:typename:char[]
name	drivers/mtd/ubi/ubi.h	/^	char name[UBI_VOL_NAME_MAX + 1];$/;"	m	struct:ubi_volume	typeref:typename:char[]
name	drivers/net/davinci_emac.h	/^	char	name[64];$/;"	m	struct:__anon759824920408	typeref:typename:char[64]
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name	drivers/net/phy/micrel.c	/^	const char	*name;$/;"	m	struct:ksz90x1_reg_field	typeref:typename:const char *	file:
name	drivers/net/rtl8169.c	/^	const char *name;$/;"	m	struct:__anon571e08a40108	typeref:typename:const char *	file:
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name	drivers/pinctrl/meson/pinctrl-meson.h	/^	const char *name;$/;"	m	struct:meson_pinctrl_data	typeref:typename:const char *
name	drivers/pinctrl/meson/pinctrl-meson.h	/^	const char *name;$/;"	m	struct:meson_pmx_func	typeref:typename:const char *
name	drivers/pinctrl/meson/pinctrl-meson.h	/^	const char *name;$/;"	m	struct:meson_pmx_group	typeref:typename:const char *
name	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	char *name;$/;"	m	struct:rockchip_pin_bank	typeref:typename:char *	file:
name	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	const char *name;$/;"	m	struct:uniphier_pinctrl_group	typeref:typename:const char *
name	drivers/power/regulator/pfuze100.c	/^	char *name;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:char *	file:
name	drivers/qe/uec_phy.c	/^	char name[16];	\/* ethernet port name *\/$/;"	m	struct:fixed_phy_port	typeref:typename:char[16]	file:
name	drivers/qe/uec_phy.h	/^	char *name;$/;"	m	struct:phy_info	typeref:typename:char *
name	drivers/usb/dwc3/core.h	/^	char			name[20];$/;"	m	struct:dwc3_ep	typeref:typename:char[20]
name	drivers/usb/musb-new/musb_gadget.h	/^	char				name[12];$/;"	m	struct:musb_ep	typeref:typename:char[12]
name	drivers/video/ati_radeon_fb.h	/^	char name[20];$/;"	m	struct:radeonfb_info	typeref:typename:char[20]
name	drivers/video/console_truetype.c	/^	char *name;$/;"	m	struct:font_info	typeref:typename:char *	file:
name	drivers/video/da8xx-fb.h	/^	const char	name[25];	\/* Full name <vendor>_<model> *\/$/;"	m	struct:da8xx_panel	typeref:typename:const char[25]
name	drivers/video/ipu.h	/^	const char *name;$/;"	m	struct:clk	typeref:typename:const char *
name	fs/fs.c	/^	char *name;$/;"	m	struct:fstype_info	typeref:typename:char *	file:
name	fs/jffs2/summary.h	/^	uint8_t name[0];	\/* dirent name *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:uint8_t[0]
name	fs/jffs2/summary.h	/^	uint8_t name[0];	\/* dirent name *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:uint8_t[0]
name	fs/ubifs/ubifs-media.h	/^	__u8 name[];$/;"	m	struct:ubifs_dent_node	typeref:typename:__u8[]
name	fs/ubifs/ubifs-media.h	/^	char name[];$/;"	m	struct:ubifs_dent_node	typeref:typename:char[]
name	fs/ubifs/ubifs.h	/^	char *name;$/;"	m	struct:qstr	typeref:typename:char *
name	fs/ubifs/ubifs.h	/^	const char *name;$/;"	m	struct:file_system_type	typeref:typename:const char *
name	fs/ubifs/ubifs.h	/^	const char *name;$/;"	m	struct:qstr	typeref:typename:const char *
name	fs/ubifs/ubifs.h	/^	const char *name;$/;"	m	struct:ubifs_compressor	typeref:typename:const char *
name	fs/yaffs2/yaffs_guts.h	/^	YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];$/;"	m	struct:yaffs_obj_hdr	typeref:typename:YCHAR[]
name	fs/yaffs2/yaffs_guts.h	/^	const YCHAR *name;$/;"	m	struct:yaffs_param	typeref:typename:const YCHAR *
name	fs/yaffs2/yaffs_guts.h	/^	const YCHAR *name;$/;"	m	struct:yaffs_xattr_mod	typeref:typename:const YCHAR *
name	fs/yaffs2/yaffsfs.c	/^	YCHAR name[NAME_MAX + 1];	\/* name of directory being searched *\/$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:typename:YCHAR[]	file:
name	fs/zfs/zfs.c	/^	char *name;$/;"	m	struct:decomp_entry	typeref:typename:char *	file:
name	include/android_image.h	/^	char name[ANDR_BOOT_NAME_SIZE]; \/* asciiz product name *\/$/;"	m	struct:andr_img_hdr	typeref:typename:char[]
name	include/asm-generic/gpio.h	/^	char **name;$/;"	m	struct:gpio_dev_priv	typeref:typename:char **
name	include/bedbug/ppc.h	/^  char *	name;		\/* Symbolic name of this operand *\/$/;"	m	struct:operand	typeref:typename:char *
name	include/bedbug/ppc.h	/^  char *	name;		\/* The symbolic name of this opcode *\/$/;"	m	struct:opcode	typeref:typename:char *
name	include/cbfs.h	/^	char *name;$/;"	m	struct:cbfs_cachenode	typeref:typename:char *
name	include/command.h	/^	char		*name;		\/* Command Name			*\/$/;"	m	struct:cmd_tbl_s	typeref:typename:char *
name	include/cramfs/cramfs_fs.h	/^	u8 name[16];			\/* user-defined name *\/$/;"	m	struct:cramfs_super	typeref:typename:u8[16]
name	include/dfu.h	/^	char			name[DFU_NAME_SIZE];$/;"	m	struct:dfu_entity	typeref:typename:char[]
name	include/dm/device.h	/^	char *name;$/;"	m	struct:driver	typeref:typename:char *
name	include/dm/device.h	/^	const char *name;$/;"	m	struct:udevice	typeref:typename:const char *
name	include/dm/platdata.h	/^	const char *name;$/;"	m	struct:driver_info	typeref:typename:const char *
name	include/dm/uclass.h	/^	const char *name;$/;"	m	struct:uclass_driver	typeref:typename:const char *
name	include/dwmmc.h	/^	const char *name;$/;"	m	struct:dwmci_host	typeref:typename:const char *
name	include/ec_commands.h	/^	char name[32];$/;"	m	struct:ec_params_gpio_get	typeref:typename:char[32]
name	include/ec_commands.h	/^	char name[32];$/;"	m	struct:ec_params_gpio_set	typeref:typename:char[32]
name	include/ec_commands.h	/^	char name[32];$/;"	m	struct:ec_response_get_chip_info	typeref:typename:char[32]
name	include/eeprom_field.h	/^	char *name;$/;"	m	struct:eeprom_field	typeref:typename:char *
name	include/env_callback.h	/^	const char *name;		\/* Callback name *\/$/;"	m	struct:env_clbk_tbl	typeref:typename:const char *
name	include/fat.h	/^	char	name[8],ext[3];	\/* Name and extension *\/$/;"	m	struct:dir_entry	typeref:typename:char[8]
name	include/fat.h	/^	const char		name[12];$/;"	m	struct:filesystem	typeref:typename:const char[12]
name	include/fdt.h	/^	char name[0];$/;"	m	struct:fdt_node_header	typeref:typename:char[0]
name	include/flash.h	/^	const char *name;		\/* human-readable name	                *\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:const char *
name	include/fm_eth.h	/^	char *name;$/;"	m	struct:memac_mdio_info	typeref:typename:char *
name	include/fm_eth.h	/^	char *name;$/;"	m	struct:tgec_mdio_info	typeref:typename:char *
name	include/fsl_devdis.h	/^	char name[32];$/;"	m	struct:devdis_table	typeref:typename:char[32]
name	include/fsl_mdio.h	/^	char *name;$/;"	m	struct:fsl_pq_mdio_info	typeref:typename:char *
name	include/fsl_secboot_err.h	/^	const char *name;$/;"	m	struct:fsl_secboot_errcode	typeref:typename:const char *
name	include/hash.h	/^	const char *name;			\/* Name of algorithm *\/$/;"	m	struct:hash_algo	typeref:typename:const char *
name	include/i2c.h	/^	char		*name;$/;"	m	struct:i2c_adapter	typeref:typename:char *
name	include/i2c.h	/^	char	name[16];$/;"	m	struct:i2c_mux	typeref:typename:char[16]
name	include/image.h	/^	const char *name;		\/* Name of algorithm *\/$/;"	m	struct:image_sig_algo	typeref:typename:const char *
name	include/image.h	/^	const char *name;$/;"	m	struct:checksum_algo	typeref:typename:const char *
name	include/jffs2/jffs2.h	/^	__u8 name[0];$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u8[0]
name	include/jffs2/load_kernel.h	/^	char *name;			\/* partition name *\/$/;"	m	struct:part_info	typeref:typename:char *
name	include/linux/fb.h	/^	const char *name;	\/* optional *\/$/;"	m	struct:fb_videomode	typeref:typename:const char *
name	include/linux/ioport.h	/^	const char *name;$/;"	m	struct:resource	typeref:typename:const char *
name	include/linux/mtd/mtd.h	/^	char *name;$/;"	m	struct:mtd_info	typeref:typename:char *
name	include/linux/mtd/mtd.h	/^	const char *name;$/;"	m	struct:mtd_info	typeref:typename:const char *
name	include/linux/mtd/nand.h	/^	char *name;$/;"	m	struct:nand_flash_dev	typeref:typename:char *
name	include/linux/mtd/nand.h	/^	char *name;$/;"	m	struct:nand_manufacturers	typeref:typename:char *
name	include/linux/mtd/onenand.h	/^	char *name;$/;"	m	struct:onenand_manufacturers	typeref:typename:char *
name	include/linux/mtd/partitions.h	/^	const char *name;		\/* identifier string *\/$/;"	m	struct:mtd_partition	typeref:typename:const char *
name	include/linux/mtd/partitions.h	/^	const char *name;$/;"	m	struct:mtd_part_parser	typeref:typename:const char *
name	include/linux/mtd/ubi.h	/^	const char *name;$/;"	m	struct:ubi_volume_info	typeref:typename:const char *
name	include/linux/usb/atmel_usba_udc.h	/^	char *name;$/;"	m	struct:usba_ep_data	typeref:typename:char *
name	include/linux/usb/composite.h	/^	const char				*name;$/;"	m	struct:usb_composite_driver	typeref:typename:const char *
name	include/linux/usb/composite.h	/^	const char			*name;$/;"	m	struct:usb_function	typeref:typename:const char *
name	include/linux/usb/gadget.h	/^	const char			*name;$/;"	m	struct:usb_gadget	typeref:typename:const char *
name	include/linux/usb/gadget.h	/^	const char		*name;$/;"	m	struct:usb_ep	typeref:typename:const char *
name	include/linux/usb/musb.h	/^	const char	name[16];$/;"	m	struct:musb_hdrc_eps_bits	typeref:typename:const char[16]
name	include/miiphy.h	/^	char name[16];$/;"	m	struct:bb_miiphy_bus	typeref:typename:char[16]
name	include/mmc.h	/^	const char *name;$/;"	m	struct:mmc_config	typeref:typename:const char *
name	include/mtd/ubi-user.h	/^		char    name[UBI_MAX_VOLUME_NAME + 1];$/;"	m	struct:ubi_rnvol_req::__anon7822496e0308	typeref:typename:char[]
name	include/mtd/ubi-user.h	/^	char name[UBI_MAX_VOLUME_NAME + 1];$/;"	m	struct:ubi_mkvol_req	typeref:typename:char[]
name	include/net.h	/^	char name[16];$/;"	m	struct:eth_device	typeref:typename:char[16]
name	include/os.h	/^	char name[0];			\/* Name of entry *\/$/;"	m	struct:os_dirent_node	typeref:typename:char[0]
name	include/part.h	/^	char *name;$/;"	m	struct:block_drvr	typeref:typename:char *
name	include/part.h	/^	const char *name;$/;"	m	struct:part_driver	typeref:typename:const char *
name	include/part.h	/^	uchar	name[32];	\/* partition name			*\/$/;"	m	struct:disk_partition	typeref:typename:uchar[32]
name	include/phy.h	/^	char *name;$/;"	m	struct:phy_driver	typeref:typename:char *
name	include/phy.h	/^	char name[MDIO_NAME_LEN];$/;"	m	struct:mii_dev	typeref:typename:char[]
name	include/post.h	/^	char *name;$/;"	m	struct:post_test	typeref:typename:char *
name	include/power/act8846_pmic.h	/^	char	*name;$/;"	m	struct:act8846_reg_table	typeref:typename:char *
name	include/power/pmic.h	/^	const char *name;$/;"	m	struct:pmic	typeref:typename:const char *
name	include/power/regulator.h	/^	const char *name;$/;"	m	struct:dm_regulator_mode	typeref:typename:const char *
name	include/power/regulator.h	/^	const char *name;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:const char *
name	include/power/rk808_pmic.h	/^	char *name;$/;"	m	struct:rk808_reg_table	typeref:typename:char *
name	include/qfw.h	/^	char name[FW_CFG_MAX_FILE_PATH];$/;"	m	struct:fw_cfg_file	typeref:typename:char[]
name	include/remoteproc.h	/^	const char *name;$/;"	m	struct:dm_rproc_uclass_pdata	typeref:typename:const char *
name	include/samsung/exynos5-dt-types.h	/^	const char *name;$/;"	m	struct:odroid_rev_info	typeref:typename:const char *
name	include/sdhci.h	/^	const char *name;$/;"	m	struct:sdhci_host	typeref:typename:const char *
name	include/serial.h	/^	char	name[16];$/;"	m	struct:serial_device	typeref:typename:char[16]
name	include/sh_pfc.h	/^	char *name;$/;"	m	struct:pinmux_info	typeref:typename:char *
name	include/spi_flash.h	/^	const char *name;$/;"	m	struct:spi_flash	typeref:typename:const char *
name	include/spl.h	/^	const char *name;$/;"	m	struct:spl_image_info	typeref:typename:const char *
name	include/splash.h	/^	char *name;$/;"	m	struct:splash_location	typeref:typename:char *
name	include/stdio_dev.h	/^	char	name[32];		\/* Device name				*\/$/;"	m	struct:stdio_dev	typeref:typename:char[32]
name	include/test/test.h	/^	const char *name;$/;"	m	struct:unit_test	typeref:typename:const char *
name	include/u-boot/zlib.h	/^	Bytef	*name; \/* pointer to zero-terminated file name or Z_NULL *\/$/;"	m	struct:gz_header_s	typeref:typename:Bytef *
name	include/usb_mass_storage.h	/^	const char *name;$/;"	m	struct:ums	typeref:typename:const char *
name	include/usbdevice.h	/^	char *name;$/;"	m	struct:usb_device_instance	typeref:typename:char *
name	include/vsc9953.h	/^	char	*name;$/;"	m	struct:vsc9953_mdio_info	typeref:typename:char *
name	include/xilinx.h	/^	char *name;		\/* device name in bitstream *\/$/;"	m	struct:__anon15c234ca0308	typeref:typename:char *
name	lib/slre.c	/^	const char	*name;$/;"	m	struct:__anon5875e6120208	typeref:typename:const char *	file:
name	post/board/lwmon5/sysmon.c	/^	char		*name;$/;"	m	struct:sysmon_table_s	typeref:typename:char *	file:
name	post/cpu/mpc8xx/spr.c	/^    char * name;$/;"	m	struct:__anonf88dfa8e0108	typeref:typename:char *	file:
name	post/cpu/ppc4xx/spr.c	/^	char * name;$/;"	m	struct:__anonb9764ead0108	typeref:typename:char *	file:
name	scripts/basic/fixdep.c	/^	char		name[0];$/;"	m	struct:item	typeref:typename:char[0]	file:
name	scripts/docproc.c	/^	char *name;$/;"	m	struct:symbols	typeref:typename:char *	file:
name	scripts/kconfig/expr.h	/^	char *name;$/;"	m	struct:symbol	typeref:typename:char *
name	scripts/kconfig/expr.h	/^	const char *name;$/;"	m	struct:file	typeref:typename:const char *
name	scripts/kconfig/lkc.h	/^	int name;$/;"	m	struct:kconf_id	typeref:typename:int
name	scripts/mailmapper	/^        name = ''$/;"	v
name	tools/imagetool.h	/^	char *name;$/;"	m	struct:image_type_params	typeref:typename:char *
name	tools/kwbimage.c	/^	const char *name;$/;"	m	struct:boot_mode	typeref:typename:const char *	file:
name	tools/kwbimage.c	/^	const char *name;$/;"	m	struct:nand_ecc_mode	typeref:typename:const char *	file:
name	tools/mxsimage.h	/^	const char	*name;$/;"	m	struct:__anonc4848c960c08	typeref:typename:const char *
name	tools/proftool.c	/^	const char *name;	\/* identifier name \/ wildcard *\/$/;"	m	struct:trace_configline_info	typeref:typename:const char *	file:
name	tools/proftool.c	/^	const char *name;$/;"	m	struct:func_info	typeref:typename:const char *	file:
name	tools/rkmux.py	/^name = sys.argv[2]$/;"	v
name0_4	include/fat.h	/^	__u8	name0_4[10];	\/* First 5 characters in name *\/$/;"	m	struct:dir_slot	typeref:typename:__u8[10]
name11_12	include/fat.h	/^	__u8	name11_12[4];	\/* Last 2 characters in name *\/$/;"	m	struct:dir_slot	typeref:typename:__u8[4]
name5_10	include/fat.h	/^	__u8	name5_10[12];	\/* 6 more characters in name *\/$/;"	m	struct:dir_slot	typeref:typename:__u8[12]
nameColIdx	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
name_crc	include/jffs2/jffs2.h	/^	__u32 name_crc;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
name_len	drivers/mtd/ubi/ubi-media.h	/^	__be16  name_len;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__be16
name_len	drivers/mtd/ubi/ubi.h	/^	int name_len;$/;"	m	struct:ubi_volume	typeref:typename:int
name_len	include/linux/mtd/ubi.h	/^	int name_len;$/;"	m	struct:ubi_volume_info	typeref:typename:int
name_len	include/mtd/ubi-user.h	/^		__s16 name_len;$/;"	m	struct:ubi_rnvol_req::__anon7822496e0308	typeref:typename:__s16
name_len	include/mtd/ubi-user.h	/^	__s16 name_len;$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s16
name_length	arch/x86/include/asm/coreboot_tables.h	/^	u32 name_length;$/;"	m	struct:cb_cmos_defaults	typeref:typename:u32
name_length	include/cbfs.h	/^	u32 name_length;$/;"	m	struct:cbfs_cachenode	typeref:typename:u32
name_max	include/u-boot/zlib.h	/^	uInt	name_max; \/* space at name (only when reading header) *\/$/;"	m	struct:gz_header_s	typeref:typename:uInt
name_string	drivers/usb/host/xhci.h	/^	u32	name_string;$/;"	m	struct:xhci_protocol_caps	typeref:typename:u32
name_to_clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define name_to_clk(/;"	d
name_to_clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define name_to_clk(/;"	d
name_to_gpio	arch/arm/include/asm/arch-sunxi/gpio.h	/^#define name_to_gpio(/;"	d
name_to_gpio	arch/arm/include/asm/arch/gpio.h	/^#define name_to_gpio(/;"	d
name_to_gpio	arch/blackfin/cpu/gpio.c	/^int name_to_gpio(const char *name)$/;"	f	typeref:typename:int
name_to_gpio	board/Arcturus/ucp1020/ucp1020.c	/^int name_to_gpio(const char *name)$/;"	f	typeref:typename:int
name_to_gpio	cmd/gpio.c	/^__weak int name_to_gpio(const char *name)$/;"	f	typeref:typename:__weak int
name_to_gpio	drivers/gpio/mxs_gpio.c	/^int name_to_gpio(const char *name)$/;"	f	typeref:typename:int
namelen	include/cramfs/cramfs_fs.h	/^	u32 namelen:CRAMFS_NAMELEN_WIDTH, offset:CRAMFS_OFFSET_WIDTH;$/;"	m	struct:cramfs_inode	typeref:typename:u32
namelen	include/ext_common.h	/^	__u8 namelen;$/;"	m	struct:ext2_dirent	typeref:typename:__u8
nameoff	include/fdt.h	/^	fdt32_t nameoff;$/;"	m	struct:fdt_property	typeref:typename:fdt32_t
nand	arch/arm/dts/armada-375-db.dts	/^			nand: nand@d0000 {$/;"	l
nand	arch/arm/dts/tegra20.dtsi	/^	nand: nand-controller@70008000 {$/;"	l
nand	arch/arm/dts/uniphier-common32.dtsi	/^		nand: nand@68000000 {$/;"	l
nand	arch/arm/dts/uniphier-sld3.dtsi	/^		nand: nand@f8000000 {$/;"	l
nand	drivers/mtd/nand/denali.h	/^	struct nand_chip nand;$/;"	m	struct:denali_nand_info	typeref:struct:nand_chip
nand	drivers/mtd/nand/mxc_nand.c	/^	struct nand_chip		*nand;$/;"	m	struct:mxc_nand_host	typeref:struct:nand_chip *	file:
nand	drivers/mtd/nand/sunxi_nand.c	/^	struct nand_chip nand;$/;"	m	struct:sunxi_nand_chip	typeref:struct:nand_chip	file:
nand	include/dfu.h	/^		struct nand_internal_data nand;$/;"	m	union:dfu_entity::__anona51660ed010a	typeref:struct:nand_internal_data
nand	tools/mxsboot.c	/^	uint32_t		nand;$/;"	m	struct:mx28_nand_bbt	typeref:typename:uint32_t	file:
nand0	arch/arm/dts/at91sam9260-smartweb.dts	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9260.dtsi	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9261.dtsi	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9263.dtsi	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9g20-taurus.dts	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9g45-corvus.dts	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9g45-gurnard.dts	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/at91sam9g45.dtsi	/^		nand0: nand@40000000 {$/;"	l
nand0	arch/arm/dts/zynqmp.dtsi	/^		nand0: nand@ff100000 {$/;"	l
nand0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 nand0_clk_cfg;	\/* 0x80 nand sub clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 nand0_clk_cfg;	\/* 0x80 nand0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 nand0_clk_cfg;	\/* 0x80 nand clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 nand0_clk_cfg;	\/* 0x400 nand0 clock configuration0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 nand0_clk_cfg;	\/* 0x80 nand sub clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 nand0_clk_cfg;	\/* 0x80 nand0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 nand0_clk_cfg;	\/* 0x80 nand clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 nand0_clk_cfg;	\/* 0x400 nand0 clock configuration0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 nand0_clk_cfg1;	\/* 0x404 nand1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand0_clk_cfg1	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 nand0_clk_cfg1;	\/* 0x404 nand1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 nand1_clk_cfg;	\/* 0x84 nand1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 nand1_clk_cfg;	\/* 0x84 nand1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
nand4bitecc	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nand4bitecc[4];$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t[4]
nand4biteccload	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nand4biteccload;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nand_addr_hwcontrol	board/xes/common/actl_nand.c	/^static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)$/;"	f	typeref:typename:void	file:
nand_adr	include/linux/mtd/omap_gpmc.h	/^	u32 nand_adr;		\/* 0x20 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
nand_apply_config	drivers/mtd/nand/sunxi_nand_spl.c	/^static void nand_apply_config(const struct nfc_config *conf)$/;"	f	typeref:typename:void	file:
nand_autoboot_trgr	include/fsl_ifc.h	/^	u32 nand_autoboot_trgr;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_base	drivers/mtd/nand/arasan_nfc.c	/^	void __iomem *nand_base;$/;"	m	struct:arasan_nand_info	typeref:typename:void __iomem *	file:
nand_bbt_descr	include/linux/mtd/bbm.h	/^struct nand_bbt_descr {$/;"	s
nand_bch_calculate_ecc	drivers/mtd/nand/nand_bch.c	/^int nand_bch_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf,$/;"	f	typeref:typename:int
nand_bch_calculate_ecc	include/linux/mtd/nand_bch.h	/^nand_bch_calculate_ecc(struct mtd_info *mtd, const u_char *dat,$/;"	f	typeref:typename:int
nand_bch_control	drivers/mtd/nand/nand_bch.c	/^struct nand_bch_control {$/;"	s	file:
nand_bch_correct_data	drivers/mtd/nand/nand_bch.c	/^int nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf,$/;"	f	typeref:typename:int
nand_bch_correct_data	include/linux/mtd/nand_bch.h	/^nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf,$/;"	f	typeref:typename:int
nand_bch_free	drivers/mtd/nand/nand_bch.c	/^void nand_bch_free(struct nand_bch_control *nbc)$/;"	f	typeref:typename:void
nand_bch_free	include/linux/mtd/nand_bch.h	/^static inline void nand_bch_free(struct nand_bch_control *nbc) {}$/;"	f	typeref:typename:void
nand_bch_init	drivers/mtd/nand/nand_bch.c	/^struct nand_bch_control *nand_bch_init(struct mtd_info *mtd)$/;"	f	typeref:struct:nand_bch_control *
nand_bch_init	include/linux/mtd/nand_bch.h	/^static inline struct nand_bch_control *nand_bch_init(struct mtd_info *mtd)$/;"	f	typeref:struct:nand_bch_control *
nand_bd	board/synopsys/axs10x/nand.c	/^struct nand_bd {$/;"	s	file:
nand_block_bad	drivers/mtd/nand/nand_base.c	/^static int nand_block_bad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
nand_block_checkbad	drivers/mtd/nand/nand_base.c	/^static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int allowbbt)$/;"	f	typeref:typename:int	file:
nand_block_isbad	drivers/mtd/nand/denali_spl.c	/^static int nand_block_isbad(void *buf, int block)$/;"	f	typeref:typename:int	file:
nand_block_isbad	drivers/mtd/nand/nand_base.c	/^static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)$/;"	f	typeref:typename:int	file:
nand_block_isbad	include/nand.h	/^static inline int nand_block_isbad(struct mtd_info *info, loff_t ofs)$/;"	f	typeref:typename:int
nand_block_isreserved	drivers/mtd/nand/nand_base.c	/^static int nand_block_isreserved(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
nand_block_markbad	drivers/mtd/nand/nand_base.c	/^static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
nand_block_markbad_lowlevel	drivers/mtd/nand/nand_base.c	/^static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
nand_block_op	drivers/dfu/dfu_nand.c	/^static int nand_block_op(enum dfu_op op, struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
nand_block_read	drivers/dfu/dfu_nand.c	/^static inline int nand_block_read(struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
nand_block_write	drivers/dfu/dfu_nand.c	/^static inline int nand_block_write(struct dfu_entity *dfu,$/;"	f	typeref:typename:int	file:
nand_boot	drivers/mtd/nand/fsl_elbc_spl.c	/^void nand_boot(void)$/;"	f	typeref:typename:void
nand_boot	drivers/mtd/nand/fsl_ifc_spl.c	/^void nand_boot(void)$/;"	f	typeref:typename:void
nand_boot	drivers/mtd/nand/mxc_nand_spl.c	/^void nand_boot(void)$/;"	f	typeref:typename:void
nand_boot	drivers/mtd/nand/nand_spl_load.c	/^void nand_boot(void)$/;"	f	typeref:typename:void
nand_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int nand_boot_selected(void)$/;"	f	typeref:typename:int
nand_buf	drivers/mtd/nand/denali.h	/^struct nand_buf {$/;"	s
nand_buffers	include/linux/mtd/nand.h	/^struct nand_buffers {$/;"	s
nand_bus	board/siemens/draco/board.c	/^	u8 nand_bus;$/;"	m	struct:am335x_nand_geometry	typeref:typename:u8	file:
nand_cache	fs/jffs2/jffs2_1pass.c	/^static u8* nand_cache = NULL;$/;"	v	typeref:typename:u8 *	file:
nand_cache_off	fs/jffs2/jffs2_1pass.c	/^static u32 nand_cache_off = (u32)-1;$/;"	v	typeref:typename:u32	file:
nand_calculate_ecc	drivers/mtd/nand/nand_ecc.c	/^int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,$/;"	f	typeref:typename:int
nand_check_erased_buf	drivers/mtd/nand/nand_base.c	/^static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold)$/;"	f	typeref:typename:int	file:
nand_check_erased_ecc_chunk	drivers/mtd/nand/nand_base.c	/^int nand_check_erased_ecc_chunk(void *data, int datalen,$/;"	f	typeref:typename:int
nand_check_wp	drivers/mtd/nand/nand_base.c	/^static int nand_check_wp(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
nand_chip	board/spear/spear300/spear300.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	board/spear/spear310/spear310.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	board/spear/spear320/spear320.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	board/spear/spear600/spear600.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	board/spear/x600/x600.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	drivers/mtd/nand/am335x_spl_bch.c	/^static struct nand_chip nand_chip;$/;"	v	typeref:struct:nand_chip	file:
nand_chip	drivers/mtd/nand/arasan_nfc.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	drivers/mtd/nand/atmel_nand.c	/^static struct nand_chip nand_chip;$/;"	v	typeref:struct:nand_chip	file:
nand_chip	drivers/mtd/nand/atmel_nand.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	drivers/mtd/nand/mxs_nand_spl.c	/^static struct nand_chip nand_chip;$/;"	v	typeref:struct:nand_chip	file:
nand_chip	drivers/mtd/nand/nand.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	drivers/mtd/nand/nand_spl_simple.c	/^static struct nand_chip nand_chip;$/;"	v	typeref:struct:nand_chip	file:
nand_chip	drivers/mtd/nand/tegra_nand.c	/^static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:nand_chip[]	file:
nand_chip	include/linux/mtd/nand.h	/^struct nand_chip {$/;"	s
nand_clear_interrupt_status	drivers/mtd/nand/tegra_nand.c	/^static void nand_clear_interrupt_status(struct nand_ctlr *reg)$/;"	f	typeref:typename:void	file:
nand_clk	arch/arm/dts/socfpga.dtsi	/^					nand_clk: nand_clk {$/;"	l
nand_clk	arch/arm/dts/sun4i-a10.dtsi	/^		nand_clk: clk@01c20080 {$/;"	l
nand_clk	arch/arm/dts/sun5i.dtsi	/^		nand_clk: clk@01c20080 {$/;"	l
nand_clk	arch/arm/dts/sun7i-a20.dtsi	/^		nand_clk: clk@01c20080 {$/;"	l
nand_clock_setup	board/sunxi/board.c	/^static void nand_clock_setup(void)$/;"	f	typeref:typename:void	file:
nand_cmd	include/linux/mtd/omap_gpmc.h	/^	u32 nand_cmd;		\/* 0x1C *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
nand_cmdfunc	drivers/mtd/nand/pxa3xx_nand.c	/^static void nand_cmdfunc(struct mtd_info *mtd, unsigned command,$/;"	f	typeref:typename:void	file:
nand_cmdfunc_extended	drivers/mtd/nand/pxa3xx_nand.c	/^static void nand_cmdfunc_extended(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
nand_command	drivers/mtd/nand/am335x_spl_bch.c	/^static int nand_command(int block, int page, uint32_t offs,$/;"	f	typeref:typename:int	file:
nand_command	drivers/mtd/nand/atmel_nand.c	/^static int nand_command(int block, int page, uint32_t offs, u8 cmd)$/;"	f	typeref:typename:int	file:
nand_command	drivers/mtd/nand/nand_base.c	/^static void nand_command(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
nand_command	drivers/mtd/nand/nand_spl_simple.c	/^static int nand_command(int block, int page, uint32_t offs,$/;"	f	typeref:typename:int	file:
nand_command	drivers/mtd/nand/tegra_nand.c	/^static void nand_command(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
nand_command_lp	drivers/mtd/nand/nand_base.c	/^static void nand_command_lp(struct mtd_info *mtd, unsigned int command,$/;"	f	typeref:typename:void	file:
nand_correct_data	drivers/mtd/nand/nand_ecc.c	/^int nand_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int
nand_create_badblock_pattern	drivers/mtd/nand/nand_bbt.c	/^static int nand_create_badblock_pattern(struct nand_chip *this)$/;"	f	typeref:typename:int	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int nand_cs1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int nand_cs1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int nand_cs1_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int nand_cs1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int nand_cs1_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int nand_cs1_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int nand_cs1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned nand_cs1_pins[] = {22, 23};$/;"	v	typeref:typename:const unsigned[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned nand_cs1_pins[] = {37, 38};$/;"	v	typeref:typename:const unsigned[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned nand_cs1_pins[] = {131, 132};$/;"	v	typeref:typename:const unsigned[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned nand_cs1_pins[] = {26, 27};$/;"	v	typeref:typename:const unsigned[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned nand_cs1_pins[] = {37, 38};$/;"	v	typeref:typename:const unsigned[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned nand_cs1_pins[] = {41};$/;"	v	typeref:typename:const unsigned[]	file:
nand_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned nand_cs1_pins[] = {22, 23};$/;"	v	typeref:typename:const unsigned[]	file:
nand_csel	include/fsl_ifc.h	/^	u32 nand_csel;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_ctlr	drivers/mtd/nand/tegra_nand.h	/^struct nand_ctlr {$/;"	s
nand_ctrl	drivers/mtd/nand/tegra_nand.c	/^static struct nand_drv nand_ctrl;$/;"	v	typeref:struct:nand_drv	file:
nand_curr_device	drivers/mtd/nand/nand.c	/^int nand_curr_device = -1;$/;"	v	typeref:typename:int
nand_dat	include/linux/mtd/omap_gpmc.h	/^	u32 nand_dat;		\/* 0x24 *\/$/;"	m	struct:gpmc_cs	typeref:typename:u32
nand_davinci_4bit_calculate_ecc	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_4bit_calculate_ecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_davinci_4bit_correct_data	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,$/;"	f	typeref:typename:int	file:
nand_davinci_4bit_enable_hwecc	drivers/mtd/nand/davinci_nand.c	/^static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void	file:
nand_davinci_4bit_layout_oobfirst	drivers/mtd/nand/davinci_nand.c	/^static struct nand_ecclayout nand_davinci_4bit_layout_oobfirst = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_davinci_4bit_readecc	drivers/mtd/nand/davinci_nand.c	/^static u32 nand_davinci_4bit_readecc(struct mtd_info *mtd, unsigned int ecc[4])$/;"	f	typeref:typename:u32	file:
nand_davinci_calculate_ecc	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat,$/;"	f	typeref:typename:int	file:
nand_davinci_correct_data	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
nand_davinci_dev_ready	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
nand_davinci_enable_hwecc	drivers/mtd/nand/davinci_nand.c	/^static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void	file:
nand_davinci_hwcontrol	drivers/mtd/nand/davinci_nand.c	/^static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd,$/;"	f	typeref:typename:void	file:
nand_davinci_read_buf	drivers/mtd/nand/davinci_nand.c	/^static void nand_davinci_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
nand_davinci_read_page_hwecc	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_davinci_readecc	drivers/mtd/nand/davinci_nand.c	/^static u_int32_t nand_davinci_readecc(struct mtd_info *mtd)$/;"	f	typeref:typename:u_int32_t	file:
nand_davinci_write_buf	drivers/mtd/nand/davinci_nand.c	/^static void nand_davinci_write_buf(struct mtd_info *mtd, const uint8_t *buf,$/;"	f	typeref:typename:void	file:
nand_davinci_write_page	drivers/mtd/nand/davinci_nand.c	/^static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_decode_bbm_options	drivers/mtd/nand/nand_base.c	/^static void nand_decode_bbm_options(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
nand_decode_ext_id	drivers/mtd/nand/nand_base.c	/^static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
nand_decode_id	drivers/mtd/nand/nand_base.c	/^static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
nand_default_bbt	drivers/mtd/nand/mxs_nand_spl.c	/^int nand_default_bbt(struct mtd_info *mtd)$/;"	f	typeref:typename:int
nand_default_bbt	drivers/mtd/nand/nand_bbt.c	/^int nand_default_bbt(struct mtd_info *mtd)$/;"	f	typeref:typename:int
nand_default_block_markbad	drivers/mtd/nand/nand_base.c	/^static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
nand_denali_wp_disable	arch/arm/mach-uniphier/board_late_init.c	/^static void nand_denali_wp_disable(void)$/;"	f	typeref:typename:void	file:
nand_deselect	drivers/mtd/nand/am335x_spl_bch.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/atmel_nand.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/denali_spl.c	/^void nand_deselect(void) {}$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/fsl_ifc_spl.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/mxc_nand_spl.c	/^void nand_deselect(void) {}$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/mxs_nand_spl.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/nand_spl_simple.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_deselect	drivers/mtd/nand/sunxi_nand_spl.c	/^void nand_deselect(void)$/;"	f	typeref:typename:void
nand_detect_config	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_detect_config(struct nfc_config *conf, u32 offs, void *dest)$/;"	f	typeref:typename:int	file:
nand_detect_ecc_config	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_detect_ecc_config(struct nfc_config *conf, u32 offs,$/;"	f	typeref:typename:int	file:
nand_dev_ready	drivers/mtd/nand/fsl_upm.c	/^static int nand_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
nand_dev_ready	drivers/mtd/nand/tegra_nand.c	/^static int nand_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
nand_dll_lowcfg0	include/fsl_ifc.h	/^	u32 nand_dll_lowcfg0;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_dll_lowcfg1	include/fsl_ifc.h	/^	u32 nand_dll_lowcfg1;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_dll_lowstat	include/fsl_ifc.h	/^	u32 nand_dll_lowstat;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_do_read_oob	drivers/mtd/nand/nand_base.c	/^static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
nand_do_read_ops	drivers/mtd/nand/nand_base.c	/^static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
nand_do_write_oob	drivers/mtd/nand/nand_base.c	/^static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
nand_do_write_ops	drivers/mtd/nand/nand_base.c	/^static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
nand_drv	drivers/mtd/nand/tegra_nand.c	/^struct nand_drv {$/;"	s	file:
nand_dt_init	drivers/mtd/nand/nand_base.c	/^static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)$/;"	f	typeref:typename:int	file:
nand_dump	cmd/nand.c	/^static int nand_dump(struct mtd_info *mtd, ulong off, int only_oob,$/;"	f	typeref:typename:int	file:
nand_ecc_ctrl	include/linux/mtd/nand.h	/^struct nand_ecc_ctrl {$/;"	s
nand_ecc_mode	tools/kwbimage.c	/^struct nand_ecc_mode {$/;"	s	file:
nand_ecc_modes	tools/kwbimage.c	/^struct nand_ecc_mode nand_ecc_modes[] = {$/;"	v	typeref:struct:nand_ecc_mode[]
nand_ecc_modes_t	include/linux/mtd/nand.h	/^} nand_ecc_modes_t;$/;"	t	typeref:enum:__anon4f3885c20103
nand_ecc_pos	drivers/mtd/nand/am335x_spl_bch.c	/^static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;$/;"	v	typeref:typename:int[]	file:
nand_ecc_pos	drivers/mtd/nand/atmel_nand.c	/^static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;$/;"	v	typeref:typename:int[]	file:
nand_ecc_pos	drivers/mtd/nand/nand_spl_simple.c	/^static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;$/;"	v	typeref:typename:int[]	file:
nand_ecc_precalc_table	drivers/mtd/nand/nand_ecc.c	/^static const u_char nand_ecc_precalc_table[] = {$/;"	v	typeref:typename:const u_char[]	file:
nand_ecc_strength_good	drivers/mtd/nand/nand_base.c	/^static bool nand_ecc_strength_good(struct mtd_info *mtd)$/;"	f	typeref:typename:bool	file:
nand_ecclayout	include/linux/mtd/mtd.h	/^struct nand_ecclayout {$/;"	s
nand_ecclayout_user	include/mtd/mtd-abi.h	/^struct nand_ecclayout_user {$/;"	s
nand_eccstat	include/fsl_ifc.h	/^	u32 nand_eccstat[6];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[6]
nand_env_oob_offset	cmd/nand.c	/^unsigned long nand_env_oob_offset;$/;"	v	typeref:typename:unsigned long
nand_erase	drivers/mtd/nand/nand_base.c	/^static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int	file:
nand_erase	include/nand.h	/^static inline int nand_erase(struct mtd_info *info, loff_t off, size_t size)$/;"	f	typeref:typename:int
nand_erase_nand	drivers/mtd/nand/nand_base.c	/^int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,$/;"	f	typeref:typename:int
nand_erase_options	include/nand.h	/^struct nand_erase_options {$/;"	s
nand_erase_options_t	include/nand.h	/^typedef struct nand_erase_options nand_erase_options_t;$/;"	t	typeref:struct:nand_erase_options
nand_erase_opts	drivers/mtd/nand/nand_util.c	/^int nand_erase_opts(struct mtd_info *mtd,$/;"	f	typeref:typename:int
nand_erasesize	tools/mxsboot.c	/^static uint32_t nand_erasesize = 128 * 1024;$/;"	v	typeref:typename:uint32_t	file:
nand_erattr0	include/fsl_ifc.h	/^	u32 nand_erattr0;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_erattr1	include/fsl_ifc.h	/^	u32 nand_erattr1;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_evter_en	include/fsl_ifc.h	/^	u32 nand_evter_en;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_evter_intr_en	include/fsl_ifc.h	/^	u32 nand_evter_intr_en;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_evter_stat	include/fsl_ifc.h	/^	u32 nand_evter_stat;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_fbcr	include/fsl_ifc.h	/^	u32 nand_fbcr;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_fcr0	include/fsl_ifc.h	/^	u32 nand_fcr0;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_fcr1	include/fsl_ifc.h	/^	u32 nand_fcr1;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_fill_oob	drivers/mtd/nand/nand_base.c	/^static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,$/;"	f	typeref:typename:uint8_t *	file:
nand_fir0	include/fsl_ifc.h	/^	u32 nand_fir0;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_fir1	include/fsl_ifc.h	/^	u32 nand_fir1;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_fir2	include/fsl_ifc.h	/^	u32 nand_fir2;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_flag_is_set	board/synopsys/axs10x/nand.c	/^static uint32_t nand_flag_is_set(uint32_t flag)$/;"	f	typeref:typename:uint32_t	file:
nand_flash_detect_ext_param_page	drivers/mtd/nand/nand_base.c	/^static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_flash_detect_jedec	drivers/mtd/nand/nand_base.c	/^static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_flash_detect_onfi	drivers/mtd/nand/nand_base.c	/^static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_flash_dev	include/linux/mtd/nand.h	/^struct nand_flash_dev {$/;"	s
nand_flash_ids	drivers/mtd/nand/nand_ids.c	/^struct nand_flash_dev nand_flash_ids[] = {$/;"	v	typeref:struct:nand_flash_dev[]
nand_flash_init	drivers/mtd/nand/davinci_nand.c	/^static void nand_flash_init(void)$/;"	f	typeref:typename:void	file:
nand_flash_size	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 nand_flash_size;  \/* 0x40: (8 << (n-1)) MB *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
nand_flash_x16	arch/arm/dts/dra7-evm.dts	/^	nand_flash_x16: nand_flash_x16 {$/;"	l
nand_flash_x8	arch/arm/dts/am437x-gp-evm.dts	/^	nand_flash_x8: nand_flash_x8 {$/;"	l
nand_flash_x8	arch/arm/dts/am43x-epos-evm.dts	/^		nand_flash_x8: nand_flash_x8 {$/;"	l
nand_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nand_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
nand_fsr	include/fsl_ifc.h	/^	u32 nand_fsr;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_geo_addr	board/siemens/draco/board.c	/^	u8 nand_geo_addr;$/;"	m	struct:am335x_nand_geometry	typeref:typename:u8	file:
nand_geo_page	board/siemens/draco/board.c	/^	u8 nand_geo_page;$/;"	m	struct:am335x_nand_geometry	typeref:typename:u8	file:
nand_get_bits_per_cell	drivers/mtd/nand/nand_base.c	/^static int nand_get_bits_per_cell(u8 cellinfo)$/;"	f	typeref:typename:int	file:
nand_get_controller_data	include/linux/mtd/nand.h	/^static inline void *nand_get_controller_data(struct nand_chip *chip)$/;"	f	typeref:typename:void *
nand_get_device	drivers/mtd/nand/nand_base.c	/^nand_get_device(struct mtd_info *mtd, int new_state)$/;"	f	typeref:typename:int	file:
nand_get_flash_type	drivers/mtd/nand/nand_base.c	/^static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,$/;"	f	typeref:struct:nand_flash_dev *	file:
nand_get_lock_status	drivers/mtd/nand/nand_util.c	/^int nand_get_lock_status(struct mtd_info *mtd, loff_t offset)$/;"	f	typeref:typename:int
nand_help_text	cmd/nand.c	/^static char nand_help_text[] =$/;"	v	typeref:typename:char[]	file:
nand_hw_control	include/linux/mtd/nand.h	/^struct nand_hw_control {$/;"	s
nand_hw_eccoob	drivers/mtd/nand/mxc_nand.c	/^static struct nand_ecclayout nand_hw_eccoob = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_hw_eccoob2k	drivers/mtd/nand/mxc_nand.c	/^static struct nand_ecclayout nand_hw_eccoob2k = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_hw_init	board/bluewater/snapper9260/snapper9260.c	/^static void nand_hw_init(void)$/;"	f	typeref:typename:void	file:
nand_hwcontrol	board/freescale/m5329evb/nand.c	/^static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
nand_hwcontrol	board/freescale/m5373evb/nand.c	/^static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
nand_id_has_period	drivers/mtd/nand/nand_base.c	/^static int nand_id_has_period(u8 *id_data, int arrlen, int period)$/;"	f	typeref:typename:int	file:
nand_id_len	drivers/mtd/nand/nand_base.c	/^static int nand_id_len(u8 *id_data, int arrlen)$/;"	f	typeref:typename:int	file:
nand_imls_fitimage	cmd/bootm.c	/^static int nand_imls_fitimage(struct mtd_info *mtd, int nand_dev, loff_t off,$/;"	f	typeref:typename:int	file:
nand_imls_legacyimage	cmd/bootm.c	/^static int nand_imls_legacyimage(struct mtd_info *mtd, int nand_dev,$/;"	f	typeref:typename:int	file:
nand_info	drivers/mtd/nand/nand.c	/^struct mtd_info *nand_info[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:struct:mtd_info * []
nand_init	drivers/mtd/nand/am335x_spl_bch.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/atmel_nand.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/denali_spl.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/fsl_ifc_spl.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/mxc_nand_spl.c	/^void nand_init(void) {}$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/mxs_nand_spl.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/nand.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/nand_spl_simple.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init	drivers/mtd/nand/sunxi_nand_spl.c	/^void nand_init(void)$/;"	f	typeref:typename:void
nand_init_chip	drivers/mtd/nand/nand.c	/^static void nand_init_chip(int i)$/;"	f	typeref:typename:void	file:
nand_internal_data	include/dfu.h	/^struct nand_internal_data {$/;"	s
nand_is_bad_block	drivers/mtd/nand/am335x_spl_bch.c	/^static int nand_is_bad_block(int block)$/;"	f	typeref:typename:int	file:
nand_is_bad_block	drivers/mtd/nand/atmel_nand.c	/^static int nand_is_bad_block(int block)$/;"	f	typeref:typename:int	file:
nand_is_bad_block	drivers/mtd/nand/nand_spl_simple.c	/^static int nand_is_bad_block(int block)$/;"	f	typeref:typename:int	file:
nand_is_slc	include/linux/mtd/nand.h	/^static inline bool nand_is_slc(struct nand_chip *chip)$/;"	f	typeref:typename:bool
nand_isbad_bbt	drivers/mtd/nand/nand_bbt.c	/^int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)$/;"	f	typeref:typename:int
nand_isr_t	board/synopsys/axs10x/nand.c	/^enum nand_isr_t {$/;"	g	file:
nand_isreserved_bbt	drivers/mtd/nand/nand_bbt.c	/^int nand_isreserved_bbt(struct mtd_info *mtd, loff_t offs)$/;"	f	typeref:typename:int
nand_jedec_params	include/linux/mtd/nand.h	/^struct nand_jedec_params {$/;"	s
nand_keystone_rbl_4bit_layout_oobfirst	drivers/mtd/nand/davinci_nand.c	/^static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_load_image	cmd/nand.c	/^static int nand_load_image(cmd_tbl_t *cmdtp, struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_load_page	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_load_page(const struct nfc_config *conf, u32 offs)$/;"	f	typeref:typename:int	file:
nand_lock	drivers/mtd/nand/nand_util.c	/^int nand_lock(struct mtd_info *mtd, int tight)$/;"	f	typeref:typename:int
nand_manuf_ids	drivers/mtd/nand/nand_ids.c	/^struct nand_manufacturers nand_manuf_ids[] = {$/;"	v	typeref:struct:nand_manufacturers[]
nand_manufacturers	include/linux/mtd/nand.h	/^struct nand_manufacturers {$/;"	s
nand_markbad_bbt	drivers/mtd/nand/nand_bbt.c	/^int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs)$/;"	f	typeref:typename:int
nand_max_ecc_strength	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_max_ecc_strength(struct nfc_config *conf)$/;"	f	typeref:typename:int	file:
nand_mdr	include/fsl_ifc.h	/^	u32 nand_mdr;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_memory_bbt	drivers/mtd/nand/nand_bbt.c	/^static inline int nand_memory_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)$/;"	f	typeref:typename:int	file:
nand_mpp_backup	drivers/mtd/nand/kirkwood_nand.c	/^static u32 nand_mpp_backup[9] = { 0 };$/;"	v	typeref:typename:u32[9]	file:
nand_mtd_to_devnum	drivers/mtd/nand/nand.c	/^int nand_mtd_to_devnum(struct mtd_info *mtd)$/;"	f	typeref:typename:int
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int nand_muxvals[] = {1, 1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
nand_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
nand_onfi_detect_micron	drivers/mtd/nand/nand_base.c	/^static void nand_onfi_detect_micron(struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
nand_onfi_get_features	drivers/mtd/nand/nand_base.c	/^static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_onfi_params	include/linux/mtd/nand.h	/^struct nand_onfi_params {$/;"	s
nand_onfi_set_features	drivers/mtd/nand/nand_base.c	/^static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_onfi_timing_set	drivers/mtd/nand/denali.c	/^static void nand_onfi_timing_set(struct denali_nand_info *denali,$/;"	f	typeref:typename:void	file:
nand_onfi_vendor_micron	include/linux/mtd/nand.h	/^struct nand_onfi_vendor_micron {$/;"	s
nand_oob	drivers/mtd/nand/arasan_nfc.c	/^static struct nand_ecclayout nand_oob;$/;"	v	typeref:struct:nand_ecclayout	file:
nand_oob	drivers/mtd/nand/denali.c	/^static struct nand_ecclayout nand_oob;$/;"	v	typeref:struct:nand_ecclayout	file:
nand_oob_128	drivers/mtd/nand/nand_base.c	/^static struct nand_ecclayout nand_oob_128 = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_oob_16	drivers/mtd/nand/nand_base.c	/^static struct nand_ecclayout nand_oob_16 = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_oob_64	drivers/mtd/nand/nand_base.c	/^static struct nand_ecclayout nand_oob_64 = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_oob_8	drivers/mtd/nand/nand_base.c	/^static struct nand_ecclayout nand_oob_8 = {$/;"	v	typeref:struct:nand_ecclayout	file:
nand_oobfree	include/mtd/mtd-abi.h	/^struct nand_oobfree {$/;"	s
nand_oobinfo	include/mtd/mtd-abi.h	/^struct nand_oobinfo {$/;"	s
nand_oobsize	tools/mxsboot.c	/^static uint32_t nand_oobsize = 64;$/;"	v	typeref:typename:uint32_t	file:
nand_opcode_8bits	include/linux/mtd/nand.h	/^static inline int nand_opcode_8bits(unsigned int command)$/;"	f	typeref:typename:int
nand_pads	board/compulab/cm_fx6/cm_fx6.c	/^static iomux_v3_cfg_t const nand_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
nand_page_0_boot_header	tools/lpc32xximage.c	/^struct nand_page_0_boot_header {$/;"	s	file:
nand_page_0_boot_header	tools/vybridimage.c	/^struct nand_page_0_boot_header {$/;"	s	file:
nand_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/isee/igep0033/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/siemens/draco/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/silica/pengwyn/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux nand_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
nand_pinmux_setup	board/sunxi/board.c	/^static void nand_pinmux_setup(void)$/;"	f	typeref:typename:void	file:
nand_pins	arch/arm/dts/armada-375.dtsi	/^				nand_pins: nand-pins {$/;"	l
nand_pins	board/davinci/da8xxevm/omapl138_lcdk.c	/^const struct pinmux_config nand_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
nand_pins	board/davinci/ea20/ea20.c	/^const struct pinmux_config nand_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned nand_pins[] = {24, 25, 26, 27, 28, 29, 30, 31, 158, 159,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned nand_pins[] = {40, 41, 42, 43, 44, 45, 46, 47, 48, 49,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned nand_pins[] = {38, 39, 40, 58, 59};$/;"	v	typeref:typename:const unsigned[]	file:
nand_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned nand_pins[] = {15, 16, 17, 18, 19, 20, 21, 24, 25, 26,$/;"	v	typeref:typename:const unsigned[]	file:
nand_pmecc_header	tools/atmelimage.c	/^static uint32_t nand_pmecc_header[52];$/;"	v	typeref:typename:uint32_t[52]	file:
nand_print_and_set_info	cmd/nand.c	/^static void nand_print_and_set_info(int idx)$/;"	f	typeref:typename:void	file:
nand_read	drivers/mtd/nand/nand_base.c	/^static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
nand_read	include/nand.h	/^static inline int nand_read(struct mtd_info *info, loff_t ofs, size_t *len,$/;"	f	typeref:typename:int
nand_read_buf	drivers/mtd/nand/nand_base.c	/^void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void
nand_read_buf	drivers/mtd/nand/s3c2410_nand.c	/^static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
nand_read_buf16	drivers/mtd/nand/nand_base.c	/^void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void
nand_read_buffer	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_read_buffer(struct nfc_config *conf, uint32_t offs,$/;"	f	typeref:typename:int	file:
nand_read_byte	drivers/mtd/nand/nand_base.c	/^uint8_t nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t
nand_read_byte16	drivers/mtd/nand/nand_base.c	/^static uint8_t nand_read_byte16(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
nand_read_oob	drivers/mtd/nand/denali_spl.c	/^static int nand_read_oob(void *buf, int page)$/;"	f	typeref:typename:int	file:
nand_read_oob	drivers/mtd/nand/nand_base.c	/^static int nand_read_oob(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
nand_read_oob	drivers/mtd/nand/tegra_nand.c	/^static int nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_oob_std	drivers/mtd/nand/nand_base.c	/^static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_oob_syndrome	drivers/mtd/nand/nand_base.c	/^static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_page	drivers/mtd/nand/am335x_spl_bch.c	/^static int nand_read_page(int block, int page, void *dst)$/;"	f	typeref:typename:int	file:
nand_read_page	drivers/mtd/nand/atmel_nand.c	/^static int nand_read_page(int block, int page, void *dst)$/;"	f	typeref:typename:int	file:
nand_read_page	drivers/mtd/nand/denali_spl.c	/^static int nand_read_page(void *buf, int page)$/;"	f	typeref:typename:int	file:
nand_read_page	drivers/mtd/nand/nand_spl_simple.c	/^static int nand_read_page(int block, int page, uchar *dst)$/;"	f	typeref:typename:int	file:
nand_read_page	drivers/mtd/nand/nand_spl_simple.c	/^static int nand_read_page(int block, int page, void *dst)$/;"	f	typeref:typename:int	file:
nand_read_page	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_read_page(const struct nfc_config *conf, u32 offs,$/;"	f	typeref:typename:int	file:
nand_read_page_hwecc	drivers/mtd/nand/nand_base.c	/^static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_page_hwecc	drivers/mtd/nand/tegra_nand.c	/^static int nand_read_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_read_page_hwecc_oob_first	drivers/mtd/nand/nand_base.c	/^static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_read_page_raw	drivers/mtd/nand/nand_base.c	/^static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_page_raw	drivers/mtd/nand/tegra_nand.c	/^static int nand_read_page_raw(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_read_page_raw_syndrome	drivers/mtd/nand/nand_base.c	/^static int nand_read_page_raw_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_read_page_swecc	drivers/mtd/nand/nand_base.c	/^static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_page_syndrome	drivers/mtd/nand/nand_base.c	/^static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nand_read_qos;			\/* 0x4B100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
nand_read_skip_bad	drivers/mtd/nand/nand_util.c	/^int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,$/;"	f	typeref:typename:int
nand_read_subpage	drivers/mtd/nand/nand_base.c	/^static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_read_word	drivers/mtd/nand/nand_base.c	/^static u16 nand_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:u16	file:
nand_readl	drivers/mtd/nand/pxa3xx_nand.c	/^#define nand_readl(/;"	d	file:
nand_register	drivers/mtd/nand/nand.c	/^int nand_register(int devnum, struct mtd_info *mtd)$/;"	f	typeref:typename:int
nand_regs	drivers/mtd/nand/arasan_nfc.c	/^struct nand_regs {$/;"	s	file:
nand_regs_t	board/synopsys/axs10x/nand.c	/^enum nand_regs_t {$/;"	g	file:
nand_release_device	drivers/mtd/nand/nand_base.c	/^static void nand_release_device(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
nand_reset_column	drivers/mtd/nand/sunxi_nand_spl.c	/^static int nand_reset_column(void)$/;"	f	typeref:typename:int	file:
nand_rw_oob	drivers/mtd/nand/tegra_nand.c	/^static int nand_rw_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_rw_page	drivers/mtd/nand/tegra_nand.c	/^static int nand_rw_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_scan	drivers/mtd/nand/nand_base.c	/^int nand_scan(struct mtd_info *mtd, int maxchips)$/;"	f	typeref:typename:int
nand_scan_bbt	drivers/mtd/nand/nand_bbt.c	/^static int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)$/;"	f	typeref:typename:int	file:
nand_scan_ident	drivers/mtd/nand/nand_base.c	/^int nand_scan_ident(struct mtd_info *mtd, int maxchips,$/;"	f	typeref:typename:int
nand_scan_tail	drivers/mtd/nand/nand_base.c	/^int nand_scan_tail(struct mtd_info *mtd)$/;"	f	typeref:typename:int
nand_sdr_timings	include/linux/mtd/nand.h	/^struct nand_sdr_timings {$/;"	s
nand_select_chip	drivers/mtd/nand/nand_base.c	/^static void nand_select_chip(struct mtd_info *mtd, int chipnr)$/;"	f	typeref:typename:void	file:
nand_select_chip	drivers/mtd/nand/tegra_nand.c	/^static void nand_select_chip(struct mtd_info *mtd, int chipnr)$/;"	f	typeref:typename:void	file:
nand_set_controller_data	include/linux/mtd/nand.h	/^static inline void nand_set_controller_data(struct nand_chip *chip, void *priv)$/;"	f	typeref:typename:void
nand_set_defaults	drivers/mtd/nand/nand_base.c	/^static void nand_set_defaults(struct nand_chip *chip, int busw)$/;"	f	typeref:typename:void	file:
nand_setup_read_retry	drivers/mtd/nand/nand_base.c	/^static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)$/;"	f	typeref:typename:int	file:
nand_setup_read_retry_micron	drivers/mtd/nand/nand_base.c	/^static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode)$/;"	f	typeref:typename:int	file:
nand_spl_load_image	drivers/mtd/nand/am335x_spl_bch.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/atmel_nand.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/denali_spl.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/fsl_elbc_spl.c	/^#define nand_spl_load_image(/;"	d	file:
nand_spl_load_image	drivers/mtd/nand/fsl_elbc_spl.c	/^int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/fsl_ifc_spl.c	/^int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/mxc_nand_spl.c	/^int nand_spl_load_image(uint32_t from, unsigned int size, void *buf)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/mxs_nand_spl.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/nand_spl_simple.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)$/;"	f	typeref:typename:int
nand_spl_load_image	drivers/mtd/nand/sunxi_nand_spl.c	/^int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)$/;"	f	typeref:typename:int
nand_spl_read_block	drivers/mtd/nand/nand_spl_simple.c	/^int nand_spl_read_block(int block, int offset, int len, void *dst)$/;"	f	typeref:typename:int
nand_string	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	char *nand_string;$/;"	m	struct:__anon6aa74aa60108	typeref:typename:char *
nand_sync	drivers/mtd/nand/nand_base.c	/^static void nand_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
nand_timing_state	tools/mxsboot.c	/^		uint8_t			nand_timing_state;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
nand_to_mtd	include/linux/mtd/nand.h	/^static inline struct mtd_info *nand_to_mtd(struct nand_chip *chip)$/;"	f	typeref:struct:mtd_info *
nand_torture	drivers/mtd/nand/nand_util.c	/^int nand_torture(struct mtd_info *mtd, loff_t offset)$/;"	f	typeref:typename:int
nand_transfer_oob	drivers/mtd/nand/nand_base.c	/^static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,$/;"	f	typeref:typename:uint8_t *	file:
nand_unlock	drivers/mtd/nand/nand_util.c	/^int nand_unlock(struct mtd_info *mtd, loff_t start, size_t length,$/;"	f	typeref:typename:int
nand_update_bbt	drivers/mtd/nand/nand_bbt.c	/^static int nand_update_bbt(struct mtd_info *mtd, loff_t offs)$/;"	f	typeref:typename:int	file:
nand_verify	drivers/mtd/nand/nand_util.c	/^int nand_verify(struct mtd_info *mtd, loff_t ofs, size_t len, u_char *buf)$/;"	f	typeref:typename:int
nand_verify_page_oob	drivers/mtd/nand/nand_util.c	/^int nand_verify_page_oob(struct mtd_info *mtd, struct mtd_oob_ops *ops,$/;"	f	typeref:typename:int
nand_vol_addr_stat	include/fsl_ifc.h	/^	u32 nand_vol_addr_stat;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nand_wait	drivers/mtd/nand/fsl_elbc_spl.c	/^static void nand_wait(void)$/;"	f	typeref:typename:void	file:
nand_wait	drivers/mtd/nand/fsl_ifc_spl.c	/^static inline void nand_wait(uchar *buf, int bufnum, int page_size)$/;"	f	typeref:typename:void	file:
nand_wait	drivers/mtd/nand/nand_base.c	/^static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)$/;"	f	typeref:typename:int	file:
nand_wait_ready	drivers/mtd/nand/nand_base.c	/^void nand_wait_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:void
nand_wait_status_ready	drivers/mtd/nand/nand_base.c	/^static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)$/;"	f	typeref:typename:void	file:
nand_waitfor_cmd_completion	drivers/mtd/nand/tegra_nand.c	/^static int nand_waitfor_cmd_completion(struct nand_ctlr *reg)$/;"	f	typeref:typename:int	file:
nand_write	drivers/mtd/nand/nand_base.c	/^static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
nand_write	include/nand.h	/^static inline int nand_write(struct mtd_info *info, loff_t ofs, size_t *len,$/;"	f	typeref:typename:int
nand_write_buf	drivers/mtd/nand/nand_base.c	/^void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)$/;"	f	typeref:typename:void
nand_write_buf16	drivers/mtd/nand/nand_base.c	/^void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)$/;"	f	typeref:typename:void
nand_write_byte	drivers/mtd/nand/nand_base.c	/^static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)$/;"	f	typeref:typename:void	file:
nand_write_byte16	drivers/mtd/nand/nand_base.c	/^static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)$/;"	f	typeref:typename:void	file:
nand_write_oob	drivers/mtd/nand/nand_base.c	/^static int nand_write_oob(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
nand_write_oob	drivers/mtd/nand/tegra_nand.c	/^static int nand_write_oob(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_write_oob_std	drivers/mtd/nand/nand_base.c	/^static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_write_oob_syndrome	drivers/mtd/nand/nand_base.c	/^static int nand_write_oob_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_write_page	drivers/mtd/nand/nand_base.c	/^static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_write_page_hwecc	drivers/mtd/nand/nand_base.c	/^static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_write_page_hwecc	drivers/mtd/nand/tegra_nand.c	/^static int nand_write_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_write_page_raw	drivers/mtd/nand/nand_base.c	/^static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_write_page_raw	drivers/mtd/nand/tegra_nand.c	/^static int nand_write_page_raw(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_write_page_raw_syndrome	drivers/mtd/nand/nand_base.c	/^static int nand_write_page_raw_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_write_page_swecc	drivers/mtd/nand/nand_base.c	/^static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
nand_write_page_syndrome	drivers/mtd/nand/nand_base.c	/^static int nand_write_page_syndrome(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nand_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
nand_write_skip_bad	drivers/mtd/nand/nand_util.c	/^int nand_write_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,$/;"	f	typeref:typename:int
nand_write_subpage_hwecc	drivers/mtd/nand/nand_base.c	/^static int nand_write_subpage_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
nand_writel	drivers/mtd/nand/pxa3xx_nand.c	/^#define nand_writel(/;"	d	file:
nand_writesize	tools/mxsboot.c	/^static uint32_t nand_writesize = 2048;$/;"	v	typeref:typename:uint32_t	file:
nand_x_clk	arch/arm/dts/socfpga.dtsi	/^					nand_x_clk: nand_x_clk {$/;"	l
nandbadblklocation	tools/kwbimage.c	/^		unsigned int nandbadblklocation;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
nandbadblklocation	tools/kwbimage.h	/^	uint8_t  nandbadblklocation;    \/* 1A *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
nandblksz	tools/kwbimage.c	/^		unsigned int nandblksz;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
nandblocksize	tools/kwbimage.h	/^	uint8_t  nandblocksize;         \/* 19 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
nanddata	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nanddata;$/;"	m	struct:nic301_registers	typeref:typename:u32
nanddata_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nanddata_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
nanddata_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nanddata_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
nandeccmode	tools/kwbimage.c	/^		unsigned int nandeccmode;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
nandeccmode	tools/kwbimage.h	/^	uint8_t  nandeccmode;		\/*1     *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint8_t
nanderradd1	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nanderradd1;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nanderradd2	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nanderradd2;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nanderrval1	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nanderrval1;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nanderrval2	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nanderrval2;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nandfcr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nandfcr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nandfecc	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nandfecc[4];$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t[4]
nandflash_pins	arch/arm/dts/am335x-draco.dtsi	/^		nandflash_pins: nandflash_pins {$/;"	l
nandflash_pins	arch/arm/dts/am335x-pxm2.dtsi	/^	nandflash_pins: pinmux_nandflash_pins {$/;"	l
nandflash_pins	arch/arm/dts/am335x-rut.dts	/^	nandflash_pins: pinmux_nandflash_pins {$/;"	l
nandflash_pins_s0	arch/arm/dts/am335x-evm.dts	/^	nandflash_pins_s0: nandflash_pins_s0 {$/;"	l
nandfsr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	nandfsr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
nandgrp_bootstrap	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	nandgrp_bootstrap;		\/* 0x110 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
nandgrp_l3master	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	nandgrp_l3master;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
nandmtd2_MarkNANDBlockBad	fs/yaffs2/yaffs_mtdif2.c	/^int nandmtd2_MarkNANDBlockBad(struct yaffs_dev *dev, int blockNo)$/;"	f	typeref:typename:int
nandmtd2_QueryNANDBlock	fs/yaffs2/yaffs_mtdif2.c	/^int nandmtd2_QueryNANDBlock(struct yaffs_dev *dev, int blockNo,$/;"	f	typeref:typename:int
nandmtd2_read_chunk_tags	fs/yaffs2/yaffs_mtdif2.c	/^int nandmtd2_read_chunk_tags(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:int
nandmtd2_write_chunk_tags	fs/yaffs2/yaffs_mtdif2.c	/^int nandmtd2_write_chunk_tags(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:int
nandmtd_EraseBlockInNAND	fs/yaffs2/yaffs_mtdif.c	/^int nandmtd_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber)$/;"	f	typeref:typename:int
nandmtd_InitialiseNAND	fs/yaffs2/yaffs_mtdif.c	/^int nandmtd_InitialiseNAND(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
nandmtd_ReadChunkFromNAND	fs/yaffs2/yaffs_mtdif.c	/^int nandmtd_ReadChunkFromNAND(struct yaffs_dev *dev, int chunkInNAND, u8 *data,$/;"	f	typeref:typename:int
nandmtd_WriteChunkToNAND	fs/yaffs2/yaffs_mtdif.c	/^int nandmtd_WriteChunkToNAND(struct yaffs_dev *dev, int chunkInNAND,$/;"	f	typeref:typename:int
nandpagesize	tools/kwbimage.h	/^	uint16_t nandpagesize;		\/*2-3   *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint16_t
nandpagesz	tools/kwbimage.c	/^		unsigned int nandpagesz;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
nandregs	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nandregs;$/;"	m	struct:nic301_registers	typeref:typename:u32
nandregs_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nandregs_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
nandregs_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	nandregs_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
nandseq_strt	include/fsl_ifc.h	/^	u32 nandseq_strt;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nandusefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	nandusefpga;			\/* 0x6f0 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
nanndcr	include/fsl_ifc.h	/^	u32 nanndcr;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nanosecond	include/efi.h	/^	u32 nanosecond;$/;"	m	struct:efi_time	typeref:typename:u32
nanswers	net/dns.h	/^	uint16_t	nanswers;	\/* Answers *\/$/;"	m	struct:header	typeref:typename:uint16_t
narg	lib/slre.c	/^	int		narg;$/;"	m	struct:__anon5875e6120208	typeref:typename:int	file:
nargs	tools/aisimage.c	/^	uint32_t nargs;$/;"	m	struct:cmd_table_t	typeref:typename:uint32_t	file:
nargs	tools/kwbimage.c	/^			unsigned int nargs;$/;"	m	struct:image_cfg_element::__anon9793d65d020a::__anon9793d65d0308	typeref:typename:unsigned int	file:
native_read_msr	arch/x86/include/asm/msr.h	/^	unsigned long long native_read_msr(unsigned int msr)$/;"	f	typeref:typename:unsigned long long
native_read_pmc	arch/x86/include/asm/msr.h	/^static inline unsigned long long native_read_pmc(int counter)$/;"	f	typeref:typename:unsigned long long
native_read_tscp	arch/x86/include/asm/msr.h	/^static inline unsigned long long native_read_tscp(unsigned int *aux)$/;"	f	typeref:typename:unsigned long long
native_write_msr	arch/x86/include/asm/msr.h	/^static inline void native_write_msr(unsigned int msr,$/;"	f	typeref:typename:void
nativeid	drivers/mtd/nand/sunxi_nand.c	/^		int nativeid;$/;"	m	union:sunxi_nand_rb::__anon4f97023f010a	typeref:typename:int	file:
natsemi_check_duplex	drivers/net/natsemi.c	/^natsemi_check_duplex(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
natsemi_debug	drivers/net/natsemi.c	/^static int natsemi_debug = 0;	\/* 1 verbose debugging, 0 normal *\/$/;"	v	typeref:typename:int	file:
natsemi_disable	drivers/net/natsemi.c	/^natsemi_disable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
natsemi_init	drivers/net/natsemi.c	/^natsemi_init(struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
natsemi_init_rxd	drivers/net/natsemi.c	/^natsemi_init_rxd(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
natsemi_init_rxfilter	drivers/net/natsemi.c	/^natsemi_init_rxfilter(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
natsemi_init_txd	drivers/net/natsemi.c	/^natsemi_init_txd(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
natsemi_initialize	drivers/net/natsemi.c	/^natsemi_initialize(bd_t * bis)$/;"	f	typeref:typename:int
natsemi_poll	drivers/net/natsemi.c	/^natsemi_poll(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
natsemi_reset	drivers/net/natsemi.c	/^natsemi_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
natsemi_send	drivers/net/natsemi.c	/^static int natsemi_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
natsemi_set_rx_mode	drivers/net/natsemi.c	/^natsemi_set_rx_mode(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
nauth	net/dns.h	/^	uint16_t	nauth;		\/* Authority PRs *\/$/;"	m	struct:header	typeref:typename:uint16_t
nb	drivers/usb/musb-new/musb_core.h	/^	struct notifier_block	nb;$/;"	m	struct:musb	typeref:struct:notifier_block
nb_clk	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 nb_clk;$/;"	m	struct:sar_freq_modes	typeref:typename:u32
nbanks	drivers/gpio/atmel_pio4.c	/^	u32 nbanks;$/;"	m	struct:atmel_pioctrl_data	typeref:typename:u32	file:
nbanks	include/ddr_spd.h	/^	unsigned char nbanks;      \/* 17 # of Banks on Each SDRAM Device *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
nbanks	include/ddr_spd.h	/^	unsigned char nbanks;      \/* 17 # of Banks on SDRAM Device *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
nbanks	include/spd.h	/^	unsigned char nbanks;      \/* 17 # of Banks on Each SDRAM Device *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
nblock	lib/bzip2/bzlib_private.h	/^      Int32    nblock;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
nblockMAX	lib/bzip2/bzlib_private.h	/^      Int32    nblockMAX;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
nblock_used	lib/bzip2/bzlib_private.h	/^      Int32    nblock_used;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
nbranch	fs/ubifs/ubifs.h	/^	struct ubifs_nbranch nbranch[UBIFS_LPT_FANOUT];$/;"	m	struct:ubifs_nnode	typeref:struct:ubifs_nbranch[]
nbs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^nbs (uint value, uint nbits)$/;"	f	typeref:typename:uint	file:
nbytes	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t nbytes;$/;"	m	struct:cmd_debugfs_dumpdir_response	typeref:typename:uint32_t
nbytes	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t nbytes;$/;"	m	struct:cmd_debugfs_fileop_response	typeref:typename:uint32_t
nbytes	arch/m68k/include/asm/coldfire/edma.h	/^	u32 nbytes;		\/* 0x08 Minor Byte Count *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u32
nbytes	drivers/block/sata_dwc.h	/^	unsigned int		nbytes;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
nc_ether	drivers/net/netconsole.c	/^static uchar nc_ether[6]; \/* server enet address *\/$/;"	v	typeref:typename:uchar[6]	file:
nc_handler	drivers/net/netconsole.c	/^static void nc_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
nc_in_port	drivers/net/netconsole.c	/^static short nc_in_port; \/* source input port *\/$/;"	v	typeref:typename:short	file:
nc_input_packet	drivers/net/netconsole.c	/^int nc_input_packet(uchar *pkt, struct in_addr src_ip, unsigned dest_port,$/;"	f	typeref:typename:int
nc_ip	drivers/net/netconsole.c	/^static struct in_addr nc_ip; \/* server ip *\/$/;"	v	typeref:struct:in_addr	file:
nc_out_port	drivers/net/netconsole.c	/^static short nc_out_port; \/* target output port *\/$/;"	v	typeref:typename:short	file:
nc_reg_bases	drivers/usb/host/ehci-vf.c	/^static const unsigned nc_reg_bases[] = {$/;"	v	typeref:typename:const unsigned[]	file:
nc_send_packet	drivers/net/netconsole.c	/^static void nc_send_packet(const char *buf, int len)$/;"	f	typeref:typename:void	file:
nc_start	drivers/net/netconsole.c	/^void nc_start(void)$/;"	f	typeref:typename:void
nc_stdio_getc	drivers/net/netconsole.c	/^static int nc_stdio_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
nc_stdio_putc	drivers/net/netconsole.c	/^static void nc_stdio_putc(struct stdio_dev *dev, char c)$/;"	f	typeref:typename:void	file:
nc_stdio_puts	drivers/net/netconsole.c	/^static void nc_stdio_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
nc_stdio_start	drivers/net/netconsole.c	/^static int nc_stdio_start(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
nc_stdio_tstc	drivers/net/netconsole.c	/^static int nc_stdio_tstc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
nc_timeout_handler	drivers/net/netconsole.c	/^static void nc_timeout_handler(void)$/;"	f	typeref:typename:void	file:
nc_wait_arp_handler	drivers/net/netconsole.c	/^static void nc_wait_arp_handler(uchar *pkt, unsigned dest,$/;"	f	typeref:typename:void	file:
nccsr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	nccsr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
nccsr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	nccsr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ncer	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	ncer;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ncer	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	ncer;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ncfgr	include/fsl_ifc.h	/^	u32 ncfgr;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
nclaims	net/link_local.c	/^static unsigned nclaims;$/;"	v	typeref:typename:unsigned	file:
ncmcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	ncmcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ncmcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	ncmcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ncode	lib/zlib/inflate.h	/^    unsigned ncode;             \/* number of code length code lengths *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
ncol_addr	include/ddr_spd.h	/^	unsigned char ncol_addr;   \/*  4 # of Column Addrs on this assembly *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
ncol_addr	include/ddr_spd.h	/^	unsigned char ncol_addr;   \/*  4 # of Column Addrs on this assembly *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
ncol_addr	include/spd.h	/^	unsigned char ncol_addr;   \/*  4 # of Column Addrs on this assembly *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
nconf-objs	scripts/kconfig/Makefile	/^nconf-objs     := nconf.o zconf.tab.o nconf.gui.o$/;"	m
nconf_global_help	scripts/kconfig/nconf.c	/^static const char nconf_global_help[] = N_($/;"	v	typeref:typename:const char[]	file:
nconfig	scripts/kconfig/Makefile	/^nconfig: $(obj)\/nconf$/;"	t
ncs	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 ncs;		\/* number chip selects used (1|2) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
nct6102d_wdt_disable	drivers/misc/nuvoton_nct6102d.c	/^int nct6102d_wdt_disable(void)$/;"	f	typeref:typename:int
ndar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	ndar;		\/* DMA next descriptor address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
ndcb0	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		ndcb0;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
ndcb1	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		ndcb1;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
ndcb2	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		ndcb2;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
ndcb3	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		ndcb3;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
ndelay	include/linux/compat.h	/^#define ndelay(/;"	d
ndevs	drivers/pci/pci_ftpci100.c	/^	unsigned int ndevs;$/;"	m	struct:ftpci100_data	typeref:typename:unsigned int	file:
ndfc_calculate_ecc	drivers/mtd/nand/ndfc.c	/^static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,$/;"	f	typeref:typename:int	file:
ndfc_chip_settings	include/linux/mtd/ndfc.h	/^struct ndfc_chip_settings {$/;"	s
ndfc_controller_settings	include/linux/mtd/ndfc.h	/^struct ndfc_controller_settings {$/;"	s
ndfc_cs	drivers/mtd/nand/ndfc.c	/^static int ndfc_cs[NDFC_MAX_BANKS];$/;"	v	typeref:typename:int[]	file:
ndfc_dev_ready	drivers/mtd/nand/ndfc.c	/^static int ndfc_dev_ready(struct mtd_info *mtdinfo)$/;"	f	typeref:typename:int	file:
ndfc_enable_hwecc	drivers/mtd/nand/ndfc.c	/^static void ndfc_enable_hwecc(struct mtd_info *mtdinfo, int mode)$/;"	f	typeref:typename:void	file:
ndfc_erpn	include/linux/mtd/ndfc.h	/^	uint64_t	ndfc_erpn;$/;"	m	struct:ndfc_controller_settings	typeref:typename:uint64_t
ndfc_hwcontrol	drivers/mtd/nand/ndfc.c	/^static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
ndfc_read_buf	drivers/mtd/nand/ndfc.c	/^static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
ndfc_read_byte	drivers/mtd/nand/ndfc.c	/^static uint8_t ndfc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
ndfc_select_chip	drivers/mtd/nand/ndfc.c	/^static void ndfc_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
ndfc_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void ndfc_selection_in_fpga(void)$/;"	f	typeref:typename:void
ndfc_write_buf	drivers/mtd/nand/ndfc.c	/^static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
ndimms_present	include/common_timing_params.h	/^	unsigned int ndimms_present;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
ndist	lib/zlib/inflate.h	/^    unsigned ndist;             \/* number of distance code lengths *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
ndiv	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t ndiv[80];$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t[80]
ndiv_frac	arch/arm/cpu/armv7/iproc-common/armpll.c	/^	unsigned int ndiv_frac;$/;"	m	struct:armpll_parameters	typeref:typename:unsigned int	file:
ndiv_int	arch/arm/cpu/armv7/iproc-common/armpll.c	/^	unsigned int ndiv_int;$/;"	m	struct:armpll_parameters	typeref:typename:unsigned int	file:
ndiv_max	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t ndiv_max; \/**< fMAX expressed with max NDIV value *\/$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
ndiv_min	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t ndiv_min;$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
ndma	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	struct sunxi_dma_cfg ndma[8];	\/* 0x100 Normal DMA *\/$/;"	m	struct:sunxi_dma	typeref:struct:sunxi_dma_cfg[8]
ndma	arch/arm/include/asm/arch/dma_sun4i.h	/^	struct sunxi_dma_cfg ndma[8];	\/* 0x100 Normal DMA *\/$/;"	m	struct:sunxi_dma	typeref:struct:sunxi_dma_cfg[8]
ndtr0cs0	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		ndtr0cs0;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
ndtr1cs0	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		ndtr1cs0;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
ne2k_halt	drivers/net/ne2000_base.c	/^static void ne2k_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ne2k_init	drivers/net/ne2000_base.c	/^static int ne2k_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
ne2k_recv	drivers/net/ne2000_base.c	/^static int ne2k_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ne2k_register	drivers/net/ne2000_base.c	/^int ne2k_register(void)$/;"	f	typeref:typename:int
ne2k_send	drivers/net/ne2000_base.c	/^static int ne2k_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ne2k_setup_driver	drivers/net/ne2000_base.c	/^static int ne2k_setup_driver(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
needFlush	lib/lzma/LzmaDec.h	/^  int needFlush;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:int
needInitState	lib/lzma/LzmaDec.h	/^  int needInitState;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:int
need_bgt	fs/ubifs/ubifs.h	/^	int need_bgt;$/;"	m	struct:ubifs_info	typeref:typename:int
need_more	lib/zlib/deflate.c	/^    need_more,      \/* block not completed, need more input or more output *\/$/;"	e	enum:__anonaf16f3d10103	file:
need_recovery	fs/ubifs/ubifs.h	/^	unsigned int need_recovery:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
need_sync	fs/ubifs/ubifs.h	/^	unsigned int need_sync:1;$/;"	m	struct:ubifs_wbuf	typeref:typename:unsigned int:1
need_wait	drivers/mtd/nand/pxa3xx_nand.c	/^	int			need_wait;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
need_wbuf_sync	fs/ubifs/ubifs.h	/^	int need_wbuf_sync;$/;"	m	struct:ubifs_info	typeref:typename:int
need_write_all	fs/ubifs/lpt_commit.c	/^static int need_write_all(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
needs_fifo_resize	drivers/usb/dwc3/core.h	/^	unsigned		needs_fifo_resize:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
needs_retiring	fs/yaffs2/yaffs_guts.h	/^	u32 needs_retiring:1;	\/* Data has failed on this block, *\/$/;"	m	struct:yaffs_block_info	typeref:typename:u32:1
neg_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 neg_byte(u8 s)$/;"	f	typeref:typename:u8
neg_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 neg_long(u32 s)$/;"	f	typeref:typename:u32
neg_result	arch/sh/lib/udivsi3_i4i-Os.S	/^neg_result:$/;"	l
neg_result	arch/sh/lib/udivsi3_i4i.S	/^neg_result:$/;"	l
neg_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 neg_word(u16 s)$/;"	f	typeref:typename:u16
negate_result	arch/sh/lib/udivsi3_i4i-Os.S	/^negate_result:$/;"	l
ner	drivers/serial/atmel_usart.h	/^	u32	ner;$/;"	m	struct:atmel_usart3	typeref:typename:u32
net	drivers/usb/gadget/ether.c	/^	struct eth_device	*net;$/;"	m	struct:eth_dev	typeref:struct:eth_device *	file:
net	include/api_public.h	/^		} net;$/;"	m	union:device_info::__anonf417d2e6020a	typeref:struct:device_info::__anonf417d2e6020a::__anonf417d2e60408
net	lib/efi_loader/efi_net.c	/^	struct efi_simple_network net;$/;"	m	struct:efi_net_obj	typeref:struct:efi_simple_network	file:
net_arp_wait_packet_ip	net/arp.c	/^struct in_addr net_arp_wait_packet_ip;$/;"	v	typeref:struct:in_addr
net_arp_wait_reply_ip	net/arp.c	/^static struct in_addr net_arp_wait_reply_ip;$/;"	v	typeref:struct:in_addr	file:
net_auto_load	net/net.c	/^void net_auto_load(void)$/;"	f	typeref:typename:void
net_bcast_ethaddr	net/net.c	/^const u8 net_bcast_ethaddr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };$/;"	v	typeref:typename:const u8[6]
net_boot_file_expected_size_in_blocks	net/net.c	/^u32 net_boot_file_expected_size_in_blocks;$/;"	v	typeref:typename:u32
net_boot_file_name	net/net.c	/^char net_boot_file_name[1024];$/;"	v	typeref:typename:char[1024]
net_boot_file_size	net/net.c	/^u32 net_boot_file_size;$/;"	v	typeref:typename:u32
net_busy_flag	net/net.c	/^int __maybe_unused net_busy_flag;$/;"	v	typeref:typename:int __maybe_unused
net_cdp_ethaddr	net/cdp.c	/^const u8 net_cdp_ethaddr[6] = { 0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc };$/;"	v	typeref:typename:const u8[6]
net_check_prereq	net/net.c	/^static int net_check_prereq(enum proto_t protocol)$/;"	f	typeref:typename:int	file:
net_cleanup_loop	net/net.c	/^static void net_cleanup_loop(void)$/;"	f	typeref:typename:void	file:
net_clear_handlers	net/net.c	/^static void net_clear_handlers(void)$/;"	f	typeref:typename:void	file:
net_copy_ip	include/net.h	/^static inline void net_copy_ip(void *to, void *from)$/;"	f	typeref:typename:void
net_copy_u32	include/net.h	/^static inline void net_copy_u32(u32 *to, u32 *from)$/;"	f	typeref:typename:void
net_defragment	net/net.c	/^static inline struct ip_udp_hdr *net_defragment(struct ip_udp_hdr *ip,$/;"	f	typeref:struct:ip_udp_hdr *	file:
net_dev	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	struct eth_device *net_dev;$/;"	m	struct:ldpaa_eth_priv	typeref:struct:eth_device *
net_dev_exists	net/net.c	/^static int	net_dev_exists;$/;"	v	typeref:typename:int	file:
net_device_stats	include/linux/netdevice.h	/^struct net_device_stats {$/;"	s
net_dns_env_var	net/dns.c	/^char *net_dns_env_var;	\/* The envvar to store the answer in *\/$/;"	v	typeref:typename:char *
net_dns_resolve	net/dns.c	/^char *net_dns_resolve;	\/* The host to resolve  *\/$/;"	v	typeref:typename:char *
net_dns_server	net/net.c	/^struct in_addr net_dns_server;$/;"	v	typeref:struct:in_addr
net_dns_server2	net/net.c	/^struct in_addr net_dns_server2;$/;"	v	typeref:struct:in_addr
net_eth_hdr_size	net/net.c	/^net_eth_hdr_size(void)$/;"	f	typeref:typename:int
net_ethaddr	net/net.c	/^u8 net_ethaddr[6];$/;"	v	typeref:typename:u8[6]
net_gateway	net/net.c	/^struct in_addr net_gateway;$/;"	v	typeref:struct:in_addr
net_get_arp_handler	net/net.c	/^rxhand_f *net_get_arp_handler(void)$/;"	f	typeref:typename:rxhand_f *
net_get_udp_handler	net/net.c	/^rxhand_f *net_get_udp_handler(void)$/;"	f	typeref:typename:rxhand_f *
net_hostname	net/bootp.c	/^char net_hostname[32] = {0,}; \/* Our hostname *\/$/;"	v	typeref:typename:char[32]
net_init	net/net.c	/^void net_init(void)$/;"	f	typeref:typename:void
net_init_loop	net/net.c	/^static void net_init_loop(void)$/;"	f	typeref:typename:void	file:
net_ip	net/net.c	/^struct in_addr	net_ip;$/;"	v	typeref:struct:in_addr
net_ip_id	net/net.c	/^static unsigned	net_ip_id;$/;"	v	typeref:typename:unsigned	file:
net_loop	net/net.c	/^int net_loop(enum proto_t protocol)$/;"	f	typeref:typename:int
net_loop_last_protocol	drivers/net/netconsole.c	/^enum proto_t net_loop_last_protocol = BOOTP;$/;"	v	typeref:enum:proto_t
net_loop_state	include/net.h	/^enum net_loop_state {$/;"	g
net_mcast_addr	net/net.c	/^struct in_addr net_mcast_addr;$/;"	v	typeref:struct:in_addr
net_mode	lib/efi_loader/efi_net.c	/^	struct efi_simple_network_mode net_mode;$/;"	m	struct:efi_net_obj	typeref:struct:efi_simple_network_mode	file:
net_native_vlan	net/net.c	/^ushort		net_native_vlan = 0xFFFF;$/;"	v	typeref:typename:ushort
net_netmask	net/net.c	/^struct in_addr net_netmask;$/;"	v	typeref:struct:in_addr
net_nis_domain	net/bootp.c	/^char net_nis_domain[32] = {0,}; \/* Our NIS domain *\/$/;"	v	typeref:typename:char[32]
net_ntp_server	net/net.c	/^struct in_addr	net_ntp_server;$/;"	v	typeref:struct:in_addr
net_ntp_time_offset	net/net.c	/^int		net_ntp_time_offset;$/;"	v	typeref:typename:int
net_null_ethaddr	net/net.c	/^const u8 net_null_ethaddr[6];$/;"	v	typeref:typename:const u8[6]
net_our_vlan	net/net.c	/^ushort		net_our_vlan = 0xFFFF;$/;"	v	typeref:typename:ushort
net_part_size	cmd/mtdparts.c	/^static uint64_t net_part_size(struct mtd_info *mtd, struct part_info *part)$/;"	f	typeref:typename:uint64_t	file:
net_ping_ip	net/ping.c	/^struct in_addr net_ping_ip;$/;"	v	typeref:struct:in_addr
net_pkt_buf	net/net.c	/^static uchar net_pkt_buf[(PKTBUFSRX+1) * PKTSIZE_ALIGN + PKTALIGN];$/;"	v	typeref:typename:uchar[]	file:
net_process_received_packet	net/net.c	/^void net_process_received_packet(uchar *in_packet, int len)$/;"	f	typeref:typename:void
net_prot	include/fsl-mc/fsl_dpni.h	/^enum net_prot {$/;"	g
net_random_ethaddr	include/net.h	/^static inline void net_random_ethaddr(uchar *addr)$/;"	f	typeref:typename:void
net_read_ip	include/net.h	/^static inline struct in_addr net_read_ip(void *from)$/;"	f	typeref:struct:in_addr
net_read_u32	include/net.h	/^static inline u32 net_read_u32(u32 *from)$/;"	f	typeref:typename:u32
net_restart_wrap	net/net.c	/^int		net_restart_wrap;$/;"	v	typeref:typename:int
net_restarted	net/net.c	/^static int	net_restarted;$/;"	v	typeref:typename:int	file:
net_root_path	net/bootp.c	/^char net_root_path[64] = {0,}; \/* Our bootpath *\/$/;"	v	typeref:typename:char[64]
net_rx_buffs	drivers/net/keystone_net.c	/^	struct rx_buff_desc		net_rx_buffs;$/;"	m	struct:ks2_eth_priv	typeref:struct:rx_buff_desc	file:
net_rx_buffs	drivers/net/keystone_net.c	/^struct rx_buff_desc net_rx_buffs = {$/;"	v	typeref:struct:rx_buff_desc
net_rx_packet	net/net.c	/^uchar *net_rx_packet;$/;"	v	typeref:typename:uchar *
net_rx_packet_len	net/net.c	/^int		net_rx_packet_len;$/;"	v	typeref:typename:int
net_rx_packets	net/net.c	/^uchar *net_rx_packets[PKTBUFSRX];$/;"	v	typeref:typename:uchar * []
net_send_packet	include/net.h	/^static inline void net_send_packet(uchar *pkt, int len)$/;"	f	typeref:typename:void
net_send_udp_packet	net/net.c	/^int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int sport,$/;"	f	typeref:typename:int
net_server_ethaddr	net/net.c	/^u8 net_server_ethaddr[6];$/;"	v	typeref:typename:u8[6]
net_server_ip	net/net.c	/^struct in_addr	net_server_ip;$/;"	v	typeref:struct:in_addr
net_set_arp_handler	net/net.c	/^void net_set_arp_handler(rxhand_f *f)$/;"	f	typeref:typename:void
net_set_ether	net/net.c	/^int net_set_ether(uchar *xet, const uchar *dest_ethaddr, uint prot)$/;"	f	typeref:typename:int
net_set_icmp_handler	net/net.c	/^void net_set_icmp_handler(rxhand_icmp_f *f)$/;"	f	typeref:typename:void
net_set_ip_header	net/net.c	/^void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source)$/;"	f	typeref:typename:void
net_set_state	include/net.h	/^static inline void net_set_state(enum net_loop_state state)$/;"	f	typeref:typename:void
net_set_timeout_handler	net/net.c	/^void net_set_timeout_handler(ulong iv, thand_f *f)$/;"	f	typeref:typename:void
net_set_udp_handler	net/net.c	/^void net_set_udp_handler(rxhand_f *f)$/;"	f	typeref:typename:void
net_set_udp_header	net/net.c	/^void net_set_udp_header(uchar *pkt, struct in_addr dest, int dport, int sport,$/;"	f	typeref:typename:void
net_set_up	test/py/tests/test_net.py	/^net_set_up = False$/;"	v
net_start_again	net/net.c	/^int net_start_again(void)$/;"	f	typeref:typename:int
net_state	net/net.c	/^enum net_loop_state net_state;$/;"	v	typeref:enum:net_loop_state
net_timeout	drivers/net/netconsole.c	/^static int net_timeout;$/;"	v	typeref:typename:int	file:
net_try_count	net/net.c	/^static int net_try_count;$/;"	v	typeref:typename:int	file:
net_tx_packet	net/net.c	/^uchar *net_tx_packet;$/;"	v	typeref:typename:uchar *
net_update_ether	net/net.c	/^int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot)$/;"	f	typeref:typename:int
net_write_ip	include/net.h	/^static inline void net_write_ip(void *to, struct in_addr ip)$/;"	f	typeref:typename:void
netboot_common	cmd/net.c	/^static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc,$/;"	f	typeref:typename:int	file:
netboot_update_env	cmd/net.c	/^static void netboot_update_env(void)$/;"	f	typeref:typename:void	file:
netcp	arch/arm/dts/k2e-netcp.dtsi	/^netcp: netcp@24000000 {$/;"	l
netcp	arch/arm/dts/k2g-netcp.dtsi	/^netcp: netcp@4000000 {$/;"	l
netcp	arch/arm/dts/k2hk-netcp.dtsi	/^netcp: netcp@2000000 {$/;"	l
netcp	arch/arm/dts/k2l-netcp.dtsi	/^netcp: netcp@26000000 {$/;"	l
netcp_pktdma	drivers/dma/keystone_nav_cfg.c	/^struct pktdma_cfg netcp_pktdma = {$/;"	v	typeref:struct:pktdma_cfg
netcp_pktdma	drivers/net/keystone_net.c	/^	struct pktdma_cfg		*netcp_pktdma;$/;"	m	struct:ks2_eth_priv	typeref:struct:pktdma_cfg *	file:
netdev	drivers/net/dm9000x.c	/^	struct eth_device netdev;$/;"	m	struct:board_info	typeref:struct:eth_device	file:
netdev	drivers/net/dnet.c	/^	struct eth_device	netdev;$/;"	m	struct:dnet_device	typeref:struct:eth_device	file:
netdev	drivers/net/ks8851_mll.c	/^	struct net_device	*netdev;$/;"	m	struct:ks_net	typeref:struct:net_device *	file:
netdev	drivers/net/macb.c	/^	struct eth_device	netdev;$/;"	m	struct:macb_device	typeref:struct:eth_device	file:
netdev_dbg	drivers/net/mvpp2.c	/^#define netdev_dbg(/;"	d	file:
netdev_err	drivers/net/mvneta.c	/^#define netdev_err(/;"	d	file:
netdev_err	drivers/net/mvpp2.c	/^#define netdev_err(/;"	d	file:
netdev_ethtool_ops	drivers/net/uli526x.c	/^static const struct ethtool_ops netdev_ethtool_ops;$/;"	v	typeref:typename:const struct ethtool_ops	file:
netdev_info	drivers/net/mvneta.c	/^#define netdev_info(/;"	d	file:
netdev_info	drivers/net/mvpp2.c	/^#define netdev_info(/;"	d	file:
netdev_warn	drivers/net/mvneta.c	/^#define netdev_warn(/;"	d	file:
netdev_warn	drivers/net/mvpp2.c	/^#define netdev_warn(/;"	d	file:
network_channel	include/usbdescriptors.h	/^		struct usb_class_network_channel_descriptor network_channel;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_network_channel_descriptor
network_started	drivers/usb/gadget/ether.c	/^	unsigned		network_started:1;$/;"	m	struct:eth_dev	typeref:typename:unsigned:1	file:
never_changed	include/linux/ethtool.h	/^	__u32	never_changed;$/;"	m	struct:ethtool_get_features_block	typeref:typename:__u32
new	common/usb_kbd.c	/^	uint8_t		*new;$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint8_t *	file:
new	fs/ubifs/ubifs.h	/^	unsigned new:1;$/;"	m	struct:ubifs_orphan	typeref:typename:unsigned:1
new_br0	board/freescale/p1022ds/diu.c	/^static u32 new_br0, new_or0, new_br1, new_or1;$/;"	v	typeref:typename:u32	file:
new_br1	board/freescale/p1022ds/diu.c	/^static u32 new_br0, new_or0, new_br1, new_or1;$/;"	v	typeref:typename:u32	file:
new_dent	fs/ubifs/ubifs.h	/^	unsigned int new_dent:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
new_dent	fs/ubifs/ubifs.h	/^	unsigned int new_dent;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
new_fdt	arch/x86/include/asm/global_data.h	/^	void *new_fdt;			\/* Relocated FDT *\/$/;"	m	struct:arch_global_data	typeref:typename:void *
new_fdt	include/asm-generic/global_data.h	/^	void *new_fdt;			\/* Relocated FDT *\/$/;"	m	struct:global_data	typeref:typename:void *
new_fm_vhdr	drivers/mtd/ubi/fastmap.c	/^static struct ubi_vid_hdr *new_fm_vhdr(struct ubi_device *ubi, int vol_id)$/;"	f	typeref:struct:ubi_vid_hdr *	file:
new_fsg	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_dev		*fsg, *new_fsg;$/;"	m	struct:fsg_common	typeref:struct:fsg_dev *	file:
new_gd	include/asm-generic/global_data.h	/^	struct global_data *new_gd;	\/* relocated global data *\/$/;"	m	struct:global_data	typeref:struct:global_data *
new_ihead_lnum	fs/ubifs/debug.h	/^	int new_ihead_lnum;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
new_ihead_offs	fs/ubifs/debug.h	/^	int new_ihead_offs;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
new_ino	fs/ubifs/ubifs.h	/^	unsigned int new_ino:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
new_ino	fs/ubifs/ubifs.h	/^	unsigned int new_ino;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
new_ino_d	fs/ubifs/ubifs.h	/^	unsigned int new_ino_d:13;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:13
new_ino_d	fs/ubifs/ubifs.h	/^	unsigned int new_ino_d;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
new_list	fs/ubifs/ubifs.h	/^	struct list_head new_list;$/;"	m	struct:ubifs_orphan	typeref:struct:list_head
new_name	drivers/mtd/ubi/ubi.h	/^	char new_name[UBI_VOL_NAME_MAX + 1];$/;"	m	struct:ubi_rename_entry	typeref:typename:char[]
new_name_len	drivers/mtd/ubi/ubi.h	/^	int new_name_len;$/;"	m	struct:ubi_rename_entry	typeref:typename:int
new_nhead_offs	fs/ubifs/debug.h	/^	int new_nhead_offs;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
new_or0	board/freescale/p1022ds/diu.c	/^static u32 new_br0, new_or0, new_br1, new_or1;$/;"	v	typeref:typename:u32	file:
new_or1	board/freescale/p1022ds/diu.c	/^static u32 new_br0, new_or0, new_br1, new_or1;$/;"	v	typeref:typename:u32	file:
new_orphans	fs/ubifs/ubifs.h	/^	int new_orphans;$/;"	m	struct:ubifs_info	typeref:typename:int
new_page	fs/ubifs/ubifs.h	/^	unsigned int new_page:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
new_page	fs/ubifs/ubifs.h	/^	unsigned int new_page;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int
new_pipe	common/cli_hush.c	/^static struct pipe *new_pipe(void)$/;"	f	typeref:struct:pipe *	file:
new_rx_packet	lib/efi_loader/efi_net.c	/^static bool new_rx_packet;$/;"	v	typeref:typename:bool	file:
new_s0	include/ec_commands.h	/^	uint8_t new_s0;$/;"	m	struct:lightbar_params	typeref:typename:uint8_t
new_size	fs/ubifs/replay.c	/^			loff_t new_size;$/;"	m	struct:replay_entry::__anonf2442133010a::__anonf24421330208	typeref:typename:loff_t	file:
new_size	fs/ubifs/ubifs-media.h	/^	__le64 new_size;$/;"	m	struct:ubifs_trun_node	typeref:typename:__le64
new_string	scripts/kconfig/zconf.lex.c	/^static void new_string(void)$/;"	f	typeref:typename:void	file:
new_transfer	net/tftp.c	/^static void new_transfer(void)$/;"	f	typeref:typename:void	file:
new_tx_packet	lib/efi_loader/efi_net.c	/^static void *new_tx_packet;$/;"	v	typeref:typename:void *	file:
new_wbuf_timer_nolock	fs/ubifs/io.c	/^static void new_wbuf_timer_nolock(struct ubifs_wbuf *wbuf)$/;"	f	typeref:typename:void	file:
newstate	board/esd/common/xilinx_jtag/ports.c	/^static int newstate = 0;$/;"	v	typeref:typename:int	file:
next	arch/arm/include/asm/imx-common/dma.h	/^	unsigned long		next;$/;"	m	struct:mxs_dma_cmd	typeref:typename:unsigned long
next	arch/avr32/include/asm/setup.h	/^	struct tag_mem_range *	next;$/;"	m	struct:tag_mem_range	typeref:struct:tag_mem_range *
next	arch/m68k/include/asm/fec.h	/^	struct fec_info_s *next;$/;"	m	struct:fec_info_s	typeref:struct:fec_info_s *
next	arch/m68k/include/asm/fsl_mcdmafec.h	/^	struct fec_info_dma *next;$/;"	m	struct:fec_info_dma	typeref:struct:fec_info_dma *
next	arch/x86/include/asm/bootparam.h	/^	__u64 next;$/;"	m	struct:setup_data	typeref:typename:__u64
next	cmd/bootmenu.c	/^	struct bootmenu_entry *next;	\/* next menu entry (num+1) *\/$/;"	m	struct:bootmenu_entry	typeref:struct:bootmenu_entry *	file:
next	common/cli_hush.c	/^	struct close_me *next;$/;"	m	struct:close_me	typeref:struct:close_me *	file:
next	common/cli_hush.c	/^	struct pipe *next;			\/* to track background commands *\/$/;"	m	struct:pipe	typeref:struct:pipe *	file:
next	common/cli_hush.c	/^	struct redir_struct *next;	\/* pointer to the next redirect in the list *\/$/;"	m	struct:redir_struct	typeref:struct:redir_struct *	file:
next	common/cli_hush.c	/^	struct variables *next;$/;"	m	struct:variables	typeref:struct:variables *	file:
next	common/dlmalloc.c	/^	GmListElement* next;$/;"	m	struct:GmListElement	typeref:typename:GmListElement *	file:
next	disk/part_amiga.h	/^    u32   next;$/;"	m	struct:bootcode_block	typeref:typename:u32
next	disk/part_amiga.h	/^    u32 next;$/;"	m	struct:partition_block	typeref:typename:u32
next	drivers/net/altera_tse.h	/^	u32 next;	\/* the next descriptor in the list. *\/$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u32
next	drivers/net/davinci_emac.h	/^	u_int32_t	next;		\/* Pointer to next descriptor$/;"	m	struct:_emac_desc	typeref:typename:u_int32_t
next	drivers/net/dc2114x.c	/^	u32 next;$/;"	m	struct:de4x5_desc	typeref:typename:u32	file:
next	drivers/net/sun8i_emac.c	/^	u32 next;$/;"	m	struct:emac_dma_desc	typeref:typename:u32	file:
next	drivers/net/xilinx_axi_emac.c	/^	u32 next;	\/* Next descriptor pointer *\/$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
next	drivers/usb/gadget/atmel_usba_udc.h	/^	dma_addr_t next;$/;"	m	struct:usba_dma_desc	typeref:typename:dma_addr_t
next	drivers/usb/gadget/ci_udc.h	/^	unsigned next;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
next	drivers/usb/gadget/ci_udc.h	/^	unsigned next;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
next	drivers/usb/gadget/storage_common.c	/^	struct fsg_buffhd		*next;$/;"	m	struct:fsg_buffhd	typeref:struct:fsg_buffhd *	file:
next	drivers/usb/host/xhci.h	/^	struct xhci_segment	*next;$/;"	m	struct:xhci_segment	typeref:struct:xhci_segment *
next	drivers/video/stb_truetype.h	/^   struct stbtt__active_edge *next;$/;"	m	struct:stbtt__active_edge	typeref:struct:stbtt__active_edge *
next	drivers/video/stb_truetype.h	/^   struct stbtt__hheap_chunk *next;$/;"	m	struct:stbtt__hheap_chunk	typeref:struct:stbtt__hheap_chunk *
next	fs/ext4/ext4_journal.h	/^	struct revoke_blk_list *next;$/;"	m	struct:revoke_blk_list	typeref:struct:revoke_blk_list *
next	fs/jffs2/jffs2_1pass.c	/^	struct mem_block *next;$/;"	m	struct:mem_block	typeref:struct:mem_block *	file:
next	fs/jffs2/jffs2_nand_1pass.c	/^	struct mem_block *next;$/;"	m	struct:mem_block	typeref:struct:mem_block *	file:
next	fs/jffs2/jffs2_nand_private.h	/^	struct b_dirent *next;$/;"	m	struct:b_dirent	typeref:struct:b_dirent *
next	fs/jffs2/jffs2_nand_private.h	/^	struct b_inode *next;$/;"	m	struct:b_inode	typeref:struct:b_inode *
next	fs/jffs2/jffs2_nand_private.h	/^	struct b_node *next;$/;"	m	struct:b_node	typeref:struct:b_node *
next	fs/jffs2/jffs2_private.h	/^	struct b_node *next;$/;"	m	struct:b_node	typeref:struct:b_node *
next	fs/jffs2/summary.h	/^	union jffs2_sum_mem *next;$/;"	m	struct:jffs2_sum_dirent_mem	typeref:union:jffs2_sum_mem *
next	fs/jffs2/summary.h	/^	union jffs2_sum_mem *next;$/;"	m	struct:jffs2_sum_inode_mem	typeref:union:jffs2_sum_mem *
next	fs/jffs2/summary.h	/^	union jffs2_sum_mem *next;$/;"	m	struct:jffs2_sum_unknown_mem	typeref:union:jffs2_sum_mem *
next	fs/jffs2/summary.h	/^	union jffs2_sum_mem *next;$/;"	m	struct:jffs2_sum_xattr_mem	typeref:union:jffs2_sum_mem *
next	fs/jffs2/summary.h	/^	union jffs2_sum_mem *next;$/;"	m	struct:jffs2_sum_xref_mem	typeref:union:jffs2_sum_mem *
next	fs/ubifs/ubifs.h	/^	struct file_system_type * next;$/;"	m	struct:file_system_type	typeref:struct:file_system_type *
next	fs/yaffs2/yaffs_allocator.c	/^	struct yaffs_obj_list *next;$/;"	m	struct:yaffs_obj_list	typeref:struct:yaffs_obj_list *	file:
next	fs/yaffs2/yaffs_allocator.c	/^	struct yaffs_tnode_list *next;$/;"	m	struct:yaffs_tnode_list	typeref:struct:yaffs_tnode_list *	file:
next	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_shadow_fixer *next;$/;"	m	struct:yaffs_shadow_fixer	typeref:struct:yaffs_shadow_fixer *
next	fs/zfs/zfs.c	/^		struct dnode_chain *next;$/;"	m	struct:dnode_get_path::dnode_chain	typeref:struct:dnode_chain *	file:
next	include/MCD_dma.h	/^	MCD_bufDesc *next;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:MCD_bufDesc *
next	include/atmel_hlcdc.h	/^	u32	next;$/;"	m	struct:lcd_dma_desc	typeref:typename:u32
next	include/cbfs.h	/^	struct cbfs_cachenode *next;$/;"	m	struct:cbfs_cachenode	typeref:struct:cbfs_cachenode *
next	include/linux/compat.h	/^	struct callback_head *next;$/;"	m	struct:callback_head	typeref:struct:callback_head *
next	include/linux/ioport.h	/^	struct resource_list *next;$/;"	m	struct:resource_list	typeref:struct:resource_list *
next	include/linux/list.h	/^	struct hlist_node *next, **pprev;$/;"	m	struct:hlist_node	typeref:struct:hlist_node *
next	include/linux/list.h	/^	struct list_head *next, *prev;$/;"	m	struct:list_head	typeref:struct:list_head *
next	include/linux/mtd/mtd.h	/^	struct erase_info *next;$/;"	m	struct:erase_info	typeref:struct:erase_info *
next	include/linux/mtd/ubi.h	/^	struct notifier_block *next;$/;"	m	struct:notifier_block	typeref:struct:notifier_block *
next	include/linux/mtd/ubi.h	/^	void *next;$/;"	m	struct:notifier_block	typeref:typename:void *
next	include/net.h	/^	struct eth_device *next;$/;"	m	struct:eth_device	typeref:struct:eth_device *
next	include/os.h	/^	struct os_dirent_node *next;	\/* Pointer to next node, or NULL *\/$/;"	m	struct:os_dirent_node	typeref:struct:os_dirent_node *
next	include/serial.h	/^	struct serial_device	*next;$/;"	m	struct:serial_device	typeref:struct:serial_device *
next	include/usbdevice.h	/^	struct urb_link *next;$/;"	m	struct:urb_link	typeref:struct:urb_link *
next	lib/zlib/inflate.h	/^    code FAR *next;             \/* next available space in codes[] *\/$/;"	m	struct:inflate_state	typeref:typename:code FAR *
next	scripts/basic/fixdep.c	/^	struct item	*next;$/;"	m	struct:item	typeref:struct:item *	file:
next	scripts/kconfig/expr.h	/^	struct file *next;$/;"	m	struct:file	typeref:struct:file *
next	scripts/kconfig/expr.h	/^	struct menu *next;$/;"	m	struct:menu	typeref:struct:menu *
next	scripts/kconfig/expr.h	/^	struct property *next;     \/* next property - null if last *\/$/;"	m	struct:property	typeref:struct:property *
next	scripts/kconfig/expr.h	/^	struct symbol *next;$/;"	m	struct:symbol	typeref:struct:symbol *
next	scripts/kconfig/kxgettext.c	/^	struct file_line *next;$/;"	m	struct:file_line	typeref:struct:file_line *	file:
next	scripts/kconfig/kxgettext.c	/^	struct message	 *next;$/;"	m	struct:message	typeref:struct:message *	file:
next	scripts/kconfig/list.h	/^	struct list_head *next, *prev;$/;"	m	struct:list_head	typeref:struct:list_head *
next	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_list *next;$/;"	m	struct:dialog_list	typeref:struct:dialog_list *
next	scripts/kconfig/lxdialog/dialog.h	/^	struct subtitle_list *next;$/;"	m	struct:subtitle_list	typeref:struct:subtitle_list *
next	scripts/kconfig/symbol.c	/^	struct dep_stack *prev, *next;$/;"	m	struct:dep_stack	typeref:struct:dep_stack *	file:
next	tools/fdtgrep.c	/^	struct value_node *next;	\/* Pointer to next node, or NULL *\/$/;"	m	struct:value_node	typeref:struct:value_node *	file:
next	tools/imagetool.h	/^	struct content_info *next;$/;"	m	struct:content_info	typeref:struct:content_info *
next	tools/proftool.c	/^	struct trace_configline_info *next;$/;"	m	struct:trace_configline_info	typeref:struct:trace_configline_info *	file:
next2	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^next2:$/;"	l
nextItem	scripts/kconfig/qconf.h	/^	ConfigItem* nextItem;$/;"	m	class:ConfigItem	typeref:typename:ConfigItem *
nextReturn	fs/yaffs2/yaffsfs.c	/^	struct yaffs_obj *nextReturn;	\/* obj  returned by next readddir *\/$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:struct:yaffs_obj *	file:
nextSibling	scripts/kconfig/qconf.h	/^	ConfigItem* nextSibling() const$/;"	f	class:ConfigItem	typeref:typename:ConfigItem *
nextView	scripts/kconfig/qconf.h	/^	ConfigView* nextView;$/;"	m	class:ConfigView	typeref:typename:ConfigView *
next_ad	drivers/video/fsl_diu_fb.c	/^	__le32 next_ad;$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
next_addr	include/dwmmc.h	/^	u32 next_addr;$/;"	m	struct:dwmci_idmac	typeref:typename:u32
next_addr	include/usb.h	/^	int next_addr;$/;"	m	struct:usb_bus_priv	typeref:typename:int
next_bdptr	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 next_bdptr;$/;"	m	struct:qm_host_desc	typeref:typename:u32
next_bin	common/dlmalloc.c	/^#define next_bin(/;"	d	file:
next_blk	common/xyzModem.c	/^  unsigned char next_blk;	\/* Expected block *\/$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char	file:
next_buff_phys_addr	drivers/net/mvpp2.c	/^	u32 next_buff_phys_addr;$/;"	m	struct:mvpp2_buff_hdr	typeref:typename:u32	file:
next_buff_virt_addr	drivers/net/mvpp2.c	/^	u32 next_buff_virt_addr;$/;"	m	struct:mvpp2_buff_hdr	typeref:typename:u32	file:
next_buffhd_to_drain	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_buffhd	*next_buffhd_to_drain;$/;"	m	struct:fsg_common	typeref:struct:fsg_buffhd *	file:
next_buffhd_to_fill	drivers/usb/gadget/f_mass_storage.c	/^	struct fsg_buffhd	*next_buffhd_to_fill;$/;"	m	struct:fsg_common	typeref:struct:fsg_buffhd *	file:
next_chunk	common/dlmalloc.c	/^#define next_chunk(/;"	d	file:
next_ctrl	arch/arm/include/asm/arch-lpc32xx/dma.h	/^	u32 next_ctrl;$/;"	m	struct:lpc32xx_dmac_ll	typeref:typename:u32
next_desc	drivers/fpga/fpga.c	/^static int next_desc = FPGA_INVALID_DEVICE;$/;"	v	typeref:typename:int	file:
next_desc	drivers/net/ag7xxx.c	/^	u32	next_desc;$/;"	m	struct:ag7xxx_dma_desc	typeref:typename:u32	file:
next_desc_addr	arch/blackfin/include/asm/dma.h	/^	void *next_desc_addr;$/;"	m	struct:dmasg_large	typeref:typename:void *
next_desc_ptr	arch/blackfin/include/asm/dma.h	/^	void *next_desc_ptr;	\/* DMA Next Descriptor Pointer register *\/$/;"	m	struct:dma_register	typeref:typename:void *
next_desc_ptr	drivers/ddr/marvell/axp/xor.h	/^	u32 next_desc_ptr;	\/* Next descriptor address pointer *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
next_desc_to_proc	drivers/net/mvneta.c	/^	int next_desc_to_proc;$/;"	m	struct:mvneta_rx_queue	typeref:typename:int	file:
next_desc_to_proc	drivers/net/mvneta.c	/^	int next_desc_to_proc;$/;"	m	struct:mvneta_tx_queue	typeref:typename:int	file:
next_desc_to_proc	drivers/net/mvpp2.c	/^	int next_desc_to_proc;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:int	file:
next_desc_to_proc	drivers/net/mvpp2.c	/^	int next_desc_to_proc;$/;"	m	struct:mvpp2_tx_queue	typeref:typename:int	file:
next_descr_addr0	drivers/net/tsi108_eth.c	/^	vuint32 next_descr_addr0;\/* next descriptor address, least significant bytes.  Must be 64-bit /;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
next_descr_addr1	drivers/net/tsi108_eth.c	/^	vuint32 next_descr_addr1;\/* next descriptor address, most significant bytes. *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
next_descriptor_pointer	drivers/net/altera_tse.h	/^	u32 next_descriptor_pointer;$/;"	m	struct:alt_sgdma_registers	typeref:typename:u32
next_dirty_cnode	fs/ubifs/lpt_commit.c	/^static struct ubifs_cnode *next_dirty_cnode(struct ubifs_cnode *cnode)$/;"	f	typeref:struct:ubifs_cnode *	file:
next_dl_td	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct td *next_dl_td;$/;"	m	struct:td	typeref:struct:td *
next_dl_td	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct td *next_dl_td;$/;"	m	struct:td	typeref:struct:td *
next_dl_td	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct td *next_dl_td;$/;"	m	struct:td	typeref:struct:td *
next_dl_td	drivers/usb/host/ohci-s3c24xx.h	/^	struct td *next_dl_td;$/;"	m	struct:td	typeref:struct:td *
next_dl_td	drivers/usb/host/ohci.h	/^	struct td *next_dl_td;$/;"	m	struct:td	typeref:struct:td *
next_ed	drivers/net/pic32_eth.h	/^	u32 next_ed;	\/* next descriptor *\/$/;"	m	struct:eth_dma_desc	typeref:typename:u32
next_ep0_request	drivers/usb/musb-new/musb_gadget_ep0.c	/^#define	next_ep0_request(/;"	d	file:
next_fifo_transaction	drivers/usb/gadget/atmel_usba_udc.c	/^static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)$/;"	f	typeref:typename:void	file:
next_hdr	include/efi.h	/^	void *next_hdr;$/;"	m	struct:efi_priv	typeref:typename:void *
next_hole	net/net.c	/^	u16 next_hole;	\/* index of next (in 8-b blocks), 0 == none *\/$/;"	m	struct:hole	typeref:typename:u16	file:
next_hop	include/i2c.h	/^	struct i2c_next_hop	next_hop[CONFIG_SYS_I2C_MAX_HOPS];$/;"	m	struct:i2c_bus_hose	typeref:struct:i2c_next_hop[]
next_id	common/bootstage.c	/^static int next_id = BOOTSTAGE_ID_USER;$/;"	v	typeref:typename:int	file:
next_idx	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		uint32_t next_idx;$/;"	m	struct:qbman_swp::__anonadc6216b0308	typeref:typename:uint32_t
next_in	include/bzlib.h	/^      char *next_in;$/;"	m	struct:__anond8626de10108	typeref:typename:char *
next_in	include/u-boot/zlib.h	/^	Bytef	*next_in; \/* next input byte *\/$/;"	m	struct:z_stream_s	typeref:typename:Bytef *
next_in_request	drivers/usb/musb-new/musb_core.h	/^static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)$/;"	f	typeref:struct:musb_request *
next_ino	fs/ubifs/ubifs.h	/^	int next_ino;$/;"	m	struct:ubifs_wbuf	typeref:typename:int
next_interface_id	include/linux/usb/composite.h	/^	u8			next_interface_id;$/;"	m	struct:usb_configuration	typeref:typename:u8
next_key	fs/reiserfs/reiserfs.c	/^next_key (void)$/;"	f	typeref:typename:int	file:
next_key_nr	fs/reiserfs/reiserfs_private.h	/^  unsigned int next_key_nr[MAX_HEIGHT];$/;"	m	struct:fsys_reiser_info	typeref:typename:unsigned int[]
next_lli	arch/arm/include/asm/arch-lpc32xx/dma.h	/^	u32 next_lli;$/;"	m	struct:lpc32xx_dmac_ll	typeref:typename:u32
next_lut_index	drivers/pci/pcie_layerscape.c	/^	int next_lut_index;$/;"	m	struct:ls_pcie	typeref:typename:int	file:
next_mrc_block	arch/x86/lib/mrccache.c	/^static struct mrc_data_container *next_mrc_block($/;"	f	typeref:struct:mrc_data_container *	file:
next_nl_pos	drivers/serial/usbtty.c	/^static int next_nl_pos (const char *s)$/;"	f	typeref:typename:int	file:
next_nnode	fs/ubifs/lpt_commit.c	/^static struct ubifs_nnode *next_nnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_nnode *	file:
next_nonblank	tools/buildman/kconfiglib.py	/^    def next_nonblank(self):$/;"	m	class:_FileFeed
next_ofs	cmd/onenand.c	/^static loff_t next_ofs;$/;"	v	typeref:typename:loff_t	file:
next_out	include/bzlib.h	/^      char *next_out;$/;"	m	struct:__anond8626de10108	typeref:typename:char *
next_out	include/u-boot/zlib.h	/^	Bytef	*next_out; \/* next output byte should be put there *\/$/;"	m	struct:z_stream_s	typeref:typename:Bytef *
next_out_request	drivers/usb/musb-new/musb_core.h	/^static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)$/;"	f	typeref:struct:musb_request *
next_p	drivers/net/xilinx_ll_temac_sdma.h	/^	struct cdmac_bd *next_p;	\/* Next Descriptor Pointer *\/$/;"	m	struct:cdmac_bd	typeref:struct:cdmac_bd *
next_pad	drivers/net/altera_tse.h	/^	u32 next_pad;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u32
next_pbl_cmd	tools/pblimage.c	/^static uint32_t next_pbl_cmd = 0x82000000;$/;"	v	typeref:typename:uint32_t	file:
next_pnode_to_dirty	fs/ubifs/lpt_commit.c	/^static struct ubifs_pnode *next_pnode_to_dirty(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_pnode *	file:
next_pointer	drivers/net/enc28j60.c	/^	u16			next_pointer;$/;"	m	struct:enc_device	typeref:typename:u16	file:
next_repeat_ms	drivers/input/tegra-kbc.c	/^	unsigned int next_repeat_ms;	\/* Next time we repeat a key *\/$/;"	m	struct:tegra_kbd_priv	typeref:typename:unsigned int	file:
next_repeat_ms	include/input.h	/^	unsigned int next_repeat_ms;	\/* Next time we repeat a key *\/$/;"	m	struct:input_config	typeref:typename:unsigned int
next_request	drivers/usb/dwc3/gadget.h	/^static inline struct dwc3_request *next_request(struct list_head *list)$/;"	f	typeref:struct:dwc3_request *
next_request	drivers/usb/musb-new/musb_gadget.h	/^static inline struct musb_request *next_request(struct musb_ep *ep)$/;"	f	typeref:struct:musb_request *
next_rx	arch/mips/mach-au1x00/au1x00_eth.c	/^static int next_rx;$/;"	v	typeref:typename:int	file:
next_rx_desc	drivers/net/uli526x.c	/^	struct rx_desc *next_rx_desc;$/;"	m	struct:rx_desc	typeref:struct:rx_desc *	file:
next_rx_tail	drivers/net/macb.c	/^	unsigned int		next_rx_tail;$/;"	m	struct:macb_device	typeref:typename:unsigned int	file:
next_sqnum	fs/ubifs/io.c	/^static unsigned long long next_sqnum(struct ubifs_info *c)$/;"	f	typeref:typename:unsigned long long	file:
next_string_id	include/linux/usb/composite.h	/^	u8				next_string_id;$/;"	m	struct:usb_composite_dev	typeref:typename:u8
next_tx	arch/mips/mach-au1x00/au1x00_eth.c	/^static int next_tx;$/;"	v	typeref:typename:int	file:
next_tx_desc	drivers/net/uli526x.c	/^	struct tx_desc *next_tx_desc;$/;"	m	struct:tx_desc	typeref:struct:tx_desc *	file:
next_urb	drivers/serial/usbtty.c	/^static struct urb *next_urb (struct usb_device_instance *device,$/;"	f	typeref:struct:urb *	file:
next_urb	drivers/usb/musb-new/musb_host.h	/^static inline struct urb *next_urb(struct musb_qh *qh)$/;"	f	typeref:struct:urb *
nextdesc_p	drivers/net/armada100_fec.h	/^	struct tx_desc *nextdesc_p;	\/* Pointer to next descriptor *\/$/;"	m	struct:tx_desc	typeref:struct:tx_desc *
nextdoc	include/linux/mtd/doc2000.h	/^	struct mtd_info *nextdoc;$/;"	m	struct:DiskOnChip	typeref:struct:mtd_info *
nexti	arch/powerpc/cpu/mpc85xx/start.S	/^nexti:	mflr	r1		\/* R1 = our PC *\/$/;"	l
nextoffset	include/libfdt.h	/^	int nextoffset;			\/* Next node offset to check *\/$/;"	m	struct:fdt_region_ptrs	typeref:typename:int
nextpid	drivers/usb/host/isp116x.h	/^	u8 nextpid;$/;"	m	struct:isp116x_ep	typeref:typename:u8
nf	drivers/clk/rockchip/clk_rk3288.c	/^	u32 nf;$/;"	m	struct:pll_div	typeref:typename:u32	file:
nf2cyc	drivers/i2c/sh_sh7734_i2c.c	/^	u8 nf2cyc;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
nf2cyc	drivers/i2c/sh_sh7734_i2c.c	/^static u8 iccr1_cks, nf2cyc;$/;"	v	typeref:typename:u8	file:
nf_reg	drivers/mtd/nand/kirkwood_nand.c	/^static struct kwnandf_registers *nf_reg =$/;"	v	typeref:struct:kwnandf_registers *	file:
nf_wrprst	drivers/mtd/nand/mxc_nand.h	/^	u16 nf_wrprst;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
nfaddr	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfaddr;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfc	arch/arm/dts/sun4i-a10.dtsi	/^		nfc: nand@01c03000 {$/;"	l
nfc	arch/arm/dts/sun7i-a20.dtsi	/^		nfc: nand@01c03000 {$/;"	l
nfc	drivers/mtd/nand/mxc_nand_spl.c	/^static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR;$/;"	v	typeref:struct:mxc_nand_regs * const	file:
nfc	drivers/mtd/nand/mxc_nand_spl.c	/^static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;$/;"	v	typeref:struct:mxc_nand_regs * const	file:
nfc_clear	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)$/;"	f	typeref:typename:void	file:
nfc_config	drivers/mtd/nand/sunxi_nand_spl.c	/^struct nfc_config {$/;"	s	file:
nfc_data	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_nfc_data	*nfc_data;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_nfc_data *
nfc_ip	drivers/mtd/nand/mxc_nand_spl.c	/^static struct mxc_nand_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;$/;"	v	typeref:struct:mxc_nand_ip_regs * const	file:
nfc_nand_address	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_nand_address(unsigned short address)$/;"	f	typeref:typename:void	file:
nfc_nand_check_ecc	drivers/mtd/nand/mxc_nand_spl.c	/^static int nfc_nand_check_ecc(void)$/;"	f	typeref:typename:int	file:
nfc_nand_command	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_nand_command(unsigned short command)$/;"	f	typeref:typename:void	file:
nfc_nand_data_output	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_nand_data_output(void)$/;"	f	typeref:typename:void	file:
nfc_nand_init	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_nand_init(void)$/;"	f	typeref:typename:void	file:
nfc_nand_page_address	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_nand_page_address(unsigned int page_address)$/;"	f	typeref:typename:void	file:
nfc_nand_read_page	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_nand_read_page(unsigned int page_address)$/;"	f	typeref:typename:void	file:
nfc_pads	board/aristainetos/aristainetos.c	/^iomux_v3_cfg_t nfc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]
nfc_pads	board/barco/platinum/platinum.c	/^iomux_v3_cfg_t nfc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]
nfc_pads	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t nfc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]
nfc_pads	board/gateworks/gw_ventana/gw_ventana.c	/^static iomux_v3_cfg_t const nfc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
nfc_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const nfc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
nfc_read	drivers/mtd/nand/mpc5121_nfc.c	/^static inline u16 nfc_read(struct mtd_info *mtd, uint reg)$/;"	f	typeref:typename:u16	file:
nfc_read_page	drivers/mtd/nand/mxc_nand_spl.c	/^static int nfc_read_page(unsigned int page_address, unsigned char *buf)$/;"	f	typeref:typename:int	file:
nfc_set	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)$/;"	f	typeref:typename:void	file:
nfc_wait_ready	drivers/mtd/nand/mxc_nand_spl.c	/^static void nfc_wait_ready(void)$/;"	f	typeref:typename:void	file:
nfc_write	drivers/mtd/nand/mpc5121_nfc.c	/^static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)$/;"	f	typeref:typename:void	file:
nfcbar	arch/powerpc/include/asm/immap_512x.h	/^	u32 nfcbar;		\/* NFC Base Address *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
nfccrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 nfccrc;		\/* 0x060 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
nfcmd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfcmd;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfconf	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfconf;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfcont	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfcont;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfdata	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfdata;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfeblk	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfeblk;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfecc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfecc;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfeccd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfeccd;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfeccd0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfeccd0;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfeccd1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfeccd1;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfi_fifo	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int nfi_fifo[4];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[4]
nfiqoutr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 nfiqoutr;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
nfmecc0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfmecc0;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfmecc1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfmecc1;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nframes	arch/arm/include/asm/arch-tegra/ivc.h	/^	uint32_t nframes;$/;"	m	struct:tegra_ivc	typeref:typename:uint32_t
nfs3_get_attributes_offset	net/nfs.c	/^static int nfs3_get_attributes_offset(uint32_t *data)$/;"	f	typeref:typename:int	file:
nfs_download_state	net/nfs.c	/^static enum net_loop_state nfs_download_state;$/;"	v	typeref:enum:net_loop_state	file:
nfs_filename	net/nfs.c	/^static char *nfs_filename;$/;"	v	typeref:typename:char *	file:
nfs_handler	net/nfs.c	/^static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
nfs_len	net/nfs.c	/^static int nfs_len;$/;"	v	typeref:typename:int	file:
nfs_lookup_reply	net/nfs.c	/^static int nfs_lookup_reply(uchar *pkt, unsigned len)$/;"	f	typeref:typename:int	file:
nfs_lookup_req	net/nfs.c	/^static void nfs_lookup_req(char *fname)$/;"	f	typeref:typename:void	file:
nfs_mount_reply	net/nfs.c	/^static int nfs_mount_reply(uchar *pkt, unsigned len)$/;"	f	typeref:typename:int	file:
nfs_mount_req	net/nfs.c	/^static void nfs_mount_req(char *path)$/;"	f	typeref:typename:void	file:
nfs_offset	net/nfs.c	/^static int nfs_offset = -1;$/;"	v	typeref:typename:int	file:
nfs_our_port	net/nfs.c	/^static int nfs_our_port;$/;"	v	typeref:typename:int	file:
nfs_path	net/nfs.c	/^static char *nfs_path;$/;"	v	typeref:typename:char *	file:
nfs_path_buff	net/nfs.c	/^static char nfs_path_buff[2048];$/;"	v	typeref:typename:char[2048]	file:
nfs_read_reply	net/nfs.c	/^static int nfs_read_reply(uchar *pkt, unsigned len)$/;"	f	typeref:typename:int	file:
nfs_read_req	net/nfs.c	/^static void nfs_read_req(int offset, int readlen)$/;"	f	typeref:typename:void	file:
nfs_readlink_reply	net/nfs.c	/^static int nfs_readlink_reply(uchar *pkt, unsigned len)$/;"	f	typeref:typename:int	file:
nfs_readlink_req	net/nfs.c	/^static void nfs_readlink_req(void)$/;"	f	typeref:typename:void	file:
nfs_send	net/nfs.c	/^static void nfs_send(void)$/;"	f	typeref:typename:void	file:
nfs_server_ip	net/nfs.c	/^static struct in_addr nfs_server_ip;$/;"	v	typeref:struct:in_addr	file:
nfs_server_mount_port	net/nfs.c	/^static int nfs_server_mount_port;$/;"	v	typeref:typename:int	file:
nfs_server_port	net/nfs.c	/^static int nfs_server_port;$/;"	v	typeref:typename:int	file:
nfs_start	net/nfs.c	/^void nfs_start(void)$/;"	f	typeref:typename:void
nfs_state	net/nfs.c	/^static int nfs_state;$/;"	v	typeref:typename:int	file:
nfs_timeout	net/nfs.c	/^static ulong nfs_timeout = NFS_TIMEOUT;$/;"	v	typeref:typename:ulong	file:
nfs_timeout_count	net/nfs.c	/^static int nfs_timeout_count;$/;"	v	typeref:typename:int	file:
nfs_timeout_handler	net/nfs.c	/^static void nfs_timeout_handler(void)$/;"	f	typeref:typename:void	file:
nfs_umountall_reply	net/nfs.c	/^static int nfs_umountall_reply(uchar *pkt, unsigned len)$/;"	f	typeref:typename:int	file:
nfs_umountall_req	net/nfs.c	/^static void nfs_umountall_req(void)$/;"	f	typeref:typename:void	file:
nfsblk	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfsblk;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfsecc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfsecc;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfstat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfstat;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfstat0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfstat0;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
nfstat1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	nfstat1;$/;"	m	struct:s3c24x0_nand	typeref:typename:u32
ngamma_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 ngamma_params_sn04[]		= {$/;"	v	typeref:typename:u16[]	file:
ngamma_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 ngamma_params_sn20[] = {$/;"	v	typeref:typename:u16[]	file:
ngcc_fpga_clk_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_clk_fn(int assert_clk, int flush, int cookie)$/;"	f	typeref:typename:int
ngcc_fpga_done_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_done_fn(int cookie)$/;"	f	typeref:typename:int
ngcc_fpga_fns	board/esd/pmc440/fpga.c	/^xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = {$/;"	v	typeref:typename:xilinx_spartan2_slave_serial_fns
ngcc_fpga_init_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_init_fn(int cookie)$/;"	f	typeref:typename:int
ngcc_fpga_pgm_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_pgm_fn(int assert, int flush, int cookie)$/;"	f	typeref:typename:int
ngcc_fpga_post_config_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_post_config_fn(int cookie)$/;"	f	typeref:typename:int
ngcc_fpga_pre_config_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_pre_config_fn(int cookie)$/;"	f	typeref:typename:int
ngcc_fpga_reset	board/esd/pmc440/fpga.c	/^void ngcc_fpga_reset(int assert)$/;"	f	typeref:typename:void
ngcc_fpga_serialslave_init	board/esd/pmc440/fpga.c	/^void ngcc_fpga_serialslave_init(void)$/;"	f	typeref:typename:void
ngcc_fpga_wr_fn	board/esd/pmc440/fpga.c	/^int ngcc_fpga_wr_fn(int assert_write, int flush, int cookie)$/;"	f	typeref:typename:int
ngpio	drivers/gpio/pca953x.c	/^	uint8_t ngpio;$/;"	m	struct:pca953x_chip_ngpio	typeref:typename:uint8_t	file:
ngpio	drivers/gpio/zynq_gpio.c	/^	u16 ngpio;$/;"	m	struct:zynq_platform_data	typeref:typename:u16	file:
ngpios	arch/powerpc/include/asm/arch-mpc85xx/gpio.h	/^	uint ngpios;$/;"	m	struct:mpc85xx_gpio_plat	typeref:typename:uint
ngpixis	board/freescale/common/ngpixis.h	/^typedef struct ngpixis {$/;"	s
ngpixis_t	board/freescale/common/ngpixis.h	/^} __attribute__ ((packed)) ngpixis_t;$/;"	t	typeref:struct:ngpixis
nhash	fs/jffs2/jffs2_nand_private.h	/^	unsigned int nhash;$/;"	m	struct:b_dirent	typeref:typename:unsigned int
nhead_lnum	fs/ubifs/ubifs-media.h	/^	__le32 nhead_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
nhead_lnum	fs/ubifs/ubifs.h	/^	int nhead_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
nhead_offs	fs/ubifs/ubifs-media.h	/^	__le32 nhead_offs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
nhead_offs	fs/ubifs/ubifs.h	/^	int nhead_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
nibble	drivers/usb/gadget/ether.c	/^static u8 nibble(unsigned char c)$/;"	f	typeref:typename:u8	file:
nibble_swapping_16_bit	drivers/net/armada100_fec.c	/^static inline u32 nibble_swapping_16_bit(u32 x)$/;"	f	typeref:typename:u32	file:
nibble_swapping_32_bit	drivers/net/armada100_fec.c	/^static inline u32 nibble_swapping_32_bit(u32 x)$/;"	f	typeref:typename:u32	file:
nic	drivers/net/e1000.h	/^	struct eth_device *nic;$/;"	m	struct:e1000_hw	typeref:struct:eth_device *
nic	drivers/net/ne2000_base.c	/^static dp83902a_priv_data_t nic; \/* just one instance of the card supported *\/$/;"	v	typeref:typename:dp83902a_priv_data_t	file:
nic301_registers	arch/arm/mach-socfpga/include/mach/nic301.h	/^struct nic301_registers {$/;"	s
nic301_regs	arch/arm/mach-socfpga/misc.c	/^static struct nic301_registers *nic301_regs =$/;"	v	typeref:struct:nic301_registers *	file:
nic301_regs	arch/arm/mach-socfpga/spl.c	/^static struct nic301_registers *nic301_regs =$/;"	v	typeref:struct:nic301_registers *	file:
nice_length	lib/zlib/deflate.c	/^   ush nice_length; \/* quit search above this match length *\/$/;"	m	struct:config_s	typeref:typename:ush	file:
nice_match	lib/zlib/deflate.h	/^    int nice_match; \/* Stop searching when current match exceeds this *\/$/;"	m	struct:internal_state	typeref:typename:int
ninf	post/lib_powerpc/fpu/compare-fp-1.c	/^static float ninf;$/;"	v	typeref:typename:float	file:
nint	arch/mips/mach-ath79/ar934x/clk.c	/^	u8	nint[2];$/;"	m	struct:ar934x_pll_config	typeref:typename:u8[2]	file:
nios2_callr	arch/nios2/include/asm/system.h	/^#define nios2_callr(/;"	d
nip	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG nip;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
nirqoutr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 nirqoutr;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
nl	scripts/kconfig/zconf.y	/^nl:$/;"	l
nlen	fs/ubifs/ubifs-media.h	/^	__le16 nlen;$/;"	m	struct:ubifs_dent_node	typeref:typename:__le16
nlen	lib/zlib/inflate.h	/^    unsigned nlen;              \/* number of length code lengths *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
nlink	fs/ubifs/debug.c	/^	unsigned int nlink;$/;"	m	struct:fsck_inode	typeref:typename:unsigned int	file:
nlink	fs/ubifs/ubifs-media.h	/^	__le32 nlink;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
nlink_t	include/linux/types.h	/^typedef __kernel_nlink_t	nlink_t;$/;"	t	typeref:typename:__kernel_nlink_t
nlinks	include/ext_common.h	/^	__le16 nlinks;$/;"	m	struct:ext2_inode	typeref:typename:__le16
nlndar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	nlndar;		\/* DMA next link descriptor address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
nlsdar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	nlsdar;		\/* DMA next list descriptor address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
nluns	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		nluns;$/;"	m	struct:fsg_common	typeref:typename:unsigned int	file:
nluns	drivers/usb/gadget/f_mass_storage.c	/^	unsigned nluns;$/;"	m	struct:fsg_config	typeref:typename:unsigned	file:
nm	fs/ubifs/replay.c	/^		struct qstr nm;$/;"	m	union:replay_entry::__anonf2442133010a	typeref:struct:qstr	file:
nmarc	include/commproc.h	/^	ushort	nmarc;		\/* nonmatching address rx cnt *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
nmi_intc	arch/arm/dts/sun6i-a31.dtsi	/^		nmi_intc: interrupt-controller@01f00c0c {$/;"	l
nmi_intc	arch/arm/dts/sun7i-a20.dtsi	/^		nmi_intc: interrupt-controller@01c00030 {$/;"	l
nmi_intc	arch/arm/dts/sun8i-a23-a33.dtsi	/^		nmi_intc: interrupt-controller@01f00c0c {$/;"	l
nmi_intc	arch/arm/dts/sun9i-a80.dtsi	/^		nmi_intc: interrupt-controller@080015a0 {$/;"	l
nmode	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int nmode;$/;"	m	struct:pei_data	typeref:typename:int
nmsgs	include/i2c.h	/^	uint nmsgs;$/;"	m	struct:i2c_msg_list	typeref:typename:uint
nnmi	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int nnmi;$/;"	m	struct:pad_signals	typeref:typename:int
nnmi	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int nnmi;$/;"	m	struct:pad_signals	typeref:typename:int
nnode	fs/ubifs/lpt.c	/^		struct ubifs_nnode *nnode;$/;"	m	union:lpt_scan_node::__anonbef95ef6020a	typeref:struct:ubifs_nnode *	file:
nnode	fs/ubifs/lpt.c	/^		struct ubifs_nnode nnode;$/;"	m	union:lpt_scan_node::__anonbef95ef6010a	typeref:struct:ubifs_nnode	file:
nnode	fs/ubifs/ubifs.h	/^		struct ubifs_nnode *nnode;$/;"	m	union:ubifs_nbranch::__anonf648d0840e0a	typeref:struct:ubifs_nnode *
nnode_cnt	fs/ubifs/ubifs.h	/^	int nnode_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
nnode_lookup	fs/ubifs/lpt_commit.c	/^static struct ubifs_nnode *nnode_lookup(struct ubifs_info *c, int i)$/;"	f	typeref:struct:ubifs_nnode *	file:
nnode_sz	fs/ubifs/ubifs.h	/^	int nnode_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
no	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
no	drivers/clk/rockchip/clk_rk3288.c	/^	u32 no;$/;"	m	struct:pll_div	typeref:typename:u32	file:
no	scripts/kconfig/expr.h	/^	no, mod, yes$/;"	e	enum:tristate
no-dot-config-targets	Makefile	/^no-dot-config-targets := clean clobber mrproper distclean \\$/;"	m
noCacheJump	board/dbau1x00/lowlevel_init.S	/^noCacheJump:$/;"	l
noColIdx	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
noDict	lib/lz4.c	/^typedef enum { noDict = 0, withPrefix64k, usingExtDict } dict_directive;$/;"	e	enum:__anoneaf05ef60103	file:
no_banks	drivers/gpio/sunxi_gpio.c	/^	int no_banks;$/;"	m	struct:sunxi_gpio_soc_data	typeref:typename:int	file:
no_blk_pergdt	include/ext4fs.h	/^	uint32_t no_blk_pergdt;$/;"	m	struct:ext_filesystem	typeref:typename:uint32_t
no_blkgrp	include/ext4fs.h	/^	uint32_t no_blkgrp;$/;"	m	struct:ext_filesystem	typeref:typename:uint32_t
no_block_io_protocol	include/part_efi.h	/^		u64 no_block_io_protocol:1;$/;"	m	struct:_gpt_entry_attributes::__anon7effa4980208	typeref:typename:u64:1
no_carry_byte_side_eff	drivers/bios_emulator/x86emu/prim_ops.c	/^static void no_carry_byte_side_eff(u8 res)$/;"	f	typeref:typename:void	file:
no_carry_long_side_eff	drivers/bios_emulator/x86emu/prim_ops.c	/^static void no_carry_long_side_eff(u32 res)$/;"	f	typeref:typename:void	file:
no_carry_word_side_eff	drivers/bios_emulator/x86emu/prim_ops.c	/^static void no_carry_word_side_eff(u16 res)$/;"	f	typeref:typename:void	file:
no_child	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT no_child(int node)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_child	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT no_child(int node)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_child	arch/sparc/include/asm/prom.h	/^	int (*no_child) (int node);$/;"	m	struct:linux_nodeops	typeref:typename:int (*)(int node)
no_chk_data_crc	fs/ubifs/ubifs.h	/^	unsigned int no_chk_data_crc:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
no_colors_theme	scripts/kconfig/nconf.gui.c	/^static void no_colors_theme(void)$/;"	f	typeref:typename:void	file:
no_div	drivers/i2c/kona_i2c.c	/^	uint8_t no_div;		\/* Disable clock divider *\/$/;"	m	struct:bus_speed_cfg	typeref:typename:uint8_t	file:
no_getprop	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT no_getprop(int node, char *name, char *value)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_getprop	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT no_getprop(int node, char *name, char *value)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_getprop	arch/sparc/include/asm/prom.h	/^	int (*no_getprop) (int node, char *name, char *val);$/;"	m	struct:linux_nodeops	typeref:typename:int (*)(int node,char * name,char * val)
no_interrupt	include/linux/usb/gadget.h	/^	unsigned		no_interrupt:1;$/;"	m	struct:usb_request	typeref:typename:unsigned:1
no_more_nodes	fs/ubifs/recovery.c	/^static int no_more_nodes(const struct ubifs_info *c, void *buf, int len,$/;"	f	typeref:typename:int	file:
no_nextnode	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT no_nextnode(int node)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_nextnode	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT no_nextnode(int node)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_nextnode	arch/sparc/include/asm/prom.h	/^	int (*no_nextnode) (int node);$/;"	m	struct:linux_nodeops	typeref:typename:int (*)(int node)
no_nextprop	arch/sparc/cpu/leon2/prom.c	/^static char PROM_TEXT *no_nextprop(int node, char *name)$/;"	f	typeref:typename:char PROM_TEXT *	file:
no_nextprop	arch/sparc/cpu/leon3/prom.c	/^static char PROM_TEXT *no_nextprop(int node, char *name)$/;"	f	typeref:typename:char PROM_TEXT *	file:
no_nextprop	arch/sparc/include/asm/prom.h	/^	char *(*no_nextprop) (int node, char *name);$/;"	m	struct:linux_nodeops	typeref:typename:char * (*)(int node,char * name)
no_of_ep	include/usb.h	/^	__u8	no_of_ep;$/;"	m	struct:usb_interface	typeref:typename:__u8
no_of_if	include/usb.h	/^	__u8	no_of_if;	\/* number of interfaces *\/$/;"	m	struct:usb_config	typeref:typename:__u8
no_orphs	fs/ubifs/ubifs.h	/^	int no_orphs;$/;"	m	struct:ubifs_info	typeref:typename:int
no_proplen	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT no_proplen(int node, char *name)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_proplen	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT no_proplen(int node, char *name)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_proplen	arch/sparc/include/asm/prom.h	/^	int (*no_proplen) (int node, char *name);$/;"	m	struct:linux_nodeops	typeref:typename:int (*)(int node,char * name)
no_response	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 no_response:1;$/;"	m	struct:icc_clock_enables_msg	typeref:typename:u32:1
no_setprop	arch/sparc/cpu/leon2/prom.c	/^static int PROM_TEXT no_setprop(int node, char *name, char *value, int len)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_setprop	arch/sparc/cpu/leon3/prom.c	/^static int PROM_TEXT no_setprop(int node, char *name, char *value, int len)$/;"	f	typeref:typename:int PROM_TEXT	file:
no_setprop	arch/sparc/include/asm/prom.h	/^	int (*no_setprop) (int node, char *name, char *val, int len);$/;"	m	struct:linux_nodeops	typeref:typename:int (*)(int node,char * name,char * val,int len)
no_tags_ecc	fs/yaffs2/yaffs_guts.h	/^	int no_tags_ecc;	\/* Flag to decide whether or not to do ECC$/;"	m	struct:yaffs_param	typeref:typename:int
no_timer	fs/ubifs/ubifs.h	/^	unsigned int no_timer:1;$/;"	m	struct:ubifs_wbuf	typeref:typename:unsigned int:1
noaction	scripts/docproc.c	/^static void noaction(char * line)		   { line = line; }$/;"	f	typeref:typename:void	file:
noaction2	scripts/docproc.c	/^static void noaction2(char * file, char * line)   { file = file; line = line; }$/;"	f	typeref:typename:void	file:
noat	arch/mips/lib/cache_init.S	/^	.set	noat$/;"	d
noat	arch/nios2/cpu/exceptions.S	/^	.set noat$/;"	d
noat	board/imgtec/boston/lowlevel_init.S	/^	.set	noat$/;"	d
nob	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	nob;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
nob	drivers/mmc/mxcmmc.c	/^	u32 nob;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
nobreak	arch/nios2/cpu/exceptions.S	/^	.set nobreak$/;"	d
noc	arch/arm/dts/rk3288.dtsi	/^	noc: syscon@ffac0000 {$/;"	l
noc_activate	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 noc_activate;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
noc_timing	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 noc_timing;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
noc_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	rk3036_noc_timing noc_timing;$/;"	m	struct:rk3036_ddr_timing	typeref:typename:rk3036_noc_timing
noc_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 noc_timing;$/;"	m	union:__anonade115c6010a	typeref:typename:u32
node	arch/arm/include/asm/imx-common/dma.h	/^	struct list_head	node;$/;"	m	struct:mxs_dma_desc	typeref:struct:list_head
node	arch/arm/include/asm/setup.h	/^		int           node;$/;"	m	struct:meminfo::__anon61e8c52b0608	typeref:typename:int
node	arch/nds32/include/asm/setup.h	/^		int           node;$/;"	m	struct:meminfo::__anon553264350208	typeref:typename:int
node	arch/sparc/cpu/leon2/prom.c	/^struct node {$/;"	s	file:
node	arch/sparc/cpu/leon3/prom.c	/^struct node {$/;"	s	file:
node	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	int node;$/;"	m	struct:pin_info	typeref:typename:int	file:
node	drivers/i2c/s3c24x0_i2c.h	/^	int node;	\/* device tree node *\/$/;"	m	struct:s3c24x0_i2c_bus	typeref:typename:int
node	drivers/mtd/nand/sunxi_nand.c	/^	struct list_head node;$/;"	m	struct:sunxi_nand_chip	typeref:struct:list_head	file:
node	fs/ubifs/orphan.c	/^	struct ubifs_ino_node *node;$/;"	m	struct:check_info	typeref:struct:ubifs_ino_node *	file:
node	fs/ubifs/ubifs.h	/^	void *node;$/;"	m	struct:ubifs_scan_node	typeref:typename:void *
node	include/dt-structs.h	/^	const void *node;$/;"	m	struct:phandle_2_cell	typeref:typename:const void *
node	include/fdtdec.h	/^	int node;$/;"	m	struct:fdtdec_phandle_args	typeref:typename:int
node	include/linux/fb.h	/^	int node;$/;"	m	struct:fb_info	typeref:typename:int
node	include/power/act8846_pmic.h	/^	int node;	\/*device tree node*\/$/;"	m	struct:pmic_act8846	typeref:typename:int
node	include/uuid.h	/^	unsigned char node[6];$/;"	m	struct:uuid	typeref:typename:unsigned char[6]
node	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_item node;$/;"	m	struct:dialog_list	typeref:struct:dialog_item
node_crc	include/jffs2/jffs2.h	/^	__u32 node_crc; 	\/* node crc *\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
node_crc	include/jffs2/jffs2.h	/^	__u32 node_crc;   \/* CRC for the raw inode (excluding data)  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
node_crc	include/jffs2/jffs2.h	/^	__u32 node_crc;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
node_info	include/mtd_node.h	/^struct node_info {$/;"	s
node_offset	include/image.h	/^	int node_offset;		\/* Offset of signature node *\/$/;"	m	struct:image_sign_info	typeref:typename:int
node_type	fs/ubifs/ubifs-media.h	/^	__u8 node_type;$/;"	m	struct:ubifs_ch	typeref:typename:__u8
nodeops	arch/sparc/cpu/leon2/prom.c	/^	struct linux_nodeops nodeops;$/;"	m	struct:leon_prom_info	typeref:struct:linux_nodeops	file:
nodeops	arch/sparc/cpu/leon3/prom.c	/^	struct linux_nodeops nodeops;$/;"	m	struct:leon_prom_info	typeref:struct:linux_nodeops	file:
nodes	arch/sparc/cpu/leon2/prom.c	/^	struct node nodes[35];$/;"	m	struct:leon_prom_info	typeref:struct:node[35]	file:
nodes	arch/sparc/cpu/leon2/prom.c	/^#define nodes /;"	d	file:
nodes	arch/sparc/cpu/leon3/prom.c	/^	struct node nodes[35];$/;"	m	struct:leon_prom_info	typeref:struct:node[35]	file:
nodes	arch/sparc/cpu/leon3/prom.c	/^#define nodes /;"	d	file:
nodes	board/compulab/cm_fx6/cm_fx6.c	/^struct node_info nodes[] = {$/;"	v	typeref:struct:node_info[]
nodes	board/freescale/bsc9131rdb/bsc9131rdb.c	/^struct node_info nodes[] = {$/;"	v	typeref:struct:node_info[]
nodes	board/freescale/bsc9132qds/bsc9132qds.c	/^struct node_info nodes[] = {$/;"	v	typeref:struct:node_info[]
nodes	board/pdm360ng/pdm360ng.c	/^struct node_info nodes[] = {$/;"	v	typeref:struct:node_info[]
nodes	drivers/video/stb_truetype.h	/^   void  *nodes;$/;"	m	struct:stbtt_pack_context	typeref:typename:void *
nodes	fs/jffs2/jffs2_1pass.c	/^	struct b_node nodes[NODE_CHUNK];$/;"	m	struct:mem_block	typeref:struct:b_node[]	file:
nodes	fs/jffs2/jffs2_nand_1pass.c	/^	char nodes[0];$/;"	m	struct:mem_block	typeref:typename:char[0]	file:
nodes	fs/ubifs/ubifs.h	/^	struct list_head nodes;$/;"	m	struct:ubifs_scan_leb	typeref:struct:list_head
nodes_cnt	fs/ubifs/ubifs.h	/^	int nodes_cnt;$/;"	m	struct:ubifs_scan_leb	typeref:typename:int
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* == JFFS2_NODETYPE_XATR *\/$/;"	m	struct:jffs2_sum_xattr_flash	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* == JFFS2_NODETYPE_XREF *\/$/;"	m	struct:jffs2_sum_xref_flash	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* == JFFS_NODETYPE_DIRENT *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* == JFFS_NODETYPE_DIRENT *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* node type *\/$/;"	m	struct:jffs2_sum_inode_flash	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* node type *\/$/;"	m	struct:jffs2_sum_inode_mem	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* node type *\/$/;"	m	struct:jffs2_sum_unknown_flash	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;	\/* node type *\/$/;"	m	struct:jffs2_sum_unknown_mem	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;$/;"	m	struct:jffs2_sum_xattr_mem	typeref:typename:__u16
nodetype	fs/jffs2/summary.h	/^	__u16 nodetype;$/;"	m	struct:jffs2_sum_xref_mem	typeref:typename:__u16
nodetype	include/jffs2/jffs2.h	/^	__u16 nodetype;	\/* == JFFS_NODETYPE_DIRENT *\/$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u16
nodetype	include/jffs2/jffs2.h	/^	__u16 nodetype; 	\/* = JFFS2_NODETYPE_SUMMARY *\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u16
nodetype	include/jffs2/jffs2.h	/^	__u16 nodetype;   \/* == JFFS_NODETYPE_INODE *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u16
nodetype	include/jffs2/jffs2.h	/^	__u16 nodetype;$/;"	m	struct:jffs2_unknown_node	typeref:typename:__u16
nofua	drivers/usb/gadget/f_mass_storage.c	/^		char nofua;$/;"	m	struct:fsg_config::fsg_lun_config	typeref:typename:char	file:
nofua	drivers/usb/gadget/storage_common.c	/^	unsigned int	nofua:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
noheader	tools/env/fw_env_main.c	/^static int noheader;$/;"	v	typeref:typename:int	file:
nohelp_text	scripts/kconfig/menu.c	/^static const char nohelp_text[] = "There is no help available for this option.";$/;"	v	typeref:typename:const char[]	file:
noinline	include/linux/compiler-gcc.h	/^#define  noinline	/;"	d
noinline	include/linux/compiler.h	/^#define noinline$/;"	d
noinline	lib/vsprintf.c	/^#define noinline /;"	d	file:
noinline_for_stack	include/linux/compiler.h	/^#define noinline_for_stack /;"	d
noise	drivers/i2c/i2c-uniphier-f.c	/^	u32 noise;			\/* noise filter control *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
noise	drivers/i2c/i2c-uniphier.c	/^	u32 noise;			\/* noise filter control *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
nokprobe_inline	include/linux/compiler.h	/^# define nokprobe_inline	/;"	d
nolo_version_ptr	board/nokia/rx51/rx51.c	/^static char *nolo_version_ptr;$/;"	v	typeref:typename:char *	file:
nominal_adll	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u32 nominal_adll[MAX_INTERFACE_NUM * MAX_BUS_NUM];$/;"	v	typeref:typename:u32[]
non_removable	drivers/mmc/fsl_esdhc.c	/^	int non_removable;$/;"	m	struct:fsl_esdhc_priv	typeref:typename:int	file:
noncached_alloc	arch/arm/lib/cache.c	/^phys_addr_t noncached_alloc(size_t size, size_t align)$/;"	f	typeref:typename:phys_addr_t
noncached_end	arch/arm/lib/cache.c	/^static unsigned long noncached_end;$/;"	v	typeref:typename:unsigned long	file:
noncached_init	arch/arm/lib/cache.c	/^void noncached_init(void)$/;"	f	typeref:typename:void
noncached_next	arch/arm/lib/cache.c	/^static unsigned long noncached_next;$/;"	v	typeref:typename:unsigned long	file:
noncached_start	arch/arm/lib/cache.c	/^static unsigned long noncached_start;$/;"	v	typeref:typename:unsigned long	file:
nonce	drivers/mmc/rpmb.c	/^	unsigned char nonce[RPMB_SZ_NONCE];$/;"	m	struct:s_rpmb	typeref:typename:unsigned char[]	file:
nonce	include/linux/usb/ch9.h	/^	__u8 nonce[16];$/;"	m	struct:usb_handshake	typeref:typename:__u8[16]
nonce_data	include/ec_commands.h	/^	uint8_t nonce_data[64];  \/* Nonce data; ignored if nonce_size=0 *\/$/;"	m	struct:ec_params_vboot_hash	typeref:typename:uint8_t[64]
nonce_even	lib/tpm.c	/^	uint8_t		nonce_even[DIGEST_LENGTH];$/;"	m	struct:session_data	typeref:typename:uint8_t[]	file:
nonce_odd	lib/tpm.c	/^	uint8_t		nonce_odd[DIGEST_LENGTH];$/;"	m	struct:session_data	typeref:typename:uint8_t[]	file:
nonce_size	include/ec_commands.h	/^	uint8_t nonce_size;      \/* Nonce size; may be 0 *\/$/;"	m	struct:ec_params_vboot_hash	typeref:typename:uint8_t
nondata_nodes_cmp	fs/ubifs/gc.c	/^static int nondata_nodes_cmp(void *priv, struct list_head *a,$/;"	f	typeref:typename:int	file:
none	drivers/net/enc28j60.c	/^enum enc_initstate {none=0, setupdone, linkready};$/;"	e	enum:enc_initstate	file:
none_compr	fs/ubifs/ubifs.c	/^static struct ubifs_compressor none_compr = {$/;"	v	typeref:struct:ubifs_compressor	file:
nonfinite	post/lib_powerpc/fpu/darwin-ldouble.c	/^#define nonfinite(/;"	d	file:
nonint	arch/x86/include/asm/speedstep.h	/^	uint8_t nonint:1; \/* add .5 to ratio *\/$/;"	m	struct:sst_state	typeref:typename:uint8_t:1
nonnull	common/cli_hush.c	/^	int nonnull;$/;"	m	struct:__anon62a9299d0508	typeref:typename:int	file:
nonstd	include/linux/fb.h	/^	__u32 nonstd;			\/* != 0 Non standard pixel format *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
nop	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 nop;		\/* 0xDC: EMC_NOP *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
nop	arch/arm/include/asm/system.h	/^#define nop(/;"	d
nop	arch/blackfin/include/asm/system.h	/^#define nop(/;"	d
nop	arch/microblaze/include/asm/system.h	/^#define nop(/;"	d
nop	arch/nds32/include/asm/system.h	/^#define nop(/;"	d
nop	tools/mxsimage.h	/^	} nop;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960508
nor_erase_prepare	drivers/mtd/ubi/io.c	/^static int nor_erase_prepare(struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
nor_erattr0	include/fsl_ifc.h	/^	u32 nor_erattr0;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
nor_erattr1	include/fsl_ifc.h	/^	u32 nor_erattr1;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
nor_erattr2	include/fsl_ifc.h	/^	u32 nor_erattr2;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
nor_evter_en	include/fsl_ifc.h	/^	u32 nor_evter_en;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
nor_evter_intr_en	include/fsl_ifc.h	/^	u32 nor_evter_intr_en;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
nor_evter_stat	include/fsl_ifc.h	/^	u32 nor_evter_stat;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
nor_flash	arch/arm/dts/k2e-evm.dts	/^	nor_flash: n25q128a11@0 {$/;"	l
nor_flash	arch/arm/dts/k2hk-evm.dts	/^	nor_flash: n25q128a11@0 {$/;"	l
nor_flash	arch/arm/dts/k2l-evm.dts	/^	nor_flash: n25q128a11@0 {$/;"	l
nor_flash	drivers/mtd/ubi/ubi.h	/^	unsigned int nor_flash:1;$/;"	m	struct:ubi_device	typeref:typename:unsigned int:1
norcr	include/fsl_ifc.h	/^	u32 norcr;$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32
noreorder	arch/mips/cpu/start.S	/^	.set	noreorder$/;"	d
noreorder	arch/mips/cpu/start.S	/^	.set noreorder$/;"	d
noreorder	arch/mips/mach-ath79/ar933x/lowlevel_init.S	/^    .set noreorder$/;"	d
noreorder	arch/mips/mach-ath79/qca953x/lowlevel_init.S	/^    .set noreorder$/;"	d
noreorder	board/dbau1x00/lowlevel_init.S	/^	.set noreorder$/;"	d
noreorder	board/imgtec/malta/lowlevel_init.S	/^	.set noreorder$/;"	d
noreorder	board/pb1x00/lowlevel_init.S	/^	.set noreorder$/;"	d
noreorder	board/qemu-mips/lowlevel_init.S	/^	.set noreorder$/;"	d
norintsigen	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	norintsigen;	\/* _INTERRUPT_SIGNAL_ENABLE_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
norintsts	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	norintsts;	\/* _INTERRUPT_STATUS_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
norintstsen	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	norintstsen;	\/* _INTERRUPT_STATUS_ENABLE_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
normalOpt	scripts/kconfig/qconf.h	/^	normalOpt = 0, allOpt, promptOpt$/;"	e	enum:optionMode
normal_boot	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^normal_boot:$/;"	l
normal_color_theme	scripts/kconfig/nconf.gui.c	/^static void normal_color_theme(void)$/;"	f	typeref:typename:void	file:
northbridge_dmi_init	arch/x86/cpu/ivybridge/northbridge.c	/^static void northbridge_dmi_init(struct udevice *dev, int rev)$/;"	f	typeref:typename:void	file:
northbridge_init	arch/x86/cpu/ivybridge/northbridge.c	/^static void northbridge_init(struct udevice *dev, int rev)$/;"	f	typeref:typename:void	file:
nortsrbytetime	drivers/qe/uec.h	/^	u16  nortsrbytetime;   \/* normalized value of byte time in tsr units *\/$/;"	m	struct:uec_scheduler	typeref:typename:u16
nospace	fs/ubifs/ubifs.h	/^	unsigned int nospace:1;$/;"	m	struct:ubifs_budg_info	typeref:typename:unsigned int:1
nospace_rp	fs/ubifs/ubifs.h	/^	unsigned int nospace_rp:1;$/;"	m	struct:ubifs_budg_info	typeref:typename:unsigned int:1
not	doc/README.x86	/^not turned on by default in the U-Boot source tree. Firstly, you need turn it$/;"	l
not128	board/armltd/integrator/lowlevel_init.S	/^not128:$/;"	l
not16	board/armltd/integrator/lowlevel_init.S	/^not16:$/;"	l
not32	board/armltd/integrator/lowlevel_init.S	/^not32:$/;"	l
not64	board/armltd/integrator/lowlevel_init.S	/^not64:$/;"	l
not_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 not_byte(u8 s)$/;"	f	typeref:typename:u8
not_compressed	lib/lz4_wrapper.c	/^			u32 not_compressed:1;$/;"	m	struct:lz4_block_header::__anonc9492e16050a::__anonc9492e160608	typeref:typename:u32:1	file:
not_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 not_long(u32 s)$/;"	f	typeref:typename:u32
not_used	arch/arm/lib/vectors.S	/^not_used:$/;"	l
not_used	arch/mips/mach-au1x00/au1x00_eth.c	/^	u32 not_used;$/;"	m	struct:__anon03662d5e0108	typeref:typename:u32	file:
not_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 not_word(u16 s)$/;"	f	typeref:typename:u16
notch_freq	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 notch_freq;			\/* 0x108 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
notch_freq	arch/arm/include/asm/arch/display.h	/^	u32 notch_freq;			\/* 0x108 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
notch_width	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 notch_width;		\/* 0x12c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
notch_width	arch/arm/include/asm/arch/display.h	/^	u32 notch_width;		\/* 0x12c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
notfoundtemplate	doc/DocBook/Makefile	/^notfoundtemplate = echo "*** You have to install docbook-utils or xmlto ***"; \\$/;"	m
nother	net/dns.h	/^	uint16_t	nother;		\/* Other PRs *\/$/;"	m	struct:header	typeref:typename:uint16_t
notice	tools/proftool.c	/^#define notice(/;"	d	file:
notification_endpoint	drivers/serial/usbtty.c	/^	struct usb_endpoint_descriptor notification_endpoint;$/;"	m	struct:acm_config_desc	typeref:struct:usb_endpoint_descriptor	file:
notifier_block	include/linux/compat.h	/^struct notifier_block {};$/;"	s
notifier_block	include/linux/mtd/ubi.h	/^struct notifier_block {$/;"	s
notifier_call	include/linux/mtd/ubi.h	/^	notifier_fn_t notifier_call;$/;"	m	struct:notifier_block	typeref:typename:notifier_fn_t
notifier_fn_t	include/linux/mtd/ubi.h	/^typedef	int (*notifier_fn_t)(void *nb,$/;"	t	typeref:typename:int (*)(void * nb,unsigned long action,void * data)
notify	arch/arm/include/asm/arch-tegra/ivc.h	/^	void (*notify)(struct tegra_ivc *);$/;"	m	struct:tegra_ivc	typeref:typename:void (*)(struct tegra_ivc *)
notify_context	lib/efi_loader/efi_boottime.c	/^	void *notify_context;$/;"	m	struct:__anonb3c3434b0108	typeref:typename:void *	file:
notify_tpl	lib/efi_loader/efi_boottime.c	/^	unsigned long notify_tpl;$/;"	m	struct:__anonb3c3434b0108	typeref:typename:unsigned long	file:
notrace	include/linux/compiler.h	/^#define notrace /;"	d
notused	include/grlib/irqmp.h	/^	volatile unsigned int notused[11];$/;"	m	struct:__anon9e5279760108	typeref:typename:volatile unsigned int[11]
nouse	arch/arm/imx-common/timer.c	/^	unsigned int nouse[6];$/;"	m	struct:mxc_gpt	typeref:typename:unsigned int[6]	file:
novena_ddr_info	board/kosagi/novena/novena_spl.c	/^static struct mx6_ddr_sysinfo novena_ddr_info = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
novena_ddr_ioregs	board/kosagi/novena/novena_spl.c	/^static struct mx6dq_iomux_ddr_regs novena_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs	file:
novena_eeprom_data	board/kosagi/novena/novena.c	/^struct novena_eeprom_data {$/;"	s	file:
novena_gpio_button_getc	board/kosagi/novena/novena.c	/^static int novena_gpio_button_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
novena_gpio_button_init	board/kosagi/novena/novena.c	/^static int novena_gpio_button_init(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
novena_gpio_button_read_keys	board/kosagi/novena/novena.c	/^static int novena_gpio_button_read_keys(struct input_config *input)$/;"	f	typeref:typename:int	file:
novena_gpio_button_tstc	board/kosagi/novena/novena.c	/^static int novena_gpio_button_tstc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
novena_grp_ioregs	board/kosagi/novena/novena_spl.c	/^static struct mx6dq_iomux_grp_regs novena_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs	file:
novena_mmdc_calib	board/kosagi/novena/novena_spl.c	/^static struct mx6_mmdc_calibration novena_mmdc_calib = {$/;"	v	typeref:struct:mx6_mmdc_calibration	file:
novena_spl_setup_iomux_audio	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_audio(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_buttons	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_buttons(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_enet	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_fpga	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_fpga(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_i2c	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_pcie	board/kosagi/novena/novena_spl.c	/^static inline void novena_spl_setup_iomux_pcie(void) {}$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_pcie	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_pcie(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_sdhc	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_sdhc(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_spi	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_spi(void) {}$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_spi	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_spi(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_uart	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_video	board/kosagi/novena/novena_spl.c	/^static inline void novena_spl_setup_iomux_video(void) {}$/;"	f	typeref:typename:void	file:
novena_spl_setup_iomux_video	board/kosagi/novena/novena_spl.c	/^static void novena_spl_setup_iomux_video(void)$/;"	f	typeref:typename:void	file:
np_tx_fifo_sz	include/usb/dwc2_udc.h	/^	unsigned int	np_tx_fifo_sz;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
npb	drivers/video/mx3fb.c	/^	u32	npb:6;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:6	file:
npb	drivers/video/mx3fb.c	/^	u32	npb:6;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:6	file:
npc	arch/sparc/include/asm/ptrace.h	/^	unsigned long npc;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
npcr	include/linux/immap_qe.h	/^	u32 npcr;$/;"	m	struct:rsp	typeref:typename:u32
npll_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 npll_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
nprobes	net/link_local.c	/^static unsigned nprobes;$/;"	v	typeref:typename:unsigned	file:
nptxr_ptr	drivers/net/ftgmac100.h	/^	unsigned int	nptxr_ptr;	\/* 0x90 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
nqueries	net/dns.h	/^	uint16_t	nqueries;	\/* Questions *\/$/;"	m	struct:header	typeref:typename:uint16_t
nr	cmd/ubi.c	/^	int nr;$/;"	m	struct:selected_dev	typeref:typename:int	file:
nr	drivers/clk/rockchip/clk_rk3288.c	/^	u32 nr;$/;"	m	struct:pll_div	typeref:typename:u32	file:
nr_active_links	drivers/block/sata_dwc.h	/^	int			nr_active_links;$/;"	m	struct:ata_port	typeref:typename:int
nr_banks	arch/arm/include/asm/setup.h	/^	int nr_banks;$/;"	m	struct:meminfo	typeref:typename:int
nr_banks	arch/nds32/include/asm/setup.h	/^	int nr_banks;$/;"	m	struct:meminfo	typeref:typename:int
nr_banks	arch/xtensa/include/asm/bootparam.h	/^	int nr_banks;$/;"	m	struct:sysmem_info	typeref:typename:int
nr_banks	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	u32 nr_banks;$/;"	m	struct:samsung_pin_ctrl	typeref:typename:u32
nr_banks	drivers/usb/gadget/atmel_usba_udc.h	/^	u8					nr_banks;$/;"	m	struct:usba_ep	typeref:typename:u8
nr_banks	include/linux/usb/atmel_usba_udc.h	/^	int nr_banks;$/;"	m	struct:usba_ep_data	typeref:typename:int
nr_cached_objects	fs/ubifs/ubifs.h	/^	long (*nr_cached_objects)(struct super_block *, int);$/;"	m	struct:super_operations	typeref:typename:long (*)(struct super_block *,int)
nr_chips	include/linux/mtd/nand.h	/^	int nr_chips;$/;"	m	struct:platform_nand_chip	typeref:typename:int
nr_dx	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^	unsigned int nr_dx;$/;"	m	struct:phy_param	typeref:typename:unsigned int	file:
nr_endpoints	drivers/usb/musb-new/musb_core.h	/^	u8 nr_endpoints;$/;"	m	struct:musb	typeref:typename:u8
nr_muxs	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int nr_muxs;$/;"	m	struct:uniphier_clk_mux_data	typeref:typename:unsigned int
nr_pages	arch/arm/include/asm/setup.h	/^	    unsigned long nr_pages;		\/*  4 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
nr_pages	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^	uint16_t	nr_pages;$/;"	m	struct:mmu_vm_range	typeref:typename:uint16_t
nr_pages	drivers/mtd/spi/sf_dataflash.c	/^	unsigned	nr_pages;$/;"	m	struct:flash_info	typeref:typename:unsigned	file:
nr_partitions	include/linux/mtd/nand.h	/^	int nr_partitions;$/;"	m	struct:platform_nand_chip	typeref:typename:int
nr_parts	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int				nr_parts[NUM_CHIP_SELECT];$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:unsigned int[]
nr_pins	arch/powerpc/include/asm/immap_512x.h	/^	int nr_pins;		\/* number of pins to set this way *\/$/;"	m	struct:iopin_t	typeref:typename:int
nr_pins	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	u8		nr_pins;$/;"	m	struct:samsung_pin_bank_data	typeref:typename:u8
nr_pins	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	u8 nr_pins;$/;"	m	struct:rockchip_pin_bank	typeref:typename:u8	file:
nr_pmp_links	drivers/block/sata_dwc.h	/^	int			nr_pmp_links;$/;"	m	struct:ata_port	typeref:typename:int
nr_scratch	drivers/usb/dwc3/core.h	/^	u32			nr_scratch;$/;"	m	struct:dwc3	typeref:typename:u32
nr_sectors	drivers/mtd/spi/sf_internal.h	/^	u32 nr_sectors;$/;"	m	struct:spi_flash_params	typeref:typename:u32
nr_sects	include/part_efi.h	/^	__le32 nr_sects;	\/* nr of sectors in partition *\/$/;"	m	struct:partition	typeref:typename:__le32
nr_tables	include/efi_api.h	/^	unsigned long nr_tables;$/;"	m	struct:efi_system_table	typeref:typename:unsigned long
nr_to_write	include/linux/compat.h	/^	long nr_to_write;		\/* Write this many pages, and decrement$/;"	m	struct:writeback_control	typeref:typename:long
nrcvd	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint clstime, nsent, ntxerr, nrcvd, nrxerr;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uint	file:
nregs	drivers/gpio/74x164_gpio.c	/^	u32 nregs;$/;"	m	struct:gen_74x164_priv	typeref:typename:u32	file:
nregs	include/kgdb.h	/^		int nregs;$/;"	m	struct:__anon584037260208	typeref:typename:int
nreset_gpio	board/nokia/rx51/tag_omap.h	/^	s16  nreset_gpio;$/;"	m	struct:omap_lcd_config	typeref:typename:s16
nresetin_out	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int nresetin_out;$/;"	m	struct:pad_signals	typeref:typename:int
nresetin_out	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int nresetin_out;$/;"	m	struct:pad_signals	typeref:typename:int
nroot	fs/ubifs/ubifs.h	/^	struct ubifs_nnode *nroot;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_nnode *
nrow_addr	include/ddr_spd.h	/^	unsigned char nrow_addr;   \/*  3 # of Row Addresses on this assembly *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
nrow_addr	include/ddr_spd.h	/^	unsigned char nrow_addr;   \/*  3 # of Row Addresses on this assembly *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
nrow_addr	include/spd.h	/^	unsigned char nrow_addr;   \/*  3 # of Row Addresses on this assembly *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
nrows	include/ddr_spd.h	/^	unsigned char nrows;       \/*  5 Number of DIMM Banks *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
nrows	include/spd.h	/^	unsigned char nrows;       \/*  5 # of Module Rows on this assembly *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
nrpages	fs/ubifs/ubifs.h	/^	unsigned long		nrpages;	\/* number of total pages *\/$/;"	m	struct:address_space	typeref:typename:unsigned long
nrxerr	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint clstime, nsent, ntxerr, nrcvd, nrxerr;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uint	file:
ns	drivers/video/mx3fb.c	/^	u32	ns:10;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:10	file:
ns16550_calc_divisor	drivers/serial/ns16550.c	/^int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)$/;"	f	typeref:typename:int
ns16550_com1_pdata	arch/arm/mach-tegra/board.c	/^static struct ns16550_platdata ns16550_com1_pdata = {$/;"	v	typeref:struct:ns16550_platdata	file:
ns16550_platdata	include/ns16550.h	/^struct ns16550_platdata {$/;"	s
ns16550_readb	drivers/serial/ns16550.c	/^static int ns16550_readb(NS16550_t port, int offset)$/;"	f	typeref:typename:int	file:
ns16550_serial_getc	drivers/serial/ns16550.c	/^static int ns16550_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ns16550_serial_ids	drivers/serial/ns16550.c	/^static const struct udevice_id ns16550_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ns16550_serial_initialize	drivers/serial/serial_ns16550.c	/^void ns16550_serial_initialize(void)$/;"	f	typeref:typename:void
ns16550_serial_ofdata_to_platdata	drivers/serial/ns16550.c	/^int ns16550_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int
ns16550_serial_ops	drivers/serial/ns16550.c	/^const struct dm_serial_ops ns16550_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops
ns16550_serial_pending	drivers/serial/ns16550.c	/^static int ns16550_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
ns16550_serial_probe	drivers/serial/ns16550.c	/^int ns16550_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int
ns16550_serial_putc	drivers/serial/ns16550.c	/^static int ns16550_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:DEBUG_UART_FUNCS int	file:
ns16550_serial_setbrg	drivers/serial/ns16550.c	/^static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
ns16550_writeb	drivers/serial/ns16550.c	/^static void ns16550_writeb(NS16550_t port, int offset, int value)$/;"	f	typeref:typename:void	file:
ns2clk	board/freescale/mpc8349emds/mpc8349emds.c	/^#define ns2clk(/;"	d	file:
ns2clk	board/sbc8349/sbc8349.c	/^#define ns2clk(/;"	d	file:
ns2clks	arch/powerpc/cpu/ppc4xx/sdram.c	/^static ulong ns2clks(ulong ns)$/;"	f	typeref:typename:ulong	file:
ns2cycle	drivers/mtd/nand/pxa3xx_nand.c	/^#define ns2cycle(/;"	d	file:
ns75400f690101	doc/DocBook/stylesheet.xsl	/^<stylesheet xmlns="http:\/\/www.w3.org\/1999\/XSL\/Transform" version="1.0">$/;"	n	uri:http://www.w3.org/1999/XSL/Transform
ns8382x_check_duplex	drivers/net/ns8382x.c	/^ns8382x_check_duplex(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns8382x_disable	drivers/net/ns8382x.c	/^ns8382x_disable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns8382x_init	drivers/net/ns8382x.c	/^ns8382x_init(struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
ns8382x_init_rxd	drivers/net/ns8382x.c	/^ns8382x_init_rxd(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns8382x_init_rxfilter	drivers/net/ns8382x.c	/^ns8382x_init_rxfilter(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns8382x_init_txd	drivers/net/ns8382x.c	/^ns8382x_init_txd(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns8382x_initialize	drivers/net/ns8382x.c	/^ns8382x_initialize(bd_t * bis)$/;"	f	typeref:typename:int
ns8382x_poll	drivers/net/ns8382x.c	/^ns8382x_poll(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ns8382x_reset	drivers/net/ns8382x.c	/^ns8382x_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns8382x_send	drivers/net/ns8382x.c	/^static int ns8382x_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
ns8382x_set_rx_mode	drivers/net/ns8382x.c	/^ns8382x_set_rx_mode(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ns_2_cycles	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static inline u32 ns_2_cycles(u32 ns)$/;"	f	typeref:typename:u32	file:
ns_dev	arch/arm/include/asm/arch-fsl-layerscape/ns_access.h	/^static struct csu_ns_dev ns_dev[] = {$/;"	v	typeref:struct:csu_ns_dev[]
ns_dev	arch/arm/include/asm/arch-ls102xa/ns_access.h	/^static struct csu_ns_dev ns_dev[] = {$/;"	v	typeref:struct:csu_ns_dev[]
ns_to_t	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^static inline int ns_to_t(int nanoseconds)$/;"	f	typeref:typename:int	file:
ns_to_t	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static inline int ns_to_t(int nanoseconds)$/;"	f	typeref:typename:int	file:
ns_to_t	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^static inline int ns_to_t(int nanoseconds)$/;"	f	typeref:typename:int	file:
ns_x2_2_cycles	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static inline u32 ns_x2_2_cycles(u32 ns)$/;"	f	typeref:typename:u32	file:
nsaved	arch/arm/include/asm/processor.h	/^	int			nsaved;$/;"	m	struct:debug_info	typeref:typename:int
nsb	drivers/video/mx3fb.c	/^	u32	nsb:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
nsb	drivers/video/mx3fb.c	/^	u32	nsb:1;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:1	file:
nsec	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned long	nsec;$/;"	m	struct:arp_entry	typeref:typename:unsigned long
nsect	include/libata.h	/^	u8			nsect;$/;"	m	struct:ata_taskfile	typeref:typename:u8
nsect_addr	drivers/block/pata_bfin.h	/^	unsigned long nsect_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
nsect_addr	drivers/block/sata_dwc.h	/^	void __iomem		*nsect_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
nsect_addr	drivers/block/sata_sil3114.h	/^	unsigned long nsect_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
nseeds	drivers/mtd/nand/sunxi_nand_spl.c	/^	int nseeds;$/;"	m	struct:nfc_config	typeref:typename:int	file:
nsels	drivers/mtd/nand/sunxi_nand.c	/^	int nsels;$/;"	m	struct:sunxi_nand_chip	typeref:typename:int	file:
nsent	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint clstime, nsent, ntxerr, nrcvd, nrxerr;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uint	file:
nsize	fs/jffs2/jffs2_nand_private.h	/^	unsigned char nsize;$/;"	m	struct:b_dirent	typeref:typename:unsigned char
nsize	fs/jffs2/summary.h	/^	uint8_t nsize;		\/* dirent name size *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:uint8_t
nsize	fs/jffs2/summary.h	/^	uint8_t nsize;		\/* dirent name size *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:uint8_t
nsize	include/jffs2/jffs2.h	/^	__u8 nsize;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u8
nspeeds	tools/gdb/serial.c	/^static int nspeeds = sizeof speedmap \/ sizeof speedmap[0];$/;"	v	typeref:typename:int	file:
nss_pll_config	board/ti/ks2_evm/board_k2g.c	/^static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};$/;"	v	typeref:struct:pll_init_data	file:
ntds	drivers/usb/host/ehci.h	/^	int ntds;$/;"	m	struct:ehci_ctrl	typeref:typename:int
ntohl	include/linux/byteorder/generic.h	/^#define ntohl(/;"	d
ntohs	include/linux/byteorder/generic.h	/^#define ntohs(/;"	d
ntrst	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int ntrst;$/;"	m	struct:pad_signals	typeref:typename:int
ntrst	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int ntrst;$/;"	m	struct:pad_signals	typeref:typename:int
ntxerr	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint clstime, nsent, ntxerr, nrcvd, nrxerr;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uint	file:
nuke	drivers/usb/gadget/at91_udc.c	/^static void nuke(struct at91_ep *ep, int status)$/;"	f	typeref:typename:void	file:
nuke	drivers/usb/gadget/dwc2_udc_otg.c	/^static void nuke(struct dwc2_ep *ep, int status)$/;"	f	typeref:typename:void	file:
nuke	drivers/usb/gadget/pxa25x_udc.c	/^static void nuke(struct pxa25x_ep *ep, int status)$/;"	f	typeref:typename:void	file:
nuke	drivers/usb/musb-new/musb_gadget.c	/^static void nuke(struct musb_ep *ep, const int status)$/;"	f	typeref:typename:void	file:
null_dev_desc_ok	fs/fs.c	/^	bool null_dev_desc_ok;$/;"	m	struct:fstype_info	typeref:typename:bool	file:
nulldev_input	common/stdio.c	/^static int nulldev_input(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
nulldev_putc	common/stdio.c	/^static void nulldev_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void	file:
nulldev_puts	common/stdio.c	/^static void nulldev_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
num	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t num;$/;"	m	struct:cmd_thermal_get_num_zones_response	typeref:typename:uint32_t
num	cmd/bootmenu.c	/^	unsigned short int num;		\/* unique number 0 .. MAX_COUNT *\/$/;"	m	struct:bootmenu_entry	typeref:typename:unsigned short int	file:
num	cmd/pxe.c	/^	char num[4];$/;"	m	struct:pxe_label	typeref:typename:char[4]	file:
num	drivers/net/fm/fm.h	/^	u32 num;			\/* 0..n-1 for give type *\/$/;"	m	struct:fm_eth	typeref:typename:u32
num	fs/ubifs/ubifs.h	/^	int num;$/;"	m	struct:ubifs_cnode	typeref:typename:int
num	fs/ubifs/ubifs.h	/^	int num;$/;"	m	struct:ubifs_nnode	typeref:typename:int
num	fs/ubifs/ubifs.h	/^	int num;$/;"	m	struct:ubifs_pnode	typeref:typename:int
num	include/ec_commands.h	/^			uint8_t num;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::num	typeref:typename:uint8_t
num	include/ec_commands.h	/^			uint8_t num;$/;"	m	struct:ec_response_lightbar::__anon71a6b267030a::get_seq	typeref:typename:uint8_t
num	include/ec_commands.h	/^		struct num {$/;"	s	union:ec_params_lightbar::__anon71a6b267010a
num	include/fm_eth.h	/^	u8 num;$/;"	m	struct:fm_eth_info	typeref:typename:u8
num	include/fsl_qe.h	/^	u8		num;   \/* snum	*\/$/;"	m	struct:qe_snum	typeref:typename:u8
num	include/jffs2/load_kernel.h	/^	u8 num;				\/* device number *\/$/;"	m	struct:mtdids	typeref:typename:u8
num	include/kgdb.h	/^		int num;$/;"	m	struct:__anon584037260108	typeref:typename:int
numGlyphs	drivers/video/stb_truetype.h	/^   int numGlyphs;                     \/\/ number of glyphs, needed for range checking$/;"	m	struct:stbtt_fontinfo	typeref:typename:int
numProbs	lib/lzma/LzmaDec.h	/^  UInt32 numProbs;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:UInt32
numZ	lib/bzip2/bzlib_private.h	/^      Int32    numZ;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
num_addr	board/LaCie/common/cpld-gpio-bus.h	/^	unsigned num_addr;$/;"	m	struct:cpld_gpio_bus	typeref:typename:unsigned
num_afs_images	cmd/armflash.c	/^static int num_afs_images;$/;"	v	typeref:typename:int	file:
num_altsetting	include/usb.h	/^	__u8	num_altsetting;$/;"	m	struct:usb_interface	typeref:typename:__u8
num_areas	arch/x86/include/asm/global_data.h	/^	int num_areas;$/;"	m	struct:memory_info	typeref:typename:int
num_banks	arch/arm/include/asm/emif.h	/^	u8	num_banks;$/;"	m	struct:lpddr2_addressing	typeref:typename:u8
num_banks	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	int num_banks;$/;"	m	struct:exynos_pinctrl_priv	typeref:typename:int
num_banks	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	int num_banks;$/;"	m	struct:rk3288_pinctrl_priv	typeref:typename:int	file:
num_bits	include/u-boot/rsa-mod-exp.h	/^	int num_bits;		\/* Key length in bits *\/$/;"	m	struct:key_prop	typeref:typename:int
num_blocks	arch/x86/include/asm/fsp/fsp_fv.h	/^	u32	num_blocks;$/;"	m	struct:fv_blkmap_entry	typeref:typename:u32
num_buffers	disk/part_amiga.h	/^    u32 num_buffers;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
num_buffs	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	num_buffs;$/;"	m	struct:rx_buff_desc	typeref:typename:u32
num_bytes	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 num_bytes;	\/* number of bytes to be transferred *\/$/;"	m	struct:i2c_trans_info	typeref:typename:u32
num_bytes	arch/sparc/include/asm/prom.h	/^	unsigned num_bytes;$/;"	m	struct:linux_mlist_v0	typeref:typename:unsigned
num_caps	include/slre.h	/^	int		num_caps;	\/* Number of bracket pairs	*\/$/;"	m	struct:slre	typeref:typename:int
num_cards	drivers/net/e1000.c	/^static int num_cards;	\/* Number of E1000 devices seen so far *\/$/;"	v	typeref:typename:int	file:
num_channels	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	int num_channels;$/;"	m	struct:rk3288_sdram_params	typeref:typename:int	file:
num_channels	drivers/crypto/fsl/sec.c	/^		u32 num_channels;$/;"	m	struct:fdt_fixup_crypto_node::sec_rev_prop	typeref:typename:u32	file:
num_chars	drivers/demo/demo-shape.c	/^	int num_chars;	\/* Number of non-space characters output so far *\/$/;"	m	struct:shape_data	typeref:typename:int	file:
num_chars	drivers/video/stb_truetype.h	/^   int num_chars;$/;"	m	struct:__anonce392f790408	typeref:typename:int
num_chipselect	drivers/spi/fsl_dspi.c	/^	uint num_chipselect;$/;"	m	struct:fsl_dspi_platdata	typeref:typename:uint	file:
num_chipselect	drivers/spi/fsl_dspi.c	/^	uint num_chipselect;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
num_chipselect	drivers/spi/fsl_qspi.c	/^	u32 num_chipselect;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:u32	file:
num_chipselect	drivers/spi/fsl_qspi.c	/^	u32 num_chipselect;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
num_clocks_min	drivers/block/pata_bfin.c	/^static unsigned short num_clocks_min(unsigned long tmin,$/;"	f	typeref:typename:unsigned short	file:
num_cols	include/key_matrix.h	/^	int num_cols;$/;"	m	struct:key_matrix	typeref:typename:int
num_controllers	drivers/net/fm/eth.c	/^static int num_controllers;$/;"	v	typeref:typename:int	file:
num_copies	tools/mxsboot.c	/^	uint32_t			num_copies;$/;"	m	struct:mx28_sd_config_block	typeref:typename:uint32_t	file:
num_cores	arch/arc/lib/cache.c	/^			unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2050a::bcr_clust_cfg	typeref:typename:unsigned int:8	file:
num_cores	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 num_cores;$/;"	m	struct:cpu_type	typeref:typename:u32
num_cores	arch/powerpc/include/asm/processor.h	/^	u32 num_cores;$/;"	m	struct:cpu_type	typeref:typename:u32
num_cpus	arch/x86/cpu/mp_init.c	/^static int num_cpus;$/;"	v	typeref:typename:int	file:
num_cs	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 num_cs;$/;"	m	struct:dram_info	typeref:typename:u32
num_cs	drivers/mtd/nand/pxa3xx_nand.h	/^	int	num_cs;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:int
num_cs	drivers/spi/davinci_spi.c	/^	u8 num_cs;	   \/* total no. of CS available *\/$/;"	m	struct:davinci_spi_slave	typeref:typename:u8	file:
num_cs	include/linux/mbus.h	/^	int		num_cs;$/;"	m	struct:mbus_dram_target_info	typeref:typename:int
num_ctrls	include/fsl_ddr.h	/^	unsigned int num_ctrls;$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:unsigned int
num_data	board/LaCie/common/cpld-gpio-bus.h	/^	unsigned num_data;$/;"	m	struct:cpld_gpio_bus	typeref:typename:unsigned
num_default_cylinders	include/linux/edd.h	/^	__u32 num_default_cylinders;$/;"	m	struct:edd_device_params	typeref:typename:__u32
num_default_heads	include/linux/edd.h	/^	__u32 num_default_heads;$/;"	m	struct:edd_device_params	typeref:typename:__u32
num_dpbp	include/fsl-mc/fsl_dpni.h	/^	uint8_t num_dpbp;$/;"	m	struct:dpni_pools_cfg	typeref:typename:uint8_t
num_ecc_blocks_per_page	tools/mxsboot.c	/^	uint32_t		num_ecc_blocks_per_page;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
num_ecc_blocks_per_page_sdk	tools/mxsboot.c	/^	uint32_t		num_ecc_blocks_per_page_sdk;	\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
num_entries	arch/arc/lib/cache.c	/^			unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2050a::bcr_clust_cfg	typeref:typename:unsigned int:8	file:
num_entries	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 num_entries;$/;"	m	struct:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a::__anon775fc5443c08	typeref:typename:u32
num_entries	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 num_entries;$/;"	m	struct:bcm2835_mbox_tag_test_palette::__anon775fc544380a::__anon775fc5443908	typeref:typename:u32
num_entries	arch/x86/cpu/coreboot/timestamp.c	/^	uint32_t	num_entries;$/;"	m	struct:timestamp_table	typeref:typename:uint32_t	file:
num_entries	arch/x86/include/asm/me_common.h	/^	u32 num_entries:8;$/;"	m	struct:mbp_header	typeref:typename:u32:8
num_entries	drivers/input/input.c	/^	int num_entries;	\/* Number of entries in xlate *\/$/;"	m	struct:kbd_entry	typeref:typename:int	file:
num_entries	drivers/usb/host/xhci.h	/^	unsigned int		num_entries;$/;"	m	struct:xhci_erst	typeref:typename:unsigned int
num_entries	include/input.h	/^	int num_entries;	\/* number of entries in this table *\/$/;"	m	struct:input_key_xlate	typeref:typename:int
num_ep	drivers/usb/gadget/atmel_usba_udc.h	/^	int num_ep;$/;"	m	struct:usba_udc	typeref:typename:int
num_ep	include/linux/usb/atmel_usba_udc.h	/^	int			num_ep;$/;"	m	struct:usba_platform_data	typeref:typename:int
num_eps	include/linux/usb/musb.h	/^	u8		num_eps;	\/* number of endpoints _with_ ep0 *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8
num_erase_regions	include/mtd/cfi_flash.h	/^	u8	num_erase_regions;$/;"	m	struct:cfi_qry	typeref:typename:u8
num_event_buffers	drivers/usb/dwc3/core.h	/^	u32			num_event_buffers;$/;"	m	struct:dwc3	typeref:typename:u32
num_flash	drivers/mtd/nand/pxa3xx_nand.h	/^	size_t					num_flash;$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:size_t
num_frags	fs/jffs2/jffs2_nand_private.h	/^	u32 num_frags;$/;"	m	struct:b_compr_info	typeref:typename:u32
num_frags	fs/jffs2/jffs2_private.h	/^	u32 num_frags;$/;"	m	struct:b_compr_info	typeref:typename:u32
num_funcs	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int num_funcs;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:unsigned int
num_funcs	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int num_funcs;$/;"	m	struct:meson_pinctrl_data	typeref:typename:unsigned int
num_functions	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int num_functions;$/;"	m	struct:tegra_xusb_padctl_soc	typeref:typename:unsigned int
num_got_entries	arch/mips/cpu/u-boot.lds	/^	num_got_entries = SIZEOF(.got) >> PTR_COUNT_SHIFT;$/;"	s
num_gpio	arch/arm/mach-davinci/include/mach/gpio.h	/^	int num_gpio;$/;"	m	struct:davinci_gpio_bank	typeref:typename:int
num_gpios	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	int num_gpios;$/;"	m	struct:sysinfo_t	typeref:typename:int
num_groups	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int num_groups;$/;"	m	struct:tegra_xusb_padctl_config	typeref:typename:unsigned int
num_groups	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int num_groups;$/;"	m	struct:meson_pinctrl_data	typeref:typename:unsigned int
num_groups	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int num_groups;$/;"	m	struct:meson_pmx_func	typeref:typename:unsigned int
num_icc_profiles	arch/x86/include/asm/arch-broadwell/me.h	/^	u8	num_icc_profiles;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
num_icc_profiles	arch/x86/include/asm/arch-ivybridge/me.h	/^	u8 num_icc_profiles;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
num_ids	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	u8 num_ids;$/;"	m	struct:liodn_id_table	typeref:typename:u8
num_ids	arch/powerpc/include/asm/fsl_liodn.h	/^	u8 num_ids;$/;"	m	struct:fman_liodn_id_table	typeref:typename:u8
num_ids	arch/powerpc/include/asm/fsl_liodn.h	/^	u8 num_ids;$/;"	m	struct:liodn_id_table	typeref:typename:u8
num_ids	arch/powerpc/include/asm/fsl_liodn.h	/^	u8 num_ids;$/;"	m	struct:srio_liodn_id_table	typeref:typename:u8
num_in_eps	drivers/usb/dwc3/core.h	/^	u8			num_in_eps;$/;"	m	struct:dwc3	typeref:typename:u8
num_items	include/ec_commands.h	/^			uint8_t num_items;	\/* Number of items *\/$/;"	m	struct:ec_result_keyscan_seq_ctrl::__anon71a6b2670a0a::__anon71a6b2670b08	typeref:typename:uint8_t
num_items	include/ec_commands.h	/^			uint8_t num_items;	\/* Number of items to return *\/$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670908	typeref:typename:uint8_t
num_items	include/ec_commands.h	/^			uint8_t num_items;	\/* number of items *\/$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670708	typeref:typename:uint8_t
num_keys	include/fsl_validate.h	/^	uint32_t num_keys;$/;"	m	struct:ie_key_info	typeref:typename:uint32_t
num_lanes	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int num_lanes;$/;"	m	struct:tegra_xusb_padctl_soc	typeref:typename:unsigned int
num_lanes	drivers/pci/pci_tegra.c	/^	unsigned int num_lanes;$/;"	m	struct:tegra_pcie_port	typeref:typename:unsigned int	file:
num_law_entries	board/Arcturus/ucp1020/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/b4860qds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/bsc9131rdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/bsc9132qds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/c29xpcie/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/common/p_corenet/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8536ds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8540ads/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8541cds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8544ds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8548cds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8555cds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8560ads/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8568mds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8569mds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8572ds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8610hpcd/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/mpc8641hpcn/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/p1010rdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/p1022ds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/p1023rdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/p1_p2_rdb_pc/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/p1_twr/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t102xqds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t102xrdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t1040qds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t104xrdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t208xqds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t208xrdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t4qds/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/freescale/t4rdb/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/gdsys/p1022/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/keymile/kmp204x/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/sbc8548/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/sbc8641d/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/socrates/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/varisys/cyrus/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/xes/xpedite517x/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/xes/xpedite520x/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/xes/xpedite537x/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_law_entries	board/xes/xpedite550x/law.c	/^int num_law_entries = ARRAY_SIZE(law_table);$/;"	v	typeref:typename:int
num_lock	board/mpl/common/kbd.c	/^static unsigned char num_lock = 0;$/;"	v	typeref:typename:unsigned char	file:
num_msgs	include/ec_commands.h	/^	uint8_t num_msgs;	\/* Number of messages *\/$/;"	m	struct:ec_params_i2c_passthru	typeref:typename:uint8_t
num_msgs	include/ec_commands.h	/^	uint8_t num_msgs;	\/* Number of messages processed *\/$/;"	m	struct:ec_response_i2c_passthru	typeref:typename:uint8_t
num_of_banks_on_each_device	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 num_of_banks_on_each_device;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
num_of_bus_per_interface	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u8 num_of_bus_per_interface;$/;"	m	struct:hws_topology_map	typeref:typename:u8
num_of_col_addr	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 num_of_col_addr;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
num_of_cs	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 num_of_cs;$/;"	m	struct:cs_element	typeref:typename:u8
num_of_desc_to_reg	drivers/dma/keystone_nav.c	/^inline int num_of_desc_to_reg(int num_descr)$/;"	f	typeref:typename:int
num_of_devices	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 num_of_devices;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
num_of_fats	fs/fat/fat_write.c	/^static __u8 num_of_fats;$/;"	v	typeref:typename:__u8	file:
num_of_fields	include/eeprom_layout.h	/^	int num_of_fields;$/;"	m	struct:eeprom_layout	typeref:typename:int
num_of_loops	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u16 num_of_loops;		\/* for polling only *\/$/;"	m	struct:op_params	typeref:typename:u16
num_of_module_ranks	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 num_of_module_ranks;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
num_of_param_pages	include/linux/mtd/nand.h	/^	u8 num_of_param_pages;        \/* since ONFI 2.1 *\/$/;"	m	struct:nand_onfi_params	typeref:typename:u8
num_of_param_pages	include/linux/mtd/nand.h	/^	u8 num_of_param_pages;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
num_of_phases_rx	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 num_of_phases_rx;$/;"	m	struct:pattern_info	typeref:typename:u8
num_of_phases_tx	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 num_of_phases_tx;$/;"	m	struct:pattern_info	typeref:typename:u8
num_of_row_addr	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 num_of_row_addr;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
num_of_std_pups	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 num_of_std_pups;	\/* Q value = ddrWidth\/8 - Without ECC!! *\/$/;"	m	struct:dram_info	typeref:typename:u32
num_of_total_pups	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 num_of_total_pups;	\/* numOfStdPups + eccEna *\/$/;"	m	struct:dram_info	typeref:typename:u32
num_out_eps	drivers/usb/dwc3/core.h	/^	u8			num_out_eps;$/;"	m	struct:dwc3	typeref:typename:u8
num_pads	board/gateworks/gw_ventana/common.h	/^	int num_pads;$/;"	m	struct:ventana	typeref:typename:int
num_pages	include/efi.h	/^	u64 num_pages;$/;"	m	struct:efi_mem_desc	typeref:typename:u64
num_pages	lib/efi_loader/efi_memory.c	/^	u64 num_pages;$/;"	m	struct:efi_pool_allocation	typeref:typename:u64	file:
num_pairs	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t num_pairs;$/;"	m	struct:mrq_emc_dvfs_latency_response	typeref:typename:uint32_t
num_params	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 num_params;$/;"	m	struct:emu_hal_params	typeref:typename:u32
num_params	board/nokia/rx51/rx51.h	/^	u32 num_params;$/;"	m	struct:emu_hal_params_rx51	typeref:typename:u32
num_parents	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint8_t num_parents;$/;"	m	struct:cmd_clk_get_all_info_response	typeref:typename:uint8_t
num_parents	drivers/clk/at91/clk-generated.c	/^	u32 num_parents;$/;"	m	struct:generic_clk_priv	typeref:typename:u32	file:
num_partition_entries	include/part_efi.h	/^	__le32 num_partition_entries;$/;"	m	struct:_gpt_header	typeref:typename:__le32
num_parts	include/jffs2/load_kernel.h	/^	u16 num_parts;			\/* number of partitions on this device *\/$/;"	m	struct:mtd_device	typeref:typename:u16
num_phy	drivers/net/davinci_emac.c	/^static u_int8_t	num_phy;$/;"	v	typeref:typename:u_int8_t	file:
num_phys	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int num_phys;$/;"	m	struct:tegra_xusb_padctl_soc	typeref:typename:unsigned int
num_pins	arch/arm/cpu/armv8/zynqmp/slcr.c	/^	int num_pins;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:int	file:
num_pins	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int num_pins;$/;"	m	struct:tegra_xusb_padctl_group	typeref:typename:unsigned int
num_pins	arch/arm/mach-zynq/slcr.c	/^	int num_pins;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:int	file:
num_pins	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int num_pins;$/;"	m	struct:meson_pinctrl_data	typeref:typename:unsigned int
num_pins	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int num_pins;$/;"	m	struct:meson_pmx_group	typeref:typename:unsigned int
num_pins	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	unsigned num_pins;$/;"	m	struct:uniphier_pinctrl_group	typeref:typename:unsigned
num_policy_masks	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int num_policy_masks;$/;"	m	struct:ccu_clock	typeref:typename:int
num_policy_masks	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int num_policy_masks;$/;"	m	struct:ccu_clock	typeref:typename:int
num_ports	drivers/pci/pci_tegra.c	/^	unsigned int num_ports;$/;"	m	struct:tegra_pcie_soc	typeref:typename:unsigned int	file:
num_present_cpus	drivers/net/mvpp2.c	/^#define num_present_cpus(/;"	d	file:
num_prev_keycodes	include/input.h	/^	int num_prev_keycodes;	\/* number of prev keys *\/$/;"	m	struct:input_config	typeref:typename:int
num_priorities	include/fsl-mc/fsl_dpio.h	/^	uint8_t		num_priorities;$/;"	m	struct:dpio_cfg	typeref:typename:uint8_t
num_priorities	include/fsl-mc/fsl_dpio.h	/^	uint8_t num_priorities;$/;"	m	struct:dpio_attr	typeref:typename:uint8_t
num_progs	common/cli_hush.c	/^	int num_progs;				\/* total number of programs in job *\/$/;"	m	struct:pipe	typeref:typename:int	file:
num_public_exponent_bits	lib/rsa/rsa-mod-exp.c	/^static int num_public_exponent_bits(const struct rsa_public_key *key,$/;"	f	typeref:typename:int	file:
num_records	arch/x86/cpu/mp_init.c	/^	int num_records;$/;"	m	struct:mp_flight_plan	typeref:typename:int	file:
num_records	arch/x86/include/asm/mp.h	/^	int num_records;$/;"	m	struct:mp_params	typeref:typename:int
num_remaining_in_head_chunk	drivers/video/stb_truetype.h	/^   int    num_remaining_in_head_chunk;$/;"	m	struct:stbtt__hheap	typeref:typename:int
num_remappable_wins	arch/arm/mach-mvebu/mbus.c	/^	unsigned int num_remappable_wins;$/;"	m	struct:mvebu_mbus_soc_data	typeref:typename:unsigned int	file:
num_resources	include/sh_pfc.h	/^	unsigned int num_resources;$/;"	m	struct:pinmux_info	typeref:typename:unsigned int
num_rows	include/key_matrix.h	/^	int num_rows;$/;"	m	struct:key_matrix	typeref:typename:int
num_rx	drivers/net/ethoc.c	/^	u32 num_rx;$/;"	m	struct:ethoc	typeref:typename:u32	file:
num_sectors	drivers/usb/gadget/storage_common.c	/^	loff_t		num_sectors;$/;"	m	struct:fsg_lun	typeref:typename:loff_t	file:
num_sectors	include/usb_mass_storage.h	/^	unsigned int num_sectors;$/;"	m	struct:ums	typeref:typename:unsigned int
num_segs	drivers/usb/host/xhci.h	/^	unsigned int		num_segs;$/;"	m	struct:xhci_ring	typeref:typename:unsigned int
num_srk	include/fsl_validate.h	/^			u32 num_srk:16;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c030a::__anon4913065c0408	typeref:typename:u32:16
num_srk	include/fsl_validate.h	/^		u8 num_srk;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c0108	typeref:typename:u8
num_states	arch/x86/include/asm/speedstep.h	/^	int num_states;$/;"	m	struct:sst_table	typeref:typename:int
num_subdev	drivers/mtd/mtdconcat.c	/^	int num_subdev;$/;"	m	struct:mtd_concat	typeref:typename:int	file:
num_symbols	include/jffs2/mini_inflate.h	/^	int num_symbols; \/* Number of symbols this code can represent *\/$/;"	m	struct:huffman_set	typeref:typename:int
num_tables	include/input.h	/^	uchar num_tables;	\/* number of modifier tables *\/$/;"	m	struct:input_config	typeref:typename:uchar
num_threads_rx	drivers/qe/uec.h	/^	uec_num_of_threads_e		num_threads_rx;$/;"	m	struct:uec_info	typeref:typename:uec_num_of_threads_e
num_threads_tx	drivers/qe/uec.h	/^	uec_num_of_threads_e		num_threads_tx;$/;"	m	struct:uec_info	typeref:typename:uec_num_of_threads_e
num_tlb_entries	board/Arcturus/ucp1020/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/b4860qds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/bsc9131rdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/bsc9132qds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/c29xpcie/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/common/p_corenet/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8536ds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8540ads/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8541cds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8544ds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8548cds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8555cds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8560ads/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8568mds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8569mds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/mpc8572ds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/p1010rdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/p1022ds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/p1023rdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/p1_p2_rdb_pc/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/p1_twr/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t102xqds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t102xrdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t1040qds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t104xrdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t208xqds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t208xrdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t4qds/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/freescale/t4rdb/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/gdsys/p1022/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/keymile/kmp204x/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/sbc8548/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/socrates/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/varisys/cyrus/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/xes/xpedite520x/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/xes/xpedite537x/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tlb_entries	board/xes/xpedite550x/tlb.c	/^int num_tlb_entries = ARRAY_SIZE(tlb_table);$/;"	v	typeref:typename:int
num_tx	drivers/net/ethoc.c	/^	u32 num_tx;$/;"	m	struct:ethoc	typeref:typename:u32	file:
num_wins	arch/arm/mach-mvebu/mbus.c	/^	unsigned int num_wins;$/;"	m	struct:mvebu_mbus_soc_data	typeref:typename:unsigned int	file:
number	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	unsigned number;$/;"	m	struct:uniphier_pinctrl_pin	typeref:typename:unsigned
number	drivers/usb/dwc3/core.h	/^	u8			number;$/;"	m	struct:dwc3_ep	typeref:typename:u8
number	lib/vsprintf.c	/^static char *number(char *buf, char *end, u64 num,$/;"	f	typeref:typename:char *	file:
number	post/cpu/mpc8xx/spr.c	/^    int number;$/;"	m	struct:__anonf88dfa8e0108	typeref:typename:int	file:
number	post/cpu/ppc4xx/spr.c	/^	int number;$/;"	m	struct:__anonb9764ead0108	typeref:typename:int	file:
number_2k_pages_bb	tools/mxsboot.c	/^	uint32_t		number_2k_pages_bb;$/;"	m	struct:mx28_nand_dbbt	typeref:typename:uint32_t	file:
number_bb	tools/mxsboot.c	/^	uint32_t		number_bb;$/;"	m	struct:mx28_nand_bbt	typeref:typename:uint32_t	file:
number_bb	tools/mxsboot.c	/^	uint32_t		number_bb;$/;"	m	struct:mx28_nand_dbbt	typeref:typename:uint32_t	file:
number_of_banks	include/vbe.h	/^	u8 number_of_banks;	\/* 20 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
number_of_front_jacks	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint16_t number_of_front_jacks;$/;"	m	struct:pch_azalia_verb_table_header	typeref:typename:uint16_t
number_of_image_pages	include/vbe.h	/^	u8 number_of_image_pages; \/* 23 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
number_of_nands	tools/mxsboot.c	/^	uint32_t		number_of_nands;		\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
number_of_planes	include/vbe.h	/^	u8 number_of_planes;	\/* 18 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
number_of_power_cords	include/smbios.h	/^	u8 number_of_power_cords;$/;"	m	struct:smbios_type3	typeref:typename:u8
number_of_rear_jacks	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint16_t number_of_rear_jacks;$/;"	m	struct:pch_azalia_verb_table_header	typeref:typename:uint16_t
number_of_regs	include/power/pmic.h	/^	unsigned int number_of_regs;$/;"	m	struct:pmic	typeref:typename:unsigned int
number_of_sectors	include/linux/edd.h	/^	__u64 number_of_sectors;$/;"	m	struct:edd_device_params	typeref:typename:__u64
numblocks	include/linux/mtd/mtd.h	/^	uint32_t numblocks;		\/* Number of blocks of erasesize in this region *\/$/;"	m	struct:mtd_erase_region_info	typeref:typename:uint32_t
numblocks	include/mtd/mtd-abi.h	/^	__u32 numblocks;	\/* Number of blocks in this region *\/$/;"	m	struct:region_info_user	typeref:typename:__u32
numbytes	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 numbytes;	\/* 0x18 num bytes *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
numbytes	arch/arm/include/asm/arch/p2wi.h	/^	u32 numbytes;	\/* 0x18 num bytes *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
numchips	include/linux/mtd/doc2000.h	/^	int numchips;$/;"	m	struct:DiskOnChip	typeref:typename:int
numchips	include/linux/mtd/nand.h	/^	int numchips;$/;"	m	struct:nand_chip	typeref:typename:int
numentry	disk/part_iso.h	/^	unsigned char numentry[2];	\/* number of entries *\/$/;"	m	struct:iso_header_entry	typeref:typename:unsigned char[2]
numeraseregions	include/linux/mtd/mtd.h	/^	int numeraseregions;$/;"	m	struct:mtd_info	typeref:typename:int
numports	arch/sparc/cpu/leon3/usb_uhci.h	/^	int numports;		\/* number of ports *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
numports	board/mpl/common/usb_uhci.h	/^	int numports;             \/* number of ports *\/$/;"	m	struct:virt_root_hub	typeref:typename:int
nv_locked	include/tpm.h	/^	u8	nv_locked;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
nval_del	fs/yaffs2/yaffs_nameval.c	/^int nval_del(char *xb, int xb_size, const YCHAR *name)$/;"	f	typeref:typename:int
nval_find	fs/yaffs2/yaffs_nameval.c	/^static int nval_find(const char *xb, int xb_size, const YCHAR *name,$/;"	f	typeref:typename:int	file:
nval_get	fs/yaffs2/yaffs_nameval.c	/^int nval_get(const char *xb, int xb_size, const YCHAR * name, char *buf,$/;"	f	typeref:typename:int
nval_hasvalues	fs/yaffs2/yaffs_nameval.c	/^int nval_hasvalues(const char *xb, int xb_size)$/;"	f	typeref:typename:int
nval_list	fs/yaffs2/yaffs_nameval.c	/^int nval_list(const char *xb, int xb_size, char *buf, int bsize)$/;"	f	typeref:typename:int
nval_set	fs/yaffs2/yaffs_nameval.c	/^int nval_set(char *xb, int xb_size, const YCHAR *name, const char *buf,$/;"	f	typeref:typename:int
nval_used	fs/yaffs2/yaffs_nameval.c	/^static int nval_used(const char *xb, int xb_size)$/;"	f	typeref:typename:int	file:
nvdata	drivers/tpm/tpm_tis_sandbox.c	/^	uint8_t nvdata[NV_SEQ_COUNT][NV_DATA_SIZE];$/;"	m	struct:tpm_state	typeref:typename:uint8_t[][]	file:
nvidia_board_init	arch/arm/mach-tegra/board2.c	/^__weak int nvidia_board_init(void)$/;"	f	typeref:typename:__weak int
nvidia_board_init	board/nvidia/nyan-big/nyan-big.c	/^int nvidia_board_init(void)$/;"	f	typeref:typename:int
nvlist_find_value	fs/zfs/zfs.c	/^nvlist_find_value(char *nvlist, char *name, int valtype, char **val,$/;"	f	typeref:typename:int	file:
nvm_regs_p	drivers/mtd/pic32_flash.c	/^static struct pic32_reg_nvm *nvm_regs_p;$/;"	v	typeref:struct:pic32_reg_nvm *	file:
nvram_access_size	include/efi_api.h	/^	u32 nvram_access_size;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
nvram_read	drivers/rtc/mk48t59.c	/^void *nvram_read(void *dest, const short src, size_t count)$/;"	f	typeref:typename:void *
nvram_size	include/efi_api.h	/^	u32 nvram_size;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
nvram_write	drivers/rtc/mk48t59.c	/^void nvram_write(short dest, const void *src, size_t count)$/;"	f	typeref:typename:void
nvs_buf	arch/x86/include/asm/fsp/fsp_api.h	/^	void			*nvs_buf;$/;"	m	struct:fsp_init_params	typeref:typename:void *
nvtboot_boot_x0	arch/arm/mach-tegra/tegra186/nvtboot_ll.S	/^nvtboot_boot_x0:$/;"	l
nwcfg	drivers/net/zynq_gem.c	/^	u32 nwcfg; \/* 0x4 - Network Config reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
nwctrl	drivers/net/zynq_gem.c	/^	u32 nwctrl; \/* 0x0 - Network Control reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
nwsr	drivers/net/zynq_gem.c	/^	u32 nwsr; \/* 0x8 - Network Status reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
nxp_hdmi_bonelt_off_pins	arch/arm/dts/am335x-boneblack.dts	/^	nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {$/;"	l
nxp_hdmi_bonelt_pins	arch/arm/dts/am335x-boneblack.dts	/^	nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {$/;"	l
nxtdesc_p	drivers/net/armada100_fec.h	/^	struct rx_desc *nxtdesc_p;	\/* Next descriptor pointer *\/$/;"	m	struct:rx_desc	typeref:struct:rx_desc *
nxtdesc_p	drivers/net/mvgbe.h	/^	struct mvgbe_rxdesc *nxtdesc_p;	\/* Next descriptor pointer *\/$/;"	m	struct:mvgbe_rxdesc	typeref:struct:mvgbe_rxdesc *
nxtdesc_p	drivers/net/mvgbe.h	/^	struct mvgbe_txdesc *nxtdesc_p;	\/* Next descriptor ptr *\/$/;"	m	struct:mvgbe_txdesc	typeref:struct:mvgbe_txdesc *
nyan_big_drvgrps	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^static const struct pmux_drvgrp_config nyan_big_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
nyan_big_gpio_inits	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^static const struct tegra_gpio_config nyan_big_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
nyan_big_pingrps	board/nvidia/nyan-big/pinmux-config-nyan-big.h	/^static const struct pmux_pingrp_config nyan_big_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
nysr	drivers/rtc/mpc5xxx.c	/^	volatile ulong	nysr;	\/* MBAR+0x808: new year and stopwatch register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
o32	arch/x86/cpu/start16.S	/^#define o32	/;"	d	file:
o32	arch/x86/cpu/start16.S	/^o32 cs	lgdt	gdt_ptr$/;"	l
o32	arch/x86/cpu/start16.S	/^o32 cs	lidt	idt_ptr$/;"	l
o32	arch/x86/cpu/start16.S	/^o32 cs	ljmp	*(%bp)$/;"	l
o_cfg	include/linux/usb/dwc3.h	/^	u32 o_cfg;$/;"	m	struct:dwc3	typeref:typename:u32
o_ctl	include/linux/usb/dwc3.h	/^	u32 o_ctl;$/;"	m	struct:dwc3	typeref:typename:u32
o_evt	include/linux/usb/dwc3.h	/^	u32 o_evt;$/;"	m	struct:dwc3	typeref:typename:u32
o_evten	include/linux/usb/dwc3.h	/^	u32 o_evten;$/;"	m	struct:dwc3	typeref:typename:u32
o_string	common/cli_hush.c	/^} o_string;$/;"	t	typeref:struct:__anon62a9299d0508	file:
o_sts	include/linux/usb/dwc3.h	/^	u32 o_sts;$/;"	m	struct:dwc3	typeref:typename:u32
oa	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short oa;              \/* 0xA8 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
oa	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short oa;	\/* 0x28 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
oa	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short oa;		\/* 0xA8 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
oa	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short oa;		\/* 0xA8 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
obah	arch/powerpc/include/asm/immap_85xx.h	/^	u32 obah;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
obal	arch/powerpc/include/asm/immap_85xx.h	/^	u32 obal;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
obir	arch/powerpc/include/asm/immap_83xx.h	/^	u32 obir;		\/* Output Buffer Impedance Register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
obj	Makefile	/^obj		:= $(objtree)$/;"	m
obj-	board/freescale/common/Makefile	/^obj- := __dummy__.o$/;"	m
obj-	board/samsung/origen/Makefile	/^obj- := __dummy__.o$/;"	m
obj-	board/samsung/smdkv310/Makefile	/^obj- := __dummy__.o$/;"	m
obj-	board/spear/common/Makefile	/^obj- := __dummy__.o$/;"	m
obj-	board/spear/x600/Makefile	/^obj- := __dummy__.o$/;"	m
obj-	board/varisys/common/Makefile	/^obj- := __dummy__.o$/;"	m
obj-$(CONFIG_CMD_ONENAND)	drivers/mtd/onenand/Makefile	/^obj-$(CONFIG_CMD_ONENAND)	:= onenand_uboot.o onenand_base.o onenand_bbt.o$/;"	m
obj-$(CONFIG_FAT_WRITE)	fs/fat/Makefile	/^obj-$(CONFIG_FAT_WRITE):= fat_write.o$/;"	m
obj-$(CONFIG_FS_FAT)	fs/fat/Makefile	/^obj-$(CONFIG_FS_FAT)	:= fat.o$/;"	m
obj-$(CONFIG_OF_EMBED)	dts/Makefile	/^obj-$(CONFIG_OF_EMBED) := dt.dtb.o$/;"	m
obj-$(CONFIG_SPL_BUILD)	arch/arm/mach-mvebu/serdes/a38x/Makefile	/^obj-$(CONFIG_SPL_BUILD)	= ctrl_pex.o$/;"	m
obj-$(CONFIG_SPL_BUILD)	arch/arm/mach-mvebu/serdes/axp/Makefile	/^obj-$(CONFIG_SPL_BUILD)	= high_speed_env_lib.o$/;"	m
obj-y	arch/arm/cpu/arm11/Makefile	/^obj-y	= cpu.o$/;"	m
obj-y	arch/arm/cpu/arm720t/Makefile	/^obj-y	= interrupts.o cpu.o$/;"	m
obj-y	arch/arm/cpu/arm920t/ep93xx/Makefile	/^obj-y   = cpu.o led.o speed.o timer.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/Makefile	/^obj-y	= cpu.o cache.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/armada100/Makefile	/^obj-y	= cpu.o timer.o dram.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/lpc32xx/Makefile	/^obj-y   = cpu.o clk.o devices.o timer.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/mx25/Makefile	/^obj-y	= generic.o timer.o reset.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/mx27/Makefile	/^obj-y	= generic.o reset.o timer.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/mxs/Makefile	/^obj-y	= clock.o mxs.o iomux.o timer.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/omap/Makefile	/^obj-y	= timer.o$/;"	m
obj-y	arch/arm/cpu/arm926ejs/spear/Makefile	/^obj-y	:= cpu.o \\$/;"	m
obj-y	arch/arm/cpu/arm946es/Makefile	/^obj-y	= cpu.o$/;"	m
obj-y	arch/arm/cpu/armv7/mx5/Makefile	/^obj-y := soc.o clock.o$/;"	m
obj-y	arch/arm/cpu/armv7/mx6/Makefile	/^obj-y	:= soc.o clock.o$/;"	m
obj-y	arch/arm/cpu/armv7/mx7/Makefile	/^obj-y	:= soc.o clock.o clock_slice.o$/;"	m
obj-y	arch/arm/cpu/armv7/omap-common/Makefile	/^obj-y	:= reset.o$/;"	m
obj-y	arch/arm/cpu/armv7/omap3/Makefile	/^obj-y	:= lowlevel_init.o$/;"	m
obj-y	arch/arm/cpu/armv7/stv0991/Makefile	/^obj-y	:= timer.o clock.o pinmux.o reset.o$/;"	m
obj-y	arch/arm/imx-common/Makefile	/^obj-y	= iomux-v3.o$/;"	m
obj-y	arch/arm/mach-highbank/Makefile	/^obj-y	:= timer.o$/;"	m
obj-y	arch/arm/mach-kirkwood/Makefile	/^obj-y	= cpu.o$/;"	m
obj-y	arch/arm/mach-mvebu/Makefile	/^obj-y	= cpu.o$/;"	m
obj-y	arch/arm/mach-mvebu/Makefile	/^obj-y	= dram.o$/;"	m
obj-y	arch/arm/mach-mvebu/armada3700/Makefile	/^obj-y = cpu.o$/;"	m
obj-y	arch/arm/mach-mvebu/armada8k/Makefile	/^obj-y = cpu.o$/;"	m
obj-y	arch/arm/mach-orion5x/Makefile	/^obj-y	= cpu.o$/;"	m
obj-y	arch/arm/mach-rmobile/Makefile	/^obj-y = cpu_info.o$/;"	m
obj-y	arch/arm/mach-s5pc1xx/Makefile	/^obj-y	= cache.o$/;"	m
obj-y	arch/arm/mach-versatile/Makefile	/^obj-y	= timer.o$/;"	m
obj-y	arch/arm/mach-zynq/Makefile	/^obj-y	:= timer.o$/;"	m
obj-y	arch/avr32/cpu/at32ap700x/Makefile	/^obj-y	:= portmux.o clk.o mmu.o$/;"	m
obj-y	arch/blackfin/cpu/Makefile	/^obj-y    := interrupt.o cache.o$/;"	m
obj-y	arch/m68k/cpu/mcf5227x/Makefile	/^obj-y	= cpu.o speed.o cpu_init.o interrupts.o$/;"	m
obj-y	arch/m68k/cpu/mcf523x/Makefile	/^obj-y	= cpu.o speed.o cpu_init.o interrupts.o$/;"	m
obj-y	arch/m68k/cpu/mcf52x2/Makefile	/^obj-y	= interrupts.o cpu.o speed.o cpu_init.o$/;"	m
obj-y	arch/m68k/cpu/mcf530x/Makefile	/^obj-y	= interrupts.o cpu.o speed.o cpu_init.o$/;"	m
obj-y	arch/m68k/cpu/mcf532x/Makefile	/^obj-y	= cpu.o speed.o cpu_init.o interrupts.o$/;"	m
obj-y	arch/m68k/cpu/mcf5445x/Makefile	/^obj-y	= cpu.o speed.o cpu_init.o interrupts.o pci.o$/;"	m
obj-y	arch/m68k/cpu/mcf547x_8x/Makefile	/^obj-y	= cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o$/;"	m
obj-y	arch/microblaze/cpu/Makefile	/^obj-y	= irq.o$/;"	m
obj-y	arch/mips/mach-au1x00/Makefile	/^obj-y	= au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o au1x00_ide.o$/;"	m
obj-y	arch/mips/mach-pic32/Makefile	/^obj-y = cpu.o lowlevel_init.o reset.o/;"	m
obj-y	arch/nds32/cpu/n1213/ag101/Makefile	/^obj-y	:= cpu.o timer.o$/;"	m
obj-y	arch/nios2/cpu/Makefile	/^obj-y	= exceptions.o$/;"	m
obj-y	arch/openrisc/cpu/Makefile	/^obj-y	= cache.o cpu.o exceptions.o interrupts.o$/;"	m
obj-y	arch/powerpc/cpu/mpc512x/Makefile	/^obj-y	:= cpu.o$/;"	m
obj-y	arch/powerpc/cpu/mpc5xx/Makefile	/^obj-y	= serial.o cpu.o cpu_init.o interrupts.o traps.o speed.o spi.o$/;"	m
obj-y	arch/powerpc/cpu/mpc8260/Makefile	/^obj-y	= traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \\$/;"	m
obj-y	arch/powerpc/cpu/ppc4xx/Makefile	/^obj-y	:= cache.o$/;"	m
obj-y	arch/sandbox/cpu/Makefile	/^obj-y	:= cpu.o os.o start.o state.o$/;"	m
obj-y	arch/sh/cpu/sh2/Makefile	/^obj-y	= cpu.o interrupts.o watchdog.o$/;"	m
obj-y	arch/sh/cpu/sh3/Makefile	/^obj-y	= cpu.o interrupts.o watchdog.o cache.o$/;"	m
obj-y	arch/sh/cpu/sh4/Makefile	/^obj-y	= cpu.o interrupts.o watchdog.o cache.o$/;"	m
obj-y	arch/sparc/cpu/leon2/Makefile	/^obj-y	= cpu_init.o serial.o cpu.o interrupts.o prom.o$/;"	m
obj-y	arch/sparc/cpu/leon3/Makefile	/^obj-y	= cpu_init.o serial.o cpu.o ambapp.o ambapp_low.o ambapp_low_c.o \\$/;"	m
obj-y	arch/sparc/lib/Makefile	/^obj-y = cache.o interrupts.o$/;"	m
obj-y	arch/xtensa/cpu/Makefile	/^obj-y = cpu.o exceptions.o$/;"	m
obj-y	board/8dtech/eco5pk/Makefile	/^obj-y	:= eco5pk.o$/;"	m
obj-y	board/AndesTech/adp-ag101p/Makefile	/^obj-y	:= adp-ag101p.o$/;"	m
obj-y	board/BuR/brppt1/Makefile	/^obj-y	:= mux.o$/;"	m
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obj-y	board/CarMediaLab/flea3/Makefile	/^obj-y	:= flea3.o$/;"	m
obj-y	board/LaCie/edminiv2/Makefile	/^obj-y	:= edminiv2.o ..\/common\/common.o$/;"	m
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obj-y	board/Marvell/db-88f6720/Makefile	/^obj-y	:= db-88f6720.o$/;"	m
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obj-y	board/Marvell/guruplug/Makefile	/^obj-y	:= guruplug.o$/;"	m
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obj-y	board/Marvell/sheevaplug/Makefile	/^obj-y	:= sheevaplug.o$/;"	m
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obj-y	board/Seagate/goflexhome/Makefile	/^obj-y	:= goflexhome.o$/;"	m
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obj-y	board/logicpd/omap3som/Makefile	/^obj-y	:= omap3logic.o$/;"	m
obj-y	board/logicpd/zoom1/Makefile	/^obj-y	:= zoom1.o$/;"	m
obj-y	board/maxbcm/Makefile	/^obj-y	:= maxbcm.o$/;"	m
obj-y	board/microchip/pic32mzda/Makefile	/^obj-y := pic32mzda.o$/;"	m
obj-y	board/micronas/vct/Makefile	/^obj-y := vct.o$/;"	m
obj-y	board/mosaixtech/icon/Makefile	/^obj-y	:= icon.o$/;"	m
obj-y	board/motionpro/Makefile	/^obj-y	:= motionpro.o$/;"	m
obj-y	board/mpc8308_p1m/Makefile	/^obj-y	:= mpc8308_p1m.o sdram.o$/;"	m
obj-y	board/mpl/mip405/Makefile	/^obj-y	= mip405.o cmd_mip405.o \\$/;"	m
obj-y	board/mpl/pati/Makefile	/^obj-y	:=  pati.o cmd_pati.o \\$/;"	m
obj-y	board/mpl/pip405/Makefile	/^obj-y	= pip405.o cmd_pip405.o \\$/;"	m
obj-y	board/mpl/vcma9/Makefile	/^obj-y	:= ..\/common\/common_util.o$/;"	m
obj-y	board/mpr2/Makefile	/^obj-y	:= mpr2.o$/;"	m
obj-y	board/ms7720se/Makefile	/^obj-y	:= ms7720se.o$/;"	m
obj-y	board/ms7722se/Makefile	/^obj-y	:= ms7722se.o$/;"	m
obj-y	board/ms7750se/Makefile	/^obj-y	:= ms7750se.o$/;"	m
obj-y	board/munices/Makefile	/^obj-y	:= munices.o$/;"	m
obj-y	board/nokia/rx51/Makefile	/^obj-y := rx51.o$/;"	m
obj-y	board/nvidia/beaver/Makefile	/^obj-y	= ..\/cardhu\/cardhu.o$/;"	m
obj-y	board/nvidia/cardhu/Makefile	/^obj-y	:= cardhu.o$/;"	m
obj-y	board/nvidia/dalmore/Makefile	/^obj-y	:= dalmore.o$/;"	m
obj-y	board/nvidia/harmony/Makefile	/^obj-y	:= harmony.o$/;"	m
obj-y	board/nvidia/seaboard/Makefile	/^obj-y	:= seaboard.o$/;"	m
obj-y	board/nvidia/ventana/Makefile	/^obj-y	= ..\/seaboard\/seaboard.o$/;"	m
obj-y	board/nvidia/whistler/Makefile	/^obj-y	:= whistler.o$/;"	m
obj-y	board/olimex/mx23_olinuxino/Makefile	/^obj-y	:= mx23_olinuxino.o$/;"	m
obj-y	board/olimex/mx23_olinuxino/Makefile	/^obj-y	:= spl_boot.o$/;"	m
obj-y	board/omicron/calimain/Makefile	/^obj-y   := calimain.o$/;"	m
obj-y	board/openrisc/openrisc-generic/Makefile	/^obj-y	:= openrisc-generic.o$/;"	m
obj-y	board/overo/Makefile	/^obj-y	:= overo.o common.o$/;"	m
obj-y	board/overo/Makefile	/^obj-y	:= spl.o common.o$/;"	m
obj-y	board/pandora/Makefile	/^obj-y	:= pandora.o$/;"	m
obj-y	board/pb1x00/Makefile	/^obj-y	= pb1x00.o flash.o$/;"	m
obj-y	board/pdm360ng/Makefile	/^obj-y	:= pdm360ng.o$/;"	m
obj-y	board/phytec/pcm030/Makefile	/^obj-y	:= pcm030.o$/;"	m
obj-y	board/phytec/pcm052/Makefile	/^obj-y	:= pcm052.o$/;"	m
obj-y	board/phytec/pcm058/Makefile	/^obj-y  := pcm058.o$/;"	m
obj-y	board/ppcag/bg0900/Makefile	/^obj-y	:= bg0900.o$/;"	m
obj-y	board/ppcag/bg0900/Makefile	/^obj-y	:= spl_boot.o$/;"	m
obj-y	board/pr1/Makefile	/^obj-y	:= pr1.o$/;"	m
obj-y	board/qca/ap121/Makefile	/^obj-y	= ap121.o$/;"	m
obj-y	board/qca/ap143/Makefile	/^obj-y	= ap143.o$/;"	m
obj-y	board/qemu-mips/Makefile	/^obj-y	= qemu-mips.o$/;"	m
obj-y	board/qualcomm/dragonboard410c/Makefile	/^obj-y	:= dragonboard410c.o$/;"	m
obj-y	board/quipos/cairo/Makefile	/^obj-y	:= cairo.o$/;"	m
obj-y	board/raidsonic/ib62x0/Makefile	/^obj-y	:= ib62x0.o$/;"	m
obj-y	board/raspberrypi/rpi/Makefile	/^obj-y	:= rpi.o$/;"	m
obj-y	board/renesas/MigoR/Makefile	/^obj-y	:= migo_r.o$/;"	m
obj-y	board/renesas/alt/Makefile	/^obj-y	:= alt.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/ap325rxa/Makefile	/^obj-y	:= ap325rxa.o cpld-ap325rxa.o$/;"	m
obj-y	board/renesas/blanche/Makefile	/^obj-y	:= blanche.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/ecovec/Makefile	/^obj-y := ecovec.o$/;"	m
obj-y	board/renesas/gose/Makefile	/^obj-y	:= gose.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/koelsch/Makefile	/^obj-y	:= koelsch.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/lager/Makefile	/^obj-y	:= lager.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/porter/Makefile	/^obj-y	:= porter.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/r0p7734/Makefile	/^obj-y	:= r0p7734.o$/;"	m
obj-y	board/renesas/r2dplus/Makefile	/^obj-y	:= r2dplus.o$/;"	m
obj-y	board/renesas/r7780mp/Makefile	/^obj-y	:= r7780mp.o$/;"	m
obj-y	board/renesas/rsk7203/Makefile	/^obj-y	:= rsk7203.o$/;"	m
obj-y	board/renesas/rsk7264/Makefile	/^obj-y	:= rsk7264.o$/;"	m
obj-y	board/renesas/rsk7269/Makefile	/^obj-y	:= rsk7269.o$/;"	m
obj-y	board/renesas/salvator-x/Makefile	/^obj-y	:= salvator-x.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/sh7752evb/Makefile	/^obj-y	:= sh7752evb.o spi-boot.o$/;"	m
obj-y	board/renesas/sh7753evb/Makefile	/^obj-y	:= sh7753evb.o spi-boot.o$/;"	m
obj-y	board/renesas/sh7757lcr/Makefile	/^obj-y	:= sh7757lcr.o spi-boot.o$/;"	m
obj-y	board/renesas/sh7763rdp/Makefile	/^obj-y	:= sh7763rdp.o$/;"	m
obj-y	board/renesas/sh7785lcr/Makefile	/^obj-y	:= sh7785lcr.o selfcheck.o rtl8169_mac.o$/;"	m
obj-y	board/renesas/silk/Makefile	/^obj-y	:= silk.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/renesas/stout/Makefile	/^obj-y	:= stout.o cpld.o qos.o ..\/rcar-common\/common.o$/;"	m
obj-y	board/samsung/goni/Makefile	/^obj-y	:= goni.o onenand.o$/;"	m
obj-y	board/samsung/odroid/Makefile	/^obj-y	:= odroid.o$/;"	m
obj-y	board/samsung/smdk2410/Makefile	/^obj-y	:= smdk2410.o$/;"	m
obj-y	board/samsung/smdkc100/Makefile	/^obj-y	:= smdkc100.o$/;"	m
obj-y	board/samsung/trats2/Makefile	/^obj-y	:= trats2.o$/;"	m
obj-y	board/samsung/universal_c210/Makefile	/^obj-y	:= universal.o onenand.o$/;"	m
obj-y	board/samtec/vining_fpga/Makefile	/^obj-y	:= socfpga.o$/;"	m
obj-y	board/sandbox/Makefile	/^obj-y	:= sandbox.o$/;"	m
obj-y	board/sandisk/sansa_fuze_plus/Makefile	/^obj-y	:= sfp.o$/;"	m
obj-y	board/sandisk/sansa_fuze_plus/Makefile	/^obj-y	:= spl_boot.o$/;"	m
obj-y	board/schulercontrol/sc_sps_1/Makefile	/^obj-y	:= sc_sps_1.o$/;"	m
obj-y	board/schulercontrol/sc_sps_1/Makefile	/^obj-y	:= spl_boot.o$/;"	m
obj-y	board/seco/mx6quq7/Makefile	/^obj-y  := mx6quq7.o$/;"	m
obj-y	board/shmin/Makefile	/^obj-y	:= shmin.o$/;"	m
obj-y	board/siemens/draco/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/siemens/pxm2/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/siemens/rut/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/silica/pengwyn/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/solidrun/clearfog/Makefile	/^obj-y	:= clearfog.o$/;"	m
obj-y	board/solidrun/mx6cuboxi/Makefile	/^obj-y  := mx6cuboxi.o$/;"	m
obj-y	board/spear/common/Makefile	/^obj-y	:= spr_misc.o$/;"	m
obj-y	board/spear/spear300/Makefile	/^obj-y	:= spear300.o$/;"	m
obj-y	board/spear/spear310/Makefile	/^obj-y	:= spear310.o$/;"	m
obj-y	board/spear/spear320/Makefile	/^obj-y	:= spear320.o$/;"	m
obj-y	board/spear/spear600/Makefile	/^obj-y	:= spear600.o$/;"	m
obj-y	board/spear/x600/Makefile	/^obj-y	:= fpga.o x600.o$/;"	m
obj-y	board/sr1500/Makefile	/^obj-y	:= socfpga.o$/;"	m
obj-y	board/st/stm32f429-discovery/Makefile	/^obj-y	:= stm32f429-discovery.o$/;"	m
obj-y	board/st/stm32f746-disco/Makefile	/^obj-y	:= stm32f746-disco.o$/;"	m
obj-y	board/st/stv0991/Makefile	/^obj-y	:= stv0991.o$/;"	m
obj-y	board/sysam/amcore/Makefile	/^obj-y	= amcore.o$/;"	m
obj-y	board/t3corp/Makefile	/^obj-y	:= t3corp.o$/;"	m
obj-y	board/tbs/tbs2910/Makefile	/^obj-y  := tbs2910.o$/;"	m
obj-y	board/tcl/sl50/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/tcm-bf518/Makefile	/^obj-y	:= tcm-bf518.o$/;"	m
obj-y	board/tcm-bf537/Makefile	/^obj-y	:= tcm-bf537.o gpio_cfi_flash.o$/;"	m
obj-y	board/technexion/pico-imx6ul/Makefile	/^obj-y  := pico-imx6ul.o$/;"	m
obj-y	board/technexion/tao3530/Makefile	/^obj-y	:= tao3530.o$/;"	m
obj-y	board/technexion/twister/Makefile	/^obj-y	:= twister.o$/;"	m
obj-y	board/teejet/mt_ventoux/Makefile	/^obj-y	:= mt_ventoux.o$/;"	m
obj-y	board/terasic/de0-nano-soc/Makefile	/^obj-y	:= socfpga.o$/;"	m
obj-y	board/terasic/sockit/Makefile	/^obj-y	:= socfpga.o$/;"	m
obj-y	board/theadorable/Makefile	/^obj-y	:= theadorable.o$/;"	m
obj-y	board/ti/am335x/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/ti/am3517crane/Makefile	/^obj-y	:= am3517crane.o$/;"	m
obj-y	board/ti/am43xx/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/ti/am57xx/Makefile	/^obj-y	:= board.o$/;"	m
obj-y	board/ti/beagle/Makefile	/^obj-y	:= beagle.o$/;"	m
obj-y	board/ti/dra7xx/Makefile	/^obj-y	:= evm.o$/;"	m
obj-y	board/ti/evm/Makefile	/^obj-y	:= evm.o$/;"	m
obj-y	board/ti/omap5_uevm/Makefile	/^obj-y	:= evm.o$/;"	m
obj-y	board/ti/panda/Makefile	/^obj-y	:= panda.o$/;"	m
obj-y	board/ti/sdp4430/Makefile	/^obj-y	:= sdp.o$/;"	m
obj-y	board/ti/ti814x/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/ti/ti816x/Makefile	/^obj-y	:= evm.o$/;"	m
obj-y	board/timll/devkit3250/Makefile	/^obj-y	:= devkit3250.o$/;"	m
obj-y	board/timll/devkit8000/Makefile	/^obj-y	:= devkit8000.o$/;"	m
obj-y	board/toradex/colibri_imx7/Makefile	/^obj-y  := colibri_imx7.o$/;"	m
obj-y	board/toradex/colibri_pxa270/Makefile	/^obj-y	:= colibri_pxa270.o$/;"	m
obj-y	board/toradex/colibri_vf/Makefile	/^obj-y	:= colibri_vf.o$/;"	m
obj-y	board/tplink/wdr4300/Makefile	/^obj-y	= wdr4300.o$/;"	m
obj-y	board/tqc/tqm5200/Makefile	/^obj-y	:= tqm5200.o cmd_stk52xx.o cam5200_flash.o$/;"	m
obj-y	board/tqc/tqm8xx/Makefile	/^obj-y	= tqm8xx.o load_sernum_ethaddr.o$/;"	m
obj-y	board/tqc/tqma6/Makefile	/^obj-y  := tqma6.o$/;"	m
obj-y	board/udoo/Makefile	/^obj-y  := udoo.o udoo_spl.o$/;"	m
obj-y	board/v38b/Makefile	/^obj-y	:= v38b.o ethaddr.o$/;"	m
obj-y	board/ve8313/Makefile	/^obj-y	:= ve8313.o$/;"	m
obj-y	board/vscom/baltos/Makefile	/^obj-y	:= mux.o$/;"	m
obj-y	board/wandboard/Makefile	/^obj-y  := wandboard.o spl.o$/;"	m
obj-y	board/warp/Makefile	/^obj-y  := warp.o$/;"	m
obj-y	board/warp7/Makefile	/^obj-y  := warp7.o$/;"	m
obj-y	board/woodburn/Makefile	/^obj-y	:= woodburn.o$/;"	m
obj-y	board/xes/xpedite1000/Makefile	/^obj-y	= xpedite1000.o$/;"	m
obj-y	board/xilinx/microblaze-generic/Makefile	/^obj-y	= microblaze-generic.o$/;"	m
obj-y	board/xilinx/zynq/Makefile	/^obj-y	:= board.o$/;"	m
obj-y	board/xilinx/zynqmp/Makefile	/^obj-y	:= zynqmp.o$/;"	m
obj-y	board/zipitz2/Makefile	/^obj-y	:= zipitz2.o$/;"	m
obj-y	board/zyxel/nsa310s/Makefile	/^obj-y	:= nsa310s.o$/;"	m
obj-y	drivers/bios_emulator/Makefile	/^obj-y = atibios.o biosemu.o besys.o bios.o \\$/;"	m
obj-y	drivers/mtd/onenand/Makefile	/^obj-y				:= onenand_spl.o$/;"	m
obj-y	fs/cbfs/Makefile	/^obj-y	:= cbfs.o$/;"	m
obj-y	fs/cramfs/Makefile	/^obj-y := cramfs.o$/;"	m
obj-y	fs/ext4/Makefile	/^obj-y := ext4fs.o ext4_common.o dev.o$/;"	m
obj-y	fs/reiserfs/Makefile	/^obj-y := reiserfs.o dev.o mode_string.o$/;"	m
obj-y	fs/sandbox/Makefile	/^obj-y := sandboxfs.o$/;"	m
obj-y	fs/ubifs/Makefile	/^obj-y := ubifs.o io.o super.o sb.o master.o lpt.o$/;"	m
obj-y	fs/yaffs2/Makefile	/^obj-y := \\$/;"	m
obj-y	fs/zfs/Makefile	/^obj-y := dev.o zfs.o zfs_fletcher.o zfs_sha256.o zfs_lzjb.o$/;"	m
obj-y	post/lib_powerpc/fpu/Makefile	/^obj-y := $(objs-before-objcopy:.o=_.o)$/;"	m
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obj_id	fs/yaffs2/yaffs_guts.h	/^	u32 obj_id;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u32
obj_id	fs/yaffs2/yaffs_guts.h	/^	unsigned obj_id:18;$/;"	m	struct:yaffs_tags	typeref:typename:unsigned:18
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obj_id	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned obj_id:18;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:18
obj_id	fs/yaffs2/yaffs_packedtags2.h	/^	unsigned obj_id;$/;"	m	struct:yaffs_packed_tags2_tags_only	typeref:typename:unsigned
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objsection	tools/proftool.c	/^	struct objsection_info *objsection;$/;"	m	struct:func_info	typeref:struct:objsection_info *	file:
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objset_phys_t	include/zfs/dmu_objset.h	/^} objset_phys_t;$/;"	t	typeref:struct:objset_phys
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obr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 obr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
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oc_enable	drivers/usb/host/isp116x.h	/^	unsigned oc_enable:1;$/;"	m	struct:isp116x_platform_data	typeref:typename:unsigned:1
oc_pin	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t oc_pin;$/;"	m	struct:usb2_port_setting	typeref:typename:uint8_t
oc_pin	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t oc_pin;$/;"	m	struct:usb3_port_setting	typeref:typename:uint8_t
occr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 occr;		\/* output clock control Register *\/$/;"	m	struct:clk83xx	typeref:typename:u32
ocfar	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ocfar;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
och	arch/x86/include/asm/me_common.h	/^	u32 och:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
ocm	arch/arm/dts/zynq-zc702.dts	/^	ocm: sram@fffc0000 {$/;"	l
ocm_cfg	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 ocm_cfg; \/* 0x910 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
ocm_post_test	post/cpu/ppc4xx/ocm.c	/^int ocm_post_test(int flags)$/;"	f	typeref:typename:int
ocm_status_read	post/cpu/ppc4xx/ocm.c	/^static uint ocm_status_read(void)$/;"	f	typeref:typename:uint	file:
ocm_status_write	post/cpu/ppc4xx/ocm.c	/^static void ocm_status_write(uint value)$/;"	f	typeref:typename:void	file:
ocm_test_word	post/cpu/ppc4xx/ocm.c	/^static inline int ocm_test_word(uint value, uint *address)$/;"	f	typeref:typename:int	file:
ocmc0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ocmc0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ocmc0clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ocmc0clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ocmc1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ocmc1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ocmc1clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int ocmc1clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
ocmcram	arch/arm/dts/am33xx.dtsi	/^		ocmcram: ocmcram@40300000 {$/;"	l
ocmcram	arch/arm/dts/am4372.dtsi	/^		ocmcram: ocmcram@40300000 {$/;"	l
ocmcramclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int ocmcramclkctrl;	\/* offset 0x2c *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
ocmcramclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int ocmcramclkctrl;	\/* offset 0x50 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
ocmcsr	board/freescale/common/ngpixis.h	/^	u8 ocmcsr;$/;"	m	struct:ngpixis	typeref:typename:u8
ocmdr0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ocmdr0;		\/* On-Chip Memory Descriptor Register   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ocmdr3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 ocmdr3;		\/* On-Chip Memory Descriptor Register   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32
ocmmsg	board/freescale/common/ngpixis.h	/^	u8 ocmmsg;$/;"	m	struct:ngpixis	typeref:typename:u8
ocms	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 ocms;		\/* 0x38: OCMS Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
ocms_key1	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 ocms_key1;		\/* 0x3c: OCMS KEY1 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
ocms_key2	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 ocms_key2;		\/* 0x40: OCMS KEY2 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
ocnf	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_ocnf	ocnf;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_ocnf
ocotp	arch/arm/dts/imx6qdl.dtsi	/^			ocotp: ocotp@021bc000 {$/;"	l
ocotp	arch/arm/dts/imx6ull.dtsi	/^			ocotp: ocotp-ctrl@021bc000 {$/;"	l
ocotp_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct ocotp_regs {$/;"	s
ocotp_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct ocotp_regs {$/;"	s
ocotp_regs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct ocotp_regs {$/;"	s
ocotp_regs	drivers/misc/mxs_ocotp.c	/^static struct mxs_ocotp_regs *ocotp_regs =$/;"	v	typeref:struct:mxs_ocotp_regs *	file:
ocp2scp0	arch/arm/dts/am4372.dtsi	/^		ocp2scp0: ocp2scp@483a8000 {$/;"	l
ocp2scp1	arch/arm/dts/am4372.dtsi	/^		ocp2scp1: ocp2scp@483e8000 {$/;"	l
ocp_base	drivers/usb/eth/r8152.h	/^	u16 ocp_base;$/;"	m	struct:r8152	typeref:typename:u16
ocp_read_byte	drivers/usb/eth/r8152.c	/^u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)$/;"	f	typeref:typename:u8
ocp_read_dword	drivers/usb/eth/r8152.c	/^u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)$/;"	f	typeref:typename:u32
ocp_read_word	drivers/usb/eth/r8152.c	/^u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)$/;"	f	typeref:typename:u16
ocp_reg_read	drivers/usb/eth/r8152.c	/^u16 ocp_reg_read(struct r8152 *tp, u16 addr)$/;"	f	typeref:typename:u16
ocp_reg_write	drivers/usb/eth/r8152.c	/^void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)$/;"	f	typeref:typename:void
ocp_sysconfig	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ocp_sysconfig;$/;"	m	struct:dma4	typeref:typename:u32
ocp_write_byte	drivers/usb/eth/r8152.c	/^void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)$/;"	f	typeref:typename:void
ocp_write_dword	drivers/usb/eth/r8152.c	/^void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)$/;"	f	typeref:typename:void
ocp_write_word	drivers/usb/eth/r8152.c	/^void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)$/;"	f	typeref:typename:void
ocpw	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ocpw;$/;"	m	struct:gptmr	typeref:typename:u8
ocr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	ocr;		\/* 0x110 Oscillator Calibration Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
ocr	include/mmc.h	/^	uint ocr;$/;"	m	struct:mmc	typeref:typename:uint
ocr1	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 ocr1;$/;"	m	struct:gpio_regs	typeref:typename:u32
ocr2	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 ocr2;$/;"	m	struct:gpio_regs	typeref:typename:u32
ocram	arch/arm/dts/imx6dl.dtsi	/^		ocram: sram@00900000 {$/;"	l
ocram	arch/arm/dts/imx6q.dtsi	/^		ocram: sram@00900000 {$/;"	l
ocram	arch/arm/dts/imx6ull.dtsi	/^		ocram: sram@00905000 {$/;"	l
ocram	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	ocram;$/;"	m	struct:nic301_registers	typeref:typename:u32
ocram_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	ocram_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
ocram_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	ocram_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
ocram_wr_tidemark	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	ocram_wr_tidemark;		\/* 0x27040 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
ocrams	arch/arm/dts/imx6ull.dtsi	/^		ocrams: sram@00900000 {$/;"	l
ocrams_ddr	arch/arm/dts/imx6ull.dtsi	/^		ocrams_ddr: sram@00904000 {$/;"	l
ocsel	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ocsel;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
ocsel	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	ocsel;		\/* 04 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
octict	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 octict;$/;"	m	struct:gptmr	typeref:typename:u8
od	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 od:2;		\/* open-drain or push-pull driver   *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
odatr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odatr; \/* Outbound Destination Attributes Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
odatr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	odatr;		\/* 0xd301c - Outbound Destination Attributes Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
odc	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic odc;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
odcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odcr; \/* Outbound Doubleword Count Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
odcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	odcr;		\/* 0xd3020 - Outbound Doubleword Count Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
odd_field_first	drivers/video/ipu.h	/^	unsigned odd_field_first:1;$/;"	m	struct:__anon4a35f9fd0a08	typeref:typename:unsigned:1
oddatr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	oddatr; \/* Outbound Doorbell Destination AR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
oddatr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	oddatr;		\/* 0xd341C - Outbound Doorbell Destination Attributes Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
oddmr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	oddmr;		\/* 0xd3400 - Outbound Doorbell Mode Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
oddpr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	oddpr; \/* Outbound Doorbell Destination Port *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
oddpr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	oddpr;		\/* 0xd3418 - Outbound Doorbell Destination Port Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
oddretr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	oddretr; \/* Outbound Doorbell Retry Threshold CR *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
oddretr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	oddretr;	\/* 0xd342C - Outbound Doorbell Retry Threshold Configuration Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
oddsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	oddsr;		\/* 0xd3404 - Outbound Doorbell Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ode	include/mpc5xxx.h	/^	volatile u8 ode;		\/* WU_GPIO + 0x04 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
odmi	arch/arm/dts/armada-ap806.dtsi	/^			odmi: odmi@300000 {$/;"	l
odmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odmr; \/* Outbound Doorbell Mode Register *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
odpg_default_value	drivers/ddr/marvell/a38x/ddr3_training.c	/^static struct reg_data odpg_default_value[] = {$/;"	v	typeref:struct:reg_data[]	file:
odpr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odpr; \/* Outbound Destination Port Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
odpr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	odpr;		\/* 0xd3018 - Outbound Destination Port Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
odqdpar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odqdpar; \/* Outbound Descriptor Queue DPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
odqepar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odqepar; \/* Outbound Descriptor Queue EPAR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
odqhpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	odqhpar;	\/* 0xd3028 - Outbound Descriptor Queue Head Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
odqtpar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	odqtpar;	\/* 0xd300c - Outbound Descriptor Queue Tail Pointer Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
odr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	odr;		\/* 0x14 Output Disable Registerr *\/$/;"	m	struct:at91_port	typeref:typename:u32
odr	arch/m68k/include/asm/immap_520x.h	/^	u8 odr;			\/* 0x00 Output divider *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
odr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 odr;		\/* 0x60 Outbound doorbell register *\/$/;"	m	struct:dma83xx	typeref:typename:u32
odr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 odr;		\/* open drain register *\/$/;"	m	struct:gpio83xx	typeref:typename:u32
odr	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 odr;	\/* Open Drain *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
odr	drivers/gpio/stm32_gpio.c	/^	u32 odr;	\/* GPIO port output data *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
odroid_get_board_type	board/samsung/common/exynos5-dt-types.c	/^static int odroid_get_board_type(void)$/;"	f	typeref:typename:int	file:
odroid_get_rev	board/samsung/common/exynos5-dt-types.c	/^static unsigned int odroid_get_rev(void)$/;"	f	typeref:typename:unsigned int	file:
odroid_get_type_str	board/samsung/common/exynos5-dt-types.c	/^static const char *odroid_get_type_str(void)$/;"	f	typeref:typename:const char *	file:
odroid_info	board/samsung/common/exynos5-dt-types.c	/^struct odroid_rev_info odroid_info[] = {$/;"	v	typeref:struct:odroid_rev_info[]
odroid_rev_info	include/samsung/exynos5-dt-types.h	/^struct odroid_rev_info {$/;"	s
odsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	odsr;		\/* 0x38 Output Data Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
odsr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 odsr;		\/* 0x18 PIO Output Data Status Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
odsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	odsr; \/* Outbound Doorbell Status Register *\/$/;"	m	struct:rio_dbell	typeref:typename:u32
odt	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 odt;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
odt_additional	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 odt_additional = 1;$/;"	v	typeref:typename:u32
odt_config	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 odt_config = 1;$/;"	v	typeref:typename:u32
odt_config	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u32 odt_config[ODT_OPT] = {$/;"	v	typeref:typename:u32[]
odt_correction	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	s32 odt_correction;$/;"	m	struct:dram_para	typeref:typename:s32
odt_correction	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	s32 odt_correction;$/;"	m	struct:dram_para	typeref:typename:s32
odt_dynamic	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u16 odt_dynamic[ODT_OPT][MAX_CS] = {	\/*        NearEnd\/FarEnd *\/$/;"	v	typeref:typename:u16[][]
odt_en	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 odt_en;$/;"	m	struct:dram_para	typeref:typename:u32
odt_en	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 odt_en;$/;"	m	struct:dram_para	typeref:typename:u32
odt_en	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 odt_en;$/;"	m	struct:dram_para	typeref:typename:u32
odt_en	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 odt_en;$/;"	m	struct:dram_para	typeref:typename:u32
odt_rd_cfg	drivers/ddr/fsl/options.c	/^	unsigned int odt_rd_cfg;$/;"	m	struct:dynamic_odt	typeref:typename:unsigned int	file:
odt_rd_cfg	include/fsl_ddr_sdram.h	/^		unsigned int odt_rd_cfg;$/;"	m	struct:memctl_options_s::cs_local_opts_s	typeref:typename:unsigned int
odt_rd_mapcs0	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 odt_rd_mapcs0;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
odt_read	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 odt_read;		\/* 0xB4: EMC_ODT_READ *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
odt_rtt_norm	drivers/ddr/fsl/options.c	/^	unsigned int odt_rtt_norm;$/;"	m	struct:dynamic_odt	typeref:typename:unsigned int	file:
odt_rtt_norm	include/fsl_ddr_sdram.h	/^		unsigned int odt_rtt_norm;$/;"	m	struct:memctl_options_s::cs_local_opts_s	typeref:typename:unsigned int
odt_rtt_wr	drivers/ddr/fsl/options.c	/^	unsigned int odt_rtt_wr;$/;"	m	struct:dynamic_odt	typeref:typename:unsigned int	file:
odt_rtt_wr	include/fsl_ddr_sdram.h	/^		unsigned int odt_rtt_wr;$/;"	m	struct:memctl_options_s::cs_local_opts_s	typeref:typename:unsigned int
odt_static	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u16 odt_static[ODT_OPT][MAX_CS] = {	\/*        NearEnd\/FarEnd *\/$/;"	v	typeref:typename:u16[][]
odt_test	drivers/ddr/marvell/a38x/ddr3_training.c	/^static int odt_test(u32 dev_num, enum hws_algo_type algo_type)$/;"	f	typeref:typename:int	file:
odt_unknown	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt odt_unknown[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
odt_wr_cfg	drivers/ddr/fsl/options.c	/^	unsigned int odt_wr_cfg;$/;"	m	struct:dynamic_odt	typeref:typename:unsigned int	file:
odt_wr_cfg	include/fsl_ddr_sdram.h	/^		unsigned int odt_wr_cfg;$/;"	m	struct:memctl_options_s::cs_local_opts_s	typeref:typename:unsigned int
odt_wr_mapcs0	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 odt_wr_mapcs0;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
odt_write	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 odt_write;		\/* 0xB0: EMC_ODT_WRITE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 odtcfg;		\/* 0x240 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 odtcfg;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 odtcfg;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 odtcfg;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 odtcfg;		\/* 0x240 ODT configuration register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 odtcfg;		\/* 0x240 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 odtcfg;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 odtcfg;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 odtcfg;		\/* 0x7c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 odtcfg;		\/* 0x240 ODT configuration register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtcfg	drivers/ddr/microchip/ddr2_regs.h	/^	u32 odtcfg;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
odtcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 odtcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
odtcr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 odtcr;		\/* 0x98 odt configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 odtcr;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 odtcr;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 odtcr;		\/* 0xac ODT configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 odtcr;		\/* 0x98 odt configuration register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 odtcr;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 odtcr;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
odtcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 odtcr;		\/* 0xac ODT configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
odtcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	odtcr;		\/* ODT Configuration *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
odtencfg	drivers/ddr/microchip/ddr2_regs.h	/^	u32 odtencfg;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
odtmap	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 odtmap;		\/* 0x244 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 odtmap;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 odtmap;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 odtmap;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 odtmap;		\/* 0x244 ODT\/rank map register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 odtmap;		\/* 0x244 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 odtmap;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 odtmap;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 odtmap;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
odtmap	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 odtmap;		\/* 0x244 ODT\/rank map register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
oe	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int oe;		\/* 0x34 *\/$/;"	m	struct:gpio	typeref:typename:unsigned int
oe	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 oe;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
oe	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 oe;$/;"	m	struct:kwgpio_registers	typeref:typename:u32
oe	drivers/gpio/74x164_gpio.c	/^	struct gpio_desc oe;$/;"	m	struct:gen_74x164_priv	typeref:struct:gpio_desc	file:
oem_defined	include/smbios.h	/^	u32 oem_defined;$/;"	m	struct:smbios_type3	typeref:typename:u32
oem_id	arch/x86/include/asm/acpi_table.h	/^	char oem_id[6];		\/* OEM ID *\/$/;"	m	struct:acpi_rsdp	typeref:typename:char[6]
oem_id	arch/x86/include/asm/acpi_table.h	/^	char oem_id[6];		\/* OEM identification *\/$/;"	m	struct:acpi_table_header	typeref:typename:char[6]
oem_id	arch/x86/include/asm/sfi.h	/^	char	oem_id[SFI_OEM_ID_SIZE];$/;"	m	struct:sfi_table_header	typeref:typename:char[]
oem_revision	arch/x86/include/asm/acpi_table.h	/^	u32 oem_revision;	\/* OEM revision number *\/$/;"	m	struct:acpi_table_header	typeref:typename:u32
oem_revision	arch/x86/include/asm/sfi.h	/^	uint32_t oem_revision;$/;"	m	struct:sfi_xsdt_header	typeref:typename:uint32_t
oem_string_ptr	include/vbe.h	/^	u32 oem_string_ptr;$/;"	m	struct:vbe_info	typeref:typename:u32
oem_table_id	arch/x86/include/asm/acpi_table.h	/^	char oem_table_id[8];	\/* OEM table identification *\/$/;"	m	struct:acpi_table_header	typeref:typename:char[8]
oem_table_id	arch/x86/include/asm/sfi.h	/^	char	oem_table_id[SFI_OEM_TABLE_ID_SIZE];$/;"	m	struct:sfi_table_header	typeref:typename:char[]
oem_uid	include/fsl_sfp.h	/^	u32 oem_uid;		\/* 0x274 OEM UID 0*\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid	include/fsl_sfp.h	/^	u32 oem_uid;		\/* 0x9c OEM Unique ID *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid	include/fsl_sfp.h	/^	u32 oem_uid;	\/* 0x9c  OEM Unique ID *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid_0	include/fsl_validate.h	/^	u32 oem_uid_0;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
oem_uid_1	include/fsl_sfp.h	/^	u32 oem_uid_1;		\/* 0x278 OEM UID 1*\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid_1	include/fsl_validate.h	/^	u32 oem_uid_1;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
oem_uid_2	include/fsl_sfp.h	/^	u32 oem_uid_2;		\/* 0x27c OEM UID 2*\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid_2	include/fsl_validate.h	/^	u32 oem_uid_2;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
oem_uid_3	include/fsl_sfp.h	/^	u32 oem_uid_3;		\/* 0x280 OEM UID 3*\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid_3	include/fsl_validate.h	/^	u32 oem_uid_3;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
oem_uid_4	include/fsl_sfp.h	/^	u32 oem_uid_4;		\/* 0x284 OEM UID 4*\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
oem_uid_4	include/fsl_validate.h	/^	u32 oem_uid_4;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
oem_version	include/vbe.h	/^	u16 oem_version;$/;"	m	struct:vbe_info	typeref:typename:u16
oep	include/usb/fotg210.h	/^	uint32_t oep[8]; \/* 0x180 - 0x19f: OUT Endpoint Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[8]
oep0cfg	arch/m68k/include/asm/immap_5275.h	/^	u32 oep0cfg;$/;"	m	struct:usb	typeref:typename:u32
oer	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	oer;		\/* 0x10 Output Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
of_bus	common/fdt_support.c	/^struct of_bus {$/;"	s	file:
of_bus_default_count_cells	common/fdt_support.c	/^void of_bus_default_count_cells(const void *blob, int parentoffset,$/;"	f	typeref:typename:void
of_bus_default_map	common/fdt_support.c	/^static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range,$/;"	f	typeref:typename:u64	file:
of_bus_default_translate	common/fdt_support.c	/^static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na)$/;"	f	typeref:typename:int	file:
of_bus_isa_count_cells	common/fdt_support.c	/^static void of_bus_isa_count_cells(const void *blob, int parentoffset,$/;"	f	typeref:typename:void	file:
of_bus_isa_map	common/fdt_support.c	/^static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t *range,$/;"	f	typeref:typename:u64	file:
of_bus_isa_match	common/fdt_support.c	/^static int of_bus_isa_match(const void *blob, int parentoffset)$/;"	f	typeref:typename:int	file:
of_bus_isa_translate	common/fdt_support.c	/^static int of_bus_isa_translate(fdt32_t *addr, u64 offset, int na)$/;"	f	typeref:typename:int	file:
of_busses	common/fdt_support.c	/^static struct of_bus of_busses[] = {$/;"	v	typeref:struct:of_bus[]	file:
of_device_is_compatible	drivers/core/device.c	/^bool of_device_is_compatible(struct udevice *dev, const char *compat)$/;"	f	typeref:typename:bool
of_dump_addr	common/fdt_support.c	/^static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { }$/;"	f	typeref:typename:void	file:
of_dump_addr	common/fdt_support.c	/^static void of_dump_addr(const char *s, const fdt32_t *addr, int na)$/;"	f	typeref:typename:void	file:
of_machine_is_compatible	drivers/core/device.c	/^bool of_machine_is_compatible(const char *compat)$/;"	f	typeref:typename:bool
of_match	include/dm/device.h	/^	const struct udevice_id *of_match;$/;"	m	struct:driver	typeref:typename:const struct udevice_id *
of_match_bus	common/fdt_support.c	/^static struct of_bus *of_match_bus(const void *blob, int parentoffset)$/;"	f	typeref:struct:of_bus *	file:
of_match_ptr	include/dm/device.h	/^#define of_match_ptr(/;"	d
of_node	include/linux/mtd/partitions.h	/^	struct device_node *of_node;$/;"	m	struct:mtd_part_parser_data	typeref:struct:device_node *
of_offset	include/dm/device.h	/^	int of_offset;$/;"	m	struct:udevice	typeref:typename:int
of_plat	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct dtd_rockchip_rk3288_dmc of_plat;$/;"	m	struct:rk3288_sdram_params	typeref:struct:dtd_rockchip_rk3288_dmc	file:
of_read_number	include/fdt_support.h	/^static inline u64 of_read_number(const fdt32_t *cell, int size)$/;"	f	typeref:typename:u64
of_translate_one	common/fdt_support.c	/^static int of_translate_one(const void *blob, int parent, struct of_bus *bus,$/;"	f	typeref:typename:int	file:
of_xlate	include/clk-uclass.h	/^	int (*of_xlate)(struct clk *clock,$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * clock,struct fdtdec_phandle_args * args)
of_xlate	include/mailbox-uclass.h	/^	int (*of_xlate)(struct mbox_chan *chan,$/;"	m	struct:mbox_ops	typeref:typename:int (*)(struct mbox_chan * chan,struct fdtdec_phandle_args * args)
of_xlate	include/power-domain-uclass.h	/^	int (*of_xlate)(struct power_domain *power_domain,$/;"	m	struct:power_domain_ops	typeref:typename:int (*)(struct power_domain * power_domain,struct fdtdec_phandle_args * args)
of_xlate	include/reset-uclass.h	/^	int (*of_xlate)(struct reset_ctl *reset_ctl,$/;"	m	struct:reset_ops	typeref:typename:int (*)(struct reset_ctl * reset_ctl,struct fdtdec_phandle_args * args)
ofdata_to_platdata	include/dm/device.h	/^	int (*ofdata_to_platdata)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
off	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint off;$/;"	m	struct:__anon7d79ed4b0108	typeref:typename:uint	file:
off	cmd/led.c	/^	void		(*off)(void);	\/* Optional function for turning LED off *\/$/;"	m	struct:led_tbl_s	typeref:typename:void (*)(void)	file:
off	drivers/mtd/spi/sandbox.c	/^	uint off;$/;"	m	struct:sandbox_spi_flash	typeref:typename:uint	file:
off	drivers/net/phy/micrel.c	/^	const u8	off;	\/* Offset from bit 0 *\/$/;"	m	struct:ksz90x1_reg_field	typeref:typename:const u8	file:
off	include/ec_commands.h	/^		} dump, off, on, init, get_seq, get_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::__anon71a6b2670208
off	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
off	include/power-domain-uclass.h	/^	int (*off)(struct power_domain *power_domain);$/;"	m	struct:power_domain_ops	typeref:typename:int (*)(struct power_domain * power_domain)
off_dt_strings	include/fdt.h	/^	fdt32_t off_dt_strings;		 \/* offset to strings *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
off_dt_struct	include/fdt.h	/^	fdt32_t off_dt_struct;		 \/* offset to structure *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
off_mem_rsvmap	include/fdt.h	/^	fdt32_t off_mem_rsvmap;		 \/* offset to memory reserve map *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
off_t	include/linux/types.h	/^typedef __kernel_off_t		off_t;$/;"	t	typeref:typename:__kernel_off_t
offs	fs/ubifs/replay.c	/^	int offs;$/;"	m	struct:replay_entry	typeref:typename:int	file:
offs	fs/ubifs/ubifs-media.h	/^	__le32 offs;$/;"	m	struct:ubifs_branch	typeref:typename:__le32
offs	fs/ubifs/ubifs-media.h	/^	__le32 offs;$/;"	m	struct:ubifs_ref_node	typeref:typename:__le32
offs	fs/ubifs/ubifs.h	/^	int offs;$/;"	m	struct:ubifs_nbranch	typeref:typename:int
offs	fs/ubifs/ubifs.h	/^	int offs;$/;"	m	struct:ubifs_old_idx	typeref:typename:int
offs	fs/ubifs/ubifs.h	/^	int offs;$/;"	m	struct:ubifs_scan_node	typeref:typename:int
offs	fs/ubifs/ubifs.h	/^	int offs;$/;"	m	struct:ubifs_wbuf	typeref:typename:int
offs	fs/ubifs/ubifs.h	/^	int offs;$/;"	m	struct:ubifs_zbranch	typeref:typename:int
offs	fs/ubifs/ubifs.h	/^	int offs;$/;"	m	struct:ubifs_znode	typeref:typename:int
offs	include/linux/mtd/bbm.h	/^	int offs;$/;"	m	struct:nand_bbt_descr	typeref:typename:int
offscreen_mem_offset	include/vbe.h	/^	u32 offscreen_mem_offset;$/;"	m	struct:vesa_mode_info	typeref:typename:u32
offscreen_mem_size	include/vbe.h	/^	u16 offscreen_mem_size;$/;"	m	struct:vesa_mode_info	typeref:typename:u16
offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^			u32 offset;	\/* divider register offset *\/$/;"	m	struct:bcm_clk_div::__anona6938245010a::__anona69382450208	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 offset;		\/* gate register offset *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 offset;		\/* selector register offset *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 offset;		\/* trigger register offset *\/$/;"	m	struct:bcm_clk_trig	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^			u32 offset;	\/* divider register offset *\/$/;"	m	struct:bcm_clk_div::__anone9f7c086010a::__anone9f7c0860208	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 offset;		\/* gate register offset *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 offset;		\/* selector register offset *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 offset;		\/* trigger register offset *\/$/;"	m	struct:bcm_clk_trig	typeref:typename:u32
offset	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^	u32 offset;$/;"	m	struct:fsm_reg_vals	typeref:typename:u32
offset	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	uint16_t offset;$/;"	m	struct:smmu_stream_id	typeref:typename:uint16_t
offset	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^	u16 offset;$/;"	m	struct:pad_conf_entry	typeref:typename:u16
offset	arch/arm/include/asm/arch-omap5/sys_proto.h	/^	u16 offset;$/;"	m	struct:iodelay_cfg_entry	typeref:typename:u16
offset	arch/arm/include/asm/arch-omap5/sys_proto.h	/^	u32 offset;$/;"	m	struct:pad_conf_entry	typeref:typename:u32
offset	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 offset;$/;"	m	struct:de_bld::__anon5efd7b530108	typeref:typename:u32
offset	arch/arm/include/asm/arch/display2.h	/^		u32 offset;$/;"	m	struct:de_bld::__anon279c75ef0108	typeref:typename:u32
offset	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 offset;$/;"	m	struct:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a::__anon775fc5443c08	typeref:typename:u32
offset	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 offset;$/;"	m	struct:bcm2835_mbox_tag_test_palette::__anon775fc544380a::__anon775fc5443908	typeref:typename:u32
offset	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int offset;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:unsigned int
offset	arch/blackfin/cpu/gpio.c	/^	unsigned short offset;$/;"	m	struct:__anonb4c211320208	typeref:typename:unsigned short	file:
offset	arch/openrisc/include/asm/ptrace.h	/^			long offset[2];$/;"	m	struct:pt_regs::__anoneee9473c010a::__anoneee9473c0308	typeref:typename:long[2]
offset	arch/x86/include/asm/gpio.h	/^	int offset;$/;"	m	struct:ich6_bank_platdata	typeref:typename:int
offset	arch/x86/include/asm/mrccache.h	/^	u32	offset;$/;"	m	struct:mrc_region	typeref:typename:u32
offset	arch/x86/lib/bios.h	/^	u16 offset, cs;$/;"	m	struct:realmode_idt	typeref:typename:u16
offset	board/cm5200/cm5200.h	/^	unsigned int offset;$/;"	m	struct:__anonb595836f0208	typeref:typename:unsigned int
offset	board/mpl/pati/pci_eeprom.h	/^	unsigned short offset;$/;"	m	struct:pci_eeprom_t	typeref:typename:unsigned short
offset	board/nokia/rx51/tag_omap.h	/^	unsigned int offset;$/;"	m	struct:omap_partition_config	typeref:typename:unsigned int
offset	cmd/armflash.c	/^	u32 offset;$/;"	m	struct:afs_region	typeref:typename:u32	file:
offset	cmd/pci.c	/^	u8 offset;$/;"	m	struct:pci_reg_info	typeref:typename:u8	file:
offset	common/iotrace.c	/^	ulong offset;$/;"	m	struct:iotrace	typeref:typename:ulong	file:
offset	drivers/ddr/fsl/interactive.c	/^	size_t offset;$/;"	m	struct:options_string	typeref:typename:size_t	file:
offset	drivers/gpio/intel_broadwell_gpio.c	/^	int offset;$/;"	m	struct:broadwell_bank_priv	typeref:typename:int	file:
offset	drivers/gpio/tegra186_gpio.c	/^	uint32_t offset;$/;"	m	struct:tegra186_gpio_port_data	typeref:typename:uint32_t	file:
offset	drivers/mtd/mtdpart.c	/^	uint64_t offset;$/;"	m	struct:mtd_part	typeref:typename:uint64_t	file:
offset	drivers/net/ax88180.c	/^		unsigned short offset, value;$/;"	m	struct:ax88180_mac_reset::__anona90e765c0108	typeref:typename:unsigned short	file:
offset	drivers/net/ne2000.c	/^		u_char value, offset;$/;"	m	struct:get_prom::__anon6de001af0108	typeref:typename:u_char	file:
offset	drivers/net/ne2000_base.h	/^	u32 offset;$/;"	m	struct:hw_info_t	typeref:typename:u32
offset	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	const unsigned int	offset;$/;"	m	struct:exynos_pinctrl_config_data	typeref:typename:const unsigned int
offset	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	u32		offset;$/;"	m	struct:samsung_pin_bank_data	typeref:typename:u32
offset	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	s16 offset;$/;"	m	struct:rockchip_iomux	typeref:typename:s16	file:
offset	drivers/rtc/i2c_rtc_emul.c	/^	long offset;$/;"	m	struct:sandbox_i2c_rtc_plat_data	typeref:typename:long	file:
offset	drivers/spi/ich.h	/^	uint32_t offset;$/;"	m	struct:spi_trans	typeref:typename:uint32_t
offset	drivers/usb/musb-new/musb_host.h	/^	unsigned		offset;		\/* in urb->transfer_buffer *\/$/;"	m	struct:musb_qh	typeref:typename:unsigned
offset	drivers/usb/phy/rockchip_usb2_phy.c	/^	unsigned int offset;$/;"	m	struct:usb2phy_reg	typeref:typename:unsigned int	file:
offset	drivers/video/fsl_diu_fb.c	/^	unsigned int offset;	\/* Alignment offset *\/$/;"	m	struct:diu_addr	typeref:typename:unsigned int	file:
offset	fs/jffs2/jffs2_nand_private.h	/^	u32 offset;	\/* physical offset to beginning of real dirent *\/$/;"	m	struct:b_dirent	typeref:typename:u32
offset	fs/jffs2/jffs2_nand_private.h	/^	u32 offset;	\/* physical offset to beginning of real inode *\/$/;"	m	struct:b_inode	typeref:typename:u32
offset	fs/jffs2/jffs2_private.h	/^	u32 offset;$/;"	m	struct:b_node	typeref:typename:u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* offset of the summary node in the jeb *\/$/;"	m	struct:jffs2_sum_marker	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* offset on jeb *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* offset on jeb *\/$/;"	m	struct:jffs2_sum_inode_flash	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* offset on jeb *\/$/;"	m	struct:jffs2_sum_inode_mem	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* offset on jeb *\/$/;"	m	struct:jffs2_sum_xattr_flash	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* offset on jeb *\/$/;"	m	struct:jffs2_sum_xref_flash	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;	\/* ofset on jeb *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;$/;"	m	struct:jffs2_sum_xattr_mem	typeref:typename:__u32
offset	fs/jffs2/summary.h	/^	__u32 offset;$/;"	m	struct:jffs2_sum_xref_mem	typeref:typename:__u32
offset	fs/yaffs2/yaffsfs.c	/^	int offset:20;$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:typename:int:20	file:
offset	include/asm-generic/gpio.h	/^	uint offset;		\/* GPIO offset within the device *\/$/;"	m	struct:gpio_desc	typeref:typename:uint
offset	include/cavium/atf_part.h	/^	unsigned long offset;$/;"	m	struct:storage_partition	typeref:typename:unsigned long
offset	include/cbfs.h	/^	u32 offset;$/;"	m	struct:cbfs_fileheader	typeref:typename:u32
offset	include/cbfs.h	/^	u32 offset;$/;"	m	struct:cbfs_header	typeref:typename:u32
offset	include/cramfs/cramfs_fs.h	/^	u32 namelen:CRAMFS_NAMELEN_WIDTH, offset:CRAMFS_OFFSET_WIDTH;$/;"	m	struct:cramfs_inode	typeref:typename:u32
offset	include/dfu.h	/^	u64 offset;$/;"	m	struct:dfu_entity	typeref:typename:u64
offset	include/ec_commands.h	/^	uint32_t offset;         \/* Offset in flash to hash *\/$/;"	m	struct:ec_params_vboot_hash	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;         \/* Offset in flash which was hashed *\/$/;"	m	struct:ec_response_vboot_hash	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;   \/* Byte offset to erase *\/$/;"	m	struct:ec_params_flash_erase	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;   \/* Byte offset to read *\/$/;"	m	struct:ec_params_flash_read	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;   \/* Byte offset to read *\/$/;"	m	struct:ec_params_pstore_read	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;   \/* Byte offset to write *\/$/;"	m	struct:ec_params_flash_write	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;   \/* Byte offset to write *\/$/;"	m	struct:ec_params_pstore_write	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;   \/* Starting value for read buffer *\/$/;"	m	struct:ec_params_read_test	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint32_t offset;$/;"	m	struct:ec_response_flash_region_info	typeref:typename:uint32_t
offset	include/ec_commands.h	/^	uint8_t offset;   \/* Offset in memmap (EC_MEMMAP_*) *\/$/;"	m	struct:ec_params_read_memmap	typeref:typename:uint8_t
offset	include/ec_commands.h	/^	uint8_t offset;$/;"	m	struct:ec_params_i2c_read	typeref:typename:uint8_t
offset	include/ec_commands.h	/^	uint8_t offset;$/;"	m	struct:ec_params_i2c_write	typeref:typename:uint8_t
offset	include/fdtdec.h	/^	uint32_t offset;$/;"	m	struct:fmap_entry	typeref:typename:uint32_t
offset	include/fsl_devdis.h	/^	u32 offset;$/;"	m	struct:devdis_table	typeref:typename:u32
offset	include/jffs2/jffs2.h	/^	__u32 offset;     \/* Where to begin to write.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
offset	include/jffs2/load_kernel.h	/^	u64 offset;			\/* offset within device *\/$/;"	m	struct:part_info	typeref:typename:u64
offset	include/libfdt.h	/^	int offset;		\/* Offset of node *\/$/;"	m	struct:fdt_subnode_stack	typeref:typename:int
offset	include/libfdt.h	/^	int offset;$/;"	m	struct:fdt_region	typeref:typename:int
offset	include/linux/apm_bios.h	/^	__u32	offset;$/;"	m	struct:apm_bios_info	typeref:typename:__u32
offset	include/linux/ethtool.h	/^	__u32	offset; \/* in bytes *\/$/;"	m	struct:ethtool_eeprom	typeref:typename:__u32
offset	include/linux/fb.h	/^	__u32 offset;			\/* beginning of bitfield	*\/$/;"	m	struct:fb_bitfield	typeref:typename:__u32
offset	include/linux/fb.h	/^	u32 offset;		\/* current offset to buffer		*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
offset	include/linux/mtd/fsmc_nand.h	/^	u32 offset;$/;"	m	struct:fsmc_nand_eccplace	typeref:typename:u32
offset	include/linux/mtd/mtd.h	/^	uint64_t offset;		\/* At which this region starts, from the beginning of the MTD *\/$/;"	m	struct:mtd_erase_region_info	typeref:typename:uint64_t
offset	include/linux/mtd/partitions.h	/^	uint64_t offset;		\/* offset within the master MTD space *\/$/;"	m	struct:mtd_partition	typeref:typename:uint64_t
offset	include/mtd/mtd-abi.h	/^	__u32 offset;		\/* At which this region starts,$/;"	m	struct:region_info_user	typeref:typename:__u32
offset	include/mtd/mtd-abi.h	/^	__u32 offset;$/;"	m	struct:nand_oobfree	typeref:typename:__u32
offset	include/nand.h	/^	loff_t offset;		\/* first address in NAND to erase *\/$/;"	m	struct:nand_erase_options	typeref:typename:loff_t
offset	include/qfw.h	/^			__le32 offset;$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0508	typeref:typename:__le32
offset	include/qfw.h	/^			__le32 offset;$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0608	typeref:typename:__le32
offset	include/splash.h	/^	u32 offset;	\/* offset from start of storage *\/$/;"	m	struct:splash_location	typeref:typename:u32
offset	include/trace.h	/^	uint32_t offset;		\/* Function offset into code *\/$/;"	m	struct:trace_output_func	typeref:typename:uint32_t
offset	include/zfs_common.h	/^	uint64_t offset;$/;"	m	struct:zfs_file	typeref:typename:uint64_t
offset	lib/efi_loader/efi_disk.c	/^	lbaint_t offset;$/;"	m	struct:efi_disk_obj	typeref:typename:lbaint_t	file:
offset	lib/efi_loader/efi_runtime.c	/^	ulong *offset;$/;"	m	struct:elf_rel	typeref:typename:ulong *	file:
offset	lib/efi_loader/efi_runtime.c	/^	ulong *offset;$/;"	m	struct:elf_rela	typeref:typename:ulong *	file:
offset	lib/zlib/inflate.h	/^    unsigned offset;            \/* distance back to copy string from *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
offset	post/lib_powerpc/load.c	/^    ulong offset;$/;"	m	struct:cpu_post_load_s	typeref:typename:ulong	file:
offset	post/lib_powerpc/store.c	/^    ulong offset;$/;"	m	struct:cpu_post_store_s	typeref:typename:ulong	file:
offset	scripts/kconfig/expr.h	/^	size_t offset;$/;"	m	struct:jump_key	typeref:typename:size_t
offset	tools/kwbimage.h	/^	uint32_t              offset;$/;"	m	struct:ext_hdr_v0	typeref:typename:uint32_t
offset	tools/proftool.c	/^	unsigned long offset;$/;"	m	struct:func_info	typeref:typename:unsigned long	file:
offset_in	drivers/net/fm/fm.h	/^	u16 offset_in;$/;"	m	struct:fm_port_qd	typeref:typename:u16
offset_len	drivers/misc/i2c_eeprom_emul.c	/^	int offset_len;		\/* Length of an offset in bytes *\/$/;"	m	struct:sandbox_i2c_flash_plat_data	typeref:typename:int	file:
offset_len	include/i2c.h	/^	uint offset_len;$/;"	m	struct:dm_i2c_chip	typeref:typename:uint
offset_out	drivers/net/fm/fm.h	/^	u16 offset_out;$/;"	m	struct:fm_port_qd	typeref:typename:u16
offset_secs	drivers/rtc/i2c_rtc_emul.c	/^	unsigned int offset_secs;$/;"	m	struct:sandbox_i2c_rtc	typeref:typename:unsigned int	file:
offset_to_barnum	drivers/misc/swap_case.c	/^#define offset_to_barnum(/;"	d	file:
offset_v1	fs/reiserfs/reiserfs_private.h	/^struct offset_v1$/;"	s
offset_v2	fs/reiserfs/reiserfs_private.h	/^    struct offset_v2 offset_v2;$/;"	m	union:__anona10af8d2010a	typeref:struct:offset_v2
offset_v2	fs/reiserfs/reiserfs_private.h	/^struct offset_v2 {$/;"	s
offset_v2_esafe_overlay	fs/reiserfs/reiserfs_private.h	/^} __attribute__ ((__packed__)) offset_v2_esafe_overlay;$/;"	t	typeref:union:__anona10af8d2010a
offset_v2_k_offset	fs/reiserfs/reiserfs_private.h	/^# define offset_v2_k_offset(/;"	d
offset_v2_k_offset	fs/reiserfs/reiserfs_private.h	/^static inline loff_t offset_v2_k_offset( const struct offset_v2 *v2 )$/;"	f	typeref:typename:loff_t
offset_v2_k_type	fs/reiserfs/reiserfs_private.h	/^# define offset_v2_k_type(/;"	d
offset_v2_k_type	fs/reiserfs/reiserfs_private.h	/^static inline __u16 offset_v2_k_type( const struct offset_v2 *v2 )$/;"	f	typeref:typename:__u16
offset_xyd	drivers/video/fsl_diu_fb.c	/^	__le32 offset_xyd;$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
offset_xyi	drivers/video/fsl_diu_fb.c	/^	__le32 offset_xyi;$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
offsetof	include/linux/stddef.h	/^#define offsetof(/;"	d
offsetof	scripts/kconfig/list.h	/^#define offsetof(/;"	d
ofs	drivers/soc/keystone/keystone_serdes.c	/^	u32 ofs;$/;"	m	struct:serdes_cfg	typeref:typename:u32	file:
ofs0	drivers/video/mx3fb.c	/^	u32	ofs0:5;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:5	file:
ofs1	drivers/video/mx3fb.c	/^	u32	ofs1:5;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:5	file:
ofs2	drivers/video/mx3fb.c	/^	u32	ofs2:5;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:5	file:
ofs3	drivers/video/mx3fb.c	/^	u32	ofs3:5;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:5	file:
ohci	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^typedef struct ohci {$/;"	s
ohci	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^typedef struct ohci {$/;"	s
ohci	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^typedef struct ohci {$/;"	s
ohci	drivers/usb/host/ohci-generic.c	/^	ohci_t ohci;$/;"	m	struct:generic_ohci	typeref:typename:ohci_t	file:
ohci	drivers/usb/host/ohci-s3c24xx.h	/^struct ohci {$/;"	s
ohci	drivers/usb/host/ohci-sunxi.c	/^	ohci_t ohci;$/;"	m	struct:ohci_sunxi_priv	typeref:typename:ohci_t	file:
ohci	drivers/usb/host/ohci.h	/^typedef struct ohci {$/;"	s
ohci0	arch/arm/dts/sun4i-a10.dtsi	/^		ohci0: usb@01c14400 {$/;"	l
ohci0	arch/arm/dts/sun5i.dtsi	/^		ohci0: usb@01c14400 {$/;"	l
ohci0	arch/arm/dts/sun6i-a31.dtsi	/^		ohci0: usb@01c1a400 {$/;"	l
ohci0	arch/arm/dts/sun7i-a20.dtsi	/^		ohci0: usb@01c14400 {$/;"	l
ohci0	arch/arm/dts/sun8i-a23-a33.dtsi	/^		ohci0: usb@01c1a400 {$/;"	l
ohci0	arch/arm/dts/sun8i-a83t.dtsi	/^		ohci0: usb@01c1a400 {$/;"	l
ohci0	arch/arm/dts/sun9i-a80.dtsi	/^		ohci0: usb@00a00400 {$/;"	l
ohci1	arch/arm/dts/sun4i-a10.dtsi	/^		ohci1: usb@01c1c400 {$/;"	l
ohci1	arch/arm/dts/sun50i-a64.dtsi	/^		ohci1: usb@01c1b400 {$/;"	l
ohci1	arch/arm/dts/sun6i-a31.dtsi	/^		ohci1: usb@01c1b400 {$/;"	l
ohci1	arch/arm/dts/sun7i-a20.dtsi	/^		ohci1: usb@01c1c400 {$/;"	l
ohci1	arch/arm/dts/sun8i-h3.dtsi	/^		ohci1: usb@01c1b400 {$/;"	l
ohci2	arch/arm/dts/sun6i-a31.dtsi	/^		ohci2: usb@01c1c400 {$/;"	l
ohci2	arch/arm/dts/sun8i-h3.dtsi	/^		ohci2: usb@01c1c400 {$/;"	l
ohci2	arch/arm/dts/sun9i-a80.dtsi	/^		ohci2: usb@00a02400 {$/;"	l
ohci3	arch/arm/dts/sun8i-h3.dtsi	/^		ohci3: usb@01c1d400 {$/;"	l
ohci_alloc_urb	drivers/usb/host/ohci-hcd.c	/^static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:urb_priv_t *	file:
ohci_clk	arch/arm/dts/at91sam9260.dtsi	/^					ohci_clk: ohci_clk {$/;"	l
ohci_clk	arch/arm/dts/at91sam9261.dtsi	/^					ohci_clk: ohci_clk {$/;"	l
ohci_clk	arch/arm/dts/at91sam9263.dtsi	/^					ohci_clk: ohci_clk {$/;"	l
ohci_cpu_to_le16	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define ohci_cpu_to_le16(/;"	d	file:
ohci_cpu_to_le16	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define ohci_cpu_to_le16(/;"	d	file:
ohci_cpu_to_le32	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define ohci_cpu_to_le32(/;"	d	file:
ohci_cpu_to_le32	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define ohci_cpu_to_le32(/;"	d	file:
ohci_create_int_queue	drivers/usb/host/ohci-hcd.c	/^static struct int_queue *ohci_create_int_queue(struct udevice *dev,$/;"	f	typeref:struct:int_queue *	file:
ohci_deregister	drivers/usb/host/ohci-hcd.c	/^int ohci_deregister(struct udevice *dev)$/;"	f	typeref:typename:int
ohci_destroy_int_queue	drivers/usb/host/ohci-hcd.c	/^static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ohci_dev	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^struct ohci_device ohci_dev;$/;"	v	typeref:struct:ohci_device
ohci_dev	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^struct ohci_device ohci_dev;$/;"	v	typeref:struct:ohci_device
ohci_dev	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^struct ohci_device ohci_dev;$/;"	v	typeref:struct:ohci_device
ohci_dev	drivers/usb/host/ohci-s3c24xx.c	/^struct ohci_device ohci_dev;$/;"	v	typeref:struct:ohci_device
ohci_dev_t	drivers/usb/host/ohci.h	/^} ohci_dev_t;$/;"	t	typeref:struct:ohci_device
ohci_device	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^struct ohci_device {$/;"	s
ohci_device	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^struct ohci_device {$/;"	s
ohci_device	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^struct ohci_device {$/;"	s
ohci_device	drivers/usb/host/ohci-s3c24xx.h	/^struct ohci_device {$/;"	s
ohci_device	drivers/usb/host/ohci.h	/^typedef struct ohci_device {$/;"	s
ohci_dump	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void ohci_dump (ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void ohci_dump (ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void ohci_dump (ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump	drivers/usb/host/ohci-hcd.c	/^static void ohci_dump(ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump	drivers/usb/host/ohci-s3c24xx.c	/^static void ohci_dump(struct ohci *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump_intr_mask	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void ohci_dump_intr_mask (char *label, __u32 mask)$/;"	f	typeref:typename:void	file:
ohci_dump_intr_mask	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void ohci_dump_intr_mask (char *label, __u32 mask)$/;"	f	typeref:typename:void	file:
ohci_dump_intr_mask	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void ohci_dump_intr_mask (char *label, __u32 mask)$/;"	f	typeref:typename:void	file:
ohci_dump_intr_mask	drivers/usb/host/ohci-hcd.c	/^static void ohci_dump_intr_mask(char *label, __u32 mask)$/;"	f	typeref:typename:void	file:
ohci_dump_intr_mask	drivers/usb/host/ohci-s3c24xx.c	/^static void ohci_dump_intr_mask(char *label, __u32 mask)$/;"	f	typeref:typename:void	file:
ohci_dump_roothub	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void ohci_dump_roothub (ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump_roothub	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void ohci_dump_roothub (ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump_roothub	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void ohci_dump_roothub (ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump_roothub	drivers/usb/host/ohci-hcd.c	/^static void ohci_dump_roothub(ohci_t *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump_roothub	drivers/usb/host/ohci-s3c24xx.c	/^static void ohci_dump_roothub(struct ohci *controller, int verbose)$/;"	f	typeref:typename:void	file:
ohci_dump_status	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void ohci_dump_status (ohci_t *controller)$/;"	f	typeref:typename:void	file:
ohci_dump_status	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void ohci_dump_status (ohci_t *controller)$/;"	f	typeref:typename:void	file:
ohci_dump_status	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void ohci_dump_status (ohci_t *controller)$/;"	f	typeref:typename:void	file:
ohci_dump_status	drivers/usb/host/ohci-hcd.c	/^static void ohci_dump_status(ohci_t *controller)$/;"	f	typeref:typename:void	file:
ohci_dump_status	drivers/usb/host/ohci-s3c24xx.c	/^static void ohci_dump_status(struct ohci *controller)$/;"	f	typeref:typename:void	file:
ohci_get_ohci_dev	drivers/usb/host/ohci-hcd.c	/^static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)$/;"	f	typeref:typename:ohci_dev_t *	file:
ohci_hcca	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^struct ohci_hcca {$/;"	s
ohci_hcca	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^struct ohci_hcca {$/;"	s
ohci_hcca	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^struct ohci_hcca {$/;"	s
ohci_hcca	drivers/usb/host/ohci-s3c24xx.h	/^struct ohci_hcca {$/;"	s
ohci_hcca	drivers/usb/host/ohci.h	/^struct ohci_hcca {$/;"	s
ohci_inited	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static char ohci_inited = 0;$/;"	v	typeref:typename:char	file:
ohci_inited	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static char ohci_inited = 0;$/;"	v	typeref:typename:char	file:
ohci_inited	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static char ohci_inited = 0;$/;"	v	typeref:typename:char	file:
ohci_inited	drivers/usb/host/ohci-hcd.c	/^static char ohci_inited = 0;$/;"	v	typeref:typename:char	file:
ohci_inited	drivers/usb/host/ohci-s3c24xx.c	/^static char ohci_inited = 0;$/;"	v	typeref:typename:char	file:
ohci_int_load	drivers/usb/host/ohci.h	/^	int ohci_int_load[32];	 \/* load of the 32 Interrupt Chains (for load balancing)*\/$/;"	m	struct:ohci	typeref:typename:int[32]
ohci_mdelay	drivers/usb/host/ohci-hcd.c	/^#define ohci_mdelay(/;"	d	file:
ohci_pci_ids	drivers/usb/host/ohci-hcd.c	/^static struct pci_device_id ohci_pci_ids[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
ohci_poll_int_queue	drivers/usb/host/ohci-hcd.c	/^static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:void *	file:
ohci_readl	drivers/usb/host/ohci.h	/^# define ohci_readl(/;"	d
ohci_register	drivers/usb/host/ohci-hcd.c	/^int ohci_register(struct udevice *dev, struct ohci_regs *regs)$/;"	f	typeref:typename:int
ohci_regs	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^struct ohci_regs {$/;"	s
ohci_regs	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^struct ohci_regs {$/;"	s
ohci_regs	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^struct ohci_regs {$/;"	s
ohci_regs	drivers/usb/host/ohci-s3c24xx.h	/^struct ohci_regs {$/;"	s
ohci_regs	drivers/usb/host/ohci.h	/^struct ohci_regs {$/;"	s
ohci_roothub_regs	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct	ohci_roothub_regs {$/;"	s	struct:ohci_regs
ohci_roothub_regs	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct	ohci_roothub_regs {$/;"	s	struct:ohci_regs
ohci_roothub_regs	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct ohci_roothub_regs {$/;"	s	struct:ohci_regs
ohci_roothub_regs	drivers/usb/host/ohci-s3c24xx.h	/^	struct ohci_roothub_regs {$/;"	s	struct:ohci_regs
ohci_roothub_regs	drivers/usb/host/ohci.h	/^	struct	ohci_roothub_regs {$/;"	s	struct:ohci_regs
ohci_submit_bulk_msg	drivers/usb/host/ohci-hcd.c	/^static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ohci_submit_control_msg	drivers/usb/host/ohci-hcd.c	/^static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ohci_submit_int_msg	drivers/usb/host/ohci-hcd.c	/^static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
ohci_submit_rh_msg	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
ohci_submit_rh_msg	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
ohci_submit_rh_msg	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
ohci_submit_rh_msg	drivers/usb/host/ohci-hcd.c	/^static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
ohci_submit_rh_msg	drivers/usb/host/ohci-s3c24xx.c	/^static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
ohci_sunxi_priv	drivers/usb/host/ohci-sunxi.c	/^struct ohci_sunxi_priv {$/;"	s	file:
ohci_t	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^} ohci_t;$/;"	t	typeref:struct:ohci
ohci_t	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^} ohci_t;$/;"	t	typeref:struct:ohci
ohci_t	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^} ohci_t;$/;"	t	typeref:struct:ohci
ohci_t	drivers/usb/host/ohci.h	/^} ohci_t;$/;"	t	typeref:struct:ohci
ohci_usb_ids	drivers/usb/host/ohci-generic.c	/^static const struct udevice_id ohci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ohci_usb_ids	drivers/usb/host/ohci-sunxi.c	/^static const struct udevice_id ohci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ohci_usb_ops	drivers/usb/host/ohci-hcd.c	/^struct dm_usb_ops ohci_usb_ops = {$/;"	v	typeref:struct:dm_usb_ops
ohci_usb_probe	drivers/usb/host/ohci-generic.c	/^static int ohci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ohci_usb_probe	drivers/usb/host/ohci-sunxi.c	/^static int ohci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ohci_usb_remove	drivers/usb/host/ohci-generic.c	/^static int ohci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ohci_usb_remove	drivers/usb/host/ohci-sunxi.c	/^static int ohci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ohci_writel	drivers/usb/host/ohci.h	/^# define ohci_writel(/;"	d
ohcictrl	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int ohcictrl;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
ohcidatac	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	ohcidatac;$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int
ohcidatac	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	ohcidatac;$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int
ohcidatac	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	ohcidatac;$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int
ohciicr	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 ohciicr;	\/* 0x10: OHCI Interrupt Configuration Register *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
ohciisr	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 ohciisr;	\/* 0x14: OHCI Interrupt Status Register *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
ohead_lnum	fs/ubifs/ubifs.h	/^	int ohead_lnum;$/;"	m	struct:ubifs_info	typeref:typename:int
ohead_offs	fs/ubifs/ubifs.h	/^	int ohead_offs;$/;"	m	struct:ubifs_info	typeref:typename:int
oiap_session	lib/tpm.c	/^static struct session_data oiap_session = {0, };$/;"	v	typeref:struct:session_data	file:
oid	include/mmc.h	/^	unsigned short oid;$/;"	m	struct:mmc_cid	typeref:typename:unsigned short
oid_supported_list	drivers/usb/gadget/rndis.c	/^static const u32 oid_supported_list[] = {$/;"	v	typeref:typename:const u32[]	file:
ok	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 ok;$/;"	m	struct:at91_emac	typeref:typename:u32
ok	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^static int ok = 1;$/;"	v	typeref:typename:int	file:
ok	tools/patman/patman	/^        ok = checkpatch.CheckPatches(options.verbose, args)$/;"	v
ok	tools/patman/patman.py	/^        ok = checkpatch.CheckPatches(options.verbose, args)$/;"	v
okRename	scripts/kconfig/qconf.cc	/^void ConfigItem::okRename(int col)$/;"	f	class:ConfigItem	typeref:typename:void
olah	arch/powerpc/include/asm/immap_85xx.h	/^	u32 olah;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
olal	arch/powerpc/include/asm/immap_85xx.h	/^	u32 olal;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
old	common/usb_kbd.c	/^	uint8_t		old[USB_KBD_BOOT_REPORT_SIZE];$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint8_t[]	file:
old_br0	board/freescale/p1022ds/diu.c	/^static u32 old_br0, old_or0, old_br1, old_or1;$/;"	v	typeref:typename:u32	file:
old_br1	board/freescale/p1022ds/diu.c	/^static u32 old_br0, old_or0, old_br1, old_or1;$/;"	v	typeref:typename:u32	file:
old_buds	fs/ubifs/ubifs.h	/^	struct list_head old_buds;$/;"	m	struct:ubifs_info	typeref:struct:list_head
old_col	drivers/video/cfb_console.c	/^static int __maybe_unused old_col;$/;"	v	typeref:typename:int __maybe_unused	file:
old_flag	common/cli_hush.c	/^	int old_flag;				\/* for figuring out valid reserved words *\/$/;"	m	struct:p_context	typeref:typename:int	file:
old_ft_cpu_setup	arch/powerpc/cpu/mpc512x/cpu.c	/^static void old_ft_cpu_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void	file:
old_gid_t	include/linux/types.h	/^typedef __kernel_old_gid_t	old_gid_t;$/;"	t	typeref:typename:__kernel_old_gid_t
old_idx	fs/ubifs/ubifs.h	/^	struct rb_root old_idx;$/;"	m	struct:ubifs_info	typeref:struct:rb_root
old_idx_sz	fs/ubifs/ubifs.h	/^	unsigned long long old_idx_sz;$/;"	m	struct:ubifs_budg_info	typeref:typename:unsigned long long
old_keys	board/nokia/rx51/rx51.c	/^static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:u8[8]	file:
old_leb_cnt	fs/ubifs/ubifs.h	/^	int old_leb_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
old_or0	board/freescale/p1022ds/diu.c	/^static u32 old_br0, old_or0, old_br1, old_or1;$/;"	v	typeref:typename:u32	file:
old_or1	board/freescale/p1022ds/diu.c	/^static u32 old_br0, old_or0, old_br1, old_or1;$/;"	v	typeref:typename:u32	file:
old_row	drivers/video/cfb_console.c	/^static int __maybe_unused old_row;$/;"	v	typeref:typename:int __maybe_unused	file:
old_sigaction	arch/powerpc/include/asm/signal.h	/^struct old_sigaction {$/;"	s
old_sigset_t	arch/powerpc/include/asm/signal.h	/^typedef unsigned long old_sigset_t;		\/* at least 32 bits *\/$/;"	t	typeref:typename:unsigned long
old_size	fs/ubifs/replay.c	/^			loff_t old_size;$/;"	m	struct:replay_entry::__anonf2442133010a::__anonf24421330208	typeref:typename:loff_t	file:
old_size	fs/ubifs/ubifs-media.h	/^	__le64 old_size;$/;"	m	struct:ubifs_trun_node	typeref:typename:__le64
old_uid_t	include/linux/types.h	/^typedef __kernel_old_uid_t	old_uid_t;$/;"	t	typeref:typename:__kernel_old_uid_t
old_zroot	fs/ubifs/debug.h	/^	struct ubifs_zbranch old_zroot;$/;"	m	struct:ubifs_debug_info	typeref:struct:ubifs_zbranch
old_zroot_level	fs/ubifs/debug.h	/^	int old_zroot_level;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
old_zroot_sqnum	fs/ubifs/debug.h	/^	unsigned long long old_zroot_sqnum;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned long long
oldaskconfig	scripts/kconfig/conf.c	/^	oldaskconfig,$/;"	e	enum:input_mode	file:
oldconfig	scripts/kconfig/conf.c	/^	oldconfig,$/;"	e	enum:input_mode	file:
olddefconfig	scripts/kconfig/conf.c	/^	olddefconfig,$/;"	e	enum:input_mode	file:
oldduplex	drivers/qe/uec.h	/^	int				oldduplex;$/;"	m	struct:uec_private	typeref:typename:int
oldest_dirty_block	fs/yaffs2/yaffs_guts.h	/^	unsigned oldest_dirty_block;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
oldest_dirty_gc_count	fs/yaffs2/yaffs_guts.h	/^	u32 oldest_dirty_gc_count;$/;"	m	struct:yaffs_dev	typeref:typename:u32
oldest_dirty_seq	fs/yaffs2/yaffs_guts.h	/^	unsigned oldest_dirty_seq;$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
oldlink	drivers/qe/uec.h	/^	int				oldlink;$/;"	m	struct:uec_private	typeref:typename:int
oldmask	arch/powerpc/include/asm/sigcontext.h	/^	unsigned long	oldmask;$/;"	m	struct:sigcontext_struct	typeref:typename:unsigned long
oldnoconfig	scripts/kconfig/Makefile	/^oldnoconfig: olddefconfig$/;"	t
oldsizes	board/mpl/common/common_util.c	/^static ulong oldsizes[] = {$/;"	v	typeref:typename:ulong[]	file:
oldspeed	drivers/qe/uec.h	/^	int				oldspeed;$/;"	m	struct:uec_private	typeref:typename:int
oldstate	board/esd/common/xilinx_jtag/ports.c	/^static int oldstate = 0;$/;"	v	typeref:typename:int	file:
oldstate	include/linux/mtd/flashchip.h	/^	flstate_t oldstate;$/;"	m	struct:flchip	typeref:typename:flstate_t
oldwfqmask	drivers/qe/uec.h	/^	u8   oldwfqmask;       \/* temporary variable handled by QE *\/$/;"	m	struct:uec_scheduler	typeref:typename:u8
om_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	om_stat;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
om_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	om_stat;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
om_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	om_stat;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
omap	board/nokia/rx51/rx51.c	/^static struct tag_omap omap[] = {$/;"	v	typeref:struct:tag_omap[]	file:
omap	drivers/usb/host/xhci-omap.c	/^static struct omap_xhci omap;$/;"	v	typeref:struct:omap_xhci	file:
omap2430_dmamask	drivers/usb/musb-new/omap2430.c	/^static u64 omap2430_dmamask = DMA_BIT_MASK(32);$/;"	v	typeref:typename:u64	file:
omap2430_driver	drivers/usb/musb-new/omap2430.c	/^static struct platform_driver omap2430_driver = {$/;"	v	typeref:struct:platform_driver	file:
omap2430_exit	drivers/usb/musb-new/omap2430.c	/^static void __exit omap2430_exit(void)$/;"	f	typeref:typename:void __exit	file:
omap2430_glue	drivers/usb/musb-new/omap2430.c	/^struct omap2430_glue {$/;"	s	file:
omap2430_init	drivers/usb/musb-new/omap2430.c	/^static int __init omap2430_init(void)$/;"	f	typeref:typename:int __init	file:
omap2430_low_level_exit	drivers/usb/musb-new/omap2430.c	/^static inline void omap2430_low_level_exit(struct musb *musb)$/;"	f	typeref:typename:void	file:
omap2430_low_level_init	drivers/usb/musb-new/omap2430.c	/^static inline void omap2430_low_level_init(struct musb *musb)$/;"	f	typeref:typename:void	file:
omap2430_musb_disable	drivers/usb/musb-new/omap2430.c	/^static void omap2430_musb_disable(struct musb *musb)$/;"	f	typeref:typename:void	file:
omap2430_musb_enable	drivers/usb/musb-new/omap2430.c	/^static void omap2430_musb_enable(struct musb *musb)$/;"	f	typeref:typename:void	file:
omap2430_musb_exit	drivers/usb/musb-new/omap2430.c	/^static int omap2430_musb_exit(struct musb *musb)$/;"	f	typeref:typename:int	file:
omap2430_musb_init	drivers/usb/musb-new/omap2430.c	/^static int omap2430_musb_init(struct musb *musb)$/;"	f	typeref:typename:int	file:
omap2430_musb_set_mode	drivers/usb/musb-new/omap2430.c	/^static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)$/;"	f	typeref:typename:int	file:
omap2430_musb_set_vbus	drivers/usb/musb-new/omap2430.c	/^static void omap2430_musb_set_vbus(struct musb *musb, int is_on)$/;"	f	typeref:typename:void	file:
omap2430_musb_try_idle	drivers/usb/musb-new/omap2430.c	/^static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)$/;"	f	typeref:typename:void	file:
omap2430_ops	drivers/usb/musb-new/omap2430.c	/^static const struct musb_platform_ops omap2430_ops = {$/;"	v	typeref:typename:const struct musb_platform_ops	file:
omap2430_pm_ops	drivers/usb/musb-new/omap2430.c	/^static struct dev_pm_ops omap2430_pm_ops = {$/;"	v	typeref:struct:dev_pm_ops	file:
omap2430_probe	drivers/usb/musb-new/omap2430.c	/^static int __devinit omap2430_probe(struct platform_device *pdev)$/;"	f	typeref:typename:int __devinit	file:
omap2430_remove	drivers/usb/musb-new/omap2430.c	/^static int __devexit omap2430_remove(struct platform_device *pdev)$/;"	f	typeref:typename:int __devexit	file:
omap2430_runtime_resume	drivers/usb/musb-new/omap2430.c	/^static int omap2430_runtime_resume(struct device *dev)$/;"	f	typeref:typename:int	file:
omap2430_runtime_suspend	drivers/usb/musb-new/omap2430.c	/^static int omap2430_runtime_suspend(struct device *dev)$/;"	f	typeref:typename:int	file:
omap24_get_base	drivers/i2c/omap24xx_i2c.c	/^static struct i2c *omap24_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:i2c *	file:
omap24_i2c_deblock	drivers/i2c/omap24xx_i2c.c	/^static void omap24_i2c_deblock(struct i2c *i2c_base)$/;"	f	typeref:typename:void	file:
omap24_i2c_findpsc	drivers/i2c/omap24xx_i2c.c	/^static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)$/;"	f	typeref:typename:int	file:
omap24_i2c_init	drivers/i2c/omap24xx_i2c.c	/^static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
omap24_i2c_probe	drivers/i2c/omap24xx_i2c.c	/^static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
omap24_i2c_read	drivers/i2c/omap24xx_i2c.c	/^static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
omap24_i2c_setspeed	drivers/i2c/omap24xx_i2c.c	/^static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)$/;"	f	typeref:typename:uint	file:
omap24_i2c_write	drivers/i2c/omap24xx_i2c.c	/^static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
omap2_mcspi_platform_config	drivers/spi/omap3_spi.c	/^struct omap2_mcspi_platform_config {$/;"	s	file:
omap2_pdata	drivers/spi/omap3_spi.c	/^static struct omap2_mcspi_platform_config omap2_pdata = {$/;"	v	typeref:struct:omap2_mcspi_platform_config	file:
omap34xx_gpio	arch/arm/cpu/armv7/omap3/board.c	/^static const struct omap_gpio_platdata omap34xx_gpio[] = {$/;"	v	typeref:typename:const struct omap_gpio_platdata[]	file:
omap3_dss_enable	drivers/video/omap3_dss.c	/^void omap3_dss_enable(void)$/;"	f	typeref:typename:void
omap3_dss_panel_config	drivers/video/omap3_dss.c	/^void omap3_dss_panel_config(const struct panel_config *panel_cfg)$/;"	f	typeref:typename:void
omap3_dss_venc_config	drivers/video/omap3_dss.c	/^void omap3_dss_venc_config(const struct venc_regs *venc_cfg,$/;"	f	typeref:typename:void
omap3_emu_romcode_call	arch/arm/cpu/armv7/omap3/board.c	/^static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)$/;"	f	typeref:typename:void	file:
omap3_emu_romcode_call	board/nokia/rx51/rx51.c	/^static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)$/;"	f	typeref:typename:void	file:
omap3_evm_get_revision	board/ti/evm/evm.c	/^static void omap3_evm_get_revision(void)$/;"	f	typeref:typename:void	file:
omap3_evm_need_extvbus	board/quipos/cairo/cairo.c	/^u8 omap3_evm_need_extvbus(void)$/;"	f	typeref:typename:u8
omap3_evm_need_extvbus	board/ti/evm/evm.c	/^u8 omap3_evm_need_extvbus(void)$/;"	f	typeref:typename:u8
omap3_evm_version	board/ti/evm/evm.c	/^static u32 omap3_evm_version;$/;"	v	typeref:typename:u32	file:
omap3_invalidate_l2_cache_secure	arch/arm/cpu/armv7/omap3/board.c	/^static void omap3_invalidate_l2_cache_secure(void)$/;"	f	typeref:typename:void	file:
omap3_otg_regs	drivers/usb/musb/omap3.c	/^struct omap3_otg_regs {$/;"	s	file:
omap3_outer_cache_disable	arch/arm/cpu/armv7/omap3/board.c	/^void omap3_outer_cache_disable(void)$/;"	f	typeref:typename:void
omap3_set_aux_cr_secure	arch/arm/cpu/armv7/omap3/board.c	/^void __weak omap3_set_aux_cr_secure(u32 acr)$/;"	f	typeref:typename:void __weak
omap3_set_aux_cr_secure	board/nokia/rx51/rx51.c	/^void omap3_set_aux_cr_secure(u32 acr)$/;"	f	typeref:typename:void
omap3_spi_claim_bus	drivers/spi/omap3_spi.c	/^static int omap3_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap3_spi_ids	drivers/spi/omap3_spi.c	/^static const struct udevice_id omap3_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
omap3_spi_ops	drivers/spi/omap3_spi.c	/^static const struct dm_spi_ops omap3_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
omap3_spi_priv	drivers/spi/omap3_spi.c	/^struct omap3_spi_priv {$/;"	s	file:
omap3_spi_probe	drivers/spi/omap3_spi.c	/^static int omap3_spi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap3_spi_read	drivers/spi/omap3_spi.c	/^static int omap3_spi_read(struct omap3_spi_priv *priv, unsigned int len,$/;"	f	typeref:typename:int	file:
omap3_spi_release_bus	drivers/spi/omap3_spi.c	/^static int omap3_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap3_spi_set_enable	drivers/spi/omap3_spi.c	/^static void omap3_spi_set_enable(struct omap3_spi_priv *priv, int enable)$/;"	f	typeref:typename:void	file:
omap3_spi_set_mode	drivers/spi/omap3_spi.c	/^static int omap3_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
omap3_spi_set_speed	drivers/spi/omap3_spi.c	/^static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int	file:
omap3_spi_set_wordlen	drivers/spi/omap3_spi.c	/^static int omap3_spi_set_wordlen(struct udevice *dev, unsigned int wordlen)$/;"	f	typeref:typename:int	file:
omap3_spi_txrx	drivers/spi/omap3_spi.c	/^static int omap3_spi_txrx(struct omap3_spi_priv *priv, unsigned int len,$/;"	f	typeref:typename:int	file:
omap3_spi_write	drivers/spi/omap3_spi.c	/^static int omap3_spi_write(struct omap3_spi_priv *priv, unsigned int len,$/;"	f	typeref:typename:int	file:
omap3_spi_write_chconf	drivers/spi/omap3_spi.c	/^static void omap3_spi_write_chconf(struct omap3_spi_priv *priv, int val)$/;"	f	typeref:typename:void	file:
omap3_spi_xfer	drivers/spi/omap3_spi.c	/^static int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
omap3_sysinfo	arch/arm/include/asm/arch-omap3/sys_proto.h	/^} omap3_sysinfo;$/;"	t	typeref:struct:__anon6aa74aa60108
omap3_update_aux_cr	arch/arm/cpu/armv7/omap3/board.c	/^static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)$/;"	f	typeref:typename:void	file:
omap3_update_aux_cr_secure_rx51	board/nokia/rx51/rx51.c	/^static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)$/;"	f	typeref:typename:void	file:
omap3logic_serial	board/logicpd/omap3som/omap3logic.c	/^static const struct ns16550_platdata omap3logic_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
omap4430_dplls	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct dplls omap4430_dplls = {$/;"	v	typeref:struct:dplls
omap4430_dplls_es1	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct dplls omap4430_dplls_es1 = {$/;"	v	typeref:struct:dplls
omap4430_dplls_es20	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct dplls omap4430_dplls_es20 = {$/;"	v	typeref:struct:dplls
omap4430_volts	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct vcores_data omap4430_volts = {$/;"	v	typeref:struct:vcores_data
omap4430_volts_es1	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct vcores_data omap4430_volts_es1 = {$/;"	v	typeref:struct:vcores_data
omap4460_dplls	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct dplls omap4460_dplls = {$/;"	v	typeref:struct:dplls
omap4460_volts	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct vcores_data omap4460_volts = {$/;"	v	typeref:struct:vcores_data
omap4470_dplls	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct dplls omap4470_dplls = {$/;"	v	typeref:struct:dplls
omap4470_volts	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct vcores_data omap4470_volts = {$/;"	v	typeref:struct:vcores_data
omap4_ctrl	arch/arm/cpu/armv7/omap4/prcm-regs.c	/^struct omap_sys_ctrl_regs const omap4_ctrl = {$/;"	v	typeref:struct:omap_sys_ctrl_regs const
omap4_pdata	drivers/spi/omap3_spi.c	/^static struct omap2_mcspi_platform_config omap4_pdata = {$/;"	v	typeref:struct:omap2_mcspi_platform_config	file:
omap4_prcm	arch/arm/cpu/armv7/omap4/prcm-regs.c	/^struct prcm_regs const omap4_prcm = {$/;"	v	typeref:struct:prcm_regs const
omap4_scrm_regs	arch/arm/include/asm/arch-omap4/clock.h	/^struct omap4_scrm_regs {$/;"	s
omap4_vmmc_pbias_config	drivers/mmc/omap_hsmmc.c	/^static void omap4_vmmc_pbias_config(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
omap5430_volts	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct vcores_data omap5430_volts = {$/;"	v	typeref:struct:vcores_data
omap5430_volts_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct vcores_data omap5430_volts_es2 = {$/;"	v	typeref:struct:vcores_data
omap5_bug_00339_regs	arch/arm/cpu/armv7/omap5/sdram.c	/^const struct read_write_regs omap5_bug_00339_regs[] = {$/;"	v	typeref:typename:const struct read_write_regs[]
omap5_ctrl	arch/arm/cpu/armv7/omap5/prcm-regs.c	/^struct omap_sys_ctrl_regs const omap5_ctrl = {$/;"	v	typeref:struct:omap_sys_ctrl_regs const
omap5_ddr3_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void omap5_ddr3_init(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
omap5_ddr3_leveling	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void omap5_ddr3_leveling(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
omap5_dplls_es1	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct dplls omap5_dplls_es1 = {$/;"	v	typeref:struct:dplls
omap5_dplls_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct dplls omap5_dplls_es2 = {$/;"	v	typeref:struct:dplls
omap5_es1_prcm	arch/arm/cpu/armv7/omap5/prcm-regs.c	/^struct prcm_regs const omap5_es1_prcm = {$/;"	v	typeref:struct:prcm_regs const
omap5_es2_prcm	arch/arm/cpu/armv7/omap5/prcm-regs.c	/^struct prcm_regs const omap5_es2_prcm = {$/;"	v	typeref:struct:prcm_regs const
omap5_pbias_config	drivers/mmc/omap_hsmmc.c	/^static void omap5_pbias_config(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
omap_bluetooth_config	board/nokia/rx51/tag_omap.h	/^struct omap_bluetooth_config {$/;"	s
omap_boot_device	arch/arm/include/asm/global_data.h	/^	u32 omap_boot_device;$/;"	m	struct:arch_global_data	typeref:typename:u32
omap_boot_mode	arch/arm/include/asm/global_data.h	/^	u32 omap_boot_mode;$/;"	m	struct:arch_global_data	typeref:typename:u32
omap_boot_parameters	arch/arm/include/asm/arch-am33xx/omap.h	/^struct omap_boot_parameters {$/;"	s
omap_boot_parameters	arch/arm/include/asm/arch-omap3/omap.h	/^struct omap_boot_parameters {$/;"	s
omap_boot_parameters	arch/arm/include/asm/arch-omap4/omap.h	/^struct omap_boot_parameters {$/;"	s
omap_boot_parameters	arch/arm/include/asm/arch-omap5/omap.h	/^struct omap_boot_parameters {$/;"	s
omap_boot_reason_config	board/nokia/rx51/tag_omap.h	/^struct omap_boot_reason_config {$/;"	s
omap_calculate_ecc	drivers/mtd/nand/omap_gpmc.c	/^static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,$/;"	f	typeref:typename:int	file:
omap_cbus_config	board/nokia/rx51/tag_omap.h	/^struct omap_cbus_config {$/;"	s
omap_ch_flags	arch/arm/include/asm/global_data.h	/^	u8 omap_ch_flags;$/;"	m	struct:arch_global_data	typeref:typename:u8
omap_clock_config	board/nokia/rx51/tag_omap.h	/^struct omap_clock_config {$/;"	s
omap_control_pcie1phy	arch/arm/dts/dra7.dtsi	/^		omap_control_pcie1phy: control-phy@0x4a003c40 {$/;"	l
omap_control_pcie2phy	arch/arm/dts/dra7.dtsi	/^		omap_control_pcie2phy: control-pcie@0x4a003c44 {$/;"	l
omap_control_phy_power	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^static void omap_control_phy_power(struct omap_pipe3 *phy, int on)$/;"	f	typeref:typename:void	file:
omap_control_sata	arch/arm/dts/dra7.dtsi	/^		omap_control_sata: control-phy@4a002374 {$/;"	l
omap_control_usb2phy1	arch/arm/dts/dra7.dtsi	/^		omap_control_usb2phy1: control-phy@4a002300 {$/;"	l
omap_control_usb2phy2	arch/arm/dts/dra7.dtsi	/^		omap_control_usb2phy2: control-phy@0x4a002e74 {$/;"	l
omap_control_usb3phy1	arch/arm/dts/dra7.dtsi	/^		omap_control_usb3phy1: control-phy@4a002370 {$/;"	l
omap_correct_data	drivers/mtd/nand/omap_gpmc.c	/^static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat,$/;"	f	typeref:typename:int __maybe_unused	file:
omap_correct_data_bch	drivers/mtd/nand/omap_gpmc.c	/^static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,$/;"	f	typeref:typename:int	file:
omap_correct_data_bch_sw	drivers/mtd/nand/omap_gpmc.c	/^static int omap_correct_data_bch_sw(struct mtd_info *mtd, u_char *data,$/;"	f	typeref:typename:int	file:
omap_ddr_clk	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^u32 omap_ddr_clk(void)$/;"	f	typeref:typename:u32
omap_dev_ready	drivers/mtd/nand/omap_gpmc.c	/^static int omap_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
omap_die_id	arch/arm/cpu/armv7/omap-common/utils.c	/^__weak void omap_die_id(unsigned int *die_id)$/;"	f	typeref:typename:__weak void
omap_die_id	arch/arm/cpu/armv7/omap3/sys_info.c	/^void omap_die_id(unsigned int *die_id)$/;"	f	typeref:typename:void
omap_die_id	arch/arm/cpu/armv7/omap4/hwinit.c	/^void omap_die_id(unsigned int *die_id)$/;"	f	typeref:typename:void
omap_die_id	arch/arm/cpu/armv7/omap5/hwinit.c	/^void omap_die_id(unsigned int *die_id)$/;"	f	typeref:typename:void
omap_die_id_display	arch/arm/cpu/armv7/omap-common/utils.c	/^void omap_die_id_display(void)$/;"	f	typeref:typename:void
omap_die_id_get_board_serial	arch/arm/cpu/armv7/omap-common/utils.c	/^void omap_die_id_get_board_serial(struct tag_serialnr *serialnr)$/;"	f	typeref:typename:void
omap_die_id_serial	arch/arm/cpu/armv7/omap-common/utils.c	/^void omap_die_id_serial(void)$/;"	f	typeref:typename:void
omap_die_id_usbethaddr	arch/arm/cpu/armv7/omap-common/utils.c	/^void omap_die_id_usbethaddr(void)$/;"	f	typeref:typename:void
omap_dwc3_1	arch/arm/dts/dra7.dtsi	/^		omap_dwc3_1: omap_dwc3_1@48880000 {$/;"	l
omap_dwc3_2	arch/arm/dts/dra7.dtsi	/^		omap_dwc3_2: omap_dwc3_2@488c0000 {$/;"	l
omap_dwc3_3	arch/arm/dts/dra7.dtsi	/^		omap_dwc3_3: omap_dwc3_3@48900000 {$/;"	l
omap_dwc3_4	arch/arm/dts/dra74x.dtsi	/^		omap_dwc3_4: omap_dwc3_4@48940000 {$/;"	l
omap_dwc3_vbus_id_status	include/dwc3-omap-uboot.h	/^enum omap_dwc3_vbus_id_status {$/;"	g
omap_dwc_wrapper	include/linux/usb/xhci-omap.h	/^struct omap_dwc_wrapper {$/;"	s
omap_ecc	include/linux/mtd/omap_gpmc.h	/^enum omap_ecc {$/;"	g
omap_ecclayout	drivers/mtd/nand/omap_gpmc.c	/^static __maybe_unused struct nand_ecclayout omap_ecclayout;$/;"	v	typeref:struct:nand_ecclayout	file:
omap_ehci	arch/arm/include/asm/ehci-omap.h	/^struct omap_ehci {$/;"	s
omap_ehci_hcd_init	drivers/usb/host/ehci-omap.c	/^int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,$/;"	f	typeref:typename:int
omap_ehci_hcd_stop	drivers/usb/host/ehci-omap.c	/^int omap_ehci_hcd_stop(void)$/;"	f	typeref:typename:int
omap_ehci_phy_reset	drivers/usb/host/ehci-omap.c	/^#define omap_ehci_phy_reset(/;"	d	file:
omap_ehci_phy_reset	drivers/usb/host/ehci-omap.c	/^static inline void omap_ehci_phy_reset(int on, int delay)$/;"	f	typeref:typename:void	file:
omap_ehci_soft_phy_reset	drivers/usb/host/ehci-omap.c	/^static void omap_ehci_soft_phy_reset(int port)$/;"	f	typeref:typename:void	file:
omap_ehci_tll_reset	drivers/usb/host/ehci-omap.c	/^static int omap_ehci_tll_reset(void)$/;"	f	typeref:typename:int	file:
omap_em_asic_bb5_config	board/nokia/rx51/tag_omap.h	/^struct omap_em_asic_bb5_config {$/;"	s
omap_enable_hwecc	drivers/mtd/nand/omap_gpmc.c	/^static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)$/;"	f	typeref:typename:__maybe_unused void	file:
omap_enable_phy	drivers/usb/phy/omap_usb_phy.c	/^void omap_enable_phy(struct omap_xhci *omap)$/;"	f	typeref:typename:void
omap_enable_usb2_phy2	drivers/usb/phy/omap_usb_phy.c	/^static void omap_enable_usb2_phy2(struct omap_xhci *omap)$/;"	f	typeref:typename:void	file:
omap_enable_usb3_phy	drivers/usb/phy/omap_usb_phy.c	/^static void omap_enable_usb3_phy(struct omap_xhci *omap)$/;"	f	typeref:typename:void	file:
omap_fbmem_config	board/nokia/rx51/tag_omap.h	/^struct omap_fbmem_config {$/;"	s
omap_flash_part_str_config	board/nokia/rx51/tag_omap.h	/^struct omap_flash_part_str_config {$/;"	s
omap_free_bch	drivers/mtd/nand/omap_gpmc.c	/^static void __maybe_unused omap_free_bch(struct mtd_info *mtd)$/;"	f	typeref:typename:void __maybe_unused	file:
omap_get_die_rev	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^static u8 omap_get_die_rev(void)$/;"	f	typeref:typename:u8	file:
omap_get_jtag_id	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^static u16 omap_get_jtag_id(void)$/;"	f	typeref:typename:u16	file:
omap_gpio_bank	arch/arm/cpu/armv7/am33xx/board.c	/^const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;$/;"	v	typeref:typename:const struct gpio_bank * const
omap_gpio_bank	arch/arm/cpu/armv7/omap3/board.c	/^const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;$/;"	v	typeref:typename:const struct gpio_bank * const
omap_gpio_bank	arch/arm/cpu/armv7/omap4/hwinit.c	/^const struct gpio_bank *const omap_gpio_bank = gpio_bank_44xx;$/;"	v	typeref:typename:const struct gpio_bank * const
omap_gpio_bank	arch/arm/cpu/armv7/omap5/hwinit.c	/^const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;$/;"	v	typeref:typename:const struct gpio_bank * const
omap_gpio_bind	drivers/gpio/omap_gpio.c	/^static int omap_gpio_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap_gpio_direction_input	drivers/gpio/omap_gpio.c	/^static int omap_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
omap_gpio_direction_output	drivers/gpio/omap_gpio.c	/^static int omap_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
omap_gpio_get_function	drivers/gpio/omap_gpio.c	/^static int omap_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
omap_gpio_get_value	drivers/gpio/omap_gpio.c	/^static int omap_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
omap_gpio_ids	drivers/gpio/omap_gpio.c	/^static const struct udevice_id omap_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
omap_gpio_platdata	arch/arm/include/asm/omap_gpio.h	/^struct omap_gpio_platdata {$/;"	s
omap_gpio_probe	drivers/gpio/omap_gpio.c	/^static int omap_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap_gpio_set_value	drivers/gpio/omap_gpio.c	/^static int omap_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
omap_gpio_switch_config	board/nokia/rx51/tag_omap.h	/^struct omap_gpio_switch_config {$/;"	s
omap_gptimer_regs	drivers/timer/omap-timer.c	/^struct omap_gptimer_regs {$/;"	s	file:
omap_hsmmc_data	drivers/mmc/omap_hsmmc.c	/^struct omap_hsmmc_data {$/;"	s	file:
omap_hsmmc_getcd	drivers/mmc/omap_hsmmc.c	/^static int omap_hsmmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
omap_hsmmc_getwp	drivers/mmc/omap_hsmmc.c	/^static int omap_hsmmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
omap_hsmmc_ids	drivers/mmc/omap_hsmmc.c	/^static const struct udevice_id omap_hsmmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
omap_hsmmc_init_setup	drivers/mmc/omap_hsmmc.c	/^static int omap_hsmmc_init_setup(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
omap_hsmmc_ofdata_to_platdata	drivers/mmc/omap_hsmmc.c	/^static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap_hsmmc_ops	drivers/mmc/omap_hsmmc.c	/^static const struct mmc_ops omap_hsmmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
omap_hsmmc_probe	drivers/mmc/omap_hsmmc.c	/^static int omap_hsmmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap_hsmmc_send_cmd	drivers/mmc/omap_hsmmc.c	/^static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
omap_hsmmc_set_ios	drivers/mmc/omap_hsmmc.c	/^static void omap_hsmmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
omap_hw_init_context	arch/arm/include/asm/ti-common/sys_proto.h	/^static inline u32 omap_hw_init_context(void)$/;"	f	typeref:typename:u32
omap_i2c	drivers/i2c/omap24xx_i2c.c	/^struct omap_i2c {$/;"	s	file:
omap_id	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^	u32	omap_id;	\/* OMAP revision *\/$/;"	m	struct:omap_id	typeref:typename:u32	file:
omap_id	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^struct omap_id {$/;"	s	file:
omap_ids	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^static struct omap_id omap_ids[] = {$/;"	v	typeref:struct:omap_id[]	file:
omap_lcd_config	board/nokia/rx51/tag_omap.h	/^struct omap_lcd_config {$/;"	s
omap_mmc_init	drivers/mmc/omap_hsmmc.c	/^int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,$/;"	f	typeref:typename:int
omap_mmc_setup_gpio_in	drivers/mmc/omap_hsmmc.c	/^static int omap_mmc_setup_gpio_in(int gpio, const char *label)$/;"	f	typeref:typename:int	file:
omap_musb_board_data	arch/arm/include/asm/omap_musb.h	/^struct omap_musb_board_data {$/;"	s
omap_musb_mailbox	drivers/usb/musb-new/omap2430.c	/^void omap_musb_mailbox(enum omap_musb_vbus_id_status status)$/;"	f	typeref:typename:void
omap_musb_mailbox_work	drivers/usb/musb-new/omap2430.c	/^	struct work_struct	omap_musb_mailbox_work;$/;"	m	struct:omap2430_glue	typeref:struct:work_struct	file:
omap_musb_mailbox_work	drivers/usb/musb-new/omap2430.c	/^static void omap_musb_mailbox_work(struct work_struct *mailbox_work)$/;"	f	typeref:typename:void	file:
omap_musb_set_mailbox	drivers/usb/musb-new/omap2430.c	/^static void omap_musb_set_mailbox(struct omap2430_glue *glue)$/;"	f	typeref:typename:void	file:
omap_nand_hwcontrol	drivers/mtd/nand/omap_gpmc.c	/^static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,$/;"	f	typeref:typename:void	file:
omap_nand_info	drivers/mtd/nand/omap_gpmc.c	/^static struct omap_nand_info omap_nand_info[GPMC_MAX_CS];$/;"	v	typeref:struct:omap_nand_info[]	file:
omap_nand_info	drivers/mtd/nand/omap_gpmc.c	/^struct omap_nand_info {$/;"	s	file:
omap_nand_read	drivers/mtd/nand/omap_gpmc.c	/^static inline void omap_nand_read(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
omap_nand_read_prefetch	drivers/mtd/nand/omap_gpmc.c	/^static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
omap_nand_switch_ecc	drivers/mtd/nand/omap_gpmc.c	/^int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)$/;"	f	typeref:typename:int __maybe_unused
omap_partition_config	board/nokia/rx51/tag_omap.h	/^struct omap_partition_config {$/;"	s
omap_pipe3	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^struct omap_pipe3 {$/;"	s
omap_pipe3_dpll_program	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^static int omap_pipe3_dpll_program(struct omap_pipe3 *phy)$/;"	f	typeref:typename:int	file:
omap_pipe3_get_dpll_params	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^static struct pipe3_dpll_params *omap_pipe3_get_dpll_params(struct omap_pipe3$/;"	f	typeref:struct:pipe3_dpll_params *	file:
omap_pipe3_readl	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^static inline u32 omap_pipe3_readl(void __iomem *addr, unsigned offset)$/;"	f	typeref:typename:u32	file:
omap_pipe3_wait_lock	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^static int omap_pipe3_wait_lock(struct omap_pipe3 *phy)$/;"	f	typeref:typename:int	file:
omap_pipe3_writel	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^static inline void omap_pipe3_writel(void __iomem *addr, unsigned offset,$/;"	f	typeref:typename:void	file:
omap_prefetch_enable	drivers/mtd/nand/omap_gpmc.c	/^static int omap_prefetch_enable(int fifo_th, unsigned int count, int is_write, int cs)$/;"	f	typeref:typename:int	file:
omap_prefetch_reset	drivers/mtd/nand/omap_gpmc.c	/^static void omap_prefetch_reset(void)$/;"	f	typeref:typename:void	file:
omap_read_page_bch	drivers/mtd/nand/omap_gpmc.c	/^static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
omap_readl	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define omap_readl(/;"	d	file:
omap_readw	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^#define omap_readw(/;"	d	file:
omap_reboot_mode	arch/arm/cpu/armv7/omap3/boot.c	/^int omap_reboot_mode(char *mode, unsigned int length)$/;"	f	typeref:typename:int
omap_reboot_mode	arch/arm/cpu/armv7/omap4/boot.c	/^int omap_reboot_mode(char *mode, unsigned int length)$/;"	f	typeref:typename:int
omap_reboot_mode_clear	arch/arm/cpu/armv7/omap3/boot.c	/^int omap_reboot_mode_clear(void)$/;"	f	typeref:typename:int
omap_reboot_mode_clear	arch/arm/cpu/armv7/omap4/boot.c	/^int omap_reboot_mode_clear(void)$/;"	f	typeref:typename:int
omap_reboot_mode_store	arch/arm/cpu/armv7/omap3/boot.c	/^int omap_reboot_mode_store(char *mode)$/;"	f	typeref:typename:int
omap_reboot_mode_store	arch/arm/cpu/armv7/omap4/boot.c	/^int omap_reboot_mode_store(char *mode)$/;"	f	typeref:typename:int
omap_rev_string	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^static void omap_rev_string(void)$/;"	f	typeref:typename:void	file:
omap_reverse_list	drivers/mtd/nand/omap_gpmc.c	/^static void omap_reverse_list(u8 *list, unsigned int length)$/;"	f	typeref:typename:void	file:
omap_revision	arch/arm/include/asm/omap_common.h	/^static inline u32 omap_revision(void)$/;"	f	typeref:typename:u32
omap_sdram_size	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^u32 omap_sdram_size(void)$/;"	f	typeref:typename:u32
omap_select_ecc_scheme	drivers/mtd/nand/omap_gpmc.c	/^static int omap_select_ecc_scheme(struct nand_chip *nand,$/;"	f	typeref:typename:int	file:
omap_serial_console_config	board/nokia/rx51/tag_omap.h	/^struct omap_serial_console_config {$/;"	s
omap_si_rev	arch/arm/cpu/armv7/omap4/hwinit.c	/^u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;$/;"	v	typeref:typename:u32 * const
omap_si_rev	arch/arm/cpu/armv7/omap5/hwinit.c	/^u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;$/;"	v	typeref:typename:u32 * const
omap_smc_sec_end	arch/arm/cpu/armv7/omap-common/lowlevel_init.S	/^omap_smc_sec_end:$/;"	l
omap_sti_console_config	board/nokia/rx51/tag_omap.h	/^struct omap_sti_console_config {$/;"	s
omap_sys_boot_device	arch/arm/cpu/armv7/omap-common/boot-common.c	/^__weak u32 omap_sys_boot_device(void)$/;"	f	typeref:typename:__weak u32
omap_sys_boot_device	arch/arm/cpu/armv7/omap3/boot.c	/^u32 omap_sys_boot_device(void)$/;"	f	typeref:typename:u32
omap_sys_boot_device	arch/arm/cpu/armv7/omap4/boot.c	/^u32 omap_sys_boot_device(void)$/;"	f	typeref:typename:u32
omap_sys_boot_device	arch/arm/cpu/armv7/omap5/boot.c	/^u32 omap_sys_boot_device(void)$/;"	f	typeref:typename:u32
omap_sys_ctrl_regs	arch/arm/include/asm/omap_common.h	/^struct omap_sys_ctrl_regs {$/;"	s
omap_sysinfo	arch/arm/include/asm/arch-omap4/sys_proto.h	/^struct omap_sysinfo {$/;"	s
omap_sysinfo	arch/arm/include/asm/arch-omap5/sys_proto.h	/^struct omap_sysinfo {$/;"	s
omap_tea5761_config	board/nokia/rx51/tag_omap.h	/^struct omap_tea5761_config {$/;"	s
omap_timer_get_count	drivers/timer/omap-timer.c	/^static int omap_timer_get_count(struct udevice *dev, u64 *count)$/;"	f	typeref:typename:int	file:
omap_timer_ids	drivers/timer/omap-timer.c	/^static const struct udevice_id omap_timer_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
omap_timer_ofdata_to_platdata	drivers/timer/omap-timer.c	/^static int omap_timer_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap_timer_ops	drivers/timer/omap-timer.c	/^static const struct timer_ops omap_timer_ops = {$/;"	v	typeref:typename:const struct timer_ops	file:
omap_timer_priv	drivers/timer/omap-timer.c	/^struct omap_timer_priv {$/;"	s	file:
omap_timer_probe	drivers/timer/omap-timer.c	/^static int omap_timer_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
omap_uart_config	board/nokia/rx51/tag_omap.h	/^struct omap_uart_config {$/;"	s
omap_uhh	arch/arm/include/asm/ehci-omap.h	/^struct omap_uhh {$/;"	s
omap_uhh_reset	drivers/usb/host/ehci-omap.c	/^static int omap_uhh_reset(void)$/;"	f	typeref:typename:int	file:
omap_usb3_get_dpll_params	drivers/usb/phy/omap_usb_phy.c	/^static struct usb3_dpll_params *omap_usb3_get_dpll_params(void)$/;"	f	typeref:struct:usb3_dpll_params *	file:
omap_usb3_phy	include/linux/usb/xhci-omap.h	/^struct omap_usb3_phy {$/;"	s
omap_usb3_phy_init	drivers/usb/phy/omap_usb_phy.c	/^void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs)$/;"	f	typeref:typename:void
omap_usb_config	board/nokia/rx51/tag_omap.h	/^struct omap_usb_config {$/;"	s
omap_usb_dpll_lock	drivers/usb/phy/omap_usb_phy.c	/^static void omap_usb_dpll_lock(struct omap_usb3_phy *phy_regs)$/;"	f	typeref:typename:void	file:
omap_usb_dpll_relock	drivers/usb/phy/omap_usb_phy.c	/^static void omap_usb_dpll_relock(struct omap_usb3_phy *phy_regs)$/;"	f	typeref:typename:void	file:
omap_usbhs_board_data	arch/arm/include/asm/ehci-omap.h	/^struct omap_usbhs_board_data {$/;"	s
omap_usbhs_hsic_init	drivers/usb/host/ehci-omap.c	/^static void omap_usbhs_hsic_init(int port)$/;"	f	typeref:typename:void	file:
omap_usbtll	arch/arm/include/asm/ehci-omap.h	/^struct omap_usbtll {$/;"	s
omap_vc_bypass_send_value	arch/arm/cpu/armv7/omap-common/vc.c	/^int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data)$/;"	f	typeref:typename:int
omap_vc_init	arch/arm/cpu/armv7/omap-common/vc.c	/^static void omap_vc_init(u16 speed_khz)$/;"	f	typeref:typename:void	file:
omap_vcores	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct vcores_data const **omap_vcores =$/;"	v	typeref:struct:vcores_data const **
omap_vcores	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct vcores_data const **omap_vcores =$/;"	v	typeref:struct:vcores_data const **
omap_version_config	board/nokia/rx51/tag_omap.h	/^struct omap_version_config {$/;"	s
omap_wdt_set_timeout	drivers/watchdog/omap_wdt.c	/^static int omap_wdt_set_timeout(unsigned int timeout)$/;"	f	typeref:typename:int	file:
omap_wlan_cx3110x_config	board/nokia/rx51/tag_omap.h	/^struct omap_wlan_cx3110x_config {$/;"	s
omap_xhci	include/linux/usb/xhci-omap.h	/^struct omap_xhci {$/;"	s
omap_xhci_core_exit	drivers/usb/host/xhci-omap.c	/^static void omap_xhci_core_exit(struct omap_xhci *omap)$/;"	f	typeref:typename:void	file:
omap_xhci_core_init	drivers/usb/host/xhci-omap.c	/^static int omap_xhci_core_init(struct omap_xhci *omap)$/;"	f	typeref:typename:int	file:
omapimage_check_image_types	tools/omapimage.c	/^static int omapimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
omapimage_header	tools/omapimage.c	/^static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE];$/;"	v	typeref:typename:uint8_t[]	file:
omapimage_print_header	tools/omapimage.c	/^static void omapimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
omapimage_print_section	tools/omapimage.c	/^static void omapimage_print_section(struct ch_settings *chs)$/;"	f	typeref:typename:void	file:
omapimage_set_header	tools/omapimage.c	/^static void omapimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
omapimage_verify_header	tools/omapimage.c	/^static int omapimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
omgr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	omgr; \/* Outbound Multicast Group Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
omgr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	omgr;	        \/* 0xd3030 - Outbound Multicast Group Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
omi	arch/powerpc/include/asm/fsl_pamu.h	/^			uint16_t omi;$/;"	m	struct:paace::__anon6139da31040a::__anon6139da310608	typeref:typename:uint16_t
omimr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 omimr;		\/* 0x34 Outbound message interrupt mask register *\/$/;"	m	struct:dma83xx	typeref:typename:u32
omisr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 omisr;		\/* 0x30 Outbound message interrupt status register *\/$/;"	m	struct:dma83xx	typeref:typename:u32
omlr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	omlr; \/* Outbound Multicast List Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
omlr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	omlr;	        \/* 0xd3034 - Outbound Multicast List Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
omr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	omr; \/* Outbound Mode Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
omr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	omr;		\/* 0xd3000 - Outbound Mode Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
omr0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 omr0;		\/* 0x58 Outbound message register 0 *\/$/;"	m	struct:dma83xx	typeref:typename:u32
omr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 omr1;		\/* 0x5C Outbound message register 1 *\/$/;"	m	struct:dma83xx	typeref:typename:u32
omux0	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	omux0;$/;"	m	struct:iomuxc	typeref:typename:u32
omux1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	omux1;$/;"	m	struct:iomuxc	typeref:typename:u32
omux2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	omux2;$/;"	m	struct:iomuxc	typeref:typename:u32
omux3	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	omux3;$/;"	m	struct:iomuxc	typeref:typename:u32
omux4	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	omux4;$/;"	m	struct:iomuxc	typeref:typename:u32
on	cmd/led.c	/^	void		(*on)(void);	\/* Optional function for turning LED on *\/$/;"	m	struct:led_tbl_s	typeref:typename:void (*)(void)	file:
on	doc/README.x86	/^on by enabling the ROM build:$/;"	l
on	doc/README.x86	/^on other architectures, like below:$/;"	l
on	doc/README.x86	/^on the 'coreboot-Google_Samus.*' file to short-circuit some of the below.$/;"	l
on	drivers/power/domain/sandbox-power-domain.c	/^	bool on[SANDBOX_POWER_DOMAINS];$/;"	m	struct:sandbox_power_domain	typeref:typename:bool[]	file:
on	include/ec_commands.h	/^		} dump, off, on, init, get_seq, get_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::__anon71a6b2670208
on	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
on	include/power-domain-uclass.h	/^	int (*on)(struct power_domain *power_domain);$/;"	m	struct:power_domain_ops	typeref:typename:int (*)(struct power_domain * power_domain)
on_about1_activate	scripts/kconfig/gconf.c	/^void on_about1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_back_clicked	scripts/kconfig/gconf.c	/^void on_back_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_baudrate	drivers/serial/serial-uclass.c	/^static int on_baudrate(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_baudrate	drivers/serial/serial.c	/^static int on_baudrate(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_bootfile	net/net.c	/^static int on_bootfile(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_callbacks	common/env_callback.c	/^static int on_callbacks(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_collapse_clicked	scripts/kconfig/gconf.c	/^void on_collapse_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_console	common/console.c	/^static int on_console(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_dnsip	net/net.c	/^static int on_dnsip(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_ethaddr	net/eth-uclass.c	/^static int on_ethaddr(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_ethaddr	net/eth_legacy.c	/^static int on_ethaddr(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_expand_clicked	scripts/kconfig/gconf.c	/^void on_expand_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_flags	common/env_flags.c	/^static int on_flags(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_full_clicked	scripts/kconfig/gconf.c	/^void on_full_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_gatewayip	net/net.c	/^static int on_gatewayip(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_introduction1_activate	scripts/kconfig/gconf.c	/^void on_introduction1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_ipaddr	net/net.c	/^static int on_ipaddr(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_key_esc	scripts/kconfig/lxdialog/util.c	/^int on_key_esc(WINDOW *win)$/;"	f	typeref:typename:int
on_key_resize	scripts/kconfig/lxdialog/util.c	/^int on_key_resize(void)$/;"	f	typeref:typename:int
on_license1_activate	scripts/kconfig/gconf.c	/^void on_license1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_load1_activate	scripts/kconfig/gconf.c	/^void on_load1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_load_clicked	scripts/kconfig/gconf.c	/^void on_load_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_loadaddr	common/image.c	/^static int on_loadaddr(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_netmask	net/net.c	/^static int on_netmask(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_nvlan	net/net.c	/^static int on_nvlan(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_off	board/amcc/luan/luan.c	/^static int on_off( const char *s )$/;"	f	typeref:typename:int	file:
on_quit1_activate	scripts/kconfig/gconf.c	/^void on_quit1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_save_activate	scripts/kconfig/gconf.c	/^void on_save_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_save_as1_activate	scripts/kconfig/gconf.c	/^void on_save_as1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_serverip	net/net.c	/^static int on_serverip(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_set_option_mode1_activate	scripts/kconfig/gconf.c	/^on_set_option_mode1_activate(GtkMenuItem *menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_set_option_mode2_activate	scripts/kconfig/gconf.c	/^on_set_option_mode2_activate(GtkMenuItem *menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_set_option_mode3_activate	scripts/kconfig/gconf.c	/^on_set_option_mode3_activate(GtkMenuItem *menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_show_data1_activate	scripts/kconfig/gconf.c	/^void on_show_data1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_show_name1_activate	scripts/kconfig/gconf.c	/^void on_show_name1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_show_range1_activate	scripts/kconfig/gconf.c	/^void on_show_range1_activate(GtkMenuItem * menuitem, gpointer user_data)$/;"	f	typeref:typename:void
on_silent	common/console.c	/^static int on_silent(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_single_clicked	scripts/kconfig/gconf.c	/^void on_single_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_splashimage	common/lcd.c	/^static int on_splashimage(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_split_clicked	scripts/kconfig/gconf.c	/^void on_split_clicked(GtkButton * button, gpointer user_data)$/;"	f	typeref:typename:void
on_treeview1_button_press_event	scripts/kconfig/gconf.c	/^on_treeview1_button_press_event(GtkWidget * widget,$/;"	f	typeref:typename:gboolean
on_treeview2_button_press_event	scripts/kconfig/gconf.c	/^on_treeview2_button_press_event(GtkWidget * widget,$/;"	f	typeref:typename:gboolean
on_treeview2_cursor_changed	scripts/kconfig/gconf.c	/^on_treeview2_cursor_changed(GtkTreeView * treeview, gpointer user_data)$/;"	f	typeref:typename:void
on_treeview2_key_press_event	scripts/kconfig/gconf.c	/^on_treeview2_key_press_event(GtkWidget * widget,$/;"	f	typeref:typename:gboolean
on_vlan	net/net.c	/^static int on_vlan(const char *name, const char *value, enum env_op op,$/;"	f	typeref:typename:int	file:
on_window1_delete_event	scripts/kconfig/gconf.c	/^gboolean on_window1_delete_event(GtkWidget * widget, GdkEvent * event,$/;"	f	typeref:typename:gboolean
on_window1_destroy	scripts/kconfig/gconf.c	/^void on_window1_destroy(GtkObject * object, gpointer user_data)$/;"	f	typeref:typename:void
on_window1_size_request	scripts/kconfig/gconf.c	/^on_window1_size_request(GtkWidget * widget,$/;"	f	typeref:typename:void
onboard_pci_arbiter_selected	board/amcc/yucca/yucca.c	/^int onboard_pci_arbiter_selected(int core_pci)$/;"	f	typeref:typename:int
one_bit	drivers/usb/dwc3/core.h	/^	u32	one_bit:1;$/;"	m	struct:dwc3_event_depevt	typeref:typename:u32:1
one_bit	drivers/usb/dwc3/core.h	/^	u32	one_bit:1;$/;"	m	struct:dwc3_event_devt	typeref:typename:u32:1
one_bit	drivers/usb/dwc3/core.h	/^	u32	one_bit:1;$/;"	m	struct:dwc3_event_gevt	typeref:typename:u32:1
one_nand_cr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	one_nand_cr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
one_scratch_test	post/board/lwmon5/fpga.c	/^static int one_scratch_test(uint value)$/;"	f	typeref:typename:int	file:
onems	drivers/serial/serial_mxc.c	/^	u32 onems;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
onenand	drivers/mtd/onenand/samsung.c	/^static struct s3c_onenand *onenand;$/;"	v	typeref:struct:s3c_onenand *	file:
onenand_addr	drivers/mtd/onenand/onenand_base.c	/^loff_t onenand_addr(struct onenand_chip *this, int block)$/;"	f	typeref:typename:loff_t
onenand_bbt_read_oob	drivers/mtd/onenand/onenand_base.c	/^int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int
onenand_bbt_wait	drivers/mtd/onenand/onenand_base.c	/^static int onenand_bbt_wait(struct mtd_info *mtd, int state)$/;"	f	typeref:typename:int	file:
onenand_block	drivers/mtd/onenand/onenand_base.c	/^unsigned int onenand_block(struct onenand_chip *this, loff_t addr)$/;"	f	typeref:typename:unsigned int
onenand_block_address	drivers/mtd/onenand/onenand_base.c	/^static int onenand_block_address(struct onenand_chip *this, int block)$/;"	f	typeref:typename:int	file:
onenand_block_address	drivers/mtd/onenand/onenand_spl.c	/^#define onenand_block_address(/;"	d	file:
onenand_block_erase	cmd/onenand.c	/^static int onenand_block_erase(u32 start, u32 size, int force)$/;"	f	typeref:typename:int	file:
onenand_block_isbad	drivers/mtd/onenand/onenand_base.c	/^int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int
onenand_block_isbad_nolock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)$/;"	f	typeref:typename:int	file:
onenand_block_markbad	drivers/mtd/onenand/onenand_base.c	/^int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int
onenand_block_read	cmd/onenand.c	/^static int onenand_block_read(loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
onenand_block_test	cmd/onenand.c	/^static int onenand_block_test(u32 start, u32 size)$/;"	f	typeref:typename:int	file:
onenand_block_write	cmd/onenand.c	/^static int onenand_block_write(loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
onenand_board_init	board/isee/igep00x0/igep00x0.c	/^int onenand_board_init(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_board_init	board/micronas/vct/ebi_onenand.c	/^int onenand_board_init(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_board_init	board/samsung/goni/onenand.c	/^int onenand_board_init(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_board_init	board/samsung/smdkc100/onenand.c	/^int onenand_board_init(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_board_init	board/samsung/universal_c210/onenand.c	/^int onenand_board_init(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_buffer_address	drivers/mtd/onenand/onenand_base.c	/^static int onenand_buffer_address(int dataram1, int sectors, int count)$/;"	f	typeref:typename:int	file:
onenand_buffer_address	drivers/mtd/onenand/onenand_spl.c	/^#define onenand_buffer_address(/;"	d	file:
onenand_bufferram	include/linux/mtd/onenand.h	/^struct onenand_bufferram {$/;"	s
onenand_bufferram_address	drivers/mtd/onenand/onenand_base.c	/^static int onenand_bufferram_address(struct onenand_chip *this, int block)$/;"	f	typeref:typename:int	file:
onenand_bufferram_address	drivers/mtd/onenand/onenand_spl.c	/^#define onenand_bufferram_address(/;"	d	file:
onenand_bufferram_offset	board/micronas/vct/ebi_onenand.c	/^static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)$/;"	f	typeref:typename:int	file:
onenand_bufferram_offset	drivers/mtd/onenand/onenand_base.c	/^static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)$/;"	f	typeref:typename:int	file:
onenand_cache	fs/jffs2/jffs2_1pass.c	/^static u8* onenand_cache;$/;"	v	typeref:typename:u8 *	file:
onenand_cache_off	fs/jffs2/jffs2_1pass.c	/^static u32 onenand_cache_off = (u32)-1;$/;"	v	typeref:typename:u32	file:
onenand_check_bufferram	drivers/mtd/onenand/onenand_base.c	/^static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)$/;"	f	typeref:typename:int	file:
onenand_check_features	drivers/mtd/onenand/onenand_base.c	/^static void onenand_check_features(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
onenand_check_lock_status	drivers/mtd/onenand/onenand_base.c	/^static int onenand_check_lock_status(struct onenand_chip *this)$/;"	f	typeref:typename:int	file:
onenand_check_maf	drivers/mtd/onenand/onenand_base.c	/^static int onenand_check_maf(int manuf)$/;"	f	typeref:typename:int	file:
onenand_chip	drivers/mtd/onenand/onenand_uboot.c	/^struct onenand_chip onenand_chip;$/;"	v	typeref:struct:onenand_chip
onenand_chip	include/linux/mtd/onenand.h	/^struct onenand_chip {$/;"	s
onenand_chip_probe	drivers/mtd/onenand/onenand_base.c	/^static int onenand_chip_probe(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
onenand_command	drivers/mtd/onenand/onenand_base.c	/^static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,$/;"	f	typeref:typename:int	file:
onenand_default_bbt	drivers/mtd/onenand/onenand_bbt.c	/^int onenand_default_bbt(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_default_block_markbad	drivers/mtd/onenand/onenand_base.c	/^static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
onenand_do_lock_cmd	drivers/mtd/onenand/onenand_base.c	/^static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)$/;"	f	typeref:typename:int	file:
onenand_dump	cmd/onenand.c	/^static int onenand_dump(struct mtd_info *mtd, ulong off, int only_oob)$/;"	f	typeref:typename:int	file:
onenand_erase	drivers/mtd/onenand/onenand_base.c	/^int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int
onenand_fill_auto_oob	drivers/mtd/onenand/onenand_base.c	/^static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,$/;"	f	typeref:typename:int	file:
onenand_get_2x_blockpage	drivers/mtd/onenand/onenand_base.c	/^static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)$/;"	f	typeref:typename:int	file:
onenand_get_density	drivers/mtd/onenand/onenand_base.c	/^static inline int onenand_get_density(int dev_id)$/;"	f	typeref:typename:int	file:
onenand_get_device	drivers/mtd/onenand/onenand_base.c	/^static void onenand_get_device(struct mtd_info *mtd, int new_state)$/;"	f	typeref:typename:void	file:
onenand_init	drivers/mtd/onenand/onenand_uboot.c	/^void onenand_init(void)$/;"	f	typeref:typename:void
onenand_invalidate_bufferram	drivers/mtd/onenand/onenand_base.c	/^static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,$/;"	f	typeref:typename:void	file:
onenand_isbad_bbt	drivers/mtd/onenand/onenand_bbt.c	/^static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)$/;"	f	typeref:typename:int	file:
onenand_lock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)$/;"	f	typeref:typename:int	file:
onenand_manuf_ids	drivers/mtd/onenand/onenand_base.c	/^static const struct onenand_manufacturers onenand_manuf_ids[] = {$/;"	v	typeref:typename:const struct onenand_manufacturers[]	file:
onenand_manufacturers	include/linux/mtd/onenand.h	/^struct onenand_manufacturers {$/;"	s
onenand_memory_bbt	drivers/mtd/onenand/onenand_bbt.c	/^static inline int onenand_memory_bbt(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
onenand_mtd	drivers/mtd/onenand/onenand_uboot.c	/^struct mtd_info onenand_mtd;$/;"	v	typeref:struct:mtd_info
onenand_oob_128	drivers/mtd/onenand/onenand_base.c	/^static struct nand_ecclayout onenand_oob_128 = {$/;"	v	typeref:struct:nand_ecclayout	file:
onenand_oob_32	drivers/mtd/onenand/onenand_base.c	/^static struct nand_ecclayout onenand_oob_32 = {$/;"	v	typeref:struct:nand_ecclayout	file:
onenand_oob_64	drivers/mtd/onenand/onenand_base.c	/^static struct nand_ecclayout onenand_oob_64 = {$/;"	v	typeref:struct:nand_ecclayout	file:
onenand_page_address	drivers/mtd/onenand/onenand_base.c	/^static int onenand_page_address(int page, int sector)$/;"	f	typeref:typename:int	file:
onenand_print_device_info	drivers/mtd/onenand/onenand_base.c	/^char *onenand_print_device_info(int device, int version)$/;"	f	typeref:typename:char *
onenand_probe	drivers/mtd/onenand/onenand_base.c	/^int onenand_probe(struct mtd_info *mtd)$/;"	f	typeref:typename:int
onenand_read	drivers/mtd/onenand/onenand_base.c	/^int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int
onenand_read_bufferram	drivers/mtd/onenand/onenand_base.c	/^static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
onenand_read_bufferram	drivers/mtd/onenand/samsung.c	/^static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
onenand_read_ecc	drivers/mtd/onenand/onenand_base.c	/^static int onenand_read_ecc(struct onenand_chip *this)$/;"	f	typeref:typename:int	file:
onenand_read_oob	drivers/mtd/onenand/onenand_base.c	/^int onenand_read_oob(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int
onenand_read_oob_nolock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
onenand_read_ops_nolock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
onenand_readw	drivers/mtd/onenand/onenand_base.c	/^static unsigned short onenand_readw(void __iomem * addr)$/;"	f	typeref:typename:unsigned short	file:
onenand_readw	drivers/mtd/onenand/onenand_spl.c	/^static inline uint16_t onenand_readw(uint32_t addr)$/;"	f	typeref:typename:uint16_t	file:
onenand_recover_lsb	drivers/mtd/onenand/onenand_base.c	/^static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)$/;"	f	typeref:typename:int	file:
onenand_release	drivers/mtd/onenand/onenand_base.c	/^void onenand_release(struct mtd_info *mtd)$/;"	f	typeref:typename:void
onenand_release_device	drivers/mtd/onenand/onenand_base.c	/^static void onenand_release_device(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
onenand_reloc	cmd/onenand.c	/^void onenand_reloc(void) {$/;"	f	typeref:typename:void
onenand_scan	drivers/mtd/onenand/onenand_base.c	/^int onenand_scan(struct mtd_info *mtd, int maxchips)$/;"	f	typeref:typename:int
onenand_scan_bbt	drivers/mtd/onenand/onenand_bbt.c	/^int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)$/;"	f	typeref:typename:int
onenand_sector_address	drivers/mtd/onenand/onenand_spl.c	/^#define onenand_sector_address(/;"	d	file:
onenand_spl_get_geometry	drivers/mtd/onenand/onenand_spl.c	/^static enum onenand_spl_pagesize onenand_spl_get_geometry(void)$/;"	f	typeref:enum:onenand_spl_pagesize	file:
onenand_spl_load_image	drivers/mtd/onenand/onenand_spl.c	/^void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst)$/;"	f	typeref:typename:void
onenand_spl_pagesize	drivers/mtd/onenand/onenand_spl.c	/^enum onenand_spl_pagesize {$/;"	g	file:
onenand_spl_read_block	drivers/mtd/onenand/onenand_spl.c	/^int onenand_spl_read_block(int block, int offset, int len, void *dst)$/;"	f	typeref:typename:int
onenand_spl_read_page	drivers/mtd/onenand/onenand_spl.c	/^static int onenand_spl_read_page(uint32_t block, uint32_t page, uint32_t *buf,$/;"	f	typeref:typename:int	file:
onenand_sync	drivers/mtd/onenand/onenand_base.c	/^void onenand_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void
onenand_sync_read_bufferram	drivers/mtd/onenand/onenand_base.c	/^static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
onenand_transfer_auto_oob	drivers/mtd/onenand/onenand_base.c	/^static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf,$/;"	f	typeref:typename:int	file:
onenand_unlock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)$/;"	f	typeref:typename:int	file:
onenand_unlock_all	drivers/mtd/onenand/onenand_base.c	/^static void onenand_unlock_all(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
onenand_update_bufferram	drivers/mtd/onenand/onenand_base.c	/^static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,$/;"	f	typeref:typename:int	file:
onenand_verify	drivers/mtd/onenand/onenand_base.c	/^#define onenand_verify(/;"	d	file:
onenand_verify	drivers/mtd/onenand/onenand_base.c	/^static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)$/;"	f	typeref:typename:int	file:
onenand_verify_oob	drivers/mtd/onenand/onenand_base.c	/^#define onenand_verify_oob(/;"	d	file:
onenand_verify_oob	drivers/mtd/onenand/onenand_base.c	/^static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)$/;"	f	typeref:typename:int	file:
onenand_wait	drivers/mtd/onenand/onenand_base.c	/^static int onenand_wait(struct mtd_info *mtd, int state)$/;"	f	typeref:typename:int	file:
onenand_write	drivers/mtd/onenand/onenand_base.c	/^int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int
onenand_write_bufferram	drivers/mtd/onenand/onenand_base.c	/^static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
onenand_write_bufferram	drivers/mtd/onenand/samsung.c	/^static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,$/;"	f	typeref:typename:int	file:
onenand_write_oneblock_withoob	cmd/onenand.c	/^static int onenand_write_oneblock_withoob(loff_t to, const u_char * buf,$/;"	f	typeref:typename:int	file:
onenand_write_oob	drivers/mtd/onenand/onenand_base.c	/^int onenand_write_oob(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int
onenand_write_oob_nolock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
onenand_write_ops_nolock	drivers/mtd/onenand/onenand_base.c	/^static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
onenand_writew	drivers/mtd/onenand/onenand_base.c	/^static void onenand_writew(unsigned short value, void __iomem * addr)$/;"	f	typeref:typename:void	file:
onenand_writew	drivers/mtd/onenand/onenand_spl.c	/^static inline void onenand_writew(uint16_t value, uint32_t addr)$/;"	f	typeref:typename:void	file:
onenandxl_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	onenandxl_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
ones	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 ones;			\/* MBAR_ETH + 0x110 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
onewire	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 onewire;	\/*0x048*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
onfi_async_timing_mode_to_sdr_timings	drivers/mtd/nand/nand_timings.c	/^const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode)$/;"	f	typeref:typename:const struct nand_sdr_timings *
onfi_crc16	drivers/mtd/nand/nand_base.c	/^static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)$/;"	f	typeref:typename:u16	file:
onfi_ext_ecc_info	include/linux/mtd/nand.h	/^struct onfi_ext_ecc_info {$/;"	s
onfi_ext_param_page	include/linux/mtd/nand.h	/^struct onfi_ext_param_page {$/;"	s
onfi_ext_section	include/linux/mtd/nand.h	/^struct onfi_ext_section {$/;"	s
onfi_feature	include/linux/mtd/nand.h	/^static inline int onfi_feature(struct nand_chip *chip)$/;"	f	typeref:typename:int
onfi_get_async_timing_mode	include/linux/mtd/nand.h	/^static inline int onfi_get_async_timing_mode(struct nand_chip *chip)$/;"	f	typeref:typename:int
onfi_get_features	include/linux/mtd/nand.h	/^	int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,int feature_addr,uint8_t * subfeature_para)
onfi_get_sync_timing_mode	include/linux/mtd/nand.h	/^static inline int onfi_get_sync_timing_mode(struct nand_chip *chip)$/;"	f	typeref:typename:int
onfi_params	include/linux/mtd/nand.h	/^	struct nand_onfi_params	onfi_params;$/;"	m	struct:nand_chip	typeref:struct:nand_onfi_params
onfi_sdr_timings	drivers/mtd/nand/nand_timings.c	/^static const struct nand_sdr_timings onfi_sdr_timings[] = {$/;"	v	typeref:typename:const struct nand_sdr_timings[]	file:
onfi_set_features	include/linux/mtd/nand.h	/^	int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,int feature_addr,uint8_t * subfeature_para)
onfi_timing_mode	drivers/mtd/nand/denali.c	/^static int onfi_timing_mode = NAND_DEFAULT_TIMINGS;$/;"	v	typeref:typename:int	file:
onfi_timing_mode_default	include/linux/mtd/nand.h	/^	int onfi_timing_mode_default;$/;"	m	struct:nand_chip	typeref:typename:int
onfi_timing_mode_default	include/linux/mtd/nand.h	/^	int onfi_timing_mode_default;$/;"	m	struct:nand_flash_dev	typeref:typename:int
onfi_version	include/linux/mtd/nand.h	/^	int onfi_version;$/;"	m	struct:nand_chip	typeref:typename:int
only_enhanced_framing	drivers/video/tegra124/sor.h	/^	int	only_enhanced_framing;	\/* enhanced_frame_en ignored *\/$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
oob	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int oob;        \/* Non zero if operating on OOB data     *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
oob	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int oob;        \/* Non zero if operating on OOB data     *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
oob_2048_ecc4	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_2048_ecc4 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_4096_ecc4	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_4096_ecc4 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_4096_ecc8	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_4096_ecc8 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_512_16bit_ecc4	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_512_16bit_ecc4 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_512_8bit_ecc4	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_512_8bit_ecc4 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_8192_ecc4	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_8192_ecc4 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_8192_ecc8	drivers/mtd/nand/fsl_ifc_nand.c	/^static struct nand_ecclayout oob_8192_ecc8 = {$/;"	v	typeref:struct:nand_ecclayout	file:
oob_buf	drivers/mtd/nand/mxs_nand.c	/^	uint8_t		*oob_buf;$/;"	m	struct:mxs_nand_info	typeref:typename:uint8_t *	file:
oob_buf	drivers/mtd/onenand/samsung.c	/^	void __iomem	*oob_buf;$/;"	m	struct:s3c_onenand	typeref:typename:void __iomem *	file:
oob_buf	include/linux/mtd/onenand.h	/^	unsigned char		*oob_buf;$/;"	m	struct:onenand_chip	typeref:typename:unsigned char *
oob_buff	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned char		*oob_buff;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned char *	file:
oob_buff_pos	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		oob_buff_pos;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
oob_poi	include/linux/mtd/nand.h	/^	uint8_t *oob_poi;$/;"	m	struct:nand_chip	typeref:typename:uint8_t *
oob_size	drivers/mtd/nand/denali_spl.c	/^static int page_size, oob_size, pages_per_block;$/;"	v	typeref:typename:int	file:
oob_size	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		oob_size;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
oobavail	include/linux/mtd/mtd.h	/^	__u32 oobavail;$/;"	m	struct:nand_ecclayout	typeref:typename:__u32
oobavail	include/linux/mtd/mtd.h	/^	uint32_t oobavail;  \/\/ Available OOB bytes per block$/;"	m	struct:mtd_info	typeref:typename:uint32_t
oobavail	include/mtd/mtd-abi.h	/^	__u32 oobavail;$/;"	m	struct:nand_ecclayout_user	typeref:typename:__u32
oobbuf	include/linux/mtd/mtd.h	/^	uint8_t		*oobbuf;$/;"	m	struct:mtd_oob_ops	typeref:typename:uint8_t *
oobfree	include/linux/mtd/mtd.h	/^	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];$/;"	m	struct:nand_ecclayout	typeref:struct:nand_oobfree[]
oobfree	include/mtd/mtd-abi.h	/^	__u32 oobfree[8][2];$/;"	m	struct:nand_oobinfo	typeref:typename:__u32[8][2]
oobfree	include/mtd/mtd-abi.h	/^	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];$/;"	m	struct:nand_ecclayout_user	typeref:struct:nand_oobfree[]
ooblen	include/linux/mtd/mtd.h	/^	size_t		ooblen;$/;"	m	struct:mtd_oob_ops	typeref:typename:size_t
ooblen	include/mtd/mtd-abi.h	/^	__u64 ooblen;$/;"	m	struct:mtd_write_req	typeref:typename:__u64
ooboffs	include/linux/mtd/mtd.h	/^	uint32_t	ooboffs;$/;"	m	struct:mtd_oob_ops	typeref:typename:uint32_t
oobr	drivers/block/dwc_ahsata.c	/^	u32 oobr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
oobretlen	include/linux/mtd/mtd.h	/^	size_t		oobretlen;$/;"	m	struct:mtd_oob_ops	typeref:typename:size_t
oobsize	include/linux/mtd/mtd.h	/^	uint32_t oobsize;   \/\/ Amount of OOB data per block (e.g. 16)$/;"	m	struct:mtd_info	typeref:typename:uint32_t
oobsize	include/linux/mtd/nand.h	/^	uint16_t oobsize;$/;"	m	struct:nand_flash_dev	typeref:typename:uint16_t
oobsize	include/mtd/mtd-abi.h	/^	__u32 oobsize;	\/* Amount of OOB data per block (e.g. 16) *\/$/;"	m	struct:mtd_info_user	typeref:typename:__u32
op	arch/arm/include/asm/arch-mx5/crm_regs.h	/^	u32 op;$/;"	m	struct:mxc_pll_reg	typeref:typename:u32
op	cmd/itest.c	/^	char	*op;		\/* operator string *\/$/;"	m	struct:op_tbl_s	typeref:typename:char *	file:
op	cmd/test.c	/^	int op;$/;"	m	struct:__anone06382f90108	typeref:typename:int	file:
op	drivers/misc/swap_case.c	/^	enum swap_case_op op;$/;"	m	struct:swap_case_priv	typeref:enum:swap_case_op	file:
op	include/bedbug/ppc.h	/^  struct opcode *	op;$/;"	m	struct:ppc_ctx	typeref:struct:opcode *
op	include/ec_commands.h	/^	uint32_t op;$/;"	m	struct:ec_params_vbnvcontext	typeref:typename:uint32_t
op	lib/zlib/inftrees.h	/^    unsigned char op;           \/* operation, extra bits, table bits *\/$/;"	m	struct:__anon4cf584e10108	typeref:typename:unsigned char
op	post/lib_powerpc/two.c	/^    ulong op;$/;"	m	struct:cpu_post_two_s	typeref:typename:ulong	file:
op	post/lib_powerpc/twox.c	/^    ulong op;$/;"	m	struct:cpu_post_twox_s	typeref:typename:ulong	file:
op0	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	op0;		\/* PSC + 0x3c *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
op0	include/mpc5xxx.h	/^	volatile u8	op0;		\/* PSC + 0x3c *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
op0	post/lib_powerpc/rlwimi.c	/^    ulong op0;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:ulong	file:
op1	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	op1;		\/* PSC + 0x38 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u8
op1	include/mpc5xxx.h	/^	volatile u8	op1;		\/* PSC + 0x38 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
op1	post/lib_powerpc/andi.c	/^    ulong op1;$/;"	m	struct:cpu_post_andi_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/cmp.c	/^    ulong op1;$/;"	m	struct:cpu_post_cmp_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/cmpi.c	/^    ulong op1;$/;"	m	struct:cpu_post_cmpi_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/cr.c	/^    ulong op1;$/;"	m	struct:cpu_post_cr_s4	typeref:typename:ulong	file:
op1	post/lib_powerpc/rlwimi.c	/^    ulong op1;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/rlwinm.c	/^    ulong op1;$/;"	m	struct:cpu_post_rlwinm_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/rlwnm.c	/^    ulong op1;$/;"	m	struct:cpu_post_rlwnm_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/srawi.c	/^    ulong op1;$/;"	m	struct:cpu_post_srawi_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/three.c	/^    ulong op1;$/;"	m	struct:cpu_post_three_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/threei.c	/^    ulong op1;$/;"	m	struct:cpu_post_threei_s	typeref:typename:ulong	file:
op1	post/lib_powerpc/threex.c	/^    ulong op1;$/;"	m	struct:cpu_post_threex_s	typeref:typename:ulong	file:
op2	post/lib_powerpc/andi.c	/^    ushort op2;$/;"	m	struct:cpu_post_andi_s	typeref:typename:ushort	file:
op2	post/lib_powerpc/cmp.c	/^    ulong op2;$/;"	m	struct:cpu_post_cmp_s	typeref:typename:ulong	file:
op2	post/lib_powerpc/cmpi.c	/^    ushort op2;$/;"	m	struct:cpu_post_cmpi_s	typeref:typename:ushort	file:
op2	post/lib_powerpc/cr.c	/^    ulong op2;$/;"	m	struct:cpu_post_cr_s4	typeref:typename:ulong	file:
op2	post/lib_powerpc/rlwimi.c	/^    uchar op2;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:uchar	file:
op2	post/lib_powerpc/rlwinm.c	/^    uchar op2;$/;"	m	struct:cpu_post_rlwinm_s	typeref:typename:uchar	file:
op2	post/lib_powerpc/rlwnm.c	/^    ulong op2;$/;"	m	struct:cpu_post_rlwnm_s	typeref:typename:ulong	file:
op2	post/lib_powerpc/srawi.c	/^    uchar op2;$/;"	m	struct:cpu_post_srawi_s	typeref:typename:uchar	file:
op2	post/lib_powerpc/three.c	/^    ulong op2;$/;"	m	struct:cpu_post_three_s	typeref:typename:ulong	file:
op2	post/lib_powerpc/threei.c	/^    ushort op2;$/;"	m	struct:cpu_post_threei_s	typeref:typename:ushort	file:
op2	post/lib_powerpc/threex.c	/^    ulong op2;$/;"	m	struct:cpu_post_threex_s	typeref:typename:ulong	file:
op3	post/lib_powerpc/cr.c	/^    ulong op3;$/;"	m	struct:cpu_post_cr_s4	typeref:typename:ulong	file:
opF6_names	drivers/bios_emulator/x86emu/ops.c	/^static char *opF6_names[8] =$/;"	v	typeref:typename:char * [8]	file:
op_adv	cmd/test.c	/^} op_adv[] = {$/;"	v	typeref:typename:const struct __anone06382f90108[]
op_cond_pending	include/mmc.h	/^	char op_cond_pending;	\/* 1 if we are waiting on an op_cond command *\/$/;"	m	struct:mmc	typeref:typename:char
op_count	include/dm/test.h	/^	int op_count[DM_TEST_OP_COUNT];$/;"	m	struct:dm_test_priv	typeref:typename:int[]
op_done	drivers/crypto/fsl/jr.h	/^	uint32_t op_done;$/;"	m	struct:jr_info	typeref:typename:uint32_t
op_encode	arch/powerpc/include/asm/fsl_pamu.h	/^	} op_encode;$/;"	m	struct:paace	typeref:union:paace::__anon6139da31040a
op_execute_func_arr	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^op_execute_func_ptr op_execute_func_arr[] = {$/;"	v	typeref:typename:op_execute_func_ptr[]
op_execute_func_ptr	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^typedef int (*op_execute_func_ptr)(u32 serdes_num, struct op_params *params,$/;"	t	typeref:typename:int (*)(u32 serdes_num,struct op_params * params,u32 data_arr_idx)
op_mode	drivers/net/uli526x.c	/^	u8 op_mode;			\/* real work dedia mode *\/$/;"	m	struct:uli526x_board_info	typeref:typename:u8	file:
op_params	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^struct op_params {$/;"	s
op_params_ptr	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	struct op_params *op_params_ptr;$/;"	m	struct:cfg_seq	typeref:struct:op_params *
op_pause	arch/powerpc/include/asm/immap_512x.h	/^	u32	op_pause;	\/* Opcode + pause duration *\/$/;"	m	struct:fec512x	typeref:typename:u32
op_pause	drivers/net/fec_mxc.h	/^	uint32_t op_pause;		\/* MBAR_ETH + 0x0EC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
op_pause	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 op_pause;		\/* MBAR_ETH + 0x0EC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
op_ring	drivers/crypto/fsl/jr.h	/^struct op_ring {$/;"	s
op_size	drivers/crypto/fsl/jr.h	/^	int op_size;$/;"	m	struct:jobring	typeref:typename:int
op_t	arch/x86/lib/string.c	/^typedef uint32_t op_t;$/;"	t	typeref:typename:uint32_t	file:
op_table	cmd/itest.c	/^static const op_tbl_t op_table [] = {$/;"	v	typeref:typename:const op_tbl_t[]	file:
op_tbl_s	cmd/itest.c	/^struct op_tbl_s {$/;"	s	file:
op_tbl_t	cmd/itest.c	/^typedef struct op_tbl_s op_tbl_t;$/;"	t	typeref:struct:op_tbl_s	file:
opacr0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	opacr0;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	opacr0;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	opacr1;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	opacr1;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	opacr2;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	opacr2;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	opacr3;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	opacr3;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	opacr4;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	opacr4;$/;"	m	struct:aipstz_regs	typeref:typename:u32
opacr_0_7	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 opacr_0_7;$/;"	m	struct:aips_regs	typeref:typename:u32
opacr_16_23	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 opacr_16_23;$/;"	m	struct:aips_regs	typeref:typename:u32
opacr_24_31	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 opacr_24_31;$/;"	m	struct:aips_regs	typeref:typename:u32
opacr_32_39	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 opacr_32_39;$/;"	m	struct:aips_regs	typeref:typename:u32
opacr_8_15	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 opacr_8_15;$/;"	m	struct:aips_regs	typeref:typename:u32
opaque	include/bzlib.h	/^      void *opaque;$/;"	m	struct:__anond8626de10108	typeref:typename:void *
opaque	include/u-boot/zlib.h	/^	voidpf	opaque;	\/* private data object passed to zalloc and zfree *\/$/;"	m	struct:z_stream_s	typeref:typename:voidpf
opcD0_byte_operation	drivers/bios_emulator/x86emu/ops.c	/^static u8(*opcD0_byte_operation[])(u8 d, u8 s) =$/;"	v	typeref:typename:u8 (* [])(u8 d,u8 s)	file:
opcD1_long_operation	drivers/bios_emulator/x86emu/ops.c	/^static u32 (*opcD1_long_operation[])(u32 s, u8 d) =$/;"	v	typeref:typename:u32 (* [])(u32 s,u8 d)	file:
opcD1_word_operation	drivers/bios_emulator/x86emu/ops.c	/^static u16(*opcD1_word_operation[])(u16 s, u8 d) =$/;"	v	typeref:typename:u16 (* [])(u16 s,u8 d)	file:
opclk_divs	drivers/sound/wm8994.c	/^static int opclk_divs[] = { 10, 20, 30, 40, 55, 60, 80, 120, 160 };$/;"	v	typeref:typename:int[]	file:
opcode	cmd/itest.c	/^	int	opcode;		\/* internal representation of opcode *\/$/;"	m	struct:op_tbl_s	typeref:typename:int	file:
opcode	drivers/spi/ich.h	/^	uint8_t opcode;$/;"	m	struct:spi_trans	typeref:typename:uint8_t
opcode	include/bedbug/ppc.h	/^  unsigned long	opcode;		\/* The complete opcode as produced by$/;"	m	struct:opcode	typeref:typename:unsigned long
opcode	include/bedbug/ppc.h	/^struct opcode {$/;"	s
opcode_bits	drivers/net/e1000.h	/^	uint16_t opcode_bits;$/;"	m	struct:e1000_eeprom_info	typeref:typename:uint16_t
opcodes	include/bedbug/tables.h	/^struct opcode opcodes[] = {$/;"	v	typeref:struct:opcode[]
opcodes	lib/slre.c	/^} opcodes[] = {$/;"	v	typeref:struct:__anon5875e6120208[]
opd	arch/m68k/include/asm/fec.h	/^	u32 opd;		\/* 0x100 - dummy  *\/$/;"	m	struct:fec	typeref:typename:u32
opd	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 opd;		\/* 0x0EC *\/$/;"	m	struct:fecdma	typeref:typename:u32
open	include/tpm.h	/^	int (*open)(struct udevice *dev);$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev)
open_cfg_super_IO	board/mpl/common/isa.c	/^unsigned char open_cfg_super_IO(int address)$/;"	f	typeref:typename:unsigned char
open_count	include/efi.h	/^	u32 open_count;$/;"	m	struct:efi_open_protocol_info_entry	typeref:typename:u32
open_drain	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic open_drain;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
open_drain	include/ioports.h	/^	int		open_drain;$/;"	m	struct:__anonc67861fe0308	typeref:typename:int
open_for_read	tools/ifdtool.c	/^int open_for_read(const char *fname, int *sizep)$/;"	f	typeref:typename:int
open_mtd_by_chdev	drivers/mtd/ubi/build.c	/^static struct mtd_info * __init open_mtd_by_chdev(const char *mtd_dev)$/;"	f	typeref:struct:mtd_info * __init	file:
open_mtd_device	drivers/mtd/ubi/build.c	/^static struct mtd_info * __init open_mtd_device(const char *mtd_dev)$/;"	f	typeref:struct:mtd_info * __init	file:
open_port	arch/powerpc/cpu/mpc512x/serial.c	/^struct stdio_dev *open_port(int num, int baudrate)$/;"	f	typeref:struct:stdio_dev *
open_ubi	fs/ubifs/super.c	/^static struct ubi_volume_desc *open_ubi(const char *name, int mode)$/;"	f	typeref:struct:ubi_volume_desc *	file:
opencr	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	opencr;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
operand	include/bedbug/ppc.h	/^struct operand {$/;"	s
operands	include/bedbug/tables.h	/^struct operand operands[] = {$/;"	v	typeref:struct:operand[]
operation	drivers/mtd/nand/mxc_nand.h	/^#define operation	/;"	d
operation_mode	arch/x86/include/asm/me_common.h	/^	u32 operation_mode:4;$/;"	m	struct:me_hfs	typeref:typename:u32:4
operation_state	arch/x86/include/asm/me_common.h	/^	u32 operation_state:3;$/;"	m	struct:me_hfs	typeref:typename:u32:3
operations	include/xilinx.h	/^	struct xilinx_fpga_op *operations; \/* operations *\/$/;"	m	struct:__anon15c234ca0308	typeref:struct:xilinx_fpga_op *
opmenu	drivers/spi/ich.h	/^	int opmenu;$/;"	m	struct:ich_spi_priv	typeref:typename:int
opmenu	drivers/spi/ich.h	/^	uint8_t opmenu[8];	\/* 0x98 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t[8]
opmenu	drivers/spi/ich.h	/^	uint8_t opmenu[8];$/;"	m	struct:ich7_spi_regs	typeref:typename:uint8_t[8]
opmode	drivers/net/designware.h	/^	u32 opmode;		\/* 0x18 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
oprth	board/keymile/common/common.h	/^	unsigned char	oprth;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
oprtl	board/keymile/common/common.h	/^	unsigned char	oprtl;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
ops	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk_ops *ops;$/;"	m	struct:clk	typeref:struct:clk_ops *
ops	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk_ops *ops;$/;"	m	struct:clk	typeref:struct:clk_ops *
ops	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const struct tegra_xusb_phy_ops *ops;$/;"	m	struct:tegra_xusb_phy	typeref:typename:const struct tegra_xusb_phy_ops *
ops	arch/arm/mach-zynq/clk.c	/^	struct zynq_clk_ops	ops;$/;"	m	struct:clk	typeref:struct:zynq_clk_ops	file:
ops	drivers/block/sata_dwc.h	/^	const struct ata_port_operations *ops;$/;"	m	struct:ata_host	typeref:typename:const struct ata_port_operations *
ops	drivers/net/altera_tse.h	/^	const struct tse_ops *ops;$/;"	m	struct:altera_tse_priv	typeref:typename:const struct tse_ops *
ops	drivers/usb/gadget/f_mass_storage.c	/^	const struct fsg_operations	*ops;$/;"	m	struct:fsg_common	typeref:typename:const struct fsg_operations *	file:
ops	drivers/usb/gadget/f_mass_storage.c	/^	const struct fsg_operations     *ops;$/;"	m	struct:fsg_config	typeref:typename:const struct fsg_operations *	file:
ops	drivers/usb/gadget/pxa25x_udc.h	/^		unsigned long		ops;$/;"	m	struct:udc_stats::ep0stats	typeref:typename:unsigned long
ops	drivers/usb/host/ehci.h	/^	struct ehci_ops ops;$/;"	m	struct:ehci_ctrl	typeref:struct:ehci_ops
ops	drivers/usb/musb-new/musb_core.h	/^	const struct musb_platform_ops *ops;$/;"	m	struct:musb	typeref:typename:const struct musb_platform_ops *
ops	include/dm/device.h	/^	const void *ops;	\/* driver-specific operations *\/$/;"	m	struct:driver	typeref:typename:const void *
ops	include/dm/uclass.h	/^	const void *ops;$/;"	m	struct:uclass_driver	typeref:typename:const void *
ops	include/linux/usb/gadget.h	/^	const struct usb_ep_ops	*ops;$/;"	m	struct:usb_ep	typeref:typename:const struct usb_ep_ops *
ops	include/linux/usb/gadget.h	/^	const struct usb_gadget_ops	*ops;$/;"	m	struct:usb_gadget	typeref:typename:const struct usb_gadget_ops *
ops	include/mmc.h	/^	const struct mmc_ops *ops;$/;"	m	struct:mmc_config	typeref:typename:const struct mmc_ops *
ops	include/sdhci.h	/^	const struct sdhci_ops *ops;$/;"	m	struct:sdhci_host	typeref:typename:const struct sdhci_ops *
ops	lib/efi_loader/efi_disk.c	/^	struct efi_block_io ops;$/;"	m	struct:efi_disk_obj	typeref:struct:efi_block_io	file:
ops	lib/efi_loader/efi_gop.c	/^	struct efi_gop ops;$/;"	m	struct:efi_gop_obj	typeref:struct:efi_gop	file:
opt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 opt;$/;"	m	struct:edma3_slot_config	typeref:typename:u32
opt	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 opt;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
optMode	scripts/kconfig/qconf.h	/^	enum optionMode optMode;$/;"	m	class:ConfigList	typeref:enum:optionMode
opt_cmd	include/linux/mtd/nand.h	/^	__le16 opt_cmd;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
opt_cmd	include/linux/mtd/nand.h	/^	u8 opt_cmd[3];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[3]
opt_feature	include/ddr_spd.h	/^	uint8_t opt_feature;		\/*  7 Optional features *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
opt_features	include/ddr_spd.h	/^	unsigned char opt_features;    \/* 30 SDRAM Optional Features *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
opt_hdr_v1	tools/kwbimage.h	/^struct opt_hdr_v1 {$/;"	s
opt_len	lib/zlib/deflate.h	/^    ulg opt_len;        \/* bit length of current block with optimal trees *\/$/;"	m	struct:internal_state	typeref:typename:ulg
opt_mode	scripts/kconfig/gconf.c	/^static int opt_mode = OPT_NORMAL;$/;"	v	typeref:typename:int	file:
optcr	drivers/mtd/stm32_flash.h	/^	u32 optcr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
optcr1	drivers/mtd/stm32_flash.h	/^	u32 optcr1;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
optfclk_pciephy1_32khz	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy1_32khz: optfclk_pciephy1_32khz@4a0093b0 {$/;"	l
optfclk_pciephy1_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy1_clk: optfclk_pciephy1_clk@4a0093b0 {$/;"	l
optfclk_pciephy1_div_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy1_div_clk: optfclk_pciephy1_div_clk@4a0093b0 {$/;"	l
optfclk_pciephy2_32khz	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy2_32khz: optfclk_pciephy2_32khz@4a0093b8 {$/;"	l
optfclk_pciephy2_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy2_clk: optfclk_pciephy2_clk@4a0093b8 {$/;"	l
optfclk_pciephy2_div_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy2_div_clk: optfclk_pciephy2_div_clk@4a0093b8 {$/;"	l
optfclk_pciephy_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	optfclk_pciephy_div: optfclk_pciephy_div@4a00821c {$/;"	l
optimise_flash_write	include/cros_ec.h	/^	int optimise_flash_write;	\/* Don't write erased flash blocks *\/$/;"	m	struct:cros_ec_dev	typeref:typename:int
optimize_vcore_voltage	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static u32 optimize_vcore_voltage(struct volts const *v)$/;"	f	typeref:typename:u32	file:
option	include/spi.h	/^	u8 option;$/;"	m	struct:spi_slave	typeref:typename:u8
option	scripts/kconfig/kxgettext.c	/^	const char	 *option;$/;"	m	struct:message	typeref:typename:const char *	file:
optionMode	scripts/kconfig/qconf.h	/^enum optionMode {$/;"	g
option_error	scripts/kconfig/zconf.y	/^option_error:$/;"	l
option_name	drivers/ddr/fsl/interactive.c	/^	const char *option_name;$/;"	m	struct:options_string	typeref:typename:const char *	file:
option_name	scripts/kconfig/zconf.y	/^option_name:$/;"	l	typeref:typename:id
options	include/fsl-mc/fsl_dpbp.h	/^	uint32_t options;$/;"	m	struct:dpbp_cfg	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpmac.h	/^	uint64_t	options;$/;"	m	struct:dpmac_link_state	typeref:typename:uint64_t
options	include/fsl-mc/fsl_dpmac.h	/^	uint64_t options;$/;"	m	struct:dpmac_link_cfg	typeref:typename:uint64_t
options	include/fsl-mc/fsl_dpni.h	/^		uint32_t		options;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpni.h	/^	uint32_t	options;$/;"	m	struct:dpni_tx_flow_cfg	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpni.h	/^	uint32_t options;$/;"	m	struct:dpni_attr	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpni.h	/^	uint32_t options;$/;"	m	struct:dpni_buffer_layout	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpni.h	/^	uint32_t options;$/;"	m	struct:dpni_flc_cfg	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpni.h	/^	uint32_t options;$/;"	m	struct:dpni_queue_cfg	typeref:typename:uint32_t
options	include/fsl-mc/fsl_dpni.h	/^	uint64_t options;$/;"	m	struct:dpni_link_cfg	typeref:typename:uint64_t
options	include/fsl-mc/fsl_dpni.h	/^	uint64_t options;$/;"	m	struct:dpni_link_state	typeref:typename:uint64_t
options	include/fsl-mc/fsl_dprc.h	/^	uint64_t options;$/;"	m	struct:dprc_attributes	typeref:typename:uint64_t
options	include/fsl-mc/fsl_dprc.h	/^	uint64_t options;$/;"	m	struct:dprc_cfg	typeref:typename:uint64_t
options	include/linux/mtd/bbm.h	/^	int options;$/;"	m	struct:bbm_info	typeref:typename:int
options	include/linux/mtd/bbm.h	/^	int options;$/;"	m	struct:nand_bbt_descr	typeref:typename:int
options	include/linux/mtd/nand.h	/^	unsigned int options;$/;"	m	struct:nand_chip	typeref:typename:unsigned int
options	include/linux/mtd/nand.h	/^	unsigned int options;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:unsigned int
options	include/linux/mtd/nand.h	/^	unsigned int options;$/;"	m	struct:nand_flash_dev	typeref:typename:unsigned int
options	include/linux/mtd/nand.h	/^	unsigned int options;$/;"	m	struct:platform_nand_chip	typeref:typename:unsigned int
options	include/linux/mtd/onenand.h	/^	unsigned int options;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
options	tools/buildman/buildman	/^options, args = cmdline.ParseArgs()$/;"	v
options	tools/buildman/buildman.py	/^options, args = cmdline.ParseArgs()$/;"	v
options1	scripts/kconfig/gconf.glade	/^	    <widget class="GtkMenuItem" id="options1">$/;"	i
options1_menu	scripts/kconfig/gconf.glade	/^		<widget class="GtkMenu" id="options1_menu">$/;"	i
options_string	drivers/ddr/fsl/interactive.c	/^struct options_string {$/;"	s	file:
optkeyr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 optkeyr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
optkeyr	drivers/mtd/stm32_flash.h	/^	u32 optkeyr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
opts	include/ahci.h	/^	u32	opts;$/;"	m	struct:ahci_cmd_hdr	typeref:typename:u32
opts1	drivers/usb/eth/r8152.h	/^	__le32 opts1;$/;"	m	struct:rx_desc	typeref:typename:__le32
opts1	drivers/usb/eth/r8152.h	/^	__le32 opts1;$/;"	m	struct:tx_desc	typeref:typename:__le32
opts2	drivers/usb/eth/r8152.h	/^	__le32 opts2;$/;"	m	struct:rx_desc	typeref:typename:__le32
opts2	drivers/usb/eth/r8152.h	/^	__le32 opts2;$/;"	m	struct:tx_desc	typeref:typename:__le32
opts3	drivers/usb/eth/r8152.h	/^	__le32 opts3;$/;"	m	struct:rx_desc	typeref:typename:__le32
opts4	drivers/usb/eth/r8152.h	/^	__le32 opts4;$/;"	m	struct:rx_desc	typeref:typename:__le32
opts5	drivers/usb/eth/r8152.h	/^	__le32 opts5;$/;"	m	struct:rx_desc	typeref:typename:__le32
opts6	drivers/usb/eth/r8152.h	/^	__le32 opts6;$/;"	m	struct:rx_desc	typeref:typename:__le32
optype	drivers/spi/ich.h	/^	int optype;$/;"	m	struct:ich_spi_priv	typeref:typename:int
optype	drivers/spi/ich.h	/^	uint16_t optype;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint16_t
optype	drivers/spi/ich.h	/^	uint16_t optype;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint16_t
or	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 or;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
or	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 or;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
or	arch/powerpc/include/asm/fsl_lbc.h	/^	u32     or;$/;"	m	struct:lbc_bank	typeref:typename:u32
or	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 or;		\/* Output Control *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
or	include/pcmcia.h	/^	ulong	or;$/;"	m	struct:__anone7bb971b0108	typeref:typename:ulong
or1	board/keymile/km82xx/km82xx.c	/^	int or1;$/;"	m	struct:sdram_conf_s	typeref:typename:int	file:
or32	board/renesas/sh7752evb/lowlevel_init.S	/^.macro	or32, addr, data$/;"	m
or32	board/renesas/sh7753evb/lowlevel_init.S	/^.macro	or32, addr, data$/;"	m
or32	board/renesas/sh7757lcr/lowlevel_init.S	/^.macro	or32, addr, data$/;"	m
or_asynclistaddr	drivers/usb/host/ehci.h	/^	uint32_t or_asynclistaddr;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_burstsize	drivers/usb/host/ehci.h	/^	uint32_t or_burstsize;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 or_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
or_config	drivers/usb/host/xhci.h	/^	volatile uint32_t or_config;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t
or_configflag	drivers/usb/host/ehci.h	/^	uint32_t or_configflag;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_crcr	drivers/usb/host/xhci.h	/^	volatile uint64_t or_crcr;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint64_t
or_ctrldssegment	drivers/usb/host/ehci.h	/^	uint32_t or_ctrldssegment;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_dcbaap	drivers/usb/host/xhci.h	/^	volatile uint64_t or_dcbaap;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint64_t
or_dnctrl	drivers/usb/host/xhci.h	/^	volatile uint32_t or_dnctrl;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t
or_frindex	drivers/usb/host/ehci.h	/^	uint32_t or_frindex;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 or_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
or_pagesize	drivers/usb/host/xhci.h	/^	volatile uint32_t or_pagesize;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t
or_periodiclistbase	drivers/usb/host/ehci.h	/^	uint32_t or_periodiclistbase;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_portli	drivers/usb/host/xhci.h	/^	volatile uint32_t or_portli;$/;"	m	struct:xhci_hcor_port_regs	typeref:typename:volatile uint32_t
or_portpmsc	drivers/usb/host/xhci.h	/^	volatile uint32_t or_portpmsc;$/;"	m	struct:xhci_hcor_port_regs	typeref:typename:volatile uint32_t
or_portsc	drivers/usb/host/ehci.h	/^	uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t[]
or_portsc	drivers/usb/host/xhci.h	/^	volatile uint32_t or_portsc;$/;"	m	struct:xhci_hcor_port_regs	typeref:typename:volatile uint32_t
or_size	arch/sparc/include/asm/prom.h	/^	unsigned int or_size;$/;"	m	struct:linux_prom_ranges	typeref:typename:unsigned int
or_systune	drivers/usb/host/ehci.h	/^	uint32_t or_systune;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_txfilltuning	drivers/usb/host/ehci.h	/^	uint32_t or_txfilltuning;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_usbcmd	drivers/usb/host/ehci.h	/^	uint32_t or_usbcmd;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_usbcmd	drivers/usb/host/xhci.h	/^	volatile uint32_t or_usbcmd;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t
or_usbintr	drivers/usb/host/ehci.h	/^	uint32_t or_usbintr;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_usbsts	drivers/usb/host/ehci.h	/^	uint32_t or_usbsts;$/;"	m	struct:ehci_hcor	typeref:typename:uint32_t
or_usbsts	drivers/usb/host/xhci.h	/^	volatile uint32_t or_usbsts;$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t
or_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 or_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
orba_h	include/fsl_sec.h	/^	u32 orba_h;$/;"	m	struct:jr_regs	typeref:typename:u32
orba_l	include/fsl_sec.h	/^	u32 orba_l;$/;"	m	struct:jr_regs	typeref:typename:u32
ordblks	include/malloc.h	/^  int ordblks;  \/* number of non-inuse chunks *\/$/;"	m	struct:mallinfo	typeref:typename:int
order	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 order;$/;"	m	struct:bcm2835_mbox_tag_pixel_order::__anon775fc544260a::__anon775fc5442708	typeref:typename:u32
order	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 order;$/;"	m	struct:bcm2835_mbox_tag_pixel_order::__anon775fc544260a::__anon775fc5442808	typeref:typename:u32
order_base_2	include/linux/log2.h	/^#define order_base_2(/;"	d
order_preservation_en	include/fsl-mc/fsl_dpni.h	/^	int order_preservation_en;$/;"	m	struct:dpni_queue_attr	typeref:typename:int
order_preservation_en	include/fsl-mc/fsl_dpni.h	/^	int order_preservation_en;$/;"	m	struct:dpni_queue_cfg	typeref:typename:int
ordinal	drivers/tpm/tpm_tis.h	/^	__be32 ordinal;$/;"	m	struct:tpm_input_header	typeref:typename:__be32
oretr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	oretr; \/* Outbound Retry Error Threshold Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
oretr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	oretr;	        \/* 0xd302C - Outbound Retry Error Threshold Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
organization	include/ddr_spd.h	/^	uint8_t organization;		\/* 12 Module Organization *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
organization	include/ddr_spd.h	/^	unsigned char organization;    \/*  7 Module Organization *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
origPtr	lib/bzip2/bzlib_private.h	/^      Int32    origPtr;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
origPtr	lib/bzip2/bzlib_private.h	/^      Int32    origPtr;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
orig_buff_len	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 orig_buff_len;$/;"	m	struct:qm_host_desc	typeref:typename:u32
orig_buff_ptr	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 orig_buff_ptr;$/;"	m	struct:qm_host_desc	typeref:typename:u32
orig_dma_mask	drivers/usb/musb-new/musb_core.c	/^static u64	*orig_dma_mask;$/;"	v	typeref:typename:u64 *	file:
orig_eax	arch/x86/include/asm/ptrace.h	/^	long orig_eax;$/;"	m	struct:pt_regs	typeref:typename:long
orig_file_size	tools/imagetool.h	/^	int orig_file_size;	\/* Original size for file before padding *\/$/;"	m	struct:image_tool_params	typeref:typename:int
orig_gpr11	arch/openrisc/include/asm/ptrace.h	/^	long  orig_gpr11;	\/* For restarting system calls *\/$/;"	m	struct:pt_regs	typeref:typename:long
orig_gpr3	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG orig_gpr3;	\/* Used for restarting system calls *\/$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
orig_p0	arch/blackfin/include/asm/ptrace.h	/^	long orig_p0;$/;"	m	struct:pt_regs	typeref:typename:long
orig_pc	arch/blackfin/include/asm/ptrace.h	/^	long orig_pc;$/;"	m	struct:pt_regs	typeref:typename:long
orig_r0	arch/blackfin/include/asm/ptrace.h	/^	long orig_r0;$/;"	m	struct:pt_regs	typeref:typename:long
orig_r0	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG orig_r0;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
orig_term	arch/sandbox/cpu/os.c	/^static struct termios orig_term;$/;"	v	typeref:struct:termios	file:
orig_video_cols	include/linux/screen_info.h	/^	__u8  orig_video_cols;	\/* 0x07 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
orig_video_ega_bx	include/linux/screen_info.h	/^	__u16 orig_video_ega_bx;\/* 0x0a *\/$/;"	m	struct:screen_info	typeref:typename:__u16
orig_video_isVGA	include/linux/screen_info.h	/^	__u8  orig_video_isVGA;	\/* 0x0f *\/$/;"	m	struct:screen_info	typeref:typename:__u8
orig_video_lines	include/linux/screen_info.h	/^	__u8  orig_video_lines;	\/* 0x0e *\/$/;"	m	struct:screen_info	typeref:typename:__u8
orig_video_mode	include/linux/screen_info.h	/^	__u8  orig_video_mode;	\/* 0x06 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
orig_video_page	include/linux/screen_info.h	/^	__u16 orig_video_page;	\/* 0x04 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
orig_video_points	include/linux/screen_info.h	/^	__u16 orig_video_points;\/* 0x10 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
orig_x	include/linux/screen_info.h	/^	__u8  orig_x;		\/* 0x00 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
orig_y	include/linux/screen_info.h	/^	__u8  orig_y;		\/* 0x01 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
origin	include/linux/mtd/partitions.h	/^	unsigned long origin;$/;"	m	struct:mtd_part_parser_data	typeref:typename:unsigned long
original_fc	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		original_fc;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
original_fc	drivers/net/e1000.h	/^	uint32_t original_fc;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
original_master_slave	drivers/net/e1000.h	/^	e1000_ms_type		original_master_slave;$/;"	m	struct:e1000_hw	typeref:typename:e1000_ms_type
originate_timestamp	net/sntp.h	/^	unsigned long long originate_timestamp;$/;"	m	struct:sntp_pkt_t	typeref:typename:unsigned long long
orion5x_config_adr_windows	arch/arm/mach-orion5x/cpu.c	/^int orion5x_config_adr_windows(void)$/;"	f	typeref:typename:int
orion5x_cpu_attrib	arch/arm/mach-orion5x/include/mach/cpu.h	/^enum orion5x_cpu_attrib {$/;"	g
orion5x_cpu_registers	arch/arm/mach-orion5x/include/mach/cpu.h	/^struct orion5x_cpu_registers {$/;"	s
orion5x_cpu_target	arch/arm/mach-orion5x/include/mach/cpu.h	/^enum orion5x_cpu_target {$/;"	g
orion5x_cpu_winen	arch/arm/mach-orion5x/include/mach/cpu.h	/^enum orion5x_cpu_winen {$/;"	g
orion5x_ddr_addr_decode_registers	arch/arm/mach-orion5x/include/mach/cpu.h	/^struct orion5x_ddr_addr_decode_registers {$/;"	s
orion5x_device_id	arch/arm/mach-orion5x/cpu.c	/^u32 orion5x_device_id(void)$/;"	f	typeref:typename:u32
orion5x_device_rev	arch/arm/mach-orion5x/cpu.c	/^u32 orion5x_device_rev(void)$/;"	f	typeref:typename:u32
orion5x_mbus_win_offset	arch/arm/mach-mvebu/mbus.c	/^static unsigned int orion5x_mbus_win_offset(int win)$/;"	f	typeref:typename:unsigned int	file:
orion5x_sdram_bar	arch/arm/mach-orion5x/dram.c	/^u32 orion5x_sdram_bar(enum memory_bank bank)$/;"	f	typeref:typename:u32
orion5x_tmr_registers	arch/arm/mach-orion5x/timer.c	/^struct orion5x_tmr_registers {$/;"	s	file:
orion5x_tmr_regs	arch/arm/mach-orion5x/timer.c	/^struct orion5x_tmr_registers *orion5x_tmr_regs =$/;"	v	typeref:struct:orion5x_tmr_registers *
orion5x_tmr_val	arch/arm/mach-orion5x/timer.c	/^struct orion5x_tmr_val {$/;"	s	file:
orion5x_win_registers	arch/arm/mach-orion5x/include/mach/cpu.h	/^struct orion5x_win_registers {$/;"	s
orion5x_winctrl_calcsize	arch/arm/mach-orion5x/cpu.c	/^unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)$/;"	f	typeref:typename:unsigned int
orjr	include/fsl_sec.h	/^	u32 orjr;$/;"	m	struct:jr_regs	typeref:typename:u32
orph_buf	fs/ubifs/ubifs.h	/^	void *orph_buf;$/;"	m	struct:ubifs_info	typeref:typename:void *
orph_cnext	fs/ubifs/ubifs.h	/^	struct ubifs_orphan *orph_cnext;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_orphan *
orph_dnext	fs/ubifs/ubifs.h	/^	struct ubifs_orphan *orph_dnext;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_orphan *
orph_first	fs/ubifs/ubifs.h	/^	int orph_first;$/;"	m	struct:ubifs_info	typeref:typename:int
orph_last	fs/ubifs/ubifs.h	/^	int orph_last;$/;"	m	struct:ubifs_info	typeref:typename:int
orph_lebs	fs/ubifs/ubifs-media.h	/^	__le32 orph_lebs;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
orph_lebs	fs/ubifs/ubifs.h	/^	int orph_lebs;$/;"	m	struct:ubifs_info	typeref:typename:int
orph_list	fs/ubifs/ubifs.h	/^	struct list_head orph_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
orph_new	fs/ubifs/ubifs.h	/^	struct list_head orph_new;$/;"	m	struct:ubifs_info	typeref:struct:list_head
orph_tree	fs/ubifs/ubifs.h	/^	struct rb_root orph_tree;$/;"	m	struct:ubifs_info	typeref:struct:rb_root
orphan_lock	fs/ubifs/ubifs.h	/^	spinlock_t orphan_lock;$/;"	m	struct:ubifs_info	typeref:typename:spinlock_t
ors	include/fsl_sec.h	/^	u32 ors;$/;"	m	struct:jr_regs	typeref:typename:u32
orsf	include/fsl_sec.h	/^	u32 orsf;$/;"	m	struct:jr_regs	typeref:typename:u32
orwi	include/fsl_sec.h	/^	u32 orwi;$/;"	m	struct:jr_regs	typeref:typename:u32
os	include/image.h	/^	image_info_t	os;		\/* os image info *\/$/;"	m	struct:bootm_headers	typeref:typename:image_info_t
os	include/image.h	/^	uint8_t		comp, type, os;		\/* compression, type of image, os type *\/$/;"	m	struct:image_info	typeref:typename:uint8_t
os	include/spl.h	/^	u8 os;$/;"	m	struct:spl_image_info	typeref:typename:u8
os	include/u-boot/zlib.h	/^	int	os;	\/* operating system *\/$/;"	m	struct:gz_header_s	typeref:typename:int
os	tools/imagetool.h	/^	int os;$/;"	m	struct:image_tool_params	typeref:typename:int
os32iil	arch/powerpc/include/asm/immap_85xx.h	/^	u32	os32iil;	\/* OOS 32 Bytes TX Insert Idx\/Len *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
os32iptrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	os32iptrh;	\/* OOS 32 Bytes TX Insert Ptr High *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
os32iptrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	os32iptrl;	\/* OOS 32 Bytes TX Insert Ptr Low *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
os32tbdp	arch/powerpc/include/asm/immap_85xx.h	/^	u32	os32tbdp;	\/* OOS 32 Bytes TX Data Buffer Ptr Low *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
os32tbdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	os32tbdr;	\/* OOS 32 Bytes TX Reserved *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
os_close	arch/sandbox/cpu/os.c	/^int os_close(int fd)$/;"	f	typeref:typename:int
os_context	fs/yaffs2/yaffs_guts.h	/^	void *os_context;$/;"	m	struct:yaffs_dev	typeref:typename:void *
os_data_addr	cmd/load.c	/^static char *os_data_addr, *os_data_addr_saved;$/;"	v	typeref:typename:char *	file:
os_data_addr_saved	cmd/load.c	/^static char *os_data_addr, *os_data_addr_saved;$/;"	v	typeref:typename:char *	file:
os_data_char	cmd/load.c	/^static void (*os_data_char)(char new_char);$/;"	v	typeref:typename:void (*)(char new_char)	file:
os_data_init	cmd/load.c	/^static void (*os_data_init)(void);$/;"	v	typeref:typename:void (*)(void)	file:
os_data_restore	cmd/load.c	/^static void os_data_restore(void)$/;"	f	typeref:typename:void	file:
os_data_save	cmd/load.c	/^static void os_data_save(void)$/;"	f	typeref:typename:void	file:
os_data_state	cmd/load.c	/^static int os_data_state, os_data_state_saved;$/;"	v	typeref:typename:int	file:
os_data_state_saved	cmd/load.c	/^static int os_data_state, os_data_state_saved;$/;"	v	typeref:typename:int	file:
os_dirent_free	arch/sandbox/cpu/os.c	/^void os_dirent_free(struct os_dirent_node *node)$/;"	f	typeref:typename:void
os_dirent_get_typename	arch/sandbox/cpu/os.c	/^const char *os_dirent_get_typename(enum os_dirent_t type)$/;"	f	typeref:typename:const char *
os_dirent_ls	arch/sandbox/cpu/os.c	/^int os_dirent_ls(const char *dirname, struct os_dirent_node **headp)$/;"	f	typeref:typename:int
os_dirent_node	include/os.h	/^struct os_dirent_node {$/;"	s
os_dirent_t	include/os.h	/^enum os_dirent_t {$/;"	g
os_dirent_typename	arch/sandbox/cpu/os.c	/^const char *os_dirent_typename[OS_FILET_COUNT] = {$/;"	v	typeref:typename:const char * []
os_exit	arch/sandbox/cpu/os.c	/^void os_exit(int exit_code)$/;"	f	typeref:typename:void
os_fd_restore	arch/sandbox/cpu/os.c	/^void os_fd_restore(void)$/;"	f	typeref:typename:void
os_find_u_boot	arch/sandbox/cpu/os.c	/^int os_find_u_boot(char *fname, int maxlen)$/;"	f	typeref:typename:int
os_flags	include/zfs/dmu_objset.h	/^	uint64_t os_flags;$/;"	m	struct:objset_phys	typeref:typename:uint64_t
os_free	arch/sandbox/cpu/os.c	/^void os_free(void *ptr)$/;"	f	typeref:typename:void
os_get_filesize	arch/sandbox/cpu/os.c	/^int os_get_filesize(const char *fname, loff_t *size)$/;"	f	typeref:typename:int
os_get_nsec	arch/sandbox/cpu/os.c	/^uint64_t __attribute__((no_instrument_function)) os_get_nsec(void)$/;"	f	typeref:typename:uint64_t
os_groupused_dnode	include/zfs/dmu_objset.h	/^	dnode_phys_t os_groupused_dnode;$/;"	m	struct:objset_phys	typeref:typename:dnode_phys_t
os_jump_to_image	arch/sandbox/cpu/os.c	/^int os_jump_to_image(const void *dest, int size)$/;"	f	typeref:typename:int
os_localtime	arch/sandbox/cpu/os.c	/^void os_localtime(struct rtc_time *rt)$/;"	f	typeref:typename:void
os_lseek	arch/sandbox/cpu/os.c	/^off_t os_lseek(int fd, off_t offset, int whence)$/;"	f	typeref:typename:off_t
os_malloc	arch/sandbox/cpu/os.c	/^void *os_malloc(size_t length)$/;"	f	typeref:typename:void *
os_mem_hdr	arch/sandbox/cpu/os.c	/^struct os_mem_hdr {$/;"	s	file:
os_meta_dnode	include/zfs/dmu_objset.h	/^	dnode_phys_t os_meta_dnode;$/;"	m	struct:objset_phys	typeref:typename:dnode_phys_t
os_open	arch/sandbox/cpu/os.c	/^int os_open(const char *pathname, int os_flags)$/;"	f	typeref:typename:int
os_pad	include/zfs/dmu_objset.h	/^	char os_pad[OBJSET_PHYS_SIZE - sizeof(dnode_phys_t)*3 -$/;"	m	struct:objset_phys	typeref:typename:char[]
os_parse_args	arch/sandbox/cpu/os.c	/^int os_parse_args(struct sandbox_state *state, int argc, char *argv[])$/;"	f	typeref:typename:int
os_putc	arch/sandbox/cpu/os.c	/^void os_putc(int ch)$/;"	f	typeref:typename:void
os_puts	arch/sandbox/cpu/os.c	/^void os_puts(const char *str)$/;"	f	typeref:typename:void
os_read	arch/sandbox/cpu/os.c	/^ssize_t os_read(int fd, void *buf, size_t count)$/;"	f	typeref:typename:ssize_t
os_read_no_block	arch/sandbox/cpu/os.c	/^ssize_t os_read_no_block(int fd, void *buf, size_t count)$/;"	f	typeref:typename:ssize_t
os_read_ram_buf	arch/sandbox/cpu/os.c	/^int os_read_ram_buf(const char *fname)$/;"	f	typeref:typename:int
os_realloc	arch/sandbox/cpu/os.c	/^void *os_realloc(void *ptr, size_t length)$/;"	f	typeref:typename:void *
os_reg	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int os_reg[8];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[8]
os_reg	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 os_reg[4];$/;"	m	struct:rk3288_grf	typeref:typename:u32[4]
os_reg0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 os_reg0;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
os_reg1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 os_reg1;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
os_reg2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 os_reg2;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
os_reg3	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 os_reg3;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
os_selection	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t os_selection;			\/* Offset 0x0050 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
os_spl_to_uboot	arch/sandbox/cpu/os.c	/^int os_spl_to_uboot(const char *fname)$/;"	f	typeref:typename:int
os_tty_raw	arch/sandbox/cpu/os.c	/^void os_tty_raw(int fd, bool allow_sigs)$/;"	f	typeref:typename:void
os_type	include/zfs/dmu_objset.h	/^	uint64_t os_type;$/;"	m	struct:objset_phys	typeref:typename:uint64_t
os_unlink	arch/sandbox/cpu/os.c	/^int os_unlink(const char *pathname)$/;"	f	typeref:typename:int
os_userused_dnode	include/zfs/dmu_objset.h	/^	dnode_phys_t os_userused_dnode;$/;"	m	struct:objset_phys	typeref:typename:dnode_phys_t
os_usleep	arch/sandbox/cpu/os.c	/^void os_usleep(unsigned long usec)$/;"	f	typeref:typename:void
os_write	arch/sandbox/cpu/os.c	/^ssize_t os_write(int fd, const void *buf, size_t count)$/;"	f	typeref:typename:ssize_t
os_write_ram_buf	arch/sandbox/cpu/os.c	/^int os_write_ram_buf(const char *fname)$/;"	f	typeref:typename:int
os_x_before	Makefile	/^os_x_before	= $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \\$/;"	m
os_zil_header	include/zfs/dmu_objset.h	/^	zil_header_t os_zil_header;$/;"	m	struct:objset_phys	typeref:typename:zil_header_t
osar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	osar; \/* Outbound Unit Source AR *\/$/;"	m	struct:rio_msg	typeref:typename:u32
osar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	osar;		\/* 0xd3014 - Outbound Unit Source Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
osc	arch/arm/dts/imx6ull.dtsi	/^		osc: clock@1 {$/;"	l
osc	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	osc;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
osc	arch/xtensa/dts/xtfpga.dtsi	/^		osc: main-oscillator {$/;"	l
osc0_in	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int osc0_in;$/;"	m	struct:pad_signals	typeref:typename:int
osc0_out	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int osc0_out;$/;"	m	struct:pad_signals	typeref:typename:int
osc1	arch/arm/dts/socfpga.dtsi	/^					osc1: osc1 {$/;"	l
osc16M	arch/arm/dts/sun8i-a83t.dtsi	/^		osc16M: osc16M_clk {$/;"	l
osc16Md512	arch/arm/dts/sun8i-a83t.dtsi	/^		osc16Md512: osc16Md512_clk {$/;"	l
osc1_in	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int osc1_in;$/;"	m	struct:pad_signals	typeref:typename:int
osc1_in	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int osc1_in;$/;"	m	struct:pad_signals	typeref:typename:int
osc1_out	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int osc1_out;$/;"	m	struct:pad_signals	typeref:typename:int
osc1_out	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int osc1_out;$/;"	m	struct:pad_signals	typeref:typename:int
osc2	arch/arm/dts/socfpga.dtsi	/^					osc2: osc2 {$/;"	l
osc24M	arch/arm/dts/sun4i-a10.dtsi	/^		osc24M: clk@01c20050 {$/;"	l
osc24M	arch/arm/dts/sun50i-a64.dtsi	/^		osc24M: osc24M_clk {$/;"	l
osc24M	arch/arm/dts/sun5i.dtsi	/^		osc24M: clk@01c20050 {$/;"	l
osc24M	arch/arm/dts/sun6i-a31.dtsi	/^		osc24M: osc24M {$/;"	l
osc24M	arch/arm/dts/sun7i-a20.dtsi	/^		osc24M: clk@01c20050 {$/;"	l
osc24M	arch/arm/dts/sun8i-a23-a33.dtsi	/^		osc24M: osc24M_clk {$/;"	l
osc24M	arch/arm/dts/sun8i-a83t.dtsi	/^		osc24M: osc24M_clk {$/;"	l
osc24M	arch/arm/dts/sun8i-h3.dtsi	/^		osc24M: osc24M_clk {$/;"	l
osc24M	arch/arm/dts/sun9i-a80.dtsi	/^		osc24M: osc24M_clk {$/;"	l
osc24M_32k	arch/arm/dts/sun7i-a20.dtsi	/^		osc24M_32k: clk@1 {$/;"	l
osc24m_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 osc24m_cfg;		\/* 0x50 osc24m control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
osc24m_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 osc24m_cfg;		\/* 0x50 osc24m control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
osc26mctl	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 osc26mctl;	\/* Oscillator 26M Register *\/$/;"	m	struct:pll_regs	typeref:typename:u32
osc32k	arch/arm/dts/sun4i-a10.dtsi	/^		osc32k: clk@0 {$/;"	l
osc32k	arch/arm/dts/sun50i-a64.dtsi	/^		osc32k: osc32k_clk {$/;"	l
osc32k	arch/arm/dts/sun5i.dtsi	/^		osc32k: clk@0 {$/;"	l
osc32k	arch/arm/dts/sun6i-a31.dtsi	/^		osc32k: clk@0 {$/;"	l
osc32k	arch/arm/dts/sun7i-a20.dtsi	/^		osc32k: clk@0 {$/;"	l
osc32k	arch/arm/dts/sun8i-a23-a33.dtsi	/^		osc32k: osc32k_clk {$/;"	l
osc32k	arch/arm/dts/sun8i-h3.dtsi	/^		osc32k: osc32k_clk {$/;"	l
osc32k	arch/arm/dts/sun9i-a80.dtsi	/^		osc32k: osc32k_clk {$/;"	l
osc3M	arch/arm/dts/sun4i-a10.dtsi	/^		osc3M: osc3M_clk {$/;"	l
osc3M	arch/arm/dts/sun5i.dtsi	/^		osc3M: osc3M_clk {$/;"	l
osc3M	arch/arm/dts/sun7i-a20.dtsi	/^		osc3M: osc3M_clk {$/;"	l
osc_32k	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t osc_32k;			\/* offset 0x0050 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
osc_32k_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t osc_32k_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
osc_32k_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t osc_32k_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
osc_32k_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t osc_32k_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
osc_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 osc_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
osc_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 osc_ctrl;		\/* Main Oscillator Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
osc_ctrl	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 osc_ctrl;		\/* offset 0x60 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
osc_ctrl_reg	arch/arm/include/asm/arch-tegra/warmboot.h	/^union osc_ctrl_reg {$/;"	u
osc_ctrl_xobp	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 osc_ctrl_xobp:1;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:1	file:
osc_freq	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 osc_freq:2;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:2
osc_freq	arch/arm/mach-tegra/clock.c	/^static unsigned osc_freq[CLOCK_OSC_FREQ_COUNT] = {$/;"	v	typeref:typename:unsigned[]	file:
osc_max	include/ec_commands.h	/^	uint8_t osc_max[2];			\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2]
osc_min	include/ec_commands.h	/^	uint8_t osc_min[2];			\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2]
osc_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux osc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
oscc	include/andestech/andes_pcu.h	/^	unsigned int	oscc;		\/* 0x40 - OSC Control *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
oscclk_gate_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscclk_gate_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
oscclk_gate_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	oscclk_gate_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
oscdiv	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	oscdiv;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
oscdiv1	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	oscdiv1;	\/* 0x124 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
oscdiv1	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	oscdiv1;	\/* 24 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
oscfi_spare	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 oscfi_spare:8;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:8
osd0	include/gdsys_fpga.h	/^	struct ihs_osd osd0;	\/* 0x0100 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_osd
osd0	include/gdsys_fpga.h	/^	struct ihs_osd osd0;	\/* 0x0200 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_osd
osd1	include/ext_common.h	/^	__le32 osd1;$/;"	m	struct:ext2_inode	typeref:typename:__le32
osd1	include/gdsys_fpga.h	/^	struct ihs_osd osd1;	\/* 0x0180 *\/$/;"	m	struct:ihs_fpga	typeref:struct:ihs_osd
osd2	include/ext_common.h	/^	__le32 osd2[3];$/;"	m	struct:ext2_inode	typeref:typename:__le32[3]
osd_print	board/gdsys/common/osd.c	/^static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
osd_probe	board/gdsys/common/osd.c	/^int osd_probe(unsigned screen)$/;"	f	typeref:typename:int
osd_screen_mask	board/gdsys/common/osd.c	/^unsigned int osd_screen_mask = 0;$/;"	v	typeref:typename:unsigned int
osd_size	board/gdsys/common/osd.c	/^int osd_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
osd_write	board/gdsys/common/osd.c	/^int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
osd_write_videomem	board/gdsys/common/osd.c	/^static int osd_write_videomem(unsigned screen, unsigned offset,$/;"	f	typeref:typename:int	file:
osh	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 osh;	\/* Output Select 0..15 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
osif_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 osif_freq;		\/* offset 0x14 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
osl	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 osl;	\/* Output Select 16..31 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
osp	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG osp;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
ospeedr	drivers/gpio/stm32_gpio.c	/^	u32 ospeedr;	\/* GPIO port output speed *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
ospm_flags	arch/x86/include/asm/acpi_table.h	/^	u32 ospm_flags;			\/* OSPM enabled flags *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
ospr	include/fsl_sfp.h	/^	u32 ospr;		\/* 0x200 *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
ospr	include/fsl_sfp.h	/^	u32 ospr;	\/* 0x40  OEM Security Policy Register *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
ospr1	include/fsl_sfp.h	/^	u32 ospr1;		\/* 0x204 *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
osr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	osr;		\/* 0x18 Output Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
osr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	osr; \/* Outbound Status Register *\/$/;"	m	struct:rio_msg	typeref:typename:u32
osr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	osr;		\/* 0xd3004 - Outbound Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
osr_init	arch/arm/mach-keystone/init.c	/^void osr_init(void)$/;"	f	typeref:typename:void
ostbd	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ostbd;		\/* Out-of-Sequence(OOS) TX Buffer Desc *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ostbd	include/tsec.h	/^	u32	ostbd;		\/* Out of Sequence TxBD *\/$/;"	m	struct:tsec	typeref:typename:u32
ostbdp	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ostbdp;		\/* OOS TX Data Buffer Ptr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ostbdp	include/tsec.h	/^	u32	ostbdp;		\/* Out of Sequence Tx Data Buffer Pointer *\/$/;"	m	struct:tsec	typeref:typename:u32
ot1200_ddr_ioregs	board/bachmann/ot1200/ot1200_spl.c	/^static struct mx6dq_iomux_ddr_regs ot1200_ddr_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_ddr_regs	file:
ot1200_ddr_sysinfo	board/bachmann/ot1200/ot1200_spl.c	/^static struct mx6_ddr_sysinfo ot1200_ddr_sysinfo = {$/;"	v	typeref:struct:mx6_ddr_sysinfo	file:
ot1200_grp_ioregs	board/bachmann/ot1200/ot1200_spl.c	/^static struct mx6dq_iomux_grp_regs ot1200_grp_ioregs = {$/;"	v	typeref:struct:mx6dq_iomux_grp_regs	file:
ot1200_spl_dram_init	board/bachmann/ot1200/ot1200_spl.c	/^static void ot1200_spl_dram_init(void)$/;"	f	typeref:typename:void	file:
ot_child_base	arch/sparc/include/asm/prom.h	/^	unsigned int ot_child_base;	\/* Bus feels this *\/$/;"	m	struct:linux_prom_ranges	typeref:typename:unsigned int
ot_child_space	arch/sparc/include/asm/prom.h	/^	unsigned int ot_child_space;$/;"	m	struct:linux_prom_ranges	typeref:typename:unsigned int
ot_parent_base	arch/sparc/include/asm/prom.h	/^	unsigned int ot_parent_base;	\/* CPU looks from here *\/$/;"	m	struct:linux_prom_ranges	typeref:typename:unsigned int
ot_parent_space	arch/sparc/include/asm/prom.h	/^	unsigned int ot_parent_space;$/;"	m	struct:linux_prom_ranges	typeref:typename:unsigned int
otat	include/tsi148.h	/^	unsigned int otat;                    \/* 0x01c Outbound translation attr  *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otbs	include/tsi148.h	/^	unsigned int otbs;                    \/* 0x018 Outbound translation 2eSST *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otc	arch/arm/imx-common/cpu.c	/^	uint32_t	otc;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
oteal	include/tsi148.h	/^	unsigned int oteal;                   \/* 0x00c Outbound end         lower *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
oteau	include/tsi148.h	/^	unsigned int oteau;                   \/* 0x008 Outbound end         upper *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otf_burst_chop_en	include/fsl_ddr_sdram.h	/^	unsigned int otf_burst_chop_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
otfaemifclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int otfaemifclkctrl;	\/* offset 0x738 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
otg	board/nokia/rx51/tag_omap.h	/^	u8		otg;	\/* port number, 1-based:  usb1 == 2 *\/$/;"	m	struct:omap_usb_config	typeref:typename:u8
otg	drivers/usb/host/ehci-faraday.c	/^	struct fotg210_regs  otg;$/;"	m	union:ehci_faraday_regs	typeref:struct:fotg210_regs	file:
otg	drivers/usb/host/ohci-lpc32xx.c	/^static struct otg_regs *otg = (struct otg_regs *)USB_BASE;$/;"	v	typeref:struct:otg_regs *	file:
otg	drivers/usb/musb/omap3.c	/^static struct omap3_otg_regs *otg;$/;"	v	typeref:struct:omap3_otg_regs *	file:
otg0_board_data	arch/arm/cpu/armv7/am33xx/board.c	/^struct omap_musb_board_data otg0_board_data = {$/;"	v	typeref:struct:omap_musb_board_data
otg0_plat	arch/arm/cpu/armv7/am33xx/board.c	/^static struct musb_hdrc_platform_data otg0_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
otg1_board_data	arch/arm/cpu/armv7/am33xx/board.c	/^struct omap_musb_board_data otg1_board_data = {$/;"	v	typeref:struct:omap_musb_board_data
otg1_plat	arch/arm/cpu/armv7/am33xx/board.c	/^static struct musb_hdrc_platform_data otg1_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
otg_clk_ctrl	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_clk_ctrl;   \/* OTG clock control reg *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_clk_sts	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_clk_sts;    \/* OTG clock status reg *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_ctrl	include/usb/ulpi.h	/^	u8	otg_ctrl;		\/* 0x0A Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
otg_ctrl_clear	include/usb/ulpi.h	/^	u8	otg_ctrl_clear;		\/* 0x0C Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
otg_ctrl_set	include/usb/ulpi.h	/^	u8	otg_ctrl_set;		\/* 0x0B Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
otg_descriptor	drivers/usb/gadget/ether.c	/^otg_descriptor = {$/;"	v	typeref:struct:usb_otg_descriptor	file:
otg_disable	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	otg_disable:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
otg_i2c	drivers/usb/host/ohci-lpc32xx.c	/^	struct otgi2c_regs otg_i2c;$/;"	m	struct:otg_regs	typeref:struct:otgi2c_regs	file:
otg_i2c_clk_hi	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_i2c_clk_hi; \/* OTG I2C Clock Divider high *\/$/;"	m	struct:otgi2c_regs	typeref:typename:u32	file:
otg_i2c_clk_lo	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_i2c_clk_lo; \/* OTG I2C Clock Divider low *\/$/;"	m	struct:otgi2c_regs	typeref:typename:u32	file:
otg_i2c_ctrl	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_i2c_ctrl;   \/* OTG I2C Control Register *\/$/;"	m	struct:otgi2c_regs	typeref:typename:u32	file:
otg_i2c_stat	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_i2c_stat;   \/* OTG I2C Status Register *\/$/;"	m	struct:otgi2c_regs	typeref:typename:u32	file:
otg_i2c_txrx	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_i2c_txrx;   \/* OTG I2C Tx\/Rx Data FIFO *\/$/;"	m	struct:otgi2c_regs	typeref:typename:u32	file:
otg_int_clr	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_int_clr;    \/* OTG int clear register *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_int_enab	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_int_enab;   \/* OTG int enable register *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_int_set	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_int_set;    \/* OTG int set register *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_int_sts	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_int_sts;    \/* OTG int status register *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_interfsel	drivers/usb/musb-new/musb_core.h	/^	u32 otg_interfsel;$/;"	m	struct:musb_context_registers	typeref:typename:u32
otg_phy_ctrl_0	drivers/usb/host/ehci-mx6.c	/^	u32	otg_phy_ctrl_0;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
otg_phy_init	drivers/usb/gadget/bcm_udc_otg_phy.c	/^void otg_phy_init(struct dwc2_udc *dev)$/;"	f	typeref:typename:void
otg_phy_init	drivers/usb/gadget/dwc2_udc_otg.c	/^__weak void otg_phy_init(struct dwc2_udc *dev) {}$/;"	f	typeref:typename:__weak void
otg_phy_init	drivers/usb/gadget/dwc2_udc_otg_phy.c	/^void otg_phy_init(struct dwc2_udc *dev)$/;"	f	typeref:typename:void
otg_phy_init	drivers/usb/phy/rockchip_usb2_phy.c	/^void otg_phy_init(struct dwc2_udc *dev)$/;"	f	typeref:typename:void
otg_phy_off	drivers/usb/gadget/bcm_udc_otg_phy.c	/^void otg_phy_off(struct dwc2_udc *dev)$/;"	f	typeref:typename:void
otg_phy_off	drivers/usb/gadget/dwc2_udc_otg.c	/^__weak void otg_phy_off(struct dwc2_udc *dev) {}$/;"	f	typeref:typename:__weak void
otg_phy_off	drivers/usb/gadget/dwc2_udc_otg_phy.c	/^void otg_phy_off(struct dwc2_udc *dev)$/;"	f	typeref:typename:void
otg_phy_off	drivers/usb/phy/rockchip_usb2_phy.c	/^void otg_phy_off(struct dwc2_udc *dev)$/;"	f	typeref:typename:void
otg_regs	drivers/usb/host/ohci-lpc32xx.c	/^struct otg_regs {$/;"	s	file:
otg_sram	arch/arm/dts/sun4i-a10.dtsi	/^				otg_sram: sram-section@0000 {$/;"	l	label:sram_d
otg_sram	arch/arm/dts/sun5i.dtsi	/^				otg_sram: sram-section@0000 {$/;"	l	label:sram_d
otg_sram	arch/arm/dts/sun7i-a20.dtsi	/^				otg_sram: sram-section@0000 {$/;"	l	label:sram_d
otg_sts_ctrl	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_sts_ctrl;   \/* OTG status\/control register *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_timer	drivers/usb/host/ohci-lpc32xx.c	/^	u32 otg_timer;      \/* OTG timer register *\/$/;"	m	struct:otg_regs	typeref:typename:u32	file:
otg_timer	drivers/usb/musb-new/am35x.c	/^static void otg_timer(unsigned long _musb)$/;"	f	typeref:typename:void	file:
otg_timer	drivers/usb/musb-new/musb_core.h	/^	struct timer_list	otg_timer;$/;"	m	struct:musb	typeref:struct:timer_list
otg_timer	drivers/usb/musb-new/musb_dsps.c	/^static void otg_timer(unsigned long _musb)$/;"	f	typeref:typename:void	file:
otg_vbus_drv	arch/arm/dts/rk3288-evb.dtsi	/^		otg_vbus_drv: otg-vbus-drv {$/;"	l
otg_vbus_drv	arch/arm/dts/rk3288-firefly.dtsi	/^		otg_vbus_drv: otg-vbus-drv {$/;"	l
otg_workaround	drivers/usb/musb-new/am35x.c	/^static struct timer_list otg_workaround;$/;"	v	typeref:struct:timer_list	file:
otg_wrapper	include/linux/usb/xhci-omap.h	/^	struct omap_dwc_wrapper *otg_wrapper;$/;"	m	struct:omap_xhci	typeref:struct:omap_dwc_wrapper *
otgcsr	include/usb/fotg210.h	/^	uint32_t otgcsr;\/* 0x80: OTG Control Status Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
otgi2c_regs	drivers/usb/host/ohci-lpc32xx.c	/^struct otgi2c_regs {$/;"	s	file:
otgier	include/usb/fotg210.h	/^	uint32_t otgier;\/* 0x88: OTG Interrupt Enable Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
otgisr	include/usb/fotg210.h	/^	uint32_t otgisr;\/* 0x84: OTG Interrupt Status Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
otgsc	arch/arm/include/asm/arch-tegra/usb.h	/^	uint otgsc;$/;"	m	struct:usb_ctlr	typeref:typename:uint
otgsc	arch/m68k/include/asm/immap_5329.h	/^	u32 otgsc;		\/* 0x1A4 On The Go Status and Control *\/$/;"	m	struct:usb_otg	typeref:typename:u32
otgsc	include/usb/ehci-ci.h	/^	u32	otgsc;		\/* 0x1a4 - Oo-The-Go status and control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
oth_opt_features	include/ddr_spd.h	/^	uint8_t oth_opt_features;	\/*  9 Other optional features *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
other_bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 other_bwcr;		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
other_bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 other_bwcr;		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
otherpattern	post/board/lwmon5/fpga.c	/^const static unsigned long otherpattern = 0x01234567;$/;"	v	typeref:typename:const unsigned long	file:
otherpattern	post/board/lwmon5/gdc.c	/^const static unsigned long otherpattern = 0x01234567;$/;"	v	typeref:typename:const unsigned long	file:
otherpattern	post/drivers/memory.c	/^const unsigned long long otherpattern = 0x0123456789abcdefULL;$/;"	v	typeref:typename:const unsigned long long
others	fs/yaffs2/yaffsfs.c	/^	struct list_head others;$/;"	m	struct:yaffsfs_DirSearchContxt	typeref:struct:list_head	file:
otofl	include/tsi148.h	/^	unsigned int otofl;                   \/* 0x014 Outbound translation lower *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otofu	include/tsi148.h	/^	unsigned int otofu;                   \/* 0x010 Outbound translation upper *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otp_data_prot_addr	include/linux/mtd/nand.h	/^	u8 otp_data_prot_addr;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
otp_feat_addr	include/linux/mtd/nand.h	/^	u8 otp_feat_addr;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
otp_info	include/mtd/mtd-abi.h	/^struct otp_info {$/;"	s
otp_mode	include/linux/mtd/nand.h	/^	u8 otp_mode;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
otp_num_pages	include/linux/mtd/nand.h	/^	u8 otp_num_pages;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
otp_out	arch/arm/dts/rk3288.dtsi	/^			otp_out: otp-out {$/;"	l
otp_page_start	include/linux/mtd/nand.h	/^	u8 otp_page_start;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
otp_strerror	cmd/otp.c	/^static const char *otp_strerror(uint32_t err)$/;"	f	typeref:typename:const char *	file:
otsal	include/tsi148.h	/^	unsigned int otsal;                   \/* 0x004 Outbouud start       lower *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otsau	include/tsi148.h	/^	unsigned int otsau;                   \/* 0x000 Outbound start       upper *\/$/;"	m	struct:_OUTBOUND	typeref:typename:unsigned int
otype	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_otype	otype;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_otype
otype	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_otype	otype;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_otype
otyper	drivers/gpio/stm32_gpio.c	/^	u32 otyper;	\/* GPIO port output type *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
our_mtd	drivers/mtd/nand/tegra_nand.c	/^static struct mtd_info *our_mtd;$/;"	v	typeref:struct:mtd_info *	file:
our_path	lib/libfdt/test_libfdt.py	/^our_path = os.path.dirname(os.path.realpath(__file__))$/;"	v
our_path	tools/buildman/buildman	/^our_path = os.path.dirname(os.path.realpath(__file__))$/;"	v
our_path	tools/buildman/buildman.py	/^our_path = os.path.dirname(os.path.realpath(__file__))$/;"	v
our_path	tools/buildman/test.py	/^our_path = os.path.dirname(os.path.realpath(__file__))$/;"	v
our_path	tools/dtoc/dtoc	/^our_path = os.path.dirname(os.path.realpath(__file__))$/;"	v
our_path	tools/dtoc/dtoc.py	/^our_path = os.path.dirname(os.path.realpath(__file__))$/;"	v
out	arch/m68k/include/asm/coldfire/rng.h	/^	u32 out;		\/* 0x0C Output FIFO *\/$/;"	m	struct:rng_ctrl	typeref:typename:u32
out	arch/m68k/include/asm/coldfire/skha.h	/^	u32 out;		\/* 0x24 Output FIFO *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
out	drivers/gpio/pcf8575_gpio.c	/^	unsigned int out;	\/* software latch *\/$/;"	m	struct:pcf8575_chip	typeref:typename:unsigned int	file:
out	drivers/sound/wm8994.c	/^	int out;	\/* output frequency in Hz *\/$/;"	m	struct:wm8994_fll_config	typeref:typename:int	file:
out	drivers/spi/ich.h	/^	const uint8_t *out;$/;"	m	struct:spi_trans	typeref:typename:const uint8_t *
out	drivers/tpm/tpm_tis.h	/^	struct tpm_output_header out;$/;"	m	union:tpm_cmd_header	typeref:struct:tpm_output_header
out	drivers/usb/gadget/ether.c	/^				*in, *out, *status;$/;"	m	struct:eth_dev	typeref:typename:const struct usb_endpoint_descriptor *	file:
out	lib/tiny-printf.c	/^static void out(struct printf_info *info, char c)$/;"	f	typeref:typename:void	file:
out1	include/ns87308.h	/^  unsigned char out1;  \/* 2 output type port 1 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
out16	arch/microblaze/cpu/start.S	/^out16:	bslli	r3, r6, 8$/;"	l
out16	arch/powerpc/cpu/mpc5xxx/io.S	/^out16:$/;"	l
out16	arch/powerpc/cpu/mpc85xx/start.S	/^out16:$/;"	l
out16	arch/powerpc/cpu/mpc86xx/start.S	/^out16:$/;"	l
out16	arch/powerpc/cpu/ppc4xx/start.S	/^out16:$/;"	l
out16	arch/sandbox/include/asm/io.h	/^#define out16(/;"	d
out16	drivers/pci/w83c553f.c	/^#define out16(/;"	d	file:
out16r	arch/powerpc/cpu/mpc5xxx/io.S	/^out16r:$/;"	l
out16r	arch/powerpc/cpu/mpc85xx/start.S	/^out16r:$/;"	l
out16r	arch/powerpc/cpu/mpc86xx/start.S	/^out16r:$/;"	l
out16r	arch/powerpc/cpu/ppc4xx/start.S	/^out16r:$/;"	l
out16r	arch/sparc/cpu/leon3/usb_uhci.c	/^#define out16r(/;"	d	file:
out1_div_byp	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 out1_div_byp:1;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:1
out1_inv_clk	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 out1_inv_clk:1;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:1
out2	include/ns87308.h	/^  unsigned char out2;  \/* 6 output type port 2 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
out32	arch/powerpc/cpu/mpc5xxx/io.S	/^out32:$/;"	l
out32	arch/powerpc/cpu/mpc85xx/start.S	/^out32:$/;"	l
out32	arch/powerpc/cpu/mpc86xx/start.S	/^out32:$/;"	l
out32	arch/powerpc/cpu/ppc4xx/start.S	/^out32:$/;"	l
out32	board/mpl/pati/pati.c	/^void out32(unsigned long addr,unsigned long data)$/;"	f	typeref:typename:void
out32	drivers/net/xilinx_ll_temac.h	/^	void			(*out32)(phys_addr_t, unsigned);$/;"	m	struct:ll_temac	typeref:typename:void (*)(phys_addr_t,unsigned)
out32r	arch/powerpc/cpu/mpc5xxx/io.S	/^out32r:$/;"	l
out32r	arch/powerpc/cpu/mpc85xx/start.S	/^out32r:$/;"	l
out32r	arch/powerpc/cpu/mpc86xx/start.S	/^out32r:$/;"	l
out32r	arch/powerpc/cpu/ppc4xx/start.S	/^out32r:$/;"	l
out32r	arch/sparc/cpu/leon3/usb_uhci.c	/^#define out32r(/;"	d	file:
out8	arch/powerpc/cpu/mpc5xxx/io.S	/^out8:$/;"	l
out8	arch/powerpc/cpu/mpc85xx/start.S	/^out8:$/;"	l
out8	arch/powerpc/cpu/mpc86xx/start.S	/^out8:$/;"	l
out8	arch/powerpc/cpu/ppc4xx/start.S	/^out8:$/;"	l
out8	drivers/input/i8042.c	/^#define out8(/;"	d	file:
out8	drivers/pci/w83c553f.c	/^#define out8(/;"	d	file:
out8	drivers/rtc/mc146818.c	/^#define out8(/;"	d	file:
out_8	arch/arc/include/asm/io.h	/^#define out_8(/;"	d
out_8	arch/arm/include/asm/io.h	/^#define out_8(/;"	d
out_8	arch/m68k/include/asm/io.h	/^static inline void out_8(volatile u8 * addr, int val)$/;"	f	typeref:typename:void
out_8	arch/microblaze/include/asm/io.h	/^#define out_8(/;"	d
out_8	arch/nds32/include/asm/io.h	/^#define out_8(/;"	d
out_8	arch/nios2/include/asm/io.h	/^#define out_8(/;"	d
out_8	arch/powerpc/include/asm/io.h	/^static inline void out_8(volatile unsigned char __iomem *addr, u8 val)$/;"	f	typeref:typename:void
out_8	arch/sh/include/asm/io.h	/^#define out_8(/;"	d
out_8	arch/xtensa/include/asm/io.h	/^# define out_8(/;"	d
out_affinity_info	arch/arm/cpu/armv7/ls102xa/psci.S	/^out_affinity_info:$/;"	l
out_arch	arch/arc/include/asm/io.h	/^#define out_arch(/;"	d
out_arch	arch/arm/include/asm/io.h	/^#define out_arch(/;"	d
out_arch	arch/nds32/include/asm/io.h	/^#define out_arch(/;"	d
out_arch	arch/nios2/include/asm/io.h	/^#define out_arch(/;"	d
out_be16	arch/arc/include/asm/io.h	/^#define out_be16(/;"	d
out_be16	arch/arm/include/asm/io.h	/^#define out_be16(/;"	d
out_be16	arch/m68k/include/asm/io.h	/^static inline void out_be16(volatile u16 * addr, int val)$/;"	f	typeref:typename:void
out_be16	arch/microblaze/include/asm/io.h	/^#define out_be16(/;"	d
out_be16	arch/nds32/include/asm/io.h	/^#define out_be16(/;"	d
out_be16	arch/nios2/include/asm/io.h	/^#define out_be16(/;"	d
out_be16	arch/powerpc/include/asm/io.h	/^static inline void out_be16(volatile unsigned short __iomem *addr, u16 val)$/;"	f	typeref:typename:void
out_be32	arch/arc/include/asm/io.h	/^#define out_be32(/;"	d
out_be32	arch/arm/include/asm/io.h	/^#define out_be32(/;"	d
out_be32	arch/m68k/include/asm/io.h	/^static inline void out_be32(volatile unsigned *addr, int val)$/;"	f	typeref:typename:void
out_be32	arch/microblaze/include/asm/io.h	/^#define out_be32(/;"	d
out_be32	arch/nds32/include/asm/io.h	/^#define out_be32(/;"	d
out_be32	arch/nios2/include/asm/io.h	/^#define out_be32(/;"	d
out_be32	arch/powerpc/include/asm/io.h	/^static inline void out_be32(volatile unsigned __iomem *addr, u32 val)$/;"	f	typeref:typename:void
out_be_fbcs_reg	arch/m68k/cpu/mcf523x/cpu_init.c	/^#define out_be_fbcs_reg	/;"	d	file:
out_bulk	drivers/usb/musb-new/musb_core.h	/^	struct list_head	out_bulk;	\/* of musb_qh *\/$/;"	m	struct:musb	typeref:struct:list_head
out_comp_to	arch/powerpc/include/asm/fsl_pci.h	/^	u32	out_comp_to;	\/* 0x00C - PCI Outbound Completion Timeout Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
out_comp_to	arch/powerpc/include/asm/immap_86xx.h	/^	uint	out_comp_to;	\/* 0x800C - PEX Outbound Completion Timeout Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
out_conf_to	arch/powerpc/include/asm/fsl_pci.h	/^	u32	out_conf_to;	\/* 0x010 - PCI Configuration Timeout Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
out_csr1_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	out_csr1_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
out_csr2_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	out_csr2_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
out_ctl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 out_ctl;			\/* fc *\/$/;"	m	struct:de_bld	typeref:typename:u32
out_ctl	arch/arm/include/asm/arch/display2.h	/^	u32 out_ctl;			\/* fc *\/$/;"	m	struct:de_bld	typeref:typename:u32
out_ctx	drivers/usb/host/xhci.h	/^	struct xhci_container_ctx       *out_ctx;$/;"	m	struct:xhci_virt_device	typeref:struct:xhci_container_ctx *
out_data	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int out_data;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
out_data	include/ec_commands.h	/^	uint32_t out_data;  \/* Output will be in_data + 0x01020304 *\/$/;"	m	struct:ec_response_hello	typeref:typename:uint32_t
out_data_toggle	drivers/usb/host/dwc2.c	/^	u8 out_data_toggle[MAX_DEVICE][MAX_ENDPOINT];$/;"	m	struct:dwc2_priv	typeref:typename:u8[][]	file:
out_dgt	lib/tiny-printf.c	/^static void out_dgt(struct printf_info *info, char dgt)$/;"	f	typeref:typename:void	file:
out_dma	drivers/video/ipu.h	/^	u8 out_dma;$/;"	m	struct:ipu_channel	typeref:typename:u8
out_dma32	drivers/dma/fsl_dma.c	/^static void out_dma32(volatile unsigned *addr, int val)$/;"	f	typeref:typename:void	file:
out_endp	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	struct dwc2_dev_out_endp out_endp[16];$/;"	m	struct:dwc2_usbotg_reg	typeref:struct:dwc2_dev_out_endp[16]
out_enum	tools/rkmux.py	/^def out_enum(field, suffix, value, skip_val=False):$/;"	f
out_ep	drivers/usb/gadget/ether.c	/^	struct usb_ep		*in_ep, *out_ep, *status_ep;$/;"	m	struct:eth_dev	typeref:struct:usb_ep *	file:
out_ep	drivers/usb/gadget/f_fastboot.c	/^	struct usb_ep *in_ep, *out_ep;$/;"	m	struct:f_fastboot	typeref:struct:usb_ep *	file:
out_ep	drivers/usb/gadget/f_thor.h	/^	struct usb_ep *in_ep, *out_ep, *int_ep;$/;"	m	struct:thor_dev	typeref:struct:usb_ep *
out_fifo_cnt1_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	out_fifo_cnt1_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
out_fifo_cnt2_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	out_fifo_cnt2_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
out_func	include/u-boot/zlib.h	/^#  define out_func /;"	d
out_func	tools/proftool.c	/^static void out_func(ulong func_offset, int is_caller, const char *suffix)$/;"	f	typeref:typename:void	file:
out_get_mode	drivers/power/regulator/sandbox.c	/^static int out_get_mode(struct udevice *dev)$/;"	f	typeref:typename:int	file:
out_get_value	drivers/power/regulator/sandbox.c	/^int out_get_value(struct udevice *dev, int output_count, int reg_type,$/;"	f	typeref:typename:int
out_h	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	out_h;		\/* Height of output window in pixels *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
out_impedance	arch/arm/mach-keystone/ddr3_spd.c	/^enum out_impedance {$/;"	g	file:
out_last_addr	cmd/portio.c	/^static uint out_last_addr, out_last_size, out_last_value;$/;"	v	typeref:typename:uint	file:
out_last_size	cmd/portio.c	/^static uint out_last_addr, out_last_size, out_last_value;$/;"	v	typeref:typename:uint	file:
out_last_value	cmd/portio.c	/^static uint out_last_addr, out_last_size, out_last_value;$/;"	v	typeref:typename:uint	file:
out_le16	arch/arc/include/asm/io.h	/^#define out_le16(/;"	d
out_le16	arch/arm/include/asm/io.h	/^#define out_le16(/;"	d
out_le16	arch/m68k/include/asm/io.h	/^static inline void out_le16(volatile u16 * addr, int val)$/;"	f	typeref:typename:void
out_le16	arch/nds32/include/asm/io.h	/^#define out_le16(/;"	d
out_le16	arch/nios2/include/asm/io.h	/^#define out_le16(/;"	d
out_le16	arch/powerpc/include/asm/io.h	/^static inline void out_le16(volatile unsigned short __iomem *addr, u16 val)$/;"	f	typeref:typename:void
out_le16	arch/sh/include/asm/io.h	/^#define out_le16(/;"	d
out_le16	arch/xtensa/include/asm/io.h	/^# define out_le16(/;"	d
out_le32	arch/arc/include/asm/io.h	/^#define out_le32(/;"	d
out_le32	arch/arm/include/asm/io.h	/^#define out_le32(/;"	d
out_le32	arch/blackfin/include/asm/io.h	/^#define out_le32(/;"	d
out_le32	arch/m68k/include/asm/io.h	/^static inline void out_le32(volatile unsigned *addr, int val)$/;"	f	typeref:typename:void
out_le32	arch/nds32/include/asm/io.h	/^#define out_le32(/;"	d
out_le32	arch/nios2/include/asm/io.h	/^#define out_le32(/;"	d
out_le32	arch/powerpc/include/asm/io.h	/^static inline void out_le32(volatile unsigned __iomem *addr, u32 val)$/;"	f	typeref:typename:void
out_le32	arch/sh/include/asm/io.h	/^#define out_le32(/;"	d
out_le32	arch/xtensa/include/asm/io.h	/^# define out_le32(/;"	d
out_le64	arch/arm/include/asm/io.h	/^#define out_le64(/;"	d
out_pixel_fmt	drivers/video/ipu.h	/^		uint32_t out_pixel_fmt;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0708	typeref:typename:uint32_t
out_pixel_fmt	drivers/video/ipu.h	/^		uint32_t out_pixel_fmt;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0908	typeref:typename:uint32_t
out_pointer	board/mpl/common/kbd.c	/^static volatile int out_pointer = 0;$/;"	v	typeref:typename:volatile int	file:
out_psci_cpu_on	arch/arm/cpu/armv7/ls102xa/psci.S	/^out_psci_cpu_on:$/;"	l
out_psci_features	arch/arm/cpu/armv7/ls102xa/psci.S	/^out_psci_features:$/;"	l
out_qh	drivers/usb/musb-new/musb_core.h	/^	struct musb_qh		*out_qh;$/;"	m	struct:musb_hw_ep	typeref:struct:musb_qh *
out_regs	include/usb/designware_udc.h	/^	struct udc_endp_regs out_regs[MAX_ENDPOINTS];$/;"	m	struct:udc_regs	typeref:struct:udc_endp_regs[]
out_req	drivers/usb/gadget/f_fastboot.c	/^	struct usb_request *in_req, *out_req;$/;"	m	struct:f_fastboot	typeref:struct:usb_request *	file:
out_req	drivers/usb/gadget/f_thor.h	/^	struct usb_request *in_req, *out_req;$/;"	m	struct:thor_dev	typeref:struct:usb_request *
out_set_mode	drivers/power/regulator/sandbox.c	/^static int out_set_mode(struct udevice *dev, int mode)$/;"	f	typeref:typename:int	file:
out_set_value	drivers/power/regulator/sandbox.c	/^static int out_set_value(struct udevice *dev, int output_count, int reg_type,$/;"	f	typeref:typename:int	file:
out_val	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	gpio_out_t	out_val;\/* Default Output Value		*\/$/;"	m	struct:__anon2654fafd0108	typeref:typename:gpio_out_t
out_w	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	out_w;		\/* Width of output window in pixels *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
out_x	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	out_x;		\/* Left edge of output window (col) *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
out_y	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	out_y;		\/* Top edge of output window (row) *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
outb	arch/arm/include/asm/io.h	/^#define outb(/;"	d
outb	arch/avr32/include/asm/io.h	/^#define outb(/;"	d
outb	arch/blackfin/include/asm/io.h	/^#define outb(/;"	d
outb	arch/m68k/include/asm/io.h	/^#define outb(/;"	d
outb	arch/microblaze/include/asm/io.h	/^#define outb(/;"	d
outb	arch/nds32/include/asm/io.h	/^#define outb(/;"	d
outb	arch/nios2/include/asm/io.h	/^#define outb(/;"	d
outb	arch/openrisc/include/asm/io.h	/^#define outb(/;"	d
outb	arch/powerpc/include/asm/io.h	/^#define outb(/;"	d
outb	arch/sandbox/lib/pci_io.c	/^void outb(unsigned int value, unsigned int addr)$/;"	f	typeref:typename:void
outb	arch/sh/include/asm/io.h	/^#define outb(/;"	d
outb	arch/x86/include/asm/io.h	/^#define outb(/;"	d
outb	arch/xtensa/include/asm/io.h	/^#define outb(/;"	d
outb	include/usbdevice.h	/^#define outb(/;"	d
outb_p	arch/arm/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/blackfin/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/microblaze/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/nds32/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/openrisc/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/powerpc/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/sh/include/asm/io.h	/^#define outb_p(/;"	d
outb_p	arch/xtensa/include/asm/io.h	/^#define outb_p(/;"	d
outblk	drivers/net/dm9000x.c	/^	void (*outblk)(volatile void *data_ptr, int count);$/;"	m	struct:board_info	typeref:typename:void (*)(volatile void * data_ptr,int count)	file:
outbound	include/tsi148.h	/^	OUTBOUND     outbound[8];             \/* 0x100         *\/$/;"	m	struct:_TSI148	typeref:typename:OUTBOUND[8]
outbuf	drivers/misc/cros_ec.c	/^		uint8_t outbuf[EC_PROTO2_MAX_PARAM_SIZE];$/;"	m	union:cros_ec_i2c_tunnel::__anon08366d3d020a	typeref:typename:uint8_t[]	file:
outbw	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_atmu_row	outbw[CONFIG_SYS_FSL_SRIO_OB_WIN_NUM];$/;"	m	struct:rio_atmu_win	typeref:struct:rio_atmu_row[]
outcb	include/u-boot/zlib.h	/^	cb_func	outcb;	\/* called regularly just before blocks of output *\/$/;"	m	struct:z_stream_s	typeref:typename:cb_func
outctrl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 outctrl;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
outdir	tools/patman/tools.py	/^outdir = None$/;"	v
outdiv	arch/mips/mach-ath79/ar934x/clk.c	/^	u8	outdiv;$/;"	m	struct:ar934x_pll_config	typeref:typename:u8	file:
outdt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 outdt;$/;"	m	struct:rcar_gpio	typeref:typename:u32
outdth	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 outdth;$/;"	m	struct:rcar_gpio	typeref:typename:u32
outdtl	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 outdtl;$/;"	m	struct:rcar_gpio	typeref:typename:u32
outdtsel	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 outdtsel;$/;"	m	struct:rcar_gpio	typeref:typename:u32
outep_regs_p	drivers/usb/gadget/designware_udc.c	/^static struct udc_endp_regs *const outep_regs_p =$/;"	v	typeref:struct:udc_endp_regs * const	file:
outf	tools/proftool.c	/^static void outf(int level, const char *fmt, ...)$/;"	f	typeref:typename:void	file:
outfile	tools/imagetool.h	/^	const char *outfile;	\/* Output filename *\/$/;"	m	struct:image_tool_params	typeref:typename:const char *
outl	arch/arm/include/asm/io.h	/^#define outl(/;"	d
outl	arch/avr32/include/asm/io.h	/^#define outl(/;"	d
outl	arch/blackfin/include/asm/io.h	/^#define outl(/;"	d
outl	arch/m68k/include/asm/io.h	/^#define outl(/;"	d
outl	arch/microblaze/include/asm/io.h	/^#define outl(/;"	d
outl	arch/nds32/include/asm/io.h	/^#define outl(/;"	d
outl	arch/nios2/include/asm/io.h	/^#define outl(/;"	d
outl	arch/powerpc/include/asm/io.h	/^#define outl(/;"	d
outl	arch/sandbox/lib/pci_io.c	/^void outl(unsigned int value, unsigned int addr)$/;"	f	typeref:typename:void
outl	arch/sh/include/asm/io.h	/^#define outl(/;"	d
outl	arch/x86/include/asm/io.h	/^#define outl(/;"	d
outl	arch/xtensa/include/asm/io.h	/^#define outl(/;"	d
outl	drivers/net/sh_eth.h	/^#define outl	/;"	d
outl	include/usbdevice.h	/^#define outl(/;"	d
outl_p	arch/arm/include/asm/io.h	/^#define outl_p(/;"	d
outl_p	arch/blackfin/include/asm/io.h	/^#define outl_p(/;"	d
outl_p	arch/microblaze/include/asm/io.h	/^#define outl_p(/;"	d
outl_p	arch/nds32/include/asm/io.h	/^#define outl_p(/;"	d
outl_p	arch/powerpc/include/asm/io.h	/^#define outl_p(/;"	d
outl_p	arch/sh/include/asm/io.h	/^#define outl_p(/;"	d
outl_p	arch/xtensa/include/asm/io.h	/^#define outl_p(/;"	d
outo_dvo	include/mpc5xxx.h	/^	volatile u8 outo_dvo;		\/* GPIO + 0x1c *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
outo_gpioe	include/mpc5xxx.h	/^	volatile u8 outo_gpioe;		\/* GPIO + 0x18 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
output	board/esd/common/xilinx_jtag/ports.c	/^static unsigned long output = 0;$/;"	v	typeref:typename:unsigned long	file:
output	drivers/video/rockchip/rk_lvds.c	/^	int output;$/;"	m	struct:rk_lvds_priv	typeref:typename:int	file:
output	include/sh_pfc.h	/^	struct pinmux_range output;$/;"	m	struct:pinmux_info	typeref:struct:pinmux_range
output	scripts/get_maintainer.pl	/^sub output {$/;"	s
output	scripts/mailmapper	/^output = {}$/;"	v
output	tools/fdtgrep.c	/^	enum output_t output;	\/* Output format *\/$/;"	m	struct:display_info	typeref:enum:output_t	file:
output_ansi_colour	drivers/serial/sandbox.c	/^static void output_ansi_colour(int colour)$/;"	f	typeref:typename:void	file:
output_ansi_reset	drivers/serial/sandbox.c	/^static void output_ansi_reset(void)$/;"	f	typeref:typename:void	file:
output_blockhead	scripts/kernel-doc	/^sub output_blockhead {$/;"	s
output_blockhead_html	scripts/kernel-doc	/^sub output_blockhead_html(%) {$/;"	s
output_blockhead_html5	scripts/kernel-doc	/^sub output_blockhead_html5(%) {$/;"	s
output_blockhead_list	scripts/kernel-doc	/^sub output_blockhead_list(%) {$/;"	s
output_blockhead_man	scripts/kernel-doc	/^sub output_blockhead_man(%) {$/;"	s
output_blockhead_text	scripts/kernel-doc	/^sub output_blockhead_text(%) {$/;"	s
output_blockhead_xml	scripts/kernel-doc	/^sub output_blockhead_xml(%) {$/;"	s
output_color_coef	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 output_color_coef[12];	\/* 0x9d0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32[12]
output_color_coef	arch/arm/include/asm/arch/display.h	/^	u32 output_color_coef[12];	\/* 0x9d0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32[12]
output_color_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 output_color_ctrl;		\/* 0x9c0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
output_color_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 output_color_ctrl;		\/* 0x9c0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
output_control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 output_control;			\/* 0xC4 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
output_data	drivers/block/sata_sil3114.c	/^static void output_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words)$/;"	f	typeref:typename:void	file:
output_declaration	scripts/kernel-doc	/^sub output_declaration {$/;"	s
output_dir	board/hisilicon/hikey/build-tf.mak	/^output_dir	:= $(PWD)\/..\/bin$/;"	m
output_enum_html	scripts/kernel-doc	/^sub output_enum_html(%) {$/;"	s
output_enum_html5	scripts/kernel-doc	/^sub output_enum_html5(%) {$/;"	s
output_enum_list	scripts/kernel-doc	/^sub output_enum_list(%) {$/;"	s
output_enum_man	scripts/kernel-doc	/^sub output_enum_man(%) {$/;"	s
output_enum_text	scripts/kernel-doc	/^sub output_enum_text(%) {$/;"	s
output_enum_xml	scripts/kernel-doc	/^sub output_enum_xml(%) {$/;"	s
output_filename	tools/mxsimage.c	/^	char				*output_filename;$/;"	m	struct:sb_image_ctx	typeref:typename:char *	file:
output_flashprog	tools/img2brec.sh	/^output_flashprog()$/;"	f
output_fmt	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 output_fmt;			\/* 0x05c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
output_fmt	arch/arm/include/asm/arch/display.h	/^	u32 output_fmt;			\/* 0x05c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
output_fname	tools/fdtgrep.c	/^	const char *output_fname;	\/* Output filename *\/$/;"	m	struct:display_info	typeref:typename:const char *	file:
output_footer	tools/rkmux.py	/^    def output_footer(self):$/;"	m	class:Printer
output_function_gnome	scripts/kernel-doc	/^sub output_function_gnome {$/;"	s
output_function_html	scripts/kernel-doc	/^sub output_function_html(%) {$/;"	s
output_function_html5	scripts/kernel-doc	/^sub output_function_html5(%) {$/;"	s
output_function_list	scripts/kernel-doc	/^sub output_function_list(%) {$/;"	s
output_function_man	scripts/kernel-doc	/^sub output_function_man(%) {$/;"	s
output_function_text	scripts/kernel-doc	/^sub output_function_text(%) {$/;"	s
output_function_xml	scripts/kernel-doc	/^sub output_function_xml(%) {$/;"	s
output_header	tools/rkmux.py	/^    def output_header(self):$/;"	m	class:Printer
output_high	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool output_high;$/;"	m	struct:pin_info	typeref:typename:bool	file:
output_highlight	scripts/kernel-doc	/^sub output_highlight {$/;"	s
output_init	tools/img2brec.sh	/^output_init()$/;"	f
output_is_new	tools/genboardscfg.py	/^def output_is_new(output):$/;"	f
output_lines	scripts/mailmapper	/^output_lines = []$/;"	v
output_packet	drivers/net/netconsole.c	/^static const char *output_packet; \/* used by first send udp *\/$/;"	v	typeref:typename:const char *	file:
output_packet_len	drivers/net/netconsole.c	/^static int output_packet_len;$/;"	v	typeref:typename:int	file:
output_params	board/astro/mcf5373l/astro.h	/^	output_params_t output_params;$/;"	m	struct:__anona9f590f60208	typeref:typename:output_params_t
output_params_t	board/astro/mcf5373l/astro.h	/^} __attribute__ ((packed)) output_params_t;$/;"	t	typeref:struct:__anona9f590f60108
output_range	drivers/power/regulator/sandbox.c	/^struct output_range {$/;"	s	file:
output_recursion	drivers/net/netconsole.c	/^static int output_recursion;$/;"	v	typeref:typename:int	file:
output_reg	include/tca642x.h	/^	uint8_t output_reg;$/;"	m	struct:tca642x_bank_info	typeref:typename:uint8_t
output_regfield	tools/rkmux.py	/^    def output_regfield(self, regfield):$/;"	m	class:Printer
output_ring	drivers/crypto/fsl/jr.h	/^	struct op_ring *output_ring;$/;"	m	struct:jobring	typeref:struct:op_ring *
output_section_html	scripts/kernel-doc	/^sub output_section_html(%) {$/;"	s
output_section_html5	scripts/kernel-doc	/^sub output_section_html5(%) {$/;"	s
output_section_text	scripts/kernel-doc	/^sub output_section_text(%) {$/;"	s
output_section_xml	scripts/kernel-doc	/^sub output_section_xml(%) {$/;"	s
output_settle_us	include/ec_commands.h	/^	uint16_t output_settle_us;$/;"	m	struct:ec_mkbp_config	typeref:typename:uint16_t
output_size	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 output_size;$/;"	m	struct:de_bld	typeref:typename:u32
output_size	arch/arm/include/asm/arch/display2.h	/^	u32 output_size;$/;"	m	struct:de_bld	typeref:typename:u32
output_struct_html	scripts/kernel-doc	/^sub output_struct_html(%) {$/;"	s
output_struct_html5	scripts/kernel-doc	/^sub output_struct_html5(%) {$/;"	s
output_struct_list	scripts/kernel-doc	/^sub output_struct_list(%) {$/;"	s
output_struct_man	scripts/kernel-doc	/^sub output_struct_man(%) {$/;"	s
output_struct_text	scripts/kernel-doc	/^sub output_struct_text(%) {$/;"	s
output_struct_xml	scripts/kernel-doc	/^sub output_struct_xml(%) {$/;"	s
output_t	tools/fdtgrep.c	/^enum output_t {$/;"	g	file:
output_typedef_html	scripts/kernel-doc	/^sub output_typedef_html(%) {$/;"	s
output_typedef_html5	scripts/kernel-doc	/^sub output_typedef_html5(%) {$/;"	s
output_typedef_list	scripts/kernel-doc	/^sub output_typedef_list(%) {$/;"	s
output_typedef_man	scripts/kernel-doc	/^sub output_typedef_man(%) {$/;"	s
output_typedef_text	scripts/kernel-doc	/^sub output_typedef_text(%) {$/;"	s
output_typedef_xml	scripts/kernel-doc	/^sub output_typedef_xml(%) {$/;"	s
output_uboot	tools/img2brec.sh	/^output_uboot()$/;"	f
outputmakefile	Makefile	/^outputmakefile:$/;"	t
outrangelenrxer	drivers/qe/uec.h	/^	u32   outrangelenrxer;   \/* out of range length error *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
outreq	drivers/usb/gadget/storage_common.c	/^	struct usb_request		*outreq;$/;"	m	struct:fsg_buffhd	typeref:struct:usb_request *	file:
outreq_busy	drivers/usb/gadget/storage_common.c	/^	int				outreq_busy;$/;"	m	struct:fsg_buffhd	typeref:typename:int	file:
outs	drivers/bios_emulator/x86emu/prim_ops.c	/^void outs(int size)$/;"	f	typeref:typename:void
outsb	arch/arm/include/asm/io.h	/^#define outsb(/;"	d
outsb	arch/m68k/include/asm/io.h	/^#define outsb(/;"	d
outsb	arch/microblaze/include/asm/io.h	/^#define outsb(/;"	d
outsb	arch/nds32/include/asm/io.h	/^#define outsb(/;"	d
outsb	arch/nios2/include/asm/io.h	/^static inline void outsb (unsigned long port, const void *src, unsigned long count)$/;"	f	typeref:typename:void
outsb	arch/powerpc/include/asm/io.h	/^#define outsb(/;"	d
outsb	arch/sh/include/asm/io.h	/^#define outsb(/;"	d
outsb_p	arch/arm/include/asm/io.h	/^#define outsb_p(/;"	d
outsb_p	arch/nds32/include/asm/io.h	/^#define outsb_p(/;"	d
outsb_p	arch/sh/include/asm/io.h	/^#define outsb_p(/;"	d
outsl	arch/arm/include/asm/io.h	/^#define outsl(/;"	d
outsl	arch/m68k/include/asm/io.h	/^#define outsl(/;"	d
outsl	arch/microblaze/include/asm/io.h	/^#define outsl(/;"	d
outsl	arch/nds32/include/asm/io.h	/^#define outsl(/;"	d
outsl	arch/nios2/include/asm/io.h	/^static inline void outsl (unsigned long port, const void *src, unsigned long count)$/;"	f	typeref:typename:void
outsl	arch/powerpc/include/asm/io.h	/^#define outsl(/;"	d
outsl	arch/sh/include/asm/io.h	/^#define outsl(/;"	d
outsl_ns	arch/m68k/include/asm/io.h	/^#define outsl_ns(/;"	d
outsl_ns	arch/powerpc/include/asm/io.h	/^#define outsl_ns(/;"	d
outsl_p	arch/arm/include/asm/io.h	/^#define outsl_p(/;"	d
outsl_p	arch/nds32/include/asm/io.h	/^#define outsl_p(/;"	d
outsl_p	arch/sh/include/asm/io.h	/^#define outsl_p(/;"	d
outstr	lib/tiny-printf.c	/^	char *outstr;	\/* Next output position for sprintf() *\/$/;"	m	struct:printf_info	typeref:typename:char *	file:
outsw	arch/arm/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/blackfin/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/m68k/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/microblaze/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/nds32/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/nios2/include/asm/io.h	/^static inline void outsw (unsigned long port, const void *src, unsigned long count)$/;"	f	typeref:typename:void
outsw	arch/powerpc/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/sandbox/include/asm/io.h	/^#define outsw(/;"	d
outsw	arch/sh/include/asm/io.h	/^#define outsw(/;"	d
outsw	include/usbdevice.h	/^#define outsw(/;"	d
outsw_ns	arch/m68k/include/asm/io.h	/^#define outsw_ns(/;"	d
outsw_ns	arch/powerpc/include/asm/io.h	/^#define outsw_ns(/;"	d
outsw_p	arch/arm/include/asm/io.h	/^#define outsw_p(/;"	d
outsw_p	arch/nds32/include/asm/io.h	/^#define outsw_p(/;"	d
outsw_p	arch/sh/include/asm/io.h	/^#define outsw_p(/;"	d
outw	arch/arm/include/asm/io.h	/^#define outw(/;"	d
outw	arch/avr32/include/asm/io.h	/^#define outw(/;"	d
outw	arch/blackfin/include/asm/io.h	/^#define outw(/;"	d
outw	arch/m68k/include/asm/io.h	/^#define outw(/;"	d
outw	arch/microblaze/include/asm/io.h	/^#define outw(/;"	d
outw	arch/nds32/include/asm/io.h	/^#define outw(/;"	d
outw	arch/nios2/include/asm/io.h	/^#define outw(/;"	d
outw	arch/powerpc/include/asm/io.h	/^#define outw(/;"	d
outw	arch/sandbox/lib/pci_io.c	/^void outw(unsigned int value, unsigned int addr)$/;"	f	typeref:typename:void
outw	arch/sh/include/asm/io.h	/^#define outw(/;"	d
outw	arch/x86/include/asm/io.h	/^#define outw(/;"	d
outw	arch/xtensa/include/asm/io.h	/^#define outw(/;"	d
outw	include/usbdevice.h	/^#define outw(/;"	d
outw_p	arch/arm/include/asm/io.h	/^#define outw_p(/;"	d
outw_p	arch/blackfin/include/asm/io.h	/^#define outw_p(/;"	d
outw_p	arch/microblaze/include/asm/io.h	/^#define outw_p(/;"	d
outw_p	arch/nds32/include/asm/io.h	/^#define outw_p(/;"	d
outw_p	arch/powerpc/include/asm/io.h	/^#define outw_p(/;"	d
outw_p	arch/sh/include/asm/io.h	/^#define outw_p(/;"	d
outw_p	arch/xtensa/include/asm/io.h	/^#define outw_p(/;"	d
ov	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
ov0_scale_cntl	drivers/video/ati_radeon_fb.h	/^	u32		ov0_scale_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
ov2659_0	arch/arm/dts/am437x-gp-evm.dts	/^			ov2659_0: endpoint {$/;"	l
ov2659_1	arch/arm/dts/am437x-gp-evm.dts	/^			ov2659_1: endpoint {$/;"	l
overcurrent_count	include/usb.h	/^	int overcurrent_count[USB_MAXCHILDREN];	\/* Over-current counter *\/$/;"	m	struct:usb_hub_device	typeref:typename:int[]
overflow_status	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 overflow_status;	\/* Overflow Flag Status *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0c08	typeref:typename:u32
overflow_status	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 overflow_status;		\/* Overflow Flag Status *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
overflow_status	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 overflow_status;	\/* Overflow Flag Status *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0808	typeref:typename:u32
overflow_status	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 overflow_status;		\/* Overflow Flag Status *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
overlay	drivers/video/mxc_ipuv3_fb.c	/^	unsigned char overlay;$/;"	m	struct:mxcfb_info	typeref:typename:unsigned char	file:
overlay_adjust_local_phandles	lib/libfdt/fdt_overlay.c	/^static int overlay_adjust_local_phandles(void *fdto, uint32_t delta)$/;"	f	typeref:typename:int	file:
overlay_adjust_node_phandles	lib/libfdt/fdt_overlay.c	/^static int overlay_adjust_node_phandles(void *fdto, int node,$/;"	f	typeref:typename:int	file:
overlay_apply_node	lib/libfdt/fdt_overlay.c	/^static int overlay_apply_node(void *fdt, int target,$/;"	f	typeref:typename:int	file:
overlay_fixup_one_phandle	lib/libfdt/fdt_overlay.c	/^static int overlay_fixup_one_phandle(void *fdt, void *fdto,$/;"	f	typeref:typename:int	file:
overlay_fixup_phandle	lib/libfdt/fdt_overlay.c	/^static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off,$/;"	f	typeref:typename:int	file:
overlay_fixup_phandles	lib/libfdt/fdt_overlay.c	/^static int overlay_fixup_phandles(void *fdt, void *fdto)$/;"	f	typeref:typename:int	file:
overlay_get_target	lib/libfdt/fdt_overlay.c	/^static int overlay_get_target(const void *fdt, const void *fdto,$/;"	f	typeref:typename:int	file:
overlay_get_target_phandle	lib/libfdt/fdt_overlay.c	/^static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)$/;"	f	typeref:typename:uint32_t	file:
overlay_merge	lib/libfdt/fdt_overlay.c	/^static int overlay_merge(void *fdt, void *fdto)$/;"	f	typeref:typename:int	file:
overlay_phandle_add_offset	lib/libfdt/fdt_overlay.c	/^static int overlay_phandle_add_offset(void *fdt, int node,$/;"	f	typeref:typename:int	file:
overlay_update_local_node_references	lib/libfdt/fdt_overlay.c	/^static int overlay_update_local_node_references(void *fdto,$/;"	f	typeref:typename:int	file:
overlay_update_local_references	lib/libfdt/fdt_overlay.c	/^static int overlay_update_local_references(void *fdto, uint32_t delta)$/;"	f	typeref:typename:int	file:
overo_serial	board/overo/overo.c	/^static const struct ns16550_platdata overo_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
override_compr	fs/ubifs/ubifs.h	/^	unsigned int override_compr:1;$/;"	m	struct:ubifs_mount_opts	typeref:typename:unsigned int:1
overrun	drivers/ddr/marvell/axp/ddr3_read_leveling.c	/^static void overrun(u32 cs, MV_DRAM_INFO *info, u32 pup, u32 locked_pups,$/;"	f	typeref:typename:void	file:
overscan	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_overscan overscan;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_overscan	file:
overwrite_console	arch/arm/mach-socfpga/misc.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/BuR/common/common.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/advantech/dms-ba16/dms-ba16.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/aristainetos/aristainetos.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/boundary/nitrogen6x/nitrogen6x.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/davinci/ea20/ea20.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/el/el6x/el6x.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/embest/mx6boards/mx6boards.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/freescale/mx51evk/mx51evk.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/freescale/mx53loco/mx53loco.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/freescale/mx6sabresd/mx6sabresd.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/ge/bx50v3/bx50v3.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/mpl/common/kbd.c	/^int overwrite_console (void)$/;"	f	typeref:typename:int
overwrite_console	board/mpl/mip405/mip405.c	/^int overwrite_console (void)$/;"	f	typeref:typename:int
overwrite_console	board/mpl/pip405/pip405.c	/^int overwrite_console (void)$/;"	f	typeref:typename:int
overwrite_console	board/technologic/ts4800/ts4800.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	board/wandboard/wandboard.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
overwrite_console	common/usb_kbd.c	/^int overwrite_console(void)$/;"	f	typeref:typename:int
ovfpin	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ovfpin;		\/* Ovf and Pin *\/$/;"	m	struct:gptmr	typeref:typename:u8
ovl_size	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ovl_size;			\/* 88 *\/$/;"	m	struct:de_ui	typeref:typename:u32
ovl_size	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 ovl_size[2];		\/* e8 *\/$/;"	m	struct:de_vi	typeref:typename:u32[2]
ovl_size	arch/arm/include/asm/arch/display2.h	/^	u32 ovl_size;			\/* 88 *\/$/;"	m	struct:de_ui	typeref:typename:u32
ovl_size	arch/arm/include/asm/arch/display2.h	/^	u32 ovl_size[2];		\/* e8 *\/$/;"	m	struct:de_vi	typeref:typename:u32[2]
ovpr	include/fsl_sfp.h	/^	u32 ovpr;			\/* 0xA4  Intent To Secure *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
ovpr	include/fsl_sfp.h	/^	u32 ovpr;	\/* 0xA4  OEM Validation Policy Register *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32
ovr_clr	drivers/video/ati_radeon_fb.h	/^	u32		ovr_clr;$/;"	m	struct:radeon_regs	typeref:typename:u32
ovr_wid_left_right	drivers/video/ati_radeon_fb.h	/^	u32		ovr_wid_left_right;$/;"	m	struct:radeon_regs	typeref:typename:u32
ovr_wid_top_bottom	drivers/video/ati_radeon_fb.h	/^	u32		ovr_wid_top_bottom;$/;"	m	struct:radeon_regs	typeref:typename:u32
owdr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	owdr;		\/* 0xA4 Output Write Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ower	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ower;		\/* 0xA0 Output Write Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
own	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 own[GPIO_BANKS];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[]
owner	arch/x86/include/asm/fsp/fsp_hob.h	/^	struct efi_guid		owner;$/;"	m	struct:hob_res_desc	typeref:struct:efi_guid
owner	fs/ubifs/ubifs.h	/^	struct module *owner;$/;"	m	struct:file_system_type	typeref:struct:module *
owner	include/linux/compat.h	/^	int owner;$/;"	m	struct:cdev	typeref:typename:int
owner	include/linux/mtd/mtd.h	/^	struct module *owner;$/;"	m	struct:mtd_info	typeref:struct:module *
owner	include/linux/mtd/partitions.h	/^	struct module *owner;$/;"	m	struct:mtd_part_parser	typeref:struct:module *
owner_gpio	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool owner_gpio;$/;"	m	struct:pin_info	typeref:typename:bool	file:
ownership	include/tpm.h	/^	u8	ownership;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
owrcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	owrcfg;		\/* 0x120: APB_MISC_GP_OWRCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
owrcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	owrcfg;		\/* 0x120: APB_MISC_GP_OWRCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
owrcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	owrcfg;		\/* 0x120: APB_MISC_GP_OWRCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
owsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	owsr;		\/* OxA8 Output Write Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
p	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			p;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
p	arch/arm/mach-tegra/cpu.h	/^	u8	p;$/;"	m	struct:clk_pll_table	typeref:typename:u8
p	arch/x86/lib/physmem.c	/^	uint64_t p:1;      \/* present *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
p	arch/x86/lib/physmem.c	/^	uint64_t p:1;$/;"	m	struct:pdpe	typeref:typename:uint64_t:1	file:
p	common/cli_hush.c	/^	const char *p;$/;"	m	struct:in_str	typeref:typename:const char *	file:
p	drivers/misc/cros_ec.c	/^		struct ec_params_i2c_passthru p;$/;"	m	union:cros_ec_i2c_tunnel::__anon08366d3d020a	typeref:struct:ec_params_i2c_passthru	file:
p0	arch/blackfin/include/asm/ptrace.h	/^	long p0;$/;"	m	struct:pt_regs	typeref:typename:long
p0	arch/blackfin/lib/__kgdb.S	/^	p0 = [sp++];$/;"	d
p0	arch/blackfin/lib/__kgdb.S	/^	p0 = r0;$/;"	d
p0	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG p0;		\/* r26 - used by OS *\/$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
p0_dir_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_dir_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p0_dir_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_dir_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p0_dir_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_dir_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p0_inp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_inp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p0_intr_er	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 p0_intr_er;		\/* Port 0\/1 Start and Interrupt Enable	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
p0_mpdgctrl0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p0_mpdgctrl0;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p0_mpdgctrl1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p0_mpdgctrl1;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p0_mprddlctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p0_mprddlctl;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p0_mpwldectrl0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p0_mpwldectrl0;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p0_mpwldectrl1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p0_mpwldectrl1;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p0_mpwrdlctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p0_mpwrdlctl;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p0_mux_clr	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p0_mux_clr;$/;"	m	struct:mux_regs	typeref:typename:u32
p0_mux_set	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p0_mux_set;$/;"	m	struct:mux_regs	typeref:typename:u32
p0_mux_state	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p0_mux_state;$/;"	m	struct:mux_regs	typeref:typename:u32
p0_outp_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_outp_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p0_outp_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_outp_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p0_outp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p0_outp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1	arch/blackfin/include/asm/ptrace.h	/^	long p1;$/;"	m	struct:pt_regs	typeref:typename:long
p1	arch/blackfin/lib/__kgdb.S	/^	p1 = [p0 + 0x04];$/;"	d
p1	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG p1;		\/* r27 - used by OS *\/$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
p1	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^  unsigned int p1, p2, res;$/;"	m	struct:__anonba1e0a450108	typeref:typename:unsigned int	file:
p1_dir_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_dir_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1_dir_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_dir_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1_dir_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_dir_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1_inp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_inp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1_mpdgctrl0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p1_mpdgctrl0;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p1_mpdgctrl1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p1_mpdgctrl1;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p1_mprddlctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p1_mprddlctl;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p1_mpwldectrl0	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p1_mpwldectrl0;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p1_mpwldectrl1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p1_mpwldectrl1;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p1_mpwrdlctl	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 p1_mpwrdlctl;$/;"	m	struct:mx6_mmdc_calibration	typeref:typename:u32
p1_mux_clr	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p1_mux_clr;$/;"	m	struct:mux_regs	typeref:typename:u32
p1_mux_set	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p1_mux_set;$/;"	m	struct:mux_regs	typeref:typename:u32
p1_mux_state	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p1_mux_state;$/;"	m	struct:mux_regs	typeref:typename:u32
p1_outp_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_outp_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1_outp_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_outp_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p1_outp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p1_outp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2	arch/blackfin/include/asm/ptrace.h	/^	long p2;$/;"	m	struct:pt_regs	typeref:typename:long
p2	arch/blackfin/lib/__kgdb.S	/^	p2 = [p0 + 0x08];$/;"	d
p2	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^  unsigned int p1, p2, res;$/;"	m	struct:__anonba1e0a450108	typeref:typename:unsigned int	file:
p2371_0000_drvgrps	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
p2371_0000_gpio_inits	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^static const struct tegra_gpio_config p2371_0000_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
p2371_0000_pingrps	board/nvidia/p2371-0000/pinmux-config-p2371-0000.h	/^static const struct pmux_pingrp_config p2371_0000_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
p2371_2180_drvgrps	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^static const struct pmux_drvgrp_config p2371_2180_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
p2371_2180_gpio_inits	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^static const struct tegra_gpio_config p2371_2180_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
p2371_2180_pingrps	board/nvidia/p2371-2180/pinmux-config-p2371-2180.h	/^static const struct pmux_pingrp_config p2371_2180_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
p2571_drvgrps	board/nvidia/p2571/pinmux-config-p2571.h	/^static const struct pmux_drvgrp_config p2571_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
p2571_gpio_inits	board/nvidia/p2571/pinmux-config-p2571.h	/^static const struct tegra_gpio_config p2571_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
p2571_pingrps	board/nvidia/p2571/pinmux-config-p2571.h	/^static const struct pmux_pingrp_config p2571_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
p2_inp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p2_inp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2_mux_clr	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p2_mux_clr;$/;"	m	struct:mux_regs	typeref:typename:u32
p2_mux_set	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p2_mux_set;$/;"	m	struct:mux_regs	typeref:typename:u32
p2_mux_state	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p2_mux_state;$/;"	m	struct:mux_regs	typeref:typename:u32
p2_outp_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p2_outp_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2_outp_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p2_outp_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2_p3_dir_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p2_p3_dir_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2_p3_dir_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p2_p3_dir_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2_p3_dir_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p2_p3_dir_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p2pll_div_0	drivers/video/ati_radeon_fb.h	/^	u32		p2pll_div_0;$/;"	m	struct:radeon_regs	typeref:typename:u32
p2pll_ref_div	drivers/video/ati_radeon_fb.h	/^	u32		p2pll_ref_div;$/;"	m	struct:radeon_regs	typeref:typename:u32
p2surround	include/usbdevice.h	/^#define p2surround(/;"	d
p2wi	arch/arm/dts/sun6i-a31.dtsi	/^		p2wi: i2c@01f03400 {$/;"	l
p2wi_await_trans	arch/arm/mach-sunxi/p2wi.c	/^static int p2wi_await_trans(void)$/;"	f	typeref:typename:int	file:
p2wi_change_to_p2wi_mode	arch/arm/mach-sunxi/p2wi.c	/^int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data)$/;"	f	typeref:typename:int
p2wi_init	arch/arm/mach-sunxi/p2wi.c	/^void p2wi_init(void)$/;"	f	typeref:typename:void
p2wi_pins	arch/arm/dts/sun6i-a31.dtsi	/^			p2wi_pins: p2wi {$/;"	l	label:r_pio
p2wi_read	arch/arm/mach-sunxi/p2wi.c	/^int p2wi_read(const u8 addr, u8 *data)$/;"	f	typeref:typename:int
p2wi_write	arch/arm/mach-sunxi/p2wi.c	/^int p2wi_write(const u8 addr, u8 data)$/;"	f	typeref:typename:int
p3	arch/blackfin/cpu/start.S	/^	p3 = r0;$/;"	d
p3	arch/blackfin/include/asm/ptrace.h	/^	long p3;$/;"	m	struct:pt_regs	typeref:typename:long
p3	arch/blackfin/lib/__kgdb.S	/^	p3 = [p0 + 0x0C];$/;"	d
p3_inp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p3_inp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p3_mux_clr	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p3_mux_clr;$/;"	m	struct:mux_regs	typeref:typename:u32
p3_mux_set	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p3_mux_set;$/;"	m	struct:mux_regs	typeref:typename:u32
p3_mux_state	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p3_mux_state;$/;"	m	struct:mux_regs	typeref:typename:u32
p3_outp_clr	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p3_outp_clr;$/;"	m	struct:gpio_regs	typeref:typename:u32
p3_outp_set	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p3_outp_set;$/;"	m	struct:gpio_regs	typeref:typename:u32
p3_outp_state	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 p3_outp_state;$/;"	m	struct:gpio_regs	typeref:typename:u32
p4	arch/blackfin/include/asm/ptrace.h	/^	long p4;$/;"	m	struct:pt_regs	typeref:typename:long
p4	arch/blackfin/lib/__kgdb.S	/^	p4 = [p0 + 0x10];$/;"	d
p4080_erratum_serdes8	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static void p4080_erratum_serdes8(serdes_corenet_t *regs, ccsr_gur_t *gur,$/;"	f	typeref:typename:void	file:
p4080_erratum_serdes_a005	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static void p4080_erratum_serdes_a005(serdes_corenet_t *regs, unsigned int cfg)$/;"	f	typeref:typename:void	file:
p4080ds_mdio	board/freescale/corenet_ds/eth_p4080.c	/^struct p4080ds_mdio {$/;"	s	file:
p4080ds_mdio_init	board/freescale/corenet_ds/eth_p4080.c	/^static int p4080ds_mdio_init(char *realbusname, u32 muxval)$/;"	f	typeref:typename:int	file:
p4080ds_mdio_name_for_muxval	board/freescale/corenet_ds/eth_p4080.c	/^static char *p4080ds_mdio_name_for_muxval(u32 muxval)$/;"	f	typeref:typename:char *	file:
p4080ds_mdio_read	board/freescale/corenet_ds/eth_p4080.c	/^static int p4080ds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
p4080ds_mdio_reset	board/freescale/corenet_ds/eth_p4080.c	/^static int p4080ds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
p4080ds_mdio_write	board/freescale/corenet_ds/eth_p4080.c	/^static int p4080ds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
p4080ds_mux_mdio	board/freescale/corenet_ds/eth_p4080.c	/^static void p4080ds_mux_mdio(u32 muxval)$/;"	f	typeref:typename:void	file:
p4_in	drivers/pci/pci_sh7751.c	/^#define p4_in(/;"	d	file:
p4_in	drivers/pci/pci_sh7780.c	/^#define p4_in(/;"	d	file:
p4_inw	drivers/pci/pci_sh7780.c	/^#define p4_inw(/;"	d	file:
p4_out	drivers/pci/pci_sh7751.c	/^#define p4_out(/;"	d	file:
p4_out	drivers/pci/pci_sh7780.c	/^#define p4_out(/;"	d	file:
p4_outw	drivers/pci/pci_sh7780.c	/^#define p4_outw(/;"	d	file:
p5	arch/blackfin/include/asm/ptrace.h	/^	long p5;$/;"	m	struct:pt_regs	typeref:typename:long
p5	arch/blackfin/lib/__kgdb.S	/^	p5 = [p0 + 0x14];$/;"	d
pCallBackFunction	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pCallBackFunction;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pControlRegister	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t *pControlRegister;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t *
pDataFlashDesc	include/dataflash.h	/^	AT91PS_DataflashDesc pDataFlashDesc;	\/* dataflash descriptor *\/$/;"	m	struct:_AT91S_DataFlash	typeref:typename:AT91PS_DataflashDesc
pDestination	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pDestination;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pDevice	include/dataflash.h	/^	AT91PS_DataflashFeatures pDevice;	\/* Pointer on a dataflash features array *\/$/;"	m	struct:_AT91S_DataFlash	typeref:typename:AT91PS_DataflashFeatures
pDmaControlRegister	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t *pDmaControlRegister;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t *
pErrorFunction	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pErrorFunction;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pGD	drivers/video/cfb_console.c	/^static GraphicDevice *pGD;	\/* Pointer to Graphic array *\/$/;"	v	typeref:typename:GraphicDevice *	file:
pHeader	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	ADI_BOOT_HEADER *pHeader;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:ADI_BOOT_HEADER *
pLoadFunction	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pLoadFunction;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pLogBuffer	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pLogBuffer;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pLogCurrent	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pLogCurrent;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pNext	drivers/net/bfin_mac.h	/^	struct adi_ether_buffer *pNext;	\/* next buffer *\/$/;"	m	struct:adi_ether_buffer	typeref:struct:adi_ether_buffer *
pPrev	drivers/net/bfin_mac.h	/^	struct adi_ether_buffer *pPrev;	\/* prev buffer *\/$/;"	m	struct:adi_ether_buffer	typeref:struct:adi_ether_buffer *
pSource	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pSource;$/;"	m	struct:ADI_BOOT_BUFFER	typeref:typename:void *
pSource	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pSource;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pTargetAddress	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pTargetAddress;$/;"	m	struct:ADI_BOOT_HEADER	typeref:typename:void *
pTempBuffer	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pTempBuffer;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pTempCurrent	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	void    *pTempCurrent;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:void *
pUART	arch/blackfin/include/asm/serial.h	/^#define pUART /;"	d
pWTCON	arch/arm/cpu/arm920t/start.S	/^#  define pWTCON	/;"	d	file:
p_adr	include/mtd/cfi_flash.h	/^	u16	p_adr;			\/* unaligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u16
p_align	include/elf.h	/^	Elf32_Word	p_align;	\/* memory alignment *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Word
p_aligned_txbuf	drivers/net/armada100_fec.h	/^	u8 *p_aligned_txbuf;$/;"	m	struct:armdfec_device	typeref:typename:u8 *
p_aligned_txbuf	drivers/net/mvgbe.h	/^	u8 *p_aligned_txbuf;$/;"	m	struct:mvgbe_device	typeref:typename:u8 *
p_bd_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) qe_bd_t, *p_bd_t;$/;"	t	typeref:struct:buffer_descriptor *
p_clk	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 p_clk;$/;"	m	struct:sar_freq_modes	typeref:typename:u32
p_context	common/cli_hush.c	/^struct p_context {$/;"	s	file:
p_current	include/linux/compat.h	/^struct p_current{$/;"	s
p_data	drivers/gpio/zynq_gpio.c	/^	const struct zynq_platform_data *p_data;$/;"	m	struct:zynq_gpio_privdata	typeref:typename:const struct zynq_platform_data *	file:
p_disp_panel	drivers/video/da8xx-fb.h	/^	const struct display_panel *p_disp_panel;$/;"	m	struct:lcd_ctrl_config	typeref:typename:const struct display_panel *
p_div	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int p_div;		\/* p divider value *\/$/;"	m	struct:set_epll_con_val	typeref:typename:unsigned int
p_dma_channels_rd	board/micronas/vct/scc.h	/^	u32 p_dma_channels_rd;	\/* Number of Read DMA channels		*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
p_dma_channels_wr	board/micronas/vct/scc.h	/^	u32 p_dma_channels_wr;	\/* Number of Write DMA channels		*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
p_dma_mci_desc	board/micronas/vct/scc.h	/^	u32 p_dma_mci_desc;	\/* Number of MCI_CFG Descriptors	*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
p_dma_packet_desc	board/micronas/vct/scc.h	/^	u32 p_dma_packet_desc;	\/* Number of packet descriptors		*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
p_filesz	include/elf.h	/^	Elf32_Word	p_filesz;	\/* number of bytes in file for seg. *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Word
p_finger	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u32 p_finger;$/;"	m	struct:tune_train_params	typeref:typename:u32
p_finger_end	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 finger_test = 0, p_finger_start = 11, p_finger_end = 64,$/;"	v	typeref:typename:u32
p_finger_start	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 finger_test = 0, p_finger_start = 11, p_finger_end = 64,$/;"	v	typeref:typename:u32
p_finger_step	drivers/ddr/marvell/a38x/ddr3_training.c	/^	p_finger_step = 3, n_finger_step = 3;$/;"	v	typeref:typename:u32
p_flags	include/elf.h	/^	Elf32_Word	p_flags;	\/* flags *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Word
p_frc	board/keymile/common/common.h	/^	u8	p_frc;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
p_i2c	include/power/pmic.h	/^struct p_i2c {$/;"	s
p_id	include/mtd/cfi_flash.h	/^	u16	p_id;			\/* unaligned *\/$/;"	m	struct:cfi_qry	typeref:typename:u16
p_inb	drivers/bios_emulator/x86emu/sys.c	/^static u8 X86API p_inb(X86EMU_pioAddr addr)$/;"	f	typeref:typename:u8 X86API	file:
p_init_enet_param	drivers/qe/uec.h	/^	uec_init_cmd_pram_t		*p_init_enet_param;$/;"	m	struct:uec_private	typeref:typename:uec_init_cmd_pram_t *
p_inl	drivers/bios_emulator/x86emu/sys.c	/^static u32 X86API p_inl(X86EMU_pioAddr addr)$/;"	f	typeref:typename:u32 X86API	file:
p_inw	drivers/bios_emulator/x86emu/sys.c	/^static u16 X86API p_inw(X86EMU_pioAddr addr)$/;"	f	typeref:typename:u16 X86API	file:
p_lvl2_lat	arch/x86/include/asm/acpi_table.h	/^	u16 p_lvl2_lat;$/;"	m	struct:acpi_fadt	typeref:typename:u16
p_lvl3_lat	arch/x86/include/asm/acpi_table.h	/^	u16 p_lvl3_lat;$/;"	m	struct:acpi_fadt	typeref:typename:u16
p_mask	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	p_mask:10;	\/* DIVP_MASK or VCO_MASK *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:10
p_mci_id	board/micronas/vct/scc.h	/^	u32 p_mci_id;		\/* memory channel ID			*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
p_memsz	include/elf.h	/^	Elf32_Word	p_memsz;	\/* number of bytes in mem. for seg. *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Word
p_msk	board/keymile/common/common.h	/^	u8	p_msk;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
p_mux_clr	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p_mux_clr;$/;"	m	struct:mux_regs	typeref:typename:u32
p_mux_set	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p_mux_set;$/;"	m	struct:mux_regs	typeref:typename:u32
p_mux_state	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 p_mux_state;$/;"	m	struct:mux_regs	typeref:typename:u32
p_offset	arch/powerpc/include/asm/immap_512x.h	/^	int p_offset;		\/* offset from IOCTL_MEM_OFFSET *\/$/;"	m	struct:iopin_t	typeref:typename:int
p_offset	include/elf.h	/^	Elf32_Off	p_offset;	\/* segment offset *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Off
p_outb	drivers/bios_emulator/x86emu/sys.c	/^static void X86API p_outb(X86EMU_pioAddr addr, u8 val)$/;"	f	typeref:typename:void X86API	file:
p_outl	drivers/bios_emulator/x86emu/sys.c	/^static void X86API p_outl(X86EMU_pioAddr addr, u32 val)$/;"	f	typeref:typename:void X86API	file:
p_outw	drivers/bios_emulator/x86emu/sys.c	/^static void X86API p_outw(X86EMU_pioAddr addr, u16 val)$/;"	f	typeref:typename:void X86API	file:
p_paddr	include/elf.h	/^	Elf32_Addr	p_paddr;	\/* physical address - ignored? *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Addr
p_palette_base	drivers/video/da8xx-fb.c	/^	u32			 p_palette_base;$/;"	m	struct:da8xx_fb_par	typeref:typename:u32	file:
p_rx_bd_qs_tbl	drivers/qe/uec.h	/^	uec_rx_bd_queues_entry_t	*p_rx_bd_qs_tbl;$/;"	m	struct:uec_private	typeref:typename:uec_rx_bd_queues_entry_t *
p_rx_bd_ring	drivers/qe/uec.h	/^	u8				*p_rx_bd_ring;$/;"	m	struct:uec_private	typeref:typename:u8 *
p_rx_buf	drivers/qe/uec.h	/^	u8				*p_rx_buf;$/;"	m	struct:uec_private	typeref:typename:u8 *
p_rx_glbl_pram	drivers/qe/uec.h	/^	uec_rx_global_pram_t		*p_rx_glbl_pram;$/;"	m	struct:uec_private	typeref:typename:uec_rx_global_pram_t *
p_rxbuf	drivers/net/armada100_fec.h	/^	u8 *p_rxbuf;$/;"	m	struct:armdfec_device	typeref:typename:u8 *
p_rxbuf	drivers/net/mvgbe.h	/^	u8 *p_rxbuf;$/;"	m	struct:mvgbe_device	typeref:typename:u8 *
p_rxdesc	drivers/net/armada100_fec.h	/^	struct rx_desc *p_rxdesc;$/;"	m	struct:armdfec_device	typeref:struct:rx_desc *
p_rxdesc	drivers/net/mvgbe.h	/^	struct mvgbe_rxdesc *p_rxdesc;$/;"	m	struct:mvgbe_device	typeref:struct:mvgbe_rxdesc *
p_rxdesc_curr	drivers/net/armada100_fec.h	/^	struct rx_desc *p_rxdesc_curr;$/;"	m	struct:armdfec_device	typeref:struct:rx_desc *
p_rxdesc_curr	drivers/net/mvgbe.h	/^	struct mvgbe_rxdesc *p_rxdesc_curr;$/;"	m	struct:mvgbe_device	typeref:struct:mvgbe_rxdesc *
p_scc_id	board/micronas/vct/scc.h	/^	u32 p_scc_id;		\/* instance number of SCC unit		*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
p_send_q_mem_reg	drivers/qe/uec.h	/^	uec_send_queue_mem_region_t	*p_send_q_mem_reg;$/;"	m	struct:uec_private	typeref:typename:uec_send_queue_mem_region_t *
p_shift	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	p_shift:5;	\/* DIVP_SHIFT *\/$/;"	m	struct:clk_pll_info	typeref:typename:u32:5
p_si2ocp_id	board/micronas/vct/scc.h	/^	int p_si2ocp_id;	\/* instance number of SI2OCP unit	*\/$/;"	m	struct:scc_descriptor	typeref:typename:int
p_spi	include/power/pmic.h	/^struct p_spi {$/;"	s
p_thread_data_rx	drivers/qe/uec.h	/^	uec_thread_data_rx_t		*p_thread_data_rx;$/;"	m	struct:uec_private	typeref:typename:uec_thread_data_rx_t *
p_thread_data_tx	drivers/qe/uec.h	/^	uec_thread_data_tx_t		*p_thread_data_tx;$/;"	m	struct:uec_private	typeref:typename:uec_thread_data_tx_t *
p_tx_bd_ring	drivers/qe/uec.h	/^	u8				*p_tx_bd_ring;$/;"	m	struct:uec_private	typeref:typename:u8 *
p_tx_glbl_pram	drivers/qe/uec.h	/^	uec_tx_global_pram_t		*p_tx_glbl_pram;$/;"	m	struct:uec_private	typeref:typename:uec_tx_global_pram_t *
p_txdesc	drivers/net/armada100_fec.h	/^	struct tx_desc *p_txdesc;$/;"	m	struct:armdfec_device	typeref:struct:tx_desc *
p_txdesc	drivers/net/mvgbe.h	/^	struct mvgbe_txdesc *p_txdesc;$/;"	m	struct:mvgbe_device	typeref:struct:mvgbe_txdesc *
p_type	include/elf.h	/^	Elf32_Word	p_type;		\/* segment type *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Word
p_ucce	drivers/qe/uccf.h	/^	u32		*p_ucce; \/* a pointer to the event register *\/$/;"	m	struct:ucc_fast_private	typeref:typename:u32 *
p_uccm	drivers/qe/uccf.h	/^	u32		*p_uccm; \/* a pointer to the mask register *\/$/;"	m	struct:ucc_fast_private	typeref:typename:u32 *
p_vaddr	include/elf.h	/^	Elf32_Addr	p_vaddr;	\/* virtual address of segment *\/$/;"	m	struct:__anona52b83e50608	typeref:typename:Elf32_Addr
pa_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	pa_clk,$/;"	e	enum:ext_clk_e
pa_pll_config	board/ti/ks2_evm/board_k2e.c	/^static struct pll_init_data pa_pll_config =$/;"	v	typeref:struct:pll_init_data	file:
pa_pll_config	board/ti/ks2_evm/board_k2hk.c	/^static struct pll_init_data pa_pll_config =$/;"	v	typeref:struct:pll_init_data	file:
pa_pll_config	board/ti/ks2_evm/board_k2l.c	/^static struct pll_init_data pa_pll_config =$/;"	v	typeref:struct:pll_init_data	file:
paace	arch/powerpc/include/asm/fsl_pamu.h	/^struct paace {$/;"	s
pacestretch	drivers/net/calxedaxgmac.c	/^	u32 pacestretch;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
pack1	board/keymile/common/common.h	/^	u8	pack1[3];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[3]
pack10	board/keymile/common/common.h	/^	u8	pack10[16];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[16]
pack11	board/keymile/common/common.h	/^	u8	pack11[13];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[13]
pack12	board/keymile/common/common.h	/^	u8	pack12[11];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[11]
pack13	board/keymile/common/common.h	/^	u8	pack13;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack14	board/keymile/common/common.h	/^	u8	pack14[7];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[7]
pack15	board/keymile/common/common.h	/^	u8	pack15;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack16	board/keymile/common/common.h	/^	u8	pack16;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack17	board/keymile/common/common.h	/^	u8	pack17;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack18	board/keymile/common/common.h	/^	u8	pack18[6];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[6]
pack2	board/keymile/common/common.h	/^	u8	pack2;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack3	board/keymile/common/common.h	/^	u8	pack3;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack4	board/keymile/common/common.h	/^	u8	pack4;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack5	board/keymile/common/common.h	/^	u8	pack5[2];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[2]
pack6	board/keymile/common/common.h	/^	u8	pack6[15];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[15]
pack7	board/keymile/common/common.h	/^	u8	pack7;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack8	board/keymile/common/common.h	/^	u8	pack8;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pack9	board/keymile/common/common.h	/^	u8	pack9[11];$/;"	m	struct:bfticu_iomap	typeref:typename:u8[11]
pack_bits	fs/ubifs/lpt.c	/^static void pack_bits(uint8_t **addr, int *pos, uint32_t val, int nrbits)$/;"	f	typeref:typename:void	file:
pack_byte_string	lib/tpm.c	/^int pack_byte_string(uint8_t *str, size_t size, const char *format, ...)$/;"	f	typeref:typename:int
pack_fifo	drivers/usb/host/isp116x-hcd.c	/^static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,$/;"	f	typeref:typename:void	file:
pack_hex_byte	lib/vsprintf.c	/^static inline char *pack_hex_byte(char *buf, u8 byte)$/;"	f	typeref:typename:char *	file:
pack_info	drivers/video/stb_truetype.h	/^   void *pack_info;$/;"	m	struct:stbtt_pack_context	typeref:typename:void *
package_trace_arr	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^	struct trip_delay_element *package_trace_arr;$/;"	m	struct:hws_tip_static_config_info	typeref:struct:trip_delay_element *
package_type	include/ddr_spd.h	/^	uint8_t package_type;		\/*  6 Package type *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
packet	drivers/net/ethoc.c	/^	void __iomem *packet;$/;"	m	struct:ethoc	typeref:typename:void __iomem *	file:
packet	drivers/net/lpc32xx_eth.c	/^	u32 packet;		\/* Receive packet pointer *\/$/;"	m	struct:lpc32xx_eth_rxdesc	typeref:typename:u32	file:
packet	drivers/net/lpc32xx_eth.c	/^	u32 packet;		\/* Transmit packet pointer *\/$/;"	m	struct:lpc32xx_eth_txdesc	typeref:typename:u32	file:
packet	include/cros_ec.h	/^	int (*packet)(struct udevice *dev, int out_bytes, int in_bytes);$/;"	m	struct:dm_cros_ec_ops	typeref:typename:int (*)(struct udevice * dev,int out_bytes,int in_bytes)
packet	include/efi_api.h	/^	u8 packet[1472];$/;"	m	struct:efi_pxe_packet	typeref:typename:u8[1472]
packet_base	include/dm/platform_data/net_ethoc.h	/^	phys_addr_t packet_base;$/;"	m	struct:ethoc_eth_pdata	typeref:typename:phys_addr_t
packet_cfg_id	board/micronas/vct/scc.h	/^		u32 packet_cfg_id:1;	\/* PACKET_CFG register selector	*\/$/;"	m	struct:scc_dma_cfg::__anon903167320208	typeref:typename:u32:1
packet_check	arch/powerpc/cpu/mpc8xx/spi.c	/^static int packet_check (char * packet, int length)$/;"	f	typeref:typename:int	file:
packet_check	post/cpu/mpc8xx/ether.c	/^static int packet_check (char *packet, int length)$/;"	f	typeref:typename:int	file:
packet_check	post/cpu/ppc4xx/ether.c	/^static int packet_check (char *packet, int length)$/;"	f	typeref:typename:int	file:
packet_fill	arch/powerpc/cpu/mpc8xx/spi.c	/^static void packet_fill (char * packet, int length)$/;"	f	typeref:typename:void	file:
packet_fill	post/cpu/mpc8xx/ether.c	/^static void packet_fill (char *packet, int length)$/;"	f	typeref:typename:void	file:
packet_fill	post/cpu/ppc4xx/ether.c	/^static void packet_fill (char *packet, int length)$/;"	f	typeref:typename:void	file:
packet_gap	drivers/usb/eth/mcs7830.c	/^	uint8_t packet_gap[2];$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t[2]	file:
packet_icmp_handler	net/net.c	/^static rxhand_icmp_f *packet_icmp_handler;$/;"	v	typeref:typename:rxhand_icmp_f *	file:
packet_info	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 packet_info;$/;"	m	struct:qm_host_desc	typeref:typename:u32
packet_length	board/gdsys/common/cmd_ioloop.c	/^	u16 packet_length;$/;"	m	struct:io_generic_packet	typeref:typename:u16	file:
packet_offset	drivers/net/mvpp2.c	/^	u8  packet_offset;	\/* the offset from the buffer beginning	*\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u8	file:
packet_phys	drivers/net/ethoc.c	/^	phys_addr_t packet_phys;$/;"	m	struct:ethoc	typeref:typename:phys_addr_t	file:
packet_received	drivers/usb/gadget/ether.c	/^unsigned packet_received, packet_sent;$/;"	v	typeref:typename:unsigned
packet_recv	post/cpu/ppc4xx/ether.c	/^	char packet_recv[MAX_PACKET_LENGTH];$/;"	v	typeref:typename:char[]
packet_select	board/micronas/vct/scc.h	/^		u32 packet_select:1;	\/* active SCC packet id		*\/$/;"	m	struct:scc_softwareconfiguration::__anon903167320408	typeref:typename:u32:1
packet_send	post/cpu/ppc4xx/ether.c	/^	char packet_send[MAX_PACKET_LENGTH];$/;"	v	typeref:typename:char[]
packet_sent	drivers/usb/gadget/ether.c	/^unsigned packet_received, packet_sent;$/;"	v	typeref:typename:unsigned
packet_size	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	packet_size;$/;"	m	struct:qm_reg_queue	typeref:typename:u32
packet_status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 packet_status;$/;"	m	struct:i2c_control	typeref:typename:u32
packet_sz	drivers/usb/musb-new/musb_gadget.h	/^	u16				packet_sz;$/;"	m	struct:musb_ep	typeref:typename:u16
packet_type	board/gdsys/common/cmd_ioloop.c	/^	u8 packet_type;$/;"	m	struct:io_generic_packet	typeref:typename:u8	file:
paclk13	arch/arm/dts/keystone-clocks.dtsi	/^	paclk13: paclk13 {$/;"	l
pacnt	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pacnt = $mbar - 1 + 0x080$/;"	t
pacon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pacon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pacr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pacr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pacr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pacr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pacr0	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr0;		\/* 0x24 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr0	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr0;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr0	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr0;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr1	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr1;		\/* 0x25 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr1	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr1;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr1	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr1;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr2	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr2;		\/* 0x26 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr2	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr2;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr2	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr2;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr3	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr3;		\/* 0x27 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr3	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr3;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr3	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr3;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr4	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr4;		\/* 0x28 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr4	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr4;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr4	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr4;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr5	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr5;		\/* 0x2a *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr5	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr5;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr5	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr5;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr6	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr6;		\/* 0x2b *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr6	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr6;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr6	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr6;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr7	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr7;		\/* 0x2c *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr7	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr7;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr7	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr7;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr8	arch/m68k/include/asm/immap_5235.h	/^	u8 pacr8;		\/* 0x2e *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr8	arch/m68k/include/asm/immap_5275.h	/^	u8 pacr8;$/;"	m	struct:sys_ctrl	typeref:typename:u8
pacr8	arch/m68k/include/asm/immap_5282.h	/^	u8 pacr8;$/;"	m	struct:scm_ctrl	typeref:typename:u8
pacr_0_7	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pacr_0_7;$/;"	m	struct:aips_regs	typeref:typename:u32
pacr_16_23	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pacr_16_23;$/;"	m	struct:aips_regs	typeref:typename:u32
pacr_24_31	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pacr_24_31;$/;"	m	struct:aips_regs	typeref:typename:u32
pacr_8_15	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pacr_8_15;$/;"	m	struct:aips_regs	typeref:typename:u32
pacra	arch/m68k/include/asm/immap_520x.h	/^	u32 pacra;		\/* 0x20 Peripheral Access Ctrl A *\/$/;"	m	struct:scm1	typeref:typename:u32
pacra	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacra;		\/* 0x20 *\/$/;"	m	struct:scm1	typeref:typename:u32
pacra	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacra;		\/* 0x20 Peripheral Access Ctrl A *\/$/;"	m	struct:scm1	typeref:typename:u32
pacra	arch/m68k/include/asm/immap_5329.h	/^	u32 pacra;		\/* 0x20 Peripheral Access Control Register A *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacra	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacra;		\/* 0x20 Peripheral Access Control Register A *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrb	arch/m68k/include/asm/immap_520x.h	/^	u32 pacrb;		\/* 0x24 Peripheral Access Ctrl B *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrb	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacrb;		\/* 0x24 *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrb	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacrb;		\/* 0x24 Peripheral Access Ctrl B *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrb	arch/m68k/include/asm/immap_5329.h	/^	u32 pacrb;		\/* 0x24 Peripheral Access Control Register B *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacrb	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacrb;		\/* 0x24 Peripheral Access Control Register B *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrc	arch/m68k/include/asm/immap_520x.h	/^	u32 pacrc;		\/* 0x28 Peripheral Access Ctrl C *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrc	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacrc;		\/* 0x28 *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrc	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacrc;		\/* 0x28 Peripheral Access Ctrl C *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrc	arch/m68k/include/asm/immap_5329.h	/^	u32 pacrc;		\/* 0x28 Peripheral Access Control Register C *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacrc	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacrc;		\/* 0x28 Peripheral Access Control Register C *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrd	arch/m68k/include/asm/immap_520x.h	/^	u32 pacrd;		\/* 0x2C Peripheral Access Ctrl D *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrd	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacrd;		\/* 0x2C *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrd	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacrd;		\/* 0x2C Peripheral Access Ctrl D *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrd	arch/m68k/include/asm/immap_5329.h	/^	u32 pacrd;		\/* 0x2C Peripheral Access Control Register D *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacrd	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacrd;		\/* 0x2C Peripheral Access Control Register D *\/$/;"	m	struct:scm1	typeref:typename:u32
pacre	arch/m68k/include/asm/immap_520x.h	/^	u32 pacre;		\/* 0x40 Peripheral Access Ctrl E *\/$/;"	m	struct:scm1	typeref:typename:u32
pacre	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacre;		\/* 0x40 *\/$/;"	m	struct:scm1	typeref:typename:u32
pacre	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacre;		\/* 0x40 Peripheral Access Ctrl E *\/$/;"	m	struct:scm1	typeref:typename:u32
pacre	arch/m68k/include/asm/immap_5329.h	/^	u32 pacre;		\/* 0x40 Peripheral Access Control Register E *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacre	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacre;		\/* 0x40 Peripheral Access Control Register E *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrf	arch/m68k/include/asm/immap_520x.h	/^	u32 pacrf;		\/* 0x44 Peripheral Access Ctrl F *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrf	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacrf;		\/* 0x44 *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrf	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacrf;		\/* 0x44 Peripheral Access Ctrl F *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrf	arch/m68k/include/asm/immap_5329.h	/^	u32 pacrf;		\/* 0x44 Peripheral Access Control Register F *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacrf	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacrf;		\/* 0x44 Peripheral Access Control Register F *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrg	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacrg;		\/* 0x48 *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrg	arch/m68k/include/asm/immap_5301x.h	/^	u32 pacrg;		\/* 0x48 Peripheral Access Ctrl G *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrg	arch/m68k/include/asm/immap_5329.h	/^	u32 pacrg;		\/* 0x48 Peripheral Access Control Register G *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
pacrg	arch/m68k/include/asm/immap_5445x.h	/^	u32 pacrg;		\/* 0x48 Peripheral Access Control Register G *\/$/;"	m	struct:scm1	typeref:typename:u32
pacrh	arch/m68k/include/asm/immap_5329.h	/^	u32 pacrh;		\/* 0x40 Peripheral Access Control Register H *\/$/;"	m	struct:scm1_ctrl	typeref:typename:u32
pacri	arch/m68k/include/asm/immap_5227x.h	/^	u32 pacri;		\/* 0x50 *\/$/;"	m	struct:scm1	typeref:typename:u32
pad	arch/arc/lib/cache.c	/^			unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;$/;"	m	struct:read_decode_cache_bcr::__anon3b450cc2060a::__anon3b450cc20708	typeref:typename:unsigned int:12	file:
pad	arch/arc/lib/cache.c	/^			unsigned int pad:24, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2030a::__anon3b450cc20408	typeref:typename:unsigned int:24	file:
pad	arch/arc/lib/cache.c	/^			unsigned int pad:24, way:2, lsz:2, sz:4;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2010a::__anon3b450cc20208	typeref:typename:unsigned int:24	file:
pad	arch/arc/lib/cache.c	/^			unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2050a::bcr_clust_cfg	typeref:typename:unsigned int:7	file:
pad	arch/arm/cpu/arm926ejs/armada100/dram.c	/^	u32	pad[3];$/;"	m	struct:armd1ddr_map_registers	typeref:typename:u32[3]	file:
pad	arch/arm/cpu/arm926ejs/armada100/dram.c	/^	u8	pad[0x100 - 0x000];$/;"	m	struct:armd1ddr_registers	typeref:typename:u8[]	file:
pad	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad;$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
pad	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad[3];$/;"	m	struct:esdramc_regs	typeref:typename:u32[3]
pad	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u8 pad[2];$/;"	m	struct:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a::__anon775fc5440608	typeref:typename:u8[2]
pad	arch/arm/mach-orion5x/timer.c	/^	u32 pad[3];$/;"	m	struct:orion5x_tmr_registers	typeref:typename:u32[3]	file:
pad	arch/x86/include/asm/sipi.h	/^	u16 pad;$/;"	m	struct:sipi_params_16bit	typeref:typename:u16
pad	drivers/mmc/mxcmmc.c	/^	u32 pad;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
pad	drivers/mtd/nand/kirkwood_nand.c	/^	u8  pad[0x10470 - 0x1041c - 4];$/;"	m	struct:kwnandf_registers	typeref:typename:u8[]	file:
pad	drivers/net/altera_tse.h	/^	u32 pad[3];		\/* reserved *\/$/;"	m	struct:msgdma_csr	typeref:typename:u32[3]
pad	include/cbfs.h	/^	u32 pad[2];$/;"	m	struct:cbfs_header	typeref:typename:u32[2]
pad	include/efi_api.h	/^	u8 pad[3];$/;"	m	struct:efi_block_io_media	typeref:typename:u8[3]
pad	include/faraday/ftsmc020.h	/^	unsigned int	pad[8];		\/* 0x20 - 0x3c *\/$/;"	m	struct:ftsmc020	typeref:typename:unsigned int[8]
pad	include/mtd/mtd-abi.h	/^	__u32 pad;$/;"	m	struct:mtd_oob_buf64	typeref:typename:__u32
pad	include/qfw.h	/^		char pad[124];$/;"	m	union:bios_linker_entry::__anona601a7fc030a	typeref:typename:char[124]
pad	lib/efi/efi_stub.c	/^	uint16_t pad;$/;"	m	struct:desctab_info	typeref:typename:uint16_t	file:
pad	tools/lpc32xximage.c	/^	uint32_t pad[383];$/;"	m	struct:nand_page_0_boot_header	typeref:typename:uint32_t[383]	file:
pad	tools/mksunxiboot.c	/^	char pad[BLOCK_SIZE];$/;"	m	struct:boot_img	typeref:typename:char[]	file:
pad0	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad0[0x028 - 0x018 - 4];$/;"	m	struct:armd1apb1_registers	typeref:typename:u8[]
pad0	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad0[0x08 - 0x00];$/;"	m	struct:armd1mpmu_registers	typeref:typename:u8[]
pad0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad0;$/;"	m	struct:weim_regs	typeref:typename:u32
pad0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pad0;$/;"	m	struct:weim_regs	typeref:typename:u32
pad0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad0[6];$/;"	m	struct:aips_regs	typeref:typename:u32[6]
pad0	arch/mips/include/asm/ptrace.h	/^	unsigned long pad0[8];$/;"	m	struct:pt_regs	typeref:typename:unsigned long[8]
pad0	drivers/gpio/mvgpio.h	/^	u32 pad0[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad0	drivers/i2c/mv_i2c.c	/^	u32 pad0;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
pad0	drivers/net/cs8900.h	/^	CS8900_REG pad0;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
pad0	drivers/spi/ti_qspi.c	/^	u32 pad0[3];$/;"	m	struct:ti_qspi_regs	typeref:typename:u32[3]	file:
pad0	tools/mxsimage.h	/^	uint16_t	pad0;$/;"	m	struct:sb_boot_image_version	typeref:typename:uint16_t
pad00	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad00[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad00	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad00[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad00	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad00[63];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[63]
pad01	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad01[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad01	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad01[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad01	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad01[2];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[2]
pad02	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad02[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad02	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad02[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad02	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad02[2];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[2]
pad03	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad03[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad03	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad03[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad03	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad03[56];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[56]
pad04	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad04[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad04	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad04[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad04	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad04[1];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[1]
pad05	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad05[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad05	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad05[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad05	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad05[3];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[3]
pad06	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad06[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad06	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad06[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad06	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad06[54];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[54]
pad07	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad07[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad07	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad07[59];$/;"	m	struct:max_regs	typeref:typename:u32[59]
pad07	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad07[54];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[54]
pad08	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad08[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad08	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad08[3];$/;"	m	struct:max_regs	typeref:typename:u32[3]
pad08	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad08[6];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[6]
pad09	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad09[251];$/;"	m	struct:max_regs	typeref:typename:u32[251]
pad09	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad09[251];$/;"	m	struct:max_regs	typeref:typename:u32[251]
pad09	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad09[59];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[59]
pad1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad1;$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pad1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad1;$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
pad1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad1[0x01C - 0x000];$/;"	m	struct:armd1apb2_registers	typeref:typename:u32[]
pad1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad1[0x030 - 0x014 - 4];$/;"	m	struct:armd1mpmu_registers	typeref:typename:u8[]
pad1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad1[0x03c - 0x034 - 4];$/;"	m	struct:armd1apb1_registers	typeref:typename:u8[]
pad1	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 pad1[5];$/;"	m	struct:ssp_reg	typeref:typename:u32[5]
pad1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad1;$/;"	m	struct:weim_regs	typeref:typename:u32
pad1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pad1;$/;"	m	struct:weim_regs	typeref:typename:u32
pad1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad1[4];$/;"	m	struct:aips_regs	typeref:typename:u32[4]
pad1	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u16 pad1;$/;"	m	struct:stm32_des_regs	typeref:typename:u16
pad1	arch/arm/include/asm/pl310.h	/^	u32 pad1[62];$/;"	m	struct:pl310_regs	typeref:typename:u32[62]
pad1	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 pad1[2];$/;"	m	struct:kwcpu_registers	typeref:typename:u32[2]
pad1	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u8 pad1[0x54];$/;"	m	struct:mvebu_system_registers	typeref:typename:u8[0x54]
pad1	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u16	pad1;			\/* set to 0 on each frame_no change *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
pad1	arch/openrisc/include/asm/ptrace.h	/^	unsigned long pad1;$/;"	m	struct:user_regs_struct	typeref:typename:unsigned long
pad1	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u16	pad1;			\/* set to 0 on each frame_no change *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
pad1	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u16 pad1;		\/* set to 0 on each frame_no change *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
pad1	board/esd/pmc440/pmc440.h	/^	u32 pad1[0x40 \/ sizeof(u32) - 3];$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32[]
pad1	drivers/gpio/mvgpio.h	/^	u32 pad1[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad1	drivers/i2c/mv_i2c.c	/^	u32 pad1;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
pad1	drivers/net/armada100_fec.h	/^	u32 pad1[3];$/;"	m	struct:armdfec_reg	typeref:typename:u32[3]
pad1	drivers/net/dnet.h	/^	u32 pad1[0x3c];$/;"	m	struct:dnet_registers	typeref:typename:u32[0x3c]
pad1	drivers/net/ftmac100.h	/^	unsigned int	pad1[3];	\/* 0x34 - 0x3c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int[3]
pad1	drivers/net/mvgbe.h	/^	u8 pad1[0x080 - 0x00c - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad1	drivers/spi/ti_qspi.c	/^	u32 pad1[3];$/;"	m	struct:ti_qspi_regs	typeref:typename:u32[3]	file:
pad1	drivers/usb/gadget/ci_udc.h	/^	u32 pad1[3];$/;"	m	struct:ci_udc	typeref:typename:u32[3]
pad1	drivers/usb/host/ohci-s3c24xx.h	/^	__u16 pad1;		\/* set to 0 on each frame_no change *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
pad1	drivers/usb/host/ohci.h	/^	__u16	pad1;			\/* set to 0 on each frame_no change *\/$/;"	m	struct:ohci_hcca	typeref:typename:__u16
pad1	include/efi.h	/^	u8 pad1;$/;"	m	struct:efi_time	typeref:typename:u8
pad1	tools/mxsimage.h	/^	uint16_t	pad1;$/;"	m	struct:sb_boot_image_version	typeref:typename:uint16_t
pad10	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad10;$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pad10	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad10[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad10	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad10[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad10	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pad10[1];$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32[1]
pad10	arch/arm/include/asm/pl310.h	/^	u32 pad10[64];$/;"	m	struct:pl310_regs	typeref:typename:u32[64]
pad10	drivers/gpio/mvgpio.h	/^	u32 pad10[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad10	drivers/net/armada100_fec.h	/^	u32 pad10;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad10	drivers/net/mvgbe.h	/^	u32 pad10;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pad11	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad11[0x0F0 - 0x0E4 - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad11	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad11[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad11	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad11[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad11	arch/arm/include/asm/pl310.h	/^	u32 pad11[190];$/;"	m	struct:pl310_regs	typeref:typename:u32[190]
pad11	drivers/gpio/mvgpio.h	/^	u32 pad11[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad11	drivers/net/armada100_fec.h	/^	u32 pad11;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad11	drivers/net/mvgbe.h	/^	u8 pad11[0x494 - 0x488 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad12	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad12[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad12	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad12[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad12	arch/arm/include/asm/pl310.h	/^	u32 pad12[190];$/;"	m	struct:pl310_regs	typeref:typename:u32[190]
pad12	drivers/gpio/mvgpio.h	/^	u32 pad12[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad12	drivers/net/armada100_fec.h	/^	u32 pad12;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad12	drivers/net/mvgbe.h	/^	u8 pad12[0x4bc - 0x494 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad13	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad13[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad13	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad13[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad13	arch/arm/include/asm/pl310.h	/^	u32 pad13[3];$/;"	m	struct:pl310_regs	typeref:typename:u32[3]
pad13	drivers/net/armada100_fec.h	/^	u32 pad13;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad13	drivers/net/mvgbe.h	/^	u8 pad13[0x4dc - 0x4bc - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad14	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pad14[63];$/;"	m	struct:max_regs	typeref:typename:u32[63]
pad14	arch/arm/include/asm/pl310.h	/^	u32 pad14[7];$/;"	m	struct:pl310_regs	typeref:typename:u32[7]
pad14	drivers/net/armada100_fec.h	/^	u32 pad14[3];$/;"	m	struct:armdfec_reg	typeref:typename:u32[3]
pad14	drivers/net/mvgbe.h	/^	u8 pad14[0x60c - 0x4ec - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad15	arch/arm/include/asm/pl310.h	/^	u32 pad15[3];$/;"	m	struct:pl310_regs	typeref:typename:u32[3]
pad15	drivers/net/armada100_fec.h	/^	u32 pad15[4];$/;"	m	struct:armdfec_reg	typeref:typename:u32[4]
pad15	drivers/net/mvgbe.h	/^	u8 pad15[0x6c0 - 0x684 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad16	arch/arm/include/asm/pl310.h	/^	u32 pad16[7];$/;"	m	struct:pl310_regs	typeref:typename:u32[7]
pad16	drivers/net/armada100_fec.h	/^	u32 pad16[0x0C];$/;"	m	struct:armdfec_reg	typeref:typename:u32[0x0C]
pad16	drivers/net/mvgbe.h	/^	u8 pad16[0x700 - 0x6dc - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad17	arch/arm/include/asm/pl310.h	/^	u32 pad17[7];$/;"	m	struct:pl310_regs	typeref:typename:u32[7]
pad17	drivers/net/mvgbe.h	/^	u8 pad17[0x7a8 - 0x780 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad178	drivers/usb/gadget/ci_udc.h	/^	u32 pad178[(0x1b4 - (0x174 + 4)) \/ 4];$/;"	m	struct:ci_udc	typeref:typename:u32[]
pad18	drivers/net/mvgbe.h	/^	u32 pad18[3];$/;"	m	struct:mvgbe_registers	typeref:typename:u32[3]
pad19	drivers/net/mvgbe.h	/^	u8 pad19[0x7c0 - 0x7b8 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad1b8	drivers/usb/gadget/ci_udc.h	/^	u32 pad1b8[(0x1f8 - (0x1b4 + 4)) \/ 4];$/;"	m	struct:ci_udc	typeref:typename:u32[]
pad1fc	drivers/usb/gadget/ci_udc.h	/^	u32 pad1fc[(0x208 - (0x1f8 + 4)) \/ 4];$/;"	m	struct:ci_udc	typeref:typename:u32[]
pad2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad2;$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pad2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad2;$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
pad2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad2[0x04C - 0x020 - 4];$/;"	m	struct:armd1apb2_registers	typeref:typename:u32[]
pad2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad2[0x050 - 0x048 - 4];$/;"	m	struct:armd1apb1_registers	typeref:typename:u8[]
pad2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad2[0x200 - 0x030 - 4];$/;"	m	struct:armd1mpmu_registers	typeref:typename:u8[]
pad2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad2;$/;"	m	struct:weim_regs	typeref:typename:u32
pad2	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pad2;$/;"	m	struct:weim_regs	typeref:typename:u32
pad2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 pad2;$/;"	m	struct:stm32_des_regs	typeref:typename:u32
pad2	arch/arm/include/asm/pl310.h	/^	u32 pad2[60];$/;"	m	struct:pl310_regs	typeref:typename:u32[60]
pad2	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 pad2;$/;"	m	struct:kwcpu_registers	typeref:typename:u32
pad2	arch/openrisc/include/asm/ptrace.h	/^	unsigned long pad2;$/;"	m	struct:user_regs_struct	typeref:typename:unsigned long
pad2	board/esd/pmc440/pmc440.h	/^	u32 pad2;$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
pad2	drivers/gpio/mvgpio.h	/^	u32 pad2[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad2	drivers/i2c/mv_i2c.c	/^	u32 pad2;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
pad2	drivers/net/armada100_fec.h	/^	u32 pad2[0xFB];$/;"	m	struct:armdfec_reg	typeref:typename:u32[0xFB]
pad2	drivers/net/dnet.h	/^	u32 pad2[0x33];$/;"	m	struct:dnet_registers	typeref:typename:u32[0x33]
pad2	drivers/net/ftmac100.h	/^	unsigned int	pad2[16];	\/* 0x40 - 0x7c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int[16]
pad2	drivers/net/mvgbe.h	/^	u8 pad2[0x094 - 0x084 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad2	drivers/spi/ti_qspi.c	/^	u32 pad2[3];$/;"	m	struct:ti_qspi_regs	typeref:typename:u32[3]	file:
pad2	drivers/usb/gadget/ci_udc.h	/^	u32 pad2[10];$/;"	m	struct:ci_udc	typeref:typename:u32[10]
pad2	include/efi.h	/^	u8 pad2;$/;"	m	struct:efi_time	typeref:typename:u8
pad2	include/efi_api.h	/^	u8 pad2[4];$/;"	m	struct:efi_block_io_media	typeref:typename:u8[4]
pad2	tools/mxsimage.h	/^	uint16_t	pad2;$/;"	m	struct:sb_boot_image_version	typeref:typename:uint16_t
pad20	drivers/net/mvgbe.h	/^	u32 pad20;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pad20_1	drivers/net/mvgbe.h	/^	u32 pad20_1[32];	\/* mib counter registes *\/$/;"	m	struct:mvgbe_registers	typeref:typename:u32[32]
pad21	drivers/net/mvgbe.h	/^	u8 pad21[0x3000 - 0x27d0 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad22	drivers/net/mvgbe.h	/^	u8 pad22[0x3400 - 0x3000 - sizeof(u32) * 32];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad23	drivers/net/mvgbe.h	/^	u8 pad23[0xe20c0 - 0x7360c - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad3	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad3[0x058 - 0x04C - 4];$/;"	m	struct:armd1apb2_registers	typeref:typename:u32[]
pad3	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad3[0x04C - 0x018 - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad3	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad3[0x06c - 0x054 - 4];$/;"	m	struct:armd1apb1_registers	typeref:typename:u8[]
pad3	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad3[0x1000 - 0x200 - 4];$/;"	m	struct:armd1mpmu_registers	typeref:typename:u8[]
pad3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad3;$/;"	m	struct:weim_regs	typeref:typename:u32
pad3	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pad3;$/;"	m	struct:weim_regs	typeref:typename:u32
pad3	arch/arm/include/asm/pl310.h	/^	u32 pad3[323];$/;"	m	struct:pl310_regs	typeref:typename:u32[323]
pad3	board/esd/pmc440/pmc440.h	/^	u32 pad3[3];$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32[3]
pad3	drivers/gpio/mvgpio.h	/^	u32 pad3[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad3	drivers/i2c/mv_i2c.c	/^	u32 pad3;$/;"	m	struct:mv_i2c	typeref:typename:u32	file:
pad3	drivers/net/armada100_fec.h	/^	u32 pad3;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad3	drivers/net/dnet.h	/^	u32 pad3[0x3e];$/;"	m	struct:dnet_registers	typeref:typename:u32[0x3e]
pad3	drivers/net/ftmac100.h	/^	unsigned int	pad3[2];	\/* 0x80 - 0x84 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int[2]
pad3	drivers/net/mvgbe.h	/^	u8 pad3[0x0b0 - 0x098 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad3	drivers/usb/gadget/ci_udc.h	/^	u32 pad3[8];$/;"	m	struct:ci_udc	typeref:typename:u32[8]
pad3a	drivers/net/mvgbe.h	/^	u8 pad3a[0x200 - 0x0b0 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad4	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pad4;$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pad4	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad4[0x07c - 0x070 - 4];$/;"	m	struct:armd1apb1_registers	typeref:typename:u8[]
pad4	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad4[0x1020 - 0x1004 - 4];$/;"	m	struct:armd1mpmu_registers	typeref:typename:u8[]
pad4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad4;$/;"	m	struct:weim_regs	typeref:typename:u32
pad4	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pad4;$/;"	m	struct:weim_regs	typeref:typename:u32
pad4	arch/arm/include/asm/pl310.h	/^	u32 pad4[15];$/;"	m	struct:pl310_regs	typeref:typename:u32[15]
pad4	board/esd/pmc440/pmc440.h	/^	u32 pad4[0x20 \/ sizeof(u32) - 1];$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32[]
pad4	drivers/gpio/mvgpio.h	/^	u32 pad4[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad4	drivers/net/armada100_fec.h	/^	u32 pad4;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad4	drivers/net/dnet.h	/^	u32 pad4[0x30];$/;"	m	struct:dnet_registers	typeref:typename:u32[0x30]
pad4	drivers/net/ftmac100.h	/^	unsigned int	pad4[8];	\/* 0xa0 - 0xbc *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int[8]
pad4	drivers/net/mvgbe.h	/^	u8 pad4[0x280 - 0x22c - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad4	drivers/usb/gadget/ci_udc.h	/^	u32 pad4;$/;"	m	struct:ci_udc	typeref:typename:u32
pad5	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad5[0x07C - 0x06C - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad5	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad5[0x084 - 0x07c - 4];$/;"	m	struct:armd1apb1_registers	typeref:typename:u8[]
pad5	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pad5;$/;"	m	struct:weim_regs	typeref:typename:u32
pad5	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pad5;$/;"	m	struct:weim_regs	typeref:typename:u32
pad5	arch/arm/include/asm/pl310.h	/^	u32 pad5[2];$/;"	m	struct:pl310_regs	typeref:typename:u32[2]
pad5	drivers/gpio/mvgpio.h	/^	u32 pad5[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad5	drivers/net/armada100_fec.h	/^	u32 pad5;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad5	drivers/net/ftmac100.h	/^	unsigned int	pad5;		\/* 0xc0 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
pad5	drivers/net/mvgbe.h	/^	u8 pad5[0x400 - 0x294 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad6	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad6[0x090 - 0x07C - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad6	arch/arm/include/asm/pl310.h	/^	u32 pad6[12];$/;"	m	struct:pl310_regs	typeref:typename:u32[12]
pad6	drivers/gpio/mvgpio.h	/^	u32 pad6[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad6	drivers/net/armada100_fec.h	/^	u32 pad6;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad6	drivers/net/ftmac100.h	/^	unsigned int	pad6;		\/* 0xd0 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
pad6	drivers/net/mvgbe.h	/^	u8 pad6[0x410 - 0x408 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad7	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad7[0x0B0 - 0x0A0 - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad7	arch/arm/include/asm/pl310.h	/^	u32 pad7[1];$/;"	m	struct:pl310_regs	typeref:typename:u32[1]
pad7	drivers/gpio/mvgpio.h	/^	u32 pad7[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad7	drivers/net/armada100_fec.h	/^	u32 pad7;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad7	drivers/net/mvgbe.h	/^	u8 pad7[0x460 - 0x454 - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad8	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad8[0x0C0 - 0x0B4 - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad8	arch/arm/include/asm/pl310.h	/^	u32 pad8[12];$/;"	m	struct:pl310_regs	typeref:typename:u32[12]
pad8	drivers/gpio/mvgpio.h	/^	u32 pad8[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad8	drivers/net/armada100_fec.h	/^	u32 pad8;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad8	drivers/net/mvgbe.h	/^	u8 pad8[0x474 - 0x46c - 4];$/;"	m	struct:mvgbe_registers	typeref:typename:u8[]
pad9	arch/arm/include/asm/arch-armada100/cpu.h	/^	u8 pad9[0x0D4 - 0x0CC - 4];$/;"	m	struct:armd1apmu_registers	typeref:typename:u8[]
pad9	arch/arm/include/asm/pl310.h	/^	u32 pad9[1];$/;"	m	struct:pl310_regs	typeref:typename:u32[1]
pad9	drivers/gpio/mvgpio.h	/^	u32 pad9[2];$/;"	m	struct:gpio_reg	typeref:typename:u32[2]
pad9	drivers/net/armada100_fec.h	/^	u32 pad9;$/;"	m	struct:armdfec_reg	typeref:typename:u32
pad9	drivers/net/mvgbe.h	/^	u32 pad9;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pad_addr_bytes	drivers/mtd/spi/sandbox.c	/^	uint addr_bytes, pad_addr_bytes;$/;"	m	struct:sandbox_spi_flash	typeref:typename:uint	file:
pad_alv_sel_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_alv_sel_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_alv_sel_option0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_option0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_alv_sel_option0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_option0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_alv_sel_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_alv_sel_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_alv_sel_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_alv_sel_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_alv_sel_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_alv_sel_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_conf_entry	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^struct pad_conf_entry {$/;"	s
pad_conf_entry	arch/arm/include/asm/arch-omap5/sys_proto.h	/^struct pad_conf_entry {$/;"	s
pad_ctrl	drivers/ddr/microchip/ddr2_regs.h	/^	u32 pad_ctrl;$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32
pad_ctrl0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pad_ctrl0;			\/* 0x200 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pad_ctrl0	arch/arm/include/asm/arch/display.h	/^	u32 pad_ctrl0;			\/* 0x200 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pad_ctrl1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pad_ctrl1;			\/* 0x204 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pad_ctrl1	arch/arm/include/asm/arch/display.h	/^	u32 pad_ctrl1;			\/* 0x204 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pad_isolation_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_isolation_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_isolation_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_isolation_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_isolation_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_len	fs/ubifs/ubifs-media.h	/^	__le32 pad_len;$/;"	m	struct:ubifs_pad_node	typeref:typename:__le32
pad_len	include/image.h	/^	const int pad_len;$/;"	m	struct:checksum_algo	typeref:typename:const int
pad_loop	board/freescale/mx31ads/lowlevel_init.S	/^pad_loop:$/;"	l
pad_retention_dram_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_dram_configuration_2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_configuration_2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_dram_option_2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_option_2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_dram_status_2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_status_2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_dram_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_dram_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_dram_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebia_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebia_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebia_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_ebia_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebia_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebia_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebia_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebia_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_ebia_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebia_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebia_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebib_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebib_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebib_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_ebib_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebib_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebib_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebib_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_ebib_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_ebib_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_ebib_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_ebib_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_gpio_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_gpio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_gpio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_gpio_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_hsi_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_hsi_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_hsi_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_hsi_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_hsi_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_hsi_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_hsi_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_hsi_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_jtag_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_jtag_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_jtag_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_jtag_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_jtag_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_jtag_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_jtag_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_jtag_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_jtag_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mau_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mau_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mau_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mau_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mau_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_maudio_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_maudio_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_maudio_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_maudio_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_mmc0_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc0_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc0_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc0_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc0_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc0_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc0_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc0_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc1_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc1_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc1_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc1_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc1_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc1_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc1_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc1_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc2_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc2_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc2_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc2_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc2_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc2_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc2_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc2_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc3_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc3_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc3_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc3_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc3_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc3_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmc3_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmc3_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_mmca_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmca_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmca_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmca_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_mmca_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmca_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmca_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmca_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmca_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmca_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_mmca_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmca_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcb_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcb_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcb_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcb_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_mmcb_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcb_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcb_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcb_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcb_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcb_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_mmcb_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcb_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcc_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcc_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcc_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_mmcc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_mmcc_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_spi_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_spi_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_spi_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_spi_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_spi_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_spi_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_spi_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_spi_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_spi_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_uart_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_uart_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_uart_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_uart_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_uart_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_uart_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_uart_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_retention_uart_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pad_retention_uart_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pad_retention_uart_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pad_retention_uart_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pad_signals	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^struct pad_signals {$/;"	s
pad_signals	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^struct pad_signals {$/;"	s
pad_signals	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^struct pad_signals {$/;"	s
pad_signals	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^struct pad_signals {$/;"	s
pad_with_zeros	drivers/usb/gadget/f_mass_storage.c	/^static int pad_with_zeros(struct fsg_dev *fsg)$/;"	f	typeref:typename:int	file:
padat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	padat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
padat	arch/m68k/include/asm/immap_5307.h	/^	u16 padat;$/;"	m	struct:gpio	typeref:typename:u16
padat	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $padat = $mbar - 1 + 0x086$/;"	t
padcr	arch/m68k/include/asm/immap_5441x.h	/^	u32 padcr;		\/* 0x1AC *\/$/;"	m	struct:sdramc	typeref:typename:u32
padctl	arch/arm/dts/tegra124.dtsi	/^	padctl: padctl@7009f000 {$/;"	l
padctl	arch/arm/dts/tegra210.dtsi	/^	padctl: padctl@7009f000 {$/;"	l
padctl	arch/arm/mach-tegra/xusb-padctl-common.c	/^struct tegra_xusb_padctl padctl;$/;"	v	typeref:struct:tegra_xusb_padctl
padctl	arch/arm/mach-tegra/xusb-padctl-common.h	/^	struct tegra_xusb_padctl *padctl;$/;"	m	struct:tegra_xusb_phy	typeref:struct:tegra_xusb_padctl *
padctl_default	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		padctl_default: pinmux {$/;"	l
padctl_default	arch/arm/dts/tegra124-jetson-tk1.dts	/^		padctl_default: pinmux {$/;"	l
padctl_default	arch/arm/dts/tegra210-p2371-2180.dts	/^		padctl_default: pinmux {$/;"	l
padctl_readl	arch/arm/mach-tegra/xusb-padctl-common.h	/^static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:u32
padctl_writel	arch/arm/mach-tegra/xusb-padctl-common.h	/^static inline void padctl_writel(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:void
padded	include/jffs2/jffs2.h	/^	__u32 padded;	\/* sum of the size of padding nodes *\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
padding	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned char		padding[0xffd0];$/;"	m	struct:exynos_spi	typeref:typename:unsigned char[0xffd0]
padding	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	u32	padding[3];$/;"	m	struct:socfpga_freeze_controller	typeref:typename:u32[3]
padding	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	padding[2];$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32[2]
padding	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t padding[4];$/;"	m	struct:rmodule_header	typeref:typename:uint32_t[4]	file:
padding	drivers/mtd/ubi/ubi-media.h	/^	__be32 padding[4];$/;"	m	struct:ubi_fm_scan_pool	typeref:typename:__be32[4]
padding	drivers/mtd/ubi/ubi-media.h	/^	__u8    padding[23];$/;"	m	struct:ubi_vtbl_record	typeref:typename:__u8[23]
padding	drivers/mtd/ubi/ubi-media.h	/^	__u8 padding[4];$/;"	m	struct:ubi_fm_hdr	typeref:typename:__u8[4]
padding	drivers/net/sh_eth.h	/^	u8 padding[TX_DESC_PADDING];	\/* aligned cache line size *\/$/;"	m	struct:rx_desc_s	typeref:typename:u8[]
padding	drivers/net/sh_eth.h	/^	u8 padding[TX_DESC_PADDING];	\/* aligned cache line size *\/$/;"	m	struct:tx_desc_s	typeref:typename:u8[]
padding	drivers/video/stb_truetype.h	/^      unsigned char type,padding;$/;"	m	struct:__anonce392f790608	typeref:typename:unsigned char
padding	drivers/video/stb_truetype.h	/^   int   padding;$/;"	m	struct:stbtt_pack_context	typeref:typename:int
padding	fs/ubifs/ubifs-media.h	/^	__u8 padding[12]; \/* Watch 'zero_trun_node_unused()' if changing! *\/$/;"	m	struct:ubifs_trun_node	typeref:typename:__u8[12]
padding	fs/ubifs/ubifs-media.h	/^	__u8 padding[28];$/;"	m	struct:ubifs_ref_node	typeref:typename:__u8[28]
padding	fs/ubifs/ubifs-media.h	/^	__u8 padding[2]; \/* Watch 'zero_data_node_unused()' if changing! *\/$/;"	m	struct:ubifs_data_node	typeref:typename:__u8[2]
padding	fs/ubifs/ubifs-media.h	/^	__u8 padding[2];$/;"	m	struct:ubifs_ch	typeref:typename:__u8[2]
padding	fs/ubifs/ubifs-media.h	/^	__u8 padding[2];$/;"	m	struct:ubifs_sb_node	typeref:typename:__u8[2]
padding	fs/ubifs/ubifs-media.h	/^	__u8 padding[344];$/;"	m	struct:ubifs_mst_node	typeref:typename:__u8[344]
padding	include/fsl_qe.h	/^		u8 padding;	\/* Reserved, for alignment *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u8
padding	include/fsl_qe.h	/^	u8 padding[4];		\/* Reserved, for alignment *\/$/;"	m	struct:qe_firmware	typeref:typename:u8[4]
padding	include/mtd/mtd-abi.h	/^	__u64 padding;	\/* Old obsolete field; do not use *\/$/;"	m	struct:mtd_info_user	typeref:typename:__u64
padding	include/mtd/mtd-abi.h	/^	__u8 padding[7];$/;"	m	struct:mtd_write_req	typeref:typename:__u8[7]
padding	include/mtd/ubi-user.h	/^	__s8  padding[128];$/;"	m	struct:ubi_blkcreate_req	typeref:typename:__s8[128]
padding	include/mtd/ubi-user.h	/^	__s8  padding[3];$/;"	m	struct:ubi_map_req	typeref:typename:__s8[3]
padding	include/mtd/ubi-user.h	/^	__s8  padding[7];$/;"	m	struct:ubi_leb_change_req	typeref:typename:__s8[7]
padding	include/mtd/ubi-user.h	/^	__s8 padding[10];$/;"	m	struct:ubi_attach_req	typeref:typename:__s8[10]
padding	include/mtd/ubi-user.h	/^	__u8  padding[7];$/;"	m	struct:ubi_set_vol_prop_req	typeref:typename:__u8[7]
padding	tools/imximage.h	/^	uint32_t padding[1]; \/* end up on an 8-byte boundary *\/$/;"	m	struct:__anon504a956c0a08	typeref:typename:uint32_t[1]
padding	tools/vybridimage.c	/^	uint32_t padding[65280];	\/* 0x00000400 - 0x0003ffff *\/$/;"	m	struct:nand_page_0_boot_header	typeref:typename:uint32_t[65280]	file:
padding0	arch/arm/include/asm/arch-am33xx/cpu.h	/^	u32 padding0[2];$/;"	m	struct:l3f_cfg_bwlimiter	typeref:typename:u32[2]
padding0	drivers/tpm/tpm_tis_lpc.c	/^	u8 padding0[4];$/;"	m	struct:tpm_locality	typeref:typename:u8[4]	file:
padding0	tools/mxsimage.h	/^	uint8_t		padding0[2];$/;"	m	struct:sb_boot_image_header	typeref:typename:uint8_t[2]
padding1	arch/arm/include/asm/emif.h	/^	u32 padding1[1];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[1]
padding1	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	padding1;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
padding1	drivers/mmc/arm_pl180_mmci.h	/^	u32 padding1[(0x80-0x4C)>>2];$/;"	m	struct:sdi_registers	typeref:typename:u32[]
padding1	drivers/mtd/ubi/ubi-media.h	/^	__u8    padding1[3];$/;"	m	struct:ubi_ec_hdr	typeref:typename:__u8[3]
padding1	drivers/mtd/ubi/ubi-media.h	/^	__u8    padding1[4];$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8[4]
padding1	drivers/mtd/ubi/ubi-media.h	/^	__u8 padding1[3];$/;"	m	struct:ubi_fm_sb	typeref:typename:__u8[3]
padding1	drivers/mtd/ubi/ubi-media.h	/^	__u8 padding1[3];$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__u8[3]
padding1	drivers/tpm/tpm_tis_lpc.c	/^	u8 padding1[3];$/;"	m	struct:tpm_locality	typeref:typename:u8[3]	file:
padding1	fs/ubifs/ubifs-media.h	/^	__u8 padding1;$/;"	m	struct:ubifs_dent_node	typeref:typename:__u8
padding1	fs/ubifs/ubifs-media.h	/^	__u8 padding1[2];$/;"	m	struct:ubifs_sb_node	typeref:typename:__u8[2]
padding1	fs/ubifs/ubifs-media.h	/^	__u8 padding1[4]; \/* Watch 'zero_ino_node_unused()' if changing! *\/$/;"	m	struct:ubifs_ino_node	typeref:typename:__u8[4]
padding1	include/mtd/ubi-user.h	/^	__s8 padding1;$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s8
padding1	include/mtd/ubi-user.h	/^	__s8 padding1[12];$/;"	m	struct:ubi_rnvol_req	typeref:typename:__s8[12]
padding1	tools/mxsimage.h	/^	uint8_t		padding1[6];$/;"	m	struct:sb_boot_image_header	typeref:typename:uint8_t[6]
padding10	arch/arm/include/asm/emif.h	/^	u32 padding10[20];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[20]
padding11	arch/arm/include/asm/emif.h	/^	u32 padding11[1];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[1]
padding2	arch/arm/include/asm/emif.h	/^	u32 padding2[7];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[7]
padding2	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	padding2[12];$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32[12]
padding2	drivers/mmc/arm_pl180_mmci.h	/^	u32 padding2[(0xFE0-0x84)>>2];$/;"	m	struct:sdi_registers	typeref:typename:u32[]
padding2	drivers/mtd/ubi/ubi-media.h	/^	__u8    padding2[32];$/;"	m	struct:ubi_ec_hdr	typeref:typename:__u8[32]
padding2	drivers/mtd/ubi/ubi-media.h	/^	__u8    padding2[4];$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8[4]
padding2	drivers/mtd/ubi/ubi-media.h	/^	__u8 padding2[32];$/;"	m	struct:ubi_fm_sb	typeref:typename:__u8[32]
padding2	drivers/mtd/ubi/ubi-media.h	/^	__u8 padding2[8];$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__u8[8]
padding2	drivers/tpm/tpm_tis_lpc.c	/^	u8 padding2[8];$/;"	m	struct:tpm_locality	typeref:typename:u8[8]	file:
padding2	fs/ubifs/ubifs-media.h	/^	__u8 padding2[26]; \/* Watch 'zero_ino_node_unused()' if changing! *\/$/;"	m	struct:ubifs_ino_node	typeref:typename:__u8[26]
padding2	fs/ubifs/ubifs-media.h	/^	__u8 padding2[3968];$/;"	m	struct:ubifs_sb_node	typeref:typename:__u8[3968]
padding2	fs/ubifs/ubifs-media.h	/^	__u8 padding2[4]; \/* Watch 'zero_dent_node_unused()' if changing! *\/$/;"	m	struct:ubifs_dent_node	typeref:typename:__u8[4]
padding2	include/mtd/ubi-user.h	/^		__s8  padding2[2];$/;"	m	struct:ubi_rnvol_req::__anon7822496e0308	typeref:typename:__s8[2]
padding2	include/mtd/ubi-user.h	/^	__s8 padding2[4];$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s8[4]
padding3	arch/arm/include/asm/emif.h	/^	u32 padding3;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
padding3	drivers/mtd/ubi/ubi-media.h	/^	__u8    padding3[12];$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8[12]
padding3	drivers/tpm/tpm_tis_lpc.c	/^	u8 padding3[3803];$/;"	m	struct:tpm_locality	typeref:typename:u8[3803]	file:
padding4	arch/arm/include/asm/emif.h	/^	u32 padding4;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
padding4	drivers/tpm/tpm_tis_lpc.c	/^	u8 padding4[251];$/;"	m	struct:tpm_locality	typeref:typename:u8[251]	file:
padding5	arch/arm/include/asm/emif.h	/^	u32 padding5;$/;"	m	struct:emif_reg_struct	typeref:typename:u32
padding6	arch/arm/include/asm/emif.h	/^	u32 padding6[1];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[1]
padding7	arch/arm/include/asm/emif.h	/^	u32 padding7[4];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[4]
padding8	arch/arm/include/asm/emif.h	/^	u32 padding8[5];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[5]
padding9	arch/arm/include/asm/emif.h	/^	u32 padding9[6];$/;"	m	struct:emif_reg_struct	typeref:typename:u32[6]
padding_sha1_rsa2048	lib/rsa/rsa-checksum.c	/^const uint8_t padding_sha1_rsa2048[RSA2048_BYTES - SHA1_SUM_LEN] = {$/;"	v	typeref:typename:const uint8_t[]
padding_sha256_rsa2048	lib/rsa/rsa-checksum.c	/^const uint8_t padding_sha256_rsa2048[RSA2048_BYTES - SHA256_SUM_LEN] = {$/;"	v	typeref:typename:const uint8_t[]
padding_sha256_rsa4096	lib/rsa/rsa-checksum.c	/^const uint8_t padding_sha256_rsa4096[RSA4096_BYTES - SHA256_SUM_LEN] = {$/;"	v	typeref:typename:const uint8_t[]
paddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t paddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
paddr	arch/m68k/include/asm/immap_5307.h	/^	u16 paddr;$/;"	m	struct:gpio	typeref:typename:u16
paddr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $paddr = $mbar - 1 + 0x084$/;"	t
paddr	drivers/qe/uec.h	/^	uec_82xx_enet_address_t    paddr[4];$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:uec_82xx_enet_address_t[4]
paddr	drivers/video/fsl_diu_fb.c	/^	u32 paddr;		\/* 32-bit physical address *\/$/;"	m	struct:diu_addr	typeref:typename:u32	file:
paddr	lib/addr_map.c	/^	phys_addr_t paddr;$/;"	m	struct:__anon51f123940108	typeref:typename:phys_addr_t	file:
paddr	lib/efi_loader/efi_runtime.c	/^	u64 paddr;$/;"	m	struct:efi_runtime_mmio_list	typeref:typename:u64	file:
paddr1	arch/powerpc/include/asm/immap_512x.h	/^	u32	paddr1;		\/* Physical address low *\/$/;"	m	struct:fec512x	typeref:typename:u32
paddr1	drivers/net/fec_mxc.h	/^	uint32_t paddr1;		\/* MBAR_ETH + 0x0E4 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
paddr1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 paddr1;			\/* MBAR_ETH + 0x0E4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
paddr2	arch/powerpc/include/asm/immap_512x.h	/^	u32	paddr2;		\/* Physical address high + type field *\/$/;"	m	struct:fec512x	typeref:typename:u32
paddr2	drivers/net/fec_mxc.h	/^	uint32_t paddr2;		\/* MBAR_ETH + 0x0E8 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
paddr2	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 paddr2;			\/* MBAR_ETH + 0x0E8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
padr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t padr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
padr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	padr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
padr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	padr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pads	drivers/pci/pci_tegra.c	/^	struct fdt_resource pads;$/;"	m	struct:tegra_pcie	typeref:struct:fdt_resource	file:
pads_info	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	struct i2c_pads_info *pads_info;$/;"	m	struct:mxc_i2c_bus	typeref:struct:i2c_pads_info *
pads_pll_ctl	drivers/pci/pci_tegra.c	/^	unsigned long pads_pll_ctl;$/;"	m	struct:tegra_pcie_soc	typeref:typename:unsigned long	file:
pads_readl	drivers/pci/pci_tegra.c	/^static unsigned long pads_readl(struct tegra_pcie *pcie, unsigned long offset)$/;"	f	typeref:typename:unsigned long	file:
pads_refclk_cfg0	drivers/pci/pci_tegra.c	/^	u32 pads_refclk_cfg0;$/;"	m	struct:tegra_pcie_soc	typeref:typename:u32	file:
pads_refclk_cfg1	drivers/pci/pci_tegra.c	/^	u32 pads_refclk_cfg1;$/;"	m	struct:tegra_pcie_soc	typeref:typename:u32	file:
pads_writel	drivers/pci/pci_tegra.c	/^static void pads_writel(struct tegra_pcie *pcie, unsigned long value,$/;"	f	typeref:typename:void	file:
page	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		int proff, page, sblock;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:int	file:
page	drivers/mtd/nand/arasan_nfc.c	/^	u32 page;$/;"	m	struct:arasan_nand_info	typeref:typename:u32	file:
page	drivers/mtd/nand/denali.h	/^	uint32_t page;$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
page	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int page;       \/* Last page written to \/ read from      *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
page	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int page;       \/* Last page written to \/ read from      *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
page	fs/ubifs/ubifs.h	/^struct page {$/;"	s
page	scripts/kconfig/lxdialog/textbox.c	/^static char *page;$/;"	v	typeref:typename:char *	file:
page	tools/ublimage.h	/^	uint32_t	page;	\/*$/;"	m	struct:ubl_header	typeref:typename:uint32_t
page0	drivers/usb/gadget/ci_udc.h	/^	unsigned page0;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
page0	drivers/usb/gadget/ci_udc.h	/^	unsigned page0;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
page1	drivers/usb/gadget/ci_udc.h	/^	unsigned page1;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
page1	drivers/usb/gadget/ci_udc.h	/^	unsigned page1;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
page2	drivers/usb/gadget/ci_udc.h	/^	unsigned page2;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
page2	drivers/usb/gadget/ci_udc.h	/^	unsigned page2;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
page256	include/linux/mtd/doc2000.h	/^	char page256;$/;"	m	struct:DiskOnChip	typeref:typename:char
page3	drivers/usb/gadget/ci_udc.h	/^	unsigned page3;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
page3	drivers/usb/gadget/ci_udc.h	/^	unsigned page3;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
page4	drivers/usb/gadget/ci_udc.h	/^	unsigned page4;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
page4	drivers/usb/gadget/ci_udc.h	/^	unsigned page4;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
page_addr	drivers/mtd/nand/mxc_nand.c	/^	unsigned int			page_addr;$/;"	m	struct:mxc_nand_host	typeref:typename:unsigned int	file:
page_budget	fs/ubifs/ubifs.h	/^	int page_budget;$/;"	m	struct:ubifs_budg_info	typeref:typename:int
page_buf	drivers/mtd/onenand/samsung.c	/^	void __iomem	*page_buf;$/;"	m	struct:s3c_onenand	typeref:typename:void __iomem *	file:
page_buf	include/linux/mtd/onenand.h	/^	unsigned char		*page_buf;$/;"	m	struct:onenand_chip	typeref:typename:unsigned char *
page_ctrl	include/linux/mtd/omap_elm.h	/^	u32 page_ctrl;				\/* 0x080 *\/$/;"	m	struct:elm	typeref:typename:u32
page_data_size	tools/mxsboot.c	/^	uint32_t		page_data_size;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
page_element	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^struct page_element {$/;"	s
page_erase	drivers/mtd/pic32_flash.c	/^int page_erase(flash_info_t *info, int sect)$/;"	f	typeref:typename:int
page_length	scripts/kconfig/lxdialog/textbox.c	/^static int begin_reached, end_reached, page_length;$/;"	v	typeref:typename:int	file:
page_mask	include/linux/mtd/onenand.h	/^	unsigned int page_mask;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
page_num	arch/powerpc/include/asm/mmu.h	/^	unsigned long page_num:20;$/;"	m	struct:_pte	typeref:typename:unsigned long:20
page_offset	drivers/mtd/spi/sf_dataflash.c	/^	unsigned short		page_offset;	\/* offset in flash address *\/$/;"	m	struct:dataflash	typeref:typename:unsigned short	file:
page_offset	include/dataflash.h	/^	int page_offset;			\/* page offset in command *\/$/;"	m	struct:_AT91S_Dataflash	typeref:typename:int
page_param	drivers/ddr/marvell/a38x/ddr3_training.c	/^static struct page_element page_param[] = {$/;"	v	typeref:struct:page_element[]	file:
page_pos	include/linux/mtd/ubi.h	/^	int page_pos;$/;"	m	struct:ubi_sgl	typeref:typename:int
page_shift	include/linux/mtd/nand.h	/^	int page_shift;$/;"	m	struct:nand_chip	typeref:typename:int
page_shift	include/linux/mtd/onenand.h	/^	unsigned int page_shift;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
page_size	arch/arm/include/asm/setup.h	/^	    unsigned long page_size;		\/*  0 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
page_size	arch/arm/mach-sunxi/dram_sun6i.c	/^	u16 page_size;$/;"	m	struct:dram_sun6i_para	typeref:typename:u16	file:
page_size	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u16 page_size;$/;"	m	struct:dram_para	typeref:typename:u16	file:
page_size	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u16 page_size;$/;"	m	struct:dram_para	typeref:typename:u16	file:
page_size	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^	u16 page_size;$/;"	m	struct:dram_para	typeref:typename:u16	file:
page_size	arch/arm/mach-sunxi/dram_sun9i.c	/^	u16 page_size;$/;"	m	struct:dram_sun9i_para	typeref:typename:u16	file:
page_size	drivers/mtd/nand/denali_spl.c	/^static int page_size, oob_size, pages_per_block;$/;"	v	typeref:typename:int	file:
page_size	drivers/mtd/nand/fsl_elbc_nand.c	/^	int page_size;          \/* NAND page size (0=512, 1=2048)    *\/$/;"	m	struct:fsl_elbc_mtd	typeref:typename:int	file:
page_size	drivers/mtd/nand/sunxi_nand_spl.c	/^	int page_size;$/;"	m	struct:nfc_config	typeref:typename:int	file:
page_size	drivers/net/e1000.h	/^	uint16_t page_size;$/;"	m	struct:e1000_eeprom_info	typeref:typename:uint16_t
page_size	drivers/spi/cadence_qspi.h	/^	u32		page_size;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
page_size	include/android_image.h	/^	u32 page_size;		\/* flash page size we assume *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
page_size	include/spi_flash.h	/^	u32 page_size;$/;"	m	struct:spi_flash	typeref:typename:u32
page_size_16bit	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^	enum hws_page_size page_size_16bit;$/;"	m	struct:page_element	typeref:enum:hws_page_size
page_size_8bit	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^	enum hws_page_size page_size_8bit;$/;"	m	struct:page_element	typeref:enum:hws_page_size
page_status	fs/yaffs2/yaffs_guts.h	/^	u8 page_status;		\/* set to 0 to delete the chunk *\/$/;"	m	struct:yaffs_spare	typeref:typename:u8
page_tree	fs/ubifs/ubifs.h	/^	struct radix_tree_root	page_tree;	\/* radix tree of all pages *\/$/;"	m	struct:address_space	typeref:struct:radix_tree_root
pageadrlen	include/linux/mtd/doc2000.h	/^	char pageadrlen;$/;"	m	struct:DiskOnChip	typeref:typename:char
pagebuf	include/linux/mtd/nand.h	/^	int pagebuf;$/;"	m	struct:nand_chip	typeref:typename:int
pagebuf_bitflips	include/linux/mtd/nand.h	/^	unsigned int pagebuf_bitflips;$/;"	m	struct:nand_chip	typeref:typename:unsigned int
pagelist	include/linux/fb.h	/^	struct list_head pagelist; \/* list of touched pages *\/$/;"	m	struct:fb_deferred_io	typeref:struct:list_head
pagemask	include/linux/mtd/nand.h	/^	int pagemask;$/;"	m	struct:nand_chip	typeref:typename:int
pageoffset	drivers/mtd/spi/sf_dataflash.c	/^	uint16_t	pageoffset;$/;"	m	struct:flash_info	typeref:typename:uint16_t	file:
pager	tools/patman/patman	/^        pager = 'more'$/;"	v
pager	tools/patman/patman	/^    pager = os.getenv('PAGER')$/;"	v
pager	tools/patman/patman.py	/^        pager = 'more'$/;"	v
pager	tools/patman/patman.py	/^    pager = os.getenv('PAGER')$/;"	v
pages	arch/x86/include/asm/sfi.h	/^	u64	pages;$/;"	m	struct:sfi_mem_entry	typeref:typename:u64
pages	include/linux/mtd/bbm.h	/^	int pages[CONFIG_SYS_NAND_MAX_CHIPS];$/;"	m	struct:nand_bbt_descr	typeref:typename:int[]
pages	include/linux/screen_info.h	/^	__u16 pages;		\/* 0x32 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
pages	tools/ublimage.h	/^	uint32_t	pages;	\/* number of pages (size of bootloader) *\/$/;"	m	struct:ubl_header	typeref:typename:uint32_t
pagesPerBlock	fs/yaffs2/yaffs_nandif.h	/^	unsigned pagesPerBlock;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
pages_in_bank	arch/arm/include/asm/setup.h	/^	    unsigned long pages_in_bank[4];	\/* 44 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long[4]
pages_in_use	fs/yaffs2/yaffs_guts.h	/^	int pages_in_use:10;	\/* number of pages in use *\/$/;"	m	struct:yaffs_block_info	typeref:typename:int:10
pages_in_vram	arch/arm/include/asm/setup.h	/^	    unsigned long pages_in_vram;	\/* 60 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
pages_number	include/dataflash.h	/^	int pages_number;			\/* dataflash page number *\/$/;"	m	struct:_AT91S_Dataflash	typeref:typename:int
pages_per_block	drivers/mtd/nand/denali_spl.c	/^static int page_size, oob_size, pages_per_block;$/;"	v	typeref:typename:int	file:
pages_per_block	include/linux/mtd/nand.h	/^	__le32 pages_per_block;$/;"	m	struct:nand_jedec_params	typeref:typename:__le32
pages_per_block	include/linux/mtd/nand.h	/^	__le32 pages_per_block;$/;"	m	struct:nand_onfi_params	typeref:typename:__le32
pages_size	include/dataflash.h	/^	int pages_size;				\/* dataflash page size *\/$/;"	m	struct:_AT91S_Dataflash	typeref:typename:int
pages_skipped	include/linux/compat.h	/^	long pages_skipped;		\/* Pages which were not written *\/$/;"	m	struct:writeback_control	typeref:typename:long
pagesize	arch/arm/include/asm/setup.h	/^	u32 pagesize;$/;"	m	struct:tag_core	typeref:typename:u32
pagesize	arch/arm/mach-at91/arm926ejs/eflash.c	/^static u32 pagesize;$/;"	v	typeref:typename:u32	file:
pagesize	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 pagesize;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
pagesize	arch/avr32/include/asm/setup.h	/^	u32 pagesize;$/;"	m	struct:tag_core	typeref:typename:u32
pagesize	arch/nds32/include/asm/setup.h	/^	u32 pagesize;$/;"	m	struct:tag_core	typeref:typename:u32
pagesize	drivers/mtd/nand/arasan_nfc.c	/^	u32 pagesize;$/;"	m	struct:arasan_ecc_matrix	typeref:typename:u32	file:
pagesize	drivers/mtd/spi/sf_dataflash.c	/^	uint16_t	pagesize;$/;"	m	struct:flash_info	typeref:typename:uint16_t	file:
pagesize	drivers/mtd/st_smi.c	/^	u32 pagesize;$/;"	m	struct:flash_device	typeref:typename:u32	file:
pagesize	include/i2c_eeprom.h	/^	unsigned long pagesize;$/;"	m	struct:i2c_eeprom	typeref:typename:unsigned long
pagesize	include/linux/mtd/nand.h	/^	unsigned int pagesize;$/;"	m	struct:nand_flash_dev	typeref:typename:unsigned int
pagesize_2k	drivers/mtd/nand/mxc_nand.c	/^	int				pagesize_2k;$/;"	m	struct:mxc_nand_host	typeref:typename:int	file:
pagesz	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 pagesz;	\/* page size (K) (1-2) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
pagewidth	include/i2c_eeprom.h	/^	unsigned pagewidth;$/;"	m	struct:i2c_eeprom	typeref:typename:unsigned
paint	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct gpio_int paint;$/;"	m	struct:gpio_regs	typeref:struct:gpio_int
paintCell	scripts/kconfig/qconf.cc	/^void ConfigItem::paintCell(QPainter* p, const QColorGroup& cg, int column, int width, int align)$/;"	f	class:ConfigItem	typeref:typename:void
pairs	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	struct emc_dvfs_latency pairs[EMC_DVFS_LATENCY_MAX_SIZE];$/;"	m	struct:mrq_emc_dvfs_latency_response	typeref:struct:emc_dvfs_latency[]
palette	drivers/video/cfb_console.c	/^struct palette {$/;"	s	file:
palette	include/pxa_lcd.h	/^	u_long	palette;	\/* physical address of palette memory *\/$/;"	m	struct:pxafb_info	typeref:typename:u_long
palette	tools/bmp_logo.c	/^	uint8_t	palette[256*3];$/;"	m	struct:bitmap_s	typeref:typename:uint8_t[]	file:
palette	tools/easylogo/easylogo.c	/^	void *data, *palette;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:void *	file:
palette_color_ext	arch/arm/include/asm/arch-tegra/dc.h	/^	uint palette_color_ext;		\/* _WINC_PALETTE_COLOR_EXT_0 *\/$/;"	m	struct:dc_winc_reg	typeref:typename:uint
palette_index	board/esd/common/lcd.c	/^int palette_index;$/;"	v	typeref:typename:int
palette_size	include/pxa_lcd.h	/^	u_int	palette_size;$/;"	m	struct:pxafb_info	typeref:typename:u_int
palette_size	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
palette_sz	drivers/video/da8xx-fb.c	/^	unsigned int palette_sz;$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned int	file:
palette_valid	drivers/video/ati_radeon_fb.h	/^	int		palette_valid;$/;"	m	struct:radeon_regs	typeref:typename:int
palette_value	board/esd/common/lcd.c	/^int palette_value;$/;"	v	typeref:typename:int
pallete	drivers/video/fsl_diu_fb.c	/^	__be32 pallete;$/;"	m	struct:diu	typeref:typename:__be32	file:
palmas	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct pmic_data palmas = {$/;"	v	typeref:struct:pmic_data
palmas_bind	drivers/power/pmic/palmas.c	/^static int palmas_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
palmas_enable_ss_ldo	drivers/power/palmas.c	/^int palmas_enable_ss_ldo(void)$/;"	f	typeref:typename:int
palmas_i2c_read_u8	include/palmas.h	/^static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)$/;"	f	typeref:typename:int
palmas_i2c_write_u8	include/palmas.h	/^static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)$/;"	f	typeref:typename:int
palmas_ids	drivers/power/pmic/palmas.c	/^static const struct udevice_id palmas_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
palmas_init_settings	drivers/power/palmas.c	/^void palmas_init_settings(void)$/;"	f	typeref:typename:void
palmas_ldo_ctrl	drivers/power/regulator/palmas_regulator.c	/^static const char palmas_ldo_ctrl[][PALMAS_LDO_NUM] = {$/;"	v	typeref:typename:const char[][]	file:
palmas_ldo_enable	drivers/power/regulator/palmas_regulator.c	/^static int palmas_ldo_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
palmas_ldo_hex2volt	drivers/power/regulator/palmas_regulator.c	/^static int palmas_ldo_hex2volt(int hex)$/;"	f	typeref:typename:int	file:
palmas_ldo_ops	drivers/power/regulator/palmas_regulator.c	/^static const struct dm_regulator_ops palmas_ldo_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
palmas_ldo_probe	drivers/power/regulator/palmas_regulator.c	/^static int palmas_ldo_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
palmas_ldo_val	drivers/power/regulator/palmas_regulator.c	/^static int palmas_ldo_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
palmas_ldo_volt	drivers/power/regulator/palmas_regulator.c	/^static const char palmas_ldo_volt[][PALMAS_LDO_NUM] = {$/;"	v	typeref:typename:const char[][]	file:
palmas_ldo_volt2hex	drivers/power/regulator/palmas_regulator.c	/^static int palmas_ldo_volt2hex(int uV)$/;"	f	typeref:typename:int	file:
palmas_mmc1_poweron_ldo	drivers/power/palmas.c	/^int palmas_mmc1_poweron_ldo(void)$/;"	f	typeref:typename:int
palmas_ops	drivers/power/pmic/palmas.c	/^static struct dm_pmic_ops palmas_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
palmas_read	drivers/power/pmic/palmas.c	/^static int palmas_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
palmas_smps_ctrl	drivers/power/regulator/palmas_regulator.c	/^static const char palmas_smps_ctrl[][PALMAS_SMPS_NUM] = {$/;"	v	typeref:typename:const char[][]	file:
palmas_smps_enable	drivers/power/regulator/palmas_regulator.c	/^static int palmas_smps_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
palmas_smps_hex2volt	drivers/power/regulator/palmas_regulator.c	/^static int palmas_smps_hex2volt(int hex, bool range)$/;"	f	typeref:typename:int	file:
palmas_smps_ops	drivers/power/regulator/palmas_regulator.c	/^static const struct dm_regulator_ops palmas_smps_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
palmas_smps_probe	drivers/power/regulator/palmas_regulator.c	/^static int palmas_smps_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
palmas_smps_val	drivers/power/regulator/palmas_regulator.c	/^static int palmas_smps_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
palmas_smps_volt	drivers/power/regulator/palmas_regulator.c	/^static const char palmas_smps_volt[][PALMAS_SMPS_NUM] = {$/;"	v	typeref:typename:const char[][]	file:
palmas_smps_volt2hex	drivers/power/regulator/palmas_regulator.c	/^static int palmas_smps_volt2hex(int uV)$/;"	f	typeref:typename:int	file:
palmas_write	drivers/power/pmic/palmas.c	/^static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
palr	arch/m68k/include/asm/fec.h	/^	u32 palr;		\/* 0x3C0 *\/$/;"	m	struct:fec	typeref:typename:u32
palr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 palr;		\/* 0x0E4 *\/$/;"	m	struct:fecdma	typeref:typename:u32
pamu_addr_tbl	arch/powerpc/include/asm/fsl_pamu.h	/^struct pamu_addr_tbl {$/;"	s
pamu_config_ppaace	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,$/;"	f	typeref:typename:int	file:
pamu_config_spaace	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static int pamu_config_spaace(uint32_t liodn,$/;"	f	typeref:typename:int	file:
pamu_disable	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^void pamu_disable(void)$/;"	f	typeref:typename:void
pamu_enable	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^void pamu_enable(void)$/;"	f	typeref:typename:void
pamu_init	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^int pamu_init(void)$/;"	f	typeref:typename:int
pamu_reset	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^void pamu_reset(void)$/;"	f	typeref:typename:void
pamu_setup_default_xfer_to_host_ppaace	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)$/;"	f	typeref:typename:void	file:
pamu_setup_default_xfer_to_host_spaace	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)$/;"	f	typeref:typename:void	file:
pamubypenr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	pamubypenr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
pamubypenr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	pamubypenr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
pamubypenr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pamubypenr;	\/* PAMU bypass enable *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
panel	arch/arm/dts/exynos5250-snow.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/exynos5250-spring.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/exynos5420-peach-pit.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/exynos5800-peach-pi.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/rk3288-veyron.dtsi	/^	panel: panel {$/;"	l
panel	arch/arm/dts/sun5i-a13-q8-tablet.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/tegra124-nyan-big.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/tegra20-harmony.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/tegra20-seaboard.dts	/^	panel: panel {$/;"	l
panel	arch/arm/dts/tegra20-ventana.dts	/^	panel: panel {$/;"	l
panel	drivers/video/mx3fb.c	/^static GraphicDevice panel;$/;"	v	typeref:typename:GraphicDevice	file:
panel	drivers/video/mxc_ipuv3_fb.c	/^static GraphicDevice panel;$/;"	v	typeref:typename:GraphicDevice	file:
panel	drivers/video/mxsfb.c	/^static GraphicDevice panel;$/;"	v	typeref:typename:GraphicDevice	file:
panel	drivers/video/rockchip/rk_edp.c	/^	struct udevice *panel;$/;"	m	struct:rk_edp_priv	typeref:struct:udevice *	file:
panel	drivers/video/rockchip/rk_lvds.c	/^	struct udevice *panel;$/;"	m	struct:rk_lvds_priv	typeref:struct:udevice *	file:
panel	drivers/video/tegra.c	/^	struct udevice *panel;$/;"	m	struct:tegra_lcd_priv	typeref:struct:udevice *	file:
panel	drivers/video/tegra124/sor.c	/^	struct udevice *panel;$/;"	m	struct:tegra_dc_sor_data	typeref:struct:udevice *	file:
panel_cfg	board/compulab/common/omap3_display.c	/^static struct panel_config panel_cfg;$/;"	v	typeref:struct:panel_config	file:
panel_color	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 panel_color;$/;"	m	struct:panel_config	typeref:typename:u32
panel_config	arch/arm/include/asm/arch-omap3/dss.h	/^struct panel_config {$/;"	s
panel_enable_backlight	drivers/video/panel-uclass.c	/^int panel_enable_backlight(struct udevice *dev)$/;"	f	typeref:typename:int
panel_get_ops	include/panel.h	/^#define panel_get_ops(/;"	d
panel_in	arch/arm/dts/exynos5250-snow.dts	/^			panel_in: endpoint {$/;"	l	label:panel
panel_in	arch/arm/dts/exynos5250-spring.dts	/^			panel_in: endpoint {$/;"	l	label:panel
panel_in	arch/arm/dts/exynos5420-peach-pit.dts	/^			panel_in: endpoint {$/;"	l	label:panel
panel_in	arch/arm/dts/exynos5800-peach-pi.dts	/^			panel_in: endpoint {$/;"	l	label:panel
panel_info	board/BuR/common/common.c	/^vidinfo_t	panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/at91sam9261ek/at91sam9261ek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/at91sam9263ek/at91sam9263ek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/at91sam9rlek/at91sam9rlek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/sama5d3xek/sama5d3xek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/atmel/sama5d4ek/sama5d4ek.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/compulab/common/omap3_display.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/denx/ma5d4evk/ma5d4evk.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/mini-box/picosam9g45/picosam9g45.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/ronetix/pm9261/pm9261.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	board/ronetix/pm9263/pm9263.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	drivers/video/bcm2835.c	/^vidinfo_t panel_info;$/;"	v	typeref:typename:vidinfo_t
panel_info	drivers/video/mpc8xx_lcd.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_info	drivers/video/pxa_lcd.c	/^vidinfo_t panel_info = {$/;"	v	typeref:typename:vidinfo_t
panel_input	arch/arm/dts/sun5i-a13-q8-tablet.dts	/^			panel_input: endpoint@0 {$/;"	l	label:panel
panel_name	board/nokia/rx51/tag_omap.h	/^	char panel_name[16];$/;"	m	struct:omap_lcd_config	typeref:typename:char[16]
panel_ops	include/panel.h	/^struct panel_ops {$/;"	s
panel_power_ctrl	drivers/video/am335x-fb.h	/^	void (*panel_power_ctrl)(int);	\/* fp for power on\/off display *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:void (*)(int)
panel_power_ctrl	drivers/video/da8xx-fb.h	/^	void (*panel_power_ctrl)(int);$/;"	m	struct:da8xx_lcdc_platform_data	typeref:typename:void (*)(int)
panel_regulator	arch/arm/dts/rk3288-jerry.dts	/^	panel_regulator: panel-regualtor {$/;"	l
panel_resolution	board/teejet/mt_ventoux/mt_ventoux.c	/^} panel_resolution[] = {$/;"	v	typeref:struct:__anon67535ffe0108[]
panel_shade	drivers/video/da8xx-fb.h	/^	enum panel_shade panel_shade;$/;"	m	struct:display_panel	typeref:enum:panel_shade
panel_shade	drivers/video/da8xx-fb.h	/^enum panel_shade {$/;"	g
panel_type	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 panel_type;$/;"	m	struct:panel_config	typeref:typename:u32
panel_type	drivers/video/da8xx-fb.h	/^	enum panel_type panel_type; \/* QVGA *\/$/;"	m	struct:display_panel	typeref:enum:panel_type
panel_type	drivers/video/da8xx-fb.h	/^enum panel_type {$/;"	g
panelres_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 panelres_params_sn20[]	= {0x82};$/;"	v	typeref:typename:u16[]	file:
panic	lib/panic.c	/^void panic(const char *fmt, ...)$/;"	f	typeref:typename:void
panic_finish	lib/panic.c	/^static void panic_finish(void)$/;"	f	typeref:typename:void	file:
panic_nand_get_device	drivers/mtd/nand/nand_base.c	/^static void panic_nand_get_device(struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
panic_nand_wait	drivers/mtd/nand/nand_base.c	/^static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:void	file:
panic_nand_write	drivers/mtd/nand/nand_base.c	/^static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
panic_str	lib/panic.c	/^void panic_str(const char *str)$/;"	f	typeref:typename:void
pap	drivers/block/sata_dwc.c	/^static struct ata_port			*pap = &ap;$/;"	v	typeref:struct:ata_port *	file:
papllclk	arch/arm/dts/k2e-clocks.dtsi	/^	papllclk: papllclk@2620358 {$/;"	l
papllclk	arch/arm/dts/k2hk-clocks.dtsi	/^	papllclk: papllclk@2620358 {$/;"	l
papllclk	arch/arm/dts/k2l-clocks.dtsi	/^	papllclk: papllclk@2620358 {$/;"	l
par	arch/arm/imx-common/hab.c	/^	uint8_t  par;						\/* Version *\/$/;"	m	struct:record	typeref:typename:uint8_t	file:
par	arch/m68k/include/asm/coldfire/eport.h	/^	u16 par;	\/* 0x00 *\/$/;"	m	struct:eport	typeref:typename:u16
par	arch/m68k/include/asm/immap_5307.h	/^	u16 par;$/;"	m	struct:sim	typeref:typename:u16
par	board/esd/vme8349/caddy.h	/^	uint32_t par[5];$/;"	m	struct:caddy_answer	typeref:typename:uint32_t[5]
par	board/esd/vme8349/caddy.h	/^	uint32_t par[5];$/;"	m	struct:caddy_cmd	typeref:typename:uint32_t[5]
par	include/linux/fb.h	/^	void *par;$/;"	m	struct:fb_info	typeref:typename:void *
par_ad	arch/m68k/include/asm/immap_5235.h	/^	u8 par_ad;		\/* 0x40 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_addr	arch/m68k/include/asm/immap_5275.h	/^	u8 par_addr;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_ata	arch/m68k/include/asm/immap_5445x.h	/^	u16 par_ata;		\/* ATA Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u16
par_be	arch/m68k/include/asm/immap_520x.h	/^	u8 par_be;		\/* 0x31 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_be	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_be;		\/* 0x30 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_be	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_be;		\/* 0x51 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_be	arch/m68k/include/asm/immap_5329.h	/^	u8 par_be;		\/* 0x54 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_be	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_be;		\/* 0x49 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_be	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_be;		\/* Flexbus Byte-Enable Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_bs	arch/m68k/include/asm/immap_5235.h	/^	u8 par_bs;		\/* 0x44 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_bs	arch/m68k/include/asm/immap_5275.h	/^	u8 par_bs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_busctl	arch/m68k/include/asm/immap_520x.h	/^	u8 par_busctl;		\/* 0x30 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_busctl	arch/m68k/include/asm/immap_5235.h	/^	u16 par_busctl;		\/* 0x42 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_busctl	arch/m68k/include/asm/immap_5275.h	/^	u16 par_busctl;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_busctl	arch/m68k/include/asm/immap_5329.h	/^	u8 par_busctl;		\/* 0x52 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_cani2c	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_cani2c;		\/* 0x4B *\/$/;"	m	struct:gpio	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_520x.h	/^	u8 par_cs;		\/* 0x32 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_cs;		\/* 0x31 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5235.h	/^	u8 par_cs;		\/* 0x45 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5275.h	/^	u8 par_cs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_cs;		\/* 0x52 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5329.h	/^	u8 par_cs;		\/* 0x55 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_cs;		\/* 0x4A *\/$/;"	m	struct:gpio	typeref:typename:u8
par_cs	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_cs;		\/* Flexbus Chip-Select Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dbg0h	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_dbg0h;		\/* 0x5B *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dbg1h	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_dbg1h;		\/* 0x5A *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dbgl	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_dbgl;		\/* 0x5C *\/$/;"	m	struct:gpio	typeref:typename:u8
par_debug	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_debug;		\/* 0x62 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_dma	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_dma;		\/* DMA Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dma	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_dma;		\/*0x43 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dspi	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_dspi;		\/* 0x36 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dspi	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_dspi;		\/* DSPI Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dspi	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 par_dspi;		\/*0x50 *\/$/;"	m	struct:gpio	typeref:typename:u16
par_dspi0	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_dspi0;		\/* 0x4E *\/$/;"	m	struct:gpio	typeref:typename:u8
par_dspih	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_dspih;		\/* 0x54 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_dspil	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_dspil;		\/* 0x55 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_dspiow	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_dspiow;		\/* 0x4F *\/$/;"	m	struct:gpio	typeref:typename:u8
par_etpu	arch/m68k/include/asm/immap_5235.h	/^	u8 par_etpu;		\/* 0x4E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fbcs	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_fbcs;		\/*0x42 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_fbctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_fbctl;		\/* 0x32 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_fbctl	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_fbctl;		\/* 0x50 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fbctl	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_fbctl;		\/* 0x48 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_fbctl	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_fbctl;		\/* Flexbus Control Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_fbctl	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 par_fbctl;		\/*0x40 *\/$/;"	m	struct:gpio	typeref:typename:u16
par_fec	arch/m68k/include/asm/immap_520x.h	/^	u8 par_fec;		\/* 0x38 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fec	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_fec;		\/* 0x56 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fec	arch/m68k/include/asm/immap_5329.h	/^	u8 par_fec;		\/* 0x50 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fec	arch/m68k/include/asm/immap_5329.h	/^	u8 par_fec;		\/* 0x5D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fec	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_fec;		\/* 0x5E *\/$/;"	m	struct:gpio	typeref:typename:u8
par_fec	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_fec;		\/* FEC Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_fec0hl	arch/m68k/include/asm/immap_5275.h	/^	u8 par_fec0hl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_fec1hl	arch/m68k/include/asm/immap_5275.h	/^	u8 par_fec1hl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_feci2c	arch/m68k/include/asm/immap_520x.h	/^	u8 par_feci2c;		\/* 0x33 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_feci2c	arch/m68k/include/asm/immap_5235.h	/^	u8 par_feci2c;		\/* 0x47 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_feci2c	arch/m68k/include/asm/immap_5275.h	/^	u16 par_feci2c;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_feci2c	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_feci2c;		\/* 0x57 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_feci2c	arch/m68k/include/asm/immap_5329.h	/^	u8 par_feci2c;		\/* 0x53 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_feci2c	arch/m68k/include/asm/immap_5445x.h	/^	u16 par_feci2c;		\/* FEC \/ I2C Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u16
par_feci2cirq	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 par_feci2cirq;	\/*0x44 *\/$/;"	m	struct:gpio	typeref:typename:u16
par_i2c	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_i2c;		\/* 0x33 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_io	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct par_io {$/;"	s
par_io_t	arch/powerpc/include/asm/immap_85xx.h	/^} par_io_t;$/;"	t	typeref:struct:par_io
par_irq	arch/m68k/include/asm/immap_520x.h	/^	u8 par_irq;		\/* 0x39 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_irq	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_irq;		\/* 0x39 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_irq	arch/m68k/include/asm/immap_5329.h	/^	u16 par_irq;		\/* 0x60 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_irq	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_irq;		\/* IRQ Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_irq0h	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_irq0h;		\/* 0x58 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_irq0l	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_irq0l;		\/* 0x59 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_irq1h	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_irq1h;		\/* 0x5A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_irq1l	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_irq1l;		\/* 0x5B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_irqh	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_irqh;		\/* 0x4C *\/$/;"	m	struct:gpio	typeref:typename:u8
par_irql	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_irql;		\/* 0x4D *\/$/;"	m	struct:gpio	typeref:typename:u8
par_lcdctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_lcdctl;		\/* 0x38 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_lcdctl	arch/m68k/include/asm/immap_5329.h	/^	u16 par_lcdctl;		\/* 0x5E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_lcddata	arch/m68k/include/asm/immap_5329.h	/^	u8 par_lcddata;		\/* 0x5D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_lcdh	arch/m68k/include/asm/immap_5227x.h	/^	u32 par_lcdh;		\/* 0x3C *\/$/;"	m	struct:gpio	typeref:typename:u32
par_lcdl	arch/m68k/include/asm/immap_5227x.h	/^	u32 par_lcdl;		\/* 0x40 *\/$/;"	m	struct:gpio	typeref:typename:u32
par_pci	arch/m68k/include/asm/immap_5445x.h	/^	u16 par_pci;		\/* PCI Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u16
par_pcibg	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 par_pcibg;		\/*0x48 *\/$/;"	m	struct:gpio	typeref:typename:u16
par_pcibr	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 par_pcibr;		\/*0x4A *\/$/;"	m	struct:gpio	typeref:typename:u16
par_psc0	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_psc0;		\/*0x4F *\/$/;"	m	struct:gpio	typeref:typename:u8
par_psc1	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_psc1;		\/*0x4E *\/$/;"	m	struct:gpio	typeref:typename:u8
par_psc2	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_psc2;		\/*0x4D *\/$/;"	m	struct:gpio	typeref:typename:u8
par_psc3	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_psc3;		\/*0x4C *\/$/;"	m	struct:gpio	typeref:typename:u8
par_pwm	arch/m68k/include/asm/immap_5329.h	/^	u8 par_pwm;		\/* 0x51 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_qspi	arch/m68k/include/asm/immap_520x.h	/^	u8 par_qspi;		\/* 0x34 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_qspi	arch/m68k/include/asm/immap_5235.h	/^	u8 par_qspi;		\/* 0x4A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_qspi	arch/m68k/include/asm/immap_5275.h	/^	u16 par_qspi;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_qspi	arch/m68k/include/asm/immap_5329.h	/^	u16 par_qspi;		\/* 0x5A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_res1	arch/m68k/include/asm/immap_5275.h	/^	u8 par_res1[2];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
par_res2	arch/m68k/include/asm/immap_5275.h	/^	u8 par_res2[3];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
par_sdhc	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_sdhc;		\/* 0x63 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_sdhch	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_sdhch;		\/* 0x54 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_sdhcl	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_sdhcl;		\/* 0x55 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_sdram	arch/m68k/include/asm/immap_5235.h	/^	u8 par_sdram;		\/* 0x46 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_sdram	arch/m68k/include/asm/immap_5275.h	/^	u16 par_sdram;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_simp0	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_simp0;		\/* 0x5E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_simp0h	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_simp0h;		\/* 0x56 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_simp1h	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_simp1h;		\/* 0x5C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_simp1h	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_simp1h;		\/* 0x57 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_simp1l	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_simp1l;		\/* 0x5D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_ssi	arch/m68k/include/asm/immap_5329.h	/^	u16 par_ssi;		\/* 0x56 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_ssi	arch/m68k/include/asm/immap_5445x.h	/^	u16 par_ssi;		\/* SSI Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u16
par_ssi0h	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_ssi0h;		\/* 0x58 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_ssi0l	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_ssi0l;		\/* 0x59 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_ssih	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_ssih;		\/* 0x64 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_ssil	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_ssil;		\/* 0x65 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_520x.h	/^	u8 par_timer;		\/* 0x35 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_5227x.h	/^	u8 par_timer;		\/* 0x37 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_5235.h	/^	u16 par_timer;		\/* 0x4C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_timer	arch/m68k/include/asm/immap_5275.h	/^	u16 par_timer;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_timer	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_timer;		\/* 0x5F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_5329.h	/^	u8 par_timer;		\/* 0x5C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_timer;		\/* 0x50 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_timer;		\/* Time Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_timer	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 par_timer;		\/*0x52 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_uart	arch/m68k/include/asm/immap_520x.h	/^	u16 par_uart;		\/* 0x36 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_uart	arch/m68k/include/asm/immap_5227x.h	/^	u16 par_uart;		\/* 0x34 *\/$/;"	m	struct:gpio	typeref:typename:u16
par_uart	arch/m68k/include/asm/immap_5235.h	/^	u16 par_uart;		\/* 0x48 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_uart	arch/m68k/include/asm/immap_5275.h	/^	u16 par_uart;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_uart	arch/m68k/include/asm/immap_5301x.h	/^	u8 par_uart;		\/* 0x60 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
par_uart	arch/m68k/include/asm/immap_5329.h	/^	u16 par_uart;		\/* 0x58 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_uart	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_uart;		\/* UART Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
par_uart0	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_uart0;		\/* 0x53 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_uart1	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_uart1;		\/* 0x52 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_uart2	arch/m68k/include/asm/immap_5441x.h	/^	u8 par_uart2;		\/* 0x51 *\/$/;"	m	struct:gpio	typeref:typename:u8
par_usb	arch/m68k/include/asm/immap_5275.h	/^	u16 par_usb;$/;"	m	struct:gpio_ctrl	typeref:typename:u16
par_usb	arch/m68k/include/asm/immap_5445x.h	/^	u8 par_usb;		\/* USB Pin Assignment Register *\/$/;"	m	struct:gpio	typeref:typename:u8
para1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 para1;$/;"	m	struct:dram_para	typeref:typename:u32
para1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 para1;$/;"	m	struct:dram_para	typeref:typename:u32
para2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 para2;$/;"	m	struct:dram_para	typeref:typename:u32
para2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 para2;$/;"	m	struct:dram_para	typeref:typename:u32
parallel_microcode_load	arch/x86/include/asm/mp.h	/^	int parallel_microcode_load;$/;"	m	struct:mp_params	typeref:typename:int
param	arch/arm/mach-uniphier/boards.c	/^	const struct uniphier_board_data *param;$/;"	m	struct:uniphier_board_id	typeref:typename:const struct uniphier_board_data *	file:
param	drivers/ddr/altera/sequencer.c	/^static struct param_type *param;$/;"	v	typeref:struct:param_type *	file:
param	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_param param;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_param
param	include/dm/pinctrl.h	/^	unsigned int param;$/;"	m	struct:pinconf_param	typeref:typename:unsigned int
param	tools/imximage.h	/^	uint8_t param;$/;"	m	struct:__anon504a956c0908	typeref:typename:uint8_t
param	tools/mxsboot.c	/^	enum param {$/;"	g	function:parse_ops	file:
param0	drivers/usb/dwc3/core.h	/^	u32	param0;$/;"	m	struct:dwc3_gadget_ep_cmd_params	typeref:typename:u32
param1	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 param1;$/;"	m	struct:emu_hal_params	typeref:typename:u32
param1	board/nokia/rx51/rx51.h	/^	u32 param1;$/;"	m	struct:emu_hal_params_rx51	typeref:typename:u32
param1	drivers/usb/dwc3/core.h	/^	u32	param1;$/;"	m	struct:dwc3_gadget_ep_cmd_params	typeref:typename:u32
param2	board/nokia/rx51/rx51.h	/^	u32 param2;$/;"	m	struct:emu_hal_params_rx51	typeref:typename:u32
param2	drivers/usb/dwc3/core.h	/^	u32	param2;$/;"	m	struct:dwc3_gadget_ep_cmd_params	typeref:typename:u32
param3	board/nokia/rx51/rx51.h	/^	u32 param3;$/;"	m	struct:emu_hal_params_rx51	typeref:typename:u32
param4	board/nokia/rx51/rx51.h	/^	u32 param4;$/;"	m	struct:emu_hal_params_rx51	typeref:typename:u32
param_revision	include/linux/mtd/nand.h	/^	u8 param_revision;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
param_struct	arch/arm/include/asm/setup.h	/^struct param_struct {$/;"	s
param_type	drivers/ddr/altera/sequencer.h	/^struct param_type {$/;"	s
parameters	drivers/usb/dwc3/core.h	/^	u32	parameters:16;$/;"	m	struct:dwc3_event_depevt	typeref:typename:u32:16
parameters_begin	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t parameters_begin;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
parameters_end	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t parameters_end;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
parameters_t	board/astro/mcf5373l/astro.h	/^} __attribute__ ((packed)) parameters_t;$/;"	t	typeref:struct:__anona9f590f60208
params	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	struct pipe3_dpll_params params;$/;"	m	struct:pipe3_dpll_map	typeref:struct:pipe3_dpll_params
params	arch/arm/lib/bootm.c	/^static struct tag *params;$/;"	v	typeref:struct:tag *	file:
params	arch/arm/mach-exynos/include/mach/spl.h	/^	char		params[12];	\/* Length must be word-aligned *\/$/;"	m	struct:spl_machine_param	typeref:typename:char[12]
params	arch/nds32/lib/bootm.c	/^static struct tag *params;$/;"	v	typeref:struct:tag *	file:
params	arch/x86/include/asm/arch-quark/mrc.h	/^	struct dram_params params;$/;"	m	struct:mrc_params	typeref:struct:dram_params
params	drivers/net/eepro100.c	/^	unsigned char params[0];$/;"	m	struct:descriptor	typeref:typename:unsigned char[0]	file:
params	drivers/tpm/tpm_tis.h	/^	union tpm_cmd_params params;$/;"	m	struct:tpm_cmd_t	typeref:union:tpm_cmd_params
params	drivers/usb/dwc3/ti_usb_phy.c	/^	struct usb3_dpll_params params;$/;"	m	struct:usb3_dpll_map	typeref:struct:usb3_dpll_params	file:
params	drivers/usb/phy/omap_usb_phy.c	/^	struct usb3_dpll_params params;$/;"	m	struct:usb3_dpll_map	typeref:struct:usb3_dpll_params	file:
params	drivers/video/scf0403_lcd.c	/^	u16 *params;$/;"	m	struct:scf0403_cmd	typeref:typename:u16 *	file:
params	include/fsl-mc/fsl_mc_cmd.h	/^	uint64_t params[MC_CMD_NUM_OF_PARAMS];$/;"	m	struct:mc_command	typeref:typename:uint64_t[]
params	include/linux/edd.h	/^	struct edd_device_params params;$/;"	m	struct:edd_info	typeref:struct:edd_device_params
params	tools/dumpimage.c	/^static struct image_tool_params params = {$/;"	v	typeref:struct:image_tool_params	file:
params	tools/mkimage.c	/^static struct image_tool_params params = {$/;"	v	typeref:struct:image_tool_params	file:
parent	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk *parent;$/;"	m	struct:clk	typeref:struct:clk *
parent	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk *parent;$/;"	m	struct:clk	typeref:struct:clk *
parent	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t parent;$/;"	m	struct:cmd_clk_get_all_info_response	typeref:typename:uint32_t
parent	arch/arm/mach-zynq/clk.c	/^	enum zynq_clk	parent;$/;"	m	struct:clk	typeref:enum:zynq_clk	file:
parent	drivers/video/ipu.h	/^	struct clk *parent;$/;"	m	struct:clk	typeref:struct:clk *
parent	fs/ubifs/ubifs.h	/^	struct ubifs_nnode *parent;$/;"	m	struct:ubifs_cnode	typeref:struct:ubifs_nnode *
parent	fs/ubifs/ubifs.h	/^	struct ubifs_nnode *parent;$/;"	m	struct:ubifs_nnode	typeref:struct:ubifs_nnode *
parent	fs/ubifs/ubifs.h	/^	struct ubifs_nnode *parent;$/;"	m	struct:ubifs_pnode	typeref:struct:ubifs_nnode *
parent	fs/ubifs/ubifs.h	/^	struct ubifs_znode *parent;$/;"	m	struct:ubifs_znode	typeref:struct:ubifs_znode *
parent	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *parent;$/;"	m	struct:yaffs_obj	typeref:struct:yaffs_obj *
parent	include/dm/device.h	/^	struct udevice *parent;$/;"	m	struct:udevice	typeref:struct:udevice *
parent	include/linux/compat.h	/^	struct device		*parent;$/;"	m	struct:device	typeref:struct:device *
parent	include/linux/ioport.h	/^	struct resource *parent, *sibling, *child;$/;"	m	struct:resource	typeref:struct:resource *
parent	include/power/pmic.h	/^	struct pmic *parent;$/;"	m	struct:pmic	typeref:struct:pmic *
parent	include/usb.h	/^	struct usb_device *parent;$/;"	m	struct:usb_device	typeref:struct:usb_device *
parent	lib/efi_loader/efi_disk.c	/^	struct efi_object parent;$/;"	m	struct:efi_disk_obj	typeref:struct:efi_object	file:
parent	lib/efi_loader/efi_gop.c	/^	struct efi_object parent;$/;"	m	struct:efi_gop_obj	typeref:struct:efi_object	file:
parent	lib/efi_loader/efi_net.c	/^	struct efi_object parent;$/;"	m	struct:efi_net_obj	typeref:struct:efi_object	file:
parent	scripts/kconfig/expr.h	/^	struct file *parent;$/;"	m	struct:file	typeref:struct:file *
parent	scripts/kconfig/expr.h	/^	struct menu *parent;$/;"	m	struct:menu	typeref:struct:menu *
parent	scripts/kconfig/qconf.h	/^	ConfigView* parent(void) const$/;"	f	class:ConfigLineEdit	typeref:typename:ConfigView *
parent	scripts/kconfig/qconf.h	/^	ConfigView* parent(void) const$/;"	f	class:ConfigList	typeref:typename:ConfigView *
parent	scripts/kconfig/zconf.lex.c	/^	struct buffer *parent;$/;"	m	struct:buffer	typeref:struct:buffer *	file:
parent_clock_id	arch/arm/include/asm/arch-tegra/clock.h	/^	enum clock_id parent_clock_id;$/;"	m	struct:periph_clk_init	typeref:enum:clock_id
parent_count	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 parent_count;	\/* number of entries in parent_sel[] *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
parent_count	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 parent_count;	\/* number of entries in parent_sel[] *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
parent_handle	include/efi_api.h	/^	void *parent_handle;$/;"	m	struct:efi_loaded_image	typeref:typename:void *
parent_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t parent_id;$/;"	m	struct:cmd_clk_get_parent_response	typeref:typename:uint32_t
parent_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t parent_id;$/;"	m	struct:cmd_clk_set_parent_request	typeref:typename:uint32_t
parent_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t parent_id;$/;"	m	struct:cmd_clk_set_parent_response	typeref:typename:uint32_t
parent_id	fs/yaffs2/yaffs_guts.h	/^	u32 parent_id;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u32
parent_image	include/efi.h	/^	efi_handle_t parent_image;$/;"	m	struct:efi_priv	typeref:typename:efi_handle_t
parent_ino	fs/ubifs/ubifs.h	/^static inline ino_t parent_ino(struct dentry *dentry)$/;"	f	typeref:typename:ino_t
parent_obj_id	fs/yaffs2/yaffs_guts.h	/^	int parent_obj_id;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:int
parent_phys_hi	arch/sparc/include/asm/prom.h	/^	unsigned int parent_phys_hi;$/;"	m	struct:linux_prom_ebus_ranges	typeref:typename:unsigned int
parent_phys_hi	arch/sparc/include/asm/prom.h	/^	unsigned int parent_phys_hi;$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
parent_phys_lo	arch/sparc/include/asm/prom.h	/^	unsigned int parent_phys_lo;$/;"	m	struct:linux_prom_ebus_ranges	typeref:typename:unsigned int
parent_phys_lo	arch/sparc/include/asm/prom.h	/^	unsigned int parent_phys_lo;$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
parent_phys_mid	arch/sparc/include/asm/prom.h	/^	unsigned int parent_phys_mid;$/;"	m	struct:linux_prom_ebus_ranges	typeref:typename:unsigned int
parent_platdata	include/dm/device.h	/^	void *parent_platdata;$/;"	m	struct:udevice	typeref:typename:void *
parent_priv	include/dm/device.h	/^	void *parent_priv;$/;"	m	struct:udevice	typeref:typename:void *
parent_sel	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 *parent_sel;	\/* array of parent selector values *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32 *
parent_sel	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 *parent_sel;	\/* array of parent selector values *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32 *
parents	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t parents[MRQ_CLK_MAX_PARENTS];$/;"	m	struct:cmd_clk_get_all_info_response	typeref:typename:uint32_t[]
parents	scripts/kconfig/gconf.c	/^static GtkTreeIter *parents[256];$/;"	v	typeref:typename:GtkTreeIter * [256]	file:
parity	include/usb_cdc_acm.h	/^		unsigned char parity;$/;"	m	struct:rs232_emu	typeref:typename:unsigned char
parity	lib/bch.c	/^static inline int parity(unsigned int x)$/;"	f	typeref:typename:int	file:
parityfail_clear	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	parityfail_clear;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
parityfail_clear	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	parityfail_clear;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
parityfail_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	parityfail_status;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
parityfail_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	parityfail_status;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
parityinj	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	parityinj;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
park	disk/part_amiga.h	/^    u32 park;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
park_cpu	arch/arm/mach-tegra/tegra124/psci.c	/^static void park_cpu(void)$/;"	f	typeref:typename:void	file:
parm	include/andestech/andes_pcu.h	/^	unsigned int	parm;		\/* PCSx Parameter*\/$/;"	m	struct:pcs	typeref:typename:unsigned int
parms	tools/aisimage.h	/^	uint32_t parms[AIS_FCN_MAX];$/;"	m	struct:ais_cmd_func	typeref:typename:uint32_t[]
parr_err_status1	drivers/video/fsl_dcu_fb.c	/^	u32 parr_err_status1;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
parr_err_status3	drivers/video/fsl_dcu_fb.c	/^	u32 parr_err_status3;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
parse	arch/arm/include/asm/setup.h	/^	int (*parse)(const struct tag *);$/;"	m	struct:tagtable	typeref:typename:int (*)(const struct tag *)
parse	arch/avr32/include/asm/setup.h	/^	int	(*parse)(struct tag *);$/;"	m	struct:tagtable	typeref:typename:int (*)(struct tag *)
parse	arch/nds32/include/asm/setup.h	/^	int (*parse)(const struct tag *);$/;"	m	struct:tagtable	typeref:typename:int (*)(const struct tag *)
parse_action	cmd/eeprom.c	/^static enum eeprom_action parse_action(char *cmd)$/;"	f	typeref:enum:eeprom_action	file:
parse_address	drivers/pinctrl/meson/pinctrl-meson.c	/^static fdt_addr_t parse_address(int offset, const char *name, int na, int ns)$/;"	f	typeref:typename:fdt_addr_t	file:
parse_aes_key	tools/env/fw_env.c	/^int parse_aes_key(char *key, uint8_t *bin_key)$/;"	f	typeref:typename:int
parse_argv	cmd/cache.c	/^static int parse_argv(const char *s)$/;"	f	typeref:typename:int	file:
parse_bank	cmd/armflash.c	/^static void parse_bank(ulong bank)$/;"	f	typeref:typename:void	file:
parse_byte_string	cmd/tpm.c	/^static void *parse_byte_string(char *bytes, uint8_t *data, size_t *count_ptr)$/;"	f	typeref:typename:void *	file:
parse_cfg_cmd	tools/imximage.c	/^static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,$/;"	f	typeref:typename:void	file:
parse_cfg_cmd	tools/ublimage.c	/^static void parse_cfg_cmd(struct ubl_header *ublhdr, int32_t cmd, char *token,$/;"	f	typeref:typename:void	file:
parse_cfg_file	tools/imximage.c	/^static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)$/;"	f	typeref:typename:uint32_t	file:
parse_cfg_file	tools/ublimage.c	/^static uint32_t parse_cfg_file(struct ubl_header *ublhdr, char *name)$/;"	f	typeref:typename:uint32_t	file:
parse_cfg_fld	tools/imximage.c	/^static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,$/;"	f	typeref:typename:void	file:
parse_cfg_fld	tools/ublimage.c	/^static void parse_cfg_fld(struct ubl_header *ublhdr, int32_t *cmd,$/;"	f	typeref:typename:void	file:
parse_common_args	tools/env/fw_env_main.c	/^static void parse_common_args(int argc, char *argv[])$/;"	f	typeref:typename:void	file:
parse_config	tools/env/fw_env.c	/^static int parse_config(struct env_opts *opts)$/;"	f	typeref:typename:int	file:
parse_config_depends	scripts/kconfig/streamline_config.pl	/^sub parse_config_depends$/;"	s
parse_config_file	scripts/basic/fixdep.c	/^static void parse_config_file(const char *map, size_t len)$/;"	f	typeref:typename:void	file:
parse_config_selects	scripts/kconfig/streamline_config.pl	/^sub parse_config_selects$/;"	s
parse_customlcd	board/compulab/common/omap3_display.c	/^static int parse_customlcd(char *custom_lcd_params)$/;"	f	typeref:typename:int	file:
parse_dep_file	scripts/basic/fixdep.c	/^static void parse_dep_file(void *map, size_t len)$/;"	f	typeref:typename:void	file:
parse_dev	drivers/dfu/dfu_sf.c	/^static struct spi_flash *parse_dev(char *devstr)$/;"	f	typeref:struct:spi_flash *	file:
parse_email	scripts/checkpatch.pl	/^sub parse_email {$/;"	s
parse_email	scripts/get_maintainer.pl	/^sub parse_email {$/;"	s
parse_err	arch/sandbox/include/asm/state.h	/^	const char *parse_err;		\/* Error to report from parsing *\/$/;"	m	struct:sandbox_state	typeref:typename:const char *
parse_file	scripts/docproc.c	/^static void parse_file(FILE *infile)$/;"	f	typeref:typename:void	file:
parse_file	tools/genboardscfg.py	/^    def parse_file(self, file):$/;"	m	class:MaintainersDatabase
parse_file_outer	common/cli_hush.c	/^static int parse_file_outer(FILE *f)$/;"	f	typeref:typename:int	file:
parse_flash	cmd/armflash.c	/^static void parse_flash(void)$/;"	f	typeref:typename:void	file:
parse_fn	include/linux/mtd/partitions.h	/^	int (*parse_fn)(struct mtd_info *, struct mtd_partition **,$/;"	m	struct:mtd_part_parser	typeref:typename:int (*)(struct mtd_info *,struct mtd_partition **,struct mtd_part_parser_data *)
parse_group	common/cli_hush.c	/^static int parse_group(o_string *dest, struct p_context *ctx,$/;"	f	typeref:typename:int	file:
parse_header	lib/lzo/lzo1x_decompress.c	/^static inline const unsigned char *parse_header(const unsigned char *src)$/;"	f	typeref:typename:const unsigned char *	file:
parse_hwpart_gp	cmd/mmc.c	/^static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx,$/;"	f	typeref:typename:int	file:
parse_hwpart_user	cmd/mmc.c	/^static int parse_hwpart_user(struct mmc_hwpart_conf *pconf,$/;"	f	typeref:typename:int	file:
parse_i2c_bus_addr	cmd/eeprom.c	/^static int parse_i2c_bus_addr(int *i2c_bus, ulong *i2c_addr, int argc,$/;"	f	typeref:typename:int	file:
parse_integer	cmd/pxe.c	/^static int parse_integer(char **c, int *dst)$/;"	f	typeref:typename:int	file:
parse_label	cmd/pxe.c	/^static int parse_label(char **c, struct pxe_menu *cfg)$/;"	f	typeref:typename:int	file:
parse_label_menu	cmd/pxe.c	/^static int parse_label_menu(char **c, struct pxe_menu *cfg,$/;"	f	typeref:typename:int	file:
parse_mc_firmware_fit_image	drivers/net/fsl-mc/mc.c	/^int parse_mc_firmware_fit_image(u64 mc_fw_addr,$/;"	f	typeref:typename:int
parse_menu	cmd/pxe.c	/^static int parse_menu(cmd_tbl_t *cmdtp, char **c, struct pxe_menu *cfg,$/;"	f	typeref:typename:int	file:
parse_mode	board/compulab/common/omap3_display.c	/^static int parse_mode(const char *mode)$/;"	f	typeref:typename:int	file:
parse_mtd_partitions	drivers/mtd/mtdpart.c	/^int parse_mtd_partitions(struct mtd_info *master, const char *const *types,$/;"	f	typeref:typename:int
parse_mtdids	cmd/mtdparts.c	/^static int parse_mtdids(const char *const ids)$/;"	f	typeref:typename:int	file:
parse_mtdparts	cmd/mtdparts.c	/^static int parse_mtdparts(const char *const mtdparts)$/;"	f	typeref:typename:int	file:
parse_multicast_oack	net/tftp.c	/^static void parse_multicast_oack(char *pkt, int len)$/;"	f	typeref:typename:void	file:
parse_num	common/xyzModem.c	/^parse_num (char *s, unsigned long *val, char **es, char *delim)$/;"	f	typeref:typename:bool	file:
parse_numeric_param	cmd/eeprom.c	/^static int parse_numeric_param(char *str)$/;"	f	typeref:typename:int	file:
parse_one_config	tools/moveconfig.py	/^    def parse_one_config(self, config, dotconfig_lines, autoconf_lines):$/;"	m	class:KconfigParser
parse_operand	common/bedbug.c	/^int parse_operand (unsigned long memaddr, struct opcode *opc,$/;"	f	typeref:typename:int
parse_ops	tools/mxsboot.c	/^static int parse_ops(int argc, char **argv)$/;"	f	typeref:typename:int	file:
parse_path	fs/ext4/ext4_common.c	/^static int parse_path(char **arr, char *dirname)$/;"	f	typeref:typename:int	file:
parse_phy_pins	drivers/net/sun8i_emac.c	/^static int parse_phy_pins(struct udevice *dev)$/;"	f	typeref:typename:int	file:
parse_pixclock	board/compulab/common/omap3_display.c	/^static int parse_pixclock(char *pixclock)$/;"	f	typeref:typename:int	file:
parse_printenv_args	tools/env/fw_env_main.c	/^int parse_printenv_args(int argc, char *argv[])$/;"	f	typeref:typename:int
parse_putc	drivers/video/cfb_console.c	/^static void parse_putc(const char c)$/;"	f	typeref:typename:void	file:
parse_pxefile	cmd/pxe.c	/^static struct pxe_menu *parse_pxefile(cmd_tbl_t *cmdtp, unsigned long menucfg)$/;"	f	typeref:struct:pxe_menu *	file:
parse_pxefile_top	cmd/pxe.c	/^static int parse_pxefile_top(cmd_tbl_t *cmdtp, char *p, unsigned long base,$/;"	f	typeref:typename:int	file:
parse_setenv_args	tools/env/fw_env_main.c	/^int parse_setenv_args(int argc, char *argv[])$/;"	f	typeref:typename:int
parse_setting	board/compulab/common/omap3_display.c	/^static int parse_setting(char *setting)$/;"	f	typeref:typename:int	file:
parse_sliteral	cmd/pxe.c	/^static int parse_sliteral(char **c, char **dst)$/;"	f	typeref:typename:int	file:
parse_spl_header	board/sunxi/board.c	/^static void parse_spl_header(const uint32_t spl_addr)$/;"	f	typeref:typename:void	file:
parse_standard_option	fs/ubifs/super.c	/^static int parse_standard_option(const char *option)$/;"	f	typeref:typename:int	file:
parse_stream	common/cli_hush.c	/^static int parse_stream(o_string *dest, struct p_context *ctx,$/;"	f	typeref:typename:int	file:
parse_stream_outer	common/cli_hush.c	/^static int parse_stream_outer(struct in_str *inp, int flag)$/;"	f	typeref:typename:int	file:
parse_string	common/cli_hush.c	/^int parse_string(o_string *dest, struct p_context *ctx, const char *src)$/;"	f	typeref:typename:int
parse_string_outer	common/cli_hush.c	/^static int parse_string_outer(const char *s, int flag)$/;"	f	typeref:typename:int	file:
parse_val_and_cond	tools/buildman/kconfiglib.py	/^        def parse_val_and_cond(tokens, line, filename, linenr):$/;"	f	member:Config._parse_properties	file:
parse_verify_sum	cmd/md5sum.c	/^static int parse_verify_sum(char *verify_str, u8 *vsum)$/;"	f	typeref:typename:int	file:
parse_verify_sum	common/hash.c	/^static int parse_verify_sum(struct hash_algo *algo, char *verify_str,$/;"	f	typeref:typename:int	file:
parser	tools/dtoc/dtoc	/^parser = OptionParser()$/;"	v
parser	tools/dtoc/dtoc.py	/^parser = OptionParser()$/;"	v
parser	tools/patman/patman	/^parser = OptionParser()$/;"	v
parser	tools/patman/patman.py	/^parser = OptionParser()$/;"	v
part	common/fb_nand.c	/^	struct part_info	*part;$/;"	m	struct:fb_nand_sparse	typeref:struct:part_info *	file:
part	include/dfu.h	/^	unsigned int part;$/;"	m	struct:mmc_internal_data	typeref:typename:unsigned int
part	include/dfu.h	/^	unsigned int part;$/;"	m	struct:nand_internal_data	typeref:typename:unsigned int
partOffset	fs/jffs2/jffs2_nand_private.h	/^	char *partOffset;$/;"	m	struct:b_lists	typeref:typename:char *
part_add	cmd/mtdparts.c	/^static int part_add(struct mtd_device *dev, struct part_info *part)$/;"	f	typeref:typename:int	file:
part_attr	include/mmc.h	/^	u8 part_attr;$/;"	m	struct:mmc	typeref:typename:u8
part_block_isbad	drivers/mtd/mtdpart.c	/^static int part_block_isbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
part_block_isreserved	drivers/mtd/mtdpart.c	/^static int part_block_isreserved(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
part_block_markbad	drivers/mtd/mtdpart.c	/^static int part_block_markbad(struct mtd_info *mtd, loff_t ofs)$/;"	f	typeref:typename:int	file:
part_config	include/mmc.h	/^	char part_config;$/;"	m	struct:mmc	typeref:typename:char
part_del	cmd/mtdparts.c	/^static int part_del(struct mtd_device *dev, struct part_info *part)$/;"	f	typeref:typename:int	file:
part_delall	cmd/mtdparts.c	/^static void part_delall(struct list_head *head)$/;"	f	typeref:typename:void	file:
part_driver	include/part.h	/^struct part_driver {$/;"	s
part_driver_lookup_type	disk/part.c	/^static struct part_driver *part_driver_lookup_type(int part_type)$/;"	f	typeref:struct:part_driver *	file:
part_erase	drivers/mtd/mtdpart.c	/^static int part_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int	file:
part_get_fact_prot_info	drivers/mtd/mtdpart.c	/^static int part_get_fact_prot_info(struct mtd_info *mtd, size_t len,$/;"	f	typeref:typename:int	file:
part_get_info	disk/part.c	/^int part_get_info(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int
part_get_info	include/part.h	/^static inline int part_get_info(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int
part_get_info_amiga	disk/part_amiga.c	/^static int part_get_info_amiga(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int	file:
part_get_info_by_name	disk/part.c	/^int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,$/;"	f	typeref:typename:int
part_get_info_by_name_or_alias	common/fb_mmc.c	/^static int part_get_info_by_name_or_alias(struct blk_desc *dev_desc,$/;"	f	typeref:typename:int	file:
part_get_info_dos	disk/part_dos.c	/^int part_get_info_dos(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int
part_get_info_efi	disk/part_efi.c	/^int part_get_info_efi(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int
part_get_info_extended	disk/part_dos.c	/^static int part_get_info_extended(struct blk_desc *dev_desc,$/;"	f	typeref:typename:int	file:
part_get_info_iso	disk/part_iso.c	/^static int part_get_info_iso(struct blk_desc *dev_desc, int part_num,$/;"	f	typeref:typename:int	file:
part_get_info_iso_verb	disk/part_iso.c	/^int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num,$/;"	f	typeref:typename:int
part_get_info_mac	disk/part_mac.c	/^static int part_get_info_mac(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int	file:
part_get_info_ptr	include/part.h	/^#  define part_get_info_ptr(/;"	d
part_get_info_ptr	include/part.h	/^#define part_get_info_ptr(/;"	d
part_get_unmapped_area	drivers/mtd/mtdpart.c	/^static unsigned long part_get_unmapped_area(struct mtd_info *mtd,$/;"	f	typeref:typename:unsigned long	file:
part_get_user_prot_info	drivers/mtd/mtdpart.c	/^static int part_get_user_prot_info(struct mtd_info *mtd, size_t len,$/;"	f	typeref:typename:int	file:
part_info	fs/ext4/dev.c	/^static disk_partition_t *part_info;$/;"	v	typeref:typename:disk_partition_t *	file:
part_info	fs/reiserfs/dev.c	/^static disk_partition_t *part_info;$/;"	v	typeref:typename:disk_partition_t *	file:
part_info	fs/zfs/dev.c	/^static disk_partition_t *part_info;$/;"	v	typeref:typename:disk_partition_t *	file:
part_info	include/jffs2/load_kernel.h	/^struct part_info {$/;"	s
part_init	disk/part.c	/^void part_init(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void
part_init	include/part.h	/^static inline void part_init(struct blk_desc *dev_desc) {}$/;"	f	typeref:typename:void
part_is_locked	drivers/mtd/mtdpart.c	/^static int part_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
part_length	include/zfs_common.h	/^	uint64_t part_length;$/;"	m	struct:device_s	typeref:typename:uint64_t
part_lock	drivers/mtd/mtdpart.c	/^static int part_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
part_lock_user_prot_reg	drivers/mtd/mtdpart.c	/^static int part_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
part_mac_read_ddb	disk/part_mac.c	/^static int part_mac_read_ddb(struct blk_desc *dev_desc,$/;"	f	typeref:typename:int	file:
part_mac_read_pdb	disk/part_mac.c	/^static int part_mac_read_pdb(struct blk_desc *dev_desc, int part,$/;"	f	typeref:typename:int	file:
part_name	cmd/ubi.c	/^	char part_name[80];$/;"	m	struct:selected_dev	typeref:typename:char[80]	file:
part_number	include/smbios.h	/^	u8 part_number;$/;"	m	struct:smbios_type4	typeref:typename:u8
part_number_idx	arch/x86/include/asm/coreboot_tables.h	/^	u8 part_number_idx;$/;"	m	struct:cb_mainboard	typeref:typename:u8
part_offset	fs/ext4/dev.c	/^lbaint_t part_offset;$/;"	v	typeref:typename:lbaint_t
part_pad	disk/part_mac.h	/^	__u16	part_pad[188];	\/* reserved				*\/$/;"	m	struct:mac_partition	typeref:typename:__u16[188]
part_panic_write	drivers/mtd/mtdpart.c	/^static int part_panic_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
part_parse	cmd/mtdparts.c	/^static int part_parse(const char *const partdef, const char **ret, struct part_info **retpart)$/;"	f	typeref:typename:int	file:
part_point	drivers/mtd/mtdpart.c	/^static int part_point(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
part_print	disk/part.c	/^void part_print(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void
part_print	include/part.h	/^static inline void part_print(struct blk_desc *dev_desc) {}$/;"	f	typeref:typename:void
part_print_amiga	disk/part_amiga.c	/^static void part_print_amiga(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void	file:
part_print_dos	disk/part_dos.c	/^void part_print_dos(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void
part_print_efi	disk/part_efi.c	/^void part_print_efi(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void
part_print_iso	disk/part_iso.c	/^static void part_print_iso(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void	file:
part_print_mac	disk/part_mac.c	/^static void part_print_mac(struct blk_desc *dev_desc)$/;"	f	typeref:typename:void	file:
part_print_ptr	include/part.h	/^# define part_print_ptr(/;"	d
part_print_ptr	include/part.h	/^#define part_print_ptr(/;"	d
part_probe_types	include/linux/mtd/nand.h	/^	const char **part_probe_types;$/;"	m	struct:platform_nand_chip	typeref:typename:const char **
part_read	drivers/mtd/mtdpart.c	/^static int part_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
part_read_fact_prot_reg	drivers/mtd/mtdpart.c	/^static int part_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
part_read_oob	drivers/mtd/mtdpart.c	/^static int part_read_oob(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
part_read_user_prot_reg	drivers/mtd/mtdpart.c	/^static int part_read_user_prot_reg(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
part_resume	drivers/mtd/mtdpart.c	/^static void part_resume(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
part_set_generic_name	disk/part.c	/^void part_set_generic_name(const struct blk_desc *dev_desc,$/;"	f	typeref:typename:void
part_sort_add	cmd/mtdparts.c	/^static int part_sort_add(struct mtd_device *dev, struct part_info *part)$/;"	f	typeref:typename:int	file:
part_support	include/mmc.h	/^	u8 part_support;$/;"	m	struct:mmc	typeref:typename:u8
part_suspend	drivers/mtd/mtdpart.c	/^static int part_suspend(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
part_sync	drivers/mtd/mtdpart.c	/^static void part_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
part_table	board/nokia/rx51/tag_omap.h	/^	char part_table[0];$/;"	m	struct:omap_flash_part_str_config	typeref:typename:char[0]
part_test_amiga	disk/part_amiga.c	/^static int part_test_amiga(struct blk_desc *dev_desc)$/;"	f	typeref:typename:int	file:
part_test_dos	disk/part_dos.c	/^static int part_test_dos(struct blk_desc *dev_desc)$/;"	f	typeref:typename:int	file:
part_test_efi	disk/part_efi.c	/^static int part_test_efi(struct blk_desc *dev_desc)$/;"	f	typeref:typename:int	file:
part_test_iso	disk/part_iso.c	/^static int part_test_iso(struct blk_desc *dev_desc)$/;"	f	typeref:typename:int	file:
part_test_mac	disk/part_mac.c	/^static int part_test_mac(struct blk_desc *dev_desc)$/;"	f	typeref:typename:int	file:
part_type	include/blk.h	/^	unsigned char	part_type;	\/* partition type *\/$/;"	m	struct:blk_desc	typeref:typename:unsigned char
part_type	include/mmc.h	/^	unsigned char part_type;$/;"	m	struct:mmc_config	typeref:typename:unsigned char
part_type	include/part.h	/^	int part_type;$/;"	m	struct:part_driver	typeref:typename:int
part_unlock	drivers/mtd/mtdpart.c	/^static int part_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)$/;"	f	typeref:typename:int	file:
part_unpoint	drivers/mtd/mtdpart.c	/^static int part_unpoint(struct mtd_info *mtd, loff_t from, size_t len)$/;"	f	typeref:typename:int	file:
part_validate	cmd/mtdparts.c	/^static int part_validate(struct mtdids *id, struct part_info *part)$/;"	f	typeref:typename:int	file:
part_validate_eraseblock	cmd/mtdparts.c	/^static int part_validate_eraseblock(struct mtdids *id, struct part_info *part)$/;"	f	typeref:typename:int	file:
part_write	drivers/mtd/mtdpart.c	/^static int part_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
part_write_oob	drivers/mtd/mtdpart.c	/^static int part_write_oob(struct mtd_info *mtd, loff_t to,$/;"	f	typeref:typename:int	file:
part_write_user_prot_reg	drivers/mtd/mtdpart.c	/^static int part_write_user_prot_reg(struct mtd_info *mtd, loff_t from,$/;"	f	typeref:typename:int	file:
part_writev	drivers/mtd/mtdpart.c	/^static int part_writev(struct mtd_info *mtd, const struct kvec *vecs,$/;"	f	typeref:typename:int	file:
partial	lib/lz4.c	/^typedef enum { full = 0, partial = 1 } earlyEnd_directive;$/;"	e	enum:__anoneaf05ef60303	file:
partial_name_hash	fs/jffs2/jffs2_nand_private.h	/^partial_name_hash(unsigned long c, unsigned long prevhash)$/;"	f	typeref:typename:unsigned long
partid	arch/powerpc/cpu/mpc83xx/cpu.c	/^		u32 partid;$/;"	m	struct:checkcpu::cpu_type	typeref:typename:u32	file:
partition	board/nokia/rx51/tag_omap.h	/^		struct omap_partition_config partition;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_partition_config
partition	include/part_efi.h	/^struct partition {$/;"	s
partition_block	disk/part_amiga.h	/^struct partition_block$/;"	s
partition_entry_array_crc32	include/part_efi.h	/^	__le32 partition_entry_array_crc32;$/;"	m	struct:_gpt_header	typeref:typename:__le32
partition_entry_lba	include/part_efi.h	/^	__le64 partition_entry_lba;$/;"	m	struct:_gpt_header	typeref:typename:__le64
partition_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t partition_id;$/;"	m	struct:mrq_pg_read_state_request	typeref:typename:uint32_t
partition_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t partition_id;$/;"	m	struct:mrq_pg_update_state_request	typeref:typename:uint32_t
partition_list	disk/part_amiga.h	/^    u32 partition_list;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
partition_name	include/part_efi.h	/^	efi_char16_t partition_name[PARTNAME_SZ];$/;"	m	struct:_gpt_entry	typeref:typename:efi_char16_t[]
partition_record	include/part_efi.h	/^	struct partition partition_record[4];$/;"	m	struct:_legacy_mbr	typeref:struct:partition[4]
partition_regs	arch/powerpc/include/asm/immap_85xx.h	/^	} partition_regs[16];$/;"	m	struct:cpc_corenet	typeref:struct:cpc_corenet::__anondcd7518a0208[16]
partition_type_guid	include/part_efi.h	/^	efi_guid_t partition_type_guid;$/;"	m	struct:_gpt_entry	typeref:typename:efi_guid_t
partitions	include/linux/mtd/nand.h	/^	struct mtd_partition *partitions;$/;"	m	struct:platform_nand_chip	typeref:struct:mtd_partition *
partloc_BE	disk/part_iso.h	/^	unsigned int partloc_BE;		\/* volume partition location BE *\/$/;"	m	struct:iso_part_rec	typeref:typename:unsigned int
partloc_LE	disk/part_iso.h	/^	unsigned int partloc_LE;		\/* volume partition location LE *\/$/;"	m	struct:iso_part_rec	typeref:typename:unsigned int
parts	drivers/mtd/nand/pxa3xx_nand.h	/^	const struct mtd_partition		*parts[NUM_CHIP_SELECT];$/;"	m	struct:pxa3xx_nand_platform_data	typeref:typename:const struct mtd_partition * []
parts	include/jffs2/load_kernel.h	/^	struct list_head parts;		\/* partitions *\/$/;"	m	struct:mtd_device	typeref:struct:list_head
partsiz_BE	disk/part_iso.h	/^	unsigned int partsiz_BE;		\/* volume partition size BE *\/$/;"	m	struct:iso_part_rec	typeref:typename:unsigned int
partsiz_LE	disk/part_iso.h	/^	unsigned int partsiz_LE;		\/* volume partition size LE *\/$/;"	m	struct:iso_part_rec	typeref:typename:unsigned int
pasr	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 pasr;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
pass_fail	test/fs/fs-test.sh	/^function pass_fail() {$/;"	f
pass_frame_status	include/fsl-mc/fsl_dpni.h	/^	int pass_frame_status;$/;"	m	struct:dpni_buffer_layout	typeref:typename:int
pass_parser_result	include/fsl-mc/fsl_dpni.h	/^	int pass_parser_result;$/;"	m	struct:dpni_buffer_layout	typeref:typename:int
pass_timestamp	include/fsl-mc/fsl_dpni.h	/^	int pass_timestamp;$/;"	m	struct:dpni_buffer_layout	typeref:typename:int
passive_gc_count	fs/yaffs2/yaffs_guts.h	/^	u32 passive_gc_count;$/;"	m	struct:yaffs_dev	typeref:typename:u32
passive_parallel_asynchronous	include/altera.h	/^	passive_parallel_asynchronous,$/;"	e	enum:altera_iface
passive_parallel_synchronous	include/altera.h	/^	passive_parallel_synchronous,$/;"	e	enum:altera_iface
passive_serial	include/altera.h	/^	passive_serial,$/;"	e	enum:altera_iface
passive_serial_asynchronous	include/altera.h	/^	passive_serial_asynchronous,$/;"	e	enum:altera_iface
passwd_abort	common/autoboot.c	/^static int passwd_abort(uint64_t etime)$/;"	f	typeref:typename:int	file:
past_temp11_8	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 past_temp11_8;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
past_temp15_12	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 past_temp15_12;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
past_temp3_0	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 past_temp3_0;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
past_temp7_4	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 past_temp7_4;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
pat	arch/x86/lib/physmem.c	/^	uint64_t pat:1;    \/* page-attribute table *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
pata	arch/powerpc/include/asm/immap_512x.h	/^	pata512x_t		pata;		\/* Parallel ATA *\/$/;"	m	struct:immap	typeref:typename:pata512x_t
pata512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct pata512x {$/;"	s
pata512x_t	arch/powerpc/include/asm/immap_512x.h	/^} pata512x_t;$/;"	t	typeref:struct:pata512x
pata_ata_control	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_ata_control;   \/* ATA Interface control register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_clk	arch/arm/dts/sun4i-a10.dtsi	/^		pata_clk: clk@01c200ac {$/;"	l
pata_clk	arch/arm/dts/sun7i-a20.dtsi	/^		pata_clk: clk@01c200ac {$/;"	l
pata_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pata_clk_cfg;	\/* 0xac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pata_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pata_clk_cfg;	\/* 0xac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pata_drive_alt_stat	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_alt_stat;\/* write = drive control, read = drive alt status reg *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_command	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_command; \/* write = drive command, read = drive status reg *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_cylhigh	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_cylhigh; \/* drive cylinder high register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_cyllow	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_cyllow;  \/* drive cylinder low register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_data	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_data;	\/* drive data register*\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_dev_head	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_dev_head;\/* drive device head register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_features	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_features;\/* drive features register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_sectcnt	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_sectcnt; \/* drive sector count register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_drive_sectnum	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_drive_sectnum; \/* drive sector number register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_fifo_alarm	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_fifo_alarm;	\/* fifo alarm threshold *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_fifo_data16	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_fifo_data16;   \/* 16bit wide dataport to\/from FIFO *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_fifo_data32	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_fifo_data32;   \/* 32bit wide dataport to\/from FIFO *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_fifo_fill	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_fifo_fill;	\/* FIFO filling in halfwords (READONLY)*\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_irq_clear	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_irq_clear;	\/* Interrupt clear register (WRITEONLY)*\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_irq_enable	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_irq_enable;	\/* Interrupt enable register *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_irq_pending	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_irq_pending;   \/* Interrupt pending register (READONLY) *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_time1	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_time1;		\/* Time register 1: PIO and tx timing parameter *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_time2	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_time2;		\/* Time register 2: PIO timing parameter *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_time3	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_time3;		\/* Time register 3: PIO and MDMA timing parameter *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_time4	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_time4;		\/* Time register 4: MDMA and UDMA timing parameter *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_time5	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_time5;		\/* Time register 5: UDMA timing parameter *\/$/;"	m	struct:pata512x	typeref:typename:u32
pata_time6	arch/powerpc/include/asm/immap_512x.h	/^	u32 pata_time6;		\/* Time register 6: UDMA timing parameter *\/$/;"	m	struct:pata512x	typeref:typename:u32
pataclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int pataclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
patbytes	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static uchar patbytes[ELBT_NTXBD] = {$/;"	v	typeref:typename:uchar[]	file:
patch_2000	arch/powerpc/cpu/mpc8xx/upatch.c	/^static ulong patch_2000[] = {$/;"	v	typeref:typename:ulong[]	file:
patch_2F00	arch/powerpc/cpu/mpc8xx/upatch.c	/^static ulong patch_2F00[] = {$/;"	v	typeref:typename:ulong[]	file:
patch_sectors	tools/mxsboot.c	/^	uint32_t		patch_sectors;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
patchto	lib/efi_loader/efi_runtime.c	/^	void *patchto;$/;"	m	struct:efi_runtime_detach_list_struct	typeref:typename:void *	file:
path	fs/ubifs/ubifs.h	/^struct path {$/;"	s
pathcpy	fs/fat/file.c	/^pathcpy(char *dest, const char *src)$/;"	f	typeref:typename:void	file:
pathname	drivers/usb/emul/sandbox_flash.c	/^	const char *pathname;$/;"	m	struct:sandbox_flash_plat	typeref:typename:const char *	file:
paths	arch/arm/include/asm/setup.h	/^	char paths[8][128];$/;"	m	union:param_struct::__anon61e8c52b030a	typeref:typename:char[8][128]
pathtablen_BE	disk/part_iso.h	/^	unsigned int pathtablen_BE;\/* Path Table size BE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
pathtablen_BE	disk/part_iso.h	/^	unsigned int pathtablen_BE;\/* Path Table size BE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
pathtablen_LE	disk/part_iso.h	/^	unsigned int pathtablen_LE;\/* Path Table size LE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
pathtablen_LE	disk/part_iso.h	/^	unsigned int pathtablen_LE;\/* Path Table size LE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
pati_eeprom	board/mpl/pati/pci_eeprom.h	/^static pci_eeprom pati_eeprom[] = {$/;"	v	typeref:typename:pci_eeprom[]
pati_pci_eeprom_erase	board/mpl/pati/cmd_pati.c	/^static int pati_pci_eeprom_erase(void)$/;"	f	typeref:typename:int	file:
pati_pci_eeprom_prg	board/mpl/pati/cmd_pati.c	/^static int pati_pci_eeprom_prg(void)$/;"	f	typeref:typename:int	file:
pati_pci_eeprom_read	board/mpl/pati/cmd_pati.c	/^static int pati_pci_eeprom_read(unsigned short offset, unsigned long addr, unsigned short size)$/;"	f	typeref:typename:int	file:
pati_pci_eeprom_write	board/mpl/pati/cmd_pati.c	/^static int pati_pci_eeprom_write(unsigned short offset, unsigned long addr, unsigned short size)$/;"	f	typeref:typename:int	file:
patman	test/image/test-fit.py	/^patman = os.path.join(base_path, '..\/..\/tools\/patman')$/;"	v
pattern	include/linux/mtd/bbm.h	/^	uint8_t *pattern;$/;"	m	struct:nand_bbt_descr	typeref:typename:uint8_t *
pattern	post/board/lwmon5/fpga.c	/^const static unsigned long pattern[] = {$/;"	v	typeref:typename:const unsigned long[]	file:
pattern	post/board/lwmon5/gdc.c	/^const static unsigned long pattern[] = {$/;"	v	typeref:typename:const unsigned long[]	file:
pattern	post/drivers/memory.c	/^const static unsigned long long pattern[] = {$/;"	v	typeref:typename:const unsigned long long[]	file:
pattern	scripts/kconfig/nconf.c	/^	char pattern[256];$/;"	m	struct:match_state	typeref:typename:char[256]	file:
pattern	tools/mxsimage.h	/^		uint32_t	pattern;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960808	typeref:typename:uint32_t
pattern_error_notification	test/py/u_boot_console_base.py	/^pattern_error_notification = re.compile('## Error: ')$/;"	v
pattern_error_please_reset	test/py/u_boot_console_base.py	/^pattern_error_please_reset = re.compile('### ERROR ### Please RESET the board ###')$/;"	v
pattern_info	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^struct pattern_info {$/;"	s
pattern_killer_pattern_table_map	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static u8 pattern_killer_pattern_table_map[KILLER_PATTERN_LENGTH * 2][2] = {$/;"	v	typeref:typename:u8[][2]	file:
pattern_len	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 pattern_len;$/;"	m	struct:pattern_info	typeref:typename:u8
pattern_set	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum pattern_set {$/;"	g
pattern_stop_autoboot_prompt	test/py/u_boot_console_base.py	/^pattern_stop_autoboot_prompt = re.compile('Hit any key to stop autoboot: ')$/;"	v
pattern_table_16	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^struct pattern_info pattern_table_16[] = {$/;"	v	typeref:struct:pattern_info[]
pattern_table_32	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^struct pattern_info pattern_table_32[] = {$/;"	v	typeref:struct:pattern_info[]
pattern_table_get_killer_word	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static inline u32 pattern_table_get_killer_word(u8 dqs, u8 index)$/;"	f	typeref:typename:u32	file:
pattern_table_get_killer_word16	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static inline u32 pattern_table_get_killer_word16(u8 dqs, u8 index)$/;"	f	typeref:typename:u32	file:
pattern_table_get_sso_word	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static inline u32 pattern_table_get_sso_word(u8 sso, u8 index)$/;"	f	typeref:typename:u32	file:
pattern_table_get_static_pbs_word	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static inline u32 pattern_table_get_static_pbs_word(u8 index)$/;"	f	typeref:typename:u32	file:
pattern_table_get_vref_word	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static inline u32 pattern_table_get_vref_word(u8 index)$/;"	f	typeref:typename:u32	file:
pattern_table_get_vref_word16	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static inline u32 pattern_table_get_vref_word16(u8 index)$/;"	f	typeref:typename:u32	file:
pattern_table_get_word	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^inline u32 pattern_table_get_word(u32 dev_num, enum hws_pattern type, u8 index)$/;"	f	typeref:typename:u32
pattern_type	arch/arm/mach-exynos/include/mach/dp_info.h	/^enum pattern_type {$/;"	g
pattern_u_boot_main_signon	test/py/u_boot_console_base.py	/^pattern_u_boot_main_signon = re.compile('(U-Boot \\\\d{4}\\\\.\\\\d{2}[^\\r\\n]*\\\\))')$/;"	v
pattern_u_boot_spl_signon	test/py/u_boot_console_base.py	/^pattern_u_boot_spl_signon = re.compile('(U-Boot SPL \\\\d{4}\\\\.\\\\d{2}[^\\r\\n]*\\\\))')$/;"	v
pattern_unknown_command	test/py/u_boot_console_base.py	/^pattern_unknown_command = re.compile('Unknown command \\'.*\\' - try \\'help\\'')$/;"	v
pattern_vref_pattern_table_map	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^static u8 pattern_vref_pattern_table_map[] = {$/;"	v	typeref:typename:u8[]	file:
patterns	drivers/bootcount/bootcount_ram.c	/^const ulong patterns[]      = {	0x00000000,$/;"	v	typeref:typename:const ulong[]
patterns	drivers/mtd/ubi/io.c	/^static uint8_t patterns[] = {0xa5, 0x5a, 0x0};$/;"	v	typeref:typename:uint8_t[]	file:
pattrb0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb0;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb1;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb10;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb11;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb12;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb13;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb14;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb15;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb2;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb3;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb4;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb5;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb6;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb7;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb8;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrb9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrb9;	\/* Pattern Match Attrs *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli0;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli1;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli10;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli11;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli12;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli13;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli14;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli15;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli2;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli3;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli4;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli5;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli6;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli7;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli8;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pattrbeli9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pattrbeli9;	\/* Pattern Match Attrs Extract Len & Idx *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
patwords	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static uint patwords[ELBT_NTXBD] = {$/;"	v	typeref:typename:uint[]	file:
paur	arch/m68k/include/asm/fec.h	/^	u32 paur;		\/* 0x3C4 *\/$/;"	m	struct:fec	typeref:typename:u32
paur	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 paur;		\/* 0x0E8 *\/$/;"	m	struct:fecdma	typeref:typename:u32
pause	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pause;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
pause	drivers/qe/uec_phy.h	/^	int pause;$/;"	m	struct:uec_mii_info	typeref:typename:int
pause	include/phy.h	/^	int pause;$/;"	m	struct:fixed_link	typeref:typename:int
pause	include/phy.h	/^	int pause;$/;"	m	struct:phy_device	typeref:typename:int
pause_cfg	include/vsc9953.h	/^	struct vsc9953_sys_pause_cfg	pause_cfg;$/;"	m	struct:vsc9953_system_reg	typeref:struct:vsc9953_sys_pause_cfg
pause_cfg	include/vsc9953.h	/^	u32	pause_cfg[11];$/;"	m	struct:vsc9953_sys_pause_cfg	typeref:typename:u32[11]
pause_pkt1	drivers/net/pch_gbe.h	/^	u32 pause_pkt1;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
pause_pkt2	drivers/net/pch_gbe.h	/^	u32 pause_pkt2;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
pause_pkt3	drivers/net/pch_gbe.h	/^	u32 pause_pkt3;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
pause_pkt4	drivers/net/pch_gbe.h	/^	u32 pause_pkt4;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
pause_pkt5	drivers/net/pch_gbe.h	/^	u32 pause_pkt5;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
pause_quant	include/fsl_tgec.h	/^	u32	pause_quant;	\/* Pause quanta register *\/$/;"	m	struct:tgec	typeref:typename:u32
pause_quanta	drivers/net/altera_tse.h	/^	u32 pause_quanta;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
pause_req	drivers/net/pch_gbe.h	/^	u32 pause_req;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
pause_threshold	drivers/usb/eth/mcs7830.c	/^	uint8_t pause_threshold;$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t	file:
pause_tot_cfg	include/vsc9953.h	/^	u32	pause_tot_cfg;$/;"	m	struct:vsc9953_sys_pause_cfg	typeref:typename:u32
pausefr	drivers/qe/uec.h	/^	u32   pausefr;           \/* pause frames *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
pavp	arch/x86/include/asm/me_common.h	/^	u32 pavp:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
paxic	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 paxic;	\/* port AXI config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
paxic	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 paxic;	\/* port AXI config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
payload	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	payload;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
payload	tools/kwbimage.c	/^		const char *payload;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:const char *	file:
payload	tools/mxsimage.c	/^	struct sb_boot_image_header	payload;$/;"	m	struct:sb_image_ctx	typeref:struct:sb_boot_image_header	file:
payload	tools/mxsimage.c	/^	struct sb_command		payload;$/;"	m	struct:sb_cmd_ctx	typeref:struct:sb_command	file:
payload	tools/mxsimage.c	/^	struct sb_sections_header	payload;$/;"	m	struct:sb_section_ctx	typeref:struct:sb_sections_header	file:
payload	tools/mxsimage.c	/^	uint32_t			*payload;$/;"	m	struct:sb_dcd_ctx	typeref:typename:uint32_t *	file:
payload_begin_offset	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t payload_begin_offset;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
payload_end_offset	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t payload_end_offset;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
payload_length	arch/x86/include/asm/bootparam.h	/^	__u32	payload_length;$/;"	m	struct:setup_header	typeref:typename:__u32
payload_offset	arch/x86/include/asm/bootparam.h	/^	__u32	payload_offset;$/;"	m	struct:setup_header	typeref:typename:__u32
pb	lib/lzma/LzmaDec.h	/^  unsigned lc, lp, pb;$/;"	m	struct:_CLzmaProps	typeref:typename:unsigned
pb_cpu_to_io	arch/nios2/dts/3c120_devboard.dts	/^		pb_cpu_to_io: bridge@0x8000000 {$/;"	l
pb_dbug	board/keymile/common/common.h	/^	u8	pb_dbug;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
pbat	include/power/pmic.h	/^	struct power_battery *pbat;$/;"	m	struct:pmic	typeref:struct:power_battery *
pbbpr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	pbbpr;		\/* 0x20 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
pbcnt	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pbcnt = $mbar - 1 + 0x088$/;"	t
pbcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pbcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pbcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pbcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pbcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pbcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pbdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pbdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pbdat	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pbdat = $mbar - 1 + 0x08e$/;"	t
pbddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pbddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pbddr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pbddr = $mbar - 1 + 0x08c$/;"	t
pbdr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pbdr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pbdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pbdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pbdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pbdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pberr	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pberr;	\/* port 0\/1 BIST error *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pberr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pberr;	\/* port 0\/1 BIST error *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pbi_completion	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 pbi_completion;		\/* 0x114 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
pbi_crc_cmd1	tools/pblimage.c	/^static uint32_t pbi_crc_cmd1;$/;"	v	typeref:typename:uint32_t	file:
pbi_crc_cmd2	tools/pblimage.c	/^static uint32_t pbi_crc_cmd2;$/;"	v	typeref:typename:uint32_t	file:
pbi_reqr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 pbi_reqr;			\/* 0x110 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
pbias_lite	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned int pbias_lite;	\/* 0x520 *\/$/;"	m	struct:t2	typeref:typename:unsigned int
pbias_mmc_reg	arch/arm/dts/dra7.dtsi	/^						pbias_mmc_reg: pbias_mmc_omap5 {$/;"	l	label:l4_cfg.scm.scm_conf.pbias_regulator
pbias_regulator	arch/arm/dts/dra7.dtsi	/^					pbias_regulator: pbias_regulator {$/;"	l	label:l4_cfg.scm.scm_conf
pbictl0	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbictl0;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbictl1	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbictl1;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbictl2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbictl2;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbictl3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbictl3;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbiinten	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbiinten;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbiintfr	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbiintfr;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbint	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct gpio_int pbint;$/;"	m	struct:gpio_regs	typeref:struct:gpio_int
pbirev	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	pbirev;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
pbl_cmd_initaddr	tools/pblimage.c	/^static uint32_t pbl_cmd_initaddr;$/;"	v	typeref:typename:uint32_t	file:
pbl_crc32	tools/pbl_crc32.c	/^uint32_t pbl_crc32(uint32_t in_crc, const char *buf, uint32_t len)$/;"	f	typeref:typename:uint32_t
pbl_end_cmd	tools/pblimage.c	/^static uint32_t pbl_end_cmd[4];$/;"	v	typeref:typename:uint32_t[4]	file:
pbl_fget	tools/pblimage.c	/^static void pbl_fget(size_t size, FILE *stream)$/;"	f	typeref:typename:void	file:
pbl_header	tools/pblimage.h	/^struct pbl_header {$/;"	s
pbl_load_uboot	tools/pblimage.c	/^void pbl_load_uboot(int ifd, struct image_tool_params *params)$/;"	f	typeref:typename:void
pbl_parser	tools/pblimage.c	/^static void pbl_parser(char *name)$/;"	f	typeref:typename:void	file:
pbl_size	tools/pblimage.c	/^static int pbl_size;$/;"	v	typeref:typename:int	file:
pblimage_check_image_types	tools/pblimage.c	/^static int pblimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
pblimage_check_params	tools/pblimage.c	/^int pblimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
pblimage_header	tools/pblimage.c	/^static struct pbl_header pblimage_header;$/;"	v	typeref:struct:pbl_header	file:
pblimage_print_header	tools/pblimage.c	/^static void pblimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
pblimage_set_header	tools/pblimage.c	/^static void pblimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
pblimage_verify_header	tools/pblimage.c	/^static int pblimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
pblsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pblsr;		\/* Preboot loader status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pbs_dir	drivers/ddr/marvell/a38x/ddr3_training_ip_pbs.h	/^enum pbs_dir {$/;"	g
pbs_dq_mapping	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 pbs_dq_mapping[PUP_NUM_64BIT + 1][DQ_NUM] = {$/;"	v	typeref:typename:u32[][]
pbs_dq_mapping	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 pbs_dq_mapping[PUP_NUM_64BIT + 1][DQ_NUM] = {$/;"	v	typeref:typename:u32[][]
pbs_locked_dm	drivers/ddr/marvell/axp/ddr3_sdram.c	/^u32 pbs_locked_dm[MAX_PUP_NUM] = { 0 };$/;"	v	typeref:typename:u32[]
pbs_locked_dq	drivers/ddr/marvell/axp/ddr3_sdram.c	/^u32 pbs_locked_dq[MAX_PUP_NUM][DQ_NUM] = { { 0 } };$/;"	v	typeref:typename:u32[][]
pbs_locked_value	drivers/ddr/marvell/axp/ddr3_sdram.c	/^u32 pbs_locked_value[MAX_PUP_NUM][DQ_NUM] = { { 0 } };$/;"	v	typeref:typename:u32[][]
pbs_pattern	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^enum hws_pattern pbs_pattern = PATTERN_VREF;$/;"	v	typeref:enum:hws_pattern
pbs_pattern_32b	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 pbs_pattern_32b[2][LEN_PBS_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[2][LEN_PBS_PATTERN]__aligned (32)
pbs_pattern_32b	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 pbs_pattern_32b[2][LEN_PBS_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[2][LEN_PBS_PATTERN]__aligned (32)
pbs_pattern_64b	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 pbs_pattern_64b[2][LEN_PBS_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[2][LEN_PBS_PATTERN]__aligned (32)
pbs_pattern_64b	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 pbs_pattern_64b[2][LEN_PBS_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[2][LEN_PBS_PATTERN]__aligned (32)
pbsdelay_per_pup	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u32 pbsdelay_per_pup[NUM_OF_PBS_MODES][MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u32[][][]
pbuf	drivers/net/ftmac110.h	/^	uint32_t pbuf;$/;"	m	struct:ftmac110_desc	typeref:typename:uint32_t
pbuf	drivers/net/ne2000_base.c	/^static u8 *pbuf = NULL;$/;"	v	typeref:typename:u8 *	file:
pbup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pbup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pc	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 pc;			\/* Prescale Counter		*\/$/;"	m	struct:timer_regs	typeref:typename:u32
pc	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long pc;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
pc	arch/avr32/include/asm/processor.h	/^	unsigned long pc;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
pc	arch/avr32/include/asm/ptrace.h	/^	unsigned long pc;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
pc	arch/blackfin/include/asm/ptrace.h	/^	long pc;		\/* PC == RETI *\/$/;"	m	struct:pt_regs	typeref:typename:long
pc	arch/m68k/include/asm/ptrace.h	/^	unsigned long pc;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
pc	arch/microblaze/include/asm/ptrace.h	/^	microblaze_reg_t pc;		\/* program counter *\/$/;"	m	struct:pt_regs	typeref:typename:microblaze_reg_t
pc	arch/openrisc/include/asm/ptrace.h	/^	long  pc;$/;"	m	struct:pt_regs	typeref:typename:long
pc	arch/openrisc/include/asm/ptrace.h	/^	unsigned long pc;$/;"	m	struct:user_regs_struct	typeref:typename:unsigned long
pc	arch/sh/include/asm/ptrace.h	/^	unsigned long pc;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
pc	arch/sparc/include/asm/ptrace.h	/^	unsigned long pc;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
pc	arch/xtensa/include/asm/ptrace.h	/^	unsigned long pc;		\/*   4 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
pc	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pc=0x20000$/;"	t
pc	include/linux/mtd/fsmc_nand.h	/^	u32 pc;				\/* 0x40 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
pc0	drivers/spi/davinci_spi.c	/^	dv_reg	pc0;		\/* 0x14 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
pc1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pc1;		\/* PMAN Control Register 1 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pc1	drivers/spi/davinci_spi.c	/^	dv_reg	pc1;		\/* 0x18 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
pc2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pc2;		\/* PMAN Control Register 2 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pc2	drivers/spi/davinci_spi.c	/^	dv_reg	pc2;		\/* 0x1c *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
pc3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pc3;		\/* PMAN Control Register 3 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pc3	drivers/spi/davinci_spi.c	/^	dv_reg	pc3;		\/* 0x20 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
pc4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pc4;		\/* PMAN Control Register 4 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pc4	drivers/spi/davinci_spi.c	/^	dv_reg	pc4;		\/* 0x24 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
pc5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pc5;		\/* PMAN Control Register 5 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pc5	drivers/spi/davinci_spi.c	/^	dv_reg	pc5;		\/* 0x28 *\/$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg	file:
pc6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pc6;		\/* PMAN Control Register 6 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pc_cnt	fs/ubifs/debug.h	/^	unsigned int pc_cnt;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int
pc_cnt_max	fs/ubifs/debug.h	/^	unsigned int pc_cnt_max;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int
pc_delay	fs/ubifs/debug.h	/^	int pc_delay;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
pc_happened	fs/ubifs/debug.h	/^	int pc_happened;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
pc_pointer	arch/arm/include/asm/ptrace.h	/^#define pc_pointer(/;"	d
pc_timeout	fs/ubifs/debug.h	/^	unsigned long pc_timeout;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned long
pca0_pins	arch/arm/dts/armada-388-gp.dts	/^	pca0_pins: pca0_pins {$/;"	l
pca953x_chip_ngpio	drivers/gpio/pca953x.c	/^struct pca953x_chip_ngpio {$/;"	s	file:
pca953x_chip_ngpios	drivers/gpio/pca953x.c	/^static struct pca953x_chip_ngpio pca953x_chip_ngpios[] =$/;"	v	typeref:struct:pca953x_chip_ngpio[]	file:
pca953x_direction_input	drivers/gpio/pca953x_gpio.c	/^static int pca953x_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pca953x_direction_output	drivers/gpio/pca953x_gpio.c	/^static int pca953x_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
pca953x_get_function	drivers/gpio/pca953x_gpio.c	/^static int pca953x_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pca953x_get_val	drivers/gpio/pca953x.c	/^int pca953x_get_val(uint8_t chip)$/;"	f	typeref:typename:int
pca953x_get_value	drivers/gpio/pca953x_gpio.c	/^static int pca953x_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pca953x_ids	drivers/gpio/pca953x_gpio.c	/^static const struct udevice_id pca953x_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pca953x_info	drivers/gpio/pca953x.c	/^static int pca953x_info(uint8_t chip)$/;"	f	typeref:typename:int	file:
pca953x_info	drivers/gpio/pca953x_gpio.c	/^struct pca953x_info {$/;"	s	file:
pca953x_is_output	drivers/gpio/pca953x_gpio.c	/^static int pca953x_is_output(struct udevice *dev, int offset)$/;"	f	typeref:typename:int	file:
pca953x_ngpio	drivers/gpio/pca953x.c	/^static int pca953x_ngpio(uint8_t chip)$/;"	f	typeref:typename:int	file:
pca953x_ops	drivers/gpio/pca953x_gpio.c	/^static const struct dm_gpio_ops pca953x_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
pca953x_probe	drivers/gpio/pca953x_gpio.c	/^static int pca953x_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pca953x_read_regs	drivers/gpio/pca953x_gpio.c	/^static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val)$/;"	f	typeref:typename:int	file:
pca953x_read_single	drivers/gpio/pca953x_gpio.c	/^static int pca953x_read_single(struct udevice *dev, int reg, u8 *val,$/;"	f	typeref:typename:int	file:
pca953x_reg_read	drivers/gpio/pca953x.c	/^static int pca953x_reg_read(uint8_t chip, uint addr, uint *data)$/;"	f	typeref:typename:int	file:
pca953x_reg_write	drivers/gpio/pca953x.c	/^static int pca953x_reg_write(uint8_t chip, uint addr, uint mask, uint data)$/;"	f	typeref:typename:int	file:
pca953x_set_dir	drivers/gpio/pca953x.c	/^int pca953x_set_dir(uint8_t chip, uint mask, uint data)$/;"	f	typeref:typename:int
pca953x_set_direction	drivers/gpio/pca953x_gpio.c	/^static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir)$/;"	f	typeref:typename:int	file:
pca953x_set_pol	drivers/gpio/pca953x.c	/^int pca953x_set_pol(uint8_t chip, uint mask, uint data)$/;"	f	typeref:typename:int
pca953x_set_val	drivers/gpio/pca953x.c	/^int pca953x_set_val(uint8_t chip, uint mask, uint data)$/;"	f	typeref:typename:int
pca953x_set_value	drivers/gpio/pca953x_gpio.c	/^static int pca953x_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
pca953x_write_single	drivers/gpio/pca953x_gpio.c	/^static int pca953x_write_single(struct udevice *dev, int reg, u8 val,$/;"	f	typeref:typename:int	file:
pca953x_xlate	drivers/gpio/pca953x_gpio.c	/^static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
pca9547	arch/arm/dts/ls1021a-qds.dtsi	/^	pca9547: mux@77 {$/;"	l
pca954x_deselect	drivers/i2c/muxes/pca954x.c	/^static int pca954x_deselect(struct udevice *mux, struct udevice *bus,$/;"	f	typeref:typename:int	file:
pca954x_ids	drivers/i2c/muxes/pca954x.c	/^static const struct udevice_id pca954x_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pca954x_ofdata_to_platdata	drivers/i2c/muxes/pca954x.c	/^static int pca954x_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pca954x_ops	drivers/i2c/muxes/pca954x.c	/^static const struct i2c_mux_ops pca954x_ops = {$/;"	v	typeref:typename:const struct i2c_mux_ops	file:
pca954x_priv	drivers/i2c/muxes/pca954x.c	/^struct pca954x_priv {$/;"	s	file:
pca954x_select	drivers/i2c/muxes/pca954x.c	/^static int pca954x_select(struct udevice *mux, struct udevice *bus,$/;"	f	typeref:typename:int	file:
pca9551_blink_rate	drivers/misc/pca9551_led.c	/^struct pca9551_blink_rate {$/;"	s	file:
pca9551_led_get_state	drivers/misc/pca9551_led.c	/^static int pca9551_led_get_state(int led, int *state)$/;"	f	typeref:typename:int	file:
pca9551_led_set_blink_rate	drivers/misc/pca9551_led.c	/^static int pca9551_led_set_blink_rate(int idx, struct pca9551_blink_rate rate)$/;"	f	typeref:typename:int	file:
pca9551_led_set_state	drivers/misc/pca9551_led.c	/^static int pca9551_led_set_state(int led, int state)$/;"	f	typeref:typename:int	file:
pca9698_direction_input	drivers/gpio/pca9698.c	/^int pca9698_direction_input(u8 addr, unsigned gpio)$/;"	f	typeref:typename:int
pca9698_direction_output	drivers/gpio/pca9698.c	/^int pca9698_direction_output(u8 addr, unsigned gpio, int value)$/;"	f	typeref:typename:int
pca9698_free	drivers/gpio/pca9698.c	/^void pca9698_free(unsigned gpio)$/;"	f	typeref:typename:void
pca9698_get_value	drivers/gpio/pca9698.c	/^int pca9698_get_value(u8 addr, unsigned gpio)$/;"	f	typeref:typename:int
pca9698_read40	drivers/gpio/pca9698.c	/^static int pca9698_read40(u8 addr, u8 offset, u8 *buffer)$/;"	f	typeref:typename:int	file:
pca9698_request	drivers/gpio/pca9698.c	/^int pca9698_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
pca9698_set_bit	drivers/gpio/pca9698.c	/^static void pca9698_set_bit(unsigned gpio, u8 *buffer, unsigned value)$/;"	f	typeref:typename:void	file:
pca9698_set_value	drivers/gpio/pca9698.c	/^int pca9698_set_value(u8 addr, unsigned gpio, int value)$/;"	f	typeref:typename:int
pca9698_write40	drivers/gpio/pca9698.c	/^static int pca9698_write40(u8 addr, u8 offset, u8 *buffer)$/;"	f	typeref:typename:int	file:
pca_read_reg	drivers/i2c/pca9564_i2c.c	/^static unsigned char pca_read_reg(unsigned int reg)$/;"	f	typeref:typename:unsigned char	file:
pca_wait_busy	drivers/i2c/pca9564_i2c.c	/^static int pca_wait_busy(void)$/;"	f	typeref:typename:int	file:
pca_write_reg	drivers/i2c/pca9564_i2c.c	/^static void pca_write_reg(unsigned int reg, unsigned char value)$/;"	f	typeref:typename:void	file:
pcap	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcap;		\/* PMAN Capabilities Register *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pcap_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	lqspi_clk, smc_clk, pcap_clk, gem0_clk, gem1_clk,$/;"	e	enum:zynq_clk
pcap_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 pcap_clk_ctrl; \/* 0x168 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
pcattribute	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pcattribute;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
pcba_rev	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 pcba_rev;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
pcba_ver	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 pcba_ver;		\/* pcb revision number *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
pcba_ver	board/freescale/ls1043ardb/cpld.h	/^	u8 pcba_ver;		\/* 0x2 - PCBA Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
pcba_ver	board/freescale/ls1046ardb/cpld.h	/^	u8 pcba_ver;		\/* 0x2 - PCBA Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
pcba_ver	board/freescale/p1010rdb/p1010rdb.c	/^	u8 pcba_ver; \/* pcb revision number *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
pcba_ver	board/freescale/p2041rdb/cpld.h	/^	u8 pcba_ver;		\/* 0x2 - PCBA Revision Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
pccommon	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pccommon;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
pccon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pccon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pccr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 pccr;		\/* 0x2C PWM Contrast Control Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
pccr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pccr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pccr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pccr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pccr0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pccr0;	\/* Peripheral Clock Control Register 0 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
pccr1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pccr1;	\/* Peripheral Clock Control Register 1 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
pccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pccsr;	\/* Port Control CSR *\/$/;"	m	struct:rio_lp_serial_port	typeref:typename:u32
pccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pccsr;		\/* 0xc015c - Port Control Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pcctl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short pcctl;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
pcd	arch/x86/lib/physmem.c	/^	uint64_t pcd:1;    \/* page-level cache disable *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
pcd	arch/x86/lib/physmem.c	/^	uint64_t pcd:1;$/;"	m	struct:pdpe	typeref:typename:uint64_t:1	file:
pcdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pcdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pcdat	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pcdat = $mbar - 1 + 0x096$/;"	t
pcddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pcddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pcddr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pcddr = $mbar - 1 + 0x094$/;"	t
pcdr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pcdr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pcdr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pcdr[4];	\/* PER Clock Dividers *\/$/;"	m	struct:ccm_regs	typeref:typename:u32[4]
pcdr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcdr;		\/* 0x14 Peripheral Clock Disable Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pcdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pcdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pcdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pcdr0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pcdr0;	\/* Peripheral Clock Divider Register 0 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
pcdr1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pcdr1;	\/* Peripheral Clock Divider Register 1 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
pcdr1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcdr1;		\/* 0x104 Periperial Clock Disable Register 1 *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcell_id0	drivers/mmc/arm_pl180_mmci.h	/^	u32 pcell_id0;		\/* 0xFF0*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
pcell_id1	drivers/mmc/arm_pl180_mmci.h	/^	u32 pcell_id1;		\/* 0xFF4*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
pcell_id2	drivers/mmc/arm_pl180_mmci.h	/^	u32 pcell_id2;		\/* 0xFF8*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
pcell_id3	drivers/mmc/arm_pl180_mmci.h	/^	u32 pcell_id3;		\/* 0xFFC*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
pcellid0	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int pcellid0;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
pcellid0	include/linux/mtd/fsmc_nand.h	/^	u32 pcellid0;			\/* 0xff0 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
pcellid1	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int pcellid1;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
pcellid1	include/linux/mtd/fsmc_nand.h	/^	u32 pcellid1;			\/* 0xff4 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
pcellid2	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int pcellid2;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
pcellid2	include/linux/mtd/fsmc_nand.h	/^	u32 pcellid2;			\/* 0xff8 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
pcellid3	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int pcellid3;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
pcellid3	include/linux/mtd/fsmc_nand.h	/^	u32 pcellid3;			\/* 0xffc *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
pcer	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcer;		\/* 0x10 Peripheral Clock Enable Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcer1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcer1;		\/* 0x100 Periperial Clock Enable Register 1 *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcf8563	arch/arm/dts/sun5i-a13-empire-electronix-d709.dts	/^	pcf8563: rtc@51 {$/;"	l
pcf8563	arch/arm/dts/sun5i-a13-hsg-h702.dts	/^	pcf8563: rtc@51 {$/;"	l
pcf8563	arch/arm/dts/sun5i-a13-inet-98v-rev2.dts	/^	pcf8563: rtc@51 {$/;"	l
pcf8563	arch/arm/dts/sun5i-q8-common.dtsi	/^	pcf8563: rtc@51 {$/;"	l
pcf8563	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	pcf8563: rtc@51 {$/;"	l
pcf8563	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	pcf8563: rtc@51 {$/;"	l
pcf8575_chip	drivers/gpio/pcf8575_gpio.c	/^struct pcf8575_chip {$/;"	s	file:
pcf8575_direction_input	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pcf8575_direction_output	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_direction_output(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pcf8575_get_value	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_get_value(struct udevice *dev, unsigned int offset)$/;"	f	typeref:typename:int	file:
pcf8575_gpio_ids	drivers/gpio/pcf8575_gpio.c	/^static const struct udevice_id pcf8575_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pcf8575_gpio_ops	drivers/gpio/pcf8575_gpio.c	/^static const struct dm_gpio_ops pcf8575_gpio_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
pcf8575_gpio_probe	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_gpio_probe(struct udevice  *dev)$/;"	f	typeref:typename:int	file:
pcf8575_i2c_read_le16	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_i2c_read_le16(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pcf8575_i2c_write_le16	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_i2c_write_le16(struct udevice *dev, unsigned int word)$/;"	f	typeref:typename:int	file:
pcf8575_ofdata_platdata	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_ofdata_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pcf8575_set_value	drivers/gpio/pcf8575_gpio.c	/^static int pcf8575_set_value(struct udevice *dev, unsigned int offset,$/;"	f	typeref:typename:int	file:
pcf_gpio_21	arch/arm/dts/dra7-evm.dts	/^	pcf_gpio_21: gpio@21 {$/;"	l
pcf_gpio_21	arch/arm/dts/dra72-evm-common.dtsi	/^	pcf_gpio_21: gpio@21 {$/;"	l
pcf_hdmi	arch/arm/dts/dra72-evm-common.dtsi	/^	pcf_hdmi: pcf8575@26 {$/;"	l
pcfg	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pcfg;	\/* port config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pcfg	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pcfg;	\/* port config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pcfg_output_high	arch/arm/dts/rk3288-evb.dtsi	/^	pcfg_output_high: pcfg-output-high {$/;"	l
pcfg_output_high	arch/arm/dts/rk3288-fennec.dtsi	/^	pcfg_output_high: pcfg-output-high {$/;"	l
pcfg_output_high	arch/arm/dts/rk3288-firefly.dtsi	/^	pcfg_output_high: pcfg-output-high {$/;"	l
pcfg_output_high	arch/arm/dts/rk3288-rock2-som.dtsi	/^	pcfg_output_high: pcfg-output-high {$/;"	l
pcfg_output_high	arch/arm/dts/rk3288-veyron.dtsi	/^	pcfg_output_high: pcfg-output-high {$/;"	l
pcfg_output_low	arch/arm/dts/rk3288-evb.dtsi	/^	pcfg_output_low: pcfg-output-low {$/;"	l
pcfg_output_low	arch/arm/dts/rk3288-fennec.dtsi	/^	pcfg_output_low: pcfg-output-low {$/;"	l
pcfg_output_low	arch/arm/dts/rk3288-firefly.dtsi	/^	pcfg_output_low: pcfg-output-low {$/;"	l
pcfg_output_low	arch/arm/dts/rk3288-veyron.dtsi	/^	pcfg_output_low: pcfg-output-low {$/;"	l
pcfg_pull_down	arch/arm/dts/rk3036.dtsi	/^		pcfg_pull_down: pcfg-pull-down {$/;"	l	label:pinctrl
pcfg_pull_down	arch/arm/dts/rk3288.dtsi	/^		pcfg_pull_down: pcfg-pull-down {$/;"	l	label:pinctrl
pcfg_pull_down	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_down: pcfg-pull-down {$/;"	l	label:pinctrl
pcfg_pull_down_12ma	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_down_12ma: pcfg-pull-down-12ma {$/;"	l	label:pinctrl
pcfg_pull_down_4ma	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_down_4ma: pcfg-pull-down-4ma {$/;"	l	label:pinctrl
pcfg_pull_none	arch/arm/dts/rk3036.dtsi	/^		pcfg_pull_none: pcfg-pull-none {$/;"	l	label:pinctrl
pcfg_pull_none	arch/arm/dts/rk3288.dtsi	/^		pcfg_pull_none: pcfg-pull-none {$/;"	l	label:pinctrl
pcfg_pull_none	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_none: pcfg-pull-none {$/;"	l	label:pinctrl
pcfg_pull_none_12ma	arch/arm/dts/rk3288.dtsi	/^		pcfg_pull_none_12ma: pcfg-pull-none-12ma {$/;"	l	label:pinctrl
pcfg_pull_none_12ma	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_none_12ma: pcfg-pull-none-12ma {$/;"	l	label:pinctrl
pcfg_pull_none_13ma	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_none_13ma: pcfg-pull-none-13ma {$/;"	l	label:pinctrl
pcfg_pull_none_drv_8ma	arch/arm/dts/rk3288-fennec.dtsi	/^	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {$/;"	l
pcfg_pull_none_drv_8ma	arch/arm/dts/rk3288-miniarm.dtsi	/^	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {$/;"	l
pcfg_pull_none_drv_8ma	arch/arm/dts/rk3288-veyron.dtsi	/^	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {$/;"	l
pcfg_pull_up	arch/arm/dts/rk3036.dtsi	/^		pcfg_pull_up: pcfg-pull-up {$/;"	l	label:pinctrl
pcfg_pull_up	arch/arm/dts/rk3288.dtsi	/^		pcfg_pull_up: pcfg-pull-up {$/;"	l	label:pinctrl
pcfg_pull_up	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_up: pcfg-pull-up {$/;"	l	label:pinctrl
pcfg_pull_up_2ma	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_up_2ma: pcfg-pull-up-2ma {$/;"	l	label:pinctrl
pcfg_pull_up_8ma	arch/arm/dts/rk3399.dtsi	/^		pcfg_pull_up_8ma: pcfg-pull-up-8ma {$/;"	l	label:pinctrl
pcfg_pull_up_drv_8ma	arch/arm/dts/rk3288-fennec.dtsi	/^	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {$/;"	l
pcfg_pull_up_drv_8ma	arch/arm/dts/rk3288-miniarm.dtsi	/^	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {$/;"	l
pcfg_pull_up_drv_8ma	arch/arm/dts/rk3288-veyron.dtsi	/^	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {$/;"	l
pcgcctl	drivers/usb/host/dwc2.h	/^	u32			pcgcctl;	\/* 0xe00 *\/$/;"	m	struct:dwc2_core_regs	typeref:typename:u32
pch7_get_gpio_base	drivers/pch/pch7.c	/^static int pch7_get_gpio_base(struct udevice *dev, u32 *gbasep)$/;"	f	typeref:typename:int	file:
pch7_get_spi_base	drivers/pch/pch7.c	/^static int pch7_get_spi_base(struct udevice *dev, ulong *sbasep)$/;"	f	typeref:typename:int	file:
pch7_ids	drivers/pch/pch7.c	/^static const struct udevice_id pch7_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pch7_ops	drivers/pch/pch7.c	/^static const struct pch_ops pch7_ops = {$/;"	v	typeref:typename:const struct pch_ops	file:
pch7_set_spi_protect	drivers/pch/pch7.c	/^static int pch7_set_spi_protect(struct udevice *dev, bool protect)$/;"	f	typeref:typename:int	file:
pch9_get_gpio_base	drivers/pch/pch9.c	/^static int pch9_get_gpio_base(struct udevice *dev, u32 *gbasep)$/;"	f	typeref:typename:int	file:
pch9_get_io_base	drivers/pch/pch9.c	/^static int pch9_get_io_base(struct udevice *dev, u32 *iobasep)$/;"	f	typeref:typename:int	file:
pch9_get_spi_base	drivers/pch/pch9.c	/^static int pch9_get_spi_base(struct udevice *dev, ulong *sbasep)$/;"	f	typeref:typename:int	file:
pch9_ids	drivers/pch/pch9.c	/^static const struct udevice_id pch9_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pch9_ops	drivers/pch/pch9.c	/^static const struct pch_ops pch9_ops = {$/;"	v	typeref:typename:const struct pch_ops	file:
pch_azalia_config	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^struct __packed pch_azalia_config {$/;"	s
pch_azalia_verb_table	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^struct __packed pch_azalia_verb_table {$/;"	s
pch_azalia_verb_table_header	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^struct __packed pch_azalia_verb_table_header {$/;"	s
pch_backlight	drivers/video/broadwell_igd.c	/^	int pch_backlight;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
pch_cg_init	arch/x86/cpu/broadwell/pch.c	/^static void pch_cg_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_common_sir_read	arch/x86/cpu/intel_common/pch.c	/^u32 pch_common_sir_read(struct udevice *dev, int idx)$/;"	f	typeref:typename:u32
pch_common_sir_write	arch/x86/cpu/intel_common/pch.c	/^void pch_common_sir_write(struct udevice *dev, int idx, u32 value)$/;"	f	typeref:typename:void
pch_disable_smm_only_flashing	arch/x86/cpu/ivybridge/lpc.c	/^static void pch_disable_smm_only_flashing(struct udevice *pch)$/;"	f	typeref:typename:void	file:
pch_enable_apic	arch/x86/cpu/ivybridge/lpc.c	/^static int pch_enable_apic(struct udevice *pch)$/;"	f	typeref:typename:int	file:
pch_enable_ioapic	arch/x86/cpu/broadwell/pch.c	/^static void pch_enable_ioapic(void)$/;"	f	typeref:typename:void	file:
pch_enable_mphy	arch/x86/cpu/broadwell/pch.c	/^static void pch_enable_mphy(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_enable_serial_irqs	arch/x86/cpu/ivybridge/lpc.c	/^static void pch_enable_serial_irqs(struct udevice *pch)$/;"	f	typeref:typename:void	file:
pch_fixups	arch/x86/cpu/ivybridge/lpc.c	/^static void pch_fixups(struct udevice *pch)$/;"	f	typeref:typename:void	file:
pch_gbe_adjust_link	drivers/net/pch_gbe.c	/^static void pch_gbe_adjust_link(struct pch_gbe_regs *mac_regs,$/;"	f	typeref:typename:void	file:
pch_gbe_free_pkt	drivers/net/pch_gbe.c	/^static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
pch_gbe_ids	drivers/net/pch_gbe.c	/^static const struct udevice_id pch_gbe_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pch_gbe_mac_read	drivers/net/pch_gbe.c	/^static void pch_gbe_mac_read(struct pch_gbe_regs *mac_regs, u8 *addr)$/;"	f	typeref:typename:void	file:
pch_gbe_mac_write	drivers/net/pch_gbe.c	/^static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, u8 *addr)$/;"	f	typeref:typename:int	file:
pch_gbe_mdio_init	drivers/net/pch_gbe.c	/^static int pch_gbe_mdio_init(const char *name, struct pch_gbe_regs *mac_regs)$/;"	f	typeref:typename:int	file:
pch_gbe_mdio_read	drivers/net/pch_gbe.c	/^static int pch_gbe_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
pch_gbe_mdio_ready	drivers/net/pch_gbe.c	/^static int pch_gbe_mdio_ready(struct pch_gbe_regs *mac_regs)$/;"	f	typeref:typename:int	file:
pch_gbe_mdio_write	drivers/net/pch_gbe.c	/^static int pch_gbe_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
pch_gbe_ops	drivers/net/pch_gbe.c	/^static const struct eth_ops pch_gbe_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
pch_gbe_phy_init	drivers/net/pch_gbe.c	/^static int pch_gbe_phy_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_gbe_priv	drivers/net/pch_gbe.h	/^struct pch_gbe_priv {$/;"	s
pch_gbe_probe	drivers/net/pch_gbe.c	/^int pch_gbe_probe(struct udevice *dev)$/;"	f	typeref:typename:int
pch_gbe_recv	drivers/net/pch_gbe.c	/^static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
pch_gbe_regs	drivers/net/pch_gbe.h	/^struct pch_gbe_regs {$/;"	s
pch_gbe_regs_mac_adr	drivers/net/pch_gbe.h	/^struct pch_gbe_regs_mac_adr {$/;"	s
pch_gbe_remove	drivers/net/pch_gbe.c	/^int pch_gbe_remove(struct udevice *dev)$/;"	f	typeref:typename:int
pch_gbe_reset	drivers/net/pch_gbe.c	/^static int pch_gbe_reset(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_gbe_rx_desc	drivers/net/pch_gbe.h	/^struct pch_gbe_rx_desc {$/;"	s
pch_gbe_rx_descs_init	drivers/net/pch_gbe.c	/^static void pch_gbe_rx_descs_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_gbe_send	drivers/net/pch_gbe.c	/^static int pch_gbe_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
pch_gbe_start	drivers/net/pch_gbe.c	/^static int pch_gbe_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_gbe_stop	drivers/net/pch_gbe.c	/^static void pch_gbe_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_gbe_tx_desc	drivers/net/pch_gbe.h	/^struct pch_gbe_tx_desc {$/;"	s
pch_gbe_tx_descs_init	drivers/net/pch_gbe.c	/^static void pch_gbe_tx_descs_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_get_gpio_base	drivers/pch/pch-uclass.c	/^int pch_get_gpio_base(struct udevice *dev, u32 *gbasep)$/;"	f	typeref:typename:int
pch_get_io_base	drivers/pch/pch-uclass.c	/^int pch_get_io_base(struct udevice *dev, u32 *iobasep)$/;"	f	typeref:typename:int
pch_get_ops	include/pch.h	/^#define pch_get_ops(/;"	d
pch_get_spi_base	drivers/pch/pch-uclass.c	/^int pch_get_spi_base(struct udevice *dev, ulong *sbasep)$/;"	f	typeref:typename:int
pch_gpi_routing	arch/x86/cpu/ivybridge/lpc.c	/^static int pch_gpi_routing(struct udevice *pch)$/;"	f	typeref:typename:int	file:
pch_init_deep_sx	arch/x86/cpu/broadwell/pch.c	/^static void pch_init_deep_sx(bool deep_sx_enable_ac, bool deep_sx_enable_dc)$/;"	f	typeref:typename:void	file:
pch_iobp_exec	arch/x86/cpu/broadwell/iobp.c	/^int pch_iobp_exec(u32 addr, u16 op_code, u8 route_id, u32 *data, u8 *resp)$/;"	f	typeref:typename:int
pch_iobp_read	arch/x86/cpu/broadwell/iobp.c	/^u32 pch_iobp_read(u32 address)$/;"	f	typeref:typename:u32
pch_iobp_trans_finish	arch/x86/cpu/broadwell/iobp.c	/^int pch_iobp_trans_finish(void)$/;"	f	typeref:typename:int
pch_iobp_trans_start	arch/x86/cpu/broadwell/iobp.c	/^int pch_iobp_trans_start(u32 address, int op)$/;"	f	typeref:typename:int
pch_iobp_update	arch/x86/cpu/broadwell/iobp.c	/^int pch_iobp_update(u32 address, u32 andvalue, u32 orvalue)$/;"	f	typeref:typename:int
pch_iobp_update	arch/x86/cpu/ivybridge/bd82x6x.c	/^void pch_iobp_update(struct udevice *dev, u32 address, u32 andvalue,$/;"	f	typeref:typename:void
pch_iobp_write	arch/x86/cpu/broadwell/iobp.c	/^int pch_iobp_write(u32 address, u32 data)$/;"	f	typeref:typename:int
pch_is_wpt	arch/x86/cpu/broadwell/pch.c	/^static int pch_is_wpt(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_is_wpt_ulx	arch/x86/cpu/broadwell/pch.c	/^static int pch_is_wpt_ulx(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_lp_gpio_regs	arch/x86/include/asm/arch-broadwell/gpio.h	/^struct pch_lp_gpio_regs {$/;"	s
pch_misc_init	arch/x86/cpu/broadwell/pch.c	/^static void pch_misc_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_ops	include/pch.h	/^struct pch_ops {$/;"	s
pch_pirq_init	arch/x86/cpu/ivybridge/lpc.c	/^static int pch_pirq_init(struct udevice *pch)$/;"	f	typeref:typename:int	file:
pch_pm_init	arch/x86/cpu/broadwell/pch.c	/^static void pch_pm_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_pm_init_magic	arch/x86/cpu/broadwell/pch.c	/^static void pch_pm_init_magic(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pch_power_options	arch/x86/cpu/broadwell/pch.c	/^static int pch_power_options(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_power_options	arch/x86/cpu/ivybridge/lpc.c	/^static int pch_power_options(struct udevice *pch)$/;"	f	typeref:typename:int	file:
pch_read_soft_strap	arch/x86/cpu/broadwell/pch.c	/^static u32 pch_read_soft_strap(int id)$/;"	f	typeref:typename:u32	file:
pch_revision_id	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int pch_revision_id = -1;$/;"	v	typeref:typename:int	file:
pch_rtc_init	arch/x86/cpu/ivybridge/lpc.c	/^static void pch_rtc_init(struct udevice *pch)$/;"	f	typeref:typename:void	file:
pch_set_spi_protect	drivers/pch/pch-uclass.c	/^int pch_set_spi_protect(struct udevice *dev, bool protect)$/;"	f	typeref:typename:int
pch_silicon_revision	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int pch_silicon_revision(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_silicon_supported	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int pch_silicon_supported(struct udevice *dev, int type, int rev)$/;"	f	typeref:typename:int	file:
pch_silicon_type	arch/x86/cpu/ivybridge/bd82x6x.c	/^int pch_silicon_type(struct udevice *dev)$/;"	f	typeref:typename:int
pch_table	arch/x86/cpu/intel_common/report_platform.c	/^} pch_table[] = {$/;"	v	typeref:struct:__anon8ec2af620108[]
pch_type	arch/x86/cpu/broadwell/pch.c	/^static int pch_type(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pch_type	arch/x86/cpu/ivybridge/bd82x6x.c	/^static int pch_type = -1;$/;"	v	typeref:typename:int	file:
pch_usb3_controller_settings	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^struct pch_usb3_controller_settings {$/;"	s
pchg2pden	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 pchg2pden;		\/* 0x80: EMC_PCHG2PDEN *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
pchstrp	tools/ifdtool.h	/^	uint32_t pchstrp[MAX_STRAPS];$/;"	m	struct:fpsba_t	typeref:typename:uint32_t[]
pci	arch/m68k/include/asm/immap_5445x.h	/^typedef struct pci {$/;"	s
pci	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct pci {$/;"	s
pci	arch/sandbox/dts/sandbox.dts	/^	pci: pci-controller {$/;"	l
pci	arch/sandbox/dts/test.dts	/^	pci: pci-controller {$/;"	l
pci	include/linux/edd.h	/^		} __attribute__ ((packed)) pci;$/;"	m	union:edd_device_params::__anon8a8b619a010a	typeref:struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0308
pci0	arch/mips/dts/img,boston.dts	/^	pci0: pci@10000000 {$/;"	l
pci0_cfgaddr	drivers/pci/pci_gt64120.c	/^	u32	pci0_cfgaddr;$/;"	m	struct:gt64120_regs	typeref:typename:u32	file:
pci0_cfgdata	drivers/pci/pci_gt64120.c	/^	u32	pci0_cfgdata;$/;"	m	struct:gt64120_regs	typeref:typename:u32	file:
pci0_intc	arch/mips/dts/img,boston.dts	/^		pci0_intc: interrupt-controller {$/;"	l	label:pci0
pci1	arch/mips/dts/img,boston.dts	/^	pci1: pci@12000000 {$/;"	l
pci1_hose	board/freescale/mpc8536ds/mpc8536ds.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_hose	board/freescale/mpc8544ds/mpc8544ds.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_hose	board/freescale/mpc8548cds/mpc8548cds.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_hose	board/freescale/mpc8568mds/mpc8568mds.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_hose	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_hose	board/sbc8548/sbc8548.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_hose	board/xes/common/fsl_8xxx_pci.c	/^static struct pci_controller pci1_hose;$/;"	v	typeref:struct:pci_controller	file:
pci1_intc	arch/mips/dts/img,boston.dts	/^		pci1_intc: interrupt-controller {$/;"	l	label:pci1
pci1_regions	board/esd/vme8349/pci.c	/^static struct pci_region pci1_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci1_regions	board/freescale/mpc832xemds/pci.c	/^static struct pci_region pci1_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci1_regions	board/freescale/mpc8349emds/pci.c	/^static struct pci_region pci1_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci1_regions	board/freescale/mpc8349itx/pci.c	/^static struct pci_region pci1_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci1_regions	board/sbc8349/pci.c	/^static struct pci_region pci1_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci1_regions	board/tqc/tqm834x/pci.c	/^static struct pci_region pci1_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci2	arch/mips/dts/img,boston.dts	/^	pci2: pci@14000000 {$/;"	l
pci2	board/amcc/luan/epld.h	/^    unsigned char  pci2;		\/* PCI2 interrupts, clock control *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
pci2_intc	arch/mips/dts/img,boston.dts	/^		pci2_intc: interrupt-controller {$/;"	l	label:pci2
pci2_regions	board/freescale/mpc832xemds/pci.c	/^static struct pci_region pci2_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci2_regions	board/freescale/mpc8349emds/pci.c	/^static struct pci_region pci2_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci2_regions	board/freescale/mpc8349itx/pci.c	/^static struct pci_region pci2_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci8260_t	arch/powerpc/include/asm/immap_8260.h	/^}pci8260_t;$/;"	t	typeref:struct:pci_config
pci9054_config_table	board/esd/common/pci.c	/^static struct pci_config_table pci9054_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci9054_hose	board/esd/common/pci.c	/^static struct pci_controller pci9054_hose = {$/;"	v	typeref:struct:pci_controller	file:
pci9054_iobase	board/esd/common/pci.c	/^u_long pci9054_iobase;$/;"	v	typeref:typename:u_long
pci9054_read_config_dword	board/esd/common/pci.c	/^int pci9054_read_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int
pci9054_write_config_dword	board/esd/common/pci.c	/^int pci9054_write_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int
pciBase	include/video_fb.h	/^    unsigned int pciBase;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
pciClkSync	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pciClkSync;	\/* PCI clock is synchronous        *\/$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pciIntArbEn	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pciIntArbEn;	\/* Internal PCI arbiter is enabled *\/$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pci_405gp_config_table	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^static struct pci_config_table pci_405gp_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_405gp_fixup_irq	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^void pci_405gp_fixup_irq(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:void
pci_405gp_init	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^void pci_405gp_init(struct pci_controller *hose)$/;"	f	typeref:typename:void
pci_405gp_setup_bridge	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^void pci_405gp_setup_bridge(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:void
pci_405gp_setup_vga	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:void
pci_440_init	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^static int pci_440_init (struct pci_controller *hose)$/;"	f	typeref:typename:int	file:
pci_addr_t	include/pci.h	/^typedef u32 pci_addr_t;$/;"	t	typeref:typename:u32
pci_addr_t	include/pci.h	/^typedef u64 pci_addr_t;$/;"	t	typeref:typename:u64
pci_arbiter	arch/m68k/include/asm/immap_5445x.h	/^typedef struct pci_arbiter {$/;"	s
pci_arbiter	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct pci_arbiter {$/;"	s
pci_arbiter_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pci_arbiter_ctr;	\/* 0x40 *\/$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pci_arbiter_enabled	arch/powerpc/cpu/ppc4xx/cpu.c	/^int pci_arbiter_enabled(void)$/;"	f	typeref:typename:int
pci_assign_irqs	arch/x86/cpu/pci.c	/^void pci_assign_irqs(int bus, int device, u8 irq[4])$/;"	f	typeref:typename:void
pci_async_enabled	arch/powerpc/cpu/ppc4xx/cpu.c	/^static int pci_async_enabled(void)$/;"	f	typeref:typename:int	file:
pci_auto_config_devices	drivers/pci/pci-uclass.c	/^int pci_auto_config_devices(struct udevice *bus)$/;"	f	typeref:typename:int
pci_bar	drivers/misc/swap_case.c	/^static struct pci_bar {$/;"	s	file:
pci_bind_bus_devices	drivers/pci/pci-uclass.c	/^int pci_bind_bus_devices(struct udevice *bus)$/;"	f	typeref:typename:int
pci_bridge_ids	drivers/pci/pci-uclass.c	/^static const struct udevice_id pci_bridge_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pci_bridge_ops	drivers/pci/pci-uclass.c	/^static const struct dm_pci_ops pci_bridge_ops = {$/;"	v	typeref:typename:const struct dm_pci_ops	file:
pci_bridge_read_config	drivers/pci/pci-uclass.c	/^static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pci_bridge_write_config	drivers/pci/pci-uclass.c	/^static int pci_bridge_write_config(struct udevice *bus, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pci_bridgeno	board/gateworks/gw_ventana/gw_ventana.c	/^int pci_bridgeno;$/;"	v	typeref:typename:int
pci_bs	cmd/tsi148.c	/^	unsigned int  pci_bs;$/;"	m	struct:_TSI148_DEV	typeref:typename:unsigned int	file:
pci_bs	cmd/universe.c	/^	unsigned int   pci_bs;$/;"	m	struct:_UNI_DEV	typeref:typename:unsigned int	file:
pci_bs	include/universe.h	/^	unsigned int pci_bs;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
pci_bus_clrset_config32	drivers/pci/pci-uclass.c	/^int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset,$/;"	f	typeref:typename:int
pci_bus_find_devfn	drivers/pci/pci-uclass.c	/^int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn,$/;"	f	typeref:typename:int
pci_bus_find_devices	drivers/pci/pci-uclass.c	/^int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids,$/;"	f	typeref:typename:int
pci_bus_read_config	drivers/pci/pci-uclass.c	/^int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,$/;"	f	typeref:typename:int
pci_bus_scan	drivers/pci/pci_ftpci100.c	/^static void pci_bus_scan(struct ftpci100_data *priv)$/;"	f	typeref:typename:void	file:
pci_bus_to_hose	drivers/pci/pci.c	/^struct pci_controller *pci_bus_to_hose(int bus)$/;"	f	typeref:struct:pci_controller *
pci_bus_to_hose	drivers/pci/pci_compat.c	/^struct pci_controller *pci_bus_to_hose(int busnum)$/;"	f	typeref:struct:pci_controller *
pci_bus_to_phys	include/pci.h	/^#define pci_bus_to_phys(/;"	d
pci_bus_to_virt	include/pci.h	/^#define pci_bus_to_virt(/;"	d
pci_bus_write_config	drivers/pci/pci-uclass.c	/^int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,$/;"	f	typeref:typename:int
pci_byte_size	cmd/pci.c	/^static int pci_byte_size(enum pci_size_t size)$/;"	f	typeref:typename:int	file:
pci_cfg_addr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_cfg_addr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_cfg_data	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_cfg_data;$/;"	m	struct:pci_config	typeref:typename:uint
pci_cfg_display	cmd/pci.c	/^static int pci_cfg_display(struct udevice *dev, ulong addr,$/;"	f	typeref:typename:int	file:
pci_cfg_modify	cmd/pci.c	/^static int pci_cfg_modify(struct udevice *dev, ulong addr, ulong size,$/;"	f	typeref:typename:int	file:
pci_cfg_write	cmd/pci.c	/^static int pci_cfg_write (pci_dev_t bdf, ulong addr, ulong size, ulong value)$/;"	f	typeref:typename:int	file:
pci_cfgfunc_config_device	drivers/pci/pci.c	/^void pci_cfgfunc_config_device(struct pci_controller *hose,$/;"	f	typeref:typename:void
pci_cfgfunc_do_nothing	drivers/pci/pci.c	/^void pci_cfgfunc_do_nothing(struct pci_controller *hose,$/;"	f	typeref:typename:void
pci_child_platdata	include/pci.h	/^struct pci_child_platdata {$/;"	s
pci_class	include/tsi148.h	/^	unsigned int pci_class;               \/* 0x008         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_class	include/universe.h	/^	unsigned int pci_class;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
pci_class_str	drivers/pci/pci_common.c	/^const char *pci_class_str(u8 class)$/;"	f	typeref:typename:const char *
pci_clk	include/asm-generic/global_data.h	/^	unsigned long pci_clk;$/;"	m	struct:global_data	typeref:typename:unsigned long
pci_clk_reg	arch/arm/dts/tegra20-harmony.dts	/^				pci_clk_reg: ldo0 {$/;"	l	label:pmic
pci_clk_reg	arch/arm/dts/tegra20-trimslice.dts	/^		pci_clk_reg: regulator@3 {$/;"	l
pci_cmd_word	drivers/net/e1000.h	/^	uint16_t pci_cmd_word;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
pci_con_connect	board/mpl/pati/pati.c	/^void pci_con_connect(void)$/;"	f	typeref:typename:void
pci_con_dev	board/mpl/pati/pati.c	/^struct stdio_dev pci_con_dev;$/;"	v	typeref:struct:stdio_dev
pci_con_disc	board/mpl/pati/pati.c	/^void pci_con_disc(void)$/;"	f	typeref:typename:void
pci_con_getc	board/mpl/pati/pati.c	/^int pci_con_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int
pci_con_init	board/mpl/pati/pati.c	/^void pci_con_init (void)$/;"	f	typeref:typename:void
pci_con_put_it	board/mpl/pati/pati.c	/^void pci_con_put_it(const char c)$/;"	f	typeref:typename:void
pci_con_putc	board/mpl/pati/pati.c	/^void pci_con_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void
pci_con_puts	board/mpl/pati/pati.c	/^void pci_con_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void
pci_con_tstc	board/mpl/pati/pati.c	/^int pci_con_tstc(struct stdio_dev *dev)$/;"	f	typeref:typename:int
pci_conf	arch/powerpc/include/asm/immap_512x.h	/^	pciconf512x_t		pci_conf;	\/* PCI Configuration *\/$/;"	m	struct:immap	typeref:typename:pciconf512x_t
pci_conf	arch/powerpc/include/asm/immap_83xx.h	/^	pciconf83xx_t		pci_conf[1];	\/* PCI Configuration Registers *\/$/;"	m	struct:immap	typeref:typename:pciconf83xx_t[1]
pci_conf	arch/powerpc/include/asm/immap_83xx.h	/^	pciconf83xx_t		pci_conf[1];	\/* PCI Software Configuration Registers *\/$/;"	m	struct:immap	typeref:typename:pciconf83xx_t[1]
pci_conf	arch/powerpc/include/asm/immap_83xx.h	/^	pciconf83xx_t		pci_conf[2];	\/* PCI Software Configuration Registers *\/$/;"	m	struct:immap	typeref:typename:pciconf83xx_t[2]
pci_config	arch/powerpc/include/asm/immap_8260.h	/^typedef struct pci_config {$/;"	s
pci_config	include/faraday/ftpci100.h	/^struct pci_config {$/;"	s
pci_config_table	include/pci.h	/^struct pci_config_table {$/;"	s
pci_controller	include/pci.h	/^struct pci_controller {$/;"	s
pci_conv_32_to_size	drivers/pci/pci-uclass.c	/^ulong pci_conv_32_to_size(ulong value, uint offset, enum pci_size_t size)$/;"	f	typeref:typename:ulong
pci_conv_size_to_32	drivers/pci/pci-uclass.c	/^ulong pci_conv_size_to_32(ulong old, ulong value, uint offset,$/;"	f	typeref:typename:ulong
pci_csr	include/tsi148.h	/^	unsigned int pci_csr;                 \/* 0x004         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_csr	include/universe.h	/^	unsigned int pci_csr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
pci_ctrl	arch/powerpc/include/asm/immap_512x.h	/^	pcictrl512x_t		pci_ctrl;	\/* PCI Controller Control and Status *\/$/;"	m	struct:immap	typeref:typename:pcictrl512x_t
pci_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	pcictrl83xx_t		pci_ctrl[1];	\/* PCI Control & Status Registers *\/$/;"	m	struct:immap	typeref:typename:pcictrl83xx_t[1]
pci_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	pcictrl83xx_t		pci_ctrl[1];	\/* PCI Controller Control and Status Registers *\/$/;"	m	struct:immap	typeref:typename:pcictrl83xx_t[1]
pci_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	pcictrl83xx_t		pci_ctrl[2];	\/* PCI Controller Control and Status Registers *\/$/;"	m	struct:immap	typeref:typename:pcictrl83xx_t[2]
pci_dasa_sim_config_pci9054	board/esd/common/pci.c	/^static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:void	file:
pci_dev	board/gateworks/gw_ventana/gw_ventana.c	/^struct pci_dev {$/;"	s	file:
pci_dev_t	include/pci.h	/^typedef int pci_dev_t;$/;"	t	typeref:typename:int
pci_device_id	include/pci.h	/^struct pci_device_id {$/;"	s
pci_device_matches_ids	drivers/pci/pci-uclass.c	/^static int pci_device_matches_ids(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pci_devno	board/gateworks/gw_ventana/gw_ventana.c	/^int pci_devno;$/;"	v	typeref:typename:int
pci_devs	board/gateworks/gw_ventana/gw_ventana.c	/^struct pci_dev pci_devs[MAX_PCI_DEVS];$/;"	v	typeref:struct:pci_dev[]
pci_dma	arch/powerpc/include/asm/immap_512x.h	/^	pcidma512x_t		pci_dma;	\/* PCI DMA *\/$/;"	m	struct:immap	typeref:typename:pcidma512x_t
pci_dmabcr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmabcr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmabcr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmabcr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmabcr2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmabcr2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmabcr3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmabcr3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmacdar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmacdar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmacdar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmacdar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmacdar2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmacdar2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmacdar3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmacdar3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmadar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmadar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmadar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmadar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmadar2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmadar2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmadar3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmadar3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmamr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmamr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmamr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmamr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmamr2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmamr2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmamr3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmamr3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmandar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmandar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmandar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmandar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmandar2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmandar2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmandar3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmandar3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasar2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasar2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasar3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasar3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasr2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasr2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dmasr3	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_dmasr3;$/;"	m	struct:pci_config	typeref:typename:uint
pci_dorbell_irq	board/mpl/pati/pati.c	/^int pci_dorbell_irq(void)$/;"	f	typeref:typename:int
pci_driver_entry	include/pci.h	/^struct pci_driver_entry {$/;"	s
pci_eacr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_eacr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_eccr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_eccr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ecr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ecr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_edcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_edcr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_eeprom	board/mpl/pati/pci_eeprom.h	/^} pci_eeprom;$/;"	t	typeref:struct:pci_eeprom_t
pci_eeprom_t	board/mpl/pati/pci_eeprom.h	/^typedef struct pci_eeprom_t {$/;"	s
pci_emr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_emr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_esr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_esr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_eth_init	include/netdev.h	/^static inline int pci_eth_init(bd_t *bis)$/;"	f	typeref:typename:int
pci_fb	include/pci.h	/^	struct pci_region *pci_fb;$/;"	m	struct:pci_controller	typeref:struct:pci_region *
pci_field_width	cmd/pci.c	/^static int pci_field_width(enum pci_size_t size)$/;"	f	typeref:typename:int	file:
pci_find_and_bind_driver	drivers/pci/pci-uclass.c	/^static int pci_find_and_bind_driver(struct udevice *parent,$/;"	f	typeref:typename:int	file:
pci_find_cap	drivers/pci/pci.c	/^int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap)$/;"	f	typeref:typename:int
pci_find_class	drivers/pci/pci_common.c	/^pci_dev_t pci_find_class(uint find_class, int index)$/;"	f	typeref:typename:pci_dev_t
pci_find_config	drivers/pci/pci.c	/^struct pci_config_table *pci_find_config(struct pci_controller *hose,$/;"	f	typeref:struct:pci_config_table *
pci_find_device	drivers/pci/pci_common.c	/^pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)$/;"	f	typeref:typename:pci_dev_t
pci_find_device_id	drivers/pci/pci-uclass.c	/^int pci_find_device_id(struct pci_device_id *ids, int index,$/;"	f	typeref:typename:int
pci_find_devices	drivers/pci/pci.c	/^pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)$/;"	f	typeref:typename:pci_dev_t
pci_find_devices	drivers/pci/pci_compat.c	/^pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)$/;"	f
pci_find_first_device	drivers/pci/pci-uclass.c	/^int pci_find_first_device(struct udevice **devp)$/;"	f	typeref:typename:int
pci_find_next_device	drivers/pci/pci-uclass.c	/^int pci_find_next_device(struct udevice **devp)$/;"	f	typeref:typename:int
pci_find_next_ext_capability	drivers/pci/pci.c	/^int pci_find_next_ext_capability(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int
pci_fsl86xxads_config_table	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^static struct pci_config_table pci_fsl86xxads_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_ftpci_init	drivers/pci/pci_ftpci100.c	/^void pci_ftpci_init(void)$/;"	f	typeref:typename:void
pci_gcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_gcr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_generic_ids	drivers/pci/pci-uclass.c	/^static const struct udevice_id pci_generic_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pci_get_bus	drivers/pci/pci-uclass.c	/^int pci_get_bus(int busnum, struct udevice **busp)$/;"	f	typeref:typename:int
pci_get_bus_max	drivers/pci/pci-uclass.c	/^static int pci_get_bus_max(void)$/;"	f	typeref:typename:int	file:
pci_get_controller	drivers/pci/pci-uclass.c	/^struct udevice *pci_get_controller(struct udevice *dev)$/;"	f	typeref:struct:udevice *
pci_get_emul_ops	include/pci.h	/^#define pci_get_emul_ops(/;"	d
pci_get_ff	drivers/pci/pci-uclass.c	/^int pci_get_ff(enum pci_size_t size)$/;"	f	typeref:typename:int
pci_get_hose_head	drivers/pci/pci.c	/^struct pci_controller *pci_get_hose_head(void)$/;"	f	typeref:struct:pci_controller *
pci_get_ops	include/pci.h	/^#define pci_get_ops(/;"	d
pci_get_regions	drivers/pci/pci-uclass.c	/^int pci_get_regions(struct udevice *dev, struct pci_region **iop,$/;"	f	typeref:typename:int
pci_gpcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_gpcr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_header_show	cmd/pci.c	/^void pci_header_show(struct udevice *dev)$/;"	f	typeref:typename:void
pci_header_show_brief	cmd/pci.c	/^static void pci_header_show_brief(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pci_header_show_brief	cmd/pci.c	/^void pci_header_show_brief(pci_dev_t dev)$/;"	f	typeref:typename:void
pci_help_text	cmd/pci.c	/^static char pci_help_text[] =$/;"	v	typeref:typename:char[]	file:
pci_hose	arch/powerpc/cpu/mpc512x/pci.c	/^static struct pci_controller pci_hose;$/;"	v	typeref:struct:pci_controller	file:
pci_hose	arch/powerpc/cpu/mpc83xx/pci.c	/^static struct pci_controller pci_hose[MAX_BUSES];$/;"	v	typeref:struct:pci_controller[]	file:
pci_hose	arch/powerpc/cpu/mpc85xx/pci.c	/^static struct pci_controller *pci_hose;$/;"	v	typeref:struct:pci_controller *	file:
pci_hose_bus_to_phys	drivers/pci/pci_common.c	/^phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose,$/;"	f	typeref:typename:phys_addr_t
pci_hose_config_device	drivers/pci/pci.c	/^int pci_hose_config_device(struct pci_controller *hose,$/;"	f	typeref:typename:int
pci_hose_find_cap_start	drivers/pci/pci.c	/^int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int
pci_hose_find_capability	drivers/pci/pci.c	/^int pci_hose_find_capability(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int
pci_hose_find_devices	drivers/pci/pci_common.c	/^pci_dev_t pci_hose_find_devices(struct pci_controller *hose, int busnum,$/;"	f	typeref:typename:pci_dev_t
pci_hose_find_ext_capability	drivers/pci/pci.c	/^int pci_hose_find_ext_capability(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:int
pci_hose_phys_to_bus	drivers/pci/pci_common.c	/^pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose,$/;"	f	typeref:typename:pci_addr_t
pci_hose_scan	drivers/pci/pci.c	/^int pci_hose_scan(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_hose_scan_bus	drivers/pci/pci.c	/^int pci_hose_scan_bus(struct pci_controller *hose, int bus)$/;"	f	typeref:typename:int
pci_id	include/tsi148.h	/^	unsigned int pci_id;                  \/* 0x000         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_id	include/universe.h	/^	unsigned int pci_id;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
pci_idr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_idr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ifhpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ifhpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ifqpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ifqpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_iftpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_iftpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_imimr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_imimr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_imisr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_imisr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_imr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_imr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_imr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_imr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_inbound_window	arch/powerpc/include/asm/fsl_pci.h	/^typedef struct pci_inbound_window {$/;"	s
pci_init	drivers/pci/pci-uclass.c	/^void pci_init(void)$/;"	f	typeref:typename:void
pci_init	drivers/pci/pci.c	/^void pci_init(void)$/;"	f	typeref:typename:void
pci_init_board	arch/powerpc/cpu/mpc512x/pci.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/Arcturus/ucp1020/ucp1020.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/a4m072/a4m072.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/armltd/integrator/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/cavium/thunderx/thunderx.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/esd/common/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/esd/vme8349/pci.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/b4860qds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/bsc9132qds/bsc9132qds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/c29xpcie/c29xpcie.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/common/p_corenet/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/m54455evb/m54455evb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/m547xevb/m547xevb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/m548xevb/m548xevb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8308rdb/mpc8308rdb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8313erdb/mpc8313erdb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8315erdb/mpc8315erdb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8323erdb/mpc8323erdb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc832xemds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8349emds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8349itx/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc837xemds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc837xerdb/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8536ds/mpc8536ds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8540ads/mpc8540ads.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8541cds/mpc8541cds.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8544ds/mpc8544ds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8548cds/mpc8548cds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8555cds/mpc8555cds.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8560ads/mpc8560ads.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8568mds/mpc8568mds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8569mds/mpc8569mds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8572ds/mpc8572ds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8610hpcd/mpc8610hpcd.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/mpc8641hpcn/mpc8641hpcn.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/p1010rdb/p1010rdb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/p1022ds/p1022ds.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/p1023rdb/p1023rdb.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/p1_twr/p1_twr.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/qemu-ppce500/qemu-ppce500.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t102xqds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t102xrdb/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t1040qds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t104xrdb/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t208xqds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t208xrdb/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t4qds/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/freescale/t4rdb/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/gdsys/mpc8308/hrcon.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/gdsys/mpc8308/strider.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/gdsys/p1022/controlcenterd.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/ifm/o2dnt2/o2dnt2.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/imgtec/malta/malta.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/inka4x0/inka4x0.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/intercontrol/digsy_mtc/digsy_mtc.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/ipek01/ipek01.c	/^void pci_init_board (void)$/;"	f	typeref:typename:void
pci_init_board	board/jupiter/jupiter.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/keymile/kmp204x/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/mpc8308_p1m/mpc8308_p1m.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/mpl/common/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/munices/munices.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/phytec/pcm030/pcm030.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/renesas/r2dplus/r2dplus.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/renesas/r7780mp/r7780mp.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/renesas/sh7785lcr/sh7785lcr.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/sbc8349/pci.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/sbc8548/sbc8548.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/sbc8641d/sbc8641d.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/socrates/socrates.c	/^void pci_init_board (void)$/;"	f	typeref:typename:void
pci_init_board	board/tqc/tqm5200/tqm5200.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/tqc/tqm834x/pci.c	/^pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/varisys/cyrus/pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/ve8313/ve8313.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	board/xes/common/fsl_8xxx_pci.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	drivers/pci/pci_mvebu.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	drivers/pci/pcie_imx.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	drivers/pci/pcie_layerscape.c	/^void pci_init_board(void)$/;"	f	typeref:typename:void
pci_init_board	drivers/pci/tsi108_pci.c	/^void pci_init_board (void)$/;"	f	typeref:typename:void
pci_init_bus	arch/powerpc/cpu/mpc83xx/pci.c	/^static void pci_init_bus(int bus, struct pci_region *reg)$/;"	f	typeref:typename:void	file:
pci_int_ack	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_int_ack;$/;"	m	struct:pci_config	typeref:typename:uint
pci_int_enable	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pci_int_enable;	\/* 0x20 *\/$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pci_int_status	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pci_int_status;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pci_integrator_config_table	board/armltd/integrator/pci.c	/^static struct pci_config_table pci_integrator_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_integrator_read__word	board/armltd/integrator/pci.c	/^static int pci_integrator_read__word(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
pci_integrator_read_byte	board/armltd/integrator/pci.c	/^static int pci_integrator_read_byte(struct pci_controller *hose, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pci_integrator_read_dword	board/armltd/integrator/pci.c	/^static int pci_integrator_read_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
pci_integrator_write_byte	board/armltd/integrator/pci.c	/^static int pci_integrator_write_byte(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
pci_integrator_write_dword	board/armltd/integrator/pci.c	/^static int pci_integrator_write_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
pci_integrator_write_word	board/armltd/integrator/pci.c	/^static int pci_integrator_write_word(struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
pci_io	include/pci.h	/^	struct pci_region *pci_mem, *pci_io, *pci_prefetch;$/;"	m	struct:pci_controller	typeref:struct:pci_region *
pci_io_read	arch/sandbox/lib/pci_io.c	/^static int pci_io_read(unsigned int addr, ulong *valuep, pci_size_t size)$/;"	f	typeref:typename:int	file:
pci_io_to_phys	include/pci.h	/^#define pci_io_to_phys(/;"	d
pci_io_to_virt	include/pci.h	/^#define pci_io_to_virt(/;"	d
pci_io_write	arch/sandbox/lib/pci_io.c	/^static int pci_io_write(unsigned int addr, ulong value, pci_size_t size)$/;"	f	typeref:typename:int	file:
pci_iphpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_iphpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_iptpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_iptpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_is_66mhz	board/esd/pmc405de/pmc405de.c	/^static int pci_is_66mhz(void)$/;"	f	typeref:typename:int	file:
pci_is_66mhz	board/esd/pmc440/pmc440.c	/^static int pci_is_66mhz(void)$/;"	f	typeref:typename:int	file:
pci_last_busno	drivers/pci/pci-uclass.c	/^int pci_last_busno(void)$/;"	f	typeref:typename:int
pci_last_busno	drivers/pci/pci.c	/^int pci_last_busno(void)$/;"	f	typeref:typename:int
pci_map_bar	drivers/pci/pci_common.c	/^void *pci_map_bar(pci_dev_t pdev, int bar, int flags)$/;"	f	typeref:typename:void *
pci_map_physmem	arch/sandbox/lib/pci_io.c	/^int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp,$/;"	f	typeref:typename:int
pci_map_region	board/freescale/qemu-ppce500/qemu-ppce500.c	/^static int pci_map_region(void *fdt, int pci_node, int range_id,$/;"	f	typeref:typename:int	file:
pci_master_init	board/esd/pmc440/pmc440.c	/^void pci_master_init(struct pci_controller *hose)$/;"	f	typeref:typename:void
pci_match_one_id	drivers/pci/pci-uclass.c	/^static bool pci_match_one_id(const struct pci_device_id *id,$/;"	f	typeref:typename:bool	file:
pci_mbarh	include/tsi148.h	/^	unsigned int pci_mbarh;               \/* 0x014         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_mbarl	include/tsi148.h	/^	unsigned int pci_mbarl;               \/* 0x010         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_mcf5445x_init	arch/m68k/cpu/mcf5445x/pci.c	/^void pci_mcf5445x_init(struct pci_controller *hose)$/;"	f
pci_mcf547x_8x_init	arch/m68k/cpu/mcf547x_8x/pci.c	/^void pci_mcf547x_8x_init(struct pci_controller *hose)$/;"	f	typeref:typename:void
pci_mem	include/pci.h	/^	struct pci_region *pci_mem, *pci_io, *pci_prefetch;$/;"	m	struct:pci_controller	typeref:struct:pci_region *
pci_mem_to_phys	include/pci.h	/^#define pci_mem_to_phys(/;"	d
pci_mem_to_virt	include/pci.h	/^#define pci_mem_to_virt(/;"	d
pci_misc0	include/tsi148.h	/^	unsigned int pci_misc0;               \/* 0x00c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_misc0	include/universe.h	/^	unsigned int pci_misc0;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
pci_misc1	include/tsi148.h	/^	unsigned int pci_misc1;               \/* 0x03c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_misc1	include/universe.h	/^	unsigned int pci_misc1;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
pci_mmc_init	drivers/mmc/pci_mmc.c	/^int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported)$/;"	f	typeref:typename:int
pci_mode	arch/arm/mach-keystone/init.c	/^enum pci_mode	{$/;"	g	file:
pci_mpc5xxx_init	arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c	/^void pci_mpc5xxx_init (struct pci_controller *hose)$/;"	f	typeref:typename:void
pci_mpc8250_init	arch/powerpc/cpu/mpc8260/pci.c	/^void pci_mpc8250_init (struct pci_controller *hose)$/;"	f	typeref:typename:void
pci_mpc83xxmitx_config_table	board/freescale/mpc8349itx/mpc8349itx.c	/^static struct pci_config_table pci_mpc83xxmitx_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mpc8568mds_config_table	board/freescale/mpc8568mds/mpc8568mds.c	/^static struct pci_config_table pci_mpc8568mds_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mpc85xx_init	arch/powerpc/cpu/mpc85xx/pci.c	/^pci_mpc85xx_init(struct pci_controller *board_hose)$/;"	f	typeref:typename:void
pci_mpc85xxads_config_table	board/freescale/mpc8560ads/mpc8560ads.c	/^static struct pci_config_table pci_mpc85xxads_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mpc85xxads_config_table	board/socrates/socrates.c	/^static struct pci_config_table pci_mpc85xxads_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mpc85xxcds_config_table	board/freescale/mpc8541cds/mpc8541cds.c	/^static struct pci_config_table pci_mpc85xxcds_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mpc85xxcds_config_table	board/freescale/mpc8548cds/mpc8548cds.c	/^static struct pci_config_table pci_mpc85xxcds_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mpc85xxcds_config_table	board/freescale/mpc8555cds/mpc8555cds.c	/^static struct pci_config_table pci_mpc85xxcds_config_table[] = {$/;"	v	typeref:struct:pci_config_table[]	file:
pci_mucr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_mucr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_num	arch/powerpc/include/asm/fsl_pci.h	/^	int pci_num;$/;"	m	struct:fsl_pci_info	typeref:typename:int
pci_num	drivers/pci/pcie_layerscape.c	/^	int pci_num;$/;"	m	struct:ls_pcie_info	typeref:typename:int	file:
pci_num_buses	arch/powerpc/cpu/mpc83xx/pci.c	/^static int pci_num_buses;$/;"	v	typeref:typename:int	file:
pci_odr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_odr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_of_setup	board/freescale/b4860qds/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/common/p_corenet/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t102xqds/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t102xrdb/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t1040qds/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t104xrdb/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t208xqds/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t208xrdb/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t4qds/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/freescale/t4rdb/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/keymile/kmp204x/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_of_setup	board/varisys/cyrus/pci.c	/^void pci_of_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
pci_ofhpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ofhpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ofqpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ofqpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_oftpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_oftpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ominr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ominr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_omisr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_omisr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_omr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_omr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_omr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_omr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ophpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ophpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_optpr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_optpr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_outbound_window	arch/powerpc/include/asm/fsl_pci.h	/^typedef struct pci_outbound_window {$/;"	s
pci_outbound_window	arch/powerpc/include/asm/immap_512x.h	/^typedef struct pci_outbound_window {$/;"	s
pci_outbound_window	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct pci_outbound_window {$/;"	s
pci_outl	arch/powerpc/cpu/mpc8260/pci.c	/^static inline void pci_outl (u32 addr, u32 data)$/;"	f	typeref:typename:void	file:
pci_pcixcap	include/tsi148.h	/^	unsigned int pci_pcixcap;             \/* 0x040         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_pcixstat	include/tsi148.h	/^	unsigned int pci_pcixstat;            \/* 0x044         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pci_phys_to_bus	include/pci.h	/^#define pci_phys_to_bus(/;"	d
pci_phys_to_io	include/pci.h	/^#define pci_phys_to_io(/;"	d
pci_phys_to_mem	include/pci.h	/^#define pci_phys_to_mem(/;"	d
pci_pibar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pibar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pibar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pibar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_picmr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_picmr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_picmr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_picmr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pip405_config_entry	board/mpl/common/pci_parts.h	/^struct pci_pip405_config_entry {$/;"	s
pci_pip405_config_table	board/mpl/common/pci_parts.h	/^static struct pci_config_table pci_pip405_config_table[]={$/;"	v	typeref:struct:pci_config_table[]
pci_pip405_fixup_irq	board/mpl/common/pci.c	/^static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:void	file:
pci_pip405_write_regs	board/mpl/common/pci.c	/^void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,$/;"	f	typeref:typename:void
pci_pitar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pitar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pitar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pitar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pobar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pobar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pobar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pobar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pobar2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pobar2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pocmr0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pocmr0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pocmr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pocmr1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pocmr2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_pocmr2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_potar0	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_potar0;$/;"	m	struct:pci_config	typeref:typename:uint
pci_potar1	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_potar1;$/;"	m	struct:pci_config	typeref:typename:uint
pci_potar2	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_potar2;$/;"	m	struct:pci_config	typeref:typename:uint
pci_pre_init	board/esd/cpci405/cpci405.c	/^int pci_pre_init(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_pre_init	board/esd/pmc405de/pmc405de.c	/^int pci_pre_init(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_pre_init	board/gdsys/gdppc440etx/gdppc440etx.c	/^int pci_pre_init(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_pre_init	board/xes/xpedite1000/xpedite1000.c	/^int pci_pre_init(struct pci_controller * hose)$/;"	f	typeref:typename:int
pci_prefetch	include/pci.h	/^	struct pci_region *pci_mem, *pci_io, *pci_prefetch;$/;"	m	struct:pci_controller	typeref:struct:pci_region *
pci_print_dev	drivers/pci/pci.c	/^__weak int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:__weak int
pci_print_dev	drivers/pci/pci_sh4.c	/^int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:int
pci_ptcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_ptcr;$/;"	m	struct:pci_config	typeref:typename:uint
pci_qbar	arch/powerpc/include/asm/immap_8260.h	/^	uint	pci_qbar;$/;"	m	struct:pci_config	typeref:typename:uint
pci_ram_top	include/asm-generic/global_data.h	/^	phys_addr_t pci_ram_top;	\/* top of region accessible to PCI *\/$/;"	m	struct:global_data	typeref:typename:phys_addr_t
pci_read_bar32	drivers/pci/pci_common.c	/^u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum)$/;"	f	typeref:typename:u32
pci_read_cfg_dword	arch/m68k/cpu/mcf547x_8x/pci.c	/^int pci_read_cfg_dword(struct pci_controller *hose, pci_dev_t dev,$/;"	f
pci_read_config	cmd/pci.c	/^static unsigned long pci_read_config(pci_dev_t dev, int offset,$/;"	f	typeref:typename:unsigned long	file:
pci_read_config	drivers/pci/pci-uclass.c	/^int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,$/;"	f	typeref:typename:int
pci_read_config16	drivers/pci/pci-uclass.c	/^int pci_read_config16(pci_dev_t bdf, int offset, u16 *valuep)$/;"	f	typeref:typename:int
pci_read_config32	drivers/pci/pci-uclass.c	/^int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)$/;"	f	typeref:typename:int
pci_read_config8	drivers/pci/pci-uclass.c	/^int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep)$/;"	f	typeref:typename:int
pci_read_config_byte	include/pci.h	/^static inline int pci_read_config_byte(pci_dev_t pcidev, int offset,$/;"	f	typeref:typename:int
pci_read_config_dword	include/pci.h	/^static inline int pci_read_config_dword(pci_dev_t pcidev, int offset,$/;"	f	typeref:typename:int
pci_read_config_word	include/pci.h	/^static inline int pci_read_config_word(pci_dev_t pcidev, int offset,$/;"	f	typeref:typename:int
pci_read_dword_ptr	arch/x86/include/asm/me_common.h	/^static inline void pci_read_dword_ptr(struct udevice *me_dev, void *ptr,$/;"	f	typeref:typename:void
pci_read_le16	arch/powerpc/include/asm/pci_io.h	/^#define pci_read_le16(/;"	d
pci_read_le32	arch/powerpc/include/asm/pci_io.h	/^#define pci_read_le32(/;"	d
pci_readb	arch/powerpc/include/asm/pci_io.h	/^#define pci_readb(/;"	d
pci_readl	arch/powerpc/include/asm/pci_io.h	/^#define pci_readl(/;"	d
pci_readw	arch/powerpc/include/asm/pci_io.h	/^#define pci_readw(/;"	d
pci_reg_info	cmd/pci.c	/^struct pci_reg_info {$/;"	s	file:
pci_region	include/pci.h	/^struct pci_region {$/;"	s
pci_regions	board/freescale/mpc8313erdb/mpc8313erdb.c	/^static struct pci_region pci_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci_regions	board/freescale/mpc8315erdb/mpc8315erdb.c	/^static struct pci_region pci_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci_regions	board/freescale/mpc8323erdb/mpc8323erdb.c	/^static struct pci_region pci_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci_regions	board/freescale/mpc837xemds/pci.c	/^static struct pci_region pci_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci_regions	board/freescale/mpc837xerdb/pci.c	/^static struct pci_region pci_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci_regions	board/ve8313/ve8313.c	/^static struct pci_region pci_regions[] = {$/;"	v	typeref:struct:pci_region[]	file:
pci_register_hose	drivers/pci/pci.c	/^void pci_register_hose(struct pci_controller* hose)$/;"	f	typeref:typename:void
pci_rom_data	include/pci_rom.h	/^struct pci_rom_data {$/;"	s
pci_rom_emul	include/pci_rom.h	/^enum pci_rom_emul {$/;"	g
pci_rom_header	include/pci_rom.h	/^struct pci_rom_header {$/;"	s
pci_rom_load	drivers/pci/pci_rom.c	/^static int pci_rom_load(struct pci_rom_header *rom_header,$/;"	f	typeref:typename:int	file:
pci_rom_probe	drivers/pci/pci_rom.c	/^static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)$/;"	f	typeref:typename:int	file:
pci_segment_group_number	arch/x86/include/asm/acpi_table.h	/^	u16 pci_segment_group_number;$/;"	m	struct:acpi_mcfg_mmconfig	typeref:typename:u16
pci_set_ops	include/pci.h	/^static inline void pci_set_ops(struct pci_controller *hose,$/;"	f	typeref:typename:void
pci_set_region	include/pci.h	/^static inline void pci_set_region(struct pci_region *reg,$/;"	f	typeref:typename:void
pci_setup_indirect	drivers/pci/pci_indirect.c	/^void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)$/;"	f
pci_sh4_init	drivers/pci/pci_sh4.c	/^int pci_sh4_init(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_sh4_read_config_dword	drivers/pci/pci_sh7751.c	/^int pci_sh4_read_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int
pci_sh4_read_config_dword	drivers/pci/pci_sh7780.c	/^int pci_sh4_read_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int
pci_sh4_write_config_dword	drivers/pci/pci_sh7751.c	/^int pci_sh4_write_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int
pci_sh4_write_config_dword	drivers/pci/pci_sh7780.c	/^int pci_sh4_write_config_dword(struct pci_controller *hose,$/;"	f	typeref:typename:int
pci_sh7751_init	drivers/pci/pci_sh7751.c	/^int pci_sh7751_init(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_sh7780_init	drivers/pci/pci_sh7780.c	/^int pci_sh7780_init(struct pci_controller *hose)$/;"	f	typeref:typename:int
pci_show_regs	cmd/pci.c	/^static void pci_show_regs(pci_dev_t dev, struct pci_reg_info *regs)$/;"	f	typeref:typename:void	file:
pci_show_regs	cmd/pci.c	/^static void pci_show_regs(struct udevice *dev, struct pci_reg_info *regs)$/;"	f	typeref:typename:void	file:
pci_size_t	include/pci.h	/^enum pci_size_t {$/;"	g
pci_size_t	include/pci.h	/^typedef u32 pci_size_t;$/;"	t	typeref:typename:u32
pci_size_t	include/pci.h	/^typedef u64 pci_size_t;$/;"	t	typeref:typename:u64
pci_skip_dev	drivers/pci/pci_common.c	/^__weak int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:__weak int
pci_skip_dev	drivers/pci/pci_sh4.c	/^int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:int
pci_skip_dev	drivers/pci/pcie_layerscape.c	/^int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:int
pci_t	arch/m68k/include/asm/immap_5445x.h	/^} pci_t;$/;"	t	typeref:struct:pci
pci_t	arch/m68k/include/asm/immap_547x_8x.h	/^} pci_t;$/;"	t	typeref:struct:pci
pci_target_init	board/esd/pmc440/pmc440.c	/^void pci_target_init(struct pci_controller *hose)$/;"	f	typeref:typename:void
pci_tegra_ids	drivers/pci/pci_tegra.c	/^static const struct udevice_id pci_tegra_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pci_tegra_ofdata_to_platdata	drivers/pci/pci_tegra.c	/^static int pci_tegra_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pci_tegra_ops	drivers/pci/pci_tegra.c	/^static const struct dm_pci_ops pci_tegra_ops = {$/;"	v	typeref:typename:const struct dm_pci_ops	file:
pci_tegra_probe	drivers/pci/pci_tegra.c	/^static int pci_tegra_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pci_tegra_read_config	drivers/pci/pci_tegra.c	/^static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pci_tegra_soc	drivers/pci/pci_tegra.c	/^static const struct tegra_pcie_soc pci_tegra_soc[] = {$/;"	v	typeref:typename:const struct tegra_pcie_soc[]	file:
pci_tegra_write_config	drivers/pci/pci_tegra.c	/^static int pci_tegra_write_config(struct udevice *bus, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pci_uclass_child_post_bind	drivers/pci/pci-uclass.c	/^static int pci_uclass_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pci_uclass_post_probe	drivers/pci/pci-uclass.c	/^static int pci_uclass_post_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
pci_uclass_pre_probe	drivers/pci/pci-uclass.c	/^static int pci_uclass_pre_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
pci_unit_rev	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pci_unit_rev;	\/* 0x48 *\/$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pci_unmap_physmem	arch/sandbox/lib/pci_io.c	/^int pci_unmap_physmem(const void *vaddr, unsigned long len,$/;"	f	typeref:typename:int
pci_vdd_reg	arch/arm/dts/tegra20-harmony.dts	/^		pci_vdd_reg: regulator@3 {$/;"	l
pci_vdd_reg	arch/arm/dts/tegra20-trimslice.dts	/^		pci_vdd_reg: regulator@4 {$/;"	l
pci_video_init	drivers/video/mb862xx.c	/^unsigned int pci_video_init (void)$/;"	f	typeref:typename:unsigned int
pci_virt_to_bus	include/pci.h	/^#define pci_virt_to_bus(/;"	d
pci_virt_to_io	include/pci.h	/^#define pci_virt_to_io(/;"	d
pci_virt_to_mem	include/pci.h	/^#define pci_virt_to_mem(/;"	d
pci_wait	arch/powerpc/cpu/ppc4xx/start.S	/^pci_wait:$/;"	l
pci_write_bar32	drivers/pci/pci_common.c	/^void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,$/;"	f	typeref:typename:void
pci_write_config	drivers/pci/pci-uclass.c	/^int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,$/;"	f	typeref:typename:int
pci_write_config16	drivers/pci/pci-uclass.c	/^int pci_write_config16(pci_dev_t bdf, int offset, u16 value)$/;"	f	typeref:typename:int
pci_write_config32	drivers/pci/pci-uclass.c	/^int pci_write_config32(pci_dev_t bdf, int offset, u32 value)$/;"	f	typeref:typename:int
pci_write_config8	drivers/pci/pci-uclass.c	/^int pci_write_config8(pci_dev_t bdf, int offset, u8 value)$/;"	f	typeref:typename:int
pci_write_config_byte	include/pci.h	/^static inline int pci_write_config_byte(pci_dev_t pcidev, int offset,$/;"	f	typeref:typename:int
pci_write_config_dword	include/pci.h	/^static inline int pci_write_config_dword(pci_dev_t pcidev, int offset,$/;"	f	typeref:typename:int
pci_write_config_word	include/pci.h	/^static inline int pci_write_config_word(pci_dev_t pcidev, int offset,$/;"	f	typeref:typename:int
pci_write_dword_ptr	arch/x86/include/asm/me_common.h	/^static inline void pci_write_dword_ptr(struct udevice *me_dev, void *ptr,$/;"	f	typeref:typename:void
pci_write_le16	arch/powerpc/include/asm/pci_io.h	/^#define pci_write_le16(/;"	d
pci_write_le32	arch/powerpc/include/asm/pci_io.h	/^#define pci_write_le32(/;"	d
pci_writeb	arch/powerpc/include/asm/pci_io.h	/^#define pci_writeb(/;"	d
pci_writel	arch/powerpc/include/asm/pci_io.h	/^#define pci_writel(/;"	d
pci_writew	arch/powerpc/include/asm/pci_io.h	/^#define pci_writew(/;"	d
pci_x86_ids	drivers/pci/pci_x86.c	/^static const struct udevice_id pci_x86_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pci_x86_ops	drivers/pci/pci_x86.c	/^static const struct dm_pci_ops pci_x86_ops = {$/;"	v	typeref:typename:const struct dm_pci_ops	file:
pci_x86_read_config	arch/x86/cpu/pci.c	/^int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,$/;"	f	typeref:typename:int
pci_x86_write_config	arch/x86/cpu/pci.c	/^int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,$/;"	f	typeref:typename:int
pciahb_dct_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pciahb_dct_ctr;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pciahb_win1_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pciahb_win1_ctr;	\/* 0x00 *\/$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pciahb_win2_ctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 pciahb_win2_ctr;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
pciarb_t	arch/m68k/include/asm/immap_5445x.h	/^} pciarb_t;$/;"	t	typeref:struct:pci_arbiter
pciarb_t	arch/m68k/include/asm/immap_547x_8x.h	/^} pciarb_t;$/;"	t	typeref:struct:pci_arbiter
pciauto_config_device	drivers/pci/pci_auto_old.c	/^int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)$/;"	f	typeref:typename:int
pciauto_config_init	drivers/pci/pci_auto_common.c	/^void pciauto_config_init(struct pci_controller *hose)$/;"	f	typeref:typename:void
pciauto_postscan_setup_bridge	drivers/pci/pci_auto_old.c	/^void pciauto_postscan_setup_bridge(struct pci_controller *hose,$/;"	f	typeref:typename:void
pciauto_prescan_setup_bridge	drivers/pci/pci_auto_old.c	/^void pciauto_prescan_setup_bridge(struct pci_controller *hose,$/;"	f	typeref:typename:void
pciauto_region_align	drivers/pci/pci_auto_common.c	/^void pciauto_region_align(struct pci_region *res, pci_size_t size)$/;"	f	typeref:typename:void
pciauto_region_allocate	drivers/pci/pci_auto_common.c	/^int pciauto_region_allocate(struct pci_region *res, pci_size_t size,$/;"	f	typeref:typename:int
pciauto_region_init	drivers/pci/pci_auto_common.c	/^void pciauto_region_init(struct pci_region *res)$/;"	f	typeref:typename:void
pciauto_setup_device	drivers/pci/pci_auto_old.c	/^void pciauto_setup_device(struct pci_controller *hose,$/;"	f	typeref:typename:void
pciauto_show_region	drivers/pci/pci_auto_common.c	/^static void pciauto_show_region(const char *name, struct pci_region *region)$/;"	f	typeref:typename:void	file:
pcibar	include/faraday/ftpci100.h	/^struct pcibar {$/;"	s
pciclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int pciclkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
pciclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int pciclkstctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
pciconf512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct pciconf512x {$/;"	s
pciconf512x_t	arch/powerpc/include/asm/immap_512x.h	/^} pciconf512x_t;$/;"	t	typeref:struct:pciconf512x
pciconf83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct pciconf83xx {$/;"	s
pciconf83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} pciconf83xx_t;$/;"	t	typeref:struct:pciconf83xx
pcictrl512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct pcictrl512x {$/;"	s
pcictrl512x_t	arch/powerpc/include/asm/immap_512x.h	/^} pcictrl512x_t;$/;"	t	typeref:struct:pcictrl512x
pcictrl83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct pcictrl83xx {$/;"	s
pcictrl83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} pcictrl83xx_t;$/;"	t	typeref:struct:pcictrl83xx
pcidelay_done	include/asm-generic/global_data.h	/^	int pcidelay_done;$/;"	m	struct:global_data	typeref:typename:int
pcidev	include/bios_emul.h	/^	pci_dev_t pcidev;$/;"	m	struct:__anoneb05efed0108	typeref:typename:pci_dev_t
pcidev	include/bios_emul.h	/^	struct udevice *pcidev;$/;"	m	struct:__anoneb05efed0108	typeref:struct:udevice *
pcidma512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct pcidma512x {$/;"	s
pcidma512x_t	arch/powerpc/include/asm/immap_512x.h	/^} pcidma512x_t;$/;"	t	typeref:struct:pcidma512x
pcie	arch/arm/dts/imx6qdl.dtsi	/^		pcie: pcie@0x01000000 {$/;"	l
pcie	arch/arm/dts/zynqmp.dtsi	/^		pcie: pcie@fd0e0000 {$/;"	l
pcie	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} pcie[3];$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0708[3]
pcie	drivers/pci/pci_tegra.c	/^	struct tegra_pcie *pcie;$/;"	m	struct:tegra_pcie_port	typeref:struct:tegra_pcie *	file:
pcie0	arch/arm/dts/keystone.dtsi	/^		pcie0: pcie@21800000 {$/;"	l
pcie1	arch/arm/dts/k2e.dtsi	/^		pcie1: pcie@21020000 {$/;"	l
pcie1_intc	arch/arm/dts/dra7.dtsi	/^				pcie1_intc: interrupt-controller {$/;"	l
pcie1_phy	arch/arm/dts/dra7.dtsi	/^			pcie1_phy: pciephy@4a094000 {$/;"	l
pcie2_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	pcie2_dclk_div: pcie2_dclk_div {$/;"	l
pcie2_intc	arch/arm/dts/dra7.dtsi	/^				pcie2_intc: interrupt-controller {$/;"	l
pcie2_phy	arch/arm/dts/dra7.dtsi	/^			pcie2_phy: pciephy@4a095000 {$/;"	l
pcie3_hose	board/freescale/mpc8544ds/mpc8544ds.c	/^static struct pci_controller pcie3_hose;$/;"	v	typeref:struct:pci_controller	file:
pcie_bus	drivers/pci/pci_mvebu.c	/^static struct mvebu_pcie pcie_bus[MAX_PEX];$/;"	v	typeref:struct:mvebu_pcie[]	file:
pcie_config0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 pcie_config0;$/;"	m	struct:src	typeref:typename:u32
pcie_config1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 pcie_config1;$/;"	m	struct:src	typeref:typename:u32
pcie_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	pcie_dclk_div: pcie_dclk_div {$/;"	l
pcie_dmer_disable	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static void pcie_dmer_disable(void)$/;"	f	typeref:typename:void	file:
pcie_dmer_enable	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static void pcie_dmer_enable(void)$/;"	f	typeref:typename:void	file:
pcie_get_base	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static u8* pcie_get_base(struct pci_controller *hose, unsigned int devfn)$/;"	f	typeref:typename:u8 *	file:
pcie_hose	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static struct pci_controller pcie_hose[CONFIG_SYS_PCIE_NR_PORTS];$/;"	v	typeref:struct:pci_controller[]	file:
pcie_init	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	int pcie_init;$/;"	m	struct:pei_data	typeref:typename:int
pcie_intc	arch/arm/dts/zynqmp.dtsi	/^			pcie_intc: legacy-interrupt-controller {$/;"	l	label:pcie
pcie_intc0	arch/arm/dts/keystone.dtsi	/^			pcie_intc0: legacy-interrupt-controller {$/;"	l	label:pcie0
pcie_intc1	arch/arm/dts/k2e.dtsi	/^			pcie_intc1: legacy-interrupt-controller {$/;"	l	label:pcie1
pcie_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pcie_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pcie_msi_intc0	arch/arm/dts/keystone.dtsi	/^			pcie_msi_intc0: msi-interrupt-controller {$/;"	l	label:pcie0
pcie_msi_intc1	arch/arm/dts/k2e.dtsi	/^			pcie_msi_intc1: msi-interrupt-controller {$/;"	l	label:pcie1
pcie_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const pcie_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
pcie_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^iomux_v3_cfg_t const pcie_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
pcie_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const pcie_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
pcie_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t pcie_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
pcie_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const pcie_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
pcie_perf_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_con2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_con2;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_rd_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_rd_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_rd_latency_samp_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_rd_latency_samp_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_rd_laterncy_acc_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_rd_laterncy_acc_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_rd_max_latency_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_rd_max_latency_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_working_cnt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_working_cnt;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_perf_wr_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pcie_perf_wr_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
pcie_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pcie_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pcie_phy_disable	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int pcie_phy_disable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
pcie_phy_disable	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static int pcie_phy_disable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
pcie_phy_enable	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int pcie_phy_enable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
pcie_phy_enable	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static int pcie_phy_enable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
pcie_phy_ops	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const struct tegra_xusb_phy_ops pcie_phy_ops = {$/;"	v	typeref:typename:const struct tegra_xusb_phy_ops	file:
pcie_phy_ops	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const struct tegra_xusb_phy_ops pcie_phy_ops = {$/;"	v	typeref:typename:const struct tegra_xusb_phy_ops	file:
pcie_phy_poll_ack	drivers/pci/pcie_imx.c	/^static int pcie_phy_poll_ack(void __iomem *dbi_base, int exp_val)$/;"	f	typeref:typename:int	file:
pcie_phy_read	drivers/pci/pcie_imx.c	/^static int pcie_phy_read(void __iomem *dbi_base, int addr , int *data)$/;"	f	typeref:typename:int	file:
pcie_phy_wait_ack	drivers/pci/pcie_imx.c	/^static int pcie_phy_wait_ack(void __iomem *dbi_base, int addr)$/;"	f	typeref:typename:int	file:
pcie_phy_write	drivers/pci/pcie_imx.c	/^static int pcie_phy_write(void __iomem *dbi_base, int addr, int data)$/;"	f	typeref:typename:int	file:
pcie_port_ioh	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	pcie_port_ioh;		\/* Offset 0x0029 *\/$/;"	m	struct:vpd_region	typeref:typename:u8
pcie_priv	arch/powerpc/cpu/mpc83xx/pcie.c	/^} pcie_priv[PCIE_MAX_BUSES] = {$/;"	v	typeref:struct:mpc83xx_pcie_priv[]
pcie_read_config	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static int pcie_read_config(struct pci_controller *hose, unsigned int devfn,$/;"	f	typeref:typename:int	file:
pcie_read_config_byte	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int pcie_read_config_byte(struct pci_controller *hose,pci_dev_t dev,int offset,u8 *val)$/;"	f	typeref:typename:int
pcie_read_config_dword	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int pcie_read_config_dword(struct pci_controller *hose,pci_dev_t dev,int offset,u32 *val)$/;"	f	typeref:typename:int
pcie_read_config_word	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int pcie_read_config_word(struct pci_controller *hose,pci_dev_t dev,int offset,u16 *val)$/;"	f	typeref:typename:int
pcie_regions_0	board/freescale/mpc8308rdb/mpc8308rdb.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_0	board/freescale/mpc8315erdb/mpc8315erdb.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_0	board/freescale/mpc837xemds/pci.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_0	board/freescale/mpc837xerdb/pci.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_0	board/gdsys/mpc8308/hrcon.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_0	board/gdsys/mpc8308/strider.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_0	board/mpc8308_p1m/mpc8308_p1m.c	/^static struct pci_region pcie_regions_0[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_1	board/freescale/mpc8315erdb/mpc8315erdb.c	/^static struct pci_region pcie_regions_1[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_1	board/freescale/mpc837xemds/pci.c	/^static struct pci_region pcie_regions_1[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_regions_1	board/freescale/mpc837xerdb/pci.c	/^static struct pci_region pcie_regions_1[] = {$/;"	v	typeref:struct:pci_region[]	file:
pcie_rst	board/gateworks/gw_ventana/common.h	/^	int pcie_rst;$/;"	m	struct:ventana	typeref:typename:int
pcie_setup_hoses	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^void pcie_setup_hoses(int busno)$/;"	f	typeref:typename:void
pcie_setup_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct pcie_setup_regs {$/;"	s
pcie_sson	board/gateworks/gw_ventana/common.h	/^	int pcie_sson;$/;"	m	struct:ventana	typeref:typename:int
pcie_system_bus_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct pcie_system_bus_regs {$/;"	s
pcie_write_config	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static int pcie_write_config(struct pci_controller *hose, unsigned int devfn,$/;"	f	typeref:typename:int	file:
pcie_write_config_byte	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int pcie_write_config_byte(struct pci_controller *hose,pci_dev_t dev,int offset,u8 val)$/;"	f	typeref:typename:int
pcie_write_config_dword	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int pcie_write_config_dword(struct pci_controller *hose,pci_dev_t dev,int offset,u32 val)$/;"	f	typeref:typename:int
pcie_write_config_word	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int pcie_write_config_word(struct pci_controller *hose,pci_dev_t dev,int offset,u16 val)$/;"	f	typeref:typename:int
pcie_xilinx_config_address	drivers/pci/pcie_xilinx.c	/^static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pcie_xilinx_ids	drivers/pci/pcie_xilinx.c	/^static const struct udevice_id pcie_xilinx_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pcie_xilinx_link_up	drivers/pci/pcie_xilinx.c	/^static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)$/;"	f	typeref:typename:bool	file:
pcie_xilinx_ofdata_to_platdata	drivers/pci/pcie_xilinx.c	/^static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pcie_xilinx_ops	drivers/pci/pcie_xilinx.c	/^static const struct dm_pci_ops pcie_xilinx_ops = {$/;"	v	typeref:typename:const struct dm_pci_ops	file:
pcie_xilinx_read_config	drivers/pci/pcie_xilinx.c	/^static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pcie_xilinx_write_config	drivers/pci/pcie_xilinx.c	/^static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
pciebrg_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct pciebrg_regs {$/;"	s
pciecrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pciecrc;		\/* 0x100 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pcielaw	arch/powerpc/include/asm/immap_83xx.h	/^	law83xx_t pcielaw[2];	\/* PCI Express local access window *\/$/;"	m	struct:sysconf83xx	typeref:typename:law83xx_t[2]
pciephy_rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 pciephy_rcr;$/;"	m	struct:src	typeref:typename:u32
pciesref_acs_clk_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	pciesref_acs_clk_ck: pciesref_acs_clk_ck {$/;"	l
pciexbar	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t pciexbar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
pciexbar	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t pciexbar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
pciexp	arch/powerpc/include/asm/immap_83xx.h	/^	pex83xx_t		pciexp[2];	\/* PCI Express Controller *\/$/;"	m	struct:immap	typeref:typename:pex83xx_t[2]
pciexp1_clk	arch/powerpc/include/asm/global_data.h	/^	u32 pciexp1_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
pciexp2_clk	arch/powerpc/include/asm/global_data.h	/^	u32 pciexp2_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
pciinfo	cmd/pci.c	/^static void pciinfo(struct udevice *bus, bool short_listing)$/;"	f	typeref:typename:void	file:
pciinfo	cmd/pci.c	/^void pciinfo(int bus_num, int short_pci_listing)$/;"	f	typeref:typename:void
pciinfo_header	cmd/pci.c	/^void pciinfo_header(int busnum, bool short_listing)$/;"	f	typeref:typename:void
pciints	board/amcc/luan/epld.h	/^    unsigned char  pciints;		\/* PCI0, PCI1 interrupts *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
pcilaw	arch/powerpc/include/asm/immap_512x.h	/^	law512x_t pcilaw[3];	\/* PCI Local Access Window 0-2 Registers *\/$/;"	m	struct:sysconf512x	typeref:typename:law512x_t[3]
pcilaw	arch/powerpc/include/asm/immap_83xx.h	/^	law83xx_t pcilaw[2];	\/* PCI local access window *\/$/;"	m	struct:sysconf83xx	typeref:typename:law83xx_t[2]
pcio	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pcio;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
pciuart0	arch/x86/dts/crownbay.dts	/^				pciuart0: uart@a,1 {$/;"	l
pciuart0	arch/x86/dts/dfi-bt700.dtsi	/^		pciuart0: uart@1e,3 {$/;"	l
pciuart0	arch/x86/dts/galileo.dts	/^		pciuart0: uart@14,5 {$/;"	l
pciuart1	arch/x86/dts/crownbay.dts	/^				pciuart1: uart@a,2 {$/;"	l
pciuart2	arch/x86/dts/crownbay.dts	/^				pciuart2: uart@a,3 {$/;"	l
pciuart3	arch/x86/dts/crownbay.dts	/^				pciuart3: uart@a,4 {$/;"	l
pck	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pck[4];		\/* 0x40 Programmable Clock Register 0 - 3 *\/$/;"	m	struct:at91_pmc	typeref:typename:u32[4]
pck0	arch/arm/dts/at91sam9260.dtsi	/^					pck0: pck0 {$/;"	l	label:pmc
pck0	arch/arm/dts/at91sam9261.dtsi	/^					pck0: pck0 {$/;"	l	label:pmc
pck0	arch/arm/dts/at91sam9263.dtsi	/^					pck0: pck0 {$/;"	l	label:pmc
pck0	arch/arm/dts/at91sam9g45.dtsi	/^					pck0: pck0 {$/;"	l	label:pmc
pck0	arch/arm/dts/sama5d2.dtsi	/^					pck0: pck0@8 {$/;"	l	label:pmc
pck1	arch/arm/dts/at91sam9260.dtsi	/^					pck1: pck1 {$/;"	l	label:pmc
pck1	arch/arm/dts/at91sam9261.dtsi	/^					pck1: pck1 {$/;"	l	label:pmc
pck1	arch/arm/dts/at91sam9263.dtsi	/^					pck1: pck1 {$/;"	l	label:pmc
pck1	arch/arm/dts/at91sam9g45.dtsi	/^					pck1: pck1 {$/;"	l	label:pmc
pck1	arch/arm/dts/sama5d2.dtsi	/^					pck1: pck1@9 {$/;"	l	label:pmc
pck2	arch/arm/dts/at91sam9261.dtsi	/^					pck2: pck2 {$/;"	l	label:pmc
pck2	arch/arm/dts/at91sam9263.dtsi	/^					pck2: pck2 {$/;"	l	label:pmc
pck2	arch/arm/dts/sama5d2.dtsi	/^					pck2: pck2@10 {$/;"	l	label:pmc
pck3	arch/arm/dts/at91sam9261.dtsi	/^					pck3: pck3 {$/;"	l	label:pmc
pck3	arch/arm/dts/at91sam9263.dtsi	/^					pck3: pck3 {$/;"	l	label:pmc
pckbd_leds	drivers/input/pc_keyb.c	/^void pckbd_leds(unsigned char leds)$/;"	f	typeref:typename:void
pclk_cdrex_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned pclk_cdrex_ratio;$/;"	m	struct:mem_timings	typeref:typename:unsigned
pclk_dbg_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned pclk_dbg_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
pclk_name	drivers/video/exynos/exynos_fb.c	/^	unsigned int pclk_name;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
pclk_name	include/exynos_lcd.h	/^	unsigned int pclk_name;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
pclrr_a	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_a;		\/* 0x24 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_addr	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_addr;		\/* 0x30 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_addr	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_addr;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_atah	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_atah;		\/* ATA High Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_atal	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_atal;		\/* ATA Low Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_b	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_b;		\/* 0x25 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_be	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_be;		\/* 0x25 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_be	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_be;		\/* 0x24 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_be	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_be;		\/* 0x3D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_be	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_be;		\/* 0x40 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_be	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_be;		\/* Flexbus Byte Enable Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_bs	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_bs;		\/* 0x34 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_bs	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_bs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_busctl	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_busctl;	\/* 0x24 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_busctl	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_busctl;	\/* 0x33 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_busctl	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_busctl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_busctl	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_busctl;	\/* 0x3F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_c	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_c;		\/* 0x26 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_cs;		\/* 0x26 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_cs;		\/* 0x25 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_cs;		\/* 0x35 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_cs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_cs;		\/* 0x3E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_cs;		\/* 0x41 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_cs	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_cs;		\/* Flexbus Chip-Select Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_d	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_d;		\/* 0x27 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_datah	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_datah;		\/* 0x31 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_datal	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_datal;		\/* 0x32 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_debug	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_debug;		\/* 0x49 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_dma	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_dma;		\/* DMA Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_dma	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_dma;		\/*0x32 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_dspi	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_dspi;		\/* 0x2A *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_dspi	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_dspi;		\/* 0x3F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_dspi	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_dspi;		\/* DSPI Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_dspi	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_dspi;		\/*0x3E *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_e	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_e;		\/* 0x28 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_etpu	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_etpu;		\/* 0x3C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_f	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_f;		\/* 0x29 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbadh	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fbadh;		\/* Flexbus AD High Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbadl	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fbadl;		\/* Flexbus AD Low Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbadmh	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fbadmh;	\/* Flexbus AD Med-High Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbadml	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fbadml;	\/* Flexbus AD Med-Low Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbcs	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_fbcs;		\/*0x31 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_fbctl;		\/* 0x26 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbctl	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_fbctl;		\/* 0x3C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fbctl	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fbctl;		\/* Flexbus Control Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fbctl	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_fbctl;		\/*0x30 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec0	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_fec0;		\/* 0x41 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fec0h	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_fec0h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fec0h	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fec0h;		\/* FEC0 High Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec0h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_fec0h;		\/*0x34 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec0l	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_fec0l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fec0l	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fec0l;		\/* FEC0 Low Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec0l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_fec0l;		\/*0x35 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec1h	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_fec1h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fec1h	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fec1h;		\/* FEC1 High Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec1h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_fec1h;		\/*0x36 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec1l	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_fec1l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fec1l	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_fec1l;		\/* FEC1 Low Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fec1l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_fec1l;		\/*0x37 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fech	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_fech;		\/* 0x2B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_fech;		\/* 0x3D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_fech;		\/* 0x4A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_feci2c;	\/* 0x27 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_feci2c;	\/* 0x37 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_feci2c;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_feci2c;	\/* 0x42 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_feci2c;	\/* 0x43 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_feci2c;	\/* FEC1 \/ I2C Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_feci2c	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_feci2c;	\/*0x38 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_fecl	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_fecl;		\/* 0x2C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_fecl;		\/* 0x3E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_fecl;		\/* 0x4B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_g	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_g;		\/* 0x2A *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_h	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_h;		\/* 0x2B *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_i	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_i;		\/* 0x2C *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_i2c	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_i2c;		\/* 0x27 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_j	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_j;		\/* 0x2D *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_k	arch/m68k/include/asm/immap_5441x.h	/^	u8 pclrr_k;		\/* 0x2E *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_lcdctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_lcdctl;	\/* 0x2C *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_lcdctlh	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_lcdctlh;	\/* 0x4C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_lcdctll	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_lcdctll;	\/* 0x4D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_lcddatah	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_lcddatah;	\/* 0x2D *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_lcddatah	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_lcddatah;	\/* 0x48 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_lcddatal	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_lcddatal;	\/* 0x2F *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_lcddatal	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_lcddatal;	\/* 0x4A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_lcddatam	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_lcddatam;	\/* 0x2E *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_lcddatam	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_lcddatam;	\/* 0x49 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_pci	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_pci;		\/* PCI Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_pcibg	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_pcibg;		\/*0x39 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_pcibr	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_pcibr;		\/*0x3A *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_psc1psc0	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_psc1psc0;	\/*0x3D *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_psc3psc2	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pclrr_psc3psc2;	\/*0x3C *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_pwm	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_pwm;		\/* 0x42 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_qspi	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_qspi;		\/* 0x28 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_qspi	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_qspi;		\/* 0x3A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_qspi	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_qspi;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_qspi	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_qspi;		\/* 0x46 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_res1	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_res1[4];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[4]
pclrr_res2	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_res2[2];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
pclrr_res3	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_res3;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_res4	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_res4;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_res5	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_res5[3];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
pclrr_sdhc	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_sdhc;		\/* 0x4B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_sdram	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_sdram;		\/* 0x36 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_sdram	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_sdram;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_simp0	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_simp0;		\/* 0x46 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_simp1	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_simp1;		\/* 0x45 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_ssi	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_ssi;		\/* 0x4C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_ssi	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_ssi;		\/* 0x3E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_ssi	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_ssi;		\/* 0x4B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_ssi	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_ssi;		\/* SSI Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_timer	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_timer;		\/* 0x29 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_timer	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_timer;		\/* 0x2B *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_timer	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_timer;		\/* 0x3B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_timer	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_timer;		\/* 0x47 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_timer	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_timer;		\/* 0x47 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_timer	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_timer;		\/* Timer Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_timerh	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_timerh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_timerl	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_timerl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uart	arch/m68k/include/asm/immap_520x.h	/^	u8 pclrr_uart;		\/* 0x2A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uart	arch/m68k/include/asm/immap_5227x.h	/^	u8 pclrr_uart;		\/* 0x29 *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_uart	arch/m68k/include/asm/immap_5301x.h	/^	u8 pclrr_uart;		\/* 0x48 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uart	arch/m68k/include/asm/immap_5329.h	/^	u8 pclrr_uart;		\/* 0x45 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uart	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_uart;		\/* UART Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_uarth	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_uarth;		\/* 0x38 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uarth	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_uarth;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uartl	arch/m68k/include/asm/immap_5235.h	/^	u8 pclrr_uartl;		\/* 0x39 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_uartl	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_uartl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_usb	arch/m68k/include/asm/immap_5445x.h	/^	u8 pclrr_usb;		\/* USB Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pclrr_usbh	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_usbh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pclrr_usbl	arch/m68k/include/asm/immap_5275.h	/^	u8 pclrr_usbl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pcm052_cr_settings	board/phytec/pcm052/pcm052.c	/^static struct ddrmc_cr_setting pcm052_cr_settings[] = {$/;"	v	typeref:struct:ddrmc_cr_setting[]	file:
pcm052_phy_settings	board/phytec/pcm052/pcm052.c	/^static struct ddrmc_phy_setting pcm052_phy_settings[] = {$/;"	v	typeref:struct:ddrmc_phy_setting[]	file:
pcm1772_write_reg	board/tqc/tqm5200/cmd_stk52xx.c	/^static void pcm1772_write_reg(unsigned char addr, unsigned char data)$/;"	f	typeref:typename:void	file:
pcmc_pbr0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr0;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr1;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr2	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr2;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr3	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr3;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr4;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr5	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr5;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr6	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr6;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pbr7	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pbr7;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_per	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_per;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pgcra	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pgcra;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pgcrb	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pgcrb;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pipr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pipr;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por0;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por1;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por2	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por2;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por3	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por3;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por4;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por5	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por5;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por6	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por6;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_por7	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_por7;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmc_pscr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	pcmc_pscr;$/;"	m	struct:pcmcia_conf	typeref:typename:uint
pcmcia_cis_ptr	drivers/pcmcia/ti_pci1410a.c	/^static u32 pcmcia_cis_ptr;$/;"	v	typeref:typename:u32	file:
pcmcia_conf	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct pcmcia_conf {$/;"	s
pcmcia_hardware_disable	drivers/pcmcia/tqm8xx_pcmcia.c	/^int pcmcia_hardware_disable(int slot)$/;"	f	typeref:typename:int
pcmcia_hardware_enable	drivers/pcmcia/tqm8xx_pcmcia.c	/^int pcmcia_hardware_enable(int slot)$/;"	f	typeref:typename:int
pcmcia_off	drivers/pcmcia/marubun_pcmcia.c	/^int pcmcia_off (void)$/;"	f	typeref:typename:int
pcmcia_off	drivers/pcmcia/mpc8xx_pcmcia.c	/^int pcmcia_off (void)$/;"	f	typeref:typename:int
pcmcia_off	drivers/pcmcia/ti_pci1410a.c	/^int pcmcia_off (void)$/;"	f	typeref:typename:int
pcmcia_on	drivers/pcmcia/marubun_pcmcia.c	/^int pcmcia_on (void)$/;"	f	typeref:typename:int
pcmcia_on	drivers/pcmcia/mpc8xx_pcmcia.c	/^int pcmcia_on (void)$/;"	f	typeref:typename:int
pcmcia_on	drivers/pcmcia/ti_pci1410a.c	/^int pcmcia_on(int ide_base_bus)$/;"	f	typeref:typename:int
pcmcia_pgcrx	drivers/pcmcia/mpc8xx_pcmcia.c	/^u_int *pcmcia_pgcrx[2] = {$/;"	v	typeref:typename:u_int * [2]
pcmcia_voltage_set	drivers/pcmcia/tqm8xx_pcmcia.c	/^int pcmcia_voltage_set(int slot, int vcc, int vpp)$/;"	f	typeref:typename:int
pcmcia_win_t	include/pcmcia.h	/^} pcmcia_win_t;$/;"	t	typeref:struct:__anone7bb971b0108
pcmciactrl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pcmciactrl;$/;"	m	struct:smc_regs	typeref:typename:uint32_t
pcmconf8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} pcmconf8xx_t;$/;"	t	typeref:struct:pcmcia_conf
pcmd	drivers/net/armada100_fec.h	/^	u32 pcmd;			\/* Port Command *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
pcmdc	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pcmdc;	\/* port CMD config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pcmdc	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pcmdc;	\/* port CMD config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pcmr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pcmr0;	\/* Power Management Control 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pcmr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pcmr1;	\/* Power Management Control 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pcmr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pcmr2;	\/* Power Management Control 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pcnet_check	drivers/net/pcnet.c	/^static int pcnet_check(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
pcnet_halt	drivers/net/pcnet.c	/^static void pcnet_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
pcnet_init	drivers/net/pcnet.c	/^static int pcnet_init(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
pcnet_init_block	drivers/net/pcnet.c	/^struct pcnet_init_block {$/;"	s	file:
pcnet_initialize	drivers/net/pcnet.c	/^int pcnet_initialize(bd_t *bis)$/;"	f	typeref:typename:int
pcnet_priv	drivers/net/pcnet.c	/^typedef struct pcnet_priv {$/;"	s	file:
pcnet_priv_t	drivers/net/pcnet.c	/^} pcnet_priv_t;$/;"	t	typeref:struct:pcnet_priv	file:
pcnet_probe	drivers/net/pcnet.c	/^static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)$/;"	f	typeref:typename:int	file:
pcnet_read_bcr	drivers/net/pcnet.c	/^static u16 pcnet_read_bcr(struct eth_device *dev, int index)$/;"	f	typeref:typename:u16	file:
pcnet_read_csr	drivers/net/pcnet.c	/^static u16 pcnet_read_csr(struct eth_device *dev, int index)$/;"	f	typeref:typename:u16	file:
pcnet_recv	drivers/net/pcnet.c	/^static int pcnet_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
pcnet_reset	drivers/net/pcnet.c	/^static void pcnet_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
pcnet_reset_8390	drivers/net/ne2000.c	/^static void pcnet_reset_8390(u8* addr)$/;"	f	typeref:typename:void	file:
pcnet_rx_head	drivers/net/pcnet.c	/^struct pcnet_rx_head {$/;"	s	file:
pcnet_send	drivers/net/pcnet.c	/^static int pcnet_send(struct eth_device *dev, void *packet, int pkt_len)$/;"	f	typeref:typename:int	file:
pcnet_tx_head	drivers/net/pcnet.c	/^struct pcnet_tx_head {$/;"	s	file:
pcnet_uncached_priv	drivers/net/pcnet.c	/^struct pcnet_uncached_priv {$/;"	s	file:
pcnet_virt_to_mem	drivers/net/pcnet.c	/^static inline pci_addr_t pcnet_virt_to_mem(const struct eth_device *dev,$/;"	f	typeref:typename:pci_addr_t	file:
pcnet_write_bcr	drivers/net/pcnet.c	/^static void pcnet_write_bcr(struct eth_device *dev, int index, u16 val)$/;"	f	typeref:typename:void	file:
pcnet_write_csr	drivers/net/pcnet.c	/^static void pcnet_write_csr(struct eth_device *dev, int index, u16 val)$/;"	f	typeref:typename:void	file:
pcnt	arch/x86/include/asm/arch-baytrail/global_nvs.h	/^	u8	pcnt;		\/* processor count *\/$/;"	m	struct:acpi_global_nvs	typeref:typename:u8
pcnt	arch/x86/include/asm/arch-quark/global_nvs.h	/^	u8	pcnt;		\/* processor count *\/$/;"	m	struct:acpi_global_nvs	typeref:typename:u8
pcnt_bits	fs/ubifs/ubifs.h	/^	int pcnt_bits;$/;"	m	struct:ubifs_info	typeref:typename:int
pcntr	arch/m68k/include/asm/timer.h	/^	u16 pcntr;		\/* 0x04 Count Register *\/$/;"	m	struct:pit_ctrl	typeref:typename:u16
pcntrl0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl0;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl1;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl10;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl11;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl12;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl13;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl14;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl15;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl2;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl3;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl4;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl5;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl6;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl7;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl8;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcntrl9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcntrl9;	\/* Pattern Match Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pcode_mailbox_read	arch/x86/cpu/broadwell/cpu.c	/^static u32 pcode_mailbox_read(u32 command)$/;"	f	typeref:typename:u32	file:
pcode_mailbox_write	arch/x86/cpu/broadwell/cpu.c	/^static int pcode_mailbox_write(u32 command, u32 data)$/;"	f	typeref:typename:int	file:
pcode_ready	arch/x86/cpu/broadwell/cpu.c	/^static int pcode_ready(void)$/;"	f	typeref:typename:int	file:
pconf	drivers/net/armada100_fec.h	/^	u32 pconf;			\/* Port configuration *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
pconf_ext	drivers/net/armada100_fec.h	/^	u32 pconf_ext;			\/* Port configuration extend *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
pcounter	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} pcounter[4];			\/* Performance Counter *\/$/;"	m	struct:ccsr_cci400	typeref:struct:ccsr_cci400::__anon245f04be0c08[4]
pcounter	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} pcounter[4];			\/* Performance Counter *\/$/;"	m	struct:ccsr_cci400	typeref:struct:ccsr_cci400::__anon58ea331d0808[4]
pcph15clrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph15clrr;	\/* Physical Core PH15 Clear Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph15psr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph15psr;	\/* Physical Core PH15 Prev Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph15setr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph15setr;	\/* Physical Core PH15 Set Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph15sr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph15sr;	\/* Physical Core PH15 Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph20clrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph20clrr;	\/* Physical Core PH20 Clear Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph20psr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph20psr;	\/* Physical Core PH20 Prev Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph20setr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph20setr;	\/* Physical Core PH20 Set Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph20sr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph20sr;	\/* Physical Core PH20 Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph30clrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph30clrr;	\/* Physical Core PH30 Clear Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph30psr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph30psr;	\/* Physical Core PH30 Prev Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph30setr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph30setr;	\/* Physical Core PH30 Set Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcph30sr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcph30sr;	\/* Physical Core PH30 Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcpu	drivers/net/mvpp2.c	/^	struct mvpp2_port_pcpu __percpu *pcpu;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2_port_pcpu __percpu *	file:
pcpu	drivers/net/mvpp2.c	/^	struct mvpp2_txq_pcpu __percpu *pcpu;$/;"	m	struct:mvpp2_tx_queue	typeref:struct:mvpp2_txq_pcpu __percpu *	file:
pcpw20sr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcpw20sr;	\/* Physical Core PW20 Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pcr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pcr;		\/* 0x000 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pcr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcr;		\/* 0x10c Periperial Control Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 pcr;		\/* 0x18 Panel Configuration Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
pcr	arch/m68k/include/asm/immap_5227x.h	/^	u32 pcr;		\/* PLL Control *\/$/;"	m	struct:pll	typeref:typename:u32
pcr	arch/m68k/include/asm/immap_5301x.h	/^	u32 pcr;		\/* 0x00 Ctrl *\/$/;"	m	struct:pll_ctrl	typeref:typename:u32
pcr	arch/m68k/include/asm/immap_5329.h	/^	u8 pcr;			\/* 0x04 Control Register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
pcr	arch/m68k/include/asm/immap_5441x.h	/^	u32 pcr;		\/* Control *\/$/;"	m	struct:pll	typeref:typename:u32
pcr	arch/m68k/include/asm/immap_5445x.h	/^	u32 pcr;		\/* PLL Control Register *\/$/;"	m	struct:pll	typeref:typename:u32
pcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcr;		\/* Port Phsyical Configuration Register *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
pcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pcr;		\/* 0x1010 - MCM CCB Port Configuration Register *\/$/;"	m	struct:ccsr_local_mcm	typeref:typename:uint
pcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pcr;		\/* 0xd0140 - Port 0 Phsyical Configuration RegisterRegister *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pcr	include/faraday/ftahbc020s.h	/^	unsigned int	pcr;		\/* 0x80	- Priority Ctrl Reg *\/$/;"	m	struct:ftahbc02s	typeref:typename:unsigned int
pcr	include/faraday/ftsdc010.h	/^	unsigned int	pcr;		\/* 0x34 - power control reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
pcr_a	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_a;		\/* 0x30 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_b	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_b;		\/* 0x32 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_c	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_c;		\/* 0x34 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_d	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_d;		\/* 0x36 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_e	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_e;		\/* 0x38 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_f	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_f;		\/* 0x3A *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_g	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_g;		\/* 0x3C *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_h	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_h;		\/* 0x3E *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_hregs	board/gdsys/p1022/controlcenterd-id.c	/^static struct h_reg pcr_hregs[24];$/;"	v	typeref:struct:h_reg[24]	file:
pcr_i	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_i;		\/* 0x40 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_j	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_j;		\/* 0x42 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_k	arch/m68k/include/asm/immap_5441x.h	/^	u16 pcr_k;		\/* 0x44 *\/$/;"	m	struct:gpio	typeref:typename:u16
pcr_pcrh	arch/m68k/include/asm/immap_5301x.h	/^	u8 pcr_pcrh;		\/* 0x78 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pcr_pcrl	arch/m68k/include/asm/immap_5301x.h	/^	u8 pcr_pcrl;		\/* 0x79 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pcs	include/andestech/andes_pcu.h	/^struct pcs {$/;"	s
pcs1	include/andestech/andes_pcu.h	/^	struct pcs	pcs1;		\/* 0xA0-0xB0: PCS1 (clock scaling) *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs2	include/andestech/andes_pcu.h	/^	struct pcs	pcs2;		\/* 0xC0-0xD0: PCS2 (AHB clock gating) *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs3	include/andestech/andes_pcu.h	/^	struct pcs	pcs3;		\/* 0xE0-0xF0: PCS3 (APB clock gating) *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs4	include/andestech/andes_pcu.h	/^	struct pcs	pcs4;		\/* 0x100-0x110: PCS4 main PLL scaling *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs5	include/andestech/andes_pcu.h	/^	struct pcs	pcs5;		\/* 0x120-0x130: PCS5 PCI PLL scaling *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs6	include/andestech/andes_pcu.h	/^	struct pcs	pcs6;		\/* 0x140-0x150: PCS6 AC97 PLL scaling *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs7	include/andestech/andes_pcu.h	/^	struct pcs	pcs7;		\/* 0x160-0x170: PCS7 GMAC PLL scaling *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs8	include/andestech/andes_pcu.h	/^	struct pcs	pcs8;		\/* 0x180-0x190: PCS8 voltage scaling *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcs9	include/andestech/andes_pcu.h	/^	struct pcs	pcs9;		\/* 0x1A0-0x1B0: PCS9 power control *\/$/;"	m	struct:andes_pcu	typeref:struct:pcs
pcscntrl	drivers/net/zynq_gem.c	/^	u32 pcscntrl;$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
pcseccsr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pcseccsr0;	\/* Port packet\/control symbol ECCSR 0 *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32
pcseccsr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pcseccsr0;	\/* 0xc064c - Port 0 packet\/control symbol error capture register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pcsr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcsr;		\/* 0x18 Peripheral Clock Status Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcsr	arch/m68k/include/asm/timer.h	/^	u16 pcsr;		\/* 0x00 Control and Status Register *\/$/;"	m	struct:pit_ctrl	typeref:typename:u16
pcsr	include/tsi148.h	/^	unsigned int pcsr;                    \/* 0x240         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
pcsr1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pcsr1;		\/* 0x108 Periperial Clock Status Register 1 *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pcsrsvd1	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd1[3];	\/* 0xB4-0xBC: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd2	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd2[3];	\/* 0xD4-0xDC: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd3	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd3[3];	\/* 0xF4-0xFC: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd4	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd4[3];	\/* 0x114-0x11C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd5	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd5[3];	\/* 0x134-0x13C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd6	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd6[3];	\/* 0x154-0x15C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd7	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd7[3];	\/* 0x174-0x17C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd8	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd8[3];	\/* 0x194-0x19C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[3]
pcsrsvd9	include/andestech/andes_pcu.h	/^	unsigned int	pcsrsvd9[93];	\/* 0x1B4-0x3FC: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[93]
pctbclkselr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pctbclkselr;	\/* Physical Core Time Base Clock Select *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pctbenr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pctbenr;	\/* Physical Core Time Base Enable Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
pctl	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	struct rk3036_ddr_pctl *pctl;$/;"	m	struct:rk3036_sdram_priv	typeref:struct:rk3036_ddr_pctl *	file:
pctl	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_ddr_pctl *pctl;$/;"	m	struct:chan_info	typeref:struct:rk3288_ddr_pctl *	file:
pctl_cfg	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void pctl_cfg(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
pctl_cfg	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void pctl_cfg(u32 channel, struct rk3288_ddr_pctl *pctl,$/;"	f	typeref:typename:void	file:
pctl_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	struct rk3036_pctl_timing pctl_timing;$/;"	m	struct:rk3036_ddr_timing	typeref:struct:rk3036_pctl_timing
pctl_timing	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_sdram_pctl_timing pctl_timing;$/;"	m	struct:rk3288_sdram_params	typeref:struct:rk3288_sdram_pctl_timing	file:
pcup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pcup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pd	arch/arm/cpu/armv7/mx5/clock.c	/^	u32 pd;$/;"	m	struct:pll_param	typeref:typename:u32	file:
pd	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct exynos_platform_mipi_dsim	*pd;$/;"	m	struct:mipi_dsim_device	typeref:struct:exynos_platform_mipi_dsim *
pd	drivers/power/domain/sandbox-power-domain-test.c	/^	struct power_domain pd;$/;"	m	struct:sandbox_power_domain_test	typeref:struct:power_domain	file:
pd	fs/jffs2/compr_lzo.c	/^#define pd(/;"	d	file:
pd_adma	arch/arm/dts/zynqmp.dtsi	/^		pd_adma: pd-adma {$/;"	l
pd_apll	arch/arm/dts/zynqmp.dtsi	/^		pd_apll: pd-apll {$/;"	l
pd_can0	arch/arm/dts/zynqmp.dtsi	/^		pd_can0: pd-can0 {$/;"	l
pd_can1	arch/arm/dts/zynqmp.dtsi	/^		pd_can1: pd-can1 {$/;"	l
pd_ddr	arch/arm/dts/zynqmp.dtsi	/^		pd_ddr: pd-ddr {$/;"	l
pd_dp	arch/arm/dts/zynqmp.dtsi	/^		pd_dp: pd-dp {$/;"	l
pd_dpll	arch/arm/dts/zynqmp.dtsi	/^		pd_dpll: pd-dpll {$/;"	l
pd_eth0	arch/arm/dts/zynqmp.dtsi	/^		pd_eth0: pd-eth0 {$/;"	l
pd_eth1	arch/arm/dts/zynqmp.dtsi	/^		pd_eth1: pd-eth1 {$/;"	l
pd_eth2	arch/arm/dts/zynqmp.dtsi	/^		pd_eth2: pd-eth2 {$/;"	l
pd_eth3	arch/arm/dts/zynqmp.dtsi	/^		pd_eth3: pd-eth3 {$/;"	l
pd_fast_exit	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 pd_fast_exit;\/* enable precharge powerdown fast-exit *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
pd_gdma	arch/arm/dts/zynqmp.dtsi	/^		pd_gdma: pd-gdma {$/;"	l
pd_gpio	arch/arm/dts/zynqmp.dtsi	/^		pd_gpio: pd-gpio {$/;"	l
pd_i2c0	arch/arm/dts/zynqmp.dtsi	/^		pd_i2c0: pd-i2c0 {$/;"	l
pd_i2c1	arch/arm/dts/zynqmp.dtsi	/^		pd_i2c1: pd-i2c1 {$/;"	l
pd_iopll	arch/arm/dts/zynqmp.dtsi	/^		pd_iopll: pd-iopll {$/;"	l
pd_isp	arch/arm/dts/exynos4x12.dtsi	/^	pd_isp: isp-power-domain@10023CA0 {$/;"	l
pd_lcd1	arch/arm/dts/exynos4210.dtsi	/^	pd_lcd1: lcd1-power-domain@10023CA0 {$/;"	l
pd_nand	arch/arm/dts/zynqmp.dtsi	/^		pd_nand: pd-nand {$/;"	l
pd_qspi	arch/arm/dts/zynqmp.dtsi	/^		pd_qspi: pd-qspi {$/;"	l
pd_rpll	arch/arm/dts/zynqmp.dtsi	/^		pd_rpll: pd-rpll {$/;"	l
pd_sata	arch/arm/dts/zynqmp.dtsi	/^		pd_sata: pd-sata {$/;"	l
pd_sd0	arch/arm/dts/zynqmp.dtsi	/^		pd_sd0: pd-sd0 {$/;"	l
pd_sd1	arch/arm/dts/zynqmp.dtsi	/^		pd_sd1: pd-sd1 {$/;"	l
pd_spi0	arch/arm/dts/zynqmp.dtsi	/^		pd_spi0: pd-spi0 {$/;"	l
pd_spi1	arch/arm/dts/zynqmp.dtsi	/^		pd_spi1: pd-spi1 {$/;"	l
pd_ttc0	arch/arm/dts/zynqmp.dtsi	/^		pd_ttc0: pd-ttc0 {$/;"	l
pd_ttc1	arch/arm/dts/zynqmp.dtsi	/^		pd_ttc1: pd-ttc1 {$/;"	l
pd_ttc2	arch/arm/dts/zynqmp.dtsi	/^		pd_ttc2: pd-ttc2 {$/;"	l
pd_ttc3	arch/arm/dts/zynqmp.dtsi	/^		pd_ttc3: pd-ttc3 {$/;"	l
pd_uart0	arch/arm/dts/zynqmp.dtsi	/^		pd_uart0: pd-uart0 {$/;"	l
pd_uart1	arch/arm/dts/zynqmp.dtsi	/^		pd_uart1: pd-uart1 {$/;"	l
pd_usb0	arch/arm/dts/zynqmp.dtsi	/^		pd_usb0: pd-usb0 {$/;"	l
pd_usb1	arch/arm/dts/zynqmp.dtsi	/^		pd_usb1: pd-usb1 {$/;"	l
pd_vpll	arch/arm/dts/zynqmp.dtsi	/^		pd_vpll: pd-vpll {$/;"	l
pdap	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pdap[104];	\/* Peripheral Domain Access Permissions *\/$/;"	m	struct:rdc_regs	typeref:typename:u32[104]
pdap	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	pdap[118];		\/* Peripheral Domain Access Permissions *\/$/;"	m	struct:rdc_regs	typeref:typename:u32[118]
pdat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pdat;		\/* Data Register *\/$/;"	m	struct:gpio_n	typeref:typename:u32
pdat	include/ioports.h	/^    unsigned char pdat:1;	\/* Port Data Register (35-2) *\/$/;"	m	struct:__anonc67861fe0208	typeref:typename:unsigned char:1
pdat	include/ioports.h	/^    unsigned int pdat;		\/* Port Data Register (35-3) *\/$/;"	m	struct:__anonc67861fe0108	typeref:typename:unsigned int
pdata	arch/arm/mach-at91/include/mach/atmel_usba_udc.h	/^struct usba_platform_data pdata = {$/;"	v	typeref:struct:usba_platform_data
pdata	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdata;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdata	drivers/block/sata_dwc.h	/^	unsigned char		*pdata;$/;"	m	struct:ata_port	typeref:typename:unsigned char *
pdata	drivers/block/sata_dwc.h	/^	unsigned char		*pdata;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned char *
pdata	drivers/i2c/at91_i2c.h	/^	const struct at91_i2c_pdata *pdata;$/;"	m	struct:at91_i2c_bus	typeref:typename:const struct at91_i2c_pdata *
pdata	drivers/mtd/nand/pxa3xx_nand.c	/^	struct pxa3xx_nand_platform_data *pdata;$/;"	m	struct:pxa3xx_nand_info	typeref:struct:pxa3xx_nand_platform_data *	file:
pdata	drivers/net/cs8900.h	/^	CS8900_REG pdata;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
pdata	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct dwc2_plat_otg_data *pdata;$/;"	m	struct:dwc2_udc	typeref:struct:dwc2_plat_otg_data *
pdata	include/scsi.h	/^	unsigned char	*	pdata;						\/* pointer to data		*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char *
pdatb	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdatb;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdatc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdatc;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdatd	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdatd;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdb_add_ptr	drivers/crypto/fsl/desc_constr.h	/^static inline void pdb_add_ptr(dma_addr_t *offset, dma_addr_t ptr)$/;"	f	typeref:typename:void
pdb_ecdsa_sign	drivers/crypto/fsl/desc.h	/^struct __packed pdb_ecdsa_sign {$/;"	s
pdb_ecdsa_verify	drivers/crypto/fsl/desc.h	/^struct __packed pdb_ecdsa_verify {$/;"	s
pdb_hdr	drivers/crypto/fsl/desc.h	/^	uint32_t pdb_hdr;$/;"	m	struct:pdb_ecdsa_sign	typeref:typename:uint32_t
pdb_hdr	drivers/crypto/fsl/desc.h	/^	uint32_t pdb_hdr;$/;"	m	struct:pdb_ecdsa_verify	typeref:typename:uint32_t
pdb_hdr	drivers/crypto/fsl/desc.h	/^	uint32_t pdb_hdr;$/;"	m	struct:pdb_mp_pub_k	typeref:typename:uint32_t
pdb_hdr	drivers/crypto/fsl/desc.h	/^	uint32_t pdb_hdr;$/;"	m	struct:pdb_mp_sign	typeref:typename:uint32_t
pdb_mp_pub_k	drivers/crypto/fsl/desc.h	/^struct __packed pdb_mp_pub_k {$/;"	s
pdb_mp_sign	drivers/crypto/fsl/desc.h	/^struct __packed pdb_mp_sign {$/;"	s
pdb_stat	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pdb_stat;	\/* 0xf00 - PCIE Debug Status *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pdc	arch/arm/imx-common/cpu.c	/^	uint32_t	pdc;$/;"	m	struct:esd_mmdc_regs	typeref:typename:uint32_t	file:
pdc	arch/arm/mach-at91/include/mach/at91_spi.h	/^	at91_pdc_t	pdc;$/;"	m	struct:at91_spi	typeref:typename:at91_pdc_t
pdcnt	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pdcnt = $mbar - 1 + 0x098$/;"	t
pdcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pdcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pdcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pdcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pdcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pdcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pdctl0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	pdctl0;		\/* 0x300 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
pdctl1	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	pdctl1;		\/* 0x304 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
pdd	include/andestech/andes_pcu.h	/^	unsigned int	pdd;		\/* PCSx PDD *\/$/;"	m	struct:pcs	typeref:typename:unsigned int
pddat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pddat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pdddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pdddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pddr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pddr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pddr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pddr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pddr_a	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_a;		\/* 0x0C *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_addr	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_addr;		\/* 0x10 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_addr	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_addr;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_atah	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_atah;		\/* ATA High Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_atal	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_atal;		\/* ATA Low Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_b	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_b;		\/* 0x0D *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_be	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_be;		\/* 0x0D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_be	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_be;		\/* 0x0C *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_be	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_be;		\/* 0x15 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_be	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_be;		\/* 0x18 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_be	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_be;		\/* Flexbus Byte Enable Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_bs	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_bs;		\/* 0x14 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_bs	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_bs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_busctl	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_busctl;		\/* 0x0C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_busctl	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_busctl;		\/* 0x13 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_busctl	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_busctl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_busctl	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_busctl;		\/* 0x17 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_c	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_c;		\/* 0x0E *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_cs;		\/* 0x0E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_cs;		\/* 0x0D *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_cs;		\/* 0x15 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_cs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_cs;		\/* 0x16 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_cs;		\/* 0x19 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_cs	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_cs;		\/* Flexbus Chip-Select Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_d	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_d;		\/* 0x0F *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_datah	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_datah;		\/* 0x11 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_datal	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_datal;		\/* 0x12 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_debug	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_debug;		\/* 0x21 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_dma	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_dma;		\/* DMA Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_dma	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_dma;		\/*0x12 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_dspi	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_dspi;		\/* 0x12 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_dspi	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_dspi;		\/* 0x17 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_dspi	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_dspi;		\/* DSPI Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_dspi	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_dspi;		\/*0x1E *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_e	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_e;		\/* 0x10 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_etpu	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_etpu;		\/* 0x1C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_f	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_f;		\/* 0x11 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbadh	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fbadh;		\/* Flexbus AD High Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbadl	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fbadl;		\/* Flexbus AD Low Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbadmh	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fbadmh;		\/* Flexbus AD Med-High Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbadml	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fbadml;		\/* Flexbus AD Med-Low Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbcs	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_fbcs;		\/*0x11 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_fbctl;		\/* 0x0E *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbctl	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_fbctl;		\/* 0x14 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fbctl	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fbctl;		\/* Flexbus Control Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fbctl	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_fbctl;		\/*0x10 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec0	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_fec0;		\/* 0x19 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fec0h	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_fec0h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fec0h	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fec0h;		\/* FEC0 High Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec0h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_fec0h;		\/*0x14 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec0l	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_fec0l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fec0l	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fec0l;		\/* FEC0 Low Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec0l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_fec0l;		\/*0x15 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec1h	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_fec1h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fec1h	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fec1h;		\/* FEC1 High Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec1h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_fec1h;		\/*0x16 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec1l	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_fec1l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fec1l	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_fec1l;		\/* FEC1 Low Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fec1l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_fec1l;		\/*0x17 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fech	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_fech;		\/* 0x13 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_fech;		\/* 0x14 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_fech;		\/* 0x22 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_feci2c;		\/* 0x0F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_feci2c;		\/* 0x17 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_feci2c;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_feci2c;		\/* 0x1A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_feci2c;		\/* 0x1B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_feci2c;		\/* FEC1 \/ I2C Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_feci2c	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_feci2c;		\/*0x18 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_fecl	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_fecl;		\/* 0x14 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_fecl;		\/* 0x15 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_fecl;		\/* 0x23 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_g	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_g;		\/* 0x12 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_h	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_h;		\/* 0x13 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_i	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_i;		\/* 0x14 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_i2c	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_i2c;		\/* 0x0F *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_j	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_j;		\/* 0x15 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_k	arch/m68k/include/asm/immap_5441x.h	/^	u8 pddr_k;		\/* 0x16 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_lcdctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_lcdctl;		\/* 0x14 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_lcdctlh	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_lcdctlh;	\/* 0x24 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_lcdctll	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_lcdctll;	\/* 0x25 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_lcddatah	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_lcddatah;	\/* 0x15 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_lcddatah	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_lcddatah;	\/* 0x21 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_lcddatal	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_lcddatal;	\/* 0x17 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_lcddatal	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_lcddatal;	\/* 0x23 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_lcddatam	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_lcddatam;	\/* 0x16 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_lcddatam	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_lcddatam;	\/* 0x22 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_pci	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_pci;		\/* PCI Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_pcibg	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_pcibg;		\/*0x19 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_pcibr	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_pcibr;		\/*0x1A *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_psc1psc0	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_psc1psc0;	\/*0x1D *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_psc3psc2	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pddr_psc3psc2;	\/*0x1C *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_pwm	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_pwm;		\/* 0x1A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_qspi	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_qspi;		\/* 0x10*\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_qspi	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_qspi;		\/* 0x1A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_qspi	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_qspi;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_qspi	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_qspi;		\/* 0x1E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_res1	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_res1[4];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[4]
pddr_res2	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_res2[2];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
pddr_res3	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_res3;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_res4	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_res4;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_res5	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_res5[3];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
pddr_sdhc	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_sdhc;		\/* 0x23 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_sdram	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_sdram;		\/* 0x16 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_sdram	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_sdram;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_simp0	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_simp0;		\/* 0x1E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_simp1	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_simp1;		\/* 0x1D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_ssi	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_ssi;		\/* 0x24 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_ssi	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_ssi;		\/* 0x16 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_ssi	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_ssi;		\/* SSI Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_timer	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_timer;		\/* 0x11 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_timer	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_timer;		\/* 0x13 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_timer	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_timer;		\/* 0x1B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_timer	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_timer;		\/* 0x1F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_timer	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_timer;		\/* 0x1F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_timer	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_timer;		\/* Timer Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_timerh	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_timerh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_timerl	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_timerl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uart	arch/m68k/include/asm/immap_520x.h	/^	u8 pddr_uart;		\/* 0x12 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uart	arch/m68k/include/asm/immap_5227x.h	/^	u8 pddr_uart;		\/* 0x11 *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_uart	arch/m68k/include/asm/immap_5301x.h	/^	u8 pddr_uart;		\/* 0x20 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uart	arch/m68k/include/asm/immap_5329.h	/^	u8 pddr_uart;		\/* 0x1D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uart	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_uart;		\/* UART Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_uarth	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_uarth;		\/* 0x18 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uarth	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_uarth;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uartl	arch/m68k/include/asm/immap_5235.h	/^	u8 pddr_uartl;		\/* 0x19 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_uartl	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_uartl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_usb	arch/m68k/include/asm/immap_5445x.h	/^	u8 pddr_usb;		\/* USB Port Data Direction Register *\/$/;"	m	struct:gpio	typeref:typename:u8
pddr_usbh	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_usbh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pddr_usbl	arch/m68k/include/asm/immap_5275.h	/^	u8 pddr_usbl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
pde	arch/x86/lib/physmem.c	/^struct pde {$/;"	s	file:
pdesc	cmd/mii.c	/^	const MII_field_desc_t *pdesc;$/;"	m	struct:_MII_field_desc_and_len_t	typeref:typename:const MII_field_desc_t *	file:
pdev	drivers/net/e1000.h	/^	pci_dev_t pdev;$/;"	m	struct:e1000_hw	typeref:typename:pci_dev_t
pdev	drivers/net/e1000.h	/^	struct udevice *pdev;$/;"	m	struct:e1000_hw	typeref:struct:udevice *
pdev	drivers/net/uli526x.c	/^	pci_dev_t pdev;$/;"	m	struct:uli526x_board_info	typeref:typename:pci_dev_t	file:
pdev	drivers/usb/gadget/atmel_usba_udc.h	/^	struct platform_device *pdev;$/;"	m	struct:usba_udc	typeref:struct:platform_device *
pdev	drivers/video/ati_radeon_fb.h	/^	struct pci_device_id	pdev;$/;"	m	struct:radeonfb_info	typeref:struct:pci_device_id
pdex2rd	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 pdex2rd;		\/* 0x7c: EMC_PDEX2RD *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
pdex2wr	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 pdex2wr;		\/* 0x78: EMC_PDEX2WR *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
pdfdocs	doc/DocBook/Makefile	/^pdfdocs: $(PDF)$/;"	t
pdir	include/ioports.h	/^    unsigned char pdir:1;	\/* Port Data Direction Register (35-3) *\/$/;"	m	struct:__anonc67861fe0208	typeref:typename:unsigned char:1
pdir	include/ioports.h	/^    unsigned int pdir;		\/* Port Data Direction Register (35-3) *\/$/;"	m	struct:__anonc67861fe0108	typeref:typename:unsigned int
pdira	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdira;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdirb	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdirb;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdirc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdirc;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdird	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pdird;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pdiv	arch/arm/cpu/armv7/iproc-common/armpll.c	/^	unsigned int pdiv;$/;"	m	struct:armpll_parameters	typeref:typename:unsigned int	file:
pdiv	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t pdiv; \/**< post divider value *\/$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
pdiv2	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^	u32 pdiv2;$/;"	m	struct:clk_synth	typeref:typename:u32
pdiv3	arch/arm/include/asm/arch-am33xx/clk_synthesizer.h	/^	u32 pdiv3;$/;"	m	struct:clk_synth	typeref:typename:u32
pdma	arch/arm/dts/rk3036.dtsi	/^                pdma: pdma@20078000 {$/;"	l
pdma	arch/arm/dts/socfpga.dtsi	/^			pdma: pdma@ffe01000 {$/;"	l
pdmic_clk	arch/arm/dts/sama5d2.dtsi	/^					pdmic_clk: pdmic_clk@48 {$/;"	l
pdmic_gclk	arch/arm/dts/sama5d2.dtsi	/^					pdmic_gclk: pdmic_gclk@48 {$/;"	l
pdn_con	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int	pdn_con;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
pdn_con	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int	pdn_con;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
pdn_pull	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int	pdn_pull;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
pdn_pull	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int	pdn_pull;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
pdpe	arch/x86/lib/physmem.c	/^struct pdpe {$/;"	s	file:
pdpt_t	arch/x86/lib/physmem.c	/^typedef struct pdpe pdpt_t[512];$/;"	t	typeref:struct:pdpe[512]	file:
pdr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	pdr;		\/* 0x04 PIO Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
pdr	arch/m68k/include/asm/coldfire/eport.h	/^	u8 pdr;		\/* 0x09 *\/$/;"	m	struct:eport	typeref:typename:u8
pdr	arch/m68k/include/asm/immap_5301x.h	/^	u32 pdr;		\/* 0x04 Divider *\/$/;"	m	struct:pll_ctrl	typeref:typename:u32
pdr	arch/m68k/include/asm/immap_5441x.h	/^	u32 pdr;		\/* Divider *\/$/;"	m	struct:pll	typeref:typename:u32
pdr	include/mpc5xxx.h	/^	volatile u8 pdr;		\/* SPI + 0x0F0D *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
pdr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 pdr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
pdr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pdr0;	\/* Post divider 0 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pdr1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 pdr1;$/;"	m	struct:clock_control_regs	typeref:typename:u32
pdr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pdr1;	\/* Post divider 1 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pdr2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 pdr2;$/;"	m	struct:clock_control_regs	typeref:typename:u32
pdr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pdr2;	\/* Post divider 2 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pdr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pdr3;	\/* Post divider 3 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pdr4	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pdr4;	\/* Post divider 4 *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
pdsp_cmd	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	pdsp_cmd;	\/* PDSP1 command interface	*\/$/;"	m	struct:qm_config	typeref:typename:u32
pdsp_ctl	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	pdsp_ctl;	\/* PDSP1 control registers	*\/$/;"	m	struct:qm_config	typeref:typename:u32
pdsp_iram	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	pdsp_iram;$/;"	m	struct:qm_config	typeref:typename:u32
pdsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	pdsr;		\/* 0x3C Pin Data Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
pdsr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 pdsr;		\/* 0x08 PIO Pin Data Status Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
pdst	include/linux/ethtool.h	/^	__be16	pdst;$/;"	m	struct:ethtool_tcpip4_spec	typeref:typename:__be16
pdstat0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	pdstat0;	\/* 0x200 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
pdstat1	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	pdstat1;	\/* 0x204 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
pdt_t	arch/x86/lib/physmem.c	/^typedef struct pde pdt_t[512];$/;"	t	typeref:struct:pde[512]	file:
pdts	arch/x86/lib/physmem.c	/^static pdt_t pdts[4] __aligned(4096);$/;"	v	typeref:typename:pdt_t[4]__aligned (4096)	file:
pdup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pdup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pe	drivers/block/sata_dwc.c	/^	struct ata_probe_ent	*pe;$/;"	m	struct:sata_dwc_device	typeref:struct:ata_probe_ent *	file:
peaddrcr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	peaddrcr;	\/* 0xe10 - PCI Error Address Capture Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
peaddrcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	peaddrcr;	\/* PCIX Error Addr Capture *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
peattrcr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	peattrcr;	\/* 0xe0c - PCI Error Attributes Capture Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
peattrcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	peattrcr;	\/* PCIX Error Attrs Capture *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
peb_buf	drivers/mtd/ubi/ubi.h	/^	void *peb_buf;$/;"	m	struct:ubi_device	typeref:typename:void *
peb_count	drivers/mtd/ubi/ubi.h	/^	int peb_count;$/;"	m	struct:ubi_device	typeref:typename:int
peb_count	drivers/mtd/ubispl/ubispl.h	/^	unsigned int			peb_count;$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned int
peb_count	include/ubispl.h	/^	u32			peb_count;$/;"	m	struct:ubispl_info	typeref:typename:u32
peb_offset	drivers/mtd/ubispl/ubispl.h	/^	unsigned int			peb_offset;$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned int
peb_offset	include/ubispl.h	/^	u32			peb_offset;$/;"	m	struct:ubispl_info	typeref:typename:u32
peb_size	drivers/mtd/ubi/ubi.h	/^	int peb_size;$/;"	m	struct:ubi_device	typeref:typename:int
peb_size	include/ubispl.h	/^	u32			peb_size;$/;"	m	struct:ubispl_info	typeref:typename:u32
pebs	drivers/mtd/ubi/ubi-media.h	/^	__be32 pebs[UBI_FM_MAX_POOL_SIZE];$/;"	m	struct:ubi_fm_scan_pool	typeref:typename:__be32[]
pebs	drivers/mtd/ubi/ubi.h	/^	int pebs[UBI_FM_MAX_POOL_SIZE];$/;"	m	struct:ubi_fm_pool	typeref:typename:int[]
pebs	drivers/mtd/ubispl/ubi-wrapper.h	/^	int pebs[UBI_FM_MAX_POOL_SIZE];$/;"	m	struct:ubi_fm_pool	typeref:typename:int[]
peccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	peccsr[3];	\/* Port error capture CSR *\/$/;"	m	struct:rio_phys_err_port	typeref:typename:u32[3]
peccsr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	peccsr1;	\/* 0xc0650 - Port 0 error capture command and status register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
peccsr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	peccsr2;	\/* 0xc0654 - Port 0 error capture command and status register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
peccsr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	peccsr3;	\/* 0xc0658 - Port 0 error capture command and status register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pecdr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pecdr;		\/* 0xe04 - PCI Error Capture Disable Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pecdr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pecdr;		\/* PCIX Error Capture Disable *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pecdr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pecdr;		\/* 0x8e10 - PEX Error Disable Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pecon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pecon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pecr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pecr;		\/* 0xd0e0c - Port Error Control Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pecr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pecr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pecr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pecr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pecr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pecr1;		\/* PCI Express control register 1 *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
pecr2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pecr2;		\/* PCI Express control register 2 *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
pedat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pedat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
peddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t peddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pedhcr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pedhcr;		\/* 0xe1c - PCI Error Error Data High Capture Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pedhcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pedhcr;		\/* PCIX Error Error Data High Capture *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pedlcr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pedlcr;		\/* 0xe18 - PCI Error Data Low Capture Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pedlcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pedlcr;		\/* PCIX Error Data Low Capture *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pedr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pedr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pedr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pedr;		\/* 0xe00 - PCI Error Detect Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pedr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pedr;		\/* PCIX Error Detect *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pedr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pedr;		\/* 0x8e00 - PEX Error Detect Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pedr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pedr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pedr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pedr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
peek	common/cli_hush.c	/^	int (*peek) (struct in_str *);$/;"	m	struct:in_str	typeref:typename:int (*)(struct in_str *)	file:
peek_buf	common/cli_hush.c	/^	char peek_buf[2];$/;"	m	struct:in_str	typeref:typename:char[2]	file:
peek_next	tools/buildman/kconfiglib.py	/^    def peek_next(self):$/;"	m	class:_Feed
peek_next	tools/buildman/kconfiglib.py	/^    def peek_next(self):$/;"	m	class:_FileFeed
peer	arch/powerpc/include/asm/fsl_pci.h	/^	u32	peer;		\/* 0xe08 - PCI Error Interrupt Enable Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
peer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	peer;		\/* PCIX Error Enable *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
peer	arch/powerpc/include/asm/immap_86xx.h	/^	uint	peer;		\/* 0x8e08 - PEX Error Interrupt Enable Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
peer_stat	arch/powerpc/include/asm/immap_86xx.h	/^	uint	peer_stat;	\/* 0x8e20 - PEX Error Capture Status Register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
peextaddrcr	arch/powerpc/include/asm/fsl_pci.h	/^	u32	peextaddrcr;	\/* 0xe14 - PCI	Error Extended Address Capture Register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
peextaddrcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	peextaddrcr;	\/* PCIX Error Extended Addr Capture *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pefcar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pefcar;	\/* Processing Element Features CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
pefcar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pefcar;		\/* 0xc0010 - Processing Element Features Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pei_boot_mode	arch/x86/include/asm/global_data.h	/^	enum pei_boot_mode_t pei_boot_mode;$/;"	m	struct:arch_global_data	typeref:enum:pei_boot_mode_t
pei_boot_mode_t	arch/x86/include/asm/global_data.h	/^enum pei_boot_mode_t {$/;"	g
pei_data	arch/x86/include/asm/arch-broadwell/pei_data.h	/^struct pei_data {$/;"	s
pei_data	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^struct __packed pei_data {$/;"	s
pei_data_usb2_port	arch/x86/cpu/broadwell/sdram.c	/^static inline void pei_data_usb2_port(struct pei_data *pei_data, int port,$/;"	f	typeref:typename:void	file:
pei_data_usb3_port	arch/x86/cpu/broadwell/sdram.c	/^static inline void pei_data_usb3_port(struct pei_data *pei_data, int port,$/;"	f	typeref:typename:void	file:
pei_meminfo	arch/x86/include/asm/global_data.h	/^	struct pei_memory_info pei_meminfo;	\/* PEI memory information *\/$/;"	m	struct:arch_global_data	typeref:struct:pei_memory_info
pei_memory_info	arch/x86/include/asm/global_data.h	/^struct pei_memory_info {$/;"	s
pei_version	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t pei_version;$/;"	m	struct:pei_data	typeref:typename:uint32_t
pei_version	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t pei_version;$/;"	m	struct:pei_data	typeref:typename:uint32_t
peim	drivers/net/mvgbe.h	/^	u32 peim;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pellccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pellccsr;	\/* Processing Element Logic Layer CCSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
pellccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pellccsr;	\/* 0xc004c - Processing Element Logic Layer Control Command and Status Register/;"	m	struct:ccsr_rio	typeref:typename:uint
pen	arch/arm/mach-uniphier/arm32/psci_smp.S	/^pen:	ldr	r0, [r2]$/;"	l
pending	include/serial.h	/^	int (*pending)(struct udevice *dev, bool input);$/;"	m	struct:dm_serial_ops	typeref:typename:int (*)(struct udevice * dev,bool input)
pending	lib/zlib/deflate.h	/^    uInt   pending;      \/* nb of bytes in the pending buffer *\/$/;"	m	struct:internal_state	typeref:typename:uInt
pending_buf	lib/zlib/deflate.h	/^    Bytef *pending_buf;  \/* output still pending *\/$/;"	m	struct:internal_state	typeref:typename:Bytef *
pending_buf_size	lib/zlib/deflate.h	/^    ulg   pending_buf_size; \/* size of pending_buf *\/$/;"	m	struct:internal_state	typeref:typename:ulg
pending_cause_rx	drivers/net/mvpp2.c	/^	u32 pending_cause_rx;$/;"	m	struct:mvpp2_port	typeref:typename:u32	file:
pending_num	arch/arm/include/asm/imx-common/dma.h	/^	unsigned int pending_num;$/;"	m	struct:mxs_dma_chan	typeref:typename:unsigned int
pending_out	lib/zlib/deflate.h	/^    Bytef *pending_out;  \/* next pending byte to output to the stream *\/$/;"	m	struct:internal_state	typeref:typename:Bytef *
pending_redirect	common/cli_hush.c	/^	struct redir_struct *pending_redirect;$/;"	m	struct:p_context	typeref:struct:redir_struct *	file:
pentry	arch/x86/include/asm/sfi.h	/^	u64				pentry[1];$/;"	m	struct:sfi_table_simple	typeref:typename:u64[1]
pepcsr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pepcsr0;	\/* 0xd0e10 - Port Error Packet\/Control Symbol Register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pepper_board_id	board/gumstix/pepper/board.h	/^struct pepper_board_id {$/;"	s
pepr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pepr1;		\/* 0xd0e14 - Port Error Packet Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pepr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pepr2;		\/* 0xd0e18 - Port Error Packet Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
per	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *per;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
per	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	per;		\/* 0x00 PIO Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
per0	arch/m68k/include/asm/immap_5301x.h	/^	u8 per0;		\/* 0x14 Channel 0 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per1	arch/m68k/include/asm/immap_5301x.h	/^	u8 per1;		\/* 0x15 Channel 1 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per2	arch/m68k/include/asm/immap_5301x.h	/^	u8 per2;		\/* 0x16 Channel 2 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per2_36x_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^per2_36x_dpll_param:$/;"	l
per2_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^per2_dpll_param:$/;"	l
per2_mod_reset	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	per2_mod_reset;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
per3	arch/m68k/include/asm/immap_5301x.h	/^	u8 per3;		\/* 0x17 Channel 3 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per4	arch/m68k/include/asm/immap_5301x.h	/^	u8 per4;		\/* 0x18 Channel 4 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per5	arch/m68k/include/asm/immap_5301x.h	/^	u8 per5;		\/* 0x19 Channel 5 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per6	arch/m68k/include/asm/immap_5301x.h	/^	u8 per6;		\/* 0x1A Channel 6 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per7	arch/m68k/include/asm/immap_5301x.h	/^	u8 per7;		\/* 0x1B Channel 7 Period *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
per_36x_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^per_36x_dpll_param:$/;"	l
per_abe_x1_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	per_abe_x1_dclk_div: per_abe_x1_dclk_div {$/;"	l
per_abe_x1_gfclk2_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	per_abe_x1_gfclk2_div: per_abe_x1_gfclk2_div {$/;"	l
per_base_clk	arch/arm/dts/socfpga.dtsi	/^						per_base_clk: per_base_clk {$/;"	l	label:periph_pll
per_bit_data	drivers/ddr/marvell/axp/ddr3_sdram.c	/^int per_bit_data[MAX_PUP_NUM][DQ_NUM];$/;"	v	typeref:typename:int[][]
per_child_auto_alloc_size	include/dm/device.h	/^	int per_child_auto_alloc_size;$/;"	m	struct:driver	typeref:typename:int
per_child_auto_alloc_size	include/dm/uclass.h	/^	int per_child_auto_alloc_size;$/;"	m	struct:uclass_driver	typeref:typename:int
per_child_platdata_auto_alloc_size	include/dm/device.h	/^	int per_child_platdata_auto_alloc_size;$/;"	m	struct:driver	typeref:typename:int
per_child_platdata_auto_alloc_size	include/dm/uclass.h	/^	int per_child_platdata_auto_alloc_size;$/;"	m	struct:uclass_driver	typeref:typename:int
per_clocks_enable	arch/arm/cpu/armv7/omap3/clock.c	/^void per_clocks_enable(void)$/;"	f	typeref:typename:void
per_cpu_ptr	drivers/net/mvpp2.c	/^#define per_cpu_ptr(/;"	d	file:
per_device_auto_alloc_size	include/dm/uclass.h	/^	int per_device_auto_alloc_size;$/;"	m	struct:uclass_driver	typeref:typename:int
per_device_platdata_auto_alloc_size	include/dm/uclass.h	/^	int per_device_platdata_auto_alloc_size;$/;"	m	struct:uclass_driver	typeref:typename:int
per_dpll_hs_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	per_dpll_hs_clk_div: per_dpll_hs_clk_div {$/;"	l
per_dpll_param	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^per_dpll_param:$/;"	l
per_dpll_params_1536mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params per_dpll_params_1536mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
per_dpll_params_768mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
per_dpll_params_768mhz_dra7xx	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
per_dpll_params_768mhz_es2	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
per_error	include/mpc5xxx.h	/^	volatile u32	per_error;	\/* INTR + 0x38 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
per_mask	include/mpc5xxx.h	/^	volatile u32	per_mask;	\/* INTR + 0x00 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
per_mod_reset	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	per_mod_reset;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
per_nand_mmc_clk	arch/arm/dts/socfpga.dtsi	/^						per_nand_mmc_clk: per_nand_mmc_clk {$/;"	l	label:periph_pll
per_pll	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	struct socfpga_clock_manager_per_pll per_pll;$/;"	m	struct:socfpga_clock_manager	typeref:struct:socfpga_clock_manager_per_pll
per_pri1	include/mpc5xxx.h	/^	volatile u32	per_pri1;	\/* INTR + 0x04 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
per_pri2	include/mpc5xxx.h	/^	volatile u32	per_pri2;	\/* INTR + 0x08 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
per_pri3	include/mpc5xxx.h	/^	volatile u32	per_pri3;	\/* INTR + 0x0c *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
per_qspi_clk	arch/arm/dts/socfpga.dtsi	/^						per_qspi_clk: per_qsi_clk {$/;"	l	label:periph_pll
per_status	include/mpc5xxx.h	/^	volatile u32	per_status;	\/* INTR + 0x30 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
perbaseclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	perbaseclk;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
perbaseclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t perbaseclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
percent	include/ec_commands.h	/^	uint32_t percent;$/;"	m	struct:ec_params_pwm_set_fan_duty	typeref:typename:uint32_t
percent	include/ec_commands.h	/^	uint8_t percent;$/;"	m	struct:ec_params_pwm_set_keyboard_backlight	typeref:typename:uint8_t
percent	include/ec_commands.h	/^	uint8_t percent;$/;"	m	struct:ec_response_pwm_get_keyboard_backlight	typeref:typename:uint8_t
perdiv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t perdiv;$/;"	m	struct:cm_config	typeref:typename:uint32_t
perev0config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perev0config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
perev1config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perev1config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
perev2config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perev2config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
perev3config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perev3config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
perevconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perevconfig;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
perevconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perevconfig0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
perevconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perevconfig1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
perevconfig2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perevconfig2;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
perevconfig3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perevconfig3;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
perevcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int perevcontrol;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
perf_control	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	perf_control;$/;"	m	struct:global_ctl_regs	typeref:typename:u32
perf_disable_clock	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ void perf_disable_clock(void)$/;"	f	typeref:typename:void
perf_disable_clock	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ void perf_disable_clock(void)$/;"	f	typeref:typename:void
perf_disable_clock	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ void perf_disable_clock(void)$/;"	f	typeref:typename:void
perf_disable_clock	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ void perf_disable_clock(void)$/;"	f	typeref:typename:void
perf_disable_clock	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^void perf_disable_clock(void)$/;"	f	typeref:typename:void
perf_level	arch/x86/include/asm/ist.h	/^	__u32 perf_level;$/;"	m	struct:ist_info	typeref:typename:__u32
perf_reset_and_start_timer	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^void perf_reset_and_start_timer()$/;"	f	typeref:typename:void
perf_reset_and_start_timer	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^void perf_reset_and_start_timer()$/;"	f	typeref:typename:void
perf_reset_and_start_timer	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^void perf_reset_and_start_timer()$/;"	f	typeref:typename:void
perf_reset_and_start_timer	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^void perf_reset_and_start_timer()$/;"	f	typeref:typename:void
perf_reset_and_start_timer	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^void perf_reset_and_start_timer(void)$/;"	f	typeref:typename:void
perf_reset_clock	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ void perf_reset_clock(void)$/;"	f	typeref:typename:void
perf_reset_clock	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ void perf_reset_clock(void)$/;"	f	typeref:typename:void
perf_reset_clock	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ void perf_reset_clock(void)$/;"	f	typeref:typename:void
perf_reset_clock	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ void perf_reset_clock(void)$/;"	f	typeref:typename:void
perf_reset_clock	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^void perf_reset_clock(void)$/;"	f	typeref:typename:void
perf_start_clock	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ void perf_start_clock(void)$/;"	f	typeref:typename:void
perf_start_clock	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ void perf_start_clock(void)$/;"	f	typeref:typename:void
perf_start_clock	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ void perf_start_clock(void)$/;"	f	typeref:typename:void
perf_start_clock	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ void perf_start_clock(void)$/;"	f	typeref:typename:void
perf_start_clock	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^void perf_start_clock(void)$/;"	f	typeref:typename:void
perfhpr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 perfhpr[2];		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
perfhpr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 perfhpr[2];		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
perfhpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 perfhpr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 perfhpr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr0	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 perfhpr0;		\/* 0x258 high priority read CAM register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 perfhpr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 perfhpr0;		\/* 0x1c4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr0	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 perfhpr0;		\/* 0x258 high priority read CAM register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 perfhpr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 perfhpr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 perfhpr1;		\/* 0x25c high priority read CAM register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 perfhpr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 perfhpr1;		\/* 0x1c8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfhpr1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 perfhpr1;		\/* 0x25c high priority read CAM register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 perflpr[2];		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
perflpr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 perflpr[2];		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
perflpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 perflpr0;		\/* 0x260 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 perflpr0;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 perflpr0;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 perflpr0;		\/* 0x260 low priority read CAM register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 perflpr0;		\/* 0x260 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 perflpr0;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 perflpr0;		\/* 0x1cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr0	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 perflpr0;		\/* 0x260 low priority read CAM register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 perflpr1;		\/* 0x264 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 perflpr1;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 perflpr1;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 perflpr1;		\/* 0x264 low priority read CAM register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 perflpr1;		\/* 0x264 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 perflpr1;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 perflpr1;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perflpr1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 perflpr1;		\/* 0x264 low priority read CAM register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perform_ddr_reset	arch/x86/cpu/quark/smc.c	/^void perform_ddr_reset(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
perform_jedec_init	arch/x86/cpu/quark/smc.c	/^void perform_jedec_init(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
perform_wake	arch/x86/cpu/quark/smc.c	/^void perform_wake(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
performance_monitor1_address_hi	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor1_address_hi;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor1_address_low	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor1_address_low;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor1_read_counter	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor1_read_counter;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor1_write_counter	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor1_write_counter;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor2_address_hi	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor2_address_hi;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor2_address_low	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor2_address_low;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor2_read_counter	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor2_read_counter;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor2_write_counter	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor2_write_counter;$/;"	m	struct:ddr512x	typeref:typename:u32
performance_monitor_config	arch/powerpc/include/asm/immap_512x.h	/^	u32 performance_monitor_config;$/;"	m	struct:ddr512x	typeref:typename:u32
perfshpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 perfshpr0;		\/* 0x258 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfshpr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 perfshpr0;		\/* 0x258 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfshpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 perfshpr1;		\/* 0x25c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfshpr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 perfshpr1;		\/* 0x25c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 perfwr[2];		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
perfwr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 perfwr[2];		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
perfwr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 perfwr0;		\/* 0x268 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 perfwr0;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 perfwr0;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 perfwr0;		\/* 0x268 write CAM register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 perfwr0;		\/* 0x268 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 perfwr0;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 perfwr0;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr0	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 perfwr0;		\/* 0x268 write CAM register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 perfwr1;		\/* 0x26c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 perfwr1;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 perfwr1;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 perfwr1;		\/* 0x26c write CAM register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 perfwr1;		\/* 0x26c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 perfwr1;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 perfwr1;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
perfwr1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 perfwr1;		\/* 0x26c write CAM register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
peri_3v3_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const peri_3v3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
peri_clk	arch/arm/dts/uniphier-common32.dtsi	/^			peri_clk: clock {$/;"	l
peri_clk	arch/arm/dts/uniphier-ld11.dtsi	/^			peri_clk: clock {$/;"	l
peri_clk	arch/arm/dts/uniphier-ld20.dtsi	/^			peri_clk: clock {$/;"	l
peri_clk_data	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct peri_clk_data {$/;"	s
peri_clk_data	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct peri_clk_data {$/;"	s
peri_clk_enable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static int peri_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
peri_clk_enable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static int peri_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
peri_clk_get_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static unsigned long peri_clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long	file:
peri_clk_get_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static unsigned long peri_clk_get_rate(struct clk *c)$/;"	f	typeref:typename:unsigned long	file:
peri_clk_ops	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^struct clk_ops peri_clk_ops = {$/;"	v	typeref:struct:clk_ops
peri_clk_ops	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^struct clk_ops peri_clk_ops = {$/;"	v	typeref:struct:clk_ops
peri_clk_set_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static int peri_clk_set_rate(struct clk *c, unsigned long rate)$/;"	f	typeref:typename:int	file:
peri_clk_set_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static int peri_clk_set_rate(struct clk *c, unsigned long rate)$/;"	f	typeref:typename:int	file:
peri_clkctl	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	peri_clkctl;	\/* 0x48 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
peri_clock	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct peri_clock {$/;"	s
peri_clock	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct peri_clock {$/;"	s
peri_name	arch/arm/cpu/armv8/zynqmp/slcr.c	/^	const char *peri_name;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:const char *	file:
peri_name	arch/arm/mach-zynq/slcr.c	/^	const char *peri_name;$/;"	m	struct:zynq_slcr_mio_get_status	typeref:typename:const char *	file:
peri_rst	arch/arm/dts/uniphier-common32.dtsi	/^			peri_rst: reset {$/;"	l
peri_rst	arch/arm/dts/uniphier-ld11.dtsi	/^			peri_rst: reset {$/;"	l
peri_rst	arch/arm/dts/uniphier-ld20.dtsi	/^			peri_rst: reset {$/;"	l
peri_sc	board/hisilicon/hikey/hikey.c	/^struct peri_sc_periph_regs *peri_sc =$/;"	v	typeref:struct:peri_sc_periph_regs *
peri_sc_periph_regs	arch/arm/include/asm/arch-hi6220/hi6220.h	/^struct peri_sc_periph_regs {$/;"	s
peri_vco_base	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t peri_vco_base;$/;"	m	struct:cm_config	typeref:typename:uint32_t
peri_vote_msk0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 peri_vote_msk0;	\/*0x900*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
peri_vote_msk1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 peri_vote_msk1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
peri_votedis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 peri_votedis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
peri_voteen	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 peri_voteen;	\/*0x8F0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
peri_votestat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 peri_votestat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
peri_votestat0_msk	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 peri_votestat0_msk;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
peric_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	peric_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
peric_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	peric_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
peric_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	peric_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
peric_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	peric_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
peridmac_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 peridmac_con[4];$/;"	m	struct:rk3288_grf	typeref:typename:u32[4]
perilp_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 perilp_con[9];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[9]
perilp_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 perilp_status;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
period	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 period;$/;"	m	struct:cspi_regs	typeref:typename:u32
period	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 period;$/;"	m	struct:cspi_regs	typeref:typename:u32
period	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 period;$/;"	m	struct:cspi_regs	typeref:typename:u32
period	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 period;$/;"	m	struct:cspi_regs	typeref:typename:u32
period	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 period;$/;"	m	struct:cspi_regs	typeref:typename:u32
period	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 period;$/;"	m	struct:cspi_regs	typeref:typename:u32
period	arch/arm/mach-exynos/include/mach/pwm_backlight.h	/^	int period;$/;"	m	struct:pwm_backlight_data	typeref:typename:int
period	drivers/misc/status_led.c	/^	int period;$/;"	m	struct:__anonb49c34f70108	typeref:typename:int	file:
period	drivers/usb/gadget/pxa25x_udc.h	/^	ulong					period;$/;"	m	struct:pxa25x_watchdog	typeref:typename:ulong
period_hpr	arch/arm/include/asm/arch-rockchip/pwm.h	/^	u32 period_hpr;$/;"	m	struct:rk3288_pwm	typeref:typename:u32
period_ns	drivers/power/regulator/pwm_regulator.c	/^	int period_ns;$/;"	m	struct:pwm_regulator_info	typeref:typename:int	file:
period_ns	drivers/video/pwm_backlight.c	/^	uint period_ns;$/;"	m	struct:pwm_backlight_priv	typeref:typename:uint	file:
periodh	drivers/timer/altera_timer.c	/^	u32	periodh;	\/* Timeout period high *\/$/;"	m	struct:altera_timer_regs	typeref:typename:u32	file:
periodic_list	drivers/usb/host/ehci.h	/^	uint32_t *periodic_list;$/;"	m	struct:ehci_ctrl	typeref:typename:uint32_t *
periodic_list_base	arch/arm/include/asm/arch-tegra/usb.h	/^	uint periodic_list_base;$/;"	m	struct:usb_ctlr	typeref:typename:uint
periodic_schedules	drivers/usb/host/ehci.h	/^	int periodic_schedules;$/;"	m	struct:ehci_ctrl	typeref:typename:int
periodic_unlink	drivers/usb/host/ohci-hcd.c	/^static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,$/;"	f	typeref:typename:void	file:
periodiclistbase	arch/arm/include/asm/ehci-omap.h	/^	u32 periodiclistbase;	\/* 0x24 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
periodiclistbase	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 periodiclistbase;	\/* periodiclistbase *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
periodicstart	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	periodicstart;$/;"	m	struct:ohci_regs	typeref:typename:__u32
periodicstart	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	periodicstart;$/;"	m	struct:ohci_regs	typeref:typename:__u32
periodicstart	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 periodicstart;$/;"	m	struct:ohci_regs	typeref:typename:__u32
periodicstart	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 periodicstart;$/;"	m	struct:ohci_regs	typeref:typename:__u32
periodicstart	drivers/usb/host/ohci.h	/^	__u32	periodicstart;$/;"	m	struct:ohci_regs	typeref:typename:__u32
periodl	drivers/timer/altera_timer.c	/^	u32	periodl;	\/* Timeout period low *\/$/;"	m	struct:altera_timer_regs	typeref:typename:u32	file:
periph1_clken	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 periph1_clken;	\/* 0x2C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
periph1_rst	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 periph1_rst;	\/* 0x38 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
periph2_rst	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 periph2_rst;	\/* 0x3C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
periph_calc_two_divs	arch/arm/mach-zynq/clk.c	/^static unsigned long periph_calc_two_divs(unsigned long cur_rate,$/;"	f	typeref:typename:unsigned long	file:
periph_clk_cfg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 periph_clk_cfg;	\/* 0x28 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
periph_clk_enable	drivers/clk/at91/clk-peripheral.c	/^static int periph_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
periph_clk_init	arch/arm/include/asm/arch-tegra/clock.h	/^struct periph_clk_init {$/;"	s
periph_clk_init_table	arch/arm/mach-tegra/tegra114/clock.c	/^struct periph_clk_init periph_clk_init_table[] = {$/;"	v	typeref:struct:periph_clk_init[]
periph_clk_init_table	arch/arm/mach-tegra/tegra124/clock.c	/^struct periph_clk_init periph_clk_init_table[] = {$/;"	v	typeref:struct:periph_clk_init[]
periph_clk_init_table	arch/arm/mach-tegra/tegra20/clock.c	/^struct periph_clk_init periph_clk_init_table[] = {$/;"	v	typeref:struct:periph_clk_init[]
periph_clk_init_table	arch/arm/mach-tegra/tegra210/clock.c	/^struct periph_clk_init periph_clk_init_table[] = {$/;"	v	typeref:struct:periph_clk_init[]
periph_clk_init_table	arch/arm/mach-tegra/tegra30/clock.c	/^struct periph_clk_init periph_clk_init_table[] = {$/;"	v	typeref:struct:periph_clk_init[]
periph_clk_ops	drivers/clk/at91/clk-peripheral.c	/^static struct clk_ops periph_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
periph_clock	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^enum periph_clock {$/;"	g
periph_clock	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^enum periph_clock {$/;"	g
periph_clock	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^enum periph_clock {$/;"	g
periph_get_rate	drivers/clk/at91/clk-peripheral.c	/^static ulong periph_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
periph_id	arch/arm/include/asm/arch-hi6220/periph.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-rockchip/periph.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-stm32f4/stm32_periph.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-stm32f7/stm32_periph.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-stv0991/stv0991_periph.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-tegra/clock.h	/^	enum periph_id periph_id;$/;"	m	struct:periph_clk_init	typeref:enum:periph_id
periph_id	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/mach-exynos/include/mach/periph.h	/^enum periph_id {$/;"	g
periph_id	arch/arm/mach-s5pc1xx/include/mach/periph.h	/^enum periph_id {$/;"	g
periph_id	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^enum periph_id {$/;"	g	file:
periph_id	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^enum periph_id {$/;"	g	file:
periph_id	drivers/spi/exynos_spi.c	/^	enum periph_id periph_id;	\/* Peripheral ID for this device *\/$/;"	m	struct:exynos_spi_priv	typeref:enum:periph_id	file:
periph_id	drivers/spi/exynos_spi.c	/^	enum periph_id periph_id;$/;"	m	struct:exynos_spi_platdata	typeref:enum:periph_id	file:
periph_id	drivers/spi/tegra114_spi.c	/^	int periph_id;$/;"	m	struct:tegra114_spi_priv	typeref:typename:int	file:
periph_id	drivers/spi/tegra20_sflash.c	/^	int periph_id;$/;"	m	struct:tegra20_sflash_priv	typeref:typename:int	file:
periph_id	drivers/spi/tegra20_slink.c	/^	int periph_id;$/;"	m	struct:tegra30_spi_priv	typeref:typename:int	file:
periph_id	drivers/spi/tegra210_qspi.c	/^	int periph_id;$/;"	m	struct:tegra210_qspi_priv	typeref:typename:int	file:
periph_id	drivers/spi/tegra_spi.h	/^	enum periph_id periph_id;$/;"	m	struct:tegra_spi_platdata	typeref:enum:periph_id
periph_id	drivers/usb/host/ehci-tegra.c	/^	enum periph_id periph_id;\/* peripheral id *\/$/;"	m	struct:fdt_usb	typeref:enum:periph_id	file:
periph_id0	drivers/mmc/arm_pl180_mmci.h	/^	u32 periph_id0;		\/* 0xFE0 mmc Peripheral Identifcation Register*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
periph_id1	drivers/mmc/arm_pl180_mmci.h	/^	u32 periph_id1;		\/* 0xFE4*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
periph_id2	drivers/mmc/arm_pl180_mmci.h	/^	u32 periph_id2;		\/* 0xFE8*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
periph_id3	drivers/mmc/arm_pl180_mmci.h	/^	u32 periph_id3;		\/* 0xFEC*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
periph_id_0	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	periph_id_0;			\/* 0x1FE0 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
periph_id_1	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	periph_id_1;$/;"	m	struct:nic301_registers	typeref:typename:u32
periph_id_2	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	periph_id_2;$/;"	m	struct:nic301_registers	typeref:typename:u32
periph_id_3	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	periph_id_3;$/;"	m	struct:nic301_registers	typeref:typename:u32
periph_id_4	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	periph_id_4;			\/* 0x1FD0 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
periph_id_to_internal_id	arch/arm/mach-tegra/tegra114/clock.c	/^static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {$/;"	v	typeref:typename:s8[]	file:
periph_id_to_internal_id	arch/arm/mach-tegra/tegra124/clock.c	/^static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {$/;"	v	typeref:typename:s8[]	file:
periph_id_to_internal_id	arch/arm/mach-tegra/tegra20/clock.c	/^static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {$/;"	v	typeref:typename:s8[]	file:
periph_id_to_internal_id	arch/arm/mach-tegra/tegra210/clock.c	/^static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {$/;"	v	typeref:typename:s8[]	file:
periph_id_to_internal_id	arch/arm/mach-tegra/tegra30/clock.c	/^static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {$/;"	v	typeref:typename:s8[]	file:
periph_pll	arch/arm/dts/socfpga.dtsi	/^					periph_pll: periph_pll {$/;"	l
periph_ratio	arch/arm/mach-exynos/clock_init.h	/^	unsigned periph_ratio;$/;"	m	struct:arm_clk_ratios	typeref:typename:unsigned
periphc_internal_id	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^enum periphc_internal_id {$/;"	g
periphc_internal_id	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^enum periphc_internal_id {$/;"	g
periphc_internal_id	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^enum periphc_internal_id {$/;"	g
periphc_internal_id	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^enum periphc_internal_id {$/;"	g
periphc_internal_id	arch/arm/mach-tegra/tegra20/clock.c	/^enum periphc_internal_id {$/;"	g	file:
periphc_internal_id_isvalid	arch/arm/include/asm/arch-tegra/clock.h	/^#define periphc_internal_id_isvalid(/;"	d
periphc_internal_id_isvalid	arch/arm/mach-tegra/clock.c	/^#define periphc_internal_id_isvalid(/;"	d	file:
peripheral_enable	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^static void peripheral_enable(void)$/;"	f	typeref:typename:void	file:
peripheral_free	arch/blackfin/cpu/gpio.c	/^void peripheral_free(unsigned short per)$/;"	f	typeref:typename:void
peripheral_free	drivers/gpio/adi_gpio2.c	/^void peripheral_free(unsigned short per)$/;"	f	typeref:typename:void
peripheral_free_list	arch/blackfin/cpu/gpio.c	/^void peripheral_free_list(const unsigned short per[])$/;"	f	typeref:typename:void
peripheral_free_list	drivers/gpio/adi_gpio2.c	/^void peripheral_free_list(const unsigned short per[])$/;"	f	typeref:typename:void
peripheral_request	drivers/gpio/adi_gpio2.c	/^int peripheral_request(unsigned short per, const char *label)$/;"	f	typeref:typename:int
peripheral_request_list	arch/blackfin/cpu/gpio.c	/^int peripheral_request_list(const unsigned short per[], const char *label)$/;"	f	typeref:typename:int
peripheral_request_list	drivers/gpio/adi_gpio2.c	/^int peripheral_request_list(const unsigned short per[], const char *label)$/;"	f	typeref:typename:int
periphid0	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int periphid0;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
periphid1	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int periphid1;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
periphid2	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int periphid2;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
periphid3	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int periphid3;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
periphs	arch/arm/dts/meson-gxbb.dtsi	/^		periphs: periphs@c8834000 {$/;"	l
peripid0	include/linux/mtd/fsmc_nand.h	/^	u32 peripid0;			\/* 0xfe0 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
peripid1	include/linux/mtd/fsmc_nand.h	/^	u32 peripid1;			\/* 0xfe4 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
peripid2	include/linux/mtd/fsmc_nand.h	/^	u32 peripid2;			\/* 0xfe8 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
peripid3	include/linux/mtd/fsmc_nand.h	/^	u32 peripid3;			\/* 0xfec *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
perlistbase	include/usb/ehci-ci.h	/^	u32	perlistbase;	\/* 0x154 - Periodic List Base$/;"	m	struct:usb_ehci	typeref:typename:u32
perm	lib/bzip2/bzlib_private.h	/^      Int32    perm   [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[][]
permanent_address	include/efi_api.h	/^	struct efi_mac_address permanent_address;$/;"	m	struct:efi_simple_network_mode	typeref:struct:efi_mac_address
perms	drivers/spmi/spmi-sandbox.c	/^	u8 perms; \/* Access permissions *\/$/;"	m	struct:sandbox_emul_fake_regs	typeref:typename:u8	file:
pernandsdmmcclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	pernandsdmmcclk;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
pernandsdmmcclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t pernandsdmmcclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
perqspiclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	perqspiclk;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
perqspiclk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t perqspiclk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
perr_cap0	arch/powerpc/include/asm/fsl_pci.h	/^	u32	perr_cap0;	\/* 0xe28 - PCIE Error Capture Register 0 *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
perr_cap0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	perr_cap0;	\/* 0x8e28 - PEX Error Capture Register 0 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
perr_cap1	arch/powerpc/include/asm/fsl_pci.h	/^	u32	perr_cap1;	\/* 0xe2c - PCIE Error Capture Register 1 *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
perr_cap1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	perr_cap1;	\/* 0x8e2c - PEX Error Capture Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
perr_cap2	arch/powerpc/include/asm/fsl_pci.h	/^	u32	perr_cap2;	\/* 0xe30 - PCIE Error Capture Register 2 *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
perr_cap2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	perr_cap2;	\/* 0x8e30 - PEX Error Capture Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
perr_cap3	arch/powerpc/include/asm/fsl_pci.h	/^	u32	perr_cap3;	\/* 0xe34 - PCIE Error Capture Register 3 *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
perr_cap3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	perr_cap3;	\/* 0x8e34 - PEX Error Capture Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
perrcr	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	perrcr;		\/* 0x068 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
perror_fname	tools/ifdtool.c	/^static int perror_fname(const char *fmt, const char *fname)$/;"	f	typeref:typename:int	file:
perror_with_name	tools/gdb/remote.c	/^#define perror_with_name /;"	d	file:
perrpr	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	perrpr;		\/* 0x060 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
persrc	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t persrc;$/;"	m	struct:cm_config	typeref:typename:uint32_t
pertr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pertr;		\/* 0xd0e28 - Port Error Recovery Threshold Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pescsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pescsr;	\/* Port Error and Status CSR *\/$/;"	m	struct:rio_lp_serial_port	typeref:typename:u32
pescsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pescsr;		\/* 0xc0158 - Port Error and Status Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
peuiae	drivers/net/mvgbe.h	/^	u32 peuiae;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
peup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	peup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pex1_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex1_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pex1liodnr;	\/* PCI Express 1 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pex1msiir	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pex1msiir;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1msir	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pex1msir;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1pmrdsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex1pmrdsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1pmwrcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex1pmwrcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1rdmmsgrqsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex1rdmmsgrqsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1rdmsgpldlsbsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex1rdmsgpldlsbsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex1rdmsgpldmsbsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex1rdmsgpldmsbsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pex2;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex2_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pex2liodnr;	\/* PCI Express 2 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pex2msir	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pex2msir;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2pmrdsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex2pmrdsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2pmwrcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex2pmwrcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2rdmmsgrqsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex2rdmmsgrqsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2rdmsgpldlsbsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex2rdmsgpldlsbsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex2rdmsgpldmsbsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pex2rdmsgpldmsbsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex3liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pex3liodnr;	\/* PCI Express 3 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pex3msiir	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pex3msiir;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex3msir	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pex3msir;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pex4liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pex4liodnr;	\/* PCI Express 4 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pex83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct pex83xx {$/;"	s
pex83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} pex83xx_t;$/;"	t	typeref:struct:pex83xx
pex_ack_replay_timeout	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_ack_replay_timeout;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_and_usb3_power_up_serdes_rev1_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_and_usb3_power_up_serdes_rev1_params[] = {$/;"	v	typeref:struct:op_params[]
pex_and_usb3_power_up_serdes_rev2_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_and_usb3_power_up_serdes_rev2_params[] = {$/;"	v	typeref:struct:op_params[]
pex_and_usb3_speed_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_and_usb3_speed_config_params[] = {$/;"	v	typeref:struct:op_params[]
pex_and_usb3_tx_config_params1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_and_usb3_tx_config_params1[] = {$/;"	v	typeref:struct:op_params[]
pex_and_usb3_tx_config_params2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_and_usb3_tx_config_params2[] = {$/;"	v	typeref:struct:op_params[]
pex_and_usb3_tx_config_params3	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_and_usb3_tx_config_params3[] = {$/;"	v	typeref:struct:op_params[]
pex_aspm_req_timer	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_aspm_req_timer;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_bar_pf	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_bar_pf;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_bar_sel	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_bar_sel;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_bar_sizel	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_bar_sizel;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_by4_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_by4_config_params[] = {$/;"	v	typeref:struct:op_params[]
pex_cbs_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_cbs_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_cfg_header	arch/powerpc/include/asm/immap_83xx.h	/^	u8 pex_cfg_header[0x404];$/;"	m	struct:pex83xx	typeref:typename:u8[0x404]
pex_cfg_read	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^u32 pex_cfg_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 offs)$/;"	f	typeref:typename:u32
pex_cfg_ready	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_cfg_ready;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_config_read	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c	/^u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off)$/;"	f	typeref:typename:u32
pex_config_ref_clock100_m_hz	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_config_ref_clock100_m_hz[] = {$/;"	v	typeref:struct:op_params[]
pex_config_ref_clock25_m_hz	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_config_ref_clock25_m_hz[] = {$/;"	v	typeref:struct:op_params[]
pex_config_ref_clock40_m_hz	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_config_ref_clock40_m_hz[] = {$/;"	v	typeref:struct:op_params[]
pex_csb_bridge	arch/powerpc/include/asm/immap_83xx.h	/^struct pex_csb_bridge {$/;"	s
pex_csb_cab	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_cab;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csb_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_ctrl;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csb_ibctrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_ibctrl;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csb_ibstat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_ibstat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csb_obctrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_obctrl;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csb_obstat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_obstat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csb_ver	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_csb_ver;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_csr0	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pex_csr0;	\/* 0xf14 - PEX Control\/Status register 0*\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pex_csr1	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pex_csr1;	\/* 0xf18 - PEX Control\/Status register 1*\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pex_dms_dstmr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_dms_dstmr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_electrical_config_serdes_rev1_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_electrical_config_serdes_rev1_params[] = {$/;"	v	typeref:struct:op_params[]
pex_electrical_config_serdes_rev2_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params pex_electrical_config_serdes_rev2_params[] = {$/;"	v	typeref:struct:op_params[]
pex_epiwtar0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_epiwtar0;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_epiwtar1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_epiwtar1;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_epiwtar2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_epiwtar2;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_epiwtar3	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_epiwtar3;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_gclk_ratio	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_gclk_ratio;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_hvdd_3v3_reg	arch/arm/dts/tegra30-cardhu.dts	/^		pex_hvdd_3v3_reg: regulator@5 {$/;"	l
pex_imbcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_imbcr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_imbdr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_imbdr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_inbound_win	arch/powerpc/include/asm/immap_83xx.h	/^	struct pex_inbound_window pex_inbound_win[4];$/;"	m	struct:pex_csb_bridge	typeref:struct:pex_inbound_window[4]
pex_inbound_window	arch/powerpc/include/asm/immap_83xx.h	/^struct pex_inbound_window {$/;"	s
pex_int_apio_vec1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_apio_vec1;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_apio_vec2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_apio_vec2;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_misc_enb	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_misc_enb;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_misc_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_misc_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_pio_enb	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_pio_enb;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_pio_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_pio_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_rdma_enb	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_rdma_enb;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_rdma_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_rdma_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_wdma_enb	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_wdma_enb;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_axi_wdma_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_axi_wdma_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_enb	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_enb;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_misc_vec	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_misc_vec;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_ppio_vec1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_ppio_vec1;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_ppio_vec2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_ppio_vec2;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_rdma_vec1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_rdma_vec1;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_rdma_vec2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_rdma_vec2;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_wdma_vec1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_wdma_vec1;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_int_wdma_vec2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_int_wdma_vec2;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_local_bus_num_set	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c	/^int pex_local_bus_num_set(u32 pex_if, u32 bus_num)$/;"	f	typeref:typename:int
pex_local_bus_num_set	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^int pex_local_bus_num_set(u32 pex_if, u32 bus_num)$/;"	f	typeref:typename:int
pex_local_dev_num_set	arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c	/^int pex_local_dev_num_set(u32 pex_if, u32 dev_num)$/;"	f	typeref:typename:int
pex_local_dev_num_set	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^int pex_local_dev_num_set(u32 pex_if, u32 dev_num)$/;"	f	typeref:typename:int
pex_ltssm_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_ltssm_stat;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_lut_in32	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define pex_lut_in32(/;"	d
pex_lut_out32	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define pex_lut_out32(/;"	d
pex_max_if_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^u32 pex_max_if_get(void)$/;"	f	typeref:typename:u32
pex_max_unit_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^u32 pex_max_unit_get(void)$/;"	f	typeref:typename:u32
pex_mode	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	MV_PEX_UNIT_CFG pex_mode[4];$/;"	m	struct:board_serdes_conf	typeref:typename:MV_PEX_UNIT_CFG[4]
pex_ombcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_ombcr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_ombdr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_ombdr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_outbound_win	arch/powerpc/include/asm/immap_83xx.h	/^	struct pex_outbound_window pex_outbound_win[4];$/;"	m	struct:pex_csb_bridge	typeref:struct:pex_outbound_window[4]
pex_outbound_window	arch/powerpc/include/asm/immap_83xx.h	/^struct pex_outbound_window {$/;"	s
pex_pm_timer	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_pm_timer;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_pme_timeout	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_pme_timeout;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_pme_to_ack_tor	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_pme_to_ack_tor;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_rdma_addr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_rdma_addr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_rdma_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_rdma_ctrl;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_rdma_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_rdma_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_ss_intr_mask	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_ss_intr_mask;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_ssvid_update	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_ssvid_update;$/;"	m	struct:pex83xx	typeref:typename:u32
pex_type	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	MV_PEX_TYPE pex_type; \/* MV_PEX_ROOT_COMPLEX MV_PEX_END_POINT *\/$/;"	m	struct:board_serdes_conf	typeref:typename:MV_PEX_TYPE
pex_type	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^typedef enum pex_type {$/;"	g
pex_wdma_addr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_wdma_addr;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_wdma_ctrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_wdma_ctrl;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pex_wdma_stat	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pex_wdma_stat;$/;"	m	struct:pex_csb_bridge	typeref:typename:u32
pexmscportsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pexmscportsr[2];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[2]
pfc	include/vsc9953.h	/^	struct vsc9953_ana_pfc	pfc[10];$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_pfc[10]
pfc_cfg	include/vsc9953.h	/^	u32	pfc_cfg;$/;"	m	struct:vsc9953_ana_pfc	typeref:typename:u32
pfc_phys_to_virt	drivers/gpio/sh_pfc.c	/^#define pfc_phys_to_virt(/;"	d	file:
pfc_settings	board/renesas/rsk7264/lowlevel_init.S	/^pfc_settings:$/;"	l
pfcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pfcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pfcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pfcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pfcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pfcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pfd_480	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_480;		\/* 0x0f0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_480_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_480_clr;		\/* 0x0f8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_480_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_480_set;		\/* 0x0f4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_480_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_480_tog;		\/* 0x0fc *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_480a	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480a;			\/* offset 0x00c0 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480a_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480a_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480a_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480a_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480a_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480a_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480b	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480b;			\/* offset 0x00d0 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480b_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480b_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480b_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480b_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_480b_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pfd_480b_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pfd_528	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_528;		\/* 0x100 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_528_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_528_clr;		\/* 0x108 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_528_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_528_set;		\/* 0x104 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfd_528_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pfd_528_tog;		\/* 0x10c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pfdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pfdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pfddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pfddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pfdr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pfdr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pfdr	arch/m68k/include/asm/immap_5329.h	/^	u8 pfdr;		\/* 0x0C Feedback Divider Register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
pfdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pfdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pfdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pfdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pfdr_ar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pfdr_ar;	\/* PFDR Attributes Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
pfdr_bar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pfdr_bar;	\/* PFDR Base Addr Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
pfdr_bare	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pfdr_bare;	\/* PFDR Extended Base Addr Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
pfint	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct gpio_int pfint;$/;"	m	struct:gpio_regs	typeref:struct:gpio_int
pflag	tools/imagetool.h	/^	int pflag;$/;"	m	struct:image_tool_params	typeref:typename:int
pflags	drivers/block/sata_dwc.h	/^	unsigned int		pflags;$/;"	m	struct:ata_port	typeref:typename:unsigned int
pfns	drivers/fpga/lattice.c	/^static lattice_board_specific_func *pfns;$/;"	v	typeref:typename:lattice_board_specific_func *	file:
pfs	drivers/video/mx3fb.c	/^	u32	pfs:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
pfs	drivers/video/mx3fb.c	/^	u32	pfs:3;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:3	file:
pfup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pfup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pfuze	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static struct pmic *pfuze;$/;"	v	typeref:struct:pmic *	file:
pfuze	board/warp7/warp7.c	/^static struct pmic *pfuze;$/;"	v	typeref:struct:pmic *	file:
pfuze100_bind	drivers/power/pmic/pfuze100.c	/^static int pfuze100_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pfuze100_ids	drivers/power/pmic/pfuze100.c	/^static const struct udevice_id pfuze100_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pfuze100_ops	drivers/power/pmic/pfuze100.c	/^static struct dm_pmic_ops pfuze100_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
pfuze100_read	drivers/power/pmic/pfuze100.c	/^static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
pfuze100_reg_count	drivers/power/pmic/pfuze100.c	/^static int pfuze100_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_desc	drivers/power/regulator/pfuze100.c	/^struct pfuze100_regulator_desc {$/;"	s	file:
pfuze100_regulator_enable	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_enable(struct udevice *dev, int op, bool *enable)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_get_enable	drivers/power/regulator/pfuze100.c	/^static bool pfuze100_regulator_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
pfuze100_regulator_get_mode	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_get_mode(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_get_value	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_mode	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_mode(struct udevice *dev, int op, int *opmode)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_ops	drivers/power/regulator/pfuze100.c	/^static const struct dm_regulator_ops pfuze100_regulator_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
pfuze100_regulator_platdata	drivers/power/regulator/pfuze100.c	/^struct pfuze100_regulator_platdata {$/;"	s	file:
pfuze100_regulator_probe	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_set_enable	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_set_mode	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_set_mode(struct udevice *dev, int mode)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_set_value	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
pfuze100_regulator_val	drivers/power/regulator/pfuze100.c	/^static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV)$/;"	f	typeref:typename:int	file:
pfuze100_regulators	drivers/power/regulator/pfuze100.c	/^static struct pfuze100_regulator_desc pfuze100_regulators[] = {$/;"	v	typeref:struct:pfuze100_regulator_desc[]	file:
pfuze100_swbst	drivers/power/regulator/pfuze100.c	/^static unsigned int pfuze100_swbst[] = {$/;"	v	typeref:typename:unsigned int[]	file:
pfuze100_vsnvs	drivers/power/regulator/pfuze100.c	/^static unsigned int pfuze100_vsnvs[] = {$/;"	v	typeref:typename:unsigned int[]	file:
pfuze100_write	drivers/power/pmic/pfuze100.c	/^static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
pfuze200_regulators	drivers/power/regulator/pfuze100.c	/^static struct pfuze100_regulator_desc pfuze200_regulators[] = {$/;"	v	typeref:struct:pfuze100_regulator_desc[]	file:
pfuze3000_regulators	drivers/power/regulator/pfuze100.c	/^static struct pfuze100_regulator_desc pfuze3000_regulators[] = {$/;"	v	typeref:struct:pfuze100_regulator_desc[]	file:
pfuze3000_sw2lo	drivers/power/regulator/pfuze100.c	/^static unsigned int pfuze3000_sw2lo[] = {$/;"	v	typeref:typename:unsigned int[]	file:
pfuze3000_vsnvs	drivers/power/regulator/pfuze100.c	/^static unsigned int pfuze3000_vsnvs[] = {$/;"	v	typeref:typename:unsigned int[]	file:
pfuze_common_init	board/freescale/common/pfuze.c	/^struct pmic *pfuze_common_init(unsigned char i2cbus)$/;"	f	typeref:struct:pmic *
pfuze_ldo_modes	drivers/power/regulator/pfuze100.c	/^static struct dm_regulator_mode pfuze_ldo_modes[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
pfuze_mode_init	board/freescale/common/pfuze.c	/^int pfuze_mode_init(struct pmic *p, u32 mode)$/;"	f	typeref:typename:int
pfuze_sw_modes	drivers/power/regulator/pfuze100.c	/^static struct dm_regulator_mode pfuze_sw_modes[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
pfuze_swbst_modes	drivers/power/regulator/pfuze100.c	/^static struct dm_regulator_mode pfuze_swbst_modes[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
pfw_image_length	tools/zynqmpimage.c	/^	uint32_t pfw_image_length; \/* 0x34 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
pg0	arch/sparc/lib/bootm.c	/^	char pg0[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
pg1	arch/sparc/lib/bootm.c	/^	char pg1[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
pg2	arch/sparc/lib/bootm.c	/^	char pg2[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
pg3	arch/sparc/lib/bootm.c	/^	char pg3[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
pgamma_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 pgamma_params_sn04[]		= {$/;"	v	typeref:typename:u16[]	file:
pgamma_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 pgamma_params_sn20[]		= {$/;"	v	typeref:typename:u16[]	file:
pgccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pgccsr;	\/* Port General CSR *\/$/;"	m	struct:rio_lp_serial	typeref:typename:u32
pgccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pgccsr;		\/* 0xc013c - Port General Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pgcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pgcon;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pgcr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 pgcr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
pgcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 pgcr;		\/* 0x08 phy general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pgcr[4];		\/* 0x100 PHY general configuration registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
pgcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 pgcr[4];		\/* 0x08 PHY general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
pgcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 pgcr;		\/* 0x08 phy general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pgcr[4];		\/* 0x100 PHY general configuration registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[4]
pgcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 pgcr[4];		\/* 0x08 PHY general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[4]
pgcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pgcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pgcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pgcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pgcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pgcr0;		\/* 0x08 phy general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pgcr0;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pgcr0;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pgcr0;		\/* 0x08 phy general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pgcr0;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pgcr0;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pgcr1;		\/* 0x0c phy general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pgcr1;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pgcr1;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pgcr1;		\/* 0x0c phy general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pgcr1;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pgcr1;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr1_mask	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int pgcr1_mask;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
pgcr1_val	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int pgcr1_val;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
pgcr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pgcr2;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pgcr2;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pgcr2;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pgcr2;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgcr2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pgcr2;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pgcr2;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr2	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int pgcr2;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
pgcr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pgcr3;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgcr3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pgcr3;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgd_table	arch/sparc/cpu/leon2/prom.c	/^	unsigned int pgd_table[256];$/;"	m	struct:__anon686d3e2f0108	typeref:typename:unsigned int[256]	file:
pgd_table	arch/sparc/cpu/leon3/prom.c	/^	unsigned int pgd_table[256];$/;"	m	struct:__anon54af13100108	typeref:typename:unsigned int[256]	file:
pgdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pgdat;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pgddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pgddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pgdir	arch/powerpc/include/asm/processor.h	/^	void		*pgdir;		\/* root of page-table tree *\/$/;"	m	struct:thread_struct	typeref:typename:void *
pgdr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pgdr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
pgdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pgdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pgdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pgdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pgm	drivers/mtd/nand/arasan_nfc.c	/^	u32 pgm;$/;"	m	struct:arasan_nand_command_format	typeref:typename:u32	file:
pgm	include/spartan2.h	/^	xilinx_pgm_fn	pgm;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_pgm_fn
pgm	include/spartan2.h	/^	xilinx_pgm_fn	pgm;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_pgm_fn
pgm	include/spartan3.h	/^	xilinx_pgm_fn	pgm;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_pgm_fn
pgm	include/spartan3.h	/^	xilinx_pgm_fn	pgm;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_pgm_fn
pgm	include/virtex2.h	/^	xilinx_pgm_fn	pgm;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_pgm_fn
pgm	include/virtex2.h	/^	xilinx_pgm_fn	pgm;$/;"	m	struct:__anoncbf344e20208	typeref:typename:xilinx_pgm_fn
pgm_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 pgm_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
pgoff_t	fs/ubifs/ubifs.h	/^#define pgoff_t	/;"	d
pgr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pgr;$/;"	m	struct:gpc	typeref:typename:u32
pgrdcmpl_evt_stat	include/fsl_ifc.h	/^	u32 pgrdcmpl_evt_stat;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
pgrp	common/cli_hush.c	/^	pid_t pgrp;					\/* process group ID for the job *\/$/;"	m	struct:pipe	typeref:typename:pid_t	file:
pgsr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 pgsr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
pgsr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 pgsr;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pgsr[2];		\/* 0x10 PHY general status registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
pgsr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 pgsr[2];		\/* 0x18 PHY general status register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
pgsr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 pgsr;		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgsr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pgsr[2];		\/* 0x10 PHY general status registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
pgsr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 pgsr[2];		\/* 0x18 PHY general status register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
pgsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pgsr0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pgsr0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pgsr0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pgsr0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgsr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pgsr0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pgsr0;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pgsr1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pgsr1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pgsr1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pgsr1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pgsr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pgsr1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgsr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pgsr1;		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pgup	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	pgup;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
pgy_eth	board/keymile/common/common.h	/^	unsigned char	pgy_eth;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
pgy_id	board/keymile/common/common.h	/^	unsigned char	pgy_id;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
pgy_outputs	board/keymile/common/common.h	/^	unsigned char	pgy_outputs;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
pgy_rev	board/keymile/common/common.h	/^	unsigned char	pgy_rev;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
phandle	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	int phandle;$/;"	m	struct:pin_info	typeref:typename:int	file:
phandle_2_cell	include/dt-structs.h	/^struct phandle_2_cell {$/;"	s
phase	arch/x86/include/asm/fsp/fsp_api.h	/^	enum fsp_phase	phase;$/;"	m	struct:fsp_notify_params	typeref:enum:fsp_phase
phase	drivers/usb/emul/sandbox_flash.c	/^	enum cmd_phase phase;$/;"	m	struct:sandbox_flash_priv	typeref:enum:cmd_phase	file:
phase_error	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		phase_error:1;$/;"	m	struct:fsg_common	typeref:typename:unsigned int:1	file:
phcca	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^struct ohci_hcca *phcca;$/;"	v	typeref:struct:ohci_hcca *
phcca	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^struct ohci_hcca *phcca;$/;"	v	typeref:struct:ohci_hcca *
phcca	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^struct ohci_hcca *phcca;$/;"	v	typeref:struct:ohci_hcca *
phcca	drivers/usb/host/ohci-s3c24xx.c	/^struct ohci_hcca *phcca;$/;"	v	typeref:struct:ohci_hcca *
phcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	phcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
phcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	phcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
phddr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t phddr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
phdr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t phdr;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
phdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	phdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
phdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	phdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
phost	drivers/block/sata_dwc.c	/^static struct ata_host			*phost;$/;"	v	typeref:struct:ata_host *	file:
phy	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 phy[53];$/;"	m	struct:ddrmr_regs	typeref:typename:u32[53]
phy	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^	struct rk3036_ddr_phy *phy;$/;"	m	struct:rk3036_sdram_priv	typeref:struct:rk3036_ddr_phy *	file:
phy	drivers/net/davinci_emac.c	/^phy_t				phy[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];$/;"	v	typeref:typename:phy_t[]
phy	drivers/net/dwc_eth_qos.c	/^	struct phy_device *phy;$/;"	m	struct:eqos_priv	typeref:struct:phy_device *	file:
phy	drivers/pci/pci_tegra.c	/^	struct tegra_xusb_phy *phy;$/;"	m	struct:tegra_pcie	typeref:struct:tegra_xusb_phy *	file:
phy	drivers/usb/host/xhci-keystone.c	/^	struct keystone_xhci_phy *phy;$/;"	m	struct:keystone_xhci	typeref:struct:keystone_xhci_phy *	file:
phy0	arch/arm/dts/am335x-draco.dts	/^		phy0: ethernet-phy@1 {$/;"	l	label:mdio0
phy0	arch/arm/dts/armada-375-db.dts	/^				phy0: ethernet-phy@0 {$/;"	l
phy0	arch/arm/dts/armada-385-amc.dts	/^				phy0: ethernet-phy@1 {$/;"	l
phy0	arch/arm/dts/armada-388-gp.dts	/^				phy0: ethernet-phy@1 {$/;"	l
phy0	arch/arm/dts/armada-xp-gp.dts	/^				phy0: ethernet-phy@0 {$/;"	l
phy0	arch/arm/dts/armada-xp-maxbcm.dts	/^				phy0: ethernet-phy@0 {$/;"	l
phy0	arch/arm/dts/armada-xp-synology-ds414.dts	/^				phy0: ethernet-phy@0 { \/* Marvell 88E1512 *\/$/;"	l
phy0	arch/arm/dts/armada-xp-theadorable.dts	/^				phy0: ethernet-phy@0 {$/;"	l
phy0	arch/arm/dts/sun4i-a10-hackberry.dts	/^	phy0: ethernet-phy@0 {$/;"	l
phy0	arch/arm/dts/zynqmp-ep108.dts	/^	phy0: phy@0 {$/;"	l
phy0	arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts	/^	phy0: phy@0 {$/;"	l
phy0	arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts	/^	phy0: phy@5 {$/;"	l
phy0	arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts	/^	phy0: phy@0 {$/;"	l
phy0	arch/arm/dts/zynqmp-zcu102.dts	/^	phy0: phy@21 {$/;"	l
phy0	arch/mips/dts/ar933x.dtsi	/^					phy0: ethernet-phy@0 {$/;"	l	label:gmac0
phy0	arch/mips/dts/ar934x.dtsi	/^					phy0: ethernet-phy@0 {$/;"	l	label:gmac0
phy0	arch/mips/dts/nexys4ddr.dts	/^			phy0: phy@1 {$/;"	l	label:axi_ethernetlite
phy0	arch/nios2/dts/10m50_devboard.dts	/^				phy0: ethernet-phy@0 {$/;"	l	label:sopc0.rgmii_0_eth_tse_0.rgmii_0_eth_tse_0_mdio
phy0	arch/nios2/dts/3c120_devboard.dts	/^					phy0: ethernet-phy@18 {$/;"	l	label:pb_cpu_to_io.tse_mac.tse_mac_mdio
phy0_dq	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy0_dq;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy0_dqs	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy0_dqs;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy0_pulld_dqs	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy0_pulld_dqs;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy0_tFS	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy0_tFS;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy1	arch/arm/dts/armada-385-amc.dts	/^				phy1: ethernet-phy@0 {$/;"	l
phy1	arch/arm/dts/armada-388-gp.dts	/^				phy1: ethernet-phy@0 {$/;"	l
phy1	arch/arm/dts/armada-xp-gp.dts	/^				phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/armada-xp-maxbcm.dts	/^				phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/armada-xp-synology-ds414.dts	/^				phy1: ethernet-phy@1 { \/* Marvell 88E1512 *\/$/;"	l
phy1	arch/arm/dts/sun4i-a10-a1000.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-ba10-tvbox.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-cubieboard.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-jesurun-q5.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-marsboard.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun4i-a10-pcduino.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun50i-a64-pine64-plus.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun5i-a10s-wobo-i5.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31-colombus.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31-i7.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31-m9.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31-mixtile-loftq.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31s-cs908.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31s-sina31s.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-bananapi.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-bananapro.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-cubieboard2.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-icnova-swac.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-itead-ibox.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-m3.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-m5.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-orangepi.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-pcduino3-nano.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-pcduino3.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun8i-h3-orangepi-one.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/sun8i-h3-orangepi-pc.dts	/^	phy1: ethernet-phy@1 {$/;"	l
phy1	arch/arm/dts/tegra114.dtsi	/^	phy1: usb-phy@7d000000 {$/;"	l
phy1	arch/arm/dts/tegra124.dtsi	/^	phy1: usb-phy@7d000000 {$/;"	l
phy1	arch/arm/dts/tegra20.dtsi	/^	phy1: usb-phy@c5000000 {$/;"	l
phy1	arch/arm/dts/tegra210.dtsi	/^	phy1: usb-phy@7d000000 {$/;"	l
phy1	arch/arm/dts/tegra30.dtsi	/^	phy1: usb-phy@7d000000 {$/;"	l
phy1	arch/mips/dts/ar934x.dtsi	/^					phy1: ethernet-phy@0 {$/;"	l	label:gmac1
phy1_dq	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy1_dq;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy1_dqs	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy1_dqs;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy1_pulld_dqs	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy1_pulld_dqs;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy1_tFS	arch/arm/mach-exynos/clock_init.h	/^	unsigned phy1_tFS;$/;"	m	struct:mem_timings	typeref:typename:unsigned
phy2	arch/arm/dts/armada-xp-gp.dts	/^				phy2: ethernet-phy@2 {$/;"	l
phy2	arch/arm/dts/armada-xp-maxbcm.dts	/^				phy2: ethernet-phy@2 {$/;"	l
phy2	arch/arm/dts/tegra124.dtsi	/^	phy2: usb-phy@7d004000 {$/;"	l
phy2	arch/arm/dts/tegra20.dtsi	/^	phy2: usb-phy@c5004000 {$/;"	l
phy2	arch/arm/dts/tegra210.dtsi	/^	phy2: usb-phy@7d004000 {$/;"	l
phy2	arch/arm/dts/tegra30.dtsi	/^	phy2: usb-phy@7d004000 {$/;"	l
phy3	arch/arm/dts/armada-375-db.dts	/^				phy3: ethernet-phy@3 {$/;"	l
phy3	arch/arm/dts/armada-xp-gp.dts	/^				phy3: ethernet-phy@3 {$/;"	l
phy3	arch/arm/dts/armada-xp-maxbcm.dts	/^				phy3: ethernet-phy@3 {$/;"	l
phy3	arch/arm/dts/tegra114.dtsi	/^	phy3: usb-phy@7d008000 {$/;"	l
phy3	arch/arm/dts/tegra124.dtsi	/^	phy3: usb-phy@7d008000 {$/;"	l
phy3	arch/arm/dts/tegra20.dtsi	/^	phy3: usb-phy@c5008000 {$/;"	l
phy3	arch/arm/dts/tegra30.dtsi	/^	phy3: usb-phy@7d008000 {$/;"	l
phy_addr	arch/arm/include/asm/ti-common/keystone_net.h	/^	int phy_addr;$/;"	m	struct:eth_priv_t	typeref:typename:int
phy_addr	arch/m68k/include/asm/fec.h	/^	int phy_addr;$/;"	m	struct:fec_info_s	typeref:typename:int
phy_addr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	int phy_addr;$/;"	m	struct:fec_info_dma	typeref:typename:int
phy_addr	arch/powerpc/cpu/mpc8xx/fec.c	/^	int phy_addr;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
phy_addr	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		phy_addr;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
phy_addr	drivers/net/dm9000x.c	/^	u8 phy_addr;$/;"	m	struct:board_info	typeref:typename:u8	file:
phy_addr	drivers/net/dnet.c	/^	unsigned short		phy_addr;$/;"	m	struct:dnet_device	typeref:typename:unsigned short	file:
phy_addr	drivers/net/e1000.h	/^	uint32_t phy_addr;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
phy_addr	drivers/net/ftgmac100.c	/^	int phy_addr;$/;"	m	struct:ftgmac100_data	typeref:typename:int	file:
phy_addr	drivers/net/ftmac110.c	/^	uint32_t phy_addr;$/;"	m	struct:ftmac110_chip	typeref:typename:uint32_t	file:
phy_addr	drivers/net/keystone_net.c	/^	int				phy_addr;$/;"	m	struct:ks2_eth_priv	typeref:typename:int	file:
phy_addr	drivers/net/macb.c	/^	unsigned short		phy_addr;$/;"	m	struct:macb_device	typeref:typename:unsigned short	file:
phy_addr	drivers/net/pic32_eth.c	/^	u32 phy_addr;$/;"	m	struct:pic32eth_dev	typeref:typename:u32	file:
phy_addr	drivers/net/sh_eth.h	/^	u8 phy_addr;$/;"	m	struct:sh_eth_info	typeref:typename:u8
phy_addr	drivers/net/uli526x.c	/^	u8 phy_addr;$/;"	m	struct:uli526x_board_info	typeref:typename:u8	file:
phy_addr	include/cpsw.h	/^	int		phy_addr;$/;"	m	struct:cpsw_slave_data	typeref:typename:int
phy_addr	include/fm_eth.h	/^	u8 phy_addr;$/;"	m	struct:fm_eth_info	typeref:typename:u8
phy_addr	include/fsl-mc/fsl_dpmac.h	/^	uint8_t		phy_addr;$/;"	m	struct:dpmac_mdio_cfg	typeref:typename:uint8_t
phy_addr	include/fsl-mc/ldpaa_wriop.h	/^	int phy_addr;$/;"	m	struct:wriop_dpmac_info	typeref:typename:int
phy_address	drivers/net/tsi108_eth.c	/^static unsigned int phy_address[] = { 8, 9 };$/;"	v	typeref:typename:unsigned int[]	file:
phy_address	drivers/qe/uec.h	/^	u8				phy_address;$/;"	m	struct:uec_info	typeref:typename:u8
phy_address	include/linux/ethtool.h	/^	__u8	phy_address;$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
phy_adp	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_adp;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_alt_vbus_sys	arch/arm/include/asm/arch-tegra/usb.h	/^	uint phy_alt_vbus_sys;$/;"	m	struct:usb_ctlr	typeref:typename:uint
phy_aquantia_init	drivers/net/phy/aquantia.c	/^int phy_aquantia_init(void)$/;"	f	typeref:typename:int
phy_atheros_init	drivers/net/phy/atheros.c	/^int phy_atheros_init(void)$/;"	f	typeref:typename:int
phy_base	drivers/usb/host/ehci-exynos.c	/^	fdt_addr_t phy_base;$/;"	m	struct:exynos_ehci_platdata	typeref:typename:fdt_addr_t	file:
phy_base	drivers/usb/host/xhci-exynos5.c	/^	fdt_addr_t phy_base;$/;"	m	struct:exynos_xhci_platdata	typeref:typename:fdt_addr_t	file:
phy_base	drivers/usb/host/xhci-rockchip.c	/^	fdt_addr_t phy_base;$/;"	m	struct:rockchip_xhci_platdata	typeref:typename:fdt_addr_t	file:
phy_bases	drivers/usb/host/ehci-mx6.c	/^static const unsigned phy_bases[] = {$/;"	v	typeref:typename:const unsigned[]	file:
phy_bases	drivers/usb/host/ehci-vf.c	/^static const unsigned phy_bases[] = {$/;"	v	typeref:typename:const unsigned[]	file:
phy_batchg	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_batchg;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_bist_ctrl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	phy_bist_ctrl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
phy_broadcom_init	drivers/net/phy/broadcom.c	/^int phy_broadcom_init(void)$/;"	f	typeref:typename:int
phy_cfg	arch/arm/mach-keystone/include/mach/ddr3.h	/^	struct ddr3_phy_config phy_cfg;$/;"	m	struct:ddr3_spd_cb	typeref:struct:ddr3_phy_config
phy_cfg	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void phy_cfg(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
phy_cfg	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void phy_cfg(const struct chan_info *chan, u32 channel,$/;"	f	typeref:typename:void	file:
phy_cfg1	drivers/usb/host/ehci-mx6.c	/^	u32 phy_cfg1;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
phy_cfg2	drivers/usb/host/ehci-mx6.c	/^	u32 phy_cfg2;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
phy_change	drivers/qe/uec.c	/^static void phy_change(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
phy_clk	drivers/usb/musb-new/am35x.c	/^	struct clk		*phy_clk;$/;"	m	struct:am35x_glue	typeref:struct:clk *	file:
phy_clk_rst	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_clk_rst;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_clock	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^	unsigned int phy_clock;		\/* ctl4 *\/$/;"	m	struct:keystone_xhci_phy	typeref:typename:unsigned int
phy_command	drivers/usb/eth/mcs7830.c	/^	uint8_t phy_command[2];$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t[2]	file:
phy_con0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con0;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con0;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con1;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con1;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con10;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con10;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con11;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con12;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con12;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con13;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con13;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con14;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con14;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con15;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con15;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con16	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con16;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con16	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con16;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con17	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con17;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con17	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con17;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con18	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con18;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con18	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con18;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con19	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con19;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con19	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con19;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con2;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con2;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con20	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con20;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con20	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con20;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con21	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con21;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con21	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con21;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con22	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con22;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con22	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con22;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con23	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con23;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con23	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con23;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con24	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con24;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con24	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con24;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con25	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con25;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con25	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con25;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con26	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con26;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con26	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con26;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con27	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con27;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con27	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con27;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con28	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con28;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con28	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con28;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con29	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con29;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con29	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con29;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con3;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con3;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con30	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con30;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con30	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con30;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con31	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con31;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con31	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con31;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con32	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con32;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con32	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con32;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con33	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con33;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con33	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con33;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con34	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con34;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con34	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con34;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con35	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con35;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con36	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con36;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con37	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con37;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con37	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con37;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con38	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con38;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con39	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con39;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con39	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con39;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con4;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con4;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con40	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con40;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con40	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con40;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con41	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con41;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con41	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con41;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con42	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con42;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con42	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con42;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con5;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con6;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con6;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con8;$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned int
phy_con8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con8;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_con9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phy_con9;$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned int
phy_conf0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_conf0;			\/* 0x3000 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_conf0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_conf0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_config	drivers/net/phy/phy.c	/^int phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
phy_configured	drivers/net/sun8i_emac.c	/^	u32 phy_configured;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
phy_connect	drivers/net/phy/phy.c	/^struct phy_device *phy_connect(struct mii_dev *bus, int addr,$/;"	f	typeref:struct:phy_device *
phy_connect_dev	drivers/net/phy/phy.c	/^void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)$/;"	f	typeref:typename:void
phy_control	include/usb/dwc2_udc.h	/^	int		(*phy_control)(int on);$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:int (*)(int on)
phy_control_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const phy_control_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
phy_control_reset	arch/arm/mach-exynos/dmc_init_exynos4.c	/^static void phy_control_reset(int ctrl_no, struct exynos4_dmc *dmc)$/;"	f	typeref:typename:void	file:
phy_cortina_init	drivers/net/phy/cortina.c	/^int phy_cortina_init(void)$/;"	f	typeref:typename:int
phy_ctrl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	phy_ctrl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
phy_ctrl0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	phy_ctrl0;	\/* 0x150 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
phy_ctrl0	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	phy_ctrl0;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
phy_ctrl1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	phy_ctrl1;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
phy_ctrl2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	phy_ctrl2;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
phy_data	drivers/usb/eth/mcs7830.c	/^	uint8_t phy_data[2];$/;"	m	struct:mcs7830_regs	typeref:typename:uint8_t[2]	file:
phy_davicom_init	drivers/net/phy/davicom.c	/^int phy_davicom_init(void)$/;"	f	typeref:typename:int
phy_debug_mode_flags	drivers/ddr/altera/sequencer.h	/^	uint32_t phy_debug_mode_flags;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
phy_dedicated	arch/arm/dts/armada-388-clearfog.dts	/^				phy_dedicated: ethernet-phy@0 {$/;"	l
phy_detection	drivers/net/zynq_gem.c	/^static int phy_detection(struct udevice *dev)$/;"	f	typeref:typename:int	file:
phy_dev	arch/arm/include/asm/ti-common/keystone_net.h	/^	struct phy_device *phy_dev;$/;"	m	struct:eth_priv_t	typeref:struct:phy_device *
phy_dev	drivers/net/mvpp2.c	/^	struct phy_device *phy_dev;$/;"	m	struct:mvpp2_port	typeref:struct:phy_device *	file:
phy_device	include/phy.h	/^struct phy_device {$/;"	s
phy_device_create	drivers/net/phy/phy.c	/^static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,$/;"	f	typeref:struct:phy_device *	file:
phy_dll_bypass_set	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^void phy_dll_bypass_set(struct rk3036_sdram_priv *priv, unsigned int freq)$/;"	f	typeref:typename:void
phy_dll_bypass_set	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void phy_dll_bypass_set(struct rk3288_ddr_publ *publ,$/;"	f	typeref:typename:void	file:
phy_driver	include/phy.h	/^struct phy_driver {$/;"	s
phy_enable	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	void (*phy_enable)(unsigned int dev_index, unsigned int enable);$/;"	m	struct:exynos_platform_mipi_dsim	typeref:typename:void (*)(unsigned int dev_index,unsigned int enable)
phy_et1011c_init	drivers/net/phy/et1011c.c	/^int phy_et1011c_init(void)$/;"	f	typeref:typename:int
phy_find_by_mask	common/exports.c	/^# define phy_find_by_mask	/;"	d	file:
phy_find_by_mask	drivers/net/phy/phy.c	/^struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,$/;"	f	typeref:struct:phy_device *
phy_get_interface_by_name	drivers/net/phy/phy.c	/^int phy_get_interface_by_name(const char *str)$/;"	f	typeref:typename:int
phy_i2cm_address_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_address_addr;	\/* 0x3021 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_address_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_address_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_ctlint_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_ctlint_addr;	\/* 0x3028 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_ctlint_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_ctlint_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_datai_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_datai_0_addr;	\/* 0x3025 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_datai_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_datai_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_datai_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_datai_1_addr;	\/* 0x3024 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_datai_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_datai_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_datao_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_datao_0_addr;	\/* 0x3023 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_datao_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_datao_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_datao_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_datao_1_addr;	\/* 0x3022 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_datao_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_datao_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_div_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_div_addr;		\/* 0x3029 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_div_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_div_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_fs_scl_hcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_fs_scl_hcnt_0_addr;	\/* 0x3030 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_fs_scl_hcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_fs_scl_hcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_fs_scl_hcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_fs_scl_hcnt_1_addr;	\/* 0x302f *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_fs_scl_hcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_fs_scl_hcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_fs_scl_lcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_fs_scl_lcnt_0_addr;	\/* 0x3032 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_fs_scl_lcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_fs_scl_lcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_fs_scl_lcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_fs_scl_lcnt_1_addr;	\/* 0x3031 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_fs_scl_lcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_fs_scl_lcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_int_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_int_addr;		\/* 0x3027 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_int_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_int_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_operation_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_operation_addr;	\/* 0x3026 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_operation_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_operation_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_slave_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_slave_addr;		\/* 0x3020 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_slave_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_slave_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_softrstz_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_softrstz_addr;	\/* 0x302a *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_softrstz_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_softrstz_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_ss_scl_hcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_ss_scl_hcnt_0_addr;	\/* 0x302c *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_ss_scl_hcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_ss_scl_hcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_ss_scl_hcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_ss_scl_hcnt_1_addr;	\/* 0x302b *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_ss_scl_hcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_ss_scl_hcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_ss_scl_lcnt_0_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_ss_scl_lcnt_0_addr;	\/* 0x302e *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_ss_scl_lcnt_0_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_ss_scl_lcnt_0_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_i2cm_ss_scl_lcnt_1_addr	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_i2cm_ss_scl_lcnt_1_addr;	\/* 0x302d *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_i2cm_ss_scl_lcnt_1_addr	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_i2cm_ss_scl_lcnt_1_addr;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_id	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		phy_id;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
phy_id	drivers/net/e1000.h	/^	uint32_t phy_id;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
phy_id	drivers/net/fec_mxc.h	/^	int phy_id;$/;"	m	struct:fec_priv	typeref:typename:int
phy_id	drivers/qe/uec_phy.h	/^	u32 phy_id;$/;"	m	struct:phy_info	typeref:typename:u32
phy_id	include/fsl-mc/fsl_dpmac.h	/^	int			phy_id;$/;"	m	struct:dpmac_attr	typeref:typename:int
phy_id	include/phy.h	/^	int phy_id;$/;"	m	struct:fixed_link	typeref:typename:int
phy_id	include/phy.h	/^	u32 phy_id;$/;"	m	struct:phy_device	typeref:typename:u32
phy_id	include/usb_ether.h	/^	int phy_id;			\/* mii phy id *\/$/;"	m	struct:ueth_data	typeref:typename:int
phy_id_mask	drivers/qe/uec_phy.h	/^	unsigned int phy_id_mask;$/;"	m	struct:phy_info	typeref:typename:unsigned int
phy_if	arch/arm/include/asm/ti-common/keystone_net.h	/^	phy_interface_t phy_if;$/;"	m	struct:eth_priv_t	typeref:typename:phy_interface_t
phy_if	drivers/net/keystone_net.c	/^	phy_interface_t			phy_if;$/;"	m	struct:ks2_eth_priv	typeref:typename:phy_interface_t	file:
phy_if	include/cpsw.h	/^	int		phy_if;$/;"	m	struct:cpsw_slave_data	typeref:typename:int
phy_index	drivers/usb/host/ehci-sunxi.c	/^	int phy_index;     \/* Index of the usb-phy attached to this hcd *\/$/;"	m	struct:ehci_sunxi_priv	typeref:typename:int	file:
phy_index	drivers/usb/host/ohci-sunxi.c	/^	int phy_index;     \/* Index of the usb-phy attached to this hcd *\/$/;"	m	struct:ohci_sunxi_priv	typeref:typename:int	file:
phy_info	drivers/qe/uec_phy.c	/^static struct phy_info *phy_info[] = {$/;"	v	typeref:struct:phy_info * []	file:
phy_info	drivers/qe/uec_phy.h	/^struct phy_info {$/;"	s
phy_info_bcm5481	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_bcm5481 = {$/;"	v	typeref:struct:phy_info	file:
phy_info_dm9161	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_dm9161 = {$/;"	v	typeref:struct:phy_info	file:
phy_info_dm9161a	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_dm9161a = {$/;"	v	typeref:struct:phy_info	file:
phy_info_fixedphy	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_fixedphy = {$/;"	v	typeref:struct:phy_info	file:
phy_info_genmii	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_genmii = {$/;"	v	typeref:struct:phy_info	file:
phy_info_marvell	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_marvell = {$/;"	v	typeref:struct:phy_info	file:
phy_info_smsclan8700	drivers/qe/uec_phy.c	/^static struct phy_info phy_info_smsclan8700 = {$/;"	v	typeref:struct:phy_info	file:
phy_info_struct	drivers/net/mcfmii.c	/^typedef struct phy_info_struct {$/;"	s	file:
phy_info_t	drivers/net/mcfmii.c	/^} phy_info_t;$/;"	t	typeref:struct:phy_info_struct	file:
phy_init	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void phy_init(struct rk3288_ddr_publ *publ)$/;"	f	typeref:typename:void	file:
phy_init	drivers/net/phy/phy.c	/^int phy_init(void)$/;"	f	typeref:typename:int
phy_init_script	drivers/net/e1000.h	/^	uint32_t phy_init_script;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
phy_int	arch/arm/dts/rk3288-fennec.dtsi	/^		phy_int: phy-int {$/;"	l
phy_int	arch/arm/dts/rk3288-firefly.dtsi	/^		phy_int: phy-int {$/;"	l
phy_int0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_int0;			\/* 0x3005 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_int0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_int0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_int_ctrl	drivers/net/pch_gbe.h	/^	u32 phy_int_ctrl;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
phy_interface	drivers/net/bcm-sf2-eth.h	/^	phy_interface_t phy_interface;$/;"	m	struct:eth_info	typeref:typename:phy_interface_t
phy_interface	drivers/net/macb.c	/^	phy_interface_t		phy_interface;$/;"	m	struct:macb_device	typeref:typename:phy_interface_t	file:
phy_interface	drivers/net/mvneta.c	/^	phy_interface_t phy_interface;$/;"	m	struct:mvneta_port	typeref:typename:phy_interface_t	file:
phy_interface	drivers/net/mvpp2.c	/^	phy_interface_t phy_interface;$/;"	m	struct:mvpp2_port	typeref:typename:phy_interface_t	file:
phy_interface	include/net.h	/^	int phy_interface;$/;"	m	struct:eth_pdata	typeref:typename:int
phy_interface_is_rgmii	include/phy.h	/^static inline bool phy_interface_is_rgmii(struct phy_device *phydev)$/;"	f	typeref:typename:bool
phy_interface_is_sgmii	include/phy.h	/^static inline bool phy_interface_is_sgmii(struct phy_device *phydev)$/;"	f	typeref:typename:bool
phy_interface_strings	include/phy.h	/^static const char *phy_interface_strings[] = {$/;"	v	typeref:typename:const char * []
phy_interface_t	include/phy.h	/^} phy_interface_t;$/;"	t	typeref:enum:__anona5f0b0bf0103
phy_lxt_init	drivers/net/phy/lxt.c	/^int phy_lxt_init(void)$/;"	f	typeref:typename:int
phy_marvell_init	drivers/net/phy/marvell.c	/^int phy_marvell_init(void)$/;"	f	typeref:typename:int
phy_mask	drivers/net/cpsw.c	/^	u32				phy_mask;$/;"	m	struct:cpsw_priv	typeref:typename:u32	file:
phy_mask	include/phy.h	/^	u32 phy_mask;$/;"	m	struct:mii_dev	typeref:typename:u32
phy_mask0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_mask0;			\/* 0x3006 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_mask0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_mask0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_mgr_cfg	drivers/ddr/altera/sequencer.c	/^static struct socfpga_phy_mgr_cfg *phy_mgr_cfg =$/;"	v	typeref:struct:socfpga_phy_mgr_cfg *	file:
phy_mgr_cmd	drivers/ddr/altera/sequencer.c	/^static struct socfpga_phy_mgr_cmd *phy_mgr_cmd =$/;"	v	typeref:struct:socfpga_phy_mgr_cmd *	file:
phy_mgr_initialize	drivers/ddr/altera/sequencer.c	/^static void phy_mgr_initialize(void)$/;"	f	typeref:typename:void	file:
phy_micrel_init	drivers/net/phy/micrel.c	/^int phy_micrel_init(void)$/;"	f	typeref:typename:int
phy_mv88e61xx_init	drivers/net/phy/mv88e61xx.c	/^int phy_mv88e61xx_init(void)$/;"	f	typeref:typename:int
phy_name	arch/m68k/include/asm/fec.h	/^	char *phy_name;$/;"	m	struct:fec_info_s	typeref:typename:char *
phy_name	arch/m68k/include/asm/fsl_mcdmafec.h	/^	char *phy_name;$/;"	m	struct:fec_info_dma	typeref:typename:char *
phy_natsemi_init	drivers/net/phy/natsemi.c	/^int phy_natsemi_init(void)$/;"	f	typeref:typename:int
phy_node	drivers/net/mvpp2.c	/^	int phy_node;$/;"	m	struct:mvpp2_port	typeref:typename:int	file:
phy_of_handle	drivers/net/zynq_gem.c	/^	int phy_of_handle;$/;"	m	struct:zynq_gem_priv	typeref:typename:int	file:
phy_of_handle	include/cpsw.h	/^	int		phy_of_handle;$/;"	m	struct:cpsw_slave_data	typeref:typename:int
phy_of_node	include/usb/dwc2_udc.h	/^	int		phy_of_node;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:int
phy_off	drivers/usb/musb/am35x.c	/^static void phy_off(void)$/;"	f	typeref:typename:void	file:
phy_off	drivers/usb/musb/da8xx.c	/^static void phy_off(void)$/;"	f	typeref:typename:void	file:
phy_off	drivers/usb/musb/davinci.c	/^static void phy_off(void)$/;"	f	typeref:typename:void	file:
phy_on	drivers/usb/musb/am35x.c	/^static u8 phy_on(void)$/;"	f	typeref:typename:u8	file:
phy_on	drivers/usb/musb/da8xx.c	/^static u8 phy_on(void)$/;"	f	typeref:typename:u8	file:
phy_on	drivers/usb/musb/davinci.c	/^static u8 phy_on(void)$/;"	f	typeref:typename:u8	file:
phy_param	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^struct phy_param {$/;"	s	file:
phy_param0	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_param0;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_param1	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_param1;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_param_ctrl_1	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^	unsigned int phy_param_ctrl_1;	\/* ctl2 *\/$/;"	m	struct:keystone_xhci_phy	typeref:typename:unsigned int
phy_param_ctrl_2	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^	unsigned int phy_param_ctrl_2;	\/* ctl3 *\/$/;"	m	struct:keystone_xhci_phy	typeref:typename:unsigned int
phy_pctrl_reset	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^void phy_pctrl_reset(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void
phy_pctrl_reset	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void phy_pctrl_reset(struct rk3288_cru *cru,$/;"	f	typeref:typename:void	file:
phy_pd	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	phy_pd;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
phy_pipe	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_pipe;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_pipe	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^	unsigned int phy_pipe;		\/* ctl1 *\/$/;"	m	struct:keystone_xhci_phy	typeref:typename:unsigned int
phy_pipe3_power_off	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^int phy_pipe3_power_off(struct omap_pipe3 *phy)$/;"	f	typeref:typename:int
phy_pipe3_power_on	arch/arm/cpu/armv7/omap-common/pipe3-phy.c	/^int phy_pipe3_power_on(struct omap_pipe3 *phy)$/;"	f	typeref:typename:int
phy_pll	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^	unsigned int phy_pll;		\/* ctl5 *\/$/;"	m	struct:keystone_xhci_phy	typeref:typename:unsigned int
phy_pmeb	arch/arm/dts/rk3288-fennec.dtsi	/^		phy_pmeb: phy-pmeb {$/;"	l
phy_pmeb	arch/arm/dts/rk3288-firefly.dtsi	/^		phy_pmeb: phy-pmeb {$/;"	l
phy_pol0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_pol0;			\/* 0x3007 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_pol0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_pol0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_port_number	drivers/usb/dwc3/core.h	/^	u32	phy_port_number:4;$/;"	m	struct:dwc3_event_gevt	typeref:typename:u32:4
phy_prepare	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int phy_prepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
phy_prepare	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static int phy_prepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
phy_probe	drivers/net/phy/phy.c	/^static int phy_probe(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
phy_read	include/phy.h	/^static inline int phy_read(struct phy_device *phydev, int devad, int regnum)$/;"	f	typeref:typename:int
phy_read16	drivers/phy/marvell/comphy_a3700.h	/^#define phy_read16(/;"	d
phy_read_1bit	drivers/net/uli526x.c	/^static u16 phy_read_1bit(unsigned long ioaddr, u32 chip_id)$/;"	f	typeref:typename:u16	file:
phy_read_mmd_indirect	drivers/net/phy/ti.c	/^int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,$/;"	f	typeref:typename:int
phy_readby_cr10	drivers/net/uli526x.c	/^static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset)$/;"	f	typeref:typename:u16	file:
phy_realtek_init	drivers/net/phy/realtek.c	/^int phy_realtek_init(void)$/;"	f	typeref:typename:int
phy_reg0	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_reg0;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_reg0_val	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 phy_reg0_val = 0;$/;"	v	typeref:typename:u32
phy_reg1	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_reg1;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_reg1_val	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 phy_reg1_val = 8;$/;"	v	typeref:typename:u32
phy_reg2_val	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 phy_reg2_val = 0;$/;"	v	typeref:typename:u32
phy_reg3_val	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 phy_reg3_val = 0xa;$/;"	v	typeref:typename:u32
phy_reg3_val	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	u32 phy_reg3_val;$/;"	m	struct:tune_train_params	typeref:typename:u32
phy_reg_bk	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 phy_reg_bk[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];$/;"	v	typeref:typename:u32[][][]
phy_reg_offsets	drivers/net/ns8382x.c	/^enum phy_reg_offsets {$/;"	g	file:
phy_register	drivers/net/phy/phy.c	/^int phy_register(struct phy_driver *drv)$/;"	f	typeref:typename:int
phy_regs	drivers/usb/host/ehci-mxs.c	/^	struct mxs_usbphy_regs	*phy_regs;$/;"	m	struct:ehci_mxs_port	typeref:struct:mxs_usbphy_regs *	file:
phy_regs	include/fm_eth.h	/^	void *phy_regs;$/;"	m	struct:fm_eth_info	typeref:typename:void *
phy_regs	include/fsl-mc/ldpaa_wriop.h	/^	void *phy_regs;$/;"	m	struct:wriop_dpmac_info	typeref:typename:void *
phy_regs	include/vsc9953.h	/^	void	*phy_regs;$/;"	m	struct:vsc9953_port_info	typeref:typename:void *
phy_reset	drivers/net/phy/phy.c	/^int phy_reset(struct phy_device *phydev)$/;"	f	typeref:typename:int
phy_reset_disable	drivers/net/e1000.h	/^	bool phy_reset_disable;$/;"	m	struct:e1000_hw	typeref:typename:bool
phy_reset_gpio	drivers/net/dwc_eth_qos.c	/^	struct gpio_desc phy_reset_gpio;$/;"	m	struct:eqos_priv	typeref:struct:gpio_desc	file:
phy_reset_gpio	drivers/usb/host/ehci-tegra.c	/^	struct gpio_desc phy_reset_gpio; \/* GPIO to reset ULPI phy *\/$/;"	m	struct:fdt_usb	typeref:struct:gpio_desc	file:
phy_reset_pad	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const phy_reset_pad = {$/;"	v	typeref:typename:iomux_v3_cfg_t const
phy_resume	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_resume;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_revision	drivers/net/e1000.h	/^	uint32_t phy_revision;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
phy_rlat	drivers/ddr/altera/sequencer.h	/^	u32	phy_rlat;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
phy_rmii	drivers/net/lpc32xx_eth.c	/^	bool phy_rmii;$/;"	m	struct:lpc32xx_eth_device	typeref:typename:bool	file:
phy_rnum	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	int	phy_rnum; \/* PHY register ; -1 for last entry *\/$/;"	m	struct:ddrmc_phy_setting	typeref:typename:int
phy_rst	arch/arm/dts/rk3288-fennec.dtsi	/^		phy_rst: phy-rst {$/;"	l
phy_rst	arch/arm/dts/rk3288-firefly.dtsi	/^		phy_rst: phy-rst {$/;"	l
phy_rst	arch/arm/dts/rk3288-rock2-som.dtsi	/^		phy_rst: phy-rst {$/;"	l
phy_rxd_inv	drivers/phy/marvell/comphy_a3700.h	/^#define phy_rxd_inv	/;"	d
phy_sel	arch/arm/dts/am33xx.dtsi	/^			phy_sel: cpsw-phy-sel@44e10650 {$/;"	l	label:mac
phy_sel	arch/arm/dts/am4372.dtsi	/^			phy_sel: cpsw-phy-sel@44e10650 {$/;"	l	label:mac
phy_sel	arch/arm/dts/dra7.dtsi	/^			phy_sel: cpsw-phy-sel@4a002554 {$/;"	l	label:mac
phy_set_supported	drivers/net/phy/phy.c	/^int phy_set_supported(struct phy_device *phydev, u32 max_speed)$/;"	f	typeref:typename:int
phy_setup_aneg	arch/powerpc/cpu/ppc4xx/miiphy.c	/^int phy_setup_aneg (char *devname, unsigned char addr)$/;"	f	typeref:typename:int
phy_setup_op	drivers/net/zynq_gem.c	/^static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,$/;"	f	typeref:typename:u32	file:
phy_shutdown	drivers/net/phy/phy.c	/^int phy_shutdown(struct phy_device *phydev)$/;"	f	typeref:typename:int
phy_smsc_init	drivers/net/phy/smsc.c	/^int phy_smsc_init(void)$/;"	f	typeref:typename:int
phy_startup	drivers/net/phy/phy.c	/^int phy_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int
phy_stat0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_stat0;			\/* 0x3004 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_stat0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_stat0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_status	drivers/usb/host/ehci-mx6.c	/^	u32 phy_status;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
phy_string_for_interface	include/phy.h	/^static inline const char *phy_string_for_interface(phy_interface_t i)$/;"	f	typeref:typename:const char *
phy_t	drivers/net/davinci_emac.h	/^} phy_t;$/;"	t	typeref:struct:__anon759824920408
phy_teranetics_init	drivers/net/phy/teranetics.c	/^int phy_teranetics_init(void)$/;"	f	typeref:typename:int
phy_term	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_term;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_test	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	phy_test;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
phy_test	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_test;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_ti_init	drivers/net/phy/ti.c	/^int phy_ti_init(void)$/;"	f	typeref:typename:int
phy_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	struct rk3036_phy_timing phy_timing;$/;"	m	struct:rk3036_ddr_timing	typeref:struct:rk3036_phy_timing
phy_timing	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_sdram_phy_timing phy_timing;$/;"	m	struct:rk3288_sdram_params	typeref:struct:rk3288_sdram_phy_timing	file:
phy_tmsr	include/usb/fotg210.h	/^	uint32_t phy_tmsr;\/* 0x114: PHY Test Mode Selector Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
phy_tst0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_tst0;			\/* 0x3001 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_tst0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_tst0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_tst1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_tst1;			\/* 0x3002 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_tst1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_tst1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_tst2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 phy_tst2;			\/* 0x3003 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
phy_tst2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 phy_tst2;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
phy_txd_inv	drivers/phy/marvell/comphy_a3700.h	/^#define phy_txd_inv	/;"	d
phy_type	drivers/net/e1000.h	/^	e1000_phy_type phy_type;$/;"	m	struct:e1000_hw	typeref:typename:e1000_phy_type
phy_type	drivers/usb/host/ehci-fsl.c	/^	char *phy_type;$/;"	m	struct:ehci_fsl_priv	typeref:typename:char *	file:
phy_unprepare	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int phy_unprepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
phy_unprepare	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static int phy_unprepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
phy_utmi	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int phy_utmi;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
phy_utmi	arch/arm/mach-keystone/include/mach/xhci-keystone.h	/^	unsigned int phy_utmi;		\/* ctl0 *\/$/;"	m	struct:keystone_xhci_phy	typeref:typename:unsigned int
phy_utmi	drivers/usb/musb-new/musb_dsps.c	/^	u16	phy_utmi;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
phy_vbus_sensors	arch/arm/include/asm/arch-tegra/usb.h	/^	uint phy_vbus_sensors;$/;"	m	struct:usb_ctlr	typeref:typename:uint
phy_vbus_wakeup_id	arch/arm/include/asm/arch-tegra/usb.h	/^	uint phy_vbus_wakeup_id;$/;"	m	struct:usb_ctlr	typeref:typename:uint
phy_vitesse_init	drivers/net/phy/vitesse.c	/^int phy_vitesse_init(void)$/;"	f	typeref:typename:int
phy_wait	drivers/net/tsi108_eth.c	/^static void phy_wait (unsigned int base, unsigned int condition)$/;"	f	typeref:typename:void	file:
phy_write	include/phy.h	/^static inline int phy_write(struct phy_device *phydev, int devad, int regnum,$/;"	f	typeref:typename:int
phy_write16	drivers/phy/marvell/comphy_a3700.h	/^#define phy_write16(/;"	d
phy_write_1bit	drivers/net/uli526x.c	/^static void phy_write_1bit(unsigned long ioaddr, u32 phy_data, u32 chip_id)$/;"	f	typeref:typename:void	file:
phy_write_mmd_indirect	drivers/net/phy/ti.c	/^void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,$/;"	f	typeref:typename:void
phy_writeby_cr10	drivers/net/uli526x.c	/^static void phy_writeby_cr10(unsigned long iobase, u8 phy_addr,$/;"	f	typeref:typename:void	file:
phy_xilinx_init	drivers/net/phy/xilinx_phy.c	/^int phy_xilinx_init(void)$/;"	f	typeref:typename:int
phyacchr	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	phyacchr;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
phyacchr1	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	phyacchr1;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
phyaddr	drivers/net/altera_tse.h	/^	unsigned int phyaddr;$/;"	m	struct:altera_tse_priv	typeref:typename:unsigned int
phyaddr	drivers/net/fm/fm.h	/^	int phyaddr;$/;"	m	struct:fm_eth	typeref:typename:int
phyaddr	drivers/net/greth.c	/^	unsigned char phyaddr;$/;"	m	struct:__anonb53b88540108	typeref:typename:unsigned char	file:
phyaddr	drivers/net/mvneta.c	/^	int phyaddr;$/;"	m	struct:mvneta_port	typeref:typename:int	file:
phyaddr	drivers/net/mvpp2.c	/^	int phyaddr;$/;"	m	struct:mvpp2_port	typeref:typename:int	file:
phyaddr	drivers/net/sun8i_emac.c	/^	u32 phyaddr;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
phyaddr	drivers/net/xilinx_axi_emac.c	/^	int phyaddr;$/;"	m	struct:axidma_priv	typeref:typename:int	file:
phyaddr	drivers/net/xilinx_emaclite.c	/^	int phyaddr;$/;"	m	struct:xemaclite	typeref:typename:int	file:
phyaddr	drivers/net/xilinx_ll_temac.c	/^	unsigned int		phyaddr;$/;"	m	struct:ll_temac_info	typeref:typename:unsigned int	file:
phyaddr	drivers/net/xilinx_ll_temac.h	/^	int			phyaddr;$/;"	m	struct:ll_temac	typeref:typename:int
phyaddr	drivers/net/zynq_gem.c	/^	int phyaddr;$/;"	m	struct:zynq_gem_priv	typeref:typename:int	file:
phyaddr	include/tsec.h	/^	uint phyaddr;$/;"	m	struct:tsec_private	typeref:typename:uint
phyaddr	include/tsec.h	/^	unsigned int phyaddr;$/;"	m	struct:tsec_info_struct	typeref:typename:unsigned int
phyaddr	include/vsc9953.h	/^	u8	phyaddr;$/;"	m	struct:vsc9953_port_info	typeref:typename:u8
phyaddr_hi	drivers/block/sata_mv.c	/^	u32 phyaddr_hi;$/;"	m	struct:eprd	typeref:typename:u32	file:
phyaddr_low	drivers/block/sata_mv.c	/^	u32 phyaddr_low;$/;"	m	struct:eprd	typeref:typename:u32	file:
phyadr	drivers/net/armada100_fec.h	/^	u32 phyadr;			\/* PHY Address *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
phyadr	drivers/net/mvgbe.h	/^	u32 phyadr;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
phyc	arch/arm/dts/zynqmp-zcu102-revB.dts	/^	phyc: phy@c {$/;"	l
phyclk	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 phyclk;$/;"	m	struct:dwc2_usbotg_phy	typeref:typename:u32
phyclk_sel	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	phyclk_sel;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
phycontrol0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phycontrol0;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phycontrol0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phycontrol0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
phycontrol0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phycontrol0;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
phycontrol1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phycontrol1;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phycontrol2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phycontrol2;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phycontrol3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phycontrol3;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phycr	drivers/block/dwc_ahsata.c	/^	u32 phycr;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
phycr	drivers/block/sata_dwc.c	/^	u32 phycr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
phycr	drivers/net/ftgmac100.h	/^	unsigned int	phycr;		\/* 0x60 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
phycr	drivers/net/ftmac100.h	/^	unsigned int	phycr;		\/* 0x90 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
phycr	drivers/net/ftmac110.h	/^	uint32_t phycr;  \/* 0x90: PHY Control Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
phyctrlcfg	drivers/block/fsl_sata.h	/^	u32 phyctrlcfg;		\/* PHY control configuration *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
phydata	drivers/net/ftgmac100.h	/^	unsigned int	phydata;	\/* 0x64 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
phydev	drivers/net/ag7xxx.c	/^	struct phy_device	*phydev;$/;"	m	struct:ar7xxx_eth_priv	typeref:struct:phy_device *	file:
phydev	drivers/net/altera_tse.h	/^	struct phy_device *phydev;$/;"	m	struct:altera_tse_priv	typeref:struct:phy_device *
phydev	drivers/net/cpsw.c	/^	struct phy_device		*phydev;$/;"	m	struct:cpsw_priv	typeref:struct:phy_device *	file:
phydev	drivers/net/designware.h	/^	struct phy_device *phydev;$/;"	m	struct:dw_eth_dev	typeref:struct:phy_device *
phydev	drivers/net/ethoc.c	/^	struct phy_device *phydev;$/;"	m	struct:ethoc	typeref:struct:phy_device *	file:
phydev	drivers/net/fec_mxc.h	/^	struct phy_device *phydev;$/;"	m	struct:fec_priv	typeref:struct:phy_device *
phydev	drivers/net/fm/fm.h	/^	struct phy_device *phydev;$/;"	m	struct:fm_eth	typeref:struct:phy_device *
phydev	drivers/net/keystone_net.c	/^	struct phy_device		*phydev;$/;"	m	struct:ks2_eth_priv	typeref:struct:phy_device *	file:
phydev	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	struct phy_device *phydev;$/;"	m	struct:ldpaa_eth_priv	typeref:struct:phy_device *
phydev	drivers/net/mvneta.c	/^	struct phy_device *phydev;$/;"	m	struct:mvneta_port	typeref:struct:phy_device *	file:
phydev	drivers/net/pch_gbe.h	/^	struct phy_device *phydev;$/;"	m	struct:pch_gbe_priv	typeref:struct:phy_device *
phydev	drivers/net/pic32_eth.c	/^	struct phy_device *phydev;$/;"	m	struct:pic32eth_dev	typeref:struct:phy_device *	file:
phydev	drivers/net/sh_eth.h	/^	struct phy_device *phydev;$/;"	m	struct:sh_eth_info	typeref:struct:phy_device *
phydev	drivers/net/sun8i_emac.c	/^	struct phy_device *phydev;$/;"	m	struct:emac_eth_dev	typeref:struct:phy_device *	file:
phydev	drivers/net/sunxi_emac.c	/^	struct phy_device *phydev;$/;"	m	struct:emac_eth_dev	typeref:struct:phy_device *	file:
phydev	drivers/net/xilinx_axi_emac.c	/^	struct phy_device *phydev;$/;"	m	struct:axidma_priv	typeref:struct:phy_device *	file:
phydev	drivers/net/xilinx_emaclite.c	/^	struct phy_device *phydev;$/;"	m	struct:xemaclite	typeref:struct:phy_device *	file:
phydev	drivers/net/xilinx_ll_temac.h	/^	struct phy_device	*phydev;$/;"	m	struct:ll_temac	typeref:struct:phy_device *
phydev	drivers/net/zynq_gem.c	/^	struct phy_device *phydev;$/;"	m	struct:zynq_gem_priv	typeref:struct:phy_device *	file:
phydev	include/fsl-mc/ldpaa_wriop.h	/^	struct phy_device *phydev;$/;"	m	struct:wriop_dpmac_info	typeref:struct:phy_device *
phydev	include/tsec.h	/^	struct phy_device *phydev;$/;"	m	struct:tsec_private	typeref:struct:phy_device *
phydev	include/vsc9953.h	/^	struct phy_device	*phydev;$/;"	m	struct:vsc9953_port_info	typeref:struct:phy_device *
phydr	drivers/net/ftmac110.h	/^	uint32_t phydr;  \/* 0x94: PHY Data Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
phyid	drivers/net/mcfmii.c	/^	u32 phyid;$/;"	m	struct:phy_info_struct	typeref:typename:u32	file:
phyif	drivers/net/pic32_eth.c	/^	phy_interface_t phyif;$/;"	m	struct:pic32eth_dev	typeref:typename:phy_interface_t	file:
phyinfo	drivers/net/mcfmii.c	/^phy_info_t phyinfo[] = {$/;"	v	typeref:typename:phy_info_t[]
phyinfo	drivers/qe/uec_phy.h	/^	struct phy_info *phyinfo;$/;"	m	struct:uec_mii_info	typeref:struct:phy_info *
phymap	include/phy.h	/^	struct phy_device *phymap[PHY_MAX_ADDR];$/;"	m	struct:mii_dev	typeref:struct:phy_device * []
phymntnc	drivers/net/zynq_gem.c	/^	u32 phymntnc; \/* 0x34 - Phy Maintaince reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
phymode1	drivers/block/mvsata_ide.c	/^	u32 phymode1;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
phymode2	drivers/block/mvsata_ide.c	/^	u32 phymode2;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
phymode3	drivers/block/mvsata_ide.c	/^	u32 phymode3;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
phymode4	drivers/block/mvsata_ide.c	/^	u32 phymode4;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
phyname_init	arch/m68k/include/asm/fec.h	/^	int phyname_init;$/;"	m	struct:fec_info_s	typeref:typename:int
phyname_init	arch/m68k/include/asm/fsl_mcdmafec.h	/^	int phyname_init;$/;"	m	struct:fec_info_dma	typeref:typename:int
phypwr	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 phypwr;$/;"	m	struct:dwc2_usbotg_phy	typeref:typename:u32
phyread	drivers/net/xilinx_axi_emac.c	/^static u32 phyread(struct axidma_priv *priv, u32 phyaddress, u32 registernum,$/;"	f	typeref:typename:u32	file:
phyread	drivers/net/xilinx_emaclite.c	/^static u32 phyread(struct xemaclite *emaclite, u32 phyaddress, u32 registernum,$/;"	f	typeref:typename:u32	file:
phyread	drivers/net/zynq_gem.c	/^static u32 phyread(struct zynq_gem_priv *priv, u32 phy_addr,$/;"	f	typeref:typename:u32	file:
phyregs	drivers/net/ag7xxx.c	/^	void __iomem		*phyregs;$/;"	m	struct:ar7xxx_eth_priv	typeref:typename:void __iomem *	file:
phyregs	drivers/net/fm/fm.h	/^	void *phyregs;$/;"	m	struct:fsl_enet_mac	typeref:typename:void *
phyregs_sgmii	include/tsec.h	/^	struct tsec_mii_mng __iomem *phyregs_sgmii;$/;"	m	struct:tsec_private	typeref:struct:tsec_mii_mng __iomem *
phys	arch/arm/include/asm/armv8/mmu.h	/^	u64 phys;$/;"	m	struct:mm_region	typeref:typename:u64
phys	arch/arm/mach-tegra/xusb-padctl-common.h	/^	struct tegra_xusb_phy *phys;$/;"	m	struct:tegra_xusb_padctl_soc	typeref:struct:tegra_xusb_phy *
phys	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^	uint32_t	phys;$/;"	m	struct:mmu_vm_range	typeref:typename:uint32_t
phys	drivers/net/xilinx_axi_emac.c	/^	u32 phys;	\/* Buffer address *\/$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
phys_addr	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t phys_addr; \/* (void *) *\/$/;"	m	struct:mrq_module_load_request	typeref:typename:uint32_t
phys_addr	arch/arm/include/asm/arch-tegra20/display.h	/^	phys_addr_t	phys_addr;	\/* Physical address in memory *\/$/;"	m	struct:disp_ctl_win	typeref:typename:phys_addr_t
phys_addr	arch/sparc/include/asm/prom.h	/^	unsigned int phys_addr;	\/* The physical address of this register *\/$/;"	m	struct:linux_prom_registers	typeref:typename:unsigned int
phys_addr	arch/x86/include/asm/sfi.h	/^	u64	phys_addr;	\/* phy base addr for APIC reg *\/$/;"	m	struct:sfi_apic_table_entry	typeref:typename:u64
phys_addr	arch/x86/include/asm/sfi.h	/^	u64	phys_addr;	\/* phy base addr for the RTC *\/$/;"	m	struct:sfi_rtc_table_entry	typeref:typename:u64
phys_addr	arch/x86/include/asm/sfi.h	/^	u64	phys_addr;	\/* phy base addr for the timer *\/$/;"	m	struct:sfi_timer_table_entry	typeref:typename:u64
phys_addr	arch/x86/include/asm/sfi.h	/^	u64	phys_addr;	\/* pointer to where the wake vector locates *\/$/;"	m	struct:sfi_wake_table_entry	typeref:typename:u64
phys_addr	drivers/net/mvpp2.c	/^	dma_addr_t phys_addr;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:dma_addr_t	file:
phys_addr	drivers/net/pcnet.c	/^	u8 phys_addr[6];$/;"	m	struct:pcnet_init_block	typeref:typename:u8[6]	file:
phys_addr_t	arch/arc/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/arm/include/asm/types.h	/^typedef unsigned long long phys_addr_t;$/;"	t	typeref:typename:unsigned long long
phys_addr_t	arch/arm/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/avr32/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/blackfin/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/m68k/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/microblaze/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/mips/include/asm/types.h	/^typedef u32 phys_addr_t;$/;"	t	typeref:typename:u32
phys_addr_t	arch/mips/include/asm/types.h	/^typedef u64 phys_addr_t;$/;"	t	typeref:typename:u64
phys_addr_t	arch/nds32/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/nios2/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/openrisc/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/powerpc/include/asm/types.h	/^typedef unsigned long long phys_addr_t;$/;"	t	typeref:typename:unsigned long long
phys_addr_t	arch/powerpc/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/sandbox/include/asm/types.h	/^typedef u32 phys_addr_t;$/;"	t	typeref:typename:u32
phys_addr_t	arch/sh/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/sparc/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_addr_t	arch/x86/include/asm/types.h	/^typedef unsigned long long phys_addr_t;$/;"	t	typeref:typename:unsigned long long
phys_addr_t	arch/xtensa/include/asm/types.h	/^typedef unsigned long phys_addr_t;$/;"	t	typeref:typename:unsigned long
phys_base	arch/sparc/cpu/leon2/prom.c	/^#define phys_base /;"	d	file:
phys_base	arch/sparc/cpu/leon3/prom.c	/^#define phys_base /;"	d	file:
phys_base	drivers/pci/pcie_layerscape.c	/^	u64 phys_base;$/;"	m	struct:ls_pcie_info	typeref:typename:u64	file:
phys_base_ptr	include/vbe.h	/^	u32 phys_base_ptr;$/;"	m	struct:vesa_mode_info	typeref:typename:u32
phys_buf_p	drivers/net/xilinx_ll_temac_sdma.h	/^	u8 *phys_buf_p;			\/* Buffer Address *\/$/;"	m	struct:cdmac_bd	typeref:typename:u8 *
phys_erase_shift	include/linux/mtd/nand.h	/^	int phys_erase_shift;$/;"	m	struct:nand_chip	typeref:typename:int
phys_err	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_phys_err	phys_err;$/;"	m	struct:ccsr_rio	typeref:struct:rio_phys_err
phys_hi	arch/sparc/include/asm/prom.h	/^	unsigned int phys_hi;$/;"	m	struct:linux_prom_pci_assigned_addresses	typeref:typename:unsigned int
phys_hi	arch/sparc/include/asm/prom.h	/^	unsigned int phys_hi;$/;"	m	struct:linux_prom_pci_registers	typeref:typename:unsigned int
phys_hi	include/fdtdec.h	/^	u32	phys_hi;$/;"	m	struct:fdt_pci_addr	typeref:typename:u32
phys_lo	arch/sparc/include/asm/prom.h	/^	unsigned int phys_lo;$/;"	m	struct:linux_prom_pci_assigned_addresses	typeref:typename:unsigned int
phys_lo	arch/sparc/include/asm/prom.h	/^	unsigned int phys_lo;$/;"	m	struct:linux_prom_pci_registers	typeref:typename:unsigned int
phys_lo	include/fdtdec.h	/^	u32	phys_lo;$/;"	m	struct:fdt_pci_addr	typeref:typename:u32
phys_memory_barrier	arch/x86/lib/ramtest.c	/^static void phys_memory_barrier(void)$/;"	f	typeref:typename:void	file:
phys_mid	include/fdtdec.h	/^	u32	phys_mid;$/;"	m	struct:fdt_pci_addr	typeref:typename:u32
phys_size_t	arch/arc/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/arm/include/asm/types.h	/^typedef unsigned long long phys_size_t;$/;"	t	typeref:typename:unsigned long long
phys_size_t	arch/arm/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/avr32/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/blackfin/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/m68k/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/microblaze/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/mips/include/asm/types.h	/^typedef u32 phys_size_t;$/;"	t	typeref:typename:u32
phys_size_t	arch/mips/include/asm/types.h	/^typedef u64 phys_size_t;$/;"	t	typeref:typename:u64
phys_size_t	arch/nds32/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/nios2/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/openrisc/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/powerpc/include/asm/types.h	/^typedef unsigned long long phys_size_t;$/;"	t	typeref:typename:unsigned long long
phys_size_t	arch/powerpc/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/sandbox/include/asm/types.h	/^typedef u32 phys_size_t;$/;"	t	typeref:typename:u32
phys_size_t	arch/sh/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/sparc/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_size_t	arch/x86/include/asm/types.h	/^typedef unsigned long long phys_size_t;$/;"	t	typeref:typename:unsigned long long
phys_size_t	arch/xtensa/include/asm/types.h	/^typedef unsigned long phys_size_t;$/;"	t	typeref:typename:unsigned long
phys_start	arch/x86/include/asm/fsp/fsp_hob.h	/^	phys_addr_t		phys_start;$/;"	m	struct:hob_res_desc	typeref:typename:phys_addr_t
phys_start	arch/x86/include/asm/sfi.h	/^	u64	phys_start;$/;"	m	struct:sfi_mem_entry	typeref:typename:u64
phys_start	include/pci.h	/^	phys_addr_t phys_start;	\/* Start in physical address space *\/$/;"	m	struct:pci_region	typeref:typename:phys_addr_t
phys_t	arch/mips/include/asm/types.h	/^typedef unsigned long long phys_t;$/;"	t	typeref:typename:unsigned long long
phys_t	arch/mips/include/asm/types.h	/^typedef unsigned long phys_t;$/;"	t	typeref:typename:unsigned long
phys_to_bus	arch/arm/mach-bcm283x/phys2bus.c	/^unsigned long phys_to_bus(unsigned long phys)$/;"	f	typeref:typename:unsigned long
phys_to_bus	drivers/block/sym53c8xx.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	drivers/net/dc2114x.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	drivers/net/eepro100.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	drivers/net/natsemi.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	drivers/net/ns8382x.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	drivers/net/rtl8139.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	drivers/net/rtl8169.c	/^#define phys_to_bus(/;"	d	file:
phys_to_bus	include/phys2bus.h	/^static inline unsigned long phys_to_bus(unsigned long phys)$/;"	f	typeref:typename:unsigned long
phys_to_virt	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^static inline void * phys_to_virt(unsigned long address)$/;"	f	typeref:typename:void *
phys_to_virt	arch/mips/include/asm/io.h	/^static inline void *phys_to_virt(unsigned long address)$/;"	f	typeref:typename:void *
phys_txq	drivers/net/mvpp2.c	/^	u8  phys_txq;		\/* destination queue ID			*\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u8	file:
physaddr_mask	arch/nios2/include/asm/global_data.h	/^	u32 physaddr_mask;$/;"	m	struct:arch_global_data	typeref:typename:u32
physadr	include/linux/mtd/doc2000.h	/^	unsigned long physadr;$/;"	m	struct:DiskOnChip	typeref:typename:unsigned long
physel	drivers/net/cpsw.c	/^		u32		physel;$/;"	m	struct:cpsw_mdio_regs::__anon0b90ad170108	typeref:typename:u32	file:
physical_address	arch/x86/include/asm/coreboot_tables.h	/^	u64 physical_address;$/;"	m	struct:cb_framebuffer	typeref:typename:u64
physical_presence_cmd_enable	include/tpm.h	/^	u8	physical_presence_cmd_enable;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
physical_presence_hw_enable	include/tpm.h	/^	u8	physical_presence_hw_enable;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
physical_presence_lifetime_lock	include/tpm.h	/^	u8	physical_presence_lifetime_lock;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
physical_start	include/efi.h	/^	efi_physical_addr_t physical_start;$/;"	m	struct:efi_mem_desc	typeref:typename:efi_physical_addr_t
physical_w_h	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_physical_w_h physical_w_h;$/;"	m	struct:msg_query	typeref:struct:bcm2835_mbox_tag_physical_w_h	file:
physical_w_h	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_physical_w_h physical_w_h;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_physical_w_h	file:
physr	drivers/block/dwc_ahsata.c	/^	u32 physr;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
physr	drivers/block/sata_dwc.c	/^	u32 physr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
phystatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phystatus;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phystatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phystatus;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
phystatus	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phystatus;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
phytest0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phytest0;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phytest1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phytest1;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
phywdata	drivers/net/ftmac100.h	/^	unsigned int	phywdata;	\/* 0x94 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
phywrite	drivers/net/xilinx_axi_emac.c	/^static u32 phywrite(struct axidma_priv *priv, u32 phyaddress, u32 registernum,$/;"	f	typeref:typename:u32	file:
phywrite	drivers/net/xilinx_emaclite.c	/^static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum,$/;"	f	typeref:typename:u32	file:
phywrite	drivers/net/zynq_gem.c	/^static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr,$/;"	f	typeref:typename:u32	file:
phyzqcontrol	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int phyzqcontrol;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pi	drivers/block/dwc_ahsata.c	/^	u32 pi;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
pi_bdcnt	examples/standalone/mem_to_mem_idma2intr.c	/^	uint pi_bdcnt;$/;"	m	struct:pram_idma	typeref:typename:uint	file:
pi_bufinv	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_bufinv;		\/* internal to CPM *\/$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_d	board/freescale/common/qixis.h	/^	u8 pi_d[4];$/;"	m	struct:qixis	typeref:typename:u8[4]
pi_dcmbits	examples/standalone/mem_to_mem_idma2intr.c	/^	dcmbitsu_t pi_dcmbits;$/;"	m	struct:pram_idma	typeref:typename:dcmbitsu_t	file:
pi_deob	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_deob;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_dprbuf	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_dprbuf;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_dprinptr	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_dprinptr;		\/* internal to CPM *\/$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_dproutptr	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_dproutptr;		\/* internal to CPM *\/$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_dptr	examples/standalone/mem_to_mem_idma2intr.c	/^	uint pi_dptr;$/;"	m	struct:pram_idma	typeref:typename:uint	file:
pi_dts	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_dts;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_ibase	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_ibase;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_ibdptr	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_ibdptr;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_istate	examples/standalone/mem_to_mem_idma2intr.c	/^	uint pi_istate;$/;"	m	struct:pram_idma	typeref:typename:uint	file:
pi_resv1	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_resv1;		\/* internal to CPM *\/$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_retadd	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_retadd;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_seob	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_seob;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_sptr	examples/standalone/mem_to_mem_idma2intr.c	/^	uint pi_sptr;$/;"	m	struct:pram_idma	typeref:typename:uint	file:
pi_ssmax	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_ssmax;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pi_sts	examples/standalone/mem_to_mem_idma2intr.c	/^	ushort pi_sts;$/;"	m	struct:pram_idma	typeref:typename:ushort	file:
pib_init	board/freescale/common/pq-mds-pib.c	/^int pib_init(void)$/;"	f	typeref:typename:int
pib_init	board/freescale/mpc8349emds/pci.c	/^void pib_init(void)$/;"	f	typeref:typename:void
pib_init	board/freescale/mpc8568mds/mpc8568mds.c	/^pib_init(void)$/;"	f	typeref:typename:void
pibar0	arch/powerpc/include/asm/immap_512x.h	/^	u32 pibar0;$/;"	m	struct:pcictrl512x	typeref:typename:u32
pibar0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pibar0;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
pibar1	arch/powerpc/include/asm/immap_512x.h	/^	u32 pibar1;$/;"	m	struct:pcictrl512x	typeref:typename:u32
pibar1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pibar1;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
pibar2	arch/powerpc/include/asm/immap_512x.h	/^	u32 pibar2;$/;"	m	struct:pcictrl512x	typeref:typename:u32
pibar2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pibar2;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
piber	drivers/rtc/mpc5xxx.c	/^	volatile ulong	piber;	\/* MBAR+0x81C: periodic interrupt and bus error register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
pic	arch/xtensa/dts/xtfpga.dtsi	/^	pic: pic {$/;"	l
pic32_clk_ids	drivers/clk/clk_pic32.c	/^static const struct udevice_id pic32_clk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_clk_init	drivers/clk/clk_pic32.c	/^static void pic32_clk_init(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pic32_clk_priv	drivers/clk/clk_pic32.c	/^struct pic32_clk_priv {$/;"	s	file:
pic32_clk_probe	drivers/clk/clk_pic32.c	/^static int pic32_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_ctrl_reset	drivers/net/pic32_eth.c	/^static void pic32_ctrl_reset(struct pic32eth_dev *priv)$/;"	f	typeref:typename:void	file:
pic32_ectl_regs	drivers/net/pic32_eth.h	/^struct pic32_ectl_regs {$/;"	s
pic32_emac_regs	drivers/net/pic32_eth.h	/^struct pic32_emac_regs {$/;"	s
pic32_eth_free_pkt	drivers/net/pic32_eth.c	/^static int pic32_eth_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
pic32_eth_ids	drivers/net/pic32_eth.c	/^static const struct udevice_id pic32_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_eth_ops	drivers/net/pic32_eth.c	/^static const struct eth_ops pic32_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
pic32_eth_pin_config	drivers/pinctrl/pinctrl_pic32.c	/^static void pic32_eth_pin_config(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pic32_eth_probe	drivers/net/pic32_eth.c	/^static int pic32_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_eth_recv	drivers/net/pic32_eth.c	/^static int pic32_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
pic32_eth_remove	drivers/net/pic32_eth.c	/^static int pic32_eth_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_eth_send	drivers/net/pic32_eth.c	/^static int pic32_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
pic32_eth_start	drivers/net/pic32_eth.c	/^static int pic32_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_eth_stop	drivers/net/pic32_eth.c	/^static void pic32_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
pic32_flash_bank_init	drivers/mtd/pic32_flash.c	/^static void pic32_flash_bank_init(flash_info_t *info,$/;"	f	typeref:typename:void	file:
pic32_flash_ids	drivers/mtd/pic32_flash.c	/^static const struct udevice_id pic32_flash_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_flash_probe	drivers/mtd/pic32_flash.c	/^static int pic32_flash_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_get_cpuclk	drivers/clk/clk_pic32.c	/^static ulong pic32_get_cpuclk(struct pic32_clk_priv *priv)$/;"	f	typeref:typename:ulong	file:
pic32_get_mpll_rate	drivers/clk/clk_pic32.c	/^static ulong pic32_get_mpll_rate(struct pic32_clk_priv *priv)$/;"	f	typeref:typename:ulong	file:
pic32_get_pbclk	drivers/clk/clk_pic32.c	/^static ulong pic32_get_pbclk(struct pic32_clk_priv *priv, int periph)$/;"	f	typeref:typename:ulong	file:
pic32_get_pll_rate	drivers/clk/clk_pic32.c	/^static ulong pic32_get_pll_rate(struct pic32_clk_priv *priv)$/;"	f	typeref:typename:ulong	file:
pic32_get_rate	drivers/clk/clk_pic32.c	/^static ulong pic32_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
pic32_get_refclk	drivers/clk/clk_pic32.c	/^static ulong pic32_get_refclk(struct pic32_clk_priv *priv, int periph)$/;"	f	typeref:typename:ulong	file:
pic32_get_syscfg_base	arch/mips/mach-pic32/include/mach/pic32.h	/^static inline void __iomem *pic32_get_syscfg_base(void)$/;"	f	typeref:typename:void __iomem *
pic32_get_sysclk	drivers/clk/clk_pic32.c	/^static ulong pic32_get_sysclk(struct pic32_clk_priv *priv)$/;"	f	typeref:typename:ulong	file:
pic32_gpio_direction	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_direction(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pic32_gpio_direction_input	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pic32_gpio_direction_output	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_direction_output(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pic32_gpio_get_function	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pic32_gpio_get_value	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pic32_gpio_ids	drivers/gpio/pic32_gpio.c	/^static const struct udevice_id pic32_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_gpio_priv	drivers/gpio/pic32_gpio.c	/^struct pic32_gpio_priv {$/;"	s	file:
pic32_gpio_probe	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_gpio_set_value	drivers/gpio/pic32_gpio.c	/^static int pic32_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
pic32_interrupt	drivers/usb/musb-new/pic32.c	/^static irqreturn_t pic32_interrupt(int irq, void *hci)$/;"	f	typeref:typename:irqreturn_t	file:
pic32_mac_adjust_link	drivers/net/pic32_eth.c	/^static int pic32_mac_adjust_link(struct pic32eth_dev *priv)$/;"	f	typeref:typename:int	file:
pic32_mac_init	drivers/net/pic32_eth.c	/^static void pic32_mac_init(struct pic32eth_dev *priv, u8 *macaddr)$/;"	f	typeref:typename:void	file:
pic32_mac_reset	drivers/net/pic32_eth.c	/^static void pic32_mac_reset(struct pic32eth_dev *priv)$/;"	f	typeref:typename:void	file:
pic32_mdio_init	drivers/net/pic32_mdio.c	/^int pic32_mdio_init(const char *name, ulong ioaddr)$/;"	f	typeref:typename:int
pic32_mdio_read	drivers/net/pic32_mdio.c	/^static int pic32_mdio_read(struct mii_dev *bus, int addr, int devaddr, int reg)$/;"	f	typeref:typename:int	file:
pic32_mdio_reset	drivers/net/pic32_mdio.c	/^static int pic32_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
pic32_mdio_write	drivers/net/pic32_mdio.c	/^static int pic32_mdio_write(struct mii_dev *bus,$/;"	f	typeref:typename:int	file:
pic32_mii_init	drivers/net/pic32_eth.c	/^static int pic32_mii_init(struct pic32eth_dev *priv)$/;"	f	typeref:typename:int	file:
pic32_mii_regs	drivers/net/pic32_eth.h	/^struct pic32_mii_regs {$/;"	s
pic32_mpll_init	drivers/clk/clk_pic32.c	/^static int pic32_mpll_init(struct pic32_clk_priv *priv)$/;"	f	typeref:typename:int	file:
pic32_musb_config	drivers/usb/musb-new/pic32.c	/^static struct musb_hdrc_config pic32_musb_config = {$/;"	v	typeref:struct:musb_hdrc_config	file:
pic32_musb_data	drivers/usb/musb-new/pic32.c	/^struct pic32_musb_data {$/;"	s	file:
pic32_musb_disable	drivers/usb/musb-new/pic32.c	/^static void pic32_musb_disable(struct musb *musb)$/;"	f	typeref:typename:void	file:
pic32_musb_enable	drivers/usb/musb-new/pic32.c	/^static int pic32_musb_enable(struct musb *musb)$/;"	f	typeref:typename:int	file:
pic32_musb_fifo_config	drivers/usb/musb-new/pic32.c	/^static struct musb_fifo_cfg pic32_musb_fifo_config[] = {$/;"	v	typeref:struct:musb_fifo_cfg[]	file:
pic32_musb_ids	drivers/usb/musb-new/pic32.c	/^static const struct udevice_id pic32_musb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_musb_init	drivers/usb/musb-new/pic32.c	/^static int pic32_musb_init(struct musb *musb)$/;"	f	typeref:typename:int	file:
pic32_musb_ops	drivers/usb/musb-new/pic32.c	/^const struct musb_platform_ops pic32_musb_ops = {$/;"	v	typeref:typename:const struct musb_platform_ops
pic32_musb_plat	drivers/usb/musb-new/pic32.c	/^static struct musb_hdrc_platform_data pic32_musb_plat = {$/;"	v	typeref:struct:musb_hdrc_platform_data	file:
pic32_musb_set_mode	drivers/usb/musb-new/pic32.c	/^static int pic32_musb_set_mode(struct musb *musb, u8 mode)$/;"	f	typeref:typename:int	file:
pic32_phy_init	drivers/net/pic32_eth.c	/^static int pic32_phy_init(struct pic32eth_dev *priv, struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_pic32_clk_ops	drivers/clk/clk_pic32.c	/^static struct clk_ops pic32_pic32_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
pic32_pin_config	drivers/pinctrl/pinctrl_pic32.c	/^struct pic32_pin_config {$/;"	s	file:
pic32_pinconfig_one	drivers/pinctrl/pinctrl_pic32.c	/^static int pic32_pinconfig_one(struct pic32_pinctrl_priv *priv,$/;"	f	typeref:typename:int	file:
pic32_pinconfig_set	drivers/pinctrl/pinctrl_pic32.c	/^static int pic32_pinconfig_set(struct pic32_pinctrl_priv *priv,$/;"	f	typeref:typename:int	file:
pic32_pinctrl_get_periph_id	drivers/pinctrl/pinctrl_pic32.c	/^static int pic32_pinctrl_get_periph_id(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pic32_pinctrl_ids	drivers/pinctrl/pinctrl_pic32.c	/^static const struct udevice_id pic32_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_pinctrl_ops	drivers/pinctrl/pinctrl_pic32.c	/^static struct pinctrl_ops pic32_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
pic32_pinctrl_priv	drivers/pinctrl/pinctrl_pic32.c	/^struct pic32_pinctrl_priv {$/;"	s	file:
pic32_pinctrl_probe	drivers/pinctrl/pinctrl_pic32.c	/^static int pic32_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_pinctrl_request	drivers/pinctrl/pinctrl_pic32.c	/^static int pic32_pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int	file:
pic32_pinctrl_set_state_simple	drivers/pinctrl/pinctrl_pic32.c	/^static int pic32_pinctrl_set_state_simple(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pic32_reg_atomic	arch/mips/mach-pic32/include/mach/pic32.h	/^struct pic32_reg_atomic {$/;"	s
pic32_reg_in_mux	drivers/pinctrl/pinctrl_pic32.c	/^struct pic32_reg_in_mux {$/;"	s	file:
pic32_reg_nvm	drivers/mtd/pic32_flash.c	/^struct pic32_reg_nvm {$/;"	s	file:
pic32_reg_port	drivers/gpio/pic32_gpio.c	/^struct pic32_reg_port {$/;"	s	file:
pic32_reg_port	drivers/pinctrl/pinctrl_pic32.c	/^struct pic32_reg_port {$/;"	s	file:
pic32_reg_spi	drivers/spi/pic32_spi.c	/^struct pic32_reg_spi {$/;"	s	file:
pic32_rx_desc_init	drivers/net/pic32_eth.c	/^static void pic32_rx_desc_init(struct pic32eth_dev *priv)$/;"	f	typeref:typename:void	file:
pic32_rx_max	drivers/spi/pic32_spi.c	/^static u32 pic32_rx_max(struct pic32_spi_priv *priv, int n_bytes)$/;"	f	typeref:typename:u32	file:
pic32_sdhci_ids	drivers/mmc/pic32_sdhci.c	/^static const struct udevice_id pic32_sdhci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_sdhci_probe	drivers/mmc/pic32_sdhci.c	/^static int pic32_sdhci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_serial_init	drivers/serial/serial_pic32.c	/^static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)$/;"	f	typeref:typename:int	file:
pic32_set_rate	drivers/clk/clk_pic32.c	/^static ulong pic32_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
pic32_set_refclk	drivers/clk/clk_pic32.c	/^static ulong pic32_set_refclk(struct pic32_clk_priv *priv, int periph,$/;"	f	typeref:typename:ulong	file:
pic32_spi_claim_bus	drivers/spi/pic32_spi.c	/^static int pic32_spi_claim_bus(struct udevice *slave)$/;"	f	typeref:typename:int	file:
pic32_spi_disable	drivers/spi/pic32_spi.c	/^static inline void pic32_spi_disable(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:void	file:
pic32_spi_enable	drivers/spi/pic32_spi.c	/^static inline void pic32_spi_enable(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:void	file:
pic32_spi_hw_init	drivers/spi/pic32_spi.c	/^static void pic32_spi_hw_init(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:void	file:
pic32_spi_ids	drivers/spi/pic32_spi.c	/^static const struct udevice_id pic32_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_spi_ops	drivers/spi/pic32_spi.c	/^static const struct dm_spi_ops pic32_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
pic32_spi_priv	drivers/spi/pic32_spi.c	/^struct pic32_spi_priv {$/;"	s	file:
pic32_spi_probe	drivers/spi/pic32_spi.c	/^static int pic32_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
pic32_spi_release_bus	drivers/spi/pic32_spi.c	/^static int pic32_spi_release_bus(struct udevice *slave)$/;"	f	typeref:typename:int	file:
pic32_spi_rx_fifo_level	drivers/spi/pic32_spi.c	/^static inline u32 pic32_spi_rx_fifo_level(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:u32	file:
pic32_spi_set_mode	drivers/spi/pic32_spi.c	/^static int pic32_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
pic32_spi_set_speed	drivers/spi/pic32_spi.c	/^static int pic32_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
pic32_spi_set_word_size	drivers/spi/pic32_spi.c	/^static int pic32_spi_set_word_size(struct pic32_spi_priv *priv,$/;"	f	typeref:typename:int	file:
pic32_spi_set_wordlen	drivers/spi/pic32_spi.c	/^static int pic32_spi_set_wordlen(struct udevice *slave, unsigned int wordlen)$/;"	f	typeref:typename:int	file:
pic32_spi_tx_fifo_level	drivers/spi/pic32_spi.c	/^static inline u32 pic32_spi_tx_fifo_level(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:u32	file:
pic32_spi_xfer	drivers/spi/pic32_spi.c	/^static int pic32_spi_xfer(struct udevice *slave, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
pic32_tx_max	drivers/spi/pic32_spi.c	/^static u32 pic32_tx_max(struct pic32_spi_priv *priv, int n_bytes)$/;"	f	typeref:typename:u32	file:
pic32_uart_getc	drivers/serial/serial_pic32.c	/^static int pic32_uart_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_uart_ids	drivers/serial/serial_pic32.c	/^static const struct udevice_id pic32_uart_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pic32_uart_ops	drivers/serial/serial_pic32.c	/^static const struct dm_serial_ops pic32_uart_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
pic32_uart_pending	drivers/serial/serial_pic32.c	/^static int pic32_uart_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
pic32_uart_pending_input	drivers/serial/serial_pic32.c	/^static int pic32_uart_pending_input(void __iomem *base)$/;"	f	typeref:typename:int	file:
pic32_uart_priv	drivers/serial/serial_pic32.c	/^struct pic32_uart_priv {$/;"	s	file:
pic32_uart_probe	drivers/serial/serial_pic32.c	/^static int pic32_uart_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pic32_uart_putc	drivers/serial/serial_pic32.c	/^static int pic32_uart_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
pic32_uart_setbrg	drivers/serial/serial_pic32.c	/^static int pic32_uart_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
pic32eth_dev	drivers/net/pic32_eth.c	/^struct pic32eth_dev {$/;"	s	file:
pic_enable	arch/powerpc/cpu/ppc4xx/uic.c	/^void pic_enable(void)$/;"	f	typeref:typename:void
pic_enable	arch/powerpc/cpu/ppc4xx/xilinx_irq.c	/^void pic_enable(void)$/;"	f	typeref:typename:void
pic_irq_ack	arch/powerpc/cpu/ppc4xx/uic.c	/^void pic_irq_ack(unsigned int vec)$/;"	f	typeref:typename:void
pic_irq_ack	arch/powerpc/cpu/ppc4xx/xilinx_irq.c	/^void pic_irq_ack(unsigned int irq)$/;"	f	typeref:typename:void
pic_irq_disable	arch/powerpc/cpu/ppc4xx/uic.c	/^void pic_irq_disable(unsigned int vec)$/;"	f	typeref:typename:void
pic_irq_disable	arch/powerpc/cpu/ppc4xx/xilinx_irq.c	/^void pic_irq_disable(unsigned int irq)$/;"	f	typeref:typename:void
pic_irq_enable	arch/powerpc/cpu/ppc4xx/uic.c	/^void pic_irq_enable(unsigned int vec)$/;"	f	typeref:typename:void
pic_irq_enable	arch/powerpc/cpu/ppc4xx/xilinx_irq.c	/^void pic_irq_enable(unsigned int irq)$/;"	f	typeref:typename:void
pic_pins	arch/arm/dts/armada-xp-gp.dts	/^				pic_pins: pic-pins-0 {$/;"	l
pic_pins	arch/arm/dts/armada-xp-maxbcm.dts	/^				pic_pins: pic-pins-0 {$/;"	l
pick	net/link_local.c	/^static struct in_addr pick(void)$/;"	f	typeref:struct:in_addr	file:
picos_to_clk	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^picos_to_clk(int picos)$/;"	f	typeref:typename:int
picos_to_mclk	drivers/ddr/fsl/util.c	/^unsigned int picos_to_mclk(const unsigned int ctrl_num, unsigned int picos)$/;"	f	typeref:typename:unsigned int
picos_to_mhz	drivers/ddr/fsl/interactive.c	/^static unsigned int picos_to_mhz(unsigned int picos)$/;"	f	typeref:typename:unsigned int	file:
picosam9g45_lcd_hw_init	board/mini-box/picosam9g45/picosam9g45.c	/^static void picosam9g45_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
picosam9g45_macb_hw_init	board/mini-box/picosam9g45/picosam9g45.c	/^static void picosam9g45_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
picosam9g45_usb_hw_init	board/mini-box/picosam9g45/picosam9g45.c	/^static void picosam9g45_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
picr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	picr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
picr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	picr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pics	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pics;		\/* PMAN Interrupt Control and Status *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pid[8];			\/* Peripheral ID *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32[8]
pid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pid[8];			\/* Peripheral ID *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32[8]
pid	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	pid;		\/* 0x00 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
pid	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	pid;		\/* 0x000 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
pid	arch/arm/mach-keystone/msmc.c	/^	u32	pid;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
pid	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t pid;$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310208	typeref:typename:uint8_t
pid	common/cli_hush.c	/^	pid_t pid;					\/* 0 if exited *\/$/;"	m	struct:child_prog	typeref:typename:pid_t	file:
pid	drivers/gpio/pm8916_gpio.c	/^	uint32_t pid; \/* Peripheral ID on SPMI bus *\/$/;"	m	struct:pm8916_gpio_bank	typeref:typename:uint32_t	file:
pid	drivers/spi/ti_qspi.c	/^	u32 pid;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
pid	drivers/video/am335x-fb.c	/^	unsigned int		pid;			\/* 0x00 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
pid	include/linux/compat.h	/^       int pid;$/;"	m	struct:p_current	typeref:typename:int
pid	include/usb/mpc8xx_udc.h	/^	unsigned char pid;$/;"	m	struct:mpc8xx_ep	typeref:typename:unsigned char
pid12	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	pid12;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
pid_t	include/linux/types.h	/^typedef __kernel_pid_t		pid_t;$/;"	t	typeref:typename:__kernel_pid_t
pidr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pidr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pidr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pidr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
piebar1	arch/powerpc/include/asm/immap_512x.h	/^	u32 piebar1;$/;"	m	struct:pcictrl512x	typeref:typename:u32
piebar1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 piebar1;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
piebar2	arch/powerpc/include/asm/immap_512x.h	/^	u32 piebar2;$/;"	m	struct:pcictrl512x	typeref:typename:u32
piebar2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 piebar2;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
piggy_present	board/keymile/km83xx/km83xx.c	/^static int piggy_present(void)$/;"	f	typeref:typename:int	file:
piir	arch/arm/mach-at91/include/mach/at91_pit.h	/^	u32	piir;	\/* 0x0C Periodic Interval Image Register *\/$/;"	m	struct:at91_pit	typeref:typename:u32
piix4_ide_cntrl_f1	board/mpl/common/pci_parts.h	/^static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {$/;"	v	typeref:struct:pci_pip405_config_entry[]
piix4_isa_bridge_f0	board/mpl/common/pci_parts.h	/^static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = {$/;"	v	typeref:struct:pci_pip405_config_entry[]
piix4_pmm_cntrl_f3	board/mpl/common/pci_parts.h	/^static struct pci_pip405_config_entry piix4_pmm_cntrl_f3[] = {$/;"	v	typeref:struct:pci_pip405_config_entry[]
piix4_usb_cntrl_f2	board/mpl/common/pci_parts.h	/^static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {$/;"	v	typeref:struct:pci_pip405_config_entry[]
pim	drivers/net/mvgbe.h	/^	u32 pim;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pimg	include/fsl_validate.h	/^		u32 pimg;	\/* ptr to ESBC client image *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c050a	typeref:typename:u32
pimg64	include/fsl_validate.h	/^		u64 pimg64;	\/* 64 bit pointer to ESBC Image *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c070a	typeref:typename:u64
pimg64	include/fsl_validate.h	/^	u64 pimg64;		\/* 64 bit pointer to ESBC Image *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u64
pimisc	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pimisc;		\/* 0x1b0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pimisc	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pimisc;		\/* 0x1b0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pimr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	pimr;$/;"	m	struct:at91_st	typeref:typename:u32
pin	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_pin	pin;$/;"	m	struct:stm32_gpio_dsc	typeref:enum:stm32_gpio_pin
pin	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_pin	pin;$/;"	m	struct:stm32_gpio_dsc	typeref:enum:stm32_gpio_pin
pin	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_pin	pin;$/;"	m	struct:stm32_gpio_dsc	typeref:enum:stm32_gpio_pin
pin	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 pin;		\/* 0x24: EMC_PIN *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
pin	arch/powerpc/include/asm/iopin_8260.h	/^	u_char pin:5;	\/* port pin (0-31) *\/$/;"	m	struct:__anonbeb4a0e80108	typeref:typename:u_char:5
pin	arch/powerpc/include/asm/iopin_8xx.h	/^	u_char pin:5;	\/* port pin (0-31) *\/$/;"	m	struct:__anon728a0bc00108	typeref:typename:u_char:5
pin	arch/x86/include/asm/irq.h	/^	int pin;$/;"	m	struct:pirq_routing	typeref:typename:int
pin	drivers/pinctrl/pinctrl_pic32.c	/^	u16 pin;	\/* pin number in the port *\/$/;"	m	struct:pic32_pin_config	typeref:typename:u16	file:
pin	include/faraday/ftpci100.h	/^	unsigned int pin;$/;"	m	struct:pci_config	typeref:typename:unsigned int
pin	include/ioports.h	/^	unsigned char	pin;$/;"	m	struct:__anonc67861fe0308	typeref:typename:unsigned char
pin_banks	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	const struct samsung_pin_bank_data *pin_banks;$/;"	m	struct:samsung_pin_ctrl	typeref:typename:const struct samsung_pin_bank_data *
pin_base	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int pin_base;$/;"	m	struct:meson_pinctrl_data	typeref:typename:unsigned int
pin_cfg	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^struct pin_cfg {$/;"	s
pin_ctrl	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	const struct samsung_pin_ctrl *pin_ctrl;$/;"	m	struct:exynos_pinctrl_priv	typeref:typename:const struct samsung_pin_ctrl *
pin_db	board/renesas/blanche/blanche.c	/^struct pin_db {$/;"	s	file:
pin_dir	drivers/spi/omap3_spi.c	/^	unsigned int pin_dir:1;$/;"	m	struct:omap3_spi_priv	typeref:typename:unsigned int:1	file:
pin_guard	board/renesas/blanche/blanche.c	/^struct pin_db	pin_guard[] = {$/;"	v	typeref:struct:pin_db[]
pin_info	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^struct pin_info {$/;"	s	file:
pin_init	board/renesas/blanche/blanche.c	/^void pin_init(void)$/;"	f	typeref:typename:void
pin_input_data0	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_input_data0;		\/* _COM_PIN_INPUT_DATA0_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pin_input_data1	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_input_data1;		\/* _COM_PIN_INPUT_DATA1_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pin_input_enb	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_input_enb[PIN_REG_COUNT];$/;"	m	struct:dc_com_reg	typeref:typename:uint[]
pin_misc_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_misc_ctrl;		\/* _COM_PIN_MISC_CONTROL_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pin_mux_cmd	board/freescale/p1010rdb/p1010rdb.c	/^static int pin_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
pin_mux_display	arch/arm/mach-tegra/board2.c	/^__weak void pin_mux_display(void) {}$/;"	f	typeref:typename:__weak void
pin_mux_display	board/compal/paz00/paz00.c	/^void pin_mux_display(void)$/;"	f	typeref:typename:void
pin_mux_display	board/nvidia/harmony/harmony.c	/^void pin_mux_display(void)$/;"	f	typeref:typename:void
pin_mux_display	board/toradex/colibri_t20/colibri_t20.c	/^void pin_mux_display(void)$/;"	f	typeref:typename:void
pin_mux_mmc	arch/arm/mach-tegra/board2.c	/^__weak void pin_mux_mmc(void) {}$/;"	f	typeref:typename:__weak void
pin_mux_mmc	board/avionic-design/common/tamonten-ng.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/avionic-design/common/tamonten.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/compal/paz00/paz00.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/compulab/trimslice/trimslice.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/cardhu/cardhu.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/dalmore/dalmore.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/e2220-1170/e2220-1170.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/harmony/harmony.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/p2371-0000/p2371-0000.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/p2371-2180/p2371-2180.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/p2571/p2571.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/seaboard/seaboard.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/nvidia/whistler/whistler.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_mmc	board/toradex/colibri_t20/colibri_t20.c	/^void pin_mux_mmc(void)$/;"	f	typeref:typename:void
pin_mux_nand	arch/arm/mach-tegra/board2.c	/^__weak void pin_mux_nand(void)$/;"	f	typeref:typename:__weak void
pin_mux_nand	board/toradex/colibri_t20/colibri_t20.c	/^void pin_mux_nand(void)$/;"	f	typeref:typename:void
pin_mux_spi	arch/arm/mach-tegra/board2.c	/^__weak void pin_mux_spi(void) {}$/;"	f	typeref:typename:__weak void
pin_mux_spi	board/compulab/trimslice/trimslice.c	/^void pin_mux_spi(void)$/;"	f	typeref:typename:void
pin_mux_usb	arch/arm/mach-tegra/board2.c	/^__weak void pin_mux_usb(void) {}$/;"	f	typeref:typename:__weak void
pin_mux_usb	board/compulab/trimslice/trimslice.c	/^void pin_mux_usb(void)$/;"	f	typeref:typename:void
pin_mux_usb	board/nvidia/harmony/harmony.c	/^void pin_mux_usb(void)$/;"	f	typeref:typename:void
pin_mux_usb	board/nvidia/seaboard/seaboard.c	/^void pin_mux_usb(void)$/;"	f	typeref:typename:void
pin_mux_usb	board/nvidia/whistler/whistler.c	/^void pin_mux_usb(void)$/;"	f	typeref:typename:void
pin_mux_usb	board/toradex/colibri_t20/colibri_t20.c	/^void pin_mux_usb(void)$/;"	f	typeref:typename:void
pin_mux_usb	board/toradex/colibri_t30/colibri_t30.c	/^void pin_mux_usb(void)$/;"	f	typeref:typename:void
pin_name	arch/x86/include/asm/sfi.h	/^	char	pin_name[SFI_NAME_LEN];$/;"	m	struct:sfi_gpio_table_entry	typeref:typename:char[]
pin_no	arch/x86/include/asm/sfi.h	/^	u16	pin_no;$/;"	m	struct:sfi_gpio_table_entry	typeref:typename:u16
pin_output_data	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_output_data[PIN_REG_COUNT];$/;"	m	struct:dc_com_reg	typeref:typename:uint[]
pin_output_enb	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_output_enb[PIN_REG_COUNT];$/;"	m	struct:dc_com_reg	typeref:typename:uint[]
pin_output_polarity	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_output_polarity[PIN_REG_COUNT];$/;"	m	struct:dc_com_reg	typeref:typename:uint[]
pin_output_sel	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pin_output_sel[PIN_OUTPUT_SEL_COUNT];$/;"	m	struct:dc_com_reg	typeref:typename:uint[]
pin_tbl	board/renesas/blanche/blanche.c	/^struct pin_db	pin_tbl[] = {$/;"	v	typeref:struct:pin_db[]
pin_to_bank_base	drivers/pinctrl/exynos/pinctrl-exynos.c	/^static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name,$/;"	f	typeref:typename:unsigned long	file:
pin_to_controller	arch/arm/mach-at91/include/mach/gpio.h	/^static inline void *pin_to_controller(unsigned pin)$/;"	f	typeref:typename:void *
pin_to_mask	arch/arm/mach-at91/include/mach/gpio.h	/^static inline unsigned pin_to_mask(unsigned pin)$/;"	f	typeref:typename:unsigned
pincntl1	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl1;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl1	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl1;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl10	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl10;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl10	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl10;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl100	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl100;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl100	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl100;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl101	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl101;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl101	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl101;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl102	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl102;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl102	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl102;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl103	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl103;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl103	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl103;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl104	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl104;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl104	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl104;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl105	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl105;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl105	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl105;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl106	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl106;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl106	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl106;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl107	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl107;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl107	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl107;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl108	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl108;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl108	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl108;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl109	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl109;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl109	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl109;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl11	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl11;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl11	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl11;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl110	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl110;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl110	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl110;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl111	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl111;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl111	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl111;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl112	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl112;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl112	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl112;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl113	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl113;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl113	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl113;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl114	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl114;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl114	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl114;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl115	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl115;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl115	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl115;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl116	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl116;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl116	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl116;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl117	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl117;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl117	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl117;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl118	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl118;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl118	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl118;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl119	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl119;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl119	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl119;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl12	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl12;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl12	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl12;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl120	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl120;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl120	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl120;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl121	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl121;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl121	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl121;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl122	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl122;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl122	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl122;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl123	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl123;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl123	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl123;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl124	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl124;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl124	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl124;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl125	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl125;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl125	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl125;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl126	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl126;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl126	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl126;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl127	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl127;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl127	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl127;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl128	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl128;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl128	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl128;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl129	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl129;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl129	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl129;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl13	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl13;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl13	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl13;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl130	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl130;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl130	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl130;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl131	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl131;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl131	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl131;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl132	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl132;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl132	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl132;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl133	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl133;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl133	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl133;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl134	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl134;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl134	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl134;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl135	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl135;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl135	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl135;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl136	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl136;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl136	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl136;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl137	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl137;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl137	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl137;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl138	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl138;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl138	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl138;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl139	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl139;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl139	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl139;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl14	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl14;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl14	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl14;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl140	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl140;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl140	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl140;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl141	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl141;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl141	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl141;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl142	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl142;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl142	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl142;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl143	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl143;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl143	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl143;$/;"	m	struct:pad_signals	typeref:typename:int
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pincntl145	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl145;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl145	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl145;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl146	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl146;$/;"	m	struct:pad_signals	typeref:typename:int
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pincntl147	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl147;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl147	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl147;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl148	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl148;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl148	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl148;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl149	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl149;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl149	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl149;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl15	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl15;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl15	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl15;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl150	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl150;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl150	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl150;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl151	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl151;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl151	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl151;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl152	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl152;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl152	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl152;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl153	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl153;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl153	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl153;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl154	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl154;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl154	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl154;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl155	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl155;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl155	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl155;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl156	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl156;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl156	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl156;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl157	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl157;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl157	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl157;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl158	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl158;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl158	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl158;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl159	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl159;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl159	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl159;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl16	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl16;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl16	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl16;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl160	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl160;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl160	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl160;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl161	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl161;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl161	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl161;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl162	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl162;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl162	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl162;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl163	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl163;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl163	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl163;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl164	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl164;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl164	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl164;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl165	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl165;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl165	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl165;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl166	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl166;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl166	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl166;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl167	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl167;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl167	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl167;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl168	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl168;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl168	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl168;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl169	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl169;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl169	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl169;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl17	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl17;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl17	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl17;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl170	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl170;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl170	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl170;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl171	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl171;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl171	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl171;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl172	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl172;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl172	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl172;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl173	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl173;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl173	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl173;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl174	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl174;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl174	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl174;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl175	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl175;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl175	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl175;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl176	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl176;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl176	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl176;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl177	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl177;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl177	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl177;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl178	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl178;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl178	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl178;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl179	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl179;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl179	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl179;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl18	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl18;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl18	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl18;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl180	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl180;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl180	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl180;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl181	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl181;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl181	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl181;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl182	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl182;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl182	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl182;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl183	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl183;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl183	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl183;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl184	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl184;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl184	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl184;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl185	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl185;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl185	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl185;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl186	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl186;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl186	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl186;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl187	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl187;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl187	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl187;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl188	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl188;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl188	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl188;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl189	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl189;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl189	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl189;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl19	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl19;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl19	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl19;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl190	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl190;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl190	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl190;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl191	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl191;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl191	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl191;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl192	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl192;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl192	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl192;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl193	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl193;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl193	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl193;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl194	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl194;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl194	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl194;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl195	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl195;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl195	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl195;$/;"	m	struct:pad_signals	typeref:typename:int
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pincntl196	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl196;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl197	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl197;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl197	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl197;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl198	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl198;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl198	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl198;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl199	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl199;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl199	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl199;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl2	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl2;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl2	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl2;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl20	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl20;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl20	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl20;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl200	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl200;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl200	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl200;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl201	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl201;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl201	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl201;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl202	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl202;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl202	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl202;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl203	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl203;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl203	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl203;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl204	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl204;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl204	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl204;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl205	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl205;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl205	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl205;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl206	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl206;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl206	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl206;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl207	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl207;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl207	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl207;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl208	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl208;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl208	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl208;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl209	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl209;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl209	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl209;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl21	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl21;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl21	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl21;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl210	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl210;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl210	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl210;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl211	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl211;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl211	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl211;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl212	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl212;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl212	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl212;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl213	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl213;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl213	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl213;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl214	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl214;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl214	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl214;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl215	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl215;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl215	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl215;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl216	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl216;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl216	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl216;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl217	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl217;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl217	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl217;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl218	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl218;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl218	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl218;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl219	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl219;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl219	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl219;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl22	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl22;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl22	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl22;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl220	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl220;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl220	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl220;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl221	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl221;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl221	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl221;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl222	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl222;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl222	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl222;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl223	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl223;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl223	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl223;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl224	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl224;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl224	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl224;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl225	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl225;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl225	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl225;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl226	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl226;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl226	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl226;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl227	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl227;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl227	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl227;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl228	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl228;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl228	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl228;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl229	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl229;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl229	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl229;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl23	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl23;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl23	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl23;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl230	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl230;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl230	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl230;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl231	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl231;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl231	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl231;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl232	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl232;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl232	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl232;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl233	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl233;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl233	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl233;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl234	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl234;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl234	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl234;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl235	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl235;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl235	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl235;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl236	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl236;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl236	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl236;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl237	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl237;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl237	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl237;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl238	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl238;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl238	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl238;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl239	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl239;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl239	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl239;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl24	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl24;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl24	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl24;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl240	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl240;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl240	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl240;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl241	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl241;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl241	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl241;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl242	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl242;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl242	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl242;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl243	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl243;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl243	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl243;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl244	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl244;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl244	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl244;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl245	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl245;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl245	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl245;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl246	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl246;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl246	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl246;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl247	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl247;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl247	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl247;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl248	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl248;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl248	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl248;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl249	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl249;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl249	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl249;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl25	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl25;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl25	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl25;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl250	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl250;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl250	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl250;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl251	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl251;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl251	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl251;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl252	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl252;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl252	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl252;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl253	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl253;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl253	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl253;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl254	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl254;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl254	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl254;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl255	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl255;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl255	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl255;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl256	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl256;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl256	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl256;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl257	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl257;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl257	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl257;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl258	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl258;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl258	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl258;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl259	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl259;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl259	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl259;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl26	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl26;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl26	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl26;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl260	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl260;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl260	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl260;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl261	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl261;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl261	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl261;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl262	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl262;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl262	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl262;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl263	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl263;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl263	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl263;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl264	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl264;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl264	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl264;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl265	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl265;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl265	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl265;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl266	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl266;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl266	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl266;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl267	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl267;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl267	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl267;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl268	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl268;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl268	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl268;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl269	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl269;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl269	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl269;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl27	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl27;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl27	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl27;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl270	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl270;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl270	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl270;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl271	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl271;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl272	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl272;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl273	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl273;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl274	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl274;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl275	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl275;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl276	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl276;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl277	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl277;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl278	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl278;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl279	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl279;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl28	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl28;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl28	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl28;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl280	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl280;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl281	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl281;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl282	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl282;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl283	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl283;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl284	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl284;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl285	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl285;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl286	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl286;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl287	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl287;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl288	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl288;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl289	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl289;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl29	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl29;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl29	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl29;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl290	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl290;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl291	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl291;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl292	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl292;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl293	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl293;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl294	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl294;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl295	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl295;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl296	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl296;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl297	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl297;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl298	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl298;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl299	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl299;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl3	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl3;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl3	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl3;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl30	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl30;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl30	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl30;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl300	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl300;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl301	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl301;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl302	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl302;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl303	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl303;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl304	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl304;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl305	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl305;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl306	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl306;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl307	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl307;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl308	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl308;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl309	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl309;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl31	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl31;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl31	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl31;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl310	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl310;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl311	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl311;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl312	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl312;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl313	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl313;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl314	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl314;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl315	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl315;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl316	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl316;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl317	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl317;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl318	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl318;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl319	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl319;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl32	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl32;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl32	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl32;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl320	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl320;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl321	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl321;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl322	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl322;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl323	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl323;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl33	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl33;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl33	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl33;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl34	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl34;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl34	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl34;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl35	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl35;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl35	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl35;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl36	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl36;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl36	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl36;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl37	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl37;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl37	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl37;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl38	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl38;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl38	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl38;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl39	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl39;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl39	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl39;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl4	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl4;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl4	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl4;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl40	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl40;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl40	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl40;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl41	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl41;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl41	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl41;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl42	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl42;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl42	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl42;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl43	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl43;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl43	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl43;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl44	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl44;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl44	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl44;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl45	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl45;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl45	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl45;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl46	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl46;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl46	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl46;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl47	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl47;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl47	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl47;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl48	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl48;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl48	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl48;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl49	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl49;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl49	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl49;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl5	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl5;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl5	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl5;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl50	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl50;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl50	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl50;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl51	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl51;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl51	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl51;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl52	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl52;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl52	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl52;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl53	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl53;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl53	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl53;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl54	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl54;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl54	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl54;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl55	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl55;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl55	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl55;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl56	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl56;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl56	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl56;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl57	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl57;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl57	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl57;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl58	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl58;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl58	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl58;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl59	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl59;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl59	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl59;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl6	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl6;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl6	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl6;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl60	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl60;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl60	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl60;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl61	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl61;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl61	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl61;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl62	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl62;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl62	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl62;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl63	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl63;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl63	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl63;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl64	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl64;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl64	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl64;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl65	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl65;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl65	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl65;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl66	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl66;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl66	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl66;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl67	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl67;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl67	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl67;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl68	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl68;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl68	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl68;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl69	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl69;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl69	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl69;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl7	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl7;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl7	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl7;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl70	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl70;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl70	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl70;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl71	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl71;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl71	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl71;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl72	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl72;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl72	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl72;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl73	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl73;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl73	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl73;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl74	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl74;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl74	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl74;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl75	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl75;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl75	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl75;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl76	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl76;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl76	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl76;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl77	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl77;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl77	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl77;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl78	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl78;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl78	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl78;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl79	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl79;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl79	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl79;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl8	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl8;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl8	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl8;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl80	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl80;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl80	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl80;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl81	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl81;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl81	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl81;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl82	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl82;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl82	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl82;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl83	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl83;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl83	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl83;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl84	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl84;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl84	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl84;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl85	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl85;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl85	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl85;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl86	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl86;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl86	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl86;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl87	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl87;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl87	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl87;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl88	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl88;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl88	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl88;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl89	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl89;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl89	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl89;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl9	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl9;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl9	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl9;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl90	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl90;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl90	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl90;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl91	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl91;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl91	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl91;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl92	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl92;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl92	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl92;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl93	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl93;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl93	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl93;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl94	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl94;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl94	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl94;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl95	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl95;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl95	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl95;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl96	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl96;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl96	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl96;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl97	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl97;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl97	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl97;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl98	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl98;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl98	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl98;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl99	arch/arm/include/asm/arch-am33xx/mux_ti814x.h	/^	int pincntl99;$/;"	m	struct:pad_signals	typeref:typename:int
pincntl99	arch/arm/include/asm/arch-am33xx/mux_ti816x.h	/^	int pincntl99;$/;"	m	struct:pad_signals	typeref:typename:int
pinconf	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_port *pinconf; \/* pin configuration*\/$/;"	m	struct:pic32_pinctrl_priv	typeref:struct:pic32_reg_port *	file:
pinconf_enable_setting	drivers/pinctrl/pinctrl-generic.c	/^static int pinconf_enable_setting(struct udevice *dev, bool is_group,$/;"	f	typeref:typename:int	file:
pinconf_group_set	include/dm/pinctrl.h	/^	int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector,$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,unsigned group_selector,unsigned param,unsigned argument)
pinconf_num_params	include/dm/pinctrl.h	/^	unsigned int pinconf_num_params;$/;"	m	struct:pinctrl_ops	typeref:typename:unsigned int
pinconf_param	include/dm/pinctrl.h	/^struct pinconf_param {$/;"	s
pinconf_params	include/dm/pinctrl.h	/^	const struct pinconf_param *pinconf_params;$/;"	m	struct:pinctrl_ops	typeref:typename:const struct pinconf_param *
pinconf_prop_name_to_param	drivers/pinctrl/pinctrl-generic.c	/^static int pinconf_prop_name_to_param(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pinconf_set	include/dm/pinctrl.h	/^	int (*pinconf_set)(struct udevice *dev, unsigned pin_selector,$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,unsigned pin_selector,unsigned param,unsigned argument)
pinconfig_post_bind	drivers/pinctrl/pinctrl-uclass.c	/^static int pinconfig_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pinctrl	arch/arm/dts/armada-370-xp.dtsi	/^			pinctrl: pin-ctrl@18000 {$/;"	l
pinctrl	arch/arm/dts/armada-38x.dtsi	/^			pinctrl: pinctrl@18000 {$/;"	l
pinctrl	arch/arm/dts/rk3036.dtsi	/^	pinctrl: pinctrl {$/;"	l
pinctrl	arch/arm/dts/rk3288.dtsi	/^	pinctrl: pinctrl {$/;"	l
pinctrl	arch/arm/dts/rk3399.dtsi	/^	pinctrl: pinctrl {$/;"	l
pinctrl	arch/arm/dts/uniphier-common32.dtsi	/^			pinctrl: pinctrl {$/;"	l
pinctrl	arch/arm/dts/uniphier-ld11.dtsi	/^			pinctrl: pinctrl {$/;"	l
pinctrl	arch/arm/dts/uniphier-ld20.dtsi	/^			pinctrl: pinctrl {$/;"	l
pinctrl	arch/arm/dts/uniphier-sld3.dtsi	/^			pinctrl: pinctrl {$/;"	l
pinctrl	arch/mips/dts/pic32mzda.dtsi	/^	pinctrl: pinctrl@1f801400 {$/;"	l
pinctrl	drivers/gpio/rk_gpio.c	/^	struct udevice *pinctrl;$/;"	m	struct:rockchip_gpio_priv	typeref:struct:udevice *	file:
pinctrl0	arch/arm/dts/s5pc1xx-goni.dts	/^	pinctrl0: pinctrl@e0200000 {$/;"	l
pinctrl0	arch/arm/dts/s5pc1xx-smdkc100.dts	/^	pinctrl0: pinctrl@e0300000 {$/;"	l
pinctrl0	arch/arm/dts/zynq-7000.dtsi	/^			pinctrl0: pinctrl@700 {$/;"	l	label:amba.slcr
pinctrl_0	arch/arm/dts/exynos4210-pinctrl-uboot.dtsi	/^	pinctrl_0: pinctrl@11400000 {$/;"	l
pinctrl_0	arch/arm/dts/exynos4210.dtsi	/^	pinctrl_0: pinctrl@11400000 {$/;"	l
pinctrl_0	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^	pinctrl_0: pinctrl@11400000 {$/;"	l
pinctrl_0	arch/arm/dts/exynos4x12.dtsi	/^	pinctrl_0: pinctrl@11400000 {$/;"	l
pinctrl_0	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^	pinctrl_0: pinctrl@11400000 {$/;"	l
pinctrl_0	arch/arm/dts/exynos5250.dtsi	/^	pinctrl_0: pinctrl@11400000 {$/;"	l
pinctrl_0	arch/arm/dts/exynos54xx.dtsi	/^	pinctrl_0: pinctrl@13400000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos4210-pinctrl-uboot.dtsi	/^	pinctrl_1: pinctrl@11000000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos4210.dtsi	/^	pinctrl_1: pinctrl@11000000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^	pinctrl_1: pinctrl@11000000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos4x12.dtsi	/^	pinctrl_1: pinctrl@11000000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^	pinctrl_1: pinctrl@13400000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos5250.dtsi	/^	pinctrl_1: pinctrl@13400000 {$/;"	l
pinctrl_1	arch/arm/dts/exynos54xx.dtsi	/^	pinctrl_1: pinctrl@13410000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos4210-pinctrl-uboot.dtsi	/^	pinctrl_2: pinctrl@03860000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos4210.dtsi	/^	pinctrl_2: pinctrl@03860000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^	pinctrl_2: pinctrl@03860000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos4x12.dtsi	/^	pinctrl_2: pinctrl@03860000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^	pinctrl_2: pinctrl@10d10000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos5250.dtsi	/^	pinctrl_2: pinctrl@10d10000 {$/;"	l
pinctrl_2	arch/arm/dts/exynos54xx.dtsi	/^	pinctrl_2: pinctrl@14000000 {$/;"	l
pinctrl_3	arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi	/^	pinctrl_3: pinctrl@106E0000 {$/;"	l
pinctrl_3	arch/arm/dts/exynos4x12.dtsi	/^	pinctrl_3: pinctrl@106E0000 {$/;"	l
pinctrl_3	arch/arm/dts/exynos5250-pinctrl-uboot.dtsi	/^	pinctrl_3: pinctrl@03860000 {$/;"	l
pinctrl_3	arch/arm/dts/exynos5250.dtsi	/^	pinctrl_3: pinctrl@03860000 {$/;"	l
pinctrl_3	arch/arm/dts/exynos54xx.dtsi	/^	pinctrl_3: pinctrl@14010000 {$/;"	l
pinctrl_4	arch/arm/dts/exynos54xx.dtsi	/^	pinctrl_4: pinctrl@03860000 {$/;"	l
pinctrl_ac97	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_ac97: ac97-0 {$/;"	l
pinctrl_adc0_ad0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad0: adc0_ad0 {$/;"	l
pinctrl_adc0_ad1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad1: adc0_ad1 {$/;"	l
pinctrl_adc0_ad2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad2: adc0_ad2 {$/;"	l
pinctrl_adc0_ad3	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad3: adc0_ad3 {$/;"	l
pinctrl_adc0_ad4	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad4: adc0_ad4 {$/;"	l
pinctrl_adc0_ad5	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad5: adc0_ad5 {$/;"	l
pinctrl_adc0_ad6	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad6: adc0_ad6 {$/;"	l
pinctrl_adc0_ad7	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_ad7: adc0_ad7 {$/;"	l
pinctrl_adc0_adtrg	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_adc0_adtrg: adc0_adtrg {$/;"	l
pinctrl_aobus	arch/arm/dts/meson-gxbb.dtsi	/^			pinctrl_aobus: pinctrl@14 {$/;"	l	label:aobus
pinctrl_ar933x_spi_config	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static void pinctrl_ar933x_spi_config(struct ar933x_pinctrl_priv *priv, int cs)$/;"	f	typeref:typename:void	file:
pinctrl_ar933x_uart_config	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^static void pinctrl_ar933x_uart_config(struct ar933x_pinctrl_priv *priv, int uart_id)$/;"	f	typeref:typename:void	file:
pinctrl_board_mmc0_slot1	arch/arm/dts/at91sam9g45-gurnard.dts	/^					pinctrl_board_mmc0_slot1: mmc0_slot1-board {$/;"	l
pinctrl_can0_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_can0_default: can0-default {$/;"	l
pinctrl_can_rx_tx	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_can_rx_tx: can_rx_tx {$/;"	l
pinctrl_config_one	drivers/pinctrl/pinctrl-uclass.c	/^static int pinctrl_config_one(struct udevice *config)$/;"	f	typeref:typename:int	file:
pinctrl_csi1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_csi1: csi1grp {$/;"	l
pinctrl_dbgu	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_dbgu: dbgu-0 {$/;"	l
pinctrl_dbgu	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_dbgu: dbgu-0 {$/;"	l
pinctrl_dbgu	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_dbgu: dbgu-0 {$/;"	l
pinctrl_dbgu	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_dbgu: dbgu-0 {$/;"	l
pinctrl_decode_pin_config	drivers/pinctrl/pinctrl-uclass.c	/^int pinctrl_decode_pin_config(const void *blob, int node)$/;"	f	typeref:typename:int
pinctrl_dvfs	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_dvfs: dvfsgrp {$/;"	l
pinctrl_emmc	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_emmc: emmc_grp {$/;"	l
pinctrl_emmc_1v8	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_emmc_1v8: emmc_grp_1v8 {$/;"	l
pinctrl_enet1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_enet1: enet1grp {$/;"	l
pinctrl_enet2	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_enet2: enet2grp {$/;"	l
pinctrl_fb	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_fb: fb-0 {$/;"	l
pinctrl_fb	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_fb: fb-0 {$/;"	l
pinctrl_fb	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_fb: fb-0 {$/;"	l
pinctrl_flexcan1	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_flexcan1: flexcan1grp {$/;"	l
pinctrl_flexcan1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_flexcan1: flexcan1grp{$/;"	l
pinctrl_flexcan2	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_flexcan2: flexcan2grp {$/;"	l
pinctrl_flexcan2	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_flexcan2: flexcan2grp{$/;"	l
pinctrl_gem0_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_gem0_default: gem0-default {$/;"	l
pinctrl_gem0_default	arch/arm/dts/zynq-zc706.dts	/^	pinctrl_gem0_default: gem0-default {$/;"	l
pinctrl_generic_set_state	drivers/pinctrl/pinctrl-generic.c	/^int pinctrl_generic_set_state(struct udevice *dev, struct udevice *config)$/;"	f	typeref:typename:int
pinctrl_generic_set_state	include/dm/pinctrl.h	/^static inline int pinctrl_generic_set_state(struct udevice *pctldev,$/;"	f	typeref:typename:int
pinctrl_generic_set_state_one	drivers/pinctrl/pinctrl-generic.c	/^static int pinctrl_generic_set_state_one(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pinctrl_generic_set_state_subnode	drivers/pinctrl/pinctrl-generic.c	/^static int pinctrl_generic_set_state_subnode(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pinctrl_get_gpio_mux	drivers/pinctrl/pinctrl-uclass.c	/^int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index)$/;"	f	typeref:typename:int
pinctrl_get_ops	include/dm/pinctrl.h	/^#define pinctrl_get_ops(/;"	d
pinctrl_get_periph_id	drivers/pinctrl/pinctrl-uclass.c	/^int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph)$/;"	f	typeref:typename:int
pinctrl_gpio0_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_gpio0_default: gpio0-default {$/;"	l
pinctrl_gpio0_default	arch/arm/dts/zynq-zc706.dts	/^	pinctrl_gpio0_default: gpio0-default {$/;"	l
pinctrl_gpmi_nand	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_gpmi_nand: gpmi-nand {$/;"	l
pinctrl_group_name_to_selector	drivers/pinctrl/pinctrl-generic.c	/^static int pinctrl_group_name_to_selector(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pinctrl_hog_1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_hog_1: hoggrp-1 {$/;"	l
pinctrl_hog_2	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_hog_2: hoggrp-2 {$/;"	l
pinctrl_i2c0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_i2c0: i2c0-0 {$/;"	l
pinctrl_i2c0	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_i2c0: i2c0_grp {$/;"	l
pinctrl_i2c0	arch/sandbox/dts/sandbox.dts	/^		pinctrl_i2c0: i2c0 {$/;"	l
pinctrl_i2c0_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_i2c0_default: i2c0-default {$/;"	l
pinctrl_i2c0_default	arch/arm/dts/zynq-zc706.dts	/^	pinctrl_i2c0_default: i2c0-default {$/;"	l
pinctrl_i2c1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_i2c1: i2c1-0 {$/;"	l
pinctrl_i2c1	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_i2c1: i2c1grp {$/;"	l
pinctrl_i2c1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_i2c1: i2c1grp {$/;"	l
pinctrl_i2c1	arch/arm/dts/imx7-colibri.dts	/^	pinctrl_i2c1: i2c1-grp {$/;"	l
pinctrl_i2c1	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_i2c1: i2c1_grp {$/;"	l
pinctrl_i2c1_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_i2c1_default: i2c1_default {$/;"	l	label:pioA
pinctrl_i2c1_gpio	arch/arm/dts/imx7-colibri.dts	/^	pinctrl_i2c1_gpio: i2c1-gpio-grp {$/;"	l
pinctrl_i2c2	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_i2c2: i2c2grp {$/;"	l
pinctrl_i2c2	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_i2c2: i2c2grp {$/;"	l
pinctrl_i2c2	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_i2c2: i2c2_grp {$/;"	l
pinctrl_i2c3	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_i2c3: i2c3grp {$/;"	l
pinctrl_i2c3	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_i2c3: i2c3_grp {$/;"	l
pinctrl_i2c4	arch/arm/dts/imx7-colibri.dts	/^	pinctrl_i2c4: i2c4-grp {$/;"	l
pinctrl_i2c4	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_i2c4: i2c4_grp {$/;"	l
pinctrl_i2c4_gpio	arch/arm/dts/imx7-colibri.dts	/^	pinctrl_i2c4_gpio: i2c4-gpio-grp {$/;"	l
pinctrl_i2c_bitbang	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_i2c_bitbang: i2c-0-bitbang {$/;"	l
pinctrl_i2c_gpio0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_i2c_gpio0: i2c_gpio0-0 {$/;"	l
pinctrl_i2c_twi	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_i2c_twi: i2c-0-twi {$/;"	l
pinctrl_isi_data_0_7	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_isi_data_0_7: isi-0-data-0-7 {$/;"	l
pinctrl_isi_data_10_11	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_isi_data_10_11: isi-0-data-10-11 {$/;"	l
pinctrl_isi_data_8_9	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_isi_data_8_9: isi-0-data-8-9 {$/;"	l
pinctrl_lcdif_ctrl	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_lcdif_ctrl: lcdifctrlgrp {$/;"	l
pinctrl_lcdif_dat	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_lcdif_dat: lcdifdatgrp {$/;"	l
pinctrl_lcdif_reset	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_lcdif_reset: lcdifresetgrp {$/;"	l
pinctrl_macb0_phy_irq	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_macb0_phy_irq: macb0_phy_irq {$/;"	l	label:pioA
pinctrl_macb0_rmii	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_macb0_rmii: macb0_rmii {$/;"	l	label:pioA
pinctrl_macb_rmii	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_macb_rmii: macb_rmii-0 {$/;"	l
pinctrl_macb_rmii	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_macb_rmii: macb_rmii-0 {$/;"	l
pinctrl_macb_rmii	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_macb_rmii: macb_rmii-0 {$/;"	l
pinctrl_macb_rmii_mii	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {$/;"	l
pinctrl_macb_rmii_mii	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {$/;"	l
pinctrl_macb_rmii_mii	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {$/;"	l
pinctrl_macb_rmii_mii_alt	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {$/;"	l
pinctrl_mmc0_clk	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_mmc0_clk: mmc0_clk-0 {$/;"	l
pinctrl_mmc0_clk	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_mmc0_clk: mmc0_clk-0 {$/;"	l
pinctrl_mmc0_clk	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc0_clk: mmc0_clk-0 {$/;"	l
pinctrl_mmc0_slot0_clk_cmd_dat0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {$/;"	l
pinctrl_mmc0_slot0_cmd_dat0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {$/;"	l
pinctrl_mmc0_slot0_cmd_dat0	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {$/;"	l
pinctrl_mmc0_slot0_cmd_dat0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {$/;"	l
pinctrl_mmc0_slot0_dat1_3	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {$/;"	l
pinctrl_mmc0_slot0_dat1_3	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {$/;"	l
pinctrl_mmc0_slot0_dat1_3	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {$/;"	l
pinctrl_mmc0_slot0_dat1_3	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {$/;"	l
pinctrl_mmc0_slot0_dat4_7	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {$/;"	l
pinctrl_mmc0_slot1_cmd_dat0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {$/;"	l
pinctrl_mmc0_slot1_cmd_dat0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {$/;"	l
pinctrl_mmc0_slot1_dat1_3	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {$/;"	l
pinctrl_mmc0_slot1_dat1_3	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {$/;"	l
pinctrl_mmc1_clk	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc1_clk: mmc1_clk-0 {$/;"	l
pinctrl_mmc1_slot0_clk_cmd_dat0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {$/;"	l
pinctrl_mmc1_slot0_cmd_dat0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {$/;"	l
pinctrl_mmc1_slot0_dat1_3	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {$/;"	l
pinctrl_mmc1_slot0_dat1_3	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {$/;"	l
pinctrl_mmc1_slot0_dat4_7	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {$/;"	l
pinctrl_mmc1_slot1_cmd_dat0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {$/;"	l
pinctrl_mmc1_slot1_dat1_3	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {$/;"	l
pinctrl_nand	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_nand: nand-0 {$/;"	l
pinctrl_nand	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_nand: nand-0 {$/;"	l
pinctrl_nand	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_nand: nand-0 {$/;"	l
pinctrl_nand	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_nand: nand-0 {$/;"	l
pinctrl_nand	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_nand: nand_grp {$/;"	l
pinctrl_nand2cs	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_nand2cs: nand2cs_grp {$/;"	l
pinctrl_ops	include/dm/pinctrl.h	/^struct pinctrl_ops {$/;"	s
pinctrl_pck0_as_mck	arch/arm/dts/at91sam9260-smartweb.dts	/^					pinctrl_pck0_as_mck: pck0_as_mck {$/;"	l
pinctrl_pck0_as_mck	arch/arm/dts/at91sam9g20-taurus.dts	/^					pinctrl_pck0_as_mck: pck0_as_mck {$/;"	l
pinctrl_pck0_as_mck	arch/arm/dts/at91sam9g45-gurnard.dts	/^					pinctrl_pck0_as_mck: pck0_as_mck {$/;"	l
pinctrl_periphs	arch/arm/dts/meson-gxbb.dtsi	/^			pinctrl_periphs: pinctrl@4b0 {$/;"	l	label:periphs
pinctrl_pin_name_to_selector	drivers/pinctrl/pinctrl-generic.c	/^static int pinctrl_pin_name_to_selector(struct udevice *dev, const char *pin)$/;"	f	typeref:typename:int	file:
pinctrl_post_bind	drivers/pinctrl/pinctrl-uclass.c	/^static int pinctrl_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pinctrl_pwm1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_pwm1: pwm1grp {$/;"	l
pinctrl_qca953x_spi_config	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static void pinctrl_qca953x_spi_config(struct qca953x_pinctrl_priv *priv, int cs)$/;"	f	typeref:typename:void	file:
pinctrl_qca953x_uart_config	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static void pinctrl_qca953x_uart_config(struct qca953x_pinctrl_priv *priv, int uart_id)$/;"	f	typeref:typename:void	file:
pinctrl_qspi	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_qspi: qspigrp {$/;"	l
pinctrl_qspi0_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_qspi0_default: qspi0_default {$/;"	l	label:pioA
pinctrl_request	drivers/pinctrl/pinctrl-uclass.c	/^int pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int
pinctrl_request_noflags	drivers/pinctrl/pinctrl-uclass.c	/^int pinctrl_request_noflags(struct udevice *dev, int func)$/;"	f	typeref:typename:int
pinctrl_rk3036_i2c_config	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static void pinctrl_rk3036_i2c_config(struct rk3036_grf *grf, int i2c_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3036_pwm_config	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static void pinctrl_rk3036_pwm_config(struct rk3036_grf *grf, int pwm_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3036_sdmmc_config	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static void pinctrl_rk3036_sdmmc_config(struct rk3036_grf *grf, int mmc_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3036_spi_config	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static void pinctrl_rk3036_spi_config(struct rk3036_grf *grf, int cs)$/;"	f	typeref:typename:void	file:
pinctrl_rk3036_uart_config	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static void pinctrl_rk3036_uart_config(struct rk3036_grf *grf, int uart_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3288_hdmi_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static void pinctrl_rk3288_hdmi_config(struct rk3288_grf *grf, int hdmi_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3288_i2c_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static void pinctrl_rk3288_i2c_config(struct rk3288_grf *grf,$/;"	f	typeref:typename:void	file:
pinctrl_rk3288_lcdc_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static void pinctrl_rk3288_lcdc_config(struct rk3288_grf *grf, int lcd_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3288_pwm_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static void pinctrl_rk3288_pwm_config(struct rk3288_grf *grf, int pwm_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3288_sdmmc_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static void pinctrl_rk3288_sdmmc_config(struct rk3288_grf *grf, int mmc_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3288_spi_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int pinctrl_rk3288_spi_config(struct rk3288_grf *grf,$/;"	f	typeref:typename:int	file:
pinctrl_rk3288_uart_config	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static void pinctrl_rk3288_uart_config(struct rk3288_grf *grf, int uart_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3399_i2c_config	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,$/;"	f	typeref:typename:void	file:
pinctrl_rk3399_lcdc_config	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static void pinctrl_rk3399_lcdc_config(struct rk3399_grf_regs *grf, int lcd_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3399_pwm_config	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf,$/;"	f	typeref:typename:void	file:
pinctrl_rk3399_sdmmc_config	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static void pinctrl_rk3399_sdmmc_config(struct rk3399_grf_regs *grf, int mmc_id)$/;"	f	typeref:typename:void	file:
pinctrl_rk3399_spi_config	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static int pinctrl_rk3399_spi_config(struct rk3399_grf_regs *grf,$/;"	f	typeref:typename:int	file:
pinctrl_rk3399_uart_config	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static void pinctrl_rk3399_uart_config(struct rk3399_grf_regs *grf,$/;"	f	typeref:typename:void	file:
pinctrl_sai2_hp_det_b	arch/arm/dts/imx6ull-14x14-evk.dts	/^                pinctrl_sai2_hp_det_b: sai2_hp_det_grp {$/;"	l
pinctrl_sd	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_sd: sd_grp {$/;"	l
pinctrl_sd1	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_sd1: sd1_grp {$/;"	l
pinctrl_sd1_1v8	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_sd1_1v8: sd1_grp_1v8 {$/;"	l
pinctrl_sd_1v8	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_sd_1v8: sd_grp_1v8 {$/;"	l
pinctrl_sdhci0_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_sdhci0_default: sdhci0-default {$/;"	l
pinctrl_sdhci0_default	arch/arm/dts/zynq-zc706.dts	/^	pinctrl_sdhci0_default: sdhci0-default {$/;"	l
pinctrl_sdmmc0_ck_cd_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {$/;"	l	label:pioA
pinctrl_sdmmc0_cmd_dat_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {$/;"	l	label:pioA
pinctrl_sdmmc1_ck_cd_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {$/;"	l	label:pioA
pinctrl_sdmmc1_cmd_dat_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {$/;"	l	label:pioA
pinctrl_select_state	drivers/pinctrl/pinctrl-uclass.c	/^int pinctrl_select_state(struct udevice *dev, const char *statename)$/;"	f	typeref:typename:int
pinctrl_select_state	include/dm/pinctrl.h	/^static inline int pinctrl_select_state(struct udevice *dev,$/;"	f	typeref:typename:int
pinctrl_select_state_full	drivers/pinctrl/pinctrl-uclass.c	/^static int pinctrl_select_state_full(struct udevice *dev, const char *statename)$/;"	f	typeref:typename:int	file:
pinctrl_select_state_simple	drivers/pinctrl/pinctrl-uclass.c	/^static int pinctrl_select_state_simple(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pinctrl_serial0	arch/sandbox/dts/sandbox.dts	/^		pinctrl_serial0: uart0 {$/;"	l
pinctrl_spi0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_spi0: spi0-0 {$/;"	l
pinctrl_spi0	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_spi0: spi0-0 {$/;"	l
pinctrl_spi0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_spi0: spi0-0 {$/;"	l
pinctrl_spi0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_spi0: spi0-0 {$/;"	l
pinctrl_spi0_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_spi0_default: spi0_default {$/;"	l	label:pioA
pinctrl_spi1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_spi1: spi1-0 {$/;"	l
pinctrl_spi1	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_spi1: spi1-0 {$/;"	l
pinctrl_spi1	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_spi1: spi1-0 {$/;"	l
pinctrl_spi1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_spi1: spi1-0 {$/;"	l
pinctrl_spi4	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_spi4: spi4grp {$/;"	l
pinctrl_ssc0_rx	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_ssc0_rx: ssc0_rx-0 {$/;"	l
pinctrl_ssc0_rx	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_ssc0_rx: ssc0_rx-0 {$/;"	l
pinctrl_ssc0_rx	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_ssc0_rx: ssc0_rx-0 {$/;"	l
pinctrl_ssc0_rx	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_ssc0_rx: ssc0_rx-0 {$/;"	l
pinctrl_ssc0_tx	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_ssc0_tx: ssc0_tx-0 {$/;"	l
pinctrl_ssc0_tx	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_ssc0_tx: ssc0_tx-0 {$/;"	l
pinctrl_ssc0_tx	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_ssc0_tx: ssc0_tx-0 {$/;"	l
pinctrl_ssc0_tx	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_ssc0_tx: ssc0_tx-0 {$/;"	l
pinctrl_ssc1_rx	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_ssc1_rx: ssc1_rx-0 {$/;"	l
pinctrl_ssc1_rx	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_ssc1_rx: ssc1_rx-0 {$/;"	l
pinctrl_ssc1_rx	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_ssc1_rx: ssc1_rx-0 {$/;"	l
pinctrl_ssc1_tx	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_ssc1_tx: ssc1_tx-0 {$/;"	l
pinctrl_ssc1_tx	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_ssc1_tx: ssc1_tx-0 {$/;"	l
pinctrl_ssc1_tx	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_ssc1_tx: ssc1_tx-0 {$/;"	l
pinctrl_ssc2_rx	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_ssc2_rx: ssc2_rx-0 {$/;"	l
pinctrl_ssc2_tx	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_ssc2_tx: ssc2_tx-0 {$/;"	l
pinctrl_system_bus	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_system_bus: system_bus_grp {$/;"	l
pinctrl_tcb0_tclk0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {$/;"	l
pinctrl_tcb0_tclk0	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {$/;"	l
pinctrl_tcb0_tclk0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {$/;"	l
pinctrl_tcb0_tclk0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {$/;"	l
pinctrl_tcb0_tclk1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {$/;"	l
pinctrl_tcb0_tclk1	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {$/;"	l
pinctrl_tcb0_tclk1	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {$/;"	l
pinctrl_tcb0_tclk1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {$/;"	l
pinctrl_tcb0_tclk2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {$/;"	l
pinctrl_tcb0_tclk2	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {$/;"	l
pinctrl_tcb0_tclk2	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {$/;"	l
pinctrl_tcb0_tclk2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {$/;"	l
pinctrl_tcb0_tioa0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {$/;"	l
pinctrl_tcb0_tioa0	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {$/;"	l
pinctrl_tcb0_tioa0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {$/;"	l
pinctrl_tcb0_tioa0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {$/;"	l
pinctrl_tcb0_tioa1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {$/;"	l
pinctrl_tcb0_tioa1	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {$/;"	l
pinctrl_tcb0_tioa1	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {$/;"	l
pinctrl_tcb0_tioa1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {$/;"	l
pinctrl_tcb0_tioa2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {$/;"	l
pinctrl_tcb0_tioa2	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {$/;"	l
pinctrl_tcb0_tioa2	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {$/;"	l
pinctrl_tcb0_tioa2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {$/;"	l
pinctrl_tcb0_tiob0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {$/;"	l
pinctrl_tcb0_tiob0	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {$/;"	l
pinctrl_tcb0_tiob0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {$/;"	l
pinctrl_tcb0_tiob0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {$/;"	l
pinctrl_tcb0_tiob1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {$/;"	l
pinctrl_tcb0_tiob1	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {$/;"	l
pinctrl_tcb0_tiob1	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {$/;"	l
pinctrl_tcb0_tiob1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {$/;"	l
pinctrl_tcb0_tiob2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {$/;"	l
pinctrl_tcb0_tiob2	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {$/;"	l
pinctrl_tcb0_tiob2	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {$/;"	l
pinctrl_tcb0_tiob2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {$/;"	l
pinctrl_tcb1_tclk0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {$/;"	l
pinctrl_tcb1_tclk0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {$/;"	l
pinctrl_tcb1_tclk1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {$/;"	l
pinctrl_tcb1_tclk1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {$/;"	l
pinctrl_tcb1_tclk2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {$/;"	l
pinctrl_tcb1_tclk2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {$/;"	l
pinctrl_tcb1_tioa0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {$/;"	l
pinctrl_tcb1_tioa0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {$/;"	l
pinctrl_tcb1_tioa1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {$/;"	l
pinctrl_tcb1_tioa1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {$/;"	l
pinctrl_tcb1_tioa2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {$/;"	l
pinctrl_tcb1_tioa2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {$/;"	l
pinctrl_tcb1_tiob0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {$/;"	l
pinctrl_tcb1_tiob0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {$/;"	l
pinctrl_tcb1_tiob1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {$/;"	l
pinctrl_tcb1_tiob1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {$/;"	l
pinctrl_tcb1_tiob2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {$/;"	l
pinctrl_tcb1_tiob2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {$/;"	l
pinctrl_uart0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_uart0: uart0-0 {$/;"	l
pinctrl_uart0	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_uart0: uart0_grp {$/;"	l
pinctrl_uart1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_uart1: uart1-0 {$/;"	l
pinctrl_uart1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_uart1: uart1grp {$/;"	l
pinctrl_uart1	arch/arm/dts/imx7-colibri.dts	/^	pinctrl_uart1: uart1-grp {$/;"	l
pinctrl_uart1	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_uart1: uart1_grp {$/;"	l
pinctrl_uart1_ctrl1	arch/arm/dts/imx7-colibri.dts	/^	pinctrl_uart1_ctrl1: uart1-ctrl1-grp {$/;"	l
pinctrl_uart1_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_uart1_default: uart1_default {$/;"	l	label:pioA
pinctrl_uart1_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_uart1_default: uart1-default {$/;"	l
pinctrl_uart1_default	arch/arm/dts/zynq-zc706.dts	/^	pinctrl_uart1_default: uart1-default {$/;"	l
pinctrl_uart2	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_uart2: uart2grp {$/;"	l
pinctrl_uart2	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_uart2: uart2_grp {$/;"	l
pinctrl_uart2dte	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_uart2dte: uart2dtegrp {$/;"	l
pinctrl_uart3	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_uart3: uart3_grp {$/;"	l
pinctrl_uart4	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_uart4: uart4grp {$/;"	l
pinctrl_usart0	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart0: usart0-0 {$/;"	l
pinctrl_usart0	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart0: usart0-0 {$/;"	l
pinctrl_usart0	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart0: usart0-0 {$/;"	l
pinctrl_usart0	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart0: usart0-0 {$/;"	l
pinctrl_usart0_cts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart0_cts: usart0_cts-0 {$/;"	l
pinctrl_usart0_cts	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart0_cts: usart0_cts-0 {$/;"	l
pinctrl_usart0_cts	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart0_cts: usart0_cts-0 {$/;"	l
pinctrl_usart0_cts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart0_cts: usart0_cts-0 {$/;"	l
pinctrl_usart0_dcd	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart0_dcd: usart0_dcd-0 {$/;"	l
pinctrl_usart0_dtr_dsr	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {$/;"	l
pinctrl_usart0_ri	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart0_ri: usart0_ri-0 {$/;"	l
pinctrl_usart0_rts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart0_rts: usart0_rts-0 {$/;"	l
pinctrl_usart0_rts	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart0_rts: usart0_rts-0 {$/;"	l
pinctrl_usart0_rts	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart0_rts: usart0_rts-0 {$/;"	l
pinctrl_usart0_rts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart0_rts: usart0_rts-0 {$/;"	l
pinctrl_usart1	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart1: usart1-0 {$/;"	l
pinctrl_usart1	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart1: usart1-0 {$/;"	l
pinctrl_usart1	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart1: usart1-0 {$/;"	l
pinctrl_usart1	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart1: usart1-0 {$/;"	l
pinctrl_usart1_cts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart1_cts: usart1_cts-0 {$/;"	l
pinctrl_usart1_cts	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart1_cts: usart1_cts-0 {$/;"	l
pinctrl_usart1_cts	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart1_cts: usart1_cts-0 {$/;"	l
pinctrl_usart1_cts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart1_cts: usart1_cts-0 {$/;"	l
pinctrl_usart1_rts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart1_rts: usart1_rts-0 {$/;"	l
pinctrl_usart1_rts	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart1_rts: usart1_rts-0 {$/;"	l
pinctrl_usart1_rts	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart1_rts: usart1_rts-0 {$/;"	l
pinctrl_usart1_rts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart1_rts: usart1_rts-0 {$/;"	l
pinctrl_usart2	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart2: usart2-0 {$/;"	l
pinctrl_usart2	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart2: usart2-0 {$/;"	l
pinctrl_usart2	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart2: usart2-0 {$/;"	l
pinctrl_usart2	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart2: usart2-0 {$/;"	l
pinctrl_usart2_cts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart2_cts: usart2_cts-0 {$/;"	l
pinctrl_usart2_cts	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart2_cts: usart2_cts-0 {$/;"	l
pinctrl_usart2_cts	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart2_cts: usart2_cts-0 {$/;"	l
pinctrl_usart2_cts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart2_cts: usart2_cts-0 {$/;"	l
pinctrl_usart2_rts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart2_rts: usart2_rts-0 {$/;"	l
pinctrl_usart2_rts	arch/arm/dts/at91sam9261.dtsi	/^					pinctrl_usart2_rts: usart2_rts-0 {$/;"	l
pinctrl_usart2_rts	arch/arm/dts/at91sam9263.dtsi	/^					pinctrl_usart2_rts: usart2_rts-0 {$/;"	l
pinctrl_usart2_rts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart2_rts: usart2_rts-0 {$/;"	l
pinctrl_usart3	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart3: usart3-0 {$/;"	l
pinctrl_usart3	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart3: usart3-0 {$/;"	l
pinctrl_usart3_cts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart3_cts: usart3_cts-0 {$/;"	l
pinctrl_usart3_cts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart3_cts: usart3_cts-0 {$/;"	l
pinctrl_usart3_rts	arch/arm/dts/at91sam9260.dtsi	/^					pinctrl_usart3_rts: usart3_rts-0 {$/;"	l
pinctrl_usart3_rts	arch/arm/dts/at91sam9g45.dtsi	/^					pinctrl_usart3_rts: usart3_rts-0 {$/;"	l
pinctrl_usb0	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_usb0: usb0_grp {$/;"	l
pinctrl_usb0_default	arch/arm/dts/zynq-zc702.dts	/^	pinctrl_usb0_default: usb0-default {$/;"	l
pinctrl_usb0_default	arch/arm/dts/zynq-zc706.dts	/^	pinctrl_usb0_default: usb0-default {$/;"	l
pinctrl_usb1	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_usb1: usb1_grp {$/;"	l
pinctrl_usb2	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_usb2: usb2_grp {$/;"	l
pinctrl_usb3	arch/arm/dts/uniphier-pinctrl.dtsi	/^	pinctrl_usb3: usb3_grp {$/;"	l
pinctrl_usb_default	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_usb_default: usb_default {$/;"	l	label:pioA
pinctrl_usba_vbus	arch/arm/dts/at91-sama5d2_xplained.dts	/^					pinctrl_usba_vbus: usba_vbus {$/;"	l	label:pioA
pinctrl_usdhc1	arch/arm/dts/imx6qdl-icore.dtsi	/^	pinctrl_usdhc1: usdhc1grp {$/;"	l
pinctrl_usdhc1	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_usdhc1: usdhc1grp {$/;"	l
pinctrl_usdhc2	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_usdhc2: usdhc2grp {$/;"	l
pinctrl_wdog	arch/arm/dts/imx6ull-14x14-evk.dts	/^		pinctrl_wdog: wdoggrp {$/;"	l
pinf	post/lib_powerpc/fpu/compare-fp-1.c	/^static float pinf;$/;"	v	typeref:typename:float	file:
ping	include/dm/test.h	/^	int (*ping)(struct udevice *dev, int pingval, int *pingret);$/;"	m	struct:test_ops	typeref:typename:int (*)(struct udevice * dev,int pingval,int * pingret)
ping	include/remoteproc.h	/^	int (*ping)(struct udevice *dev);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev)
ping	post/board/pdm360ng/coproc_com.c	/^char ping[] = "$PI;2C\\n";$/;"	v	typeref:typename:char[]
ping_add	include/dm/test.h	/^	int ping_add;$/;"	m	struct:dm_test_pdata	typeref:typename:int
ping_receive	net/ping.c	/^void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len)$/;"	f	typeref:typename:void
ping_send	net/ping.c	/^static int ping_send(void)$/;"	f	typeref:typename:int	file:
ping_seq_number	net/ping.c	/^static ushort ping_seq_number;$/;"	v	typeref:typename:ushort	file:
ping_start	net/ping.c	/^void ping_start(void)$/;"	f	typeref:typename:void
ping_timeout_handler	net/ping.c	/^static void ping_timeout_handler(void)$/;"	f	typeref:typename:void	file:
ping_total	include/dm/test.h	/^	int ping_total;$/;"	m	struct:dm_test_priv	typeref:typename:int
pingrp	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 pingrp:16;		\/* pin group PMUX_PINGRP_...        *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:16
pinmux	arch/arm/dts/tegra114.dtsi	/^	pinmux: pinmux@70000868 {$/;"	l
pinmux	arch/arm/dts/tegra124.dtsi	/^	pinmux: pinmux@70000868 {$/;"	l
pinmux	arch/arm/dts/tegra20.dtsi	/^	pinmux: pinmux@70000014 {$/;"	l
pinmux	arch/arm/dts/tegra210.dtsi	/^	pinmux: pinmux@700008d4 {$/;"	l
pinmux	arch/arm/dts/tegra30.dtsi	/^	pinmux: pinmux@70000868 {$/;"	l
pinmux	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pinmux[20];$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg[20]
pinmux	arch/arm/mach-davinci/include/mach/hardware.h	/^#define pinmux(/;"	d
pinmux	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	pinmux[5];	\/* 0x00 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int[5]
pinmux	arch/m68k/include/asm/fec.h	/^	u32 pinmux;$/;"	m	struct:fec_info_s	typeref:typename:u32
pinmux	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 pinmux;$/;"	m	struct:fec_info_dma	typeref:typename:u32
pinmux	board/davinci/da8xxevm/omapl138_lcdk.c	/^#define pinmux(/;"	d	file:
pinmux	drivers/gpio/da8xx_gpio.c	/^#define pinmux(/;"	d	file:
pinmux_cfg_reg	include/sh_pfc.h	/^struct pinmux_cfg_reg {$/;"	s
pinmux_clear_tristate_input_clamping	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_clear_tristate_input_clamping(void)$/;"	f	typeref:typename:void
pinmux_config	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^struct pinmux_config {$/;"	s
pinmux_config	drivers/i2c/tegra_i2c.c	/^	int			pinmux_config;$/;"	m	struct:i2c_bus	typeref:typename:int	file:
pinmux_config_drvgrp	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_config_drvgrp(const struct pmux_drvgrp_config *config)$/;"	f	typeref:typename:void	file:
pinmux_config_drvgrp_table	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,$/;"	f	typeref:typename:void
pinmux_config_gpio	drivers/gpio/sh_pfc.c	/^static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,$/;"	f	typeref:typename:int	file:
pinmux_config_mipipadctrlgrp	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_config_mipipadctrlgrp(const struct pmux_mipipadctrlgrp_config *config)$/;"	f	typeref:typename:void	file:
pinmux_config_mipipadctrlgrp_table	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_config_mipipadctrlgrp_table($/;"	f	typeref:typename:void
pinmux_config_pingrp	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_config_pingrp(const struct pmux_pingrp_config *config)$/;"	f	typeref:typename:void	file:
pinmux_config_pingrp_table	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,$/;"	f	typeref:typename:void
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7740.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7790.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7791.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7792.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7793.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7794.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-r8a7795.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_config_regs	arch/arm/mach-rmobile/pfc-sh73a0.c	/^static struct pinmux_cfg_reg pinmux_config_regs[] = {$/;"	v	typeref:struct:pinmux_cfg_reg[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7740.c	/^static unsigned short pinmux_data[] = {$/;"	v	typeref:typename:unsigned short[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7790.c	/^static pinmux_enum_t pinmux_data[] = {$/;"	v	typeref:typename:pinmux_enum_t[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7791.c	/^static pinmux_enum_t pinmux_data[] = {$/;"	v	typeref:typename:pinmux_enum_t[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7792.c	/^static pinmux_enum_t pinmux_data[] = {$/;"	v	typeref:typename:pinmux_enum_t[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7793.c	/^static pinmux_enum_t pinmux_data[] = {$/;"	v	typeref:typename:pinmux_enum_t[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7794.c	/^static pinmux_enum_t pinmux_data[] = {$/;"	v	typeref:typename:pinmux_enum_t[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-r8a7795.c	/^static pinmux_enum_t pinmux_data[] = {$/;"	v	typeref:typename:pinmux_enum_t[]	file:
pinmux_data	arch/arm/mach-rmobile/pfc-sh73a0.c	/^static unsigned short pinmux_data[] = {$/;"	v	typeref:typename:unsigned short[]	file:
pinmux_data_reg	include/sh_pfc.h	/^struct pinmux_data_reg {$/;"	s
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7740.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7790.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7791.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7792.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7793.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7794.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-r8a7795.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_data_regs	arch/arm/mach-rmobile/pfc-sh73a0.c	/^static struct pinmux_data_reg pinmux_data_regs[] = {$/;"	v	typeref:struct:pinmux_data_reg[]	file:
pinmux_decode_periph_id	arch/arm/mach-exynos/pinmux.c	/^int pinmux_decode_periph_id(const void *blob, int node)$/;"	f	typeref:typename:int
pinmux_default	arch/arm/dts/tegra124-nyan-big.dts	/^		pinmux_default: common {$/;"	l
pinmux_direction	drivers/gpio/sh_pfc.c	/^static int pinmux_direction(struct pinmux_info *gpioc,$/;"	f	typeref:typename:int	file:
pinmux_enable_setting	drivers/pinctrl/pinctrl-generic.c	/^static int pinmux_enable_setting(struct udevice *dev, bool is_group,$/;"	f	typeref:typename:int	file:
pinmux_enum_t	include/sh_pfc.h	/^typedef unsigned short pinmux_enum_t;$/;"	t	typeref:typename:unsigned short
pinmux_flag_t	include/sh_pfc.h	/^typedef unsigned short pinmux_flag_t;$/;"	t	typeref:typename:unsigned short
pinmux_func_name_to_selector	drivers/pinctrl/pinctrl-generic.c	/^static int pinmux_func_name_to_selector(struct udevice *dev,$/;"	f	typeref:typename:int	file:
pinmux_gpio	include/sh_pfc.h	/^struct pinmux_gpio {$/;"	s
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7740.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7790.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7791.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7792.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7793.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7794.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-r8a7795.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_gpios	arch/arm/mach-rmobile/pfc-sh73a0.c	/^static struct pinmux_gpio pinmux_gpios[] = {$/;"	v	typeref:struct:pinmux_gpio[]	file:
pinmux_group_set	include/dm/pinctrl.h	/^	int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector,$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,unsigned group_selector,unsigned func_selector)
pinmux_info	include/sh_pfc.h	/^struct pinmux_info {$/;"	s
pinmux_init	arch/arm/mach-tegra/board2.c	/^__weak void pinmux_init(void) {}$/;"	f	typeref:typename:__weak void
pinmux_init	board/avionic-design/common/tamonten-ng.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/cei/cei-tk1-som/cei-tk1-som.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/cardhu/cardhu.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/dalmore/dalmore.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/e2220-1170/e2220-1170.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/jetson-tk1/jetson-tk1.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/nyan-big/nyan-big.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/p2371-0000/p2371-0000.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/p2371-2180/p2371-2180.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/p2571/p2571.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/nvidia/venice2/venice2.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/toradex/apalis_t30/apalis_t30.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_init	board/toradex/colibri_t30/colibri_t30.c	/^void pinmux_init(void)$/;"	f	typeref:typename:void
pinmux_irq	include/sh_pfc.h	/^struct pinmux_irq {$/;"	s
pinmux_irqs	arch/arm/mach-rmobile/pfc-r8a7740.c	/^static struct pinmux_irq pinmux_irqs[] = {$/;"	v	typeref:struct:pinmux_irq[]	file:
pinmux_irqs	arch/arm/mach-rmobile/pfc-sh73a0.c	/^static struct pinmux_irq pinmux_irqs[] = {$/;"	v	typeref:struct:pinmux_irq[]	file:
pinmux_mipipadctrl_set_func	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_mipipadctrl_set_func(enum pmux_mipipadctrlgrp grp,$/;"	f	typeref:typename:void	file:
pinmux_range	include/sh_pfc.h	/^struct pinmux_range {$/;"	s
pinmux_resource	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^struct pinmux_resource {$/;"	s
pinmux_set	include/dm/pinctrl.h	/^	int (*pinmux_set)(struct udevice *dev, unsigned pin_selector,$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,unsigned pin_selector,unsigned func_selector)
pinmux_set_drvdn	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_drvdn(enum pmux_drvgrp grp, int drvdn)$/;"	f	typeref:typename:void	file:
pinmux_set_drvdn_slwr	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_drvdn_slwr(enum pmux_drvgrp grp, int slwr)$/;"	f	typeref:typename:void	file:
pinmux_set_drvup	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_drvup(enum pmux_drvgrp grp, int drvup)$/;"	f	typeref:typename:void	file:
pinmux_set_drvup_slwf	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_drvup_slwf(enum pmux_drvgrp grp, int slwf)$/;"	f	typeref:typename:void	file:
pinmux_set_e_io_hv	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_e_io_hv(enum pmux_pingrp pin,$/;"	f	typeref:typename:void	file:
pinmux_set_func	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func)$/;"	f	typeref:typename:void
pinmux_set_hsm	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_hsm(enum pmux_drvgrp grp, enum pmux_hsm hsm)$/;"	f	typeref:typename:void	file:
pinmux_set_hsm	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_hsm(enum pmux_pingrp pin, enum pmux_hsm hsm)$/;"	f	typeref:typename:void	file:
pinmux_set_io	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io)$/;"	f	typeref:typename:void
pinmux_set_ioreset	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_ioreset(enum pmux_pingrp pin,$/;"	f	typeref:typename:void	file:
pinmux_set_lock	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_lock(enum pmux_pingrp pin, enum pmux_pin_lock lock)$/;"	f	typeref:typename:void	file:
pinmux_set_lpmd	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_lpmd(enum pmux_drvgrp grp, enum pmux_lpmd lpmd)$/;"	f	typeref:typename:void	file:
pinmux_set_od	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_od(enum pmux_pingrp pin, enum pmux_pin_od od)$/;"	f	typeref:typename:void	file:
pinmux_set_pullupdown	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_set_pullupdown(enum pmux_pingrp pin, enum pmux_pull pupd)$/;"	f	typeref:typename:void
pinmux_set_rcv_sel	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_rcv_sel(enum pmux_pingrp pin,$/;"	f	typeref:typename:void	file:
pinmux_set_schmt	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_schmt(enum pmux_drvgrp grp, enum pmux_schmt schmt)$/;"	f	typeref:typename:void	file:
pinmux_set_schmt	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_schmt(enum pmux_pingrp pin, enum pmux_schmt schmt)$/;"	f	typeref:typename:void	file:
pinmux_set_tristate	arch/arm/mach-tegra/pinmux-common.c	/^static void pinmux_set_tristate(enum pmux_pingrp pin, int tri)$/;"	f	typeref:typename:void	file:
pinmux_set_tristate_input_clamping	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_set_tristate_input_clamping(void)$/;"	f	typeref:typename:void
pinmux_tristate_disable	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_tristate_disable(enum pmux_pingrp pin)$/;"	f	typeref:typename:void
pinmux_tristate_enable	arch/arm/mach-tegra/pinmux-common.c	/^void pinmux_tristate_enable(enum pmux_pingrp pin)$/;"	f	typeref:typename:void
pinmuxes	board/Barix/ipam390/ipam390.c	/^const struct pinmux_resource pinmuxes[] = {$/;"	v	typeref:typename:const struct pinmux_resource[]
pinmuxes	board/davinci/da8xxevm/da850evm.c	/^const struct pinmux_resource pinmuxes[] = {$/;"	v	typeref:typename:const struct pinmux_resource[]
pinmuxes	board/davinci/da8xxevm/omapl138_lcdk.c	/^const struct pinmux_resource pinmuxes[] = {$/;"	v	typeref:typename:const struct pinmux_resource[]
pinmuxes	board/davinci/ea20/ea20.c	/^static const struct pinmux_resource pinmuxes[] = {$/;"	v	typeref:typename:const struct pinmux_resource[]	file:
pinmuxes	board/lego/ev3/legoev3.c	/^const struct pinmux_resource pinmuxes[] = {$/;"	v	typeref:typename:const struct pinmux_resource[]
pinmuxes	board/omicron/calimain/calimain.c	/^const struct pinmux_resource pinmuxes[] = {$/;"	v	typeref:typename:const struct pinmux_resource[]
pinmuxes_size	board/Barix/ipam390/ipam390.c	/^const int pinmuxes_size = ARRAY_SIZE(pinmuxes);$/;"	v	typeref:typename:const int
pinmuxes_size	board/davinci/da8xxevm/da850evm.c	/^const int pinmuxes_size = ARRAY_SIZE(pinmuxes);$/;"	v	typeref:typename:const int
pinmuxes_size	board/davinci/da8xxevm/omapl138_lcdk.c	/^const int pinmuxes_size = ARRAY_SIZE(pinmuxes);$/;"	v	typeref:typename:const int
pinmuxes_size	board/lego/ev3/legoev3.c	/^const int pinmuxes_size = ARRAY_SIZE(pinmuxes);$/;"	v	typeref:typename:const int
pinmuxes_size	board/omicron/calimain/calimain.c	/^const int pinmuxes_size = ARRAY_SIZE(pinmuxes);$/;"	v	typeref:typename:const int
pino	fs/jffs2/jffs2_nand_private.h	/^	u32 pino;$/;"	m	struct:b_dirent	typeref:typename:u32
pino	fs/jffs2/summary.h	/^	__u32 pino;		\/* parent inode *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:__u32
pino	fs/jffs2/summary.h	/^	__u32 pino;		\/* parent inode *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:__u32
pino	include/jffs2/jffs2.h	/^	__u32 pino;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
pins	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^	const struct pinmux_config	*pins;$/;"	m	struct:pinmux_resource	typeref:typename:const struct pinmux_config *
pins	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const char *pins[MAX_PINS];$/;"	m	struct:tegra_xusb_padctl_group	typeref:typename:const char * []
pins	board/nokia/rx51/tag_omap.h	/^	u8		pins[3];$/;"	m	struct:omap_usb_config	typeref:typename:u8[3]
pins	drivers/gpio/dwapb_gpio.c	/^	int		pins;$/;"	m	struct:gpio_dwapb_platdata	typeref:typename:int	file:
pins	drivers/pinctrl/meson/pinctrl-meson.h	/^	const unsigned int *pins;$/;"	m	struct:meson_pmx_group	typeref:typename:const unsigned int *
pins	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	const struct uniphier_pinctrl_pin *pins;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:const struct uniphier_pinctrl_pin *
pins	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	const unsigned *pins;$/;"	m	struct:uniphier_pinctrl_group	typeref:typename:const unsigned *
pins	drivers/spi/bfin_spi.c	/^static unsigned short pins[][5] = {$/;"	v	typeref:typename:unsigned short[][5]	file:
pins	drivers/spi/bfin_spi6xx.c	/^static unsigned short pins[][5] = {$/;"	v	typeref:typename:unsigned short[][5]	file:
pins_count	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	int pins_count;$/;"	m	struct:uniphier_pinctrl_socdata	typeref:typename:int
pio	arch/arm/dts/sun4i-a10.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun50i-a64.dtsi	/^		pio: pinctrl@1c20800 {$/;"	l
pio	arch/arm/dts/sun5i.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun6i-a31.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun7i-a20.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun8i-a23-a33.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun8i-a83t.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun8i-h3.dtsi	/^		pio: pinctrl@01c20800 {$/;"	l
pio	arch/arm/dts/sun9i-a80.dtsi	/^		pio: pinctrl@06000800 {$/;"	l
pio	drivers/block/fsl_sata.h	/^	u16		pio;$/;"	m	struct:fsl_sata	typeref:typename:u16
pio	drivers/block/sata_mv.c	/^	u16 pio;$/;"	m	struct:mv_priv	typeref:typename:u16	file:
pio	drivers/block/sata_sil.h	/^	u16		pio;$/;"	m	struct:sil_sata	typeref:typename:u16
pio	drivers/video/bus_vcxk.c	/^at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;$/;"	v	typeref:typename:at91_pio_t *
pioA	arch/arm/dts/at91-sama5d2_xplained.dts	/^			pioA: gpio@fc038000 {$/;"	l
pioA	arch/arm/dts/at91sam9260.dtsi	/^				pioA: gpio@fffff400 {$/;"	l
pioA	arch/arm/dts/at91sam9261.dtsi	/^				pioA: gpio@fffff400 {$/;"	l
pioA	arch/arm/dts/at91sam9263.dtsi	/^				pioA: gpio@fffff200 {$/;"	l
pioA	arch/arm/dts/at91sam9g45.dtsi	/^				pioA: gpio@fffff200 {$/;"	l
pioA	arch/arm/dts/sama5d2.dtsi	/^			pioA: gpio@fc038000 {$/;"	l
pioA_clk	arch/arm/dts/at91sam9260.dtsi	/^					pioA_clk: pioA_clk {$/;"	l
pioA_clk	arch/arm/dts/at91sam9261.dtsi	/^					pioA_clk: pioA_clk {$/;"	l
pioA_clk	arch/arm/dts/at91sam9263.dtsi	/^					pioA_clk: pioA_clk {$/;"	l
pioA_clk	arch/arm/dts/at91sam9g45.dtsi	/^					pioA_clk: pioA_clk {$/;"	l
pioA_clk	arch/arm/dts/sama5d2.dtsi	/^					pioA_clk: pioA_clk@18 {$/;"	l
pioB	arch/arm/dts/at91sam9260.dtsi	/^				pioB: gpio@fffff600 {$/;"	l
pioB	arch/arm/dts/at91sam9261.dtsi	/^				pioB: gpio@fffff600 {$/;"	l
pioB	arch/arm/dts/at91sam9263.dtsi	/^				pioB: gpio@fffff400 {$/;"	l
pioB	arch/arm/dts/at91sam9g45.dtsi	/^				pioB: gpio@fffff400 {$/;"	l
pioB_clk	arch/arm/dts/at91sam9260.dtsi	/^					pioB_clk: pioB_clk {$/;"	l
pioB_clk	arch/arm/dts/at91sam9261.dtsi	/^					pioB_clk: pioB_clk {$/;"	l
pioB_clk	arch/arm/dts/at91sam9263.dtsi	/^					pioB_clk: pioB_clk {$/;"	l
pioB_clk	arch/arm/dts/at91sam9g45.dtsi	/^					pioB_clk: pioB_clk {$/;"	l
pioC	arch/arm/dts/at91sam9260.dtsi	/^				pioC: gpio@fffff800 {$/;"	l
pioC	arch/arm/dts/at91sam9261.dtsi	/^				pioC: gpio@fffff800 {$/;"	l
pioC	arch/arm/dts/at91sam9263.dtsi	/^				pioC: gpio@fffff600 {$/;"	l
pioC	arch/arm/dts/at91sam9g45.dtsi	/^				pioC: gpio@fffff600 {$/;"	l
pioCDE_clk	arch/arm/dts/at91sam9263.dtsi	/^					pioCDE_clk: pioCDE_clk {$/;"	l
pioC_clk	arch/arm/dts/at91sam9260.dtsi	/^					pioC_clk: pioC_clk {$/;"	l
pioC_clk	arch/arm/dts/at91sam9261.dtsi	/^					pioC_clk: pioC_clk {$/;"	l
pioC_clk	arch/arm/dts/at91sam9g45.dtsi	/^					pioC_clk: pioC_clk {$/;"	l
pioD	arch/arm/dts/at91sam9263.dtsi	/^				pioD: gpio@fffff800 {$/;"	l
pioD	arch/arm/dts/at91sam9g45.dtsi	/^				pioD: gpio@fffff800 {$/;"	l
pioDE_clk	arch/arm/dts/at91sam9g45.dtsi	/^					pioDE_clk: pioDE_clk {$/;"	l
pioE	arch/arm/dts/at91sam9263.dtsi	/^				pioE: gpio@fffffa00 {$/;"	l
pioE	arch/arm/dts/at91sam9g45.dtsi	/^				pioE: gpio@fffffa00 {$/;"	l
pio_config_clk	arch/powerpc/lib/ide.c	/^static pio_config_t pio_config_clk[IDE_MAX_PIO_MODE+1];$/;"	v	typeref:typename:pio_config_t[]	file:
pio_config_ns	arch/powerpc/lib/ide.c	/^static const pio_config_t pio_config_ns[IDE_MAX_PIO_MODE+1] = {$/;"	v	typeref:typename:const pio_config_t[]	file:
pio_config_t	include/ata.h	/^pio_config_t;$/;"	t	typeref:struct:__anona4e76fa40108
pio_fsclk	drivers/block/pata_bfin.c	/^static const u32 pio_fsclk[] =$/;"	v	typeref:typename:const u32[]	file:
pio_get_input_value	arch/avr32/cpu/portmux-pio.c	/^int pio_get_input_value(unsigned int pin)$/;"	f	typeref:typename:int
pio_irq_disable	drivers/usb/gadget/pxa25x_udc.c	/^static void pio_irq_disable(int bEndpointAddress)$/;"	f	typeref:typename:void	file:
pio_irq_enable	drivers/usb/gadget/pxa25x_udc.c	/^static void pio_irq_enable(int bEndpointAddress)$/;"	f	typeref:typename:void	file:
pio_irq_enable	drivers/usb/gadget/pxa27x_udc.c	/^static void pio_irq_enable(int ep_num)$/;"	f	typeref:typename:void	file:
pio_irqs	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	unsigned long pio_irqs;$/;"	m	struct:dwc2_ep	typeref:typename:unsigned long
pio_irqs	drivers/usb/gadget/pxa25x_udc.h	/^	unsigned long				pio_irqs;$/;"	m	struct:pxa25x_ep	typeref:typename:unsigned long
pio_mask	drivers/block/sata_dwc.h	/^	unsigned int		pio_mask;$/;"	m	struct:ata_port	typeref:typename:unsigned int
pio_mask	drivers/block/sata_dwc.h	/^	unsigned long			pio_mask;$/;"	m	struct:ata_port_info	typeref:typename:unsigned long
pio_mask	drivers/block/sata_dwc.h	/^	unsigned long		pio_mask;$/;"	m	struct:ata_device	typeref:typename:unsigned long
pio_mask	include/ahci.h	/^	u32     pio_mask;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
pio_mode	arch/powerpc/lib/ide.c	/^static int pio_mode = CONFIG_SYS_PIO_MODE;$/;"	v	typeref:typename:int	file:
pio_mode	drivers/block/sata_dwc.h	/^	u8			pio_mode;$/;"	m	struct:ata_device	typeref:typename:u8
pio_pin_to_port	arch/avr32/include/asm/arch-at32ap700x/gpio.h	/^static inline void *pio_pin_to_port(unsigned int pin)$/;"	f	typeref:typename:void *
pio_readl	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define pio_readl(/;"	d
pio_set_output_value	arch/avr32/cpu/portmux-pio.c	/^void pio_set_output_value(unsigned int pin, int value)$/;"	f	typeref:typename:void
pio_t0min	drivers/block/pata_bfin.c	/^static const u32 pio_t0min[]   = { 600, 383, 240, 180, 120 };$/;"	v	typeref:typename:const u32[]	file:
pio_t1	drivers/block/mxc_ata.c	/^static uint16_t pio_t1[NR_PIO_SPECS]	= { 70,  50,  30,  30,  25 };$/;"	v	typeref:typename:uint16_t[]	file:
pio_t1min	drivers/block/pata_bfin.c	/^static const u32 pio_t1min[]   = { 70,  50,  30,  30,  25  };$/;"	v	typeref:typename:const u32[]	file:
pio_t2_8	drivers/block/mxc_ata.c	/^static uint16_t pio_t2_8[NR_PIO_SPECS]	= { 290, 290, 290, 80,  70 };$/;"	v	typeref:typename:uint16_t[]	file:
pio_t2min	drivers/block/pata_bfin.c	/^static const u32 pio_t2min[]   = { 165, 125, 100, 80,  70  };$/;"	v	typeref:typename:const u32[]	file:
pio_t4	drivers/block/mxc_ata.c	/^static uint16_t pio_t4[NR_PIO_SPECS]	= { 30,  20,  15,  10,  10 };$/;"	v	typeref:typename:uint16_t[]	file:
pio_t4min	drivers/block/pata_bfin.c	/^static const u32 pio_t4min[]   = { 30,  20,  15,  10,  10  };$/;"	v	typeref:typename:const u32[]	file:
pio_t9	drivers/block/mxc_ata.c	/^static uint16_t pio_t9[NR_PIO_SPECS]	= { 20,  15,  10,  10,  10 };$/;"	v	typeref:typename:uint16_t[]	file:
pio_tA	drivers/block/mxc_ata.c	/^static uint16_t pio_tA[NR_PIO_SPECS]	= { 50,  50,  50,  50,  50 };$/;"	v	typeref:typename:uint16_t[]	file:
pio_teocmin	drivers/block/pata_bfin.c	/^static const u32 pio_teocmin[] = { 165, 125, 100, 70,  25  };$/;"	v	typeref:typename:const u32[]	file:
pio_words	arch/arm/include/asm/imx-common/dma.h	/^	unsigned long		pio_words[DMA_PIO_WORDS];$/;"	m	struct:mxs_dma_cmd	typeref:typename:unsigned long[]
pio_writel	arch/avr32/include/asm/arch-common/portmux-pio.h	/^#define pio_writel(/;"	d
pioa	arch/arm/mach-at91/include/mach/at91_pio.h	/^		at91_port_t	pioa;$/;"	m	struct:at91_pio::__anon3156d3cc0108	typeref:typename:at91_port_t
piob	arch/arm/mach-at91/include/mach/at91_pio.h	/^		at91_port_t	piob;$/;"	m	struct:at91_pio::__anon3156d3cc0108	typeref:typename:at91_port_t
pioc	arch/arm/mach-at91/include/mach/at91_pio.h	/^		at91_port_t	pioc;$/;"	m	struct:at91_pio::__anon3156d3cc0108	typeref:typename:at91_port_t
piod	arch/arm/mach-at91/include/mach/at91_pio.h	/^		at91_port_t	piod;	\/* not present in all hardware *\/$/;"	m	struct:at91_pio::__anon3156d3cc0108	typeref:typename:at91_port_t
pioe	arch/arm/mach-at91/include/mach/at91_pio.h	/^		at91_port_t	pioe;\/* not present in all hardware *\/$/;"	m	struct:at91_pio::__anon3156d3cc0108	typeref:typename:at91_port_t
pipc	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG pipc;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
pipe	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	unsigned long pipe;$/;"	m	struct:__anon08a6674e0108	typeref:typename:unsigned long
pipe	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	unsigned long pipe;$/;"	m	struct:__anonb10e26e60108	typeref:typename:unsigned long
pipe	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	unsigned long pipe;$/;"	m	struct:__anond5d032300108	typeref:typename:unsigned long
pipe	common/cli_hush.c	/^	struct pipe *pipe;$/;"	m	struct:p_context	typeref:struct:pipe *	file:
pipe	common/cli_hush.c	/^struct pipe {$/;"	s	file:
pipe	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 pipe;$/;"	m	struct:dfx_access	typeref:typename:u8
pipe	drivers/usb/host/ehci-hcd.c	/^	unsigned long pipe;$/;"	m	struct:int_queue	typeref:typename:unsigned long	file:
pipe	drivers/usb/host/isp116x.h	/^	unsigned long pipe;	\/* (in) pipe information *\/$/;"	m	struct:__anon2695f18b0108	typeref:typename:unsigned long
pipe	drivers/usb/host/ohci-s3c24xx.h	/^	unsigned long pipe;$/;"	m	struct:urb_priv	typeref:typename:unsigned long
pipe	drivers/usb/host/ohci.h	/^	unsigned long pipe;$/;"	m	struct:__anone9fd91320108	typeref:typename:unsigned long
pipe	drivers/usb/musb-new/usb-compat.h	/^	unsigned int pipe;		\/* (in) pipe information *\/$/;"	m	struct:urb	typeref:typename:unsigned int
pipe3_dpll_map	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^struct pipe3_dpll_map {$/;"	s
pipe3_dpll_params	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^struct pipe3_dpll_params {$/;"	s
pipe_buffer_setting	drivers/usb/host/r8a66597-hcd.c	/^static void pipe_buffer_setting(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:void	file:
pipe_config	drivers/usb/host/r8a66597.h	/^	unsigned short pipe_config;	\/* bit field *\/$/;"	m	struct:r8a66597	typeref:typename:unsigned short
pipe_multicast_mask	drivers/ddr/marvell/a38x/ddr3_a38x.c	/^u32 pipe_multicast_mask;$/;"	v	typeref:typename:u32
pipe_style	common/cli_hush.c	/^} pipe_style;$/;"	t	typeref:enum:__anon62a9299d0303	file:
pipsw	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG pipsw;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
piptr	examples/standalone/mem_to_mem_idma2intr.c	/^volatile pram_idma_t *piptr;$/;"	v	typeref:typename:volatile pram_idma_t *
pir	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 pir;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
pir	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 pir;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pir;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pir;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pir;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pir;		\/* 0x00 PHY initialization register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 pir;		\/* 0x04 PHY initialisation register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 pir;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pir;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pir;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pir;		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pir;		\/* 0x00 PHY initialization register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pir	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 pir;		\/* 0x04 PHY initialisation register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pir	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pir;		\/* Processor Initialization *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
pir	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pir;		\/* 0x41090 - Processor Initialization Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pir_v1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int pir_v1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
pir_v2	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int pir_v2;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
pirclr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 pirclr;			\/* 0x084 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
pirq	arch/x86/include/asm/irq.h	/^	int pirq;$/;"	m	struct:pirq_routing	typeref:typename:int
pirq_apic_route	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool pirq_apic_route;$/;"	m	struct:pin_info	typeref:typename:bool	file:
pirq_assign_irq	arch/x86/cpu/irq.c	/^void pirq_assign_irq(struct udevice *dev, int link, u8 irq)$/;"	f	typeref:typename:void
pirq_check_irq_routed	arch/x86/cpu/irq.c	/^bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)$/;"	f	typeref:typename:bool
pirq_config	arch/x86/include/asm/irq.h	/^enum pirq_config {$/;"	g
pirq_get_next_free_irq	arch/x86/lib/pirq_routing.c	/^static u8 pirq_get_next_free_irq(struct udevice *dev, u8 *pirq, u16 bitmap)$/;"	f	typeref:typename:u8	file:
pirq_route_irqs	arch/x86/lib/pirq_routing.c	/^void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num)$/;"	f	typeref:typename:void
pirq_routing	arch/x86/include/asm/irq.h	/^struct pirq_routing {$/;"	s
pirq_routing_table	arch/x86/cpu/irq.c	/^static struct irq_routing_table *pirq_routing_table;$/;"	v	typeref:struct:irq_routing_table *	file:
pirq_to_ioxapic	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u16 pirq_to_ioxapic;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u16
pirq_translate_link	arch/x86/cpu/irq.c	/^int pirq_translate_link(struct udevice *dev, int link)$/;"	f	typeref:typename:int
pirset	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 pirset;			\/* 0x080 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
pit	arch/arm/dts/at91sam9260.dtsi	/^			pit: timer@fffffd30 {$/;"	l
pit	arch/arm/dts/at91sam9261.dtsi	/^			pit: timer@fffffd30 {$/;"	l
pit	arch/arm/dts/at91sam9263.dtsi	/^			pit: timer@fffffd30 {$/;"	l
pit	arch/arm/dts/at91sam9g45.dtsi	/^			pit: timer@fffffd30 {$/;"	l
pit	arch/powerpc/include/asm/fsl_pci.h	/^	pit_t	pit[4];		\/* 0xd80 - 0xdff Inbound ATMU's 3, 2, 1 and 0 *\/$/;"	m	struct:ccsr_pci	typeref:typename:pit_t[4]
pit	arch/powerpc/include/asm/immap_83xx.h	/^	rtclk83xx_t		pit;		\/* Periodic Interval Timer *\/$/;"	m	struct:immap	typeref:typename:rtclk83xx_t
pit_ctrl	arch/m68k/include/asm/timer.h	/^typedef struct pit_ctrl {$/;"	s
pit_expect_msb	drivers/timer/tsc_timer.c	/^static inline int pit_expect_msb(unsigned char val, u64 *tscp,$/;"	f	typeref:typename:int	file:
pit_reg	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^struct pit_reg {$/;"	s
pit_reg	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct pit_reg {$/;"	s
pit_t	arch/m68k/include/asm/timer.h	/^} pit_t;$/;"	t	typeref:struct:pit_ctrl
pit_t	arch/powerpc/include/asm/fsl_pci.h	/^} pit_t;$/;"	t	typeref:struct:pci_inbound_window
pit_verify_msb	drivers/timer/tsc_timer.c	/^static inline int pit_verify_msb(unsigned char val)$/;"	f	typeref:typename:int	file:
pitar	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pitar;		\/* 0x00 - Address *\/$/;"	m	struct:pci_inbound_window	typeref:typename:u32
pitar0	arch/powerpc/include/asm/immap_512x.h	/^	u32 pitar0;$/;"	m	struct:pcictrl512x	typeref:typename:u32
pitar0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pitar0;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
pitar1	arch/powerpc/include/asm/immap_512x.h	/^	u32 pitar1;$/;"	m	struct:pcictrl512x	typeref:typename:u32
pitar1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pitar1;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
pitar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pitar1;		\/* PCIX Inbound Translation Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pitar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pitar1;	        \/* 0x8de0 - PEX Inbound Translation Address Register 1  *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pitar2	arch/powerpc/include/asm/immap_512x.h	/^	u32 pitar2;$/;"	m	struct:pcictrl512x	typeref:typename:u32
pitar2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pitar2;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
pitar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pitar2;		\/* PCIX Inbound Translation Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pitar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pitar2;	        \/* 0x8dc0 - PEX Inbound Translation Address Register 2  *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pitar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pitar3;		\/* PCIX Inbound Translation Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pitar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pitar3;	        \/* 0x8da0 - PEX Inbound Translation Address Register 3  *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pitch	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 pitch;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
pitch	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 pitch[3];$/;"	m	struct:de_vi::__anon5efd7b530208	typeref:typename:u32[3]
pitch	arch/arm/include/asm/arch/display2.h	/^		u32 pitch;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
pitch	arch/arm/include/asm/arch/display2.h	/^		u32 pitch[3];$/;"	m	struct:de_vi::__anon279c75ef0208	typeref:typename:u32[3]
pitch	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 pitch;$/;"	m	struct:bcm2835_mbox_tag_pitch::__anon775fc5442c0a::__anon775fc5442e08	typeref:typename:u32
pitch	arch/sandbox/cpu/sdl.c	/^	int pitch;$/;"	m	struct:sdl_info	typeref:typename:int	file:
pitch	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_pitch pitch;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_pitch	file:
pitear1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pitear1;	\/* PCIX Inbound Translation Extended Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pitear2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pitear2;	\/* PCIX Inbound Translation Extended Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pitear3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pitear3;	\/* PCIX Inbound Translation Extended Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
pitmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pitmg[2];		\/* 0x80 PHY interface timing registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
pitmg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pitmg[2];		\/* 0x80 PHY interface timing registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
pitmg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pitmg0;		\/* 0x190 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pitmg0;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pitmg0;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pitmg0;		\/* 0x190 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pitmg0;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pitmg0;		\/* 0x80 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pitmg1;		\/* 0x194 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pitmg1;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pitmg1;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pitmg1;		\/* 0x194 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pitmg1;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitmg1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pitmg1;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pitr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pitr  = $mbar - 1 + 0x034$/;"	t
pivr	arch/arm/mach-at91/include/mach/at91_pit.h	/^	u32	pivr;	\/* 0x08 Periodic Interval Value Register *\/$/;"	m	struct:at91_pit	typeref:typename:u32
pivr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pivr  = $mbar - 1 + 0x03f$/;"	t
piwar	arch/powerpc/include/asm/fsl_pci.h	/^	u32	piwar;		\/* 0x10 - Window Attributes *\/$/;"	m	struct:pci_inbound_window	typeref:typename:u32
piwar0	arch/powerpc/include/asm/immap_512x.h	/^	u32 piwar0;$/;"	m	struct:pcictrl512x	typeref:typename:u32
piwar0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 piwar0;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
piwar1	arch/powerpc/include/asm/immap_512x.h	/^	u32 piwar1;$/;"	m	struct:pcictrl512x	typeref:typename:u32
piwar1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 piwar1;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
piwar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwar1;		\/* PCIX Inbound Window Attrs 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwar1;	        \/* 0x8df0 - PEX Inbound Window Attributes Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwar2	arch/powerpc/include/asm/immap_512x.h	/^	u32 piwar2;$/;"	m	struct:pcictrl512x	typeref:typename:u32
piwar2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 piwar2;$/;"	m	struct:pcictrl83xx	typeref:typename:u32
piwar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwar2;		\/* PCIX Inbound Window Attrs 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwar2;	        \/* 0x8dd0 - PEX Inbound Window Attributes Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwar3;		\/* PCIX Inbound Window Attrs 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwar3;	        \/* 0x8db0 - PEX Inbound Window Attributes Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwbar	arch/powerpc/include/asm/fsl_pci.h	/^	u32	piwbar;		\/* 0x08 - Window Base Address *\/$/;"	m	struct:pci_inbound_window	typeref:typename:u32
piwbar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwbar1;	\/* PCIX Inbound Window Base Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwbar1;	\/* 0x8de8 - PEX Inbound Window Base Address Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwbar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwbar2;	\/* PCIX Inbound Window Base Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwbar2;	\/* 0x8dc8 - PEX Inbound Window Base Address Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwbar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwbar3;	\/* PCIX Inbound Window Base Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwbar3;	\/* 0x8da8 - PEX Inbound Window Base Address Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwbear	arch/powerpc/include/asm/fsl_pci.h	/^	u32	piwbear;	\/* 0x0c - Window Base Address Extended *\/$/;"	m	struct:pci_inbound_window	typeref:typename:u32
piwbear1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwbear1;$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwbear2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwbear2;	\/* PCIX Inbound Window Base Extended Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwbear2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwbear2;	\/* 0x8dcc - PEX Inbound Window Base Extended Address Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwbear3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	piwbear3;	\/* PCIX Inbound Window Base Extended Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
piwbear3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	piwbear3;	\/* 0x8dac - PEX Inbound Window Base Extended Address Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
piwr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $piwr  = $mbar - 1 + 0x038$/;"	t
pix_fmt	drivers/video/fsl_diu_fb.c	/^	__le32 pix_fmt; \/* hard coding pixel format *\/$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
pixcir_ts_pins	arch/arm/dts/am437x-gp-evm.dts	/^	pixcir_ts_pins: pixcir_ts_pins {$/;"	l
pixcir_ts_pins	arch/arm/dts/am43x-epos-evm.dts	/^		pixcir_ts_pins: pixcir_ts_pins {$/;"	l
pixclkcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pixclkcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pixclkcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 pixclkcr;	\/* 0x028 Pixel Clock Control register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pixclock	drivers/video/videomodes.h	/^	int pixclock;		\/* pixel clock in ps (pico seconds) *\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
pixclock	include/linux/fb.h	/^	__u32 pixclock;			\/* pixel clock in ps (pico seconds) *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
pixclock	include/linux/fb.h	/^	u32 pixclock;$/;"	m	struct:fb_videomode	typeref:typename:u32
pixclock_khz	drivers/video/videomodes.h	/^	int pixclock_khz;	\/* pixel clock in kHz           *\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
pixel_bitmask	include/efi_api.h	/^	u32 pixel_bitmask[4];$/;"	m	struct:efi_gop_mode_info	typeref:typename:u32[4]
pixel_clk	drivers/video/ipu_common.c	/^static struct clk pixel_clk[] = {$/;"	v	typeref:struct:clk[]	file:
pixel_clock	drivers/video/tegra.c	/^	unsigned pixel_clock;		\/* Pixel clock in Hz *\/$/;"	m	struct:tegra_lcd_priv	typeref:typename:unsigned	file:
pixel_clock	include/edid.h	/^	unsigned char pixel_clock[2];$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char[2]
pixel_clock_max	include/edid.h	/^			unsigned char pixel_clock_max;$/;"	m	struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208	typeref:typename:unsigned char
pixel_fmt	drivers/video/mx3fb.c	/^enum pixel_fmt {$/;"	g	file:
pixel_fmt_cfg	drivers/video/mx3fb.c	/^struct pixel_fmt_cfg {$/;"	s	file:
pixel_format	include/efi_api.h	/^	u32 pixel_format;$/;"	m	struct:efi_gop_mode_info	typeref:typename:u32
pixel_height	include/api_public.h	/^	int pixel_height;$/;"	m	struct:display_info	typeref:typename:int
pixel_order	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_pixel_order pixel_order;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_pixel_order	file:
pixel_rgb_to_yuyv	tools/easylogo/easylogo.c	/^void pixel_rgb_to_yuyv (rgb_t * rgb_pixel, yuyv_t * yuyv_pixel)$/;"	f	typeref:typename:void
pixel_size	include/video_easylogo.h	/^	int		pixel_size;$/;"	m	struct:__anon1a9c56c70108	typeref:typename:int
pixel_size	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
pixel_width	include/api_public.h	/^	int pixel_width;$/;"	m	struct:display_info	typeref:typename:int
pixelclock	include/fdtdec.h	/^	struct timing_entry pixelclock;$/;"	m	struct:display_timing	typeref:struct:timing_entry
pixels	drivers/video/stb_truetype.h	/^   unsigned char *pixels;$/;"	m	struct:__anonce392f790708	typeref:typename:unsigned char *
pixels	drivers/video/stb_truetype.h	/^   unsigned char *pixels;$/;"	m	struct:stbtt_pack_context	typeref:typename:unsigned char *
pixels	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
pixels_per_scanline	include/efi_api.h	/^	u32 pixels_per_scanline;$/;"	m	struct:efi_gop_mode_info	typeref:typename:u32
pixfmt	arch/arm/include/asm/imx-common/video.h	/^	int	pixfmt;$/;"	m	struct:display_info_t	typeref:typename:int
pixfmt	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	int pixfmt;$/;"	m	struct:display_info_t	typeref:typename:int	file:
pixfmt_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 pixfmt_params_sn04[]		= {0x66};$/;"	v	typeref:typename:u16[]	file:
pixfmt_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 pixfmt_params_sn20[]		= {0x66};$/;"	v	typeref:typename:u16[]	file:
pixis	board/freescale/common/ngpixis.h	/^#define pixis /;"	d
pixis	board/freescale/common/pixis.h	/^#define pixis /;"	d
pixis	board/freescale/common/pixis.h	/^typedef struct pixis {$/;"	s
pixis_bank_reset	board/freescale/p1022ds/diu.c	/^void pixis_bank_reset(void)$/;"	f	typeref:typename:void
pixis_base	board/freescale/common/pixis.c	/^#define pixis_base /;"	d	file:
pixis_disable_watchdog_cmd	board/freescale/common/pixis.c	/^static int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
pixis_dump_regs	board/freescale/common/ngpixis.c	/^static void pixis_dump_regs(void)$/;"	f	typeref:typename:void	file:
pixis_help_text	board/freescale/common/ngpixis.c	/^static char pixis_help_text[] =$/;"	v	typeref:typename:char[]	file:
pixis_read	board/freescale/p1022ds/diu.c	/^u8 pixis_read(unsigned int reg)$/;"	f	typeref:typename:u8
pixis_reset	board/freescale/common/pixis.c	/^void pixis_reset(void)$/;"	f	typeref:typename:void
pixis_reset_cmd	board/freescale/common/ngpixis.c	/^int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
pixis_reset_cmd	board/freescale/common/pixis.c	/^static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
pixis_set_sgmii	board/freescale/common/pixis.c	/^static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
pixis_sysclk_set	board/freescale/common/ngpixis.c	/^void pixis_sysclk_set(unsigned long sysclk)$/;"	f	typeref:typename:void
pixis_t	board/freescale/common/pixis.h	/^} __attribute__ ((packed)) pixis_t;$/;"	t	typeref:struct:pixis
pixis_write	board/freescale/p1022ds/diu.c	/^void pixis_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
pixmap	include/linux/fb.h	/^	struct fb_pixmap pixmap;	\/* Image hardware mapper *\/$/;"	m	struct:fb_info	typeref:struct:fb_pixmap
pixmap	scripts/kconfig/qconf.h	/^	const QPixmap* pixmap(colIdx idx) const$/;"	f	class:ConfigItem	typeref:typename:const QPixmap *
pjcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pjcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pjcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pjcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pjdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pjdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pjdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pjdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pk_in_params	drivers/crypto/fsl/rsa_caam.h	/^struct pk_in_params {$/;"	s
pka_sfr	drivers/crypto/ace_sha.h	/^	unsigned int	pka_sfr[5];		\/* base + 0x700 *\/$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[5]
pkcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pkcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pkcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pkcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pkdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pkdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pkdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pkdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pkey	drivers/net/ne2000_base.c	/^static int pkey = -1;$/;"	v	typeref:typename:int	file:
pkey	include/fsl_validate.h	/^		u32 pkey;		\/* public key offset *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c020a	typeref:typename:u32
pkey	include/fsl_validate.h	/^	u8 pkey[2 * KEY_SIZE_BYTES];$/;"	m	struct:ie_key_table	typeref:typename:u8[]
pkey	include/fsl_validate.h	/^	u8 pkey[2 * KEY_SIZE_BYTES];$/;"	m	struct:srk_table	typeref:typename:u8[]
pkt	common/xyzModem.c	/^  unsigned char pkt[1024], *bufp;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned char[1024]	file:
pkt_cnt	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		pkt_cnt;	\/* 0x20 *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
pkt_cnt	drivers/usb/eth/asix88179.c	/^	unsigned pkt_cnt;$/;"	m	struct:asix_private	typeref:typename:unsigned	file:
pkt_ctrl0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pkt_ctrl0;			\/* 0x2f0 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pkt_ctrl0	arch/arm/include/asm/arch/display.h	/^	u32 pkt_ctrl0;			\/* 0x2f0 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pkt_ctrl1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pkt_ctrl1;			\/* 0x2f4 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pkt_ctrl1	arch/arm/include/asm/arch/display.h	/^	u32 pkt_ctrl1;			\/* 0x2f4 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pkt_data	drivers/usb/eth/asix88179.c	/^	uint8_t *pkt_data;$/;"	m	struct:asix_private	typeref:typename:uint8_t *	file:
pkt_data_pull	board/micronas/vct/ebi_smc911x.c	/^u32 pkt_data_pull(struct eth_device *dev, u32 addr)$/;"	f	typeref:typename:u32
pkt_data_pull	board/renesas/rsk7203/rsk7203.c	/^u32 pkt_data_pull(struct eth_device *dev, u32 addr)$/;"	f	typeref:typename:u32
pkt_data_pull	board/renesas/rsk7264/rsk7264.c	/^u32 pkt_data_pull(struct eth_device *dev, u32 addr)$/;"	f	typeref:typename:u32
pkt_data_pull	board/renesas/rsk7269/rsk7269.c	/^u32 pkt_data_pull(struct eth_device *dev, u32 addr)$/;"	f	typeref:typename:u32
pkt_data_push	board/micronas/vct/ebi_smc911x.c	/^void pkt_data_push(struct eth_device *dev, u32 addr, u32 data)$/;"	f	typeref:typename:void
pkt_data_push	board/renesas/rsk7203/rsk7203.c	/^void pkt_data_push(struct eth_device *dev, u32 addr, u32 val)$/;"	f	typeref:typename:void
pkt_data_push	board/renesas/rsk7264/rsk7264.c	/^void pkt_data_push(struct eth_device *dev, u32 addr, u32 val)$/;"	f	typeref:typename:void
pkt_data_push	board/renesas/rsk7269/rsk7269.c	/^void pkt_data_push(struct eth_device *dev, u32 addr, u32 val)$/;"	f	typeref:typename:void
pkt_flag_len	drivers/net/davinci_emac.h	/^	u_int32_t	pkt_flag_len;	\/* Packet Flags(MSW) and Length(LSW) *\/$/;"	m	struct:_emac_desc	typeref:typename:u_int32_t
pkt_hdr	drivers/usb/eth/asix88179.c	/^	uint32_t *pkt_hdr;$/;"	m	struct:asix_private	typeref:typename:uint32_t *	file:
pkt_print	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,$/;"	f	typeref:typename:void	file:
pkt_print	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,$/;"	f	typeref:typename:void	file:
pkt_print	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,$/;"	f	typeref:typename:void	file:
pkt_print	drivers/usb/host/ohci-hcd.c	/^static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,$/;"	f	typeref:typename:void	file:
pkt_print	drivers/usb/host/ohci-s3c24xx.c	/^static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:void	file:
pkt_rate_high	include/linux/ethtool.h	/^	__u32	pkt_rate_high;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
pkt_rate_low	include/linux/ethtool.h	/^	__u32	pkt_rate_low;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
pkt_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 pkt_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
pkt_send_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	pkt_send_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
pkt_send_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	pkt_send_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
pkt_size	drivers/net/mvpp2.c	/^	int pkt_size;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:int	file:
pkt_size	drivers/net/mvpp2.c	/^	int pkt_size;$/;"	m	struct:mvpp2_port	typeref:typename:int	file:
pktdma_cfg	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct pktdma_cfg {$/;"	s
pkthdr	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	pkthdr;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
pkts1024	drivers/qe/uec.h	/^	u32   pkts1024;          \/* total frames(including bad)1024~1518 B *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
pkts256	drivers/qe/uec.h	/^	u32   pkts256;           \/* total frames(including bad)256~511 B *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
pkts512	drivers/qe/uec.h	/^	u32   pkts512;           \/* total frames(including bad)512~1023 B *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
pkts_coal	drivers/net/mvpp2.c	/^	u32 pkts_coal;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:u32	file:
pkts_handled	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int pkts_handled;$/;"	m	struct:emac_stats_st	typeref:typename:int
pkts_rx	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int pkts_rx;$/;"	m	struct:emac_stats_st	typeref:typename:int
pkts_tx	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int pkts_tx;$/;"	m	struct:emac_stats_st	typeref:typename:int
pktsjumbo	drivers/qe/uec.h	/^	u32   pktsjumbo;         \/* total frames(including bad) >1024 B *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
pl010_cr	drivers/serial/serial_pl01x_internal.h	/^	u32	pl010_cr;	\/* 0x14 Control register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl010_lcrh	drivers/serial/serial_pl01x_internal.h	/^	u32	pl010_lcrh;	\/* 0x08 Line control register, high byte *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl010_lcrl	drivers/serial/serial_pl01x_internal.h	/^	u32	pl010_lcrl;	\/* 0x10 Line control register, low byte *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl010_lcrm	drivers/serial/serial_pl01x_internal.h	/^	u32	pl010_lcrm;	\/* 0x0C Line control register, middle byte *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl011_cr	drivers/serial/serial_pl01x_internal.h	/^	u32	pl011_cr;	\/* 0x30 Control register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl011_fbrd	drivers/serial/serial_pl01x_internal.h	/^	u32	pl011_fbrd;	\/* 0x28 Fractional baud rate register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl011_ibrd	drivers/serial/serial_pl01x_internal.h	/^	u32	pl011_ibrd;	\/* 0x24 Integer baud rate register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl011_lcrh	drivers/serial/serial_pl01x_internal.h	/^	u32	pl011_lcrh;	\/* 0x2C Line control register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl011_rlcr	drivers/serial/serial_pl01x_internal.h	/^	u32	pl011_rlcr;	\/* 0x1c Receive line control register *\/$/;"	m	struct:pl01x_regs	typeref:typename:u32
pl011_set_line_control	drivers/serial/serial_pl01x.c	/^static int pl011_set_line_control(struct pl01x_regs *regs)$/;"	f	typeref:typename:int	file:
pl01x_generic_serial_init	drivers/serial/serial_pl01x.c	/^static int pl01x_generic_serial_init(struct pl01x_regs *regs,$/;"	f	typeref:typename:int	file:
pl01x_generic_setbrg	drivers/serial/serial_pl01x.c	/^static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,$/;"	f	typeref:typename:int	file:
pl01x_getc	drivers/serial/serial_pl01x.c	/^static int pl01x_getc(struct pl01x_regs *regs)$/;"	f	typeref:typename:int	file:
pl01x_priv	drivers/serial/serial_pl01x.c	/^struct pl01x_priv {$/;"	s	file:
pl01x_putc	drivers/serial/serial_pl01x.c	/^static int pl01x_putc(struct pl01x_regs *regs, char c)$/;"	f	typeref:typename:int	file:
pl01x_regs	drivers/serial/serial_pl01x_internal.h	/^struct pl01x_regs {$/;"	s
pl01x_serial_drv	drivers/serial/serial_pl01x.c	/^static struct serial_device pl01x_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
pl01x_serial_getc	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pl01x_serial_getc	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_getc(void)$/;"	f	typeref:typename:int	file:
pl01x_serial_id	drivers/serial/serial_pl01x.c	/^static const struct udevice_id pl01x_serial_id[] ={$/;"	v	typeref:typename:const struct udevice_id[]	file:
pl01x_serial_init	drivers/serial/serial_pl01x.c	/^int pl01x_serial_init(void)$/;"	f	typeref:typename:int
pl01x_serial_init_baud	drivers/serial/serial_pl01x.c	/^static void pl01x_serial_init_baud(int baudrate)$/;"	f	typeref:typename:void	file:
pl01x_serial_initialize	drivers/serial/serial_pl01x.c	/^void pl01x_serial_initialize(void)$/;"	f	typeref:typename:void
pl01x_serial_ofdata_to_platdata	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pl01x_serial_ops	drivers/serial/serial_pl01x.c	/^static const struct dm_serial_ops pl01x_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
pl01x_serial_pending	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
pl01x_serial_platdata	include/dm/platform_data/serial_pl01x.h	/^struct pl01x_serial_platdata {$/;"	s
pl01x_serial_probe	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pl01x_serial_putc	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
pl01x_serial_putc	drivers/serial/serial_pl01x.c	/^static void pl01x_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
pl01x_serial_setbrg	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
pl01x_serial_setbrg	drivers/serial/serial_pl01x.c	/^static void pl01x_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
pl01x_serial_tstc	drivers/serial/serial_pl01x.c	/^static int pl01x_serial_tstc(void)$/;"	f	typeref:typename:int	file:
pl01x_tstc	drivers/serial/serial_pl01x.c	/^static int pl01x_tstc(struct pl01x_regs *regs)$/;"	f	typeref:typename:int	file:
pl01x_type	drivers/serial/serial_pl01x.c	/^static enum pl01x_type pl01x_type __attribute__ ((section(".data")));$/;"	v	typeref:enum:pl01x_type	file:
pl01x_type	include/dm/platform_data/serial_pl01x.h	/^enum pl01x_type {$/;"	g
pl031_initted	drivers/rtc/pl031.c	/^static int pl031_initted = 0;$/;"	v	typeref:typename:int	file:
pl180_mmc_host	drivers/mmc/arm_pl180_mmci.h	/^struct pl180_mmc_host {$/;"	s
pl310	arch/arm/lib/cache-pl310.c	/^struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;$/;"	v	typeref:struct:pl310_regs * const
pl310	arch/arm/mach-socfpga/misc.c	/^static struct pl310_regs *const pl310 =$/;"	v	typeref:struct:pl310_regs * const	file:
pl310	arch/arm/mach-socfpga/spl.c	/^static struct pl310_regs *const pl310 =$/;"	v	typeref:struct:pl310_regs * const	file:
pl310_addr_filter_end	arch/arm/include/asm/pl310.h	/^	u32 pl310_addr_filter_end;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_addr_filter_start	arch/arm/include/asm/pl310.h	/^	u32 pl310_addr_filter_start;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_aux_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_aux_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_background_op_all_ways	arch/arm/lib/cache-pl310.c	/^static void pl310_background_op_all_ways(u32 *op_reg)$/;"	f	typeref:typename:void	file:
pl310_cache_id	arch/arm/include/asm/pl310.h	/^	u32 pl310_cache_id;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_cache_sync	arch/arm/include/asm/pl310.h	/^	u32 pl310_cache_sync;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_cache_sync	arch/arm/lib/cache-pl310.c	/^static void pl310_cache_sync(void)$/;"	f	typeref:typename:void	file:
pl310_cache_type	arch/arm/include/asm/pl310.h	/^	u32 pl310_cache_type;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_clean_inv_line_idx	arch/arm/include/asm/pl310.h	/^	u32 pl310_clean_inv_line_idx;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_clean_inv_line_pa	arch/arm/include/asm/pl310.h	/^	u32 pl310_clean_inv_line_pa;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_clean_inv_way	arch/arm/include/asm/pl310.h	/^	u32 pl310_clean_inv_way;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_clean_line_idx	arch/arm/include/asm/pl310.h	/^	u32 pl310_clean_line_idx;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_clean_line_pa	arch/arm/include/asm/pl310.h	/^	u32 pl310_clean_line_pa;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_clean_way	arch/arm/include/asm/pl310.h	/^	u32 pl310_clean_way;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_data_latency_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_data_latency_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_debug_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_debug_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_event_cnt0_cfg	arch/arm/include/asm/pl310.h	/^	u32 pl310_event_cnt0_cfg;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_event_cnt0_val	arch/arm/include/asm/pl310.h	/^	u32 pl310_event_cnt0_val;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_event_cnt1_cfg	arch/arm/include/asm/pl310.h	/^	u32 pl310_event_cnt1_cfg;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_event_cnt1_val	arch/arm/include/asm/pl310.h	/^	u32 pl310_event_cnt1_val;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_event_cnt_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_event_cnt_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_intr_clear	arch/arm/include/asm/pl310.h	/^	u32 pl310_intr_clear;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_intr_mask	arch/arm/include/asm/pl310.h	/^	u32 pl310_intr_mask;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_inv_line_pa	arch/arm/include/asm/pl310.h	/^	u32 pl310_inv_line_pa;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_inv_way	arch/arm/include/asm/pl310.h	/^	u32 pl310_inv_way;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_line_data	arch/arm/include/asm/pl310.h	/^	u32 pl310_line_data;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_line_tag	arch/arm/include/asm/pl310.h	/^	u32 pl310_line_tag;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_lockdown_dbase	arch/arm/include/asm/pl310.h	/^	u32 pl310_lockdown_dbase;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_lockdown_ibase	arch/arm/include/asm/pl310.h	/^	u32 pl310_lockdown_ibase;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_masked_intr_stat	arch/arm/include/asm/pl310.h	/^	u32 pl310_masked_intr_stat;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_power_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_power_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_prefetch_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_prefetch_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_raw_intr_stat	arch/arm/include/asm/pl310.h	/^	u32 pl310_raw_intr_stat;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_regs	arch/arm/include/asm/pl310.h	/^struct pl310_regs {$/;"	s
pl310_tag_latency_ctrl	arch/arm/include/asm/pl310.h	/^	u32 pl310_tag_latency_ctrl;$/;"	m	struct:pl310_regs	typeref:typename:u32
pl310_test_operation	arch/arm/include/asm/pl310.h	/^	u32 pl310_test_operation;$/;"	m	struct:pl310_regs	typeref:typename:u32
pla_ocp_read	drivers/usb/eth/r8152.c	/^int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)$/;"	f	typeref:typename:int
pla_ocp_write	drivers/usb/eth/r8152.c	/^int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)$/;"	f	typeref:typename:int
place_node	scripts/kconfig/gconf.c	/^static void place_node(struct menu *menu, char **row)$/;"	f	typeref:typename:void	file:
plain	test/compression.c	/^static const char plain[] =$/;"	v	typeref:typename:const char[]	file:
plain_keycode	include/key_matrix.h	/^	const u8 *plain_keycode;        \/* key code for each row \/ column *\/$/;"	m	struct:key_matrix	typeref:typename:const u8 *
planes	include/bmp_layout.h	/^	__u16	planes;$/;"	m	struct:bmp_header	typeref:typename:__u16
plaor	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plaor;$/;"	m	struct:rio_liodn	typeref:typename:u32
plascsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plascsr;	\/* Port Local Ackid Status CSR *\/$/;"	m	struct:rio_lp_serial_port	typeref:typename:u32
plascsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	plascsr;	\/* 0xc0148 - Port Local Ackid Status Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
plat	drivers/serial/serial_rockchip.c	/^	struct ns16550_platdata plat;$/;"	m	struct:rockchip_uart_platdata	typeref:struct:ns16550_platdata	file:
plat	drivers/usb/emul/sandbox_hub.c	/^	struct usb_dev_platdata plat;$/;"	m	struct:sandbox_hub_platdata	typeref:struct:usb_dev_platdata	file:
plat	include/ns16550.h	/^	struct ns16550_platdata *plat;$/;"	m	struct:NS16550	typeref:struct:ns16550_platdata *
plat	tools/dtoc/dtoc	/^plat = DtbPlatdata(options.dtb_file, options)$/;"	v
plat	tools/dtoc/dtoc.py	/^plat = DtbPlatdata(options.dtb_file, options)$/;"	v
plat_cmd_ctrl	drivers/mtd/nand/nand_plat.c	/^static void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
plat_config	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	struct platform_config *plat_config;$/;"	m	struct:fspinit_rtbuf	typeref:struct:platform_config *
plat_config	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	struct platform_config plat_config;$/;"	m	struct:fsp_config_data	typeref:struct:platform_config
plat_ddr_init	arch/arm/cpu/arm926ejs/spear/spear600.c	/^void plat_ddr_init(void)$/;"	f	typeref:typename:void
plat_dev_ready	drivers/mtd/nand/nand_plat.c	/^# define plat_dev_ready /;"	d	file:
plat_dev_ready	drivers/mtd/nand/nand_plat.c	/^static int plat_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
plat_ioremap	arch/mips/include/asm/mach-generic/ioremap.h	/^static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,$/;"	f	typeref:typename:void __iomem *
plat_iounmap	arch/mips/include/asm/mach-generic/ioremap.h	/^static inline int plat_iounmap(const volatile void __iomem *addr)$/;"	f	typeref:typename:int
plat_late_init	arch/arm/cpu/arm926ejs/spear/spear600.c	/^void plat_late_init(void)$/;"	f	typeref:typename:void
plat_mp_up	arch/powerpc/cpu/mpc85xx/mp.c	/^static void plat_mp_up(unsigned long bootpg, unsigned int pagesize)$/;"	f	typeref:typename:void	file:
plat_regs	arch/mips/dts/img,boston.dts	/^	plat_regs: system-controller@17ffd000 {$/;"	l
plat_time	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_plat_time	*plat_time;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_plat_time *
platdata	include/dm/device.h	/^	void *platdata;$/;"	m	struct:udevice	typeref:typename:void *
platdata	include/dm/platdata.h	/^	const void *platdata;$/;"	m	struct:driver_info	typeref:typename:const void *
platdata_auto_alloc_size	include/dm/device.h	/^	int platdata_auto_alloc_size;$/;"	m	struct:driver	typeref:typename:int
platdata_non_fdt	drivers/serial/sandbox.c	/^static const struct sandbox_serial_platdata platdata_non_fdt = {$/;"	v	typeref:typename:const struct sandbox_serial_platdata	file:
platdata_size	include/dm/platdata.h	/^	uint platdata_size;$/;"	m	struct:driver_info	typeref:typename:uint
platform	disk/part_iso.h	/^	unsigned char	platform;			\/* Platform: 0=x86, 1=PowerPC, 2=MAC *\/$/;"	m	struct:iso_header_entry	typeref:typename:unsigned char
platform	disk/part_iso.h	/^	unsigned char	platform;			\/* Platform: 0=x86, 1=PowerPC, 2=MAC *\/$/;"	m	struct:iso_val_entry	typeref:typename:unsigned char
platform	drivers/mtd/nand/denali.h	/^	int platform;$/;"	m	struct:denali_nand_info	typeref:typename:int
platform_brand	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 platform_brand:4;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:4
platform_clk	arch/arm/dts/ls1021a.dtsi	/^			platform_clk: pll@c00 {$/;"	l	label:clockgen
platform_config	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^struct platform_config {$/;"	s
platform_data	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	struct exynos_platform_mipi_dsim *platform_data;$/;"	m	struct:mipi_dsim_lcd_device	typeref:struct:exynos_platform_mipi_dsim *
platform_data	drivers/usb/musb-new/linux-compat.h	/^#define platform_data /;"	d
platform_dcu_init	board/freescale/ls1021aqds/dcu.c	/^int platform_dcu_init(unsigned int xres, unsigned int yres,$/;"	f	typeref:typename:int
platform_dcu_init	board/freescale/ls1021atwr/dcu.c	/^int platform_dcu_init(unsigned int xres, unsigned int yres,$/;"	f	typeref:typename:int
platform_diu_init	arch/powerpc/cpu/mpc512x/diu.c	/^int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)$/;"	f	typeref:typename:int
platform_diu_init	board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c	/^int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)$/;"	f	typeref:typename:int
platform_diu_init	board/freescale/p1022ds/diu.c	/^int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)$/;"	f	typeref:typename:int
platform_diu_init	board/freescale/t1040qds/diu.c	/^int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)$/;"	f	typeref:typename:int
platform_diu_init	board/freescale/t104xrdb/diu.c	/^int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)$/;"	f	typeref:typename:int
platform_diu_init	board/gdsys/p1022/diu.c	/^int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)$/;"	f	typeref:typename:int
platform_key	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_platform_key *platform_key;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_platform_key *
platform_key	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mbp_platform_key platform_key;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_platform_key
platform_key_handle	board/gdsys/p1022/controlcenterd-id.c	/^static uint32_t platform_key_handle;$/;"	v	typeref:typename:uint32_t	file:
platform_nand_chip	include/linux/mtd/nand.h	/^struct platform_nand_chip {$/;"	s
platform_nand_ctrl	include/linux/mtd/nand.h	/^struct platform_nand_ctrl {$/;"	s
platform_nand_data	include/linux/mtd/nand.h	/^struct platform_nand_data {$/;"	s
platform_needs_initialization	drivers/usb/musb/omap3.c	/^static int platform_needs_initialization = 1;$/;"	v	typeref:typename:int	file:
platform_ops	include/linux/usb/musb.h	/^	const void	*platform_ops;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:const void *
platform_set_mr	api/api.c	/^void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,$/;"	f	typeref:typename:void
platform_sys_info	api/api_platform-arm.c	/^int platform_sys_info(struct sys_info *si)$/;"	f	typeref:typename:int
platform_sys_info	api/api_platform-mips.c	/^int platform_sys_info(struct sys_info *si)$/;"	f	typeref:typename:int
platform_sys_info	api/api_platform-powerpc.c	/^int platform_sys_info(struct sys_info *si)$/;"	f	typeref:typename:int
platform_target_market_type	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 platform_target_market_type:2;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:2
platform_target_usage_type	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 platform_target_usage_type:4;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:4
platform_type	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t platform_type;			\/* Offset 0x0024 *\/$/;"	m	struct:vpd_region	typeref:typename:uint8_t
platform_type_rule_data	arch/x86/include/asm/arch-ivybridge/me.h	/^struct __packed platform_type_rule_data {$/;"	s
platinum_init_finished	board/barco/platinum/platinum_picon.c	/^int platinum_init_finished(void)$/;"	f	typeref:typename:int
platinum_init_finished	board/barco/platinum/platinum_titanium.c	/^int platinum_init_finished(void)$/;"	f	typeref:typename:int
platinum_init_gpio	board/barco/platinum/platinum_picon.c	/^int platinum_init_gpio(void)$/;"	f	typeref:typename:int
platinum_init_gpio	board/barco/platinum/platinum_titanium.c	/^int platinum_init_gpio(void)$/;"	f	typeref:typename:int
platinum_init_usb	board/barco/platinum/platinum_picon.c	/^int platinum_init_usb(void)$/;"	f	typeref:typename:int
platinum_init_usb	board/barco/platinum/platinum_titanium.c	/^int platinum_init_usb(void)$/;"	f	typeref:typename:int
platinum_phy_config	board/barco/platinum/platinum_picon.c	/^int platinum_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
platinum_phy_config	board/barco/platinum/platinum_titanium.c	/^int platinum_phy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
platinum_setup_enet	board/barco/platinum/platinum_picon.c	/^int platinum_setup_enet(void)$/;"	f	typeref:typename:int
platinum_setup_enet	board/barco/platinum/platinum_titanium.c	/^int platinum_setup_enet(void)$/;"	f	typeref:typename:int
platinum_setup_i2c	board/barco/platinum/platinum_picon.c	/^int platinum_setup_i2c(void)$/;"	f	typeref:typename:int
platinum_setup_i2c	board/barco/platinum/platinum_titanium.c	/^int platinum_setup_i2c(void)$/;"	f	typeref:typename:int
platinum_setup_spi	board/barco/platinum/platinum_picon.c	/^int platinum_setup_spi(void)$/;"	f	typeref:typename:int
platinum_setup_spi	board/barco/platinum/platinum_titanium.c	/^int platinum_setup_spi(void)$/;"	f	typeref:typename:int
platinum_setup_uart	board/barco/platinum/platinum_picon.c	/^int platinum_setup_uart(void)$/;"	f	typeref:typename:int
platinum_setup_uart	board/barco/platinum/platinum_titanium.c	/^int platinum_setup_uart(void)$/;"	f	typeref:typename:int
platname_list	test/dm/regulator.c	/^static const char *platname_list[] = {$/;"	v	typeref:typename:const char * []	file:
plbr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plbr;$/;"	m	struct:rio_liodn	typeref:typename:u32
plc	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 plc;	\/* port link config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
plc	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 plc;	\/* port link config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
plc1	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 plc1;	\/* port link config1 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
plc1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 plc1;	\/* port link config1 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
plc2	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 plc2;	\/* port link config2 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
plc2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 plc2;	\/* port link config2 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
plcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	plcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
plcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	plcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pldr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pldr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pldr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pldr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pldtr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 pldtr;		\/* 0x244 priority level data threshold reg *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
pldtr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 pldtr;		\/* 0x244 priority level data threshold reg *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
plf_priv	drivers/net/ne2000_base.h	/^	void* plf_priv;$/;"	m	struct:dp83902a_priv_data	typeref:typename:void *
plic_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct plic_ctrl {$/;"	s
plic_p0b1rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p0b1rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p0b1tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p0b1tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p0b2rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p0b2rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p0b2tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p0b2tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p0cr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p0cr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p0drr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p0drr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p0dtr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p0dtr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p0gcir	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p0gcir;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p0gcit	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p0gcit;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p0gmr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p0gmr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p0gmt	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p0gmt;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p0icr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p0icr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p0psr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p0psr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p0sdr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p0sdr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p1b1rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p1b1rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p1b1tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p1b1tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p1b2rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p1b2rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p1b2tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p1b2tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p1cr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p1cr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p1drr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p1drr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p1dtr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p1dtr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p1gcir	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p1gcir;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p1gcit	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p1gcit;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p1gmr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p1gmr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p1gmt	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p1gmt;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p1icr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p1icr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p1psr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p1psr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p1sdr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p1sdr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p2b1rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p2b1rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p2b1tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p2b1tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p2b2rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p2b2rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p2b2tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p2b2tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p2cr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p2cr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p2drr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p2drr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p2dtr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p2dtr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p2gcir	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p2gcir;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p2gcit	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p2gcit;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p2gmr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p2gmr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p2gmt	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p2gmt;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p2icr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p2icr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p2psr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p2psr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p2sdr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p2sdr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p3b1rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p3b1rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p3b1tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p3b1tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p3b2rr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p3b2rr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p3b2tr	arch/m68k/include/asm/immap_5272.h	/^	ulong plic_p3b2tr;$/;"	m	struct:plic_ctrl	typeref:typename:ulong
plic_p3cr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p3cr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p3drr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p3drr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p3dtr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p3dtr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p3gcir	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p3gcir;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p3gcit	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_p3gcit;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_p3gmr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p3gmr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p3gmt	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p3gmt;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p3icr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p3icr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p3psr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p3psr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_p3sdr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_p3sdr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_pasr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_pasr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_pcsr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_pcsr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_pdcsr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_pdcsr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_pdrqr	arch/m68k/include/asm/immap_5272.h	/^	ushort plic_pdrqr;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
plic_pgcitsr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_pgcitsr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_pgmta	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_pgmta;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_pgmts	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_pgmts;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_plcr	arch/m68k/include/asm/immap_5272.h	/^	uchar plic_plcr;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
plic_t	arch/m68k/include/asm/immap_5272.h	/^} plic_t;$/;"	t	typeref:struct:plic_ctrl
pll	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	} pll[4];$/;"	m	struct:rk3036_cru	typeref:struct:rk3036_cru::rk3036_pll[4]
pll	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	} pll[5];$/;"	m	struct:rk3288_cru	typeref:struct:rk3288_cru::rk3288_pll[5]
pll	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 pll;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
pll	arch/arm/include/asm/arch/display2.h	/^	u32 pll;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
pll	arch/arm/mach-keystone/include/mach/clock.h	/^	int pll;$/;"	m	struct:pll_init_data	typeref:typename:int
pll	arch/m68k/include/asm/immap_5227x.h	/^typedef struct pll {$/;"	s
pll	arch/m68k/include/asm/immap_5441x.h	/^typedef struct pll {$/;"	s
pll	arch/m68k/include/asm/immap_5445x.h	/^typedef struct pll {$/;"	s
pll	board/bf537-stamp/post-memory.c	/^const int pll[CCLK_NUM][SCLK_NUM][2] = {$/;"	v	typeref:typename:const int[][][2]
pll	drivers/usb/host/ehci-mxs.c	/^	struct mxs_register_32	*pll;$/;"	m	struct:ehci_mxs_port	typeref:struct:mxs_register_32 *	file:
pll0_config	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	pll0_config;	\/* 0x84 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
pll0cr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll0cr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll0div_read	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pll0div_read(/;"	d
pll0stpcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll0stpcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll1	arch/arm/dts/sun4i-a10.dtsi	/^		pll1: clk@01c20000 {$/;"	l
pll1	arch/arm/dts/sun50i-a64.dtsi	/^		pll1: pll1_clk@1c20000 {$/;"	l
pll1	arch/arm/dts/sun5i.dtsi	/^		pll1: clk@01c20000 {$/;"	l
pll1	arch/arm/dts/sun6i-a31.dtsi	/^		pll1: clk@01c20000 {$/;"	l
pll1	arch/arm/dts/sun7i-a20.dtsi	/^		pll1: clk@01c20000 {$/;"	l
pll1	arch/arm/dts/sun8i-a23-a33.dtsi	/^		pll1: clk@01c20000 {$/;"	l
pll10_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll10_bias_cfg;	\/* 0x248 PLL10 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll10_bias_cfg;	\/* 0x248 PLL10 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll10_cfg;		\/* 0x48 pll10 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll10_cfg;		\/* 0x4c pll10 video1 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll10_cfg;		\/* 0x48 pll10 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll10_cfg;		\/* 0x4c pll10 video1 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_de_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll10_de_cfg;	\/* 0x24 displayengine pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_de_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll10_de_cfg;	\/* 0x24 displayengine pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll10_pattern_cfg;	\/* 0x2a8 PLL10 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll10_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll10_pattern_cfg;	\/* 0x2a8 PLL10 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11	arch/arm/dts/sun8i-a33.dtsi	/^		pll11: pll11_clk {$/;"	l
pll11_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll11_cfg;		\/* 0x4c pll11 (ddr1) control (A33 only) *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll11_cfg;		\/* 0x4c pll11 (ddr1) control (A33 only) *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_isp_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll11_isp_cfg;	\/* 0x28 isp pll6 ontrol *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_isp_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll11_isp_cfg;	\/* 0x28 isp pll6 ontrol *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_pattern_cfg0	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll11_pattern_cfg0; \/* 0x2ac PLL11 Pattern config0, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_pattern_cfg0	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll11_pattern_cfg0; \/* 0x2ac PLL11 Pattern config0, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_pattern_cfg1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll11_pattern_cfg1; \/* 0x2b0 PLL11 Pattern config0, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll11_pattern_cfg1	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll11_pattern_cfg1; \/* 0x2b0 PLL11 Pattern config0, A33 only *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll12	arch/arm/dts/sun9i-a80.dtsi	/^		pll12: clk@0600002c {$/;"	l
pll12_periph1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll12_periph1_cfg;	\/* 0x2c peripheral1 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll12_periph1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll12_periph1_cfg;	\/* 0x2c peripheral1 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll145x_get_rate	drivers/clk/exynos/clk-pll.c	/^unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq)$/;"	f	typeref:typename:unsigned long
pll1_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll1_bias_cfg;	\/* 0x220 PLL1 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll1_bias_cfg;	\/* 0x220 PLL1 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c0_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll1_c0_bias_cfg;	\/* 0x220 PLL1 c0cpu# Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c0_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll1_c0_bias_cfg;	\/* 0x220 PLL1 c0cpu# Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll1_c0_cfg;	\/* 0x00 c1cpu# pll control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll1_c0_cfg;	\/* 0x00 c0cpu# pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c0_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll1_c0_cfg;	\/* 0x00 c1cpu# pll control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll1_c0_cfg;	\/* 0x00 c0cpu# pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c1_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll1_c1_bias_cfg;	\/* 0x238 PLL1 c1cpu# Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c1_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll1_c1_bias_cfg;	\/* 0x238 PLL1 c1cpu# Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll1_c1_cfg;	\/* 0x04 c1cpu# pll control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_c1_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll1_c1_cfg;	\/* 0x04 c1cpu# pll control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll1_cfg;		\/* 0x00 pll1 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll1_cfg;		\/* 0x00 pll1 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll1_cfg;		\/* 0x00 pll1 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll1_cfg;		\/* 0x00 pll1 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_cfg	arch/arm/mach-sunxi/clock_sun4i.c	/^	u32 pll1_cfg;$/;"	m	struct:__anon4368fa7c0108	typeref:typename:u32	file:
pll1_cntl	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll1_cntl;		\/* 0x8 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll1_config	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	pll1_config;	\/* 0x88 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
pll1_ctrl	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll1_ctrl;		\/* offset 0x64 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll1_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll1_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll1_denom	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll1_denom;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll1_fract	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll1_fract;		\/* offset 0x6c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll1_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll1_freq;		\/* offset 0x68 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll1_freq	board/spear/common/spr_lowlevel_init.S	/^pll1_freq:$/;"	l
pll1_frq	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll1_frq;		\/* 0xc *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll1_lock	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll1_lock;		\/* 0x204 PLL1 Lock Time *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_lock	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll1_lock;		\/* 0x204 PLL1 Lock Time *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_mod	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll1_mod;		\/* 0x10 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll1_num	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll1_num;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll1_para	arch/arm/mach-sunxi/clock_sun4i.c	/^} pll1_para[] = {$/;"	v	typeref:struct:__anon4368fa7c0108[]
pll1_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll1_pattern_cfg;	\/* 0x280 PLL1 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll1_pattern_cfg;	\/* 0x280 PLL1 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_pdf	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll1_pdf;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll1_spread	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll1_spread;	\/* offset 0x70 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll1_ss	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll1_ss;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll1_status	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll1_status;	\/* offset 0x74 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll1_tun	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll1_tun;		\/* 0x04 pll1 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_tun	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll1_tun;		\/* 0x04 pll1 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_tun2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll1_tun2;		\/* 0x34 pll5 tuning2 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1_tun2	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll1_tun2;		\/* 0x34 pll5 tuning2 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll1cr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll1cr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll1stpcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll1stpcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll2	arch/arm/dts/sun4i-a10.dtsi	/^		pll2: clk@01c20008 {$/;"	l
pll2	arch/arm/dts/sun5i.dtsi	/^		pll2: clk@01c20008 {$/;"	l
pll2	arch/arm/dts/sun7i-a20.dtsi	/^		pll2: clk@01c20008 {$/;"	l
pll2_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll2_bias_cfg;	\/* 0x224 PLL2 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll2_bias_cfg;	\/* 0x224 PLL2 audio Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll2_bias_cfg;	\/* 0x224 PLL2 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll2_bias_cfg;	\/* 0x224 PLL2 audio Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_c1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll2_c1_cfg;	\/* 0x04 c1cpu# pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_c1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll2_c1_cfg;	\/* 0x04 c1cpu# pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll2_cfg;		\/* 0x08 pll2 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll2_cfg;		\/* 0x08 pll2 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll2_cfg;		\/* 0x08 pll2 audio control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll2_cfg;		\/* 0x08 pll2 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll2_cfg;		\/* 0x08 pll2 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll2_cfg;		\/* 0x08 pll2 audio control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_cntl	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll2_cntl;		\/* 0x14 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll2_ctrl	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll2_ctrl;		\/* offset 0x78 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll2_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll2_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll2_denom	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll2_denom;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll2_fract	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll2_fract;		\/* offset 0x80 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll2_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll2_freq;		\/* offset 0x7c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll2_freq	board/spear/common/spr_lowlevel_init.S	/^pll2_freq:$/;"	l
pll2_frq	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll2_frq;		\/* 0x18 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll2_mod	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll2_mod;		\/* 0x1C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll2_num	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll2_num;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll2_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll2_pattern_cfg;	\/* 0x284 PLL2 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll2_pattern_cfg;	\/* 0x284 PLL2 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_pattern_cfg0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll2_pattern_cfg0;	\/* 0x284 PLL2 Pattern register 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_pattern_cfg0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll2_pattern_cfg0;	\/* 0x284 PLL2 Pattern register 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_pattern_cfg1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll2_pattern_cfg1;	\/* 0x2a4 PLL2 Pattern register 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_pattern_cfg1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll2_pattern_cfg1;	\/* 0x2a4 PLL2 Pattern register 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_pfd	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll2_pfd;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll2_spread	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll2_spread;	\/* offset 0x84 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll2_ss	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll2_ss;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll2_status	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 pll2_status;	\/* offset 0x88 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
pll2_tun	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll2_tun;		\/* 0x0c pll2 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2_tun	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll2_tun;		\/* 0x0c pll2 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll2cr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll2cr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll2stpcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll2stpcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll3	arch/arm/dts/sun4i-a10.dtsi	/^		pll3: clk@01c20010 {$/;"	l
pll3	arch/arm/dts/sun5i.dtsi	/^		pll3: clk@01c20010 {$/;"	l
pll3	arch/arm/dts/sun7i-a20.dtsi	/^		pll3: clk@01c20010 {$/;"	l
pll3	arch/arm/dts/sun9i-a80.dtsi	/^		pll3: clk@06000008 {$/;"	l
pll397_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 pll397_ctrl;	\/* PLL397 Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
pll3_audio_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll3_audio_cfg;	\/* 0x08 audio pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_audio_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll3_audio_cfg;	\/* 0x08 audio pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll3_bias_cfg;	\/* 0x228 PLL3 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll3_bias_cfg;	\/* 0x228 PLL3 video Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll3_bias_cfg;	\/* 0x228 PLL3 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll3_bias_cfg;	\/* 0x228 PLL3 video Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll3_cfg;		\/* 0x10 pll3 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll3_cfg;		\/* 0x10 pll3 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll3_cfg;		\/* 0x10 pll3 video0 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll3_cfg;		\/* 0x10 pll3 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll3_cfg;		\/* 0x10 pll3 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll3_cfg;		\/* 0x10 pll3 video0 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll3_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll3_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll3_pattern_cfg;	\/* 0x288 PLL3 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll3_pattern_cfg;	\/* 0x288 PLL3 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_pattern_cfg0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll3_pattern_cfg0;	\/* 0x288 PLL3 Pattern register 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_pattern_cfg0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll3_pattern_cfg0;	\/* 0x288 PLL3 Pattern register 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_pattern_cfg1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll3_pattern_cfg1;	\/* 0x2a8 PLL3 Pattern register 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_pattern_cfg1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll3_pattern_cfg1;	\/* 0x2a8 PLL3 Pattern register 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll3_pfd	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll3_pfd;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll3cr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll3cr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll3stpcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pll3stpcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pll3x2	arch/arm/dts/sun4i-a10.dtsi	/^		pll3x2: pll3x2_clk {$/;"	l
pll3x2	arch/arm/dts/sun5i.dtsi	/^		pll3x2: pll3x2_clk {$/;"	l
pll3x2	arch/arm/dts/sun7i-a20.dtsi	/^		pll3x2: pll3x2_clk {$/;"	l
pll4	arch/arm/dts/sun4i-a10.dtsi	/^		pll4: clk@01c20018 {$/;"	l
pll4	arch/arm/dts/sun5i.dtsi	/^		pll4: clk@01c20018 {$/;"	l
pll4	arch/arm/dts/sun7i-a20.dtsi	/^		pll4: clk@01c20018 {$/;"	l
pll4	arch/arm/dts/sun9i-a80.dtsi	/^		pll4: clk@0600000c {$/;"	l
pll4_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll4_bias_cfg;	\/* 0x22c PLL4 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll4_bias_cfg;	\/* 0x22c PLL4 ve Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll4_bias_cfg;	\/* 0x22c PLL4 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll4_bias_cfg;	\/* 0x22c PLL4 ve Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll4_cfg;		\/* 0x18 pll4 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll4_cfg;		\/* 0x18 pll4 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll4_cfg;		\/* 0x18 pll4 ve control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll4_cfg;		\/* 0x18 pll4 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll4_cfg;		\/* 0x18 pll4 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll4_cfg;		\/* 0x18 pll4 ve control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll4_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll4_denom	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll4_denom;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll4_num	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll4_num;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll4_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll4_pattern_cfg;	\/* 0x28c PLL4 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll4_pattern_cfg;	\/* 0x28c PLL4 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_periph0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll4_periph0_cfg;	\/* 0x0c peripheral0 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll4_periph0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll4_periph0_cfg;	\/* 0x0c peripheral0 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5	arch/arm/dts/sun4i-a10.dtsi	/^		pll5: clk@01c20020 {$/;"	l
pll5	arch/arm/dts/sun5i.dtsi	/^		pll5: clk@01c20020 {$/;"	l
pll5	arch/arm/dts/sun7i-a20.dtsi	/^		pll5: clk@01c20020 {$/;"	l
pll5	arch/arm/dts/sun8i-a23-a33.dtsi	/^		pll5: pll5_clk {$/;"	l
pll5_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll5_bias_cfg;	\/* 0x230 PLL5 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll5_bias_cfg;	\/* 0x230 PLL5 ddr Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll5_bias_cfg;	\/* 0x230 PLL5 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll5_bias_cfg;	\/* 0x230 PLL5 ddr Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll5_cfg;		\/* 0x20 pll5 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll5_cfg;		\/* 0x20 pll5 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll5_cfg;		\/* 0x20 pll5 ddr control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll5_cfg;		\/* 0x20 pll5 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll5_cfg;		\/* 0x20 pll5 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll5_cfg;		\/* 0x20 pll5 ddr control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll5_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll5_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll5_pattern_cfg;	\/* 0x290 PLL5 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll5_pattern_cfg;	\/* 0x290 PLL5 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_pattern_cfg0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll5_pattern_cfg0;	\/* 0x290 PLL5 Pattern register 0*\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_pattern_cfg0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll5_pattern_cfg0;	\/* 0x290 PLL5 Pattern register 0*\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_pattern_cfg1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll5_pattern_cfg1;	\/* 0x2b0 PLL5 Pattern register 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_pattern_cfg1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll5_pattern_cfg1;	\/* 0x2b0 PLL5 Pattern register 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_tun	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll5_tun;		\/* 0x24 pll5 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_tun	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll5_tun;		\/* 0x24 pll5 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_tun2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll5_tun2;		\/* 0x3c pll5 tuning2 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_tun2	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll5_tun2;		\/* 0x3c pll5 tuning2 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_tuning_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll5_tuning_cfg;	\/* 0x260 PLL5 Tuning config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_tuning_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll5_tuning_cfg;	\/* 0x260 PLL5 Tuning config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_ve_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll5_ve_cfg;	\/* 0x10 videoengine pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll5_ve_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll5_ve_cfg;	\/* 0x10 videoengine pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6	arch/arm/dts/sun4i-a10.dtsi	/^		pll6: clk@01c20028 {$/;"	l
pll6	arch/arm/dts/sun50i-a64.dtsi	/^		pll6: pll6_clk@1c20028 {$/;"	l
pll6	arch/arm/dts/sun5i.dtsi	/^		pll6: clk@01c20028 {$/;"	l
pll6	arch/arm/dts/sun6i-a31.dtsi	/^		pll6: clk@01c20028 {$/;"	l
pll6	arch/arm/dts/sun7i-a20.dtsi	/^		pll6: clk@01c20028 {$/;"	l
pll6	arch/arm/dts/sun8i-a23-a33.dtsi	/^		pll6: clk@01c20028 {$/;"	l
pll6_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll6_bias_cfg;	\/* 0x234 PLL6 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll6_bias_cfg;	\/* 0x234 PLL6 periph Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll6_bias_cfg;	\/* 0x234 PLL6 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll6_bias_cfg;	\/* 0x234 PLL6 periph Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll6_cfg;		\/* 0x28 pll6 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll6_cfg;		\/* 0x28 pll6 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll6_cfg;		\/* 0x28 pll6 peripheral control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll6_cfg;		\/* 0x28 pll6 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll6_cfg;		\/* 0x28 pll6 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll6_cfg;		\/* 0x28 pll6 peripheral control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll6_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll6_ddr_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll6_ddr_cfg;	\/* 0x14 ddr pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_ddr_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll6_ddr_cfg;	\/* 0x14 ddr pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_denom	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll6_denom;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll6_num	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll6_num;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll6_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll6_pattern_cfg;	\/* 0x294 PLL6 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll6_pattern_cfg;	\/* 0x294 PLL6 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_tun	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll6_tun;		\/* 0x2c pll6 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6_tun	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll6_tun;		\/* 0x2c pll6 tuning *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll6d2	arch/arm/dts/sun50i-a64.dtsi	/^		pll6d2: pll6d2_clk {$/;"	l
pll7	arch/arm/dts/sun4i-a10.dtsi	/^		pll7: clk@01c20030 {$/;"	l
pll7	arch/arm/dts/sun50i-a64.dtsi	/^		pll7: pll7_clk@1c2002c {$/;"	l
pll7	arch/arm/dts/sun5i.dtsi	/^		pll7: clk@01c20030 {$/;"	l
pll7	arch/arm/dts/sun7i-a20.dtsi	/^		pll7: clk@01c20030 {$/;"	l
pll7_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll7_bias_cfg;	\/* 0x238 PLL7 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll7_bias_cfg;	\/* 0x238 PLL7 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll7_cfg;		\/* 0x30 pll7 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll7_cfg;		\/* 0x30 pll7 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll7_cfg;		\/* 0x38 pll7 gpu control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll7_cfg;		\/* 0x30 pll7 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll7_cfg;		\/* 0x30 pll7 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll7_cfg;		\/* 0x38 pll7 gpu control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_ctrl	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll7_ctrl;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll7_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll7_pattern_cfg;	\/* 0x298 PLL7 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll7_pattern_cfg;	\/* 0x298 PLL7 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_video0_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll7_video0_cfg;	\/* 0x18 video0 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7_video0_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll7_video0_cfg;	\/* 0x18 video0 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll7x2	arch/arm/dts/sun4i-a10.dtsi	/^		pll7x2: pll7x2_clk {$/;"	l
pll7x2	arch/arm/dts/sun5i.dtsi	/^		pll7x2: pll7x2_clk {$/;"	l
pll7x2	arch/arm/dts/sun7i-a20.dtsi	/^		pll7x2: pll7x2_clk {$/;"	l
pll8	arch/arm/dts/sun7i-a20.dtsi	/^		pll8: clk@01c20040 {$/;"	l
pll8_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll8_bias_cfg;	\/* 0x23c PLL8 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll8_bias_cfg;	\/* 0x23c PLL7 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll8_bias_cfg;	\/* 0x23c PLL8 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll8_bias_cfg;	\/* 0x23c PLL7 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll8_cfg;		\/* 0x38 pll8 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll8_cfg;		\/* 0x44 pll8 hsic control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll8_cfg;		\/* 0x38 pll8 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll8_cfg;		\/* 0x44 pll8 hsic control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll8_pattern_cfg;	\/* 0x29c PLL8 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll8_pattern_cfg;	\/* 0x29c PLL8 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_video1_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll8_video1_cfg;	\/* 0x1c video1 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll8_video1_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll8_video1_cfg;	\/* 0x1c video1 pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll9_bias_cfg;	\/* 0x244 PLL9 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll9_bias_cfg;	\/* 0x244 PLL9 hsic Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_bias_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll9_bias_cfg;	\/* 0x244 PLL9 Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll9_bias_cfg;	\/* 0x244 PLL9 hsic Bias config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll9_cfg;		\/* 0x44 pll9 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll9_cfg;		\/* 0x48 pll9 de control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll9_cfg;		\/* 0x44 pll9 control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll9_cfg;		\/* 0x48 pll9 de control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_gpu_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll9_gpu_cfg;	\/* 0x20 gpu pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_gpu_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll9_gpu_cfg;	\/* 0x20 gpu pll configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_pattern_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll9_pattern_cfg;	\/* 0x2a4 PLL9 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll9_pattern_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll9_pattern_cfg;	\/* 0x2a4 PLL9 Pattern config *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pllAGP_PLL_CNTL	include/radeon.h	/^#define pllAGP_PLL_CNTL	/;"	d
pllCG_TEST_MACRO_RW_CNTL	include/radeon.h	/^#define pllCG_TEST_MACRO_RW_CNTL	/;"	d
pllCG_TEST_MACRO_RW_DATA	include/radeon.h	/^#define pllCG_TEST_MACRO_RW_DATA	/;"	d
pllCG_TEST_MACRO_RW_READ	include/radeon.h	/^#define pllCG_TEST_MACRO_RW_READ	/;"	d
pllCG_TEST_MACRO_RW_WRITE	include/radeon.h	/^#define pllCG_TEST_MACRO_RW_WRITE	/;"	d
pllCLK_PIN_CNTL	include/radeon.h	/^#define pllCLK_PIN_CNTL	/;"	d
pllCLK_PWRMGT_CNTL	include/radeon.h	/^#define pllCLK_PWRMGT_CNTL	/;"	d
pllDISP_TEST_MACRO_RW_CNTL	include/radeon.h	/^#define pllDISP_TEST_MACRO_RW_CNTL	/;"	d
pllDISP_TEST_MACRO_RW_DATA	include/radeon.h	/^#define pllDISP_TEST_MACRO_RW_DATA	/;"	d
pllDISP_TEST_MACRO_RW_READ	include/radeon.h	/^#define pllDISP_TEST_MACRO_RW_READ	/;"	d
pllDISP_TEST_MACRO_RW_WRITE	include/radeon.h	/^#define pllDISP_TEST_MACRO_RW_WRITE	/;"	d
pllExtBusDiv	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllExtBusDiv;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllFbkDiv	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllFbkDiv;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllFwdDiv	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllFwdDiv;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllFwdDivA	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllFwdDivA;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllFwdDivB	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllFwdDivB;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllHTOTAL2_CNTL	include/radeon.h	/^#define pllHTOTAL2_CNTL	/;"	d
pllHTOTAL_CNTL	include/radeon.h	/^#define pllHTOTAL_CNTL	/;"	d
pllMCLK_CNTL	include/radeon.h	/^#define pllMCLK_CNTL	/;"	d
pllMCLK_MISC	include/radeon.h	/^#define pllMCLK_MISC	/;"	d
pllMDLL_CKO	include/radeon.h	/^#define pllMDLL_CKO	/;"	d
pllMDLL_RDCKA	include/radeon.h	/^#define pllMDLL_RDCKA	/;"	d
pllMDLL_RDCKB	include/radeon.h	/^#define pllMDLL_RDCKB	/;"	d
pllMPLL_AUX_CNTL	include/radeon.h	/^#define pllMPLL_AUX_CNTL	/;"	d
pllMPLL_CNTL	include/radeon.h	/^#define pllMPLL_CNTL	/;"	d
pllM_SPLL_REF_FB_DIV	include/radeon.h	/^#define pllM_SPLL_REF_FB_DIV	/;"	d
pllOpbDiv	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllOpbDiv;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllP2PLL_CNTL	include/radeon.h	/^#define pllP2PLL_CNTL	/;"	d
pllP2PLL_DIV_0	include/radeon.h	/^#define pllP2PLL_DIV_0	/;"	d
pllP2PLL_REF_DIV	include/radeon.h	/^#define pllP2PLL_REF_DIV	/;"	d
pllPIXCLKS_CNTL	include/radeon.h	/^#define pllPIXCLKS_CNTL	/;"	d
pllPLL_PWRMGT_CNTL	include/radeon.h	/^#define pllPLL_PWRMGT_CNTL	/;"	d
pllPLL_TEST_CNTL	include/radeon.h	/^#define pllPLL_TEST_CNTL	/;"	d
pllPPLL_CNTL	include/radeon.h	/^#define pllPPLL_CNTL	/;"	d
pllPPLL_DIV_0	include/radeon.h	/^#define pllPPLL_DIV_0	/;"	d
pllPPLL_DIV_1	include/radeon.h	/^#define pllPPLL_DIV_1	/;"	d
pllPPLL_DIV_2	include/radeon.h	/^#define pllPPLL_DIV_2	/;"	d
pllPPLL_DIV_3	include/radeon.h	/^#define pllPPLL_DIV_3	/;"	d
pllPPLL_REF_DIV	include/radeon.h	/^#define pllPPLL_REF_DIV	/;"	d
pllPciDiv	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllPciDiv;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllPlbDiv	arch/powerpc/include/asm/ppc4xx.h	/^	unsigned long pllPlbDiv;$/;"	m	struct:__anon8d0ced010108	typeref:typename:unsigned long
pllSCLK_CNTL	include/radeon.h	/^#define pllSCLK_CNTL	/;"	d
pllSCLK_CNTL2	include/radeon.h	/^#define pllSCLK_CNTL2	/;"	d
pllSCLK_MORE_CNTL	include/radeon.h	/^#define pllSCLK_MORE_CNTL	/;"	d
pllSPLL_AUX_CNTL	include/radeon.h	/^#define pllSPLL_AUX_CNTL	/;"	d
pllSPLL_CNTL	include/radeon.h	/^#define pllSPLL_CNTL	/;"	d
pllSSPLL_CNTL	include/radeon.h	/^#define pllSSPLL_CNTL	/;"	d
pllSSPLL_DIV_0	include/radeon.h	/^#define pllSSPLL_DIV_0	/;"	d
pllSSPLL_REF_DIV	include/radeon.h	/^#define pllSSPLL_REF_DIV	/;"	d
pllSS_INT_CNTL	include/radeon.h	/^#define pllSS_INT_CNTL	/;"	d
pllSS_TST_CNTL	include/radeon.h	/^#define pllSS_TST_CNTL	/;"	d
pllTV_DTO_INCREMENTS	include/radeon.h	/^#define pllTV_DTO_INCREMENTS	/;"	d
pllTV_PLL_CNTL	include/radeon.h	/^#define pllTV_PLL_CNTL	/;"	d
pllTV_PLL_CNTL1	include/radeon.h	/^#define pllTV_PLL_CNTL1	/;"	d
pllTV_PLL_FINE_CNTL	include/radeon.h	/^#define pllTV_PLL_FINE_CNTL	/;"	d
pllVCLK_ECP_CNTL	include/radeon.h	/^#define pllVCLK_ECP_CNTL	/;"	d
pll_480	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_480;			\/* offset 0x00b0 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_480_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_480_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_480_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_480_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_480_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_480_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_528	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528;		\/* 0x030 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_528_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528_clr;		\/* 0x038 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_528_denom	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528_denom;		\/* 0x060 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_528_num	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528_num;		\/* 0x050 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_528_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528_set;		\/* 0x034 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_528_ss	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528_ss;		\/* 0x040 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_528_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_528_tog;		\/* 0x03c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_arm	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_arm;			\/* offset 0x0060 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_arm_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_arm_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_arm_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_arm_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_arm_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_arm_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_audio;		\/* 0x070 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_audio	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio;			\/* offset 0x00f0 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_audio_clr;		\/* 0x078 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_audio_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio_denom	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_audio_denom;	\/* 0x090 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_audio_denom	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio_denom;		\/* offset 0x0120 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio_num	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_audio_num;		\/* 0x080 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_audio_num	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio_num;			\/* offset 0x0110 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_audio_set;		\/* 0x074 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_audio_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio_ss	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio_ss;			\/* offset 0x0100 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_audio_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_audio_tog;		\/* 0x07c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_audio_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_audio_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pll_base;		\/* the control register *\/$/;"	m	struct:clk_pll	typeref:typename:uint
pll_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pll_base;		\/* the control register *\/$/;"	m	struct:clk_pll_simple	typeref:typename:uint
pll_clocks	arch/arm/cpu/armv7/mx5/clock.c	/^enum pll_clocks {$/;"	g	file:
pll_clocks	arch/arm/cpu/armv7/mx6/clock.c	/^enum pll_clocks {$/;"	g	file:
pll_clocks	arch/arm/include/asm/arch-mx7/clock.h	/^enum pll_clocks {$/;"	g
pll_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 pll_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
pll_config	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static void pll_config(u32 base, u32 n, u32 m, u32 m2,$/;"	f	typeref:typename:void	file:
pll_config_1	include/linux/usb/xhci-omap.h	/^	u32 pll_config_1;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_config_2	include/linux/usb/xhci-omap.h	/^	u32 pll_config_2;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_config_3	include/linux/usb/xhci-omap.h	/^	u32 pll_config_3;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_config_4	include/linux/usb/xhci-omap.h	/^	u32 pll_config_4;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 pll_control;			\/* 0x48 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
pll_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	pll_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
pll_ctl_add	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_ctl_add:$/;"	l
pll_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 pll_ctr_reg;	\/* 0x20 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
pll_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pll_ctrl;			\/* 0x208 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pll_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 pll_ctrl;			\/* 0x208 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pll_ctrl	arch/m68k/include/asm/immap_520x.h	/^typedef struct pll_ctrl {$/;"	s
pll_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct pll_ctrl {$/;"	s
pll_ctrl	arch/m68k/include/asm/immap_5275.h	/^typedef struct pll_ctrl {$/;"	s
pll_ctrl	arch/m68k/include/asm/immap_5282.h	/^typedef struct pll_ctrl {$/;"	s
pll_ctrl	arch/m68k/include/asm/immap_5301x.h	/^typedef struct pll_ctrl {$/;"	s
pll_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct pll_ctrl {$/;"	s
pll_ctrl0	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 pll_ctrl0;		\/* 0x040 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
pll_ctrl0	arch/arm/include/asm/arch/prcm.h	/^	u32 pll_ctrl0;		\/* 0x040 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
pll_ctrl1	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 pll_ctrl1;		\/* 0x044 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
pll_ctrl1	arch/arm/include/asm/arch/prcm.h	/^	u32 pll_ctrl1;		\/* 0x044 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
pll_ctrl_base	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	void __iomem            *pll_ctrl_base;$/;"	m	struct:omap_pipe3	typeref:typename:void __iomem *
pll_ctrl_base	drivers/usb/dwc3/ti_usb_phy.c	/^	void __iomem *pll_ctrl_base;$/;"	m	struct:ti_usb_phy	typeref:typename:void __iomem *	file:
pll_ctrl_base	include/ti-usb-phy-uboot.h	/^	void *pll_ctrl_base;$/;"	m	struct:ti_usb_phy_device	typeref:typename:void *
pll_d	arch/arm/mach-keystone/include/mach/clock.h	/^	int pll_d;		\/* PLL divider *\/$/;"	m	struct:pll_init_data	typeref:typename:int
pll_dbg0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pll_dbg0;			\/* 0x20c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pll_dbg0	arch/arm/include/asm/arch/display.h	/^	u32 pll_dbg0;			\/* 0x20c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pll_dbg1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 pll_dbg1;			\/* 0x210 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pll_dbg1	arch/arm/include/asm/arch/display.h	/^	u32 pll_dbg1;			\/* 0x210 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
pll_dco_freq_sel	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static u32 pll_dco_freq_sel(u32 clkout_dco)$/;"	f	typeref:typename:u32	file:
pll_ddr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr;			\/* offset 0x0070 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_ddr_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_ddr_denom	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr_denom;			\/* offset 0x00a0 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_ddr_num	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr_num;			\/* offset 0x0090 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_ddr_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_ddr_ss	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr_ss;			\/* offset 0x0080 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_ddr_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_ddr_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_debug	board/amcc/makalu/cmd_pll.c	/^pll_debug(int off)$/;"	f	typeref:typename:void	file:
pll_delay	board/samsung/smdk2410/smdk2410.c	/^static inline void pll_delay(unsigned long loops)$/;"	f	typeref:typename:void	file:
pll_dis_bits	drivers/usb/host/ehci-mxs.c	/^	uint32_t		pll_dis_bits;$/;"	m	struct:ehci_mxs_port	typeref:typename:uint32_t	file:
pll_div	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^struct pll_div {$/;"	s
pll_div	arch/arm/mach-davinci/cpu.c	/^static unsigned pll_div(volatile void *pllbase, unsigned offset)$/;"	f	typeref:typename:unsigned	file:
pll_div	drivers/clk/rockchip/clk_rk3288.c	/^struct pll_div {$/;"	s	file:
pll_div	drivers/clk/rockchip/clk_rk3399.c	/^struct pll_div {$/;"	s	file:
pll_div2_sel	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pll_div2_sel;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
pll_div2_sel	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pll_div2_sel;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
pll_div_add1	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_add1:$/;"	l
pll_div_add2	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_add2:$/;"	l
pll_div_add3	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_add3:$/;"	l
pll_div_add4	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_add4:$/;"	l
pll_div_add5	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_add5:$/;"	l
pll_div_val3	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_val3:$/;"	l
pll_div_val4	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_val4:$/;"	l
pll_div_val5	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^pll_div_val5:$/;"	l
pll_done	arch/powerpc/cpu/ppc4xx/start.S	/^pll_done:$/;"	l
pll_en_bits	drivers/usb/host/ehci-mxs.c	/^	uint32_t		pll_en_bits;$/;"	m	struct:ehci_mxs_port	typeref:typename:uint32_t	file:
pll_enet	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_enet;		\/* 0x0e0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_enet	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_enet;			\/* offset 0x00e0 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_enet_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_enet_clr;		\/* 0x0e8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_enet_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_enet_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_enet_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_enet_set;		\/* 0x0e4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_enet_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_enet_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_enet_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_enet_tog;		\/* 0x0ec *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_enet_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_enet_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_fbdv_multi_bits	arch/powerpc/cpu/ppc4xx/speed.c	/^static u8 pll_fbdv_multi_bits[] = {$/;"	v	typeref:typename:u8[]	file:
pll_filter_ctl1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	pll_filter_ctl1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
pll_freq_get	arch/arm/mach-keystone/clock.c	/^static unsigned long pll_freq_get(int pll)$/;"	f	typeref:typename:unsigned long	file:
pll_freq_t	board/amcc/makalu/cmd_pll.c	/^} pll_freq_t;$/;"	t	typeref:enum:__anonc3f6b6150103	file:
pll_fwdv_multi_bits	arch/powerpc/cpu/ppc4xx/speed.c	/^static u8 pll_fwdv_multi_bits[] = {$/;"	v	typeref:typename:u8[]	file:
pll_go	include/linux/usb/xhci-omap.h	/^	u32 pll_go;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_init	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void pll_init(void)$/;"	f	typeref:typename:void	file:
pll_init_data	arch/arm/mach-keystone/include/mach/clock.h	/^struct pll_init_data {$/;"	s
pll_is_bypassed	arch/blackfin/include/asm/clock.h	/^# define pll_is_bypassed(/;"	d
pll_lock	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 pll_lock;		\/* 0x200 PLL Lock Time *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_lock	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 pll_lock;$/;"	m	struct:anadig_reg	typeref:typename:u32
pll_lock	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 pll_lock;		\/* 0x200 PLL Lock Time *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_lock_dbg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 pll_lock_dbg;	\/* 0x4c pll lock time debug *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_lock_dbg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 pll_lock_dbg;	\/* 0x4c pll lock time debug *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_m	arch/arm/mach-keystone/include/mach/clock.h	/^	int pll_m;		\/* PLL Multiplier *\/$/;"	m	struct:pll_init_data	typeref:typename:int
pll_m	arch/arm/mach-stm32/stm32f4/clock.c	/^	u8	pll_m;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
pll_m	arch/arm/mach-stm32/stm32f7/clock.c	/^	u8	pll_m;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
pll_m	tools/ublimage.h	/^	uint32_t	pll_m;	\/*$/;"	m	struct:ubl_header	typeref:typename:uint32_t
pll_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pll_misc;		\/* other misc things *\/$/;"	m	struct:clk_pll	typeref:typename:uint
pll_misc	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pll_misc;		\/* other misc things *\/$/;"	m	struct:clk_pll_simple	typeref:typename:uint
pll_mlb	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_mlb;		\/* 0x0d0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_mlb_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_mlb_clr;		\/* 0x0d8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_mlb_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_mlb_set;		\/* 0x0d4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_mlb_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_mlb_tog;		\/* 0x0dc *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_n	arch/arm/mach-stm32/stm32f4/clock.c	/^	u16	pll_n;$/;"	m	struct:pll_psc	typeref:typename:u16	file:
pll_n	arch/arm/mach-stm32/stm32f7/clock.c	/^	u16	pll_n;$/;"	m	struct:pll_psc	typeref:typename:u16	file:
pll_n	tools/ublimage.h	/^	uint32_t	pll_n;	\/*$/;"	m	struct:ubl_header	typeref:typename:uint32_t
pll_name	board/amcc/makalu/cmd_pll.c	/^pll_name[][PLL_NAME_MAX] = {$/;"	v	typeref:typename:const char[][]	file:
pll_num_clkouts	arch/arm/mach-tegra/clock.c	/^static const u8 pll_num_clkouts[] = {$/;"	v	typeref:typename:const u8[]	file:
pll_od	arch/arm/mach-keystone/include/mach/clock.h	/^	int pll_od;		\/* PLL output divider *\/$/;"	m	struct:pll_init_data	typeref:typename:int
pll_out	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pll_out[2];$/;"	m	struct:clk_pll	typeref:typename:uint[2]
pll_out_id	arch/arm/include/asm/arch-tegra114/clock-tables.h	/^enum pll_out_id {$/;"	g
pll_out_id	arch/arm/include/asm/arch-tegra124/clock-tables.h	/^enum pll_out_id {$/;"	g
pll_out_id	arch/arm/include/asm/arch-tegra20/clock-tables.h	/^enum pll_out_id {$/;"	g
pll_out_id	arch/arm/include/asm/arch-tegra210/clock-tables.h	/^enum pll_out_id {$/;"	g
pll_out_id	arch/arm/include/asm/arch-tegra30/clock-tables.h	/^enum pll_out_id {$/;"	g
pll_p	arch/arm/mach-stm32/stm32f4/clock.c	/^	u8	pll_p;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
pll_p	arch/arm/mach-stm32/stm32f7/clock.c	/^	u8	pll_p;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
pll_pa_clk_sel	arch/arm/mach-keystone/clock.c	/^inline void pll_pa_clk_sel(void)$/;"	f	typeref:typename:void
pll_para_config	drivers/clk/rockchip/clk_rk3288.c	/^static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)$/;"	f	typeref:typename:int	file:
pll_para_config	drivers/clk/rockchip/clk_rk3399.c	/^static int pll_para_config(u32 freq_hz, struct pll_div *div)$/;"	f	typeref:typename:int	file:
pll_param	arch/arm/cpu/armv7/mx5/clock.c	/^struct pll_param {$/;"	s	file:
pll_parameter	drivers/usb/host/ehci-tegra.c	/^	const unsigned *pll_parameter;$/;"	m	struct:fdt_usb_controller	typeref:typename:const unsigned *	file:
pll_postdiv	arch/arm/mach-davinci/cpu.c	/^static inline unsigned pll_postdiv(volatile void *pllbase)$/;"	f	typeref:typename:unsigned	file:
pll_prediv	arch/arm/mach-davinci/cpu.c	/^static inline unsigned pll_prediv(volatile void *pllbase)$/;"	f	typeref:typename:unsigned	file:
pll_prog_code_end	arch/powerpc/cpu/mpc5xx/start.S	/^pll_prog_code_end:$/;"	l
pll_prog_code_start	arch/powerpc/cpu/mpc5xx/start.S	/^pll_prog_code_start:$/;"	l
pll_psc	arch/arm/mach-stm32/stm32f4/clock.c	/^struct pll_psc {$/;"	s	file:
pll_psc	arch/arm/mach-stm32/stm32f7/clock.c	/^struct pll_psc {$/;"	s	file:
pll_q	arch/arm/mach-stm32/stm32f4/clock.c	/^	u8	pll_q;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
pll_q	arch/arm/mach-stm32/stm32f7/clock.c	/^	u8	pll_q;$/;"	m	struct:pll_psc	typeref:typename:u8	file:
pll_rate	arch/arm/mach-tegra/clock.c	/^static unsigned pll_rate[CLOCK_ID_COUNT];$/;"	v	typeref:typename:unsigned[]	file:
pll_ref_div	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pll_ref_div:2;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:2
pll_reg_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	pll_reg_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
pll_reg_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	pll_reg_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
pll_reg_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	pll_reg_3;$/;"	m	struct:rk3288_edp	typeref:typename:u32
pll_reg_4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	pll_reg_4;$/;"	m	struct:rk3288_edp	typeref:typename:u32
pll_reg_5	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	pll_reg_5;$/;"	m	struct:rk3288_edp	typeref:typename:u32
pll_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct pll_regs {$/;"	s
pll_relock	include/ddr_spd.h	/^	unsigned char pll_relock;  \/* 46 PLL Relock time *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
pll_relock	include/spd.h	/^	unsigned char pll_relock;  \/* 46 PLL Relock time *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
pll_select	board/amcc/makalu/cmd_pll.c	/^pll_select[][EEPROM_SDSTP_PARAM] = {$/;"	v	typeref:typename:uchar[][]	file:
pll_sigma_delta_val	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static u32 pll_sigma_delta_val(u32 clkout_dco)$/;"	f	typeref:typename:u32	file:
pll_src_bit	arch/arm/mach-exynos/include/mach/clk.h	/^enum pll_src_bit {$/;"	g
pll_ssc_config_1	include/linux/usb/xhci-omap.h	/^	u32 pll_ssc_config_1;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_ssc_config_2	include/linux/usb/xhci-omap.h	/^	u32 pll_ssc_config_2;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_stable0	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll_stable0;	\/* 0x200 PLL stable time 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable0	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll_stable0;	\/* 0x200 PLL stable time 0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll_stable1;	\/* 0x204 PLL stable time 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll_stable1;	\/* 0x204 PLL stable time 1 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable_status	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 pll_stable_status;	\/* 0x20c PLL stable status register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable_status	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 pll_stable_status;  \/* 0x9c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable_status	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 pll_stable_status;	\/* 0x20c PLL stable status register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable_status	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 pll_stable_status;  \/* 0x9c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
pll_stable_time	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned int			pll_stable_time;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned int
pll_status	arch/arm/mach-exynos/include/mach/dp_info.h	/^enum pll_status {$/;"	g
pll_status	include/linux/usb/xhci-omap.h	/^	u32 pll_status;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
pll_status	include/mpc5xxx.h	/^	volatile u32	pll_status;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
pll_sys	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_sys;		\/* 0x000 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_sys_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_sys_clr;		\/* 0x008 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_sys_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_sys_set;		\/* 0x004 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_sys_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_sys_tog;		\/* 0x00c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_sysclk_mhz	arch/arm/mach-davinci/cpu.c	/^static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div)$/;"	f	typeref:typename:unsigned	file:
pll_t	arch/m68k/include/asm/immap_520x.h	/^} pll_t;$/;"	t	typeref:struct:pll_ctrl
pll_t	arch/m68k/include/asm/immap_5227x.h	/^} pll_t;$/;"	t	typeref:struct:pll
pll_t	arch/m68k/include/asm/immap_5235.h	/^} pll_t;$/;"	t	typeref:struct:pll_ctrl
pll_t	arch/m68k/include/asm/immap_5275.h	/^} pll_t;$/;"	t	typeref:struct:pll_ctrl
pll_t	arch/m68k/include/asm/immap_5282.h	/^} pll_t;$/;"	t	typeref:struct:pll_ctrl
pll_t	arch/m68k/include/asm/immap_5301x.h	/^} pll_t;$/;"	t	typeref:struct:pll_ctrl
pll_t	arch/m68k/include/asm/immap_5329.h	/^} pll_t;$/;"	t	typeref:struct:pll_ctrl
pll_t	arch/m68k/include/asm/immap_5441x.h	/^} pll_t;$/;"	t	typeref:struct:pll
pll_t	arch/m68k/include/asm/immap_5445x.h	/^} pll_t;$/;"	t	typeref:struct:pll
pll_type	arch/arm/include/asm/arch-s32v234/clock.h	/^enum pll_type {$/;"	g
pll_video	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_video;		\/* 0x0a0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_video	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video;			\/* offset 0x0130 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_video_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_video_clr;		\/* 0x0a8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_video_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_video_denom	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_video_denom;	\/* 0x0c0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_video_denom	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video_denom;		\/* offset 0x0160 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_video_num	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_video_num;		\/* 0x0b0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_video_num	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video_num;			\/* offset 0x0150 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_video_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_video_set;		\/* 0x0a4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_video_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_video_ss	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video_ss;			\/* offset 0x0140 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_video_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pll_video_tog;		\/* 0x0ac *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
pll_video_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pll_video_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
pll_wait	arch/powerpc/cpu/ppc4xx/start.S	/^pll_wait:$/;"	l
pll_write	arch/powerpc/cpu/ppc4xx/start.S	/^pll_write:$/;"	l
plla	arch/arm/dts/at91sam9260.dtsi	/^				plla: pllack {$/;"	l	label:pmc
plla	arch/arm/dts/at91sam9261.dtsi	/^				plla: pllack {$/;"	l	label:pmc
plla	arch/arm/dts/at91sam9263.dtsi	/^				plla: pllack {$/;"	l	label:pmc
plla	arch/arm/dts/at91sam9g20.dtsi	/^				plla: pllack {$/;"	l	label:pmc
plla	arch/arm/dts/at91sam9g45.dtsi	/^				plla: pllack {$/;"	l	label:pmc
plla	arch/arm/dts/sama5d2.dtsi	/^				plla: pllack@0 {$/;"	l	label:pmc
plla_clk_enable	drivers/clk/at91/clk-plla.c	/^static int plla_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
plla_clk_get_rate	drivers/clk/at91/clk-plla.c	/^static ulong plla_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
plla_clk_match	drivers/clk/at91/clk-plla.c	/^static const struct udevice_id plla_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
plla_clk_ops	drivers/clk/at91/clk-plla.c	/^static struct clk_ops plla_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
plla_clk_probe	drivers/clk/at91/clk-plla.c	/^static int plla_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
plla_rate_hz	arch/arm/include/asm/global_data.h	/^	unsigned long	plla_rate_hz;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
plladiv	arch/arm/dts/at91sam9g45.dtsi	/^				plladiv: plladivck {$/;"	l	label:pmc
plladiv	arch/arm/dts/sama5d2.dtsi	/^				plladiv: plladivck {$/;"	l	label:pmc
pllar	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pllar;		\/* 0x28 PLL A Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pllb	arch/arm/dts/at91sam9260.dtsi	/^				pllb: pllbck {$/;"	l	label:pmc
pllb	arch/arm/dts/at91sam9261.dtsi	/^				pllb: pllbck {$/;"	l	label:pmc
pllb	arch/arm/dts/at91sam9263.dtsi	/^				pllb: pllbck {$/;"	l	label:pmc
pllb	arch/arm/dts/at91sam9g20.dtsi	/^				pllb: pllbck {$/;"	l	label:pmc
pllb_rate_hz	arch/arm/include/asm/global_data.h	/^	unsigned long	pllb_rate_hz;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
pllbr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pllbr;		\/* 0x2C PLL B Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pllc01cr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 pllc01cr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
pllc01stpcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 pllc01stpcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
pllc2cr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 pllc2cr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
pllcfg0	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pllcfg0;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
pllcfg1	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pllcfg1;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
pllcfg2	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pllcfg2;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
pllcfg3	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pllcfg3;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
pllcfg4	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pllcfg4;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
pllcfgr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 pllcfgr;	\/* RCC PLL configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
pllcfgr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 pllcfgr;	\/* RCC PLL configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
pllcgsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} pllcgsr[2];$/;"	m	struct:ccsr_clk	typeref:struct:ccsr_clk::__anon245f04be0308[2]
pllcgsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} pllcgsr[2];$/;"	m	struct:ccsr_clk	typeref:struct:ccsr_clk::__anon58ea331d0308[2]
pllcgsr	arch/powerpc/include/asm/immap_85xx.h	/^	} pllcgsr[12];$/;"	m	struct:ccsr_clk	typeref:struct:ccsr_clk::__anondcd7518a0508[12]
pllcmd	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pllcmd;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
pllcmd	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	pllcmd;		\/* 0x138 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
pllcngsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 pllcngsr;$/;"	m	struct:ccsr_clk::__anon245f04be0308	typeref:typename:u32
pllcngsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 pllcngsr;$/;"	m	struct:ccsr_clk::__anon58ea331d0308	typeref:typename:u32
pllcngsr	arch/powerpc/include/asm/immap_85xx.h	/^		u32 pllcngsr;$/;"	m	struct:ccsr_clk::__anondcd7518a0508	typeref:typename:u32
pllcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 pllcr;		\/* 0x20 PLL control register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pllcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 pllcr;		\/* 0x20 PLL control register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
pllcr	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int pllcr;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
pllcr	arch/m68k/include/asm/immap_5307.h	/^	u8  pllcr;$/;"	m	struct:sim	typeref:typename:u8
pllcr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	pllcr0; \/* PLL Control Register 0 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
pllcr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	pllcr0; \/* PLL Control Register 0 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u32
pllcr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllcr0; \/* PLL Control Register 0 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u32
pllcr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllcr0; \/* PLL Control Register 0 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0908	typeref:typename:u32
pllcr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	pllcr1; \/* PLL Control Register 1 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
pllcr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	pllcr1; \/* PLL Control Register 1 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u32
pllcr1	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllcr1; \/* PLL Control Register 1 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u32
pllcr1	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllcr1; \/* PLL Control Register 1 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0908	typeref:typename:u32
pllcr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	pllcr3;$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
pllcr3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	pllcr3;$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u32
pllcr3	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllcr3;$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u32
pllcr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	pllcr4;$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
pllcr4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	pllcr4;$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u32
pllcr4	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllcr4;$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u32
pllcr5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	pllcr5; \/* 0x018 SerDes PLL1 Control 5 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
pllctl	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pllctl;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
pllctl	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	pllctl;		\/* 0x100 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
pllctl_reg	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pllctl_reg(/;"	d
pllctl_reg_clrbits	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pllctl_reg_clrbits(/;"	d
pllctl_reg_read	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pllctl_reg_read(/;"	d
pllctl_reg_rmw	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pllctl_reg_rmw(/;"	d
pllctl_reg_setbits	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pllctl_reg_setbits(/;"	d
pllctl_reg_write	arch/arm/mach-keystone/include/mach/clock_defs.h	/^#define pllctl_reg_write(/;"	d
pllctl_regs	arch/arm/mach-keystone/include/mach/clock_defs.h	/^static struct pllctl_regs *pllctl_regs[] = {$/;"	v	typeref:struct:pllctl_regs * []
pllctl_regs	arch/arm/mach-keystone/include/mach/clock_defs.h	/^struct pllctl_regs {$/;"	s
pllctrl	arch/arm/dts/keystone.dtsi	/^		pllctrl: pll-controller@02310000 {$/;"	l
pllctrl	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	pllctrl;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
plldgsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	plldgsr;	\/* 0xc20 DDR PLL General Status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
plldgsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	plldgsr;	\/* 0xc20 DDR PLL General Status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
plldgsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plldgsr;	\/* 0xc20 DDR PLL General Status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
plldiv1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv1;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv1	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv1;	\/* 0x118 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv2;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv2	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv2;	\/* 0x11c *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv3	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv3;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv3	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv3;	\/* 0x120 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv4	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv4;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv4	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv4;	\/* 0x160 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv5	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv5;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv5	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv5;	\/* 0x164 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv6	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv6;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv6	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv6;	\/* 0x168 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv7	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	plldiv7;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
plldiv7	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv7;	\/* 0x16C *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv8	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv8;	\/* 0x170 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldiv9	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	plldiv9;	\/* 0x174 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
plldp	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	struct clk_pll_simple plldp;	\/* _PLLDP_BASE, 0x590 _PLLDP_MISC *\/$/;"	m	struct:clk_rst_ctlr	typeref:struct:clk_pll_simple
plldr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plldr;$/;"	m	struct:rio_liodn	typeref:typename:u32
pllecr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 pllecr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
pllgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pllgcr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pllgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pllgcr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pllgcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pllgcr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pllgcr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pllgcr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pllgcr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pllgcr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pllgcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pllgcr;		\/* 0x40 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
plli2scfgr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 plli2scfgr;	\/* RCC PLLI2S configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
plli2scfgr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 plli2scfgr;	\/* RCC PLLI2S configuration *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
pllicpr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	pllicpr;	\/* 0x80 Change Pump Current Register (SAM9) *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
pllloop	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^pllloop:$/;"	l
pllm	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pllm;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
pllm	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	pllm;		\/* 0x110 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
pllm_base	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pllm_base;		\/* the control register *\/$/;"	m	struct:clk_pllm	typeref:typename:uint
pllm_base_divm	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllm_base_divm:5;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:5	file:
pllm_base_divn	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllm_base_divn:10;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:10	file:
pllm_base_divp	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllm_base_divp:3;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:3	file:
pllm_charge_pump_setup_control	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pllm_charge_pump_setup_control;$/;"	m	struct:sdram_params	typeref:typename:u32
pllm_feedback_divider	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pllm_feedback_divider;$/;"	m	struct:sdram_params	typeref:typename:u32
pllm_input_divider	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pllm_input_divider;$/;"	m	struct:sdram_params	typeref:typename:u32
pllm_loop_filter_setup_control	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pllm_loop_filter_setup_control;$/;"	m	struct:sdram_params	typeref:typename:u32
pllm_misc1	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pllm_misc1;	\/* misc1 *\/$/;"	m	struct:clk_pllm	typeref:typename:uint
pllm_misc2	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pllm_misc2;	\/* misc2 *\/$/;"	m	struct:clk_pllm	typeref:typename:uint
pllm_misc_cpcon	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllm_misc_cpcon:4;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:4	file:
pllm_misc_lfcon	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllm_misc_lfcon:4;$/;"	m	struct:scratch2_reg::__anon24552f890408	typeref:typename:u32:4	file:
pllm_out	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint pllm_out;		\/* output control *\/$/;"	m	struct:clk_pllm	typeref:typename:uint
pllm_post_divider	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pllm_post_divider;$/;"	m	struct:sdram_params	typeref:typename:u32
pllm_stable_time	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pllm_stable_time;$/;"	m	struct:sdram_params	typeref:typename:u32
pllm_stable_time	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllm_stable_time:8;$/;"	m	struct:scratch4_reg::__anon24552f890508	typeref:typename:u32:8	file:
pllngsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	} pllngsr[3];$/;"	m	struct:ccsr_clk_cluster_group	typeref:struct:ccsr_clk_cluster_group::__anon245f08ff0308[3]
pllp_valid	arch/arm/mach-tegra/clock.c	/^char pllp_valid = 1;	\/* PLLP is set up correctly *\/$/;"	v	typeref:typename:char
pllpgsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	pllpgsr;	\/* 0xc00 Platform PLL General Status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
pllpgsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	pllpgsr;	\/* 0xc00 Platform PLL General Status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
pllpgsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pllpgsr;	\/* 0xc00 Platform PLL General Status *\/$/;"	m	struct:ccsr_clk	typeref:typename:u32
pllprg	include/fsl_usb.h	/^	u32	pllprg[4];$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32[4]
pllsaicfgr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 pllsaicfgr;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
pllsaicfgr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 pllsaicfgr;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
pllsr2	arch/powerpc/include/asm/immap_85xx.h	/^		u32	pllsr2;	\/* At 0x00c, PLL Status Register 2 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u32
pllss	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pllss;		\/* 0x0C4 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
pllstat	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pllstat;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
pllstat	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	pllstat;	\/* 0x13c *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
pllstatus	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pllstatus;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
plltmr	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	plltmr;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
pllx_base_divm	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pllx_base_divm:5;$/;"	m	struct:scratch3_reg::__anonf37f1db20508	typeref:typename:u32:5
pllx_base_divn	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pllx_base_divn:10;$/;"	m	struct:scratch3_reg::__anonf37f1db20508	typeref:typename:u32:10
pllx_base_divp	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pllx_base_divp:3;$/;"	m	struct:scratch3_reg::__anonf37f1db20508	typeref:typename:u32:3
pllx_base_reg	arch/arm/include/asm/arch-tegra/warmboot.h	/^union pllx_base_reg {$/;"	u
pllx_misc_cpcon	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pllx_misc_cpcon:4;$/;"	m	struct:scratch3_reg::__anonf37f1db20508	typeref:typename:u32:4
pllx_misc_lfcon	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pllx_misc_lfcon:4;$/;"	m	struct:scratch3_reg::__anonf37f1db20508	typeref:typename:u32:4
pllx_misc_reg	arch/arm/include/asm/arch-tegra/warmboot.h	/^union pllx_misc_reg {$/;"	u
pllx_set_iddq	arch/arm/mach-tegra/cpu.c	/^static inline void pllx_set_iddq(void)$/;"	f	typeref:typename:void	file:
pllx_set_rate	arch/arm/mach-tegra/cpu.c	/^int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm,$/;"	f	typeref:typename:int
pllx_stable_time	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 pllx_stable_time:8;$/;"	m	struct:scratch4_reg::__anon24552f890508	typeref:typename:u32:8	file:
plmreqcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plmreqcsr;	\/* Port Link Maintenance Request CSR *\/$/;"	m	struct:rio_lp_serial_port	typeref:typename:u32
plmreqcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	plmreqcsr;	\/* 0xc0140 - Port Link Maintenance Request Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
plmrespcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plmrespcsr;	\/* Port Link Maintenance Response CS *\/$/;"	m	struct:rio_lp_serial_port	typeref:typename:u32
plmrespcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	plmrespcsr;	\/* 0xc0144 - Port Link Maintenance Response Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
plnSizeX	include/video_fb.h	/^    unsigned int plnSizeX;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
plnSizeY	include/video_fb.h	/^    unsigned int plnSizeY;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
plot_logo_or_black	drivers/video/cfb_console.c	/^static void plot_logo_or_black(void *screen, int x, int y, int black)$/;"	f	typeref:typename:void	file:
plpcfg0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 plpcfg0;		\/* 0x198 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
plpcfg0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 plpcfg0;		\/* 0x198 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
plpdir1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plpdir1;	\/* Platform port pin direction 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
plpdir2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plpdir2;	\/* Platform port pin direction 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
plppar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plppar1;	\/* Platform port pin assignment 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
plppar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	plppar2;	\/* Platform port pin assignment 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
plprcr_end	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^plprcr_end:$/;"	l
plprcr_here	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^plprcr_here:$/;"	l
plprcr_loop	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^plprcr_loop:$/;"	l
plprcr_wait	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^plprcr_wait:$/;"	l
plprcr_wait_end	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^plprcr_wait_end:$/;"	l
plprcr_write_866	arch/powerpc/cpu/mpc8xx/plprcr_write.S	/^plprcr_write_866:$/;"	l
pls	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pls;	\/* port link status *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pls	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pls;	\/* port link status *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pls1	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pls1;	\/* port link status1 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pls1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pls1;	\/* port link status1 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pltoccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pltoccsr;	\/* Port Link Time-out CCSR *\/$/;"	m	struct:rio_lp_serial	typeref:typename:u32
pltoccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pltoccsr;	\/* 0xc0120 - Port Link Time-out Control Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pludr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pludr;$/;"	m	struct:rio_liodn	typeref:typename:u32
plug_pending	include/usb/designware_udc.h	/^	u32 plug_pending;$/;"	m	struct:plug_regs	typeref:typename:u32
plug_regs	include/usb/designware_udc.h	/^struct plug_regs {$/;"	s
plug_regs_p	drivers/usb/gadget/designware_udc.c	/^static struct plug_regs *const plug_regs_p =$/;"	v	typeref:struct:plug_regs * const	file:
plug_state	include/usb/designware_udc.h	/^	u32 plug_state;$/;"	m	struct:plug_regs	typeref:typename:u32
plugin	tools/imximage.h	/^	uint32_t plugin;$/;"	m	struct:__anon504a956c0b08	typeref:typename:uint32_t
plugin2	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^plugin2:                .long 0x0$/;"	l
plugin2	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^plugin2:                .long 0x0$/;"	l
plugin_code	tools/imximage.h	/^		char plugin_code[MAX_PLUGIN_CODE_SIZE];$/;"	m	union:__anon504a956c0d08::__anon504a956c0e0a	typeref:typename:char[]
plugin_image	tools/imximage.c	/^static uint32_t plugin_image;$/;"	v	typeref:typename:uint32_t	file:
plugin_start	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^plugin_start:$/;"	l
plugin_start	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^plugin_start:$/;"	l
plut	drivers/video/fsl_diu_fb.c	/^	__be32 plut;$/;"	m	struct:diu	typeref:typename:__be32	file:
pm	arch/arm/include/asm/arch-omap3/cpu.h	/^struct pm {$/;"	s
pm	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 pm;		\/* 0x28 power management *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
pm	arch/arm/include/asm/arch/p2wi.h	/^	u32 pm;		\/* 0x28 power management *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
pm	arch/m68k/include/asm/immap_5441x.h	/^typedef struct pm {$/;"	s
pm	drivers/spi/fsl_espi.c	/^	unsigned int	pm;$/;"	m	struct:fsl_spi_slave	typeref:typename:unsigned int	file:
pm	drivers/video/ipu_regs.h	/^	u32 pm;$/;"	m	struct:ipu_cm	typeref:typename:u32
pm0_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pm0_ctrl;			\/* _COM_PM0_CONTROL_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pm0_duty_cycle	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pm0_duty_cycle;		\/* _COM_PM0_DUTY_CYCLE_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pm0mr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm0mr0;		\/* 0x41350 - Performance monitor 0 mask register 0  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm0mr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm0mr1;		\/* 0x41360 - Performance monitor 0 mask register 1  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm1_cnt	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint32_t pm1_cnt;$/;"	m	struct:chipset_power_state	typeref:typename:uint32_t
pm1_cnt_len	arch/x86/include/asm/acpi_table.h	/^	u8 pm1_cnt_len;$/;"	m	struct:acpi_fadt	typeref:typename:u8
pm1_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pm1_ctrl;			\/* _COM_PM1_CONTROL_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pm1_duty_cycle	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pm1_duty_cycle;		\/* _COM_PM1_DUTY_CYCLE_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
pm1_en	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t pm1_en;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
pm1_evt_len	arch/x86/include/asm/acpi_table.h	/^	u8 pm1_evt_len;$/;"	m	struct:acpi_fadt	typeref:typename:u8
pm1_sts	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t pm1_sts;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
pm1a_cnt_blk	arch/x86/include/asm/acpi_table.h	/^	u32 pm1a_cnt_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
pm1a_evt_blk	arch/x86/include/asm/acpi_table.h	/^	u32 pm1a_evt_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
pm1b_cnt_blk	arch/x86/include/asm/acpi_table.h	/^	u32 pm1b_cnt_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
pm1b_evt_blk	arch/x86/include/asm/acpi_table.h	/^	u32 pm1b_evt_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
pm1mr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm1mr0;		\/* 0x41370 - Performance monitor 1 mask register 0  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm1mr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm1mr1;		\/* 0x41380 - Performance monitor 1 mask register 1  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm2_cnt_blk	arch/x86/include/asm/acpi_table.h	/^	u32 pm2_cnt_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
pm2_cnt_len	arch/x86/include/asm/acpi_table.h	/^	u8 pm2_cnt_len;$/;"	m	struct:acpi_fadt	typeref:typename:u8
pm2mr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm2mr0;		\/* 0x41390 - Performance monitor 2 mask register 0  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm2mr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm2mr1;		\/* 0x413A0 - Performance monitor 2 mask register 1  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm3mr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm3mr0;		\/* 0x413B0 - Performance monitor 3 mask register 0  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm3mr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pm3mr1;		\/* 0x413C0 - Performance monitor 3 mask register 1  *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
pm8916_gpio_bank	drivers/gpio/pm8916_gpio.c	/^struct pm8916_gpio_bank {$/;"	s	file:
pm8916_gpio_direction_input	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pm8916_gpio_direction_output	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
pm8916_gpio_get_function	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pm8916_gpio_get_value	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pm8916_gpio_ids	drivers/gpio/pm8916_gpio.c	/^static const struct udevice_id pm8916_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pm8916_gpio_ofdata_to_platdata	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pm8916_gpio_ops	drivers/gpio/pm8916_gpio.c	/^static const struct dm_gpio_ops pm8916_gpio_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
pm8916_gpio_probe	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pm8916_gpio_set_direction	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
pm8916_gpio_set_value	drivers/gpio/pm8916_gpio.c	/^static int pm8916_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
pm8916_gpios	arch/arm/dts/dragonboard410c.dts	/^				pm8916_gpios: pm8916_gpios@c000 {$/;"	l	label:pmic0
pm8916_ids	drivers/power/pmic/pm8916.c	/^static const struct udevice_id pm8916_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pm8916_ops	drivers/power/pmic/pm8916.c	/^static struct dm_pmic_ops pm8916_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
pm8916_pon	arch/arm/dts/dragonboard410c.dts	/^				pm8916_pon: pm8916_pon@800 {$/;"	l	label:pmic0
pm8916_priv	drivers/power/pmic/pm8916.c	/^struct pm8916_priv {$/;"	s	file:
pm8916_probe	drivers/power/pmic/pm8916.c	/^static int pm8916_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pm8916_read	drivers/power/pmic/pm8916.c	/^static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
pm8916_reg_count	drivers/power/pmic/pm8916.c	/^static int pm8916_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pm8916_write	drivers/power/pmic/pm8916.c	/^static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
pm8941_pwrkey_get_function	drivers/gpio/pm8916_gpio.c	/^static int pm8941_pwrkey_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pm8941_pwrkey_get_value	drivers/gpio/pm8916_gpio.c	/^static int pm8941_pwrkey_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
pm8941_pwrkey_ids	drivers/gpio/pm8916_gpio.c	/^static const struct udevice_id pm8941_pwrkey_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pm8941_pwrkey_ofdata_to_platdata	drivers/gpio/pm8916_gpio.c	/^static int pm8941_pwrkey_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pm8941_pwrkey_ops	drivers/gpio/pm8916_gpio.c	/^static const struct dm_gpio_ops pm8941_pwrkey_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
pm8941_pwrkey_probe	drivers/gpio/pm8916_gpio.c	/^static int pm8941_pwrkey_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pm9261_dm9000_hw_init	board/ronetix/pm9261/pm9261.c	/^static void pm9261_dm9000_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9261_lcd_hw_init	board/ronetix/pm9261/pm9261.c	/^static void pm9261_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9261_nand_hw_init	board/ronetix/pm9261/pm9261.c	/^static void pm9261_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9263_lcd_hw_init	board/ronetix/pm9263/pm9263.c	/^static void pm9263_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9263_lcd_hw_psram_init	board/ronetix/pm9263/pm9263.c	/^static int pm9263_lcd_hw_psram_init(void)$/;"	f	typeref:typename:int	file:
pm9263_macb_hw_init	board/ronetix/pm9263/pm9263.c	/^static void pm9263_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9263_nand_hw_init	board/ronetix/pm9263/pm9263.c	/^static void pm9263_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9g45_macb_hw_init	board/ronetix/pm9g45/pm9g45.c	/^static void pm9g45_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
pm9g45_nand_hw_init	board/ronetix/pm9g45/pm9g45.c	/^static void pm9g45_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
pm_command	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pm_command;	\/* 0x02c - PCIE PM Command register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pm_command	arch/powerpc/include/asm/immap_86xx.h	/^	uint    pm_command;	\/* 0x802c - PEX PM Command register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pm_ctrl	arch/arm/dts/hi6220.dtsi	/^		pm_ctrl: pm_ctrl@f7032000 {$/;"	l
pm_ip_rev_1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pm_ip_rev_1;	\/* PME IP Block Revision Reg 1*\/$/;"	m	struct:ccsr_pme	typeref:typename:u32
pm_ip_rev_2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pm_ip_rev_2;	\/* PME IP Block Revision Reg 1*\/$/;"	m	struct:ccsr_pme	typeref:typename:u32
pm_port	include/fis.h	/^	u8 pm_port;$/;"	m	struct:sata_fis_data	typeref:typename:u8
pm_port_c	include/fis.h	/^	u8 pm_port_c;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
pm_port_c	include/fis.h	/^	u8 pm_port_c;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
pm_port_dir_int	include/fis.h	/^	u8 pm_port_dir_int;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
pm_port_dir_int_act	include/fis.h	/^	u8 pm_port_dir_int_act;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u8
pm_port_i	include/fis.h	/^	u8 pm_port_i;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
pm_runtime_enable	include/linux/compat.h	/^#define pm_runtime_enable(/;"	d
pm_runtime_get_sync	include/linux/compat.h	/^#define pm_runtime_get_sync(/;"	d
pm_runtime_put	include/linux/compat.h	/^#define pm_runtime_put(/;"	d
pm_runtime_put_sync	include/linux/compat.h	/^#define pm_runtime_put_sync(/;"	d
pm_runtime_set_autosuspend_delay	include/linux/compat.h	/^#define pm_runtime_set_autosuspend_delay(/;"	d
pm_runtime_use_autosuspend	include/linux/compat.h	/^#define pm_runtime_use_autosuspend(/;"	d
pm_t	arch/m68k/include/asm/immap_5441x.h	/^} pm_t;$/;"	t	typeref:struct:pm
pm_tmr_blk	arch/x86/include/asm/acpi_table.h	/^	u32 pm_tmr_blk;$/;"	m	struct:acpi_fadt	typeref:typename:u32
pm_tmr_len	arch/x86/include/asm/acpi_table.h	/^	u8 pm_tmr_len;$/;"	m	struct:acpi_fadt	typeref:typename:u8
pmap	arch/powerpc/include/asm/mmu.h	/^	pte	**pmap;		\/* Two-level page-map structure *\/$/;"	m	struct:_MMU_context	typeref:typename:pte **
pmask0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask0;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask1;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask10;	\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask11;	\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask12;	\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask13;	\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask14;	\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask15;	\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask2;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask3;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask4;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask5;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask6;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask7;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask8;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmask9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmask9;		\/* Pattern Mask *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmbase	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t pmbase;$/;"	m	struct:pei_data	typeref:typename:uint32_t
pmbase	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t pmbase;$/;"	m	struct:pei_data	typeref:typename:uint32_t
pmbh0csr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmbh0csr;	\/* Port Maintenance Block Header 0 CSR *\/$/;"	m	struct:rio_lp_serial	typeref:typename:u32
pmbh0csr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pmbh0csr;	\/* 0xc0100 - 8\/16 LP-LVDS Port Maintenance Block Header 0 Command and Status R/;"	m	struct:ccsr_rio	typeref:typename:uint
pmbr_part_valid	disk/part_efi.c	/^static int pmbr_part_valid(struct partition *part)$/;"	f	typeref:typename:int	file:
pmbus_top_arbiter	drivers/net/mvgbe.h	/^	u32 pmbus_top_arbiter;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pmc	arch/arm/dts/at91sam9260.dtsi	/^			pmc: pmc@fffffc00 {$/;"	l
pmc	arch/arm/dts/at91sam9261.dtsi	/^			pmc: pmc@fffffc00 {$/;"	l
pmc	arch/arm/dts/at91sam9263.dtsi	/^			pmc: pmc@fffffc00 {$/;"	l
pmc	arch/arm/dts/at91sam9g20.dtsi	/^			pmc: pmc@fffffc00 {$/;"	l
pmc	arch/arm/dts/at91sam9g45.dtsi	/^			pmc: pmc@fffffc00 {$/;"	l
pmc	arch/arm/dts/sama5d2.dtsi	/^			pmc: pmc@f0014000 {$/;"	l
pmc	arch/arm/dts/tegra210.dtsi	/^	pmc: pmc@7000e400 {$/;"	l
pmc	arch/powerpc/include/asm/immap_512x.h	/^	pmc512x_t		pmc;		\/* Power Management Control Module *\/$/;"	m	struct:immap	typeref:typename:pmc512x_t
pmc	arch/powerpc/include/asm/immap_83xx.h	/^	pmc83xx_t		pmc;		\/* Power Management Control Module *\/$/;"	m	struct:immap	typeref:typename:pmc83xx_t
pmc405de_cpld	board/esd/pmc405de/pmc405de.c	/^struct pmc405de_cpld {$/;"	s	file:
pmc440_fifo_s	board/esd/pmc440/pmc440.h	/^struct pmc440_fifo_s {$/;"	s
pmc440_fpga_fns	board/esd/pmc440/fpga.c	/^xilinx_spartan3_slave_parallel_fns pmc440_fpga_fns = {$/;"	v	typeref:typename:xilinx_spartan3_slave_parallel_fns
pmc440_fpga_fns	board/esd/pmc440/fpga.c	/^xilinx_spartan3_slave_serial_fns pmc440_fpga_fns = {$/;"	v	typeref:typename:xilinx_spartan3_slave_serial_fns
pmc440_fpga_s	board/esd/pmc440/pmc440.h	/^struct pmc440_fpga_s {$/;"	s
pmc440_fpga_t	board/esd/pmc440/pmc440.h	/^typedef struct pmc440_fpga_s pmc440_fpga_t;$/;"	t	typeref:struct:pmc440_fpga_s
pmc440_init_fpga	board/esd/pmc440/fpga.c	/^int pmc440_init_fpga(void)$/;"	f	typeref:typename:int
pmc440_setup_ksz9031	board/esd/pmc440/pmc440.c	/^static int pmc440_setup_ksz9031(char *devname, int phy_addr)$/;"	f	typeref:typename:int	file:
pmc440_setup_vsc8601	board/esd/pmc440/pmc440.c	/^static int pmc440_setup_vsc8601(char *devname, int phy_addr,$/;"	f	typeref:typename:int	file:
pmc512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct pmc512x {$/;"	s
pmc512x_t	arch/powerpc/include/asm/immap_512x.h	/^} pmc512x_t;$/;"	t	typeref:struct:pmc512x
pmc83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct pmc83xx {$/;"	s
pmc83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} pmc83xx_t;$/;"	t	typeref:struct:pmc83xx
pmc_auto_wake2_lvl_mask	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_auto_wake2_lvl_mask;	\/* _AUTO_WAKE2_LVL_MASK_0, offset 170 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_auto_wake_lvl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_auto_wake_lvl;		\/* _AUTO_WAKE_LVL_0, offset D8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_auto_wake_lvl_mask	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_auto_wake_lvl_mask;	\/* _AUTO_WAKE_LVL_MASK_0, offset DC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_base	drivers/video/tegra124/sor.c	/^	void *pmc_base;$/;"	m	struct:tegra_dc_sor_data	typeref:typename:void *	file:
pmc_blink_timer	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_blink_timer;		\/* _BLINK_TIMER_0, offset 40 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_bo_mirror0	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_bo_mirror0;		\/* _BOUNDOUT_MIRROR0_0, offset 148 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_bo_mirror1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_bo_mirror1;		\/* _BOUNDOUT_MIRROR1_0, offset 14C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_bo_mirror2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_bo_mirror2;		\/* _BOUNDOUT_MIRROR2_0, offset 150 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_bo_mirror_access	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_bo_mirror_access;	\/* _BOUNDOUT_MIRROR_ACCESS_0, off158 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_clamp_status	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_clamp_status;		\/* _CLAMP_STATUS_0, offset 2C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_clk_out_cntrl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_clk_out_cntrl;		\/* _CLK_OUT_CNTRL_0, offset 1A8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_cntrl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_cntrl;			\/* _CNTRL_0, offset 00 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_cntrl2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_cntrl2;		\/* _CNTRL2_0, offset 440 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_cpu_vsense_override	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_cpu_vsense_override;	\/* _CPU_VSENSE_OVERRIDE_0, offset 2B8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_cpupwrgood_timer	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_cpupwrgood_timer;	\/* _CPUPWRGOOD_TIMER_0, offset C8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_cpupwroff_timer	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_cpupwroff_timer;	\/* _CPUPWROFF_TIMER_0, offset CC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_crypto_op	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_crypto_op;		\/* _CRYPTO_OP__0, offset F4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_ctlr	arch/arm/include/asm/arch-tegra/pmc.h	/^struct pmc_ctlr {$/;"	s
pmc_ddr_cfg	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_ddr_cfg;		\/* _DDR_CFG_0, offset 1D0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_ddr_pwr	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_ddr_pwr;		\/* _DDR_PWR_0, offset E8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_ddr_pwr	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 pmc_ddr_pwr;$/;"	m	struct:sdram_params	typeref:typename:u32
pmc_dpd_enable	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_dpd_enable;		\/* _DPD_PADS_ENABLE_0, offset 24 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_dpd_pads_oride	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_dpd_pads_oride;	\/* _DPD_PADS_ORIDE_0, offset 1C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_dpd_sample	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_dpd_sample;		\/* _DPD_PADS_SAMPLE_0, offset 20 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_dsi_sel_dpd	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_dsi_sel_dpd;		\/* _DSI_SEL_DPD_0, offset 1E8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_e_no_vttgen	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_e_no_vttgen;		\/* _E_NO_VTTGEN_0, offset 1D4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_gate	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_gate;			\/* _GATE_0, offset 15C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_glb_amap_cfg	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_glb_amap_cfg;		\/* _GLB_AMAP_CFG_0, offset 2BC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_io_dpd2_req	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_io_dpd2_req;		\/* _IO_DPD2_REQ_0, offset 1C0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_io_dpd2_stat	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_io_dpd2_stat;		\/* _IO_DPD2_STATUS_0, offset 1C4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_io_dpd3_req	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_io_dpd3_req;		\/* _IO_DPD3_REQ_0, offset 45c *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_io_dpd3_stat	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_io_dpd3_stat;		\/* _IO_DPD3_STATUS_0, offset 460 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_io_dpd_req	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_io_dpd_req;		\/* _IO_DPD_REQ_0, offset 1B8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_io_dpd_stat	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_io_dpd_stat;		\/* _IO_DPD_STATUS_0, offset 1BC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_no_iopower	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_no_iopower;		\/* _NO_IOPOWER_0, offset 44 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_osc_edpd_over	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_osc_edpd_over;		\/* _OSC_EDPD_OVER_0, offset 1A4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pcx_edpd_cntrl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pcx_edpd_cntrl;	\/* _PCX_EDPD_CNTRL_0, offset 1A0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pg_mask	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pg_mask;		\/* _PG_MASK_0, offset D0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pg_mask2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pg_mask2;		\/* _PG_MASK_2_0, offset 174 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pg_mask_1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pg_mask_1;		\/* _PG_MASK_1_0, offset D4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pg_mask_ce1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pg_mask_ce1;		\/* _PG_MASK_CE1_0, offset 178 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pg_mask_ce2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pg_mask_ce2;		\/* _PG_MASK_CE2_0, offset 17C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pg_mask_ce3	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pg_mask_ce3;		\/* _PG_MASK_CE3_0, offset 180 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_platdata	drivers/clk/at91/pmc.h	/^struct pmc_platdata {$/;"	s
pmc_pllm_wb0_override2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pllm_wb0_override2;	\/* _PLLM_WB0_OVERRIDE2, offset 2B0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pllm_wb0_ovrride_frq	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pllm_wb0_ovrride_frq;	\/* _PLLM_WB0_OVERRIDE_FREQ_0, off 1DC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pllp_wb0_override	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pllp_wb0_override;	\/* _PLLP_WB0_OVERRIDE_0, offset F8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pmc_swrst	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pmc_swrst;		\/* _PMC_SWRST_0, offset 08 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_por_dpd_ctrl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_por_dpd_ctrl;		\/* _POR_DPD_CTRL_0, offset 264 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwr_det	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwr_det;		\/* _PWR_DET_0, offset 48 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwr_det_latch	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwr_det_latch;		\/* _PWR_DET_LATCH_0, offset 4C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwr_det_val	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwr_det_val;		\/* _PWR_DET_VAL_0, offset E4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_status	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_status;	\/* _PWRGATE_STATUS_0, offset 38 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce0	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce0;	\/* _PWRGATE_TIMER_CE_0_0, offset 184 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce1;	\/* _PWRGATE_TIMER_CE_1_0, offset 188 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce2;	\/* _PWRGATE_TIMER_CE_2_0, offset 18C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce3	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce3;	\/* _PWRGATE_TIMER_CE_3_0, offset 190 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce4	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce4;	\/* _PWRGATE_TIMER_CE_4_0, offset 194 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce5	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce5;	\/* _PWRGATE_TIMER_CE_5_0, offset 198 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_ce6	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_ce6;	\/* _PWRGATE_TIMER_CE_6_0, offset 19C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_mult	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_mult;	\/* _PWRGATE_TIMER_MULT_0, offset 1E4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_off	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_off;	\/* _PWRGATE_TIMER_OFF_0, offset 28 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_timer_on	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_timer_on;	\/* _PWRGATE_TIMER_ON_0, offset 2C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgate_toggle	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgate_toggle;	\/* _PWRGATE_TOGGLE_0, offset 30 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_pwrgood_timer	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_pwrgood_timer;		\/* _PWRGOOD_TIMER_0, offset 3C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_remove_clamping	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_remove_clamping;	\/* _REMOVE_CLAMPING_CMD_0, offset 34 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_reserved0	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_reserved0;		\/* _RESERVED, offset 1D8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_reserved1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_reserved1[52];		\/* RESERVED: 370 ~ 43C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint[52]
pmc_reserved2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_reserved2[6];		\/* RESERVED: 444 ~ 458 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint[6]
pmc_reserved3	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_reserved3[102];	\/* RESERVED: 468 ~ 5FC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint[102]
pmc_reset_status	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_reset_status;		\/* _RTS_STATUS_0, offset 1B4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sata_pwrgate	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sata_pwrgate;		\/* _SATA_PWRGT_0, offset 1AC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch0	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch0;		\/* _SCRATCH0_0, offset 50 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch0_eco	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch0_eco;		\/* _SCRATCH0_ECO_0, offset 260 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch1;		\/* _SCRATCH1_0, offset 54 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch10	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch10;		\/* _SCRATCH10_0, offset 78 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch100	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch100;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch101	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch101;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch102	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch102;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch103	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch103;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch104	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch104;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch105	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch105;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch106	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch106;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch107	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch107;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch108	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch108;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch109	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch109;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch11	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch11;		\/* _SCRATCH11_0, offset 7C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch110	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch110;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch111	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch111;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch112	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch112;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch113	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch113;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch114	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch114;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch115	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch115;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch116	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch116;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch117	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch117;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch118	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch118;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch119	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch119;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch12	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch12;		\/* _SCRATCH12_0, offset 80 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch13	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch13;		\/* _SCRATCH13_0, offset 84 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch14	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch14;		\/* _SCRATCH14_0, offset 88 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch15	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch15;		\/* _SCRATCH15_0, offset 8C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch16	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch16;		\/* _SCRATCH16_0, offset 90 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch17	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch17;		\/* _SCRATCH17_0, offset 94 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch18	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch18;		\/* _SCRATCH18_0, offset 98 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch19	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch19;		\/* _SCRATCH19_0, offset 9C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch1_eco	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch1_eco;	\/* offset 700 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch2;		\/* _SCRATCH2_0, offset 58 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch20	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch20;		\/* _SCRATCH20_0, offset A0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch21	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch21;		\/* _SCRATCH21_0, offset A4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch22	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch22;		\/* _SCRATCH22_0, offset A8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch23	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch23;		\/* _SCRATCH23_0, offset AC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch24	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch24;		\/* _SCRATCH24_0, offset FC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch25	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch25;		\/* _SCRATCH24_0, offset 100 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch26	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch26;		\/* _SCRATCH24_0, offset 104 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch27	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch27;		\/* _SCRATCH24_0, offset 108 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch28	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch28;		\/* _SCRATCH24_0, offset 10C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch29	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch29;		\/* _SCRATCH24_0, offset 110 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch2_eco	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch2_eco;		\/* _SCRATCH2_ECO_0, offset 268 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch3	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch3;		\/* _SCRATCH3_0, offset 5C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch30	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch30;		\/* _SCRATCH24_0, offset 114 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch31	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch31;		\/* _SCRATCH24_0, offset 118 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch32	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch32;		\/* _SCRATCH24_0, offset 11C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch33	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch33;		\/* _SCRATCH24_0, offset 120 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch34	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch34;		\/* _SCRATCH24_0, offset 124 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch35	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch35;		\/* _SCRATCH24_0, offset 128 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch36	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch36;		\/* _SCRATCH24_0, offset 12C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch37	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch37;		\/* _SCRATCH24_0, offset 130 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch38	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch38;		\/* _SCRATCH24_0, offset 134 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch39	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch39;		\/* _SCRATCH24_0, offset 138 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch4	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch4;		\/* _SCRATCH4_0, offset 60 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch40	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch40;		\/* _SCRATCH24_0, offset 13C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch41	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch41;		\/* _SCRATCH24_0, offset 140 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch42	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch42;		\/* _SCRATCH24_0, offset 144 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch43	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch43;		\/* _SCRATCH43_0, offset 22C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch44	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch44;		\/* _SCRATCH44_0, offset 230 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch45	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch45;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch46	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch46;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch47	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch47;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch48	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch48;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch49	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch49;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch5	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch5;		\/* _SCRATCH5_0, offset 64 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch50	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch50;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch51	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch51;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch52	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch52;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch53	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch53;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch54	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch54;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch55	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch55;		\/* _SCRATCH55_0, offset 25C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch56	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch56;		\/* _SCRATCH56_0, offset 600 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch57	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch57;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch58	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch58;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch59	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch59;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch6	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch6;		\/* _SCRATCH6_0, offset 68 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch60	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch60;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch61	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch61;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch62	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch62;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch63	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch63;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch64	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch64;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch65	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch65;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch66	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch66;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch67	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch67;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch68	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch68;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch69	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch69;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch7	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch7;		\/* _SCRATCH7_0, offset 6C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch70	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch70;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch71	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch71;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch72	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch72;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch73	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch73;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch74	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch74;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch75	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch75;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch76	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch76;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch77	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch77;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch78	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch78;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch79	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch79;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch8	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch8;		\/* _SCRATCH8_0, offset 70 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch80	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch80;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch81	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch81;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch82	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch82;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch83	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch83;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch84	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch84;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch85	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch85;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch86	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch86;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch87	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch87;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch88	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch88;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch89	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch89;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch9	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch9;		\/* _SCRATCH9_0, offset 74 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch90	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch90;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch91	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch91;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch92	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch92;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch93	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch93;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch94	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch94;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch95	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch95;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch96	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch96;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch97	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch97;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch98	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch98;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_scratch99	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_scratch99;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sec_disable	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sec_disable;		\/* _SEC_DISABLE_0, offset 04 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sec_disable2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sec_disable2;		\/* _SEC_DISALBE2, offset 2C4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch0	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch0;	\/* _SECURE_SCRATCH0_0, offset B0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch1;	\/* _SECURE_SCRATCH1_0, offset B4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch10	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch10;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch11	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch11;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch12	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch12;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch13	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch13;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch14	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch14;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch15	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch15;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch16	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch16;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch17	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch17;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch18	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch18;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch19	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch19;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch2	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch2;	\/* _SECURE_SCRATCH2_0, offset B8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch20	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch20;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch21	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch21;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch22	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch22;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch23	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch23;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch24	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch24;	\/* _SECURE_SCRATCH24_0, offset 340 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch25	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch25;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch26	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch26;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch27	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch27;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch28	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch28;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch29	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch29;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch3	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch3;	\/* _SECURE_SCRATCH3_0, offset BC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch30	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch30;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch31	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch31;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch32	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch32;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch33	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch33;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch34	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch34;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch35	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch35;	\/* _SECURE_SCRATCH35_0, offset 36C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch4	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch4;	\/* _SECURE_SCRATCH4_0, offset C0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch5	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch5;	\/* _SECURE_SCRATCH5_0, offset C4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch6	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch6;	\/* _SECURE_SCRATCH6_0, offset 224 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch7	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch7;	\/* _SECURE_SCRATCH7_0, offset 228 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch8	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch8;	\/* _SECURE_SCRATCH8_0, offset 300 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_secure_scratch9	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_secure_scratch9;$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sel_dpd_tim	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sel_dpd_tim;		\/* _SEL_DPD_TIM_0, offset 1C8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sensor_ctrl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sensor_ctrl;		\/* _SENSOR_CTRL_0, offset 1B0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sticky_bits	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sticky_bits;		\/* _STICKY_BITS_0, offset 2C0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_strap_opt_a	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_strap_opt_a;		\/* _STRAPPING_OPT_A_0, offset 464 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sw_wake2_stat	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sw_wake2_stat;		\/* _SW_WAKE2_STATUS_0, offset 16C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sw_wake_status	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sw_wake_status;	\/* _SW_WAKE_STATUS_0, offset 18 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_sys_33v_en	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_sys_33v_en;		\/* _SYS_33V_EN_0, offset 154 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_test_pwrgate	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_test_pwrgate;		\/* _TEST_PWRGATE_0, offset 1E0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_todo_0	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_todo_0[9];		\/* offset 200-220 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint[9]
pmc_todo_1	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_todo_1[17];		\/* TODO: 26C ~ 2AC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint[17]
pmc_todo_3	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_todo_3[13];		\/* TODO: 2CC ~ 2FC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint[13]
pmc_tsc_mult	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_tsc_mult;		\/* _TSC_MULT_0, offset 2B4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_usb_ao	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_usb_ao;		\/* _USB_AO_0, offset F0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_usb_debounce_del	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_usb_debounce_del;	\/* _USB_DEBOUNCE_DEL_0, offset EC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_utmip_pad_cfg	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_utmip_pad_cfg;		\/* _UTMIP_PAD_CFG_0, offset 1F4 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_utmip_term_pad_cfg	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_utmip_term_pad_cfg;	\/* _UTMIP_TERM_PAD_CFG_0, offset 1F8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_utmip_uhsic_saved_st	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_utmip_uhsic_saved_st;  \/* _UTMIP_UHSIC_SAVED_STATE_0, off1F0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_utmip_uhsic_sleep_cfg	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_utmip_uhsic_sleep_cfg;	\/* _UTMIP_UHSIC_SLEEP_CFG_0, off 1FC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_utmip_uhsic_triggers	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_utmip_uhsic_triggers;	\/* _UTMIP_UHSIC_TRIGGERS_0, off 1EC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_vddp_sel	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_vddp_sel;		\/* _VDDP_SEL_0, offset 1CC *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake2_lvl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake2_lvl;		\/* _WAKE2_LVL_0,  offset 164 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake2_mask	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake2_mask;		\/* _WAKE2_MASK_0, offset 160 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake2_stat	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake2_stat;		\/* _WAKE2_STATUS_0, offset 168 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake_delay	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake_delay;		\/* _WAKE_DELAY_0, offset E0 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake_lvl	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake_lvl;		\/* _WAKE_LVL_0, offset 10 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake_mask	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake_mask;		\/* _WAKE_MASK_0, offset 0C *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_wake_status	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_wake_status;		\/* _WAKE_STATUS_0, offset 14 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmc_weak_bias	arch/arm/include/asm/arch-tegra/pmc.h	/^	uint pmc_weak_bias;		\/* _WEAK_BIAS_0, offset 2C8 *\/$/;"	m	struct:pmc_ctlr	typeref:typename:uint
pmccr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pmccr;		\/* PMC Configuration Register *\/$/;"	m	struct:pmc83xx	typeref:typename:u32
pmccr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pmccr1;		\/* PMC Configuration Register 1 *\/$/;"	m	struct:pmc83xx	typeref:typename:u32
pmccr2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pmccr2;		\/* PMC Configuration Register 2 *\/$/;"	m	struct:pmc83xx	typeref:typename:u32
pmcer	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pmcer;		\/* PMC Event Register *\/$/;"	m	struct:pmc83xx	typeref:typename:u32
pmcintecr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pmcintecr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pmcintlecr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pmcintlecr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pmcintsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pmcintsr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
pmcmr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pmcmr;		\/* PMC Mask Register *\/$/;"	m	struct:pmc83xx	typeref:typename:u32
pmcnt0_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt0_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
pmcnt0_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt0_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt0_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt0_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
pmcnt0_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt0_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt1_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt1_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
pmcnt1_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt1_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt1_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt1_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
pmcnt1_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt1_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt2_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt2_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
pmcnt2_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt2_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt2_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt2_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
pmcnt2_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt2_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt3_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt3_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
pmcnt3_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt3_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcnt3_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt3_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
pmcnt3_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmcnt3_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 pmcr;			\/* Performance Monitor Control *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
pmcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pmcr;			\/* Performance Monitor Control *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
pmcr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pmcr;$/;"	m	struct:system_control_regs	typeref:typename:u32
pmcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 pmcr;$/;"	m	struct:ios512x	typeref:typename:u32
pmcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pmcr;$/;"	m	struct:ios83xx	typeref:typename:u32
pmcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pmcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pmcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pmcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pmcr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 pmcr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
pmcr0	arch/m68k/include/asm/immap_5441x.h	/^	u8 pmcr0;$/;"	m	struct:pm	typeref:typename:u8
pmcr1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 pmcr1;$/;"	m	struct:clock_control_regs	typeref:typename:u32
pmcr1	arch/m68k/include/asm/immap_5441x.h	/^	u8 pmcr1;$/;"	m	struct:pm	typeref:typename:u8
pmcs	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic pmcs; \/* 0x80 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
pmd0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd0;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd1;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd10;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd11	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd11;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd12	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd12;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd13	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd13;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd14	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd14;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd15	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd15;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd2;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd3;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd4;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd5;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd6;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd7;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd8;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmd9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmd9;		\/* Pattern Match Data *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
pmdr	arch/m68k/include/asm/immap_5329.h	/^	u8 pmdr;		\/* 0x08 Modulation Divider Register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
pmdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pmdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pmdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pmdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pme_enable	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t pme_enable:1;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t:1
pme_msg_det	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pme_msg_det;	\/* 0x020 - PCIE PME & message detect register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pme_msg_det	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pme_msg_det;	\/* 0x8020 - PEX PME & message detect register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pme_msg_dis	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pme_msg_dis;	\/* 0x024 - PCIE PME & message disable register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pme_msg_dis	arch/powerpc/include/asm/immap_86xx.h	/^	uint    pme_msg_dis;	\/* 0x8028 - PEX PME & message disable register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pme_msg_int_en	arch/powerpc/include/asm/fsl_pci.h	/^	u32	pme_msg_int_en;	\/* 0x028 - PCIE PME & message interrupt enable register *\/$/;"	m	struct:ccsr_pci	typeref:typename:u32
pme_msg_int_en	arch/powerpc/include/asm/immap_86xx.h	/^	uint    pme_msg_int_en;	\/* 0x8024 - PEX PME & message interrupt enable register *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
pmecc	drivers/mtd/nand/atmel_nand.c	/^	struct pmecc_regs __iomem *pmecc;$/;"	m	struct:atmel_nand_host	typeref:struct:pmecc_regs __iomem *	file:
pmecc	tools/atmelimage.c	/^} pmecc;$/;"	v	typeref:struct:pmecc_config
pmecc_alpha_to	drivers/mtd/nand/atmel_nand.c	/^	void __iomem	*pmecc_alpha_to;$/;"	m	struct:atmel_nand_host	typeref:typename:void __iomem *	file:
pmecc_bytes_per_sector	drivers/mtd/nand/atmel_nand.c	/^	int		pmecc_bytes_per_sector;$/;"	m	struct:atmel_nand_host	typeref:typename:int	file:
pmecc_choose_ecc	drivers/mtd/nand/atmel_nand.c	/^static int pmecc_choose_ecc(struct atmel_nand_host *host,$/;"	f	typeref:typename:int	file:
pmecc_config	tools/atmelimage.c	/^static struct pmecc_config {$/;"	s	file:
pmecc_config_ecc_layout	drivers/mtd/nand/atmel_nand.c	/^static void pmecc_config_ecc_layout(struct nand_ecclayout *layout,$/;"	f	typeref:typename:void	file:
pmecc_corr_cap	drivers/mtd/nand/atmel_nand.c	/^	u8		pmecc_corr_cap;$/;"	m	struct:atmel_nand_host	typeref:typename:u8	file:
pmecc_correct_data	drivers/mtd/nand/atmel_nand.c	/^static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,$/;"	f	typeref:typename:void	file:
pmecc_correction	drivers/mtd/nand/atmel_nand.c	/^static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf,$/;"	f	typeref:typename:int	file:
pmecc_cw_len	drivers/mtd/nand/atmel_nand.c	/^	int		pmecc_cw_len;	\/* Length of codeword *\/$/;"	m	struct:atmel_nand_host	typeref:typename:int	file:
pmecc_data_alloc	drivers/mtd/nand/atmel_nand.c	/^static int pmecc_data_alloc(struct atmel_nand_host *host)$/;"	f	typeref:typename:int	file:
pmecc_data_free	drivers/mtd/nand/atmel_nand.c	/^static void pmecc_data_free(struct atmel_nand_host *host)$/;"	f	typeref:typename:void	file:
pmecc_degree	drivers/mtd/nand/atmel_nand.c	/^	int		pmecc_degree;	\/* Degree of remainders *\/$/;"	m	struct:atmel_nand_host	typeref:typename:int	file:
pmecc_delta	drivers/mtd/nand/atmel_nand.c	/^	int	*pmecc_delta;$/;"	m	struct:atmel_nand_host	typeref:typename:int *	file:
pmecc_dmu	drivers/mtd/nand/atmel_nand.c	/^	int	*pmecc_dmu;$/;"	m	struct:atmel_nand_host	typeref:typename:int *	file:
pmecc_err_location	drivers/mtd/nand/atmel_nand.c	/^static int pmecc_err_location(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
pmecc_errloc_regs	drivers/mtd/nand/atmel_nand_ecc.h	/^struct pmecc_errloc_regs {$/;"	s
pmecc_galois_table	drivers/mtd/nand/atmel_nand.c	/^static uint16_t *pmecc_galois_table;$/;"	v	typeref:typename:uint16_t *	file:
pmecc_gen_syndrome	drivers/mtd/nand/atmel_nand.c	/^static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector)$/;"	f	typeref:typename:void	file:
pmecc_get_alpha_to	drivers/mtd/nand/atmel_nand.c	/^static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host)$/;"	f	typeref:typename:void __iomem *	file:
pmecc_get_ecc_bytes	drivers/mtd/nand/atmel_nand.c	/^static int pmecc_get_ecc_bytes(int cap, int sector_size)$/;"	f	typeref:typename:int	file:
pmecc_get_ecc_bytes	tools/atmel_pmecc_params.c	/^static int pmecc_get_ecc_bytes(int cap, int sector_size)$/;"	f	typeref:typename:int	file:
pmecc_get_sigma	drivers/mtd/nand/atmel_nand.c	/^static void pmecc_get_sigma(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
pmecc_host	drivers/mtd/nand/atmel_nand.c	/^static struct atmel_nand_host pmecc_host;$/;"	v	typeref:struct:atmel_nand_host	file:
pmecc_index_of	drivers/mtd/nand/atmel_nand.c	/^	void __iomem	*pmecc_index_of;$/;"	m	struct:atmel_nand_host	typeref:typename:void __iomem *	file:
pmecc_index_table_offset	drivers/mtd/nand/atmel_nand.c	/^	u32		pmecc_index_table_offset;$/;"	m	struct:atmel_nand_host	typeref:typename:u32	file:
pmecc_lmu	drivers/mtd/nand/atmel_nand.c	/^	int16_t	*pmecc_lmu; \/* polynomal order *\/$/;"	m	struct:atmel_nand_host	typeref:typename:int16_t *	file:
pmecc_mu	drivers/mtd/nand/atmel_nand.c	/^	int	*pmecc_mu;$/;"	m	struct:atmel_nand_host	typeref:typename:int *	file:
pmecc_partial_syn	drivers/mtd/nand/atmel_nand.c	/^	int16_t	*pmecc_partial_syn;$/;"	m	struct:atmel_nand_host	typeref:typename:int16_t *	file:
pmecc_readb	drivers/mtd/nand/atmel_nand_ecc.h	/^#define pmecc_readb(/;"	d
pmecc_readl	drivers/mtd/nand/atmel_nand_ecc.h	/^#define pmecc_readl(/;"	d
pmecc_regs	drivers/mtd/nand/atmel_nand_ecc.h	/^struct pmecc_regs {$/;"	s
pmecc_rom_base	drivers/mtd/nand/atmel_nand.c	/^	void __iomem		*pmecc_rom_base;$/;"	m	struct:atmel_nand_host	typeref:typename:void __iomem *	file:
pmecc_sector_number	drivers/mtd/nand/atmel_nand.c	/^	int		pmecc_sector_number;$/;"	m	struct:atmel_nand_host	typeref:typename:int	file:
pmecc_sector_size	drivers/mtd/nand/atmel_nand.c	/^	u16		pmecc_sector_size;$/;"	m	struct:atmel_nand_host	typeref:typename:u16	file:
pmecc_si	drivers/mtd/nand/atmel_nand.c	/^	int16_t	*pmecc_si;$/;"	m	struct:atmel_nand_host	typeref:typename:int16_t *	file:
pmecc_smu	drivers/mtd/nand/atmel_nand.c	/^	int16_t	*pmecc_smu;$/;"	m	struct:atmel_nand_host	typeref:typename:int16_t *	file:
pmecc_substitute	drivers/mtd/nand/atmel_nand.c	/^static void pmecc_substitute(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
pmecc_version	drivers/mtd/nand/atmel_nand.c	/^	u32		pmecc_version;$/;"	m	struct:atmel_nand_host	typeref:typename:u32	file:
pmecc_writel	drivers/mtd/nand/atmel_nand_ecc.h	/^#define pmecc_writel(/;"	d
pmem_buf	tools/pblimage.c	/^static unsigned char *pmem_buf = mem_buf;$/;"	v	typeref:typename:unsigned char *	file:
pmerrloc	drivers/mtd/nand/atmel_nand.c	/^	struct pmecc_errloc_regs __iomem *pmerrloc;$/;"	m	struct:atmel_nand_host	typeref:struct:pmecc_errloc_regs __iomem *	file:
pmhr0	arch/m68k/include/asm/immap_5441x.h	/^	u32 pmhr0;$/;"	m	struct:pm	typeref:typename:u32
pmhr1	arch/m68k/include/asm/immap_5441x.h	/^	u32 pmhr1;$/;"	m	struct:pm	typeref:typename:u32
pmic	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		pmic: pmic@40 {$/;"	l
pmic	arch/arm/dts/tegra124-jetson-tk1.dts	/^		pmic: pmic@40 {$/;"	l
pmic	arch/arm/dts/tegra124-nyan.dtsi	/^		pmic: pmic@40 {$/;"	l
pmic	arch/arm/dts/tegra20-harmony.dts	/^		pmic: tps6586x@34 {$/;"	l
pmic	arch/arm/dts/tegra20-seaboard.dts	/^		pmic: tps6586x@34 {$/;"	l
pmic	arch/arm/dts/tegra20-tamonten.dtsi	/^		pmic: tps6586x@34 {$/;"	l
pmic	arch/arm/dts/tegra20-ventana.dts	/^		pmic: tps6586x@34 {$/;"	l
pmic	arch/arm/dts/tegra30-apalis.dts	/^		pmic: tps65911@2d {$/;"	l
pmic	arch/arm/dts/tegra30-beaver.dts	/^		pmic: tps65911@2d {$/;"	l
pmic	arch/arm/dts/tegra30-cardhu.dts	/^		pmic: tps65911@2d {$/;"	l
pmic	arch/arm/include/asm/omap_common.h	/^	struct pmic_data *pmic;$/;"	m	struct:volts	typeref:struct:pmic_data *
pmic	include/power/act8846_pmic.h	/^	struct pmic *pmic;$/;"	m	struct:pmic_act8846	typeref:struct:pmic *
pmic	include/power/pmic.h	/^struct pmic {$/;"	s
pmic0	arch/arm/dts/dragonboard410c.dts	/^			pmic0: pm8916@0 {$/;"	l
pmic1	arch/arm/dts/dragonboard410c.dts	/^			pmic1: pm8916@1 {$/;"	l
pmic_act8846	include/power/act8846_pmic.h	/^struct pmic_act8846 {$/;"	s
pmic_alloc	drivers/power/power_core.c	/^struct pmic *pmic_alloc(void)$/;"	f	typeref:struct:pmic *
pmic_bind_children	drivers/power/pmic/pmic-uclass.c	/^int pmic_bind_children(struct udevice *pmic, int offset,$/;"	f	typeref:typename:int
pmic_bus_clrbits	arch/arm/mach-sunxi/pmic_bus.c	/^int pmic_bus_clrbits(u8 reg, u8 bits)$/;"	f	typeref:typename:int
pmic_bus_init	arch/arm/include/asm/omap_common.h	/^	void (*pmic_bus_init)(void);$/;"	m	struct:pmic_data	typeref:typename:void (*)(void)
pmic_bus_init	arch/arm/mach-sunxi/pmic_bus.c	/^int pmic_bus_init(void)$/;"	f	typeref:typename:int
pmic_bus_read	arch/arm/mach-sunxi/pmic_bus.c	/^int pmic_bus_read(u8 reg, u8 *data)$/;"	f	typeref:typename:int
pmic_bus_setbits	arch/arm/mach-sunxi/pmic_bus.c	/^int pmic_bus_setbits(u8 reg, u8 bits)$/;"	f	typeref:typename:int
pmic_bus_write	arch/arm/mach-sunxi/pmic_bus.c	/^int pmic_bus_write(u8 reg, u8 data)$/;"	f	typeref:typename:int
pmic_charger_bat_present	drivers/power/pmic/pmic_max8997.c	/^static int pmic_charger_bat_present(struct pmic *p)$/;"	f	typeref:typename:int	file:
pmic_charger_state	drivers/power/pmic/pmic_max8997.c	/^static int pmic_charger_state(struct pmic *p, int state, int current)$/;"	f	typeref:typename:int	file:
pmic_child_info	include/power/pmic.h	/^struct pmic_child_info {$/;"	s
pmic_children_info	drivers/power/pmic/act8846.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/lp873x.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/max77686.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/palmas.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/pfuze100.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/rk808.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/s5m8767.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/sandbox.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_children_info	drivers/power/pmic/tps65090.c	/^static const struct pmic_child_info pmic_children_info[] = {$/;"	v	typeref:typename:const struct pmic_child_info[]	file:
pmic_clrsetbits	drivers/power/pmic/pmic-uclass.c	/^int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)$/;"	f	typeref:typename:int
pmic_data	arch/arm/include/asm/omap_common.h	/^struct pmic_data {$/;"	s
pmic_detect	board/freescale/mx35pdk/mx35pdk.c	/^static inline int pmic_detect(void)$/;"	f	typeref:typename:int	file:
pmic_dialog_init	drivers/power/power_dialog.c	/^int pmic_dialog_init(unsigned char bus)$/;"	f	typeref:typename:int
pmic_dump	drivers/power/power_core.c	/^static int pmic_dump(struct pmic *p)$/;"	f	typeref:typename:int	file:
pmic_dvs2	arch/arm/dts/rk3399-evb.dts	/^		pmic_dvs2: pmic-dvs2 {$/;"	l
pmic_enable_cpu_vdd	board/nvidia/venice2/as3722_init.c	/^void pmic_enable_cpu_vdd(void)$/;"	f	typeref:typename:void
pmic_get	drivers/power/pmic/pmic-uclass.c	/^int pmic_get(const char *name, struct udevice **devp)$/;"	f	typeref:typename:int
pmic_get	drivers/power/power_core.c	/^struct pmic *pmic_get(const char *s)$/;"	f	typeref:struct:pmic *
pmic_i2c_addr	include/power/pmic.h	/^#define pmic_i2c_addr /;"	d
pmic_i2c_tx_num	include/power/pmic.h	/^#define pmic_i2c_tx_num /;"	d
pmic_init	drivers/power/pmic/pmic_max77686.c	/^int pmic_init(unsigned char bus)$/;"	f	typeref:typename:int
pmic_init	drivers/power/pmic/pmic_max8997.c	/^int pmic_init(unsigned char bus)$/;"	f	typeref:typename:int
pmic_init	drivers/power/pmic/pmic_max8998.c	/^int pmic_init(unsigned char bus)$/;"	f	typeref:typename:int
pmic_init	drivers/power/power_fsl.c	/^int pmic_init(unsigned char bus)$/;"	f	typeref:typename:int
pmic_init_max77686	board/samsung/trats2/trats2.c	/^static int pmic_init_max77686(void)$/;"	f	typeref:typename:int	file:
pmic_init_max77693	drivers/power/mfd/pmic_max77693.c	/^int pmic_init_max77693(unsigned char bus)$/;"	f	typeref:typename:int
pmic_init_max8997	board/samsung/trats/trats.c	/^static int pmic_init_max8997(void)$/;"	f	typeref:typename:int	file:
pmic_int	arch/arm/dts/rk3288-fennec.dtsi	/^		pmic_int: pmic-int {$/;"	l
pmic_int	arch/arm/dts/rk3288-miniarm.dtsi	/^		pmic_int: pmic-int {$/;"	l
pmic_int	arch/arm/dts/rk3288-popmetal.dtsi	/^		pmic_int: pmic-int {$/;"	l
pmic_int	arch/arm/dts/rk3288-rock2-square.dts	/^		pmic_int: pmic-int {$/;"	l
pmic_int_l	arch/arm/dts/rk3288-veyron.dtsi	/^		pmic_int_l: pmic-int-l {$/;"	l
pmic_int_l	arch/arm/dts/rk3399-evb.dts	/^		pmic_int_l: pmic-int-l {$/;"	l
pmic_list_names	drivers/power/power_core.c	/^static void pmic_list_names(void)$/;"	f	typeref:typename:void	file:
pmic_op_type	include/power/pmic.h	/^enum pmic_op_type {$/;"	g
pmic_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux pmic_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
pmic_power_en	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int pmic_power_en;$/;"	m	struct:pad_signals	typeref:typename:int
pmic_power_en0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int pmic_power_en0;$/;"	m	struct:pad_signals	typeref:typename:int
pmic_probe	drivers/power/power_i2c.c	/^int pmic_probe(struct pmic *p)$/;"	f	typeref:typename:int
pmic_read	drivers/power/pmic/pmic-uclass.c	/^int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len)$/;"	f	typeref:typename:int
pmic_reg	drivers/power/power_spi.c	/^static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write)$/;"	f	typeref:typename:u32	file:
pmic_reg_count	drivers/power/pmic/pmic-uclass.c	/^int pmic_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int
pmic_reg_read	drivers/power/pmic/pmic-uclass.c	/^int pmic_reg_read(struct udevice *dev, uint reg)$/;"	f	typeref:typename:int
pmic_reg_read	drivers/power/pmic/pmic_hi6553.c	/^int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)$/;"	f	typeref:typename:int
pmic_reg_read	drivers/power/power_i2c.c	/^int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)$/;"	f	typeref:typename:int
pmic_reg_read	drivers/power/power_spi.c	/^int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)$/;"	f	typeref:typename:int
pmic_reg_write	drivers/power/pmic/pmic-uclass.c	/^int pmic_reg_write(struct udevice *dev, uint reg, uint value)$/;"	f	typeref:typename:int
pmic_reg_write	drivers/power/pmic/pmic_hi6553.c	/^int pmic_reg_write(struct pmic *p, u32 reg, u32 val)$/;"	f	typeref:typename:int
pmic_reg_write	drivers/power/power_i2c.c	/^int pmic_reg_write(struct pmic *p, u32 reg, u32 val)$/;"	f	typeref:typename:int
pmic_reg_write	drivers/power/power_spi.c	/^int pmic_reg_write(struct pmic *p, u32 reg, u32 val)$/;"	f	typeref:typename:int
pmic_reset	board/samsung/trats/trats.c	/^static void pmic_reset(void)$/;"	f	typeref:typename:void	file:
pmic_set_output	drivers/power/power_core.c	/^int pmic_set_output(struct pmic *p, u32 reg, int out, int on)$/;"	f	typeref:typename:int
pmic_show_info	drivers/power/power_core.c	/^static void pmic_show_info(struct pmic *p)$/;"	f	typeref:typename:void	file:
pmic_spi_bitlen	include/power/pmic.h	/^#define pmic_spi_bitlen /;"	d
pmic_spi_flags	include/power/pmic.h	/^#define pmic_spi_flags /;"	d
pmic_spi_prepare_tx	drivers/power/power_fsl.c	/^static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)$/;"	f	typeref:typename:u32	file:
pmic_vsel	arch/arm/dts/rk3288-firefly.dts	/^		pmic_vsel: pmic-vsel {$/;"	l
pmic_write	arch/arm/include/asm/omap_common.h	/^	int (*pmic_write)(u8 sa, u8 reg_addr, u8 reg_data);$/;"	m	struct:pmic_data	typeref:typename:int (*)(u8 sa,u8 reg_addr,u8 reg_data)
pmic_write	drivers/power/pmic/pmic-uclass.c	/^int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len)$/;"	f	typeref:typename:int
pmicsetup	board/BuR/common/common.c	/^void pmicsetup(u32 mpupll)$/;"	f	typeref:typename:void
pmicsetuptime	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pmicsetuptime;      \/* 0x0104 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
pmit	arch/powerpc/include/asm/fsl_pci.h	/^	pit_t	pmit;		\/* 0xd00 - 0xd9c Inbound ATMU's MSI *\/$/;"	m	struct:ccsr_pci	typeref:typename:pit_t
pmlr0	arch/m68k/include/asm/immap_5441x.h	/^	u32 pmlr0;$/;"	m	struct:pm	typeref:typename:u32
pmlr1	arch/m68k/include/asm/immap_5441x.h	/^	u32 pmlr1;$/;"	m	struct:pm	typeref:typename:u32
pmm0	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic pmm0; \/* 0x60 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
pmm1	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic pmm1; \/* 0x70 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
pmmc	arch/arm/dts/k2g.dtsi	/^		pmmc: pmmc@2900000 {$/;"	l
pmnc_ppc	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmnc_ppc;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
pmnc_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmnc_ppc_a;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmnc_ppc_a	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmnc_ppc_a;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
pmnc_ppc_m	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pmnc_ppc_m;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pmo	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic pmo;  \/* 0x90 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
pmp	drivers/block/sata_dwc.h	/^	int			pmp;$/;"	m	struct:ata_link	typeref:typename:int
pmp_link	drivers/block/sata_dwc.h	/^	struct ata_link		*pmp_link;$/;"	m	struct:ata_port	typeref:struct:ata_link *
pmr	arch/m68k/include/asm/timer.h	/^	u16 pmr;		\/* 0x02 Modulus Register *\/$/;"	m	struct:pit_ctrl	typeref:typename:u16
pmr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $pmr   = $mbar - 1 + 0x008$/;"	t
pmspdm	include/andestech/andes_pcu.h	/^	unsigned int	pmspdm[40];	\/* 0x400-0x4fC: Power Manager$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[40]
pmsr0	arch/m68k/include/asm/immap_5441x.h	/^	u8 pmsr0;		\/* *\/$/;"	m	struct:pm	typeref:typename:u8
pmsr1	arch/m68k/include/asm/immap_5441x.h	/^	u8 pmsr1;$/;"	m	struct:pm	typeref:typename:u8
pmtbs	drivers/net/mvgbe.h	/^	u32 pmtbs;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pmtu	drivers/net/mvgbe.h	/^	u32 pmtu;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pmu	arch/arm/dts/rk3288.dtsi	/^	pmu: power-management@ff730000 {$/;"	l
pmu	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_pmu *pmu;$/;"	m	struct:dram_info	typeref:struct:rk3288_pmu *	file:
pmu	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	struct rk3288_pmu *pmu;$/;"	m	struct:rk3288_pinctrl_priv	typeref:struct:rk3288_pmu *	file:
pmu_cfg	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 pmu_cfg;               \/* 0x11c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
pmu_cfg	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 pmu_cfg;               \/* 0x11c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
pmu_cnt	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 pmu_cnt[19];           \/* 0x120 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[19]
pmu_cnt	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 pmu_cnt[19];           \/* 0x120 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[19]
pmu_con	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmu_con[9];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[9]
pmu_debug	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_debug;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
pmu_debug	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_debug;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pmu_debug	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_debug;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pmu_io_domains	arch/arm/dts/rk3399.dtsi	/^		pmu_io_domains: io-domains {$/;"	l	label:pmugrf
pmu_misc0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc0_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc0_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc0_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc0_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc0_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc0_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc1_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc1_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc1_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc1_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc1_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc1_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc2	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc2;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc2_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc2_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc2_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc2_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_misc2_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_misc2_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_mst_en	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 pmu_mst_en;            \/* 0x118 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
pmu_mst_en	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 pmu_mst_en;            \/* 0x118 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
pmu_reg_1p1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_1p1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_1p1_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_1p1_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_1p1_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_1p1_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_1p1_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_1p1_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_2p5	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_2p5;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_2p5_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_2p5_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_2p5_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_2p5_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_2p5_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_2p5_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_3p0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_3p0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_3p0_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_3p0_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_3p0_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_3p0_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_3p0_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_3p0_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_core	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_core;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_core_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_core_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_core_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_core_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_reg_core_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 pmu_reg_core_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
pmu_set_nominal	arch/arm/mach-tegra/tegra20/pmu.c	/^int pmu_set_nominal(void)$/;"	f	typeref:typename:int
pmu_slv_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmu_slv_con0;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
pmu_slv_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmu_slv_con1;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
pmu_spare0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pmu_spare0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pmu_spare1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare1; \/* Store PHY0_CON4 for read leveling *\/$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pmu_spare1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare1;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pmu_spare2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare2; \/* Store PHY1_CON4 for read leveling *\/$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pmu_spare2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare2;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pmu_spare3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
pmu_spare3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	pmu_spare3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
pmu_write	board/avionic-design/common/tamonten-ng.c	/^void pmu_write(uchar reg, uchar data)$/;"	f	typeref:typename:void
pmuclk_init	drivers/clk/rockchip/clk_rk3399.c	/^static void pmuclk_init(struct rk3399_pmucru *pmucru)$/;"	f	typeref:typename:void	file:
pmucru	arch/arm/dts/rk3399.dtsi	/^	pmucru: pmu-clock-controller@ff750000 {$/;"	l
pmucru	drivers/clk/rockchip/clk_rk3399.c	/^	struct rk3399_pmucru *pmucru;$/;"	m	struct:rk3399_pmuclk_priv	typeref:struct:rk3399_pmucru *	file:
pmucru_clkfrac_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 pmucru_clkfrac_con[2];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[2]
pmucru_clkgate_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 pmucru_clkgate_con[3];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[3]
pmucru_clksel	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 pmucru_clksel[6];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[6]
pmucru_gatedis_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 pmucru_gatedis_con[2];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[2]
pmucru_rstnhold_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 pmucru_rstnhold_con[2];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[2]
pmucru_softrst_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 pmucru_softrst_con[2];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[2]
pmugrf	arch/arm/dts/rk3399.dtsi	/^	pmugrf: syscon@ff320000 {$/;"	l
pmugrf	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^	struct rk3399_pmugrf_regs *pmugrf;$/;"	m	struct:rk3399_pinctrl_priv	typeref:struct:rk3399_pmugrf_regs *	file:
pmupvtm_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmupvtm_con0;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
pmupvtm_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmupvtm_con1;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
pmupvtm_status0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmupvtm_status0;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
pmupvtm_status1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 pmupvtm_status1;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
pmussi_base	drivers/power/pmic/pmic_hi6553.c	/^u8 *pmussi_base;$/;"	v	typeref:typename:u8 *
pmux_ctlid	arch/arm/mach-tegra/tegra20/pinmux.c	/^enum pmux_ctlid {$/;"	g	file:
pmux_drv_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_drv_isvalid(/;"	d	file:
pmux_drvgrp	arch/arm/include/asm/arch-tegra114/pinmux.h	/^enum pmux_drvgrp {$/;"	g
pmux_drvgrp	arch/arm/include/asm/arch-tegra124/pinmux.h	/^enum pmux_drvgrp {$/;"	g
pmux_drvgrp	arch/arm/include/asm/arch-tegra210/pinmux.h	/^enum pmux_drvgrp {$/;"	g
pmux_drvgrp	arch/arm/include/asm/arch-tegra30/pinmux.h	/^enum pmux_drvgrp {$/;"	g
pmux_drvgrp_config	arch/arm/include/asm/arch-tegra/pinmux.h	/^struct pmux_drvgrp_config {$/;"	s
pmux_drvgrp_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_drvgrp_isvalid(/;"	d	file:
pmux_func	arch/arm/include/asm/arch-tegra114/pinmux.h	/^enum pmux_func {$/;"	g
pmux_func	arch/arm/include/asm/arch-tegra124/pinmux.h	/^enum pmux_func {$/;"	g
pmux_func	arch/arm/include/asm/arch-tegra20/pinmux.h	/^enum pmux_func {$/;"	g
pmux_func	arch/arm/include/asm/arch-tegra210/pinmux.h	/^enum pmux_func {$/;"	g
pmux_func	arch/arm/include/asm/arch-tegra30/pinmux.h	/^enum pmux_func {$/;"	g
pmux_func_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_func_isvalid(/;"	d	file:
pmux_hsm	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_hsm {$/;"	g
pmux_hsm_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_hsm_isvalid(/;"	d	file:
pmux_lpmd	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_lpmd {$/;"	g
pmux_lpmd_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_lpmd_isvalid(/;"	d	file:
pmux_mipipadctrlgrp	arch/arm/include/asm/arch-tegra124/pinmux.h	/^enum pmux_mipipadctrlgrp {$/;"	g
pmux_mipipadctrlgrp_config	arch/arm/include/asm/arch-tegra/pinmux.h	/^struct pmux_mipipadctrlgrp_config {$/;"	s
pmux_mipipadctrlgrp_desc	arch/arm/include/asm/arch-tegra/pinmux.h	/^struct pmux_mipipadctrlgrp_desc {$/;"	s
pmux_mipipadctrlgrp_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_mipipadctrlgrp_isvalid(/;"	d	file:
pmux_offset	arch/blackfin/cpu/gpio.c	/^u8 pmux_offset[][16] = {$/;"	v	typeref:typename:const u8[][16]	file:
pmux_pin_e_io_hv	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pin_e_io_hv {$/;"	g
pmux_pin_e_io_hv_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_e_io_hv_isvalid(/;"	d	file:
pmux_pin_io	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pin_io {$/;"	g
pmux_pin_io_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_io_isvalid(/;"	d	file:
pmux_pin_ioreset	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pin_ioreset {$/;"	g
pmux_pin_ioreset_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_ioreset_isvalid(/;"	d	file:
pmux_pin_lock	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pin_lock {$/;"	g
pmux_pin_lock_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_lock_isvalid(/;"	d	file:
pmux_pin_od	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pin_od {$/;"	g
pmux_pin_od_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_od_isvalid(/;"	d	file:
pmux_pin_pupd_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_pupd_isvalid(/;"	d	file:
pmux_pin_rcv_sel	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pin_rcv_sel {$/;"	g
pmux_pin_rcv_sel_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_rcv_sel_isvalid(/;"	d	file:
pmux_pin_tristate_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pin_tristate_isvalid(/;"	d	file:
pmux_pingrp	arch/arm/include/asm/arch-tegra114/pinmux.h	/^enum pmux_pingrp {$/;"	g
pmux_pingrp	arch/arm/include/asm/arch-tegra124/pinmux.h	/^enum pmux_pingrp {$/;"	g
pmux_pingrp	arch/arm/include/asm/arch-tegra20/pinmux.h	/^enum pmux_pingrp {$/;"	g
pmux_pingrp	arch/arm/include/asm/arch-tegra210/pinmux.h	/^enum pmux_pingrp {$/;"	g
pmux_pingrp	arch/arm/include/asm/arch-tegra30/pinmux.h	/^enum pmux_pingrp {$/;"	g
pmux_pingrp_config	arch/arm/include/asm/arch-tegra/pinmux.h	/^struct pmux_pingrp_config {$/;"	s
pmux_pingrp_desc	arch/arm/include/asm/arch-tegra/pinmux.h	/^struct pmux_pingrp_desc {$/;"	s
pmux_pingrp_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_pingrp_isvalid(/;"	d	file:
pmux_pull	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_pull {$/;"	g
pmux_pullid	arch/arm/mach-tegra/tegra20/pinmux.c	/^enum pmux_pullid {$/;"	g	file:
pmux_schmt	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_schmt {$/;"	g
pmux_schmt_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_schmt_isvalid(/;"	d	file:
pmux_slw_isvalid	arch/arm/mach-tegra/pinmux-common.c	/^#define pmux_slw_isvalid(/;"	d	file:
pmux_tristate	arch/arm/include/asm/arch-tegra/pinmux.h	/^enum pmux_tristate {$/;"	g
pmuxcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmuxcr;		\/* Alt. function signal multiplex control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pmuxcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmuxcr;		\/* Pin multiplexing control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pmuxcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pmuxcr;		\/* 0xe0060 - Alternate function signal multiplex control *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
pmuxcr	board/freescale/p1022ds/diu.c	/^static u32 pmuxcr;$/;"	v	typeref:typename:u32	file:
pmuxcr	board/gdsys/p1022/diu.c	/^static u32 pmuxcr;$/;"	v	typeref:typename:u32	file:
pmuxcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmuxcr2;	\/* Alt. function signal multiplex control 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pmuxcr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pmuxcr3;$/;"	m	struct:ccsr_gur	typeref:typename:u32
pmuxcr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32 pmuxcr4;$/;"	m	struct:ccsr_gur	typeref:typename:u32
pmx0	arch/arm/cpu/armv8/hisilicon/pinmux.c	/^struct hi6220_pinmux0_regs *pmx0 =$/;"	v	typeref:struct:hi6220_pinmux0_regs *
pmx1	arch/arm/cpu/armv8/hisilicon/pinmux.c	/^struct hi6220_pinmux1_regs *pmx1 =$/;"	v	typeref:struct:hi6220_pinmux1_regs *
pn	arch/arm/mach-socfpga/misc.c	/^	const u16	pn;$/;"	m	struct:__anon0d396cd60208	typeref:typename:const u16	file:
pn	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	unsigned char pn[16];$/;"	m	struct:mfgdata	typeref:typename:unsigned char[16]	file:
pn_inv	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	pn_inv;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
pname	tools/gdb/error.c	/^char *pname;$/;"	v	typeref:typename:char *
pncr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	pncr;		\/* 0x114 Receive Next Counter Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
pncr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pncr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pncr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pncr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pndr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pndr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pndr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pndr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pnfedir	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pnfedir;	\/* 0xd0e04 - Port Notification\/Fatal Error Detect Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pnfedr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pnfedr;		\/* 0xd0e00 - Port Notification\/Fatal Error Detect Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pnfeier	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pnfeier;	\/* 0xd0e08 - Port Notification\/Fatal Error Interrupt Enable Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pnm	include/mmc.h	/^	char pnm[7];$/;"	m	struct:mmc_cid	typeref:typename:char[7]
pnode	fs/ubifs/lpt.c	/^		struct ubifs_pnode *pnode;$/;"	m	union:lpt_scan_node::__anonbef95ef6020a	typeref:struct:ubifs_pnode *	file:
pnode	fs/ubifs/lpt.c	/^		struct ubifs_pnode pnode;$/;"	m	union:lpt_scan_node::__anonbef95ef6010a	typeref:struct:ubifs_pnode	file:
pnode	fs/ubifs/ubifs.h	/^		struct ubifs_pnode *pnode;$/;"	m	union:ubifs_nbranch::__anonf648d0840e0a	typeref:struct:ubifs_pnode *
pnode_cnt	fs/ubifs/ubifs.h	/^	int pnode_cnt;$/;"	m	struct:ubifs_info	typeref:typename:int
pnode_lookup	fs/ubifs/lpt_commit.c	/^static struct ubifs_pnode *pnode_lookup(struct ubifs_info *c, int i)$/;"	f	typeref:struct:ubifs_pnode *	file:
pnode_sz	fs/ubifs/ubifs.h	/^	int pnode_sz;$/;"	m	struct:ubifs_info	typeref:typename:int
pnodes_have	fs/ubifs/ubifs.h	/^	int pnodes_have;$/;"	m	struct:ubifs_info	typeref:typename:int
pnor_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int pnor_boot_selected(void)$/;"	f	typeref:typename:int
pnp	arch/sparc/cpu/leon3/ambapp.c	/^	struct ambapp_pnp_ahb	*pnp;$/;"	m	struct:ambapp_find_ahb_info	typeref:struct:ambapp_pnp_ahb *	file:
pnp	arch/sparc/cpu/leon3/ambapp.c	/^	struct ambapp_pnp_apb	*pnp;$/;"	m	struct:ambapp_find_apb_info	typeref:struct:ambapp_pnp_apb *	file:
pnp_enter_conf_state	drivers/misc/smsc_lpc47m.c	/^static void pnp_enter_conf_state(u16 dev)$/;"	f	typeref:typename:void	file:
pnp_enter_conf_state	drivers/misc/winbond_w83627.c	/^static void pnp_enter_conf_state(u16 dev)$/;"	f	typeref:typename:void	file:
pnp_exit_conf_state	drivers/misc/smsc_lpc47m.c	/^static void pnp_exit_conf_state(u16 dev)$/;"	f	typeref:typename:void	file:
pnp_exit_conf_state	drivers/misc/winbond_w83627.c	/^static void pnp_exit_conf_state(u16 dev)$/;"	f	typeref:typename:void	file:
pnp_read_config	arch/x86/include/asm/pnp_def.h	/^static inline uint8_t pnp_read_config(uint16_t dev, uint8_t reg)$/;"	f	typeref:typename:uint8_t
pnp_read_enable	arch/x86/include/asm/pnp_def.h	/^static inline int pnp_read_enable(uint16_t dev)$/;"	f	typeref:typename:int
pnp_read_iobase	arch/x86/include/asm/pnp_def.h	/^static inline uint16_t pnp_read_iobase(uint16_t dev, uint8_t index)$/;"	f	typeref:typename:uint16_t
pnp_set_device	include/ns87308.h	/^static inline void pnp_set_device(unsigned char dev)$/;"	f	typeref:typename:void
pnp_set_drq	arch/x86/include/asm/pnp_def.h	/^static inline void pnp_set_drq(uint16_t dev, uint8_t index, unsigned drq)$/;"	f	typeref:typename:void
pnp_set_enable	arch/x86/include/asm/pnp_def.h	/^static inline void pnp_set_enable(uint16_t dev, int enable)$/;"	f	typeref:typename:void
pnp_set_iobase	arch/x86/include/asm/pnp_def.h	/^static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase)$/;"	f	typeref:typename:void
pnp_set_irq	arch/x86/include/asm/pnp_def.h	/^static inline void pnp_set_irq(uint16_t dev, uint8_t index, unsigned irq)$/;"	f	typeref:typename:void
pnp_set_logical_device	arch/x86/include/asm/pnp_def.h	/^static inline void pnp_set_logical_device(uint16_t dev)$/;"	f	typeref:typename:void
pnp_write_config	arch/x86/include/asm/pnp_def.h	/^static inline void pnp_write_config(uint16_t dev, uint8_t reg, uint8_t value)$/;"	f	typeref:typename:void
pnpr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	pnpr;		\/* 0x110 Receive Next Pointer Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
pnum	drivers/mtd/ubi/ubi-media.h	/^	__be32 pnum;$/;"	m	struct:ubi_fm_ec	typeref:typename:__be32
pnum	drivers/mtd/ubi/ubi-media.h	/^	__be32 pnum[0];$/;"	m	struct:ubi_fm_eba	typeref:typename:__be32[0]
pnum	drivers/mtd/ubi/ubi.h	/^	int pnum;$/;"	m	struct:ubi_ainf_peb	typeref:typename:int
pnum	drivers/mtd/ubi/ubi.h	/^	int pnum;$/;"	m	struct:ubi_wl_entry	typeref:typename:int
pnum	tools/kwboot.c	/^	uint8_t pnum;$/;"	m	struct:kwboot_block	typeref:typename:uint8_t	file:
pobar	arch/powerpc/include/asm/immap_512x.h	/^	u32 pobar;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
pobar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pobar;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
pocmr	arch/powerpc/include/asm/immap_512x.h	/^	u32 pocmr;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
pocmr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 pocmr;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
pocr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pocr;	\/*0x000c*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
pocr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pocr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pocr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pocr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
podr	arch/m68k/include/asm/immap_5329.h	/^	u8 podr;		\/* 0x00 Output Divider Register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u8
podr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 podr;		\/* Open Drain Register *\/$/;"	m	struct:gpio_n	typeref:typename:u32
podr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	podr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
podr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	podr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
podr	include/ioports.h	/^    unsigned char podr:1;	\/* Port Open Drain Register (35-2) *\/$/;"	m	struct:__anonc67861fe0208	typeref:typename:unsigned char:1
podr	include/ioports.h	/^    unsigned int podr;		\/* Port Open Drain Register (35-2) *\/$/;"	m	struct:__anonc67861fe0108	typeref:typename:unsigned int
podr_a	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_a;		\/* 0x00 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_addr	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_addr;		\/* 0x00 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_addr	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_addr;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_atah	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_atah;		\/* ATA High Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_atal	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_atal;		\/* ATA Low Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_b	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_b;		\/* 0x01 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_be	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_be;		\/* 0x01 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_be	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_be;		\/* 0x00 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_be	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_be;		\/* 0x01 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_be	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_be;		\/* 0x04 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_be	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_be;		\/* Flexbus Byte Enable Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_bs	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_bs;		\/* 0x04 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_bs	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_bs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_busctl	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_busctl;		\/* 0x00 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_busctl	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_busctl;		\/* 0x03 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_busctl	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_busctl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_busctl	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_busctl;		\/* 0x03 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_c	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_c;		\/* 0x02 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_cs;		\/* 0x02 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_cs;		\/* 0x01 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_cs;		\/* 0x05 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_cs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_cs;		\/* 0x02 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_cs;		\/* 0x05 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_cs	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_cs;		\/* Flexbus Chip-Select Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_d	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_d;		\/* 0x03 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_datah	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_datah;		\/* 0x01 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_datal	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_datal;		\/* 0x02 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_debug	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_debug;		\/* 0x0D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_dma	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_dma;		\/* DMA Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_dma	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_dma;		\/*0x02 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_dspi	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_dspi;		\/* 0x06 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_dspi	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_dspi;		\/* 0x03 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_dspi	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_dspi;		\/* DSPI Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_dspi	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_dspi;		\/*0x0E *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_e	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_e;		\/* 0x04 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_etpu	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_etpu;		\/* 0x0C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_f	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_f;		\/* 0x05 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbadh	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fbadh;		\/* Flexbus AD High Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbadl	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fbadl;		\/* Flexbus AD Low Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbadmh	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fbadmh;		\/* Flexbus AD Med-High Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbadml	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fbadml;		\/* Flexbus AD Med-Low Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbcs	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_fbcs;		\/*0x01 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_fbctl;		\/* 0x02 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbctl	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_fbctl;		\/* 0x00 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fbctl	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fbctl;		\/* Flexbus Control Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fbctl	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_fbctl;		\/*0x00 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec0	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_fec0;		\/* 0x05 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fec0h	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_fec0h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fec0h	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fec0h;		\/* FEC0 High Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec0h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_fec0h;		\/*0x04 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec0l	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_fec0l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fec0l	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fec0l;		\/* FEC0 Low Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec0l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_fec0l;		\/*0x05 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec1h	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_fec1h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fec1h	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fec1h;		\/* FEC1 High Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec1h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_fec1h;		\/*0x06 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec1l	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_fec1l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fec1l	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_fec1l;		\/* FEC1 Low Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fec1l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_fec1l;		\/*0x07 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fech	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_fech;		\/* 0x07 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_fech;		\/* 0x00 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_fech;		\/* 0x0E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_feci2c;		\/* 0x03 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_feci2c;		\/* 0x07 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_feci2c;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_feci2c;		\/* 0x06 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_feci2c;		\/* 0x07 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_feci2c;		\/* FEC1 \/ I2C Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_feci2c	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_feci2c;		\/*0x08 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_fecl	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_fecl;		\/* 0x08 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_fecl;		\/* 0x01 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_fecl;		\/* 0x0F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_g	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_g;		\/* 0x06 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_h	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_h;		\/* 0x07 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_i	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_i;		\/* 0x08 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_i2c	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_i2c;		\/* 0x03 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_j	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_j;		\/* 0x09 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_k	arch/m68k/include/asm/immap_5441x.h	/^	u8 podr_k;		\/* 0x0A *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_lcdctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_lcdctl;		\/* 0x08 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_lcdctlh	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_lcdctlh;	\/* 0x10 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_lcdctll	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_lcdctll;	\/* 0x11 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_lcddatah	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_lcddatah;	\/* 0x09 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_lcddatah	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_lcddatah;	\/* 0x0D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_lcddatal	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_lcddatal;	\/* 0x0B *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_lcddatal	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_lcddatal;	\/* 0x0F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_lcddatam	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_lcddatam;	\/* 0x0A *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_lcddatam	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_lcddatam;	\/* 0x0E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_pci	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_pci;		\/* PCI Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_pcibg	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_pcibg;		\/*0x09 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_pcibr	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_pcibr;		\/*0x0A *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_psc1psc0	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_psc1psc0;	\/*0x0D *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_psc3psc2	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 podr_psc3psc2;	\/*0x0C *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_pwm	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_pwm;		\/* 0x06 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_qspi	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_qspi;		\/* 0x04 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_qspi	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_qspi;		\/* 0x0A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_qspi	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_qspi;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_qspi	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_qspi;		\/* 0x0A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_res1	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_res1[4];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[4]
podr_res2	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_res2[2];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
podr_res3	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_res3;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_res4	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_res4;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_res5	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_res5[3];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
podr_sdhc	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_sdhc;		\/* 0x0F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_sdram	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_sdram;		\/* 0x06 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_sdram	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_sdram;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_simp0	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_simp0;		\/* 0x0A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_simp1	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_simp1;		\/* 0x09 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_ssi	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_ssi;		\/* 0x10 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_ssi	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_ssi;		\/* 0x02 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_ssi	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_ssi;		\/* SSI Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_timer	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_timer;		\/* 0x05 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_timer	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_timer;		\/* 0x07 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_timer	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_timer;		\/* 0x0B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_timer	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_timer;		\/* 0x0B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_timer	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_timer;		\/* 0x0B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_timer	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_timer;		\/* Timer Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_timerh	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_timerh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_timerl	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_timerl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uart	arch/m68k/include/asm/immap_520x.h	/^	u8 podr_uart;		\/* 0x06 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uart	arch/m68k/include/asm/immap_5227x.h	/^	u8 podr_uart;		\/* 0x05 *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_uart	arch/m68k/include/asm/immap_5301x.h	/^	u8 podr_uart;		\/* 0x0C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uart	arch/m68k/include/asm/immap_5329.h	/^	u8 podr_uart;		\/* 0x09 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uart	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_uart;		\/* UART Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_uarth	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_uarth;		\/* 0x08 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uarth	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_uarth;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uartl	arch/m68k/include/asm/immap_5235.h	/^	u8 podr_uartl;		\/* 0x09 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_uartl	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_uartl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_usb	arch/m68k/include/asm/immap_5445x.h	/^	u8 podr_usb;		\/* USB Port Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
podr_usbh	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_usbh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podr_usbl	arch/m68k/include/asm/immap_5275.h	/^	u8 podr_usbl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
podra	arch/powerpc/include/asm/immap_85xx.h	/^	u32	podra;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
podrb	arch/powerpc/include/asm/immap_85xx.h	/^	u32	podrb;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
podrc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	podrc;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
podrd	arch/powerpc/include/asm/immap_85xx.h	/^	u32	podrd;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
poeah	arch/powerpc/include/asm/immap_85xx.h	/^	u32	poeah;		\/* PMAN Operation Error Address High *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
poeal	arch/powerpc/include/asm/immap_85xx.h	/^	u32	poeal;		\/* PMAN Operation Error Address Low *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
poes1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	poes1;		\/* PMAN Operation Error Status Register 1 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
poes2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	poes2;		\/* PMAN Operation Error Status Register 2 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pointer	disk/part_iso.h	/^	unsigned char pointer[4];		\/* absolute pointer to Boot Catalog *\/$/;"	m	struct:iso_boot_rec	typeref:typename:unsigned char[4]
pointer	include/qfw.h	/^		} pointer;$/;"	m	union:bios_linker_entry::__anona601a7fc030a	typeref:struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0508
pointer	lib/vsprintf.c	/^static char *pointer(const char *fmt, char *buf, char *end, void *ptr,$/;"	f	typeref:typename:char *	file:
poison1	lib/list_sort.c	/^	unsigned int poison1;$/;"	m	struct:debug_el	typeref:typename:unsigned int	file:
poison2	lib/list_sort.c	/^	unsigned int poison2;$/;"	m	struct:debug_el	typeref:typename:unsigned int	file:
pol	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 pol;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
pol	arch/arm/include/asm/arch/display2.h	/^	u32 pol;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
pol	arch/m68k/include/asm/immap_5301x.h	/^	u8 pol;			\/* 0x01 Polarity *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
pol	drivers/video/am335x-fb.h	/^	unsigned int	pol;		\/* polarity of sync, clock signals *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
pol	drivers/video/ipu_regs.h	/^	u32 pol;$/;"	m	struct:ipu_di	typeref:typename:u32
pol	include/vsc9953.h	/^	struct vsc9953_ana_pol	pol[164];$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_pol[164]
pol_cfg	include/vsc9953.h	/^	u32	pol_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
pol_cir_cfg	include/vsc9953.h	/^	u32	pol_cir_cfg;$/;"	m	struct:vsc9953_ana_pol	typeref:typename:u32
pol_cir_state	include/vsc9953.h	/^	u32	pol_cir_state;$/;"	m	struct:vsc9953_ana_pol	typeref:typename:u32
pol_flowc	include/vsc9953.h	/^	u32	pol_flowc[10];$/;"	m	struct:vsc9953_ana_pol_misc	typeref:typename:u32[10]
pol_freq	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 pol_freq;				\/* 0x6C *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
pol_freq	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 pol_freq;$/;"	m	struct:panel_config	typeref:typename:u32
pol_hyst	include/vsc9953.h	/^	u32	pol_hyst;$/;"	m	struct:vsc9953_ana_pol_misc	typeref:typename:u32
pol_misc	include/vsc9953.h	/^	struct vsc9953_ana_pol_misc	pol_misc;$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_pol_misc
pol_mode_cfg	include/vsc9953.h	/^	u32	pol_mode_cfg;$/;"	m	struct:vsc9953_ana_pol	typeref:typename:u32
pol_pir_cfg	include/vsc9953.h	/^	u32	pol_pir_cfg;$/;"	m	struct:vsc9953_ana_pol	typeref:typename:u32
pol_pir_state	include/vsc9953.h	/^	u32	pol_pir_state;$/;"	m	struct:vsc9953_ana_pol	typeref:typename:u32
polar	arch/blackfin/include/asm/gpio.h	/^	unsigned short polar;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
polar	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long polar;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
polar_clear	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long polar_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
polar_set	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long polar_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
polarity	arch/x86/include/asm/coreboot_tables.h	/^	u32 polarity;$/;"	m	struct:cb_gpio	typeref:typename:u32
polarity_correction	drivers/net/e1000.h	/^	e1000_polarity_reversal polarity_correction;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_polarity_reversal
polarity_reg	include/tca642x.h	/^	uint8_t polarity_reg;$/;"	m	struct:tca642x_bank_info	typeref:typename:uint8_t
policy0_mask2_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy0_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy0_mask2_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy0_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy0_mask_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy0_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy0_mask_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy0_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy1_mask2_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy1_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy1_mask2_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy1_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy1_mask_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy1_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy1_mask_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy1_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy2_mask2_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy2_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy2_mask2_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy2_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy2_mask_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy2_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy2_mask_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy2_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy3_mask2_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy3_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy3_mask2_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy3_mask2_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy3_mask_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy3_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy3_mask_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy3_mask_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy_ctl_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy_ctl_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy_ctl_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy_ctl_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy_freq_offset	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long policy_freq_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
policy_freq_offset	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long policy_freq_offset;$/;"	m	struct:ccu_clock	typeref:typename:unsigned long
poll	net/sntp.h	/^	uchar poll;$/;"	m	struct:sntp_pkt_t	typeref:typename:uchar
poll	tools/moveconfig.py	/^    def poll(self):$/;"	m	class:Slot
poll32	drivers/video/broadwell_igd.c	/^static int poll32(u8 *addr, uint mask, uint value)$/;"	f	typeref:typename:int	file:
poll4int	drivers/net/lan91c96.c	/^static int poll4int (struct eth_device *dev, byte mask, int timeout)$/;"	f	typeref:typename:int	file:
poll4int	drivers/net/smc91111.c	/^static int poll4int (struct eth_device *dev, byte mask, int timeout)$/;"	f	typeref:typename:int	file:
poll_i2c_irq	drivers/i2c/davinci_i2c.c	/^static int poll_i2c_irq(struct i2c_adapter *adap, int mask)$/;"	f	typeref:typename:int	file:
poll_int_queue	drivers/usb/host/ehci-hcd.c	/^void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)$/;"	f	typeref:typename:void *
poll_int_queue	drivers/usb/host/ohci-hcd.c	/^void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)$/;"	f	typeref:typename:void *
poll_int_queue	drivers/usb/host/usb-uclass.c	/^void *poll_int_queue(struct usb_device *udev, struct int_queue *queue)$/;"	f	typeref:typename:void *
poll_int_queue	drivers/usb/musb-new/musb_uboot.c	/^void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)$/;"	f	typeref:typename:void *
poll_int_queue	include/usb.h	/^	void * (*poll_int_queue)(struct udevice *bus, struct usb_device *udev,$/;"	m	struct:dm_usb_ops	typeref:typename:void * (*)(struct udevice * bus,struct usb_device * udev,struct int_queue * queue)
poll_op_execute	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)$/;"	f	typeref:typename:int
poll_seconds	drivers/usb/musb-new/musb_dsps.c	/^	u8		poll_seconds;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u8	file:
poll_status	drivers/i2c/i2c-uniphier-f.c	/^static int poll_status(u32 __iomem *reg, u32 flag)$/;"	f	typeref:typename:int	file:
poll_timeout	drivers/usb/gadget/f_dfu.c	/^	unsigned int                    poll_timeout;$/;"	m	struct:f_dfu	typeref:typename:unsigned int	file:
poll_timeout	include/dfu.h	/^	unsigned int (*poll_timeout)(struct dfu_entity *dfu);$/;"	m	struct:dfu_entity	typeref:typename:unsigned int (*)(struct dfu_entity * dfu)
poll_timeout_us	include/ec_commands.h	/^	uint32_t poll_timeout_us;$/;"	m	struct:ec_mkbp_config	typeref:typename:uint32_t
poll_toggle_bit	board/bf533-ezkit/flash.c	/^int poll_toggle_bit(long lOffset)$/;"	f	typeref:typename:int
poll_transfer	drivers/spi/designware_spi.c	/^static int poll_transfer(struct dw_spi_priv *priv)$/;"	f	typeref:typename:int	file:
polling_with_timeout	drivers/phy/marvell/comphy_cp110.c	/^static u32 polling_with_timeout(void __iomem *addr, u32 val,$/;"	f	typeref:typename:u32	file:
poly	lib/bch.c	/^	struct gf_poly poly;$/;"	m	struct:gf_poly_deg1	typeref:struct:gf_poly	file:
poly_2t	include/linux/bch.h	/^	struct gf_poly *poly_2t[4];$/;"	m	struct:bch_control	typeref:struct:gf_poly * [4]
pon_delay	drivers/video/am335x-fb.h	/^	unsigned int	pon_delay;	\/*$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
pool_guid	fs/zfs/zfs.c	/^	uint64_t pool_guid;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
pool_long	drivers/net/mvpp2.c	/^	struct mvpp2_bm_pool *pool_long;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2_bm_pool *	file:
pool_short	drivers/net/mvpp2.c	/^	struct mvpp2_bm_pool *pool_short;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2_bm_pool *	file:
pool_state	include/zfs/zfs.h	/^typedef enum pool_state {$/;"	g
pool_state_t	include/zfs/zfs.h	/^} pool_state_t;$/;"	t	typeref:enum:pool_state
pools	include/fsl-mc/fsl_dpni.h	/^	} pools[DPNI_MAX_DPBP];$/;"	m	struct:dpni_pools_cfg	typeref:struct:dpni_pools_cfg::__anonf56ef98e0408[]
pop	arch/mips/cpu/start.S	/^	.set	pop$/;"	d
pop	arch/mips/lib/cache_init.S	/^	.set	pop$/;"	d
pop	board/imgtec/boston/lowlevel_init.S	/^	.set	pop$/;"	d
pop_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 pop_long(void)$/;"	f	typeref:typename:u32
pop_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 pop_word(void)$/;"	f	typeref:typename:u16
popts	drivers/net/e1000.h	/^			uint8_t popts;	\/* Packet Options *\/$/;"	m	struct:e1000_data_desc::__anon7fc273451c0a::__anon7fc273451d08	typeref:typename:uint8_t
populate_lsave	fs/ubifs/lpt_commit.c	/^static void populate_lsave(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
populate_memctl_options	drivers/ddr/fsl/options.c	/^unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,$/;"	f	typeref:typename:unsigned int
populate_sysmgr_fpgaintf_module	arch/arm/mach-socfpga/system_manager.c	/^static void populate_sysmgr_fpgaintf_module(void)$/;"	f	typeref:typename:void	file:
por	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 por;		\/* 0x24 Panning Offset Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
por0	board/freescale/p1010rdb/p1010rdb.c	/^	u8 por0; \/* POR Options *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
por1	board/freescale/p1010rdb/p1010rdb.c	/^	u8 por1; \/* POR Options *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
por2	board/freescale/p1010rdb/p1010rdb.c	/^	u8 por2; \/* POR Options *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
por3	board/freescale/p1010rdb/p1010rdb.c	/^	u8 por3; \/* POR Options *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
por_cfg	board/freescale/p2041rdb/cpld.h	/^	u8 por_cfg;		\/* 0x6 - POR Control Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
por_fuelgauge_init	drivers/power/fuel_gauge/fg_max17042.c	/^static void por_fuelgauge_init(struct pmic *p)$/;"	f	typeref:typename:void	file:
porbmsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	porbmsr;	\/* POR boot mode status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porbmsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	porbmsr;	\/* 0xe0004 - POR boot mode status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
porcfg	include/mpc5xxx.h	/^	volatile u32	porcfg;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
porch_num	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 porch_num;			\/* 0x014 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
porch_num	arch/arm/include/asm/arch/display.h	/^	u32 porch_num;			\/* 0x014 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
pordbgmsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pordbgmsr;	\/* POR debug mode status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pordbgmsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pordbgmsr;	\/* 0xe0010 - POR debug mode status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
pordevsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pordevsr;	\/* POR I\/O device status regsiter *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pordevsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pordevsr;	\/* 0xe000c - POR I\/O device status regsiter *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
pordevsr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pordevsr2;	\/* POR I\/O device status 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porimpscr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	porimpscr;	\/* POR I\/O impedance status & control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porimpscr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	porimpscr;	\/* 0xe0008 - POR I\/O impedance status and control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
porpllsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	porpllsr;	\/* POR PLL ratio status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porpllsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	porpllsr;	\/* 0xe0000 - POR PLL ratio status register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
porsr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     porsr1;         \/* POR status 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	porsr1;		\/* POR status 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     porsr1;         \/* POR status 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	porsr1;		\/* POR status 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     porsr2;         \/* POR status 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	porsr2;		\/* POR status 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     porsr2;         \/* POR status 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	porsr2;		\/* POR status 2 *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
porsw_sel	board/freescale/p1010rdb/p1010rdb.c	/^	u8 porsw_sel;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
port	arch/arm/include/asm/arch-mx27/gpio.h	/^	struct gpio_regs port[6];$/;"	m	struct:gpio_port_regs	typeref:struct:gpio_regs[6]
port	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_port	port;$/;"	m	struct:stm32_gpio_dsc	typeref:enum:stm32_gpio_port
port	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_port	port;$/;"	m	struct:stm32_gpio_dsc	typeref:enum:stm32_gpio_port
port	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_port	port;$/;"	m	struct:stm32_gpio_dsc	typeref:enum:stm32_gpio_port
port	arch/arm/mach-at91/include/mach/at91_pio.h	/^	at91_port_t port[5];$/;"	m	union:at91_pio	typeref:typename:at91_port_t[5]
port	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_atmu_win	port[CONFIG_SYS_FSL_SRIO_MAX_PORTS];$/;"	m	struct:rio_atmu	typeref:struct:rio_atmu_win[]
port	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_impl_port_spec	port[CONFIG_SYS_FSL_SRIO_MAX_PORTS];$/;"	m	struct:rio_implement	typeref:struct:rio_impl_port_spec[]
port	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_lp_serial_port	port[CONFIG_SYS_FSL_SRIO_MAX_PORTS];$/;"	m	struct:rio_lp_serial	typeref:struct:rio_lp_serial_port[]
port	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_phys_err_port	port[CONFIG_SYS_FSL_SRIO_MAX_PORTS];$/;"	m	struct:rio_phys_err	typeref:struct:rio_phys_err_port[]
port	arch/powerpc/include/asm/iopin_8260.h	/^	u_char port:2;	\/* port number (A=0, B=1, C=2, D=3) *\/$/;"	m	struct:__anonbeb4a0e80108	typeref:typename:u_char:2
port	arch/powerpc/include/asm/iopin_8xx.h	/^	u_char port:2;	\/* port number (A=0, B=1, C=2, D=3) *\/$/;"	m	struct:__anon728a0bc00108	typeref:typename:u_char:2
port	arch/x86/include/asm/coreboot_tables.h	/^	u32 port;$/;"	m	struct:cb_gpio	typeref:typename:u32
port	common/usb_hub.c	/^	int port;			\/* USB port to scan *\/$/;"	m	struct:usb_device_scan	typeref:typename:int	file:
port	drivers/block/pata_bfin.c	/^static struct ata_port port[CONFIG_SYS_SATA_MAX_DEVICE];$/;"	v	typeref:struct:ata_port[]	file:
port	drivers/block/sata_sil.h	/^	void	*port;	\/* the port base address *\/$/;"	m	struct:sil_sata	typeref:typename:void *
port	drivers/block/sata_sil3114.c	/^static struct sata_port port[CONFIG_SYS_SATA_MAX_DEVICE];$/;"	v	typeref:struct:sata_port[]	file:
port	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic port;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
port	drivers/net/bcm-sf2-eth.h	/^	struct phy_device *port[BCM_ETH_MAX_PORT_NUM];$/;"	m	struct:eth_info	typeref:struct:phy_device * []
port	drivers/net/mvpp2.c	/^	int port;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:int	file:
port	drivers/net/sh_eth.h	/^	int port;$/;"	m	struct:sh_eth_dev	typeref:typename:int
port	drivers/pci/pci_mvebu.c	/^	u32 port;$/;"	m	struct:mvebu_pcie	typeref:typename:u32	file:
port	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic port;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
port	drivers/pinctrl/pinctrl_pic32.c	/^	u16 port;	\/* port number *\/$/;"	m	struct:pic32_pin_config	typeref:typename:u16	file:
port	drivers/serial/serial_pl01x.c	/^static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;$/;"	v	typeref:typename:volatile unsigned char * const[]	file:
port	drivers/serial/serial_sh.h	/^	int port;             \/* GPIO port no *\/$/;"	m	struct:__anonb38103520108	typeref:typename:int
port	drivers/usb/emul/sandbox_hub.c	/^	int port;	\/* Port number (numbered from 0) *\/$/;"	m	struct:sandbox_hub_platdata	typeref:typename:int	file:
port	include/ahci.h	/^	struct ahci_ioports	port[AHCI_MAX_PORTS];$/;"	m	struct:ahci_probe_ent	typeref:struct:ahci_ioports[]
port	include/dm/platform_data/serial_coldfire.h	/^	int port;$/;"	m	struct:coldfire_serial_platdata	typeref:typename:int
port	include/ec_commands.h	/^	uint8_t port;		\/* I2C port number *\/$/;"	m	struct:ec_params_i2c_passthru	typeref:typename:uint8_t
port	include/ec_commands.h	/^	uint8_t port;$/;"	m	struct:ec_params_i2c_read	typeref:typename:uint8_t
port	include/ec_commands.h	/^	uint8_t port;$/;"	m	struct:ec_params_i2c_write	typeref:typename:uint8_t
port	include/ethsw.h	/^	int port;$/;"	m	struct:ethsw_command_def	typeref:typename:int
port	include/fm_eth.h	/^	enum fm_port port;$/;"	m	struct:fm_eth_info	typeref:enum:fm_port
port	include/fsl_fman.h	/^	} port[63];$/;"	m	struct:ccsr_fman	typeref:struct:ccsr_fman::__anonbe262a140108[63]
port	include/ioports.h	/^	unsigned char	port;$/;"	m	struct:__anonc67861fe0308	typeref:typename:unsigned char
port	include/linux/ethtool.h	/^	__u8	port;		\/* Which connector port *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
port	include/mv88e6352.h	/^	u8 port;$/;"	m	struct:mv88e_sw_reg	typeref:typename:u8
port	include/phy.h	/^	int port;$/;"	m	struct:phy_device	typeref:typename:int
port	include/vsc9953.h	/^	struct vsc9953_ana_port	port[11];$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_port[11]
port	include/vsc9953.h	/^	struct vsc9953_port_info	port[VSC9953_MAX_PORTS];$/;"	m	struct:vsc9953_info	typeref:struct:vsc9953_port_info[]
port	include/vsc9953.h	/^	struct vsc9953_rew_port	port[12];$/;"	m	struct:vsc9953_rew_reg	typeref:struct:vsc9953_rew_port[12]
port0	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^				port0: port@0 {$/;"	l	label:switch
port0_gen3_dtle	arch/x86/cpu/broadwell/sata.c	/^	uint port0_gen3_dtle;$/;"	m	struct:sata_platdata	typeref:typename:uint	file:
port0_gen3_tx	arch/x86/cpu/broadwell/sata.c	/^	uint port0_gen3_tx;$/;"	m	struct:sata_platdata	typeref:typename:uint	file:
port0x	arch/arm/dts/uniphier-ld4.dtsi	/^	port0x: gpio@55000008 {$/;"	l
port0x	arch/arm/dts/uniphier-pro4.dtsi	/^	port0x: gpio@55000008 {$/;"	l
port0x	arch/arm/dts/uniphier-pro5.dtsi	/^	port0x: gpio@55000008 {$/;"	l
port0x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port0x: gpio@55000008 {$/;"	l
port0x	arch/arm/dts/uniphier-sld3.dtsi	/^		port0x: gpio@55000008 {$/;"	l
port0x	arch/arm/dts/uniphier-sld8.dtsi	/^	port0x: gpio@55000008 {$/;"	l
port1	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^				port1: port@1 {$/;"	l	label:switch
port1	include/fsl_usb.h	/^	struct ccsr_usb_port_ctrl port1;$/;"	m	struct:ccsr_usb_phy	typeref:struct:ccsr_usb_port_ctrl
port10x	arch/arm/dts/uniphier-ld4.dtsi	/^	port10x: gpio@55000058 {$/;"	l
port10x	arch/arm/dts/uniphier-pro4.dtsi	/^	port10x: gpio@55000058 {$/;"	l
port10x	arch/arm/dts/uniphier-pro5.dtsi	/^	port10x: gpio@55000058 {$/;"	l
port10x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port10x: gpio@55000058 {$/;"	l
port10x	arch/arm/dts/uniphier-sld3.dtsi	/^		port10x: gpio@55000058 {$/;"	l
port10x	arch/arm/dts/uniphier-sld8.dtsi	/^	port10x: gpio@55000058 {$/;"	l
port11x	arch/arm/dts/uniphier-ld4.dtsi	/^	port11x: gpio@55000060 {$/;"	l
port11x	arch/arm/dts/uniphier-pro4.dtsi	/^	port11x: gpio@55000060 {$/;"	l
port11x	arch/arm/dts/uniphier-pro5.dtsi	/^	port11x: gpio@55000060 {$/;"	l
port11x	arch/arm/dts/uniphier-sld3.dtsi	/^		port11x: gpio@55000060 {$/;"	l
port11x	arch/arm/dts/uniphier-sld8.dtsi	/^	port11x: gpio@55000060 {$/;"	l
port12x	arch/arm/dts/uniphier-ld4.dtsi	/^	port12x: gpio@55000068 {$/;"	l
port12x	arch/arm/dts/uniphier-pro4.dtsi	/^	port12x: gpio@55000068 {$/;"	l
port12x	arch/arm/dts/uniphier-pro5.dtsi	/^	port12x: gpio@55000068 {$/;"	l
port12x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port12x: gpio@55000068 {$/;"	l
port12x	arch/arm/dts/uniphier-sld3.dtsi	/^		port12x: gpio@55000068 {$/;"	l
port12x	arch/arm/dts/uniphier-sld8.dtsi	/^	port12x: gpio@55000068 {$/;"	l
port13x	arch/arm/dts/uniphier-ld4.dtsi	/^	port13x: gpio@55000070 {$/;"	l
port13x	arch/arm/dts/uniphier-pro4.dtsi	/^	port13x: gpio@55000070 {$/;"	l
port13x	arch/arm/dts/uniphier-pro5.dtsi	/^	port13x: gpio@55000070 {$/;"	l
port13x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port13x: gpio@55000070 {$/;"	l
port13x	arch/arm/dts/uniphier-sld3.dtsi	/^		port13x: gpio@55000070 {$/;"	l
port13x	arch/arm/dts/uniphier-sld8.dtsi	/^	port13x: gpio@55000070 {$/;"	l
port14x	arch/arm/dts/uniphier-ld4.dtsi	/^	port14x: gpio@55000078 {$/;"	l
port14x	arch/arm/dts/uniphier-pro4.dtsi	/^	port14x: gpio@55000078 {$/;"	l
port14x	arch/arm/dts/uniphier-pro5.dtsi	/^	port14x: gpio@55000078 {$/;"	l
port14x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port14x: gpio@55000078 {$/;"	l
port14x	arch/arm/dts/uniphier-sld3.dtsi	/^		port14x: gpio@55000078 {$/;"	l
port14x	arch/arm/dts/uniphier-sld8.dtsi	/^	port14x: gpio@55000078 {$/;"	l
port15x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port15x: gpio@55000080 {$/;"	l
port16x	arch/arm/dts/uniphier-ld4.dtsi	/^	port16x: gpio@55000088 {$/;"	l
port16x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port16x: gpio@55000088 {$/;"	l
port16x	arch/arm/dts/uniphier-sld3.dtsi	/^		port16x: gpio@55000088 {$/;"	l
port16x	arch/arm/dts/uniphier-sld8.dtsi	/^	port16x: gpio@55000088 {$/;"	l
port17x	arch/arm/dts/uniphier-pro4.dtsi	/^	port17x: gpio@550000a0 {$/;"	l
port17x	arch/arm/dts/uniphier-pro5.dtsi	/^	port17x: gpio@550000a0 {$/;"	l
port17x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port17x: gpio@550000a0 {$/;"	l
port18x	arch/arm/dts/uniphier-pro4.dtsi	/^	port18x: gpio@550000a8 {$/;"	l
port18x	arch/arm/dts/uniphier-pro5.dtsi	/^	port18x: gpio@550000a8 {$/;"	l
port18x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port18x: gpio@550000a8 {$/;"	l
port19x	arch/arm/dts/uniphier-pro4.dtsi	/^	port19x: gpio@550000b0 {$/;"	l
port19x	arch/arm/dts/uniphier-pro5.dtsi	/^	port19x: gpio@550000b0 {$/;"	l
port19x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port19x: gpio@550000b0 {$/;"	l
port1_gen3_dtle	arch/x86/cpu/broadwell/sata.c	/^	uint port1_gen3_dtle;$/;"	m	struct:sata_platdata	typeref:typename:uint	file:
port1_gen3_tx	arch/x86/cpu/broadwell/sata.c	/^	uint port1_gen3_tx;$/;"	m	struct:sata_platdata	typeref:typename:uint	file:
port1_status	drivers/usb/musb-new/musb_core.h	/^	u32			port1_status;$/;"	m	struct:musb	typeref:typename:u32
port1sel	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	port1sel;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
port1sel	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	port1sel;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
port1sel	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	port1sel;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
port1x	arch/arm/dts/uniphier-ld4.dtsi	/^	port1x: gpio@55000010 {$/;"	l
port1x	arch/arm/dts/uniphier-pro4.dtsi	/^	port1x: gpio@55000010 {$/;"	l
port1x	arch/arm/dts/uniphier-pro5.dtsi	/^	port1x: gpio@55000010 {$/;"	l
port1x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port1x: gpio@55000010 {$/;"	l
port1x	arch/arm/dts/uniphier-sld3.dtsi	/^		port1x: gpio@55000010 {$/;"	l
port1x	arch/arm/dts/uniphier-sld8.dtsi	/^	port1x: gpio@55000010 {$/;"	l
port2	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^				port2: port@2 {$/;"	l	label:switch
port2	include/fsl_usb.h	/^	struct ccsr_usb_port_ctrl port2;$/;"	m	struct:ccsr_usb_phy	typeref:struct:ccsr_usb_port_ctrl
port20x	arch/arm/dts/uniphier-pro4.dtsi	/^	port20x: gpio@550000b8 {$/;"	l
port20x	arch/arm/dts/uniphier-pro5.dtsi	/^	port20x: gpio@550000b8 {$/;"	l
port20x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port20x: gpio@550000b8 {$/;"	l
port21x	arch/arm/dts/uniphier-pro4.dtsi	/^	port21x: gpio@550000c0 {$/;"	l
port21x	arch/arm/dts/uniphier-pro5.dtsi	/^	port21x: gpio@550000c0 {$/;"	l
port21x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port21x: gpio@550000c0 {$/;"	l
port22x	arch/arm/dts/uniphier-pro4.dtsi	/^	port22x: gpio@550000c8 {$/;"	l
port22x	arch/arm/dts/uniphier-pro5.dtsi	/^	port22x: gpio@550000c8 {$/;"	l
port22x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port22x: gpio@550000c8 {$/;"	l
port23x	arch/arm/dts/uniphier-pro4.dtsi	/^	port23x: gpio@550000d0 {$/;"	l
port23x	arch/arm/dts/uniphier-pro5.dtsi	/^	port23x: gpio@550000d0 {$/;"	l
port23x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port23x: gpio@550000d0 {$/;"	l
port24x	arch/arm/dts/uniphier-pro4.dtsi	/^	port24x: gpio@550000d8 {$/;"	l
port24x	arch/arm/dts/uniphier-pro5.dtsi	/^	port24x: gpio@550000d8 {$/;"	l
port24x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port24x: gpio@550000d8 {$/;"	l
port25x	arch/arm/dts/uniphier-pro4.dtsi	/^	port25x: gpio@550000e0 {$/;"	l
port25x	arch/arm/dts/uniphier-pro5.dtsi	/^	port25x: gpio@550000e0 {$/;"	l
port25x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port25x: gpio@550000e0 {$/;"	l
port26x	arch/arm/dts/uniphier-pro4.dtsi	/^	port26x: gpio@550000e8 {$/;"	l
port26x	arch/arm/dts/uniphier-pro5.dtsi	/^	port26x: gpio@550000e8 {$/;"	l
port26x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port26x: gpio@550000e8 {$/;"	l
port27x	arch/arm/dts/uniphier-pro4.dtsi	/^	port27x: gpio@550000f0 {$/;"	l
port27x	arch/arm/dts/uniphier-pro5.dtsi	/^	port27x: gpio@550000f0 {$/;"	l
port27x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port27x: gpio@550000f0 {$/;"	l
port28x	arch/arm/dts/uniphier-pro4.dtsi	/^	port28x: gpio@550000f8 {$/;"	l
port28x	arch/arm/dts/uniphier-pro5.dtsi	/^	port28x: gpio@550000f8 {$/;"	l
port28x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port28x: gpio@550000f8 {$/;"	l
port29x	arch/arm/dts/uniphier-pro4.dtsi	/^	port29x: gpio@55000100 {$/;"	l
port29x	arch/arm/dts/uniphier-pro5.dtsi	/^	port29x: gpio@55000100 {$/;"	l
port2x	arch/arm/dts/uniphier-ld4.dtsi	/^	port2x: gpio@55000018 {$/;"	l
port2x	arch/arm/dts/uniphier-pro4.dtsi	/^	port2x: gpio@55000018 {$/;"	l
port2x	arch/arm/dts/uniphier-pro5.dtsi	/^	port2x: gpio@55000018 {$/;"	l
port2x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port2x: gpio@55000018 {$/;"	l
port2x	arch/arm/dts/uniphier-sld3.dtsi	/^		port2x: gpio@55000018 {$/;"	l
port2x	arch/arm/dts/uniphier-sld8.dtsi	/^	port2x: gpio@55000018 {$/;"	l
port3	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^				port3: port@3 {$/;"	l	label:switch
port30x	arch/arm/dts/uniphier-pro4.dtsi	/^	port30x: gpio@55000108 {$/;"	l
port30x	arch/arm/dts/uniphier-pro5.dtsi	/^	port30x: gpio@55000108 {$/;"	l
port3x	arch/arm/dts/uniphier-ld4.dtsi	/^	port3x: gpio@55000020 {$/;"	l
port3x	arch/arm/dts/uniphier-pro4.dtsi	/^	port3x: gpio@55000020 {$/;"	l
port3x	arch/arm/dts/uniphier-pro5.dtsi	/^	port3x: gpio@55000020 {$/;"	l
port3x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port3x: gpio@55000020 {$/;"	l
port3x	arch/arm/dts/uniphier-sld3.dtsi	/^		port3x: gpio@55000020 {$/;"	l
port3x	arch/arm/dts/uniphier-sld8.dtsi	/^	port3x: gpio@55000020 {$/;"	l
port4	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^				port4: port@4 {$/;"	l	label:switch
port4	arch/arm/dts/uniphier-ld4.dtsi	/^	port4: gpio@55000028 {$/;"	l
port4	arch/arm/dts/uniphier-pro4.dtsi	/^	port4: gpio@55000028 {$/;"	l
port4	arch/arm/dts/uniphier-pro5.dtsi	/^	port4: gpio@55000028 {$/;"	l
port4	arch/arm/dts/uniphier-pxs2.dtsi	/^	port4: gpio@55000028 {$/;"	l
port4	arch/arm/dts/uniphier-sld3.dtsi	/^		port4: gpio@55000028 {$/;"	l
port4	arch/arm/dts/uniphier-sld8.dtsi	/^	port4: gpio@55000028 {$/;"	l
port5x	arch/arm/dts/uniphier-ld4.dtsi	/^	port5x: gpio@55000030 {$/;"	l
port5x	arch/arm/dts/uniphier-pro4.dtsi	/^	port5x: gpio@55000030 {$/;"	l
port5x	arch/arm/dts/uniphier-pro5.dtsi	/^	port5x: gpio@55000030 {$/;"	l
port5x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port5x: gpio@55000030 {$/;"	l
port5x	arch/arm/dts/uniphier-sld3.dtsi	/^		port5x: gpio@55000030 {$/;"	l
port5x	arch/arm/dts/uniphier-sld8.dtsi	/^	port5x: gpio@55000030 {$/;"	l
port6x	arch/arm/dts/uniphier-ld4.dtsi	/^	port6x: gpio@55000038 {$/;"	l
port6x	arch/arm/dts/uniphier-pro4.dtsi	/^	port6x: gpio@55000038 {$/;"	l
port6x	arch/arm/dts/uniphier-pro5.dtsi	/^	port6x: gpio@55000038 {$/;"	l
port6x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port6x: gpio@55000038 {$/;"	l
port6x	arch/arm/dts/uniphier-sld3.dtsi	/^		port6x: gpio@55000038 {$/;"	l
port6x	arch/arm/dts/uniphier-sld8.dtsi	/^	port6x: gpio@55000038 {$/;"	l
port7x	arch/arm/dts/uniphier-ld4.dtsi	/^	port7x: gpio@55000040 {$/;"	l
port7x	arch/arm/dts/uniphier-pro4.dtsi	/^	port7x: gpio@55000040 {$/;"	l
port7x	arch/arm/dts/uniphier-pro5.dtsi	/^	port7x: gpio@55000040 {$/;"	l
port7x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port7x: gpio@55000040 {$/;"	l
port7x	arch/arm/dts/uniphier-sld3.dtsi	/^		port7x: gpio@55000040 {$/;"	l
port7x	arch/arm/dts/uniphier-sld8.dtsi	/^	port7x: gpio@55000040 {$/;"	l
port8	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^				port8: port@8 {$/;"	l	label:switch
port8x	arch/arm/dts/uniphier-ld4.dtsi	/^	port8x: gpio@55000048 {$/;"	l
port8x	arch/arm/dts/uniphier-pro4.dtsi	/^	port8x: gpio@55000048 {$/;"	l
port8x	arch/arm/dts/uniphier-pro5.dtsi	/^	port8x: gpio@55000048 {$/;"	l
port8x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port8x: gpio@55000048 {$/;"	l
port8x	arch/arm/dts/uniphier-sld3.dtsi	/^		port8x: gpio@55000048 {$/;"	l
port8x	arch/arm/dts/uniphier-sld8.dtsi	/^	port8x: gpio@55000048 {$/;"	l
port9x	arch/arm/dts/uniphier-ld4.dtsi	/^	port9x: gpio@55000050 {$/;"	l
port9x	arch/arm/dts/uniphier-pro4.dtsi	/^	port9x: gpio@55000050 {$/;"	l
port9x	arch/arm/dts/uniphier-pro5.dtsi	/^	port9x: gpio@55000050 {$/;"	l
port9x	arch/arm/dts/uniphier-pxs2.dtsi	/^	port9x: gpio@55000050 {$/;"	l
port9x	arch/arm/dts/uniphier-sld3.dtsi	/^		port9x: gpio@55000050 {$/;"	l
port9x	arch/arm/dts/uniphier-sld8.dtsi	/^	port9x: gpio@55000050 {$/;"	l
port_aggr_set	include/ethsw.h	/^	int (*port_aggr_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_aggr_show	include/ethsw.h	/^	int (*port_aggr_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_bridge_ctrl	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 port_bridge_ctrl;	\/* 0xAC *\/$/;"	m	struct:misc_regs	typeref:typename:u32
port_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	port_cfg;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
port_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	port_cfg;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
port_cfg	include/vsc9953.h	/^	u32	port_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
port_change	drivers/usb/host/r8a66597.h	/^	unsigned short port_change;$/;"	m	struct:r8a66597	typeref:typename:unsigned short
port_config	include/mpc5xxx.h	/^	volatile u32 port_config;	\/* GPIO + 0x00 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u32
port_count	drivers/gpio/tegra186_gpio.c	/^	uint32_t port_count;$/;"	m	struct:tegra186_gpio_ctlr_data	typeref:typename:uint32_t	file:
port_disable	include/ethsw.h	/^	int (*port_disable)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_dscp_cfg	include/vsc9953.h	/^	u32	port_dscp_cfg;$/;"	m	struct:vsc9953_rew_port	typeref:typename:u32
port_egr_vlan_set	include/ethsw.h	/^	int (*port_egr_vlan_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_egr_vlan_show	include/ethsw.h	/^	int (*port_egr_vlan_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_enable	include/ethsw.h	/^	int (*port_enable)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_exp	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t const port_exp[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
port_exp_direction_output	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static int port_exp_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int	file:
port_exp_direction_output	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static int port_exp_direction_output(unsigned gpio, int value)$/;"	f	typeref:typename:int	file:
port_fer	arch/blackfin/cpu/gpio.c	/^static unsigned short * const port_fer[] = {$/;"	v	typeref:typename:unsigned short * const[]	file:
port_fer	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned short port_fer;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
port_fer	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long port_fer;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
port_fer_clear	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long port_fer_clear;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
port_fer_set	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long port_fer_set;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
port_grp_id	include/vsc9953.h	/^	u32	port_grp_id[91];$/;"	m	struct:vsc9953_ana_pgid	typeref:typename:u32[91]
port_id	drivers/serial/serial_linflexuart.c	/^	u8 port_id; \/* do we need this? *\/$/;"	m	struct:linflex_serial_platdata	typeref:typename:u8	file:
port_id	drivers/serial/serial_s5p.c	/^	u8 port_id;     \/* uart port number *\/$/;"	m	struct:s5p_serial_platdata	typeref:typename:u8	file:
port_id_tbl	include/vsc9953.h	/^	struct vsc9953_ana_pgid	port_id_tbl;$/;"	m	struct:vsc9953_analyzer	typeref:struct:vsc9953_ana_pgid
port_info	drivers/net/sh_eth.h	/^	struct sh_eth_info port_info[MAX_PORT_NUM];$/;"	m	struct:sh_eth_dev	typeref:struct:sh_eth_info[]
port_info	drivers/usb/host/xhci.h	/^	u32	port_info;$/;"	m	struct:xhci_protocol_caps	typeref:typename:u32
port_ingr_filt_set	include/ethsw.h	/^	int (*port_ingr_filt_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_ingr_filt_show	include/ethsw.h	/^	int (*port_ingr_filt_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_init_mac_tables	drivers/net/mvgbe.c	/^static void port_init_mac_tables(struct mvgbe_registers *regs)$/;"	f	typeref:typename:void	file:
port_learn	include/ethsw.h	/^	int (*port_learn)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_learn_mode	drivers/net/vsc9953.c	/^enum port_learn_mode {$/;"	g	file:
port_learn_show	include/ethsw.h	/^	int (*port_learn_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_list	drivers/net/mvpp2.c	/^	struct mvpp2_port **port_list;$/;"	m	struct:mvpp2	typeref:struct:mvpp2_port **	file:
port_map	arch/x86/cpu/broadwell/sata.c	/^	int port_map;$/;"	m	struct:sata_platdata	typeref:typename:int	file:
port_map	drivers/net/mvpp2.c	/^	u32 port_map;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:u32	file:
port_map	include/ahci.h	/^	u32	port_map; \/* cache of HOST_PORTS_IMPL reg *\/$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
port_misc	include/vsc9953.h	/^	u32	port_misc;$/;"	m	struct:vsc9953_dev_gmii_port_mode	typeref:typename:u32
port_mmio	include/ahci.h	/^	void __iomem	*port_mmio;$/;"	m	struct:ahci_ioports	typeref:typename:void __iomem *
port_mode	arch/arm/include/asm/ehci-omap.h	/^	enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];$/;"	m	struct:omap_usbhs_board_data	typeref:enum:usbhs_omap_port_mode[]
port_mode	include/vsc9953.h	/^	struct vsc9953_dev_gmii_port_mode	port_mode;$/;"	m	struct:vsc9953_dev_gmii	typeref:struct:vsc9953_dev_gmii_port_mode
port_mode	include/vsc9953.h	/^	u32	port_mode[12];$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32[12]
port_mode	include/vsc9953.h	/^	u32	port_mode[12];$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32[12]
port_mode	include/vsc9953.h	/^	u32	port_mode[12];$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32[12]
port_mux	arch/blackfin/cpu/gpio.c	/^static unsigned short * const port_mux[] = {$/;"	v	typeref:typename:unsigned short * const[]	file:
port_mux	arch/blackfin/include/asm/mach-bf548/gpio.h	/^	unsigned int port_mux;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned int
port_mux	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long port_mux;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
port_mux_lut	arch/blackfin/cpu/gpio.c	/^} port_mux_lut[] = {$/;"	v	typeref:struct:__anonb4c211320208[]
port_name	arch/arm/include/asm/arch-vf610/gpio.h	/^	const char *port_name;$/;"	m	struct:vybrid_gpio_platdata	typeref:typename:const char *
port_name	arch/arm/include/asm/omap_gpio.h	/^	const char *port_name;$/;"	m	struct:omap_gpio_platdata	typeref:typename:const char *
port_name	drivers/gpio/tegra_gpio.c	/^	const char *port_name;	\/* Name of port, e.g. "B" *\/$/;"	m	struct:tegra_gpio_platdata	typeref:typename:const char *	file:
port_no	drivers/block/pata_bfin.h	/^	unsigned int port_no;		\/* primary=0, secondary=1       *\/$/;"	m	struct:ata_port	typeref:typename:unsigned int
port_no	drivers/block/sata_dwc.h	/^	unsigned int		port_no;$/;"	m	struct:ata_port	typeref:typename:unsigned int
port_no	drivers/block/sata_sil3114.h	/^	unsigned char port_no;	\/* primary=0, secondary=1       *\/$/;"	m	struct:sata_port	typeref:typename:unsigned char
port_num	drivers/net/bcm-sf2-eth.h	/^	int port_num;$/;"	m	struct:eth_info	typeref:typename:int
port_num	include/usb/ulpi.h	/^	u32 port_num;$/;"	m	struct:ulpi_viewport	typeref:typename:u32
port_number	include/vbe.h	/^	u8 port_number;	\/* i.e. monitor number *\/$/;"	m	struct:vbe_ddc_info	typeref:typename:u8
port_ops	drivers/block/sata_dwc.h	/^	const struct ata_port_operations *port_ops;$/;"	m	struct:ata_port_info	typeref:typename:const struct ata_port_operations *
port_pcp_dei_qos_map_cfg	include/vsc9953.h	/^	u32	port_pcp_dei_qos_map_cfg[16];$/;"	m	struct:vsc9953_rew_port	typeref:typename:u32[16]
port_port_cfg	include/vsc9953.h	/^	u32	port_port_cfg;$/;"	m	struct:vsc9953_rew_port	typeref:typename:u32
port_reset	drivers/usb/phy/rockchip_usb2_phy.c	/^	struct usb2phy_reg port_reset;$/;"	m	struct:rockchip_usb2_phy_cfg	typeref:struct:usb2phy_reg	file:
port_sc1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint port_sc1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
port_select	drivers/video/broadwell_igd.c	/^	int port_select;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
port_setup	arch/blackfin/cpu/gpio.c	/^static void port_setup(unsigned gpio, unsigned short usage)$/;"	f	typeref:typename:void	file:
port_setup	drivers/gpio/adi_gpio2.c	/^static void port_setup(unsigned gpio, unsigned short usage)$/;"	f	typeref:typename:void	file:
port_show	include/ethsw.h	/^	int (*port_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_state	drivers/block/sata_sil3114.h	/^	unsigned char port_state;	\/* 1-port is available and      *\/$/;"	m	struct:sata_port	typeref:typename:unsigned char
port_stats	include/ethsw.h	/^	int (*port_stats)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_stats_clear	include/ethsw.h	/^	int (*port_stats_clear)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_status	drivers/usb/host/r8a66597.h	/^	unsigned short port_status;$/;"	m	struct:r8a66597	typeref:typename:unsigned short
port_status	drivers/usb/musb/musb_hcd.c	/^static u32 port_status;$/;"	v	typeref:typename:u32	file:
port_tag_cfg	include/vsc9953.h	/^	u32	port_tag_cfg;$/;"	m	struct:vsc9953_rew_port	typeref:typename:u32
port_task_data	drivers/block/sata_dwc.h	/^	void			*port_task_data;$/;"	m	struct:ata_port	typeref:typename:void *
port_to_devdisr	drivers/net/fm/b4860.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_to_devdisr	drivers/net/fm/ls1043.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_to_devdisr	drivers/net/fm/ls1046.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_to_devdisr	drivers/net/fm/p1023.c	/^static u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]	file:
port_to_devdisr	drivers/net/fm/p4080.c	/^static u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]	file:
port_to_devdisr	drivers/net/fm/p5020.c	/^static u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]	file:
port_to_devdisr	drivers/net/fm/p5040.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_to_devdisr	drivers/net/fm/t1024.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_to_devdisr	drivers/net/fm/t2080.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_to_devdisr	drivers/net/fm/t4240.c	/^u32 port_to_devdisr[] = {$/;"	v	typeref:typename:u32[]
port_uc_addr	drivers/net/mvgbe.c	/^static int port_uc_addr(struct mvgbe_registers *regs, u8 uc_nibble,$/;"	f	typeref:typename:int	file:
port_uc_addr_set	drivers/net/mvgbe.c	/^static void port_uc_addr_set(struct mvgbe_registers *regs, u8 * p_addr)$/;"	f	typeref:typename:void	file:
port_untag_set	include/ethsw.h	/^	int (*port_untag_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_untag_show	include/ethsw.h	/^	int (*port_untag_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
port_vlan	drivers/net/cpsw.c	/^	u32	port_vlan;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
port_vlan	drivers/net/cpsw.c	/^	u32	port_vlan;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
port_vlan_cfg	include/vsc9953.h	/^	u32	port_vlan_cfg;$/;"	m	struct:vsc9953_rew_port	typeref:typename:u32
porta	arch/arm/dts/socfpga.dtsi	/^			porta: gpio-controller@0 {$/;"	l	label:gpio0
porta_eoi	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 porta_eoi;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
portal_id	include/fsl-mc/fsl_dprc.h	/^	int portal_id;$/;"	m	struct:dprc_attributes	typeref:typename:int
portal_id	include/fsl-mc/fsl_dprc.h	/^	int portal_id;$/;"	m	struct:dprc_cfg	typeref:typename:int
portb	arch/arm/dts/socfpga.dtsi	/^			portb: gpio-controller@0 {$/;"	l	label:gpio1
portbase	drivers/block/sata_sil.h	/^	int portbase;$/;"	m	struct:sata_info	typeref:typename:int
portc	arch/arm/dts/socfpga.dtsi	/^			portc: gpio-controller@0 {$/;"	l	label:gpio2
portid	arch/powerpc/include/asm/fsl_liodn.h	/^	u8 portid;$/;"	m	struct:srio_liodn_id_table	typeref:typename:u8
portmask	drivers/ddr/altera/sdram.c	/^	u32	portmask;$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
portmux_enable_ebi	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width,$/;"	f	typeref:typename:void
portmux_enable_lcdc	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_lcdc(int pin_config)$/;"	f	typeref:typename:void
portmux_enable_macb0	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_macb0(unsigned long flags, unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_macb1	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_macb1(unsigned long flags, unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_mmci	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_mmci(unsigned int slot, unsigned long flags,$/;"	f	typeref:typename:void
portmux_enable_spi0	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_spi1	arch/avr32/cpu/at32ap700x/portmux.c	/^void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_usart0	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^static inline void portmux_enable_usart0(unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_usart1	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^static inline void portmux_enable_usart1(unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_usart2	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^static inline void portmux_enable_usart2(unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_enable_usart3	arch/avr32/include/asm/arch-at32ap700x/portmux.h	/^static inline void portmux_enable_usart3(unsigned long drive_strength)$/;"	f	typeref:typename:void
portmux_function	arch/avr32/include/asm/arch-common/portmux-pio.h	/^enum portmux_function {$/;"	g
portmux_select_gpio	arch/avr32/cpu/portmux-gpio.c	/^void portmux_select_gpio(void *port, unsigned long pin_mask,$/;"	f	typeref:typename:void
portmux_select_gpio	arch/avr32/cpu/portmux-pio.c	/^void portmux_select_gpio(void *port, unsigned long pin_mask,$/;"	f	typeref:typename:void
portmux_select_peripheral	arch/avr32/cpu/portmux-gpio.c	/^void portmux_select_peripheral(void *port, unsigned long pin_mask,$/;"	f	typeref:typename:void
portmux_select_peripheral	arch/avr32/cpu/portmux-pio.c	/^void portmux_select_peripheral(void *port, unsigned long pin_mask,$/;"	f	typeref:typename:void
portmux_setup	arch/blackfin/cpu/gpio.c	/^# define portmux_setup(/;"	d	file:
portmux_setup	arch/blackfin/cpu/gpio.c	/^inline void portmux_setup(unsigned short per)$/;"	f	typeref:typename:void
portmux_setup	arch/blackfin/cpu/gpio.c	/^static void portmux_setup(unsigned short per)$/;"	f	typeref:typename:void	file:
portmux_setup	drivers/gpio/adi_gpio2.c	/^inline void portmux_setup(unsigned short per)$/;"	f	typeref:typename:void
portnr	drivers/usb/host/ehci-mx6.c	/^	int portnr;$/;"	m	struct:ehci_mx6_priv_data	typeref:typename:int	file:
portnr	drivers/usb/host/ehci-vf.c	/^	u32 portnr;$/;"	m	struct:ehci_vf_priv_data	typeref:typename:u32	file:
portnr	include/usb.h	/^	int portnr;			\/* Port number, 1=first *\/$/;"	m	struct:usb_device	typeref:typename:int
portnum	drivers/video/tegra124/sor.c	/^	u8 portnum;	\/* 0 or 1 *\/$/;"	m	struct:tegra_dc_sor_data	typeref:typename:u8	file:
portregs	drivers/usb/host/xhci.h	/^	struct xhci_hcor_port_regs portregs[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS];$/;"	m	struct:xhci_hcor	typeref:struct:xhci_hcor_port_regs[]
portreset	drivers/usb/host/ehci.h	/^	uint16_t portreset;$/;"	m	struct:ehci_ctrl	typeref:typename:uint16_t
ports	drivers/block/sata_dwc.h	/^	struct ata_port		*ports[0];$/;"	m	struct:ata_host	typeref:struct:ata_port * [0]
ports	drivers/gpio/tegra186_gpio.c	/^	const struct tegra186_gpio_port_data *ports;$/;"	m	struct:tegra186_gpio_ctlr_data	typeref:typename:const struct tegra186_gpio_port_data *	file:
ports	drivers/pci/pci_tegra.c	/^	struct list_head ports;$/;"	m	struct:tegra_pcie	typeref:struct:list_head	file:
ports_dot_h	board/esd/common/xilinx_jtag/ports.h	/^#define ports_dot_h$/;"	d
portsc	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 portsc;		\/* portsc *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
portsc	drivers/usb/gadget/ci_udc.h	/^	u32 portsc;		\/* 0x174 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
portsc	drivers/usb/gadget/ci_udc.h	/^	u32 portsc;		\/* 0x184 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
portsc	include/usb/ehci-ci.h	/^	u32	portsc;		\/* 0x184 - Port status\/control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
portsc1	arch/m68k/include/asm/immap_5329.h	/^	u32 portsc1;		\/* 0x184 Port Status\/Control *\/$/;"	m	struct:usb_otg	typeref:typename:u32
portsc_i	arch/arm/include/asm/ehci-omap.h	/^	u32 portsc_i;		\/* 0x54 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
portsel	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	portsel;$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short
portsel	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	portsel;$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short
portsel	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	portsel;$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short
portspeed	cmd/usb.c	/^static inline char *portspeed(int speed)$/;"	f	typeref:typename:char *	file:
portspeed	common/usb_hub.c	/^static inline char *portspeed(int portstatus)$/;"	f	typeref:typename:char *	file:
portstate	drivers/usb/musb-new/am35x.c	/^#define portstate(/;"	d	file:
portstatus	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^		__u32	portstatus[MAX_ROOT_PORTS];$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32[]
portstatus	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^		__u32	portstatus[MAX_ROOT_PORTS];$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32[]
portstatus	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^		__u32 portstatus[MAX_ROOT_PORTS];$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32[]
portstatus	drivers/usb/host/ohci-s3c24xx.h	/^		__u32 portstatus[MAX_ROOT_PORTS];$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32[]
portstatus	drivers/usb/host/ohci.h	/^		__u32	portstatus[CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS];$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32[]
portwidth	include/flash.h	/^	uchar	portwidth;		\/* the width of the port		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:uchar
porz	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int porz;$/;"	m	struct:pad_signals	typeref:typename:int
pos	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pos;			\/* _WIN_POSITION_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
pos	drivers/misc/pdsp188x.c	/^static int pos; \/* Current display position *\/$/;"	v	typeref:typename:int	file:
pos	drivers/video/console_truetype.c	/^	struct pos_info pos[POS_HISTORY_SIZE];$/;"	m	struct:console_tt_priv	typeref:struct:pos_info[]	file:
pos	include/jffs2/mini_inflate.h	/^	int *pos;	 \/* the symbol that first represents (in the symbols$/;"	m	struct:huffman_set	typeref:typename:int *
pos	lib/lzma/Types.h	/^  size_t pos;$/;"	m	struct:__anonf2a2f1b90808	typeref:typename:size_t
pos_divisor	arch/sh/lib/udivsi3_i4i-Os.S	/^pos_divisor:$/;"	l
pos_divisor	arch/sh/lib/udivsi3_i4i.S	/^pos_divisor:$/;"	l
pos_info	drivers/video/console_truetype.c	/^struct pos_info {$/;"	s	file:
pos_last_openparen	scripts/checkpatch.pl	/^sub pos_last_openparen {$/;"	s
pos_ptr	drivers/video/console_truetype.c	/^	int pos_ptr;$/;"	m	struct:console_tt_priv	typeref:typename:int	file:
pos_result	arch/sh/lib/udivsi3_i4i-Os.S	/^pos_result:$/;"	l
pos_result	arch/sh/lib/udivsi3_i4i.S	/^pos_result:$/;"	l
position	fs/yaffs2/yaffsfs.c	/^	loff_t position;	\/* current position in file *\/$/;"	m	struct:yaffsfs_FileDes	typeref:typename:loff_t	file:
position_indicator	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color position_indicator;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
posneg	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 posneg;$/;"	m	struct:rcar_gpio	typeref:typename:u32
posr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 posr;	\/*0x0010*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
possible	scripts/checkpatch.pl	/^sub possible {$/;"	s
post	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t post;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
post	include/ACEX1K.h	/^	Altera_post_fn		post;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_post_fn
post	include/ACEX1K.h	/^	Altera_post_fn		post;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_post_fn
post	include/altera.h	/^	Altera_post_fn post;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_post_fn
post	include/spartan2.h	/^	xilinx_post_fn	post;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_post_fn
post	include/spartan2.h	/^	xilinx_post_fn	post;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_post_fn
post	include/spartan3.h	/^	xilinx_post_fn	post;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_post_fn
post	include/spartan3.h	/^	xilinx_post_fn	post;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_post_fn
post	include/virtex2.h	/^	xilinx_post_fn	post;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_post_fn
post_bind	include/dm/uclass.h	/^	int (*post_bind)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
post_bootmode_get	post/post.c	/^int post_bootmode_get(unsigned int *last_test)$/;"	f	typeref:typename:int
post_bootmode_init	post/post.c	/^void post_bootmode_init(void)$/;"	f	typeref:typename:void
post_bootmode_test_off	post/post.c	/^static void post_bootmode_test_off(void)$/;"	f	typeref:typename:void	file:
post_bootmode_test_on	post/post.c	/^static void post_bootmode_test_on(unsigned int last_test)$/;"	f	typeref:typename:void	file:
post_code	arch/x86/include/asm/arch-quark/mrc.h	/^	uint16_t post_code;$/;"	m	struct:mem_init	typeref:typename:uint16_t
post_code	arch/x86/include/asm/post.h	/^static inline void post_code(int code)$/;"	f	typeref:typename:void
post_ctl	board/freescale/common/qixis.h	/^	u8 post_ctl;$/;"	m	struct:qixis	typeref:typename:u8
post_dat	board/freescale/common/qixis.h	/^	u8 post_dat[2];$/;"	m	struct:qixis	typeref:typename:u8[2]
post_div	drivers/video/ati_radeon_fb.h	/^	int		post_div;$/;"	m	struct:radeon_regs	typeref:typename:int
post_div_2	drivers/video/ati_radeon_fb.h	/^	int		post_div_2;$/;"	m	struct:radeon_regs	typeref:typename:int
post_dsp_hact_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 post_dsp_hact_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
post_dsp_vact_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 post_dsp_vact_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
post_dsp_vact_info_f1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 post_dsp_vact_info_f1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
post_get_env_flags	post/post.c	/^static void post_get_env_flags(int *test_flags)$/;"	f	typeref:typename:void	file:
post_get_flags	post/post.c	/^static void post_get_flags(int *test_flags)$/;"	f	typeref:typename:void	file:
post_hotkeys_pressed	board/ifm/o2dnt2/o2dnt2.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	board/keymile/km83xx/km83xx.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	board/keymile/km_arm/km_arm.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	board/keymile/kmp204x/kmp204x.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	board/liebherr/lwmon5/kbd.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	board/tqc/tqm5200/tqm5200.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	board/xes/xpedite1000/xpedite1000.c	/^int post_hotkeys_pressed(void)$/;"	f	typeref:typename:int
post_hotkeys_pressed	post/post.c	/^__weak int post_hotkeys_pressed(void)$/;"	f	typeref:typename:__weak int
post_info	post/post.c	/^int post_info(char *name)$/;"	f	typeref:typename:int
post_info_single	post/post.c	/^static int post_info_single(struct post_test *test, int full)$/;"	f	typeref:typename:int	file:
post_init_f	post/post.c	/^int post_init_f(void)$/;"	f	typeref:typename:int
post_init_f_time	include/asm-generic/global_data.h	/^	unsigned long post_init_f_time;	\/* When post_init_f started *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
post_init_pll	board/bf537-stamp/post-memory.c	/^void post_init_pll(int mult, int div)$/;"	f	typeref:typename:void
post_init_sdram	board/bf537-stamp/post-memory.c	/^int post_init_sdram(int sclk)$/;"	f	typeref:typename:int
post_init_uart	board/bf537-stamp/post-memory.c	/^void post_init_uart(int sclk)$/;"	f	typeref:typename:void
post_list	post/tests.c	/^struct post_test post_list[] =$/;"	v	typeref:struct:post_test[]
post_list_size	post/tests.c	/^unsigned int post_list_size = ARRAY_SIZE(post_list);$/;"	v	typeref:typename:unsigned int
post_log	arch/arm/mach-davinci/dm365_lowlevel.c	/^int post_log(char *format, ...)$/;"	f	typeref:typename:int
post_log	post/post.c	/^int post_log(char *format, ...)$/;"	f	typeref:typename:int
post_log_mark_start	post/post.c	/^static void post_log_mark_start(unsigned long testid)$/;"	f	typeref:typename:void	file:
post_log_mark_succ	post/post.c	/^static void post_log_mark_succ(unsigned long testid)$/;"	f	typeref:typename:void	file:
post_log_res	include/asm-generic/global_data.h	/^	unsigned long post_log_res;	\/* success of POST test *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
post_log_word	include/asm-generic/global_data.h	/^	unsigned long post_log_word;	\/* Record POST activities *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
post_out_buff	board/bf537-stamp/post-memory.c	/^void post_out_buff(char *buff)$/;"	f	typeref:typename:void
post_output_backlog	post/post.c	/^void post_output_backlog(void)$/;"	f	typeref:typename:void
post_probe	include/dm/uclass.h	/^	int (*post_probe)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
post_reloc	post/post.c	/^void post_reloc(void)$/;"	f	typeref:typename:void
post_reserved	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 post_reserved;$/;"	m	struct:rk3288_vop	typeref:typename:u32
post_root_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t post_root_clr;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
post_root_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t post_root_set;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
post_root_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t post_root_tog;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
post_run	post/post.c	/^int post_run(char *name, int flags)$/;"	f	typeref:typename:int
post_run_single	post/post.c	/^static int post_run_single(struct post_test *test,$/;"	f	typeref:typename:int	file:
post_scl_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 post_scl_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
post_scl_factor_yrgb	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 post_scl_factor_yrgb;$/;"	m	struct:rk3288_vop	typeref:typename:u32
post_stat	board/freescale/common/qixis.h	/^	u8 post_stat;$/;"	m	struct:qixis	typeref:typename:u8
post_system_agent_init	arch/x86/cpu/ivybridge/sdram.c	/^static void post_system_agent_init(struct udevice *dev, struct udevice *me_dev,$/;"	f	typeref:typename:void	file:
post_test	include/post.h	/^struct post_test {$/;"	s
post_time_ms	post/post.c	/^unsigned long post_time_ms(unsigned long base)$/;"	f	typeref:typename:unsigned long
post_word_load	board/keymile/km83xx/km83xx.c	/^ulong post_word_load(void)$/;"	f	typeref:typename:ulong
post_word_load	board/keymile/km_arm/km_arm.c	/^ulong post_word_load(void)$/;"	f	typeref:typename:ulong
post_word_load	include/post.h	/^static inline ulong post_word_load (void)$/;"	f	typeref:typename:ulong
post_word_store	board/keymile/km83xx/km83xx.c	/^void post_word_store(ulong value)$/;"	f	typeref:typename:void
post_word_store	board/keymile/km_arm/km_arm.c	/^void post_word_store(ulong value)$/;"	f	typeref:typename:void
post_word_store	include/post.h	/^static inline void post_word_store (ulong value)$/;"	f	typeref:typename:void
postcursor	drivers/video/tegra124/sor.h	/^	u32	postcursor;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
postdiv	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	postdiv;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
postdiv	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	postdiv;	\/* 0x128 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
postdiv1	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	u32 postdiv1;$/;"	m	struct:pll_div	typeref:typename:u32
postdiv1	drivers/clk/rockchip/clk_rk3399.c	/^	u32 postdiv1;$/;"	m	struct:pll_div	typeref:typename:u32	file:
postdiv2	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	u32 postdiv2;$/;"	m	struct:pll_div	typeref:typename:u32
postdiv2	drivers/clk/rockchip/clk_rk3399.c	/^	u32 postdiv2;$/;"	m	struct:pll_div	typeref:typename:u32	file:
postpad	include/linux/mtd/nand.h	/^	int postpad;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
pot	arch/powerpc/include/asm/fsl_pci.h	/^	pot_t	pot[5];		\/* 0xc00 - 0xc9f Outbound ATMU's 0, 1, 2, 3, and 4 *\/$/;"	m	struct:ccsr_pci	typeref:typename:pot_t[5]
pot	arch/powerpc/include/asm/immap_512x.h	/^	pot512x_t pot[6];$/;"	m	struct:ios512x	typeref:typename:pot512x_t[6]
pot	arch/powerpc/include/asm/immap_83xx.h	/^	pot83xx_t pot[6];$/;"	m	struct:ios83xx	typeref:typename:pot83xx_t[6]
pot512x_t	arch/powerpc/include/asm/immap_512x.h	/^} pot512x_t;$/;"	t	typeref:struct:pci_outbound_window
pot83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} pot83xx_t;$/;"	t	typeref:struct:pci_outbound_window
pot_t	arch/powerpc/include/asm/fsl_pci.h	/^} pot_t;$/;"	t	typeref:struct:pci_outbound_window
potar	arch/powerpc/include/asm/fsl_pci.h	/^	u32	potar;		\/* 0x00 - Address *\/$/;"	m	struct:pci_outbound_window	typeref:typename:u32
potar	arch/powerpc/include/asm/immap_512x.h	/^	u32 potar;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
potar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 potar;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
potar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potar0;		\/* PCIX Outbound Transaction Addr 0 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potar0;	        \/* 0x8c00 - PEX Outbound Transaction Address Register 0 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potar1;		\/* PCIX Outbound Transaction Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potar1;	        \/* 0x8c20 - PEX Outbound Transaction Address Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potar2;		\/* PCIX Outbound Transaction Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potar2;	        \/* 0x8c40 - PEX Outbound Transaction Address Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potar3;		\/* PCIX Outbound Transaction Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potar3;	        \/* 0x8c60 - PEX Outbound Transaction Address Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potar4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potar4;		\/* PCIX Outbound Transaction Addr 4 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potar4;	        \/* 0x8c80 - PEX Outbound Transaction Address Register 4 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potear	arch/powerpc/include/asm/fsl_pci.h	/^	u32	potear;		\/* 0x04 - Address Extended *\/$/;"	m	struct:pci_outbound_window	typeref:typename:u32
potear0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potear0;	\/* PCIX Outbound Translation Extended Addr 0 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potear0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potear0;	\/* 0x8c04 - PEX Outbound Translation Extended Address Register 0 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potear1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potear1;	\/* PCIX Outbound Translation Extended Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potear1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potear1;	\/* 0x8c24 - PEX Outbound Translation Extended Address Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potear2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potear2;	\/* PCIX Outbound Translation Extended Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potear2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potear2;	\/* 0x8c44 - PEX Outbound Translation Extended Address Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potear3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potear3;	\/* PCIX Outbound Translation Extended Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potear3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potear3;	\/* 0x8c64 - PEX Outbound Translation Extended Address Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potear4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	potear4;	\/* PCIX Outbound Translation Extended Addr 4 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
potear4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	potear4;	\/* 0x8c84 - PEX Outbound Translation Extended Address Register 4 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
potpgt	include/linux/usb/musb.h	/^	u8		potpgt;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:u8
pow_mod	lib/rsa/rsa-mod-exp.c	/^static int pow_mod(const struct rsa_public_key *key, uint32_t *inout)$/;"	f	typeref:typename:int	file:
powar	arch/powerpc/include/asm/fsl_pci.h	/^	u32	powar;		\/* 0x10 - Window Attributes *\/$/;"	m	struct:pci_outbound_window	typeref:typename:u32
powar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powar0;		\/* PCIX Outbound Window Attrs 0 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powar0;	        \/* 0x8c10 - PEX Outbound Window Attributes Register 0 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powar1;		\/* PCIX Outbound Window Attrs 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powar1;	        \/* 0x8c30 - PEX Outbound Window Attributes Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powar2;		\/* PCIX Outbound Window Attrs 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powar2;	        \/* 0x8c50 - PEX Outbound Window Attributes Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powar3;		\/* PCIX Outbound Window Attrs 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powar3;	        \/* 0x8c70 - PEX Outbound Window Attributes Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powar4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powar4;		\/* PCIX Outbound Window Attrs 4 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powar4;	        \/* 0x8c90 - PEX Outbound Window Attributes Register 4 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powbar	arch/powerpc/include/asm/fsl_pci.h	/^	u32	powbar;		\/* 0x08 - Window Base Address *\/$/;"	m	struct:pci_outbound_window	typeref:typename:u32
powbar0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbar0;	\/* PCIX Outbound Window Base Addr 0 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbar1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbar1;	\/* PCIX Outbound Window Base Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powbar1;	\/* 0x8c28 - PEX Outbound Window Base Address Register 1 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powbar2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbar2;	\/* PCIX Outbound Window Base Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powbar2;	\/* 0x8c48 - PEX Outbound Window Base Address Register 2 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powbar3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbar3;	\/* PCIX Outbound Window Base Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powbar3;	\/* 0x8c68 - PEX Outbound Window Base Address Register 3 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powbar4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbar4;	\/* PCIX Outbound Window Base Addr 4 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powbar4;	\/* 0x8c88 - PEX Outbound Window Base Address Register 4 *\/$/;"	m	struct:ccsr_pex	typeref:typename:uint
powbear0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbear0;	\/* PCIX Outbound Window Base Extended Addr 0 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbear1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbear1;	\/* PCIX Outbound Window Base Extended Addr 1 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbear2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbear2;	\/* PCIX Outbound Window Base Extended Addr 2 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbear3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbear3;	\/* PCIX Outbound Window Base Extended Addr 3 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powbear4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powbear4;	\/* PCIX Outbound Window Base Extended Addr 4 *\/$/;"	m	struct:ccsr_pcix	typeref:typename:u32
powctl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 powctl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
powctl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 powctl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
power	arch/arm/dts/rk3288.dtsi	/^	power: power-controller {$/;"	l
power	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 power;		\/* 0x70 *\/$/;"	m	struct:sdrc	typeref:typename:u32
power	arch/x86/include/asm/speedstep.h	/^	uint32_t power;$/;"	m	struct:sst_state	typeref:typename:uint32_t
power	drivers/mmc/arm_pl180_mmci.h	/^	u32 power;		\/* 0x00*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
power	drivers/usb/musb-new/musb_core.h	/^	u8 power;$/;"	m	struct:musb_context_registers	typeref:typename:u8
power	drivers/usb/musb/musb_core.h	/^	u8	power;$/;"	m	struct:musb_regs	typeref:typename:u8
power	include/linux/usb/musb.h	/^	u8		power;$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:u8
power_backlight_off_delay	drivers/video/broadwell_igd.c	/^	int power_backlight_off_delay;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
power_backlight_on_delay	drivers/video/broadwell_igd.c	/^	int power_backlight_on_delay;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
power_bat_init	drivers/power/battery/bat_trats.c	/^int power_bat_init(unsigned char bus)$/;"	f	typeref:typename:int
power_bat_init	drivers/power/battery/bat_trats2.c	/^int power_bat_init(unsigned char bus)$/;"	f	typeref:typename:int
power_bat_trats	drivers/power/battery/bat_trats.c	/^static struct power_battery power_bat_trats = {$/;"	v	typeref:struct:power_battery	file:
power_bat_trats2	drivers/power/battery/bat_trats2.c	/^static struct power_battery power_bat_trats2 = {$/;"	v	typeref:struct:power_battery	file:
power_battery	include/power/pmic.h	/^struct power_battery {$/;"	s
power_battery_charge	drivers/power/battery/bat_trats.c	/^static int power_battery_charge(struct pmic *bat)$/;"	f	typeref:typename:int	file:
power_battery_charge	drivers/power/battery/bat_trats2.c	/^static int power_battery_charge(struct pmic *bat)$/;"	f	typeref:typename:int	file:
power_battery_init_trats	drivers/power/battery/bat_trats.c	/^static int power_battery_init_trats(struct pmic *bat_,$/;"	f	typeref:typename:int	file:
power_battery_init_trats2	drivers/power/battery/bat_trats2.c	/^static int power_battery_init_trats2(struct pmic *bat_,$/;"	f	typeref:typename:int	file:
power_check_battery	drivers/power/fuel_gauge/fg_max17042.c	/^static int power_check_battery(struct pmic *p, struct pmic *bat)$/;"	f	typeref:typename:int	file:
power_check_battery	drivers/power/mfd/fg_max77693.c	/^static int power_check_battery(struct pmic *p, struct pmic *bat)$/;"	f	typeref:typename:int	file:
power_chrg	include/power/pmic.h	/^struct power_chrg {$/;"	s
power_chrg_get_type	drivers/power/mfd/muic_max77693.c	/^static int power_chrg_get_type(struct pmic *p)$/;"	f	typeref:typename:int	file:
power_chrg_get_type	drivers/power/pmic/muic_max8997.c	/^static int power_chrg_get_type(struct pmic *p)$/;"	f	typeref:typename:int	file:
power_chrg_muic_ops	drivers/power/mfd/muic_max77693.c	/^static struct power_chrg power_chrg_muic_ops = {$/;"	v	typeref:struct:power_chrg	file:
power_chrg_muic_ops	drivers/power/pmic/muic_max8997.c	/^static struct power_chrg power_chrg_muic_ops = {$/;"	v	typeref:struct:power_chrg	file:
power_chrg_pmic_ops	drivers/power/mfd/pmic_max77693.c	/^static struct power_chrg power_chrg_pmic_ops = {$/;"	v	typeref:struct:power_chrg	file:
power_chrg_pmic_ops	drivers/power/pmic/pmic_max8997.c	/^static struct power_chrg power_chrg_pmic_ops = {$/;"	v	typeref:struct:power_chrg	file:
power_config	drivers/pcmcia/tqm8xx_pcmcia.c	/^static inline void power_config(int slot)$/;"	f	typeref:typename:void	file:
power_cut_counter	drivers/mtd/ubi/ubi.h	/^	unsigned int power_cut_counter;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int
power_cut_emulated	fs/ubifs/debug.c	/^static int power_cut_emulated(struct ubifs_info *c, int lnum, int write)$/;"	f	typeref:typename:int	file:
power_cut_max	drivers/mtd/ubi/ubi.h	/^	unsigned int power_cut_max;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int
power_cut_min	drivers/mtd/ubi/ubi.h	/^	unsigned int power_cut_min;$/;"	m	struct:ubi_debug_info	typeref:typename:unsigned int
power_cycle_delay	drivers/video/broadwell_igd.c	/^	int power_cycle_delay;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
power_det_init	arch/arm/mach-tegra/board2.c	/^static void power_det_init(void)$/;"	f	typeref:typename:void	file:
power_domain	include/power-domain.h	/^struct power_domain {$/;"	s
power_domain_dev_ops	drivers/power/domain/power-domain-uclass.c	/^static inline struct power_domain_ops *power_domain_dev_ops(struct udevice *dev)$/;"	f	typeref:struct:power_domain_ops *	file:
power_domain_free	drivers/power/domain/power-domain-uclass.c	/^int power_domain_free(struct power_domain *power_domain)$/;"	f	typeref:typename:int
power_domain_get	drivers/power/domain/power-domain-uclass.c	/^int power_domain_get(struct udevice *dev, struct power_domain *power_domain)$/;"	f	typeref:typename:int
power_domain_of_xlate_default	drivers/power/domain/power-domain-uclass.c	/^static int power_domain_of_xlate_default(struct power_domain *power_domain,$/;"	f	typeref:typename:int	file:
power_domain_off	drivers/power/domain/power-domain-uclass.c	/^int power_domain_off(struct power_domain *power_domain)$/;"	f	typeref:typename:int
power_domain_on	drivers/power/domain/power-domain-uclass.c	/^int power_domain_on(struct power_domain *power_domain)$/;"	f	typeref:typename:int
power_domain_ops	include/power-domain-uclass.h	/^struct power_domain_ops {$/;"	s
power_down_core	arch/arm/mach-exynos/lowlevel_init.c	/^static void power_down_core(void)$/;"	f	typeref:typename:void	file:
power_down_delay	drivers/video/broadwell_igd.c	/^	int power_down_delay;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
power_down_disable	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t power_down_disable;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
power_exit_wakeup	arch/arm/mach-exynos/power.c	/^void power_exit_wakeup(void)$/;"	f	typeref:typename:void
power_fg	include/power/pmic.h	/^struct power_fg {$/;"	s
power_fg_init	drivers/power/fuel_gauge/fg_max17042.c	/^int power_fg_init(unsigned char bus)$/;"	f	typeref:typename:int
power_fg_init	drivers/power/mfd/fg_max77693.c	/^int power_fg_init(unsigned char bus)$/;"	f	typeref:typename:int
power_fg_ops	drivers/power/fuel_gauge/fg_max17042.c	/^static struct power_fg power_fg_ops = {$/;"	v	typeref:struct:power_fg	file:
power_fg_ops	drivers/power/mfd/fg_max77693.c	/^static struct power_fg power_fg_ops = {$/;"	v	typeref:struct:power_fg	file:
power_get_interface	drivers/power/power_core.c	/^const char *power_get_interface(int interface)$/;"	f	typeref:typename:const char *
power_gpio	board/nokia/rx51/tag_omap.h	/^	s16 power_gpio;$/;"	m	struct:omap_wlan_cx3110x_config	typeref:typename:s16
power_hi6553_init	drivers/power/pmic/pmic_hi6553.c	/^int power_hi6553_init(u8 *base)$/;"	f	typeref:typename:int
power_init	board/freescale/mx51evk/mx51evk.c	/^static void power_init(void)$/;"	f	typeref:typename:void	file:
power_init	board/freescale/mx53evk/mx53evk.c	/^void power_init(void)$/;"	f	typeref:typename:void
power_init	board/freescale/mx53loco/mx53loco.c	/^static int power_init(void)$/;"	f	typeref:typename:int	file:
power_init_board	board/compulab/cm_t43/cm_t43.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/el/el6x/el6x.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx6sabresd/mx6sabresd.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx6slevk/mx6slevk.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/freescale/mx7dsabresd/mx7dsabresd.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/gateworks/gw_ventana/gw_ventana.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/hisilicon/hikey/hikey.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/kosagi/novena/novena.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/samsung/arndale/arndale.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/samsung/common/board.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/samsung/goni/goni.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/technexion/pico-imx6ul/pico-imx6ul.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/ti/am43xx/board.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/toradex/colibri_imx7/colibri_imx7.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/warp/warp.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	board/warp7/warp7.c	/^int power_init_board(void)$/;"	f	typeref:typename:int
power_init_board	common/board_r.c	/^__weak int power_init_board(void)$/;"	f	typeref:typename:__weak int
power_is_up	drivers/video/tegra124/sor.c	/^	int power_is_up;$/;"	m	struct:tegra_dc_sor_data	typeref:typename:int	file:
power_key_pressed	board/samsung/common/misc.c	/^static int power_key_pressed(u32 reg)$/;"	f	typeref:typename:int	file:
power_led	arch/arm/dts/rk3288-firefly.dtsi	/^		power_led: power-led {$/;"	l
power_limit_time_msr_to_sec	arch/x86/cpu/broadwell/cpu.c	/^static const u8 power_limit_time_msr_to_sec[] = {$/;"	v	typeref:typename:const u8[]	file:
power_limit_time_msr_to_sec	arch/x86/cpu/ivybridge/model_206ax.c	/^static const u8 power_limit_time_msr_to_sec[] = {$/;"	v	typeref:typename:const u8[]	file:
power_limit_time_sec_to_msr	arch/x86/cpu/broadwell/cpu.c	/^static const u8 power_limit_time_sec_to_msr[] = {$/;"	v	typeref:typename:const u8[]	file:
power_limit_time_sec_to_msr	arch/x86/cpu/ivybridge/model_206ax.c	/^static const u8 power_limit_time_sec_to_msr[] = {$/;"	v	typeref:typename:const u8[]	file:
power_ltc3676_init	drivers/power/pmic/pmic_ltc3676.c	/^int power_ltc3676_init(unsigned char bus)$/;"	f	typeref:typename:int
power_max77696_init	drivers/power/pmic/pmic_max77696.c	/^int power_max77696_init(unsigned char bus)$/;"	f	typeref:typename:int
power_mode	drivers/mmc/mxcmmc.c	/^	unsigned int		power_mode;$/;"	m	struct:mxcmci_host	typeref:typename:unsigned int	file:
power_muic_init	drivers/power/mfd/muic_max77693.c	/^int power_muic_init(unsigned int bus)$/;"	f	typeref:typename:int
power_muic_init	drivers/power/pmic/muic_max8997.c	/^int power_muic_init(unsigned int bus)$/;"	f	typeref:typename:int
power_off	drivers/pcmcia/tqm8xx_pcmcia.c	/^static inline void power_off(int slot)$/;"	f	typeref:typename:void	file:
power_on_3_3	drivers/pcmcia/tqm8xx_pcmcia.c	/^static inline void power_on_3_3(int slot)$/;"	f	typeref:typename:void	file:
power_on_5_0	drivers/pcmcia/tqm8xx_pcmcia.c	/^static inline void power_on_5_0(int slot)$/;"	f	typeref:typename:void	file:
power_on_count	arch/arm/mach-sunxi/usb_phy.c	/^	int power_on_count;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
power_on_delay	drivers/video/exynos/exynos_fb.c	/^	unsigned int power_on_delay;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
power_on_delay	include/exynos_lcd.h	/^	unsigned int power_on_delay;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
power_on_module	board/raspberrypi/rpi/rpi.c	/^static int power_on_module(u32 module)$/;"	f	typeref:typename:int	file:
power_partition	arch/arm/mach-tegra/tegra114/cpu.c	/^static void power_partition(u32 partid)$/;"	f	typeref:typename:void	file:
power_partition	arch/arm/mach-tegra/tegra124/cpu.c	/^static void power_partition(u32 partid)$/;"	f	typeref:typename:void	file:
power_pfuze100_init	drivers/power/pmic/pmic_pfuze100.c	/^int power_pfuze100_init(unsigned char bus)$/;"	f	typeref:typename:int
power_pfuze3000_init	drivers/power/pmic/pmic_pfuze3000.c	/^int power_pfuze3000_init(unsigned char bus)$/;"	f	typeref:typename:int
power_reg	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	void __iomem		*power_reg;$/;"	m	struct:omap_pipe3	typeref:typename:void __iomem *
power_regs	drivers/misc/mxs_ocotp.c	/^static struct mxs_power_regs *power_regs =$/;"	v	typeref:struct:mxs_power_regs *	file:
power_state_get	arch/x86/cpu/broadwell/power_state.c	/^void power_state_get(struct udevice *pch_dev, struct chipset_power_state *ps)$/;"	f	typeref:typename:void
power_supply_state	include/smbios.h	/^	u8 power_supply_state;$/;"	m	struct:smbios_type3	typeref:typename:u8
power_tps62362_init	drivers/power/pmic/pmic_tps62362.c	/^int power_tps62362_init(unsigned char bus)$/;"	f	typeref:typename:int
power_tps65218_init	drivers/power/pmic/pmic_tps65218.c	/^int power_tps65218_init(unsigned char bus)$/;"	f	typeref:typename:int
power_up_delay	drivers/video/broadwell_igd.c	/^	int power_up_delay;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
power_update_battery	drivers/power/fuel_gauge/fg_max17042.c	/^static int power_update_battery(struct pmic *p, struct pmic *bat)$/;"	f	typeref:typename:int	file:
power_update_battery	drivers/power/mfd/fg_max77693.c	/^static int power_update_battery(struct pmic *p, struct pmic *bat)$/;"	f	typeref:typename:int	file:
powerctl2_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 powerctl2_params_sn20[]	= {0x17, 0x75, 0x79, 0x20};$/;"	v	typeref:typename:u16[]	file:
powerctl_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 powerctl_params_sn20[]	= {0x03, 0x0b, 0x00};$/;"	v	typeref:typename:u16[]	file:
powerdown	drivers/net/lpc32xx_eth.c	/^	u32 powerdown;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
powerdown_cfg_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 powerdown_cfg_reg;	\/* 0xE0 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
powered_by_linreg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	int			(*powered_by_linreg)(void);$/;"	m	struct:mxs_vddx_cfg	typeref:typename:int (*)(void)	file:
powerup_cpu	arch/arm/mach-tegra/cpu.c	/^void powerup_cpu(void)$/;"	f	typeref:typename:void
powerup_cpus	arch/arm/mach-tegra/tegra114/cpu.c	/^void powerup_cpus(void)$/;"	f	typeref:typename:void
powerup_cpus	arch/arm/mach-tegra/tegra124/cpu.c	/^void powerup_cpus(void)$/;"	f	typeref:typename:void
powerup_fixup	drivers/usb/host/ehci.h	/^	void (*powerup_fixup)(struct ehci_ctrl *ctrl, uint32_t *status_reg,$/;"	m	struct:ehci_ops	typeref:typename:void (*)(struct ehci_ctrl * ctrl,uint32_t * status_reg,uint32_t * reg)
powmgtcsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 powmgtcsr;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
powmgtcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powmgtcsr;	\/* Power Management Control & Status Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
powmgtcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powmgtcsr;	\/* Power Mangement Control & Status *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
powmgtcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	powmgtcsr;	\/* Power management status & control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
powmgtcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	powmgtcsr;	\/* 0xe0080 - Power management status and control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
powstat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 powstat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
powstat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 powstat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
pp	arch/powerpc/include/asm/mmu.h	/^	unsigned long pp:2;	\/* Page access protections *\/$/;"	m	struct:_BATL	typeref:typename:unsigned long:2
pp	arch/powerpc/include/asm/mmu.h	/^	unsigned long pp:2;	\/* Page access protections *\/$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:2
pp	arch/powerpc/include/asm/mmu.h	/^	unsigned long pp:2;	\/* Page protection *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:2
pp	drivers/video/mx3fb.c	/^	struct chan_param_mem_planar		pp;$/;"	m	union:chan_param_mem	typeref:struct:chan_param_mem_planar	file:
pp0	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG pp0;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
pp1	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG pp1;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
pp2c	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pp2c;	\/* port phy2 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp2c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pp2c;	\/* port phy2 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp3c	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pp3c;	\/* port phy3 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp3c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pp3c;	\/* port phy3 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp4c	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pp4c;	\/* port phy4 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp4c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pp4c;	\/* port phy4 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp5c	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pp5c;	\/* port phy5 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp5c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pp5c;	\/* port phy5 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pp_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pp_ctrl;			\/* _DISP_PP_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
pp_select	arch/arm/include/asm/arch-tegra/dc.h	/^	uint pp_select[PP_SELECT_COUNT];$/;"	m	struct:dc_disp_reg	typeref:typename:uint[]
ppa1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ppa1;		\/* PMAN Prefetch Attributes Register 1 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
ppa2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ppa2;		\/* PMAN Prefetch Attributes Register 2 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
ppa_init	arch/arm/cpu/armv8/fsl-layerscape/ppa.c	/^int ppa_init(void)$/;"	f	typeref:typename:int
ppaact	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^struct paace *ppaact;$/;"	v	typeref:struct:paace *
ppage_attr	include/linux/mtd/nand.h	/^	u8 ppage_attr;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
ppalloc	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t ppalloc;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
ppar	board/gateworks/gw_ventana/gw_ventana.c	/^	struct pci_dev *ppar;$/;"	m	struct:pci_dev	typeref:struct:pci_dev *	file:
ppar	include/ioports.h	/^    unsigned char ppar:1;	\/* Port Pin Assignment Register (35-4) *\/$/;"	m	struct:__anonc67861fe0208	typeref:typename:unsigned char:1
ppar	include/ioports.h	/^    unsigned int ppar;		\/* Port Pin Assignment Register (35-4) *\/$/;"	m	struct:__anonc67861fe0108	typeref:typename:unsigned int
ppar1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ppar1;		\/* Pin Assignment Register 1 *\/$/;"	m	struct:gpio_n	typeref:typename:u32
ppar2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 ppar2;		\/* Pin Assignment Register 2 *\/$/;"	m	struct:gpio_n	typeref:typename:u32
ppara	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ppara;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pparamr	drivers/block/dwc_ahsata.c	/^	u32 pparamr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
pparb	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pparb;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
pparc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pparc;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
ppard	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ppard;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
ppb_shift	include/linux/mtd/onenand.h	/^	unsigned int ppb_shift;	\/* Pages per block shift *\/$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
ppbah	arch/powerpc/include/asm/immap_85xx.h	/^	u32 ppbah;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
ppbal	arch/powerpc/include/asm/immap_85xx.h	/^	u32 ppbal;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
ppc405_dummy	board/mpl/common/pci_parts.h	/^static struct pci_pip405_config_entry ppc405_dummy[] = {$/;"	v	typeref:struct:pci_pip405_config_entry[]
ppc405ep_init	arch/powerpc/cpu/ppc4xx/start.S	/^ppc405ep_init:$/;"	l
ppc440_hose	arch/powerpc/cpu/ppc4xx/4xx_pci.c	/^static struct pci_controller ppc440_hose = {0};$/;"	v	typeref:struct:pci_controller	file:
ppc440spe_revB	arch/powerpc/cpu/ppc4xx/cpu.c	/^int ppc440spe_revB() {$/;"	f	typeref:typename:int
ppc440spe_rev_a	board/amcc/yucca/yucca.c	/^static int ppc440spe_rev_a(void)$/;"	f	typeref:typename:int	file:
ppc4xx CPU	arch/powerpc/cpu/ppc4xx/Kconfig	/^menu "ppc4xx CPU"$/;"	m
ppc4xx_config	arch/powerpc/include/asm/ppc4xx_config.h	/^struct ppc4xx_config {$/;"	s
ppc4xx_config_count	board/amcc/canyonlands/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/amcc/katmai/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/amcc/kilauea/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/amcc/sequoia/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/esd/pmc405de/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/gdsys/405ex/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/gdsys/intip/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/mosaixtech/icon/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_count	board/t3corp/chip_config.c	/^int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);$/;"	v	typeref:typename:int
ppc4xx_config_val	board/amcc/canyonlands/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/amcc/katmai/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/amcc/kilauea/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/amcc/sequoia/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/esd/pmc405de/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/gdsys/405ex/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/gdsys/intip/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/mosaixtech/icon/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_config_val	board/t3corp/chip_config.c	/^struct ppc4xx_config ppc4xx_config_val[] = {$/;"	v	typeref:struct:ppc4xx_config[]
ppc4xx_get_cfgaddr	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static inline u64 ppc4xx_get_cfgaddr(int port)$/;"	f	typeref:typename:u64	file:
ppc4xx_get_i2c	drivers/i2c/ppc4xx_i2c.c	/^static inline struct ppc4xx_i2c *ppc4xx_get_i2c(int hwadapnr)$/;"	f	typeref:struct:ppc4xx_i2c *	file:
ppc4xx_gpio	arch/powerpc/include/asm/ppc4xx-gpio.h	/^struct ppc4xx_gpio {$/;"	s
ppc4xx_i2c	arch/powerpc/include/asm/ppc4xx-i2c.h	/^struct ppc4xx_i2c {$/;"	s
ppc4xx_i2c_init	drivers/i2c/ppc4xx_i2c.c	/^static void ppc4xx_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
ppc4xx_i2c_probe	drivers/i2c/ppc4xx_i2c.c	/^static int ppc4xx_i2c_probe(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
ppc4xx_i2c_read	drivers/i2c/ppc4xx_i2c.c	/^static int ppc4xx_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
ppc4xx_i2c_set_bus_speed	drivers/i2c/ppc4xx_i2c.c	/^static unsigned int ppc4xx_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
ppc4xx_i2c_transfer	drivers/i2c/ppc4xx_i2c.c	/^static int ppc4xx_i2c_transfer(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
ppc4xx_i2c_write	drivers/i2c/ppc4xx_i2c.c	/^static int ppc4xx_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
ppc4xx_ibm_ddr2_register_dump	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^inline void ppc4xx_ibm_ddr2_register_dump(void)$/;"	f	typeref:typename:void
ppc4xx_init_pcie	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int ppc4xx_init_pcie(void)$/;"	f	typeref:typename:int
ppc4xx_init_pcie_endport	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int ppc4xx_init_pcie_endport(int port)$/;"	f	typeref:typename:int
ppc4xx_init_pcie_port	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int ppc4xx_init_pcie_port(int port, int rootport)$/;"	f	typeref:typename:int
ppc4xx_init_pcie_rootport	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int ppc4xx_init_pcie_rootport(int port)$/;"	f	typeref:typename:int
ppc4xx_pci_sync_clock_config	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^int ppc4xx_pci_sync_clock_config(u32 async)$/;"	f	typeref:typename:int
ppc4xx_pci_sync_clock_ok	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^static int ppc4xx_pci_sync_clock_ok(u32 sync, u32 async)$/;"	f	typeref:typename:int	file:
ppc4xx_reg	arch/powerpc/cpu/ppc4xx/reginfo.c	/^const struct cpu_register ppc4xx_reg[] = {$/;"	v	typeref:typename:const struct cpu_register[]
ppc4xx_reginfo	arch/powerpc/cpu/ppc4xx/reginfo.c	/^void ppc4xx_reginfo(void)$/;"	f	typeref:typename:void
ppc4xx_setup_pcie_endpoint	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^int ppc4xx_setup_pcie_endpoint(struct pci_controller *hose, int port)$/;"	f	typeref:typename:int
ppc4xx_setup_pcie_rootpoint	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^void ppc4xx_setup_pcie_rootpoint(struct pci_controller *hose, int port)$/;"	f	typeref:typename:void
ppc4xx_setup_utl	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static void ppc4xx_setup_utl(u32 port) {$/;"	f	typeref:typename:void	file:
ppc4xx_setup_utl	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static void ppc4xx_setup_utl(u32 port)$/;"	f	typeref:typename:void	file:
ppcDWload	arch/powerpc/cpu/mpc83xx/start.S	/^ppcDWload:$/;"	l
ppcDWstore	arch/powerpc/cpu/mpc83xx/start.S	/^ppcDWstore:$/;"	l
ppcDcbf	arch/powerpc/lib/ppccache.S	/^ppcDcbf:$/;"	l
ppcDcbi	arch/powerpc/lib/ppccache.S	/^ppcDcbi:$/;"	l
ppcDcbz	arch/powerpc/lib/ppccache.S	/^ppcDcbz:$/;"	l
ppcSync	arch/powerpc/lib/ppccache.S	/^ppcSync:$/;"	l
ppc_4xx_eth_halt	drivers/net/4xx_enet.c	/^static void ppc_4xx_eth_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
ppc_4xx_eth_init	drivers/net/4xx_enet.c	/^static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
ppc_4xx_eth_initialize	drivers/net/4xx_enet.c	/^int ppc_4xx_eth_initialize (bd_t * bis)$/;"	f	typeref:typename:int
ppc_4xx_eth_rx	drivers/net/4xx_enet.c	/^static int ppc_4xx_eth_rx (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
ppc_4xx_eth_send	drivers/net/4xx_enet.c	/^static int ppc_4xx_eth_send(struct eth_device *dev, void *ptr, int len)$/;"	f	typeref:typename:int	file:
ppc_4xx_eth_setup_bridge	drivers/net/4xx_enet.c	/^int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis)$/;"	f	typeref:typename:int
ppc_bat_t	arch/powerpc/include/asm/mmu.h	/^} ppc_bat_t;$/;"	t	typeref:enum:__anon7751fa290103
ppc_cached_irq_mask	arch/powerpc/cpu/mpc8260/interrupts.c	/^static ulong ppc_cached_irq_mask[NR_MASK_WORDS];$/;"	v	typeref:typename:ulong[]	file:
ppc_ctx	include/bedbug/ppc.h	/^struct ppc_ctx {$/;"	s
ppc_longjmp	examples/standalone/ppc_longjmp.S	/^ppc_longjmp:$/;"	l
ppc_setjmp	examples/standalone/ppc_setjmp.S	/^ppc_setjmp:$/;"	l
ppcclockon	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int ppcclockon;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
ppcfg	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 ppcfg;	\/* port phy1 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
ppcfg	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ppcfg;	\/* port phy1 config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
ppcfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ppcfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
ppcfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 ppcfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
ppcfg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 ppcfg;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ppcfg	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 ppcfg;		\/* 0x84 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ppcs	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 ppcs;	\/* port phy control status *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
ppcs	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ppcs;	\/* port phy control status *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
ppctl	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 ppctl;	\/* Peripheral PLL Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
ppd_be	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_be;		\/* 0x2C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_busctl	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_busctl;		\/* 0x2B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_cs	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_cs;		\/* 0x2D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_fech;		\/* 0x28 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_fech	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_fech;		\/* 0x36 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_feci2c	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_feci2c;		\/* 0x2F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_fecl;		\/* 0x29 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_fecl	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_fecl;		\/* 0x37 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_lcdctlh	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_lcdctlh;		\/* 0x38 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_lcdctll	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_lcdctll;		\/* 0x39 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_lcddatah	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_lcddatah;	\/* 0x35 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_lcddatal	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_lcddatal;	\/* 0x37 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_lcddatam	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_lcddatam;	\/* 0x36 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_pwm	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_pwm;		\/* 0x2E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_qspi	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_qspi;		\/* 0x32 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_ssi	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_ssi;		\/* 0x2A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_timer	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_timer;		\/* 0x33 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppd_uart	arch/m68k/include/asm/immap_5329.h	/^	u8 ppd_uart;		\/* 0x31 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppddr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ppddr;		\/* 0x90 Pad Pull-down Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ppder	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ppder;		\/* 0x94 Pad Pull-down Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ppdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	ppdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
ppdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	ppdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
ppdr_be	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_be;		\/* 0x29 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_cs	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_cs;		\/* 0x1A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_cs	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_cs;		\/* 0x2A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_debug	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_debug;		\/* 0x35 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_dspi	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_dspi;		\/* 0x2B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_fbctl	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_fbctl;		\/* 0x28 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_fec0	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_fec0;		\/* 0x2D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_fech	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_fech;		\/* 0x1F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_feci2c	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_feci2c;		\/* 0x1B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_feci2c	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_feci2c;		\/* 0x2E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_fecl	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_fecl;		\/* 0x20 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_qspi	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_qspi;		\/* 0x1C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_sdhc	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_sdhc;		\/* 0x37 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_simp0	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_simp0;		\/* 0x32 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_simp1	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_simp1;		\/* 0x31 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_ssi	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_ssi;		\/* 0x38 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_timer	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_timer;		\/* 0x1D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_timer	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_timer;		\/* 0x33 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_uart	arch/m68k/include/asm/immap_520x.h	/^	u8 ppdr_uart;		\/* 0x1E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdr_uart	arch/m68k/include/asm/immap_5301x.h	/^	u8 ppdr_uart;		\/* 0x34 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_a	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_a;		\/* 0x18 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_addr	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_addr;		\/* 0x20 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_addr	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_addr;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_atah	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_atah;		\/* ATA High Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_atal	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_atal;		\/* ATA Low Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_b	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_b;		\/* 0x19 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_be	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_be;		\/* 0x18 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_be	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_be;		\/* Flexbus Byte Enable Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_bs	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_bs;		\/* 0x24 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_bs	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_bs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_busctl	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_busctl;	\/* 0x23 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_busctl	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_busctl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_c	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_c;		\/* 0x1A *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_cs	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_cs;		\/* 0x19 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_cs	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_cs;		\/* 0x25 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_cs	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_cs;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_cs	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_cs;		\/* Flexbus Chip-Select Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_d	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_d;		\/* 0x1B *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_datah	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_datah;	\/* 0x21 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_datal	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_datal;	\/* 0x22 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_dma	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_dma;		\/* DMA Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_dma	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_dma;		\/*0x22 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_dspi	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_dspi;		\/* 0x1E *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_dspi	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_dspi;		\/* DSPI Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_dspi	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_dspi;		\/*0x2E *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_e	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_e;		\/* 0x1C *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_etpu	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_etpu;		\/* 0x2C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_f	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_f;		\/* 0x1D *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbadh	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fbadh;	\/* Flexbus AD High Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbadl	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fbadl;	\/* Flexbus AD Low Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbadmh	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fbadmh;	\/* Flexbus AD Med-High Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbadml	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fbadml;	\/* Flexbus AD Med-Low Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbcs	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_fbcs;		\/*0x21 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_fbctl;	\/* 0x1A *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbctl	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fbctl;	\/* Flexbus Control Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fbctl	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_fbctl;	\/*0x20 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec0h	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_fec0h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_fec0h	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fec0h;	\/* FEC0 High Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec0h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_fec0h;	\/*0x24 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec0l	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_fec0l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_fec0l	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fec0l;	\/* FEC0 Low Port Clear Output Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec0l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_fec0l;	\/*0x25 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec1h	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_fec1h;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_fec1h	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fec1h;	\/* FEC1 High Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec1h	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_fec1h;	\/*0x26 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec1l	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_fec1l;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_fec1l	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_fec1l;	\/* FEC1 Low Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_fec1l	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_fec1l;	\/*0x27 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_feci2c	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_feci2c;	\/* 0x27 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_feci2c	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_feci2c;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_feci2c	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_feci2c;	\/* FEC1 \/ I2C Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_feci2c	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_feci2c;	\/*0x28 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_g	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_g;		\/* 0x1E *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_h	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_h;		\/* 0x1F *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_i	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_i;		\/* 0x20 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_i2c	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_i2c;		\/* 0x1B *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_j	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_j;		\/* 0x21 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_k	arch/m68k/include/asm/immap_5441x.h	/^	u8 ppdsdr_k;		\/* 0x22 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_lcdctl	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_lcdctl;	\/* 0x20 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_lcddatah	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_lcddatah;	\/* 0x21 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_lcddatal	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_lcddatal;	\/* 0x23 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_lcddatam	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_lcddatam;	\/* 0x22 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_pci	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_pci;		\/* PCI Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_pcibg	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_pcibg;	\/*0x29 *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_pcibr	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_pcibr;	\/*0x2A *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_psc1psc0	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_psc1psc0;	\/*0x2D *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_psc3psc2	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 ppdsdr_psc3psc2;	\/*0x2C *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_qspi	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_qspi;		\/* 0x2A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_qspi	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_qspi;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_res1	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_res1[4];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[4]
ppdsdr_res2	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_res2[2];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
ppdsdr_res3	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_res3;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_res4	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_res4;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_res5	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_res5[3];$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
ppdsdr_sdram	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_sdram;	\/* 0x26 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_sdram	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_sdram;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_ssi	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_ssi;		\/* SSI Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_timer	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_timer;	\/* 0x1F *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_timer	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_timer;	\/* 0x2B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_timer	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_timer;	\/* FTimer Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_timerh	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_timerh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_timerl	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_timerl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_uart	arch/m68k/include/asm/immap_5227x.h	/^	u8 ppdsdr_uart;		\/* 0x1D *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_uart	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_uart;		\/* UART Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_uarth	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_uarth;	\/* 0x28 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_uarth	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_uarth;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_uartl	arch/m68k/include/asm/immap_5235.h	/^	u8 ppdsdr_uartl;	\/* 0x29 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_uartl	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_uartl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_usb	arch/m68k/include/asm/immap_5445x.h	/^	u8 ppdsdr_usb;		\/* USB Port Pin Data\/Set Data Register *\/$/;"	m	struct:gpio	typeref:typename:u8
ppdsdr_usbh	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_usbh;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsdr_usbl	arch/m68k/include/asm/immap_5275.h	/^	u8 ppdsdr_usbl;$/;"	m	struct:gpio_ctrl	typeref:typename:u8
ppdsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	ppdsr;		\/* 0x98 Pad Pull-down Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
ppid	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	u8 ppid;$/;"	m	struct:ldpaa_fas	typeref:typename:u8
pplah	arch/powerpc/include/asm/immap_85xx.h	/^	u32 pplah;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
pplal	arch/powerpc/include/asm/immap_85xx.h	/^	u32 pplal;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
ppll_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 ppll_con[6];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[6]
ppll_div_3	drivers/video/ati_radeon_fb.h	/^	u32		ppll_div_3;$/;"	m	struct:radeon_regs	typeref:typename:u32
ppll_init_cfg	drivers/clk/rockchip/clk_rk3399.c	/^static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);$/;"	v	typeref:typename:const struct pll_div	file:
ppll_ref_div	drivers/video/ati_radeon_fb.h	/^	u32		ppll_ref_div;$/;"	m	struct:radeon_regs	typeref:typename:u32
pprev	include/linux/list.h	/^	struct hlist_node *next, **pprev;$/;"	m	struct:hlist_node	typeref:struct:hlist_node **
ppt_pm_init	arch/x86/cpu/ivybridge/lpc.c	/^static void ppt_pm_init(struct udevice *pch)$/;"	f	typeref:typename:void	file:
pptr	drivers/net/cs8900.h	/^	CS8900_REG pptr;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
ppu_disable	drivers/net/phy/mv88e6352.c	/^static int ppu_disable(const char *devname, u8 phy_addr)$/;"	f	typeref:typename:int	file:
ppu_enable	drivers/net/phy/mv88e6352.c	/^static int ppu_enable(const char *devname, u8 phy_addr)$/;"	f	typeref:typename:int	file:
ppwrsctl	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 ppwrsctl;		\/* 0x23c pad power save control *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
ppwrsctl	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 ppwrsctl;		\/* 0x23c pad power save control *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
pq	drivers/mtd/ubi/ubi.h	/^	struct list_head pq[UBI_PROT_QUEUE_LEN];$/;"	m	struct:ubi_device	typeref:struct:list_head[]
pq_head	drivers/mtd/ubi/ubi.h	/^	int pq_head;$/;"	m	struct:ubi_device	typeref:typename:int
pqcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pqcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pqcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pqcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pqcr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	pqcr[8];	\/* Priority Queue Configuration *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[8]
pqdownheap	lib/zlib/trees.c	/^local void pqdownheap(s, tree, k)$/;"	f
pqdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pqdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pqdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pqdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pqremove	lib/zlib/trees.c	/^#define pqremove(/;"	d	file:
pr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 pr;			\/* Prescale Register		*\/$/;"	m	struct:timer_regs	typeref:typename:u32
pr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pr;	\/* Period Register *\/$/;"	m	struct:pwm_regs	typeref:typename:u32
pr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	pr;$/;"	m	struct:pwm_regs	typeref:typename:u32
pr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 pr;              \/* impedance control data register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
pr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 pr;              \/* impedance control data register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
pr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	at91_priority_t	pr[AT91_MATRIX_SLAVES];$/;"	m	struct:at91_matrix	typeref:typename:at91_priority_t[]
pr	arch/sh/include/asm/ptrace.h	/^	unsigned long pr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
pr	board/mpl/pati/pati.c	/^	unsigned char pr;		\/* Precharge Command Time 0:<25ns 1:<50ns *\/$/;"	m	struct:__anon377858d00108	typeref:typename:unsigned char	file:
pr	drivers/spi/ich.h	/^	uint32_t *pr;		\/* only for ich9 *\/$/;"	m	struct:ich_spi_priv	typeref:typename:uint32_t *
pr	drivers/spi/ich.h	/^	uint32_t pr[5];		\/* 0x74 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t[5]
pr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pr1;		\/* PMAN Revision Register 1 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pr2;		\/* PMAN Revision Register 2 *\/$/;"	m	struct:ccsr_pman	typeref:typename:u32
pr_cont	include/linux/mtd/mtd.h	/^#define pr_cont(/;"	d
pr_crit	include/linux/mtd/mtd.h	/^#define pr_crit(/;"	d
pr_debug	drivers/usb/dwc3/linux-compat.h	/^#define pr_debug(/;"	d
pr_debug	drivers/usb/musb-new/linux-compat.h	/^#define pr_debug(/;"	d
pr_debug	include/linux/mtd/mtd.h	/^#define pr_debug(/;"	d
pr_err	arch/arm/mach-uniphier/init.h	/^#define pr_err(/;"	d
pr_err	include/linux/mtd/mtd.h	/^#define pr_err(/;"	d
pr_err	tools/atmelimage.c	/^#define pr_err(/;"	d	file:
pr_fmt	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	arch/arm/mach-tegra/xusb-padctl-common.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	drivers/mtd/nand/nand_base.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	drivers/pci/pci_tegra.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	drivers/power/as3722.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	drivers/remoteproc/rproc-uclass.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	drivers/remoteproc/sandbox_testproc.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	drivers/remoteproc/ti_power_proc.c	/^#define pr_fmt(/;"	d	file:
pr_fmt	include/common.h	/^#define pr_fmt(/;"	d
pr_info	include/linux/mtd/mtd.h	/^#define pr_info(/;"	d
pr_notice	include/linux/mtd/mtd.h	/^#define pr_notice(/;"	d
pr_stamp	drivers/mtd/nand/bfin_nand.c	/^# define pr_stamp(/;"	d	file:
pr_stamp	drivers/rtc/bfin_rtc.c	/^#define pr_stamp(/;"	d	file:
pr_warn	include/linux/mtd/mtd.h	/^#define pr_warn(/;"	d
pram_idma	examples/standalone/mem_to_mem_idma2intr.c	/^typedef struct pram_idma {$/;"	s	file:
pram_idma_t	examples/standalone/mem_to_mem_idma2intr.c	/^} pram_idma_t;$/;"	t	typeref:struct:pram_idma	file:
prandom_u32	include/linux/compat.h	/^#define prandom_u32(/;"	d
pras	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^	u32	pras[16][2];	\/* Priority Assignment Slave Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16][2]
pras	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^	u32	pras[16][2];	\/* Priority Assignment Slave Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16][2]
pras	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	pras[16][2];$/;"	m	struct:at91_matrix	typeref:typename:u32[16][2]
pras	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^	u32	pras[16][2];	\/* Priority Assignment Slave Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16][2]
pras	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	pras[16][2];$/;"	m	struct:at91_matrix	typeref:typename:u32[16][2]
pras	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 pras[16][2];\/* 0x80 ~ 0xfc: Priority Register A\/B *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16][2]
prb	drivers/block/sata_sil.h	/^	struct sil_prb prb;$/;"	m	struct:sil_cmd_block	typeref:struct:sil_prb
prbrg	cmd/immap.c	/^static void prbrg (int n, uint val)$/;"	f	typeref:typename:void	file:
prc1023	drivers/net/e1000.h	/^	uint64_t prc1023;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
prc127	drivers/net/e1000.h	/^	uint64_t prc127;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
prc1522	drivers/net/e1000.h	/^	uint64_t prc1522;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
prc1_ilck_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc1_ilck_ctrl_reg;	\/* 0xC0 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc1_intr_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc1_intr_ctrl_reg;	\/* 0xD0 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc255	drivers/net/e1000.h	/^	uint64_t prc255;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
prc2_ilck_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc2_ilck_ctrl_reg;	\/* 0xC4 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc2_intr_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc2_intr_ctrl_reg;	\/* 0xD4 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc3_ilck_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc3_ilck_ctrl_reg;	\/* 0xC8 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc3_intr_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc3_intr_ctrl_reg;	\/* 0xD8 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc4_ilck_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc4_ilck_ctrl_reg;	\/* 0xCC *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc4_intr_ctrl_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prc4_intr_ctrl_reg;	\/* 0xDC *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prc511	drivers/net/e1000.h	/^	uint64_t prc511;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
prc64	drivers/net/e1000.h	/^	uint64_t prc64;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
prclk	arch/m68k/include/asm/immap_5301x.h	/^	u8 prclk;		\/* 0x03 Prescale Clock Select *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
prcm	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct prcm_regs const **prcm =$/;"	v	typeref:struct:prcm_regs const **
prcm	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct prcm_regs const **prcm =$/;"	v	typeref:struct:prcm_regs const **
prcm	arch/arm/dts/am33xx.dtsi	/^			prcm: prcm@200000 {$/;"	l	label:l4_wkup
prcm	arch/arm/dts/am4372.dtsi	/^			prcm: prcm@1f0000 {$/;"	l	label:l4_wkup
prcm	arch/arm/include/asm/arch-omap3/cpu.h	/^struct prcm {$/;"	s
prcm_apb0_disable	arch/arm/mach-sunxi/prcm.c	/^void prcm_apb0_disable(u32 flags)$/;"	f	typeref:typename:void
prcm_apb0_enable	arch/arm/mach-sunxi/prcm.c	/^void prcm_apb0_enable(u32 flags)$/;"	f	typeref:typename:void
prcm_clockdomains	arch/arm/dts/am33xx.dtsi	/^				prcm_clockdomains: clockdomains {$/;"	l	label:l4_wkup.prcm
prcm_clockdomains	arch/arm/dts/am4372.dtsi	/^				prcm_clockdomains: clockdomains {$/;"	l	label:l4_wkup.prcm
prcm_clocks	arch/arm/dts/am33xx.dtsi	/^				prcm_clocks: clocks {$/;"	l	label:l4_wkup.prcm
prcm_clocks	arch/arm/dts/am4372.dtsi	/^				prcm_clocks: clocks {$/;"	l	label:l4_wkup.prcm
prcm_init	arch/arm/cpu/armv7/am33xx/clock.c	/^void prcm_init()$/;"	f	typeref:typename:void
prcm_init	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^void prcm_init(void)$/;"	f	typeref:typename:void
prcm_init	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^void prcm_init(void)$/;"	f	typeref:typename:void
prcm_init	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void prcm_init(void)$/;"	f	typeref:typename:void
prcm_init	arch/arm/cpu/armv7/omap3/clock.c	/^void prcm_init(void)$/;"	f	typeref:typename:void
prcm_regs	arch/arm/include/asm/omap_common.h	/^struct prcm_regs {$/;"	s
prcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	prcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
prcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	prcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
prd12	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	prd12;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
prd34	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	prd34;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
prd_dev	arch/m68k/include/asm/immap_5329.h	/^	u32 prd_dev;		\/* 0x154 Periodic Frame List Base or Device Address *\/$/;"	m	struct:usb_otg	typeref:typename:u32
prd_entry	drivers/block/fsl_sata.h	/^typedef struct prd_entry {$/;"	s
prd_entry_t	drivers/block/fsl_sata.h	/^} __attribute__ ((packed)) prd_entry_t;$/;"	t	typeref:struct:prd_entry
prde_fis_len	drivers/block/fsl_sata.h	/^	__le32 prde_fis_len;	\/* Number of PRD entries and FIS length *\/$/;"	m	struct:cmd_hdr_entry	typeref:typename:__le32
prdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	prdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
prdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	prdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
prdt	drivers/block/fsl_sata.h	/^	prd_entry_t prdt[SATA_HC_MAX_PRD];$/;"	m	struct:cmd_desc	typeref:typename:prd_entry_t[]
prdt	drivers/block/fsl_sata.h	/^	prd_entry_t prdt[SATA_HC_MAX_PRD];$/;"	m	struct:prdt	typeref:typename:prd_entry_t[]
prdt	drivers/block/fsl_sata.h	/^typedef struct prdt {$/;"	s
prdt_t	drivers/block/fsl_sata.h	/^} __attribute__ ((packed)) prdt_t;$/;"	t	typeref:struct:prdt
pre	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 pre;    	\/* prescaler *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
pre	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 pre;	\/* prescaler *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
pre	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pre;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
pre	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 pre;		\/* 0xD8: EMC_PRE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
pre	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 pre;		\/* Prescale *\/$/;"	m	struct:gptmr	typeref:typename:u16
pre	include/ACEX1K.h	/^	Altera_pre_fn		pre;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_pre_fn
pre	include/ACEX1K.h	/^	Altera_pre_fn		pre;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_pre_fn
pre	include/altera.h	/^	Altera_pre_fn pre;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_pre_fn
pre	include/spartan2.h	/^	xilinx_pre_fn	pre;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_pre_fn
pre	include/spartan2.h	/^	xilinx_pre_fn	pre;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_pre_fn
pre	include/spartan3.h	/^	xilinx_pre_fn	pre;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_pre_fn
pre	include/spartan3.h	/^	xilinx_pre_fn	pre;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_pre_fn
pre	include/virtex2.h	/^	xilinx_pre_fn	pre;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_pre_fn
pre	test/py/multiplexed_log.css	/^pre {$/;"	s
pre_buf	drivers/video/rockchip/rk_hdmi.c	/^static u8 pre_buf[] = {$/;"	v	typeref:typename:u8[]	file:
pre_console_putc	common/console.c	/^static inline void pre_console_putc(const char c) {}$/;"	f	typeref:typename:void	file:
pre_console_putc	common/console.c	/^static void pre_console_putc(const char c)$/;"	f	typeref:typename:void	file:
pre_console_puts	common/console.c	/^static inline void pre_console_puts(const char *s) {}$/;"	f	typeref:typename:void	file:
pre_console_puts	common/console.c	/^static void pre_console_puts(const char *s)$/;"	f	typeref:typename:void	file:
pre_div	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_div pre_div;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_div
pre_div	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_div pre_div;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_div
pre_emph_names	drivers/video/rockchip/rk_edp.c	/^static const char * const pre_emph_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
pre_emphasis_level	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum pre_emphasis_level {$/;"	g
pre_graphics_delay	drivers/video/broadwell_igd.c	/^	int pre_graphics_delay;$/;"	m	struct:broadwell_igd_plat	typeref:typename:int	file:
pre_probe	include/dm/uclass.h	/^	int (*pre_probe)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
pre_remove	include/dm/uclass.h	/^	int (*pre_remove)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
pre_root_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pre_root_clr;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
pre_root_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pre_root_set;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
pre_root_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t pre_root_tog;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
pre_trig	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_trig pre_trig;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_trig
pre_trig	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_trig pre_trig;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_trig
pre_unbind	include/dm/uclass.h	/^	int (*pre_unbind)(struct udevice *dev);$/;"	m	struct:uclass_driver	typeref:typename:int (*)(struct udevice * dev)
prealloc	disk/part_amiga.h	/^    u32 prealloc;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
prealloc_blocks	include/ext_common.h	/^	uint8_t prealloc_blocks;$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t
prealloc_dir_blocks	include/ext_common.h	/^	uint8_t prealloc_dir_blocks;$/;"	m	struct:ext2_sblock	typeref:typename:uint8_t
preamble	tools/imximage.h	/^	dcd_preamble_t preamble;$/;"	m	struct:__anon504a956c0308	typeref:typename:dcd_preamble_t
preamble	tools/pblimage.h	/^	uint32_t preamble;$/;"	m	struct:pbl_header	typeref:typename:uint32_t
preboot_keys	board/boundary/nitrogen6x/nitrogen6x.c	/^static void preboot_keys(void)$/;"	f	typeref:typename:void	file:
preboot_support	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint16_t preboot_support;$/;"	m	struct:pch_usb3_controller_settings	typeref:typename:uint16_t
precharge_all	arch/arm/cpu/armv7/mx6/ddr.c	/^static void precharge_all(const bool cs0_enable, const bool cs1_enable)$/;"	f	typeref:typename:void	file:
precharge_all	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	precharge_all;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
prechconfig	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned prechconfig;$/;"	m	struct:mem_timings	typeref:typename:unsigned
prechconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int prechconfig;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
prechconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int prechconfig;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
prechconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int prechconfig0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
prechconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int prechconfig1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
prechconfig_tp_cnt	arch/arm/mach-exynos/clock_init.h	/^	unsigned prechconfig_tp_cnt;$/;"	m	struct:mem_timings	typeref:typename:unsigned
precision	net/sntp.h	/^	uchar precision;$/;"	m	struct:sntp_pkt_t	typeref:typename:uchar
precon_buf_idx	include/asm-generic/global_data.h	/^	unsigned long precon_buf_idx;	\/* Pre-Console buffer index *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
predicate	arch/arm/include/asm/ptrace.h	/^#define predicate(/;"	d
prediv	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	prediv;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
prediv	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	prediv;		\/* 0x114 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
prediv	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	prediv;		\/* 14 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
prediv_bit	arch/arm/mach-exynos/clock.c	/^	int8_t prediv_bit;$/;"	m	struct:clk_bit_info	typeref:typename:int8_t	file:
prediv_mask	arch/arm/mach-exynos/clock.c	/^	int32_t prediv_mask;$/;"	m	struct:clk_bit_info	typeref:typename:int32_t	file:
predr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	predr;		\/* 0xd0e20 - Port Recoverable Error Detect Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
preemp_en	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 preemp_en:1;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:1	file:
preemphasis	drivers/video/tegra124/sor.h	/^	u32     preemphasis;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
pref_address	arch/x86/include/asm/bootparam.h	/^	__u64	pref_address;$/;"	m	struct:setup_header	typeref:typename:__u64
prefer-db2x	doc/DocBook/Makefile	/^	prefer-db2x = $(use-xmlto)$/;"	m
prefer-db2x	doc/DocBook/Makefile	/^	prefer-db2x = db2x$/;"	m
prefer-xmlto	doc/DocBook/Makefile	/^	prefer-xmlto = $(use-db2x)$/;"	m
prefer-xmlto	doc/DocBook/Makefile	/^	prefer-xmlto = xmlto$/;"	m
preferred_pm_profile	arch/x86/include/asm/acpi_table.h	/^	u8 preferred_pm_profile;$/;"	m	struct:acpi_fadt	typeref:typename:u8
prefetch	arch/mips/include/asm/processor.h	/^static inline void prefetch(const void *addr)$/;"	f	typeref:typename:void
prefetch	drivers/usb/gadget/pxa25x_udc.h	/^static inline void prefetch(const void *ptr)$/;"	f	typeref:typename:void
prefetch	include/linux/list.h	/^static inline void prefetch(const void *x) {;}$/;"	f	typeref:typename:void
prefetch_abort	arch/arm/lib/vectors.S	/^prefetch_abort:$/;"	l
prefetch_config1	include/linux/mtd/omap_gpmc.h	/^	u32 prefetch_config1;	\/* 0x1E0 *\/$/;"	m	struct:gpmc	typeref:typename:u32
prefetch_config2	include/linux/mtd/omap_gpmc.h	/^	u32 prefetch_config2;	\/* 0x1E4 *\/$/;"	m	struct:gpmc	typeref:typename:u32
prefetch_control	include/linux/mtd/omap_gpmc.h	/^	u32 prefetch_control;	\/* 0x1EC *\/$/;"	m	struct:gpmc	typeref:typename:u32
prefetch_init	arch/mips/mach-pic32/cpu.c	/^static void prefetch_init(void)$/;"	f	typeref:typename:void	file:
prefetch_status	include/linux/mtd/omap_gpmc.h	/^	u32 prefetch_status;	\/* 0x1F0 *\/$/;"	m	struct:gpmc	typeref:typename:u32
prefetchw	drivers/usb/gadget/pxa25x_udc.h	/^#define prefetchw(/;"	d
prefix	fs/yaffs2/yaffscfg.h	/^	const YCHAR *prefix;$/;"	m	struct:yaffsfs_DeviceConfiguration	typeref:typename:const YCHAR *
prefix	include/power/pmic.h	/^	const char *prefix;$/;"	m	struct:pmic_child_info	typeref:typename:const char *
preinit	include/mmc.h	/^	char preinit;		\/* start init as early as possible *\/$/;"	m	struct:mmc	typeref:typename:char
preload	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 preload[3];	\/* Timer preload value *\/$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
preload_ctrl	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 preload_ctrl[3];$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
preloader_console_init	common/spl/spl.c	/^void preloader_console_init(void)$/;"	f	typeref:typename:void
premultiply	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 premultiply;$/;"	m	struct:de_bld	typeref:typename:u32
premultiply	arch/arm/include/asm/arch/display2.h	/^	u32 premultiply;$/;"	m	struct:de_bld	typeref:typename:u32
preop	drivers/spi/ich.h	/^	int preop;$/;"	m	struct:ich_spi_priv	typeref:typename:int
preop	drivers/spi/ich.h	/^	uint16_t preop;		\/* 0x94 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint16_t
preop	drivers/spi/ich.h	/^	uint16_t preop;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint16_t
prepad	include/linux/mtd/nand.h	/^	int prepad;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
prepare	Makefile	/^prepare: ;$/;"	t
prepare	Makefile	/^prepare: prepare0$/;"	t
prepare	arch/arm/mach-tegra/xusb-padctl-common.h	/^	int (*prepare)(struct tegra_xusb_phy *phy);$/;"	m	struct:tegra_xusb_phy_ops	typeref:typename:int (*)(struct tegra_xusb_phy * phy)
prepare0	Makefile	/^prepare0: archprepare FORCE$/;"	t
prepare1	Makefile	/^prepare1: prepare2 $(version_h) $(timestamp_h) \\$/;"	t
prepare2	Makefile	/^prepare2: prepare3 outputmakefile$/;"	t
prepare3	Makefile	/^prepare3: include\/config\/uboot.release$/;"	t
prepare_access	drivers/misc/fsl_iim.c	/^static int prepare_access(struct fsl_iim **regs, u32 bank, u32 word, int assert,$/;"	f	typeref:typename:int	file:
prepare_access	drivers/misc/mxc_ocotp.c	/^static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word,$/;"	f	typeref:typename:int	file:
prepare_backup_gpt_header	disk/part_efi.c	/^static void prepare_backup_gpt_header(gpt_header *gpt_h)$/;"	f	typeref:typename:void	file:
prepare_bootargs	arch/sparc/cpu/leon2/prom.c	/^void prepare_bootargs(char *bootargs)$/;"	f	typeref:typename:void
prepare_bootargs	arch/sparc/cpu/leon3/prom.c	/^void prepare_bootargs(char *bootargs)$/;"	f	typeref:typename:void
prepare_env	test/fs/fs-test.sh	/^function prepare_env() {$/;"	f
prepare_for_irom	arch/x86/lib/bios_asm.S	/^.macro	prepare_for_irom$/;"	m
prepare_mrc_cache	arch/x86/cpu/broadwell/sdram.c	/^static int prepare_mrc_cache(struct pei_data *pei_data)$/;"	f	typeref:typename:int	file:
prepare_mrc_cache	arch/x86/cpu/ivybridge/sdram.c	/^static int prepare_mrc_cache(struct pei_data *pei_data)$/;"	f	typeref:typename:int	file:
prepare_mrc_cache	arch/x86/cpu/quark/dram.c	/^static __maybe_unused int prepare_mrc_cache(struct mrc_params *mrc_params)$/;"	f	typeref:typename:__maybe_unused int	file:
prepare_new_block	lib/bzip2/bzlib.c	/^void prepare_new_block ( EState* s )$/;"	f	typeref:typename:void	file:
prepare_proto3_response_buffer	drivers/misc/cros_ec.c	/^static int prepare_proto3_response_buffer(struct cros_ec_dev *dev, int din_len)$/;"	f	typeref:typename:int	file:
prepare_read	drivers/misc/fsl_iim.c	/^static int prepare_read(struct fsl_iim **regs, u32 bank, u32 word, u32 *val,$/;"	f	typeref:typename:int	file:
prepare_read	drivers/misc/mxc_ocotp.c	/^static int prepare_read(struct ocotp_regs **regs, u32 bank, u32 word, u32 *val,$/;"	f	typeref:typename:int	file:
prepare_ring	drivers/usb/host/xhci-ring.c	/^static int prepare_ring(struct xhci_ctrl *ctrl, struct xhci_ring *ep_ring,$/;"	f	typeref:typename:int	file:
prepare_set_command	drivers/mtd/nand/pxa3xx_nand.c	/^static int prepare_set_command(struct pxa3xx_nand_info *info, int command,$/;"	f	typeref:typename:int	file:
prepare_start_command	drivers/mtd/nand/pxa3xx_nand.c	/^static void prepare_start_command(struct pxa3xx_nand_info *info, int command)$/;"	f	typeref:typename:void	file:
prepare_to_boot	arch/avr32/cpu/cpu.c	/^void prepare_to_boot(void)$/;"	f	typeref:typename:void
prepare_to_copy	arch/avr32/include/asm/processor.h	/^#define prepare_to_copy(/;"	d
prepare_to_copy	arch/mips/include/asm/processor.h	/^#define prepare_to_copy(/;"	d
prepare_to_switch	arch/microblaze/include/asm/system.h	/^#define prepare_to_switch(/;"	d
prepare_to_switch	arch/mips/include/asm/system.h	/^#define prepare_to_switch(/;"	d
prepare_tx	include/power/pmic.h	/^	u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);$/;"	m	struct:p_spi	typeref:typename:u32 (*)(u32 reg,u32 * val,u32 write)
prepare_write	drivers/misc/fsl_iim.c	/^static int prepare_write(struct fsl_iim **regs, u32 bank, u32 word, u32 val,$/;"	f	typeref:typename:int	file:
prepare_write	drivers/misc/mxc_ocotp.c	/^static int prepare_write(struct ocotp_regs **regs, u32 bank, u32 word,$/;"	f	typeref:typename:int	file:
prescale	drivers/i2c/kona_i2c.c	/^	uint8_t prescale;	\/* Prescale divider *\/$/;"	m	struct:bus_speed_cfg	typeref:typename:uint8_t	file:
prescaled_size	arch/arm/include/asm/arch-tegra/dc.h	/^	uint prescaled_size;		\/* _WIN_PRESCALED_SIZE_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
prescaler	arch/arm/imx-common/timer.c	/^	unsigned int prescaler;$/;"	m	struct:mxc_gpt	typeref:typename:unsigned int	file:
present	board/freescale/common/qixis.h	/^	u8 present;$/;"	m	struct:qixis	typeref:typename:u8
present2	board/freescale/common/qixis.h	/^	u8 present2;    \/* Presence Status Register 2,0x0c *\/$/;"	m	struct:qixis	typeref:typename:u8
preserve_outdir	tools/patman/tools.py	/^preserve_outdir = False$/;"	v
preset_dataimage_480X800	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dataimage_480X800 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_dvi_1024X768	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dvi_1024X768 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_dvi_1152X864	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dvi_1152X864 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_dvi_1280X1024	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dvi_1280X1024 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_dvi_1280X960	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dvi_1280X960 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_dvi_640X480	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dvi_640X480 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_dvi_800X600	board/compulab/common/omap3_display.c	/^static const struct panel_config preset_dvi_800X600 = {$/;"	v	typeref:typename:const struct panel_config	file:
preset_hdmi_1024X768	board/compulab/cm_fx6/cm_fx6.c	/^static struct display_info_t preset_hdmi_1024X768 = {$/;"	v	typeref:struct:display_info_t	file:
pressed	include/ec_commands.h	/^	uint8_t pressed;$/;"	m	struct:ec_params_mkbp_simulate_key	typeref:typename:uint8_t
pretcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pretcr;	\/* Physical Retry Erorr Threshold CR *\/$/;"	m	struct:rio_impl_common	typeref:typename:u32
pretcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pretcr;		\/* 0xd0080 - Physical Retry Erorr Threshold Configuration Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
prev	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	prev;$/;"	m	struct:iim_regs	typeref:typename:u32
prev	drivers/misc/fsl_iim.c	/^	u32 prev;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
prev	include/linux/list.h	/^	struct list_head *next, *prev;$/;"	m	struct:list_head	typeref:struct:list_head *
prev	include/usbdevice.h	/^	struct urb_link *prev;$/;"	m	struct:urb_link	typeref:struct:urb_link *
prev	lib/zlib/deflate.h	/^    Posf *prev;$/;"	m	struct:internal_state	typeref:typename:Posf *
prev	scripts/kconfig/list.h	/^	struct list_head *next, *prev;$/;"	m	struct:list_head	typeref:struct:list_head *
prev	scripts/kconfig/symbol.c	/^	struct dep_stack *prev, *next;$/;"	m	struct:dep_stack	typeref:struct:dep_stack *	file:
prev_bin	common/dlmalloc.c	/^#define prev_bin(/;"	d	file:
prev_chunk	common/dlmalloc.c	/^#define prev_chunk(/;"	d	file:
prev_dcd_head	tools/mxsimage.c	/^	uint32_t			*prev_dcd_head;$/;"	m	struct:sb_dcd_ctx	typeref:typename:uint32_t *	file:
prev_desc_ptr	arch/blackfin/include/asm/dma.h	/^	void *prev_desc_ptr;	\/* DMA Prev Descriptor Pointer register *\/$/;"	m	struct:dma_register	typeref:typename:void *
prev_hole	net/net.c	/^	u16 prev_hole;	\/* index of prev, 0 == none *\/$/;"	m	struct:hole	typeref:typename:u16	file:
prev_inuse	common/dlmalloc.c	/^#define prev_inuse(/;"	d	file:
prev_keycodes	include/input.h	/^	int prev_keycodes[INPUT_BUFFER_LEN];	\/* keys held last time *\/$/;"	m	struct:input_config	typeref:typename:int[]
prev_length	lib/zlib/deflate.h	/^    uInt prev_length;$/;"	m	struct:internal_state	typeref:typename:uInt
prev_match	lib/zlib/deflate.h	/^    IPos prev_match;             \/* previous match *\/$/;"	m	struct:internal_state	typeref:typename:IPos
prev_name	scripts/mailmapper	/^        prev_name = mail_vs_name[mail]$/;"	v
prev_node	fs/ext4/ext4_journal.c	/^static struct revoke_blk_list *prev_node;$/;"	v	typeref:struct:revoke_blk_list *	file:
prev_size	common/dlmalloc.c	/^  INTERNAL_SIZE_T prev_size; \/* Size of previous chunk (if free). *\/$/;"	m	struct:malloc_chunk	typeref:typename:INTERNAL_SIZE_T	file:
prev_sleep_state	arch/x86/cpu/broadwell/power_state.c	/^static int prev_sleep_state(struct chipset_power_state *ps)$/;"	f	typeref:typename:int	file:
prev_sleep_state	arch/x86/include/asm/arch-broadwell/pm.h	/^	int prev_sleep_state;$/;"	m	struct:chipset_power_state	typeref:typename:int
prevent_medium_removal	drivers/usb/gadget/storage_common.c	/^	unsigned int	prevent_medium_removal:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
previous_hz	drivers/spi/cadence_qspi.h	/^	unsigned int	previous_hz;$/;"	m	struct:cadence_spi_priv	typeref:typename:unsigned int
previous_size	drivers/fpga/ivm_core.c	/^static unsigned short previous_size;$/;"	v	typeref:typename:unsigned short	file:
prg_p	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	prg_p;$/;"	m	struct:iim_regs	typeref:typename:u32
prg_p	arch/powerpc/include/asm/immap_512x.h	/^	u32 prg_p;		\/* IIM program protection register *\/$/;"	m	struct:iim512x	typeref:typename:u32
prg_p	drivers/misc/fsl_iim.c	/^	u32 prg_p;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
prg_stage1_prepare	board/gdsys/p1022/controlcenterd-id.c	/^static const uint8_t prg_stage1_prepare[] = {$/;"	v	typeref:typename:const uint8_t[]	file:
prg_stage2_prepare	board/gdsys/p1022/controlcenterd-id.c	/^static const uint8_t prg_stage2_prepare[] = {$/;"	v	typeref:typename:const uint8_t[]	file:
prg_stage2_success	board/gdsys/p1022/controlcenterd-id.c	/^static const uint8_t prg_stage2_success[] = {$/;"	v	typeref:typename:const uint8_t[]	file:
prg_stage_fail	board/gdsys/p1022/controlcenterd-id.c	/^static const uint8_t prg_stage_fail[] = {$/;"	v	typeref:typename:const uint8_t[]	file:
pri	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 pri;		\/* 0x268 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
pri	arch/sparc/include/asm/prom.h	/^	int pri;		\/* IRQ priority *\/$/;"	m	struct:linux_prom_irqs	typeref:typename:int
pri	include/mtd/cfi_flash.h	/^	u8	pri[3];$/;"	m	struct:cfi_pri_hdr	typeref:typename:u8[3]
prictrl	include/usb/ehci-ci.h	/^	u32	prictrl;	\/* 0x40c - Priority Control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
prien	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 prien;		\/* 0x264 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
primary_boot_tag	tools/mxsboot.c	/^	uint32_t			primary_boot_tag;$/;"	m	struct:mx28_sd_config_block	typeref:typename:uint32_t	file:
primary_sdram_width	include/fsl_ddr_dimm_params.h	/^	unsigned int primary_sdram_width;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
primw	include/ddr_spd.h	/^	unsigned char primw;       \/* 13 Primary SDRAM Width *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
primw	include/ddr_spd.h	/^	unsigned char primw;       \/* 13 Primary SDRAM Width *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
primw	include/spd.h	/^	unsigned char primw;       \/* 13 Primary SDRAM Width *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
print	include/eeprom_field.h	/^	void (*print)(const struct eeprom_field *eeprom_field);$/;"	m	struct:eeprom_field	typeref:typename:void (*)(const struct eeprom_field * eeprom_field)
print	include/eeprom_layout.h	/^	void (*print)(const struct eeprom_layout *eeprom_layout);$/;"	m	struct:eeprom_layout	typeref:typename:void (*)(const struct eeprom_layout * eeprom_layout)
print	include/part.h	/^	void (*print)(struct blk_desc *dev_desc);$/;"	m	struct:part_driver	typeref:typename:void (*)(struct blk_desc * dev_desc)
print_83xx_arb_event	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^static int print_83xx_arb_event(int force)$/;"	f	typeref:typename:int	file:
print_active_callback	cmd/nvedit.c	/^static int print_active_callback(ENTRY *entry)$/;"	f	typeref:typename:int	file:
print_active_flags	cmd/nvedit.c	/^static int print_active_flags(ENTRY *entry)$/;"	f	typeref:typename:int	file:
print_adll	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int print_adll(u32 dev_num, u32 adll[MAX_INTERFACE_NUM * MAX_BUS_NUM])$/;"	f	typeref:typename:int
print_ansi_colour	tools/fdtgrep.c	/^static void print_ansi_colour(FILE *fout, int col)$/;"	f	typeref:typename:void	file:
print_argv	common/command.c	/^static void print_argv(const char *banner, const char *leader, const char *sep, int linemax, cha/;"	f	typeref:typename:void	file:
print_arrows	scripts/kconfig/lxdialog/checklist.c	/^static void print_arrows(WINDOW * win, int choice, int item_no, int scroll,$/;"	f	typeref:typename:void	file:
print_arrows	scripts/kconfig/lxdialog/menubox.c	/^static void print_arrows(WINDOW * win, int item_no, int scroll, int y, int x,$/;"	f	typeref:typename:void	file:
print_autowrap	scripts/kconfig/lxdialog/util.c	/^void print_autowrap(WINDOW * win, const char *prompt, int width, int y, int x)$/;"	f	typeref:typename:void
print_backtrace	arch/powerpc/cpu/mpc512x/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc5xx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc5xxx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc8260/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc83xx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc85xx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc86xx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/mpc8xx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_backtrace	arch/powerpc/cpu/ppc4xx/traps.c	/^static void print_backtrace(unsigned long *sp)$/;"	f	typeref:typename:void	file:
print_bats	arch/powerpc/lib/bat_rw.c	/^void print_bats(void)$/;"	f	typeref:typename:void
print_baudrate	cmd/bdinfo.c	/^static inline void print_baudrate(void)$/;"	f	typeref:typename:void	file:
print_bdl	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void print_bdl(void __iomem *reg, int n)$/;"	f	typeref:typename:void	file:
print_bdl	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void print_bdl(void __iomem *reg, int n)$/;"	f	typeref:typename:void	file:
print_bi_boot_params	cmd/bdinfo.c	/^static inline void print_bi_boot_params(const bd_t *bd)$/;"	f	typeref:typename:void	file:
print_bi_dram	cmd/bdinfo.c	/^static inline void print_bi_dram(const bd_t *bd)$/;"	f	typeref:typename:void	file:
print_bi_flash	cmd/bdinfo.c	/^static inline void print_bi_flash(const bd_t *bd)$/;"	f	typeref:typename:void	file:
print_bi_mem	cmd/bdinfo.c	/^static inline void print_bi_mem(const bd_t *bd)$/;"	f	typeref:typename:void	file:
print_buffer	lib/display_options.c	/^int print_buffer(ulong addr, const void *data, uint width, uint count,$/;"	f	typeref:typename:int
print_button	scripts/kconfig/lxdialog/util.c	/^void print_button(WINDOW * win, const char *label, int y, int x, int selected)$/;"	f	typeref:typename:void
print_buttons	scripts/kconfig/lxdialog/checklist.c	/^static void print_buttons(WINDOW * dialog, int height, int width, int selected)$/;"	f	typeref:typename:void	file:
print_buttons	scripts/kconfig/lxdialog/inputbox.c	/^static void print_buttons(WINDOW * dialog, int height, int width, int selected)$/;"	f	typeref:typename:void	file:
print_buttons	scripts/kconfig/lxdialog/menubox.c	/^static void print_buttons(WINDOW * win, int height, int width, int selected)$/;"	f	typeref:typename:void	file:
print_buttons	scripts/kconfig/lxdialog/yesno.c	/^static void print_buttons(WINDOW * dialog, int height, int width, int selected)$/;"	f	typeref:typename:void	file:
print_byte_string	cmd/tpm.c	/^static void print_byte_string(uint8_t *data, size_t count)$/;"	f	typeref:typename:void	file:
print_character_set	lib/slre.c	/^print_character_set(FILE *fp, const unsigned char *p, int len)$/;"	f	typeref:typename:void	file:
print_chip_data	board/siemens/draco/board.c	/^static void print_chip_data(void)$/;"	f	typeref:typename:void	file:
print_cmdline	scripts/basic/fixdep.c	/^static void print_cmdline(void)$/;"	f	typeref:typename:void	file:
print_comment	scripts/kconfig/confdata.c	/^	void (*print_comment)(FILE *, const char *, void *);$/;"	m	struct:conf_printer	typeref:typename:void (*)(FILE *,const char *,void *)	file:
print_configs	arch/powerpc/cpu/ppc4xx/cmd_chip_config.c	/^static void print_configs(int cur_config_nr)$/;"	f	typeref:typename:void	file:
print_cpu_list	cmd/cpu.c	/^static int print_cpu_list(bool detail)$/;"	f	typeref:typename:int	file:
print_cpuinfo	arch/arm/cpu/arm1136/mx31/generic.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm1136/mx35/generic.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm920t/s3c24x0/cpu_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/armada100/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/lpc32xx/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/mx25/generic.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/mx27/generic.c	/^int print_cpuinfo (void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^int print_cpuinfo (void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/arm926ejs/spear/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv7/am33xx/sys_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv7/ls102xa/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv7/omap3/sys_info.c	/^int print_cpuinfo (void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv7/s5p-common/cpu_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv7/vf610/generic.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/armv8/s32v234/generic.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/cpu/pxa/cpuinfo.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/imx-common/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-at91/arm926ejs/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-at91/armv7/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-keystone/init.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-kirkwood/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-mvebu/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-orion5x/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-rmobile/cpu_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-socfpga/misc.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-sunxi/cpu_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-tegra/sys_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/arm/mach-uniphier/cpu_info.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/blackfin/cpu/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/mips/mach-ath79/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/nios2/cpu/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/sparc/cpu/leon2/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/sparc/cpu/leon3/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/cpu/broadwell/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/cpu/coreboot/coreboot.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/cpu/efi/efi.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/cpu/ivybridge/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/cpu/qemu/qemu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/cpu/quark/quark.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/lib/efi/efi.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/x86/lib/fsp/fsp_common.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	arch/xtensa/cpu/cpu.c	/^int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo	include/common.h	/^static inline int print_cpuinfo(void)$/;"	f	typeref:typename:int
print_cpuinfo_pxa2xx	arch/arm/cpu/pxa/cpuinfo.c	/^static int print_cpuinfo_pxa2xx(void)$/;"	f	typeref:typename:int	file:
print_data	cmd/fdt.c	/^static void print_data(const void *data, int len)$/;"	f	typeref:typename:void	file:
print_ddr2_tcyc	cmd/i2c.c	/^static void print_ddr2_tcyc (u_char const b)$/;"	f	typeref:typename:void	file:
print_ddr3_timings	board/siemens/draco/board.c	/^static void print_ddr3_timings(void)$/;"	f	typeref:typename:void	file:
print_ddr_info	drivers/ddr/fsl/util.c	/^void print_ddr_info(unsigned int start_ctrl)$/;"	f	typeref:typename:void
print_ddr_target_freq	drivers/ddr/marvell/axp/ddr3_init.c	/^static void print_ddr_target_freq(u32 cpu_freq, u32 fab_opt)$/;"	f	typeref:typename:void	file:
print_decoded_instruction	drivers/bios_emulator/x86emu/debug.c	/^static void print_decoded_instruction(void)$/;"	f	typeref:typename:void	file:
print_decomp_msg	common/bootm.c	/^static void print_decomp_msg(int comp_type, int type, bool is_xip)$/;"	f	typeref:typename:void	file:
print_deps	scripts/basic/fixdep.c	/^static void print_deps(void)$/;"	f	typeref:typename:void	file:
print_desc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^print_desc (elbt_prdesc descs[], int ndesc, uchar *bases[], int nbase)$/;"	f	typeref:typename:void	file:
print_device_descriptor	include/usbdescriptors.h	/^#define print_device_descriptor(/;"	d
print_device_descriptor	include/usbdescriptors.h	/^static inline void print_device_descriptor(struct usb_device_descriptor *d)$/;"	f	typeref:typename:void
print_device_info	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int print_device_info(u8 dev_num)$/;"	f	typeref:typename:int
print_dimm_parameters	drivers/ddr/fsl/interactive.c	/^static void print_dimm_parameters(const dimm_params_t *pdimm)$/;"	f	typeref:typename:void	file:
print_disk_type	disk/part_amiga.c	/^static void print_disk_type(u32 disk_type)$/;"	f	typeref:typename:void	file:
print_dunit_setup	drivers/ddr/marvell/axp/ddr3_init.c	/^static void print_dunit_setup(void)$/;"	f	typeref:typename:void	file:
print_efiname	disk/part_efi.c	/^static char *print_efiname(gpt_entry *pte)$/;"	f	typeref:typename:char *	file:
print_encoded_bytes	drivers/bios_emulator/x86emu/debug.c	/^static void print_encoded_bytes(u16 s, u16 o)$/;"	f	typeref:typename:void	file:
print_eth	cmd/bdinfo.c	/^static void print_eth(int idx)$/;"	f	typeref:typename:__maybe_unused void	file:
print_eth_ip_addr	cmd/bdinfo.c	/^static inline void print_eth_ip_addr(void)$/;"	f	typeref:typename:void	file:
print_eths	cmd/bdinfo.c	/^static void print_eths(void)$/;"	f	typeref:typename:__maybe_unused void	file:
print_filter	scripts/kconfig/qconf.cc	/^QString ConfigInfoView::print_filter(const QString &str)$/;"	f	class:ConfigInfoView	typeref:typename:QString
print_fixed	cmd/pcmcia.c	/^static void print_fixed (volatile uchar *p)$/;"	f	typeref:typename:void	file:
print_fixed	drivers/pcmcia/ti_pci1410a.c	/^static void print_fixed(volatile char *p)$/;"	f	typeref:typename:void	file:
print_flagged_features	board/egnite/ethernut5/ethernut5_pwrman.c	/^static void print_flagged_features(u8 flags)$/;"	f	typeref:typename:void	file:
print_fpga_info	board/gdsys/405ep/dlvision-10g.c	/^static void print_fpga_info(unsigned dev)$/;"	f	typeref:typename:void	file:
print_fpga_info	board/gdsys/405ep/io.c	/^static void print_fpga_info(void)$/;"	f	typeref:typename:void	file:
print_fpga_info	board/gdsys/405ep/iocon.c	/^static void print_fpga_info(unsigned int fpga, bool rgmii2_present)$/;"	f	typeref:typename:void	file:
print_fpga_info	board/gdsys/405ep/neo.c	/^static void print_fpga_info(void)$/;"	f	typeref:typename:void	file:
print_fpga_info	board/gdsys/405ex/io64.c	/^static void print_fpga_info(unsigned dev)$/;"	f	typeref:typename:void	file:
print_freq	lib/display_options.c	/^void print_freq(uint64_t freq, const char *s)$/;"	f	typeref:typename:void
print_fsl_memctl_config_regs	drivers/ddr/fsl/interactive.c	/^static void print_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
print_funcid	cmd/pcmcia.c	/^static void print_funcid (int func)$/;"	f	typeref:typename:void	file:
print_funcid	drivers/pcmcia/ti_pci1410a.c	/^static void print_funcid(int func)$/;"	f	typeref:typename:void	file:
print_function_line	scripts/kconfig/nconf.c	/^static void print_function_line(void)$/;"	f	typeref:typename:void	file:
print_grouped_ull	lib/vsprintf.c	/^void print_grouped_ull(unsigned long long int_val, int digits)$/;"	f	typeref:typename:void
print_hdr	tools/ublimage.c	/^static void print_hdr(struct ubl_header *ubl_hdr)$/;"	f	typeref:typename:void	file:
print_hdr_byte	tools/lpc32xximage.c	/^static void print_hdr_byte(struct nand_page_0_boot_header *hdr, int ofs)$/;"	f	typeref:typename:void	file:
print_hdr_v1	tools/imximage.c	/^static void print_hdr_v1(struct imx_header *imx_hdr)$/;"	f	typeref:typename:void	file:
print_hdr_v2	tools/imximage.c	/^static void print_hdr_v2(struct imx_header *imx_hdr)$/;"	f	typeref:typename:void	file:
print_header	tools/imagetool.h	/^	void (*print_header) (const void *);$/;"	m	struct:image_type_params	typeref:typename:void (*)(const void *)
print_help	scripts/kconfig/conf.c	/^static void print_help(struct menu *menu)$/;"	f	typeref:typename:void	file:
print_hex_dump	include/linux/compat.h	/^#define print_hex_dump(/;"	d
print_hwversion	board/corscience/tricorder/tricorder.c	/^static void print_hwversion(struct tricorder_eeprom *eeprom)$/;"	f	typeref:typename:void	file:
print_id	drivers/block/sata_dwc.h	/^	unsigned int		print_id;$/;"	m	struct:ata_port	typeref:typename:unsigned int
print_ifc_regs	drivers/misc/fsl_ifc.c	/^void print_ifc_regs(void)$/;"	f	typeref:typename:void
print_images	cmd/armflash.c	/^static void print_images(void)$/;"	f	typeref:typename:void	file:
print_in_middle	scripts/kconfig/nconf.gui.c	/^void print_in_middle(WINDOW *win,$/;"	f	typeref:typename:void
print_item	scripts/kconfig/lxdialog/checklist.c	/^static void print_item(WINDOW * win, int choice, int selected)$/;"	f	typeref:typename:void	file:
print_item	scripts/kconfig/lxdialog/menubox.c	/^#define print_item(/;"	d	file:
print_jrnl_status	fs/ext4/ext4_journal.c	/^void print_jrnl_status(int recovery_flag)$/;"	f	typeref:typename:void
print_laws	arch/powerpc/cpu/mpc8xxx/law.c	/^void print_laws(void)$/;"	f	typeref:typename:void
print_laws	board/freescale/qemu-ppce500/qemu-ppce500.c	/^void print_laws(void)$/;"	f	typeref:typename:void
print_lbc_regs	arch/powerpc/cpu/mpc8xxx/fsl_lbc.c	/^void print_lbc_regs(void)$/;"	f	typeref:typename:void
print_line	scripts/kconfig/lxdialog/textbox.c	/^static void print_line(WINDOW * win, int row, int width)$/;"	f	typeref:typename:void	file:
print_lines	tools/buildman/func_test.py	/^    def print_lines(self, lines):$/;"	m	class:TestFunctional
print_lnum	cmd/bdinfo.c	/^static void print_lnum(const char *name, unsigned long long value)$/;"	f	typeref:typename:__maybe_unused void	file:
print_longlong	drivers/mtd/cfi_flash.c	/^static void print_longlong (char *str, unsigned long long data)$/;"	f	typeref:typename:void	file:
print_lowest_common_dimm_parameters	drivers/ddr/fsl/interactive.c	/^static void print_lowest_common_dimm_parameters($/;"	f	typeref:typename:void	file:
print_macaddr	examples/standalone/smc91111_eeprom.c	/^void print_macaddr (struct eth_device *dev)$/;"	f	typeref:typename:void
print_macaddr	examples/standalone/smc911x_eeprom.c	/^static void print_macaddr(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
print_mcsr	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^inline static void print_mcsr(void)$/;"	f	typeref:typename:void	file:
print_mcsr	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void print_mcsr(void)$/;"	f	typeref:typename:void	file:
print_memctl_options	drivers/ddr/fsl/interactive.c	/^static void print_memctl_options(const memctl_options_t *popts)$/;"	f	typeref:typename:void	file:
print_mhz	cmd/bdinfo.c	/^static void print_mhz(const char *name, unsigned long hz)$/;"	f	typeref:typename:__maybe_unused void	file:
print_mip405_info	board/mpl/mip405/mip405.c	/^void print_mip405_info (void)$/;"	f	typeref:typename:void
print_mip405_rev	board/mpl/mip405/mip405.c	/^void print_mip405_rev (void)$/;"	f	typeref:typename:void
print_mmc_devices	drivers/mmc/mmc-uclass.c	/^void print_mmc_devices(char separator) { }$/;"	f	typeref:typename:void
print_mmc_devices	drivers/mmc/mmc-uclass.c	/^void print_mmc_devices(char separator)$/;"	f	typeref:typename:void
print_mmc_devices	drivers/mmc/mmc_legacy.c	/^void print_mmc_devices(char separator) { }$/;"	f	typeref:typename:void
print_mmc_devices	drivers/mmc/mmc_legacy.c	/^void print_mmc_devices(char separator)$/;"	f	typeref:typename:void
print_mmcinfo	cmd/mmc.c	/^static void print_mmcinfo(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
print_mode	drivers/video/tegra124/display.c	/^static void print_mode(const struct display_timing *timing)$/;"	f	typeref:typename:void	file:
print_num	cmd/bdinfo.c	/^static void print_num(const char *name, ulong value)$/;"	f	typeref:typename:__maybe_unused void	file:
print_one_part	disk/part_dos.c	/^static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,$/;"	f	typeref:typename:void	file:
print_operands	common/bedbug.c	/^int print_operands (struct ppc_ctx *ctx)$/;"	f	typeref:typename:int
print_option_table	drivers/ddr/fsl/interactive.c	/^static void print_option_table(const struct options_string *table,$/;"	f	typeref:typename:void	file:
print_packet	drivers/net/lan91c96.c	/^static void print_packet(byte *buf, int length)$/;"	f	typeref:typename:void	file:
print_packet	drivers/net/smc91111.c	/^static void print_packet( byte * buf, int length )$/;"	f	typeref:typename:void	file:
print_page	scripts/kconfig/lxdialog/textbox.c	/^static void print_page(WINDOW *win, int height, int width, update_text_fn$/;"	f	typeref:typename:void	file:
print_part_header	disk/part.c	/^static void print_part_header(const char *type, struct blk_desc *dev_desc)$/;"	f	typeref:typename:void	file:
print_part_info	disk/part_amiga.c	/^static void print_part_info(struct partition_block *p)$/;"	f	typeref:typename:void	file:
print_partition_extended	disk/part_dos.c	/^static void print_partition_extended(struct blk_desc *dev_desc,$/;"	f	typeref:typename:void	file:
print_partition_table	cmd/mtdparts.c	/^static void print_partition_table(void)$/;"	f	typeref:typename:void	file:
print_pip405_info	board/mpl/pip405/pip405.c	/^void print_pip405_info (void)$/;"	f	typeref:typename:void
print_pip405_rev	board/mpl/pip405/pip405.c	/^void print_pip405_rev (void)$/;"	f	typeref:typename:void
print_position	scripts/kconfig/lxdialog/textbox.c	/^static void print_position(WINDOW * win)$/;"	f	typeref:typename:void	file:
print_possibilities	fs/reiserfs/reiserfs.c	/^static int print_possibilities;$/;"	v	typeref:typename:int	file:
print_pre_console_buffer	common/console.c	/^static inline void print_pre_console_buffer(int flushpoint) {}$/;"	f	typeref:typename:void	file:
print_pre_console_buffer	common/console.c	/^static void print_pre_console_buffer(int flushpoint)$/;"	f	typeref:typename:void	file:
print_quoted_string	scripts/kconfig/zconf.tab.c	/^static void print_quoted_string(FILE *out, const char *str)$/;"	f	typeref:typename:void	file:
print_reg_file	arch/arc/lib/interrupts.c	/^static void print_reg_file(long *reg_rev, int start_num)$/;"	f	typeref:typename:void	file:
print_remoteproc_list	cmd/remoteproc.c	/^static int print_remoteproc_list(void)$/;"	f	typeref:typename:int	file:
print_revoke_blks	fs/ext4/ext4_journal.c	/^void print_revoke_blks(char *revk_blk)$/;"	f	typeref:typename:void
print_rsvd_warning	drivers/mtd/ubi/eba.c	/^static void print_rsvd_warning(struct ubi_device *ubi,$/;"	f	typeref:typename:void	file:
print_serdes_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^void print_serdes_mux(void)$/;"	f	typeref:typename:void
print_size	lib/display_options.c	/^void print_size(uint64_t size, const char *s)$/;"	f	typeref:typename:void
print_source_line	common/bedbug.c	/^int print_source_line (char *filename, char *funcname,$/;"	f	typeref:typename:int
print_speed	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			print_speed;	\/* print speed message upon start *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
print_static_binding	cmd/nvedit.c	/^static int print_static_binding(const char *var_name, const char *callback_name,$/;"	f	typeref:typename:int	file:
print_static_flags	cmd/nvedit.c	/^static int print_static_flags(const char *var_name, const char *flags,$/;"	f	typeref:typename:int	file:
print_status	cmd/nand.c	/^static void print_status(ulong start, ulong end, ulong erasesize, int status)$/;"	f	typeref:typename:void	file:
print_std_bdinfo	cmd/bdinfo.c	/^static inline void print_std_bdinfo(const bd_t *bd)$/;"	f	typeref:typename:void	file:
print_symbol	scripts/kconfig/confdata.c	/^	void (*print_symbol)(FILE *, struct symbol *, const char *, void *);$/;"	m	struct:conf_printer	typeref:typename:void (*)(FILE *,struct symbol *,const char *,void *)	file:
print_symbol	scripts/kconfig/zconf.tab.c	/^static void print_symbol(FILE *out, struct menu *menu)$/;"	f	typeref:typename:void	file:
print_test_list	tools/patman/terminal.py	/^print_test_list = []$/;"	v
print_test_mode	tools/patman/terminal.py	/^print_test_mode = False$/;"	v
print_time_record	common/bootstage.c	/^static uint32_t print_time_record(enum bootstage_id id,$/;"	f	typeref:typename:uint32_t	file:
print_timing_reg	arch/arm/cpu/armv7/omap-common/emif-common.c	/^#define print_timing_reg(/;"	d	file:
print_timing_reg	arch/arm/cpu/armv7/omap5/emif.c	/^#define print_timing_reg(/;"	d	file:
print_timings	arch/x86/cpu/quark/mrc_util.c	/^void print_timings(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
print_timings_internal	arch/x86/cpu/quark/mrc_util.c	/^static void print_timings_internal(uint8_t algo, uint8_t channel, uint8_t rank,$/;"	f	typeref:typename:void	file:
print_title	scripts/kconfig/lxdialog/util.c	/^void print_title(WINDOW *dialog, const char *title, int width)$/;"	f	typeref:typename:void
print_tlbcam	arch/powerpc/cpu/mpc85xx/tlb.c	/^void print_tlbcam(void)$/;"	f	typeref:typename:void
print_topology	drivers/ddr/marvell/a38x/ddr3_debug.c	/^void print_topology(struct hws_topology_map *topology_db)$/;"	f	typeref:typename:void
print_topology_details	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^static void print_topology_details(const struct serdes_map *serdes_map,$/;"	f	typeref:typename:void	file:
print_unicode_in_utf8	lib/efi_loader/efi_console.c	/^static void print_unicode_in_utf8(u16 c)$/;"	f	typeref:typename:void	file:
print_urb	include/usbdevice.h	/^#define print_urb(/;"	d
print_urb	include/usbdevice.h	/^static inline void print_urb(struct urb *u)$/;"	f	typeref:typename:void
print_usage	tools/ifdtool.c	/^static void print_usage(const char *name)$/;"	f	typeref:typename:void	file:
print_usb_device_request	include/usbdevice.h	/^#define print_usb_device_request(/;"	d
print_usb_device_request	include/usbdevice.h	/^static inline void print_usb_device_request(struct usb_device_request *r)$/;"	f	typeref:typename:void
print_vdd	board/freescale/common/vid.c	/^static int print_vdd(void)$/;"	f	typeref:typename:int	file:
print_version	tools/ifdtool.c	/^static void print_version(void)$/;"	f	typeref:typename:void	file:
printd	scripts/kconfig/zconf.tab.c	/^#define printd(/;"	d	file:
printf	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^#define printf(/;"	d	file:
printf	drivers/mtd/nand/s3c2410_nand.c	/^#define printf(/;"	d	file:
printf	include/common.h	/^#define printf(/;"	d
printf	lib/tiny-printf.c	/^int printf(const char *fmt, ...)$/;"	f	typeref:typename:int
printf	lib/vsprintf.c	/^int printf(const char *fmt, ...)$/;"	f	typeref:typename:int
printf_filtered	tools/gdb/remote.c	/^#define printf_filtered /;"	d	file:
printf_info	lib/tiny-printf.c	/^struct printf_info {$/;"	s	file:
printf_unfiltered	tools/gdb/remote.c	/^#define printf_unfiltered /;"	d	file:
printhex	arch/arm/lib/debug.S	/^printhex:	adr	r2, hexbuf$/;"	l
printhex	drivers/ddr/fsl/interactive.c	/^	const char printhex;$/;"	m	struct:options_string	typeref:typename:const char	file:
printk	drivers/bios_emulator/include/x86emu/x86emui.h	/^#define printk /;"	d
printk	include/linux/compat.h	/^#define printk	/;"	d
printk_once	include/linux/compat.h	/^#define printk_once	/;"	d
printline	scripts/docproc.c	/^static void printline(char * line)               { printf("%s", line); }$/;"	f	typeref:typename:void	file:
printlogo_rgb	tools/easylogo/easylogo.c	/^void printlogo_rgb (rgb_t * data, int w, int h)$/;"	f	typeref:typename:void
printlogo_yuyv	tools/easylogo/easylogo.c	/^void printlogo_yuyv (unsigned short *data, int w, int h)$/;"	f	typeref:typename:void
prioman_config1	arch/powerpc/include/asm/immap_512x.h	/^	u32 prioman_config1;	\/* Priority Manager Configuration *\/$/;"	m	struct:ddr512x	typeref:typename:u32
prioman_config2	arch/powerpc/include/asm/immap_512x.h	/^	u32 prioman_config2;	\/* Priority Manager Configuration *\/$/;"	m	struct:ddr512x	typeref:typename:u32
priority	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	priority;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
priority	include/MCD_dma.h	/^	u8 priority[32];	\/* priority *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u8[32]
priority	include/fsl-mc/fsl_dpni.h	/^	uint8_t priority;$/;"	m	struct:dpni_dest_cfg	typeref:typename:uint8_t
priority	include/linux/mtd/ubi.h	/^	int priority;$/;"	m	struct:notifier_block	typeref:typename:int
priority_control	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	priority_control;$/;"	m	struct:global_ctl_regs	typeref:typename:u32
priv	arch/sparc/cpu/leon3/memcfg.h	/^	void		*priv;		\/* 0x0c. Optional private data, ptr to$/;"	m	struct:grlib_mctrl_handler	typeref:typename:void *
priv	drivers/net/mvpp2.c	/^	struct mvpp2 *priv;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2 *	file:
priv	drivers/qe/uec_phy.h	/^	void *priv;$/;"	m	struct:uec_mii_info	typeref:typename:void *
priv	drivers/spi/fsl_dspi.c	/^	struct fsl_dspi_priv priv;$/;"	m	struct:fsl_dspi	typeref:struct:fsl_dspi_priv	file:
priv	drivers/spi/fsl_qspi.c	/^	struct fsl_qspi_priv priv;$/;"	m	struct:fsl_qspi	typeref:struct:fsl_qspi_priv	file:
priv	drivers/usb/host/ehci.h	/^	void *priv;	\/* client's private data *\/$/;"	m	struct:ehci_ctrl	typeref:typename:void *
priv	drivers/video/scf0403_lcd.c	/^struct scf0403_priv priv;$/;"	v	typeref:struct:scf0403_priv
priv	include/blk.h	/^	void		*priv;		\/* driver private struct pointer *\/$/;"	m	struct:blk_desc	typeref:typename:void *
priv	include/dm/device.h	/^	void *priv;$/;"	m	struct:udevice	typeref:typename:void *
priv	include/dm/uclass.h	/^	void *priv;$/;"	m	struct:uclass	typeref:typename:void *
priv	include/dwmmc.h	/^	void *priv;$/;"	m	struct:dwmci_host	typeref:typename:void *
priv	include/image-sparse.h	/^	void		*priv;$/;"	m	struct:sparse_storage	typeref:typename:void *
priv	include/lcd.h	/^	void	*priv;		\/* Pointer to driver-specific data *\/$/;"	m	struct:vidinfo	typeref:typename:void *
priv	include/linux/mtd/bbm.h	/^	void *priv;$/;"	m	struct:bbm_info	typeref:typename:void *
priv	include/linux/mtd/flashchip.h	/^	void *priv;$/;"	m	struct:flchip	typeref:typename:void *
priv	include/linux/mtd/mtd.h	/^	u_long priv;$/;"	m	struct:erase_info	typeref:typename:u_long
priv	include/linux/mtd/mtd.h	/^	void *priv;$/;"	m	struct:mtd_info	typeref:typename:void *
priv	include/linux/mtd/nand.h	/^	void *priv;$/;"	m	struct:nand_chip	typeref:typename:void *
priv	include/linux/mtd/nand.h	/^	void *priv;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:void *
priv	include/linux/mtd/nand.h	/^	void *priv;$/;"	m	struct:platform_nand_ctrl	typeref:typename:void *
priv	include/linux/mtd/onenand.h	/^	void *priv;$/;"	m	struct:onenand_chip	typeref:typename:void *
priv	include/miiphy.h	/^	void *priv;$/;"	m	struct:bb_miiphy_bus	typeref:typename:void *
priv	include/mmc.h	/^	void *priv;$/;"	m	struct:mmc	typeref:typename:void *
priv	include/net.h	/^	void *priv;$/;"	m	struct:eth_device	typeref:typename:void *
priv	include/pci.h	/^	unsigned long priv[3];$/;"	m	struct:pci_config_table	typeref:typename:unsigned long[3]
priv	include/phy.h	/^	void *priv;$/;"	m	struct:mii_dev	typeref:typename:void *
priv	include/phy.h	/^	void *priv;$/;"	m	struct:phy_device	typeref:typename:void *
priv	include/scsi.h	/^	unsigned int		priv;$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned int
priv	include/spl.h	/^	void *priv;$/;"	m	struct:spl_load_info	typeref:typename:void *
priv	include/stdio_dev.h	/^	void *priv;			\/* Private extensions			*\/$/;"	m	struct:stdio_dev	typeref:typename:void *
priv	include/test/test.h	/^	void *priv;$/;"	m	struct:unit_test_state	typeref:typename:void *
priv	include/usb/dwc2_udc.h	/^	void		*priv;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:void *
priv0	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 priv0;		\/* 0x1a4 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
priv0	arch/arm/include/asm/arch/cpucfg.h	/^	u32 priv0;		\/* 0x1a4 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
priv1	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 priv1;		\/* 0x1a8 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
priv1	arch/arm/include/asm/arch/cpucfg.h	/^	u32 priv1;		\/* 0x1a8 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
priv_auto_alloc_size	include/dm/device.h	/^	int priv_auto_alloc_size;$/;"	m	struct:driver	typeref:typename:int
priv_auto_alloc_size	include/dm/uclass.h	/^	int priv_auto_alloc_size;$/;"	m	struct:uclass_driver	typeref:typename:int
priv_data	include/pci.h	/^	void *priv_data;$/;"	m	struct:pci_controller	typeref:typename:void *
private	drivers/bios_emulator/include/x86emu/regs.h	/^	void *private;$/;"	m	struct:__anon39451e6d0908	typeref:typename:void *
private	include/kgdb.h	/^		unsigned long private[KGDBDATA_MAXPRIV];$/;"	m	struct:__anon584037260208	typeref:typename:unsigned long[]
privateData	fs/yaffs2/yaffs_nandif.h	/^	void *privateData;$/;"	m	struct:ynandif_Geometry	typeref:typename:void *
private_data	drivers/block/sata_dwc.h	/^	void				*private_data;$/;"	m	struct:ata_port_info	typeref:typename:void *
private_data	drivers/block/sata_dwc.h	/^	void			*private_data;$/;"	m	struct:ata_host	typeref:typename:void *
private_data	drivers/block/sata_dwc.h	/^	void			*private_data;$/;"	m	struct:ata_port	typeref:typename:void *
private_data	drivers/block/sata_dwc.h	/^	void			*private_data;$/;"	m	struct:ata_queued_cmd	typeref:typename:void *
private_data	drivers/usb/gadget/f_mass_storage.c	/^	void			*private_data;$/;"	m	struct:fsg_common	typeref:typename:void *	file:
private_data	drivers/usb/gadget/f_mass_storage.c	/^	void			*private_data;$/;"	m	struct:fsg_config	typeref:typename:void *	file:
private_data	drivers/usb/musb-new/musb_dma.h	/^	void			*private_data;$/;"	m	struct:dma_channel	typeref:typename:void *
private_data	fs/ubifs/ubifs.h	/^	void			*private_data;	\/* ditto *\/$/;"	m	struct:address_space	typeref:typename:void *
private_data	fs/ubifs/ubifs.h	/^	void			*private_data;$/;"	m	struct:file	typeref:typename:void *
private_data_size	include/fsl-mc/fsl_dpni.h	/^	uint16_t private_data_size;$/;"	m	struct:dpni_buffer_layout	typeref:typename:uint16_t
private_list	fs/ubifs/ubifs.h	/^	struct list_head	private_list;	\/* ditto *\/$/;"	m	struct:address_space	typeref:struct:list_head
private_lock	fs/ubifs/ubifs.h	/^	spinlock_t		private_lock;	\/* for use by the address_space *\/$/;"	m	struct:address_space	typeref:typename:spinlock_t
privdata	include/usbdevice.h	/^	void *privdata;		\/* private data for the bus interface *\/$/;"	m	struct:usb_bus_instance	typeref:typename:void *
privptr	include/usb.h	/^	void *privptr;$/;"	m	struct:usb_device	typeref:typename:void *
prm	arch/arm/dts/dra7.dtsi	/^			prm: prm@6000 {$/;"	l	label:l4_wkup
prm	arch/arm/include/asm/arch-omap3/cpu.h	/^struct prm {$/;"	s
prm_abbldo_eve_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_eve_ctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_eve_setup	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_eve_setup;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_gpu_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_gpu_ctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_gpu_setup	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_gpu_setup;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_iva_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_iva_ctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_iva_setup	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_iva_setup;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_mm_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_mm_ctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_mm_setup	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_mm_setup;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_mpu_ctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_mpu_ctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_abbldo_mpu_setup	arch/arm/include/asm/omap_common.h	/^	u32 prm_abbldo_mpu_setup;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_clockdomains	arch/arm/dts/dra7.dtsi	/^				prm_clockdomains: clockdomains {$/;"	l	label:l4_wkup.prm
prm_clocks	arch/arm/dts/dra7.dtsi	/^				prm_clocks: clocks {$/;"	l	label:l4_wkup.prm
prm_device_inst	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct prm_device_inst {$/;"	s
prm_io_pmctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_io_pmctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_irqstatus_mpu	arch/arm/include/asm/omap_common.h	/^	u32 prm_irqstatus_mpu;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_irqstatus_mpu_2	arch/arm/include/asm/omap_common.h	/^	u32 prm_irqstatus_mpu_2;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_rstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int prm_rstctrl;$/;"	m	struct:prm_device_inst	typeref:typename:unsigned int
prm_rstctrl	arch/arm/include/asm/omap_common.h	/^	u32 prm_rstctrl;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_rstst	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int prm_rstst;$/;"	m	struct:prm_device_inst	typeref:typename:unsigned int
prm_rstst	arch/arm/include/asm/omap_common.h	/^	u32 prm_rstst;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_rsttime	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int prm_rsttime;$/;"	m	struct:prm_device_inst	typeref:typename:unsigned int
prm_rsttime	arch/arm/include/asm/omap_common.h	/^	u32 prm_rsttime;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_vc_cfg_channel	arch/arm/include/asm/omap_common.h	/^	u32 prm_vc_cfg_channel;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_vc_cfg_i2c_clk	arch/arm/include/asm/omap_common.h	/^	u32 prm_vc_cfg_i2c_clk;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_vc_cfg_i2c_mode	arch/arm/include/asm/omap_common.h	/^	u32 prm_vc_cfg_i2c_mode;$/;"	m	struct:prcm_regs	typeref:typename:u32
prm_vc_val_bypass	arch/arm/include/asm/omap_common.h	/^	u32 prm_vc_val_bypass;$/;"	m	struct:prcm_regs	typeref:typename:u32
prnsts	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	prnsts;		\/* _PRESENT_STATE_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
pro4_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^pro4_end:$/;"	l
pro5_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^pro5_end:$/;"	l
prob_dev	drivers/usb/eth/usb_ether.c	/^static const struct usb_eth_prob_dev prob_dev[] = {$/;"	v	typeref:typename:const struct usb_eth_prob_dev[]	file:
probe	drivers/core/devres.c	/^	bool				probe;$/;"	m	struct:devres	typeref:typename:bool	file:
probe	drivers/usb/eth/usb_ether.c	/^	usb_eth_probe			probe;$/;"	m	struct:usb_eth_prob_dev	typeref:typename:usb_eth_probe	file:
probe	fs/fs.c	/^	int (*probe)(struct blk_desc *fs_dev_desc,$/;"	m	struct:fstype_info	typeref:typename:int (*)(struct blk_desc * fs_dev_desc,disk_partition_t * fs_partition)	file:
probe	include/dm/device.h	/^	int (*probe)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
probe	include/i2c.h	/^	int		(*probe)(struct i2c_adapter *adap, uint8_t chip);$/;"	m	struct:i2c_adapter	typeref:typename:int (*)(struct i2c_adapter * adap,uint8_t chip)
probe	include/linux/mtd/nand.h	/^	int (*probe)(struct platform_device *pdev);$/;"	m	struct:platform_nand_ctrl	typeref:typename:int (*)(struct platform_device * pdev)
probe	include/phy.h	/^	int (*probe)(struct phy_device *phydev);$/;"	m	struct:phy_driver	typeref:typename:int (*)(struct phy_device * phydev)
probe_chip	include/i2c.h	/^	int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);$/;"	m	struct:dm_i2c_ops	typeref:typename:int (*)(struct udevice * bus,uint chip_addr,uint chip_flags)
probe_ent	drivers/block/ahci.c	/^struct ahci_probe_ent *probe_ent = NULL;$/;"	v	typeref:struct:ahci_probe_ent *
probe_l2	arch/mips/lib/cache.c	/^static void probe_l2(void)$/;"	f	typeref:typename:void	file:
probe_port	drivers/block/sata_mv.c	/^static int probe_port(int port)$/;"	f	typeref:typename:int	file:
probe_sdram	board/keymile/km82xx/km82xx.c	/^static long probe_sdram(memctl8260_t *memctl)$/;"	f	typeref:typename:long	file:
probe_sdram_size	board/compulab/cm_t335/spl.c	/^static void probe_sdram_size(long size)$/;"	f	typeref:typename:void	file:
probe_usb_keyboard	common/usb_kbd.c	/^static int probe_usb_keyboard(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
probe_valid_drivers	drivers/usb/eth/usb_ether.c	/^static void probe_valid_drivers(struct usb_device *dev)$/;"	f	typeref:typename:void	file:
probecpu	arch/powerpc/cpu/mpc8xxx/cpu.c	/^int probecpu (void)$/;"	f	typeref:typename:int
probing	fs/ubifs/ubifs.h	/^	unsigned int probing:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
probs	lib/lzma/LzmaDec.h	/^  CLzmaProb *probs;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:CLzmaProb *
proc	net/nfs.h	/^			uint32_t proc;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780208	typeref:typename:uint32_t
proc_3_test	drivers/remoteproc/sandbox_testproc.c	/^static struct dm_rproc_uclass_pdata proc_3_test = {$/;"	v	typeref:struct:dm_rproc_uclass_pdata	file:
proc_entry	drivers/usb/musb-new/musb_core.h	/^	struct proc_dir_entry *proc_entry;$/;"	m	struct:musb	typeref:struct:proc_dir_entry *
proc_mtd	drivers/mtd/mtdcore.c	/^static struct proc_dir_entry *proc_mtd;$/;"	v	typeref:struct:proc_dir_entry *	file:
proc_task_stat	drivers/video/ipu_regs.h	/^	u32 proc_task_stat;$/;"	m	struct:ipu_stat	typeref:typename:u32
procclk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^	struct refclk *procclk;$/;"	m	struct:refclk_lkup	typeref:struct:refclk *	file:
procclk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^	struct refclk *procclk;$/;"	m	struct:refclk_lkup	typeref:struct:refclk *	file:
process	scripts/checkpatch.pl	/^sub process {$/;"	s
process_args	tools/mkimage.c	/^static void process_args(int argc, char **argv)$/;"	f	typeref:typename:void	file:
process_cmd	drivers/misc/cros_ec_sandbox.c	/^static int process_cmd(struct ec_state *ec,$/;"	f	typeref:typename:int	file:
process_command_subs	common/cli_hush.c	/^static int process_command_subs(o_string *dest, struct p_context *ctx, struct in_str *input, int/;"	f	typeref:typename:int	file:
process_csv	tools/rkmux.py	/^def process_csv(name, fd):$/;"	f
process_data	drivers/usb/gadget/f_thor.c	/^static int process_data(void)$/;"	f	typeref:typename:int	file:
process_ep_in_intr	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void process_ep_in_intr(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
process_ep_out_intr	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void process_ep_out_intr(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
process_event_record	arch/arm/imx-common/hab.c	/^void process_event_record(uint8_t *event_data, size_t bytes)$/;"	f	typeref:typename:void
process_fdt_options	common/autoboot.c	/^static void process_fdt_options(const void *blob)$/;"	f	typeref:typename:void	file:
process_fifo	drivers/input/tegra-kbc.c	/^static void process_fifo(struct tegra_kbd_priv *priv, int fifo_cnt)$/;"	f	typeref:typename:void	file:
process_file	scripts/kernel-doc	/^sub process_file($) {$/;"	s
process_file	tools/rkmux.py	/^def process_file(name, fd):$/;"	f
process_iocsr_config	arch/arm/mach-socfpga/qts-filter.sh	/^process_iocsr_config() {$/;"	f
process_lvol	drivers/mtd/ubi/vtbl.c	/^static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_vtbl_record *	file:
process_mac	board/keymile/common/ivm.c	/^static int process_mac(unsigned char *valbuf, unsigned char *buf,$/;"	f	typeref:typename:int	file:
process_modifier	drivers/input/input.c	/^static struct input_key_xlate *process_modifier(struct input_config *config,$/;"	f	typeref:struct:input_key_xlate *	file:
process_nodes	drivers/i2c/s3c24x0_i2c.c	/^static void process_nodes(const void *blob, int node_list[], int count,$/;"	f	typeref:typename:void	file:
process_nodes	drivers/mmc/s5p_sdhci.c	/^static int process_nodes(const void *blob, int node_list[], int count)$/;"	f	typeref:typename:int	file:
process_pinmux_config	arch/arm/mach-socfpga/qts-filter.sh	/^process_pinmux_config() {$/;"	f
process_pll_config	arch/arm/mach-socfpga/qts-filter.sh	/^process_pll_config() {$/;"	f
process_pool_aeb	drivers/mtd/ubi/fastmap.c	/^static int process_pool_aeb(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int	file:
process_responses	drivers/block/sata_mv.c	/^static void process_responses(int port)$/;"	f	typeref:typename:void	file:
process_rqt_cmd	drivers/usb/gadget/f_thor.c	/^static int process_rqt_cmd(const struct rqt_box *rqt)$/;"	f	typeref:typename:int	file:
process_rqt_download	drivers/usb/gadget/f_thor.c	/^static long long int process_rqt_download(const struct rqt_box *rqt)$/;"	f	typeref:typename:long long int	file:
process_rqt_info	drivers/usb/gadget/f_thor.c	/^static int process_rqt_info(const struct rqt_box *rqt)$/;"	f	typeref:typename:int	file:
process_sdram_config	arch/arm/mach-socfpga/qts-filter.sh	/^process_sdram_config() {$/;"	f
process_setup	board/gdsys/common/phy.c	/^static int process_setup(const char *bus, unsigned char addr,$/;"	f	typeref:typename:int	file:
process_setupcmd	board/gdsys/common/phy.c	/^static int process_setupcmd(const char *bus, unsigned char addr,$/;"	f	typeref:typename:int	file:
process_special_keys	scripts/kconfig/nconf.c	/^static int process_special_keys(int *key, struct menu *menu)$/;"	f	typeref:typename:int	file:
process_state3_function	scripts/kernel-doc	/^sub process_state3_function($$) {$/;"	s
process_state3_type	scripts/kernel-doc	/^sub process_state3_type($$) {$/;"	s
processedPos	lib/lzma/LzmaDec.h	/^  UInt32 processedPos;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:UInt32
processor	disk/part_mac.h	/^	uchar	processor[16];	\/* Type of Processor			*\/$/;"	m	struct:mac_partition	typeref:typename:uchar[16]
processor_characteristics	include/smbios.h	/^	u16 processor_characteristics;$/;"	m	struct:smbios_type4	typeref:typename:u16
processor_family	include/smbios.h	/^	u8 processor_family;$/;"	m	struct:smbios_type4	typeref:typename:u8
processor_family2	include/smbios.h	/^	u16 processor_family2;$/;"	m	struct:smbios_type4	typeref:typename:u16
processor_flags	arch/x86/cpu/intel_common/microcode.c	/^	uint processor_flags;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
processor_id	arch/x86/include/asm/acpi_table.h	/^	u8 processor_id;	\/* ACPI processor ID *\/$/;"	m	struct:acpi_madt_lapic	typeref:typename:u8
processor_id	arch/x86/include/asm/acpi_table.h	/^	u8 processor_id;	\/* ACPI processor ID *\/$/;"	m	struct:acpi_madt_lapic_nmi	typeref:typename:u8
processor_id	include/smbios.h	/^	u32 processor_id[2];$/;"	m	struct:smbios_type4	typeref:typename:u32[2]
processor_manufacturer	include/smbios.h	/^	u8 processor_manufacturer;$/;"	m	struct:smbios_type4	typeref:typename:u8
processor_mode	arch/arm/include/asm/proc-armv/ptrace.h	/^#define processor_mode(/;"	d
processor_mode	arch/nds32/include/asm/ptrace.h	/^#define processor_mode(/;"	d
processor_signature	arch/x86/cpu/intel_common/microcode.c	/^	uint processor_signature;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
processor_type	include/smbios.h	/^	u8 processor_type;$/;"	m	struct:smbios_type4	typeref:typename:u8
processor_upgrade	include/smbios.h	/^	u8 processor_upgrade;$/;"	m	struct:smbios_type4	typeref:typename:u8
processor_version	include/smbios.h	/^	u8 processor_version;$/;"	m	struct:smbios_type4	typeref:typename:u8
proctl	drivers/mmc/fsl_esdhc.c	/^	uint    proctl;		\/* Protocol control register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
prod	include/usb.h	/^	char	prod[32];		\/* product *\/$/;"	m	struct:usb_device	typeref:typename:char[32]
prod_id	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 prod_id;		\/* 0x08 *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
produce_free_peb	drivers/mtd/ubi/wl.c	/^static int produce_free_peb(struct ubi_device *ubi)$/;"	f	typeref:typename:int	file:
product	drivers/usb/emul/sandbox_flash.c	/^	char product[16];$/;"	m	struct:scsi_inquiry_resp	typeref:typename:char[16]	file:
product	drivers/usb/eth/asix.c	/^	unsigned short product;$/;"	m	struct:asix_dongle	typeref:typename:unsigned short	file:
product	drivers/usb/eth/asix88179.c	/^	unsigned short product;$/;"	m	struct:asix_dongle	typeref:typename:unsigned short	file:
product	drivers/usb/eth/mcs7830.c	/^	uint16_t product;$/;"	m	struct:mcs7830_dongle	typeref:typename:uint16_t	file:
product	drivers/usb/eth/r8152.c	/^	unsigned short product;$/;"	m	struct:r8152_dongle	typeref:typename:unsigned short	file:
product	drivers/usb/eth/smsc95xx.c	/^	unsigned short product;$/;"	m	struct:smsc95xx_dongle	typeref:typename:unsigned short	file:
product	drivers/usb/gadget/g_dnl.c	/^static const char product[] = "USB download gadget";$/;"	v	typeref:typename:const char[]	file:
product	include/blk.h	/^	char		product[20+1];	\/* IDE Serial no, SCSI product *\/$/;"	m	struct:blk_desc	typeref:typename:char[]
product	include/configs/tam3517-common.h	/^	char product[48];$/;"	m	struct:tam3517_module_info	typeref:typename:char[48]
product_code	include/edid.h	/^	unsigned char product_code[2];$/;"	m	struct:edid1_info	typeref:typename:unsigned char[2]
product_desc	drivers/usb/gadget/ether.c	/^static char product_desc[40] = DRIVER_DESC;$/;"	v	typeref:typename:char[40]	file:
product_id0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 product_id0;			\/* 0x002 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
product_id1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 product_id1;			\/* 0x003 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
product_id_high	include/usb/ulpi.h	/^	u8	product_id_high;$/;"	m	struct:ulpi_regs	typeref:typename:u8
product_id_low	include/usb/ulpi.h	/^	u8	product_id_low;$/;"	m	struct:ulpi_regs	typeref:typename:u8
product_name	drivers/usb/gadget/f_mass_storage.c	/^	const char *product_name;		\/* 16 characters or less *\/$/;"	m	struct:fsg_common	typeref:typename:const char *	file:
product_name	drivers/usb/gadget/f_mass_storage.c	/^	const char *product_name;		\/* 16 characters or less *\/$/;"	m	struct:fsg_config	typeref:typename:const char *	file:
product_name	include/smbios.h	/^	u8 product_name;$/;"	m	struct:smbios_type1	typeref:typename:u8
product_name	include/smbios.h	/^	u8 product_name;$/;"	m	struct:smbios_type2	typeref:typename:u8
product_name_ptr	include/vbe.h	/^	u32 product_name_ptr;$/;"	m	struct:vbe_info	typeref:typename:u32
product_rev_ptr	include/vbe.h	/^	u32 product_rev_ptr;$/;"	m	struct:vbe_info	typeref:typename:u32
product_version	tools/mxsimage.h	/^			product_version;$/;"	m	struct:sb_boot_image_header	typeref:struct:sb_boot_image_version
production_mode	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 production_mode;		\/* 0x100: FUSE_PRODUCTION_MODE *\/$/;"	m	struct:fuse_regs	typeref:typename:u32
prof_tool	tools/proftool.c	/^static int prof_tool(int argc, char * const argv[],$/;"	f	typeref:typename:int	file:
proff	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		int proff, page, sblock;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:int	file:
proff_enet	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^	int proff_enet;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
proff_enet	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^	int proff_enet;$/;"	m	struct:ether_fcc_info_s	typeref:typename:int	file:
proff_scc	post/cpu/mpc8xx/uart.c	/^static int proff_scc[] =$/;"	v	typeref:typename:int[]	file:
proff_smc	post/cpu/mpc8xx/uart.c	/^static int proff_smc[] = { PROFF_SMC1, PROFF_SMC2 };$/;"	v	typeref:typename:int[]	file:
profile	board/micronas/vct/scc.h	/^	u32 profile;		\/* SCC VCI_D profile			*\/$/;"	m	struct:scc_descriptor	typeref:typename:u32
profile_pc	arch/blackfin/include/asm/ptrace.h	/^#define profile_pc(/;"	d
profile_pc	arch/mips/include/asm/ptrace.h	/^#define profile_pc(/;"	d
profile_pc	arch/openrisc/include/asm/ptrace.h	/^#define profile_pc(/;"	d
profile_pc	arch/sh/include/asm/ptrace.h	/^static inline unsigned long profile_pc(struct pt_regs *regs)$/;"	f	typeref:typename:unsigned long
profile_pc	arch/xtensa/include/asm/ptrace.h	/^#  define profile_pc(/;"	d
prog	arch/arm/dts/at91sam9260.dtsi	/^				prog: progck {$/;"	l	label:pmc
prog	arch/arm/dts/at91sam9261.dtsi	/^				prog: progck {$/;"	l	label:pmc
prog	arch/arm/dts/at91sam9263.dtsi	/^				prog: progck {$/;"	l	label:pmc
prog	arch/arm/dts/at91sam9g45.dtsi	/^				prog: progck {$/;"	l	label:pmc
prog	arch/arm/dts/sama5d2.dtsi	/^				prog: progck {$/;"	l	label:pmc
prog	net/nfs.h	/^			uint32_t prog;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780208	typeref:typename:uint32_t
prog0	arch/arm/dts/at91sam9260.dtsi	/^					prog0: prog0 {$/;"	l	label:pmc.prog
prog0	arch/arm/dts/at91sam9261.dtsi	/^					prog0: prog0 {$/;"	l	label:pmc.prog
prog0	arch/arm/dts/at91sam9263.dtsi	/^					prog0: prog0 {$/;"	l	label:pmc.prog
prog0	arch/arm/dts/at91sam9g45.dtsi	/^					prog0: prog0 {$/;"	l	label:pmc.prog
prog0	arch/arm/dts/sama5d2.dtsi	/^					prog0: prog@0 {$/;"	l	label:pmc.prog
prog1	arch/arm/dts/at91sam9260.dtsi	/^					prog1: prog1 {$/;"	l	label:pmc.prog
prog1	arch/arm/dts/at91sam9261.dtsi	/^					prog1: prog1 {$/;"	l	label:pmc.prog
prog1	arch/arm/dts/at91sam9263.dtsi	/^					prog1: prog1 {$/;"	l	label:pmc.prog
prog1	arch/arm/dts/at91sam9g45.dtsi	/^					prog1: prog1 {$/;"	l	label:pmc.prog
prog1	arch/arm/dts/sama5d2.dtsi	/^					prog1: prog@1 {$/;"	l	label:pmc.prog
prog2	arch/arm/dts/at91sam9261.dtsi	/^					prog2: prog2 {$/;"	l	label:pmc.prog
prog2	arch/arm/dts/at91sam9263.dtsi	/^					prog2: prog2 {$/;"	l	label:pmc.prog
prog2	arch/arm/dts/sama5d2.dtsi	/^					prog2: prog@2 {$/;"	l	label:pmc.prog
prog3	arch/arm/dts/at91sam9261.dtsi	/^					prog3: prog3 {$/;"	l	label:pmc.prog
prog3	arch/arm/dts/at91sam9263.dtsi	/^					prog3: prog3 {$/;"	l	label:pmc.prog
prog_bit	drivers/misc/fsl_iim.c	/^static int prog_bit(struct fsl_iim *regs, u32 bank, u32 word, u32 bit)$/;"	f	typeref:typename:int	file:
prog_ddr_control	arch/x86/cpu/quark/smc.c	/^void prog_ddr_control(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
prog_ddr_timing_control	arch/x86/cpu/quark/smc.c	/^void prog_ddr_timing_control(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
prog_decode_before_jedec	arch/x86/cpu/quark/smc.c	/^void prog_decode_before_jedec(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
prog_dra_drb	arch/x86/cpu/quark/smc.c	/^void prog_dra_drb(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
prog_eeprom	board/freescale/common/sys_eeprom.c	/^static int prog_eeprom(void)$/;"	f	typeref:typename:int	file:
prog_eeprom	board/varisys/common/sys_eeprom.c	/^static int prog_eeprom(void)$/;"	f	typeref:typename:int	file:
prog_name	tools/mkexynosspl.c	/^static const char *prog_name;$/;"	v	typeref:typename:const char *	file:
prog_page_ctrl	arch/x86/cpu/quark/smc.c	/^void prog_page_ctrl(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
progname	lib/libfdt/setup.py	/^progname = sys.argv[0]$/;"	v
progname	scripts/kconfig/qconf.cc	/^static const char *progname;$/;"	v	typeref:typename:const char *	file:
program_DQS_calibration	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_DQS_calibration(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_DQS_calibration_methodA	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static u32 program_DQS_calibration_methodA(struct ddrautocal *ddrcal)$/;"	f	typeref:typename:u32	file:
program_DQS_calibration_methodB	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static u32 program_DQS_calibration_methodB(struct ddrautocal *ddrcal)$/;"	f	typeref:typename:u32	file:
program_async_controller	arch/blackfin/cpu/initcode.h	/^program_async_controller(ADI_BOOT_DATA *bs)$/;"	f	typeref:typename:void
program_bxcf	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_bxcf(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_bxcr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static unsigned long program_bxcr(unsigned long *dimm_populated,$/;"	f	typeref:typename:unsigned long	file:
program_cache_timing_mode	include/linux/mtd/nand.h	/^	__le16 program_cache_timing_mode;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
program_cfg0	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void program_cfg0(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_cfg1	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void program_cfg1(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_clocks	arch/blackfin/cpu/initcode.c	/^program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)$/;"	f	typeref:typename:u16	file:
program_codt	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_codt(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_copt1	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_copt1(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_ddr0_03	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_03(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_ddr0_04	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_04(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_ddr0_05	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_05(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_ddr0_06	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_06(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_ddr0_10	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_10(unsigned long dimm_ranks[], unsigned long ranks)$/;"	f	typeref:typename:void	file:
program_ddr0_11	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_11(unsigned long sdram_freq)$/;"	f	typeref:typename:void	file:
program_ddr0_22	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_22(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_ddr0_24	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_24(unsigned long ranks)$/;"	f	typeref:typename:void	file:
program_ddr0_26	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_26(unsigned long sdram_freq)$/;"	f	typeref:typename:void	file:
program_ddr0_27	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_27(unsigned long sdram_freq)$/;"	f	typeref:typename:void	file:
program_ddr0_43	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_43(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_ddr0_44	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static void program_ddr0_44(unsigned long dimm_ranks[],$/;"	f	typeref:typename:void	file:
program_early_devices	arch/blackfin/cpu/initcode.c	/^program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint *divB, uint *vcoB)$/;"	f	typeref:typename:void	file:
program_ecc	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_ecc(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_ecc	board/liebherr/lwmon5/sdram.c	/^static void program_ecc(u32 start_address,$/;"	f	typeref:typename:void	file:
program_ecc_addr	arch/powerpc/cpu/ppc4xx/ecc.c	/^static void program_ecc_addr(unsigned long start_address,$/;"	f	typeref:typename:void	file:
program_initplr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_initplr(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_memory_controller	arch/blackfin/cpu/initcode.c	/^program_memory_controller(ADI_BOOT_DATA *bs, bool put_into_srfs)$/;"	f	typeref:typename:void	file:
program_memory_queue	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_memory_queue(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_mode	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_mode(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_nmi_handler	arch/blackfin/cpu/initcode.c	/^program_nmi_handler(void)$/;"	f	typeref:typename:void	file:
program_pll	board/freescale/s32v234evb/clock.c	/^static int program_pll(enum pll_type pll, u32 refclk_freq, u32 freq0, u32 freq1,$/;"	f	typeref:typename:int	file:
program_rtr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void program_rtr(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_rtr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_rtr(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_tlb	arch/powerpc/cpu/ppc4xx/tlb.c	/^void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value)$/;"	f	typeref:typename:void
program_tlb_addr	arch/powerpc/cpu/ppc4xx/tlb.c	/^static void program_tlb_addr(u64 phys_addr,$/;"	f	typeref:typename:void	file:
program_tr	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void program_tr(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_tr0	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void program_tr0(unsigned long *dimm_populated,$/;"	f	typeref:typename:void	file:
program_tr1	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static void program_tr1(void)$/;"	f	typeref:typename:void	file:
program_write	drivers/fpga/stratixv.c	/^static int program_write(int spi_bus, int spi_dev, const void *rbf_data,$/;"	f	typeref:typename:int	file:
programs_per_page	include/linux/mtd/nand.h	/^	u8 programs_per_page;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
programs_per_page	include/linux/mtd/nand.h	/^	u8 programs_per_page;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
progress_code	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 progress_code:4;$/;"	m	struct:me_hfs2	typeref:typename:u32:4
progress_code	arch/x86/include/asm/me_common.h	/^	u32 progress_code:4;$/;"	m	struct:me_gmes	typeref:typename:u32:4
progs	common/cli_hush.c	/^	struct child_prog *progs;	\/* array of commands in pipe *\/$/;"	m	struct:pipe	typeref:struct:child_prog *	file:
prom_init	arch/sparc/cpu/leon2/prom.c	/^int prom_init(void)$/;"	f	typeref:typename:int
prom_init	arch/sparc/cpu/leon3/prom.c	/^int prom_init(void)$/;"	f	typeref:typename:int
prom_relocate	arch/sparc/cpu/leon2/start.S	/^prom_relocate:$/;"	l
prom_relocate	arch/sparc/cpu/leon3/start.S	/^prom_relocate:$/;"	l
promiscuous	drivers/net/ks8851_mll.c	/^	u16			promiscuous;$/;"	m	struct:ks_net	typeref:typename:u16	file:
prommap_p	arch/sparc/cpu/leon2/prom.c	/^	struct linux_mlist_v0 *prommap_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0 *	file:
prommap_p	arch/sparc/cpu/leon3/prom.c	/^	struct linux_mlist_v0 *prommap_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0 *	file:
prompt	cmd/pxe.c	/^	int prompt;$/;"	m	struct:pxe_menu	typeref:typename:int	file:
prompt	common/menu.c	/^	int prompt;$/;"	m	struct:menu	typeref:typename:int	file:
prompt	scripts/kconfig/expr.h	/^	struct property *prompt;$/;"	m	struct:menu	typeref:struct:property *
prompt	scripts/kconfig/zconf.y	/^prompt:	  T_WORD$/;"	l	typeref:typename:string
promptColIdx	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
promptOpt	scripts/kconfig/qconf.h	/^	normalOpt = 0, allOpt, promptOpt$/;"	e	enum:optionMode
prompt_stmt_opt	scripts/kconfig/zconf.y	/^prompt_stmt_opt:$/;"	l
promptmode	common/cli_hush.c	/^	int promptmode;$/;"	m	struct:in_str	typeref:typename:int	file:
prop	lib/lzma/LzmaDec.h	/^  CLzmaProps prop;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:CLzmaProps
prop	scripts/kconfig/expr.h	/^	struct property *prop;$/;"	m	struct:symbol	typeref:struct:property *
prop	scripts/kconfig/symbol.c	/^	struct property *prop;$/;"	m	struct:dep_stack	typeref:struct:property *	file:
prop_add_env	scripts/kconfig/symbol.c	/^static void prop_add_env(const char *env)$/;"	f	typeref:typename:void	file:
prop_alloc	scripts/kconfig/symbol.c	/^struct property *prop_alloc(enum prop_type type, struct symbol *sym)$/;"	f	typeref:struct:property *
prop_get_symbol	scripts/kconfig/symbol.c	/^struct symbol *prop_get_symbol(struct property *prop)$/;"	f	typeref:struct:symbol *
prop_get_type_name	scripts/kconfig/symbol.c	/^const char *prop_get_type_name(enum prop_type type)$/;"	f	typeref:typename:const char *
prop_type	scripts/kconfig/expr.h	/^enum prop_type {$/;"	g
prop_warn	scripts/kconfig/menu.c	/^static void prop_warn(struct property *prop, const char *fmt, ...)$/;"	f	typeref:typename:void	file:
propagate	include/linux/rbtree_augmented.h	/^	void (*propagate)(struct rb_node *node, struct rb_node *stop);$/;"	m	struct:rb_augment_callbacks	typeref:typename:void (*)(struct rb_node * node,struct rb_node * stop)
properties	arch/sparc/cpu/leon2/prom.c	/^	struct property *properties;$/;"	m	struct:node	typeref:struct:property *	file:
properties	arch/sparc/cpu/leon3/prom.c	/^	struct property *properties;$/;"	m	struct:node	typeref:struct:property *	file:
property	arch/sparc/cpu/leon2/prom.c	/^struct property {$/;"	s	file:
property	arch/sparc/cpu/leon3/prom.c	/^struct property {$/;"	s	file:
property	include/dm/pinctrl.h	/^	const char * const property;$/;"	m	struct:pinconf_param	typeref:typename:const char * const
property	include/mtd/ubi-user.h	/^	__u8  property;$/;"	m	struct:ubi_set_vol_prop_req	typeref:typename:__u8
property	scripts/kconfig/expr.h	/^struct property {$/;"	s
property_enable	drivers/usb/phy/rockchip_usb2_phy.c	/^static void property_enable(struct dwc2_plat_otg_data *pdata,$/;"	f	typeref:typename:void	file:
prot	drivers/block/sata_sil.h	/^	__le16 prot;$/;"	m	struct:sil_prb	typeref:typename:__le16
prot	include/faraday/ftpci100.h	/^	unsigned int prot;		\/* 0x04 - AHB Protection *\/$/;"	m	struct:ftpci100_ahbc	typeref:typename:unsigned int
prot_dataflash	drivers/mtd/dataflash.c	/^int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr)$/;"	f	typeref:typename:int
prot_queue_add	drivers/mtd/ubi/wl.c	/^static void prot_queue_add(struct ubi_device *ubi, struct ubi_wl_entry *e)$/;"	f	typeref:typename:void	file:
prot_queue_del	drivers/mtd/ubi/wl.c	/^static int prot_queue_del(struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
prot_rule_addr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	prot_rule_addr;	\/* 0x90 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
prot_rule_data	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	prot_rule_data;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
prot_rule_id	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	prot_rule_id;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
prot_rule_rdwr	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	prot_rule_rdwr;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
protect	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 protect;		\/* 0x800 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
protect	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 protect;		\/* 0x800 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
protect	include/flash.h	/^	uchar	protect[CONFIG_SYS_MAX_FLASH_SECT]; \/* sector protection status	*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:uchar[]
protect_block_size	include/ec_commands.h	/^	uint32_t protect_block_size;$/;"	m	struct:ec_response_flash_info	typeref:typename:uint32_t
protect_secure_section	arch/arm/cpu/armv7/virt-v7.c	/^void __weak protect_secure_section(void) {}$/;"	f	typeref:typename:void __weak
protect_secure_section	arch/arm/mach-tegra/ap.c	/^void protect_secure_section(void)$/;"	f	typeref:typename:void
protected	include/dataflash.h	/^	unsigned char protected;$/;"	m	struct:__anona98984760108	typeref:typename:unsigned char
protection_queue_destroy	drivers/mtd/ubi/wl.c	/^static void protection_queue_destroy(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
proto	include/linux/ethtool.h	/^	__u8    proto;$/;"	m	struct:ethtool_usrip4_spec	typeref:typename:__u8
proto_t	include/net.h	/^enum proto_t {$/;"	g
protocol	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^	u32 protocol;$/;"	m	struct:serdes_config	typeref:typename:u32	file:
protocol	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^	u32 protocol;$/;"	m	struct:serdes_config	typeref:typename:u32	file:
protocol	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^	u32 protocol;$/;"	m	struct:serdes_config	typeref:typename:u32	file:
protocol	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^	u8 protocol;$/;"	m	struct:serdes_config	typeref:typename:u8	file:
protocol	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^	u8 protocol;$/;"	m	struct:serdes_config	typeref:typename:u8	file:
protocol	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^	u32 protocol;$/;"	m	struct:serdes_config	typeref:typename:u32	file:
protocol	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^	u32 protocol;$/;"	m	struct:serdes_config	typeref:typename:u32	file:
protocol	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^	u32 protocol;$/;"	m	struct:serdes_config	typeref:typename:u32	file:
protocol	common/usb_storage.c	/^	unsigned char	protocol;		\/* .............. *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
protocol	include/libata.h	/^	u8			protocol;	\/* ATA_PROT_xxx *\/$/;"	m	struct:ata_taskfile	typeref:typename:u8
protocol	include/usb_ether.h	/^	unsigned char	protocol;	\/* .............. *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
protocol_version	include/cros_ec.h	/^	int protocol_version;           \/* Protocol version to use *\/$/;"	m	struct:cros_ec_dev	typeref:typename:int
protocol_versions	include/ec_commands.h	/^	uint32_t protocol_versions;$/;"	m	struct:ec_response_get_protocol_info	typeref:typename:uint32_t
protocols	include/efi_loader.h	/^	struct efi_handler protocols[4];$/;"	m	struct:efi_object	typeref:struct:efi_handler[4]
prototype_board	board/freescale/mpc8569mds/mpc8569mds.c	/^static int prototype_board(void)$/;"	f	typeref:typename:int	file:
protport_default	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	protport_default;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
provide_user_output	fs/ubifs/debug.c	/^static int provide_user_output(int val, char __user *u, size_t count,$/;"	f	typeref:typename:int	file:
proxy	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct qm_reg_queue *proxy;$/;"	m	struct:qm_config	typeref:struct:qm_reg_queue *
proxy_offer	include/efi_api.h	/^	struct efi_pxe_packet proxy_offer;$/;"	m	struct:efi_pxe_mode	typeref:struct:efi_pxe_packet
prr_mask	arch/sh/include/asm/cpu_sh7757.h	/^#define prr_mask(/;"	d
prs1	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 prs1;		\/* 0x100 Priority Register Slave 1 *\/$/;"	m	struct:xbs	typeref:typename:u32
prs4	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 prs4;		\/* 0x400 Priority Register Slave 4 *\/$/;"	m	struct:xbs	typeref:typename:u32
prs6	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 prs6;		\/* 0x600 Priority Register Slave 6 *\/$/;"	m	struct:xbs	typeref:typename:u32
prs7	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 prs7;		\/* 0x700 Priority Register Slave 7 *\/$/;"	m	struct:xbs	typeref:typename:u32
prs_double_vlans	drivers/net/mvpp2.c	/^	bool *prs_double_vlans;$/;"	m	struct:mvpp2	typeref:typename:bool *	file:
prs_shadow	drivers/net/mvpp2.c	/^	struct mvpp2_prs_shadow *prs_shadow;$/;"	m	struct:mvpp2	typeref:struct:mvpp2_prs_shadow *	file:
prsc1_clk_cfg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prsc1_clk_cfg;	\/* 0x44 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prsc2_clk_cfg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prsc2_clk_cfg;	\/* 0x48 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prsc3_clk_cfg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 prsc3_clk_cfg;	\/* 0x4C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
prsstat	drivers/mmc/fsl_esdhc.c	/^	uint    prsstat;	\/* Present state register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
prst	board/keymile/common/common.h	/^	unsigned char	prst;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
prt_8260_clks	arch/powerpc/cpu/mpc8260/speed.c	/^int prt_8260_clks (void)$/;"	f	typeref:typename:int
prt_8260_rsr	arch/powerpc/cpu/mpc8260/cpu_init.c	/^int prt_8260_rsr (void)$/;"	f	typeref:typename:int
prt_83xx_rsr	arch/powerpc/cpu/mpc83xx/cpu_init.c	/^int prt_83xx_rsr(void)$/;"	f	typeref:typename:int
prt_mpc5xxx_clks	arch/powerpc/cpu/mpc5xxx/speed.c	/^int prt_mpc5xxx_clks (void)$/;"	f	typeref:typename:int
prtbuf	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	prtbuf;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
prtoccsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	prtoccsr;	\/* Port Response Time-out CCSR *\/$/;"	m	struct:rio_lp_serial	typeref:typename:u32
prtoccsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	prtoccsr;	\/* 0xc0124 - Port Response Time-out Control Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
prtr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	prtr;		\/* 0xd0e2c - Port Retry Threshold Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pruss_ocp_gclk	arch/arm/dts/am33xx-clocks.dtsi	/^	pruss_ocp_gclk: pruss_ocp_gclk {$/;"	l
pruss_ocp_gclk	arch/arm/dts/am43xx-clocks.dtsi	/^	pruss_ocp_gclk: pruss_ocp_gclk {$/;"	l
prv	include/mmc.h	/^	unsigned char prv;$/;"	m	struct:mmc_cid	typeref:typename:unsigned char
prx	include/usb/mpc8xx_udc.h	/^	volatile cbd_t * prx;$/;"	m	struct:mpc8xx_ep	typeref:typename:volatile cbd_t *
ps	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 ps;$/;"	m	struct:dram_sun9i_timing	typeref:typename:u32	file:
ps	arch/x86/lib/physmem.c	/^	uint64_t ps:1;     \/* page size *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
ps	arch/xtensa/include/asm/ptrace.h	/^	unsigned long ps;		\/*   8 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
ps0	drivers/net/mvgbe.h	/^	u32 ps0;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
ps1	drivers/net/mvgbe.h	/^	u32 ps1;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
ps20	arch/arm/dts/sun4i-a10.dtsi	/^		ps20: ps2@01c2a000 {$/;"	l
ps20	arch/arm/dts/sun7i-a20.dtsi	/^		ps20: ps2@01c2a000 {$/;"	l
ps20_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			ps20_pins_a: ps20@0 {$/;"	l	label:pio
ps20_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			ps20_pins_a: ps20@0 {$/;"	l	label:pio
ps21	arch/arm/dts/sun4i-a10.dtsi	/^		ps21: ps2@01c2a400 {$/;"	l
ps21	arch/arm/dts/sun7i-a20.dtsi	/^		ps21: ps2@01c2a400 {$/;"	l
ps21_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			ps21_pins_a: ps21@0 {$/;"	l	label:pio
ps21_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			ps21_pins_a: ps21@0 {$/;"	l	label:pio
ps2buf	drivers/input/ps2ser.c	/^static u_char	ps2buf[PS2BUF_SIZE];$/;"	v	typeref:typename:u_char[]	file:
ps2buf_cnt	drivers/input/ps2ser.c	/^static atomic_t	ps2buf_cnt;$/;"	v	typeref:typename:atomic_t	file:
ps2buf_in_idx	drivers/input/ps2ser.c	/^static int	ps2buf_in_idx;$/;"	v	typeref:typename:int	file:
ps2buf_out_idx	drivers/input/ps2ser.c	/^static int	ps2buf_out_idx;$/;"	v	typeref:typename:int	file:
ps2mult_buf	drivers/input/ps2mult.c	/^static u_char ps2mult_buf [PS2BUF_SIZE];$/;"	v	typeref:typename:u_char[]	file:
ps2mult_buf_cnt	drivers/input/ps2mult.c	/^static atomic_t ps2mult_buf_cnt;$/;"	v	typeref:typename:atomic_t	file:
ps2mult_buf_in_idx	drivers/input/ps2mult.c	/^static int ps2mult_buf_in_idx;$/;"	v	typeref:typename:int	file:
ps2mult_buf_out_idx	drivers/input/ps2mult.c	/^static int ps2mult_buf_out_idx;$/;"	v	typeref:typename:int	file:
ps2mult_buf_status	drivers/input/ps2mult.c	/^static u_char ps2mult_buf_status [PS2BUF_SIZE];$/;"	v	typeref:typename:u_char[]	file:
ps2mult_callback	drivers/input/ps2mult.c	/^void ps2mult_callback (int in_cnt)$/;"	f	typeref:typename:void
ps2mult_early_init	drivers/input/ps2mult.c	/^void ps2mult_early_init (void)$/;"	f	typeref:typename:void
ps2mult_getc_w	drivers/input/ps2mult.c	/^static int ps2mult_getc_w (void)$/;"	f	typeref:typename:int	file:
ps2mult_init	drivers/input/ps2mult.c	/^int ps2mult_init (void)$/;"	f	typeref:typename:int
ps2mult_read_input	drivers/input/ps2mult.c	/^u_char ps2mult_read_input(void)$/;"	f	typeref:typename:u_char
ps2mult_read_status	drivers/input/ps2mult.c	/^u_char ps2mult_read_status(void)$/;"	f	typeref:typename:u_char
ps2mult_receive_byte	drivers/input/ps2mult.c	/^static void ps2mult_receive_byte(u_char byte, u_char sel)$/;"	f	typeref:typename:void	file:
ps2mult_request_irq	drivers/input/ps2mult.c	/^int ps2mult_request_irq(void (*handler)(void *))$/;"	f	typeref:typename:int
ps2mult_send_byte	drivers/input/ps2mult.c	/^static void ps2mult_send_byte(u_char byte, u_char sel)$/;"	f	typeref:typename:void	file:
ps2mult_write_command	drivers/input/ps2mult.c	/^void ps2mult_write_command(u_char val)$/;"	f	typeref:typename:void
ps2mult_write_output	drivers/input/ps2mult.c	/^void ps2mult_write_output(u_char val)$/;"	f	typeref:typename:void
ps2ser_check	drivers/input/ps2ser.c	/^int ps2ser_check(void)$/;"	f	typeref:typename:int
ps2ser_getc	drivers/input/ps2ser.c	/^int ps2ser_getc(void)$/;"	f	typeref:typename:int
ps2ser_getc_hw	drivers/input/ps2ser.c	/^static int ps2ser_getc_hw(void)$/;"	f	typeref:typename:int	file:
ps2ser_init	drivers/input/ps2ser.c	/^int ps2ser_init(void)$/;"	f	typeref:typename:int
ps2ser_interrupt	drivers/input/ps2ser.c	/^static void ps2ser_interrupt(void *dev_id)$/;"	f	typeref:typename:void	file:
ps2ser_putc	drivers/input/ps2ser.c	/^void ps2ser_putc(int chr)$/;"	f	typeref:typename:void
ps7GetSiliconVersion	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ps7GetSiliconVersion () {$/;"	f	typeref:typename:unsigned long
ps7GetSiliconVersion	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ps7GetSiliconVersion () {$/;"	f	typeref:typename:unsigned long
ps7GetSiliconVersion	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ps7GetSiliconVersion () {$/;"	f	typeref:typename:unsigned long
ps7GetSiliconVersion	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ps7GetSiliconVersion () {$/;"	f	typeref:typename:unsigned long
ps7GetSiliconVersion	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7GetSiliconVersion(void)$/;"	f	typeref:typename:unsigned long
ps7_clock_init_data	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_clock_init_data	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_clock_init_data	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_clock_init_data	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_clock_init_data	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_clock_init_data_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_clock_init_data_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_clock_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_config	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ps7_config(unsigned long * ps7_config_init)$/;"	f	typeref:typename:int
ps7_config	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ps7_config(unsigned long * ps7_config_init)$/;"	f	typeref:typename:int
ps7_config	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ps7_config(unsigned long * ps7_config_init)$/;"	f	typeref:typename:int
ps7_config	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ps7_config(unsigned long * ps7_config_init)$/;"	f	typeref:typename:int
ps7_config	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^int ps7_config(unsigned long *ps7_config_init)$/;"	f	typeref:typename:int
ps7_ddr_init_data	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_ddr_init_data	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_ddr_init_data	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_ddr_init_data	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_ddr_init_data	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_ddr_init_data_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_ddr_init_data_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_ddr_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ps7_debug()$/;"	f	typeref:typename:int
ps7_debug	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ps7_debug()$/;"	f	typeref:typename:int
ps7_debug	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ps7_debug()$/;"	f	typeref:typename:int
ps7_debug	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ps7_debug()$/;"	f	typeref:typename:int
ps7_debug	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^int ps7_debug(void)$/;"	f	typeref:typename:int
ps7_debug_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_debug_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_debug_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_debug_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_debug_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_debug_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_debug_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_debug_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_debug_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_debug_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_debug_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_debug_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_debug_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_debug_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_debug_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_debug_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_debug_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_init	arch/arm/mach-zynq/spl.c	/^__weak void ps7_init(void)$/;"	f	typeref:typename:__weak void
ps7_init	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ps7_init()$/;"	f	typeref:typename:int
ps7_init	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ps7_init()$/;"	f	typeref:typename:int
ps7_init	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ps7_init()$/;"	f	typeref:typename:int
ps7_init	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ps7_init()$/;"	f	typeref:typename:int
ps7_init	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^int ps7_init(void)$/;"	f	typeref:typename:int
ps7_mio_init_data	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_mio_init_data	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_mio_init_data	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_mio_init_data	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_mio_init_data	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_mio_init_data_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_mio_init_data_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_mio_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_peripherals_init_data	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_peripherals_init_data	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_peripherals_init_data	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_peripherals_init_data	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_peripherals_init_data_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_peripherals_init_data_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_peripherals_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_pll_init_data	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_pll_init_data	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_pll_init_data	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_pll_init_data	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;$/;"	v	typeref:typename:unsigned long *
ps7_pll_init_data_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_pll_init_data_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_pll_init_data_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config	arch/arm/mach-zynq/spl.c	/^__weak int ps7_post_config(void)$/;"	f	typeref:typename:__weak int
ps7_post_config	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^ps7_post_config()$/;"	f	typeref:typename:int
ps7_post_config	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^ps7_post_config()$/;"	f	typeref:typename:int
ps7_post_config	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^ps7_post_config()$/;"	f	typeref:typename:int
ps7_post_config	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^ps7_post_config()$/;"	f	typeref:typename:int
ps7_post_config	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^int ps7_post_config(void)$/;"	f	typeref:typename:int
ps7_post_config_1_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_post_config_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_1_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_post_config_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_1_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_post_config_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_1_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_post_config_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_1_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_post_config_1_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_2_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_post_config_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_2_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_post_config_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_2_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_post_config_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_2_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_post_config_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_2_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_post_config_2_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_3_0	board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c	/^unsigned long ps7_post_config_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_3_0	board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c	/^unsigned long ps7_post_config_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_3_0	board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c	/^unsigned long ps7_post_config_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_3_0	board/xilinx/zynq/zynq-zed/ps7_init_gpl.c	/^unsigned long ps7_post_config_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps7_post_config_3_0	board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c	/^unsigned long ps7_post_config_3_0[] = {$/;"	v	typeref:typename:unsigned long[]
ps8622_attach	drivers/video/bridge/ps862x.c	/^static int ps8622_attach(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ps8622_ids	drivers/video/bridge/ps862x.c	/^static const struct udevice_id ps8622_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ps8622_ops	drivers/video/bridge/ps862x.c	/^struct video_bridge_ops ps8622_ops = {$/;"	v	typeref:struct:video_bridge_ops
ps8622_probe	drivers/video/bridge/ps862x.c	/^static int ps8622_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ps8622_set_backlight	drivers/video/bridge/ps862x.c	/^static int ps8622_set_backlight(struct udevice *dev, int percent)$/;"	f	typeref:typename:int	file:
ps8622_write	drivers/video/bridge/ps862x.c	/^static int ps8622_write(struct udevice *dev, unsigned addr_off,$/;"	f	typeref:typename:int	file:
ps_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ps_clk_cfg;		\/* 0x154 PS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ps_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ps_clk_cfg;		\/* 0x154 PS module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ps_data	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 ps_data[20];$/;"	m	struct:qm_host_desc	typeref:typename:u32[20]
ps_hold_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ps_hold_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
ps_hold_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ps_hold_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
ps_hold_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	ps_hold_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
ps_mode_reset	arch/arm/cpu/armv8/zynqmp/spl.c	/^static void ps_mode_reset(ulong mode)$/;"	f	typeref:typename:void	file:
psc	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short psc;             \/* 0xB0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
psc	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short psc;	\/* 0x30 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
psc	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short psc;		\/* 0xB0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
psc	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short psc;		\/* 0xB0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
psc	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 psc;$/;"	m	struct:gpt_regs	typeref:typename:u32
psc	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 psc;$/;"	m	struct:gpt_regs	typeref:typename:u32
psc	arch/arm/mach-stm32/stm32f1/clock.c	/^struct psc {$/;"	s	file:
psc	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 psc;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
psc	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 psc;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
psc	arch/powerpc/include/asm/immap_512x.h	/^	psc512x_t		psc[12];	\/* PSCs *\/$/;"	m	struct:immap	typeref:typename:psc512x_t[12]
psc	drivers/misc/pca9551_led.c	/^	u8 psc;	\/* Frequency preescaler, see PCA9551_7.pdf p. 6 *\/$/;"	m	struct:pca9551_blink_rate	typeref:typename:u8	file:
psc0	arch/arm/mach-davinci/include/mach/hardware.h	/^		} psc0;$/;"	m	union:davinci_psc_regs::__anonbc901033010a	typeref:struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330208
psc0	drivers/net/mvgbe.h	/^	u32 psc0;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
psc1	arch/arm/mach-davinci/include/mach/hardware.h	/^		} psc1;$/;"	m	union:davinci_psc_regs::__anonbc901033010a	typeref:struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330308
psc1	drivers/net/mvgbe.h	/^	u32 psc1;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
psc1_mccr	include/mpc5xxx.h	/^	volatile u32	psc1_mccr;	\/* 0x0028 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
psc2_mccr	include/mpc5xxx.h	/^	volatile u32	psc2_mccr;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
psc3_mccr	include/mpc5xxx.h	/^	volatile u32	psc3_mccr;	\/* 0x0030 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
psc512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct psc512x {$/;"	s
psc512x_t	arch/powerpc/include/asm/immap_512x.h	/^} psc512x_t;$/;"	t	typeref:struct:psc512x
psc6_mccr	include/mpc5xxx.h	/^	volatile u32	psc6_mccr;$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
psc_acr	arch/powerpc/include/asm/immap_512x.h	/^#define psc_acr	/;"	d
psc_acr	include/mpc5xxx.h	/^#define psc_acr	/;"	d
psc_buffer_16	arch/powerpc/include/asm/immap_512x.h	/^#define psc_buffer_16	/;"	d
psc_buffer_16	include/mpc5xxx.h	/^#define psc_buffer_16	/;"	d
psc_buffer_32	arch/powerpc/include/asm/immap_512x.h	/^#define psc_buffer_32	/;"	d
psc_buffer_32	include/mpc5xxx.h	/^#define psc_buffer_32	/;"	d
psc_buffer_8	arch/powerpc/include/asm/immap_512x.h	/^#define psc_buffer_8	/;"	d
psc_buffer_8	include/mpc5xxx.h	/^#define psc_buffer_8	/;"	d
psc_clock_select	arch/powerpc/include/asm/immap_512x.h	/^#define psc_clock_select /;"	d
psc_clock_select	include/mpc5xxx.h	/^#define psc_clock_select /;"	d
psc_delay	arch/arm/mach-keystone/psc.c	/^int psc_delay(void)$/;"	f	typeref:typename:int
psc_disable_domain	arch/arm/mach-keystone/psc.c	/^int psc_disable_domain(u32 domain_num)$/;"	f	typeref:typename:int
psc_disable_module	arch/arm/mach-keystone/psc.c	/^int psc_disable_module(u32 mod_num)$/;"	f	typeref:typename:int
psc_enable_module	arch/arm/mach-keystone/psc.c	/^int psc_enable_module(u32 mod_num)$/;"	f	typeref:typename:int
psc_get_domain_num	arch/arm/mach-keystone/psc.c	/^u32 psc_get_domain_num(u32 mod_num)$/;"	f	typeref:typename:u32
psc_hse	arch/arm/mach-stm32/stm32f1/clock.c	/^struct psc psc_hse = {$/;"	v	typeref:struct:psc
psc_imr	arch/powerpc/include/asm/immap_512x.h	/^#define psc_imr	/;"	d
psc_imr	include/mpc5xxx.h	/^#define psc_imr	/;"	d
psc_ipcr	arch/powerpc/include/asm/immap_512x.h	/^#define psc_ipcr	/;"	d
psc_ipcr	include/mpc5xxx.h	/^#define psc_ipcr	/;"	d
psc_isr	arch/powerpc/include/asm/immap_512x.h	/^#define psc_isr	/;"	d
psc_isr	include/mpc5xxx.h	/^#define psc_isr	/;"	d
psc_module	drivers/remoteproc/ti_power_proc.c	/^	u32 psc_module;$/;"	m	struct:ti_powerproc_privdata	typeref:typename:u32	file:
psc_module_keep_in_reset_enabled	arch/arm/mach-keystone/psc.c	/^int psc_module_keep_in_reset_enabled(u32 mod_num, bool gate_clocks)$/;"	f	typeref:typename:int
psc_module_release_from_reset	arch/arm/mach-keystone/psc.c	/^int psc_module_release_from_reset(u32 mod_num)$/;"	f	typeref:typename:int
psc_set_reset_iso	arch/arm/mach-keystone/psc.c	/^int psc_set_reset_iso(u32 mod_num)$/;"	f	typeref:typename:int
psc_set_state	arch/arm/mach-keystone/psc.c	/^int psc_set_state(u32 mod_num, u32 state)$/;"	f	typeref:typename:int
psc_status	arch/powerpc/include/asm/immap_512x.h	/^#define psc_status	/;"	d
psc_status	include/mpc5xxx.h	/^#define psc_status	/;"	d
psc_wait	arch/arm/mach-keystone/psc.c	/^int psc_wait(u32 domain_num)$/;"	f	typeref:typename:int
pscccr	arch/powerpc/include/asm/immap_512x.h	/^	u32 pscccr[12];		\/* PSC0-11 Clock Control Registers *\/$/;"	m	struct:clk512x	typeref:typename:u32[12]
psci_affinity_info	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_affinity_info:$/;"	l
psci_arch_init	arch/arm/cpu/armv7/sunxi/psci.c	/^void __secure psci_arch_init(void)$/;"	f	typeref:typename:void __secure
psci_arch_init	arch/arm/mach-uniphier/arm32/psci.c	/^void psci_arch_init(void)$/;"	f	typeref:typename:void
psci_board_init	arch/arm/cpu/armv7/virt-v7.c	/^__weak void psci_board_init(void)$/;"	f	typeref:typename:__weak void
psci_board_init	arch/arm/mach-tegra/tegra124/psci.c	/^void psci_board_init(void)$/;"	f	typeref:typename:void
psci_board_init	arch/arm/mach-uniphier/arm32/psci.c	/^void psci_board_init(void)$/;"	f	typeref:typename:void
psci_cpu_off	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_cpu_off:$/;"	l
psci_cpu_off	arch/arm/cpu/armv7/mx7/psci.S	/^psci_cpu_off:$/;"	l
psci_cpu_off	arch/arm/cpu/armv7/sunxi/psci.c	/^void __secure psci_cpu_off(void)$/;"	f	typeref:typename:void __secure
psci_cpu_on	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_cpu_on:$/;"	l
psci_cpu_on	arch/arm/cpu/armv7/mx7/psci.S	/^psci_cpu_on:$/;"	l
psci_cpu_on	arch/arm/cpu/armv7/sunxi/psci.c	/^int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc)$/;"	f	typeref:typename:int __secure
psci_cpu_on	arch/arm/mach-uniphier/arm32/psci.c	/^int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point)$/;"	f	typeref:typename:int __secure
psci_features	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_features:$/;"	l
psci_fiq_enter	arch/arm/cpu/armv7/sunxi/psci.c	/^void __secure __irq psci_fiq_enter(void)$/;"	f	typeref:typename:void __secure __irq
psci_get_target_pc	arch/arm/cpu/armv7/psci-common.c	/^u32 __secure psci_get_target_pc(int cpu)$/;"	f	typeref:typename:u32 __secure
psci_save_target_pc	arch/arm/cpu/armv7/psci-common.c	/^void __secure psci_save_target_pc(int cpu, u32 pc)$/;"	f	typeref:typename:void __secure
psci_system_off	arch/arm/cpu/armv8/fwcall.c	/^void __noreturn __efi_runtime psci_system_off(void)$/;"	f	typeref:typename:void __noreturn __efi_runtime
psci_system_off	board/freescale/ls1021aqds/psci.S	/^psci_system_off:$/;"	l
psci_system_off	board/freescale/ls1021atwr/psci.S	/^psci_system_off:$/;"	l
psci_system_reset	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_system_reset:$/;"	l
psci_system_reset	arch/arm/cpu/armv8/fwcall.c	/^void __noreturn __efi_runtime psci_system_reset(void)$/;"	f	typeref:typename:void __noreturn __efi_runtime
psci_system_reset	arch/arm/mach-uniphier/arm32/psci.c	/^void __secure psci_system_reset(u32 function_id)$/;"	f	typeref:typename:void __secure
psci_system_suspend	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_system_suspend:$/;"	l
psci_target_pc	arch/arm/cpu/armv7/psci-common.c	/^static u32 psci_target_pc[CONFIG_ARMV7_PSCI_NR_CPUS] __secure_data = { 0 };$/;"	v	typeref:typename:u32[CONFIG_ARMV7_PSCI_NR_CPUS]__secure_data	file:
psci_update_dt	arch/arm/cpu/armv7/virt-dt.c	/^int psci_update_dt(void *fdt)$/;"	f	typeref:typename:int
psci_update_dt	arch/arm/cpu/armv8/cpu-dt.c	/^int psci_update_dt(void *fdt)$/;"	f	typeref:typename:int
psci_version	arch/arm/cpu/armv7/ls102xa/psci.S	/^psci_version:$/;"	l
pscr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 pscr;$/;"	m	struct:system_control_regs	typeref:typename:u32
pscr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pscr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pscr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pscr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psdmr	board/keymile/km82xx/km82xx.c	/^	int psdmr;$/;"	m	struct:sdram_conf_s	typeref:typename:int	file:
psdocs	doc/DocBook/Makefile	/^psdocs: $(PS)$/;"	t
psdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	psdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
psdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	psdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
psel0	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel0;		\/* +0x70 *\/$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel0	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel0;		\/* +0x70 *\/$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel1	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel1;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel1	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel1;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel2	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel2;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel2	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel2;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel3	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel3;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel3	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel3;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel4	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel4;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel4	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel4;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel5	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel5;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel5	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel5;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel6	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel6;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel6	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel6;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel7	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	psel7;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
psel7	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	psel7;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pseudo_exec	common/cli_hush.c	/^static void pseudo_exec(struct child_prog *child)$/;"	f	typeref:typename:void	file:
pseudo_palette	drivers/video/da8xx-fb.c	/^	unsigned short pseudo_palette[16];$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned short[16]	file:
pseudo_palette	drivers/video/mxc_ipuv3_fb.c	/^	u32 pseudo_palette[16];$/;"	m	struct:mxcfb_info	typeref:typename:u32[16]	file:
pseudo_palette	include/linux/fb.h	/^	void *pseudo_palette;		\/* Fake palette of 16 colors *\/$/;"	m	struct:fb_info	typeref:typename:void *
psgen_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	psgen_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
psgen_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	psgen_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
psgen_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	psgen_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
psgen_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	psgen_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
psgtable	include/fsl_validate.h	/^		u32 psgtable;	\/* ptr to SG table *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c050a	typeref:typename:u32
psi_ta_dram	include/ddr_spd.h	/^	unsigned char psi_ta_dram;  \/* 48 Thermal Resistance of DRAM Package from$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
psi_ta_pll	include/ddr_spd.h	/^	unsigned char psi_ta_pll;  \/* 58 Thermal Resistance of PLL Package form$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
psi_ta_reg	include/ddr_spd.h	/^	unsigned char psi_ta_reg;    \/* 59 Thermal Reisitance of Register Package$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
psign	include/fsl_validate.h	/^	u32 psign;		\/* signature offset *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
psmr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	psmr;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u16
psn	include/mmc.h	/^	unsigned long psn;$/;"	m	struct:mmc_cid	typeref:typename:unsigned long
psor	include/ioports.h	/^    unsigned char psor:1;	\/* Port Special Options Register (35-2) *\/$/;"	m	struct:__anonc67861fe0208	typeref:typename:unsigned char:1
psor	include/ioports.h	/^    unsigned int psor;		\/* Port Special Options Register (35-5) *\/$/;"	m	struct:__anonc67861fe0108	typeref:typename:unsigned int
psora	arch/powerpc/include/asm/immap_85xx.h	/^	u32	psora;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
psorb	arch/powerpc/include/asm/immap_85xx.h	/^	u32	psorb;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
psorc	arch/powerpc/include/asm/immap_85xx.h	/^	u32	psorc;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
psord	arch/powerpc/include/asm/immap_85xx.h	/^	u32	psord;$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u32
psr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	psr;		\/* 0x08 PIO Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
psr	arch/m68k/include/asm/immap_5227x.h	/^	u32 psr;		\/* PLL Status *\/$/;"	m	struct:pll	typeref:typename:u32
psr	arch/m68k/include/asm/immap_5301x.h	/^	u32 psr;		\/* 0x08 Status *\/$/;"	m	struct:pll_ctrl	typeref:typename:u32
psr	arch/m68k/include/asm/immap_5441x.h	/^	u32 psr;		\/* Status *\/$/;"	m	struct:pll	typeref:typename:u32
psr	arch/m68k/include/asm/immap_5445x.h	/^	u32 psr;		\/* PLL Status Register *\/$/;"	m	struct:pll	typeref:typename:u32
psr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 psr;		\/* prescale register *\/$/;"	m	struct:rtclk83xx	typeref:typename:u32
psr	arch/sparc/include/asm/ptrace.h	/^	unsigned long psr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
psr	include/i2s.h	/^	unsigned int psr;	\/* Reserved *\/$/;"	m	struct:i2s_reg	typeref:typename:unsigned int
psr0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 psr0;$/;"	m	struct:aipi_regs	typeref:typename:u32
psr1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 psr1;$/;"	m	struct:aipi_regs	typeref:typename:u32
psr1	arch/powerpc/include/asm/immap_83xx.h	/^	u16 psr1;		\/* Timer1 Prescaler Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
psr2	arch/powerpc/include/asm/immap_83xx.h	/^	u16 psr2;		\/* Timer2 Prescaler Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
psr3	arch/powerpc/include/asm/immap_83xx.h	/^	u16 psr3;		\/* Timer3 Prescaler Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
psr4	arch/powerpc/include/asm/immap_83xx.h	/^	u16 psr4;		\/* Timer4 Prescaler Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
psr_command0	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	psr_command0;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
psr_command1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	psr_command1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
psr_config	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	psr_config;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
psr_crc_mon0	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	psr_crc_mon0;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
psr_crc_mon1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	psr_crc_mon1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
psrc	include/linux/ethtool.h	/^	__be16	psrc;$/;"	m	struct:ethtool_tcpip4_spec	typeref:typename:__be16
pss_idcode	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 pss_idcode; \/* 0x530 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
pss_rst_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 pss_rst_ctrl; \/* 0x200 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
pstate	arch/arm/include/asm/omap_mmc.h	/^	unsigned int pstate;		\/* 0x124 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
pstate_cnt	arch/x86/include/asm/acpi_table.h	/^	u8 pstate_cnt;$/;"	m	struct:acpi_fadt	typeref:typename:u8
pstatus	drivers/net/armada100_fec.h	/^	u32 pstatus;			\/* Port Status *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
pstore_size	include/ec_commands.h	/^	uint32_t pstore_size;$/;"	m	struct:ec_response_pstore_info	typeref:typename:uint32_t
psu_init	arch/arm/cpu/armv8/zynqmp/spl.c	/^__weak void psu_init(void)$/;"	f	typeref:typename:__weak void
psw	arch/microblaze/include/asm/ptrace.h	/^	microblaze_reg_t psw;		\/* program status word *\/$/;"	m	struct:pt_regs	typeref:typename:microblaze_reg_t
pt_dspregs	arch/sh/include/asm/ptrace.h	/^struct pt_dspregs {$/;"	s
pt_regs	arch/arc/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/arm/include/asm/proc-armv/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/avr32/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/blackfin/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/m68k/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/microblaze/include/asm/ptrace.h	/^struct pt_regs$/;"	s
pt_regs	arch/mips/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/nds32/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/nios2/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/openrisc/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/powerpc/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/sandbox/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/sh/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/sparc/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/x86/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
pt_regs	arch/xtensa/include/asm/ptrace.h	/^struct pt_regs {$/;"	s
ptaacr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ptaacr;	\/* Port Pass-Through\/Accept-All CR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
ptaacr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ptaacr;	        \/* 0xd0120 - Port 0 Pass-Through\/Accept-All Configuration Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
ptc	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 ptc;	\/* port Trans Config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
ptc	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 ptc;	\/* port Trans Config *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
ptc1023	drivers/net/e1000.h	/^	uint64_t ptc1023;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
ptc127	drivers/net/e1000.h	/^	uint64_t ptc127;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
ptc1522	drivers/net/e1000.h	/^	uint64_t ptc1522;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
ptc255	drivers/net/e1000.h	/^	uint64_t ptc255;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
ptc511	drivers/net/e1000.h	/^	uint64_t ptc511;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
ptc64	drivers/net/e1000.h	/^	uint64_t ptc64;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
ptcmd	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ptcmd;$/;"	m	struct:davinci_psc_regs	typeref:typename:dv_reg
ptcmd	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	ptcmd;		\/* 0x120 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
ptcr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	ptcr;		\/* 0x120 Transfer Control Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
ptcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	ptcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ptcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	ptcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
ptd	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^td_t *ptd;$/;"	v	typeref:typename:td_t *
ptd	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^td_t *ptd;$/;"	v	typeref:typename:td_t *
ptd	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^td_t *ptd;$/;"	v	typeref:typename:td_t *
ptd	drivers/usb/host/isp116x-hcd.c	/^struct ptd ptd[1];$/;"	v	typeref:struct:ptd[1]
ptd	drivers/usb/host/isp116x.h	/^	struct ptd ptd;$/;"	m	struct:isp116x_ep	typeref:struct:ptd
ptd	drivers/usb/host/isp116x.h	/^struct ptd {$/;"	s
ptd	drivers/usb/host/ohci-s3c24xx.h	/^struct td *ptd;$/;"	v	typeref:struct:td *
ptdControl	include/MCD_dma.h	/^	u16 ptdControl;		\/* ptd control *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u16
ptdDebug	include/MCD_dma.h	/^	u32 ptdDebug;		\/* priority task decode debug *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
ptdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	ptdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
ptdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	ptdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pte	arch/powerpc/include/asm/mmu.h	/^} pte;$/;"	t	typeref:struct:_pte
pte_to_entrylo	arch/mips/include/asm/pgtable-bits.h	/^static inline uint64_t pte_to_entrylo(unsigned long pte_val)$/;"	f	typeref:typename:uint64_t
pte_type	arch/arm/cpu/armv8/cache_v8.c	/^enum pte_type {$/;"	g	file:
pte_type	arch/arm/cpu/armv8/cache_v8.c	/^static int pte_type(u64 *pte)$/;"	f	typeref:typename:int	file:
ptm_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ptm_status;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
ptm_status	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ptm_status;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ptm_status_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ptm_status_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
ptn3460	arch/arm/dts/exynos5250-snow.dts	/^		ptn3460: lvds-bridge@20 {$/;"	l
ptn3460_attach	drivers/video/bridge/ptn3460.c	/^static int ptn3460_attach(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ptn3460_ids	drivers/video/bridge/ptn3460.c	/^static const struct udevice_id ptn3460_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ptn3460_ops	drivers/video/bridge/ptn3460.c	/^struct video_bridge_ops ptn3460_ops = {$/;"	v	typeref:struct:video_bridge_ops
ptr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ptr[3];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[3]
ptr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 ptr[5];		\/* 0x44 PHY timing registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[5]
ptr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 ptr[5];		\/* 0x24 PHY timing register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[5]
ptr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 ptr[5];		\/* 0x44 PHY timing registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[5]
ptr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 ptr[5];		\/* 0x24 PHY timing register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[5]
ptr	arch/x86/cpu/cpu.c	/^	u32 ptr;$/;"	m	struct:gdt_ptr	typeref:typename:u32	file:
ptr	arch/x86/lib/sfi.c	/^	int ptr;$/;"	m	struct:table_info	typeref:typename:int	file:
ptr	drivers/mtd/mtdcore.c	/^	void	*ptr;$/;"	m	struct:idr_layer	typeref:typename:void *	file:
ptr	fs/ubifs/lpt.c	/^	} ptr;$/;"	m	struct:lpt_scan_node	typeref:union:lpt_scan_node::__anonbef95ef6020a	file:
ptr	include/mtd/mtd-abi.h	/^	unsigned char __user *ptr;$/;"	m	struct:mtd_oob_buf	typeref:typename:unsigned char __user *
ptr	include/slre.h	/^	const char	*ptr;		\/* Pointer to the substring	*\/$/;"	m	struct:cap	typeref:typename:const char *
ptr	lib/bzip2/bzlib_private.h	/^      UInt32*  ptr;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32 *
ptr	lib/efi_loader/efi_runtime.c	/^	void **ptr;$/;"	m	struct:efi_runtime_mmio_list	typeref:typename:void **	file:
ptr	lib/efi_loader/efi_runtime.c	/^	void *ptr;$/;"	m	struct:efi_runtime_detach_list_struct	typeref:typename:void *	file:
ptr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 ptr0;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 ptr0;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 ptr0;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 ptr0;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 ptr0;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 ptr0;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 ptr0;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 ptr0;		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr0	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int ptr0;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
ptr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 ptr1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 ptr1;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 ptr1;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 ptr1;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 ptr1;		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 ptr1;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 ptr1;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 ptr1;		\/* 0x48 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int ptr1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
ptr2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 ptr2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 ptr2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 ptr2;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 ptr2;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 ptr2;		\/* 0x20 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 ptr2;		\/* 0x24 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 ptr2;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 ptr2;		\/* 0x4c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr2	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int ptr2;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
ptr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 ptr3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 ptr3;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 ptr3;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 ptr3;		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 ptr3;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 ptr3;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr3	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int ptr3;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
ptr4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 ptr4;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 ptr4;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 ptr4;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 ptr4;		\/* 0x2c *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
ptr4	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 ptr4;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr4	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 ptr4;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
ptr4	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int ptr4;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
ptr_addr_t	drivers/crypto/fsl/desc_constr.h	/^union ptr_addr_t {$/;"	u
ptr_comphy_chip_init	drivers/phy/marvell/comphy.h	/^	int (*ptr_comphy_chip_init)(struct chip_serdes_phy_config *,$/;"	m	struct:chip_serdes_phy_config	typeref:typename:int (*)(struct chip_serdes_phy_config *,struct comphy_map *)
ptr_size_thresh	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	ptr_size_thresh;$/;"	m	struct:qm_reg_queue	typeref:typename:u32
ptr_to_uint	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^#define ptr_to_uint(/;"	d	file:
ptrdiff_t	include/linux/types.h	/^typedef __kernel_ptrdiff_t	ptrdiff_t;$/;"	t	typeref:typename:__kernel_ptrdiff_t
ptrs	include/libfdt.h	/^	struct fdt_region_ptrs ptrs;	\/* Pointers for what we are up to *\/$/;"	m	struct:fdt_region_state	typeref:struct:fdt_region_ptrs
pts	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 pts;	\/* port Trans Status *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pts	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 pts;	\/* port Trans Status *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32
pts	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 pts:2;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:2
ptsr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	ptsr;		\/* 0x124 Transfer Status Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
ptstat	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	ptstat;$/;"	m	struct:davinci_psc_regs	typeref:typename:dv_reg
ptstat	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned int	ptstat;		\/* 0x128 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned int
pttbc	drivers/net/mvgbe.h	/^	u32 pttbc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pttbrc	drivers/net/mvgbe.h	/^	u32 pttbrc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
ptv	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ptv;		\/* Pause Time Value *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
ptv	arch/powerpc/include/asm/immap_86xx.h	/^	uint	ptv;		\/* 0x24028 - Pause Time Value Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
ptv	include/fsl_dtsec.h	/^	u32	ptv;		\/* pause time value *\/$/;"	m	struct:dtsec	typeref:typename:u32
ptv	include/tsec.h	/^	u32	ptv;		\/* Pause Time Value *\/$/;"	m	struct:tsec	typeref:typename:u32
ptype	drivers/net/cpsw.c	/^	u32	ptype;$/;"	m	struct:cpsw_regs	typeref:typename:u32	file:
pu_name	board/micronas/vct/scc.h	/^	char *pu_name;		\/* PU identifier			*\/$/;"	m	struct:scc_descriptor	typeref:typename:char *
pu_pd	board/micronas/vct/top.c	/^		u32 pu_pd	:  2;   \/* Pull up\/ pull down	*\/$/;"	m	struct:_TOP_PINMUX_t::__anon904a4b870108	typeref:typename:u32:2	file:
pub_head_size	arch/arm/include/asm/arch-sunxi/spl.h	/^		uint32_t pub_head_size;$/;"	m	union:boot_file_head::__anon79f81eda010a	typeref:typename:uint32_t
pub_head_size	arch/arm/include/asm/arch/spl.h	/^		uint32_t pub_head_size;$/;"	m	union:boot_file_head::__anondacd07f6010a	typeref:typename:uint32_t
pubid	disk/part_iso.h	/^	char					pubid[128];		\/* Publisher identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[128]
pubid	disk/part_iso.h	/^	char					pubid[128];		\/* Publisher identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[128]
publ	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_ddr_publ *publ;$/;"	m	struct:chan_info	typeref:struct:rk3288_ddr_publ *	file:
public_exponent	include/u-boot/rsa-mod-exp.h	/^	const void *public_exponent; \/* public exponent as byte array *\/$/;"	m	struct:key_prop	typeref:typename:const void *
puc1	include/ns87308.h	/^  unsigned char puc1;  \/* 3 pull-up control port 1 *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
puc2	include/ns87308.h	/^  unsigned char puc2;  \/* 7 pull-up control port 2  *\/$/;"	m	struct:GPIO	typeref:typename:unsigned char
pucr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		pucr;$/;"	m	struct:at91_matrix	typeref:typename:u32
pucr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pucr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pucr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pucr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pudr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	pudr;		\/* 0x60 Pull-up Disable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
pudr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pudr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pudr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pudr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
puen	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 puen;$/;"	m	struct:gpio_regs	typeref:typename:u32
puer	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	puer;		\/* 0x64 Pull-up Enable Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
puhci_qh_t	arch/sparc/cpu/leon3/usb_uhci.h	/^} uhci_qh_t, *puhci_qh_t;$/;"	t	typeref:struct:__anon66fd0d690208 *
puhci_qh_t	board/mpl/common/usb_uhci.h	/^} uhci_qh_t, *puhci_qh_t;$/;"	t	typeref:struct:__anon0a2b4c740208 *
puhci_td_t	arch/sparc/cpu/leon3/usb_uhci.h	/^} uhci_td_t, *puhci_td_t;$/;"	t	typeref:struct:__anon66fd0d690108 *
puhci_td_t	board/mpl/common/usb_uhci.h	/^} uhci_td_t, *puhci_td_t;$/;"	t	typeref:struct:__anon0a2b4c740108 *
pull	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 pull[2];$/;"	m	struct:sunxi_gpio	typeref:typename:u32[2]
pull	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 pull:2;		\/* pull up\/down\/normal PMUX_PULL_...*\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
pull	arch/arm/include/asm/arch/gpio.h	/^	u32 pull[2];$/;"	m	struct:sunxi_gpio	typeref:typename:u32[2]
pull	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned int	pull;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
pull	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int	pull;$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned int
pull_bit	fs/jffs2/mini_inflate.c	/^inline int pull_bit(struct bitstream *stream)$/;"	f	typeref:typename:int
pull_bits	fs/jffs2/mini_inflate.c	/^inline unsigned long pull_bits(struct bitstream *stream,$/;"	f	typeref:typename:unsigned long
pull_id	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u8 pull_id;$/;"	m	struct:pmux_pingrp_desc	typeref:typename:u8
pullup	drivers/usb/gadget/at91_udc.c	/^static void pullup(struct at91_udc *udc, int is_on)$/;"	f	typeref:typename:void	file:
pullup	drivers/usb/gadget/at91_udc.h	/^	void (*pullup)(struct at91_udc *udc, int is_on);$/;"	m	struct:at91_udc_caps	typeref:typename:void (*)(struct at91_udc * udc,int is_on)
pullup	drivers/usb/gadget/fotg210.c	/^	int                       pullup;$/;"	m	struct:fotg210_chip	typeref:typename:int	file:
pullup	drivers/usb/gadget/fotg210.c	/^static void pullup(struct fotg210_chip *chip, int is_on)$/;"	f	typeref:typename:void	file:
pullup	drivers/usb/gadget/pxa25x_udc.c	/^static int pullup(struct pxa25x_udc *udc)$/;"	f	typeref:typename:int	file:
pullup	drivers/usb/gadget/pxa25x_udc.h	/^						pullup:1,$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
pullup	include/linux/usb/gadget.h	/^	int	(*pullup) (struct usb_gadget *, int is_on);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *,int is_on)
pullup_active_low	include/linux/usb/at91_udc.h	/^	u8	pullup_active_low;	\/* true == pullup_pin is active low *\/$/;"	m	struct:at91_udc_data	typeref:typename:u8
pullup_off	drivers/usb/gadget/pxa25x_udc.c	/^static void pullup_off(void)$/;"	f	typeref:typename:void	file:
pullup_on	drivers/usb/gadget/pxa25x_udc.c	/^static void pullup_on(void)$/;"	f	typeref:typename:void	file:
pullup_pin	include/linux/usb/at91_udc.h	/^	int	pullup_pin;		\/* active == D+ pulled up *\/$/;"	m	struct:at91_udc_data	typeref:typename:int
pullups_connected	drivers/usb/dwc3/core.h	/^	unsigned		pullups_connected:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
pulse	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 pulse;		\/* Reset Pulse Length Register		*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
pulse	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^	u32	pulse;		\/* 0x04 SMC Pulse Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
pulse	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	u32	pulse;		\/* 0x604 SMC Pulse Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
pulseClock	board/esd/common/xilinx_jtag/ports.c	/^void pulseClock(void)$/;"	f	typeref:typename:void
pulse_width	drivers/video/da8xx-fb.h	/^	int pulse_width;$/;"	m	struct:lcd_sync_arg	typeref:typename:int
pup_delay	drivers/video/am335x-fb.h	/^	unsigned int	pup_delay;	\/*$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
pup_mask_table	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static u32 pup_mask_table[] = {$/;"	v	typeref:typename:u32[]	file:
pup_st	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^static u8 pup_st[MAX_BUS_NUM][MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u8[][]	file:
pup_state	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^static u8 pup_state[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]	file:
pupd	arch/arm/include/asm/arch-stm32f1/gpio.h	/^	enum stm32_gpio_pupd	pupd;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_pupd
pupd	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_pupd	pupd;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_pupd
pupd	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_pupd	pupd;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_pupd
pupd_ena	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pupd_ena;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
pupd_sel	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pupd_sel;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
pupdctl0	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	pupdctl0;	\/* 0x78 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
pupdctl1	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	pupdctl1;	\/* 0x7C *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
pupdr	drivers/gpio/stm32_gpio.c	/^	u32 pupdr;	\/* GPIO port pull-up\/pull-down *\/$/;"	m	struct:stm32_gpio_regs	typeref:typename:u32	file:
purb	drivers/usb/host/ohci.h	/^	void *purb;$/;"	m	struct:ed	typeref:typename:void *
purge_tx_ring	drivers/net/eepro100.c	/^static void purge_tx_ring (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
pusb_dev	common/usb_storage.c	/^	struct usb_device *pusb_dev;	 \/* this usb_device *\/$/;"	m	struct:us_data	typeref:struct:usb_device *	file:
pusb_dev	include/usb.h	/^	struct usb_device *pusb_dev;$/;"	m	struct:usb_hub_device	typeref:struct:usb_device *
pusb_dev	include/usb_ether.h	/^	struct usb_device *pusb_dev;	\/* this usb_device *\/$/;"	m	struct:ueth_data	typeref:struct:usb_device *
push	arch/mips/cpu/start.S	/^	.set	push$/;"	d
push	arch/mips/lib/cache_init.S	/^	.set	push$/;"	d
push	board/imgtec/boston/lowlevel_init.S	/^	.set	push$/;"	d
push_email_address	scripts/get_maintainer.pl	/^sub push_email_address {$/;"	s
push_email_addresses	scripts/get_maintainer.pl	/^sub push_email_addresses {$/;"	s
push_long	drivers/bios_emulator/x86emu/prim_ops.c	/^void push_long(u32 w)$/;"	f	typeref:typename:void
push_packet	net/net.c	/^void (*push_packet)(void *, int len) = 0;$/;"	v	typeref:typename:void (*)(void *,int len)
push_parameter	scripts/kernel-doc	/^sub push_parameter($$$) {$/;"	s
push_word	drivers/bios_emulator/x86emu/prim_ops.c	/^void push_word(u16 w)$/;"	f	typeref:typename:void
pusr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	pusr;		\/* 0x68 Pad Pull-up Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
putDebugChar	arch/powerpc/cpu/mpc8260/serial_scc.c	/^putDebugChar(const char c)$/;"	f	typeref:typename:void
putDebugChar	arch/powerpc/cpu/mpc8260/serial_smc.c	/^putDebugChar(const char c)$/;"	f	typeref:typename:void
putDebugChar	arch/powerpc/cpu/mpc8xx/serial.c	/^putDebugChar (int c)$/;"	f	typeref:typename:void
putDebugChar	common/kgdb_stubs.c	/^void putDebugChar(int c)$/;"	f	typeref:typename:void
putDebugStr	arch/powerpc/cpu/mpc8260/serial_scc.c	/^putDebugStr (const char *s)$/;"	f	typeref:typename:void
putDebugStr	arch/powerpc/cpu/mpc8260/serial_smc.c	/^putDebugStr (const char *s)$/;"	f	typeref:typename:void
putDebugStr	arch/powerpc/cpu/mpc8xx/serial.c	/^putDebugStr (const char *str)$/;"	f	typeref:typename:void
putDebugStr	common/kgdb_stubs.c	/^void putDebugStr(const char *str)$/;"	f	typeref:typename:void
putLabeledWord	include/jffs2/load_kernel.h	/^#define putLabeledWord(/;"	d
putShortMSB	lib/zlib/deflate.c	/^local void putShortMSB (s, b)$/;"	f
put_byte	lib/zlib/deflate.h	/^#define put_byte(/;"	d
put_byte_0	arch/arm/include/asm/assembler.h	/^#define put_byte_0	/;"	d
put_byte_1	arch/arm/include/asm/assembler.h	/^#define put_byte_1	/;"	d
put_byte_2	arch/arm/include/asm/assembler.h	/^#define put_byte_2	/;"	d
put_byte_3	arch/arm/include/asm/assembler.h	/^#define put_byte_3	/;"	d
put_byte_3	arch/arm/include/asm/assembler.h	/^#define put_byte_3 /;"	d
put_dec	lib/vsprintf.c	/^static noinline char *put_dec(char *buf, uint64_t num)$/;"	f	typeref:typename:noinline char *	file:
put_dec_full	lib/vsprintf.c	/^static char *put_dec_full(char *buf, unsigned q)$/;"	f	typeref:typename:char *	file:
put_dec_trunc	lib/vsprintf.c	/^static char *put_dec_trunc(char *buf, unsigned q)$/;"	f	typeref:typename:char *	file:
put_device	include/ubi_uboot.h	/^#define put_device(/;"	d
put_ext4	fs/ext4/ext4_common.c	/^void put_ext4(uint64_t off, void *buf, uint32_t size)$/;"	f	typeref:typename:void
put_fl_mem	fs/jffs2/jffs2_1pass.c	/^static inline void put_fl_mem(void *buf, void *ext_buf)$/;"	f	typeref:typename:void	file:
put_fl_mem_nand	fs/jffs2/jffs2_1pass.c	/^static void put_fl_mem_nand(void *buf)$/;"	f	typeref:typename:void	file:
put_fl_mem_onenand	fs/jffs2/jffs2_1pass.c	/^static void put_fl_mem_onenand(void *buf)$/;"	f	typeref:typename:void	file:
put_mtd_device	drivers/mtd/mtdcore.c	/^void put_mtd_device(struct mtd_info *mtd)$/;"	f	typeref:typename:void
put_partition_parser	drivers/mtd/mtdpart.c	/^#define put_partition_parser(/;"	d	file:
put_psr	arch/sparc/include/asm/psr.h	/^static __inline__ void put_psr(unsigned int new_psr)$/;"	f	typeref:typename:void
put_reg	drivers/net/cs8900.c	/^static void put_reg(struct eth_device *dev, int regno, u16 val)$/;"	f	typeref:typename:void	file:
put_short	lib/zlib/trees.c	/^#define put_short(/;"	d	file:
put_super	fs/ubifs/ubifs.h	/^	void (*put_super) (struct super_block *);$/;"	m	struct:super_operations	typeref:typename:void (*)(struct super_block *)
put_unaligned	arch/arm/include/asm/unaligned.h	/^#define put_unaligned	/;"	d
put_unaligned	arch/m68k/include/asm/unaligned.h	/^#define put_unaligned	/;"	d
put_unaligned	arch/mips/include/asm/unaligned.h	/^#define put_unaligned	/;"	d
put_unaligned	arch/powerpc/include/asm/unaligned.h	/^#define put_unaligned	/;"	d
put_unaligned	arch/sh/include/asm/unaligned-sh4a.h	/^# define put_unaligned /;"	d
put_unaligned	arch/sh/include/asm/unaligned.h	/^#define put_unaligned /;"	d
put_unaligned	include/asm-generic/unaligned.h	/^#define put_unaligned	/;"	d
put_unaligned_be16	arch/sh/include/asm/unaligned-sh4a.h	/^static inline void put_unaligned_be16(u16 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be16	include/linux/unaligned/access_ok.h	/^static inline void put_unaligned_be16(u16 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be16	include/linux/unaligned/be_byteshift.h	/^static inline void put_unaligned_be16(u16 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be32	arch/sh/include/asm/unaligned-sh4a.h	/^static inline void put_unaligned_be32(u32 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be32	include/linux/unaligned/access_ok.h	/^static inline void put_unaligned_be32(u32 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be32	include/linux/unaligned/be_byteshift.h	/^static inline void put_unaligned_be32(u32 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be32	lib/rsa/rsa-mod-exp.c	/^#define put_unaligned_be32(/;"	d	file:
put_unaligned_be64	arch/sh/include/asm/unaligned-sh4a.h	/^static inline void put_unaligned_be64(u64 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be64	include/linux/unaligned/access_ok.h	/^static inline void put_unaligned_be64(u64 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_be64	include/linux/unaligned/be_byteshift.h	/^static inline void put_unaligned_be64(u64 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le16	arch/sh/include/asm/unaligned-sh4a.h	/^static inline void put_unaligned_le16(u16 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le16	include/linux/unaligned/access_ok.h	/^static inline void put_unaligned_le16(u16 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le16	include/linux/unaligned/le_byteshift.h	/^static inline void put_unaligned_le16(u16 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le32	arch/sh/include/asm/unaligned-sh4a.h	/^static inline void put_unaligned_le32(u32 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le32	include/linux/unaligned/access_ok.h	/^static inline void put_unaligned_le32(u32 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le32	include/linux/unaligned/le_byteshift.h	/^static inline void put_unaligned_le32(u32 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le64	arch/sh/include/asm/unaligned-sh4a.h	/^static inline void put_unaligned_le64(u64 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le64	include/linux/unaligned/access_ok.h	/^static inline void put_unaligned_le64(u64 val, void *p)$/;"	f	typeref:typename:void
put_unaligned_le64	include/linux/unaligned/le_byteshift.h	/^static inline void put_unaligned_le64(u64 val, void *p)$/;"	f	typeref:typename:void
put_vci	net/bootp.c	/^#define put_vci(/;"	d	file:
putc	arch/arm/mach-davinci/spl.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/Arcturus/ucp1020/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/bsc9131rdb/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/bsc9132qds/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/c29xpcie/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/mpc8313erdb/mpc8313erdb.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/mpc8315erdb/mpc8315erdb.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/p1010rdb/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/p1022ds/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	board/freescale/p1_p2_rdb_pc/spl_minimal.c	/^void putc(char c)$/;"	f	typeref:typename:void
putc	common/console.c	/^void putc(const char c)$/;"	f	typeref:typename:void
putc	examples/api/libgenwrap.c	/^void putc(const char c)$/;"	f	typeref:typename:void
putc	include/common.h	/^#define	putc(/;"	d
putc	include/serial.h	/^	int (*putc)(struct udevice *dev, const char ch);$/;"	m	struct:dm_serial_ops	typeref:typename:int (*)(struct udevice * dev,const char ch)
putc	include/serial.h	/^	void	(*putc)(const char c);$/;"	m	struct:serial_device	typeref:typename:void (*)(const char c)
putc	include/stdio_dev.h	/^	void (*putc)(struct stdio_dev *dev, const char c);$/;"	m	struct:stdio_dev	typeref:typename:void (*)(struct stdio_dev * dev,const char c)
putc	lib/efi/efi_stub.c	/^void putc(const char ch)$/;"	f	typeref:typename:void
putc	lib/tiny-printf.c	/^	void (*putc)(struct printf_info *info, char ch);$/;"	m	struct:printf_info	typeref:typename:void (*)(struct printf_info * info,char ch)	file:
putc	post/cpu/mpc8xx/uart.c	/^	void (*putc) (int index, const char c);$/;"	m	struct:__anon0de951550108	typeref:typename:void (*)(int index,const char c)	file:
putc_normal	lib/tiny-printf.c	/^void putc_normal(struct printf_info *info, char ch)$/;"	f	typeref:typename:void
putc_outstr	lib/tiny-printf.c	/^static void putc_outstr(struct printf_info *info, char ch)$/;"	f	typeref:typename:void	file:
putc_xy	include/video_console.h	/^	int (*putc_xy)(struct udevice *dev, uint x_frac, uint y, char ch);$/;"	m	struct:vidconsole_ops	typeref:typename:int (*)(struct udevice * dev,uint x_frac,uint y,char ch)
putchar_filtered	tools/gdb/remote.c	/^#define putchar_filtered /;"	d	file:
putchar_unfiltered	tools/gdb/remote.c	/^#define putchar_unfiltered /;"	d	file:
putnstr	common/cli_readline.c	/^#define putnstr(/;"	d	file:
putnstr	include/jffs2/load_kernel.h	/^#define putnstr(/;"	d
putpacket	common/kgdb.c	/^putpacket(unsigned char *buffer)$/;"	f	typeref:typename:void	file:
putpkt	tools/gdb/remote.c	/^putpkt (buf)$/;"	f	file:
putpkt_binary	tools/gdb/remote.c	/^putpkt_binary (buf, cnt)$/;"	f	file:
puts	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^#define puts(/;"	d	file:
puts	arch/arm/mach-davinci/spl.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	arch/powerpc/cpu/mpc83xx/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/Arcturus/ucp1020/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/freescale/bsc9131rdb/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/freescale/bsc9132qds/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/freescale/c29xpcie/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/freescale/p1010rdb/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/freescale/p1022ds/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	board/freescale/p1_p2_rdb_pc/spl_minimal.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts	common/console.c	/^void puts(const char *s)$/;"	f	typeref:typename:void
puts	examples/api/libgenwrap.c	/^void puts(const char *s)$/;"	f	typeref:typename:void
puts	include/common.h	/^#define puts(/;"	d
puts	include/serial.h	/^	void	(*puts)(const char *s);$/;"	m	struct:serial_device	typeref:typename:void (*)(const char * s)
puts	include/stdio_dev.h	/^	void (*puts)(struct stdio_dev *dev, const char *s);$/;"	m	struct:stdio_dev	typeref:typename:void (*)(struct stdio_dev * dev,const char * s)
puts	lib/efi/efi_stub.c	/^void puts(const char *str)$/;"	f	typeref:typename:void
puts_filtered	tools/gdb/remote.c	/^#define puts_filtered /;"	d	file:
puts_unfiltered	tools/gdb/remote.c	/^#define puts_unfiltered /;"	d	file:
putstr	include/jffs2/load_kernel.h	/^#define putstr(/;"	d
pvALLOc	common/dlmalloc.c	/^Void_t* pvALLOc(size_t bytes)$/;"	f	typeref:typename:Void_t *
pvALLOc	include/malloc.h	/^# define pvALLOc	/;"	d
pvALLOc	include/malloc.h	/^#define pvALLOc	/;"	d
pv_abort	arch/sparc/include/asm/prom.h	/^	void (*pv_abort) (void);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(void)
pv_bootstr	arch/sparc/include/asm/prom.h	/^	char **pv_bootstr;$/;"	m	struct:linux_romvec	typeref:typename:char **
pv_enaddr	arch/sparc/include/asm/prom.h	/^	unsigned int (*pv_enaddr) (int d, char *enaddr);$/;"	m	struct:linux_romvec	typeref:typename:unsigned int (*)(int d,char * enaddr)
pv_fortheval	arch/sparc/include/asm/prom.h	/^	} pv_fortheval;$/;"	m	struct:linux_romvec	typeref:union:linux_romvec::__anon85ee8511010a
pv_getchar	arch/sparc/include/asm/prom.h	/^	int (*pv_getchar) (void);$/;"	m	struct:linux_romvec	typeref:typename:int (*)(void)
pv_halt	arch/sparc/include/asm/prom.h	/^	void (*pv_halt) (void);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(void)
pv_magic_cookie	arch/sparc/include/asm/prom.h	/^	unsigned int pv_magic_cookie;$/;"	m	struct:linux_romvec	typeref:typename:unsigned int
pv_nbgetchar	arch/sparc/include/asm/prom.h	/^	int (*pv_nbgetchar) (void);$/;"	m	struct:linux_romvec	typeref:typename:int (*)(void)
pv_nbputchar	arch/sparc/include/asm/prom.h	/^	int (*pv_nbputchar) (int ch);$/;"	m	struct:linux_romvec	typeref:typename:int (*)(int ch)
pv_nodeops	arch/sparc/include/asm/prom.h	/^	struct linux_nodeops *pv_nodeops;$/;"	m	struct:linux_romvec	typeref:struct:linux_nodeops *
pv_plugin_revision	arch/sparc/include/asm/prom.h	/^	unsigned int pv_plugin_revision;$/;"	m	struct:linux_romvec	typeref:typename:unsigned int
pv_printf	arch/sparc/include/asm/prom.h	/^	void (*pv_printf) (__const__ char *fmt, ...);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(__const__ char * fmt,...)
pv_printrev	arch/sparc/include/asm/prom.h	/^	unsigned int pv_printrev;$/;"	m	struct:linux_romvec	typeref:typename:unsigned int
pv_putchar	arch/sparc/include/asm/prom.h	/^	void (*pv_putchar) (int ch);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(int ch)
pv_putstr	arch/sparc/include/asm/prom.h	/^	void (*pv_putstr) (char *str, int len);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(char * str,int len)
pv_reboot	arch/sparc/include/asm/prom.h	/^	void (*pv_reboot) (char *bootstr);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(char * bootstr)
pv_romvers	arch/sparc/include/asm/prom.h	/^	unsigned int pv_romvers;$/;"	m	struct:linux_romvec	typeref:typename:unsigned int
pv_setctxt	arch/sparc/include/asm/prom.h	/^	void (*pv_setctxt) (int ctxt, char *va, int pmeg);$/;"	m	struct:linux_romvec	typeref:typename:void (*)(int ctxt,char * va,int pmeg)
pv_stdin	arch/sparc/include/asm/prom.h	/^	char *pv_stdin;$/;"	m	struct:linux_romvec	typeref:typename:char *
pv_stdout	arch/sparc/include/asm/prom.h	/^	char *pv_stdout;$/;"	m	struct:linux_romvec	typeref:typename:char *
pv_synchook	arch/sparc/include/asm/prom.h	/^	void (**pv_synchook) (void);$/;"	m	struct:linux_romvec	typeref:typename:void (**)(void)
pv_ticks	arch/sparc/include/asm/prom.h	/^	__volatile__ int *pv_ticks;$/;"	m	struct:linux_romvec	typeref:typename:__volatile__ int *
pv_v0bootargs	arch/sparc/include/asm/prom.h	/^	struct linux_arguments_v0 **pv_v0bootargs;$/;"	m	struct:linux_romvec	typeref:struct:linux_arguments_v0 **
pv_v0devops	arch/sparc/include/asm/prom.h	/^	struct linux_dev_v0_funcs pv_v0devops;$/;"	m	struct:linux_romvec	typeref:struct:linux_dev_v0_funcs
pv_v0mem	arch/sparc/include/asm/prom.h	/^	struct linux_mem_v0 pv_v0mem;$/;"	m	struct:linux_romvec	typeref:struct:linux_mem_v0
pv_v2bootargs	arch/sparc/include/asm/prom.h	/^	struct linux_bootargs_v2 pv_v2bootargs;$/;"	m	struct:linux_romvec	typeref:struct:linux_bootargs_v2
pv_v2devops	arch/sparc/include/asm/prom.h	/^	struct linux_dev_v2_funcs pv_v2devops;$/;"	m	struct:linux_romvec	typeref:struct:linux_dev_v2_funcs
pval	tools/easylogo/easylogo.c	/^		unsigned char pval[2];$/;"	m	union:le16_to_cpu::__anonbf0fd82b060a	typeref:typename:unsigned char[2]	file:
pvalloc	include/malloc.h	/^#pragma weak pvalloc /;"	d
pvcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pvcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pvcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pvcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pvdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pvdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pvdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pvdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pver	board/freescale/common/pixis.h	/^	u8 pver;$/;"	m	struct:pixis	typeref:typename:u8
pvid_set	include/ethsw.h	/^	int (*pvid_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
pvid_show	include/ethsw.h	/^	int (*pvid_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
pvr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     pvr;            \/* Processor version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pvr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	pvr;		\/* Processor version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pvr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pvr;		\/* Processor version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
pvr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pvr;		\/* 0xe00a0 - Processor version register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
pvr_460ex	board/amcc/canyonlands/canyonlands.c	/^static int pvr_460ex(void)$/;"	f	typeref:typename:int	file:
pvtm_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 pvtm_con[3];$/;"	m	struct:rk3288_grf	typeref:typename:u32[3]
pvtm_status	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 pvtm_status[3];$/;"	m	struct:rk3288_grf	typeref:typename:u32[3]
pw	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_pw	pw;$/;"	m	struct:ccsr_rio	typeref:struct:rio_pw
pw_clk0_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_clk0_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_clk0_en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_clk0_en;		\/*0x800*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_clk0_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_clk0_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_ctrl	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_ctrl;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_ctrl1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_ctrl1;		\/*0x8C8*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_iso_stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_iso_stat0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_isodis0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_isodis0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_isoen0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_isoen0;		\/*0x820*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_mtcmos_ack_stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_mtcmos_ack_stat0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_mtcmos_dis0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_mtcmos_dis0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_mtcmos_en0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_mtcmos_en0;	\/*0x830*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_mtcmos_stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_mtcmos_stat0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_mtcmos_timeout_stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_mtcmos_timeout_stat0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_rst0_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_rst0_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_rst0_en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_rst0_en;		\/*0x810*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_rst0_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_rst0_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_stat0;		\/*0x850*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pw_stat1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 pw_stat1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
pwcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pwcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pwcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pwcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pwd_dn_scale	drivers/usb/eth/r8152.h	/^#define pwd_dn_scale(/;"	d
pwd_dn_scale_mask	drivers/usb/eth/r8152.h	/^#define pwd_dn_scale_mask	/;"	d
pwdcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pwdcsr;	\/* Port-Write and Doorbell CSR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
pwdcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pwdcsr;		\/* 0xc0044 - Port-Write and Doorbell Command And Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pwdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pwdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pwdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pwdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pwm	arch/arm/dts/exynos5250.dtsi	/^	pwm: pwm@12dd0000 {$/;"	l
pwm	arch/arm/dts/exynos54xx.dtsi	/^	pwm: pwm@12dd0000 {$/;"	l
pwm	arch/arm/dts/sun4i-a10.dtsi	/^		pwm: pwm@01c20e00 {$/;"	l
pwm	arch/arm/dts/sun5i-a10s.dtsi	/^		pwm: pwm@01c20e00 {$/;"	l
pwm	arch/arm/dts/sun5i-a13.dtsi	/^		pwm: pwm@01c20e00 {$/;"	l
pwm	arch/arm/dts/sun7i-a20.dtsi	/^		pwm: pwm@01c20e00 {$/;"	l
pwm	arch/arm/dts/sun8i-a23-a33.dtsi	/^		pwm: pwm@01c21400 {$/;"	l
pwm	arch/arm/dts/tegra114.dtsi	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra124.dtsi	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20-harmony.dts	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20-medcom-wide.dts	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20-paz00.dts	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20-seaboard.dts	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20-tec.dts	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20-ventana.dts	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra20.dtsi	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra210.dtsi	/^	pwm: pwm@7000a000 {$/;"	l
pwm	arch/arm/dts/tegra30.dtsi	/^	pwm: pwm@7000a000 {$/;"	l
pwm	drivers/hwmon/lm63.c	/^	u8 pwm;$/;"	m	struct:pwm_lookup_entry	typeref:typename:u8	file:
pwm	drivers/misc/pca9551_led.c	/^	u8 pwm;	\/* Pulse width modulation, see PCA9551_7.pdf p. 6 *\/$/;"	m	struct:pca9551_blink_rate	typeref:typename:u8	file:
pwm	drivers/power/regulator/pwm_regulator.c	/^	struct udevice *pwm;$/;"	m	struct:pwm_regulator_info	typeref:struct:udevice *	file:
pwm	drivers/video/exynos/exynos_pwm_bl.c	/^static struct pwm_backlight_data *pwm;$/;"	v	typeref:struct:pwm_backlight_data *	file:
pwm	drivers/video/pwm_backlight.c	/^	struct udevice *pwm;$/;"	m	struct:pwm_backlight_priv	typeref:struct:udevice *	file:
pwm0	arch/arm/dts/at91sam9263.dtsi	/^			pwm0: pwm@fffb8000 {$/;"	l
pwm0	arch/arm/dts/at91sam9g45.dtsi	/^			pwm0: pwm@fffb8000 {$/;"	l
pwm0	arch/arm/dts/rk3036.dtsi	/^	pwm0: pwm@20050000 {$/;"	l
pwm0	arch/arm/dts/rk3288.dtsi	/^	pwm0: pwm@ff680000 {$/;"	l
pwm0	arch/arm/dts/rk3399.dtsi	/^	pwm0: pwm@ff420000 {$/;"	l
pwm0_pin	arch/arm/dts/rk3036.dtsi	/^			pwm0_pin: pwm0-pin {$/;"	l
pwm0_pin	arch/arm/dts/rk3288.dtsi	/^			pwm0_pin: pwm0-pin {$/;"	l
pwm0_pin	arch/arm/dts/rk3399.dtsi	/^			pwm0_pin: pwm0-pin {$/;"	l
pwm0_pins	arch/arm/dts/sun5i.dtsi	/^			pwm0_pins: pwm0 {$/;"	l	label:pio
pwm0_pins	arch/arm/dts/sun8i-a23-a33.dtsi	/^			pwm0_pins: pwm0 {$/;"	l	label:pio
pwm0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			pwm0_pins_a: pwm0@0 {$/;"	l	label:pio
pwm0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			pwm0_pins_a: pwm0@0 {$/;"	l	label:pio
pwm1	arch/arm/dts/imx6qdl.dtsi	/^			pwm1: pwm@02080000 {$/;"	l
pwm1	arch/arm/dts/imx6ull.dtsi	/^			pwm1: pwm@02080000 {$/;"	l
pwm1	arch/arm/dts/rk3036.dtsi	/^	pwm1: pwm@20050010 {$/;"	l
pwm1	arch/arm/dts/rk3288.dtsi	/^	pwm1: pwm@ff680010 {$/;"	l
pwm1	arch/arm/dts/rk3399.dtsi	/^	pwm1: pwm@ff420010 {$/;"	l
pwm1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pwm1;	\/*0x00c*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
pwm1_pin	arch/arm/dts/rk3036.dtsi	/^			pwm1_pin: pwm1-pin {$/;"	l
pwm1_pin	arch/arm/dts/rk3288.dtsi	/^			pwm1_pin: pwm1-pin {$/;"	l
pwm1_pin	arch/arm/dts/rk3399.dtsi	/^			pwm1_pin: pwm1-pin {$/;"	l
pwm1_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			pwm1_pins_a: pwm1@0 {$/;"	l	label:pio
pwm1_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			pwm1_pins_a: pwm1@0 {$/;"	l	label:pio
pwm2	arch/arm/dts/imx6qdl.dtsi	/^			pwm2: pwm@02084000 {$/;"	l
pwm2	arch/arm/dts/imx6ull.dtsi	/^			pwm2: pwm@02084000 {$/;"	l
pwm2	arch/arm/dts/rk3036.dtsi	/^	pwm2: pwm@20050020 {$/;"	l
pwm2	arch/arm/dts/rk3288.dtsi	/^	pwm2: pwm@ff680020 {$/;"	l
pwm2	arch/arm/dts/rk3399.dtsi	/^	pwm2: pwm@ff420020 {$/;"	l
pwm2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pwm2;	\/*0x010*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
pwm2_pin	arch/arm/dts/rk3036.dtsi	/^			pwm2_pin: pwm2-pin {$/;"	l
pwm2_pin	arch/arm/dts/rk3288.dtsi	/^			pwm2_pin: pwm2-pin {$/;"	l
pwm2_pin	arch/arm/dts/rk3399.dtsi	/^			pwm2_pin: pwm2-pin {$/;"	l
pwm3	arch/arm/dts/imx6qdl.dtsi	/^			pwm3: pwm@02088000 {$/;"	l
pwm3	arch/arm/dts/imx6ull.dtsi	/^			pwm3: pwm@02088000 {$/;"	l
pwm3	arch/arm/dts/rk3036.dtsi	/^	pwm3: pwm@20050030 {$/;"	l
pwm3	arch/arm/dts/rk3288.dtsi	/^	pwm3: pwm@ff680030 {$/;"	l
pwm3	arch/arm/dts/rk3399.dtsi	/^	pwm3: pwm@ff420030 {$/;"	l
pwm3	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pwm3;	\/*0x014*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
pwm3_pin	arch/arm/dts/rk3036.dtsi	/^			pwm3_pin: pwm3-pin {$/;"	l
pwm3_pin	arch/arm/dts/rk3288.dtsi	/^			pwm3_pin: pwm3-pin {$/;"	l
pwm3a_pin	arch/arm/dts/rk3399.dtsi	/^			pwm3a_pin: pwm3a-pin {$/;"	l
pwm3b_pin	arch/arm/dts/rk3399.dtsi	/^			pwm3b_pin: pwm3b-pin {$/;"	l
pwm4	arch/arm/dts/imx6qdl.dtsi	/^			pwm4: pwm@0208c000 {$/;"	l
pwm4	arch/arm/dts/imx6ull.dtsi	/^			pwm4: pwm@0208c000 {$/;"	l
pwm4	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 pwm4;	\/*0x018*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
pwm5	arch/arm/dts/imx6ull.dtsi	/^			pwm5: pwm@020f0000 {$/;"	l
pwm6	arch/arm/dts/imx6ull.dtsi	/^			pwm6: pwm@020f4000 {$/;"	l
pwm7	arch/arm/dts/imx6ull.dtsi	/^			pwm7: pwm@020f8000 {$/;"	l
pwm8	arch/arm/dts/imx6ull.dtsi	/^			pwm8: pwm@020fc000 {$/;"	l
pwm_backlight_data	arch/arm/mach-exynos/include/mach/pwm_backlight.h	/^struct pwm_backlight_data {$/;"	s
pwm_backlight_enable	drivers/video/pwm_backlight.c	/^static int pwm_backlight_enable(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pwm_backlight_ids	drivers/video/pwm_backlight.c	/^static const struct udevice_id pwm_backlight_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pwm_backlight_ofdata_to_platdata	drivers/video/pwm_backlight.c	/^static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pwm_backlight_ops	drivers/video/pwm_backlight.c	/^static const struct backlight_ops pwm_backlight_ops = {$/;"	v	typeref:typename:const struct backlight_ops	file:
pwm_backlight_priv	drivers/video/pwm_backlight.c	/^struct pwm_backlight_priv {$/;"	s	file:
pwm_backlight_probe	drivers/video/pwm_backlight.c	/^static int pwm_backlight_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pwm_calc_tin	arch/arm/cpu/armv7/s5p-common/pwm.c	/^static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)$/;"	f	typeref:typename:unsigned long	file:
pwm_clk	arch/arm/dts/at91sam9263.dtsi	/^					pwm_clk: pwm_clk {$/;"	l
pwm_clk	arch/arm/dts/at91sam9g45.dtsi	/^					pwm_clk: pwm_clk {$/;"	l
pwm_clk	arch/arm/dts/sama5d2.dtsi	/^					pwm_clk: pwm_clk@38 {$/;"	l
pwm_config	arch/arm/cpu/armv7/s5p-common/pwm.c	/^int pwm_config(int pwm_id, int duty_ns, int period_ns)$/;"	f	typeref:typename:int
pwm_config	drivers/pwm/pwm-imx.c	/^int pwm_config(int pwm_id, int duty_ns, int period_ns)$/;"	f	typeref:typename:int
pwm_ctlr	arch/arm/include/asm/arch-tegra/pwm.h	/^struct pwm_ctlr {$/;"	s
pwm_ctrl	arch/m68k/include/asm/coldfire/pwm.h	/^typedef struct pwm_ctrl {$/;"	s
pwm_ctrl	arch/m68k/include/asm/immap_5301x.h	/^typedef struct pwm_ctrl {$/;"	s
pwm_disable	arch/arm/cpu/armv7/s5p-common/pwm.c	/^void pwm_disable(int pwm_id)$/;"	f	typeref:typename:void
pwm_disable	drivers/pwm/pwm-imx.c	/^void pwm_disable(int pwm_id)$/;"	f	typeref:typename:void
pwm_enable	arch/arm/cpu/armv7/s5p-common/pwm.c	/^int pwm_enable(int pwm_id)$/;"	f	typeref:typename:int
pwm_enable	drivers/pwm/pwm-imx.c	/^int pwm_enable(int pwm_id)$/;"	f	typeref:typename:int
pwm_gclk	arch/arm/dts/sama5d2.dtsi	/^					pwm_gclk: pwm_gclk@38 {$/;"	l
pwm_get_ops	include/pwm.h	/^#define pwm_get_ops(/;"	d
pwm_id	arch/arm/mach-exynos/include/mach/pwm_backlight.h	/^	int pwm_id;$/;"	m	struct:pwm_backlight_data	typeref:typename:int
pwm_id	drivers/power/regulator/pwm_regulator.c	/^	int pwm_id;$/;"	m	struct:pwm_regulator_info	typeref:typename:int	file:
pwm_id_to_reg	drivers/pwm/pwm-imx-util.c	/^struct pwm_regs *pwm_id_to_reg(int pwm_id)$/;"	f	typeref:struct:pwm_regs *
pwm_imx_get_parms	drivers/pwm/pwm-imx-util.c	/^int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c,$/;"	f	typeref:typename:int
pwm_init	arch/arm/cpu/armv7/s5p-common/pwm.c	/^int pwm_init(int pwm_id, int div, int invert)$/;"	f	typeref:typename:int
pwm_init	drivers/pwm/pwm-imx.c	/^int pwm_init(int pwm_id, int div, int invert)$/;"	f	typeref:typename:int
pwm_lookup_entry	drivers/hwmon/lm63.c	/^struct pwm_lookup_entry {$/;"	s	file:
pwm_ops	include/pwm.h	/^struct pwm_ops {$/;"	s
pwm_pad	board/bachmann/ot1200/ot1200.c	/^static iomux_v3_cfg_t const pwm_pad[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
pwm_padmux	board/gateworks/gw_ventana/common.h	/^	iomux_v3_cfg_t pwm_padmux[2];$/;"	m	struct:dio_cfg	typeref:typename:iomux_v3_cfg_t[2]
pwm_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const pwm_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
pwm_param	board/gateworks/gw_ventana/common.h	/^	unsigned pwm_param;$/;"	m	struct:dio_cfg	typeref:typename:unsigned
pwm_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux pwm_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
pwm_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux pwm_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
pwm_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct pwm_regs {$/;"	s
pwm_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct pwm_regs {$/;"	s
pwm_regulator_enable	drivers/power/regulator/pwm_regulator.c	/^static int pwm_regulator_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
pwm_regulator_get_voltage	drivers/power/regulator/pwm_regulator.c	/^static int pwm_regulator_get_voltage(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pwm_regulator_ids	drivers/power/regulator/pwm_regulator.c	/^static const struct udevice_id pwm_regulator_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
pwm_regulator_info	drivers/power/regulator/pwm_regulator.c	/^struct pwm_regulator_info {$/;"	s	file:
pwm_regulator_ofdata_to_platdata	drivers/power/regulator/pwm_regulator.c	/^static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pwm_regulator_ops	drivers/power/regulator/pwm_regulator.c	/^static const struct dm_regulator_ops pwm_regulator_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
pwm_regulator_probe	drivers/power/regulator/pwm_regulator.c	/^static int pwm_regulator_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
pwm_regulator_set_voltage	drivers/power/regulator/pwm_regulator.c	/^static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt)$/;"	f	typeref:typename:int	file:
pwm_set_config	drivers/pwm/pwm-uclass.c	/^int pwm_set_config(struct udevice *dev, uint channel, uint period_ns,$/;"	f	typeref:typename:int
pwm_set_enable	drivers/pwm/pwm-uclass.c	/^int pwm_set_enable(struct udevice *dev, uint channel, bool enable)$/;"	f	typeref:typename:int
pwm_t	arch/m68k/include/asm/coldfire/pwm.h	/^} pwm_t;$/;"	t	typeref:struct:pwm_ctrl
pwm_t	arch/m68k/include/asm/immap_5301x.h	/^} pwm_t;$/;"	t	typeref:struct:pwm_ctrl
pwm_voltage_to_duty_cycle_percentage	drivers/power/regulator/pwm_regulator.c	/^static int pwm_voltage_to_duty_cycle_percentage(struct udevice *dev, int req_uV)$/;"	f	typeref:typename:int	file:
pwmcd	include/andestech/andes_pcu.h	/^	unsigned int	pwmcd;		\/* 0x44 - PWM Clock divider *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
pwmclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 pwmclk_ctrl;	\/* PWM Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
pwmcr	include/mpc5xxx.h	/^	volatile u32 pwmcr;		\/* GPT + Timer# * 0x10 + 0x08 *\/$/;"	m	struct:mpc5xxx_gpt	typeref:typename:volatile u32
pwmld	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pwmld;		\/* Immediate Update *\/$/;"	m	struct:gptmr	typeref:typename:u8
pwmop	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 pwmop;		\/* Output Polarity *\/$/;"	m	struct:gptmr	typeref:typename:u8
pwmr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pwmr; \/* Port-Write Mode Register *\/$/;"	m	struct:rio_pw	typeref:typename:u32
pwmr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pwmr;		\/* 0xd34e0 - Port-Write Mode Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pwmss_ecap_regs	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct pwmss_ecap_regs {$/;"	s
pwmss_epwm_regs	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct pwmss_epwm_regs {$/;"	s
pwmss_regs	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct pwmss_regs {$/;"	s
pwmwidth	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 pwmwidth;$/;"	m	struct:gptmr	typeref:typename:u16
pwqbar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pwqbar; \/* Port-Write Queue Base Address Register *\/$/;"	m	struct:rio_pw	typeref:typename:u32
pwqbar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pwqbar;		\/* 0xd34ec - Port-Write Queue Base Address Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pwr	board/freescale/common/pixis.h	/^	u8 pwr;$/;"	m	struct:pixis	typeref:typename:u8
pwr0	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 pwr0;$/;"	m	struct:pwm_ctrl	typeref:typename:u8
pwr1	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 pwr1;$/;"	m	struct:pwm_ctrl	typeref:typename:u8
pwr1	board/freescale/common/pixis.h	/^	u8 pwr1;$/;"	m	struct:pixis	typeref:typename:u8
pwr2	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 pwr2;$/;"	m	struct:pwm_ctrl	typeref:typename:u8
pwr_3g	arch/arm/dts/rk3288-miniarm.dtsi	/^		pwr_3g: pwr-3g {$/;"	l
pwr_ctl	board/freescale/common/qixis.h	/^	u8 pwr_ctl[2];  \/* Power Control Register,0x20 *\/$/;"	m	struct:qixis	typeref:typename:u8[2]
pwr_ctr2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctr2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
pwr_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 pwr_ctrl;		\/* Power Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
pwr_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
pwr_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
pwr_ctrl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
pwr_ctrl2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
pwr_ctrl2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
pwr_ctrl2_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl2_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
pwr_ctrl_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	pwr_ctrl_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
pwr_gpio	drivers/mmc/tegra_mmc.c	/^	struct gpio_desc pwr_gpio;	\/* Power GPIO *\/$/;"	m	struct:tegra_mmc_priv	typeref:struct:gpio_desc	file:
pwr_gpio	include/sdhci.h	/^	struct gpio_desc pwr_gpio;	\/* Power GPIO *\/$/;"	m	struct:sdhci_host	typeref:struct:gpio_desc
pwr_hold	arch/arm/dts/rk3288-evb.dtsi	/^		pwr_hold: pwr-hold {$/;"	l
pwr_hold	arch/arm/dts/rk3288-firefly.dtsi	/^		pwr_hold: pwr-hold {$/;"	l
pwr_hold	include/power/act8846_pmic.h	/^	struct gpio_desc pwr_hold;$/;"	m	struct:pmic_act8846	typeref:struct:gpio_desc
pwr_init	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int pwr_init;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
pwr_key	arch/arm/dts/rk3288-evb.dtsi	/^		pwr_key: pwr-key {$/;"	l
pwr_key	arch/arm/dts/rk3288-firefly.dtsi	/^		pwr_key: pwr-key {$/;"	l
pwr_key_h	arch/arm/dts/rk3288-veyron.dtsi	/^		pwr_key_h: pwr-key-h {$/;"	l
pwr_led_bpi_m2p	arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts	/^	pwr_led_bpi_m2p: led_pins@0 {$/;"	l
pwr_mng_bit_func	board/Synology/ds414/cmd_syno.c	/^static const char * const pwr_mng_bit_func[] = {$/;"	v	typeref:typename:const char * const[]	file:
pwr_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	pwr_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
pwr_stat	board/freescale/common/qixis.h	/^	u8 pwr_stat[4]; \/* Power Status Register,0x24 *\/$/;"	m	struct:qixis	typeref:typename:u8[4]
pwr_state	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 pwr_state;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
pwrbtn	arch/arm/dts/rk3288-miniarm.dtsi	/^		pwrbtn: pwrbtn {$/;"	l
pwrbtn	arch/arm/dts/rk3288-popmetal.dtsi	/^		pwrbtn: pwrbtn {$/;"	l
pwrcfg	drivers/ddr/microchip/ddr2_regs.h	/^	u32 pwrcfg;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
pwrcnt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pwrcnt;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
pwrcon	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	pwrcon;		\/* _POWER_CONTROL_HOST_0 15:8 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
pwrctl	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pwrctl;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pwrctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pwrctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pwrctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 pwrctl;		\/* 0x30 low power control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pwrctl;		\/* 0x30 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pwrctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pwrctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pwrctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctl	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 pwrctl;		\/* 0x30 low power control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrctrl	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int pwrctrl;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
pwrdn_con	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 pwrdn_con;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
pwrdn_st	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 pwrdn_st;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
pwrdnconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pwrdnconfig;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
pwrdnconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pwrdnconfig;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
pwrdnconfig	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int pwrdnconfig;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
pwrdom	arch/sandbox/dts/test.dts	/^	pwrdom: power-domain {$/;"	l
pwrdom	drivers/pci/pci_tegra.c	/^	struct power_domain pwrdom;$/;"	m	struct:tegra_pcie	typeref:struct:power_domain	file:
pwrdwn	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pwrdwn;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
pwremu_mgmt	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	pwremu_mgmt;$/;"	m	struct:davinci_uart_ctrl_regs	typeref:typename:dv_reg
pwrfltcfg	include/fsl_usb.h	/^	u32	pwrfltcfg;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
pwrman_feat	board/egnite/ethernut5/ethernut5_pwrman.c	/^char *pwrman_feat[8] = {$/;"	v	typeref:typename:char * [8]
pwrman_major	board/egnite/ethernut5/ethernut5_pwrman.c	/^static int pwrman_major;$/;"	v	typeref:typename:int	file:
pwrman_minor	board/egnite/ethernut5/ethernut5_pwrman.c	/^static int pwrman_minor;$/;"	v	typeref:typename:int	file:
pwrmode_con	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 pwrmode_con;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
pwrreq	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 pwrreq;             \/* 0x0208 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
pwrseq_get_ops	include/pwrseq.h	/^#define pwrseq_get_ops(/;"	d
pwrseq_ops	include/pwrseq.h	/^struct pwrseq_ops {$/;"	s
pwrseq_set_power	drivers/misc/pwrseq-uclass.c	/^int pwrseq_set_power(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int
pwrsts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t pwrsts;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
pwrtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 pwrtmg;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 pwrtmg;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 pwrtmg;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 pwrtmg;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 pwrtmg;		\/* 0x34 low power timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 pwrtmg;		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 pwrtmg;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 pwrtmg;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 pwrtmg;		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwrtmg	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 pwrtmg;		\/* 0x34 low power timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
pwsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	pwsr; \/* Port-Write Status Register *\/$/;"	m	struct:rio_pw	typeref:typename:u32
pwsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	pwsr;		\/* 0xd34e4 - Port-Write Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
pwt	arch/x86/lib/physmem.c	/^	uint64_t pwt:1;    \/* page-level writethrough *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
pwt	arch/x86/lib/physmem.c	/^	uint64_t pwt:1;$/;"	m	struct:pdpe	typeref:typename:uint64_t:1	file:
px_brdcfg0	board/freescale/p1022ds/diu.c	/^static u8 px_brdcfg0;$/;"	v	typeref:typename:u8	file:
pxa	include/pxa_lcd.h	/^	struct	pxafb_info pxa;$/;"	m	struct:vidinfo	typeref:struct:pxafb_info
pxa25x_ep	drivers/usb/gadget/pxa25x_udc.h	/^struct pxa25x_ep {$/;"	s
pxa25x_ep_alloc_request	drivers/usb/gadget/pxa25x_udc.c	/^pxa25x_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)$/;"	f	typeref:struct:usb_request *	file:
pxa25x_ep_dequeue	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:int	file:
pxa25x_ep_disable	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_ep_disable(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
pxa25x_ep_enable	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_ep_enable(struct usb_ep *_ep,$/;"	f	typeref:typename:int	file:
pxa25x_ep_fifo_flush	drivers/usb/gadget/pxa25x_udc.c	/^static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)$/;"	f	typeref:typename:void	file:
pxa25x_ep_fifo_status	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_ep_fifo_status(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
pxa25x_ep_free_request	drivers/usb/gadget/pxa25x_udc.c	/^pxa25x_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:void	file:
pxa25x_ep_ops	drivers/usb/gadget/pxa25x_udc.c	/^static struct usb_ep_ops pxa25x_ep_ops = {$/;"	v	typeref:struct:usb_ep_ops	file:
pxa25x_ep_queue	drivers/usb/gadget/pxa25x_udc.c	/^pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)$/;"	f	typeref:typename:int	file:
pxa25x_ep_set_halt	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)$/;"	f	typeref:typename:int	file:
pxa25x_get_revision	arch/arm/cpu/pxa/cpuinfo.c	/^static const char *pxa25x_get_revision(void)$/;"	f	typeref:typename:const char *	file:
pxa25x_request	drivers/usb/gadget/pxa25x_udc.h	/^struct pxa25x_request {$/;"	s
pxa25x_udc	drivers/usb/gadget/pxa25x_udc.h	/^struct pxa25x_udc {$/;"	s
pxa25x_udc_get_frame	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)$/;"	f	typeref:typename:int	file:
pxa25x_udc_irq	drivers/usb/gadget/pxa25x_udc.c	/^pxa25x_udc_irq(void)$/;"	f	typeref:typename:int	file:
pxa25x_udc_ops	drivers/usb/gadget/pxa25x_udc.c	/^static const struct usb_gadget_ops pxa25x_udc_ops = {$/;"	v	typeref:typename:const struct usb_gadget_ops	file:
pxa25x_udc_pullup	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)$/;"	f	typeref:typename:int	file:
pxa25x_udc_regs	arch/arm/include/asm/arch-pxa/regs-usb.h	/^struct pxa25x_udc_regs {$/;"	s
pxa25x_udc_vbus_draw	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)$/;"	f	typeref:typename:int	file:
pxa25x_udc_vbus_session	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)$/;"	f	typeref:typename:int	file:
pxa25x_udc_wakeup	drivers/usb/gadget/pxa25x_udc.c	/^static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)$/;"	f	typeref:typename:int	file:
pxa25x_watchdog	drivers/usb/gadget/pxa25x_udc.h	/^struct pxa25x_watchdog {$/;"	s
pxa27x_get_revision	arch/arm/cpu/pxa/cpuinfo.c	/^static const char *pxa27x_get_revision(void)$/;"	f	typeref:typename:const char *	file:
pxa2xx_dram_init	arch/arm/cpu/pxa/pxa2xx.c	/^void pxa2xx_dram_init(void)$/;"	f	typeref:typename:void
pxa2xx_udc_mach_info	drivers/usb/gadget/pxa25x_udc.h	/^struct pxa2xx_udc_mach_info {$/;"	s
pxa3xx_nand_config_flash	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_detect_config	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_flash	drivers/mtd/nand/pxa3xx_nand.h	/^struct pxa3xx_nand_flash {$/;"	s
pxa3xx_nand_get_variant	drivers/mtd/nand/pxa3xx_nand.c	/^static enum pxa3xx_nand_variant pxa3xx_nand_get_variant(void)$/;"	f	typeref:enum:pxa3xx_nand_variant	file:
pxa3xx_nand_host	drivers/mtd/nand/pxa3xx_nand.c	/^struct pxa3xx_nand_host {$/;"	s	file:
pxa3xx_nand_info	drivers/mtd/nand/pxa3xx_nand.c	/^struct pxa3xx_nand_info {$/;"	s	file:
pxa3xx_nand_init_buff	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_init_timings	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_irq	drivers/mtd/nand/pxa3xx_nand.c	/^static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:irqreturn_t	file:
pxa3xx_nand_irq_thread	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_irq_thread(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:void	file:
pxa3xx_nand_platform_data	drivers/mtd/nand/pxa3xx_nand.h	/^struct pxa3xx_nand_platform_data {$/;"	s
pxa3xx_nand_probe	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_probe_dt	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_probe_dt(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_read_buf	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
pxa3xx_nand_read_byte	drivers/mtd/nand/pxa3xx_nand.c	/^static uint8_t pxa3xx_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
pxa3xx_nand_read_page_hwecc	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_read_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
pxa3xx_nand_read_word	drivers/mtd/nand/pxa3xx_nand.c	/^static u16 pxa3xx_nand_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:u16	file:
pxa3xx_nand_scan	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_scan(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_select_chip	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
pxa3xx_nand_sensing	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_sensing(struct pxa3xx_nand_host *host)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_set_sdr_timing	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_set_sdr_timing(struct pxa3xx_nand_host *host,$/;"	f	typeref:typename:void	file:
pxa3xx_nand_set_timing	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_set_timing(struct pxa3xx_nand_host *host,$/;"	f	typeref:typename:void	file:
pxa3xx_nand_start	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_start(struct pxa3xx_nand_info *info)$/;"	f	typeref:typename:void	file:
pxa3xx_nand_timing	drivers/mtd/nand/pxa3xx_nand.h	/^struct pxa3xx_nand_timing {$/;"	s
pxa3xx_nand_variant	drivers/mtd/nand/pxa3xx_nand.c	/^enum pxa3xx_nand_variant {$/;"	g	file:
pxa3xx_nand_waitfunc	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)$/;"	f	typeref:typename:int	file:
pxa3xx_nand_write_buf	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_nand_write_buf(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
pxa3xx_nand_write_page_hwecc	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa3xx_nand_write_page_hwecc(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
pxa3xx_set_datasize	drivers/mtd/nand/pxa3xx_nand.c	/^static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info,$/;"	f	typeref:typename:void	file:
pxa_clock_setup	arch/arm/cpu/pxa/pxa2xx.c	/^void pxa_clock_setup(void)$/;"	f	typeref:typename:void
pxa_ecc_init	drivers/mtd/nand/pxa3xx_nand.c	/^static int pxa_ecc_init(struct pxa3xx_nand_info *info,$/;"	f	typeref:typename:int	file:
pxa_get_cpu_revision	arch/arm/cpu/pxa/cpuinfo.c	/^uint32_t pxa_get_cpu_revision(void)$/;"	f	typeref:typename:uint32_t
pxa_get_cpuid	arch/arm/cpu/pxa/cpuinfo.c	/^static uint32_t pxa_get_cpuid(void)$/;"	f	typeref:typename:uint32_t	file:
pxa_getc_dev	drivers/serial/serial_pxa.c	/^int pxa_getc_dev(unsigned int uart_index)$/;"	f	typeref:typename:int
pxa_gpio_setup	arch/arm/cpu/pxa/pxa2xx.c	/^void pxa_gpio_setup(void)$/;"	f	typeref:typename:void
pxa_init_dev	drivers/serial/serial_pxa.c	/^int pxa_init_dev(unsigned int uart_index)$/;"	f	typeref:typename:int
pxa_interrupt_setup	arch/arm/cpu/pxa/pxa2xx.c	/^void pxa_interrupt_setup(void)$/;"	f	typeref:typename:void
pxa_mmc_cfg	drivers/mmc/pxa_mmc_gen.c	/^static struct mmc_config pxa_mmc_cfg = {$/;"	v	typeref:struct:mmc_config	file:
pxa_mmc_cmd_done	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd)$/;"	f	typeref:typename:int	file:
pxa_mmc_do_read_xfer	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
pxa_mmc_do_write_xfer	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
pxa_mmc_init	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
pxa_mmc_ops	drivers/mmc/pxa_mmc_gen.c	/^static const struct mmc_ops pxa_mmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
pxa_mmc_priv	drivers/mmc/pxa_mmc_gen.c	/^struct pxa_mmc_priv {$/;"	s	file:
pxa_mmc_register	drivers/mmc/pxa_mmc_gen.c	/^int pxa_mmc_register(int card_index)$/;"	f	typeref:typename:int
pxa_mmc_regs	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^struct pxa_mmc_regs {$/;"	s
pxa_mmc_request	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
pxa_mmc_set_ios	drivers/mmc/pxa_mmc_gen.c	/^static void pxa_mmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
pxa_mmc_start_cmd	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
pxa_mmc_stop_clock	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_stop_clock(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
pxa_mmc_wait	drivers/mmc/pxa_mmc_gen.c	/^static int pxa_mmc_wait(struct mmc *mmc, uint32_t mask)$/;"	f	typeref:typename:int	file:
pxa_putc_dev	drivers/serial/serial_pxa.c	/^void pxa_putc_dev(unsigned int uart_index, const char c)$/;"	f	typeref:typename:void
pxa_puts_dev	drivers/serial/serial_pxa.c	/^void pxa_puts_dev(unsigned int uart_index, const char *s)$/;"	f	typeref:typename:void
pxa_serial_initialize	drivers/serial/serial_pxa.c	/^void pxa_serial_initialize(void)$/;"	f	typeref:typename:void
pxa_setbrg_dev	drivers/serial/serial_pxa.c	/^void pxa_setbrg_dev(uint32_t uart_index)$/;"	f	typeref:typename:void
pxa_tstc_dev	drivers/serial/serial_pxa.c	/^int pxa_tstc_dev(unsigned int uart_index)$/;"	f	typeref:typename:int
pxa_uart	drivers/serial/serial_pxa.c	/^#define	pxa_uart(/;"	d	file:
pxa_uart_desc	drivers/serial/serial_pxa.c	/^#define	pxa_uart_desc(/;"	d	file:
pxa_uart_get_baud_divider	drivers/serial/serial_pxa.c	/^static uint32_t pxa_uart_get_baud_divider(void)$/;"	f	typeref:typename:uint32_t	file:
pxa_uart_index_to_regs	drivers/serial/serial_pxa.c	/^static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index)$/;"	f	typeref:struct:pxa_uart_regs *	file:
pxa_uart_multi	drivers/serial/serial_pxa.c	/^	pxa_uart_multi(hwuart, HWUART)$/;"	f
pxa_uart_multi	drivers/serial/serial_pxa.c	/^#define	pxa_uart_multi(/;"	d	file:
pxa_uart_regs	arch/arm/include/asm/arch-pxa/regs-uart.h	/^struct pxa_uart_regs {$/;"	s
pxa_uart_toggle_clock	drivers/serial/serial_pxa.c	/^static void pxa_uart_toggle_clock(uint32_t uart_index, int enable)$/;"	f	typeref:typename:void	file:
pxa_wait_ticks	arch/arm/cpu/pxa/pxa2xx.c	/^void pxa_wait_ticks(int ticks)$/;"	f	typeref:typename:void
pxa_wakeup	arch/arm/cpu/pxa/pxa2xx.c	/^void pxa_wakeup(void)$/;"	f	typeref:typename:void
pxafb_dma_descriptor	include/pxa_lcd.h	/^struct pxafb_dma_descriptor {$/;"	s
pxafb_enable_controller	drivers/video/pxa_lcd.c	/^static void pxafb_enable_controller (vidinfo_t *vid)$/;"	f	typeref:typename:void	file:
pxafb_info	include/pxa_lcd.h	/^struct pxafb_info {$/;"	s
pxafb_init	drivers/video/pxa_lcd.c	/^static int pxafb_init (vidinfo_t *vid)$/;"	f	typeref:typename:int	file:
pxafb_init_mem	drivers/video/pxa_lcd.c	/^static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid)$/;"	f	typeref:typename:int	file:
pxafb_setup_gpio	drivers/video/pxa_lcd.c	/^static inline void pxafb_setup_gpio (vidinfo_t *vid) {}$/;"	f	typeref:typename:void	file:
pxafb_setup_gpio	drivers/video/pxa_lcd.c	/^static void pxafb_setup_gpio (vidinfo_t *vid)$/;"	f	typeref:typename:void	file:
pxc	drivers/net/mvgbe.h	/^	u32 pxc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pxcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pxcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pxcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pxcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pxcx	drivers/net/mvgbe.h	/^	u32 pxcx;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pxdfc	drivers/net/mvgbe.h	/^	u32 pxdfc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pxdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pxdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pxdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pxdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pxe	lib/efi_loader/efi_net.c	/^	struct efi_pxe pxe;$/;"	m	struct:efi_net_obj	typeref:struct:efi_pxe	file:
pxe_default_paths	cmd/pxe.c	/^const char *pxe_default_paths[] = {$/;"	v	typeref:typename:const char * []
pxe_discover	include/efi_api.h	/^	struct efi_pxe_packet pxe_discover;$/;"	m	struct:efi_pxe_mode	typeref:struct:efi_pxe_packet
pxe_ipaddr_paths	cmd/pxe.c	/^static int pxe_ipaddr_paths(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)$/;"	f	typeref:typename:int	file:
pxe_label	cmd/pxe.c	/^struct pxe_label {$/;"	s	file:
pxe_mac_path	cmd/pxe.c	/^static int pxe_mac_path(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)$/;"	f	typeref:typename:int	file:
pxe_menu	cmd/pxe.c	/^struct pxe_menu {$/;"	s	file:
pxe_menu_to_menu	cmd/pxe.c	/^static struct menu *pxe_menu_to_menu(struct pxe_menu *cfg)$/;"	f	typeref:struct:menu *	file:
pxe_mode	lib/efi_loader/efi_net.c	/^	struct efi_pxe_mode pxe_mode;$/;"	m	struct:efi_net_obj	typeref:struct:efi_pxe_mode	file:
pxe_reply	include/efi_api.h	/^	struct efi_pxe_packet pxe_reply;$/;"	m	struct:efi_pxe_mode	typeref:struct:efi_pxe_packet
pxe_uuid_path	cmd/pxe.c	/^static int pxe_uuid_path(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)$/;"	f	typeref:typename:int	file:
pxl_clk	drivers/video/da8xx-fb.c	/^	unsigned int pxl_clk;$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned int	file:
pxl_clk	drivers/video/da8xx-fb.h	/^	unsigned int	pxl_clk;	\/* Pixel clock *\/$/;"	m	struct:da8xx_panel	typeref:typename:unsigned int
pxl_clk_div	drivers/video/am335x-fb.h	/^	unsigned int	pxl_clk_div;	\/* Pixel clock divider*\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
pxm50	board/siemens/common/factoryset.h	/^	int pxm50;$/;"	m	struct:factorysetcontainer	typeref:typename:int
pxmfs	drivers/net/mvgbe.h	/^	u32 pxmfs;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pxofc	drivers/net/mvgbe.h	/^	u32 pxofc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pxp	arch/arm/dts/imx6dl.dtsi	/^			pxp: pxp@020f0000 {$/;"	l	label:aips1
pxp	arch/arm/dts/imx6ull.dtsi	/^			pxp: pxp@021cc000 {$/;"	l
pxs2_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^pxs2_end:$/;"	l
pxtfut	drivers/net/mvgbe.h	/^	u32 pxtfut;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
pycr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pycr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pycr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pycr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pydr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pydr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pydr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pydr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pytest	test/py/pytest.ini	/^[pytest]$/;"	s
pytest_addoption	test/py/conftest.py	/^def pytest_addoption(parser):$/;"	f
pytest_configure	test/py/conftest.py	/^def pytest_configure(config):$/;"	f
pytest_generate_tests	test/py/conftest.py	/^def pytest_generate_tests(metafunc):$/;"	f
pytest_itemcollected	test/py/conftest.py	/^def pytest_itemcollected(item):$/;"	f
pytest_runtest_protocol	test/py/conftest.py	/^def pytest_runtest_protocol(item, nextitem):$/;"	f
pytest_runtest_setup	test/py/conftest.py	/^def pytest_runtest_setup(item):$/;"	f
pzcr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	pzcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pzcr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	pzcr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
pzdr	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	pzdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
pzdr	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	pzdr;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
q	arch/x86/include/asm/msr.h	/^		u64 q;$/;"	m	union:msr::__anonc18a15d2010a	typeref:typename:u64
q0_tx_flow_ctrl	drivers/net/dwc_eth_qos.c	/^	uint32_t q0_tx_flow_ctrl;			\/* 0x070 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
qTD	drivers/usb/host/ehci.h	/^struct qTD {$/;"	s
q_fullness	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 q_fullness;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
qadc	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct qadc {$/;"	s
qadc5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} qadc5xx_t;$/;"	t	typeref:struct:qadc
qadc_64int	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_64int;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_64mcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_64mcr;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_64test	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_64test;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_ccw	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_ccw[64];$/;"	m	struct:qadc	typeref:typename:ushort[64]
qadc_ddrqa	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_ddrqa;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_ljsrr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_ljsrr[64];$/;"	m	struct:qadc	typeref:typename:ushort[64]
qadc_ljurr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_ljurr[64];$/;"	m	struct:qadc	typeref:typename:ushort[64]
qadc_portqa	arch/powerpc/include/asm/5xx_immap.h	/^	u_char  qadc_portqa;$/;"	m	struct:qadc	typeref:typename:u_char
qadc_portqb	arch/powerpc/include/asm/5xx_immap.h	/^	u_char  qadc_portqb;$/;"	m	struct:qadc	typeref:typename:u_char
qadc_qacr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_qacr0;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_qacr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_qacr1;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_qacr2	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_qacr2;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_qasr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_qasr0;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_qasr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_qasr1;$/;"	m	struct:qadc	typeref:typename:ushort
qadc_rjurr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qadc_rjurr[64];$/;"	m	struct:qadc	typeref:typename:ushort[64]
qb_attr_code	drivers/net/fsl-mc/dpio/qbman_portal.h	/^struct qb_attr_code {$/;"	s
qb_attr_code_decode	drivers/net/fsl-mc/dpio/qbman_portal.h	/^static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,$/;"	f	typeref:typename:uint32_t
qb_attr_code_encode	drivers/net/fsl-mc/dpio/qbman_portal.h	/^static inline void qb_attr_code_encode(const struct qb_attr_code *code,$/;"	f	typeref:typename:void
qb_attr_code_encode_64	drivers/net/fsl-mc/dpio/qbman_portal.h	/^static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,$/;"	f	typeref:typename:void
qb_cl	drivers/net/fsl-mc/dpio/qbman_portal.h	/^#define qb_cl(/;"	d
qb_pull_dt_channel	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qb_pull_dt_channel,$/;"	e	enum:qb_pull_dt_e	file:
qb_pull_dt_e	drivers/net/fsl-mc/dpio/qbman_portal.c	/^enum qb_pull_dt_e {$/;"	g	file:
qb_pull_dt_framequeue	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qb_pull_dt_framequeue$/;"	e	enum:qb_pull_dt_e	file:
qb_pull_dt_workqueue	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qb_pull_dt_workqueue,$/;"	e	enum:qb_pull_dt_e	file:
qbman_block_desc	include/fsl-mc/fsl_qbman_base.h	/^struct qbman_block_desc {$/;"	s
qbman_cena_invalidate_prefetch	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void qbman_cena_invalidate_prefetch(struct qbman_swp_sys *s,$/;"	f	typeref:typename:void
qbman_cena_read	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void *qbman_cena_read(struct qbman_swp_sys *s, uint32_t offset)$/;"	f	typeref:typename:void *
qbman_cena_write_complete	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void qbman_cena_write_complete(struct qbman_swp_sys *s,$/;"	f	typeref:typename:void
qbman_cena_write_start	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void *qbman_cena_write_start(struct qbman_swp_sys *s,$/;"	f	typeref:typename:void *
qbman_cinh_read	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline uint32_t qbman_cinh_read(struct qbman_swp_sys *s, uint32_t offset)$/;"	f	typeref:typename:uint32_t
qbman_cinh_write	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void qbman_cinh_write(struct qbman_swp_sys *s, uint32_t offset,$/;"	f	typeref:typename:void
qbman_dq_entry_has_newtoken	drivers/net/fsl-mc/dpio/qbman_portal.c	/^int qbman_dq_entry_has_newtoken(struct qbman_swp *s,$/;"	f	typeref:typename:int
qbman_dq_entry_is_DQ	drivers/net/fsl-mc/dpio/qbman_portal.c	/^int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)$/;"	f	typeref:typename:int
qbman_dq_entry_set_oldtoken	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,$/;"	f	typeref:typename:void
qbman_eq_cmd_e	drivers/net/fsl-mc/dpio/qbman_portal.c	/^enum qbman_eq_cmd_e {$/;"	g	file:
qbman_eq_cmd_empty	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_eq_cmd_empty,$/;"	e	enum:qbman_eq_cmd_e	file:
qbman_eq_cmd_respond	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_eq_cmd_respond,$/;"	e	enum:qbman_eq_cmd_e	file:
qbman_eq_cmd_respond_reject	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_eq_cmd_respond_reject$/;"	e	enum:qbman_eq_cmd_e	file:
qbman_eq_desc	include/fsl-mc/fsl_qbman_portal.h	/^struct qbman_eq_desc {$/;"	s
qbman_eq_desc_clear	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_eq_desc_clear(struct qbman_eq_desc *d)$/;"	f	typeref:typename:void
qbman_eq_desc_set_no_orp	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)$/;"	f	typeref:typename:void
qbman_eq_desc_set_qd	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,$/;"	f	typeref:typename:void
qbman_eq_desc_set_response	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_eq_desc_set_response(struct qbman_eq_desc *d,$/;"	f	typeref:typename:void
qbman_fd	include/fsl-mc/fsl_qbman_base.h	/^struct qbman_fd {$/;"	s
qbman_fd_simple	include/fsl-mc/fsl_qbman_base.h	/^		struct qbman_fd_simple {$/;"	s	union:qbman_fd::__anonb88dd6cc010a
qbman_portal_ce_offset	include/fsl-mc/fsl_dpio.h	/^	uint64_t qbman_portal_ce_offset;$/;"	m	struct:dpio_attr	typeref:typename:uint64_t
qbman_portal_ci_offset	include/fsl-mc/fsl_dpio.h	/^	uint64_t qbman_portal_ci_offset;$/;"	m	struct:dpio_attr	typeref:typename:uint64_t
qbman_portal_id	include/fsl-mc/fsl_dpio.h	/^	uint16_t qbman_portal_id;$/;"	m	struct:dpio_attr	typeref:typename:uint16_t
qbman_pull_desc	include/fsl-mc/fsl_qbman_portal.h	/^struct qbman_pull_desc {$/;"	s
qbman_pull_desc_clear	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_pull_desc_clear(struct qbman_pull_desc *d)$/;"	f	typeref:typename:void
qbman_pull_desc_set_fq	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)$/;"	f	typeref:typename:void
qbman_pull_desc_set_numframes	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)$/;"	f	typeref:typename:void
qbman_pull_desc_set_storage	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,$/;"	f	typeref:typename:void
qbman_pull_desc_set_token	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)$/;"	f	typeref:typename:void
qbman_release_desc	include/fsl-mc/fsl_qbman_portal.h	/^struct qbman_release_desc {$/;"	s
qbman_release_desc_clear	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_release_desc_clear(struct qbman_release_desc *d)$/;"	f	typeref:typename:void
qbman_release_desc_set_bpid	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)$/;"	f	typeref:typename:void
qbman_sdqcr_dct	drivers/net/fsl-mc/dpio/qbman_portal.c	/^enum qbman_sdqcr_dct {$/;"	g	file:
qbman_sdqcr_dct_active	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_sdqcr_dct_active$/;"	e	enum:qbman_sdqcr_dct	file:
qbman_sdqcr_dct_active_ics	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_sdqcr_dct_active_ics,$/;"	e	enum:qbman_sdqcr_dct	file:
qbman_sdqcr_dct_null	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_sdqcr_dct_null = 0,$/;"	e	enum:qbman_sdqcr_dct	file:
qbman_sdqcr_dct_prio_ics	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_sdqcr_dct_prio_ics,$/;"	e	enum:qbman_sdqcr_dct	file:
qbman_sdqcr_fc	drivers/net/fsl-mc/dpio/qbman_portal.c	/^enum qbman_sdqcr_fc {$/;"	g	file:
qbman_sdqcr_fc_one	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_sdqcr_fc_one = 0,$/;"	e	enum:qbman_sdqcr_fc	file:
qbman_sdqcr_fc_up_to_3	drivers/net/fsl-mc/dpio/qbman_portal.c	/^	qbman_sdqcr_fc_up_to_3 = 1$/;"	e	enum:qbman_sdqcr_fc	file:
qbman_set_swp_cfg	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,$/;"	f	typeref:typename:uint32_t
qbman_swp	drivers/net/fsl-mc/dpio/qbman_portal.h	/^struct qbman_swp {$/;"	s
qbman_swp_acquire	drivers/net/fsl-mc/dpio/qbman_portal.c	/^int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,$/;"	f	typeref:typename:int
qbman_swp_desc	include/fsl-mc/fsl_qbman_base.h	/^struct qbman_swp_desc {$/;"	s
qbman_swp_dqrr_consume	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)$/;"	f	typeref:typename:void
qbman_swp_dqrr_next	drivers/net/fsl-mc/dpio/qbman_portal.c	/^const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)$/;"	f	typeref:typename:const struct ldpaa_dq *
qbman_swp_enqueue	drivers/net/fsl-mc/dpio/qbman_portal.c	/^int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,$/;"	f	typeref:typename:int
qbman_swp_init	drivers/net/fsl-mc/dpio/qbman_portal.c	/^struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)$/;"	f	typeref:struct:qbman_swp *
qbman_swp_mc_complete	drivers/net/fsl-mc/dpio/qbman_portal.h	/^static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,$/;"	f	typeref:typename:void *
qbman_swp_mc_result	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void *qbman_swp_mc_result(struct qbman_swp *p)$/;"	f	typeref:typename:void *
qbman_swp_mc_start	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void *qbman_swp_mc_start(struct qbman_swp *p)$/;"	f	typeref:typename:void *
qbman_swp_mc_submit	drivers/net/fsl-mc/dpio/qbman_portal.c	/^void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)$/;"	f	typeref:typename:void
qbman_swp_pull	drivers/net/fsl-mc/dpio/qbman_portal.c	/^int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)$/;"	f	typeref:typename:int
qbman_swp_release	drivers/net/fsl-mc/dpio/qbman_portal.c	/^int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,$/;"	f	typeref:typename:int
qbman_swp_sys	drivers/net/fsl-mc/dpio/qbman_sys.h	/^struct qbman_swp_sys {$/;"	s
qbman_swp_sys_finish	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)$/;"	f	typeref:typename:void
qbman_swp_sys_init	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,$/;"	f	typeref:typename:int
qbman_version	include/fsl-mc/fsl_dpio.h	/^	uint32_t		qbman_version;$/;"	m	struct:dpio_attr	typeref:typename:uint32_t
qc_active	drivers/block/sata_dwc.h	/^	unsigned int		qc_active;$/;"	m	struct:ata_port	typeref:typename:unsigned int
qc_allocated	drivers/block/sata_dwc.h	/^	unsigned long		qc_allocated;$/;"	m	struct:ata_port	typeref:typename:unsigned long
qca953x_get_xtal	arch/mips/mach-ath79/qca953x/clk.c	/^static u32 qca953x_get_xtal(void)$/;"	f	typeref:typename:u32	file:
qca953x_pinctrl_get_periph_id	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static int qca953x_pinctrl_get_periph_id(struct udevice *dev,$/;"	f	typeref:typename:int	file:
qca953x_pinctrl_ids	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static const struct udevice_id qca953x_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
qca953x_pinctrl_ops	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static struct pinctrl_ops qca953x_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
qca953x_pinctrl_priv	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^struct qca953x_pinctrl_priv {$/;"	s	file:
qca953x_pinctrl_probe	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static int qca953x_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
qca953x_pinctrl_request	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static int qca953x_pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int	file:
qca953x_pinctrl_set_state_simple	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^static int qca953x_pinctrl_set_state_simple(struct udevice *dev,$/;"	f	typeref:typename:int	file:
qcmd	drivers/block/sata_dwc.h	/^	struct ata_queued_cmd	qcmd[ATA_MAX_QUEUE];$/;"	m	struct:ata_port	typeref:struct:ata_queued_cmd[]
qconf-cxxobjs	scripts/kconfig/Makefile	/^qconf-cxxobjs	:= qconf.o$/;"	m
qconf-objs	scripts/kconfig/Makefile	/^qconf-objs	:= zconf.tab.o$/;"	m
qcp_packet0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 qcp_packet0;		\/* 0x0e0 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
qcp_packet0	arch/arm/include/asm/arch/display.h	/^	u32 qcp_packet0;		\/* 0x0e0 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
qcp_packet1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 qcp_packet1;		\/* 0x0e4 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
qcp_packet1	arch/arm/include/asm/arch/display.h	/^	u32 qcp_packet1;		\/* 0x0e4 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
qcr	drivers/spi/cf_qspi.c	/^	u16 qcr;		\/* QCR: Queued Command Ram *\/$/;"	m	struct:cf_qspi_slave	typeref:typename:u16	file:
qcsp	arch/powerpc/include/asm/immap_85xx.h	/^	} qcsp[50];$/;"	m	struct:ccsr_qman	typeref:struct:ccsr_qman::__anondcd7518a0b08[50]
qcsp_bar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	qcsp_bar;	\/* QCSP Base Addr Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
qcsp_bare	arch/powerpc/include/asm/immap_85xx.h	/^	u32	qcsp_bare;	\/* QCSP Extended Base Addr Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
qcsp_dd_cfg	arch/powerpc/include/asm/immap_85xx.h	/^		u32	qcsp_dd_cfg;	\/* 0xc - SW Portal n Dynamic Debug cfg*\/$/;"	m	struct:ccsr_qman::__anondcd7518a0b08	typeref:typename:u32
qcsp_io_cfg	arch/powerpc/include/asm/immap_85xx.h	/^		u32	qcsp_io_cfg;	\/* 0x4 - SW Portal n IO cfg *\/$/;"	m	struct:ccsr_qman::__anondcd7518a0b08	typeref:typename:u32
qcsp_lio_cfg	arch/powerpc/include/asm/immap_85xx.h	/^		u32	qcsp_lio_cfg;	\/* 0x0 - SW Portal n LIO cfg *\/$/;"	m	struct:ccsr_qman::__anondcd7518a0b08	typeref:typename:u32
qe	arch/powerpc/include/asm/immap_83xx.h	/^	u8			qe[0x100000];	\/* QE block *\/$/;"	m	struct:immap	typeref:typename:u8[0x100000]
qe_assign_page	drivers/qe/qe.c	/^void qe_assign_page(uint snum, uint para_ram_base)$/;"	f	typeref:typename:void
qe_bd_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) qe_bd_t, *p_bd_t;$/;"	t	typeref:struct:buffer_descriptor
qe_board_setup	board/freescale/t1040qds/t1040qds.c	/^static void qe_board_setup(void)$/;"	f	typeref:typename:void	file:
qe_brg	include/linux/immap_qe.h	/^typedef struct qe_brg {$/;"	s
qe_brg_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) qe_brg_t;$/;"	t	typeref:struct:qe_brg
qe_clk	arch/arm/include/asm/global_data.h	/^	u32 qe_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
qe_clk	arch/powerpc/include/asm/global_data.h	/^	u32 qe_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
qe_clock	include/fsl_qe.h	/^typedef enum qe_clock {$/;"	g
qe_clock_e	include/fsl_qe.h	/^} qe_clock_e;$/;"	t	typeref:enum:qe_clock
qe_cmd	drivers/qe/qe.c	/^static int qe_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
qe_config_iopin	arch/powerpc/cpu/mpc83xx/qe_io.c	/^void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)$/;"	f	typeref:typename:void
qe_config_iopin	arch/powerpc/cpu/mpc85xx/qe_io.c	/^void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)$/;"	f	typeref:typename:void
qe_firmware	include/fsl_qe.h	/^struct qe_firmware {$/;"	s
qe_firmware_info	drivers/qe/qe.c	/^static struct qe_firmware_info qe_firmware_info;$/;"	v	typeref:struct:qe_firmware_info	file:
qe_firmware_info	include/fsl_qe.h	/^struct qe_firmware_info {$/;"	s
qe_firmware_uploaded	drivers/qe/qe.c	/^static int qe_firmware_uploaded;$/;"	v	typeref:typename:int	file:
qe_get_firmware_info	drivers/qe/qe.c	/^struct qe_firmware_info *qe_get_firmware_info(void)$/;"	f	typeref:struct:qe_firmware_info *
qe_get_snum	drivers/qe/qe.c	/^int qe_get_snum(void)$/;"	f	typeref:typename:int
qe_header	include/fsl_qe.h	/^	struct qe_header {$/;"	s	struct:qe_firmware
qe_ic	include/linux/immap_qe.h	/^typedef struct qe_ic {$/;"	s
qe_ic_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) qe_ic_t;$/;"	t	typeref:struct:qe_ic
qe_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 qe_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qe_immap	include/linux/immap_qe.h	/^typedef struct qe_immap {$/;"	s
qe_immr	drivers/qe/qe.c	/^qe_map_t		*qe_immr = NULL;$/;"	v	typeref:typename:qe_map_t *
qe_init	drivers/qe/qe.c	/^void qe_init(uint qe_base)$/;"	f	typeref:typename:void
qe_iop_conf_t	include/ioports.h	/^} qe_iop_conf_t;$/;"	t	typeref:struct:__anonc67861fe0308
qe_iop_conf_tab	board/freescale/mpc8323erdb/mpc8323erdb.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iop_conf_tab	board/freescale/mpc832xemds/mpc832xemds.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iop_conf_tab	board/freescale/mpc8568mds/mpc8568mds.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iop_conf_tab	board/freescale/mpc8569mds/mpc8569mds.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iop_conf_tab	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iop_conf_tab	board/freescale/p1_twr/p1_twr.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iop_conf_tab	board/keymile/km83xx/km83xx.c	/^const qe_iop_conf_t qe_iop_conf_tab[] = {$/;"	v	typeref:typename:const qe_iop_conf_t[]
qe_iram	include/linux/immap_qe.h	/^typedef struct qe_iram {$/;"	s
qe_iram_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) qe_iram_t;$/;"	t	typeref:struct:qe_iram
qe_issue_cmd	drivers/qe/qe.c	/^void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data)$/;"	f	typeref:typename:void
qe_lcd_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 qe_lcd_mux;		\/* QE and LCD Selection *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
qe_map_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) qe_map_t;$/;"	t	typeref:struct:qe_immap
qe_microcode	include/fsl_qe.h	/^	struct qe_microcode {$/;"	s	struct:qe_firmware
qe_muram_addr	drivers/qe/qe.c	/^void *qe_muram_addr(uint offset)$/;"	f	typeref:typename:void *
qe_muram_alloc	drivers/qe/qe.c	/^uint qe_muram_alloc(uint size, uint align)$/;"	f	typeref:typename:uint
qe_mux	include/linux/immap_qe.h	/^typedef struct qe_mux {$/;"	s
qe_mux_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) qe_mux_t;$/;"	t	typeref:struct:qe_mux
qe_par_io	arch/powerpc/include/asm/immap_85xx.h	/^	par_io_t qe_par_io[3];$/;"	m	struct:ccsr_gur	typeref:typename:par_io_t[3]
qe_par_io	arch/powerpc/include/asm/immap_85xx.h	/^	par_io_t qe_par_io[7];$/;"	m	struct:ccsr_gur	typeref:typename:par_io_t[7]
qe_put_snum	drivers/qe/qe.c	/^void qe_put_snum(u8 snum)$/;"	f	typeref:typename:void
qe_reset	drivers/qe/qe.c	/^void qe_reset(void)$/;"	f	typeref:typename:void
qe_sdma_init	drivers/qe/qe.c	/^static void qe_sdma_init(void)$/;"	f	typeref:typename:void	file:
qe_set_brg	drivers/qe/qe.c	/^int qe_set_brg(uint brg, uint rate)$/;"	f	typeref:typename:int
qe_set_mii_clk_src	drivers/qe/qe.c	/^int qe_set_mii_clk_src(int ucc_num)$/;"	f	typeref:typename:int
qe_snum	include/fsl_qe.h	/^typedef struct qe_snum {$/;"	s
qe_snum_state	include/fsl_qe.h	/^typedef enum qe_snum_state {$/;"	g
qe_snum_state_e	include/fsl_qe.h	/^} qe_snum_state_e;$/;"	t	typeref:enum:qe_snum_state
qe_snum_t	include/fsl_qe.h	/^} qe_snum_t;$/;"	t	typeref:struct:qe_snum
qe_snums_init	drivers/qe/qe.c	/^static void qe_snums_init(void)$/;"	f	typeref:typename:void	file:
qe_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 qe_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qe_timers	include/linux/immap_qe.h	/^typedef struct qe_timers {$/;"	s
qe_timers_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) qe_timers_t;$/;"	t	typeref:struct:qe_timers
qe_upload_firmware	drivers/qe/qe.c	/^int qe_upload_firmware(const struct qe_firmware *firmware)$/;"	f	typeref:typename:int
qe_upload_microcode	drivers/qe/qe.c	/^static void qe_upload_microcode(const void *base,$/;"	f	typeref:typename:void	file:
qedma3_start	drivers/dma/ti-edma3.c	/^void qedma3_start(u32 base, struct edma3_channel_config *cfg)$/;"	f	typeref:typename:void
qedma3_stop	drivers/dma/ti-edma3.c	/^void qedma3_stop(u32 base, struct edma3_channel_config *cfg)$/;"	f	typeref:typename:void
qegpio83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct qegpio83xx {$/;"	s
qeioclkcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 qeioclkcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qeioclkcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 qeioclkcr;	\/* 0x400 QUICC Engine IO Clock Control register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qeliodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32     qeliodnr;       \/* QE LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
qemu_chipset_init	arch/x86/cpu/qemu/qemu.c	/^static void qemu_chipset_init(void)$/;"	f	typeref:typename:void	file:
qemu_cpu_fixup	arch/x86/cpu/mp_init.c	/^static int qemu_cpu_fixup(void)$/;"	f	typeref:typename:int	file:
qemu_fwcfg_dma_present	drivers/misc/qfw.c	/^bool qemu_fwcfg_dma_present(void)$/;"	f	typeref:typename:bool
qemu_fwcfg_do_cpus	cmd/qfw.c	/^static int qemu_fwcfg_do_cpus(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
qemu_fwcfg_do_list	cmd/qfw.c	/^static int qemu_fwcfg_do_list(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
qemu_fwcfg_do_load	cmd/qfw.c	/^static int qemu_fwcfg_do_load(cmd_tbl_t *cmdtp, int flag,$/;"	f	typeref:typename:int	file:
qemu_fwcfg_file_iter_end	drivers/misc/qfw.c	/^bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter)$/;"	f	typeref:typename:bool
qemu_fwcfg_file_iter_init	drivers/misc/qfw.c	/^struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter)$/;"	f	typeref:struct:fw_file *
qemu_fwcfg_file_iter_next	drivers/misc/qfw.c	/^struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter)$/;"	f	typeref:struct:fw_file *
qemu_fwcfg_find_file	drivers/misc/qfw.c	/^struct fw_file *qemu_fwcfg_find_file(const char *name)$/;"	f	typeref:struct:fw_file *
qemu_fwcfg_init	drivers/misc/qfw.c	/^void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops)$/;"	f	typeref:typename:void
qemu_fwcfg_items	include/qfw.h	/^enum qemu_fwcfg_items {$/;"	g
qemu_fwcfg_list_firmware	cmd/qfw.c	/^static int qemu_fwcfg_list_firmware(void)$/;"	f	typeref:typename:int	file:
qemu_fwcfg_online_cpus	drivers/misc/qfw.c	/^int qemu_fwcfg_online_cpus(void)$/;"	f	typeref:typename:int
qemu_fwcfg_present	drivers/misc/qfw.c	/^bool qemu_fwcfg_present(void)$/;"	f	typeref:typename:bool
qemu_fwcfg_read_entry	drivers/misc/qfw.c	/^void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address)$/;"	f	typeref:typename:void
qemu_fwcfg_read_entry_dma	drivers/misc/qfw.c	/^static void qemu_fwcfg_read_entry_dma(uint16_t entry,$/;"	f	typeref:typename:void	file:
qemu_fwcfg_read_entry_pio	drivers/misc/qfw.c	/^static void qemu_fwcfg_read_entry_pio(uint16_t entry,$/;"	f	typeref:typename:void	file:
qemu_fwcfg_read_firmware_list	drivers/misc/qfw.c	/^int qemu_fwcfg_read_firmware_list(void)$/;"	f	typeref:typename:int
qemu_fwcfg_setup_kernel	cmd/qfw.c	/^static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)$/;"	f	typeref:typename:int	file:
qemu_x86_fwcfg_read_entry_dma	arch/x86/cpu/qemu/qemu.c	/^static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)$/;"	f	typeref:typename:void	file:
qemu_x86_fwcfg_read_entry_pio	arch/x86/cpu/qemu/qemu.c	/^static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,$/;"	f	typeref:typename:void	file:
qepi	arch/powerpc/include/asm/immap_83xx.h	/^	qepi83xx_t		qepi;		\/* QE Ports Interrupts Registers *\/$/;"	m	struct:immap	typeref:typename:qepi83xx_t
qepi83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct qepi83xx {$/;"	s
qepi83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} qepi83xx_t;$/;"	t	typeref:struct:qepi83xx
qepicr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 qepicr;		\/* QE Ports Interrupt Control Register *\/$/;"	m	struct:qepi83xx	typeref:typename:u32
qepier	arch/powerpc/include/asm/immap_83xx.h	/^	u32 qepier;		\/* QE Ports Interrupt Event Register *\/$/;"	m	struct:qepi83xx	typeref:typename:u32
qepimr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 qepimr;		\/* QE Ports Interrupt Mask Register *\/$/;"	m	struct:qepi83xx	typeref:typename:u32
qepio	arch/powerpc/include/asm/immap_83xx.h	/^	qepio83xx_t		qepio;		\/* QE Parallel I\/O ports *\/$/;"	m	struct:immap	typeref:typename:qepio83xx_t
qepio83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} qepio83xx_t;$/;"	t	typeref:struct:qegpio83xx
qesba	arch/powerpc/include/asm/immap_83xx.h	/^	qesba83xx_t		qesba;		\/* QE Secondary Bus Access Windows *\/$/;"	m	struct:immap	typeref:typename:qesba83xx_t
qesba83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct qesba83xx {$/;"	s
qesba83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} qesba83xx_t;$/;"	t	typeref:struct:qesba83xx
qet	include/linux/immap_qe.h	/^	qe_timers_t qet;	\/* QE Timers *\/$/;"	m	struct:qe_immap	typeref:typename:qe_timers_t
qflash0	arch/arm/dts/bk4r1.dts	/^	qflash0: spi_flash@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls1012a-frdm.dtsi	/^	qflash0: s25fl128s@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls1012a-qds.dtsi	/^	qflash0: s25fl128s@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls1012a-rdb.dtsi	/^	qflash0: s25fl128s@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls1043a-qds.dtsi	/^	qflash0: s25fl128s@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls1046a-qds.dtsi	/^	qflash0: s25fl128s@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls1046a-rdb.dts	/^	qflash0: s25fs512s@0 {$/;"	l
qflash0	arch/arm/dts/fsl-ls2080a-qds.dts	/^	qflash0: s25fs256s@0 {$/;"	l
qflash0	arch/arm/dts/ls1021a-qds.dtsi	/^	qflash0: s25fl128s@0 {$/;"	l
qflash0	arch/arm/dts/ls1021a-twr.dtsi	/^	qflash0: n25q128a13@0 {$/;"	l
qflash1	arch/arm/dts/bk4r1.dts	/^	qflash1: spi_flash@1 {$/;"	l
qflash1	arch/arm/dts/fsl-ls1046a-rdb.dts	/^	qflash1: s25fs512s@1 {$/;"	l
qgettext	scripts/kconfig/qconf.cc	/^static inline QString qgettext(const QString& str)$/;"	f	typeref:typename:QString	file:
qgettext	scripts/kconfig/qconf.cc	/^static inline QString qgettext(const char* str)$/;"	f	typeref:typename:QString	file:
qh_bulk	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_qh_t qh_bulk __attribute__ ((aligned(16)));	\/*  bulk Queue Head *\/$/;"	v	typeref:typename:uhci_qh_t	file:
qh_bulk	board/mpl/common/usb_uhci.c	/^static uhci_qh_t qh_bulk;          \/*  bulk Queue Head *\/$/;"	v	typeref:typename:uhci_qh_t	file:
qh_cntrl	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_qh_t qh_cntrl __attribute__ ((aligned(16)));	\/* control Queue Head *\/$/;"	v	typeref:typename:uhci_qh_t	file:
qh_cntrl	board/mpl/common/usb_uhci.c	/^static uhci_qh_t qh_cntrl;         \/* control Queue Head *\/$/;"	v	typeref:typename:uhci_qh_t	file:
qh_curtd	drivers/usb/host/ehci.h	/^	uint32_t qh_curtd;$/;"	m	struct:QH	typeref:typename:uint32_t
qh_end	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_qh_t qh_end __attribute__ ((aligned(16)));	\/* end Queue Head *\/$/;"	v	typeref:typename:uhci_qh_t	file:
qh_end	board/mpl/common/usb_uhci.c	/^static uhci_qh_t qh_end;           \/* end Queue Head *\/$/;"	v	typeref:typename:uhci_qh_t	file:
qh_endpt1	drivers/usb/host/ehci.h	/^	uint32_t qh_endpt1;$/;"	m	struct:QH	typeref:typename:uint32_t
qh_endpt2	drivers/usb/host/ehci.h	/^	uint32_t qh_endpt2;$/;"	m	struct:QH	typeref:typename:uint32_t
qh_link	drivers/usb/host/ehci.h	/^	uint32_t qh_link;$/;"	m	struct:QH	typeref:typename:uint32_t
qh_overlay	drivers/usb/host/ehci.h	/^	struct qTD qh_overlay;$/;"	m	struct:QH	typeref:struct:qTD
qhivec	include/linux/immap_qe.h	/^	u32 qhivec;$/;"	m	struct:qe_ic	typeref:typename:u32
qicnr	include/linux/immap_qe.h	/^	u32 qicnr;$/;"	m	struct:qe_ic	typeref:typename:u32
qicr	include/linux/immap_qe.h	/^	u32 qicr;$/;"	m	struct:qe_ic	typeref:typename:u32
qilcr_ls	include/fsl_sec.h	/^	u32	qilcr_ls;	\/* Queue Interface LIODN CFG Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
qilcr_ms	include/fsl_sec.h	/^	u32	qilcr_ms;	\/* Queue Interface LIODN CFG Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
qimr	include/linux/immap_qe.h	/^	u32 qimr;$/;"	m	struct:qe_ic	typeref:typename:u32
qipnr	include/linux/immap_qe.h	/^	u32 qipnr;$/;"	m	struct:qe_ic	typeref:typename:u32
qiprta	include/linux/immap_qe.h	/^	u32 qiprta;$/;"	m	struct:qe_ic	typeref:typename:u32
qiprtb	include/linux/immap_qe.h	/^	u32 qiprtb;$/;"	m	struct:qe_ic	typeref:typename:u32
qipwcc	include/linux/immap_qe.h	/^	u32 qipwcc;$/;"	m	struct:qe_ic	typeref:typename:u32
qipxcc	include/linux/immap_qe.h	/^	u32 qipxcc;$/;"	m	struct:qe_ic	typeref:typename:u32
qipycc	include/linux/immap_qe.h	/^	u32 qipycc;$/;"	m	struct:qe_ic	typeref:typename:u32
qipzcc	include/linux/immap_qe.h	/^	u32 qipzcc;$/;"	m	struct:qe_ic	typeref:typename:u32
qivec	include/linux/immap_qe.h	/^	u32 qivec;$/;"	m	struct:qe_ic	typeref:typename:u32
qixis	board/freescale/common/qixis.h	/^struct qixis {$/;"	s
qixis_bank_reset	board/freescale/common/qixis.c	/^void qixis_bank_reset(void)$/;"	f	typeref:typename:void
qixis_dump_regs	board/freescale/common/qixis.c	/^static void qixis_dump_regs(void)$/;"	f	typeref:typename:void	file:
qixis_dump_switch	board/freescale/b4860qds/b4860qds.c	/^void qixis_dump_switch(void)$/;"	f	typeref:typename:void
qixis_dump_switch	board/freescale/ls2080aqds/ls2080aqds.c	/^void qixis_dump_switch(void)$/;"	f	typeref:typename:void
qixis_dump_switch	board/freescale/ls2080ardb/ls2080ardb.c	/^void qixis_dump_switch(void)$/;"	f	typeref:typename:void
qixis_dump_switch	board/freescale/t102xqds/t102xqds.c	/^void qixis_dump_switch(void)$/;"	f	typeref:typename:void
qixis_dump_switch	board/freescale/t1040qds/t1040qds.c	/^void qixis_dump_switch(void)$/;"	f	typeref:typename:void
qixis_dump_switch	board/freescale/t4qds/t4240qds.c	/^void qixis_dump_switch(void)$/;"	f	typeref:typename:void
qixis_read	board/freescale/common/qixis.c	/^u8 qixis_read(unsigned int reg)$/;"	f	typeref:typename:u8
qixis_read_i2c	board/freescale/common/qixis.c	/^u8 qixis_read_i2c(unsigned int reg)$/;"	f	typeref:typename:u8
qixis_read_minor	board/freescale/common/qixis.c	/^u16 qixis_read_minor(void)$/;"	f	typeref:typename:u16
qixis_read_tag	board/freescale/common/qixis.c	/^char *qixis_read_tag(char *buf)$/;"	f	typeref:typename:char *
qixis_read_time	board/freescale/common/qixis.c	/^char *qixis_read_time(char *result)$/;"	f	typeref:typename:char *
qixis_reset	board/freescale/common/qixis.c	/^void qixis_reset(void)$/;"	f	typeref:typename:void
qixis_reset_cmd	board/freescale/common/qixis.c	/^int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int
qixis_write	board/freescale/common/qixis.c	/^void qixis_write(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
qixis_write_i2c	board/freescale/common/qixis.c	/^void qixis_write_i2c(unsigned int reg, u8 value)$/;"	f	typeref:typename:void
qlen	drivers/usb/gadget/ether.c	/^#define qlen(/;"	d	file:
qm_base_addr	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	qm_base_addr[4];$/;"	m	struct:global_ctl_regs	typeref:typename:u32[4]
qm_buff_push	drivers/dma/keystone_nav.c	/^void qm_buff_push(struct qm_host_desc *hd, u32 qnum,$/;"	f	typeref:typename:void
qm_cfg	drivers/dma/keystone_nav.c	/^static struct qm_config *qm_cfg;$/;"	v	typeref:struct:qm_config *	file:
qm_cfg_reg	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct qm_cfg_reg {$/;"	s
qm_close	drivers/dma/keystone_nav.c	/^void qm_close(void)$/;"	f	typeref:typename:void
qm_config	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct qm_config {$/;"	s
qm_host_desc	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct qm_host_desc {$/;"	s
qm_init	drivers/dma/keystone_nav.c	/^int qm_init(void)$/;"	f	typeref:typename:int
qm_memmap	drivers/dma/keystone_nav.c	/^struct qm_config qm_memmap = {$/;"	v	typeref:struct:qm_config
qm_pop	drivers/dma/keystone_nav.c	/^struct qm_host_desc *qm_pop(u32 qnum)$/;"	f	typeref:struct:qm_host_desc *
qm_pop_from_free_pool	drivers/dma/keystone_nav.c	/^struct qm_host_desc *qm_pop_from_free_pool(void)$/;"	f	typeref:struct:qm_host_desc *
qm_push	drivers/dma/keystone_nav.c	/^void qm_push(struct qm_host_desc *hd, u32 qnum)$/;"	f	typeref:typename:void
qm_reg_queue	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct qm_reg_queue {$/;"	s
qmbm_warmrst	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 qmbm_warmrst;		\/* 0xa00 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
qmifrstcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 qmifrstcr;	\/* 0x40c QMAN Interface Reset Control register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qmr	drivers/spi/cf_qspi.c	/^	u16 qmr;		\/* QMR: Queued Mode Register *\/$/;"	m	struct:cf_qspi_slave	typeref:typename:u16	file:
qmss	arch/arm/dts/k2e-netcp.dtsi	/^qmss: qmss@2a40000 {$/;"	l
qmss	arch/arm/dts/k2g-netcp.dtsi	/^qmss: qmss@4020000 {$/;"	l
qmss	arch/arm/dts/k2hk-netcp.dtsi	/^qmss: qmss@2a40000 {$/;"	l
qmss	arch/arm/dts/k2l-netcp.dtsi	/^qmss: qmss@2a40000 {$/;"	l
qmult	drivers/usb/gadget/ether.c	/^#define qmult	/;"	d	file:
qmult	drivers/usb/gadget/ether.c	/^#define qmult /;"	d	file:
qmx	include/linux/immap_qe.h	/^	qe_mux_t qmx;		\/* QE Multiplexer *\/$/;"	m	struct:qe_immap	typeref:typename:qe_mux_t
qn	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^enum qn {$/;"	g	file:
qn	board/freescale/mx7dsabresd/mx7dsabresd.c	/^enum qn {$/;"	g	file:
qn_disable	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_disable, qn_disable$/;"	e	enum:qn_output	file:
qn_disable	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_disable,$/;"	e	enum:qn_func	file:
qn_disable	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_reset, qn_reset, qn_reset, qn_enable, qn_disable, qn_reset,$/;"	e	enum:qn_output	file:
qn_disable	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_disable$/;"	e	enum:qn_output	file:
qn_disable	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,$/;"	e	enum:qn_output	file:
qn_disable	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_disable,$/;"	e	enum:qn_func	file:
qn_enable	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_enable,$/;"	e	enum:qn_func	file:
qn_enable	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_reset, qn_reset, qn_reset, qn_enable, qn_disable, qn_reset,$/;"	e	enum:qn_output	file:
qn_enable	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,$/;"	e	enum:qn_output	file:
qn_enable	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_enable,$/;"	e	enum:qn_func	file:
qn_func	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^enum qn_func {$/;"	g	file:
qn_func	board/freescale/mx7dsabresd/mx7dsabresd.c	/^enum qn_func {$/;"	g	file:
qn_high	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_high = 1,$/;"	e	enum:qn_level	file:
qn_high	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_high = 1,$/;"	e	enum:qn_level	file:
qn_level	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^enum qn_level {$/;"	g	file:
qn_level	board/freescale/mx7dsabresd/mx7dsabresd.c	/^enum qn_level {$/;"	g	file:
qn_low	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_low = 0,$/;"	e	enum:qn_level	file:
qn_low	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_low = 0,$/;"	e	enum:qn_level	file:
qn_output	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static enum qn_func qn_output[8] = {$/;"	g	file:
qn_output	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static enum qn_func qn_output[8] = {$/;"	g	file:
qn_reset	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_reset, qn_reset, qn_reset, qn_enable, qn_disable, qn_reset,$/;"	e	enum:qn_output	file:
qn_reset	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^	qn_reset,$/;"	e	enum:qn_func	file:
qn_reset	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,$/;"	e	enum:qn_output	file:
qn_reset	board/freescale/mx7dsabresd/mx7dsabresd.c	/^	qn_reset,$/;"	e	enum:qn_func	file:
qos1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 qos1;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qos2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 qos2;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qos3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 qos3;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qos_cfg	include/vsc9953.h	/^	struct vsc9953_qsys_qos_cfg	qos_cfg;$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_qos_cfg
qos_cfg	include/vsc9953.h	/^	u32	qos_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
qos_ctrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 qos_ctrl;		\/* QoS Control *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
qos_ctrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 qos_ctrl;		\/* QoS Control *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
qos_init	board/renesas/alt/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/blanche/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/gose/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/koelsch/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/lager/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/porter/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/silk/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init	board/renesas/stout/qos.c	/^void qos_init(void)$/;"	f	typeref:typename:void
qos_init_es1	board/renesas/lager/qos.c	/^static void qos_init_es1(void)$/;"	f	typeref:typename:void	file:
qos_init_es1	board/renesas/stout/qos.c	/^static void qos_init_es1(void)$/;"	f	typeref:typename:void	file:
qos_init_es2	board/renesas/lager/qos.c	/^static void qos_init_es2(void)$/;"	f	typeref:typename:void	file:
qos_init_es2	board/renesas/stout/qos.c	/^static void qos_init_es2(void)$/;"	f	typeref:typename:void	file:
qos_pcp_dei_map_cfg	include/vsc9953.h	/^	u32	qos_pcp_dei_map_cfg[16];$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32[16]
qos_range	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 qos_range;		\/* QoS Range *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
qos_range	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 qos_range;		\/* QoS Range *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
qosconf	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosconf;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosconfig0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig0;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig1;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig10;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig11;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig12;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig13;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig14;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig15;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig2;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig3;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig4;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig5;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig6;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig7;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig8;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qosconfig9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qosconfig9;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol0;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol0;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol1;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol1;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol10;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol10;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol10;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol11;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol11;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol11;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol12;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol12;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol12;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol13;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol13;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol13;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol14;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol14;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol14;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol15;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol15;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol15;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol2;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol2;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol2;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol3;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol3;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol3;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol4;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol4;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol4;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol5;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol5;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol5;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol6;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol6;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol6;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol7;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol7;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol7;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol8;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol8;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol8;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qoscontrol9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol9;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qoscontrol9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol9;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
qoscontrol9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qoscontrol9;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
qosctset0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosctset0;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosctset1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosctset1;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosctset2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosctset2;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosctset3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosctset3;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosin	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosin;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosqon	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosqon;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosreqctr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosreqctr;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosthres0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosthres0;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosthres1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosthres1;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qosthres2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 qosthres2;$/;"	m	struct:rcar_axi_qos	typeref:typename:u32
qostimeout0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qostimeout0;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qostimeout1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int qostimeout1;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
qp_info	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qp_info	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {$/;"	v	typeref:struct:qportal_info[]
qpool_num	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	qpool_num;	\/* *\/$/;"	m	struct:qm_config	typeref:typename:u32
qportal_info	arch/powerpc/include/asm/fsl_portals.h	/^struct qportal_info {$/;"	s
qricr	include/linux/immap_qe.h	/^	u32 qricr;$/;"	m	struct:qe_ic	typeref:typename:u32
qrimr	include/linux/immap_qe.h	/^	u32 qrimr;$/;"	m	struct:qe_ic	typeref:typename:u32
qrio_cpuwd_flag	board/keymile/kmp204x/qrio.c	/^void qrio_cpuwd_flag(bool flag)$/;"	f	typeref:typename:void
qrio_enable_app_buffer	board/keymile/kmp204x/qrio.c	/^void qrio_enable_app_buffer(void)$/;"	f	typeref:typename:void
qrio_get_gpio	board/keymile/kmp204x/qrio.c	/^int qrio_get_gpio(u8 port_off, u8 gpio_nr)$/;"	f	typeref:typename:int
qrio_gpio_direction_input	board/keymile/kmp204x/qrio.c	/^void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr)$/;"	f	typeref:typename:void
qrio_gpio_direction_output	board/keymile/kmp204x/qrio.c	/^void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value)$/;"	f	typeref:typename:void
qrio_prst	board/keymile/kmp204x/qrio.c	/^void qrio_prst(u8 bit, bool en, bool wden)$/;"	f	typeref:typename:void
qrio_prstcfg	board/keymile/kmp204x/qrio.c	/^void qrio_prstcfg(u8 bit, u8 mode)$/;"	f	typeref:typename:void
qrio_set_gpio	board/keymile/kmp204x/qrio.c	/^void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value)$/;"	f	typeref:typename:void
qrio_set_leds	board/keymile/kmp204x/qrio.c	/^void qrio_set_leds(void)$/;"	f	typeref:typename:void
qrio_set_opendrain_gpio	board/keymile/kmp204x/qrio.c	/^void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val)$/;"	f	typeref:typename:void
qrio_uprstreq	board/keymile/kmp204x/qrio.c	/^void qrio_uprstreq(u8 mode)$/;"	f	typeref:typename:void
qrio_wdmask	board/keymile/kmp204x/qrio.c	/^void qrio_wdmask(u8 bit, bool wden)$/;"	f	typeref:typename:void
qripnr	include/linux/immap_qe.h	/^	u32 qripnr;$/;"	m	struct:qe_ic	typeref:typename:u32
qrk_pci_read_config_dword	arch/x86/include/asm/arch-quark/quark.h	/^static inline void qrk_pci_read_config_dword(pci_dev_t dev, int offset,$/;"	f	typeref:typename:void
qrk_pci_write_config_dword	arch/x86/include/asm/arch-quark/quark.h	/^static inline void qrk_pci_write_config_dword(pci_dev_t dev, int offset,$/;"	f	typeref:typename:void
qrst	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 qrst;		\/* 0x64: EMC_QRST *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
qry	include/mtd/cfi_flash.h	/^	u8	qry[3];$/;"	m	struct:cfi_qry	typeref:typename:u8[3]
qsafe	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 qsafe;		\/* 0x68: EMC_QSAFE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
qsgmii	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} qsgmii[2];	\/* Lane A, B *\/$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0908[2]
qsgmii_configure_repeater	board/freescale/ls2080aqds/eth.c	/^static void qsgmii_configure_repeater(int dpmac)$/;"	f	typeref:typename:void	file:
qsgmii_port_electrical_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params qsgmii_port_electrical_config_params[] = {$/;"	v	typeref:struct:op_params[]
qsgmii_port_power_up_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params qsgmii_port_power_up_params[] = {$/;"	v	typeref:struct:op_params[]
qsgmii_port_speed_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params qsgmii_port_speed_config_params[] = {$/;"	v	typeref:struct:op_params[]
qsgmii_port_tx_config_params1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params qsgmii_port_tx_config_params1[] = {$/;"	v	typeref:struct:op_params[]
qsgmii_port_tx_config_params2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params qsgmii_port_tx_config_params2[] = {$/;"	v	typeref:struct:op_params[]
qsgmiiphy_fix	board/freescale/t4qds/eth.c	/^static u8 qsgmiiphy_fix[NUM_FM_PORTS] = {0};$/;"	v	typeref:typename:u8[]	file:
qsmcm	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct qsmcm {$/;"	s
qsmcm5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} qsmcm5xx_t;$/;"	t	typeref:struct:qsmcm
qsmcm_comdram	arch/powerpc/include/asm/5xx_immap.h	/^	u_char qsmcm_comdram[32];$/;"	m	struct:qsmcm	typeref:typename:u_char[32]
qsmcm_ddrqs	arch/powerpc/include/asm/5xx_immap.h	/^	u_char qsmcm_ddrqs;$/;"	m	struct:qsmcm	typeref:typename:u_char
qsmcm_portqs	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_portqs;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_pqspar	arch/powerpc/include/asm/5xx_immap.h	/^	u_char qsmcm_pqspar;$/;"	m	struct:qsmcm	typeref:typename:u_char
qsmcm_qdsci_il	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_qdsci_il;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_qsci1cr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_qsci1cr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_qsci1sr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_qsci1sr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_qsmcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_qsmcr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_qspi_il	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_qspi_il;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_qtest	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_qtest;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_recram	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_recram[32];$/;"	m	struct:qsmcm	typeref:typename:ushort[32]
qsmcm_sc1dr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_sc1dr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_sc1sr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_sc1sr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_sc2dr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_sc2dr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_sc2sr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_sc2sr;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_scc1r0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_scc1r0;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_scc1r1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_scc1r1;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_scc2r0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_scc2r0;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_scc2r1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_scc2r1;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_scrq	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_scrq[16];$/;"	m	struct:qsmcm	typeref:typename:ushort[16]
qsmcm_sctq	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_sctq[16];$/;"	m	struct:qsmcm	typeref:typename:ushort[16]
qsmcm_spcr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_spcr0;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_spcr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_spcr1;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_spcr2	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_spcr2;$/;"	m	struct:qsmcm	typeref:typename:ushort
qsmcm_spcr3	arch/powerpc/include/asm/5xx_immap.h	/^	u_char qsmcm_spcr3;$/;"	m	struct:qsmcm	typeref:typename:u_char
qsmcm_spsr	arch/powerpc/include/asm/5xx_immap.h	/^	u_char qsmcm_spsr;$/;"	m	struct:qsmcm	typeref:typename:u_char
qsmcm_tranram	arch/powerpc/include/asm/5xx_immap.h	/^	ushort qsmcm_tranram[32];$/;"	m	struct:qsmcm	typeref:typename:ushort[32]
qsort	lib/qsort.c	/^void qsort(void  *base,$/;"	f	typeref:typename:void
qspi	arch/arm/dts/am4372.dtsi	/^		qspi: qspi@47900000 {$/;"	l
qspi	arch/arm/dts/dra7.dtsi	/^		qspi: qspi@4b300000 {$/;"	l
qspi	arch/arm/dts/fsl-ls1012a.dtsi	/^		qspi: quadspi@1550000 {$/;"	l
qspi	arch/arm/dts/fsl-ls1043a.dtsi	/^		qspi: quadspi@1550000 {$/;"	l
qspi	arch/arm/dts/fsl-ls1046a.dtsi	/^		qspi: quadspi@1550000 {$/;"	l
qspi	arch/arm/dts/fsl-ls2080a.dtsi	/^	qspi: quadspi@1550000 {$/;"	l
qspi	arch/arm/dts/imx6ull.dtsi	/^			qspi: qspi@021e0000 {$/;"	l
qspi	arch/arm/dts/k2g.dtsi	/^		qspi: qspi@2940000 {$/;"	l
qspi	arch/arm/dts/ls1021a.dtsi	/^		qspi: quadspi@1550000 {$/;"	l
qspi	arch/arm/dts/socfpga.dtsi	/^		qspi: spi@ff705000 {$/;"	l
qspi	arch/arm/dts/stv0991.dts	/^	qspi: spi@80203000 {$/;"	l
qspi	arch/arm/dts/zynq-7000.dtsi	/^		qspi: spi@e000d000 {$/;"	l	label:amba
qspi	arch/arm/dts/zynqmp.dtsi	/^		qspi: spi@ff0f0000 {$/;"	l
qspi0	arch/arm/dts/at91-sama5d2_xplained.dts	/^			qspi0: spi@f0020000 {$/;"	l
qspi0	arch/arm/dts/sama5d2.dtsi	/^			qspi0: spi@f0020000 {$/;"	l
qspi0	arch/arm/dts/vf.dtsi	/^			qspi0: quadspi@40044000 {$/;"	l	label:aips0
qspi0_clk	arch/arm/dts/sama5d2.dtsi	/^					qspi0_clk: qspi0_clk@52 {$/;"	l
qspi1_clk	arch/arm/dts/sama5d2.dtsi	/^					qspi1_clk: qspi1_clk@53 {$/;"	l
qspi1_default	arch/arm/dts/am43x-epos-evm.dts	/^		qspi1_default: qspi1_default {$/;"	l
qspi1_pins	arch/arm/dts/dra7-evm.dts	/^	qspi1_pins: pinmux_qspi1_pins {$/;"	l
qspi_ahb_invalid	drivers/spi/fsl_qspi.c	/^static inline void qspi_ahb_invalid(struct fsl_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
qspi_ahb_read	drivers/spi/fsl_qspi.c	/^static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len)$/;"	f	typeref:typename:void	file:
qspi_calibrated_cs	drivers/spi/cadence_qspi.h	/^	unsigned int	qspi_calibrated_cs;$/;"	m	struct:cadence_spi_priv	typeref:typename:unsigned int
qspi_calibrated_hz	drivers/spi/cadence_qspi.h	/^	unsigned int	qspi_calibrated_hz;$/;"	m	struct:cadence_spi_priv	typeref:typename:unsigned int
qspi_cfg	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 qspi_cfg;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qspi_cfg	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 qspi_cfg;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qspi_cfg_smpr	drivers/spi/fsl_qspi.c	/^void qspi_cfg_smpr(struct fsl_qspi_priv *priv, u32 clear_bits, u32 set_bits)$/;"	f	typeref:typename:void
qspi_clk	arch/arm/dts/socfpga.dtsi	/^					qspi_clk: qspi_clk {$/;"	l
qspi_ctrl	arch/m68k/include/asm/coldfire/qspi.h	/^typedef struct qspi_ctrl {$/;"	s
qspi_enable_ddr_mode	drivers/spi/fsl_qspi.c	/^static void qspi_enable_ddr_mode(struct fsl_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
qspi_endian_xchg	drivers/spi/fsl_qspi.c	/^static inline u32 qspi_endian_xchg(u32 data)$/;"	f	typeref:typename:u32	file:
qspi_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 qspi_freq;		\/* offset 0x34 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
qspi_gfclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	qspi_gfclk_div: qspi_gfclk_div {$/;"	l
qspi_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	qspi_gfclk_mux: qspi_gfclk_mux {$/;"	l
qspi_init_ahb_read	drivers/spi/fsl_qspi.c	/^static void qspi_init_ahb_read(struct fsl_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
qspi_is_init	drivers/spi/cadence_qspi.h	/^	int		qspi_is_init;$/;"	m	struct:cadence_spi_priv	typeref:typename:int
qspi_module_disable	drivers/spi/fsl_qspi.c	/^void qspi_module_disable(struct fsl_qspi_priv *priv, u8 disable)$/;"	f	typeref:typename:void
qspi_op_erase	drivers/spi/fsl_qspi.c	/^static void qspi_op_erase(struct fsl_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
qspi_op_rdbank	drivers/spi/fsl_qspi.c	/^static void qspi_op_rdbank(struct fsl_qspi_priv *priv, u8 *rxbuf, u32 len)$/;"	f	typeref:typename:void	file:
qspi_op_rdid	drivers/spi/fsl_qspi.c	/^static void qspi_op_rdid(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len)$/;"	f	typeref:typename:void	file:
qspi_op_rdsr	drivers/spi/fsl_qspi.c	/^static void qspi_op_rdsr(struct fsl_qspi_priv *priv, void *rxbuf, u32 len)$/;"	f	typeref:typename:void	file:
qspi_op_read	drivers/spi/fsl_qspi.c	/^static void qspi_op_read(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len)$/;"	f	typeref:typename:void	file:
qspi_op_write	drivers/spi/fsl_qspi.c	/^static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len)$/;"	f	typeref:typename:void	file:
qspi_pin_mux	board/ti/am43xx/mux.c	/^static __maybe_unused struct module_pin_mux qspi_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
qspi_pins	arch/arm/dts/am437x-sk-evm.dts	/^	qspi_pins: qspi_pins {$/;"	l
qspi_pins_default	arch/arm/dts/am437x-idk-evm.dts	/^	qspi_pins_default: qspi_pins_default {$/;"	l
qspi_pins_sleep	arch/arm/dts/am437x-idk-evm.dts	/^	qspi_pins_sleep: qspi_pins_sleep{$/;"	l
qspi_read32	drivers/spi/fsl_qspi.c	/^static u32 qspi_read32(u32 flags, u32 *addr)$/;"	f	typeref:typename:u32	file:
qspi_regs	drivers/spi/tegra210_qspi.c	/^struct qspi_regs {$/;"	s	file:
qspi_set_lut	drivers/spi/fsl_qspi.c	/^static void qspi_set_lut(struct fsl_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
qspi_t	arch/m68k/include/asm/coldfire/qspi.h	/^} qspi_t;$/;"	t	typeref:struct:qspi_ctrl
qspi_write32	drivers/spi/fsl_qspi.c	/^static void qspi_write32(u32 flags, u32 *addr, u32 val)$/;"	f	typeref:typename:void	file:
qspi_xfer	drivers/spi/fsl_qspi.c	/^int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int bitlen,$/;"	f	typeref:typename:int
qspiclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int qspiclkctrl;       \/* offset 0x258 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
qspidata	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	qspidata;$/;"	m	struct:nic301_registers	typeref:typename:u32
qspidata_ahb_cntl	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	qspidata_ahb_cntl;$/;"	m	struct:nic301_registers	typeref:typename:u32
qspidata_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	qspidata_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
qspidqscr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 qspidqscr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
qstr	fs/ubifs/ubifs.h	/^struct qstr {$/;"	s
qt_altnext	drivers/usb/host/ehci.h	/^	uint32_t qt_altnext;			\/* see EHCI 3.5.2 *\/$/;"	m	struct:qTD	typeref:typename:uint32_t
qt_buffer	drivers/usb/host/ehci.h	/^	uint32_t qt_buffer[QT_BUFFER_CNT];	\/* see EHCI 3.5.4 *\/$/;"	m	struct:qTD	typeref:typename:uint32_t[]
qt_buffer_hi	drivers/usb/host/ehci.h	/^	uint32_t qt_buffer_hi[QT_BUFFER_CNT];	\/* Appendix B *\/$/;"	m	struct:qTD	typeref:typename:uint32_t[]
qt_next	drivers/usb/host/ehci.h	/^	uint32_t qt_next;			\/* see EHCI 3.5.1 *\/$/;"	m	struct:qTD	typeref:typename:uint32_t
qt_token	drivers/usb/host/ehci.h	/^	uint32_t qt_token;			\/* see EHCI 3.5.3 *\/$/;"	m	struct:qTD	typeref:typename:uint32_t
quad_rank_present	include/fsl_ddr_sdram.h	/^	unsigned int quad_rank_present;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
quad_serdes_reset	include/gdsys_fpga.h	/^	u16 quad_serdes_reset;	\/* 0x0012 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
quadspi_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static iomux_v3_cfg_t const quadspi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
quadspi_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const quadspi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
quadspi_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const quadspi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
quadspi_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const quadspi_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
qualifier_descriptor	drivers/serial/usbtty.c	/^static struct usb_qualifier_descriptor qualifier_descriptor = {$/;"	v	typeref:struct:usb_qualifier_descriptor	file:
qualifier_descriptor	include/usbdevice.h	/^	struct usb_qualifier_descriptor *qualifier_descriptor;$/;"	m	struct:usb_device_instance	typeref:struct:usb_qualifier_descriptor *
quantifier	lib/slre.c	/^quantifier(struct slre *r, int prev, int op)$/;"	f	typeref:typename:void	file:
quark_enable_legacy_seg	arch/x86/cpu/quark/quark.c	/^static void quark_enable_legacy_seg(void)$/;"	f	typeref:typename:void	file:
quark_irq_router_ids	arch/x86/cpu/quark/irq.c	/^static const struct udevice_id quark_irq_router_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
quark_irq_router_probe	arch/x86/cpu/quark/irq.c	/^int quark_irq_router_probe(struct udevice *dev)$/;"	f	typeref:typename:int
quark_pcie_early_init	arch/x86/cpu/quark/quark.c	/^static void quark_pcie_early_init(void)$/;"	f	typeref:typename:void	file:
quark_pcie_init	arch/x86/cpu/quark/quark.c	/^static void quark_pcie_init(void)$/;"	f	typeref:typename:void	file:
quark_rcba	arch/x86/include/asm/arch-quark/quark.h	/^struct quark_rcba {$/;"	s
quark_setup_bars	arch/x86/cpu/quark/quark.c	/^static void quark_setup_bars(void)$/;"	f	typeref:typename:void	file:
quark_setup_mtrr	arch/x86/cpu/quark/quark.c	/^static void quark_setup_mtrr(void)$/;"	f	typeref:typename:void	file:
quark_thermal_early_init	arch/x86/cpu/quark/quark.c	/^static void quark_thermal_early_init(void)$/;"	f	typeref:typename:void	file:
quark_usb_early_init	arch/x86/cpu/quark/quark.c	/^static void quark_usb_early_init(void)$/;"	f	typeref:typename:void	file:
quark_usb_init	arch/x86/cpu/quark/quark.c	/^static void quark_usb_init(void)$/;"	f	typeref:typename:void	file:
queensbay_irq_router_ids	arch/x86/cpu/queensbay/irq.c	/^static const struct udevice_id queensbay_irq_router_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
queensbay_irq_router_probe	arch/x86/cpu/queensbay/irq.c	/^int queensbay_irq_router_probe(struct udevice *dev)$/;"	f	typeref:typename:int
query_abi	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_thermal_query_abi_request query_abi;$/;"	m	union:mrq_thermal_host_to_bpmp_request::__anonb38d4241070a	typeref:struct:cmd_thermal_query_abi_request
query_block_fn	fs/yaffs2/yaffs_guts.h	/^	int (*query_block_fn) (struct yaffs_dev *dev, int block_no,$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int block_no,enum yaffs_block_state * state,u32 * seq_number)
query_capsule_caps	include/efi_api.h	/^	void *query_capsule_caps;$/;"	m	struct:efi_runtime_services	typeref:typename:void *
query_delay	include/usb.h	/^	ulong query_delay;		\/* Device query delay in ms *\/$/;"	m	struct:usb_hub_device	typeref:typename:ulong
query_sdram_size	arch/arm/mach-tegra/board.c	/^static phys_size_t query_sdram_size(void)$/;"	f	typeref:typename:phys_size_t	file:
query_variable_info	include/efi_api.h	/^	void *query_variable_info;$/;"	m	struct:efi_runtime_services	typeref:typename:void *
queue	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct qm_reg_queue *queue;	\/* management region	*\/$/;"	m	struct:qm_config	typeref:struct:qm_reg_queue *
queue	drivers/usb/gadget/at91_udc.h	/^	struct list_head		queue;$/;"	m	struct:at91_ep	typeref:struct:list_head
queue	drivers/usb/gadget/at91_udc.h	/^	struct list_head		queue;$/;"	m	struct:at91_request	typeref:struct:list_head
queue	drivers/usb/gadget/atmel_usba_udc.h	/^	struct list_head			queue;$/;"	m	struct:usba_ep	typeref:struct:list_head
queue	drivers/usb/gadget/atmel_usba_udc.h	/^	struct list_head			queue;$/;"	m	struct:usba_request	typeref:struct:list_head
queue	drivers/usb/gadget/ci_udc.h	/^	struct list_head	queue;$/;"	m	struct:ci_req	typeref:struct:list_head
queue	drivers/usb/gadget/ci_udc.h	/^	struct list_head queue;$/;"	m	struct:ci_ep	typeref:struct:list_head
queue	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct list_head queue;$/;"	m	struct:dwc2_ep	typeref:struct:list_head
queue	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct list_head queue;$/;"	m	struct:dwc2_request	typeref:struct:list_head
queue	drivers/usb/gadget/fotg210.c	/^	struct list_head                      queue;$/;"	m	struct:fotg210_ep	typeref:struct:list_head	file:
queue	drivers/usb/gadget/fotg210.c	/^	struct list_head   queue;$/;"	m	struct:fotg210_request	typeref:struct:list_head	file:
queue	drivers/usb/gadget/pxa25x_udc.h	/^	struct list_head			queue;$/;"	m	struct:pxa25x_ep	typeref:struct:list_head
queue	drivers/usb/gadget/pxa25x_udc.h	/^	struct list_head			queue;$/;"	m	struct:pxa25x_request	typeref:struct:list_head
queue	include/linux/usb/gadget.h	/^	int (*queue) (struct usb_ep *ep, struct usb_request *req,$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep,struct usb_request * req,gfp_t gfp_flags)
queue_attr	include/fsl-mc/fsl_dpni.h	/^	struct dpni_queue_attr	queue_attr;$/;"	m	struct:dpni_tx_conf_attr	typeref:struct:dpni_queue_attr
queue_cfg	include/fsl-mc/fsl_dpni.h	/^	struct dpni_queue_cfg	queue_cfg;$/;"	m	struct:dpni_tx_conf_cfg	typeref:struct:dpni_queue_cfg
queue_close	drivers/dma/keystone_nav.c	/^void queue_close(u32 qnum)$/;"	f	typeref:typename:void
queue_depth	drivers/block/fsl_sata.h	/^	int		queue_depth;		\/* Max NCQ queue depth *\/$/;"	m	struct:fsl_sata	typeref:typename:int
queue_depth	drivers/block/sata_mv.c	/^	u32 queue_depth;$/;"	m	struct:mv_priv	typeref:typename:u32	file:
queue_depth	include/ata.h	/^	unsigned short  queue_depth;	\/*  *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
queue_start_addr	drivers/net/dm9000x.c	/^	u16 queue_start_addr;$/;"	m	struct:board_info	typeref:typename:u16	file:
queue_trb	drivers/usb/host/xhci-ring.c	/^static struct xhci_generic_trb *queue_trb(struct xhci_ctrl *ctrl,$/;"	f	typeref:struct:xhci_generic_trb *	file:
queued	drivers/usb/dwc3/core.h	/^	unsigned		queued:1;$/;"	m	struct:dwc3_request	typeref:typename:unsigned:1
queuesize	drivers/usb/host/ohci-hcd.c	/^	int queuesize;$/;"	m	struct:int_queue	typeref:typename:int	file:
quick_pit_calibrate	drivers/timer/tsc_timer.c	/^static unsigned long __maybe_unused quick_pit_calibrate(void)$/;"	f	typeref:typename:unsigned long __maybe_unused	file:
quick_ram_check	arch/x86/lib/ramtest.c	/^void quick_ram_check(void)$/;"	f	typeref:typename:void
quickhex	arch/powerpc/cpu/mpc5xx/spi.c	/^static char quickhex (int i)$/;"	f	typeref:typename:char	file:
quickhex	arch/powerpc/cpu/mpc8260/spi.c	/^static char quickhex (int i)$/;"	f	typeref:typename:char	file:
quickhex	arch/powerpc/cpu/mpc8xx/spi.c	/^static char quickhex (int i)$/;"	f	typeref:typename:char	file:
quiet	Makefile	/^  quiet =$/;"	m
quiet	Makefile	/^  quiet=quiet_$/;"	m
quiet	Makefile	/^  quiet=silent_$/;"	m
quiet	include/nand.h	/^	int quiet;		\/* don't display progress messages *\/$/;"	m	struct:nand_erase_options	typeref:typename:int
quiet	tools/imagetool.h	/^	bool quiet;		\/* Don't output text in normal operation *\/$/;"	m	struct:image_tool_params	typeref:typename:bool
quiet_cmd_cat	Makefile	/^quiet_cmd_cat = CAT     $@$/;"	m
quiet_cmd_cc_eth-raw-os.o	arch/sandbox/cpu/Makefile	/^quiet_cmd_cc_eth-raw-os.o = CC $(quiet_modtag)  $@$/;"	m
quiet_cmd_cc_os.o	arch/sandbox/cpu/Makefile	/^quiet_cmd_cc_os.o = CC $(quiet_modtag)  $@$/;"	m
quiet_cmd_copy	Makefile	/^quiet_cmd_copy = COPY    $@$/;"	m
quiet_cmd_cpp_cfg	Makefile	/^quiet_cmd_cpp_cfg = CFG     $@$/;"	m
quiet_cmd_cpp_cfg	arch/arm/imx-common/Makefile	/^quiet_cmd_cpp_cfg = CFGS    $@$/;"	m
quiet_cmd_cpp_lds	Makefile	/^quiet_cmd_cpp_lds = LDS     $@$/;"	m
quiet_cmd_crosstools_strip	tools/Makefile	/^quiet_cmd_crosstools_strip = STRIP   $^$/;"	m
quiet_cmd_crosstools_strip	tools/env/Makefile	/^quiet_cmd_crosstools_strip = STRIP   $^$/;"	m
quiet_cmd_db2html	doc/DocBook/Makefile	/^quiet_cmd_db2html = HTML    $@$/;"	m
quiet_cmd_db2man	doc/DocBook/Makefile	/^quiet_cmd_db2man = MAN     $@$/;"	m
quiet_cmd_db2pdf	doc/DocBook/Makefile	/^quiet_cmd_db2pdf = PDF     $@$/;"	m
quiet_cmd_db2ps	doc/DocBook/Makefile	/^quiet_cmd_db2ps = PS      $@$/;"	m
quiet_cmd_docproc	doc/DocBook/Makefile	/^quiet_cmd_docproc = DOCPROC $@$/;"	m
quiet_cmd_efipayload	Makefile	/^quiet_cmd_efipayload = OBJCOPY $@$/;"	m
quiet_cmd_fig2eps	doc/DocBook/Makefile	/^quiet_cmd_fig2eps = FIG2EPS $@$/;"	m
quiet_cmd_fig2png	doc/DocBook/Makefile	/^quiet_cmd_fig2png = FIG2PNG $@$/;"	m
quiet_cmd_ifdtool	Makefile	/^quiet_cmd_ifdtool = IFDTOOL $@$/;"	m
quiet_cmd_ldr	Makefile	/^quiet_cmd_ldr = LD      $@$/;"	m
quiet_cmd_link_demo	examples/api/Makefile	/^quiet_cmd_link_demo = LD      $@$/;"	m
quiet_cmd_link_elf	examples/standalone/Makefile	/^quiet_cmd_link_elf = LD      $@$/;"	m
quiet_cmd_link_init	arch/blackfin/cpu/Makefile	/^quiet_cmd_link_init = LD      $@$/;"	m
quiet_cmd_link_lib	examples/standalone/Makefile	/^quiet_cmd_link_lib = LD      $@$/;"	m
quiet_cmd_mkalign_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^quiet_cmd_mkalign_mxs = MXSALGN $@$/;"	m
quiet_cmd_mkcsfreq_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^quiet_cmd_mkcsfreq_mxs = MXSCSFR $@$/;"	m
quiet_cmd_mkcst_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^quiet_cmd_mkcst_mxs = MXSCST  $@$/;"	m
quiet_cmd_mkimage	Makefile	/^quiet_cmd_mkimage = MKIMAGE $@$/;"	m
quiet_cmd_mkivt_mxs	arch/arm/cpu/arm926ejs/mxs/Makefile	/^quiet_cmd_mkivt_mxs = MXSIVT  $@$/;"	m
quiet_cmd_mkomapsecimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^quiet_cmd_mkomapsecimg = MKIMAGE $@$/;"	m
quiet_cmd_moc	scripts/kconfig/Makefile	/^quiet_cmd_moc = MOC     $@$/;"	m
quiet_cmd_objcopy	Makefile	/^quiet_cmd_objcopy = OBJCOPY $@$/;"	m
quiet_cmd_omapsecureimg	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^quiet_cmd_omapsecureimg = SECURE  $@$/;"	m
quiet_cmd_pad_cat	Makefile	/^quiet_cmd_pad_cat = CAT     $@$/;"	m
quiet_cmd_pad_cat	arch/arm/imx-common/Makefile	/^quiet_cmd_pad_cat = CAT     $@$/;"	m
quiet_cmd_rmdirs	Makefile	/^quiet_cmd_rmdirs = $(if $(wildcard $(rm-dirs)),CLEAN   $(wildcard $(rm-dirs)))$/;"	m
quiet_cmd_rmfiles	Makefile	/^quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN   $(wildcard $(rm-files)))$/;"	m
quiet_cmd_smap	Makefile	/^quiet_cmd_smap = GEN     common\/system_map.o$/;"	m
quiet_cmd_socboot	Makefile	/^quiet_cmd_socboot = SOCBOOT $@$/;"	m
quiet_cmd_sym	Makefile	/^quiet_cmd_sym ?= SYM     $@$/;"	m
quiet_cmd_u-boot-nand-spl_imx	arch/arm/imx-common/Makefile	/^quiet_cmd_u-boot-nand-spl_imx = GEN     $@$/;"	m
quiet_cmd_u-boot__	Makefile	/^quiet_cmd_u-boot__ ?= LD      $@$/;"	m
quiet_cmd_u-boot_payload	Makefile	/^quiet_cmd_u-boot_payload ?= LD      $@$/;"	m
quiet_cmd_wrap	tools/Makefile	/^quiet_cmd_wrap = WRAP    $@$/;"	m
quiet_cmd_zobjcopy	Makefile	/^quiet_cmd_zobjcopy = OBJCOPY $@$/;"	m
quiet_gen_xml	doc/DocBook/Makefile	/^ quiet_gen_xml = echo '  GEN     $@'$/;"	m
quirk_ep_out_aligned_size	include/linux/usb/gadget.h	/^	unsigned			quirk_ep_out_aligned_size:1;$/;"	m	struct:usb_gadget	typeref:typename:unsigned:1
quirks	drivers/input/i8042.c	/^	int quirks;	\/* quirks that we support *\/$/;"	m	struct:i8042_kbd_priv	typeref:typename:int	file:
quirks	drivers/mmc/sh_sdhi.c	/^	unsigned long quirks;$/;"	m	struct:sh_sdhi_host	typeref:typename:unsigned long	file:
quirks	include/dwmmc.h	/^	unsigned int quirks;$/;"	m	struct:dwmci_host	typeref:typename:unsigned int
quirks	include/sdhci.h	/^	unsigned int quirks;$/;"	m	struct:sdhci_host	typeref:typename:unsigned int
quit1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="quit1">$/;"	i
quot	board/mpl/mip405/mip405.c	/^	long int quot;		\/* Quotient	*\/$/;"	m	struct:__anon0274db920108	typeref:typename:long int	file:
quot	board/mpl/pip405/pip405.c	/^	long int quot;		\/* Quotient *\/$/;"	m	struct:__anonb110a3780108	typeref:typename:long int	file:
quot	disk/part_mac.c	/^	long int quot;		\/* Quotient	*\/$/;"	m	struct:__anon2bd24a970108	typeref:typename:long int	file:
quot	include/inttypes.h	/^	long int quot;		\/* Quotient.  *\/$/;"	m	struct:__anon62f7df8e0108	typeref:typename:long int
quot	include/inttypes.h	/^	long long int quot;		\/* Quotient.  *\/$/;"	m	struct:__anon62f7df8e0208	typeref:typename:long long int
quot	lib/ldiv.c	/^	long    quot;$/;"	m	struct:__anon478c5e8b0108	typeref:typename:long	file:
quota_read	fs/ubifs/ubifs.h	/^	ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t);$/;"	m	struct:super_operations	typeref:typename:ssize_t (*)(struct super_block *,int,char *,size_t,loff_t)
quota_write	fs/ubifs/ubifs.h	/^	ssize_t (*quota_write)(struct super_block *, int, const char *, size_t, loff_t);$/;"	m	struct:super_operations	typeref:typename:ssize_t (*)(struct super_block *,int,const char *,size_t,loff_t)
quote	common/cli_hush.c	/^	int quote;$/;"	m	struct:__anon62a9299d0508	typeref:typename:int	file:
quse	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 quse;		\/* 0x60: EMC_QUSE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
quse_extra	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 quse_extra;		\/* 0xAC: EMC_QUSE_EXTRA *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
qwr	drivers/spi/cf_qspi.c	/^	u16 qwr;		\/* QWR: Queued Wrap Register *\/$/;"	m	struct:cf_qspi_slave	typeref:typename:u16	file:
qxttbc	drivers/net/mvgbe.h	/^	u32 qxttbc;$/;"	m	struct:mvgbe_tqx	typeref:typename:u32
r	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG r[26];	\/* r0 - r25 *\/$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG[26]
r	arch/powerpc/include/asm/mmu.h	/^	unsigned long r:1;	\/* Referenced *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
r	drivers/misc/cros_ec.c	/^		struct ec_response_i2c_passthru r;$/;"	m	union:cros_ec_i2c_tunnel::__anon08366d3d030a	typeref:struct:ec_response_i2c_passthru	file:
r	drivers/spmi/spmi-sandbox.c	/^	struct sandbox_emul_fake_regs r[EMUL_GPIO_REG_END + 1];$/;"	m	struct:sandbox_emul_gpio	typeref:struct:sandbox_emul_fake_regs[]	file:
r	drivers/usb/gadget/at91_udc.c	/^	struct usb_ctrlrequest	r;$/;"	m	union:setup	typeref:struct:usb_ctrlrequest	file:
r	drivers/usb/gadget/pxa25x_udc.c	/^		struct usb_ctrlrequest	r;$/;"	m	union:handle_ep0::__anon3e9922fb010a	typeref:struct:usb_ctrlrequest	file:
r	fs/jffs2/summary.h	/^	struct jffs2_sum_xref_flash r;$/;"	m	union:jffs2_sum_flash	typeref:struct:jffs2_sum_xref_flash
r	fs/jffs2/summary.h	/^	struct jffs2_sum_xref_mem r;$/;"	m	union:jffs2_sum_mem	typeref:struct:jffs2_sum_xref_mem
r	include/ec_commands.h	/^	uint8_t r, g, b;$/;"	m	struct:rgb_s	typeref:typename:uint8_t
r	tools/easylogo/easylogo.c	/^	unsigned char b, g, r;$/;"	m	struct:__anonbf0fd82b0308	typeref:typename:unsigned char	file:
r	tools/easylogo/easylogo.c	/^	unsigned char r, g, b;$/;"	m	struct:__anonbf0fd82b0208	typeref:typename:unsigned char	file:
r0	arch/arc/include/asm/ptrace.h	/^	long r0;$/;"	m	struct:pt_regs	typeref:typename:long
r0	arch/avr32/include/asm/processor.h	/^	unsigned long r0;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r0	arch/avr32/include/asm/ptrace.h	/^	unsigned long r0;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r0	arch/blackfin/cpu/interrupt.S	/^	r0 = [p4 + (deferred_regs_IMASK * 4)];$/;"	d
r0	arch/blackfin/cpu/interrupt.S	/^	r0 = [p4 + (deferred_regs_SYSCFG * 4)];$/;"	d
r0	arch/blackfin/cpu/interrupt.S	/^	r0 = [p4 + (deferred_regs_retx * 4)];$/;"	d
r0	arch/blackfin/cpu/interrupt.S	/^	r0 = sp;	\/* stack frame pt_regs pointer argument ==> r0 *\/$/;"	d
r0	arch/blackfin/cpu/start.S	/^	r0 = 0 (x);	\/* set bootstruct to NULL *\/$/;"	d
r0	arch/blackfin/cpu/start.S	/^	r0 = 0;$/;"	d
r0	arch/blackfin/cpu/start.S	/^	r0 = p3;$/;"	d
r0	arch/blackfin/cpu/start.S	/^	r0 = r4;$/;"	d
r0	arch/blackfin/cpu/start.S	/^	r0 = r7;$/;"	d
r0	arch/blackfin/cpu/start.S	/^	r0 = rets;$/;"	d
r0	arch/blackfin/include/asm/ptrace.h	/^	long r0;$/;"	m	struct:pt_regs	typeref:typename:long
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = A0.w;	[p0 + 0x4C] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = A1.w;	[p0 + 0x54] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = ASTAT;	[p0 + 0x40] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = LC0;	[p0 + 0x44] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = LC1;	[p0 + 0x48] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = RETS;	[p0 + 0x9C] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [SP++];	\/* Load P0 into R0 *\/$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x00];$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x20];$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x40];	ASTAT = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x44];	LC0 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x48];	LC1 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x4C];	A0.w = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x50];	A0.x = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x54];	A1.w = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x58];	A1.x = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x5C];	i0 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x60];	i1 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x64];	i2 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x68];	i3 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x6C];	m0 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x70];	m1 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x74];	m2 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x78];	m3 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x7C];	l0 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x80];	l1 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x84];	l2 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x88];	l3 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x8C];	b0 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x90];	b1 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x94];	b2 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x98];	b3 = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [p0 + 0x9C];	RETS = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = [sp++];$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = b0;	[p0 + 0x8C] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = b1;	[p0 + 0x90] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = b2;	[p0 + 0x94] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = b3;	[p0 + 0x98] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = i0;	[p0 + 0x5C] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = i1;	[p0 + 0x60] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = i2;	[p0 + 0x64] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = i3;	[p0 + 0x68] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = l0;	[p0 + 0x7C] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = l1;	[p0 + 0x80] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = l2;	[p0 + 0x84] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = l3;	[p0 + 0x88] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = m0;	[p0 + 0x6C] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = m1;	[p0 + 0x70] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = m2;	[p0 + 0x74] = r0;$/;"	d
r0	arch/blackfin/lib/__kgdb.S	/^	r0 = m3;	[p0 + 0x78] = r0;$/;"	d
r0	common/fdt_support.c	/^	unsigned int r0;$/;"	m	struct:reg_cell	typeref:typename:unsigned int	file:
r0size	arch/arm/include/asm/arch-sunxi/tzpc.h	/^	u32 r0size;		\/* 0x00 Size of secure RAM region *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
r0size	arch/arm/include/asm/arch/tzpc.h	/^	u32 r0size;		\/* 0x00 Size of secure RAM region *\/$/;"	m	struct:sunxi_tzpc	typeref:typename:u32
r0size	arch/arm/mach-exynos/include/mach/tzpc.h	/^	unsigned int r0size;$/;"	m	struct:exynos_tzpc	typeref:typename:unsigned int
r1	arch/arc/include/asm/ptrace.h	/^	long r1;$/;"	m	struct:pt_regs	typeref:typename:long
r1	arch/avr32/include/asm/processor.h	/^	unsigned long r1;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r1	arch/avr32/include/asm/ptrace.h	/^	unsigned long r1;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r1	arch/blackfin/cpu/interrupt.S	/^	r1 = 3;		\/* EVT3 space *\/$/;"	d
r1	arch/blackfin/cpu/interrupt.S	/^	r1 = 5;	\/* EVT5 space *\/$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = 0 (x);$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = WDDIS;$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = WDEN;$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = r1 + r5;	\/* ... to current (not load) address of initcode *\/$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = r1 - r4;	\/* convert r1 from load address of initcode ... *\/$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = r5;$/;"	d
r1	arch/blackfin/cpu/start.S	/^	r1 = r6;$/;"	d
r1	arch/blackfin/include/asm/ptrace.h	/^	long r1;$/;"	m	struct:pt_regs	typeref:typename:long
r1	arch/blackfin/lib/__kgdb.S	/^	r1 = [p0 + 0x24];$/;"	d
r1	common/fdt_support.c	/^	unsigned int r1;$/;"	m	struct:reg_cell	typeref:typename:unsigned int	file:
r10	arch/arc/include/asm/ptrace.h	/^	long r10;$/;"	m	struct:pt_regs	typeref:typename:long
r10	arch/avr32/include/asm/ptrace.h	/^	unsigned long r10;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r11	arch/arc/include/asm/ptrace.h	/^	long r11;$/;"	m	struct:pt_regs	typeref:typename:long
r11	arch/avr32/include/asm/ptrace.h	/^	unsigned long r11;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r12	arch/arc/include/asm/ptrace.h	/^	long r12;$/;"	m	struct:pt_regs	typeref:typename:long
r12	arch/avr32/include/asm/ptrace.h	/^	unsigned long r12;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r12_orig	arch/avr32/include/asm/ptrace.h	/^	unsigned long r12_orig;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r13	arch/arc/include/asm/ptrace.h	/^	long r13;$/;"	m	struct:pt_regs	typeref:typename:long
r14	arch/arc/include/asm/ptrace.h	/^	long r14;$/;"	m	struct:pt_regs	typeref:typename:long
r15	arch/arc/include/asm/ptrace.h	/^	long r15;$/;"	m	struct:pt_regs	typeref:typename:long
r16	arch/arc/include/asm/ptrace.h	/^	long r16;$/;"	m	struct:pt_regs	typeref:typename:long
r17	arch/arc/include/asm/ptrace.h	/^	long r17;$/;"	m	struct:pt_regs	typeref:typename:long
r18	arch/arc/include/asm/ptrace.h	/^	long r18;$/;"	m	struct:pt_regs	typeref:typename:long
r19	arch/arc/include/asm/ptrace.h	/^	long r19;$/;"	m	struct:pt_regs	typeref:typename:long
r2	arch/arc/include/asm/ptrace.h	/^	long r2;$/;"	m	struct:pt_regs	typeref:typename:long
r2	arch/avr32/include/asm/processor.h	/^	unsigned long r2;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r2	arch/avr32/include/asm/ptrace.h	/^	unsigned long r2;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r2	arch/blackfin/include/asm/ptrace.h	/^	long r2;$/;"	m	struct:pt_regs	typeref:typename:long
r2	arch/blackfin/lib/__kgdb.S	/^	r2 = [p0 + 0x28];$/;"	d
r20	arch/arc/include/asm/ptrace.h	/^	long r20;$/;"	m	struct:pt_regs	typeref:typename:long
r20	include/tsi148.h	/^	unsigned int r20[14];                 \/* 0x548 - 0x57c *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[14]
r21	arch/arc/include/asm/ptrace.h	/^	long r21;$/;"	m	struct:pt_regs	typeref:typename:long
r21	include/tsi148.h	/^	unsigned int r21[14];                 \/* 0x5c8 - 0x5fc *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[14]
r22	arch/arc/include/asm/ptrace.h	/^	long r22;$/;"	m	struct:pt_regs	typeref:typename:long
r22	include/tsi148.h	/^	unsigned int r22[629];                \/* 0x620 - 0xff0 *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[629]
r23	arch/arc/include/asm/ptrace.h	/^	long r23;$/;"	m	struct:pt_regs	typeref:typename:long
r24	arch/arc/include/asm/ptrace.h	/^	long r24;$/;"	m	struct:pt_regs	typeref:typename:long
r25	arch/arc/include/asm/ptrace.h	/^	long r25;$/;"	m	struct:pt_regs	typeref:typename:long
r26	arch/arc/include/asm/ptrace.h	/^	long r26;	\/* gp *\/$/;"	m	struct:pt_regs	typeref:typename:long
r2p	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 r2p;		\/* 0x44: EMC_R2P *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
r2w	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 r2w;		\/* 0x3C: EMC_R2W *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
r3	arch/arc/include/asm/ptrace.h	/^	long r3;$/;"	m	struct:pt_regs	typeref:typename:long
r3	arch/avr32/include/asm/processor.h	/^	unsigned long r3;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r3	arch/avr32/include/asm/ptrace.h	/^	unsigned long r3;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r3	arch/blackfin/cpu/start.S	/^	r3 = 0x0;$/;"	d
r3	arch/blackfin/cpu/start.S	/^	r3 = r1 - r4;$/;"	d
r3	arch/blackfin/include/asm/ptrace.h	/^	long r3;$/;"	m	struct:pt_regs	typeref:typename:long
r3	arch/blackfin/lib/__kgdb.S	/^	r3 = [p0 + 0x2C];$/;"	d
r3z	arch/arc/lib/strcpy-700.S	/^r3z:	bmsk.f	%r1, %r3, 7$/;"	l
r3z	arch/arc/lib/strcpy-700.S	/^r3z:	lsr.f	%r1, %r3, 24$/;"	l
r4	arch/arc/include/asm/ptrace.h	/^	long r4;$/;"	m	struct:pt_regs	typeref:typename:long
r4	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long r4;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
r4	arch/arm/mach-at91/spl.c	/^	u32	r4;$/;"	m	struct:__anon9379ac550108	typeref:typename:u32	file:
r4	arch/avr32/include/asm/processor.h	/^	unsigned long r4;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r4	arch/avr32/include/asm/ptrace.h	/^	unsigned long r4;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r4	arch/blackfin/include/asm/ptrace.h	/^	long r4;$/;"	m	struct:pt_regs	typeref:typename:long
r4	arch/blackfin/lib/__kgdb.S	/^	r4 = [p0 + 0x30];$/;"	d
r5	arch/arc/include/asm/ptrace.h	/^	long r5;$/;"	m	struct:pt_regs	typeref:typename:long
r5	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long r5;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
r5	arch/avr32/include/asm/processor.h	/^	unsigned long r5;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r5	arch/avr32/include/asm/ptrace.h	/^	unsigned long r5;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r5	arch/blackfin/cpu/start.S	/^	r5 = r0 - r3;$/;"	d
r5	arch/blackfin/include/asm/ptrace.h	/^	long r5;$/;"	m	struct:pt_regs	typeref:typename:long
r5	arch/blackfin/lib/__kgdb.S	/^	r5 = [p0 + 0x34];$/;"	d
r6	arch/arc/include/asm/ptrace.h	/^	long r6;$/;"	m	struct:pt_regs	typeref:typename:long
r6	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long r6;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
r6	arch/avr32/include/asm/processor.h	/^	unsigned long r6;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r6	arch/avr32/include/asm/ptrace.h	/^	unsigned long r6;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r6	arch/blackfin/cpu/interrupt.S	/^	r6 = 0x3f;$/;"	d
r6	arch/blackfin/cpu/interrupt.S	/^	r6 = SYSCFG;$/;"	d
r6	arch/blackfin/cpu/interrupt.S	/^	r6 = [p4 + (DCPLB_FAULT_ADDR - COREMMR_BASE)];$/;"	d
r6	arch/blackfin/cpu/interrupt.S	/^	r6 = [p4 + (ICPLB_FAULT_ADDR - COREMMR_BASE)];$/;"	d
r6	arch/blackfin/cpu/interrupt.S	/^	r6 = retx;$/;"	d
r6	arch/blackfin/cpu/start.S	/^	r6 = 0 (x);$/;"	d
r6	arch/blackfin/cpu/start.S	/^	r6 = 1 (x);	\/* fake loaded_from_ldr = 1 *\/$/;"	d
r6	arch/blackfin/cpu/start.S	/^	r6 = 1 (x);$/;"	d
r6	arch/blackfin/include/asm/ptrace.h	/^	long r6;$/;"	m	struct:pt_regs	typeref:typename:long
r6	arch/blackfin/lib/__kgdb.S	/^	r6 = [p0 + 0x38];$/;"	d
r64bcl	include/tsi148.h	/^	unsigned int r64bcl;                  \/* 0x434         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
r64bcu	include/tsi148.h	/^	unsigned int r64bcu;                  \/* 0x430         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
r7	arch/arc/include/asm/ptrace.h	/^	long r7;$/;"	m	struct:pt_regs	typeref:typename:long
r7	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long r7;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
r7	arch/avr32/include/asm/processor.h	/^	unsigned long r7;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
r7	arch/avr32/include/asm/ptrace.h	/^	unsigned long r7;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r7	arch/blackfin/cpu/start.S	/^	r7 = EVT_IVG15 (z);$/;"	d
r7	arch/blackfin/cpu/start.S	/^	r7 = RETX;$/;"	d
r7	arch/blackfin/include/asm/ptrace.h	/^	long r7;$/;"	m	struct:pt_regs	typeref:typename:long
r7	arch/blackfin/lib/__kgdb.S	/^	r7 = [p0 + 0x3C];$/;"	d
r8	arch/arc/include/asm/ptrace.h	/^	long r8;$/;"	m	struct:pt_regs	typeref:typename:long
r8	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long r8;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
r8	arch/avr32/include/asm/ptrace.h	/^	unsigned long r8;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
r8152	drivers/usb/eth/r8152.h	/^struct r8152 {$/;"	s
r8152_dongle	drivers/usb/eth/r8152.c	/^struct r8152_dongle {$/;"	s	file:
r8152_dongles	drivers/usb/eth/r8152.c	/^static const struct r8152_dongle const r8152_dongles[] = {$/;"	v	typeref:typename:const struct r8152_dongle const[]	file:
r8152_eth_before_probe	drivers/usb/eth/r8152.c	/^void r8152_eth_before_probe(void)$/;"	f	typeref:typename:void
r8152_eth_get_info	drivers/usb/eth/r8152.c	/^int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss,$/;"	f	typeref:typename:int
r8152_eth_id_table	drivers/usb/eth/r8152.c	/^static const struct usb_device_id r8152_eth_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
r8152_eth_ops	drivers/usb/eth/r8152.c	/^static const struct eth_ops r8152_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
r8152_eth_probe	drivers/usb/eth/r8152.c	/^int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum,$/;"	f	typeref:typename:int
r8152_eth_probe	drivers/usb/eth/r8152.c	/^static int r8152_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
r8152_eth_recv	drivers/usb/eth/r8152.c	/^int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
r8152_eth_send	drivers/usb/eth/r8152.c	/^int r8152_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
r8152_eth_start	drivers/usb/eth/r8152.c	/^static int r8152_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
r8152_eth_stop	drivers/usb/eth/r8152.c	/^void r8152_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void
r8152_free_pkt	drivers/usb/eth/r8152.c	/^static int r8152_free_pkt(struct udevice *dev, uchar *packet, int packet_len)$/;"	f	typeref:typename:int	file:
r8152_halt	drivers/usb/eth/r8152.c	/^static void r8152_halt(struct eth_device *eth)$/;"	f	typeref:typename:void	file:
r8152_init	drivers/usb/eth/r8152.c	/^static int r8152_init(struct eth_device *eth, bd_t *bd)$/;"	f	typeref:typename:int	file:
r8152_init_common	drivers/usb/eth/r8152.c	/^static int r8152_init_common(struct r8152 *tp)$/;"	f	typeref:typename:int	file:
r8152_mdio_read	drivers/usb/eth/r8152.c	/^static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)$/;"	f	typeref:typename:int	file:
r8152_mdio_write	drivers/usb/eth/r8152.c	/^static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)$/;"	f	typeref:typename:void	file:
r8152_power_cut_en	drivers/usb/eth/r8152.c	/^static void r8152_power_cut_en(struct r8152 *tp, bool enable)$/;"	f	typeref:typename:void	file:
r8152_read_mac	drivers/usb/eth/r8152.c	/^static int r8152_read_mac(struct r8152 *tp, unsigned char *macaddr)$/;"	f	typeref:typename:int	file:
r8152_read_rom_hwaddr	drivers/usb/eth/r8152.c	/^int r8152_read_rom_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
r8152_recv	drivers/usb/eth/r8152.c	/^static int r8152_recv(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
r8152_send	drivers/usb/eth/r8152.c	/^static int r8152_send(struct eth_device *eth, void *packet, int length)$/;"	f	typeref:typename:int	file:
r8152_send_common	drivers/usb/eth/r8152.c	/^static int r8152_send_common(struct ueth_data *ueth, void *packet, int length)$/;"	f	typeref:typename:int	file:
r8152_version	drivers/usb/eth/r8152.c	/^struct r8152_version {$/;"	s	file:
r8152_versions	drivers/usb/eth/r8152.c	/^static const struct r8152_version const r8152_versions[] = {$/;"	v	typeref:typename:const struct r8152_version const[]	file:
r8152_wait_for_bit	drivers/usb/eth/r8152.c	/^int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type, u16 index,$/;"	f	typeref:typename:int
r8152_write_hwaddr	drivers/usb/eth/r8152.c	/^static int r8152_write_hwaddr(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
r8152_write_hwaddr	drivers/usb/eth/r8152.c	/^static int r8152_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
r8152b_disable_aldps	drivers/usb/eth/r8152.c	/^static void r8152b_disable_aldps(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_enable_aldps	drivers/usb/eth/r8152.c	/^static void r8152b_enable_aldps(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_enable_fc	drivers/usb/eth/r8152.c	/^static void r8152b_enable_fc(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_enter_oob	drivers/usb/eth/r8152.c	/^static void r8152b_enter_oob(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_exit_oob	drivers/usb/eth/r8152.c	/^static void r8152b_exit_oob(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_firmware	drivers/usb/eth/r8152_fw.c	/^void r8152b_firmware(struct r8152 *tp)$/;"	f	typeref:typename:void
r8152b_get_version	drivers/usb/eth/r8152.c	/^static void r8152b_get_version(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_hw_phy_cfg	drivers/usb/eth/r8152.c	/^static void r8152b_hw_phy_cfg(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_init	drivers/usb/eth/r8152.c	/^static void r8152b_init(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_pla_patch_a	drivers/usb/eth/r8152_fw.c	/^static u8 r8152b_pla_patch_a[] = {$/;"	v	typeref:typename:u8[]	file:
r8152b_pla_patch_a2	drivers/usb/eth/r8152_fw.c	/^static u8 r8152b_pla_patch_a2[] = {$/;"	v	typeref:typename:u8[]	file:
r8152b_pla_patch_a2_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8152b_pla_patch_a2_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8152b_pla_patch_a_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8152b_pla_patch_a_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8152b_ram_code1	drivers/usb/eth/r8152_fw.c	/^static u16 r8152b_ram_code1[] = {$/;"	v	typeref:typename:u16[]	file:
r8152b_reset_packet_filter	drivers/usb/eth/r8152.c	/^static void r8152b_reset_packet_filter(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8152b_set_dq_desc	drivers/usb/eth/r8152_fw.c	/^static void r8152b_set_dq_desc(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_clear_bp	drivers/usb/eth/r8152_fw.c	/^static void r8153_clear_bp(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_disable_aldps	drivers/usb/eth/r8152.c	/^static void r8153_disable_aldps(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_enter_oob	drivers/usb/eth/r8152.c	/^static void r8153_enter_oob(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_firmware	drivers/usb/eth/r8152_fw.c	/^void r8153_firmware(struct r8152 *tp)$/;"	f	typeref:typename:void
r8153_first_init	drivers/usb/eth/r8152.c	/^static void r8153_first_init(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_hw_phy_cfg	drivers/usb/eth/r8152.c	/^static void r8153_hw_phy_cfg(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_init	drivers/usb/eth/r8152.c	/^static void r8153_init(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_pla_patch_b	drivers/usb/eth/r8152_fw.c	/^static u8 r8153_pla_patch_b[] = {$/;"	v	typeref:typename:u8[]	file:
r8153_pla_patch_b_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_pla_patch_b_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_pla_patch_c	drivers/usb/eth/r8152_fw.c	/^static u8 r8153_pla_patch_c[] = {$/;"	v	typeref:typename:u8[]	file:
r8153_pla_patch_c_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_pla_patch_c_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_post_ram_code	drivers/usb/eth/r8152_fw.c	/^static int r8153_post_ram_code(struct r8152 *tp)$/;"	f	typeref:typename:int	file:
r8153_power_cut_en	drivers/usb/eth/r8152.c	/^static void r8153_power_cut_en(struct r8152 *tp, bool enable)$/;"	f	typeref:typename:void	file:
r8153_pre_ram_code	drivers/usb/eth/r8152_fw.c	/^static int r8153_pre_ram_code(struct r8152 *tp, u16 patch_key)$/;"	f	typeref:typename:int	file:
r8153_ram_code_a	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_ram_code_a[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_ram_code_bc	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_ram_code_bc[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_ram_code_d	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_ram_code_d[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_set_rx_early_size	drivers/usb/eth/r8152.c	/^static void r8153_set_rx_early_size(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_set_rx_early_timeout	drivers/usb/eth/r8152.c	/^static void r8153_set_rx_early_timeout(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8153_u1u2en	drivers/usb/eth/r8152.c	/^static void r8153_u1u2en(struct r8152 *tp, bool enable)$/;"	f	typeref:typename:void	file:
r8153_u2p3en	drivers/usb/eth/r8152.c	/^static void r8153_u2p3en(struct r8152 *tp, bool enable)$/;"	f	typeref:typename:void	file:
r8153_usb_patch_b	drivers/usb/eth/r8152_fw.c	/^static u8 r8153_usb_patch_b[] = {$/;"	v	typeref:typename:u8[]	file:
r8153_usb_patch_b_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_usb_patch_b_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_usb_patch_c	drivers/usb/eth/r8152_fw.c	/^static u8 r8153_usb_patch_c[] = {$/;"	v	typeref:typename:u8[]	file:
r8153_usb_patch_c_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_usb_patch_c_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_usb_patch_d_bp	drivers/usb/eth/r8152_fw.c	/^static u16 r8153_usb_patch_d_bp[] = {$/;"	v	typeref:typename:u16[]	file:
r8153_wdt1_end	drivers/usb/eth/r8152_fw.c	/^static void r8153_wdt1_end(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
r8a66597	drivers/usb/host/r8a66597.h	/^struct r8a66597 {$/;"	s
r8a66597_bclr	drivers/usb/host/r8a66597.h	/^#define r8a66597_bclr(/;"	d
r8a66597_bset	drivers/usb/host/r8a66597.h	/^#define r8a66597_bset(/;"	d
r8a66597_bus_reset	drivers/usb/host/r8a66597-hcd.c	/^static void r8a66597_bus_reset(struct r8a66597 *r8a66597, int port)$/;"	f	typeref:typename:void	file:
r8a66597_check_syssts	drivers/usb/host/r8a66597-hcd.c	/^static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port)$/;"	f	typeref:typename:void	file:
r8a66597_clock_disable	drivers/usb/host/r8a66597-hcd.c	/^static void r8a66597_clock_disable(struct r8a66597 *r8a66597)$/;"	f	typeref:typename:void	file:
r8a66597_clock_enable	drivers/usb/host/r8a66597-hcd.c	/^static int r8a66597_clock_enable(struct r8a66597 *r8a66597)$/;"	f	typeref:typename:int	file:
r8a66597_disable_port	drivers/usb/host/r8a66597-hcd.c	/^static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)$/;"	f	typeref:typename:void	file:
r8a66597_enable_port	drivers/usb/host/r8a66597-hcd.c	/^static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)$/;"	f	typeref:typename:void	file:
r8a66597_mdfy	drivers/usb/host/r8a66597.h	/^static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:void
r8a66597_port_power	drivers/usb/host/r8a66597.h	/^static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port,$/;"	f	typeref:typename:void
r8a66597_read	drivers/usb/host/r8a66597.h	/^static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)$/;"	f	typeref:typename:u16
r8a66597_read_fifo	drivers/usb/host/r8a66597.h	/^static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:void
r8a66597_reg_wait	drivers/usb/host/r8a66597-hcd.c	/^static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,$/;"	f	typeref:typename:void	file:
r8a66597_submit_rh_msg	drivers/usb/host/r8a66597-hcd.c	/^static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
r8a66597_write	drivers/usb/host/r8a66597.h	/^static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,$/;"	f	typeref:typename:void
r8a66597_write_fifo	drivers/usb/host/r8a66597.h	/^static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:void
r8a7740_bsc	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^struct r8a7740_bsc {$/;"	s
r8a7740_cpg	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^struct r8a7740_cpg {$/;"	s
r8a7740_dbsc	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^struct r8a7740_dbsc {$/;"	s
r8a7740_ddrp	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^struct r8a7740_ddrp {$/;"	s
r8a7740_hpb	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^struct r8a7740_hpb {$/;"	s
r8a7740_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7740.c	/^static struct pinmux_info r8a7740_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7740_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7740.c	/^void r8a7740_pinmux_init(void)$/;"	f	typeref:typename:void
r8a7740_rwdt	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^struct r8a7740_rwdt {$/;"	s
r8a7790_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7790.c	/^static struct pinmux_info r8a7790_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7790_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7790.c	/^void r8a7790_pinmux_init(void)$/;"	f	typeref:typename:void
r8a7791_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7791.c	/^static struct pinmux_info r8a7791_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7791_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7791.c	/^void r8a7791_pinmux_init(void)$/;"	f	typeref:typename:void
r8a7792_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7792.c	/^static struct pinmux_info r8a7792_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7792_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7792.c	/^void r8a7792_pinmux_init(void)$/;"	f	typeref:typename:void
r8a7793_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7793.c	/^static struct pinmux_info r8a7793_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7793_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7793.c	/^void r8a7793_pinmux_init(void)$/;"	f	typeref:typename:void
r8a7794_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7794.c	/^static struct pinmux_info r8a7794_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7794_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7794.c	/^void r8a7794_pinmux_init(void)$/;"	f	typeref:typename:void
r8a7795_mem_map	arch/arm/mach-rmobile/memmap-r8a7795.c	/^static struct mm_region r8a7795_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
r8a7795_pinmux_info	arch/arm/mach-rmobile/pfc-r8a7795.c	/^static struct pinmux_info r8a7795_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
r8a7795_pinmux_init	arch/arm/mach-rmobile/pfc-r8a7795.c	/^void r8a7795_pinmux_init(void)$/;"	f	typeref:typename:void
r9	arch/arc/include/asm/ptrace.h	/^	long r9;$/;"	m	struct:pt_regs	typeref:typename:long
r9	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long r9;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
r9	arch/avr32/include/asm/ptrace.h	/^	unsigned long r9;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
rEALLOc	common/dlmalloc.c	/^Void_t* rEALLOc(Void_t* oldmem, size_t bytes)$/;"	f	typeref:typename:Void_t *
rEALLOc	include/malloc.h	/^# define rEALLOc	/;"	d
rEALLOc	include/malloc.h	/^#define rEALLOc	/;"	d
r_1wire_clk	arch/arm/dts/sun9i-a80.dtsi	/^		r_1wire_clk: clk@08001450 {$/;"	l
r_activate	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_activate;		\/* MBAR_ETH + 0x080 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_addend	include/elf.h	/^	Elf32_Sword	r_addend;$/;"	m	struct:__anona52b83e50308	typeref:typename:Elf32_Sword
r_addend	include/elf.h	/^	Elf64_Sxword r_addend;  \/* Constant addend used to compute value *\/$/;"	m	struct:__anona52b83e50508	typeref:typename:Elf64_Sxword
r_addr	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^	u32 r_addr;$/;"	m	struct:mstp_ctl	typeref:typename:u32
r_align	arch/arm/mach-tegra/ivc.c	/^		uint8_t r_align[TEGRA_IVC_ALIGN];$/;"	m	union:tegra_ivc_channel_header::__anon00ce435c030a	typeref:typename:uint8_t[]	file:
r_bound	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_bound;	\/* End of RAM *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_bound	drivers/net/fec_mxc.h	/^	uint32_t r_bound;		\/* MBAR_ETH + 0x14C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
r_bound	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_bound;		\/* MBAR_ETH + 0x14C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_buff_size	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_buff_size;	\/* Receive buffer size *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_cntrl	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_cntrl;	\/* Receive control register *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_cntrl	drivers/net/fec_mxc.h	/^	uint32_t r_cntrl;		\/* MBAR_ETH + 0x084 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
r_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_cntrl;		\/* MBAR_ETH + 0x084 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_count	arch/arm/mach-tegra/ivc.c	/^		uint32_t r_count;$/;"	m	union:tegra_ivc_channel_header::__anon00ce435c030a	typeref:typename:uint32_t	file:
r_count	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_count;		\/* MBAR_ETH + 0x154 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_count	fs/ext4/ext4_journal.h	/^	__be32 r_count;		\/* Count of bytes used in the block *\/$/;"	m	struct:journal_revoke_header_t	typeref:typename:__be32
r_da_high	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_da_high;		\/* MBAR_ETH + 0x0A0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_da_low	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_da_low;		\/* MBAR_ETH + 0x09C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_data;			\/* MBAR_ETH + 0x08C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_des_active	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_des_active;	\/* Receive ring updated flag *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_des_active	drivers/net/fec_mxc.h	/^	uint32_t r_des_active;		\/* MBAR_ETH + 0x010 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
r_des_active	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_des_active;		\/* MBAR_ETH + 0x010 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_des_active_cl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_des_active_cl;	\/* MBAR_ETH + 0x018 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_des_start	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_des_start;	\/* Beginning of receive descriptor ring *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_dis	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^	u32 r_dis;$/;"	m	struct:mstp_ctl	typeref:typename:u32
r_ena	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^	u32 r_ena;$/;"	m	struct:mstp_ctl	typeref:typename:u32
r_fdxfc	drivers/net/fec_mxc.h	/^	uint32_t r_fdxfc;		\/* MBAR_ETH + 0x2DC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
r_fdxfc	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_fdxfc;		\/* MBAR_ETH + 0x2DC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_fstart	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_fstart;	\/* Receive FIFO start address *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_fstart	drivers/net/fec_mxc.h	/^	uint32_t r_fstart;		\/* MBAR_ETH + 0x150 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
r_fstart	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_fstart;		\/* MBAR_ETH + 0x150 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_hash	arch/powerpc/include/asm/immap_512x.h	/^	u32	r_hash;		\/* Receive hash *\/$/;"	m	struct:fec512x	typeref:typename:u32
r_hash	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_hash;			\/* MBAR_ETH + 0x088 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_header	fs/ext4/ext4_journal.h	/^	struct journal_header_t r_header;$/;"	m	struct:journal_revoke_header_t	typeref:struct:journal_header_t
r_info	include/elf.h	/^	Elf32_Word	r_info;		\/* symbol table index and type *\/$/;"	m	struct:__anona52b83e50208	typeref:typename:Elf32_Word
r_info	include/elf.h	/^	Elf32_Word	r_info;		\/* symbol table index and type *\/$/;"	m	struct:__anona52b83e50308	typeref:typename:Elf32_Word
r_info	include/elf.h	/^	Elf64_Xword r_info;	\/* index and type of relocation *\/$/;"	m	struct:__anona52b83e50408	typeref:typename:Elf64_Xword
r_info	include/elf.h	/^	Elf64_Xword r_info;     \/* index and type of relocation *\/$/;"	m	struct:__anona52b83e50508	typeref:typename:Elf64_Xword
r_ir	arch/arm/dts/sun9i-a80.dtsi	/^		r_ir: ir@08002000 {$/;"	l
r_ir_clk	arch/arm/dts/sun9i-a80.dtsi	/^		r_ir_clk: clk@08001454 {$/;"	l
r_ir_pins	arch/arm/dts/sun9i-a80.dtsi	/^			r_ir_pins: r_ir {$/;"	l	label:r_pio
r_lag	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_lag;			\/* MBAR_ETH + 0x158 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_left	include/dfu.h	/^	long r_left;$/;"	m	struct:dfu_entity	typeref:typename:long
r_length	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_length;		\/* MBAR_ETH + 0x1E0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_lla	drivers/video/ipu_regs.h	/^	u32 r_lla[2];$/;"	m	struct:ipu_dc	typeref:typename:u32[2]
r_macerr	drivers/net/fec_mxc.h	/^	uint32_t r_macerr;		\/* MBAR_ETH + 0x2D8 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
r_macerr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_macerr;		\/* MBAR_ETH + 0x2D8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_mib	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_mib;			\/* MBAR_ETH + 0x098 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_mode	common/cli_hush.c	/^	reserved_style r_mode;		\/* supports if, for, while, until *\/$/;"	m	struct:pipe	typeref:typename:reserved_style	file:
r_offset	include/elf.h	/^	Elf32_Addr	r_offset;	\/* offset of relocation *\/$/;"	m	struct:__anona52b83e50208	typeref:typename:Elf32_Addr
r_offset	include/elf.h	/^	Elf32_Addr	r_offset;	\/* offset of relocation *\/$/;"	m	struct:__anona52b83e50308	typeref:typename:Elf32_Addr
r_offset	include/elf.h	/^	Elf64_Addr r_offset;	\/* Location at which to apply the action *\/$/;"	m	struct:__anona52b83e50408	typeref:typename:Elf64_Addr
r_offset	include/elf.h	/^	Elf64_Addr r_offset;    \/* Location at which to apply the action *\/$/;"	m	struct:__anona52b83e50508	typeref:typename:Elf64_Addr
r_pio	arch/arm/dts/sun6i-a31.dtsi	/^		r_pio: pinctrl@01f02c00 {$/;"	l
r_pio	arch/arm/dts/sun8i-a23-a33.dtsi	/^		r_pio: pinctrl@01f02c00 {$/;"	l
r_pio	arch/arm/dts/sun8i-a83t.dtsi	/^		r_pio: pinctrl@01f02c00 {$/;"	l
r_pio	arch/arm/dts/sun8i-h3.dtsi	/^		r_pio: pinctrl@01f02c00 {$/;"	l
r_pio	arch/arm/dts/sun9i-a80.dtsi	/^		r_pio: pinctrl@08002c00 {$/;"	l
r_pos	arch/arm/include/asm/arch-tegra/ivc.h	/^	uint32_t r_pos;$/;"	m	struct:tegra_ivc	typeref:typename:uint32_t
r_ptr	board/mpl/pati/pati.c	/^static int r_ptr = 0;$/;"	v	typeref:typename:int	file:
r_read	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_read;			\/* MBAR_ETH + 0x15C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_rsb	arch/arm/dts/sun8i-a23-a33.dtsi	/^		r_rsb: rsb@01f03400 {$/;"	l
r_rsb	arch/arm/dts/sun9i-a80.dtsi	/^		r_rsb: i2c@08003400 {$/;"	l
r_rsb_pins	arch/arm/dts/sun8i-a23-a33.dtsi	/^			r_rsb_pins: r_rsb {$/;"	l	label:r_pio
r_rsb_pins	arch/arm/dts/sun9i-a80.dtsi	/^			r_rsb_pins: r_rsb {$/;"	l	label:r_pio
r_test	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_test;			\/* MBAR_ETH + 0x094 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
r_uart	arch/arm/dts/sun8i-a23-a33.dtsi	/^		r_uart: serial@01f02800 {$/;"	l
r_uart	arch/arm/dts/sun9i-a80.dtsi	/^		r_uart: serial@08002800 {$/;"	l
r_uart_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			r_uart_pins_a: r_uart@0 {$/;"	l	label:r_pio
r_wdt	arch/arm/dts/sun9i-a80.dtsi	/^		r_wdt: watchdog@08001000 {$/;"	l
r_write	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 r_write;		\/* MBAR_ETH + 0x160 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
ra	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		ra;	\/* 0x14 Register A *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
ra	arch/mips/include/asm/regdef.h	/^#define ra	/;"	d
raddr	tools/kwbimage.h	/^	uint32_t raddr;$/;"	m	struct:ext_hdr_v0_reg	typeref:typename:uint32_t
radeon_engine_flush	drivers/video/ati_radeon_fb.h	/^static inline void radeon_engine_flush (struct radeonfb_info *rinfo)$/;"	f	typeref:typename:void
radeon_engine_idle	drivers/video/ati_radeon_fb.h	/^#define radeon_engine_idle(/;"	d
radeon_family	drivers/video/ati_radeon_fb.h	/^enum radeon_family {$/;"	g
radeon_fifo_wait	drivers/video/ati_radeon_fb.h	/^#define radeon_fifo_wait(/;"	d
radeon_identify_vram	drivers/video/ati_radeon_fb.c	/^static void radeon_identify_vram(struct radeonfb_info *rinfo)$/;"	f	typeref:typename:void	file:
radeon_msleep	drivers/video/ati_radeon_fb.h	/^#define radeon_msleep(/;"	d
radeon_probe	drivers/video/ati_radeon_fb.c	/^int radeon_probe(struct radeonfb_info *rinfo)$/;"	f	typeref:typename:int
radeon_regs	drivers/video/ati_radeon_fb.h	/^struct radeon_regs {$/;"	s
radeon_setmode	drivers/video/ati_radeon_fb.c	/^void radeon_setmode(void)$/;"	f	typeref:typename:void
radeon_setmode_9200	drivers/video/ati_radeon_fb.c	/^void radeon_setmode_9200(int vesa_idx, int bpp)$/;"	f	typeref:typename:void
radeon_write_pll_regs	drivers/video/ati_radeon_fb.c	/^static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode)$/;"	f	typeref:typename:void	file:
radeonfb_info	drivers/video/ati_radeon_fb.h	/^struct radeonfb_info {$/;"	s
radiolist_instructions	scripts/kconfig/mconf.c	/^radiolist_instructions[] = N_($/;"	v	typeref:typename:const char[]	file:
radiolist_instructions	scripts/kconfig/nconf.c	/^radiolist_instructions[] = N_($/;"	v	typeref:typename:const char[]	file:
radix_fmt	include/bedbug/ppc.h	/^  char			radix_fmt[ 8 ];$/;"	m	struct:ppc_ctx	typeref:typename:char[8]
raf	drivers/net/xilinx_ll_temac.h	/^	u32 raf;	\/* Reset and Address Filter *\/$/;"	m	struct:temac_reg	typeref:typename:u32
ragr	include/faraday/ftsdmc021.h	/^	unsigned int	ragr;		\/* 0x30 - Read Arbitration Group Reg *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
raid	include/linux/edd.h	/^		} __attribute__ ((packed)) raid;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1008
raid_stride	include/ext_common.h	/^	__le16 raid_stride;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
raid_stripe_width	include/ext_common.h	/^	__le32 raid_stripe_width;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
raide_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct liodn_id_table raide_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
raide_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct liodn_id_table raide_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
raide_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl);$/;"	v	typeref:typename:int
raide_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl);$/;"	v	typeref:typename:int
raise	arch/arm/lib/eabi_compat.c	/^int raise (int signum)$/;"	f	typeref:typename:int
raise_exception	drivers/usb/gadget/f_mass_storage.c	/^static void raise_exception(struct fsg_common *common, enum fsg_state new_state)$/;"	f	typeref:typename:void	file:
ralat	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 ralat;	\/* Read Additional Latency (0-7) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
raln	arch/powerpc/include/asm/immap_85xx.h	/^	u32	raln;		\/* RX Alignment Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
raln	arch/powerpc/include/asm/immap_86xx.h	/^	uint	raln;		\/* 0x246bc - Receive Alignment Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
raln	include/fsl_dtsec.h	/^	u32	raln;		\/* Receive alignment error *\/$/;"	m	struct:dtsec	typeref:typename:u32
raln	include/tsec.h	/^	u32	raln;		\/* Receive Alignment Error *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
ram	include/dfu.h	/^		struct ram_internal_data ram;$/;"	m	union:dfu_entity::__anona51660ed010a	typeref:struct:ram_internal_data
ram_banks	arch/arm/mach-tegra/tegra186/nvtboot_mem.c	/^} ram_banks[2] = {{1}};$/;"	v	typeref:struct:__anon231bbe050108[2]
ram_base	board/xilinx/microblaze-generic/microblaze-generic.c	/^ulong ram_base;$/;"	v	typeref:typename:ulong
ram_base	include/efi.h	/^	unsigned long ram_base;$/;"	m	struct:efi_priv	typeref:typename:unsigned long
ram_base	test/py/u_boot_utils.py	/^ram_base = None$/;"	v
ram_bits	include/linux/usb/musb.h	/^	u8		ram_bits;	\/* ram address size *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:u8
ram_buf	arch/sandbox/include/asm/global_data.h	/^	uint8_t		*ram_buf;	\/* emulated RAM buffer *\/$/;"	m	struct:arch_global_data	typeref:typename:uint8_t *
ram_buf	arch/sandbox/include/asm/state.h	/^	uint8_t *ram_buf;		\/* Emulated RAM buffer *\/$/;"	m	struct:sandbox_state	typeref:typename:uint8_t *
ram_buf_fname	arch/sandbox/include/asm/state.h	/^	const char *ram_buf_fname;	\/* Filename to use for RAM buffer *\/$/;"	m	struct:sandbox_state	typeref:typename:const char *
ram_buf_rm	arch/sandbox/include/asm/state.h	/^	bool ram_buf_rm;		\/* Remove RAM buffer file after read *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
ram_code	arch/blackfin/cpu/u-boot.lds	/^# define ram_code /;"	d	file:
ram_data	arch/blackfin/cpu/u-boot.lds	/^# define ram_data /;"	d	file:
ram_flags	arch/sparc/lib/bootm.c	/^			unsigned short ram_flags;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned short	file:
ram_get_info	drivers/ram/ram-uclass.c	/^int ram_get_info(struct udevice *dev, struct ram_info *info)$/;"	f	typeref:typename:int
ram_get_ops	include/ram.h	/^#define ram_get_ops(/;"	d
ram_info	include/ram.h	/^struct ram_info {$/;"	s
ram_internal_data	include/dfu.h	/^struct ram_internal_data {$/;"	s
ram_ops	include/ram.h	/^struct ram_ops {$/;"	s
ram_repair	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 ram_repair;		\/* offset 0x40 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
ram_repair	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 ram_repair;		\/* offset 0x40 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
ram_repair_cluster1	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 ram_repair_cluster1;\/* offset 0x58 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
ram_size	arch/sandbox/include/asm/state.h	/^	unsigned int ram_size;		\/* Size of RAM buffer *\/$/;"	m	struct:sandbox_state	typeref:typename:unsigned int
ram_size	arch/x86/include/asm/bootparam.h	/^	__u16	ram_size;$/;"	m	struct:setup_header	typeref:typename:__u16
ram_size	include/asm-generic/global_data.h	/^	phys_size_t ram_size;		\/* RAM size *\/$/;"	m	struct:global_data	typeref:typename:phys_size_t
ram_top	include/asm-generic/global_data.h	/^	unsigned long ram_top;		\/* Top address of RAM used by U-Boot *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
rambar	arch/m68k/include/asm/immap_5235.h	/^	u32 rambar;		\/* 0x08 - RAMBAR *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
rambar	arch/m68k/include/asm/immap_5275.h	/^	u32 rambar;$/;"	m	struct:sys_ctrl	typeref:typename:u32
rambar	arch/m68k/include/asm/immap_5282.h	/^	u32 rambar;$/;"	m	struct:scm_ctrl	typeref:typename:u32
ramc	arch/arm/dts/at91sam9261.dtsi	/^			ramc: ramc@ffffea00 {$/;"	l
ramc0	arch/arm/dts/at91sam9260.dtsi	/^			ramc0: ramc@ffffea00 {$/;"	l
ramc0	arch/arm/dts/at91sam9263.dtsi	/^			ramc0: ramc@ffffe200 {$/;"	l
ramc0	arch/arm/dts/at91sam9g45.dtsi	/^			ramc0: ramc@ffffe400 {$/;"	l
ramc1	arch/arm/dts/at91sam9263.dtsi	/^			ramc1: ramc@ffffe800 {$/;"	l
ramc1	arch/arm/dts/at91sam9g45.dtsi	/^			ramc1: ramc@ffffe600 {$/;"	l
ramdisk	arch/arm/include/asm/setup.h	/^		struct tag_ramdisk	ramdisk;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_ramdisk
ramdisk	arch/nds32/include/asm/setup.h	/^		struct tag_ramdisk	ramdisk;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_ramdisk
ramdisk_addr	include/android_image.h	/^	u32 ramdisk_addr;	\/* physical load addr *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
ramdisk_image	arch/x86/include/asm/bootparam.h	/^	__u32	ramdisk_image;$/;"	m	struct:setup_header	typeref:typename:__u32
ramdisk_size	arch/arm/include/asm/setup.h	/^	    unsigned long ramdisk_size;		\/*  8 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
ramdisk_size	arch/x86/include/asm/bootparam.h	/^	__u32	ramdisk_size;$/;"	m	struct:setup_header	typeref:typename:__u32
ramdisk_size	include/android_image.h	/^	u32 ramdisk_size;	\/* size in bytes *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
raminfo	drivers/usb/musb/musb_core.h	/^	u8	raminfo;$/;"	m	struct:musb_regs	typeref:typename:u8
rampctrl	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int rampctrl;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
rand	drivers/crypto/ace_sha.c	/^unsigned int rand(void)$/;"	f	typeref:typename:unsigned int
rand	lib/rand.c	/^unsigned int rand(void)$/;"	f	typeref:typename:unsigned int
rand1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rand1;			\/* MBAR_ETH + 0x12C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rand_r	drivers/crypto/ace_sha.c	/^unsigned int rand_r(unsigned int *seedp)$/;"	f	typeref:typename:unsigned int
rand_r	lib/rand.c	/^unsigned int rand_r(unsigned int *seedp)$/;"	f	typeref:typename:unsigned int
randconfig	scripts/kconfig/conf.c	/^	randconfig,$/;"	e	enum:input_mode	file:
randkey_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 randkey_0;		\/* 0x318 *\/$/;"	m	struct:ctrl	typeref:typename:u32
randkey_1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 randkey_1;		\/* 0x31C *\/$/;"	m	struct:ctrl	typeref:typename:u32
randkey_2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 randkey_2;		\/* 0x320 *\/$/;"	m	struct:ctrl	typeref:typename:u32
randkey_3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 randkey_3;		\/* 0x324 *\/$/;"	m	struct:ctrl	typeref:typename:u32
random	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 random;			\/* MBAR_ETH + 0x128 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
random_aes_block	arch/arm/include/asm/arch-tegra/warmboot.h	/^	struct hash random_aes_block;	\/* a data block to aid security. *\/$/;"	m	struct:wb_header	typeref:struct:hash
random_delay_ms	net/link_local.c	/^static inline unsigned random_delay_ms(unsigned secs)$/;"	f	typeref:typename:unsigned	file:
random_garbage	drivers/mtd/ubi/crc32.c	/^static void random_garbage(unsigned char *buf, size_t len)$/;"	f	typeref:typename:void	file:
random_port	net/net.c	/^unsigned int random_port(void)$/;"	f	typeref:typename:unsigned int
random_seed	drivers/mtd/nand/sunxi_nand_spl.c	/^const uint16_t random_seed[128] = {$/;"	v	typeref:typename:const uint16_t[128]
randomize	drivers/mtd/nand/sunxi_nand_spl.c	/^	bool randomize;$/;"	m	struct:nfc_config	typeref:typename:bool	file:
randomize_choice_values	scripts/kconfig/confdata.c	/^static bool randomize_choice_values(struct symbol *csym)$/;"	f	typeref:typename:bool	file:
range	arch/mips/mach-ath79/ar934x/clk.c	/^	u8	range;$/;"	m	struct:ar934x_pll_config	typeref:typename:u8	file:
range	include/regmap.h	/^	struct regmap_range *range, base_range;$/;"	m	struct:regmap	typeref:struct:regmap_range *
range	lib/lzma/LzmaDec.h	/^  UInt32 range, code;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:UInt32
range_count	include/regmap.h	/^	int range_count;$/;"	m	struct:regmap	typeref:typename:int
range_cyclic	include/linux/compat.h	/^	unsigned range_cyclic:1;	\/* range_start is cyclic *\/$/;"	m	struct:writeback_control	typeref:typename:unsigned:1
range_data	include/edid.h	/^		} range_data;$/;"	m	union:edid_monitor_descriptor::__anon4a0dc044010a	typeref:struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208
range_end	arch/x86/include/asm/coreboot_tables.h	/^	u32 range_end;$/;"	m	struct:cb_cmos_checksum	typeref:typename:u32
range_end	include/linux/compat.h	/^	loff_t range_end;$/;"	m	struct:writeback_control	typeref:typename:loff_t
range_has_maintainer	scripts/get_maintainer.pl	/^sub range_has_maintainer {$/;"	s
range_is_maintained	scripts/get_maintainer.pl	/^sub range_is_maintained {$/;"	s
range_start	arch/x86/include/asm/coreboot_tables.h	/^	u32 range_start;$/;"	m	struct:cb_cmos_checksum	typeref:typename:u32
range_start	include/linux/compat.h	/^	loff_t range_start;$/;"	m	struct:writeback_control	typeref:typename:loff_t
ranges	fs/ubifs/ubifs.h	/^	struct ubifs_node_range ranges[UBIFS_NODE_TYPES_CNT];$/;"	m	struct:ubifs_info	typeref:struct:ubifs_node_range[]
rank	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 rank;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
rank	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 rank;$/;"	m	struct:rk3036_ddr_config	typeref:typename:u32
rank	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 rank;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
rank	arch/arm/mach-sunxi/dram_sun6i.c	/^	u8 rank;$/;"	m	struct:dram_sun6i_para	typeref:typename:u8	file:
rank	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u8 rank;$/;"	m	struct:dram_para	typeref:typename:u8	file:
rank	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 rank;$/;"	m	struct:dram_para	typeref:typename:u8	file:
rank	arch/arm/mach-sunxi/dram_sun9i.c	/^	u8 rank;$/;"	m	struct:dram_sun9i_para	typeref:typename:u8	file:
rank_capacity	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 rank_capacity;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
rank_dens	include/ddr_spd.h	/^	unsigned char rank_dens;   \/* 31 Density of each rank on module *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
rank_density	include/fsl_ddr_dimm_params.h	/^	unsigned long long rank_density;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned long long
rank_enables	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t rank_enables;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
rank_gb	board/freescale/ls1021aqds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls1043aqds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls1043ardb/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls1046aqds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls1046ardb/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls2080a/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls2080aqds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/ls2080ardb/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/t102xqds/ddr.c	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
rank_gb	board/freescale/t102xrdb/ddr.c	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
rank_gb	board/freescale/t1040qds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/t104xrdb/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/t208xqds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/t208xrdb/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/t4qds/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_gb	board/freescale/t4rdb/ddr.h	/^	u32 rank_gb;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
rank_num	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 rank_num;$/;"	m	struct:dram_para	typeref:typename:u32
rank_num	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 rank_num;$/;"	m	struct:dram_para	typeref:typename:u32
rank_per_dimm	arch/x86/include/asm/global_data.h	/^	uint8_t rank_per_dimm;$/;"	m	struct:dimm_info	typeref:typename:uint8_t
rankctl	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 rankctl;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rankctl	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rankctl;		\/* 0xf4 rank control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rankctl	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 rankctl;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rankctl	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rankctl;		\/* 0xf4 rank control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rapid_start	arch/x86/include/asm/me_common.h	/^	u32 rapid_start:1;	\/* Broadwell only *\/$/;"	m	struct:me_did	typeref:typename:u32:1
rarp_receive	net/rarp.c	/^void rarp_receive(struct ip_udp_hdr *ip, unsigned len)$/;"	f	typeref:typename:void
rarp_request	net/rarp.c	/^void rarp_request(void)$/;"	f	typeref:typename:void
rarp_timeout_handler	net/rarp.c	/^static void rarp_timeout_handler(void)$/;"	f	typeref:typename:void	file:
rarp_try	net/rarp.c	/^int rarp_try;$/;"	v	typeref:typename:int
ras	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 ras;		\/* 0x34: EMC_RAS *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
ras	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t ras;$/;"	m	struct:dram_params	typeref:typename:uint32_t
ras_clken	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_clken;		\/* 0x34 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_gpp1_in	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_gpp1_in;	\/* 0x8000 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_gpp1_out	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_gpp1_out;	\/* 0x8008 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_gpp2_in	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_gpp2_in;	\/* 0x8004 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_gpp2_out	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_gpp2_out;	\/* 0x800C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_rst	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_rst;		\/* 0x40 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_synth1_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_synth1_clk;	\/* 0x6C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_synth2_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_synth2_clk;	\/* 0x70 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_synth3_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_synth3_clk;	\/* 0x74 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
ras_synth4_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 ras_synth4_clk;	\/* 0x78 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
rascas0	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	rascas0;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
rascas0	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 rascas0;		\/* RAS and CAS latencies for the SDRAM       *\/$/;"	m	struct:emc_regs	typeref:typename:u32
rascas1	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 rascas1;		\/* RAS and CAS latencies for the SDRAM       *\/$/;"	m	struct:emc_regs	typeref:typename:u32
rasr	arch/arm/include/asm/armv7m.h	/^	uint32_t rasr;		\/* Region Attribute and Size Register *\/$/;"	m	struct:v7m_mpu	typeref:typename:uint32_t
raster_ctrl	drivers/video/am335x-fb.c	/^	unsigned int		raster_ctrl;		\/* 0x28 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
raster_ctrl	drivers/video/da8xx-fb.c	/^	u32	raster_ctrl;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
raster_load_mode	drivers/video/da8xx-fb.h	/^enum raster_load_mode {$/;"	g
raster_order	drivers/video/da8xx-fb.h	/^	unsigned char raster_order;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
raster_subpanel	drivers/video/am335x-fb.c	/^	unsigned int		raster_subpanel;	\/* 0x38 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
raster_subpanel	drivers/video/da8xx-fb.c	/^	u32	raster_subpanel;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
raster_subpanel2	drivers/video/am335x-fb.c	/^	unsigned int		raster_subpanel2;	\/* 0x3C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
raster_timing0	drivers/video/am335x-fb.c	/^	unsigned int		raster_timing0;		\/* 0x2C *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
raster_timing1	drivers/video/am335x-fb.c	/^	unsigned int		raster_timing1;		\/* 0x30 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
raster_timing2	drivers/video/am335x-fb.c	/^	unsigned int		raster_timing2;		\/* 0x34 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
raster_timing_0	drivers/video/da8xx-fb.c	/^	u32	raster_timing_0;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
raster_timing_1	drivers/video/da8xx-fb.c	/^	u32	raster_timing_1;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
raster_timing_2	drivers/video/da8xx-fb.c	/^	u32	raster_timing_2;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
ratchet	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t ratchet;$/;"	m	struct:mrq_abi_ratchet_request	typeref:typename:uint16_t
ratchet	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t ratchet;$/;"	m	struct:mrq_abi_ratchet_response	typeref:typename:uint16_t
rate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long rate;	\/* in HZ *\/$/;"	m	struct:clk	typeref:typename:unsigned long
rate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long rate;	\/* in HZ *\/$/;"	m	struct:clk	typeref:typename:unsigned long
rate	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	unsigned long rate;$/;"	m	struct:pipe3_dpll_map	typeref:typename:unsigned long
rate	arch/arm/include/asm/arch-lpc32xx/uart.h	/^	u32 rate;		\/* Rate Control Register	*\/$/;"	m	struct:hsuart_regs	typeref:typename:u32
rate	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	ulong rate;$/;"	m	struct:rk3036_clk_priv	typeref:typename:ulong
rate	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	ulong rate;$/;"	m	struct:rk3288_clk_priv	typeref:typename:ulong
rate	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	ulong rate;$/;"	m	struct:rk3399_clk_priv	typeref:typename:ulong
rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int64_t rate;$/;"	m	struct:cmd_clk_get_rate_response	typeref:typename:int64_t
rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int64_t rate;$/;"	m	struct:cmd_clk_round_rate_request	typeref:typename:int64_t
rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int64_t rate;$/;"	m	struct:cmd_clk_round_rate_response	typeref:typename:int64_t
rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int64_t rate;$/;"	m	struct:cmd_clk_set_rate_request	typeref:typename:int64_t
rate	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int64_t rate;$/;"	m	struct:cmd_clk_set_rate_response	typeref:typename:int64_t
rate	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	enum ks2_serdes_rate rate;$/;"	m	struct:ks2_serdes	typeref:enum:ks2_serdes_rate
rate	arch/mips/mach-pic32/cpu.c	/^static ulong rate(int id)$/;"	f	typeref:typename:ulong	file:
rate	cmd/fdc.c	/^	unsigned char	rate;	\/* data rate. |= 0x40 for perpendicular *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned char	file:
rate	drivers/clk/clk_sandbox.c	/^	ulong rate[SANDBOX_CLK_ID_COUNT];$/;"	m	struct:sandbox_clk_priv	typeref:typename:ulong[]	file:
rate	drivers/mmc/ftsdc010_mci.c	/^	uint32_t rate;    \/* actual SD clock in Hz *\/$/;"	m	struct:ftsdc010_chip	typeref:typename:uint32_t	file:
rate	drivers/soc/keystone/keystone_serdes.c	/^	enum ks2_serdes_rate rate;$/;"	m	struct:cfg_entry	typeref:enum:ks2_serdes_rate	file:
rate	drivers/sound/max98095.c	/^	unsigned int rate;$/;"	m	struct:max98095_priv	typeref:typename:unsigned int	file:
rate	drivers/usb/dwc3/ti_usb_phy.c	/^	unsigned long rate;$/;"	m	struct:usb3_dpll_map	typeref:typename:unsigned long	file:
rate	drivers/usb/phy/omap_usb_phy.c	/^	unsigned long rate;$/;"	m	struct:usb3_dpll_map	typeref:typename:unsigned long	file:
rate	drivers/video/ipu.h	/^	unsigned long rate;$/;"	m	struct:clk	typeref:typename:unsigned long
rate	include/fsl-mc/fsl_dpmac.h	/^	uint32_t	rate;$/;"	m	struct:dpmac_link_state	typeref:typename:uint32_t
rate	include/fsl-mc/fsl_dpmac.h	/^	uint32_t rate;$/;"	m	struct:dpmac_link_cfg	typeref:typename:uint32_t
rate	include/fsl-mc/fsl_dpni.h	/^	uint32_t rate;$/;"	m	struct:dpni_link_cfg	typeref:typename:uint32_t
rate	include/fsl-mc/fsl_dpni.h	/^	uint32_t rate;$/;"	m	struct:dpni_link_state	typeref:typename:uint32_t
rate	include/lynxkdi.h	/^	uint32_t	rate;		\/* System frequency		*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint32_t
rate_hz	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 rate_hz;$/;"	m	struct:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a::__anon775fc5441308	typeref:typename:u32
rate_mode	arch/arm/include/asm/ti-common/keystone_serdes.h	/^	enum ks2_serdes_rate_mode rate_mode;$/;"	m	struct:ks2_serdes	typeref:enum:ks2_serdes_rate_mode
rate_per_freq	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 rate_per_freq;$/;"	m	struct:hws_tip_freq_config_info	typeref:typename:u8
rate_sample_interval	include/linux/ethtool.h	/^	__u32	rate_sample_interval;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rate_table	drivers/sound/max98095.c	/^int rate_table[] = {0, 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,$/;"	v	typeref:typename:int[]
rate_value	drivers/sound/max98095.c	/^static int rate_value(int rate, u8 *value)$/;"	f	typeref:typename:int	file:
rates	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned long rates[UNIPHIER_CLK_MAX_NR_MUXS];$/;"	m	struct:uniphier_clk_mux_data	typeref:typename:unsigned long[]
ratio	arch/x86/include/asm/speedstep.h	/^	uint8_t ratio:6;$/;"	m	struct:sst_state	typeref:typename:uint8_t:6
raw	arch/mips/mach-pic32/include/mach/pic32.h	/^	u32 raw;$/;"	m	struct:pic32_reg_atomic	typeref:typename:u32
raw	drivers/usb/dwc3/core.h	/^	u32				raw;$/;"	m	union:dwc3_event	typeref:typename:u32
raw	drivers/usb/gadget/at91_udc.c	/^	u8			raw[8];$/;"	m	union:setup	typeref:typename:u8[8]	file:
raw	drivers/usb/gadget/pxa25x_udc.c	/^		u8			raw[8];$/;"	m	union:handle_ep0::__anon3e9922fb010a	typeref:typename:u8[8]	file:
raw	include/part_efi.h	/^	unsigned long long raw;$/;"	m	union:_gpt_entry_attributes	typeref:typename:unsigned long long
raw	lib/lz4_wrapper.c	/^		u32 raw;$/;"	m	union:lz4_block_header::__anonc9492e16050a	typeref:typename:u32	file:
raw_access	cmd/nand.c	/^static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off,$/;"	f	typeref:typename:int	file:
raw_bootcount_load	include/bootcount.h	/^static inline u32 raw_bootcount_load(volatile u32 *addr)$/;"	f	typeref:typename:u32
raw_bootcount_store	include/bootcount.h	/^static inline void raw_bootcount_store(volatile u32 *addr, u32 data)$/;"	f	typeref:typename:void
raw_err_stat	drivers/dma/lpc32xx_dma.c	/^	u32 raw_err_stat;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
raw_irqs_disabled	arch/sh/include/asm/irqflags.h	/^static inline int raw_irqs_disabled(void)$/;"	f	typeref:typename:int
raw_irqs_disabled_flags	arch/sh/include/asm/irqflags.h	/^static inline int raw_irqs_disabled_flags(unsigned long flags)$/;"	f	typeref:typename:int
raw_line	scripts/checkpatch.pl	/^sub raw_line {$/;"	s
raw_local_irq_disable	arch/sh/include/asm/irqflags.h	/^static inline void raw_local_irq_disable(void)$/;"	f	typeref:typename:void
raw_local_irq_enable	arch/sh/include/asm/irqflags.h	/^static inline void raw_local_irq_enable(void)$/;"	f	typeref:typename:void
raw_local_irq_restore	arch/sh/include/asm/irqflags.h	/^static inline void raw_local_irq_restore(unsigned long flags)$/;"	f	typeref:typename:void
raw_local_irq_save	arch/sh/include/asm/irqflags.h	/^#define raw_local_irq_save(/;"	d
raw_local_save_flags	arch/sh/include/asm/irqflags.h	/^#define raw_local_save_flags(/;"	d
raw_oob_mode	drivers/mtd/nand/mxs_nand.c	/^	uint8_t		raw_oob_mode;$/;"	m	struct:mxs_nand_info	typeref:typename:uint8_t	file:
raw_section	arch/x86/include/asm/fsp/fsp_ffs.h	/^struct __packed raw_section {$/;"	s
raw_section2	arch/x86/include/asm/fsp/fsp_ffs.h	/^struct __packed raw_section2 {$/;"	s
raw_stat	drivers/video/da8xx-fb.c	/^	u32	raw_stat;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
raw_status	drivers/usb/host/xhci-keystone.c	/^		u32 raw_status;$/;"	m	struct:kdwc3_irq_regs::__anoncc7370550108	typeref:typename:u32	file:
raw_tc_stat	drivers/dma/lpc32xx_dma.c	/^	u32 raw_tc_stat;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
rawintsts	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rawintsts;$/;"	m	struct:gpio_int	typeref:typename:uint32_t
rb	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		rb;	\/* 0x18 Register B *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
rb	drivers/mtd/nand/sunxi_nand.c	/^	struct sunxi_nand_rb rb;$/;"	m	struct:sunxi_nand_chip_sel	typeref:struct:sunxi_nand_rb	file:
rb	drivers/mtd/ubi/ubi.h	/^		struct rb_node rb;$/;"	m	union:ubi_ainf_peb::__anon5a04ca2c060a	typeref:struct:rb_node
rb	drivers/mtd/ubi/ubi.h	/^		struct rb_node rb;$/;"	m	union:ubi_wl_entry::__anon5a04ca2c050a	typeref:struct:rb_node
rb	drivers/mtd/ubi/ubi.h	/^	struct rb_node rb;$/;"	m	struct:ubi_ainf_volume	typeref:struct:rb_node
rb	drivers/mtd/ubi/ubi.h	/^	struct rb_node rb;$/;"	m	struct:ubi_ltree_entry	typeref:struct:rb_node
rb	fs/ubifs/debug.c	/^	struct rb_node rb;$/;"	m	struct:fsck_inode	typeref:struct:rb_node	file:
rb	fs/ubifs/log.c	/^	struct rb_node rb;$/;"	m	struct:done_ref	typeref:struct:rb_node	file:
rb	fs/ubifs/orphan.c	/^	struct rb_node rb;$/;"	m	struct:check_orphan	typeref:struct:rb_node	file:
rb	fs/ubifs/recovery.c	/^	struct rb_node rb;$/;"	m	struct:size_entry	typeref:struct:rb_node	file:
rb	fs/ubifs/ubifs.h	/^	struct rb_node rb;$/;"	m	struct:ubifs_bud	typeref:struct:rb_node
rb	fs/ubifs/ubifs.h	/^	struct rb_node rb;$/;"	m	struct:ubifs_old_idx	typeref:struct:rb_node
rb	fs/ubifs/ubifs.h	/^	struct rb_node rb;$/;"	m	struct:ubifs_orphan	typeref:struct:rb_node
rb_augment_callbacks	include/linux/rbtree_augmented.h	/^struct rb_augment_callbacks {$/;"	s
rb_cdp_dm_auto	drivers/phy/marvell/comphy_a3700.h	/^#define rb_cdp_dm_auto	/;"	d
rb_cdp_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_cdp_en	/;"	d
rb_clk100m_125m_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_clk100m_125m_en	/;"	d
rb_clk500m_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_clk500m_en	/;"	d
rb_color	include/linux/rbtree_augmented.h	/^#define rb_color(/;"	d
rb_dcp_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_dcp_en	/;"	d
rb_enswitch_dm	drivers/phy/marvell/comphy_a3700.h	/^#define rb_enswitch_dm	/;"	d
rb_enswitch_dp	drivers/phy/marvell/comphy_a3700.h	/^#define rb_enswitch_dp	/;"	d
rb_entry	include/linux/rbtree.h	/^#define	rb_entry(/;"	d
rb_entry_safe	include/linux/rbtree.h	/^#define rb_entry_safe(/;"	d
rb_erase	lib/rbtree.c	/^void rb_erase(struct rb_node *node, struct rb_root *root)$/;"	f	typeref:typename:void
rb_erase_augmented	include/linux/rbtree_augmented.h	/^rb_erase_augmented(struct rb_node *node, struct rb_root *root,$/;"	f	typeref:typename:__always_inline void
rb_fast_dfe_enable	drivers/phy/marvell/comphy_a3700.h	/^#define rb_fast_dfe_enable	/;"	d
rb_first	lib/rbtree.c	/^struct rb_node *rb_first(const struct rb_root *root)$/;"	f	typeref:struct:rb_node *
rb_first_postorder	lib/rbtree.c	/^struct rb_node *rb_first_postorder(const struct rb_root *root)$/;"	f	typeref:struct:rb_node *
rb_force_calibration_done	drivers/phy/marvell/comphy_a3700.h	/^#define rb_force_calibration_done	/;"	d
rb_idle_sync_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_idle_sync_en	/;"	d
rb_insert_augmented	include/linux/rbtree_augmented.h	/^rb_insert_augmented(struct rb_node *node, struct rb_root *root,$/;"	f	typeref:typename:void
rb_insert_color	lib/rbtree.c	/^void rb_insert_color(struct rb_node *node, struct rb_root *root)$/;"	f	typeref:typename:void
rb_is_black	include/linux/rbtree_augmented.h	/^#define rb_is_black(/;"	d
rb_is_red	include/linux/rbtree_augmented.h	/^#define rb_is_red(/;"	d
rb_last	lib/rbtree.c	/^struct rb_node *rb_last(const struct rb_root *root)$/;"	f	typeref:struct:rb_node *
rb_left	include/linux/rbtree.h	/^	struct rb_node *rb_left;$/;"	m	struct:rb_node	typeref:struct:rb_node *
rb_left_deepest_node	lib/rbtree.c	/^static struct rb_node *rb_left_deepest_node(const struct rb_node *node)$/;"	f	typeref:struct:rb_node *	file:
rb_link_node	include/linux/rbtree.h	/^static inline void rb_link_node(struct rb_node * node, struct rb_node * parent,$/;"	f	typeref:typename:void
rb_map	include/fsl_ifc.h	/^	u32 rb_map;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
rb_mode_core_clk_freq_sel	drivers/phy/marvell/comphy_a3700.h	/^#define rb_mode_core_clk_freq_sel	/;"	d
rb_mode_margin_override	drivers/phy/marvell/comphy_a3700.h	/^#define rb_mode_margin_override	/;"	d
rb_mode_pipe_width_32	drivers/phy/marvell/comphy_a3700.h	/^#define rb_mode_pipe_width_32	/;"	d
rb_next	lib/rbtree.c	/^struct rb_node *rb_next(const struct rb_node *node)$/;"	f	typeref:struct:rb_node *
rb_next_postorder	lib/rbtree.c	/^struct rb_node *rb_next_postorder(const struct rb_node *node)$/;"	f	typeref:struct:rb_node *
rb_node	include/linux/rbtree.h	/^	struct rb_node *rb_node;$/;"	m	struct:rb_root	typeref:struct:rb_node *
rb_node	include/linux/rbtree.h	/^struct rb_node {$/;"	s
rb_parent	include/linux/rbtree.h	/^#define rb_parent(/;"	d
rb_pd_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pd_en	/;"	d
rb_phy_rx_init	drivers/phy/marvell/comphy_a3700.h	/^#define rb_phy_rx_init	/;"	d
rb_pin_pu_iveref	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_pu_iveref	/;"	d
rb_pin_pu_pll	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_pu_pll	/;"	d
rb_pin_pu_rx	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_pu_rx	/;"	d
rb_pin_pu_tx	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_pu_tx	/;"	d
rb_pin_reset_comphy	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_reset_comphy	/;"	d
rb_pin_reset_core	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_reset_core	/;"	d
rb_pin_tx_idle	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pin_tx_idle	/;"	d
rb_pll_ready_rx	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pll_ready_rx	/;"	d
rb_pll_ready_tx	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pll_ready_tx	/;"	d
rb_prev	lib/rbtree.c	/^struct rb_node *rb_prev(const struct rb_node *node)$/;"	f	typeref:struct:rb_node *
rb_pu_chrg_dtc	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pu_chrg_dtc	/;"	d
rb_pu_otg	drivers/phy/marvell/comphy_a3700.h	/^#define rb_pu_otg	/;"	d
rb_pulldown_strength	include/linux/mtd/nand.h	/^	u8 rb_pulldown_strength;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
rb_pulldown_strength_feat_addr	include/linux/mtd/nand.h	/^	u8 rb_pulldown_strength_feat_addr;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
rb_pulldown_strength_num_settings	include/linux/mtd/nand.h	/^	u8 rb_pulldown_strength_num_settings;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
rb_red_parent	lib/rbtree.c	/^static inline struct rb_node *rb_red_parent(struct rb_node *red)$/;"	f	typeref:struct:rb_node *	file:
rb_ref1m_gen_div_force	drivers/phy/marvell/comphy_a3700.h	/^#define rb_ref1m_gen_div_force	/;"	d
rb_ref_clk_sel	drivers/phy/marvell/comphy_a3700.h	/^#define rb_ref_clk_sel	/;"	d
rb_replace_node	lib/rbtree.c	/^void rb_replace_node(struct rb_node *victim, struct rb_node *new,$/;"	f	typeref:typename:void
rb_right	include/linux/rbtree.h	/^	struct rb_node *rb_right;$/;"	m	struct:rb_node	typeref:struct:rb_node *
rb_root	include/linux/rbtree.h	/^struct rb_root {$/;"	s
rb_rx_init_done	drivers/phy/marvell/comphy_a3700.h	/^#define rb_rx_init_done	/;"	d
rb_set_black	lib/rbtree.c	/^static inline void rb_set_black(struct rb_node *rb)$/;"	f	typeref:typename:void	file:
rb_set_parent	include/linux/rbtree_augmented.h	/^static inline void rb_set_parent(struct rb_node *rb, struct rb_node *p)$/;"	f	typeref:typename:void
rb_set_parent_color	include/linux/rbtree_augmented.h	/^static inline void rb_set_parent_color(struct rb_node *rb,$/;"	f	typeref:typename:void
rb_stat	include/fsl_ifc.h	/^	u32 rb_stat;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
rb_txdclk_pclk_en	drivers/phy/marvell/comphy_a3700.h	/^#define rb_txdclk_pclk_en	/;"	d
rb_usb2phy2_pu	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy2_pu	/;"	d
rb_usb2phy2_suspm	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy2_suspm	/;"	d
rb_usb2phy_impcal_done	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy_impcal_done	/;"	d
rb_usb2phy_pll_ready	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy_pll_ready	/;"	d
rb_usb2phy_pllcal_done	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy_pllcal_done	/;"	d
rb_usb2phy_pu	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy_pu	/;"	d
rb_usb2phy_sqcal_done	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy_sqcal_done	/;"	d
rb_usb2phy_suspm	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb2phy_suspm	/;"	d
rb_usb3_ctr_100ns	drivers/phy/marvell/comphy_a3700.h	/^#define rb_usb3_ctr_100ns	/;"	d
rb_use_max_pll_rate	drivers/phy/marvell/comphy_a3700.h	/^#define rb_use_max_pll_rate	/;"	d
rbar	arch/arm/include/asm/armv7m.h	/^	uint32_t rbar;		\/* Region Base Address Register *\/$/;"	m	struct:v7m_mpu	typeref:typename:uint32_t
rbase	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbase;		\/* RX Desc Base Addr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbase	include/commproc.h	/^	ushort	rbase;		\/* Rx Buffer descriptor base address *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
rbase	include/tsec.h	/^	u32	rbase;		\/* RxBD Base Address *\/$/;"	m	struct:tsec	typeref:typename:u32
rbase	include/usb/mpc8xx_udc.h	/^	ushort rbase;	\/* RxBD base address *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
rbase	post/cpu/mpc8xx/usb.c	/^	ushort rbase;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
rbase0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase0;		\/* 0x24404 - Receive Descriptor Base Address of Ring 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase1;		\/* 0x2440C - Receive Descriptor Base Address of Ring 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase2;		\/* 0x24414 - Receive Descriptor Base Address of Ring 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase3;		\/* 0x2441C - Receive Descriptor Base Address of Ring 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase4;		\/* 0x24424 - Receive Descriptor Base Address of Ring 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase5;		\/* 0x2442C - Receive Descriptor Base Address of Ring 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase6;		\/* 0x24434 - Receive Descriptor Base Address of Ring 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbase7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbase7;		\/* 0x2443C - Receive Descriptor Base Address of Ring 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbaseh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbaseh;		\/* RX Desc Base Addr High 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbaseh	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbaseh;		\/* 0x24400 - Receive Descriptor Base Address High 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbaseh1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbaseh1;	\/* RX Desc Base Addr High 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbaseh2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbaseh2;	\/* RX Desc Base Addr High 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbaseh3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbaseh3;	\/* RX Desc Base Addr High 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbasel1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbasel1;	\/* RX Desc Base Addr Low 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbasel2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbasel2;	\/* RX Desc Base Addr Low 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbasel3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbasel3;	\/* RX Desc Base Addr Low 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbbm_soft_reset	drivers/video/ati_radeon_fb.h	/^	u32		rbbm_soft_reset;$/;"	m	struct:radeon_regs	typeref:typename:u32
rbc	drivers/i2c/i2c-uniphier-f.c	/^	u32 rbc;			\/* Rx byte count setting *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
rbca	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbca;		\/* RX Broadcast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbca	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbca;		\/* 0x246ac - Receive Broadcast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbca	drivers/qe/uec.h	/^	u32 rbca;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rbca	include/fsl_dtsec.h	/^	u32	rbca;		\/* Receive broadcast packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
rbca	include/linux/immap_qe.h	/^	u32 rbca;		\/* Total number of frames received succesfully$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rbca	include/tsec.h	/^	u32	rbca;		\/* Receive Broadcast Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rbcm	drivers/i2c/i2c-uniphier-f.c	/^	u32 rbcm;			\/* Rx byte count monitor *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
rbcnt	include/usb/mpc8xx_udc.h	/^	ushort rbcnt;	\/* Receive byte count *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
rbcnt	post/cpu/mpc8xx/usb.c	/^	ushort rbcnt;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
rbct	drivers/spi/fsl_qspi.h	/^	u32 rbct;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
rbd	drivers/net/mpc512x_fec.h	/^	FEC_RBD rbd[FEC_RBD_NUM];			\/* RBD ring *\/$/;"	m	struct:__anonf8b8c0fc0408	typeref:typename:FEC_RBD[]
rbdBase	drivers/net/mpc5xxx_fec.h	/^	FEC_RBD *rbdBase;		\/* RBD ring *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:FEC_RBD *
rbdIndex	drivers/net/mpc512x_fec.h	/^	u16 rbdIndex;			\/* next receive BD to read *\/$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:u16
rbdIndex	drivers/net/mpc5xxx_fec.h	/^	uint16 rbdIndex;		\/* next receive BD to read *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:uint16
rbd_base	drivers/net/fec_mxc.h	/^	struct fec_bd *rbd_base;	\/* RBD ring *\/$/;"	m	struct:fec_priv	typeref:struct:fec_bd *
rbd_index	drivers/net/fec_mxc.h	/^	int rbd_index;			\/* next receive BD to read *\/$/;"	m	struct:fec_priv	typeref:typename:int
rbdbph	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rbdbph;		\/* 0x2437C - Receive Data Buffer Pointer High *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void rbdl_dump(void)$/;"	f	typeref:typename:void	file:
rbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void rbdl_dump(const struct phy_param *phy_param)$/;"	f	typeref:typename:void	file:
rbdlen	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbdlen;		\/* RxBD Data Len *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbdlen	include/tsec.h	/^	u32	rbdlen;		\/* RxBD Data Length *\/$/;"	m	struct:tsec	typeref:typename:u32
rbdqptr	drivers/qe/uec.h	/^	u32  rbdqptr;             \/* RxBD parameter table description *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
rbdr	drivers/spi/fsl_qspi.h	/^	u32 rbdr[32];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[32]
rbf_t	drivers/net/at91_emac.c	/^} rbf_t;$/;"	t	typeref:struct:__anon5765bb0e0108	file:
rbfdt	drivers/net/at91_emac.c	/^	rbf_t 		rbfdt[RBF_FRAMEMAX];$/;"	m	struct:__anon5765bb0e0208	typeref:typename:rbf_t[]	file:
rbifx	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rbifx;		\/* 0x24330 - Receive bit field extract control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbindex	drivers/net/at91_emac.c	/^	unsigned long	rbindex;$/;"	m	struct:__anon5765bb0e0208	typeref:typename:unsigned long	file:
rbptr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptr;		\/* RX Buffer Desc Ptr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptr	include/commproc.h	/^	ushort	rbptr;		\/* rb BD Pointer *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
rbptr	include/tsec.h	/^	u32	rbptr;		\/* RxBD Pointer *\/$/;"	m	struct:tsec	typeref:typename:u32
rbptr	include/usb/mpc8xx_udc.h	/^	ushort rbptr;	\/* RxBD pointer Next Buffer Descriptor *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
rbptr	post/cpu/mpc8xx/usb.c	/^	ushort rbptr;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
rbptr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr0;		\/* 0x24384 - Receive Buffer Descriptor Pointer for Ring 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr1;		\/* 0x2438C - Receive Buffer Descriptor Pointer for Ring 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr2;		\/* 0x24394 - Receive Buffer Descriptor Pointer for Ring 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr3;		\/* 0x2439C - Receive Buffer Descriptor Pointer for Ring 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr4;		\/* 0x243A4 - Receive Buffer Descriptor Pointer for Ring 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr5;		\/* 0x243AC - Receive Buffer Descriptor Pointer for Ring 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr6;		\/* 0x243B4 - Receive Buffer Descriptor Pointer for Ring 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbptr7;		\/* 0x243BC - Receive Buffer Descriptor Pointer for Ring 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbptrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrh;		\/* RX Buffer Desc Ptr High 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptrh1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrh1;	\/* RX Buffer Desc Ptr High 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptrh2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrh2;	\/* RX Buffer Desc Ptr High 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptrh3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrh3;	\/* RX Buffer Desc Ptr High 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptrl1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrl1;	\/* RX Buffer Desc Ptr Low 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptrl2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrl2;	\/* RX Buffer Desc Ptr Low 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbptrl3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbptrl3;	\/* RX Buffer Desc Ptr Low 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbqp	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 rbqp;$/;"	m	struct:at91_emac	typeref:typename:u32
rbr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	rbr;$/;"	m	union:pxa_uart_regs::__anon3c298eb7010a	typeref:typename:uint32_t
rbr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int rbr; \/* Receive buffer register. *\/$/;"	m	struct:rk_uart	typeref:typename:unsigned int
rbr	arch/blackfin/include/asm/serial1.h	/^	u16 rbr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
rbr	arch/blackfin/include/asm/serial4.h	/^	u32 rbr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
rbsr	drivers/net/ftgmac100.h	/^	unsigned int	rbsr;		\/* 0x4c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rbsr	drivers/spi/fsl_qspi.h	/^	u32 rbsr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
rbtree_postorder_for_each_entry_safe	include/linux/rbtree.h	/^#define rbtree_postorder_for_each_entry_safe(/;"	d
rbwtcnt	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rbwtcnt;$/;"	m	struct:r8a7740_bsc	typeref:typename:u32
rbwtcnt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rbwtcnt;$/;"	m	struct:sh73a0_bsc	typeref:typename:u32
rbyt	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rbyt;		\/* RX Byte Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rbyt	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rbyt;		\/* 0x2469c - Receive Byte Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rbyt	drivers/qe/uec.h	/^	u32 rbyt;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rbyt	include/fsl_dtsec.h	/^	u32	rbyt;		\/* Receive byte counter *\/$/;"	m	struct:dtsec	typeref:typename:u32
rbyt	include/linux/immap_qe.h	/^	u32 rbyt;		\/* Total number of octets received including$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rbyt	include/tsec.h	/^	u32	rbyt;		\/* Receive Byte Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rc	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rc;			\/* 0x2C: EMC_RC *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rc	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		rc;	\/* 0x1C Register C *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
rc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
rc	board/mpl/pati/pati.c	/^	unsigned char rc;		\/* Auto Refresh to Active Time 0:<75ns 1:<100ns *\/$/;"	m	struct:__anon377858d00108	typeref:typename:unsigned char	file:
rc4_encode	lib/rc4.c	/^void rc4_encode(unsigned char *buf, unsigned int len, unsigned char key[16])$/;"	f	typeref:typename:void
rc4_key	tools/rkcommon.c	/^static unsigned char rc4_key[16] = {$/;"	v	typeref:typename:unsigned char[16]	file:
rc_ier	drivers/net/ks8851_mll.c	/^	u16			rc_ier;$/;"	m	struct:ks_net	typeref:typename:u16	file:
rc_qos_ord	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 rc_qos_ord;		\/* read channel QoS Value Override *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
rc_qos_ord	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 rc_qos_ord;		\/* read channel QoS Value Override *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
rc_rxqcr	drivers/net/ks8851_mll.c	/^	u16			rc_rxqcr;$/;"	m	struct:ks_net	typeref:typename:u16	file:
rc_txcr	drivers/net/ks8851_mll.c	/^	u16			rc_txcr;$/;"	m	struct:ks_net	typeref:typename:u16	file:
rca	include/mmc.h	/^	ushort rca;$/;"	m	struct:mmc	typeref:typename:ushort
rcar_axi_qos	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_axi_qos {$/;"	s
rcar_clock_gen	drivers/i2c/rcar_i2c.c	/^static u32 rcar_clock_gen(int i2c_no, u32 bus_speed)$/;"	f	typeref:typename:u32	file:
rcar_dbsc3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_dbsc3 {$/;"	s
rcar_dbsc3_qos	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_dbsc3_qos {$/;"	s
rcar_gpio	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_gpio {$/;"	s
rcar_i2c	drivers/i2c/rcar_i2c.c	/^struct rcar_i2c {$/;"	s	file:
rcar_i2c_init	drivers/i2c/rcar_i2c.c	/^rcar_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
rcar_i2c_probe	drivers/i2c/rcar_i2c.c	/^rcar_i2c_probe(struct i2c_adapter *adap, u8 dev)$/;"	f	typeref:typename:int	file:
rcar_i2c_raw_read	drivers/i2c/rcar_i2c.c	/^rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr)$/;"	f	typeref:typename:u8	file:
rcar_i2c_raw_rw_common	drivers/i2c/rcar_i2c.c	/^static void rcar_i2c_raw_rw_common(struct rcar_i2c *dev, u8 chip, uint addr)$/;"	f	typeref:typename:void	file:
rcar_i2c_raw_rw_finish	drivers/i2c/rcar_i2c.c	/^static void rcar_i2c_raw_rw_finish(struct rcar_i2c *dev)$/;"	f	typeref:typename:void	file:
rcar_i2c_raw_write	drivers/i2c/rcar_i2c.c	/^rcar_i2c_raw_write(struct rcar_i2c *dev, u8 chip, uint addr, u8 *val, int size)$/;"	f	typeref:typename:int	file:
rcar_i2c_read	drivers/i2c/rcar_i2c.c	/^static int rcar_i2c_read(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
rcar_i2c_set_bus_speed	drivers/i2c/rcar_i2c.c	/^static unsigned int rcar_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
rcar_i2c_write	drivers/i2c/rcar_i2c.c	/^static int rcar_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr,$/;"	f	typeref:typename:int	file:
rcar_lbsc	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_lbsc {$/;"	s
rcar_mxi	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_mxi {$/;"	s
rcar_mxi_qos	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_mxi_qos {$/;"	s
rcar_rwdt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_rwdt {$/;"	s
rcar_rwdt	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^struct rcar_rwdt {$/;"	s
rcar_s3c	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_s3c {$/;"	s
rcar_s3c_qos	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_s3c_qos {$/;"	s
rcar_swdt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^struct rcar_swdt {$/;"	s
rcar_swdt	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^struct rcar_swdt {$/;"	s
rcba	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t rcba;$/;"	m	struct:pei_data	typeref:typename:uint32_t
rcba	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t rcba;$/;"	m	struct:pei_data	typeref:typename:uint32_t
rcba_config	arch/x86/cpu/ivybridge/sdram.c	/^static void rcba_config(void)$/;"	f	typeref:typename:void	file:
rccr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rccr;$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u32
rcd	board/mpl/pati/pati.c	/^	unsigned char rcd;		\/* ras to cas delay  0:<25ns 1:<50ns*\/$/;"	m	struct:__anon377858d00108	typeref:typename:unsigned char	file:
rcde	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rcde;		\/* RX Code Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rcde	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rcde;		\/* 0x246c4 - Receive Code Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rcde	include/fsl_dtsec.h	/^	u32	rcde;		\/* Receive code error *\/$/;"	m	struct:dtsec	typeref:typename:u32
rcde	include/tsec.h	/^	u32	rcde;		\/* Receive Code Error *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rcer	arch/powerpc/include/asm/immap_512x.h	/^	u32 rcer;		\/* Reset Control Enable Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rcer	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rcer;		\/* Reset Control Enable Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rcfg	tools/kwbimage.h	/^	struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];$/;"	m	struct:ext_hdr_v0	typeref:struct:ext_hdr_v0_reg[]
rcfg_ctl	board/freescale/common/qixis.h	/^	u8 rcfg_ctl;    \/* Reconfig Control Register,0x10 *\/$/;"	m	struct:qixis	typeref:typename:u8
rcfg_st	board/freescale/common/qixis.h	/^	u8 rcfg_st;$/;"	m	struct:qixis	typeref:typename:u8
rcl_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 rcl_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
rcl_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 rcl_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
rcl_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 rcl_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
rcm	arch/m68k/include/asm/immap_520x.h	/^typedef struct rcm {$/;"	s
rcm	arch/m68k/include/asm/immap_5227x.h	/^typedef struct rcm {$/;"	s
rcm	arch/m68k/include/asm/immap_5275.h	/^typedef struct rcm {$/;"	s
rcm	arch/m68k/include/asm/immap_5301x.h	/^typedef struct rcm {$/;"	s
rcm	arch/m68k/include/asm/immap_5329.h	/^typedef struct rcm {$/;"	s
rcm	arch/m68k/include/asm/immap_5441x.h	/^typedef struct rcm {$/;"	s
rcm	arch/m68k/include/asm/immap_5445x.h	/^typedef struct rcm {$/;"	s
rcm_t	arch/m68k/include/asm/immap_520x.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcm_t	arch/m68k/include/asm/immap_5227x.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcm_t	arch/m68k/include/asm/immap_5275.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcm_t	arch/m68k/include/asm/immap_5301x.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcm_t	arch/m68k/include/asm/immap_5329.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcm_t	arch/m68k/include/asm/immap_5441x.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcm_t	arch/m68k/include/asm/immap_5445x.h	/^} rcm_t;$/;"	t	typeref:struct:rcm
rcon	arch/m68k/include/asm/immap_520x.h	/^	u16 rcon;		\/* 0x04 Reset Cfg *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
rcon	arch/m68k/include/asm/immap_5227x.h	/^	u16 rcon;		\/* Reset Configuration (Rd-only) *\/$/;"	m	struct:ccm	typeref:typename:u16
rcon	arch/m68k/include/asm/immap_5235.h	/^	u16 rcon;		\/* 0x08 Rreset configuration register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
rcon	arch/m68k/include/asm/immap_5301x.h	/^	u16 rcon;		\/* 0x04 Reset Cfg *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
rcon	arch/m68k/include/asm/immap_5329.h	/^	u16 rcon;		\/* 0x04 Rreset configuration register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
rcon	arch/m68k/include/asm/immap_5441x.h	/^	u16 rcon;		\/* 0x08 Reset Configuration *\/$/;"	m	struct:ccm	typeref:typename:u16
rcon	arch/m68k/include/asm/immap_5445x.h	/^	u16 rcon;		\/* Reset Configuration (256 TEPBGA, Read-only) *\/$/;"	m	struct:ccm	typeref:typename:u16
rcon	lib/aes.c	/^static u8 rcon[11] = {$/;"	v	typeref:typename:u8[11]	file:
rcosc_config0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config0;			\/* offset 0x0010 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config0_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config0_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config0_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config1;			\/* offset 0x0020 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config1_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config1_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config1_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config1_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config1_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config1_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config2;			\/* offset 0x0030 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config2_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config2_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config2_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config2_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcosc_config2_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t rcosc_config2_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
rcount	include/commproc.h	/^	ushort	rcount;		\/* Rx internal byte count *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
rcr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32		rcr;		\/* 0x00 MC Remap Control Register *\/$/;"	m	struct:at91_mc	typeref:typename:u32
rcr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	rcr;		\/* 0x104 Receive Counter Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
rcr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 rcr;$/;"	m	struct:ssi	typeref:typename:u32
rcr	arch/m68k/include/asm/fec.h	/^	u32 rcr;		\/* 0x104 *\/$/;"	m	struct:fec	typeref:typename:u32
rcr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rcr;		\/* 0x084 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rcr	arch/m68k/include/asm/immap_520x.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5227x.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5235.h	/^	u8 rcr;			\/* 0x01 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5275.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5301x.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5329.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5441x.h	/^	u32 rcr;		\/* 0x188 *\/$/;"	m	struct:sdramc	typeref:typename:u32
rcr	arch/m68k/include/asm/immap_5441x.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/m68k/include/asm/immap_5445x.h	/^	u8 rcr;$/;"	m	struct:rcm	typeref:typename:u8
rcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 rcr;		\/* Reset Control Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rcr;		\/* Reset Control Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rcr_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 rcr_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
rcr_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 rcr_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
rcr_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 rcr_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
rcrc	include/commproc.h	/^	ulong	rcrc;		\/* temp receive CRC *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
rcrcr	arch/m68k/include/asm/immap_5441x.h	/^	u32 rcrcr;		\/* 0x180 *\/$/;"	m	struct:sdramc	typeref:typename:u32
rcrdbg	arch/m68k/include/asm/immap_5441x.h	/^	u32 rcrdbg;		\/* 0x190 *\/$/;"	m	struct:sdramc	typeref:typename:u32
rcse	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rcse;		\/* RX Carrier Sense Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rcse	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rcse;		\/* 0x246c8 - Receive Carrier Sense Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rcse	include/fsl_dtsec.h	/^	u32	rcse;		\/* Receive carrier sense error *\/$/;"	m	struct:dtsec	typeref:typename:u32
rcse	include/tsec.h	/^	u32	rcse;		\/* Receive Carrier Sense Error *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rcsr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 rcsr;	\/* CCM Status *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
rcsr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 rcsr;$/;"	m	struct:clock_control_regs	typeref:typename:u32
rcsr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 rcsr;	\/* CCM Status *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
rctl	arch/x86/include/asm/arch-quark/quark.h	/^	u32	rctl;$/;"	m	struct:quark_rcba	typeref:typename:u32
rctl	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rctl;$/;"	m	struct:tnc_rcba	typeref:typename:u32
rctrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rctrl;		\/* RX Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rctrl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rctrl;		\/* 0x24300 - Receive Control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rctrl	include/fsl_dtsec.h	/^	u32	rctrl;		\/* Receive control register *\/$/;"	m	struct:dtsec	typeref:typename:u32
rctrl	include/tsec.h	/^	u32	rctrl;		\/* Receive Control *\/$/;"	m	struct:tsec	typeref:typename:u32
rcu	fs/ubifs/ubifs.h	/^	struct rcu_head		rcu;$/;"	m	struct:super_block	typeref:struct:rcu_head
rcu_head	include/linux/compat.h	/^#define rcu_head /;"	d
rcv	include/usbdevice.h	/^	struct urb_link rcv;	\/* received urbs *\/$/;"	m	struct:usb_endpoint_instance	typeref:struct:urb_link
rcv_attributes	include/usbdevice.h	/^	int rcv_attributes;	\/* copy of bmAttributes from endpoint descriptor *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
rcv_packetSize	include/usbdevice.h	/^	int rcv_packetSize;	\/* maximum packet size from endpoint descriptor *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
rcv_queue	include/usbdevice.h	/^	int rcv_queue;$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
rcv_sel	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 rcv_sel:2;		\/* select between High and Normal  *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
rcv_transferSize	include/usbdevice.h	/^	int rcv_transferSize;	\/* maximum transfer size from function driver *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
rcv_urb	include/usbdevice.h	/^	struct urb *rcv_urb;	\/* active urb *\/$/;"	m	struct:usb_endpoint_instance	typeref:struct:urb *
rcvn	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t rcvn[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[][][]
rcvn_cal	arch/x86/cpu/quark/smc.c	/^void rcvn_cal(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
rcvrd_mst_node	fs/ubifs/ubifs.h	/^	struct ubifs_mst_node *rcvrd_mst_node;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_mst_node *
rcw	include/common_timing_params.h	/^	unsigned char rcw[16];	\/* Register Control Word 0-15 *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned char[16]
rcw	include/ddr_spd.h	/^			unsigned char rcw[8];$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char[8]
rcw	include/fsl_ddr_dimm_params.h	/^	unsigned char rcw[16];	\/* Register Control Word 0-15 *\/$/;"	m	struct:dimm_params_s	typeref:typename:unsigned char[16]
rcw1	drivers/net/xilinx_axi_emac.c	/^	u32 rcw1; \/* 0x404: Rx Configuration Word 1 *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
rcw_1	include/fsl_ddr_sdram.h	/^	unsigned int rcw_1;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
rcw_2	include/fsl_ddr_sdram.h	/^	unsigned int rcw_2;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
rcw_ad	board/freescale/common/qixis.h	/^	u8 rcw_ad[2];   \/* RCW SRAM Address Registers,0x70 *\/$/;"	m	struct:qixis	typeref:typename:u8[2]
rcw_completion	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rcw_completion;		\/* 0x104 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rcw_ctl	board/freescale/common/qixis.h	/^	u8 rcw_ctl;$/;"	m	struct:qixis	typeref:typename:u8
rcw_data	board/freescale/common/qixis.h	/^	u8 rcw_data;$/;"	m	struct:qixis	typeref:typename:u8
rcw_data	tools/pblimage.h	/^	uint8_t rcw_data[RCW_BYTES];$/;"	m	struct:pbl_header	typeref:typename:uint8_t[]
rcw_override	include/fsl_ddr_sdram.h	/^	unsigned int rcw_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
rcw_reqr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rcw_reqr;			\/* 0x100 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rcwh	arch/powerpc/include/asm/immap_512x.h	/^	u32 rcwh;		\/* Reset Configuration Word High Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rcwh	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rcwh;		\/* Reset Configuration Word High Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rcwheader	tools/pblimage.h	/^	uint32_t rcwheader;$/;"	m	struct:pbl_header	typeref:typename:uint32_t
rcwl	arch/powerpc/include/asm/immap_512x.h	/^	u32 rcwl;		\/* Reset Configuration Word Low Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rcwl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rcwl;		\/* Reset Configuration Word Low Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rcwpmuxcr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rcwpmuxcr0;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rcwsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     rcwsr[16];      \/* Reset control word status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[16]
rcwsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	rcwsr[32];	\/* Reset control word status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[32]
rcwsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     rcwsr[16];      \/* Reset control word status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[16]
rcwsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rcwsr[16];	\/* Reset control word status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[16]
rd0	drivers/net/sh_eth.h	/^	volatile u32 rd0;$/;"	m	struct:rx_desc_s	typeref:typename:volatile u32
rd1	drivers/net/sh_eth.h	/^	volatile u32 rd1;$/;"	m	struct:rx_desc_s	typeref:typename:volatile u32
rd2	drivers/net/sh_eth.h	/^	u32 rd2;		\/* Buffer start *\/$/;"	m	struct:rx_desc_s	typeref:typename:u32
rd78460AXP_GP_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG rd78460AXP_GP_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
rd78460_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG rd78460_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
rd78460customer_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG rd78460customer_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
rd78460gp_twsi_dev	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^u8 rd78460gp_twsi_dev[] = { 0x4C, 0x4D, 0x4E };$/;"	v	typeref:typename:u8[]
rd78460nas_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG rd78460nas_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
rd78460server_rev2_serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG rd78460server_rev2_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
rd_chan	drivers/video/ipu_regs.h	/^	u32 rd_chan;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
rd_data_path	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 rd_data_path;	\/* 0x5c: Read Datapath Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
rd_dc_cst	arch/powerpc/cpu/mpc8xx/start.S	/^rd_dc_cst:$/;"	l
rd_dr	drivers/serial/serial_stm32x7.h	/^	u32 rd_dr;$/;"	m	struct:stm32_usart	typeref:typename:u32
rd_end	include/image.h	/^	ulong		rd_start, rd_end;\/* ramdisk start\/end *\/$/;"	m	struct:bootm_headers	typeref:typename:ulong
rd_fetch	arch/arm/mach-exynos/clock_init.h	/^	unsigned rd_fetch;$/;"	m	struct:mem_timings	typeref:typename:unsigned
rd_hold	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned rd_hold;$/;"	m	struct:aemif_config	typeref:typename:unsigned
rd_ic_cst	arch/powerpc/cpu/mpc8xx/start.S	/^rd_ic_cst:$/;"	l
rd_io	drivers/video/mb862xx.c	/^#define	rd_io	/;"	d	file:
rd_io	drivers/video/mb862xx.c	/^#define	rd_io(/;"	d	file:
rd_odt_value	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t rd_odt_value;$/;"	m	struct:mrc_params	typeref:typename:uint8_t
rd_params	drivers/mtd/nand/kirkwood_nand.c	/^	u32 rd_params;	\/* 0x10418 *\/$/;"	m	struct:kwnandf_registers	typeref:typename:u32	file:
rd_rcd	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rd_rcd;		\/* 0x4C: EMC_RD_RCD *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rd_rdid	drivers/mtd/altera_qspi.c	/^	u32	rd_rdid;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
rd_rdy_dly	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 rd_rdy_dly;$/;"	m	struct:dram_info	typeref:typename:u32
rd_sample_mask	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^static u32 rd_sample_mask[] = {$/;"	v	typeref:typename:u32[]	file:
rd_setup	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned rd_setup;$/;"	m	struct:aemif_config	typeref:typename:unsigned
rd_sid	drivers/mtd/altera_qspi.c	/^	u32	rd_sid;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
rd_smpl_dly	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 rd_smpl_dly;$/;"	m	struct:dram_info	typeref:typename:u32
rd_start	arch/arm/include/asm/setup.h	/^	    unsigned long rd_start;		\/* 72 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
rd_start	include/image.h	/^	ulong		rd_start, rd_end;\/* ramdisk start\/end *\/$/;"	m	struct:bootm_headers	typeref:typename:ulong
rd_status	drivers/mtd/altera_qspi.c	/^	u32	rd_status;$/;"	m	struct:altera_qspi_regs	typeref:typename:u32	file:
rd_strobe	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned rd_strobe;$/;"	m	struct:aemif_config	typeref:typename:unsigned
rd_train	arch/x86/cpu/quark/smc.c	/^void rd_train(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
rdar	arch/m68k/include/asm/fec.h	/^	u32 rdar;		\/* 0x10 *\/$/;"	m	struct:fec	typeref:typename:u32
rdata	include/spartan2.h	/^	xilinx_rdata_fn	rdata;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_rdata_fn
rdata	include/spartan3.h	/^	xilinx_rdata_fn	rdata;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_rdata_fn
rdata	include/virtex2.h	/^	xilinx_rdata_fn	rdata;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_rdata_fn
rdata	include/virtex2.h	/^	xilinx_rdata_fn	rdata;$/;"	m	struct:__anoncbf344e20208	typeref:typename:xilinx_rdata_fn
rdata	tools/kwbimage.h	/^	uint32_t rdata;$/;"	m	struct:ext_hdr_v0_reg	typeref:typename:uint32_t
rdb	disk/part_amiga.c	/^static struct rigid_disk_block rdb = {0};$/;"	v	typeref:struct:rigid_disk_block	file:
rdb	drivers/bios_emulator/x86emu/sys.c	/^u8 X86API rdb(u32 addr)$/;"	f	typeref:typename:u8 X86API
rdb_blocks_hi	disk/part_amiga.h	/^    u32 rdb_blocks_hi;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
rdb_blocks_lo	disk/part_amiga.h	/^    u32 rdb_blocks_lo;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
rdc_ma_cfg_t	arch/arm/include/asm/imx-common/rdc-sema.h	/^typedef u32 rdc_ma_cfg_t;$/;"	t	typeref:typename:u32
rdc_peri_cfg_t	arch/arm/include/asm/imx-common/rdc-sema.h	/^typedef u32 rdc_peri_cfg_t;$/;"	t	typeref:typename:u32
rdc_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct rdc_regs {$/;"	s
rdc_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct rdc_regs {$/;"	s
rdc_sema_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct rdc_sema_regs {$/;"	s
rdc_sema_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct rdc_sema_regs {$/;"	s
rdcc	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rdcc;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rdcc	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rdcc;$/;"	m	struct:sdram_timing_clks	typeref:typename:u32	file:
rdconfig	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	rdconfig;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
rdctl	arch/nios2/include/asm/nios2.h	/^#define rdctl(/;"	d
rdctrl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rdctrl;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
rddid	drivers/video/scf0403_lcd.c	/^	u32 rddid;$/;"	m	struct:scf0403_priv	typeref:typename:u32	file:
rddsp	arch/mips/include/asm/mipsregs.h	/^#define rddsp(/;"	d
rdes0	drivers/net/uli526x.c	/^	u32 rdes0, rdes1, rdes2, rdes3;	\/* Data for the card *\/$/;"	m	struct:rx_desc	typeref:typename:u32	file:
rdes1	drivers/net/uli526x.c	/^	u32 rdes0, rdes1, rdes2, rdes3;	\/* Data for the card *\/$/;"	m	struct:rx_desc	typeref:typename:u32	file:
rdes2	drivers/net/uli526x.c	/^	u32 rdes0, rdes1, rdes2, rdes3;	\/* Data for the card *\/$/;"	m	struct:rx_desc	typeref:typename:u32	file:
rdes3	drivers/net/uli526x.c	/^	u32 rdes0, rdes1, rdes2, rdes3;	\/* Data for the card *\/$/;"	m	struct:rx_desc	typeref:typename:u32	file:
rdes_data0	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rdes_data0;		\/* MBAR_ETH + 0x1D8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rdes_data1	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rdes_data1;		\/* MBAR_ETH + 0x1DC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rdfd	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 rdfd;	\/* Receive Data FIFO 32bit wide Data read port (RO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
rdfo	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 rdfo;	\/* Receive Data FIFO Occupancy (RO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
rdfr	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 rdfr;	\/* Receive Data FIFO Reset (WO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
rdgr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	rdgr[4];	\/* Rank DQS Gating *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[4]
rdgr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 rdgr0;		\/* 0x5c rank dqs gating register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rdgr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 rdgr0;		\/* 0x5c rank dqs gating register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rdgr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 rdgr1;		\/* 0x60 rank dqs gating register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rdgr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 rdgr1;		\/* 0x60 rank dqs gating register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rdimm0	board/freescale/corenet_ds/ddr.c	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
rdimm0	board/freescale/ls2080a/ddr.h	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm0	board/freescale/ls2080aqds/ddr.h	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm0	board/freescale/ls2080ardb/ddr.h	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm0	board/freescale/mpc8572ds/ddr.c	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
rdimm0	board/freescale/t208xqds/ddr.h	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm0	board/freescale/t4qds/ddr.h	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm0	board/freescale/t4rdb/ddr.h	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm0	board/varisys/cyrus/ddr.c	/^static const struct board_specific_parameters rdimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
rdimm1	board/freescale/mpc8572ds/ddr.c	/^static const struct board_specific_parameters rdimm1[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
rdimm2	board/freescale/ls2080a/ddr.h	/^static const struct board_specific_parameters rdimm2[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm2	board/freescale/ls2080aqds/ddr.h	/^static const struct board_specific_parameters rdimm2[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimm2	board/freescale/ls2080ardb/ddr.h	/^static const struct board_specific_parameters rdimm2[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
rdimmcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rdimmcr[2];		\/* 0xdc RDIMM control register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
rdimmcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rdimmcr[2];		\/* 0xdc RDIMM control register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
rdimmgcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rdimmgcr[2];	\/* 0xd4 RDIMM general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
rdimmgcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rdimmgcr[2];	\/* 0xd4 RDIMM general configuration register *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32[2]
rdimms	board/freescale/corenet_ds/ddr.c	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
rdimms	board/freescale/ls2080a/ddr.h	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
rdimms	board/freescale/ls2080aqds/ddr.h	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
rdimms	board/freescale/ls2080ardb/ddr.h	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
rdimms	board/freescale/mpc8572ds/ddr.c	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
rdimms	board/freescale/t208xqds/ddr.h	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
rdimms	board/freescale/t4qds/ddr.h	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
rdimms	board/freescale/t4rdb/ddr.h	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
rdimms	board/varisys/cyrus/ddr.c	/^static const struct board_specific_parameters *rdimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
rdl	drivers/bios_emulator/x86emu/sys.c	/^u32 X86API rdl(u32 addr)$/;"	f	typeref:typename:u32 X86API
rdlvl_config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int rdlvl_config;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
rdlvl_config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int rdlvl_config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
rdmsr	arch/x86/include/asm/msr.h	/^#define rdmsr(/;"	d
rdmsr_safe	arch/x86/include/asm/msr.h	/^#define rdmsr_safe(/;"	d
rdmsr_safe_regs	arch/x86/include/asm/msr.h	/^static inline int rdmsr_safe_regs(u32 regs[8])$/;"	f	typeref:typename:int
rdmsrl	arch/x86/include/asm/msr.h	/^#define rdmsrl(/;"	d
rdmsrl_amd_safe	arch/x86/include/asm/msr.h	/^static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)$/;"	f	typeref:typename:int
rdpmc	arch/x86/include/asm/msr.h	/^#define rdpmc(/;"	d
rdqs	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t rdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[][][]
rdr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		rdr;		\/* 0x08 Receive Data Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
rdr	include/atmel_mci.h	/^	u32	rdr;	\/* 0x30 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
rdrp	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rdrp;		\/* RX Drop Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rdrp	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rdrp;		\/* 0x246dc - Receive Drop Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rdrp	include/fsl_dtsec.h	/^	u32	rdrp;		\/* Receive drop counter *\/$/;"	m	struct:dtsec	typeref:typename:u32
rdrp	include/tsec.h	/^	u32	rdrp;		\/* Receive Drop *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rdsta	include/fsl_sec.h	/^	u32 rdsta;		\/*RNG DRNG Status Register*\/$/;"	m	struct:rng4tst	typeref:typename:u32
rdtmg	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rdtmg;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
rdto	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	rdto;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
rdtomiss	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 rdtomiss:6;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:6
rdtowr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 rdtowr:5;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:5
rdtsc	arch/x86/include/asm/u-boot-x86.h	/^static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)$/;"	f	typeref:typename:uint64_t
rdtscl	arch/x86/include/asm/msr.h	/^#define rdtscl(/;"	d
rdtscll	arch/x86/include/asm/msr.h	/^#define rdtscll(/;"	d
rdtscp	arch/x86/include/asm/msr.h	/^#define rdtscp(/;"	d
rdtscpll	arch/x86/include/asm/msr.h	/^#define rdtscpll(/;"	d
rdv	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rdv;		\/* 0x6C: EMC_RDV *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rdw	drivers/bios_emulator/x86emu/sys.c	/^u16 X86API rdw(u32 addr)$/;"	f	typeref:typename:u16 X86API
rdy	drivers/net/xilinx_ll_temac.h	/^	u32 rdy;	\/* Ready Status *\/$/;"	m	struct:temac_reg	typeref:typename:u32
rdy	include/usbdevice.h	/^	struct urb_link rdy;	\/* empty urbs ready to receive *\/$/;"	m	struct:usb_endpoint_instance	typeref:struct:urb_link
rdy_busy	drivers/mtd/nand/arasan_nfc.c	/^	u32 rdy_busy;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
re	arch/sh/include/asm/ptrace.h	/^	unsigned long	re;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
re_allowed_after_test	tools/patman/patchstream.py	/^re_allowed_after_test = re.compile('^Signed-off-by:')$/;"	v
re_arch	tools/moveconfig.py	/^    re_arch = re.compile(r'CONFIG_SYS_ARCH="(.*)"')$/;"	v	class:KconfigParser
re_commit	tools/patman/patchstream.py	/^re_commit = re.compile('^commit ([0-9a-f]*)$')$/;"	v
re_commit_tag	tools/patman/patchstream.py	/^re_commit_tag = re.compile('^Commit-([a-z-]*): *(.*)')$/;"	v
re_cover	tools/patman/patchstream.py	/^re_cover = re.compile('^Cover-letter:')$/;"	v
re_cover_cc	tools/patman/patchstream.py	/^re_cover_cc = re.compile('^Cover-letter-cc: *(.*)')$/;"	v
re_cpu	tools/moveconfig.py	/^    re_cpu = re.compile(r'CONFIG_SYS_CPU="(.*)"')$/;"	v	class:KconfigParser
re_line	tools/patman/patman	/^    re_line = re.compile('(\\S*) (.*)')$/;"	v
re_line	tools/patman/patman.py	/^    re_line = re.compile('(\\S*) (.*)')$/;"	v
re_remove	tools/patman/patchstream.py	/^re_remove = re.compile('^BUG=|^TEST=|^BRANCH=|^Change-Id:|^Review URL:'$/;"	v
re_series_tag	tools/patman/patchstream.py	/^re_series_tag = re.compile('^Series-([a-z-]*): *(.*)')$/;"	v
re_signoff	tools/patman/patchstream.py	/^re_signoff = re.compile('^Signed-off-by: *(.*)')$/;"	v
re_space_before_tab	tools/patman/patchstream.py	/^re_space_before_tab = re.compile('^[+].* \\t')$/;"	v
re_subject_tag	tools/patman/commit.py	/^re_subject_tag = re.compile('([^:\\s]*):\\s*(.*)')$/;"	v
re_tag	tools/patman/patchstream.py	/^re_tag = re.compile('^(Tested-by|Acked-by|Reviewed-by|Patch-cc): (.*)')$/;"	v
re_ut_test_list	test/py/conftest.py	/^re_ut_test_list = re.compile(r'_u_boot_list_2_(dm|env)_test_2_\\1_test_(.*)\\s*$')$/;"	v
rea	tools/mxsboot.c	/^		uint8_t			rea;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
read	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 read;$/;"	m	struct:bcm2835_mbox_regs	typeref:typename:u32
read	arch/sandbox/include/asm/state.h	/^	int (*read)(const void *blob, int node);$/;"	m	struct:sandbox_state_io	typeref:typename:int (*)(const void * blob,int node)
read	drivers/mtd/ubispl/ubispl.h	/^	ubispl_read_flash		read;$/;"	m	struct:ubi_scan_info	typeref:typename:ubispl_read_flash
read	drivers/usb/gadget/pxa25x_udc.h	/^	} read, write;$/;"	m	struct:udc_stats	typeref:struct:udc_stats::ep0stats
read	fs/fs.c	/^	int (*read)(const char *filename, void *buf, loff_t offset,$/;"	m	struct:fstype_info	typeref:typename:int (*)(const char * filename,void * buf,loff_t offset,loff_t len,loff_t * actread)	file:
read	include/blk.h	/^	unsigned long (*read)(struct udevice *dev, lbaint_t start,$/;"	m	struct:blk_ops	typeref:typename:unsigned long (*)(struct udevice * dev,lbaint_t start,lbaint_t blkcnt,void * buffer)
read	include/fat.h	/^	file_read_func		*read;$/;"	m	struct:filesystem	typeref:typename:file_read_func *
read	include/gdsys_fpga.h	/^	u16 read;$/;"	m	struct:ihs_gpio	typeref:typename:u16
read	include/i2c.h	/^	int		(*read)(struct i2c_adapter *adap, uint8_t chip,$/;"	m	struct:i2c_adapter	typeref:typename:int (*)(struct i2c_adapter * adap,uint8_t chip,uint addr,int alen,uint8_t * buffer,int len)
read	include/i2c_eeprom.h	/^	int (*read)(struct udevice *dev, int offset, uint8_t *buf, int size);$/;"	m	struct:i2c_eeprom_ops	typeref:typename:int (*)(struct udevice * dev,int offset,uint8_t * buf,int size)
read	include/misc.h	/^	int (*read)(struct udevice *dev, int offset, void *buf, int size);$/;"	m	struct:misc_ops	typeref:typename:int (*)(struct udevice * dev,int offset,void * buf,int size)
read	include/phy.h	/^	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);$/;"	m	struct:mii_dev	typeref:typename:int (*)(struct mii_dev * bus,int addr,int devad,int reg)
read	include/power/pmic.h	/^	int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);$/;"	m	struct:dm_pmic_ops	typeref:typename:int (*)(struct udevice * dev,uint reg,uint8_t * buffer,int len)
read	include/spi_flash.h	/^	int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);$/;"	m	struct:spi_flash	typeref:typename:int (*)(struct spi_flash * flash,u32 offset,size_t len,void * buf)
read	include/spi_flash.h	/^	int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);$/;"	m	struct:dm_spi_flash_ops	typeref:typename:int (*)(struct udevice * dev,u32 offset,size_t len,void * buf)
read	include/spl.h	/^	ulong (*read)(struct spl_load_info *load, ulong sector, ulong count,$/;"	m	struct:spl_load_info	typeref:typename:ulong (*)(struct spl_load_info * load,ulong sector,ulong count,void * buf)
read	include/spmi/spmi.h	/^	int (*read)(struct udevice *dev, int usid, int pid, int reg);$/;"	m	struct:dm_spmi_ops	typeref:typename:int (*)(struct udevice * dev,int usid,int pid,int reg)
read	include/ubispl.h	/^	ubispl_read_flash	read;$/;"	m	struct:ubispl_info	typeref:typename:ubispl_read_flash
read	post/board/lwmon5/sysmon.c	/^	int	(*read)(sysmon_t *, uint, int *);$/;"	m	struct:sysmon_s	typeref:typename:int (*)(sysmon_t *,uint,int *)	file:
read16	drivers/video/sm501.c	/^#define read16(/;"	d	file:
read32	drivers/video/sm501.c	/^#define read32(/;"	d	file:
read8	drivers/video/sm501.c	/^#define read8(/;"	d	file:
read8	include/rtc.h	/^	int (*read8)(struct udevice *dev, unsigned int reg);$/;"	m	struct:rtc_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int reg)
readByte	board/esd/common/xilinx_jtag/ports.c	/^void readByte(unsigned char *data)$/;"	f	typeref:typename:void
readChunk	fs/yaffs2/yaffs_nandif.h	/^	int (*readChunk) (struct yaffs_dev *dev,$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev,unsigned pageId,unsigned char * data,unsigned dataLength,unsigned char * spare,unsigned spareLength,int * eccStatus)
readPort	drivers/fpga/lattice.c	/^unsigned char readPort(void)$/;"	f	typeref:typename:unsigned char
readSizes	scripts/kconfig/qconf.cc	/^Q3ValueList<int> ConfigSettings::readSizes(const QString& key, bool *ok)$/;"	f	class:ConfigSettings	typeref:typename:Q3ValueList<int>
readTDOBit	board/esd/common/xilinx_jtag/ports.c	/^unsigned char readTDOBit(void)$/;"	f	typeref:typename:unsigned char
readVal	board/esd/common/xilinx_jtag/lenval.c	/^void readVal( lenVal*   plv,$/;"	f	typeref:typename:void
read_2501_memory	board/v38b/ethaddr.c	/^void read_2501_memory(unsigned char *psernum, unsigned char *perr)$/;"	f	typeref:typename:void
read_32bit_cp1_register	arch/mips/include/asm/mipsregs.h	/^#define read_32bit_cp1_register(/;"	d
read_8	arch/x86/include/asm/io.h	/^#define read_8(/;"	d
read_a_file	fs/yaffs2/yaffs_uboot_glue.c	/^void read_a_file(char *fn)$/;"	f	typeref:typename:void
read_abs_bbt	drivers/mtd/nand/nand_bbt.c	/^static int read_abs_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)$/;"	f	typeref:typename:int	file:
read_abs_bbts	drivers/mtd/nand/nand_bbt.c	/^static void read_abs_bbts(struct mtd_info *mtd, uint8_t *buf,$/;"	f	typeref:typename:void	file:
read_add_inode	fs/ubifs/debug.c	/^static struct fsck_inode *read_add_inode(struct ubifs_info *c,$/;"	f	typeref:struct:fsck_inode *	file:
read_addr_hi	drivers/net/altera_tse.h	/^	u32 read_addr_hi;	\/* data buffer source address high bits *\/$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
read_addr_lo	drivers/net/altera_tse.h	/^	u32 read_addr_lo;	\/* data buffer source address low bits *\/$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
read_adll_value	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int read_adll_value(u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],$/;"	f	typeref:typename:int
read_allocated_block	fs/ext4/ext4_common.c	/^long int read_allocated_block(struct ext2_inode *inode, int fileblock)$/;"	f	typeref:typename:long int
read_arch	arch/x86/include/asm/io.h	/^#define read_arch(/;"	d
read_atapi_data	drivers/block/pata_bfin.c	/^static void read_atapi_data(void __iomem *base,$/;"	f	typeref:typename:void	file:
read_atapi_register	drivers/block/pata_bfin.c	/^static unsigned short read_atapi_register(void __iomem *base,$/;"	f	typeref:typename:unsigned short	file:
read_aux_reg	arch/arc/include/asm/arcregs.h	/^#define read_aux_reg(/;"	d
read_b	include/sdhci.h	/^	u8              (*read_b)(struct sdhci_host *host, int reg);$/;"	m	struct:sdhci_ops	typeref:typename:u8 (*)(struct sdhci_host * host,int reg)
read_b2b	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	read_b2b;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
read_b2b_wait1	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	read_b2b_wait1;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
read_b2b_wait2	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	read_b2b_wait2;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
read_barrier_depends	arch/sh/include/asm/system.h	/^#define read_barrier_depends(/;"	d
read_bat	arch/powerpc/lib/bat_rw.c	/^int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower)$/;"	f	typeref:typename:int
read_bbt	drivers/mtd/nand/nand_bbt.c	/^static int read_bbt(struct mtd_info *mtd, uint8_t *buf, int page, int num,$/;"	f	typeref:typename:int	file:
read_be16	arch/x86/include/asm/io.h	/^#define read_be16(/;"	d
read_be32	arch/x86/include/asm/io.h	/^#define read_be32(/;"	d
read_bl_len	include/mmc.h	/^	uint read_bl_len;$/;"	m	struct:mmc	typeref:typename:uint
read_block	fs/ubifs/ubifs.c	/^static int read_block(struct inode *inode, void *addr, unsigned int block,$/;"	f	typeref:typename:int	file:
read_board_info	board/freescale/mpc8308rdb/mpc8308rdb.c	/^static u8 read_board_info(void)$/;"	f	typeref:typename:u8	file:
read_board_info	board/freescale/mpc8315erdb/mpc8315erdb.c	/^static u8 read_board_info(void)$/;"	f	typeref:typename:u8	file:
read_bootsectandvi	fs/fat/fat.c	/^read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize)$/;"	f	typeref:typename:int	file:
read_bootstrap	arch/arm/cpu/arm926ejs/spear/spear600.c	/^static u32 read_bootstrap(void)$/;"	f	typeref:typename:u32	file:
read_buf	drivers/mtd/nand/tegra_nand.c	/^static void read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
read_buf	include/linux/mtd/nand.h	/^	void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);$/;"	m	struct:nand_chip	typeref:typename:void (*)(struct mtd_info * mtd,uint8_t * buf,int len)
read_buf	include/linux/mtd/nand.h	/^	void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);$/;"	m	struct:platform_nand_ctrl	typeref:typename:void (*)(struct mtd_info * mtd,uint8_t * buf,int len)
read_buf	lib/zlib/deflate.c	/^local int read_buf(strm, buf, size)$/;"	f
read_bufferram	include/linux/mtd/onenand.h	/^	int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area,$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd,loff_t addr,int area,unsigned char * buffer,int offset,size_t count)
read_burst	drivers/net/altera_tse.h	/^	u8 read_burst;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u8
read_byte	board/v38b/ethaddr.c	/^static void read_byte(unsigned char *data)$/;"	f	typeref:typename:void	file:
read_byte	drivers/i2c/soft_i2c.c	/^static uchar read_byte(int ack)$/;"	f	typeref:typename:uchar	file:
read_byte	drivers/mtd/nand/tegra_nand.c	/^static uint8_t read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
read_byte	drivers/rtc/ds1302.c	/^read_byte(void)$/;"	f	typeref:typename:unsigned char	file:
read_byte	include/linux/mtd/nand.h	/^	uint8_t (*read_byte)(struct mtd_info *mtd);$/;"	m	struct:nand_chip	typeref:typename:uint8_t (*)(struct mtd_info * mtd)
read_byte	include/linux/mtd/nand.h	/^	unsigned char (*read_byte)(struct mtd_info *mtd);$/;"	m	struct:platform_nand_ctrl	typeref:typename:unsigned char (*)(struct mtd_info * mtd)
read_byte	include/pci.h	/^	int (*read_byte)(struct pci_controller*, pci_dev_t, int where, u8 *);$/;"	m	struct:pci_controller	typeref:typename:int (*)(struct pci_controller *,pci_dev_t,int where,u8 *)
read_bytes	drivers/fpga/lattice.c	/^static unsigned long read_bytes;$/;"	v	typeref:typename:unsigned long	file:
read_bytes	drivers/mmc/arm_pl180_mmci.c	/^static int read_bytes(struct mmc *dev, u32 *dest, u32 blkcount, u32 blksize)$/;"	f	typeref:typename:int	file:
read_bytes	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int read_bytes; \/* Number of bytes read during command   *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
read_bytes	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int read_bytes; \/* Number of bytes read during command   *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
read_c0_badvaddr	arch/mips/include/asm/mipsregs.h	/^#define read_c0_badvaddr(/;"	d
read_c0_brcm_action	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_action(/;"	d
read_c0_brcm_bootvec	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_bootvec(/;"	d
read_c0_brcm_bus_pll	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_bus_pll(/;"	d
read_c0_brcm_cbr	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_cbr(/;"	d
read_c0_brcm_cmt_ctrl	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_cmt_ctrl(/;"	d
read_c0_brcm_cmt_intr	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_cmt_intr(/;"	d
read_c0_brcm_cmt_local	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_cmt_local(/;"	d
read_c0_brcm_config	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_config(/;"	d
read_c0_brcm_config_0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_config_0(/;"	d
read_c0_brcm_config_1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_config_1(/;"	d
read_c0_brcm_edsp	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_edsp(/;"	d
read_c0_brcm_mode	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_mode(/;"	d
read_c0_brcm_reset	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_reset(/;"	d
read_c0_brcm_sleepcount	arch/mips/include/asm/mipsregs.h	/^#define read_c0_brcm_sleepcount(/;"	d
read_c0_cache	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cache(/;"	d
read_c0_cacheerr	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cacheerr(/;"	d
read_c0_cause	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cause(/;"	d
read_c0_cdmmbase	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cdmmbase(/;"	d
read_c0_cmgcrbase	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cmgcrbase(/;"	d
read_c0_compare	arch/mips/include/asm/mipsregs.h	/^#define read_c0_compare(/;"	d
read_c0_compare2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_compare2(/;"	d
read_c0_compare3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_compare3(/;"	d
read_c0_conf	arch/mips/include/asm/mipsregs.h	/^#define read_c0_conf(/;"	d
read_c0_config	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config(/;"	d
read_c0_config1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config1(/;"	d
read_c0_config2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config2(/;"	d
read_c0_config3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config3(/;"	d
read_c0_config4	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config4(/;"	d
read_c0_config5	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config5(/;"	d
read_c0_config6	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config6(/;"	d
read_c0_config7	arch/mips/include/asm/mipsregs.h	/^#define read_c0_config7(/;"	d
read_c0_context	arch/mips/include/asm/mipsregs.h	/^#define read_c0_context(/;"	d
read_c0_count	arch/mips/include/asm/mipsregs.h	/^#define read_c0_count(/;"	d
read_c0_count2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_count2(/;"	d
read_c0_count3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_count3(/;"	d
read_c0_cvmcount	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cvmcount(/;"	d
read_c0_cvmctl	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cvmctl(/;"	d
read_c0_cvmmemctl	arch/mips/include/asm/mipsregs.h	/^#define read_c0_cvmmemctl(/;"	d
read_c0_ddatalo	arch/mips/include/asm/mipsregs.h	/^#define read_c0_ddatalo(/;"	d
read_c0_debug	arch/mips/include/asm/mipsregs.h	/^#define read_c0_debug(/;"	d
read_c0_depc	arch/mips/include/asm/mipsregs.h	/^#define read_c0_depc(/;"	d
read_c0_derraddr0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_derraddr0(/;"	d
read_c0_derraddr1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_derraddr1(/;"	d
read_c0_diag	arch/mips/include/asm/mipsregs.h	/^#define read_c0_diag(/;"	d
read_c0_diag1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_diag1(/;"	d
read_c0_diag2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_diag2(/;"	d
read_c0_diag3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_diag3(/;"	d
read_c0_diag4	arch/mips/include/asm/mipsregs.h	/^#define read_c0_diag4(/;"	d
read_c0_diag5	arch/mips/include/asm/mipsregs.h	/^#define read_c0_diag5(/;"	d
read_c0_dtaglo	arch/mips/include/asm/mipsregs.h	/^#define read_c0_dtaglo(/;"	d
read_c0_ebase	arch/mips/include/asm/mipsregs.h	/^#define read_c0_ebase(/;"	d
read_c0_ecc	arch/mips/include/asm/mipsregs.h	/^#define read_c0_ecc(/;"	d
read_c0_entryhi	arch/mips/include/asm/mipsregs.h	/^#define read_c0_entryhi(/;"	d
read_c0_entrylo0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_entrylo0(/;"	d
read_c0_entrylo1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_entrylo1(/;"	d
read_c0_epc	arch/mips/include/asm/mipsregs.h	/^#define read_c0_epc(/;"	d
read_c0_errorepc	arch/mips/include/asm/mipsregs.h	/^#define read_c0_errorepc(/;"	d
read_c0_framemask	arch/mips/include/asm/mipsregs.h	/^#define read_c0_framemask(/;"	d
read_c0_hwrena	arch/mips/include/asm/mipsregs.h	/^#define read_c0_hwrena(/;"	d
read_c0_index	arch/mips/include/asm/mipsregs.h	/^#define read_c0_index(/;"	d
read_c0_info	arch/mips/include/asm/mipsregs.h	/^#define read_c0_info(/;"	d
read_c0_intcontrol	arch/mips/include/asm/mipsregs.h	/^#define read_c0_intcontrol(/;"	d
read_c0_intctl	arch/mips/include/asm/mipsregs.h	/^#define read_c0_intctl(/;"	d
read_c0_lladdr	arch/mips/include/asm/mipsregs.h	/^#define read_c0_lladdr(/;"	d
read_c0_maar	arch/mips/include/asm/mipsregs.h	/^#define read_c0_maar(/;"	d
read_c0_maari	arch/mips/include/asm/mipsregs.h	/^#define read_c0_maari(/;"	d
read_c0_pagegrain	arch/mips/include/asm/mipsregs.h	/^#define read_c0_pagegrain(/;"	d
read_c0_pagemask	arch/mips/include/asm/mipsregs.h	/^#define read_c0_pagemask(/;"	d
read_c0_perfcntr0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr0(/;"	d
read_c0_perfcntr0_64	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr0_64(/;"	d
read_c0_perfcntr1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr1(/;"	d
read_c0_perfcntr1_64	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr1_64(/;"	d
read_c0_perfcntr2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr2(/;"	d
read_c0_perfcntr2_64	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr2_64(/;"	d
read_c0_perfcntr3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr3(/;"	d
read_c0_perfcntr3_64	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfcntr3_64(/;"	d
read_c0_perfctrl0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfctrl0(/;"	d
read_c0_perfctrl1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfctrl1(/;"	d
read_c0_perfctrl2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfctrl2(/;"	d
read_c0_perfctrl3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_perfctrl3(/;"	d
read_c0_prid	arch/mips/include/asm/mipsregs.h	/^#define read_c0_prid(/;"	d
read_c0_prid	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define read_c0_prid(/;"	d	file:
read_c0_pwbase	arch/mips/include/asm/mipsregs.h	/^#define read_c0_pwbase(/;"	d
read_c0_pwctl	arch/mips/include/asm/mipsregs.h	/^#define read_c0_pwctl(/;"	d
read_c0_pwfield	arch/mips/include/asm/mipsregs.h	/^#define read_c0_pwfield(/;"	d
read_c0_pwsize	arch/mips/include/asm/mipsregs.h	/^#define read_c0_pwsize(/;"	d
read_c0_r10k_diag	arch/mips/include/asm/mipsregs.h	/^#define read_c0_r10k_diag(/;"	d
read_c0_random	arch/mips/include/asm/mipsregs.h	/^#define read_c0_random(/;"	d
read_c0_segctl0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_segctl0(/;"	d
read_c0_segctl1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_segctl1(/;"	d
read_c0_segctl2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_segctl2(/;"	d
read_c0_srsctl	arch/mips/include/asm/mipsregs.h	/^#define read_c0_srsctl(/;"	d
read_c0_srsmap	arch/mips/include/asm/mipsregs.h	/^#define read_c0_srsmap(/;"	d
read_c0_staglo	arch/mips/include/asm/mipsregs.h	/^#define read_c0_staglo(/;"	d
read_c0_status	arch/mips/include/asm/mipsregs.h	/^#define read_c0_status(/;"	d
read_c0_taghi	arch/mips/include/asm/mipsregs.h	/^#define read_c0_taghi(/;"	d
read_c0_taglo	arch/mips/include/asm/mipsregs.h	/^#define read_c0_taglo(/;"	d
read_c0_userlocal	arch/mips/include/asm/mipsregs.h	/^#define read_c0_userlocal(/;"	d
read_c0_watchhi0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi0(/;"	d
read_c0_watchhi1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi1(/;"	d
read_c0_watchhi2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi2(/;"	d
read_c0_watchhi3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi3(/;"	d
read_c0_watchhi4	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi4(/;"	d
read_c0_watchhi5	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi5(/;"	d
read_c0_watchhi6	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi6(/;"	d
read_c0_watchhi7	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchhi7(/;"	d
read_c0_watchlo0	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo0(/;"	d
read_c0_watchlo1	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo1(/;"	d
read_c0_watchlo2	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo2(/;"	d
read_c0_watchlo3	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo3(/;"	d
read_c0_watchlo4	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo4(/;"	d
read_c0_watchlo5	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo5(/;"	d
read_c0_watchlo6	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo6(/;"	d
read_c0_watchlo7	arch/mips/include/asm/mipsregs.h	/^#define read_c0_watchlo7(/;"	d
read_c0_wired	arch/mips/include/asm/mipsregs.h	/^#define read_c0_wired(/;"	d
read_c0_xcontext	arch/mips/include/asm/mipsregs.h	/^#define read_c0_xcontext(/;"	d
read_cache	include/linux/mtd/nand.h	/^	u8 read_cache;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
read_calls	tools/proftool.c	/^static int read_calls(FILE *fin, int count)$/;"	f	typeref:typename:int	file:
read_cfg_super_IO	board/mpl/common/isa.c	/^unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)$/;"	f	typeref:typename:unsigned char
read_chunk_fn	fs/yaffs2/yaffs_guts.h	/^	int (*read_chunk_fn) (struct yaffs_dev *dev,$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int nand_chunk,u8 * data,struct yaffs_spare * spare)
read_chunk_tags_fn	fs/yaffs2/yaffs_guts.h	/^	int (*read_chunk_tags_fn) (struct yaffs_dev *dev,$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int nand_chunk,u8 * data,struct yaffs_ext_tags * tags)
read_cmd	include/spi_flash.h	/^	u8 read_cmd;$/;"	m	struct:spi_flash	typeref:typename:u8
read_common_data	board/gdsys/p1022/controlcenterd-id.c	/^static int read_common_data(void)$/;"	f	typeref:typename:int	file:
read_config	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 read_config;	\/* Configures the dyn memory read strategy   *\/$/;"	m	struct:emc_regs	typeref:typename:u32
read_config	include/pci.h	/^	int (*read_config)(struct udevice *bus, pci_dev_t bdf, uint offset,$/;"	m	struct:dm_pci_ops	typeref:typename:int (*)(struct udevice * bus,pci_dev_t bdf,uint offset,ulong * valuep,enum pci_size_t size)
read_config	include/pci.h	/^	int (*read_config)(struct udevice *dev, uint offset, ulong *valuep,$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev,uint offset,ulong * valuep,enum pci_size_t size)
read_config	scripts/kconfig/streamline_config.pl	/^sub read_config {$/;"	s
read_config_reg	drivers/gpio/sh_pfc.c	/^static int read_config_reg(struct pinmux_info *gpioc,$/;"	f	typeref:typename:int	file:
read_correct_mask	drivers/ddr/altera/sequencer.h	/^	u32	read_correct_mask;$/;"	m	struct:param_type	typeref:typename:u32
read_correct_mask_vg	drivers/ddr/altera/sequencer.h	/^	u32	read_correct_mask_vg;$/;"	m	struct:param_type	typeref:typename:u32
read_count	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 read_count; \/* 0x8c *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
read_cpu_temperature	drivers/thermal/imx_thermal.c	/^static int read_cpu_temperature(struct udevice *dev)$/;"	f	typeref:typename:int	file:
read_cr	drivers/mtd/spi/spi_flash.c	/^static int read_cr(struct spi_flash *flash, u8 *rc)$/;"	f	typeref:typename:int	file:
read_cr0	arch/x86/include/asm/control_regs.h	/^static inline unsigned long read_cr0(void)$/;"	f	typeref:typename:unsigned long
read_cr2	arch/x86/include/asm/control_regs.h	/^static inline unsigned long read_cr2(void)$/;"	f	typeref:typename:unsigned long
read_cr3	arch/x86/include/asm/control_regs.h	/^static inline unsigned long read_cr3(void)$/;"	f	typeref:typename:unsigned long
read_cr3	lib/efi/efi_stub.c	/^static inline unsigned long read_cr3(void)$/;"	f	typeref:typename:unsigned long	file:
read_cr4	arch/x86/include/asm/control_regs.h	/^static inline unsigned long read_cr4(void)$/;"	f	typeref:typename:unsigned long
read_ctrl	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     read_ctrl;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_ctrl	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 read_ctrl;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_ctrl	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 read_ctrl;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_data	board/bf533-ezkit/flash.c	/^int read_data(long ulStart, long lCount, long lStride, int *pnData)$/;"	f	typeref:typename:int
read_data	drivers/mtd/nand/kmeter1_nand.c	/^#define read_data(/;"	d	file:
read_data	tools/proftool.c	/^static int read_data(FILE *fin, void *buff, int size)$/;"	f	typeref:typename:int	file:
read_data_from_flash_mem	drivers/mtd/nand/denali.c	/^static int read_data_from_flash_mem(struct denali_nand_info *denali,$/;"	f	typeref:typename:int	file:
read_data_from_flash_mem	drivers/mtd/nand/denali_spl.c	/^static void read_data_from_flash_mem(uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
read_data_ready	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 read_data_ready[MAX_INTERFACE_NUM];$/;"	m	struct:mode_info	typeref:typename:u32[]
read_data_sample	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 read_data_sample[MAX_INTERFACE_NUM];$/;"	m	struct:mode_info	typeref:typename:u32[]
read_dataflash	drivers/mtd/dataflash.c	/^int read_dataflash (unsigned long addr, unsigned long size, char *result)$/;"	f	typeref:typename:int
read_dcc	drivers/serial/arm_dcc.c	/^#define read_dcc(/;"	d	file:
read_decode_cache_bcr	arch/arc/lib/cache.c	/^void read_decode_cache_bcr(void)$/;"	f	typeref:typename:void
read_decode_cache_bcr_arcv2	arch/arc/lib/cache.c	/^static void read_decode_cache_bcr_arcv2(void)$/;"	f	typeref:typename:void	file:
read_delays	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^	u32 read_delays;$/;"	m	struct:dram_para	typeref:typename:u32	file:
read_dword	include/pci.h	/^	int (*read_dword)(struct pci_controller*, pci_dev_t, int where, u32 *);$/;"	m	struct:pci_controller	typeref:typename:int (*)(struct pci_controller *,pci_dev_t,int where,u32 *)
read_edid	include/display.h	/^	int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size);$/;"	m	struct:dm_display_ops	typeref:typename:int (*)(struct udevice * dev,u8 * buf,int buf_size)
read_eeprom	board/birdland/bav335x/board.c	/^static int read_eeprom(struct board_eeconfig *header)$/;"	f	typeref:typename:int	file:
read_eeprom	board/bosch/shc/board.c	/^static int read_eeprom(void)$/;"	f	typeref:typename:int	file:
read_eeprom	board/freescale/common/sys_eeprom.c	/^static int read_eeprom(void)$/;"	f	typeref:typename:int	file:
read_eeprom	board/gateworks/gw_ventana/eeprom.c	/^read_eeprom(int bus, struct ventana_board_info *info)$/;"	f	typeref:typename:int
read_eeprom	board/gumstix/pepper/board.c	/^static int read_eeprom(struct pepper_board_id *header)$/;"	f	typeref:typename:int	file:
read_eeprom	board/ifm/ac14xx/ac14xx.c	/^static int read_eeprom(void)$/;"	f	typeref:typename:int	file:
read_eeprom	board/siemens/draco/board.c	/^static int read_eeprom(void)$/;"	f	typeref:typename:int	file:
read_eeprom	board/siemens/pxm2/board.c	/^int read_eeprom(void)$/;"	f	typeref:typename:int
read_eeprom	board/siemens/rut/board.c	/^static int read_eeprom(void)$/;"	f	typeref:typename:int	file:
read_eeprom	board/ti/am335x/board.c	/^static inline int __maybe_unused read_eeprom(void)$/;"	f	typeref:typename:int __maybe_unused	file:
read_eeprom	board/ti/am43xx/board.c	/^static inline int __maybe_unused read_eeprom(void)$/;"	f	typeref:typename:int __maybe_unused	file:
read_eeprom	board/varisys/common/sys_eeprom.c	/^int read_eeprom(void)$/;"	f	typeref:typename:int
read_eeprom	board/vscom/baltos/board.c	/^static int read_eeprom(BSP_VS_HWPARAM *header)$/;"	f	typeref:typename:int	file:
read_eeprom	drivers/net/eepro100.c	/^static int read_eeprom (struct eth_device *dev, int location, int addr_len)$/;"	f	typeref:typename:int	file:
read_eeprom	drivers/net/natsemi.c	/^read_eeprom(struct eth_device *dev, long addr, int location)$/;"	f	typeref:typename:int	file:
read_eeprom	drivers/net/rtl8139.c	/^static int read_eeprom(int location, int addr_len)$/;"	f	typeref:typename:int	file:
read_eeprom_reg	examples/standalone/smc91111_eeprom.c	/^int read_eeprom_reg (struct eth_device *dev, int reg)$/;"	f	typeref:typename:int
read_eeprom_reg	examples/standalone/smc911x_eeprom.c	/^static u8 read_eeprom_reg(struct eth_device *dev, u8 reg)$/;"	f	typeref:typename:u8	file:
read_efuse_bootrom	arch/arm/mach-keystone/clock.c	/^static inline u32 read_efuse_bootrom(void)$/;"	f	typeref:typename:u32	file:
read_en	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 read_en;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
read_en	arch/arm/include/asm/arch/display2.h	/^	u32 read_en;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
read_env	common/env_mmc.c	/^static inline int read_env(struct mmc *mmc, unsigned long size,$/;"	f	typeref:typename:int	file:
read_env	common/env_sata.c	/^static inline int read_env(struct blk_desc *sata, unsigned long size,$/;"	f	typeref:typename:int	file:
read_ep0_fifo	drivers/usb/gadget/pxa25x_udc.c	/^read_ep0_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)$/;"	f	typeref:typename:int	file:
read_evcr	drivers/mtd/spi/spi_flash.c	/^static int read_evcr(struct spi_flash *flash, u8 *evcr)$/;"	f	typeref:typename:int	file:
read_fdc_byte	cmd/fdc.c	/^int read_fdc_byte(void)$/;"	f	typeref:typename:int
read_fdc_reg	cmd/fdc.c	/^unsigned char read_fdc_reg(unsigned int addr)$/;"	f	typeref:typename:unsigned char
read_fifo	drivers/usb/gadget/at91_udc.c	/^static int read_fifo (struct at91_ep *ep, struct at91_request *req)$/;"	f	typeref:typename:int	file:
read_fifo	drivers/usb/gadget/pxa25x_udc.c	/^read_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)$/;"	f	typeref:typename:int	file:
read_fifo	drivers/usb/musb/am35x.c	/^void read_fifo(u8 ep, u32 length, void *fifo_data)$/;"	f	typeref:typename:void
read_fifo	drivers/usb/musb/blackfin_usb.c	/^void read_fifo(u8 ep, u32 length, void *fifo_data)$/;"	f	typeref:typename:void
read_fifo	drivers/usb/musb/musb_core.c	/^void read_fifo(u8 ep, u32 length, void *fifo_data)$/;"	f	typeref:typename:void
read_file	test/dm/video.c	/^static int read_file(struct unit_test_state *uts, const char *fname,$/;"	f	typeref:typename:int	file:
read_file	test/image/test-fit.py	/^def read_file(fname):$/;"	f
read_flash	board/bf533-ezkit/flash.c	/^int read_flash(long nOffset, int *pnValue)$/;"	f	typeref:typename:int
read_frame	tools/gdb/remote.c	/^read_frame (char *buf)$/;"	f	typeref:typename:int	file:
read_from_px_regs	board/freescale/common/pixis.c	/^static void read_from_px_regs(int set)$/;"	f	typeref:typename:void	file:
read_from_px_regs_altbank	board/freescale/common/pixis.c	/^static void read_from_px_regs_altbank(int set)$/;"	f	typeref:typename:void	file:
read_fsr	drivers/mtd/spi/spi_flash.c	/^static int read_fsr(struct spi_flash *flash, u8 *fsr)$/;"	f	typeref:typename:int	file:
read_fuse_data	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	read_fuse_data;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_fuse_data	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 read_fuse_data;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_fuse_data0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 read_fuse_data0;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_fuse_data1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 read_fuse_data1;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_fuse_data2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 read_fuse_data2;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_fuse_data3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 read_fuse_data3;$/;"	m	struct:ocotp_regs	typeref:typename:u32
read_hw_addr	drivers/net/dc2114x.c	/^static void read_hw_addr(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:void	file:
read_hw_addr	drivers/net/eepro100.c	/^static void read_hw_addr (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:void	file:
read_hw_id	board/cm5200/cm5200.c	/^static void read_hw_id(hw_id_t hw_id)$/;"	f	typeref:typename:void	file:
read_hw_register	drivers/video/ssd2828.c	/^static u32 read_hw_register(const struct ssd2828_config *cfg, u8 regnum)$/;"	f	typeref:typename:u32	file:
read_hwmon	board/gateworks/gw_ventana/gsc.c	/^static void read_hwmon(const char *name, uint reg, uint size)$/;"	f	typeref:typename:void	file:
read_id_bytes	drivers/mtd/nand/pxa3xx_nand.c	/^	size_t			read_id_bytes;$/;"	m	struct:pxa3xx_nand_host	typeref:typename:size_t	file:
read_id_pfr1	arch/arm/cpu/armv7/virt-v7.c	/^static unsigned int read_id_pfr1(void)$/;"	f	typeref:typename:unsigned int	file:
read_idle_ctrl	arch/arm/include/asm/emif.h	/^	u32 read_idle_ctrl;$/;"	m	struct:emif_regs	typeref:typename:u32
read_idx	drivers/crypto/fsl/jr.h	/^	int read_idx;$/;"	m	struct:jobring	typeref:typename:int
read_in_a_row	fs/ubifs/ubifs.h	/^	pgoff_t read_in_a_row;$/;"	m	struct:ubifs_inode	typeref:typename:pgoff_t
read_interrupt_status	drivers/mtd/nand/denali.c	/^static uint32_t read_interrupt_status(struct denali_nand_info *denali)$/;"	f	typeref:typename:uint32_t	file:
read_io	include/pci.h	/^	int (*read_io)(struct udevice *dev, unsigned int addr, ulong *valuep,$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int addr,ulong * valuep,enum pci_size_t size)
read_kconfig	scripts/kconfig/streamline_config.pl	/^sub read_kconfig {$/;"	s
read_keys	board/boundary/nitrogen6x/nitrogen6x.c	/^static int read_keys(char *buf)$/;"	f	typeref:typename:int	file:
read_keys	include/input.h	/^	int (*read_keys)(struct input_config *config);$/;"	m	struct:input_config	typeref:typename:int (*)(struct input_config * config)
read_l	include/sdhci.h	/^	u32             (*read_l)(struct sdhci_host *host, int reg);$/;"	m	struct:sdhci_ops	typeref:typename:u32 (*)(struct sdhci_host * host,int reg)
read_l2ctlr	arch/arm/mach-rockchip/rk3288-board-spl.c	/^static inline uint32_t read_l2ctlr(void)$/;"	f	typeref:typename:uint32_t	file:
read_le16	arch/x86/include/asm/io.h	/^#define read_le16(/;"	d
read_le32	arch/x86/include/asm/io.h	/^#define read_le32(/;"	d
read_le64	arch/x86/include/asm/io.h	/^#define read_le64(/;"	d
read_len	drivers/usb/emul/sandbox_flash.c	/^	int read_len;$/;"	m	struct:sandbox_flash_priv	typeref:typename:int	file:
read_length	common/xyzModem.c	/^  unsigned long file_length, read_length;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:unsigned long	file:
read_leveling_enable	arch/arm/mach-exynos/clock_init.h	/^	uint8_t read_leveling_enable;	\/* check h\/w read leveling is enabled *\/$/;"	m	struct:mem_timings	typeref:typename:uint8_t
read_lsave	fs/ubifs/lpt.c	/^static int read_lsave(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
read_ltab	fs/ubifs/lpt.c	/^static int read_ltab(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
read_mailbox	include/gdsys_fpga.h	/^	u16 read_mailbox;$/;"	m	struct:ihs_i2c	typeref:typename:u16
read_mailbox_ext	include/gdsys_fpga.h	/^	u16 read_mailbox_ext;$/;"	m	struct:ihs_i2c	typeref:typename:u16
read_mailmap	scripts/get_maintainer.pl	/^sub read_mailmap {$/;"	s
read_maintainers	scripts/get_maintainer.pl	/^sub read_maintainers {$/;"	s
read_map_file	tools/proftool.c	/^static int read_map_file(const char *fname)$/;"	f	typeref:typename:int	file:
read_medium	include/dfu.h	/^	int (*read_medium)(struct dfu_entity *dfu,$/;"	m	struct:dfu_entity	typeref:typename:int (*)(struct dfu_entity * dfu,u64 offset,void * buf,long * len)
read_mii	drivers/net/greth.c	/^static int read_mii(int phyaddr, int regaddr, volatile greth_regs * regs)$/;"	f	typeref:typename:int	file:
read_mode	drivers/mtd/nand/kmeter1_nand.c	/^#define read_mode(/;"	d	file:
read_mpidr	arch/arm/include/asm/system.h	/^static inline unsigned long read_mpidr(void)$/;"	f	typeref:typename:unsigned long
read_nand_cached	fs/jffs2/jffs2_1pass.c	/^static int read_nand_cached(u32 off, u32 size, u_char *buf)$/;"	f	typeref:typename:int	file:
read_num	tools/relocate-rela.c	/^static bool read_num(const char *str, uint64_t *num)$/;"	f	typeref:typename:bool	file:
read_number	common/bedbug.c	/^long read_number (char *txt)$/;"	f	typeref:typename:long
read_octeon_c0_dcacheerr	arch/mips/include/asm/mipsregs.h	/^#define read_octeon_c0_dcacheerr(/;"	d
read_octeon_c0_icacheerr	arch/mips/include/asm/mipsregs.h	/^#define read_octeon_c0_icacheerr(/;"	d
read_old_ccsrbar	arch/powerpc/cpu/mpc85xx/start.S	/^read_old_ccsrbar:$/;"	l
read_onenand_cached	fs/jffs2/jffs2_1pass.c	/^static int read_onenand_cached(u32 off, u32 size, u_char *buf)$/;"	f	typeref:typename:int	file:
read_only	fs/yaffs2/yaffs_guts.h	/^	int read_only;$/;"	m	struct:yaffs_dev	typeref:typename:int
read_only	include/efi_api.h	/^	char read_only;$/;"	m	struct:efi_block_io_media	typeref:typename:char
read_oob	include/linux/mtd/nand.h	/^	int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page);$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,int page)
read_oob_data	drivers/mtd/nand/denali.c	/^static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)$/;"	f	typeref:typename:void	file:
read_oob_raw	include/linux/mtd/nand.h	/^	int (*read_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,int page)
read_page	include/linux/mtd/nand.h	/^	int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,uint8_t * buf,int oob_required,int page)
read_page_raw	include/linux/mtd/nand.h	/^	int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,uint8_t * buf,int oob_required,int page)
read_pci_eeprom_offs	board/mpl/pati/cmd_pati.c	/^static void read_pci_eeprom_offs(unsigned short offset, unsigned short *pvalue)$/;"	f	typeref:typename:void	file:
read_permission_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 read_permission_0;		\/* 0x50 *\/$/;"	m	struct:pm	typeref:typename:u32
read_phy	drivers/net/tsi108_eth.c	/^static unsigned int read_phy (unsigned int base,$/;"	f	typeref:typename:unsigned int	file:
read_phys	arch/x86/lib/ramtest.c	/^static u32 read_phys(unsigned long addr)$/;"	f	typeref:typename:u32	file:
read_pnode	fs/ubifs/lpt.c	/^static int read_pnode(struct ubifs_info *c, struct ubifs_nnode *parent, int iip)$/;"	f	typeref:typename:int	file:
read_pnp_config	include/ns87308.h	/^static inline void read_pnp_config(unsigned char index, unsigned char *data)$/;"	f	typeref:typename:void
read_port	arch/powerpc/cpu/mpc512x/serial.c	/^int read_port(struct stdio_dev *port, char *buf, int size)$/;"	f	typeref:typename:int
read_profile	tools/proftool.c	/^static int read_profile(FILE *fin, int *not_found)$/;"	f	typeref:typename:int	file:
read_profile_file	tools/proftool.c	/^static int read_profile_file(const char *fname)$/;"	f	typeref:typename:int	file:
read_ptddata_from_fifo	drivers/usb/host/isp116x-hcd.c	/^static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)$/;"	f	typeref:typename:void	file:
read_pubek	include/tpm.h	/^	u8	read_pubek;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
read_qdlyr	drivers/spi/cf_qspi.c	/^static u16 read_qdlyr(volatile qspi_t *qspi) { return qspi->dlyr; }$/;"	f	typeref:typename:u16	file:
read_qdr	drivers/spi/cf_qspi.c	/^static u16 read_qdr(volatile qspi_t *qspi)   { return qspi->dr; }$/;"	f	typeref:typename:u16	file:
read_qir	drivers/spi/cf_qspi.c	/^static u16 read_qir(volatile qspi_t *qspi)   { return qspi->ir; }$/;"	f	typeref:typename:u16	file:
read_queues	tools/genboardscfg.py	/^def read_queues(queues, params_list):$/;"	f
read_qwr	drivers/spi/cf_qspi.c	/^static u16 read_qwr(volatile qspi_t *qspi)   { return qspi->wr; }$/;"	f	typeref:typename:u16	file:
read_r10k_perf_cntr	arch/mips/include/asm/mipsregs.h	/^#define read_r10k_perf_cntr(/;"	d
read_r10k_perf_event	arch/mips/include/asm/mipsregs.h	/^#define read_r10k_perf_event(/;"	d
read_ready_delay_phase_offset	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 read_ready_delay_phase_offset[] = { 4, 4, 4, 4, 6, 6, 6, 6 };$/;"	v	typeref:typename:u32[]
read_record	cmd/load.c	/^static int read_record(char *buf, ulong len)$/;"	f	typeref:typename:int	file:
read_reg	arch/arm/include/asm/emif.h	/^	u32 read_reg;$/;"	m	struct:read_write_regs	typeref:typename:u32
read_reg	drivers/spi/ich.c	/^static void read_reg(struct ich_spi_priv *priv, int src_reg, void *value,$/;"	f	typeref:typename:void	file:
read_retries	include/linux/mtd/nand.h	/^	int read_retries;$/;"	m	struct:nand_chip	typeref:typename:int
read_retry_options	include/linux/mtd/nand.h	/^	u8 read_retry_options;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
read_rom_hwaddr	include/net.h	/^	int (*read_rom_hwaddr)(struct udevice *dev);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev)
read_roothub	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define read_roothub(/;"	d	file:
read_roothub	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define read_roothub(/;"	d	file:
read_roothub	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define read_roothub(/;"	d	file:
read_roothub	drivers/usb/host/ohci-s3c24xx.c	/^#define read_roothub(/;"	d	file:
read_sector	include/usb_mass_storage.h	/^	int (*read_sector)(struct ums *ums_dev,$/;"	m	struct:ums	typeref:typename:int (*)(struct ums * ums_dev,ulong start,lbaint_t blkcnt,void * buf)
read_seed_from_cmos	arch/x86/cpu/ivybridge/sdram.c	/^static int read_seed_from_cmos(struct pei_data *pei_data)$/;"	f	typeref:typename:int	file:
read_ser_drv	drivers/rtc/ds1302.c	/^read_ser_drv(unsigned char addr, unsigned char *buf, int count)$/;"	f	typeref:typename:void	file:
read_single_page	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^static int read_single_page(uint8_t *dest, int page,$/;"	f	typeref:typename:int	file:
read_size	include/ec_commands.h	/^	uint8_t read_size; \/* Either 8 or 16. *\/$/;"	m	struct:ec_params_i2c_read	typeref:typename:uint8_t
read_spd	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^int read_spd(uint addr)$/;"	f	typeref:typename:int
read_sr	drivers/mtd/spi/spi_flash.c	/^static int read_sr(struct spi_flash *flash, u8 *rs)$/;"	f	typeref:typename:int	file:
read_srk_pub	include/tpm.h	/^	u8	read_srk_pub;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
read_srom	drivers/net/dc2114x.c	/^static int read_srom(struct eth_device *dev, u_long ioaddr, int index)$/;"	f	typeref:typename:int	file:
read_srom_word	drivers/net/uli526x.c	/^static u16 read_srom_word(long ioaddr, int offset)$/;"	f	typeref:typename:u16	file:
read_state	arch/sandbox/include/asm/state.h	/^	bool read_state;		\/* Read sandbox state on startup *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
read_status	drivers/qe/uec_phy.h	/^	int (*read_status) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:int (*)(struct uec_mii_info * mii_info)
read_subpage	include/linux/mtd/nand.h	/^	int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,uint32_t offs,uint32_t len,uint8_t * buf,int page)
read_symbol	fs/jffs2/mini_inflate.c	/^static int read_symbol(struct bitstream *stream, struct huffman_set *set)$/;"	f	typeref:typename:int	file:
read_system_map	tools/proftool.c	/^static int read_system_map(FILE *fin)$/;"	f	typeref:typename:int	file:
read_timer	arch/arm/cpu/arm920t/ep93xx/timer.c	/^static inline void read_timer(void)$/;"	f	typeref:typename:void	file:
read_timer	arch/arm/cpu/arm926ejs/armada100/timer.c	/^ulong read_timer(void)$/;"	f	typeref:typename:ulong
read_timer	arch/arm/cpu/armv7/sunxi/timer.c	/^static ulong read_timer(void)$/;"	f	typeref:typename:ulong	file:
read_timer	arch/arm/mach-orion5x/timer.c	/^static inline ulong read_timer(void)$/;"	f	typeref:typename:ulong	file:
read_timing	include/display.h	/^	int (*read_timing)(struct udevice *dev, struct display_timing *timing);$/;"	m	struct:dm_display_ops	typeref:typename:int (*)(struct udevice * dev,struct display_timing * timing)
read_tlbcam_entry	arch/powerpc/cpu/mpc85xx/tlb.c	/^void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,$/;"	f	typeref:typename:void
read_to	drivers/mmc/mxcmmc.c	/^	u32 read_to;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
read_trace_config	tools/proftool.c	/^static int read_trace_config(FILE *fin)$/;"	f	typeref:typename:int	file:
read_trace_config_file	tools/proftool.c	/^static int read_trace_config_file(const char *fname)$/;"	f	typeref:typename:int	file:
read_tree_node	fs/reiserfs/reiserfs.c	/^read_tree_node (unsigned int blockNr, int depth)$/;"	f	typeref:typename:char *	file:
read_unique_id	include/linux/mtd/nand.h	/^	u8 read_unique_id;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
read_valid_fifo_size	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	read_valid_fifo_size;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
read_validate_esbc_client_header	board/freescale/common/fsl_validate.c	/^static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:int	file:
read_validate_ie_tbl	board/freescale/common/fsl_validate.c	/^static u32 read_validate_ie_tbl(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:u32	file:
read_validate_single_key	board/freescale/common/fsl_validate.c	/^static u32 read_validate_single_key(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:u32	file:
read_validate_srk_tbl	board/freescale/common/fsl_validate.c	/^static u32 read_validate_srk_tbl(struct fsl_secboot_img_priv *img)$/;"	f	typeref:typename:u32	file:
read_voltage	board/freescale/b4860qds/b4860qds.c	/^static inline int read_voltage(void)$/;"	f	typeref:typename:int	file:
read_voltage	board/freescale/common/vid.c	/^static int read_voltage(int i2caddress)$/;"	f	typeref:typename:int	file:
read_voltage	board/freescale/t4qds/t4240qds.c	/^static inline int read_voltage(void)$/;"	f	typeref:typename:int	file:
read_voltage_from_INA220	board/freescale/common/vid.c	/^static int read_voltage_from_INA220(int i2caddress)$/;"	f	typeref:typename:int	file:
read_voltage_from_IR	board/freescale/common/vid.c	/^static int read_voltage_from_IR(int i2caddress)$/;"	f	typeref:typename:int	file:
read_voltages	drivers/power/tps6586x.c	/^static int read_voltages(int *sm0, int *sm1)$/;"	f	typeref:typename:int	file:
read_w	include/sdhci.h	/^	u16             (*read_w)(struct sdhci_host *host, int reg);$/;"	m	struct:sdhci_ops	typeref:typename:u16 (*)(struct sdhci_host * host,int reg)
read_wbuf	fs/ubifs/tnc.c	/^static int read_wbuf(struct ubifs_wbuf *wbuf, void *buf, int len, int lnum,$/;"	f	typeref:typename:int	file:
read_word	include/linux/mtd/nand.h	/^	u16 (*read_word)(struct mtd_info *mtd);$/;"	m	struct:nand_chip	typeref:typename:u16 (*)(struct mtd_info * mtd)
read_word	include/linux/mtd/onenand.h	/^	unsigned short (*read_word) (void __iomem *addr);$/;"	m	struct:onenand_chip	typeref:typename:unsigned short (*)(void __iomem * addr)
read_word	include/pci.h	/^	int (*read_word)(struct pci_controller*, pci_dev_t, int where, u16 *);$/;"	m	struct:pci_controller	typeref:typename:int (*)(struct pci_controller *,pci_dev_t,int where,u16 *)
read_write_byte	drivers/i2c/s3c24x0_i2c.c	/^static void read_write_byte(struct s3c24x0_i2c *i2c)$/;"	f	typeref:typename:void	file:
read_write_regs	arch/arm/include/asm/emif.h	/^struct read_write_regs {$/;"	s
read_znode	fs/ubifs/tnc_misc.c	/^static int read_znode(struct ubifs_info *c, int lnum, int offs, int len,$/;"	f	typeref:typename:int	file:
readb	arch/arc/include/asm/io.h	/^#define readb(/;"	d
readb	arch/arm/include/asm/io.h	/^#define readb(/;"	d
readb	arch/avr32/include/asm/io.h	/^#define readb(/;"	d
readb	arch/blackfin/include/asm/io.h	/^static inline unsigned char readb(const volatile void __iomem *addr)$/;"	f	typeref:typename:unsigned char
readb	arch/m68k/include/asm/io.h	/^#define readb(/;"	d
readb	arch/microblaze/include/asm/io.h	/^#define readb(/;"	d
readb	arch/nds32/include/asm/io.h	/^#define readb(/;"	d
readb	arch/nds32/include/asm/io.h	/^static inline unsigned char readb(unsigned char *addr)$/;"	f	typeref:typename:unsigned char
readb	arch/nios2/include/asm/io.h	/^#define readb(/;"	d
readb	arch/openrisc/include/asm/io.h	/^#define readb(/;"	d
readb	arch/powerpc/include/asm/io.h	/^#define readb(/;"	d
readb	arch/sandbox/include/asm/io.h	/^#define readb(/;"	d
readb	arch/sh/include/asm/io.h	/^#define readb(/;"	d
readb	arch/sparc/include/asm/io.h	/^#define readb	/;"	d
readb	arch/x86/include/asm/io.h	/^#define readb(/;"	d
readb	arch/xtensa/include/asm/io.h	/^#define readb(/;"	d
readb	drivers/usb/musb/musb_core.h	/^# define readb(/;"	d
readb	include/iotrace.h	/^#define readb(/;"	d
readb_be	arch/mips/include/asm/io.h	/^#define readb_be(/;"	d
readb_le	drivers/bios_emulator/biosemui.h	/^#define readb_le(/;"	d
readb_relaxed	arch/arc/include/asm/io.h	/^#define readb_relaxed(/;"	d
readb_relaxed	arch/mips/include/asm/io.h	/^#define readb_relaxed	/;"	d
readbuf	fs/jffs2/jffs2_private.h	/^	void *readbuf;$/;"	m	struct:b_lists	typeref:typename:void *
readchar	tools/gdb/remote.c	/^readchar (int timeout)$/;"	f	typeref:typename:int	file:
readenv	common/env_nand.c	/^static int readenv(size_t offset, u_char *buf)$/;"	f	typeref:typename:int	file:
readers	drivers/mtd/ubi/ubi.h	/^	int readers;$/;"	m	struct:ubi_volume	typeref:typename:int
readext	include/phy.h	/^	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);$/;"	m	struct:phy_driver	typeref:typename:int (*)(struct phy_device * phydev,int addr,int devad,int reg)
readfr_extra_feature_reg	arch/arm/mach-kirkwood/include/mach/cpu.h	/^static inline unsigned int readfr_extra_feature_reg(void)$/;"	f	typeref:typename:unsigned int
readfr_extra_feature_reg	arch/arm/mach-orion5x/include/mach/cpu.h	/^static inline unsigned int readfr_extra_feature_reg(void)$/;"	f	typeref:typename:unsigned int
reading	fs/yaffs2/yaffsfs.c	/^	u8 reading:1;$/;"	m	struct:yaffsfs_FileDes	typeref:typename:u8:1	file:
readio	include/linux/fb.h	/^	void (*readio) (struct fb_info *info, void *dst, void *src, unsigned int size);$/;"	m	struct:fb_pixmap	typeref:typename:void (*)(struct fb_info * info,void * dst,void * src,unsigned int size)
readl	arch/arc/include/asm/io.h	/^#define readl(/;"	d
readl	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline u32 readl(void *addr)$/;"	f	typeref:typename:u32
readl	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline u32 readl(void *addr)$/;"	f	typeref:typename:u32
readl	arch/arm/include/asm/io.h	/^#define readl(/;"	d
readl	arch/avr32/include/asm/io.h	/^#define readl(/;"	d
readl	arch/blackfin/include/asm/io.h	/^static inline unsigned int readl(const volatile void __iomem *addr)$/;"	f	typeref:typename:unsigned int
readl	arch/m68k/include/asm/io.h	/^#define readl(/;"	d
readl	arch/microblaze/include/asm/io.h	/^#define readl(/;"	d
readl	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define readl(/;"	d	file:
readl	arch/nds32/include/asm/io.h	/^#define readl(/;"	d
readl	arch/nds32/include/asm/io.h	/^static inline unsigned int readl(unsigned int *addr)$/;"	f	typeref:typename:unsigned int
readl	arch/nios2/include/asm/io.h	/^#define readl(/;"	d
readl	arch/openrisc/include/asm/io.h	/^#define readl(/;"	d
readl	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define readl(/;"	d	file:
readl	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define readl(/;"	d	file:
readl	arch/powerpc/include/asm/io.h	/^#define readl(/;"	d
readl	arch/sandbox/include/asm/io.h	/^#define readl(/;"	d
readl	arch/sh/include/asm/io.h	/^#define readl(/;"	d
readl	arch/sparc/include/asm/io.h	/^#define readl	/;"	d
readl	arch/x86/include/asm/io.h	/^#define readl(/;"	d
readl	arch/xtensa/include/asm/io.h	/^#define readl(/;"	d
readl	include/iotrace.h	/^#define readl(/;"	d
readl_be	arch/mips/include/asm/io.h	/^#define readl_be(/;"	d
readl_le	drivers/bios_emulator/biosemui.h	/^#define readl_le(/;"	d
readl_relaxed	arch/arc/include/asm/io.h	/^#define readl_relaxed(/;"	d
readl_relaxed	arch/mips/include/asm/io.h	/^#define readl_relaxed	/;"	d
readlatency	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 readlatency;$/;"	m	struct:rk3288_msch	typeref:typename:u32
readlatency	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 readlatency;$/;"	m	struct:rk3036_service_sys	typeref:typename:u32
readnfc	drivers/mtd/nand/mxc_nand.h	/^#define readnfc	/;"	d
readptr	board/esd/common/xilinx_jtag/ports.c	/^static int readptr = 0;$/;"	v	typeref:typename:int	file:
readq	arch/arm/include/asm/io.h	/^#define readq(/;"	d
readq	arch/mips/include/asm/io.h	/^#define readq	/;"	d
readq	arch/sparc/include/asm/io.h	/^#define readq	/;"	d
readq_be	arch/mips/include/asm/io.h	/^#define readq_be(/;"	d
readq_relaxed	arch/mips/include/asm/io.h	/^#define readq_relaxed	/;"	d
readsb	arch/arm/include/asm/io.h	/^#define readsb(/;"	d
readsb	arch/blackfin/include/asm/io.h	/^static inline void readsb(const void __iomem *addr, void *buf, int len)$/;"	f	typeref:typename:void
readsb	arch/nds32/include/asm/io.h	/^static inline void readsb(unsigned int *addr, void * data, int bytelen)$/;"	f	typeref:typename:void
readsb	drivers/usb/musb-new/musb_io.h	/^static inline void readsb(const void __iomem *addr, void *buf, int len)$/;"	f	typeref:typename:void
readsl	arch/arm/include/asm/io.h	/^#define readsl(/;"	d
readsl	arch/blackfin/include/asm/io.h	/^static inline void readsl(const void __iomem *addr, void *buf, int len)$/;"	f	typeref:typename:void
readsl	arch/nds32/include/asm/io.h	/^static inline void readsl(unsigned int *addr, void * data, int longlen)$/;"	f	typeref:typename:void
readsl	drivers/usb/musb-new/musb_io.h	/^static inline void readsl(const void __iomem *addr, void *buf, int len)$/;"	f	typeref:typename:void
readspdbit	board/armltd/integrator/lowlevel_init.S	/^readspdbit:$/;"	l
readsw	arch/arm/include/asm/io.h	/^#define readsw(/;"	d
readsw	arch/blackfin/include/asm/io.h	/^static inline void readsw(const void __iomem *addr, void *buf, int len)$/;"	f	typeref:typename:void
readsw	arch/nds32/include/asm/io.h	/^static inline void readsw(unsigned int *addr, void * data, int wordlen)$/;"	f	typeref:typename:void
readsw	drivers/usb/musb-new/musb_io.h	/^static inline void readsw(const void __iomem *addr, void *buf, int len)$/;"	f	typeref:typename:void
readw	arch/arc/include/asm/io.h	/^#define readw(/;"	d
readw	arch/arm/include/asm/io.h	/^#define readw(/;"	d
readw	arch/avr32/include/asm/io.h	/^#define readw(/;"	d
readw	arch/blackfin/include/asm/io.h	/^static inline unsigned short readw(const volatile void __iomem *addr)$/;"	f	typeref:typename:unsigned short
readw	arch/m68k/include/asm/io.h	/^#define readw(/;"	d
readw	arch/microblaze/include/asm/io.h	/^#define readw(/;"	d
readw	arch/nds32/include/asm/io.h	/^#define readw(/;"	d
readw	arch/nds32/include/asm/io.h	/^static inline unsigned short readw(unsigned short *addr)$/;"	f	typeref:typename:unsigned short
readw	arch/nios2/include/asm/io.h	/^#define readw(/;"	d
readw	arch/openrisc/include/asm/io.h	/^#define readw(/;"	d
readw	arch/powerpc/include/asm/io.h	/^#define readw(/;"	d
readw	arch/sandbox/include/asm/io.h	/^#define readw(/;"	d
readw	arch/sh/include/asm/io.h	/^#define readw(/;"	d
readw	arch/sparc/include/asm/io.h	/^#define readw	/;"	d
readw	arch/x86/include/asm/io.h	/^#define readw(/;"	d
readw	arch/xtensa/include/asm/io.h	/^#define readw(/;"	d
readw	include/iotrace.h	/^#define readw(/;"	d
readw_be	arch/mips/include/asm/io.h	/^#define readw_be(/;"	d
readw_le	drivers/bios_emulator/biosemui.h	/^#define readw_le(/;"	d
readw_relaxed	arch/arc/include/asm/io.h	/^#define readw_relaxed(/;"	d
readw_relaxed	arch/mips/include/asm/io.h	/^#define readw_relaxed	/;"	d
readx_c0_entrylo0	arch/mips/include/asm/mipsregs.h	/^#define readx_c0_entrylo0(/;"	d
readx_c0_entrylo1	arch/mips/include/asm/mipsregs.h	/^#define readx_c0_entrylo1(/;"	d
ready	arch/x86/include/asm/me_common.h	/^	u32 ready:1;$/;"	m	struct:mei_csr	typeref:typename:u32:1
ready	net/link_local.c	/^static int ready;$/;"	v	typeref:typename:int	file:
ready_to_send	arch/powerpc/cpu/mpc5xx/serial.c	/^static int ready_to_send(void)$/;"	f	typeref:typename:int	file:
realStream	lib/lzma/Types.h	/^  ILookInStream *realStream;$/;"	m	struct:__anonf2a2f1b90908	typeref:typename:ILookInStream *
realStream	lib/lzma/Types.h	/^  ILookInStream *realStream;$/;"	m	struct:__anonf2a2f1b90a08	typeref:typename:ILookInStream *
realStream	lib/lzma/Types.h	/^  ISeekInStream *realStream;$/;"	m	struct:__anonf2a2f1b90808	typeref:typename:ISeekInStream *
realbus	board/freescale/corenet_ds/eth_hydra.c	/^	struct mii_dev *realbus;$/;"	m	struct:hydra_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/corenet_ds/eth_p4080.c	/^	struct mii_dev *realbus;$/;"	m	struct:p4080ds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/corenet_ds/eth_superhydra.c	/^	struct mii_dev *realbus;$/;"	m	struct:super_hydra_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/ls1021aqds/eth.c	/^	struct mii_dev *realbus;$/;"	m	struct:ls1021a_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/ls1043aqds/eth.c	/^	struct mii_dev *realbus;$/;"	m	struct:ls1043aqds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/ls1046aqds/eth.c	/^	struct mii_dev *realbus;$/;"	m	struct:ls1046aqds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/ls2080aqds/eth.c	/^	struct mii_dev *realbus;$/;"	m	struct:ls2080a_qds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/t102xqds/eth_t102xqds.c	/^	struct mii_dev *realbus;$/;"	m	struct:t1024qds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/t1040qds/eth.c	/^	struct mii_dev *realbus;$/;"	m	struct:t1040_qds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/t208xqds/eth_t208xqds.c	/^	struct mii_dev *realbus;$/;"	m	struct:t208xqds_mdio	typeref:struct:mii_dev *	file:
realbus	board/freescale/t4qds/eth.c	/^	struct mii_dev *realbus;$/;"	m	struct:t4240qds_mdio	typeref:struct:mii_dev *	file:
realloc	include/malloc.h	/^#define realloc /;"	d
realloc	include/malloc.h	/^#pragma weak realloc /;"	d
realloc_lpt_leb	fs/ubifs/lpt_commit.c	/^static int realloc_lpt_leb(struct ubifs_info *c, int *lnum)$/;"	f	typeref:typename:int	file:
realmode_call	arch/x86/lib/bios.c	/^asmlinkage void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx,$/;"	v	typeref:typename:asmlinkage void (*)(u32 addr,u32 eax,u32 ebx,u32 ecx,u32 edx,u32 esi,u32 edi)
realmode_call	arch/x86/lib/bios.h	/^asmlinkage void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx,$/;"	v	typeref:typename:asmlinkage void (*)(u32 addr,u32 eax,u32 ebx,u32 ecx,u32 edx,u32 esi,u32 edi)
realmode_idt	arch/x86/lib/bios.h	/^struct realmode_idt {$/;"	s
realmode_interrupt	arch/x86/lib/bios.c	/^asmlinkage void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx,$/;"	v	typeref:typename:asmlinkage void (*)(u32 intno,u32 eax,u32 ebx,u32 ecx,u32 edx,u32 esi,u32 edi)
realmode_interrupt	arch/x86/lib/bios.h	/^asmlinkage void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx,$/;"	v	typeref:typename:asmlinkage void (*)(u32 intno,u32 eax,u32 ebx,u32 ecx,u32 edx,u32 esi,u32 edi)
realmode_power_off	include/linux/apm_bios.h	/^	int			realmode_power_off;$/;"	m	struct:apm_info	typeref:typename:int
realmode_swtch	arch/x86/include/asm/bootparam.h	/^	__u32	realmode_swtch;$/;"	m	struct:setup_header	typeref:typename:__u32
rear_button_pins	arch/arm/dts/armada-388-clearfog.dts	/^				rear_button_pins: rear-button-pins {$/;"	l
reason_str	board/nokia/rx51/tag_omap.h	/^	char reason_str[12];$/;"	m	struct:omap_boot_reason_config	typeref:typename:char[12]
reboot	arch/mips/dts/img,boston.dts	/^	reboot: syscon-reboot {$/;"	l
reboot	cmd/tpm_test.c	/^#define reboot(/;"	d	file:
reboot_command	arch/sparc/lib/bootm.c	/^			unsigned int reboot_command;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned int	file:
reboot_notifier	include/linux/mtd/mtd.h	/^	struct notifier_block reboot_notifier;  \/* default mode before reboot *\/$/;"	m	struct:mtd_info	typeref:struct:notifier_block
reboot_physical	arch/sparc/cpu/leon2/prom.c	/^	void (*reboot_physical) (char *cmd);$/;"	m	struct:leon_reloc_func	typeref:typename:void (*)(char * cmd)	file:
reboot_physical	arch/sparc/cpu/leon3/prom.c	/^	void (*reboot_physical) (char *cmd);$/;"	m	struct:leon_reloc_func	typeref:typename:void (*)(char * cmd)	file:
reboot_status	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reboot_status; \/* 0x258 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
rec	tools/buildman/kconfiglib.py	/^        def rec(expr):$/;"	f	member:Config._expr_depends_on	file:
rec_count	include/trace.h	/^	uint32_t rec_count;		\/* Number of records *\/$/;"	m	struct:trace_output_hdr	typeref:typename:uint32_t
recalc	drivers/video/ipu.h	/^	void (*recalc) (struct clk *);$/;"	m	struct:clk	typeref:typename:void (*)(struct clk *)
recalculate	fs/ubifs/ubifs.h	/^	unsigned int recalculate:1;$/;"	m	struct:ubifs_budget_req	typeref:typename:unsigned int:1
recalibrate_ddr	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static force_inline void recalibrate_ddr(void)$/;"	f	typeref:typename:force_inline void	file:
recalibrate_iodelay	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void __weak recalibrate_iodelay(void)$/;"	f	typeref:typename:void __weak
recalibrate_iodelay	board/ti/am57xx/board.c	/^void recalibrate_iodelay(void)$/;"	f	typeref:typename:void
recalibrate_iodelay	board/ti/dra7xx/evm.c	/^void recalibrate_iodelay(void)$/;"	f	typeref:typename:void
recbuf	board/mpl/pati/pati.c	/^int recbuf[REC_BUFFER_SIZE];$/;"	v	typeref:typename:int[]
receive_bulk_packet	drivers/usb/host/r8a66597-hcd.c	/^static int receive_bulk_packet(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:int	file:
receive_bytes	arch/powerpc/cpu/mpc512x/i2c.c	/^static int receive_bytes (uchar chip, char *buf, int len)$/;"	f	typeref:typename:int	file:
receive_bytes	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int receive_bytes(uchar chip, char *buf, int len)$/;"	f	typeref:typename:int	file:
receive_control_packet	drivers/usb/host/r8a66597-hcd.c	/^static int receive_control_packet(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:int	file:
receive_data	drivers/usb/gadget/atmel_usba_udc.c	/^static void receive_data(struct usba_ep *ep)$/;"	f	typeref:typename:void	file:
receive_data	include/gdsys_fpga.h	/^	u16 receive_data;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
receive_errors	drivers/net/e1000.h	/^	uint32_t receive_errors;$/;"	m	struct:e1000_phy_stats	typeref:typename:uint32_t
receive_filter_mask	include/efi_api.h	/^	u32 receive_filter_mask;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
receive_filter_setting	include/efi_api.h	/^	u32 receive_filter_setting;$/;"	m	struct:efi_simple_network_mode	typeref:typename:u32
receive_icmp	net/net.c	/^static void receive_icmp(struct ip_udp_hdr *ip, int len,$/;"	f	typeref:typename:void	file:
receive_q1_ptr	drivers/net/zynq_gem.c	/^	u32 receive_q1_ptr; \/* 0x480 - Receive priority queue 1 *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
receive_timestamp	net/sntp.h	/^	unsigned long long receive_timestamp;$/;"	m	struct:sntp_pkt_t	typeref:typename:unsigned long long
received_bsync	drivers/input/ps2mult.c	/^static int received_bsync = 0;$/;"	v	typeref:typename:int	file:
received_cbw	drivers/usb/gadget/f_mass_storage.c	/^static int received_cbw(struct fsg_dev *fsg, struct fsg_buffhd *bh)$/;"	f	typeref:typename:int	file:
received_escape	drivers/input/ps2mult.c	/^static int received_escape = 0;$/;"	v	typeref:typename:int	file:
received_selector	drivers/input/ps2mult.c	/^static int received_selector = 0;$/;"	v	typeref:typename:int	file:
reclaim_rx_buffers	drivers/net/macb.c	/^static void reclaim_rx_buffers(struct macb_device *macb,$/;"	f	typeref:typename:void	file:
reconfig_usbd	drivers/usb/gadget/dwc2_udc_otg.c	/^static void reconfig_usbd(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
reconfigure_pll	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^void reconfigure_pll(u32 new_cpu_freq)$/;"	f	typeref:typename:void
record	arch/arm/imx-common/hab.c	/^struct record {$/;"	s	file:
record	common/bootstage.c	/^static struct bootstage_record record[BOOTSTAGE_ID_COUNT] = { {1} };$/;"	v	typeref:struct:bootstage_record[]	file:
record	drivers/rtc/ftrtc010.c	/^	unsigned int record;		\/* 0x1c *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
record	lib/dhry/dhry.h	/^typedef struct record $/;"	s
record_transfer_result	drivers/usb/host/xhci-ring.c	/^static void record_transfer_result(struct usb_device *udev,$/;"	f	typeref:typename:void	file:
records	arch/x86/cpu/mp_init.c	/^	struct mp_flight_record *records;$/;"	m	struct:mp_flight_plan	typeref:struct:mp_flight_record *	file:
recover_head	fs/ubifs/recovery.c	/^static int recover_head(struct ubifs_info *c, int lnum, int offs, void *sbuf)$/;"	f	typeref:typename:int	file:
recover_peb	drivers/mtd/ubi/eba.c	/^static int recover_peb(struct ubi_device *ubi, int pnum, int vol_id, int lnum,$/;"	f	typeref:typename:int	file:
recover_transaction	fs/ext4/ext4_journal.c	/^void recover_transaction(int prev_desc_logical_no)$/;"	f	typeref:typename:void
recovery_build_number	arch/x86/include/asm/me_common.h	/^	u16 recovery_build_number;$/;"	m	struct:me_fw_version	typeref:typename:u16
recovery_hot_fix	arch/x86/include/asm/me_common.h	/^	u16 recovery_hot_fix;$/;"	m	struct:me_fw_version	typeref:typename:u16
recovery_major	arch/x86/include/asm/me_common.h	/^	u16 recovery_major;$/;"	m	struct:me_fw_version	typeref:typename:u16
recovery_minor	arch/x86/include/asm/me_common.h	/^	u16 recovery_minor;$/;"	m	struct:me_fw_version	typeref:typename:u16
recovery_mode_enabled	arch/x86/cpu/ivybridge/sdram.c	/^static int recovery_mode_enabled(void)$/;"	f	typeref:typename:int	file:
recovery_req	drivers/misc/cros_ec_sandbox.c	/^	bool recovery_req;$/;"	m	struct:ec_state	typeref:typename:bool	file:
recr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	recr0;	\/* 0x810 Receive Equalization Control *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
recr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	recr0;	\/* 0x810 Receive Equalization Control *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
recr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	recr0;	\/* 0x810 Receive Equalization Control *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
recr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	recr1;$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
recr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	recr1;$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
recv	drivers/net/altera_tse.h	/^	int (*recv)(struct udevice *dev, int flags, uchar **packetp);$/;"	m	struct:tse_ops	typeref:typename:int (*)(struct udevice * dev,int flags,uchar ** packetp)
recv	include/mailbox-uclass.h	/^	int (*recv)(struct mbox_chan *chan, void *data);$/;"	m	struct:mbox_ops	typeref:typename:int (*)(struct mbox_chan * chan,void * data)
recv	include/net.h	/^	int (*recv)(struct eth_device *);$/;"	m	struct:eth_device	typeref:typename:int (*)(struct eth_device *)
recv	include/net.h	/^	int (*recv)(struct udevice *dev, int flags, uchar **packetp);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev,int flags,uchar ** packetp)
recv	include/tpm.h	/^	int (*recv)(struct udevice *dev, uint8_t *recvbuf, size_t max_size);$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev,uint8_t * recvbuf,size_t max_size)
recv	post/cpu/mpc8xx/ether.c	/^	int (*recv) (int index, void *packet, int length);$/;"	m	struct:__anon27059ff10108	typeref:typename:int (*)(int index,void * packet,int length)	file:
recv0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 recv0[55];$/;"	m	struct:pit_reg	typeref:typename:u32[55]
recv0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 recv0[55];$/;"	m	struct:pit_reg	typeref:typename:u32[55]
recv1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 recv1[6];$/;"	m	struct:pit_reg	typeref:typename:u32[6]
recv1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 recv1[6];$/;"	m	struct:pit_reg	typeref:typename:u32[6]
recv_frames	drivers/net/mpc512x_fec.h	/^	mpc512x_frame recv_frames[FEC_RBD_NUM];		\/* receive buff *\/$/;"	m	struct:__anonf8b8c0fc0408	typeref:typename:mpc512x_frame[]
recv_packet_buffer	drivers/net/sandbox.c	/^	uchar *recv_packet_buffer;$/;"	m	struct:eth_sandbox_priv	typeref:typename:uchar *	file:
recv_packet_length	drivers/net/sandbox.c	/^	int recv_packet_length;$/;"	m	struct:eth_sandbox_priv	typeref:typename:int	file:
recv_pol_recovery	include/usb/ulpi.h	/^	u8	recv_pol_recovery;$/;"	m	struct:ulpi_regs	typeref:typename:u8
recvbuf_wait	drivers/spi/sh_spi.c	/^static int recvbuf_wait(struct sh_spi *ss)$/;"	f	typeref:typename:int	file:
red	include/bmp_layout.h	/^	__u8	red;$/;"	m	struct:bmp_color_table_entry	typeref:typename:__u8
red	include/ec_commands.h	/^			uint8_t led, red, green, blue;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::rgb	typeref:typename:uint8_t
red	include/linux/fb.h	/^	__u16 *red;			\/* Red values	*\/$/;"	m	struct:fb_cmap	typeref:typename:__u16 *
red	include/linux/fb.h	/^	__u16 *red;		\/* Red values	*\/$/;"	m	struct:fb_cmap_user	typeref:typename:__u16 *
red	include/linux/fb.h	/^	struct fb_bitfield red;		\/* bitfield in fb mem if true color, *\/$/;"	m	struct:fb_var_screeninfo	typeref:struct:fb_bitfield
red_led_off	arch/arm/cpu/arm920t/ep93xx/led.c	/^void red_led_off(void)$/;"	f	typeref:typename:void
red_led_off	arch/arm/mach-at91/arm926ejs/led.c	/^void red_led_off(void)$/;"	f	typeref:typename:void
red_led_off	board/atmel/at91rm9200ek/led.c	/^void	red_led_off(void)$/;"	f	typeref:typename:void
red_led_off	board/st/stm32f429-discovery/led.c	/^void red_led_off(void)$/;"	f	typeref:typename:void
red_led_off	common/board_f.c	/^__weak void red_led_off(void) {}$/;"	f	typeref:typename:__weak void
red_led_off	drivers/misc/gpio_led.c	/^void red_led_off(void)$/;"	f	typeref:typename:void
red_led_on	arch/arm/cpu/arm920t/ep93xx/led.c	/^void red_led_on(void)$/;"	f	typeref:typename:void
red_led_on	arch/arm/mach-at91/arm926ejs/led.c	/^void red_led_on(void)$/;"	f	typeref:typename:void
red_led_on	board/atmel/at91rm9200ek/led.c	/^void	 red_led_on(void)$/;"	f	typeref:typename:void
red_led_on	board/st/stm32f429-discovery/led.c	/^void red_led_on(void)$/;"	f	typeref:typename:void
red_led_on	common/board_f.c	/^__weak void red_led_on(void) {}$/;"	f	typeref:typename:__weak void
red_led_on	drivers/misc/gpio_led.c	/^void red_led_on(void)$/;"	f	typeref:typename:void
red_mask_pos	arch/x86/include/asm/coreboot_tables.h	/^	u8 red_mask_pos;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
red_mask_pos	include/vbe.h	/^	u8 red_mask_pos;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
red_mask_size	arch/x86/include/asm/coreboot_tables.h	/^	u8 red_mask_size;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
red_mask_size	include/vbe.h	/^	u8 red_mask_size;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
red_pos	arch/arm/include/asm/setup.h	/^	u8		red_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
red_pos	arch/nds32/include/asm/setup.h	/^	u8		red_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
red_pos	include/linux/screen_info.h	/^	__u8  red_pos;		\/* 0x27 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
red_profile	include/vsc9953.h	/^	u32	red_profile[16];$/;"	m	struct:vsc9953_qsys_qos_cfg	typeref:typename:u32[16]
red_size	arch/arm/include/asm/setup.h	/^	u8		red_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
red_size	arch/nds32/include/asm/setup.h	/^	u8		red_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
red_size	include/linux/screen_info.h	/^	__u8  red_size;		\/* 0x26 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
red_square	drivers/demo/demo-pdata.c	/^static const struct dm_demo_pdata red_square = {$/;"	v	typeref:typename:const struct dm_demo_pdata	file:
redir_struct	common/cli_hush.c	/^struct redir_struct {$/;"	s	file:
redir_table	common/cli_hush.c	/^struct {int mode; int default_fd; char *descrip;} redir_table[] = {$/;"	v	typeref:struct:__anon62a9299d0208[]
redir_type	common/cli_hush.c	/^} redir_type;$/;"	t	typeref:enum:__anon62a9299d0103	file:
redirect_dup_num	common/cli_hush.c	/^static int redirect_dup_num(struct in_str *input)$/;"	f	typeref:typename:int	file:
redirect_int_from_saic_to_aic	arch/arm/mach-at91/atmel_sfr.c	/^void redirect_int_from_saic_to_aic(void)$/;"	f	typeref:typename:void
redirect_int_from_saic_to_aic	arch/arm/mach-at91/spl_atmel.c	/^__weak void redirect_int_from_saic_to_aic(void)$/;"	f	typeref:typename:__weak void
redirect_opt_num	common/cli_hush.c	/^static int redirect_opt_num(o_string *o)$/;"	f	typeref:typename:int	file:
redirects	common/cli_hush.c	/^	struct redir_struct *redirects;	\/* I\/O redirections *\/$/;"	m	struct:child_prog	typeref:struct:redir_struct *	file:
redlut	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	redlut;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
reduced_write	disk/part_amiga.h	/^    u32 reduced_write;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
redundant_init	drivers/net/tsec.c	/^void redundant_init(struct tsec_private *priv)$/;"	f	typeref:typename:void
redx	include/linux/fb.h	/^	__u32 redx;	\/* in fraction of 1024 *\/$/;"	m	struct:fb_chroma	typeref:typename:__u32
redy	include/linux/fb.h	/^	__u32 redy;$/;"	m	struct:fb_chroma	typeref:typename:__u32
ref	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ref;				\/* offset 0x0270 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ref	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 ref;		\/* 0xD4: EMC_REF *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
ref	drivers/usb/gadget/f_mass_storage.c	/^	struct kref		ref;$/;"	m	struct:fsg_common	typeref:struct:kref	file:
ref_clk0_pins	arch/arm/dts/armada-38x.dtsi	/^				ref_clk0_pins: ref-clk-pins-0 {$/;"	l	label:pinctrl
ref_clk1_pins	arch/arm/dts/armada-38x.dtsi	/^				ref_clk1_pins: ref-clk-pins-1 {$/;"	l	label:pinctrl
ref_clk_enable	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static int ref_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
ref_clk_enable	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static int ref_clk_enable(struct clk *c, int enable)$/;"	f	typeref:typename:int	file:
ref_clk_hz	arch/arm/cpu/armv7/mx5/clock.c	/^	u32 ref_clk_hz;$/;"	m	struct:fixed_pll_mfd	typeref:typename:u32	file:
ref_clk_hz	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t ref_clk_hz; \/**< reference frequency in Hz *\/$/;"	m	struct:cpu_vhint_data	typeref:typename:uint32_t
ref_clk_ops	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^struct clk_ops ref_clk_ops = {$/;"	v	typeref:struct:clk_ops
ref_clk_ops	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^struct clk_ops ref_clk_ops = {$/;"	v	typeref:struct:clk_ops
ref_clkin0_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	ref_clkin0_ck: ref_clkin0_ck {$/;"	l
ref_clkin1_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	ref_clkin1_ck: ref_clkin1_ck {$/;"	l
ref_clkin2_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	ref_clkin2_ck: ref_clkin2_ck {$/;"	l
ref_clkin3_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	ref_clkin3_ck: ref_clkin3_ck {$/;"	l
ref_clock	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct ref_clock {$/;"	s
ref_clock	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct ref_clock {$/;"	s
ref_clock	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^enum ref_clock {$/;"	g
ref_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ref_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ref_count	drivers/mtd/ubi/ubi.h	/^	int ref_count;$/;"	m	struct:ubi_device	typeref:typename:int
ref_count	drivers/mtd/ubi/ubi.h	/^	int ref_count;$/;"	m	struct:ubi_volume	typeref:typename:int
ref_ctrl	arch/arm/include/asm/emif.h	/^	u32 ref_ctrl;$/;"	m	struct:emif_regs	typeref:typename:u32
ref_ctrl	board/siemens/draco/board.h	/^	unsigned int ref_ctrl;			\/* 0x0000093B *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
ref_ctrl_final	arch/arm/include/asm/emif.h	/^	u32 ref_ctrl_final;$/;"	m	struct:emif_regs	typeref:typename:u32
ref_dis	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 ref_dis:1;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:1
ref_node_alsz	fs/ubifs/ubifs.h	/^	int ref_node_alsz;$/;"	m	struct:ubifs_info	typeref:typename:int
ref_per_zq	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 ref_per_zq;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
ref_point_counter	include/linux/mtd/flashchip.h	/^	int ref_point_counter;$/;"	m	struct:flchip	typeref:typename:int
ref_raw_card	include/ddr_spd.h	/^			uint8_t ref_raw_card;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508	typeref:typename:uint8_t
ref_raw_card	include/ddr_spd.h	/^			uint8_t ref_raw_card;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
ref_raw_card	include/ddr_spd.h	/^			uint8_t ref_raw_card;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
ref_raw_card	include/ddr_spd.h	/^			unsigned char ref_raw_card;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0208	typeref:typename:unsigned char
ref_raw_card	include/ddr_spd.h	/^			unsigned char ref_raw_card;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
ref_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ref_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
ref_to_sync	arch/arm/include/asm/arch-tegra/dc.h	/^	uint ref_to_sync;		\/* _DISP_REF_TO_SYNC_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
ref_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t ref_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
refcfg	drivers/ddr/microchip/ddr2_regs.h	/^	u32 refcfg;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
refclk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^struct refclk {$/;"	s
refclk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^struct refclk {$/;"	s
refclk	arch/arm/dts/am437x-gp-evm.dts	/^	refclk: oscillator {$/;"	l
refclk	arch/arm/dts/armada-375.dtsi	/^		refclk: oscillator {$/;"	l
refclk	arch/arm/dts/armada-38x.dtsi	/^		refclk: oscillator {$/;"	l
refclk	arch/arm/dts/armada-xp.dtsi	/^		refclk: oscillator {$/;"	l
refclk	arch/arm/dts/uniphier-common32.dtsi	/^		refclk: ref {$/;"	l
refclk	arch/arm/dts/uniphier-ld11.dtsi	/^		refclk: ref {$/;"	l
refclk	arch/arm/dts/uniphier-ld20.dtsi	/^		refclk: ref {$/;"	l
refclk	arch/arm/dts/uniphier-sld3.dtsi	/^		refclk: ref {$/;"	l
refclk50mhz	arch/arm/dts/thunderx-88xx.dtsi	/^		refclk50mhz: refclk50mhz {$/;"	l
refclk_entries	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^int refclk_entries = sizeof(refclk_str_tbl)\/sizeof(refclk_str_tbl[0]);$/;"	v	typeref:typename:int
refclk_entries	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^int refclk_entries = sizeof(refclk_str_tbl)\/sizeof(refclk_str_tbl[0]);$/;"	v	typeref:typename:int
refclk_lkup	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^struct refclk_lkup {$/;"	s	file:
refclk_lkup	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^struct refclk_lkup {$/;"	s	file:
refclk_str_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct refclk_lkup refclk_str_tbl[] = {$/;"	v	typeref:struct:refclk_lkup[]	file:
refclk_str_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct refclk_lkup refclk_str_tbl[] = {$/;"	v	typeref:struct:refclk_lkup[]	file:
refclk_str_to_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^struct refclk *refclk_str_to_clk(const char *name)$/;"	f	typeref:struct:refclk *
refclk_str_to_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^struct refclk *refclk_str_to_clk(const char *name)$/;"	f	typeref:struct:refclk *
refclkarm	arch/arm/dts/k2hk-evm.dts	/^			refclkarm: refclkarm {$/;"	l
refclkddr3a	arch/arm/dts/k2e-evm.dts	/^			refclkddr3a: refclkddr3a {$/;"	l
refclkddr3a	arch/arm/dts/k2hk-evm.dts	/^			refclkddr3a: refclkddr3a {$/;"	l
refclkddr3b	arch/arm/dts/k2hk-evm.dts	/^			refclkddr3b: refclkddr3b {$/;"	l
refclki1	drivers/pinctrl/pinctrl_pic32.c	/^	u32 refclki1;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
refclki2	drivers/pinctrl/pinctrl_pic32.c	/^	u32 refclki2;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
refclki3	drivers/pinctrl/pinctrl_pic32.c	/^	u32 refclki3;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
refclki4	drivers/pinctrl/pinctrl_pic32.c	/^	u32 refclki4;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
refclkpass	arch/arm/dts/k2e-evm.dts	/^			refclkpass: refclkpass {$/;"	l
refclkpass	arch/arm/dts/k2hk-evm.dts	/^			refclkpass: refclkpass {$/;"	l
refclksys	arch/arm/dts/k2e-evm.dts	/^			refclksys: refclksys {$/;"	l
refclksys	arch/arm/dts/k2hk-evm.dts	/^			refclksys: refclksys {$/;"	l
refclksys	arch/arm/dts/k2l-evm.dts	/^			refclksys: refclksys {$/;"	l
refcode.bin	Makefile	/^refcode.bin: $(srctree)\/board\/$(BOARDDIR)\/refcode.bin FORCE$/;"	t
refcount	arch/arm/include/asm/processor.h	/^	atomic_t			refcount;$/;"	m	struct:thread_struct	typeref:typename:atomic_t
refdiv	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	u32 refdiv;$/;"	m	struct:pll_div	typeref:typename:u32
refdiv	arch/mips/mach-ath79/ar934x/clk.c	/^	u8	refdiv;$/;"	m	struct:ar934x_pll_config	typeref:typename:u8	file:
refdiv	drivers/clk/rockchip/clk_rk3399.c	/^	u32 refdiv;$/;"	m	struct:pll_div	typeref:typename:u32	file:
reference_id	net/sntp.h	/^	uint reference_id;$/;"	m	struct:sntp_pkt_t	typeref:typename:uint
reference_timestamp	net/sntp.h	/^	unsigned long long reference_timestamp;$/;"	m	struct:sntp_pkt_t	typeref:typename:unsigned long long
references	fs/ubifs/debug.c	/^	int references;$/;"	m	struct:fsck_inode	typeref:typename:int	file:
reflection_high	include/gdsys_fpga.h	/^	u16 reflection_high;	\/* 0x00fe *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
reflection_high	include/gdsys_fpga.h	/^	u16 reflection_high;	\/* 0x3ffe *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
reflection_low	board/gdsys/p1022/controlcenterd.c	/^	u32 reflection_low;	\/* 0x0000 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u32	file:
reflection_low	include/gdsys_fpga.h	/^	u16 reflection_low;	\/* 0x0000 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
refr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 refr;	\/* REFR field of register MDREF *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
refresh	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	refresh;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
refresh	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 refresh;		\/* Configures dyn memory refresh operation   *\/$/;"	m	struct:emc_regs	typeref:typename:u32
refresh	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	refresh;$/;"	m	struct:s3c24x0_memctl	typeref:typename:u32
refresh	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 refresh;		\/* 0x70: EMC_REFRESH *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
refresh	drivers/video/videomodes.h	/^	int refresh;		\/* vertical refresh rate in hz  *\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
refresh	include/ddr_spd.h	/^	unsigned char refresh;     \/* 12 Refresh Rate\/Type *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
refresh	include/ddr_spd.h	/^	unsigned char refresh;     \/* 12 Refresh Rate\/Type *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
refresh	include/linux/fb.h	/^	u32 refresh;		\/* optional *\/$/;"	m	struct:fb_videomode	typeref:typename:u32
refresh	include/spd.h	/^	unsigned char refresh;     \/* 12 Refresh Rate\/Type *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
refresh_all	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	refresh_all;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
refresh_all_windows	scripts/kconfig/nconf.gui.c	/^void refresh_all_windows(WINDOW *main_window)$/;"	f	typeref:typename:void
refresh_count	fs/yaffs2/yaffs_guts.h	/^	u32 refresh_count;$/;"	m	struct:yaffs_dev	typeref:typename:u32
refresh_ctrl	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 refresh_ctrl;	\/* 0x20: EMC_REFCTRL *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
refresh_interval	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 refresh_interval;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
refresh_period	arch/avr32/include/asm/sdram.h	/^	unsigned long refresh_period;$/;"	m	struct:sdram_config	typeref:typename:unsigned long
refresh_period	fs/yaffs2/yaffs_guts.h	/^	int refresh_period;	\/* How often to check for a block refresh *\/$/;"	m	struct:yaffs_param	typeref:typename:int
refresh_rate	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 refresh_rate;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
refresh_rate	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t refresh_rate;$/;"	m	struct:mrc_params	typeref:typename:uint8_t
refresh_rate_ps	include/common_timing_params.h	/^	unsigned int refresh_rate_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
refresh_rate_ps	include/fsl_ddr_dimm_params.h	/^	int refresh_rate_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
refresh_settings_from_env	drivers/net/netconsole.c	/^static int refresh_settings_from_env(void)$/;"	f	typeref:typename:int	file:
refresh_skip	fs/yaffs2/yaffs_guts.h	/^	int refresh_skip;	\/* A skip down counter.$/;"	m	struct:yaffs_dev	typeref:typename:int
refresh_text_box	scripts/kconfig/lxdialog/textbox.c	/^static void refresh_text_box(WINDOW *dialog, WINDOW *box, int boxh, int boxw,$/;"	f	typeref:typename:void	file:
refrshtimr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t refrshtimr;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
refsel	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 refsel;	\/* REF_SEL field of register MDREF *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
reg	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint32_t		*reg;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint32_t *	file:
reg	arch/arm/include/asm/omap_common.h	/^	u32 reg;$/;"	m	struct:volts_efuse_data	typeref:typename:u32
reg	arch/arm/mach-at91/include/mach/at91_gpbr.h	/^	u32 reg[4];$/;"	m	struct:at91_gpbr	typeref:typename:u32[4]
reg	arch/arm/mach-zynq/clk.c	/^	u32		*reg;$/;"	m	struct:clk	typeref:typename:u32 *	file:
reg	arch/nios2/include/asm/ptrace.h	/^	unsigned reg[32];$/;"	m	struct:pt_regs	typeref:typename:unsigned[32]
reg	arch/powerpc/cpu/ppc4xx/sdram.h	/^	unsigned long reg;$/;"	m	struct:sdram_conf_s	typeref:typename:unsigned long
reg	arch/x86/include/asm/msr.h	/^	struct msr reg;$/;"	m	struct:msr_info	typeref:struct:msr
reg	board/bct-brettl2/smsc9303.c	/^	unsigned char reg;$/;"	m	struct:__anon648e74860208	typeref:typename:unsigned char	file:
reg	board/bct-brettl2/smsc9303.c	/^	unsigned short reg;$/;"	m	struct:__anon648e74860108	typeref:typename:unsigned short	file:
reg	board/creative/xfi3/xfi3.c	/^	uint8_t		reg;$/;"	m	struct:__anond31a65320108	typeref:typename:uint8_t	file:
reg	board/gdsys/common/phy.c	/^	u8 reg;$/;"	m	struct:mii_setupcmd	typeref:typename:u8	file:
reg	board/micronas/vct/dcgu.h	/^	u32 reg;$/;"	m	union:dcgu_clk_en1	typeref:typename:u32
reg	board/micronas/vct/dcgu.h	/^	u32 reg;$/;"	m	union:dcgu_clk_en2	typeref:typename:u32
reg	board/micronas/vct/dcgu.h	/^	u32 reg;$/;"	m	union:dcgu_reset_unit1	typeref:typename:u32
reg	board/micronas/vct/scc.h	/^	u32 reg;$/;"	m	union:scc_cmd	typeref:typename:u32
reg	board/micronas/vct/scc.h	/^	u32 reg;$/;"	m	union:scc_debug	typeref:typename:u32
reg	board/micronas/vct/scc.h	/^	u32 reg;$/;"	m	union:scc_dma_cfg	typeref:typename:u32
reg	board/micronas/vct/scc.h	/^	u32 reg;$/;"	m	union:scc_softwareconfiguration	typeref:typename:u32
reg	board/micronas/vct/top.c	/^	u32 reg;$/;"	m	union:_TOP_PINMUX_t	typeref:typename:u32	file:
reg	board/sandisk/sansa_fuze_plus/sfp.c	/^	uint8_t		reg;$/;"	m	struct:__anon24bc4dd30108	typeref:typename:uint8_t	file:
reg	board/tqc/tqm5200/tqm5200.c	/^	int	reg;$/;"	m	struct:_tfp410_config	typeref:typename:int	file:
reg	board/zipitz2/zipitz2.c	/^	unsigned char	reg;$/;"	m	struct:__anonddc6b5340108	typeref:typename:unsigned char	file:
reg	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int reg;$/;"	m	struct:uniphier_clk_gate_data	typeref:typename:unsigned int
reg	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int reg;$/;"	m	struct:uniphier_clk_mux_data	typeref:typename:unsigned int
reg	drivers/gpio/bcm2835_gpio.c	/^	struct bcm2835_gpio_regs *reg;$/;"	m	struct:bcm2835_gpios	typeref:struct:bcm2835_gpio_regs *	file:
reg	drivers/gpio/vybrid_gpio.c	/^	struct vybrid_gpio_regs *reg;$/;"	m	struct:vybrid_gpios	typeref:struct:vybrid_gpio_regs *	file:
reg	drivers/mmc/sunxi_mmc.c	/^	struct sunxi_mmc *reg;$/;"	m	struct:sunxi_mmc_host	typeref:struct:sunxi_mmc *	file:
reg	drivers/mmc/tegra_mmc.c	/^	struct tegra_mmc *reg;$/;"	m	struct:tegra_mmc_priv	typeref:struct:tegra_mmc *	file:
reg	drivers/mtd/nand/tegra_nand.c	/^	struct nand_ctlr *reg;$/;"	m	struct:fdt_nand	typeref:struct:nand_ctlr *	file:
reg	drivers/mtd/nand/tegra_nand.c	/^	struct nand_ctlr *reg;$/;"	m	struct:nand_drv	typeref:struct:nand_ctlr *	file:
reg	drivers/mtd/onenand/samsung.c	/^	struct samsung_onenand *reg;$/;"	m	struct:s3c_onenand	typeref:struct:samsung_onenand *	file:
reg	drivers/net/bfin_mac.c	/^	ADI_DMA_CONFIG_REG reg;$/;"	m	union:__anon82b289e9010a	typeref:typename:ADI_DMA_CONFIG_REG	file:
reg	drivers/net/phy/micrel.c	/^	const u16			reg;$/;"	m	struct:ksz90x1_ofcfg	typeref:typename:const u16	file:
reg	drivers/pinctrl/meson/pinctrl-meson.h	/^	unsigned int reg;$/;"	m	struct:meson_pmx_group	typeref:typename:unsigned int
reg	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	u16 reg;$/;"	m	struct:rockchip_pin_bank	typeref:typename:u16	file:
reg	drivers/power/pmic/i2c_pmic_emul.c	/^	u8 reg[SANDBOX_PMIC_REG_COUNT];$/;"	m	struct:sandbox_i2c_pmic_plat_data	typeref:typename:u8[]	file:
reg	drivers/reset/reset-uniphier.c	/^	unsigned int reg;$/;"	m	struct:uniphier_reset_data	typeref:typename:unsigned int	file:
reg	drivers/rtc/i2c_rtc_emul.c	/^	u8 reg[REG_COUNT];$/;"	m	struct:sandbox_i2c_rtc_plat_data	typeref:typename:u8[]	file:
reg	drivers/serial/serial_arc.c	/^	struct arc_serial_regs *reg;$/;"	m	struct:arc_serial_platdata	typeref:struct:arc_serial_regs *	file:
reg	drivers/serial/serial_lpuart.c	/^	struct lpuart_fsl *reg;$/;"	m	struct:lpuart_serial_platdata	typeref:struct:lpuart_fsl *	file:
reg	drivers/serial/serial_meson.c	/^	struct meson_uart *reg;$/;"	m	struct:meson_serial_platdata	typeref:struct:meson_uart *	file:
reg	drivers/serial/serial_s5p.c	/^	struct s5p_uart *reg;  \/* address of registers in physical memory *\/$/;"	m	struct:s5p_serial_platdata	typeref:struct:s5p_uart *	file:
reg	drivers/usb/gadget/dwc2_udc_otg.c	/^struct dwc2_usbotg_reg *reg;$/;"	v	typeref:struct:dwc2_usbotg_reg *
reg	drivers/usb/host/ehci-tegra.c	/^	struct usb_ctlr *reg;	\/* address of registers in physical memory *\/$/;"	m	struct:fdt_usb	typeref:struct:usb_ctlr *	file:
reg	drivers/usb/host/r8a66597.h	/^	unsigned long reg;$/;"	m	struct:r8a66597	typeref:typename:unsigned long
reg	drivers/video/ati_radeon_fb.c	/^	u16 reg;$/;"	m	struct:__anon9e83ee070108	typeref:typename:u16	file:
reg	drivers/video/ct69000.c	/^	const unsigned char reg;$/;"	m	struct:__anon22c2f1e00108	typeref:typename:const unsigned char	file:
reg	drivers/video/exynos/exynos_fb.c	/^	struct exynos_fb *reg;$/;"	m	struct:exynos_fb_priv	typeref:struct:exynos_fb *	file:
reg	drivers/video/ivybridge_igd.c	/^	u16 reg;$/;"	m	struct:gt_powermeter	typeref:typename:u16	file:
reg	drivers/video/pwm_backlight.c	/^	struct udevice *reg;$/;"	m	struct:pwm_backlight_priv	typeref:struct:udevice *	file:
reg	drivers/video/simple_panel.c	/^	struct udevice *reg;$/;"	m	struct:simple_panel_priv	typeref:struct:udevice *	file:
reg	include/dm/platform_data/serial_mxc.h	/^	struct mxc_uart *reg;  \/* address of registers in physical memory *\/$/;"	m	struct:mxc_serial_platdata	typeref:struct:mxc_uart *
reg	include/ec_commands.h	/^				uint8_t reg;$/;"	m	struct:ec_response_lightbar::__anon71a6b267030a::dump::__anon71a6b2670408	typeref:typename:uint8_t
reg	include/ec_commands.h	/^			uint8_t ctrl, reg, value;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::reg	typeref:typename:uint8_t
reg	include/ec_commands.h	/^		struct reg {$/;"	s	union:ec_params_lightbar::__anon71a6b267010a
reg	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
reg	include/ec_commands.h	/^		} reg;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::reg
reg	include/ec_commands.h	/^	uint8_t reg;$/;"	m	struct:ec_params_sb_rd	typeref:typename:uint8_t
reg	include/ec_commands.h	/^	uint8_t reg;$/;"	m	struct:ec_params_sb_wr_block	typeref:typename:uint8_t
reg	include/ec_commands.h	/^	uint8_t reg;$/;"	m	struct:ec_params_sb_wr_word	typeref:typename:uint8_t
reg	include/exynos_lcd.h	/^	struct exynos_fb *reg;$/;"	m	struct:vidinfo	typeref:struct:exynos_fb *
reg	include/faraday/ftsdc010.h	/^	struct ftsdc010_mmc *reg;$/;"	m	struct:mmc_host	typeref:struct:ftsdc010_mmc *
reg	include/fsl-mc/fsl_dpmac.h	/^	uint8_t		reg;$/;"	m	struct:dpmac_mdio_cfg	typeref:typename:uint8_t
reg	include/mv88e6352.h	/^	u8 reg;$/;"	m	struct:mv88e_sw_reg	typeref:typename:u8
reg	include/sh_pfc.h	/^	unsigned long reg, reg_width, field_width;$/;"	m	struct:pinmux_cfg_reg	typeref:typename:unsigned long
reg	include/sh_pfc.h	/^	unsigned long reg, reg_width, reg_shadow;$/;"	m	struct:pinmux_data_reg	typeref:typename:unsigned long
reg	include/syscon.h	/^	u32 reg[2];$/;"	m	struct:syscon_base_platdata	typeref:typename:u32[2]
reg0	arch/arm/mach-keystone/include/mach/clock.h	/^	u32 reg0;$/;"	m	struct:keystone_pll_regs	typeref:typename:u32
reg1	arch/arm/mach-keystone/include/mach/clock.h	/^	u32 reg1;$/;"	m	struct:keystone_pll_regs	typeref:typename:u32
reg16	arch/mips/include/asm/processor.h	/^	unsigned long reg16;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg17	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg18	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg19	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg20	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg21	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg22	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg23	arch/mips/include/asm/processor.h	/^	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg29	arch/mips/include/asm/processor.h	/^	unsigned long reg29, reg30, reg31;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg30	arch/mips/include/asm/processor.h	/^	unsigned long reg29, reg30, reg31;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg31	arch/mips/include/asm/processor.h	/^	unsigned long reg29, reg30, reg31;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
reg32_clear_bits	drivers/net/bcm-sf2-eth-gmac.c	/^static inline void reg32_clear_bits(uint32_t reg, uint32_t value)$/;"	f	typeref:typename:void	file:
reg32_set_bits	drivers/net/bcm-sf2-eth-gmac.c	/^static inline void reg32_set_bits(uint32_t reg, uint32_t value)$/;"	f	typeref:typename:void	file:
reg_0_5_desc_tbl	cmd/mii.c	/^static const MII_reg_desc_t reg_0_5_desc_tbl[] = {$/;"	v	typeref:typename:const MII_reg_desc_t[]	file:
reg_0_desc_tbl	cmd/mii.c	/^static const MII_field_desc_t reg_0_desc_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_t[]	file:
reg_12v_sata0	arch/arm/dts/armada-388-gp.dts	/^	reg_12v_sata0: v12-sata0 {$/;"	l
reg_12v_sata1	arch/arm/dts/armada-388-gp.dts	/^	reg_12v_sata1: v12-sata1 {$/;"	l
reg_12v_sata2	arch/arm/dts/armada-388-gp.dts	/^	reg_12v_sata2: v12-sata2 {$/;"	l
reg_12v_sata3	arch/arm/dts/armada-388-gp.dts	/^	reg_12v_sata3: v12-sata3 {$/;"	l
reg_1588_clk_sel	board/freescale/ls1046ardb/cpld.h	/^	u8 reg_1588_clk_sel;	\/* 0xC - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
reg_178	include/fsl_immap.h	/^	u8	reg_178[4];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[4]
reg_188	include/fsl_immap.h	/^	u8	reg_188[8];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[8]
reg_1_desc_tbl	cmd/mii.c	/^static const MII_field_desc_t reg_1_desc_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_t[]	file:
reg_1p0a	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0a;			\/* offset 0x0200 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0a_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0a_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0a_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0a_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0a_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0a_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0d	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0d;			\/* offsest 0x0210 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0d_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0d_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0d_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0d_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p0d_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_1p0d_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_1p1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_1p1;		\/* 0x110 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_1p1	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reg_1p1;$/;"	m	struct:anadig_reg	typeref:typename:u32
reg_1p1_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_1p1_clr;		\/* 0x118 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_1p1_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_1p1_set;		\/* 0x114 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_1p1_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_1p1_tog;		\/* 0x11c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_2_desc_tbl	cmd/mii.c	/^static const MII_field_desc_t reg_2_desc_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_t[]	file:
reg_2p5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_2p5;		\/* 0x130 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_2p5	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reg_2p5;$/;"	m	struct:anadig_reg	typeref:typename:u32
reg_2p5_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_2p5_clr;		\/* 0x138 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_2p5_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_2p5_set;		\/* 0x134 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_2p5_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_2p5_tog;		\/* 0x13c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_3_desc_tbl	cmd/mii.c	/^static const MII_field_desc_t reg_3_desc_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_t[]	file:
reg_3p0	arch/arm/dts/imx6ull.dtsi	/^				reg_3p0: regulator-3p0@120 {$/;"	l	label:anatop
reg_3p0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_3p0;		\/* 0x120 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_3p0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_3p0;			\/* offset 0x0240 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_3p0	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reg_3p0;$/;"	m	struct:anadig_reg	typeref:typename:u32
reg_3p0_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_3p0_clr;		\/* 0x128 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_3p0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_3p0_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_3p0_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_3p0_set;		\/* 0x124 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_3p0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_3p0_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_3p0_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_3p0_tog;		\/* 0x12c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_3p0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_3p0_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_3p3v	arch/arm/dts/armada-388-clearfog.dts	/^	reg_3p3v: regulator-3p3v {$/;"	l
reg_3p3v	arch/arm/dts/imx6qdl-icore.dtsi	/^	reg_3p3v: regulator-3p3v {$/;"	l
reg_3v3	arch/arm/dts/tegra20-colibri.dts	/^		reg_3v3: regulator@0 {$/;"	l
reg_4_desc_tbl	cmd/mii.c	/^static const MII_field_desc_t reg_4_desc_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_t[]	file:
reg_5_desc_tbl	cmd/mii.c	/^static const MII_field_desc_t reg_5_desc_tbl[] = {$/;"	v	typeref:typename:const MII_field_desc_t[]	file:
reg_5v_sata0	arch/arm/dts/armada-388-gp.dts	/^	reg_5v_sata0: v5-sata0 {$/;"	l
reg_5v_sata1	arch/arm/dts/armada-388-gp.dts	/^	reg_5v_sata1: v5-sata1 {$/;"	l
reg_5v_sata2	arch/arm/dts/armada-388-gp.dts	/^	reg_5v_sata2: v5-sata2 {$/;"	l
reg_5v_sata3	arch/arm/dts/armada-388-gp.dts	/^	reg_5v_sata3: v5-sata3 {$/;"	l
reg_INTERFACE_STATUS	drivers/net/tsi108_eth.c	/^#define reg_INTERFACE_STATUS(/;"	d	file:
reg_MAC_CONFIG_1	drivers/net/tsi108_eth.c	/^#define reg_MAC_CONFIG_1(/;"	d	file:
reg_MAC_CONFIG_2	drivers/net/tsi108_eth.c	/^#define reg_MAC_CONFIG_2(/;"	d	file:
reg_MAXIMUM_FRAME_LENGTH	drivers/net/tsi108_eth.c	/^#define reg_MAXIMUM_FRAME_LENGTH(/;"	d	file:
reg_MII_MGMT_ADDRESS	drivers/net/tsi108_eth.c	/^#define reg_MII_MGMT_ADDRESS(/;"	d	file:
reg_MII_MGMT_COMMAND	drivers/net/tsi108_eth.c	/^#define reg_MII_MGMT_COMMAND(/;"	d	file:
reg_MII_MGMT_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_MII_MGMT_CONFIG(/;"	d	file:
reg_MII_MGMT_CONTROL	drivers/net/tsi108_eth.c	/^#define reg_MII_MGMT_CONTROL(/;"	d	file:
reg_MII_MGMT_INDICATORS	drivers/net/tsi108_eth.c	/^#define reg_MII_MGMT_INDICATORS(/;"	d	file:
reg_MII_MGMT_STATUS	drivers/net/tsi108_eth.c	/^#define reg_MII_MGMT_STATUS(/;"	d	file:
reg_PORT_CONTROL	drivers/net/tsi108_eth.c	/^#define reg_PORT_CONTROL(/;"	d	file:
reg_RX_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_RX_CONFIG(/;"	d	file:
reg_RX_CONTROL	drivers/net/tsi108_eth.c	/^#define reg_RX_CONTROL(/;"	d	file:
reg_RX_DIAGNOSTIC_ADDR	drivers/net/tsi108_eth.c	/^#define reg_RX_DIAGNOSTIC_ADDR(/;"	d	file:
reg_RX_DIAGNOSTIC_DATA	drivers/net/tsi108_eth.c	/^#define reg_RX_DIAGNOSTIC_DATA(/;"	d	file:
reg_RX_EXTENDED_STATUS	drivers/net/tsi108_eth.c	/^#define reg_RX_EXTENDED_STATUS(/;"	d	file:
reg_RX_QUEUE_0_BUF_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_RX_QUEUE_0_BUF_CONFIG(/;"	d	file:
reg_RX_QUEUE_0_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_RX_QUEUE_0_CONFIG(/;"	d	file:
reg_RX_QUEUE_0_PTR_HIGH	drivers/net/tsi108_eth.c	/^#define reg_RX_QUEUE_0_PTR_HIGH(/;"	d	file:
reg_RX_QUEUE_0_PTR_LOW	drivers/net/tsi108_eth.c	/^#define reg_RX_QUEUE_0_PTR_LOW(/;"	d	file:
reg_RX_THRESHOLDS	drivers/net/tsi108_eth.c	/^#define reg_RX_THRESHOLDS(/;"	d	file:
reg_STATION_ADDRESS_1	drivers/net/tsi108_eth.c	/^#define reg_STATION_ADDRESS_1(/;"	d	file:
reg_STATION_ADDRESS_2	drivers/net/tsi108_eth.c	/^#define reg_STATION_ADDRESS_2(/;"	d	file:
reg_TX_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_TX_CONFIG(/;"	d	file:
reg_TX_CONTROL	drivers/net/tsi108_eth.c	/^#define reg_TX_CONTROL(/;"	d	file:
reg_TX_DIAGNOSTIC_ADDR	drivers/net/tsi108_eth.c	/^#define reg_TX_DIAGNOSTIC_ADDR(/;"	d	file:
reg_TX_DIAGNOSTIC_DATA	drivers/net/tsi108_eth.c	/^#define reg_TX_DIAGNOSTIC_DATA(/;"	d	file:
reg_TX_ERROR_STATUS	drivers/net/tsi108_eth.c	/^#define reg_TX_ERROR_STATUS(/;"	d	file:
reg_TX_EXTENDED_STATUS	drivers/net/tsi108_eth.c	/^#define reg_TX_EXTENDED_STATUS(/;"	d	file:
reg_TX_QUEUE_0_BUF_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_TX_QUEUE_0_BUF_CONFIG(/;"	d	file:
reg_TX_QUEUE_0_CONFIG	drivers/net/tsi108_eth.c	/^#define reg_TX_QUEUE_0_CONFIG(/;"	d	file:
reg_TX_QUEUE_0_PTR_HIGH	drivers/net/tsi108_eth.c	/^#define reg_TX_QUEUE_0_PTR_HIGH(/;"	d	file:
reg_TX_QUEUE_0_PTR_LOW	drivers/net/tsi108_eth.c	/^#define reg_TX_QUEUE_0_PTR_LOW(/;"	d	file:
reg_TX_STATUS	drivers/net/tsi108_eth.c	/^#define reg_TX_STATUS(/;"	d	file:
reg_TX_THRESHOLDS	drivers/net/tsi108_eth.c	/^#define reg_TX_THRESHOLDS(/;"	d	file:
reg_access_always_ok	drivers/net/dwc_eth_qos.c	/^	bool reg_access_always_ok;$/;"	m	struct:eqos_config	typeref:typename:bool	file:
reg_access_ok	drivers/net/dwc_eth_qos.c	/^	bool reg_access_ok;$/;"	m	struct:eqos_priv	typeref:typename:bool	file:
reg_act_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reg_act_ctrl;		\/* _CMD_REG_ACT_CONTROL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
reg_addr	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned long reg_addr;	\/* Address of register for this part *\/$/;"	m	struct:gpio_info	typeref:typename:unsigned long
reg_addr	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned int reg_addr;	\/* Address of register for this part *\/$/;"	m	struct:gpio_info	typeref:typename:unsigned int
reg_addr	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	u32 reg_addr;$/;"	m	struct:dlb_config	typeref:typename:u32
reg_addr	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	u32 reg_addr;$/;"	m	struct:reg_data	typeref:typename:u32
reg_addr	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 reg_addr;$/;"	m	struct:dram_mv_init	typeref:typename:u32
reg_addr	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 reg_addr;$/;"	m	struct:dram_training_init	typeref:typename:u32
reg_addr	include/cortina.h	/^	unsigned short reg_addr;$/;"	m	struct:cortina_reg_config	typeref:typename:unsigned short
reg_ahci_5v	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_ahci_5v: ahci-5v {$/;"	l
reg_aldo1	arch/arm/dts/axp22x.dtsi	/^		reg_aldo1: aldo1 {$/;"	l
reg_aldo1	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_aldo1: aldo1 {$/;"	l	label:axp809
reg_aldo1	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_aldo1: aldo1 {$/;"	l	label:axp809
reg_aldo2	arch/arm/dts/axp22x.dtsi	/^		reg_aldo2: aldo2 {$/;"	l
reg_aldo2	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_aldo2: aldo2 {$/;"	l	label:axp809
reg_aldo2	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_aldo2: aldo2 {$/;"	l	label:axp809
reg_aldo3	arch/arm/dts/axp22x.dtsi	/^		reg_aldo3: aldo3 {$/;"	l
reg_arm	arch/arm/dts/imx6qdl.dtsi	/^				reg_arm: regulator-vddcore {$/;"	l
reg_arm	arch/arm/dts/imx6ull.dtsi	/^				reg_arm: regulator-vddcore@140 {$/;"	l	label:anatop
reg_axp_ipsout	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	reg_axp_ipsout: axp_ipsout {$/;"	l
reg_base	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	struct davinci_mmc_regs *reg_base;	\/* Register base address *\/$/;"	m	struct:davinci_mmc	typeref:struct:davinci_mmc_regs *
reg_base	drivers/block/fsl_sata.h	/^	fsl_sata_reg_t	*reg_base;		\/* the base address of controller register *\/$/;"	m	struct:fsl_sata	typeref:typename:fsl_sata_reg_t *
reg_base	drivers/block/sata_dwc.c	/^	u8			*reg_base;$/;"	m	struct:sata_dwc_device	typeref:typename:u8 *	file:
reg_base	drivers/clk/at91/pmc.h	/^	struct at91_pmc *reg_base;$/;"	m	struct:pmc_platdata	typeref:struct:at91_pmc *
reg_base	drivers/gpio/atmel_pio4.c	/^	struct atmel_pio4_port *reg_base;$/;"	m	struct:atmel_pio4_platdata	typeref:struct:atmel_pio4_port *	file:
reg_base	drivers/pci/pci_ftpci100.c	/^	unsigned int reg_base;$/;"	m	struct:ftpci100_data	typeref:typename:unsigned int	file:
reg_base	drivers/pinctrl/pinctrl-at91-pio4.c	/^	struct atmel_pio4_port *reg_base;$/;"	m	struct:atmel_pio4_platdata	typeref:struct:atmel_pio4_port *	file:
reg_base	drivers/spi/fsl_qspi.c	/^	fdt_addr_t reg_base;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:fdt_addr_t	file:
reg_bit_clr	drivers/ddr/marvell/a38x/ddr3_init.h	/^static inline void reg_bit_clr(u32 addr, u32 mask)$/;"	f	typeref:typename:void
reg_bit_clr	drivers/ddr/marvell/axp/ddr3_init.h	/^static inline void reg_bit_clr(u32 addr, u32 mask)$/;"	f	typeref:typename:void
reg_bit_set	drivers/ddr/marvell/a38x/ddr3_init.h	/^static inline void reg_bit_set(u32 addr, u32 mask)$/;"	f	typeref:typename:void
reg_bit_set	drivers/ddr/marvell/axp/ddr3_init.h	/^static inline void reg_bit_set(u32 addr, u32 mask)$/;"	f	typeref:typename:void
reg_bits	arch/arm/include/asm/omap_common.h	/^	u8 reg_bits;$/;"	m	struct:volts_efuse_data	typeref:typename:u8
reg_brr	include/fsl-mc/fsl_mc.h	/^	u32 reg_brr[2];$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32[2]
reg_can_3v3	arch/arm/dts/imx6ull-14x14-evk.dts	/^		reg_can_3v3: regulator@0 {$/;"	l
reg_cell	common/fdt_support.c	/^struct reg_cell {$/;"	s	file:
reg_cfg_done	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 reg_cfg_done;$/;"	m	struct:rk3288_vop	typeref:typename:u32
reg_core	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_core;		\/* 0x140 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_core_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_core_clr;		\/* 0x148 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_core_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_core_set;		\/* 0x144 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_core_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reg_core_tog;		\/* 0x14c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
reg_count	include/power/pmic.h	/^	int (*reg_count)(struct udevice *dev);$/;"	m	struct:dm_pmic_ops	typeref:typename:int (*)(struct udevice * dev)
reg_ctl	include/power/act8846_pmic.h	/^	char	reg_ctl;$/;"	m	struct:act8846_reg_table	typeref:typename:char
reg_ctl	include/power/rk808_pmic.h	/^	u8 reg_ctl;$/;"	m	struct:rk808_reg_table	typeref:typename:u8
reg_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 reg_ctrl;			\/* 0x870 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
reg_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 reg_ctrl;			\/* 0x870 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u32
reg_data	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	u32 reg_data;$/;"	m	struct:dlb_config	typeref:typename:u32
reg_data	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	u32 reg_data;$/;"	m	struct:reg_data	typeref:typename:u32
reg_data	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^struct reg_data {$/;"	s
reg_dc1sw	arch/arm/dts/axp22x.dtsi	/^		reg_dc1sw: dc1sw {$/;"	l
reg_dc5ldo	arch/arm/dts/axp22x.dtsi	/^		reg_dc5ldo: dc5ldo {$/;"	l
reg_dc5ldo	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dc5ldo: dc5ldo {$/;"	l	label:axp809
reg_dc5ldo	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dc5ldo: dc5ldo {$/;"	l	label:axp809
reg_dcdc1	arch/arm/dts/axp22x.dtsi	/^		reg_dcdc1: dcdc1 {$/;"	l
reg_dcdc1	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dcdc1: dcdc1 {$/;"	l	label:axp809
reg_dcdc1	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dcdc1: dcdc1 {$/;"	l	label:axp809
reg_dcdc2	arch/arm/dts/axp209.dtsi	/^		reg_dcdc2: dcdc2 {$/;"	l
reg_dcdc2	arch/arm/dts/axp22x.dtsi	/^		reg_dcdc2: dcdc2 {$/;"	l
reg_dcdc2	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dcdc2: dcdc2 {$/;"	l	label:axp809
reg_dcdc2	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dcdc2: dcdc2 {$/;"	l	label:axp809
reg_dcdc3	arch/arm/dts/axp209.dtsi	/^		reg_dcdc3: dcdc3 {$/;"	l
reg_dcdc3	arch/arm/dts/axp22x.dtsi	/^		reg_dcdc3: dcdc3 {$/;"	l
reg_dcdc3	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dcdc3: dcdc3 {$/;"	l	label:axp809
reg_dcdc3	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dcdc3: dcdc3 {$/;"	l	label:axp809
reg_dcdc4	arch/arm/dts/axp22x.dtsi	/^		reg_dcdc4: dcdc4 {$/;"	l
reg_dcdc4	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dcdc4: dcdc4 {$/;"	l	label:axp809
reg_dcdc4	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dcdc4: dcdc4 {$/;"	l	label:axp809
reg_dcdc5	arch/arm/dts/axp22x.dtsi	/^		reg_dcdc5: dcdc5 {$/;"	l
reg_dcdc5	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dcdc5: dcdc5 {$/;"	l	label:axp809
reg_dcdc5	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dcdc5: dcdc5 {$/;"	l	label:axp809
reg_dimm	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	int reg_dimm;$/;"	m	struct:dram_info	typeref:typename:int
reg_direction	drivers/gpio/pca953x_gpio.c	/^	u8 reg_direction[MAX_BANK];$/;"	m	struct:pca953x_info	typeref:typename:u8[]	file:
reg_dldo1	arch/arm/dts/axp22x.dtsi	/^		reg_dldo1: dldo1 {$/;"	l
reg_dldo1	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dldo1: dldo1 {$/;"	l	label:axp809
reg_dldo1	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dldo1: dldo1 {$/;"	l	label:axp809
reg_dldo2	arch/arm/dts/axp22x.dtsi	/^		reg_dldo2: dldo2 {$/;"	l
reg_dldo2	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_dldo2: dldo2 {$/;"	l	label:axp809
reg_dldo2	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_dldo2: dldo2 {$/;"	l	label:axp809
reg_dldo3	arch/arm/dts/axp22x.dtsi	/^		reg_dldo3: dldo3 {$/;"	l
reg_dldo4	arch/arm/dts/axp22x.dtsi	/^		reg_dldo4: dldo4 {$/;"	l
reg_drivevbus	arch/arm/dts/axp22x.dtsi	/^		reg_drivevbus: drivevbus {$/;"	l
reg_drv	include/ddr_spd.h	/^			uint8_t reg_drv;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
reg_drv_ck	include/ddr_spd.h	/^			uint8_t reg_drv_ck;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
reg_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void reg_dump(void)$/;"	f	typeref:typename:void	file:
reg_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void reg_dump(const struct phy_param *phy_param)$/;"	f	typeref:typename:void	file:
reg_eldo1	arch/arm/dts/axp22x.dtsi	/^		reg_eldo1: eldo1 {$/;"	l
reg_eldo1	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_eldo1: eldo1 {$/;"	l	label:axp809
reg_eldo1	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_eldo1: eldo1 {$/;"	l	label:axp809
reg_eldo2	arch/arm/dts/axp22x.dtsi	/^		reg_eldo2: eldo2 {$/;"	l
reg_eldo2	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_eldo2: eldo2 {$/;"	l	label:axp809
reg_eldo2	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_eldo2: eldo2 {$/;"	l	label:axp809
reg_eldo3	arch/arm/dts/axp22x.dtsi	/^		reg_eldo3: eldo3 {$/;"	l
reg_eldo3	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_eldo3: eldo3 {$/;"	l	label:axp809
reg_eldo3	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_eldo3: eldo3 {$/;"	l	label:axp809
reg_emac_3v3	arch/arm/dts/sun4i-a10-a1000.dts	/^	reg_emac_3v3: emac-3v3 {$/;"	l
reg_emac_3v3	arch/arm/dts/sun4i-a10-hackberry.dts	/^	reg_emac_3v3: emac-3v3 {$/;"	l
reg_emac_3v3	arch/arm/dts/sun4i-a10-jesurun-q5.dts	/^	reg_emac_3v3: emac-3v3 {$/;"	l
reg_emac_3v3	arch/arm/dts/sun5i-a10s-wobo-i5.dts	/^	reg_emac_3v3: emac-3v3 {$/;"	l
reg_enaddr	include/power/s5m8767.h	/^	u8	reg_enaddr;$/;"	m	struct:s5m8767_para	typeref:typename:u8
reg_enbiton	include/power/s5m8767.h	/^	u8	reg_enbiton;$/;"	m	struct:s5m8767_para	typeref:typename:u8
reg_error	include/fsl-mc/fsl_mc.h	/^	u32 reg_error[];$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32[]
reg_file_init_seq_signature	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	reg_file_init_seq_signature;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u32
reg_file_set_group	drivers/ddr/altera/sequencer.c	/^static void reg_file_set_group(u16 set_group)$/;"	f	typeref:typename:void	file:
reg_file_set_stage	drivers/ddr/altera/sequencer.c	/^static void reg_file_set_stage(u8 set_stage)$/;"	f	typeref:typename:void	file:
reg_file_set_sub_stage	drivers/ddr/altera/sequencer.c	/^static void reg_file_set_sub_stage(u8 set_sub_stage)$/;"	f	typeref:typename:void	file:
reg_gcr1	include/fsl-mc/fsl_mc.h	/^	u32 reg_gcr1;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_get_enable	drivers/power/regulator/act8846.c	/^static bool reg_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
reg_get_enable	drivers/power/regulator/s5m8767.c	/^static int reg_get_enable(struct udevice *dev, const struct s5m8767_para *param)$/;"	f	typeref:typename:int	file:
reg_get_value	drivers/power/regulator/act8846.c	/^static int reg_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
reg_get_value	drivers/power/regulator/s5m8767.c	/^static int reg_get_value(struct udevice *dev, const struct s5m8767_para *param)$/;"	f	typeref:typename:int	file:
reg_gmac_3v3	arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun7i-a20-bananapi.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun7i-a20-bananapro.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun7i-a20-orangepi.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun8i-h3-orangepi-plus.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_3v3	arch/arm/dts/sun8i-h3-orangepi-plus2e.dts	/^	reg_gmac_3v3: gmac-3v3 {$/;"	l
reg_gmac_vdd	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	reg_gmac_vdd: gmac_vdd {$/;"	l
reg_gpio_dvfs	arch/arm/dts/imx6ull-14x14-evk.dts	/^		reg_gpio_dvfs: regulator-gpio {$/;"	l
reg_gsr	include/fsl-mc/fsl_mc.h	/^	u32 reg_gsr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_hi_speed	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32 reg_hi_speed;$/;"	m	struct:serdes_change_m_phy	typeref:typename:u32
reg_hsic_1p2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_hsic_1p2;			\/* offset 0x0220 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_hsic_1p2_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_hsic_1p2_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_hsic_1p2_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_hsic_1p2_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_hsic_1p2_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_hsic_1p2_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_id_hi	include/ddr_spd.h	/^			uint8_t reg_id_hi;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
reg_id_hi	include/ddr_spd.h	/^			uint8_t reg_id_hi;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
reg_id_hi	include/ddr_spd.h	/^			unsigned char reg_id_hi;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
reg_id_lo	include/ddr_spd.h	/^			uint8_t reg_id_lo;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
reg_id_lo	include/ddr_spd.h	/^			uint8_t reg_id_lo;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
reg_id_lo	include/ddr_spd.h	/^			unsigned char reg_id_lo;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
reg_info	arch/x86/cpu/intel_common/lpc.c	/^	struct reg_info {$/;"	s	function:lpc_common_early_init	file:
reg_inx	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^	int	reg_inx;$/;"	m	struct:pin_cfg	typeref:typename:int
reg_lccr0	include/pxa_lcd.h	/^	u_long	reg_lccr0;$/;"	m	struct:pxafb_info	typeref:typename:u_long
reg_lccr1	include/pxa_lcd.h	/^	u_long	reg_lccr1;$/;"	m	struct:pxafb_info	typeref:typename:u_long
reg_lccr2	include/pxa_lcd.h	/^	u_long	reg_lccr2;$/;"	m	struct:pxafb_info	typeref:typename:u_long
reg_lccr3	include/pxa_lcd.h	/^	u_long	reg_lccr3;$/;"	m	struct:pxafb_info	typeref:typename:u_long
reg_lcd_3v3	arch/arm/dts/am335x-pxm2.dtsi	/^	reg_lcd_3v3: fixedregulator1 {$/;"	l
reg_ldo1	arch/arm/dts/axp209.dtsi	/^		reg_ldo1: ldo1 {$/;"	l
reg_ldo2	arch/arm/dts/axp209.dtsi	/^		reg_ldo2: ldo2 {$/;"	l
reg_ldo3	arch/arm/dts/axp209.dtsi	/^		reg_ldo3: ldo3 {$/;"	l
reg_ldo4	arch/arm/dts/axp209.dtsi	/^		reg_ldo4: ldo4 {$/;"	l
reg_ldo5	arch/arm/dts/axp209.dtsi	/^		reg_ldo5: ldo5 {$/;"	l
reg_ldo_io0	arch/arm/dts/axp22x.dtsi	/^		reg_ldo_io0: ldo_io0 {$/;"	l
reg_ldo_io0	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_ldo_io0: ldo_io0 {$/;"	l	label:axp809
reg_ldo_io0	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_ldo_io0: ldo_io0 {$/;"	l	label:axp809
reg_ldo_io1	arch/arm/dts/axp22x.dtsi	/^		reg_ldo_io1: ldo_io1 {$/;"	l
reg_ldo_io1	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_ldo_io1: ldo_io1 {$/;"	l	label:axp809
reg_ldo_io1	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_ldo_io1: ldo_io1 {$/;"	l	label:axp809
reg_low_speed	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32 reg_low_speed;$/;"	m	struct:serdes_change_m_phy	typeref:typename:u32
reg_lpsr_1p0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_lpsr_1p0;			\/* offset 0x0230 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_lpsr_1p0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_lpsr_1p0_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_lpsr_1p0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_lpsr_1p0_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_lpsr_1p0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_lpsr_1p0_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_m_r3	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 reg_m_r3[MAX_INTERFACE_NUM];$/;"	m	struct:mode_info	typeref:typename:u32[]
reg_map	include/ddr_spd.h	/^			uint8_t reg_map;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
reg_map	include/ddr_spd.h	/^			uint8_t reg_map;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
reg_mask	arch/sparc/cpu/leon3/memcfg.h	/^	unsigned int reg_mask;		\/* Which registers to write *\/$/;"	m	struct:ahbmctrl_setup	typeref:typename:unsigned int
reg_mask	arch/sparc/cpu/leon3/memcfg.h	/^	unsigned int reg_mask;		\/* Which registers to write *\/$/;"	m	struct:mctrl_setup	typeref:typename:unsigned int
reg_mask	drivers/ddr/marvell/a38x/ddr3_training_ip_def.h	/^	u32 reg_mask;$/;"	m	struct:reg_data	typeref:typename:u32
reg_mcfapr	include/fsl-mc/fsl_mc.h	/^	u32 reg_mcfapr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_mcfbahr	include/fsl-mc/fsl_mc.h	/^	u32 reg_mcfbahr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_mcfbalr	include/fsl-mc/fsl_mc.h	/^	u32 reg_mcfbalr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_mmc3_vdd	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	reg_mmc3_vdd: mmc3_vdd {$/;"	l
reg_motor	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	reg_motor: reg_motor {$/;"	l
reg_mr0	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 reg_mr0[MAX_INTERFACE_NUM];$/;"	m	struct:mode_info	typeref:typename:u32[]
reg_mr1	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 reg_mr1[MAX_INTERFACE_NUM];$/;"	m	struct:mode_info	typeref:typename:u32[]
reg_mr2	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 reg_mr2[MAX_INTERFACE_NUM];$/;"	m	struct:mode_info	typeref:typename:u32[]
reg_mux	drivers/pinctrl/meson/pinctrl-meson.h	/^	void __iomem *reg_mux;$/;"	m	struct:meson_pinctrl	typeref:typename:void __iomem *
reg_ndcr	drivers/mtd/nand/pxa3xx_nand.c	/^	uint32_t		reg_ndcr;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:uint32_t	file:
reg_offset	arch/arm/include/asm/arch-am33xx/mux.h	/^	short reg_offset;$/;"	m	struct:module_pin_mux	typeref:typename:short
reg_offset	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	unsigned long reg_offset;$/;"	m	struct:liodn_id_table	typeref:typename:unsigned long
reg_offset	arch/powerpc/include/asm/fsl_liodn.h	/^	unsigned long reg_offset;$/;"	m	struct:fman_liodn_id_table	typeref:typename:unsigned long
reg_offset	arch/powerpc/include/asm/fsl_liodn.h	/^	unsigned long reg_offset;$/;"	m	struct:liodn_id_table	typeref:typename:unsigned long
reg_offset	arch/powerpc/include/asm/fsl_liodn.h	/^	unsigned long reg_offset[2];$/;"	m	struct:srio_liodn_id_table	typeref:typename:unsigned long[2]
reg_offset	include/ns16550.h	/^	int reg_offset;$/;"	m	struct:ns16550_platdata	typeref:typename:int
reg_output	drivers/gpio/pca953x_gpio.c	/^	u8 reg_output[MAX_BANK];$/;"	m	struct:pca953x_info	typeref:typename:u8[]	file:
reg_psr	include/fsl-mc/fsl_mc.h	/^	u32 reg_psr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_pu	arch/arm/dts/imx6qdl.dtsi	/^				reg_pu: regulator-vddpu {$/;"	l
reg_read	board/micronas/vct/vct.h	/^static inline u32 reg_read(u32 addr)$/;"	f	typeref:typename:u32
reg_read	drivers/ddr/marvell/a38x/ddr3_init.h	/^static inline u32 reg_read(u32 addr)$/;"	f	typeref:typename:u32
reg_read	drivers/ddr/marvell/axp/ddr3_init.h	/^static inline u32 reg_read(u32 addr)$/;"	f	typeref:typename:u32
reg_read	drivers/spi/mxc_spi.c	/^#define reg_read /;"	d	file:
reg_rev	include/ddr_spd.h	/^			uint8_t reg_rev;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
reg_rev	include/ddr_spd.h	/^			uint8_t reg_rev;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
reg_rev	include/ddr_spd.h	/^			unsigned char reg_rev;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
reg_rtc_ldo	arch/arm/dts/axp22x.dtsi	/^		reg_rtc_ldo: rtc_ldo {$/;"	l
reg_rtc_ldo	arch/arm/dts/sun9i-a80-cubieboard4.dts	/^			reg_rtc_ldo: rtc_ldo {$/;"	l	label:axp809
reg_rtc_ldo	arch/arm/dts/sun9i-a80-optimus.dts	/^			reg_rtc_ldo: rtc_ldo {$/;"	l	label:axp809
reg_sata0	arch/arm/dts/armada-388-gp.dts	/^	reg_sata0: pwr-sata0 {$/;"	l
reg_sata1	arch/arm/dts/armada-388-gp.dts	/^	reg_sata1: pwr-sata1 {$/;"	l
reg_sata2	arch/arm/dts/armada-388-gp.dts	/^	reg_sata2: pwr-sata2 {$/;"	l
reg_sata3	arch/arm/dts/armada-388-gp.dts	/^	reg_sata3: pwr-sata3 {$/;"	l
reg_sd1_vmmc	arch/arm/dts/imx6ull-14x14-evk.dts	/^		reg_sd1_vmmc: regulator@1 {$/;"	l
reg_set	drivers/phy/marvell/comphy_core.c	/^void reg_set(void __iomem *addr, u32 data, u32 mask)$/;"	f	typeref:typename:void
reg_set16	drivers/phy/marvell/comphy_core.c	/^void reg_set16(void __iomem *addr, u16 data, u16 mask)$/;"	f	typeref:typename:void
reg_set_enable	drivers/power/regulator/act8846.c	/^static int reg_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
reg_set_enable	drivers/power/regulator/s5m8767.c	/^static int reg_set_enable(struct udevice *dev, const struct s5m8767_para *param,$/;"	f	typeref:typename:int	file:
reg_set_silent	drivers/phy/marvell/comphy_core.c	/^void reg_set_silent(void __iomem *addr, u32 data, u32 mask)$/;"	f	typeref:typename:void
reg_set_silent16	drivers/phy/marvell/comphy_core.c	/^void reg_set_silent16(void __iomem *addr, u16 data, u16 mask)$/;"	f	typeref:typename:void
reg_set_value	drivers/power/regulator/act8846.c	/^static int reg_set_value(struct udevice *dev, int uvolt)$/;"	f	typeref:typename:int	file:
reg_set_value	drivers/power/regulator/s5m8767.c	/^static int reg_set_value(struct udevice *dev, const struct s5m8767_para *param,$/;"	f	typeref:typename:int	file:
reg_shadow	include/sh_pfc.h	/^	unsigned long reg, reg_width, reg_shadow;$/;"	m	struct:pinmux_data_reg	typeref:typename:unsigned long
reg_shift	include/ns16550.h	/^	int reg_shift;$/;"	m	struct:ns16550_platdata	typeref:typename:int
reg_sicapr	include/fsl-mc/fsl_mc.h	/^	u32 reg_sicapr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_sicbahr	include/fsl-mc/fsl_mc.h	/^	u32 reg_sicbahr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_sicbalr	include/fsl-mc/fsl_mc.h	/^	u32 reg_sicbalr;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reg_size	arch/sparc/include/asm/prom.h	/^	unsigned int reg_size;	\/* How many bytes does this register take up? *\/$/;"	m	struct:linux_prom_registers	typeref:typename:unsigned int
reg_snvs	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_snvs;			\/* offset 0x0250 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_snvs_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_snvs_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_snvs_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_snvs_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_snvs_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reg_snvs_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
reg_soc	arch/arm/dts/imx6qdl.dtsi	/^				reg_soc: regulator-vddsoc {$/;"	l
reg_soc	arch/arm/dts/imx6ull.dtsi	/^				reg_soc: regulator-vddsoc@140 {$/;"	l	label:anatop
reg_t0min	drivers/block/pata_bfin.c	/^static const u32 reg_t0min[]   = { 600, 383, 330, 180, 120 };$/;"	v	typeref:typename:const u32[]	file:
reg_t2min	drivers/block/pata_bfin.c	/^static const u32 reg_t2min[]   = { 290, 290, 290, 70,  25  };$/;"	v	typeref:typename:const u32[]	file:
reg_teocmin	drivers/block/pata_bfin.c	/^static const u32 reg_teocmin[] = { 290, 290, 290, 80,  70  };$/;"	v	typeref:typename:const u32[]	file:
reg_type	include/ddr_spd.h	/^			unsigned char reg_type;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
reg_ubcr	drivers/usb/gadget/pxa25x_udc.h	/^	u32					*reg_ubcr;$/;"	m	struct:pxa25x_ep	typeref:typename:u32 *
reg_udccs	drivers/usb/gadget/pxa25x_udc.h	/^	u32					*reg_udccs;$/;"	m	struct:pxa25x_ep	typeref:typename:u32 *
reg_uddr	drivers/usb/gadget/pxa25x_udc.h	/^	u32					*reg_uddr;$/;"	m	struct:pxa25x_ep	typeref:typename:u32 *
reg_usb0_vbus	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_usb0_vbus: usb0-vbus {$/;"	l
reg_usb1_vbus	arch/arm/dts/sun9i-a80-optimus.dts	/^	reg_usb1_vbus: usb1-vbus {$/;"	l
reg_usb1_vbus	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_usb1_vbus: usb1-vbus {$/;"	l
reg_usb2_0_vbus	arch/arm/dts/armada-388-gp.dts	/^	reg_usb2_0_vbus: v5-vbus0 {$/;"	l
reg_usb2_1_vbus	arch/arm/dts/armada-388-gp.dts	/^	reg_usb2_1_vbus: v5-vbus1 {$/;"	l
reg_usb2_vbus	arch/arm/dts/sun7i-a20-primo73.dts	/^	reg_usb2_vbus: usb2-vbus {$/;"	l
reg_usb2_vbus	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_usb2_vbus: usb2-vbus {$/;"	l
reg_usb3_vbus	arch/arm/dts/armada-388-gp.dts	/^	reg_usb3_vbus: usb3-vbus {$/;"	l
reg_usb3_vbus	arch/arm/dts/sun8i-h3-orangepi-plus.dts	/^	reg_usb3_vbus: usb3-vbus {$/;"	l
reg_usb3_vbus	arch/arm/dts/sun9i-a80-optimus.dts	/^	reg_usb3_vbus: usb3-vbus {$/;"	l
reg_val	drivers/video/ati_radeon_fb.c	/^} reg_val;$/;"	t	typeref:struct:__anon9e83ee070108	file:
reg_value	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 reg_value;$/;"	m	struct:dram_mv_init	typeref:typename:u32
reg_value	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 reg_value;$/;"	m	struct:dram_training_init	typeref:typename:u32
reg_value	include/cortina.h	/^	unsigned short reg_value;$/;"	m	struct:cortina_reg_config	typeref:typename:unsigned short
reg_vcc3v0	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_vcc3v0: vcc3v0 {$/;"	l
reg_vcc3v3	arch/arm/dts/sun50i-a64-pine64-common.dtsi	/^		reg_vcc3v3: vcc3v3 {$/;"	l
reg_vcc3v3	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_vcc3v3: vcc3v3 {$/;"	l
reg_vcc5v0	arch/arm/dts/sunxi-common-regulators.dtsi	/^	reg_vcc5v0: vcc5v0 {$/;"	l
reg_vmmc1	arch/arm/dts/sun5i-a10s-auxtek-t004.dts	/^	reg_vmmc1: vmmc1 {$/;"	l
reg_vmmc3	arch/arm/dts/sun7i-a20-bananapro.dts	/^	reg_vmmc3: vmmc3 {$/;"	l
reg_vmmc3	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	reg_vmmc3: vmmc3 {$/;"	l
reg_vmmc3_io	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	reg_vmmc3_io: vmmc3-io {$/;"	l
reg_vol	include/power/act8846_pmic.h	/^	char	reg_vol;$/;"	m	struct:act8846_reg_table	typeref:typename:char
reg_vol	include/power/rk808_pmic.h	/^	u8 reg_vol;$/;"	m	struct:rk808_reg_table	typeref:typename:u8
reg_width	include/sh_pfc.h	/^	unsigned long reg, reg_width, field_width;$/;"	m	struct:pinmux_cfg_reg	typeref:typename:unsigned long
reg_width	include/sh_pfc.h	/^	unsigned long reg, reg_width, reg_shadow;$/;"	m	struct:pinmux_data_reg	typeref:typename:unsigned long
reg_window	arch/sparc/include/asm/ptrace.h	/^struct reg_window {$/;"	s
reg_write	board/micronas/vct/vct.h	/^static inline void reg_write(u32 addr, u32 data)$/;"	f	typeref:typename:void
reg_write	drivers/ddr/marvell/a38x/ddr3_init.h	/^static inline void reg_write(u32 addr, u32 val)$/;"	f	typeref:typename:void
reg_write	drivers/ddr/marvell/axp/ddr3_init.h	/^static inline void reg_write(u32 addr, u32 val)$/;"	f	typeref:typename:void
reg_write	drivers/spi/mxc_spi.c	/^#define reg_write(/;"	d	file:
regbase	drivers/block/sata_mv.c	/^	u32 regbase;$/;"	m	struct:mv_priv	typeref:typename:u32	file:
regbase	drivers/mmc/uniphier-sd.c	/^	void __iomem *regbase;$/;"	m	struct:uniphier_sd_priv	typeref:typename:void __iomem *	file:
regbase	drivers/spi/cadence_qspi.h	/^	void		*regbase;$/;"	m	struct:cadence_spi_platdata	typeref:typename:void *
regbase	drivers/spi/cadence_qspi.h	/^	void		*regbase;$/;"	m	struct:cadence_spi_priv	typeref:typename:void *
regdata	tools/kwbimage.c	/^		struct ext_hdr_v0_reg regdata;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:struct:ext_hdr_v0_reg	file:
regdump_len	include/linux/ethtool.h	/^	__u32	regdump_len;	\/* Size of data from ETHTOOL_GREGS (bytes) *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:__u32
regen1	arch/arm/dts/am57xx-beagle-x15.dts	/^				regen1: regen1 {$/;"	l	label:tps659038
regen1	arch/arm/dts/am57xx-idk-common.dtsi	/^				regen1: regen1 {$/;"	l	label:tps659038
regen2	arch/arm/dts/am57xx-idk-common.dtsi	/^				regen2: regen2 {$/;"	l	label:tps659038
regex	common/env_attr.c	/^	char *regex;$/;"	m	struct:regex_callback_priv	typeref:typename:char *	file:
regex	tools/proftool.c	/^	regex_t regex;		\/* Regex to use if name starts with \/ *\/$/;"	m	struct:trace_configline_info	typeref:typename:regex_t	file:
regex_callback	common/env_attr.c	/^static int regex_callback(const char *name, const char *attributes, void *priv)$/;"	f	typeref:typename:int	file:
regex_callback_priv	common/env_attr.c	/^struct regex_callback_priv {$/;"	s	file:
regex_report_error	tools/proftool.c	/^static int regex_report_error(regex_t *regex, int err, const char *op,$/;"	f	typeref:typename:int	file:
regex_sub	cmd/setexpr.c	/^static int regex_sub(const char *name,$/;"	f	typeref:typename:int	file:
region	arch/powerpc/cpu/ppc4xx/tlb.c	/^typedef struct region {$/;"	s	file:
region	include/cros_ec.h	/^	struct fmap_entry region[EC_FLASH_REGION_COUNT];$/;"	m	struct:fdt_cros_ec	typeref:struct:fmap_entry[]
region	include/ec_commands.h	/^	uint32_t region;  \/* enum ec_flash_region *\/$/;"	m	struct:ec_params_flash_region_info	typeref:typename:uint32_t
region	include/libfdt.h	/^	struct fdt_region *region;	\/* Contains list of regions found *\/$/;"	m	struct:fdt_region_state	typeref:struct:fdt_region *
region	include/linux/ethtool.h	/^	__u32	region;$/;"	m	struct:ethtool_flash	typeref:typename:__u32
region	include/lmb.h	/^	struct lmb_property region[MAX_LMB_REGIONS+1];$/;"	m	struct:lmb_region	typeref:struct:lmb_property[]
region_count	cmd/armflash.c	/^	u32 region_count;$/;"	m	struct:afs_image	typeref:typename:u32	file:
region_count	include/fsl-mc/fsl_dprc.h	/^	uint8_t region_count;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint8_t
region_count	include/pci.h	/^	int region_count;$/;"	m	struct:pci_controller	typeref:typename:int
region_filename	tools/ifdtool.c	/^static const char *region_filename(int region_type)$/;"	f	typeref:typename:const char *	file:
region_info_user	include/mtd/mtd-abi.h	/^struct region_info_user {$/;"	s
region_list	tools/fdtgrep.c	/^	int region_list;	\/* Output a region list *\/$/;"	m	struct:display_info	typeref:typename:int	file:
region_list_contains_offset	lib/libfdt/fdt_region.c	/^static int region_list_contains_offset(struct fdt_region_state *info,$/;"	f	typeref:typename:int	file:
region_name	tools/ifdtool.c	/^static const char *region_name(int region_type)$/;"	f	typeref:typename:const char *	file:
region_num	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	region_num;$/;"	m	struct:qm_config	typeref:typename:u32
region_t	arch/powerpc/cpu/ppc4xx/tlb.c	/^} region_t;$/;"	t	typeref:struct:region	file:
region_t	tools/ifdtool.h	/^struct region_t {$/;"	s
regionindex	include/mtd/mtd-abi.h	/^	__u32 regionindex;$/;"	m	struct:region_info_user	typeref:typename:__u32
regions	cmd/armflash.c	/^	struct afs_region regions[MAX_REGIONS];$/;"	m	struct:afs_image	typeref:struct:afs_region[]	file:
regions	drivers/mtd/jedec_flash.c	/^	const ulong regions[6];$/;"	m	struct:amd_flash_info	typeref:typename:const ulong[6]	file:
regions	include/pci.h	/^	struct pci_region regions[MAX_PCI_REGIONS];$/;"	m	struct:pci_controller	typeref:struct:pci_region[]
register_dev	board/nokia/rx51/tag_omap.h	/^	unsigned	register_dev:1;$/;"	m	struct:omap_usb_config	typeref:typename:unsigned:1
register_host	board/nokia/rx51/tag_omap.h	/^	unsigned	register_host:1;$/;"	m	struct:omap_usb_config	typeref:typename:unsigned:1
register_init	tools/zynqimage.c	/^	struct zynq_reginit register_init[HEADER_REGINITS]; \/* 0xa0 *\/$/;"	m	struct:zynq_header	typeref:struct:zynq_reginit[]	file:
register_init	tools/zynqmpimage.c	/^	struct zynqmp_reginit register_init[HEADER_REGINITS]; \/* 0xb8 *\/$/;"	m	struct:zynqmp_header	typeref:struct:zynqmp_reginit[]	file:
register_lock_mask	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 register_lock_mask[3];$/;"	m	struct:mbp_icc_profile	typeref:typename:u32[3]
register_mtd_parser	drivers/mtd/mtdpart.c	/^void register_mtd_parser(struct mtd_part_parser *p)$/;"	f	typeref:typename:void
register_mtd_user	drivers/mtd/mtdcore.c	/^void register_mtd_user (struct mtd_notifier *new)$/;"	f	typeref:typename:void
register_offsets	drivers/net/natsemi.c	/^enum register_offsets {$/;"	g	file:
register_offsets	drivers/net/ns8382x.c	/^enum register_offsets {$/;"	g	file:
register_pinmux	drivers/gpio/sh_pfc.c	/^int register_pinmux(struct pinmux_info *pip)$/;"	f	typeref:typename:int
register_special_symbol	tools/buildman/kconfiglib.py	/^        def register_special_symbol(type_, name, val):$/;"	f	member:Config.__init__	file:
register_value	include/power/regulator.h	/^	int register_value;$/;"	m	struct:dm_regulator_mode	typeref:typename:int
registered	drivers/usb/gadget/storage_common.c	/^	unsigned int	registered:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
registered	include/ddr_spd.h	/^		} registered;$/;"	m	union:ddr3_spd_eeprom_s::__anoncde79dee010a	typeref:struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308
registered	include/ddr_spd.h	/^		} registered;$/;"	m	union:ddr4_spd_eeprom_s::__anoncde79dee040a	typeref:struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608
registered_devices	drivers/usb/gadget/core.c	/^int registered_devices;$/;"	v	typeref:typename:int
registered_dimm	include/fsl_ddr_dimm_params.h	/^	unsigned int registered_dimm;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
registered_dimm_en	include/fsl_ddr_sdram.h	/^	unsigned int registered_dimm_en;    \/* use registered DIMM support *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
registered_functions	drivers/usb/gadget/core.c	/^int registered_functions;$/;"	v	typeref:typename:int
regmap	drivers/clk/clk_boston.c	/^	struct regmap *regmap;$/;"	m	struct:clk_boston	typeref:struct:regmap *	file:
regmap	include/regmap.h	/^struct regmap {$/;"	s
regmap	include/syscon.h	/^	struct regmap *regmap;$/;"	m	struct:syscon_uc_info	typeref:struct:regmap *
regmap_alloc_count	drivers/core/regmap.c	/^static struct regmap *regmap_alloc_count(int count)$/;"	f	typeref:struct:regmap *	file:
regmap_get_range	drivers/core/regmap.c	/^void *regmap_get_range(struct regmap *map, unsigned int range_num)$/;"	f	typeref:typename:void *
regmap_init_mem	drivers/core/regmap.c	/^int regmap_init_mem(struct udevice *dev, struct regmap **mapp)$/;"	f	typeref:typename:int
regmap_init_mem_platdata	drivers/core/regmap.c	/^int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,$/;"	f	typeref:typename:int
regmap_range	include/regmap.h	/^struct regmap_range {$/;"	s
regmap_read	drivers/core/regmap.c	/^int regmap_read(struct regmap *map, uint offset, uint *valp)$/;"	f	typeref:typename:int
regmap_read32	include/regmap.h	/^#define regmap_read32(/;"	d
regmap_uninit	drivers/core/regmap.c	/^int regmap_uninit(struct regmap *map)$/;"	f	typeref:typename:int
regmap_write	drivers/core/regmap.c	/^int regmap_write(struct regmap *map, uint offset, uint val)$/;"	f	typeref:typename:int
regmap_write32	include/regmap.h	/^#define regmap_write32(/;"	d
regnames	arch/blackfin/lib/kgdb.h	/^enum regnames {$/;"	g
regno	cmd/mii.c	/^	ushort regno;$/;"	m	struct:_MII_reg_desc_t	typeref:typename:ushort	file:
regnum	include/power/s5m8767.h	/^	enum s5m8767_regnum regnum;$/;"	m	struct:s5m8767_para	typeref:enum:s5m8767_regnum
regs	arch/arm/include/asm/proc-armv/ptrace.h	/^	unsigned long regs[31];$/;"	m	struct:pt_regs	typeref:typename:unsigned long[31]
regs	arch/arm/include/asm/setjmp.h	/^	ulong regs[5];$/;"	m	struct:jmp_buf_data	typeref:typename:ulong[5]
regs	arch/arm/mach-exynos/include/mach/dp_info.h	/^	struct exynos_dp *regs;$/;"	m	struct:exynos_dp_priv	typeref:struct:exynos_dp *
regs	arch/arm/mach-tegra/xusb-padctl-common.h	/^	struct fdt_resource regs;$/;"	m	struct:tegra_xusb_padctl	typeref:struct:fdt_resource
regs	arch/mips/include/asm/ptrace.h	/^	unsigned long regs[32];$/;"	m	struct:pt_regs	typeref:typename:unsigned long[32]
regs	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct ohci_regs *regs;		\/* OHCI controller's memory *\/$/;"	m	struct:ohci	typeref:struct:ohci_regs *
regs	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct ohci_regs *regs; \/* OHCI controller's memory *\/$/;"	m	struct:ohci	typeref:struct:ohci_regs *
regs	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct ohci_regs *regs;	\/* OHCI controller's memory *\/$/;"	m	struct:ohci	typeref:struct:ohci_regs *
regs	arch/powerpc/include/asm/fsl_pci.h	/^	unsigned long regs;$/;"	m	struct:fsl_pci_info	typeref:typename:unsigned long
regs	arch/powerpc/include/asm/processor.h	/^	struct pt_regs	*regs;		\/* Pointer to saved register state *\/$/;"	m	struct:thread_struct	typeref:struct:pt_regs *
regs	arch/powerpc/include/asm/sigcontext.h	/^	struct pt_regs	*regs;$/;"	m	struct:sigcontext_struct	typeref:struct:pt_regs *
regs	arch/sh/include/asm/ptrace.h	/^	unsigned long regs[16];$/;"	m	struct:pt_regs	typeref:typename:unsigned long[16]
regs	arch/sparc/cpu/leon3/memcfg.h	/^	} regs[8];$/;"	m	struct:ahbmctrl_setup	typeref:struct:ahbmctrl_setup::__anon8a0508e60208[8]
regs	arch/sparc/cpu/leon3/memcfg.h	/^	} regs[8];$/;"	m	struct:mctrl_setup	typeref:struct:mctrl_setup::__anon8a0508e60108[8]
regs	arch/x86/include/asm/msr.h	/^	u32 *regs;$/;"	m	struct:msr_regs_info	typeref:typename:u32 *
regs	drivers/adc/exynos-adc.c	/^	struct exynos_adc_v2 *regs;$/;"	m	struct:exynos_adc_priv	typeref:struct:exynos_adc_v2 *	file:
regs	drivers/ddr/marvell/a38x/ddr3_init.c	/^	struct reg_data *regs;$/;"	m	struct:dram_modes	typeref:struct:reg_data *	file:
regs	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	MV_DRAM_MC_INIT *regs;$/;"	m	struct:dram_modes	typeref:typename:MV_DRAM_MC_INIT *
regs	drivers/gpio/altera_pio.c	/^	struct altera_pio_regs *regs;$/;"	m	struct:altera_pio_platdata	typeref:struct:altera_pio_regs *	file:
regs	drivers/gpio/at91_gpio.c	/^	struct at91_port *regs;$/;"	m	struct:at91_port_priv	typeref:struct:at91_port *	file:
regs	drivers/gpio/intel_broadwell_gpio.c	/^	struct pch_lp_gpio_regs *regs;$/;"	m	struct:broadwell_bank_priv	typeref:struct:pch_lp_gpio_regs *	file:
regs	drivers/gpio/lpc32xx_gpio.c	/^	struct gpio_regs *regs;$/;"	m	struct:lpc32xx_gpio_priv	typeref:struct:gpio_regs *	file:
regs	drivers/gpio/mvebu_gpio.c	/^	struct mvebu_gpio_regs *regs;$/;"	m	struct:mvebu_gpio_priv	typeref:struct:mvebu_gpio_regs *	file:
regs	drivers/gpio/mxc_gpio.c	/^	struct gpio_regs *regs;$/;"	m	struct:mxc_bank_info	typeref:struct:gpio_regs *	file:
regs	drivers/gpio/mxc_gpio.c	/^	struct gpio_regs *regs;$/;"	m	struct:mxc_gpio_plat	typeref:struct:gpio_regs *	file:
regs	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_port *regs;$/;"	m	struct:pic32_gpio_priv	typeref:struct:pic32_reg_port *	file:
regs	drivers/gpio/rk_gpio.c	/^	struct rockchip_gpio_regs *regs;$/;"	m	struct:rockchip_gpio_priv	typeref:struct:rockchip_gpio_regs *	file:
regs	drivers/gpio/sunxi_gpio.c	/^	struct sunxi_gpio *regs;$/;"	m	struct:sunxi_gpio_platdata	typeref:struct:sunxi_gpio *	file:
regs	drivers/gpio/tegra186_gpio.c	/^	uint32_t *regs;$/;"	m	struct:tegra186_gpio_platdata	typeref:typename:uint32_t *	file:
regs	drivers/gpio/xilinx_gpio.c	/^	struct gpio_regs *regs;$/;"	m	struct:xilinx_gpio_priv	typeref:struct:gpio_regs *	file:
regs	drivers/i2c/at91_i2c.h	/^	struct at91_i2c_regs *regs;$/;"	m	struct:at91_i2c_bus	typeref:struct:at91_i2c_regs *
regs	drivers/i2c/designware_i2c.c	/^	struct i2c_regs *regs;$/;"	m	struct:dw_i2c	typeref:struct:i2c_regs *	file:
regs	drivers/i2c/fti2c010.c	/^	struct fti2c010_regs *regs;$/;"	m	struct:fti2c010_chip	typeref:struct:fti2c010_regs *	file:
regs	drivers/i2c/i2c-cdns.c	/^	struct cdns_i2c_regs __iomem *regs;	\/* register base *\/$/;"	m	struct:i2c_cdns_bus	typeref:struct:cdns_i2c_regs __iomem *	file:
regs	drivers/i2c/i2c-uniphier-f.c	/^	struct uniphier_fi2c_regs __iomem *regs;	\/* register base *\/$/;"	m	struct:uniphier_fi2c_dev	typeref:struct:uniphier_fi2c_regs __iomem *	file:
regs	drivers/i2c/i2c-uniphier.c	/^	struct uniphier_i2c_regs __iomem *regs;	\/* register base *\/$/;"	m	struct:uniphier_i2c_dev	typeref:struct:uniphier_i2c_regs __iomem *	file:
regs	drivers/i2c/omap24xx_i2c.c	/^	struct i2c *regs;$/;"	m	struct:omap_i2c	typeref:struct:i2c *	file:
regs	drivers/i2c/rk_i2c.c	/^	struct i2c_regs *regs;$/;"	m	struct:rk_i2c	typeref:struct:i2c_regs *	file:
regs	drivers/i2c/s3c24x0_i2c.h	/^	struct s3c24x0_i2c *regs;$/;"	m	struct:s3c24x0_i2c_bus	typeref:struct:s3c24x0_i2c *
regs	drivers/i2c/tegra_i2c.c	/^	struct i2c_ctlr		*regs;$/;"	m	struct:i2c_bus	typeref:struct:i2c_ctlr *	file:
regs	drivers/mailbox/tegra-hsp.c	/^	fdt_addr_t regs;$/;"	m	struct:tegra_hsp	typeref:typename:fdt_addr_t	file:
regs	drivers/misc/altera_sysid.c	/^	struct altera_sysid_regs *regs;$/;"	m	struct:altera_sysid_platdata	typeref:struct:altera_sysid_regs *	file:
regs	drivers/mmc/ftsdc010_mci.c	/^	void __iomem *regs;$/;"	m	struct:ftsdc010_chip	typeref:typename:void __iomem *	file:
regs	drivers/mmc/mxsmmc.c	/^	struct mxs_ssp_regs	*regs;$/;"	m	struct:mxsmmc_priv	typeref:struct:mxs_ssp_regs *	file:
regs	drivers/mmc/pxa_mmc_gen.c	/^	struct pxa_mmc_regs *regs;$/;"	m	struct:pxa_mmc_priv	typeref:struct:pxa_mmc_regs *	file:
regs	drivers/mmc/sh_mmcif.h	/^	struct sh_mmcif_regs	*regs;$/;"	m	struct:sh_mmcif_host	typeref:struct:sh_mmcif_regs *
regs	drivers/mtd/altera_qspi.c	/^	struct altera_qspi_regs *regs;$/;"	m	struct:altera_qspi_platdata	typeref:struct:altera_qspi_regs *	file:
regs	drivers/mtd/nand/fsl_elbc_nand.c	/^	fsl_lbc_t *regs;$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:fsl_lbc_t *	file:
regs	drivers/mtd/nand/fsl_ifc_nand.c	/^	struct fsl_ifc regs;$/;"	m	struct:fsl_ifc_ctrl	typeref:struct:fsl_ifc	file:
regs	drivers/mtd/nand/mpc5121_nfc.c	/^	void __iomem *regs;$/;"	m	struct:mpc5121_nfc_prv	typeref:typename:void __iomem *	file:
regs	drivers/mtd/nand/mxc_nand.c	/^	struct mxc_nand_regs __iomem	*regs;$/;"	m	struct:mxc_nand_host	typeref:struct:mxc_nand_regs __iomem *	file:
regs	drivers/mtd/nand/sunxi_nand.c	/^	void __iomem *regs;$/;"	m	struct:sunxi_nfc	typeref:typename:void __iomem *	file:
regs	drivers/mtd/nand/vf610_nfc.c	/^	void __iomem *regs;$/;"	m	struct:vf610_nfc	typeref:typename:void __iomem *	file:
regs	drivers/net/ag7xxx.c	/^	void __iomem		*regs;$/;"	m	struct:ar7xxx_eth_priv	typeref:typename:void __iomem *	file:
regs	drivers/net/armada100_fec.h	/^	struct armdfec_reg *regs;$/;"	m	struct:armdfec_device	typeref:struct:armdfec_reg *
regs	drivers/net/cpsw.c	/^	struct cpsw_regs		*regs;$/;"	m	struct:cpsw_priv	typeref:struct:cpsw_regs *	file:
regs	drivers/net/cpsw.c	/^	struct cpsw_slave_regs		*regs;$/;"	m	struct:cpsw_slave	typeref:struct:cpsw_slave_regs *	file:
regs	drivers/net/cs8900.h	/^	struct cs8900_regs *regs;$/;"	m	struct:cs8900_priv	typeref:struct:cs8900_regs *
regs	drivers/net/dnet.c	/^	struct dnet_registers	*regs;$/;"	m	struct:dnet_device	typeref:struct:dnet_registers *	file:
regs	drivers/net/dwc_eth_qos.c	/^	fdt_addr_t regs;$/;"	m	struct:eqos_priv	typeref:typename:fdt_addr_t	file:
regs	drivers/net/ep93xx_eth.h	/^	struct mac_regs			*regs;$/;"	m	struct:ep93xx_priv	typeref:struct:mac_regs *
regs	drivers/net/ftmac110.c	/^	void __iomem *regs;$/;"	m	struct:ftmac110_chip	typeref:typename:void __iomem *	file:
regs	drivers/net/greth.c	/^	greth_regs *regs;$/;"	m	struct:__anonb53b88540108	typeref:typename:greth_regs *	file:
regs	drivers/net/lpc32xx_eth.c	/^	struct lpc32xx_eth_registers *regs;$/;"	m	struct:lpc32xx_eth_device	typeref:struct:lpc32xx_eth_registers *	file:
regs	drivers/net/macb.c	/^	void			*regs;$/;"	m	struct:macb_device	typeref:typename:void *	file:
regs	drivers/net/mvgbe.h	/^	struct mvgbe_registers *regs;$/;"	m	struct:mvgbe_device	typeref:struct:mvgbe_registers *
regs	drivers/net/sunxi_emac.c	/^	struct emac_regs *regs;$/;"	m	struct:emac_eth_dev	typeref:struct:emac_regs *	file:
regs	drivers/net/xilinx_emaclite.c	/^	struct emaclite_regs *regs;$/;"	m	struct:xemaclite	typeref:struct:emaclite_regs *	file:
regs	drivers/net/xilinx_ll_temac_mdio.h	/^	struct temac_reg *regs;$/;"	m	struct:ll_temac_mdio_info	typeref:struct:temac_reg *
regs	drivers/pci/pci_gt64120.c	/^	struct gt64120_regs *regs;$/;"	m	struct:gt64120_pci_controller	typeref:struct:gt64120_regs *	file:
regs	drivers/pci/pci_tegra.c	/^	struct fdt_resource regs;$/;"	m	struct:tegra_pcie_port	typeref:struct:fdt_resource	file:
regs	drivers/pci/pcie_layerscape.c	/^	unsigned long regs;$/;"	m	struct:ls_pcie_info	typeref:typename:unsigned long	file:
regs	drivers/pinctrl/ath79/pinctrl_ar933x.c	/^	void __iomem *regs;$/;"	m	struct:ar933x_pinctrl_priv	typeref:typename:void __iomem *	file:
regs	drivers/pinctrl/ath79/pinctrl_qca953x.c	/^	void __iomem *regs;$/;"	m	struct:qca953x_pinctrl_priv	typeref:typename:void __iomem *	file:
regs	drivers/pwm/exynos_pwm.c	/^	struct s5p_timer *regs;$/;"	m	struct:exynos_pwm_priv	typeref:struct:s5p_timer *	file:
regs	drivers/pwm/rk_pwm.c	/^	struct rk3288_pwm *regs;$/;"	m	struct:rk_pwm_priv	typeref:struct:rk3288_pwm *	file:
regs	drivers/pwm/tegra_pwm.c	/^	struct pwm_ctlr *regs;$/;"	m	struct:tegra_pwm_priv	typeref:struct:pwm_ctlr *	file:
regs	drivers/rtc/imxdi.c	/^	struct imxdi_regs __iomem	*regs;$/;"	m	struct:imxdi_data	typeref:struct:imxdi_regs __iomem *	file:
regs	drivers/serial/altera_jtag_uart.c	/^	struct altera_jtaguart_regs *regs;$/;"	m	struct:altera_jtaguart_platdata	typeref:struct:altera_jtaguart_regs *	file:
regs	drivers/serial/altera_uart.c	/^	struct altera_uart_regs *regs;$/;"	m	struct:altera_uart_platdata	typeref:struct:altera_uart_regs *	file:
regs	drivers/serial/serial_ar933x.c	/^	void __iomem *regs;$/;"	m	struct:ar933x_serial_priv	typeref:typename:void __iomem *	file:
regs	drivers/serial/serial_bcm283x_mu.c	/^	struct bcm283x_mu_regs *regs;$/;"	m	struct:bcm283x_mu_priv	typeref:struct:bcm283x_mu_regs *	file:
regs	drivers/serial/serial_pl01x.c	/^	struct pl01x_regs *regs;$/;"	m	struct:pl01x_priv	typeref:struct:pl01x_regs *	file:
regs	drivers/serial/serial_xuartlite.c	/^	struct uartlite *regs;$/;"	m	struct:uartlite_platdata	typeref:struct:uartlite *	file:
regs	drivers/serial/serial_zynq.c	/^	struct uart_zynq *regs;$/;"	m	struct:zynq_uart_priv	typeref:struct:uart_zynq *	file:
regs	drivers/spi/altera_spi.c	/^	struct altera_spi_regs *regs;$/;"	m	struct:altera_spi_platdata	typeref:struct:altera_spi_regs *	file:
regs	drivers/spi/altera_spi.c	/^	struct altera_spi_regs *regs;$/;"	m	struct:altera_spi_priv	typeref:struct:altera_spi_regs *	file:
regs	drivers/spi/ath79_spi.c	/^	void __iomem *regs;$/;"	m	struct:ath79_spi_priv	typeref:typename:void __iomem *	file:
regs	drivers/spi/atmel_spi.c	/^	struct at91_spi *regs;$/;"	m	struct:atmel_spi_platdata	typeref:struct:at91_spi *	file:
regs	drivers/spi/atmel_spi.h	/^	void		*regs;$/;"	m	struct:atmel_spi_slave	typeref:typename:void *
regs	drivers/spi/bfin_spi6xx.c	/^	struct bfin_spi_regs *regs;$/;"	m	struct:bfin_spi_slave	typeref:struct:bfin_spi_regs *	file:
regs	drivers/spi/cf_qspi.c	/^	qspi_t *regs;		\/* Pointer to SPI controller registers *\/$/;"	m	struct:cf_qspi_slave	typeref:typename:qspi_t *	file:
regs	drivers/spi/davinci_spi.c	/^	struct davinci_spi_regs *regs;$/;"	m	struct:davinci_spi_slave	typeref:struct:davinci_spi_regs *	file:
regs	drivers/spi/designware_spi.c	/^	void __iomem *regs;$/;"	m	struct:dw_spi_platdata	typeref:typename:void __iomem *	file:
regs	drivers/spi/designware_spi.c	/^	void __iomem *regs;$/;"	m	struct:dw_spi_priv	typeref:typename:void __iomem *	file:
regs	drivers/spi/exynos_spi.c	/^	struct exynos_spi *regs;$/;"	m	struct:exynos_spi_platdata	typeref:struct:exynos_spi *	file:
regs	drivers/spi/exynos_spi.c	/^	struct exynos_spi *regs;$/;"	m	struct:exynos_spi_priv	typeref:struct:exynos_spi *	file:
regs	drivers/spi/fsl_dspi.c	/^	struct dspi *regs;$/;"	m	struct:fsl_dspi_priv	typeref:struct:dspi *	file:
regs	drivers/spi/fsl_qspi.c	/^	struct fsl_qspi_regs *regs;$/;"	m	struct:fsl_qspi_priv	typeref:struct:fsl_qspi_regs *	file:
regs	drivers/spi/lpc32xx_ssp.c	/^	struct ssp_regs *regs;$/;"	m	struct:lpc32xx_spi_slave	typeref:struct:ssp_regs *	file:
regs	drivers/spi/mxs_spi.c	/^	struct mxs_ssp_regs	*regs;$/;"	m	struct:mxs_spi_slave	typeref:struct:mxs_ssp_regs *	file:
regs	drivers/spi/omap3_spi.c	/^	struct mcspi *regs;$/;"	m	struct:omap3_spi_priv	typeref:struct:mcspi *	file:
regs	drivers/spi/pic32_spi.c	/^	struct pic32_reg_spi	*regs;$/;"	m	struct:pic32_spi_priv	typeref:struct:pic32_reg_spi *	file:
regs	drivers/spi/rk_spi.c	/^	struct rockchip_spi *regs;$/;"	m	struct:rockchip_spi_priv	typeref:struct:rockchip_spi *	file:
regs	drivers/spi/sh_qspi.c	/^	struct sh_qspi_regs	*regs;$/;"	m	struct:sh_qspi_slave	typeref:struct:sh_qspi_regs *	file:
regs	drivers/spi/sh_spi.h	/^	struct sh_spi_regs	*regs;$/;"	m	struct:sh_spi	typeref:struct:sh_spi_regs *
regs	drivers/spi/tegra114_spi.c	/^	struct spi_regs *regs;$/;"	m	struct:tegra114_spi_priv	typeref:struct:spi_regs *	file:
regs	drivers/spi/tegra20_sflash.c	/^	struct spi_regs *regs;$/;"	m	struct:tegra20_sflash_priv	typeref:struct:spi_regs *	file:
regs	drivers/spi/tegra20_slink.c	/^	struct spi_regs *regs;$/;"	m	struct:tegra30_spi_priv	typeref:struct:spi_regs *	file:
regs	drivers/spi/tegra210_qspi.c	/^	struct qspi_regs *regs;$/;"	m	struct:tegra210_qspi_priv	typeref:struct:qspi_regs *	file:
regs	drivers/spi/xilinx_spi.c	/^	struct xilinx_spi_regs *regs;$/;"	m	struct:xilinx_spi_priv	typeref:struct:xilinx_spi_regs *	file:
regs	drivers/spi/zynq_qspi.c	/^	struct zynq_qspi_regs *regs;$/;"	m	struct:zynq_qspi_platdata	typeref:struct:zynq_qspi_regs *	file:
regs	drivers/spi/zynq_qspi.c	/^	struct zynq_qspi_regs *regs;$/;"	m	struct:zynq_qspi_priv	typeref:struct:zynq_qspi_regs *	file:
regs	drivers/spi/zynq_spi.c	/^	struct zynq_spi_regs *regs;$/;"	m	struct:zynq_spi_platdata	typeref:struct:zynq_spi_regs *	file:
regs	drivers/spi/zynq_spi.c	/^	struct zynq_spi_regs *regs;$/;"	m	struct:zynq_spi_priv	typeref:struct:zynq_spi_regs *	file:
regs	drivers/timer/altera_timer.c	/^	struct altera_timer_regs *regs;$/;"	m	struct:altera_timer_platdata	typeref:struct:altera_timer_regs *	file:
regs	drivers/timer/omap-timer.c	/^	struct omap_gptimer_regs *regs;$/;"	m	struct:omap_timer_priv	typeref:struct:omap_gptimer_regs *	file:
regs	drivers/tpm/tpm_tis_lpc.c	/^	struct tpm_locality *regs;$/;"	m	struct:tpm_tis_lpc_priv	typeref:struct:tpm_locality *	file:
regs	drivers/usb/dwc3/core.h	/^	void __iomem		*regs;$/;"	m	struct:dwc3	typeref:typename:void __iomem *
regs	drivers/usb/gadget/atmel_usba_udc.h	/^	void *regs;$/;"	m	struct:usba_udc	typeref:typename:void *
regs	drivers/usb/gadget/fotg210.c	/^	struct fotg210_regs      *regs;$/;"	m	struct:fotg210_chip	typeref:struct:fotg210_regs *	file:
regs	drivers/usb/gadget/pxa25x_udc.h	/^	struct pxa25x_udc_regs			*regs;$/;"	m	struct:pxa25x_udc	typeref:struct:pxa25x_udc_regs *
regs	drivers/usb/host/dwc2.c	/^	struct dwc2_core_regs *regs;$/;"	m	struct:dwc2_priv	typeref:struct:dwc2_core_regs *	file:
regs	drivers/usb/host/ohci-s3c24xx.h	/^	struct ohci_regs *regs;	\/* OHCI controller's memory *\/$/;"	m	struct:ohci	typeref:struct:ohci_regs *
regs	drivers/usb/host/ohci.h	/^	struct ohci_regs *regs; \/* OHCI controller's memory *\/$/;"	m	struct:ohci	typeref:struct:ohci_regs *
regs	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*regs;$/;"	m	struct:musb_hw_ep	typeref:typename:void __iomem *
regs	drivers/usb/musb/musb_core.h	/^	struct	musb_regs	*regs;$/;"	m	struct:musb_config	typeref:struct:musb_regs *
regs	drivers/video/broadwell_igd.c	/^	u8 *regs;$/;"	m	struct:broadwell_igd_priv	typeref:typename:u8 *	file:
regs	drivers/video/rockchip/rk_edp.c	/^	struct rk3288_edp *regs;$/;"	m	struct:rk_edp_priv	typeref:struct:rk3288_edp *	file:
regs	drivers/video/rockchip/rk_hdmi.c	/^	struct rk3288_hdmi *regs;$/;"	m	struct:rk_hdmi_priv	typeref:struct:rk3288_hdmi *	file:
regs	drivers/video/rockchip/rk_lvds.c	/^	void __iomem *regs;$/;"	m	struct:rk_lvds_priv	typeref:typename:void __iomem *	file:
regs	drivers/video/rockchip/rk_vop.c	/^	struct rk3288_vop *regs;$/;"	m	struct:rk_vop_priv	typeref:struct:rk3288_vop *	file:
regs	drivers/video/tegra124/dp.c	/^	struct dpaux_ctlr *regs;$/;"	m	struct:tegra_dp_priv	typeref:struct:dpaux_ctlr *	file:
regs	include/bedbug/type.h	/^	struct pt_regs *regs;$/;"	m	struct:__anon3619a6480108	typeref:struct:pt_regs *
regs	include/fm_eth.h	/^	struct memac_mdio_controller *regs;$/;"	m	struct:memac_mdio_info	typeref:struct:memac_mdio_controller *
regs	include/fm_eth.h	/^	struct tgec_mdio_controller *regs;$/;"	m	struct:tgec_mdio_info	typeref:struct:tgec_mdio_controller *
regs	include/fsl_mdio.h	/^	struct tsec_mii_mng __iomem *regs;$/;"	m	struct:fsl_pq_mdio_info	typeref:struct:tsec_mii_mng __iomem *
regs	include/imx_thermal.h	/^	void *regs;$/;"	m	struct:imx_thermal_plat	typeref:typename:void *
regs	include/kgdb.h	/^		kgdb_reg regs[KGDBDATA_MAXREGS];$/;"	m	struct:__anon584037260208	typeref:typename:kgdb_reg[]
regs	include/tsec.h	/^	struct tsec __iomem *regs;$/;"	m	struct:tsec_info_struct	typeref:struct:tsec __iomem *
regs	include/tsec.h	/^	struct tsec __iomem *regs;$/;"	m	struct:tsec_private	typeref:struct:tsec __iomem *
regs	include/vsc9953.h	/^	struct vsc9953_mii_mng	*regs;$/;"	m	struct:vsc9953_mdio_info	typeref:struct:vsc9953_mii_mng *
regs_13505_640_480_16bpp	board/esd/common/s1d13505_640_480_16bpp.h	/^static S1D_REGS regs_13505_640_480_16bpp[] =$/;"	v	typeref:typename:S1D_REGS[]
regs_13704_320_240_4bpp	board/esd/common/s1d13704_320_240_4bpp.h	/^static S1D_REGS regs_13704_320_240_4bpp[] =$/;"	v	typeref:typename:S1D_REGS[]
regs_13705_320_240_8bpp	board/esd/common/s1d13705_320_240_8bpp.h	/^static S1D_REGS regs_13705_320_240_8bpp[] =$/;"	v	typeref:typename:S1D_REGS[]
regs_13806_1024_768_8bpp	board/esd/common/s1d13806_1024_768_8bpp.h	/^static S1D_REGS regs_13806_1024_768_8bpp[] =$/;"	v	typeref:typename:S1D_REGS[]
regs_13806_320_240_4bpp	board/esd/common/s1d13806_320_240_4bpp.h	/^static S1D_REGS regs_13806_320_240_4bpp[] =$/;"	v	typeref:typename:S1D_REGS[]
regs_13806_640_480_16bpp	board/esd/common/s1d13806_640_480_16bpp.h	/^static S1D_REGS regs_13806_640_480_16bpp[] =$/;"	v	typeref:typename:S1D_REGS[]
regs_addr	drivers/spi/fsl_dspi.c	/^	fdt_addr_t regs_addr;$/;"	m	struct:fsl_dspi_platdata	typeref:typename:fdt_addr_t	file:
regs_bridge	cmd/pci.c	/^static struct pci_reg_info regs_bridge[] = {$/;"	v	typeref:struct:pci_reg_info[]	file:
regs_cardbus	cmd/pci.c	/^static struct pci_reg_info regs_cardbus[] = {$/;"	v	typeref:struct:pci_reg_info[]	file:
regs_get_register	arch/mips/include/asm/ptrace.h	/^static inline unsigned long regs_get_register(struct pt_regs *regs,$/;"	f	typeref:typename:unsigned long
regs_normal	cmd/pci.c	/^static struct pci_reg_info regs_normal[] = {$/;"	v	typeref:struct:pci_reg_info[]	file:
regs_offset	drivers/spi/omap3_spi.c	/^	unsigned int regs_offset;$/;"	m	struct:omap2_mcspi_platform_config	typeref:typename:unsigned int	file:
regs_otg	drivers/usb/gadget/dwc2_udc_otg.c	/^void __iomem		*regs_otg;$/;"	v	typeref:typename:void __iomem *
regs_otg	include/usb/dwc2_udc.h	/^	unsigned int	regs_otg;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
regs_phy	include/usb/dwc2_udc.h	/^	unsigned int	regs_phy;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
regs_rest	cmd/pci.c	/^static struct pci_reg_info regs_rest[] = {$/;"	v	typeref:struct:pci_reg_info[]	file:
regs_size	drivers/usb/dwc3/core.h	/^	size_t			regs_size;$/;"	m	struct:dwc3	typeref:typename:size_t
regs_start	cmd/pci.c	/^static struct pci_reg_info regs_start[] = {$/;"	v	typeref:struct:pci_reg_info[]	file:
regset	drivers/usb/dwc3/core.h	/^	struct debugfs_regset32	*regset;$/;"	m	struct:dwc3	typeref:struct:debugfs_regset32 *
regulator_3_3v	arch/arm/dts/socfpga_arria5_socdk.dts	/^	regulator_3_3v: 3-3-v-regulator {$/;"	l
regulator_3_3v	arch/arm/dts/socfpga_cyclone5_is1.dts	/^	regulator_3_3v: 3-3-v-regulator {$/;"	l
regulator_3_3v	arch/arm/dts/socfpga_cyclone5_socdk.dts	/^	regulator_3_3v: 3-3-v-regulator {$/;"	l
regulator_autoset	drivers/power/regulator/regulator-uclass.c	/^int regulator_autoset(struct udevice *dev)$/;"	f	typeref:typename:int
regulator_autoset_by_name	drivers/power/regulator/regulator-uclass.c	/^int regulator_autoset_by_name(const char *platname, struct udevice **devp)$/;"	f	typeref:typename:int
regulator_flag	include/power/regulator.h	/^enum regulator_flag {$/;"	g
regulator_get_by_devname	drivers/power/regulator/regulator-uclass.c	/^int regulator_get_by_devname(const char *devname, struct udevice **devp)$/;"	f	typeref:typename:int
regulator_get_by_platname	drivers/power/regulator/regulator-uclass.c	/^int regulator_get_by_platname(const char *plat_name, struct udevice **devp)$/;"	f	typeref:typename:int
regulator_get_current	drivers/power/regulator/regulator-uclass.c	/^int regulator_get_current(struct udevice *dev)$/;"	f	typeref:typename:int
regulator_get_enable	drivers/power/regulator/regulator-uclass.c	/^bool regulator_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool
regulator_get_mode	drivers/power/regulator/regulator-uclass.c	/^int regulator_get_mode(struct udevice *dev)$/;"	f	typeref:typename:int
regulator_get_value	drivers/power/regulator/regulator-uclass.c	/^int regulator_get_value(struct udevice *dev)$/;"	f	typeref:typename:int
regulator_list_autoset	drivers/power/regulator/regulator-uclass.c	/^int regulator_list_autoset(const char *list_platname[],$/;"	f	typeref:typename:int
regulator_mode	drivers/power/regulator/regulator-uclass.c	/^int regulator_mode(struct udevice *dev, struct dm_regulator_mode **modep)$/;"	f	typeref:typename:int
regulator_name_is_unique	drivers/power/regulator/regulator-uclass.c	/^static bool regulator_name_is_unique(struct udevice *check_dev,$/;"	f	typeref:typename:bool	file:
regulator_names	test/dm/regulator.c	/^static const char *regulator_names[OUTPUT_COUNT][OUTPUT_NAME_COUNT] = {$/;"	v	typeref:typename:const char * [][]	file:
regulator_post_bind	drivers/power/regulator/regulator-uclass.c	/^static int regulator_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
regulator_pre_probe	drivers/power/regulator/regulator-uclass.c	/^static int regulator_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
regulator_set_current	drivers/power/regulator/regulator-uclass.c	/^int regulator_set_current(struct udevice *dev, int uA)$/;"	f	typeref:typename:int
regulator_set_enable	drivers/power/regulator/regulator-uclass.c	/^int regulator_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int
regulator_set_mode	drivers/power/regulator/regulator-uclass.c	/^int regulator_set_mode(struct udevice *dev, int mode)$/;"	f	typeref:typename:int
regulator_set_value	drivers/power/regulator/regulator-uclass.c	/^int regulator_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int
regulator_show	drivers/power/regulator/regulator-uclass.c	/^static void regulator_show(struct udevice *dev, int ret)$/;"	f	typeref:typename:void	file:
regulator_type	include/power/regulator.h	/^enum regulator_type {$/;"	g
regulator_vccpint	arch/arm/dts/zynq-7000.dtsi	/^	regulator_vccpint: fixedregulator@0 {$/;"	l
regulators_enable_boot_on	drivers/power/regulator/regulator-uclass.c	/^int regulators_enable_boot_on(bool verbose)$/;"	f	typeref:typename:int
rehlsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	rehlsr;		\/* 0xD4 Rising \/High Level Select Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
reinit	scripts/kconfig/qconf.cc	/^void ConfigList::reinit(void)$/;"	f	class:ConfigList	typeref:typename:void
reiserfs_blk_desc	fs/reiserfs/dev.c	/^static struct blk_desc *reiserfs_blk_desc;$/;"	v	typeref:struct:blk_desc *	file:
reiserfs_de_head	fs/reiserfs/reiserfs_private.h	/^struct reiserfs_de_head$/;"	s
reiserfs_devread	fs/reiserfs/dev.c	/^int reiserfs_devread (int sector, int byte_offset, int byte_len, char *buf)$/;"	f	typeref:typename:int
reiserfs_dir	fs/reiserfs/reiserfs.c	/^reiserfs_dir (char *dirname)$/;"	f	typeref:typename:int	file:
reiserfs_error_t	include/reiserfs.h	/^} reiserfs_error_t;$/;"	t	typeref:enum:__anoncca62f110103
reiserfs_journal_commit	fs/reiserfs/reiserfs_private.h	/^struct reiserfs_journal_commit {$/;"	s
reiserfs_journal_desc	fs/reiserfs/reiserfs_private.h	/^struct reiserfs_journal_desc {$/;"	s
reiserfs_journal_header	fs/reiserfs/reiserfs_private.h	/^struct reiserfs_journal_header {$/;"	s
reiserfs_ls	fs/reiserfs/reiserfs.c	/^reiserfs_ls (char *dirname)$/;"	f	typeref:typename:int
reiserfs_mount	fs/reiserfs/reiserfs.c	/^reiserfs_mount (unsigned part_length)$/;"	f	typeref:typename:int
reiserfs_open	fs/reiserfs/reiserfs.c	/^reiserfs_open (char *filename)$/;"	f	typeref:typename:int
reiserfs_read	fs/reiserfs/reiserfs.c	/^reiserfs_read (char *buf, unsigned len)$/;"	f	typeref:typename:int
reiserfs_set_blk_dev	fs/reiserfs/dev.c	/^void reiserfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)$/;"	f	typeref:typename:void
reiserfs_super_block	fs/reiserfs/reiserfs_private.h	/^struct reiserfs_super_block$/;"	s
rel_block_addr	disk/part_iso.h	/^	unsigned char rel_block_addr[4];	\/* relative Block address *\/$/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char[4]
release	drivers/core/devres.c	/^	dr_release_t			release;$/;"	m	struct:devres	typeref:typename:dr_release_t	file:
release	drivers/usb/gadget/f_mass_storage.c	/^	u16 release;$/;"	m	struct:fsg_common	typeref:typename:u16	file:
release	include/linux/compat.h	/^	void	(*release)(struct device *dev);$/;"	m	struct:device	typeref:typename:void (*)(struct device * dev)
release_barrier	arch/x86/cpu/mp_init.c	/^static inline void release_barrier(atomic_t *b)$/;"	f	typeref:typename:void	file:
release_bus	include/spi.h	/^	int (*release_bus)(struct udevice *dev);$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * dev)
release_cf_lock	drivers/block/systemace.c	/^static void release_cf_lock(void)$/;"	f	typeref:typename:void	file:
release_mem_region	include/linux/ioport.h	/^#define release_mem_region(/;"	d
release_nodes	drivers/core/devres.c	/^static void release_nodes(struct udevice *dev, struct list_head *head,$/;"	f	typeref:typename:void	file:
release_r5_reset	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void release_r5_reset(u8 mode)$/;"	f	typeref:typename:void	file:
release_region	include/linux/ioport.h	/^#define release_region(/;"	d
release_segments	arch/arm/include/asm/processor.h	/^#define release_segments(/;"	d
release_segments	arch/powerpc/include/asm/processor.h	/^#define release_segments(/;"	d
release_thread	arch/mips/include/asm/processor.h	/^#define release_thread(/;"	d
relo_base	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^relo_base:$/;"	l
reload	arch/arm/mach-orion5x/timer.c	/^	u32 reload;	\/* Timer reload reg *\/$/;"	m	struct:orion5x_tmr_val	typeref:typename:u32	file:
reload_pci_eeprom	board/mpl/pati/cmd_pati.c	/^static void reload_pci_eeprom(void)$/;"	f	typeref:typename:void	file:
reloc	arch/sparc/cpu/leon2/start.S	/^reloc:$/;"	l
reloc	arch/sparc/cpu/leon3/start.S	/^reloc:$/;"	l
reloc	include/post.h	/^	void (*reloc) (void);$/;"	m	struct:post_test	typeref:typename:void (*)(void)
reloc_dst_end	arch/sh/cpu/u-boot.lds	/^	PROVIDE (reloc_dst_end = .);$/;"	s	assignment:provide
reloc_dst_end	board/renesas/sh7752evb/u-boot.lds	/^	PROVIDE (reloc_dst_end = .);$/;"	s	assignment:provide
reloc_dst_end	board/renesas/sh7753evb/u-boot.lds	/^	PROVIDE (reloc_dst_end = .);$/;"	s	assignment:provide
reloc_dst_end	board/renesas/sh7757lcr/u-boot.lds	/^	PROVIDE (reloc_dst_end = .);$/;"	s	assignment:provide
reloc_fdt	common/board_f.c	/^static int reloc_fdt(void)$/;"	f	typeref:typename:int	file:
reloc_funcs	arch/sparc/cpu/leon2/prom.c	/^	struct leon_reloc_func reloc_funcs;$/;"	m	struct:leon_prom_info	typeref:struct:leon_reloc_func	file:
reloc_funcs	arch/sparc/cpu/leon3/prom.c	/^	struct leon_reloc_func reloc_funcs;$/;"	m	struct:leon_prom_info	typeref:struct:leon_reloc_func	file:
reloc_off	include/asm-generic/global_data.h	/^	unsigned long reloc_off;$/;"	m	struct:global_data	typeref:typename:unsigned long
relocaddr	board/nokia/rx51/lowlevel_init.S	/^relocaddr:		\/* address of this relocaddr section after coping *\/$/;"	l
relocaddr	include/asm-generic/global_data.h	/^	unsigned long relocaddr;	\/* Start address of U-Boot in RAM *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
relocatable_kernel	arch/x86/include/asm/bootparam.h	/^	__u8	relocatable_kernel;$/;"	m	struct:setup_header	typeref:typename:__u8
relocate	lib/slre.c	/^relocate(struct slre *r, int begin, int shift)$/;"	f	typeref:typename:void	file:
relocate_code	arch/avr32/cpu/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf5227x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf523x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf52x2/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf530x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf532x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf5445x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/m68k/cpu/mcf547x_8x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/microblaze/cpu/start.S	/^relocate_code:$/;"	l
relocate_code	arch/nds32/cpu/n1213/start.S	/^relocate_code:$/;"	l
relocate_code	arch/nios2/cpu/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc512x/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc5xx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc5xxx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc8260/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc83xx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc85xx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc86xx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/mpc8xx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/powerpc/cpu/ppc4xx/start.S	/^relocate_code:$/;"	l
relocate_code	arch/sh/cpu/sh2/cpu.c	/^void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaaddr)$/;"	f	typeref:typename:void
relocate_code	arch/sh/cpu/sh3/cpu.c	/^void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaaddr)$/;"	f	typeref:typename:void
relocate_code	arch/sh/cpu/sh4/cpu.c	/^void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaaddr)$/;"	f	typeref:typename:void
relocate_code	arch/sparc/cpu/leon2/start.S	/^relocate_code:$/;"	l
relocate_code	arch/sparc/cpu/leon3/start.S	/^relocate_code:$/;"	l
relocate_code	arch/xtensa/cpu/start.S	/^relocate_code:$/;"	l
relocate_done	arch/arm/lib/relocate.S	/^relocate_done:$/;"	l
relocate_done	arch/arm/lib/relocate_64.S	/^relocate_done:$/;"	l
relocate_secure_section	arch/arm/cpu/armv7/virt-v7.c	/^static void relocate_secure_section(void)$/;"	f	typeref:typename:void	file:
relocate_wait_code	arch/arm/mach-exynos/sec_boot.S	/^relocate_wait_code:$/;"	l
relocation_return	arch/arm/lib/crt0_64.S	/^relocation_return:$/;"	l
relocations_begin_offset	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t relocations_begin_offset;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
relocations_end_offset	arch/x86/cpu/broadwell/refcode.c	/^	uint32_t relocations_end_offset;$/;"	m	struct:rmodule_header	typeref:typename:uint32_t	file:
relock_memory_DLL	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static inline void relock_memory_DLL(void)$/;"	f	typeref:typename:void	file:
rem	board/mpl/mip405/mip405.c	/^	long int rem;		\/* Remainder	*\/$/;"	m	struct:__anon0274db920108	typeref:typename:long int	file:
rem	board/mpl/pip405/pip405.c	/^	long int rem;		\/* Remainder    *\/$/;"	m	struct:__anonb110a3780108	typeref:typename:long int	file:
rem	disk/part_mac.c	/^	long int rem;		\/* Remainder	*\/$/;"	m	struct:__anon2bd24a970108	typeref:typename:long int	file:
rem	drivers/mtd/nand/atmel_nand_ecc.h	/^		u32 rem[16];$/;"	m	struct:pmecc_regs::__anond2ed08ea0208	typeref:typename:u32[16]
rem	include/inttypes.h	/^	long int rem;		\/* Remainder.  *\/$/;"	m	struct:__anon62f7df8e0108	typeref:typename:long int
rem	include/inttypes.h	/^	long long int rem;		\/* Remainder.  *\/$/;"	m	struct:__anon62f7df8e0208	typeref:typename:long long int
rem	include/linux/time.h	/^    long days, rem;$/;"	m	struct:_DEFUN	typeref:typename:long
rem	lib/ldiv.c	/^	long    rem;$/;"	m	struct:__anon478c5e8b0108	typeref:typename:long	file:
remDestIncr	drivers/dma/MCD_dmaApi.c	/^	s16 remDestIncr[NCHANNELS];	\/* DestIncr *\/$/;"	m	struct:MCD_remVariants_struct	typeref:typename:s16[]	file:
remDestRsdIncr	drivers/dma/MCD_dmaApi.c	/^	int remDestRsdIncr[NCHANNELS];	\/* -1,0,1 *\/$/;"	m	struct:MCD_remVariants_struct	typeref:typename:int[]	file:
remSrcIncr	drivers/dma/MCD_dmaApi.c	/^	s16 remSrcIncr[NCHANNELS];	\/* srcIncr *\/$/;"	m	struct:MCD_remVariants_struct	typeref:typename:s16[]	file:
remSrcRsdIncr	drivers/dma/MCD_dmaApi.c	/^	int remSrcRsdIncr[NCHANNELS];	\/* -1,0,1 *\/$/;"	m	struct:MCD_remVariants_struct	typeref:typename:int[]	file:
remXferSize	drivers/dma/MCD_dmaApi.c	/^	u32 remXferSize[NCHANNELS];	\/* xferSize *\/$/;"	m	struct:MCD_remVariants_struct	typeref:typename:u32[]	file:
rem_port	drivers/mtd/nand/atmel_nand_ecc.h	/^	} rem_port[PMECC_MAX_SECTOR_NUM];$/;"	m	struct:pmecc_regs	typeref:struct:pmecc_regs::__anond2ed08ea0208[]
remain	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t remain;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
remainLen	lib/lzma/LzmaDec.h	/^  unsigned remainLen;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:unsigned
remap	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	remap;				\/* 0x0 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
remap	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^remap:$/;"	l
remap_flash_by_law0	arch/powerpc/cpu/mpc83xx/start.S	/^remap_flash_by_law0:$/;"	l
remap_hi	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 remap_hi;$/;"	m	struct:kwwin_registers	typeref:typename:u32
remap_hi	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 remap_hi;$/;"	m	struct:orion5x_win_registers	typeref:typename:u32
remap_lo	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 remap_lo;$/;"	m	struct:kwwin_registers	typeref:typename:u32
remap_lo	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 remap_lo;$/;"	m	struct:orion5x_win_registers	typeref:typename:u32
remcomInBuffer	common/kgdb.c	/^static char remcomInBuffer[BUFMAX];$/;"	v	typeref:typename:char[]	file:
remcomOutBuffer	common/kgdb.c	/^static char remcomOutBuffer[BUFMAX];$/;"	v	typeref:typename:char[]	file:
remcomRegBuffer	common/kgdb.c	/^static char remcomRegBuffer[BUFMAX];$/;"	v	typeref:typename:char[]	file:
remoder	drivers/qe/uec.h	/^	u32  remoder;             \/* ethernet mode reg. *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
remote_address_masked	tools/gdb/remote.c	/^remote_address_masked (CORE_ADDR addr)$/;"	f	typeref:typename:CORE_ADDR	file:
remote_address_size	tools/gdb/remote.c	/^static int remote_address_size;$/;"	v	typeref:typename:int	file:
remote_binary_checked	tools/gdb/remote.c	/^static int remote_binary_checked;$/;"	v	typeref:typename:int	file:
remote_binary_download	tools/gdb/remote.c	/^static int remote_binary_download = 1;$/;"	v	typeref:typename:int	file:
remote_bus	drivers/i2c/cros_ec_tunnel.c	/^	int remote_bus;$/;"	m	struct:cros_ec_i2c_bus	typeref:typename:int	file:
remote_continue	tools/gdb/remote.c	/^remote_continue(void)$/;"	f	typeref:typename:void
remote_debug	tools/gdb/remote.c	/^static int remote_debug = 0, remote_register_buf_size = 0, watchdog = 0;$/;"	v	typeref:typename:int	file:
remote_desc	tools/gdb/remote.c	/^int remote_desc = -1, remote_timeout = 10;$/;"	v	typeref:typename:int
remote_register_buf_size	tools/gdb/remote.c	/^static int remote_debug = 0, remote_register_buf_size = 0, watchdog = 0;$/;"	v	typeref:typename:int	file:
remote_reset	tools/gdb/remote.c	/^remote_reset(void)$/;"	f	typeref:typename:void
remote_rx	drivers/net/e1000.h	/^	e1000_1000t_rx_status remote_rx;$/;"	m	struct:e1000_phy_info	typeref:typename:e1000_1000t_rx_status
remote_timeout	tools/gdb/remote.c	/^int remote_desc = -1, remote_timeout = 10;$/;"	v	typeref:typename:int
remote_wakeup_enable	drivers/usb/host/isp116x.h	/^	unsigned remote_wakeup_enable:1;$/;"	m	struct:isp116x_platform_data	typeref:typename:unsigned:1
remote_write_bytes	tools/gdb/remote.c	/^remote_write_bytes (memaddr, myaddr, len)$/;"	f
remote_write_size	tools/gdb/remote.c	/^static int remote_write_size = 0x7fffffff;$/;"	v	typeref:typename:int	file:
remount_fs	fs/ubifs/ubifs.h	/^	int (*remount_fs) (struct super_block *, int *, char *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct super_block *,int *,char *)
remounting_rw	fs/ubifs/ubifs.h	/^	unsigned int remounting_rw:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
removable	drivers/usb/gadget/f_mass_storage.c	/^		char removable;$/;"	m	struct:fsg_config::fsg_lun_config	typeref:typename:char	file:
removable	drivers/usb/gadget/storage_common.c	/^	unsigned int	removable:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
removable	include/blk.h	/^	unsigned char	removable;	\/* removable device *\/$/;"	m	struct:blk_desc	typeref:typename:unsigned char
removable_media	include/efi_api.h	/^	char removable_media;$/;"	m	struct:efi_block_io_media	typeref:typename:char
remove	drivers/mtd/ubi/ubi.h	/^	int remove;$/;"	m	struct:ubi_rename_entry	typeref:typename:int
remove	include/dm/device.h	/^	int (*remove)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
remove	include/linux/mtd/mtd.h	/^	void (*remove)(struct mtd_info *mtd);$/;"	m	struct:mtd_notifier	typeref:typename:void (*)(struct mtd_info * mtd)
remove	include/linux/mtd/nand.h	/^	void (*remove)(struct platform_device *pdev);$/;"	m	struct:platform_nand_ctrl	typeref:typename:void (*)(struct platform_device * pdev)
removeColumn	scripts/kconfig/qconf.h	/^	void removeColumn(colIdx idx)$/;"	f	class:ConfigList	typeref:typename:void
remove_bg_job	common/cli_hush.c	/^static void remove_bg_job(struct pipe *pi)$/;"	f	typeref:typename:void	file:
remove_buds	fs/ubifs/log.c	/^static void remove_buds(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
remove_cpu_io_clamps	arch/arm/mach-tegra/cpu.c	/^static void remove_cpu_io_clamps(void)$/;"	f	typeref:typename:void	file:
remove_cpu_resets	arch/arm/mach-tegra/tegra114/cpu.c	/^static void remove_cpu_resets(void)$/;"	f	typeref:typename:void	file:
remove_cpu_resets	arch/arm/mach-tegra/tegra124/cpu.c	/^static void remove_cpu_resets(void)$/;"	f	typeref:typename:void	file:
remove_from_lpt_heap	fs/ubifs/lprops.c	/^static void remove_from_lpt_heap(struct ubifs_info *c,$/;"	f	typeref:typename:void	file:
remove_inactive_children	drivers/usb/host/usb-uclass.c	/^static void remove_inactive_children(struct uclass *uc, struct udevice *bus)$/;"	f	typeref:typename:void	file:
remove_ino	fs/ubifs/recovery.c	/^static void remove_ino(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:typename:void	file:
remove_obj_fn	fs/yaffs2/yaffs_guts.h	/^	void (*remove_obj_fn) (struct yaffs_obj *obj);$/;"	m	struct:yaffs_param	typeref:typename:void (*)(struct yaffs_obj * obj)
remove_proc_files	drivers/usb/gadget/dwc2_udc_otg.c	/^#define remove_proc_files(/;"	d	file:
remove_strings	tools/fdtgrep.c	/^	int remove_strings;	\/* Remove unused strings *\/$/;"	m	struct:display_info	typeref:typename:int	file:
remove_tlb	arch/powerpc/cpu/ppc4xx/tlb.c	/^void remove_tlb(u32 vaddr, u32 size)$/;"	f	typeref:typename:void
remove_ucode	tools/ifdtool.c	/^static int remove_ucode(char *blob)$/;"	f	typeref:typename:int	file:
remove_unused_controllers	drivers/ddr/fsl/util.c	/^void remove_unused_controllers(fsl_ddr_info_t *info)$/;"	f	typeref:typename:void
remove_wait_queue	include/linux/compat.h	/^#define remove_wait_queue(/;"	d
removed	include/dm/test.h	/^	struct udevice *removed;$/;"	m	struct:dm_test_state	typeref:struct:udevice *
removevlan	drivers/qe/uec.h	/^	u32   removevlan;$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
ren_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 ren_freq;		\/* offset 0x18 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
rename_allowed	fs/yaffs2/yaffs_guts.h	/^	u8 rename_allowed:1;	\/* Some objects cannot be renamed. *\/$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
rename_allowed	fs/yaffs2/yaffs_guts.h	/^	u8 rename_allowed:1;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8:1
rename_region	include/linux/ioport.h	/^#define rename_region(/;"	d
renderer_edited	scripts/kconfig/gconf.c	/^static void renderer_edited(GtkCellRendererText * cell,$/;"	f	typeref:typename:void	file:
repeat0	board/renesas/r7780mp/lowlevel_init.S	/^repeat0:$/;"	l
repeat0	board/renesas/rsk7203/lowlevel_init.S	/^repeat0:$/;"	l
repeat0	board/renesas/rsk7264/lowlevel_init.S	/^repeat0:$/;"	l
repeat0	board/renesas/rsk7269/lowlevel_init.S	/^repeat0:$/;"	l
repeat1	board/renesas/r7780mp/lowlevel_init.S	/^repeat1:$/;"	l
repeat2	board/renesas/r7780mp/lowlevel_init.S	/^repeat2:$/;"	l
repeat_delay	common/usb_kbd.c	/^	uint32_t	repeat_delay;$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint32_t	file:
repeat_delay_ms	include/input.h	/^	unsigned int repeat_delay_ms;	\/* Time before autorepeat starts *\/$/;"	m	struct:input_config	typeref:typename:unsigned int
repeat_rate_ms	include/input.h	/^	unsigned int repeat_rate_ms;	\/* Autorepeat rate in ms *\/$/;"	m	struct:input_config	typeref:typename:unsigned int
repeatable	include/command.h	/^	int		repeatable;	\/* autorepeat allowed?		*\/$/;"	m	struct:cmd_tbl_s	typeref:typename:int
replace_button_icon	scripts/kconfig/gconf.c	/^void replace_button_icon(GladeXML * xml, GdkDrawable * window,$/;"	f	typeref:typename:void
replace_cats	fs/ubifs/lpt.c	/^static void replace_cats(struct ubifs_info *c, struct ubifs_pnode *old_pnode,$/;"	f	typeref:typename:void	file:
replacevlan	drivers/qe/uec.h	/^	u32   replacevlan;$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
replay_bud	fs/ubifs/replay.c	/^static int replay_bud(struct ubifs_info *c, struct bud_entry *b)$/;"	f	typeref:typename:int	file:
replay_buds	fs/ubifs/replay.c	/^static int replay_buds(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
replay_buds	fs/ubifs/ubifs.h	/^	struct list_head replay_buds;$/;"	m	struct:ubifs_info	typeref:struct:list_head
replay_entries_cmp	fs/ubifs/replay.c	/^static int replay_entries_cmp(void *priv, struct list_head *a,$/;"	f	typeref:typename:int	file:
replay_entry	fs/ubifs/replay.c	/^struct replay_entry {$/;"	s	file:
replay_list	fs/ubifs/ubifs.h	/^	struct list_head replay_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
replay_log_leb	fs/ubifs/replay.c	/^static int replay_log_leb(struct ubifs_info *c, int lnum, int offs, void *sbuf)$/;"	f	typeref:typename:int	file:
replay_sqnum	fs/ubifs/ubifs.h	/^	unsigned long long replay_sqnum;$/;"	m	struct:ubifs_info	typeref:typename:unsigned long long
replaying	fs/ubifs/ubifs.h	/^	unsigned int replaying:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
reply	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t reply;$/;"	m	struct:mrq_ping_response	typeref:typename:uint32_t
reply	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t reply;$/;"	m	struct:mrq_threaded_ping_response	typeref:typename:uint32_t
reply	net/nfs.h	/^		} reply;$/;"	m	union:rpc_t::__anon8c947878010a	typeref:struct:rpc_t::__anon8c947878010a::__anon8c9478780308
reply_arp	drivers/net/sandbox-raw.c	/^static int reply_arp;$/;"	v	typeref:typename:int	file:
report	lib/dhry/dhry_1.c	/^void report(void)$/;"	f	typeref:typename:void
report	scripts/checkpatch.pl	/^sub report {$/;"	s
report_bist_failure	arch/x86/cpu/intel_common/cpu.c	/^static int report_bist_failure(void)$/;"	f	typeref:typename:int	file:
report_ccb_status	drivers/crypto/fsl/error.c	/^static void report_ccb_status(const u32 status,$/;"	f	typeref:typename:void	file:
report_cond_code_status	drivers/crypto/fsl/error.c	/^static void report_cond_code_status(const u32 status,$/;"	f	typeref:typename:void	file:
report_cpu_info	arch/x86/cpu/intel_common/report_platform.c	/^static void report_cpu_info(void)$/;"	f	typeref:typename:void	file:
report_deco_status	drivers/crypto/fsl/error.c	/^static void report_deco_status(const u32 status,$/;"	f	typeref:typename:void	file:
report_dump	scripts/checkpatch.pl	/^sub report_dump {$/;"	s
report_error	tools/fdtgrep.c	/^static void report_error(const char *where, int err)$/;"	f	typeref:typename:void	file:
report_jr_status	drivers/crypto/fsl/error.c	/^static void report_jr_status(const u32 status,$/;"	f	typeref:typename:void	file:
report_jump_status	drivers/crypto/fsl/error.c	/^static void report_jump_status(const u32 status,$/;"	f	typeref:typename:void	file:
report_memory_config	arch/x86/cpu/intel_common/mrc.c	/^void report_memory_config(void)$/;"	f	typeref:typename:void
report_pch_info	arch/x86/cpu/intel_common/report_platform.c	/^static void report_pch_info(struct udevice *dev)$/;"	f	typeref:typename:void	file:
report_platform_info	arch/x86/cpu/intel_common/report_platform.c	/^void report_platform_info(struct udevice *dev)$/;"	f	typeref:typename:void
report_return_code	cmd/tpm.c	/^static int report_return_code(int return_code)$/;"	f	typeref:typename:int	file:
report_rp_size	fs/ubifs/ubifs.h	/^	long long report_rp_size;$/;"	m	struct:ubifs_info	typeref:typename:long long
report_ssed	drivers/crypto/fsl/error.c	/^		void (*report_ssed)(const u32 status,$/;"	m	struct:caam_jr_strstatus::stat_src	typeref:typename:void (*)(const u32 status,const char * error)	file:
report_time	cmd/time.c	/^static void report_time(ulong cycles)$/;"	f	typeref:typename:void	file:
report_tx_early	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			report_tx_early;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
report_tx_early	drivers/net/e1000.h	/^	bool report_tx_early;$/;"	m	struct:e1000_hw	typeref:typename:bool
representation	doc/README.x86	/^with compression".$/;"	l
reps	lib/lzma/LzmaDec.h	/^  UInt32 reps[4];$/;"	m	struct:__anon7c0cd2440108	typeref:typename:UInt32[4]
req	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 req;			\/* 20: DVC_REQ_REGISTER *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a	typeref:struct:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a::__anon775fc5441508
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a	typeref:struct:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a::__anon775fc5442a08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a	typeref:struct:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a::__anon775fc5441b08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_depth::__anon775fc544230a	typeref:struct:bcm2835_mbox_tag_depth::__anon775fc544230a::__anon775fc5442408
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a	typeref:struct:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a::__anon775fc5440908
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_get_board_rev::__anon775fc544010a	typeref:struct:bcm2835_mbox_tag_get_board_rev::__anon775fc544010a::__anon775fc5440208
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a	typeref:struct:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a::__anon775fc5441208
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a	typeref:struct:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a::__anon775fc5440508
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_get_palette::__anon775fc544350a	typeref:struct:bcm2835_mbox_tag_get_palette::__anon775fc544350a::__anon775fc5443608
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a	typeref:struct:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a::__anon775fc5440c08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_overscan::__anon775fc544320a	typeref:struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443308
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a	typeref:struct:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a::__anon775fc5441e08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_pitch::__anon775fc5442c0a	typeref:struct:bcm2835_mbox_tag_pitch::__anon775fc5442c0a::__anon775fc5442d08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_pixel_order::__anon775fc544260a	typeref:struct:bcm2835_mbox_tag_pixel_order::__anon775fc544260a::__anon775fc5442708
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_release_buffer::__anon775fc544170a	typeref:struct:bcm2835_mbox_tag_release_buffer::__anon775fc544170a::__anon775fc5441808
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a	typeref:struct:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a::__anon775fc5443c08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a	typeref:struct:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a::__anon775fc5440f08
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_test_palette::__anon775fc544380a	typeref:struct:bcm2835_mbox_tag_test_palette::__anon775fc544380a::__anon775fc5443908
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a	typeref:struct:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a::__anon775fc5443008
req	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} req;$/;"	m	union:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a	typeref:struct:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a::__anon775fc5442108
req	drivers/usb/gadget/at91_udc.h	/^	struct usb_request		req;$/;"	m	struct:at91_request	typeref:struct:usb_request
req	drivers/usb/gadget/atmel_usba_udc.h	/^	struct usb_request			req;$/;"	m	struct:usba_request	typeref:struct:usb_request
req	drivers/usb/gadget/ci_udc.h	/^	struct usb_request	req;$/;"	m	struct:ci_req	typeref:struct:usb_request
req	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	struct usb_request req;$/;"	m	struct:dwc2_request	typeref:struct:usb_request
req	drivers/usb/gadget/ether.c	/^	struct usb_request	*req;		\/* for control responses *\/$/;"	m	struct:eth_dev	typeref:struct:usb_request *	file:
req	drivers/usb/gadget/f_thor.h	/^	struct usb_request *req; \/* EP0 -> control responses *\/$/;"	m	struct:thor_dev	typeref:struct:usb_request *
req	drivers/usb/gadget/fotg210.c	/^	struct usb_request req;$/;"	m	struct:fotg210_request	typeref:struct:usb_request	file:
req	drivers/usb/gadget/pxa25x_udc.h	/^	struct usb_request			req;$/;"	m	struct:pxa25x_request	typeref:struct:usb_request
req	include/linux/usb/composite.h	/^	struct usb_request		*req;$/;"	m	struct:usb_composite_dev	typeref:struct:usb_request *
req_config	drivers/usb/gadget/pxa25x_udc.h	/^						req_config:1,$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
req_info_permission_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 req_info_permission_0;	\/* 0x48 *\/$/;"	m	struct:pm	typeref:typename:u32
req_info_permission_1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 req_info_permission_1;	\/* 0x68 *\/$/;"	m	struct:pm	typeref:typename:u32
req_list	drivers/usb/musb-new/musb_gadget.h	/^	struct list_head		req_list;$/;"	m	struct:musb_ep	typeref:struct:list_head
req_p1p2p3_quirk	drivers/usb/dwc3/core.h	/^	unsigned		req_p1p2p3_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
req_p1p2p3_quirk	include/dwc3-uboot.h	/^	unsigned req_p1p2p3_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
req_pending	drivers/usb/gadget/at91_udc.h	/^	unsigned			req_pending:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
req_pending	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	unsigned req_pending:1, req_std:1;$/;"	m	struct:dwc2_udc	typeref:typename:unsigned:1
req_pending	drivers/usb/gadget/pxa25x_udc.h	/^						req_pending:1,$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
req_period	arch/mips/mach-pic32/include/mach/ddr.h	/^	u32 req_period; \/* request period threshold for accepted cmds *\/$/;"	m	struct:ddr2_arbiter_params	typeref:typename:u32
req_port0123	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 req_port0123;	\/* 0x4c: Request Port 0\/1\/2\/3 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
req_port4567	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 req_port4567;	\/* 0x50: Request Port 4\/5\/6\/7 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
req_primed	drivers/usb/gadget/ci_udc.h	/^	bool req_primed;$/;"	m	struct:ci_ep	typeref:typename:bool
req_queued	drivers/usb/dwc3/core.h	/^	struct list_head	req_queued;$/;"	m	struct:dwc3_ep	typeref:struct:list_head
req_seq	include/dm/device.h	/^	int req_seq;$/;"	m	struct:udevice	typeref:typename:int
req_std	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	unsigned req_pending:1, req_std:1;$/;"	m	struct:dwc2_udc	typeref:typename:unsigned:1
req_std	drivers/usb/gadget/pxa25x_udc.h	/^						req_std:1,$/;"	m	struct:pxa25x_udc	typeref:typename:unsigned:1
reqname	drivers/usb/gadget/ci_udc.c	/^static const char *reqname(unsigned r)$/;"	f	typeref:typename:const char *	file:
reqprd	drivers/ddr/microchip/ddr2_regs.h	/^	u32 reqprd;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
request	drivers/block/sata_mv.c	/^	struct crqb *request;$/;"	m	struct:mv_priv	typeref:struct:crqb *	file:
request	drivers/mmc/rpmb.c	/^	unsigned short request;$/;"	m	struct:s_rpmb	typeref:typename:unsigned short	file:
request	drivers/usb/dwc3/core.h	/^	struct usb_request	request;$/;"	m	struct:dwc3_request	typeref:struct:usb_request
request	drivers/usb/musb-new/musb_gadget.h	/^	struct usb_request	request;$/;"	m	struct:musb_request	typeref:struct:usb_request
request	include/asm-generic/gpio.h	/^	int (*request)(struct udevice *dev, unsigned offset, const char *label);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset,const char * label)
request	include/clk-uclass.h	/^	int (*request)(struct clk *clock);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * clock)
request	include/dm/pinctrl.h	/^	int (*request)(struct udevice *dev, int func, int flags);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,int func,int flags)
request	include/mailbox-uclass.h	/^	int (*request)(struct mbox_chan *chan);$/;"	m	struct:mbox_ops	typeref:typename:int (*)(struct mbox_chan * chan)
request	include/power-domain-uclass.h	/^	int (*request)(struct power_domain *power_domain);$/;"	m	struct:power_domain_ops	typeref:typename:int (*)(struct power_domain * power_domain)
request	include/reset-uclass.h	/^	int (*request)(struct reset_ctl *reset_ctl);$/;"	m	struct:reset_ops	typeref:typename:int (*)(struct reset_ctl * reset_ctl)
request	include/sysreset.h	/^	int (*request)(struct udevice *dev, enum sysreset_t type);$/;"	m	struct:sysreset_ops	typeref:typename:int (*)(struct udevice * dev,enum sysreset_t type)
request	include/usb.h	/^	__u8	request;$/;"	m	struct:devrequest	typeref:typename:__u8
request2size	common/dlmalloc.c	/^#define request2size(/;"	d	file:
request_and_pulse_reset	board/siemens/rut/board.c	/^static int request_and_pulse_reset(int gpio, const char *name)$/;"	f	typeref:typename:int	file:
request_and_set_gpio	board/ti/am335x/board.c	/^static void request_and_set_gpio(int gpio, char *name, int val)$/;"	f	typeref:typename:void	file:
request_complete	drivers/usb/gadget/atmel_usba_udc.c	/^request_complete(struct usba_ep *ep, struct usba_request *req, int status)$/;"	f	typeref:typename:void	file:
request_complete_list	drivers/usb/gadget/atmel_usba_udc.c	/^request_complete_list(struct usba_ep *ep, struct list_head *list, int status)$/;"	f	typeref:typename:void	file:
request_irq	include/linux/compat.h	/^#define request_irq(/;"	d
request_list	drivers/usb/dwc3/core.h	/^	struct list_head	request_list;$/;"	m	struct:dwc3_ep	typeref:struct:list_head
request_mem_region	include/linux/ioport.h	/^#define request_mem_region(/;"	d
request_mem_region_exclusive	include/linux/ioport.h	/^#define request_mem_region_exclusive(/;"	d
request_origin	arch/x86/include/asm/me_common.h	/^	u8 request_origin;$/;"	m	struct:me_global_reset	typeref:typename:u8
request_region	include/linux/ioport.h	/^#define request_region(/;"	d
requested	include/linux/ethtool.h	/^	__u32	requested;$/;"	m	struct:ethtool_get_features_block	typeref:typename:__u32
requested	include/linux/ethtool.h	/^	__u32	requested;$/;"	m	struct:ethtool_set_features_block	typeref:typename:__u32
requesttype	include/usb.h	/^	__u8	requesttype;$/;"	m	struct:devrequest	typeref:typename:__u8
require_keys	include/image.h	/^	const char *require_keys;	\/* Value for 'required' property *\/$/;"	m	struct:image_sign_info	typeref:typename:const char *
require_keys	tools/imagetool.h	/^	int require_keys;	\/* 1 to mark signing keys as 'required' *\/$/;"	m	struct:image_tool_params	typeref:typename:int
required_keynode	include/image.h	/^	int required_keynode;		\/* Node offset of key to use: -1=any *\/$/;"	m	struct:image_sign_info	typeref:typename:int
required_to_function	include/part_efi.h	/^		u64 required_to_function:1;$/;"	m	struct:_gpt_entry_attributes::__anon7effa4980208	typeref:typename:u64:1
res	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^	u32 res;		\/* Reset Source Register		*\/$/;"	m	struct:wdt_regs	typeref:typename:u32
res	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 res[0x2f];$/;"	m	struct:gpio_regs	typeref:typename:u32[0x2f]
res	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 res[0x1f1];$/;"	m	struct:iim_regs	typeref:typename:u32[0x1f1]
res	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 res[5];$/;"	m	struct:system_control_regs	typeref:typename:u32[5]
res	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 res[0x1f1];$/;"	m	struct:iim_regs	typeref:typename:u32[0x1f1]
res	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res[0xc];$/;"	m	struct:gptimer	typeref:typename:u8[0xc]
res	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char res[0x10];$/;"	m	struct:s32ktimer	typeref:typename:unsigned char[0x10]
res	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char res[0x408];$/;"	m	struct:control_prog_io	typeref:typename:unsigned char[0x408]
res	arch/arm/include/asm/arch-omap4/cpu.h	/^	u8 res[0xc];$/;"	m	struct:gptimer	typeref:typename:u8[0xc]
res	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned char res[0x10];$/;"	m	struct:s32ktimer	typeref:typename:unsigned char[0x10]
res	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned char res[0x10];$/;"	m	struct:s32ktimer	typeref:typename:unsigned char[0x10]
res	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	res;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
res	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res[1];$/;"	m	struct:s3c24x0_dma	typeref:typename:u32[1]
res	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res[8];$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32[8]
res	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res[3];$/;"	m	struct:s3c24x0_usb_dev_fifos	typeref:typename:u8[3]
res	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res[0x34];		\/* base + 0xc *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u8[0x34]
res	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res[0x8];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x8]
res	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u8 res[0x34];$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u8[0x34]
res	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u8 res[0xbc];$/;"	m	struct:sunxi_gpio_reg	typeref:typename:u8[0xbc]
res	arch/arm/include/asm/arch-sunxi/timer.h	/^	u8 res[4];$/;"	m	struct:sunxi_timer	typeref:typename:u8[4]
res	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 res[2];$/;"	m	struct:sunxi_wdog	typeref:typename:u32[2]
res	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res[0x34];		\/* base + 0xc *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u8[0x34]
res	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res[0x8];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x8]
res	arch/arm/include/asm/arch/dram_sun9i.h	/^		u8 res[0x34];$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_dx	typeref:typename:u8[0x34]
res	arch/arm/include/asm/arch/gpio.h	/^	u8 res[0xbc];$/;"	m	struct:sunxi_gpio_reg	typeref:typename:u8[0xbc]
res	arch/arm/include/asm/arch/timer.h	/^	u8 res[4];$/;"	m	struct:sunxi_timer	typeref:typename:u8[4]
res	arch/arm/include/asm/arch/watchdog.h	/^	u32 res[2];$/;"	m	struct:sunxi_wdog	typeref:typename:u32[2]
res	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	res[6];$/;"	m	struct:tx_chan_regs	typeref:typename:u32[6]
res	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	res[7];$/;"	m	struct:rx_chan_regs	typeref:typename:u32[7]
res	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	res;$/;"	m	struct:davinci_uart_ctrl_regs	typeref:typename:dv_reg
res	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res[0x4];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x4]
res	arch/blackfin/cpu/gpio.c	/^	unsigned short res;$/;"	m	struct:__anonb4c211320208	typeref:typename:unsigned short	file:
res	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 res;		\/* 0x0E *\/$/;"	m	struct:can_msgbuf_ctrl	typeref:typename:u16
res	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 res[4];$/;"	m	struct:lcd_ctrl	typeref:typename:u32[4]
res	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 res[10];		\/* 0x48 - 0x6F *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32[10]
res	arch/powerpc/include/asm/5xx_immap.h	/^	char   res[3616];$/;"	m	struct:qsmcm	typeref:typename:char[3616]
res	arch/powerpc/include/asm/8xx_immap.h	/^	char	res[0x474];$/;"	m	struct:cark	typeref:typename:char[0x474]
res	arch/powerpc/include/asm/8xx_immap.h	/^	char	res[0x74];        \/* Reserved area                  *\/$/;"	m	struct:clk_and_reset	typeref:typename:char[0x74]
res	arch/powerpc/include/asm/8xx_immap.h	/^	char	res[0xe];$/;"	m	struct:cpm_ic	typeref:typename:char[0xe]
res	arch/powerpc/include/asm/cpm_8260.h	/^	uchar   res[4];         \/* reserved *\/$/;"	m	struct:scc_hdlc	typeref:typename:uchar[4]
res	arch/powerpc/include/asm/immap_512x.h	/^	u8 res[116];$/;"	m	struct:pciconf512x	typeref:typename:u8[116]
res	arch/powerpc/include/asm/immap_8260.h	/^	char	res[104];$/;"	m	struct:clk_and_reset	typeref:typename:char[104]
res	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res[0x98];$/;"	m	struct:ipic83xx	typeref:typename:u8[0x98]
res	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res[0xC0];$/;"	m	struct:gtm83xx	typeref:typename:u8[0xC0]
res	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res[116];$/;"	m	struct:pciconf83xx	typeref:typename:u8[116]
res	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res[4];$/;"	m	struct:arbiter83xx	typeref:typename:u8[4]
res	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res;$/;"	m	struct:ccsr_qman::__anondcd7518a0b08	typeref:typename:u32
res	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res;$/;"	m	struct:cpc_corenet::__anondcd7518a0208	typeref:typename:u32
res	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res[5];$/;"	m	struct:serdes_corenet::__anondcd7518a0908	typeref:typename:u32[5]
res	arch/powerpc/include/asm/immap_85xx.h	/^		u8	res[0x800];$/;"	m	struct:ccsr_raide::__anondcd7518a0c08	typeref:typename:u8[0x800]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[0xbf8 - 0x200];$/;"	m	struct:ccsr_qman	typeref:typename:u8[]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[0xbf8];$/;"	m	struct:ccsr_bman	typeref:typename:u8[0xbf8]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[15];$/;"	m	struct:ccsr_cpm_fcc1_ext	typeref:typename:u8[15]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[31];$/;"	m	struct:ccsr_cpm_fcc2_ext	typeref:typename:u8[31]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[32];$/;"	m	struct:ccsr_cpm_tmp2	typeref:typename:u8[32]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[36];$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u8[36]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[4096 - 1 * sizeof(struct fsl_i2c_base)];$/;"	m	struct:ccsr_i2c	typeref:typename:u8[]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[47];$/;"	m	struct:ccsr_cpm_fcc3_ext	typeref:typename:u8[47]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[496];$/;"	m	struct:ccsr_cpm_tmp1	typeref:typename:u8[496]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[608];$/;"	m	struct:ccsr_cpm_brg2	typeref:typename:u8[608]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[8];$/;"	m	struct:par_io	typeref:typename:u8[8]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res[98304];$/;"	m	struct:ccsr_cpm_iram	typeref:typename:u8[98304]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8 res[262144];$/;"	m	struct:ccsr_cpm	typeref:typename:u8[262144]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8 res[4096];$/;"	m	struct:ccsr_duart	typeref:typename:u8[4096]
res	arch/powerpc/include/asm/immap_85xx.h	/^	u8 res[58592];$/;"	m	struct:ccsr_cpm_tmp3	typeref:typename:u8[58592]
res	arch/powerpc/include/asm/immap_86xx.h	/^	u8	res[4096 - 2 * sizeof(struct fsl_i2c_base)];$/;"	m	struct:ccsr_i2c	typeref:typename:u8[]
res	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long res[3];	\/* reserved (TDs must be 8Byte aligned) *\/$/;"	m	struct:__anon66fd0d690108	typeref:typename:unsigned long[3]
res	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long res[5];	\/* reserved *\/$/;"	m	struct:__anon66fd0d690208	typeref:typename:unsigned long[5]
res	arch/x86/cpu/interrupts.c	/^	u8	res;$/;"	m	struct:idt_entry	typeref:typename:u8	file:
res	board/freescale/c29xpcie/cpld.h	/^	u8 res[12];$/;"	m	struct:cpld_data	typeref:typename:u8[12]
res	board/freescale/common/pixis.h	/^	u8 res[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
res	board/freescale/common/pixis.h	/^	u8 res[4];$/;"	m	struct:pixis	typeref:typename:u8[4]
res	board/freescale/common/pixis.h	/^	u8 res[7];$/;"	m	struct:pixis	typeref:typename:u8[7]
res	board/freescale/common/pixis.h	/^	u8 res[8];$/;"	m	struct:pixis	typeref:typename:u8[8]
res	board/micronas/vct/top.c	/^		u32 res		: 24;   \/* reserved		*\/$/;"	m	struct:_TOP_PINMUX_t::__anon904a4b870108	typeref:typename:u32:24	file:
res	board/mpl/common/usb_uhci.h	/^	unsigned long res[3];   \/* reserved (TDs must be 8Byte aligned) *\/$/;"	m	struct:__anon0a2b4c740108	typeref:typename:unsigned long[3]
res	board/mpl/common/usb_uhci.h	/^	unsigned long res[5];     \/* reserved *\/$/;"	m	struct:__anon0a2b4c740208	typeref:typename:unsigned long[5]
res	disk/part_iso.h	/^	unsigned char res;					\/* reserved *\/$/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char
res	disk/part_iso.h	/^	unsigned char res[2];				\/* reserved *\/$/;"	m	struct:iso_val_entry	typeref:typename:unsigned char[2]
res	drivers/block/fsl_sata.h	/^	u8 res[SATA_HC_CMD_DESC_RES];$/;"	m	struct:cmd_desc	typeref:typename:u8[]
res	drivers/block/sata_dwc.c	/^	u32 res[15];$/;"	m	struct:sata_dwc_regs	typeref:typename:u32[15]	file:
res	drivers/net/calxedaxgmac.c	/^	__le32 res[3];$/;"	m	struct:xgmac_dma_desc	typeref:typename:__le32[3]	file:
res	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res[4092];$/;"	m	struct:ep_fifo	typeref:typename:u8[4092]
res	drivers/video/fsl_diu_fb.c	/^	__le32 res[3];$/;"	m	struct:diu_ad	typeref:typename:__le32[3]	file:
res	drivers/video/ipu_common.c	/^	uint32_t res[3];$/;"	m	struct:ipu_ch_param_word	typeref:typename:uint32_t[3]	file:
res	include/commproc.h	/^	uchar	res[4];		\/* reserved *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:uchar[4]
res	include/fsl_fman.h	/^		u8		res[1024];$/;"	m	struct:ccsr_fman::__anonbe262a140108	typeref:typename:u8[1024]
res	include/fsl_fman.h	/^	u32	res[0x3c8];$/;"	m	struct:fm_dma	typeref:typename:u32[0x3c8]
res	include/fsl_fman.h	/^	u8	res[0xff0];$/;"	m	struct:fm_imem	typeref:typename:u8[0xff0]
res	include/fsl_fman.h	/^	u8	res[1024];$/;"	m	struct:fm_bmi	typeref:typename:u8[1024]
res	include/fsl_fman.h	/^	u8	res[1024];$/;"	m	struct:fm_parser	typeref:typename:u8[1024]
res	include/fsl_fman.h	/^	u8	res[1024];$/;"	m	struct:fm_qmi	typeref:typename:u8[1024]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_10gec	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_10gec_mdio	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_1588	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_dtesc	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_keygen	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_memac	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_memac_mdio	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_policer	typeref:typename:u8[]
res	include/fsl_fman.h	/^	u8	res[4*1024];$/;"	m	struct:fm_soft_parser	typeref:typename:u8[]
res	include/fsl_ifc.h	/^	u32 res;$/;"	m	struct:fsl_ifc_csor	typeref:typename:u32
res	include/fsl_ifc.h	/^	u32 res;$/;"	m	struct:fsl_ifc_cspr	typeref:typename:u32
res	include/fsl_ifc.h	/^	u32 res[0x2];$/;"	m	struct:fsl_ifc_amask	typeref:typename:u32[0x2]
res	include/fsl_ifc.h	/^	u32 res[0x8];$/;"	m	struct:fsl_ifc_ftim	typeref:typename:u32[0x8]
res	include/fsl_usb.h	/^	u8	res[0xe4];$/;"	m	struct:ccsr_usb_phy	typeref:typename:u8[0xe4]
res	include/linux/ioport.h	/^	struct resource *res;$/;"	m	struct:resource_list	typeref:struct:resource *
res	include/linux/mtd/omap_gpmc.h	/^	u8 res[8];		\/* blow up to 0x30 byte *\/$/;"	m	struct:gpmc_cs	typeref:typename:u8[8]
res	include/spd.h	/^	unsigned char res[15];     \/* 47-xx IDD in SPD and Reserved space *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[15]
res	post/cpu/mpc8xx/usb.c	/^	uint res[2];$/;"	m	struct:usb_param_block	typeref:typename:uint[2]	file:
res	post/lib_powerpc/andi.c	/^    ulong res;$/;"	m	struct:cpu_post_andi_s	typeref:typename:ulong	file:
res	post/lib_powerpc/cmp.c	/^    ulong res;$/;"	m	struct:cpu_post_cmp_s	typeref:typename:ulong	file:
res	post/lib_powerpc/cmpi.c	/^    ulong res;$/;"	m	struct:cpu_post_cmpi_s	typeref:typename:ulong	file:
res	post/lib_powerpc/cr.c	/^    ulong res;$/;"	m	struct:cpu_post_cr_s3	typeref:typename:ulong	file:
res	post/lib_powerpc/cr.c	/^    ulong res;$/;"	m	struct:cpu_post_cr_s4	typeref:typename:ulong	file:
res	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^  unsigned int p1, p2, res;$/;"	m	struct:__anonba1e0a450108	typeref:typename:unsigned int	file:
res	post/lib_powerpc/rlwimi.c	/^    ulong res;$/;"	m	struct:cpu_post_rlwimi_s	typeref:typename:ulong	file:
res	post/lib_powerpc/rlwinm.c	/^    ulong res;$/;"	m	struct:cpu_post_rlwinm_s	typeref:typename:ulong	file:
res	post/lib_powerpc/rlwnm.c	/^    ulong res;$/;"	m	struct:cpu_post_rlwnm_s	typeref:typename:ulong	file:
res	post/lib_powerpc/srawi.c	/^    ulong res;$/;"	m	struct:cpu_post_srawi_s	typeref:typename:ulong	file:
res	post/lib_powerpc/three.c	/^    ulong res;$/;"	m	struct:cpu_post_three_s	typeref:typename:ulong	file:
res	post/lib_powerpc/threei.c	/^    ulong res;$/;"	m	struct:cpu_post_threei_s	typeref:typename:ulong	file:
res	post/lib_powerpc/threex.c	/^    ulong res;$/;"	m	struct:cpu_post_threex_s	typeref:typename:ulong	file:
res	post/lib_powerpc/two.c	/^    ulong res;$/;"	m	struct:cpu_post_two_s	typeref:typename:ulong	file:
res	post/lib_powerpc/twox.c	/^    ulong res;$/;"	m	struct:cpu_post_twox_s	typeref:typename:ulong	file:
res	tools/ublimage.h	/^	unsigned char	res[UBL_BLOCK_SIZE - 8 * 4];$/;"	m	struct:ubl_header	typeref:typename:unsigned char[]
res0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 res0;$/;"	m	struct:m3if_regs	typeref:typename:u32
res0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 res0[3];$/;"	m	struct:lcdc_regs	typeref:typename:u32[3]
res0	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	res0[0x1f1];$/;"	m	struct:iim_regs	typeref:typename:u32[0x1f1]
res0	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res0[0x10];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x10]
res0	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res0[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res0[0x40];		\/* 0x000 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x40]
res0	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res0[0x04];			\/* 0x0c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res0[0x08];			\/* 0x028 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u8[0x08]
res0	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res0[0x0c];			\/* 0x014 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x0c]
res0	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res0[0x58];			\/* 0x028 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x58]
res0	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res0[0x800];			\/* 0x000 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x800]
res0	arch/arm/include/asm/arch-sunxi/display2.h	/^	u8 res0[0x04];			\/* 0x0c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 res0[2];$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32[2]
res0	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 res0[61];$/;"	m	struct:sunxi_dma	typeref:typename:u32[61]
res0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res0[0x28];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x28]
res0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res0[0x04];		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res0[0x04];		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res0[0x14];		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x14]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res0[0x04];		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res0[0x08];		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res0[0x4];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res0[0x4];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res0[0x4];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^		u8 res0[0x2c];		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anonfa89721f0108	typeref:typename:u8[0x2c]
res0	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res0[0xc];		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0xc]
res0	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res0[0x04];		\/* 0x00 revision id ??? *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 res0[11];$/;"	m	struct:sunxi_mmc	typeref:typename:u32[11]
res0	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res0[0x8];		\/* 0x004 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x8]
res0	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u8 res0[8];	\/* 0x14 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u8[8]
res0	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res0[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res0[0x40];		\/* 0x000 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x40]
res0	arch/arm/include/asm/arch/display.h	/^	u8 res0[0x04];			\/* 0x0c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch/display.h	/^	u8 res0[0x08];			\/* 0x028 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u8[0x08]
res0	arch/arm/include/asm/arch/display.h	/^	u8 res0[0x0c];			\/* 0x014 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x0c]
res0	arch/arm/include/asm/arch/display.h	/^	u8 res0[0x58];			\/* 0x028 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x58]
res0	arch/arm/include/asm/arch/display.h	/^	u8 res0[0x800];			\/* 0x000 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x800]
res0	arch/arm/include/asm/arch/display2.h	/^	u8 res0[0x04];			\/* 0x0c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 res0[2];$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32[2]
res0	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 res0[61];$/;"	m	struct:sunxi_dma	typeref:typename:u32[61]
res0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res0[0x28];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x28]
res0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res0[0x04];		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res0[0x04];		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res0[0x14];		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x14]
res0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res0[0x04];		\/* 0x00 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res0[0x08];		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res0[0x4];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res0[0x4];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res0[0x4];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res0	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^		u8 res0[0x2c];		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg::__anon6b796e3b0108	typeref:typename:u8[0x2c]
res0	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res0[0xc];		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0xc]
res0	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res0[0x04];		\/* 0x00 revision id ??? *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x04]
res0	arch/arm/include/asm/arch/mmc.h	/^	u32 res0[11];$/;"	m	struct:sunxi_mmc	typeref:typename:u32[11]
res0	arch/arm/include/asm/arch/prcm.h	/^	u8 res0[0x8];		\/* 0x004 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x8]
res0	arch/arm/include/asm/arch/rsb.h	/^	u8 res0[8];	\/* 0x14 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u8[8]
res0	arch/arm/include/asm/omap_mmc.h	/^	unsigned char res0[0x100];$/;"	m	struct:hsmmc	typeref:typename:unsigned char[0x100]
res0	arch/m68k/include/asm/coldfire/eport.h	/^	u16 res0;	\/* 0x02 *\/$/;"	m	struct:eport	typeref:typename:u16
res0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res0[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res0	arch/m68k/include/asm/fsl_i2c.h	/^	u8 res0[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res0	arch/m68k/include/asm/immap_5227x.h	/^	u32 res0[0x700];	\/* 0x100 *\/$/;"	m	struct:canex_ctrl	typeref:typename:u32[0x700]
res0	arch/powerpc/include/asm/8xx_immap.h	/^	char	res0[0x02];$/;"	m	struct:sys_int_timers	typeref:typename:char[0x02]
res0	arch/powerpc/include/asm/fsl_dma.h	/^	char	res0[4];$/;"	m	struct:fsl_dma	typeref:typename:char[4]
res0	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 res0[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u32 res0[0xF];$/;"	m	struct:ddr512x	typeref:typename:u32[0xF]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8			res0[0x700];$/;"	m	struct:immap	typeref:typename:u8[0x700]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8	res0[0xc8];$/;"	m	struct:lpc512x	typeref:typename:u8[0xc8]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[0x08];$/;"	m	struct:iim512x	typeref:typename:u8[0x08]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[0x0C];$/;"	m	struct:i2c512x_dev	typeref:typename:u8[0x0C]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[0x1c];$/;"	m	struct:sysconf512x	typeref:typename:u8[0x1c]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[0x60];$/;"	m	struct:ios512x	typeref:typename:u8[0x60]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[0x98];$/;"	m	struct:i2c512x	typeref:typename:u8[0x98]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[0xE4];$/;"	m	struct:gpio512x	typeref:typename:u8[0xE4]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[12];$/;"	m	struct:pcictrl512x	typeref:typename:u8[12]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[4];$/;"	m	struct:clk512x	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[4];$/;"	m	struct:pci_outbound_window	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[4];$/;"	m	struct:wdt512x	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_512x.h	/^	u8 res0[8];$/;"	m	struct:reset512x	typeref:typename:u8[8]
res0	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res0[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res0	arch/powerpc/include/asm/immap_8260.h	/^	char	res0[24];$/;"	m	struct:sdma_csr	typeref:typename:char[24]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 res0[0xC];		\/* 0x0-0x29 reseverd *\/$/;"	m	struct:dma83xx	typeref:typename:u32[0xC]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res0[0x1200];$/;"	m	struct:immap	typeref:typename:u8[0x1200]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res0[0x1300];$/;"	m	struct:immap	typeref:typename:u8[0x1300]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res0[0x200];$/;"	m	struct:immap	typeref:typename:u8[0x200]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res0[0x300];$/;"	m	struct:immap	typeref:typename:u8[0x300]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res0[0x500];	\/* res0 1.25 KBytes added for 8309 *\/$/;"	m	struct:immap	typeref:typename:u8[0x500]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0x04];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0x04]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0x30];$/;"	m	struct:pex83xx	typeref:typename:u8[0x30]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0x358];$/;"	m	struct:qegpio83xx	typeref:typename:u8[0x358]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0x38];$/;"	m	struct:qesba83xx	typeref:typename:u8[0x38]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0x60];$/;"	m	struct:ddr83xx	typeref:typename:u8[0x60]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0x60];$/;"	m	struct:ios83xx	typeref:typename:u8[0x60]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0xC];$/;"	m	struct:qepi83xx	typeref:typename:u8[0xC]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0xE8];$/;"	m	struct:gpio83xx	typeref:typename:u8[0xE8]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0xE8];$/;"	m	struct:rtclk83xx	typeref:typename:u8[0xE8]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0xEC];$/;"	m	struct:pmc83xx	typeref:typename:u8[0xEC]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0xF4];$/;"	m	struct:clk83xx	typeref:typename:u8[0xF4]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[0xc];$/;"	m	struct:serdes83xx	typeref:typename:u8[0xc]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[12];$/;"	m	struct:pcictrl83xx	typeref:typename:u8[12]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[3];$/;"	m	struct:gtm83xx	typeref:typename:u8[3]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[4];$/;"	m	struct:ddr_cs_bnds	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[4];$/;"	m	struct:pci_outbound_window	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[4];$/;"	m	struct:wdt83xx	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[8];$/;"	m	struct:duart83xx	typeref:typename:u8[8]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[8];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[8]
res0	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res0[8];$/;"	m	struct:reset83xx	typeref:typename:u8[8]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[0x200];$/;"	m	struct:ccsr_qman	typeref:typename:u8[0x200]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[0x543];$/;"	m	struct:ccsr_raide	typeref:typename:u8[0x543]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[0x804];$/;"	m	struct:ccsr_pme	typeref:typename:u8[0x804]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[0xf64];$/;"	m	struct:ccsr_rman	typeref:typename:u8[0xf64]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[12];$/;"	m	struct:rio_lp_serial_port	typeref:typename:u8[12]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[12];$/;"	m	struct:rio_phys_err_port	typeref:typename:u8[12]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[144];$/;"	m	struct:ccsr_rio	typeref:typename:u8[144]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[16];$/;"	m	struct:rio_dbell	typeref:typename:u8[16]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[28];$/;"	m	struct:rio_impl_port_spec	typeref:typename:u8[28]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[28];$/;"	m	struct:rio_liodn	typeref:typename:u8[28]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[28];$/;"	m	struct:rio_lp_serial	typeref:typename:u8[28]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[40];$/;"	m	struct:rio_msg	typeref:typename:u8[40]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[4];$/;"	m	struct:rio_arch	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[4];$/;"	m	struct:rio_atmu_riw	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[4];$/;"	m	struct:rio_atmu_row	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[4];$/;"	m	struct:rio_impl_common	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[4];$/;"	m	struct:rio_logical_err	typeref:typename:u8[4]
res0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0[64];$/;"	m	struct:rio_atmu_win	typeref:typename:u8[64]
res0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	res0;$/;"	m	struct:ccsr_wdt	typeref:typename:uint
res0	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u8 res0[0x20];	\/* 0x0-0x01f reserved *\/$/;"	m	struct:spi8xxx	typeref:typename:u8[0x20]
res0	board/freescale/p2041rdb/cpld.h	/^	u8 res0;		\/* 0x4 - not used *\/$/;"	m	struct:cpld_data	typeref:typename:u8
res0	board/freescale/t102xrdb/cpld.h	/^	u8 res0[12];		\/* 0x04 - 0x0F - not used *\/$/;"	m	struct:cpld_data	typeref:typename:u8[12]
res0	board/freescale/t104xrdb/cpld.h	/^	u8 res0[12];		\/* 0x04 - 0x0F - not used *\/$/;"	m	struct:cpld_data	typeref:typename:u8[12]
res0	board/freescale/t208xrdb/cpld.h	/^	u8 res0[12];		\/* 0x04 - 0x0F - not used *\/$/;"	m	struct:cpld_data	typeref:typename:u8[12]
res0	board/freescale/t4rdb/cpld.h	/^	u8 res0;	\/* 0x07 - not used *\/$/;"	m	struct:cpld_data	typeref:typename:u8
res0	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 res0[12];         \/* 0x0C: reserved *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[12]
res0	drivers/net/fec_mxc.h	/^	uint32_t res0[1];		\/* MBAR_ETH + 0x000 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[1]
res0	drivers/net/fm/fm.h	/^	u16 res0;$/;"	m	struct:fm_port_qd	typeref:typename:u16
res0	drivers/net/fm/fm.h	/^	u32 res0;$/;"	m	struct:fm_port_bd	typeref:typename:u32
res0	drivers/net/fm/fm.h	/^	u32 res0[0x4];$/;"	m	struct:fm_port_global_pram	typeref:typename:u32[0x4]
res0	drivers/qe/uec.h	/^	u32  res0[0x1];$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32[0x1]
res0	drivers/qe/uec.h	/^	u8                         res0[0x40-0x38];$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:u8[]
res0	drivers/qe/uec.h	/^	u8     res0[0x8];$/;"	m	struct:uec_send_queue_qd	typeref:typename:u8[0x8]
res0	drivers/qe/uec.h	/^	u8    res0[0x8];$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u8[0x8]
res0	drivers/qe/uec.h	/^	u8   res0[0x38-0x02];$/;"	m	struct:uec_tx_global_pram	typeref:typename:u8[]
res0	drivers/qe/uec.h	/^	u8   res0[128];$/;"	m	struct:uec_thread_rx_pram	typeref:typename:u8[128]
res0	drivers/qe/uec.h	/^	u8   res0[136];$/;"	m	struct:uec_thread_data_tx	typeref:typename:u8[136]
res0	drivers/qe/uec.h	/^	u8   res0[1];$/;"	m	struct:uec_scheduler	typeref:typename:u8[1]
res0	drivers/qe/uec.h	/^	u8   res0[40];$/;"	m	struct:uec_thread_data_rx	typeref:typename:u8[40]
res0	drivers/qe/uec.h	/^	u8   res0[64];$/;"	m	struct:uec_thread_tx_pram	typeref:typename:u8[64]
res0	include/fsl_dtsec.h	/^	u32	res0;$/;"	m	struct:dtsec	typeref:typename:u32
res0	include/fsl_fman.h	/^	u32	res0;$/;"	m	struct:fm_fpm	typeref:typename:u32
res0	include/fsl_fman.h	/^	u32	res0;$/;"	m	struct:fm_qmi_common	typeref:typename:u32
res0	include/fsl_fman.h	/^	u32	res0[0x5];$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x5]
res0	include/fsl_fman.h	/^	u32	res0[0xb];$/;"	m	struct:fm_dma	typeref:typename:u32[0xb]
res0	include/fsl_fman.h	/^	u32 res0[0x73];$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32[0x73]
res0	include/fsl_fman.h	/^	u8			res0[2048];$/;"	m	struct:ccsr_fman	typeref:typename:u8[2048]
res0	include/fsl_fman.h	/^	u8	res0[0x120];$/;"	m	struct:fm_mdio	typeref:typename:u8[0x120]
res0	include/fsl_memac.h	/^	u32	res0[0xc];$/;"	m	struct:memac_mdio_controller	typeref:typename:u32[0xc]
res0	include/fsl_sec.h	/^	u32	res0;$/;"	m	struct:ccsr_sec	typeref:typename:u32
res0	include/fsl_tgec.h	/^	u32	res0;$/;"	m	struct:tgec	typeref:typename:u32
res0	include/fsl_tgec.h	/^	u32	res0[0xc];$/;"	m	struct:tgec_mdio_controller	typeref:typename:u32[0xc]
res0	include/linux/immap_qe.h	/^	u8 res0[0x10];$/;"	m	struct:sdma	typeref:typename:u8[0x10]
res0	include/linux/immap_qe.h	/^	u8 res0[0x1C];$/;"	m	struct:qe_mux	typeref:typename:u8[0x1C]
res0	include/linux/immap_qe.h	/^	u8 res0[0x1];$/;"	m	struct:si1	typeref:typename:u8[0x1]
res0	include/linux/immap_qe.h	/^	u8 res0[0x20];$/;"	m	struct:spi	typeref:typename:u8[0x20]
res0	include/linux/immap_qe.h	/^	u8 res0[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res0	include/linux/immap_qe.h	/^	u8 res0[0x2];$/;"	m	struct:ucc_slow	typeref:typename:u8[0x2]
res0	include/linux/immap_qe.h	/^	u8 res0[0x3];$/;"	m	struct:qe_timers	typeref:typename:u8[0x3]
res0	include/linux/immap_qe.h	/^	u8 res0[0x40];$/;"	m	struct:qe_brg	typeref:typename:u8[0x40]
res0	include/linux/immap_qe.h	/^	u8 res0[0x4];$/;"	m	struct:qe_ic	typeref:typename:u8[0x4]
res0	include/linux/immap_qe.h	/^	u8 res0[0x4];$/;"	m	struct:qe_iram	typeref:typename:u8[0x4]
res0	include/linux/immap_qe.h	/^	u8 res0[0x800];$/;"	m	struct:sir	typeref:typename:u8[0x800]
res0	include/linux/immap_qe.h	/^	u8 res0[0x8];$/;"	m	struct:dbg	typeref:typename:u8[0x8]
res0	include/linux/immap_qe.h	/^	u8 res0[0xA];$/;"	m	struct:cp_qe	typeref:typename:u8[0xA]
res0	include/linux/immap_qe.h	/^	u8 res0[0xC];$/;"	m	struct:upc	typeref:typename:u8[0xC]
res0	include/linux/immap_qe.h	/^	u8 res0[0xF0];$/;"	m	struct:mcc	typeref:typename:u8[0xF0]
res0	include/linux/immap_qe.h	/^	u8 res0[64];$/;"	m	struct:rsp	typeref:typename:u8[64]
res000	include/tsec.h	/^	u32	res000[4];$/;"	m	struct:tsec	typeref:typename:u32[4]
res000c	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res000c[52];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[52]
res0044	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res0044[2996];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[2996]
res01	arch/m68k/include/asm/immap_520x.h	/^	u8 res01[3];		\/* 0x9 - 0x0B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res01	arch/m68k/include/asm/immap_5301x.h	/^	u8 res01;		\/* 0x04 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res01c	include/tsec.h	/^	u32	res01c;$/;"	m	struct:tsec	typeref:typename:u32
res02	arch/m68k/include/asm/immap_520x.h	/^	u8 res02[5];		\/* 0x15 - 0x19 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[5]
res02	arch/m68k/include/asm/immap_5301x.h	/^	u8 res02[2];		\/* 0x07 - 0x08 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
res03	arch/m68k/include/asm/immap_520x.h	/^	u8 res03[3];		\/* 0x21 - 0x23 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res03	arch/m68k/include/asm/immap_5301x.h	/^	u8 res03;		\/* 0x0E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res034	include/tsec.h	/^	u32	res034[3];$/;"	m	struct:tsec	typeref:typename:u32[3]
res04	arch/m68k/include/asm/immap_520x.h	/^	u8 res04[3];		\/* 0x2D - 0x2F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res04	arch/m68k/include/asm/immap_5301x.h	/^	u8 res04[3];		\/* 0x11 - 0x13 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res040	include/tsec.h	/^	u32	res040[48];$/;"	m	struct:tsec	typeref:typename:u32[48]
res05	arch/m68k/include/asm/immap_5301x.h	/^	u8 res05;		\/* 0x18 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res06	arch/m68k/include/asm/immap_5301x.h	/^	u8 res06[2];		\/* 0x1B - 0x1C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
res07	arch/m68k/include/asm/immap_5301x.h	/^	u8 res07;		\/* 0x22 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res08	arch/m68k/include/asm/immap_5301x.h	/^	u8 res08[3];		\/* 0x25 - 0x27 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res08	arch/m68k/include/asm/immap_5329.h	/^	u8 res08;		\/* 0x08 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res09	arch/m68k/include/asm/immap_5301x.h	/^	u8 res09;		\/* 0x2C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res0C	arch/m68k/include/asm/immap_5329.h	/^	u16 res0C;		\/* 0x0C - 0x0D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res0C	arch/m68k/include/asm/immap_5329.h	/^	u8 res0C;		\/* 0x0C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned char res1[12];$/;"	m	struct:gptimer	typeref:typename:unsigned char[12]
res1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short res1;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
res1	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res1;$/;"	m	struct:i2c	typeref:typename:unsigned short
res1	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 res1[0x006];$/;"	m	struct:sysctrl	typeref:typename:u32[0x006]
res1	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 res1[0x2F9];$/;"	m	struct:wdt	typeref:typename:u32[0x2F9]
res1	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 res1[0xa4\/4];	\/* 0x0 - 0xa4 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32[]
res1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 res1[0xa4\/4];	\/* 0x0 - 0xa4 *\/$/;"	m	struct:ccsr_ahci	typeref:typename:u32[]
res1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 res1[0x1f1];$/;"	m	struct:iim_regs	typeref:typename:u32[0x1f1]
res1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 res1[5];$/;"	m	struct:lcdc_regs	typeref:typename:u32[5]
res1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 res1;$/;"	m	struct:system_control_regs	typeref:typename:u32
res1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 res1[0x1f1];$/;"	m	struct:iim_regs	typeref:typename:u32[0x1f1]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[17];$/;"	m	struct:mx6ul_iomux_ddr_regs	typeref:typename:u32[17]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[18];$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32[18]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[18];$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32[18]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[25];$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32[25]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[2];$/;"	m	struct:mmdc_p_regs	typeref:typename:u32[2]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[36];$/;"	m	struct:mx6ul_iomux_grp_regs	typeref:typename:u32[36]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[3];$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32[3]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[43];$/;"	m	struct:mx6sl_iomux_grp_regs	typeref:typename:u32[43]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[59];$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32[59]
res1	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res1[61];$/;"	m	struct:mx6sx_iomux_grp_regs	typeref:typename:u32[61]
res1	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 res1[0xC4];		\/* 0x000 - 0x30C *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32[0xC4]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x10];$/;"	m	struct:sdrc	typeref:typename:u8[0x10]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x10];$/;"	m	struct:sms	typeref:typename:u8[0x10]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x1c];$/;"	m	struct:prcm	typeref:typename:u8[0x1c]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x34];$/;"	m	struct:watchdog	typeref:typename:u8[0x34]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x48];$/;"	m	struct:pm	typeref:typename:u8[0x48]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x4];$/;"	m	struct:ctrl_id	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x4];$/;"	m	struct:dma4	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0x4];$/;"	m	struct:sdrc_cs	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0xC0];$/;"	m	struct:ctrl	typeref:typename:u8[0xC0]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res1[0xd40];$/;"	m	struct:prm	typeref:typename:u8[0xd40]
res1	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int res1;$/;"	m	struct:emif4	typeref:typename:unsigned int
res1	arch/arm/include/asm/arch-omap3/dss.h	/^	u8 res1[12];				\/* 0x04 *\/$/;"	m	struct:dispc_regs	typeref:typename:u8[12]
res1	arch/arm/include/asm/arch-omap3/dss.h	/^	u8 res1[12];				\/* 0x04 *\/$/;"	m	struct:dss_regs	typeref:typename:u8[12]
res1	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res1;$/;"	m	struct:i2c	typeref:typename:unsigned short
res1	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned char res1[0x274];	\/* 0x000 *\/$/;"	m	struct:t2	typeref:typename:unsigned char[0x274]
res1	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char res1[0x34];$/;"	m	struct:gpio	typeref:typename:unsigned char[0x34]
res1	arch/arm/include/asm/arch-omap4/cpu.h	/^	u8 res1[0x34];$/;"	m	struct:watchdog	typeref:typename:u8[0x34]
res1	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res1;$/;"	m	struct:i2c	typeref:typename:unsigned short
res1	arch/arm/include/asm/arch-omap5/cpu.h	/^	u8 res1[0x34];$/;"	m	struct:watchdog	typeref:typename:u8[0x34]
res1	arch/arm/include/asm/arch-omap5/cpu.h	/^	u8 res1[0xc];$/;"	m	struct:gptimer	typeref:typename:u8[0xc]
res1	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res1;$/;"	m	struct:i2c	typeref:typename:unsigned short
res1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res1[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res1;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res1[2];$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32[2]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res1[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res1[3];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[3]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res1[3];$/;"	m	struct:s3c24x0_uart	typeref:typename:u8[3]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res1[3];$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8[3]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res1[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res1[67];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[67]
res1	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res1[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res1[0x44];		\/* 0x140 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x44]
res1	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res1[0x04];			\/* 0x03c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res1	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res1[0x4];			\/* 0x80c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res1[0x4c];			\/* 0x094 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x4c]
res1	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res1[0xb0];			\/* 0x050 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u8[0xb0]
res1	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res1[4];			\/* 0x3c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[4]
res1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u8 res1[4];			\/* 0x3c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[4]
res1	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 res1;$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
res1	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 res1[64];$/;"	m	struct:sunxi_dma	typeref:typename:u32[64]
res1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res1[0x8];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res1[0x1c];		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x1c]
res1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res1[0x34];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x34]
res1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res1[0x60];		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x60]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res1[0x04];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res1[0x4];		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res1[0x70];		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x70]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res1[0x14];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res1[0x14];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res1[0x14];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res1	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res1[0x8];		\/* 0xb8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res1[0x1c];		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x1c]
res1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res1[0x8];		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res1[0xc8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0xc8]
res1	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 res1[26];$/;"	m	struct:sunxi_mmc	typeref:typename:u32[26]
res1	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res1[0x8];		\/* 0x020 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u8 res1[4];	\/* 0x20 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u8[4]
res1	arch/arm/include/asm/arch-sunxi/timer.h	/^	u8 res1[8];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[8]
res1	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 res1[2];$/;"	m	struct:sunxi_wdog	typeref:typename:u32[2]
res1	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	res1[2];	\/* _RESERVED 31:16 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char[2]
res1	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res1[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res1[0x44];		\/* 0x140 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x44]
res1	arch/arm/include/asm/arch/display.h	/^	u8 res1[0x04];			\/* 0x03c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res1	arch/arm/include/asm/arch/display.h	/^	u8 res1[0x4];			\/* 0x80c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch/display.h	/^	u8 res1[0x4c];			\/* 0x094 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x4c]
res1	arch/arm/include/asm/arch/display.h	/^	u8 res1[0xb0];			\/* 0x050 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u8[0xb0]
res1	arch/arm/include/asm/arch/display.h	/^	u8 res1[4];			\/* 0x3c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[4]
res1	arch/arm/include/asm/arch/display2.h	/^	u8 res1[4];			\/* 0x3c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[4]
res1	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 res1;$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
res1	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 res1[64];$/;"	m	struct:sunxi_dma	typeref:typename:u32[64]
res1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res1[0x8];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res1[0x1c];		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x1c]
res1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res1[0x34];		\/* 0x0c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x34]
res1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res1[0x60];		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x60]
res1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res1[0x04];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res1[0x4];		\/* 0x98 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res1[0x70];		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x70]
res1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res1[0x14];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res1[0x14];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res1	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res1[0x14];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res1	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res1[0x8];		\/* 0xb8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res1[0x1c];		\/* 0x14 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x1c]
res1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res1[0x8];		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res1[0xc8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0xc8]
res1	arch/arm/include/asm/arch/mmc.h	/^	u32 res1[26];$/;"	m	struct:sunxi_mmc	typeref:typename:u32[26]
res1	arch/arm/include/asm/arch/prcm.h	/^	u8 res1[0x8];		\/* 0x020 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x8]
res1	arch/arm/include/asm/arch/rsb.h	/^	u8 res1[4];	\/* 0x20 *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u8[4]
res1	arch/arm/include/asm/arch/timer.h	/^	u8 res1[8];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[8]
res1	arch/arm/include/asm/arch/watchdog.h	/^	u32 res1[2];$/;"	m	struct:sunxi_wdog	typeref:typename:u32[2]
res1	arch/arm/include/asm/omap_mmc.h	/^	unsigned char res1[0x10];$/;"	m	struct:hsmmc	typeref:typename:unsigned char[0x10]
res1	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	res1[7];\/* 0x0024 - 0x003C Reserved *\/$/;"	m	struct:at91_dbu	typeref:typename:u32[7]
res1	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 res1[20];	\/* 0x100 ~ 0x14c *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[20]
res1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res1[0x4200];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x4200]
res1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res1[0x4200];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4200]
res1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res1[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res1[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res1[0x4];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0x4]
res1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res1[0x8];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x8]
res1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res1[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res1[0xf00];$/;"	m	struct:exynos5420_tzasc	typeref:typename:unsigned char[0xf00]
res1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res1[4];$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned char[4]
res1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res1[0x10];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x10]
res1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
res1	arch/arm/mach-exynos/include/mach/gpio.h	/^	unsigned char	res1[8];$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned char[8]
res1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res1[0x0704];$/;"	m	struct:exynos4412_power	typeref:typename:unsigned char[0x0704]
res1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res1[0x10];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x10]
res1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res1[0x18];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x18]
res1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res1[0x8];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x8]
res1	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned char	res1[0x210];$/;"	m	struct:exynos4_sysreg	typeref:typename:unsigned char[0x210]
res1	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned char	res1[0x214];$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned char[0x214]
res1	arch/arm/mach-exynos/include/mach/tzpc.h	/^	char res1[0x7FC];$/;"	m	struct:exynos_tzpc	typeref:typename:char[0x7FC]
res1	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned char	res1[3];$/;"	m	struct:s5p_uart	typeref:typename:unsigned char[3]
res1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res1[0x4];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0x4]
res1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res1[0xf0];$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned char[0xf0]
res1	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^	unsigned char	res1[8];$/;"	m	struct:s5p_gpio_bank	typeref:typename:unsigned char[8]
res1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	res1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
res1	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned char	res1[3];$/;"	m	struct:s5p_uart	typeref:typename:unsigned char[3]
res1	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res1[3];		\/* 0x104 - 0F *\/$/;"	m	struct:xbs	typeref:typename:u32[3]
res1	arch/m68k/include/asm/coldfire/edma.h	/^	u16 res1[3];		\/* 0x08 - 0x0D *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16[3]
res1	arch/m68k/include/asm/coldfire/eport.h	/^	u16 res1;	\/* 0x06 *\/$/;"	m	struct:eport	typeref:typename:u16
res1	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res1;$/;"	m	struct:fbcs	typeref:typename:u16
res1	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 res1;		\/* 0x0C *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
res1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 res1;		\/* 0x18 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u16
res1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 res1;		\/* 0x18 - 0x19 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u16
res1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 res1[19];		\/* 0x1a - 0x3c *\/$/;"	m	struct:int0_ctrl	typeref:typename:u16[19]
res1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 res1[19];		\/* 0x1a - 0x3c *\/$/;"	m	struct:int1_ctrl	typeref:typename:u16[19]
res1	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 res1[3];		\/* 0x24 - 0x2F *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32[3]
res1	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 res1[3];$/;"	m	struct:pwm_ctrl	typeref:typename:u8[3]
res1	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 res1;$/;"	m	struct:qspi_ctrl	typeref:typename:u16
res1	arch/m68k/include/asm/coldfire/skha.h	/^	u32 res1[2];		\/* 0x28 - 0x2F *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32[2]
res1	arch/m68k/include/asm/fsl_i2c.h	/^	u8 res1[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res1	arch/m68k/include/asm/immap_520x.h	/^	u16 res1;		\/* 0x02 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
res1	arch/m68k/include/asm/immap_520x.h	/^	u32 res1[64];		\/* 0x10 - 0x10F *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32[64]
res1	arch/m68k/include/asm/immap_5227x.h	/^	u8 res1[3];		\/* 0x00 - 0x02 *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u8[3]
res1	arch/m68k/include/asm/immap_5235.h	/^	u16 res1;		\/* 0x03 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
res1	arch/m68k/include/asm/immap_5235.h	/^	u16 res1[3];		\/* 0x02 - 0x07 *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u16[3]
res1	arch/m68k/include/asm/immap_5235.h	/^	u32 res1;		\/* 0x04 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
res1	arch/m68k/include/asm/immap_5235.h	/^	u8 res1[3];		\/* 0x0D - 0x0F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res1	arch/m68k/include/asm/immap_5272.h	/^	char res1[2];$/;"	m	struct:sys_ctrl	typeref:typename:char[2]
res1	arch/m68k/include/asm/immap_5272.h	/^	uchar res1[2];$/;"	m	struct:dma_ctrl	typeref:typename:uchar[2]
res1	arch/m68k/include/asm/immap_5272.h	/^	uchar res1[2];$/;"	m	struct:sdram_ctrl	typeref:typename:uchar[2]
res1	arch/m68k/include/asm/immap_5272.h	/^	uchar res1[3];$/;"	m	struct:int_ctrl	typeref:typename:uchar[3]
res1	arch/m68k/include/asm/immap_5272.h	/^	uchar res1[4];$/;"	m	struct:gpio_ctrl	typeref:typename:uchar[4]
res1	arch/m68k/include/asm/immap_5272.h	/^	uchar res1[4];$/;"	m	struct:plic_ctrl	typeref:typename:uchar[4]
res1	arch/m68k/include/asm/immap_5272.h	/^	ushort res1;$/;"	m	struct:usb	typeref:typename:ushort
res1	arch/m68k/include/asm/immap_5272.h	/^	ushort res1;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
res1	arch/m68k/include/asm/immap_5275.h	/^	u16 res1;$/;"	m	struct:usb	typeref:typename:u16
res1	arch/m68k/include/asm/immap_5275.h	/^	u32 res1;$/;"	m	struct:sys_ctrl	typeref:typename:u32
res1	arch/m68k/include/asm/immap_5282.h	/^	u32 res1;$/;"	m	struct:scm_ctrl	typeref:typename:u32
res1	arch/m68k/include/asm/immap_5301x.h	/^	u16 res1;		\/* 0x02 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
res1	arch/m68k/include/asm/immap_5301x.h	/^	u32 res1[64];		\/* 0x10 - 0x10F *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32[64]
res1	arch/m68k/include/asm/immap_5301x.h	/^	u8 res1[2];		\/* 0x06 - 0x07 *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8[2]
res1	arch/m68k/include/asm/immap_5307.h	/^	u16 res1;$/;"	m	struct:csm	typeref:typename:u16
res1	arch/m68k/include/asm/immap_5307.h	/^	u16 res1;$/;"	m	struct:gpio	typeref:typename:u16
res1	arch/m68k/include/asm/immap_5307.h	/^	u16 res1;$/;"	m	struct:sdramctrl	typeref:typename:u16
res1	arch/m68k/include/asm/immap_5307.h	/^	u8  res1;$/;"	m	struct:sim	typeref:typename:u8
res1	arch/m68k/include/asm/immap_5329.h	/^	u32 res1[15];		\/* 0x04 - 0x3F *\/$/;"	m	struct:scm1_ctrl	typeref:typename:u32[15]
res1	arch/m68k/include/asm/immap_5329.h	/^	u32 res1[58];		\/* 0x18 - 0xFF *\/$/;"	m	struct:usb_otg	typeref:typename:u32[58]
res1	arch/m68k/include/asm/immap_5329.h	/^	u32 res1[64];		\/* 0x10 - 0x10F *\/$/;"	m	struct:sdram_ctrl	typeref:typename:u32[64]
res1	arch/m68k/include/asm/immap_5329.h	/^	u32 res1[7];		\/* 0x04 - 0x1F *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32[7]
res1	arch/m68k/include/asm/immap_5329.h	/^	u8 res1[19];		\/* 0x00 - 0x12 *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8[19]
res1	arch/m68k/include/asm/immap_5329.h	/^	u8 res1[3];$/;"	m	struct:pll_ctrl	typeref:typename:u8[3]
res1	arch/m68k/include/asm/timer.h	/^	u16 res1;		\/* 0x02 *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
res1	arch/powerpc/cpu/mpc8xx/video.c	/^			res1:6,		\/* Reserved *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:6	file:
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char	res1[1140];$/;"	m	struct:cark	typeref:typename:char[1140]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char               res1[262144];	\/* CMF Flash A 256 Kbytes *\/$/;"	m	struct:immap	typeref:typename:char[262144]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char   res1[208];$/;"	m	struct:tpu	typeref:typename:char[208]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char   res1[2];$/;"	m	struct:qsmcm	typeref:typename:char[2]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char   res1[492];$/;"	m	struct:qadc	typeref:typename:char[492]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[108];$/;"	m	struct:clk_and_reset	typeref:typename:char[108]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[12];$/;"	m	struct:uimb	typeref:typename:char[12]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[16];$/;"	m	struct:mios	typeref:typename:char[16]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[16];$/;"	m	struct:sitk	typeref:typename:char[16]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[2];$/;"	m	struct:sys_int_timers	typeref:typename:char[2]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[32];$/;"	m	struct:mem_ctlr	typeref:typename:char[32]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[4];$/;"	m	struct:tcan	typeref:typename:char[4]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[52];$/;"	m	struct:fl	typeref:typename:char[52]
res1	arch/powerpc/include/asm/5xx_immap.h	/^	char res1[6];$/;"	m	struct:sys_conf	typeref:typename:char[6]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[0x10];$/;"	m	struct:sitk	typeref:typename:char[0x10]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[0x14];$/;"	m	struct:sys_int_timers	typeref:typename:char[0x14]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[0x20];$/;"	m	struct:pcmcia_conf	typeref:typename:char[0x20]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[0x24];$/;"	m	struct:mem_ctlr	typeref:typename:char[0x24]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[0xe];$/;"	m	struct:cpm_timers	typeref:typename:char[0xe]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[2];$/;"	m	struct:scc	typeref:typename:char[2]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[2];$/;"	m	struct:smc	typeref:typename:char[2]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[2];$/;"	m	struct:sys_conf	typeref:typename:char[2]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[4];$/;"	m	struct:lcd	typeref:typename:char[4]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[4];$/;"	m	struct:sdma_csr	typeref:typename:char[4]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	char	res1[8];$/;"	m	struct:io_port	typeref:typename:char[8]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res1[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	res1;			\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:ushort
res1	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	res1;$/;"	m	struct:vid823	typeref:typename:ushort
res1	arch/powerpc/include/asm/fsl_dma.h	/^	char	res1[4];$/;"	m	struct:fsl_dma	typeref:typename:char[4]
res1	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 res1[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res1	arch/powerpc/include/asm/fsl_lbc.h	/^	u8	res1[40];$/;"	m	struct:fsl_lbc	typeref:typename:u8[40]
res1	arch/powerpc/include/asm/fsl_pci.h	/^	u32	res1;$/;"	m	struct:pci_inbound_window	typeref:typename:u32
res1	arch/powerpc/include/asm/fsl_pci.h	/^	u32	res1;$/;"	m	struct:pci_outbound_window	typeref:typename:u32
res1	arch/powerpc/include/asm/immap_512x.h	/^	u32 res1[0x1A];$/;"	m	struct:pata512x	typeref:typename:u32[0x1A]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u32 res1[2];$/;"	m	struct:ddr512x	typeref:typename:u32[2]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8			res1[0x100];$/;"	m	struct:immap	typeref:typename:u8[0x100]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8	res1[0x1c];$/;"	m	struct:lpc512x	typeref:typename:u8[0x1c]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[0x10];$/;"	m	struct:iim512x	typeref:typename:u8[0x10]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[0x1c];$/;"	m	struct:sysconf512x	typeref:typename:u8[0x1c]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[0x98];$/;"	m	struct:clk512x	typeref:typename:u8[0x98]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[0xDC];$/;"	m	struct:arbiter512x	typeref:typename:u8[0xDC]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[0xDC];$/;"	m	struct:reset512x	typeref:typename:u8[0xDC]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[2];$/;"	m	struct:wdt512x	typeref:typename:u8[2]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[4];$/;"	m	struct:ios512x	typeref:typename:u8[4]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[4];$/;"	m	struct:pci_outbound_window	typeref:typename:u8[4]
res1	arch/powerpc/include/asm/immap_512x.h	/^	u8 res1[4];$/;"	m	struct:pcictrl512x	typeref:typename:u8[4]
res1	arch/powerpc/include/asm/immap_512x.h	/^	volatile u16	res1;$/;"	m	struct:psc512x	typeref:typename:volatile u16
res1	arch/powerpc/include/asm/immap_8260.h	/^			char		res1[16 * 1024];$/;"	m	struct:immap::__anondc7ba4bd010a::__anondc7ba4bd0208	typeref:typename:char[]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1;$/;"	m	struct:cpmux	typeref:typename:char
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1;$/;"	m	struct:siram	typeref:typename:char
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[12];$/;"	m	struct:io_port	typeref:typename:char[12]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[12];$/;"	m	struct:tclayer	typeref:typename:char[12]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[14];$/;"	m	struct:comm_proc	typeref:typename:char[14]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[15];$/;"	m	struct:fcc_c	typeref:typename:char[15]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[2];$/;"	m	struct:fcc	typeref:typename:char[2]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[2];$/;"	m	struct:interrupt_controller	typeref:typename:char[2]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[2];$/;"	m	struct:mcc	typeref:typename:char[2]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[2];$/;"	m	struct:scc	typeref:typename:char[2]
res1	arch/powerpc/include/asm/immap_8260.h	/^	char	res1[2];$/;"	m	struct:smc	typeref:typename:char[2]
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res1	include/fsl_fman.h	/^	u32	res1[0x5];$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x5]
res1	include/fsl_fman.h	/^	u32	res1[0xc];$/;"	m	struct:fm_qmi_common	typeref:typename:u32[0xc]
res1	include/fsl_fman.h	/^	u32 res1[0x1a];$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32[0x1a]
res1	include/fsl_fman.h	/^	u32 res1[0x2];$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x2]
res1	include/fsl_fman.h	/^	u8			res1[8*1024];$/;"	m	struct:ccsr_fman	typeref:typename:u8[]
res1	include/fsl_fman.h	/^	u8	res1[0x1000 - 0x138];$/;"	m	struct:fm_mdio	typeref:typename:u8[]
res1	include/fsl_ifc.h	/^	u32 res1[0x2];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32[0x2]
res1	include/fsl_ifc.h	/^	u32 res1[0x2];$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32[0x2]
res1	include/fsl_ifc.h	/^	u32 res1[0x2];$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32[0x2]
res1	include/fsl_ifc.h	/^	u32 res1[0x4];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x4]
res1	include/fsl_mmdc.h	/^	u32 res1[2];$/;"	m	struct:mmdc_regs	typeref:typename:u32[2]
res1	include/fsl_sec.h	/^	u8	res1[0x4];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x4]
res1	include/fsl_tgec.h	/^	u32	res1[4];$/;"	m	struct:tgec	typeref:typename:u32[4]
res1	include/linux/immap_qe.h	/^	u8 res1[0x10];$/;"	m	struct:ucc_ethernet	typeref:typename:u8[0x10]
res1	include/linux/immap_qe.h	/^	u8 res1[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res1	include/linux/immap_qe.h	/^	u8 res1[0x2];$/;"	m	struct:spi	typeref:typename:u8[0x2]
res1	include/linux/immap_qe.h	/^	u8 res1[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res1	include/linux/immap_qe.h	/^	u8 res1[0x2];$/;"	m	struct:ucc_slow	typeref:typename:u8[0x2]
res1	include/linux/immap_qe.h	/^	u8 res1[0x4];$/;"	m	struct:qe_ic	typeref:typename:u8[0x4]
res1	include/linux/immap_qe.h	/^	u8 res1[0x4];$/;"	m	struct:sdma	typeref:typename:u8[0x4]
res1	include/linux/immap_qe.h	/^	u8 res1[0x70];$/;"	m	struct:qe_iram	typeref:typename:u8[0x70]
res1	include/linux/immap_qe.h	/^	u8 res1[0x8];$/;"	m	struct:dbg	typeref:typename:u8[0x8]
res1	include/linux/immap_qe.h	/^	u8 res1[0x8];$/;"	m	struct:upc	typeref:typename:u8[0x8]
res1	include/linux/immap_qe.h	/^	u8 res1[0x90];$/;"	m	struct:ucc_common	typeref:typename:u8[0x90]
res1	include/linux/immap_qe.h	/^	u8 res1[0xB];$/;"	m	struct:qe_timers	typeref:typename:u8[0xB]
res1	include/linux/immap_qe.h	/^	u8 res1[1];$/;"	m	struct:usb_ctlr	typeref:typename:u8[1]
res1	include/linux/immap_qe.h	/^	u8 res1[4];$/;"	m	struct:rsp	typeref:typename:u8[4]
res1	include/linux/mtd/omap_elm.h	/^	u8 res1[124];			\/* 0x804 *\/$/;"	m	struct:location	typeref:typename:u8[124]
res1	include/linux/mtd/omap_elm.h	/^	u8 res1[12];				\/* 0x004 *\/$/;"	m	struct:elm	typeref:typename:u8[12]
res1	include/linux/mtd/omap_elm.h	/^	u8 res1[36];			\/* 0x41c *\/$/;"	m	struct:syndrome	typeref:typename:u8[36]
res1	include/linux/mtd/omap_gpmc.h	/^	u8 res1[0x10];$/;"	m	struct:gpmc	typeref:typename:u8[0x10]
res1	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res1[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res1	include/mpc5xxx.h	/^	volatile u32 res1;		\/* SDMA + 0x5c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
res1	include/tsec.h	/^	u32	res1[24];$/;"	m	struct:tsec_hash_regs	typeref:typename:u32[24]
res1	include/tsi148.h	/^	unsigned int res1;   \/* Reserved            *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
res1	include/universe.h	/^	unsigned int res1;   \/* Reserved            *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
res1	include/usb/ehci-ci.h	/^	u8	res1[0x68];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x68]
res1	include/usb/mpc8xx_udc.h	/^	char res1;	\/* Reserved *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char
res1	include/usb/mpc8xx_udc.h	/^	ushort res1;	\/* Reserved *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
res1	post/cpu/mpc8xx/usb.c	/^	uchar res1;$/;"	m	struct:usb	typeref:typename:uchar	file:
res10	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res10;$/;"	m	struct:i2c	typeref:typename:unsigned short
res10	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res10[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res10	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res10;$/;"	m	struct:i2c	typeref:typename:unsigned short
res10	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res10;$/;"	m	struct:i2c	typeref:typename:unsigned short
res10	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res10;$/;"	m	struct:i2c	typeref:typename:unsigned short
res10	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res10[0x48];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x48]
res10	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res10;$/;"	m	struct:s3c2400_mmc	typeref:typename:u16
res10	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res10;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res10	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res10[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res10	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res10[7];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[7]
res10	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res10[0x4];		\/* 0x22c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res10	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res10[0x280];		\/* 0x780 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x280]
res10	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res10[0x3c];			\/* 0x544 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x3c]
res10	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res10[0x08];		\/* 0x268 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res10[0x04];		\/* 0x19c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res10	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res10[0x388];	\/* 0x500 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x388]
res10	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res10[0x4];		\/* 0x19c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res10	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res10[0x1c];		\/* 0x124 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x1c]
res10	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res10[0x4];		\/* 0x22c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res10	arch/arm/include/asm/arch/display.h	/^	u8 res10[0x280];		\/* 0x780 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x280]
res10	arch/arm/include/asm/arch/display.h	/^	u8 res10[0x3c];			\/* 0x544 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x3c]
res10	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res10[0x08];		\/* 0x268 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res10	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res10[0x04];		\/* 0x19c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res10	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res10[0x388];	\/* 0x500 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x388]
res10	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res10[0x4];		\/* 0x19c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res10	arch/arm/include/asm/arch/prcm.h	/^	u8 res10[0x1c];		\/* 0x124 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x1c]
res10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res10[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res10[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res10[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res10[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res10[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res10[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res10	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res10[0xAC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xAC]
res10	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res10[0x2c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x2c]
res10	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res10[2];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[2]
res10	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res10[0xc];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xc]
res10	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res10[0xd4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xd4]
res10	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res10[0xd8];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xd8]
res10	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res10[0x1ec];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0x1ec]
res10	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res10;$/;"	m	struct:fbcs	typeref:typename:u16
res10	arch/m68k/include/asm/immap_5272.h	/^	uchar res10[1184];$/;"	m	struct:plic_ctrl	typeref:typename:uchar[1184]
res10	arch/m68k/include/asm/immap_5272.h	/^	ushort res10;$/;"	m	struct:usb	typeref:typename:ushort
res10	arch/m68k/include/asm/immap_5275.h	/^	u16 res10;$/;"	m	struct:usb	typeref:typename:u16
res10	arch/m68k/include/asm/immap_5301x.h	/^	u8 res10[2];		\/* 0x2F - 0x30 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
res10	arch/m68k/include/asm/immap_5307.h	/^	u16 res10;$/;"	m	struct:csm	typeref:typename:u16
res10	arch/m68k/include/asm/immap_5329.h	/^	u16 res10[3];		\/* 0x10 - 0x15 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16[3]
res10	arch/powerpc/include/asm/5xx_immap.h	/^	char res10[2];$/;"	m	struct:mios	typeref:typename:char[2]
res10	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res10[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res10	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res10[0xF08];$/;"	m	struct:fsl_lbc	typeref:typename:u8[0xF08]
res10	arch/powerpc/include/asm/immap_512x.h	/^	u8			res10[0x300];$/;"	m	struct:immap	typeref:typename:u8[0x300]
res10	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res10[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res10	arch/powerpc/include/asm/immap_8260.h	/^	char		res10[512];$/;"	m	struct:immap	typeref:typename:char[512]
res10	arch/powerpc/include/asm/immap_8260.h	/^	char	res10[16];$/;"	m	struct:mem_ctlr	typeref:typename:char[16]
res10	arch/powerpc/include/asm/immap_8260.h	/^	char	res10[707];$/;"	m	struct:sdma_csr	typeref:typename:char[707]
res10	arch/powerpc/include/asm/immap_8260.h	/^	char	res10[8];$/;"	m	struct:pci_config	typeref:typename:char[8]
res10	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res10[0x2000];$/;"	m	struct:immap	typeref:typename:u8[0x2000]
res10	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res10[0x5000];$/;"	m	struct:immap	typeref:typename:u8[0x5000]
res10	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res10[0xA3000];$/;"	m	struct:immap	typeref:typename:u8[0xA3000]
res10	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res10[0xC0000];$/;"	m	struct:immap	typeref:typename:u8[0xC0000]
res10	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res10[0xc];$/;"	m	struct:pex83xx	typeref:typename:u8[0xc]
res10	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res10[4];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[4]
res10	arch/powerpc/include/asm/immap_85xx.h	/^		u8 res10[0x1c];$/;"	m	struct:ccsr_clk::__anondcd7518a0508	typeref:typename:u8[0x1c]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res10[63];	\/* pad out to 4k *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32[63]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[12];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[12]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[168];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[168]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[28];$/;"	m	struct:ccsr_pic	typeref:typename:u8[28]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res10[8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[8]
res10	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res10	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10[28];$/;"	m	struct:ccsr_pic	typeref:typename:char[28]
res10	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res10	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res10	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res10	arch/powerpc/include/asm/immap_86xx.h	/^	char    res10[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res10	board/freescale/common/qixis.h	/^	u8 res10[20];$/;"	m	struct:qixis	typeref:typename:u8[20]
res10	drivers/crypto/ace_sha.h	/^	unsigned char   res10[0xc0];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0xc0]
res10	drivers/net/fec_mxc.h	/^	uint32_t res10[1];		\/* MBAR_ETH + 0x148 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[1]
res10	drivers/video/fsl_diu_fb.c	/^	__le32 res10:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
res10	include/fsl_ifc.h	/^	u32 res10[0x24];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x24]
res10	include/fsl_ifc.h	/^	u32 res10[0x2];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32[0x2]
res10	include/fsl_sec.h	/^	u8	res10[0x8fd8];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x8fd8]
res10	include/linux/immap_qe.h	/^	u8 res10[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res10	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res10[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res10	include/usb/ehci-ci.h	/^	u8	res10[0x1C];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x1C]
res100	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res100[0x10];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x10]
res100	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res100[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res100	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res100[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res100	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res100[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res100	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res100[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res100	arch/powerpc/include/asm/immap_86xx.h	/^	char	res100[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res1000	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res1000[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res101	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res101[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res101	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res101[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res101	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res101[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res101	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res101[0xb4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xb4]
res101	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res101[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res101	arch/powerpc/include/asm/immap_86xx.h	/^	char	res101[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res102	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res102[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res102	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res102[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res102	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res102[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res102	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res102[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res102	arch/powerpc/include/asm/immap_86xx.h	/^	char	res102[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res103	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res103[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res103	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res103[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res103	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res103[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res103	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res103[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res103	arch/powerpc/include/asm/immap_86xx.h	/^	char	res103[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res104	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res104[0x3af8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x3af8]
res104	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res104[0x9c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x9c]
res104	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res104[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res104	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res104[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res104	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res104[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res104	arch/powerpc/include/asm/immap_86xx.h	/^	char	res104[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res105	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res105[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res105	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res105[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res105	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res105[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res105	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res105[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res105	arch/powerpc/include/asm/immap_86xx.h	/^	char	res105[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res106	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res106[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res106	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res106[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res106	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res106[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res106	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res106[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res106	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res106[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res106	arch/powerpc/include/asm/immap_86xx.h	/^	char	res106[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res107	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res107[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res107	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res107[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res107	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res107[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res107	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res107[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res107	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res107[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res107	arch/powerpc/include/asm/immap_86xx.h	/^	char	res107[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res108	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res108[0x3af8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x3af8]
res108	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res108[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res108	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res108[0x74];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x74]
res108	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res108[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res108	arch/powerpc/include/asm/immap_86xx.h	/^	char	res108[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res108	include/tsec.h	/^	u32	res108;$/;"	m	struct:tsec	typeref:typename:u32
res109	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res109[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res109	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res109[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res109	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res109[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res109	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res109[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res109	arch/powerpc/include/asm/immap_86xx.h	/^	char	res109[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res10a	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10a[8];$/;"	m	struct:ccsr_gur	typeref:typename:char[8]
res10b	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10b[1868];$/;"	m	struct:ccsr_gur	typeref:typename:char[1868]
res10c	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10c[796];$/;"	m	struct:ccsr_gur	typeref:typename:char[796]
res10d	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10d[4];$/;"	m	struct:ccsr_gur	typeref:typename:char[4]
res10e	arch/powerpc/include/asm/immap_86xx.h	/^	char	res10e[724];$/;"	m	struct:ccsr_gur	typeref:typename:char[724]
res11	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res11;$/;"	m	struct:i2c	typeref:typename:unsigned short
res11	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res11[0x2c];$/;"	m	struct:prcm	typeref:typename:u8[0x2c]
res11	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res11;$/;"	m	struct:i2c	typeref:typename:unsigned short
res11	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res11;$/;"	m	struct:i2c	typeref:typename:unsigned short
res11	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res11;$/;"	m	struct:i2c	typeref:typename:unsigned short
res11	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res11[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res11	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res11[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res11	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res11[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res11	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res11[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res11	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res11[0x4];		\/* 0x23c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res11	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res11[4];		\/* 0x28c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[4]
res11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res11[0x1c];		\/* 0x1b4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x1c]
res11	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res11[0x1c];		\/* 0x1b4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x1c]
res11	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res11[0x30];		\/* 0x150 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x30]
res11	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res11[0x4];		\/* 0x23c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res11	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res11[4];		\/* 0x28c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[4]
res11	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res11[0x1c];		\/* 0x1b4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x1c]
res11	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res11[0x1c];		\/* 0x1b4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x1c]
res11	arch/arm/include/asm/arch/prcm.h	/^	u8 res11[0x30];		\/* 0x150 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x30]
res11	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res11[0x10];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x10]
res11	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res11[0xd8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xd8]
res11	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res11[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res11	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res11[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res11[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res11[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res11	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res11[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res11	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res11[0x34];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x34]
res11	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res11[1];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[1]
res11	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res11[0x6c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x6c]
res11	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res11[0xe0];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xe0]
res11	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res11[0xe0];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xe0]
res11	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res11[0x54];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0x54]
res11	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res11;$/;"	m	struct:fbcs	typeref:typename:u16
res11	arch/m68k/include/asm/immap_5272.h	/^	ushort res11;$/;"	m	struct:usb	typeref:typename:ushort
res11	arch/m68k/include/asm/immap_5275.h	/^	u16 res11;$/;"	m	struct:usb	typeref:typename:u16
res11	arch/m68k/include/asm/immap_5301x.h	/^	u8 res11;		\/* 0x36 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res11	arch/m68k/include/asm/immap_5307.h	/^	u16 res11;$/;"	m	struct:csm	typeref:typename:u16
res11	arch/powerpc/include/asm/5xx_immap.h	/^	char res11[40];$/;"	m	struct:mios	typeref:typename:char[40]
res11	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res11[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res11	arch/powerpc/include/asm/immap_512x.h	/^	u8			res11[0x2000];$/;"	m	struct:immap	typeref:typename:u8[0x2000]
res11	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res11[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res11	arch/powerpc/include/asm/immap_8260.h	/^	char		res11[4096];$/;"	m	struct:immap	typeref:typename:char[4096]
res11	arch/powerpc/include/asm/immap_8260.h	/^	char	res11[12];$/;"	m	struct:pci_config	typeref:typename:char[12]
res11	arch/powerpc/include/asm/immap_8260.h	/^	char	res11[52];$/;"	m	struct:mem_ctlr	typeref:typename:char[52]
res11	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res11[0x1000];$/;"	m	struct:immap	typeref:typename:u8[0x1000]
res11	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res11[0xA3000];$/;"	m	struct:immap	typeref:typename:u8[0xA3000]
res11	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res11[0xCE00];$/;"	m	struct:immap	typeref:typename:u8[0xCE00]
res11	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res11[0x25c];$/;"	m	struct:pex83xx	typeref:typename:u8[0x25c]
res11	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res11[0xa0];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0xa0]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[3316];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[3316]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[476];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[476]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[52];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[52]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[8]
res11	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11[92];$/;"	m	struct:ccsr_pic	typeref:typename:u8[92]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char	res11[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char	res11[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char	res11[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char	res11[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char	res11[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char	res11[92];$/;"	m	struct:ccsr_pic	typeref:typename:char[92]
res11	arch/powerpc/include/asm/immap_86xx.h	/^	char    res11[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res11	board/freescale/common/qixis.h	/^	u8 res11[2];$/;"	m	struct:qixis	typeref:typename:u8[2]
res11	drivers/crypto/ace_sha.h	/^	unsigned char   res11[0xc];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0xc]
res11	drivers/net/fec_mxc.h	/^	uint32_t res11[11];		\/* MBAR_ETH + 0x154-17C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[11]
res11	include/fsl_ifc.h	/^	u32 res11;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res11	include/fsl_ifc.h	/^	u32 res11[0x2];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32[0x2]
res11	include/linux/immap_qe.h	/^	u8 res11[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res11	include/linux/immap_qe.h	/^	u8 res11[0x800];$/;"	m	struct:qe_immap	typeref:typename:u8[0x800]
res11	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res11[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res11	include/usb/ehci-ci.h	/^	u8	res11[0x28];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x28]
res110	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res110[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res110	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res110[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res110	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res110[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res110	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res110[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res110	arch/powerpc/include/asm/immap_86xx.h	/^	char	res110[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res110	include/tsec.h	/^	u32	res110[5];$/;"	m	struct:tsec	typeref:typename:u32[5]
res111	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res111[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res111	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res111[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res111	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res111[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res111	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res111[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res111	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res111[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res111	arch/powerpc/include/asm/immap_86xx.h	/^	char	res111[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res112	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res112[0x3608];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x3608]
res112	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res112[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res112	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res112[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res112	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res112[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res112	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res112[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res112	arch/powerpc/include/asm/immap_86xx.h	/^	char	res112[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res113	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res113[0x6c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x6c]
res113	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res113[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res113	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res113[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res113	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res113[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res113	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res113[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res113	arch/powerpc/include/asm/immap_86xx.h	/^	char	res113[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res114	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res114[0xe8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xe8]
res114	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res114[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res114	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res114[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res114	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res114[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res114	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res114[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res114	arch/powerpc/include/asm/immap_86xx.h	/^	char	res114[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res115	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res115[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res115	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res115[0x34e0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x34e0]
res115	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res115[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res115	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res115[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res115	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res115[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res115	arch/powerpc/include/asm/immap_86xx.h	/^	char	res115[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res116	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res116[0xc01c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc01c]
res116	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res116[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res116	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res116[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res116	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res116[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res116	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res116[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res116	arch/powerpc/include/asm/immap_86xx.h	/^	char	res116[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res117	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res117[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res117	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res117[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res117	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res117[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res117	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res117[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res117	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res117[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res117	arch/powerpc/include/asm/immap_86xx.h	/^	char	res117[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res118	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res118[0x2fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x2fc]
res118	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res118[0xe8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xe8]
res118	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res118[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res118	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res118[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res118	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res118[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res118	arch/powerpc/include/asm/immap_86xx.h	/^	char	res118[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res119	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res119[0x10];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x10]
res119	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res119[0x1fc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fc]
res119	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res119[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res119	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res119[0x74];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x74]
res119	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res119[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res119	arch/powerpc/include/asm/immap_86xx.h	/^	char	res119[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res11a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11a[1868];$/;"	m	struct:ccsr_gur	typeref:typename:u8[1868]
res11a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11a[76];$/;"	m	struct:ccsr_gur	typeref:typename:u8[76]
res11a	arch/powerpc/include/asm/immap_85xx.h	/^	u8      res11a[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res11b	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res11b[1600];$/;"	m	struct:ccsr_gur	typeref:typename:u8[1600]
res11b	arch/powerpc/include/asm/immap_85xx.h	/^	u8      res11b[60];$/;"	m	struct:ccsr_gur	typeref:typename:u8[60]
res11c	arch/powerpc/include/asm/immap_85xx.h	/^	u8      res11c[1496];$/;"	m	struct:ccsr_gur	typeref:typename:u8[1496]
res12	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res12[0xbc];$/;"	m	struct:prcm	typeref:typename:u8[0xbc]
res12	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res12;$/;"	m	struct:i2c	typeref:typename:unsigned short
res12	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res12[0x08];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x08]
res12	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res12[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res12	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res12[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res12	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res12[0x34];		\/* 0x24c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x34]
res12	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res12[0x10];		\/* 0x29c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x10]
res12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res12[0x60];		\/* 0x1e0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x60]
res12	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res12[0x20];		\/* 0x1e0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res12	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res12[0xc];		\/* 0x184 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0xc]
res12	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res12[0x34];		\/* 0x24c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x34]
res12	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res12[0x10];		\/* 0x29c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x10]
res12	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res12[0x60];		\/* 0x1e0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x60]
res12	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res12[0x20];		\/* 0x1e0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res12	arch/arm/include/asm/arch/prcm.h	/^	u8 res12[0xc];		\/* 0x184 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0xc]
res12	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res12[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res12	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res12[0x1fc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1fc]
res12	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res12[0xd8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xd8]
res12	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res12[0xdc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xdc]
res12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res12[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res12[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res12	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res12[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res12	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res12[0x1c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x1c]
res12	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res12[2];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[2]
res12	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res12[0x3c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x3c]
res12	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res12[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res12	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res12[0x70];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x70]
res12	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res12;$/;"	m	struct:fbcs	typeref:typename:u16
res12	arch/m68k/include/asm/immap_5272.h	/^	ushort res12;$/;"	m	struct:usb	typeref:typename:ushort
res12	arch/m68k/include/asm/immap_5275.h	/^	u16 res12;$/;"	m	struct:usb	typeref:typename:u16
res12	arch/m68k/include/asm/immap_5301x.h	/^	u8 res12[3];		\/* 0x39 - 0x3B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res12	arch/m68k/include/asm/immap_5307.h	/^	u16 res12;$/;"	m	struct:csm	typeref:typename:u16
res12	arch/m68k/include/asm/immap_5329.h	/^	u16 res12;		\/* 0x12 - 0x13 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res12	arch/powerpc/include/asm/5xx_immap.h	/^	char res12[2];$/;"	m	struct:mios	typeref:typename:char[2]
res12	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res12[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res12	arch/powerpc/include/asm/immap_512x.h	/^	u8			res12[0xa800];$/;"	m	struct:immap	typeref:typename:u8[0xa800]
res12	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res12[60];$/;"	m	struct:psc512x	typeref:typename:volatile u8[60]
res12	arch/powerpc/include/asm/immap_8260.h	/^	char	res12[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res12	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res12[0x1CF00];$/;"	m	struct:immap	typeref:typename:u8[0x1CF00]
res12	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res12[0xC1000];$/;"	m	struct:immap	typeref:typename:u8[0xC1000]
res12	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res12[0x100];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x100]
res12	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res12[0x160];$/;"	m	struct:pex83xx	typeref:typename:u8[0x160]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[1532];$/;"	m	struct:ccsr_gur	typeref:typename:u8[1532]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[20];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[20]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res12	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res12[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char	res12[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char	res12[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char	res12[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char	res12[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char	res12[32];$/;"	m	struct:ccsr_rio	typeref:typename:char[32]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char	res12[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res12	arch/powerpc/include/asm/immap_86xx.h	/^	char    res12[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res12	board/freescale/common/qixis.h	/^	u8 res12[3];$/;"	m	struct:qixis	typeref:typename:u8[3]
res12	drivers/crypto/ace_sha.h	/^	unsigned char   res12[0x30];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x30]
res12	drivers/net/fec_mxc.h	/^	uint32_t res12[29];		\/* MBAR_ETH + 0x18C-1FC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[29]
res12	include/fsl_ifc.h	/^	u32 res12[0x10];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x10]
res12	include/linux/immap_qe.h	/^	u8 res12[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res12	include/linux/immap_qe.h	/^	u8 res12[0x600];$/;"	m	struct:qe_immap	typeref:typename:u8[0x600]
res12	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res12[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res12	include/usb/ehci-ci.h	/^	u8	res12[0x1F8];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x1F8]
res120	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res120[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res120	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res120[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res120	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res120[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res120	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res120[0x74];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x74]
res120	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res120[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res120	arch/powerpc/include/asm/immap_86xx.h	/^	char	res120[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res121	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res121[0xe0];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xe0]
res121	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res121[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res121	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res121[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res121	arch/powerpc/include/asm/immap_86xx.h	/^	char	res121[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res1211	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res1211[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res122	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res122[0x1f8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1f8]
res122	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res122[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res122	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res122[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res122	arch/powerpc/include/asm/immap_86xx.h	/^	char	res122[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res123	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res123[0x10];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x10]
res123	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res123[0xf5d8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf5d8]
res123	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res123[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res123	arch/powerpc/include/asm/immap_86xx.h	/^	char	res123[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res124	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res124[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res124	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res124[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res124	arch/powerpc/include/asm/immap_86xx.h	/^	char	res124[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res125	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res125[0xdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xdc]
res125	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res125[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res125	arch/powerpc/include/asm/immap_86xx.h	/^	char	res125[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res126	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res126[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res126	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res126[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res126	arch/powerpc/include/asm/immap_86xx.h	/^	char	res126[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res127	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res127[0xd0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xd0]
res127	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res127[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res127	arch/powerpc/include/asm/immap_86xx.h	/^	char	res127[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res128	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res128[0x34dc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x34dc]
res128	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res128[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res128	arch/powerpc/include/asm/immap_86xx.h	/^	char	res128[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res128	include/tsec.h	/^	u32	res128[23];$/;"	m	struct:tsec	typeref:typename:u32[23]
res129	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res129[0x400c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x400c]
res129	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res129[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res129	arch/powerpc/include/asm/immap_86xx.h	/^	char	res129[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res13	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res13;$/;"	m	struct:i2c	typeref:typename:unsigned short
res13	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res13[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res13	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res13;$/;"	m	struct:i2c	typeref:typename:unsigned short
res13	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res13;$/;"	m	struct:i2c	typeref:typename:unsigned short
res13	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res13;$/;"	m	struct:i2c	typeref:typename:unsigned short
res13	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res13[0x200];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x200]
res13	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res13[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res13	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res13[7];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[7]
res13	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res13[0x04];		\/* 0x2c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res13[0x08];		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res13	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res13[0x24];		\/* 0x21c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x24]
res13	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res13[0x04];		\/* 0x2c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res13	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res13[0x08];		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res13	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res13[0x24];		\/* 0x21c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x24]
res13	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res13[0x15c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x15c]
res13	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res13[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res13	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res13[0xdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xdc]
res13	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res13[0xe0];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xe0]
res13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res13[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res13[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res13	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res13[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res13	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res13[0x14];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x14]
res13	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res13[2];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[2]
res13	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res13[0x38];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x38]
res13	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res13[0x70];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x70]
res13	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res13[0x70];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x70]
res13	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res13;$/;"	m	struct:fbcs	typeref:typename:u16
res13	arch/m68k/include/asm/immap_5272.h	/^	ushort res13;$/;"	m	struct:usb	typeref:typename:ushort
res13	arch/m68k/include/asm/immap_5275.h	/^	u16 res13;$/;"	m	struct:usb	typeref:typename:u16
res13	arch/m68k/include/asm/immap_5301x.h	/^	u8 res13;		\/* 0x40 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res13	arch/m68k/include/asm/immap_5307.h	/^	u16 res13;$/;"	m	struct:csm	typeref:typename:u16
res13	arch/powerpc/include/asm/5xx_immap.h	/^	char res13[1038];$/;"	m	struct:mios	typeref:typename:char[1038]
res13	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res13[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res13	arch/powerpc/include/asm/immap_512x.h	/^	u8			res13[0xde000];$/;"	m	struct:immap	typeref:typename:u8[0xde000]
res13	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res13[28];$/;"	m	struct:psc512x	typeref:typename:volatile u8[28]
res13	arch/powerpc/include/asm/immap_8260.h	/^	char	res13[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res13	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res13[0x8000];$/;"	m	struct:immap	typeref:typename:u8[0x8000]
res13	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res13[0x70];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x70]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[16];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[16]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[20];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[20]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res13	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res13[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res13	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res13	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res13	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res13	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res13	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res13	arch/powerpc/include/asm/immap_86xx.h	/^	char    res13[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res13	board/freescale/common/qixis.h	/^	u8 res13[16];$/;"	m	struct:qixis	typeref:typename:u8[16]
res13	drivers/crypto/ace_sha.h	/^	unsigned char   res13[0x20];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x20]
res13	drivers/net/fec_mxc.h	/^	uint32_t res13[2];		\/* MBAR_ETH + 0x278-27C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[2]
res13	include/fsl_ifc.h	/^	u32 res13;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res13	include/linux/immap_qe.h	/^	u8 res13[0x280];$/;"	m	struct:cp_qe	typeref:typename:u8[0x280]
res13	include/linux/immap_qe.h	/^	u8 res13[0x600];$/;"	m	struct:qe_immap	typeref:typename:u8[0x600]
res13	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res13[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res13	include/usb/ehci-ci.h	/^	u8	res13[0xEC];$/;"	m	struct:usb_ehci	typeref:typename:u8[0xEC]
res130	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res130[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res130	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res130[0x110];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x110]
res130	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res130[0xf0];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xf0]
res130	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res130[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res130	arch/powerpc/include/asm/immap_86xx.h	/^	char	res130[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res131	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res131[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res131	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res131[0x10];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x10]
res131	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res131[0x10];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x10]
res131	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res131[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res131	arch/powerpc/include/asm/immap_86xx.h	/^	char	res131[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res132	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res132[0x1fc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fc]
res132	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res132[0x1c0];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1c0]
res132	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res132[0x1c0];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1c0]
res132	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res132[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res132	arch/powerpc/include/asm/immap_86xx.h	/^	char	res132[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res133	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res133[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res133	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res133[0x10];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x10]
res133	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res133[0x10];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x10]
res133	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res133[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res133	arch/powerpc/include/asm/immap_86xx.h	/^	char	res133[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res134	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res134[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res134	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res134[0x1e0];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1e0]
res134	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res134[0x1e0];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1e0]
res134	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res134[4108];$/;"	m	struct:ccsr_pic	typeref:typename:u8[4108]
res134	arch/powerpc/include/asm/immap_86xx.h	/^	char	res134[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res135	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res135[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res135	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res135[0xf4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xf4]
res135	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res135[0xf4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xf4]
res135	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res135[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res135	arch/powerpc/include/asm/immap_86xx.h	/^	char	res135[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res136	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res136[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res136	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res136[0xd4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xd4]
res136	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res136[0xd4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xd4]
res136	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res136[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res136	arch/powerpc/include/asm/immap_86xx.h	/^	char	res136[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res137	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res137[0x1fc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fc]
res137	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res137[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res137	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res137[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res137	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res137[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res137	arch/powerpc/include/asm/immap_86xx.h	/^	char	res137[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res138	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res138[0x5f8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x5f8]
res138	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res138[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res138	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res138[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res138	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res138[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res138	arch/powerpc/include/asm/immap_86xx.h	/^	char	res138[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res139	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res139[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res139	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res139[0x5d4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x5d4]
res139	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res139[0x5d4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x5d4]
res139	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res139[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res139	arch/powerpc/include/asm/immap_86xx.h	/^	char	res139[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res13a	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13a[224];$/;"	m	struct:ccsr_gur	typeref:typename:char[224]
res13b	arch/powerpc/include/asm/immap_86xx.h	/^	char	res13b[4];$/;"	m	struct:ccsr_gur	typeref:typename:char[4]
res14	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res14;           \/* 0xA0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
res14	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res14[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res14	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res14;$/;"	m	struct:i2c	typeref:typename:unsigned short
res14	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res14;		\/* 0xA0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
res14	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res14;		\/* 0xA0 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
res14	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res14[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res14	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res14[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res14	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res14[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res14	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res14[0x04];		\/* 0x2cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res14	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res14[0x04];		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res14	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res14[0x8];		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res14	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res14[0x04];		\/* 0x2cc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res14	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res14[0x04];		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res14	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res14[0x8];		\/* 0x248 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res14	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res14[0x2ce0];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x2ce0]
res14	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res14[0x3608];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x3608]
res14	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res14[0x9c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x9c]
res14	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res14[0xe0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xe0]
res14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res14[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res14[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res14	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res14[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res14	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res14[0x1c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x1c]
res14	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res14[1];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[1]
res14	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res14[0x4];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x4]
res14	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res14[0x5fc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x5fc]
res14	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res14[0x5fc];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x5fc]
res14	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res14;$/;"	m	struct:fbcs	typeref:typename:u16
res14	arch/m68k/include/asm/immap_5272.h	/^	ushort res14;$/;"	m	struct:usb	typeref:typename:ushort
res14	arch/m68k/include/asm/immap_5275.h	/^	u16 res14;$/;"	m	struct:usb	typeref:typename:u16
res14	arch/m68k/include/asm/immap_5301x.h	/^	u8 res14[2];		\/* 0x43 - 0x44 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
res14	arch/m68k/include/asm/immap_5307.h	/^	u16 res14;$/;"	m	struct:csm	typeref:typename:u16
res14	arch/powerpc/include/asm/immap_8260.h	/^	char	res14[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res14	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res14[0xE00000];\/* Added for 8309 *\/$/;"	m	struct:immap	typeref:typename:u8[0xE00000]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[24];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[24]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res14	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res14[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char	res14[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char	res14[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char	res14[24];$/;"	m	struct:ccsr_gur	typeref:typename:char[24]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char	res14[256];$/;"	m	struct:ccsr_pex	typeref:typename:char[256]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char	res14[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char	res14[63892];$/;"	m	struct:ccsr_rio	typeref:typename:char[63892]
res14	arch/powerpc/include/asm/immap_86xx.h	/^	char    res14[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res14	board/freescale/common/qixis.h	/^	u8 res14[10];$/;"	m	struct:qixis	typeref:typename:u8[10]
res14	drivers/crypto/ace_sha.h	/^	unsigned char	res14[12];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[12]
res14	drivers/net/fec_mxc.h	/^	uint32_t res14[7];		\/* MBAR_ETH + 0x2E4-2FC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[7]
res14	include/fsl_ifc.h	/^	u32 res14;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res14	include/linux/immap_qe.h	/^	u8 res14[0x300];$/;"	m	struct:qe_immap	typeref:typename:u8[0x300]
res14	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res14[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res14	include/usb/ehci-ci.h	/^	u8	res14[0xafc];$/;"	m	struct:usb_ehci	typeref:typename:u8[0xafc]
res140	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res140[0x10];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x10]
res140	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res140[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res140	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res140[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res140	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res140[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res140	arch/powerpc/include/asm/immap_86xx.h	/^	char	res140[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res141	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res141[0xd8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xd8]
res141	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res141[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res141	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res141[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res141	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res141[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res141	arch/powerpc/include/asm/immap_86xx.h	/^	char	res141[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res142	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res142[0xdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xdc]
res142	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res142[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res142	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res142[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res142	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res142[59852];$/;"	m	struct:ccsr_pic	typeref:typename:u8[59852]
res142	arch/powerpc/include/asm/immap_86xx.h	/^	char	res142[4108];$/;"	m	struct:ccsr_pic	typeref:typename:char[4108]
res143	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res143[0xe0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xe0]
res143	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res143[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res143	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res143[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res143	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res143[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res143	arch/powerpc/include/asm/immap_86xx.h	/^	char	res143[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res144	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res144[0xe0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xe0]
res144	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res144[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res144	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res144[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res144	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res144[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res144	arch/powerpc/include/asm/immap_86xx.h	/^	char	res144[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res145	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res145[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res145	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res145[0x234];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x234]
res145	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res145[0x334];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x334]
res145	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res145[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res145	arch/powerpc/include/asm/immap_86xx.h	/^	char	res145[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res146	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res146[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res146	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res146[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res146	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res146[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res146	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res146[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res146	arch/powerpc/include/asm/immap_86xx.h	/^	char	res146[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res147	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res147[0xbdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xbdc]
res147	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res147[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res147	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res147[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res147	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res147[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res147	arch/powerpc/include/asm/immap_86xx.h	/^	char	res147[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res148	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res148[0x1fdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fdc]
res148	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res148[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res148	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res148[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res148	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res148[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res148	arch/powerpc/include/asm/immap_86xx.h	/^	char	res148[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res149	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res149[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res149	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res149[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res149	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res149[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res149	arch/powerpc/include/asm/immap_86xx.h	/^	char	res149[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res15	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res15;$/;"	m	struct:i2c	typeref:typename:unsigned short
res15	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res15[0x1c];$/;"	m	struct:prcm	typeref:typename:u8[0x1c]
res15	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res15;$/;"	m	struct:i2c	typeref:typename:unsigned short
res15	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res15;$/;"	m	struct:i2c	typeref:typename:unsigned short
res15	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res15;$/;"	m	struct:i2c	typeref:typename:unsigned short
res15	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res15[0x24];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x24]
res15	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res15[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res15	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res15[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res15	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res15[0x18];		\/* 0x2d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x18]
res15	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res15[0x4];		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res15	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res15[0x18];		\/* 0x2d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x18]
res15	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res15[0x4];		\/* 0x254 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res15	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res15[0x3608];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x3608]
res15	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res15[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res15	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res15[0xe0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xe0]
res15	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res15[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res15[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res15[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res15	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res15[0xEBC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xEBC]
res15	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res15[0x8];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x8]
res15	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned char res15[156];$/;"	m	struct:exynos_fb	typeref:typename:unsigned char[156]
res15	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res15[0x10];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x10]
res15	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res15[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res15	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res15;$/;"	m	struct:fbcs	typeref:typename:u16
res15	arch/m68k/include/asm/immap_5272.h	/^	ushort res15;$/;"	m	struct:usb	typeref:typename:ushort
res15	arch/m68k/include/asm/immap_5275.h	/^	u16 res15;$/;"	m	struct:usb	typeref:typename:u16
res15	arch/m68k/include/asm/immap_5301x.h	/^	u8 res15;		\/* 0x4A *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res15	arch/m68k/include/asm/immap_5307.h	/^	u16 res15;$/;"	m	struct:csm	typeref:typename:u16
res15	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res15;$/;"	m	struct:comm_proc	typeref:typename:u_char
res15	arch/powerpc/include/asm/immap_8260.h	/^	char	res15[88];$/;"	m	struct:pci_config	typeref:typename:char[88]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[248];$/;"	m	struct:ccsr_gur	typeref:typename:u8[248]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[420];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[420]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res15	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res15[56];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[56]
res15	arch/powerpc/include/asm/immap_86xx.h	/^	char	res15[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res15	arch/powerpc/include/asm/immap_86xx.h	/^	char	res15[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res15	arch/powerpc/include/asm/immap_86xx.h	/^	char	res15[236];$/;"	m	struct:ccsr_ht	typeref:typename:char[236]
res15	arch/powerpc/include/asm/immap_86xx.h	/^	char	res15[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res15	arch/powerpc/include/asm/immap_86xx.h	/^	char	res15[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res15	arch/powerpc/include/asm/immap_86xx.h	/^	char    res15[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res15	board/freescale/common/qixis.h	/^	u8 res15[16];$/;"	m	struct:qixis	typeref:typename:u8[16]
res15	drivers/crypto/ace_sha.h	/^	unsigned char	res15[0x18c];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x18c]
res15	drivers/net/fec_mxc.h	/^	uint16_t res15[3];		\/* MBAR_ETH + 0x302-306 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint16_t[3]
res15	drivers/net/fec_mxc.h	/^	uint32_t res15[64];		\/* MBAR_ETH + 0x300-3FF *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[64]
res15	include/fsl_ifc.h	/^	u32 res15;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res15	include/linux/immap_qe.h	/^	u8 res15[0x3A00];$/;"	m	struct:qe_immap	typeref:typename:u8[0x3A00]
res15	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res15[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res150	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res150[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res150	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res150[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res150	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res150[130892];$/;"	m	struct:ccsr_pic	typeref:typename:u8[130892]
res150	arch/powerpc/include/asm/immap_86xx.h	/^	char	res150[59852];$/;"	m	struct:ccsr_pic	typeref:typename:char[59852]
res151	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res151[0x134];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x134]
res151	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res151[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res151	arch/powerpc/include/asm/immap_86xx.h	/^	char	res151[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res152	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res152[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res152	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res152[0x18];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x18]
res152	arch/powerpc/include/asm/immap_86xx.h	/^	char	res152[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res153	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res153[0x18];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x18]
res153	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res153[0x38];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x38]
res153	arch/powerpc/include/asm/immap_86xx.h	/^	char	res153[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res154	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res154[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res154	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res154[0x18];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x18]
res154	arch/powerpc/include/asm/immap_86xx.h	/^	char	res154[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res155	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res155[0x38];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x38]
res155	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res155[0x38];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x38]
res155	arch/powerpc/include/asm/immap_86xx.h	/^	char	res155[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res156	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res156[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res156	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res156[0x18];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x18]
res156	arch/powerpc/include/asm/immap_86xx.h	/^	char	res156[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res157	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res157[0x414];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x414]
res157	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res157[0x534];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x534]
res157	arch/powerpc/include/asm/immap_86xx.h	/^	char	res157[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res158	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res158[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res158	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res158[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res158	arch/powerpc/include/asm/immap_86xx.h	/^	char	res158[3916];$/;"	m	struct:ccsr_pic	typeref:typename:char[3916]
res159	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res159[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res159	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res159[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res15a	arch/powerpc/include/asm/immap_86xx.h	/^	char	res15a[24];$/;"	m	struct:ccsr_gur	typeref:typename:char[24]
res16	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res16;$/;"	m	struct:i2c	typeref:typename:unsigned short
res16	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res16[0xbc];$/;"	m	struct:prcm	typeref:typename:u8[0xbc]
res16	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res16;$/;"	m	struct:i2c	typeref:typename:unsigned short
res16	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res16;$/;"	m	struct:i2c	typeref:typename:unsigned short
res16	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res16[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res16	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res16[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res16	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res16[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res16	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res16[0x0c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x0c]
res16	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res16[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res16	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res16[0xec];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xec]
res16	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res16[0xf8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf8]
res16	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res16[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res16	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res16[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res16	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res16[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res16	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res16[0x8];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x8]
res16	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned char res16[16];$/;"	m	struct:exynos_fb	typeref:typename:unsigned char[16]
res16	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res16[0x24];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x24]
res16	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res16[0x8];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x8]
res16	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res16;$/;"	m	struct:fbcs	typeref:typename:u16
res16	arch/m68k/include/asm/immap_5272.h	/^	ushort res16;$/;"	m	struct:usb	typeref:typename:ushort
res16	arch/m68k/include/asm/immap_5275.h	/^	u16 res16;$/;"	m	struct:usb	typeref:typename:u16
res16	arch/m68k/include/asm/immap_5301x.h	/^	u8 res16[3];		\/* 0x4D - 0x4F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res16	arch/m68k/include/asm/immap_5307.h	/^	u16 res16;$/;"	m	struct:csm	typeref:typename:u16
res16	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res16[4];$/;"	m	struct:comm_proc	typeref:typename:u_char[4]
res16	arch/powerpc/include/asm/immap_8260.h	/^	char	res16[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res16[0x1c];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1c]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res16[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res16[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res16[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res16[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res16[96];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[96]
res16	arch/powerpc/include/asm/immap_85xx.h	/^	u8      res16[52];$/;"	m	struct:ccsr_gur	typeref:typename:u8[52]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char	res16[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char	res16[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char	res16[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char	res16[184];$/;"	m	struct:ccsr_gur	typeref:typename:char[184]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char	res16[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char	res16[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res16	arch/powerpc/include/asm/immap_86xx.h	/^	char    res16[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res16	drivers/net/fec_mxc.h	/^	uint16_t res16[3];		\/* MBAR_ETH + 0x30a-30e *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint16_t[3]
res16	include/fsl_ifc.h	/^	u32 res16[0x2];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x2]
res16	include/linux/immap_qe.h	/^	u8 res16[0x8000];	\/* 0x108000 -  0x110000 *\/$/;"	m	struct:qe_immap	typeref:typename:u8[0x8000]
res16	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res16[0x3c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x3c]
res160	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res160[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res160	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res160[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res161	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res161[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res161	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res161[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res162	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res162[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res162	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res162[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res163	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res163[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res163	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res163[0x24];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x24]
res164	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res164[0xf4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xf4]
res165	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res165[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res166	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res166[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res167	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res167[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res168	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res168[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res169	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res169[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res17	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res17;$/;"	m	struct:i2c	typeref:typename:unsigned short
res17	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res17[0x18];$/;"	m	struct:prcm	typeref:typename:u8[0x18]
res17	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res17;$/;"	m	struct:i2c	typeref:typename:unsigned short
res17	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res17;$/;"	m	struct:i2c	typeref:typename:unsigned short
res17	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res17[0x34];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x34]
res17	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res17[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res17	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res17[0x0c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x0c]
res17	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res17[0x8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x8]
res17	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res17[0xec];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xec]
res17	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res17[0xf8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf8]
res17	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res17[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res17	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res17[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res17	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res17[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res17	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res17[0x18];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x18]
res17	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res17[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res17	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res17[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res17	arch/m68k/include/asm/immap_5272.h	/^	ushort res17;$/;"	m	struct:usb	typeref:typename:ushort
res17	arch/m68k/include/asm/immap_5275.h	/^	u16 res17;$/;"	m	struct:usb	typeref:typename:u16
res17	arch/m68k/include/asm/immap_5301x.h	/^	u8 res17;		\/* 0x53 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res17	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res17[0xc];$/;"	m	struct:comm_proc	typeref:typename:u_char[0xc]
res17	arch/powerpc/include/asm/immap_8260.h	/^	char	res17[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res17[0x3dc];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x3dc]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res17[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res17[224];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[224]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res17[24];$/;"	m	struct:ccsr_gur	typeref:typename:u8[24]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res17[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res17[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res17	arch/powerpc/include/asm/immap_85xx.h	/^	u8      res17[61592];$/;"	m	struct:ccsr_gur	typeref:typename:u8[61592]
res17	arch/powerpc/include/asm/immap_86xx.h	/^	char	res17[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res17	arch/powerpc/include/asm/immap_86xx.h	/^	char	res17[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res17	arch/powerpc/include/asm/immap_86xx.h	/^	char	res17[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res17	arch/powerpc/include/asm/immap_86xx.h	/^	char	res17[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res17	arch/powerpc/include/asm/immap_86xx.h	/^	char	res17[92];$/;"	m	struct:ccsr_rio	typeref:typename:char[92]
res17	arch/powerpc/include/asm/immap_86xx.h	/^	char    res17[64];$/;"	m	struct:ccsr_tsec	typeref:typename:char[64]
res17	drivers/net/fec_mxc.h	/^	uint32_t res17[60];		\/* MBAR_ETH + 0x300-3FF *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[60]
res17	include/fsl_ifc.h	/^	u32 res17[0x2];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x2]
res17	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res17[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res170	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res170[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res18	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res18;$/;"	m	struct:i2c	typeref:typename:unsigned short
res18	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res18[0x18];$/;"	m	struct:prcm	typeref:typename:u8[0x18]
res18	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res18;$/;"	m	struct:i2c	typeref:typename:unsigned short
res18	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res18;$/;"	m	struct:i2c	typeref:typename:unsigned short
res18	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res18[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res18	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res18[0x100];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x100]
res18	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res18[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res18	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res18[0xbdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xbdc]
res18	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res18[0xe8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xe8]
res18	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res18[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res18	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res18[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res18	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res18[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res18	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res18[0x10];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x10]
res18	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res18[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res18	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res18[0x24];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x24]
res18	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res18[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res18	arch/m68k/include/asm/immap_5272.h	/^	ushort res18;$/;"	m	struct:usb	typeref:typename:ushort
res18	arch/m68k/include/asm/immap_5275.h	/^	u16 res18;$/;"	m	struct:usb	typeref:typename:u16
res18	arch/m68k/include/asm/immap_5301x.h	/^	u8 res18;		\/* 0x61 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res18	arch/powerpc/include/asm/8xx_immap.h	/^	char	res18[0xE00];$/;"	m	struct:comm_proc	typeref:typename:char[0xE00]
res18	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res18[28];$/;"	m	struct:psc512x	typeref:typename:volatile u8[28]
res18	arch/powerpc/include/asm/immap_8260.h	/^	char	res18[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res18	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res18[0xf68];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0xf68]
res18	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res18[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res18	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res18[12];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[12]
res18	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res18[192];$/;"	m	struct:ccsr_gur	typeref:typename:u8[192]
res18	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res18[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res18	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res18[232];$/;"	m	struct:ccsr_gur	typeref:typename:u8[232]
res18	arch/powerpc/include/asm/immap_86xx.h	/^	char	res18[124];$/;"	m	struct:ccsr_rio	typeref:typename:char[124]
res18	arch/powerpc/include/asm/immap_86xx.h	/^	char	res18[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res18	arch/powerpc/include/asm/immap_86xx.h	/^	char	res18[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res18	arch/powerpc/include/asm/immap_86xx.h	/^	char	res18[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res18	arch/powerpc/include/asm/immap_86xx.h	/^	char	res18[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res18	arch/powerpc/include/asm/immap_86xx.h	/^	char    res18[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res18	include/fsl_ifc.h	/^	u32 res18;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res18	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res18[0x3c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x3c]
res188	include/tsec.h	/^	u32	res188[30];$/;"	m	struct:tsec	typeref:typename:u32[30]
res19	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res19;$/;"	m	struct:i2c	typeref:typename:unsigned short
res19	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res19[0xac];$/;"	m	struct:prcm	typeref:typename:u8[0xac]
res19	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res19;$/;"	m	struct:i2c	typeref:typename:unsigned short
res19	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res19;$/;"	m	struct:i2c	typeref:typename:unsigned short
res19	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res19[0x1c];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x1c]
res19	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res19[0x1fdc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fdc]
res19	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res19[0x8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x8]
res19	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res19[0xe4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xe4]
res19	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res19[0xf8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf8]
res19	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res19[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res19	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res19[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res19	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res19[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res19	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res19[0x18];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x18]
res19	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res19[0x3c];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x3c]
res19	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res19[0x4];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x4]
res19	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res19[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res19	arch/m68k/include/asm/immap_5272.h	/^	ushort res19;$/;"	m	struct:usb	typeref:typename:ushort
res19	arch/m68k/include/asm/immap_5275.h	/^	u16 res19;$/;"	m	struct:usb	typeref:typename:u16
res19	arch/m68k/include/asm/immap_5301x.h	/^	u8 res19[2];		\/* 0x66 - 0x67 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
res19	arch/powerpc/include/asm/immap_8260.h	/^	char	res19[88];$/;"	m	struct:pci_config	typeref:typename:char[88]
res19	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res19	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19[240];$/;"	m	struct:ccsr_gur	typeref:typename:u8[240]
res19	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res19	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res19	arch/powerpc/include/asm/immap_86xx.h	/^	char	res19[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res19	arch/powerpc/include/asm/immap_86xx.h	/^	char	res19[28];$/;"	m	struct:ccsr_rio	typeref:typename:char[28]
res19	arch/powerpc/include/asm/immap_86xx.h	/^	char	res19[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res19	arch/powerpc/include/asm/immap_86xx.h	/^	char	res19[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res19	arch/powerpc/include/asm/immap_86xx.h	/^	char	res19[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res19	arch/powerpc/include/asm/immap_86xx.h	/^	char    res19[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res19	include/fsl_ifc.h	/^	u32 res19[0x10];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x10]
res19	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res19[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res19_10a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_10a[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res19_10b	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_10b[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res19_11a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_11a[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res19_11b	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_11b[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res19_8a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_8a[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res19_8b	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_8b[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res19_9a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_9a[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res19_9b	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res19_9b[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res1C	arch/m68k/include/asm/immap_5329.h	/^	u8 res1C;		\/* 0x1C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned char res2[12];$/;"	m	struct:gptimer	typeref:typename:unsigned char[12]
res2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int res2[66];$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned int[66]
res2	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res2[5];$/;"	m	struct:i2c	typeref:typename:unsigned short[5]
res2	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 res2[0x3a4];$/;"	m	struct:sysctrl	typeref:typename:u32[0x3a4]
res2	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 res2[0xBE];$/;"	m	struct:wdt	typeref:typename:u32[0xBE]
res2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 res2[31 + 64*7];$/;"	m	struct:lcdc_regs	typeref:typename:u32[]
res2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res2;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
res2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res2[16];$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32[16]
res2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res2[239];$/;"	m	struct:mmdc_p_regs	typeref:typename:u32[239]
res2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res2[2];$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32[2]
res2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res2[2];$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32[2]
res2	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res2[2];$/;"	m	struct:mx6sx_iomux_ddr_regs	typeref:typename:u32[2]
res2	arch/arm/include/asm/arch-omap3/am35x_def.h	/^	u32 res2[0x2];		\/* 0x318 - 0x31C *\/$/;"	m	struct:am35x_scm_general	typeref:typename:u32[0x2]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x08];$/;"	m	struct:ctrl_id	typeref:typename:u8[0x08]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x10];$/;"	m	struct:watchdog	typeref:typename:u8[0x10]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x14];$/;"	m	struct:sdrc_cs	typeref:typename:u8[0x14]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x18];$/;"	m	struct:prcm	typeref:typename:u8[0x18]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x22A];$/;"	m	struct:ctrl	typeref:typename:u8[0x22A]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x28];$/;"	m	struct:sdrc	typeref:typename:u8[0x28]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x34];$/;"	m	struct:dma4	typeref:typename:u8[0x34]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x34];$/;"	m	struct:sms	typeref:typename:u8[0x34]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x4];$/;"	m	struct:pm	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res2[0x50c];$/;"	m	struct:prm	typeref:typename:u8[0x50c]
res2	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned char res2[8];$/;"	m	struct:emif4	typeref:typename:unsigned char[8]
res2	arch/arm/include/asm/arch-omap3/dss.h	/^	u8 res2[32];				\/* 0x20 *\/$/;"	m	struct:dispc_regs	typeref:typename:u8[32]
res2	arch/arm/include/asm/arch-omap3/dss.h	/^	u8 res2[36];				\/* 0x1C *\/$/;"	m	struct:dss_regs	typeref:typename:u8[36]
res2	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res2;$/;"	m	struct:i2c	typeref:typename:unsigned short
res2	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned char res2[0x060];	\/* 0x278 *\/$/;"	m	struct:t2	typeref:typename:unsigned char[0x060]
res2	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char res2[0x38];$/;"	m	struct:control_prog_io	typeref:typename:unsigned char[0x38]
res2	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char res2[0x54];$/;"	m	struct:gpio	typeref:typename:unsigned char[0x54]
res2	arch/arm/include/asm/arch-omap4/cpu.h	/^	u8 res2[0x10];$/;"	m	struct:watchdog	typeref:typename:u8[0x10]
res2	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res2[5];$/;"	m	struct:i2c	typeref:typename:unsigned short[5]
res2	arch/arm/include/asm/arch-omap5/cpu.h	/^	u8 res2[0x10];$/;"	m	struct:gptimer	typeref:typename:u8[0x10]
res2	arch/arm/include/asm/arch-omap5/cpu.h	/^	u8 res2[0x10];$/;"	m	struct:watchdog	typeref:typename:u8[0x10]
res2	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res2[5];$/;"	m	struct:i2c	typeref:typename:unsigned short[5]
res2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res2[0xc];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0xc]
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res2;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res2;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res2[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res2[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res2[3];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[3]
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res2[3];$/;"	m	struct:s3c24x0_uart	typeref:typename:u8[3]
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res2[3];$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8[3]
res2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res2[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res2	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res2[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res2[0x4];		\/* 0x18c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res2[0x04];			\/* 0x06c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res2	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res2[0x04];			\/* 0x5c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res2	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res2[0x10];			\/* 0x830 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x10]
res2	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res2[0x118];			\/* 0x0e8 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x118]
res2	arch/arm/include/asm/arch-sunxi/display2.h	/^	u8 res2[0x04];			\/* 0x5c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res2[0x34];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x34]
res2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res2[0x08];		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res2[0x0c];		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x0c]
res2	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res2[0x20];		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x20]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res2[0x08];		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res2[0x30];		\/* 0x150 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x30]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res2[0x4];		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res2[0x4];		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res2[0x8];		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res2[0x4];		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res2[0x8];		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res2[0x4];		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res2[0x8];		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res2[0x28];		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res2[0x3c];		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x3c]
res2	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res2[0x4];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 res2[64];$/;"	m	struct:sunxi_mmc	typeref:typename:u32[64]
res2	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res2[0x14];		\/* 0x02c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x14]
res2	arch/arm/include/asm/arch-sunxi/timer.h	/^	u8 res2[16];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[16]
res2	arch/arm/include/asm/arch-sunxi/watchdog.h	/^	u32 res2;$/;"	m	struct:sunxi_wdog	typeref:typename:u32
res2	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	res2[4];	\/* RESERVED, offset 44h-47h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char[4]
res2	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res2[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res2[0x4];		\/* 0x18c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/display.h	/^	u8 res2[0x04];			\/* 0x06c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res2	arch/arm/include/asm/arch/display.h	/^	u8 res2[0x04];			\/* 0x5c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res2	arch/arm/include/asm/arch/display.h	/^	u8 res2[0x10];			\/* 0x830 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x10]
res2	arch/arm/include/asm/arch/display.h	/^	u8 res2[0x118];			\/* 0x0e8 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x118]
res2	arch/arm/include/asm/arch/display2.h	/^	u8 res2[0x04];			\/* 0x5c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x04]
res2	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res2[0x34];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x34]
res2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res2[0x08];		\/* 0x44 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res2[0x0c];		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x0c]
res2	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res2[0x20];		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x20]
res2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res2[0x08];		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res2[0x30];		\/* 0x150 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x30]
res2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res2[0x4];		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res2[0x4];		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res2[0x8];		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res2[0x4];		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res2[0x8];		\/* 0xa4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res2	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res2[0x4];		\/* 0x88 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res2[0x8];		\/* 0xc8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x8]
res2	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res2[0x28];		\/* 0x210 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res2	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res2[0x3c];		\/* 0x34 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x3c]
res2	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res2[0x4];		\/* 0x1c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res2	arch/arm/include/asm/arch/mmc.h	/^	u32 res2[64];$/;"	m	struct:sunxi_mmc	typeref:typename:u32[64]
res2	arch/arm/include/asm/arch/prcm.h	/^	u8 res2[0x14];		\/* 0x02c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x14]
res2	arch/arm/include/asm/arch/timer.h	/^	u8 res2[16];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[16]
res2	arch/arm/include/asm/arch/watchdog.h	/^	u32 res2;$/;"	m	struct:sunxi_wdog	typeref:typename:u32
res2	arch/arm/include/asm/omap_mmc.h	/^	unsigned char res2[0x14];$/;"	m	struct:hsmmc	typeref:typename:unsigned char[0x14]
res2	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 res2[17];	\/* 0x1A0 ~ 0x1E0 *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[17]
res2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res2[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res2[0x1fc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1fc]
res2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res2[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res2[0xf8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf8]
res2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res2[0x4];$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned char[0x4]
res2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res2[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res2[0x8];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0x8]
res2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res2[0x8];$/;"	m	struct:exynos5420_tzasc	typeref:typename:unsigned char[0x8]
res2	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res2[4];$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned char[4]
res2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res2[0x4];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x4]
res2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
res2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res2[0x1dc];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1dc]
res2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res2[0x1e0];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1e0]
res2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res2[0x1ec];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1ec]
res2	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned char	res2[0x29c];$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned char[0x29c]
res2	arch/arm/mach-exynos/include/mach/tzpc.h	/^	char res2[0x7B0];$/;"	m	struct:exynos_tzpc	typeref:typename:char[0x7B0]
res2	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned char	res2[3];$/;"	m	struct:s5p_uart	typeref:typename:unsigned char[3]
res2	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res2[0x4];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0x4]
res2	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res2[0xf0];$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned char[0xf0]
res2	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned char	res2[3];$/;"	m	struct:s5p_uart	typeref:typename:unsigned char[3]
res2	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res2[187];		\/* 0x114 - 0x3FF *\/$/;"	m	struct:xbs	typeref:typename:u32[187]
res2	arch/m68k/include/asm/coldfire/edma.h	/^	u16 res2[3];		\/* 0x10 - 0x15 *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16[3]
res2	arch/m68k/include/asm/coldfire/eport.h	/^	u16 res2;	\/* 0x0A *\/$/;"	m	struct:eport	typeref:typename:u16
res2	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res2;$/;"	m	struct:fbcs	typeref:typename:u16
res2	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 res2;		\/* 0x1C *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
res2	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 res2;		\/* 0x1C *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
res2	arch/m68k/include/asm/coldfire/intctrl.h	/^	u16 res2;		\/* 0x1E - 0x1F *\/$/;"	m	struct:int1_ctrl	typeref:typename:u16
res2	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 res2[8];		\/* 0x20 - 0x3F *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32[8]
res2	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res2[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res2	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 res2[3];$/;"	m	struct:pwm_ctrl	typeref:typename:u8[3]
res2	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 res2;$/;"	m	struct:qspi_ctrl	typeref:typename:u16
res2	arch/m68k/include/asm/coldfire/skha.h	/^	u32 res2[10];		\/* 0x48 - 0x6F *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32[10]
res2	arch/m68k/include/asm/fsl_i2c.h	/^	u8 res2[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res2	arch/m68k/include/asm/immap_5227x.h	/^	u16 res2;		\/* 0x04 - 0x05 *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u16
res2	arch/m68k/include/asm/immap_5235.h	/^	u32 res2;		\/* 0x0C *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
res2	arch/m68k/include/asm/immap_5235.h	/^	u8 res2[3];		\/* 0x1D - 0x1F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res2	arch/m68k/include/asm/immap_5272.h	/^	char res2[12];$/;"	m	struct:sys_ctrl	typeref:typename:char[12]
res2	arch/m68k/include/asm/immap_5272.h	/^	uchar res2[12];$/;"	m	struct:dma_ctrl	typeref:typename:uchar[12]
res2	arch/m68k/include/asm/immap_5272.h	/^	uchar res2[2];$/;"	m	struct:sdram_ctrl	typeref:typename:uchar[2]
res2	arch/m68k/include/asm/immap_5272.h	/^	uchar res2[4];$/;"	m	struct:gpio_ctrl	typeref:typename:uchar[4]
res2	arch/m68k/include/asm/immap_5272.h	/^	uchar res2[4];$/;"	m	struct:plic_ctrl	typeref:typename:uchar[4]
res2	arch/m68k/include/asm/immap_5272.h	/^	ushort res2;$/;"	m	struct:usb	typeref:typename:ushort
res2	arch/m68k/include/asm/immap_5272.h	/^	ushort res2;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
res2	arch/m68k/include/asm/immap_5275.h	/^	u16 res2;$/;"	m	struct:usb	typeref:typename:u16
res2	arch/m68k/include/asm/immap_5275.h	/^	u32 res2;$/;"	m	struct:sys_ctrl	typeref:typename:u32
res2	arch/m68k/include/asm/immap_5282.h	/^	u32 res2;$/;"	m	struct:scm_ctrl	typeref:typename:u32
res2	arch/m68k/include/asm/immap_5301x.h	/^	u32 res2;		\/* 0x08 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u32
res2	arch/m68k/include/asm/immap_5301x.h	/^	u8 res2[2];		\/* 0x0A - 0x0B *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8[2]
res2	arch/m68k/include/asm/immap_5307.h	/^	u16 res2;$/;"	m	struct:csm	typeref:typename:u16
res2	arch/m68k/include/asm/immap_5307.h	/^	u16 res2;$/;"	m	struct:gpio	typeref:typename:u16
res2	arch/m68k/include/asm/immap_5307.h	/^	u32 res2;$/;"	m	struct:sdramctrl	typeref:typename:u32
res2	arch/m68k/include/asm/immap_5307.h	/^	u8  res2;$/;"	m	struct:sim	typeref:typename:u8
res2	arch/m68k/include/asm/immap_5329.h	/^	u16 res2;		\/* 0x02 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
res2	arch/m68k/include/asm/immap_5329.h	/^	u16 res2;		\/* 0x14 - 0x15 *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u16
res2	arch/m68k/include/asm/immap_5329.h	/^	u32 res2[3];		\/* 0x44 - 0x53 *\/$/;"	m	struct:scm1_ctrl	typeref:typename:u32[3]
res2	arch/m68k/include/asm/immap_5329.h	/^	u32 res2[4];		\/* 0x30 - 0x3F *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32[4]
res2	arch/m68k/include/asm/immap_5329.h	/^	u8 res2;		\/* 0x101 *\/$/;"	m	struct:usb_otg	typeref:typename:u8
res2	arch/m68k/include/asm/immap_5329.h	/^	u8 res2[3];$/;"	m	struct:pll_ctrl	typeref:typename:u8[3]
res2	arch/m68k/include/asm/timer.h	/^	u16 res2;		\/* 0x06 *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
res2	arch/powerpc/cpu/mpc8xx/video.c	/^			res2:2,		\/* Reserved *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:2	file:
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char               res2[196608];	\/* CMF Flash B 192 Kbytes *\/$/;"	m	struct:immap	typeref:typename:char[196608]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char   res2[2];$/;"	m	struct:qsmcm	typeref:typename:char[2]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char   res2[512];$/;"	m	struct:tpu	typeref:typename:char[512]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char res2[12];$/;"	m	struct:uimb	typeref:typename:char[12]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char res2[16];$/;"	m	struct:sitk	typeref:typename:char[16]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char res2[20];$/;"	m	struct:sys_int_timers	typeref:typename:char[20]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char res2[32];$/;"	m	struct:mios	typeref:typename:char[32]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char res2[48];$/;"	m	struct:mem_ctlr	typeref:typename:char[48]
res2	arch/powerpc/include/asm/5xx_immap.h	/^	char res2[4];$/;"	m	struct:tcan	typeref:typename:char[4]
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res2	arch/powerpc/include/asm/immap_8260.h	/^	char	res2[3];$/;"	m	struct:im_spi	typeref:typename:char[3]
res2	arch/powerpc/include/asm/immap_8260.h	/^	char	res2[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
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res2	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res2[0x900];$/;"	m	struct:immap	typeref:typename:u8[0x900]
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res2	arch/powerpc/include/asm/immap_85xx.h	/^	u32 res2;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
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res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[0xf0];$/;"	m	struct:ccsr_bman	typeref:typename:u8[0xf0]
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res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[120];$/;"	m	struct:rio_msg	typeref:typename:u8[120]
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res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[2];$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u8[2]
res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[2];$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u8[2]
res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[32];$/;"	m	struct:ccsr_rio	typeref:typename:u8[32]
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res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[3];$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u8[3]
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res2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res2[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
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res2	drivers/block/dwc_ahsata.c	/^	u32 res2[30];$/;"	m	struct:sata_host_regs	typeref:typename:u32[30]	file:
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res2	drivers/qe/uec.h	/^	u8   res2[0x80-0x74];$/;"	m	struct:uec_tx_global_pram	typeref:typename:u8[]
res2	drivers/timer/omap-timer.c	/^	unsigned char res2[12];$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned char[12]	file:
res2	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res2[1728];$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u8[1728]
res2	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res2[4];$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u8[4]
res2	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res2[4];$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u8[4]
res2	drivers/video/mx3fb.c	/^	u32	res2:2;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:2	file:
res2	drivers/video/mx3fb.c	/^	u32	res2:3;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:3	file:
res2	include/atmel_hlcdc.h	/^	u32	res2;$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32
res2	include/fis.h	/^	u8 res2;$/;"	m	struct:sata_fis_data	typeref:typename:u8
res2	include/fis.h	/^	u8 res2;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u8
res2	include/fis.h	/^	u8 res2;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
res2	include/fis.h	/^	u8 res2;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
res2	include/fis.h	/^	u8 res2[2];$/;"	m	struct:sata_fis_d2h	typeref:typename:u8[2]
res2	include/fis.h	/^	u8 res2[4];$/;"	m	struct:sata_fis_h2d	typeref:typename:u8[4]
res2	include/fsl_dtsec.h	/^	u32	res2[3];$/;"	m	struct:dtsec	typeref:typename:u32[3]
res2	include/fsl_fman.h	/^	u32	res2[0x28];$/;"	m	struct:fm_bmi_common	typeref:typename:u32[0x28]
res2	include/fsl_fman.h	/^	u32	res2[0x4];$/;"	m	struct:fm_fpm	typeref:typename:u32[0x4]
res2	include/fsl_fman.h	/^	u32 res2[0x19];$/;"	m	struct:fm_bmi_tx_port	typeref:typename:u32[0x19]
res2	include/fsl_fman.h	/^	u32 res2[0x23];$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x23]
res2	include/fsl_fman.h	/^	u8			res2[96*1024];$/;"	m	struct:ccsr_fman	typeref:typename:u8[]
res2	include/fsl_ifc.h	/^	u32 res2[0x2];$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32[0x2]
res2	include/fsl_ifc.h	/^	u32 res2[0x2];$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32[0x2]
res2	include/fsl_ifc.h	/^	u32 res2[0x8];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x8]
res2	include/fsl_ifc.h	/^	u8 res2[IFC_CSPR_REG_LEN - IFC_CSPR_USED_LEN];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u8[]
res2	include/fsl_mmdc.h	/^	u32 res2[239];$/;"	m	struct:mmdc_regs	typeref:typename:u32[239]
res2	include/fsl_sec.h	/^	u8	res2[0x2c];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x2c]
res2	include/fsl_tgec.h	/^	u32	res2[4];$/;"	m	struct:tgec	typeref:typename:u32[4]
res2	include/linux/immap_qe.h	/^	u8 res2[0x150];$/;"	m	struct:upc	typeref:typename:u8[0x150]
res2	include/linux/immap_qe.h	/^	u8 res2[0x1];$/;"	m	struct:si1	typeref:typename:u8[0x1]
res2	include/linux/immap_qe.h	/^	u8 res2[0x1];$/;"	m	struct:spi	typeref:typename:u8[0x1]
res2	include/linux/immap_qe.h	/^	u8 res2[0x1];$/;"	m	struct:ucc_slow	typeref:typename:u8[0x1]
res2	include/linux/immap_qe.h	/^	u8 res2[0x200 - 0x091];$/;"	m	struct:ucc_common	typeref:typename:u8[]
res2	include/linux/immap_qe.h	/^	u8 res2[0x20];$/;"	m	struct:qe_ic	typeref:typename:u8[0x20]
res2	include/linux/immap_qe.h	/^	u8 res2[0x38];$/;"	m	struct:sdma	typeref:typename:u8[0x38]
res2	include/linux/immap_qe.h	/^	u8 res2[0x46];$/;"	m	struct:qe_timers	typeref:typename:u8[0x46]
res2	include/linux/immap_qe.h	/^	u8 res2[0x48];$/;"	m	struct:dbg	typeref:typename:u8[0x48]
res2	include/linux/immap_qe.h	/^	u8 res2[0x7];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x7]
res2	include/linux/immap_qe.h	/^	u8 res2[0x8];$/;"	m	struct:cp_qe	typeref:typename:u8[0x8]
res2	include/linux/immap_qe.h	/^	u8 res2[0x8];$/;"	m	struct:ucc_ethernet	typeref:typename:u8[0x8]
res2	include/linux/immap_qe.h	/^	u8 res2[12];$/;"	m	struct:rsp	typeref:typename:u8[12]
res2	include/linux/immap_qe.h	/^	u8 res2[4];$/;"	m	struct:usb_ctlr	typeref:typename:u8[4]
res2	include/linux/mtd/omap_elm.h	/^	u8 res2[64];			\/* 0x8c0 *\/$/;"	m	struct:location	typeref:typename:u8[64]
res2	include/linux/mtd/omap_elm.h	/^	u8 res2[92];				\/* 0x024 *\/$/;"	m	struct:elm	typeref:typename:u8[92]
res2	include/linux/mtd/omap_gpmc.h	/^	u8 res2[0x4];$/;"	m	struct:gpmc	typeref:typename:u8[0x4]
res2	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res2[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res2	include/mpc5xxx.h	/^	volatile u32 res2;		\/* SDMA + 0x60 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
res2	include/tsec.h	/^	u32	res2;$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
res2	include/tsec.h	/^	u32	res2[24];$/;"	m	struct:tsec_hash_regs	typeref:typename:u32[24]
res2	include/tsi148.h	/^	unsigned int res2;   \/* Reserved            *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
res2	include/universe.h	/^	unsigned int res2;   \/* Reserved            *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
res2	include/usb/ehci-ci.h	/^	u8	res2[0x5c];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x5c]
res2	include/usb/mpc8xx_udc.h	/^	ulong res2;	\/* Reserved *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:ulong
res2	post/cpu/mpc8xx/usb.c	/^	uchar res2[4];$/;"	m	struct:usb	typeref:typename:uchar[4]	file:
res20	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res20;$/;"	m	struct:i2c	typeref:typename:unsigned short
res20	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res20[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res20	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res20;$/;"	m	struct:i2c	typeref:typename:unsigned short
res20	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res20;$/;"	m	struct:i2c	typeref:typename:unsigned short
res20	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res20[0x14];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x14]
res20	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res20[0x20c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x20c]
res20	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res20[0x8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8]
res20	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res20[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res20	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res20[0xf4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf4]
res20	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res20[0x14];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x14]
res20	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res20[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res20	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res20[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res20	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res20[0x3c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x3c]
res20	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res20[0x3c];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x3c]
res20	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res20[0x4];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x4]
res20	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res20[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res20	arch/m68k/include/asm/immap_5272.h	/^	ushort res20;$/;"	m	struct:usb	typeref:typename:ushort
res20	arch/m68k/include/asm/immap_5275.h	/^	u16 res20;$/;"	m	struct:usb	typeref:typename:u16
res20	arch/m68k/include/asm/immap_5301x.h	/^	u8 res20;		\/* 0x73 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res20	arch/m68k/include/asm/immap_5329.h	/^	u16 res20;		\/* 0x20 - 0x21 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res20	arch/m68k/include/asm/immap_5329.h	/^	u8 res20;		\/* 0x20 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res20	arch/powerpc/include/asm/immap_8260.h	/^	char	res20[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res20	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res20[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res20	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res20[240];$/;"	m	struct:ccsr_gur	typeref:typename:u8[240]
res20	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res20[312];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[312]
res20	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res20[652];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[652]
res20	arch/powerpc/include/asm/immap_86xx.h	/^	char	res20[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res20	arch/powerpc/include/asm/immap_86xx.h	/^	char	res20[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res20	arch/powerpc/include/asm/immap_86xx.h	/^	char	res20[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res20	arch/powerpc/include/asm/immap_86xx.h	/^	char	res20[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res20	arch/powerpc/include/asm/immap_86xx.h	/^	char	res20[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res20	arch/powerpc/include/asm/immap_86xx.h	/^	char    res20[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res20	include/fsl_ifc.h	/^	u32 res20[0x3];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x3]
res20	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res20[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res200	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res200[0x58];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x58]
res200	include/tsec.h	/^	u32	res200;$/;"	m	struct:tsec	typeref:typename:u32
res208	include/tsec.h	/^	u32	res208[42];$/;"	m	struct:tsec	typeref:typename:u32[42]
res21	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res21;$/;"	m	struct:i2c	typeref:typename:unsigned short
res21	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res21[0x2c];$/;"	m	struct:prcm	typeref:typename:u8[0x2c]
res21	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res21;$/;"	m	struct:i2c	typeref:typename:unsigned short
res21	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res21;$/;"	m	struct:i2c	typeref:typename:unsigned short
res21	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res21[0x1c];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x1c]
res21	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res21[0x2f4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x2f4]
res21	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res21[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res21	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res21[0xb8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xb8]
res21	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res21[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res21	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res21[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res21	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res21[0x8];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x8]
res21	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res21[0xAC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xAC]
res21	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res21[0x8c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x8c]
res21	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res21[0x18];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x18]
res21	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res21[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res21	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res21[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res21	arch/m68k/include/asm/immap_5272.h	/^	ushort res21;$/;"	m	struct:usb	typeref:typename:ushort
res21	arch/m68k/include/asm/immap_5275.h	/^	u16 res21;$/;"	m	struct:usb	typeref:typename:u16
res21	arch/m68k/include/asm/immap_5301x.h	/^	u8 res21[2];		\/* 0x76 - 0x77 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[2]
res21	arch/powerpc/include/asm/immap_8260.h	/^	char	res21[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res21	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res21[0x280];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x280]
res21	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res21[12];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[12]
res21	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res21[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res21	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res21[224];$/;"	m	struct:ccsr_gur	typeref:typename:u8[224]
res21	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res21[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res21	arch/powerpc/include/asm/immap_86xx.h	/^	char	res21[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res21	arch/powerpc/include/asm/immap_86xx.h	/^	char	res21[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res21	arch/powerpc/include/asm/immap_86xx.h	/^	char	res21[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res21	arch/powerpc/include/asm/immap_86xx.h	/^	char	res21[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res21	arch/powerpc/include/asm/immap_86xx.h	/^	char    res21[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res21	arch/powerpc/include/asm/immap_86xx.h	/^	char    res21[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res21	include/fsl_ifc.h	/^	u32 res21[0x1c];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x1c]
res21	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res21[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res22	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res22;$/;"	m	struct:i2c	typeref:typename:unsigned short
res22	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res22[0xbc];$/;"	m	struct:prcm	typeref:typename:u8[0xbc]
res22	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res22;$/;"	m	struct:i2c	typeref:typename:unsigned short
res22	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res22;$/;"	m	struct:i2c	typeref:typename:unsigned short
res22	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res22[0x14];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x14]
res22	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res22[0x100];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x100]
res22	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res22[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res22	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res22[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res22	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res22[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res22	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res22[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res22	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res22[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res22	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res22[0x8];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x8]
res22	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res22[0x10];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x10]
res22	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res22[0x10];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x10]
res22	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res22[0x18];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x18]
res22	arch/m68k/include/asm/immap_5272.h	/^	ushort res22;$/;"	m	struct:usb	typeref:typename:ushort
res22	arch/m68k/include/asm/immap_5275.h	/^	u16 res22;$/;"	m	struct:usb	typeref:typename:u16
res22	arch/powerpc/include/asm/fsl_pci.h	/^	char	res22[4];$/;"	m	struct:ccsr_pci	typeref:typename:char[4]
res22	arch/powerpc/include/asm/immap_8260.h	/^	char	res22[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res22	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res22[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res22	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res22[192];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[192]
res22	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res22[20];$/;"	m	struct:ccsr_gur	typeref:typename:u8[20]
res22	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res22[3564];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[3564]
res22	arch/powerpc/include/asm/immap_86xx.h	/^	char	res22[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res22	arch/powerpc/include/asm/immap_86xx.h	/^	char	res22[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res22	arch/powerpc/include/asm/immap_86xx.h	/^	char	res22[20];$/;"	m	struct:ccsr_rio	typeref:typename:char[20]
res22	arch/powerpc/include/asm/immap_86xx.h	/^	char	res22[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res22	arch/powerpc/include/asm/immap_86xx.h	/^	char    res22[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res22	arch/powerpc/include/asm/immap_86xx.h	/^	char    res22[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res22	include/fsl_ifc.h	/^	u32 res22[0x2];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x2]
res22	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res22[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res23	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res23;$/;"	m	struct:i2c	typeref:typename:unsigned short
res23	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res23[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res23	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res23;$/;"	m	struct:i2c	typeref:typename:unsigned short
res23	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res23;$/;"	m	struct:i2c	typeref:typename:unsigned short
res23	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res23[0x8];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x8]
res23	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res23[0xb4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xb4]
res23	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res23[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res23	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res23[0xec];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xec]
res23	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res23[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res23	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res23[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res23	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res23[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res23	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res23[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res23	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res23[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res23	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res23[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res23	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res23[0x8];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x8]
res23	arch/m68k/include/asm/immap_5272.h	/^	ushort res23;$/;"	m	struct:usb	typeref:typename:ushort
res23	arch/m68k/include/asm/immap_5275.h	/^	u16 res23;$/;"	m	struct:usb	typeref:typename:u16
res23	arch/powerpc/include/asm/fsl_pci.h	/^	char	res23[200];$/;"	m	struct:ccsr_pci	typeref:typename:char[200]
res23	arch/powerpc/include/asm/immap_8260.h	/^	char	res23[88];$/;"	m	struct:pci_config	typeref:typename:char[88]
res23	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res23[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res23	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res23[48];$/;"	m	struct:ccsr_gur	typeref:typename:u8[48]
res23	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res23[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res23	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res23[96];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[96]
res23	arch/powerpc/include/asm/immap_86xx.h	/^	char	res23[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res23	arch/powerpc/include/asm/immap_86xx.h	/^	char	res23[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res23	arch/powerpc/include/asm/immap_86xx.h	/^	char	res23[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res23	arch/powerpc/include/asm/immap_86xx.h	/^	char	res23[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res23	arch/powerpc/include/asm/immap_86xx.h	/^	char    res23[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res23	arch/powerpc/include/asm/immap_86xx.h	/^	char    res23[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res23	include/fsl_ifc.h	/^	u32 res23;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res23	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res23[0x6c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x6c]
res24	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res24[0x2c];$/;"	m	struct:prcm	typeref:typename:u8[0x2c]
res24	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res24[0x20];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x20]
res24	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res24[0x5f8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x5f8]
res24	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res24[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res24	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res24[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res24	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res24[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res24	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res24[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res24	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res24[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res24	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res24[0xdebc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xdebc]
res24	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res24[0x30];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x30]
res24	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res24[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res24	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res24[0x8];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x8]
res24	arch/m68k/include/asm/immap_5272.h	/^	ushort res24;$/;"	m	struct:usb	typeref:typename:ushort
res24	arch/m68k/include/asm/immap_5275.h	/^	u16 res24;$/;"	m	struct:usb	typeref:typename:u16
res24	arch/m68k/include/asm/immap_5329.h	/^	u16 res24[3];		\/* 0x24 - 0x29 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16[3]
res24	arch/powerpc/include/asm/fsl_pci.h	/^	char	res24[16];$/;"	m	struct:ccsr_pci	typeref:typename:char[16]
res24	arch/powerpc/include/asm/immap_8260.h	/^	char	res24[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res24	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res24[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res24	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res24[492];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[492]
res24	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res24[64];$/;"	m	struct:ccsr_gur	typeref:typename:u8[64]
res24	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res24[96];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[96]
res24	arch/powerpc/include/asm/immap_86xx.h	/^	char	res24[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res24	arch/powerpc/include/asm/immap_86xx.h	/^	char	res24[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res24	arch/powerpc/include/asm/immap_86xx.h	/^	char	res24[2716];$/;"	m	struct:ccsr_rio	typeref:typename:char[2716]
res24	arch/powerpc/include/asm/immap_86xx.h	/^	char	res24[716];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[716]
res24	arch/powerpc/include/asm/immap_86xx.h	/^	char    res24[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res24	arch/powerpc/include/asm/immap_86xx.h	/^	char    res24[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res24	include/fsl_ifc.h	/^	u32 res24[0x1c];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x1c]
res24	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res24[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res240	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res240[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res244	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res244[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res25	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res25[0xbc];$/;"	m	struct:prcm	typeref:typename:u8[0xbc]
res25	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res25[0x10];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x10]
res25	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res25[0x14];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x14]
res25	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res25[0xb8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xb8]
res25	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res25[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res25	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res25[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res25	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res25[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res25	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res25[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res25	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res25[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res25	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res25[0xc];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0xc]
res25	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res25[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res25	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res25[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res25	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res25[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res25	arch/m68k/include/asm/immap_5272.h	/^	ushort res25;$/;"	m	struct:usb	typeref:typename:ushort
res25	arch/m68k/include/asm/immap_5275.h	/^	u16 res25;$/;"	m	struct:usb	typeref:typename:u16
res25	arch/powerpc/include/asm/fsl_pci.h	/^	char	res25[228];$/;"	m	struct:ccsr_pci	typeref:typename:char[228]
res25	arch/powerpc/include/asm/immap_8260.h	/^	char	res25[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res25	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res25[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res25	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res25[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res25	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res25[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res25	arch/powerpc/include/asm/immap_86xx.h	/^	char	res25[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res25	arch/powerpc/include/asm/immap_86xx.h	/^	char	res25[452];$/;"	m	struct:ccsr_pex	typeref:typename:char[452]
res25	arch/powerpc/include/asm/immap_86xx.h	/^	char	res25[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res25	arch/powerpc/include/asm/immap_86xx.h	/^	char	res25[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res25	arch/powerpc/include/asm/immap_86xx.h	/^	char	res25[8];$/;"	m	struct:ccsr_rio	typeref:typename:char[8]
res25	arch/powerpc/include/asm/immap_86xx.h	/^	char    res25[192];$/;"	m	struct:ccsr_tsec	typeref:typename:char[192]
res25	include/fsl_ifc.h	/^	u32 res25;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res25	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res25[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res26	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res26[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res26	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res26[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res26	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res26[0x14];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x14]
res26	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res26[0x18];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x18]
res26	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res26[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res26	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res26[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res26	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res26[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res26	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res26[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res26	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res26[0x1c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x1c]
res26	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res26[0x38];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x38]
res26	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res26[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res26	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res26[0x8];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x8]
res26	arch/m68k/include/asm/immap_5272.h	/^	ushort res26;$/;"	m	struct:usb	typeref:typename:ushort
res26	arch/m68k/include/asm/immap_5275.h	/^	u16 res26;$/;"	m	struct:usb	typeref:typename:u16
res26	arch/m68k/include/asm/immap_5329.h	/^	u16 res26;		\/* 0x26 - 0x27 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res26	arch/powerpc/include/asm/immap_8260.h	/^	char	res26[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res26	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res26[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res26	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res26[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res26	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res26[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res26	arch/powerpc/include/asm/immap_86xx.h	/^	char	res26[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res26	arch/powerpc/include/asm/immap_86xx.h	/^	char	res26[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res26	arch/powerpc/include/asm/immap_86xx.h	/^	char	res26[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res26	arch/powerpc/include/asm/immap_86xx.h	/^	char	res26[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res26	arch/powerpc/include/asm/immap_86xx.h	/^	char	res26[8];$/;"	m	struct:ccsr_tsec	typeref:typename:char[8]
res26	arch/powerpc/include/asm/immap_86xx.h	/^	char    res26[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res26	include/fsl_ifc.h	/^	u32 res26[0x3C];$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32[0x3C]
res26	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res26[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res27	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res27[0x2c];$/;"	m	struct:prcm	typeref:typename:u8[0x2c]
res27	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res27[0x18];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x18]
res27	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res27[0x1c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1c]
res27	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res27[0xb8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xb8]
res27	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res27[0xdc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xdc]
res27	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res27[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res27	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res27[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res27	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res27[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res27	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res27[0x3c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x3c]
res27	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res27[0x8];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x8]
res27	arch/m68k/include/asm/immap_5272.h	/^	ushort res27;$/;"	m	struct:usb	typeref:typename:ushort
res27	arch/m68k/include/asm/immap_5275.h	/^	u16 res27;$/;"	m	struct:usb	typeref:typename:u16
res27	arch/powerpc/include/asm/immap_8260.h	/^	char	res27[344];$/;"	m	struct:pci_config	typeref:typename:char[344]
res27	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res27[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res27	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res27[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res27	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res27[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res27	arch/powerpc/include/asm/immap_86xx.h	/^	char	res27[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res27	arch/powerpc/include/asm/immap_86xx.h	/^	char	res27[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res27	arch/powerpc/include/asm/immap_86xx.h	/^	char	res27[24];$/;"	m	struct:ccsr_tsec	typeref:typename:char[24]
res27	arch/powerpc/include/asm/immap_86xx.h	/^	char	res27[44];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[44]
res27	arch/powerpc/include/asm/immap_86xx.h	/^	char	res27[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res27	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res27[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res274	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res274[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res28	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res28[0xfc];$/;"	m	struct:prcm	typeref:typename:u8[0xfc]
res28	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res28[0x10];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x10]
res28	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res28[0x18];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x18]
res28	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res28[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res28	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res28[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res28	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res28[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res28	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res28[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res28	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res28[0x3c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x3c]
res28	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res28[0x8];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x8]
res28	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res28[0xc];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xc]
res28	arch/m68k/include/asm/immap_5272.h	/^	ushort res28;$/;"	m	struct:usb	typeref:typename:ushort
res28	arch/m68k/include/asm/immap_5275.h	/^	u16 res28;$/;"	m	struct:usb	typeref:typename:u16
res28	arch/powerpc/include/asm/immap_8260.h	/^	char	res28[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res28	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res28[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res28	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res28[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res28	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res28[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res28	arch/powerpc/include/asm/immap_86xx.h	/^	char	res28[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res28	arch/powerpc/include/asm/immap_86xx.h	/^	char	res28[16];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[16]
res28	arch/powerpc/include/asm/immap_86xx.h	/^	char	res28[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res28	arch/powerpc/include/asm/immap_86xx.h	/^	char	res28[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res28	arch/powerpc/include/asm/immap_86xx.h	/^	char	res28[56];$/;"	m	struct:ccsr_tsec	typeref:typename:char[56]
res28	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res28[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res29	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res29[0x2bc];$/;"	m	struct:prcm	typeref:typename:u8[0x2bc]
res29	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res29[0x1e0];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x1e0]
res29	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res29[0x18];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x18]
res29	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res29[0x28];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x28]
res29	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res29[0x5f8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x5f8]
res29	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res29[0xf78];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf78]
res29	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res29[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res29	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res29[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res29	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res29[0x3c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x3c]
res29	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res29[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res29	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res29[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res29	arch/m68k/include/asm/immap_5272.h	/^	ushort res29;$/;"	m	struct:usb	typeref:typename:ushort
res29	arch/m68k/include/asm/immap_5275.h	/^	u16 res29;$/;"	m	struct:usb	typeref:typename:u16
res29	arch/powerpc/include/asm/immap_8260.h	/^	char	res29[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res29	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res29[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res29	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res29[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res29	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res29[8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[8]
res29	arch/powerpc/include/asm/immap_86xx.h	/^	char	res29[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res29	arch/powerpc/include/asm/immap_86xx.h	/^	char	res29[3476];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[3476]
res29	arch/powerpc/include/asm/immap_86xx.h	/^	char	res29[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res29	arch/powerpc/include/asm/immap_86xx.h	/^	char	res29[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res29	arch/powerpc/include/asm/immap_86xx.h	/^	char    res29[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res29	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res29[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res2_1	arch/powerpc/include/asm/immap_86xx.h	/^	char    res2_1[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res2b8	include/tsec.h	/^	u32	res2b8[18];$/;"	m	struct:tsec	typeref:typename:u32[18]
res3	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res3[9];$/;"	m	struct:i2c	typeref:typename:unsigned short[9]
res3	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 res3[0x32];$/;"	m	struct:sysctrl	typeref:typename:u32[0x32]
res3	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 res3[0x35];$/;"	m	struct:wdt	typeref:typename:u32[0x35]
res3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res3;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
res3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res3[2];$/;"	m	struct:mmdc_p_regs	typeref:typename:u32[2]
res3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res3[2];$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32[2]
res3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res3[2];$/;"	m	struct:mx6sdl_iomux_ddr_regs	typeref:typename:u32[2]
res3	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res3[6];$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32[6]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x08];$/;"	m	struct:ctrl	typeref:typename:u8[0x08]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x18];$/;"	m	struct:sdrc	typeref:typename:u8[0x18]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x1c];$/;"	m	struct:prm	typeref:typename:u8[0x1c]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x4];$/;"	m	struct:dma4	typeref:typename:u8[0x4]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x4];$/;"	m	struct:pm	typeref:typename:u8[0x4]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x4];$/;"	m	struct:sdrc_cs	typeref:typename:u8[0x4]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x84];$/;"	m	struct:sms	typeref:typename:u8[0x84]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res3[0x8bc];$/;"	m	struct:prcm	typeref:typename:u8[0x8bc]
res3	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned char res3[32];$/;"	m	struct:emif4	typeref:typename:unsigned char[32]
res3	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res3;$/;"	m	struct:i2c	typeref:typename:unsigned short
res3	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned char res3[0x16C];	\/* 0x2DC *\/$/;"	m	struct:t2	typeref:typename:unsigned char[0x16C]
res3	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res3[9];$/;"	m	struct:i2c	typeref:typename:unsigned short[9]
res3	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res3[9];$/;"	m	struct:i2c	typeref:typename:unsigned short[9]
res3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res3[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res3;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res3;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res3[11];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[11]
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res3[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res3[3];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[3]
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res3[3];$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8[3]
res3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res3[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res3	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res3[0xc];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u8 res3[0xc];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res3[0xc];		\/* 0x194 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res3[0x0c];			\/* 0x0c4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x0c]
res3	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res3[0x28];			\/* 0x218 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x28]
res3	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res3[0x44];			\/* 0xac *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x44]
res3	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res3[0xc];			\/* 0x874 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch-sunxi/display2.h	/^	u8 res3[0x44];			\/* 0xac *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x44]
res3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res3[0x138];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x138]
res3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res3[0x0c];		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x0c]
res3	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res3[0x3c];		\/* 0x144 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x3c]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res3[0x18];		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x18]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res3[0x2c];		\/* 0x194 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x2c]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8  res3[0x20];		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res3[0x10];		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x10]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8  res3[0x20];		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res3[0x10];		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x10]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8  res3[0x20];		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res3	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res3[0x72c];		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x72c]
res3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res3[0x10];		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x10]
res3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res3[0x8];		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res3	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res3[0x8];		\/* 0x048 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x8]
res3	arch/arm/include/asm/arch-sunxi/timer.h	/^	u8 res3[16];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[16]
res3	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	res3[4];	\/* RESERVED, offset 4Ch-4Fh *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char[4]
res3	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res3[0xc];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch/clock_sun6i.h	/^	u8 res3[0xc];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res3[0xc];		\/* 0x194 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch/display.h	/^	u8 res3[0x0c];			\/* 0x0c4 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x0c]
res3	arch/arm/include/asm/arch/display.h	/^	u8 res3[0x28];			\/* 0x218 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x28]
res3	arch/arm/include/asm/arch/display.h	/^	u8 res3[0x44];			\/* 0xac *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x44]
res3	arch/arm/include/asm/arch/display.h	/^	u8 res3[0xc];			\/* 0x874 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0xc]
res3	arch/arm/include/asm/arch/display2.h	/^	u8 res3[0x44];			\/* 0xac *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x44]
res3	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res3[0x138];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x138]
res3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res3[0x0c];		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x0c]
res3	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res3[0x3c];		\/* 0x144 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x3c]
res3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res3[0x18];		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x18]
res3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res3[0x2c];		\/* 0x194 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x2c]
res3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8  res3[0x20];		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res3	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res3[0x10];		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x10]
res3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8  res3[0x20];		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res3	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res3[0x10];		\/* 0xb0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x10]
res3	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8  res3[0x20];		\/* 0x9c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x20]
res3	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res3[0x72c];		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x72c]
res3	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res3[0x10];		\/* 0x78 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x10]
res3	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res3[0x8];		\/* 0x28 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res3	arch/arm/include/asm/arch/prcm.h	/^	u8 res3[0x8];		\/* 0x048 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x8]
res3	arch/arm/include/asm/arch/timer.h	/^	u8 res3[16];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[16]
res3	arch/arm/include/asm/omap_mmc.h	/^	unsigned char res3[0xD4];$/;"	m	struct:hsmmc	typeref:typename:unsigned char[0xD4]
res3	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 res3[5];	\/* 0x1EC ~ 0x1FC *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[5]
res3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res3[0x1fc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fc]
res3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res3[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res3[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res3[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res3[0x8];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0x8]
res3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res3[0x8];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x8]
res3	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res3[4];$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned char[4]
res3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res3[0x288];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x288]
res3	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res3;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
res3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res3[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res3[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	res3;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
res3	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned char	res3[0xffd0];$/;"	m	struct:s5p_uart	typeref:typename:unsigned char[0xffd0]
res3	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res3[0xc];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0xc]
res3	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res3[0xf0];$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned char[0xf0]
res3	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned char	res3[0x3d0];$/;"	m	struct:s5p_uart	typeref:typename:unsigned char[0x3d0]
res3	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res3[3];		\/* 0x404 - 0F *\/$/;"	m	struct:xbs	typeref:typename:u32[3]
res3	arch/m68k/include/asm/coldfire/edma.h	/^	u16 res3[3];		\/* 0x20 - 0x25 *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16[3]
res3	arch/m68k/include/asm/coldfire/eport.h	/^	u8 res3[3];	\/* 0x0D *\/$/;"	m	struct:eport	typeref:typename:u8[3]
res3	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res3;$/;"	m	struct:fbcs	typeref:typename:u16
res3	arch/m68k/include/asm/coldfire/flexcan.h	/^	u16 res3;		\/* 0x20 *\/$/;"	m	struct:can_ctrl	typeref:typename:u16
res3	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 res3[3];		\/* 0x28 - 0x33 *\/$/;"	m	struct:can_ctrl	typeref:typename:u32[3]
res3	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 res3[24];		\/* 0x80 - 0xDF *\/$/;"	m	struct:int0_ctrl	typeref:typename:u32[24]
res3	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 res3[8];		\/* 0x20 - 0x3F *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32[8]
res3	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res3[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res3	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 res3[7];$/;"	m	struct:pwm_ctrl	typeref:typename:u8[7]
res3	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 res3;$/;"	m	struct:qspi_ctrl	typeref:typename:u16
res3	arch/m68k/include/asm/fsl_i2c.h	/^	u8 res3[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res3	arch/m68k/include/asm/immap_5227x.h	/^	u8 res3[3];		\/* 0x08 - 0x0A *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u8[3]
res3	arch/m68k/include/asm/immap_5235.h	/^	u32 res3;		\/* 0x18 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
res3	arch/m68k/include/asm/immap_5235.h	/^	u8 res3[3];		\/* 0x2D - 0x2F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res3	arch/m68k/include/asm/immap_5272.h	/^	uchar res3;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
res3	arch/m68k/include/asm/immap_5272.h	/^	uchar res3[120];$/;"	m	struct:sdram_ctrl	typeref:typename:uchar[120]
res3	arch/m68k/include/asm/immap_5272.h	/^	ushort res3;$/;"	m	struct:usb	typeref:typename:ushort
res3	arch/m68k/include/asm/immap_5272.h	/^	ushort res3;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
res3	arch/m68k/include/asm/immap_5275.h	/^	u16 res3;$/;"	m	struct:usb	typeref:typename:u16
res3	arch/m68k/include/asm/immap_5275.h	/^	u8 res3[8];$/;"	m	struct:sys_ctrl	typeref:typename:u8[8]
res3	arch/m68k/include/asm/immap_5282.h	/^	u32 res3;$/;"	m	struct:scm_ctrl	typeref:typename:u32
res3	arch/m68k/include/asm/immap_5301x.h	/^	u16 res3;		\/* 0x14 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
res3	arch/m68k/include/asm/immap_5301x.h	/^	u8 res3[3];		\/* 0x25 - 0x27 *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8[3]
res3	arch/m68k/include/asm/immap_5307.h	/^	u16 res3;$/;"	m	struct:csm	typeref:typename:u16
res3	arch/m68k/include/asm/immap_5307.h	/^	u16 res3;$/;"	m	struct:sim	typeref:typename:u16
res3	arch/m68k/include/asm/immap_5329.h	/^	u32 res3;		\/* 0x08 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u32
res3	arch/m68k/include/asm/immap_5329.h	/^	u32 res3[2];		\/* 0x4C - 0x53 *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32[2]
res3	arch/m68k/include/asm/immap_5329.h	/^	u32 res3[5];		\/* 0x10C - 0x11F *\/$/;"	m	struct:usb_otg	typeref:typename:u32[5]
res3	arch/m68k/include/asm/immap_5329.h	/^	u8 res3[3];		\/* 0x18 - 0x1A *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8[3]
res3	arch/m68k/include/asm/immap_5329.h	/^	u8 res3[3];$/;"	m	struct:pll_ctrl	typeref:typename:u8[3]
res3	arch/m68k/include/asm/timer.h	/^	u16 res3;		\/* 0x0A *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char               res3[2670592];	\/* Reserved for Flash *\/$/;"	m	struct:immap	typeref:typename:char[2670592]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char   res3[212];$/;"	m	struct:qsmcm	typeref:typename:char[212]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char res3[132];$/;"	m	struct:mem_ctlr	typeref:typename:char[132]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char res3[16];$/;"	m	struct:mios	typeref:typename:char[16]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char res3[192];$/;"	m	struct:sys_conf	typeref:typename:char[192]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char res3[2];$/;"	m	struct:sys_int_timers	typeref:typename:char[2]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char res3[56];$/;"	m	struct:sitk	typeref:typename:char[56]
res3	arch/powerpc/include/asm/5xx_immap.h	/^	char res3[88];$/;"	m	struct:tcan	typeref:typename:char[88]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3;$/;"	m	struct:scc	typeref:typename:char
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[0x10];$/;"	m	struct:sys_int_timers	typeref:typename:char[0x10]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[0x38];$/;"	m	struct:sitk	typeref:typename:char[0x38]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[0x4c];$/;"	m	struct:sys_conf	typeref:typename:char[0x4c]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[0x80];$/;"	m	struct:mem_ctlr	typeref:typename:char[0x80]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[2];$/;"	m	struct:io_port	typeref:typename:char[2]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[3];$/;"	m	struct:smc	typeref:typename:char[3]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	char	res3[4];$/;"	m	struct:pcmcia_conf	typeref:typename:char[4]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res3;$/;"	m	struct:vid823	typeref:typename:u_char
res3	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res3[4];$/;"	m	struct:comm_proc	typeref:typename:u_char[4]
res3	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res3[10];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[10]
res3	arch/powerpc/include/asm/fsl_dma.h	/^	char	res3[4];$/;"	m	struct:fsl_dma	typeref:typename:char[4]
res3	arch/powerpc/include/asm/fsl_dma.h	/^	char	res3[84];$/;"	m	struct:fsl_dma	typeref:typename:char[84]
res3	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 res3[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res3	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res3[8];$/;"	m	struct:fsl_lbc	typeref:typename:u8[8]
res3	arch/powerpc/include/asm/immap_512x.h	/^	u32 res3[0x09];$/;"	m	struct:pata512x	typeref:typename:u32[0x09]
res3	arch/powerpc/include/asm/immap_512x.h	/^	u8			res3[0x500];$/;"	m	struct:immap	typeref:typename:u8[0x500]
res3	arch/powerpc/include/asm/immap_512x.h	/^	u8 res3[0x18];$/;"	m	struct:sysconf512x	typeref:typename:u8[0x18]
res3	arch/powerpc/include/asm/immap_512x.h	/^	u8 res3[0x380];$/;"	m	struct:iim512x	typeref:typename:u8[0x380]
res3	arch/powerpc/include/asm/immap_512x.h	/^	u8 res3[4];$/;"	m	struct:pcictrl512x	typeref:typename:u8[4]
res3	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res3[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res3	arch/powerpc/include/asm/immap_8260.h	/^			char		res3[16 * 1024];$/;"	m	struct:immap::__anondc7ba4bd010a::__anondc7ba4bd0208	typeref:typename:char[]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3;$/;"	m	struct:cpmux	typeref:typename:char
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3;$/;"	m	struct:scc	typeref:typename:char
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3;$/;"	m	struct:siram	typeref:typename:char
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[12];$/;"	m	struct:io_port	typeref:typename:char[12]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[2];$/;"	m	struct:comm_proc	typeref:typename:char[2]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[2];$/;"	m	struct:fcc	typeref:typename:char[2]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[2];$/;"	m	struct:im_spi	typeref:typename:char[2]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[3];$/;"	m	struct:smc	typeref:typename:char[3]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[3];$/;"	m	struct:sys_conf	typeref:typename:char[3]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[4];$/;"	m	struct:sys_int_timers	typeref:typename:char[4]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[584];$/;"	m	struct:cpm_timers	typeref:typename:char[584]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[7];$/;"	m	struct:mcc	typeref:typename:char[7]
res3	arch/powerpc/include/asm/immap_8260.h	/^	char	res3[8];$/;"	m	struct:mem_ctlr	typeref:typename:char[8]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u32 res3[0x5];		\/* 0x6C-0x79 reserved *\/$/;"	m	struct:dma83xx	typeref:typename:u32[0x5]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res3[0x1000];$/;"	m	struct:immap	typeref:typename:u8[0x1000]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res3[0x1300];$/;"	m	struct:immap	typeref:typename:u8[0x1300]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res3[0x200];$/;"	m	struct:immap	typeref:typename:u8[0x200]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res3[0x400];$/;"	m	struct:immap	typeref:typename:u8[0x400]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res3[0x900];$/;"	m	struct:immap	typeref:typename:u8[0x900]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res3[0x10];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0x10]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res3[0x14];$/;"	m	struct:ddr83xx	typeref:typename:u8[0x14]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res3[0x98];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x98]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res3[4];$/;"	m	struct:pcictrl83xx	typeref:typename:u8[4]
res3	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res3[4];$/;"	m	struct:pex83xx	typeref:typename:u8[4]
res3	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res3;$/;"	m	struct:serdes_corenet::serdes_lane	typeref:typename:u32
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res3[2];$/;"	m	struct:cpc_corenet	typeref:typename:u32[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res3[3];$/;"	m	struct:serdes_corenet	typeref:typename:u32[3]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u32 res3[245];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[245]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u8
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[0x1e8];$/;"	m	struct:ccsr_pme	typeref:typename:u8[0x1e8]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[0x8];$/;"	m	struct:ccsr_qman	typeref:typename:u8[0x8]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[0xbd4];$/;"	m	struct:ccsr_local	typeref:typename:u8[0xbd4]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[124];$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u8[124]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[12];$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u8[12]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[12];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[12]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[12];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[12]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[12];$/;"	m	struct:rio_arch	typeref:typename:u8[12]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[20];$/;"	m	struct:rio_impl_port_spec	typeref:typename:u8[20]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[239];$/;"	m	struct:ccsr_duart	typeref:typename:u8[239]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2964];$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u8[2964]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2];$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u8[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2];$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u8[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2];$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u8[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2];$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u8[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2];$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u8[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[2];$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u8[2]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[3];$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8[3]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[608];$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u8[608]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[63808];$/;"	m	struct:ccsr_rio	typeref:typename:u8[63808]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[88];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[88]
res3	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res3[92];$/;"	m	struct:rio_impl_common	typeref:typename:u8[92]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[12];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[12]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[239];$/;"	m	struct:ccsr_duart	typeref:typename:char[239]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[3016];$/;"	m	struct:ccsr_pex	typeref:typename:char[3016]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char	res3[88];$/;"	m	struct:ccsr_tsec	typeref:typename:char[88]
res3	arch/powerpc/include/asm/immap_86xx.h	/^	char                    res3[8192];$/;"	m	struct:immap	typeref:typename:char[8192]
res3	arch/x86/include/asm/acpi_table.h	/^	u8 res3;$/;"	m	struct:acpi_fadt	typeref:typename:u8
res3	board/freescale/common/pixis.h	/^	u8 res3;$/;"	m	struct:pixis	typeref:typename:u8
res3	board/freescale/common/pixis.h	/^	u8 res3[2];$/;"	m	struct:pixis	typeref:typename:u8[2]
res3	board/freescale/common/pixis.h	/^	u8 res3[36];$/;"	m	struct:pixis	typeref:typename:u8[36]
res3	board/freescale/common/qixis.h	/^	u8 res3[8];$/;"	m	struct:qixis	typeref:typename:u8[8]
res3	board/freescale/p1010rdb/p1010rdb.c	/^	u8 res3[1];$/;"	m	struct:cpld_data	typeref:typename:u8[1]	file:
res3	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 res3[4];          \/* 0x4A *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8[4]
res3	board/keymile/common/common.h	/^	unsigned char	res3[0xfff0];$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char[0xfff0]
res3	cmd/booti.c	/^	uint64_t	res3;		\/* reserved *\/$/;"	m	struct:Image_header	typeref:typename:uint64_t	file:
res3	drivers/block/dwc_ahsata.c	/^	u32 res3[1];$/;"	m	struct:sata_port_regs	typeref:typename:u32[1]	file:
res3	drivers/block/dwc_ahsata.c	/^	u32 res3[2];$/;"	m	struct:sata_host_regs	typeref:typename:u32[2]	file:
res3	drivers/block/fsl_sata.h	/^	u8 res3[0x4];$/;"	m	struct:fsl_sata_reg	typeref:typename:u8[0x4]
res3	drivers/crypto/ace_sha.h	/^	unsigned int	res3;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
res3	drivers/net/fec_mxc.h	/^	uint32_t res3[6];		\/* MBAR_ETH + 0x028-03C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[6]
res3	drivers/qe/uec.h	/^	u8   res3[0x1];$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u8[0x1]
res3	drivers/qe/uec.h	/^	u8   res3[0x30-0x28];$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8[]
res3	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res3[4];$/;"	m	struct:dwc2_dev_in_endp	typeref:typename:u8[4]
res3	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res3[4];$/;"	m	struct:dwc2_dev_out_endp	typeref:typename:u8[4]
res3	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res3[4];$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u8[4]
res3	drivers/video/mx3fb.c	/^	u32	res3:28;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:28	file:
res3	drivers/video/mx3fb.c	/^	u32	res3:28;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:28	file:
res3	include/atmel_hlcdc.h	/^	u32	res3[3];$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32[3]
res3	include/fis.h	/^	u32 res3;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u32
res3	include/fis.h	/^	u8 res3;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
res3	include/fis.h	/^	u8 res3[4];$/;"	m	struct:sata_fis_d2h	typeref:typename:u8[4]
res3	include/fis.h	/^	u8 res3[4];$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8[4]
res3	include/fsl_dtsec.h	/^	u32	res3[11];$/;"	m	struct:dtsec	typeref:typename:u32[11]
res3	include/fsl_fman.h	/^	u32	res3;$/;"	m	struct:fm_bmi_common	typeref:typename:u32
res3	include/fsl_fman.h	/^	u32	res3[0x2];$/;"	m	struct:fm_qmi_common	typeref:typename:u32[0x2]
res3	include/fsl_fman.h	/^	u32	res3[0x3];$/;"	m	struct:fm_fpm	typeref:typename:u32[0x3]
res3	include/fsl_fman.h	/^	u32 res3[0x8];$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x8]
res3	include/fsl_ifc.h	/^	u32 res3;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res3	include/fsl_ifc.h	/^	u32 res3[0x2];$/;"	m	struct:fsl_ifc_gpcm	typeref:typename:u32[0x2]
res3	include/fsl_ifc.h	/^	u32 res3[0x2];$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32[0x2]
res3	include/fsl_ifc.h	/^	u8 res3[IFC_AMASK_REG_LEN - IFC_AMASK_USED_LEN];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u8[]
res3	include/fsl_mmdc.h	/^	u32 res3[2];$/;"	m	struct:mmdc_regs	typeref:typename:u32[2]
res3	include/fsl_sec.h	/^	u8	res3[0x1c];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x1c]
res3	include/fsl_tgec.h	/^	u32	res3[4];$/;"	m	struct:tgec	typeref:typename:u32[4]
res3	include/linux/immap_qe.h	/^	u8 res3[0x180 - 0x15A];$/;"	m	struct:ucc_ethernet	typeref:typename:u8[]
res3	include/linux/immap_qe.h	/^	u8 res3[0x1C];$/;"	m	struct:qe_ic	typeref:typename:u8[0x1C]
res3	include/linux/immap_qe.h	/^	u8 res3[0x1];$/;"	m	struct:si1	typeref:typename:u8[0x1]
res3	include/linux/immap_qe.h	/^	u8 res3[0x24];$/;"	m	struct:ucc_slow	typeref:typename:u8[0x24]
res3	include/linux/immap_qe.h	/^	u8 res3[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res3	include/linux/immap_qe.h	/^	u8 res3[0x2];$/;"	m	struct:spi	typeref:typename:u8[0x2]
res3	include/linux/immap_qe.h	/^	u8 res3[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res3	include/linux/immap_qe.h	/^	u8 res3[2];$/;"	m	struct:usb_ctlr	typeref:typename:u8[2]
res3	include/linux/immap_qe.h	/^	u8 res3[4];$/;"	m	struct:rsp	typeref:typename:u8[4]
res3	include/linux/mtd/omap_elm.h	/^	u8 res3[892];				\/* 0x084 *\/$/;"	m	struct:elm	typeref:typename:u8[892]
res3	include/linux/mtd/omap_gpmc.h	/^	u8 res3[0x20];$/;"	m	struct:gpmc	typeref:typename:u8[0x20]
res3	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res3[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res3	include/mpc5xxx.h	/^	volatile u32 res3;		\/* SDMA + 0x64 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
res3	include/tsi148.h	/^	unsigned int res3;   \/* Reserved                             *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
res3	include/universe.h	/^	unsigned int res3;   \/* Reserved                             *\/$/;"	m	struct:_TDMA_CMD_PACKET	typeref:typename:unsigned int
res3	include/usb/ehci-ci.h	/^	u8	res3[0x1];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x1]
res3	include/usb/mpc8xx_udc.h	/^	ushort res3;	\/* Reserved *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:ushort
res3	post/cpu/mpc8xx/usb.c	/^	uchar res3[2];$/;"	m	struct:usb	typeref:typename:uchar[2]	file:
res30	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res30[0xc];$/;"	m	struct:prcm	typeref:typename:u8[0xc]
res30	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res30[0x10];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x10]
res30	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res30[0x14];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x14]
res30	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res30[0x24fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x24fc]
res30	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res30[0x8c];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x8c]
res30	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res30[0xb4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xb4]
res30	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res30[0xac];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xac]
res30	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res30[0xac];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xac]
res30	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res30[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res30	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res30[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res30	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res30[0xc5c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xc5c]
res30	arch/m68k/include/asm/immap_5272.h	/^	ushort res30;$/;"	m	struct:usb	typeref:typename:ushort
res30	arch/m68k/include/asm/immap_5275.h	/^	u16 res30;$/;"	m	struct:usb	typeref:typename:u16
res30	arch/m68k/include/asm/immap_5329.h	/^	u8 res30;		\/* 0x30 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res30	arch/powerpc/include/asm/immap_8260.h	/^	char	res30[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res30	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res30[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res30	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res30[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res30	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res30[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res30	arch/powerpc/include/asm/immap_86xx.h	/^	char	res30[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res30	arch/powerpc/include/asm/immap_86xx.h	/^	char	res30[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res30	arch/powerpc/include/asm/immap_86xx.h	/^	char	res30[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res30	arch/powerpc/include/asm/immap_86xx.h	/^	char	res30[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res30	arch/powerpc/include/asm/immap_86xx.h	/^	char    res30[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res30	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res30[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res300	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res300[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res301	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res301[0x14];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x14]
res302	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res302[0xa4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xa4]
res303	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res303[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res304	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res304[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res305	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res305[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res306	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res306[0xddb4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xddb4]
res308	include/tsec.h	/^	u32	res308;$/;"	m	struct:tsec	typeref:typename:u32
res31	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res31[0x18];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x18]
res31	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res31[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res31	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res31[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res31	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res31[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res31	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res31[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res31	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res31[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res31	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res31[0x74];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x74]
res31	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res31[0x8];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x8]
res31	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res31[0x8];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x8]
res31	arch/m68k/include/asm/immap_5272.h	/^	ushort res31;$/;"	m	struct:usb	typeref:typename:ushort
res31	arch/m68k/include/asm/immap_5275.h	/^	u16 res31;$/;"	m	struct:usb	typeref:typename:u16
res31	arch/powerpc/include/asm/immap_8260.h	/^	char	res31[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res31	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res31[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res31	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res31[184];$/;"	m	struct:ccsr_gur	typeref:typename:u8[184]
res31	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res31[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res31	arch/powerpc/include/asm/immap_86xx.h	/^	char	res31[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res31	arch/powerpc/include/asm/immap_86xx.h	/^	char	res31[488];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[488]
res31	arch/powerpc/include/asm/immap_86xx.h	/^	char	res31[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res31	arch/powerpc/include/asm/immap_86xx.h	/^	char	res31[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res31	arch/powerpc/include/asm/immap_86xx.h	/^	char    res31[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res31	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res31[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res310	include/tsec.h	/^	u32	res310[4];$/;"	m	struct:tsec	typeref:typename:u32[4]
res31a	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res31a[56];$/;"	m	struct:ccsr_gur	typeref:typename:u8[56]
res32	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res32[0x18];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x18]
res32	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res32[0x1c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1c]
res32	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res32[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res32	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res32[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res32	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res32[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res32	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res32[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res32	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res32[0x37c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x37c]
res32	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res32[0x44];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x44]
res32	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res32[0x8];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x8]
res32	arch/m68k/include/asm/immap_5272.h	/^	ushort res32;$/;"	m	struct:usb	typeref:typename:ushort
res32	arch/m68k/include/asm/immap_5275.h	/^	u16 res32;$/;"	m	struct:usb	typeref:typename:u16
res32	arch/powerpc/include/asm/immap_8260.h	/^	char	res32[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res32	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res32[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res32	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res32[1344];$/;"	m	struct:ccsr_gur	typeref:typename:u8[1344]
res32	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res32[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res32	arch/powerpc/include/asm/immap_86xx.h	/^	char	res32[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res32	arch/powerpc/include/asm/immap_86xx.h	/^	char	res32[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res32	arch/powerpc/include/asm/immap_86xx.h	/^	char    res32[460];$/;"	m	struct:ccsr_ht	typeref:typename:char[460]
res32	arch/powerpc/include/asm/immap_86xx.h	/^	char    res32[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res32	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res32[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res320	include/tsec.h	/^	u32	res320;$/;"	m	struct:tsec	typeref:typename:u32
res328	include/tsec.h	/^	u32	res328[6];$/;"	m	struct:tsec	typeref:typename:u32[6]
res33	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res33[0x14];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x14]
res33	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res33[0x18];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x18]
res33	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res33[0x29c];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x29c]
res33	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res33[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res33	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res33[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res33	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res33[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res33	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res33[0x1f4];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1f4]
res33	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res33[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res33	arch/m68k/include/asm/immap_5272.h	/^	ushort res33;$/;"	m	struct:usb	typeref:typename:ushort
res33	arch/m68k/include/asm/immap_5275.h	/^	u16 res33;$/;"	m	struct:usb	typeref:typename:u16
res33	arch/powerpc/include/asm/immap_8260.h	/^	char	res33[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res33	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res33[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res33	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res33[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res33	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res33[60];$/;"	m	struct:ccsr_gur	typeref:typename:u8[60]
res33	arch/powerpc/include/asm/immap_86xx.h	/^	char	res33[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res33	arch/powerpc/include/asm/immap_86xx.h	/^	char	res33[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res33	arch/powerpc/include/asm/immap_86xx.h	/^	char    res33[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res33	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res33[0x1c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x1c]
res34	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res34[0x2e78];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x2e78]
res34	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res34[0x4];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x4]
res34	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res34[0x8c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8c]
res34	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res34[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res34	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res34[0xc];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0xc]
res34	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res34[0xc];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0xc]
res34	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res34[0x18];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x18]
res34	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res34[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res34	arch/m68k/include/asm/immap_5272.h	/^	ushort res34;$/;"	m	struct:usb	typeref:typename:ushort
res34	arch/m68k/include/asm/immap_5275.h	/^	u16 res34;$/;"	m	struct:usb	typeref:typename:u16
res34	arch/m68k/include/asm/immap_5329.h	/^	u16 res34;		\/* 0x34 - 0x35 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res34	arch/m68k/include/asm/immap_5329.h	/^	u8 res34;		\/* 0x34 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res34	arch/powerpc/include/asm/immap_8260.h	/^	char	res34[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res34	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res34[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res34	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res34[28];$/;"	m	struct:ccsr_gur	typeref:typename:u8[28]
res34	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res34[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res34	arch/powerpc/include/asm/immap_86xx.h	/^	char	res34[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res34	arch/powerpc/include/asm/immap_86xx.h	/^	char	res34[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res34	arch/powerpc/include/asm/immap_86xx.h	/^	char    res34[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res34	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res34[0x4c];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0x4c]
res344	include/tsec.h	/^	u32	res344[16];$/;"	m	struct:tsec	typeref:typename:u32[16]
res35	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res35[0x1c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1c]
res35	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res35[0x8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x8]
res35	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res35[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res35	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res35[0xcc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xcc]
res35	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res35[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res35	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res35[0xa00];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xa00]
res35	arch/m68k/include/asm/immap_5272.h	/^	ushort res35;$/;"	m	struct:usb	typeref:typename:ushort
res35	arch/m68k/include/asm/immap_5275.h	/^	u16 res35;$/;"	m	struct:usb	typeref:typename:u16
res35	arch/powerpc/include/asm/immap_8260.h	/^	char	res35[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res35	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res35;$/;"	m	struct:ccsr_gur	typeref:typename:u8
res35	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res35[0x204];$/;"	m	struct:ccsr_local	typeref:typename:u8[0x204]
res35	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res35[268];$/;"	m	struct:ccsr_pic	typeref:typename:u8[268]
res35	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res35[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res35	arch/powerpc/include/asm/immap_86xx.h	/^	char	res35[268];$/;"	m	struct:ccsr_pic	typeref:typename:char[268]
res35	arch/powerpc/include/asm/immap_86xx.h	/^	char	res35[64];$/;"	m	struct:ccsr_rio	typeref:typename:char[64]
res35	arch/powerpc/include/asm/immap_86xx.h	/^	char    res35[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res36	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res36[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res36	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res36[0x50c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x50c]
res36	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res36[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res36	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res36[0xcc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xcc]
res36	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res36[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res36	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res36[0xc];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xc]
res36	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res36[0xdc];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xdc]
res36	arch/m68k/include/asm/immap_5272.h	/^	ushort res36;$/;"	m	struct:usb	typeref:typename:ushort
res36	arch/m68k/include/asm/immap_5275.h	/^	u16 res36;$/;"	m	struct:usb	typeref:typename:u16
res36	arch/powerpc/include/asm/immap_8260.h	/^	char	res36[52];$/;"	m	struct:pci_config	typeref:typename:char[52]
res36	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res36[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res36	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res36[20];$/;"	m	struct:ccsr_gur	typeref:typename:u8[20]
res36	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res36[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res36	arch/powerpc/include/asm/immap_86xx.h	/^	char	res36[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res36	arch/powerpc/include/asm/immap_86xx.h	/^	char	res36[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res36	arch/powerpc/include/asm/immap_86xx.h	/^	char    res36[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res37	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res37[0x14];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x14]
res37	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res37[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res37	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res37[0xc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xc]
res37	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res37[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res37	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res37[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res37	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res37[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res37	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res37[0xc];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xc]
res37	arch/m68k/include/asm/immap_5272.h	/^	uchar res37[788];$/;"	m	struct:usb	typeref:typename:uchar[788]
res37	arch/m68k/include/asm/immap_5275.h	/^	u8 res37[788];$/;"	m	struct:usb	typeref:typename:u8[788]
res37	arch/powerpc/include/asm/immap_8260.h	/^	char	res37[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res37	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res37[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res37	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res37[380];$/;"	m	struct:ccsr_gur	typeref:typename:u8[380]
res37	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res37[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res37	arch/powerpc/include/asm/immap_86xx.h	/^	char	res37[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res37	arch/powerpc/include/asm/immap_86xx.h	/^	char	res37[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res37	arch/powerpc/include/asm/immap_86xx.h	/^	char    res37[64];$/;"	m	struct:ccsr_tsec	typeref:typename:char[64]
res38	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res38[0x29c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x29c]
res38	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res38[0x38ec];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x38ec]
res38	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res38[0x8c];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x8c]
res38	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res38[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res38	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res38[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res38	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res38[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res38	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res38[0xc];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xc]
res38	arch/m68k/include/asm/immap_5329.h	/^	u16 res38[3];		\/* 0x38 - 0x3D *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16[3]
res38	arch/powerpc/include/asm/immap_8260.h	/^	char	res38[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res38	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res38[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res38	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res38[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res38	arch/powerpc/include/asm/immap_86xx.h	/^	char	res38[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res38	arch/powerpc/include/asm/immap_86xx.h	/^	char	res38[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res38	arch/powerpc/include/asm/immap_86xx.h	/^	char    res38[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res388	include/tsec.h	/^	u32	res388[30];$/;"	m	struct:tsec	typeref:typename:u32[30]
res39	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res39[0x37f8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x37f8]
res39	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res39[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res39	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res39[0xf4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf4]
res39	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res39[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res39	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res39[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res39	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res39[0x1c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1c]
res39	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res39[0x20];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x20]
res39	arch/powerpc/include/asm/immap_8260.h	/^	char	res39[44];$/;"	m	struct:pci_config	typeref:typename:char[44]
res39	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res39[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res39	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res39[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res39	arch/powerpc/include/asm/immap_86xx.h	/^	char	res39[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res39	arch/powerpc/include/asm/immap_86xx.h	/^	char	res39[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res39	arch/powerpc/include/asm/immap_86xx.h	/^	char    res39[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res3A	arch/m68k/include/asm/immap_5329.h	/^	u16 res3A;		\/* 0x3A - 0x3B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res3C	arch/m68k/include/asm/immap_5329.h	/^	u8 res3C;		\/* 0x3C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res4	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res4;$/;"	m	struct:i2c	typeref:typename:unsigned short
res4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res4;$/;"	m	struct:mx6sdl_iomux_grp_regs	typeref:typename:u32
res4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res4[239];$/;"	m	struct:mmdc_p_regs	typeref:typename:u32[239]
res4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res4[2];$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32[2]
res4	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res4[3];$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32[3]
res4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res4[0x04];$/;"	m	struct:ctrl	typeref:typename:u8[0x04]
res4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res4[0x1c];$/;"	m	struct:prcm	typeref:typename:u8[0x1c]
res4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res4[0x4];$/;"	m	struct:dma4	typeref:typename:u8[0x4]
res4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res4[0x4];$/;"	m	struct:pm	typeref:typename:u8[0x4]
res4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res4[0xC];$/;"	m	struct:sdrc	typeref:typename:u8[0xC]
res4	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned char res4[128];$/;"	m	struct:emif4	typeref:typename:unsigned char[128]
res4	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res4;$/;"	m	struct:i2c	typeref:typename:unsigned short
res4	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^	unsigned char res4[0x0D4];	\/* 0x44C *\/$/;"	m	struct:t2	typeref:typename:unsigned char[0x0D4]
res4	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res4;$/;"	m	struct:i2c	typeref:typename:unsigned short
res4	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res4;$/;"	m	struct:i2c	typeref:typename:unsigned short
res4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8      res4[0x28];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x28]
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res4;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res4;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res4[15];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[15]
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res4[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res4[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res4[3];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[3]
res4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res4[3];$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8[3]
res4	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res4[0x10];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x10]
res4	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res4[0x4];		\/* 0x1ac *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res4	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res4[0x04];			\/* 0x0fc *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res4	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res4[0x108];			\/* 0xf8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x108]
res4	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res4[0x4];			\/* 0x88c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x4]
res4	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res4[0x9c];			\/* 0x254 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x9c]
res4	arch/arm/include/asm/arch-sunxi/display2.h	/^	u8 res4[0x108];			\/* 0xf8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x108]
res4	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res4[0x10];		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x10]
res4	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res4[0x30];		\/* 0x190 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x30]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res4[0x08];		\/* 0x1f8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x08]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res4[0x8];		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res4[0x3c];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x3c]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res4[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res4[0x3c];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x3c]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res4[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res4[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res4[0x18];		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x18]
res4	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res4[0x74];		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x74]
res4	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res4[0x58];		\/* 0x058 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x58]
res4	arch/arm/include/asm/arch-sunxi/timer.h	/^	u8 res4[0x58];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[0x58]
res4	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	res4[3];	\/* RESERVED, offset 55h-57h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char[3]
res4	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res4[0x10];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x10]
res4	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res4[0x4];		\/* 0x1ac *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res4	arch/arm/include/asm/arch/display.h	/^	u8 res4[0x04];			\/* 0x0fc *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res4	arch/arm/include/asm/arch/display.h	/^	u8 res4[0x108];			\/* 0xf8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x108]
res4	arch/arm/include/asm/arch/display.h	/^	u8 res4[0x4];			\/* 0x88c *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x4]
res4	arch/arm/include/asm/arch/display.h	/^	u8 res4[0x9c];			\/* 0x254 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x9c]
res4	arch/arm/include/asm/arch/display2.h	/^	u8 res4[0x108];			\/* 0xf8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x108]
res4	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res4[0x10];		\/* 0x6c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x10]
res4	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res4[0x30];		\/* 0x190 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x30]
res4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res4[0x08];		\/* 0x1f8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x08]
res4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res4[0x8];		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res4[0x3c];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x3c]
res4	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res4[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res4[0x3c];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x3c]
res4	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res4[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res4[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res4	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res4[0x18];		\/* 0x38 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x18]
res4	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res4[0x74];		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x74]
res4	arch/arm/include/asm/arch/prcm.h	/^	u8 res4[0x58];		\/* 0x058 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x58]
res4	arch/arm/include/asm/arch/timer.h	/^	u8 res4[0x58];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[0x58]
res4	arch/arm/include/asm/omap_mmc.h	/^	unsigned char res4[0x8];$/;"	m	struct:hsmmc	typeref:typename:unsigned char[0x8]
res4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res4[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res4[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res4[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res4[0xfc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xfc]
res4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res4[0x4];$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned char[0x4]
res4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res4[0x8];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x8]
res4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res4[0x8];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x8]
res4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res4[0xDF00];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xDF00]
res4	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res4[4];$/;"	m	struct:exynos5_phy_control	typeref:typename:unsigned char[4]
res4	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res4[0x10];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x10]
res4	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res4[5];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[5]
res4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res4[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res4[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res4[0x1f4];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1f4]
res4	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res4[0x1ec];$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned char[0x1ec]
res4	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res4[0xdc];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0xdc]
res4	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res4[123];		\/* 0x414 - 0x5FF *\/$/;"	m	struct:xbs	typeref:typename:u32[123]
res4	arch/m68k/include/asm/coldfire/edma.h	/^	u16 res4[3];		\/* 0x28 - 0x2D *\/$/;"	m	struct:edma_ctrl	typeref:typename:u16[3]
res4	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res4;$/;"	m	struct:fbcs	typeref:typename:u16
res4	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 res4;		\/* 0x24 *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
res4	arch/m68k/include/asm/coldfire/intctrl.h	/^	u32 res4[24];		\/* 0x80 - 0xDF *\/$/;"	m	struct:int1_ctrl	typeref:typename:u32[24]
res4	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res4[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res4	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res4[3];		\/* 0xE1 - 0xE3 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 res4[3];$/;"	m	struct:pwm_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 res4;$/;"	m	struct:qspi_ctrl	typeref:typename:u16
res4	arch/m68k/include/asm/fec.h	/^	u32 res4;		\/* 0xA8 *\/$/;"	m	struct:fec	typeref:typename:u32
res4	arch/m68k/include/asm/fsl_i2c.h	/^	u8 res4[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res4	arch/m68k/include/asm/immap_5227x.h	/^	u8 res4[2];		\/* 0x0C - 0x0D *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u8[2]
res4	arch/m68k/include/asm/immap_5235.h	/^	u8 res4[3];		\/* 0x21 - 0x23 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/immap_5235.h	/^	u8 res4[3];		\/* 0x3D - 0x3F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/immap_5272.h	/^	uchar res4;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
res4	arch/m68k/include/asm/immap_5272.h	/^	uchar res4[114];$/;"	m	struct:wdog_ctrl	typeref:typename:uchar[114]
res4	arch/m68k/include/asm/immap_5272.h	/^	ushort res4;$/;"	m	struct:usb	typeref:typename:ushort
res4	arch/m68k/include/asm/immap_5275.h	/^	u16 res4;$/;"	m	struct:usb	typeref:typename:u16
res4	arch/m68k/include/asm/immap_5275.h	/^	u8 res4[114];$/;"	m	struct:wdog_ctrl	typeref:typename:u8[114]
res4	arch/m68k/include/asm/immap_5275.h	/^	u8 res4[3];$/;"	m	struct:sys_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/immap_5282.h	/^	u8 res4[3];$/;"	m	struct:scm_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/immap_5307.h	/^	u16 res4;$/;"	m	struct:csm	typeref:typename:u16
res4	arch/m68k/include/asm/immap_5307.h	/^	u8  res4;$/;"	m	struct:sim	typeref:typename:u8
res4	arch/m68k/include/asm/immap_5329.h	/^	u16 res4;		\/* 0x122 *\/$/;"	m	struct:usb_otg	typeref:typename:u16
res4	arch/m68k/include/asm/immap_5329.h	/^	u8 res4[2];		\/* 0x1C - 0x1D *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8[2]
res4	arch/m68k/include/asm/immap_5329.h	/^	u8 res4[3];$/;"	m	struct:pll_ctrl	typeref:typename:u8[3]
res4	arch/m68k/include/asm/timer.h	/^	u16 res4;		\/* 0x0E *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
res4	arch/powerpc/include/asm/5xx_immap.h	/^		   char res4[2];$/;"	m	struct:tcan::__anon8cdce8f20108	typeref:typename:char[2]
res4	arch/powerpc/include/asm/5xx_immap.h	/^	char               res4[14208];		\/* Reserved for SIU *\/$/;"	m	struct:immap	typeref:typename:char[14208]
res4	arch/powerpc/include/asm/5xx_immap.h	/^	char res4[16];$/;"	m	struct:sys_int_timers	typeref:typename:char[16]
res4	arch/powerpc/include/asm/5xx_immap.h	/^	char res4[32];$/;"	m	struct:mios	typeref:typename:char[32]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[2];$/;"	m	struct:sys_int_timers	typeref:typename:char[2]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[4];$/;"	m	struct:io_port	typeref:typename:char[4]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[4];$/;"	m	struct:pcmcia_conf	typeref:typename:char[4]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[5];$/;"	m	struct:smc	typeref:typename:char[5]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	char	res4[8];$/;"	m	struct:scc	typeref:typename:char[8]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res4[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res4;$/;"	m	struct:vid823	typeref:typename:uint
res4	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res4[17];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[17]
res4	arch/powerpc/include/asm/fsl_dma.h	/^	char	res4[56];$/;"	m	struct:fsl_dma	typeref:typename:char[56]
res4	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 res4[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res4	arch/powerpc/include/asm/fsl_lbc.h	/^	u8	res4[8];$/;"	m	struct:fsl_lbc	typeref:typename:u8[8]
res4	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res4[4];$/;"	m	struct:fsl_lbc	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/fsl_pci.h	/^	char	res4[3016];	\/*     (- #xbf8	 #x30)3016 *\/$/;"	m	struct:ccsr_pci	typeref:typename:char[3016]
res4	arch/powerpc/include/asm/immap_512x.h	/^	u8			res4[0xa00];$/;"	m	struct:immap	typeref:typename:u8[0xa00]
res4	arch/powerpc/include/asm/immap_512x.h	/^	u8 res4[0x34];$/;"	m	struct:sysconf512x	typeref:typename:u8[0x34]
res4	arch/powerpc/include/asm/immap_512x.h	/^	u8 res4[0x380];$/;"	m	struct:iim512x	typeref:typename:u8[0x380]
res4	arch/powerpc/include/asm/immap_512x.h	/^	u8 res4[4];$/;"	m	struct:pcictrl512x	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_512x.h	/^	volatile u16	res4;$/;"	m	struct:psc512x	typeref:typename:volatile u16
res4	arch/powerpc/include/asm/immap_8260.h	/^	char		res4[32];$/;"	m	struct:immap	typeref:typename:char[32]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[12];$/;"	m	struct:comm_proc	typeref:typename:char[12]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[12];$/;"	m	struct:io_port	typeref:typename:char[12]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[16];$/;"	m	struct:cpmux	typeref:typename:char[16]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[16];$/;"	m	struct:sys_int_timers	typeref:typename:char[16]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[20];$/;"	m	struct:pci_config	typeref:typename:char[20]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[2];$/;"	m	struct:fcc	typeref:typename:char[2]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[2];$/;"	m	struct:mem_ctlr	typeref:typename:char[2]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[3];$/;"	m	struct:sys_conf	typeref:typename:char[3]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[5];$/;"	m	struct:smc	typeref:typename:char[5]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[82];$/;"	m	struct:im_spi	typeref:typename:char[82]
res4	arch/powerpc/include/asm/immap_8260.h	/^	char	res4[8];$/;"	m	struct:scc	typeref:typename:char[8]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u32 res4[0x1E];		\/* 0x88-0x99 reserved *\/$/;"	m	struct:dma83xx	typeref:typename:u32[0x1E]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res4[0x1000];$/;"	m	struct:immap	typeref:typename:u8[0x1000]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res4[0x1300];$/;"	m	struct:immap	typeref:typename:u8[0x1300]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res4[0x500];$/;"	m	struct:immap	typeref:typename:u8[0x500]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res4[0x80];$/;"	m	struct:immap	typeref:typename:u8[0x80]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res4[0x900];$/;"	m	struct:immap	typeref:typename:u8[0x900]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res4[0x10];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0x10]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res4[0x18];$/;"	m	struct:pex83xx	typeref:typename:u8[0x18]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res4[0xAA8];$/;"	m	struct:ddr83xx	typeref:typename:u8[0xAA8]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res4[0xb8];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0xb8]
res4	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res4[4];$/;"	m	struct:pcictrl83xx	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res4[7];$/;"	m	struct:serdes_corenet::serdes_lane	typeref:typename:u32[7]
res4	arch/powerpc/include/asm/immap_85xx.h	/^		u8	res4[4];$/;"	m	struct:ccsr_local::__anondcd7518a0108	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res4[11];$/;"	m	struct:serdes_corenet	typeref:typename:u32[11]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res4[54];$/;"	m	struct:cpc_corenet	typeref:typename:u32[54]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u32 res4[60];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[60]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[0x1f090];$/;"	m	struct:ccsr_rman	typeref:typename:u8[0x1f090]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[0x400];$/;"	m	struct:ccsr_pme	typeref:typename:u8[0x400]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[0x4c];$/;"	m	struct:ccsr_qman	typeref:typename:u8[0x4c]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[124];$/;"	m	struct:rio_impl_common	typeref:typename:u8[124]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[12];$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u8[12]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[12];$/;"	m	struct:ccsr_cpm_iop	typeref:typename:u8[12]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[12];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[12]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[16];$/;"	m	struct:ccsr_cpm_mux	typeref:typename:u8[16]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[2552];$/;"	m	struct:ccsr_rio	typeref:typename:u8[2552]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[2];$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u8[2]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[2];$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u8[2]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[2];$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u8[2]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[3044];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[3044]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[3];$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8[3]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[4];$/;"	m	struct:rio_arch	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[4];$/;"	m	struct:rio_impl_port_spec	typeref:typename:u8[4]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[82];$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u8[82]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[8];$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u8[8]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[8];$/;"	m	struct:ccsr_duart	typeref:typename:u8[8]
res4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res4[8];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[8]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[3044];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[3044]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[8];$/;"	m	struct:ccsr_duart	typeref:typename:char[8]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[8];$/;"	m	struct:ccsr_pex	typeref:typename:char[8]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char	res4[8];$/;"	m	struct:ccsr_tsec	typeref:typename:char[8]
res4	arch/powerpc/include/asm/immap_86xx.h	/^	char                    res4[98304];$/;"	m	struct:immap	typeref:typename:char[98304]
res4	arch/x86/include/asm/acpi_table.h	/^	u8 res4;$/;"	m	struct:acpi_fadt	typeref:typename:u8
res4	board/freescale/common/ngpixis.h	/^	u8 res4;$/;"	m	struct:ngpixis	typeref:typename:u8
res4	board/freescale/common/pixis.h	/^	u8 res4[25];$/;"	m	struct:pixis	typeref:typename:u8[25]
res4	board/freescale/common/pixis.h	/^	u8 res4[33];$/;"	m	struct:pixis	typeref:typename:u8[33]
res4	board/freescale/common/qixis.h	/^	u8 res4[2];$/;"	m	struct:qixis	typeref:typename:u8[2]
res4	cmd/booti.c	/^	uint64_t	res4;		\/* reserved *\/$/;"	m	struct:Image_header	typeref:typename:uint64_t	file:
res4	drivers/block/dwc_ahsata.c	/^	u32 res4[8];$/;"	m	struct:sata_host_regs	typeref:typename:u32[8]	file:
res4	drivers/block/fsl_sata.h	/^	u8 res4[0x4];$/;"	m	struct:fsl_sata_reg	typeref:typename:u8[0x4]
res4	drivers/crypto/ace_sha.h	/^	unsigned int	res4;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
res4	drivers/net/fec_mxc.h	/^	uint32_t res4[7];		\/* MBAR_ETH + 0x048-60 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[7]
res4	drivers/qe/uec.h	/^	u8   res4[0x36-0x34];$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8[]
res4	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res4[224];$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u8[224]
res4	drivers/video/mx3fb.c	/^	u32	res4:2;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:2	file:
res4	drivers/video/mx3fb.c	/^	u32	res4:2;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:2	file:
res4	include/atmel_hlcdc.h	/^	u32	res4[3];$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32[3]
res4	include/fis.h	/^	u16 res4;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u16
res4	include/fis.h	/^	u32 res4;$/;"	m	struct:sata_fis_dma_setup	typeref:typename:u32
res4	include/fsl_dtsec.h	/^	u32	res4[16];$/;"	m	struct:dtsec	typeref:typename:u32[16]
res4	include/fsl_fman.h	/^	u32	res4;$/;"	m	struct:fm_bmi_common	typeref:typename:u32
res4	include/fsl_fman.h	/^	u32	res4[0xc];$/;"	m	struct:fm_fpm	typeref:typename:u32[0xc]
res4	include/fsl_fman.h	/^	u32	res4[0xdc];	\/* missing debug regs *\/$/;"	m	struct:fm_qmi_common	typeref:typename:u32[0xdc]
res4	include/fsl_fman.h	/^	u32 res4[0x1F];$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x1F]
res4	include/fsl_fman.h	/^	u8			res4[32*1024];$/;"	m	struct:ccsr_fman	typeref:typename:u8[]
res4	include/fsl_fman.h	/^	u8			res4[48*1024];$/;"	m	struct:ccsr_fman	typeref:typename:u8[]
res4	include/fsl_ifc.h	/^	u32 res4;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res4	include/fsl_ifc.h	/^	u32 res4[0x4];$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32[0x4]
res4	include/fsl_ifc.h	/^	u8 res4[IFC_CSOR_REG_LEN - IFC_CSOR_USED_LEN];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u8[]
res4	include/fsl_mmdc.h	/^	u32 res4[239];$/;"	m	struct:mmdc_regs	typeref:typename:u32[239]
res4	include/fsl_sec.h	/^	u8	res4[0x40];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x40]
res4	include/fsl_tgec.h	/^	u32	res4[6];$/;"	m	struct:tgec	typeref:typename:u32[6]
res4	include/linux/immap_qe.h	/^	u8 res4[0x100-0xf8];$/;"	m	struct:rsp	typeref:typename:u8[]
res4	include/linux/immap_qe.h	/^	u8 res4[0x1];$/;"	m	struct:spi	typeref:typename:u8[0x1]
res4	include/linux/immap_qe.h	/^	u8 res4[0x200 - 0x091];$/;"	m	struct:ucc_slow	typeref:typename:u8[]
res4	include/linux/immap_qe.h	/^	u8 res4[0x24];$/;"	m	struct:cp_qe	typeref:typename:u8[0x24]
res4	include/linux/immap_qe.h	/^	u8 res4[0x2];$/;"	m	struct:ucc_ethernet	typeref:typename:u8[0x2]
res4	include/linux/immap_qe.h	/^	u8 res4[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res4	include/linux/immap_qe.h	/^	u8 res4[0x8];$/;"	m	struct:si1	typeref:typename:u8[0x8]
res4	include/linux/immap_qe.h	/^	u8 res4[1];$/;"	m	struct:usb_ctlr	typeref:typename:u8[1]
res4	include/linux/mtd/omap_elm.h	/^	u8 res4[512];				\/* 0x600 *\/$/;"	m	struct:elm	typeref:typename:u8[512]
res4	include/linux/mtd/omap_gpmc.h	/^	u8 res4[0xC];$/;"	m	struct:gpmc	typeref:typename:u8[0xC]
res4	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res4[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res4	include/usb/ehci-ci.h	/^	u8	res4[0x14];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x14]
res4	include/usb/mpc8xx_udc.h	/^	char res4;	\/* Reserved *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char
res4	post/cpu/mpc8xx/usb.c	/^	uchar res4;$/;"	m	struct:usb	typeref:typename:uchar	file:
res40	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res40[0x1fc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fc]
res40	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res40[0x3f4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x3f4]
res40	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res40[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res40	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res40[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res40	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res40[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res40	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res40[0x38];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x38]
res40	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res40[0x38];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x38]
res40	arch/powerpc/include/asm/immap_8260.h	/^	char	res40[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res40	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res40[188];$/;"	m	struct:ccsr_pic	typeref:typename:u8[188]
res40	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res40[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res40	arch/powerpc/include/asm/immap_86xx.h	/^	char	res40[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res40	arch/powerpc/include/asm/immap_86xx.h	/^	char	res40[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res40	arch/powerpc/include/asm/immap_86xx.h	/^	char    res40[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res400	include/tsec.h	/^	u32	res400;$/;"	m	struct:tsec	typeref:typename:u32
res408	include/tsec.h	/^	u32	res408[62];$/;"	m	struct:tsec	typeref:typename:u32[62]
res41	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res41[0x8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8]
res41	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res41[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res41	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res41[0xf8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf8]
res41	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res41[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res41	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res41[0x1c];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1c]
res41	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res41[0x3c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x3c]
res41	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res41[0x3c];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x3c]
res41	arch/powerpc/include/asm/immap_8260.h	/^	char	res41[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res41	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res41[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res41	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res41[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res41	arch/powerpc/include/asm/immap_86xx.h	/^	char	res41[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res41	arch/powerpc/include/asm/immap_86xx.h	/^	char	res41[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res41	arch/powerpc/include/asm/immap_86xx.h	/^	char    res41[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res42	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res42[0x34dc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x34dc]
res42	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res42[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res42	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res42[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res42	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res42[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res42	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res42[0x160];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x160]
res42	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res42[0x1c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1c]
res42	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res42[0x1c];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1c]
res42	arch/powerpc/include/asm/immap_8260.h	/^	char	res42[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res42	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res42[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res42	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res42[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res42	arch/powerpc/include/asm/immap_86xx.h	/^	char	res42[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res42	arch/powerpc/include/asm/immap_86xx.h	/^	char	res42[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res42	arch/powerpc/include/asm/immap_86xx.h	/^	char    res42[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res43	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res43[0x30c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x30c]
res43	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res43[0x4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x4]
res43	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res43[0xec];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xec]
res43	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res43[0xf8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xf8]
res43	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res43[0x1c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1c]
res43	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res43[0x1c];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1c]
res43	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res43[0xf0];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xf0]
res43	arch/powerpc/include/asm/immap_8260.h	/^	char	res43[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res43	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res43[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res43	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res43[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res43	arch/powerpc/include/asm/immap_86xx.h	/^	char	res43[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res43	arch/powerpc/include/asm/immap_86xx.h	/^	char	res43[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res43	arch/powerpc/include/asm/immap_86xx.h	/^	char    res43[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res44	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res44[0x2f8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x2f8]
res44	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res44[0x3618];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x3618]
res44	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res44[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res44	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res44[0xf4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf4]
res44	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res44[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res44	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res44[0xb4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xb4]
res44	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res44[0xb4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xb4]
res44	arch/m68k/include/asm/immap_5329.h	/^	u8 res44;		\/* 0x44 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res44	arch/powerpc/include/asm/immap_8260.h	/^	char	res44[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res44	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res44[204];$/;"	m	struct:ccsr_pic	typeref:typename:u8[204]
res44	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res44[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res44	arch/powerpc/include/asm/immap_86xx.h	/^	char	res44[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res44	arch/powerpc/include/asm/immap_86xx.h	/^	char	res44[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res44	arch/powerpc/include/asm/immap_86xx.h	/^	char    res44[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res45	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res45[0x2f4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x2f4]
res45	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res45[0x8c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8c]
res45	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res45[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res45	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res45[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res45	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res45[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res45	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res45[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res45	arch/powerpc/include/asm/immap_8260.h	/^	char	res45[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res45	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res45[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res45	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res45[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res45	arch/powerpc/include/asm/immap_86xx.h	/^	char	res45[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res45	arch/powerpc/include/asm/immap_86xx.h	/^	char	res45[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res45	arch/powerpc/include/asm/immap_86xx.h	/^	char    res45[192];$/;"	m	struct:ccsr_tsec	typeref:typename:char[192]
res46	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res46[0x3600];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x3600]
res46	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res46[0x5f8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x5f8]
res46	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res46[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res46	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res46[0xf0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf0]
res46	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res46[0x1dc];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1dc]
res46	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res46[0x4c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4c]
res46	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res46[0x64];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x64]
res46	arch/powerpc/include/asm/immap_8260.h	/^	char	res46[756];$/;"	m	struct:pci_config	typeref:typename:char[756]
res46	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res46[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res46	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res46[60140];$/;"	m	struct:ccsr_pic	typeref:typename:u8[60140]
res46	arch/powerpc/include/asm/immap_86xx.h	/^	char	res46[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res46	arch/powerpc/include/asm/immap_86xx.h	/^	char	res46[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res46	arch/powerpc/include/asm/immap_86xx.h	/^	char	res46[12];$/;"	m	struct:ccsr_tsec	typeref:typename:char[12]
res47	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res47[0x14];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x14]
res47	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res47[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res47	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res47[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res47	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res47[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res47	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res47[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res47	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res47[0x5e0];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x5e0]
res47	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res47[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res47	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res47[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res47	arch/powerpc/include/asm/immap_86xx.h	/^	char	res47[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res47	arch/powerpc/include/asm/immap_86xx.h	/^	char	res47[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res48	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res48[0x0c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x0c]
res48	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res48[0x18];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x18]
res48	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res48[0xcc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xcc]
res48	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res48[0xf0];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf0]
res48	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res48[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res48	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res48[0x24];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x24]
res48	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res48[0x8];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x8]
res48	arch/m68k/include/asm/immap_5329.h	/^	u16 res48;		\/* 0x48 - 0x49 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res48	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res48[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res48	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res48[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res48	arch/powerpc/include/asm/immap_86xx.h	/^	char	res48[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res48	arch/powerpc/include/asm/immap_86xx.h	/^	char	res48[192];$/;"	m	struct:ccsr_tsec	typeref:typename:char[192]
res48	arch/powerpc/include/asm/immap_86xx.h	/^	char	res48[60];$/;"	m	struct:ccsr_pic	typeref:typename:char[60]
res49	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res49[0x0ec];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x0ec]
res49	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res49[0x1c];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1c]
res49	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res49[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res49	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res49[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res49	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res49[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res49	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res49[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res49	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res49[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res49	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res49[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res49	arch/powerpc/include/asm/immap_86xx.h	/^	char	res49[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res49	arch/powerpc/include/asm/immap_86xx.h	/^	char	res49[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res49	arch/powerpc/include/asm/immap_86xx.h	/^	char	res49[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res4C	arch/m68k/include/asm/immap_5329.h	/^	u8 res4C[5];		\/* 0x4C - 0x50 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8[5]
res4E	arch/m68k/include/asm/immap_5329.h	/^	u16 res4E;		\/* 0x4E - 0x4F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res4_1	arch/powerpc/include/asm/immap_86xx.h	/^	char    res4_1[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res4a	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res4a;$/;"	m	struct:i2c	typeref:typename:unsigned short
res4a	arch/powerpc/include/asm/immap_8260.h	/^	char		res4a[32];$/;"	m	struct:immap	typeref:typename:char[32]
res4b	arch/powerpc/include/asm/immap_8260.h	/^	char		res4b[236];$/;"	m	struct:immap	typeref:typename:char[236]
res5	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res5;$/;"	m	struct:i2c	typeref:typename:unsigned short
res5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res5;$/;"	m	struct:mx6dq_iomux_ddr_regs	typeref:typename:u32
res5	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u32 res5;$/;"	m	struct:mx6dq_iomux_grp_regs	typeref:typename:u32
res5	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res5[0x124];$/;"	m	struct:ctrl	typeref:typename:u8[0x124]
res5	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res5[0x18];$/;"	m	struct:prcm	typeref:typename:u8[0x18]
res5	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res5[0x4];$/;"	m	struct:pm	typeref:typename:u8[0x4]
res5	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res5;$/;"	m	struct:i2c	typeref:typename:unsigned short
res5	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res5;$/;"	m	struct:i2c	typeref:typename:unsigned short
res5	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res5;$/;"	m	struct:i2c	typeref:typename:unsigned short
res5	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res5[4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[4]
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res5;$/;"	m	struct:s3c2400_mmc	typeref:typename:u16
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res5;$/;"	m	struct:s3c24x0_i2s	typeref:typename:u16
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res5;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res5[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res5[3];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[3]
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res5[3];$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8[3]
res5	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res5[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res5	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res5[0x28];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x28]
res5	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res5[0x2c];		\/* 0x1b8 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x2c]
res5	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res5[0x04];			\/* 0x11c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res5	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res5[0x110];			\/* 0x8b0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x110]
res5	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res5[0x1c];			\/* 0x204 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x1c]
res5	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res5[0x8];			\/* 0x2f8 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x8]
res5	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res5[0x8];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x8]
res5	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res5[0x04];		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res5	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res5[0x28];		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res5[0x4];		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res5	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res5[0x1c];		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x1c]
res5	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res5[0x8];		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res5	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res5[0x3c];		\/* 0x0b4 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x3c]
res5	arch/arm/include/asm/arch-sunxi/timer.h	/^	u8 res5[8];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[8]
res5	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	res5[0xa0];	\/* RESERVED, offset 60h-FBh *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char[0xa0]
res5	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res5[0x28];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x28]
res5	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res5[0x2c];		\/* 0x1b8 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x2c]
res5	arch/arm/include/asm/arch/display.h	/^	u8 res5[0x04];			\/* 0x11c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res5	arch/arm/include/asm/arch/display.h	/^	u8 res5[0x110];			\/* 0x8b0 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0x110]
res5	arch/arm/include/asm/arch/display.h	/^	u8 res5[0x1c];			\/* 0x204 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u8[0x1c]
res5	arch/arm/include/asm/arch/display.h	/^	u8 res5[0x8];			\/* 0x2f8 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x8]
res5	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res5[0x8];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x8]
res5	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res5[0x04];		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x04]
res5	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res5[0x28];		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res5	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res5[0x4];		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x4]
res5	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res5[0x1c];		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0x1c]
res5	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res5[0x8];		\/* 0x58 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res5	arch/arm/include/asm/arch/prcm.h	/^	u8 res5[0x3c];		\/* 0x0b4 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x3c]
res5	arch/arm/include/asm/arch/timer.h	/^	u8 res5[8];$/;"	m	struct:sunxi_timer_reg	typeref:typename:u8[8]
res5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res5[0x1fc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1fc]
res5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res5[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res5[0xf8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf8]
res5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res5[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res5[0x4];$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned char[0x4]
res5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res5[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res5	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res5[0xc];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0xc]
res5	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res5[2];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[2]
res5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res5[0x180];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x180]
res5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res5[0x180];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x180]
res5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res5[0x1f8];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1f8]
res5	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res5[0x4];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0x4]
res5	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res5[0x54];$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned char[0x54]
res5	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res5[3];		\/* 0x604 - 0F *\/$/;"	m	struct:xbs	typeref:typename:u32[3]
res5	arch/m68k/include/asm/coldfire/edma.h	/^	u32 res5[52];		\/* 0x30 - 0xFF *\/$/;"	m	struct:edma_ctrl	typeref:typename:u32[52]
res5	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res5;$/;"	m	struct:fbcs	typeref:typename:u16
res5	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 res5;		\/* 0x2C *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
res5	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res5[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res5	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res5[3];		\/* 0xE1 - 0xE3 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
res5	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res5[3];		\/* 0xE5 - 0xE7 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
res5	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 res5[3];$/;"	m	struct:pwm_ctrl	typeref:typename:u8[3]
res5	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 res5;$/;"	m	struct:qspi_ctrl	typeref:typename:u16
res5	arch/m68k/include/asm/immap_5227x.h	/^	u32 res5;		\/* 0x20 *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u32
res5	arch/m68k/include/asm/immap_5235.h	/^	u32 res5;		\/* 0x29 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
res5	arch/m68k/include/asm/immap_5235.h	/^	u8 res5;		\/* 0x41 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res5	arch/m68k/include/asm/immap_5272.h	/^	uchar res5[3];$/;"	m	struct:plic_ctrl	typeref:typename:uchar[3]
res5	arch/m68k/include/asm/immap_5272.h	/^	uchar res5[3];$/;"	m	struct:usb	typeref:typename:uchar[3]
res5	arch/m68k/include/asm/immap_5275.h	/^	u8 res5;$/;"	m	struct:sys_ctrl	typeref:typename:u8
res5	arch/m68k/include/asm/immap_5275.h	/^	u8 res5[3];$/;"	m	struct:usb	typeref:typename:u8[3]
res5	arch/m68k/include/asm/immap_5282.h	/^	u8 res5;$/;"	m	struct:scm_ctrl	typeref:typename:u8
res5	arch/m68k/include/asm/immap_5307.h	/^	u16 res5;$/;"	m	struct:csm	typeref:typename:u16
res5	arch/m68k/include/asm/immap_5307.h	/^	u16 res5;$/;"	m	struct:sim	typeref:typename:u16
res5	arch/m68k/include/asm/immap_5329.h	/^	u32 res5;		\/* 0x20 *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
res5	arch/m68k/include/asm/immap_5329.h	/^	u32 res5[6];		\/* 0x128 - 0x13F *\/$/;"	m	struct:usb_otg	typeref:typename:u32[6]
res5	arch/powerpc/include/asm/5xx_immap.h	/^	    char res5[640];$/;"	m	struct:tcan	typeref:typename:char[640]
res5	arch/powerpc/include/asm/5xx_immap.h	/^	char               res5[8180];		\/* Reserved *\/$/;"	m	struct:immap	typeref:typename:char[8180]
res5	arch/powerpc/include/asm/5xx_immap.h	/^	char res5[1788];$/;"	m	struct:mios	typeref:typename:char[1788]
res5	arch/powerpc/include/asm/5xx_immap.h	/^	char res5[2];$/;"	m	struct:sys_int_timers	typeref:typename:char[2]
res5	arch/powerpc/include/asm/8xx_immap.h	/^	char	res5[0x34];$/;"	m	struct:sys_int_timers	typeref:typename:char[0x34]
res5	arch/powerpc/include/asm/8xx_immap.h	/^	char	res5[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res5	arch/powerpc/include/asm/8xx_immap.h	/^	char	res5[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res5	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res5[0x18];$/;"	m	struct:vid823	typeref:typename:u_char[0x18]
res5	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res5[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res5	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res5[6];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[6]
res5	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 res5[3];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[3]
res5	arch/powerpc/include/asm/fsl_lbc.h	/^	u8	res5[8];$/;"	m	struct:fsl_lbc	typeref:typename:u8[8]
res5	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res5[12];$/;"	m	struct:fsl_lbc	typeref:typename:u8[12]
res5	arch/powerpc/include/asm/fsl_pci.h	/^	u32	res5[24];$/;"	m	struct:ccsr_pci	typeref:typename:u32[24]
res5	arch/powerpc/include/asm/immap_512x.h	/^	u8			res5[0x1000];$/;"	m	struct:immap	typeref:typename:u8[0x1000]
res5	arch/powerpc/include/asm/immap_512x.h	/^	u8 res5[0xf8];$/;"	m	struct:sysconf512x	typeref:typename:u8[0xf8]
res5	arch/powerpc/include/asm/immap_512x.h	/^	u8 res5[4];$/;"	m	struct:pcictrl512x	typeref:typename:u8[4]
res5	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res5[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char		res5[608];$/;"	m	struct:immap	typeref:typename:char[608]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[24];$/;"	m	struct:pci_config	typeref:typename:char[24]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[2];$/;"	m	struct:sys_int_timers	typeref:typename:char[2]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[3];$/;"	m	struct:fcc	typeref:typename:char[3]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[3];$/;"	m	struct:i2c	typeref:typename:char[3]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[3];$/;"	m	struct:sys_conf	typeref:typename:char[3]
res5	arch/powerpc/include/asm/immap_8260.h	/^	char	res5[4];$/;"	m	struct:mem_ctlr	typeref:typename:char[4]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res5[0x1000];$/;"	m	struct:immap	typeref:typename:u8[0x1000]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res5[0x19900];$/;"	m	struct:immap	typeref:typename:u8[0x19900]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res5[0x1aa00];$/;"	m	struct:immap	typeref:typename:u8[0x1aa00]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res5[0x2000];$/;"	m	struct:immap	typeref:typename:u8[0x2000]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res5[0x900];$/;"	m	struct:immap	typeref:typename:u8[0x900]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res5[0xa00];$/;"	m	struct:immap	typeref:typename:u8[0xa00]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res5[0x200];$/;"	m	struct:ddr83xx	typeref:typename:u8[0x200]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res5[0x34];$/;"	m	struct:pex83xx	typeref:typename:u8[0x34]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res5[0x50];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0x50]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res5[0x94];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x94]
res5	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res5[4];$/;"	m	struct:pcictrl83xx	typeref:typename:u8[4]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res5[197];$/;"	m	struct:serdes_corenet	typeref:typename:u32[197]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res5[62];$/;"	m	struct:cpc_corenet	typeref:typename:u32[62]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[0x78];$/;"	m	struct:ccsr_qman	typeref:typename:u8[0x78]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[12];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[12]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[2543];$/;"	m	struct:ccsr_duart	typeref:typename:u8[2543]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[3];$/;"	m	struct:ccsr_cpm_fcc1	typeref:typename:u8[3]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[3];$/;"	m	struct:ccsr_cpm_fcc2	typeref:typename:u8[3]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[3];$/;"	m	struct:ccsr_cpm_fcc3	typeref:typename:u8[3]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[3];$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8[3]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[8192];$/;"	m	struct:ccsr_rio	typeref:typename:u8[8192]
res5	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res5[96];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[96]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[144];$/;"	m	struct:ccsr_rio	typeref:typename:char[144]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[2543];$/;"	m	struct:ccsr_duart	typeref:typename:char[2543]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char	res5[84];$/;"	m	struct:ccsr_tsec	typeref:typename:char[84]
res5	arch/powerpc/include/asm/immap_86xx.h	/^	char                    res5[389120];$/;"	m	struct:immap	typeref:typename:char[389120]
res5	arch/x86/include/asm/acpi_table.h	/^	u8 res5;$/;"	m	struct:acpi_fadt	typeref:typename:u8
res5	board/freescale/common/ngpixis.h	/^	u8 res5[2];$/;"	m	struct:ngpixis	typeref:typename:u8[2]
res5	board/freescale/common/qixis.h	/^	u8 res5;$/;"	m	struct:qixis	typeref:typename:u8
res5	cmd/booti.c	/^	uint32_t	res5;$/;"	m	struct:Image_header	typeref:typename:uint32_t	file:
res5	drivers/block/dwc_ahsata.c	/^	u32 res5[1];$/;"	m	struct:sata_host_regs	typeref:typename:u32[1]	file:
res5	drivers/block/fsl_sata.h	/^	u8 res5[0xc4];$/;"	m	struct:fsl_sata_reg	typeref:typename:u8[0xc4]
res5	drivers/crypto/ace_sha.h	/^	unsigned char   res5[0x1a0];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x1a0]
res5	drivers/net/fec_mxc.h	/^	uint32_t res5[7];		\/* MBAR_ETH + 0x068-80 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[7]
res5	drivers/qe/uec.h	/^	u8   res5[0x46-0x37];$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8[]
res5	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u8  res5[768];$/;"	m	struct:dwc2_usbotg_reg	typeref:typename:u8[768]
res5	drivers/video/mx3fb.c	/^	u32	res5:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
res5	drivers/video/mx3fb.c	/^	u32	res5:1;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:1	file:
res5	include/atmel_hlcdc.h	/^	u32	res5[3];$/;"	m	struct:atmel_hlcd_regs	typeref:typename:u32[3]
res5	include/fsl_dtsec.h	/^	u32	res5[3];$/;"	m	struct:dtsec	typeref:typename:u32[3]
res5	include/fsl_fman.h	/^	u32	res5;$/;"	m	struct:fm_fpm	typeref:typename:u32
res5	include/fsl_fman.h	/^	u32 res5[0x17];$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x17]
res5	include/fsl_fman.h	/^	u8			res5[4*1024];$/;"	m	struct:ccsr_fman	typeref:typename:u8[]
res5	include/fsl_ifc.h	/^	u32 res5;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res5	include/fsl_ifc.h	/^	u32 res5[0xEF];$/;"	m	struct:fsl_ifc_nor	typeref:typename:u32[0xEF]
res5	include/fsl_ifc.h	/^	u8 res5[IFC_FTIM_REG_LEN - IFC_FTIM_USED_LEN];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u8[]
res5	include/fsl_sec.h	/^	u8	res5[0x4d8];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x4d8]
res5	include/fsl_tgec.h	/^	u32	res5[0x39a];$/;"	m	struct:tgec	typeref:typename:u32[0x39a]
res5	include/linux/immap_qe.h	/^	u8 res5[0x1];$/;"	m	struct:si1	typeref:typename:u8[0x1]
res5	include/linux/immap_qe.h	/^	u8 res5[0x1];$/;"	m	struct:spi	typeref:typename:u8[0x1]
res5	include/linux/immap_qe.h	/^	u8 res5[0x200 - 0x1c4];$/;"	m	struct:ucc_ethernet	typeref:typename:u8[]
res5	include/linux/immap_qe.h	/^	u8 res5[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res5	include/linux/immap_qe.h	/^	u8 res5[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res5	include/linux/immap_qe.h	/^	u8 res5[2];$/;"	m	struct:usb_ctlr	typeref:typename:u8[2]
res5	include/linux/mtd/omap_gpmc.h	/^	u8 res5[0x8];		\/* 0x58 *\/$/;"	m	struct:gpmc	typeref:typename:u8[0x8]
res5	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res5[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res5	include/usb/ehci-ci.h	/^	u8	res5[0x18];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x18]
res5	include/usb/mpc8xx_udc.h	/^	char res5[8];	\/* Reserved *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char[8]
res5	post/cpu/mpc8xx/usb.c	/^	uchar res5[8];$/;"	m	struct:usb	typeref:typename:uchar[8]	file:
res50	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res50[0x18];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x18]
res50	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res50[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res50	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res50[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res50	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res50[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res50	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res50[0x4];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x4]
res50	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res50[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res50	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res50[0x78];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x78]
res50	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res50[0xa4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xa4]
res50	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res50[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res50	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res50[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res50	arch/powerpc/include/asm/immap_86xx.h	/^	char	res50[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res50	arch/powerpc/include/asm/immap_86xx.h	/^	char	res50[188];$/;"	m	struct:ccsr_tsec	typeref:typename:char[188]
res50	arch/powerpc/include/asm/immap_86xx.h	/^	char	res50[4];$/;"	m	struct:ccsr_rio	typeref:typename:char[4]
res500	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res500[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res500	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res500[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res501	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res501[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res502	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res502[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res503	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res503[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res504	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res504[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res505	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res505[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res506	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res506[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res507	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res507[0x1c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x1c]
res508	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res508[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res509	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res509[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res51	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res51[0x2f78];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x2f78]
res51	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res51[0x34e0];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x34e0]
res51	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res51[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res51	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res51[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res51	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res51[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res51	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res51[0x4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x4]
res51	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res51[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res51	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res51[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res51	arch/powerpc/include/asm/immap_86xx.h	/^	char	res51[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res51	arch/powerpc/include/asm/immap_86xx.h	/^	char	res51[8656];$/;"	m	struct:ccsr_rio	typeref:typename:char[8656]
res51	arch/powerpc/include/asm/immap_86xx.h	/^	char	res51[96];$/;"	m	struct:ccsr_tsec	typeref:typename:char[96]
res510	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res510[0x8];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x8]
res511	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res511[0xc];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc]
res512	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res512[0x8];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x8]
res514	include/tsec.h	/^	u32	res514;$/;"	m	struct:tsec	typeref:typename:u32
res518	include/tsec.h	/^	u32	res518;$/;"	m	struct:tsec	typeref:typename:u32
res51c	include/tsec.h	/^	u32	res51c;$/;"	m	struct:tsec	typeref:typename:u32
res52	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res52[0x2c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x2c]
res52	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res52[0x4];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x4]
res52	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res52[0xb8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xb8]
res52	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res52[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res52	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res52[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res52	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res52[0xa5c];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xa5c]
res52	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res52[0xa64];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xa64]
res52	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res52[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res52	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res52[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res52	arch/powerpc/include/asm/immap_86xx.h	/^	char	res52[204];$/;"	m	struct:ccsr_pic	typeref:typename:char[204]
res52	arch/powerpc/include/asm/immap_86xx.h	/^	char	res52[352];$/;"	m	struct:ccsr_tsec	typeref:typename:char[352]
res52	arch/powerpc/include/asm/immap_86xx.h	/^	char	res52[40];$/;"	m	struct:ccsr_rio	typeref:typename:char[40]
res53	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res53[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res53	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res53[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res53	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res53[0xf4];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xf4]
res53	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res53[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res53	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res53[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res53	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res53[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res53	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res53[0x34];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x34]
res53	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res53[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res53	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res53[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res53	arch/powerpc/include/asm/immap_86xx.h	/^	char	res53[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res53	arch/powerpc/include/asm/immap_86xx.h	/^	char	res53[900];$/;"	m	struct:ccsr_rio	typeref:typename:char[900]
res53	arch/powerpc/include/asm/immap_86xx.h	/^	char    res53[500];$/;"	m	struct:ccsr_tsec	typeref:typename:char[500]
res538	include/tsec.h	/^	u32	res538;$/;"	m	struct:tsec	typeref:typename:u32
res54	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res54[0x10];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x10]
res54	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res54[0x1f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1f8]
res54	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res54[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res54	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res54[0xf0];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xf0]
res54	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res54[0x14];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x14]
res54	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res54[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res54	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res54[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res54	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res54[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res54	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res54[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res54	arch/powerpc/include/asm/immap_86xx.h	/^	char	res54[16];$/;"	m	struct:ccsr_rio	typeref:typename:char[16]
res54	arch/powerpc/include/asm/immap_86xx.h	/^	char	res54[60140];$/;"	m	struct:ccsr_pic	typeref:typename:char[60140]
res54	arch/powerpc/include/asm/immap_86xx.h	/^	char    res54[1024];$/;"	m	struct:ccsr_tsec	typeref:typename:char[1024]
res548	include/tsec.h	/^	u32	res548[46];$/;"	m	struct:tsec	typeref:typename:u32[46]
res55	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res55[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res55	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res55[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res55	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res55[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res55	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res55[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res55	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res55[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res55	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res55[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res55	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res55[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res55	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res55[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res55	arch/powerpc/include/asm/immap_86xx.h	/^	char	res55[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res55	arch/powerpc/include/asm/immap_86xx.h	/^	char	res55[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res56	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res56[0x18];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x18]
res56	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res56[0x5f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x5f8]
res56	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res56[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res56	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res56[0xfc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xfc]
res56	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res56[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res56	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res56[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res56	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res56[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res56	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res56[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res56	arch/powerpc/include/asm/immap_86xx.h	/^	char	res56[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res56	arch/powerpc/include/asm/immap_86xx.h	/^	char	res56[48];$/;"	m	struct:ccsr_rio	typeref:typename:char[48]
res57	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res57[0x14];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x14]
res57	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res57[0x9c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x9c]
res57	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res57[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res57	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res57[0xf8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xf8]
res57	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res57[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res57	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res57[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res57	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res57[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res57	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res57[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res57	arch/powerpc/include/asm/immap_86xx.h	/^	char	res57[100];$/;"	m	struct:ccsr_rio	typeref:typename:char[100]
res57	arch/powerpc/include/asm/immap_86xx.h	/^	char	res57[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res58	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res58[0x18];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x18]
res58	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res58[0x3f8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x3f8]
res58	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res58[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res58	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res58[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res58	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res58[0x134];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x134]
res58	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res58[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res58	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res58[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res58	arch/powerpc/include/asm/immap_86xx.h	/^	char	res58[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res58	arch/powerpc/include/asm/immap_86xx.h	/^	char	res58[51984];$/;"	m	struct:ccsr_rio	typeref:typename:char[51984]
res59	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res59[0x1c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1c]
res59	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res59[0x5f8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x5f8]
res59	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res59[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res59	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res59[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res59	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res59[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res59	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res59[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res59	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res59[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res59	arch/powerpc/include/asm/immap_86xx.h	/^	char	res59[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res5E	arch/m68k/include/asm/immap_5329.h	/^	u16 res5E;		\/* 0x5E - 0x5F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res5_2	arch/powerpc/include/asm/immap_8260.h	/^	char	res5_2[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res6	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res6;$/;"	m	struct:i2c	typeref:typename:unsigned short
res6	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res6[0x14];$/;"	m	struct:pm	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res6[0xb8];$/;"	m	struct:prcm	typeref:typename:u8[0xb8]
res6	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res6;$/;"	m	struct:i2c	typeref:typename:unsigned short
res6	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res6;$/;"	m	struct:i2c	typeref:typename:unsigned short
res6	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res6;$/;"	m	struct:i2c	typeref:typename:unsigned short
res6	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res6[0xc];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res6;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res6[15];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[15]
res6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res6[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res6[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res6[3];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[3]
res6	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res6[3];$/;"	m	struct:s3c24x0_usb_dev_dmas	typeref:typename:u8[3]
res6	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res6[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res6	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res6[0x18];		\/* 0x1e8 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x18]
res6	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res6[0xc];			\/* 0x304 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res6[0xc];			\/* 0x9c4 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res6[0xd4];			\/* 0x12c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0xd4]
res6	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u8 res6[0x10];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x10]
res6	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res6[0x0c];		\/* 0xb4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x0c]
res6	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res6[0x28];		\/* 0x218 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res6[0x68];		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x68]
res6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res6[0x14];		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res6[0x14];		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res6[0x14];		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res6[0x68];		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x68]
res6	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res6[0xc];		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res6[0xc];		\/* 0x0f4 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	res6[47];	\/* 0x124 ~ 0x1DC *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int[47]
res6	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res6[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res6	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res6[0x18];		\/* 0x1e8 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x18]
res6	arch/arm/include/asm/arch/display.h	/^	u8 res6[0xc];			\/* 0x304 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch/display.h	/^	u8 res6[0xc];			\/* 0x9c4 *\/$/;"	m	struct:sunxi_de_be_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch/display.h	/^	u8 res6[0xd4];			\/* 0x12c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0xd4]
res6	arch/arm/include/asm/arch/dram_sun4i.h	/^	u8 res6[0x10];$/;"	m	struct:sunxi_dram_reg	typeref:typename:u8[0x10]
res6	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res6[0x0c];		\/* 0xb4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x0c]
res6	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res6[0x28];		\/* 0x218 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res6	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res6[0x68];		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x68]
res6	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res6[0x14];		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res6[0x14];		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res6[0x14];		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x14]
res6	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res6[0x68];		\/* 0x68 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x68]
res6	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res6[0xc];		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u8[0xc]
res6	arch/arm/include/asm/arch/prcm.h	/^	u8 res6[0xc];		\/* 0x0f4 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0xc]
res6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res6[0x12c];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x12c]
res6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res6[0x1f8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1f8]
res6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res6[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res6[0xf8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xf8]
res6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res6[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res6[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res6[0x8];$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned char[0x8]
res6	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res6[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res6	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res6[0x2c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x2c]
res6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res6[0xec];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xec]
res6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res6[0xec];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xec]
res6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res6[0xf4];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xf4]
res6	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res6[0x4];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0x4]
res6	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res6[59];		\/* 0x614 - 0x6FF *\/$/;"	m	struct:xbs	typeref:typename:u32[59]
res6	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res6;$/;"	m	struct:fbcs	typeref:typename:u16
res6	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 res6[19];		\/* 0x34 - 0x7F *\/$/;"	m	struct:can_ctrl	typeref:typename:u32[19]
res6	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res6[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res6	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res6[3];		\/* 0xE5 - 0xE7 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
res6	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res6[3];		\/* 0xE9 - 0xEB *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
res6	arch/m68k/include/asm/coldfire/pwm.h	/^	u8 res6[7];$/;"	m	struct:pwm_ctrl	typeref:typename:u8[7]
res6	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 res6;$/;"	m	struct:qspi_ctrl	typeref:typename:u16
res6	arch/m68k/include/asm/immap_5235.h	/^	u32 res6;		\/* 0x2d *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
res6	arch/m68k/include/asm/immap_5235.h	/^	u8 res6;		\/* 0x4B *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res6	arch/m68k/include/asm/immap_5272.h	/^	uchar res6[3];$/;"	m	struct:plic_ctrl	typeref:typename:uchar[3]
res6	arch/m68k/include/asm/immap_5272.h	/^	ushort res6;$/;"	m	struct:usb	typeref:typename:ushort
res6	arch/m68k/include/asm/immap_5275.h	/^	u16 res6;$/;"	m	struct:usb	typeref:typename:u16
res6	arch/m68k/include/asm/immap_5275.h	/^	u8 res6;$/;"	m	struct:sys_ctrl	typeref:typename:u8
res6	arch/m68k/include/asm/immap_5282.h	/^	u8 res6;$/;"	m	struct:scm_ctrl	typeref:typename:u8
res6	arch/m68k/include/asm/immap_5307.h	/^	u16 res6;$/;"	m	struct:csm	typeref:typename:u16
res6	arch/m68k/include/asm/immap_5307.h	/^	u32 res6;$/;"	m	struct:sim	typeref:typename:u32
res6	arch/m68k/include/asm/immap_5329.h	/^	u32 res6;		\/* 0x150 *\/$/;"	m	struct:usb_otg	typeref:typename:u32
res6	arch/m68k/include/asm/immap_5329.h	/^	u32 res6[18];		\/* 0x28 - 0x6F *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32[18]
res6	arch/m68k/include/asm/timer.h	/^	u8 res6;		\/* 0x10 *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u8
res6	arch/powerpc/include/asm/5xx_immap.h	/^	char               res6[2048];		\/* Reserved *\/$/;"	m	struct:immap	typeref:typename:char[2048]
res6	arch/powerpc/include/asm/5xx_immap.h	/^	char res6[12];$/;"	m	struct:mios	typeref:typename:char[12]
res6	arch/powerpc/include/asm/5xx_immap.h	/^	char res6[52];$/;"	m	struct:sys_int_timers	typeref:typename:char[52]
res6	arch/powerpc/include/asm/8xx_immap.h	/^	char	res6[0x8b];$/;"	m	struct:i2c	typeref:typename:char[0x8b]
res6	arch/powerpc/include/asm/8xx_immap.h	/^	char	res6[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res6	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res6[0x14];$/;"	m	struct:comm_proc	typeref:typename:u_char[0x14]
res6	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res6[17];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[17]
res6	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 res6[0xE8];$/;"	m	struct:fsl_i2c_base	typeref:typename:u8[0xE8]
res6	arch/powerpc/include/asm/fsl_lbc.h	/^	u8	res6[4];$/;"	m	struct:fsl_lbc	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/fsl_pci.h	/^	u32	res6[24];$/;"	m	struct:ccsr_pci	typeref:typename:u32[24]
res6	arch/powerpc/include/asm/immap_512x.h	/^	u8			res6[0x80];$/;"	m	struct:immap	typeref:typename:u8[0x80]
res6	arch/powerpc/include/asm/immap_512x.h	/^	u8 res6[4];$/;"	m	struct:pcictrl512x	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res6[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char		res6[1184];$/;"	m	struct:immap	typeref:typename:char[1184]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char	res6[163];$/;"	m	struct:sys_conf	typeref:typename:char[163]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char	res6[331];$/;"	m	struct:i2c	typeref:typename:char[331]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char	res6[3];$/;"	m	struct:mem_ctlr	typeref:typename:char[3]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char	res6[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char	res6[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res6	arch/powerpc/include/asm/immap_8260.h	/^	char	res6[94];$/;"	m	struct:sys_int_timers	typeref:typename:char[94]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res6[0x2000];$/;"	m	struct:immap	typeref:typename:u8[0x2000]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res6[0xA000];$/;"	m	struct:immap	typeref:typename:u8[0xA000]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res6[0xb000];$/;"	m	struct:immap	typeref:typename:u8[0xb000]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res6[0xd000];$/;"	m	struct:immap	typeref:typename:u8[0xd000]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res6[0xf00];$/;"	m	struct:immap	typeref:typename:u8[0xf00]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res6[128];$/;"	m	struct:immap	typeref:typename:u8[128]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res6[0x04];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0x04]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res6[0x14];$/;"	m	struct:ddr83xx	typeref:typename:u8[0x14]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res6[0x24];$/;"	m	struct:pex83xx	typeref:typename:u8[0x24]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res6[0xd4];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0xd4]
res6	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res6[4];$/;"	m	struct:pcictrl83xx	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res6[704];$/;"	m	struct:cpc_corenet	typeref:typename:u32[704]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u32 res6[384];$/;"	m	struct:serdes_corenet	typeref:typename:u32[384]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[268];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[268]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[331];$/;"	m	struct:ccsr_cpm_i2c	typeref:typename:u8[331]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[4];$/;"	m	struct:ccsr_qman	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[512];$/;"	m	struct:ccsr_rio	typeref:typename:u8[512]
res6	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res6[8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[8]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char			res6[12288];$/;"	m	struct:immap	typeref:typename:char[12288]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char	res6[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char	res6[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char	res6[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char	res6[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char	res6[28];$/;"	m	struct:ccsr_rio	typeref:typename:char[28]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char	res6[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res6	arch/powerpc/include/asm/immap_86xx.h	/^	char    res6[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res6	board/freescale/common/qixis.h	/^	u8 res6;$/;"	m	struct:qixis	typeref:typename:u8
res6	drivers/block/fsl_sata.h	/^	u8 res6[0x30];$/;"	m	struct:fsl_sata_reg	typeref:typename:u8[0x30]
res6	drivers/crypto/ace_sha.h	/^	unsigned char	res6[0x8];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x8]
res6	drivers/net/fec_mxc.h	/^	uint32_t res6[15];		\/* MBAR_ETH + 0x088-C0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[15]
res6	drivers/qe/uec.h	/^	u8   res6[0x100-0xC4];    \/* Initialize to zero *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8[]
res6	drivers/video/mx3fb.c	/^	u32	res6:28;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:28	file:
res6	drivers/video/mx3fb.c	/^	u32	res6:30;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:30	file:
res6	include/fsl_dtsec.h	/^	u32	res6;$/;"	m	struct:dtsec	typeref:typename:u32
res6	include/fsl_fman.h	/^	u32	res6[0x4];$/;"	m	struct:fm_fpm	typeref:typename:u32[0x4]
res6	include/fsl_fman.h	/^	u32 res6[0x18];$/;"	m	struct:fm_bmi_rx_port	typeref:typename:u32[0x18]
res6	include/fsl_ifc.h	/^	u32 res6;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res6	include/fsl_sec.h	/^	u8	res6[0x8a0];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x8a0]
res6	include/linux/immap_qe.h	/^	u8 res6[0x1];$/;"	m	struct:si1	typeref:typename:u8[0x1]
res6	include/linux/immap_qe.h	/^	u8 res6[0x22];$/;"	m	struct:usb_ctlr	typeref:typename:u8[0x22]
res6	include/linux/immap_qe.h	/^	u8 res6[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res6	include/linux/immap_qe.h	/^	u8 res6[0x2];$/;"	m	struct:spi	typeref:typename:u8[0x2]
res6	include/linux/immap_qe.h	/^	u8 res6[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res6	include/linux/mtd/omap_gpmc.h	/^	u32 res6;		\/* 0x1E8 *\/$/;"	m	struct:gpmc	typeref:typename:u32
res6	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res6[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res6	include/usb/ehci-ci.h	/^	u8	res6[0x4];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x4]
res60	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res60[0x18];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x18]
res60	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res60[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res60	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res60[0x8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x8]
res60	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res60[0x8c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8c]
res60	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res60[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res60	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res60[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res60	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res60[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res60	arch/powerpc/include/asm/immap_86xx.h	/^	char	res60[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res600	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res600[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res600	include/tsec.h	/^	u32	res600[32];$/;"	m	struct:tsec	typeref:typename:u32[32]
res601	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res601[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res601	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res601[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res602	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res602[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res602	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res602[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res603	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res603[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res604	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res604[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res605	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res605[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res606	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res606[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res607	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res607[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res608	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res608[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res609	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res609[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res60_1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res60_1[3];$/;"	m	struct:at91_matrix	typeref:typename:u32[3]
res60_2	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res60_2[56];$/;"	m	struct:at91_matrix	typeref:typename:u32[56]
res61	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res61[0x8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8]
res61	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res61[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res61	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res61[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res61	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res61[0xe8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xe8]
res61	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res61[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res61	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res61[0xb4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xb4]
res61	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res61[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res61	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res61[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res61	arch/powerpc/include/asm/immap_86xx.h	/^	char	res61[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res610	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res610[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res611	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res611[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res612	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res612[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res613	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res613[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res614	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res614[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res615	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res615[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res616	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res616[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res617	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res617[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res618	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res618[0x4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x4]
res619	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res619[0xc4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xc4]
res61_1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res61_1[3];$/;"	m	struct:at91_matrix	typeref:typename:u32[3]
res61_2	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res61_2[2];$/;"	m	struct:at91_matrix	typeref:typename:u32[2]
res61_3	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res61_3[114];$/;"	m	struct:at91_matrix	typeref:typename:u32[114]
res62	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res62[0x2f60];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x2f60]
res62	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res62[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res62	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res62[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res62	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res62[0xdc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xdc]
res62	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res62[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res62	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res62[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res62	arch/m68k/include/asm/immap_5329.h	/^	u16 res62;		\/* 0x62 - 0x63 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res62	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res62[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res62	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res62[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res62	arch/powerpc/include/asm/immap_86xx.h	/^	char	res62[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res620	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res620[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res621	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res621[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res622	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res622[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res63	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res63[0x18];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x18]
res63	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res63[0x8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8]
res63	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res63[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res63	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res63[0xe0];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0xe0]
res63	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res63[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res63	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res63[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res63	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res63[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res63	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res63[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res63	arch/powerpc/include/asm/immap_86xx.h	/^	char	res63[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res63_1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res63_1;$/;"	m	struct:at91_matrix	typeref:typename:u32
res63_2	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res63_2[2];$/;"	m	struct:at91_matrix	typeref:typename:u32[2]
res63_3	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		res63_3[54];$/;"	m	struct:at91_matrix	typeref:typename:u32[54]
res64	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res64[0x78];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x78]
res64	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res64[0xf4];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf4]
res64	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res64[0x134];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x134]
res64	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res64[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res64	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res64[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res64	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res64[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res64	arch/powerpc/include/asm/immap_86xx.h	/^	char	res64[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res65	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res65[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res65	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res65[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res65	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res65[0x1f4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1f4]
res65	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res65[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res65	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res65[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res65	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res65[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res65	arch/powerpc/include/asm/immap_86xx.h	/^	char	res65[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res66	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res66[0x10];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x10]
res66	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res66[0x1fc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1fc]
res66	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res66[0x1f4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x1f4]
res66	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res66[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res66	arch/m68k/include/asm/immap_5329.h	/^	u16 res66;		\/* 0x66 - 0x67 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res66	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res66[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res66	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res66[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res66	arch/powerpc/include/asm/immap_86xx.h	/^	char	res66[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res67	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res67[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res67	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res67[0x9c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x9c]
res67	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res67[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res67	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res67[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res67	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res67[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res67	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res67[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res67	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res67[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res67	arch/powerpc/include/asm/immap_86xx.h	/^	char	res67[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res68	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res68[0x18];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x18]
res68	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res68[0xf0];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xf0]
res68	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res68[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res68	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res68[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res68	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res68[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res68	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res68[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res68	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res68[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res68	arch/powerpc/include/asm/immap_86xx.h	/^	char	res68[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res69	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res69[0x0c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x0c]
res69	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res69[0x2f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x2f8]
res69	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res69[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res69	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res69[0x94];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x94]
res69	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res69[0x94];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x94]
res69	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res69[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res69	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res69[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res69	arch/powerpc/include/asm/immap_86xx.h	/^	char	res69[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res6F	arch/m68k/include/asm/immap_5329.h	/^	u8 res6F;		\/* 0x6F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res6_2	arch/powerpc/include/asm/immap_8260.h	/^	char	res6_2[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res7	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res7;$/;"	m	struct:i2c	typeref:typename:unsigned short
res7	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res7[0x4];$/;"	m	struct:prcm	typeref:typename:u8[0x4]
res7	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res7;$/;"	m	struct:i2c	typeref:typename:unsigned short
res7	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res7;$/;"	m	struct:i2c	typeref:typename:unsigned short
res7	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res7;$/;"	m	struct:i2c	typeref:typename:unsigned short
res7	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res7[0x4];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x4]
res7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u16	res7;$/;"	m	struct:s3c2400_mmc	typeref:typename:u16
res7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res7;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res7[16];$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8[16]
res7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res7[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res7	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res7[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res7	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res7[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res7	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res7[0x04];			\/* 0x21c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res7	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res7[0xec];			\/* 0x314 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0xec]
res7	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res7[0x08];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res7	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res7[0x28];		\/* 0x258 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res7[0x0c];		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x0c]
res7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u8 res7[0x6c];		\/* 0x154 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x6c]
res7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 res7;		\/* 0x150 zq status register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
res7	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res7[0x6c];		\/* 0x154 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x6c]
res7	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res7[0xc];		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0xc]
res7	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res7[0xc];		\/* 0x104 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0xc]
res7	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res7[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res7	arch/arm/include/asm/arch/display.h	/^	u8 res7[0x04];			\/* 0x21c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x04]
res7	arch/arm/include/asm/arch/display.h	/^	u8 res7[0xec];			\/* 0x314 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0xec]
res7	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res7[0x08];		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res7	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res7[0x28];		\/* 0x258 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u8[0x28]
res7	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res7[0x0c];		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x0c]
res7	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u8 res7[0x6c];		\/* 0x154 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x6c]
res7	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 res7;		\/* 0x150 zq status register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
res7	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res7[0x6c];		\/* 0x154 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x6c]
res7	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res7[0xc];		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0xc]
res7	arch/arm/include/asm/arch/prcm.h	/^	u8 res7[0xc];		\/* 0x104 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0xc]
res7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res7[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res7[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res7[0xcc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xcc]
res7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res7[0xfc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xfc]
res7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res7[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res7[0x4];$/;"	m	struct:exynos5420_phy_control	typeref:typename:unsigned char[0x4]
res7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res7[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res7	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res7[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res7	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res7[0x8];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x8]
res7	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res7[2];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[2]
res7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res7[0xdc];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0xdc]
res7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res7[0xf4];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xf4]
res7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res7[0xf4];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xf4]
res7	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res7[0xc];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0xc]
res7	arch/m68k/include/asm/coldfire/crossbar.h	/^	u32 res7[3];		\/* 0x704 - 0F *\/$/;"	m	struct:xbs	typeref:typename:u32[3]
res7	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res7;$/;"	m	struct:fbcs	typeref:typename:u16
res7	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res7[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
res7	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res7[3];		\/* 0xE9 - 0xEB *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
res7	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res7[3];		\/* 0xED - 0xEF *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
res7	arch/m68k/include/asm/immap_5227x.h	/^	u8 res7;		\/* 0x04 *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
res7	arch/m68k/include/asm/immap_5235.h	/^	u32 res7;		\/* 0x2f *\/$/;"	m	struct:scm_ctrl	typeref:typename:u32
res7	arch/m68k/include/asm/immap_5235.h	/^	u8 res7;		\/* 0x4F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
res7	arch/m68k/include/asm/immap_5272.h	/^	uchar res7;$/;"	m	struct:plic_ctrl	typeref:typename:uchar
res7	arch/m68k/include/asm/immap_5272.h	/^	ushort res7;$/;"	m	struct:usb	typeref:typename:ushort
res7	arch/m68k/include/asm/immap_5275.h	/^	u16 res7;$/;"	m	struct:usb	typeref:typename:u16
res7	arch/m68k/include/asm/immap_5275.h	/^	u8 res7;$/;"	m	struct:sys_ctrl	typeref:typename:u8
res7	arch/m68k/include/asm/immap_5282.h	/^	u8 res7;$/;"	m	struct:scm_ctrl	typeref:typename:u8
res7	arch/m68k/include/asm/immap_5307.h	/^	u16 res7;$/;"	m	struct:csm	typeref:typename:u16
res7	arch/m68k/include/asm/immap_5307.h	/^	u16 res7;$/;"	m	struct:intctrl	typeref:typename:u16
res7	arch/m68k/include/asm/immap_5329.h	/^	u32 res7[6];		\/* 0x168 - 0x17F *\/$/;"	m	struct:usb_otg	typeref:typename:u32[6]
res7	arch/m68k/include/asm/immap_5329.h	/^	u8 res7[4];		\/* 0x71 - 0x74 *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8[4]
res7	arch/m68k/include/asm/timer.h	/^	u16 res7;		\/* 0x12 *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
res7	arch/powerpc/include/asm/5xx_immap.h	/^	char               res7[1792];		\/* Reserved *\/$/;"	m	struct:immap	typeref:typename:char[1792]
res7	arch/powerpc/include/asm/5xx_immap.h	/^	char res7[1000];$/;"	m	struct:mios	typeref:typename:char[1000]
res7	arch/powerpc/include/asm/8xx_immap.h	/^	char	res7[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res7	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res7[4];$/;"	m	struct:comm_proc	typeref:typename:u_char[4]
res7	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res7[3];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[3]
res7	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res7[8];$/;"	m	struct:fsl_lbc	typeref:typename:u8[8]
res7	arch/powerpc/include/asm/immap_512x.h	/^	u8			res7[0xa00];$/;"	m	struct:immap	typeref:typename:u8[0xa00]
res7	arch/powerpc/include/asm/immap_512x.h	/^	u8 res7[132];$/;"	m	struct:pcictrl512x	typeref:typename:u8[132]
res7	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res7[12];$/;"	m	struct:psc512x	typeref:typename:volatile u8[12]
res7	arch/powerpc/include/asm/immap_8260.h	/^	char		res7[512];$/;"	m	struct:immap	typeref:typename:char[512]
res7	arch/powerpc/include/asm/immap_8260.h	/^	char	res7[390];$/;"	m	struct:sys_int_timers	typeref:typename:char[390]
res7	arch/powerpc/include/asm/immap_8260.h	/^	char	res7[3];$/;"	m	struct:mem_ctlr	typeref:typename:char[3]
res7	arch/powerpc/include/asm/immap_8260.h	/^	char	res7[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res7	arch/powerpc/include/asm/immap_8260.h	/^	char	res7[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res7[0x1e00];$/;"	m	struct:immap	typeref:typename:u8[0x1e00]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res7[0x27A00];$/;"	m	struct:immap	typeref:typename:u8[0x27A00]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res7[0x7000];$/;"	m	struct:immap	typeref:typename:u8[0x7000]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res7[0x80];$/;"	m	struct:immap	typeref:typename:u8[0x80]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res7[0xC0000];$/;"	m	struct:immap	typeref:typename:u8[0xC0000]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res7[128];$/;"	m	struct:immap	typeref:typename:u8[128]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res7[0x04];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0x04]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res7[0x14];$/;"	m	struct:ddr83xx	typeref:typename:u8[0x14]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res7[0x38];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x38]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res7[132];$/;"	m	struct:pcictrl83xx	typeref:typename:u8[132]
res7	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res7[4];$/;"	m	struct:pex83xx	typeref:typename:u8[4]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res7[5];$/;"	m	struct:cpc_corenet	typeref:typename:u32[5]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[0x2e8];$/;"	m	struct:ccsr_qman	typeref:typename:u8[0x2e8]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[0x2f4];$/;"	m	struct:ccsr_bman	typeref:typename:u8[0x2f4]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[100];$/;"	m	struct:ccsr_rio	typeref:typename:u8[100]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[12];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[12]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[16];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[16]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res7	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res7[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[20];$/;"	m	struct:ccsr_rio	typeref:typename:char[20]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[40];$/;"	m	struct:ccsr_tsec	typeref:typename:char[40]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res7	arch/powerpc/include/asm/immap_86xx.h	/^	char	res7[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res7	board/freescale/common/qixis.h	/^	u8 res7;$/;"	m	struct:qixis	typeref:typename:u8
res7	drivers/block/fsl_sata.h	/^	u8 res7[0x2b0];$/;"	m	struct:fsl_sata_reg	typeref:typename:u8[0x2b0]
res7	drivers/crypto/ace_sha.h	/^	unsigned char   res7[0x30];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x30]
res7	drivers/net/fec_mxc.h	/^	uint32_t res7[7];		\/* MBAR_ETH + 0x0C8-E0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[7]
res7	include/fsl_dtsec.h	/^	u32	res7[46];$/;"	m	struct:dtsec	typeref:typename:u32[46]
res7	include/fsl_fman.h	/^	u32	res7[0x260];$/;"	m	struct:fm_fpm	typeref:typename:u32[0x260]
res7	include/fsl_ifc.h	/^	u32 res7;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res7	include/fsl_ifc.h	/^	u32 res7[0x2];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32[0x2]
res7	include/fsl_sec.h	/^	u8	res7[0x10];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x10]
res7	include/linux/immap_qe.h	/^	u8 res7[0x1];$/;"	m	struct:si1	typeref:typename:u8[0x1]
res7	include/linux/immap_qe.h	/^	u8 res7[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res7	include/linux/immap_qe.h	/^	u8 res7[0x2];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x2]
res7	include/linux/immap_qe.h	/^	u8 res7[0x8];$/;"	m	struct:spi	typeref:typename:u8[0x8]
res7	include/linux/mtd/omap_gpmc.h	/^	u8 res7[12];		\/* 0x224 *\/$/;"	m	struct:gpmc	typeref:typename:u8[12]
res7	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res7[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res7	include/usb/ehci-ci.h	/^	u8	res7[0x4];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x4]
res70	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res70[0x74];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x74]
res70	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res70[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res70	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res70[0xfc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xfc]
res70	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res70[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res70	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res70[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res70	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res70[140];$/;"	m	struct:ccsr_pic	typeref:typename:u8[140]
res70	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res70[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res70	arch/powerpc/include/asm/immap_86xx.h	/^	char	res70[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res700	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res700[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res701	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res701[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res702	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res702[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res71	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res71[0x10];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x10]
res71	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res71[0x5f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x5f8]
res71	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res71[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res71	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res71[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res71	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res71[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res71	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res71[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res71	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res71[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res71	arch/powerpc/include/asm/immap_86xx.h	/^	char	res71[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res72	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res72[0x10];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x10]
res72	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res72[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res72	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res72[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res72	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res72[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res72	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res72[0x54];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x54]
res72	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res72[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res72	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res72[4];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[4]
res72	arch/powerpc/include/asm/immap_86xx.h	/^	char	res72[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res73	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res73[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res73	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res73[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res73	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res73[0x8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x8]
res73	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res73[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res73	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res73[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res73	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res73[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res73	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res73[248];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[248]
res73	arch/powerpc/include/asm/immap_86xx.h	/^	char	res73[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res74	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res74[0x10];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x10]
res74	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res74[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res74	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res74[0xd8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xd8]
res74	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res74[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res74	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res74[0x18];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x18]
res74	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res74[1024];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[1024]
res74	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res74[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res74	arch/powerpc/include/asm/immap_86xx.h	/^	char	res74[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res740	include/tsec.h	/^	u32	res740[48];$/;"	m	struct:tsec	typeref:typename:u32[48]
res75	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res75[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res75	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res75[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res75	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res75[0xdc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xdc]
res75	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res75[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res75	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res75[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res75	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res75[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res75	arch/powerpc/include/asm/immap_86xx.h	/^	char	res75[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res76	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res76[0x18];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x18]
res76	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res76[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res76	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res76[0xe0];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xe0]
res76	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res76[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res76	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res76[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res76	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res76[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res76	arch/powerpc/include/asm/immap_86xx.h	/^	char	res76[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res77	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res77[0x6c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x6c]
res77	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res77[0x8c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8c]
res77	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res77[0xe0];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xe0]
res77	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res77[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res77	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res77[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res77	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res77[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res77	arch/powerpc/include/asm/immap_86xx.h	/^	char	res77[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res78	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res78[0x60];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x60]
res78	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res78[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res78	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res78[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res78	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res78[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res78	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res78[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res78	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res78[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res78	arch/powerpc/include/asm/immap_86xx.h	/^	char	res78[140];$/;"	m	struct:ccsr_pic	typeref:typename:char[140]
res79	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res79[0x74];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x74]
res79	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res79[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res79	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res79[0xc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xc]
res79	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res79[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res79	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res79[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res79	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res79[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res79	arch/powerpc/include/asm/immap_86xx.h	/^	char	res79[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res7_2	arch/powerpc/include/asm/immap_8260.h	/^	char	res7_2[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res8	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res8[45];$/;"	m	struct:i2c	typeref:typename:unsigned short[45]
res8	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res8[0x24];$/;"	m	struct:prcm	typeref:typename:u8[0x24]
res8	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res8;$/;"	m	struct:i2c	typeref:typename:unsigned short
res8	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res8[45];$/;"	m	struct:i2c	typeref:typename:unsigned short[45]
res8	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res8[45];$/;"	m	struct:i2c	typeref:typename:unsigned short[45]
res8	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res8[0x224];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x224]
res8	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res8;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res8	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res8[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res8	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res8[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res8	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res8[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res8	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u8 res8[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res8	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res8[0x4];		\/* 0x20c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res8	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res8[0x1d4];			\/* 0x22c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x1d4]
res8	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res8[0xfc];			\/* 0x404 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0xfc]
res8	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res8[0xb8];		\/* 0x148 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0xb8]
res8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res8[0x08];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u8 res8[0x6c];		\/* 0x154 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x6c]
res8	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res8[0x2c];		\/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x2c]
res8	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res8[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res8	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res8[0x4];		\/* 0x114 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x4]
res8	arch/arm/include/asm/arch/clock_sun4i.h	/^	u8 res8[0x4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x4]
res8	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res8[0x4];		\/* 0x20c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res8	arch/arm/include/asm/arch/display.h	/^	u8 res8[0x1d4];			\/* 0x22c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x1d4]
res8	arch/arm/include/asm/arch/display.h	/^	u8 res8[0xfc];			\/* 0x404 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0xfc]
res8	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res8[0xb8];		\/* 0x148 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0xb8]
res8	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res8[0x08];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res8	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u8 res8[0x6c];		\/* 0x154 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x6c]
res8	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res8[0x2c];		\/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x2c]
res8	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res8[0x8];		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x8]
res8	arch/arm/include/asm/arch/prcm.h	/^	u8 res8[0x4];		\/* 0x114 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x4]
res8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res8[0x1fc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x1fc]
res8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res8[0x37f8];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x37f8]
res8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res8[0x37f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x37f8]
res8	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res8[0x5f8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x5f8]
res8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res8[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res8[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res8	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res8[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res8	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res8[0x1c];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x1c]
res8	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res8[7];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[7]
res8	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res8[0x10];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x10]
res8	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res8[0x10];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x10]
res8	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res8[0x1e0];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x1e0]
res8	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res8[0xdc];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0xdc]
res8	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res8;$/;"	m	struct:fbcs	typeref:typename:u16
res8	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res8[3];		\/* 0xED - 0xEF *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
res8	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res8[3];		\/* 0xF1 - 0xF3 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
res8	arch/m68k/include/asm/immap_5235.h	/^	u16 res8;		\/* 0x56 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u16
res8	arch/m68k/include/asm/immap_5235.h	/^	u8 res8[3];		\/* 0x31 - 0x33 *\/$/;"	m	struct:scm_ctrl	typeref:typename:u8[3]
res8	arch/m68k/include/asm/immap_5272.h	/^	ushort res8;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
res8	arch/m68k/include/asm/immap_5272.h	/^	ushort res8;$/;"	m	struct:usb	typeref:typename:ushort
res8	arch/m68k/include/asm/immap_5275.h	/^	u16 res8;$/;"	m	struct:usb	typeref:typename:u16
res8	arch/m68k/include/asm/immap_5275.h	/^	u8 res8[3];$/;"	m	struct:sys_ctrl	typeref:typename:u8[3]
res8	arch/m68k/include/asm/immap_5282.h	/^	u16 res8;$/;"	m	struct:scm_ctrl	typeref:typename:u16
res8	arch/m68k/include/asm/immap_5307.h	/^	u16 res8;$/;"	m	struct:csm	typeref:typename:u16
res8	arch/m68k/include/asm/immap_5307.h	/^	u8  res8;$/;"	m	struct:intctrl	typeref:typename:u8
res8	arch/m68k/include/asm/immap_5329.h	/^	u32 res8;		\/* 0x78 *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u32
res8	arch/m68k/include/asm/immap_5329.h	/^	u32 res8[7];		\/* 0x188 - 0x1A3 *\/$/;"	m	struct:usb_otg	typeref:typename:u32[7]
res8	arch/powerpc/include/asm/5xx_immap.h	/^	char res8[40];$/;"	m	struct:mios	typeref:typename:char[40]
res8	arch/powerpc/include/asm/8xx_immap.h	/^	char	res8[0x13];$/;"	m	struct:sdma_csr	typeref:typename:char[0x13]
res8	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res8[3];$/;"	m	struct:comm_proc	typeref:typename:u_char[3]
res8	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res8[14];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[14]
res8	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res8[12];$/;"	m	struct:fsl_lbc	typeref:typename:u8[12]
res8	arch/powerpc/include/asm/immap_512x.h	/^	u8			res8[0x4000];$/;"	m	struct:immap	typeref:typename:u8[0x4000]
res8	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res8[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res8	arch/powerpc/include/asm/immap_8260.h	/^	char		res8[512];$/;"	m	struct:immap	typeref:typename:char[512]
res8	arch/powerpc/include/asm/immap_8260.h	/^	char	res8[3];$/;"	m	struct:mem_ctlr	typeref:typename:char[3]
res8	arch/powerpc/include/asm/immap_8260.h	/^	char	res8[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res8	arch/powerpc/include/asm/immap_8260.h	/^	char	res8[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res8[0x13A00];$/;"	m	struct:immap	typeref:typename:u8[0x13A00]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res8[0x4A00];$/;"	m	struct:immap	typeref:typename:u8[0x4A00]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res8[0x8000];$/;"	m	struct:immap	typeref:typename:u8[0x8000]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res8[0x9000];$/;"	m	struct:immap	typeref:typename:u8[0x9000]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res8[0xC0000];$/;"	m	struct:immap	typeref:typename:u8[0xC0000]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res8[0x20];$/;"	m	struct:pex83xx	typeref:typename:u8[0x20]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res8[0x38];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x38]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res8[0xA4];$/;"	m	struct:ddr83xx	typeref:typename:u8[0xA4]
res8	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res8[0xC];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0xC]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res8[5];$/;"	m	struct:cpc_corenet	typeref:typename:u32[5]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[12];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[12]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[20];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[20]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[4];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[4]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[88];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[88]
res8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res8[8];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[8]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char	res8[12];$/;"	m	struct:ccsr_gur	typeref:typename:char[12]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char	res8[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char	res8[12];$/;"	m	struct:ccsr_rio	typeref:typename:char[12]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char	res8[20];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[20]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char	res8[4];$/;"	m	struct:ccsr_ht	typeref:typename:char[4]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char	res8[4];$/;"	m	struct:ccsr_pex	typeref:typename:char[4]
res8	arch/powerpc/include/asm/immap_86xx.h	/^	char    res8[52];$/;"	m	struct:ccsr_tsec	typeref:typename:char[52]
res8	board/freescale/common/qixis.h	/^	u8 res8[11];$/;"	m	struct:qixis	typeref:typename:u8[11]
res8	drivers/block/fsl_sata.h	/^	u8 res8[0xbec];$/;"	m	struct:fsl_sata_reg	typeref:typename:u8[0xbec]
res8	drivers/crypto/ace_sha.h	/^	unsigned char   res8[0x60];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x60]
res8	drivers/net/fec_mxc.h	/^	uint32_t res8[10];		\/* MBAR_ETH + 0x0F0-114 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[10]
res8	include/fsl_dtsec.h	/^	u32	res8;$/;"	m	struct:dtsec	typeref:typename:u32
res8	include/fsl_fman.h	/^	u32	res8[0xa0];$/;"	m	struct:fm_fpm	typeref:typename:u32[0xa0]
res8	include/fsl_ifc.h	/^	u32 res8;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res8	include/fsl_ifc.h	/^	u32 res8[0x2];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32[0x2]
res8	include/fsl_sec.h	/^	u8	res8[0x4];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x4]
res8	include/linux/immap_qe.h	/^	u8 res8[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res8	include/linux/immap_qe.h	/^	u8 res8[0x4C];$/;"	m	struct:ucc_fast	typeref:typename:u8[0x4C]
res8	include/linux/immap_qe.h	/^	u8 res8[0x8];$/;"	m	struct:si1	typeref:typename:u8[0x8]
res8	include/linux/mtd/omap_gpmc.h	/^	u8 res8[12];		\/* 0x234 *\/$/;"	m	struct:gpmc	typeref:typename:u8[12]
res8	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res8[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res8	include/usb/ehci-ci.h	/^	u8	res8[0x8];$/;"	m	struct:usb_ehci	typeref:typename:u8[0x8]
res80	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res80[0x20];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x20]
res80	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res80[0x2edc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x2edc]
res80	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res80[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res80	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res80[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res80	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res80[0x54];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x54]
res80	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res80[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res80	arch/powerpc/include/asm/immap_86xx.h	/^	char	res80[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res800	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res800[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res801	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res801[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res802	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res802[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res803	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res803[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res804	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res804[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res805	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res805[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res806	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res806[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res807	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res807[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res808	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res808[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res809	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res809[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res81	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res81[0x14];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x14]
res81	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res81[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res81	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res81[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res81	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res81[0x54];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x54]
res81	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res81[0x54];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x54]
res81	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res81[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res81	arch/powerpc/include/asm/immap_86xx.h	/^	char	res81[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res810	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res810[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res811	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res811[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res812	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res812[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res813	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res813[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res814	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res814[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res815	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res815[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res816	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res816[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res817	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res817[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res818	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res818[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res819	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res819[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res82	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res82[0x3f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x3f8]
res82	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res82[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res82	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res82[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res82	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res82[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res82	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res82[0x74];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x74]
res82	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res82[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res82	arch/powerpc/include/asm/immap_86xx.h	/^	char	res82[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res83	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res83[0x10];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x10]
res83	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res83[0x14];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x14]
res83	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res83[0x1f8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1f8]
res83	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res83[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res83	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res83[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res83	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res83[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res83	arch/powerpc/include/asm/immap_86xx.h	/^	char	res83[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res84	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res84[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res84	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res84[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res84	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res84[0xf8];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0xf8]
res84	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res84[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res84	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res84[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res84	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res84[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res84	arch/powerpc/include/asm/immap_86xx.h	/^	char	res84[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res85	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res85[0x5c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x5c]
res85	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res85[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res85	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res85[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res85	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res85[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res85	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res85[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res85	arch/powerpc/include/asm/immap_86xx.h	/^	char	res85[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res850	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res850[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res86	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res86[0x184];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x184]
res86	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res86[0x20];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x20]
res86	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res86[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res86	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res86[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res86	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res86[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res86	arch/powerpc/include/asm/immap_86xx.h	/^	char	res86[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res87	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res87[0x14];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x14]
res87	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res87[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res87	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res87[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res87	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res87[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res87	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res87[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res87	arch/powerpc/include/asm/immap_86xx.h	/^	char	res87[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res88	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res88[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res88	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res88[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res88	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res88[0x34];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x34]
res88	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res88[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res88	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res88[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res88	arch/powerpc/include/asm/immap_86xx.h	/^	char	res88[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res89	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res89[0x14];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x14]
res89	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res89[0x1c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1c]
res89	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res89[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res89	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res89[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res89	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res89[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res89	arch/powerpc/include/asm/immap_86xx.h	/^	char	res89[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res8_2	arch/powerpc/include/asm/immap_8260.h	/^	char	res8_2[4];$/;"	m	struct:pci_config	typeref:typename:char[4]
res9	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short res9;$/;"	m	struct:i2c	typeref:typename:unsigned short
res9	arch/arm/include/asm/arch-omap3/cpu.h	/^	u8 res9[0xbc];$/;"	m	struct:prcm	typeref:typename:u8[0xbc]
res9	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short res9;$/;"	m	struct:i2c	typeref:typename:unsigned short
res9	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short res9;$/;"	m	struct:i2c	typeref:typename:unsigned short
res9	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short res9;$/;"	m	struct:i2c	typeref:typename:unsigned short
res9	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u8	res9[0x14];$/;"	m	struct:rk3288_edp	typeref:typename:u8[0x14]
res9	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	res9;$/;"	m	struct:s3c24x0_gpio	typeref:typename:u32
res9	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res9[3];$/;"	m	struct:s3c2400_mmc	typeref:typename:u8[3]
res9	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res9[3];$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8[3]
res9	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	res9[3];$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8[3]
res9	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u8 res9[0x4];		\/* 0x21c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res9	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res9[0x14];			\/* 0x52c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x14]
res9	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res9[0x18];			\/* 0x528 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x18]
res9	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 res9[0x80];			\/* 0x580 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x80]
res9	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u8 res9[0x08];		\/* 0x258 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u8 res9[0x5c];		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x5c]
res9	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u8 res9[0xf4];		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0xf4]
res9	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u8 res9[0x5c];		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x5c]
res9	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u8 res9[0x4];		\/* 0x11c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x4]
res9	arch/arm/include/asm/arch/cpucfg.h	/^	u8 res9[0x4];		\/* 0x21c *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u8[0x4]
res9	arch/arm/include/asm/arch/display.h	/^	u8 res9[0x14];			\/* 0x52c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x14]
res9	arch/arm/include/asm/arch/display.h	/^	u8 res9[0x18];			\/* 0x528 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x18]
res9	arch/arm/include/asm/arch/display.h	/^	u8 res9[0x80];			\/* 0x580 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u8[0x80]
res9	arch/arm/include/asm/arch/dram_sun6i.h	/^	u8 res9[0x08];		\/* 0x258 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x08]
res9	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u8 res9[0x5c];		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x5c]
res9	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u8 res9[0xf4];		\/* 0x20c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0xf4]
res9	arch/arm/include/asm/arch/dram_sun9i.h	/^	u8 res9[0x5c];		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u8[0x5c]
res9	arch/arm/include/asm/arch/prcm.h	/^	u8 res9[0x4];		\/* 0x11c *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u8[0x4]
res9	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res9[0x0c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x0c]
res9	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res9[0x1fc];$/;"	m	struct:exynos4_clock	typeref:typename:unsigned char[0x1fc]
res9	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res9[0x1fc];$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned char[0x1fc]
res9	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res9[0x5f8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x5f8]
res9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res9[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
res9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res9[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
res9	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char res9[0xC];$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned char[0xC]
res9	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned char	res9[0x200];$/;"	m	struct:exynos_dp	typeref:typename:unsigned char[0x200]
res9	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int res9[1];$/;"	m	struct:exynos_fb	typeref:typename:unsigned int[1]
res9	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res9[0x5fc];$/;"	m	struct:exynos4_power	typeref:typename:unsigned char[0x5fc]
res9	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res9[0xd0];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0xd0]
res9	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res9[0xd0];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0xd0]
res9	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned char	res9[0xf0];$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned char[0xf0]
res9	arch/m68k/include/asm/coldfire/flexbus.h	/^    u16 res9;$/;"	m	struct:fbcs	typeref:typename:u16
res9	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res9[3];		\/* 0xF1 - 0xF3 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
res9	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 res9[3];		\/* 0xF5 - 0xF7 *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
res9	arch/m68k/include/asm/immap_5272.h	/^	ushort res9;$/;"	m	struct:plic_ctrl	typeref:typename:ushort
res9	arch/m68k/include/asm/immap_5272.h	/^	ushort res9;$/;"	m	struct:usb	typeref:typename:ushort
res9	arch/m68k/include/asm/immap_5275.h	/^	u16 res9;$/;"	m	struct:usb	typeref:typename:u16
res9	arch/m68k/include/asm/immap_5307.h	/^	u16 res9;$/;"	m	struct:csm	typeref:typename:u16
res9	arch/m68k/include/asm/immap_5307.h	/^	u16 res9;$/;"	m	struct:intctrl	typeref:typename:u16
res9	arch/powerpc/include/asm/5xx_immap.h	/^	char res9[14];$/;"	m	struct:mios	typeref:typename:char[14]
res9	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	res9[2];$/;"	m	struct:comm_proc	typeref:typename:u_char[2]
res9	arch/powerpc/include/asm/8xx_immap.h	/^	uint	res9[0x1e];		\/* reserved				*\/$/;"	m	struct:fec	typeref:typename:uint[0x1e]
res9	arch/powerpc/include/asm/fsl_lbc.h	/^	u8	res9[0x8];$/;"	m	struct:fsl_lbc	typeref:typename:u8[0x8]
res9	arch/powerpc/include/asm/fsl_lbc.h	/^	u8      res9[0xF28];$/;"	m	struct:fsl_lbc	typeref:typename:u8[0xF28]
res9	arch/powerpc/include/asm/immap_512x.h	/^	u8			res9[0xd00];$/;"	m	struct:immap	typeref:typename:u8[0xd00]
res9	arch/powerpc/include/asm/immap_512x.h	/^	volatile u8	res9[3];$/;"	m	struct:psc512x	typeref:typename:volatile u8[3]
res9	arch/powerpc/include/asm/immap_8260.h	/^	char		res9[512];$/;"	m	struct:immap	typeref:typename:char[512]
res9	arch/powerpc/include/asm/immap_8260.h	/^	char	res9[3];$/;"	m	struct:mem_ctlr	typeref:typename:char[3]
res9	arch/powerpc/include/asm/immap_8260.h	/^	char	res9[3];$/;"	m	struct:sdma_csr	typeref:typename:char[3]
res9	arch/powerpc/include/asm/immap_8260.h	/^	char	res9[8];$/;"	m	struct:pci_config	typeref:typename:char[8]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res9[0x1000];$/;"	m	struct:immap	typeref:typename:u8[0x1000]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res9[0x22000];$/;"	m	struct:immap	typeref:typename:u8[0x22000]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res9[0x5000];$/;"	m	struct:immap	typeref:typename:u8[0x5000]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8			res9[0x6000];$/;"	m	struct:immap	typeref:typename:u8[0x6000]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res9[0x10];$/;"	m	struct:pex_csb_bridge	typeref:typename:u8[0x10]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res9[0x88];$/;"	m	struct:pex83xx	typeref:typename:u8[0x88]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res9[0xB8];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0xB8]
res9	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res9[0xFC];$/;"	m	struct:ddr83xx	typeref:typename:u8[0xFC]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u32	res9[41];	\/* pad out to 4k *\/$/;"	m	struct:cpc_corenet	typeref:typename:u32[41]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[120];$/;"	m	struct:ccsr_tsec	typeref:typename:u8[120]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[12];$/;"	m	struct:ccsr_gur	typeref:typename:u8[12]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[180];$/;"	m	struct:ccsr_l2cache	typeref:typename:u8[180]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[3916];$/;"	m	struct:ccsr_pic	typeref:typename:u8[3916]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[4];$/;"	m	struct:ccsr_local_ecm	typeref:typename:u8[4]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[4];$/;"	m	struct:ccsr_pcix	typeref:typename:u8[4]
res9	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res9[8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[8]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char	res9[1184];$/;"	m	struct:ccsr_rio	typeref:typename:char[1184]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char	res9[12];$/;"	m	struct:ccsr_ht	typeref:typename:char[12]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char	res9[12];$/;"	m	struct:ccsr_pex	typeref:typename:char[12]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char	res9[3916];$/;"	m	struct:ccsr_pic	typeref:typename:char[3916]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char	res9[4];$/;"	m	struct:ccsr_local_mcm	typeref:typename:char[4]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char	res9[8];$/;"	m	struct:ccsr_gur	typeref:typename:char[8]
res9	arch/powerpc/include/asm/immap_86xx.h	/^	char    res9[4];$/;"	m	struct:ccsr_tsec	typeref:typename:char[4]
res9	board/freescale/common/qixis.h	/^	u8 res9[5];$/;"	m	struct:qixis	typeref:typename:u8[5]
res9	drivers/crypto/ace_sha.h	/^	unsigned char   res9[0x8];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned char[0x8]
res9	drivers/net/fec_mxc.h	/^	uint32_t res9[7];		\/* MBAR_ETH + 0x128-140 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t[7]
res9	drivers/video/fsl_diu_fb.c	/^	__le32 res9:8;$/;"	m	struct:diu_ad	typeref:typename:__le32:8	file:
res9	include/fsl_dtsec.h	/^	u32	res9[80];$/;"	m	struct:dtsec	typeref:typename:u32[80]
res9	include/fsl_ifc.h	/^	u32 res9;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
res9	include/fsl_ifc.h	/^	u32 res9[0x2];$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32[0x2]
res9	include/fsl_sec.h	/^	u8	res9[0x6020];$/;"	m	struct:ccsr_sec	typeref:typename:u8[0x6020]
res9	include/linux/immap_qe.h	/^	u8 res9[0x100 - 0x091];$/;"	m	struct:ucc_fast	typeref:typename:u8[]
res9	include/linux/immap_qe.h	/^	u8 res9[0x2];$/;"	m	struct:cp_qe	typeref:typename:u8[0x2]
res9	include/linux/immap_qe.h	/^	u8 res9[0xBB];$/;"	m	struct:si1	typeref:typename:u8[0xBB]
res9	include/linux/mtd/omap_gpmc.h	/^	u8 res9[16 * 4];	\/* 0x2C0 - 0x2FF *\/$/;"	m	struct:gpmc	typeref:typename:u8[]
res9	include/linux/mtd/samsung_onenand.h	/^	unsigned char	res9[0xc];$/;"	m	struct:samsung_onenand	typeref:typename:unsigned char[0xc]
res9	include/usb/ehci-ci.h	/^	u8	res9[0xc];$/;"	m	struct:usb_ehci	typeref:typename:u8[0xc]
res90	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res90[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res90	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res90[0xac];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xac]
res90	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res90[0x54];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x54]
res90	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res90[0x54];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x54]
res90	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res90[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res90	arch/powerpc/include/asm/immap_86xx.h	/^	char	res90[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res900	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res900[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res900	include/tsec.h	/^	u32	res900[128];$/;"	m	struct:tsec	typeref:typename:u32[128]
res901	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res901[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res903	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res903[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res91	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res91[0x4];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x4]
res91	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res91[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res91	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res91[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res91	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res91[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res91	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res91[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res91	arch/powerpc/include/asm/immap_86xx.h	/^	char	res91[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res910	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res910[0x10];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x10]
res92	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res92[0x5c];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x5c]
res92	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res92[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res92	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res92[0x54];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x54]
res92	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res92[0x74];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x74]
res92	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res92[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res92	arch/powerpc/include/asm/immap_86xx.h	/^	char	res92[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res920	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res920[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res922	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res922[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res93	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res93[0x8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x8]
res93	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res93[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res93	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res93[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res93	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res93[0x34];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x34]
res93	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res93[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res93	arch/powerpc/include/asm/immap_86xx.h	/^	char	res93[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res94	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res94[0xc];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xc]
res94	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res94[0xc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0xc]
res94	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res94[0x14];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x14]
res94	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res94[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res94	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res94[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res94	arch/powerpc/include/asm/immap_86xx.h	/^	char	res94[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res95	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res95[0x1c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1c]
res95	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res95[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res95	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res95[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res95	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res95[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res95	arch/powerpc/include/asm/immap_86xx.h	/^	char	res95[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res950	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res950[0x18];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x18]
res96	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res96[0x1c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1c]
res96	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res96[0x4];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x4]
res96	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res96[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res96	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res96[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res96	arch/powerpc/include/asm/immap_86xx.h	/^	char	res96[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res97	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res97[0x5c];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x5c]
res97	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res97[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res97	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res97[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res97	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res97[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res97	arch/powerpc/include/asm/immap_86xx.h	/^	char	res97[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res98	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res98[0x37f8];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x37f8]
res98	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res98[0x8];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0x8]
res98	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res98[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res98	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res98[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res98	arch/powerpc/include/asm/immap_86xx.h	/^	char	res98[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res99	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res99[0x1fc];$/;"	m	struct:exynos5_clock	typeref:typename:unsigned char[0x1fc]
res99	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned char	res99[0xac];$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned char[0xac]
res99	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res99[0x14];$/;"	m	struct:exynos5_power	typeref:typename:unsigned char[0x14]
res99	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned char	res99[0x174];$/;"	m	struct:exynos5420_power	typeref:typename:unsigned char[0x174]
res99	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res99[12];$/;"	m	struct:ccsr_pic	typeref:typename:u8[12]
res99	arch/powerpc/include/asm/immap_86xx.h	/^	char	res99[12];$/;"	m	struct:ccsr_pic	typeref:typename:char[12]
res9a	arch/powerpc/include/asm/immap_83xx.h	/^	u32 res9a;$/;"	m	struct:sysconf83xx	typeref:typename:u32
res9b	arch/powerpc/include/asm/immap_83xx.h	/^	u8 res9b[0xAC];$/;"	m	struct:sysconf83xx	typeref:typename:u8[0xAC]
res_0	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_0[0x520];$/;"	m	struct:dcsr_dcfg_regs	typeref:typename:u8[0x520]
res_0	board/freescale/common/sys_eeprom.c	/^	u8 res_0;         \/* 0x1b        Reserved *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
res_0	board/freescale/common/sys_eeprom.c	/^	u8 res_0[40];     \/* 0x18 - 0x3f Reserved *\/$/;"	m	struct:eeprom	typeref:typename:u8[40]	file:
res_0	board/varisys/common/sys_eeprom.c	/^	u8 res_0;         \/* 0x1b        Reserved *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
res_0	include/fsl_memac.h	/^	u32	res_0[2];$/;"	m	struct:memac	typeref:typename:u32[2]
res_00	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u8	res_00[0x10];$/;"	m	struct:ccsr_clk_cluster_group::__anon245f08ff0208	typeref:typename:u8[0x10]
res_00	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_00[0x40];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0x40]
res_00	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_00[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_000	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_000[0x100-0x000];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_004	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8  res_004[0x0c];$/;"	m	struct:ccsr_clk::__anon245f04be0208	typeref:typename:u8[0x0c]
res_004	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8  res_004[0x1c];$/;"	m	struct:ccsr_clk::__anon58ea331d0208	typeref:typename:u8[0x1c]
res_004	arch/powerpc/include/asm/immap_85xx.h	/^		u8  res_004[0x0c];$/;"	m	struct:ccsr_clk::__anondcd7518a0408	typeref:typename:u8[0x0c]
res_008	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_008[0x20-0x8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_008	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_008[0x20-0x8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_008	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_008[0x10-0x08];		\/* 0x008 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_008	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_008[0x20-0x8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_008	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_008[0x20-0x8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_014	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8  res_014[0x0c];$/;"	m	struct:ccsr_clk::__anon245f04be0208	typeref:typename:u8[0x0c]
res_014	arch/powerpc/include/asm/immap_85xx.h	/^		u8  res_014[0x0c];$/;"	m	struct:ccsr_clk::__anondcd7518a0408	typeref:typename:u8[0x0c]
res_028	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_028[0x30-0x28];		\/* 0x028 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_02c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_02c[0x70-0x2c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_02c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_02c[0x70-0x2c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_02c	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_02c[0x70-0x2c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_034	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_034[0x70-0x34];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_038	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_038[0x60-0x38];		\/* 0x038 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_04	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u8  res_04[0x20-0x04];$/;"	m	struct:ccsr_clk_ctrl::__anon245f08ff0408	typeref:typename:u8[]
res_04	include/fsl_immap.h	/^	u8	res_04[4];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[4]
res_040	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_040[0x780]; \/* 0x100 *\/$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x780]
res_040	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_040[0x7c0]; \/* 0x100 *\/$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x7c0]
res_064	drivers/video/fsl_dcu_fb.c	/^	u8 res_064[0x6c-0x64];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_068	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_068[0x80-0x68];		\/* 0x068 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_070	drivers/video/fsl_dcu_fb.c	/^	u8 res_070[0x7c-0x70];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_084	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_084[0x94-0x84];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_084	drivers/video/fsl_dcu_fb.c	/^	u8 res_084[0x90-0x84];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_088	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_088[0x90-0x88];		\/* 0x088 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_08c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_08c[0x94-0x8c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_08c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_08c[0x90-0x8c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_094	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_094[0x100-0x94];		\/* 0x094 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_098	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_098[0xa0-0x98];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_09c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_09c[0xa0-0x9c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_09c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_09c[0xa4-0x9c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_09c	drivers/video/fsl_dcu_fb.c	/^	u8 res_09c[0xa0-0x9c];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_0a8	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_0a8[0xb0-0xa8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0ac	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_0ac[0xb0-0xac];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0ac	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_0ac[0x100-0xac];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0b8	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_0b8[0xc0-0xb8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0b8	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_0b8[0xc0-0xb8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	res_0c;	\/* 0x00c *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
res_0c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	res_0c;	\/* 0x00c *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u32
res_0c	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_0c[500];\/* 0x00c - 0x1ff *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[500]
res_0c	include/fsl_immap.h	/^	u8	res_0c[4];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[4]
res_0c4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_0c4[0xc8-0xc4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0c4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_0c4[0xc8-0xc4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0c4	drivers/video/fsl_dcu_fb.c	/^	u8 res_0c4[0xcc-0xc8];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_0cc	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_0cc[0xd4-0xcc];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0cc	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_0cc[0xd4-0xcc];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0d4	drivers/video/fsl_dcu_fb.c	/^	u8 res_0d4[0x100-0xd4];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_0d8	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_0d8[0xdc-0xd8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0d8	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_0d8[0xdc-0xd8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0e0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_0e0[0xe4-0xe0];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0e0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_0e0[0xe4-0xe0];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0e8	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_0e8[0x100-0xe8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_0e8	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_0e8[0x100-0xe8];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_1	board/freescale/common/sys_eeprom.c	/^	u8 res_1[21];     \/* 0x2b - 0x3f Reserved *\/$/;"	m	struct:eeprom	typeref:typename:u8[21]	file:
res_1	board/varisys/common/sys_eeprom.c	/^	u8 res_1[21];     \/* 0x2b - 0x3f Reserved *\/$/;"	m	struct:eeprom	typeref:typename:u8[21]	file:
res_10	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_10[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_10	include/ddr_spd.h	/^	uint8_t res_10;			\/* 10 Reserved *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
res_100	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_100[0x680]; \/* 0x100 *\/$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x680]
res_100	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_100[32];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[32]
res_1004	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1004[0x1040-0x1004];$/;"	m	struct:ccsr_serdes::__anon245f04be0708	typeref:typename:u8[]
res_1008	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8 res_1008[0x1100 - 0x1008];$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u8[]
res_1008	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_1008[0x2000-0x1008];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_1008	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8 res_1008[0x1100 - 0x1008];$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u8[]
res_104	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_104[0x120-0x104];$/;"	m	struct:ccsr_serdes::__anon245f04be0508	typeref:typename:u8[]
res_104	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_104[0xfd0 - 0x104];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_104	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8	res_104[0x120-0x104];$/;"	m	struct:ccsr_serdes::__anon58ea331d0508	typeref:typename:u8[]
res_104	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 res_104[0xfd0 - 0x104];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_104	arch/powerpc/include/asm/immap_85xx.h	/^		u8	res_104[0x120-0x104];$/;"	m	struct:serdes_corenet::__anondcd7518a0708	typeref:typename:u8[]
res_108	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_108[0x114-0x108];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_108	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_108[0x110-0x108];	\/* 0x108 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_10c0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_10c0[0x1800-0x10c0];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_1108	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8 res_1108[0x110c - 0x1108];$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u8[]
res_1108	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8 res_1108[0x110c - 0x1108];$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u8[]
res_1114	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8 res_1114[0x1130 - 0x1114];$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u8[]
res_1114	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8 res_1114[0x1130 - 0x1114];$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u8[]
res_113c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8 res_113c[0x2000 - 0x113c];$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u8[]
res_113c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8 res_113c[0x2000 - 0x113c];$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u8[]
res_118	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_118[0xa00-0x118];	\/* 0x118 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_120	drivers/video/fsl_dcu_fb.c	/^	u8 res_120[0x200-0x120];$/;"	m	struct:dcu_reg	typeref:typename:u8[]	file:
res_124	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_124[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_12c	include/fsl_immap.h	/^	u8	res_12c[4];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[4]
res_13	include/ddr_spd.h	/^	unsigned char res_13;          \/* 13 Reserved *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
res_132	include/ddr_spd.h	/^			uint8_t res_132[254-132];$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508	typeref:typename:uint8_t[]
res_134	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_134[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_134	include/fsl_immap.h	/^	u8	res_134[20];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[20]
res_137	include/ddr_spd.h	/^			uint8_t res_137[254-137];$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t[]
res_14	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_14[0x100 - 0x14];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_14	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u8	res_14[0x20-0x14];$/;"	m	struct:ccsr_clk_cluster_group::__anon245f08ff0208	typeref:typename:u8[]
res_14	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 res_14[0x100 - 0x14];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_14	include/fsl_immap.h	/^	u8	res_14[4];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[4]
res_14	include/fsl_usb.h	/^	u8	res_14[0xc];$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u8[0xc]
res_140	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_140[0x200-0x140];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_140	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_140[0x158-0x140];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_140	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_140[0x200-0x140];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_15	include/ddr_spd.h	/^	unsigned char res_15;      \/* 15 Reserved *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
res_150	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_150[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_150	include/fsl_immap.h	/^	u8	res_150[16];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[16]
res_155	include/ddr_spd.h	/^			uint8_t res_155[254-155];	\/* Reserved *\/$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t[]
res_16	include/ddr_spd.h	/^	uint8_t res_16;$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
res_160	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_160[0x180-0x160];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_160	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_160[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_170	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_170[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_18	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8	res_18[0x20-0x18];$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u8[]
res_18	arch/powerpc/include/asm/immap_85xx.h	/^		u8	res_18[0x20-0x18];$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u8[]
res_18	include/fsl_memac.h	/^	u32	res_18[5];$/;"	m	struct:memac	typeref:typename:u32[5]
res_180	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_180[0x200-0x180];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_180	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_180[0x200-0x180];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_180	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_180[0x300-0x180];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_180	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_180[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_1800	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1800[0x1804-0x1800];$/;"	m	struct:ccsr_serdes::__anon245f04be0808	typeref:typename:u8[]
res_1808	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1808[0x180c-0x1808];$/;"	m	struct:ccsr_serdes::__anon245f04be0808	typeref:typename:u8[]
res_184	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_184[0x18c-0x184];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_1840	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_1840[0x1880-0x1840];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_1880	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1880[0x1884-0x1880];$/;"	m	struct:ccsr_serdes::__anon245f04be0908	typeref:typename:u8[]
res_1888	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1888[0x188c-0x1888];$/;"	m	struct:ccsr_serdes::__anon245f04be0908	typeref:typename:u8[]
res_18a0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_18a0[0x1980-0x18a0];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_190	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_190[0x1a4-0x190];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_190	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_190[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_198	include/fsl_immap.h	/^	u8	res_198[0x1a0-0x198];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_1980	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1980[0x1984-0x1980];$/;"	m	struct:ccsr_serdes::__anon245f04be0a08	typeref:typename:u8[]
res_1988	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1988[0x198c-0x1988];$/;"	m	struct:ccsr_serdes::__anon245f04be0a08	typeref:typename:u8[]
res_19a0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_19a0[0x2000-0x19a0];	\/* from 0x19a0 to 0x1fff *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_1a8	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_1a8[0x1ac-0x1a8];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_1ac	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_1ac[4];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[4]
res_1b0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_1b0[0x204-0x1b0];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_1b0	include/fsl_immap.h	/^	u8	res_1b0[0x200-0x1b0];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_1c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_1c[0x20-0x1c];$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u8[]
res_1c	include/fsl_immap.h	/^	u8	res_1c[100];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[100]
res_1d0	include/fsl_memac.h	/^	u32	res_1d0[0xc];$/;"	m	struct:memac	typeref:typename:u32[0xc]
res_1e8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_1e8[8];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[8]
res_2	board/freescale/common/sys_eeprom.c	/^	u8 res_2[90];     \/* 0xa2 - 0xfb Reserved *\/	$/;"	m	struct:eeprom	typeref:typename:u8[90]	file:
res_20	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_20[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_200	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_200[0x800-0x200];$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_2008	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_2008[0x3000-0x2008];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_204	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_204[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res_208	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_208[0x220-0x208];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_210	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_210[0x300-0x210];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_210	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_210[0x300-0x210];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_210	include/fsl_memac.h	/^	u32	res_210[0x2];$/;"	m	struct:memac	typeref:typename:u32[0x2]
res_214	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_214[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res_218	include/fsl_immap.h	/^	u8	res_218[0x220-0x218];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_224	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_224[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res_230	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_230[0x800-0x230];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_234	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_234[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res_240	include/fsl_immap.h	/^	u8	res_240[0x250-0x240];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_244	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_244[0x400-0x244];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_254	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_254[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res_256	include/ddr_spd.h	/^	uint8_t res_256[320-256];	\/* 256~319 Reserved *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[]
res_258	include/fsl_immap.h	/^	u8	res_258[0x260-0x258];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_258	include/fsl_memac.h	/^	u32	res_258[0x2];$/;"	m	struct:memac	typeref:typename:u32[0x2]
res_264	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_264[4];$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[4]
res_264	include/fsl_immap.h	/^	u8	res_264[0x400-0x264];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_280	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_280[0x300-0x280];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_280	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_280[0xb80]; \/* 0x280 - 0xdff *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[0xb80]
res_2a8	include/fsl_memac.h	/^	u32	res_2a8[0x6];$/;"	m	struct:memac	typeref:typename:u32[0x6]
res_2c	drivers/i2c/davinci_i2c.h	/^	u32	res_2c;$/;"	m	struct:i2c_regs	typeref:typename:u32
res_2c8	include/fsl_memac.h	/^	u32	res_2c8[0xe];$/;"	m	struct:memac	typeref:typename:u32[0xe]
res_30	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_30[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_30	include/fsl_memac.h	/^	u32	res_30[4];$/;"	m	struct:memac	typeref:typename:u32[4]
res_30	include/fsl_usb.h	/^	u8	res_30[0x10];$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u8[0x10]
res_300	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_300[3568];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[3568]
res_308	include/fsl_memac.h	/^	u32 res_308[0xe];$/;"	m	struct:memac	typeref:typename:u32[0xe]
res_310	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_310[0x400-0x310];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_310	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_310[0x400-0x310];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_310	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_310[0x400-0x310];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_330	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_330[0x400-0x330];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_344	include/fsl_memac.h	/^	u32 res_344[0x3];$/;"	m	struct:memac	typeref:typename:u32[0x3]
res_354	include/fsl_memac.h	/^	u32 res_354[0x3];$/;"	m	struct:memac	typeref:typename:u32[0x3]
res_364	include/fsl_memac.h	/^	u32 res_364[0x3];$/;"	m	struct:memac	typeref:typename:u32[0x3]
res_36_40	include/ddr_spd.h	/^	unsigned char res_36_40[5];\/* 36-40 reserved for VCSDRAM *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[5]
res_380	include/fsl_memac.h	/^	u32 res_380[0x320];$/;"	m	struct:memac	typeref:typename:u32[0x320]
res_382	include/ddr_spd.h	/^	uint8_t res_382[2];		\/* 382~383 Reserved *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[2]
res_39_59	include/ddr_spd.h	/^	unsigned char res_39_59[21];   \/* 39-59 Reserved, General Section *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[21]
res_40	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_40[0x90-0x40];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_40	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_40[0x90-0x40];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_40	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_40[0x90-0x40];$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_40	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_40[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_404	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_404[0x440-0x404];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_404	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_404[0x550-0x404];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_408	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_408[0x500-0x408];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_41	include/ddr_spd.h	/^	uint8_t res_41[60-41];		\/* 41 Rserved *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[]
res_410	include/fsl_immap.h	/^	u8	res_410[0xb20-0x410];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[]
res_424	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_424[0x600-0x424];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_430	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_430[0x500-0x430];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_444	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_444[0x800-0x444];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_46	include/ddr_spd.h	/^	unsigned char res_46;      \/* 46 Reserved *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
res_48	include/fsl_memac.h	/^	u32	res_48;$/;"	m	struct:memac	typeref:typename:u32
res_48_61	include/ddr_spd.h	/^	unsigned char res_48_61[14]; \/* 48-61 Reserved *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[14]
res_50	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_50[0x50];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0x50]
res_50	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_50[96];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[96]
res_50	include/fsl_memac.h	/^	u32	res_50;$/;"	m	struct:memac	typeref:typename:u32
res_50	include/fsl_usb.h	/^	u8	res_50[0xc];$/;"	m	struct:ccsr_usb_phy	typeref:typename:u8[0xc]
res_500	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_500[0x740-0x500];	\/* add more registers when needed *\/$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_524	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_524[0x1000 - 0x524]; \/* 0x524 - 0x1000 *\/$/;"	m	struct:dcsr_dcfg_regs	typeref:typename:u8[]
res_544	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_544[0x550-0x544];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_554	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_554[0x604-0x554];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_560	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_560[0x570-0x560];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_57c	arch/powerpc/include/asm/immap_85xx.h	/^	u8      res_57c[4];$/;"	m	struct:ccsr_gur	typeref:typename:u8[4]
res_5a0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_5a0[0x600-0x5a0];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_60	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_60[0x80-0x60];$/;"	m	struct:ccsr_clk_cluster_group	typeref:typename:u8[]
res_6000	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_6000[0x9004 - 0x6000];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_6000	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 res_6000[0x9004 - 0x6000];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_60c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_60c[0x610-0x60c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_60c	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8      res_60c[0x740-0x60c];   \/* add more registers when needed *\/$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_610	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_610[0x680-0x610];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_63c	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_63c[0x658-0x63c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_64_116	include/ddr_spd.h	/^			unsigned char res_64_116[53];$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0208	typeref:typename:unsigned char[53]
res_660	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_660[0x678-0x660];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_680	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_680[0x700-0x680];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_684	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_684[0x1000-0x684];$/;"	m	struct:ccsr_scfg	typeref:typename:u8[]
res_7	include/ddr_spd.h	/^	unsigned char res_7;       \/*  7 Reserved *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
res_70	include/fsl_usb.h	/^	u8	res_70[0x4];$/;"	m	struct:ccsr_usb_phy	typeref:typename:u8[0x4]
res_708	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_708[0x740-0x708];   \/* add more registers when needed *\/$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_78	include/ddr_spd.h	/^	uint8_t res_78[117-78];		\/* 78~116, Reserved *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[]
res_78	include/fsl_memac.h	/^	u32	res_78[2];$/;"	m	struct:memac	typeref:typename:u32[2]
res_7c	include/fsl_usb.h	/^	u8	res_7c[0x4];$/;"	m	struct:ccsr_usb_phy	typeref:typename:u8[0x4]
res_804	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8 res_804[0x1c];$/;"	m	struct:ccsr_clk::__anon245f04be0308	typeref:typename:u8[0x1c]
res_804	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8 res_804[0x1c];$/;"	m	struct:ccsr_clk::__anon58ea331d0308	typeref:typename:u8[0x1c]
res_80c	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res_80c;$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
res_814	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res_814;$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
res_81c	arch/powerpc/include/asm/immap_85xx.h	/^		u32	res_81c;$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
res_824	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8	res_824[0x83c-0x824];$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u8[]
res_824	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8	res_824[0x83c-0x824];$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u8[]
res_824	arch/powerpc/include/asm/immap_85xx.h	/^		u8	res_824[0x840-0x824];$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u8[]
res_84	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u8	res_84[0xa0-0x84];$/;"	m	struct:ccsr_clk_cluster_group::__anon245f08ff0308	typeref:typename:u8[]
res_840	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_840[0x1c0];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1c0]
res_840	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_840[0x1c0];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1c0]
res_848	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_848[0xe60-0x848];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_858	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_858[0x1000-0x858];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_8c0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_8c0[0xa00-0x8c0];   \/* add more registers when needed *\/$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_90	include/fsl_immap.h	/^	u8	res_90[48];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[48]
res_900	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_900[0x1000-0x900];	\/* from 0x900 to 0xfff *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_9010	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_9010[0xa000 - 0x9010];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_9010	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 res_9010[0xa000 - 0x9010];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_94	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_94[0xa0-0x94];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_94	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_94[0xa0-0x94];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_94	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_94[0xa0-0x94];$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_a00	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_a00[0x1000-0xa00];	\/* from 0xa00 to 0xfff *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_a00	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_a00[0x1000-0xa00];	\/* from 0xa00 to 0xfff *\/$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_a010	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u8 res_a010[0xb000 - 0xa010];$/;"	m	struct:ccsr_cci400::__anon245f04be0c08	typeref:typename:u8[]
res_a010	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u8 res_a010[0xb000 - 0xa010];$/;"	m	struct:ccsr_cci400::__anon58ea331d0808	typeref:typename:u8[]
res_a04	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_a04[0x1fc];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1fc]
res_a04	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8      res_a04[0xa20-0xa04];   \/* add more registers when needed *\/$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_a04	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_a04[0x1fc];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1fc]
res_a08	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8 res_a08[0xbf8-0xa08];	\/* 0xa08 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u8[]
res_a4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_a4[0xb0-0xa4];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_a4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_a4[0xb0-0xa4];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_a4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_a4[0xb0-0xa4];$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_a8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_a8[0x8];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0x8]
res_b30	include/fsl_immap.h	/^	u8	res_b30[200];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[200]
res_b4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_b4[0x100-0xb4];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_b4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_b4[0xe0-0xb4];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_b4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_b4[0xc];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0xc]
res_b4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_b4[0xe0-0xb4];$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_c0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_c0[16];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[16]
res_c0	board/freescale/common/qixis.h	/^	u8 res_c0[6];$/;"	m	struct:qixis	typeref:typename:u8[6]
res_c0	include/fsl_memac.h	/^	u32	res_c0[8];$/;"	m	struct:memac	typeref:typename:u32[8]
res_c04	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_c04[0x1c];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1c]
res_c04	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_c04[0x1c];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x1c]
res_c04	include/fsl_immap.h	/^	u8	res_c04[252];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[252]
res_c24	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8	res_c24[0x3dc];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x3dc]
res_c24	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_c24[0x3dc];$/;"	m	struct:ccsr_clk	typeref:typename:u8[0x3dc]
res_c6	board/freescale/common/qixis.h	/^	u8 res_c6[8];$/;"	m	struct:qixis	typeref:typename:u8[8]
res_cfg	include/vsc9953.h	/^	u32	res_cfg;$/;"	m	struct:vsc9953_qsys_res_ctrl	typeref:typename:u32
res_ctrl	include/vsc9953.h	/^	struct vsc9953_qsys_res_ctrl	res_ctrl[1024];$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_res_ctrl[1024]
res_d0	board/freescale/common/qixis.h	/^	u8 res_d0[8];$/;"	m	struct:qixis	typeref:typename:u8[8]
res_d0	include/fsl_immap.h	/^	u8	res_d0[48];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[48]
res_d04	include/fsl_immap.h	/^	u8	res_d04[28];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[28]
res_d48	include/fsl_immap.h	/^	u8	res_d48[184];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[184]
res_d8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_d8[0x8];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0x8]
res_dc	include/fsl_usb.h	/^	u8	res_dc[0x334];$/;"	m	struct:ccsr_usb_phy	typeref:typename:u8[0x334]
res_e0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u8	res_e0[0x100-0xe0];$/;"	m	struct:ccsr_clk_cluster_group	typeref:typename:u8[]
res_e0	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_e0[12];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[12]
res_e004	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u8 res_e004[0x10000 - 0xe004];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_e004	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 res_e004[0x10000 - 0xe004];$/;"	m	struct:ccsr_cci400	typeref:typename:u8[]
res_e0c	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_e0c[20];	\/* 0xe0c - 0x01f *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[20]
res_e0c	include/fsl_immap.h	/^	u8	res_e0c[20];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[20]
res_e2c	arch/powerpc/include/asm/immap_85xx.h	/^	u8  res_e2c[20];	\/* 0xe2c - 0xe3f *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u8[20]
res_e2c	include/fsl_immap.h	/^	u8	res_e2c[20];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[20]
res_e4	include/fsl_memac.h	/^	u32	res_e4[7];$/;"	m	struct:memac	typeref:typename:u32[7]
res_e5c	include/fsl_immap.h	/^	u8	res_e5c[164];$/;"	m	struct:ccsr_ddr	typeref:typename:u8[164]
res_e60	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_e60[0xe68-0xe64];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_e68	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_e68[0xe80-0xe6c];$/;"	m	struct:ccsr_gur	typeref:typename:u8[]
res_e8	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_e8[0x8];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0x8]
res_f4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8	res_f4[0x100-0xf4];$/;"	m	struct:ccsr_serdes	typeref:typename:u8[]
res_f4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_f4[0x100-0xf4];$/;"	m	struct:serdes_corenet	typeref:typename:u8[]
res_f4	arch/powerpc/include/asm/immap_85xx.h	/^	u8	res_f4[0xf0c];$/;"	m	struct:ccsr_pman	typeref:typename:u8[0xf0c]
res_fclken2_core	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 res_fclken2_core;$/;"	m	struct:prcm	typeref:typename:u32
res_fifo	drivers/mmc/mxcmmc.c	/^	u32 res_fifo;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
res_mode_init	drivers/video/videomodes.c	/^const struct ctfb_res_modes res_mode_init[RES_MODES_COUNT] = {$/;"	v	typeref:typename:const struct ctfb_res_modes[]
res_qos_mode	include/vsc9953.h	/^	u32	res_qos_mode;$/;"	m	struct:vsc9953_qsys_qos_cfg	typeref:typename:u32
res_stat	include/vsc9953.h	/^	u32	res_stat;$/;"	m	struct:vsc9953_qsys_res_ctrl	typeref:typename:u32
res_to	drivers/mmc/mxcmmc.c	/^	u32 res_to;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
resa	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 resa[3];		\/* 0xF5 - 0xF7 *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
resa	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 resa[3];		\/* 0xF9 - 0xFB *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
resb	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 resb[3];		\/* 0xF9 - 0xFB *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
resb	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 resb[3];		\/* 0xFD - 0xFF *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8[3]
resb00	include/tsec.h	/^	u32	resb00[62];$/;"	m	struct:tsec	typeref:typename:u32[62]
resc	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 resc[3];		\/* 0xFD - 0xFF *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8[3]
resc00	include/tsec.h	/^	u32	resc00[256];$/;"	m	struct:tsec	typeref:typename:u32[256]
rescue_mode	board/buffalo/lsxl/lsxl.c	/^static void rescue_mode(void)$/;"	f	typeref:typename:void	file:
reserv3	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^reserv3:                .long 0x0$/;"	l
reserv3	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^reserv3:                .long 0x0$/;"	l
reserv4	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^reserv4:                .long 0x0$/;"	l
reserv4	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^reserv4:                .long 0x0$/;"	l
reserve	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve[11];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[11]
reserve	arch/blackfin/cpu/gpio.c	/^#define reserve(/;"	d	file:
reserve	board/astro/mcf5373l/astro.h	/^	unsigned char reserve;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
reserve	drivers/gpio/adi_gpio2.c	/^#define reserve(/;"	d	file:
reserve	drivers/net/pch_gbe.h	/^	u32 reserve[2];$/;"	m	struct:pch_gbe_regs	typeref:typename:u32[2]
reserve	include/fsl_validate.h	/^		u8 reserve;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c0108	typeref:typename:u8
reserve	include/image-sparse.h	/^	lbaint_t	(*reserve)(struct sparse_storage *info,$/;"	m	struct:sparse_storage	typeref:typename:lbaint_t (*)(struct sparse_storage * info,lbaint_t blk,lbaint_t blkcnt)
reserve	include/vsc9953.h	/^	u32	reserve[4];$/;"	m	struct:vsc9953_rew_common	typeref:typename:u32[4]
reserve1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve1[5];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[5]
reserve1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		reserve1[16 - AT91_MATRIX_MASTERS];$/;"	m	struct:at91_matrix	typeref:typename:u32[]
reserve1	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		reserve1[4];$/;"	m	struct:at91_spi	typeref:typename:u32[4]
reserve1	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int reserve1;$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int
reserve1	drivers/usb/host/ehci-mx6.c	/^	u32 reserve1[10];$/;"	m	struct:usbnc_regs	typeref:typename:u32[10]	file:
reserve1	include/linux/usb/xhci-omap.h	/^	u32 reserve1;$/;"	m	struct:omap_usb3_phy	typeref:typename:u32
reserve10	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve10[38];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[38]
reserve11	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve11[40];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[40]
reserve12	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve12[18];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[18]
reserve13	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve13[4];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[4]
reserve14	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve14;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
reserve15	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve15[28];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[28]
reserve16	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve16[6];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[6]
reserve2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve2;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
reserve2	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		reserve2[16 - AT91_MATRIX_SLAVES];$/;"	m	struct:at91_matrix	typeref:typename:u32[]
reserve2	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		reserve2[48];$/;"	m	struct:at91_spi	typeref:typename:u32[48]
reserve2	arch/arm/mach-exynos/include/mach/xhci-exynos.h	/^	unsigned int reserve2[3];$/;"	m	struct:exynos_usb3_phy	typeref:typename:unsigned int[3]
reserve2	drivers/usb/host/ehci-mx6.c	/^	u32 reserve2;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
reserve3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve3;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
reserve3	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		reserve3[32 - (2 * AT91_MATRIX_SLAVES)];$/;"	m	struct:at91_matrix	typeref:typename:u32[]
reserve3	drivers/net/pch_gbe.h	/^	u32 reserve3[3];$/;"	m	struct:pch_gbe_regs	typeref:typename:u32[3]
reserve3	drivers/usb/host/ehci-mx6.c	/^	u32 reserve3[4];$/;"	m	struct:usbnc_regs	typeref:typename:u32[4]	file:
reserve4	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve4;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
reserve4	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		reserve4[3];$/;"	m	struct:at91_matrix	typeref:typename:u32[3]
reserve4	drivers/net/pch_gbe.h	/^	u32 reserve4[3];$/;"	m	struct:pch_gbe_regs	typeref:typename:u32[3]
reserve5	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve5[3];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[3]
reserve5	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		reserve5[60];$/;"	m	struct:at91_matrix	typeref:typename:u32[60]
reserve5	drivers/net/pch_gbe.h	/^	u32 reserve5[3];$/;"	m	struct:pch_gbe_regs	typeref:typename:u32[3]
reserve6	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve6[17];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[17]
reserve6	drivers/net/pch_gbe.h	/^	u32 reserve6[3];$/;"	m	struct:pch_gbe_regs	typeref:typename:u32[3]
reserve7	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve7;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
reserve7	drivers/net/pch_gbe.h	/^	u32 reserve7[2];$/;"	m	struct:pch_gbe_regs	typeref:typename:u32[2]
reserve8	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve8[11];$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32[11]
reserve9	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserve9;$/;"	m	struct:rk3036_ddr_phy	typeref:typename:u32
reserve_1	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_1;				\/* 0x0C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_1	include/linux/usb/xhci-omap.h	/^	u32 reserve_1[3];$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32[3]
reserve_2	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_2;				\/* 0x18 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_2	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_2;				\/* 0x48 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
reserve_2	include/linux/usb/xhci-omap.h	/^	u32 reserve_2[3];$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32[3]
reserve_3	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_3;				\/* 0x8C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_3	include/linux/usb/xhci-omap.h	/^	u16 reserve_3;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u16
reserve_4	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_4;				\/* 0x98 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_4	include/linux/usb/xhci-omap.h	/^	u32 reserve_4[15];$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32[15]
reserve_5	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_5;				\/* 0x9C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_5	include/linux/usb/xhci-omap.h	/^	u32 reserve_5[30];$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32[30]
reserve_6	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_6;				\/* 0xAC *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_7	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_7;				\/* 0xBC *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_8	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 reserve_8;				\/* 0xC0 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
reserve_arch	arch/x86/cpu/cpu.c	/^int reserve_arch(void)$/;"	f	typeref:typename:int
reserve_arch	arch/x86/lib/efi/efi.c	/^int reserve_arch(void)$/;"	f	typeref:typename:int
reserve_arch	common/board_f.c	/^__weak int reserve_arch(void)$/;"	f	typeref:typename:__weak int
reserve_board	common/board_f.c	/^static int reserve_board(void)$/;"	f	typeref:typename:int	file:
reserve_fdt	common/board_f.c	/^static int reserve_fdt(void)$/;"	f	typeref:typename:int	file:
reserve_global_data	common/board_f.c	/^static int reserve_global_data(void)$/;"	f	typeref:typename:int	file:
reserve_lcd	common/board_f.c	/^static int reserve_lcd(void)$/;"	f	typeref:typename:int	file:
reserve_legacy_video	common/board_f.c	/^static int reserve_legacy_video(void)$/;"	f	typeref:typename:int	file:
reserve_logbuffer	common/board_f.c	/^static int reserve_logbuffer(void)$/;"	f	typeref:typename:int	file:
reserve_malloc	common/board_f.c	/^static int reserve_malloc(void)$/;"	f	typeref:typename:int	file:
reserve_mmu	common/board_f.c	/^static int reserve_mmu(void)$/;"	f	typeref:typename:int	file:
reserve_pram	common/board_f.c	/^static int reserve_pram(void)$/;"	f	typeref:typename:int	file:
reserve_prom	common/board_f.c	/^static int reserve_prom(void)$/;"	f	typeref:typename:int	file:
reserve_round_4k	common/board_f.c	/^static int reserve_round_4k(void)$/;"	f	typeref:typename:int	file:
reserve_stacks	common/board_f.c	/^static int reserve_stacks(void)$/;"	f	typeref:typename:int	file:
reserve_thermal	arch/arm/dts/rk3288-thermal.dtsi	/^reserve_thermal: reserve_thermal {$/;"	l
reserve_trace	common/board_f.c	/^static int reserve_trace(void)$/;"	f	typeref:typename:int	file:
reserve_uboot	common/board_f.c	/^static int reserve_uboot(void)$/;"	f	typeref:typename:int	file:
reserve_video	common/board_f.c	/^static int reserve_video(void)$/;"	f	typeref:typename:int	file:
reserved	arch/arm/include/asm/arch-am33xx/omap.h	/^	unsigned int reserved;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned int
reserved	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved;$/;"	m	struct:sdram_regs	typeref:typename:uint32_t
reserved	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved[15];$/;"	m	struct:dma_regs	typeref:typename:uint32_t[15]
reserved	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 reserved;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
reserved	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 reserved;$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
reserved	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 reserved[5];$/;"	m	struct:emc_regs::emc_ahb_t	typeref:typename:u32[5]
reserved	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 reserved[12];$/;"	m	struct:timer_regs	typeref:typename:u32[12]
reserved	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 reserved;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
reserved	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 reserved;$/;"	m	struct:mx31_weim_cscr	typeref:typename:u32
reserved	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32	reserved[4];$/;"	m	struct:esdc_regs	typeref:typename:u32[4]
reserved	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 reserved;$/;"	m	struct:ccm_regs	typeref:typename:u32
reserved	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u8 reserved[0x4000];$/;"	m	struct:iomuxc	typeref:typename:u8[0x4000]
reserved	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved[4];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[4]
reserved	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char reserved;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
reserved	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int reserved;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
reserved	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved[0x1a];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[0x1a]
reserved	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
reserved	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved[10];$/;"	m	struct:rk3288_ddr_publ_datx	typeref:typename:u32[10]
reserved	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved[0x2a];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[0x2a]
reserved	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved[3];$/;"	m	struct:rk3288_grf	typeref:typename:u32[3]
reserved	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved[0x1fe5];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x1fe5]
reserved	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved[0x800];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x800]
reserved	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u8 reserved[0x80];$/;"	m	struct:gpt_regs	typeref:typename:u8[0x80]
reserved	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 reserved;$/;"	m	struct:gpt_regs	typeref:typename:u32
reserved	arch/arm/include/asm/arch-stv0991/gpio.h	/^	u32 reserved[0xff];	\/* 0x4--0x3fc *\/$/;"	m	struct:gpio_regs	typeref:typename:u32[0xff]
reserved	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 reserved[3];	\/* offset 0x54 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32[3]
reserved	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t reserved;$/;"	m	struct:mrq_debugfs_response	typeref:typename:int32_t
reserved	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t reserved[328];$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t[328]
reserved	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t reserved;$/;"	m	struct:cmd_debugfs_dumpdir_response	typeref:typename:uint32_t
reserved	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t reserved;$/;"	m	struct:cmd_debugfs_fileop_response	typeref:typename:uint32_t
reserved	arch/arm/include/asm/arch-tegra/pwm.h	/^	uint reserved[3];	\/* Space space *\/$/;"	m	struct:pwm_ctlr	typeref:typename:uint[3]
reserved	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 reserved[3];$/;"	m	struct:wb_header	typeref:typename:u32[3]
reserved	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 reserved;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
reserved	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved[442];$/;"	m	struct:iou_slcr_regs	typeref:typename:u32[442]
reserved	arch/arm/include/asm/omap_common.h	/^	u32 reserved[2];$/;"	m	struct:dpll_regs	typeref:typename:u32[2]
reserved	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	reserved[2];$/;"	m	struct:at91_ebi	typeref:typename:u32[2]
reserved	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	reserved[3];$/;"	m	struct:at91_sdramc	typeref:typename:u32[3]
reserved	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 reserved;		\/* 0x18: Reserved *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
reserved	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	u32 reserved[384];$/;"	m	struct:at91_smc	typeref:typename:u32[384]
reserved	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int reserved[2];$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int[2]
reserved	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	reserved;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
reserved	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved:24;$/;"	m	struct:fbio_spare_reg::__anon24552f890308	typeref:typename:u32:24	file:
reserved	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved:8;$/;"	m	struct:scratch24_reg::__anon24552f890608	typeref:typename:u32:8	file:
reserved	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved[60];$/;"	m	struct:ddrc_regs	typeref:typename:u32[60]
reserved	arch/blackfin/include/asm/ptrace.h	/^	long reserved;		\/* Used as scratch during system calls *\/$/;"	m	struct:pt_regs	typeref:typename:long
reserved	arch/powerpc/include/asm/fsl_pamu.h	/^			uint16_t reserved;$/;"	m	struct:paace::__anon6139da31040a::__anon6139da310608	typeref:typename:uint16_t
reserved	arch/powerpc/include/asm/immap_512x.h	/^	u8	reserved[0x0cfc];		\/* fill to 4096 bytes size *\/$/;"	m	struct:ioctrl512x	typeref:typename:u8[0x0cfc]
reserved	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 reserved;$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	reserved;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	reserved[114];$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int[114]
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	reserved[4];$/;"	m	struct:mmu_regs	typeref:typename:unsigned int[4]
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	reserved[63];$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int[63]
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	reserved;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	reserved[129];$/;"	m	struct:usb_common_regs	typeref:typename:unsigned short[129]
reserved	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	reserved[4];$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short[4]
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	reserved;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	reserved[114];$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int[114]
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	reserved[4];$/;"	m	struct:mmu_regs	typeref:typename:unsigned int[4]
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	reserved[63];$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int[63]
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	reserved;$/;"	m	struct:gpio_regs	typeref:typename:unsigned short
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	reserved[129];$/;"	m	struct:usb_common_regs	typeref:typename:unsigned short[129]
reserved	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	reserved[4];$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short[4]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved[114];$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int[114]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved[2];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[2]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved[3];$/;"	m	struct:pcie_system_bus_regs	typeref:typename:unsigned int[3]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved[4];$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int[4]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved[4];$/;"	m	struct:mmu_regs	typeref:typename:unsigned int[4]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved[63];$/;"	m	struct:usb1_alignment_regs	typeref:typename:unsigned int[63]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	reserved[129];$/;"	m	struct:usb_common_regs	typeref:typename:unsigned short[129]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	reserved[4];$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short[4]
reserved	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	reserved[7];$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short[7]
reserved	arch/sparc/include/asm/prom.h	/^	unsigned char reserved[16];$/;"	m	struct:idprom	typeref:typename:unsigned char[16]
reserved	arch/x86/include/asm/acpi_table.h	/^	u8 reserved;$/;"	m	struct:acpi_madt_ioapic	typeref:typename:u8
reserved	arch/x86/include/asm/acpi_table.h	/^	u8 reserved[3];$/;"	m	struct:acpi_rsdp	typeref:typename:u8[3]
reserved	arch/x86/include/asm/acpi_table.h	/^	u8 reserved[4];$/;"	m	struct:acpi_mcfg_mmconfig	typeref:typename:u8[4]
reserved	arch/x86/include/asm/acpi_table.h	/^	u8 reserved[8];$/;"	m	struct:acpi_mcfg	typeref:typename:u8[8]
reserved	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 reserved:31;$/;"	m	struct:icc_clock_enables_msg	typeref:typename:u32:31
reserved	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 reserved;$/;"	m	struct:icc_header	typeref:typename:u32
reserved	arch/x86/include/asm/arch-broadwell/me.h	/^	u8	reserved;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
reserved	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 reserved:1;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:1
reserved	arch/x86/include/asm/arch-ivybridge/me.h	/^	u8 reserved;$/;"	m	struct:mbp_icc_profile	typeref:typename:u8
reserved	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u64	reserved;		\/* Offset 0x0008 *\/$/;"	m	struct:upd_region	typeref:typename:u64
reserved	arch/x86/include/asm/fsp/fsp_api.h	/^	u32	reserved[7];	\/* Reserved *\/$/;"	m	struct:common_buf	typeref:typename:u32[7]
reserved	arch/x86/include/asm/fsp/fsp_fv.h	/^	u8			reserved[1];$/;"	m	struct:fv_header	typeref:typename:u8[1]
reserved	arch/x86/include/asm/fsp/fsp_hob.h	/^	u32	reserved;	\/* always zero *\/$/;"	m	struct:hob_header	typeref:typename:u32
reserved	arch/x86/include/asm/fsp/fsp_hob.h	/^	u8			reserved[4];$/;"	m	struct:hob_mem_alloc	typeref:typename:u8[4]
reserved	arch/x86/include/asm/me_common.h	/^	u16 reserved:9;$/;"	m	struct:tdt_state_flag	typeref:typename:u16:9
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:26;$/;"	m	struct:me_heres	typeref:typename:u32:26
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:3;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:3
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:3;$/;"	m	struct:mei_csr	typeref:typename:u32:3
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:4;$/;"	m	struct:me_hfs	typeref:typename:u32:4
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:6;$/;"	m	struct:mei_header	typeref:typename:u32:6
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:7;$/;"	m	struct:me_did	typeref:typename:u32:7
reserved	arch/x86/include/asm/me_common.h	/^	u32 reserved:8;$/;"	m	struct:mkhi_header	typeref:typename:u32:8
reserved	arch/x86/include/asm/me_common.h	/^	u8 reserved[3];$/;"	m	struct:me_fwcaps	typeref:typename:u8[3]
reserved	arch/x86/include/asm/mpspec.h	/^	u8 reserved;$/;"	m	struct:mp_config_table	typeref:typename:u8
reserved	arch/x86/include/asm/mpspec.h	/^	u8 reserved[3];$/;"	m	struct:mp_ext_bus_hierarchy	typeref:typename:u8[3]
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reserved	arch/xtensa/include/asm/ptrace.h	/^	int reserved[1];		\/*  64 *\/$/;"	m	struct:pt_regs	typeref:typename:int[1]
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reserved	disk/part_amiga.h	/^    u32 reserved;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
reserved	drivers/block/sata_mv.c	/^	u32 reserved;$/;"	m	struct:eprd	typeref:typename:u32	file:
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reserved	drivers/dma/lpc32xx_dma.c	/^	u32 reserved[50];$/;"	m	struct:dma_reg	typeref:typename:u32[50]	file:
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reserved	drivers/usb/gadget/ci_udc.h	/^	unsigned reserved;$/;"	m	struct:ept_queue_item	typeref:typename:unsigned
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reserved	drivers/usb/host/xhci.h	/^	__le32	reserved[4];$/;"	m	struct:xhci_slot_ctx	typeref:typename:__le32[4]
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reserved	include/fsl_qe.h	/^	u8 reserved[4];		\/* Reserved, for future expansion *\/$/;"	m	struct:qe_firmware	typeref:typename:u8[4]
reserved	include/gdsys_fpga.h	/^	u16 reserved;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
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reserved	include/linux/fb.h	/^	__u32 reserved[4];		\/* reserved for future compatibility *\/$/;"	m	struct:fb_vblank	typeref:typename:__u32[4]
reserved	include/linux/fb.h	/^	__u32 reserved[5];		\/* Reserved for future compatibility *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32[5]
reserved	include/linux/mtd/nand.h	/^	u8 reserved[2];$/;"	m	struct:jedec_ecc_info	typeref:typename:u8[2]
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reserved	include/linux/mtd/nand.h	/^	u8 reserved[72];$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8[72]
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reserved0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved0[4];$/;"	m	struct:timer_regs	typeref:typename:uint32_t[4]
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reserved0	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 reserved0[3];	\/* 0x04 ~ 0x0C *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32[3]
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reserved0	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved0;			\/* 00h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
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reserved0	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved0[4];			\/* offset 0x00 - 0x0C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[4]
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reserved0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved0[63];$/;"	m	struct:rpu_regs	typeref:typename:u32[63]
reserved0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved0[65];$/;"	m	struct:crfapb_regs	typeref:typename:u32[65]
reserved0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved0[7];$/;"	m	struct:iou_scntr	typeref:typename:u32[7]
reserved0	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved0[7];$/;"	m	struct:iou_scntr_secure	typeref:typename:u32[7]
reserved0	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved0;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved0	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 reserved0;$/;"	m	struct:at91_emac	typeref:typename:u32
reserved0	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved0;$/;"	m	struct:at91_port	typeref:typename:u32
reserved0	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved0;$/;"	m	struct:at91_pmc	typeref:typename:u32
reserved0	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 reserved0;$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
reserved0	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned char		reserved0[4];$/;"	m	struct:exynos_spi	typeref:typename:unsigned char[4]
reserved0	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved0:2;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:2	file:
reserved0	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved0:2;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:2	file:
reserved0	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 reserved0;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
reserved0	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t reserved0[24];			\/* Offset 0x0008 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t[24]
reserved0	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved0;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
reserved0	board/esd/pmc405de/pmc405de.c	/^	u8 reserved0[3];$/;"	m	struct:pmc405de_cpld	typeref:typename:u8[3]	file:
reserved0	drivers/block/mvsata_ide.c	/^	u32 reserved0[10];$/;"	m	struct:mvsata_port_registers	typeref:typename:u32[10]	file:
reserved0	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 reserved0;	\/* 0x24 Reserved *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
reserved0	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 reserved0[5];	\/* 0x2C-0x3C Reserved *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32[5]
reserved0	drivers/serial/atmel_usart.h	/^	u32	reserved0[5];$/;"	m	struct:atmel_usart3	typeref:typename:u32[5]
reserved0	drivers/spi/zynq_qspi.c	/^	u32 reserved0[19];$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32[19]	file:
reserved0	drivers/usb/musb/am35x.h	/^	u32	reserved0[1];$/;"	m	struct:am35x_usb_regs	typeref:typename:u32[1]
reserved0	drivers/usb/musb/blackfin_usb.h	/^	u32 reserved0[2];$/;"	m	struct:bfin_musb_dma_regs	typeref:typename:u32[2]
reserved0	drivers/usb/musb/musb_core.h	/^		u8	reserved0;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
reserved0	drivers/usb/musb/musb_core.h	/^	u8	reserved0;$/;"	m	struct:musb_epN_regs	typeref:typename:u8
reserved0	drivers/usb/musb/musb_core.h	/^	u8	reserved0;$/;"	m	struct:musb_regs	typeref:typename:u8
reserved0	drivers/video/ipu_regs.h	/^	u32 reserved0[26];$/;"	m	struct:ipu_cm	typeref:typename:u32[26]
reserved0	drivers/video/tegra124/displayport.h	/^	u32 reserved0;$/;"	m	struct:dpaux_ctlr	typeref:typename:u32
reserved0	include/ec_commands.h	/^	uint8_t reserved0;       \/* Ignore; will be 0 *\/$/;"	m	struct:ec_response_vboot_hash	typeref:typename:uint8_t
reserved0	include/ec_commands.h	/^	uint8_t reserved0;       \/* Reserved; set 0 *\/$/;"	m	struct:ec_params_vboot_hash	typeref:typename:uint8_t
reserved0	include/faraday/ftpmu010.h	/^	unsigned int	reserved0;	\/* 0x04 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
reserved0	include/fsl_sec_mon.h	/^	u8 reserved0[0x04];$/;"	m	struct:ccsr_sec_mon_regs	typeref:typename:u8[0x04]
reserved0	include/fsl_sfp.h	/^	u32 reserved0[14];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[14]
reserved0	include/fsl_sfp.h	/^	u8 reserved0[0x40];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x40]
reserved0	include/linux/mtd/nand.h	/^	u8 reserved0[10];$/;"	m	struct:onfi_ext_param_page	typeref:typename:u8[10]
reserved0	include/linux/mtd/nand.h	/^	u8 reserved0[18];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[18]
reserved0	include/linux/mtd/nand.h	/^	u8 reserved0[2];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[2]
reserved0	include/linux/stat.h	/^	long		reserved0;$/;"	m	struct:stat	typeref:typename:long
reserved0	include/mpc5xxx.h	/^	volatile u8	reserved0[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved0	include/sh_tmu.h	/^	u8	reserved0;$/;"	m	struct:tmu_regs	typeref:typename:u8
reserved0	lib/lz4_wrapper.c	/^			u8 reserved0:2;$/;"	m	struct:lz4_frame_header::__anonc9492e16010a::__anonc9492e160208	typeref:typename:u8:2	file:
reserved0_1	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_1[61];$/;"	m	struct:slcr_regs	typeref:typename:u32[61]
reserved0_2	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_2[5];$/;"	m	struct:slcr_regs	typeref:typename:u32[5]
reserved0_3	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_3[2];$/;"	m	struct:slcr_regs	typeref:typename:u32[2]
reserved0_4	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_4[1];$/;"	m	struct:slcr_regs	typeref:typename:u32[1]
reserved0_5	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_5[3];$/;"	m	struct:slcr_regs	typeref:typename:u32[3]
reserved0_6	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_6[3];$/;"	m	struct:slcr_regs	typeref:typename:u32[3]
reserved0_7	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_7[3];$/;"	m	struct:slcr_regs	typeref:typename:u32[3]
reserved0_8	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved0_8[8];$/;"	m	struct:slcr_regs	typeref:typename:u32[8]
reserved1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved1;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
reserved1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved1;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
reserved1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved1[12];$/;"	m	struct:timer_regs	typeref:typename:uint32_t[12]
reserved1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved1[2];$/;"	m	struct:dma_channel	typeref:typename:uint32_t[2]
reserved1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved1[5];$/;"	m	struct:smc_regs	typeref:typename:uint32_t[5]
reserved1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved1[6];$/;"	m	struct:syscon_regs	typeref:typename:uint32_t[6]
reserved1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 reserved1;$/;"	m	struct:clk_pm_regs	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved1;$/;"	m	struct:emc_regs	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 reserved1[6];$/;"	m	struct:gpio_regs	typeref:typename:u32[6]
reserved1	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 reserved1[10];$/;"	m	struct:mux_regs	typeref:typename:u32[10]
reserved1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	reserved1[2];$/;"	m	struct:src	typeref:typename:u32[2]
reserved1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 reserved1[7];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[7]
reserved1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reserved1[2];$/;"	m	struct:src	typeref:typename:u32[2]
reserved1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reserved1[7];$/;"	m	struct:anatop_regs	typeref:typename:u32[7]
reserved1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reserved1[8];$/;"	m	struct:rdc_regs	typeref:typename:u32[8]
reserved1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved1[0xf8];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xf8]
reserved1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	reserved1[8];$/;"	m	struct:rdc_regs	typeref:typename:u32[8]
reserved1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 reserved1;$/;"	m	struct:src	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved1[4];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[4]
reserved1	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved1[4];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[4]
reserved1	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved1[26];$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t[26]
reserved1	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved1;$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
reserved1	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int reserved1[2];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[2]
reserved1	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 reserved1[21];$/;"	m	struct:rk3288_cru	typeref:typename:u32[21]
reserved1	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved1[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
reserved1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved1[24];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[24]
reserved1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved1[3];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved1[8];$/;"	m	struct:rk3288_msch	typeref:typename:u32[8]
reserved1	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 reserved1[(0x60 - 0x54) \/ 4];$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32[]
reserved1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved1[(0x20-0x18)\/4];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[]
reserved1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved1[0x103];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x103]
reserved1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved1[3];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved1[8];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[8]
reserved1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved1[0x17f-0x109];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved1	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 reserved1[0x38];$/;"	m	struct:i2c_regs	typeref:typename:u32[0x38]
reserved1	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved1[3];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int reserved1[(0x30 - 0x20) \/ 4];$/;"	m	struct:rk_uart	typeref:typename:unsigned int[]
reserved1	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 reserved1;$/;"	m	struct:gpt_regs	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved1;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved1;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved1[0x20];	\/* 0x30 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x20]
reserved1	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u8  reserved1[0x70];       \/* 0x090 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u8[0x70]
reserved1	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t reserved1[2];$/;"	m	struct:boot_file_head	typeref:typename:uint32_t[2]
reserved1	arch/arm/include/asm/arch-tegra/apb_misc.h	/^	u32	reserved1[6];	\/* 0x0c .. 0x20 *\/$/;"	m	struct:apb_misc_pp_ctlr	typeref:typename:u32[6]
reserved1	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved1[0x39];		\/* reserved1[0x39], *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint[0x39]
reserved1	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved1[0xd6];$/;"	m	struct:dc_ctlr	typeref:typename:uint[0xd6]
reserved1	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved1[5];		\/* reserved_1[5] *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint[5]
reserved1	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 reserved1[3];		\/* 0x104 - 0x10c: *\/$/;"	m	struct:fuse_regs	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved1[2];$/;"	m	struct:usb_ctlr	typeref:typename:uint[2]
reserved1	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved1:1;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:1
reserved1	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved1:2;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:2
reserved1	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved1:2;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:2
reserved1	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved1;	\/* 0x8C: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 reserved1[3];			\/* offset 0x24 - 0x2C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 reserved1[4];	\/* 0x10 - 0x1C *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[4]
reserved1	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved1;	\/* 0x8C: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved1[3];			\/* offset 0x24 - 0x2C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 reserved1[4];	\/* 0x10 - 0x1C *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[4]
reserved1	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 reserved1[2];	\/* 0x18 ~ 0x18 *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32[2]
reserved1	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 reserved1;				\/* offset 0x20 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved1;	\/* 0x8C: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved1[3];			\/* offset 0x24 - 0x2C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 reserved1[4];	\/* 0x10 - 0x1C *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[4]
reserved1	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	reserved1[7];	\/* 0xD0-0xE8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[7]
reserved1	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 reserved1[3];			\/* offset 0x24 - 0x2C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[3]
reserved1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved1;$/;"	m	struct:crfapb_regs	typeref:typename:u32
reserved1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved1[20];$/;"	m	struct:apu_regs	typeref:typename:u32[20]
reserved1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved1[37];$/;"	m	struct:crlapb_regs	typeref:typename:u32[37]
reserved1	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved1[63];$/;"	m	struct:rpu_regs	typeref:typename:u32[63]
reserved1	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved1;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved1	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved1;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved1	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved1[0x20];	\/* 0x30 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x20]
reserved1	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u8  reserved1[0x70];       \/* 0x090 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u8[0x70]
reserved1	arch/arm/include/asm/arch/spl.h	/^	uint32_t reserved1[2];$/;"	m	struct:boot_file_head	typeref:typename:uint32_t[2]
reserved1	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved1[0x04];$/;"	m	struct:omap_ehci	typeref:typename:u8[0x04]
reserved1	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved1[0x8];$/;"	m	struct:omap_uhh	typeref:typename:u8[0x8]
reserved1	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved1[0x8];$/;"	m	struct:omap_usbtll	typeref:typename:u8[0x8]
reserved1	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 reserved1[2];$/;"	m	struct:at91_emac	typeref:typename:u32[2]
reserved1	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32		reserved1[20];	\/* 0x10-0x5C *\/$/;"	m	struct:at91_mc	typeref:typename:u32[20]
reserved1	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved1;$/;"	m	struct:at91_port	typeref:typename:u32
reserved1	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved1;$/;"	m	struct:at91_pmc	typeref:typename:u32
reserved1	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		reserved1[2];$/;"	m	struct:at91_tcc	typeref:typename:u32[2]
reserved1	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 reserved1;		\/* 0x24: Reserved *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
reserved1	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 reserved1[3];$/;"	m	struct:atmel_pio4_port	typeref:typename:u32[3]
reserved1	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 reserved1;	\/* 0x00 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
reserved1	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved1;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved1	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int reserved1[2];$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int[2]
reserved1	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned char		reserved1[4];$/;"	m	struct:exynos_spi	typeref:typename:unsigned char[4]
reserved1	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 reserved1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
reserved1	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 reserved1;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
reserved1	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved1:2;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:2	file:
reserved1	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved1:5;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:5	file:
reserved1	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved1[14];$/;"	m	struct:slcr_regs	typeref:typename:u32[14]
reserved1	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved1[16];$/;"	m	struct:scu_regs	typeref:typename:u32[16]
reserved1	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved1[2];$/;"	m	struct:devcfg_regs	typeref:typename:u32[2]
reserved1	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved1[4];$/;"	m	struct:efuse_reg	typeref:typename:u32[4]
reserved1	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 reserved1;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
reserved1	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t  reserved1;$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310308	typeref:typename:uint8_t
reserved1	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t reserved1[2];			\/* not currently implemented *\/$/;"	m	struct:paace	typeref:typename:uint32_t[2]
reserved1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t reserved1;			\/* Offset 0x002c *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
reserved1	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u16 reserved1[3];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u16[3]
reserved1	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 reserved1:2;$/;"	m	struct:me_hfs2	typeref:typename:u32:2
reserved1	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u8	reserved1[3];$/;"	m	struct:fsp_header	typeref:typename:u8[3]
reserved1	board/esd/pmc405de/pmc405de.c	/^	u8 reserved1[3];$/;"	m	struct:pmc405de_cpld	typeref:typename:u8[3]	file:
reserved1	board/esd/vme8349/caddy.h	/^	uint32_t reserved1;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
reserved1	drivers/bios_emulator/include/biosemu.h	/^	void *reserved1;$/;"	m	struct:__anon964d10140908	typeref:typename:void *
reserved1	drivers/block/mvsata_ide.c	/^	u32 reserved1[181];$/;"	m	struct:mvsata_port_registers	typeref:typename:u32[181]	file:
reserved1	drivers/mmc/fsl_esdhc.c	/^	char    reserved1[4];	\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[4]	file:
reserved1	drivers/mtd/nand/atmel_nand_ecc.h	/^		u32 reserved1[2];$/;"	m	struct:pmecc_regs::__anond2ed08ea0108	typeref:typename:u32[2]
reserved1	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 reserved1[53];$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[53]
reserved1	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 reserved1[5];	\/* 0xEC-0xFC Reserved *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[5]
reserved1	drivers/mtd/nand/mxc_nand.h	/^	u8 reserved1[NAND_MXC_REG_OFFSET$/;"	m	struct:mxc_nand_regs	typeref:typename:u8[]
reserved1	drivers/net/altera_tse.h	/^	u32 reserved1[0x29];$/;"	m	struct:alt_tse_mac	typeref:typename:u32[0x29]
reserved1	drivers/net/designware.h	/^	u32 reserved1[2];$/;"	m	struct:eth_dma_regs	typeref:typename:u32[2]
reserved1	drivers/net/lpc32xx_eth.c	/^	u32 reserved1[2];$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32[2]	file:
reserved1	drivers/net/mvneta.c	/^	u16  reserved1;		\/* pnc_info - (for future use, PnC)	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u16	file:
reserved1	drivers/net/mvpp2.c	/^	u16 reserved1;		\/* parser_info (for future use, PnC)	*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u16	file:
reserved1	drivers/net/mvpp2.c	/^	u32 reserved1[3];	\/* hw_cmd (for future use, BM, PON, PNC) *\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u32[3]	file:
reserved1	drivers/net/mvpp2.c	/^	u8  reserved1;		\/* bm_qset (for future use, BM)		*\/$/;"	m	struct:mvpp2_buff_hdr	typeref:typename:u8	file:
reserved1	drivers/net/pch_gbe.h	/^	u16 reserved1;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u16
reserved1	drivers/net/pch_gbe.h	/^	u8 reserved1;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u8
reserved1	drivers/net/tsi108_eth.c	/^	vuint32 reserved1;	\/* reserved to make the descriptor cache line aligned. *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
reserved1	drivers/net/xilinx_axi_emac.c	/^	u32 reserved1;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
reserved1	drivers/net/xilinx_emaclite.c	/^	u32 reserved1[504];$/;"	m	struct:emaclite_regs	typeref:typename:u32[504]	file:
reserved1	drivers/net/zynq_gem.c	/^	u32 reserved1;$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
reserved1	drivers/serial/atmel_usart.h	/^	u32	reserved1;$/;"	m	struct:atmel_usart3	typeref:typename:u32
reserved1	drivers/serial/serial_zynq.c	/^	u32 reserved1[4];$/;"	m	struct:uart_zynq	typeref:typename:u32[4]	file:
reserved1	drivers/spi/zynq_qspi.c	/^	u32 reserved1[5];$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32[5]	file:
reserved1	drivers/usb/host/ohci-lpc32xx.c	/^	u32 reserved1[64];$/;"	m	struct:otg_regs	typeref:typename:u32[64]	file:
reserved1	drivers/usb/musb/am35x.h	/^	u32	reserved1[1];$/;"	m	struct:am35x_usb_regs	typeref:typename:u32[1]
reserved1	drivers/usb/musb/musb_core.h	/^		u8	reserved1;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
reserved1	drivers/usb/musb/musb_core.h	/^	u8	reserved1;$/;"	m	struct:musb_regs	typeref:typename:u8
reserved1	drivers/video/ipu_regs.h	/^	u32 reserved1[4];$/;"	m	struct:ipu_cm	typeref:typename:u32[4]
reserved1	include/faraday/ftpmu010.h	/^	unsigned int	reserved1;	\/* 0x1C *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
reserved1	include/faraday/ftsdc010.h	/^	unsigned int	reserved1[9];	\/* 0x78 - 0x98	reserved	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int[9]
reserved1	include/fsl-mc/fsl_mc.h	/^	u32 reserved1;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reserved1	include/fsl_sfp.h	/^	u32 reserved1[4];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[4]
reserved1	include/fsl_validate.h	/^	u32 reserved1[2];$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32[2]
reserved1	include/fsl_validate.h	/^	u32 reserved1[3];$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32[3]
reserved1	include/linux/edd.h	/^			__u16 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0208	typeref:typename:__u16
reserved1	include/linux/edd.h	/^			__u16 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0b08	typeref:typename:__u16
reserved1	include/linux/edd.h	/^			__u32 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1008	typeref:typename:__u32
reserved1	include/linux/edd.h	/^			__u64 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1208	typeref:typename:__u64
reserved1	include/linux/edd.h	/^			__u8 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0908	typeref:typename:__u8
reserved1	include/linux/edd.h	/^			__u8 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08	typeref:typename:__u8
reserved1	include/linux/edd.h	/^			__u8 reserved1;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1108	typeref:typename:__u8
reserved1	include/linux/ethtool.h	/^	char	reserved1[32];$/;"	m	struct:ethtool_drvinfo	typeref:typename:char[32]
reserved1	include/linux/mtd/nand.h	/^	u8 reserved1[10];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[10]
reserved1	include/linux/mtd/nand.h	/^	u8 reserved1[17];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[17]
reserved1	include/linux/stat.h	/^	long		reserved1;$/;"	m	struct:stat	typeref:typename:long
reserved1	include/linux/usb/dwc3.h	/^	u32 reserved1;$/;"	m	struct:dwc3	typeref:typename:u32
reserved1	include/mpc5xxx.h	/^	volatile u16	reserved1;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved1	include/mpc5xxx.h	/^	volatile u32	reserved1;	\/* INTR + 0x20 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
reserved1	include/mpc5xxx.h	/^	volatile u8 reserved1[2];$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8[2]
reserved1	include/mpc5xxx.h	/^	volatile u8 reserved1[3];	\/* GPIO + 0x19 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved1	include/mpc5xxx.h	/^	volatile u8 reserved1[3];	\/* WU_GPIO + 0x01 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved1	include/part_efi.h	/^	__le32 reserved1;$/;"	m	struct:_gpt_header	typeref:typename:__le32
reserved1	include/sh_tmu.h	/^	u8	reserved1;$/;"	m	struct:tmu_regs	typeref:typename:u8
reserved1	include/sparse_format.h	/^  __le16	reserved1;$/;"	m	struct:chunk_header	typeref:typename:__le16
reserved1	include/vsc9953.h	/^	u32	reserved1;$/;"	m	struct:vsc9953_dev_gmii_port_mode	typeref:typename:u32
reserved1	include/vsc9953.h	/^	u32	reserved1;$/;"	m	struct:vsc9953_mii_mng	typeref:typename:u32
reserved1	include/vsc9953.h	/^	u32	reserved1;$/;"	m	struct:vsc9953_qsys_hsch	typeref:typename:u32
reserved1	include/vsc9953.h	/^	u32	reserved1;$/;"	m	struct:vsc9953_qsys_mmgt	typeref:typename:u32
reserved1	include/vsc9953.h	/^	u32	reserved1;$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32
reserved1	include/vsc9953.h	/^	u32	reserved1[15];$/;"	m	struct:vsc9953_ana_pfc	typeref:typename:u32[15]
reserved1	include/vsc9953.h	/^	u32	reserved1[17];$/;"	m	struct:vsc9953_ana_pol_misc	typeref:typename:u32[17]
reserved1	include/vsc9953.h	/^	u32	reserved1[23];$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32[23]
reserved1	include/vsc9953.h	/^	u32	reserved1[3];$/;"	m	struct:vsc9953_ana_pol	typeref:typename:u32[3]
reserved1	include/vsc9953.h	/^	u32	reserved1[546];$/;"	m	struct:vsc9953_qsys_hsch_misc	typeref:typename:u32[546]
reserved1	include/vsc9953.h	/^	u32	reserved1[6];$/;"	m	struct:vsc9953_sys_stat	typeref:typename:u32[6]
reserved1	include/vsc9953.h	/^	u32	reserved1[9536];$/;"	m	struct:vsc9953_analyzer	typeref:typename:u32[9536]
reserved1	lib/lz4_wrapper.c	/^			u8 reserved1:4;$/;"	m	struct:lz4_frame_header::__anonc9492e16030a::__anonc9492e160408	typeref:typename:u8:4	file:
reserved1	tools/imximage.h	/^	uint32_t reserved1;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
reserved1	tools/kwbimage.h	/^	uint8_t  reserved1;             \/* 1 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
reserved1	tools/mxsimage.h	/^		uint32_t	reserved1;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960b08	typeref:typename:uint32_t
reserved1	tools/mxsimage.h	/^	uint32_t	reserved1;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
reserved1	tools/rkcommon.c	/^	uint8_t reserved1[492];$/;"	m	struct:header0_info	typeref:typename:uint8_t[492]	file:
reserved10	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved10[0x1f];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x1f]
reserved10	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved10[127];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[127]
reserved10	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved10[0x1a];$/;"	m	struct:rk3399_cru	typeref:typename:u32[0x1a]
reserved10	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved10[4];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[4]
reserved10	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved10;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
reserved10	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved10[3];$/;"	m	struct:rk3288_grf	typeref:typename:u32[3]
reserved10	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved10;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
reserved10	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved10[0x771];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x771]
reserved10	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved10[0xc9];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0xc9]
reserved10	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved10[4];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[4]
reserved10	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved10[2];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved10	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved10;		\/* 0x98 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved10	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved10[0x8];     \/* 0x488 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x8]
reserved10	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved10	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10[20];$/;"	m	struct:usb_ctlr	typeref:typename:uint[20]
reserved10	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved10[235];			\/* offset 0x29C - 0x644 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[235]
reserved10	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved10[235];			\/* offset 0x29C - 0x644 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[235]
reserved10	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved10[2];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved10	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved10;		\/* 0x98 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved10	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved10[0x8];     \/* 0x488 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x8]
reserved10	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved10;	\/* *\/$/;"	m	struct:at91_port	typeref:typename:u32
reserved10	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved10;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved10	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved10;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
reserved10	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved10;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
reserved10	drivers/mmc/fsl_esdhc.c	/^	char    reserved10[712];\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[712]	file:
reserved10	include/linux/usb/dwc3.h	/^	u32 reserved10;$/;"	m	struct:dwc3	typeref:typename:u32
reserved10	include/mpc5xxx.h	/^	volatile u8	reserved10[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved10	include/mpc5xxx.h	/^	volatile u8 reserved10;		\/* GPIO + 0x3f *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
reserved10	include/mpc5xxx.h	/^	volatile u8 reserved10[3];	\/* WU_GPIO + 0x25 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved10_1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10_1[2];$/;"	m	struct:usb_ctlr	typeref:typename:uint[2]
reserved10_2	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10_2[4];$/;"	m	struct:usb_ctlr	typeref:typename:uint[4]
reserved10_3	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10_3[4];$/;"	m	struct:usb_ctlr	typeref:typename:uint[4]
reserved10_4	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10_4[4];$/;"	m	struct:usb_ctlr	typeref:typename:uint[4]
reserved10_5	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10_5;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved10_6	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved10_6;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved11	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved11[0xdf];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xdf]
reserved11	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved11[31];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[31]
reserved11	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved11;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
reserved11	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved11;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
reserved11	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved11;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved11	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved11[3];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[3]
reserved11	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved11[4];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[4]
reserved11	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved11[8];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[8]
reserved11	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved11;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
reserved11	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved11[2];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved11	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved11[2];	\/* 0xa8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved11	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved11[0x04];	\/* 0x494 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved11	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved11[0x80];$/;"	m	struct:usb_ctlr	typeref:typename:uint[0x80]
reserved11	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved11[2];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved11	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved11[2];	\/* 0xa8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved11	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved11[0x04];	\/* 0x494 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved11	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved11[5];	\/* *\/$/;"	m	struct:at91_port	typeref:typename:u32[5]
reserved11	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved11;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
reserved11	include/mpc5xxx.h	/^	volatile u8	reserved11[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved11_1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved11_1[0x7D];$/;"	m	struct:usb_ctlr	typeref:typename:uint[0x7D]
reserved11_10	drivers/usb/dwc3/core.h	/^	u32	reserved11_10:2;$/;"	m	struct:dwc3_event_depevt	typeref:typename:u32:2
reserved12	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved12[0x1de4];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x1de4]
reserved12	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved12[31];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[31]
reserved12	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved12[3];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[3]
reserved12	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved12[6];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[6]
reserved12	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved12;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved12	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved12[0xdd];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0xdd]
reserved12	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved12[2];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[2]
reserved12	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved12[6];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[6]
reserved12	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved12[0x3fff-0x3206];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved12	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved12[3];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[3]
reserved12	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved12[7];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[7]
reserved12	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved12[2];	\/* 0xc4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved12	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved12[0x1c];	\/* 0x4a4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x1c]
reserved12	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved12[3];$/;"	m	struct:usb_ctlr	typeref:typename:uint[3]
reserved12	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved12[4];$/;"	m	struct:usb_ctlr	typeref:typename:uint[4]
reserved12	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved12[7];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[7]
reserved12	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved12[2];	\/* 0xc4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved12	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved12[0x1c];	\/* 0x4a4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x1c]
reserved12	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved12[63];$/;"	m	struct:at91_port	typeref:typename:u32[63]
reserved12	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved12[24];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[24]
reserved12	include/mpc5xxx.h	/^	volatile u8	reserved12[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved13	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved13[0x18];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x18]
reserved13	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved13[127];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[127]
reserved13	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved13[3];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[3]
reserved13	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved13[0x10];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[0x10]
reserved13	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved13;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
reserved13	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved13[0x72f];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x72f]
reserved13	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved13[8];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[8]
reserved13	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved13[0x40ff-0x4007];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved13	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved13[3];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[3]
reserved13	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved13[9];	\/* 0xd0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[9]
reserved13	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved13[0x18];	\/* 0x4d8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x18]
reserved13	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved13[53];$/;"	m	struct:usb_ctlr	typeref:typename:uint[53]
reserved13	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved13[56];$/;"	m	struct:usb_ctlr	typeref:typename:uint[56]
reserved13	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved13[2];		\/* 38h, 3ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[2]
reserved13	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved13[2];		\/* 38h, 3ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[2]
reserved13	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved13[9];	\/* 0xd0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[9]
reserved13	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved13[0x18];	\/* 0x4d8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x18]
reserved13	include/mpc5xxx.h	/^	volatile u8	reserved13[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved14	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved14[0xcd];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xcd]
reserved14	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved14[127];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[127]
reserved14	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved14[46];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[46]
reserved14	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved14[0x10];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[0x10]
reserved14	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved14;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
reserved14	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved14[0x0a];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x0a]
reserved14	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved14[46];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[46]
reserved14	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved14[3];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved14	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved14[5];	\/* 0x104 BE0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[5]
reserved14	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved14[0x10];	\/* 0x4fc *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x10]
reserved14	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved14[64 * 3];$/;"	m	struct:usb_ctlr	typeref:typename:uint[]
reserved14	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved14[3];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved14	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved14[5];	\/* 0x104 BE0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[5]
reserved14	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved14[0x10];	\/* 0x4fc *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x10]
reserved14	include/mpc5xxx.h	/^	volatile u8	reserved14[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved15	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved15[0xfc];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xfc]
reserved15	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved15[31];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[31]
reserved15	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved15[0xf65];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0xf65]
reserved15	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved15[4];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[4]
reserved15	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved15;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved15	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved15[4];	\/* 0x120 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved15	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved15[0x70];	\/* 0x510 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x70]
reserved15	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved15;			\/* 44h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
reserved15	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved15;			\/* 44h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
reserved15	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved15;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved15	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved15[4];	\/* 0x120 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved15	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved15[0x70];	\/* 0x510 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x70]
reserved15	include/mpc5xxx.h	/^	volatile u8	reserved15[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved15_12	drivers/usb/dwc3/core.h	/^	u32	reserved15_12:4;$/;"	m	struct:dwc3_event_devt	typeref:typename:u32:4
reserved16	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved16[0xfb];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xfb]
reserved16	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved16[31];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[31]
reserved16	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved16[0x1c];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x1c]
reserved16	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved16[9];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[9]
reserved16	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved16;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved16	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved16;		\/* 0x138 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved16	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved16[0x04];	\/* 0x58c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved16	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved16;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved16	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved16;		\/* 0x138 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved16	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved16[0x04];	\/* 0x58c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved16	include/mpc5xxx.h	/^	volatile u8	reserved16[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved17	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved17[0xfd];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xfd]
reserved17	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved17[127];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[127]
reserved17	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved17[0x1a];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x1a]
reserved17	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved17[0x24];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[0x24]
reserved17	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved17[0x7dff-0x4119];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved17	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved17[4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved17	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved17;		\/* 0x140 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved17	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved17[0x08];	\/* 0x598 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x08]
reserved17	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved17;			\/* 4ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
reserved17	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved17;			\/* 4ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
reserved17	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved17[4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved17	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved17;		\/* 0x140 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved17	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved17[0x08];	\/* 0x598 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x08]
reserved17	include/mpc5xxx.h	/^	volatile u16	reserved17;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved18	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved18[0xfb];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xfb]
reserved18	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved18[0x2b];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[0x2b]
reserved18	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved18[0x31];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x31]
reserved18	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved18[0x7e1f-0x7e12];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved18	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved18[4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved18	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved18[2];	\/* 0x148 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved18	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved18[0x04];	\/* 0x5ac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved18	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved18[4];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved18	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved18[2];	\/* 0x148 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved18	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved18[0x04];	\/* 0x5ac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved18	include/mpc5xxx.h	/^	volatile u16	reserved18;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved19	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved19[0xf9];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xf9]
reserved19	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved19[0x7f6];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x7f6]
reserved19	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved19[21];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[21]
reserved19	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved19;		\/* 0x158 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved19	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved19[21];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[21]
reserved19	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved19;		\/* 0x158 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved2;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
reserved2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved2;$/;"	m	struct:gpio_regs	typeref:typename:uint32_t
reserved2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved2[2];$/;"	m	struct:mac_regs	typeref:typename:uint32_t[2]
reserved2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved2[2];$/;"	m	struct:syscon_regs	typeref:typename:uint32_t[2]
reserved2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved2[6];$/;"	m	struct:timer_regs	typeref:typename:uint32_t[6]
reserved2	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 reserved2[3];$/;"	m	struct:clk_pm_regs	typeref:typename:u32[3]
reserved2	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved2[2];$/;"	m	struct:emc_regs	typeref:typename:u32[2]
reserved2	arch/arm/include/asm/arch-lpc32xx/gpio.h	/^	u32 reserved2;$/;"	m	struct:gpio_regs	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 reserved2[51];$/;"	m	struct:mux_regs	typeref:typename:u32[51]
reserved2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reserved2[116];$/;"	m	struct:rdc_regs	typeref:typename:u32[116]
reserved2	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved2[0x76];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x76]
reserved2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	reserved2[116];$/;"	m	struct:rdc_regs	typeref:typename:u32[116]
reserved2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 reserved2;$/;"	m	struct:src	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved2[4];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[4]
reserved2	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved2[27];$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t[27]
reserved2	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved2;$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
reserved2	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int reserved2[2];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[2]
reserved2	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 reserved2;$/;"	m	struct:rk3288_cru	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved2[0x18];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[0x18]
reserved2	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved2[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
reserved2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved2[4];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[4]
reserved2	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved2[8];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[8]
reserved2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved2[0x0a];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[0x0a]
reserved2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved2;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved2[(0x40-0x28)\/4];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[]
reserved2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved2[0x29];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x29]
reserved2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved2[2];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[2]
reserved2	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved2[0x1fe - 0x189];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved2	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved2[4];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[4]
reserved2	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 reserved2[48];$/;"	m	struct:rk3288_vop	typeref:typename:u32[48]
reserved2	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved2;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved2;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved2[0x04];	\/* 0x6c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved2	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 reserved2[0x94];       \/* 0x16c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[0x94]
reserved2	arch/arm/include/asm/arch-sunxi/spl.h	/^	uint32_t reserved2[5];		\/* padding, align to 64 bytes *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t[5]
reserved2	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved2[0x1b];$/;"	m	struct:dc_ctlr	typeref:typename:uint[0x1b]
reserved2	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved2[0x3b];		\/* reserved2[0x3b] *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint[0x3b]
reserved2	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved2[5];		\/* reserved_2[5] *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint[5]
reserved2	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 reserved2[13];		\/* 0x114 - 0x144: *\/$/;"	m	struct:fuse_regs	typeref:typename:u32[13]
reserved2	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved2[56];$/;"	m	struct:usb_ctlr	typeref:typename:uint[56]
reserved2	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved2:3;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:3
reserved2	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved2:4;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:4
reserved2	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved2:6;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:6
reserved2	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved2[3];	\/* 0xA4 - 0xAC: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved2	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 reserved2[6];			\/* offset 0x38 - 0x4C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[6]
reserved2	arch/arm/include/asm/arch-tegra114/sysctr.h	/^	u32 reserved2[1002];	\/* 0x28 - 0xFCC *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[1002]
reserved2	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved2[3];	\/* 0xA4 - 0xAC: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved2	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved2[6];			\/* offset 0x38 - 0x4C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[6]
reserved2	arch/arm/include/asm/arch-tegra124/sysctr.h	/^	u32 reserved2[1002];	\/* 0x28 - 0xFCC *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[1002]
reserved2	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 reserved2[5];	\/* 0xB8 ~ 0xC8 *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32[5]
reserved2	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 reserved2;				\/* offset 0x38 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32
reserved2	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved2[3];	\/* 0xA4 - 0xAC: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved2	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved2[6];			\/* offset 0x38 - 0x4C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[6]
reserved2	arch/arm/include/asm/arch-tegra210/sysctr.h	/^	u32 reserved2[1002];	\/* 0x28 - 0xFCC *\/$/;"	m	struct:sysctr_ctlr	typeref:typename:u32[1002]
reserved2	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 reserved2[5];			\/* offset 0x3C - 0x4C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[5]
reserved2	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved2[53];$/;"	m	struct:crlapb_regs	typeref:typename:u32[53]
reserved2	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved2;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved2	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved2;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved2	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved2[0x04];	\/* 0x6c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved2	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 reserved2[0x94];       \/* 0x16c *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32[0x94]
reserved2	arch/arm/include/asm/arch/spl.h	/^	uint32_t reserved2[5];		\/* padding, align to 64 bytes *\/$/;"	m	struct:boot_file_head	typeref:typename:uint32_t[5]
reserved2	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved2[0x10];$/;"	m	struct:omap_usbtll	typeref:typename:u8[0x10]
reserved2	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved2[0x24];$/;"	m	struct:omap_ehci	typeref:typename:u8[0x24]
reserved2	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved2[0x28];$/;"	m	struct:omap_uhh	typeref:typename:u8[0x28]
reserved2	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 reserved2[3];$/;"	m	struct:at91_emac	typeref:typename:u32[3]
reserved2	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32		reserved2[15];$/;"	m	struct:at91_mc	typeref:typename:u32[15]
reserved2	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved2;$/;"	m	struct:at91_port	typeref:typename:u32
reserved2	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved2;$/;"	m	struct:at91_pmc	typeref:typename:u32
reserved2	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 reserved2[33];$/;"	m	struct:atmel_mpddr	typeref:typename:u32[33]
reserved2	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 reserved2;	\/* 0x08 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
reserved2	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved2;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved2	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int reserved2[2];$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int[2]
reserved2	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned char		reserved2[4];$/;"	m	struct:exynos_spi	typeref:typename:unsigned char[4]
reserved2	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 reserved2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
reserved2	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 reserved2;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
reserved2	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved2:3;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:3	file:
reserved2	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved2:5;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:5	file:
reserved2	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved2[15];$/;"	m	struct:slcr_regs	typeref:typename:u32[15]
reserved2	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved2[18];$/;"	m	struct:devcfg_regs	typeref:typename:u32[18]
reserved2	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved2[3];$/;"	m	struct:efuse_reg	typeref:typename:u32[3]
reserved2	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 reserved2;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
reserved2	arch/powerpc/include/asm/fsl_pamu.h	/^			uint16_t reserved2;$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310308	typeref:typename:uint16_t
reserved2	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t reserved2[2];			\/* not currently implemented *\/$/;"	m	struct:paace	typeref:typename:uint32_t[2]
reserved2	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved2[2];$/;"	m	struct:gpio_regs	typeref:typename:unsigned char[2]
reserved2	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	reserved2;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
reserved2	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved2[2];$/;"	m	struct:gpio_regs	typeref:typename:unsigned char[2]
reserved2	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	reserved2;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
reserved2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved2;$/;"	m	struct:ether_mac_regs	typeref:typename:unsigned int
reserved2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved2[118];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[118]
reserved2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved2[2];$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int[2]
reserved2	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	reserved2;$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short
reserved2	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved2;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
reserved2	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 reserved2:4;$/;"	m	struct:me_hfs2	typeref:typename:u32:4
reserved2	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	reserved2;$/;"	m	struct:fsp_header	typeref:typename:u32
reserved2	board/esd/pmc405de/pmc405de.c	/^	u8 reserved2[3];$/;"	m	struct:pmc405de_cpld	typeref:typename:u8[3]	file:
reserved2	board/esd/vme8349/caddy.h	/^	uint32_t reserved2;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
reserved2	drivers/block/mvsata_ide.c	/^	u32 reserved2[5];$/;"	m	struct:mvsata_port_registers	typeref:typename:u32[5]	file:
reserved2	drivers/mmc/fsl_esdhc.c	/^	char    reserved2[4];$/;"	m	struct:fsl_esdhc	typeref:typename:char[4]	file:
reserved2	drivers/mmc/sh_mmcif.h	/^	unsigned long reserved2[2];$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long[2]
reserved2	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 reserved2[63];$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[63]
reserved2	drivers/mtd/nand/mxc_nand.h	/^	u16 reserved2;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
reserved2	drivers/mtd/nand/mxc_nand.h	/^	u16 reserved2[2];$/;"	m	struct:mxc_nand_regs	typeref:typename:u16[2]
reserved2	drivers/net/altera_tse.h	/^	u32 reserved2[0x44];$/;"	m	struct:alt_tse_mac	typeref:typename:u32[0x44]
reserved2	drivers/net/designware.h	/^	u32 reserved2[7];$/;"	m	struct:eth_dma_regs	typeref:typename:u32[7]
reserved2	drivers/net/lpc32xx_eth.c	/^	u32 reserved2[45];$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32[45]	file:
reserved2	drivers/net/mvneta.c	/^	u32  reserved2;		\/* hw_cmd - (for future use, PMT)	*\/$/;"	m	struct:mvneta_tx_desc	typeref:typename:u32	file:
reserved2	drivers/net/mvneta.c	/^	u32  reserved2;		\/* pnc_flow_id  (for future use, PnC)	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u32	file:
reserved2	drivers/net/mvpp2.c	/^	u16 reserved2;		\/* gem_port_id (for future use, PON)	*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u16	file:
reserved2	drivers/net/mvpp2.c	/^	u32 reserved2;		\/* reserved (for future use)		*\/$/;"	m	struct:mvpp2_tx_desc	typeref:typename:u32	file:
reserved2	drivers/net/pch_gbe.h	/^	u16 reserved2;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u16
reserved2	drivers/net/pch_gbe.h	/^	u8 reserved2;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u8
reserved2	drivers/net/pcnet.c	/^	u32 reserved2;$/;"	m	struct:pcnet_init_block	typeref:typename:u32	file:
reserved2	drivers/net/tsi108_eth.c	/^	vuint32 reserved2;	\/* reserved to make the descriptor cache line aligned. *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
reserved2	drivers/net/xilinx_axi_emac.c	/^	u32 reserved2;$/;"	m	struct:axi_regs	typeref:typename:u32	file:
reserved2	drivers/net/xilinx_axi_emac.c	/^	u32 reserved2;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
reserved2	drivers/net/xilinx_emaclite.c	/^	u32 reserved2[508];$/;"	m	struct:emaclite_regs	typeref:typename:u32[508]	file:
reserved2	drivers/net/zynq_gem.c	/^	u32 reserved2[2];$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[2]	file:
reserved2	drivers/serial/atmel_usart.h	/^	u32	reserved2[54]; \/* version and PDC not needed *\/$/;"	m	struct:atmel_usart3	typeref:typename:u32[54]
reserved2	drivers/serial/serial_zynq.c	/^	u32 reserved2[4];$/;"	m	struct:uart_zynq	typeref:typename:u32[4]	file:
reserved2	drivers/usb/host/ohci-lpc32xx.c	/^	u32 reserved2[122];$/;"	m	struct:otg_regs	typeref:typename:u32[122]	file:
reserved2	drivers/usb/musb/am35x.h	/^	u32	reserved2[1];$/;"	m	struct:am35x_usb_regs	typeref:typename:u32[1]
reserved2	drivers/usb/musb/musb_core.h	/^	u16	reserved2[3];$/;"	m	struct:musb_regs	typeref:typename:u16[3]
reserved2	drivers/video/ipu_regs.h	/^	u32 reserved2[2];$/;"	m	struct:ipu_cm	typeref:typename:u32[2]
reserved2	include/ata.h	/^	unsigned short	reserved2;	\/* reserved (word 2) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
reserved2	include/faraday/ftpmu010.h	/^	unsigned int	reserved2;	\/* 0x94 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
reserved2	include/fat.h	/^	__u16	reserved2[6];	\/* Unused *\/$/;"	m	struct:boot_sector	typeref:typename:__u16[6]
reserved2	include/fsl-mc/fsl_mc.h	/^	u32 reserved2;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reserved2	include/fsl_sec_mon.h	/^	u8 reserved2[0x0c];$/;"	m	struct:ccsr_sec_mon_regs	typeref:typename:u8[0x0c]
reserved2	include/fsl_sfp.h	/^	u32 reserved2[12];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[12]
reserved2	include/fsl_sfp.h	/^	u8 reserved2[0x04];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x04]
reserved2	include/fsl_sfp.h	/^	u8 reserved2[0x38];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x38]
reserved2	include/fsl_validate.h	/^		u32 reserved2[2];$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c070a	typeref:typename:u32[2]
reserved2	include/linux/edd.h	/^			__u16 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0908	typeref:typename:__u16
reserved2	include/linux/edd.h	/^			__u16 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1108	typeref:typename:__u16
reserved2	include/linux/edd.h	/^			__u32 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0208	typeref:typename:__u32
reserved2	include/linux/edd.h	/^			__u32 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0b08	typeref:typename:__u32
reserved2	include/linux/edd.h	/^			__u64 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1008	typeref:typename:__u64
reserved2	include/linux/edd.h	/^			__u64 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1208	typeref:typename:__u64
reserved2	include/linux/edd.h	/^			__u8 reserved2;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08	typeref:typename:__u8
reserved2	include/linux/edd.h	/^	__u8 reserved2;$/;"	m	struct:edd_device_params	typeref:typename:__u8
reserved2	include/linux/ethtool.h	/^	__u8	reserved2;$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
reserved2	include/linux/ethtool.h	/^	char	reserved2[12];$/;"	m	struct:ethtool_drvinfo	typeref:typename:char[12]
reserved2	include/linux/mtd/nand.h	/^	u8 reserved2[13];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[13]
reserved2	include/linux/mtd/nand.h	/^	u8 reserved2[6];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[6]
reserved2	include/linux/stat.h	/^	long		reserved2;$/;"	m	struct:stat	typeref:typename:long
reserved2	include/linux/usb/dwc3.h	/^	u32 reserved2;$/;"	m	struct:dwc3	typeref:typename:u32
reserved2	include/mpc5xxx.h	/^	volatile u32	reserved2;	\/* INTR + 0x34 *\/$/;"	m	struct:mpc5xxx_intr	typeref:typename:volatile u32
reserved2	include/mpc5xxx.h	/^	volatile u8	reserved2[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved2	include/mpc5xxx.h	/^	volatile u8 reserved2[3];	\/* GPIO + 0x1d *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved2	include/mpc5xxx.h	/^	volatile u8 reserved2[3];	\/* WU_GPIO + 0x05 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved2	include/mpc5xxx.h	/^	volatile u8 reserved2[3];$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8[3]
reserved2	include/sh_tmu.h	/^	u16	reserved2;$/;"	m	struct:tmu_regs	typeref:typename:u16
reserved2	include/sh_tmu.h	/^	u8  reserved2[3];$/;"	m	struct:tmu_regs	typeref:typename:u8[3]
reserved2	include/vsc9953.h	/^	u32	reserved2[14];$/;"	m	struct:vsc9953_analyzer	typeref:typename:u32[14]
reserved2	include/vsc9953.h	/^	u32	reserved2[20];$/;"	m	struct:vsc9953_qsys_hsch	typeref:typename:u32[20]
reserved2	include/vsc9953.h	/^	u32	reserved2[50];$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32[50]
reserved2	lib/lz4_wrapper.c	/^			u8 reserved2:1;$/;"	m	struct:lz4_frame_header::__anonc9492e16030a::__anonc9492e160408	typeref:typename:u8:1	file:
reserved2	tools/imximage.h	/^	uint32_t reserved2;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
reserved2	tools/kwbimage.h	/^	uint16_t reserved2;             \/* 2-3 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint16_t
reserved2	tools/kwbimage.h	/^	uint8_t               reserved2[7];$/;"	m	struct:ext_hdr_v0	typeref:typename:uint8_t[7]
reserved2	tools/mxsimage.h	/^		uint32_t	reserved2;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960b08	typeref:typename:uint32_t
reserved2	tools/mxsimage.h	/^	uint32_t	reserved2;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
reserved2	tools/rkcommon.c	/^	uint8_t reserved2[2];$/;"	m	struct:header0_info	typeref:typename:uint8_t[2]	file:
reserved20	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved20[0x9e5];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x9e5]
reserved20	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved20[0x779];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x779]
reserved20	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved20[6];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[6]
reserved20	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved20[2];	\/* 0x160 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved20	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved20[3];		\/* 58h, 5ch, 60h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[3]
reserved20	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved20[3];		\/* 58h, 5ch, 60h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[3]
reserved20	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved20[6];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[6]
reserved20	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved20[2];	\/* 0x160 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved20	include/mpc5xxx.h	/^	volatile u16	reserved20;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved21	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved21[0xf8];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xf8]
reserved21	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved21[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
reserved21	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved21[5];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[5]
reserved21	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved21[13];	\/* 0x16c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[13]
reserved21	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved21[5];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[5]
reserved21	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved21[13];	\/* 0x16c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[13]
reserved21	include/mpc5xxx.h	/^	volatile u8	reserved21[5];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[5]
reserved21_5	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved21_5[7];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[7]
reserved21_5	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved21_5[7];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[7]
reserved22	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved22[0xee6];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xee6]
reserved22	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved22[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
reserved22	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved22[3];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved22	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved22[21];	\/* 0x1ac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[21]
reserved22	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved22[3];		\/* 68h, 6ch, 70h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[3]
reserved22	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved22[3];		\/* 68h, 6ch, 70h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[3]
reserved22	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved22[3];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved22	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved22[21];	\/* 0x1ac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[21]
reserved22	include/mpc5xxx.h	/^	volatile u16	reserved22;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved23	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved23[0x5];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x5]
reserved23	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved23[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
reserved23	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved23;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved23	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved23;		\/* 0x208 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved23	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved23;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved23	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved23;		\/* 0x208 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved23	include/mpc5xxx.h	/^	volatile u16	reserved23;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved24	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved24[0x2cdf];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x2cdf]
reserved24	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved24[(0xe130 - 0xe0ec)\/4 - 1];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[]
reserved24	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved24;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved24	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved24[4];	\/* 0x210 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved24	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved24;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved24	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved24[4];	\/* 0x210 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved24	include/mpc5xxx.h	/^	volatile u16	reserved24;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved24a	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved24a[(0xe200 - 0xe134)\/4 - 1];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[]
reserved25	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved25[0x7];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x7]
reserved25	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved25;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
reserved25	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved25[5];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[5]
reserved25	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved25;		\/* 0x240 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved25	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved25[5];$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[5]
reserved25	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved25;		\/* 0x240 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved25	include/mpc5xxx.h	/^	volatile u16	reserved25;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved26	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved26[0xce];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xce]
reserved26	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved26[0x1e];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x1e]
reserved26	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved26[11];	\/* 0x258 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[11]
reserved26	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved26[11];	\/* 0x258 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[11]
reserved26	include/mpc5xxx.h	/^	volatile u16	reserved26;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved27	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved27[0x1ed];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x1ed]
reserved27	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved27[0x32];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x32]
reserved27	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved27;		\/* 0x28c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved27	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved27;		\/* 0x28c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved27	include/mpc5xxx.h	/^	volatile u8	reserved27[5];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[5]
reserved28	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved28[0xac];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0xac]
reserved28	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved28[4];	\/* 0x294 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved28	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved28[4];	\/* 0x294 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[4]
reserved28	include/mpc5xxx.h	/^	volatile u16	reserved28;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved29	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved29[0x6c];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x6c]
reserved29	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved29;		\/* 0x2ac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved29	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved29;		\/* 0x2ac *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved29	include/mpc5xxx.h	/^	volatile u16	reserved29;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved2_4	drivers/video/tegra124/displayport.h	/^	u32 reserved2_4;$/;"	m	struct:dpaux_ctlr	typeref:typename:u32
reserved2a	drivers/usb/musb/musb_core.h	/^	u16	reserved2a[1];$/;"	m	struct:musb_regs	typeref:typename:u16[1]
reserved2b	drivers/usb/musb/musb_core.h	/^	u8	reserved2b[1];$/;"	m	struct:musb_regs	typeref:typename:u8[1]
reserved3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved3;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
reserved3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved3[10];$/;"	m	struct:gpio_regs	typeref:typename:uint32_t[10]
reserved3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved3[2];$/;"	m	struct:mac_regs	typeref:typename:uint32_t[2]
reserved3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved3[9];$/;"	m	struct:syscon_regs	typeref:typename:uint32_t[9]
reserved3	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 reserved3[4];$/;"	m	struct:clk_pm_regs	typeref:typename:u32[4]
reserved3	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved3[8];$/;"	m	struct:emc_regs	typeref:typename:u32[8]
reserved3	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 reserved3;$/;"	m	struct:mux_regs	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reserved3[96];$/;"	m	struct:rdc_regs	typeref:typename:u32[96]
reserved3	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved3[0x75];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x75]
reserved3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	reserved3[101];$/;"	m	struct:rdc_regs	typeref:typename:u32[101]
reserved3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 reserved3[10];$/;"	m	struct:src	typeref:typename:u32[10]
reserved3	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved3[5];$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t[5]
reserved3	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved3[7];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[7]
reserved3	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int reserved3;$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int
reserved3	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 reserved3;$/;"	m	struct:rk3288_cru	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved3;$/;"	m	struct:rk3399_pmucru	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved3[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
reserved3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved3;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved3[15];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[15]
reserved3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved3[0x05];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[0x05]
reserved3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved3;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved3[(0x50-0x4c)\/4];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[]
reserved3	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved3[2];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[2]
reserved3	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved3[8];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[8]
reserved3	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved3[0x7ff-0x207];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved3	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved3;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved3;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved3;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved3[0x04];	\/* 0x7c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved3	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved3[0xd7];$/;"	m	struct:dc_ctlr	typeref:typename:uint[0xd7]
reserved3	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved3[13];		\/* reserved_3[13] *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint[13]
reserved3	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 reserved3[21];		\/* 0x14C - 0x19C: *\/$/;"	m	struct:fuse_regs	typeref:typename:u32[21]
reserved3	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved3[5];$/;"	m	struct:usb_ctlr	typeref:typename:uint[5]
reserved3	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 reserved3:1;$/;"	m	struct:pllx_base_reg::__anonf37f1db20308	typeref:typename:u32:1
reserved3	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved3[9];	\/* 0xC8-0xE8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[9]
reserved3	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 reserved3[12];			\/* offset 0x60 - 0x8C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[12]
reserved3	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved3[9];	\/* 0xC8-0xE8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[9]
reserved3	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved3[4];			\/* offset 0x60 - 0x6C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[4]
reserved3	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 reserved3;		\/* 0xF0: *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
reserved3	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 reserved3[6];			\/* offset 0x40 - 0x54 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[6]
reserved3	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved3[9];	\/* 0xC8-0xE8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[9]
reserved3	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved3[4];			\/* offset 0x60 - 0x6C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[4]
reserved3	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 reserved3[12];			\/* offset 0x60 - 0x8C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[12]
reserved3	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved3[14];$/;"	m	struct:crlapb_regs	typeref:typename:u32[14]
reserved3	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved3;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved3	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved3;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved3	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved3[0x04];	\/* 0x7c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x04]
reserved3	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved3[0x38];$/;"	m	struct:omap_ehci	typeref:typename:u8[0x38]
reserved3	arch/arm/include/asm/ehci-omap.h	/^	u8 reserved3[0xc];$/;"	m	struct:omap_usbtll	typeref:typename:u8[0xc]
reserved3	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved3;$/;"	m	struct:at91_port	typeref:typename:u32
reserved3	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved3[4];$/;"	m	struct:at91_pmc	typeref:typename:u32[4]
reserved3	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		reserved3[4];$/;"	m	struct:at91_tcc	typeref:typename:u32[4]
reserved3	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 reserved3[4];$/;"	m	struct:atmel_mpddr	typeref:typename:u32[4]
reserved3	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 reserved3;	\/* 0x0c *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
reserved3	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved3;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved3	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int reserved3[2];$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int[2]
reserved3	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved3:3;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:3	file:
reserved3	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved3:3;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:3	file:
reserved3	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved3;$/;"	m	struct:devcfg_regs	typeref:typename:u32
reserved3	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved3[5];$/;"	m	struct:slcr_regs	typeref:typename:u32[5]
reserved3	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 reserved3;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
reserved3	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t reserved3[2];			\/* not currently implemented *\/$/;"	m	struct:paace	typeref:typename:uint32_t[2]
reserved3	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	reserved3[2];$/;"	m	struct:gpio_regs	typeref:typename:unsigned short[2]
reserved3	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	reserved3[2];$/;"	m	struct:gpio_regs	typeref:typename:unsigned short[2]
reserved3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved3[2];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[2]
reserved3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved3[62];$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int[62]
reserved3	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	reserved3;$/;"	m	struct:pciebrg_regs	typeref:typename:unsigned short
reserved3	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved3;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
reserved3	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 reserved3:2;$/;"	m	struct:me_hfs2	typeref:typename:u32:2
reserved3	board/esd/vme8349/caddy.h	/^	uint32_t reserved3;$/;"	m	struct:caddy_interface	typeref:typename:uint32_t
reserved3	drivers/mmc/fsl_esdhc.c	/^	char    reserved3[84];$/;"	m	struct:fsl_esdhc	typeref:typename:char[84]	file:
reserved3	drivers/mmc/sh_mmcif.h	/^	unsigned long reserved3[11];$/;"	m	struct:sh_mmcif_regs	typeref:typename:unsigned long[11]
reserved3	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 reserved3[16];	\/* 0x440-0x47C Reserved *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32[16]
reserved3	drivers/mtd/nand/mxc_nand.h	/^	u16 reserved3[2];$/;"	m	struct:mxc_nand_regs	typeref:typename:u16[2]
reserved3	drivers/net/altera_tse.h	/^	u32 reserved3[0x38];$/;"	m	struct:alt_tse_mac	typeref:typename:u32[0x38]
reserved3	drivers/net/lpc32xx_eth.c	/^	u32 reserved3[10];$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32[10]	file:
reserved3	drivers/net/mvneta.c	/^	u16  reserved3;		\/* prefetch_cmd, for future use		*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u16	file:
reserved3	drivers/net/mvneta.c	/^	u32  reserved3[4];	\/* Reserved - (for future use)		*\/$/;"	m	struct:mvneta_tx_desc	typeref:typename:u32[4]	file:
reserved3	drivers/net/mvpp2.c	/^	u16 reserved3;		\/* csum_l4 (for future use, PnC)	*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u16	file:
reserved3	drivers/net/xilinx_axi_emac.c	/^	u32 reserved3;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
reserved3	drivers/net/xilinx_axi_emac.c	/^	u32 reserved3[251];$/;"	m	struct:axi_regs	typeref:typename:u32[251]	file:
reserved3	drivers/net/xilinx_emaclite.c	/^	u32 reserved3; \/* 0xff8 *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
reserved3	drivers/net/zynq_gem.c	/^	u32 reserved3;$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
reserved3	drivers/usb/host/ohci-lpc32xx.c	/^	u32 reserved3[824];$/;"	m	struct:otg_regs	typeref:typename:u32[824]	file:
reserved3	drivers/usb/musb/am35x.h	/^	u32	reserved3[2];$/;"	m	struct:am35x_usb_regs	typeref:typename:u32[2]
reserved3	drivers/usb/musb/blackfin_usb.h	/^	u32	reserved3[16];$/;"	m	struct:musb_regs	typeref:typename:u32[16]
reserved3	drivers/usb/musb/musb_core.h	/^	u8	reserved3;$/;"	m	struct:musb_regs	typeref:typename:u8
reserved3	include/faraday/ftpmu010.h	/^	unsigned int	reserved3;	\/* 0x98 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
reserved3	include/fsl-mc/fsl_mc.h	/^	u32 reserved3;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reserved3	include/fsl_sfp.h	/^	u32 reserved3[8];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[8]
reserved3	include/linux/edd.h	/^			__u32 reserved3;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0908	typeref:typename:__u32
reserved3	include/linux/edd.h	/^			__u32 reserved3;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08	typeref:typename:__u32
reserved3	include/linux/edd.h	/^			__u32 reserved3;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1108	typeref:typename:__u32
reserved3	include/linux/edd.h	/^	__u16 reserved3;$/;"	m	struct:edd_device_params	typeref:typename:__u16
reserved3	include/linux/mtd/nand.h	/^	u8 reserved3[13];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[13]
reserved3	include/linux/mtd/nand.h	/^	u8 reserved3[38];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[38]
reserved3	include/linux/usb/dwc3.h	/^	u32 reserved3[28];$/;"	m	struct:dwc3	typeref:typename:u32[28]
reserved3	include/mpc5xxx.h	/^	volatile u8	reserved3[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved3	include/mpc5xxx.h	/^	volatile u8 reserved3[3];	\/* GPIO + 0x21 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved3	include/mpc5xxx.h	/^	volatile u8 reserved3[3];	\/* WU_GPIO + 0x09 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved3	include/mpc5xxx.h	/^	volatile u8 reserved3[3];$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8[3]
reserved3	include/sh_tmu.h	/^	u16	reserved3;$/;"	m	struct:tmu_regs	typeref:typename:u16
reserved3	include/sh_tmu.h	/^	u16 reserved3;$/;"	m	struct:tmu_regs	typeref:typename:u16
reserved3	include/vsc9953.h	/^	u32	reserved3[21];$/;"	m	struct:vsc9953_analyzer	typeref:typename:u32[21]
reserved3	tools/kwbimage.h	/^	uint8_t  reserved3;             \/* 18 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
reserved30	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved30[0x1f];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x1f]
reserved30	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved30[3];	\/* 0x2b4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved30	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved30[13];		\/* 90h ~ c0h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[13]
reserved30	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved30[13];		\/* 90h ~ c0h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[13]
reserved30	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved30[3];	\/* 0x2b4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved30	include/mpc5xxx.h	/^	volatile u16	reserved30;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved31	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved31[0x1df];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x1df]
reserved31	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved31;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved31	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved31;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved31	include/mpc5xxx.h	/^	volatile u16	reserved31;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved31_12	drivers/usb/dwc3/core.h	/^	u32	reserved31_12:20;$/;"	m	struct:dwc3_event_gevt	typeref:typename:u32:20
reserved31_25	drivers/usb/dwc3/core.h	/^	u32	reserved31_25:7;$/;"	m	struct:dwc3_event_devt	typeref:typename:u32:7
reserved32	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved32[4];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[4]
reserved32	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved32[0x31ff-0x3104];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved32	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved32;		\/* 0x2d4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved32	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved32[5];		\/* c8h ~ d8h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[5]
reserved32	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved32[5];		\/* c8h ~ d8h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[5]
reserved32	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved32;		\/* 0x2d4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved33	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved33[0x1cc];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x1cc]
reserved34	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved34;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved4;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
reserved4	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved4;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
reserved4	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 reserved4;$/;"	m	struct:clk_pm_regs	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved4[31];$/;"	m	struct:emc_regs	typeref:typename:u32[31]
reserved4	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 reserved4;$/;"	m	struct:mux_regs	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	reserved4[88];$/;"	m	struct:rdc_regs	typeref:typename:u32[88]
reserved4	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved4[0x5f8];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x5f8]
reserved4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	reserved4[138];$/;"	m	struct:rdc_regs	typeref:typename:u32[138]
reserved4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	reserved4[2];$/;"	m	struct:src	typeref:typename:u32[2]
reserved4	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved4[4];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[4]
reserved4	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved4[6];$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t[6]
reserved4	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved4[7];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[7]
reserved4	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	unsigned int reserved4[0x23];$/;"	m	struct:rk3036_cru	typeref:typename:unsigned int[0x23]
reserved4	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	u32 reserved4;$/;"	m	struct:rk3288_cru	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved4[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
reserved4	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved4[2];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[2]
reserved4	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved4[3];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[3]
reserved4	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved4[4];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[4]
reserved4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved4;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved4[(0x100-0x90)\/4];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[]
reserved4	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved4;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved4;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved4[7];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[7]
reserved4	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved4[0xfff-0x808];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved4	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved4[3];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[3]
reserved4	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved4;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved4;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved4	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved4[0x14];     \/* 0x88 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x14]
reserved4	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved4[0xe6];$/;"	m	struct:dc_ctlr	typeref:typename:uint[0xe6]
reserved4	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved4[7];		\/* reserved_4[7] *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint[7]
reserved4	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved4[2];$/;"	m	struct:usb_ctlr	typeref:typename:uint[2]
reserved4	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved4[3];	\/* 0xF0-0xF8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved4	arch/arm/include/asm/arch-tegra114/mc.h	/^	u32 reserved4[338];			\/* offset 0x100 - 0x644 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[338]
reserved4	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved4[3];	\/* 0xF0-0xF8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved4	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved4[6];			\/* offset 0x7C - 0x8C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[6]
reserved4	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 reserved4[40];			\/* offset 0x60 - 0xFC *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[40]
reserved4	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved4[3];	\/* 0xF0-0xF8: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved4	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved4[6];			\/* offset 0x7C - 0x8C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[6]
reserved4	arch/arm/include/asm/arch-tegra30/mc.h	/^	u32 reserved4[338];			\/* offset 0x100 - 0x644 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[338]
reserved4	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved4[4];$/;"	m	struct:crlapb_regs	typeref:typename:u32[4]
reserved4	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved4;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved4	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved4;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved4	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved4[0x14];     \/* 0x88 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x14]
reserved4	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved4;$/;"	m	struct:at91_port	typeref:typename:u32
reserved4	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved4[4];$/;"	m	struct:at91_pmc	typeref:typename:u32[4]
reserved4	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 reserved4[4];	\/* 0x18 ~ 0x24 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32[4]
reserved4	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved4;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved4	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int reserved4;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
reserved4	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 reserved4:3;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:3	file:
reserved4	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved4[116];$/;"	m	struct:slcr_regs	typeref:typename:u32[116]
reserved4	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t reserved4[2];			\/* not currently implemented *\/$/;"	m	struct:paace	typeref:typename:uint32_t[2]
reserved4	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved4[2];$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int[2]
reserved4	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved4[6];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[6]
reserved4	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved4[4];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[4]
reserved4	drivers/mmc/fsl_esdhc.c	/^	char	reserved4[48];$/;"	m	struct:fsl_esdhc	typeref:typename:char[48]	file:
reserved4	drivers/mtd/nand/mxc_nand.h	/^	u16 reserved4;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
reserved4	drivers/net/lpc32xx_eth.c	/^	u32 reserved4[3];$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32[3]	file:
reserved4	drivers/net/mvneta.c	/^	u16  reserved4;		\/* csum_l4 - (for future use, PnC)	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u16	file:
reserved4	drivers/net/mvpp2.c	/^	u8  reserved4;		\/* bm_qset (for future use, BM)		*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u8	file:
reserved4	drivers/net/xilinx_axi_emac.c	/^	u32 reserved4;$/;"	m	struct:axi_regs	typeref:typename:u32	file:
reserved4	drivers/net/xilinx_axi_emac.c	/^	u32 reserved4;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
reserved4	drivers/net/xilinx_emaclite.c	/^	u32 reserved4[510];$/;"	m	struct:emaclite_regs	typeref:typename:u32[510]	file:
reserved4	drivers/net/zynq_gem.c	/^	u32 reserved4[18];$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[18]	file:
reserved4	drivers/usb/musb/musb_core.h	/^	u16	reserved4;$/;"	m	struct:musb_ep0_regs	typeref:typename:u16
reserved4	include/faraday/ftpmu010.h	/^	unsigned int	reserved4;	\/* 0xC4 *\/$/;"	m	struct:ftpmu010	typeref:typename:unsigned int
reserved4	include/fsl-mc/fsl_mc.h	/^	u32 reserved4[0x2f1];$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32[0x2f1]
reserved4	include/fsl_sfp.h	/^	u8 reserved4[0x08];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x08]
reserved4	include/fsl_sfp.h	/^	u8 reserved4[0x4];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x4]
reserved4	include/linux/edd.h	/^			__u64 reserved4;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0908	typeref:typename:__u64
reserved4	include/linux/edd.h	/^			__u64 reserved4;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0a08	typeref:typename:__u64
reserved4	include/linux/edd.h	/^			__u64 reserved4;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1108	typeref:typename:__u64
reserved4	include/linux/edd.h	/^	__u8 reserved4;$/;"	m	struct:edd_device_params	typeref:typename:__u8
reserved4	include/linux/mtd/nand.h	/^	u8 reserved4[36];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[36]
reserved4	include/linux/mtd/nand.h	/^	u8 reserved4[8];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[8]
reserved4	include/linux/usb/dwc3.h	/^	u32 reserved4[11];$/;"	m	struct:dwc3	typeref:typename:u32[11]
reserved4	include/mpc5xxx.h	/^	volatile u16	reserved4;$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
reserved4	include/mpc5xxx.h	/^	volatile u8 reserved4[2];$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8[2]
reserved4	include/mpc5xxx.h	/^	volatile u8 reserved4[3];	\/* GPIO + 0x25 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved4	include/mpc5xxx.h	/^	volatile u8 reserved4[3];	\/* WU_GPIO + 0x0d *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved4	include/sh_tmu.h	/^	u16	reserved4;$/;"	m	struct:tmu_regs	typeref:typename:u16
reserved4	include/sh_tmu.h	/^	u16 reserved4;$/;"	m	struct:tmu_regs	typeref:typename:u16
reserved4	include/vsc9953.h	/^	u32	reserved4[549];$/;"	m	struct:vsc9953_analyzer	typeref:typename:u32[549]
reserved4	tools/kwbimage.h	/^	uint8_t  reserved4;             \/* 1B *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
reserved46	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved46[4];		\/* 110h ~ 11ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[4]
reserved46	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved46[4];		\/* 110h ~ 11ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[4]
reserved4_2	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved4_2[4];$/;"	m	struct:usb_ctlr	typeref:typename:uint[4]
reserved5	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved5;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
reserved5	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved5[8];$/;"	m	struct:syscon_regs	typeref:typename:uint32_t[8]
reserved5	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved5[6];$/;"	m	struct:emc_regs	typeref:typename:u32[6]
reserved5	arch/arm/include/asm/arch-lpc32xx/mux.h	/^	u32 reserved5;$/;"	m	struct:mux_regs	typeref:typename:u32
reserved5	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved5[0x7f7];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x7f7]
reserved5	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 reserved5[985];$/;"	m	struct:src	typeref:typename:u32[985]
reserved5	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved5[12];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[12]
reserved5	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved5;$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
reserved5	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved5[7];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[7]
reserved5	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved5[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
reserved5	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved5[2];$/;"	m	struct:rk3399_pmucru	typeref:typename:u32[2]
reserved5	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved5[14];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[14]
reserved5	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved5;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
reserved5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved5;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved5[(0x120-0x108)\/4];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[]
reserved5	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved5[0x6e5];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x6e5]
reserved5	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved5[0xfaf];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0xfaf]
reserved5	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved5[5];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[5]
reserved5	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved5[47];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[47]
reserved5	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved5;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved5	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved5[3];	\/* 0x2c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved5	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved5[0xe0];	\/* 0xa0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0xe0]
reserved5	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved5[2];		\/* reserved_0[2] *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint[2]
reserved5	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved5;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved5	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved5[3];	\/* 0x104-0x10C: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved5	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved5[3];	\/* 0x104-0x10C: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved5	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved5[74];			\/* offset 0x100 - 0x224 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[74]
reserved5	arch/arm/include/asm/arch-tegra20/mc.h	/^	u32 reserved5[93];			\/* offset 0x100 - 0x270 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[93]
reserved5	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved5[3];	\/* 0x104-0x10C: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[3]
reserved5	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved5[74];			\/* offset 0x100 - 0x224 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[74]
reserved5	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 reserved5[21];$/;"	m	struct:crlapb_regs	typeref:typename:u32[21]
reserved5	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved5;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved5	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved5[3];	\/* 0x2c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[3]
reserved5	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved5[0xe0];	\/* 0xa0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0xe0]
reserved5	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved5[2];$/;"	m	struct:at91_port	typeref:typename:u32[2]
reserved5	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved5[9];	\/*  *\/$/;"	m	struct:at91_port	typeref:typename:u32[9]
reserved5	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved5[24];$/;"	m	struct:at91_pmc	typeref:typename:u32[24]
reserved5	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 reserved5[5];	\/* 0x2c ~ 0x3c *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32[5]
reserved5	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved5;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved5	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved5[7];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[7]
reserved5	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved5[944];$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int[944]
reserved5	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved5[2];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[2]
reserved5	drivers/mmc/fsl_esdhc.c	/^	char    reserved5[4];	\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[4]	file:
reserved5	drivers/net/lpc32xx_eth.c	/^	u32 reserved5[34];$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32[34]	file:
reserved5	drivers/net/mvneta.c	/^	u32  reserved5;		\/* pnc_extra PnC (for future use, PnC)	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u32	file:
reserved5	drivers/net/mvpp2.c	/^	u8  reserved5;$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u8	file:
reserved5	drivers/net/xilinx_axi_emac.c	/^	u32 reserved5;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
reserved5	drivers/net/xilinx_axi_emac.c	/^	u32 reserved5[59];$/;"	m	struct:axi_regs	typeref:typename:u32[59]	file:
reserved5	drivers/net/xilinx_emaclite.c	/^	u32 reserved5[510];$/;"	m	struct:emaclite_regs	typeref:typename:u32[510]	file:
reserved5	drivers/usb/musb/musb_core.h	/^	u16	reserved5;$/;"	m	struct:musb_ep0_regs	typeref:typename:u16
reserved5	include/fsl-mc/fsl_mc.h	/^	u32 reserved5;$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32
reserved5	include/fsl_sfp.h	/^	u8 reserved5[0x04];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x04]
reserved5	include/linux/mtd/nand.h	/^	u8 reserved5[29];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[29]
reserved5	include/linux/usb/dwc3.h	/^	u32 reserved5[51];$/;"	m	struct:dwc3	typeref:typename:u32[51]
reserved5	include/mpc5xxx.h	/^	volatile u8	reserved5[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved5	include/mpc5xxx.h	/^	volatile u8 reserved5[3];	\/* GPIO + 0x29 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved5	include/mpc5xxx.h	/^	volatile u8 reserved5[3];	\/* WU_GPIO + 0x11 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved5	include/sh_tmu.h	/^	u16 reserved5;$/;"	m	struct:tmu_regs	typeref:typename:u16
reserved5	include/vsc9953.h	/^	u32	reserved5[196];$/;"	m	struct:vsc9953_analyzer	typeref:typename:u32[196]
reserved5	tools/kwbimage.h	/^	uint16_t reserved5;             \/* 1C-1D *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint16_t
reserved50	include/ata.h	/^	unsigned short	reserved50;	\/* reserved (word 50) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
reserved5_1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved5_1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved5_1	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved5_1[63];$/;"	m	struct:slcr_regs	typeref:typename:u32[63]
reserved5_2	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved5_2[51];$/;"	m	struct:slcr_regs	typeref:typename:u32[51]
reserved6	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t reserved6;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
reserved6	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved6[54];$/;"	m	struct:emc_regs	typeref:typename:u32[54]
reserved6	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved6[5];$/;"	m	struct:hdmi_regs	typeref:typename:u8[5]
reserved6	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved6[64];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[64]
reserved6	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved6;$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
reserved6	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved6[7];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[7]
reserved6	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved6[0x0a];$/;"	m	struct:rk3399_cru	typeref:typename:u32[0x0a]
reserved6	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved6[28];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[28]
reserved6	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved6;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
reserved6	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved6;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved6	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved6;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
reserved6	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved6[0x37];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[0x37]
reserved6	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved6[0x3e];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x3e]
reserved6	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved6;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved6	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved6[2];	\/* 0x3c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved6	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved6[0x278];	\/* 0x188 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x278]
reserved6	arch/arm/include/asm/arch-tegra/dc.h	/^	uint reserved6;			\/* reserved_6 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
reserved6	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved6;   \/* is this port_sc1 on some controllers? *\/$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved6	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved6;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved6	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved6;	\/* 0x128: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
reserved6	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 reserved6[2];		\/* 18h, 1ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[2]
reserved6	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved6;	\/* 0x128: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
reserved6	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved6[2];                       \/* offset 0x248 - 0x24C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[2]
reserved6	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 reserved6[2];		\/* 18h, 1ch *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32[2]
reserved6	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved6;	\/* 0x128: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
reserved6	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved6[2];                       \/* offset 0x248 - 0x24C *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[2]
reserved6	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved6;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved6	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved6[2];	\/* 0x3c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved6	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved6[0x278];	\/* 0x188 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x278]
reserved6	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved6;	\/*  *\/$/;"	m	struct:at91_port	typeref:typename:u32
reserved6	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved6[85];$/;"	m	struct:at91_port	typeref:typename:u32[85]
reserved6	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	reserved6[5];$/;"	m	struct:at91_pmc	typeref:typename:u32[5]
reserved6	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 reserved6[2];	\/* 0x44 ~ 0x48 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32[2]
reserved6	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved6;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved6	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved6[6];$/;"	m	struct:slcr_regs	typeref:typename:u32[6]
reserved6	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved6[94];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[94]
reserved6	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved6;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
reserved6	drivers/mmc/fsl_esdhc.c	/^	char    reserved6[4];	\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[4]	file:
reserved6	drivers/net/lpc32xx_eth.c	/^	u32 reserved6;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
reserved6	drivers/net/mvneta.c	/^	u32  reserved6;		\/* hw_cmd (for future use, PnC and HWF)	*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u32	file:
reserved6	drivers/net/mvpp2.c	/^	u16 reserved6;		\/* classify_info (for future use, PnC)	*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u16	file:
reserved6	drivers/net/xilinx_axi_emac.c	/^	u32 reserved6;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
reserved6	drivers/net/xilinx_axi_emac.c	/^	u32 reserved6[124];$/;"	m	struct:axi_regs	typeref:typename:u32[124]	file:
reserved6	drivers/net/zynq_gem.c	/^	u32 reserved6[18];$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[18]	file:
reserved6	drivers/usb/musb/musb_core.h	/^	u16	reserved6;$/;"	m	struct:musb_ep0_regs	typeref:typename:u16
reserved6	include/fsl-mc/fsl_mc.h	/^	u32 reserved6[0x80];$/;"	m	struct:mc_ccsr_registers	typeref:typename:u32[0x80]
reserved6	include/linux/mtd/nand.h	/^	u8 reserved6[148];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[148]
reserved6	include/linux/usb/dwc3.h	/^	u32 reserved6[2];$/;"	m	struct:dwc3	typeref:typename:u32[2]
reserved6	include/mpc5xxx.h	/^	volatile u8	reserved6[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved6	include/mpc5xxx.h	/^	volatile u8 reserved6[3];	\/* GPIO + 0x2d *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved6	include/mpc5xxx.h	/^	volatile u8 reserved6[3];	\/* WU_GPIO + 0x15 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved7	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 reserved7[96];$/;"	m	struct:emc_regs	typeref:typename:u32[96]
reserved7	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved7[0xb];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0xb]
reserved7	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved7;$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
reserved7	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved7[31];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[31]
reserved7	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved7[0x14];$/;"	m	struct:rk3399_cru	typeref:typename:u32[0x14]
reserved7	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved7[2];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved7[5];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[5]
reserved7	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved7;$/;"	m	struct:rk3288_grf	typeref:typename:u32
reserved7	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved7;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
reserved7	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved7[0x17];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x17]
reserved7	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved7[2];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved7[0x2fff-0x102a];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved7	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved7[2];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 reserved7;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved7	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved7[2];	\/* 0x70 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved7[0x08];	\/* 0x408 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x08]
reserved7	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved7;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved7	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved7[3];$/;"	m	struct:usb_ctlr	typeref:typename:uint[3]
reserved7	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved7[2];	\/* 0x130 - 0x134: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved7[2];	\/* 0x130 - 0x134: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved7[2];                       \/* offset 0x25C - 0x260 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved7[2];	\/* 0x130 - 0x134: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved7[2];                       \/* offset 0x25C - 0x260 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 reserved7;$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved7	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved7[2];	\/* 0x70 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32[2]
reserved7	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved7[0x08];	\/* 0x408 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x08]
reserved7	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved7;	\/*  *\/$/;"	m	struct:at91_port	typeref:typename:u32
reserved7	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved7;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved7	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved7[56];$/;"	m	struct:slcr_regs	typeref:typename:u32[56]
reserved7	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved7;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
reserved7	drivers/mmc/fsl_esdhc.c	/^	char    reserved7[4];	\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[4]	file:
reserved7	drivers/net/lpc32xx_eth.c	/^	u32 reserved7[882];$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32[882]	file:
reserved7	drivers/net/mvpp2.c	/^	u32 reserved7;		\/* flow_id (for future use, PnC) *\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u32	file:
reserved7	drivers/net/zynq_gem.c	/^	u32 reserved7[143];$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[143]	file:
reserved7	drivers/usb/musb/musb_core.h	/^	u8	reserved7;$/;"	m	struct:musb_ep0_regs	typeref:typename:u8
reserved7	include/linux/mtd/nand.h	/^	u8 reserved7[88];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[88]
reserved7	include/linux/usb/dwc3.h	/^	u32 reserved7[55];$/;"	m	struct:dwc3	typeref:typename:u32[55]
reserved7	include/mpc5xxx.h	/^	volatile u8	reserved7[14];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[14]
reserved7	include/mpc5xxx.h	/^	volatile u8 reserved7[2];	\/* WU_GPIO + 0x1a *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[2]
reserved7	include/mpc5xxx.h	/^	volatile u8 reserved7[3];	\/* GPIO + 0x31 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved8	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved8[0x10];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x10]
reserved8	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved8;$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t
reserved8	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved8[31];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[31]
reserved8	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved8[0x1d];$/;"	m	struct:rk3399_cru	typeref:typename:u32[0x1d]
reserved8	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved8[2];$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32[2]
reserved8	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved8[4];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[4]
reserved8	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved8[30];$/;"	m	struct:rk3288_grf	typeref:typename:u32[30]
reserved8	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved8;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
reserved8	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved8[0x1f];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x1f]
reserved8	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved8[2];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[2]
reserved8	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved8[0x301f-0x3007];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved8	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved8[2];$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32[2]
reserved8	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved8;		\/* 0x7c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved8	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved8[0x08];	\/* 0x420 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x08]
reserved8	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved8[6];$/;"	m	struct:usb_ctlr	typeref:typename:uint[6]
reserved8	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	reserved8[22];	\/* 0x13C - 0x190: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[22]
reserved8	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	reserved8[22];	\/* 0x13C - 0x190: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[22]
reserved8	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved8[1];                       \/* offset 0x278 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[1]
reserved8	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	reserved8[22];	\/* 0x13C - 0x190: *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32[22]
reserved8	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved8[1];                       \/* offset 0x278 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[1]
reserved8	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved8;		\/* 0x7c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved8	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved8[0x08];	\/* 0x420 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x08]
reserved8	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved8;	\/* *\/$/;"	m	struct:at91_port	typeref:typename:u32
reserved8	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved8;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved8	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved8[74];$/;"	m	struct:slcr_regs	typeref:typename:u32[74]
reserved8	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved8[8];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[8]
reserved8	drivers/mmc/fsl_esdhc.c	/^	char    reserved8[8];	\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[8]	file:
reserved8	drivers/net/lpc32xx_eth.c	/^	u32 reserved8;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
reserved8	drivers/net/mvpp2.c	/^	u32 reserved8;$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u32	file:
reserved8	drivers/net/zynq_gem.c	/^	u32 reserved8[15];$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[15]	file:
reserved8	drivers/usb/musb/musb_core.h	/^	u8	reserved8;$/;"	m	struct:musb_ep0_regs	typeref:typename:u8
reserved8	include/fsl_sfp.h	/^	u8 reserved8[0x8];$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u8[0x8]
reserved8	include/linux/usb/dwc3.h	/^	u32 reserved8[128];$/;"	m	struct:dwc3	typeref:typename:u32[128]
reserved8	include/mpc5xxx.h	/^	volatile u16 reserved8;		\/* GPIO + 0x36 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u16
reserved8	include/mpc5xxx.h	/^	volatile u8	reserved8[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved8	include/mpc5xxx.h	/^	volatile u8 reserved8[3];	\/* WU_GPIO + 0x1d *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved8_31	drivers/usb/dwc3/core.h	/^	u32	reserved8_31:24;$/;"	m	struct:dwc3_event_type	typeref:typename:u32:24
reserved8_addr	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 reserved8_addr;	\/*0xd04*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
reserved9	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 reserved9[0x4];$/;"	m	struct:hdmi_regs	typeref:typename:u8[0x4]
reserved9	arch/arm/include/asm/arch-mxs/regs-usb.h	/^	uint32_t		reserved9[7];$/;"	m	struct:mxs_usb_regs	typeref:typename:uint32_t[7]
reserved9	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	reserved9[127];$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[127]
reserved9	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 reserved9[0x2b];$/;"	m	struct:rk3399_cru	typeref:typename:u32[0x2b]
reserved9	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 reserved9;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
reserved9	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int reserved9;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
reserved9	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 reserved9[2];$/;"	m	struct:rk3288_grf	typeref:typename:u32[2]
reserved9	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved9[0x0e];$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32[0x0e]
reserved9	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved9[0x11];$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32[0x11]
reserved9	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 reserved9[6];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[6]
reserved9	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 reserved9[0x30ff-0x3032];$/;"	m	struct:rk3288_hdmi	typeref:typename:u32[]
reserved9	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 reserved9;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
reserved9	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 reserved9;		\/* 0x84 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved9	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u8 reserved9[0x44];	\/* 0x440 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x44]
reserved9	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved9;$/;"	m	struct:usb_ctlr	typeref:typename:uint
reserved9	arch/arm/include/asm/arch-tegra/usb.h	/^	uint reserved9[8];$/;"	m	struct:usb_ctlr	typeref:typename:uint[8]
reserved9	arch/arm/include/asm/arch-tegra124/mc.h	/^	u32 reserved9[1];                       \/* offset 0x290 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[1]
reserved9	arch/arm/include/asm/arch-tegra210/mc.h	/^	u32 reserved9[1];                       \/* offset 0x290 *\/$/;"	m	struct:mc_ctlr	typeref:typename:u32[1]
reserved9	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 reserved9;		\/* 0x84 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
reserved9	arch/arm/include/asm/arch/clock_sun9i.h	/^	u8 reserved9[0x44];	\/* 0x440 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u8[0x44]
reserved9	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	reserved9;	\/* 0xCC *\/$/;"	m	struct:at91_port	typeref:typename:u32
reserved9	arch/arm/mach-bcm283x/include/mach/gpio.h	/^	u32 reserved9;$/;"	m	struct:bcm2835_gpio_regs	typeref:typename:u32
reserved9	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 reserved9[3];$/;"	m	struct:slcr_regs	typeref:typename:u32[3]
reserved9	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	reserved9[6];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[6]
reserved9	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 reserved9[3];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[3]
reserved9	drivers/mmc/fsl_esdhc.c	/^	char    reserved9[28];	\/* reserved *\/$/;"	m	struct:fsl_esdhc	typeref:typename:char[28]	file:
reserved9	drivers/net/lpc32xx_eth.c	/^	u32 reserved9;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
reserved9	drivers/net/zynq_gem.c	/^	u32 reserved9[20];$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[20]	file:
reserved9	drivers/usb/musb/musb_core.h	/^	u8	reserved9;$/;"	m	struct:musb_ep0_regs	typeref:typename:u8
reserved9	include/linux/usb/dwc3.h	/^	u32 reserved9[3];$/;"	m	struct:dwc3	typeref:typename:u32[3]
reserved9	include/mpc5xxx.h	/^	volatile u8	reserved9[3];$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8[3]
reserved9	include/mpc5xxx.h	/^	volatile u8 reserved9[3];	\/* GPIO + 0x39 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8[3]
reserved9	include/mpc5xxx.h	/^	volatile u8 reserved9[3];	\/* WU_GPIO + 0x21 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8[3]
reserved_0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reserved_0[4092];$/;"	m	struct:mxc_ccm_reg	typeref:typename:uint32_t[4092]
reserved_0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reserved_0[4];$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t[4]
reserved_0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_0[16];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[16]
reserved_0	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 reserved_0[2];		\/* 14: *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32[2]
reserved_0	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 reserved_0[2];		\/* 18: *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32[2]
reserved_0	arch/x86/include/asm/me_common.h	/^	u32 reserved_0:14;$/;"	m	struct:me_uma	typeref:typename:u32:14
reserved_0	drivers/usb/gadget/ci_udc.h	/^	unsigned reserved_0;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
reserved_0	drivers/usb/host/xhci.h	/^	volatile uint32_t reserved_0[2];$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t[2]
reserved_0	include/gdsys_fpga.h	/^	u16 reserved_0[10];	\/* 0x0008 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[10]
reserved_0	include/gdsys_fpga.h	/^	u16 reserved_0[1];	\/* 0x0008 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[1]
reserved_0	include/gdsys_fpga.h	/^	u16 reserved_0[5];	\/* 0x0008 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[5]
reserved_0	include/gdsys_fpga.h	/^	u16 reserved_0[8187];	\/* 0x0008 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[8187]
reserved_01	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_01;$/;"	m	struct:fec512x	typeref:typename:u32
reserved_02	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_02[3];$/;"	m	struct:fec512x	typeref:typename:u32[3]
reserved_03	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_03[6];$/;"	m	struct:fec512x	typeref:typename:u32[6]
reserved_04	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_04[7];$/;"	m	struct:fec512x	typeref:typename:u32[7]
reserved_05	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_05[7];$/;"	m	struct:fec512x	typeref:typename:u32[7]
reserved_06	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_06[14];$/;"	m	struct:fec512x	typeref:typename:u32[14]
reserved_07	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_07[7];$/;"	m	struct:fec512x	typeref:typename:u32[7]
reserved_08	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_08[10];$/;"	m	struct:fec512x	typeref:typename:u32[10]
reserved_09	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_09[7];$/;"	m	struct:fec512x	typeref:typename:u32[7]
reserved_0x000	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x000[4];$/;"	m	struct:anadig_reg	typeref:typename:u32[4]
reserved_0x00C	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x00C[61];$/;"	m	struct:src	typeref:typename:u32[61]
reserved_0x014	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x014[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x024	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x024[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x034	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x034[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x044	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x044[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x054	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x054[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x060	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x060[232];$/;"	m	struct:mscm_ir	typeref:typename:u32[232]
reserved_0x064	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x064[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x074	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x074[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x084	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x084[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x094	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x094[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x0A4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x0A4[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x0B4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x0B4[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x0C4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x0C4[7];$/;"	m	struct:anadig_reg	typeref:typename:u32[7]
reserved_0x0E4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x0E4[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x0F4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x0F4[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x104	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x104[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x114	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x114[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x11C	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x11C[1];$/;"	m	struct:src	typeref:typename:u32[1]
reserved_0x124	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x124[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x134	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x134[7];$/;"	m	struct:anadig_reg	typeref:typename:u32[7]
reserved_0x140	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x140[1];$/;"	m	struct:src	typeref:typename:u32[1]
reserved_0x154	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x154[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x164	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x164[63];$/;"	m	struct:anadig_reg	typeref:typename:u32[63]
reserved_0x16C	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x16C[5];$/;"	m	struct:src	typeref:typename:u32[5]
reserved_0x18C	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x18C[4];$/;"	m	struct:src	typeref:typename:u32[4]
reserved_0x264	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x264[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x274	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x274[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x284	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x284[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x294	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x294[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x2A4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x2A4[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x2B4	arch/arm/include/asm/arch-vf610/crm_regs.h	/^	u32 reserved_0x2B4[3];$/;"	m	struct:anadig_reg	typeref:typename:u32[3]
reserved_0x404	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x404[2];$/;"	m	struct:mscm_ir	typeref:typename:u32[2]
reserved_0x410	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x410[28];$/;"	m	struct:mscm_ir	typeref:typename:u32[28]
reserved_0x490	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x490[28];$/;"	m	struct:mscm_ir	typeref:typename:u32[28]
reserved_0x504	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x504[191];$/;"	m	struct:mscm_ir	typeref:typename:u32[191]
reserved_0x808	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x808[6];$/;"	m	struct:mscm_ir	typeref:typename:u32[6]
reserved_0x824	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x824[23];$/;"	m	struct:mscm_ir	typeref:typename:u32[23]
reserved_0x9e0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0x9e0[136];$/;"	m	struct:mscm_ir	typeref:typename:u32[136]
reserved_0xc04	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0xc04[63];$/;"	m	struct:mscm_ir	typeref:typename:u32[63]
reserved_0xd04	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0xd04[3];$/;"	m	struct:mscm_ir	typeref:typename:u32[3]
reserved_0xd20	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0xd20[8];$/;"	m	struct:mscm_ir	typeref:typename:u32[8]
reserved_0xd44	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 reserved_0xd44[3];$/;"	m	struct:mscm_ir	typeref:typename:u32[3]
reserved_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reserved_1[12];$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t[12]
reserved_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t reserved_1[3332];$/;"	m	struct:mxc_ccm_reg	typeref:typename:uint32_t[3332]
reserved_1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_1[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u8 reserved_1;$/;"	m	struct:bootrom_sw_info	typeref:typename:u8
reserved_1	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 reserved_1;		\/* 0x58 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
reserved_1	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 reserved_1[0x35];	\/* offset 0x2C-0xFC *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32[0x35]
reserved_1	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 reserved_1;$/;"	m	struct:gpt_regs	typeref:typename:u32
reserved_1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 reserved_1[2];		\/* 34: *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32[2]
reserved_1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 reserved_1[6];		\/* 28: *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32[6]
reserved_1	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 reserved_1:16;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:16
reserved_1	arch/x86/include/asm/me_common.h	/^	u32 reserved_1:10;$/;"	m	struct:me_uma	typeref:typename:u32:10
reserved_1	arch/x86/include/asm/me_common.h	/^	u32 reserved_1:2;$/;"	m	struct:me_gmes	typeref:typename:u32:2
reserved_1	arch/x86/include/asm/me_common.h	/^	u32 reserved_1:4;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:4
reserved_1	disk/part_amiga.h	/^    u32 reserved_1[2];$/;"	m	struct:partition_block	typeref:typename:u32[2]
reserved_1	disk/part_amiga.h	/^    u32 reserved_1[5];$/;"	m	struct:rigid_disk_block	typeref:typename:u32[5]
reserved_1	drivers/net/designware.h	/^	u8 reserved_1[20];$/;"	m	struct:eth_mac_regs	typeref:typename:u8[20]
reserved_1	drivers/usb/gadget/ci_udc.h	/^	unsigned reserved_1;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
reserved_1	drivers/usb/host/xhci.h	/^	volatile uint32_t reserved_1[4];$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t[4]
reserved_1	include/gdsys_fpga.h	/^	u16 reserved_1[29];	\/* 0x001e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[29]
reserved_1	include/gdsys_fpga.h	/^	u16 reserved_1[2];	\/* 0x000c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[2]
reserved_1	include/gdsys_fpga.h	/^	u16 reserved_1[3];	\/* 0x000c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[3]
reserved_1	include/gdsys_fpga.h	/^	u16 reserved_1[4];	\/* 0x000c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[4]
reserved_1	include/gdsys_fpga.h	/^	u16 reserved_1[502];	\/* 0x0014 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[502]
reserved_1	include/gdsys_fpga.h	/^	u16 reserved_1[8181];	\/* 0x0014 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[8181]
reserved_1	include/linux/mtd/fsmc_nand.h	/^	u8 reserved_1[0x40 - 0x04];$/;"	m	struct:fsmc_regs	typeref:typename:u8[]
reserved_1	include/pci_rom.h	/^	uint16_t reserved_1;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
reserved_1	include/usb/designware_udc.h	/^	u32 reserved_1;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
reserved_10	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_10[124];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[124]
reserved_10	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_10;$/;"	m	struct:fec512x	typeref:typename:u32
reserved_11	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_11[128];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[128]
reserved_11	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_11[11];$/;"	m	struct:fec512x	typeref:typename:u32[11]
reserved_12	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_12[112];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[112]
reserved_12	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_12[26];$/;"	m	struct:fec512x	typeref:typename:u32[26]
reserved_13	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_13[252];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[252]
reserved_13	arch/powerpc/include/asm/immap_512x.h	/^	u32	reserved_13[2];$/;"	m	struct:fec512x	typeref:typename:u32[2]
reserved_14	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_14[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_15	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_15[748];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[748]
reserved_2	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_2[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u8 reserved_2;$/;"	m	struct:bootrom_sw_info	typeref:typename:u8
reserved_2	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 reserved_2[4];	\/* 0xB0--0xBC *\/$/;"	m	struct:misc_regs	typeref:typename:u32[4]
reserved_2	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 reserved_2[0x33];	\/* offset 0x134-0x1FC *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32[0x33]
reserved_2	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 reserved_2[3];	\/* offset 0x18--0x20*\/$/;"	m	struct:gpt_regs	typeref:typename:u32[3]
reserved_2	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 reserved_2[2];		\/* 54: *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32[2]
reserved_2	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 reserved_2[4];		\/* 40: *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32[4]
reserved_2	arch/x86/include/asm/me_common.h	/^	u32 reserved_2:4;$/;"	m	struct:me_gmes	typeref:typename:u32:4
reserved_2	disk/part_amiga.h	/^    u32 reserved_2[15];$/;"	m	struct:partition_block	typeref:typename:u32[15]
reserved_2	disk/part_amiga.h	/^    u32 reserved_2[3];$/;"	m	struct:rigid_disk_block	typeref:typename:u32[3]
reserved_2	drivers/usb/gadget/ci_udc.h	/^	unsigned reserved_2;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
reserved_2	drivers/usb/host/xhci.h	/^	volatile uint32_t reserved_2[241];$/;"	m	struct:xhci_hcor	typeref:typename:volatile uint32_t[241]
reserved_2	include/gdsys_fpga.h	/^	u16 reserved_2[2];	\/* 0x001c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[2]
reserved_2	include/gdsys_fpga.h	/^	u16 reserved_2[3];	\/* 0x005a *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[3]
reserved_2	include/gdsys_fpga.h	/^	u16 reserved_2[7487];	\/* 0x0580 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[7487]
reserved_2	include/linux/mtd/fsmc_nand.h	/^	u8 reserved_2[0xfe0 - 0x60];$/;"	m	struct:fsmc_regs	typeref:typename:u8[]
reserved_2	include/pci_rom.h	/^	uint16_t reserved_2;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
reserved_2	include/usb/designware_udc.h	/^	u32 reserved_2;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
reserved_3	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_3[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 reserved_3[3];$/;"	m	struct:bootrom_sw_info	typeref:typename:u32[3]
reserved_3	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 reserved_3[0x1FB8];	\/* 0x120--0x7FFC *\/$/;"	m	struct:misc_regs	typeref:typename:u32[0x1FB8]
reserved_3	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 reserved_3[0x39];	\/* offset 0x21C-0x2FC *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32[0x39]
reserved_3	disk/part_amiga.h	/^    u32 reserved_3[15];$/;"	m	struct:partition_block	typeref:typename:u32[15]
reserved_3	disk/part_amiga.h	/^    u32 reserved_3[5];$/;"	m	struct:rigid_disk_block	typeref:typename:u32[5]
reserved_3	drivers/usb/gadget/ci_udc.h	/^	unsigned reserved_3;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
reserved_3	drivers/usb/host/xhci.h	/^	volatile uint32_t reserved_3;$/;"	m	struct:xhci_hcor_port_regs	typeref:typename:volatile uint32_t
reserved_3	include/gdsys_fpga.h	/^	u16 reserved_3[2];	\/* 0x006c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[2]
reserved_3	include/gdsys_fpga.h	/^	u16 reserved_3[9];	\/* 0x002e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[9]
reserved_3	include/usb/designware_udc.h	/^	u32 reserved_3[0x39];$/;"	m	struct:udc_regs	typeref:typename:u32[0x39]
reserved_4	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_4[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_4	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 reserved_4[0x3e];	\/* offset 0x308-0x3FC *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32[0x3e]
reserved_4	arch/x86/include/asm/me_common.h	/^	u32 reserved_4:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
reserved_4	disk/part_amiga.h	/^    u32 reserved_4;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
reserved_4	drivers/usb/gadget/ci_udc.h	/^	unsigned reserved_4;$/;"	m	struct:ept_queue_head	typeref:typename:unsigned
reserved_4	drivers/usb/host/xhci.h	/^	uint32_t reserved_4[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS * 254];$/;"	m	struct:xhci_hcor	typeref:typename:uint32_t[]
reserved_4	include/gdsys_fpga.h	/^	u16 reserved_4[10];	\/* 0x004c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[10]
reserved_4	include/gdsys_fpga.h	/^	u16 reserved_4[194];	\/* 0x007c *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[194]
reserved_4	include/gdsys_fpga.h	/^	u16 reserved_4[62];	\/* 0x0054 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[62]
reserved_4	include/usb/designware_udc.h	/^	u32 reserved_4;		\/* offset 0x500 *\/$/;"	m	struct:udc_regs	typeref:typename:u32
reserved_5	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_5[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_5	arch/x86/include/asm/me_common.h	/^	u32 reserved_5:8;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:8
reserved_5	disk/part_amiga.h	/^    u32 reserved_5[10];$/;"	m	struct:rigid_disk_block	typeref:typename:u32[10]
reserved_5	include/gdsys_fpga.h	/^	u16 reserved_5[69];	\/* 0x0074 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[69]
reserved_5	include/gdsys_fpga.h	/^	u16 reserved_5[70];	\/* 0x0074 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[70]
reserved_5	include/gdsys_fpga.h	/^	u16 reserved_5[761];	\/* 0x020e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[761]
reserved_6	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_6[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_6	include/gdsys_fpga.h	/^	u16 reserved_6[57];	\/* 0x010e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[57]
reserved_6	include/gdsys_fpga.h	/^	u16 reserved_6[889];	\/* 0x010e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[889]
reserved_7	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_7[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_7	include/gdsys_fpga.h	/^	u16 reserved_7[9];	\/* 0x018e *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[9]
reserved_8	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_8[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_8	include/gdsys_fpga.h	/^	u16 reserved_8[1834];	\/* 0x01ac *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[1834]
reserved_9	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint8_t reserved_9[12];$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint8_t[12]
reserved_a	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_a;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_a	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_a;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_b	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_b;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_b	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_b;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_battmonitor	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_battmonitor[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_battmonitor	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_battmonitor[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_block_code	include/linux/mtd/bbm.h	/^	int reserved_block_code;$/;"	m	struct:nand_bbt_descr	typeref:typename:int
reserved_blocks	include/ext_common.h	/^	__le32 reserved_blocks;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
reserved_blocks_high	include/ext_common.h	/^	__le32 reserved_blocks_high;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
reserved_c	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_c;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_c	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_c;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_combo	common/cli_hush.c	/^struct reserved_combo {$/;"	s	file:
reserved_d	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_d;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_d	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_d;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_dcdc4p2	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_dcdc4p2[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_dcdc4p2	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_dcdc4p2[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_dclimits	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_dclimits[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_dclimits	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_dclimits[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_e	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_e;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_e	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_e;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_entropy	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_entropy[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_entropy_latched	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_entropy_latched[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_f	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_f;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_f	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_f;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_for_hc	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	u8		reserved_for_hc[116];$/;"	m	struct:ohci_hcca	typeref:typename:u8[116]
reserved_for_hc	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	u8		reserved_for_hc[116];$/;"	m	struct:ohci_hcca	typeref:typename:u8[116]
reserved_for_hc	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	u8 reserved_for_hc[116];$/;"	m	struct:ohci_hcca	typeref:typename:u8[116]
reserved_for_hc	drivers/usb/host/ohci-s3c24xx.h	/^	u8 reserved_for_hc[116];$/;"	m	struct:ohci_hcca	typeref:typename:u8[116]
reserved_for_hc	drivers/usb/host/ohci.h	/^	u8		reserved_for_hc[116];$/;"	m	struct:ohci_hcca	typeref:typename:u8[116]
reserved_g	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_g;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_g	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_g;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_gdt_blocks	include/ext_common.h	/^	__le16 reserved_gdt_blocks;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
reserved_h	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_h;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_h	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_h;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_hw_digctl_ahb_stats_select	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_ahb_stats_select[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_armcache	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_armcache[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_chipid	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_chipid[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_dbg	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_dbg[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_dbgrd	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_dbgrd[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_debug_trap_l0_addr_high	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_debug_trap_l0_addr_high[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_debug_trap_l0_addr_low	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_debug_trap_l0_addr_low[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_debug_trap_l3_addr_high	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_debug_trap_l3_addr_high[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_debug_trap_l3_addr_low	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_debug_trap_l3_addr_low[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_fsl	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_fsl[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l1_ahb_active_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l1_ahb_active_cycles[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l1_ahb_data_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l1_ahb_data_cycles[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l1_ahb_data_stalled	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l1_ahb_data_stalled[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l2_ahb_active_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l2_ahb_active_cycles[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l2_ahb_data_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l2_ahb_data_cycles[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l2_ahb_data_stalled	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l2_ahb_data_stalled[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l3_ahb_active_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l3_ahb_active_cycles[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l3_ahb_data_cycles	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l3_ahb_data_cycles[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_l3_ahb_data_stalled	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_l3_ahb_data_stalled[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte0_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte0_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte10_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte10_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte11_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte11_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte12_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte12_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte13_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte13_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte14_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte14_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte15_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte15_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte1_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte1_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte2_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte2_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte3_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte3_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte4_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte4_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte5_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte5_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte6_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte6_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte7_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte7_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte8_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte8_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_mpte9_loc	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_mpte9_loc[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_scratch0	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_scratch0[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_hw_digctl_scratch1	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_hw_digctl_scratch1[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_i	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_i;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_i	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_i;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_id	include/sh_pfc.h	/^	pinmux_enum_t reserved_id;$/;"	m	struct:pinmux_info	typeref:typename:pinmux_enum_t
reserved_j	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_j;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_j	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_j;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_k	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_k;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_k	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_k;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_l	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_l;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_l	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_l;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_list	common/cli_hush.c	/^static struct reserved_combo reserved_list[] = {$/;"	v	typeref:struct:reserved_combo[]	file:
reserved_m	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_m;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_m	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_m;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_mask_pos	arch/x86/include/asm/coreboot_tables.h	/^	u8 reserved_mask_pos;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
reserved_mask_pos	include/vbe.h	/^	u8 reserved_mask_pos;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
reserved_mask_size	arch/x86/include/asm/coreboot_tables.h	/^	u8 reserved_mask_size;$/;"	m	struct:cb_framebuffer	typeref:typename:u8
reserved_mask_size	include/vbe.h	/^	u8 reserved_mask_size;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
reserved_misc	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_misc[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_misc	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_misc[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_n	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_n;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_n	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_n;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_num	drivers/net/mvpp2.c	/^	int reserved_num;$/;"	m	struct:mvpp2_txq_pcpu	typeref:typename:int	file:
reserved_o	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_o;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_o	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_o;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_p	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_p;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_p	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_p;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_page	include/vbe.h	/^	u8 reserved_page;$/;"	m	struct:vesa_mode_info	typeref:typename:u8
reserved_pebs	drivers/mtd/ubi/ubi-media.h	/^	__be32  reserved_pebs;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__be32
reserved_pebs	drivers/mtd/ubi/ubi-media.h	/^	__be32 reserved_pebs;$/;"	m	struct:ubi_fm_eba	typeref:typename:__be32
reserved_pebs	drivers/mtd/ubi/ubi.h	/^	int reserved_pebs;$/;"	m	struct:ubi_volume	typeref:typename:int
reserved_pll0ctrl1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h	/^	uint32_t	reserved_pll0ctrl1[3];	\/* 0x14-0x1c *\/$/;"	m	struct:mxs_clkctrl_regs	typeref:typename:uint32_t[3]
reserved_pll0ctrl1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^	uint32_t	reserved_pll0ctrl1[3];	\/* 0x14-0x1c *\/$/;"	m	struct:mxs_clkctrl_regs	typeref:typename:uint32_t[3]
reserved_pll1ctrl1	arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h	/^	uint32_t	reserved_pll1ctrl1[3];	\/* 0x34-0x3c *\/$/;"	m	struct:mxs_clkctrl_regs	typeref:typename:uint32_t[3]
reserved_q	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_q;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_q	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_q;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_r	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_r;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_r	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_r;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_s	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_s;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_s	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_s;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_sts	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_sts[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_sts	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_sts[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_style	common/cli_hush.c	/^} reserved_style;$/;"	t	typeref:enum:__anon62a9299d0403	file:
reserved_t	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_t;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_t	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_t;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_u	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_u;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_u	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_u;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_v	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_v;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_v	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_v;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_vdda	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_vdda[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vdda	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_vdda[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vddd	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_vddd[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vddd	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_vddd[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vddio	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_vddio[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vddio	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_vddio[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vddmem	arch/arm/include/asm/arch-mxs/regs-power-mx23.h	/^	uint32_t	reserved_vddmem[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_vddmem	arch/arm/include/asm/arch-mxs/regs-power-mx28.h	/^	uint32_t	reserved_vddmem[3];$/;"	m	struct:mxs_power_regs	typeref:typename:uint32_t[3]
reserved_w	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_w;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_w	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_w;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_word	common/cli_hush.c	/^static int reserved_word(o_string *dest, struct p_context *ctx)$/;"	f	typeref:typename:int	file:
reserved_writeonce	arch/arm/include/asm/arch-mxs/regs-digctl.h	/^	uint32_t	reserved_writeonce[3];$/;"	m	struct:mxs_digctl_regs	typeref:typename:uint32_t[3]
reserved_x	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_x;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_x	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_x;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_y	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_y;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_y	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_y;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_z	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	reserved_z;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserved_z	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	reserved_z;$/;"	m	struct:gpio_regs	typeref:typename:unsigned char
reserver2	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int reserver2[(0xf4 - 0xac) \/ 4];$/;"	m	struct:rk_uart	typeref:typename:unsigned int[]
reserverd	board/nokia/rx51/tag_omap.h	/^	u8 reserverd;$/;"	m	struct:omap_wlan_cx3110x_config	typeref:typename:u8
reserverd1	drivers/net/mvneta.c	/^	u16  reserverd1;	\/* csum_l4 (for future use)		*\/$/;"	m	struct:mvneta_tx_desc	typeref:typename:u16	file:
reset	arch/arm/cpu/arm1136/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm1176/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm720t/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm920t/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm926ejs/mxs/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm926ejs/spear/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm926ejs/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/arm946es/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/armv7/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/armv7m/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/armv8/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/pxa/start.S	/^reset:$/;"	l
reset	arch/arm/cpu/sa1100/start.S	/^reset:$/;"	l
reset	arch/arm/dts/meson-gxbb.dtsi	/^			reset: reset-controller@4404 {$/;"	l	label:cbus
reset	arch/arm/include/asm/omap_musb.h	/^	void (*reset)(void);$/;"	m	struct:omap_musb_board_data	typeref:typename:void (*)(void)
reset	arch/mips/cpu/start.S	/^reset:$/;"	l
reset	arch/nds32/cpu/n1213/start.S	/^reset:$/;"	l
reset	arch/powerpc/include/asm/immap_512x.h	/^	reset512x_t		reset;		\/* Reset Module *\/$/;"	m	struct:immap	typeref:typename:reset512x_t
reset	arch/powerpc/include/asm/immap_83xx.h	/^	reset83xx_t		reset;		\/* Reset Module *\/$/;"	m	struct:immap	typeref:typename:reset83xx_t
reset	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	reset;$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short
reset	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	reset;$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short
reset	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	reset;$/;"	m	struct:usb0_phy_regs	typeref:typename:unsigned short
reset	arch/x86/include/asm/me_common.h	/^	u32 reset:1;$/;"	m	struct:mei_csr	typeref:typename:u32:1
reset	drivers/net/ne2000_base.h	/^	u8* reset;$/;"	m	struct:dp83902a_priv_data	typeref:typename:u8 *
reset	drivers/net/pch_gbe.h	/^	u32 reset;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
reset	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	reset:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
reset	include/efi_api.h	/^	void *reset;$/;"	m	struct:efi_simple_text_output_protocol	typeref:typename:void *
reset	include/linux/usb/gadget.h	/^	void			(*reset)(struct usb_gadget *);$/;"	m	struct:usb_gadget_driver	typeref:typename:void (*)(struct usb_gadget *)
reset	include/phy.h	/^	int (*reset)(struct mii_dev *bus);$/;"	m	struct:mii_dev	typeref:typename:int (*)(struct mii_dev * bus)
reset	include/remoteproc.h	/^	int (*reset)(struct udevice *dev);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev)
reset	include/rtc.h	/^	int (*reset)(struct udevice *dev);$/;"	m	struct:rtc_ops	typeref:typename:int (*)(struct udevice * dev)
reset	include/video_bridge.h	/^	struct gpio_desc reset;$/;"	m	struct:video_bridge_priv	typeref:struct:gpio_desc
reset512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct reset512x {$/;"	s
reset512x_t	arch/powerpc/include/asm/immap_512x.h	/^} reset512x_t;$/;"	t	typeref:struct:reset512x
reset83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct reset83xx {$/;"	s
reset83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} reset83xx_t;$/;"	t	typeref:struct:reset83xx
reset_4xx_watchdog	arch/powerpc/cpu/ppc4xx/cpu.c	/^void reset_4xx_watchdog(void)$/;"	f	typeref:typename:void
reset_5xx_watchdog	arch/powerpc/cpu/mpc5xx/cpu.c	/^void reset_5xx_watchdog (volatile immap_t * immr)$/;"	f	typeref:typename:void
reset_5xxx_watchdog	arch/powerpc/cpu/mpc5xxx/cpu.c	/^void reset_5xxx_watchdog(void)$/;"	f	typeref:typename:void
reset_8260_watchdog	include/mpc8260.h	/^reset_8260_watchdog(volatile immap_t *immr)$/;"	f	typeref:typename:void
reset_8568mds_uccs	board/freescale/mpc8568mds/bcsr.c	/^void reset_8568mds_uccs(void)$/;"	f	typeref:typename:void
reset_85xx_watchdog	arch/powerpc/cpu/mpc85xx/cpu.c	/^reset_85xx_watchdog(void)$/;"	f	typeref:typename:void
reset_8xx_watchdog	arch/powerpc/cpu/mpc8xx/cpu.c	/^void reset_8xx_watchdog (volatile immap_t * immr)$/;"	f	typeref:typename:void
reset_A9_cpu	arch/arm/mach-tegra/cpu.c	/^void reset_A9_cpu(int reset)$/;"	f	typeref:typename:void
reset_addr	arch/nios2/include/asm/global_data.h	/^	u32 reset_addr;$/;"	m	struct:arch_global_data	typeref:typename:u32
reset_afi	drivers/pci/pci_tegra.c	/^	struct reset_ctl reset_afi;$/;"	m	struct:tegra_pcie	typeref:struct:reset_ctl	file:
reset_all_endpoints	drivers/usb/gadget/atmel_usba_udc.c	/^static void reset_all_endpoints(struct usba_udc *udc)$/;"	f	typeref:typename:void	file:
reset_assert	drivers/reset/reset-uclass.c	/^int reset_assert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int
reset_assert	include/reset.h	/^static inline int reset_assert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int
reset_available	drivers/usb/gadget/dwc2_udc_otg.c	/^static int reset_available = 1;$/;"	v	typeref:typename:int	file:
reset_bank	drivers/mtd/nand/denali.c	/^static void reset_bank(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
reset_buf	drivers/mtd/nand/denali.c	/^static void reset_buf(struct denali_nand_info *denali)$/;"	f	typeref:typename:void	file:
reset_bus	drivers/i2c/i2c-uniphier-f.c	/^static int reset_bus(struct uniphier_fi2c_regs __iomem *regs)$/;"	f	typeref:typename:int	file:
reset_cause	arch/arm/imx-common/cpu.c	/^static u32 reset_cause = -1;$/;"	v	typeref:typename:u32	file:
reset_cfg	include/vsc9953.h	/^	u32	reset_cfg;$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32
reset_cmplx_set_enable	arch/arm/mach-tegra/clock.c	/^void reset_cmplx_set_enable(int cpu, int which, int reset)$/;"	f	typeref:typename:void
reset_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 reset_cntrl;		\/* MBAR_ETH + 0x1C4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
reset_config	drivers/usb/gadget/composite.c	/^static void reset_config(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:void	file:
reset_counter	drivers/net/dm9000x.c	/^	u32 reset_counter;	\/* counter: RESET *\/$/;"	m	struct:board_info	typeref:typename:u32	file:
reset_cpu	arch/arm/cpu/arm920t/ep93xx/cpu.c	/^extern void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm920t/imx/timer.c	/^void reset_cpu (ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm926ejs/armada100/timer.c	/^void reset_cpu (unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm926ejs/lpc32xx/cpu.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm926ejs/mx25/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm926ejs/mx27/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm926ejs/mxs/mxs.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm926ejs/omap/reset.S	/^reset_cpu:$/;"	l
reset_cpu	arch/arm/cpu/arm926ejs/spear/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/arm946es/cpu.c	/^__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7/bcm281xx/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7/bcmcygnus/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7/bcmnsp/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7/kona-common/reset.S	/^reset_cpu:$/;"	l
reset_cpu	arch/arm/cpu/armv7/ls102xa/cpu.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7/omap-common/reset.c	/^void __weak reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void __weak
reset_cpu	arch/arm/cpu/armv7/omap5/hwinit.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7/stv0991/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv7m/cpu.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/armv8/s32v234/generic.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/pxa/pxa2xx.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/cpu/sa1100/cpu.c	/^__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-at91/arm920t/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-at91/arm926ejs/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-at91/armv7/reset.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-bcm283x/reset.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-davinci/reset.c	/^void reset_cpu(unsigned long a)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-exynos/soc.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-keystone/init.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-kirkwood/cpu.c	/^void reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-meson/board.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-mvebu/armada3700/cpu.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-mvebu/armada8k/cpu.c	/^void reset_cpu(ulong ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-mvebu/cpu.c	/^void reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-orion5x/cpu.c	/^void reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-socfpga/reset_manager.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-sunxi/board.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/arm/mach-uniphier/reset.c	/^void __SECURE reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void __SECURE
reset_cpu	arch/arm/mach-versatile/reset.S	/^reset_cpu:$/;"	l
reset_cpu	arch/arm/mach-zynq/cpu.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/nds32/cpu/n1213/start.S	/^reset_cpu:$/;"	l
reset_cpu	arch/sh/cpu/sh2/watchdog.c	/^void reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/sh/cpu/sh3/watchdog.c	/^void reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/sh/cpu/sh4/watchdog.c	/^void reset_cpu(unsigned long ignored)$/;"	f	typeref:typename:void
reset_cpu	arch/x86/cpu/baytrail/valleyview.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/x86/cpu/cpu.c	/^__weak void reset_cpu(ulong addr)$/;"	f	typeref:typename:__weak void
reset_cpu	arch/x86/cpu/qemu/qemu.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	arch/x86/cpu/quark/quark.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/abilis/tb100/tb100.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/armltd/integrator/lowlevel_init.S	/^reset_cpu:$/;"	l
reset_cpu	board/armltd/vexpress/vexpress_common.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/armltd/vexpress64/vexpress64.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/cavium/thunderx/thunderx.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/h2200/h2200.c	/^void reset_cpu(ulong ignore)$/;"	f	typeref:typename:void
reset_cpu	board/highbank/highbank.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/hisilicon/hikey/hikey.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/kmc/kzm9g/kzm9g.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/alt/alt.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/blanche/blanche.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/gose/gose.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/koelsch/koelsch.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/lager/lager.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/porter/porter.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/salvator-x/salvator-x.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/silk/silk.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/renesas/stout/cpld.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/toradex/colibri_imx7/colibri_imx7.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	board/xilinx/zynqmp/zynqmp.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	drivers/sysreset/sysreset-uclass.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	drivers/watchdog/imx_watchdog.c	/^void __attribute__((weak)) reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_cpu	lib/efi/efi_app.c	/^void reset_cpu(ulong addr)$/;"	f	typeref:typename:void
reset_ctl	board/freescale/t208xrdb/cpld.h	/^	u8 reset_ctl;		\/* 0x10 - Reset control Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
reset_ctl	drivers/i2c/tegra_i2c.c	/^	struct reset_ctl	reset_ctl;$/;"	m	struct:i2c_bus	typeref:struct:reset_ctl	file:
reset_ctl	drivers/mmc/tegra_mmc.c	/^	struct reset_ctl reset_ctl;$/;"	m	struct:tegra_mmc_priv	typeref:struct:reset_ctl	file:
reset_ctl	drivers/net/dwc_eth_qos.c	/^	struct reset_ctl reset_ctl;$/;"	m	struct:eqos_priv	typeref:struct:reset_ctl	file:
reset_ctl	include/reset.h	/^struct reset_ctl {$/;"	s
reset_ctl1	board/freescale/t102xrdb/cpld.h	/^	u8 reset_ctl1;		\/* 0x10 - Reset control Register1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
reset_ctl1	board/freescale/t104xrdb/cpld.h	/^	u8 reset_ctl1;		\/* 0x10 - Reset control Register1 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
reset_ctl2	board/freescale/t102xrdb/cpld.h	/^	u8 reset_ctl2;		\/* 0x11 - Reset control Register2 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
reset_ctl2	board/freescale/t104xrdb/cpld.h	/^	u8 reset_ctl2;		\/* 0x11 - Reset control Register2 *\/$/;"	m	struct:cpld_data	typeref:typename:u8
reset_ctrl	board/amcc/canyonlands/canyonlands.c	/^	u8	reset_ctrl;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
reset_deassert	drivers/reset/reset-uclass.c	/^int reset_deassert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int
reset_deassert	include/reset.h	/^static inline int reset_deassert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int
reset_deassert_peripherals_handoff	arch/arm/mach-socfpga/reset_manager.c	/^void reset_deassert_peripherals_handoff(void)$/;"	f	typeref:typename:void
reset_delay	drivers/video/exynos/exynos_fb.c	/^	unsigned int reset_delay;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
reset_delay	include/exynos_lcd.h	/^	unsigned int reset_delay;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
reset_delays	drivers/net/designware.h	/^	u32 reset_delays[3];$/;"	m	struct:dw_eth_pdata	typeref:typename:u32[3]
reset_dev_ops	drivers/reset/reset-uclass.c	/^static inline struct reset_ops *reset_dev_ops(struct udevice *dev)$/;"	f	typeref:struct:reset_ops *	file:
reset_ecc	drivers/mtd/nand/bfin_nand.c	/^static void reset_ecc(void)$/;"	f	typeref:typename:void	file:
reset_failed	board/armltd/integrator/lowlevel_init.S	/^reset_failed:$/;"	l
reset_flash	board/bf533-ezkit/flash.c	/^void reset_flash(void)$/;"	f	typeref:typename:void
reset_free	drivers/reset/reset-uclass.c	/^int reset_free(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int
reset_free	include/reset.h	/^static inline int reset_free(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int
reset_gadget	drivers/usb/gadget/at91_udc.c	/^static void reset_gadget(struct at91_udc *udc)$/;"	f	typeref:typename:void	file:
reset_get_by_index	drivers/reset/reset-uclass.c	/^int reset_get_by_index(struct udevice *dev, int index,$/;"	f	typeref:typename:int
reset_get_by_index	include/reset.h	/^static inline int reset_get_by_index(struct udevice *dev, int index,$/;"	f	typeref:typename:int
reset_get_by_name	drivers/reset/reset-uclass.c	/^int reset_get_by_name(struct udevice *dev, const char *name,$/;"	f	typeref:typename:int
reset_get_by_name	include/reset.h	/^static inline int reset_get_by_name(struct udevice *dev, const char *name,$/;"	f	typeref:typename:int
reset_gp	arch/nds32/cpu/n1213/start.S	/^reset_gp:$/;"	l
reset_gpio	board/nokia/rx51/tag_omap.h	/^	u8 reset_gpio;$/;"	m	struct:omap_bluetooth_config	typeref:typename:u8
reset_gpio	drivers/net/designware.h	/^	struct gpio_desc reset_gpio;$/;"	m	struct:dw_eth_dev	typeref:struct:gpio_desc
reset_gpio	drivers/video/scf0403_lcd.c	/^	unsigned int reset_gpio;$/;"	m	struct:scf0403_priv	typeref:typename:unsigned int	file:
reset_hc	arch/sparc/cpu/leon3/usb_uhci.c	/^void reset_hc(void)$/;"	f	typeref:typename:void
reset_hc	board/mpl/common/usb_uhci.c	/^void reset_hc(void)$/;"	f	typeref:typename:void
reset_id	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t reset_id;$/;"	m	struct:mrq_reset_request	typeref:typename:uint32_t
reset_ide_controller	drivers/block/ftide020.c	/^static void reset_ide_controller(void)$/;"	f	typeref:typename:void	file:
reset_manager_base	arch/arm/mach-socfpga/misc.c	/^static struct socfpga_reset_manager *reset_manager_base =$/;"	v	typeref:struct:socfpga_reset_manager *	file:
reset_manager_base	arch/arm/mach-socfpga/reset_manager.c	/^static const struct socfpga_reset_manager *reset_manager_base =$/;"	v	typeref:typename:const struct socfpga_reset_manager *	file:
reset_mem_stbl	drivers/ddr/altera/sequencer.h	/^	u32	reset_mem_stbl;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
reset_menu	scripts/kconfig/nconf.c	/^static void reset_menu(void)$/;"	f	typeref:typename:void	file:
reset_misc	arch/arm/cpu/armv7/mx6/soc.c	/^void reset_misc(void)$/;"	f	typeref:typename:void
reset_misc	arch/arm/cpu/armv7/mx7/soc.c	/^void reset_misc(void)$/;"	f	typeref:typename:void
reset_misc	arch/arm/cpu/armv8/fwcall.c	/^void reset_misc(void)$/;"	f	typeref:typename:void
reset_misc	arch/arm/lib/reset.c	/^__weak void reset_misc(void)$/;"	f	typeref:typename:__weak void
reset_misc	board/Synology/ds109/ds109.c	/^void reset_misc(void)$/;"	f	typeref:typename:void
reset_misc	board/lg/sniper/sniper.c	/^void reset_misc(void)$/;"	f	typeref:typename:void
reset_misc	board/samsung/common/board.c	/^void reset_misc(void)$/;"	f	typeref:typename:void
reset_net_chip	board/isee/igep00x0/igep00x0.c	/^static void reset_net_chip(int gpio)$/;"	f	typeref:typename:void	file:
reset_net_chip	board/overo/overo.c	/^static void reset_net_chip(void)$/;"	f	typeref:typename:void	file:
reset_net_chip	board/ti/evm/evm.c	/^static void reset_net_chip(void)$/;"	f	typeref:typename:void	file:
reset_of_xlate_default	drivers/reset/reset-uclass.c	/^static int reset_of_xlate_default(struct reset_ctl *reset_ctl,$/;"	f	typeref:typename:int	file:
reset_ops	include/reset-uclass.h	/^struct reset_ops {$/;"	s
reset_pcie_x	drivers/pci/pci_tegra.c	/^	struct reset_ctl reset_pcie_x;$/;"	m	struct:tegra_pcie	typeref:struct:reset_ctl	file:
reset_periph	arch/arm/mach-tegra/clock.c	/^void reset_periph(enum periph_id periph_id, int us_delay)$/;"	f	typeref:typename:void
reset_periph	board/timll/devkit3250/devkit3250.c	/^void reset_periph(void)$/;"	f	typeref:typename:void
reset_periph	board/work-microwave/work_92105/work_92105.c	/^void reset_periph(void)$/;"	f	typeref:typename:void
reset_pex	drivers/pci/pci_tegra.c	/^	struct reset_ctl reset_pex;$/;"	m	struct:tegra_pcie	typeref:struct:reset_ctl	file:
reset_phy	board/LaCie/edminiv2/edminiv2.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/LaCie/net2big_v2/net2big_v2.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/LaCie/netspace_v2/netspace_v2.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Marvell/dreamplug/dreamplug.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Marvell/gplugd/gplugd.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Marvell/guruplug/guruplug.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Marvell/openrd/openrd.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Marvell/sheevaplug/sheevaplug.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Seagate/dockstar/dockstar.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Seagate/goflexhome/goflexhome.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Seagate/nas220/nas220.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/Synology/ds109/ds109.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/atmel/at91sam9260ek/at91sam9260ek.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/atmel/at91sam9261ek/at91sam9261ek.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/atmel/at91sam9263ek/at91sam9263ek.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/bluewater/gurnard/gurnard.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/bluewater/snapper9260/snapper9260.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/cloudengines/pogo_e02/pogo_e02.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/d-link/dns325/dns325.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/esd/cpci405/cpci405.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/esd/plu405/plu405.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/esd/pmc440/pmc440.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/esd/vom405/vom405.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/freescale/mpc8560ads/mpc8560ads.c	/^void reset_phy (void)$/;"	f	typeref:typename:void
reset_phy	board/ifm/o2dnt2/o2dnt2.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/keymile/km_arm/km_arm.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/mini-box/picosam9g45/picosam9g45.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/motionpro/motionpro.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/ronetix/pm9261/pm9261.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/ronetix/pm9263/pm9263.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/ronetix/pm9g45/pm9g45.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/tqc/tqm5200/tqm5200.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy	board/zyxel/nsa310s/nsa310s.c	/^void reset_phy(void)$/;"	f	typeref:typename:void
reset_phy_ctrl	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static void reset_phy_ctrl(void)$/;"	f	typeref:typename:void	file:
reset_pin	board/xilinx/microblaze-generic/microblaze-generic.c	/^static int reset_pin = -1;$/;"	v	typeref:typename:int	file:
reset_pin	drivers/video/ssd2828.h	/^	int reset_pin;$/;"	m	struct:ssd2828_config	typeref:typename:int
reset_read_data_fifos	arch/arm/cpu/armv7/mx6/ddr.c	/^static void reset_read_data_fifos(void)$/;"	f	typeref:typename:void	file:
reset_read_fifo	drivers/ddr/marvell/a38x/ddr3_debug.c	/^	rl_test = 0, reset_read_fifo = 0;$/;"	v	typeref:typename:u32
reset_reason	arch/arm/include/asm/arch-am33xx/omap.h	/^	unsigned char reset_reason;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
reset_reason	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned char reset_reason;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
reset_reason	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned char reset_reason;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
reset_reason	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned char reset_reason;$/;"	m	struct:omap_boot_parameters	typeref:typename:unsigned char
reset_reg	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr reset_reg;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
reset_root_port	include/usb.h	/^	int (*reset_root_port)(struct udevice *bus, struct usb_device *udev);$/;"	m	struct:dm_usb_ops	typeref:typename:int (*)(struct udevice * bus,struct usb_device * udev)
reset_rsmrst	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool reset_rsmrst;$/;"	m	struct:pin_info	typeref:typename:bool	file:
reset_rx_status	drivers/net/dm9000x.c	/^	u32 reset_rx_status;	\/* RESET caused by RX Statsus wrong *\/$/;"	m	struct:board_info	typeref:typename:u32	file:
reset_sata	arch/arm/cpu/armv7/omap-common/sata.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/dwc_ahsata.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/fsl_sata.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/pata_bfin.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/sata_dwc.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/sata_mv.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/sata_sandbox.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/sata_sil.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sata	drivers/block/sata_sil3114.c	/^int reset_sata(int dev)$/;"	f	typeref:typename:int
reset_sctrl	arch/arm/cpu/armv8/start.S	/^reset_sctrl:$/;"	l
reset_sequencer_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	reset_sequencer_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
reset_sequencer_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	reset_sequencer_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
reset_sequencer_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	reset_sequencer_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
reset_sequencer_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	reset_sequencer_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
reset_sequencer_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	reset_sequencer_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
reset_sequencer_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	reset_sequencer_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
reset_set_enable	arch/arm/mach-tegra/tegra114/clock.c	/^void reset_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
reset_set_enable	arch/arm/mach-tegra/tegra124/clock.c	/^void reset_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
reset_set_enable	arch/arm/mach-tegra/tegra20/clock.c	/^void reset_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
reset_set_enable	arch/arm/mach-tegra/tegra210/clock.c	/^void reset_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
reset_set_enable	arch/arm/mach-tegra/tegra30/clock.c	/^void reset_set_enable(enum periph_id periph_id, int enable)$/;"	f	typeref:typename:void
reset_state	scripts/kernel-doc	/^sub reset_state {$/;"	s
reset_status	arch/powerpc/include/asm/global_data.h	/^	unsigned long reset_status;	\/* reset status register at boot *\/$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
reset_subtitle	scripts/kconfig/mconf.c	/^static void reset_subtitle(void)$/;"	f	typeref:typename:void	file:
reset_time	drivers/rtc/i2c_rtc_emul.c	/^static void reset_time(struct udevice *dev)$/;"	f	typeref:typename:void	file:
reset_timer	arch/arm/mach-stm32/stm32f1/timer.c	/^void reset_timer(void)$/;"	f	typeref:typename:void
reset_timer	arch/arm/mach-stm32/stm32f4/timer.c	/^void reset_timer(void)$/;"	f	typeref:typename:void
reset_timer	arch/nds32/cpu/n1213/ag101/timer.c	/^void reset_timer(void)$/;"	f	typeref:typename:void
reset_timer	arch/openrisc/lib/timer.c	/^void reset_timer(void)$/;"	f	typeref:typename:void
reset_timer_masked	arch/arm/cpu/arm926ejs/omap/timer.c	/^void reset_timer_masked (void)$/;"	f	typeref:typename:void
reset_timer_masked	arch/arm/cpu/armv7/s5p-common/timer.c	/^void reset_timer_masked(void)$/;"	f	typeref:typename:void
reset_timer_masked	arch/nds32/cpu/n1213/ag101/timer.c	/^void reset_timer_masked(void)$/;"	f	typeref:typename:void
reset_tlb	arch/powerpc/cpu/mpc85xx/cpu.c	/^static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset)$/;"	f	typeref:typename:int	file:
reset_total_layers	drivers/video/fsl_dcu_fb.c	/^static void reset_total_layers(void)$/;"	f	typeref:typename:void	file:
reset_tx_timeout	drivers/net/dm9000x.c	/^	u32 reset_tx_timeout;	\/* RESET caused by TX Timeout *\/$/;"	m	struct:board_info	typeref:typename:u32	file:
reset_type	arch/x86/include/asm/me_common.h	/^	u8 reset_type;$/;"	m	struct:me_global_reset	typeref:typename:u8
reset_usb_controller	drivers/usb/host/ehci-mpc512x.c	/^static int reset_usb_controller(volatile struct usb_ehci *ehci)$/;"	f	typeref:typename:int	file:
reset_usb_phy	drivers/usb/host/ehci-exynos.c	/^static void reset_usb_phy(struct exynos_usb_phy *usb)$/;"	f	typeref:typename:void	file:
reset_usb_phy	drivers/usb/host/ehci-msm.c	/^static void reset_usb_phy(struct msm_ehci_priv *priv)$/;"	f	typeref:typename:void	file:
reset_value	arch/x86/include/asm/acpi_table.h	/^	u8 reset_value;$/;"	m	struct:acpi_fadt	typeref:typename:u8
reset_vector	arch/x86/cpu/resetvec.S	/^reset_vector:$/;"	l
reset_wait_timer_us	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint16_t reset_wait_timer_us;$/;"	m	struct:pch_azalia_config	typeref:typename:uint16_t
reset_with_rli	arch/powerpc/cpu/ppc4xx/cpu_init.c	/^static void reset_with_rli(void)$/;"	f	typeref:typename:void	file:
resetc	arch/sandbox/dts/test.dts	/^	resetc: reset-ctl {$/;"	l
resg45_1	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		resg45_1[10];$/;"	m	struct:at91_matrix	typeref:typename:u32[10]
residue	drivers/usb/gadget/f_mass_storage.c	/^	u32			residue;$/;"	m	struct:fsg_common	typeref:typename:u32	file:
resindex	drivers/video/videomodes.h	/^	int resindex;		\/* index to resolution struct *\/$/;"	m	struct:ctfb_vesa_modes	typeref:typename:int
resinit0	drivers/qe/uec.h	/^	u8   resinit0;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u8
resinit1	drivers/qe/uec.h	/^	u8   resinit1;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u8
resinit2	drivers/qe/uec.h	/^	u8   resinit2;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u8
resinit3	drivers/qe/uec.h	/^	u8   resinit3;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u8
resinit4	drivers/qe/uec.h	/^	u16  resinit4;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u16
resize_fifos	drivers/usb/dwc3/core.h	/^	unsigned		resize_fifos:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
resizeable	scripts/kconfig/gconf.c	/^static gboolean resizeable = FALSE;$/;"	v	typeref:typename:gboolean	file:
resmdio	include/tsec.h	/^	u32	resmdio[6];$/;"	m	struct:tsec	typeref:typename:u32[6]
resolution	drivers/video/exynos/exynos_fb.c	/^	unsigned int resolution;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
resolution	include/efi.h	/^	u32 resolution;$/;"	m	struct:efi_time_cap	typeref:typename:u32
resolution	include/exynos_lcd.h	/^	unsigned int resolution;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
resolve_collision	fs/ubifs/tnc.c	/^static int resolve_collision(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int	file:
resolve_collision_directly	fs/ubifs/tnc.c	/^static int resolve_collision_directly(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
resource	drivers/pci/pci_mvebu.c	/^struct resource {$/;"	s	file:
resource	include/linux/ioport.h	/^struct resource {$/;"	s
resource	include/sh_pfc.h	/^	struct resource *resource;$/;"	m	struct:pinmux_info	typeref:struct:resource *
resource_index	drivers/usb/dwc3/core.h	/^	u8			resource_index;$/;"	m	struct:dwc3_ep	typeref:typename:u8
resource_list	include/linux/ioport.h	/^struct resource_list {$/;"	s
resource_size	include/linux/ioport.h	/^static inline resource_size_t resource_size(const struct resource *res)$/;"	f	typeref:typename:resource_size_t
resource_size_t	include/linux/types.h	/^typedef phys_addr_t resource_size_t;$/;"	t	typeref:typename:phys_addr_t
resource_type	include/linux/ioport.h	/^static inline unsigned long resource_type(const struct resource *res)$/;"	f	typeref:typename:unsigned long
resources	arch/arm/cpu/armv7/mx7/soc.c	/^static rdc_peri_cfg_t const resources[] = {$/;"	v	typeref:typename:rdc_peri_cfg_t const[]	file:
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a	typeref:struct:bcm2835_mbox_tag_allocate_buffer::__anon775fc544140a::__anon775fc5441608
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a	typeref:struct:bcm2835_mbox_tag_alpha_mode::__anon775fc544290a::__anon775fc5442b08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a	typeref:struct:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a::__anon775fc5441c08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_depth::__anon775fc544230a	typeref:struct:bcm2835_mbox_tag_depth::__anon775fc544230a::__anon775fc5442508
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a	typeref:struct:bcm2835_mbox_tag_get_arm_mem::__anon775fc544080a::__anon775fc5440a08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_board_rev::__anon775fc544010a	typeref:struct:bcm2835_mbox_tag_get_board_rev::__anon775fc544010a::__anon775fc5440308
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_board_serial::__anon775fc544070a	typeref:struct:bcm2835_mbox_tag_get_board_serial::__anon775fc544070a::__packed
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a	typeref:struct:bcm2835_mbox_tag_get_clock_rate::__anon775fc544110a::__anon775fc5441308
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a	typeref:struct:bcm2835_mbox_tag_get_mac_address::__anon775fc544040a::__anon775fc5440608
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_palette::__anon775fc544350a	typeref:struct:bcm2835_mbox_tag_get_palette::__anon775fc544350a::__anon775fc5443708
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a	typeref:struct:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a::__anon775fc5440d08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_overscan::__anon775fc544320a	typeref:struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443408
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a	typeref:struct:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a::__anon775fc5441f08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_pitch::__anon775fc5442c0a	typeref:struct:bcm2835_mbox_tag_pitch::__anon775fc5442c0a::__anon775fc5442e08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_pixel_order::__anon775fc544260a	typeref:struct:bcm2835_mbox_tag_pixel_order::__anon775fc544260a::__anon775fc5442808
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_release_buffer::__anon775fc544170a	typeref:struct:bcm2835_mbox_tag_release_buffer::__anon775fc544170a::__anon775fc5441908
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a	typeref:struct:bcm2835_mbox_tag_set_palette::__anon775fc5443b0a::__anon775fc5443d08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a	typeref:struct:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a::__anon775fc5441008
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_test_palette::__anon775fc544380a	typeref:struct:bcm2835_mbox_tag_test_palette::__anon775fc544380a::__anon775fc5443a08
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a	typeref:struct:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a::__anon775fc5443108
resp	arch/arm/mach-bcm283x/include/mach/mbox.h	/^		} resp;$/;"	m	union:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a	typeref:struct:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a::__anon775fc5442208
resp	drivers/mtd/nand/tegra_nand.h	/^	u32	resp;		\/* offset 18h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
resp0	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 resp0;		\/* 0x20 response 0 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp0	arch/arm/include/asm/arch/mmc.h	/^	u32 resp0;		\/* 0x20 response 0 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp1	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 resp1;		\/* 0x24 response 1 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp1	arch/arm/include/asm/arch/mmc.h	/^	u32 resp1;		\/* 0x24 response 1 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp2	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 resp2;		\/* 0x28 response 2 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp2	arch/arm/include/asm/arch/mmc.h	/^	u32 resp2;		\/* 0x28 response 2 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp3	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 resp3;		\/* 0x2c response 3 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp3	arch/arm/include/asm/arch/mmc.h	/^	u32 resp3;		\/* 0x2c response 3 *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
resp_fill_level	drivers/net/altera_tse.h	/^	u32 resp_fill_level;	\/* bit 15:0 *\/$/;"	m	struct:msgdma_csr	typeref:typename:u32
resp_queue	drivers/usb/gadget/rndis.h	/^	struct list_head	resp_queue;$/;"	m	struct:rndis_params	typeref:struct:list_head
resp_type	include/mmc.h	/^	uint resp_type;$/;"	m	struct:mmc_cmd	typeref:typename:uint
respcommand	drivers/mmc/arm_pl180_mmci.h	/^	u32 respcommand;	\/* 0x10*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
response	drivers/block/sata_mv.c	/^	struct crpb *response;$/;"	m	struct:mv_priv	typeref:struct:crpb *	file:
response	include/mmc.h	/^	uint response[4];$/;"	m	struct:mmc_cmd	typeref:typename:uint[4]
response0	drivers/mmc/arm_pl180_mmci.h	/^	u32 response0;		\/* 0x14*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
response1	drivers/mmc/arm_pl180_mmci.h	/^	u32 response1;		\/* 0x18*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
response2	drivers/mmc/arm_pl180_mmci.h	/^	u32 response2;		\/* 0x1c*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
response3	drivers/mmc/arm_pl180_mmci.h	/^	u32 response3;		\/* 0x20*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
resr5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char resr5[0x4];$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned char[0x4]
resr5	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned char resr5[0x4];$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned char[0x4]
rest	arch/arm/mach-exynos/include/mach/uart.h	/^	union br_rest	rest;$/;"	m	struct:s5p_uart	typeref:union:br_rest
rest	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	union br_rest	rest;$/;"	m	struct:s5p_uart	typeref:union:br_rest
restart	net/tftp.c	/^static void restart(const char *msg)$/;"	f	typeref:typename:void	file:
restart_uboot	test/py/u_boot_console_base.py	/^    def restart_uboot(self):$/;"	m	class:ConsoleBase
resto	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	resto;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
restore_flags	arch/microblaze/include/asm/system.h	/^#define restore_flags(/;"	d
restore_flags	arch/mips/include/asm/system.h	/^#  define restore_flags(/;"	d
restore_from_hyp	arch/arm/cpu/armv7/omap-common/lowlevel_init.S	/^restore_from_hyp:$/;"	l
restore_redirects	common/cli_hush.c	/^static void restore_redirects(int squirrel[])$/;"	f	typeref:typename:void	file:
restore_timings	arch/x86/cpu/quark/smc.c	/^void restore_timings(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
result	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG result;		\/* Result of a system call *\/$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
result	arch/x86/include/asm/me_common.h	/^	u32 result:8;$/;"	m	struct:mkhi_header	typeref:typename:u32:8
result	cmd/fdc.c	/^	uchar		result[11];	\/* status information *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:uchar[11]	file:
result	drivers/crypto/fsl/jr.h	/^struct result {$/;"	s
result	drivers/ddr/altera/sdram.c	/^	u32	result;$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
result	drivers/mmc/rpmb.c	/^	unsigned short result;$/;"	m	struct:s_rpmb	typeref:typename:unsigned short	file:
result	fs/yaffs2/yaffs_guts.h	/^	int result;$/;"	m	struct:yaffs_xattr_mod	typeref:typename:int
result	include/ec_commands.h	/^	uint16_t result;$/;"	m	struct:ec_host_response	typeref:typename:uint16_t
result	scripts/kconfig/qconf.h	/^	struct symbol **result;$/;"	m	class:ConfigSearchWindow	typeref:struct:symbol **
result	tools/patman/patman	/^    result = unittest.TestResult()$/;"	v
result	tools/patman/patman.py	/^    result = unittest.TestResult()$/;"	v
result_all_bit	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 result_all_bit[MAX_BUS_NUM * BUS_WIDTH_IN_BITS * MAX_INTERFACE_NUM];$/;"	v	typeref:typename:u8[]
result_mat	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 result_mat[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];$/;"	v	typeref:typename:u8[][][]
result_mat_rx_dqs	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^u8 result_mat_rx_dqs[MAX_INTERFACE_NUM][MAX_BUS_NUM][MAX_CS_NUM];$/;"	v	typeref:typename:u8[][][]
result_tf	drivers/block/sata_dwc.h	/^	struct ata_taskfile	result_tf;$/;"	m	struct:ata_queued_cmd	typeref:struct:ata_taskfile
resultlen	cmd/fdc.c	/^	uchar		resultlen;	\/* lenght of result *\/$/;"	m	struct:__anon1d1457860108	typeref:typename:uchar	file:
resume	include/linux/usb/composite.h	/^	void			(*resume)(struct usb_composite_dev *);$/;"	m	struct:usb_composite_driver	typeref:typename:void (*)(struct usb_composite_dev *)
resume	include/linux/usb/composite.h	/^	void			(*resume)(struct usb_function *);$/;"	m	struct:usb_function	typeref:typename:void (*)(struct usb_function *)
resume	include/linux/usb/gadget.h	/^	void			(*resume)(struct usb_gadget *);$/;"	m	struct:usb_gadget_driver	typeref:typename:void (*)(struct usb_gadget *)
resume_from_sleep	board/freescale/mpc8313erdb/sdram.c	/^static void resume_from_sleep(void)$/;"	f	typeref:typename:void	file:
resume_from_sleep	board/freescale/mpc8315erdb/sdram.c	/^static void resume_from_sleep(void)$/;"	f	typeref:typename:void	file:
resume_func	arch/arm/mach-exynos/power.c	/^	typedef void (*resume_func)(void);$/;"	t	function:exynos4_power_exit_wakeup	typeref:typename:void (*)(void)	file:
resume_func	arch/arm/mach-exynos/power.c	/^	typedef void (*resume_func)(void);$/;"	t	function:exynos5_power_exit_wakeup	typeref:typename:void (*)(void)	file:
resv	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 resv[0xfdd];$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32[0xfdd]
resv	arch/sparc/lib/bootm.c	/^			unsigned int resv[3];$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned int[3]	file:
resv0	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int resv0[1];$/;"	m	struct:cm_pll	typeref:typename:unsigned int[1]	file:
resv0	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv0[2];$/;"	m	struct:cm_def	typeref:typename:unsigned int[2]
resv0	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv0[67];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[67]
resv0	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv0[136];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[136]
resv0	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv0[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv0[3];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[3]
resv0	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv0[7];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[7]
resv0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv0[2];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[2]
resv0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 resv0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
resv0	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	resv0;$/;"	m	struct:pllctl_regs	typeref:typename:u32
resv0	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 resv0;	\/* 0x04 *\/$/;"	m	struct:dspi	typeref:typename:u32
resv0	arch/m68k/include/asm/coldfire/ssi.h	/^	u8 resv0[0x4];$/;"	m	struct:ssi	typeref:typename:u8[0x4]
resv0	arch/m68k/include/asm/immap_5227x.h	/^	u8 resv0[0x100];$/;"	m	struct:sdramc	typeref:typename:u8[0x100]
resv0	arch/m68k/include/asm/immap_5441x.h	/^	u8 resv0[0x18];$/;"	m	struct:sbf	typeref:typename:u8[0x18]
resv0	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv0[0x100];$/;"	m	struct:sdramc	typeref:typename:u8[0x100]
resv0	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv0[0x18];$/;"	m	struct:sbf	typeref:typename:u8[0x18]
resv0	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv0[0x1];$/;"	m	struct:gpio	typeref:typename:u8[0x1]
resv0	arch/m68k/include/asm/uart.h	/^	u8 resv0[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv0	include/fsl_dspi.h	/^	u32 resv0;	\/* 0x04 *\/$/;"	m	struct:dspi	typeref:typename:u32
resv1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int resv1[1];$/;"	m	struct:cm_pll	typeref:typename:unsigned int[1]	file:
resv1	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv1[1];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[1]
resv1	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv1[1];$/;"	m	struct:cm_def	typeref:typename:unsigned int[1]
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1;$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1[16];$/;"	m	struct:ctrl_stat	typeref:typename:unsigned int[16]
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1[21];$/;"	m	struct:uart_sys	typeref:typename:unsigned int[21]
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1[4];$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int[4]
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1[4];$/;"	m	struct:wd_timer	typeref:typename:unsigned int[4]
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1[7];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[7]
resv1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv1[7];$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int[7]
resv1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv1[2];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[2]
resv1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv1[325];$/;"	m	struct:ddr_ctrl	typeref:typename:unsigned int[325]
resv1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv1[3];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[3]
resv1	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv1[4];$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int[4]
resv1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 resv1[4];$/;"	m	struct:sctr_regs	typeref:typename:u32[4]
resv1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv1[4];$/;"	m	struct:sctr_regs	typeref:typename:u32[4]
resv1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv1[5];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[5]
resv1	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	resv1;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
resv1	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 resv1[4];$/;"	m	struct:sctr_regs	typeref:typename:u32[4]
resv1	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	resv1;		\/* 28 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
resv1	arch/m68k/include/asm/coldfire/dspi.h	/^	u16 resv1;	\/* 0x38 *\/$/;"	m	struct:dspi	typeref:typename:u16
resv1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 resv1[0x3];$/;"	m	struct:intgack_ctrl1	typeref:typename:u8[0x3]
resv1	arch/m68k/include/asm/coldfire/ssi.h	/^	u8 resv1[0x8];$/;"	m	struct:ssi	typeref:typename:u8[0x8]
resv1	arch/m68k/include/asm/fec.h	/^	u8 resv1[0x28];		\/* 0x18 *\/$/;"	m	struct:fec	typeref:typename:u8[0x28]
resv1	arch/m68k/include/asm/immap_5227x.h	/^	u16 resv1;$/;"	m	struct:ccm	typeref:typename:u16
resv1	arch/m68k/include/asm/immap_5441x.h	/^	u8 resv1[0x2];		\/* 0x06 *\/$/;"	m	struct:ccm	typeref:typename:u8[0x2]
resv1	arch/m68k/include/asm/immap_5441x.h	/^	u8 resv1[0x6];$/;"	m	struct:sbf	typeref:typename:u8[0x6]
resv1	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv1[0x2];$/;"	m	struct:ccm	typeref:typename:u8[0x2]
resv1	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv1[0x2];$/;"	m	struct:gpio	typeref:typename:u8[0x2]
resv1	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv1[0x6];$/;"	m	struct:sbf	typeref:typename:u8[0x6]
resv1	arch/m68k/include/asm/uart.h	/^	u8 resv1[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv1	drivers/mtd/nand/tegra_nand.h	/^	u32	resv1;		\/* offset 48h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
resv1	drivers/net/ftgmac100.h	/^	unsigned int	resv1;		\/* 0x5c *\/ \/* not defined in spec *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
resv1	drivers/spi/sh_spi.h	/^	unsigned long resv1;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
resv1	drivers/video/da8xx-fb.c	/^	u32	resv1;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
resv10	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv10;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv10	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv10[11];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[11]
resv10	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv10[2];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[2]
resv10	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv10[8];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[8]
resv10	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv10[4];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[4]
resv10	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv10[5];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[5]
resv10	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv10[0x2];$/;"	m	struct:gpio	typeref:typename:u8[0x2]
resv11	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv11;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv11	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv11;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv11	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv11[1];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[1]
resv11	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv11[4];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[4]
resv112	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv112;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv112	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv112[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv113	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv113[45];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[45]
resv12	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv12;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv12	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv12[11];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[11]
resv12	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv12[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv12	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv12;$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
resv12	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv12[20];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[20]
resv12	arch/m68k/include/asm/fec.h	/^	u8 resv12[0x74];	\/* 0x18C *\/$/;"	m	struct:fec	typeref:typename:u8[0x74]
resv121	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv121;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv122	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv122;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv13	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv13;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv13	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv13[101];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[101]
resv13	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv13[4];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[4]
resv13	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv13;$/;"	m	struct:ddr_regs	typeref:typename:unsigned int
resv13	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv13[120];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[120]
resv13	arch/m68k/include/asm/fec.h	/^	u8 resv13[0x8];$/;"	m	struct:fec	typeref:typename:u8[0x8]
resv14	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv14[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv14	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv14[8];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[8]
resv14	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv14[4];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[4]
resv14	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv14[61];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[61]
resv15	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv15;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv15	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv15[2];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[2]
resv15	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv15[4];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[4]
resv15	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv15[248];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[248]
resv16	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv16;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv16	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv16[2];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[2]
resv17	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv17[13];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[13]
resv18	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv18[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv19	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv19;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int resv2[1];$/;"	m	struct:cm_pll	typeref:typename:unsigned int[1]	file:
resv2	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv2[1];$/;"	m	struct:cm_def	typeref:typename:unsigned int[1]
resv2	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv2[2];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[2]
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2;$/;"	m	struct:cm_dpll	typeref:typename:unsigned int
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2;$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2[11];$/;"	m	struct:cm_dpll	typeref:typename:unsigned int[11]
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2[15];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[15]
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2[3];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[3]
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2[3];$/;"	m	struct:wd_timer	typeref:typename:unsigned int[3]
resv2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv2[51];$/;"	m	struct:ctrl_stat	typeref:typename:unsigned int[51]
resv2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv2[12];$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int[12]
resv2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv2[3];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[3]
resv2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv2[4];$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int[4]
resv2	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv2[8];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[8]
resv2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 resv2[1002];$/;"	m	struct:sctr_regs	typeref:typename:u32[1002]
resv2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv2[1002];$/;"	m	struct:sctr_regs	typeref:typename:u32[1002]
resv2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv2[5];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[5]
resv2	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	resv2[2];$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int[2]
resv2	arch/arm/include/asm/imx-common/syscounter.h	/^	u32 resv2[1001];$/;"	m	struct:sctr_regs	typeref:typename:u32[1001]
resv2	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	resv2;$/;"	m	struct:pllctl_regs	typeref:typename:u32
resv2	arch/m68k/include/asm/coldfire/dspi.h	/^	u8 resv2[0x30];	\/* 0x40 *\/$/;"	m	struct:dspi	typeref:typename:u8[0x30]
resv2	arch/m68k/include/asm/fec.h	/^	u8 resv2[0x44];		\/* 0x48 *\/$/;"	m	struct:fec	typeref:typename:u8[0x44]
resv2	arch/m68k/include/asm/immap_5227x.h	/^	u32 resv2;$/;"	m	struct:ccm	typeref:typename:u32
resv2	arch/m68k/include/asm/immap_5441x.h	/^	u8 resv2[0x2];		\/* 0x0C *\/$/;"	m	struct:ccm	typeref:typename:u8[0x2]
resv2	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv2[0x1];$/;"	m	struct:gpio	typeref:typename:u8[0x1]
resv2	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv2[0x4];$/;"	m	struct:ccm	typeref:typename:u8[0x4]
resv2	arch/m68k/include/asm/uart.h	/^	u8 resv2[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv2	drivers/mtd/nand/tegra_nand.h	/^	u32	resv2[29];$/;"	m	struct:nand_ctlr	typeref:typename:u32[29]
resv2	drivers/net/ftgmac100.h	/^	unsigned int	resv2;		\/* 0x7c *\/ \/* not defined in spec *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
resv2	drivers/spi/sh_spi.h	/^	unsigned long resv2;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
resv2	include/fsl_dspi.h	/^	u8 resv2[0x30];	\/* 0x40 *\/$/;"	m	struct:dspi	typeref:typename:u8[0x30]
resv20	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv20;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv21	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv21[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv22	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv22;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv23	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv23[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv24	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv24;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv25	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv25[13];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[13]
resv26	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv26;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv27	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv27[9];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[9]
resv28	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv28;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv29	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv29;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int resv3[4];$/;"	m	struct:cm_pll	typeref:typename:unsigned int[4]	file:
resv3	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv3[1];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[1]
resv3	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv3[1];$/;"	m	struct:cm_def	typeref:typename:unsigned int[1]
resv3	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv3[2];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[2]
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3;$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3[1];$/;"	m	struct:wd_timer	typeref:typename:unsigned int[1]
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3[2];$/;"	m	struct:cm_dpll	typeref:typename:unsigned int[2]
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3[319];$/;"	m	struct:ctrl_stat	typeref:typename:unsigned int[319]
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv3	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3[9];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[9]
resv3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv3;$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
resv3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv3[3];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[3]
resv3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv3[4];$/;"	m	struct:ddr_cmdtctrl	typeref:typename:unsigned int[4]
resv3	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv3[4];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[4]
resv3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv3[6];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[6]
resv3	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	resv3[2];$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int[2]
resv3	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	resv3[2];$/;"	m	struct:pllctl_regs	typeref:typename:u32[2]
resv3	arch/m68k/include/asm/fec.h	/^	u8 resv3[0x10];		\/* 0x94 *\/$/;"	m	struct:fec	typeref:typename:u8[0x10]
resv3	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv3[0x2];$/;"	m	struct:gpio	typeref:typename:u8[0x2]
resv3	arch/m68k/include/asm/uart.h	/^	u8 resv3[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv3	drivers/net/ftgmac100.h	/^	unsigned int	resv3;		\/* 0x9c *\/ \/* not defined in spec *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
resv3	drivers/spi/sh_spi.h	/^	unsigned long resv3;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
resv30	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv30[5];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[5]
resv31	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv31[9];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[9]
resv32	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv32;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv33	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv33;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv34	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv34;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv35	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv35;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv36	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv36[5];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[5]
resv361	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv361;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv3611	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv3611[79];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[79]
resv362	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv362[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv37	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv37[3];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[3]
resv371	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv371;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv38	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv38[57];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[57]
resv39	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv39[183];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[183]
resv4	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int resv4[2];$/;"	m	struct:cm_pll	typeref:typename:unsigned int[2]	file:
resv4	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv4[10];$/;"	m	struct:cm_def	typeref:typename:unsigned int[10]
resv4	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv4[2];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[2]
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4[1];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[1]
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4[2];$/;"	m	struct:cm_dpll	typeref:typename:unsigned int[2]
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4[39];$/;"	m	struct:wd_timer	typeref:typename:unsigned int[39]
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4[4];$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int[4]
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4[5];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[5]
resv4	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv4[8];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[8]
resv4	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv4;$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int
resv4	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv4[2];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[2]
resv4	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv4[8];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[8]
resv4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv4[3];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[3]
resv4	arch/m68k/include/asm/fec.h	/^	u8 resv4[0x50];		\/* 0xB0 *\/$/;"	m	struct:fec	typeref:typename:u8[0x50]
resv4	arch/m68k/include/asm/immap_5227x.h	/^	u16 resv4;$/;"	m	struct:ccm	typeref:typename:u16
resv4	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv4[0x1];$/;"	m	struct:gpio	typeref:typename:u8[0x1]
resv4	arch/m68k/include/asm/uart.h	/^	u8 resv4[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv4	drivers/spi/sh_spi.h	/^	unsigned long resv4;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
resv40	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv40[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv41	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv41;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv42	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv42;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv5	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv5[1];$/;"	m	struct:cm_def	typeref:typename:unsigned int[1]
resv5	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv5[2];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[2]
resv5	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv5;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv5	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv5;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv5	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv5[2];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[2]
resv5	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv5[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv5	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv5[7];$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int[7]
resv5	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv5[3];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[3]
resv5	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv5[3];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[3]
resv5	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv5[4];$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int[4]
resv5	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv5[24];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[24]
resv5	arch/m68k/include/asm/fec.h	/^	u8 resv5[0x38];		\/* 0x10C *\/$/;"	m	struct:fec	typeref:typename:u8[0x38]
resv5	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv5[0x2];$/;"	m	struct:gpio	typeref:typename:u8[0x2]
resv5	arch/m68k/include/asm/uart.h	/^	u8 resv5[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv6	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv6[1];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[1]
resv6	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv6[4];$/;"	m	struct:cm_alwon	typeref:typename:unsigned int[4]
resv6	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int resv6[4];$/;"	m	struct:cm_def	typeref:typename:unsigned int[4]
resv6	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv6;$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
resv6	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv6[109];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[109]
resv6	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv6[4];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[4]
resv6	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv6[97];$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int[97]
resv6	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv6[3];$/;"	m	struct:ddr_cmd_regs	typeref:typename:unsigned int[3]
resv6	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv6[4];$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int[4]
resv6	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv6[4];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[4]
resv6	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv6[1];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[1]
resv6	arch/m68k/include/asm/fec.h	/^	u8 resv6[0x270];	\/* 0x148 *\/$/;"	m	struct:fec	typeref:typename:u8[0x270]
resv6	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv6[0x1];$/;"	m	struct:gpio	typeref:typename:u8[0x1]
resv6	arch/m68k/include/asm/uart.h	/^	u8 resv6[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv61	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv61;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv7	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv7[1];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[1]
resv7	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv7[2];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[2]
resv7	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv7[85];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[85]
resv7	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv7[12];$/;"	m	struct:ddr_data_regs	typeref:typename:unsigned int[12]
resv7	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv7[2];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[2]
resv7	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv7[1];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[1]
resv7	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv7[0x2];$/;"	m	struct:gpio	typeref:typename:u8[0x2]
resv7	arch/m68k/include/asm/uart.h	/^	u8 resv7[0x17];$/;"	m	struct:uart	typeref:typename:u8[0x17]
resv8	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv8[2];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[2]
resv8	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv8[2];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[2]
resv8	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv8[7];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[7]
resv8	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv8[7];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[7]
resv8	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv8[3];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[3]
resv8	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv8[0x1];$/;"	m	struct:gpio	typeref:typename:u8[0x1]
resv8	arch/m68k/include/asm/uart.h	/^	u8 resv8[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv9	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv9;$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
resv9	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv9[1];$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int[1]
resv9	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv9[5];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[5]
resv9	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int resv9[8];$/;"	m	struct:cm_perpll	typeref:typename:unsigned int[8]
resv9	arch/arm/include/asm/arch-am33xx/ddr_defs.h	/^	unsigned int resv9[12];$/;"	m	struct:ddr_regs	typeref:typename:unsigned int[12]
resv9	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 resv9[1];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[1]
resv9	arch/m68k/include/asm/immap_5445x.h	/^	u8 resv9[0x1];$/;"	m	struct:gpio	typeref:typename:u8[0x1]
resv9	arch/m68k/include/asm/uart.h	/^	u8 resv9[0x3];$/;"	m	struct:uart	typeref:typename:u8[0x3]
resv_1	drivers/net/calxedaxgmac.c	/^	u32 resv_1[4];$/;"	m	struct:xgmac_regs	typeref:typename:u32[4]	file:
resv_2	drivers/net/calxedaxgmac.c	/^	u32 resv_2[2];$/;"	m	struct:xgmac_regs	typeref:typename:u32[2]	file:
resv_3	drivers/net/calxedaxgmac.c	/^	u32 resv_3;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
resv_4	drivers/net/calxedaxgmac.c	/^	u32 resv_4[0xd0];$/;"	m	struct:xgmac_regs	typeref:typename:u32[0xd0]	file:
resv_5	drivers/net/calxedaxgmac.c	/^	u32 resv_5[0x2bf];$/;"	m	struct:xgmac_regs	typeref:typename:u32[0x2bf]	file:
resv_6	drivers/net/calxedaxgmac.c	/^	u32 resv_6[2];$/;"	m	struct:xgmac_regs	typeref:typename:u32[2]	file:
resync_num	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 resync_num;			\/* 0x130 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
resync_num	arch/arm/include/asm/arch/display.h	/^	u32 resync_num;			\/* 0x130 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
ret	arch/arc/include/asm/ptrace.h	/^	long ret;$/;"	m	struct:pt_regs	typeref:typename:long
ret	arch/arm/include/asm/setjmp.h	/^	int ret;$/;"	m	struct:jmp_buf_data	typeref:typename:int
ret_code	tools/buildman/buildman	/^    ret_code = control.DoBuildman(options, args)$/;"	v
ret_code	tools/buildman/buildman.py	/^    ret_code = control.DoBuildman(options, args)$/;"	v
ret_len	include/ec_commands.h	/^	uint32_t ret_len;$/;"	m	struct:ec_params_test_protocol	typeref:typename:uint32_t
ret_trap_entry	arch/sparc/cpu/leon2/start.S	/^ret_trap_entry:$/;"	l
ret_trap_entry	arch/sparc/cpu/leon3/start.S	/^ret_trap_entry:$/;"	l
retcode	drivers/mtd/nand/pxa3xx_nand.c	/^	int			retcode;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
rete	arch/blackfin/include/asm/ptrace.h	/^	long rete;$/;"	m	struct:pt_regs	typeref:typename:long
reti	arch/blackfin/cpu/start.S	/^	reti = p3;$/;"	d
retlen	include/linux/mtd/mtd.h	/^	size_t		retlen;$/;"	m	struct:mtd_oob_ops	typeref:typename:size_t
retn	arch/blackfin/include/asm/ptrace.h	/^	long retn;$/;"	m	struct:pt_regs	typeref:typename:long
retrc	include/commproc.h	/^	ushort	retrc;		\/* frame retransmission cnt *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
retries	include/linux/mtd/mtd.h	/^	u_long retries;$/;"	m	struct:erase_info	typeref:typename:u_long
retry	common/autoboot.c	/^		int retry;$/;"	m	struct:passwd_abort::__anon5afe6cdb0108	typeref:typename:int	file:
retry_time	common/bootretry.c	/^static int      retry_time = -1; \/* -1 so can call readline before main_loop *\/$/;"	v	typeref:typename:int	file:
retry_time_ms	include/tpm.h	/^	uint retry_time_ms;$/;"	m	struct:tpm_chip_priv	typeref:typename:uint
rets	arch/blackfin/include/asm/ptrace.h	/^	long rets;$/;"	m	struct:pt_regs	typeref:typename:long
retu_irq_gpio	board/nokia/rx51/tag_omap.h	/^	s16 retu_irq_gpio;$/;"	m	struct:omap_em_asic_bb5_config	typeref:typename:s16
return	arch/mips/lib/cache_init.S	/^return:$/;"	l
return_addr	examples/api/crt0.S	/^return_addr:$/;"	l
return_address	arch/mips/include/asm/processor.h	/^#define return_address(/;"	d
return_code	drivers/tpm/tpm_tis.h	/^	__be32 return_code;$/;"	m	struct:tpm_output_header	typeref:typename:__be32
return_fm_pebs	drivers/mtd/ubi/fastmap.c	/^static void return_fm_pebs(struct ubi_device *ubi,$/;"	f	typeref:typename:void	file:
return_unused_pool_pebs	drivers/mtd/ubi/fastmap-wl.c	/^static void return_unused_pool_pebs(struct ubi_device *ubi,$/;"	f	typeref:typename:void	file:
retval	examples/standalone/sched.c	/^	int retval;$/;"	m	struct:lthread	typeref:typename:int	file:
retx	arch/blackfin/include/asm/ptrace.h	/^	long retx;$/;"	m	struct:pt_regs	typeref:typename:long
reuse_atags	board/nokia/rx51/rx51.c	/^static void reuse_atags(void)$/;"	f	typeref:typename:void	file:
reuse_omap_atags	board/nokia/rx51/rx51.c	/^static void reuse_omap_atags(struct tag_omap *t)$/;"	f	typeref:typename:void	file:
rev	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short rev;	\/* 0x00 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
rev	arch/arm/include/asm/ehci-omap.h	/^	u32 rev;		\/* 0x00 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
rev	arch/arm/include/asm/ehci-omap.h	/^	u32 rev;	\/* 0x00 *\/$/;"	m	struct:omap_uhh	typeref:typename:u32
rev	arch/arm/include/asm/setup.h	/^	u32 rev;$/;"	m	struct:tag_revision	typeref:typename:u32
rev	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 rev;$/;"	m	struct:bcm2835_mbox_tag_get_board_rev::__anon775fc544010a::__anon775fc5440308	typeref:typename:u32
rev	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 rev;$/;"	m	struct:ahb_pciconf	typeref:typename:u32
rev	arch/mips/include/asm/global_data.h	/^	unsigned long rev;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
rev	arch/nds32/include/asm/setup.h	/^	u32 rev;$/;"	m	struct:tag_revision	typeref:typename:u32
rev	arch/powerpc/include/asm/immap_85xx.h	/^	struct rio_rev_ctrl	rev;$/;"	m	struct:ccsr_rio	typeref:struct:rio_rev_ctrl
rev	arch/x86/include/asm/fsp/fsp_fv.h	/^	u8			rev;$/;"	m	struct:fv_header	typeref:typename:u8
rev	arch/x86/include/asm/sfi.h	/^	u8	rev;$/;"	m	struct:sfi_table_header	typeref:typename:u8
rev	board/keymile/common/common.h	/^	u8	rev;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
rev	board/keymile/common/common.h	/^	unsigned char	rev;$/;"	m	struct:km_bec_fpga	typeref:typename:unsigned char
rev	drivers/rtc/ftrtc010.c	/^	unsigned int rev;		\/* 0x3c *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
rev	include/andestech/andes_pcu.h	/^	unsigned int	rev;		\/* 0x00 - PCU Revision *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
rev	include/ddr_spd.h	/^	unsigned char rev[2];      \/* 91 Revision Code *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[2]
rev	include/ddr_spd.h	/^	unsigned char rev[2];      \/* 91 Revision Code *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char[2]
rev	include/efi_api.h	/^	u64 rev;$/;"	m	struct:efi_pxe	typeref:typename:u64
rev	include/faraday/ftsdc010.h	/^	unsigned int	rev;		\/* 0x48 - revision reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rev	include/faraday/ftsdc010.h	/^	unsigned int	rev;		\/* 0xa0 - revision reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rev	include/linux/mtd/omap_elm.h	/^	u32 rev;				\/* 0x000 *\/$/;"	m	struct:elm	typeref:typename:u32
rev	include/spd.h	/^	unsigned char rev[2];      \/* 91 Revision Code *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[2]
rev1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev1[0x4c];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0x4c]
rev1	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 rev1;		\/* Reserved *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
rev2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev2[0xe0];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0xe0]
rev2	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 rev2;		\/* Reserved *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
rev2_silicon_pci_ioregs_init	board/esd/mecp5123/mecp5123.c	/^static iopin_t rev2_silicon_pci_ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
rev2_silicon_pci_ioregs_init	board/freescale/mpc5121ads/mpc5121ads.c	/^static  iopin_t rev2_silicon_pci_ioregs_init[] = {$/;"	v	typeref:typename:iopin_t[]	file:
rev3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev3[0xc];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0xc]
rev4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev4[0x14];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0x14]
rev4	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 rev4[2];$/;"	m	struct:cpld_data	typeref:typename:u8[2]	file:
rev5	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev5[0xc];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0xc]
rev5	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 rev5[3];$/;"	m	struct:cpld_data	typeref:typename:u8[3]	file:
rev6	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev6[0x1c];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0x1c]
rev7	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u8 rev7[0x34];$/;"	m	struct:ccsr_rcpm	typeref:typename:u8[0x34]
rev_0	drivers/i2c/at91_i2c.h	/^	u32 rev_0[3];$/;"	m	struct:at91_i2c_regs	typeref:typename:u32[3]
rev_1	drivers/i2c/at91_i2c.h	/^	u32 rev_1;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
rev_2	drivers/i2c/at91_i2c.h	/^	u32 rev_2;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
rev_3	drivers/i2c/at91_i2c.h	/^	u32 rev_3;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
rev_4	drivers/i2c/at91_i2c.h	/^	u32 rev_4[29];$/;"	m	struct:at91_i2c_regs	typeref:typename:u32[29]
rev_5	drivers/i2c/at91_i2c.h	/^	u32 rev_5[6];$/;"	m	struct:at91_i2c_regs	typeref:typename:u32[6]
rev_dep	scripts/kconfig/expr.h	/^	struct expr_value rev_dep;$/;"	m	struct:symbol	typeref:struct:expr_value
rev_detection_pad	board/wandboard/wandboard.c	/^static iomux_v3_cfg_t const rev_detection_pad[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
rev_id	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 rev_id;				\/* 0x00 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
rev_no	drivers/mmc/mxcmmc.c	/^	u16			rev_no;$/;"	m	struct:mxcmci_host	typeref:typename:u16	file:
rev_no	drivers/mmc/mxcmmc.c	/^	u32 rev_no;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
rev_s	arch/arm/cpu/armv7/omap3/sys_info.c	/^static char *rev_s[CPU_3XX_MAX_REV] = {$/;"	v	typeref:typename:char * []	file:
rev_s_37xx	arch/arm/cpu/armv7/omap3/sys_info.c	/^static char *rev_s_37xx[CPU_37XX_MAX_REV] = {$/;"	v	typeref:typename:char * []	file:
rev_scheme	board/raspberrypi/rpi/rpi.c	/^static uint32_t rev_scheme;$/;"	v	typeref:typename:uint32_t	file:
rev_type	board/raspberrypi/rpi/rpi.c	/^static uint32_t rev_type;$/;"	v	typeref:typename:uint32_t	file:
reverse_byte	tools/pblimage.c	/^static uint32_t reverse_byte(uint32_t val)$/;"	f	typeref:typename:uint32_t	file:
reverse_name_search	common/env_attr.c	/^static int reverse_name_search(const char *searched, const char *search_for,$/;"	f	typeref:typename:int	file:
reverse_panel	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	int			reverse_panel;$/;"	m	struct:mipi_dsim_lcd_device	typeref:typename:int
revid	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	revid;$/;"	m	struct:davinci_aintc_regs	typeref:typename:dv_reg
revid	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	revid;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
revid	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	revid;$/;"	m	struct:davinci_psc_regs	typeref:typename:dv_reg
revid	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	revid;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
revid	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long revid;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
revid	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 revid;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
revid	arch/blackfin/include/asm/serial4.h	/^	u32 revid;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
revid	drivers/video/da8xx-fb.c	/^	u32	revid;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
revid1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	revid1;$/;"	m	struct:davinci_uart_ctrl_regs	typeref:typename:dv_reg
revid2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	revid2;$/;"	m	struct:davinci_uart_ctrl_regs	typeref:typename:dv_reg
revid_cc	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 revid_cc;$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
revision	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 revision;$/;"	m	struct:dma4	typeref:typename:u32
revision	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 revision;				\/* 0x00 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
revision	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 revision;				\/* 0x00 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
revision	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 revision;           \/* 0x0000 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
revision	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	unsigned char revision;$/;"	m	struct:link_train	typeref:typename:unsigned char
revision	arch/arm/include/asm/setup.h	/^		struct tag_revision	revision;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_revision
revision	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	revision;$/;"	m	struct:global_ctl_regs	typeref:typename:u32
revision	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	revision;$/;"	m	struct:qm_cfg_reg	typeref:typename:u32
revision	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg	revision;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
revision	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32	revision;$/;"	m	struct:ohci_regs	typeref:typename:__u32
revision	arch/nds32/include/asm/setup.h	/^		struct tag_revision	revision;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_revision
revision	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32	revision;$/;"	m	struct:ohci_regs	typeref:typename:__u32
revision	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 revision;$/;"	m	struct:ohci_regs	typeref:typename:__u32
revision	arch/x86/include/asm/acpi_table.h	/^	u8 revision;		\/* 0 for ACPI 1.0, others 2 *\/$/;"	m	struct:acpi_rsdp	typeref:typename:u8
revision	arch/x86/include/asm/acpi_table.h	/^	u8 revision;		\/* Table version (not ACPI version!) *\/$/;"	m	struct:acpi_table_header	typeref:typename:u8
revision	board/gumstix/pepper/board.h	/^	unsigned char revision;$/;"	m	struct:pepper_board_id	typeref:typename:unsigned char
revision	board/overo/overo.c	/^	unsigned char revision;$/;"	m	struct:__anona18b42d20108	typeref:typename:unsigned char	file:
revision	board/raspberrypi/rpi/rpi.c	/^static uint32_t revision;$/;"	v	typeref:typename:uint32_t	file:
revision	board/ti/beagle/beagle.c	/^	unsigned char revision;$/;"	m	struct:__anon1bf8eac80108	typeref:typename:unsigned char	file:
revision	drivers/block/ftide020.h	/^	unsigned int	revision;	\/* 0x38 - Revision No. of FTIDE020_S *\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
revision	drivers/sound/wm8994.c	/^	int revision;			\/* Revision *\/$/;"	m	struct:wm8994_priv	typeref:typename:int	file:
revision	drivers/usb/dwc3/core.h	/^	u32			revision;$/;"	m	struct:dwc3	typeref:typename:u32
revision	drivers/usb/emul/sandbox_flash.c	/^	char revision[4];$/;"	m	struct:scsi_inquiry_resp	typeref:typename:char[4]	file:
revision	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 revision;$/;"	m	struct:ohci_regs	typeref:typename:__u32
revision	drivers/usb/host/ohci.h	/^	__u32	revision;$/;"	m	struct:ohci_regs	typeref:typename:__u32
revision	drivers/usb/host/xhci-keystone.c	/^	u32 revision;	\/* 0x000 *\/$/;"	m	struct:kdwc3_irq_regs	typeref:typename:u32	file:
revision	drivers/usb/host/xhci.h	/^	u32	revision;$/;"	m	struct:xhci_protocol_caps	typeref:typename:u32
revision	drivers/usb/musb-new/musb_dsps.c	/^	u16	revision;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
revision	drivers/usb/musb/am35x.h	/^	u32	revision;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
revision	drivers/usb/musb/omap3.c	/^	u32	revision;$/;"	m	struct:omap3_otg_regs	typeref:typename:u32	file:
revision	drivers/video/tegra124/dp.c	/^	u8 revision;$/;"	m	struct:tegra_dp_priv	typeref:typename:u8	file:
revision	include/blk.h	/^	char		revision[8+1];	\/* firmware revision *\/$/;"	m	struct:blk_desc	typeref:typename:char[]
revision	include/configs/tam3517-common.h	/^	unsigned int revision;$/;"	m	struct:tam3517_module_info	typeref:typename:unsigned int
revision	include/ec_commands.h	/^	char revision[32];  \/* Mask version *\/$/;"	m	struct:ec_response_get_chip_info	typeref:typename:char[32]
revision	include/edid.h	/^	unsigned char revision;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
revision	include/edid.h	/^	unsigned char revision;$/;"	m	struct:edid_cea861_info	typeref:typename:unsigned char
revision	include/efi.h	/^	u32 revision;$/;"	m	struct:efi_table_hdr	typeref:typename:u32
revision	include/efi_api.h	/^	u32 revision;$/;"	m	struct:efi_loaded_image	typeref:typename:u32
revision	include/efi_api.h	/^	u64 revision;$/;"	m	struct:efi_block_io	typeref:typename:u64
revision	include/efi_api.h	/^	u64 revision;$/;"	m	struct:efi_simple_network	typeref:typename:u64
revision	include/fsl-mc/fsl_dpmng.h	/^	uint32_t revision;$/;"	m	struct:mc_version	typeref:typename:uint32_t
revision	include/fsl_qe.h	/^		u8 revision;	\/* The microcode version revision *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u8
revision	include/linux/fb.h	/^	__u8  revision;			\/* ...and revision *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8
revision	include/linux/mtd/nand.h	/^	__le16 revision;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
revision	include/linux/mtd/nand.h	/^	__le16 revision;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
revision	include/linux/usb/xhci-omap.h	/^	u32 revision;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
revision	include/part_efi.h	/^	__le32 revision;$/;"	m	struct:_gpt_header	typeref:typename:__le32
revision	tools/mxsimage.h	/^	uint16_t	revision;$/;"	m	struct:sb_boot_image_version	typeref:typename:uint16_t
revision_id	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 revision_id;			\/* 0x001 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
revision_id	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t revision_id;		\/* 0xff applies to all steppings *\/$/;"	m	struct:pch_azalia_verb_table_header	typeref:typename:uint8_t
revision_id	drivers/net/e1000.h	/^	uint8_t revision_id;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t
revision_level	include/ext_common.h	/^	__le32 revision_level;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
revisionid	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 revisionid;$/;"	m	struct:rk3288_msch	typeref:typename:u32
revk_blk_list	fs/ext4/ext4_journal.c	/^static struct revoke_blk_list *revk_blk_list;$/;"	v	typeref:struct:revoke_blk_list *	file:
revnb_hi	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short revnb_hi;        \/* 0x04 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
revnb_hi	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short revnb_hi;	\/* 0x04 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
revnb_hi	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short revnb_hi;	\/* 0x04 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
revnb_lo	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short revnb_lo;        \/* 0x00 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
revnb_lo	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short revnb_lo;	\/* 0x00 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
revnb_lo	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short revnb_lo;	\/* 0x00 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
revoke_blk_list	fs/ext4/ext4_journal.h	/^struct revoke_blk_list {$/;"	s
revr	drivers/i2c/fti2c010.h	/^	uint32_t revr;\/* 0x30: revision register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
revr	drivers/net/ftgmac100.h	/^	unsigned int	revr;		\/* 0x40 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
revr	drivers/net/ftmac110.h	/^	uint32_t revr;   \/* 0x34: Revision Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
rewrite_ecc_parity	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static void rewrite_ecc_parity(void *ptr, int par)$/;"	f	typeref:typename:void	file:
rext	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rext;		\/* 0x58: EMC_REXT *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rf_compy_select	drivers/phy/marvell/comphy_a3700.h	/^#define rf_compy_select(/;"	d
rf_data_width_mask	drivers/phy/marvell/comphy_a3700.h	/^#define rf_data_width_mask	/;"	d
rf_data_width_shift	drivers/phy/marvell/comphy_a3700.h	/^#define rf_data_width_shift	/;"	d
rf_gen_rx_sel_shift	drivers/phy/marvell/comphy_a3700.h	/^#define rf_gen_rx_sel_shift	/;"	d
rf_gen_rx_select	drivers/phy/marvell/comphy_a3700.h	/^#define rf_gen_rx_select	/;"	d
rf_gen_tx_sel_shift	drivers/phy/marvell/comphy_a3700.h	/^#define rf_gen_tx_sel_shift	/;"	d
rf_gen_tx_select	drivers/phy/marvell/comphy_a3700.h	/^#define rf_gen_tx_select	/;"	d
rf_phy_mode_mask	drivers/phy/marvell/comphy_a3700.h	/^#define rf_phy_mode_mask	/;"	d
rf_phy_mode_shift	drivers/phy/marvell/comphy_a3700.h	/^#define rf_phy_mode_shift	/;"	d
rf_ref1m_gen_div_value_mask	drivers/phy/marvell/comphy_a3700.h	/^#define rf_ref1m_gen_div_value_mask	/;"	d
rf_ref1m_gen_div_value_shift	drivers/phy/marvell/comphy_a3700.h	/^#define rf_ref1m_gen_div_value_shift	/;"	d
rf_ref_freq_sel_mask	drivers/phy/marvell/comphy_a3700.h	/^#define rf_ref_freq_sel_mask	/;"	d
rf_ref_freq_sel_shift	drivers/phy/marvell/comphy_a3700.h	/^#define rf_ref_freq_sel_shift	/;"	d
rfalarm	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfalarm;	\/* PSC + 0xC4 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfalarm	include/mpc5xxx.h	/^	volatile u16	rfalarm;	\/* PSC + 0x6e *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rfar	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rfar;		\/* 0x198 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rfbi	arch/arm/dts/am4372.dtsi	/^			rfbi: rfbi@4832a800 {$/;"	l	label:dss
rfc	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rfc;		\/* 0x30: EMC_RFC *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rfc	drivers/net/e1000.h	/^	uint64_t rfc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rfc822_strip_comments	scripts/get_maintainer.pl	/^sub rfc822_strip_comments {$/;"	s
rfc822_valid	scripts/get_maintainer.pl	/^sub rfc822_valid {$/;"	s
rfc822_validlist	scripts/get_maintainer.pl	/^sub rfc822_validlist {$/;"	s
rfc_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u16 rfc_table[] = {$/;"	v	typeref:typename:u16[]
rfcmd	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfcmd;		\/* PSC + 0xC0 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfcnt	include/commproc.h	/^	ushort	rfcnt;		\/* received frames count *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
rfcntl	include/mpc5xxx.h	/^	volatile u8	rfcntl;		\/* PSC + 0x68 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
rfcount	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfcount;	\/* PSC + 0xD4 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfcr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rfcr;		\/* 0x18C *\/$/;"	m	struct:fecdma	typeref:typename:u32
rfcr	include/commproc.h	/^	uchar	rfcr;		\/* Rx function code *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:uchar
rfcr	include/usb/mpc8xx_udc.h	/^	char rfcr;	\/* Rx Function code *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:char
rfcr	post/cpu/mpc8xx/usb.c	/^	uchar rfcr;$/;"	m	struct:usb_param_block	typeref:typename:uchar	file:
rfcs	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rfcs;		\/* RX FCS Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rfcs	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rfcs;		\/* 0x246a4 - Receive FCS Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rfcs	include/fsl_dtsec.h	/^	u32	rfcs;		\/* Receive FCS error *\/$/;"	m	struct:dtsec	typeref:typename:u32
rfcs	include/tsec.h	/^	u32	rfcs;		\/* Receive FCS Error Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rfdata	include/mpc5xxx.h	/^	volatile u32	rfdata;		\/* PSC + 0x60 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u32
rfdata_16	arch/powerpc/include/asm/immap_512x.h	/^#define rfdata_16	/;"	d
rfdata_32	arch/powerpc/include/asm/immap_512x.h	/^#define rfdata_32	/;"	d
rfdata_8	arch/powerpc/include/asm/immap_512x.h	/^#define rfdata_8	/;"	d
rfdata_buffer	arch/powerpc/include/asm/immap_512x.h	/^	} rfdata_buffer;$/;"	m	struct:psc512x	typeref:union:psc512x::__anond569131d060a
rfdr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 rfdr[16];	\/* 0x7C *\/$/;"	m	struct:dspi	typeref:typename:u32[16]
rfdr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 rfdr[4];	\/* 0x7C *\/$/;"	m	struct:dspi	typeref:typename:u32[4]
rfdr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rfdr;		\/* 0x184 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rfdr	include/fsl_dspi.h	/^	u32 rfdr[16];	\/* 0x7C *\/$/;"	m	struct:dspi	typeref:typename:u32[16]
rfdr	include/fsl_dspi.h	/^	u32 rfdr[4];	\/* 0x7C *\/$/;"	m	struct:dspi	typeref:typename:u32[4]
rffd	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rffd;$/;"	m	struct:autocal_regs	typeref:typename:u32	file:
rffd	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rffd;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rffd_max	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rffd_max;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rffd_min	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rffd_min;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rffd_size	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rffd_size;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rfifo	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 rfifo;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
rfifo	drivers/serial/serial_meson.c	/^	u32 rfifo;$/;"	m	struct:meson_uart	typeref:typename:u32	file:
rfifo_alarm	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_alarm;		\/* MBAR_ETH + 0x198 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_cmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	rfifo_cmap;	\/* 0x70 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
rfifo_cmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	rfifo_cmap;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
rfifo_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_cntrl;		\/* MBAR_ETH + 0x18C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_data;		\/* MBAR_ETH + 0x184 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_lrf_ptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_lrf_ptr;		\/* MBAR_ETH + 0x190 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_lwf_ptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_lwf_ptr;		\/* MBAR_ETH + 0x194 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_print	drivers/net/mpc5xxx_fec.c	/^static void rfifo_print(char *devname, mpc5xxx_fec_priv *fec)$/;"	f	typeref:typename:void	file:
rfifo_rdptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_rdptr;		\/* MBAR_ETH + 0x19C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_status	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_status;		\/* MBAR_ETH + 0x188 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfifo_wrptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rfifo_wrptr;		\/* MBAR_ETH + 0x1A0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rfintmask	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfintmask;	\/* PSC + 0xD0 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfintstat	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfintstat;	\/* PSC + 0xCC *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfl	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int rfl;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
rflr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rflr;		\/* RX Frame Len Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rflr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rflr;		\/* 0x246c0 - Receive Frame Length Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rflr	include/fsl_dtsec.h	/^	u32	rflr;		\/* Receive frame length error *\/$/;"	m	struct:dtsec	typeref:typename:u32
rflr	include/tsec.h	/^	u32	rflr;		\/* Receive Frame Length Error *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rflrfptr	include/mpc5xxx.h	/^	volatile u16	rflrfptr;	\/* PSC + 0x7a *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rflwfptr	include/mpc5xxx.h	/^	volatile u16	rflwfptr;	\/* PSC + 0x7e *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rfmmr	arch/m68k/include/asm/immap_5275.h	/^	u16 rfmmr;$/;"	m	struct:usb	typeref:typename:u16
rfmr	arch/m68k/include/asm/immap_5275.h	/^	u16 rfmr;$/;"	m	struct:usb	typeref:typename:u16
rfnum	include/mpc5xxx.h	/^	volatile u16	rfnum;		\/* PSC + 0x58 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rfr	arch/m68k/include/asm/coldfire/dspi.h	/^	u16 rfr;	\/* 0x3A - POPR *\/$/;"	m	struct:dspi	typeref:typename:u16
rfr	include/fsl_dspi.h	/^	u32 rfr;	\/* 0x38 - POPR *\/$/;"	m	struct:dspi	typeref:typename:u32
rfr1	arch/powerpc/include/asm/immap_83xx.h	/^	u16 rfr1;		\/* Timer1 Reference Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
rfr2	arch/powerpc/include/asm/immap_83xx.h	/^	u16 rfr2;		\/* Timer2 Reference Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
rfr3	arch/powerpc/include/asm/immap_83xx.h	/^	u16 rfr3;		\/* Timer3 Reference Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
rfr4	arch/powerpc/include/asm/immap_83xx.h	/^	u16 rfr4;		\/* Timer4 Reference Register *\/$/;"	m	struct:gtm83xx	typeref:typename:u16
rfr_ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rfr_ctrl;		\/* 0x84 || 0xD4 *\/$/;"	m	struct:sdrc_cs	typeref:typename:u32
rfr_ctrl	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 rfr_ctrl;$/;"	m	struct:board_sdrc_timings	typeref:typename:u32
rfreq	lib/bzip2/bzlib_private.h	/^      Int32    rfreq   [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32[][]
rfrg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rfrg;		\/* RX Fragments Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rfrg	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rfrg;		\/* 0x246d4 - Receive Fragments Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rfrg	include/fsl_dtsec.h	/^	u32	rfrg;		\/* Receive fragments counter *\/$/;"	m	struct:dtsec	typeref:typename:u32
rfrg	include/tsec.h	/^	u32	rfrg;		\/* Receive Fragments *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rfrp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rfrp;		\/* 0x19C *\/$/;"	m	struct:fecdma	typeref:typename:u32
rfrptr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u16	rfrptr;		\/* PSC + 0xDA *\/$/;"	m	struct:psc512x	typeref:typename:volatile u16
rfrptr	include/mpc5xxx.h	/^	volatile u16	rfrptr;		\/* PSC + 0x72 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rfs	include/i2s.h	/^	unsigned int rfs;		\/* LR clock frame size *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
rfsc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 rfsc;		\/* 0x094 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 rfshctl0;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 rfshctl0;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 rfshctl0;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 rfshctl0;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rfshctl0;		\/* 0x50 refresh control register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 rfshctl0;		\/* 0x50 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 rfshctl0;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 rfshctl0;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 rfshctl0;		\/* 0x8c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl0	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rfshctl0;		\/* 0x50 refresh control register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 rfshctl1;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 rfshctl1;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 rfshctl1;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 rfshctl1;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rfshctl1;		\/* 0x54 refresh control register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 rfshctl1;		\/* 0x54 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 rfshctl1;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 rfshctl1;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 rfshctl1;		\/* 0x94 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl1	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rfshctl1;		\/* 0x54 refresh control register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 rfshctl3;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl3	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rfshctl3;		\/* 0x60 refresh control register 3 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 rfshctl3;		\/* 0x60 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshctl3	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rfshctl3;		\/* 0x60 refresh control register 3 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 rfshtmg;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 rfshtmg;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 rfshtmg;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 rfshtmg;		\/* 0x90 refresh timing *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rfshtmg;		\/* 0x64 refresh timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 rfshtmg;		\/* 0x64 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 rfshtmg;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 rfshtmg;		\/* 0x90 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 rfshtmg;		\/* 0x90 refresh timing *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfshtmg	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rfshtmg;		\/* 0x64 refresh timing register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
rfsize	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfsize;		\/* PSC + 0xDC *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfsr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rfsr;		\/* 0x188 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rfstat	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	rfstat;		\/* PSC + 0xC8 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
rfstat	include/mpc5xxx.h	/^	volatile u16	rfstat;		\/* PSC + 0x64 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rfthr	include/commproc.h	/^	ushort	rfthr;		\/* received frames threshold *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
rfu	arch/x86/include/asm/pirq_routing.h	/^	u8 rfu;$/;"	m	struct:irq_info	typeref:typename:u8
rfu	arch/x86/include/asm/pirq_routing.h	/^	u8 rfu[11];$/;"	m	struct:irq_routing_table	typeref:typename:u8[11]
rfw	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int rfw;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
rfwp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rfwp;		\/* 0x1A0 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rfwptr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u16	rfwptr;		\/* PSC + 0xD8 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u16
rfwptr	include/mpc5xxx.h	/^	volatile u16	rfwptr;		\/* PSC + 0x76 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
rg_att0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rg_att0;		\/* 0x48 *\/$/;"	m	struct:sms	typeref:typename:u32
rgb	include/ec_commands.h	/^		struct rgb {$/;"	s	union:ec_params_lightbar::__anon71a6b267010a
rgb	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
rgb	include/ec_commands.h	/^		} rgb;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::rgb
rgb2ycbcr_coeff	drivers/video/ipu_disp.c	/^static const int rgb2ycbcr_coeff[5][3] = {$/;"	v	typeref:typename:const int[5][3]	file:
rgb_data_tab	drivers/video/tegra.c	/^static const u32 rgb_data_tab[PIN_REG_COUNT] = {$/;"	v	typeref:typename:const u32[]	file:
rgb_enable	drivers/video/tegra.c	/^static void rgb_enable(struct dc_com_reg *com)$/;"	f	typeref:typename:void	file:
rgb_enb_tab	drivers/video/tegra.c	/^static const u32 rgb_enb_tab[PIN_REG_COUNT] = {$/;"	v	typeref:typename:const u32[]	file:
rgb_mode	drivers/video/exynos/exynos_fb.c	/^	unsigned int rgb_mode;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
rgb_mode	include/exynos_lcd.h	/^	unsigned int rgb_mode;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
rgb_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const rgb_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
rgb_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const rgb_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
rgb_polarity_tab	drivers/video/tegra.c	/^static const u32 rgb_polarity_tab[PIN_REG_COUNT] = {$/;"	v	typeref:typename:const u32[]	file:
rgb_s	include/ec_commands.h	/^struct rgb_s {$/;"	s
rgb_sel_tab	drivers/video/tegra.c	/^static const u32 rgb_sel_tab[PIN_OUTPUT_SEL_COUNT] = {$/;"	v	typeref:typename:const u32[]	file:
rgb_t	tools/easylogo/easylogo.c	/^} rgb_t;$/;"	t	typeref:struct:__anonbf0fd82b0208	file:
rgb_to_yuv	drivers/video/ipu_disp.c	/^static int rgb_to_yuv(int n, int red, int green, int blue)$/;"	f	typeref:typename:int	file:
rgftgfrxglobal	drivers/qe/uec.h	/^	u32  rgftgfrxglobal;$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u32
rgmii0usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	rgmii0usefpga;			\/* 0x714 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
rgmii1_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1_pin_mux	board/gumstix/pepper/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux rgmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii1usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	rgmii1usefpga;			\/* 0x6f8 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
rgmii2_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux rgmii2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii2_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux rgmii2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii2_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux rgmii2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rgmii_0_eth_tse_0	arch/nios2/dts/10m50_devboard.dts	/^		rgmii_0_eth_tse_0: ethernet@400 {$/;"	l	label:sopc0
rgmii_0_eth_tse_0_mdio	arch/nios2/dts/10m50_devboard.dts	/^			rgmii_0_eth_tse_0_mdio: mdio {$/;"	l	label:sopc0.rgmii_0_eth_tse_0
rgmii_1588_sel	board/freescale/ls1046ardb/cpld.h	/^	u8 rgmii_1588_sel;	\/* 0xB - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
rgmii_ctrl	drivers/net/pch_gbe.h	/^	u32 rgmii_ctrl;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rgmii_phy1	arch/arm/dts/ls1021a-qds.dtsi	/^				rgmii_phy1: ethernet-phy@1 {$/;"	l	label:fpga.ls1021amdio0
rgmii_phy1	arch/arm/dts/ls1021a-twr.dtsi	/^	rgmii_phy1: ethernet-phy@1 {$/;"	l
rgmii_phy2	arch/arm/dts/ls1021a-qds.dtsi	/^				rgmii_phy2: ethernet-phy@2 {$/;"	l	label:fpga.ls1021amdio1
rgmii_phy3	arch/arm/dts/ls1021a-qds.dtsi	/^				rgmii_phy3: ethernet-phy@3 {$/;"	l	label:fpga.ls1021amdio2
rgmii_pins	arch/arm/dts/rk3288.dtsi	/^			rgmii_pins: rgmii-pins {$/;"	l
rgmii_pins	arch/arm/dts/sun50i-a64.dtsi	/^			rgmii_pins: rgmii_pins {$/;"	l	label:pio
rgmii_st	drivers/net/pch_gbe.h	/^	u32 rgmii_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rh	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct virt_root_hub rh;$/;"	m	struct:ohci	typeref:struct:virt_root_hub
rh	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct virt_root_hub rh;$/;"	m	struct:ohci	typeref:struct:virt_root_hub
rh	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct virt_root_hub rh;$/;"	m	struct:ohci	typeref:struct:virt_root_hub
rh	arch/sparc/cpu/leon3/usb_uhci.c	/^static struct virt_root_hub rh;	\/* struct for root hub *\/$/;"	v	typeref:struct:virt_root_hub	file:
rh	board/mpl/common/usb_uhci.c	/^static struct virt_root_hub rh;   \/* struct for root hub *\/$/;"	v	typeref:struct:virt_root_hub	file:
rh	drivers/usb/host/ohci-s3c24xx.h	/^	struct virt_root_hub rh;$/;"	m	struct:ohci	typeref:struct:virt_root_hub
rh	drivers/usb/host/ohci.h	/^	struct virt_root_hub rh;$/;"	m	struct:ohci	typeref:struct:virt_root_hub
rh_check_port_status	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int rh_check_port_status(ohci_t *controller)$/;"	f	typeref:typename:int
rh_check_port_status	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int rh_check_port_status(ohci_t *controller)$/;"	f	typeref:typename:int
rh_check_port_status	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int rh_check_port_status(ohci_t *controller)$/;"	f	typeref:typename:int
rh_check_port_status	drivers/usb/host/isp116x-hcd.c	/^static int rh_check_port_status(struct isp116x *isp116x)$/;"	f	typeref:typename:int	file:
rh_check_port_status	drivers/usb/host/ohci-hcd.c	/^int rh_check_port_status(ohci_t *controller)$/;"	f	typeref:typename:int
rh_check_port_status	drivers/usb/host/ohci-s3c24xx.c	/^int rh_check_port_status(struct ohci *controller)$/;"	f	typeref:typename:int
rh_devnum	drivers/usb/host/isp116x-hcd.c	/^static int rh_devnum;		\/* address of Root Hub endpoint *\/$/;"	v	typeref:typename:int	file:
rh_devnum	drivers/usb/host/r8a66597.h	/^	unsigned char rh_devnum;$/;"	m	struct:r8a66597	typeref:typename:unsigned char
rh_devnum	drivers/usb/musb/musb_hcd.c	/^static int rh_devnum;$/;"	v	typeref:typename:int	file:
rh_status	drivers/usb/host/sl811-hcd.c	/^static struct usb_port_status rh_status = { 0 };\/* root hub port status *\/$/;"	v	typeref:struct:usb_port_status	file:
rh_timer	drivers/usb/musb-new/musb_core.h	/^	unsigned long		rh_timer;$/;"	m	struct:musb	typeref:typename:unsigned long
rh_vs0_a	drivers/phy/marvell/comphy_a3700.h	/^#define rh_vs0_a	/;"	d
rh_vs0_d	drivers/phy/marvell/comphy_a3700.h	/^#define rh_vs0_d	/;"	d
rh_vsreg_addr	drivers/phy/marvell/comphy_a3700.h	/^#define rh_vsreg_addr	/;"	d
rh_vsreg_data	drivers/phy/marvell/comphy_a3700.h	/^#define rh_vsreg_data	/;"	d
rhdesca	drivers/usb/host/isp116x.h	/^	u32 rhdesca;$/;"	m	struct:isp116x	typeref:typename:u32
rhdescb	drivers/usb/host/isp116x.h	/^	u32 rhdescb;$/;"	m	struct:isp116x	typeref:typename:u32
rhm	include/fsl_memac.h	/^	u32 rhm;	\/* Rx HiGig2 message counter register *\/$/;"	m	struct:memac	typeref:typename:u32
rhoh	tools/mxsboot.c	/^		uint8_t			rhoh;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
rhport	drivers/usb/host/isp116x.h	/^	u32 rhport[2];$/;"	m	struct:isp116x	typeref:typename:u32[2]
rhr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	rhr;	\/* Receive Holding Register RO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
rhr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rhr;		\/* 0x088 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rhr	drivers/i2c/at91_i2c.h	/^	u32 rhr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
rhr	drivers/serial/atmel_usart.h	/^	u32	rhr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
rhstatus	drivers/usb/host/isp116x.h	/^	u32 rhstatus;$/;"	m	struct:isp116x	typeref:typename:u32
ri	drivers/net/mvpp2.c	/^	u32 ri;$/;"	m	struct:mvpp2_prs_shadow	typeref:typename:u32	file:
ri_mask	drivers/net/mvpp2.c	/^	u32 ri_mask;$/;"	m	struct:mvpp2_prs_shadow	typeref:typename:u32	file:
rid	board/micronas/vct/scc.h	/^		u32 rid:2;	\/* Register Identifier			*\/$/;"	m	struct:scc_cmd::__anon903167320108	typeref:typename:u32:2
rid	drivers/tpm/tpm_tis_lpc.c	/^	u8 rid;$/;"	m	struct:tpm_locality	typeref:typename:u8	file:
ridr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 ridr;$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32
right	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 right;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443308	typeref:typename:u32
right	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 right;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443408	typeref:typename:u32
right	scripts/kconfig/expr.h	/^	union expr_data left, right;$/;"	m	struct:expr	typeref:union:expr_data
right_keycode	drivers/input/input.c	/^	int right_keycode;	\/* Right keycode to select this map *\/$/;"	m	struct:kbd_entry	typeref:typename:int	file:
right_keycode	include/input.h	/^	int right_keycode;$/;"	m	struct:input_key_xlate	typeref:typename:int
right_margin	drivers/video/videomodes.h	/^	int right_margin;	\/* time from picture to sync	*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
right_margin	include/linux/fb.h	/^	__u32 right_margin;		\/* time from picture to sync	*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
right_margin	include/linux/fb.h	/^	u32 right_margin;$/;"	m	struct:fb_videomode	typeref:typename:u32
right_znode	fs/ubifs/tnc.c	/^static struct ubifs_znode *right_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *	file:
rigid_disk_block	disk/part_amiga.h	/^struct rigid_disk_block$/;"	s
rinfo	drivers/video/ati_radeon_fb.c	/^struct radeonfb_info *rinfo;$/;"	v	typeref:struct:radeonfb_info *
ring	arch/powerpc/include/asm/immap_85xx.h	/^		} ring[2];$/;"	m	struct:ccsr_raide::__anondcd7518a0c08	typeref:struct:ccsr_raide::__anondcd7518a0c08::__anondcd7518a0d08[2]
ring	drivers/usb/host/xhci.h	/^	struct xhci_ring		*ring;$/;"	m	struct:xhci_virt_ep	typeref:struct:xhci_ring *
ring	drivers/usb/musb-new/musb_host.h	/^	struct list_head	ring;		\/* of musb_qh *\/$/;"	m	struct:musb_qh	typeref:struct:list_head
ring_index	include/linux/ethtool.h	/^	__u32	ring_index[0];$/;"	m	struct:ethtool_rxfh_indir	typeref:typename:__u32[0]
rint	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 rint;		\/* 0x38 raw interrupt status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
rint	arch/arm/include/asm/arch/mmc.h	/^	u32 rint;		\/* 0x38 raw interrupt status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
rintf	post/lib_powerpc/fpu/20010114-2.c	/^static float rintf (float x)$/;"	f	typeref:typename:GNU_FPOST_ATTR float	file:
rio1liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio1liodnr;	\/* RIO 1 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio1maintliodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio1maintliodnr;\/* RIO 1 Maintenance LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio2liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio2liodnr;	\/* RIO 2 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio2maintliodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio2maintliodnr;\/* RIO 2 Maintenance LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio3liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio3liodnr;	\/* RIO 3 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio3maintliodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio3maintliodnr;\/* RIO 3 Maintenance LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio4liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio4liodnr;	\/* RIO 4 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio4maintliodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rio4maintliodnr;\/* RIO 4 Maintenance LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rio_arch	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_arch {$/;"	s
rio_atmu	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_atmu {$/;"	s
rio_atmu_riw	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_atmu_riw {$/;"	s
rio_atmu_row	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_atmu_row {$/;"	s
rio_atmu_win	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_atmu_win {$/;"	s
rio_dbell	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_dbell {$/;"	s
rio_impl_common	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_impl_common {$/;"	s
rio_impl_port_spec	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_impl_port_spec {$/;"	s
rio_implement	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_implement {$/;"	s
rio_liodn	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_liodn {$/;"	s
rio_logical_err	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_logical_err {$/;"	s
rio_lp_serial	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_lp_serial {$/;"	s
rio_lp_serial_port	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_lp_serial_port {$/;"	s
rio_msg	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_msg {$/;"	s
rio_phys_err	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_phys_err {$/;"	s
rio_phys_err_port	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_phys_err_port {$/;"	s
rio_pw	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_pw {$/;"	s
rio_rev_ctrl	arch/powerpc/include/asm/immap_85xx.h	/^struct rio_rev_ctrl {$/;"	s
riotboard_boot_modes	board/embest/mx6boards/mx6boards.c	/^static const struct boot_mode riotboard_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]	file:
riotboard_usdhc3_pads	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const riotboard_usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
ris	drivers/spi/lpc32xx_ssp.c	/^	u32 ris;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
risc_rx	drivers/qe/uec.h	/^	unsigned int			risc_rx;$/;"	m	struct:uec_info	typeref:typename:unsigned int
risc_tx	drivers/qe/uec.h	/^	unsigned int			risc_tx;$/;"	m	struct:uec_info	typeref:typename:unsigned int
riser_phy_addr	board/freescale/p2041rdb/eth.c	/^static int riser_phy_addr[] = {$/;"	v	typeref:typename:int[]	file:
riser_phy_addr	board/freescale/t1040qds/eth.c	/^static int riser_phy_addr[] = {$/;"	v	typeref:typename:int[]	file:
risr	drivers/spi/rk_spi.h	/^	u32 risr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
riwar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	riwar; \/* RapidIO Inbound Attributes Register *\/$/;"	m	struct:rio_atmu_riw	typeref:typename:u32
riwar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwar0;		\/* 0xd0df0 - RapidIO Inbound Attributes Register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwar1;		\/* 0xd0dd0 - RapidIO Inbound Attributes Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwar2;		\/* 0xd0db0 - RapidIO Inbound Attributes Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwar3;		\/* 0xd0d90 - RapidIO Inbound Attributes Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwar4;		\/* 0xd0d70 - RapidIO Inbound Attributes Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwbar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	riwbar; \/* RapidIO Inbound Window Base AR *\/$/;"	m	struct:rio_atmu_riw	typeref:typename:u32
riwbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwbar1;	\/* 0xd0dc8 - RapidIO Inbound Window Base Address Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwbar2;	\/* 0xd0da8 - RapidIO Inbound Window Base Address Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwbar3;	\/* 0xd0d88 - RapidIO Inbound Window Base Address Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwbar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwbar4;	\/* 0xd0d68 - RapidIO Inbound Window Base Address Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwtar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	riwtar; \/* RapidIO Inbound Window Translation AR *\/$/;"	m	struct:rio_atmu_riw	typeref:typename:u32
riwtar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwtar0;	\/* 0xd0de0 - RapidIO Inbound Window Translation Address Register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwtar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwtar1;	\/* 0xd0dc0 - RapidIO Inbound Window Translation Address Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwtar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwtar2;	\/* 0xd0da0 - RapidIO Inbound Window Translation Address Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwtar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwtar3;	\/* 0xd0d80 - RapidIO Inbound Window Translation Address Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
riwtar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	riwtar4;	\/* 0xd0d60 - RapidIO Inbound Window Translation Address Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rjb	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 rjb;$/;"	m	struct:at91_emac	typeref:typename:u32
rjbr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rjbr;		\/* RX Jabber Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rjbr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rjbr;		\/* 0x246d8 - Receive Jabber Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rjbr	include/fsl_dtsec.h	/^	u32	rjbr;		\/* Receive jabber counter *\/$/;"	m	struct:dtsec	typeref:typename:u32
rjbr	include/tsec.h	/^	u32	rjbr;		\/* Receive Jabber *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rjc	drivers/net/e1000.h	/^	uint64_t rjc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rjtag_ctl	board/freescale/common/qixis.h	/^	u8 rjtag_ctl;$/;"	m	struct:qixis	typeref:typename:u8
rjtag_dat	board/freescale/common/qixis.h	/^	u8 rjtag_dat;$/;"	m	struct:qixis	typeref:typename:u8
rk3036_clk_bind	drivers/clk/rockchip/clk_rk3036.c	/^static int rk3036_clk_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3036_clk_get_rate	drivers/clk/rockchip/clk_rk3036.c	/^static ulong rk3036_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
rk3036_clk_ids	drivers/clk/rockchip/clk_rk3036.c	/^static const struct udevice_id rk3036_clk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3036_clk_ops	drivers/clk/rockchip/clk_rk3036.c	/^static struct clk_ops rk3036_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
rk3036_clk_priv	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^struct rk3036_clk_priv {$/;"	s
rk3036_clk_probe	drivers/clk/rockchip/clk_rk3036.c	/^static int rk3036_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3036_clk_set_rate	drivers/clk/rockchip/clk_rk3036.c	/^static ulong rk3036_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
rk3036_cru	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^struct rk3036_cru {$/;"	s
rk3036_ddr_config	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_ddr_config {$/;"	s
rk3036_ddr_pctl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_ddr_pctl {$/;"	s
rk3036_ddr_phy	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_ddr_phy {$/;"	s
rk3036_ddr_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_ddr_timing {$/;"	s
rk3036_grf	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^struct rk3036_grf {$/;"	s
rk3036_noc_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^} rk3036_noc_timing;$/;"	t	typeref:union:__anonade115c6010a
rk3036_otg_data	arch/arm/mach-rockchip/rk3036-board.c	/^static struct dwc2_plat_otg_data rk3036_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data	file:
rk3036_pctl_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_pctl_timing {$/;"	s
rk3036_phy_timing	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_phy_timing {$/;"	s
rk3036_pinctrl_get_periph_id	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static int rk3036_pinctrl_get_periph_id(struct udevice *dev,$/;"	f	typeref:typename:int	file:
rk3036_pinctrl_ids	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static const struct udevice_id rk3036_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3036_pinctrl_ops	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static struct pinctrl_ops rk3036_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
rk3036_pinctrl_priv	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^struct rk3036_pinctrl_priv {$/;"	s	file:
rk3036_pinctrl_probe	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static int rk3036_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3036_pinctrl_request	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static int rk3036_pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int	file:
rk3036_pinctrl_set_state_simple	drivers/pinctrl/rockchip/pinctrl_rk3036.c	/^static int rk3036_pinctrl_set_state_simple(struct udevice *dev,$/;"	f	typeref:typename:int	file:
rk3036_pll	arch/arm/include/asm/arch-rockchip/cru_rk3036.h	/^	struct rk3036_pll {$/;"	s	struct:rk3036_cru
rk3036_sdram_priv	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^struct rk3036_sdram_priv {$/;"	s	file:
rk3036_service_sys	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^struct rk3036_service_sys {$/;"	s
rk3036_syscon_ids	arch/arm/mach-rockchip/rk3036/syscon_rk3036.c	/^static const struct udevice_id rk3036_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3036_sysreset	drivers/sysreset/sysreset_rk3036.c	/^static struct sysreset_ops rk3036_sysreset = {$/;"	v	typeref:struct:sysreset_ops	file:
rk3036_sysreset_request	drivers/sysreset/sysreset_rk3036.c	/^int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int
rk3288_base_params	arch/arm/include/asm/arch-rockchip/sdram.h	/^struct rk3288_base_params {$/;"	s
rk3288_clk_bind	drivers/clk/rockchip/clk_rk3288.c	/^static int rk3288_clk_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_clk_configure_cpu	drivers/clk/rockchip/clk_rk3288.c	/^void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf)$/;"	f	typeref:typename:void
rk3288_clk_get_rate	drivers/clk/rockchip/clk_rk3288.c	/^static ulong rk3288_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
rk3288_clk_ids	drivers/clk/rockchip/clk_rk3288.c	/^static const struct udevice_id rk3288_clk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3288_clk_ofdata_to_platdata	drivers/clk/rockchip/clk_rk3288.c	/^static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_clk_ops	drivers/clk/rockchip/clk_rk3288.c	/^static struct clk_ops rk3288_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
rk3288_clk_plat	drivers/clk/rockchip/clk_rk3288.c	/^struct rk3288_clk_plat {$/;"	s	file:
rk3288_clk_priv	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^struct rk3288_clk_priv {$/;"	s
rk3288_clk_probe	drivers/clk/rockchip/clk_rk3288.c	/^static int rk3288_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_clk_set_rate	drivers/clk/rockchip/clk_rk3288.c	/^static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
rk3288_cru	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^struct rk3288_cru {$/;"	s
rk3288_ddr_pctl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^struct rk3288_ddr_pctl {$/;"	s
rk3288_ddr_publ	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^struct rk3288_ddr_publ {$/;"	s
rk3288_ddr_publ_datx	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^struct rk3288_ddr_publ_datx {$/;"	s
rk3288_dmc_get_info	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int rk3288_dmc_get_info(struct udevice *dev, struct ram_info *info)$/;"	f	typeref:typename:int	file:
rk3288_dmc_ids	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static const struct udevice_id rk3288_dmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3288_dmc_ofdata_to_platdata	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int rk3288_dmc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_dmc_ops	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static struct ram_ops rk3288_dmc_ops = {$/;"	v	typeref:struct:ram_ops	file:
rk3288_dmc_probe	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int rk3288_dmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_edp	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^struct rk3288_edp {$/;"	s
rk3288_grf	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^struct rk3288_grf {$/;"	s
rk3288_grf_gpio_lh	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^struct rk3288_grf_gpio_lh {$/;"	s
rk3288_hdmi	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^struct rk3288_hdmi {$/;"	s
rk3288_msch	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^struct rk3288_msch {$/;"	s
rk3288_otg_data	arch/arm/mach-rockchip/rk3288-board.c	/^static struct dwc2_plat_otg_data rk3288_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data	file:
rk3288_pdata	drivers/usb/phy/rockchip_usb2_phy.c	/^static const struct rockchip_usb2_phy_cfg rk3288_pdata = {$/;"	v	typeref:typename:const struct rockchip_usb2_phy_cfg	file:
rk3288_pin_banks	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static struct rockchip_pin_bank rk3288_pin_banks[] = {$/;"	v	typeref:struct:rockchip_pin_bank[]	file:
rk3288_pinctrl_get_gpio_mux	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_get_periph_id	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_get_periph_id(struct udevice *dev,$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_get_pin_info	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^int rk3288_pinctrl_get_pin_info(struct rk3288_pinctrl_priv *priv,$/;"	f	typeref:typename:int
rk3288_pinctrl_ids	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static const struct udevice_id rk3288_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3288_pinctrl_ops	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static struct pinctrl_ops rk3288_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
rk3288_pinctrl_parse_tables	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_parse_tables(struct rk3288_pinctrl_priv *priv,$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_priv	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^struct rk3288_pinctrl_priv {$/;"	s	file:
rk3288_pinctrl_probe	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_request	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_set_pins	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_set_state	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)$/;"	f	typeref:typename:int	file:
rk3288_pinctrl_set_state_simple	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^static int rk3288_pinctrl_set_state_simple(struct udevice *dev,$/;"	f	typeref:typename:int	file:
rk3288_pll	arch/arm/include/asm/arch-rockchip/cru_rk3288.h	/^	struct rk3288_pll {$/;"	s	struct:rk3288_cru
rk3288_pmu	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^struct rk3288_pmu {$/;"	s
rk3288_pwm	arch/arm/include/asm/arch-rockchip/pwm.h	/^struct rk3288_pwm {$/;"	s
rk3288_sdram_channel	arch/arm/include/asm/arch-rockchip/sdram.h	/^struct rk3288_sdram_channel {$/;"	s
rk3288_sdram_params	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^struct rk3288_sdram_params {$/;"	s	file:
rk3288_sdram_pctl_timing	arch/arm/include/asm/arch-rockchip/sdram.h	/^struct rk3288_sdram_pctl_timing {$/;"	s
rk3288_sdram_phy_timing	arch/arm/include/asm/arch-rockchip/sdram.h	/^struct rk3288_sdram_phy_timing {$/;"	s
rk3288_sgrf	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^struct rk3288_sgrf {$/;"	s
rk3288_syscon_bind_of_platdata	arch/arm/mach-rockchip/rk3288/syscon_rk3288.c	/^static int rk3288_syscon_bind_of_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3288_syscon_ids	arch/arm/mach-rockchip/rk3288/syscon_rk3288.c	/^static const struct udevice_id rk3288_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3288_sysreset	drivers/sysreset/sysreset_rk3288.c	/^static struct sysreset_ops rk3288_sysreset = {$/;"	v	typeref:struct:sysreset_ops	file:
rk3288_sysreset_request	drivers/sysreset/sysreset_rk3288.c	/^int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int
rk3288_vop	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^struct rk3288_vop {$/;"	s
rk3399_clk_bind	drivers/clk/rockchip/clk_rk3399.c	/^static int rk3399_clk_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3399_clk_get_rate	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
rk3399_clk_ids	drivers/clk/rockchip/clk_rk3399.c	/^static const struct udevice_id rk3399_clk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3399_clk_ofdata_to_platdata	drivers/clk/rockchip/clk_rk3399.c	/^static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3399_clk_ops	drivers/clk/rockchip/clk_rk3399.c	/^static struct clk_ops rk3399_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
rk3399_clk_priv	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^struct rk3399_clk_priv {$/;"	s
rk3399_clk_probe	drivers/clk/rockchip/clk_rk3399.c	/^static int rk3399_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3399_clk_set_rate	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
rk3399_configure_cpu	drivers/clk/rockchip/clk_rk3399.c	/^void rk3399_configure_cpu(struct rk3399_cru *cru,$/;"	f	typeref:typename:void
rk3399_cru	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^struct rk3399_cru {$/;"	s
rk3399_grf_regs	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^struct rk3399_grf_regs {$/;"	s
rk3399_i2c_get_clk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id)$/;"	f	typeref:typename:ulong	file:
rk3399_i2c_get_pmuclk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_i2c_get_pmuclk(struct rk3399_pmucru *pmucru, ulong clk_id)$/;"	f	typeref:typename:ulong	file:
rk3399_i2c_set_clk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)$/;"	f	typeref:typename:ulong	file:
rk3399_i2c_set_pmuclk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_i2c_set_pmuclk(struct rk3399_pmucru *pmucru, ulong clk_id,$/;"	f	typeref:typename:ulong	file:
rk3399_mem_map	arch/arm/mach-rockchip/rk3399/rk3399.c	/^static struct mm_region rk3399_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
rk3399_mmc_get_clk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id)$/;"	f	typeref:typename:ulong	file:
rk3399_mmc_set_clk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru,$/;"	f	typeref:typename:ulong	file:
rk3399_pinctrl_get_periph_id	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static int rk3399_pinctrl_get_periph_id(struct udevice *dev,$/;"	f	typeref:typename:int	file:
rk3399_pinctrl_ids	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static const struct udevice_id rk3399_pinctrl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3399_pinctrl_ops	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static struct pinctrl_ops rk3399_pinctrl_ops = {$/;"	v	typeref:struct:pinctrl_ops	file:
rk3399_pinctrl_priv	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^struct rk3399_pinctrl_priv {$/;"	s	file:
rk3399_pinctrl_probe	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static int rk3399_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3399_pinctrl_request	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)$/;"	f	typeref:typename:int	file:
rk3399_pinctrl_set_state_simple	drivers/pinctrl/rockchip/pinctrl_rk3399.c	/^static int rk3399_pinctrl_set_state_simple(struct udevice *dev,$/;"	f	typeref:typename:int	file:
rk3399_pmuclk_get_rate	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_pmuclk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
rk3399_pmuclk_ids	drivers/clk/rockchip/clk_rk3399.c	/^static const struct udevice_id rk3399_pmuclk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3399_pmuclk_ofdata_to_platdata	drivers/clk/rockchip/clk_rk3399.c	/^static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3399_pmuclk_ops	drivers/clk/rockchip/clk_rk3399.c	/^static struct clk_ops rk3399_pmuclk_ops = {$/;"	v	typeref:struct:clk_ops	file:
rk3399_pmuclk_priv	drivers/clk/rockchip/clk_rk3399.c	/^struct rk3399_pmuclk_priv {$/;"	s	file:
rk3399_pmuclk_probe	drivers/clk/rockchip/clk_rk3399.c	/^static int rk3399_pmuclk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk3399_pmuclk_set_rate	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_pmuclk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
rk3399_pmucru	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^struct rk3399_pmucru {$/;"	s
rk3399_pmugrf_regs	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^struct rk3399_pmugrf_regs {$/;"	s
rk3399_pmusgrf_regs	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^struct rk3399_pmusgrf_regs {$/;"	s
rk3399_pwm_get_clk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_pwm_get_clk(struct rk3399_pmucru *pmucru)$/;"	f	typeref:typename:ulong	file:
rk3399_syscon_ids	arch/arm/mach-rockchip/rk3399/syscon_rk3399.c	/^static const struct udevice_id rk3399_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk3399_sysreset	drivers/sysreset/sysreset_rk3399.c	/^static struct sysreset_ops rk3399_sysreset = {$/;"	v	typeref:struct:sysreset_ops	file:
rk3399_sysreset_request	drivers/sysreset/sysreset_rk3399.c	/^int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int
rk3399_vop_set_clk	drivers/clk/rockchip/clk_rk3399.c	/^static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)$/;"	f	typeref:typename:ulong	file:
rk808	arch/arm/dts/rk3288-fennec.dtsi	/^	rk808: pmic@1b {$/;"	l
rk808	arch/arm/dts/rk3288-miniarm.dtsi	/^	rk808: pmic@1b {$/;"	l
rk808	arch/arm/dts/rk3288-popmetal.dtsi	/^	rk808: pmic@1b {$/;"	l
rk808	arch/arm/dts/rk3288-veyron.dtsi	/^	rk808: pmic@1b {$/;"	l
rk808_bind	drivers/power/pmic/rk808.c	/^static int rk808_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk808_buck	drivers/power/regulator/rk808.c	/^static const struct rk808_reg_info rk808_buck[] = {$/;"	v	typeref:typename:const struct rk808_reg_info[]	file:
rk808_buck_ops	drivers/power/regulator/rk808.c	/^static const struct dm_regulator_ops rk808_buck_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
rk808_buck_probe	drivers/power/regulator/rk808.c	/^static int rk808_buck_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk808_ids	drivers/power/pmic/rk808.c	/^static const struct udevice_id rk808_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk808_ldo	drivers/power/regulator/rk808.c	/^static const struct rk808_reg_info rk808_ldo[] = {$/;"	v	typeref:typename:const struct rk808_reg_info[]	file:
rk808_ldo_ops	drivers/power/regulator/rk808.c	/^static const struct dm_regulator_ops rk808_ldo_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
rk808_ldo_probe	drivers/power/regulator/rk808.c	/^static int rk808_ldo_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk808_ops	drivers/power/pmic/rk808.c	/^static struct dm_pmic_ops rk808_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
rk808_read	drivers/power/pmic/rk808.c	/^static int rk808_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
rk808_reg_count	drivers/power/pmic/rk808.c	/^static int rk808_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk808_reg_info	drivers/power/regulator/rk808.c	/^struct rk808_reg_info {$/;"	s	file:
rk808_reg_table	include/power/rk808_pmic.h	/^struct rk808_reg_table {$/;"	s
rk808_spl_configure_buck	drivers/power/regulator/rk808.c	/^int rk808_spl_configure_buck(struct udevice *pmic, int buck, int uvolt)$/;"	f	typeref:typename:int
rk808_switch_ops	drivers/power/regulator/rk808.c	/^static const struct dm_regulator_ops rk808_switch_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
rk808_switch_probe	drivers/power/regulator/rk808.c	/^static int rk808_switch_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk808_write	drivers/power/pmic/rk808.c	/^static int rk808_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
rk_board_late_init	arch/arm/mach-rockchip/rk3036-board.c	/^__weak int rk_board_late_init(void)$/;"	f	typeref:typename:__weak int
rk_board_late_init	arch/arm/mach-rockchip/rk3288-board.c	/^__weak int rk_board_late_init(void)$/;"	f	typeref:typename:__weak int
rk_board_late_init	board/rockchip/kylin_rk3036/kylin_rk3036.c	/^int rk_board_late_init(void)$/;"	f	typeref:typename:int
rk_clk_id	arch/arm/include/asm/arch-rockchip/clock.h	/^enum rk_clk_id {$/;"	g
rk_clrreg	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define rk_clrreg(/;"	d
rk_clrsetreg	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define rk_clrsetreg(/;"	d
rk_display_init	drivers/video/rockchip/rk_vop.c	/^int rk_display_init(struct udevice *dev, ulong fbbase,$/;"	f	typeref:typename:int
rk_edp_aux_enable	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_aux_enable(struct rk3288_edp *regs)$/;"	f	typeref:typename:int	file:
rk_edp_channel_eq	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_channel_eq(const u8 *link_status, int lane_count)$/;"	f	typeref:typename:int	file:
rk_edp_clock_recovery	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_clock_recovery(const u8 *link_status, int lane_count)$/;"	f	typeref:typename:int	file:
rk_edp_config_video	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_config_video(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_config_video_slave_mode	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_config_video_slave_mode(struct rk3288_edp *regs)$/;"	f	typeref:typename:void	file:
rk_edp_dpcd_read	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_dpcd_read(struct rk3288_edp *regs, u32 addr, u8 *values,$/;"	f	typeref:typename:int	file:
rk_edp_dpcd_read_link_status	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_dpcd_read_link_status(struct rk_edp_priv *edp,$/;"	f	typeref:typename:int	file:
rk_edp_dpcd_transfer	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_dpcd_transfer(struct rk3288_edp *regs,$/;"	f	typeref:typename:int	file:
rk_edp_dpcd_write	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_dpcd_write(struct rk3288_edp *regs, u32 addr, u8 *values,$/;"	f	typeref:typename:int	file:
rk_edp_enable	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_enable(struct udevice *dev, int panel_bpp,$/;"	f	typeref:typename:int	file:
rk_edp_enable_sw_function	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_enable_sw_function(struct rk3288_edp *regs)$/;"	f	typeref:typename:void	file:
rk_edp_get_adjust_request_pre_emphasis	drivers/video/rockchip/rk_edp.c	/^static uint rk_edp_get_adjust_request_pre_emphasis(const u8 *link_status,$/;"	f	typeref:typename:uint	file:
rk_edp_get_adjust_request_voltage	drivers/video/rockchip/rk_edp.c	/^static uint rk_edp_get_adjust_request_voltage(const u8 *link_status, int lane)$/;"	f	typeref:typename:uint	file:
rk_edp_get_pll_locked	drivers/video/rockchip/rk_edp.c	/^static bool rk_edp_get_pll_locked(struct rk3288_edp *regs)$/;"	f	typeref:typename:bool	file:
rk_edp_hw_link_training	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_hw_link_training(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_i2c_read	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_i2c_read(struct rk3288_edp *regs, unsigned int device_addr,$/;"	f	typeref:typename:int	file:
rk_edp_init_analog_func	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_init_analog_func(struct rk3288_edp *regs)$/;"	f	typeref:typename:int	file:
rk_edp_init_aux	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_init_aux(struct rk3288_edp *regs)$/;"	f	typeref:typename:void	file:
rk_edp_init_interrupt	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_init_interrupt(struct rk3288_edp *regs)$/;"	f	typeref:typename:void	file:
rk_edp_init_refclk	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_init_refclk(struct rk3288_edp *regs)$/;"	f	typeref:typename:void	file:
rk_edp_init_training	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_init_training(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_init_video	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_init_video(struct rk3288_edp *regs)$/;"	f	typeref:typename:void	file:
rk_edp_is_aux_reply	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_is_aux_reply(struct rk3288_edp *regs)$/;"	f	typeref:typename:int	file:
rk_edp_is_video_stream_clock_on	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_is_video_stream_clock_on(struct rk3288_edp *regs)$/;"	f	typeref:typename:int	file:
rk_edp_is_video_stream_on	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_is_video_stream_on(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_link_configure	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_link_configure(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_link_power_up	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_link_power_up(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_link_train_ce	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_link_train_ce(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_link_train_cr	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_link_train_cr(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_ofdata_to_platdata	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_edp_priv	drivers/video/rockchip/rk_edp.c	/^struct rk_edp_priv {$/;"	s	file:
rk_edp_probe	drivers/video/rockchip/rk_edp.c	/^int rk_edp_probe(struct udevice *dev)$/;"	f	typeref:typename:int
rk_edp_read_edid	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_read_edid(struct udevice *dev, u8 *buf, int buf_size)$/;"	f	typeref:typename:int	file:
rk_edp_select_i2c_device	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_select_i2c_device(struct rk3288_edp *regs,$/;"	f	typeref:typename:int	file:
rk_edp_set_link_train	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_set_link_train(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rk_edp_set_link_training	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_set_link_training(struct rk_edp_priv *edp,$/;"	f	typeref:typename:void	file:
rk_edp_set_video_cr_mn	drivers/video/rockchip/rk_edp.c	/^static void rk_edp_set_video_cr_mn(struct rk3288_edp *regs,$/;"	f	typeref:typename:void	file:
rk_edp_start_aux_transaction	drivers/video/rockchip/rk_edp.c	/^static int rk_edp_start_aux_transaction(struct rk3288_edp *regs)$/;"	f	typeref:typename:int	file:
rk_hdmi_enable	drivers/video/rockchip/rk_hdmi.c	/^static int rk_hdmi_enable(struct udevice *dev, int panel_bpp,$/;"	f	typeref:typename:int	file:
rk_hdmi_ids	drivers/video/rockchip/rk_hdmi.c	/^static const struct udevice_id rk_hdmi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk_hdmi_ofdata_to_platdata	drivers/video/rockchip/rk_hdmi.c	/^static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_hdmi_ops	drivers/video/rockchip/rk_hdmi.c	/^static const struct dm_display_ops rk_hdmi_ops = {$/;"	v	typeref:typename:const struct dm_display_ops	file:
rk_hdmi_priv	drivers/video/rockchip/rk_hdmi.c	/^struct rk_hdmi_priv {$/;"	s	file:
rk_hdmi_probe	drivers/video/rockchip/rk_hdmi.c	/^static int rk_hdmi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_hdmi_read_edid	drivers/video/rockchip/rk_hdmi.c	/^static int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)$/;"	f	typeref:typename:int	file:
rk_i2c	drivers/i2c/rk_i2c.c	/^struct rk_i2c {$/;"	s	file:
rk_i2c_disable	drivers/i2c/rk_i2c.c	/^static inline void rk_i2c_disable(struct rk_i2c *i2c)$/;"	f	typeref:typename:void	file:
rk_i2c_get_div	drivers/i2c/rk_i2c.c	/^static inline void rk_i2c_get_div(int div, int *divh, int *divl)$/;"	f	typeref:typename:void	file:
rk_i2c_read	drivers/i2c/rk_i2c.c	/^static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,$/;"	f	typeref:typename:int	file:
rk_i2c_send_start_bit	drivers/i2c/rk_i2c.c	/^static int rk_i2c_send_start_bit(struct rk_i2c *i2c)$/;"	f	typeref:typename:int	file:
rk_i2c_send_stop_bit	drivers/i2c/rk_i2c.c	/^static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)$/;"	f	typeref:typename:int	file:
rk_i2c_set_clk	drivers/i2c/rk_i2c.c	/^static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)$/;"	f	typeref:typename:void	file:
rk_i2c_show_regs	drivers/i2c/rk_i2c.c	/^static void rk_i2c_show_regs(struct i2c_regs *regs)$/;"	f	typeref:typename:void	file:
rk_i2c_write	drivers/i2c/rk_i2c.c	/^static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,$/;"	f	typeref:typename:int	file:
rk_lvds_enable	drivers/video/rockchip/rk_lvds.c	/^int rk_lvds_enable(struct udevice *dev, int panel_bpp,$/;"	f	typeref:typename:int
rk_lvds_ofdata_to_platdata	drivers/video/rockchip/rk_lvds.c	/^static int rk_lvds_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_lvds_priv	drivers/video/rockchip/rk_lvds.c	/^struct rk_lvds_priv {$/;"	s	file:
rk_lvds_probe	drivers/video/rockchip/rk_lvds.c	/^int rk_lvds_probe(struct udevice *dev)$/;"	f	typeref:typename:int
rk_lvds_read_timing	drivers/video/rockchip/rk_lvds.c	/^int rk_lvds_read_timing(struct udevice *dev, struct display_timing *timing)$/;"	f	typeref:typename:int
rk_pll_id	arch/arm/include/asm/arch-rockchip/clock.h	/^static inline int rk_pll_id(enum rk_clk_id clk_id)$/;"	f	typeref:typename:int
rk_pwm_ids	drivers/pwm/rk_pwm.c	/^static const struct udevice_id rk_pwm_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk_pwm_ofdata_to_platdata	drivers/pwm/rk_pwm.c	/^static int rk_pwm_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_pwm_ops	drivers/pwm/rk_pwm.c	/^static const struct pwm_ops rk_pwm_ops = {$/;"	v	typeref:typename:const struct pwm_ops	file:
rk_pwm_priv	drivers/pwm/rk_pwm.c	/^struct rk_pwm_priv {$/;"	s	file:
rk_pwm_probe	drivers/pwm/rk_pwm.c	/^static int rk_pwm_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_pwm_set_config	drivers/pwm/rk_pwm.c	/^static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,$/;"	f	typeref:typename:int	file:
rk_pwm_set_enable	drivers/pwm/rk_pwm.c	/^static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable)$/;"	f	typeref:typename:int	file:
rk_setreg	arch/arm/include/asm/arch-rockchip/hardware.h	/^#define rk_setreg(/;"	d
rk_timer	arch/arm/include/asm/arch-rockchip/timer.h	/^struct rk_timer {$/;"	s
rk_uart	arch/arm/include/asm/arch-rockchip/uart.h	/^struct rk_uart {$/;"	s
rk_vop_bind	drivers/video/rockchip/rk_vop.c	/^static int rk_vop_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rk_vop_ids	drivers/video/rockchip/rk_vop.c	/^static const struct udevice_id rk_vop_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rk_vop_ops	drivers/video/rockchip/rk_vop.c	/^static const struct video_ops rk_vop_ops = {$/;"	v	typeref:typename:const struct video_ops	file:
rk_vop_priv	drivers/video/rockchip/rk_vop.c	/^struct rk_vop_priv {$/;"	s	file:
rk_vop_probe	drivers/video/rockchip/rk_vop.c	/^static int rk_vop_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rkclk_configure_ddr	drivers/clk/rockchip/clk_rk3288.c	/^static int rkclk_configure_ddr(struct rk3288_cru *cru, struct rk3288_grf *grf,$/;"	f	typeref:typename:int	file:
rkclk_init	drivers/clk/rockchip/clk_rk3036.c	/^static void rkclk_init(struct rk3036_cru *cru)$/;"	f	typeref:typename:void	file:
rkclk_init	drivers/clk/rockchip/clk_rk3288.c	/^static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)$/;"	f	typeref:typename:void	file:
rkclk_init	drivers/clk/rockchip/clk_rk3399.c	/^static void rkclk_init(struct rk3399_cru *cru)$/;"	f	typeref:typename:void	file:
rkclk_pll_get_rate	drivers/clk/rockchip/clk_rk3036.c	/^static uint32_t rkclk_pll_get_rate(struct rk3036_cru *cru,$/;"	f	typeref:typename:uint32_t	file:
rkclk_pll_get_rate	drivers/clk/rockchip/clk_rk3288.c	/^static uint32_t rkclk_pll_get_rate(struct rk3288_cru *cru,$/;"	f	typeref:typename:uint32_t	file:
rkclk_set_pll	drivers/clk/rockchip/clk_rk3036.c	/^static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,$/;"	f	typeref:typename:int	file:
rkclk_set_pll	drivers/clk/rockchip/clk_rk3288.c	/^static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,$/;"	f	typeref:typename:int	file:
rkclk_set_pll	drivers/clk/rockchip/clk_rk3399.c	/^static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div)$/;"	f	typeref:typename:void	file:
rkcommon_check_params	tools/rkcommon.c	/^int rkcommon_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
rkcommon_get_spl_hdr	tools/rkcommon.c	/^const char *rkcommon_get_spl_hdr(struct image_tool_params *params)$/;"	f	typeref:typename:const char *
rkcommon_get_spl_info	tools/rkcommon.c	/^static struct spl_info *rkcommon_get_spl_info(char *imagename)$/;"	f	typeref:struct:spl_info *	file:
rkcommon_get_spl_size	tools/rkcommon.c	/^int rkcommon_get_spl_size(struct image_tool_params *params)$/;"	f	typeref:typename:int
rkcommon_set_header	tools/rkcommon.c	/^int rkcommon_set_header(void *buf, uint file_size,$/;"	f	typeref:typename:int
rkdclk_init	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void rkdclk_init(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
rkimage_check_image_type	tools/rkimage.c	/^static int rkimage_check_image_type(uint8_t type)$/;"	f	typeref:typename:int	file:
rkimage_extract_subimage	tools/rkimage.c	/^static int rkimage_extract_subimage(void *buf, struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
rkimage_print_header	tools/rkimage.c	/^static void rkimage_print_header(const void *buf)$/;"	f	typeref:typename:void	file:
rkimage_set_header	tools/rkimage.c	/^static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
rkimage_verify_header	tools/rkimage.c	/^static int rkimage_verify_header(unsigned char *buf, int size,$/;"	f	typeref:typename:int	file:
rksd_check_image_type	tools/rksd.c	/^static int rksd_check_image_type(uint8_t type)$/;"	f	typeref:typename:int	file:
rksd_extract_subimage	tools/rksd.c	/^static int rksd_extract_subimage(void *buf,  struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
rksd_print_header	tools/rksd.c	/^static void rksd_print_header(const void *buf)$/;"	f	typeref:typename:void	file:
rksd_set_header	tools/rksd.c	/^static void rksd_set_header(void *buf,  struct stat *sbuf,  int ifd,$/;"	f	typeref:typename:void	file:
rksd_verify_header	tools/rksd.c	/^static int rksd_verify_header(unsigned char *buf,  int size,$/;"	f	typeref:typename:int	file:
rksd_vrec_header	tools/rksd.c	/^static int rksd_vrec_header(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
rkspi_check_image_type	tools/rkspi.c	/^static int rkspi_check_image_type(uint8_t type)$/;"	f	typeref:typename:int	file:
rkspi_dump_regs	drivers/spi/rk_spi.c	/^static void rkspi_dump_regs(struct rockchip_spi *regs)$/;"	f	typeref:typename:void	file:
rkspi_enable_chip	drivers/spi/rk_spi.c	/^static void rkspi_enable_chip(struct rockchip_spi *regs, bool enable)$/;"	f	typeref:typename:void	file:
rkspi_extract_subimage	tools/rkspi.c	/^static int rkspi_extract_subimage(void *buf, struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
rkspi_print_header	tools/rkspi.c	/^static void rkspi_print_header(const void *buf)$/;"	f	typeref:typename:void	file:
rkspi_set_clk	drivers/spi/rk_spi.c	/^static void rkspi_set_clk(struct rockchip_spi_priv *priv, uint speed)$/;"	f	typeref:typename:void	file:
rkspi_set_header	tools/rkspi.c	/^static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
rkspi_verify_header	tools/rkspi.c	/^static int rkspi_verify_header(unsigned char *buf, int size,$/;"	f	typeref:typename:int	file:
rkspi_vrec_header	tools/rkspi.c	/^static int rkspi_vrec_header(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
rkspi_wait_till_not_busy	drivers/spi/rk_spi.c	/^static int rkspi_wait_till_not_busy(struct rockchip_spi *regs)$/;"	f	typeref:typename:int	file:
rkvop_enable	drivers/video/rockchip/rk_vop.c	/^void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,$/;"	f	typeref:typename:void
rkvop_mode_set	drivers/video/rockchip/rk_vop.c	/^void rkvop_mode_set(struct rk3288_vop *regs,$/;"	f	typeref:typename:void
rl	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
rl	drivers/video/ipu_regs.h	/^	u32 rl[5];$/;"	m	struct:ipu_dc_ch	typeref:typename:u32[5]
rl400_bug	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	int rl400_bug;$/;"	m	struct:dram_info	typeref:typename:int
rl6_ch_8	drivers/video/ipu_regs.h	/^	u32 rl6_ch_8;$/;"	m	struct:ipu_dc	typeref:typename:u32
rl6_ch_9	drivers/video/ipu_regs.h	/^	u32 rl6_ch_9;$/;"	m	struct:ipu_dc	typeref:typename:u32
rl_max_phase	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 rl_max_phase;$/;"	m	struct:dram_info	typeref:typename:u32
rl_mid_freq_wa	drivers/ddr/marvell/a38x/ddr3_training.c	/^int rl_mid_freq_wa = 0;$/;"	v	typeref:typename:int
rl_min_phase	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 rl_min_phase;$/;"	m	struct:dram_info	typeref:typename:u32
rl_pattern	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 rl_pattern[LEN_STD_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[LEN_STD_PATTERN]__aligned (32)
rl_pattern	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 rl_pattern[LEN_STD_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[LEN_STD_PATTERN]__aligned (32)
rl_test	drivers/ddr/marvell/a38x/ddr3_debug.c	/^	rl_test = 0, reset_read_fifo = 0;$/;"	v	typeref:typename:u32
rl_val	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 rl_val[MAX_CS][MAX_PUP_NUM][7];$/;"	m	struct:dram_info	typeref:typename:u32[][][7]
rl_version	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 rl_version = 1;		\/* 0 - old RL machine *\/$/;"	v	typeref:typename:u32
rlc_rcc	drivers/net/ftmac100.h	/^	unsigned int	rlc_rcc;	\/* 0xe8 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
rld	include/grlib/gptimer.h	/^	volatile unsigned int rld;$/;"	m	struct:__anon98dc47250108	typeref:typename:volatile unsigned int
rlec	drivers/net/e1000.h	/^	uint64_t rlec;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rlf	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 rlf;	\/* Receive Length FIFO (RO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
rloh	tools/mxsboot.c	/^		uint8_t			rloh;$/;"	m	struct:mx28_nand_fcb::__anond6c4b0c20108	typeref:typename:uint8_t	file:
rlrfp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rlrfp;		\/* 0x190 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rlwfp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rlwfp;		\/* 0x194 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rm-dirs	Makefile	/^clean: rm-dirs  := $(CLEAN_DIRS)$/;"	m
rm-dirs	Makefile	/^mrproper: rm-dirs  := $(wildcard $(MRPROPER_DIRS))$/;"	m
rm-files	Makefile	/^clean: rm-files := $(CLEAN_FILES)$/;"	m
rm-files	Makefile	/^mrproper: rm-files := $(wildcard $(MRPROPER_FILES))$/;"	m
rman_liodn_tbl	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct liodn_id_table rman_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
rman_liodn_tbl	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct liodn_id_table rman_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
rman_liodn_tbl	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct liodn_id_table rman_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
rman_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct liodn_id_table rman_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
rman_liodn_tbl	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct liodn_id_table rman_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
rman_liodn_tbl	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct liodn_id_table rman_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
rman_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);$/;"	v	typeref:typename:int
rman_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);$/;"	v	typeref:typename:int
rman_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);$/;"	v	typeref:typename:int
rman_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);$/;"	v	typeref:typename:int
rman_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);$/;"	v	typeref:typename:int
rman_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);$/;"	v	typeref:typename:int
rmask	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 rmask;$/;"	m	struct:ssi	typeref:typename:u32
rmb	arch/arc/include/asm/io.h	/^#define rmb(/;"	d
rmb	arch/blackfin/include/asm/system.h	/^#define rmb(/;"	d
rmb	arch/microblaze/include/asm/system.h	/^#define rmb(/;"	d
rmb	arch/mips/include/asm/system.h	/^#define rmb(/;"	d
rmb	arch/nds32/include/asm/system.h	/^#define rmb(/;"	d
rmb	arch/sh/include/asm/system.h	/^#define rmb(/;"	d
rmca	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rmca;		\/* RX Multicast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rmca	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rmca;		\/* 0x246a8 - Receive Multicast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rmca	drivers/qe/uec.h	/^	u32 rmca;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rmca	include/fsl_dtsec.h	/^	u32	rmca;		\/* Receive multicast packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
rmca	include/linux/immap_qe.h	/^	u32 rmca;		\/* Total number of frames that were received$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rmca	include/tsec.h	/^	u32	rmca;		\/* Receive Multicast Packet (Counter) *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rmcr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 rmcr[8];		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[8]
rmcr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 rmcr;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
rmcr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 rmcr[8];		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32[8]
rmcr	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 rmcr;		\/* 0x10 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
rmcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 rmcr;		\/* 0x34 Refresh Mode Control Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
rmii1_pin_mux	board/isee/igep0033/mux.c	/^static struct module_pin_mux rmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rmii1_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux rmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rmii1_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux rmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rmii1_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux rmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rmii1_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux rmii1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rmii1_refclk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int rmii1_refclk;$/;"	m	struct:pad_signals	typeref:typename:int
rmii1_refclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int rmii1_refclk;$/;"	m	struct:pad_signals	typeref:typename:int
rmii_clk_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	rmii_clk_ck: rmii_clk_ck {$/;"	l
rmii_clock_external	include/cpsw.h	/^	bool	rmii_clock_external;$/;"	m	struct:cpsw_platform_data	typeref:typename:bool
rmii_hw_init	board/davinci/da8xxevm/da850evm.c	/^int rmii_hw_init(void)$/;"	f	typeref:typename:int
rmii_hw_init	board/davinci/da8xxevm/omapl138_lcdk.c	/^int rmii_hw_init(void)$/;"	f	typeref:typename:int
rmii_pins	arch/arm/dts/rk3288.dtsi	/^			rmii_pins: rmii-pins {$/;"	l
rmii_pins	arch/arm/dts/sun50i-a64.dtsi	/^			rmii_pins: rmii_pins {$/;"	l	label:pio
rmobile_cpuinfo	arch/arm/mach-rmobile/cpu_info.c	/^} rmobile_cpuinfo[] = {$/;"	v	typeref:typename:const struct __anon8ce67d240108[]
rmobile_ehci_reg	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^struct rmobile_ehci_reg {$/;"	s
rmobile_get_cpu_rev	arch/arm/mach-rmobile/cpu_info-r8a7740.c	/^u32 rmobile_get_cpu_rev(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_rev_fraction	arch/arm/mach-rmobile/cpu_info-rcar.c	/^u32 rmobile_get_cpu_rev_fraction(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_rev_fraction	arch/arm/mach-rmobile/cpu_info-sh73a0.c	/^u32 rmobile_get_cpu_rev_fraction(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_rev_integer	arch/arm/mach-rmobile/cpu_info-rcar.c	/^u32 rmobile_get_cpu_rev_integer(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_rev_integer	arch/arm/mach-rmobile/cpu_info-sh73a0.c	/^u32 rmobile_get_cpu_rev_integer(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_type	arch/arm/mach-rmobile/cpu_info-r8a7740.c	/^u32 rmobile_get_cpu_type(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_type	arch/arm/mach-rmobile/cpu_info-rcar.c	/^u32 rmobile_get_cpu_type(void)$/;"	f	typeref:typename:u32
rmobile_get_cpu_type	arch/arm/mach-rmobile/cpu_info-sh73a0.c	/^u32 rmobile_get_cpu_type(void)$/;"	f	typeref:typename:u32
rmobile_sysinfo	arch/arm/mach-rmobile/include/mach/sys_proto.h	/^struct rmobile_sysinfo {$/;"	s
rmodule_header	arch/x86/cpu/broadwell/refcode.c	/^struct rmodule_header {$/;"	s	file:
rmon	include/tsec.h	/^	struct tsec_rmon_mib	rmon;$/;"	m	struct:tsec	typeref:struct:tsec_rmon_mib
rmon_r_bc_pkt	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_bc_pkt;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_bc_pkt	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_bc_pkt;		\/* MBAR_ETH + 0x288 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_bc_pkt	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_bc_pkt;		\/* MBAR_ETH + 0x288 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_crc_align	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_crc_align;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_crc_align	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_crc_align;	\/* MBAR_ETH + 0x290 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_crc_align	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_crc_align;	\/* MBAR_ETH + 0x290 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_drop	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_drop;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_drop	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_drop;		\/* MBAR_ETH + 0x280 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_drop	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_drop;		\/* MBAR_ETH + 0x280 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_frag	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_frag;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_frag	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_frag;		\/* MBAR_ETH + 0x29C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_frag	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_frag;		\/* MBAR_ETH + 0x29C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_jab	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_jab;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_jab	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_jab;		\/* MBAR_ETH + 0x2A0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_jab	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_jab;		\/* MBAR_ETH + 0x2A0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_mc_pkt	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_mc_pkt;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_mc_pkt	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_mc_pkt;		\/* MBAR_ETH + 0x28C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_mc_pkt	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_mc_pkt;		\/* MBAR_ETH + 0x28C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_octets	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_octets;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_octets	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_octets;		\/* MBAR_ETH + 0x2C4 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_octets	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_octets;		\/* MBAR_ETH + 0x2C4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_oversize	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_oversize;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_oversize	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_oversize;	\/* MBAR_ETH + 0x298 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_oversize	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_oversize;	\/* MBAR_ETH + 0x298 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p1024to2047	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p1024to2047;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p1024to2047	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p1024to2047;	\/* MBAR_ETH + 0x2BC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p1024to2047	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p1024to2047;	\/* MBAR_ETH + 0x2BC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p128to255	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p128to255;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p128to255	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p128to255;	\/* MBAR_ETH + 0x2B0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p128to255	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p128to255;	\/* MBAR_ETH + 0x2B0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p256to511	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p256to511;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p256to511	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p256to511;	\/* MBAR_ETH + 0x2B4 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p256to511	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p256to511;	\/* MBAR_ETH + 0x2B4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p512to1023	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p512to1023;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p512to1023	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p512to1023;	\/* MBAR_ETH + 0x2B8 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p512to1023	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p512to1023;	\/* MBAR_ETH + 0x2B8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p64	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p64;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p64	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p64;		\/* MBAR_ETH + 0x2A8 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p64	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p64;		\/* MBAR_ETH + 0x2A8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p65to127	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p65to127;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p65to127	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p65to127;	\/* MBAR_ETH + 0x2AC *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p65to127	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p65to127;	\/* MBAR_ETH + 0x2AC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_p_gte2048	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_p_gte2048;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_p_gte2048	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_p_gte2048;	\/* MBAR_ETH + 0x2C0 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_p_gte2048	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_p_gte2048;	\/* MBAR_ETH + 0x2C0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_packets	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_packets;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_packets	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_packets;	\/* MBAR_ETH + 0x284 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_packets	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_packets;		\/* MBAR_ETH + 0x284 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_resvd_0	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_resvd_0;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_resvd_0	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_resvd_0;	\/* MBAR_ETH + 0x2A4 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_resvd_0	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_resvd_0;		\/* MBAR_ETH + 0x2A4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_r_undersize	arch/m68k/include/asm/fec.h	/^	u32 rmon_r_undersize;$/;"	m	struct:fec	typeref:typename:u32
rmon_r_undersize	drivers/net/fec_mxc.h	/^	uint32_t rmon_r_undersize;	\/* MBAR_ETH + 0x294 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_r_undersize	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_r_undersize;	\/* MBAR_ETH + 0x294 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_bc_pkt	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_bc_pkt;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_bc_pkt	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_bc_pkt;		\/* MBAR_ETH + 0x208 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_bc_pkt	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_bc_pkt;		\/* MBAR_ETH + 0x208 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_col	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_col;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_col	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_col;		\/* MBAR_ETH + 0x224 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_col	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_col;		\/* MBAR_ETH + 0x224 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_crc_align	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_crc_align;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_crc_align	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_crc_align;	\/* MBAR_ETH + 0x210 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_crc_align	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_crc_align;	\/* MBAR_ETH + 0x210 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_drop	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_drop;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_drop	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_drop;		\/* MBAR_ETH + 0x200 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_drop	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_drop;		\/* MBAR_ETH + 0x200 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_frag	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_frag;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_frag	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_frag;		\/* MBAR_ETH + 0x21C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_frag	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_frag;		\/* MBAR_ETH + 0x21C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_jab	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_jab;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_jab	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_jab;		\/* MBAR_ETH + 0x220 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_jab	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_jab;		\/* MBAR_ETH + 0x220 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_mc_pkt	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_mc_pkt;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_mc_pkt	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_mc_pkt;		\/* MBAR_ETH + 0x20C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_mc_pkt	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_mc_pkt;		\/* MBAR_ETH + 0x20C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_octets	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_octets;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_octets	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_octets;		\/* MBAR_ETH + 0x244 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_octets	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_octets;		\/* MBAR_ETH + 0x244 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_oversize	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_oversize;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_oversize	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_oversize;	\/* MBAR_ETH + 0x218 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_oversize	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_oversize;	\/* MBAR_ETH + 0x218 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p1024to2047	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p1024to2047;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p1024to2047	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p1024to2047;	\/* MBAR_ETH + 0x23C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p1024to2047	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p1024to2047;	\/* MBAR_ETH + 0x23C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p128to255	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p128to255;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p128to255	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p128to255;	\/* MBAR_ETH + 0x230 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p128to255	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p128to255;	\/* MBAR_ETH + 0x230 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p256to511	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p256to511;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p256to511	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p256to511;	\/* MBAR_ETH + 0x234 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p256to511	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p256to511;	\/* MBAR_ETH + 0x234 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p512to1023	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p512to1023;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p512to1023	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p512to1023;	\/* MBAR_ETH + 0x238 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p512to1023	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p512to1023;	\/* MBAR_ETH + 0x238 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p64	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p64;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p64	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p64;		\/* MBAR_ETH + 0x228 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p64	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p64;		\/* MBAR_ETH + 0x228 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p65to127	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p65to127;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p65to127	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p65to127;	\/* MBAR_ETH + 0x22C *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p65to127	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p65to127;	\/* MBAR_ETH + 0x22C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_p_gte2048	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_p_gte2048;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_p_gte2048	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_p_gte2048;	\/* MBAR_ETH + 0x240 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_p_gte2048	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_p_gte2048;	\/* MBAR_ETH + 0x240 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_packets	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_packets;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_packets	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_packets;	\/* MBAR_ETH + 0x204 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_packets	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_packets;		\/* MBAR_ETH + 0x204 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmon_t_undersize	arch/m68k/include/asm/fec.h	/^	u32 rmon_t_undersize;$/;"	m	struct:fec	typeref:typename:u32
rmon_t_undersize	drivers/net/fec_mxc.h	/^	uint32_t rmon_t_undersize;	\/* MBAR_ETH + 0x214 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
rmon_t_undersize	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 rmon_t_undersize;	\/* MBAR_ETH + 0x214 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
rmr	arch/powerpc/include/asm/immap_512x.h	/^	u32 rmr;		\/* Reset Mode Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rmr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rmr;		\/* Reset Mode Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rmstpcr0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rmstpcr0;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rmstpcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rmstpcr0;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rmstpcr1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rmstpcr1;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rmstpcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rmstpcr1;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rmstpcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rmstpcr2;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rmstpcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rmstpcr2;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rmstpcr3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rmstpcr3;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rmstpcr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rmstpcr3;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rmstpcr4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rmstpcr4;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rmstpcr4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rmstpcr4;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rmstpcr5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rmstpcr5;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rmstpcr5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rmstpcr5;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rmu_ir	arch/x86/include/asm/arch-quark/quark.h	/^	u16	rmu_ir;$/;"	m	struct:quark_rcba	typeref:typename:u16
rmuliodnr	arch/powerpc/include/asm/immap_85xx.h	/^#define rmuliodnr /;"	d
rmwal	include/tsi148.h	/^	unsigned int rmwal;                   \/* 0x224         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
rmwau	include/tsi148.h	/^	unsigned int rmwau;                   \/* 0x220         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
rmwc	include/tsi148.h	/^	unsigned int rmwc;                    \/* 0x22c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
rmwen	include/tsi148.h	/^	unsigned int rmwen;                   \/* 0x228         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
rmws	include/tsi148.h	/^	unsigned int rmws;                    \/* 0x230         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
rn5t567_ids	drivers/power/pmic/rn5t567.c	/^static const struct udevice_id rn5t567_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rn5t567_ops	drivers/power/pmic/rn5t567.c	/^static struct dm_pmic_ops rn5t567_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
rn5t567_read	drivers/power/pmic/rn5t567.c	/^static int rn5t567_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
rn5t567_reg_count	drivers/power/pmic/rn5t567.c	/^static int rn5t567_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rn5t567_write	drivers/power/pmic/rn5t567.c	/^static int rn5t567_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
rnbc	drivers/net/e1000.h	/^	uint64_t rnbc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rndis	drivers/usb/gadget/ether.c	/^	unsigned		rndis:1;$/;"	m	struct:eth_dev	typeref:typename:unsigned:1	file:
rndis_active	drivers/usb/gadget/ether.c	/^static inline int rndis_active(struct eth_dev *dev)$/;"	f	typeref:typename:int	file:
rndis_add_hdr	drivers/usb/gadget/rndis.c	/^void rndis_add_hdr(void *buf, int length)$/;"	f	typeref:typename:void
rndis_add_response	drivers/usb/gadget/rndis.c	/^static rndis_resp_t *rndis_add_response(int configNr, u32 length)$/;"	f	typeref:typename:rndis_resp_t *	file:
rndis_command_complete	drivers/usb/gadget/ether.c	/^static void rndis_command_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
rndis_config	drivers/usb/gadget/ether.c	/^	int			rndis_config;$/;"	m	struct:eth_dev	typeref:typename:int	file:
rndis_config	drivers/usb/gadget/ether.c	/^rndis_config = {$/;"	v	typeref:struct:usb_config_descriptor	file:
rndis_config_parameter	drivers/usb/gadget/rndis.h	/^struct rndis_config_parameter {$/;"	s
rndis_control_ack	drivers/usb/gadget/ether.c	/^#define	rndis_control_ack	/;"	d	file:
rndis_control_ack	drivers/usb/gadget/ether.c	/^static int rndis_control_ack(struct eth_device *net)$/;"	f	typeref:typename:int	file:
rndis_control_ack_complete	drivers/usb/gadget/ether.c	/^static void rndis_control_ack_complete(struct usb_ep *ep,$/;"	f	typeref:typename:void	file:
rndis_control_intf	drivers/usb/gadget/ether.c	/^rndis_control_intf = {$/;"	v	typeref:typename:const struct usb_interface_descriptor	file:
rndis_data_intf	drivers/usb/gadget/ether.c	/^rndis_data_intf = {$/;"	v	typeref:typename:const struct usb_interface_descriptor	file:
rndis_deregister	drivers/usb/gadget/ether.c	/^#define rndis_deregister(/;"	d	file:
rndis_deregister	drivers/usb/gadget/rndis.c	/^void rndis_deregister(int configNr)$/;"	f	typeref:typename:void
rndis_driver_version	drivers/usb/gadget/rndis.c	/^static const __le32 rndis_driver_version = __constant_cpu_to_le32(1);$/;"	v	typeref:typename:const __le32	file:
rndis_exit	drivers/usb/gadget/ether.c	/^#define rndis_exit(/;"	d	file:
rndis_exit	drivers/usb/gadget/rndis.c	/^void rndis_exit(void)$/;"	f	typeref:typename:void
rndis_free_response	drivers/usb/gadget/rndis.c	/^void rndis_free_response(int configNr, u8 *buf)$/;"	f	typeref:typename:void
rndis_get_next_response	drivers/usb/gadget/rndis.c	/^u8 *rndis_get_next_response(int configNr, u32 *length)$/;"	f	typeref:typename:u8 *
rndis_get_state	drivers/usb/gadget/rndis.c	/^enum rndis_state rndis_get_state(int configNr)$/;"	f	typeref:enum:rndis_state
rndis_halt_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_halt_msg_type {$/;"	s
rndis_halt_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_halt_msg_type;$/;"	t	typeref:struct:rndis_halt_msg_type
rndis_indicate_status_msg	drivers/usb/gadget/rndis.c	/^static int rndis_indicate_status_msg(int configNr, u32 status)$/;"	f	typeref:typename:int	file:
rndis_indicate_status_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_indicate_status_msg_type {$/;"	s
rndis_indicate_status_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_indicate_status_msg_type;$/;"	t	typeref:struct:rndis_indicate_status_msg_type
rndis_init	drivers/usb/gadget/rndis.c	/^int rndis_init(void)$/;"	f	typeref:typename:int
rndis_init_cmplt_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_init_cmplt_type {$/;"	s
rndis_init_cmplt_type	drivers/usb/gadget/rndis.h	/^} rndis_init_cmplt_type;$/;"	t	typeref:struct:rndis_init_cmplt_type
rndis_init_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_init_msg_type {$/;"	s
rndis_init_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_init_msg_type;$/;"	t	typeref:struct:rndis_init_msg_type
rndis_init_response	drivers/usb/gadget/rndis.c	/^static int rndis_init_response(int configNr, rndis_init_msg_type *buf)$/;"	f	typeref:typename:int	file:
rndis_keepalive_cmplt_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_keepalive_cmplt_type {$/;"	s
rndis_keepalive_cmplt_type	drivers/usb/gadget/rndis.h	/^} rndis_keepalive_cmplt_type;$/;"	t	typeref:struct:rndis_keepalive_cmplt_type
rndis_keepalive_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_keepalive_msg_type {$/;"	s
rndis_keepalive_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_keepalive_msg_type;$/;"	t	typeref:struct:rndis_keepalive_msg_type
rndis_keepalive_response	drivers/usb/gadget/rndis.c	/^static int rndis_keepalive_response(int configNr,$/;"	f	typeref:typename:int	file:
rndis_msg_parser	drivers/usb/gadget/rndis.c	/^int rndis_msg_parser(u8 configNr, u8 *buf)$/;"	f	typeref:typename:int
rndis_packet_msg_type	drivers/usb/gadget/rndis.h	/^struct rndis_packet_msg_type {$/;"	s
rndis_params	drivers/usb/gadget/rndis.h	/^typedef struct rndis_params {$/;"	s
rndis_params	drivers/usb/gadget/rndis.h	/^} rndis_params;$/;"	t	typeref:struct:rndis_params
rndis_per_dev_params	drivers/usb/gadget/rndis.c	/^static rndis_params rndis_per_dev_params[RNDIS_MAX_CONFIGS];$/;"	v	typeref:typename:rndis_params[]	file:
rndis_query_cmplt_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_query_cmplt_type {$/;"	s
rndis_query_cmplt_type	drivers/usb/gadget/rndis.h	/^} rndis_query_cmplt_type;$/;"	t	typeref:struct:rndis_query_cmplt_type
rndis_query_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_query_msg_type {$/;"	s
rndis_query_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_query_msg_type;$/;"	t	typeref:struct:rndis_query_msg_type
rndis_query_response	drivers/usb/gadget/rndis.c	/^static int rndis_query_response(int configNr, rndis_query_msg_type *buf)$/;"	f	typeref:typename:int	file:
rndis_register	drivers/usb/gadget/rndis.c	/^int rndis_register(int (*rndis_control_ack)(struct eth_device *))$/;"	f	typeref:typename:int
rndis_reset_cmplt_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_reset_cmplt_type {$/;"	s
rndis_reset_cmplt_type	drivers/usb/gadget/rndis.h	/^} rndis_reset_cmplt_type;$/;"	t	typeref:struct:rndis_reset_cmplt_type
rndis_reset_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_reset_msg_type {$/;"	s
rndis_reset_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_reset_msg_type;$/;"	t	typeref:struct:rndis_reset_msg_type
rndis_reset_response	drivers/usb/gadget/rndis.c	/^static int rndis_reset_response(int configNr, rndis_reset_msg_type *buf)$/;"	f	typeref:typename:int	file:
rndis_resp_buf	drivers/usb/gadget/ether.c	/^static char rndis_resp_buf[8] __attribute__((aligned(sizeof(__le32))));$/;"	v	typeref:typename:char[8]	file:
rndis_resp_t	drivers/usb/gadget/rndis.h	/^typedef struct rndis_resp_t {$/;"	s
rndis_resp_t	drivers/usb/gadget/rndis.h	/^} rndis_resp_t;$/;"	t	typeref:struct:rndis_resp_t
rndis_response_complete	drivers/usb/gadget/ether.c	/^static void rndis_response_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
rndis_rm_hdr	drivers/usb/gadget/rndis.c	/^int rndis_rm_hdr(void *buf, int length)$/;"	f	typeref:typename:int
rndis_set_cmplt_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_set_cmplt_type {$/;"	s
rndis_set_cmplt_type	drivers/usb/gadget/rndis.h	/^} rndis_set_cmplt_type;$/;"	t	typeref:struct:rndis_set_cmplt_type
rndis_set_host_mac	drivers/usb/gadget/rndis.c	/^void rndis_set_host_mac(int configNr, const u8 *addr)$/;"	f	typeref:typename:void
rndis_set_msg_type	drivers/usb/gadget/rndis.h	/^typedef struct rndis_set_msg_type {$/;"	s
rndis_set_msg_type	drivers/usb/gadget/rndis.h	/^} rndis_set_msg_type;$/;"	t	typeref:struct:rndis_set_msg_type
rndis_set_param_dev	drivers/usb/gadget/rndis.c	/^int rndis_set_param_dev(u8 configNr, struct eth_device *dev, int mtu,$/;"	f	typeref:typename:int
rndis_set_param_medium	drivers/usb/gadget/rndis.c	/^int rndis_set_param_medium(u8 configNr, u32 medium, u32 speed)$/;"	f	typeref:typename:int
rndis_set_param_vendor	drivers/usb/gadget/rndis.c	/^int rndis_set_param_vendor(u8 configNr, u32 vendorID, const char *vendorDescr)$/;"	f	typeref:typename:int
rndis_set_response	drivers/usb/gadget/rndis.c	/^static int rndis_set_response(int configNr, rndis_set_msg_type *buf)$/;"	f	typeref:typename:int	file:
rndis_signal_connect	drivers/usb/gadget/rndis.c	/^int rndis_signal_connect(int configNr)$/;"	f	typeref:typename:int
rndis_signal_disconnect	drivers/usb/gadget/rndis.c	/^int rndis_signal_disconnect(int configNr)$/;"	f	typeref:typename:int
rndis_state	drivers/usb/gadget/rndis.h	/^enum rndis_state {$/;"	g
rndis_uninit	drivers/usb/gadget/ether.c	/^#define rndis_uninit(/;"	d	file:
rndis_uninit	drivers/usb/gadget/rndis.c	/^void rndis_uninit(int configNr)$/;"	f	typeref:typename:void
rng	arch/arm/dts/am33xx.dtsi	/^		rng: rng@48310000 {$/;"	l
rng	include/fsl_sec.h	/^	struct rng4tst rng;	\/* RNG Registers *\/$/;"	m	struct:ccsr_sec	typeref:struct:rng4tst
rng4tst	include/fsl_sec.h	/^struct rng4tst {$/;"	s
rng_base	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 rng_base;			\/* 0x8000 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
rng_ctrl	arch/m68k/include/asm/coldfire/rng.h	/^typedef struct rng_ctrl {$/;"	s
rng_err_id_list	drivers/crypto/fsl/error.c	/^static const char * const rng_err_id_list[] = {$/;"	v	typeref:typename:const char * const[]	file:
rng_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	rng_fck: rng_fck {$/;"	l
rng_init	drivers/crypto/fsl/jr.c	/^static int rng_init(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
rng_t	arch/m68k/include/asm/coldfire/rng.h	/^} rng_t;$/;"	t	typeref:struct:rng_ctrl
rngb	arch/arm/dts/imx6ull.dtsi	/^			rngb: rngb@02284000 {$/;"	l	label:aips3
rnr	arch/arm/include/asm/armv7m.h	/^	uint32_t rnr;		\/* Region Number Register *\/$/;"	m	struct:v7m_mpu	typeref:typename:uint32_t
ro	drivers/usb/gadget/f_mass_storage.c	/^		char ro;$/;"	m	struct:fsg_config::fsg_lun_config	typeref:typename:char	file:
ro	drivers/usb/gadget/storage_common.c	/^	unsigned int	ro:1;$/;"	m	struct:fsg_lun	typeref:typename:unsigned int:1	file:
ro_compat_version	fs/ubifs/ubifs-media.h	/^	__le32 ro_compat_version;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
ro_compat_version	fs/ubifs/ubifs.h	/^	int ro_compat_version;$/;"	m	struct:ubifs_info	typeref:typename:int
ro_error	fs/ubifs/ubifs.h	/^	unsigned int ro_error:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
ro_media	fs/ubifs/ubifs.h	/^	unsigned int ro_media:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
ro_mode	drivers/mtd/ubi/ubi.h	/^	int ro_mode;$/;"	m	struct:ubi_device	typeref:typename:int
ro_mode	include/linux/mtd/ubi.h	/^	int ro_mode;$/;"	m	struct:ubi_device_info	typeref:typename:int
ro_mount	fs/ubifs/ubifs.h	/^	unsigned int ro_mount:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
robp	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 robp;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
roc	drivers/net/e1000.h	/^	uint64_t roc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rockchip_dp_ids	drivers/video/rockchip/rk_edp.c	/^static const struct udevice_id rockchip_dp_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_dwc3_phy_setup	drivers/usb/host/xhci-rockchip.c	/^static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg,$/;"	f	typeref:typename:void	file:
rockchip_dwmmc_bind	drivers/mmc/rockchip_dw_mmc.c	/^static int rockchip_dwmmc_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_dwmmc_get_mmc_clk	drivers/mmc/rockchip_dw_mmc.c	/^static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)$/;"	f	typeref:typename:uint	file:
rockchip_dwmmc_ids	drivers/mmc/rockchip_dw_mmc.c	/^static const struct udevice_id rockchip_dwmmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_dwmmc_ofdata_to_platdata	drivers/mmc/rockchip_dw_mmc.c	/^static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_dwmmc_priv	drivers/mmc/rockchip_dw_mmc.c	/^struct rockchip_dwmmc_priv {$/;"	s	file:
rockchip_dwmmc_probe	drivers/mmc/rockchip_dw_mmc.c	/^static int rockchip_dwmmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_dwmmc_pwrseq_ids	drivers/mmc/rockchip_dw_mmc.c	/^static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_dwmmc_pwrseq_ops	drivers/mmc/rockchip_dw_mmc.c	/^static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {$/;"	v	typeref:typename:const struct pwrseq_ops	file:
rockchip_dwmmc_pwrseq_set_power	drivers/mmc/rockchip_dw_mmc.c	/^static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
rockchip_edp_force_hpd	drivers/video/rockchip/rk_edp.c	/^static void rockchip_edp_force_hpd(struct rk_edp_priv *edp)$/;"	f	typeref:typename:void	file:
rockchip_edp_get_plug_in_status	drivers/video/rockchip/rk_edp.c	/^static int rockchip_edp_get_plug_in_status(struct rk_edp_priv *edp)$/;"	f	typeref:typename:int	file:
rockchip_edp_wait_hpd	drivers/video/rockchip/rk_edp.c	/^static void rockchip_edp_wait_hpd(struct rk_edp_priv *edp)$/;"	f	typeref:typename:void	file:
rockchip_fb_data_format_t	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^enum rockchip_fb_data_format_t {$/;"	g
rockchip_get_clk	arch/arm/mach-rockchip/rk3036/clk_rk3036.c	/^int rockchip_get_clk(struct udevice **devp)$/;"	f	typeref:typename:int
rockchip_get_clk	arch/arm/mach-rockchip/rk3288/clk_rk3288.c	/^int rockchip_get_clk(struct udevice **devp)$/;"	f	typeref:typename:int
rockchip_get_clk	arch/arm/mach-rockchip/rk3399/clk_rk3399.c	/^int rockchip_get_clk(struct udevice **devp)$/;"	f	typeref:typename:int
rockchip_get_cru	arch/arm/mach-rockchip/rk3036/clk_rk3036.c	/^void *rockchip_get_cru(void)$/;"	f	typeref:typename:void *
rockchip_get_cru	arch/arm/mach-rockchip/rk3288/clk_rk3288.c	/^void *rockchip_get_cru(void)$/;"	f	typeref:typename:void *
rockchip_get_cru	arch/arm/mach-rockchip/rk3399/clk_rk3399.c	/^void *rockchip_get_cru(void)$/;"	f	typeref:typename:void *
rockchip_get_ticks	arch/arm/mach-rockchip/rk_timer.c	/^static uint64_t rockchip_get_ticks(void)$/;"	f	typeref:typename:uint64_t	file:
rockchip_gpio_direction_input	drivers/gpio/rk_gpio.c	/^static int rockchip_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
rockchip_gpio_direction_output	drivers/gpio/rk_gpio.c	/^static int rockchip_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
rockchip_gpio_get_function	drivers/gpio/rk_gpio.c	/^static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
rockchip_gpio_get_value	drivers/gpio/rk_gpio.c	/^static int rockchip_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
rockchip_gpio_ids	drivers/gpio/rk_gpio.c	/^static const struct udevice_id rockchip_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_gpio_priv	drivers/gpio/rk_gpio.c	/^struct rockchip_gpio_priv {$/;"	s	file:
rockchip_gpio_probe	drivers/gpio/rk_gpio.c	/^static int rockchip_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_gpio_regs	arch/arm/include/asm/arch-rockchip/gpio.h	/^struct rockchip_gpio_regs {$/;"	s
rockchip_gpio_set_value	drivers/gpio/rk_gpio.c	/^static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
rockchip_i2c_ids	drivers/i2c/rk_i2c.c	/^static const struct udevice_id rockchip_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_i2c_ofdata_to_platdata	drivers/i2c/rk_i2c.c	/^static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
rockchip_i2c_ops	drivers/i2c/rk_i2c.c	/^static const struct dm_i2c_ops rockchip_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
rockchip_i2c_probe	drivers/i2c/rk_i2c.c	/^static int rockchip_i2c_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
rockchip_i2c_set_bus_speed	drivers/i2c/rk_i2c.c	/^int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int
rockchip_i2c_xfer	drivers/i2c/rk_i2c.c	/^static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
rockchip_iomux	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^struct rockchip_iomux {$/;"	s	file:
rockchip_lvds_ids	drivers/video/rockchip/rk_lvds.c	/^static const struct udevice_id rockchip_lvds_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_mac_set_clk	drivers/clk/rockchip/clk_rk3288.c	/^static int rockchip_mac_set_clk(struct rk3288_cru *cru,$/;"	f	typeref:typename:int	file:
rockchip_mmc_get_clk	drivers/clk/rockchip/clk_rk3036.c	/^static ulong rockchip_mmc_get_clk(struct rk3036_cru *cru, uint clk_general_rate,$/;"	f	typeref:typename:ulong	file:
rockchip_mmc_get_clk	drivers/clk/rockchip/clk_rk3288.c	/^static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,$/;"	f	typeref:typename:ulong	file:
rockchip_mmc_plat	drivers/mmc/rockchip_dw_mmc.c	/^struct rockchip_mmc_plat {$/;"	s	file:
rockchip_mmc_set_clk	drivers/clk/rockchip/clk_rk3036.c	/^static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate,$/;"	f	typeref:typename:ulong	file:
rockchip_mmc_set_clk	drivers/clk/rockchip/clk_rk3288.c	/^static ulong rockchip_mmc_set_clk(struct rk3288_cru *cru, uint gclk_rate,$/;"	f	typeref:typename:ulong	file:
rockchip_mpll_cfg	drivers/video/rockchip/rk_hdmi.c	/^static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {$/;"	v	typeref:typename:const struct hdmi_mpll_config[]	file:
rockchip_phy_config	drivers/video/rockchip/rk_hdmi.c	/^static const struct hdmi_phy_config rockchip_phy_config[] = {$/;"	v	typeref:typename:const struct hdmi_phy_config[]	file:
rockchip_pin_bank	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^struct rockchip_pin_bank {$/;"	s	file:
rockchip_sdhc	drivers/mmc/rockchip_sdhci.c	/^struct rockchip_sdhc {$/;"	s	file:
rockchip_sdhc_plat	drivers/mmc/rockchip_sdhci.c	/^struct rockchip_sdhc_plat {$/;"	s	file:
rockchip_sdhci_bind	drivers/mmc/rockchip_sdhci.c	/^static int rockchip_sdhci_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_serial_probe	drivers/serial/serial_rockchip.c	/^static int rockchip_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_spi	drivers/spi/rk_spi.h	/^struct rockchip_spi {$/;"	s
rockchip_spi_claim_bus	drivers/spi/rk_spi.c	/^static int rockchip_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_spi_get_clk	drivers/clk/rockchip/clk_rk3288.c	/^static ulong rockchip_spi_get_clk(struct rk3288_cru *cru, uint gclk_rate,$/;"	f	typeref:typename:ulong	file:
rockchip_spi_ids	drivers/spi/rk_spi.c	/^static const struct udevice_id rockchip_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rockchip_spi_ofdata_to_platdata	drivers/spi/rk_spi.c	/^static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
rockchip_spi_ops	drivers/spi/rk_spi.c	/^static const struct dm_spi_ops rockchip_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
rockchip_spi_platdata	drivers/spi/rk_spi.c	/^struct rockchip_spi_platdata {$/;"	s	file:
rockchip_spi_priv	drivers/spi/rk_spi.c	/^struct rockchip_spi_priv {$/;"	s	file:
rockchip_spi_probe	drivers/spi/rk_spi.c	/^static int rockchip_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
rockchip_spi_release_bus	drivers/spi/rk_spi.c	/^static int rockchip_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rockchip_spi_set_clk	drivers/clk/rockchip/clk_rk3288.c	/^static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate,$/;"	f	typeref:typename:ulong	file:
rockchip_spi_set_mode	drivers/spi/rk_spi.c	/^static int rockchip_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
rockchip_spi_set_speed	drivers/spi/rk_spi.c	/^static int rockchip_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
rockchip_spi_xfer	drivers/spi/rk_spi.c	/^static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
rockchip_timer_init	arch/arm/mach-rockchip/rk_timer.c	/^void rockchip_timer_init(void)$/;"	f	typeref:typename:void
rockchip_uart_platdata	drivers/serial/serial_rockchip.c	/^struct rockchip_uart_platdata {$/;"	s	file:
rockchip_udelay	arch/arm/mach-rockchip/rk_timer.c	/^void rockchip_udelay(unsigned int usec)$/;"	f	typeref:typename:void
rockchip_usb2_phy_cfg	drivers/usb/phy/rockchip_usb2_phy.c	/^struct rockchip_usb2_phy_cfg {$/;"	s	file:
rockchip_usb2_phy_dt_id	drivers/usb/phy/rockchip_usb2_phy.c	/^struct rockchip_usb2_phy_dt_id {$/;"	s	file:
rockchip_usb2_phy_dt_ids	drivers/usb/phy/rockchip_usb2_phy.c	/^static struct rockchip_usb2_phy_dt_id rockchip_usb2_phy_dt_ids[] = {$/;"	v	typeref:struct:rockchip_usb2_phy_dt_id[]	file:
rockchip_vop_set_clk	drivers/clk/rockchip/clk_rk3288.c	/^static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,$/;"	f	typeref:typename:int	file:
rockchip_xhci	drivers/usb/host/xhci-rockchip.c	/^struct rockchip_xhci {$/;"	s	file:
rockchip_xhci_core_exit	drivers/usb/host/xhci-rockchip.c	/^static int rockchip_xhci_core_exit(struct rockchip_xhci *rkxhci)$/;"	f	typeref:typename:int	file:
rockchip_xhci_core_init	drivers/usb/host/xhci-rockchip.c	/^static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci,$/;"	f	typeref:typename:int	file:
rockchip_xhci_platdata	drivers/usb/host/xhci-rockchip.c	/^struct rockchip_xhci_platdata {$/;"	s	file:
rof_neg_shift	arch/arm/mach-uniphier/dram/umc-ld11.c	/^const int rof_neg_shift[RANK_BLOCKS_TR][2] = { {-17, -17}, {-17, -17} };$/;"	v	typeref:typename:const int[][2]
rof_neg_shift_pre	arch/arm/mach-uniphier/dram/umc-ld11.c	/^const int rof_neg_shift_pre[RANK_BLOCKS_TR][2] = { {0, 0}, {0, 0} };$/;"	v	typeref:typename:const int[][2]
rof_pos_shift	arch/arm/mach-uniphier/dram/umc-ld11.c	/^const int rof_pos_shift[RANK_BLOCKS_TR][2] = { {-35, -35}, {-35, -35} };$/;"	v	typeref:typename:const int[][2]
rof_pos_shift_pre	arch/arm/mach-uniphier/dram/umc-ld11.c	/^const int rof_pos_shift_pre[RANK_BLOCKS_TR][2] = { {0, 0}, {0, 0} };$/;"	v	typeref:typename:const int[][2]
rol_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 rol_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
rol_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 rol_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
rol_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 rol_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
rollback_space_kernel	drivers/tpm/tpm_tis_sandbox.c	/^struct rollback_space_kernel {$/;"	s	file:
rollback_space_kernel	drivers/tpm/tpm_tis_sandbox.c	/^} __packed rollback_space_kernel;$/;"	v	typeref:struct:rollback_space_kernel __packed
rom	Makefile	/^rom: u-boot.rom FORCE$/;"	t
rom	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	rom;$/;"	m	struct:nic301_registers	typeref:typename:u32
rom	arch/powerpc/include/asm/immap_83xx.h	/^	rom83xx_t		rom;		\/* On Chip ROM *\/$/;"	m	struct:immap	typeref:typename:rom83xx_t
rom83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct rom83xx {$/;"	s
rom83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} rom83xx_t;$/;"	t	typeref:struct:rom83xx
rom_bist_data	arch/x86/include/asm/arch-broadwell/me.h	/^	struct mbp_rom_bist_data *rom_bist_data;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_rom_bist_data *
rom_bist_data	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct mbp_rom_bist_data rom_bist_data;$/;"	m	struct:me_bios_payload	typeref:struct:mbp_rom_bist_data
rom_loc	board/freescale/p1010rdb/p1010rdb.c	/^	u8 rom_loc;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
rom_shadow	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 rom_shadow; \/* 0x28 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
rom_size	include/cbfs.h	/^	u32 rom_size;$/;"	m	struct:cbfs_header	typeref:typename:u32
romcodegrp_bootromswstate	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_bootromswstate;	\/* 0xd0 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_cpu1startaddr	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_cpu1startaddr;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_ctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_ctrl;		\/* 0xc0 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_initswlastld	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_initswlastld;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_initswstate	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_initswstate;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_warmramgrp_crc	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_warmramgrp_crc;	\/* 0xf0 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_warmramgrp_datastart	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_warmramgrp_datastart;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_warmramgrp_enable	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_warmramgrp_enable;	\/* 0xe0 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_warmramgrp_execution	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_warmramgrp_execution;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romcodegrp_warmramgrp_length	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romcodegrp_warmramgrp_length;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romhwgrp_ctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	romhwgrp_ctrl;			\/* 0x100 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
romvec	arch/sparc/cpu/leon2/prom.c	/^	struct linux_romvec romvec;$/;"	m	struct:leon_prom_info	typeref:struct:linux_romvec	file:
romvec	arch/sparc/cpu/leon3/prom.c	/^	struct linux_romvec romvec;$/;"	m	struct:leon_prom_info	typeref:struct:linux_romvec	file:
ron_value	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t ron_value;$/;"	m	struct:mrc_params	typeref:typename:uint8_t
root	arch/arm/include/asm/arch-mx7/clock.h	/^	enum clk_root_index root;$/;"	m	struct:clk_root_setting	typeref:enum:clk_root_index
root	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	struct mxc_ccm_root_slice root[121];	\/* offset 0x8000 *\/$/;"	m	struct:mxc_ccm_reg	typeref:struct:mxc_ccm_root_slice[121]
root	drivers/mtd/ubi/ubi.h	/^	struct rb_root root;$/;"	m	struct:ubi_ainf_volume	typeref:struct:rb_root
root	drivers/usb/dwc3/core.h	/^	struct dentry		*root;$/;"	m	struct:dwc3	typeref:struct:dentry *
root	fs/ubifs/orphan.c	/^	struct rb_root root;$/;"	m	struct:check_info	typeref:struct:rb_root	file:
root	include/cramfs/cramfs_fs.h	/^	struct cramfs_inode root;	\/* root inode data *\/$/;"	m	struct:cramfs_super	typeref:struct:cramfs_inode
root	include/dm/test.h	/^	struct udevice *root;$/;"	m	struct:dm_test_state	typeref:struct:udevice *
rootEntry	scripts/kconfig/conf.c	/^static struct menu *rootEntry;$/;"	v	typeref:struct:menu *	file:
rootEntry	scripts/kconfig/qconf.h	/^	struct menu *rootEntry;$/;"	m	class:ConfigList	typeref:struct:menu *
root_array	arch/arm/cpu/armv7/mx7/clock_slice.c	/^static struct clk_root_map root_array[] = {$/;"	v	typeref:struct:clk_root_map[]	file:
root_auto_div	arch/arm/include/asm/arch-mx7/clock_slice.h	/^enum root_auto_div {$/;"	g
root_cluster	include/fat.h	/^	__u32	root_cluster;	\/* First cluster in root directory *\/$/;"	m	struct:boot_sector	typeref:typename:__u32
root_delay	net/sntp.h	/^	uint root_delay;$/;"	m	struct:sntp_pkt_t	typeref:typename:uint
root_dev	arch/sparc/lib/bootm.c	/^			unsigned short root_dev;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned short	file:
root_dev	arch/x86/include/asm/bootparam.h	/^	__u16	root_dev;$/;"	m	struct:setup_header	typeref:typename:__u16
root_dir	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *root_dir;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_obj *
root_dispersion	net/sntp.h	/^	uint root_dispersion;$/;"	m	struct:sntp_pkt_t	typeref:typename:uint
root_dprc_handle	drivers/net/fsl-mc/mc.c	/^uint16_t root_dprc_handle = 0;$/;"	v	typeref:typename:uint16_t
root_flags	arch/sparc/lib/bootm.c	/^			unsigned short root_flags;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned short	file:
root_flags	arch/x86/include/asm/bootparam.h	/^	__u16	root_flags;$/;"	m	struct:setup_header	typeref:typename:__u16
root_hub_config_des	include/usbroothubdes.h	/^static __u8 root_hub_config_des[] = {$/;"	v	typeref:typename:__u8[]
root_hub_dev_des	include/usbroothubdes.h	/^static __u8 root_hub_dev_des[] = {$/;"	v	typeref:typename:__u8[]
root_hub_devnum	drivers/usb/host/dwc2.c	/^	int root_hub_devnum;$/;"	m	struct:dwc2_priv	typeref:typename:int	file:
root_hub_devnum	drivers/usb/host/sl811-hcd.c	/^static int root_hub_devnum = 0;$/;"	v	typeref:typename:int	file:
root_hub_hub_des	include/usbroothubdes.h	/^static unsigned char root_hub_hub_des[] = {$/;"	v	typeref:typename:unsigned char[]
root_hub_str_index0	include/usbroothubdes.h	/^static unsigned char root_hub_str_index0[] = {$/;"	v	typeref:typename:unsigned char[]
root_hub_str_index1	include/usbroothubdes.h	/^static unsigned char root_hub_str_index1[] = {$/;"	v	typeref:typename:unsigned char[]
root_info	drivers/core/root.c	/^static const struct driver_info root_info = {$/;"	v	typeref:typename:const struct driver_info	file:
root_len	fs/ubifs/ubifs-media.h	/^	__le32 root_len;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
root_lnum	fs/ubifs/ubifs-media.h	/^	__le32 root_lnum;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
root_mc_io	drivers/net/fsl-mc/mc.c	/^struct fsl_mc_io *root_mc_io = NULL;$/;"	v	typeref:struct:fsl_mc_io *
root_offs	fs/ubifs/ubifs-media.h	/^	__le32 root_offs;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le32
root_post_div	arch/arm/include/asm/arch-mx7/clock_slice.h	/^enum root_post_div {$/;"	g
root_pre_div	arch/arm/include/asm/arch-mx7/clock_slice.h	/^enum root_pre_div {$/;"	g
root_priv	drivers/core/root.c	/^struct root_priv {$/;"	s	file:
root_properties	arch/sparc/cpu/leon2/prom.c	/^	struct property root_properties[4];$/;"	m	struct:leon_prom_info	typeref:struct:property[4]	file:
root_properties	arch/sparc/cpu/leon3/prom.c	/^	struct property root_properties[4];$/;"	m	struct:leon_prom_info	typeref:struct:property[4]	file:
rootdev	arch/arm/include/asm/setup.h	/^	    unsigned long rootdev;		\/* 16 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
rootdev	arch/arm/include/asm/setup.h	/^	u32 rootdev;$/;"	m	struct:tag_core	typeref:typename:u32
rootdev	arch/avr32/include/asm/setup.h	/^	u32 rootdev;$/;"	m	struct:tag_core	typeref:typename:u32
rootdev	arch/nds32/include/asm/setup.h	/^	u32 rootdev;$/;"	m	struct:tag_core	typeref:typename:u32
rootdev	drivers/usb/host/ehci.h	/^	int rootdev;$/;"	m	struct:ehci_ctrl	typeref:typename:int
rootdev	drivers/usb/host/xhci.h	/^	int rootdev;$/;"	m	struct:xhci_ctrl	typeref:typename:int
rootdir	disk/part_iso.h	/^	unsigned char rootdir[34];	\/* directory record for root dir *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[34]
rootdir	disk/part_iso.h	/^	unsigned char rootdir[34];	\/* directory record for root dir *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[34]
rootdir_sect	include/fat.h	/^	__u32	rootdir_sect;	\/* Start sector of root directory *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u32
roothub	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	} roothub;$/;"	m	struct:ohci_regs	typeref:struct:ohci_regs::ohci_roothub_regs
roothub	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	} roothub;$/;"	m	struct:ohci_regs	typeref:struct:ohci_regs::ohci_roothub_regs
roothub	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	} roothub;$/;"	m	struct:ohci_regs	typeref:struct:ohci_regs::ohci_roothub_regs
roothub	drivers/usb/host/ohci-s3c24xx.h	/^	} roothub;$/;"	m	struct:ohci_regs	typeref:struct:ohci_regs::ohci_roothub_regs
roothub	drivers/usb/host/ohci.h	/^	} roothub;$/;"	m	struct:ohci_regs	typeref:struct:ohci_regs::ohci_roothub_regs
roothub_a	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static u32 roothub_a (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_a	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static u32 roothub_a (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_a	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static u32 roothub_a (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_a	drivers/usb/host/ohci-hcd.c	/^static inline u32 roothub_a(struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_a	drivers/usb/host/ohci-s3c24xx.c	/^static u32 roothub_a(struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_b	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static inline u32 roothub_b (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_b	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static inline u32 roothub_b (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_b	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static inline u32 roothub_b (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_b	drivers/usb/host/ohci-hcd.c	/^static inline u32 roothub_b(struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_b	drivers/usb/host/ohci-s3c24xx.c	/^static inline u32 roothub_b(struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_portstatus	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static u32 roothub_portstatus (struct ohci *hc, int i)$/;"	f	typeref:typename:u32	file:
roothub_portstatus	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static u32 roothub_portstatus (struct ohci *hc, int i)$/;"	f	typeref:typename:u32	file:
roothub_portstatus	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static u32 roothub_portstatus (struct ohci *hc, int i)$/;"	f	typeref:typename:u32	file:
roothub_portstatus	drivers/usb/host/ohci-hcd.c	/^static inline u32 roothub_portstatus(struct ohci *hc, int i)$/;"	f	typeref:typename:u32	file:
roothub_portstatus	drivers/usb/host/ohci-s3c24xx.c	/^static u32 roothub_portstatus(struct ohci *hc, int i)$/;"	f	typeref:typename:u32	file:
roothub_status	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static inline u32 roothub_status (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_status	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static inline u32 roothub_status (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_status	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static inline u32 roothub_status (struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_status	drivers/usb/host/ohci-hcd.c	/^static inline u32 roothub_status(struct ohci *hc)$/;"	f	typeref:typename:u32	file:
roothub_status	drivers/usb/host/ohci-s3c24xx.c	/^static inline u32 roothub_status(struct ohci *hc)$/;"	f	typeref:typename:u32	file:
rootmenu	scripts/kconfig/menu.c	/^struct menu rootmenu;$/;"	v	typeref:struct:menu
rop	include/linux/fb.h	/^	__u16 rop;			\/* bitop operation *\/$/;"	m	struct:fb_cursor_user	typeref:typename:__u16
rop	include/linux/fb.h	/^	__u16 rop;		\/* bitop operation *\/$/;"	m	struct:fb_cursor	typeref:typename:__u16
rop	include/linux/fb.h	/^	__u32 rop;$/;"	m	struct:fb_fillrect	typeref:typename:__u32
ror_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 ror_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
ror_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 ror_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
ror_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 ror_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
rot	include/dm/test.h	/^	int rot;$/;"	m	struct:sandbox_sdl_plat	typeref:typename:int
rot	include/video.h	/^	ushort rot;$/;"	m	struct:video_priv	typeref:typename:ushort
rotate	include/linux/fb.h	/^	__u32 rotate;			\/* angle we rotate counter clockwise *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
rotate	include/linux/rbtree_augmented.h	/^	void (*rotate)(struct rb_node *old, struct rb_node *new);$/;"	m	struct:rb_augment_callbacks	typeref:typename:void (*)(struct rb_node * old,struct rb_node * new)
rotate_logo	board/aristainetos/aristainetos-v2.c	/^void rotate_logo(int rotations)$/;"	f	typeref:typename:void
rotate_logo_one	board/aristainetos/aristainetos-v2.c	/^static int rotate_logo_one(unsigned char *out, unsigned char *in)$/;"	f	typeref:typename:int	file:
rotator_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rotator_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
rotator_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rotator_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
rotator_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rotator_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
rotator_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rotator_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
round_down	include/linux/kernel.h	/^#define round_down(/;"	d
round_down	tools/mxsboot.c	/^#define round_down(/;"	d	file:
round_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	unsigned long (*round_rate)(struct clk *c, unsigned long rate);$/;"	m	struct:clk_ops	typeref:typename:unsigned long (*)(struct clk * c,unsigned long rate)
round_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	unsigned long (*round_rate) (struct clk *c, unsigned long rate);$/;"	m	struct:clk_ops	typeref:typename:unsigned long (*)(struct clk * c,unsigned long rate)
round_rate	drivers/video/ipu.h	/^	unsigned long (*round_rate) (struct clk *, unsigned long);$/;"	m	struct:clk	typeref:typename:unsigned long (*)(struct clk *,unsigned long)
round_up	include/linux/kernel.h	/^#define round_up(/;"	d
rounddown	include/linux/kernel.h	/^#define rounddown(/;"	d
rounddown_pow_of_two	include/linux/log2.h	/^#define rounddown_pow_of_two(/;"	d
roundup	include/linux/kernel.h	/^#define roundup(/;"	d
roundup	tools/mxsimage.h	/^#define roundup(/;"	d
roundup	tools/pblimage.c	/^#define roundup(/;"	d	file:
roundup_pow_of_two	include/linux/log2.h	/^#define roundup_pow_of_two(/;"	d
route	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 route;			\/* 80 *\/$/;"	m	struct:de_bld	typeref:typename:u32
route	arch/arm/include/asm/arch/display2.h	/^	u32 route;			\/* 80 *\/$/;"	m	struct:de_bld	typeref:typename:u32
route_smi	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool route_smi;$/;"	m	struct:pin_info	typeref:typename:bool	file:
rovr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rovr;		\/* RX Oversize Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rovr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rovr;		\/* 0x246d0 - Receive Oversize Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rovr	include/fsl_dtsec.h	/^	u32	rovr;		\/* Receive oversize packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
rovr	include/tsec.h	/^	u32	rovr;		\/* Receive Oversize Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
row	board/mpl/pip405/pip405.c	/^	const unsigned char row;$/;"	m	struct:__anonb110a3780308	typeref:typename:const unsigned char	file:
row	board/tqc/tqm834x/tqm834x.c	/^		long row;$/;"	m	struct:get_ddr_bank_size::__anon959caf850108	typeref:typename:long	file:
row	drivers/misc/cros_ec_sandbox.c	/^	int row;	\/* key matrix row *\/$/;"	m	struct:ec_keymatrix_entry	typeref:typename:int	file:
row	include/ec_commands.h	/^	uint8_t row;$/;"	m	struct:ec_params_mkbp_simulate_key	typeref:typename:uint8_t
row	include/key_matrix.h	/^	uint8_t row;	\/* row number (0 = first) *\/$/;"	m	struct:key_matrix_key	typeref:typename:uint8_t
row0	include/fsl_ifc.h	/^	u32 row0;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
row1	include/fsl_ifc.h	/^	u32 row1;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
row2	include/fsl_ifc.h	/^	u32 row2;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
row3	include/fsl_ifc.h	/^	u32 row3;$/;"	m	struct:fsl_ifc_nand	typeref:typename:u32
row_3_4	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u8 row_3_4;$/;"	m	struct:rk3288_sdram_channel	typeref:typename:u8
row_addr_cycles	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		row_addr_cycles;$/;"	m	struct:pxa3xx_nand_host	typeref:typename:unsigned int	file:
row_bits	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^	u8 row_bits;$/;"	m	struct:dram_para	typeref:typename:u8	file:
row_bits	arch/avr32/include/asm/sdram.h	/^	uint8_t row_bits, col_bits, bank_bits;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
row_bits	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t row_bits[NUM_CHANNELS];$/;"	m	struct:mrc_params	typeref:typename:uint32_t[]
row_cfg	include/tegra-kbc.h	/^	u32 row_cfg[4];$/;"	m	struct:kbc_tegra	typeref:typename:u32[4]
row_dens	include/spd.h	/^	unsigned char row_dens;    \/* 31 Density of each row on module *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
row_density	include/fsl_ddr_dimm_params.h	/^	unsigned int row_density;$/;"	m	struct:dimm_params_s	typeref:typename:unsigned int
row_mask	include/tegra-kbc.h	/^	u32 row_mask[16];$/;"	m	struct:kbc_tegra	typeref:typename:u32[16]
row_sz	arch/arm/include/asm/emif.h	/^	u8	row_sz[2]; \/* One entry each for x32 and x16 *\/$/;"	m	struct:lpddr2_addressing	typeref:typename:u8[2]
rowaddr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 rowaddr;	\/* row address bits (11-16)*\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
rowaddr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 rowaddr;	\/* row address bits (11-16)*\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u8
rowar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rowar; \/* RapidIO Outbound Attributes Register *\/$/;"	m	struct:rio_atmu_row	typeref:typename:u32
rowar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar0;		\/* 0xd0c10 - RapidIO Outbound Attributes Register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar1;		\/* 0xd0c30 - RapidIO Outbound Attributes Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar2;		\/* 0xd0c50 - RapidIO Outbound Attributes Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar3;		\/* 0xd0c70 - RapidIO Outbound Attributes Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar4;		\/* 0xd0c90 - RapidIO Outbound Attributes Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar5;		\/* 0xd0cb0 - RapidIO Outbound Attributes Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar6;		\/* 0xd0cd0 - RapidIO Outbound Attributes Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar7;		\/* 0xd0cf0 - RapidIO Outbound Attributes Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowar8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowar8;		\/* 0xd0d10 - RapidIO Outbound Attributes Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rowbar;$/;"	m	struct:rio_atmu_row	typeref:typename:u32
rowbar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar1;	\/* 0xd0c28 - RapidIO Outbound Window Base Address Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar2;	\/* 0xd0c48 - RapidIO Outbound Window Base Address Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar3;	\/* 0xd0c68 - RapidIO Outbound Window Base Address Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar4;	\/* 0xd0c88 - RapidIO Outbound Window Base Address Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar5;	\/* 0xd0ca8 - RapidIO Outbound Window Base Address Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar6;	\/* 0xd0cc8 - RapidIO Outbound Window Base Address Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar7;	\/* 0xd0ce8 - RapidIO Outbound Window Base Address Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowbar8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowbar8;	\/* 0xd0d08 - RapidIO Outbound Window Base Address Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows	arch/arm/mach-sunxi/dram_sun6i.c	/^	u8 rows;$/;"	m	struct:dram_sun6i_para	typeref:typename:u8	file:
rows	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u8 rows;$/;"	m	struct:dram_para	typeref:typename:u8	file:
rows	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 rows;$/;"	m	struct:dram_para	typeref:typename:u8	file:
rows	arch/arm/mach-sunxi/dram_sun9i.c	/^	u8 rows;$/;"	m	struct:dram_sun9i_para	typeref:typename:u8	file:
rows	arch/powerpc/cpu/ppc4xx/sdram.h	/^	int rows;$/;"	m	struct:sdram_conf_s	typeref:typename:int
rows	board/esd/pmc440/sdram.c	/^	int rows;$/;"	m	struct:sdram_conf_s	typeref:typename:int	file:
rows	include/ec_commands.h	/^	uint32_t rows;$/;"	m	struct:ec_response_mkbp_info	typeref:typename:uint32_t
rows	include/lcd_console.h	/^	short cols, rows;$/;"	m	struct:console_t	typeref:typename:short
rows	include/video_console.h	/^	int rows;$/;"	m	struct:vidconsole_priv	typeref:typename:int
rows1r1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r1;	\/* 0xd0c34 - RapidIO Outbound Window Segment 1 Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r2;	\/* 0xd0c54 - RapidIO Outbound Window Segment 1 Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r3;	\/* 0xd0c74 - RapidIO Outbound Window Segment 1 Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r4;	\/* 0xd0c94 - RapidIO Outbound Window Segment 1 Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r5;	\/* 0xd0cb4 - RapidIO Outbound Window Segment 1 Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r6;	\/* 0xd0cd4 - RapidIO Outbound Window Segment 1 Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r7;	\/* 0xd0cf4 - RapidIO Outbound Window Segment 1 Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows1r8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows1r8;	\/* 0xd0d14 - RapidIO Outbound Window Segment 1 Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r1;	\/* 0xd0c38 - RapidIO Outbound Window Segment 2 Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r2;	\/* 0xd0c58 - RapidIO Outbound Window Segment 2 Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r3;	\/* 0xd0c78 - RapidIO Outbound Window Segment 2 Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r4;	\/* 0xd0c98 - RapidIO Outbound Window Segment 2 Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r5;	\/* 0xd0cb8 - RapidIO Outbound Window Segment 2 Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r6;	\/* 0xd0cd8 - RapidIO Outbound Window Segment 2 Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r7;	\/* 0xd0cf8 - RapidIO Outbound Window Segment 2 Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows2r8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows2r8;	\/* 0xd0d18 - RapidIO Outbound Window Segment 2 Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r1;	\/* 0xd0c3c - RapidIO Outbound Window Segment 3 Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r2;	\/* 0xd0c5c - RapidIO Outbound Window Segment 3 Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r3;	\/* 0xd0c7c - RapidIO Outbound Window Segment 3 Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r4;	\/* 0xd0c9c - RapidIO Outbound Window Segment 3 Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r5;	\/* 0xd0cbc - RapidIO Outbound Window Segment 3 Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r6;	\/* 0xd0cdc - RapidIO Outbound Window Segment 3 Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r7;	\/* 0xd0cfc - RapidIO Outbound Window Segment 3 Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rows3r8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rows3r8;	\/* 0xd0d1c - RapidIO Outbound Window Segment 3 Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rowsr[3]; \/* Port RapidIO outbound window segment register *\/$/;"	m	struct:rio_atmu_row	typeref:typename:u32[3]
rowtar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rowtar; \/* RapidIO Outbound Window TAR *\/$/;"	m	struct:rio_atmu_row	typeref:typename:u32
rowtar0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar0;	\/* 0xd0c00 - RapidIO Outbound Window Translation Address Register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar1;	\/* 0xd0c20 - RapidIO Outbound Window Translation Address Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar2;	\/* 0xd0c40 - RapidIO Outbound Window Translation Address Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar3;	\/* 0xd0c60 - RapidIO Outbound Window Translation Address Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar4;	\/* 0xd0c80 - RapidIO Outbound Window Translation Address Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar5;	\/* 0xd0ca0 - RapidIO Outbound Window Translation Address Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar6;	\/* 0xd0cc0 - RapidIO Outbound Window Translation Address Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar7;	\/* 0xd0ce0 - RapidIO Outbound Window Translation Address Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtar8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtar8;	\/* 0xd0d00 - RapidIO Outbound Window Translation Address Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rowtear; \/* RapidIO Outbound Window TEAR *\/$/;"	m	struct:rio_atmu_row	typeref:typename:u32
rowtear0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear0;	\/* 0xd0c04 - RapidIO Outbound Window Translation Ext. Address Register 0 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear1;	\/* 0xd0c24 - RapidIO Outbound Window Translation Ext. Address Register 1 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear2	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear2;	\/* 0xd0c44 - RapidIO Outbound Window Translation Ext. Address Register 2 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear3	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear3;	\/* 0xd0c64 - RapidIO Outbound Window Translation Ext. Address Register 3 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear4	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear4;	\/* 0xd0c84 - RapidIO Outbound Window Translation Ext. Address Register 4 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear5	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear5;	\/* 0xd0ca4 - RapidIO Outbound Window Translation Ext. Address Register 5 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear6	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear6;	\/* 0xd0cc4 - RapidIO Outbound Window Translation Ext. Address Register 6 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear7	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear7;	\/* 0xd0ce4 - RapidIO Outbound Window Translation Ext. Address Register 7 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rowtear8	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rowtear8;	\/* 0xd0d04 - RapidIO Outbound Window Translation Ext. Address Register 8 *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
rp	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rp;			\/* 0x38: EMC_RP *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rp	drivers/net/ftmac100.h	/^	unsigned int	rp;		\/* 0xf4 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
rp_gid	fs/ubifs/ubifs-media.h	/^	__le32 rp_gid;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
rp_gid	fs/ubifs/ubifs.h	/^	kgid_t rp_gid;$/;"	m	struct:ubifs_info	typeref:typename:kgid_t
rp_readl	drivers/pci/pci_tegra.c	/^static unsigned long rp_readl(struct tegra_pcie_port *port,$/;"	f	typeref:typename:unsigned long	file:
rp_size	fs/ubifs/ubifs-media.h	/^	__le64 rp_size;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le64
rp_size	fs/ubifs/ubifs.h	/^	long long rp_size;$/;"	m	struct:ubifs_info	typeref:typename:long long
rp_uid	fs/ubifs/ubifs-media.h	/^	__le32 rp_uid;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
rp_uid	fs/ubifs/ubifs.h	/^	kuid_t rp_uid;$/;"	m	struct:ubifs_info	typeref:typename:kuid_t
rp_writel	drivers/pci/pci_tegra.c	/^static void rp_writel(struct tegra_pcie_port *port, unsigned long value,$/;"	f	typeref:typename:void	file:
rpc_accept_stat	net/nfs.h	/^enum rpc_accept_stat {$/;"	g
rpc_add_credentials	net/nfs.c	/^static uint32_t *rpc_add_credentials(uint32_t *p)$/;"	f	typeref:typename:uint32_t *	file:
rpc_id	net/nfs.c	/^static unsigned long rpc_id;$/;"	v	typeref:typename:unsigned long	file:
rpc_lookup_reply	net/nfs.c	/^static int rpc_lookup_reply(int prog, uchar *pkt, unsigned len)$/;"	f	typeref:typename:int	file:
rpc_lookup_req	net/nfs.c	/^static void rpc_lookup_req(int prog, int ver)$/;"	f	typeref:typename:void	file:
rpc_req	net/nfs.c	/^static void rpc_req(int rpc_prog, int rpc_proc, uint32_t *data, int datalen)$/;"	f	typeref:typename:void	file:
rpc_t	net/nfs.h	/^struct rpc_t {$/;"	s
rpcvers	net/nfs.h	/^			uint32_t rpcvers;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780208	typeref:typename:uint32_t
rpf_aep	drivers/net/ftmac100.h	/^	unsigned int	rpf_aep;	\/* 0xd8 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
rpi_is_serial_active	board/raspberrypi/rpi/rpi.c	/^static bool rpi_is_serial_active(void)$/;"	f	typeref:typename:bool	file:
rpi_model	board/raspberrypi/rpi/rpi.c	/^struct rpi_model {$/;"	s	file:
rpi_model_unknown	board/raspberrypi/rpi/rpi.c	/^static const struct rpi_model rpi_model_unknown = {$/;"	v	typeref:typename:const struct rpi_model	file:
rpi_models_new_scheme	board/raspberrypi/rpi/rpi.c	/^static const struct rpi_model rpi_models_new_scheme[] = {$/;"	v	typeref:typename:const struct rpi_model[]	file:
rpi_models_old_scheme	board/raspberrypi/rpi/rpi.c	/^static const struct rpi_model rpi_models_old_scheme[] = {$/;"	v	typeref:typename:const struct rpi_model[]	file:
rpkt	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rpkt;		\/* RX Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rpkt	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rpkt;		\/* 0x246a0 - Receive Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rpkt	include/fsl_dtsec.h	/^	u32	rpkt;		\/* Receive packet counter *\/$/;"	m	struct:dtsec	typeref:typename:u32
rpkt	include/tsec.h	/^	u32	rpkt;		\/* Receive Packet Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	rpll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
rpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	rpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
rpll_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	rpll_con2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
rpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	rpll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
rpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned rpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
rpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned rpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
rpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned rpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
rpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
rplluser_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rplluser_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
rplluser_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rplluser_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
rplluser_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rplluser_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
rpm	include/ec_commands.h	/^	uint32_t rpm;$/;"	m	struct:ec_params_pwm_set_fan_target_rpm	typeref:typename:uint32_t
rpm	include/ec_commands.h	/^	uint32_t rpm;$/;"	m	struct:ec_response_pwm_get_fan_rpm	typeref:typename:uint32_t
rpmb_err_msg	drivers/mmc/rpmb.c	/^static const char * const rpmb_err_msg[] = {$/;"	v	typeref:typename:const char * const[]	file:
rpmb_hmac	drivers/mmc/rpmb.c	/^static void rpmb_hmac(unsigned char *key, unsigned char *buff, int len,$/;"	f	typeref:typename:void	file:
rpn	arch/powerpc/include/asm/mmu.h	/^	unsigned long long rpn:52;$/;"	m	struct:_PTE	typeref:typename:unsigned long long:52
rpr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	rpr;		\/* 0x100 Receive Pointer Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
rpr	arch/powerpc/include/asm/immap_512x.h	/^	u32 rpr;		\/* Reset protection Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rpr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rpr;		\/* Reset protection Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rpr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 rpr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
rproc_1	arch/sandbox/dts/test.dts	/^	rproc_1: rproc@1 {$/;"	l
rproc_2	arch/sandbox/dts/test.dts	/^	rproc_2: rproc@2 {$/;"	l
rproc_get_ops	include/remoteproc.h	/^#define rproc_get_ops(/;"	d
rproc_init	drivers/remoteproc/rproc-uclass.c	/^int rproc_init(void)$/;"	f	typeref:typename:int
rproc_init	include/remoteproc.h	/^static inline int rproc_init(void) { return -ENOSYS; }$/;"	f	typeref:typename:int
rproc_is_initialized	drivers/remoteproc/rproc-uclass.c	/^bool rproc_is_initialized(void)$/;"	f	typeref:typename:bool
rproc_is_initialized	include/remoteproc.h	/^static inline bool rproc_is_initialized(void) { return false; }$/;"	f	typeref:typename:bool
rproc_is_running	drivers/remoteproc/rproc-uclass.c	/^int rproc_is_running(int id)$/;"	f	typeref:typename:int
rproc_is_running	include/remoteproc.h	/^static inline int rproc_is_running(int id) { return -ENOSYS; }$/;"	f	typeref:typename:int
rproc_load	drivers/remoteproc/rproc-uclass.c	/^int rproc_load(int id, ulong addr, ulong size)$/;"	f	typeref:typename:int
rproc_load	include/remoteproc.h	/^static inline int rproc_load(int id, ulong addr, ulong size) { return -ENOSYS; }$/;"	f	typeref:typename:int
rproc_mem_type	include/remoteproc.h	/^enum rproc_mem_type {$/;"	g
rproc_name_is_unique	drivers/remoteproc/rproc-uclass.c	/^static bool rproc_name_is_unique(struct udevice *check_dev,$/;"	f	typeref:typename:bool	file:
rproc_ops	drivers/remoteproc/rproc-uclass.c	/^enum rproc_ops {$/;"	g	file:
rproc_ping	drivers/remoteproc/rproc-uclass.c	/^int rproc_ping(int id)$/;"	f	typeref:typename:int
rproc_ping	include/remoteproc.h	/^static inline int rproc_ping(int id) { return -ENOSYS; }$/;"	f	typeref:typename:int
rproc_post_probe	drivers/remoteproc/rproc-uclass.c	/^static int rproc_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rproc_pre_probe	drivers/remoteproc/rproc-uclass.c	/^static int rproc_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rproc_reset	drivers/remoteproc/rproc-uclass.c	/^int rproc_reset(int id)$/;"	f	typeref:typename:int
rproc_reset	include/remoteproc.h	/^static inline int rproc_reset(int id) { return -ENOSYS; }$/;"	f	typeref:typename:int
rproc_start	drivers/remoteproc/rproc-uclass.c	/^int rproc_start(int id)$/;"	f	typeref:typename:int
rproc_start	include/remoteproc.h	/^static inline int rproc_start(int id) { return -ENOSYS; }$/;"	f	typeref:typename:int
rproc_stop	drivers/remoteproc/rproc-uclass.c	/^int rproc_stop(int id)$/;"	f	typeref:typename:int
rproc_stop	include/remoteproc.h	/^static inline int rproc_stop(int id) { return -ENOSYS; }$/;"	f	typeref:typename:int
rpt_dly	include/tegra-kbc.h	/^	u32 rpt_dly;$/;"	m	struct:kbc_tegra	typeref:typename:u32
rptr	include/commproc.h	/^	ulong	rptr;		\/* Rx internal data pointer *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
rptr	include/usb/mpc8xx_udc.h	/^	uint rptr;	\/* Receive internal data pointer *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:uint
rptr	post/cpu/mpc8xx/usb.c	/^	uint rptr;$/;"	m	struct:usb_param	typeref:typename:uint	file:
rpu0_cfg	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rpu0_cfg; \/* 0x100 *\/$/;"	m	struct:rpu_regs	typeref:typename:u32
rpu1_cfg	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rpu1_cfg; \/* 0x200 *\/$/;"	m	struct:rpu_regs	typeref:typename:u32
rpu_base	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define rpu_base /;"	d
rpu_glbl_ctrl	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rpu_glbl_ctrl;$/;"	m	struct:rpu_regs	typeref:typename:u32
rpu_regs	arch/arm/include/asm/arch-zynqmp/hardware.h	/^struct rpu_regs {$/;"	s
rpubkey_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rpubkey_0;		\/* 0x300 *\/$/;"	m	struct:ctrl	typeref:typename:u32
rpubkey_1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rpubkey_1;		\/* 0x304 *\/$/;"	m	struct:ctrl	typeref:typename:u32
rpubkey_2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rpubkey_2;		\/* 0x308 *\/$/;"	m	struct:ctrl	typeref:typename:u32
rpubkey_3	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rpubkey_3;		\/* 0x30C *\/$/;"	m	struct:ctrl	typeref:typename:u32
rpubkey_4	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rpubkey_4;		\/* 0x310 *\/$/;"	m	struct:ctrl	typeref:typename:u32
rq_dstreg	drivers/block/sata_dwc.c	/^	struct dmareg			rq_dstreg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
rq_lst_dstreg	drivers/block/sata_dwc.c	/^	struct dmareg			rq_lst_dstreg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
rq_lst_srcreg	drivers/block/sata_dwc.c	/^	struct dmareg			rq_lst_srcreg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
rq_sgl_dstreg	drivers/block/sata_dwc.c	/^	struct dmareg			rq_sgl_dstreg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
rq_sgl_srcreg	drivers/block/sata_dwc.c	/^	struct dmareg			rq_sgl_srcreg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
rq_srcreg	drivers/block/sata_dwc.c	/^	struct dmareg			rq_srcreg;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
rqc	drivers/net/mvgbe.h	/^	u32 rqc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
rqfar	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rqfar;		\/* 0x24334 - Receive queue filing table address Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rqfcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rqfcr;		\/* 0x24338 - Receive queue filing table control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rqfd	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rqfd;$/;"	m	struct:autocal_regs	typeref:typename:u32	file:
rqfd	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rqfd;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rqfd_size	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 rqfd_size;$/;"	m	struct:ddrautocal	typeref:typename:u32	file:
rqfpr	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rqfpr;		\/* 0x2433c - Receive queue filing table property Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rqptr	drivers/qe/uec.h	/^	u32  rqptr;               \/* base pointer to the Rx Queues *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
rqr	drivers/serial/serial_stm32x7.h	/^	u32 rqr;$/;"	m	struct:stm32_usart	typeref:typename:u32
rqt	drivers/usb/gadget/f_thor.h	/^	s32 rqt;		\/* request id *\/$/;"	m	struct:rqt_box	typeref:typename:s32
rqt	drivers/usb/gadget/f_thor.h	/^enum rqt {$/;"	g
rqt_box	drivers/usb/gadget/f_thor.h	/^struct rqt_box {		\/* total: 256B *\/$/;"	s
rqt_data	drivers/usb/gadget/f_thor.h	/^	s32 rqt_data;		\/* request data id *\/$/;"	m	struct:rqt_box	typeref:typename:s32
rqt_data	drivers/usb/gadget/f_thor.h	/^enum rqt_data {$/;"	g
rqueue	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rqueue;         \/* 0x24314 - Receive queue control register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rr	include/u-boot/rsa-mod-exp.h	/^	const void *rr;		\/* R^2 can be treated as byte array *\/$/;"	m	struct:key_prop	typeref:typename:const void *
rr	include/u-boot/rsa.h	/^	uint32_t *rr;		\/* R^2 as little endian array *\/$/;"	m	struct:rsa_public_key	typeref:typename:uint32_t *
rr1	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 rr1;	\/* Receive Register 1 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
rr2	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 rr2;	\/* Receive Register 2 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
rr3	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 rr3;	\/* Receive Register 3 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
rrd	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rrd;		\/* 0x54: EMC_RRD *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rrd	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t rrd;$/;"	m	struct:dram_params	typeref:typename:uint32_t
rregs	include/fsl_ifc.h	/^	struct fsl_ifc_runtime *rregs;$/;"	m	struct:fsl_ifc	typeref:struct:fsl_ifc_runtime *
rrej	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rrej;	        \/* 0x24740 - Receive filer rejected packet counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rreturn	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	rreturn;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
rrw_delay	drivers/spi/ath79_spi.c	/^	u32 rrw_delay;$/;"	m	struct:ath79_spi_priv	typeref:typename:u32	file:
rs	arch/sh/include/asm/ptrace.h	/^	unsigned long	rs;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
rs232_desc	drivers/serial/usbtty.c	/^static struct rs232_emu rs232_desc={$/;"	v	typeref:struct:rs232_emu	file:
rs232_emu	include/usb_cdc_acm.h	/^struct rs232_emu{$/;"	s
rs232_en	board/gateworks/gw_ventana/common.h	/^	int rs232_en;$/;"	m	struct:ventana	typeref:typename:int
rs485en	board/gateworks/gw_ventana/common.h	/^	int rs485en;$/;"	m	struct:ventana	typeref:typename:int
rs5c372_convert_to_time	drivers/rtc/rs5c372.c	/^rs5c372_convert_to_time(struct rtc_time *dt, unsigned char *buf)$/;"	f	typeref:typename:void	file:
rs5c372_enable	drivers/rtc/rs5c372.c	/^rs5c372_enable(void)$/;"	f	typeref:typename:void	file:
rs5c372_readram	drivers/rtc/rs5c372.c	/^rs5c372_readram(unsigned char *buf, int len)$/;"	f	typeref:typename:int	file:
rs_serial_init	board/astro/mcf5373l/mcf5373l.c	/^int rs_serial_init(int port, int baud)$/;"	f	typeref:typename:int
rsa_add_verify_data	include/u-boot/rsa.h	/^static inline int rsa_add_verify_data(struct image_sign_info *info,$/;"	f	typeref:typename:int
rsa_add_verify_data	lib/rsa/rsa-sign.c	/^int rsa_add_verify_data(struct image_sign_info *info, void *keydest)$/;"	f	typeref:typename:int
rsa_convert_big_endian	lib/rsa/rsa-mod-exp.c	/^static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)$/;"	f	typeref:typename:void	file:
rsa_err	lib/rsa/rsa-sign.c	/^static int rsa_err(const char *msg)$/;"	f	typeref:typename:int	file:
rsa_get_exponent	lib/rsa/rsa-sign.c	/^static int rsa_get_exponent(RSA *key, uint64_t *e)$/;"	f	typeref:typename:int	file:
rsa_get_params	lib/rsa/rsa-sign.c	/^int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,$/;"	f	typeref:typename:int
rsa_get_priv_key	lib/rsa/rsa-sign.c	/^static int rsa_get_priv_key(const char *keydir, const char *name, RSA **rsap)$/;"	f	typeref:typename:int	file:
rsa_get_pub_key	lib/rsa/rsa-sign.c	/^static int rsa_get_pub_key(const char *keydir, const char *name, RSA **rsap)$/;"	f	typeref:typename:int	file:
rsa_init	lib/rsa/rsa-sign.c	/^static int rsa_init(void)$/;"	f	typeref:typename:int	file:
rsa_mod_exp	drivers/crypto/rsa_mod_exp/mod_exp_uclass.c	/^int rsa_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len,$/;"	f	typeref:typename:int
rsa_mod_exp_sw	lib/rsa/rsa-mod-exp.c	/^int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len,$/;"	f	typeref:typename:int
rsa_padding	include/image.h	/^	const uint8_t *rsa_padding;$/;"	m	struct:checksum_algo	typeref:typename:const uint8_t *
rsa_public_key	include/u-boot/rsa.h	/^struct rsa_public_key {$/;"	s
rsa_remove	lib/rsa/rsa-sign.c	/^static void rsa_remove(void)$/;"	f	typeref:typename:void	file:
rsa_sign	include/u-boot/rsa.h	/^static inline int rsa_sign(struct image_sign_info *info,$/;"	f	typeref:typename:int
rsa_sign	lib/rsa/rsa-sign.c	/^int rsa_sign(struct image_sign_info *info,$/;"	f	typeref:typename:int
rsa_sign_with_key	lib/rsa/rsa-sign.c	/^static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,$/;"	f	typeref:typename:int	file:
rsa_verify	include/u-boot/rsa.h	/^static inline int rsa_verify(struct image_sign_info *info,$/;"	f	typeref:typename:int
rsa_verify	lib/rsa/rsa-verify.c	/^int rsa_verify(struct image_sign_info *info,$/;"	f	typeref:typename:int
rsa_verify_key	lib/rsa/rsa-verify.c	/^static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,$/;"	f	typeref:typename:int	file:
rsa_verify_with_keynode	lib/rsa/rsa-verify.c	/^static int rsa_verify_with_keynode(struct image_sign_info *info,$/;"	f	typeref:typename:int	file:
rsb_await_trans	arch/arm/mach-sunxi/rsb.c	/^static int rsb_await_trans(void)$/;"	f	typeref:typename:int	file:
rsb_cfg_io	arch/arm/mach-sunxi/rsb.c	/^static void rsb_cfg_io(void)$/;"	f	typeref:typename:void	file:
rsb_do_trans	arch/arm/mach-sunxi/rsb.c	/^static int rsb_do_trans(void)$/;"	f	typeref:typename:int	file:
rsb_init	arch/arm/mach-sunxi/rsb.c	/^int rsb_init(void)$/;"	f	typeref:typename:int
rsb_read	arch/arm/mach-sunxi/rsb.c	/^int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data)$/;"	f	typeref:typename:int
rsb_set_clk	arch/arm/mach-sunxi/rsb.c	/^static void rsb_set_clk(void)$/;"	f	typeref:typename:void	file:
rsb_set_device_address	arch/arm/mach-sunxi/rsb.c	/^int rsb_set_device_address(u16 device_addr, u16 runtime_addr)$/;"	f	typeref:typename:int
rsb_set_device_mode	arch/arm/mach-sunxi/rsb.c	/^static int rsb_set_device_mode(void)$/;"	f	typeref:typename:int	file:
rsb_write	arch/arm/mach-sunxi/rsb.c	/^int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data)$/;"	f	typeref:typename:int
rsdt_address	arch/x86/include/asm/acpi_table.h	/^	u32 rsdt_address;	\/* Physical address of RSDT (32 bits) *\/$/;"	m	struct:acpi_rsdp	typeref:typename:u32
rser	drivers/spi/fsl_qspi.h	/^	u32 rser;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
rslr	include/synopsys/dwcddr21mctl.h	/^	unsigned int	rslr[4];	\/* Rank System Lantency *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[4]
rslr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 rslr0;		\/* 0x4c rank system latency register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rslr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 rslr0;		\/* 0x4c rank system latency register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rslr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 rslr1;		\/* 0x50 rank system latency register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rslr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 rslr1;		\/* 0x50 rank system latency register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
rsltmain_area	drivers/mtd/nand/mxc_nand.h	/^	u16 rsltmain_area;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
rsltspare_area	drivers/mtd/nand/mxc_nand.h	/^	u16 rsltspare_area;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
rsn_str	arch/arm/imx-common/hab.c	/^char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\\n",$/;"	v	typeref:typename:char * []
rsp	drivers/usb/gadget/f_thor.h	/^	s32 rsp;		\/* response id (= request id) *\/$/;"	m	struct:rsp_box	typeref:typename:s32
rsp	include/linux/immap_qe.h	/^	rsp_t rsp[0x2];		\/* RISC Special Registers$/;"	m	struct:qe_immap	typeref:typename:rsp_t[0x2]
rsp	include/linux/immap_qe.h	/^typedef struct rsp {$/;"	s
rsp0	include/faraday/ftsdc010.h	/^	unsigned int	rsp0;		\/* 0x08 - response reg0		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rsp1	include/faraday/ftsdc010.h	/^	unsigned int	rsp1;		\/* 0x0c - response reg1		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rsp10	arch/arm/include/asm/omap_mmc.h	/^	unsigned int rsp10;		\/* 0x110 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
rsp2	include/faraday/ftsdc010.h	/^	unsigned int	rsp2;		\/* 0x10 - response reg2		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rsp3	include/faraday/ftsdc010.h	/^	unsigned int	rsp3;		\/* 0x14 - response reg3		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rsp32	arch/arm/include/asm/omap_mmc.h	/^	unsigned int rsp32;		\/* 0x114 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
rsp54	arch/arm/include/asm/omap_mmc.h	/^	unsigned int rsp54;		\/* 0x118 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
rsp76	arch/arm/include/asm/omap_mmc.h	/^	unsigned int rsp76;		\/* 0x11C *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
rsp_box	drivers/usb/gadget/f_thor.h	/^struct rsp_box {		\/* total: 128B *\/$/;"	s
rsp_cmd	include/faraday/ftsdc010.h	/^	unsigned int	rsp_cmd;	\/* 0x18 - responded cmd reg	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
rsp_data	drivers/usb/gadget/f_thor.h	/^	s32 rsp_data;		\/* response data id *\/$/;"	m	struct:rsp_box	typeref:typename:s32
rsp_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) rsp_t;$/;"	t	typeref:struct:rsp
rspr	include/atmel_mci.h	/^	u32	rspr;	\/* 0x20 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
rspr1	include/atmel_mci.h	/^	u32	rspr1;	\/* 0x24 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
rspr2	include/atmel_mci.h	/^	u32	rspr2;	\/* 0x28 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
rspr3	include/atmel_mci.h	/^	u32	rspr3;	\/* 0x2c *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
rspreg0	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	rspreg0;	\/* _RESPONSE_R0_R1_0 CMD RESP 31:00 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
rspreg1	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	rspreg1;	\/* _RESPONSE_R2_R3_0 CMD RESP 63:32 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
rspreg2	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	rspreg2;	\/* _RESPONSE_R4_R5_0 CMD RESP 95:64 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
rspreg3	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	rspreg3;	\/* _RESPONSE_R6_R7_0 CMD RESP 127:96 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
rsr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 rsr;$/;"	m	struct:at91_emac	typeref:typename:u32
rsr	arch/blackfin/include/asm/serial4.h	/^	u32 rsr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
rsr	arch/m68k/include/asm/immap_520x.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5227x.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5235.h	/^	u8 rsr;			\/* 0x02 *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5275.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5301x.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5307.h	/^	u8  rsr;$/;"	m	struct:sim	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5329.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_5445x.h	/^	u8 rsr;$/;"	m	struct:rcm	typeref:typename:u8
rsr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsr;		\/* 0x44 *\/$/;"	m	struct:siu	typeref:typename:u32
rsr	arch/powerpc/include/asm/immap_512x.h	/^	u32 rsr;		\/* Reset Status Register *\/$/;"	m	struct:reset512x	typeref:typename:u32
rsr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 rsr;		\/* Reset Status Register *\/$/;"	m	struct:reset83xx	typeref:typename:u32
rsrv1	include/mpc5xxx.h	/^	volatile u16 rsrv1;             \/* 0x1A *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u16
rsrv1	include/mpc5xxx.h	/^	volatile u16 rsrv1;             \/* MSCAN + 0x02 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv10	include/mpc5xxx.h	/^	volatile u16 rsrv10;            \/* MSCAN + 0x2A *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv11	include/mpc5xxx.h	/^	volatile u16 rsrv11;            \/* MSCAN + 0x2E *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv12	include/mpc5xxx.h	/^	volatile u16 rsrv12;            \/* MSCAN + 0x32 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv13	include/mpc5xxx.h	/^	volatile u16 rsrv13;            \/* MSCAN + 0x36 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv14	include/mpc5xxx.h	/^	volatile u16 rsrv14;            \/* MSCAN + 0x3A *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv15	include/mpc5xxx.h	/^	volatile u16 rsrv15;            \/* MSCAN + 0x3E *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv2	include/mpc5xxx.h	/^	volatile u16 rsrv2;             \/* 0x1E *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u16
rsrv2	include/mpc5xxx.h	/^	volatile u16 rsrv2;             \/* MSCAN + 0x06 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv3	include/mpc5xxx.h	/^	volatile u16 rsrv3;             \/* MSCAN + 0x0A *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv4	include/mpc5xxx.h	/^	volatile u16 rsrv4;             \/* MSCAN + 0x0E *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv5	include/mpc5xxx.h	/^	volatile u16 rsrv5;             \/* MSCAN + 0x12 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv6	include/mpc5xxx.h	/^	volatile u16 rsrv6[3];          \/* MSCAN + 0x16 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16[3]
rsrv7	include/mpc5xxx.h	/^	volatile u16 rsrv7;             \/* MSCAN + 0x1E *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv8	include/mpc5xxx.h	/^	volatile u16 rsrv8;             \/* MSCAN + 0x22 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rsrv9	include/mpc5xxx.h	/^	volatile u16 rsrv9;             \/* MSCAN + 0x26 *\/$/;"	m	struct:mpc5xxx_mscan	typeref:typename:volatile u16
rst	arch/arm/dts/socfpga.dtsi	/^		rst: rstmgr@ffd05000 {$/;"	l
rst	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 rst;		\/* base + 0x0 *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u32
rst	arch/arm/include/asm/arch/cpucfg.h	/^	u32 rst;		\/* base + 0x0 *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u32
rst	board/freescale/common/ngpixis.h	/^	u8 rst;$/;"	m	struct:ngpixis	typeref:typename:u8
rst	board/freescale/common/pixis.h	/^	u8 rst;$/;"	m	struct:pixis	typeref:typename:u8
rst	drivers/i2c/i2c-uniphier-f.c	/^	u32 rst;			\/* reset control *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
rst0_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst0_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst0_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst0_en;		\/*0x300*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst0_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst0_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst1_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst1_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst1_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst1_en;		\/*0x310*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst1_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst1_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst2	board/freescale/common/pixis.h	/^	u8 rst2;$/;"	m	struct:pixis	typeref:typename:u8
rst2_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst2_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst2_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst2_en;		\/*0x320*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst2_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst2_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst3_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst3_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst3_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst3_en;		\/*0x330*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst3_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst3_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst4_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 rst4_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
rst4_en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 rst4_en;		\/*0x6f0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
rst4_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 rst4_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
rst5_dis	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 rst5_dis;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
rst5_en	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 rst5_en;		\/*0x6fc*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
rst5_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 rst5_stat;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
rst8_dis	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst8_dis;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst8_en	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst8_en;		\/*0x340*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst8_stat	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 rst8_stat;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
rst_assert	include/reset-uclass.h	/^	int (*rst_assert)(struct reset_ctl *reset_ctl);$/;"	m	struct:reset_ops	typeref:typename:int (*)(struct reset_ctl * reset_ctl)
rst_bps_sw	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 rst_bps_sw;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
rst_bps_wd	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 rst_bps_wd;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
rst_cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 rst_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
rst_cfg	arch/arm/include/asm/arch/display2.h	/^	u32 rst_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
rst_ctl	board/freescale/common/qixis.h	/^	u8 rst_ctl;     \/* Reset Control Register,0x40 *\/$/;"	m	struct:qixis	typeref:typename:u8
rst_deassert	include/reset-uclass.h	/^	int (*rst_deassert)(struct reset_ctl *reset_ctl);$/;"	m	struct:reset_ops	typeref:typename:int (*)(struct reset_ctl * reset_ctl)
rst_fpd_apu	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rst_fpd_apu; \/* 0x104 *\/$/;"	m	struct:crfapb_regs	typeref:typename:u32
rst_frc	board/freescale/common/qixis.h	/^	u8 rst_frc[2];  \/* Reset Force Registers,0x43 *\/$/;"	m	struct:qixis	typeref:typename:u8[2]
rst_gpio	drivers/net/pic32_eth.c	/^	struct gpio_desc rst_gpio;$/;"	m	struct:pic32eth_dev	typeref:struct:gpio_desc	file:
rst_lpd_top	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rst_lpd_top; \/* 0x23C *\/$/;"	m	struct:crlapb_regs	typeref:typename:u32
rst_rsn	board/freescale/common/qixis.h	/^	u8 rst_rsn;     \/* Reset Reason Register *\/$/;"	m	struct:qixis	typeref:typename:u8
rst_sel	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 rst_sel[GPIO_BANKS];$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32[]
rst_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rst_stat;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
rst_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rst_stat;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
rst_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rst_stat;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
rst_stat	board/freescale/common/qixis.h	/^	u8 rst_stat;    \/* Reset Status Register *\/$/;"	m	struct:qixis	typeref:typename:u8
rst_to_cke	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 rst_to_cke;	\/* Time from SDE enable to CKE rise *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
rstat	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstat;		\/* RX Status *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rstat	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rstat;		\/* 0x24304 - Receive Status Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rstat	include/tsec.h	/^	u32	rstat;		\/* Receive Status *\/$/;"	m	struct:tsec	typeref:typename:u32
rstate	drivers/qe/uec.h	/^	u8   rstate;$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8
rstate	include/commproc.h	/^	ulong	rstate;		\/* Rx internal state *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
rstate	include/usb/mpc8xx_udc.h	/^	uint rstate;	\/* Receive state *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:uint
rstate	post/cpu/mpc8xx/usb.c	/^	uint rstate;$/;"	m	struct:usb_param	typeref:typename:uint	file:
rstatus	net/nfs.h	/^			uint32_t rstatus;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780308	typeref:typename:uint32_t
rstc	arch/arm/dts/zynq-7000.dtsi	/^			rstc: rstc@200 {$/;"	l	label:amba.slcr
rstc	arch/arm/mach-bcm283x/include/mach/wdog.h	/^	u32 rstc;$/;"	m	struct:bcm2835_wdog_regs	typeref:typename:u32
rstcon	board/freescale/c29xpcie/cpld.h	/^	u8 rstcon;	\/* 0x10 - Reset control register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
rstcon	drivers/usb/gadget/dwc2_udc_otg_regs.h	/^	u32 rstcon;$/;"	m	struct:dwc2_usbotg_phy	typeref:typename:u32
rstcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	rstcr;		\/* Reset control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstcr;			\/* 0x000 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	rstcr;		\/* Reset control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstcr;		\/* Reset control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rstcr;		\/* 0xe00b0 - Reset control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
rstcrsp	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstcrsp;			\/* 0x004 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstctl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	rstctl;	\/* Reset Control Register *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0408	typeref:typename:u32
rstctl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	rstctl;	\/* Reset Control Register *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0408	typeref:typename:u32
rstctl	arch/arm/mach-tegra/lowlevel_init.S	/^rstctl:$/;"	l
rstctl	arch/powerpc/include/asm/immap_85xx.h	/^		u32	rstctl;	\/* Reset Control Register *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0608	typeref:typename:u32
rstctl	arch/powerpc/include/asm/immap_85xx.h	/^		u32	rstctl;	\/* Reset Control Register *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0908	typeref:typename:u32
rstctl1	arch/arm/cpu/arm926ejs/omap/reset.S	/^rstctl1:$/;"	l
rstctl1	arch/arm/mach-versatile/reset.S	/^rstctl1:$/;"	l
rstctrl	arch/arm/dts/keystone.dtsi	/^		rstctrl: reset-controller {$/;"	l
rstctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 rstctrl;		\/* 0x1250 *\/$/;"	m	struct:prm	typeref:typename:u32
rstgt	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u16	rstgt;		\/* Reset Gate *\/$/;"	m	struct:rdc_sema_regs	typeref:typename:u16
rstgt	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u16	rstgt;		\/* Reset Gate *\/$/;"	m	struct:rdc_sema_regs	typeref:typename:u16
rstoutn_mask	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 rstoutn_mask; \/* 0x20108 *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
rstoutn_mask	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 rstoutn_mask; \/* 0x60 *\/$/;"	m	struct:mvebu_system_registers	typeref:typename:u32
rstoutn_mask	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 rstoutn_mask; \/* 0x20108 *\/$/;"	m	struct:orion5x_cpu_registers	typeref:typename:u32
rstrip	cmd/ini.c	/^static char *rstrip(char *s)$/;"	f	typeref:typename:char *	file:
rstrqmr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	rstrqmr1;	\/* Reset request mask *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqmr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqmr1;			\/* 0x010 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqmr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	rstrqmr1;	\/* Reset request mask *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqmr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstrqmr1;	\/* Reset request mask *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqmr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqmr2;			\/* 0x014 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqpblsr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	rstrqpblsr;	\/* Reset request preboot loader status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqpblsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	rstrqpblsr;	\/* Reset request preboot loader status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqpblsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstrqpblsr;	\/* Reset request preboot loader status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqsr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	rstrqsr1;	\/* Reset request status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqsr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqsr1;			\/* 0x018 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqsr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	rstrqsr1;	\/* Reset request status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqsr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstrqsr1;	\/* Reset request status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqsr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqsr2;			\/* 0x01c *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqwdtmrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	rstrqwdtmrl;	\/* Reset request WDT mask *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqwdtmrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqwdtmrl;		\/* 0x020 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqwdtmrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	rstrqwdtmrl;	\/* Reset request WDT mask *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqwdtmrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstrqwdtmrl;	\/* Reset request WDT mask *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqwdtmru	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqwdtmru;		\/* 0x024 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqwdtsrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	rstrqwdtsrl;	\/* Reset request WDT status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqwdtsrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqwdtsrl;		\/* 0x030 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrqwdtsrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	rstrqwdtsrl;	\/* Reset request WDT status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqwdtsrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rstrqwdtsrl;	\/* Reset request WDT status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
rstrqwdtsru	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 rstrqwdtsru;		\/* 0x034 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
rstrscr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rstrscr;	\/* 0xe0094 - Reset request status and control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
rsttime_reg	arch/arm/include/asm/arch-omap4/clock.h	/^	u32 rsttime_reg;        \/* 0x0400 *\/$/;"	m	struct:omap4_scrm_regs	typeref:typename:u32
rsttiming	include/andestech/andes_pcu.h	/^	unsigned int	rsttiming;	\/* 0x90 - Reset Timing  *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
rsttlb	arch/powerpc/cpu/ppc4xx/start.S	/^rsttlb:$/;"	l
rstype	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rstype;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
rstype	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	rstype;		\/* 0xe4 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
rsv	drivers/net/lpc32xx_eth.c	/^	u32 rsv;		\/* Receive status vector register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rsv0	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv0;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
rsv0	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv0;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
rsv1	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv1[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv1	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv1[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv2	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv2;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
rsv2	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv2;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
rsv3	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv3[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv3	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv3[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv4	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv4;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
rsv4	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv4;$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
rsv5	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv5[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv5	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv5[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv6	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 rsv6[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsv6	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 rsv6[2];$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32[2]
rsvd	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 rsvd[28];$/;"	m	struct:lpuart_fsl	typeref:typename:u8[28]
rsvd	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 rsvd[28];$/;"	m	struct:lpuart_fsl	typeref:typename:u8[28]
rsvd	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd[0xe];$/;"	m	struct:aipstz_regs	typeref:typename:u32[0xe]
rsvd	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	rsvd[0xe];$/;"	m	struct:aipstz_regs	typeref:typename:u32[0xe]
rsvd	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 rsvd;	\/* Reserved *\/$/;"	m	struct:stm32_flash_bank_regs	typeref:typename:u32
rsvd	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	rsvd:1;$/;"	m	struct:clk_pll_info	typeref:typename:u32:1
rsvd	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd[94];$/;"	m	struct:ddrmr_regs	typeref:typename:u32[94]
rsvd	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 rsvd[28];$/;"	m	struct:lpuart_fsl	typeref:typename:u8[28]
rsvd	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd[13];$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg[13]
rsvd	arch/x86/include/asm/arch-baytrail/global_nvs.h	/^	u8	rsvd[254];$/;"	m	struct:acpi_global_nvs	typeref:typename:u8[254]
rsvd	arch/x86/include/asm/arch-quark/global_nvs.h	/^	u8	rsvd[255];$/;"	m	struct:acpi_global_nvs	typeref:typename:u8[255]
rsvd	arch/x86/include/asm/me_common.h	/^	u32 rsvd:16;$/;"	m	struct:mbp_header	typeref:typename:u32:16
rsvd	arch/x86/include/asm/me_common.h	/^	u32 rsvd:8;$/;"	m	struct:mbp_item_header	typeref:typename:u32:8
rsvd	drivers/i2c/fti2c010.h	/^	uint32_t rsvd[5];$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t[5]
rsvd	drivers/net/ftmac110.h	/^	uint32_t rsvd[19];$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t[19]
rsvd	drivers/spi/davinci_spi.c	/^	dv_reg	rsvd[3];$/;"	m	struct:davinci_spi_regs	typeref:typename:dv_reg[3]	file:
rsvd	drivers/spi/tegra114_spi.c	/^	u32 rsvd[56];	\/* 028-107 reserved *\/$/;"	m	struct:spi_regs	typeref:typename:u32[56]	file:
rsvd	drivers/spi/tegra20_sflash.c	/^	u32 rsvd[3];	\/* offsets 0x14 to 0x1F reserved *\/$/;"	m	struct:spi_regs	typeref:typename:u32[3]	file:
rsvd	drivers/spi/tegra20_slink.c	/^	u32 rsvd[56];	\/* 0x20 to 0xFF reserved *\/$/;"	m	struct:spi_regs	typeref:typename:u32[56]	file:
rsvd	drivers/spi/tegra210_qspi.c	/^	u32 rsvd[56];	\/* 028-107 reserved *\/$/;"	m	struct:qspi_regs	typeref:typename:u32[56]	file:
rsvd	drivers/usb/host/xhci.h	/^	__le32			rsvd[7];$/;"	m	struct:xhci_run_regs	typeref:typename:__le32[7]
rsvd	drivers/usb/host/xhci.h	/^	__le32	rsvd;$/;"	m	struct:xhci_erst_entry	typeref:typename:__le32
rsvd	drivers/usb/host/xhci.h	/^	volatile __le32	rsvd;$/;"	m	struct:xhci_intr_reg	typeref:typename:volatile __le32
rsvd	include/usb/fusbh200.h	/^	uint32_t rsvd[2];$/;"	m	struct:fusbh200_regs	typeref:typename:uint32_t[2]
rsvd0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd0[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd0[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd0[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd0[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank9_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd0[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd0	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	rsvd0;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
rsvd0	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 rsvd0[2];$/;"	m	struct:mdio_regs	typeref:typename:u32[2]
rsvd0	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 rsvd0[5];$/;"	m	struct:bcm2835_mbox_regs	typeref:typename:u32[5]
rsvd0	arch/arm/mach-davinci/include/mach/aintc_defs.h	/^	unsigned char	rsvd0[8];	\/* 0x28 *\/$/;"	m	struct:dv_aintc_regs	typeref:typename:unsigned char[8]
rsvd0	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned char	rsvd0[4];	\/* 0x00 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned char[4]
rsvd0	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd0[71];$/;"	m	struct:davinci_psc_regs	typeref:typename:dv_reg[71]
rsvd0	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned char	rsvd0[224];	\/* 0x04 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned char[224]
rsvd0	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd0[16];	\/* 0x004 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[16]
rsvd0	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd0[2];$/;"	m	struct:atac	typeref:typename:u8[2]
rsvd0	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd0;		\/* 0x000 *\/$/;"	m	struct:fecdma	typeref:typename:u32
rsvd0	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd0;		\/* 0x0B *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd0	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	rsvd0[128];$/;"	m	struct:exynos7420_clk_cmu_top0	typeref:typename:unsigned int[128]	file:
rsvd0	drivers/spi/fsl_qspi.h	/^	u32 rsvd0[1];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[1]
rsvd0	drivers/usb/host/xhci-keystone.c	/^	u32 rsvd0[3];$/;"	m	struct:kdwc3_irq_regs	typeref:typename:u32[3]	file:
rsvd1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int rsvd1;$/;"	m	struct:pad_signals	typeref:typename:int
rsvd1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int rsvd1;$/;"	m	struct:pad_signals	typeref:typename:int
rsvd1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd1[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd1[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd1[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd1[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank9_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 rsvd1;	\/* Reserved *\/$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
rsvd1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd1[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd1[6];$/;"	m	struct:mscm_ir	typeref:typename:u32[6]
rsvd1	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	rsvd1[2];$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t[2]
rsvd1	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 rsvd1[20];$/;"	m	struct:mdio_regs	typeref:typename:u32[20]
rsvd1	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned char	rsvd1[4];	\/* 0x18 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned char[4]
rsvd1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd1;$/;"	m	struct:davinci_psc_regs	typeref:typename:dv_reg
rsvd1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd1[52];$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg[52]
rsvd1	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd1[56];$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg[56]
rsvd1	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned char	rsvd1[24];	\/* 0xe8 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned char[24]
rsvd1	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd1[4];	\/* 0x014 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[4]
rsvd1	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd1[4];$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32[4]
rsvd1	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd1[3];$/;"	m	struct:atac	typeref:typename:u8[3]
rsvd1	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd1[6];		\/* 0x00C - 0x023 *\/$/;"	m	struct:fecdma	typeref:typename:u32[6]
rsvd1	arch/m68k/include/asm/immap_520x.h	/^	u32 rsvd1[7];$/;"	m	struct:scm1	typeref:typename:u32[7]
rsvd1	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd1;$/;"	m	struct:pll_ctrl	typeref:typename:u8
rsvd1	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd1[19];		\/* 0x00 - 0x12 *\/$/;"	m	struct:scm2	typeref:typename:u8[19]
rsvd1	arch/m68k/include/asm/immap_5227x.h	/^	u32 rsvd1[3];$/;"	m	struct:rtcex	typeref:typename:u32[3]
rsvd1	arch/m68k/include/asm/immap_5227x.h	/^	u32 rsvd1[7];$/;"	m	struct:scm1	typeref:typename:u32[7]
rsvd1	arch/m68k/include/asm/immap_5227x.h	/^	u8 rsvd1;		\/* 0x04 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd1	arch/m68k/include/asm/immap_5301x.h	/^	u32 rsvd1[3];$/;"	m	struct:rtcex	typeref:typename:u32[3]
rsvd1	arch/m68k/include/asm/immap_5301x.h	/^	u32 rsvd1[7];$/;"	m	struct:scm1	typeref:typename:u32[7]
rsvd1	arch/m68k/include/asm/immap_5301x.h	/^	u8 rsvd1[19];		\/* 0x00 - 0x12 *\/$/;"	m	struct:scm2	typeref:typename:u8[19]
rsvd1	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd1;		\/* 0x17 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd1	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd1[19];		\/* 0x00 - 0x12 *\/$/;"	m	struct:scm	typeref:typename:u8[19]
rsvd1	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd1;		\/* 0x38 *\/$/;"	m	struct:pci	typeref:typename:u32
rsvd1	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd1[3];$/;"	m	struct:rtcex	typeref:typename:u32[3]
rsvd1	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd1[7];$/;"	m	struct:scm1	typeref:typename:u32[7]
rsvd1	arch/m68k/include/asm/immap_5445x.h	/^	u8 rsvd1[19];		\/* 0x00 - 0x12 *\/$/;"	m	struct:scm2	typeref:typename:u8[19]
rsvd1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd1;		\/* 0x38 *\/$/;"	m	struct:pci	typeref:typename:u32
rsvd1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd1[2];		\/* 0x08 - 0x1F *\/$/;"	m	struct:siu	typeref:typename:u32[2]
rsvd1	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd1;		\/*0x03 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd1	arch/x86/include/asm/arch-quark/quark.h	/^	u32	rsvd1[3150];$/;"	m	struct:quark_rcba	typeref:typename:u32[3150]
rsvd1	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd1[2];$/;"	m	struct:tnc_rcba	typeref:typename:u32[2]
rsvd1	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	rsvd1[261];$/;"	m	struct:exynos7420_clk_cmu_top0	typeref:typename:unsigned int[261]	file:
rsvd1	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	rsvd1[68];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[68]	file:
rsvd1	drivers/spi/fsl_qspi.h	/^	u32 rsvd1[2];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[2]
rsvd1	drivers/usb/host/xhci-keystone.c	/^	u32 rsvd1[1];$/;"	m	struct:kdwc3_irq_regs	typeref:typename:u32[1]	file:
rsvd1	include/andestech/andes_pcu.h	/^	unsigned int	rsvd1[2];	\/* 0x08-0x0C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[2]
rsvd1	include/fsl_sec.h	/^	u32 rsvd1;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd1	include/fsl_sec.h	/^	u32 rsvd1[40];$/;"	m	struct:rng4tst	typeref:typename:u32[40]
rsvd1	include/lynxkdi.h	/^	uint8_t		rsvd1[2];	\/* Reserved			*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint8_t[2]
rsvd1	include/usb/fotg210.h	/^	uint32_t rsvd1[3];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[3]
rsvd1	tools/kwbimage.h	/^	uint32_t rsvd1;			\/*8-11  *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint32_t
rsvd10	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd10[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd10	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd10[4];	\/* 0x124 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[4]
rsvd10	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd10[3];$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32[3]
rsvd10	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd10;		\/*0x33 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd10	include/fsl_sec.h	/^	u32 rsvd10;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd11	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd11[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd11	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd11[212];	\/* 0x12C *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[212]
rsvd11	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd11;		\/*0x3B *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd11	include/fsl_sec.h	/^	u32 rsvd11;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd12	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd12[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd12	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd12[248];	\/* 0x208 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[248]
rsvd12	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd12;		\/*0x3F *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd13	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd13[0xc3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[0xc3]
rsvd13	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd13[536];	\/* 0x308 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[536]
rsvd13	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd13[2];$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32[2]
rsvd13	arch/m68k/include/asm/immap_547x_8x.h	/^	u16 rsvd13;		\/*0x46 *\/$/;"	m	struct:gpio	typeref:typename:u16
rsvd14	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd14[728];	\/* 0x528 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[728]
rsvd14	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd14;		\/*0x53 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd15	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd15[304];	\/* 0x8D0 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[304]
rsvd15	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd15;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
rsvd2	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int rsvd2;$/;"	m	struct:pad_signals	typeref:typename:int
rsvd2	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int rsvd2;$/;"	m	struct:pad_signals	typeref:typename:int
rsvd2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd2[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd2[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd2[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd2[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd2[7];$/;"	m	struct:fuse_bank9_regs	typeref:typename:u32[7]
rsvd2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 rsvd2[8];	\/* Reserved *\/$/;"	m	struct:stm32_flash_regs	typeref:typename:u32[8]
rsvd2	arch/arm/include/asm/arch-tegra/clock.h	/^	u32	rsvd2:6;$/;"	m	struct:clk_pll_info	typeref:typename:u32:6
rsvd2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd2[0x17];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[0x17]
rsvd2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd2[23];$/;"	m	struct:mscm_ir	typeref:typename:u32[23]
rsvd2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd2[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd2	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	rsvd2[15];$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t[15]
rsvd2	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned char	rsvd2[156];	\/* 0x24 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned char[156]
rsvd2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd2[437];$/;"	m	struct:davinci_psc_regs	typeref:typename:dv_reg[437]
rsvd2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd2[6];$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg[6]
rsvd2	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg  rsvd2;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
rsvd2	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned char	rsvd2[4];	\/* 0x104 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned char[4]
rsvd2	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd2[36];	\/* 0x01C *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[36]
rsvd2	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd2[3];$/;"	m	struct:atac	typeref:typename:u8[3]
rsvd2	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd2[6];		\/* 0x028 - 0x03F *\/$/;"	m	struct:fecdma	typeref:typename:u32[6]
rsvd2	arch/m68k/include/asm/immap_520x.h	/^	u16 rsvd2;		\/* 0x14 - 0x15 *\/$/;"	m	struct:scm2	typeref:typename:u16
rsvd2	arch/m68k/include/asm/immap_520x.h	/^	u32 rsvd2[4];$/;"	m	struct:scm1	typeref:typename:u32[4]
rsvd2	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd2;$/;"	m	struct:pll_ctrl	typeref:typename:u8
rsvd2	arch/m68k/include/asm/immap_5227x.h	/^	u32 rsvd2[4];$/;"	m	struct:scm1	typeref:typename:u32[4]
rsvd2	arch/m68k/include/asm/immap_5227x.h	/^	u8 rsvd2;		\/* 0x10 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd2	arch/m68k/include/asm/immap_5301x.h	/^	u16 rsvd2;		\/* 0x14 - 0x15 *\/$/;"	m	struct:scm2	typeref:typename:u16
rsvd2	arch/m68k/include/asm/immap_5301x.h	/^	u32 rsvd2[4];$/;"	m	struct:scm1	typeref:typename:u32[4]
rsvd2	arch/m68k/include/asm/immap_5441x.h	/^	u16 rsvd2;		\/* 0x14 - 0x15 *\/$/;"	m	struct:scm	typeref:typename:u16
rsvd2	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd2;		\/* 0x23 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd2	arch/m68k/include/asm/immap_5445x.h	/^	u16 rsvd2;		\/* 0x14 - 0x15 *\/$/;"	m	struct:scm2	typeref:typename:u16
rsvd2	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd2[4];$/;"	m	struct:scm1	typeref:typename:u32[4]
rsvd2	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd2[8];		\/* 0x40 - 0x5f *\/$/;"	m	struct:pci	typeref:typename:u32[8]
rsvd2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd2[3];		\/* 0x14 - 0x1F *\/$/;"	m	struct:siu	typeref:typename:u32[3]
rsvd2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd2[8];		\/* 0x40 - 0x5f *\/$/;"	m	struct:pci	typeref:typename:u32[8]
rsvd2	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd2;		\/*0x0B *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd2	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd2;$/;"	m	struct:tnc_rcba	typeref:typename:u32
rsvd2	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	rsvd2[2];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[2]	file:
rsvd2	drivers/spi/fsl_qspi.h	/^	u32 rsvd2[49];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[49]
rsvd2	drivers/spi/tegra114_spi.c	/^	u32 rsvd2[31];	\/* 10c-187 reserved *\/$/;"	m	struct:spi_regs	typeref:typename:u32[31]	file:
rsvd2	drivers/spi/tegra20_slink.c	/^	u32 rsvd2[31];	\/* 0x104 to 0x17F reserved *\/$/;"	m	struct:spi_regs	typeref:typename:u32[31]	file:
rsvd2	drivers/spi/tegra210_qspi.c	/^	u32 rsvd2[31];	\/* 10c-187 reserved *\/$/;"	m	struct:qspi_regs	typeref:typename:u32[31]	file:
rsvd2	drivers/usb/host/xhci-keystone.c	/^	u32 rsvd2[1];$/;"	m	struct:kdwc3_irq_regs	typeref:typename:u32[1]	file:
rsvd2	drivers/usb/host/xhci.h	/^	__le32	rsvd2[6];$/;"	m	struct:xhci_input_control_ctx	typeref:typename:__le32[6]
rsvd2	include/andestech/andes_pcu.h	/^	unsigned int	rsvd2;		\/* 0x1C *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
rsvd2	include/fsl_sec.h	/^	u32 rsvd2;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd2	include/fsl_sec.h	/^	u32 rsvd2[15];$/;"	m	struct:rng4tst	typeref:typename:u32[15]
rsvd2	include/lynxkdi.h	/^	uint32_t	rsvd2;		\/* Reserved			*\/$/;"	m	struct:lynxos_bootparms_t	typeref:typename:uint32_t
rsvd2	include/usb/fotg210.h	/^	uint32_t rsvd2[15];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[15]
rsvd2	tools/kwbimage.h	/^	uint16_t rsvd2;			\/*28-29 *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint16_t
rsvd3	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int rsvd3;$/;"	m	struct:pad_signals	typeref:typename:int
rsvd3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd3[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd3[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd3[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd3[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank3_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 rsvd3;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
rsvd3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 rsvd3[848];$/;"	m	struct:mscm_ir	typeref:typename:u16[848]
rsvd3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd3[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd3[7];$/;"	m	struct:ocotp_regs	typeref:typename:u32[7]
rsvd3	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned char	rsvd3[20];	\/* 0xD0 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned char[20]
rsvd3	arch/arm/mach-davinci/include/mach/hardware.h	/^			dv_reg	rsvd3[112];$/;"	m	struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330208	typeref:typename:dv_reg[112]
rsvd3	arch/arm/mach-davinci/include/mach/hardware.h	/^			dv_reg	rsvd3[96];$/;"	m	struct:davinci_psc_regs::__anonbc901033010a::__anonbc9010330308	typeref:typename:dv_reg[96]
rsvd3	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd3[2];$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg[2]
rsvd3	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd3[8];	\/* 0x048 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[8]
rsvd3	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd3[3];$/;"	m	struct:atac	typeref:typename:u8[3]
rsvd3	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd3[7];		\/* 0x048 - 0x063 *\/$/;"	m	struct:fecdma	typeref:typename:u32[7]
rsvd3	arch/m68k/include/asm/immap_520x.h	/^	u32 rsvd3[3];$/;"	m	struct:scm1	typeref:typename:u32[3]
rsvd3	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd3;$/;"	m	struct:pll_ctrl	typeref:typename:u8
rsvd3	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd3[3];		\/* 0x18 - 0x1A *\/$/;"	m	struct:scm2	typeref:typename:u8[3]
rsvd3	arch/m68k/include/asm/immap_5227x.h	/^	u32 rsvd3;$/;"	m	struct:scm1	typeref:typename:u32
rsvd3	arch/m68k/include/asm/immap_5227x.h	/^	u8 rsvd3;		\/* 0x1C *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd3	arch/m68k/include/asm/immap_5301x.h	/^	u8 rsvd3[3];		\/* 0x18 - 0x1A *\/$/;"	m	struct:scm2	typeref:typename:u8[3]
rsvd3	arch/m68k/include/asm/immap_5441x.h	/^	u32 rsvd3[32];		\/* 0xF4-0x1A8 *\/$/;"	m	struct:sdramc	typeref:typename:u32[32]
rsvd3	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd3;		\/* 0x2F *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd3	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd3[3];		\/* 0x18 - 0x1A *\/$/;"	m	struct:scm	typeref:typename:u8[3]
rsvd3	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd3;		\/* 0x7c *\/$/;"	m	struct:pci	typeref:typename:u32
rsvd3	arch/m68k/include/asm/immap_5445x.h	/^	u8 rsvd3[3];		\/* 0x18 - 0x1A *\/$/;"	m	struct:scm2	typeref:typename:u8[3]
rsvd3	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd3;		\/* 0x7c *\/$/;"	m	struct:pci	typeref:typename:u32
rsvd3	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd3[2];		\/* 0x30 - 0x37 *\/$/;"	m	struct:siu	typeref:typename:u32[2]
rsvd3	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd3;		\/*0x0F *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd3	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd3[3129];$/;"	m	struct:tnc_rcba	typeref:typename:u32[3129]
rsvd3	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	rsvd3[54];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[54]	file:
rsvd3	drivers/spi/fsl_qspi.h	/^	u32 rsvd3[1];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[1]
rsvd3	include/andestech/andes_pcu.h	/^	unsigned int	rsvd3;		\/* 0x2C *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
rsvd3	include/fsl_sec.h	/^	u32 rsvd3;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd3	include/usb/fotg210.h	/^	uint32_t rsvd3[13];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[13]
rsvd3	tools/kwbimage.h	/^	uint8_t  rsvd3;			\/*25    *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint8_t
rsvd4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd4[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd4[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd4[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd4[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd4	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd4[7];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[7]
rsvd4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd4[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd4[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd4[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd4	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned char	rsvd4[4];	\/* 0xEC *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned char[4]
rsvd4	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd4[3];$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg[3]
rsvd4	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd4[8];	\/* 0x058 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[8]
rsvd4	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd4[3];$/;"	m	struct:atac	typeref:typename:u8[3]
rsvd4	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd4[7];		\/* 0x068 - 0x083 *\/$/;"	m	struct:fecdma	typeref:typename:u32[7]
rsvd4	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd4;$/;"	m	struct:pll_ctrl	typeref:typename:u8
rsvd4	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd4[3];		\/* 0x1C - 0x1E *\/$/;"	m	struct:scm2	typeref:typename:u8[3]
rsvd4	arch/m68k/include/asm/immap_5227x.h	/^	u8 rsvd4;		\/* 0x28 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd4	arch/m68k/include/asm/immap_5301x.h	/^	u8 rsvd4[3];		\/* 0x1C - 0x1E *\/$/;"	m	struct:scm2	typeref:typename:u8[3]
rsvd4	arch/m68k/include/asm/immap_5441x.h	/^	u16 rsvd4;		\/* 0x46 *\/$/;"	m	struct:gpio	typeref:typename:u16
rsvd4	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd4[3];		\/* 0x1C - 0x1E *\/$/;"	m	struct:scm	typeref:typename:u8[3]
rsvd4	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd4[19];		\/* 0xac - 0xf7 *\/$/;"	m	struct:pci	typeref:typename:u32[19]
rsvd4	arch/m68k/include/asm/immap_5445x.h	/^	u8 rsvd4[3];		\/* 0x1C - 0x1E *\/$/;"	m	struct:scm2	typeref:typename:u8[3]
rsvd4	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd4[19];		\/* 0xac - 0xf7 *\/$/;"	m	struct:pci	typeref:typename:u32[19]
rsvd4	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd4[2];		\/* 0x3C - 0x43 *\/$/;"	m	struct:siu	typeref:typename:u32[2]
rsvd4	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd4;		\/*0x13 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd4	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd4[3];$/;"	m	struct:tnc_rcba	typeref:typename:u32[3]
rsvd4	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned int	rsvd4[250];$/;"	m	struct:exynos7420_clk_cmu_topc	typeref:typename:unsigned int[250]	file:
rsvd4	drivers/spi/fsl_qspi.h	/^	u32 rsvd4[15];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[15]
rsvd4	include/andestech/andes_pcu.h	/^	unsigned int	rsvd4;		\/* 0x3C *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
rsvd4	include/fsl_sec.h	/^	u32 rsvd4;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd4	include/usb/fotg210.h	/^	uint32_t rsvd4[14];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[14]
rsvd5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd5[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd5[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd5[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd5[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd5[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd5[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd5[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd5[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd5	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd5[3];$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg[3]
rsvd5	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned char	rsvd5[8];	\/* 0x130 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned char[8]
rsvd5	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd5[4];	\/* 0x064 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[4]
rsvd5	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd5[2];$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32[2]
rsvd5	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd5[3];$/;"	m	struct:atac	typeref:typename:u8[3]
rsvd5	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd5[14];		\/* 0x08C - 0x0C3 *\/$/;"	m	struct:fecdma	typeref:typename:u32[14]
rsvd5	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd5[79];		\/* 0x20 - 0x6F *\/$/;"	m	struct:scm2	typeref:typename:u8[79]
rsvd5	arch/m68k/include/asm/immap_5301x.h	/^	u32 rsvd5;		\/* 0x20 - 0x23 *\/$/;"	m	struct:scm2	typeref:typename:u32
rsvd5	arch/m68k/include/asm/immap_5441x.h	/^	u32 rsvd5;		\/* 0x20 - 0x23 *\/$/;"	m	struct:scm	typeref:typename:u32
rsvd5	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd5;		\/* 0x5D *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd5	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd5;		\/* 0x20 - 0x23 *\/$/;"	m	struct:scm2	typeref:typename:u32
rsvd5	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 rsvd5[2];		\/* 0x48 - 0x4F *\/$/;"	m	struct:siu	typeref:typename:u32[2]
rsvd5	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd5;		\/*0x1B *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd5	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd5;$/;"	m	struct:tnc_rcba	typeref:typename:u32
rsvd5	drivers/spi/fsl_qspi.h	/^	u32 rsvd5[1];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[1]
rsvd5	include/andestech/andes_pcu.h	/^	unsigned int	rsvd5[13];	\/* 0x4C-0x7C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[13]
rsvd5	include/fsl_sec.h	/^	u32 rsvd5;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd5	include/usb/fotg210.h	/^	uint32_t rsvd5[2];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[2]
rsvd6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd6[3];$/;"	m	struct:anatop_regs	typeref:typename:u32[3]
rsvd6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd6[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd6[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd6[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd6	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rsvd6[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd6	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd6[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd6	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd6[0xdb];$/;"	m	struct:ocotp_regs	typeref:typename:u32[0xdb]
rsvd6	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd6[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd6	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rsvd6[32];$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg[32]
rsvd6	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned char	rsvd6[12];	\/* 0x154 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned char[12]
rsvd6	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd6[4];	\/* 0x06C *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[4]
rsvd6	arch/m68k/include/asm/coldfire/ata.h	/^	u8 rsvd6[106];$/;"	m	struct:atac	typeref:typename:u8[106]
rsvd6	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd6[7];		\/* 0x0C8 - 0x0E3 *\/$/;"	m	struct:fecdma	typeref:typename:u32[7]
rsvd6	arch/m68k/include/asm/immap_5227x.h	/^	u16 rsvd6;		\/* 0x3A - 0x3B *\/$/;"	m	struct:gpio	typeref:typename:u16
rsvd6	arch/m68k/include/asm/immap_5301x.h	/^	u8 rsvd6[74];		\/* 0x25 - 0x6F *\/$/;"	m	struct:scm2	typeref:typename:u8[74]
rsvd6	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd6;		\/* 0x5F *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd6	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd6[72];		\/* 0x28 - 0x6F *\/$/;"	m	struct:scm	typeref:typename:u8[72]
rsvd6	arch/m68k/include/asm/immap_5445x.h	/^	u8 rsvd6[74];		\/* 0x25 - 0x6F *\/$/;"	m	struct:scm2	typeref:typename:u8[74]
rsvd6	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd6;		\/*0x1F *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd6	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd6;$/;"	m	struct:tnc_rcba	typeref:typename:u32
rsvd6	drivers/spi/fsl_qspi.h	/^	u32 rsvd6[4];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[4]
rsvd6	include/andestech/andes_pcu.h	/^	unsigned int	rsvd6[2];	\/* 0x98-0x9C: Reserved *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int[2]
rsvd6	include/fsl_sec.h	/^	u32 rsvd6;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd6	include/usb/fotg210.h	/^	uint32_t rsvd6[2];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[2]
rsvd7	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd7[3];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[3]
rsvd7	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	rsvd7[3];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[3]
rsvd7	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     rsvd7[0xdb];$/;"	m	struct:ocotp_regs	typeref:typename:u32[0xdb]
rsvd7	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd7[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd7	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 rsvd7[3];$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32[3]
rsvd7	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd7[4];	\/* 0x074 *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[4]
rsvd7	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd7;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
rsvd7	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd7[10];		\/* 0x0F0 - 0x117 *\/$/;"	m	struct:fecdma	typeref:typename:u32[10]
rsvd7	arch/m68k/include/asm/immap_520x.h	/^	u8 rsvd7;		\/* 0x74 *\/$/;"	m	struct:scm2	typeref:typename:u8
rsvd7	arch/m68k/include/asm/immap_5227x.h	/^	u16 rsvd7;		\/* 0x46 - 0x47 *\/$/;"	m	struct:gpio	typeref:typename:u16
rsvd7	arch/m68k/include/asm/immap_5301x.h	/^	u8 rsvd7;		\/* 0x74 *\/$/;"	m	struct:scm2	typeref:typename:u8
rsvd7	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd7;		\/* 0x74 *\/$/;"	m	struct:scm	typeref:typename:u8
rsvd7	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd7[3];		\/* 0x61-0x63 *\/$/;"	m	struct:gpio	typeref:typename:u8[3]
rsvd7	arch/m68k/include/asm/immap_5445x.h	/^	u8 rsvd7;		\/* 0x74 *\/$/;"	m	struct:scm2	typeref:typename:u8
rsvd7	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd7;		\/*0x23 *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd7	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u32	rsvd7[3];$/;"	m	struct:tnc_rcba	typeref:typename:u32[3]
rsvd7	drivers/spi/fsl_qspi.h	/^	u32 rsvd7[28];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[28]
rsvd7	include/fsl_sec.h	/^	u32 rsvd7;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd7	include/usb/fotg210.h	/^	uint32_t rsvd7[1];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[1]
rsvd8	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd8[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd8	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd8[144];	\/* 0x07C *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[144]
rsvd8	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 rsvd8[2];$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32[2]
rsvd8	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd8[7];		\/* 0x128 - 0x143 *\/$/;"	m	struct:fecdma	typeref:typename:u32[7]
rsvd8	arch/m68k/include/asm/immap_520x.h	/^	u32 rsvd8;		\/* 0x78 - 0x7B *\/$/;"	m	struct:scm2	typeref:typename:u32
rsvd8	arch/m68k/include/asm/immap_5301x.h	/^	u32 rsvd8;		\/* 0x78 - 0x7B *\/$/;"	m	struct:scm2	typeref:typename:u32
rsvd8	arch/m68k/include/asm/immap_5441x.h	/^	u32 rsvd8;		\/* 0x78 - 0x7B *\/$/;"	m	struct:scm	typeref:typename:u32
rsvd8	arch/m68k/include/asm/immap_5441x.h	/^	u8 rsvd8[3];		\/* 0x71-0x73 *\/$/;"	m	struct:gpio	typeref:typename:u8[3]
rsvd8	arch/m68k/include/asm/immap_5445x.h	/^	u32 rsvd8;		\/* 0x78 - 0x7B *\/$/;"	m	struct:scm2	typeref:typename:u32
rsvd8	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd8;		\/*0x2B *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd8	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	rsvd8[3];$/;"	m	struct:tnc_rcba	typeref:typename:u16[3]
rsvd8	drivers/spi/fsl_qspi.h	/^	u32 rsvd8[32];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[32]
rsvd8	include/fsl_sec.h	/^	u32 rsvd8;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd8	include/usb/fotg210.h	/^	uint32_t rsvd8[1];$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t[1]
rsvd9	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rsvd9[3];$/;"	m	struct:ocotp_regs	typeref:typename:u32[3]
rsvd9	arch/arm/mach-davinci/include/mach/psc_defs.h	/^	unsigned char	rsvd9[20];	\/* 0x10C *\/$/;"	m	struct:dv_psc_regs	typeref:typename:unsigned char[20]
rsvd9	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 rsvd9[14];		\/* 0x148 - 0x17F *\/$/;"	m	struct:fecdma	typeref:typename:u32[14]
rsvd9	arch/m68k/include/asm/immap_547x_8x.h	/^	u8 rsvd9;		\/*0x2F *\/$/;"	m	struct:gpio	typeref:typename:u8
rsvd9	arch/x86/include/asm/arch-queensbay/tnc.h	/^	u16	rsvd9[7];$/;"	m	struct:tnc_rcba	typeref:typename:u16[7]
rsvd9	drivers/spi/fsl_qspi.h	/^	u32 rsvd9[2];$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32[2]
rsvd9	include/fsl_sec.h	/^	u32 rsvd9;$/;"	m	struct:jr_regs	typeref:typename:u32
rsvd_4c2	arch/arm/include/asm/arch-tegra/dc.h	/^	u32 rsvd_4c2[34];		\/* 4c2 - 4e3 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:u32[34]
rsvd_80c	arch/arm/include/asm/arch-tegra/dc.h	/^	uint rsvd_80c;$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
rsvd_pebs	drivers/mtd/ubi/ubi.h	/^	int rsvd_pebs;$/;"	m	struct:ubi_device	typeref:typename:int
rsvd_pos	arch/arm/include/asm/setup.h	/^	u8		rsvd_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
rsvd_pos	arch/nds32/include/asm/setup.h	/^	u8		rsvd_pos;$/;"	m	struct:tag_videolfb	typeref:typename:u8
rsvd_pos	include/linux/screen_info.h	/^	__u8  rsvd_pos;		\/* 0x2d *\/$/;"	m	struct:screen_info	typeref:typename:__u8
rsvd_size	arch/arm/include/asm/setup.h	/^	u8		rsvd_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
rsvd_size	arch/nds32/include/asm/setup.h	/^	u8		rsvd_size;$/;"	m	struct:tag_videolfb	typeref:typename:u8
rsvd_size	include/linux/screen_info.h	/^	__u8  rsvd_size;	\/* 0x2c *\/$/;"	m	struct:screen_info	typeref:typename:__u8
rsvdbits	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint8_t rsvdbits:3;$/;"	m	struct:pch_azalia_config	typeref:typename:uint8_t:3
rsved	include/faraday/ftpci100.h	/^	unsigned int rsved[8];		\/* 0x08-0x24 - Reserved *\/$/;"	m	struct:ftpci100_ahbc	typeref:typename:unsigned int[8]
rsved	include/faraday/ftsdmc021.h	/^	unsigned int	rsved[25];	\/* 0x3c-0x9c - Reserved		*\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int[25]
rsved	include/synopsys/dwcddr21mctl.h	/^	unsigned int	rsved[82];	\/* Reserved *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int[82]
rt_buf	arch/x86/include/asm/fsp/fsp_api.h	/^	void			*rt_buf;$/;"	m	struct:fsp_init_params	typeref:typename:void *
rtag	drivers/net/xilinx_ll_temac.h	/^	u32 rtag;	\/* Receive VLAN Tag *\/$/;"	m	struct:temac_reg	typeref:typename:u32
rtar	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	rtar;$/;"	m	struct:at91_st	typeref:typename:u32
rtc	arch/arm/dts/am33xx.dtsi	/^		rtc: rtc@44e3e000 {$/;"	l
rtc	arch/arm/dts/am4372.dtsi	/^		rtc: rtc@44e3e000 {$/;"	l
rtc	arch/arm/dts/dra7.dtsi	/^		rtc: rtc@48838000 {$/;"	l
rtc	arch/arm/dts/socfpga_cyclone5_sockit.dts	/^	rtc: rtc@68 {$/;"	l
rtc	arch/arm/dts/socfpga_cyclone5_socrates.dts	/^	rtc: rtc@68 {$/;"	l
rtc	arch/arm/dts/socfpga_cyclone5_vining_fpga.dts	/^	rtc: rtc@68 {$/;"	l
rtc	arch/arm/dts/sun4i-a10.dtsi	/^		rtc: rtc@01c20d00 {$/;"	l
rtc	arch/arm/dts/sun50i-a64.dtsi	/^		rtc: rtc@1f00000 {$/;"	l
rtc	arch/arm/dts/sun6i-a31.dtsi	/^		rtc: rtc@01f00000 {$/;"	l
rtc	arch/arm/dts/sun7i-a20.dtsi	/^		rtc: rtc@01c20d00 {$/;"	l
rtc	arch/arm/dts/sun8i-a23-a33.dtsi	/^		rtc: rtc@01f00000 {$/;"	l
rtc	arch/arm/dts/sun8i-h3.dtsi	/^		rtc: rtc@01f00000 {$/;"	l
rtc	arch/arm/dts/zynqmp.dtsi	/^		rtc: rtc@ffa60000 {$/;"	l
rtc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 rtc;	\/*0x028*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
rtc	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_rtc rtc;$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_rtc
rtc	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_rtc rtc;$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_rtc
rtc	arch/powerpc/include/asm/immap_512x.h	/^	rtclk512x_t		rtc;		\/* Real Time Clock Module *\/$/;"	m	struct:immap	typeref:typename:rtclk512x_t
rtc	arch/powerpc/include/asm/immap_83xx.h	/^	rtclk83xx_t		rtc;		\/* Real Time Clock Module Registers *\/$/;"	m	struct:immap	typeref:typename:rtclk83xx_t
rtc	drivers/rtc/ftrtc010.c	/^static struct ftrtc010 *rtc = (struct ftrtc010 *)CONFIG_FTRTC010_BASE;$/;"	v	typeref:struct:ftrtc010 *	file:
rtc32k_enable	arch/arm/cpu/armv7/am33xx/board.c	/^static void rtc32k_enable(void)$/;"	f	typeref:typename:void	file:
rtc5200	drivers/rtc/mpc5xxx.c	/^typedef struct rtc5200 {$/;"	s	file:
rtc_0	arch/sandbox/dts/sandbox.dts	/^		rtc_0: rtc@43 {$/;"	l
rtc_0	arch/sandbox/dts/test.dts	/^		rtc_0: rtc@43 {$/;"	l
rtc_1	arch/sandbox/dts/test.dts	/^		rtc_1: rtc@61 {$/;"	l
rtc_calc_weekday	drivers/rtc/date.c	/^int rtc_calc_weekday(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_clko_sel	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rtc_clko_sel;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
rtc_clko_sel	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rtc_clko_sel;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
rtc_clko_sel	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	rtc_clko_sel;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
rtc_ctrl	arch/m68k/include/asm/rtc.h	/^typedef struct rtc_ctrl {$/;"	s
rtc_debug	drivers/rtc/rs5c372.c	/^#define rtc_debug /;"	d	file:
rtc_debug	drivers/rtc/rs5c372.c	/^static unsigned int rtc_debug = DEBUG;$/;"	v	typeref:typename:unsigned int	file:
rtc_dump	drivers/rtc/m41t60.c	/^#define rtc_dump(/;"	d	file:
rtc_dump	drivers/rtc/m41t60.c	/^static void rtc_dump(char const *const label)$/;"	f	typeref:typename:void	file:
rtc_enable_32khz_output	drivers/rtc/ds3231.c	/^void rtc_enable_32khz_output(void)$/;"	f	typeref:typename:void
rtc_get	drivers/rtc/at91sam9_rtt.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/bfin_rtc.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/davinci.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds1302.c	/^rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds1306.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds1307.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds1337.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds1374.c	/^int rtc_get (struct rtc_time *tm){$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds1556.c	/^int rtc_get( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds164x.c	/^int rtc_get( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds174x.c	/^int rtc_get( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ds3231.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/ftrtc010.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/imxdi.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/isl1208.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/m41t11.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/m41t60.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/m41t62.c	/^int rtc_get(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/m41t94.c	/^int rtc_get(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/m48t35ax.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/max6900.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mc13xxx-rtc.c	/^int rtc_get(struct rtc_time *rtc)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mc146818.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mcfrtc.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mk48t59.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mpc5xxx.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mpc8xx.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mvrtc.c	/^int rtc_get(struct rtc_time *t)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mx27rtc.c	/^int rtc_get(struct rtc_time *time)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/mxsrtc.c	/^int rtc_get(struct rtc_time *time)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/pcf8563.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/pl031.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/pt7c4338.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/rs5c372.c	/^rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/rtc4543.c	/^int rtc_get(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/rv3029.c	/^int rtc_get( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/rx8025.c	/^int rtc_get (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/s3c24x0_rtc.c	/^int rtc_get(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_get	drivers/rtc/x1205.c	/^int rtc_get(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_get_ops	include/rtc.h	/^#define rtc_get_ops(/;"	d
rtc_go_high	drivers/rtc/ds1302.c	/^rtc_go_high(unsigned int mask)$/;"	f	typeref:typename:void	file:
rtc_go_input	drivers/rtc/ds1302.c	/^rtc_go_input(unsigned int mask)$/;"	f	typeref:typename:void	file:
rtc_go_low	drivers/rtc/ds1302.c	/^rtc_go_low(unsigned int mask)$/;"	f	typeref:typename:void	file:
rtc_go_output	drivers/rtc/ds1302.c	/^rtc_go_output(unsigned int mask)$/;"	f	typeref:typename:void	file:
rtc_init	drivers/rtc/bfin_rtc.c	/^void rtc_init(void)$/;"	f	typeref:typename:void
rtc_init	drivers/rtc/ds1302.c	/^rtc_init(void)$/;"	f	typeref:typename:void
rtc_init	drivers/rtc/mc146818.c	/^void rtc_init(void)$/;"	f	typeref:typename:void
rtc_init	drivers/rtc/pl031.c	/^void rtc_init(void)$/;"	f	typeref:typename:void
rtc_int	arch/arm/dts/rk3288-evb.dtsi	/^		rtc_int: rtc-int {$/;"	l
rtc_int	arch/arm/dts/rk3288-firefly.dtsi	/^		rtc_int: rtc-int {$/;"	l
rtc_mc146818_get	drivers/rtc/mc146818.c	/^static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time)$/;"	f	typeref:typename:int	file:
rtc_mc146818_ids	drivers/rtc/mc146818.c	/^static const struct udevice_id rtc_mc146818_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rtc_mc146818_ops	drivers/rtc/mc146818.c	/^static const struct rtc_ops rtc_mc146818_ops = {$/;"	v	typeref:typename:const struct rtc_ops	file:
rtc_mc146818_probe	drivers/rtc/mc146818.c	/^static int rtc_mc146818_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rtc_mc146818_read8	drivers/rtc/mc146818.c	/^static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg)$/;"	f	typeref:typename:int	file:
rtc_mc146818_reset	drivers/rtc/mc146818.c	/^static int rtc_mc146818_reset(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rtc_mc146818_set	drivers/rtc/mc146818.c	/^static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time)$/;"	f	typeref:typename:int	file:
rtc_mc146818_write8	drivers/rtc/mc146818.c	/^static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val)$/;"	f	typeref:typename:int	file:
rtc_mktime	drivers/rtc/date.c	/^unsigned long rtc_mktime(const struct rtc_time *tm)$/;"	f	typeref:typename:unsigned long
rtc_ops	include/rtc.h	/^struct rtc_ops {$/;"	s
rtc_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux rtc_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
rtc_porz	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int rtc_porz;$/;"	m	struct:pad_signals	typeref:typename:int
rtc_porz	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int rtc_porz;$/;"	m	struct:pad_signals	typeref:typename:int
rtc_post_restore	post/drivers/rtc.c	/^static void rtc_post_restore (struct rtc_time *tm, unsigned int sec)$/;"	f	typeref:typename:void	file:
rtc_post_skip	post/drivers/rtc.c	/^static int rtc_post_skip (ulong * diff)$/;"	f	typeref:typename:int	file:
rtc_post_test	post/drivers/rtc.c	/^int rtc_post_test (int flags)$/;"	f	typeref:typename:int
rtc_read	drivers/rtc/ds1306.c	/^static unsigned char rtc_read (unsigned char reg)$/;"	f	typeref:typename:unsigned char	file:
rtc_read	drivers/rtc/ds1307.c	/^uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/ds1337.c	/^uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/ds1374.c	/^static uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/ds1556.c	/^static uchar rtc_read( unsigned int addr )$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/ds164x.c	/^static uchar rtc_read( unsigned int addr )$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/ds174x.c	/^static uchar rtc_read( unsigned int addr )$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/ds3231.c	/^uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/isl1208.c	/^static uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/m48t35ax.c	/^static uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/max6900.c	/^static uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/mk48t59.c	/^static uchar rtc_read (short reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/pcf8563.c	/^static uchar rtc_read (uchar reg)$/;"	f	typeref:typename:uchar	file:
rtc_read	drivers/rtc/pt7c4338.c	/^static u8 rtc_read(u8 reg)$/;"	f	typeref:typename:u8	file:
rtc_read	drivers/rtc/rx8025.c	/^#define rtc_read(/;"	d	file:
rtc_read32	drivers/rtc/mc146818.c	/^u32 rtc_read32(int reg)$/;"	f	typeref:typename:u32
rtc_read32	drivers/rtc/rtc-uclass.c	/^int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep)$/;"	f	typeref:typename:int
rtc_read8	drivers/rtc/mc146818.c	/^int rtc_read8(int reg)$/;"	f	typeref:typename:int
rtc_read8	drivers/rtc/rtc-uclass.c	/^int rtc_read8(struct udevice *dev, unsigned int reg)$/;"	f	typeref:typename:int
rtc_regs	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^struct rtc_regs {$/;"	s
rtc_reset	drivers/rtc/at91sam9_rtt.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/bfin_rtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/davinci.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds1302.c	/^rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds1306.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds1307.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds1337.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds1374.c	/^void rtc_reset (void){$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds1556.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds164x.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds174x.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ds3231.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/ftrtc010.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/imxdi.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/isl1208.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/m41t11.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/m41t60.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/m41t62.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/m41t94.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/m48t35ax.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/max6900.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mc13xxx-rtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mc146818.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mcfrtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mk48t59.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mpc5xxx.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mpc8xx.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mvrtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mx27rtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/mxsrtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/pcf8563.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/pl031.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/pt7c4338.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/rs5c372.c	/^rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/rtc4543.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/rv3029.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/rx8025.c	/^void rtc_reset (void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/s3c24x0_rtc.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_reset	drivers/rtc/x1205.c	/^void rtc_reset(void)$/;"	f	typeref:typename:void
rtc_set	drivers/rtc/at91sam9_rtt.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/bfin_rtc.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/davinci.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds1302.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds1306.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds1307.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds1337.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds1374.c	/^int rtc_set (struct rtc_time *tmp){$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds1556.c	/^int rtc_set( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds164x.c	/^int rtc_set( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds174x.c	/^int rtc_set( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ds3231.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/ftrtc010.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/imxdi.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/isl1208.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/m41t11.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/m41t60.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/m41t62.c	/^int rtc_set(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/m41t94.c	/^int rtc_set(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/m48t35ax.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/max6900.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mc13xxx-rtc.c	/^int rtc_set(struct rtc_time *rtc)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mc146818.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mcfrtc.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mk48t59.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mpc5xxx.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mpc8xx.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mvrtc.c	/^int rtc_set(struct rtc_time *t)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mx27rtc.c	/^int rtc_set(struct rtc_time *time)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/mxsrtc.c	/^int rtc_set(struct rtc_time *time)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/pcf8563.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/pl031.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/pt7c4338.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/rs5c372.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/rtc4543.c	/^int rtc_set(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/rv3029.c	/^int rtc_set( struct rtc_time *tmp )$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/rx8025.c	/^int rtc_set (struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/s3c24x0_rtc.c	/^int rtc_set(struct rtc_time *tmp)$/;"	f	typeref:typename:int
rtc_set	drivers/rtc/x1205.c	/^int rtc_set(struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_set_watchdog	drivers/rtc/mk48t59.c	/^void rtc_set_watchdog(short multi, short res)$/;"	f	typeref:typename:void
rtc_t	arch/m68k/include/asm/rtc.h	/^} rtc_t;$/;"	t	typeref:struct:rtc_ctrl
rtc_time	include/rtc_def.h	/^struct rtc_time {$/;"	s
rtc_to_tm	drivers/rtc/date.c	/^int rtc_to_tm(int tim, struct rtc_time *tm)$/;"	f	typeref:typename:int
rtc_validate	drivers/rtc/m41t60.c	/^static uchar *rtc_validate(void)$/;"	f	typeref:typename:uchar *	file:
rtc_write	drivers/rtc/ds1306.c	/^static void rtc_write (unsigned char reg, unsigned char val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds1307.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds1337.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds1374.c	/^static void rtc_write(uchar reg, uchar val, bool set)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds1556.c	/^static void rtc_write( unsigned int addr, uchar val )$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds164x.c	/^static void rtc_write( unsigned int addr, uchar val )$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds174x.c	/^static void rtc_write( unsigned int addr, uchar val )$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/ds3231.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/isl1208.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/m48t35ax.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/max6900.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/mk48t59.c	/^static void rtc_write (short reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/pcf8563.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/pt7c4338.c	/^static void rtc_write(u8 reg, u8 val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/rx8025.c	/^static void rtc_write (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtc_write	drivers/rtc/x1205.c	/^static void rtc_write(int reg, u8 val)$/;"	f	typeref:typename:void	file:
rtc_write32	drivers/rtc/mc146818.c	/^void rtc_write32(int reg, u32 value)$/;"	f	typeref:typename:void
rtc_write32	drivers/rtc/rtc-uclass.c	/^int rtc_write32(struct udevice *dev, unsigned int reg, u32 value)$/;"	f	typeref:typename:int
rtc_write8	drivers/rtc/mc146818.c	/^void rtc_write8(int reg, uchar val)$/;"	f	typeref:typename:void
rtc_write8	drivers/rtc/rtc-uclass.c	/^int rtc_write8(struct udevice *dev, unsigned int reg, int val)$/;"	f	typeref:typename:int
rtc_write_raw	drivers/rtc/ds1374.c	/^static void rtc_write_raw (uchar reg, uchar val)$/;"	f	typeref:typename:void	file:
rtcalm	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	rtcalm;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
rtcclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int rtcclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
rtcclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int rtcclkctrl;	\/* offset 0x0 *\/$/;"	m	struct:cm_rtc	typeref:typename:unsigned int
rtcclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int rtcclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
rtccon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	rtccon;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
rtcctl	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 rtcctl;$/;"	m	struct:rtc_regs	typeref:typename:u32
rtcex	arch/m68k/include/asm/immap_5227x.h	/^typedef struct rtcex {$/;"	s
rtcex	arch/m68k/include/asm/immap_5301x.h	/^typedef struct rtcex {$/;"	s
rtcex	arch/m68k/include/asm/immap_5445x.h	/^typedef struct rtcex {$/;"	s
rtcex_t	arch/m68k/include/asm/immap_5227x.h	/^} rtcex_t;$/;"	t	typeref:struct:rtcex
rtcex_t	arch/m68k/include/asm/immap_5301x.h	/^} rtcex_t;$/;"	t	typeref:struct:rtcex
rtcex_t	arch/m68k/include/asm/immap_5445x.h	/^} rtcex_t;$/;"	t	typeref:struct:rtcex
rtcienr	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 rtcienr;$/;"	m	struct:rtc_regs	typeref:typename:u32
rtcisr	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 rtcisr;$/;"	m	struct:rtc_regs	typeref:typename:u32
rtclk512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct rtclk512x {$/;"	s
rtclk512x_t	arch/powerpc/include/asm/immap_512x.h	/^} rtclk512x_t;$/;"	t	typeref:struct:rtclk512x
rtclk83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct rtclk83xx {$/;"	s
rtclk83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} rtclk83xx_t;$/;"	t	typeref:struct:rtclk83xx
rtcor	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rtcor;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
rtcorh	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rtcorh;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
rtcors	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rtcors;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
rtcorsh	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rtcorsh;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
rtcrst	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	rtcrst;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
rtcsr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rtcsr;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
rtdata	drivers/net/cs8900.h	/^	CS8900_REG rtdata;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
rtemp	include/commproc.h	/^	ulong	rtemp;		\/* Rx temp *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
rtemp	include/usb/mpc8xx_udc.h	/^	uint rtemp;	\/* Receive temp cp use only *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:uint
rtemp	post/cpu/mpc8xx/usb.c	/^	ushort rtemp;$/;"	m	struct:usb_param	typeref:typename:ushort	file:
rter	arch/powerpc/include/asm/immap_85xx.h	/^	u16	rter;$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u16
rtfreqcnt	include/fsl_sec.h	/^		u32 rtfreqcnt;	\/* PRGM=0: freq. count register *\/$/;"	m	union:rng4tst::__anonc0d8802d030a	typeref:typename:u32
rtfreqmax	include/fsl_sec.h	/^		u32 rtfreqmax;	\/* PRGM=1: freq. count max. limit register *\/$/;"	m	union:rng4tst::__anonc0d8802d030a	typeref:typename:u32
rtfreqmin	include/fsl_sec.h	/^	u32 rtfreqmin;		\/* frequency count min. limit register *\/$/;"	m	struct:rng4tst	typeref:typename:u32
rticliodnr	include/fsl_sec.h	/^	} rticliodnr[4];$/;"	m	struct:ccsr_sec	typeref:struct:ccsr_sec::__anonc0d8802d0508[4]
rtime_decompress	fs/jffs2/compr_rtime.c	/^void rtime_decompress(unsigned char *data_in, unsigned char *cpage_out,$/;"	f	typeref:typename:void
rtl8139_initialize	drivers/net/rtl8139.c	/^int rtl8139_initialize(bd_t *bis)$/;"	f	typeref:typename:int
rtl8139_probe	drivers/net/rtl8139.c	/^static int rtl8139_probe(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
rtl8139_rx_config	drivers/net/rtl8139.c	/^static const unsigned int rtl8139_rx_config =$/;"	v	typeref:typename:const unsigned int	file:
rtl8152_disable	drivers/usb/eth/r8152.c	/^static void rtl8152_disable(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_down	drivers/usb/eth/r8152.c	/^static void rtl8152_down(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_enable	drivers/usb/eth/r8152.c	/^static int rtl8152_enable(struct r8152 *tp)$/;"	f	typeref:typename:int	file:
rtl8152_get_speed	drivers/usb/eth/r8152.c	/^static u8 rtl8152_get_speed(struct r8152 *tp)$/;"	f	typeref:typename:u8	file:
rtl8152_nic_reset	drivers/usb/eth/r8152.c	/^static void rtl8152_nic_reset(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_reinit_ll	drivers/usb/eth/r8152.c	/^static void rtl8152_reinit_ll(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_set_rx_mode	drivers/usb/eth/r8152.c	/^static void rtl8152_set_rx_mode(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_set_speed	drivers/usb/eth/r8152.c	/^static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)$/;"	f	typeref:typename:int	file:
rtl8152_unload	drivers/usb/eth/r8152.c	/^static void rtl8152_unload(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_up	drivers/usb/eth/r8152.c	/^static void rtl8152_up(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8152_wait_fifo_empty	drivers/usb/eth/r8152.c	/^static void rtl8152_wait_fifo_empty(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8153_disable	drivers/usb/eth/r8152.c	/^static void rtl8153_disable(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8153_down	drivers/usb/eth/r8152.c	/^static void rtl8153_down(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8153_enable	drivers/usb/eth/r8152.c	/^static int rtl8153_enable(struct r8152 *tp)$/;"	f	typeref:typename:int	file:
rtl8153_unload	drivers/usb/eth/r8152.c	/^static void rtl8153_unload(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8153_up	drivers/usb/eth/r8152.c	/^static void rtl8153_up(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl8169_common_start	drivers/net/rtl8169.c	/^static void rtl8169_common_start(struct udevice *dev, unsigned char *enetaddr,$/;"	f	typeref:typename:void	file:
rtl8169_eth_ids	drivers/net/rtl8169.c	/^static const struct udevice_id rtl8169_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
rtl8169_eth_ops	drivers/net/rtl8169.c	/^static const struct eth_ops rtl8169_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
rtl8169_eth_probe	drivers/net/rtl8169.c	/^static int rtl8169_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rtl8169_eth_recv	drivers/net/rtl8169.c	/^int rtl8169_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
rtl8169_eth_send	drivers/net/rtl8169.c	/^int rtl8169_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
rtl8169_eth_start	drivers/net/rtl8169.c	/^static int rtl8169_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
rtl8169_eth_stop	drivers/net/rtl8169.c	/^void rtl8169_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void
rtl8169_hw_start	drivers/net/rtl8169.c	/^static void rtl8169_hw_start(struct udevice *dev)$/;"	f	typeref:typename:void	file:
rtl8169_init_board	drivers/net/rtl8169.c	/^static int rtl8169_init_board(unsigned long dev_iobase, const char *name)$/;"	f	typeref:typename:int	file:
rtl8169_init_ring	drivers/net/rtl8169.c	/^static void rtl8169_init_ring(struct udevice *dev)$/;"	f	typeref:typename:void	file:
rtl8169_initialize	drivers/net/rtl8169.c	/^int rtl8169_initialize(bd_t *bis)$/;"	f	typeref:typename:int
rtl8169_intr_mask	drivers/net/rtl8169.c	/^static const u16 rtl8169_intr_mask =$/;"	v	typeref:typename:const u16	file:
rtl8169_private	drivers/net/rtl8169.c	/^struct rtl8169_private {$/;"	s	file:
rtl8169_rx_config	drivers/net/rtl8169.c	/^static const unsigned int rtl8169_rx_config =$/;"	v	typeref:typename:const unsigned int	file:
rtl8169_set_rx_mode	drivers/net/rtl8169.c	/^static void rtl8169_set_rx_mode(void)$/;"	f	typeref:typename:void	file:
rtl8189	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	rtl8189: sdio_wifi@1 {$/;"	l
rtl8189ftv	arch/arm/dts/sun8i-h3-orangepi-lite.dts	/^	rtl8189ftv: sdio_wifi@1 {$/;"	l
rtl8189ftv	arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts	/^	rtl8189ftv: sdio_wifi@1 {$/;"	l
rtl8211e_startup	drivers/net/phy/realtek.c	/^static int rtl8211e_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8211f_config	drivers/net/phy/realtek.c	/^static int rtl8211f_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8211f_parse_status	drivers/net/phy/realtek.c	/^static int rtl8211f_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8211f_startup	drivers/net/phy/realtek.c	/^static int rtl8211f_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8211x_config	drivers/net/phy/realtek.c	/^static int rtl8211x_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8211x_parse_status	drivers/net/phy/realtek.c	/^static int rtl8211x_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8211x_startup	drivers/net/phy/realtek.c	/^static int rtl8211x_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
rtl8703as	arch/arm/dts/sun8i-a33-ga10h-v1.1.dts	/^	rtl8703as: sdio_wifi@1 {$/;"	l
rtl8723bs	arch/arm/dts/sun8i-a33-inet-d978-rev2.dts	/^	rtl8723bs: sdio_wifi@1 {$/;"	l
rtl_alloc_descs	drivers/net/rtl8169.c	/^static void *rtl_alloc_descs(unsigned int num)$/;"	f	typeref:typename:void *	file:
rtl_bcast_addr	drivers/net/rtl8139.c	/^static int rtl_bcast_addr(struct eth_device *dev, const u8 *bcast_mac, u8 set)$/;"	f	typeref:typename:int	file:
rtl_chip_info	drivers/net/rtl8169.c	/^} rtl_chip_info[] = {$/;"	v	typeref:struct:__anon571e08a40108[]
rtl_clear_bp	drivers/usb/eth/r8152_fw.c	/^static void rtl_clear_bp(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl_disable	drivers/net/rtl8139.c	/^static void rtl_disable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
rtl_disable	drivers/usb/eth/r8152.c	/^static void rtl_disable(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl_enable	drivers/usb/eth/r8152.c	/^static int rtl_enable(struct r8152 *tp)$/;"	f	typeref:typename:int	file:
rtl_flush_buffer	drivers/net/rtl8169.c	/^static void rtl_flush_buffer(void *buf, size_t size)$/;"	f	typeref:typename:void	file:
rtl_flush_rx_desc	drivers/net/rtl8169.c	/^static void rtl_flush_rx_desc(struct RxDesc *desc)$/;"	f	typeref:typename:void	file:
rtl_flush_tx_desc	drivers/net/rtl8169.c	/^static void rtl_flush_tx_desc(struct TxDesc *desc)$/;"	f	typeref:typename:void	file:
rtl_halt	drivers/net/rtl8169.c	/^static void rtl_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
rtl_halt_common	drivers/net/rtl8169.c	/^static void rtl_halt_common(unsigned long dev_iobase)$/;"	f	typeref:typename:void	file:
rtl_init	drivers/net/rtl8169.c	/^static int rtl_init(unsigned long dev_ioaddr, const char *name,$/;"	f	typeref:typename:int	file:
rtl_inval_buffer	drivers/net/rtl8169.c	/^static void rtl_inval_buffer(void *buf, size_t size)$/;"	f	typeref:typename:void	file:
rtl_inval_rx_desc	drivers/net/rtl8169.c	/^static void rtl_inval_rx_desc(struct RxDesc *desc)$/;"	f	typeref:typename:void	file:
rtl_inval_tx_desc	drivers/net/rtl8169.c	/^static void rtl_inval_tx_desc(struct TxDesc *desc)$/;"	f	typeref:typename:void	file:
rtl_ops	drivers/usb/eth/r8152.h	/^	struct rtl_ops {$/;"	s	struct:r8152
rtl_ops	drivers/usb/eth/r8152.h	/^	} rtl_ops;$/;"	m	struct:r8152	typeref:struct:r8152::rtl_ops
rtl_ops_init	drivers/usb/eth/r8152.c	/^static int rtl_ops_init(struct r8152 *tp)$/;"	f	typeref:typename:int	file:
rtl_poll	drivers/net/rtl8139.c	/^static int rtl_poll(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
rtl_recv	drivers/net/rtl8169.c	/^static int rtl_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
rtl_recv_common	drivers/net/rtl8169.c	/^static int rtl_recv_common(struct udevice *dev, unsigned long dev_iobase,$/;"	f	typeref:typename:int	file:
rtl_register_content	drivers/usb/eth/r8152.h	/^enum rtl_register_content {$/;"	g
rtl_reset	drivers/net/rtl8139.c	/^static void rtl_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
rtl_reset	drivers/net/rtl8169.c	/^static int rtl_reset(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
rtl_rx_vlan_en	drivers/usb/eth/r8152.c	/^static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)$/;"	f	typeref:typename:void	file:
rtl_send	drivers/net/rtl8169.c	/^static int rtl_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
rtl_send_common	drivers/net/rtl8169.c	/^static int rtl_send_common(struct udevice *dev, unsigned long dev_iobase,$/;"	f	typeref:typename:int	file:
rtl_set_eee_plus	drivers/usb/eth/r8152.c	/^static void rtl_set_eee_plus(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl_tally_reset	drivers/usb/eth/r8152.c	/^static void rtl_tally_reset(struct r8152 *tp)$/;"	f	typeref:typename:void	file:
rtl_transmit	drivers/net/rtl8139.c	/^static int rtl_transmit(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
rtl_version	drivers/usb/eth/r8152.h	/^enum rtl_version {$/;"	g
rtmctl	include/fsl_sec.h	/^	u32 rtmctl;		\/* misc. control register *\/$/;"	m	struct:rng4tst	typeref:typename:u32
rtmr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	rtmr;$/;"	m	struct:at91_st	typeref:typename:u32
rtmr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	rtmr;$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u16
rtor	drivers/serial/atmel_usart.h	/^	u32	rtor;$/;"	m	struct:atmel_usart3	typeref:typename:u32
rtor	drivers/serial/serial_stm32x7.h	/^	u32 rtor;$/;"	m	struct:stm32_usart	typeref:typename:u32
rtp	arch/arm/dts/sun4i-a10.dtsi	/^		rtp: rtp@01c25000 {$/;"	l
rtp	arch/arm/dts/sun5i.dtsi	/^		rtp: rtp@01c25000 {$/;"	l
rtp	arch/arm/dts/sun6i-a31.dtsi	/^		rtp: rtp@01c25000 {$/;"	l
rtp	arch/arm/dts/sun7i-a20.dtsi	/^		rtp: rtp@01c25000 {$/;"	l
rtpkrmax	include/fsl_sec.h	/^		u32 rtpkrmax;	\/* PRGM=1: poker max. limit register *\/$/;"	m	union:rng4tst::__anonc0d8802d010a	typeref:typename:u32
rtpkrrng	include/fsl_sec.h	/^	u32 rtpkrrng;		\/* poker range register *\/$/;"	m	struct:rng4tst	typeref:typename:u32
rtpkrsq	include/fsl_sec.h	/^		u32 rtpkrsq;	\/* PRGM=0: poker square calc. result register *\/$/;"	m	union:rng4tst::__anonc0d8802d010a	typeref:typename:u32
rtr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 rtr;		\/* 0x04: Refresh Timer Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
rtr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 rtr;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
rtr_bus	arch/x86/include/asm/pirq_routing.h	/^	u8 rtr_bus;		\/* busno of the interrupt router *\/$/;"	m	struct:irq_routing_table	typeref:typename:u8
rtr_devfn	arch/x86/include/asm/pirq_routing.h	/^	u8 rtr_devfn;		\/* devfn of the interrupt router *\/$/;"	m	struct:irq_routing_table	typeref:typename:u8
rtr_device	arch/x86/include/asm/pirq_routing.h	/^	u16 rtr_device;		\/* Device ID of the interrupt router *\/$/;"	m	struct:irq_routing_table	typeref:typename:u16
rtr_vendor	arch/x86/include/asm/pirq_routing.h	/^	u16 rtr_vendor;		\/* Vendor ID of the interrupt router *\/$/;"	m	struct:irq_routing_table	typeref:typename:u16
rtrim	scripts/checkpatch.pl	/^sub rtrim {$/;"	s
rtsblim	include/fsl_sec.h	/^		u32 rtsblim;	\/* PRGM=1: sparse bit limit register *\/$/;"	m	union:rng4tst::__anonc0d8802d020a	typeref:typename:u32
rtscmisc	include/fsl_sec.h	/^	u32 rtscmisc;		\/* statistical check misc. register *\/$/;"	m	struct:rng4tst	typeref:typename:u32
rtscr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	rtscr;$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u16
rtsdctl	include/fsl_sec.h	/^	u32 rtsdctl;		\/* seed control register *\/$/;"	m	struct:rng4tst	typeref:typename:u32
rtsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rtsr;$/;"	m	struct:ccsr_cpm_cp	typeref:typename:u32
rtsrshadow	drivers/qe/uec.h	/^	u32  rtsrshadow;       \/* temporary variable handled by QE *\/$/;"	m	struct:uec_scheduler	typeref:typename:u32
rtstbcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 rtstbcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
rtstbcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 rtstbcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
rtt_nom	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 rtt_nom;	\/* Rtt_Nom (DDR3_RTT_*) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
rtt_nom_value	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t rtt_nom_value;$/;"	m	struct:mrc_params	typeref:typename:uint8_t
rtt_override	include/fsl_ddr_sdram.h	/^	unsigned int rtt_override;		\/* rtt_override enable *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
rtt_override_value	include/fsl_ddr_sdram.h	/^	unsigned int rtt_override_value;	\/* that is Rtt_Nom for DDR3 *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
rtt_wr	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 rtt_wr;	\/* Rtt_Wr (DDR3_RTT_*) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
rtt_wr_override_value	include/fsl_ddr_sdram.h	/^	unsigned int rtt_wr_override_value;	\/* this is Rtt_WR for DDR3 *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
rttotsam	include/fsl_sec.h	/^		u32 rttotsam;	\/* PRGM=0: total samples register *\/$/;"	m	union:rng4tst::__anonc0d8802d020a	typeref:typename:u32
rtx	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static RTXBD rtx __attribute__ ((aligned(8)));$/;"	v	typeref:typename:RTXBD	file:
rtx	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static RTXBD *rtx;$/;"	v	typeref:typename:RTXBD *	file:
rtx	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static RTXBD rtx __attribute__ ((aligned(8)));$/;"	v	typeref:typename:RTXBD	file:
rtx	arch/powerpc/cpu/mpc8xx/fec.c	/^static RTXBD *rtx = NULL;$/;"	v	typeref:typename:RTXBD *	file:
rtx	arch/powerpc/cpu/mpc8xx/scc.c	/^static RTXBD *rtx;$/;"	v	typeref:typename:RTXBD *	file:
rtx	post/cpu/mpc8xx/ether.c	/^static RTXBD *rtx;$/;"	v	typeref:typename:RTXBD *	file:
rtx_cdmac_bd	drivers/net/xilinx_ll_temac_sdma.c	/^struct rtx_cdmac_bd {$/;"	s	file:
rtxbd	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^typedef volatile struct rtxbd {$/;"	s	file:
rtxbd	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^typedef volatile struct rtxbd {$/;"	s	file:
rubin_do_decompress	fs/jffs2/compr_rubin.c	/^void rubin_do_decompress(unsigned char *bits, unsigned char *in,$/;"	f	typeref:typename:void
rubp	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 rubp;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
ruc	drivers/net/e1000.h	/^	uint64_t ruc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rule	drivers/ddr/altera/sdram.c	/^	u32	rule;		\/* SDRAM protection rule number: 0-19 *\/$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
rule_data	arch/x86/include/asm/arch-ivybridge/me.h	/^	struct platform_type_rule_data rule_data;$/;"	m	struct:mbp_plat_type	typeref:struct:platform_type_rule_data
rule_docproc	doc/DocBook/Makefile	/^define rule_docproc$/;"	m
run	include/efi.h	/^	struct efi_runtime_services *run;$/;"	m	struct:efi_priv	typeref:struct:efi_runtime_services *
run	test/py/multiplexed_log.py	/^    def run(self, cmd, cwd=None, ignore_errors=False):$/;"	m	class:RunAndLog
run	tools/buildman/builderthread.py	/^    def run(self):$/;"	m	class:BuilderThread
run	tools/buildman/builderthread.py	/^    def run(self):$/;"	m	class:ResultThread
run_and_log	test/py/u_boot_utils.py	/^def run_and_log(u_boot_console, cmd, ignore_errors=False):$/;"	f
run_and_log_expect_exception	test/py/u_boot_utils.py	/^def run_and_log_expect_exception(u_boot_console, cmd, retcode, msg):$/;"	f
run_bootm	test/py/tests/test_vboot.py	/^    def run_bootm(sha_algo, test_type, expect_string, boots):$/;"	f	function:test_vboot	file:
run_bootm_test	test/compression.c	/^static int run_bootm_test(int comp_type, mutate_func compress)$/;"	f	typeref:typename:int	file:
run_command	common/cli.c	/^int run_command(const char *cmd, int flag)$/;"	f	typeref:typename:int
run_command	test/py/u_boot_console_base.py	/^    def run_command(self, cmd, wait_for_echo=True, send_nl=True,$/;"	m	class:ConsoleBase
run_command_list	common/cli.c	/^int run_command_list(const char *cmd, int len, int flag)$/;"	f	typeref:typename:int
run_command_list	test/py/u_boot_console_base.py	/^    def run_command_list(self, cmds):$/;"	m	class:ConsoleBase
run_command_repeatable	common/cli.c	/^int run_command_repeatable(const char *cmd, int flag)$/;"	f	typeref:typename:int
run_descriptor_jr	drivers/crypto/fsl/jr.c	/^int run_descriptor_jr(uint32_t *desc)$/;"	f	typeref:typename:int
run_descriptor_jr_idx	drivers/crypto/fsl/jr.c	/^static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
run_dfu	common/spl/spl_dfu.c	/^static int run_dfu(int usb_index, char *interface, char *devstring)$/;"	f	typeref:typename:int	file:
run_dfu_util	test/py/tests/test_dfu.py	/^    def run_dfu_util(alt_setting, fn, up_dn_load_arg):$/;"	f	function:test_dfu	file:
run_distro_boot	arch/sandbox/include/asm/state.h	/^	bool run_distro_boot;		\/* Automatically run distro bootcommands *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
run_fit_test	test/image/test-fit.py	/^def run_fit_test(mkimage, u_boot):$/;"	f
run_gc	fs/ubifs/budget.c	/^static int run_gc(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
run_list	common/cli_hush.c	/^static int run_list(struct pipe *pi)$/;"	f	typeref:typename:int	file:
run_list_real	common/cli_hush.c	/^static int run_list_real(struct pipe *pi)$/;"	f	typeref:typename:int	file:
run_main_loop	common/board_r.c	/^static int run_main_loop(void)$/;"	f	typeref:typename:int	file:
run_mem_calibrate	drivers/ddr/altera/sequencer.c	/^static int run_mem_calibrate(void)$/;"	f	typeref:typename:int	file:
run_pipe_real	common/cli_hush.c	/^static int run_pipe_real(struct pipe *pi)$/;"	f	typeref:typename:int	file:
run_preboot_environment_command	common/main.c	/^static void run_preboot_environment_command(void)$/;"	f	typeref:typename:void	file:
run_regs	drivers/usb/host/xhci.h	/^	struct xhci_run_regs *run_regs;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_run_regs *
run_test	lib/fdtdec_test.c	/^static int run_test(const char *aliases, const char *nodes, const char *expect)$/;"	f	typeref:typename:int	file:
run_test	test/compression.c	/^static int run_test(char *name, mutate_func compress, mutate_func uncompress)$/;"	f	typeref:typename:int	file:
run_tests	test/image/test-fit.py	/^def run_tests():$/;"	f
run_trace	test/trace/test-trace.sh	/^run_trace() {$/;"	f
run_usb_dnl_gadget	common/dfu.c	/^int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)$/;"	f	typeref:typename:int
run_xsb_test	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int run_xsb_test(u32 dev_num, u32 mem_addr, u32 write_type,$/;"	f	typeref:typename:int
rund	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rund;		\/* RX Undersize Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rund	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rund;		\/* 0x246cc - Receive Undersize Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rund	include/fsl_dtsec.h	/^	u32	rund;		\/* Receive undersize packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
rund	include/tsec.h	/^	u32	rund;		\/* Receive Undersize Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
running	drivers/i2c/intel_i2c.c	/^	int running;$/;"	m	struct:intel_i2c	typeref:typename:int	file:
running	drivers/net/ne2000_base.h	/^	bool tx_started, running, hardwired_esa;$/;"	m	struct:dp83902a_priv_data	typeref:typename:bool
running	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		running:1;$/;"	m	struct:fsg_common	typeref:typename:unsigned int:1	file:
running	drivers/usb/gadget/pxa25x_udc.h	/^	unsigned				running:1;$/;"	m	struct:pxa25x_watchdog	typeref:typename:unsigned:1
running_from_sdram	arch/arm/include/asm/ti-common/sys_proto.h	/^static inline u32 running_from_sdram(void)$/;"	f	typeref:typename:u32
running_progs	common/cli_hush.c	/^	int running_progs;			\/* number of programs running *\/$/;"	m	struct:pipe	typeref:typename:int	file:
runt	drivers/qe/uec.h	/^	u32   runt;              \/* runt *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
runt_length_counter	drivers/net/dm9000x.c	/^	u32 runt_length_counter;	\/* counter: RX length < 64byte *\/$/;"	m	struct:board_info	typeref:typename:u32	file:
runt_tlcc	drivers/net/ftmac100.h	/^	unsigned int	runt_tlcc;	\/* 0xe0 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
runtime	include/efi_api.h	/^	struct efi_runtime_services *runtime;$/;"	m	struct:efi_system_table	typeref:struct:efi_runtime_services *
runtime_regs_address	drivers/mtd/nand/fsl_ifc_spl.c	/^static inline struct fsl_ifc_runtime *runtime_regs_address(void)$/;"	f	typeref:struct:fsl_ifc_runtime *	file:
rv	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	rv;		\/* 0x10c *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
rvbar0_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar0_0;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar0_1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar0_1;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar1_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar1_0;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar1_1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar1_1;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar2_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar2_0;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar2_1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar2_1;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar3_0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar3_0;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar3_1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 rvbar3_1;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
rvbar_addr0_h	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rvbar_addr0_h; \/* 0x44 *\/$/;"	m	struct:apu_regs	typeref:typename:u32
rvbar_addr0_l	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 rvbar_addr0_l; \/* 0x40 *\/$/;"	m	struct:apu_regs	typeref:typename:u32
rvid	include/fsl_sec.h	/^	u32	rvid;		\/* Run Time Integrity Checking Version ID Reg.*\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
rw	arch/x86/lib/physmem.c	/^	uint64_t rw:1;     \/* read\/write *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
rw2pden	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 rw2pden;		\/* 0x8C: EMC_RW2PDEN *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
rw_fifo	drivers/block/ftide020.h	/^	unsigned int	rw_fifo;	\/* 0x00 - READ\/WRITE FIFO	*\/$/;"	m	struct:ftide020_s	typeref:typename:unsigned int
rw_fifo	drivers/usb/musb/blackfin_usb.c	/^void rw_fifo(u8 ep, u32 length, void *fifo_data, int is_write)$/;"	f	typeref:typename:void
rw_fill_level	drivers/net/altera_tse.h	/^	u32 rw_fill_level;$/;"	m	struct:msgdma_csr	typeref:typename:u32
rw_incompat	fs/ubifs/ubifs.h	/^	unsigned int rw_incompat:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
rw_mgr_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^static const struct socfpga_sdram_rw_mgr_config rw_mgr_config = {$/;"	v	typeref:typename:const struct socfpga_sdram_rw_mgr_config	file:
rw_mgr_decr_vfifo	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_decr_vfifo(const u32 grp)$/;"	f	typeref:typename:void	file:
rw_mgr_incr_vfifo	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_incr_vfifo(const u32 grp)$/;"	f	typeref:typename:void	file:
rw_mgr_mem_calibrate_dq_dqs_centering	drivers/ddr/altera/sequencer.c	/^rw_mgr_mem_calibrate_dq_dqs_centering(const u32 rw_group, const u32 test_bgn,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_dqs_enable_calibration	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_dqs_enable_calibration(const u32 rw_group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_guaranteed_write	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_guaranteed_write(const u32 rw_group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_lfifo	drivers/ddr/altera/sequencer.c	/^static u32 rw_mgr_mem_calibrate_lfifo(void)$/;"	f	typeref:typename:u32	file:
rw_mgr_mem_calibrate_read_load_patterns	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_mem_calibrate_read_load_patterns(const u32 rank_bgn,$/;"	f	typeref:typename:void	file:
rw_mgr_mem_calibrate_read_test	drivers/ddr/altera/sequencer.c	/^rw_mgr_mem_calibrate_read_test(const u32 rank_bgn, const u32 group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_read_test_all_ranks	drivers/ddr/altera/sequencer.c	/^rw_mgr_mem_calibrate_read_test_all_ranks(const u32 grp, const u32 num_tries,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_read_test_patterns	drivers/ddr/altera/sequencer.c	/^rw_mgr_mem_calibrate_read_test_patterns(const u32 rank_bgn, const u32 group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_vfifo	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_vfifo(const u32 rw_group, const u32 test_bgn)$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_vfifo_center	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_vfifo_center(const u32 rank_bgn,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_vfifo_end	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_vfifo_end(const u32 rw_group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp)$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_write_test	drivers/ddr/altera/sequencer.c	/^rw_mgr_mem_calibrate_write_test(const u32 rank_bgn, const u32 write_group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_write_test_issue	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_mem_calibrate_write_test_issue(u32 group,$/;"	f	typeref:typename:void	file:
rw_mgr_mem_calibrate_writes	drivers/ddr/altera/sequencer.c	/^static int rw_mgr_mem_calibrate_writes(const u32 rank_bgn, const u32 group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_calibrate_writes_center	drivers/ddr/altera/sequencer.c	/^rw_mgr_mem_calibrate_writes_center(const u32 rank_bgn, const u32 write_group,$/;"	f	typeref:typename:int	file:
rw_mgr_mem_handoff	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_mem_handoff(void)$/;"	f	typeref:typename:void	file:
rw_mgr_mem_init_load_regs	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_mem_init_load_regs(u32 cntr0, u32 cntr1, u32 cntr2, u32 jump)$/;"	f	typeref:typename:void	file:
rw_mgr_mem_initialize	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_mem_initialize(void)$/;"	f	typeref:typename:void	file:
rw_mgr_mem_load_user	drivers/ddr/altera/sequencer.c	/^static void rw_mgr_mem_load_user(const u32 fin1, const u32 fin2,$/;"	f	typeref:typename:void	file:
rw_reg	drivers/power/pmic/i2c_pmic_emul.c	/^	u8 rw_reg;$/;"	m	struct:sandbox_i2c_pmic_plat_data	typeref:typename:u8	file:
rw_reqbuf	drivers/block/sata_dwc.h	/^	unsigned long		rw_reqbuf;$/;"	m	struct:ata_port_stats	typeref:typename:unsigned long
rw_semaphore	include/linux/compat.h	/^struct rw_semaphore { int i; };$/;"	s
rw_seq_num	drivers/net/altera_tse.h	/^	u32 rw_seq_num;$/;"	m	struct:msgdma_csr	typeref:typename:u32
rw_wl_nop_cycles	drivers/ddr/altera/sequencer.h	/^	uint32_t rw_wl_nop_cycles;$/;"	m	struct:gbl_type	typeref:typename:uint32_t
rwc	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 rwc;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
rwc	board/nokia/rx51/tag_omap.h	/^	u8		rwc;$/;"	m	struct:omap_usb_config	typeref:typename:u8
rwcfg	drivers/ddr/altera/sequencer.c	/^const struct socfpga_sdram_rw_mgr_config *rwcfg;$/;"	v	typeref:typename:const struct socfpga_sdram_rw_mgr_config *
rwcr	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 rwcr;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
rwtcnt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 rwtcnt;	\/* 0x00 *\/$/;"	m	struct:rcar_rwdt	typeref:typename:u32
rwtcnt	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^	u32 rwtcnt;$/;"	m	struct:rcar_rwdt	typeref:typename:u32
rwtcnt0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u16 rwtcnt0;	\/* 0x00 *\/$/;"	m	struct:r8a7740_rwdt	typeref:typename:u16
rwtcnt0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u16 rwtcnt0;	\/* 0x00 *\/$/;"	m	struct:sh73a0_rwdt	typeref:typename:u16
rwtcsra	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 rwtcsra;	\/* 0x04 *\/$/;"	m	struct:rcar_rwdt	typeref:typename:u32
rwtcsra	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^	u32 rwtcsra;$/;"	m	struct:rcar_rwdt	typeref:typename:u32
rwtcsra0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u16 rwtcsra0;	\/* 0x04 *\/$/;"	m	struct:r8a7740_rwdt	typeref:typename:u16
rwtcsra0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u16 rwtcsra0;	\/* 0x04 *\/$/;"	m	struct:sh73a0_rwdt	typeref:typename:u16
rwtcsrb	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u16 rwtcsrb;	\/* 0x08 *\/$/;"	m	struct:rcar_rwdt	typeref:typename:u16
rwtcsrb	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^	u32 rwtcsrb;$/;"	m	struct:rcar_rwdt	typeref:typename:u32
rwtcsrb0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u16 rwtcsrb0;	\/* 0x08 *\/$/;"	m	struct:r8a7740_rwdt	typeref:typename:u16
rwtcsrb0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u16 rwtcsrb0;	\/* 0x08 *\/$/;"	m	struct:sh73a0_rwdt	typeref:typename:u16
rx	arch/arm/include/asm/arch-lpc32xx/uart.h	/^		u32 rx;		\/* Receiver FIFO		*\/$/;"	m	union:hsuart_regs::__anon336bcd84010a	typeref:typename:u32
rx	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rx;		\/* eSPI receive FIFO access *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32
rx	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u32 rx;		\/* receive register *\/$/;"	m	struct:spi8xxx	typeref:typename:u32
rx	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int rx;$/;"	m	struct:emac_stats_st	typeref:typename:int
rx	arch/powerpc/include/asm/ppc4xx-emac.h	/^    volatile mal_desc_t *rx;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:volatile mal_desc_t *
rx	drivers/i2c/lpc32xx_i2c.c	/^		u32 rx;$/;"	m	union:lpc32xx_i2c_registers::__anon8b454e42010a	typeref:typename:u32	file:
rx	drivers/net/ftgmac100.h	/^	unsigned int	rx;		\/* 0xb0 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx	drivers/net/xilinx_ll_temac_sdma.c	/^	struct cdmac_bd rx[PKTBUFSRX];$/;"	m	struct:rtx_cdmac_bd	typeref:struct:cdmac_bd[]	file:
rx	drivers/serial/serial_sh.h	/^	unsigned short rx, tx; \/* GPIO bit no *\/$/;"	m	struct:__anonb38103520108	typeref:typename:unsigned short
rx	drivers/serial/serial_uniphier.c	/^	u32 rx;			\/* In:  Receive buffer *\/$/;"	m	struct:uniphier_serial	typeref:typename:u32	file:
rx	drivers/spi/armada100_spi.c	/^	void *rx;$/;"	m	struct:armd_spi_slave	typeref:typename:void *	file:
rx	drivers/spi/designware_spi.c	/^	void *rx;$/;"	m	struct:dw_spi_priv	typeref:typename:void *	file:
rx	drivers/spi/omap3_spi.c	/^	unsigned int rx;		\/* 0x3C, 0x50, 0x64, 0x78 *\/$/;"	m	struct:mcspi_channel	typeref:typename:unsigned int	file:
rx	drivers/spi/pic32_spi.c	/^	const void		*rx;$/;"	m	struct:pic32_spi_priv	typeref:typename:const void *	file:
rx	include/linux/immap_qe.h	/^	u8 rx[0x400];$/;"	m	struct:sir	typeref:typename:u8[0x400]
rx0	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 rx0;$/;"	m	struct:ssi	typeref:typename:u32
rx1	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 rx1;$/;"	m	struct:ssi	typeref:typename:u32
rx127	drivers/qe/uec.h	/^	u32 rx127;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rx127	include/linux/immap_qe.h	/^	u32 rx127;		\/* Total number of frames (including bad$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rx14msk	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 rx14msk;		\/* 0x14 RxBuffer 14 Mask *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
rx15msk	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 rx15msk;		\/* 0x18 RxBuffer 15 Mask *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
rx255	drivers/qe/uec.h	/^	u32 rx255;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rx255	include/linux/immap_qe.h	/^	u32 rx255;		\/* Total number of frames (including$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rx51_kp_fill	board/nokia/rx51/rx51.c	/^static void rx51_kp_fill(u8 k, u8 mods)$/;"	f	typeref:typename:void	file:
rx51_kp_getc	board/nokia/rx51/rx51.c	/^int rx51_kp_getc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int
rx51_kp_init	board/nokia/rx51/rx51.c	/^int rx51_kp_init(void)$/;"	f	typeref:typename:int
rx51_kp_tstc	board/nokia/rx51/rx51.c	/^int rx51_kp_tstc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int
rx64	drivers/qe/uec.h	/^	u32 rx64;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rx64	include/linux/immap_qe.h	/^	u32 rx64;		\/* Total number of frames received including$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rxBd	drivers/qe/uec.h	/^	volatile qe_bd_t		*rxBd;$/;"	m	struct:uec_private	typeref:typename:volatile qe_bd_t *
rxIdx	arch/m68k/include/asm/fec.h	/^	uint rxIdx;$/;"	m	struct:fec_info_s	typeref:typename:uint
rxIdx	arch/m68k/include/asm/fsl_mcdmafec.h	/^	uint rxIdx;$/;"	m	struct:fec_info_dma	typeref:typename:uint
rxIdx	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static uint rxIdx;	\/* index of the current RX buffer *\/$/;"	v	typeref:typename:uint	file:
rxIdx	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static uint rxIdx;      \/* index of the current RX buffer *\/$/;"	v	typeref:typename:uint	file:
rxIdx	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static uint rxIdx;	\/* index of the current RX buffer *\/$/;"	v	typeref:typename:uint	file:
rxIdx	arch/powerpc/cpu/mpc8xx/fec.c	/^static uint rxIdx;	\/* index of the current RX buffer *\/$/;"	v	typeref:typename:uint	file:
rxIdx	arch/powerpc/cpu/mpc8xx/scc.c	/^static uint rxIdx;	\/* index of the current RX buffer *\/$/;"	v	typeref:typename:uint	file:
rxIdx	drivers/net/bfin_mac.c	/^static u16 rxIdx;		\/* index of the current TX buffer *\/$/;"	v	typeref:typename:u16	file:
rxIdx	post/cpu/mpc8xx/ether.c	/^static uint rxIdx;		\/* index of the current RX buffer *\/$/;"	v	typeref:typename:uint	file:
rxInit	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 rxInit;		\/* DMA Receive Initiator *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
rxPri	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 rxPri;		\/* DMA Receive Priority *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
rxRingSize	drivers/net/dc2114x.c	/^static char rxRingSize;$/;"	v	typeref:typename:char	file:
rxTask	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 rxTask;		\/* DMA receive Task Number *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
rx_1023_l	include/fsl_memac.h	/^	u32	rx_1023_l;	\/* Rx 512 to 1023 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_1023_l	include/fsl_tgec.h	/^	u32	rx_1023_l;	\/* Rx 512 to 1023 oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_1023_u	include/fsl_memac.h	/^	u32	rx_1023_u;	\/* Rx 512 to 1023 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_1023_u	include/fsl_tgec.h	/^	u32	rx_1023_u;	\/* Rx 512 to 1023 oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_127_l	include/fsl_memac.h	/^	u32	rx_127_l;	\/* Rx 65 to 127 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_127_l	include/fsl_tgec.h	/^	u32	rx_127_l;	\/* Rx 65 to 127 oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_127_u	include/fsl_memac.h	/^	u32	rx_127_u;	\/* Rx 65 to 127 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_127_u	include/fsl_tgec.h	/^	u32	rx_127_u;	\/* Rx 65 to 127 oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_1518_l	include/fsl_memac.h	/^	u32	rx_1518_l;	\/* Rx 1024 to 1518 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_1518_l	include/fsl_tgec.h	/^	u32	rx_1518_l;	\/* Rx 1024 to 1518 oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_1518_u	include/fsl_memac.h	/^	u32	rx_1518_u;	\/* Rx 1024 to 1518 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_1518_u	include/fsl_tgec.h	/^	u32	rx_1518_u;	\/* Rx 1024 to 1518 oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_1519_l	include/fsl_memac.h	/^	u32	rx_1519_l;	\/* Rx 1519 to max oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_1519_l	include/fsl_tgec.h	/^	u32	rx_1519_l;	\/* Rx 1519 to max oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_1519_u	include/fsl_memac.h	/^	u32	rx_1519_u;	\/* Rx 1519 to max oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_1519_u	include/fsl_tgec.h	/^	u32	rx_1519_u;	\/* Rx 1519 to max oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_255_l	include/fsl_memac.h	/^	u32	rx_255_l;	\/* Rx 128 to 255 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_255_l	include/fsl_tgec.h	/^	u32	rx_255_l;	\/* Rx 128 to 255 oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_255_u	include/fsl_memac.h	/^	u32	rx_255_u;	\/* Rx 128 to 255 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_255_u	include/fsl_tgec.h	/^	u32	rx_255_u;	\/* Rx 128 to 255 oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_511_l	include/fsl_memac.h	/^	u32	rx_511_l;	\/* Rx 256 to 511 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_511_l	include/fsl_tgec.h	/^	u32	rx_511_l;	\/* Rx 256 to 511 oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_511_u	include/fsl_memac.h	/^	u32	rx_511_u;	\/* Rx 256 to 511 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_511_u	include/fsl_tgec.h	/^	u32	rx_511_u;	\/* Rx 256 to 511 oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_64_l	include/fsl_memac.h	/^	u32	rx_64_l;	\/* Rx 64 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_64_l	include/fsl_tgec.h	/^	u32	rx_64_l;	\/* Rx 64 oct packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_64_u	include/fsl_memac.h	/^	u32	rx_64_u;	\/* Rx 64 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_64_u	include/fsl_tgec.h	/^	u32	rx_64_u;	\/* Rx 64 oct packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_align_err_l	include/fsl_memac.h	/^	u32	rx_align_err_l;	\/* Rx alignment error lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_align_err_l	include/fsl_tgec.h	/^	u32	rx_align_err_l;	\/* Rx alignment error lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_align_err_u	include/fsl_memac.h	/^	u32	rx_align_err_u;	\/* Rx alignment error upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_align_err_u	include/fsl_tgec.h	/^	u32	rx_align_err_u;	\/* Rx alignment error upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_almost_empty_threshold	drivers/net/altera_tse.h	/^	u32 rx_almost_empty_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
rx_almost_full_threshold	drivers/net/altera_tse.h	/^	u32 rx_almost_full_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
rx_bc	drivers/net/ftgmac100.h	/^	unsigned int	rx_bc;		\/* 0xb4 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx_bd	drivers/net/zynq_gem.c	/^	struct emac_bd *rx_bd;$/;"	m	struct:zynq_gem_priv	typeref:struct:emac_bd *	file:
rx_bd_qs_tbl_offset	drivers/qe/uec.h	/^	u32				rx_bd_qs_tbl_offset;$/;"	m	struct:uec_private	typeref:typename:u32
rx_bd_ring	drivers/net/fm/fm.h	/^	void *rx_bd_ring;		\/* Rx BD ring base *\/$/;"	m	struct:fm_eth	typeref:typename:void *
rx_bd_ring_len	drivers/qe/uec.h	/^	u16				rx_bd_ring_len;$/;"	m	struct:uec_info	typeref:typename:u16
rx_bd_ring_offset	drivers/qe/uec.h	/^	u32				rx_bd_ring_offset;$/;"	m	struct:uec_private	typeref:typename:u32
rx_brd_l	include/fsl_memac.h	/^	u32	rx_brd_l;	\/* Rx broadcast frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_brd_l	include/fsl_tgec.h	/^	u32	rx_brd_l;	\/* Rx broadcast frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_brd_u	include/fsl_memac.h	/^	u32	rx_brd_u;	\/* Rx broadcast frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_brd_u	include/fsl_tgec.h	/^	u32	rx_brd_u;	\/* Rx broadcast frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_buf	drivers/net/altera_tse.h	/^	unsigned char *rx_buf;$/;"	m	struct:altera_tse_priv	typeref:typename:unsigned char *
rx_buf	drivers/net/bcm-sf2-eth.h	/^	uint8_t *rx_buf;$/;"	m	struct:eth_dma	typeref:typename:uint8_t *
rx_buf	drivers/net/fm/fm.h	/^	void *rx_buf;			\/* Rx buffer base *\/$/;"	m	struct:fm_eth	typeref:typename:void *
rx_buf	drivers/net/pcnet.c	/^	unsigned char (*rx_buf)[RX_RING_SIZE][PKT_BUF_SZ + 4];$/;"	m	struct:pcnet_priv	typeref:typename:unsigned char (*)[]	file:
rx_buf	drivers/net/sunxi_emac.c	/^	uchar rx_buf[EMAC_RX_BUFSIZE];$/;"	m	struct:emac_eth_dev	typeref:typename:uchar[]	file:
rx_buf	drivers/spi/zynq_qspi.c	/^	void *rx_buf;$/;"	m	struct:zynq_qspi_priv	typeref:typename:void *	file:
rx_buf	drivers/tpm/tpm_tis_st33zp24_spi.c	/^	u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE];$/;"	m	struct:st33zp24_spi_phy	typeref:typename:u8[]	file:
rx_buf	drivers/usb/eth/mcs7830.c	/^	uint8_t rx_buf[MCS7830_RX_URB_SIZE];$/;"	m	struct:mcs7830_private	typeref:typename:uint8_t[]	file:
rx_buf	post/cpu/ppc4xx/ether.c	/^static char *rx_buf;$/;"	v	typeref:typename:char *	file:
rx_buf_addr	drivers/net/eepro100.c	/^	volatile u32 rx_buf_addr;	\/* void * *\/$/;"	m	struct:RxFD	typeref:typename:volatile u32	file:
rx_buf_alloc	drivers/net/sh_eth.h	/^	u8 *rx_buf_alloc;$/;"	m	struct:sh_eth_info	typeref:typename:u8 *
rx_buf_base	drivers/net/sh_eth.h	/^	u8 *rx_buf_base;$/;"	m	struct:sh_eth_info	typeref:typename:u8 *
rx_buf_end	drivers/net/ne2000_base.h	/^	int rx_buf_start, rx_buf_end;$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
rx_buf_offset	drivers/qe/uec.h	/^	u32				rx_buf_offset;$/;"	m	struct:uec_private	typeref:typename:u32
rx_buf_ptr	drivers/net/uli526x.c	/^	char *rx_buf_ptr;		\/* Data for us *\/$/;"	m	struct:rx_desc	typeref:typename:char *	file:
rx_buf_start	drivers/net/ne2000_base.h	/^	int rx_buf_start, rx_buf_end;$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
rx_buff	drivers/net/mpc512x_fec.c	/^static uchar rx_buff[FEC_BUFFER_SIZE];$/;"	v	typeref:typename:uchar[]	file:
rx_buff	drivers/net/pch_gbe.h	/^	char rx_buff[PCH_GBE_DESC_NUM][PCH_GBE_RX_FRAME_LEN];$/;"	m	struct:pch_gbe_priv	typeref:typename:char[][]
rx_buff_desc	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct rx_buff_desc {$/;"	s
rx_buff_idx	drivers/net/mpc512x_fec.c	/^static int rx_buff_idx = 0;$/;"	v	typeref:typename:int	file:
rx_buffer	drivers/net/ep93xx_eth.h	/^	void				*rx_buffer[NUMRXDESC];$/;"	m	struct:ep93xx_priv	typeref:typename:void * []
rx_buffer	drivers/net/macb.c	/^	void			*rx_buffer;$/;"	m	struct:macb_device	typeref:typename:void *	file:
rx_buffer	drivers/net/mvpp2.c	/^	u32 *rx_buffer[MVPP2_BM_LONG_BUF_NUM];$/;"	m	struct:buffer_location	typeref:typename:u32 * []	file:
rx_buffer_dma	drivers/net/macb.c	/^	unsigned long		rx_buffer_dma;$/;"	m	struct:macb_device	typeref:typename:unsigned long	file:
rx_buffers	drivers/net/mvneta.c	/^	u32 rx_buffers;$/;"	m	struct:buffer_location	typeref:typename:u32	file:
rx_buffs	drivers/net/keystone_net.c	/^static u8 rx_buffs[RX_BUFF_NUMS * RX_BUFF_LEN] __aligned(16);$/;"	v	typeref:typename:u8[RX_BUFF_NUMS * RX_BUFF_LEN]__aligned (16)	file:
rx_bytes	drivers/net/mvpp2.c	/^	u64	rx_bytes;$/;"	m	struct:mvpp2_pcpu_stats	typeref:typename:u64	file:
rx_bytes	include/linux/netdevice.h	/^	unsigned long	rx_bytes;		\/* total bytes received		*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_bytes_expected	drivers/usb/gadget/f_fastboot.c	/^static unsigned int rx_bytes_expected(struct usb_ep *ep)$/;"	f	typeref:typename:unsigned int	file:
rx_cbd	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile cbd_t *rx_cbd[RX_RING_SIZE];$/;"	v	typeref:typename:volatile cbd_t * []	file:
rx_ch	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct rx_chan_regs	*rx_ch;$/;"	m	struct:pktdma_cfg	typeref:struct:rx_chan_regs *
rx_ch_num	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			rx_ch_num;$/;"	m	struct:pktdma_cfg	typeref:typename:u32
rx_chain	drivers/net/calxedaxgmac.c	/^	struct xgmac_dma_desc rx_chain[RX_NUM_DESC];$/;"	m	struct:calxeda_eth_dev	typeref:struct:xgmac_dma_desc[]	file:
rx_chain	drivers/net/sun8i_emac.c	/^	struct emac_dma_desc rx_chain[CONFIG_TX_DESCR_NUM];$/;"	m	struct:emac_eth_dev	typeref:struct:emac_dma_desc[]	file:
rx_chan	drivers/net/cpsw.c	/^	struct cpdma_chan		rx_chan, tx_chan;$/;"	m	struct:cpsw_priv	typeref:struct:cpdma_chan	file:
rx_chan_regs	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct rx_chan_regs {$/;"	s
rx_channel	arch/arm/include/asm/arch-tegra/ivc.h	/^	struct tegra_ivc_channel_header *rx_channel;$/;"	m	struct:tegra_ivc	typeref:struct:tegra_ivc_channel_header *
rx_channel	drivers/usb/musb-new/musb_core.h	/^	struct dma_channel	*rx_channel;$/;"	m	struct:musb_hw_ep	typeref:struct:dma_channel *
rx_chnl_ctrl	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_chnl_ctrl;     \/* RX Channel Control *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_chnl_sts	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_chnl_sts;      \/* RX Status Register *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_clock	drivers/qe/uccf.h	/^	qe_clock_e	rx_clock;$/;"	m	struct:ucc_fast_info	typeref:typename:qe_clock_e
rx_cmd_pt	include/dataflash.h	/^	unsigned char *rx_cmd_pt;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned char *
rx_cmd_size	include/dataflash.h	/^	unsigned int rx_cmd_size;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned int
rx_cmd_stat	drivers/net/altera_tse.h	/^	u32 rx_cmd_stat;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
rx_cmp	drivers/spi/tegra20_sflash.c	/^	u32 rx_cmp;	\/* SPI_RX_CMP_0 register  *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
rx_cnp_l	include/fsl_memac.h	/^	u32	rx_cnp_l;	\/* Rx control packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_cnp_u	include/fsl_memac.h	/^	u32	rx_cnp_u;	\/* Rx control packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_cnt	drivers/block/sata_sil.h	/^	__le32 rx_cnt;$/;"	m	struct:sil_prb	typeref:typename:__le32
rx_cntrs	include/vsc9953.h	/^	struct vsc9953_rx_cntrs	rx_cntrs;$/;"	m	struct:vsc9953_sys_stat	typeref:struct:vsc9953_rx_cntrs
rx_coalesce_usecs	include/linux/ethtool.h	/^	__u32	rx_coalesce_usecs;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_coalesce_usecs_high	include/linux/ethtool.h	/^	__u32	rx_coalesce_usecs_high;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_coalesce_usecs_irq	include/linux/ethtool.h	/^	__u32	rx_coalesce_usecs_irq;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_coalesce_usecs_low	include/linux/ethtool.h	/^	__u32	rx_coalesce_usecs_low;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_col_lost	drivers/net/ftgmac100.h	/^	unsigned int	rx_col_lost;	\/* 0xc8 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx_complete	drivers/usb/gadget/ether.c	/^static void rx_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
rx_compressed	include/linux/netdevice.h	/^	unsigned long	rx_compressed;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_config	drivers/net/natsemi.c	/^static unsigned int rx_config;$/;"	v	typeref:typename:unsigned int	file:
rx_config	drivers/net/ns8382x.c	/^static unsigned int rx_config;$/;"	v	typeref:typename:unsigned int	file:
rx_control	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 rx_control;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
rx_crc_errors	drivers/net/greth.c	/^		    rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
rx_crc_errors	include/linux/netdevice.h	/^	unsigned long	rx_crc_errors;		\/* recved pkt with crc error	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_crcer_ftl	drivers/net/ftgmac100.h	/^	unsigned int	rx_crcer_ftl;	\/* 0xc4 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx_ct	drivers/usb/gadget/mpc8xx_udc.c	/^static int rx_ct = 0;$/;"	v	typeref:typename:int	file:
rx_ctl	drivers/net/sunxi_emac.c	/^	u32 rx_ctl;	\/* 0x3c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
rx_ctr	board/gdsys/common/cmd_ioloop.c	/^unsigned long long rx_ctr;$/;"	v	typeref:typename:unsigned long long
rx_curbuf_addr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_curbuf_addr;   \/* RX Current Buffer Address *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_curbuf_length	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_curbuf_length; \/* RX Current Buffer Length *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_curdesc_ptr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_curdesc_ptr;   \/* RX Current Descriptor Pointer *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_currdesc	drivers/net/calxedaxgmac.c	/^	u32 rx_currdesc;$/;"	m	struct:calxeda_eth_dev	typeref:typename:u32	file:
rx_currdescnum	drivers/net/ag7xxx.c	/^	u32			rx_currdescnum;$/;"	m	struct:ar7xxx_eth_priv	typeref:typename:u32	file:
rx_currdescnum	drivers/net/designware.h	/^	u32 rx_currdescnum;$/;"	m	struct:dw_eth_dev	typeref:typename:u32
rx_currdescnum	drivers/net/sun8i_emac.c	/^	u32 rx_currdescnum;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
rx_data	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		rx_data;	\/* 0x1c *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
rx_data	drivers/spi/tegra114_spi.c	/^	u32 rx_data;	\/* 01c:SPI_RX_DATA register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
rx_data	drivers/spi/tegra210_qspi.c	/^	u32 rx_data;	\/* 01c:QSPI_RX_DATA register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
rx_data	include/gdsys_fpga.h	/^	u16 rx_data;$/;"	m	struct:ihs_mdio	typeref:typename:u16
rx_data_pt	include/dataflash.h	/^	unsigned char *rx_data_pt;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned char *
rx_data_size	include/dataflash.h	/^	unsigned int rx_data_size;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned int
rx_desc	drivers/net/altera_tse.h	/^	void *rx_desc;$/;"	m	struct:altera_tse_priv	typeref:typename:void *
rx_desc	drivers/net/armada100_fec.h	/^struct rx_desc {$/;"	s
rx_desc	drivers/net/bcm-sf2-eth.h	/^	void *rx_desc;$/;"	m	struct:eth_dma	typeref:typename:void *
rx_desc	drivers/net/lpc32xx_eth.c	/^	ATTRS(4) struct lpc32xx_eth_rxdesc rx_desc[RX_BUF_COUNT];$/;"	m	struct:lpc32xx_eth_buffers	typeref:struct:lpc32xx_eth_rxdesc[]	file:
rx_desc	drivers/net/pch_gbe.h	/^	struct pch_gbe_rx_desc rx_desc[PCH_GBE_DESC_NUM];$/;"	m	struct:pch_gbe_priv	typeref:struct:pch_gbe_rx_desc[]
rx_desc	drivers/net/uli526x.c	/^struct rx_desc {$/;"	s	file:
rx_desc	drivers/usb/eth/r8152.h	/^struct rx_desc {$/;"	s
rx_desc_aligned	drivers/net/bcm-sf2-eth.h	/^	void *rx_desc_aligned;$/;"	m	struct:eth_dma	typeref:typename:void *
rx_desc_alloc	drivers/net/sh_eth.h	/^	struct rx_desc_s *rx_desc_alloc;$/;"	m	struct:sh_eth_info	typeref:struct:rx_desc_s *
rx_desc_base	drivers/net/sh_eth.h	/^	struct rx_desc_s *rx_desc_base;$/;"	m	struct:sh_eth_info	typeref:struct:rx_desc_s *
rx_desc_cur	drivers/net/sh_eth.h	/^	struct rx_desc_s *rx_desc_cur;$/;"	m	struct:sh_eth_info	typeref:struct:rx_desc_s *
rx_desc_idx	drivers/net/dwc_eth_qos.c	/^	int tx_desc_idx, rx_desc_idx;$/;"	m	struct:eqos_priv	typeref:typename:int	file:
rx_desc_p	drivers/net/greth.h	/^	volatile unsigned int rx_desc_p;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
rx_desc_p	include/grlib/greth.h	/^	volatile unsigned int rx_desc_p;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
rx_desc_s	drivers/net/sh_eth.h	/^struct rx_desc_s {$/;"	s
rx_descr_array	drivers/net/tsi108_eth.c	/^static struct dma_descriptor rx_descr_array[NUM_RX_DESC]$/;"	v	typeref:struct:dma_descriptor[]	file:
rx_descr_current	drivers/net/tsi108_eth.c	/^static struct dma_descriptor *rx_descr_current;$/;"	v	typeref:struct:dma_descriptor *	file:
rx_descriptor	drivers/net/ep93xx_eth.h	/^struct rx_descriptor {$/;"	s
rx_descriptor_queue	drivers/net/ep93xx_eth.h	/^struct rx_descriptor_queue {$/;"	s
rx_descs	drivers/net/dwc_eth_qos.c	/^	struct eqos_desc *rx_descs;$/;"	m	struct:eqos_priv	typeref:struct:eqos_desc *	file:
rx_descs	drivers/net/mvneta.c	/^	struct mvneta_rx_desc *rx_descs;$/;"	m	struct:buffer_location	typeref:struct:mvneta_rx_desc *	file:
rx_descs	drivers/net/mvpp2.c	/^	struct mvpp2_rx_desc *rx_descs;$/;"	m	struct:buffer_location	typeref:struct:mvpp2_rx_desc *	file:
rx_descs_init	drivers/net/designware.c	/^static void rx_descs_init(struct dw_eth_dev *priv)$/;"	f	typeref:typename:void	file:
rx_descs_init	drivers/net/sun8i_emac.c	/^static void rx_descs_init(struct emac_eth_dev *priv)$/;"	f	typeref:typename:void	file:
rx_detect_poll_quirk	drivers/usb/dwc3/core.h	/^	unsigned		rx_detect_poll_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
rx_detect_poll_quirk	include/dwc3-uboot.h	/^	unsigned rx_detect_poll_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
rx_dflt_fqid	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	uint32_t rx_dflt_fqid;$/;"	m	struct:ldpaa_eth_priv	typeref:typename:uint32_t
rx_diag_regs	drivers/net/tsi108_eth.c	/^#define rx_diag_regs(/;"	d	file:
rx_diag_regs	drivers/net/tsi108_eth.c	/^static void rx_diag_regs (unsigned int base)$/;"	f	typeref:typename:void	file:
rx_dma_buf	drivers/net/dwc_eth_qos.c	/^	void *rx_dma_buf;$/;"	m	struct:eqos_priv	typeref:typename:void *	file:
rx_dma_st	drivers/net/pch_gbe.h	/^	u32 rx_dma_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_double_buffered	drivers/usb/musb-new/musb_core.h	/^	bool			rx_double_buffered;$/;"	m	struct:musb_hw_ep	typeref:typename:bool
rx_dq	drivers/net/ep93xx_eth.h	/^	struct rx_descriptor_queue	rx_dq;$/;"	m	struct:ep93xx_priv	typeref:struct:rx_descriptor_queue
rx_drntp_l	include/fsl_memac.h	/^	u32	rx_drntp_l;	\/* Rx dripped not truncated packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_drntp_u	include/fsl_memac.h	/^	u32	rx_drntp_u;	\/* Rx dripped not truncated packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_drop_l	include/fsl_memac.h	/^	u32	rx_drop_l;	\/* Rx dropped packets lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_drop_l	include/fsl_tgec.h	/^	u32	rx_drop_l;	\/* Rx dropped packets lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_drop_u	include/fsl_memac.h	/^	u32	rx_drop_u;	\/* Rx dropped packets upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_drop_u	include/fsl_tgec.h	/^	u32	rx_drop_u;	\/* Rx dropped packets upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_dropped	include/linux/netdevice.h	/^	unsigned long	rx_dropped;		\/* no space in linux buffers	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_dsc_base	drivers/net/pch_gbe.h	/^	u32 rx_dsc_base;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_dsc_hw_p	drivers/net/pch_gbe.h	/^	u32 rx_dsc_hw_p;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_dsc_hw_p_hld	drivers/net/pch_gbe.h	/^	u32 rx_dsc_hw_p_hld;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_dsc_size	drivers/net/pch_gbe.h	/^	u32 rx_dsc_size;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_dsc_sw_p	drivers/net/pch_gbe.h	/^	u32 rx_dsc_sw_p;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_end	drivers/spi/designware_spi.c	/^	void *rx_end;$/;"	m	struct:dw_spi_priv	typeref:typename:void *	file:
rx_end	drivers/spi/pic32_spi.c	/^	const void		*rx_end;$/;"	m	struct:pic32_spi_priv	typeref:typename:const void *	file:
rx_endpoint	drivers/serial/usbtty.c	/^static unsigned short rx_endpoint = 0;$/;"	v	typeref:typename:unsigned short	file:
rx_eoct_l	include/fsl_memac.h	/^	u32	rx_eoct_l;	\/* Rx ethernet octests lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_eoct_l	include/fsl_tgec.h	/^	u32	rx_eoct_l;	\/* Rx ethernet octets lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_eoct_u	include/fsl_memac.h	/^	u32	rx_eoct_u;	\/* Rx ethernet octests upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_eoct_u	include/fsl_tgec.h	/^	u32	rx_eoct_u;	\/* Rx ethernet octets upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_err_index	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			rx_err_index;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
rx_err_l	include/fsl_memac.h	/^	u32	rx_err_l;	\/* Rx frame error lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_err_l	include/fsl_tgec.h	/^	u32	rx_err_l;	\/* Rx frame error lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_err_log	arch/powerpc/include/asm/ppc4xx-emac.h	/^	short rx_err_log[MAX_ERR_LOG];$/;"	m	struct:emac_stats_st	typeref:typename:short[]
rx_err_u	include/fsl_memac.h	/^	u32	rx_err_u;	\/* Rx frame error upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_err_u	include/fsl_tgec.h	/^	u32	rx_err_u;	\/* Rx frame error upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_errors	drivers/net/greth.c	/^		    rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
rx_errors	include/linux/netdevice.h	/^	unsigned long	rx_errors;		\/* bad packets received		*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_fbc	drivers/net/sunxi_emac.c	/^	u32 rx_fbc;	\/* 0x50 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
rx_fctrl	drivers/net/pch_gbe.h	/^	u32 rx_fctrl;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_fifo	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 rx_fifo;$/;"	m	struct:i2c_control	typeref:typename:u32
rx_fifo	drivers/serial/serial_xuartlite.c	/^	unsigned int rx_fifo;$/;"	m	struct:uartlite	typeref:typename:unsigned int	file:
rx_fifo	drivers/spi/pic32_spi.c	/^	void (*rx_fifo)(struct pic32_spi_priv *);$/;"	m	struct:pic32_spi_priv	typeref:typename:void (*)(struct pic32_spi_priv *)	file:
rx_fifo	drivers/spi/tegra114_spi.c	/^	u32 rx_fifo;	\/* 188:SPI_FIFO2 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
rx_fifo	drivers/spi/tegra20_sflash.c	/^	u32 rx_fifo;	\/* SPI_RX_FIFO_0 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
rx_fifo	drivers/spi/tegra20_slink.c	/^	u32 rx_fifo;	\/* SLINK_RX_FIFO_0 reg off 180h *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
rx_fifo	drivers/spi/tegra210_qspi.c	/^	u32 rx_fifo;	\/* 188:QSPI_FIFO2 register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
rx_fifo_depth	drivers/net/altera_tse.h	/^	unsigned int rx_fifo_depth;$/;"	m	struct:altera_tse_priv	typeref:typename:unsigned int
rx_fifo_errors	include/linux/netdevice.h	/^	unsigned long	rx_fifo_errors;		\/* recv'r fifo overrun		*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_fifo_st	drivers/net/pch_gbe.h	/^	u32 rx_fifo_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_fifo_sz	include/usb/dwc2_udc.h	/^	unsigned int	rx_fifo_sz;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
rx_first_buf	drivers/net/zynq_gem.c	/^	u32 rx_first_buf;$/;"	m	struct:zynq_gem_priv	typeref:typename:u32	file:
rx_fis	include/ahci.h	/^	u32	rx_fis;$/;"	m	struct:ahci_ioports	typeref:typename:u32
rx_flow	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			rx_flow; \/* flow that is used for RX *\/$/;"	m	struct:pktdma_cfg	typeref:typename:u32
rx_flow	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	rx_flow;$/;"	m	struct:rx_buff_desc	typeref:typename:u32
rx_flow	arch/arm/include/asm/ti-common/keystone_net.h	/^	int rx_flow;$/;"	m	struct:eth_priv_t	typeref:typename:int
rx_flow_ctrl	drivers/net/dwc_eth_qos.c	/^	uint32_t rx_flow_ctrl;				\/* 0x090 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
rx_flow_num	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			rx_flow_num;$/;"	m	struct:pktdma_cfg	typeref:typename:u32
rx_flow_regs	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct rx_flow_regs {$/;"	s
rx_flows	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct rx_flow_regs	*rx_flows;$/;"	m	struct:pktdma_cfg	typeref:struct:rx_flow_regs *
rx_frag_l	include/fsl_memac.h	/^	u32	rx_frag_l;	\/* Rx Fragment packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_frag_u	include/fsl_memac.h	/^	u32	rx_frag_u;	\/* Rx Fragment packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_frame_crc_err_l	include/fsl_memac.h	/^	u32	rx_frame_crc_err_l; \/* Rx frame check sequence error lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_frame_crc_err_l	include/fsl_tgec.h	/^	u32	rx_frame_crc_err_l; \/* Rx frame check sequence error lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_frame_crc_err_u	include/fsl_memac.h	/^	u32	rx_frame_crc_err_u; \/* Rx frame check sequence error upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_frame_crc_err_u	include/fsl_tgec.h	/^	u32	rx_frame_crc_err_u; \/* Rx frame check sequence error upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_frame_err_l	include/fsl_tgec.h	/^	u32	rx_frame_err_l;	\/* Rx frame length error lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_frame_err_u	include/fsl_tgec.h	/^	u32	rx_frame_err_u;	\/* Rx frame length error upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_frame_errors	drivers/net/greth.c	/^		    rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
rx_frame_errors	include/linux/netdevice.h	/^	unsigned long	rx_frame_errors;	\/* recv'd frame alignment error	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_frame_l	include/fsl_memac.h	/^	u32	rx_frame_l;	\/* Rx frame counter lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_frame_l	include/fsl_tgec.h	/^	u32	rx_frame_l;	\/* Rx frame counter lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_frame_u	include/fsl_memac.h	/^	u32	rx_frame_u;	\/* Rx frame counter upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_frame_u	include/fsl_tgec.h	/^	u32	rx_frame_u;	\/* Rx frame counter upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_frames	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int rx_frames;$/;"	m	struct:emac_stats_st	typeref:typename:int
rx_free_q	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			rx_free_q;$/;"	m	struct:pktdma_cfg	typeref:typename:u32
rx_glbl_pram_offset	drivers/qe/uec.h	/^	u32				rx_glbl_pram_offset;$/;"	m	struct:uec_private	typeref:typename:u32
rx_handler_command	drivers/usb/gadget/f_fastboot.c	/^static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
rx_handler_dl_image	drivers/usb/gadget/f_fastboot.c	/^static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
rx_hash0	drivers/net/sunxi_emac.c	/^	u32 rx_hash0;	\/* 0x40 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
rx_hash1	drivers/net/sunxi_emac.c	/^	u32 rx_hash1;	\/* 0x44 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
rx_i_index	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			rx_i_index;	\/* Receive Interrupt Queue Index *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
rx_id_delay	drivers/net/phy/ti.c	/^	int rx_id_delay;$/;"	m	struct:dp83867_private	typeref:typename:int	file:
rx_idx	arch/powerpc/cpu/mpc8260/i2c.c	/^	int rx_idx;		\/* index   to next free Rx BD *\/$/;"	m	struct:i2c_state	typeref:typename:int	file:
rx_idx	arch/powerpc/cpu/mpc8xx/i2c.c	/^	int rx_idx;		\/* index   to next free Rx BD *\/$/;"	m	struct:i2c_state	typeref:typename:int	file:
rx_idx	drivers/net/pch_gbe.h	/^	int rx_idx;$/;"	m	struct:pch_gbe_priv	typeref:typename:int
rx_idx	drivers/net/xilinx_ll_temac_sdma.c	/^static unsigned int rx_idx;	\/* index of the current RX buffer *\/$/;"	v	typeref:typename:unsigned int	file:
rx_idx	include/tsec.h	/^	uint rx_idx;	\/* index of the current RX buffer *\/$/;"	m	struct:tsec_private	typeref:typename:uint
rx_index	drivers/net/ftgmac100.c	/^	int rx_index;$/;"	m	struct:ftgmac100_data	typeref:typename:int	file:
rx_index	drivers/net/ftmac100.c	/^	int rx_index;$/;"	m	struct:ftmac100_data	typeref:typename:int	file:
rx_io_data	drivers/net/sunxi_emac.c	/^	u32 rx_io_data;	\/* 0x4c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
rx_irq_reg	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_irq_reg;       \/* RX Interrupt Register *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_jabber_l	include/fsl_memac.h	/^	u32	rx_jabber_l;	\/* Rx Jabber packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_jabber_u	include/fsl_memac.h	/^	u32	rx_jabber_u;	\/* Rx Jabber packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_jumbo_max_pending	include/linux/ethtool.h	/^	__u32	rx_jumbo_max_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
rx_jumbo_pending	include/linux/ethtool.h	/^	__u32	rx_jumbo_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
rx_last	drivers/net/e1000.c	/^static int rx_tail, rx_last;$/;"	v	typeref:typename:int	file:
rx_len	drivers/net/sunxi_emac.c	/^	s16 rx_len;$/;"	m	struct:emac_rxhdr	typeref:typename:s16	file:
rx_length_errors	drivers/net/greth.c	/^		    rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
rx_length_errors	include/linux/netdevice.h	/^	unsigned long	rx_length_errors;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_long_err_l	include/fsl_tgec.h	/^	u32	rx_long_err_l;	\/* Rx too long frame error lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_long_err_u	include/fsl_tgec.h	/^	u32	rx_long_err_u;	\/* Rx too long frame error upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_mac_descrtable	drivers/net/ag7xxx.c	/^	struct ag7xxx_dma_desc	rx_mac_descrtable[CONFIG_RX_DESCR_NUM];$/;"	m	struct:ar7xxx_eth_priv	typeref:struct:ag7xxx_dma_desc[]	file:
rx_mac_descrtable	drivers/net/designware.h	/^	struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM];$/;"	m	struct:dw_eth_dev	typeref:struct:dmamacdescr[]
rx_max	drivers/spi/designware_spi.c	/^static inline u32 rx_max(struct dw_spi_priv *priv)$/;"	f	typeref:typename:u32	file:
rx_max_coalesced_frames	include/linux/ethtool.h	/^	__u32	rx_max_coalesced_frames;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_max_coalesced_frames_high	include/linux/ethtool.h	/^	__u32	rx_max_coalesced_frames_high;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_max_coalesced_frames_irq	include/linux/ethtool.h	/^	__u32	rx_max_coalesced_frames_irq;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_max_coalesced_frames_low	include/linux/ethtool.h	/^	__u32	rx_max_coalesced_frames_low;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
rx_max_pending	include/linux/ethtool.h	/^	__u32	rx_max_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
rx_maxlen	drivers/net/cpsw.c	/^	u32	rx_maxlen;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
rx_mc	drivers/net/ftgmac100.h	/^	unsigned int	rx_mc;		\/* 0xb8 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx_mini_max_pending	include/linux/ethtool.h	/^	__u32	rx_mini_max_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
rx_mini_pending	include/linux/ethtool.h	/^	__u32	rx_mini_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
rx_missed_errors	include/linux/netdevice.h	/^	unsigned long	rx_missed_errors;	\/* receiver missed packet	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_mode	drivers/net/pch_gbe.h	/^	u32 rx_mode;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
rx_mode_bits	drivers/net/natsemi.c	/^enum rx_mode_bits {$/;"	g	file:
rx_mode_bits	drivers/net/ns8382x.c	/^enum rx_mode_bits {$/;"	g	file:
rx_mode_bits	drivers/net/rtl8139.c	/^enum rx_mode_bits {$/;"	g	file:
rx_msg	drivers/mailbox/sandbox-mbox.c	/^	uint32_t rx_msg;$/;"	m	struct:sandbox_mbox_chan	typeref:typename:uint32_t	file:
rx_msg_valid	drivers/mailbox/sandbox-mbox.c	/^	bool rx_msg_valid;$/;"	m	struct:sandbox_mbox_chan	typeref:typename:bool	file:
rx_msp_cmd	board/intercontrol/digsy_mtc/cmd_mtc.h	/^} rx_msp_cmd;$/;"	t	typeref:struct:__anonde02bb4d0208
rx_multi_l	include/fsl_memac.h	/^	u32	rx_multi_l;	\/* Rx multicast frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_multi_l	include/fsl_tgec.h	/^	u32	rx_multi_l;	\/* Rx multicast frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_multi_u	include/fsl_memac.h	/^	u32	rx_multi_u;	\/* Rx multicast frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_multi_u	include/fsl_tgec.h	/^	u32	rx_multi_u;	\/* Rx multicast frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_new	drivers/net/dc2114x.c	/^static int rx_new;                             \/* RX descriptor ring pointer *\/$/;"	v	typeref:typename:int	file:
rx_next	drivers/net/eepro100.c	/^static int rx_next;			\/* RX descriptor ring pointer *\/$/;"	v	typeref:typename:int	file:
rx_next	drivers/net/ne2000_base.h	/^	int rx_next;		\/* First free Rx page *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
rx_nxtdesc_ptr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_nxtdesc_ptr;   \/* RX Next Descriptor Pointer *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_oct_l	include/fsl_memac.h	/^	u32	rx_oct_l;	\/* Rx octests lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_oct_l	include/fsl_tgec.h	/^	u32	rx_oct_l;	\/* Rx octets lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_oct_u	include/fsl_memac.h	/^	u32	rx_oct_u;	\/* Rx octests upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_oct_u	include/fsl_tgec.h	/^	u32	rx_oct_u;	\/* Rx octets upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_over_errors	include/linux/netdevice.h	/^	unsigned long	rx_over_errors;		\/* receiver ring buff overflow	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_oversz_l	include/fsl_memac.h	/^	u32	rx_oversz_l;	\/* Rx oversized packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_oversz_u	include/fsl_memac.h	/^	u32	rx_oversz_u;	\/* Rx oversized packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_packets	drivers/net/greth.c	/^		unsigned int rx_packets,$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
rx_packets	drivers/net/mvpp2.c	/^	u64	rx_packets;$/;"	m	struct:mvpp2_pcpu_stats	typeref:typename:u64	file:
rx_packets	include/linux/netdevice.h	/^	unsigned long	rx_packets;		\/* total packets received	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
rx_pause	drivers/net/cpsw.c	/^	u32	rx_pause;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
rx_pause	include/linux/ethtool.h	/^	__u32	rx_pause;$/;"	m	struct:ethtool_pauseparam	typeref:typename:__u32
rx_pause_frame_l	include/fsl_memac.h	/^	u32	rx_pause_frame_l; \/* Rx valid pause frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_pause_frame_l	include/fsl_tgec.h	/^	u32	rx_pause_frame_l; \/* Rx valid pause frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_pause_frame_u	include/fsl_memac.h	/^	u32	rx_pause_frame_u; \/* Rx valid pause frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_pause_frame_u	include/fsl_tgec.h	/^	u32	rx_pause_frame_u; \/* Rx valid pause frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_pause_status	include/fsl_memac.h	/^	u32	rx_pause_status;	\/* Receive pause status register *\/$/;"	m	struct:memac	typeref:typename:u32
rx_pending	include/linux/ethtool.h	/^	__u32	rx_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
rx_pf_aep	drivers/net/ftgmac100.h	/^	unsigned int	rx_pf_aep;	\/* 0xbc *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx_phys	arch/powerpc/include/asm/ppc4xx-emac.h	/^    u32			rx_phys;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:u32
rx_ping	drivers/net/xilinx_emaclite.c	/^	u32 rx_ping; \/* 0x1000 - Receive Buffer *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
rx_ping_rsr	drivers/net/xilinx_emaclite.c	/^	u32 rx_ping_rsr; \/* 0x17fc - Rx status *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
rx_pkt	drivers/net/dwc_eth_qos.c	/^	void *rx_pkt;$/;"	m	struct:eqos_priv	typeref:typename:void *	file:
rx_pkt_l	include/fsl_memac.h	/^	u32	rx_pkt_l;	\/* Rx packets lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_pkt_l	include/fsl_tgec.h	/^	u32	rx_pkt_l;	\/* Rx packets lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_pkt_u	include/fsl_memac.h	/^	u32	rx_pkt_u;	\/* Rx packets upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_pkt_u	include/fsl_tgec.h	/^	u32	rx_pkt_u;	\/* Rx packets upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_pong	drivers/net/xilinx_emaclite.c	/^	u32 rx_pong; \/* 0x1800 - Receive Buffer *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
rx_pong_rsr	drivers/net/xilinx_emaclite.c	/^	u32 rx_pong_rsr; \/* 0x1ffc - Rx status *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
rx_port	drivers/net/fm/fm.h	/^	struct fm_bmi_rx_port *rx_port;$/;"	m	struct:fm_eth	typeref:struct:fm_bmi_rx_port *
rx_port_id	include/fm_eth.h	/^	u16 rx_port_id;$/;"	m	struct:fm_eth_info	typeref:typename:u16
rx_pram	drivers/net/fm/fm.h	/^	struct fm_port_global_pram *rx_pram; \/* Rx parameter table *\/$/;"	m	struct:fm_eth	typeref:struct:fm_port_global_pram *
rx_pri_map	drivers/net/cpsw.c	/^	u32	rx_pri_map;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
rx_prot_err	arch/powerpc/include/asm/ppc4xx-emac.h	/^	int rx_prot_err;$/;"	m	struct:emac_stats_st	typeref:typename:int
rx_rcv_q	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			rx_rcv_q;$/;"	m	struct:pktdma_cfg	typeref:typename:u32
rx_ready	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			rx_ready[NUM_RX_BUFF];	\/* Receive Ready Queue *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int[]
rx_ready_ptr	drivers/net/uli526x.c	/^	struct rx_desc *rx_ready_ptr;	\/* packet come pointer *\/$/;"	m	struct:uli526x_board_info	typeref:struct:rx_desc *	file:
rx_reinit	drivers/usb/musb-new/musb_core.h	/^	u8			rx_reinit;$/;"	m	struct:musb_hw_ep	typeref:typename:u8
rx_req	drivers/usb/gadget/ether.c	/^	struct usb_request	*tx_req, *rx_req;$/;"	m	struct:eth_dev	typeref:struct:usb_request *	file:
rx_reset_counter	drivers/net/enc28j60.c	/^	int			rx_reset_counter;$/;"	m	struct:enc_device	typeref:typename:int	file:
rx_resp	drivers/net/altera_tse.h	/^	void *rx_resp;$/;"	m	struct:altera_tse_priv	typeref:typename:void *
rx_ring	drivers/net/dc2114x.c	/^static struct de4x5_desc rx_ring[NUM_RX_DESC] __attribute__ ((aligned(32))); \/* RX descriptor r/;"	v	typeref:struct:de4x5_desc[]	file:
rx_ring	drivers/net/eepro100.c	/^static struct RxFD rx_ring[NUM_RX_DESC];	\/* RX descriptor ring	      *\/$/;"	v	typeref:struct:RxFD[]	file:
rx_ring	drivers/net/macb.c	/^	struct macb_dma_desc	*rx_ring;$/;"	m	struct:macb_device	typeref:struct:macb_dma_desc *	file:
rx_ring	drivers/net/pcnet.c	/^	struct pcnet_rx_head rx_ring[RX_RING_SIZE];$/;"	m	struct:pcnet_uncached_priv	typeref:struct:pcnet_rx_head[]	file:
rx_ring	drivers/net/pcnet.c	/^	u32 rx_ring;$/;"	m	struct:pcnet_init_block	typeref:typename:u32	file:
rx_ring	drivers/net/rtl8139.c	/^static unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));$/;"	v	typeref:typename:unsigned char[]	file:
rx_ring_dma	drivers/net/macb.c	/^	unsigned long		rx_ring_dma;$/;"	m	struct:macb_device	typeref:typename:unsigned long	file:
rx_ring_size	drivers/net/mvneta.c	/^	u16 rx_ring_size;$/;"	m	struct:mvneta_port	typeref:typename:u16	file:
rx_ring_size	drivers/net/mvpp2.c	/^	u16 rx_ring_size;$/;"	m	struct:mvpp2_port	typeref:typename:u16	file:
rx_runt	drivers/net/ftgmac100.h	/^	unsigned int	rx_runt;	\/* 0xc0 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rx_sel_empty_threshold	drivers/net/altera_tse.h	/^	u32 rx_sel_empty_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
rx_sel_full_threshold	drivers/net/altera_tse.h	/^	u32 rx_sel_full_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
rx_slot	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			rx_slot;	\/* MAL Receive Slot *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
rx_sq	drivers/net/ep93xx_eth.h	/^	struct rx_status_queue		rx_sq;$/;"	m	struct:ep93xx_priv	typeref:struct:rx_status_queue
rx_sta	drivers/net/sunxi_emac.c	/^	u32 rx_sta;	\/* 0x48 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
rx_stat	drivers/net/lpc32xx_eth.c	/^	ATTRS(8) struct lpc32xx_eth_rxstat rx_stat[RX_BUF_COUNT];$/;"	m	struct:lpc32xx_eth_buffers	typeref:struct:lpc32xx_eth_rxstat[]	file:
rx_status	drivers/net/dm9000x.c	/^	void (*rx_status)(u16 *RxStatus, u16 *RxLen);$/;"	m	struct:board_info	typeref:typename:void (*)(u16 * RxStatus,u16 * RxLen)	file:
rx_status	drivers/net/ep93xx_eth.h	/^struct rx_status {$/;"	s
rx_status	drivers/net/sunxi_emac.c	/^	u16 rx_status;$/;"	m	struct:emac_rxhdr	typeref:typename:u16	file:
rx_status_queue	drivers/net/ep93xx_eth.h	/^struct rx_status_queue {$/;"	s
rx_submit	drivers/usb/gadget/ether.c	/^static int rx_submit(struct eth_dev *dev, struct usb_request *req,$/;"	f	typeref:typename:int	file:
rx_tail	drivers/net/e1000.c	/^static int rx_tail, rx_last;$/;"	v	typeref:typename:int	file:
rx_tail	drivers/net/macb.c	/^	unsigned int		rx_tail;$/;"	m	struct:macb_device	typeref:typename:unsigned int	file:
rx_taildesc_ptr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE rx_taildesc_ptr;  \/* RX Tail Descriptor Pointer *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
rx_timeout	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned short			rx_timeout;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned short
rx_tx_control	include/gdsys_fpga.h	/^	u16 rx_tx_control;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
rx_tx_status	include/gdsys_fpga.h	/^	u16 rx_tx_status;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
rx_u_index	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			rx_u_index;	\/* Receive User Queue Index *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
rx_undsz_l	include/fsl_memac.h	/^	u32	rx_undsz_l;	\/* Rx undersized packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_undsz_u	include/fsl_memac.h	/^	u32	rx_undsz_u;	\/* Rx undersized packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_uni_l	include/fsl_memac.h	/^	u32	rx_uni_l;	\/* Rx unicast frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_uni_l	include/fsl_tgec.h	/^	u32	rx_uni_l;	\/* Rx unicast frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_uni_u	include/fsl_memac.h	/^	u32	rx_uni_u;	\/* Rx unicast frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_uni_u	include/fsl_tgec.h	/^	u32	rx_uni_u;	\/* Rx unicast frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_urb_size	drivers/usb/eth/asix88179.c	/^	int rx_urb_size;$/;"	m	struct:asix_private	typeref:typename:int	file:
rx_urb_size	drivers/usb/eth/smsc95xx.c	/^	size_t rx_urb_size;  \/* maximum USB URB size *\/$/;"	m	struct:smsc95xx_private	typeref:typename:size_t	file:
rx_vlan_l	include/fsl_memac.h	/^	u32	rx_vlan_l;	\/* Rx VLAN frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
rx_vlan_l	include/fsl_tgec.h	/^	u32	rx_vlan_l;	\/* Rx VLAN frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_vlan_u	include/fsl_memac.h	/^	u32	rx_vlan_u;	\/* Rx VLAN frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
rx_vlan_u	include/fsl_tgec.h	/^	u32	rx_vlan_u;	\/* Rx VLAN frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
rx_words_eob	drivers/net/pch_gbe.h	/^	u16 rx_words_eob;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u16
rxactive	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	rxactive;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
rxb	drivers/i2c/lpc32xx_i2c.c	/^	u32 rxb;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
rxb	drivers/net/natsemi.c	/^static unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE]$/;"	v	typeref:typename:unsigned char[]	file:
rxb	drivers/net/ns8382x.c	/^static unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE]$/;"	v	typeref:typename:unsigned char[]	file:
rxb	include/sja1000.h	/^	u8 rxb[10];$/;"	m	struct:sja1000_basic_s	typeref:typename:u8[10]
rxba	drivers/net/ftmac110.h	/^	uint32_t rxba;   \/* 0x24: Rx Ring Base Address Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
rxbca	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxbca;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxbd	arch/m68k/include/asm/fec.h	/^	cbd_t *rxbd;		\/* Rx BD *\/$/;"	m	struct:fec_info_s	typeref:typename:cbd_t *
rxbd	arch/m68k/include/asm/fsl_mcdmafec.h	/^	cbd_t *rxbd;		\/* Rx BD *\/$/;"	m	struct:fec_info_dma	typeref:typename:cbd_t *
rxbd	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		cbd_t rxbd[ELBT_NRXBD];$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:cbd_t[]	file:
rxbd	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^    cbd_t rxbd[PKTBUFSRX];$/;"	m	struct:rtxbd	typeref:typename:cbd_t[]	file:
rxbd	arch/powerpc/cpu/mpc8260/ether_scc.c	/^    cbd_t rxbd[PKTBUFSRX];         \/* Rx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
rxbd	arch/powerpc/cpu/mpc8260/i2c.c	/^	void *rxbd;		\/* pointer to next free Rx BD *\/$/;"	m	struct:i2c_state	typeref:typename:void *	file:
rxbd	arch/powerpc/cpu/mpc8260/serial_smc.c	/^	cbd_t	rxbd;		\/* Rx BD *\/$/;"	m	struct:serialbuffer	typeref:typename:cbd_t	file:
rxbd	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^    cbd_t rxbd[PKTBUFSRX];$/;"	m	struct:rtxbd	typeref:typename:cbd_t[]	file:
rxbd	arch/powerpc/cpu/mpc8xx/fec.c	/^    cbd_t rxbd[PKTBUFSRX];		\/* Rx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
rxbd	arch/powerpc/cpu/mpc8xx/i2c.c	/^	void *rxbd;		\/* pointer to next free Rx BD *\/$/;"	m	struct:i2c_state	typeref:typename:void *	file:
rxbd	arch/powerpc/cpu/mpc8xx/scc.c	/^    cbd_t rxbd[PKTBUFSRX];	\/* Rx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
rxbd	arch/powerpc/cpu/mpc8xx/serial.c	/^	cbd_t	rxbd;		\/* Rx BD *\/$/;"	m	struct:serialbuffer	typeref:typename:cbd_t	file:
rxbd	include/tsec.h	/^	struct rxbd8 __iomem rxbd[PKTBUFSRX];$/;"	m	struct:tsec_private	typeref:struct:rxbd8 __iomem[]
rxbd	post/cpu/mpc8xx/ether.c	/^	cbd_t rxbd[PKTBUFSRX];		\/* Rx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
rxbd8	include/tsec.h	/^struct rxbd8 {$/;"	s
rxbd_base	drivers/net/greth.c	/^	greth_bd *rxbd_base, *rxbd_max;$/;"	m	struct:__anonb53b88540108	typeref:typename:greth_bd *	file:
rxbd_curr	drivers/net/greth.c	/^	greth_bd *rxbd_curr;$/;"	m	struct:__anonb53b88540108	typeref:typename:greth_bd *	file:
rxbd_current	drivers/net/zynq_gem.c	/^	u32 rxbd_current;$/;"	m	struct:zynq_gem_priv	typeref:typename:u32	file:
rxbd_max	drivers/net/greth.c	/^	greth_bd *rxbd_base, *rxbd_max;$/;"	m	struct:__anonb53b88540108	typeref:typename:greth_bd *	file:
rxbistpd	drivers/block/sata_dwc.c	/^	u32 rxbistpd;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
rxbistpd1	drivers/block/sata_dwc.c	/^	u32 rxbistpd1;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
rxbistpd2	drivers/block/sata_dwc.c	/^	u32 rxbistpd2;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
rxbok	drivers/qe/uec.h	/^	u32 rxbok;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rxbok	include/linux/immap_qe.h	/^	u32 rxbok;		\/* Total number of octets received OK *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rxbuf	arch/arm/include/asm/arch-tegra/usb.h	/^	uint rxbuf;$/;"	m	struct:usb_ctlr	typeref:typename:uint
rxbuf	arch/powerpc/cpu/mpc8260/serial_smc.c	/^	volatile uchar	rxbuf[CONFIG_SYS_SMC_RXBUFLEN];\/* rx buffers *\/$/;"	m	struct:serialbuffer	typeref:typename:volatile uchar[]	file:
rxbuf	arch/powerpc/cpu/mpc8260/spi.c	/^static uchar *rxbuf =$/;"	v	typeref:typename:uchar *	file:
rxbuf	arch/powerpc/cpu/mpc8xx/serial.c	/^	volatile uchar	rxbuf[CONFIG_SYS_SMC_RXBUFLEN];\/* rx buffers *\/$/;"	m	struct:serialbuffer	typeref:typename:volatile uchar[]	file:
rxbuf	arch/powerpc/cpu/mpc8xx/spi.c	/^static uchar *rxbuf =$/;"	v	typeref:typename:uchar *	file:
rxbuf	drivers/net/bfin_mac.c	/^static ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];$/;"	v	typeref:typename:ADI_ETHER_BUFFER * []	file:
rxbuf	include/usb_ether.h	/^	uint8_t *rxbuf;$/;"	m	struct:ueth_data	typeref:typename:uint8_t *
rxbuf_base	drivers/net/greth.c	/^	void *rxbuf_base;	\/* (GRETH_RXBUF_SIZE+ALIGNBYTES) * GRETH_RXBD_CNT *\/$/;"	m	struct:__anonb53b88540108	typeref:typename:void *	file:
rxbuffer	drivers/net/calxedaxgmac.c	/^	char rxbuffer[RX_BUF_SZ];$/;"	m	struct:calxeda_eth_dev	typeref:typename:char[]	file:
rxbuffers	drivers/net/zynq_gem.c	/^	char *rxbuffers;$/;"	m	struct:zynq_gem_priv	typeref:typename:char *	file:
rxbufs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uchar rxbufs[ELBT_NRXBD][ELBT_BUFSZ];$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uchar[][]	file:
rxbufthrshld	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxbufthrshld;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxcdp	drivers/net/armada100_fec.h	/^	struct rx_desc *rxcdp[4];	\/* Ethernet Current Rx Descriptor$/;"	m	struct:armdfec_reg	typeref:struct:rx_desc * [4]
rxcdp	drivers/net/mvgbe.h	/^	struct mvgbe_rxcdp rxcdp[7];$/;"	m	struct:mvgbe_registers	typeref:struct:mvgbe_rxcdp[7]
rxcdp	drivers/net/mvgbe.h	/^	struct mvgbe_rxdesc *rxcdp;$/;"	m	struct:mvgbe_rxcdp	typeref:struct:mvgbe_rxdesc *
rxcdp7	drivers/net/mvgbe.h	/^	struct mvgbe_rxdesc *rxcdp7;$/;"	m	struct:mvgbe_registers	typeref:struct:mvgbe_rxdesc *
rxcdp_pad	drivers/net/mvgbe.h	/^	u32 rxcdp_pad[3];$/;"	m	struct:mvgbe_rxcdp	typeref:typename:u32[3]
rxcf	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rxcf;		\/* RX Control Frame Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rxcf	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rxcf;		\/* 0x246b0 - Receive Control Frame Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rxcf	include/fsl_dtsec.h	/^	u32	rxcf;		\/* Receive control frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
rxcf	include/tsec.h	/^	u32	rxcf;		\/* Receive Control Frame Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rxconsumeindex	drivers/net/lpc32xx_eth.c	/^	u32 rxconsumeindex;	\/* tail of rx desc fifo *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxcount	drivers/usb/musb/musb_core.h	/^	u16	rxcount;$/;"	m	struct:musb_epN_regs	typeref:typename:u16
rxcount	drivers/usb/musb/musb_core.h	/^	u16	rxcount;$/;"	m	struct:musb_regs	typeref:typename:u16
rxcsr	drivers/usb/musb-new/musb_core.h	/^	u16 txmaxp, txcsr, rxmaxp, rxcsr;$/;"	m	struct:musb_csr_regs	typeref:typename:u16
rxcsr	drivers/usb/musb/musb_core.h	/^	u16	rxcsr;$/;"	m	struct:musb_epN_regs	typeref:typename:u16
rxcsr	drivers/usb/musb/musb_core.h	/^	u16	rxcsr;$/;"	m	struct:musb_regs	typeref:typename:u16
rxctl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxctl;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxd	drivers/net/ftmac110.c	/^	struct ftmac110_desc *rxd;$/;"	m	struct:ftmac110_chip	typeref:struct:ftmac110_desc *	file:
rxd	drivers/net/natsemi.c	/^static BufferDesc rxd[NUM_RX_DESC] __attribute__ ((aligned(4)));$/;"	v	typeref:typename:BufferDesc[]	file:
rxd	drivers/net/ns8382x.c	/^static BufferDesc rxd[NUM_RX_DESC] __attribute__ ((aligned(8)));$/;"	v	typeref:typename:BufferDesc[]	file:
rxd	drivers/serial/serial_mxc.c	/^	u32 rxd;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
rxd	include/i2s.h	/^	unsigned int rxd;	\/* Receive Data Register *\/$/;"	m	struct:i2s_reg	typeref:typename:unsigned int
rxd_dma	drivers/net/ftmac110.c	/^	ulong                rxd_dma;$/;"	m	struct:ftmac110_chip	typeref:typename:ulong	file:
rxd_idx	drivers/net/ftmac110.c	/^	uint32_t             rxd_idx;$/;"	m	struct:ftmac110_chip	typeref:typename:uint32_t	file:
rxd_idx	drivers/net/pic32_eth.c	/^	u32 rxd_idx; \/* index of RX desc to read *\/$/;"	m	struct:pic32eth_dev	typeref:typename:u32	file:
rxd_ring	drivers/net/pic32_eth.c	/^	struct eth_dma_desc rxd_ring[MAX_RX_DESCR];$/;"	m	struct:pic32eth_dev	typeref:struct:eth_dma_desc[]	file:
rxdata	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 rxdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
rxdata	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 rxdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
rxdata	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 rxdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
rxdata	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 rxdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
rxdata	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 rxdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
rxdata	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 rxdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
rxdata	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 rxdata[8];$/;"	m	struct:i2c_regs	typeref:typename:u32[8]
rxdata	drivers/net/rtl8169.c	/^static unsigned char rxdata[RX_BUF_LEN];$/;"	v	typeref:typename:unsigned char[]	file:
rxdata	drivers/serial/altera_uart.c	/^	u32	rxdata;		\/* Rx data reg *\/$/;"	m	struct:altera_uart_regs	typeref:typename:u32	file:
rxdata	drivers/spi/altera_spi.c	/^	u32	rxdata;$/;"	m	struct:altera_spi_regs	typeref:typename:u32	file:
rxdata	drivers/usb/gadget/f_thor.h	/^	unsigned char rxdata;$/;"	m	struct:thor_dev	typeref:typename:unsigned char
rxdes	drivers/net/ftgmac100.c	/^	struct ftgmac100_rxdes *rxdes;$/;"	m	struct:ftgmac100_data	typeref:struct:ftgmac100_rxdes *	file:
rxdes	drivers/net/ftmac100.c	/^	struct ftmac100_rxdes rxdes[PKTBUFSRX];$/;"	m	struct:ftmac100_data	typeref:struct:ftmac100_rxdes[]	file:
rxdes0	drivers/net/ftgmac100.h	/^	unsigned int	rxdes0;$/;"	m	struct:ftgmac100_rxdes	typeref:typename:unsigned int
rxdes0	drivers/net/ftmac100.h	/^	unsigned int	rxdes0;$/;"	m	struct:ftmac100_rxdes	typeref:typename:unsigned int
rxdes1	drivers/net/ftgmac100.h	/^	unsigned int	rxdes1;$/;"	m	struct:ftgmac100_rxdes	typeref:typename:unsigned int
rxdes1	drivers/net/ftmac100.h	/^	unsigned int	rxdes1;$/;"	m	struct:ftmac100_rxdes	typeref:typename:unsigned int
rxdes2	drivers/net/ftgmac100.h	/^	unsigned int	rxdes2;	\/* not used by HW *\/$/;"	m	struct:ftgmac100_rxdes	typeref:typename:unsigned int
rxdes2	drivers/net/ftmac100.h	/^	unsigned int	rxdes2;	\/* RXBUF_BADR *\/$/;"	m	struct:ftmac100_rxdes	typeref:typename:unsigned int
rxdes3	drivers/net/ftgmac100.h	/^	unsigned int	rxdes3;	\/* RXBUF_BADR *\/$/;"	m	struct:ftgmac100_rxdes	typeref:typename:unsigned int
rxdes3	drivers/net/ftmac100.h	/^	unsigned int	rxdes3;	\/* not used by HW *\/$/;"	m	struct:ftmac100_rxdes	typeref:typename:unsigned int
rxdes_dma	drivers/net/ftgmac100.c	/^	ulong rxdes_dma;$/;"	m	struct:ftgmac100_data	typeref:typename:ulong	file:
rxdesclist	drivers/net/calxedaxgmac.c	/^	u32 rxdesclist;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
rxdesclistaddr	drivers/net/designware.h	/^	u32 rxdesclistaddr;	\/* 0x0c *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
rxdescriptor	drivers/net/lpc32xx_eth.c	/^	u32 rxdescriptor;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxdescriptornumber	drivers/net/lpc32xx_eth.c	/^	u32 rxdescriptornumber;	\/* actually, number MINUS ONE *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxdiv_cnt	arch/blackfin/include/asm/serial4.h	/^	u32 rxdiv_cnt;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
rxdq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct mac_queue rxdq;$/;"	m	struct:mac_regs	typeref:struct:mac_queue
rxdqenq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxdqenq;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxdr	drivers/spi/rk_spi.h	/^	u32 rxdr[0x100];	\/* 0x800 *\/$/;"	m	struct:rockchip_spi	typeref:typename:u32[0x100]
rxdr	drivers/spi/zynq_spi.c	/^	u32 rxdr;	\/* 0x20 *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
rxdthrshld	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxdthrshld;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxdy_gated_en	drivers/usb/eth/r8152.c	/^static void rxdy_gated_en(struct r8152 *tp, bool enable)$/;"	f	typeref:typename:void	file:
rxeacc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		elbt_rxeacc rxeacc;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:elbt_rxeacc	file:
rxeacc_descs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static elbt_prdesc rxeacc_descs[] = {$/;"	v	typeref:typename:elbt_prdesc[]	file:
rxeacc_ndesc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static int rxeacc_ndesc = ARRAY_SIZE(rxeacc_descs);$/;"	v	typeref:typename:int	file:
rxep_bitmap	drivers/usb/musb-new/musb_dsps.c	/^	u32		rxep_bitmap;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
rxep_mask	drivers/usb/musb-new/musb_dsps.c	/^	u32		rxep_mask;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
rxep_shift	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	rxep_shift:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
rxerrc	drivers/net/e1000.h	/^	uint64_t rxerrc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
rxerrs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		ushort rxerrs[ELBT_MAXRXERR], txerrs[ELBT_MAXTXERR];$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:ushort[]	file:
rxfc	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic rxfc; \/* 0xa0 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
rxfdp	drivers/net/armada100_fec.h	/^	struct rx_desc *rxfdp[4];	\/* Ethernet First Rx Descriptor$/;"	m	struct:armdfec_reg	typeref:struct:rx_desc * [4]
rxfifo	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	rxfifo;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
rxfifo	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	rxfifo;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
rxfifoadd	drivers/usb/musb-new/musb_core.h	/^	u16 rxfifoadd, txfifoadd;$/;"	m	struct:musb_csr_regs	typeref:typename:u16
rxfifoadd	drivers/usb/musb/musb_core.h	/^	u16	rxfifoadd;$/;"	m	struct:musb_regs	typeref:typename:u16
rxfifosz	drivers/usb/musb-new/musb_core.h	/^	u8 rxfifosz, txfifosz;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
rxfifosz	drivers/usb/musb/musb_core.h	/^	u8	rxfifosz;$/;"	m	struct:musb_regs	typeref:typename:u8
rxfilterctrl	drivers/net/lpc32xx_eth.c	/^	u32 rxfilterctrl;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxfilterwolclear	drivers/net/lpc32xx_eth.c	/^	u32 rxfilterwolclear;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxfilterwolstatus	drivers/net/lpc32xx_eth.c	/^	u32 rxfilterwolstatus;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxfl	drivers/i2c/lpc32xx_i2c.c	/^	u32 rxfl;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
rxflr	drivers/spi/rk_spi.h	/^	u32 rxflr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
rxfok	drivers/qe/uec.h	/^	u32 rxfok;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
rxfok	include/linux/immap_qe.h	/^	u32 rxfok;		\/* Total number of frames received OK *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
rxfree	drivers/net/cpsw.c	/^	void			*hdp, *cp, *rxfree;$/;"	m	struct:cpdma_chan	typeref:typename:void *	file:
rxftlr	drivers/spi/rk_spi.h	/^	u32 rxftlr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
rxftr	drivers/spi/zynq_qspi.c	/^	u32 rxftr;	\/* 0x2C *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
rxfunaddr	drivers/usb/musb-new/musb_core.h	/^	u8 rxfunaddr, rxhubaddr, rxhubport;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
rxfuncaddr	drivers/usb/musb/musb_core.h	/^		u8	rxfuncaddr;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
rxgmsk	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 rxgmsk;		\/* 0x10 Rx Global Mask *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
rxgstpack	drivers/qe/uec.h	/^	u8   rxgstpack;           \/* ack on GRACEFUL STOP RX command *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u8
rxhand_f	include/net.h	/^typedef void rxhand_f(uchar *pkt, unsigned dport,$/;"	t	typeref:typename:void ()(uchar * pkt,unsigned dport,struct in_addr sip,unsigned sport,unsigned len)
rxhand_icmp_f	include/net.h	/^typedef void rxhand_icmp_f(unsigned type, unsigned code, unsigned dport,$/;"	t	typeref:typename:void ()(unsigned type,unsigned code,unsigned dport,struct in_addr sip,unsigned sport,uchar * pkt,unsigned len)
rxhubaddr	drivers/usb/musb-new/musb_core.h	/^	u8 rxfunaddr, rxhubaddr, rxhubport;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
rxhubaddr	drivers/usb/musb/musb_core.h	/^		u8	rxhubaddr;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
rxhubport	drivers/usb/musb-new/musb_core.h	/^	u8 rxfunaddr, rxhubaddr, rxhubport;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
rxhubport	drivers/usb/musb/musb_core.h	/^		u8	rxhubport;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
rxic	arch/powerpc/include/asm/immap_86xx.h	/^	uint    rxic;           \/* 0x24310 - Receive Interrupt Coalecing Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rxim	arch/m68k/include/asm/immap_5227x.h	/^	can_msg_t rxim[16];	\/* 0x800 Rx Individual Mask 0-15 *\/$/;"	m	struct:canex_ctrl	typeref:typename:can_msg_t[16]
rxindex	arch/powerpc/cpu/mpc8260/serial_smc.c	/^	uint	rxindex;	\/* index for next character to read *\/$/;"	m	struct:serialbuffer	typeref:typename:uint	file:
rxindex	arch/powerpc/cpu/mpc8xx/serial.c	/^	uint	rxindex;	\/* index for next character to read *\/$/;"	m	struct:serialbuffer	typeref:typename:uint	file:
rxinterval	drivers/usb/musb-new/musb_core.h	/^	u8 txtype, txinterval, rxtype, rxinterval;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
rxinterval	drivers/usb/musb/musb_core.h	/^	u8	rxinterval;$/;"	m	struct:musb_epN_regs	typeref:typename:u8
rxinterval	drivers/usb/musb/musb_core.h	/^	u8	rxinterval;$/;"	m	struct:musb_regs	typeref:typename:u8
rxlen	include/usb_ether.h	/^	int rxlen;			\/* Total bytes available in rxbuf *\/$/;"	m	struct:ueth_data	typeref:typename:int
rxmaxp	drivers/usb/musb-new/musb_core.h	/^	u16 txmaxp, txcsr, rxmaxp, rxcsr;$/;"	m	struct:musb_csr_regs	typeref:typename:u16
rxmaxp	drivers/usb/musb/musb_core.h	/^	u16	rxmaxp;$/;"	m	struct:musb_epN_regs	typeref:typename:u16
rxmaxp	drivers/usb/musb/musb_core.h	/^	u16	rxmaxp;$/;"	m	struct:musb_regs	typeref:typename:u16
rxmissnct	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxmissnct;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxmode	drivers/usb/musb/am35x.h	/^	u32	rxmode;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
rxpd	drivers/net/ftgmac100.h	/^	unsigned int	rxpd;		\/* 0x1c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rxpd	drivers/net/ftmac100.h	/^	unsigned int	rxpd;		\/* 0x1c *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
rxpd	drivers/net/ftmac110.h	/^	uint32_t rxpd;   \/* 0x1c: Rx Poll Demand Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
rxpf	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rxpf;		\/* RX Pause Frame Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rxpf	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rxpf;		\/* 0x246b4 - Receive Pause Frame Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rxpf	include/fsl_dtsec.h	/^	u32	rxpf;		\/* Receive pause frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
rxpf	include/tsec.h	/^	u32	rxpf;		\/* Receive Pause Frame Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rxpoll	drivers/net/calxedaxgmac.c	/^	u32 rxpoll;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
rxpolldemand	drivers/net/designware.h	/^	u32 rxpolldemand;	\/* 0x08 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
rxpp	drivers/net/xilinx_emaclite.c	/^	u32 rxpp;		\/* RX ping pong buffer *\/$/;"	m	struct:xemaclite	typeref:typename:u32	file:
rxproduceindex	drivers/net/lpc32xx_eth.c	/^	u32 rxproduceindex;	\/* head of rx desc fifo *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxptr	include/usb_ether.h	/^	int rxptr;			\/* Current position in rxbuf *\/$/;"	m	struct:ueth_data	typeref:typename:int
rxq0_debug	drivers/net/dwc_eth_qos.c	/^	uint32_t rxq0_debug;				\/* 0xd38 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
rxq0_operation_mode	drivers/net/dwc_eth_qos.c	/^	uint32_t rxq0_operation_mode;			\/* 0xd30 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
rxq_ctrl0	drivers/net/dwc_eth_qos.c	/^	uint32_t rxq_ctrl0;				\/* 0x0a0 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
rxq_ctrl2	drivers/net/dwc_eth_qos.c	/^	uint32_t rxq_ctrl2;				\/* 0x0a8 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
rxq_def	drivers/net/mvneta.c	/^static int rxq_def;$/;"	v	typeref:typename:int	file:
rxq_number	drivers/net/mvneta.c	/^static int rxq_number = 1;$/;"	v	typeref:typename:int	file:
rxq_number	drivers/net/mvpp2.c	/^static int rxq_number = MVPP2_DEFAULT_RXQ;$/;"	v	typeref:typename:int	file:
rxqbase	drivers/net/zynq_gem.c	/^	u32 rxqbase; \/* 0x18 - RX Q Base address reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
rxqd	drivers/net/fm/fm.h	/^	struct fm_port_qd rxqd;	\/* Rx queue descriptor *\/$/;"	m	struct:fm_port_global_pram	typeref:struct:fm_port_qd
rxqd_bsy_cnt	drivers/net/fm/fm.h	/^	u16 rxqd_bsy_cnt;	\/* RxQD busy counter, should be cleared *\/$/;"	m	struct:fm_port_global_pram	typeref:typename:u16
rxqd_ptr	drivers/net/fm/fm.h	/^	u32 rxqd_ptr;	\/* Rx queue descriptor pointer *\/$/;"	m	struct:fm_port_global_pram	typeref:typename:u32
rxqs	drivers/net/mvneta.c	/^	struct mvneta_rx_queue *rxqs;$/;"	m	struct:mvneta_port	typeref:struct:mvneta_rx_queue *	file:
rxqs	drivers/net/mvpp2.c	/^	struct mvpp2_rx_queue **rxqs;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2_rx_queue **	file:
rxr_badr	drivers/net/ftgmac100.h	/^	unsigned int	rxr_badr;	\/* 0x24 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rxr_badr	drivers/net/ftmac100.h	/^	unsigned int	rxr_badr;	\/* 0x24 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
rxr_ptr	drivers/net/ftgmac100.h	/^	unsigned int	rxr_ptr;	\/* 0x98 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
rxrmonbaseptr	drivers/qe/uec.h	/^	u32  rxrmonbaseptr;       \/* Rx RMON statistics base *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u32
rxruntcnt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxruntcnt;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxsize	include/usb_ether.h	/^	int rxsize;$/;"	m	struct:ueth_data	typeref:typename:int
rxsr	drivers/net/zynq_gem.c	/^	u32 rxsr; \/* 0x20 - RX Status reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
rxst	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic rxst; \/* 0x30 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
rxstate	drivers/usb/musb-new/musb_gadget.c	/^static void rxstate(struct musb *musb, struct musb_request *req)$/;"	f	typeref:typename:void	file:
rxstatus	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int rxstatus;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
rxstatus	drivers/net/lpc32xx_eth.c	/^	u32 rxstatus;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
rxstsq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct mac_queue rxstsq;$/;"	m	struct:mac_regs	typeref:struct:mac_queue
rxstsqenq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxstsqenq;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxststhrshld	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t rxststhrshld;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
rxthread	drivers/qe/uec.h	/^	u32  rxthread[MAX_ENET_INIT_PARAM_ENTRIES_RX]; \/* rx threads *\/$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u32[]
rxtype	drivers/usb/musb-new/musb_core.h	/^	u8 txtype, txinterval, rxtype, rxinterval;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
rxtype	drivers/usb/musb/musb_core.h	/^	u8	rxtype;$/;"	m	struct:musb_epN_regs	typeref:typename:u8
rxtype	drivers/usb/musb/musb_core.h	/^	u8	rxtype;$/;"	m	struct:musb_regs	typeref:typename:u8
rxuo	arch/powerpc/include/asm/immap_85xx.h	/^	u32	rxuo;		\/* RX Unknown OP Code Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
rxuo	arch/powerpc/include/asm/immap_86xx.h	/^	uint	rxuo;		\/* 0x246b8 - Receive Unknown OP Code Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
rxuo	include/fsl_dtsec.h	/^	u32	rxuo;		\/* Receive unknown OP code *\/$/;"	m	struct:dtsec	typeref:typename:u32
rxuo	include/tsec.h	/^	u32	rxuo;		\/* Receive Unknown OP Code *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
rxuptr	include/usb/mpc8xx_udc.h	/^	ushort rxuptr;	\/* Rx microcode return address temp *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:ushort
rxusb	include/usb/mpc8xx_udc.h	/^	uint rxusb;	\/* Rx Data Temp *\/$/;"	m	struct:mpc8xx_parameter_ram	typeref:typename:uint
rxwm	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic rxwm; \/* 0xb0 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
rxzlp	include/usb/fotg210.h	/^	uint32_t rxzlp; \/* 0x150: Receive Zero-Length-Packet Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
s	arch/arc/lib/libgcc2.h	/^	struct DWstruct s;$/;"	m	union:__anon4bd294e9010a	typeref:struct:DWstruct
s	arch/arm/include/asm/setup.h	/^	} s;$/;"	m	union:param_struct::__anon61e8c52b010a	typeref:struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208
s	arch/arm/include/asm/setup.h	/^	} s;$/;"	m	union:param_struct::__anon61e8c52b030a	typeref:struct:param_struct::__anon61e8c52b030a::__anon61e8c52b0408
s	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned char			s;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned char
s	arch/blackfin/lib/muldi3.c	/^	struct DIstruct s;$/;"	m	union:__anonc48de1c0010a	typeref:struct:DIstruct	file:
s	arch/m68k/lib/ashldi3.c	/^  struct DIstruct s;$/;"	m	union:__anonebfd3a86010a	typeref:struct:DIstruct	file:
s	arch/m68k/lib/lshrdi3.c	/^  struct DIstruct s;$/;"	m	union:__anonfb550957010a	typeref:struct:DIstruct	file:
s	arch/m68k/lib/muldi3.c	/^	struct DIstruct s;$/;"	m	union:__anon962d2c0c010a	typeref:struct:DIstruct	file:
s	arch/microblaze/lib/muldi3.c	/^	struct DIstruct s;$/;"	m	union:__anon8848586e010a	typeref:struct:DIstruct	file:
s	arch/mips/lib/libgcc.h	/^	struct DWstruct s;$/;"	m	union:__anonf7490e5a010a	typeref:struct:DWstruct
s	arch/nios2/lib/libgcc.c	/^  struct DWstruct s;$/;"	m	union:__anona37ae167010a	typeref:struct:DWstruct	file:
s	arch/sh/lib/libgcc.h	/^	struct DWstruct s;$/;"	m	union:__anon2b75257c010a	typeref:struct:DWstruct
s	board/freescale/common/ngpixis.h	/^	} s[9];		\/* s[0]..s[7] is SW1..SW8, and s[8] is SW11 *\/$/;"	m	struct:ngpixis	typeref:struct:ngpixis::__anonfc4359a50108[9]
s	include/jffs2/jffs2.h	/^	struct jffs2_raw_summary s;$/;"	m	union:jffs2_node_union	typeref:struct:jffs2_raw_summary
s	include/linux/usb/ch9.h	/^	const char *s;$/;"	m	struct:usb_string	typeref:typename:const char *
s	lib/lzma/Types.h	/^  ILookInStream s;$/;"	m	struct:__anonf2a2f1b90808	typeref:typename:ILookInStream
s	lib/lzma/Types.h	/^  ISeqInStream s;$/;"	m	struct:__anonf2a2f1b90908	typeref:typename:ISeqInStream
s	lib/lzma/Types.h	/^  ISeqInStream s;$/;"	m	struct:__anonf2a2f1b90a08	typeref:typename:ISeqInStream
s	scripts/kconfig/lkc.h	/^	char  *s;$/;"	m	struct:gstr	typeref:typename:char *
s0	arch/mips/include/asm/regdef.h	/^#define s0	/;"	d
s0	drivers/video/stb_truetype.h	/^   float x0,y0,s0,t0; \/\/ top-left$/;"	m	struct:__anonce392f790208	typeref:typename:float
s0	include/ec_commands.h	/^	float s0;$/;"	m	struct:ec_params_tmp006_set_calibration	typeref:typename:float
s0	include/ec_commands.h	/^	float s0;$/;"	m	struct:ec_response_tmp006_get_calibration	typeref:typename:float
s0_idx	include/ec_commands.h	/^	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	\/* AP is running *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2][]
s0_tick_delay	include/ec_commands.h	/^	int s0_tick_delay[2];			\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:int[2]
s0a_tick_delay	include/ec_commands.h	/^	int s0a_tick_delay[2];			\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:int[2]
s0s3_ramp_down	include/ec_commands.h	/^	int s0s3_ramp_down;$/;"	m	struct:lightbar_params	typeref:typename:int
s1	arch/mips/include/asm/regdef.h	/^#define s1	/;"	d
s1	drivers/video/stb_truetype.h	/^   float x1,y1,s1,t1; \/\/ bottom-right$/;"	m	struct:__anonce392f790208	typeref:typename:float
s16	arch/arc/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/arm/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/avr32/include/asm/types.h	/^typedef __signed__ short s16;$/;"	t	typeref:typename:__signed__ short
s16	arch/blackfin/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/m68k/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/microblaze/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/mips/include/asm/types.h	/^typedef __signed short s16;$/;"	t	typeref:typename:__signed short
s16	arch/nds32/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/nios2/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/openrisc/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/powerpc/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/sandbox/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/sh/include/asm/types.h	/^typedef __signed__ short s16;$/;"	t	typeref:typename:__signed__ short
s16	arch/sparc/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/x86/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	arch/xtensa/include/asm/types.h	/^typedef signed short s16;$/;"	t	typeref:typename:signed short
s16	include/MCD_dma.h	/^typedef short s16;$/;"	t	typeref:typename:short
s1_sendpacket	cmd/load.c	/^static void s1_sendpacket(char *packet)$/;"	f	typeref:typename:void	file:
s2	arch/mips/include/asm/regdef.h	/^#define s2	/;"	d
s2fuser1clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	s2fuser1clk;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
s2fuser1clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t s2fuser1clk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
s2fuser2clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	s2fuser2clk;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
s2fuser2clk	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t s2fuser2clk;$/;"	m	struct:cm_config	typeref:typename:uint32_t
s2mps11_ids	drivers/power/pmic/s2mps11.c	/^static const struct udevice_id s2mps11_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
s2mps11_ops	drivers/power/pmic/s2mps11.c	/^static struct dm_pmic_ops s2mps11_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
s2mps11_read	drivers/power/pmic/s2mps11.c	/^static int s2mps11_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
s2mps11_reg	include/power/s2mps11.h	/^enum s2mps11_reg {$/;"	g
s2mps11_reg_count	drivers/power/pmic/s2mps11.c	/^static int s2mps11_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s2mps11_write	drivers/power/pmic/s2mps11.c	/^static int s2mps11_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
s3	arch/mips/include/asm/regdef.h	/^#define s3	/;"	d
s32	arch/arc/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/arm/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/avr32/include/asm/types.h	/^typedef __signed__ int s32;$/;"	t	typeref:typename:__signed__ int
s32	arch/blackfin/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/m68k/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/microblaze/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/mips/include/asm/types.h	/^typedef __signed int s32;$/;"	t	typeref:typename:__signed int
s32	arch/nds32/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/nios2/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/openrisc/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/powerpc/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/sandbox/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/sh/include/asm/types.h	/^typedef __signed__ int s32;$/;"	t	typeref:typename:__signed__ int
s32	arch/sparc/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/x86/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	arch/xtensa/include/asm/types.h	/^typedef signed int s32;$/;"	t	typeref:typename:signed int
s32	include/MCD_dma.h	/^typedef int s32;$/;"	t	typeref:typename:int
s32k_cr	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int s32k_cr;		\/* 0x10 *\/$/;"	m	struct:s32ktimer	typeref:typename:unsigned int
s32k_cr	arch/arm/include/asm/arch-omap4/omap.h	/^	unsigned int s32k_cr;	\/* 0x10 *\/$/;"	m	struct:s32ktimer	typeref:typename:unsigned int
s32k_cr	arch/arm/include/asm/arch-omap5/omap.h	/^	unsigned int s32k_cr;	\/* 0x10 *\/$/;"	m	struct:s32ktimer	typeref:typename:unsigned int
s32ktimer	arch/arm/include/asm/arch-omap3/omap.h	/^struct s32ktimer {$/;"	s
s32ktimer	arch/arm/include/asm/arch-omap4/omap.h	/^struct s32ktimer {$/;"	s
s32ktimer	arch/arm/include/asm/arch-omap5/omap.h	/^struct s32ktimer {$/;"	s
s32v234_mem_map	arch/arm/cpu/armv8/s32v234/cpu.c	/^static struct mm_region s32v234_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
s35390a	arch/arm/dts/armada-xp-synology-ds414.dts	/^				s35390a: s35390a@30 {$/;"	l
s3_idx	include/ec_commands.h	/^	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	\/* AP is sleeping *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2][]
s3_ramp_down	include/ec_commands.h	/^	int s3_ramp_down;$/;"	m	struct:lightbar_params	typeref:typename:int
s3_ramp_up	include/ec_commands.h	/^	int s3_ramp_up;$/;"	m	struct:lightbar_params	typeref:typename:int
s3_sleep_for	include/ec_commands.h	/^	int s3_sleep_for;$/;"	m	struct:lightbar_params	typeref:typename:int
s3authentication	arch/x86/include/asm/me_common.h	/^	u16 s3authentication:1;$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
s3c2400_adc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c2400_adc {$/;"	s
s3c2400_get_base_adc	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c2400_adc *s3c2400_get_base_adc(void)$/;"	f	typeref:struct:s3c2400_adc *
s3c2400_get_base_mmc	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c2400_mmc *s3c2400_get_base_mmc(void)$/;"	f	typeref:struct:s3c2400_mmc *
s3c2400_mmc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c2400_mmc {$/;"	s
s3c2410_adc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c2410_adc {$/;"	s
s3c2410_get_base_adc	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c2410_adc *s3c2410_get_base_adc(void)$/;"	f	typeref:struct:s3c2410_adc *
s3c2440_get_base_adc	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c2440_adc *s3c2440_get_base_adc(void)$/;"	f	typeref:struct:s3c2440_adc *
s3c2440_gpio	arch/arm/include/asm/arch-s3c24x0/gpio.h	/^enum s3c2440_gpio {$/;"	g
s3c2440_iomux_func	arch/arm/include/asm/arch-s3c24x0/iomux.h	/^enum s3c2440_iomux_func {$/;"	g
s3c24x0_clock_power	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_clock_power {$/;"	s
s3c24x0_dev_ready	drivers/mtd/nand/s3c2410_nand.c	/^static int s3c24x0_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
s3c24x0_dma	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_dma {$/;"	s
s3c24x0_dmas	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_dmas {$/;"	s
s3c24x0_do_msg	drivers/i2c/s3c24x0_i2c.c	/^static int s3c24x0_do_msg(struct s3c24x0_i2c_bus *i2c_bus, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
s3c24x0_get_base_clock_power	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void)$/;"	f	typeref:struct:s3c24x0_clock_power *
s3c24x0_get_base_clock_power	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void)$/;"	f	typeref:struct:s3c24x0_clock_power *
s3c24x0_get_base_clock_power	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void)$/;"	f	typeref:struct:s3c24x0_clock_power *
s3c24x0_get_base_dmas	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void)$/;"	f	typeref:struct:s3c24x0_dmas *
s3c24x0_get_base_dmas	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void)$/;"	f	typeref:struct:s3c24x0_dmas *
s3c24x0_get_base_dmas	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void)$/;"	f	typeref:struct:s3c24x0_dmas *
s3c24x0_get_base_gpio	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void)$/;"	f	typeref:struct:s3c24x0_gpio *
s3c24x0_get_base_gpio	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void)$/;"	f	typeref:struct:s3c24x0_gpio *
s3c24x0_get_base_gpio	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void)$/;"	f	typeref:struct:s3c24x0_gpio *
s3c24x0_get_base_i2c	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void)$/;"	f	typeref:struct:s3c24x0_i2c *
s3c24x0_get_base_i2c	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void)$/;"	f	typeref:struct:s3c24x0_i2c *
s3c24x0_get_base_i2c	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void)$/;"	f	typeref:struct:s3c24x0_i2c *
s3c24x0_get_base_i2s	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void)$/;"	f	typeref:struct:s3c24x0_i2s *
s3c24x0_get_base_i2s	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void)$/;"	f	typeref:struct:s3c24x0_i2s *
s3c24x0_get_base_i2s	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void)$/;"	f	typeref:struct:s3c24x0_i2s *
s3c24x0_get_base_interrupt	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void)$/;"	f	typeref:struct:s3c24x0_interrupt *
s3c24x0_get_base_interrupt	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void)$/;"	f	typeref:struct:s3c24x0_interrupt *
s3c24x0_get_base_interrupt	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void)$/;"	f	typeref:struct:s3c24x0_interrupt *
s3c24x0_get_base_lcd	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void)$/;"	f	typeref:struct:s3c24x0_lcd *
s3c24x0_get_base_lcd	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void)$/;"	f	typeref:struct:s3c24x0_lcd *
s3c24x0_get_base_lcd	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void)$/;"	f	typeref:struct:s3c24x0_lcd *
s3c24x0_get_base_memctl	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void)$/;"	f	typeref:struct:s3c24x0_memctl *
s3c24x0_get_base_memctl	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void)$/;"	f	typeref:struct:s3c24x0_memctl *
s3c24x0_get_base_memctl	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void)$/;"	f	typeref:struct:s3c24x0_memctl *
s3c24x0_get_base_nand	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_nand *s3c24x0_get_base_nand(void)$/;"	f	typeref:struct:s3c24x0_nand *
s3c24x0_get_base_nand	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_nand *s3c24x0_get_base_nand(void)$/;"	f	typeref:struct:s3c24x0_nand *
s3c24x0_get_base_rtc	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void)$/;"	f	typeref:struct:s3c24x0_rtc *
s3c24x0_get_base_rtc	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void)$/;"	f	typeref:struct:s3c24x0_rtc *
s3c24x0_get_base_rtc	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void)$/;"	f	typeref:struct:s3c24x0_rtc *
s3c24x0_get_base_sdi	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_sdi *s3c24x0_get_base_sdi(void)$/;"	f	typeref:struct:s3c24x0_sdi *
s3c24x0_get_base_sdi	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_sdi *s3c24x0_get_base_sdi(void)$/;"	f	typeref:struct:s3c24x0_sdi *
s3c24x0_get_base_spi	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)$/;"	f	typeref:struct:s3c24x0_spi *
s3c24x0_get_base_spi	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)$/;"	f	typeref:struct:s3c24x0_spi *
s3c24x0_get_base_spi	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)$/;"	f	typeref:struct:s3c24x0_spi *
s3c24x0_get_base_timers	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void)$/;"	f	typeref:struct:s3c24x0_timers *
s3c24x0_get_base_timers	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void)$/;"	f	typeref:struct:s3c24x0_timers *
s3c24x0_get_base_timers	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void)$/;"	f	typeref:struct:s3c24x0_timers *
s3c24x0_get_base_uart	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^	*s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n)$/;"	f	typeref:struct:s3c24x0_uart *
s3c24x0_get_base_uart	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^	*s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n)$/;"	f	typeref:struct:s3c24x0_uart *
s3c24x0_get_base_uart	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^	*s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n)$/;"	f	typeref:struct:s3c24x0_uart *
s3c24x0_get_base_usb_device	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void)$/;"	f	typeref:struct:s3c24x0_usb_device *
s3c24x0_get_base_usb_device	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void)$/;"	f	typeref:struct:s3c24x0_usb_device *
s3c24x0_get_base_usb_device	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void)$/;"	f	typeref:struct:s3c24x0_usb_device *
s3c24x0_get_base_usb_host	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void)$/;"	f	typeref:struct:s3c24x0_usb_host *
s3c24x0_get_base_usb_host	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void)$/;"	f	typeref:struct:s3c24x0_usb_host *
s3c24x0_get_base_usb_host	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void)$/;"	f	typeref:struct:s3c24x0_usb_host *
s3c24x0_get_base_watchdog	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void)$/;"	f	typeref:struct:s3c24x0_watchdog *
s3c24x0_get_base_watchdog	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void)$/;"	f	typeref:struct:s3c24x0_watchdog *
s3c24x0_get_base_watchdog	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void)$/;"	f	typeref:struct:s3c24x0_watchdog *
s3c24x0_gpio	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_gpio {$/;"	s
s3c24x0_hwcontrol	drivers/mtd/nand/s3c2410_nand.c	/^static void s3c24x0_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
s3c24x0_i2c	drivers/i2c/s3c24x0_i2c.h	/^struct s3c24x0_i2c {$/;"	s
s3c24x0_i2c_bus	drivers/i2c/s3c24x0_i2c.h	/^struct s3c24x0_i2c_bus {$/;"	s
s3c24x0_i2c_init	drivers/i2c/s3c24x0_i2c.c	/^static void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
s3c24x0_i2c_probe	drivers/i2c/s3c24x0_i2c.c	/^static int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
s3c24x0_i2c_read	drivers/i2c/s3c24x0_i2c.c	/^static int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
s3c24x0_i2c_set_bus_speed	drivers/i2c/s3c24x0_i2c.c	/^static unsigned int s3c24x0_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
s3c24x0_i2c_write	drivers/i2c/s3c24x0_i2c.c	/^static int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
s3c24x0_i2c_xfer	drivers/i2c/s3c24x0_i2c.c	/^static int s3c24x0_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
s3c24x0_i2s	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_i2s {$/;"	s
s3c24x0_interrupt	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_interrupt {$/;"	s
s3c24x0_lcd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_lcd {$/;"	s
s3c24x0_memctl	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_memctl {$/;"	s
s3c24x0_nand	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_nand {$/;"	s
s3c24x0_nand_calculate_ecc	drivers/mtd/nand/s3c2410_nand.c	/^static int s3c24x0_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,$/;"	f	typeref:typename:int	file:
s3c24x0_nand_correct_data	drivers/mtd/nand/s3c2410_nand.c	/^static int s3c24x0_nand_correct_data(struct mtd_info *mtd, u_char *dat,$/;"	f	typeref:typename:int	file:
s3c24x0_nand_enable_hwecc	drivers/mtd/nand/s3c2410_nand.c	/^void s3c24x0_nand_enable_hwecc(struct mtd_info *mtd, int mode)$/;"	f	typeref:typename:void
s3c24x0_rtc	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_rtc {$/;"	s
s3c24x0_sdi	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_sdi {$/;"	s
s3c24x0_spi	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_spi {$/;"	s
s3c24x0_spi_channel	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_spi_channel {$/;"	s
s3c24x0_timer	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_timer {$/;"	s
s3c24x0_timers	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_timers {$/;"	s
s3c24x0_uart	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_uart {$/;"	s
s3c24x0_uarts_nr	arch/arm/include/asm/arch-s3c24x0/s3c2400.h	/^enum s3c24x0_uarts_nr {$/;"	g
s3c24x0_uarts_nr	arch/arm/include/asm/arch-s3c24x0/s3c2410.h	/^enum s3c24x0_uarts_nr {$/;"	g
s3c24x0_uarts_nr	arch/arm/include/asm/arch-s3c24x0/s3c2440.h	/^enum s3c24x0_uarts_nr {$/;"	g
s3c24x0_usb_dev_dmas	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_usb_dev_dmas {$/;"	s
s3c24x0_usb_dev_fifos	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_usb_dev_fifos {$/;"	s
s3c24x0_usb_device	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_usb_device {$/;"	s
s3c24x0_usb_host	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_usb_host {$/;"	s
s3c24x0_watchdog	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^struct s3c24x0_watchdog {$/;"	s
s3c24xx_serial0_device	drivers/serial/serial_s3c24x0.c	/^struct serial_device s3c24xx_serial0_device =$/;"	v	typeref:struct:serial_device
s3c24xx_serial1_device	drivers/serial/serial_s3c24x0.c	/^struct serial_device s3c24xx_serial1_device =$/;"	v	typeref:struct:serial_device
s3c24xx_serial2_device	drivers/serial/serial_s3c24x0.c	/^struct serial_device s3c24xx_serial2_device =$/;"	v	typeref:struct:serial_device
s3c24xx_serial_initialize	drivers/serial/serial_s3c24x0.c	/^void s3c24xx_serial_initialize(void)$/;"	f	typeref:typename:void
s3c_get_bufferram	drivers/mtd/onenand/samsung.c	/^static unsigned char *s3c_get_bufferram(struct mtd_info *mtd, int area)$/;"	f	typeref:typename:unsigned char *	file:
s3c_gpio_direction	drivers/gpio/s3c2440_gpio.c	/^static int s3c_gpio_direction(unsigned gpio, uint8_t dir)$/;"	f	typeref:typename:int	file:
s3c_gpio_get_bank_addr	drivers/gpio/s3c2440_gpio.c	/^static uint32_t s3c_gpio_get_bank_addr(unsigned gpio)$/;"	f	typeref:typename:uint32_t	file:
s3c_i2c_ids	drivers/i2c/s3c24x0_i2c.c	/^static const struct udevice_id s3c_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
s3c_i2c_ofdata_to_platdata	drivers/i2c/s3c24x0_i2c.c	/^static int s3c_i2c_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s3c_i2c_ops	drivers/i2c/s3c24x0_i2c.c	/^static const struct dm_i2c_ops s3c_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
s3c_mem_addr	drivers/mtd/onenand/samsung.c	/^static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)$/;"	f	typeref:typename:unsigned int	file:
s3c_onenand	drivers/mtd/onenand/samsung.c	/^struct s3c_onenand {$/;"	s	file:
s3c_onenand_bbt_wait	drivers/mtd/onenand/samsung.c	/^static int s3c_onenand_bbt_wait(struct mtd_info *mtd, int state)$/;"	f	typeref:typename:int	file:
s3c_onenand_check_lock_status	drivers/mtd/onenand/samsung.c	/^static void s3c_onenand_check_lock_status(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
s3c_onenand_command	drivers/mtd/onenand/samsung.c	/^static int s3c_onenand_command(struct mtd_info *mtd, int cmd,$/;"	f	typeref:typename:int	file:
s3c_onenand_do_lock_cmd	drivers/mtd/onenand/samsung.c	/^static void s3c_onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs,$/;"	f	typeref:typename:void	file:
s3c_onenand_init	drivers/mtd/onenand/samsung.c	/^void s3c_onenand_init(struct mtd_info *mtd)$/;"	f	typeref:typename:void
s3c_onenand_readw	drivers/mtd/onenand/samsung.c	/^static unsigned short s3c_onenand_readw(void __iomem *addr)$/;"	f	typeref:typename:unsigned short	file:
s3c_onenand_reset	drivers/mtd/onenand/samsung.c	/^static void s3c_onenand_reset(void)$/;"	f	typeref:typename:void	file:
s3c_onenand_unlock_all	drivers/mtd/onenand/samsung.c	/^static void s3c_onenand_unlock_all(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
s3c_onenand_wait	drivers/mtd/onenand/samsung.c	/^static int s3c_onenand_wait(struct mtd_info *mtd, int state)$/;"	f	typeref:typename:int	file:
s3c_onenand_writew	drivers/mtd/onenand/samsung.c	/^static void s3c_onenand_writew(unsigned short value, void __iomem *addr)$/;"	f	typeref:typename:void	file:
s3c_read_cmd	drivers/mtd/onenand/samsung.c	/^static int s3c_read_cmd(unsigned int cmd)$/;"	f	typeref:typename:int	file:
s3c_write_cmd	drivers/mtd/onenand/samsung.c	/^static void s3c_write_cmd(int value, unsigned int cmd)$/;"	f	typeref:typename:void	file:
s3cadsplcr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cadsplcr;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3carcr11	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3carcr11;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3carcr22	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3carcr22;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3cexcladdmsk	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cexcladdmsk;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3cexclidmsk	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cexclidmsk;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3cmaar	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cmaar;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3cmctr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cmctr;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3cmmc_getcd	drivers/mmc/s3c_sdi.c	/^static int s3cmmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
s3cmmc_getwp	drivers/mmc/s3c_sdi.c	/^static int s3cmmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
s3cmmc_init	drivers/mmc/s3c_sdi.c	/^static int s3cmmc_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
s3cmmc_initialize	drivers/mmc/s3c_sdi.c	/^int s3cmmc_initialize(bd_t *bis, int (*getcd)(struct mmc *),$/;"	f	typeref:typename:int
s3cmmc_ops	drivers/mmc/s3c_sdi.c	/^static const struct mmc_ops s3cmmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
s3cmmc_priv	drivers/mmc/s3c_sdi.c	/^struct s3cmmc_priv {$/;"	s	file:
s3cmmc_send_cmd	drivers/mmc/s3c_sdi.c	/^s3cmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
s3cmmc_set_ios	drivers/mmc/s3c_sdi.c	/^static void s3cmmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
s3cqos0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos0;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos1;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos2	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos2;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos3	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos3;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos4	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos4;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos5	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos5;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos6	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos6;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos7	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos7;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3cqos8	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cqos8;$/;"	m	struct:rcar_s3c_qos	typeref:typename:u32
s3crorr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3crorr;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3cworr	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 s3cworr;$/;"	m	struct:rcar_s3c	typeref:typename:u32
s3s0_ramp_up	include/ec_commands.h	/^	int s3s0_ramp_up;$/;"	m	struct:lightbar_params	typeref:typename:int
s4	arch/mips/include/asm/regdef.h	/^#define s4	/;"	d
s4bios_req	arch/x86/include/asm/acpi_table.h	/^	u8 s4bios_req;$/;"	m	struct:acpi_fadt	typeref:typename:u8
s5	arch/mips/include/asm/regdef.h	/^#define s5	/;"	d
s5m8767_bind	drivers/power/pmic/s5m8767.c	/^static int s5m8767_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5m8767_buck_ops	drivers/power/regulator/s5m8767.c	/^static const struct dm_regulator_ops s5m8767_buck_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
s5m8767_buck_probe	drivers/power/regulator/s5m8767.c	/^static int s5m8767_buck_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5m8767_enable_32khz_cp	drivers/power/pmic/s5m8767.c	/^int s5m8767_enable_32khz_cp(struct udevice *dev)$/;"	f	typeref:typename:int
s5m8767_ids	drivers/power/pmic/s5m8767.c	/^static const struct udevice_id s5m8767_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
s5m8767_ldo_ops	drivers/power/regulator/s5m8767.c	/^static const struct dm_regulator_ops s5m8767_ldo_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
s5m8767_ldo_probe	drivers/power/regulator/s5m8767.c	/^static int s5m8767_ldo_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5m8767_ops	drivers/power/pmic/s5m8767.c	/^static struct dm_pmic_ops s5m8767_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
s5m8767_para	include/power/s5m8767.h	/^struct s5m8767_para {$/;"	s
s5m8767_read	drivers/power/pmic/s5m8767.c	/^static int s5m8767_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
s5m8767_reg_count	drivers/power/pmic/s5m8767.c	/^static int s5m8767_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5m8767_regnum	include/power/s5m8767.h	/^enum s5m8767_regnum {$/;"	g
s5m8767_write	drivers/power/pmic/s5m8767.c	/^static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
s5p_adc	arch/arm/mach-exynos/include/mach/adc.h	/^struct s5p_adc {$/;"	s
s5p_config_sromc	arch/arm/cpu/armv7/s5p-common/sromc.c	/^void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)$/;"	f	typeref:typename:void
s5p_cpu_id	arch/arm/cpu/armv7/s5p-common/cpu_info.c	/^unsigned int s5p_cpu_id = 0xC100;$/;"	v	typeref:typename:unsigned int
s5p_cpu_rev	arch/arm/cpu/armv7/s5p-common/cpu_info.c	/^unsigned int s5p_cpu_rev = 1;$/;"	v	typeref:typename:unsigned int
s5p_get_base_timer	arch/arm/cpu/armv7/s5p-common/timer.c	/^static inline struct s5p_timer *s5p_get_base_timer(void)$/;"	f	typeref:struct:s5p_timer *	file:
s5p_get_cpu_name	arch/arm/mach-exynos/include/mach/cpu.h	/^static inline char *s5p_get_cpu_name(void)$/;"	f	typeref:typename:char *
s5p_get_cpu_name	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^static inline char *s5p_get_cpu_name(void)$/;"	f	typeref:typename:char *
s5p_get_cpu_rev	arch/arm/mach-exynos/include/mach/cpu.h	/^static inline int s5p_get_cpu_rev(void)$/;"	f	typeref:typename:int
s5p_get_cpu_rev	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^static inline int s5p_get_cpu_rev(void)$/;"	f	typeref:typename:int
s5p_gpio_bank	arch/arm/mach-exynos/include/mach/gpio.h	/^struct s5p_gpio_bank {$/;"	s
s5p_gpio_bank	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^struct s5p_gpio_bank {$/;"	s
s5p_gpio_cfg_pin	drivers/gpio/s5p_gpio.c	/^static void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)$/;"	f	typeref:typename:void	file:
s5p_gpio_get_bank	drivers/gpio/s5p_gpio.c	/^static struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned int gpio)$/;"	f	typeref:struct:s5p_gpio_bank *	file:
s5p_gpio_get_cfg_pin	drivers/gpio/s5p_gpio.c	/^static int s5p_gpio_get_cfg_pin(struct s5p_gpio_bank *bank, int gpio)$/;"	f	typeref:typename:int	file:
s5p_gpio_get_pin	drivers/gpio/s5p_gpio.c	/^int s5p_gpio_get_pin(unsigned gpio)$/;"	f	typeref:typename:int
s5p_gpio_get_value	drivers/gpio/s5p_gpio.c	/^static unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio)$/;"	f	typeref:typename:unsigned int	file:
s5p_gpio_set_drv	drivers/gpio/s5p_gpio.c	/^static void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode)$/;"	f	typeref:typename:void	file:
s5p_gpio_set_pull	drivers/gpio/s5p_gpio.c	/^static void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode)$/;"	f	typeref:typename:void	file:
s5p_gpio_set_rate	drivers/gpio/s5p_gpio.c	/^static void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)$/;"	f	typeref:typename:void	file:
s5p_gpio_set_value	drivers/gpio/s5p_gpio.c	/^static void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en)$/;"	f	typeref:typename:void	file:
s5p_mmc_init	arch/arm/mach-exynos/include/mach/mmc.h	/^static inline int s5p_mmc_init(int index, int bus_width)$/;"	f	typeref:typename:int
s5p_mmc_init	arch/arm/mach-s5pc1xx/include/mach/mmc.h	/^static inline int s5p_mmc_init(int index, int bus_width)$/;"	f	typeref:typename:int
s5p_sdhci_bind	drivers/mmc/s5p_sdhci.c	/^static int s5p_sdhci_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5p_sdhci_core_init	drivers/mmc/s5p_sdhci.c	/^static int s5p_sdhci_core_init(struct sdhci_host *host)$/;"	f	typeref:typename:int	file:
s5p_sdhci_ids	drivers/mmc/s5p_sdhci.c	/^static const struct udevice_id s5p_sdhci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
s5p_sdhci_init	drivers/mmc/s5p_sdhci.c	/^int s5p_sdhci_init(u32 regbase, int index, int bus_width)$/;"	f	typeref:typename:int
s5p_sdhci_plat	drivers/mmc/s5p_sdhci.c	/^struct s5p_sdhci_plat {$/;"	s	file:
s5p_sdhci_probe	drivers/mmc/s5p_sdhci.c	/^static int s5p_sdhci_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5p_sdhci_set_control_reg	drivers/mmc/s5p_sdhci.c	/^static void s5p_sdhci_set_control_reg(struct sdhci_host *host)$/;"	f	typeref:typename:void	file:
s5p_serial_baud	drivers/serial/serial_s5p.c	/^static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,$/;"	f	typeref:typename:void __maybe_unused	file:
s5p_serial_getc	drivers/serial/serial_s5p.c	/^static int s5p_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5p_serial_ids	drivers/serial/serial_s5p.c	/^static const struct udevice_id s5p_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
s5p_serial_init	drivers/serial/serial_s5p.c	/^static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)$/;"	f	typeref:typename:void __maybe_unused	file:
s5p_serial_ofdata_to_platdata	drivers/serial/serial_s5p.c	/^static int s5p_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5p_serial_ops	drivers/serial/serial_s5p.c	/^static const struct dm_serial_ops s5p_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
s5p_serial_pending	drivers/serial/serial_s5p.c	/^static int s5p_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
s5p_serial_platdata	drivers/serial/serial_s5p.c	/^struct s5p_serial_platdata {$/;"	s	file:
s5p_serial_probe	drivers/serial/serial_s5p.c	/^static int s5p_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
s5p_serial_putc	drivers/serial/serial_s5p.c	/^static int s5p_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
s5p_serial_setbrg	drivers/serial/serial_s5p.c	/^int s5p_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
s5p_set_cpu_id	arch/arm/mach-exynos/include/mach/cpu.h	/^static inline void s5p_set_cpu_id(void)$/;"	f	typeref:typename:void
s5p_set_cpu_id	arch/arm/mach-s5pc1xx/include/mach/cpu.h	/^static inline void s5p_set_cpu_id(void)$/;"	f	typeref:typename:void
s5p_sromc	arch/arm/mach-exynos/include/mach/sromc.h	/^struct s5p_sromc {$/;"	s
s5p_sromc	arch/arm/mach-s5pc1xx/include/mach/sromc.h	/^struct s5p_sromc {$/;"	s
s5p_timer	arch/arm/mach-exynos/include/mach/pwm.h	/^struct s5p_timer {$/;"	s
s5p_timer	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^struct s5p_timer {$/;"	s
s5p_uart	arch/arm/mach-exynos/include/mach/uart.h	/^struct s5p_uart {$/;"	s
s5p_uart	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^struct s5p_uart {$/;"	s
s5p_uart_divslot	arch/arm/mach-exynos/include/mach/uart.h	/^static inline int s5p_uart_divslot(void)$/;"	f	typeref:typename:int
s5p_uart_divslot	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^static inline int s5p_uart_divslot(void)$/;"	f	typeref:typename:int
s5p_watchdog	arch/arm/mach-exynos/include/mach/watchdog.h	/^struct s5p_watchdog {$/;"	s
s5p_watchdog	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^struct s5p_watchdog {$/;"	s
s5pc100_clock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^struct s5pc100_clock {$/;"	s
s5pc100_get_arm_clk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc100_get_arm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
s5pc100_get_pclk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc100_get_pclk(void)$/;"	f	typeref:typename:unsigned long	file:
s5pc100_get_pll_clk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc100_get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long	file:
s5pc100_gpio_data	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^static struct gpio_info s5pc100_gpio_data[S5PC100_GPIO_NUM_PARTS] = {$/;"	v	typeref:struct:gpio_info[]
s5pc100_gpio_pin	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^enum s5pc100_gpio_pin {$/;"	g
s5pc100_gpio_table	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^static const struct gpio_name_num_table s5pc100_gpio_table[] = {$/;"	v	typeref:typename:const struct gpio_name_num_table[]
s5pc110_chip_probe	drivers/mtd/onenand/samsung.c	/^int s5pc110_chip_probe(struct mtd_info *mtd)$/;"	f	typeref:typename:int
s5pc110_clock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^struct s5pc110_clock {$/;"	s
s5pc110_get_arm_clk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc110_get_arm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
s5pc110_get_pclk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc110_get_pclk(void)$/;"	f	typeref:typename:unsigned long	file:
s5pc110_get_pll_clk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc110_get_pll_clk(int pllreg)$/;"	f	typeref:typename:unsigned long	file:
s5pc110_gpio_data	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^static struct gpio_info s5pc110_gpio_data[S5PC110_GPIO_NUM_PARTS] = {$/;"	v	typeref:struct:gpio_info[]
s5pc110_gpio_pin	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^enum s5pc110_gpio_pin {$/;"	g
s5pc110_gpio_table	arch/arm/mach-s5pc1xx/include/mach/gpio.h	/^static const struct gpio_name_num_table s5pc110_gpio_table[] = {$/;"	v	typeref:typename:const struct gpio_name_num_table[]
s5pc110_otg_data	board/samsung/goni/goni.c	/^struct dwc2_plat_otg_data s5pc110_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data
s5pc1xx_get_pwm_clk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc1xx_get_pwm_clk(void)$/;"	f	typeref:typename:unsigned long	file:
s5pc1xx_get_uart_clk	arch/arm/mach-s5pc1xx/clock.c	/^static unsigned long s5pc1xx_get_uart_clk(int dev_index)$/;"	f	typeref:typename:unsigned long	file:
s5pc1xx_phy_control	board/samsung/goni/goni.c	/^static int s5pc1xx_phy_control(int on)$/;"	f	typeref:typename:int	file:
s5pc210_chip_probe	drivers/mtd/onenand/samsung.c	/^int s5pc210_chip_probe(struct mtd_info *mtd)$/;"	f	typeref:typename:int
s5pc210_otg_data	board/samsung/odroid/odroid.c	/^struct dwc2_plat_otg_data s5pc210_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data
s5pc210_otg_data	board/samsung/trats/trats.c	/^struct dwc2_plat_otg_data s5pc210_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data
s5pc210_otg_data	board/samsung/trats/trats.c	/^struct dwc2_plat_otg_data s5pc210_otg_data;$/;"	v	typeref:struct:dwc2_plat_otg_data
s5pc210_otg_data	board/samsung/trats2/trats2.c	/^struct dwc2_plat_otg_data s5pc210_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data
s5pc210_otg_data	board/samsung/universal_c210/universal.c	/^struct dwc2_plat_otg_data s5pc210_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data
s5pc210_phy_control	board/samsung/odroid/odroid.c	/^static int s5pc210_phy_control(int on)$/;"	f	typeref:typename:int	file:
s5pc210_phy_control	board/samsung/trats/trats.c	/^static int s5pc210_phy_control(int on)$/;"	f	typeref:typename:int	file:
s5pc210_phy_control	board/samsung/trats2/trats2.c	/^static int s5pc210_phy_control(int on)$/;"	f	typeref:typename:int	file:
s5pc210_phy_control	board/samsung/universal_c210/universal.c	/^static int s5pc210_phy_control(int on)$/;"	f	typeref:typename:int	file:
s6	arch/mips/include/asm/regdef.h	/^#define s6	/;"	d
s64	arch/arc/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/arm/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/avr32/include/asm/types.h	/^typedef __signed__ long long s64;$/;"	t	typeref:typename:__signed__ long long
s64	arch/blackfin/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/m68k/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/microblaze/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/mips/include/asm/types.h	/^typedef __signed__ long long s64;$/;"	t	typeref:typename:__signed__ long long
s64	arch/nds32/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/nios2/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/openrisc/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/powerpc/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/sandbox/include/asm/types.h	/^typedef __INT64_TYPE__ s64;$/;"	t	typeref:typename:__INT64_TYPE__
s64	arch/sandbox/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/sh/include/asm/types.h	/^typedef __signed__ long long s64;$/;"	t	typeref:typename:__signed__ long long
s64	arch/sparc/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/x86/include/asm/types.h	/^typedef __INT64_TYPE__ s64;$/;"	t	typeref:typename:__INT64_TYPE__
s64	arch/x86/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s64	arch/xtensa/include/asm/types.h	/^typedef signed long long s64;$/;"	t	typeref:typename:signed long long
s6e63d6	include/s6e63d6.h	/^struct s6e63d6 {$/;"	s
s6e63d6_index	drivers/video/s6e63d6.c	/^int s6e63d6_index(struct s6e63d6 *data, u8 idx)$/;"	f	typeref:typename:int
s6e63d6_init	drivers/video/s6e63d6.c	/^int s6e63d6_init(struct s6e63d6 *data)$/;"	f	typeref:typename:int
s6e63d6_param	drivers/video/s6e63d6.c	/^int s6e63d6_param(struct s6e63d6 *data, u16 param)$/;"	f	typeref:typename:int
s6e8ax0_apply_level1_key	drivers/video/s6e8ax0.c	/^static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_apply_mtp_key	drivers/video/s6e8ax0.c	/^static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_display_cond	drivers/video/s6e8ax0.c	/^static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_display_enable	drivers/video/s6e8ax0.c	/^static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_display_on	drivers/video/s6e8ax0.c	/^static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_dsim_ddi_driver	drivers/video/s6e8ax0.c	/^static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {$/;"	v	typeref:struct:mipi_dsim_lcd_driver	file:
s6e8ax0_elvss_set	drivers/video/s6e8ax0.c	/^static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_mipi_control1	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_mipi_control2	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_mipi_control3	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_mipi_control4	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_pentile_control	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_power_control	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_etc_source_control	drivers/video/s6e8ax0.c	/^static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_gamma_cond	drivers/video/s6e8ax0.c	/^static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_gamma_update	drivers/video/s6e8ax0.c	/^static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_init	drivers/video/s6e8ax0.c	/^void s6e8ax0_init(void)$/;"	f	typeref:typename:void
s6e8ax0_panel_cond	drivers/video/s6e8ax0.c	/^static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_panel_init	drivers/video/s6e8ax0.c	/^static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s6e8ax0_panel_set	drivers/video/s6e8ax0.c	/^static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:int	file:
s6e8ax0_sleep_out	drivers/video/s6e8ax0.c	/^static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)$/;"	f	typeref:typename:void	file:
s7	arch/mips/include/asm/regdef.h	/^#define s7	/;"	d
s8	arch/arc/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/arm/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/avr32/include/asm/types.h	/^typedef __signed__ char s8;$/;"	t	typeref:typename:__signed__ char
s8	arch/blackfin/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/m68k/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/microblaze/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/mips/include/asm/regdef.h	/^#define s8	/;"	d
s8	arch/mips/include/asm/types.h	/^typedef __signed char s8;$/;"	t	typeref:typename:__signed char
s8	arch/nds32/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/nios2/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/openrisc/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/powerpc/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/sandbox/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/sh/include/asm/types.h	/^typedef __signed__ char s8;$/;"	t	typeref:typename:__signed__ char
s8	arch/sparc/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/x86/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	arch/xtensa/include/asm/types.h	/^typedef signed char s8;$/;"	t	typeref:typename:signed char
s8	include/MCD_dma.h	/^typedef char s8;$/;"	t	typeref:typename:char
sShiftLengthBytes	board/esd/common/xilinx_jtag/micro.c	/^	short           sShiftLengthBytes;  \/* Len. current shift data in bytes *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:short	file:
s_active	fs/ubifs/ubifs.h	/^	atomic_t		s_active;$/;"	m	struct:super_block	typeref:typename:atomic_t
s_addr	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^	u32 s_addr;$/;"	m	struct:mstp_ctl	typeref:typename:u32
s_addr	include/net.h	/^	__be32 s_addr;$/;"	m	struct:in_addr	typeref:typename:__be32
s_anon	fs/ubifs/ubifs.h	/^	struct hlist_bl_head	s_anon;		\/* anonymous dentries for (nfs) exporting *\/$/;"	m	struct:super_block	typeref:struct:hlist_bl_head
s_bdev	fs/ubifs/ubifs.h	/^	struct block_device	*s_bdev;$/;"	m	struct:super_block	typeref:struct:block_device *
s_bdi	fs/ubifs/ubifs.h	/^	struct backing_dev_info *s_bdi;$/;"	m	struct:super_block	typeref:struct:backing_dev_info *
s_block_count	fs/reiserfs/reiserfs_private.h	/^  __u32 s_block_count;			\/* blocks count		*\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_blocksize	fs/ext4/ext4_journal.h	/^	__be32 s_blocksize;	\/* journal device blocksize *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_blocksize	fs/reiserfs/reiserfs_private.h	/^  __u16 s_blocksize;			\/* block size		*\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_blocksize	fs/ubifs/ubifs.h	/^	unsigned long		s_blocksize;$/;"	m	struct:super_block	typeref:typename:unsigned long
s_blocksize_bits	fs/ubifs/ubifs.h	/^	unsigned char		s_blocksize_bits;$/;"	m	struct:super_block	typeref:typename:unsigned char
s_bmap_nr	fs/reiserfs/reiserfs_private.h	/^  __u16 s_bmap_nr;			\/* amount of bitmap blocks needed to address each block of file system *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_bsr	include/faraday/ftahbc020s.h	/^	unsigned int	s_bsr[32];	\/* 0x00-0x7c - Slave n Base\/Size Reg *\/$/;"	m	struct:ftahbc02s	typeref:typename:unsigned int[32]
s_carr	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 s_carr;				\/* 0x50 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
s_clkslv	board/keymile/common/common.h	/^	u8	s_clkslv;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
s_compatability	arch/sparc/cpu/leon2/prom.c	/^	char s_compatability[14];$/;"	m	struct:leon_prom_info	typeref:typename:char[14]	file:
s_compatability	arch/sparc/cpu/leon3/prom.c	/^	char s_compatability[14];$/;"	m	struct:leon_prom_info	typeref:typename:char[14]	file:
s_conf	board/keymile/common/common.h	/^	u8	s_conf;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
s_count	fs/ubifs/ubifs.h	/^	int			s_count;$/;"	m	struct:super_block	typeref:typename:int
s_cpu	arch/sparc/cpu/leon2/prom.c	/^	char s_cpu[4];$/;"	m	struct:leon_prom_info	typeref:typename:char[4]	file:
s_cpu	arch/sparc/cpu/leon3/prom.c	/^	char s_cpu[4];$/;"	m	struct:leon_prom_info	typeref:typename:char[4]	file:
s_d_op	fs/ubifs/ubifs.h	/^	const struct dentry_operations *s_d_op; \/* default d_op for dentries *\/$/;"	m	struct:super_block	typeref:typename:const struct dentry_operations *
s_dev	fs/ubifs/ubifs.h	/^	dev_t			s_dev;		\/* search index; _not_ kdev_t *\/$/;"	m	struct:super_block	typeref:typename:dev_t
s_device_type	arch/sparc/cpu/leon2/prom.c	/^	char s_device_type[12];$/;"	m	struct:leon_prom_info	typeref:typename:char[12]	file:
s_device_type	arch/sparc/cpu/leon3/prom.c	/^	char s_device_type[12];$/;"	m	struct:leon_prom_info	typeref:typename:char[12]	file:
s_dio_done_wq	fs/ubifs/ubifs.h	/^	struct workqueue_struct *s_dio_done_wq;$/;"	m	struct:super_block	typeref:struct:workqueue_struct *
s_dis	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^	u32 s_dis;$/;"	m	struct:mstp_ctl	typeref:typename:u32
s_div	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int s_div;		\/* s divider value *\/$/;"	m	struct:set_epll_con_val	typeref:typename:unsigned int
s_dquot	fs/ubifs/ubifs.h	/^	struct quota_info	s_dquot;	\/* Diskquota specific options *\/$/;"	m	struct:super_block	typeref:struct:quota_info
s_dtplat	drivers/serial/serial_rockchip.c	/^struct dtd_rockchip_rk3288_uart *dtplat, s_dtplat;$/;"	v	typeref:struct:dtd_rockchip_rk3288_uart
s_dynsuper	fs/ext4/ext4_journal.h	/^	__be32 s_dynsuper;	\/* Blocknr of dynamic superblock copy *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_ena	arch/arm/mach-rmobile/include/mach/rcar-mstp.h	/^	u32 s_ena;$/;"	m	struct:mstp_ctl	typeref:typename:u32
s_errno	fs/ext4/ext4_journal.h	/^	__be32 s_errno;$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_export_op	fs/ubifs/ubifs.h	/^	const struct export_operations *s_export_op;$/;"	m	struct:super_block	typeref:typename:const struct export_operations *
s_feature_compat	fs/ext4/ext4_journal.h	/^	__be32 s_feature_compat;	\/* compatible feature set *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_feature_incompat	fs/ext4/ext4_journal.h	/^	__be32 s_feature_incompat;	\/* incompatible feature set *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_feature_ro_compat	fs/ext4/ext4_journal.h	/^	__be32 s_feature_ro_compat;	\/* readonly-compatible feature set *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_first	fs/ext4/ext4_journal.h	/^	__be32 s_first;		\/* first block of log information *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_flags	fs/ubifs/ubifs.h	/^	unsigned long		s_flags;$/;"	m	struct:super_block	typeref:typename:unsigned long
s_free_blocks	fs/reiserfs/reiserfs_private.h	/^  __u32 s_free_blocks;			\/* free blocks count	*\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_frequency	arch/sparc/cpu/leon2/prom.c	/^	char s_frequency[16];$/;"	m	struct:leon_prom_info	typeref:typename:char[16]	file:
s_frequency	arch/sparc/cpu/leon3/prom.c	/^	char s_frequency[16];$/;"	m	struct:leon_prom_info	typeref:typename:char[16]	file:
s_fs_info	fs/ubifs/ubifs.h	/^	void 			*s_fs_info;	\/* Filesystem private info *\/$/;"	m	struct:super_block	typeref:typename:void *
s_header	fs/ext4/ext4_journal.h	/^	struct journal_header_t s_header;$/;"	m	struct:journal_superblock_t	typeref:struct:journal_header_t
s_id	fs/ubifs/ubifs.h	/^	char s_id[32];				\/* Informational name *\/$/;"	m	struct:super_block	typeref:typename:char[32]
s_idprom	arch/sparc/cpu/leon2/prom.c	/^	char s_idprom[7];$/;"	m	struct:leon_prom_info	typeref:typename:char[7]	file:
s_idprom	arch/sparc/cpu/leon3/prom.c	/^	char s_idprom[7];$/;"	m	struct:leon_prom_info	typeref:typename:char[7]	file:
s_init	arch/arm/cpu/armv7/am33xx/board.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/cpu/armv7/kona-common/s_init.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/cpu/armv7/ls102xa/soc.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/cpu/armv7/mx6/soc.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/cpu/armv7/mx7/soc.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/cpu/armv7/omap3/board.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/mach-at91/spl_atmel.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/mach-socfpga/board.c	/^void s_init(void) {}$/;"	f	typeref:typename:void
s_init	arch/arm/mach-stm32/stm32f4/soc.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/mach-stm32/stm32f7/soc.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/mach-sunxi/board.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	arch/arm/mach-tegra/ap.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/kmc/kzm9g/kzm9g.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/alt/alt.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/blanche/blanche.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/gose/gose.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/koelsch/koelsch.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/lager/lager.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/porter/porter.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/salvator-x/salvator-x.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/silk/silk.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init	board/renesas/stout/stout.c	/^void s_init(void)$/;"	f	typeref:typename:void
s_init_wait	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^#define s_init_wait(/;"	d	file:
s_init_wait	board/renesas/blanche/blanche.c	/^#define s_init_wait(/;"	d	file:
s_inodes	fs/ubifs/ubifs.h	/^	struct list_head	s_inodes;	\/* all inodes *\/$/;"	m	struct:super_block	typeref:struct:list_head
s_instances	fs/ubifs/ubifs.h	/^	struct hlist_node	s_instances;$/;"	m	struct:super_block	typeref:struct:hlist_node
s_journal_block	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_block;		\/* journal block number    *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_dev	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_dev;			\/* journal device number  *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_magic	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_magic;		\/* random value made on fs creation *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_max_batch	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_max_batch;		\/* max number of blocks to batch into a trans *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_max_commit_age	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_max_commit_age;	\/* in seconds, how old can an async commit be *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_max_trans_age	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_max_trans_age;	\/* in seconds, how old can a transaction be *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_size	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_size;			\/* size of the journal on FS creation.	used to make sure they don't o/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_journal_trans_max	fs/reiserfs/reiserfs_private.h	/^  __u32 s_journal_trans_max;		\/* max number of blocks in a transaction.  *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_leon2	arch/sparc/cpu/leon2/prom.c	/^	char s_leon2[6];$/;"	m	struct:leon_prom_info	typeref:typename:char[6]	file:
s_leon2	arch/sparc/cpu/leon3/prom.c	/^	char s_leon2[6];$/;"	m	struct:leon_prom_info	typeref:typename:char[6]	file:
s_list	fs/ubifs/ubifs.h	/^	struct list_head	s_list;		\/* Keep this first *\/$/;"	m	struct:super_block	typeref:struct:list_head
s_lock_key	fs/ubifs/ubifs.h	/^	struct lock_class_key s_lock_key;$/;"	m	struct:file_system_type	typeref:struct:lock_class_key
s_magic	fs/reiserfs/reiserfs_private.h	/^  char s_magic[16];			\/* reiserfs magic string indicates that file system is reiserfs *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:char[16]
s_magic	fs/ubifs/ubifs.h	/^	unsigned long		s_magic;$/;"	m	struct:super_block	typeref:typename:unsigned long
s_max_links	fs/ubifs/ubifs.h	/^	unsigned int		s_max_links;$/;"	m	struct:super_block	typeref:typename:unsigned int
s_max_trans_data	fs/ext4/ext4_journal.h	/^	__be32 s_max_trans_data;	\/* Limit of data blocks per trans. *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_max_transaction	fs/ext4/ext4_journal.h	/^	__be32 s_max_transaction;	\/* Limit of journal blocks per trans. *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_maxbytes	fs/ubifs/ubifs.h	/^	loff_t			s_maxbytes;	\/* Max file size *\/$/;"	m	struct:super_block	typeref:typename:loff_t
s_maxlen	fs/ext4/ext4_journal.h	/^	__be32 s_maxlen;		\/* total blocks in journal file *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_mid	arch/sparc/cpu/leon2/prom.c	/^	char s_mid[4];$/;"	m	struct:leon_prom_info	typeref:typename:char[4]	file:
s_mid	arch/sparc/cpu/leon3/prom.c	/^	char s_mid[4];$/;"	m	struct:leon_prom_info	typeref:typename:char[4]	file:
s_mmu_nctx	arch/sparc/cpu/leon2/prom.c	/^	char s_mmu_nctx[9];$/;"	m	struct:leon_prom_info	typeref:typename:char[9]	file:
s_mmu_nctx	arch/sparc/cpu/leon3/prom.c	/^	char s_mmu_nctx[9];$/;"	m	struct:leon_prom_info	typeref:typename:char[9]	file:
s_mode	fs/ubifs/ubifs.h	/^	fmode_t			s_mode;$/;"	m	struct:super_block	typeref:typename:fmode_t
s_mounts	fs/ubifs/ubifs.h	/^	struct list_head	s_mounts;	\/* list of mounts; _not_ for fs use *\/$/;"	m	struct:super_block	typeref:struct:list_head
s_mtd	fs/ubifs/ubifs.h	/^	struct mtd_info		*s_mtd;$/;"	m	struct:super_block	typeref:struct:mtd_info *
s_nr_users	fs/ext4/ext4_journal.h	/^	__be32 s_nr_users;	\/* Nr of filesystems sharing log *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_oid_cursize	fs/reiserfs/reiserfs_private.h	/^  __u16 s_oid_cursize;			\/* current size of object id array *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_oid_maxsize	fs/reiserfs/reiserfs_private.h	/^  __u16 s_oid_maxsize;			\/* max size of object id array	*\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_op	fs/ubifs/ubifs.h	/^	const struct super_operations	*s_op;$/;"	m	struct:super_block	typeref:typename:const struct super_operations *
s_options	fs/ubifs/ubifs.h	/^	char __rcu *s_options;$/;"	m	struct:super_block	typeref:typename:char __rcu *
s_padding	fs/ext4/ext4_journal.h	/^	__be32 s_padding[44];$/;"	m	struct:journal_superblock_t	typeref:typename:__be32[44]
s_qcop	fs/ubifs/ubifs.h	/^	const struct quotactl_ops	*s_qcop;$/;"	m	struct:super_block	typeref:typename:const struct quotactl_ops *
s_readonly_remount	fs/ubifs/ubifs.h	/^	int s_readonly_remount;$/;"	m	struct:super_block	typeref:typename:int
s_remove_count	fs/ubifs/ubifs.h	/^	atomic_long_t s_remove_count;$/;"	m	struct:super_block	typeref:typename:atomic_long_t
s_root	fs/ubifs/ubifs.h	/^	struct dentry		*s_root;$/;"	m	struct:super_block	typeref:struct:dentry *
s_root_block	fs/reiserfs/reiserfs_private.h	/^  __u32 s_root_block;			\/* root block number	*\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u32
s_rpmb	drivers/mmc/rpmb.c	/^struct s_rpmb {$/;"	s	file:
s_security	fs/ubifs/ubifs.h	/^	void                    *s_security;$/;"	m	struct:super_block	typeref:typename:void *
s_sequence	fs/ext4/ext4_journal.h	/^	__be32 s_sequence;	\/* first commit ID expected in log *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_shrink	fs/ubifs/ubifs.h	/^	struct shrinker s_shrink;	\/* per-sb shrinker handle *\/$/;"	m	struct:super_block	typeref:struct:shrinker
s_start	fs/ext4/ext4_journal.h	/^	__be32 s_start;		\/* blocknr of start of log *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__be32
s_state	drivers/misc/cros_ec_sandbox.c	/^} s_state, *g_state;$/;"	v	typeref:struct:ec_state
s_state	fs/reiserfs/reiserfs_private.h	/^  __u16 s_state;			\/* valid or error	*\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_subtype	fs/ubifs/ubifs.h	/^	char *s_subtype;$/;"	m	struct:super_block	typeref:typename:char *
s_time_gran	fs/ubifs/ubifs.h	/^	u32		   s_time_gran;$/;"	m	struct:super_block	typeref:typename:u32
s_tree_height	fs/reiserfs/reiserfs_private.h	/^  __u16 s_tree_height;			\/* height of disk tree *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_type	fs/ubifs/ubifs.h	/^	struct file_system_type	*s_type;$/;"	m	struct:super_block	typeref:struct:file_system_type *
s_uart1_baud	arch/sparc/cpu/leon2/prom.c	/^	char s_uart1_baud[11];$/;"	m	struct:leon_prom_info	typeref:typename:char[11]	file:
s_uart1_baud	arch/sparc/cpu/leon3/prom.c	/^	char s_uart1_baud[11];$/;"	m	struct:leon_prom_info	typeref:typename:char[11]	file:
s_uart2_baud	arch/sparc/cpu/leon2/prom.c	/^	char s_uart2_baud[11];$/;"	m	struct:leon_prom_info	typeref:typename:char[11]	file:
s_uart2_baud	arch/sparc/cpu/leon3/prom.c	/^	char s_uart2_baud[11];$/;"	m	struct:leon_prom_info	typeref:typename:char[11]	file:
s_umount	fs/ubifs/ubifs.h	/^	struct rw_semaphore	s_umount;$/;"	m	struct:super_block	typeref:struct:rw_semaphore
s_umount_key	fs/ubifs/ubifs.h	/^	struct lock_class_key s_umount_key;$/;"	m	struct:file_system_type	typeref:struct:lock_class_key
s_unused	fs/reiserfs/reiserfs_private.h	/^  char s_unused[128];			\/* zero filled by mkreiserfs *\/$/;"	m	struct:reiserfs_super_block	typeref:typename:char[128]
s_users	fs/ext4/ext4_journal.h	/^	__u8 s_users[16 * 48];	\/* ids of all fs'es sharing the log *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__u8[]
s_uuid	fs/ext4/ext4_journal.h	/^	__u8 s_uuid[16];	\/* 128-bit uuid for journal *\/$/;"	m	struct:journal_superblock_t	typeref:typename:__u8[16]
s_uuid	fs/ubifs/ubifs.h	/^	u8 s_uuid[16];				\/* UUID *\/$/;"	m	struct:super_block	typeref:typename:u8[16]
s_version	fs/reiserfs/reiserfs_private.h	/^  __u16 s_version;$/;"	m	struct:reiserfs_super_block	typeref:typename:__u16
s_vfs_rename_key	fs/ubifs/ubifs.h	/^	struct lock_class_key s_vfs_rename_key;$/;"	m	struct:file_system_type	typeref:struct:lock_class_key
s_vfs_rename_mutex	fs/ubifs/ubifs.h	/^	struct mutex s_vfs_rename_mutex;	\/* Kludge *\/$/;"	m	struct:super_block	typeref:struct:mutex
s_writers	fs/ubifs/ubifs.h	/^	struct sb_writers	s_writers;$/;"	m	struct:super_block	typeref:struct:sb_writers
s_writers_key	fs/ubifs/ubifs.h	/^	struct lock_class_key s_writers_key[SB_FREEZE_LEVELS];$/;"	m	struct:file_system_type	typeref:struct:lock_class_key[]
s_xattr	fs/ubifs/ubifs.h	/^	const struct xattr_handler **s_xattr;$/;"	m	struct:super_block	typeref:typename:const struct xattr_handler **
sa	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short sa;              \/* 0xAC *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sa	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short sa;	\/* 0x2C *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sa	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short sa;		\/* 0xAC *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sa	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short sa;		\/* 0xAC *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sa	arch/powerpc/include/asm/signal.h	/^	struct sigaction sa;$/;"	m	struct:k_sigaction	typeref:struct:sigaction
sa0	drivers/net/lpc32xx_eth.c	/^	u32 sa0;		\/* Station address register 0 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
sa0	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic sa0;  \/* 0x300 *\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
sa1	drivers/net/lpc32xx_eth.c	/^	u32 sa1;		\/* Station address register 1 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
sa1	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic sa1;  \/* 0x310 *\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
sa1h	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa1h;$/;"	m	struct:at91_emac	typeref:typename:u32
sa1l	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa1l;$/;"	m	struct:at91_emac	typeref:typename:u32
sa2	drivers/net/lpc32xx_eth.c	/^	u32 sa2;		\/* Station address register 2 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
sa2	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic sa2;  \/* 0x320 *\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
sa2h	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa2h;$/;"	m	struct:at91_emac	typeref:typename:u32
sa2l	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa2l;$/;"	m	struct:at91_emac	typeref:typename:u32
sa3h	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa3h;$/;"	m	struct:at91_emac	typeref:typename:u32
sa3l	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa3l;$/;"	m	struct:at91_emac	typeref:typename:u32
sa4h	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa4h;$/;"	m	struct:at91_emac	typeref:typename:u32
sa4l	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sa4l;$/;"	m	struct:at91_emac	typeref:typename:u32
sa_flags	arch/powerpc/include/asm/signal.h	/^	unsigned long sa_flags;$/;"	m	struct:old_sigaction	typeref:typename:unsigned long
sa_flags	arch/powerpc/include/asm/signal.h	/^	unsigned long sa_flags;$/;"	m	struct:sigaction	typeref:typename:unsigned long
sa_handler	arch/powerpc/include/asm/signal.h	/^	__sighandler_t sa_handler;$/;"	m	struct:old_sigaction	typeref:typename:__sighandler_t
sa_handler	arch/powerpc/include/asm/signal.h	/^	__sighandler_t sa_handler;$/;"	m	struct:sigaction	typeref:typename:__sighandler_t
sa_hdr_phys	include/zfs/sa_impl.h	/^typedef struct sa_hdr_phys {$/;"	s
sa_hdr_phys_t	include/zfs/sa_impl.h	/^} sa_hdr_phys_t;$/;"	t	typeref:struct:sa_hdr_phys
sa_hi	drivers/net/cpsw.c	/^	u32	sa_hi;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
sa_layout_info	include/zfs/sa_impl.h	/^	uint16_t sa_layout_info;$/;"	m	struct:sa_hdr_phys	typeref:typename:uint16_t
sa_lengths	include/zfs/sa_impl.h	/^	uint16_t sa_lengths[1];$/;"	m	struct:sa_hdr_phys	typeref:typename:uint16_t[1]
sa_lo	drivers/net/cpsw.c	/^	u32	sa_lo;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
sa_magic	include/zfs/sa_impl.h	/^	uint32_t sa_magic;$/;"	m	struct:sa_hdr_phys	typeref:typename:uint32_t
sa_mask	arch/powerpc/include/asm/signal.h	/^	old_sigset_t sa_mask;$/;"	m	struct:old_sigaction	typeref:typename:old_sigset_t
sa_mask	arch/powerpc/include/asm/signal.h	/^	sigset_t sa_mask;		\/* mask last for extensibility *\/$/;"	m	struct:sigaction	typeref:typename:sigset_t
sa_restorer	arch/powerpc/include/asm/signal.h	/^	void (*sa_restorer)(void);$/;"	m	struct:old_sigaction	typeref:typename:void (*)(void)
sa_restorer	arch/powerpc/include/asm/signal.h	/^	void (*sa_restorer)(void);$/;"	m	struct:sigaction	typeref:typename:void (*)(void)
sacr	arch/arm/mach-socfpga/include/mach/scu.h	/^	u32	sacr;$/;"	m	struct:scu_registers	typeref:typename:u32
sact	drivers/block/dwc_ahsata.c	/^	u32 sact;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
sactive	drivers/block/sata_dwc.h	/^	u32			sactive;$/;"	m	struct:ata_link	typeref:typename:u32
saddr	arch/m68k/include/asm/coldfire/edma.h	/^	u32 saddr;		\/* 0x00 Source Address *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u32
saddr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 saddr;		\/* 0x08 PMECC Start Address Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
safe_mem	board/keymile/common/common.h	/^	u8	safe_mem;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
sai1	arch/arm/dts/imx6ull.dtsi	/^				sai1: sai@02028000 {$/;"	l	label:aips1
sai1	arch/arm/dts/ls1021a.dtsi	/^		sai1: sai@2b50000 {$/;"	l
sai2	arch/arm/dts/imx6ull.dtsi	/^				sai2: sai@0202c000 {$/;"	l	label:aips1
sai2	arch/arm/dts/ls1021a.dtsi	/^		sai2: sai@2b60000 {$/;"	l
sai3	arch/arm/dts/imx6ull.dtsi	/^				sai3: sai@02030000 {$/;"	l	label:aips1
sai_clk	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 sai_clk;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sai_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 sai_freq;		\/* offset 0x20 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
sam9x5_periph_clk_bind	drivers/clk/at91/clk-peripheral.c	/^static int sam9x5_periph_clk_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sam9x5_periph_clk_match	drivers/clk/at91/clk-peripheral.c	/^static const struct udevice_id sam9x5_periph_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sama5d2_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata sama5d2_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
sama5d3_xplained_mci0_hw_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^static void sama5d3_xplained_mci0_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d3_xplained_nand_hw_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^void sama5d3_xplained_nand_hw_init(void)$/;"	f	typeref:typename:void
sama5d3_xplained_usb_hw_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^static void sama5d3_xplained_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d3xek_lcd_hw_init	board/atmel/sama5d3xek/sama5d3xek.c	/^static void sama5d3xek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d3xek_mci_hw_init	board/atmel/sama5d3xek/sama5d3xek.c	/^static void sama5d3xek_mci_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d3xek_nand_hw_init	board/atmel/sama5d3xek/sama5d3xek.c	/^void sama5d3xek_nand_hw_init(void)$/;"	f	typeref:typename:void
sama5d3xek_nor_hw_init	board/atmel/sama5d3xek/sama5d3xek.c	/^static void sama5d3xek_nor_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d3xek_usb_hw_init	board/atmel/sama5d3xek/sama5d3xek.c	/^static void sama5d3xek_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4_config	drivers/i2c/at91_i2c.c	/^static const struct at91_i2c_pdata sama5d4_config = {$/;"	v	typeref:typename:const struct at91_i2c_pdata	file:
sama5d4_h32mx_clk_get_rate	drivers/clk/at91/clk-h32mx.c	/^static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
sama5d4_h32mx_clk_match	drivers/clk/at91/clk-h32mx.c	/^static const struct udevice_id sama5d4_h32mx_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sama5d4_h32mx_clk_ops	drivers/clk/at91/clk-h32mx.c	/^static struct clk_ops sama5d4_h32mx_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
sama5d4_h32mx_clk_probe	drivers/clk/at91/clk-h32mx.c	/^static int sama5d4_h32mx_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sama5d4_xplained_lcd_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^static void sama5d4_xplained_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4_xplained_macb0_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void sama5d4_xplained_macb0_hw_init(void)$/;"	f	typeref:typename:void
sama5d4_xplained_mci1_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void sama5d4_xplained_mci1_hw_init(void)$/;"	f	typeref:typename:void
sama5d4_xplained_nand_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^static void sama5d4_xplained_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4_xplained_serial3_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^static void sama5d4_xplained_serial3_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4_xplained_spi0_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^static void sama5d4_xplained_spi0_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4_xplained_usb_hw_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^static void sama5d4_xplained_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4ek_lcd_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^static void sama5d4ek_lcd_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4ek_macb0_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^void sama5d4ek_macb0_hw_init(void)$/;"	f	typeref:typename:void
sama5d4ek_mci1_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^void sama5d4ek_mci1_hw_init(void)$/;"	f	typeref:typename:void
sama5d4ek_nand_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^static void sama5d4ek_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4ek_serial3_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^static void sama5d4ek_serial3_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4ek_spi0_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^static void sama5d4ek_spi0_hw_init(void)$/;"	f	typeref:typename:void	file:
sama5d4ek_usb_hw_init	board/atmel/sama5d4ek/sama5d4ek.c	/^static void sama5d4ek_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
sample_dqs	arch/x86/cpu/quark/mrc_util.c	/^uint32_t sample_dqs(struct mrc_params *mrc_params, uint8_t channel,$/;"	f	typeref:typename:uint32_t
sampling_internal	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 sampling_internal;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
samplingrate	include/i2s.h	/^	unsigned int samplingrate;	\/* sampling rate *\/$/;"	m	struct:i2stx_info	typeref:typename:unsigned int
samsung_onenand	include/linux/mtd/samsung_onenand.h	/^struct samsung_onenand {$/;"	s
samsung_pin_bank_data	drivers/pinctrl/exynos/pinctrl-exynos.h	/^struct samsung_pin_bank_data {$/;"	s
samsung_pin_ctrl	drivers/pinctrl/exynos/pinctrl-exynos.h	/^struct samsung_pin_ctrl {$/;"	s
sandbox_adc_channel_data	drivers/adc/sandbox.c	/^int sandbox_adc_channel_data(struct udevice *dev, int channel,$/;"	f	typeref:typename:int
sandbox_adc_channels_data	drivers/adc/sandbox.c	/^int sandbox_adc_channels_data(struct udevice *dev, unsigned int channel_mask,$/;"	f	typeref:typename:int
sandbox_adc_ids	drivers/adc/sandbox.c	/^static const struct udevice_id sandbox_adc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_adc_mode	include/sandbox-adc.h	/^enum sandbox_adc_mode {$/;"	g
sandbox_adc_ofdata_to_platdata	drivers/adc/sandbox.c	/^int sandbox_adc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_adc_ops	drivers/adc/sandbox.c	/^static const struct adc_ops sandbox_adc_ops = {$/;"	v	typeref:typename:const struct adc_ops	file:
sandbox_adc_priv	drivers/adc/sandbox.c	/^struct sandbox_adc_priv {$/;"	s	file:
sandbox_adc_probe	drivers/adc/sandbox.c	/^int sandbox_adc_probe(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_adc_start_channel	drivers/adc/sandbox.c	/^int sandbox_adc_start_channel(struct udevice *dev, int channel)$/;"	f	typeref:typename:int
sandbox_adc_start_channels	drivers/adc/sandbox.c	/^int sandbox_adc_start_channels(struct udevice *dev, unsigned int channel_mask)$/;"	f	typeref:typename:int
sandbox_adc_status	include/sandbox-adc.h	/^enum sandbox_adc_status {$/;"	g
sandbox_adc_stop	drivers/adc/sandbox.c	/^int sandbox_adc_stop(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_alloc_device	drivers/usb/host/usb-sandbox.c	/^static int sandbox_alloc_device(struct udevice *dev, struct usb_device *udev)$/;"	f	typeref:typename:int	file:
sandbox_buck_modes	drivers/power/regulator/sandbox.c	/^static struct dm_regulator_mode sandbox_buck_modes[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
sandbox_buck_ops	drivers/power/regulator/sandbox.c	/^static const struct dm_regulator_ops sandbox_buck_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
sandbox_buck_probe	drivers/power/regulator/sandbox.c	/^static int sandbox_buck_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_child_post_bind	drivers/usb/emul/sandbox_hub.c	/^static int sandbox_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_clk_disable	drivers/clk/clk_sandbox.c	/^static int sandbox_clk_disable(struct clk *clk)$/;"	f	typeref:typename:int	file:
sandbox_clk_enable	drivers/clk/clk_sandbox.c	/^static int sandbox_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
sandbox_clk_get_rate	drivers/clk/clk_sandbox.c	/^static ulong sandbox_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
sandbox_clk_id	arch/sandbox/include/asm/clk.h	/^enum sandbox_clk_id {$/;"	g
sandbox_clk_ids	drivers/clk/clk_sandbox.c	/^static const struct udevice_id sandbox_clk_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_clk_ops	drivers/clk/clk_sandbox.c	/^static struct clk_ops sandbox_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
sandbox_clk_priv	drivers/clk/clk_sandbox.c	/^struct sandbox_clk_priv {$/;"	s	file:
sandbox_clk_query_enable	drivers/clk/clk_sandbox.c	/^int sandbox_clk_query_enable(struct udevice *dev, int id)$/;"	f	typeref:typename:int
sandbox_clk_query_rate	drivers/clk/clk_sandbox.c	/^ulong sandbox_clk_query_rate(struct udevice *dev, int id)$/;"	f	typeref:typename:ulong
sandbox_clk_set_rate	drivers/clk/clk_sandbox.c	/^static ulong sandbox_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
sandbox_clk_test	drivers/clk/clk_sandbox_test.c	/^struct sandbox_clk_test {$/;"	s	file:
sandbox_clk_test_disable	drivers/clk/clk_sandbox_test.c	/^int sandbox_clk_test_disable(struct udevice *dev, int id)$/;"	f	typeref:typename:int
sandbox_clk_test_enable	drivers/clk/clk_sandbox_test.c	/^int sandbox_clk_test_enable(struct udevice *dev, int id)$/;"	f	typeref:typename:int
sandbox_clk_test_free	drivers/clk/clk_sandbox_test.c	/^int sandbox_clk_test_free(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_clk_test_get	drivers/clk/clk_sandbox_test.c	/^int sandbox_clk_test_get(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_clk_test_get_rate	drivers/clk/clk_sandbox_test.c	/^ulong sandbox_clk_test_get_rate(struct udevice *dev, int id)$/;"	f	typeref:typename:ulong
sandbox_clk_test_id	arch/sandbox/include/asm/clk.h	/^enum sandbox_clk_test_id {$/;"	g
sandbox_clk_test_ids	drivers/clk/clk_sandbox_test.c	/^static const struct udevice_id sandbox_clk_test_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_clk_test_names	drivers/clk/clk_sandbox_test.c	/^static const char * const sandbox_clk_test_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
sandbox_clk_test_set_rate	drivers/clk/clk_sandbox_test.c	/^ulong sandbox_clk_test_set_rate(struct udevice *dev, int id, ulong rate)$/;"	f	typeref:typename:ulong
sandbox_cmdline_cb_boot	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_boot(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_command	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_command(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_default_fdt	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_default_fdt(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_fdt	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_fdt(struct sandbox_state *state, const char *arg)$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_help	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_help(struct sandbox_state *state, const char *arg)$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_ignore_missing	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_ignore_missing(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_interactive	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_interactive(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_jump	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_jump(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_memory	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_memory(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_read	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_read(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_rm_memory	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_rm_memory(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_show_lcd	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_show_lcd(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_spi_sf	drivers/mtd/spi/sandbox.c	/^static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_state	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_state(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_terminal	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_terminal(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_verbose	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_verbose(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_cb_write	arch/sandbox/cpu/start.c	/^static int sandbox_cmdline_cb_write(struct sandbox_state *state,$/;"	f	typeref:typename:int	file:
sandbox_cmdline_option	arch/sandbox/include/asm/getopt.h	/^struct sandbox_cmdline_option {$/;"	s
sandbox_conf_params	drivers/pinctrl/pinctrl-sandbox.c	/^static const struct pinconf_param sandbox_conf_params[] = {$/;"	v	typeref:typename:const struct pinconf_param[]	file:
sandbox_cs_info	drivers/spi/sandbox_spi.c	/^static int sandbox_cs_info(struct udevice *bus, uint cs,$/;"	f	typeref:typename:int	file:
sandbox_dev_move_to_state	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_dev_move_to_state(struct udevice *dev,$/;"	f	typeref:typename:int	file:
sandbox_early_getopt_check	arch/sandbox/cpu/start.c	/^int sandbox_early_getopt_check(void)$/;"	f	typeref:typename:int
sandbox_emul_fake_regs	drivers/spmi/spmi-sandbox.c	/^struct sandbox_emul_fake_regs {$/;"	s	file:
sandbox_emul_gpio	drivers/spmi/spmi-sandbox.c	/^struct sandbox_emul_gpio {$/;"	s	file:
sandbox_erase_part	drivers/mtd/spi/sandbox.c	/^int sandbox_erase_part(struct sandbox_spi_flash *sbsf, int size)$/;"	f	typeref:typename:int
sandbox_eth_disable_response	drivers/net/sandbox.c	/^void sandbox_eth_disable_response(int index, bool disable)$/;"	f	typeref:typename:void
sandbox_eth_raw_os_recv	arch/sandbox/cpu/eth-raw-os.c	/^int sandbox_eth_raw_os_recv(void *packet, int *length,$/;"	f	typeref:typename:int
sandbox_eth_raw_os_send	arch/sandbox/cpu/eth-raw-os.c	/^int sandbox_eth_raw_os_send(void *packet, int length,$/;"	f	typeref:typename:int
sandbox_eth_raw_os_start	arch/sandbox/cpu/eth-raw-os.c	/^int sandbox_eth_raw_os_start(const char *ifname, unsigned char *ethmac,$/;"	f	typeref:typename:int
sandbox_eth_raw_os_stop	arch/sandbox/cpu/eth-raw-os.c	/^void sandbox_eth_raw_os_stop(struct eth_sandbox_raw_priv *priv)$/;"	f	typeref:typename:void
sandbox_eth_skip_timeout	drivers/net/sandbox.c	/^void sandbox_eth_skip_timeout(void)$/;"	f	typeref:typename:void
sandbox_exit	arch/sandbox/cpu/cpu.c	/^void sandbox_exit(void)$/;"	f	typeref:typename:void
sandbox_flash_bind	drivers/usb/emul/sandbox_flash.c	/^static int sandbox_flash_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_flash_bulk	drivers/usb/emul/sandbox_flash.c	/^static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
sandbox_flash_control	drivers/usb/emul/sandbox_flash.c	/^static int sandbox_flash_control(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
sandbox_flash_ofdata_to_platdata	drivers/usb/emul/sandbox_flash.c	/^static int sandbox_flash_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_flash_plat	drivers/usb/emul/sandbox_flash.c	/^struct sandbox_flash_plat {$/;"	s	file:
sandbox_flash_priv	drivers/usb/emul/sandbox_flash.c	/^struct sandbox_flash_priv {$/;"	s	file:
sandbox_flash_probe	drivers/usb/emul/sandbox_flash.c	/^static int sandbox_flash_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_fs_close	fs/sandbox/sandboxfs.c	/^void sandbox_fs_close(void)$/;"	f	typeref:typename:void
sandbox_fs_exists	fs/sandbox/sandboxfs.c	/^int sandbox_fs_exists(const char *filename)$/;"	f	typeref:typename:int
sandbox_fs_ls	fs/sandbox/sandboxfs.c	/^int sandbox_fs_ls(const char *dirname)$/;"	f	typeref:typename:int
sandbox_fs_read_at	fs/sandbox/sandboxfs.c	/^int sandbox_fs_read_at(const char *filename, loff_t pos, void *buffer,$/;"	f	typeref:typename:int
sandbox_fs_set_blk_dev	fs/sandbox/sandboxfs.c	/^int sandbox_fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)$/;"	f	typeref:typename:int
sandbox_fs_size	fs/sandbox/sandboxfs.c	/^int sandbox_fs_size(const char *filename, loff_t *size)$/;"	f	typeref:typename:int
sandbox_fs_write_at	fs/sandbox/sandboxfs.c	/^int sandbox_fs_write_at(const char *filename, loff_t pos, void *buffer,$/;"	f	typeref:typename:int
sandbox_functions	drivers/pinctrl/pinctrl-sandbox.c	/^static const char * const sandbox_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
sandbox_get_function_name	drivers/pinctrl/pinctrl-sandbox.c	/^static const char *sandbox_get_function_name(struct udevice *dev,$/;"	f	typeref:typename:const char *	file:
sandbox_get_functions_count	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_get_functions_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_get_group_name	drivers/pinctrl/pinctrl-sandbox.c	/^static const char *sandbox_get_group_name(struct udevice *dev,$/;"	f	typeref:typename:const char *	file:
sandbox_get_groups_count	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_get_groups_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_get_info	drivers/ram/sandbox_ram.c	/^static int sandbox_get_info(struct udevice *dev, struct ram_info *info)$/;"	f	typeref:typename:int	file:
sandbox_get_pin_name	drivers/pinctrl/pinctrl-sandbox.c	/^static const char *sandbox_get_pin_name(struct udevice *dev, unsigned selector)$/;"	f	typeref:typename:const char *	file:
sandbox_get_pins_count	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_get_pins_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_gpio_get_direction	drivers/gpio/sandbox.c	/^int sandbox_gpio_get_direction(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int
sandbox_gpio_get_open_drain	drivers/gpio/sandbox.c	/^int sandbox_gpio_get_open_drain(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int
sandbox_gpio_get_value	drivers/gpio/sandbox.c	/^int sandbox_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int
sandbox_gpio_ids	drivers/gpio/sandbox.c	/^static const struct udevice_id sandbox_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_gpio_ofdata_to_platdata	drivers/gpio/sandbox.c	/^static int sandbox_gpio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_gpio_set_direction	drivers/gpio/sandbox.c	/^int sandbox_gpio_set_direction(struct udevice *dev, unsigned offset, int output)$/;"	f	typeref:typename:int
sandbox_gpio_set_open_drain	drivers/gpio/sandbox.c	/^int sandbox_gpio_set_open_drain(struct udevice *dev, unsigned offset, int value)$/;"	f	typeref:typename:int
sandbox_gpio_set_value	drivers/gpio/sandbox.c	/^int sandbox_gpio_set_value(struct udevice *dev, unsigned offset, int value)$/;"	f	typeref:typename:int
sandbox_groups	drivers/pinctrl/pinctrl-sandbox.c	/^static const char * const sandbox_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
sandbox_host_blk_ops	drivers/block/sandbox.c	/^static const struct blk_ops sandbox_host_blk_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
sandbox_hub_bind	drivers/usb/emul/sandbox_hub.c	/^static int sandbox_hub_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_hub_platdata	drivers/usb/emul/sandbox_hub.c	/^struct sandbox_hub_platdata {$/;"	s	file:
sandbox_hub_priv	drivers/usb/emul/sandbox_hub.c	/^struct sandbox_hub_priv {$/;"	s	file:
sandbox_hub_submit_control_msg	drivers/usb/emul/sandbox_hub.c	/^static int sandbox_hub_submit_control_msg(struct udevice *bus,$/;"	f	typeref:typename:int	file:
sandbox_i2c_eeprom_ofdata_to_platdata	drivers/misc/i2c_eeprom_emul.c	/^static int sandbox_i2c_eeprom_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_i2c_eeprom_probe	drivers/misc/i2c_eeprom_emul.c	/^static int sandbox_i2c_eeprom_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_i2c_eeprom_remove	drivers/misc/i2c_eeprom_emul.c	/^static int sandbox_i2c_eeprom_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_i2c_eeprom_set_offset_len	drivers/misc/i2c_eeprom_emul.c	/^void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len)$/;"	f	typeref:typename:void
sandbox_i2c_eeprom_set_test_mode	drivers/misc/i2c_eeprom_emul.c	/^void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,$/;"	f	typeref:typename:void
sandbox_i2c_eeprom_test_mode	arch/sandbox/include/asm/test.h	/^enum sandbox_i2c_eeprom_test_mode {$/;"	g
sandbox_i2c_eeprom_xfer	drivers/misc/i2c_eeprom_emul.c	/^static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
sandbox_i2c_emul_ops	drivers/misc/i2c_eeprom_emul.c	/^struct dm_i2c_ops sandbox_i2c_emul_ops = {$/;"	v	typeref:struct:dm_i2c_ops
sandbox_i2c_flash	drivers/misc/i2c_eeprom_emul.c	/^struct sandbox_i2c_flash {$/;"	s	file:
sandbox_i2c_flash_plat_data	drivers/misc/i2c_eeprom_emul.c	/^struct sandbox_i2c_flash_plat_data {$/;"	s	file:
sandbox_i2c_ids	drivers/i2c/sandbox_i2c.c	/^static const struct udevice_id sandbox_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_i2c_ids	drivers/misc/i2c_eeprom_emul.c	/^static const struct udevice_id sandbox_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_i2c_ops	drivers/i2c/sandbox_i2c.c	/^static const struct dm_i2c_ops sandbox_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
sandbox_i2c_pmic_emul_ops	drivers/power/pmic/i2c_pmic_emul.c	/^struct dm_i2c_ops sandbox_i2c_pmic_emul_ops = {$/;"	v	typeref:struct:dm_i2c_ops
sandbox_i2c_pmic_ids	drivers/power/pmic/i2c_pmic_emul.c	/^static const struct udevice_id sandbox_i2c_pmic_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_i2c_pmic_ofdata_to_platdata	drivers/power/pmic/i2c_pmic_emul.c	/^static int sandbox_i2c_pmic_ofdata_to_platdata(struct udevice *emul)$/;"	f	typeref:typename:int	file:
sandbox_i2c_pmic_plat_data	drivers/power/pmic/i2c_pmic_emul.c	/^struct sandbox_i2c_pmic_plat_data {$/;"	s	file:
sandbox_i2c_pmic_read_data	drivers/power/pmic/i2c_pmic_emul.c	/^static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip,$/;"	f	typeref:typename:int	file:
sandbox_i2c_pmic_write_data	drivers/power/pmic/i2c_pmic_emul.c	/^static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip,$/;"	f	typeref:typename:int	file:
sandbox_i2c_pmic_xfer	drivers/power/pmic/i2c_pmic_emul.c	/^static int sandbox_i2c_pmic_xfer(struct udevice *emul, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
sandbox_i2c_priv	drivers/i2c/sandbox_i2c.c	/^struct sandbox_i2c_priv {$/;"	s	file:
sandbox_i2c_rtc	drivers/rtc/i2c_rtc_emul.c	/^struct sandbox_i2c_rtc {$/;"	s	file:
sandbox_i2c_rtc_bind	drivers/rtc/i2c_rtc_emul.c	/^static int sandbox_i2c_rtc_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_i2c_rtc_complete_write	drivers/rtc/i2c_rtc_emul.c	/^static int sandbox_i2c_rtc_complete_write(struct udevice *emul)$/;"	f	typeref:typename:int	file:
sandbox_i2c_rtc_emul_ops	drivers/rtc/i2c_rtc_emul.c	/^struct dm_i2c_ops sandbox_i2c_rtc_emul_ops = {$/;"	v	typeref:struct:dm_i2c_ops
sandbox_i2c_rtc_get	drivers/rtc/i2c_rtc_emul.c	/^static int sandbox_i2c_rtc_get(struct udevice *dev, struct rtc_time *time)$/;"	f	typeref:typename:int	file:
sandbox_i2c_rtc_get_set_base_time	drivers/rtc/i2c_rtc_emul.c	/^long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time)$/;"	f	typeref:typename:long
sandbox_i2c_rtc_ids	drivers/rtc/i2c_rtc_emul.c	/^static const struct udevice_id sandbox_i2c_rtc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_i2c_rtc_plat_data	drivers/rtc/i2c_rtc_emul.c	/^struct sandbox_i2c_rtc_plat_data {$/;"	s	file:
sandbox_i2c_rtc_prepare_read	drivers/rtc/i2c_rtc_emul.c	/^static int sandbox_i2c_rtc_prepare_read(struct udevice *emul)$/;"	f	typeref:typename:int	file:
sandbox_i2c_rtc_set	drivers/rtc/i2c_rtc_emul.c	/^static int sandbox_i2c_rtc_set(struct udevice *dev, const struct rtc_time *time)$/;"	f	typeref:typename:int	file:
sandbox_i2c_rtc_set_offset	drivers/rtc/i2c_rtc_emul.c	/^long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time,$/;"	f	typeref:typename:long
sandbox_i2c_rtc_xfer	drivers/rtc/i2c_rtc_emul.c	/^static int sandbox_i2c_rtc_xfer(struct udevice *emul, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
sandbox_i2c_set_test_mode	drivers/i2c/sandbox_i2c.c	/^void sandbox_i2c_set_test_mode(struct udevice *bus, bool test_mode)$/;"	f	typeref:typename:void
sandbox_i2c_xfer	drivers/i2c/sandbox_i2c.c	/^static int sandbox_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
sandbox_ids	drivers/remoteproc/sandbox_testproc.c	/^static const struct udevice_id sandbox_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_keyb_bind	drivers/usb/emul/sandbox_keyb.c	/^static int sandbox_keyb_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_keyb_control	drivers/usb/emul/sandbox_keyb.c	/^static int sandbox_keyb_control(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
sandbox_keyb_interrupt	drivers/usb/emul/sandbox_keyb.c	/^static int sandbox_keyb_interrupt(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
sandbox_keyb_plat	drivers/usb/emul/sandbox_keyb.c	/^struct sandbox_keyb_plat {$/;"	s	file:
sandbox_keyb_priv	drivers/usb/emul/sandbox_keyb.c	/^struct sandbox_keyb_priv {$/;"	s	file:
sandbox_keyb_probe	drivers/usb/emul/sandbox_keyb.c	/^static int sandbox_keyb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_ldo_modes	drivers/power/regulator/sandbox.c	/^static struct dm_regulator_mode sandbox_ldo_modes[] = {$/;"	v	typeref:struct:dm_regulator_mode[]	file:
sandbox_ldo_ops	drivers/power/regulator/sandbox.c	/^static const struct dm_regulator_ops sandbox_ldo_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
sandbox_ldo_probe	drivers/power/regulator/sandbox.c	/^static int sandbox_ldo_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_main_loop_init	arch/sandbox/cpu/start.c	/^int sandbox_main_loop_init(void)$/;"	f	typeref:typename:int
sandbox_mbox	drivers/mailbox/sandbox-mbox.c	/^struct sandbox_mbox {$/;"	s	file:
sandbox_mbox_bind	drivers/mailbox/sandbox-mbox.c	/^static int sandbox_mbox_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_mbox_chan	drivers/mailbox/sandbox-mbox.c	/^struct sandbox_mbox_chan {$/;"	s	file:
sandbox_mbox_free	drivers/mailbox/sandbox-mbox.c	/^static int sandbox_mbox_free(struct mbox_chan *chan)$/;"	f	typeref:typename:int	file:
sandbox_mbox_ids	drivers/mailbox/sandbox-mbox.c	/^static const struct udevice_id sandbox_mbox_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_mbox_mbox_ops	drivers/mailbox/sandbox-mbox.c	/^struct mbox_ops sandbox_mbox_mbox_ops = {$/;"	v	typeref:struct:mbox_ops
sandbox_mbox_probe	drivers/mailbox/sandbox-mbox.c	/^static int sandbox_mbox_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_mbox_recv	drivers/mailbox/sandbox-mbox.c	/^static int sandbox_mbox_recv(struct mbox_chan *chan, void *data)$/;"	f	typeref:typename:int	file:
sandbox_mbox_request	drivers/mailbox/sandbox-mbox.c	/^static int sandbox_mbox_request(struct mbox_chan *chan)$/;"	f	typeref:typename:int	file:
sandbox_mbox_send	drivers/mailbox/sandbox-mbox.c	/^static int sandbox_mbox_send(struct mbox_chan *chan, const void *data)$/;"	f	typeref:typename:int	file:
sandbox_mbox_test	drivers/mailbox/sandbox-mbox-test.c	/^struct sandbox_mbox_test {$/;"	s	file:
sandbox_mbox_test_free	drivers/mailbox/sandbox-mbox-test.c	/^int sandbox_mbox_test_free(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_mbox_test_get	drivers/mailbox/sandbox-mbox-test.c	/^int sandbox_mbox_test_get(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_mbox_test_ids	drivers/mailbox/sandbox-mbox-test.c	/^static const struct udevice_id sandbox_mbox_test_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_mbox_test_recv	drivers/mailbox/sandbox-mbox-test.c	/^int sandbox_mbox_test_recv(struct udevice *dev, uint32_t *msg)$/;"	f	typeref:typename:int
sandbox_mbox_test_send	drivers/mailbox/sandbox-mbox-test.c	/^int sandbox_mbox_test_send(struct udevice *dev, uint32_t msg)$/;"	f	typeref:typename:int
sandbox_mmc_bind	drivers/mmc/sandbox_mmc.c	/^int sandbox_mmc_bind(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_mmc_get_cd	drivers/mmc/sandbox_mmc.c	/^static int sandbox_mmc_get_cd(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_mmc_ids	drivers/mmc/sandbox_mmc.c	/^static const struct udevice_id sandbox_mmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_mmc_ops	drivers/mmc/sandbox_mmc.c	/^static const struct dm_mmc_ops sandbox_mmc_ops = {$/;"	v	typeref:typename:const struct dm_mmc_ops	file:
sandbox_mmc_plat	drivers/mmc/sandbox_mmc.c	/^struct sandbox_mmc_plat {$/;"	s	file:
sandbox_mmc_probe	drivers/mmc/sandbox_mmc.c	/^int sandbox_mmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_mmc_send_cmd	drivers/mmc/sandbox_mmc.c	/^static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
sandbox_mmc_set_ios	drivers/mmc/sandbox_mmc.c	/^static int sandbox_mmc_set_ios(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_mmc_unbind	drivers/mmc/sandbox_mmc.c	/^int sandbox_mmc_unbind(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_pci_emul_post_probe	drivers/pci/pci-emul-uclass.c	/^static int sandbox_pci_emul_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_pci_emul_pre_remove	drivers/pci/pci-emul-uclass.c	/^static int sandbox_pci_emul_pre_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_pci_get_emul	drivers/pci/pci-emul-uclass.c	/^int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,$/;"	f	typeref:typename:int
sandbox_pci_ids	drivers/pci/pci_sandbox.c	/^static const struct udevice_id sandbox_pci_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_pci_ops	drivers/pci/pci_sandbox.c	/^static const struct dm_pci_ops sandbox_pci_ops = {$/;"	v	typeref:typename:const struct dm_pci_ops	file:
sandbox_pci_priv	drivers/pci/pci-emul-uclass.c	/^struct sandbox_pci_priv {$/;"	s	file:
sandbox_pci_read_config	drivers/pci/pci_sandbox.c	/^static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn,$/;"	f	typeref:typename:int	file:
sandbox_pci_write_config	drivers/pci/pci_sandbox.c	/^static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn,$/;"	f	typeref:typename:int	file:
sandbox_pinconf_group_set	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_pinconf_group_set(struct udevice *dev,$/;"	f	typeref:typename:int	file:
sandbox_pinconf_set	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_pinconf_set(struct udevice *dev, unsigned pin_selector,$/;"	f	typeref:typename:int	file:
sandbox_pinctrl_match	drivers/pinctrl/pinctrl-sandbox.c	/^static const struct udevice_id sandbox_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_pinctrl_ops	drivers/pinctrl/pinctrl-sandbox.c	/^const struct pinctrl_ops sandbox_pinctrl_ops = {$/;"	v	typeref:typename:const struct pinctrl_ops
sandbox_pinmux_group_set	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_pinmux_group_set(struct udevice *dev,$/;"	f	typeref:typename:int	file:
sandbox_pinmux_set	drivers/pinctrl/pinctrl-sandbox.c	/^static int sandbox_pinmux_set(struct udevice *dev, unsigned pin_selector,$/;"	f	typeref:typename:int	file:
sandbox_pins	drivers/pinctrl/pinctrl-sandbox.c	/^static const char * const sandbox_pins[] = {$/;"	v	typeref:typename:const char * const[]	file:
sandbox_pmic	arch/sandbox/dts/sandbox.dts	/^		sandbox_pmic: sandbox_pmic {$/;"	l
sandbox_pmic	arch/sandbox/dts/test.dts	/^		sandbox_pmic: sandbox_pmic {$/;"	l
sandbox_pmic_bind	drivers/power/pmic/sandbox.c	/^static int sandbox_pmic_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_pmic_ids	drivers/power/pmic/sandbox.c	/^static const struct udevice_id sandbox_pmic_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_pmic_ops	drivers/power/pmic/sandbox.c	/^static struct dm_pmic_ops sandbox_pmic_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
sandbox_pmic_read	drivers/power/pmic/sandbox.c	/^static int sandbox_pmic_read(struct udevice *dev, uint reg,$/;"	f	typeref:typename:int	file:
sandbox_pmic_reg_count	drivers/power/pmic/sandbox.c	/^static int sandbox_pmic_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_pmic_write	drivers/power/pmic/sandbox.c	/^static int sandbox_pmic_write(struct udevice *dev, uint reg,$/;"	f	typeref:typename:int	file:
sandbox_power_domain	drivers/power/domain/sandbox-power-domain.c	/^struct sandbox_power_domain {$/;"	s	file:
sandbox_power_domain_bind	drivers/power/domain/sandbox-power-domain.c	/^static int sandbox_power_domain_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_power_domain_free	drivers/power/domain/sandbox-power-domain.c	/^static int sandbox_power_domain_free(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
sandbox_power_domain_ids	drivers/power/domain/sandbox-power-domain.c	/^static const struct udevice_id sandbox_power_domain_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_power_domain_off	drivers/power/domain/sandbox-power-domain.c	/^static int sandbox_power_domain_off(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
sandbox_power_domain_on	drivers/power/domain/sandbox-power-domain.c	/^static int sandbox_power_domain_on(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
sandbox_power_domain_ops	drivers/power/domain/sandbox-power-domain.c	/^struct power_domain_ops sandbox_power_domain_ops = {$/;"	v	typeref:struct:power_domain_ops
sandbox_power_domain_probe	drivers/power/domain/sandbox-power-domain.c	/^static int sandbox_power_domain_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_power_domain_query	drivers/power/domain/sandbox-power-domain.c	/^int sandbox_power_domain_query(struct udevice *dev, unsigned long id)$/;"	f	typeref:typename:int
sandbox_power_domain_request	drivers/power/domain/sandbox-power-domain.c	/^static int sandbox_power_domain_request(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
sandbox_power_domain_test	drivers/power/domain/sandbox-power-domain-test.c	/^struct sandbox_power_domain_test {$/;"	s	file:
sandbox_power_domain_test_free	drivers/power/domain/sandbox-power-domain-test.c	/^int sandbox_power_domain_test_free(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_power_domain_test_get	drivers/power/domain/sandbox-power-domain-test.c	/^int sandbox_power_domain_test_get(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_power_domain_test_ids	drivers/power/domain/sandbox-power-domain-test.c	/^static const struct udevice_id sandbox_power_domain_test_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_power_domain_test_off	drivers/power/domain/sandbox-power-domain-test.c	/^int sandbox_power_domain_test_off(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_power_domain_test_on	drivers/power/domain/sandbox-power-domain-test.c	/^int sandbox_power_domain_test_on(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_ram_ids	drivers/ram/sandbox_ram.c	/^static const struct udevice_id sandbox_ram_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_ram_ops	drivers/ram/sandbox_ram.c	/^static const struct ram_ops sandbox_ram_ops = {$/;"	v	typeref:typename:const struct ram_ops	file:
sandbox_read_fdt_from_file	arch/sandbox/cpu/cpu.c	/^int sandbox_read_fdt_from_file(void)$/;"	f	typeref:typename:int
sandbox_read_state	arch/sandbox/cpu/state.c	/^int sandbox_read_state(struct sandbox_state *state, const char *fname)$/;"	f	typeref:typename:int
sandbox_read_state_nodes	arch/sandbox/cpu/state.c	/^int sandbox_read_state_nodes(struct sandbox_state *state,$/;"	f	typeref:typename:int
sandbox_reset	drivers/reset/sandbox-reset.c	/^struct sandbox_reset {$/;"	s	file:
sandbox_reset_assert	drivers/reset/sandbox-reset.c	/^static int sandbox_reset_assert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
sandbox_reset_bind	drivers/reset/sandbox-reset.c	/^static int sandbox_reset_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_reset_deassert	drivers/reset/sandbox-reset.c	/^static int sandbox_reset_deassert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
sandbox_reset_free	drivers/reset/sandbox-reset.c	/^static int sandbox_reset_free(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
sandbox_reset_ids	drivers/reset/sandbox-reset.c	/^static const struct udevice_id sandbox_reset_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_reset_probe	drivers/reset/sandbox-reset.c	/^static int sandbox_reset_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_reset_query	drivers/reset/sandbox-reset.c	/^int sandbox_reset_query(struct udevice *dev, unsigned long id)$/;"	f	typeref:typename:int
sandbox_reset_request	drivers/reset/sandbox-reset.c	/^static int sandbox_reset_request(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
sandbox_reset_reset_ops	drivers/reset/sandbox-reset.c	/^struct reset_ops sandbox_reset_reset_ops = {$/;"	v	typeref:struct:reset_ops
sandbox_reset_signal	drivers/reset/sandbox-reset.c	/^struct sandbox_reset_signal {$/;"	s	file:
sandbox_reset_test	drivers/reset/sandbox-reset-test.c	/^struct sandbox_reset_test {$/;"	s	file:
sandbox_reset_test_assert	drivers/reset/sandbox-reset-test.c	/^int sandbox_reset_test_assert(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_reset_test_deassert	drivers/reset/sandbox-reset-test.c	/^int sandbox_reset_test_deassert(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_reset_test_free	drivers/reset/sandbox-reset-test.c	/^int sandbox_reset_test_free(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_reset_test_get	drivers/reset/sandbox-reset-test.c	/^int sandbox_reset_test_get(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_reset_test_ids	drivers/reset/sandbox-reset-test.c	/^static const struct udevice_id sandbox_reset_test_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_rtc_get	drivers/rtc/sandbox_rtc.c	/^static int sandbox_rtc_get(struct udevice *dev, struct rtc_time *time)$/;"	f	typeref:typename:int	file:
sandbox_rtc_ids	drivers/rtc/sandbox_rtc.c	/^static const struct udevice_id sandbox_rtc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_rtc_ops	drivers/rtc/sandbox_rtc.c	/^static const struct rtc_ops sandbox_rtc_ops = {$/;"	v	typeref:typename:const struct rtc_ops	file:
sandbox_rtc_read8	drivers/rtc/sandbox_rtc.c	/^static int sandbox_rtc_read8(struct udevice *dev, unsigned int reg)$/;"	f	typeref:typename:int	file:
sandbox_rtc_reset	drivers/rtc/sandbox_rtc.c	/^static int sandbox_rtc_reset(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_rtc_set	drivers/rtc/sandbox_rtc.c	/^static int sandbox_rtc_set(struct udevice *dev, const struct rtc_time *time)$/;"	f	typeref:typename:int	file:
sandbox_rtc_write8	drivers/rtc/sandbox_rtc.c	/^static int sandbox_rtc_write8(struct udevice *dev, unsigned int reg, int val)$/;"	f	typeref:typename:int	file:
sandbox_sdl_bind	drivers/video/sandbox_sdl.c	/^static int sandbox_sdl_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_sdl_ensure_init	arch/sandbox/cpu/sdl.c	/^static int sandbox_sdl_ensure_init(void)$/;"	f	typeref:typename:int	file:
sandbox_sdl_fill_audio	arch/sandbox/cpu/sdl.c	/^void sandbox_sdl_fill_audio(void *udata, Uint8 *stream, int len)$/;"	f	typeref:typename:void
sandbox_sdl_ids	drivers/video/sandbox_sdl.c	/^static const struct udevice_id sandbox_sdl_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_sdl_init_display	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_init_display(int width, int height, int log2_bpp)$/;"	f	typeref:typename:int
sandbox_sdl_init_display	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_init_display(int width, int height,$/;"	f	typeref:typename:int
sandbox_sdl_key_pressed	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_key_pressed(int keycode)$/;"	f	typeref:typename:int
sandbox_sdl_key_pressed	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_key_pressed(int keycode)$/;"	f	typeref:typename:int
sandbox_sdl_plat	include/dm/test.h	/^struct sandbox_sdl_plat {$/;"	s
sandbox_sdl_poll_events	arch/sandbox/cpu/sdl.c	/^static void sandbox_sdl_poll_events(void)$/;"	f	typeref:typename:void	file:
sandbox_sdl_probe	drivers/video/sandbox_sdl.c	/^static int sandbox_sdl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_sdl_scan_keys	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_scan_keys(int key[], int max_keys)$/;"	f	typeref:typename:int
sandbox_sdl_scan_keys	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_scan_keys(int key[], int max_keys)$/;"	f	typeref:typename:int
sandbox_sdl_sound_init	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_sound_init(void)$/;"	f	typeref:typename:int
sandbox_sdl_sound_init	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_sound_init(void)$/;"	f	typeref:typename:int
sandbox_sdl_sound_start	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_sound_start(uint frequency)$/;"	f	typeref:typename:int
sandbox_sdl_sound_start	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_sound_start(uint frequency)$/;"	f	typeref:typename:int
sandbox_sdl_sound_stop	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_sound_stop(void)$/;"	f	typeref:typename:int
sandbox_sdl_sound_stop	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_sound_stop(void)$/;"	f	typeref:typename:int
sandbox_sdl_sync	arch/sandbox/cpu/sdl.c	/^int sandbox_sdl_sync(void *lcd_base)$/;"	f	typeref:typename:int
sandbox_sdl_sync	arch/sandbox/include/asm/sdl.h	/^static inline int sandbox_sdl_sync(void *lcd_base)$/;"	f	typeref:typename:int
sandbox_serial_getc	drivers/serial/sandbox.c	/^static int sandbox_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_serial_ids	drivers/serial/sandbox.c	/^static const struct udevice_id sandbox_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_serial_ofdata_to_platdata	drivers/serial/sandbox.c	/^static int sandbox_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_serial_ops	drivers/serial/sandbox.c	/^static const struct dm_serial_ops sandbox_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
sandbox_serial_pending	drivers/serial/sandbox.c	/^static int sandbox_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
sandbox_serial_platdata	drivers/serial/sandbox.c	/^struct sandbox_serial_platdata {$/;"	s	file:
sandbox_serial_priv	drivers/serial/sandbox.c	/^struct sandbox_serial_priv {$/;"	s	file:
sandbox_serial_probe	drivers/serial/sandbox.c	/^static int sandbox_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_serial_putc	drivers/serial/sandbox.c	/^static int sandbox_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
sandbox_serial_remove	drivers/serial/sandbox.c	/^static int sandbox_serial_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_set_enable_pci_map	arch/sandbox/cpu/cpu.c	/^void sandbox_set_enable_pci_map(int enable)$/;"	f	typeref:typename:void
sandbox_sf_0xff	drivers/mtd/spi/sandbox.c	/^static u8 sandbox_sf_0xff[0x1000];$/;"	v	typeref:typename:u8[0x1000]	file:
sandbox_sf_bind_bus_cs	drivers/mtd/spi/sandbox.c	/^static int sandbox_sf_bind_bus_cs(struct sandbox_state *state, int busnum,$/;"	f	typeref:typename:int	file:
sandbox_sf_bind_emul	drivers/mtd/spi/sandbox.c	/^int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,$/;"	f	typeref:typename:int
sandbox_sf_cs_activate	drivers/mtd/spi/sandbox.c	/^static void sandbox_sf_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sandbox_sf_cs_deactivate	drivers/mtd/spi/sandbox.c	/^static void sandbox_sf_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sandbox_sf_emul_ops	drivers/mtd/spi/sandbox.c	/^static const struct dm_spi_emul_ops sandbox_sf_emul_ops = {$/;"	v	typeref:typename:const struct dm_spi_emul_ops	file:
sandbox_sf_ids	drivers/mtd/spi/sandbox.c	/^static const struct udevice_id sandbox_sf_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_sf_ofdata_to_platdata	drivers/mtd/spi/sandbox.c	/^int sandbox_sf_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int
sandbox_sf_probe	drivers/mtd/spi/sandbox.c	/^static int sandbox_sf_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_sf_process_cmd	drivers/mtd/spi/sandbox.c	/^static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,$/;"	f	typeref:typename:int	file:
sandbox_sf_remove	drivers/mtd/spi/sandbox.c	/^static int sandbox_sf_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_sf_state	drivers/mtd/spi/sandbox.c	/^enum sandbox_sf_state {$/;"	g	file:
sandbox_sf_state_name	drivers/mtd/spi/sandbox.c	/^static const char *sandbox_sf_state_name(enum sandbox_sf_state state)$/;"	f	typeref:typename:const char *	file:
sandbox_sf_unbind_emul	drivers/mtd/spi/sandbox.c	/^void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs)$/;"	f	typeref:typename:void
sandbox_sf_xfer	drivers/mtd/spi/sandbox.c	/^static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
sandbox_spi_emu_ops	arch/sandbox/include/asm/spi.h	/^struct sandbox_spi_emu_ops {$/;"	s
sandbox_spi_flash	drivers/mtd/spi/sandbox.c	/^struct sandbox_spi_flash {$/;"	s	file:
sandbox_spi_flash_plat_data	drivers/mtd/spi/sandbox.c	/^struct sandbox_spi_flash_plat_data {$/;"	s	file:
sandbox_spi_get_emul	drivers/mtd/spi/sandbox.c	/^int sandbox_spi_get_emul(struct sandbox_state *state,$/;"	f	typeref:typename:int
sandbox_spi_get_emul	drivers/spi/sandbox_spi.c	/^__weak int sandbox_spi_get_emul(struct sandbox_state *state,$/;"	f	typeref:typename:__weak int
sandbox_spi_ids	drivers/spi/sandbox_spi.c	/^static const struct udevice_id sandbox_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_spi_info	arch/sandbox/include/asm/state.h	/^struct sandbox_spi_info {$/;"	s
sandbox_spi_ops	drivers/spi/sandbox_spi.c	/^static const struct dm_spi_ops sandbox_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
sandbox_spi_parse_spec	drivers/spi/sandbox_spi.c	/^const char *sandbox_spi_parse_spec(const char *arg, unsigned long *bus,$/;"	f	typeref:typename:const char *
sandbox_spi_set_mode	drivers/spi/sandbox_spi.c	/^static int sandbox_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
sandbox_spi_set_speed	drivers/spi/sandbox_spi.c	/^static int sandbox_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
sandbox_spi_tristate	drivers/mtd/spi/sandbox.c	/^static void sandbox_spi_tristate(u8 *buf, uint len)$/;"	f	typeref:typename:void	file:
sandbox_spi_xfer	drivers/spi/sandbox_spi.c	/^static int sandbox_spi_xfer(struct udevice *slave, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
sandbox_spl_probe	drivers/misc/spltest_sandbox.c	/^static int sandbox_spl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_spmi_ids	drivers/spmi/spmi-sandbox.c	/^static const struct udevice_id sandbox_spmi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_spmi_ops	drivers/spmi/spmi-sandbox.c	/^static struct dm_spmi_ops sandbox_spmi_ops = {$/;"	v	typeref:struct:dm_spmi_ops	file:
sandbox_spmi_priv	drivers/spmi/spmi-sandbox.c	/^struct sandbox_spmi_priv {$/;"	s	file:
sandbox_spmi_probe	drivers/spmi/spmi-sandbox.c	/^static int sandbox_spmi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_spmi_read	drivers/spmi/spmi-sandbox.c	/^static int sandbox_spmi_read(struct udevice *dev, int usid, int pid, int off)$/;"	f	typeref:typename:int	file:
sandbox_spmi_write	drivers/spmi/spmi-sandbox.c	/^static int sandbox_spmi_write(struct udevice *dev, int usid, int pid, int off,$/;"	f	typeref:typename:int	file:
sandbox_state	arch/sandbox/include/asm/state.h	/^struct sandbox_state {$/;"	s
sandbox_state	drivers/remoteproc/sandbox_testproc.c	/^enum sandbox_state {$/;"	g	file:
sandbox_state_io	arch/sandbox/include/asm/state.h	/^struct sandbox_state_io {$/;"	s
sandbox_submit_bulk	drivers/usb/host/usb-sandbox.c	/^static int sandbox_submit_bulk(struct udevice *bus, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
sandbox_submit_control	drivers/usb/host/usb-sandbox.c	/^static int sandbox_submit_control(struct udevice *bus,$/;"	f	typeref:typename:int	file:
sandbox_submit_int	drivers/usb/host/usb-sandbox.c	/^static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
sandbox_swap_case_do_op	drivers/misc/swap_case.c	/^static void sandbox_swap_case_do_op(enum swap_case_op op, char *str, int len)$/;"	f	typeref:typename:void	file:
sandbox_swap_case_emul_ops	drivers/misc/swap_case.c	/^struct dm_pci_emul_ops sandbox_swap_case_emul_ops = {$/;"	v	typeref:struct:dm_pci_emul_ops
sandbox_swap_case_find_bar	drivers/misc/swap_case.c	/^static int sandbox_swap_case_find_bar(struct udevice *emul, unsigned int addr,$/;"	f	typeref:typename:int	file:
sandbox_swap_case_get_devfn	drivers/misc/swap_case.c	/^static int sandbox_swap_case_get_devfn(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_swap_case_ids	drivers/misc/swap_case.c	/^static const struct udevice_id sandbox_swap_case_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_swap_case_map_physmem	drivers/misc/swap_case.c	/^static int sandbox_swap_case_map_physmem(struct udevice *dev,$/;"	f	typeref:typename:int	file:
sandbox_swap_case_read_config	drivers/misc/swap_case.c	/^static int sandbox_swap_case_read_config(struct udevice *emul, uint offset,$/;"	f	typeref:typename:int	file:
sandbox_swap_case_read_io	drivers/misc/swap_case.c	/^int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr,$/;"	f	typeref:typename:int
sandbox_swap_case_unmap_physmem	drivers/misc/swap_case.c	/^static int sandbox_swap_case_unmap_physmem(struct udevice *dev,$/;"	f	typeref:typename:int	file:
sandbox_swap_case_write_config	drivers/misc/swap_case.c	/^static int sandbox_swap_case_write_config(struct udevice *emul, uint offset,$/;"	f	typeref:typename:int	file:
sandbox_swap_case_write_io	drivers/misc/swap_case.c	/^int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr,$/;"	f	typeref:typename:int
sandbox_syscon_ids	drivers/misc/syscon_sandbox.c	/^static const struct udevice_id sandbox_syscon_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_sysreset_ids	drivers/sysreset/sysreset_sandbox.c	/^static const struct udevice_id sandbox_sysreset_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_sysreset_ops	drivers/sysreset/sysreset_sandbox.c	/^static struct sysreset_ops sandbox_sysreset_ops = {$/;"	v	typeref:struct:sysreset_ops	file:
sandbox_sysreset_request	drivers/sysreset/sysreset_sandbox.c	/^static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int	file:
sandbox_test_devdata	drivers/remoteproc/sandbox_testproc.c	/^struct sandbox_test_devdata {$/;"	s	file:
sandbox_testproc_init	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_testproc_is_running	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_is_running(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_testproc_load	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_load(struct udevice *dev, ulong addr, ulong size)$/;"	f	typeref:typename:int	file:
sandbox_testproc_ops	drivers/remoteproc/sandbox_testproc.c	/^static const struct dm_rproc_ops sandbox_testproc_ops = {$/;"	v	typeref:typename:const struct dm_rproc_ops	file:
sandbox_testproc_ping	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_ping(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_testproc_probe	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_testproc_reset	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_reset(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_testproc_start	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_testproc_stop	drivers/remoteproc/sandbox_testproc.c	/^static int sandbox_testproc_stop(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_timer_add_offset	board/sandbox/sandbox.c	/^void sandbox_timer_add_offset(unsigned long offset)$/;"	f	typeref:typename:void
sandbox_timer_add_offset	drivers/timer/sandbox_timer.c	/^void sandbox_timer_add_offset(unsigned long offset)$/;"	f	typeref:typename:void
sandbox_timer_get_count	drivers/timer/sandbox_timer.c	/^static notrace int sandbox_timer_get_count(struct udevice *dev, u64 *count)$/;"	f	typeref:typename:notrace int	file:
sandbox_timer_ids	drivers/timer/sandbox_timer.c	/^static const struct udevice_id sandbox_timer_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_timer_offset	board/sandbox/sandbox.c	/^static unsigned long sandbox_timer_offset;$/;"	v	typeref:typename:unsigned long	file:
sandbox_timer_offset	drivers/timer/sandbox_timer.c	/^static unsigned long sandbox_timer_offset;$/;"	v	typeref:typename:unsigned long	file:
sandbox_timer_ops	drivers/timer/sandbox_timer.c	/^static const struct timer_ops sandbox_timer_ops = {$/;"	v	typeref:typename:const struct timer_ops	file:
sandbox_timer_probe	drivers/timer/sandbox_timer.c	/^static int sandbox_timer_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_tpm_close	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_close(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_tpm_get_desc	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
sandbox_tpm_ids	drivers/tpm/tpm_tis_sandbox.c	/^static const struct udevice_id sandbox_tpm_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_tpm_open	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_tpm_ops	drivers/tpm/tpm_tis_sandbox.c	/^static const struct tpm_ops sandbox_tpm_ops = {$/;"	v	typeref:typename:const struct tpm_ops	file:
sandbox_tpm_probe	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_tpm_read_state	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_read_state(const void *blob, int node)$/;"	f	typeref:typename:int	file:
sandbox_tpm_write_state	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_write_state(void *blob, int node)$/;"	f	typeref:typename:int	file:
sandbox_tpm_xfer	drivers/tpm/tpm_tis_sandbox.c	/^static int sandbox_tpm_xfer(struct udevice *dev, const uint8_t *sendbuf,$/;"	f	typeref:typename:int	file:
sandbox_usb_flash_ids	drivers/usb/emul/sandbox_flash.c	/^static const struct udevice_id sandbox_usb_flash_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_usb_flash_ops	drivers/usb/emul/sandbox_flash.c	/^static const struct dm_usb_ops sandbox_usb_flash_ops = {$/;"	v	typeref:typename:const struct dm_usb_ops	file:
sandbox_usb_hub_ids	drivers/usb/emul/sandbox_hub.c	/^static const struct udevice_id sandbox_usb_hub_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_usb_hub_ops	drivers/usb/emul/sandbox_hub.c	/^static const struct dm_usb_ops sandbox_usb_hub_ops = {$/;"	v	typeref:typename:const struct dm_usb_ops	file:
sandbox_usb_ids	drivers/usb/host/usb-sandbox.c	/^static const struct udevice_id sandbox_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_usb_keyb_add_string	drivers/usb/emul/sandbox_keyb.c	/^int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str)$/;"	f	typeref:typename:int
sandbox_usb_keyb_ids	drivers/usb/emul/sandbox_keyb.c	/^static const struct udevice_id sandbox_usb_keyb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_usb_keyb_ops	drivers/usb/emul/sandbox_keyb.c	/^static const struct dm_usb_ops sandbox_usb_keyb_ops = {$/;"	v	typeref:typename:const struct dm_usb_ops	file:
sandbox_usb_ops	drivers/usb/host/usb-sandbox.c	/^static const struct dm_usb_ops sandbox_usb_ops = {$/;"	v	typeref:typename:const struct dm_usb_ops	file:
sandbox_usb_probe	drivers/usb/host/usb-sandbox.c	/^static int sandbox_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sandbox_warm_sysreset_ids	drivers/sysreset/sysreset_sandbox.c	/^static const struct udevice_id sandbox_warm_sysreset_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sandbox_warm_sysreset_ops	drivers/sysreset/sysreset_sandbox.c	/^static struct sysreset_ops sandbox_warm_sysreset_ops = {$/;"	v	typeref:struct:sysreset_ops	file:
sandbox_warm_sysreset_request	drivers/sysreset/sysreset_sandbox.c	/^static int sandbox_warm_sysreset_request(struct udevice *dev,$/;"	f	typeref:typename:int	file:
sandbox_write_state	arch/sandbox/cpu/state.c	/^int sandbox_write_state(struct sandbox_state *state, const char *fname)$/;"	f	typeref:typename:int
sandbox_write_state_node	arch/sandbox/cpu/state.c	/^int sandbox_write_state_node(struct sandbox_state *state,$/;"	f	typeref:typename:int
sandybridge_setup_graphics	drivers/video/ivybridge_igd.c	/^static void sandybridge_setup_graphics(struct udevice *dev,$/;"	f	typeref:typename:void	file:
sandybridge_setup_northbridge_bars	arch/x86/cpu/ivybridge/northbridge.c	/^static void sandybridge_setup_northbridge_bars(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sanitise_line	scripts/checkpatch.pl	/^sub sanitise_line {$/;"	s
sanitise_line_reset	scripts/checkpatch.pl	/^sub sanitise_line_reset {$/;"	s
sanitize_string	drivers/mtd/nand/nand_base.c	/^static void sanitize_string(char *s, size_t len)$/;"	f	typeref:typename:void	file:
sar	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sar;	\/* Sample Register *\/$/;"	m	struct:pwm_regs	typeref:typename:u32
sar	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	sar;$/;"	m	struct:pwm_regs	typeref:typename:u32
sar	arch/m68k/include/asm/immap_5275.h	/^	u32 sar;$/;"	m	struct:dma_ctrl	typeref:typename:u32
sar	arch/powerpc/include/asm/fsl_dma.h	/^	uint	sar;		\/* DMA source address register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
sar	arch/xtensa/include/asm/ptrace.h	/^	unsigned long sar;		\/*  44 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
sar	drivers/block/sata_dwc.c	/^	struct dmareg sar;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
sar	drivers/i2c/fti2c010.h	/^	uint32_t sar; \/* 0x10: slave address register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
sar	drivers/i2c/sh_sh7734_i2c.c	/^	u8 sar;$/;"	m	struct:sh_i2c	typeref:typename:u8	file:
sar_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 sar_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
sar_freq_modes	arch/arm/mach-mvebu/include/mach/cpu.h	/^struct sar_freq_modes {$/;"	s
sar_freq_tab	arch/arm/mach-mvebu/cpu.c	/^static const struct sar_freq_modes sar_freq_tab[] = {$/;"	v	typeref:typename:const struct sar_freq_modes[]	file:
sar_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 sar_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
sar_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 sar_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
saradc	arch/arm/dts/rk3288.dtsi	/^	saradc: saradc@ff100000 {$/;"	l
saradc_testbit	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 saradc_testbit;$/;"	m	struct:rk3288_grf	typeref:typename:u32
saradc_testbit	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 saradc_testbit;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
sarea	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 sarea;		\/* 0x04 PMECC Spare Area Size Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
sassr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 sassr[16];	\/* 0x240 ~ 0x27c: Security Areas Split Slave Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16]
sat	drivers/video/mx3fb.c	/^	u32	sat:2;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:2	file:
sat	drivers/video/mx3fb.c	/^	u32	sat:2;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:2	file:
sata	arch/arm/dts/armada-37xx.dtsi	/^			sata: sata@e0000 {$/;"	l
sata	arch/arm/dts/dra7.dtsi	/^		sata: sata@4a141100 {$/;"	l
sata	arch/arm/dts/imx6q.dtsi	/^		sata: sata@02200000 {$/;"	l
sata	arch/arm/dts/zynqmp.dtsi	/^		sata: ahci@fd0c0000 {$/;"	l
sata	arch/powerpc/include/asm/immap_512x.h	/^	sata512x_t		sata;		\/* Serial ATA *\/$/;"	m	struct:immap	typeref:typename:sata512x_t
sata	arch/powerpc/include/asm/immap_83xx.h	/^	sata83xx_t		sata[2];	\/* SATA Controller *\/$/;"	m	struct:immap	typeref:typename:sata83xx_t[2]
sata	arch/powerpc/include/asm/immap_83xx.h	/^	sata83xx_t		sata[4];	\/* SATA Controller *\/$/;"	m	struct:immap	typeref:typename:sata83xx_t[4]
sata	include/linux/edd.h	/^		} __attribute__ ((packed)) sata;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1108
sata0	arch/arm/dts/armada-388-gp.dts	/^				sata0: sata-port@0 {$/;"	l
sata0_pins	arch/arm/dts/armada-38x.dtsi	/^				sata0_pins: sata-pins-0 {$/;"	l	label:pinctrl
sata1	arch/arm/dts/armada-388-gp.dts	/^				sata1: sata-port@1 {$/;"	l
sata1_pins	arch/arm/dts/armada-38x.dtsi	/^				sata1_pins: sata-pins-1 {$/;"	l	label:pinctrl
sata1_pres_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata1_pres_pin: sata1-pres-pin {$/;"	l
sata1_pwr_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata1_pwr_pin: sata1-pwr-pin {$/;"	l
sata1_regulator	arch/arm/dts/armada-xp-synology-ds414.dts	/^		sata1_regulator: sata1-regulator {$/;"	l
sata1liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sata1liodnr;	\/* SATA 1 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sata2	arch/arm/dts/armada-388-gp.dts	/^				sata2: sata-port@0 {$/;"	l
sata2_pins	arch/arm/dts/armada-38x.dtsi	/^				sata2_pins: sata-pins-2 {$/;"	l	label:pinctrl
sata2_pres_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata2_pres_pin: sata2-pres-pin {$/;"	l
sata2_pwr_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata2_pwr_pin: sata2-pwr-pin {$/;"	l
sata2_regulator	arch/arm/dts/armada-xp-synology-ds414.dts	/^		sata2_regulator: sata2-regulator {$/;"	l
sata2liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sata2liodnr;	\/* SATA 2 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sata3	arch/arm/dts/armada-388-gp.dts	/^				sata3: sata-port@1 {$/;"	l
sata3_pins	arch/arm/dts/armada-38x.dtsi	/^				sata3_pins: sata-pins-3 {$/;"	l	label:pinctrl
sata3_pres_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata3_pres_pin: sata3-pres-pin {$/;"	l
sata3_pwr_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata3_pwr_pin: sata3-pwr-pin {$/;"	l
sata3_regulator	arch/arm/dts/armada-xp-synology-ds414.dts	/^		sata3_regulator: sata3-regulator {$/;"	l
sata3liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sata3liodnr;	\/* SATA 3 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sata4_pres_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata4_pres_pin: sata4-pres-pin {$/;"	l
sata4_pwr_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	sata4_pwr_pin: sata4-pwr-pin {$/;"	l
sata4_regulator	arch/arm/dts/armada-xp-synology-ds414.dts	/^		sata4_regulator: sata4-regulator {$/;"	l
sata4liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sata4liodnr;	\/* SATA 4 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sata512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct sata512x {$/;"	s
sata512x_t	arch/powerpc/include/asm/immap_512x.h	/^} sata512x_t;$/;"	t	typeref:struct:sata512x
sata83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct sata83xx {$/;"	s
sata83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} sata83xx_t;$/;"	t	typeref:struct:sata83xx
sata_and_sgmii_power_up_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_and_sgmii_power_up_params[] = {$/;"	v	typeref:struct:op_params[]
sata_and_sgmii_speed_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_and_sgmii_speed_config_params[] = {$/;"	v	typeref:struct:op_params[]
sata_and_sgmii_tx_config_params1	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_and_sgmii_tx_config_params1[] = {$/;"	v	typeref:struct:op_params[]
sata_and_sgmii_tx_config_serdes_rev1_params2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_and_sgmii_tx_config_serdes_rev1_params2[] = {$/;"	v	typeref:struct:op_params[]
sata_and_sgmii_tx_config_serdes_rev2_params2	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_and_sgmii_tx_config_serdes_rev2_params2[] = {$/;"	v	typeref:struct:op_params[]
sata_blk_ops	common/sata.c	/^static const struct blk_ops sata_blk_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
sata_bread	common/sata.c	/^static unsigned long sata_bread(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long	file:
sata_bread	common/sata.c	/^static unsigned long sata_bread(struct udevice *dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long	file:
sata_bus_probe	drivers/block/sata_sil3114.c	/^int sata_bus_probe (int portno)$/;"	f	typeref:typename:int
sata_bus_softreset	drivers/block/sata_sil3114.c	/^static int sata_bus_softreset (int num)$/;"	f	typeref:typename:int	file:
sata_busy_wait	drivers/block/sata_sil3114.c	/^static u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits,$/;"	f	typeref:typename:u8	file:
sata_bwrite	common/sata.c	/^static unsigned long sata_bwrite(struct blk_desc *block_dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long	file:
sata_bwrite	common/sata.c	/^static unsigned long sata_bwrite(struct udevice *dev, lbaint_t start,$/;"	f	typeref:typename:unsigned long	file:
sata_chk_status	drivers/block/sata_sil3114.c	/^static u8 sata_chk_status (struct sata_ioports *ioaddr, u8 usealtstatus)$/;"	f	typeref:typename:u8	file:
sata_clk	arch/arm/dts/zynqmp-ep108-clk.dtsi	/^	sata_clk: sata_clk {$/;"	l
sata_clk	arch/powerpc/include/asm/global_data.h	/^	u32 sata_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
sata_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 sata_clk_cfg;	\/* 0xc8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sata_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 sata_clk_cfg;	\/* 0xc8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sata_curr_device	cmd/sata.c	/^static int sata_curr_device = -1;$/;"	v	typeref:typename:int	file:
sata_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	sata_dclk_div: sata_dclk_div {$/;"	l
sata_dev_desc	common/sata.c	/^struct blk_desc sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];$/;"	v	typeref:struct:blk_desc[]
sata_dev_state	drivers/block/sata_dwc.c	/^enum sata_dev_state {$/;"	g	file:
sata_dma_regs	drivers/block/sata_dwc.c	/^static struct ahb_dma_regs		*sata_dma_regs = 0;$/;"	v	typeref:struct:ahb_dma_regs *	file:
sata_dwc_device	drivers/block/sata_dwc.c	/^struct sata_dwc_device {$/;"	s	file:
sata_dwc_device_port	drivers/block/sata_dwc.c	/^struct sata_dwc_device_port {$/;"	s	file:
sata_dwc_port_info	drivers/block/sata_dwc.c	/^static const struct ata_port_info sata_dwc_port_info[] = {$/;"	v	typeref:typename:const struct ata_port_info[]	file:
sata_dwc_regs	drivers/block/sata_dwc.c	/^	struct sata_dwc_regs	*sata_dwc_regs;$/;"	m	struct:sata_dwc_device	typeref:struct:sata_dwc_regs *	file:
sata_dwc_regs	drivers/block/sata_dwc.c	/^struct sata_dwc_regs {$/;"	s	file:
sata_dwc_softreset	drivers/block/sata_dwc.c	/^static int sata_dwc_softreset(struct ata_port *ap)$/;"	f	typeref:typename:int	file:
sata_electrical_config_serdes_rev1_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_electrical_config_serdes_rev1_params[] = {$/;"	v	typeref:struct:op_params[]
sata_electrical_config_serdes_rev2_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_electrical_config_serdes_rev2_params[] = {$/;"	v	typeref:struct:op_params[]
sata_fis_d2h	include/fis.h	/^typedef struct sata_fis_d2h {$/;"	s
sata_fis_d2h_t	include/fis.h	/^} __attribute__ ((packed)) sata_fis_d2h_t;$/;"	t	typeref:struct:sata_fis_d2h
sata_fis_data	include/fis.h	/^typedef struct sata_fis_data {$/;"	s
sata_fis_data_t	include/fis.h	/^} __attribute__ ((packed)) sata_fis_data_t;$/;"	t	typeref:struct:sata_fis_data
sata_fis_dma_setup	include/fis.h	/^typedef struct sata_fis_dma_setup {$/;"	s
sata_fis_dma_setup_t	include/fis.h	/^} __attribute__ ((packed)) sata_fis_dma_setup_t;$/;"	t	typeref:struct:sata_fis_dma_setup
sata_fis_h2d	include/fis.h	/^typedef struct sata_fis_h2d {$/;"	s
sata_fis_h2d_ncq	include/fis.h	/^typedef struct sata_fis_h2d_ncq {$/;"	s
sata_fis_h2d_ncq_t	include/fis.h	/^} __attribute__ ((packed)) sata_fis_h2d_ncq_t;$/;"	t	typeref:struct:sata_fis_h2d_ncq
sata_fis_h2d_t	include/fis.h	/^} __attribute__ ((packed)) sata_fis_h2d_t;$/;"	t	typeref:struct:sata_fis_h2d
sata_fis_pio_setup	include/fis.h	/^typedef struct sata_fis_pio_setup {$/;"	s
sata_fis_pio_setup_t	include/fis.h	/^} __attribute__ ((packed)) sata_fis_pio_setup_t;$/;"	t	typeref:struct:sata_fis_pio_setup
sata_fis_type	include/fis.h	/^enum sata_fis_type {$/;"	g
sata_get_dev	common/sata.c	/^struct blk_desc *sata_get_dev(int dev)$/;"	f	typeref:struct:blk_desc *
sata_get_env_dev	common/env_sata.c	/^__weak int sata_get_env_dev(void)$/;"	f	typeref:typename:__weak int
sata_host_regs	drivers/block/dwc_ahsata.c	/^struct sata_host_regs {$/;"	s	file:
sata_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 sata_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sata_identify	drivers/block/sata_sil3114.c	/^static void sata_identify (int num, int dev)$/;"	f	typeref:typename:void	file:
sata_info	drivers/block/sata_sil.c	/^static struct sata_info sata_info;$/;"	v	typeref:struct:sata_info	file:
sata_info	drivers/block/sata_sil.h	/^struct sata_info {$/;"	s
sata_init	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^int sata_init(void)$/;"	f	typeref:typename:int
sata_initialize	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^int sata_initialize(void)$/;"	f	typeref:typename:int
sata_initialize	board/compulab/cm_fx6/cm_fx6.c	/^int sata_initialize(void)$/;"	f	typeref:typename:int
sata_ioports	drivers/block/sata_sil3114.h	/^struct sata_ioports {$/;"	s
sata_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sata_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sata_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sata_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
sata_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sata_mode	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t sata_mode;			\/* Offset 0x002e *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
sata_pads	board/compulab/cm_fx6/cm_fx6.c	/^static iomux_v3_cfg_t const sata_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
sata_phy	arch/arm/cpu/armv7/omap-common/sata.c	/^struct omap_pipe3 sata_phy = {$/;"	v	typeref:struct:omap_pipe3
sata_phy	arch/arm/dts/dra7.dtsi	/^			sata_phy: phy@4A096000 {$/;"	l
sata_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
sata_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sata_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sata_phy_disable	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int sata_phy_disable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
sata_phy_enable	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int sata_phy_enable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int	file:
sata_phy_ops	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const struct tegra_xusb_phy_ops sata_phy_ops = {$/;"	v	typeref:typename:const struct tegra_xusb_phy_ops	file:
sata_phy_reset	drivers/block/sata_sil3114.c	/^int sata_phy_reset (int portno)$/;"	f	typeref:typename:int
sata_platdata	arch/x86/cpu/broadwell/sata.c	/^struct sata_platdata {$/;"	s	file:
sata_pll	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^struct sata_pll {$/;"	s	file:
sata_pll_config	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^void sata_pll_config(void)$/;"	f	typeref:typename:void
sata_pmp_gscr_devid	include/libata.h	/^#define sata_pmp_gscr_devid(/;"	d
sata_pmp_gscr_ports	include/libata.h	/^#define sata_pmp_gscr_ports(/;"	d
sata_pmp_gscr_rev	include/libata.h	/^#define sata_pmp_gscr_rev(/;"	d
sata_pmp_gscr_vendor	include/libata.h	/^#define sata_pmp_gscr_vendor(/;"	d
sata_port	drivers/block/sata_sil3114.c	/^static void sata_port (struct sata_ioports *ioport)$/;"	f	typeref:typename:void	file:
sata_port	drivers/block/sata_sil3114.h	/^struct sata_port {$/;"	s
sata_port0_power_up_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_port0_power_up_params[] = {$/;"	v	typeref:struct:op_params[]
sata_port0_tx_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_port0_tx_config_params[] = {$/;"	v	typeref:struct:op_params[]
sata_port1_power_up_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_port1_power_up_params[] = {$/;"	v	typeref:struct:op_params[]
sata_port1_tx_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sata_port1_tx_config_params[] = {$/;"	v	typeref:struct:op_params[]
sata_port_regs	drivers/block/dwc_ahsata.c	/^struct sata_port_regs {$/;"	s	file:
sata_port_status	drivers/block/dwc_ahsata.c	/^int sata_port_status(int dev, int port)$/;"	f	typeref:typename:int
sata_read	drivers/block/dwc_ahsata.c	/^ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/fsl_sata.c	/^ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/pata_bfin.c	/^ulong sata_read(int dev, ulong block, lbaint_t blkcnt, void *buff)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/sata_dwc.c	/^ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/sata_mv.c	/^ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/sata_sandbox.c	/^ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/sata_sil.c	/^ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)$/;"	f	typeref:typename:ulong
sata_read	drivers/block/sata_sil3114.c	/^ulong sata_read (int device, ulong block, lbaint_t blkcnt, void *buff)$/;"	f	typeref:typename:ulong
sata_ref_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	sata_ref_clk: sata_ref_clk {$/;"	l
sata_reg_base	drivers/block/fsl_sata.h	/^	u32	sata_reg_base;$/;"	m	struct:fsl_sata_info	typeref:typename:u32
sata_spd	drivers/block/sata_dwc.h	/^	unsigned int		sata_spd;$/;"	m	struct:ata_link	typeref:typename:unsigned int
sata_spd_limit	drivers/block/sata_dwc.h	/^	unsigned int		sata_spd_limit;$/;"	m	struct:ata_link	typeref:typename:unsigned int
sata_spd_string	drivers/block/sata_sil.c	/^static const char *sata_spd_string(unsigned int speed)$/;"	f	typeref:typename:const char *	file:
sata_stop	board/compulab/cm_fx6/cm_fx6.c	/^int sata_stop(void)$/;"	f	typeref:typename:int
sata_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 sata_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sata_write	drivers/block/dwc_ahsata.c	/^ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/fsl_sata.c	/^ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/pata_bfin.c	/^ulong sata_write(int dev, ulong block, lbaint_t blkcnt, const void *buff)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/sata_dwc.c	/^ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, const void *buffer)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/sata_mv.c	/^ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/sata_sandbox.c	/^ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/sata_sil.c	/^ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)$/;"	f	typeref:typename:ulong
sata_write	drivers/block/sata_sil3114.c	/^ulong sata_write (int device, ulong block, lbaint_t blkcnt, const void *buff)$/;"	f	typeref:typename:ulong
sataclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sataclkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
sataliodnr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	sataliodnr[4];$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
sataliodnr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	sataliodnr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
satapiomode	tools/kwbimage.h	/^	uint8_t  satapiomode;		\/*24    *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint8_t
satdatallg	board/astro/mcf5373l/astro.h	/^	unsigned char satdatallg;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
satfreq	board/astro/mcf5373l/astro.h	/^	unsigned short satfreq;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned short
satr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	satr;		\/* DMA source attributes register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
sav	board/bf533-stamp/video.h	/^	unsigned int sav;$/;"	m	struct:__anonaa8b6bed0108	typeref:typename:unsigned int
save	arch/arm/include/asm/processor.h	/^	struct context_save_struct	*save;$/;"	m	struct:thread_struct	typeref:struct:context_save_struct *
save	arch/arm/include/asm/processor.h	/^	unsigned int save[FP_SIZE];		\/* as yet undefined *\/$/;"	m	struct:fp_hard_struct	typeref:typename:unsigned int[]
save	arch/arm/include/asm/processor.h	/^	unsigned int save[FP_SIZE];		\/* undefined information *\/$/;"	m	struct:fp_soft_struct	typeref:typename:unsigned int[]
save1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="save1">$/;"	i
saveAction	scripts/kconfig/qconf.cc	/^Q3Action *ConfigMainWindow::saveAction;$/;"	m	class:ConfigMainWindow	typeref:typename:Q3Action *
saveAction	scripts/kconfig/qconf.h	/^	static Q3Action *saveAction;$/;"	m	class:ConfigMainWindow	typeref:typename:Q3Action *
saveBaseAddress10	drivers/bios_emulator/atibios.c	/^static u32 saveBaseAddress10;$/;"	v	typeref:typename:u32	file:
saveBaseAddress14	drivers/bios_emulator/atibios.c	/^static u32 saveBaseAddress14;$/;"	v	typeref:typename:u32	file:
saveBaseAddress18	drivers/bios_emulator/atibios.c	/^static u32 saveBaseAddress18;$/;"	v	typeref:typename:u32	file:
saveBaseAddress20	drivers/bios_emulator/atibios.c	/^static u32 saveBaseAddress20;$/;"	v	typeref:typename:u32	file:
saveConfig	scripts/kconfig/qconf.cc	/^bool ConfigMainWindow::saveConfig(void)$/;"	f	class:ConfigMainWindow	typeref:typename:bool
saveConfigAs	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::saveConfigAs(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
saveROMBaseAddress	drivers/bios_emulator/atibios.c	/^static u32 saveROMBaseAddress;$/;"	v	typeref:typename:u32	file:
saveSettings	scripts/kconfig/qconf.cc	/^void ConfigInfoView::saveSettings(void)$/;"	f	class:ConfigInfoView	typeref:typename:void
saveSettings	scripts/kconfig/qconf.cc	/^void ConfigList::saveSettings(void)$/;"	f	class:ConfigList	typeref:typename:void
saveSettings	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::saveSettings(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
saveSettings	scripts/kconfig/qconf.cc	/^void ConfigSearchWindow::saveSettings(void)$/;"	f	class:ConfigSearchWindow	typeref:typename:void
save_EOB	lib/bzip2/bzlib_private.h	/^      Int32    save_EOB;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_N	lib/bzip2/bzlib_private.h	/^      Int32    save_N;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_addr	common/image.c	/^ulong save_addr;			\/* Default Save Address *\/$/;"	v	typeref:typename:ulong
save_alphaSize	lib/bzip2/bzlib_private.h	/^      Int32    save_alphaSize;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_and_cli	arch/mips/include/asm/system.h	/^#  define save_and_cli(/;"	d
save_and_exit	scripts/kconfig/mconf.c	/^static int save_and_exit;$/;"	v	typeref:typename:int	file:
save_as1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkImageMenuItem" id="save_as1">$/;"	i
save_boot_params	arch/arm/mach-tegra/board.c	/^void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)$/;"	f	typeref:typename:void
save_boot_params	board/nokia/rx51/lowlevel_init.S	/^save_boot_params:$/;"	l
save_boot_params_ret	arch/arm/cpu/armv7/start.S	/^save_boot_params_ret:$/;"	l
save_boot_params_ret	arch/arm/cpu/armv8/start.S	/^save_boot_params_ret:$/;"	l
save_bsp_msrs	arch/x86/cpu/mp_init.c	/^static int save_bsp_msrs(char *start, int size)$/;"	f	typeref:typename:int	file:
save_btn	scripts/kconfig/gconf.c	/^GtkWidget *save_btn = NULL;$/;"	v	typeref:typename:GtkWidget *
save_commits_by_author	scripts/get_maintainer.pl	/^sub save_commits_by_author {$/;"	s
save_commits_by_signer	scripts/get_maintainer.pl	/^sub save_commits_by_signer {$/;"	s
save_config_help	scripts/kconfig/mconf.c	/^save_config_help[] = N_($/;"	v	typeref:typename:const char[]	file:
save_config_help	scripts/kconfig/nconf.c	/^save_config_help[] = N_($/;"	v	typeref:typename:const char[]	file:
save_config_text	scripts/kconfig/mconf.c	/^save_config_text[] = N_($/;"	v	typeref:typename:const char[]	file:
save_config_text	scripts/kconfig/nconf.c	/^save_config_text[] = N_($/;"	v	typeref:typename:const char[]	file:
save_curr	lib/bzip2/bzlib_private.h	/^      Int32    save_curr;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_es	lib/bzip2/bzlib_private.h	/^      Int32    save_es;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_flags	arch/microblaze/include/asm/system.h	/^#define save_flags(/;"	d
save_flags	arch/mips/include/asm/system.h	/^#  define save_flags(/;"	d
save_flags_cli	arch/microblaze/include/asm/system.h	/^#define save_flags_cli(/;"	d
save_gBase	lib/bzip2/bzlib_private.h	/^      Int32*   save_gBase;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32 *
save_gLimit	lib/bzip2/bzlib_private.h	/^      Int32*   save_gLimit;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32 *
save_gMinlen	lib/bzip2/bzlib_private.h	/^      Int32    save_gMinlen;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_gPerm	lib/bzip2/bzlib_private.h	/^      Int32*   save_gPerm;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32 *
save_gSel	lib/bzip2/bzlib_private.h	/^      Int32    save_gSel;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_groupNo	lib/bzip2/bzlib_private.h	/^      Int32    save_groupNo;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_groupPos	lib/bzip2/bzlib_private.h	/^      Int32    save_groupPos;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_i	lib/bzip2/bzlib_private.h	/^      Int32    save_i;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_j	lib/bzip2/bzlib_private.h	/^      Int32    save_j;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_menu_item	scripts/kconfig/gconf.c	/^GtkWidget *save_menu_item = NULL;$/;"	v	typeref:typename:GtkWidget *
save_msr	arch/x86/cpu/mp_init.c	/^static inline struct saved_msr *save_msr(int index, struct saved_msr *entry)$/;"	f	typeref:struct:saved_msr *	file:
save_nGroups	lib/bzip2/bzlib_private.h	/^      Int32    save_nGroups;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_nSelectors	lib/bzip2/bzlib_private.h	/^      Int32    save_nSelectors;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_nblock	lib/bzip2/bzlib_private.h	/^      Int32    save_nblock;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_nblockMAX	lib/bzip2/bzlib_private.h	/^      Int32    save_nblockMAX;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_nextSym	lib/bzip2/bzlib_private.h	/^      Int32    save_nextSym;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_omap_boot_params	arch/arm/cpu/armv7/omap-common/boot-common.c	/^void save_omap_boot_params(void)$/;"	f	typeref:typename:void
save_serial	cmd/load.c	/^static int save_serial(ulong address, ulong count)$/;"	f	typeref:typename:int	file:
save_size	common/image.c	/^ulong save_size;			\/* Default Save Size (in bytes) *\/$/;"	v	typeref:typename:ulong
save_sp	arch/arm/cpu/armv7/omap-common/lowlevel_init.S	/^save_sp:$/;"	l
save_struct_actual	scripts/kernel-doc	/^sub save_struct_actual($) {$/;"	s
save_t	lib/bzip2/bzlib_private.h	/^      Int32    save_t;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_vesa_mode	drivers/video/coreboot.c	/^static int save_vesa_mode(struct cb_framebuffer *fb,$/;"	f	typeref:typename:int	file:
save_zj	lib/bzip2/bzlib_private.h	/^      Int32    save_zj;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_zn	lib/bzip2/bzlib_private.h	/^      Int32    save_zn;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_zt	lib/bzip2/bzlib_private.h	/^      Int32    save_zt;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
save_zvec	lib/bzip2/bzlib_private.h	/^      Int32    save_zvec;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
saved-output	Makefile	/^saved-output := $(KBUILD_OUTPUT)$/;"	m
saved_bi	fs/ubifs/debug.h	/^	struct ubifs_budg_info saved_bi;$/;"	m	struct:ubifs_debug_info	typeref:struct:ubifs_budg_info
saved_cs	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 saved_cs;$/;"	m	struct:__anon39451e6d0808	typeref:typename:u16
saved_data	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	const void *saved_data;$/;"	m	struct:pei_data	typeref:typename:const void *
saved_data_size	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int saved_data_size;$/;"	m	struct:pei_data	typeref:typename:int
saved_filter	drivers/usb/gadget/rndis.h	/^	u16			saved_filter;$/;"	m	struct:rndis_params	typeref:typename:u16
saved_free	fs/ubifs/debug.h	/^	long long saved_free;$/;"	m	struct:ubifs_debug_info	typeref:typename:long long
saved_idx_gc_cnt	fs/ubifs/debug.h	/^	int saved_idx_gc_cnt;$/;"	m	struct:ubifs_debug_info	typeref:typename:int
saved_ip	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 saved_ip;$/;"	m	struct:__anon39451e6d0808	typeref:typename:u16
saved_lst	fs/ubifs/debug.h	/^	struct ubifs_lp_stats saved_lst;$/;"	m	struct:ubifs_debug_info	typeref:struct:ubifs_lp_stats
saved_msr	arch/x86/cpu/mp_init.c	/^struct saved_msr {$/;"	s	file:
saved_prot_info	common/update.c	/^static uchar *saved_prot_info;$/;"	v	typeref:typename:uchar *	file:
saved_state	arch/arm/cpu/arm920t/ep93xx/led.c	/^static uint8_t saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF};$/;"	v	typeref:typename:uint8_t[2]	file:
saved_state	drivers/usb/dwc3/core.h	/^	u32			saved_state;$/;"	m	struct:dwc3_ep	typeref:typename:u32
saved_x	scripts/kconfig/lxdialog/util.c	/^int saved_x, saved_y;$/;"	v	typeref:typename:int
saved_y	scripts/kconfig/lxdialog/util.c	/^int saved_x, saved_y;$/;"	v	typeref:typename:int
savedefconfig	scripts/kconfig/Makefile	/^savedefconfig: $(obj)\/conf$/;"	t
savedefconfig	scripts/kconfig/conf.c	/^	savedefconfig,$/;"	e	enum:input_mode	file:
saveenv	common/env_dataflash.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_eeprom.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_ext4.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_fat.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_flash.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_mmc.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_nand.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_nvram.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_onenand.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_remote.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_sata.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_sf.c	/^int saveenv(void)$/;"	f	typeref:typename:int
saveenv	common/env_ubi.c	/^int saveenv(void)$/;"	f	typeref:typename:int
savid__eavid	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 savid__eavid;			\/* 0x64 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
sb	include/ext4fs.h	/^	struct ext2_sblock *sb;$/;"	m	struct:ext_filesystem	typeref:struct:ext2_sblock *
sb_aes_crypt	tools/mxsimage.c	/^static int sb_aes_crypt(struct sb_image_ctx *ictx, uint8_t *in_data,$/;"	f	typeref:typename:int	file:
sb_aes_deinit	tools/mxsimage.c	/^static int sb_aes_deinit(EVP_CIPHER_CTX *ctx)$/;"	f	typeref:typename:int	file:
sb_aes_init	tools/mxsimage.c	/^static int sb_aes_init(struct sb_image_ctx *ictx, uint8_t *iv, int enc)$/;"	f	typeref:typename:int	file:
sb_aes_reinit	tools/mxsimage.c	/^static int sb_aes_reinit(struct sb_image_ctx *ictx, int enc)$/;"	f	typeref:typename:int	file:
sb_blocksize	fs/reiserfs/reiserfs_private.h	/^#define sb_blocksize(/;"	d
sb_boot_image_header	tools/mxsimage.h	/^struct sb_boot_image_header {$/;"	s
sb_boot_image_version	tools/mxsimage.h	/^struct sb_boot_image_version {$/;"	s
sb_booted	drivers/remoteproc/sandbox_testproc.c	/^	sb_booted,$/;"	e	enum:sandbox_state	file:
sb_build_command_call	tools/mxsimage.c	/^static int sb_build_command_call(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_command_fill	tools/mxsimage.c	/^static int sb_build_command_fill(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_command_jump	tools/mxsimage.c	/^static int sb_build_command_jump(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_command_jump_call	tools/mxsimage.c	/^static int sb_build_command_jump_call(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_command_load	tools/mxsimage.c	/^static int sb_build_command_load(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_command_mode	tools/mxsimage.c	/^static int sb_build_command_mode(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_command_nop	tools/mxsimage.c	/^static int sb_build_command_nop(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_build_command_tag	tools/mxsimage.c	/^static int sb_build_command_tag(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_dcd	tools/mxsimage.c	/^static int sb_build_dcd(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd)$/;"	f	typeref:typename:int	file:
sb_build_dcd_block	tools/mxsimage.c	/^static int sb_build_dcd_block(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_image	tools/mxsimage.c	/^static int sb_build_image(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_build_section	tools/mxsimage.c	/^static int sb_build_section(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd)$/;"	f	typeref:typename:int	file:
sb_build_tree_from_cfg	tools/mxsimage.c	/^static int sb_build_tree_from_cfg(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_build_tree_from_img	tools/mxsimage.c	/^static int sb_build_tree_from_img(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_cmd_ctx	tools/mxsimage.c	/^struct sb_cmd_ctx {$/;"	s	file:
sb_cmd_list	tools/mxsimage.c	/^struct sb_cmd_list {$/;"	s	file:
sb_command	tools/mxsimage.h	/^struct sb_command {$/;"	s
sb_command_checksum	tools/mxsimage.c	/^static uint8_t sb_command_checksum(struct sb_command *inst)$/;"	f	typeref:typename:uint8_t	file:
sb_dcd_ctx	tools/mxsimage.c	/^struct sb_dcd_ctx {$/;"	s	file:
sb_decrypt_key_dictionary_key	tools/mxsimage.c	/^static void sb_decrypt_key_dictionary_key(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:void	file:
sb_decrypt_tag	tools/mxsimage.c	/^static void sb_decrypt_tag(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:void	file:
sb_dict_key	tools/mxsimage.c	/^	struct sb_key_dictionary_key	sb_dict_key;$/;"	m	struct:sb_image_ctx	typeref:struct:sb_key_dictionary_key	file:
sb_dirty_fn	fs/yaffs2/yaffs_guts.h	/^	void (*sb_dirty_fn) (struct yaffs_dev *dev);$/;"	m	struct:yaffs_param	typeref:typename:void (*)(struct yaffs_dev * dev)
sb_encrypt_image	tools/mxsimage.c	/^static int sb_encrypt_image(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_encrypt_key_dictionary_key	tools/mxsimage.c	/^static void sb_encrypt_key_dictionary_key(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:void	file:
sb_encrypt_sb_header	tools/mxsimage.c	/^static void sb_encrypt_sb_header(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:void	file:
sb_encrypt_sb_sections_header	tools/mxsimage.c	/^static void sb_encrypt_sb_sections_header(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:void	file:
sb_encrypt_tag	tools/mxsimage.c	/^static void sb_encrypt_tag(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:void	file:
sb_eth_ids	drivers/net/sandbox.c	/^static const struct udevice_id sb_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sb_eth_ofdata_to_platdata	drivers/net/sandbox.c	/^static int sb_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sb_eth_ops	drivers/net/sandbox.c	/^static const struct eth_ops sb_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
sb_eth_raw_ids	drivers/net/sandbox-raw.c	/^static const struct udevice_id sb_eth_raw_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sb_eth_raw_ofdata_to_platdata	drivers/net/sandbox-raw.c	/^static int sb_eth_raw_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sb_eth_raw_ops	drivers/net/sandbox-raw.c	/^static const struct eth_ops sb_eth_raw_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
sb_eth_raw_recv	drivers/net/sandbox-raw.c	/^static int sb_eth_raw_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
sb_eth_raw_send	drivers/net/sandbox-raw.c	/^static int sb_eth_raw_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
sb_eth_raw_start	drivers/net/sandbox-raw.c	/^static int sb_eth_raw_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sb_eth_raw_stop	drivers/net/sandbox-raw.c	/^static void sb_eth_raw_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sb_eth_recv	drivers/net/sandbox.c	/^static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
sb_eth_remove	drivers/net/sandbox.c	/^static int sb_eth_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sb_eth_send	drivers/net/sandbox.c	/^static int sb_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
sb_eth_start	drivers/net/sandbox.c	/^static int sb_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sb_eth_stop	drivers/net/sandbox.c	/^static void sb_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sb_eth_write_hwaddr	drivers/net/sandbox.c	/^static int sb_eth_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sb_fixup_sections_and_tags	tools/mxsimage.c	/^static int sb_fixup_sections_and_tags(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_free_image	tools/mxsimage.c	/^static void sb_free_image(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:void	file:
sb_get_time	tools/mxsimage.c	/^static int sb_get_time(time_t time, struct tm *tm)$/;"	f	typeref:typename:int	file:
sb_get_timestamp	tools/mxsimage.c	/^static time_t sb_get_timestamp(void)$/;"	f	typeref:typename:time_t	file:
sb_gpio_direction_input	drivers/gpio/sandbox.c	/^static int sb_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sb_gpio_direction_output	drivers/gpio/sandbox.c	/^static int sb_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
sb_gpio_get_function	drivers/gpio/sandbox.c	/^static int sb_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sb_gpio_get_open_drain	drivers/gpio/sandbox.c	/^static int sb_gpio_get_open_drain(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sb_gpio_get_value	drivers/gpio/sandbox.c	/^static int sb_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sb_gpio_set_open_drain	drivers/gpio/sandbox.c	/^static int sb_gpio_set_open_drain(struct udevice *dev, unsigned offset, int value)$/;"	f	typeref:typename:int	file:
sb_gpio_set_value	drivers/gpio/sandbox.c	/^static int sb_gpio_set_value(struct udevice *dev, unsigned offset, int value)$/;"	f	typeref:typename:int	file:
sb_gpio_xlate	drivers/gpio/sandbox.c	/^static int sb_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
sb_grow_dcd	tools/mxsimage.c	/^static int sb_grow_dcd(struct sb_dcd_ctx *dctx, unsigned int inc_size)$/;"	f	typeref:typename:int	file:
sb_hab_ivt_header	tools/mxsimage.h	/^static inline uint32_t sb_hab_ivt_header(void)$/;"	f	typeref:typename:uint32_t
sb_image_ctx	tools/mxsimage.c	/^struct sb_image_ctx {$/;"	s	file:
sb_init	drivers/remoteproc/sandbox_testproc.c	/^	sb_init,$/;"	e	enum:sandbox_state	file:
sb_ivt_header	tools/mxsimage.h	/^struct sb_ivt_header {$/;"	s
sb_journal_block	fs/reiserfs/reiserfs_private.h	/^#define sb_journal_block(/;"	d
sb_journal_size	fs/reiserfs/reiserfs_private.h	/^#define sb_journal_size(/;"	d
sb_key_dictionary_key	tools/mxsimage.h	/^struct sb_key_dictionary_key {$/;"	s
sb_load_cmdfile	tools/mxsimage.c	/^static int sb_load_cmdfile(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_load_file	tools/mxsimage.c	/^static int sb_load_file(struct sb_cmd_ctx *cctx, char *filename)$/;"	f	typeref:typename:int	file:
sb_loaded	drivers/remoteproc/sandbox_testproc.c	/^	sb_loaded,$/;"	e	enum:sandbox_state	file:
sb_parse_line	tools/mxsimage.c	/^static int sb_parse_line(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd)$/;"	f	typeref:typename:int	file:
sb_postfill_image_header	tools/mxsimage.c	/^static int sb_postfill_image_header(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_prefill_image_header	tools/mxsimage.c	/^static int sb_prefill_image_header(struct sb_image_ctx *ictx)$/;"	f	typeref:typename:int	file:
sb_reset	drivers/remoteproc/sandbox_testproc.c	/^	sb_reset,$/;"	e	enum:sandbox_state	file:
sb_root_block	fs/reiserfs/reiserfs_private.h	/^#define sb_root_block(/;"	d
sb_running	drivers/remoteproc/sandbox_testproc.c	/^	sb_running$/;"	e	enum:sandbox_state	file:
sb_section_ctx	tools/mxsimage.c	/^struct sb_section_ctx {$/;"	s	file:
sb_sections_header	tools/mxsimage.h	/^struct sb_sections_header {$/;"	s
sb_set	fs/ubifs/super.c	/^static int sb_set(struct super_block *sb, void *data)$/;"	f	typeref:typename:int	file:
sb_source_entry	tools/mxsimage.h	/^struct sb_source_entry {$/;"	s
sb_tag	tools/mxsimage.h	/^enum sb_tag {$/;"	g
sb_test	fs/ubifs/super.c	/^static int sb_test(struct super_block *sb, void *data)$/;"	f	typeref:typename:int	file:
sb_token_to_long	tools/mxsimage.c	/^static int sb_token_to_long(char *tok, uint32_t *rid)$/;"	f	typeref:typename:int	file:
sb_verify_command	tools/mxsimage.c	/^static int sb_verify_command(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_verify_commands	tools/mxsimage.c	/^static int sb_verify_commands(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_verify_image_end	tools/mxsimage.c	/^static int sb_verify_image_end(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_verify_image_header	tools/mxsimage.c	/^static int sb_verify_image_header(struct sb_image_ctx *ictx,$/;"	f	typeref:typename:int	file:
sb_verify_sections_cmds	tools/mxsimage.c	/^static int sb_verify_sections_cmds(struct sb_image_ctx *ictx, FILE *fp)$/;"	f	typeref:typename:int	file:
sb_version	fs/reiserfs/reiserfs_private.h	/^#define sb_version(/;"	d
sb_writers	fs/ubifs/ubifs.h	/^struct sb_writers {$/;"	s
sbb_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 sbb_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
sbb_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 sbb_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
sbb_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 sbb_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
sbc8641d_reset_board	board/sbc8641d/sbc8641d.c	/^void sbc8641d_reset_board (void)$/;"	f	typeref:typename:void
sbcr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int sbcr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
sbcr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 sbcr;		\/* 0x10 *\/$/;"	m	struct:siu	typeref:typename:u32
sbe_count	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	sbe_count;	\/* 0x40 *\/$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
sbf	arch/m68k/include/asm/immap_5441x.h	/^typedef struct sbf {$/;"	s
sbf	arch/m68k/include/asm/immap_5445x.h	/^typedef struct sbf {$/;"	s
sbf_t	arch/m68k/include/asm/immap_5441x.h	/^} sbf_t;$/;"	t	typeref:struct:sbf
sbf_t	arch/m68k/include/asm/immap_5445x.h	/^} sbf_t;$/;"	t	typeref:struct:sbf
sbfcr	arch/m68k/include/asm/immap_5227x.h	/^	u16 sbfcr;		\/* Serial Boot Control *\/$/;"	m	struct:ccm	typeref:typename:u16
sbfcr	arch/m68k/include/asm/immap_5441x.h	/^	u16 sbfcr;		\/* 0x22 *\/$/;"	m	struct:ccm	typeref:typename:u16
sbfcr	arch/m68k/include/asm/immap_5441x.h	/^	u16 sbfcr;		\/* Serial Boot Facility Control *\/$/;"	m	struct:sbf	typeref:typename:u16
sbfcr	arch/m68k/include/asm/immap_5445x.h	/^	u16 sbfcr;		\/* Serial Boot Facility Control Register *\/$/;"	m	struct:sbf	typeref:typename:u16
sbfsr	arch/m68k/include/asm/immap_5227x.h	/^	u16 sbfsr;		\/* Serial Boot Status *\/$/;"	m	struct:ccm	typeref:typename:u16
sbfsr	arch/m68k/include/asm/immap_5441x.h	/^	u16 sbfsr;		\/* 0x20 *\/$/;"	m	struct:ccm	typeref:typename:u16
sbfsr	arch/m68k/include/asm/immap_5441x.h	/^	u16 sbfsr;		\/* Serial Boot Facility Status *\/$/;"	m	struct:sbf	typeref:typename:u16
sbfsr	arch/m68k/include/asm/immap_5445x.h	/^	u16 sbfsr;		\/* Serial Boot Facility Status Register *\/$/;"	m	struct:sbf	typeref:typename:u16
sblock	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		int proff, page, sblock;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:int	file:
sblock	include/ext_common.h	/^	struct ext2_sblock sblock;$/;"	m	struct:ext2_data	typeref:struct:ext2_sblock
sbmr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	sbmr;$/;"	m	struct:src	typeref:typename:u32
sbmr1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	sbmr1;$/;"	m	struct:src	typeref:typename:u32
sbmr1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	sbmr1;$/;"	m	struct:src	typeref:typename:u32
sbmr1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sbmr1;$/;"	m	struct:src	typeref:typename:u32
sbmr2	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     sbmr2;$/;"	m	struct:src	typeref:typename:u32
sbmr2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 sbmr2;$/;"	m	struct:src	typeref:typename:u32
sbmr2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sbmr2;$/;"	m	struct:src	typeref:typename:u32
sbndc	arch/arm/mach-keystone/msmc.c	/^	u32	sbndc[8];$/;"	m	struct:msms_regs	typeref:typename:u32[8]	file:
sbnde	arch/arm/mach-keystone/msmc.c	/^	u32	sbnde;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
sbndm	arch/arm/mach-keystone/msmc.c	/^	u32	sbndm;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
sbox	lib/aes.c	/^static const u8 sbox[256] = {$/;"	v	typeref:typename:const u8[256]	file:
sbrk	common/dlmalloc.c	/^void *sbrk(ptrdiff_t increment)$/;"	f	typeref:typename:void *
sbrk_base	common/dlmalloc.c	/^static char* sbrk_base = (char*)(-1);$/;"	v	typeref:typename:char *	file:
sbrked_mem	common/dlmalloc.c	/^#define sbrked_mem /;"	d	file:
sbsc_init	board/kmc/kzm9g/kzm9g.c	/^static void sbsc_init(struct sh73a0_sbsc *sbsc)$/;"	f	typeref:typename:void	file:
sbscmon0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sbscmon0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sbuf	fs/ubifs/ubifs.h	/^	void *sbuf;$/;"	m	struct:ubifs_info	typeref:typename:void *
sbuscfg	include/usb/ehci-ci.h	/^	u32	sbuscfg;	\/* 0x090 - System Bus Interface Control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
sbusmode	include/usb/ehci-ci.h	/^	u32	sbusmode;	\/* 0x098 - System Bus Interface Mode *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
sbusstatus	include/usb/ehci-ci.h	/^	u32	sbusstatus;	\/* 0x094 - System Bus Interface Status *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
sc	include/usb/mpc8xx_udc.h	/^	unsigned char sc;$/;"	m	struct:mpc8xx_ep	typeref:typename:unsigned char
scEthernetRecv_CSave	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetRecv_CSave:	\/* Task 0 context save space *\/$/;"	l
scEthernetRecv_Entry	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetRecv_Entry:		\/* Task 0 *\/$/;"	l
scEthernetRecv_FDT	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetRecv_FDT:	\/* Task 0 Function Descriptor Table *\/$/;"	l
scEthernetRecv_TDT	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetRecv_TDT:	\/* Task 0 Descriptor Table *\/$/;"	l
scEthernetRecv_VarTab	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetRecv_VarTab:	\/* Task 0 Variable Table *\/$/;"	l
scEthernetXmit_CSave	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetXmit_CSave:	\/* Task 1 context save space *\/$/;"	l
scEthernetXmit_Entry	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetXmit_Entry:		\/* Task 1 *\/$/;"	l
scEthernetXmit_FDT	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetXmit_FDT:	\/* Task 1 Function Descriptor Table *\/$/;"	l
scEthernetXmit_TDT	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetXmit_TDT:	\/* Task 1 Descriptor Table *\/$/;"	l
scEthernetXmit_VarTab	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^scEthernetXmit_VarTab:	\/* Task 1 Variable Table *\/$/;"	l
sc_alpr	arch/m68k/include/asm/immap_5272.h	/^	ushort sc_alpr;$/;"	m	struct:sys_ctrl	typeref:typename:ushort
sc_bcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_bcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_cord	drivers/video/ipu_regs.h	/^	u32 sc_cord[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
sc_dir	arch/m68k/include/asm/immap_5272.h	/^	uint sc_dir;$/;"	m	struct:sys_ctrl	typeref:typename:uint
sc_emcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_emcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_fast	arch/arm/include/asm/arch-omap5/omap.h	/^#define sc_fast	/;"	d
sc_lcl_acr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sc_lcl_acr;$/;"	m	struct:sys_conf	typeref:typename:u_char
sc_lcl_alrh	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_lcl_alrh;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_lcl_alrl	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_lcl_alrl;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_ldtea	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_ldtea;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_ldtem	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sc_ldtem;$/;"	m	struct:sys_conf	typeref:typename:u_char
sc_ltescr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_ltescr1;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_ltescr2	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_ltescr2;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_mask	arch/arm/include/asm/arch-omap5/omap.h	/^#define sc_mask	/;"	d
sc_mbar	arch/m68k/include/asm/immap_5272.h	/^	uint sc_mbar;$/;"	m	struct:sys_ctrl	typeref:typename:uint
sc_medium	arch/arm/include/asm/arch-omap5/omap.h	/^#define sc_medium	/;"	d
sc_na	arch/arm/include/asm/arch-omap5/omap.h	/^#define sc_na	/;"	d
sc_nand_device_ready	board/socrates/nand.c	/^static int sc_nand_device_ready(struct mtd_info *mtdinfo)$/;"	f	typeref:typename:int	file:
sc_nand_hwcontrol	board/socrates/nand.c	/^static void sc_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)$/;"	f	typeref:typename:void	file:
sc_nand_read_buf	board/socrates/nand.c	/^static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
sc_nand_read_byte	board/socrates/nand.c	/^static u_char sc_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u_char	file:
sc_nand_read_word	board/socrates/nand.c	/^static u16 sc_nand_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:u16	file:
sc_nand_write_buf	board/socrates/nand.c	/^static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)$/;"	f	typeref:typename:void	file:
sc_nand_write_byte	board/socrates/nand.c	/^static void sc_nand_write_byte(struct mtd_info *mtd, u_char byte)$/;"	f	typeref:typename:void	file:
sc_pdmcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_pdmcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_pdtea	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_pdtea;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_pdtem	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sc_pdtem;$/;"	m	struct:sys_conf	typeref:typename:u_char
sc_pmr	arch/m68k/include/asm/immap_5272.h	/^	uint sc_pmr;$/;"	m	struct:sys_ctrl	typeref:typename:uint
sc_ppc_acr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sc_ppc_acr;$/;"	m	struct:sys_conf	typeref:typename:u_char
sc_ppc_alrh	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_ppc_alrh;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_ppc_alrl	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_ppc_alrl;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_res1aa	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_res1aa;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_res1ab	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_res1ab;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_scr	arch/m68k/include/asm/immap_5272.h	/^	ushort sc_scr;$/;"	m	struct:sys_ctrl	typeref:typename:ushort
sc_sdcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_sdcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sgpiocr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_sgpiocr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sgpiodt1	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_sgpiodt1;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sgpiodt2	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_sgpiodt2;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_siel	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_siel;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_siel	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_siel;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_simask	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_simask;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_simask	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_simask;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sipend	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_sipend;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sipend	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_sipend;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_siumcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_siumcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_siumcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_siumcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_siumcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_siumcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sivec	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_sivec;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sivec	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_sivec;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_slow	arch/arm/include/asm/arch-omap5/omap.h	/^#define sc_slow	/;"	d
sc_spr	arch/m68k/include/asm/immap_5272.h	/^	ushort sc_spr;$/;"	m	struct:sys_ctrl	typeref:typename:ushort
sc_swsr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort sc_swsr;$/;"	m	struct:sys_conf	typeref:typename:ushort
sc_swsr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	sc_swsr;$/;"	m	struct:sys_conf	typeref:typename:ushort
sc_swsr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	sc_swsr;$/;"	m	struct:sys_conf	typeref:typename:ushort
sc_swt	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_swt;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sypcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_sypcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sypcr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_sypcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_sypcr	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_sypcr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_tescr1	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_tescr1;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_tescr2	arch/powerpc/include/asm/immap_8260.h	/^	uint	sc_tescr2;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_tesr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sc_tesr;$/;"	m	struct:sys_conf	typeref:typename:uint
sc_tesr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sc_tesr;$/;"	m	struct:sys_conf	typeref:typename:uint
scache_line_size	arch/mips/lib/cache.c	/^static inline unsigned long scache_line_size(void)$/;"	f	typeref:typename:unsigned long	file:
scalar	include/grlib/gptimer.h	/^	volatile unsigned int scalar;$/;"	m	struct:__anon98dc47250208	typeref:typename:volatile unsigned int
scalar_reload	include/grlib/gptimer.h	/^	volatile unsigned int scalar_reload;$/;"	m	struct:__anon98dc47250208	typeref:typename:volatile unsigned int
scale	drivers/video/console_truetype.c	/^	double scale;$/;"	m	struct:console_tt_priv	typeref:typename:double	file:
scale_vcores	arch/arm/cpu/armv7/am33xx/clock.c	/^__weak void scale_vcores(void)$/;"	f	typeref:typename:__weak void
scale_vcores	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void scale_vcores(struct vcores_data const *vcores)$/;"	f	typeref:typename:void
scale_vcores	board/compulab/cm_t43/spl.c	/^void scale_vcores(void)$/;"	f	typeref:typename:void
scale_vcores	board/ti/am43xx/board.c	/^void scale_vcores(void)$/;"	f	typeref:typename:void
scale_vcores_generic	board/ti/am43xx/board.c	/^void scale_vcores_generic(u32 m)$/;"	f	typeref:typename:void
scale_vcores_idk	board/ti/am43xx/board.c	/^void scale_vcores_idk(u32 m)$/;"	f	typeref:typename:void
scaled_div	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^			u64 scaled_div;	\/* scaled divider value *\/$/;"	m	struct:bcm_clk_div::__anona6938245010a::__anona69382450208	typeref:typename:u64
scaled_div	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^			u64 scaled_div;	\/* scaled divider value *\/$/;"	m	struct:bcm_clk_div::__anone9f7c086010a::__anone9f7c0860208	typeref:typename:u64
scaler	include/grlib/apbuart.h	/^	volatile unsigned int scaler;$/;"	m	struct:__anon8f85467c0108	typeref:typename:volatile unsigned int
scam	include/linux/immap_qe.h	/^	u32 scam;		\/* Statistics caryy mask register *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
scan	include/ec_commands.h	/^			uint8_t scan[0];	\/* keyscan data *\/$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670808	typeref:typename:uint8_t[0]
scan	tools/genboardscfg.py	/^    def scan(self, defconfig):$/;"	m	class:KconfigScanner
scan_align	include/linux/fb.h	/^	u32 scan_align;		\/* alignment per scanline		*\/$/;"	m	struct:fb_pixmap	typeref:typename:u32
scan_all	drivers/mtd/ubi/attach.c	/^static int scan_all(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int	file:
scan_args	tools/fdtgrep.c	/^static void scan_args(struct display_info *disp, int argc, char *argv[])$/;"	f	typeref:typename:void	file:
scan_bbt	include/linux/mtd/nand.h	/^	int (*scan_bbt)(struct mtd_info *mtd);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd)
scan_bbt	include/linux/mtd/onenand.h	/^	int (*scan_bbt)(struct mtd_info *mtd);$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd)
scan_block_fast	drivers/mtd/nand/nand_bbt.c	/^static int scan_block_fast(struct mtd_info *mtd, struct nand_bbt_descr *bd,$/;"	f	typeref:typename:int	file:
scan_chain_engine_is_idle	arch/arm/mach-socfpga/scan_manager.c	/^static u32 scan_chain_engine_is_idle(u32 max_iter)$/;"	f	typeref:typename:u32	file:
scan_check_cb	fs/ubifs/lprops.c	/^static int scan_check_cb(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
scan_code	include/efi_api.h	/^	u16 scan_code;$/;"	m	struct:efi_input_key	typeref:typename:u16
scan_defconfigs	tools/genboardscfg.py	/^def scan_defconfigs(jobs=1):$/;"	f
scan_defconfigs_for_multiprocess	tools/genboardscfg.py	/^def scan_defconfigs_for_multiprocess(queue, defconfigs):$/;"	f
scan_fast	drivers/mtd/ubi/attach.c	/^static int scan_fast(struct ubi_device *ubi, struct ubi_attach_info **ai)$/;"	f	typeref:typename:int	file:
scan_ff_pattern	drivers/mtd/nand/fsl_elbc_nand.c	/^static u8 scan_ff_pattern[] = { 0xff, };$/;"	v	typeref:typename:u8[]	file:
scan_ff_pattern	drivers/mtd/nand/nand_bbt.c	/^static uint8_t scan_ff_pattern[] = { 0xff, 0xff };$/;"	v	typeref:typename:uint8_t[]	file:
scan_ff_pattern	drivers/mtd/onenand/onenand_bbt.c	/^static uint8_t scan_ff_pattern[] = { 0xff, 0xff };$/;"	v	typeref:typename:uint8_t[]	file:
scan_for_master	fs/ubifs/master.c	/^static int scan_for_master(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
scan_get_nnode	fs/ubifs/lpt.c	/^static struct ubifs_nnode *scan_get_nnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_nnode *	file:
scan_get_pnode	fs/ubifs/lpt.c	/^static struct ubifs_pnode *scan_get_pnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_pnode *	file:
scan_manager_base	arch/arm/mach-socfpga/scan_manager.c	/^static const struct socfpga_scan_manager *scan_manager_base =$/;"	v	typeref:typename:const struct socfpga_scan_manager *	file:
scan_mgr_configure_iocsr	arch/arm/mach-socfpga/scan_manager.c	/^int scan_mgr_configure_iocsr(void)$/;"	f	typeref:typename:int
scan_mgr_get_fpga_id	arch/arm/mach-socfpga/scan_manager.c	/^u32 scan_mgr_get_fpga_id(void)$/;"	f	typeref:typename:u32
scan_mgr_io_scan_chain_prg	arch/arm/mach-socfpga/scan_manager.c	/^static int scan_mgr_io_scan_chain_prg(const unsigned int io_scan_chain_id)$/;"	f	typeref:typename:int	file:
scan_mgr_jtag_insn_data	arch/arm/mach-socfpga/scan_manager.c	/^scan_mgr_jtag_insn_data(const u8 iarg, const unsigned long *data,$/;"	f	typeref:typename:int	file:
scan_mgr_jtag_io	arch/arm/mach-socfpga/scan_manager.c	/^static void scan_mgr_jtag_io(const u32 flags, const u8 iarg, const u32 parg)$/;"	f	typeref:typename:void	file:
scan_padding_bytes	fs/ubifs/scan.c	/^static int scan_padding_bytes(void *buf, int len)$/;"	f	typeref:typename:int	file:
scan_peb	drivers/mtd/ubi/attach.c	/^static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int	file:
scan_period_us	include/ec_commands.h	/^	uint16_t scan_period_us;	\/* period between start of scans *\/$/;"	m	struct:ec_mkbp_config	typeref:typename:uint16_t
scan_pool	drivers/mtd/ubi/fastmap.c	/^static int scan_pool(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int	file:
scan_pool	drivers/mtd/ubispl/ubispl.c	/^static int scan_pool(struct ubi_scan_info *ubi, __be32 *pebs, int pool_size)$/;"	f	typeref:typename:int	file:
scan_read	drivers/mtd/nand/nand_bbt.c	/^static int scan_read(struct mtd_info *mtd, uint8_t *buf, loff_t offs,$/;"	f	typeref:typename:int	file:
scan_read_data	drivers/mtd/nand/nand_bbt.c	/^static int scan_read_data(struct mtd_info *mtd, uint8_t *buf, loff_t offs,$/;"	f	typeref:typename:int	file:
scan_read_oob	drivers/mtd/nand/nand_bbt.c	/^static int scan_read_oob(struct mtd_info *mtd, uint8_t *buf, loff_t offs,$/;"	f	typeref:typename:int	file:
scan_sata	drivers/block/dwc_ahsata.c	/^int scan_sata(int dev)$/;"	f	typeref:typename:int
scan_sata	drivers/block/fsl_sata.c	/^int scan_sata(int dev)$/;"	f	typeref:typename:int
scan_sata	drivers/block/pata_bfin.c	/^int scan_sata(int dev)$/;"	f	typeref:typename:int
scan_sata	drivers/block/sata_dwc.c	/^int scan_sata(int dev)$/;"	f	typeref:typename:int
scan_sata	drivers/block/sata_mv.c	/^int scan_sata(int port)$/;"	f	typeref:typename:int
scan_sata	drivers/block/sata_sandbox.c	/^int scan_sata(int dev)$/;"	f	typeref:typename:int
scan_sata	drivers/block/sata_sil.c	/^int scan_sata(int dev)$/;"	f	typeref:typename:int
scan_sata	drivers/block/sata_sil3114.c	/^int scan_sata (int dev)$/;"	f	typeref:typename:int
scan_tree	lib/zlib/trees.c	/^local void scan_tree (s, tree, max_code)$/;"	f
scan_ucode	tools/ifdtool.c	/^static int scan_ucode(const void *blob, char *ucode_base, int *countp,$/;"	f	typeref:typename:int	file:
scan_write_bbt	drivers/mtd/nand/nand_bbt.c	/^static int scan_write_bbt(struct mtd_info *mtd, loff_t offs, size_t len,$/;"	f	typeref:typename:int	file:
scanmgrgrp_ctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	scanmgrgrp_ctrl;		\/* 0x30 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
scanned	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			scanned[UBI_FM_BM_SIZE];$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long[]
scanned_size	fs/yaffs2/yaffs_guts.h	/^	loff_t scanned_size;$/;"	m	struct:yaffs_file_var	typeref:typename:loff_t
scar	include/linux/immap_qe.h	/^	u32 scar;		\/* Statistics carry register *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
scbrr_calc	drivers/serial/serial_sh.h	/^static inline int scbrr_calc(struct uart_port *port, int bps, int clk)$/;"	f	typeref:typename:int
scc	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct scc {		\/* Serial communication channels *\/$/;"	s
scc	arch/powerpc/include/asm/immap_8260.h	/^typedef struct scc {		\/* Serial communication channels *\/$/;"	s
scc	drivers/net/e1000.h	/^	uint64_t scc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
scc	drivers/video/mx3fb.c	/^	u32	scc:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
scc_agu_mode_sp	board/micronas/vct/scc.c	/^static u32 scc_agu_mode_sp = AGU_BYPASS;$/;"	v	typeref:typename:u32	file:
scc_agu_mode_usb	board/micronas/vct/scc.c	/^static u32 scc_agu_mode_usb = AGU_BYPASS;$/;"	v	typeref:typename:u32	file:
scc_brkcr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_brkcr;	\/* Break count register *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkcr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_brkcr;	\/* Break count register *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkcr	include/commproc.h	/^	ushort	scc_brkcr;	\/* Break count register *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkec	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_brkec;	\/* receive break condition counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkec	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_brkec;	\/* receive break condition counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkec	include/commproc.h	/^	ushort	scc_brkec;	\/* receive break condition counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkln	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_brkln;	\/* last received break length *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkln	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_brkln;	\/* last received break length *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_brkln	include/commproc.h	/^	ushort	scc_brkln;	\/* last received break length *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char1;	\/* control character 1 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char1;	\/* control character 1 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char1	include/commproc.h	/^	ushort	scc_char1;	\/* control character 1 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char2;	\/* control character 2 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char2	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char2;	\/* control character 2 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char2	include/commproc.h	/^	ushort	scc_char2;	\/* control character 2 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char3	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char3;	\/* control character 3 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char3	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char3;	\/* control character 3 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char3	include/commproc.h	/^	ushort	scc_char3;	\/* control character 3 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char4	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char4;	\/* control character 4 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char4	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char4;	\/* control character 4 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char4	include/commproc.h	/^	ushort	scc_char4;	\/* control character 4 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char5	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char5;	\/* control character 5 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char5	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char5;	\/* control character 5 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char5	include/commproc.h	/^	ushort	scc_char5;	\/* control character 5 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char6	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char6;	\/* control character 6 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char6	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char6;	\/* control character 6 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char6	include/commproc.h	/^	ushort	scc_char6;	\/* control character 6 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char7	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char7;	\/* control character 7 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char7	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char7;	\/* control character 7 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char7	include/commproc.h	/^	ushort	scc_char7;	\/* control character 7 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char8	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_char8;	\/* control character 8 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char8	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_char8;	\/* control character 8 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_char8	include/commproc.h	/^	ushort	scc_char8;	\/* control character 8 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_clk	arch/powerpc/include/asm/global_data.h	/^	unsigned long scc_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
scc_cmd	board/micronas/vct/scc.h	/^union scc_cmd {$/;"	u
scc_debug	board/micronas/vct/scc.h	/^union scc_debug {$/;"	u
scc_descriptor	board/micronas/vct/scc.h	/^struct scc_descriptor {$/;"	s
scc_descriptor_table	board/micronas/vct/scc.c	/^static const struct scc_descriptor scc_descriptor_table[] = {$/;"	v	typeref:typename:const struct scc_descriptor[]	file:
scc_dma_cfg	board/micronas/vct/scc.h	/^union scc_dma_cfg {$/;"	u
scc_dma_cmd	board/micronas/vct/scc.c	/^int scc_dma_cmd(enum scc_id id, u32 cmd, u32 dma_id, u32 drs)$/;"	f	typeref:typename:int
scc_dma_state	board/micronas/vct/scc.h	/^struct scc_dma_state {$/;"	s
scc_dsr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	scc_dsr;$/;"	m	struct:scc	typeref:typename:ushort
scc_dsr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	scc_dsr;$/;"	m	struct:scc	typeref:typename:ushort
scc_enable	board/micronas/vct/scc.c	/^int scc_enable(enum scc_id id, u32 value)$/;"	f	typeref:typename:int
scc_enable_pci_mode	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t scc_enable_pci_mode;		\/* Offset 0x004d *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
scc_enet	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct scc_enet {$/;"	s
scc_enet	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct scc_enet {$/;"	s
scc_enet	include/commproc.h	/^typedef struct scc_enet {$/;"	s
scc_enet_t	arch/powerpc/include/asm/cpm_8260.h	/^} scc_enet_t;$/;"	t	typeref:struct:scc_enet
scc_enet_t	arch/powerpc/include/asm/cpm_85xx.h	/^} scc_enet_t;$/;"	t	typeref:struct:scc_enet
scc_enet_t	include/commproc.h	/^} scc_enet_t;$/;"	t	typeref:struct:scc_enet
scc_frmec	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_frmec;	\/* receive framing error counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_frmec	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_frmec;	\/* receive framing error counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_frmec	include/commproc.h	/^	ushort	scc_frmec;	\/* receive framing error counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_genscc	arch/powerpc/include/asm/cpm_8260.h	/^	sccp_t	scc_genscc;$/;"	m	struct:scc_uart	typeref:typename:sccp_t
scc_genscc	arch/powerpc/include/asm/cpm_85xx.h	/^	sccp_t	scc_genscc;$/;"	m	struct:scc_uart	typeref:typename:sccp_t
scc_genscc	include/commproc.h	/^	sccp_t	scc_genscc;$/;"	m	struct:scc_uart	typeref:typename:sccp_t
scc_getc	arch/powerpc/cpu/mpc8xx/serial.c	/^scc_getc(void)$/;"	f	typeref:typename:int	file:
scc_getc	post/cpu/mpc8xx/uart.c	/^static int scc_getc (int scc_index)$/;"	f	typeref:typename:int	file:
scc_gsmrh	arch/powerpc/include/asm/8xx_immap.h	/^	uint	scc_gsmrh;$/;"	m	struct:scc	typeref:typename:uint
scc_gsmrh	arch/powerpc/include/asm/immap_8260.h	/^	uint	scc_gsmrh;$/;"	m	struct:scc	typeref:typename:uint
scc_gsmrl	arch/powerpc/include/asm/8xx_immap.h	/^	uint	scc_gsmrl;$/;"	m	struct:scc	typeref:typename:uint
scc_gsmrl	arch/powerpc/include/asm/immap_8260.h	/^	uint	scc_gsmrl;$/;"	m	struct:scc	typeref:typename:uint
scc_halt	arch/powerpc/cpu/mpc8xx/scc.c	/^static void scc_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
scc_halt	post/cpu/mpc8xx/ether.c	/^static void scc_halt (int scc_index)$/;"	f	typeref:typename:void	file:
scc_halt	post/cpu/mpc8xx/uart.c	/^static void scc_halt(int scc_index)$/;"	f	typeref:typename:void	file:
scc_hdlc	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct scc_hdlc {$/;"	s
scc_hdlc_t	arch/powerpc/include/asm/cpm_8260.h	/^} scc_hdlc_t;$/;"	t	typeref:struct:scc_hdlc
scc_ibc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_ibc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_ibc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_ibc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_ibc	include/commproc.h	/^	ushort	scc_ibc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_id	board/micronas/vct/scc.h	/^	u32 scc_id:8;		\/* SCC id				*\/$/;"	m	struct:scc_dma_state	typeref:typename:u32:8
scc_id	board/micronas/vct/scc.h	/^enum scc_id {$/;"	g
scc_idlc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_idlc;	\/* temp idle counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_idlc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_idlc;	\/* temp idle counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_idlc	include/commproc.h	/^	ushort	scc_idlc;	\/* temp idle counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_idp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_idp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_idp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_idp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_idp	include/commproc.h	/^	uint	scc_idp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_init	arch/powerpc/cpu/mpc8xx/scc.c	/^static int scc_init (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
scc_init	arch/powerpc/cpu/mpc8xx/serial.c	/^static int scc_init (void)$/;"	f	typeref:typename:int	file:
scc_init	post/cpu/mpc8xx/ether.c	/^static void scc_init (int scc_index)$/;"	f	typeref:typename:void	file:
scc_init	post/cpu/mpc8xx/uart.c	/^static void scc_init (int scc_index)$/;"	f	typeref:typename:void	file:
scc_initialize	arch/powerpc/cpu/mpc8xx/scc.c	/^int scc_initialize(bd_t *bis)$/;"	f	typeref:typename:int
scc_instance	board/micronas/vct/scc.h	/^	char *scc_instance;	\/* SCC Name				*\/$/;"	m	struct:scc_descriptor	typeref:typename:char *
scc_maxidl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_maxidl;	\/* Maximum idle chars *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_maxidl	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_maxidl;	\/* Maximum idle chars *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_maxidl	include/commproc.h	/^	ushort	scc_maxidl;	\/* Maximum idle chars *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_mgr_apply_group_all_out_delay_add	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_apply_group_all_out_delay_add(const u32 write_group,$/;"	f	typeref:typename:void	file:
scc_mgr_apply_group_all_out_delay_add_all_ranks	drivers/ddr/altera/sequencer.c	/^scc_mgr_apply_group_all_out_delay_add_all_ranks(const u32 write_group,$/;"	f	typeref:typename:void	file:
scc_mgr_apply_group_dm_out1_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_apply_group_dm_out1_delay(u32 delay1)$/;"	f	typeref:typename:void	file:
scc_mgr_apply_group_dq_in_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_apply_group_dq_in_delay(u32 group_bgn, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_apply_group_dq_out1_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_apply_group_dq_out1_delay(const u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_apply_group_dqs_io_and_oct_out1	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_apply_group_dqs_io_and_oct_out1(u32 write_group,$/;"	f	typeref:typename:void	file:
scc_mgr_initialize	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_initialize(void)$/;"	f	typeref:typename:void	file:
scc_mgr_load_dm	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_load_dm(u32 dm)$/;"	f	typeref:typename:void	file:
scc_mgr_load_dq	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_load_dq(u32 dq_in_group)$/;"	f	typeref:typename:void	file:
scc_mgr_load_dqs	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_load_dqs(u32 dqs)$/;"	f	typeref:typename:void	file:
scc_mgr_load_dqs_for_write_group	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_load_dqs_for_write_group(const u32 write_group)$/;"	f	typeref:typename:void	file:
scc_mgr_load_dqs_io	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_load_dqs_io(void)$/;"	f	typeref:typename:void	file:
scc_mgr_set	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set(u32 off, u32 grp, u32 val)$/;"	f	typeref:typename:void	file:
scc_mgr_set_all_ranks	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_all_ranks(const u32 off, const u32 grp, const u32 val,$/;"	f	typeref:typename:void	file:
scc_mgr_set_dm_in_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dm_in_delay(u32 dm, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dm_out1_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dm_out1_delay(u32 dm, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dq_in_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dq_in_delay(u32 dq_in_group, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dq_out1_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dq_out1_delay(u32 dq_in_group, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqdqs_output_phase	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqdqs_output_phase(u32 write_group, u32 phase)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqdqs_output_phase_all_ranks	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqdqs_output_phase_all_ranks(u32 write_group,$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_bus_in_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_bus_in_delay(u32 read_group, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_en_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_en_delay(u32 read_group, u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_en_delay_all_ranks	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_en_delay_all_ranks(u32 read_group,$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_en_phase	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_en_phase(u32 read_group, u32 phase)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_en_phase_all_ranks	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_en_phase_all_ranks(u32 read_group, u32 phase)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_io_in_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_io_in_delay(u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_dqs_out1_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_dqs_out1_delay(u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_set_hhp_extras	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_hhp_extras(void)$/;"	f	typeref:typename:void	file:
scc_mgr_set_oct_out1_delay	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_set_oct_out1_delay(const u32 write_group, const u32 delay)$/;"	f	typeref:typename:void	file:
scc_mgr_zero_all	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_zero_all(void)$/;"	f	typeref:typename:void	file:
scc_mgr_zero_group	drivers/ddr/altera/sequencer.c	/^static void scc_mgr_zero_group(const u32 write_group, const int out_only)$/;"	f	typeref:typename:void	file:
scc_mrblr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_mrblr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_mrblr	include/commproc.h	/^	ushort	scc_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_nosec	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_nosec;	\/* receive noise counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_nosec	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_nosec;	\/* receive noise counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_nosec	include/commproc.h	/^	ushort	scc_nosec;	\/* receive noise counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_param	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct scc_param {$/;"	s
scc_param	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct scc_param {$/;"	s
scc_param	include/commproc.h	/^typedef struct scc_param {$/;"	s
scc_parec	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_parec;	\/* receive parity error counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_parec	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_parec;	\/* receive parity error counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_parec	include/commproc.h	/^	ushort	scc_parec;	\/* receive parity error counter *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_psmr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	scc_psmr;$/;"	m	struct:scc	typeref:typename:ushort
scc_psmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	scc_psmr;$/;"	m	struct:scc	typeref:typename:ushort
scc_putc	arch/powerpc/cpu/mpc8xx/serial.c	/^scc_putc(const char c)$/;"	f	typeref:typename:void	file:
scc_putc	post/cpu/mpc8xx/uart.c	/^static void scc_putc (int scc_index, const char c)$/;"	f	typeref:typename:void	file:
scc_puts	arch/powerpc/cpu/mpc8xx/serial.c	/^scc_puts (const char *s)$/;"	f	typeref:typename:void	file:
scc_rbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_rbase	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_rbase	include/commproc.h	/^	ushort	scc_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_rbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_rbptr;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_rbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_rbptr;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_rbptr	include/commproc.h	/^	ushort	scc_rbptr;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_rccm	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_rccm;	\/* receive control character mask *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rccm	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_rccm;	\/* receive control character mask *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rccm	include/commproc.h	/^	ushort	scc_rccm;	\/* receive control character mask *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rccr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_rccr;	\/* receive control character register *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rccr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_rccr;	\/* receive control character register *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rccr	include/commproc.h	/^	ushort	scc_rccr;	\/* receive control character register *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rcrc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_rcrc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rcrc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_rcrc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rcrc	include/commproc.h	/^	uint	scc_rcrc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_recv	arch/powerpc/cpu/mpc8xx/scc.c	/^static int scc_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
scc_recv	post/cpu/mpc8xx/ether.c	/^static int scc_recv (int index, void *packet, int max_length)$/;"	f	typeref:typename:int	file:
scc_res1	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_res1;	\/* Reserved *\/$/;"	m	struct:scc_uart	typeref:typename:uint
scc_res1	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_res1;	\/* Reserved *\/$/;"	m	struct:scc_uart	typeref:typename:uint
scc_res1	include/commproc.h	/^	uint	scc_res1;	\/* Reserved *\/$/;"	m	struct:scc_uart	typeref:typename:uint
scc_res2	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_res2;	\/* Reserved *\/$/;"	m	struct:scc_uart	typeref:typename:uint
scc_res2	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_res2;	\/* Reserved *\/$/;"	m	struct:scc_uart	typeref:typename:uint
scc_res2	include/commproc.h	/^	uint	scc_res2;	\/* Reserved *\/$/;"	m	struct:scc_uart	typeref:typename:uint
scc_reset	board/micronas/vct/scc.c	/^int scc_reset(enum scc_id id, u32 value)$/;"	f	typeref:typename:int
scc_rfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	scc_rfcr;	\/* Rx function code *\/$/;"	m	struct:scc_param	typeref:typename:u_char
scc_rfcr	arch/powerpc/include/asm/cpm_85xx.h	/^	u_char	scc_rfcr;	\/* Rx function code *\/$/;"	m	struct:scc_param	typeref:typename:u_char
scc_rfcr	include/commproc.h	/^	u_char	scc_rfcr;	\/* Rx function code *\/$/;"	m	struct:scc_param	typeref:typename:u_char
scc_rlbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_rlbc;	\/* receive last break character *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rlbc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_rlbc;	\/* receive last break character *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rlbc	include/commproc.h	/^	ushort	scc_rlbc;	\/* receive last break character *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_rstate;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_rstate;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rstate	include/commproc.h	/^	uint	scc_rstate;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rtemp	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_rtemp;	\/* Temp storage *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rtemp	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_rtemp;	\/* Temp storage *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rtemp	include/commproc.h	/^	ushort	scc_rtemp;	\/* Temp storage *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_rxtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_rxtmp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rxtmp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_rxtmp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_rxtmp	include/commproc.h	/^	uint	scc_rxtmp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_scce	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	scc_scce;$/;"	m	struct:scc	typeref:typename:ushort
scc_scce	arch/powerpc/include/asm/immap_8260.h	/^	ushort	scc_scce;$/;"	m	struct:scc	typeref:typename:ushort
scc_sccm	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	scc_sccm;$/;"	m	struct:scc	typeref:typename:ushort
scc_sccm	arch/powerpc/include/asm/immap_8260.h	/^	ushort	scc_sccm;$/;"	m	struct:scc	typeref:typename:ushort
scc_sccs	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	scc_sccs;$/;"	m	struct:scc	typeref:typename:u_char
scc_sccs	arch/powerpc/include/asm/immap_8260.h	/^	u_char	scc_sccs;$/;"	m	struct:scc	typeref:typename:u_char
scc_send	arch/powerpc/cpu/mpc8xx/scc.c	/^static int scc_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
scc_send	post/cpu/mpc8xx/ether.c	/^static int scc_send (int index, volatile void *packet, int length)$/;"	f	typeref:typename:int	file:
scc_set_bypass_mode	drivers/ddr/altera/sequencer.c	/^static void scc_set_bypass_mode(const u32 write_group)$/;"	f	typeref:typename:void	file:
scc_set_usb_address_generation_mode	board/micronas/vct/scc.c	/^int scc_set_usb_address_generation_mode(u32 agu_mode)$/;"	f	typeref:typename:int
scc_setbrg	arch/powerpc/cpu/mpc8xx/serial.c	/^scc_setbrg (void)$/;"	f	typeref:typename:void	file:
scc_setup_dma	board/micronas/vct/scc.c	/^int scc_setup_dma(enum scc_id id, u32 buffer_tag,$/;"	f	typeref:typename:int
scc_software_configuration	board/micronas/vct/scc.c	/^static union scc_softwareconfiguration scc_software_configuration[SCC_MAX];$/;"	v	typeref:union:scc_softwareconfiguration[]	file:
scc_softwareconfiguration	board/micronas/vct/scc.h	/^union scc_softwareconfiguration {$/;"	u
scc_state_rd	board/micronas/vct/scc.c	/^static struct scc_dma_state *scc_state_rd[] = {$/;"	v	typeref:struct:scc_dma_state * []	file:
scc_state_rd_0	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_0[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_1	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_1[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_10	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_10[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_11	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_11[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_12	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_12[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_13	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_13[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_14	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_14[] = { {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_15	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_15[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_16	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_16[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_17	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_17[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_18	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_18[] = { {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_19	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_19[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_2	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_2[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_20	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_20[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_21	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_21[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_22	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_22[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_23	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_23[] = { {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_24	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_24[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_25	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_25[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_26	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_26[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_27	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_27[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_28	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_28[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_29	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_29[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_3	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_3[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_30	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_30[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_31	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_31[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_32	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_32[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_33	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_33[] = { {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_34	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_34[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_35	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_35[] = { {0}, {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_36	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_36[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_37	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_37[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_38	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_38[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_39	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_39[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_4	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_4[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_40	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_40[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_5	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_5[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_6	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_6[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_7	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_7[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_8	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_8[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_rd_9	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_rd_9[] = { {0}, {0}, {0}, };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr	board/micronas/vct/scc.c	/^static struct scc_dma_state *scc_state_wr[] = {$/;"	v	typeref:struct:scc_dma_state * []	file:
scc_state_wr_0	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_0[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_1	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_1[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_10	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_10[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_11	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_11[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_12	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_12[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_13	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_13[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_14	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_14[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_15	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_15[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_16	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_16[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_17	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_17[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_18	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_18[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_19	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_19[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_2	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_2[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_20	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_20[] = {$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_21	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_21[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_22	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_22[] = {$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_23	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_23[] = { {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_24	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_24[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_25	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_25[] = {$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_26	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_26[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_27	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_27[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_28	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_28[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_29	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_29[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_3	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_3[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_30	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_30[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_31	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_31[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_32	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_32[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_33	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_33[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_34	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_34[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_35	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_35[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_36	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_36[] = { {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_37	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_37[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_38	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_38[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_39	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_39[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_4	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_4[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_40	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_40[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_5	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_5[] = { {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_6	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_6[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_7	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_7[] = { {0}, {0}, {0}, {0} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_8	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_8[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_state_wr_9	board/micronas/vct/scc.c	/^static struct scc_dma_state scc_state_wr_9[] = { {-1} };$/;"	v	typeref:struct:scc_dma_state[]	file:
scc_t	arch/powerpc/include/asm/8xx_immap.h	/^} scc_t;$/;"	t	typeref:struct:scc
scc_t	arch/powerpc/include/asm/immap_8260.h	/^} scc_t;$/;"	t	typeref:struct:scc
scc_takeover_dma	board/micronas/vct/scc.c	/^static void scc_takeover_dma(enum scc_id id, u32 dma_id, u32 drs)$/;"	f	typeref:typename:void	file:
scc_takeover_mode	board/micronas/vct/scc.c	/^static u32 scc_takeover_mode = SCC_TO_IMMEDIATE;$/;"	v	typeref:typename:u32	file:
scc_tbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbase	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbase	include/commproc.h	/^	ushort	scc_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_tbc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_tbc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbc	include/commproc.h	/^	ushort	scc_tbc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_tbptr;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_tbptr;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tbptr	include/commproc.h	/^	ushort	scc_tbptr;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:ushort
scc_tcrc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_tcrc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tcrc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_tcrc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tcrc	include/commproc.h	/^	uint	scc_tcrc;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tdp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_tdp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tdp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_tdp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tdp	include/commproc.h	/^	uint	scc_tdp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	scc_tfcr;	\/* Tx function code *\/$/;"	m	struct:scc_param	typeref:typename:u_char
scc_tfcr	arch/powerpc/include/asm/cpm_85xx.h	/^	u_char	scc_tfcr;	\/* Tx function code *\/$/;"	m	struct:scc_param	typeref:typename:u_char
scc_tfcr	include/commproc.h	/^	u_char	scc_tfcr;	\/* Tx function code *\/$/;"	m	struct:scc_param	typeref:typename:u_char
scc_todr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	scc_todr;$/;"	m	struct:scc	typeref:typename:ushort
scc_todr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	scc_todr;$/;"	m	struct:scc	typeref:typename:ushort
scc_toseq	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_toseq;	\/* Transmit out of sequence char *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_toseq	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_toseq;	\/* Transmit out of sequence char *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_toseq	include/commproc.h	/^	ushort	scc_toseq;	\/* Transmit out of sequence char *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_trans	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct scc_trans {$/;"	s
scc_trans	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct scc_trans {$/;"	s
scc_trans	include/commproc.h	/^typedef struct scc_trans {$/;"	s
scc_trans_t	arch/powerpc/include/asm/cpm_8260.h	/^} scc_trans_t;$/;"	t	typeref:struct:scc_trans
scc_trans_t	arch/powerpc/include/asm/cpm_85xx.h	/^} scc_trans_t;$/;"	t	typeref:struct:scc_trans
scc_trans_t	include/commproc.h	/^} scc_trans_t;$/;"	t	typeref:struct:scc_trans
scc_tstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_tstate;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_tstate;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tstate	include/commproc.h	/^	uint	scc_tstate;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_tstc	arch/powerpc/cpu/mpc8xx/serial.c	/^scc_tstc(void)$/;"	f	typeref:typename:int	file:
scc_txtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	scc_txtmp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_txtmp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	scc_txtmp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_txtmp	include/commproc.h	/^	uint	scc_txtmp;	\/* Internal *\/$/;"	m	struct:scc_param	typeref:typename:uint
scc_uaddr1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_uaddr1;	\/* UART address character 1 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_uaddr1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_uaddr1;	\/* UART address character 1 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_uaddr1	include/commproc.h	/^	ushort	scc_uaddr1;	\/* UART address character 1 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_uaddr2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	scc_uaddr2;	\/* UART address character 2 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_uaddr2	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	scc_uaddr2;	\/* UART address character 2 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_uaddr2	include/commproc.h	/^	ushort	scc_uaddr2;	\/* UART address character 2 *\/$/;"	m	struct:scc_uart	typeref:typename:ushort
scc_uart	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct scc_uart {$/;"	s
scc_uart	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct scc_uart {$/;"	s
scc_uart	include/commproc.h	/^typedef struct scc_uart {$/;"	s
scc_uart_t	arch/powerpc/include/asm/cpm_8260.h	/^} scc_uart_t;$/;"	t	typeref:struct:scc_uart
scc_uart_t	arch/powerpc/include/asm/cpm_85xx.h	/^} scc_uart_t;$/;"	t	typeref:struct:scc_uart
scc_uart_t	include/commproc.h	/^} scc_uart_t;$/;"	t	typeref:struct:scc_uart
scce	arch/powerpc/include/asm/immap_85xx.h	/^	u16	scce;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u16
scchipid	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 scchipid;		\/*0xf10*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
sccm	arch/powerpc/include/asm/immap_85xx.h	/^	u16	sccm;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u16
sccntctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 sccntctrl;$/;"	m	struct:sysctrl	typeref:typename:u32
sccntdata	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 sccntdata;$/;"	m	struct:sysctrl	typeref:typename:u32
sccntstep	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 sccntstep;$/;"	m	struct:sysctrl	typeref:typename:u32
sccp_t	arch/powerpc/include/asm/cpm_8260.h	/^} sccp_t;$/;"	t	typeref:struct:scc_param
sccp_t	arch/powerpc/include/asm/cpm_85xx.h	/^} sccp_t;$/;"	t	typeref:struct:scc_param
sccp_t	include/commproc.h	/^} sccp_t;$/;"	t	typeref:struct:scc_param
sccr	arch/powerpc/include/asm/immap_512x.h	/^	u32 sccr[2];		\/* System Clock Control Registers *\/$/;"	m	struct:clk512x	typeref:typename:u32[2]
sccr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sccr;		\/* system clock control Register *\/$/;"	m	struct:clk83xx	typeref:typename:u32
sccr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sccr;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
sccs	arch/powerpc/include/asm/immap_85xx.h	/^	u8	sccs;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u8
scctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scctrl;		\/* 0x000 *\/$/;"	m	struct:sysctrl	typeref:typename:u32
scctrl	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scctrl;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scdr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	scdr;		\/* 0x8C SCLK Divider Debouncing Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
scdr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	scdr;		\/* 0x04 System Clock Disable Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
sce	drivers/video/mx3fb.c	/^	u32	sce:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
scent_cfcr	include/commproc.h	/^	u_char	scent_cfcr;$/;"	m	struct:smc_centronics	typeref:typename:u_char
scent_character1	include/commproc.h	/^	ushort	scent_character1;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character2	include/commproc.h	/^	ushort	scent_character2;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character3	include/commproc.h	/^	ushort	scent_character3;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character4	include/commproc.h	/^	ushort	scent_character4;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character5	include/commproc.h	/^	ushort	scent_character5;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character6	include/commproc.h	/^	ushort	scent_character6;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character7	include/commproc.h	/^	ushort	scent_character7;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_character8	include/commproc.h	/^	ushort	scent_character8;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_max_sl	include/commproc.h	/^	ushort	scent_max_sl;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_mrblr	include/commproc.h	/^	ushort	scent_mrblr;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_r_cnt	include/commproc.h	/^	ushort	scent_r_cnt;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_r_ptr	include/commproc.h	/^	uint	scent_r_ptr;$/;"	m	struct:smc_centronics	typeref:typename:uint
scent_rbase	include/commproc.h	/^	ushort	scent_rbase;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_rbptr	include/commproc.h	/^	ushort	scent_rbptr;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_rccm	include/commproc.h	/^	ushort	scent_rccm;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_rccr	include/commproc.h	/^	ushort	scent_rccr;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_rstate	include/commproc.h	/^	uint	scent_rstate;$/;"	m	struct:smc_centronics	typeref:typename:uint
scent_rtemp	include/commproc.h	/^	uint	scent_rtemp;$/;"	m	struct:smc_centronics	typeref:typename:uint
scent_sl_cnt	include/commproc.h	/^	ushort	scent_sl_cnt;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_smask	include/commproc.h	/^	u_char	scent_smask;$/;"	m	struct:smc_centronics	typeref:typename:u_char
scent_t_cnt	include/commproc.h	/^	ushort	scent_t_cnt;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_t_ptr	include/commproc.h	/^	uint	scent_t_ptr;$/;"	m	struct:smc_centronics	typeref:typename:uint
scent_tbase	include/commproc.h	/^	ushort	scent_tbase;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_tbptr	include/commproc.h	/^	ushort	scent_tbptr;$/;"	m	struct:smc_centronics	typeref:typename:ushort
scent_tstate	include/commproc.h	/^	uint	scent_tstate;$/;"	m	struct:smc_centronics	typeref:typename:uint
scent_ttemp	include/commproc.h	/^	uint	scent_ttemp;$/;"	m	struct:smc_centronics	typeref:typename:uint
scer	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	scer;		\/* 0x00 System Clock Enable Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
scf0403_cmd	drivers/video/scf0403_lcd.c	/^struct scf0403_cmd {$/;"	s	file:
scf0403_cmd_dison	drivers/video/scf0403_lcd.c	/^static struct scf0403_cmd scf0403_cmd_dison	= {0x29, NULL, 0};$/;"	v	typeref:struct:scf0403_cmd	file:
scf0403_cmd_slpout	drivers/video/scf0403_lcd.c	/^static struct scf0403_cmd scf0403_cmd_slpout	= {0x11, NULL, 0};$/;"	v	typeref:struct:scf0403_cmd	file:
scf0403_enable	board/compulab/common/omap3_display.c	/^static inline void scf0403_enable(void) {}$/;"	f	typeref:typename:void	file:
scf0403_enable	board/compulab/common/omap3_display.c	/^static void scf0403_enable(void)$/;"	f	typeref:typename:void	file:
scf0403_gpio_reset	drivers/video/scf0403_lcd.c	/^static void scf0403_gpio_reset(unsigned int gpio)$/;"	f	typeref:typename:void	file:
scf0403_init	drivers/video/scf0403_lcd.c	/^int scf0403_init(int reset_gpio)$/;"	f	typeref:typename:int
scf0403_initseq_entry	drivers/video/scf0403_lcd.c	/^struct scf0403_initseq_entry {$/;"	s	file:
scf0403_initseq_sn04	drivers/video/scf0403_lcd.c	/^static struct scf0403_initseq_entry scf0403_initseq_sn04[] = {$/;"	v	typeref:struct:scf0403_initseq_entry[]	file:
scf0403_initseq_sn20	drivers/video/scf0403_lcd.c	/^static struct scf0403_initseq_entry scf0403_initseq_sn20[] = {$/;"	v	typeref:struct:scf0403_initseq_entry[]	file:
scf0403_lcd_init	drivers/video/scf0403_lcd.c	/^static void scf0403_lcd_init(struct scf0403_priv *priv)$/;"	f	typeref:typename:void	file:
scf0403_priv	drivers/video/scf0403_lcd.c	/^struct scf0403_priv {$/;"	s	file:
scf0403_request_reset_gpio	drivers/video/scf0403_lcd.c	/^static int scf0403_request_reset_gpio(unsigned gpio)$/;"	f	typeref:typename:int	file:
scf0403_spi_read_rddid	drivers/video/scf0403_lcd.c	/^static int scf0403_spi_read_rddid(struct spi_slave *spi, u32 *rddid)$/;"	f	typeref:typename:int	file:
scf0403_spi_transfer	drivers/video/scf0403_lcd.c	/^static int scf0403_spi_transfer(struct spi_slave *spi, struct scf0403_cmd *cmd)$/;"	f	typeref:typename:int	file:
scfg	arch/arm/dts/ls1021a.dtsi	/^		scfg: scfg@1570000 {$/;"	l
scfg	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 scfg;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
scfg	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 scfg;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
scfg	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		scfg[AT91_MATRIX_SLAVES];$/;"	m	struct:at91_matrix	typeref:typename:u32[]
scfg	arch/arm/mach-at91/include/mach/at91sam9260_matrix.h	/^	u32	scfg[16];	\/* Slave Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
scfg	arch/arm/mach-at91/include/mach/at91sam9261_matrix.h	/^	u32	scfg[5];	\/* Slave Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[5]
scfg	arch/arm/mach-at91/include/mach/at91sam9263_matrix.h	/^	u32	scfg[16];	\/* Slave Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
scfg	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	scfg[16];$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
scfg	arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h	/^	u32	scfg[16];	\/* Slave Configuration Registers *\/$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
scfg	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	scfg[16];$/;"	m	struct:at91_matrix	typeref:typename:u32[16]
scfg	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 scfg[16];	\/* 0x40 ~ 0x7c: Slave Configuration Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16]
scfg0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 scfg0;	\/* Snooping Configuration Register 0 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
scfg1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 scfg1;	\/* Snooping Configuration Register 1 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
scfg2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 scfg2;	\/* Snooping Configuration Register 2 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
scfg_in32	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define scfg_in32(/;"	d
scfg_out32	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^#define scfg_out32(/;"	d
scfgr	include/fsl_sec.h	/^	u32	scfgr;$/;"	m	struct:ccsr_sec	typeref:typename:u32
scfgrevcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 scfgrevcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
scflashctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scflashctrl;	\/* 0x04c *\/$/;"	m	struct:sysctrl	typeref:typename:u32
scfr	arch/powerpc/include/asm/immap_512x.h	/^	u32 scfr[2];		\/* System Clock Frequency Registers *\/$/;"	m	struct:clk512x	typeref:typename:u32[2]
sched	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 sched;		\/* 0x250 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 sched;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 sched;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 sched;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 sched;		\/* 0x250 scheduler control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 sched;		\/* 0x250 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 sched;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 sched;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 sched;		\/* 0x1c0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 sched;		\/* 0x250 scheduler control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sched	examples/standalone/sched.c	/^int sched (int ac, char *av[])$/;"	f	typeref:typename:int
sched_cacheflush	arch/sh/include/asm/system.h	/^static inline void sched_cacheflush(void)$/;"	f	typeref:typename:void
sched_init	examples/standalone/sched.c	/^static void sched_init (void)$/;"	f	typeref:typename:void	file:
schedule	include/linux/compat.h	/^#define schedule(/;"	d
schedule_erase	drivers/mtd/ubi/wl.c	/^static int schedule_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,$/;"	f	typeref:typename:int	file:
schedule_ubi_work	drivers/mtd/ubi/wl.c	/^static void schedule_ubi_work(struct ubi_device *ubi, struct ubi_work *wrk)$/;"	f	typeref:typename:void	file:
schedule_work	include/linux/compat.h	/^#define schedule_work(/;"	d
schedulerbasepointer	drivers/qe/uec.h	/^	u32  schedulerbasepointer;$/;"	m	struct:uec_tx_global_pram	typeref:typename:u32
schmitt	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	schmitt;	\/* 0x100 Schmitt Trigger Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
schmt	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 schmt:2;		\/* schmidt enable            *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:2
schmt	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 schmt:2;		\/* schmitt enable            *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
schmt_en	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 schmt_en:1;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:1	file:
sci_in	drivers/serial/serial_sh.h	/^#define sci_in(/;"	d
sci_int	arch/x86/include/asm/acpi_table.h	/^	u16 sci_int;$/;"	m	struct:acpi_fadt	typeref:typename:u16
sci_out	drivers/serial/serial_sh.h	/^#define sci_out(/;"	d
sci_rxd_in	drivers/serial/serial_sh.h	/^static inline int sci_rxd_in(struct uart_port *port)$/;"	f	typeref:typename:int
scif0_enable	arch/sh/cpu/sh2/cpu.c	/^#define scif0_enable(/;"	d	file:
scif3_enable	arch/sh/cpu/sh2/cpu.c	/^#define scif3_enable(/;"	d	file:
scif_rxfill	drivers/serial/serial_sh.c	/^static int scif_rxfill(struct uart_port *port)$/;"	f	typeref:typename:int	file:
scimctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scimctrl;$/;"	m	struct:sysctrl	typeref:typename:u32
scimctrl	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scimctrl;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scimstat	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scimstat;$/;"	m	struct:sysctrl	typeref:typename:u32
scimsysstat	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scimsysstat;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scitcr	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scitcr;$/;"	m	struct:sysctrl	typeref:typename:u32
scitir0	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scitir0;$/;"	m	struct:sysctrl	typeref:typename:u32
scitir1	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scitir1;$/;"	m	struct:sysctrl	typeref:typename:u32
scitor	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scitor;$/;"	m	struct:sysctrl	typeref:typename:u32
sck_pin	drivers/video/ssd2828.h	/^	int sck_pin;$/;"	m	struct:ssd2828_config	typeref:typename:int
scl	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	struct i2c_pin_ctrl scl;$/;"	m	struct:i2c_pads_info	typeref:struct:i2c_pin_ctrl
scl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 scl; \/* 0x0 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
scl2tap	arch/powerpc/cpu/mpc512x/i2c.c	/^	int scl2tap;$/;"	m	struct:mpc512x_i2c_tap	typeref:typename:int	file:
scl2tap	arch/powerpc/cpu/mpc5xxx/i2c.c	/^	int scl2tap;$/;"	m	struct:mpc5xxx_i2c_tap	typeref:typename:int	file:
scl_config_1	drivers/ddr/microchip/ddr2_regs.h	/^	u32 scl_config_1;$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32
scl_config_2	drivers/ddr/microchip/ddr2_regs.h	/^	u32 scl_config_2;$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32
scl_gpio	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	struct gpio_desc scl_gpio;$/;"	m	struct:mxc_i2c_bus	typeref:struct:gpio_desc
scl_latency	drivers/ddr/microchip/ddr2_regs.h	/^	u32 scl_latency;$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32
scl_sda_cfg	drivers/i2c/designware_i2c.c	/^	struct dw_scl_sda_cfg *scl_sda_cfg;$/;"	m	struct:dw_i2c	typeref:struct:dw_scl_sda_cfg *	file:
scl_start	drivers/ddr/microchip/ddr2_regs.h	/^	u32 scl_start;$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32
scla	arch/m68k/include/asm/immap_5301x.h	/^	u8 scla;		\/* 0x08 Scale A *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
sclb	arch/m68k/include/asm/immap_5301x.h	/^	u8 sclb;		\/* 0x09 Scale B *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
sclh	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short sclh;            \/* 0xB8 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sclh	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short sclh;	\/* 0x38 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sclh	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short sclh;		\/* 0xB8 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sclh	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short sclh;		\/* 0xB8 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sclk	board/freescale/common/ngpixis.h	/^	u8 sclk[3];$/;"	m	struct:ngpixis	typeref:typename:u8[3]
sclk	board/freescale/common/pixis.h	/^	u8 sclk[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
sclk	board/freescale/common/qixis.h	/^	u8 sclk[3];  \/* Clock Configuration Registers,0x34 *\/$/;"	m	struct:qixis	typeref:typename:u8[3]
sclk	drivers/mmc/ftsdc010_mci.c	/^	uint32_t sclk;    \/* FTSDC010 source clock in Hz *\/$/;"	m	struct:ftsdc010_chip	typeref:typename:uint32_t	file:
sclk	drivers/spi/soft_spi.c	/^	struct gpio_desc sclk;$/;"	m	struct:soft_spi_platdata	typeref:struct:gpio_desc	file:
sclk_bus0_pll_a	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned long sclk_bus0_pll_a;$/;"	m	struct:exynos7420_clk_topc_priv	typeref:typename:unsigned long	file:
sclk_bus1_pll_a	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned long sclk_bus1_pll_a;$/;"	m	struct:exynos7420_clk_topc_priv	typeref:typename:unsigned long	file:
sclk_div	drivers/video/exynos/exynos_fb.c	/^	unsigned int sclk_div;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
sclk_div	include/exynos_lcd.h	/^	unsigned int sclk_div;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
sclk_div_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	sclk_div_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
sclk_div_stat_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	sclk_div_stat_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
sclk_src_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	sclk_src_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
sclk_uart2	drivers/clk/exynos/clk-exynos7420.c	/^	unsigned long sclk_uart2;$/;"	m	struct:exynos7420_clk_top0_priv	typeref:typename:unsigned long	file:
scll	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short scll;            \/* 0xB4 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
scll	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short scll;	\/* 0x34 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
scll	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short scll;		\/* 0xB4 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
scll	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short scll;		\/* 0xB4 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sclock	drivers/fpga/lattice.c	/^void sclock(void)$/;"	f	typeref:typename:void
sclpc_bdr	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_bdr;	\/* SCLPC Bytes Done Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
sclpc_cr	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_cr;	\/* SCLPC Control Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
sclpc_er	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_er;	\/* SCLPC Enable Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
sclpc_nar	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_nar;	\/* SCLPC NextAddress Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
sclpc_psr	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_psr;	\/* SCLPC Packet Size Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
sclpc_sar	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_sar;	\/* SCLPC Start Address Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
sclpc_sr	arch/powerpc/include/asm/immap_512x.h	/^	u32	sclpc_sr;	\/* SCLPC Status Register *\/$/;"	m	struct:lpc512x	typeref:typename:u32
scm	arch/arm/dts/am33xx.dtsi	/^			scm: scm@210000 {$/;"	l	label:l4_wkup
scm	arch/arm/dts/am4372.dtsi	/^			scm: scm@210000 {$/;"	l	label:l4_wkup
scm	arch/arm/dts/dra7.dtsi	/^			scm: scm@2000 {$/;"	l	label:l4_cfg
scm	arch/m68k/include/asm/immap_5441x.h	/^typedef struct scm {$/;"	s
scm1	arch/m68k/include/asm/immap_520x.h	/^typedef struct scm1 {$/;"	s
scm1	arch/m68k/include/asm/immap_5227x.h	/^typedef struct scm1 {$/;"	s
scm1	arch/m68k/include/asm/immap_5301x.h	/^typedef struct scm1 {$/;"	s
scm1	arch/m68k/include/asm/immap_5445x.h	/^typedef struct scm1 {$/;"	s
scm1_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct scm1_ctrl {$/;"	s
scm1_t	arch/m68k/include/asm/immap_520x.h	/^} scm1_t;$/;"	t	typeref:struct:scm1
scm1_t	arch/m68k/include/asm/immap_5227x.h	/^} scm1_t;$/;"	t	typeref:struct:scm1
scm1_t	arch/m68k/include/asm/immap_5301x.h	/^} scm1_t;$/;"	t	typeref:struct:scm1
scm1_t	arch/m68k/include/asm/immap_5329.h	/^} scm1_t;$/;"	t	typeref:struct:scm1_ctrl
scm1_t	arch/m68k/include/asm/immap_5445x.h	/^} scm1_t;$/;"	t	typeref:struct:scm1
scm2	arch/m68k/include/asm/immap_520x.h	/^typedef struct scm2 {$/;"	s
scm2	arch/m68k/include/asm/immap_5301x.h	/^typedef struct scm2 {$/;"	s
scm2	arch/m68k/include/asm/immap_5445x.h	/^typedef struct scm2 {$/;"	s
scm2_ctrl	arch/m68k/include/asm/immap_5227x.h	/^typedef struct scm2_ctrl {$/;"	s
scm2_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct scm2_ctrl {$/;"	s
scm2_t	arch/m68k/include/asm/immap_520x.h	/^} scm2_t;$/;"	t	typeref:struct:scm2
scm2_t	arch/m68k/include/asm/immap_5227x.h	/^} scm2_t;$/;"	t	typeref:struct:scm2_ctrl
scm2_t	arch/m68k/include/asm/immap_5301x.h	/^} scm2_t;$/;"	t	typeref:struct:scm2
scm2_t	arch/m68k/include/asm/immap_5329.h	/^} scm2_t;$/;"	t	typeref:struct:scm2_ctrl
scm2_t	arch/m68k/include/asm/immap_5445x.h	/^} scm2_t;$/;"	t	typeref:struct:scm2
scm3_ctrl	arch/m68k/include/asm/immap_5227x.h	/^typedef struct scm3_ctrl {$/;"	s
scm3_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct scm3_ctrl {$/;"	s
scm3_t	arch/m68k/include/asm/immap_5227x.h	/^} scm3_t;$/;"	t	typeref:struct:scm3_ctrl
scm3_t	arch/m68k/include/asm/immap_5329.h	/^} scm3_t;$/;"	t	typeref:struct:scm3_ctrl
scm_clockdomains	arch/arm/dts/am33xx.dtsi	/^				scm_clockdomains: clockdomains {$/;"	l	label:l4_wkup.scm
scm_clockdomains	arch/arm/dts/am4372.dtsi	/^				scm_clockdomains: clockdomains {$/;"	l	label:l4_wkup.scm
scm_clocks	arch/arm/dts/am33xx.dtsi	/^					scm_clocks: clocks {$/;"	l	label:l4_wkup.scm.scm_conf
scm_clocks	arch/arm/dts/am4372.dtsi	/^					scm_clocks: clocks {$/;"	l	label:l4_wkup.scm.scm_conf
scm_conf	arch/arm/dts/am33xx.dtsi	/^				scm_conf: scm_conf@0 {$/;"	l	label:l4_wkup.scm
scm_conf	arch/arm/dts/am4372.dtsi	/^				scm_conf: scm_conf@0 {$/;"	l	label:l4_wkup.scm
scm_conf	arch/arm/dts/dra7.dtsi	/^				scm_conf: scm_conf@0 {$/;"	l	label:l4_cfg.scm
scm_conf_clocks	arch/arm/dts/dra7.dtsi	/^					scm_conf_clocks: clocks {$/;"	l	label:l4_cfg.scm.scm_conf
scm_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct scm_ctrl {$/;"	s
scm_ctrl	arch/m68k/include/asm/immap_5282.h	/^typedef struct scm_ctrl {$/;"	s
scm_t	arch/m68k/include/asm/immap_5235.h	/^} scm_t;$/;"	t	typeref:struct:scm_ctrl
scm_t	arch/m68k/include/asm/immap_5282.h	/^} scm_t;$/;"	t	typeref:struct:scm_ctrl
scm_t	arch/m68k/include/asm/immap_5441x.h	/^} scm_t;$/;"	t	typeref:struct:scm
scm_version	scripts/setlocalversion	/^scm_version()$/;"	f
scmisr	arch/m68k/include/asm/immap_520x.h	/^	u8 scmisr;		\/* 0x1F *\/$/;"	m	struct:scm2	typeref:typename:u8
scmisr	arch/m68k/include/asm/immap_5227x.h	/^	u8 scmisr;		\/* 0x0F Interrupt Status *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u8
scmisr	arch/m68k/include/asm/immap_5301x.h	/^	u8 scmisr;		\/* 0x1F *\/$/;"	m	struct:scm2	typeref:typename:u8
scmisr	arch/m68k/include/asm/immap_5329.h	/^	u8 scmisr;		\/* 0x1F Interrupt Status Register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
scmisr	arch/m68k/include/asm/immap_5441x.h	/^	u8 scmisr;		\/* 0x1F *\/$/;"	m	struct:scm	typeref:typename:u8
scmisr	arch/m68k/include/asm/immap_5445x.h	/^	u8 scmisr;		\/* 0x1F *\/$/;"	m	struct:scm2	typeref:typename:u8
scnprintf	lib/vsprintf.c	/^int scnprintf(char *buf, size_t size, const char *fmt, ...)$/;"	f	typeref:typename:int
scol	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 scol;$/;"	m	struct:at91_emac	typeref:typename:u32
scontrol	drivers/block/fsl_sata.h	/^	u32 scontrol;		\/* SATA interface control register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
scontrol	drivers/block/mvsata_ide.c	/^	u32 scontrol;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
score_pconf0	arch/x86/cpu/baytrail/early_uart.c	/^static inline unsigned int score_pconf0(int pad_num)$/;"	f	typeref:typename:unsigned int	file:
score_select_func	arch/x86/cpu/baytrail/early_uart.c	/^static void score_select_func(int pad, int func)$/;"	f	typeref:typename:void	file:
scp_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void scp_selection_in_fpga(void)$/;"	f	typeref:typename:void
scp_t	include/api_public.h	/^typedef	int (*scp_t)(int, int *, ...);$/;"	t	typeref:typename:int (*)(int,int *,...)
scpcellid0	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scpcellid0;$/;"	m	struct:sysctrl	typeref:typename:u32
scpcellid1	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scpcellid1;$/;"	m	struct:sysctrl	typeref:typename:u32
scpcellid2	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scpcellid2;$/;"	m	struct:sysctrl	typeref:typename:u32
scpcellid3	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scpcellid3;$/;"	m	struct:sysctrl	typeref:typename:u32
scperclken	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperclken;$/;"	m	struct:sysctrl	typeref:typename:u32
scperclken	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	const u32 scperclken;$/;"	m	struct:syscntl_regs	typeref:typename:const u32
scperctrl0	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperctrl0;$/;"	m	struct:sysctrl	typeref:typename:u32
scperctrl0	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scperctrl0;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scperctrl1	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperctrl1;$/;"	m	struct:sysctrl	typeref:typename:u32
scperctrl1	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scperctrl1;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scperdis	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperdis;$/;"	m	struct:sysctrl	typeref:typename:u32
scperdis	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scperdis;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scperen	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperen;$/;"	m	struct:sysctrl	typeref:typename:u32
scperen	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scperen;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scperiphid0	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperiphid0;	\/* 0xfe0 *\/$/;"	m	struct:sysctrl	typeref:typename:u32
scperiphid1	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperiphid1;$/;"	m	struct:sysctrl	typeref:typename:u32
scperiphid2	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperiphid2;$/;"	m	struct:sysctrl	typeref:typename:u32
scperiphid3	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperiphid3;$/;"	m	struct:sysctrl	typeref:typename:u32
scperstat	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scperstat;$/;"	m	struct:sysctrl	typeref:typename:u32
scperstat	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	const u32 scperstat;$/;"	m	struct:syscntl_regs	typeref:typename:const u32
scpllctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scpllctrl;$/;"	m	struct:sysctrl	typeref:typename:u32
scpllctrl	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scpllctrl;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scpllfctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scpllfctrl;$/;"	m	struct:sysctrl	typeref:typename:u32
scpllfctrl	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scpllfctrl;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scprrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	scprrh;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
scprrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	scprrl;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
scr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	scr;$/;"	m	struct:src	typeref:typename:u32
scr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	scr;$/;"	m	struct:src	typeref:typename:u32
scr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	scr;$/;"	m	struct:src	typeref:typename:u32
scr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int scr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
scr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 scr;$/;"	m	struct:src	typeref:typename:u32
scr	arch/blackfin/include/asm/serial1.h	/^	u16 scr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
scr	arch/blackfin/include/asm/serial4.h	/^	u32 scr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
scr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 scr;		\/* 0x28 Sharp Configuration Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
scr	arch/m68k/include/asm/immap_5445x.h	/^	u32 scr;		\/* 0x04 Status \/ command Register *\/$/;"	m	struct:pci	typeref:typename:u32
scr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 scr;		\/* 0x04 Status \/ command *\/$/;"	m	struct:pci	typeref:typename:u32
scr	arch/powerpc/include/asm/5xx_immap.h	/^	       ushort scr;$/;"	m	struct:tcan::__anon8cdce8f20108	typeref:typename:ushort
scr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $scr   = $mbar - 1 + 0x004$/;"	t
scr	drivers/mmc/fsl_esdhc.c	/^	uint    scr;		\/* eSDHC control register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
scr	include/mmc.h	/^	uint scr[2];$/;"	m	struct:mmc	typeref:typename:uint[2]
scr_addr	drivers/block/pata_bfin.h	/^	unsigned long scr_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
scr_addr	drivers/block/sata_dwc.h	/^	void __iomem		*scr_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
scr_addr	drivers/block/sata_sil3114.h	/^	unsigned long scr_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
scr_addr	include/ahci.h	/^	void __iomem	*scr_addr;$/;"	m	struct:ahci_ioports	typeref:typename:void __iomem *
scr_addr_sstatus	drivers/block/sata_dwc.c	/^static void	*scr_addr_sstatus;$/;"	v	typeref:typename:void *	file:
scr_conf	drivers/video/ipu_regs.h	/^	u32 scr_conf;$/;"	m	struct:ipu_di	typeref:typename:u32
scramble_ena	drivers/video/tegra124/sor.h	/^	int	scramble_ena;$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
scrambler_reset_cnt	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	scrambler_reset_cnt;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
scrambler_seed	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t scrambler_seed;$/;"	m	struct:pei_data	typeref:typename:uint32_t
scrambler_seed	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t scrambler_seed;$/;"	m	struct:mrc_timings	typeref:typename:uint32_t
scrambler_seed_s3	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t scrambler_seed_s3;$/;"	m	struct:pei_data	typeref:typename:uint32_t
scrambling_enables	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t scrambling_enables;	\/* 0, 1 *\/$/;"	m	struct:mrc_params	typeref:typename:uint8_t
scratch	arch/x86/include/asm/bootparam.h	/^	__u32 scratch;		\/* Scratch field! *\/	\/* 0x1e4 *\/$/;"	m	struct:boot_params	typeref:typename:__u32
scratch	drivers/serial/serial_bcm283x_mu.c	/^	u32 scratch;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
scratch	include/usb/ulpi.h	/^	u8	scratch;		\/* 0x16 Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
scratch0	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t scratch0;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
scratch0	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	scratch0; \/* 0x60 *\/$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
scratch0	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	scratch0;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
scratch1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t scratch1;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
scratch1	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	scratch1;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
scratch2	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	scratch2;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
scratch24_reg	arch/arm/mach-tegra/tegra20/warmboot.c	/^union scratch24_reg {$/;"	u	file:
scratch2_reg	arch/arm/mach-tegra/tegra20/warmboot.c	/^union scratch2_reg {$/;"	u	file:
scratch3_reg	arch/arm/include/asm/arch-tegra/warmboot.h	/^union scratch3_reg {$/;"	u
scratch4_reg	arch/arm/mach-tegra/tegra20/warmboot.c	/^union scratch4_reg {$/;"	u	file:
scratch_addr	drivers/usb/dwc3/core.h	/^	dma_addr_t		scratch_addr;$/;"	m	struct:dwc3	typeref:typename:dma_addr_t
scratch_buf	drivers/mtd/nand/nand_spl_simple.c	/^static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];$/;"	v	typeref:typename:u8[]	file:
scratch_buf	drivers/mtd/onenand/onenand_spl.c	/^static u8 scratch_buf[PAGE_4K];$/;"	v	typeref:typename:u8[]	file:
scratch_clear	include/usb/ulpi.h	/^	u8	scratch_clear;		\/* 0x18 Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
scratch_pad	drivers/net/altera_tse.h	/^	u32 scratch_pad;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
scratch_reg_a	arch/arm/include/asm/arch-tegra/dc.h	/^	uint scratch_reg_a;		\/* _COM_SCRATCH_REGISTER_A_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
scratch_reg_b	arch/arm/include/asm/arch-tegra/dc.h	/^	uint scratch_reg_b;		\/* _COM_SCRATCH_REGISTER_B_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
scratch_set	include/usb/ulpi.h	/^	u8	scratch_set;		\/* 0x17 Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
scratchbuf	drivers/usb/dwc3/core.h	/^	void			*scratchbuf;$/;"	m	struct:dwc3	typeref:typename:void *
scratchrw	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     scratchrw[4];  \/* Scratch Read\/Write *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
scratchrw	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 scratchrw[4];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[4]
scratchrw	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	scratchrw[32];	\/* Scratch Read\/Write *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[32]
scratchrw	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     scratchrw[4];  \/* Scratch Read\/Write *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
scratchrw	arch/powerpc/include/asm/immap_85xx.h	/^	u32	scratchrw[4];	\/* Scratch Read\/Write *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
scratchw1r	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     scratchw1r[4];  \/* Scratch Read (Write once) *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
scratchw1r	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	scratchw1r[4];	\/* Scratch Read (Write once) *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
scratchw1r	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     scratchw1r[4];  \/* Scratch Read (Write once) *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
scratchw1r	arch/powerpc/include/asm/immap_85xx.h	/^	u32	scratchw1r[4];	\/* Scratch Read (Write once) *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[4]
screen	arch/sandbox/cpu/sdl.c	/^	SDL_Surface *screen;$/;"	m	struct:sdl_info	typeref:typename:SDL_Surface *	file:
screen	include/pxa_lcd.h	/^	u_long	screen;		\/* physical address of frame buffer *\/$/;"	m	struct:pxafb_info	typeref:typename:u_long
screen	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color screen;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
screen_base	include/linux/fb.h	/^	char *screen_base;	\/* Virtual address *\/$/;"	m	struct:fb_info	typeref:typename:char *
screen_cols	include/api_public.h	/^	int screen_cols;$/;"	m	struct:display_info	typeref:typename:int
screen_height	include/vbe.h	/^	u16 screen_height;$/;"	m	struct:vbe_screen_info	typeref:typename:u16
screen_info	arch/x86/include/asm/bootparam.h	/^	struct screen_info screen_info;			\/* 0x000 *\/$/;"	m	struct:boot_params	typeref:struct:screen_info
screen_info	include/linux/screen_info.h	/^struct screen_info {$/;"	s
screen_linebytes	include/vbe.h	/^	u16 screen_linebytes;$/;"	m	struct:vbe_screen_info	typeref:typename:u16
screen_rows	include/api_public.h	/^	int screen_rows;$/;"	m	struct:display_info	typeref:typename:int
screen_size	include/linux/fb.h	/^	unsigned long screen_size;	\/* Amount of ioremapped VRAM or 0 *\/$/;"	m	struct:fb_info	typeref:typename:unsigned long
screen_width	include/vbe.h	/^	u16 screen_width;$/;"	m	struct:vbe_screen_info	typeref:typename:u16
script_cmd	drivers/block/sym53c8xx.c	/^static unsigned long script_cmd[18];    \/* script for command phase *\/$/;"	v	typeref:typename:unsigned long[18]	file:
script_complete	drivers/block/sym53c8xx.c	/^static unsigned long script_complete[10]; \/* script for complete *\/$/;"	v	typeref:typename:unsigned long[10]	file:
script_data_in	drivers/block/sym53c8xx.c	/^static unsigned long script_data_in[8]; \/* script for data in phase *\/$/;"	v	typeref:typename:unsigned long[8]	file:
script_data_out	drivers/block/sym53c8xx.c	/^static unsigned long script_data_out[8]; \/* script for data out phase *\/$/;"	v	typeref:typename:unsigned long[8]	file:
script_error	drivers/block/sym53c8xx.c	/^static unsigned long script_error[2]; \/* script for error handling *\/$/;"	v	typeref:typename:unsigned long[2]	file:
script_file	tools/env/fw_env_main.c	/^static char *script_file;$/;"	v	typeref:typename:char *	file:
script_int_mask	drivers/block/sym53c8xx.c	/^static unsigned char  script_int_mask;	\/* shadow register for SCRIPT related interrupts *\/$/;"	v	typeref:typename:unsigned char	file:
script_msg_ext	drivers/block/sym53c8xx.c	/^static unsigned long script_msg_ext[32]; \/* script for message in phase when more than 1 byte m/;"	v	typeref:typename:unsigned long[32]	file:
script_msgin	drivers/block/sym53c8xx.c	/^static unsigned long script_msgin[14];	\/* script for message in phase *\/$/;"	v	typeref:typename:unsigned long[14]	file:
script_msgout	drivers/block/sym53c8xx.c	/^static unsigned long script_msgout[8];	\/* script for message out phase (NOT USED) *\/$/;"	v	typeref:typename:unsigned long[8]	file:
script_reselection	drivers/block/sym53c8xx.c	/^static unsigned long script_reselection[4]; \/* script for reselection (NOT USED) *\/$/;"	v	typeref:typename:unsigned long[4]	file:
script_select	drivers/block/sym53c8xx.c	/^static unsigned long script_select[8];	\/* script for selection *\/$/;"	v	typeref:typename:unsigned long[8]	file:
script_status	drivers/block/sym53c8xx.c	/^static unsigned long script_status[6]; \/* script for status phase *\/$/;"	v	typeref:typename:unsigned long[6]	file:
scripts	Makefile	/^scripts: ;$/;"	t
scripts/Kbuild.include	Makefile	/^scripts\/Kbuild.include: ;$/;"	t
scripts/basic/%	Makefile	/^scripts\/basic\/%: scripts_basic ;$/;"	t
scripts_basic	Makefile	/^scripts_basic:$/;"	t
scrm	board/gumstix/duovero/duovero.c	/^struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;$/;"	v	typeref:struct:omap4_scrm_regs * const
scrm	board/ti/panda/panda.c	/^struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;$/;"	v	typeref:struct:omap4_scrm_regs * const
scrm_auxclk0	arch/arm/include/asm/omap_common.h	/^	u32 scrm_auxclk0;$/;"	m	struct:prcm_regs	typeref:typename:u32
scrm_auxclk1	arch/arm/include/asm/omap_common.h	/^	u32 scrm_auxclk1;$/;"	m	struct:prcm_regs	typeref:typename:u32
scroll_lock	board/mpl/common/kbd.c	/^static unsigned char scroll_lock = 0;$/;"	v	typeref:typename:unsigned char	file:
scrolledwindow1	scripts/kconfig/gconf.glade	/^	    <widget class="GtkScrolledWindow" id="scrolledwindow1">$/;"	i
scrolledwindow2	scripts/kconfig/gconf.glade	/^		<widget class="GtkScrolledWindow" id="scrolledwindow2">$/;"	i
scrolledwindow3	scripts/kconfig/gconf.glade	/^		<widget class="GtkScrolledWindow" id="scrolledwindow3">$/;"	i
scrtsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	scrtsr[8];	\/* Core reset status *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[8]
scrub	drivers/mtd/ubi/ubi.h	/^	struct rb_root scrub;$/;"	m	struct:ubi_device	typeref:struct:rb_root
scrub	drivers/mtd/ubi/ubi.h	/^	unsigned int scrub:1;$/;"	m	struct:ubi_ainf_peb	typeref:typename:unsigned int:1
scrub	include/linux/mtd/mtd.h	/^	int scrub;$/;"	m	struct:erase_info	typeref:typename:int
scrub	include/nand.h	/^	int scrub;		\/* if true, really clean NAND by erasing$/;"	m	struct:nand_erase_options	typeref:typename:int
scrub_peb_count	drivers/mtd/ubi/ubi-media.h	/^	__be32 scrub_peb_count;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
scs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     scs;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 scs;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 scs;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs	drivers/misc/fsl_iim.c	/^	u32 scs[0x1f5];$/;"	m	struct:fsl_iim	typeref:typename:u32[0x1f5]	file:
scs	drivers/spi/ich.h	/^	uint32_t scs;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
scs0	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	scs0;$/;"	m	struct:iim_regs	typeref:typename:u32
scs1	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	scs1;$/;"	m	struct:iim_regs	typeref:typename:u32
scs2	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	scs2;$/;"	m	struct:iim_regs	typeref:typename:u32
scs3	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	scs3;$/;"	m	struct:iim_regs	typeref:typename:u32
scs_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     scs_clr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_clr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 scs_clr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_clr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 scs_clr;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     scs_set;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_set	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 scs_set;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_set	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 scs_set;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     scs_tog;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_tog	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 scs_tog;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scs_tog	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 scs_tog;$/;"	m	struct:ocotp_regs	typeref:typename:u32
scsc_reg	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct scsc_reg {$/;"	s
scsi	include/linux/edd.h	/^		} __attribute__ ((packed)) scsi;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0b08
scsi_blk_ops	common/scsi.c	/^static const struct blk_ops scsi_blk_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
scsi_bus_reset	arch/arm/cpu/armv7/omap-common/sata.c	/^void scsi_bus_reset(void)$/;"	f	typeref:typename:void
scsi_bus_reset	drivers/block/ahci.c	/^__weak void scsi_bus_reset(void)$/;"	f	typeref:typename:__weak void
scsi_bus_reset	drivers/block/sandbox_scsi.c	/^void scsi_bus_reset(void)$/;"	f	typeref:typename:void
scsi_bus_reset	drivers/block/sym53c8xx.c	/^void scsi_bus_reset(void)$/;"	f	typeref:typename:void
scsi_chip_init	drivers/block/sym53c8xx.c	/^void scsi_chip_init(void)$/;"	f	typeref:typename:void
scsi_curr_dev	cmd/scsi.c	/^static int scsi_curr_dev; \/* current device *\/$/;"	v	typeref:typename:int	file:
scsi_curr_dev	common/scsi.c	/^static int scsi_curr_dev; \/* current device *\/$/;"	v	typeref:typename:int	file:
scsi_dev_desc	common/scsi.c	/^static struct blk_desc scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];$/;"	v	typeref:struct:blk_desc[]	file:
scsi_device_list	common/scsi.c	/^const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };$/;"	v	typeref:typename:const struct pci_device_id[]
scsi_exec	drivers/block/ahci.c	/^int scsi_exec(ccb *pccb)$/;"	f	typeref:typename:int
scsi_exec	drivers/block/sandbox_scsi.c	/^int scsi_exec(ccb *pccb)$/;"	f	typeref:typename:int
scsi_exec	drivers/block/sym53c8xx.c	/^int scsi_exec(ccb *pccb)$/;"	f	typeref:typename:int
scsi_get_disk_count	common/scsi.c	/^int scsi_get_disk_count(void)$/;"	f	typeref:typename:int
scsi_ident_cpy	common/scsi.c	/^void scsi_ident_cpy(unsigned char *dest, unsigned char *src, unsigned int len)$/;"	f	typeref:typename:void
scsi_init	arch/arm/cpu/armv7/omap-common/sata.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_init	arch/arm/mach-mvebu/cpu.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_init	board/highbank/highbank.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_init	board/sunxi/ahci.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_init	board/xilinx/zynqmp/zynqmp.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_init	common/scsi.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_init	drivers/block/ahci.c	/^void __weak scsi_init(void)$/;"	f	typeref:typename:void __weak
scsi_init	drivers/block/sandbox_scsi.c	/^void scsi_init(void)$/;"	f	typeref:typename:void
scsi_inquiry_resp	drivers/usb/emul/sandbox_flash.c	/^struct scsi_inquiry_resp {$/;"	s	file:
scsi_int_enable	drivers/block/sym53c8xx.c	/^void scsi_int_enable(void)$/;"	f	typeref:typename:void
scsi_int_mask	drivers/block/sym53c8xx.c	/^static unsigned short scsi_int_mask;	\/* shadow register for SCSI related interrupts *\/$/;"	v	typeref:typename:unsigned short	file:
scsi_issue	drivers/block/sym53c8xx.c	/^void scsi_issue(ccb *pccb)$/;"	f	typeref:typename:void
scsi_low_level_init	drivers/block/ahci.c	/^void scsi_low_level_init(int busdevfunc)$/;"	f	typeref:typename:void
scsi_low_level_init	drivers/block/sym53c8xx.c	/^void scsi_low_level_init(int busdevfunc)$/;"	f	typeref:typename:void
scsi_max_devs	common/scsi.c	/^static int scsi_max_devs; \/* number of highest available scsi device *\/$/;"	v	typeref:typename:int	file:
scsi_mem_addr	drivers/block/sym53c8xx.c	/^static unsigned long scsi_mem_addr; \/* base memory address =SCSI_MEM_ADDRESS; *\/$/;"	v	typeref:typename:unsigned long	file:
scsi_print_error	drivers/block/ahci.c	/^void scsi_print_error(ccb * pccb)$/;"	f	typeref:typename:void
scsi_print_error	drivers/block/sandbox_scsi.c	/^void scsi_print_error(ccb *pccb)$/;"	f	typeref:typename:void
scsi_print_error	drivers/block/sym53c8xx.c	/^void scsi_print_error (ccb * pccb)$/;"	f	typeref:typename:void
scsi_print_script	drivers/block/sym53c8xx.c	/^void scsi_print_script(void)$/;"	f	typeref:typename:void
scsi_read	common/scsi.c	/^static ulong scsi_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong	file:
scsi_read10_req	drivers/usb/emul/sandbox_flash.c	/^struct __packed scsi_read10_req {$/;"	s	file:
scsi_read_byte	drivers/block/sym53c8xx.c	/^unsigned char scsi_read_byte(ulong offset)$/;"	f	typeref:typename:unsigned char
scsi_read_capacity	common/scsi.c	/^int scsi_read_capacity(ccb *pccb, lbaint_t *capacity, unsigned long *blksz)$/;"	f	typeref:typename:int
scsi_read_capacity_resp	drivers/usb/emul/sandbox_flash.c	/^struct scsi_read_capacity_resp {$/;"	s	file:
scsi_scan	common/scsi.c	/^void scsi_scan(int mode)$/;"	f	typeref:typename:void
scsi_set_script	drivers/block/sym53c8xx.c	/^void scsi_set_script(ccb *pccb)$/;"	f	typeref:typename:void
scsi_setup_inquiry	common/scsi.c	/^void scsi_setup_inquiry(ccb *pccb)$/;"	f	typeref:typename:void
scsi_setup_read16	common/scsi.c	/^void scsi_setup_read16(ccb *pccb, lbaint_t start, unsigned long blocks)$/;"	f	typeref:typename:void
scsi_setup_read6	common/scsi.c	/^void scsi_setup_read6(ccb *pccb, lbaint_t start, unsigned short blocks)$/;"	f	typeref:typename:void
scsi_setup_read_ext	common/scsi.c	/^void scsi_setup_read_ext(ccb *pccb, lbaint_t start, unsigned short blocks)$/;"	f	typeref:typename:void
scsi_setup_test_unit_ready	common/scsi.c	/^void scsi_setup_test_unit_ready(ccb *pccb)$/;"	f	typeref:typename:void
scsi_setup_write_ext	common/scsi.c	/^void scsi_setup_write_ext(ccb *pccb, lbaint_t start, unsigned short blocks)$/;"	f	typeref:typename:void
scsi_trim_trail	common/scsi.c	/^void scsi_trim_trail(unsigned char *str, unsigned int len)$/;"	f	typeref:typename:void
scsi_write	common/scsi.c	/^static ulong scsi_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong	file:
scsi_write_byte	drivers/block/sym53c8xx.c	/^void scsi_write_byte(ulong offset,unsigned char val)$/;"	f	typeref:typename:void
scsi_write_dsp	drivers/block/sym53c8xx.c	/^void scsi_write_dsp(unsigned long start)$/;"	f	typeref:typename:void
scsocid	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 scsocid;		\/*0xf1c*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
scsr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	scsr;		\/* 0x08 System Clock Status Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
scsysid0	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scsysid0;		\/* 0xee0 *\/$/;"	m	struct:sysctrl	typeref:typename:u32
scsysid1	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scsysid1;$/;"	m	struct:sysctrl	typeref:typename:u32
scsysid2	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scsysid2;$/;"	m	struct:sysctrl	typeref:typename:u32
scsysid3	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scsysid3;$/;"	m	struct:sysctrl	typeref:typename:u32
scsysstat	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scsysstat;$/;"	m	struct:sysctrl	typeref:typename:u32
scsysstat	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scsysstat;$/;"	m	struct:syscntl_regs	typeref:typename:u32
sctl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 sctl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
sctl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 sctl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
sctl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 sctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sctl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 sctl;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sctl	drivers/block/dwc_ahsata.c	/^	u32 sctl;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
sctlr	arch/arm/mach-sunxi/board.c	/^	uint32_t sctlr;$/;"	m	struct:fel_stash	typeref:typename:uint32_t	file:
sctr_regs	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct sctr_regs {$/;"	s
sctr_regs	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct sctr_regs {$/;"	s
sctr_regs	arch/arm/include/asm/imx-common/syscounter.h	/^struct sctr_regs {$/;"	s
scu_acc_ctl	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_acc_ctl;	\/* SCU Access Control Register, offset 50 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_base	arch/arm/mach-zynq/include/mach/hardware.h	/^#define scu_base /;"	d
scu_cfg	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_cfg;		\/* SCU Config Register, offset 04 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_cpu_pwr_stat	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_cpu_pwr_stat;	\/* SCU CPU Power Status Register, offset 08 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_ctlr	arch/arm/include/asm/arch-tegra/scu.h	/^struct scu_ctlr {$/;"	s
scu_ctrl	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_ctrl;		\/* SCU Control Register, offset 00 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_filt_end	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_filt_end;	\/* SCU Filtering End Address Reg, offset 44 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_filt_start	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_filt_start;	\/* SCU Filtering Start Address Reg, offset 40 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_inv_all	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_inv_all;	\/* SCU Invalidate All Register, offset 0C *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_ns_acc_ctl	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_ns_acc_ctl;	\/* SCU Non-secure Access Cntrl Reg, offset 54 *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint
scu_registers	arch/arm/mach-socfpga/include/mach/scu.h	/^struct scu_registers {$/;"	s
scu_regs	arch/arm/cpu/armv7/mx6/soc.c	/^struct scu_regs {$/;"	s	file:
scu_regs	arch/arm/mach-socfpga/misc.c	/^static struct scu_registers *scu_regs =$/;"	v	typeref:struct:scu_registers *	file:
scu_regs	arch/arm/mach-socfpga/spl.c	/^static struct scu_registers *scu_regs =$/;"	v	typeref:struct:scu_registers *	file:
scu_regs	arch/arm/mach-zynq/include/mach/hardware.h	/^struct scu_regs {$/;"	s
scu_reserved0	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_reserved0[12];	\/* reserved, offset 10-3C *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint[12]
scu_reserved1	arch/arm/include/asm/arch-tegra/scu.h	/^	uint scu_reserved1[2];	\/* reserved, offset 48-4C *\/$/;"	m	struct:scu_ctlr	typeref:typename:uint[2]
scu_timer	arch/arm/mach-zynq/timer.c	/^struct scu_timer {$/;"	s	file:
scutimer	arch/arm/dts/zynq-7000.dtsi	/^		scutimer: timer@f8f00600 {$/;"	l	label:amba
scvcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 scvcr;		\/* System Critical Interrupt Vector Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
scver	board/freescale/common/ngpixis.h	/^	u8 scver;$/;"	m	struct:ngpixis	typeref:typename:u8
scver	board/freescale/common/qixis.h	/^	u8 scver;   \/* QIXIS Version Register *\/$/;"	m	struct:qixis	typeref:typename:u8
scxtalctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^	u32 scxtalctrl;$/;"	m	struct:sysctrl	typeref:typename:u32
scxtalctrl	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^	u32 scxtalctrl;$/;"	m	struct:syscntl_regs	typeref:typename:u32
scyc_addr	include/universe.h	/^	unsigned int scyc_addr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
scyc_cmp	include/universe.h	/^	unsigned int scyc_cmp;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
scyc_ctl	include/universe.h	/^	unsigned int scyc_ctl;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
scyc_en	include/universe.h	/^	unsigned int scyc_en;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
scyc_swp	include/universe.h	/^	unsigned int scyc_swp;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
sd	arch/arm/cpu/armv7/omap-common/pipe3-phy.h	/^	u8      sd;$/;"	m	struct:pipe3_dpll_params	typeref:typename:u8
sd	arch/arm/dts/uniphier-ld20.dtsi	/^		sd: sdhc@5a400000 {$/;"	l
sd	arch/arm/dts/uniphier-ld4.dtsi	/^	sd: sdhc@5a400000 {$/;"	l
sd	arch/arm/dts/uniphier-pro4.dtsi	/^	sd: sdhc@5a400000 {$/;"	l
sd	arch/arm/dts/uniphier-pro5.dtsi	/^	sd: sdhc@68800000 {$/;"	l
sd	arch/arm/dts/uniphier-pxs2.dtsi	/^	sd: sdhc@5a400000 {$/;"	l
sd	arch/arm/dts/uniphier-sld3.dtsi	/^		sd: sdhc@5a500000 {$/;"	l
sd	arch/arm/dts/uniphier-sld8.dtsi	/^	sd: sdhc@5a400000 {$/;"	l
sd	arch/sandbox/include/asm/eth-raw-os.h	/^	int sd;$/;"	m	struct:eth_sandbox_raw_priv	typeref:typename:int
sd	drivers/usb/dwc3/ti_usb_phy.c	/^	u8	sd;$/;"	m	struct:usb3_dpll_params	typeref:typename:u8	file:
sd	drivers/usb/phy/omap_usb_phy.c	/^	u8	sd;$/;"	m	struct:usb3_dpll_params	typeref:typename:u8	file:
sd0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 sd0_clk_cfg;	\/* 0x88 sd0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 sd0_clk_cfg;	\/* 0x88 sd0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 sd0_clk_cfg;	\/* 0x88 sd0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 sd0_clk_cfg;	\/* 0x410 sd0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 sd0_clk_cfg;	\/* 0x88 sd0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 sd0_clk_cfg;	\/* 0x88 sd0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 sd0_clk_cfg;	\/* 0x88 sd0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 sd0_clk_cfg;	\/* 0x410 sd0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd0ckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sd0ckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
sd1	arch/arm/dts/uniphier-pro4.dtsi	/^	sd1: sdhc@5a600000 {$/;"	l
sd1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 sd1_clk_cfg;	\/* 0x8c sd1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 sd1_clk_cfg;	\/* 0x8c sd1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 sd1_clk_cfg;	\/* 0x8c sd1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 sd1_clk_cfg;	\/* 0x414 sd1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 sd1_clk_cfg;	\/* 0x8c sd1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 sd1_clk_cfg;	\/* 0x8c sd1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 sd1_clk_cfg;	\/* 0x8c sd1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 sd1_clk_cfg;	\/* 0x414 sd1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
sd1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326,$/;"	v	typeref:typename:const unsigned[]	file:
sd1ckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sd1ckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
sd1crc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 sd1crc;		\/* 0x054 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
sd1refclk_sel	board/freescale/ls1043ardb/cpld.h	/^	u8 sd1refclk_sel;	\/* 0xA - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sd1refclk_sel	board/freescale/ls1046ardb/cpld.h	/^	u8 sd1refclk_sel;	\/* 0xA - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sd2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 sd2_clk_cfg;	\/* 0x90 sd2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 sd2_clk_cfg;	\/* 0x90 sd2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 sd2_clk_cfg;	\/* 0x90 sd2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 sd2_clk_cfg;	\/* 0x418 sd2 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 sd2_clk_cfg;	\/* 0x90 sd2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 sd2_clk_cfg;	\/* 0x90 sd2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 sd2_clk_cfg;	\/* 0x90 sd2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 sd2_clk_cfg;	\/* 0x418 sd2 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd2ckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sd2ckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
sd2crc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 sd2crc;		\/* 0x058 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 sd3_clk_cfg;	\/* 0x94 sd3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 sd3_clk_cfg;	\/* 0x94 sd3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 sd3_clk_cfg;	\/* 0x94 sd3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 sd3_clk_cfg;	\/* 0x41c sd3 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 sd3_clk_cfg;	\/* 0x94 sd3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 sd3_clk_cfg;	\/* 0x94 sd3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 sd3_clk_cfg;	\/* 0x94 sd3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 sd3_clk_cfg;	\/* 0x41c sd3 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
sd3crc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 sd3crc;		\/* 0x0E0 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
sd4crc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 sd4crc;		\/* 0x0E4 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
sd_atime	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_atime;	\/* time of last access *\/$/;"	m	struct:stat_data	typeref:typename:__u32
sd_atime	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_atime;	\/* time of last access *\/$/;"	m	struct:stat_data_v1	typeref:typename:__u32
sd_attrs	fs/reiserfs/reiserfs_private.h	/^    __u16 sd_attrs;	\/* persistent inode flags *\/$/;"	m	struct:stat_data	typeref:typename:__u16
sd_au_size	drivers/mmc/mmc.c	/^static const unsigned int sd_au_size[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
sd_blocks	fs/reiserfs/reiserfs_private.h	/^	__u32 sd_blocks;	\/* number of blocks file uses *\/$/;"	m	union:stat_data_v1::__anona10af8d2040a	typeref:typename:__u32
sd_blocks	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_blocks;$/;"	m	struct:stat_data	typeref:typename:__u32
sd_change_freq	drivers/mmc/mmc.c	/^static int sd_change_freq(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sd_ctime	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_ctime;	\/* time inode (stat data) was last changed (except changes to sd_atime and /;"	m	struct:stat_data	typeref:typename:__u32
sd_ctime	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_ctime;	\/* time inode (stat data) was last changed (except changes to sd_atime and /;"	m	struct:stat_data_v1	typeref:typename:__u32
sd_emmc	board/freescale/ls1046ardb/cpld.h	/^	u8 sd_emmc;             \/* 0xF - SD\/EMMC Interface Control Regsiter *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sd_error	drivers/mmc/sh_mmcif.h	/^	u16			sd_error;$/;"	m	struct:sh_mmcif_host	typeref:typename:u16
sd_error	drivers/mmc/sh_sdhi.c	/^	unsigned char sd_error;$/;"	m	struct:sh_sdhi_host	typeref:typename:unsigned char	file:
sd_first_direct_byte	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_first_direct_byte; \/* first byte of file which is stored$/;"	m	struct:stat_data_v1	typeref:typename:__u32
sd_generation	fs/reiserfs/reiserfs_private.h	/^	__u32 sd_generation;$/;"	m	union:stat_data::__anona10af8d2050a	typeref:typename:__u32
sd_gid	fs/reiserfs/reiserfs_private.h	/^    __u16 sd_gid;		\/* group *\/$/;"	m	struct:stat_data_v1	typeref:typename:__u16
sd_gid	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_gid;		\/* group *\/$/;"	m	struct:stat_data	typeref:typename:__u32
sd_ifc_mux	board/freescale/p1010rdb/p1010rdb.c	/^static uint sd_ifc_mux;$/;"	v	typeref:typename:uint	file:
sd_mode	fs/reiserfs/reiserfs_private.h	/^    __u16 sd_mode;	\/* file type, permissions *\/$/;"	m	struct:stat_data	typeref:typename:__u16
sd_mode	fs/reiserfs/reiserfs_private.h	/^    __u16 sd_mode;	\/* file type, permissions *\/$/;"	m	struct:stat_data_v1	typeref:typename:__u16
sd_mode	fs/reiserfs/reiserfs_private.h	/^#define sd_mode(/;"	d
sd_mtime	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_mtime;	\/* time file was last modified	*\/$/;"	m	struct:stat_data	typeref:typename:__u32
sd_mtime	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_mtime;	\/* time file was last modified	*\/$/;"	m	struct:stat_data_v1	typeref:typename:__u32
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3};  \/* No SDVOLC *\/$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8};$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int sd_muxvals[] = {1, 1, 1, 1};$/;"	v	typeref:typename:const int[]	file:
sd_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};$/;"	v	typeref:typename:const int[]	file:
sd_nlink	fs/reiserfs/reiserfs_private.h	/^    __u16 sd_nlink;	\/* number of hard links *\/$/;"	m	struct:stat_data_v1	typeref:typename:__u16
sd_nlink	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_nlink;	\/* number of hard links *\/$/;"	m	struct:stat_data	typeref:typename:__u32
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned sd_pins[] = {150, 151, 152, 153, 154, 155, 156, 157, 158};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned sd_pins[] = {42, 43, 44, 45};$/;"	v	typeref:typename:const unsigned[]	file:
sd_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40};$/;"	v	typeref:typename:const unsigned[]	file:
sd_print_item	fs/reiserfs/reiserfs.c	/^static void sd_print_item (struct item_head * ih, char * item)$/;"	f	typeref:typename:void	file:
sd_rdev	fs/reiserfs/reiserfs_private.h	/^	__u32 sd_rdev;$/;"	m	union:stat_data::__anona10af8d2050a	typeref:typename:__u32
sd_rdev	fs/reiserfs/reiserfs_private.h	/^	__u32 sd_rdev;$/;"	m	union:stat_data_v1::__anona10af8d2040a	typeref:typename:__u32
sd_read_ssr	drivers/mmc/mmc.c	/^static int sd_read_ssr(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sd_rise_time	drivers/usb/eth/r8152.h	/^#define sd_rise_time(/;"	d
sd_rise_time_mask	drivers/usb/eth/r8152.h	/^#define sd_rise_time_mask	/;"	d
sd_sector	tools/mxsboot.c	/^static uint32_t sd_sector = 2048;$/;"	v	typeref:typename:uint32_t	file:
sd_send_op_cond	drivers/mmc/mmc.c	/^static int sd_send_op_cond(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sd_size	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_size;	\/* file size *\/$/;"	m	struct:stat_data_v1	typeref:typename:__u32
sd_size	fs/reiserfs/reiserfs_private.h	/^    __u64 sd_size;	\/* file size *\/$/;"	m	struct:stat_data	typeref:typename:__u64
sd_size	fs/reiserfs/reiserfs_private.h	/^#define sd_size(/;"	d
sd_size_hi	fs/reiserfs/reiserfs_private.h	/^#define sd_size_hi(/;"	d
sd_ssr	include/mmc.h	/^struct sd_ssr {$/;"	s
sd_switch	drivers/mmc/mmc.c	/^static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)$/;"	f	typeref:typename:int	file:
sd_uid	fs/reiserfs/reiserfs_private.h	/^    __u16 sd_uid;		\/* owner *\/$/;"	m	struct:stat_data_v1	typeref:typename:__u16
sd_uid	fs/reiserfs/reiserfs_private.h	/^    __u32 sd_uid;		\/* owner *\/$/;"	m	struct:stat_data	typeref:typename:__u32
sd_v1_gid	fs/reiserfs/reiserfs_private.h	/^#define sd_v1_gid(/;"	d
sd_v1_mode	fs/reiserfs/reiserfs_private.h	/^#define sd_v1_mode(/;"	d
sd_v1_mtime	fs/reiserfs/reiserfs_private.h	/^#define sd_v1_mtime(/;"	d
sd_v1_nlink	fs/reiserfs/reiserfs_private.h	/^#define sd_v1_nlink(/;"	d
sd_v1_size	fs/reiserfs/reiserfs_private.h	/^#define sd_v1_size(/;"	d
sd_v1_uid	fs/reiserfs/reiserfs_private.h	/^#define sd_v1_uid(/;"	d
sd_v2_gid	fs/reiserfs/reiserfs_private.h	/^#define sd_v2_gid(/;"	d
sd_v2_mode	fs/reiserfs/reiserfs_private.h	/^#define sd_v2_mode(/;"	d
sd_v2_mtime	fs/reiserfs/reiserfs_private.h	/^#define sd_v2_mtime(/;"	d
sd_v2_nlink	fs/reiserfs/reiserfs_private.h	/^#define sd_v2_nlink(/;"	d
sd_v2_size	fs/reiserfs/reiserfs_private.h	/^#define sd_v2_size(/;"	d
sd_v2_uid	fs/reiserfs/reiserfs_private.h	/^#define sd_v2_uid(/;"	d
sda	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	struct i2c_pin_ctrl sda;$/;"	m	struct:i2c_pads_info	typeref:struct:i2c_pin_ctrl
sda_gpio	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	struct gpio_desc sda_gpio;$/;"	m	struct:mxc_i2c_bus	typeref:struct:gpio_desc
sda_hold	drivers/i2c/designware_i2c.c	/^	u32 sda_hold;$/;"	m	struct:dw_scl_sda_cfg	typeref:typename:u32	file:
sdaqmr	include/linux/immap_qe.h	/^	u32 sdaqmr;		\/* SDMA address bus qualify mask register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdaqr	include/linux/immap_qe.h	/^	u32 sdaqr;		\/* SDMA address bus qualify register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdat	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	sdat;$/;"	m	struct:iim_regs	typeref:typename:u32
sdat	arch/powerpc/include/asm/immap_512x.h	/^	u32 sdat;		\/* IIM explicit sense data *\/$/;"	m	struct:iim512x	typeref:typename:u32
sdat	drivers/misc/fsl_iim.c	/^	u32 sdat;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
sdata	arch/openrisc/cpu/u-boot.lds	/^		sdata = .;$/;"	s
sdbank1_clk	board/freescale/p2041rdb/cpld.h	/^	u8 sdbank1_clk;		\/* 0x9 - SerDes Bank1 Reference clock *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sdbank2_clk	board/freescale/p2041rdb/cpld.h	/^	u8 sdbank2_clk;		\/* 0xa - SerDes Bank2 Reference clock *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sdbar0	arch/m68k/include/asm/immap_5275.h	/^	u32 sdbar0;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdbar1	arch/m68k/include/asm/immap_5275.h	/^	u32 sdbar1;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdbcr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	sdbcr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
sdbcr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	sdbcr;		\/* 0x08 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
sdbcr2	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	sdbcr2;		\/* 0x1C *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
sdbmr0	arch/m68k/include/asm/immap_5275.h	/^	u32 sdbmr0;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdbmr1	arch/m68k/include/asm/immap_5275.h	/^	u32 sdbmr1;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdbuf	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 sdbuf;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
sdc	drivers/net/mvgbe.h	/^	u32 sdc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
sdc_enable_channel	drivers/video/mx3fb.c	/^static void sdc_enable_channel(void *fbmem)$/;"	f	typeref:typename:void	file:
sdc_init_panel	drivers/video/mx3fb.c	/^static int sdc_init_panel(u16 width, u16 height,$/;"	f	typeref:typename:int	file:
sdc_regs	arch/arm/mach-snapdragon/clock-apq8016.c	/^static const struct bcr_regs sdc_regs[] = {$/;"	v	typeref:typename:const struct bcr_regs[]	file:
sdcard_clk_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
sdcard_cmd_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
sdcard_d0_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
sdcard_d1_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
sdcard_d2_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
sdcard_d3_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
sdcard_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const sdcard_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
sdcard_pins	arch/arm/dts/meson-gxbb.dtsi	/^				sdcard_pins: sdcard {$/;"	l	label:periphs.pinctrl_periphs
sdcfg	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int sdcfg;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
sdcfg1	arch/m68k/include/asm/immap_5227x.h	/^	u32 sdcfg1;		\/* Configuration 1 *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcfg1	arch/m68k/include/asm/immap_5275.h	/^	u32 sdcfg1;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdcfg1	arch/m68k/include/asm/immap_5445x.h	/^	u32 sdcfg1;		\/* SDRAM Configuration Register 1 *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcfg2	arch/m68k/include/asm/immap_5227x.h	/^	u32 sdcfg2;		\/* Chip Select *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcfg2	arch/m68k/include/asm/immap_5275.h	/^	u32 sdcfg2;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdcfg2	arch/m68k/include/asm/immap_5445x.h	/^	u32 sdcfg2;		\/* SDRAM Chip Select Register *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcmr	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdcmr;	\/* Mode register *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdcmr	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdcmr;	\/* Mode register *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdcr	arch/m68k/include/asm/immap_5227x.h	/^	u32 sdcr;		\/* Control *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcr	arch/m68k/include/asm/immap_5275.h	/^	u32 sdcr;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdcr	arch/m68k/include/asm/immap_5445x.h	/^	u32 sdcr;		\/* SDRAM Control Register *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $sdcr  = $mbar - 1 + 0x180$/;"	t
sdcr	include/atmel_mci.h	/^	u32	sdcr;	\/* 0x0c *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
sdcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdcr0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdcr0s	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdcr0s;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdcr1	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdcr1;	\/* Control register 1 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdcr1	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdcr1;	\/* Control register 1 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdcr1;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdcr1s	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdcr1s;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdcr2	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdcr2;	\/* Control register 2 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdcr2	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdcr2;	\/* Control register 2 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdcs0	arch/m68k/include/asm/immap_5227x.h	/^	u32 sdcs0;		\/* Mode\/Extended Mode *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcs0	arch/m68k/include/asm/immap_5445x.h	/^	u32 sdcs0;		\/* SDRAM Mode\/Extended Mode Register *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcs1	arch/m68k/include/asm/immap_5227x.h	/^	u32 sdcs1;		\/* Mode\/Extended Mode *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdcs1	arch/m68k/include/asm/immap_5445x.h	/^	u32 sdcs1;		\/* SDRAM Mode\/Extended Mode Register *\/$/;"	m	struct:sdramc	typeref:typename:u32
sddirctl	drivers/mmc/fsl_esdhc.c	/^	uint    sddirctl;	\/* SD direction control register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
sddrvcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sddrvcr0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sde_to_rst	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 sde_to_rst;	\/* Time from SDE enable until DDR reset# is high *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
sdelay	arch/arm/cpu/armv7/syslib.c	/^void sdelay(unsigned long loops)$/;"	f	typeref:typename:void
sdelay	drivers/adc/adc-uclass.c	/^#define sdelay(/;"	d	file:
sdelay	drivers/block/fsl_sata.c	/^static inline void sdelay(unsigned long sec)$/;"	f	typeref:typename:void	file:
sdelay	include/mpc5xxx.h	/^	volatile u32	sdelay;$/;"	m	struct:mpc5xxx_sdram	typeref:typename:volatile u32
sdest	arch/powerpc/include/asm/fsl_portals.h	/^	u8	sdest;$/;"	m	struct:qportal_info	typeref:typename:u8
sdev	drivers/block/sata_dwc.h	/^	struct scsi_device	*sdev;$/;"	m	struct:ata_device	typeref:struct:scsi_device *
sdev	include/keyboard.h	/^	struct stdio_dev sdev;$/;"	m	struct:keyboard_priv	typeref:struct:stdio_dev
sdev	include/serial.h	/^	struct stdio_dev *sdev;$/;"	m	struct:serial_dev_priv	typeref:struct:stdio_dev *
sdev	include/video_console.h	/^	struct stdio_dev sdev;$/;"	m	struct:vidconsole_priv	typeref:struct:stdio_dev
sdevname	board/siemens/draco/board.h	/^	char sdevname[16];$/;"	m	struct:chip_data	typeref:typename:char[16]
sdgencnt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdgencnt;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdh_send_cmd	drivers/mmc/bfin_sdh.c	/^sdh_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)$/;"	f	typeref:typename:int	file:
sdh_set_clk	drivers/mmc/bfin_sdh.c	/^static void sdh_set_clk(unsigned long clk)$/;"	f	typeref:typename:void	file:
sdh_setup_data	drivers/mmc/bfin_sdh.c	/^static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
sdhc	arch/powerpc/include/asm/immap_512x.h	/^	sdhc512x_t		sdhc;		\/* SDHC *\/$/;"	m	struct:immap	typeref:typename:sdhc512x_t
sdhc	arch/powerpc/include/asm/immap_83xx.h	/^	sdhc83xx_t		sdhc;		\/* SDHC Controller *\/$/;"	m	struct:immap	typeref:typename:sdhc83xx_t
sdhc512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct sdhc512x {$/;"	s
sdhc512x_t	arch/powerpc/include/asm/immap_512x.h	/^} sdhc512x_t;$/;"	t	typeref:struct:sdhc512x
sdhc83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct sdhc83xx {$/;"	s
sdhc83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} sdhc83xx_t;$/;"	t	typeref:struct:sdhc83xx
sdhc_adapter	arch/powerpc/include/asm/global_data.h	/^	u8 sdhc_adapter;$/;"	m	struct:arch_global_data	typeref:typename:u8
sdhc_clk	arch/arm/include/asm/global_data.h	/^	u32 sdhc_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
sdhc_clk	arch/powerpc/include/asm/global_data.h	/^	u32 sdhc_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
sdhc_clk	drivers/mmc/fsl_esdhc.c	/^	unsigned int sdhc_clk;$/;"	m	struct:fsl_esdhc_priv	typeref:typename:unsigned int	file:
sdhc_clk	include/fsl_esdhc.h	/^	u32	sdhc_clk;$/;"	m	struct:fsl_esdhc_cfg	typeref:typename:u32
sdhc_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 sdhc_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sdhc_spics_sel	board/freescale/ls1043ardb/cpld.h	/^	u8 sdhc_spics_sel;	\/* 0xC - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sdhc_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 sdhc_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sdhccr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdhccr;		\/* eSDHC Control Registers for MPC830x *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sdhcdcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sdhcdcr;	\/* SDHC debug control register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdhci	arch/arm/dts/rk3399.dtsi	/^	sdhci: sdhci@fe330000 {$/;"	l
sdhci	arch/mips/dts/pic32mzda.dtsi	/^	sdhci: sdhci@1f8ec000 {$/;"	l
sdhci0	arch/arm/dts/zynq-7000.dtsi	/^		sdhci0: sdhci@e0100000 {$/;"	l	label:amba
sdhci0	arch/arm/dts/zynqmp.dtsi	/^		sdhci0: sdhci@ff160000 {$/;"	l
sdhci0_pwrseq	arch/arm/dts/tegra124-nyan.dtsi	/^	sdhci0_pwrseq: sdhci0_pwrseq {$/;"	l
sdhci1	arch/arm/dts/zynq-7000.dtsi	/^		sdhci1: sdhci@e0101000 {$/;"	l	label:amba
sdhci1	arch/arm/dts/zynqmp.dtsi	/^		sdhci1: sdhci@ff170000 {$/;"	l
sdhci_bind	drivers/mmc/sdhci.c	/^int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg)$/;"	f	typeref:typename:int
sdhci_cmd_done	drivers/mmc/sdhci.c	/^static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd)$/;"	f	typeref:typename:void	file:
sdhci_get_config	drivers/mmc/s5p_sdhci.c	/^static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)$/;"	f	typeref:typename:int	file:
sdhci_host	drivers/mmc/s5p_sdhci.c	/^struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];$/;"	v	typeref:struct:sdhci_host[]
sdhci_host	include/sdhci.h	/^struct sdhci_host {$/;"	s
sdhci_init	drivers/mmc/sdhci.c	/^static int sdhci_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sdhci_mvebu_mbus_config	drivers/mmc/mv_sdhci.c	/^static void sdhci_mvebu_mbus_config(void __iomem *base)$/;"	f	typeref:typename:void	file:
sdhci_ops	drivers/mmc/sdhci.c	/^const struct dm_mmc_ops sdhci_ops = {$/;"	v	typeref:typename:const struct dm_mmc_ops
sdhci_ops	drivers/mmc/sdhci.c	/^static const struct mmc_ops sdhci_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
sdhci_ops	include/sdhci.h	/^struct sdhci_ops {$/;"	s
sdhci_pins	arch/arm/dts/armada-38x.dtsi	/^				sdhci_pins: sdhci-pins {$/;"	l	label:pinctrl
sdhci_probe	drivers/mmc/sdhci.c	/^int sdhci_probe(struct udevice *dev)$/;"	f	typeref:typename:int
sdhci_readb	include/sdhci.h	/^static inline u8 sdhci_readb(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u8
sdhci_readl	include/sdhci.h	/^static inline u32 sdhci_readl(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u32
sdhci_readw	include/sdhci.h	/^static inline u16 sdhci_readw(struct sdhci_host *host, int reg)$/;"	f	typeref:typename:u16
sdhci_reset	drivers/mmc/sdhci.c	/^static void sdhci_reset(struct sdhci_host *host, u8 mask)$/;"	f	typeref:typename:void	file:
sdhci_send_command	drivers/mmc/sdhci.c	/^static int sdhci_send_command(struct udevice *dev, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
sdhci_set_clock	drivers/mmc/sdhci.c	/^static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)$/;"	f	typeref:typename:int	file:
sdhci_set_ios	drivers/mmc/sdhci.c	/^static int sdhci_set_ios(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sdhci_set_power	drivers/mmc/sdhci.c	/^static void sdhci_set_power(struct sdhci_host *host, unsigned short power)$/;"	f	typeref:typename:void	file:
sdhci_setup_cfg	drivers/mmc/sdhci.c	/^int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,$/;"	f	typeref:typename:int
sdhci_transfer_data	drivers/mmc/sdhci.c	/^static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,$/;"	f	typeref:typename:int	file:
sdhci_transfer_pio	drivers/mmc/sdhci.c	/^static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)$/;"	f	typeref:typename:void	file:
sdhci_writeb	include/sdhci.h	/^static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)$/;"	f	typeref:typename:void
sdhci_writel	include/sdhci.h	/^static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)$/;"	f	typeref:typename:void
sdhci_writew	include/sdhci.h	/^static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)$/;"	f	typeref:typename:void
sdhciovselcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 sdhciovselcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sdhciovselcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 sdhciovselcr;\/* 0x408 SDHC IO VSEL Control register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sdhciovserlcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 sdhciovserlcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
sdhcpcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	sdhcpcr;$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdhcpcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sdhcpcr;	\/* eSDHC polarity configuration *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdhy1	include/linux/immap_qe.h	/^	u32 sdhy1;		\/* SDMA system bus hysteresis register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdhy2	include/linux/immap_qe.h	/^	u32 sdhy2;		\/* SDMA secondary bus hysteresis register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdi1	drivers/pinctrl/pinctrl_pic32.c	/^	u32 sdi1;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
sdi2	drivers/pinctrl/pinctrl_pic32.c	/^	u32 sdi2;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
sdi3	drivers/pinctrl/pinctrl_pic32.c	/^	u32 sdi3;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
sdi4	drivers/pinctrl/pinctrl_pic32.c	/^	u32 sdi4;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
sdi5	drivers/pinctrl/pinctrl_pic32.c	/^	u32 sdi5;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
sdi6	drivers/pinctrl/pinctrl_pic32.c	/^	u32 sdi6;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
sdi_control	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 sdi_control;			\/* 0x44 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
sdi_pin	drivers/video/ssd2828.h	/^	int sdi_pin;$/;"	m	struct:ssd2828_config	typeref:typename:int
sdi_registers	drivers/mmc/arm_pl180_mmci.h	/^struct sdi_registers {$/;"	s
sdibsize	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdibsize;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdicarg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdicarg;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdiccon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdiccon;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdicon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdicon;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdicsta	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdicsta;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdidat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdidat;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdidcnt	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdidcnt;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdidcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdidcon;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdidsta	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdidsta;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdidtimer	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdidtimer;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdifsta	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdifsta;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdiimsk	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdiimsk;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdinit	arch/arm/mach-at91/arm920t/lowlevel_init.S	/^sdinit:$/;"	l
sdio0	arch/arm/dts/rk3288.dtsi	/^	sdio0: dwmmc@ff0d0000 {$/;"	l
sdio0	arch/arm/dts/rk3399.dtsi	/^	sdio0: dwmmc@fe310000 {$/;"	l
sdio0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_aper_clk, sdio1_aper_clk, spi0_aper_clk, spi1_aper_clk,$/;"	e	enum:zynq_clk
sdio0_bkpwr	arch/arm/dts/rk3288.dtsi	/^			sdio0_bkpwr: sdio0-bkpwr {$/;"	l
sdio0_bus1	arch/arm/dts/rk3288.dtsi	/^			sdio0_bus1: sdio0-bus1 {$/;"	l
sdio0_bus4	arch/arm/dts/rk3288-veyron.dtsi	/^		sdio0_bus4: sdio0-bus4 {$/;"	l
sdio0_bus4	arch/arm/dts/rk3288.dtsi	/^			sdio0_bus4: sdio0-bus4 {$/;"	l
sdio0_cd	arch/arm/dts/rk3288.dtsi	/^			sdio0_cd: sdio0-cd {$/;"	l
sdio0_clk	arch/arm/dts/rk3288-veyron.dtsi	/^		sdio0_clk: sdio0-clk {$/;"	l
sdio0_clk	arch/arm/dts/rk3288.dtsi	/^			sdio0_clk: sdio0-clk {$/;"	l
sdio0_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
sdio0_cmd	arch/arm/dts/rk3288-veyron.dtsi	/^		sdio0_cmd: sdio0-cmd {$/;"	l
sdio0_cmd	arch/arm/dts/rk3288.dtsi	/^			sdio0_cmd: sdio0-cmd {$/;"	l
sdio0_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 sdio0_con[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
sdio0_int	arch/arm/dts/rk3288.dtsi	/^			sdio0_int: sdio0-int {$/;"	l
sdio0_pwr	arch/arm/dts/rk3288.dtsi	/^			sdio0_pwr: sdio0-pwr {$/;"	l
sdio0_wp	arch/arm/dts/rk3288.dtsi	/^			sdio0_wp: sdio0-wp {$/;"	l
sdio1	arch/arm/dts/rk3288.dtsi	/^	sdio1: dwmmc@ff0e0000 {$/;"	l
sdio1_ahb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock sdio1_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio1_ahb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock sdio1_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio1_ahb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data sdio1_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio1_ahb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data sdio1_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_aper_clk, sdio1_aper_clk, spi0_aper_clk, spi1_aper_clk,$/;"	e	enum:zynq_clk
sdio1_bkpwr	arch/arm/dts/rk3288.dtsi	/^			sdio1_bkpwr: sdio1-bkpwr {$/;"	l
sdio1_bus1	arch/arm/dts/rk3288.dtsi	/^			sdio1_bus1: sdio1-bus1 {$/;"	l
sdio1_bus4	arch/arm/dts/rk3288.dtsi	/^			sdio1_bus4: sdio1-bus4 {$/;"	l
sdio1_cd	arch/arm/dts/rk3288.dtsi	/^			sdio1_cd: sdio1-cd {$/;"	l
sdio1_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio1_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio1_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio1_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio1_clk	arch/arm/dts/rk3288.dtsi	/^			sdio1_clk: sdio1-clk {$/;"	l
sdio1_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
sdio1_cmd	arch/arm/dts/rk3288.dtsi	/^			sdio1_cmd: sdio1-cmd {$/;"	l
sdio1_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 sdio1_con[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
sdio1_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio1_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio1_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio1_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio1_int	arch/arm/dts/rk3288.dtsi	/^			sdio1_int: sdio1-int {$/;"	l
sdio1_pwr	arch/arm/dts/rk3288.dtsi	/^			sdio1_pwr: sdio1-pwr {$/;"	l
sdio1_sleep_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio1_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio1_sleep_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio1_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio1_sleep_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio1_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio1_sleep_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio1_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio1_wp	arch/arm/dts/rk3288.dtsi	/^			sdio1_wp: sdio1-wp {$/;"	l
sdio1cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	sdio1cfg;	\/* 0xEC: APB_MISC_GP_SDIO1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio1cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	sdio1cfg;	\/* 0xEC: APB_MISC_GP_SDIO1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio1cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	sdio1cfg;	\/* 0xEC: APB_MISC_GP_SDIO1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio1cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	sdio1cfg;	\/* 0xEC: APB_MISC_GP_SDIO1CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio2_ahb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock sdio2_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio2_ahb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock sdio2_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio2_ahb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data sdio2_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio2_ahb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data sdio2_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio2_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio2_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio2_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio2_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio2_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio2_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio2_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio2_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio2_sleep_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio2_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio2_sleep_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio2_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio2_sleep_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio2_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio2_sleep_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio2_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio2cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	sdio2cfg;	\/* 0xAC: APB_MISC_GP_SDIO2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio3_ahb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock sdio3_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio3_ahb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock sdio3_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio3_ahb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data sdio3_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio3_ahb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data sdio3_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio3_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio3_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio3_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio3_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio3_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio3_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio3_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio3_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio3_sleep_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio3_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio3_sleep_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio3_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio3_sleep_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio3_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio3_sleep_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio3_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio3cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	sdio3cfg;	\/* 0xB0: APB_MISC_GP_SDIO3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio3cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	sdio3cfg;	\/* 0xB0: APB_MISC_GP_SDIO3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio3cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	sdio3cfg;	\/* 0xB0: APB_MISC_GP_SDIO3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio3cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	sdio3cfg;	\/* 0xB0: APB_MISC_GP_SDIO3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio4_ahb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock sdio4_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio4_ahb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock sdio4_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
sdio4_ahb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data sdio4_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio4_ahb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data sdio4_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
sdio4_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio4_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio4_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio4_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio4_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio4_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio4_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio4_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio4_sleep_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clock sdio4_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio4_sleep_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clock sdio4_sleep_clk = {$/;"	v	typeref:struct:peri_clock	file:
sdio4_sleep_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct peri_clk_data sdio4_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio4_sleep_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct peri_clk_data sdio4_sleep_data = {$/;"	v	typeref:struct:peri_clk_data	file:
sdio4cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	sdio4cfg;	\/* 0x1A8: APB_MISC_GP_SDIO4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio4cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	sdio4cfg;	\/* 0x1A8: APB_MISC_GP_SDIO4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio4cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	sdio4cfg;	\/* 0x1A8: APB_MISC_GP_SDIO4CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdio_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 sdio_clk_ctrl; \/* 0x150 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
sdio_ctrl1	include/faraday/ftsdc010.h	/^	unsigned int	sdio_ctrl1;	\/* 0x6c - SDIO control reg 1	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
sdio_ctrl2	include/faraday/ftsdc010.h	/^	unsigned int	sdio_ctrl2;	\/* 0x70 - SDIO control reg 2	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
sdio_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 sdio_freq;		\/* offset 0x38 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
sdio_pins	arch/arm/dts/armada-375.dtsi	/^				sdio_pins: sdio-pins {$/;"	l
sdio_pins	arch/arm/dts/armada-xp.dtsi	/^	sdio_pins: sdio-pins {$/;"	l
sdio_st_pins	arch/arm/dts/armada-375-db.dts	/^				sdio_st_pins: sdio-st-pins {$/;"	l
sdio_status	include/faraday/ftsdc010.h	/^	unsigned int	sdio_status;	\/* 0x74 - SDIO status regi	*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
sdio_wifi	arch/arm/dts/sun8i-q8-common.dtsi	/^	sdio_wifi: sdio_wifi@1 {$/;"	l
sdioclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sdioclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
sdioctl	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg sdioctl;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
sdioien	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg sdioien;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
sdioist	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg sdioist;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
sdiost0	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	dv_reg sdiost0;$/;"	m	struct:davinci_mmc_regs	typeref:typename:dv_reg
sdipre	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdipre;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdirsp0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdirsp0;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdirsp1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdirsp1;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdirsp2	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdirsp2;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdirsp3	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	sdirsp3;$/;"	m	struct:s3c24x0_sdi	typeref:typename:u32
sdiv_check_divisor	arch/sh/lib/udivsi3_i4i-Os.S	/^sdiv_check_divisor:$/;"	l
sdiv_large_divisor	arch/sh/lib/udivsi3_i4i-Os.S	/^sdiv_large_divisor:$/;"	l
sdiv_small_divisor	arch/sh/lib/udivsi3_i4i-Os.S	/^sdiv_small_divisor:$/;"	l
sdl	arch/sandbox/cpu/sdl.c	/^} sdl;$/;"	v	typeref:struct:sdl_info
sdl_info	arch/sandbox/cpu/sdl.c	/^static struct sdl_info {$/;"	s	file:
sdl_to_keycode	arch/sandbox/cpu/sdl.c	/^static int16_t sdl_to_keycode[NUM_SDL_CODES] = {$/;"	v	typeref:typename:int16_t[]	file:
sdma	arch/arm/dts/dra7.dtsi	/^		sdma: dma-controller@4a056000 {$/;"	l
sdma	arch/arm/dts/imx6qdl.dtsi	/^			sdma: sdma@020ec000 {$/;"	l
sdma	arch/arm/dts/imx6ull.dtsi	/^			sdma: sdma@020ec000 {$/;"	l
sdma	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^static struct mpc5xxx_sdma *sdma;$/;"	v	typeref:struct:mpc5xxx_sdma *	file:
sdma	include/linux/immap_qe.h	/^	sdma_t sdma;		\/* SDMA *\/$/;"	m	struct:qe_immap	typeref:typename:sdma_t
sdma	include/linux/immap_qe.h	/^typedef struct sdma {$/;"	s
sdma8260_t	arch/powerpc/include/asm/immap_8260.h	/^} sdma8260_t;$/;"	t	typeref:struct:sdma_csr
sdma8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} sdma8xx_t;$/;"	t	typeref:struct:sdma_csr
sdma_cmd	drivers/net/armada100_fec.h	/^	u32 sdma_cmd;			\/* SDMA command *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
sdma_conf	drivers/net/armada100_fec.h	/^	u32 sdma_conf;			\/* SDMA configuration *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
sdma_csr	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct sdma_csr {$/;"	s
sdma_csr	arch/powerpc/include/asm/immap_8260.h	/^typedef struct sdma_csr {$/;"	s
sdma_ctrl	drivers/net/xilinx_ll_temac_sdma.h	/^struct sdma_ctrl {$/;"	s
sdma_event	drivers/video/ipu_regs.h	/^	u32 sdma_event[10];$/;"	m	struct:ipu_cm	typeref:typename:u32[10]
sdma_idmr1	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	sdma_idmr1;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idmr1	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idmr1;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idmr2	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	sdma_idmr2;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idmr2	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idmr2;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idmr3	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idmr3;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idmr4	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idmr4;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idsr1	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	sdma_idsr1;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idsr1	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idsr1;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idsr2	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	sdma_idsr2;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idsr2	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idsr2;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idsr3	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idsr3;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_idsr4	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_idsr4;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_reg_addr	drivers/net/xilinx_ll_temac.h	/^	phys_addr_t		sdma_reg_addr[SDMA_CTRL_REGNUMS];$/;"	m	struct:ll_temac	typeref:typename:phys_addr_t[]
sdma_sdar	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sdma_sdar;$/;"	m	struct:sdma_csr	typeref:typename:uint
sdma_sdmr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	sdma_sdmr;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_sdmr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_sdmr;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_sdsr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	sdma_sdsr;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_sdsr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	sdma_sdsr;$/;"	m	struct:sdma_csr	typeref:typename:u_char
sdma_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) sdma_t;$/;"	t	typeref:struct:sdma
sdmam	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int sdmam;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
sdmcar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdmcar;		\/* Secondary DDR memory controller attributes *\/$/;"	m	struct:qesba83xx	typeref:typename:u32
sdmcear	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdmcear;		\/* Secondary DDR memory controller end address *\/$/;"	m	struct:qesba83xx	typeref:typename:u32
sdmcsar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdmcsar;		\/* Secondary DDR memory controller start address *\/$/;"	m	struct:qesba83xx	typeref:typename:u32
sdmemcmppadctl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	sdmemcmppadctl;	\/* _SDMEMCOMPPADCTRL_0,      1E0h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
sdmemcomppadctrl	drivers/net/dwc_eth_qos.c	/^	uint32_t sdmemcomppadctrl;			\/* 0x8800 *\/$/;"	m	struct:eqos_tegra186_regs	typeref:typename:uint32_t	file:
sdmmc	arch/arm/dts/rk3288.dtsi	/^	sdmmc: dwmmc@ff0c0000 {$/;"	l
sdmmc	arch/arm/dts/rk3399.dtsi	/^	sdmmc: dwmmc@fe320000 {$/;"	l
sdmmc0	arch/arm/dts/at91-sama5d2_xplained.dts	/^		sdmmc0: sdio-host@a0000000 {$/;"	l
sdmmc0	arch/arm/dts/sama5d2.dtsi	/^		sdmmc0: sdio-host@a0000000 {$/;"	l
sdmmc0_gclk	arch/arm/dts/sama5d2.dtsi	/^					sdmmc0_gclk: sdmmc0_gclk@31 {$/;"	l
sdmmc0_hclk	arch/arm/dts/sama5d2.dtsi	/^					sdmmc0_hclk: sdmmc0_hclk@31 {$/;"	l
sdmmc1	arch/arm/dts/at91-sama5d2_xplained.dts	/^		sdmmc1: sdio-host@b0000000 {$/;"	l
sdmmc1	arch/arm/dts/sama5d2.dtsi	/^		sdmmc1: sdio-host@b0000000 {$/;"	l
sdmmc1_gclk	arch/arm/dts/sama5d2.dtsi	/^					sdmmc1_gclk: sdmmc1_gclk@32 {$/;"	l
sdmmc1_hclk	arch/arm/dts/sama5d2.dtsi	/^					sdmmc1_hclk: sdmmc1_hclk@32 {$/;"	l
sdmmc1liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sdmmc1liodnr;	\/* SD\/MMC 1 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdmmc2_cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	sdmmc2_cfg;	\/* 0xA0: APB_MISC_GP_SDMMC2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdmmc2liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sdmmc2liodnr;	\/* SD\/MMC 2 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdmmc3_cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	sdmmc3_cfg;	\/* 0xA4: APB_MISC_GP_SDMMC3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
sdmmc3liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sdmmc3liodnr;	\/* SD\/MMC 3 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdmmc4liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sdmmc4liodnr;	\/* SD\/MMC 4 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
sdmmc_bus1	arch/arm/dts/rk3288.dtsi	/^			sdmmc_bus1: sdmmc-bus1 {$/;"	l
sdmmc_bus1	arch/arm/dts/rk3399.dtsi	/^			sdmmc_bus1: sdmmc-bus1 {$/;"	l
sdmmc_bus4	arch/arm/dts/rk3288-fennec.dtsi	/^		sdmmc_bus4: sdmmc-bus4 {$/;"	l
sdmmc_bus4	arch/arm/dts/rk3288-miniarm.dtsi	/^		sdmmc_bus4: sdmmc-bus4 {$/;"	l
sdmmc_bus4	arch/arm/dts/rk3288-veyron.dtsi	/^		sdmmc_bus4: sdmmc-bus4 {$/;"	l
sdmmc_bus4	arch/arm/dts/rk3288.dtsi	/^			sdmmc_bus4: sdmmc-bus4 {$/;"	l
sdmmc_bus4	arch/arm/dts/rk3399.dtsi	/^			sdmmc_bus4: sdmmc-bus4 {$/;"	l
sdmmc_cd	arch/arm/dts/rk3288.dtsi	/^			sdmmc_cd: sdmcc-cd {$/;"	l
sdmmc_cd	arch/arm/dts/rk3399.dtsi	/^			sdmmc_cd: sdmcc-cd {$/;"	l
sdmmc_cd_disabled	arch/arm/dts/rk3288-veyron.dtsi	/^		sdmmc_cd_disabled: sdmmc-cd-disabled {$/;"	l
sdmmc_cd_gpio	arch/arm/dts/rk3288-veyron.dtsi	/^		sdmmc_cd_gpio: sdmmc-cd-gpio {$/;"	l
sdmmc_clk	arch/arm/dts/rk3288-fennec.dtsi	/^		sdmmc_clk: sdmmc-clk {$/;"	l
sdmmc_clk	arch/arm/dts/rk3288-miniarm.dtsi	/^		sdmmc_clk: sdmmc-clk {$/;"	l
sdmmc_clk	arch/arm/dts/rk3288-veyron.dtsi	/^		sdmmc_clk: sdmmc-clk {$/;"	l
sdmmc_clk	arch/arm/dts/rk3288.dtsi	/^			sdmmc_clk: sdmmc-clk {$/;"	l
sdmmc_clk	arch/arm/dts/rk3399.dtsi	/^			sdmmc_clk: sdmmc-clk {$/;"	l
sdmmc_clk	arch/arm/dts/socfpga.dtsi	/^					sdmmc_clk: sdmmc_clk {$/;"	l
sdmmc_cmd	arch/arm/dts/rk3288-fennec.dtsi	/^		sdmmc_cmd: sdmmc-cmd {$/;"	l
sdmmc_cmd	arch/arm/dts/rk3288-miniarm.dtsi	/^		sdmmc_cmd: sdmmc-cmd {$/;"	l
sdmmc_cmd	arch/arm/dts/rk3288-veyron.dtsi	/^		sdmmc_cmd: sdmmc-cmd {$/;"	l
sdmmc_cmd	arch/arm/dts/rk3288.dtsi	/^			sdmmc_cmd: sdmmc-cmd {$/;"	l
sdmmc_cmd	arch/arm/dts/rk3399.dtsi	/^			sdmmc_cmd: sdmmc-cmd {$/;"	l
sdmmc_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 sdmmc_con[2];$/;"	m	struct:rk3399_cru	typeref:typename:u32[2]
sdmmc_det_cnt	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int sdmmc_det_cnt;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
sdmmc_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	sdmmc_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
sdmmc_fn_mod_ahb	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	sdmmc_fn_mod_ahb;$/;"	m	struct:nic301_registers	typeref:typename:u32
sdmmc_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sdmmc_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
sdmmc_pwr	arch/arm/dts/rk3288-evb.dtsi	/^		sdmmc_pwr: sdmmc-pwr {$/;"	l
sdmmc_pwr	arch/arm/dts/rk3288-fennec.dtsi	/^		sdmmc_pwr: sdmmc-pwr {$/;"	l
sdmmc_pwr	arch/arm/dts/rk3288-firefly.dtsi	/^		sdmmc_pwr: sdmmc-pwr {$/;"	l
sdmmc_pwr	arch/arm/dts/rk3288-miniarm.dtsi	/^		sdmmc_pwr: sdmmc-pwr {$/;"	l
sdmmc_pwr	arch/arm/dts/rk3288-popmetal.dtsi	/^		sdmmc_pwr: sdmmc-pwr {$/;"	l
sdmmc_pwr	arch/arm/dts/rk3288-rock2-square.dts	/^		sdmmc_pwr: sdmmc-pwr {$/;"	l
sdmmc_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	sdmmc_read_qos;			\/* 0x44100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
sdmmc_wp	arch/arm/dts/rk3399.dtsi	/^			sdmmc_wp: sdmmc-wp {$/;"	l
sdmmc_wp_gpio	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		sdmmc_wp_gpio: sdmmc-wp-gpio {$/;"	l
sdmmc_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	sdmmc_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
sdmmcgrp_ctrl	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	sdmmcgrp_ctrl;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
sdmmcgrp_l3master	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	sdmmcgrp_l3master;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
sdmmcusefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	sdmmcusefpga;			\/* 0x708 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
sdmr	arch/m68k/include/asm/immap_5227x.h	/^	u32 sdmr;		\/* Mode\/Extended Mode *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdmr	arch/m68k/include/asm/immap_5275.h	/^	u32 sdmr;$/;"	m	struct:sdram_ctrl	typeref:typename:u32
sdmr	arch/m68k/include/asm/immap_5445x.h	/^	u32 sdmr;		\/* SDRAM Mode\/Extended Mode Register *\/$/;"	m	struct:sdramc	typeref:typename:u32
sdmr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	sdmr;$/;"	m	struct:ccsr_cpm_sdma	typeref:typename:u8
sdmr	include/linux/immap_qe.h	/^	u32 sdmr;		\/* Serial DMA mode register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdmracr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdmracr0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdmrtmpcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdmrtmpcr;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdmrtmpmsk	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdmrtmpmsk;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdn	arch/m68k/include/asm/immap_5301x.h	/^	u8 sdn;			\/* 0x24 Shutdown *\/$/;"	m	struct:pwm_ctrl	typeref:typename:u8
sdo_pin	drivers/video/ssd2828.h	/^	int sdo_pin;$/;"	m	struct:ssd2828_config	typeref:typename:int
sdpcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdpcr;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdpdcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdpdcr0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdptcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdptcr0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdptcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdptcr1;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdptcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdptcr2;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdptcr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdptcr3; \/* 0x10C *\/$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdq	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	uint32_t sdq;$/;"	m	struct:qbman_swp	typeref:typename:uint32_t
sdr	arch/arm/dts/socfpga.dtsi	/^		sdr: sdr@ffc25000 {$/;"	l
sdr1	drivers/video/mx3fb.c	/^	u32	sdr1:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
sdr_backup_phase	drivers/ddr/altera/sequencer.c	/^static void sdr_backup_phase(const u32 grp, u32 *work_bgn, u32 *p)$/;"	f	typeref:typename:void	file:
sdr_base	arch/powerpc/include/asm/4xx_pcie.h	/^static inline u32 sdr_base(int port)$/;"	f	typeref:typename:u32
sdr_ctrl	drivers/ddr/altera/sdram.c	/^static struct socfpga_sdr_ctrl *sdr_ctrl =$/;"	v	typeref:struct:socfpga_sdr_ctrl *	file:
sdr_ctrl	drivers/ddr/altera/sequencer.c	/^static struct socfpga_sdr_ctrl *sdr_ctrl =$/;"	v	typeref:struct:socfpga_sdr_ctrl *	file:
sdr_find_phase	drivers/ddr/altera/sequencer.c	/^static int sdr_find_phase(int working, const u32 grp, u32 *work,$/;"	f	typeref:typename:int	file:
sdr_find_phase_delay	drivers/ddr/altera/sequencer.c	/^static int sdr_find_phase_delay(int working, int delay, const u32 grp,$/;"	f	typeref:typename:int	file:
sdr_find_window_center	drivers/ddr/altera/sequencer.c	/^static int sdr_find_window_center(const u32 grp, const u32 work_bgn,$/;"	f	typeref:typename:int	file:
sdr_get_addr_rw	drivers/ddr/altera/sdram.c	/^static u32 sdr_get_addr_rw(const struct socfpga_sdram_config *cfg)$/;"	f	typeref:typename:u32	file:
sdr_get_ctrlcfg	drivers/ddr/altera/sdram.c	/^static u32 sdr_get_ctrlcfg(const struct socfpga_sdram_config *cfg)$/;"	f	typeref:typename:u32	file:
sdr_load_regs	drivers/ddr/altera/sdram.c	/^static void sdr_load_regs(const struct socfpga_sdram_config *cfg)$/;"	f	typeref:typename:void	file:
sdr_nonworking_phase	drivers/ddr/altera/sequencer.c	/^static int sdr_nonworking_phase(const u32 grp, u32 *work_end, u32 *p, u32 *i)$/;"	f	typeref:typename:int	file:
sdr_pll	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	struct socfpga_clock_manager_sdr_pll sdr_pll;$/;"	m	struct:socfpga_clock_manager	typeref:struct:socfpga_clock_manager_sdr_pll
sdr_pstrp0	board/amcc/yucca/yucca.h	/^#define sdr_pstrp0	/;"	d
sdr_reg_file	drivers/ddr/altera/sequencer.c	/^static struct socfpga_sdr_reg_file *sdr_reg_file =$/;"	v	typeref:struct:socfpga_sdr_reg_file *	file:
sdr_rw_load_jump_mgr_regs	drivers/ddr/altera/sequencer.c	/^static struct socfpga_sdr_rw_load_jump_manager *sdr_rw_load_jump_mgr_regs =$/;"	v	typeref:struct:socfpga_sdr_rw_load_jump_manager *	file:
sdr_rw_load_mgr_regs	drivers/ddr/altera/sequencer.c	/^static struct socfpga_sdr_rw_load_manager *sdr_rw_load_mgr_regs =$/;"	v	typeref:struct:socfpga_sdr_rw_load_manager *	file:
sdr_scc_mgr	drivers/ddr/altera/sequencer.c	/^static struct socfpga_sdr_scc_mgr *sdr_scc_mgr =$/;"	v	typeref:struct:socfpga_sdr_scc_mgr *	file:
sdr_timing	drivers/mmc/exynos_dw_mmc.c	/^	u32 sdr_timing;$/;"	m	struct:dwmci_exynos_priv_data	typeref:typename:u32	file:
sdr_working_phase	drivers/ddr/altera/sequencer.c	/^static int sdr_working_phase(const u32 grp, u32 *work_bgn, u32 *d,$/;"	f	typeref:typename:int	file:
sdram	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct sdram {$/;"	s
sdram0	include/mpc5xxx.h	/^	volatile u32	sdram0;		\/* 0x0034 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
sdram1	include/mpc5xxx.h	/^	volatile u32	sdram1;		\/* 0x0038 *\/$/;"	m	struct:mpc5xxx_mmap_ctl	typeref:typename:volatile u32
sdram_HZ_to_ns	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^#define sdram_HZ_to_ns(/;"	d	file:
sdram_addr_dec	arch/arm/mach-mvebu/dram.c	/^struct sdram_addr_dec {$/;"	s	file:
sdram_adjust_866	arch/powerpc/cpu/mpc8xx/speed.c	/^int sdram_adjust_866 (void)$/;"	f	typeref:typename:int
sdram_all_config	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void sdram_all_config(struct rk3036_sdram_priv *priv)$/;"	f	typeref:typename:void	file:
sdram_b0_cr	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^sdram_b0_cr:$/;"	l
sdram_bank	arch/arm/mach-mvebu/dram.c	/^	struct sdram_bank sdram_bank[4];$/;"	m	struct:sdram_addr_dec	typeref:struct:sdram_bank[4]	file:
sdram_bank	arch/arm/mach-mvebu/dram.c	/^struct sdram_bank {$/;"	s	file:
sdram_calculate_size	drivers/ddr/altera/sdram.c	/^unsigned long sdram_calculate_size(void)$/;"	f	typeref:typename:unsigned long
sdram_calibration_full	drivers/ddr/altera/sequencer.c	/^int sdram_calibration_full(void)$/;"	f	typeref:typename:int
sdram_capacity	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 sdram_capacity;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
sdram_cfg	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_cfg;		\/* SDRAM Control Configuration *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_cfg	include/fsl_immap.h	/^	u32	sdram_cfg;		\/* SDRAM Control Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_cfg2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_cfg2;		\/* SDRAM Control Configuration 2 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_cfg_2	include/fsl_immap.h	/^	u32	sdram_cfg_2;		\/* SDRAM Control Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_cfg_3	include/fsl_immap.h	/^	u32	sdram_cfg_3;$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_clk_cntl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_clk_cntl;	\/* SDRAM Clock Control *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_clk_cntl	include/fsl_immap.h	/^	u32	sdram_clk_cntl;		\/* SDRAM Clock Control *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_col_row_detect	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int sdram_col_row_detect(struct dram_info *dram, int channel,$/;"	f	typeref:typename:int	file:
sdram_conf	board/esd/pmc440/sdram.c	/^struct sdram_conf_s sdram_conf[] = {$/;"	v	typeref:struct:sdram_conf_s[]
sdram_conf	board/keymile/km82xx/km82xx.c	/^static struct sdram_conf_s sdram_conf[] = CONFIG_SYS_SDRAM_LIST;$/;"	v	typeref:struct:sdram_conf_s[]	file:
sdram_conf_s	arch/powerpc/cpu/ppc4xx/sdram.h	/^struct sdram_conf_s {$/;"	s
sdram_conf_s	arch/powerpc/include/asm/immap_512x.h	/^typedef struct sdram_conf_s {$/;"	s
sdram_conf_s	board/esd/pmc440/sdram.c	/^struct sdram_conf_s {$/;"	s	file:
sdram_conf_s	board/keymile/km82xx/km82xx.c	/^struct sdram_conf_s {$/;"	s	file:
sdram_conf_t	arch/powerpc/cpu/ppc4xx/sdram.h	/^typedef struct sdram_conf_s sdram_conf_t;$/;"	t	typeref:struct:sdram_conf_s
sdram_conf_t	arch/powerpc/include/asm/immap_512x.h	/^} sdram_conf_t;$/;"	t	typeref:struct:sdram_conf_s
sdram_config	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_config;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_config	arch/arm/include/asm/emif.h	/^	u32 sdram_config;$/;"	m	struct:emif_regs	typeref:typename:u32
sdram_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^static const struct socfpga_sdram_config sdram_config = {$/;"	v	typeref:typename:const struct socfpga_sdram_config	file:
sdram_config	arch/avr32/include/asm/sdram.h	/^struct sdram_config {$/;"	s
sdram_config	board/atmel/atngw100/atngw100.c	/^static const struct sdram_config sdram_config = {$/;"	v	typeref:typename:const struct sdram_config	file:
sdram_config	board/atmel/atngw100mkii/atngw100mkii.c	/^static const struct sdram_config sdram_config = {$/;"	v	typeref:typename:const struct sdram_config	file:
sdram_config	board/atmel/atstk1000/atstk1000.c	/^static const struct sdram_config sdram_config = {$/;"	v	typeref:typename:const struct sdram_config	file:
sdram_config	board/in-circuit/grasshopper/grasshopper.c	/^static const struct sdram_config sdram_config = {$/;"	v	typeref:typename:const struct sdram_config	file:
sdram_config	board/siemens/draco/board.h	/^	unsigned int sdram_config;		\/* 0x61A44A32 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
sdram_config2	arch/arm/include/asm/emif.h	/^	u32 sdram_config2;$/;"	m	struct:emif_regs	typeref:typename:u32
sdram_config_init	arch/arm/include/asm/emif.h	/^	u32 sdram_config_init;$/;"	m	struct:emif_regs	typeref:typename:u32
sdram_console_tx_byte	arch/x86/cpu/intel_common/mrc.c	/^asmlinkage void sdram_console_tx_byte(unsigned char byte)$/;"	f	typeref:typename:asmlinkage void
sdram_ctrl	arch/m68k/include/asm/immap_520x.h	/^typedef struct sdram_ctrl {$/;"	s
sdram_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct sdram_ctrl {$/;"	s
sdram_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct sdram_ctrl {$/;"	s
sdram_ctrl	arch/m68k/include/asm/immap_5275.h	/^typedef struct sdram_ctrl {$/;"	s
sdram_ctrl	arch/m68k/include/asm/immap_5301x.h	/^typedef struct sdram_ctrl {$/;"	s
sdram_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct sdram_ctrl {$/;"	s
sdram_data	drivers/ddr/marvell/axp/ddr3_sdram.c	/^static u32 sdram_data[LEN_KILLER_PATTERN] __aligned(32) = { 0 };$/;"	v	typeref:typename:u32[LEN_KILLER_PATTERN]__aligned (32)	file:
sdram_data_init	include/fsl_immap.h	/^	u32	sdram_data_init;	\/* SDRAM Data initialization *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_dump_protection_config	drivers/ddr/altera/sdram.c	/^static void sdram_dump_protection_config(void)$/;"	f	typeref:typename:void	file:
sdram_end	drivers/ddr/altera/sdram.c	/^	u32	sdram_end;	\/* SDRAM end address *\/$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
sdram_find	arch/x86/cpu/broadwell/sdram.c	/^static int sdram_find(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sdram_find	arch/x86/cpu/ivybridge/sdram.c	/^static int sdram_find(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sdram_get_niu_config	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int sdram_get_niu_config(struct rk3288_sdram_params *sdram_params)$/;"	f	typeref:typename:int	file:
sdram_get_rule	drivers/ddr/altera/sdram.c	/^static void sdram_get_rule(struct sdram_prot_rule *prule)$/;"	f	typeref:typename:void	file:
sdram_get_stride	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int sdram_get_stride(struct rk3288_sdram_params *sdram_params)$/;"	f	typeref:typename:int	file:
sdram_init	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int sdram_init(struct dram_info *dram,$/;"	f	typeref:typename:int	file:
sdram_init	arch/avr32/cpu/hsdramc.c	/^unsigned long sdram_init(void *sdram_base, const struct sdram_config *config)$/;"	f	typeref:typename:unsigned long
sdram_init	board/BuR/brppt1/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/BuR/brxre1/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/birdland/bav335x/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/bosch/shc/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/compulab/cm_t335/spl.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/compulab/cm_t43/spl.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/freescale/bsc9131rdb/spl_minimal.c	/^static void sdram_init(void)$/;"	f	typeref:typename:void	file:
sdram_init	board/freescale/bsc9132qds/spl_minimal.c	/^static void sdram_init(void)$/;"	f	typeref:typename:void	file:
sdram_init	board/freescale/mpc8349emds/mpc8349emds.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/gumstix/pepper/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/isee/igep0033/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/phytec/pcm051/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/sbc8349/sbc8349.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/siemens/common/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/silica/pengwyn/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/tcl/sl50/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/ti/am335x/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/ti/am43xx/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/ti/ti814x/evm.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/ti/ti816x/evm.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init	board/vscom/baltos/board.c	/^void sdram_init(void)$/;"	f	typeref:typename:void
sdram_init_seq	board/ifm/ac14xx/ac14xx.c	/^u32 sdram_init_seq[] = {$/;"	v	typeref:typename:u32[]
sdram_initialise	arch/x86/cpu/intel_common/mrc.c	/^static int sdram_initialise(struct udevice *dev, struct udevice *me_dev,$/;"	f	typeref:typename:int	file:
sdram_interval	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_interval;	\/* SDRAM Interval Configuration *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_interval	include/fsl_immap.h	/^	u32	sdram_interval;		\/* SDRAM Interval Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_iodft_tlgc	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_iodft_tlgc;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_md_cntl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_md_cntl;	\/* SDRAM Mode Control *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_md_cntl	include/fsl_immap.h	/^	u32	sdram_md_cntl;		\/* SDRAM Mode Control *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_memsize	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^phys_size_t sdram_memsize(void)$/;"	f	typeref:typename:phys_size_t
sdram_mmr_init_full	drivers/ddr/altera/sdram.c	/^int sdram_mmr_init_full(unsigned int sdr_phy_reg)$/;"	f	typeref:typename:int
sdram_mode	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_mode;		\/* SDRAM Mode Configuration *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_mode	include/fsl_immap.h	/^	u32	sdram_mode;		\/* SDRAM Mode Configuration *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sdram_mode2;	\/* SDRAM Mode Configuration 2 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
sdram_mode_10	include/fsl_immap.h	/^	u32	sdram_mode_10;		\/* SDRAM Mode Configuration 10 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_11	include/fsl_immap.h	/^	u32	sdram_mode_11;		\/* SDRAM Mode Configuration 11 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_12	include/fsl_immap.h	/^	u32	sdram_mode_12;		\/* SDRAM Mode Configuration 12 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_13	include/fsl_immap.h	/^	u32	sdram_mode_13;		\/* SDRAM Mode Configuration 13 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_14	include/fsl_immap.h	/^	u32	sdram_mode_14;		\/* SDRAM Mode Configuration 14 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_15	include/fsl_immap.h	/^	u32	sdram_mode_15;		\/* SDRAM Mode Configuration 15 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_16	include/fsl_immap.h	/^	u32	sdram_mode_16;		\/* SDRAM Mode Configuration 16 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_2	include/fsl_immap.h	/^	u32	sdram_mode_2;		\/* SDRAM Mode Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_3	include/fsl_immap.h	/^	u32	sdram_mode_3;		\/* SDRAM Mode Configuration 3 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_4	include/fsl_immap.h	/^	u32	sdram_mode_4;		\/* SDRAM Mode Configuration 4 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_5	include/fsl_immap.h	/^	u32	sdram_mode_5;		\/* SDRAM Mode Configuration 5 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_6	include/fsl_immap.h	/^	u32	sdram_mode_6;		\/* SDRAM Mode Configuration 6 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_7	include/fsl_immap.h	/^	u32	sdram_mode_7;		\/* SDRAM Mode Configuration 7 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_8	include/fsl_immap.h	/^	u32	sdram_mode_8;		\/* SDRAM Mode Configuration 8 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_mode_9	include/fsl_immap.h	/^	u32	sdram_mode_9;		\/* SDRAM Mode Configuration 9 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
sdram_params	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^struct sdram_params {$/;"	s
sdram_pll	arch/arm/dts/socfpga.dtsi	/^					sdram_pll: sdram_pll {$/;"	l
sdram_prot_rule	drivers/ddr/altera/sdram.c	/^struct sdram_prot_rule {$/;"	s	file:
sdram_pwr_mgmt	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_pwr_mgmt;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_pwr_mgmt_shdw	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_pwr_mgmt_shdw;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_rank_bw_detect	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int sdram_rank_bw_detect(struct dram_info *dram, int channel,$/;"	f	typeref:typename:int	file:
sdram_refresh_ctrl	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_refresh_ctrl;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_refresh_ctrl_shdw	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_refresh_ctrl_shdw;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct sdram_regs {$/;"	s
sdram_sdcr	arch/m68k/include/asm/immap_5272.h	/^	ushort sdram_sdcr;$/;"	m	struct:sdram_ctrl	typeref:typename:ushort
sdram_sdtr	arch/m68k/include/asm/immap_5272.h	/^	ushort sdram_sdtr;$/;"	m	struct:sdram_ctrl	typeref:typename:ushort
sdram_set_protection_config	drivers/ddr/altera/sdram.c	/^sdram_set_protection_config(const u32 sdram_start, const u32 sdram_end)$/;"	f	typeref:typename:void	file:
sdram_set_rule	drivers/ddr/altera/sdram.c	/^static void sdram_set_rule(struct sdram_prot_rule *prule)$/;"	f	typeref:typename:void	file:
sdram_setup_table	board/mpl/pip405/pip405.c	/^static const SDRAM_SETUP sdram_setup_table[] = {$/;"	v	typeref:typename:const SDRAM_SETUP[]	file:
sdram_size	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^size_t sdram_size(void)$/;"	f	typeref:typename:size_t
sdram_size	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 sdram_size;       \/* 0x2B: (16 << n) MB *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
sdram_size_mb	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^size_t sdram_size_mb(struct rk3288_pmu *pmu)$/;"	f	typeref:typename:size_t
sdram_speed	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 sdram_speed;      \/* 0x2C: (33.333 * n) MHz *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
sdram_start	board/a3m071/a3m071.c	/^static void sdram_start(int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/a4m072/a4m072.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/canmb/canmb.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/cm5200/cm5200.c	/^static void sdram_start(int hi_addr, mem_conf_t *mem_conf)$/;"	f	typeref:typename:void	file:
sdram_start	board/ifm/o2dnt2/o2dnt2.c	/^static void sdram_start(int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/inka4x0/inka4x0.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/intercontrol/digsy_mtc/digsy_mtc.c	/^static void sdram_start(int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/ipek01/ipek01.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/jupiter/jupiter.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/motionpro/motionpro.c	/^static void sdram_start(int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/munices/munices.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/phytec/pcm030/pcm030.c	/^static void sdram_start(int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/tqc/tqm5200/tqm5200.c	/^static void sdram_start (int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	board/v38b/v38b.c	/^static void sdram_start(int hi_addr)$/;"	f	typeref:typename:void	file:
sdram_start	drivers/ddr/altera/sdram.c	/^	u32	sdram_start;	\/* SDRAM start address *\/$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
sdram_sts	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_sts;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_t	arch/m68k/include/asm/immap_520x.h	/^} sdram_t;$/;"	t	typeref:struct:sdram_ctrl
sdram_t	arch/m68k/include/asm/immap_5235.h	/^} sdram_t;$/;"	t	typeref:struct:sdram_ctrl
sdram_t	arch/m68k/include/asm/immap_5301x.h	/^} sdram_t;$/;"	t	typeref:struct:sdram_ctrl
sdram_t	arch/m68k/include/asm/immap_5329.h	/^} sdram_t;$/;"	t	typeref:struct:sdram_ctrl
sdram_t	arch/m68k/include/asm/immap_547x_8x.h	/^} sdram_t;$/;"	t	typeref:struct:sdram
sdram_t	board/mpl/mip405/mip405.c	/^} sdram_t;$/;"	t	typeref:struct:__anon0274db920208	file:
sdram_t	board/mpl/pati/pati.c	/^} sdram_t;$/;"	t	typeref:struct:__anon377858d00108	file:
sdram_table	board/mpl/mip405/mip405.c	/^const sdram_t sdram_table[] = {$/;"	v	typeref:typename:const sdram_t[]
sdram_table	board/mpl/pati/pati.c	/^const sdram_t sdram_table[] = {$/;"	v	typeref:typename:const sdram_t[]
sdram_table	board/tqc/tqm8xx/tqm8xx.c	/^const uint sdram_table[] =$/;"	v	typeref:typename:const uint[]
sdram_tim1	arch/arm/include/asm/emif.h	/^	u32 sdram_tim1;$/;"	m	struct:emif_regs	typeref:typename:u32
sdram_tim1	board/siemens/draco/board.h	/^	unsigned int sdram_tim1;		\/* 0x0888A39B *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
sdram_tim2	arch/arm/include/asm/emif.h	/^	u32 sdram_tim2;$/;"	m	struct:emif_regs	typeref:typename:u32
sdram_tim2	board/siemens/draco/board.h	/^	unsigned int sdram_tim2;		\/* 0x26247FDA *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
sdram_tim3	arch/arm/include/asm/emif.h	/^	u32 sdram_tim3;$/;"	m	struct:emif_regs	typeref:typename:u32
sdram_tim3	board/siemens/draco/board.h	/^	unsigned int sdram_tim3;		\/* 0x501F821F *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
sdram_time1	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_time1;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_time1_shdw	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_time1_shdw;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_time2	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_time2;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_time2_shdw	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_time2_shdw;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_time3	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_time3;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_time3_shdw	arch/arm/include/asm/arch-omap3/cpu.h	/^	unsigned int sdram_time3_shdw;$/;"	m	struct:emif4	typeref:typename:unsigned int
sdram_timing	arch/powerpc/include/asm/ppc4xx-sdram.h	/^struct sdram_timing {$/;"	s
sdram_timing_clks	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^struct sdram_timing_clks {$/;"	s	file:
sdram_tr1_set	arch/powerpc/cpu/ppc4xx/sdram.c	/^static void sdram_tr1_set(int ram_address, int* tr1_value)$/;"	f	typeref:typename:void	file:
sdram_tr1_set	board/amcc/yosemite/yosemite.c	/^void sdram_tr1_set(int ram_address, int* tr1_value)$/;"	f	typeref:typename:void
sdram_type	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 sdram_type;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
sdram_vco_base	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t sdram_vco_base;$/;"	m	struct:cm_config	typeref:typename:uint32_t
sdram_width	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 sdram_width;      \/* 0x2D: (8 << n) bit *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
sdram_width	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 sdram_width;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
sdram_write_verify	drivers/ddr/altera/sdram.c	/^static unsigned sdram_write_verify(const u32 *addr, const u32 val)$/;"	f	typeref:typename:unsigned	file:
sdramc	arch/arm/mach-at91/include/mach/at91_mc.h	/^	at91_sdramc_t	sdramc;		\/* 0x90 - 0xBC SDRAMC User Interface *\/$/;"	m	struct:at91_mc	typeref:typename:at91_sdramc_t
sdramc	arch/m68k/include/asm/immap_5227x.h	/^typedef struct sdramc {$/;"	s
sdramc	arch/m68k/include/asm/immap_5441x.h	/^typedef struct sdramc {$/;"	s
sdramc	arch/m68k/include/asm/immap_5445x.h	/^typedef struct sdramc {$/;"	s
sdramc_configure	board/siemens/taurus/taurus.c	/^void sdramc_configure(unsigned int mask)$/;"	f	typeref:typename:void
sdramc_initialize	arch/arm/mach-at91/sdram.c	/^int sdramc_initialize(unsigned int sdram_address, const struct sdramc_reg *p)$/;"	f	typeref:typename:int
sdramc_reg	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^struct sdramc_reg {$/;"	s
sdramc_t	arch/m68k/include/asm/immap_5227x.h	/^} sdramc_t;$/;"	t	typeref:struct:sdramc
sdramc_t	arch/m68k/include/asm/immap_5441x.h	/^} sdramc_t;$/;"	t	typeref:struct:sdramc
sdramc_t	arch/m68k/include/asm/immap_5445x.h	/^} sdramc_t;$/;"	t	typeref:struct:sdramc
sdramclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 sdramclk_ctrl;	\/* SDRAM Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
sdramctrl	arch/m68k/include/asm/immap_5307.h	/^typedef struct sdramctrl {$/;"	s
sdramctrl_t	arch/m68k/include/asm/immap_5272.h	/^} sdramctrl_t;$/;"	t	typeref:struct:sdram_ctrl
sdramctrl_t	arch/m68k/include/asm/immap_5275.h	/^} sdramctrl_t;$/;"	t	typeref:struct:sdram_ctrl
sdramctrl_t	arch/m68k/include/asm/immap_5307.h	/^} sdramctrl_t;$/;"	t	typeref:struct:sdramctrl
sdramwins_base	include/linux/mbus.h	/^	void __iomem *sdramwins_base;$/;"	m	struct:mvebu_mbus_state	typeref:typename:void __iomem *
sdrc	arch/arm/include/asm/arch-omap3/cpu.h	/^struct sdrc {$/;"	s
sdrc_actim	arch/arm/include/asm/arch-omap3/cpu.h	/^struct sdrc_actim {$/;"	s
sdrc_base	arch/arm/cpu/armv7/omap3/sdrc.c	/^static struct sdrc *sdrc_base = (struct sdrc *)OMAP34XX_SDRC_BASE;$/;"	v	typeref:struct:sdrc *	file:
sdrc_cs	arch/arm/include/asm/arch-omap3/cpu.h	/^struct sdrc_cs {$/;"	s
sdrcr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	sdrcr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
sdrcr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	sdrcr;		\/* 0x0C *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
sdrdata	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	sdrdata;			\/* 0xA0 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
sdresol	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	sdresol;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
sdrfc	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int sdrfc;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
sdrstat	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	sdrstat;	\/* 0x04 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
sdrtr	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdrtr;	\/* Refresh timing register *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdrtr	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdrtr;	\/* Refresh timing register *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdrx	drivers/video/mx3fb.c	/^	u32	sdrx:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
sdry	drivers/video/mx3fb.c	/^	u32	sdry:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
sdsr	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdsr;	\/* Status register *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdsr	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdsr;	\/* Status register *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdsr	arch/powerpc/include/asm/immap_85xx.h	/^	u8	sdsr;$/;"	m	struct:ccsr_cpm_sdma	typeref:typename:u8
sdsr	include/linux/immap_qe.h	/^	u32 sdsr;		\/* Serial DMA status register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdsretr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	sdsretr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
sdta1	include/linux/immap_qe.h	/^	u32 sdta1;		\/* SDMA system bus address register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdta2	include/linux/immap_qe.h	/^	u32 sdta2;		\/* SDMA secondary bus address register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdtim1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int sdtim1;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
sdtim2	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int sdtim2;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
sdtim3	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int sdtim3;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
sdtim4	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int sdtim4;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
sdtimr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	sdtimr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
sdtimr	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	sdtimr;		\/* 0x10 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
sdtimr2	arch/arm/mach-davinci/include/mach/ddr2_defs.h	/^	unsigned int	sdtimr2;	\/* 0x14 *\/$/;"	m	struct:dv_ddr2_regs_ctrl	typeref:typename:unsigned int
sdtm1	include/linux/immap_qe.h	/^	u32 sdtm1;		\/* SDMA system bus MSNUM register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdtm2	include/linux/immap_qe.h	/^	u32 sdtm2;		\/* SDMA secondary bus MSNUM register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdtr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $sdtr  = $mbar - 1 + 0x184$/;"	t
sdtr1	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdtr1;	\/* Timing register 1 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdtr1	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdtr1;	\/* Timing register 1 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdtr1	include/linux/immap_qe.h	/^	u32 sdtr1;		\/* SDMA system bus threshold register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdtr2	arch/arm/include/asm/arch-stm32f4/fmc.h	/^	u32 sdtr2;	\/* Timing register 2 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdtr2	arch/arm/include/asm/arch-stm32f7/fmc.h	/^	u32 sdtr2;	\/* Timing register 2 *\/$/;"	m	struct:stm32_fmc_regs	typeref:typename:u32
sdtr2	include/linux/immap_qe.h	/^	u32 sdtr2;		\/* SDMA secondary bus threshold register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdvenc_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	sdvenc_clkin_ck: sdvenc_clkin_ck {$/;"	l
sdwbcr	include/linux/immap_qe.h	/^	u32 sdwbcr;		\/* SDMA CAM entries base register *\/$/;"	m	struct:sdma	typeref:typename:u32
sdwcr00	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcr00;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcr01	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcr01;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcr10	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcr10;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcr11	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcr11;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcr2;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcrc0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcrc0;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcrc1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcrc1;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdwcrc2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 sdwcrc2;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
sdx_h	drivers/video/mx3fb.c	/^	u32	sdx_h:2;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:2	file:
sdx_l	drivers/video/mx3fb.c	/^	u32	sdx_l:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
sdy	drivers/video/mx3fb.c	/^	u32	sdy:5;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:5	file:
se_cfg	include/vsc9953.h	/^	u32	se_cfg;$/;"	m	struct:vsc9953_qsys_hsch	typeref:typename:u32
se_desc	drivers/power/regulator/pfuze100.c	/^static struct pfuze100_regulator_desc *se_desc(struct pfuze100_regulator_desc *desc,$/;"	f	typeref:struct:pfuze100_regulator_desc *	file:
se_dwrr_cfg	include/vsc9953.h	/^	u32	se_dwrr_cfg[8];$/;"	m	struct:vsc9953_qsys_hsch	typeref:typename:u32[8]
search	scripts/kconfig/qconf.cc	/^void ConfigSearchWindow::search(void)$/;"	f	class:ConfigSearchWindow	typeref:typename:void
searchButton	scripts/kconfig/qconf.h	/^	QPushButton* searchButton;$/;"	m	class:ConfigSearchWindow	typeref:typename:QPushButton *
searchConfig	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::searchConfig(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
searchWindow	scripts/kconfig/qconf.h	/^	ConfigSearchWindow *searchWindow;$/;"	m	class:ConfigMainWindow	typeref:typename:ConfigSearchWindow *
search_bbt	drivers/mtd/nand/nand_bbt.c	/^static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)$/;"	f	typeref:typename:int	file:
search_conf	scripts/kconfig/mconf.c	/^static void search_conf(void)$/;"	f	typeref:typename:void	file:
search_conf	scripts/kconfig/nconf.c	/^static void search_conf(void)$/;"	f	typeref:typename:void	file:
search_contexts	fs/yaffs2/yaffsfs.c	/^static struct list_head search_contexts;$/;"	v	typeref:struct:list_head	file:
search_data	scripts/kconfig/mconf.c	/^struct search_data {$/;"	s	file:
search_device	common/console.c	/^struct stdio_dev *search_device(int flags, const char *name)$/;"	f	typeref:struct:stdio_dev *
search_dir	fs/ext4/ext4_common.c	/^static int search_dir(struct ext2_inode *parent_inode, char *dirname)$/;"	f	typeref:typename:int	file:
search_exception_table	arch/powerpc/lib/extable.c	/^search_exception_table(unsigned long addr)$/;"	f	typeref:typename:unsigned long
search_for_existing_phy	drivers/net/phy/phy.c	/^static struct phy_device *search_for_existing_phy(struct mii_dev *bus,$/;"	f	typeref:struct:phy_device *	file:
search_help	scripts/kconfig/mconf.c	/^search_help[] = N_($/;"	v	typeref:typename:const char[]	file:
search_help	scripts/kconfig/nconf.c	/^search_help[] = N_($/;"	v	typeref:typename:const char[]	file:
search_hint	examples/api/crt0.S	/^search_hint:$/;"	l
search_inode	fs/ubifs/debug.c	/^static struct fsck_inode *search_inode(struct fsck_data *fsckd, ino_t inum)$/;"	f	typeref:struct:fsck_inode *	file:
search_left_edge	drivers/ddr/altera/sequencer.c	/^static void search_left_edge(const int write, const int rank_bgn,$/;"	f	typeref:typename:void	file:
search_modes	arch/arm/imx-common/cmd_bmode.c	/^static const struct boot_mode *search_modes(char *arg)$/;"	f	typeref:typename:const struct boot_mode *	file:
search_one_table	arch/powerpc/lib/extable.c	/^search_one_table(const struct exception_table_entry *first,$/;"	f	typeref:typename:unsigned long	file:
search_read_bbts	drivers/mtd/nand/nand_bbt.c	/^static void search_read_bbts(struct mtd_info *mtd, uint8_t *buf,$/;"	f	typeref:typename:void	file:
search_right_edge	drivers/ddr/altera/sequencer.c	/^static int search_right_edge(const int write, const int rank_bgn,$/;"	f	typeref:typename:int	file:
search_stat	fs/reiserfs/reiserfs.c	/^search_stat (__u32 dir_id, __u32 objectid)$/;"	f	typeref:typename:int	file:
search_stop_check	drivers/ddr/altera/sequencer.c	/^static u32 search_stop_check(const int write, const int d, const int rank_bgn,$/;"	f	typeref:typename:u32	file:
search_window	drivers/ddr/altera/sequencer.c	/^static void search_window(const int search_dm,$/;"	f	typeref:typename:void	file:
searchbox	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color searchbox;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
searchbox_border	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color searchbox_border;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
searchbox_title	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color searchbox_title;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
searched_for	common/env_attr.c	/^	const char *searched_for;$/;"	m	struct:regex_callback_priv	typeref:typename:const char *	file:
sec	arch/powerpc/cpu/mpc8xxx/fsl_pamu.c	/^struct paace *sec;$/;"	v	typeref:struct:paace *
sec	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned long	sec;$/;"	m	struct:arp_entry	typeref:typename:unsigned long
sec	drivers/net/e1000.h	/^	uint64_t sec;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
sec	drivers/rtc/ds1302.c	/^	unsigned char sec:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
sec	drivers/rtc/ftrtc010.c	/^	unsigned int sec;		\/* 0x00 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
sec10	drivers/rtc/ds1302.c	/^	unsigned char sec10:3;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:3	file:
sec_clrbits32	include/fsl_sec.h	/^#define sec_clrbits32 /;"	d
sec_cmd	include/linux/mtd/nand.h	/^	__le16 sec_cmd;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
sec_cnt	disk/part_iso.h	/^	unsigned char sec_cnt[2];		\/* sector count in VIRTUAL Blocks (0x200) *\/$/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char[2]
sec_config_pamu_table	arch/powerpc/cpu/mpc8xxx/pamu_table.c	/^int sec_config_pamu_table(uint32_t liodn_ns, uint32_t liodn_s)$/;"	f	typeref:typename:int
sec_firmware_addr	arch/arm/cpu/armv8/sec_firmware.c	/^phys_addr_t sec_firmware_addr;$/;"	v	typeref:typename:phys_addr_t
sec_firmware_copy_image	arch/arm/cpu/armv8/sec_firmware.c	/^static int sec_firmware_copy_image(const char *title,$/;"	f	typeref:typename:int	file:
sec_firmware_entry	arch/arm/cpu/armv8/sec_firmware.c	/^static int sec_firmware_entry(u32 *eret_hold_l, u32 *eret_hold_h)$/;"	f	typeref:typename:int	file:
sec_firmware_get_data	arch/arm/cpu/armv8/sec_firmware.c	/^static int sec_firmware_get_data(const void *sec_firmware_img,$/;"	f	typeref:typename:int	file:
sec_firmware_init	arch/arm/cpu/armv8/sec_firmware.c	/^int sec_firmware_init(const void *sec_firmware_img,$/;"	f	typeref:typename:int
sec_firmware_is_valid	arch/arm/cpu/armv8/sec_firmware.c	/^__weak bool sec_firmware_is_valid(const void *sec_firmware_img)$/;"	f	typeref:typename:__weak bool
sec_firmware_load_image	arch/arm/cpu/armv8/sec_firmware.c	/^static int sec_firmware_load_image(const void *sec_firmware_img)$/;"	f	typeref:typename:int	file:
sec_firmware_parse_image	arch/arm/cpu/armv8/sec_firmware.c	/^static int sec_firmware_parse_image(const void *sec_firmware_img,$/;"	f	typeref:typename:int	file:
sec_firmware_support_psci_version	arch/arm/cpu/armv8/sec_firmware.c	/^unsigned int sec_firmware_support_psci_version(void)$/;"	f	typeref:typename:unsigned int
sec_halt	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static void sec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
sec_in16	include/fsl_sec.h	/^#define sec_in16(/;"	d
sec_in32	include/fsl_sec.h	/^#define sec_in32(/;"	d
sec_init	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static int sec_init(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
sec_init	drivers/crypto/fsl/jr.c	/^int sec_init(void)$/;"	f	typeref:typename:int
sec_init_idx	drivers/crypto/fsl/jr.c	/^int sec_init_idx(uint8_t sec_idx)$/;"	f	typeref:typename:int
sec_jr0	arch/arm/dts/imx6qdl.dtsi	/^				sec_jr0: jr0@1000 {$/;"	l	label:crypto
sec_jr1	arch/arm/dts/imx6qdl.dtsi	/^				sec_jr1: jr1@2000 {$/;"	l	label:crypto
sec_liodn_tbl	arch/arm/cpu/armv7/ls102xa/soc.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct liodn_id_table sec_liodn_tbl[] = {$/;"	v	typeref:struct:liodn_id_table[]
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5040_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t1024_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t1040_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);$/;"	v	typeref:typename:int
sec_mon_clrbits32	include/fsl_sec_mon.h	/^#define sec_mon_clrbits32 /;"	d
sec_mon_in16	include/fsl_sec_mon.h	/^#define sec_mon_in16(/;"	d
sec_mon_in32	include/fsl_sec_mon.h	/^#define sec_mon_in32(/;"	d
sec_mon_out32	include/fsl_sec_mon.h	/^#define sec_mon_out32(/;"	d
sec_mon_setbits32	include/fsl_sec_mon.h	/^#define sec_mon_setbits32 /;"	d
sec_offset	drivers/crypto/fsl/jr.c	/^uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = {$/;"	v	typeref:typename:uint32_t[]
sec_offset	drivers/crypto/fsl/jr.h	/^	uint32_t sec_offset;$/;"	m	struct:jobring	typeref:typename:uint32_t
sec_out32	include/fsl_sec.h	/^#define sec_out32(/;"	d
sec_reset	drivers/crypto/fsl/jr.c	/^int sec_reset(void)$/;"	f	typeref:typename:int
sec_reset_idx	drivers/crypto/fsl/jr.c	/^static inline int sec_reset_idx(uint8_t sec_idx)$/;"	f	typeref:typename:int	file:
sec_rev	drivers/crypto/fsl/sec.c	/^		u32 sec_rev;$/;"	m	struct:fdt_fixup_crypto_node::sec_rev_prop	typeref:typename:u32	file:
sec_rev_prop	drivers/crypto/fsl/sec.c	/^	static const struct sec_rev_prop {$/;"	s	function:fdt_fixup_crypto_node	file:
sec_rx	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static int sec_rx(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
sec_send	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static int sec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
sec_setbits32	include/fsl_sec.h	/^#define sec_setbits32 /;"	d
sec_voltage_desc	include/power/s5m8767.h	/^struct sec_voltage_desc {$/;"	s
secctl	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	secctl;		\/* 0x108 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
secctl	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	secctl;		\/* 08 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
secmem_set_cmd	drivers/crypto/fsl/jobdesc.c	/^uint32_t secmem_set_cmd(uint32_t sec_mem_cmd)$/;"	f	typeref:typename:uint32_t
secnr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 secnr;		\/* System External Interrupt Control Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
seco_mx6_rgmii_rework	board/seco/common/mx6.c	/^int seco_mx6_rgmii_rework(struct phy_device *phydev)$/;"	f	typeref:typename:int
seco_mx6_setup_enet_iomux	board/seco/common/mx6.c	/^void seco_mx6_setup_enet_iomux(void)$/;"	f	typeref:typename:void
seco_mx6_setup_uart_iomux	board/seco/common/mx6.c	/^void seco_mx6_setup_uart_iomux(void)$/;"	f	typeref:typename:void
seco_mx6_setup_usdhc_iomux	board/seco/common/mx6.c	/^void seco_mx6_setup_usdhc_iomux(int id)$/;"	f	typeref:typename:void
second	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	second;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
second	include/efi.h	/^	u8 second;$/;"	m	struct:efi_time	typeref:typename:u8
second_addr	include/android_image.h	/^	u32 second_addr;	\/* physical load addr *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
second_ivt_offset	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^second_ivt_offset:      .long (ivt2_header + 0x2C + FLASH_OFFSET)$/;"	l
second_ivt_offset	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^second_ivt_offset:      .long (ivt2_header + 0x2C + FLASH_OFFSET)$/;"	l
second_size	include/android_image.h	/^	u32 second_size;	\/* size in bytes *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
second_stage_init	board/gdsys/p1022/controlcenterd-id.c	/^static int second_stage_init(void)$/;"	f	typeref:typename:int	file:
secondary	drivers/video/ipu.h	/^	struct clk *secondary;$/;"	m	struct:clk	typeref:struct:clk *
secondary_boot_code	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^secondary_boot_code:$/;"	l
secondary_boot_tag	tools/mxsboot.c	/^	uint32_t			secondary_boot_tag;$/;"	m	struct:mx28_sd_config_block	typeref:typename:uint32_t	file:
secondary_cores_configure	arch/arm/mach-exynos/lowlevel_init.c	/^static void secondary_cores_configure(void)$/;"	f	typeref:typename:void	file:
secondary_cpu_start	arch/arm/mach-exynos/lowlevel_init.c	/^static void secondary_cpu_start(void)$/;"	f	typeref:typename:void	file:
secondary_int_en0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 secondary_int_en0;	\/*0x44*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
secondary_int_statm0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 secondary_int_statm0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
secondary_int_statr0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 secondary_int_statr0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
seconds	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 seconds;$/;"	m	struct:rtc_regs	typeref:typename:u32
seconds	arch/m68k/include/asm/rtc.h	/^	u32 seconds;		\/* 0x04 Seconds Counter Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
secr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 secr;$/;"	m	struct:src	typeref:typename:u32
secs_track	include/fat.h	/^	__u16	secs_track;	\/* Sectors\/track *\/$/;"	m	struct:boot_sector	typeref:typename:__u16
secsacr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 secsacr;		\/* 0x38 *\/$/;"	m	struct:siu	typeref:typename:u32
secsize_BE	disk/part_iso.h	/^	unsigned short secsize_BE;	\/* sector size BE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned short
secsize_BE	disk/part_iso.h	/^	unsigned short secsize_BE;	\/* sector size BE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned short
secsize_LE	disk/part_iso.h	/^	unsigned short secsize_LE;	\/* sector size LE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned short
secsize_LE	disk/part_iso.h	/^	unsigned short secsize_LE;	\/* sector size LE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned short
secss_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	secss_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
secss_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	secss_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
secss_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	secss_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
secss_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	secss_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
secss_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	secss_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sect	cmd/fdc.c	/^	unsigned int sect;	\/* sectors per track *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned int	file:
sect	tools/mxsimage.c	/^	struct sb_section_ctx		*sect;$/;"	m	struct:sb_section_ctx	typeref:struct:sb_section_ctx *	file:
sect_boot	tools/mxsimage.c	/^	unsigned int			sect_boot;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int	file:
sect_boot_found	tools/mxsimage.c	/^	unsigned int			sect_boot_found:1;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int:1	file:
sect_code	cmd/fdc.c	/^	unsigned char sect_code;\/* Sector Size code *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned char	file:
sect_count	tools/mxsimage.c	/^	unsigned int			sect_count;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int	file:
sect_head	tools/mxsimage.c	/^	struct sb_section_ctx		*sect_head;$/;"	m	struct:sb_image_ctx	typeref:struct:sb_section_ctx *	file:
sect_perblk	include/ext4fs.h	/^	uint32_t sect_perblk;$/;"	m	struct:ext_filesystem	typeref:typename:uint32_t
sect_size	drivers/block/sata_dwc.h	/^	unsigned int		sect_size;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
sect_size	include/fat.h	/^	__u16	sect_size;	\/* Size of sectors in bytes *\/$/;"	m	struct:__anona537cfc90108	typeref:typename:__u16
sect_sz_kb	arch/arm/include/asm/arch-stm32f4/stm32.h	/^static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {$/;"	v	typeref:typename:const u32[]
sect_sz_kb	arch/arm/include/asm/arch-stm32f7/stm32.h	/^static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {$/;"	v	typeref:typename:const u32[]
sect_tail	tools/mxsimage.c	/^	struct sb_section_ctx		*sect_tail;$/;"	m	struct:sb_image_ctx	typeref:struct:sb_section_ctx *	file:
section	test/py/multiplexed_log.py	/^    def section(self, marker, anchor=None):$/;"	m	class:Logfile
section_count	tools/mxsimage.h	/^	uint16_t	section_count;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
section_flags	tools/mxsimage.h	/^		uint32_t	section_flags;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960608	typeref:typename:uint32_t
section_flags	tools/mxsimage.h	/^	uint32_t	section_flags;$/;"	m	struct:sb_sections_header	typeref:typename:uint32_t
section_header_size	tools/mxsimage.h	/^	uint16_t	section_header_size;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint16_t
section_key	tools/omapimage.h	/^	uint32_t section_key;$/;"	m	struct:ch_settings	typeref:typename:uint32_t
section_length	tools/mxsimage.h	/^		uint32_t	section_length;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960608	typeref:typename:uint32_t
section_name	tools/omapimage.h	/^	uint8_t section_name[12];$/;"	m	struct:ch_toc	typeref:typename:uint8_t[12]
section_number	tools/mxsimage.h	/^		uint32_t	section_number;$/;"	m	struct:sb_command::__anonc4848c96040a::__anonc4848c960608	typeref:typename:uint32_t
section_number	tools/mxsimage.h	/^	uint32_t	section_number;$/;"	m	struct:sb_sections_header	typeref:typename:uint32_t
section_offset	tools/mxsimage.h	/^	uint32_t	section_offset;$/;"	m	struct:sb_sections_header	typeref:typename:uint32_t
section_offset	tools/omapimage.h	/^	uint32_t section_offset;$/;"	m	struct:ch_toc	typeref:typename:uint32_t
section_size	tools/mxsimage.h	/^	uint32_t	section_size;$/;"	m	struct:sb_sections_header	typeref:typename:uint32_t
section_size	tools/omapimage.h	/^	uint32_t section_size;$/;"	m	struct:ch_toc	typeref:typename:uint32_t
sections	include/linux/mtd/nand.h	/^	struct onfi_ext_section sections[ONFI_EXT_SECTION_MAX];$/;"	m	struct:onfi_ext_param_page	typeref:struct:onfi_ext_section[]
sector	disk/part_dos.h	/^	unsigned char sector;		\/* starting sector			*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
sector	include/part_efi.h	/^	u8 sector;		\/* starting sector *\/$/;"	m	struct:partition	typeref:typename:u8
sector_bytes	include/ata.h	/^	unsigned short	sector_bytes;	\/* unformatted bytes per sector *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
sector_count	include/fis.h	/^	u8 sector_count;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
sector_count	include/fis.h	/^	u8 sector_count;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
sector_count	include/fis.h	/^	u8 sector_count;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
sector_count	include/flash.h	/^	ushort	sector_count;		\/* number of erase units		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
sector_count	include/linux/mtd/st_smi.h	/^	ushort sector_count;$/;"	m	struct:flash_dev	typeref:typename:ushort
sector_count	tools/mxsboot.c	/^	uint32_t		sector_count;$/;"	m	struct:mx28_sd_drive_info	typeref:typename:uint32_t	file:
sector_count_exp	include/fis.h	/^	u8 sector_count_exp;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
sector_count_exp	include/fis.h	/^	u8 sector_count_exp;$/;"	m	struct:sata_fis_h2d	typeref:typename:u8
sector_count_exp	include/fis.h	/^	u8 sector_count_exp;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
sector_count_high	include/fis.h	/^	u8 sector_count_high;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
sector_count_low	include/fis.h	/^	u8 sector_count_low;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
sector_erased	drivers/mtd/cfi_flash.c	/^static int sector_erased(flash_info_t *info, int i)$/;"	f	typeref:typename:int	file:
sector_per_block	disk/part_amiga.h	/^    u32 sector_per_block;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
sector_per_page	tools/atmelimage.c	/^	int sector_per_page;$/;"	m	struct:pmecc_config	typeref:typename:int	file:
sector_size	drivers/mtd/spi/sf_internal.h	/^	u32 sector_size;$/;"	m	struct:spi_flash_params	typeref:typename:u32
sector_size	include/fat.h	/^	__u8	sector_size[2];	\/* Bytes\/sector *\/$/;"	m	struct:boot_sector	typeref:typename:__u8[2]
sector_size	include/jffs2/load_kernel.h	/^	u32 sector_size;		\/* size of sector *\/$/;"	m	struct:part_info	typeref:typename:u32
sector_size	include/spi_flash.h	/^	u32 sector_size;$/;"	m	struct:spi_flash	typeref:typename:u32
sector_size	tools/atmelimage.c	/^	int sector_size;$/;"	m	struct:pmecc_config	typeref:typename:int	file:
sector_t	arch/avr32/include/asm/types.h	/^typedef u64 sector_t;$/;"	t	typeref:typename:u64
sector_t	include/linux/compat.h	/^typedef u64 sector_t;$/;"	t	typeref:typename:u64
sector_t	include/linux/compat.h	/^typedef unsigned long sector_t;$/;"	t	typeref:typename:unsigned long
sectors	disk/part_amiga.h	/^    u32 sectors;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
sectors	drivers/block/sata_dwc.h	/^	u16			sectors;$/;"	m	struct:ata_device	typeref:typename:u16
sectors	include/ata.h	/^	unsigned short	sectors;	\/* "physical" sectors per track *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
sectors	include/fat.h	/^	__u8	sectors[2];	\/* Number of sectors *\/$/;"	m	struct:boot_sector	typeref:typename:__u8[2]
sectors_in_firmware1	tools/mxsboot.c	/^	uint32_t		sectors_in_firmware1;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
sectors_in_firmware2	tools/mxsboot.c	/^	uint32_t		sectors_in_firmware2;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
sectors_per_block	tools/mxsboot.c	/^	uint32_t		sectors_per_block;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
sectors_per_track	include/linux/edd.h	/^	__u32 sectors_per_track;$/;"	m	struct:edd_device_params	typeref:typename:__u32
sectorsize	drivers/mtd/st_smi.c	/^	unsigned long sectorsize;$/;"	m	struct:flash_device	typeref:typename:unsigned long	file:
secure	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 secure;		\/* 0x28: Security Configuration Register *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
secure_32k_clk_src_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	secure_32k_clk_src_ck: secure_32k_clk_src_ck {$/;"	l
secure_32k_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	secure_32k_dclk_div: secure_32k_dclk_div {$/;"	l
secure_access	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 secure_access;		\/* Secure Access *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
secure_access	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 secure_access;		\/* Secure Access *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
secure_boot_verify_image	arch/arm/cpu/armv7/omap-common/sec-common.c	/^int secure_boot_verify_image(void **image, size_t *size)$/;"	f	typeref:typename:int
secure_emif_firewall_lock	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^int secure_emif_firewall_lock(void)$/;"	f	typeref:typename:int
secure_emif_firewall_setup	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr,$/;"	f	typeref:typename:int
secure_emif_reserve	arch/arm/cpu/armv7/omap5/sec-fxns.c	/^int secure_emif_reserve(void)$/;"	f	typeref:typename:int
secure_emif_sdram_config	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int secure_emif_sdram_config;	\/* offset 0x0110 *\/$/;"	m	struct:ctrl_stat	typeref:typename:unsigned int
secure_ram	arch/arm/include/asm/global_data.h	/^	phys_addr_t secure_ram;$/;"	m	struct:arch_global_data	typeref:typename:phys_addr_t
secure_ram_addr	arch/arm/include/asm/secure.h	/^#define secure_ram_addr(/;"	d
secure_rom_call	arch/arm/cpu/armv7/omap-common/sec-common.c	/^u32 secure_rom_call(u32 service, u32 proc_id, u32 flag, ...)$/;"	f	typeref:typename:u32
secure_unlock_mem	arch/arm/cpu/armv7/omap3/board.c	/^void secure_unlock_mem(void)$/;"	f	typeref:typename:void
secureworld_exit	arch/arm/cpu/armv7/omap3/board.c	/^void secureworld_exit(void)$/;"	f	typeref:typename:void
security	arch/powerpc/include/asm/immap_83xx.h	/^	security83xx_t		security;$/;"	m	struct:immap	typeref:typename:security83xx_t
security	drivers/ddr/altera/sdram.c	/^	u32	security;$/;"	m	struct:sdram_prot_rule	typeref:typename:u32	file:
security83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct security83xx {$/;"	s
security83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} security83xx_t;$/;"	t	typeref:struct:security83xx
security_mode	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 security_mode;		\/* 0x1A0: FUSE_SECURITY_MODE *\/$/;"	m	struct:fuse_regs	typeref:typename:u32
security_op	arch/arm/mach-tegra/tegra20/crypto.c	/^enum security_op {$/;"	g	file:
security_status	include/smbios.h	/^	u8 security_status;$/;"	m	struct:smbios_type3	typeref:typename:u8
secvid_ls	include/fsl_sec.h	/^	u32	secvid_ls;	\/* SEC Version ID Register, LS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
secvid_ms	include/fsl_sec.h	/^	u32	secvid_ms;	\/* SEC Version ID Register, MS *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
sed156x_clear	drivers/video/sed156x.c	/^void sed156x_clear(void)$/;"	f	typeref:typename:void
sed156x_cmd_transfer	drivers/video/sed156x.c	/^unsigned int sed156x_cmd_transfer(unsigned int val)$/;"	f	typeref:typename:unsigned int
sed156x_data_block_transfer	drivers/video/sed156x.c	/^void sed156x_data_block_transfer(const u8 *p, int size)$/;"	f	typeref:typename:void
sed156x_data_transfer	drivers/video/sed156x.c	/^unsigned int sed156x_data_transfer(unsigned int val)$/;"	f	typeref:typename:unsigned int
sed156x_init	drivers/video/sed156x.c	/^void sed156x_init(void)$/;"	f	typeref:typename:void
sed156x_output_at	drivers/video/sed156x.c	/^void sed156x_output_at(int x, int y, const char *str, int size)$/;"	f	typeref:typename:void
sed156x_reverse_at	drivers/video/sed156x.c	/^void sed156x_reverse_at(int x, int y, int size)$/;"	f	typeref:typename:void
sed156x_scroll	drivers/video/sed156x.c	/^void sed156x_scroll(int dx, int dy)$/;"	f	typeref:typename:void
sed156x_scroll_line	drivers/video/sed156x.c	/^void sed156x_scroll_line(void)$/;"	f	typeref:typename:void
sed156x_sync	drivers/video/sed156x.c	/^void sed156x_sync(void)$/;"	f	typeref:typename:void
sed156x_text_height	drivers/video/sed156x.c	/^const int sed156x_text_height = LCD_TEXT_HEIGHT;$/;"	v	typeref:typename:const int
sed156x_text_width	drivers/video/sed156x.c	/^const int sed156x_text_width = LCD_TEXT_WIDTH;$/;"	v	typeref:typename:const int
sed156x_transfer	drivers/video/sed156x.c	/^static inline unsigned int sed156x_transfer(unsigned int val)$/;"	f	typeref:typename:unsigned int	file:
see_output	test/dm/video.c	/^static void __maybe_unused see_output(void)$/;"	f	typeref:typename:void __maybe_unused	file:
seed	net/link_local.c	/^static unsigned int seed;$/;"	v	typeref:typename:unsigned int	file:
seed_camelcase_file	scripts/checkpatch.pl	/^sub seed_camelcase_file {$/;"	s
seed_camelcase_includes	scripts/checkpatch.pl	/^sub seed_camelcase_includes {$/;"	s
seed_done	drivers/crypto/ace_sha.c	/^static unsigned int seed_done;$/;"	v	typeref:typename:unsigned int	file:
seed_mac	net/net_rand.h	/^static inline unsigned int seed_mac(void)$/;"	f	typeref:typename:unsigned int
seed_src_data	post/drivers/flash.c	/^static void *seed_src_data(void *ptr, ulong *old_len, ulong new_len)$/;"	f	typeref:typename:void *	file:
seei	arch/m68k/include/asm/coldfire/edma.h	/^	u8 seei;		\/* 0x1A Set En Error Interrupt Request *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
sefcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sefcr;		\/* System External Interrupt Force Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
seg	arch/mips/include/asm/processor.h	/^	unsigned long seg;$/;"	m	struct:__anonbd509b130108	typeref:typename:unsigned long
seg	arch/powerpc/include/asm/processor.h	/^	unsigned long seg;$/;"	m	struct:__anona42cec3a0108	typeref:typename:unsigned long
seg	drivers/bios_emulator/include/x86emu/regs.h	/^	struct i386_segment_regs seg;$/;"	m	struct:__anon39451e6d0808	typeref:struct:i386_segment_regs
seg	drivers/usb/host/xhci.h	/^	struct xhci_segment *seg;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_segment *
seg_addr	drivers/usb/host/xhci.h	/^	__le64	seg_addr;$/;"	m	struct:xhci_erst_entry	typeref:typename:__le64
seg_size	drivers/usb/host/xhci.h	/^	__le32	seg_size;$/;"	m	struct:xhci_erst_entry	typeref:typename:__le32
segment	arch/x86/include/asm/sipi.h	/^	u16 segment;$/;"	m	struct:sipi_params_16bit	typeref:typename:u16
segment_ptr	drivers/usb/host/xhci.h	/^	volatile __le64 segment_ptr;$/;"	m	struct:xhci_link_trb	typeref:typename:volatile __le64
segs	arch/powerpc/include/asm/mmu.h	/^	SEGREG	segs[16];	\/* Segment registers *\/$/;"	m	struct:_MMU_context	typeref:typename:SEGREG[16]
segsize	drivers/usb/musb-new/musb_host.h	/^	unsigned		segsize;	\/* current xfer fragment *\/$/;"	m	struct:musb_qh	typeref:typename:unsigned
seiko_wvga	board/freescale/mx53loco/mx53loco_video.c	/^static struct fb_videomode const seiko_wvga = {$/;"	v	typeref:struct:fb_videomode const	file:
sel	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int sel;$/;"	m	struct:clk	typeref:typename:int
sel	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_sel sel;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_sel
sel	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int sel;$/;"	m	struct:clk	typeref:typename:int
sel	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_sel sel;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_sel
sel15Kres	drivers/usb/host/isp116x.h	/^	unsigned sel15Kres:1;$/;"	m	struct:isp116x_platform_data	typeref:typename:unsigned:1
sel_1v8	arch/arm/cpu/arm926ejs/spear/spear600.c	/^static void sel_1v8(void)$/;"	f	typeref:typename:void	file:
sel_2v5	arch/arm/cpu/arm926ejs/spear/spear600.c	/^static void sel_2v5(void)$/;"	f	typeref:typename:void	file:
sel_cfg	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 sel_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
sel_cfg	arch/arm/include/asm/arch/display2.h	/^	u32 sel_cfg;$/;"	m	struct:de_clk	typeref:typename:u32
sel_gpio	board/nokia/rx51/tag_omap.h	/^	s16 sel_gpio;$/;"	m	struct:omap_cbus_config	typeref:typename:s16
select	arch/arm/cpu/armv7/mx7/clock_slice.c	/^static int select(enum clk_root_index clock_id)$/;"	f	typeref:typename:int	file:
select	include/i2c.h	/^	int (*select)(struct udevice *mux, struct udevice *bus, uint channel);$/;"	m	struct:i2c_mux_ops	typeref:typename:int (*)(struct udevice * mux,struct udevice * bus,uint channel)
select	include/qfw.h	/^	__be16 select;$/;"	m	struct:fw_cfg_file	typeref:typename:__be16
select_chip	include/linux/mtd/nand.h	/^	void (*select_chip)(struct mtd_info *mtd, int chip);$/;"	m	struct:nand_chip	typeref:typename:void (*)(struct mtd_info * mtd,int chip)
select_chip	include/linux/mtd/nand.h	/^	void (*select_chip)(struct mtd_info *mtd, int chip);$/;"	m	struct:platform_nand_ctrl	typeref:typename:void (*)(struct mtd_info * mtd,int chip)
select_fdc_drive	cmd/fdc.c	/^void select_fdc_drive(FDC_COMMAND_STRUCT *pCMD)$/;"	f	typeref:typename:void
select_hte	arch/x86/cpu/quark/mrc_util.c	/^void select_hte(void)$/;"	f	typeref:typename:void
select_hwpart	include/blk.h	/^	int (*select_hwpart)(struct blk_desc *desc, int hwpart);$/;"	m	struct:blk_driver	typeref:typename:int (*)(struct blk_desc * desc,int hwpart)
select_hwpart	include/blk.h	/^	int (*select_hwpart)(struct udevice *dev, int hwpart);$/;"	m	struct:blk_ops	typeref:typename:int (*)(struct udevice * dev,int hwpart)
select_hwpart	include/part.h	/^	int (*select_hwpart)(int dev_num, int hwpart);$/;"	m	struct:block_drvr	typeref:typename:int (*)(int dev_num,int hwpart)
select_i2c_ch_pca	board/freescale/b4860qds/b4860qds.c	/^int select_i2c_ch_pca(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/ls1021aqds/dcu.c	/^static int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int	file:
select_i2c_ch_pca9547	board/freescale/ls1021aqds/ls1021aqds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/ls1043aqds/ls1043aqds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/ls1046aqds/ls1046aqds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/ls2080aqds/ls2080aqds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/ls2080ardb/ls2080ardb.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/t102xqds/t102xqds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/t1040qds/t1040qds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/t208xqds/t208xqds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_i2c_ch_pca9547	board/freescale/t4qds/t4240qds.c	/^int select_i2c_ch_pca9547(u8 ch)$/;"	f	typeref:typename:int
select_ldb_di_clock_source	arch/arm/cpu/armv7/mx6/clock.c	/^void select_ldb_di_clock_source(enum ldb_di_clock clk)$/;"	f	typeref:typename:void
select_mem_mgr	arch/x86/cpu/quark/mrc_util.c	/^void select_mem_mgr(void)$/;"	f	typeref:typename:void
select_pll_source_clk	board/freescale/s32v234evb/clock.c	/^static int select_pll_source_clk(enum pll_type pll, u32 refclk_freq)$/;"	f	typeref:typename:int	file:
select_splash_location	common/splash_source.c	/^static struct splash_location *select_splash_location($/;"	f	typeref:struct:splash_location *	file:
select_strobe	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned select_strobe;$/;"	m	struct:aemif_config	typeref:typename:unsigned
select_vidconsole	test/dm/video.c	/^static int select_vidconsole(struct unit_test_state *uts, const char *drv_name)$/;"	f	typeref:typename:int	file:
selected	cmd/ubi.c	/^	int selected;$/;"	m	struct:selected_dev	typeref:typename:int	file:
selected	drivers/i2c/muxes/i2c-mux-uclass.c	/^	int selected;$/;"	m	struct:i2c_mux	typeref:typename:int	file:
selected	drivers/mtd/nand/sunxi_nand.c	/^	int selected;$/;"	m	struct:sunxi_nand_chip	typeref:typename:int	file:
selected	scripts/kconfig/lxdialog/dialog.h	/^	int selected;	\/* Set to 1 by dialog_*() function if selected. *\/$/;"	m	struct:dialog_item	typeref:typename:int
selected_dev	cmd/ubi.c	/^struct selected_dev {$/;"	s	file:
selector	arch/x86/cpu/interrupts.c	/^	u16	selector;$/;"	m	struct:idt_entry	typeref:typename:u16	file:
selector	lib/bzip2/bzlib_private.h	/^      UChar    selector   [BZ_MAX_SELECTORS];$/;"	m	struct:__anon93cbeec40108	typeref:typename:UChar[]
selector	lib/bzip2/bzlib_private.h	/^      UChar    selector   [BZ_MAX_SELECTORS];$/;"	m	struct:__anon93cbeec40208	typeref:typename:UChar[]
selectorMtf	lib/bzip2/bzlib_private.h	/^      UChar    selectorMtf[BZ_MAX_SELECTORS];$/;"	m	struct:__anon93cbeec40108	typeref:typename:UChar[]
selectorMtf	lib/bzip2/bzlib_private.h	/^      UChar    selectorMtf[BZ_MAX_SELECTORS];$/;"	m	struct:__anon93cbeec40208	typeref:typename:UChar[]
selector_exists	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define selector_exists(/;"	d
selector_exists	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define selector_exists(/;"	d
selectors_serdes_rev1_map	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^u8 selectors_serdes_rev1_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {$/;"	v	typeref:typename:u8[][]
selectors_serdes_rev2_map	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u8 selectors_serdes_rev2_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {$/;"	v	typeref:typename:u8[][]
self	tools/imximage.h	/^	uint32_t self;$/;"	m	struct:__anon504a956c0c08	typeref:typename:uint32_t
self	tools/mxsimage.h	/^	uint32_t	self;$/;"	m	struct:sb_ivt_header	typeref:typename:uint32_t
self_check_ai	drivers/mtd/ubi/attach.c	/^static int self_check_ai(struct ubi_device *ubi, struct ubi_attach_info *ai)$/;"	f	typeref:typename:int	file:
self_check_eba	drivers/mtd/ubi/eba.c	/^int self_check_eba(struct ubi_device *ubi, struct ubi_attach_info *ai_fastmap,$/;"	f	typeref:typename:int
self_check_ec	drivers/mtd/ubi/wl.c	/^static int self_check_ec(struct ubi_device *ubi, int pnum, int ec)$/;"	f	typeref:typename:int	file:
self_check_ec_hdr	drivers/mtd/ubi/io.c	/^static int self_check_ec_hdr(const struct ubi_device *ubi, int pnum,$/;"	f	typeref:typename:int	file:
self_check_in_pq	drivers/mtd/ubi/wl.c	/^static int self_check_in_pq(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
self_check_in_wl_tree	drivers/mtd/ubi/wl.c	/^static int self_check_in_wl_tree(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
self_check_not_bad	drivers/mtd/ubi/io.c	/^static int self_check_not_bad(const struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
self_check_peb_ec_hdr	drivers/mtd/ubi/io.c	/^static int self_check_peb_ec_hdr(const struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
self_check_peb_vid_hdr	drivers/mtd/ubi/io.c	/^static int self_check_peb_vid_hdr(const struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
self_check_seen	drivers/mtd/ubi/fastmap.c	/^static int self_check_seen(struct ubi_device *ubi, int *seen)$/;"	f	typeref:typename:int	file:
self_check_vid_hdr	drivers/mtd/ubi/io.c	/^static int self_check_vid_hdr(const struct ubi_device *ubi, int pnum,$/;"	f	typeref:typename:int	file:
self_check_volume	drivers/mtd/ubi/vmt.c	/^static int self_check_volume(struct ubi_device *ubi, int vol_id)$/;"	f	typeref:typename:int	file:
self_check_volumes	drivers/mtd/ubi/vmt.c	/^static int self_check_volumes(struct ubi_device *ubi)$/;"	f	typeref:typename:int	file:
self_check_write	drivers/mtd/ubi/io.c	/^static int self_check_write(struct ubi_device *ubi, const void *buf, int pnum,$/;"	f	typeref:typename:int	file:
self_ptr2	arch/arm/include/asm/arch-mx6/mx6_plugin.S	/^self_ptr2:              .long 0x0$/;"	l
self_ptr2	arch/arm/include/asm/arch-mx7/mx7_plugin.S	/^self_ptr2:              .long 0x0$/;"	l
self_ref	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 self_ref;		\/* 0xE0: EMC_SELF_REF *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
self_refresh_cmd_0	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_0;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_1	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_1;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_2	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_2;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_3	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_3;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_4	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_4;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_5	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_5;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_6	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_6;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_cmd_7	arch/powerpc/include/asm/immap_512x.h	/^	u32 self_refresh_cmd_7;	\/* Enter\/Exit Self Refresh Registers *\/$/;"	m	struct:ddr512x	typeref:typename:u32
self_refresh_in_sleep	include/fsl_ddr_sdram.h	/^	unsigned int self_refresh_in_sleep;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
self_refresh_interrupt_en	include/fsl_ddr_sdram.h	/^	unsigned int self_refresh_interrupt_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
self_vtbl_check	drivers/mtd/ubi/vtbl.c	/^static void self_vtbl_check(const struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
selfctl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t selfctl;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
selfpowered	drivers/usb/gadget/at91_udc.h	/^	unsigned			selfpowered:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
sels	drivers/mtd/nand/sunxi_nand.c	/^	struct sunxi_nand_chip_sel sels[0];$/;"	m	struct:sunxi_nand_chip	typeref:struct:sunxi_nand_chip_sel[0]	file:
semaphore0_1_2_3	include/tsi148.h	/^	unsigned int semaphore0_1_2_3;        \/* 0x608         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
semaphore4_5_6_7	include/tsi148.h	/^	unsigned int semaphore4_5_6_7;        \/* 0x60c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
semsr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 semsr;		\/* System External Interrupt Mask Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sen_alec	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_alec;	\/* alignment error counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_alec	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_alec;	\/* alignment error counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_alec	include/commproc.h	/^	uint	sen_alec;	\/* alignment error counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_boffcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_boffcnt;	\/* Backoff counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_boffcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_boffcnt;	\/* Backoff counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_boffcnt	include/commproc.h	/^	ushort	sen_boffcnt;	\/* Backoff counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_cmask	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_cmask	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_cmask	include/commproc.h	/^	uint	sen_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_cpres	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_cpres;	\/* Preset CRC *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_cpres	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_cpres;	\/* Preset CRC *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_cpres	include/commproc.h	/^	uint	sen_cpres;	\/* Preset CRC *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_crcec	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_crcec;	\/* CRC Error counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_crcec	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_crcec;	\/* CRC Error counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_crcec	include/commproc.h	/^	uint	sen_crcec;	\/* CRC Error counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_disfc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_disfc;	\/* discard frame counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_disfc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_disfc;	\/* discard frame counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_disfc	include/commproc.h	/^	uint	sen_disfc;	\/* discard frame counter *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_dmacnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_dmacnt;	\/* Rx DMA counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_dmacnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_dmacnt;	\/* Rx DMA counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_dmacnt	include/commproc.h	/^	ushort	sen_dmacnt;	\/* Rx DMA counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_gaddr1;	\/* Group address filter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_gaddr1;	\/* Group address filter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr1	include/commproc.h	/^	ushort	sen_gaddr1;	\/* Group address filter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_gaddr2;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr2	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_gaddr2;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr2	include/commproc.h	/^	ushort	sen_gaddr2;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr3	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_gaddr3;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr3	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_gaddr3;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr3	include/commproc.h	/^	ushort	sen_gaddr3;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr4	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_gaddr4;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr4	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_gaddr4;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_gaddr4	include/commproc.h	/^	ushort	sen_gaddr4;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_genscc	arch/powerpc/include/asm/cpm_8260.h	/^	sccp_t	sen_genscc;$/;"	m	struct:scc_enet	typeref:typename:sccp_t
sen_genscc	arch/powerpc/include/asm/cpm_85xx.h	/^	sccp_t	sen_genscc;$/;"	m	struct:scc_enet	typeref:typename:sccp_t
sen_genscc	include/commproc.h	/^	sccp_t	sen_genscc;$/;"	m	struct:scc_enet	typeref:typename:sccp_t
sen_iaddr1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_iaddr1;	\/* Individual address filter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_iaddr1;	\/* Individual address filter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr1	include/commproc.h	/^	ushort	sen_iaddr1;	\/* Individual address filter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_iaddr2;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr2	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_iaddr2;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr2	include/commproc.h	/^	ushort	sen_iaddr2;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr3	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_iaddr3;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr3	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_iaddr3;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr3	include/commproc.h	/^	ushort	sen_iaddr3;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr4	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_iaddr4;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr4	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_iaddr4;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_iaddr4	include/commproc.h	/^	ushort	sen_iaddr4;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxb	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_maxb;	\/* Max BD byte count *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxb	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_maxb;	\/* Max BD byte count *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxb	include/commproc.h	/^	ushort	sen_maxb;	\/* Max BD byte count *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_maxd;	\/* Rx max DMA *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_maxd;	\/* Rx max DMA *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd	include/commproc.h	/^	ushort	sen_maxd;	\/* Rx max DMA *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_maxd1;	\/* maximum DMA1 length *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd1	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_maxd1;	\/* maximum DMA1 length *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd1	include/commproc.h	/^	ushort	sen_maxd1;	\/* maximum DMA1 length *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_maxd2;	\/* maximum DMA2 length *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd2	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_maxd2;	\/* maximum DMA2 length *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxd2	include/commproc.h	/^	ushort	sen_maxd2;	\/* maximum DMA2 length *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxflr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_maxflr;	\/* maximum frame length register *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxflr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_maxflr;	\/* maximum frame length register *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_maxflr	include/commproc.h	/^	ushort	sen_maxflr;	\/* maximum frame length register *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_minflr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_minflr;	\/* minimum frame length register *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_minflr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_minflr;	\/* minimum frame length register *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_minflr	include/commproc.h	/^	ushort	sen_minflr;	\/* minimum frame length register *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrh	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_paddrh;	\/* physical address (MSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrh	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_paddrh;	\/* physical address (MSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrh	include/commproc.h	/^	ushort	sen_paddrh;	\/* physical address (MSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_paddrl;	\/* physical address (LSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrl	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_paddrl;	\/* physical address (LSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrl	include/commproc.h	/^	ushort	sen_paddrl;	\/* physical address (LSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrm	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_paddrm;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrm	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_paddrm;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_paddrm	include/commproc.h	/^	ushort	sen_paddrm;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_pads	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_pads;	\/* Tx short frame pad character *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_pads	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_pads;	\/* Tx short frame pad character *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_pads	include/commproc.h	/^	ushort	sen_pads;	\/* Tx short frame pad character *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_pper	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_pper;	\/* persistence *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_pper	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_pper;	\/* persistence *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_pper	include/commproc.h	/^	ushort	sen_pper;	\/* persistence *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_retcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_retcnt;	\/* Retry limit counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_retcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_retcnt;	\/* Retry limit counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_retcnt	include/commproc.h	/^	ushort	sen_retcnt;	\/* Retry limit counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_retlim	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_retlim;	\/* Retry limit threshold *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_retlim	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_retlim;	\/* Retry limit threshold *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_retlim	include/commproc.h	/^	ushort	sen_retlim;	\/* Retry limit threshold *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_rfbdptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_rfbdptr;	\/* Rx first BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_rfbdptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_rfbdptr;	\/* Rx first BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_rfbdptr	include/commproc.h	/^	ushort	sen_rfbdptr;	\/* Rx first BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrh	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_taddrh;	\/* temp address (MSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrh	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_taddrh;	\/* temp address (MSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrh	include/commproc.h	/^	ushort	sen_taddrh;	\/* temp address (MSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_taddrl;	\/* temp address (LSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrl	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_taddrl;	\/* temp address (LSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrl	include/commproc.h	/^	ushort	sen_taddrl;	\/* temp address (LSB) *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrm	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_taddrm;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrm	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_taddrm;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_taddrm	include/commproc.h	/^	ushort	sen_taddrm;$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf0bcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_tbuf0bcnt;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf0bcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_tbuf0bcnt;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf0bcnt	include/commproc.h	/^	ushort	sen_tbuf0bcnt;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf0crc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf0crc;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0crc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf0crc;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0crc	include/commproc.h	/^	uint	sen_tbuf0crc;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0data0	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf0data0;	\/* Save area 0 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0data0	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf0data0;	\/* Save area 0 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0data0	include/commproc.h	/^	uint	sen_tbuf0data0;	\/* Save area 0 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0data1	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf0data1;	\/* Save area 1 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0data1	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf0data1;	\/* Save area 1 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0data1	include/commproc.h	/^	uint	sen_tbuf0data1;	\/* Save area 1 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0rba	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf0rba;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0rba	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf0rba;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf0rba	include/commproc.h	/^	uint	sen_tbuf0rba;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1bcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_tbuf1bcnt;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf1bcnt	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_tbuf1bcnt;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf1bcnt	include/commproc.h	/^	ushort	sen_tbuf1bcnt;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tbuf1crc	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf1crc;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1crc	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf1crc;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1crc	include/commproc.h	/^	uint	sen_tbuf1crc;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1data0	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf1data0;	\/* Save area 0 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1data0	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf1data0;	\/* Save area 0 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1data0	include/commproc.h	/^	uint	sen_tbuf1data0;	\/* Save area 0 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1data1	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf1data1;	\/* Save area 1 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1data1	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf1data1;	\/* Save area 1 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1data1	include/commproc.h	/^	uint	sen_tbuf1data1;	\/* Save area 1 - current frame *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1rba	arch/powerpc/include/asm/cpm_8260.h	/^	uint	sen_tbuf1rba;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1rba	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	sen_tbuf1rba;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tbuf1rba	include/commproc.h	/^	uint	sen_tbuf1rba;	\/* Internal *\/$/;"	m	struct:scc_enet	typeref:typename:uint
sen_tfbdptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_tfbdptr;	\/* Tx first BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tfbdptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_tfbdptr;	\/* Tx first BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tfbdptr	include/commproc.h	/^	ushort	sen_tfbdptr;	\/* Tx first BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tlbdptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_tlbdptr;	\/* Tx last BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tlbdptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_tlbdptr;	\/* Tx last BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_tlbdptr	include/commproc.h	/^	ushort	sen_tlbdptr;	\/* Tx last BD pointer *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_txlen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	sen_txlen;	\/* Tx Frame length counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_txlen	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	sen_txlen;	\/* Tx Frame length counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
sen_txlen	include/commproc.h	/^	ushort	sen_txlen;	\/* Tx Frame length counter *\/$/;"	m	struct:scc_enet	typeref:typename:ushort
send	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int send;$/;"	m	struct:virt_root_hub	typeref:typename:int
send	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int send;$/;"	m	struct:virt_root_hub	typeref:typename:int
send	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int send;$/;"	m	struct:virt_root_hub	typeref:typename:int
send	drivers/net/altera_tse.h	/^	int (*send)(struct udevice *dev, void *packet, int length);$/;"	m	struct:tse_ops	typeref:typename:int (*)(struct udevice * dev,void * packet,int length)
send	drivers/usb/gadget/rndis.h	/^	int			send;$/;"	m	struct:rndis_resp_t	typeref:typename:int
send	drivers/usb/host/ohci-s3c24xx.h	/^	int send;$/;"	m	struct:virt_root_hub	typeref:typename:int
send	drivers/usb/host/ohci.h	/^	int send;$/;"	m	struct:virt_root_hub	typeref:typename:int
send	include/mailbox-uclass.h	/^	int (*send)(struct mbox_chan *chan, const void *data);$/;"	m	struct:mbox_ops	typeref:typename:int (*)(struct mbox_chan * chan,const void * data)
send	include/net.h	/^	int (*send)(struct eth_device *, void *packet, int length);$/;"	m	struct:eth_device	typeref:typename:int (*)(struct eth_device *,void * packet,int length)
send	include/net.h	/^	int (*send)(struct udevice *dev, void *packet, int length);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev,void * packet,int length)
send	include/tpm.h	/^	int (*send)(struct udevice *dev, const uint8_t *sendbuf,$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev,const uint8_t * sendbuf,size_t send_size)
send	post/cpu/mpc8xx/ether.c	/^	int (*send) (int index, volatile void *packet, int length);$/;"	m	struct:__anon27059ff10108	typeref:typename:int (*)(int index,volatile void * packet,int length)	file:
send	test/py/u_boot_spawn.py	/^    def send(self, data):$/;"	m	class:Spawn
sendMTFValues	lib/bzip2/bzlib_compress.c	/^void sendMTFValues ( EState* s )$/;"	f	typeref:typename:void	file:
send_ack	cmd/load.c	/^static void send_ack(int n)$/;"	f	typeref:typename:void	file:
send_ack	drivers/i2c/soft_i2c.c	/^static void send_ack(int ack)$/;"	f	typeref:typename:void	file:
send_addr	drivers/mtd/nand/mxc_nand.c	/^static void send_addr(struct mxc_nand_host *host, uint16_t addr)$/;"	f	typeref:typename:void	file:
send_all_trees	lib/zlib/trees.c	/^local void send_all_trees(s, lcodes, dcodes, blcodes)$/;"	f
send_and_recv_byte	drivers/i2c/i2c-uniphier.c	/^static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm)$/;"	f	typeref:typename:int	file:
send_bits	lib/zlib/trees.c	/^#define send_bits(/;"	d	file:
send_bits	lib/zlib/trees.c	/^local void send_bits(s, value, length)$/;"	f
send_bulk_packet	drivers/usb/host/r8a66597-hcd.c	/^static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
send_byte	drivers/i2c/i2c-uniphier.c	/^static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop)$/;"	f	typeref:typename:int	file:
send_bytes	arch/powerpc/cpu/mpc512x/i2c.c	/^static int send_bytes (uchar chip, char *buf, int len)$/;"	f	typeref:typename:int	file:
send_bytes	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int send_bytes(uchar chip, char *buf, int len)$/;"	f	typeref:typename:int	file:
send_cmd	drivers/mtd/nand/mxc_nand.c	/^static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)$/;"	f	typeref:typename:void	file:
send_cmd	include/mmc.h	/^	int (*send_cmd)(struct mmc *mmc,$/;"	m	struct:mmc_ops	typeref:typename:int (*)(struct mmc * mmc,struct mmc_cmd * cmd,struct mmc_data * data)
send_cmd	include/mmc.h	/^	int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,$/;"	m	struct:dm_mmc_ops	typeref:typename:int (*)(struct udevice * dev,struct mmc_cmd * cmd,struct mmc_data * data)
send_code	lib/zlib/trees.c	/^#  define send_code(/;"	d	file:
send_command	arch/arm/mach-rockchip/rk3036/sdram_rk3036.c	/^static void send_command(struct rk3036_ddr_pctl *pctl,$/;"	f	typeref:typename:void	file:
send_command	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void send_command(struct rk3288_ddr_pctl *pctl, u32 rank,$/;"	f	typeref:typename:void	file:
send_command	drivers/misc/cros_ec.c	/^static int send_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,$/;"	f	typeref:typename:int	file:
send_command_op	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static inline void send_command_op(struct rk3288_ddr_pctl *pctl,$/;"	f	typeref:typename:void	file:
send_command_proto3	drivers/misc/cros_ec.c	/^static int send_command_proto3(struct cros_ec_dev *dev,$/;"	f	typeref:typename:int	file:
send_data_rsp	drivers/usb/gadget/f_thor.c	/^static void send_data_rsp(s32 ack, s32 count)$/;"	f	typeref:typename:void	file:
send_mipi_dcs_command	drivers/video/ssd2828.c	/^static void send_mipi_dcs_command(const struct ssd2828_config *cfg, u8 cmdnum)$/;"	f	typeref:typename:void	file:
send_nack	cmd/load.c	/^static void send_nack(int n)$/;"	f	typeref:typename:void	file:
send_packet_headers	drivers/i2c/tegra_i2c.c	/^static void send_packet_headers($/;"	f	typeref:typename:void	file:
send_pad	cmd/load.c	/^static void send_pad(void)$/;"	f	typeref:typename:void	file:
send_parms	cmd/load.c	/^static char send_parms[SEND_DATA_SIZE];$/;"	v	typeref:typename:char[]	file:
send_pci_eeprom_cmd	board/mpl/pati/cmd_pati.c	/^static void send_pci_eeprom_cmd(unsigned long cmd, unsigned char len)$/;"	f	typeref:typename:void	file:
send_prog_page	drivers/mtd/nand/mxc_nand.c	/^static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,$/;"	f	typeref:typename:void	file:
send_ptr	cmd/load.c	/^static char *send_ptr;$/;"	v	typeref:typename:char *	file:
send_q_mem_reg_offset	drivers/qe/uec.h	/^	u32				send_q_mem_reg_offset;$/;"	m	struct:uec_private	typeref:typename:u32
send_read_id	drivers/mtd/nand/mxc_nand.c	/^static void send_read_id(struct mxc_nand_host *host)$/;"	f	typeref:typename:void	file:
send_read_page	drivers/mtd/nand/mxc_nand.c	/^static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,$/;"	f	typeref:typename:void	file:
send_recv_packets	drivers/i2c/tegra_i2c.c	/^static int send_recv_packets(struct i2c_bus *i2c_bus,$/;"	f	typeref:typename:int	file:
send_reset	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static void send_reset(void)$/;"	f	typeref:typename:void	file:
send_reset	drivers/i2c/soft_i2c.c	/^static void send_reset(void)$/;"	f	typeref:typename:void	file:
send_rsp	drivers/usb/gadget/f_thor.c	/^static void send_rsp(const struct rsp_box *rsp)$/;"	f	typeref:typename:void	file:
send_setup_frame	drivers/net/dc2114x.c	/^static void send_setup_frame(struct eth_device* dev, bd_t *bis)$/;"	f	typeref:typename:void	file:
send_setup_packet	drivers/usb/host/r8a66597-hcd.c	/^static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
send_start	drivers/i2c/soft_i2c.c	/^static void send_start(void)$/;"	f	typeref:typename:void	file:
send_status	drivers/usb/gadget/atmel_usba_udc.c	/^static void send_status(struct usba_udc *udc, struct usba_ep *ep)$/;"	f	typeref:typename:void	file:
send_status	drivers/usb/gadget/f_mass_storage.c	/^static int send_status(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
send_status_packet	drivers/usb/host/r8a66597-hcd.c	/^static int send_status_packet(struct r8a66597 *r8a66597,$/;"	f	typeref:typename:int	file:
send_stop	drivers/i2c/soft_i2c.c	/^static void send_stop(void)$/;"	f	typeref:typename:void	file:
send_tree	lib/zlib/trees.c	/^local void send_tree (s, tree, max_code)$/;"	f
send_word	drivers/video/s6e63d6.c	/^static int send_word(struct s6e63d6 *data, u8 rs, u16 word)$/;"	f	typeref:typename:int	file:
send_zq_init	arch/arm/mach-exynos/clock_init.h	/^	uint8_t send_zq_init;		\/* 1 to send this command *\/$/;"	m	struct:mem_timings	typeref:typename:uint8_t
sendto_srom	drivers/net/dc2114x.c	/^sendto_srom(struct eth_device* dev, u_int command, u_long addr)$/;"	f	typeref:typename:void	file:
senduart	arch/arm/include/debug/8250.S	/^		.macro	senduart,rd,rx$/;"	m
sense_buf	include/scsi.h	/^	unsigned char		sense_buf[64]$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char[64]
sense_data	drivers/usb/gadget/storage_common.c	/^	u32		sense_data;$/;"	m	struct:fsg_lun	typeref:typename:u32	file:
sense_data_info	drivers/usb/gadget/storage_common.c	/^	u32		sense_data_info;$/;"	m	struct:fsg_lun	typeref:typename:u32	file:
sense_disable	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool sense_disable;$/;"	m	struct:pin_info	typeref:typename:bool	file:
sensecmd	include/scsi.h	/^	unsigned char		sensecmd[6];			\/* Sense command			*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char[6]
sensecmdlen	include/scsi.h	/^	unsigned char		sensecmdlen;			\/* Sense command len	*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char
sensedatalen	include/scsi.h	/^	unsigned long		sensedatalen;			\/* Sense data len			*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned long
sensor_byte_order	include/power/pmic.h	/^	unsigned char sensor_byte_order;$/;"	m	struct:pmic	typeref:typename:unsigned char
sensor_initialized	cmd/dtt.c	/^static unsigned long sensor_initialized;$/;"	v	typeref:typename:unsigned long	file:
sensor_name	include/ec_commands.h	/^	char sensor_name[32];$/;"	m	struct:ec_response_temp_sensor_get_info	typeref:typename:char[32]
sensor_type	include/ec_commands.h	/^	uint8_t sensor_type;$/;"	m	struct:ec_params_thermal_get_threshold	typeref:typename:uint8_t
sensor_type	include/ec_commands.h	/^	uint8_t sensor_type;$/;"	m	struct:ec_params_thermal_set_threshold	typeref:typename:uint8_t
sensor_type	include/ec_commands.h	/^	uint8_t sensor_type;$/;"	m	struct:ec_response_temp_sensor_get_info	typeref:typename:uint8_t
sent	include/usbdevice.h	/^	int sent;		\/* data already sent *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
sep_alpha	drivers/video/ipu_regs.h	/^	u32 sep_alpha;$/;"	m	struct:ipu_idmac	typeref:typename:u32
separator1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkSeparatorMenuItem" id="separator1">$/;"	i
separator2	scripts/kconfig/gconf.glade	/^		    <widget class="GtkSeparatorMenuItem" id="separator2">$/;"	i
sepcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sepcr;		\/* System External Interrupt Polarity Control Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sepnr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sepnr;		\/* System External Interrupt Pending Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
seq	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^	u8 seq;$/;"	m	struct:dram_para	typeref:typename:u8	file:
seq	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^	u8 seq;$/;"	m	struct:dram_para	typeref:typename:u8	file:
seq	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static enum qn_level seq[3][2] = {$/;"	g	file:
seq	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static enum qn_level seq[3][2] = {$/;"	g	file:
seq	fs/yaffs2/yaffs_summary.c	/^	unsigned seq;		\/* Must be this sequence number *\/$/;"	m	struct:yaffs_summary_header	typeref:typename:unsigned	file:
seq	fs/yaffs2/yaffs_yaffs2.c	/^	int seq;$/;"	m	struct:yaffs_block_index	typeref:typename:int	file:
seq	include/dm/device.h	/^	int seq;$/;"	m	struct:udevice	typeref:typename:int
seq	include/ec_commands.h	/^		} brightness, seq, demo;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:ec_params_lightbar::__anon71a6b267010a::num
seq	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
seqToUnseq	lib/bzip2/bzlib_private.h	/^      UChar    seqToUnseq[256];$/;"	m	struct:__anon93cbeec40208	typeref:typename:UChar[256]
seq_coreblk_transition0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition4;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition5;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition6;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_coreblk_transition7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_coreblk_transition7;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint seq_ctrl;			\/* _DISP_INIT_SEQ_CONTROL_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
seq_dmc_transition0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition1;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition2;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition4;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition5;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition6;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_dmc_transition7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_dmc_transition7;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_number	fs/yaffs2/yaffs_guts.h	/^	u32 seq_number;		\/* block sequence number for yaffs2 *\/$/;"	m	struct:yaffs_block_info	typeref:typename:u32
seq_number	fs/yaffs2/yaffs_guts.h	/^	unsigned seq_number;	\/* Sequence number of currently$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:unsigned
seq_number	fs/yaffs2/yaffs_guts.h	/^	unsigned seq_number;	\/* Sequence number of currently$/;"	m	struct:yaffs_dev	typeref:typename:unsigned
seq_number	fs/yaffs2/yaffs_guts.h	/^	unsigned seq_number;	\/* The sequence number of this block *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
seq_number	fs/yaffs2/yaffs_packedtags2.h	/^	unsigned seq_number;$/;"	m	struct:yaffs_packed_tags2_tags_only	typeref:typename:unsigned
seq_size	drivers/video/scf0403_lcd.c	/^	int seq_size;$/;"	m	struct:scf0403_priv	typeref:typename:int	file:
seq_transition0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition1;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition2;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition4;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition4	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition4;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition5;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition5	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition5;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition6;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition6	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition6;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seq_transition7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition7;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
seq_transition7	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	seq_transition7;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
seqe	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 seqe;$/;"	m	struct:at91_emac	typeref:typename:u32
seqnum_BE	disk/part_iso.h	/^	unsigned short seqnum_BE;		\/* volume sequence number BE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned short
seqnum_BE	disk/part_iso.h	/^	unsigned short seqnum_BE;		\/* volume sequence number BE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned short
seqnum_LE	disk/part_iso.h	/^	unsigned short seqnum_LE;		\/* volume sequence number LE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned short
seqnum_LE	disk/part_iso.h	/^	unsigned short seqnum_LE;		\/* volume sequence number LE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned short
seqstat	arch/blackfin/include/asm/ptrace.h	/^	long seqstat;$/;"	m	struct:pt_regs	typeref:typename:long
sequence	include/net.h	/^			u16	sequence;$/;"	m	struct:icmp_hdr::__anona5cac555010a::__anona5cac5550208	typeref:typename:u16
sequence_number	include/configs/tam3517-common.h	/^	unsigned long long sequence_number;$/;"	m	struct:tam3517_module_info	typeref:typename:unsigned long long
ser	drivers/spi/rk_spi.h	/^	u32 ser;$/;"	m	struct:rockchip_spi	typeref:typename:u32
ser_blink	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 ser_blink;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
ser_blink_cmdsts	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 ser_blink_cmdsts;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
ser_blink_data	arch/x86/include/asm/arch-broadwell/gpio.h	/^	u32 ser_blink_data;$/;"	m	struct:pch_lp_gpio_regs	typeref:typename:u32
ser_conf	drivers/video/ipu_regs.h	/^	u32 ser_conf;$/;"	m	struct:ipu_di	typeref:typename:u32
ser_getc	board/inka4x0/inkadiag.c	/^static int ser_getc(volatile struct mpc5xxx_psc *psc)$/;"	f	typeref:typename:int	file:
ser_init	board/inka4x0/inkadiag.c	/^static int ser_init(volatile struct mpc5xxx_psc *psc, int baudrate)$/;"	f	typeref:typename:int	file:
ser_putc	board/inka4x0/inkadiag.c	/^static void ser_putc(volatile struct mpc5xxx_psc *psc, const char c)$/;"	f	typeref:typename:void	file:
serclk	board/freescale/common/ngpixis.h	/^	u8 serclk;$/;"	m	struct:ngpixis	typeref:typename:u8
sercr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sercr;		\/* System Error Control Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
serdes	arch/powerpc/include/asm/immap_83xx.h	/^	serdes83xx_t		serdes[1];	\/* SerDes Registers *\/$/;"	m	struct:immap	typeref:typename:serdes83xx_t[1]
serdes	arch/powerpc/include/asm/immap_83xx.h	/^	serdes83xx_t		serdes[2];	\/* SerDes Registers *\/$/;"	m	struct:immap	typeref:typename:serdes83xx_t[2]
serdes1_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^static struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes1_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^static struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes1_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^static struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes1_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^static struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^static struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^static const struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:const u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:const u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/p1023_serdes.c	/^static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:const u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/p2020_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^static const struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^static const struct serdes_config serdes1_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_cfg_tbl	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes1_prtcl_map	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^static u64 serdes1_prtcl_map;$/;"	v	typeref:typename:u64	file:
serdes1_prtcl_map	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes1_prtcl_map	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/p1023_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc85xx/p2020_serdes.c	/^static u32 serdes1_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes1_prtcl_map	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes2_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^static struct serdes_config serdes2_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes2_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^static struct serdes_config serdes2_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^static struct serdes_config serdes2_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config[]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {$/;"	v	typeref:typename:const u8[][]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {$/;"	v	typeref:typename:const u8[][]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^static const struct serdes_config serdes2_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^static const struct serdes_config serdes2_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes2_cfg_tbl	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes2_prtcl_map	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^static u64 serdes2_prtcl_map;$/;"	v	typeref:typename:u64	file:
serdes2_prtcl_map	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes2_prtcl_map	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc85xx/p1010_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc85xx/p1022_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes2_prtcl_map	arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c	/^static u32 serdes1_prtcl_map, serdes2_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes3_cfg_tbl	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^static const struct serdes_config serdes3_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes3_prtcl_map	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^static u8 serdes3_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes4_cfg_tbl	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^static const struct serdes_config serdes4_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config[]	file:
serdes4_prtcl_map	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^static u8 serdes4_prtcl_map[SERDES_PRCTL_COUNT];$/;"	v	typeref:typename:u8[]	file:
serdes83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct serdes83xx {$/;"	s
serdes83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} serdes83xx_t;$/;"	t	typeref:struct:serdes83xx
serdes_85xx	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^typedef struct serdes_85xx {$/;"	s	file:
serdes_85xx_t	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^} serdes_85xx_t;$/;"	t	typeref:struct:serdes_85xx	file:
serdes_cfg	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^static const u8 serdes_cfg[][SERDES_LAST_UNIT] = BIN_SERDES_CFG;$/;"	v	typeref:typename:const u8[][]	file:
serdes_cfg	drivers/soc/keystone/keystone_serdes.c	/^struct serdes_cfg {$/;"	s	file:
serdes_cfg_lane_enable	drivers/soc/keystone/keystone_serdes.c	/^static u32 serdes_cfg_lane_enable[] = {$/;"	v	typeref:typename:u32[]	file:
serdes_cfg_pll_enable	drivers/soc/keystone/keystone_serdes.c	/^static u32 serdes_cfg_pll_enable[] = {$/;"	v	typeref:typename:u32[]	file:
serdes_cfg_tbl	arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^static struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config * []	file:
serdes_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^static struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config * []	file:
serdes_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^static struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config * []	file:
serdes_cfg_tbl	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^static struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config * []	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^static struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:struct:serdes_config * []	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/p2041_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/p3041_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/p4080_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/p5020_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/p5040_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/t1024_serdes.c	/^static u8 serdes_cfg_tbl[][4] = {$/;"	v	typeref:typename:u8[][4]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/t1040_serdes.c	/^static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^static const struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config * []	file:
serdes_cfg_tbl	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^static const struct serdes_config *serdes_cfg_tbl[] = {$/;"	v	typeref:typename:const struct serdes_config * []	file:
serdes_change_m_phy	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_SERDES_CHANGE_M_PHY serdes_change_m_phy[] = {$/;"	v	typeref:typename:MV_SERDES_CHANGE_M_PHY[]
serdes_change_m_phy	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^typedef struct serdes_change_m_phy {$/;"	s
serdes_clock_to_string	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^const char *serdes_clock_to_string(u32 clock)$/;"	f	typeref:typename:const char *
serdes_clock_to_string	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^const char *serdes_clock_to_string(u32 clock)$/;"	f	typeref:typename:const char *
serdes_clock_to_string	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^const char *serdes_clock_to_string(u32 clock)$/;"	f	typeref:typename:const char *
serdes_clock_to_string	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^const char *serdes_clock_to_string(u32 clock)$/;"	f	typeref:typename:const char *
serdes_config	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/powerpc/cpu/mpc85xx/c29x_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_config	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^struct serdes_config {$/;"	s	file:
serdes_corenet	arch/powerpc/include/asm/immap_85xx.h	/^typedef struct serdes_corenet {$/;"	s
serdes_corenet_t	arch/powerpc/include/asm/immap_85xx.h	/^} serdes_corenet_t;$/;"	t	typeref:struct:serdes_corenet
serdes_dev_slot	board/freescale/p1022ds/p1022ds.c	/^static u8 serdes_dev_slot[][SATA2 + 1] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_dev_slot	board/gdsys/p1022/controlcenterd.c	/^static u8 serdes_dev_slot[][SATA2 + 1] = {$/;"	v	typeref:typename:u8[][]	file:
serdes_device_from_fm_port	board/freescale/common/fman.c	/^enum srds_prtcl serdes_device_from_fm_port(enum fm_port port)$/;"	f	typeref:enum:srds_prtcl
serdes_get_bank_by_device	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static int serdes_get_bank_by_device(uint32_t prtcl, enum srds_prtcl device)$/;"	f	typeref:typename:int	file:
serdes_get_bank_by_lane	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^int serdes_get_bank_by_lane(int lane)$/;"	f	typeref:typename:int
serdes_get_first_lane	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^int serdes_get_first_lane(u32 sd, enum srds_prtcl device)$/;"	f	typeref:typename:int
serdes_get_first_lane	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^int serdes_get_first_lane(u32 sd, enum srds_prtcl device)$/;"	f	typeref:typename:int
serdes_get_first_lane	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^int serdes_get_first_lane(u32 sd, enum srds_prtcl device)$/;"	f	typeref:typename:int
serdes_get_first_lane	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^int serdes_get_first_lane(u32 sd, enum srds_prtcl device)$/;"	f	typeref:typename:int
serdes_get_first_lane	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^int serdes_get_first_lane(enum srds_prtcl device)$/;"	f	typeref:typename:int
serdes_get_lane_idx	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^int serdes_get_lane_idx(int lane)$/;"	f	typeref:typename:int
serdes_get_prtcl	arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/b4860_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/p2041_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/p3041_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/p4080_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/p5020_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/p5040_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/t1024_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/t1040_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/t2080_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_get_prtcl	arch/powerpc/cpu/mpc85xx/t4240_serdes.c	/^enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)$/;"	f	typeref:enum:srds_prtcl
serdes_info_tbl	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c	/^MV_BIN_SERDES_CFG *serdes_info_tbl[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG * []
serdes_init	arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c	/^u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)$/;"	f	typeref:typename:u64
serdes_init	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c	/^void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,$/;"	f	typeref:typename:void
serdes_init	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,$/;"	f	typeref:typename:void
serdes_init	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,$/;"	f	typeref:typename:void
serdes_lane	arch/powerpc/include/asm/immap_85xx.h	/^	struct serdes_lane {$/;"	s	struct:serdes_corenet
serdes_lane_enabled	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^int serdes_lane_enabled(int lane)$/;"	f	typeref:typename:int
serdes_lane_in_use_count	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u8 serdes_lane_in_use_count[MAX_UNITS_ID][MAX_UNIT_NUMB] = {$/;"	v	typeref:typename:u8[][]
serdes_m_phy_change	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	MV_SERDES_CHANGE_M_PHY *serdes_m_phy_change;$/;"	m	struct:board_serdes_conf	typeref:typename:MV_SERDES_CHANGE_M_PHY *
serdes_map	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^struct serdes_map {$/;"	s
serdes_max_lines_get	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^static int serdes_max_lines_get(void)$/;"	f	typeref:typename:int	file:
serdes_mode	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	enum serdes_mode	serdes_mode;$/;"	m	struct:serdes_map	typeref:enum:serdes_mode
serdes_mode	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^enum serdes_mode {$/;"	g
serdes_mux	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 serdes_mux;		\/* Multiplexed pins for SerDes Lanes *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
serdes_mux	board/freescale/p2041rdb/cpld.h	/^	u8 serdes_mux;		\/* 0xc - Multiplexed pin Select Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
serdes_mux_cmd	board/freescale/ls1021atwr/ls1021atwr.c	/^static int serdes_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
serdes_pex_usb3_pipe_delay_w_a	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^static int serdes_pex_usb3_pipe_delay_w_a(u32 serdes_num, u8 serdes_type)$/;"	f	typeref:typename:int	file:
serdes_phy_config	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int serdes_phy_config(void)$/;"	f	typeref:typename:int
serdes_phy_config	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^int serdes_phy_config(void)$/;"	f	typeref:typename:int
serdes_polarity_config	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int serdes_polarity_config(u32 serdes_num, int is_rx)$/;"	f	typeref:typename:int
serdes_power_down_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params serdes_power_down_params[] = {$/;"	v	typeref:struct:op_params[]
serdes_power_up_ctrl	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^int serdes_power_up_ctrl(u32 serdes_num, int serdes_power_up,$/;"	f	typeref:typename:int
serdes_power_up_ctrl_ext	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c	/^int serdes_power_up_ctrl_ext(u32 serdes_num, int serdes_power_up,$/;"	f	typeref:typename:int
serdes_prtcl_map	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static u32 serdes_prtcl_map;$/;"	v	typeref:typename:u32	file:
serdes_prtcl_str	arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c	/^static const char *serdes_prtcl_str[] = {$/;"	v	typeref:typename:const char * []	file:
serdes_prtcl_str	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static const char *serdes_prtcl_str[] = {$/;"	v	typeref:typename:const char * []	file:
serdes_refclk	board/freescale/common/idt8t49n222a_serdes_clk.h	/^enum serdes_refclk {$/;"	g
serdes_refclock	board/freescale/b4860qds/b4860qds.c	/^static int serdes_refclock(u8 sw, u8 sdclk)$/;"	f	typeref:typename:int	file:
serdes_reset_rx	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^void serdes_reset_rx(enum srds_prtcl device)$/;"	f	typeref:typename:void
serdes_seq	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^enum serdes_seq {$/;"	g
serdes_seq_db	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct cfg_seq serdes_seq_db[SERDES_LAST_SEQ];$/;"	v	typeref:struct:cfg_seq[]
serdes_speed	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	enum serdes_speed	serdes_speed;$/;"	m	struct:serdes_map	typeref:enum:serdes_speed
serdes_speed	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^enum serdes_speed {$/;"	g
serdes_type	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	enum serdes_type	serdes_type;$/;"	m	struct:serdes_map	typeref:enum:serdes_type
serdes_type	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^enum serdes_type {$/;"	g
serdes_type_and_speed_to_speed_seq	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type,$/;"	f	typeref:enum:serdes_seq
serdes_type_to_string	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^static const char *const serdes_type_to_string[] = {$/;"	v	typeref:typename:const char * const[]	file:
serdes_type_to_unit_info	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^static struct serdes_unit_data serdes_type_to_unit_info[] = {$/;"	v	typeref:struct:serdes_unit_data[]	file:
serdes_unit_count	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^u8 serdes_unit_count[MAX_UNITS_ID] = { 0 };$/;"	v	typeref:typename:u8[]
serdes_unit_data	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct serdes_unit_data {$/;"	s	file:
serdes_unit_id	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^	u8 serdes_unit_id;$/;"	m	struct:serdes_unit_data	typeref:typename:u8	file:
serdes_unit_num	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^	u8 serdes_unit_num;$/;"	m	struct:serdes_unit_data	typeref:typename:u8	file:
serfr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 serfr;		\/* System Error Force Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
serial	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u64 serial;$/;"	m	struct:bcm2835_mbox_tag_get_board_serial::__anon775fc544070a::__packed	typeref:typename:u64
serial	arch/x86/dts/efi.dts	/^	serial: serial {$/;"	l
serial	arch/x86/dts/serial.dtsi	/^	serial: serial {$/;"	l
serial	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	struct cb_serial *serial;$/;"	m	struct:sysinfo_t	typeref:struct:cb_serial *
serial	arch/x86/include/asm/global_data.h	/^	uint8_t serial[5];$/;"	m	struct:dimm_info	typeref:typename:uint8_t[5]
serial	board/birdland/bav335x/board.h	/^	char serial[16];$/;"	m	struct:board_eeconfig	typeref:typename:char[16]
serial	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	unsigned char serial[6];$/;"	m	struct:mfgdata	typeref:typename:unsigned char[6]	file:
serial	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u32 serial;          \/* 0x18: Serial Number (read only) *\/$/;"	m	struct:ventana_board_info	typeref:typename:u32
serial	board/kosagi/novena/novena.c	/^	uint32_t	serial;$/;"	m	struct:novena_eeprom_data	typeref:typename:uint32_t	file:
serial	board/siemens/common/factoryset.h	/^	unsigned char serial[MAX_STRING_LENGTH];$/;"	m	struct:factorysetcontainer	typeref:typename:unsigned char[]
serial	board/ti/common/board_detect.h	/^	char serial[TI_EEPROM_HDR_SERIAL_LEN + 1];$/;"	m	struct:ti_common_eeprom	typeref:typename:char[]
serial	board/ti/common/board_detect.h	/^	char serial[TI_EEPROM_HDR_SERIAL_LEN];$/;"	m	struct:ti_am_eeprom	typeref:typename:char[]
serial	board/vscom/baltos/board.h	/^	char serial[12];$/;"	m	struct:am335x_baseboard_id	typeref:typename:char[12]
serial	fs/yaffs2/yaffs_guts.h	/^	u8 serial;		\/* serial number of chunk in NAND.*\/$/;"	m	struct:yaffs_obj	typeref:typename:u8
serial	fs/yaffs2/yaffs_guts.h	/^	u8 serial;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8
serial	include/linux/fb.h	/^	__u32 serial;			\/* Serial Number - Integer *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
serial	include/usb.h	/^	char	serial[32];		\/* serial number *\/$/;"	m	struct:usb_device	typeref:typename:char[32]
serial	lib/list_sort.c	/^	unsigned serial;$/;"	m	struct:debug_el	typeref:typename:unsigned	file:
serial0	arch/arm/dts/fsl-ls2080a.dtsi	/^	serial0: serial@21c0500 {$/;"	l
serial0	arch/arm/dts/uniphier-common32.dtsi	/^		serial0: serial@54006800 {$/;"	l	label:soc
serial0	arch/arm/dts/uniphier-ld11.dtsi	/^		serial0: serial@54006800 {$/;"	l
serial0	arch/arm/dts/uniphier-ld20.dtsi	/^		serial0: serial@54006800 {$/;"	l
serial0	arch/arm/dts/uniphier-sld3.dtsi	/^		serial0: serial@54006800 {$/;"	l
serial0	arch/xtensa/dts/xtfpga.dtsi	/^		serial0: serial@0d050020 {$/;"	l
serial0	board/cavium/thunderx/thunderx.c	/^static const struct pl01x_serial_platdata serial0 = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial0_device	arch/powerpc/cpu/mpc5xxx/serial.c	/^struct serial_device serial0_device =$/;"	v	typeref:struct:serial_device
serial0_getc	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial0_getc(void)$/;"	f	typeref:typename:int
serial0_init	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial0_init(void)$/;"	f	typeref:typename:int
serial0_putc	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial0_putc(const char c)$/;"	f	typeref:typename:void
serial0_puts	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial0_puts(const char *s)$/;"	f	typeref:typename:void
serial0_setbrg	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial0_setbrg (void)$/;"	f	typeref:typename:void
serial0_tstc	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial0_tstc(void)$/;"	f	typeref:typename:int
serial1	arch/arm/dts/fsl-ls2080a.dtsi	/^	serial1: serial@21c0600 {$/;"	l
serial1	arch/arm/dts/uniphier-common32.dtsi	/^		serial1: serial@54006900 {$/;"	l	label:soc
serial1	arch/arm/dts/uniphier-ld11.dtsi	/^		serial1: serial@54006900 {$/;"	l
serial1	arch/arm/dts/uniphier-ld20.dtsi	/^		serial1: serial@54006900 {$/;"	l
serial1	arch/arm/dts/uniphier-sld3.dtsi	/^		serial1: serial@54006900 {$/;"	l
serial1	board/cavium/thunderx/thunderx.c	/^static const struct pl01x_serial_platdata serial1 = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial1_device	arch/powerpc/cpu/mpc512x/serial.c	/^struct serial_device serial1_device =$/;"	v	typeref:struct:serial_device
serial1_device	arch/powerpc/cpu/mpc5xxx/serial.c	/^struct serial_device serial1_device =$/;"	v	typeref:struct:serial_device
serial1_getc	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial1_getc(void)$/;"	f	typeref:typename:int
serial1_init	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial1_init(void)$/;"	f	typeref:typename:int
serial1_putc	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial1_putc(const char c)$/;"	f	typeref:typename:void
serial1_puts	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial1_puts(const char *s)$/;"	f	typeref:typename:void
serial1_setbrg	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial1_setbrg(void)$/;"	f	typeref:typename:void
serial1_tstc	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial1_tstc(void)$/;"	f	typeref:typename:int
serial2	arch/arm/dts/uniphier-common32.dtsi	/^		serial2: serial@54006a00 {$/;"	l	label:soc
serial2	arch/arm/dts/uniphier-ld11.dtsi	/^		serial2: serial@54006a00 {$/;"	l
serial2	arch/arm/dts/uniphier-ld20.dtsi	/^		serial2: serial@54006a00 {$/;"	l
serial2	arch/arm/dts/uniphier-sld3.dtsi	/^		serial2: serial@54006a00 {$/;"	l
serial2_bus	arch/arm/dts/exynos7420.dtsi	/^		serial2_bus: serial2-bus {$/;"	l
serial2_conf	drivers/pinctrl/exynos/pinctrl-exynos7420.c	/^static struct exynos_pinctrl_config_data serial2_conf[] = {$/;"	v	typeref:struct:exynos_pinctrl_config_data[]	file:
serial3	arch/arm/dts/uniphier-common32.dtsi	/^		serial3: serial@54006b00 {$/;"	l	label:soc
serial3	arch/arm/dts/uniphier-ld11.dtsi	/^		serial3: serial@54006b00 {$/;"	l
serial3	arch/arm/dts/uniphier-ld20.dtsi	/^		serial3: serial@54006b00 {$/;"	l
serial3_device	arch/powerpc/cpu/mpc512x/serial.c	/^struct serial_device serial3_device =$/;"	v	typeref:struct:serial_device
serial4_device	arch/powerpc/cpu/mpc512x/serial.c	/^struct serial_device serial4_device =$/;"	v	typeref:struct:serial_device
serial6_device	arch/powerpc/cpu/mpc512x/serial.c	/^struct serial_device serial6_device =$/;"	v	typeref:struct:serial_device
serial_assign	drivers/serial/serial.c	/^int serial_assign(const char *name)$/;"	f	typeref:typename:int
serial_base	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		serial_base;	\/* Serial base address *\/$/;"	m	struct:spl_machine_param	typeref:typename:u32
serial_bdiv	arch/powerpc/cpu/ppc4xx/4xx_uart.c	/^static u16 serial_bdiv(int baudrate, u32 *udiv)$/;"	f	typeref:typename:u16	file:
serial_buf	drivers/serial/sandbox.c	/^static char serial_buf[16];$/;"	v	typeref:typename:char[16]	file:
serial_buf_read	drivers/serial/sandbox.c	/^static unsigned int serial_buf_read;$/;"	v	typeref:typename:unsigned int	file:
serial_buf_write	drivers/serial/sandbox.c	/^static unsigned int serial_buf_write;$/;"	v	typeref:typename:unsigned int	file:
serial_console	board/nokia/rx51/tag_omap.h	/^		struct omap_serial_console_config serial_console;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_serial_console_config
serial_current	drivers/serial/serial.c	/^static struct serial_device *serial_current;$/;"	v	typeref:struct:serial_device *	file:
serial_debug_port_address	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint32_t serial_debug_port_address;	\/* Offset 0x0046 *\/$/;"	m	struct:upd_region	typeref:typename:uint32_t
serial_debug_port_type	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t serial_debug_port_type;		\/* Offset 0x004a *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
serial_deinit	arch/blackfin/cpu/initcode.c	/^static inline void serial_deinit(void)$/;"	f	typeref:typename:void	file:
serial_dev_priv	include/serial.h	/^struct serial_dev_priv {$/;"	s
serial_device	include/serial.h	/^struct serial_device {$/;"	s
serial_devices	drivers/serial/serial.c	/^static struct serial_device *serial_devices;$/;"	v	typeref:struct:serial_device *	file:
serial_din	drivers/serial/ns16550.c	/^#define serial_din(/;"	d	file:
serial_do_portmux	arch/blackfin/include/asm/serial.h	/^static inline void serial_do_portmux(void)$/;"	f	typeref:typename:void
serial_dout	drivers/serial/ns16550.c	/^#define serial_dout(/;"	d	file:
serial_early_do_mach_portmux	arch/blackfin/include/asm/serial1.h	/^static inline void serial_early_do_mach_portmux(char port, int mux_mask,$/;"	f	typeref:typename:void
serial_early_do_mach_portmux	arch/blackfin/include/asm/serial4.h	/^static inline void serial_early_do_mach_portmux(char port, int mux_mask,$/;"	f	typeref:typename:void
serial_early_do_portmux	arch/blackfin/include/asm/serial1.h	/^static inline void serial_early_do_portmux(void)$/;"	f	typeref:typename:void
serial_early_do_portmux	arch/blackfin/include/asm/serial4.h	/^static inline void serial_early_do_portmux(void)$/;"	f	typeref:typename:void
serial_early_get_div	arch/blackfin/include/asm/serial1.h	/^static inline uint16_t serial_early_get_div(void)$/;"	f	typeref:typename:uint16_t
serial_early_get_div	arch/blackfin/include/asm/serial4.h	/^static inline uint32_t serial_early_get_div(void)$/;"	f	typeref:typename:uint32_t
serial_early_init	arch/blackfin/include/asm/serial1.h	/^static inline int serial_early_init(uint32_t uart_base)$/;"	f	typeref:typename:int
serial_early_init	arch/blackfin/include/asm/serial4.h	/^static inline int serial_early_init(uint32_t uart_base)$/;"	f	typeref:typename:int
serial_early_put_div	arch/blackfin/include/asm/serial1.h	/^static inline void serial_early_put_div(uint16_t divisor)$/;"	f	typeref:typename:void
serial_early_put_div	arch/blackfin/include/asm/serial4.h	/^static inline void serial_early_put_div(uint32_t divisor)$/;"	f	typeref:typename:void
serial_early_puts	arch/blackfin/cpu/cpu.c	/^static inline void serial_early_puts(const char *s)$/;"	f	typeref:typename:void	file:
serial_early_puts	arch/blackfin/include/asm/serial.h	/^# define serial_early_puts(/;"	d
serial_early_puts	arch/blackfin/include/asm/serial.h	/^static inline void serial_early_puts(const char *s)$/;"	f	typeref:typename:void
serial_early_set_baud	arch/blackfin/include/asm/serial1.h	/^static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)$/;"	f	typeref:typename:void
serial_early_set_baud	arch/blackfin/include/asm/serial4.h	/^static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)$/;"	f	typeref:typename:void
serial_early_uninit	arch/blackfin/include/asm/serial1.h	/^static inline int serial_early_uninit(uint32_t uart_base)$/;"	f	typeref:typename:int
serial_early_uninit	arch/blackfin/include/asm/serial4.h	/^static inline int serial_early_uninit(uint32_t uart_base)$/;"	f	typeref:typename:int
serial_efi_get_key	drivers/serial/serial_efi.c	/^static int serial_efi_get_key(struct serial_efi_priv *priv)$/;"	f	typeref:typename:int	file:
serial_efi_getc	drivers/serial/serial_efi.c	/^static int serial_efi_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
serial_efi_ids	drivers/serial/serial_efi.c	/^static const struct udevice_id serial_efi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
serial_efi_ops	drivers/serial/serial_efi.c	/^static const struct dm_serial_ops serial_efi_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
serial_efi_pending	drivers/serial/serial_efi.c	/^static int serial_efi_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
serial_efi_priv	drivers/serial/serial_efi.c	/^struct serial_efi_priv {$/;"	s	file:
serial_efi_probe	drivers/serial/serial_efi.c	/^static int serial_efi_probe(struct udevice *dev)$/;"	f	typeref:typename:DEBUG_UART_FUNCS int	file:
serial_efi_putc	drivers/serial/serial_efi.c	/^static int serial_efi_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
serial_efi_setbrg	drivers/serial/serial_efi.c	/^int serial_efi_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
serial_err_check	drivers/serial/serial_s5p.c	/^static int serial_err_check(const struct s5p_uart *const uart, int op)$/;"	f	typeref:typename:int	file:
serial_find_console_or_panic	drivers/serial/serial-uclass.c	/^static void serial_find_console_or_panic(void)$/;"	f	typeref:typename:void	file:
serial_get_ops	include/serial.h	/^#define serial_get_ops(/;"	d
serial_getc	drivers/serial/serial-uclass.c	/^int serial_getc(void)$/;"	f	typeref:typename:int
serial_getc	drivers/serial/serial.c	/^int serial_getc(void)$/;"	f	typeref:typename:int
serial_getc_check	drivers/serial/serial_sh.c	/^static int serial_getc_check(struct uart_port *port)$/;"	f	typeref:typename:int	file:
serial_getc_dev	arch/powerpc/cpu/mpc512x/serial.c	/^int serial_getc_dev(unsigned int idx)$/;"	f	typeref:typename:int
serial_getc_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial_getc_dev (unsigned long dev_base)$/;"	f	typeref:typename:int
serial_getc_dev	drivers/serial/serial_ns16550.c	/^serial_getc_dev(unsigned int dev_index)$/;"	f	typeref:typename:int	file:
serial_getc_dev	drivers/serial/serial_s3c24x0.c	/^static inline int serial_getc_dev(unsigned int dev_index)$/;"	f	typeref:typename:int	file:
serial_getcts_dev	arch/powerpc/cpu/mpc512x/serial.c	/^int serial_getcts_dev(unsigned int idx)$/;"	f	typeref:typename:int
serial_getcts_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial_getcts_dev (unsigned long dev_base)$/;"	f	typeref:typename:int
serial_i2c_request	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^struct serial_i2c_request {$/;"	s
serial_in	drivers/serial/ns16550.c	/^#define serial_in(/;"	d	file:
serial_in_shift	drivers/serial/ns16550.c	/^static inline int serial_in_shift(void *addr, int shift)$/;"	f	typeref:typename:int	file:
serial_init	arch/blackfin/cpu/initcode.c	/^static inline void serial_init(void)$/;"	f	typeref:typename:void	file:
serial_init	drivers/serial/serial-uclass.c	/^int serial_init(void)$/;"	f	typeref:typename:int
serial_init	drivers/serial/serial.c	/^int serial_init(void)$/;"	f	typeref:typename:int
serial_init_dev	arch/powerpc/cpu/mpc512x/serial.c	/^int serial_init_dev(unsigned int idx)$/;"	f	typeref:typename:int
serial_init_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial_init_dev (unsigned long dev_base)$/;"	f	typeref:typename:int
serial_init_dev	drivers/serial/serial_s3c24x0.c	/^static int serial_init_dev(const int dev_index)$/;"	f	typeref:typename:int	file:
serial_initfunc	drivers/serial/serial.c	/^#define serial_initfunc(/;"	d	file:
serial_initialize	drivers/serial/serial-uclass.c	/^void serial_initialize(void)$/;"	f	typeref:typename:void
serial_initialize	drivers/serial/serial.c	/^void serial_initialize(void)$/;"	f	typeref:typename:void
serial_interface_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint serial_interface_opt;	\/* _DISP_SERIAL_INTERFACE_OPTIONS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
serial_jtag_drv	arch/blackfin/cpu/jtag-console.c	/^static struct serial_device serial_jtag_drv = {$/;"	v	typeref:struct:serial_device	file:
serial_logbuf	drivers/serial/serial_bfin.c	/^char serial_logbuf[CONFIG_UART_MEM];$/;"	v	typeref:typename:char[]
serial_logbuf_head	drivers/serial/serial_bfin.c	/^char *serial_logbuf_head = serial_logbuf;$/;"	v	typeref:typename:char *
serial_mem_getc	drivers/serial/serial_bfin.c	/^int serial_mem_getc(void)$/;"	f	typeref:typename:int
serial_mem_init	drivers/serial/serial_bfin.c	/^int serial_mem_init(void)$/;"	f	typeref:typename:int
serial_mem_putc	drivers/serial/serial_bfin.c	/^void serial_mem_putc(const char c)$/;"	f	typeref:typename:void
serial_mem_puts	drivers/serial/serial_bfin.c	/^void serial_mem_puts(const char *s)$/;"	f	typeref:typename:void
serial_mem_setbrg	drivers/serial/serial_bfin.c	/^void serial_mem_setbrg(void)$/;"	f	typeref:typename:void
serial_mem_tstc	drivers/serial/serial_bfin.c	/^int serial_mem_tstc(void)$/;"	f	typeref:typename:int
serial_name	board/mpl/common/common_util.h	/^	char serial_name[17];	\/* "MIP405_1000xxxxx" *\/$/;"	m	struct:__anondef55e280108	typeref:typename:char[17]
serial_no	include/ata.h	/^	unsigned char	serial_no[20];	\/* 0 = not_specified *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char[20]
serial_no	include/linux/fb.h	/^	__u8  serial_no[14];		\/* Serial Number *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8[14]
serial_null	drivers/serial/serial.c	/^static void serial_null(void)$/;"	f	typeref:typename:void	file:
serial_number	drivers/serial/usbtty.c	/^static char serial_number[16];$/;"	v	typeref:typename:char[16]	file:
serial_number	drivers/usb/gadget/ether.c	/^static char serial_number[20];$/;"	v	typeref:typename:char[20]	file:
serial_number	fs/yaffs2/yaffs_guts.h	/^	unsigned serial_number:2;$/;"	m	struct:yaffs_tags	typeref:typename:unsigned:2
serial_number	fs/yaffs2/yaffs_guts.h	/^	unsigned serial_number;	\/* Yaffs1 2-bit serial number *\/$/;"	m	struct:yaffs_ext_tags	typeref:typename:unsigned
serial_number	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned serial_number:2;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:2
serial_number	include/edid.h	/^	unsigned char serial_number[4];$/;"	m	struct:edid1_info	typeref:typename:unsigned char[4]
serial_number	include/linux/edd.h	/^			__u64 serial_number;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0c08	typeref:typename:__u64
serial_number	include/smbios.h	/^	u8 serial_number;$/;"	m	struct:smbios_type1	typeref:typename:u8
serial_number	include/smbios.h	/^	u8 serial_number;$/;"	m	struct:smbios_type2	typeref:typename:u8
serial_number	include/smbios.h	/^	u8 serial_number;$/;"	m	struct:smbios_type3	typeref:typename:u8
serial_number	include/smbios.h	/^	u8 serial_number;$/;"	m	struct:smbios_type4	typeref:typename:u8
serial_number	include/usbdevice.h	/^	unsigned int serial_number;$/;"	m	struct:usb_bus_instance	typeref:typename:unsigned int
serial_number_str	include/usbdevice.h	/^	char *serial_number_str;$/;"	m	struct:usb_bus_instance	typeref:typename:char *
serial_omap_platdata	board/lg/sniper/sniper.c	/^static const struct ns16550_platdata serial_omap_platdata = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
serial_out	drivers/serial/ns16550.c	/^#define serial_out(/;"	d	file:
serial_out_shift	drivers/serial/ns16550.c	/^static inline void serial_out_shift(void *addr, int shift, int value)$/;"	f	typeref:typename:void	file:
serial_platdata	board/armltd/integrator/integrator.c	/^static const struct pl01x_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial_platdata	board/armltd/vexpress64/vexpress64.c	/^static const struct pl01x_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial_platdata	board/hisilicon/hikey/hikey.c	/^static const struct pl01x_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial_platdata	board/raspberrypi/rpi/rpi.c	/^static const struct pl01x_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial_platdata	board/raspberrypi/rpi/rpi.c	/^static struct bcm283x_mu_serial_platdata serial_platdata = {$/;"	v	typeref:struct:bcm283x_mu_serial_platdata	file:
serial_platdata	board/renesas/alt/alt.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/blanche/blanche.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/gose/gose.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/koelsch/koelsch.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/lager/lager.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/porter/porter.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/salvator-x/salvator-x.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/silk/silk.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/renesas/stout/stout.c	/^static const struct sh_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct sh_serial_platdata	file:
serial_platdata	board/st/stm32f429-discovery/stm32f429-discovery.c	/^static const struct stm32_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct stm32_serial_platdata	file:
serial_platdata	board/st/stm32f746-disco/stm32f746-disco.c	/^static const struct stm32x7_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct stm32x7_serial_platdata	file:
serial_platdata	board/st/stv0991/stv0991.c	/^static const struct pl01x_serial_platdata serial_platdata = {$/;"	v	typeref:typename:const struct pl01x_serial_platdata	file:
serial_ports	drivers/serial/serial_ns16550.c	/^static NS16550_t serial_ports[6] = {$/;"	v	typeref:typename:NS16550_t[6]	file:
serial_post_probe	drivers/serial/serial-uclass.c	/^static int serial_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
serial_pre_remove	drivers/serial/serial-uclass.c	/^static int serial_pre_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
serial_printf	common/console.c	/^int serial_printf(const char *fmt, ...)$/;"	f	typeref:typename:int
serial_putc	arch/blackfin/cpu/initcode.c	/^static inline void serial_putc(char c)$/;"	f	typeref:typename:void	file:
serial_putc	arch/blackfin/cpu/initcode.h	/^# define serial_putc(/;"	d
serial_putc	drivers/serial/serial-uclass.c	/^void serial_putc(char ch)$/;"	f	typeref:typename:void
serial_putc	drivers/serial/serial.c	/^void serial_putc(const char c)$/;"	f	typeref:typename:void
serial_putc_dev	arch/powerpc/cpu/mpc512x/serial.c	/^void serial_putc_dev(unsigned int idx, const char c)$/;"	f	typeref:typename:void
serial_putc_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial_putc_dev (unsigned long dev_base, const char c)$/;"	f	typeref:typename:void
serial_putc_dev	drivers/serial/serial_ns16550.c	/^serial_putc_dev(unsigned int dev_index,const char c)$/;"	f	typeref:typename:void	file:
serial_putc_dev	drivers/serial/serial_s3c24x0.c	/^static inline void serial_putc_dev(unsigned int dev_index, const char c)$/;"	f	typeref:typename:void	file:
serial_puts	drivers/serial/serial-uclass.c	/^void serial_puts(const char *str)$/;"	f	typeref:typename:void
serial_puts	drivers/serial/serial.c	/^void serial_puts(const char *s)$/;"	f	typeref:typename:void
serial_puts_dev	arch/powerpc/cpu/mpc512x/serial.c	/^void serial_puts_dev(unsigned int idx, const char *s)$/;"	f	typeref:typename:void
serial_puts_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial_puts_dev (unsigned long dev_base, const char *s)$/;"	f	typeref:typename:void
serial_puts_dev	drivers/serial/serial_ns16550.c	/^serial_puts_dev(unsigned int dev_index,const char *s)$/;"	f	typeref:typename:void	file:
serial_puts_dev	drivers/serial/serial_s3c24x0.c	/^static inline void serial_puts_dev(int dev_index, const char *s)$/;"	f	typeref:typename:void	file:
serial_raw_putc	drivers/serial/serial_sh.c	/^static int serial_raw_putc(struct uart_port *port, const char c)$/;"	f	typeref:typename:int	file:
serial_register	drivers/serial/serial.c	/^void serial_register(struct serial_device *dev)$/;"	f	typeref:typename:void
serial_reinit_all	drivers/serial/serial.c	/^void serial_reinit_all(void)$/;"	f	typeref:typename:void
serial_rx_fifo_level	drivers/serial/serial_sh.c	/^static int serial_rx_fifo_level(struct uart_port *port)$/;"	f	typeref:typename:int	file:
serial_scc_device	arch/powerpc/cpu/mpc8xx/serial.c	/^struct serial_device serial_scc_device =$/;"	v	typeref:struct:serial_device
serial_set_divisor	arch/blackfin/include/asm/serial1.h	/^static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor)$/;"	f	typeref:typename:void
serial_set_divisor	arch/blackfin/include/asm/serial4.h	/^static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor)$/;"	f	typeref:typename:void
serial_setbrg	drivers/serial/serial-uclass.c	/^void serial_setbrg(void)$/;"	f	typeref:typename:void
serial_setbrg	drivers/serial/serial.c	/^void serial_setbrg(void)$/;"	f	typeref:typename:void
serial_setbrg_dev	arch/powerpc/cpu/mpc512x/serial.c	/^void serial_setbrg_dev(unsigned int idx)$/;"	f	typeref:typename:void
serial_setbrg_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial_setbrg_dev (unsigned long dev_base)$/;"	f	typeref:typename:void
serial_setbrg_dev	drivers/serial/serial_ns16550.c	/^serial_setbrg_dev(unsigned int dev_index)$/;"	f	typeref:typename:void	file:
serial_setbrg_dev	drivers/serial/serial_s3c24x0.c	/^static inline void serial_setbrg_dev(unsigned int dev_index)$/;"	f	typeref:typename:void	file:
serial_setdivisor	arch/powerpc/cpu/mpc8xx/serial.c	/^static void serial_setdivisor(volatile cpm8xx_t *cp)$/;"	f	typeref:typename:void	file:
serial_setrts_dev	arch/powerpc/cpu/mpc512x/serial.c	/^void serial_setrts_dev(unsigned int idx, int s)$/;"	f	typeref:typename:void
serial_setrts_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^void serial_setrts_dev (unsigned long dev_base, int s)$/;"	f	typeref:typename:void
serial_smc_device	arch/powerpc/cpu/mpc8xx/serial.c	/^struct serial_device serial_smc_device =$/;"	v	typeref:struct:serial_device
serial_state	include/ps2mult.h	/^struct serial_state {$/;"	s
serial_stdio_init	drivers/serial/serial-uclass.c	/^void serial_stdio_init(void)$/;"	f	typeref:typename:void
serial_stdio_init	drivers/serial/serial.c	/^void serial_stdio_init(void)$/;"	f	typeref:typename:void
serial_stub_getc	drivers/serial/serial-uclass.c	/^int serial_stub_getc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int
serial_stub_getc	drivers/serial/serial.c	/^int serial_stub_getc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int
serial_stub_putc	drivers/serial/serial-uclass.c	/^static void serial_stub_putc(struct stdio_dev *sdev, const char ch)$/;"	f	typeref:typename:void	file:
serial_stub_putc	drivers/serial/serial.c	/^static void serial_stub_putc(struct stdio_dev *sdev, const char ch)$/;"	f	typeref:typename:void	file:
serial_stub_puts	drivers/serial/serial-uclass.c	/^void serial_stub_puts(struct stdio_dev *sdev, const char *str)$/;"	f	typeref:typename:void
serial_stub_puts	drivers/serial/serial.c	/^static void serial_stub_puts(struct stdio_dev *sdev, const char *str)$/;"	f	typeref:typename:void	file:
serial_stub_start	drivers/serial/serial.c	/^static int serial_stub_start(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
serial_stub_stop	drivers/serial/serial.c	/^static int serial_stub_stop(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
serial_stub_tstc	drivers/serial/serial-uclass.c	/^int serial_stub_tstc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int
serial_stub_tstc	drivers/serial/serial.c	/^int serial_stub_tstc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int
serial_tstc	drivers/serial/serial-uclass.c	/^int serial_tstc(void)$/;"	f	typeref:typename:int
serial_tstc	drivers/serial/serial.c	/^int serial_tstc(void)$/;"	f	typeref:typename:int
serial_tstc_dev	arch/powerpc/cpu/mpc512x/serial.c	/^int serial_tstc_dev(unsigned int idx)$/;"	f	typeref:typename:int
serial_tstc_dev	arch/powerpc/cpu/mpc5xxx/serial.c	/^int serial_tstc_dev (unsigned long dev_base)$/;"	f	typeref:typename:int
serial_tstc_dev	drivers/serial/serial_ns16550.c	/^serial_tstc_dev(unsigned int dev_index)$/;"	f	typeref:typename:int	file:
serial_tstc_dev	drivers/serial/serial_s3c24x0.c	/^static inline int serial_tstc_dev(unsigned int dev_index)$/;"	f	typeref:typename:int	file:
serial_uninit_dev	arch/powerpc/cpu/mpc512x/serial.c	/^int serial_uninit_dev(unsigned int idx)$/;"	f	typeref:typename:int
serialbuffer	arch/powerpc/cpu/mpc8260/serial_smc.c	/^typedef volatile struct serialbuffer {$/;"	s	file:
serialbuffer	arch/powerpc/cpu/mpc8xx/serial.c	/^typedef volatile struct serialbuffer {$/;"	s	file:
serialbuffer_t	arch/powerpc/cpu/mpc8260/serial_smc.c	/^} serialbuffer_t;$/;"	t	typeref:typename:volatile struct serialbuffer	file:
serialbuffer_t	arch/powerpc/cpu/mpc8xx/serial.c	/^} serialbuffer_t;$/;"	t	typeref:typename:volatile struct serialbuffer	file:
serialclose	tools/gdb/serial.c	/^serialclose(int fd)$/;"	f	typeref:typename:int
serialdev	tools/gdb/gdbcont.c	/^char *serialdev = "\/dev\/term\/b";$/;"	v	typeref:typename:char *
serialdev	tools/gdb/gdbsend.c	/^char *serialdev = "\/dev\/term\/b";$/;"	v	typeref:typename:char *
serialize_u16	drivers/i2c/tegra186_bpmp_i2c.c	/^static inline void serialize_u16(uint8_t **p, uint16_t val)$/;"	f	typeref:typename:void	file:
serialnr	arch/arm/include/asm/setup.h	/^		struct tag_serialnr	serialnr;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_serialnr
serialnr	arch/nds32/include/asm/setup.h	/^		struct tag_serialnr	serialnr;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_serialnr
serialopen	tools/gdb/serial.c	/^serialopen(char *device, speed_t speed)$/;"	f	typeref:typename:int
serialreadchar	tools/gdb/serial.c	/^serialreadchar(int fd, int timeout)$/;"	f	typeref:typename:int
serialsc	arch/arm/dts/uniphier-support-card.dtsi	/^		serialsc: uart@000b0000 {$/;"	l	label:support_card
serialwrite	tools/gdb/serial.c	/^serialwrite(int fd, char *buf, int len)$/;"	f	typeref:typename:int
series	tools/patman/patman	/^        series = patchstream.GetMetaData(options.start, options.count)$/;"	v
series	tools/patman/patman	/^    series = patchstream.FixPatches(series, args)$/;"	v
series	tools/patman/patman.py	/^        series = patchstream.GetMetaData(options.start, options.count)$/;"	v
series	tools/patman/patman.py	/^    series = patchstream.FixPatches(series, args)$/;"	v
sermr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sermr;		\/* System Error Mask Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sermux_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct sermux_regs {$/;"	s
sermux_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct sermux_regs {$/;"	s
serno	board/freescale/common/pixis.h	/^	u8 serno;$/;"	m	struct:pixis	typeref:typename:u8
sernum	include/ddr_spd.h	/^	uint8_t sernum[4];		\/* 325~328 Module Serial Number *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[4]
sernum	include/ddr_spd.h	/^	unsigned char sernum[4];       \/* 122-125 Module Serial Number *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char[4]
sernum	include/ddr_spd.h	/^	unsigned char sernum[4];   \/* 95 Assembly Serial Number *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char[4]
sernum	include/ddr_spd.h	/^	unsigned char sernum[4];   \/* 95 Assembly Serial Number *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char[4]
sernum	include/spd.h	/^	unsigned char sernum[4];   \/* 95 Assembly Serial Number *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char[4]
serq	arch/m68k/include/asm/coldfire/edma.h	/^	u8 serq;		\/* 0x18 Set Enable Request *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
serr	drivers/block/dwc_ahsata.c	/^	u32 serr;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
serror	drivers/block/fsl_sata.h	/^	u32 serror;		\/* SATA interface error register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
serror	drivers/block/mvsata_ide.c	/^	u32 serror;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
serrorintrmask	drivers/block/mvsata_ide.c	/^	u32 serrorintrmask;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
sersr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sersr;		\/* System Error Status Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
serve_prot_queue	drivers/mtd/ubi/wl.c	/^static void serve_prot_queue(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
server	include/xyzModem.h	/^    struct sockaddr_in *server;$/;"	m	struct:__anon582e218b0108	typeref:struct:sockaddr_in *
service_in_request	drivers/usb/musb-new/musb_gadget_ep0.c	/^service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)$/;"	f	typeref:typename:int	file:
service_tx_status_request	drivers/usb/musb-new/musb_gadget_ep0.c	/^static int service_tx_status_request($/;"	f	typeref:typename:int	file:
service_zero_data_request	drivers/usb/musb-new/musb_gadget_ep0.c	/^service_zero_data_request(struct musb *musb,$/;"	f	typeref:typename:int	file:
ses	arch/arm/mach-keystone/msmc.c	/^	struct mpax ses[16][8];$/;"	m	struct:msms_regs	typeref:struct:mpax[16][8]	file:
ses_mpax_lck	arch/arm/mach-keystone/msmc.c	/^	u32	ses_mpax_lck;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
ses_mpax_lckstat	arch/arm/mach-keystone/msmc.c	/^	u32	ses_mpax_lckstat;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
ses_mpax_ulck	arch/arm/mach-keystone/msmc.c	/^	u32	ses_mpax_ulck;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
session_data	lib/tpm.c	/^struct session_data {$/;"	s	file:
set	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t set;$/;"	m	struct:mrq_trace_modify_request	typeref:typename:uint32_t
set	arch/arm/include/asm/arch-tegra/clk_rst.h	/^	uint set;$/;"	m	struct:clk_set_clr	typeref:typename:uint
set	arch/mips/mach-pic32/include/mach/pic32.h	/^	u32 set;$/;"	m	struct:pic32_reg_atomic	typeref:typename:u32
set	fs/yaffs2/yaffs_guts.h	/^	int set;		\/* If 0 then this is a deletion *\/$/;"	m	struct:yaffs_xattr_mod	typeref:typename:int
set	include/bedbug/type.h	/^	int (*set) (int, unsigned long);$/;"	m	struct:__anon3619a6480108	typeref:typename:int (*)(int,unsigned long)
set	include/gdsys_fpga.h	/^	u16 set;$/;"	m	struct:ihs_gpio	typeref:typename:u16
set	include/linux/fb.h	/^	__u16 set;			\/* what to set *\/$/;"	m	struct:fb_cursor_user	typeref:typename:__u16
set	include/linux/fb.h	/^	__u16 set;		\/* what to set *\/$/;"	m	struct:fb_cursor	typeref:typename:__u16
set	include/rtc.h	/^	int (*set)(struct udevice *dev, const struct rtc_time *time);$/;"	m	struct:rtc_ops	typeref:typename:int (*)(struct udevice * dev,const struct rtc_time * time)
set32	board/mpl/pati/cmd_pati.c	/^void set32(unsigned long addr,unsigned long data)$/;"	f	typeref:typename:void
setAllOpen	scripts/kconfig/qconf.cc	/^void ConfigList::setAllOpen(bool open)$/;"	f	class:ConfigList	typeref:typename:void
setBootStrapClock	board/amcc/yucca/cmd_yucca.c	/^static int setBootStrapClock(cmd_tbl_t *cmdtp, int incrflag, int flag,$/;"	f	typeref:typename:int	file:
setFecDuplexSpeed	drivers/net/mcffec.c	/^void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd)$/;"	f	typeref:typename:void
setInfo	scripts/kconfig/qconf.cc	/^void ConfigInfoView::setInfo(struct menu *m)$/;"	f	class:ConfigInfoView	typeref:typename:void
setMenuLink	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::setMenuLink(struct menu *menu)$/;"	f	class:ConfigMainWindow	typeref:typename:void
setOptionMode	scripts/kconfig/qconf.cc	/^void ConfigView::setOptionMode(QAction *act)$/;"	f	class:ConfigView	typeref:typename:void
setParentMenu	scripts/kconfig/qconf.cc	/^void ConfigList::setParentMenu(void)$/;"	f	class:ConfigList	typeref:typename:void
setPeriod	examples/standalone/timer.c	/^void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)$/;"	f	typeref:typename:void
setPixmap	scripts/kconfig/qconf.h	/^	void setPixmap(colIdx idx, const QPixmap& pm)$/;"	f	class:ConfigItem	typeref:typename:void
setPort	board/esd/common/xilinx_jtag/ports.c	/^void setPort(short p,short val)$/;"	f	typeref:typename:void
setRootMenu	scripts/kconfig/qconf.cc	/^void ConfigList::setRootMenu(struct menu *menu)$/;"	f	class:ConfigList	typeref:typename:void
setShowData	scripts/kconfig/qconf.cc	/^void ConfigView::setShowData(bool b)$/;"	f	class:ConfigView	typeref:typename:void
setShowDebug	scripts/kconfig/qconf.cc	/^void ConfigInfoView::setShowDebug(bool b)$/;"	f	class:ConfigInfoView	typeref:typename:void
setShowName	scripts/kconfig/qconf.cc	/^void ConfigView::setShowName(bool b)$/;"	f	class:ConfigView	typeref:typename:void
setShowRange	scripts/kconfig/qconf.cc	/^void ConfigView::setShowRange(bool b)$/;"	f	class:ConfigView	typeref:typename:void
setText	scripts/kconfig/qconf.h	/^	void setText(colIdx idx, const QString& text)$/;"	f	class:ConfigItem	typeref:typename:void
setUp	tools/buildman/func_test.py	/^    def setUp(self):$/;"	m	class:TestFunctional
setUp	tools/buildman/test.py	/^    def setUp(self):$/;"	m	class:TestBuild
setValue	scripts/kconfig/qconf.cc	/^void ConfigList::setValue(ConfigItem* item, tristate val)$/;"	f	class:ConfigList	typeref:typename:void
set_Feature_cmd	drivers/block/sata_sil3114.c	/^static void set_Feature_cmd (int num, int dev)$/;"	f	typeref:typename:void	file:
set_access_control	drivers/net/mvgbe.c	/^static void set_access_control(struct mvgbe_registers *regs,$/;"	f	typeref:typename:void	file:
set_addr	drivers/mtd/nand/fsl_elbc_nand.c	/^static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)$/;"	f	typeref:typename:void	file:
set_addr	drivers/mtd/nand/fsl_ifc_nand.c	/^static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)$/;"	f	typeref:typename:void	file:
set_address	drivers/usb/gadget/atmel_usba_udc.c	/^static inline void set_address(struct usba_udc *udc, unsigned int addr)$/;"	f	typeref:typename:void	file:
set_address	drivers/usb/musb-new/musb_core.h	/^	unsigned		set_address:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
set_ahb_rate	arch/arm/cpu/armv7/mx6/soc.c	/^static void set_ahb_rate(u32 val)$/;"	f	typeref:typename:void	file:
set_all_choice_values	scripts/kconfig/confdata.c	/^void set_all_choice_values(struct symbol *csym)$/;"	f	typeref:typename:void
set_alt	include/linux/usb/composite.h	/^	int			(*set_alt)(struct usb_function *,$/;"	m	struct:usb_function	typeref:typename:int (*)(struct usb_function *,unsigned interface,unsigned alt)
set_altbank	board/freescale/common/pixis.c	/^static void set_altbank(void)$/;"	f	typeref:typename:void	file:
set_anon_super	fs/ubifs/super.c	/^int set_anon_super(struct super_block *s, void *data)$/;"	f	typeref:typename:int
set_arc_product	board/Arcturus/ucp1020/cmd_arc.c	/^static int set_arc_product(int argc, char *const argv[])$/;"	f	typeref:typename:int	file:
set_ata_bus_timing	drivers/block/mxc_ata.c	/^static void set_ata_bus_timing(unsigned char mode)$/;"	f	typeref:typename:void	file:
set_attenuation	board/tqc/tqm5200/cmd_stk52xx.c	/^static void set_attenuation(unsigned char attenuation)$/;"	f	typeref:typename:void	file:
set_auto_refresh	arch/x86/cpu/quark/smc.c	/^void set_auto_refresh(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
set_avp_clock_source	arch/arm/mach-tegra/clock.c	/^static void set_avp_clock_source(u32 src)$/;"	f	typeref:typename:void	file:
set_backlight	include/video_bridge.h	/^	int (*set_backlight)(struct udevice *dev, int percent);$/;"	m	struct:video_bridge_ops	typeref:typename:int (*)(struct udevice * dev,int percent)
set_backup_values	board/mpl/common/common_util.c	/^void set_backup_values(int overwrite)$/;"	f	typeref:typename:void
set_bandwidth_ratio	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static void set_bandwidth_ratio(const struct chan_info *chan, u32 channel,$/;"	f	typeref:typename:void	file:
set_bf	arch/powerpc/include/asm/fsl_pamu.h	/^#define set_bf(/;"	d
set_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ void set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
set_bit	arch/microblaze/include/asm/bitops.h	/^static inline void set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
set_bit	arch/mips/include/asm/bitops.h	/^set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
set_bit	arch/mips/include/asm/bitops.h	/^static __inline__ void set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
set_bit	arch/nios2/include/asm/bitops/atomic.h	/^static inline void set_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:void
set_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ void set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
set_bit	arch/sh/include/asm/bitops.h	/^static inline void set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
set_bit	arch/x86/include/asm/bitops.h	/^static __inline__ void set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:void
set_bit	drivers/mmc/davinci_mmc.c	/^#define set_bit(/;"	d	file:
set_bit	drivers/usb/gadget/f_mass_storage.c	/^inline void set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:void
set_bl_bit	arch/sh/include/asm/irqflags.h	/^static inline void set_bl_bit(void)$/;"	f	typeref:typename:void
set_blackbg_theme	scripts/kconfig/lxdialog/util.c	/^static void set_blackbg_theme(void)$/;"	f	typeref:typename:void	file:
set_bluetitle_theme	scripts/kconfig/lxdialog/util.c	/^static void set_bluetitle_theme(void)$/;"	f	typeref:typename:void	file:
set_board_info	board/raspberrypi/rpi/rpi.c	/^static void set_board_info(void)$/;"	f	typeref:typename:void	file:
set_board_info	board/samsung/common/misc.c	/^void set_board_info(void)$/;"	f	typeref:typename:void
set_board_info_env	board/ti/common/board_detect.c	/^void __maybe_unused set_board_info_env(char *name)$/;"	f	typeref:typename:void __maybe_unused
set_board_type	board/samsung/common/exynos5-dt-types.c	/^void set_board_type(void)$/;"	f	typeref:typename:void
set_board_type	board/samsung/odroid/odroid.c	/^void set_board_type(void)$/;"	f	typeref:typename:void
set_bootcount_addr	board/keymile/km_arm/km_arm.c	/^static void set_bootcount_addr(void)$/;"	f	typeref:typename:void	file:
set_brdcfg9_for_gtx_clk	board/freescale/t1040qds/eth.c	/^static void set_brdcfg9_for_gtx_clk(void)$/;"	f	typeref:typename:void	file:
set_bud_lprops	fs/ubifs/replay.c	/^static int set_bud_lprops(struct ubifs_info *c, struct bud_entry *b)$/;"	f	typeref:typename:int	file:
set_buds_lprops	fs/ubifs/replay.c	/^static int set_buds_lprops(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
set_bulk_out_req_length	drivers/usb/gadget/f_mass_storage.c	/^static void set_bulk_out_req_length(struct fsg_common *common,$/;"	f	typeref:typename:void	file:
set_bus_speed	include/i2c.h	/^	int (*set_bus_speed)(struct udevice *bus, unsigned int speed);$/;"	m	struct:dm_i2c_ops	typeref:typename:int (*)(struct udevice * bus,unsigned int speed)
set_bus_speed	include/i2c.h	/^	uint		(*set_bus_speed)(struct i2c_adapter *adap,$/;"	m	struct:i2c_adapter	typeref:typename:uint (*)(struct i2c_adapter * adap,uint speed)
set_bus_width_page_size	drivers/mtd/nand/tegra_nand.c	/^static int set_bus_width_page_size(struct fdt_nand *config,$/;"	f	typeref:typename:int	file:
set_cache	arch/sparc/cpu/leon2/prom.c	/^static inline void set_cache(unsigned long regval)$/;"	f	typeref:typename:void	file:
set_cache	arch/sparc/cpu/leon3/prom.c	/^static inline void set_cache(unsigned long regval)$/;"	f	typeref:typename:void	file:
set_callback	common/env_callback.c	/^static int set_callback(const char *name, const char *value, void *priv)$/;"	f	typeref:typename:int	file:
set_cbar	arch/arm/mach-mvebu/cpu.c	/^static void set_cbar(u32 addr)$/;"	f	typeref:typename:void	file:
set_chip_gpio_configuration	board/amcc/bamboo/bamboo.c	/^void set_chip_gpio_configuration(unsigned char gpio_core, gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
set_chipselect_size	arch/arm/imx-common/cpu.c	/^void set_chipselect_size(int const cs_size)$/;"	f	typeref:typename:void
set_classic_theme	scripts/kconfig/lxdialog/util.c	/^static void set_classic_theme(void)$/;"	f	typeref:typename:void	file:
set_clk_enet	arch/arm/cpu/armv7/mx7/clock.c	/^int set_clk_enet(enum enet_freq type)$/;"	f	typeref:typename:int
set_clk_nand	arch/arm/cpu/armv7/mx7/clock.c	/^int set_clk_nand(void)$/;"	f	typeref:typename:int
set_clk_qspi	arch/arm/cpu/armv7/mx7/clock.c	/^int set_clk_qspi(void)$/;"	f	typeref:typename:int
set_clock	board/inversepath/usbarmory/usbarmory.c	/^static void set_clock(void)$/;"	f	typeref:typename:void	file:
set_clock	include/sdhci.h	/^	void (*set_clock)(int dev_index, unsigned int div);$/;"	m	struct:sdhci_host	typeref:typename:void (*)(int dev_index,unsigned int div)
set_clocks_in_mhz	arch/m68k/lib/bootm.c	/^static void set_clocks_in_mhz (bd_t *kbd)$/;"	f	typeref:typename:void	file:
set_clocks_in_mhz	arch/powerpc/lib/bootm.c	/^static void set_clocks_in_mhz (bd_t *kbd)$/;"	f	typeref:typename:void	file:
set_cluster	fs/fat/fat_write.c	/^set_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer,$/;"	f	typeref:typename:int	file:
set_colors	scripts/kconfig/nconf.gui.c	/^void set_colors()$/;"	f	typeref:typename:void
set_command_address	drivers/mtd/nand/pxa3xx_nand.c	/^static void set_command_address(struct pxa3xx_nand_info *info,$/;"	f	typeref:typename:void	file:
set_config	drivers/gpio/tegra_gpio.c	/^static void set_config(unsigned gpio, int type)$/;"	f	typeref:typename:void	file:
set_config	drivers/usb/gadget/composite.c	/^static int set_config(struct usb_composite_dev *cdev,$/;"	f	typeref:typename:int	file:
set_config	include/pwm.h	/^	int (*set_config)(struct udevice *dev, uint channel, uint period_ns,$/;"	m	struct:pwm_ops	typeref:typename:int (*)(struct udevice * dev,uint channel,uint period_ns,uint duty_ns)
set_config_field	drivers/memory/ti-aemif.c	/^#define set_config_field(/;"	d	file:
set_config_filename	scripts/kconfig/mconf.c	/^static void set_config_filename(const char *config_filename)$/;"	f	typeref:typename:void	file:
set_config_filename	scripts/kconfig/nconf.c	/^static const char *set_config_filename(const char *config_filename)$/;"	f	typeref:typename:const char *	file:
set_contents	fs/fat/fat_write.c	/^set_contents(fsdata *mydata, dir_entry *dentptr, __u8 *buffer,$/;"	f	typeref:typename:int	file:
set_control_reg	include/sdhci.h	/^	void (*set_control_reg)(struct sdhci_host *host);$/;"	m	struct:sdhci_host	typeref:typename:void (*)(struct sdhci_host * host)
set_cpu_clk_info	arch/arm/cpu/armv8/zynqmp/clk.c	/^int set_cpu_clk_info(void)$/;"	f	typeref:typename:int
set_cpu_clk_info	arch/arm/mach-davinci/cpu.c	/^int set_cpu_clk_info(void)$/;"	f	typeref:typename:int
set_cpu_clk_info	arch/arm/mach-socfpga/clock_manager.c	/^int set_cpu_clk_info(void)$/;"	f	typeref:typename:int
set_cpu_clk_info	arch/arm/mach-zynq/clk.c	/^int set_cpu_clk_info(void)$/;"	f	typeref:typename:int
set_cpu_running	arch/arm/mach-tegra/tegra30/cpu.c	/^static void set_cpu_running(int run)$/;"	f	typeref:typename:void	file:
set_cr	arch/arm/include/asm/system.h	/^static inline void set_cr(unsigned int val)$/;"	f	typeref:typename:void
set_cs_bounds	board/tqc/tqm834x/tqm834x.c	/^static void set_cs_bounds(short cs, ulong base, ulong size)$/;"	f	typeref:typename:void	file:
set_cs_config	board/tqc/tqm834x/tqm834x.c	/^static void set_cs_config(short cs, long config)$/;"	f	typeref:typename:void	file:
set_csn_config	drivers/ddr/fsl/ctrl_regs.c	/^static void set_csn_config(int dimm_number, int i, fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_csn_config_2	drivers/ddr/fsl/ctrl_regs.c	/^static void set_csn_config_2(int i, fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
set_current	include/power/regulator.h	/^	int (*set_current)(struct udevice *dev, int uA);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev,int uA)
set_current_state	include/linux/compat.h	/^#define set_current_state(/;"	d
set_cwd	common/cli_hush.c	/^static const char *set_cwd(void)$/;"	f	typeref:typename:const char *	file:
set_dacr	arch/arm/include/asm/system.h	/^static inline void set_dacr(unsigned int val)$/;"	f	typeref:typename:void
set_data	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int set_data;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
set_dataimage_preset	board/compulab/common/omap3_display.c	/^static enum display_type set_dataimage_preset(const struct panel_config preset,$/;"	f	typeref:enum:display_type	file:
set_date	board/freescale/common/sys_eeprom.c	/^static void set_date(const char *string)$/;"	f	typeref:typename:void	file:
set_date	board/varisys/common/sys_eeprom.c	/^static void set_date(const char *string)$/;"	f	typeref:typename:void	file:
set_dcd_param	tools/imximage.c	/^static set_dcd_param_t set_dcd_param;$/;"	v	typeref:typename:set_dcd_param_t	file:
set_dcd_param_t	tools/imximage.h	/^typedef void (*set_dcd_param_t)(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	t	typeref:typename:void (*)(struct imx_header * imxhdr,uint32_t dcd_len,int32_t cmd)
set_dcd_param_v2	tools/imximage.c	/^static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	f	typeref:typename:void	file:
set_dcd_rst	tools/imximage.c	/^static set_dcd_rst_t set_dcd_rst;$/;"	v	typeref:typename:set_dcd_rst_t	file:
set_dcd_rst_t	tools/imximage.h	/^typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,$/;"	t	typeref:typename:void (*)(struct imx_header * imxhdr,uint32_t dcd_len,char * name,int lineno)
set_dcd_rst_v1	tools/imximage.c	/^static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	f	typeref:typename:void	file:
set_dcd_rst_v2	tools/imximage.c	/^static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	f	typeref:typename:void	file:
set_dcd_val	tools/imximage.c	/^static set_dcd_val_t set_dcd_val;$/;"	v	typeref:typename:set_dcd_val_t	file:
set_dcd_val_t	tools/imximage.h	/^typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,$/;"	t	typeref:typename:void (*)(struct imx_header * imxhdr,char * name,int lineno,int fld,uint32_t value,uint32_t off)
set_dcd_val_v1	tools/imximage.c	/^static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,$/;"	f	typeref:typename:void	file:
set_dcd_val_v2	tools/imximage.c	/^static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,$/;"	f	typeref:typename:void	file:
set_dcr	arch/powerpc/cpu/ppc4xx/dcr.S	/^set_dcr:$/;"	l
set_ddr_cdr1	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_cdr1(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts)$/;"	f	typeref:typename:void	file:
set_ddr_cdr2	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_cdr2(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts)$/;"	f	typeref:typename:void	file:
set_ddr_clk_period	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void set_ddr_clk_period(u32 freq)$/;"	f	typeref:typename:void	file:
set_ddr_config	board/tqc/tqm834x/tqm834x.c	/^static void set_ddr_config(void) {$/;"	f	typeref:typename:void	file:
set_ddr_data_init	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_data_init(fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
set_ddr_dq_mapping	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_ddr_eor	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_eor(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts)$/;"	f	typeref:typename:void	file:
set_ddr_init_addr	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_init_addr(fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
set_ddr_init_complete	arch/x86/cpu/quark/smc.c	/^void set_ddr_init_complete(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
set_ddr_init_ext_addr	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_init_ext_addr(fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
set_ddr_laws	arch/powerpc/cpu/mpc83xx/law.c	/^int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)$/;"	f	typeref:typename:int
set_ddr_laws	arch/powerpc/cpu/mpc8xxx/law.c	/^int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)$/;"	f	typeref:typename:int
set_ddr_sdram_cfg	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_cfg_2	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_cfg_3	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_cfg_3(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_clk_cntl	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_interval	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_interval(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_mode	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_mode(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_mode_10	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_mode_10(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_mode_2	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_mode_2(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_mode_9	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_ddr_sdram_rcw	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sdram_rcw(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_ddr_sr_cntr	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_sr_cntr(fsl_ddr_cfg_regs_t *ddr, unsigned int sr_it)$/;"	f	typeref:typename:void	file:
set_ddr_wrlvl_cntl	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_wrlvl_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int wrlvl_en,$/;"	f	typeref:typename:void	file:
set_ddr_zq_cntl	drivers/ddr/fsl/ctrl_regs.c	/^static void set_ddr_zq_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int zq_en)$/;"	f	typeref:typename:void	file:
set_dec	arch/powerpc/lib/interrupts.c	/^static __inline__ void set_dec (unsigned long val)$/;"	f	typeref:typename:void	file:
set_default_ddr3_timings	board/siemens/draco/board.c	/^static void set_default_ddr3_timings(void)$/;"	f	typeref:typename:void	file:
set_default_env	common/env_common.c	/^void set_default_env(const char *s)$/;"	f	typeref:typename:void
set_default_vars	common/env_common.c	/^int set_default_vars(int nvars, char * const vars[])$/;"	f	typeref:typename:int
set_dev	cmd/nand.c	/^static int set_dev(int dev)$/;"	f	typeref:typename:int	file:
set_devadd	drivers/usb/host/r8a66597-hcd.c	/^static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,$/;"	f	typeref:typename:void	file:
set_devices_ns_access	board/freescale/common/ns_access.c	/^void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)$/;"	f	typeref:typename:void
set_dfu_alt_info	board/samsung/common/misc.c	/^void set_dfu_alt_info(char *interface, char *devstr)$/;"	f	typeref:typename:void
set_dialog_backtitle	scripts/kconfig/lxdialog/util.c	/^void set_dialog_backtitle(const char *backtitle)$/;"	f	typeref:typename:void
set_dialog_subtitles	scripts/kconfig/lxdialog/util.c	/^void set_dialog_subtitles(struct subtitle_list *subtitles)$/;"	f	typeref:typename:void
set_direction	drivers/gpio/tegra_gpio.c	/^static void set_direction(unsigned gpio, int output)$/;"	f	typeref:typename:void	file:
set_domain	arch/arm/include/asm/proc-armv/domain.h	/^#define set_domain(/;"	d
set_dram_access	drivers/net/mvgbe.c	/^static void set_dram_access(struct mvgbe_registers *regs)$/;"	f	typeref:typename:void	file:
set_dvi_preset	board/compulab/common/omap3_display.c	/^static enum display_type set_dvi_preset(const struct panel_config preset,$/;"	f	typeref:enum:display_type	file:
set_eere_bit	drivers/rtc/rv3029.c	/^static void set_eere_bit(int state)$/;"	f	typeref:typename:void	file:
set_em100_mode	tools/ifdtool.c	/^static void set_em100_mode(char *image, int size)$/;"	f	typeref:typename:void	file:
set_enable	include/power/regulator.h	/^	int (*set_enable)(struct udevice *dev, bool enable);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev,bool enable)
set_enable	include/pwm.h	/^	int (*set_enable)(struct udevice *dev, uint channel, bool enable);$/;"	m	struct:pwm_ops	typeref:typename:int (*)(struct udevice * dev,uint channel,bool enable)
set_energy_perf_bias	arch/x86/cpu/broadwell/cpu.c	/^static void set_energy_perf_bias(u8 policy)$/;"	f	typeref:typename:void	file:
set_energy_perf_bias	arch/x86/cpu/ivybridge/model_206ax.c	/^static void set_energy_perf_bias(u8 policy)$/;"	f	typeref:typename:void	file:
set_entry	common/edid.c	/^static void set_entry(struct timing_entry *entry, u32 value)$/;"	f	typeref:typename:void	file:
set_env_gpios	board/siemens/common/board.c	/^void set_env_gpios(unsigned char state)$/;"	f	typeref:typename:void
set_epll_clk	arch/arm/mach-exynos/clock.c	/^int set_epll_clk(unsigned long rate)$/;"	f	typeref:typename:int
set_epll_con_val	arch/arm/mach-exynos/include/mach/clock.h	/^struct set_epll_con_val {$/;"	s
set_ethaddr_from_eeprom	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^static int set_ethaddr_from_eeprom(void)$/;"	f	typeref:typename:int	file:
set_ethaddr_from_nvtboot	arch/arm/mach-tegra/tegra186/nvtboot_board.c	/^static int set_ethaddr_from_nvtboot(void)$/;"	f	typeref:typename:int	file:
set_ether_config	drivers/usb/gadget/ether.c	/^set_ether_config(struct eth_dev *dev, gfp_t gfp_flags)$/;"	f	typeref:typename:int	file:
set_evpr	arch/powerpc/cpu/ppc4xx/interrupts.c	/^static __inline__ void set_evpr(unsigned long val)$/;"	f	typeref:typename:void	file:
set_exception_table_evt	arch/sh/include/asm/system.h	/^static inline void *set_exception_table_evt(unsigned int evt, void *handler)$/;"	f	typeref:typename:void *
set_failing_group_stage	drivers/ddr/altera/sequencer.c	/^static void set_failing_group_stage(u32 group, u32 stage,$/;"	f	typeref:typename:void	file:
set_falling	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int set_falling;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
set_fatent_value	fs/fat/fat_write.c	/^static int set_fatent_value(fsdata *mydata, __u32 entry, __u32 entry_value)$/;"	f	typeref:typename:int	file:
set_fdt	board/isee/igep00x0/igep00x0.c	/^void set_fdt(void)$/;"	f	typeref:typename:void
set_fdtfile	board/raspberrypi/rpi/rpi.c	/^static void set_fdtfile(void)$/;"	f	typeref:typename:void	file:
set_fec_duplex_speed	drivers/net/fsl_mcdmafec.c	/^static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd,$/;"	f	typeref:typename:void	file:
set_flags	common/env_flags.c	/^static int set_flags(const char *name, const char *value, void *priv)$/;"	f	typeref:typename:int	file:
set_flags	include/i2c.h	/^	int (*set_flags)(struct udevice *dev, uint flags);$/;"	m	struct:dm_i2c_ops	typeref:typename:int (*)(struct udevice * dev,uint flags)
set_flash_vpp	board/mpl/pati/pati.c	/^void set_flash_vpp(int ext_vpp, int ext_wp, int int_vpp)$/;"	f	typeref:typename:void
set_flex_ratio_to_tdp_nominal	arch/x86/cpu/ivybridge/cpu.c	/^static int set_flex_ratio_to_tdp_nominal(void)$/;"	f	typeref:typename:int	file:
set_fman_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void set_fman_liodn(struct fman_liodn_id_table *tbl, int size)$/;"	f	typeref:typename:void	file:
set_foot	common/dlmalloc.c	/^#define set_foot(/;"	d	file:
set_frame_annotation	include/fsl-mc/fsl_dpni.h	/^	int			set_frame_annotation;$/;"	m	struct:dpni_error_cfg	typeref:typename:int
set_freezable	include/linux/compat.h	/^#define set_freezable(/;"	d
set_gadget_data	include/linux/usb/gadget.h	/^static inline void set_gadget_data(struct usb_gadget *gadget, void *data)$/;"	f	typeref:typename:void
set_global_reset	arch/x86/cpu/ivybridge/early_me.c	/^static inline void set_global_reset(struct udevice *dev, int enable)$/;"	f	typeref:typename:void	file:
set_global_turbo_state	arch/x86/cpu/turbo.c	/^static inline void set_global_turbo_state(int state)$/;"	f	typeref:typename:void	file:
set_gpio	board/siemens/pxm2/board.c	/^static int set_gpio(int gpio, int state)$/;"	f	typeref:typename:int	file:
set_gpio	board/siemens/rut/board.c	/^static int set_gpio(int gpio, int state)$/;"	f	typeref:typename:int	file:
set_gpio_flag	drivers/gpio/sandbox.c	/^static int set_gpio_flag(struct udevice *dev, unsigned offset, int flag,$/;"	f	typeref:typename:int	file:
set_gpios	board/boundary/nitrogen6x/nitrogen6x.c	/^static void set_gpios(unsigned *p, int cnt, int val)$/;"	f	typeref:typename:void	file:
set_gpmc_cs0	arch/arm/cpu/armv7/omap-common/mem-common.c	/^void set_gpmc_cs0(int flash_type)$/;"	f	typeref:typename:void
set_gpr_register	board/aristainetos/aristainetos-v2.c	/^static void set_gpr_register(void)$/;"	f	typeref:typename:void	file:
set_gpt_info	cmd/gpt.c	/^static int set_gpt_info(struct blk_desc *dev_desc,$/;"	f	typeref:typename:int	file:
set_halt	include/linux/usb/gadget.h	/^	int (*set_halt) (struct usb_ep *ep, int value);$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep,int value)
set_hdr_func	tools/imximage.c	/^static void set_hdr_func(void)$/;"	f	typeref:typename:void	file:
set_head	common/dlmalloc.c	/^#define set_head(/;"	d	file:
set_head_size	common/dlmalloc.c	/^#define set_head_size(/;"	d	file:
set_header	tools/imagetool.h	/^	void (*set_header) (void *, struct stat *, int,$/;"	m	struct:image_type_params	typeref:typename:void (*)(void *,struct stat *,int,struct image_tool_params *)
set_hid0	include/mpc86xx.h	/^static __inline__ void set_hid0 (unsigned long hid0)$/;"	f	typeref:typename:void
set_hid1	include/mpc86xx.h	/^static __inline__ void set_hid1 (unsigned long hid1)$/;"	f	typeref:typename:void
set_hw_thermal_trip	arch/arm/mach-exynos/power.c	/^void set_hw_thermal_trip(void)$/;"	f	typeref:typename:void
set_i2c_bus_speed	drivers/i2c/fsl_i2c.c	/^static unsigned int set_i2c_bus_speed(const struct fsl_i2c_base *base,$/;"	f	typeref:typename:unsigned int	file:
set_i2c_bus_speed	drivers/i2c/fti2c010.c	/^static unsigned int set_i2c_bus_speed(struct fti2c010_chip *chip,$/;"	f	typeref:typename:unsigned int	file:
set_i2c_pin_mux	board/compulab/cm_t43/mux.c	/^void set_i2c_pin_mux(void)$/;"	f	typeref:typename:void
set_i2s_clk_prescaler	arch/arm/mach-exynos/clock.c	/^int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq,$/;"	f	typeref:typename:int
set_i2s_clk_source	arch/arm/mach-exynos/clock.c	/^int set_i2s_clk_source(unsigned int i2s_id)$/;"	f	typeref:typename:int
set_icmp_header	net/ping.c	/^static void set_icmp_header(uchar *pkt, struct in_addr dest)$/;"	f	typeref:typename:void	file:
set_if_mode	drivers/net/fm/fm.h	/^	void (*set_if_mode)(struct fsl_enet_mac *mac, phy_interface_t type,$/;"	m	struct:fsl_enet_mac	typeref:typename:void (*)(struct fsl_enet_mac * mac,phy_interface_t type,int speed)
set_ifc_amask	include/fsl_ifc.h	/^#define set_ifc_amask(/;"	d
set_ifc_csor	include/fsl_ifc.h	/^#define set_ifc_csor(/;"	d
set_ifc_csor_ext	include/fsl_ifc.h	/^#define set_ifc_csor_ext(/;"	d
set_ifc_cspr	include/fsl_ifc.h	/^#define set_ifc_cspr(/;"	d
set_ifc_cspr_ext	include/fsl_ifc.h	/^#define set_ifc_cspr_ext(/;"	d
set_ifc_ftim	include/fsl_ifc.h	/^#define set_ifc_ftim(/;"	d
set_imx_hdr	tools/imximage.c	/^static set_imx_hdr_t set_imx_hdr;$/;"	v	typeref:typename:set_imx_hdr_t	file:
set_imx_hdr_t	tools/imximage.h	/^typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	t	typeref:typename:void (*)(struct imx_header * imxhdr,uint32_t dcd_len,uint32_t entry_point,uint32_t flash_offset)
set_imx_hdr_v1	tools/imximage.c	/^static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	f	typeref:typename:void	file:
set_imx_hdr_v2	tools/imximage.c	/^static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,$/;"	f	typeref:typename:void	file:
set_inbound_window	drivers/pci/fsl_pci_init.c	/^static void set_inbound_window(volatile pit_t *pi,$/;"	f	typeref:typename:void	file:
set_interrupt_handler	arch/avr32/cpu/interrupts.c	/^static int set_interrupt_handler(unsigned int nr, void (*handler)(void),$/;"	f	typeref:typename:int	file:
set_inuse	common/dlmalloc.c	/^#define set_inuse(/;"	d	file:
set_inuse_bit_at_offset	common/dlmalloc.c	/^#define set_inuse_bit_at_offset(/;"	d	file:
set_io_port_base	arch/mips/include/asm/io.h	/^static inline void set_io_port_base(unsigned long base)$/;"	f	typeref:typename:void
set_ios	include/mmc.h	/^	int (*set_ios)(struct udevice *dev);$/;"	m	struct:dm_mmc_ops	typeref:typename:int (*)(struct udevice * dev)
set_ios	include/mmc.h	/^	void (*set_ios)(struct mmc *mmc);$/;"	m	struct:mmc_ops	typeref:typename:void (*)(struct mmc * mmc)
set_isa16_mode	arch/mips/include/asm/mipsregs.h	/^#define set_isa16_mode(/;"	d
set_ivb	arch/nds32/cpu/n1213/start.S	/^set_ivb:$/;"	l
set_jump_as_return	drivers/ddr/altera/sequencer.c	/^static void set_jump_as_return(void)$/;"	f	typeref:typename:void	file:
set_jump_offset	lib/slre.c	/^set_jump_offset(struct slre *r, int pc, int offset)$/;"	f	typeref:typename:void	file:
set_kerm_bin_mode	cmd/load.c	/^static void set_kerm_bin_mode(unsigned long *addr)$/;"	f	typeref:typename:void	file:
set_km_env	board/keymile/common/common.c	/^int set_km_env(void)$/;"	f	typeref:typename:int
set_label	arch/blackfin/cpu/gpio.c	/^#define set_label(/;"	d	file:
set_label	arch/blackfin/cpu/gpio.c	/^static void set_label(unsigned short ident, const char *label)$/;"	f	typeref:typename:void	file:
set_label	drivers/gpio/adi_gpio2.c	/^static void set_label(unsigned short ident, const char *label)$/;"	f	typeref:typename:void	file:
set_last_law	arch/powerpc/cpu/mpc8xxx/law.c	/^int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)$/;"	f	typeref:typename:int
set_law	arch/powerpc/cpu/mpc8xxx/law.c	/^void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)$/;"	f	typeref:typename:void
set_law_base_addr	arch/powerpc/cpu/mpc8xxx/law.c	/^static inline void set_law_base_addr(int idx, phys_addr_t addr)$/;"	f	typeref:typename:void	file:
set_lbc_br	arch/powerpc/include/asm/fsl_lbc.h	/^#define set_lbc_br(/;"	d
set_lbc_or	arch/powerpc/include/asm/fsl_lbc.h	/^#define set_lbc_or(/;"	d
set_lbmap	board/freescale/common/qixis.c	/^static void __maybe_unused set_lbmap(int lbmap)$/;"	f	typeref:typename:void __maybe_unused	file:
set_lcd_brightness	board/pdm360ng/pdm360ng.c	/^static int set_lcd_brightness(char *brightness)$/;"	f	typeref:typename:int	file:
set_lcd_clk	arch/arm/mach-exynos/clock.c	/^void set_lcd_clk(void)$/;"	f	typeref:typename:void
set_ldo_voltage	arch/arm/cpu/armv7/mx6/soc.c	/^static int set_ldo_voltage(enum ldo_reg ldo, u32 mv)$/;"	f	typeref:typename:int	file:
set_led	board/buffalo/lsxl/lsxl.c	/^static void set_led(int state)$/;"	f	typeref:typename:void	file:
set_leds	board/Seagate/dockstar/dockstar.c	/^static void set_leds(u32 leds, u32 blinking)$/;"	f	typeref:typename:void	file:
set_leds	board/Seagate/goflexhome/goflexhome.c	/^static void set_leds(u32 leds, u32 blinking)$/;"	f	typeref:typename:void	file:
set_level	drivers/gpio/tegra_gpio.c	/^static void set_level(unsigned gpio, int high)$/;"	f	typeref:typename:void	file:
set_light	drivers/demo/demo-shape.c	/^static int set_light(struct udevice *dev, int light)$/;"	f	typeref:typename:int	file:
set_light	include/dm-demo.h	/^	int (*set_light)(struct udevice *dev, int light);$/;"	m	struct:demo_ops	typeref:typename:int (*)(struct udevice * dev,int light)
set_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void set_liodn(struct liodn_id_table *tbl, int size)$/;"	f	typeref:typename:void	file:
set_liodns	arch/powerpc/cpu/mpc85xx/liodn.c	/^void set_liodns(void)$/;"	f	typeref:typename:void
set_local_var	common/cli_hush.c	/^int set_local_var(const char *s, int flg_export)$/;"	f	typeref:typename:int
set_lpmode_selfrefresh	arch/arm/cpu/armv7/omap-common/emif-common.c	/^void set_lpmode_selfrefresh(u32 base)$/;"	f	typeref:typename:void
set_ltab	fs/ubifs/lpt.c	/^static void set_ltab(struct ubifs_info *c, int lnum, int free, int dirty)$/;"	f	typeref:typename:void	file:
set_mac_addr	drivers/net/bcm-sf2-eth.h	/^	int (*set_mac_addr)(unsigned char *mac);$/;"	m	struct:eth_info	typeref:typename:int (*)(unsigned char * mac)
set_mac_addr	drivers/net/fm/fm.h	/^	void (*set_mac_addr)(struct fsl_enet_mac *mac, u8 *mac_addr);$/;"	m	struct:fsl_enet_mac	typeref:typename:void (*)(struct fsl_enet_mac * mac,u8 * mac_addr)
set_mac_addr	drivers/net/uli526x.c	/^static void set_mac_addr(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
set_mac_address	board/freescale/common/sys_eeprom.c	/^static void set_mac_address(unsigned int index, const char *string)$/;"	f	typeref:typename:void	file:
set_mac_address	board/varisys/common/sys_eeprom.c	/^static void set_mac_address(unsigned int index, const char *string)$/;"	f	typeref:typename:void	file:
set_mac_speed	drivers/net/bcm-sf2-eth.h	/^	int (*set_mac_speed)(int speed, int duplex);$/;"	m	struct:eth_info	typeref:typename:int (*)(int speed,int duplex)
set_mac_to_sh_eth_register	board/renesas/sh7757lcr/sh7757lcr.c	/^static void set_mac_to_sh_eth_register(int channel, char *mac_string)$/;"	f	typeref:typename:void	file:
set_mac_to_sh_giga_eth_register	board/renesas/sh7752evb/sh7752evb.c	/^static void set_mac_to_sh_giga_eth_register(int channel, char *mac_string)$/;"	f	typeref:typename:void	file:
set_mac_to_sh_giga_eth_register	board/renesas/sh7753evb/sh7753evb.c	/^static void set_mac_to_sh_giga_eth_register(int channel, char *mac_string)$/;"	f	typeref:typename:void	file:
set_mac_to_sh_giga_eth_register	board/renesas/sh7757lcr/sh7757lcr.c	/^static void set_mac_to_sh_giga_eth_register(int channel, char *mac_string)$/;"	f	typeref:typename:void	file:
set_master_priority	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^static void set_master_priority(void)$/;"	f	typeref:typename:void	file:
set_max_freq	arch/x86/cpu/baytrail/cpu.c	/^static void set_max_freq(void)$/;"	f	typeref:typename:void	file:
set_max_freq	arch/x86/cpu/broadwell/cpu.c	/^void set_max_freq(void)$/;"	f	typeref:typename:void
set_max_pktsize	drivers/usb/gadget/dwc2_udc_otg.c	/^static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)$/;"	f	typeref:typename:void	file:
set_max_ratio	arch/x86/cpu/broadwell/cpu.c	/^static void set_max_ratio(void)$/;"	f	typeref:typename:void	file:
set_max_ratio	arch/x86/cpu/ivybridge/model_206ax.c	/^static void set_max_ratio(void)$/;"	f	typeref:typename:void	file:
set_mb	arch/blackfin/include/asm/system.h	/^#define set_mb(/;"	d
set_mb	arch/microblaze/include/asm/system.h	/^#define set_mb(/;"	d
set_mb	arch/mips/include/asm/system.h	/^#define set_mb(/;"	d
set_mb	arch/sh/include/asm/system.h	/^#define set_mb(/;"	d
set_mcopt1_mchk	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static force_inline void set_mcopt1_mchk(u32 bits)$/;"	f	typeref:typename:force_inline void	file:
set_mcsr	arch/powerpc/include/asm/ppc4xx.h	/^static inline void set_mcsr(u32 val)$/;"	f	typeref:typename:void
set_mdc	include/miiphy.h	/^	int (*set_mdc)(struct bb_miiphy_bus *bus, int v);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus,int v)
set_mdio	include/miiphy.h	/^	int (*set_mdio)(struct bb_miiphy_bus *bus, int v);$/;"	m	struct:bb_miiphy_bus	typeref:typename:int (*)(struct bb_miiphy_bus * bus,int v)
set_mdio_pin_mux	board/compulab/cm_t43/mux.c	/^void set_mdio_pin_mux(void)$/;"	f	typeref:typename:void
set_mipi_clk	arch/arm/mach-exynos/clock.c	/^void set_mipi_clk(void)$/;"	f	typeref:typename:void
set_mipi_phy_ctrl	arch/arm/mach-exynos/power.c	/^void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)$/;"	f	typeref:typename:void
set_mmc_clk	arch/arm/mach-exynos/clock.c	/^void set_mmc_clk(int dev_index, unsigned int div)$/;"	f	typeref:typename:void
set_mmc_clk	arch/arm/mach-s5pc1xx/clock.c	/^void set_mmc_clk(int dev_index, unsigned int div)$/;"	f	typeref:typename:void
set_mode	arch/arm/cpu/arm1136/mx35/mx35_sdram.c	/^#define set_mode(/;"	d	file:
set_mode	drivers/usb/musb-new/musb_core.h	/^	int	(*set_mode)(struct musb *musb, u8 mode);$/;"	m	struct:musb_platform_ops	typeref:typename:int (*)(struct musb * musb,u8 mode)
set_mode	include/power/regulator.h	/^	int (*set_mode)(struct udevice *dev, int mode_id);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev,int mode_id)
set_mode	include/spi.h	/^	int (*set_mode)(struct udevice *bus, uint mode);$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * bus,uint mode)
set_mode_timing	drivers/block/ftide020.c	/^static unsigned int set_mode_timing(u8 dev, u8 id, u8 mode)$/;"	f	typeref:typename:unsigned int	file:
set_mono_theme	scripts/kconfig/lxdialog/util.c	/^static void set_mono_theme(void)$/;"	f	typeref:typename:void	file:
set_move_tgt_here	drivers/crypto/fsl/desc_constr.h	/^static inline void set_move_tgt_here(u32 *desc, u32 *move_cmd)$/;"	f	typeref:typename:void
set_mpu_spreadspectrum	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^void set_mpu_spreadspectrum(int permille)$/;"	f	typeref:typename:void
set_mr	arch/arm/cpu/armv7/am33xx/ddr.c	/^static inline void set_mr(int nr, u32 cs, u32 mr_addr, u32 mr_val)$/;"	f	typeref:typename:void	file:
set_mr	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static inline void set_mr(u32 base, u32 cs, u32 mr_addr, u32 mr_val)$/;"	f	typeref:typename:void	file:
set_msr	arch/powerpc/cpu/mpc8xx/speed.c	/^static __inline__ void set_msr(unsigned long msr)$/;"	f	typeref:typename:void	file:
set_msr	arch/powerpc/lib/interrupts.c	/^static __inline__ void set_msr (unsigned long msr)$/;"	f	typeref:typename:void	file:
set_msr	arch/powerpc/lib/kgdb.c	/^set_msr(unsigned long msr)$/;"	f	typeref:typename:void	file:
set_msr	examples/standalone/timer.c	/^static __inline__ void set_msr(unsigned long msr)$/;"	f	typeref:typename:void	file:
set_mux_conf_regs	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^static void set_mux_conf_regs(void)$/;"	f	typeref:typename:void	file:
set_mux_conf_regs	board/BuR/common/common.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/birdland/bav335x/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/bosch/shc/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/compulab/cm_t335/mux.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/compulab/cm_t43/mux.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/gumstix/pepper/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/isee/igep0033/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/phytec/pcm051/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/siemens/common/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/silica/pengwyn/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/tcl/sl50/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/ti/am335x/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/ti/am43xx/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/ti/ti814x/evm.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/ti/ti816x/evm.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_conf_regs	board/vscom/baltos/board.c	/^void set_mux_conf_regs(void)$/;"	f	typeref:typename:void
set_mux_to_diu	board/freescale/p1022ds/diu.c	/^static void set_mux_to_diu(void)$/;"	f	typeref:typename:void	file:
set_mux_to_lbc	board/freescale/p1022ds/diu.c	/^static int set_mux_to_lbc(void)$/;"	f	typeref:typename:int	file:
set_muxconf_regs	board/8dtech/eco5pk/eco5pk.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/amazon/kc1/kc1.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/compulab/cm_t35/cm_t35.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/compulab/cm_t3517/mux.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/compulab/cm_t54/cm_t54.c	/^inline void set_muxconf_regs(void){};$/;"	f	typeref:typename:void
set_muxconf_regs	board/compulab/cm_t54/mux.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/corscience/tricorder/tricorder.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/gumstix/duovero/duovero.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/htkw/mcx/mcx.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/isee/igep00x0/igep00x0.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/lg/sniper/sniper.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/logicpd/am3517evm/am3517evm.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/logicpd/omap3som/omap3logic.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/logicpd/zoom1/zoom1.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/nokia/rx51/rx51.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/overo/common.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/pandora/pandora.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/quipos/cairo/cairo.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/technexion/tao3530/tao3530.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/technexion/twister/twister.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/teejet/mt_ventoux/mt_ventoux.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/am3517crane/am3517crane.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/am57xx/board.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/beagle/beagle.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/dra7xx/evm.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/evm/evm.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/omap5_uevm/evm.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/panda/panda.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/ti/sdp4430/sdp.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_muxconf_regs	board/timll/devkit8000/devkit8000.c	/^void set_muxconf_regs(void)$/;"	f	typeref:typename:void
set_name	fs/fat/fat_write.c	/^static void set_name(dir_entry *dirent, const char *filename)$/;"	f	typeref:typename:void	file:
set_next_law	arch/powerpc/cpu/mpc8xxx/law.c	/^int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)$/;"	f	typeref:typename:int
set_nlink	fs/ubifs/super.c	/^void set_nlink(struct inode *inode, unsigned int nlink)$/;"	f	typeref:typename:void
set_node	scripts/kconfig/gconf.c	/^static void set_node(GtkTreeIter * node, struct menu *menu, gchar ** row)$/;"	f	typeref:typename:void	file:
set_node_dbginfo	drivers/core/devres.c	/^#define set_node_dbginfo(/;"	d	file:
set_node_dbginfo	drivers/core/devres.c	/^static void set_node_dbginfo(struct devres *dr, const char *name, size_t size)$/;"	f	typeref:typename:void	file:
set_normal_colors	scripts/kconfig/nconf.gui.c	/^static void set_normal_colors(void)$/;"	f	typeref:typename:void	file:
set_on	include/led.h	/^	int (*set_on)(struct udevice *dev, int on);$/;"	m	struct:led_ops	typeref:typename:int (*)(struct udevice * dev,int on)
set_one_region	arch/arm/cpu/armv8/cache_v8.c	/^static u64 set_one_region(u64 start, u64 size, u64 attrs, int level)$/;"	f	typeref:typename:u64	file:
set_open_drain	include/asm-generic/gpio.h	/^	int (*set_open_drain)(struct udevice *dev, unsigned offset, int value);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset,int value)
set_option_mode1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkRadioMenuItem" id="set_option_mode1">$/;"	i
set_option_mode2	scripts/kconfig/gconf.glade	/^		    <widget class="GtkRadioMenuItem" id="set_option_mode2">$/;"	i
set_option_mode3	scripts/kconfig/gconf.glade	/^		    <widget class="GtkRadioMenuItem" id="set_option_mode3">$/;"	i
set_otp_timing	cmd/otp.c	/^static void set_otp_timing(bool write)$/;"	f	typeref:typename:void	file:
set_output_gpio	board/pandora/pandora.c	/^static void set_output_gpio(unsigned int gpio, int value)$/;"	f	typeref:typename:void	file:
set_packet_mode	drivers/i2c/tegra_i2c.c	/^static void set_packet_mode(struct i2c_bus *i2c_bus)$/;"	f	typeref:typename:void	file:
set_pal	drivers/video/ati_radeon_fb.c	/^static void set_pal(void)$/;"	f	typeref:typename:void	file:
set_params	include/ec_commands.h	/^		struct lightbar_params set_params;$/;"	m	union:ec_params_lightbar::__anon71a6b267010a	typeref:struct:lightbar_params
set_params	include/ec_commands.h	/^		} off, on, init, brightness, seq, reg, rgb, demo, set_params;$/;"	m	union:ec_response_lightbar::__anon71a6b267030a	typeref:struct:ec_response_lightbar::__anon71a6b267030a::__anon71a6b2670508
set_parent	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int (*set_parent)(struct clk *c, struct clk *parent);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * c,struct clk * parent)
set_parent	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int (*set_parent) (struct clk *c, struct clk *parent);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * c,struct clk * parent)
set_parent	drivers/video/ipu.h	/^	int (*set_parent) (struct clk *, struct clk *);$/;"	m	struct:clk	typeref:typename:int (*)(struct clk *,struct clk *)
set_parity_flag	drivers/bios_emulator/x86emu/prim_ops.c	/^static void set_parity_flag(u32 res)$/;"	f	typeref:typename:void	file:
set_pc	arch/arm/mach-exynos/include/mach/system.h	/^#define set_pc(/;"	d
set_pcie_ns_access	board/freescale/common/ns_access.c	/^void set_pcie_ns_access(int pcie, u16 val)$/;"	f	typeref:typename:void
set_pcmcia_timing	arch/powerpc/lib/ide.c	/^static void set_pcmcia_timing(int pmode)$/;"	f	typeref:typename:void	file:
set_pgsection	arch/arm/cpu/armv7/ls102xa/cpu.c	/^static inline void set_pgsection(u32 *page_table, u32 index, u64 phy_addr,$/;"	f	typeref:typename:void	file:
set_pgtable	arch/arm/cpu/armv7/ls102xa/cpu.c	/^static inline void set_pgtable(u32 *page_table, u32 index, u32 phy_addr)$/;"	f	typeref:typename:void	file:
set_phy_configuration_through_fpga	board/amcc/bamboo/bamboo.c	/^void set_phy_configuration_through_fpga(zmii_config_t config)$/;"	f	typeref:typename:void
set_phy_power	arch/arm/include/asm/omap_musb.h	/^	void (*set_phy_power)(u8 on);$/;"	m	struct:omap_musb_board_data	typeref:typename:void (*)(u8 on)
set_phyreg	drivers/net/eepro100.c	/^static int set_phyreg (struct eth_device *dev, unsigned char addr,$/;"	f	typeref:typename:int	file:
set_pil	arch/sparc/include/asm/irq.h	/^static inline void set_pil(unsigned int level)$/;"	f	typeref:typename:void
set_pin	board/keymile/km82xx/km82xx.c	/^static void set_pin(int state, unsigned long mask, int port)$/;"	f	typeref:typename:void	file:
set_pit	arch/powerpc/cpu/ppc4xx/interrupts.c	/^static __inline__ void set_pit(unsigned long val)$/;"	f	typeref:typename:void	file:
set_pll	arch/arm/mach-exynos/exynos5_setup.h	/^#define set_pll(/;"	d
set_pmb_on_board_init	board/renesas/sh7752evb/sh7752evb.c	/^static void set_pmb_on_board_init(void)$/;"	f	typeref:typename:void	file:
set_pmb_on_board_init	board/renesas/sh7753evb/sh7753evb.c	/^static void set_pmb_on_board_init(void)$/;"	f	typeref:typename:void	file:
set_pmb_on_board_init	board/renesas/sh7757lcr/sh7757lcr.c	/^static void set_pmb_on_board_init(void)$/;"	f	typeref:typename:void	file:
set_pnode_lnum	fs/ubifs/lpt.c	/^static void set_pnode_lnum(const struct ubifs_info *c,$/;"	f	typeref:typename:void	file:
set_power	include/linux/usb/musb.h	/^	int		(*set_power)(int state);$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:int (*)(int state)
set_power	include/pwrseq.h	/^	int (*set_power)(struct udevice *dev, bool enable);$/;"	m	struct:pwrseq_ops	typeref:typename:int (*)(struct udevice * dev,bool enable)
set_power_limits	arch/x86/cpu/ivybridge/model_206ax.c	/^void set_power_limits(u8 power_limit_1_time)$/;"	f	typeref:typename:void
set_power_state	board/raspberrypi/rpi/rpi.c	/^	struct bcm2835_mbox_tag_set_power_state set_power_state;$/;"	m	struct:msg_set_power_state	typeref:struct:bcm2835_mbox_tag_set_power_state	file:
set_preclk_from_osc	arch/arm/cpu/armv7/mx6/soc.c	/^static void set_preclk_from_osc(void)$/;"	f	typeref:typename:void	file:
set_preset	board/compulab/common/omap3_display.c	/^static void set_preset(const struct panel_config preset, int x_res, int y_res)$/;"	f	typeref:typename:void	file:
set_print_undef_assign	tools/buildman/kconfiglib.py	/^    def set_print_undef_assign(self, print_undef_assign):$/;"	m	class:Config
set_print_warnings	tools/buildman/kconfiglib.py	/^    def set_print_warnings(self, print_warnings):$/;"	m	class:Config
set_protective_mbr	disk/part_efi.c	/^static int set_protective_mbr(struct blk_desc *dev_desc)$/;"	f	typeref:typename:int	file:
set_protocol_stall	drivers/usb/gadget/atmel_usba_udc.c	/^static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)$/;"	f	typeref:typename:void	file:
set_ps_hold_ctrl	arch/arm/mach-exynos/power.c	/^void set_ps_hold_ctrl(void)$/;"	f	typeref:typename:void
set_pte_table	arch/arm/cpu/armv8/cache_v8.c	/^static void set_pte_table(u64 *pte, u64 *table)$/;"	f	typeref:typename:void	file:
set_px_corepll	board/freescale/common/pixis.c	/^static int set_px_corepll(unsigned long corepll)$/;"	f	typeref:typename:int	file:
set_px_go	board/freescale/common/pixis.c	/^static void set_px_go(void)$/;"	f	typeref:typename:void	file:
set_px_go_with_watchdog	board/freescale/common/pixis.c	/^static void set_px_go_with_watchdog(void)$/;"	f	typeref:typename:void	file:
set_px_mpxpll	board/freescale/common/pixis.c	/^static int set_px_mpxpll(unsigned long mpxpll)$/;"	f	typeref:typename:int	file:
set_px_sysclk	board/freescale/common/pixis.c	/^static int set_px_sysclk(unsigned long sysclk)$/;"	f	typeref:typename:int	file:
set_quad_mode	drivers/mtd/spi/spi_flash.c	/^static int set_quad_mode(struct spi_flash *flash, u8 idcode0)$/;"	f	typeref:typename:int	file:
set_r5_halt_mode	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void set_r5_halt_mode(u8 halt, u8 mode)$/;"	f	typeref:typename:void	file:
set_r5_reset	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void set_r5_reset(u8 mode)$/;"	f	typeref:typename:void	file:
set_r5_start	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void set_r5_start(u8 high)$/;"	f	typeref:typename:void	file:
set_r5_tcm_mode	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void set_r5_tcm_mode(u8 mode)$/;"	f	typeref:typename:void	file:
set_rank_and_odt_mask	drivers/ddr/altera/sequencer.c	/^static void set_rank_and_odt_mask(const u32 rank, const u32 odt_mode)$/;"	f	typeref:typename:void	file:
set_rate	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int (*set_rate)(struct clk *c, unsigned long rate);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * c,unsigned long rate)
set_rate	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int (*set_rate) (struct clk *c, unsigned long rate);$/;"	m	struct:clk_ops	typeref:typename:int (*)(struct clk * c,unsigned long rate)
set_rate	arch/arm/mach-zynq/clk.c	/^	int (*set_rate)(struct clk *clk, unsigned long rate);$/;"	m	struct:zynq_clk_ops	typeref:typename:int (*)(struct clk * clk,unsigned long rate)	file:
set_rate	drivers/video/ipu.h	/^	int (*set_rate) (struct clk *, unsigned long);$/;"	m	struct:clk	typeref:typename:int (*)(struct clk *,unsigned long)
set_rate	include/clk-uclass.h	/^	ulong (*set_rate)(struct clk *clk, ulong rate);$/;"	m	struct:clk_ops	typeref:typename:ulong (*)(struct clk * clk,ulong rate)
set_rcvn	arch/x86/cpu/quark/mrc_util.c	/^void set_rcvn(uint8_t channel, uint8_t rank,$/;"	f	typeref:typename:void
set_rcw_src	board/freescale/common/qixis.c	/^static void __maybe_unused set_rcw_src(int rcw_src)$/;"	f	typeref:typename:void __maybe_unused	file:
set_rdqs	arch/x86/cpu/quark/mrc_util.c	/^void set_rdqs(uint8_t channel, uint8_t rank,$/;"	f	typeref:typename:void
set_registers	drivers/usb/eth/r8152.c	/^int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)$/;"	f	typeref:typename:int	file:
set_reqip	drivers/block/sata_mv.c	/^static void set_reqip(int port, int reqin)$/;"	f	typeref:typename:void	file:
set_resolution_params	board/compulab/common/omap3_display.c	/^static void set_resolution_params(int x, int y)$/;"	f	typeref:typename:void	file:
set_rgmii_pin_mux	board/compulab/cm_t43/mux.c	/^void set_rgmii_pin_mux(void)$/;"	f	typeref:typename:void
set_rising	arch/arm/mach-davinci/include/mach/gpio.h	/^	unsigned int set_rising;$/;"	m	struct:davinci_gpio	typeref:typename:unsigned int
set_rman_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void set_rman_liodn(struct liodn_id_table *tbl, int size)$/;"	f	typeref:typename:void	file:
set_rmb	arch/blackfin/include/asm/system.h	/^#define set_rmb(/;"	d
set_row	include/video_console.h	/^	int (*set_row)(struct udevice *dev, uint row, int clr);$/;"	m	struct:vidconsole_ops	typeref:typename:int (*)(struct udevice * dev,uint row,int clr)
set_rspop	drivers/block/sata_mv.c	/^static void set_rspop(int port, int reqin)$/;"	f	typeref:typename:void	file:
set_rx_mode	drivers/net/rtl8139.c	/^static void set_rx_mode(struct eth_device *dev) {$/;"	f	typeref:typename:void	file:
set_sb_blocksize	fs/reiserfs/reiserfs_private.h	/^#define set_sb_blocksize(/;"	d
set_sb_journal_block	fs/reiserfs/reiserfs_private.h	/^#define set_sb_journal_block(/;"	d
set_sb_version	fs/reiserfs/reiserfs_private.h	/^#define set_sb_version(/;"	d
set_scl	board/keymile/km82xx/km82xx.c	/^void set_scl(int state)$/;"	f	typeref:typename:void
set_scl	board/keymile/km_arm/km_arm.c	/^void set_scl(int state)$/;"	f	typeref:typename:void
set_scl	board/keymile/kmp204x/kmp204x.c	/^void set_scl(int state)$/;"	f	typeref:typename:void
set_sctlr	arch/arm/include/asm/system.h	/^static inline void set_sctlr(unsigned int val)$/;"	f	typeref:typename:void
set_sda	board/keymile/km82xx/km82xx.c	/^void set_sda(int state)$/;"	f	typeref:typename:void
set_sda	board/keymile/km_arm/km_arm.c	/^void set_sda(int state)$/;"	f	typeref:typename:void
set_sda	board/keymile/kmp204x/kmp204x.c	/^void set_sda(int state)$/;"	f	typeref:typename:void
set_sdram_timings	arch/arm/cpu/armv7/am33xx/ddr.c	/^void set_sdram_timings(const struct emif_regs *regs, int nr)$/;"	f	typeref:typename:void
set_sec_mon_state	drivers/misc/fsl_sec_mon.c	/^int set_sec_mon_state(u32 state)$/;"	f	typeref:typename:int
set_sec_mon_state_non_sec	drivers/misc/fsl_sec_mon.c	/^static int set_sec_mon_state_non_sec(void)$/;"	f	typeref:typename:int	file:
set_sec_mon_state_soft_fail	drivers/misc/fsl_sec_mon.c	/^static int set_sec_mon_state_soft_fail(void)$/;"	f	typeref:typename:int	file:
set_section_dcache	arch/arm/lib/cache-cp15.c	/^void set_section_dcache(int section, enum dcache_option option)$/;"	f	typeref:typename:void
set_seen	drivers/mtd/ubi/fastmap.c	/^static inline void set_seen(struct ubi_device *ubi, int pnum, int *seen)$/;"	f	typeref:typename:void	file:
set_selfpowered	include/linux/usb/gadget.h	/^	int	(*set_selfpowered) (struct usb_gadget *, int is_selfpowered);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *,int is_selfpowered)
set_serdes_refclk	board/freescale/common/idt8t49n222a_serdes_clk.c	/^int set_serdes_refclk(u8 idt_addr, u8 serdes_num,$/;"	f	typeref:typename:int
set_serial_number	board/raspberrypi/rpi/rpi.c	/^static void set_serial_number(void)$/;"	f	typeref:typename:void	file:
set_sgmii_phy	drivers/net/fm/init.c	/^void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,$/;"	f	typeref:typename:void
set_sh_linux_param	arch/sh/lib/bootm.c	/^static void set_sh_linux_param(unsigned long param_addr, unsigned long data)$/;"	f	typeref:typename:void	file:
set_speed	include/spi.h	/^	int (*set_speed)(struct udevice *bus, uint hz);$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * bus,uint hz)
set_spi_clk	arch/arm/mach-exynos/clock.c	/^int set_spi_clk(int periph_id, unsigned int rate)$/;"	f	typeref:typename:int
set_spi_frequency	tools/ifdtool.c	/^static void set_spi_frequency(char *image, int size, enum spi_frequency freq)$/;"	f	typeref:typename:void	file:
set_spi_protect	include/pch.h	/^	int (*set_spi_protect)(struct udevice *dev, bool protect);$/;"	m	struct:pch_ops	typeref:typename:int (*)(struct udevice * dev,bool protect)
set_spi_speed	arch/x86/cpu/broadwell/lpc.c	/^static void set_spi_speed(void)$/;"	f	typeref:typename:void	file:
set_spi_speed	arch/x86/cpu/ivybridge/lpc.c	/^static void set_spi_speed(void)$/;"	f	typeref:typename:void	file:
set_sr	arch/m68k/lib/interrupts.c	/^static __inline__ void set_sr (unsigned short sr)$/;"	f	typeref:typename:void	file:
set_srio_liodn	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void set_srio_liodn(struct srio_liodn_id_table *tbl, int size)$/;"	f	typeref:typename:void	file:
set_start_cluster	fs/fat/fat_write.c	/^static void set_start_cluster(const fsdata *mydata, dir_entry *dentptr,$/;"	f	typeref:typename:void	file:
set_state	include/dm/pinctrl.h	/^	int (*set_state)(struct udevice *dev, struct udevice *config);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,struct udevice * config)
set_state_simple	include/dm/pinctrl.h	/^	int (*set_state_simple)(struct udevice *dev, struct udevice *periph);$/;"	m	struct:pinctrl_ops	typeref:typename:int (*)(struct udevice * dev,struct udevice * periph)
set_subtitle	scripts/kconfig/mconf.c	/^static void set_subtitle(void)$/;"	f	typeref:typename:void	file:
set_sysctl	drivers/mmc/fsl_esdhc.c	/^static void set_sysctl(struct mmc *mmc, uint clock)$/;"	f	typeref:typename:void	file:
set_system_display_ctrl	arch/arm/mach-exynos/system.c	/^void set_system_display_ctrl(void)$/;"	f	typeref:typename:void
set_szp_flags_16	drivers/bios_emulator/x86emu/prim_ops.c	/^static void set_szp_flags_16(u16 res)$/;"	f	typeref:typename:void	file:
set_szp_flags_32	drivers/bios_emulator/x86emu/prim_ops.c	/^static void set_szp_flags_32(u32 res)$/;"	f	typeref:typename:void	file:
set_szp_flags_8	drivers/bios_emulator/x86emu/prim_ops.c	/^static void set_szp_flags_8(u8 res)$/;"	f	typeref:typename:void	file:
set_test	test/image/test-fit.py	/^def set_test(name):$/;"	f
set_theme	scripts/kconfig/lxdialog/util.c	/^static int set_theme(const char *theme)$/;"	f	typeref:typename:int	file:
set_timer	arch/nds32/cpu/n1213/ag101/timer.c	/^void set_timer(ulong t)$/;"	f	typeref:typename:void
set_timer	arch/openrisc/lib/timer.c	/^void set_timer(ulong t)$/;"	f	typeref:typename:void
set_timing	drivers/misc/mxc_ocotp.c	/^static void set_timing(struct ocotp_regs *regs)$/;"	f	typeref:typename:void	file:
set_timing_cfg_0	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_0(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_timing_cfg_1	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_1(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_timing_cfg_2	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_2(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_timing_cfg_3	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_3(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_timing_cfg_4	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr,$/;"	f	typeref:typename:void	file:
set_timing_cfg_5	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_5(fsl_ddr_cfg_regs_t *ddr, unsigned int cas_latency)$/;"	f	typeref:typename:void	file:
set_timing_cfg_6	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_6(fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
set_timing_cfg_7	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_7(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_timing_cfg_8	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_8(const unsigned int ctrl_num,$/;"	f	typeref:typename:void	file:
set_timing_cfg_9	drivers/ddr/fsl/ctrl_regs.c	/^static void set_timing_cfg_9(fsl_ddr_cfg_regs_t *ddr)$/;"	f	typeref:typename:void	file:
set_tlb	arch/powerpc/cpu/mpc85xx/tlb.c	/^void set_tlb(u8 tlb, u32 epn, u64 rpn,$/;"	f	typeref:typename:void
set_to_one	arch/x86/include/asm/me_common.h	/^	u32 set_to_one:1;$/;"	m	struct:me_uma	typeref:typename:u32:1
set_trip	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^		struct cmd_thermal_set_trip_request set_trip;$/;"	m	union:mrq_thermal_host_to_bpmp_request::__anonb38d4241070a	typeref:struct:cmd_thermal_set_trip_request
set_tsr	arch/powerpc/cpu/mpc85xx/traps.c	/^static __inline__ void set_tsr(unsigned long val)$/;"	f	typeref:typename:void	file:
set_ttbr_tcr_mair	arch/arm/include/asm/armv8/mmu.h	/^static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)$/;"	f	typeref:typename:void
set_txfifothresh	drivers/usb/host/ehci-fsl.c	/^static void set_txfifothresh(struct usb_ehci *ehci, u32 txfifo_thresh)$/;"	f	typeref:typename:void	file:
set_uart_mux_conf	board/BuR/common/common.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/birdland/bav335x/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/bosch/shc/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/compulab/cm_t335/mux.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/compulab/cm_t43/mux.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/gumstix/pepper/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/isee/igep0033/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/phytec/pcm051/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/siemens/common/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/silica/pengwyn/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/tcl/sl50/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/ti/am335x/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/ti/am43xx/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/ti/ti814x/evm.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_uart_mux_conf	board/ti/ti816x/evm.c	/^void set_uart_mux_conf(void) {}$/;"	f	typeref:typename:void
set_uart_mux_conf	board/vscom/baltos/board.c	/^void set_uart_mux_conf(void)$/;"	f	typeref:typename:void
set_udc_gadget_private_data	drivers/usb/gadget/dwc2_udc_otg.c	/^void set_udc_gadget_private_data(void *p)$/;"	f	typeref:typename:void
set_up_vbus	drivers/usb/host/ehci-tegra.c	/^static void set_up_vbus(struct fdt_usb *config, enum usb_init_type init)$/;"	f	typeref:typename:void	file:
set_update_marker	drivers/mtd/ubi/upd.c	/^static int set_update_marker(struct ubi_device *ubi, struct ubi_volume *vol)$/;"	f	typeref:typename:int	file:
set_usb_mode	drivers/usb/host/ehci.h	/^	void (*set_usb_mode)(struct ehci_ctrl *ctrl);$/;"	m	struct:ehci_ops	typeref:typename:void (*)(struct ehci_ctrl * ctrl)
set_usb_phy_clk	arch/arm/cpu/armv7/mx5/clock.c	/^void set_usb_phy_clk(void)$/;"	f	typeref:typename:void
set_usbdrd_phy_ctrl	arch/arm/mach-exynos/power.c	/^void set_usbdrd_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void
set_usbethaddr	board/raspberrypi/rpi/rpi.c	/^static void set_usbethaddr(void)$/;"	f	typeref:typename:void	file:
set_usbhost_mode	arch/arm/mach-exynos/system.c	/^void set_usbhost_mode(unsigned int mode)$/;"	f	typeref:typename:void
set_usbhost_phy_ctrl	arch/arm/mach-exynos/power.c	/^void set_usbhost_phy_ctrl(unsigned int enable)$/;"	f	typeref:typename:void
set_usboh3_clk	arch/arm/cpu/armv7/mx5/clock.c	/^void set_usboh3_clk(void)$/;"	f	typeref:typename:void
set_user_value	tools/buildman/kconfiglib.py	/^    def set_user_value(self, v):$/;"	m	class:Symbol
set_val	drivers/mmc/davinci_mmc.c	/^#define set_val(/;"	d	file:
set_value	include/asm-generic/gpio.h	/^	int (*set_value)(struct udevice *dev, unsigned offset, int value);$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,unsigned offset,int value)
set_value	include/power/regulator.h	/^	int (*set_value)(struct udevice *dev, int uV);$/;"	m	struct:dm_regulator_ops	typeref:typename:int (*)(struct udevice * dev,int uV)
set_var	test/py/tests/test_env.py	/^def set_var(state_test_env, var, value):$/;"	f
set_vbus	drivers/usb/musb-new/musb_core.h	/^	void	(*set_vbus)(struct musb *musb, int on);$/;"	m	struct:musb_platform_ops	typeref:typename:void (*)(struct musb * musb,int on)
set_vbus	include/linux/usb/musb.h	/^	int		(*set_vbus)(struct device *dev, int is_on);$/;"	m	struct:musb_hdrc_platform_data	typeref:typename:int (*)(struct device * dev,int is_on)
set_vector	arch/x86/cpu/interrupts.c	/^void set_vector(u8 intnum, void *routine)$/;"	f	typeref:typename:void
set_vga_bridge_bits	drivers/pci/pci-uclass.c	/^static void set_vga_bridge_bits(struct udevice *dev)$/;"	f	typeref:typename:void	file:
set_voltage	board/freescale/common/vid.c	/^static int set_voltage(int i2caddress, int vdd)$/;"	f	typeref:typename:int	file:
set_voltage	board/freescale/t4qds/t4240qds.c	/^static inline int set_voltage(u8 vid)$/;"	f	typeref:typename:int	file:
set_voltage	drivers/power/tps6586x.c	/^static int set_voltage(int reg, int data, int rate)$/;"	f	typeref:typename:int	file:
set_voltage_to_IR	board/freescale/common/vid.c	/^static int set_voltage_to_IR(int i2caddress, int vdd)$/;"	f	typeref:typename:int	file:
set_vref	arch/x86/cpu/quark/mrc_util.c	/^void set_vref(uint8_t channel, uint8_t byte_lane, uint32_t setting)$/;"	f	typeref:typename:void
set_wait_for_bits_clear	drivers/ddr/fsl/fsl_ddr_gen4.c	/^static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits)$/;"	f	typeref:typename:void	file:
set_wait_for_bits_clear	drivers/ddr/fsl/fsl_mmdc.c	/^static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits)$/;"	f	typeref:typename:void	file:
set_wclk	arch/x86/cpu/quark/mrc_util.c	/^void set_wclk(uint8_t channel, uint8_t rank, uint32_t pi_count)$/;"	f	typeref:typename:void
set_wcmd	arch/x86/cpu/quark/mrc_util.c	/^void set_wcmd(uint8_t channel, uint32_t pi_count)$/;"	f	typeref:typename:void
set_wctl	arch/x86/cpu/quark/mrc_util.c	/^void set_wctl(uint8_t channel, uint8_t rank, uint32_t pi_count)$/;"	f	typeref:typename:void
set_wdog_reset	arch/arm/cpu/armv7/mx7/soc.c	/^void set_wdog_reset(struct wdog_regs *wdog)$/;"	f	typeref:typename:void
set_wdq	arch/x86/cpu/quark/mrc_util.c	/^void set_wdq(uint8_t channel, uint8_t rank,$/;"	f	typeref:typename:void
set_wdqs	arch/x86/cpu/quark/mrc_util.c	/^void set_wdqs(uint8_t channel, uint8_t rank,$/;"	f	typeref:typename:void
set_wedge	include/linux/usb/gadget.h	/^	int (*set_wedge)(struct usb_ep *ep);$/;"	m	struct:usb_ep_ops	typeref:typename:int (*)(struct usb_ep * ep)
set_wmb	arch/blackfin/include/asm/system.h	/^#define set_wmb(/;"	d
set_wmb	arch/microblaze/include/asm/system.h	/^#define set_wmb(/;"	d
set_wmb	arch/mips/include/asm/system.h	/^#define set_wmb(/;"	d
set_wordlen	include/spi.h	/^	int (*set_wordlen)(struct udevice *dev, unsigned int wordlen);$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int wordlen)
set_working_fdt_addr	cmd/fdt.c	/^void set_working_fdt_addr(ulong addr)$/;"	f	typeref:typename:void
set_xclkout	arch/arm/mach-exynos/power.c	/^void set_xclkout(void)$/;"	f	typeref:typename:void
setacmd12err	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	setacmd12err;	\/* offset 50h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
setbit_and_wait_for_clear32	drivers/net/cpsw.c	/^static inline void setbit_and_wait_for_clear32(void *addr)$/;"	f	typeref:typename:void	file:
setbits	arch/arc/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/arm/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/m68k/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/nds32/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/nios2/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/powerpc/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/sh/include/asm/io.h	/^#define setbits(/;"	d
setbits	arch/x86/include/asm/io.h	/^#define setbits(/;"	d
setbits_8	arch/arc/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/arm/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/m68k/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/nds32/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/nios2/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/powerpc/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/sh/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_8	arch/x86/include/asm/io.h	/^#define setbits_8(/;"	d
setbits_be16	arch/arc/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/arm/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/m68k/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/nds32/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/nios2/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/powerpc/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/sh/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be16	arch/x86/include/asm/io.h	/^#define setbits_be16(/;"	d
setbits_be32	arch/arc/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/arm/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/m68k/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/nds32/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/nios2/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/powerpc/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/sh/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_be32	arch/x86/include/asm/io.h	/^#define setbits_be32(/;"	d
setbits_le16	arch/arc/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/arm/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/m68k/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/nds32/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/nios2/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/powerpc/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/sh/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le16	arch/x86/include/asm/io.h	/^#define setbits_le16(/;"	d
setbits_le32	arch/arc/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/arm/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/m68k/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/nds32/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/nios2/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/powerpc/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/sh/include/asm/io.h	/^#define setbits_le32(/;"	d
setbits_le32	arch/x86/include/asm/io.h	/^#define setbits_le32(/;"	d
setbrg	include/serial.h	/^	int (*setbrg)(struct udevice *dev, int baudrate);$/;"	m	struct:dm_serial_ops	typeref:typename:int (*)(struct udevice * dev,int baudrate)
setbrg	include/serial.h	/^	void	(*setbrg)(void);$/;"	m	struct:serial_device	typeref:typename:void (*)(void)
setcolreg	include/stdio_dev.h	/^	void (*setcolreg) (int, int, int, int);$/;"	m	struct:__anon77b06a0f0108	typeref:typename:void (*)(int,int,int,int)
setctxsp	examples/standalone/ppc_setjmp.S	/^setctxsp:$/;"	l
setdataout	arch/arm/include/asm/arch-omap3/omap.h	/^	unsigned int setdataout;	\/* 0x94 *\/$/;"	m	struct:gpio	typeref:typename:unsigned int
setdma_rx	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)$/;"	f	typeref:typename:int	file:
setdma_tx	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req)$/;"	f	typeref:typename:int	file:
setenv	cmd/nvedit.c	/^int setenv(const char *varname, const char *varvalue)$/;"	f	typeref:typename:int
setenv	include/dataflash.h	/^	unsigned char setenv;$/;"	m	struct:__anona98984760108	typeref:typename:unsigned char
setenv_addr	include/common.h	/^static inline int setenv_addr(const char *varname, const void *addr)$/;"	f	typeref:typename:int
setenv_hex	cmd/nvedit.c	/^int setenv_hex(const char *varname, ulong value)$/;"	f	typeref:typename:int
setenv_ulong	cmd/nvedit.c	/^int setenv_ulong(const char *varname, ulong value)$/;"	f	typeref:typename:int
setfreq	board/spear/common/spr_lowlevel_init.S	/^setfreq:$/;"	l
setfreq_sz	board/spear/common/spr_lowlevel_init.S	/^setfreq_sz:$/;"	l
setinterr	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	setinterr;	\/* offset 52h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
setio	arch/x86/include/asm/io.h	/^#define setio(/;"	d
setio_16	arch/x86/include/asm/io.h	/^#define setio_16(/;"	d
setio_32	arch/x86/include/asm/io.h	/^#define setio_32(/;"	d
setio_8	arch/x86/include/asm/io.h	/^#define setio_8(/;"	d
setjmp	arch/arm/include/asm/setjmp.h	/^static inline int setjmp(jmp_buf jmp)$/;"	f	typeref:typename:int
setjmp	arch/x86/cpu/setjmp.S	/^setjmp:$/;"	l
setjmp	examples/standalone/sched.c	/^#define setjmp	/;"	d	file:
setmod_text	scripts/kconfig/mconf.c	/^setmod_text[] = N_($/;"	v	typeref:typename:const char[]	file:
setmod_text	scripts/kconfig/nconf.c	/^setmod_text[] = N_($/;"	v	typeref:typename:const char[]	file:
sets_to_zero	include/efi.h	/^	u8 sets_to_zero;$/;"	m	struct:efi_time_cap	typeref:typename:u8
setsize_BE	disk/part_iso.h	/^	unsigned short setsize_BE;	\/* volume set size BE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned short
setsize_BE	disk/part_iso.h	/^	unsigned short setsize_BE;	\/* volume set size BE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned short
setsize_LE	disk/part_iso.h	/^	unsigned short setsize_LE;	\/* volume set size LE *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned short
setsize_LE	disk/part_iso.h	/^	unsigned short setsize_LE;	\/* volume set size LE *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned short
setting	arch/arm/include/asm/arch-mx7/clock.h	/^	u32 setting;$/;"	m	struct:clk_root_setting	typeref:typename:u32
setting	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u32	setting;$/;"	m	struct:ddrmc_cr_setting	typeref:typename:u32
setting	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u32	setting;$/;"	m	struct:ddrmc_phy_setting	typeref:typename:u32
setting	test/dm/regulator.c	/^struct setting {$/;"	s	file:
settings	board/siemens/draco/board.c	/^static struct draco_baseboard_id __attribute__((section(".data"))) settings;$/;"	v	typeref:struct:draco_baseboard_id	file:
settings	doc/README.x86	/^settings here if the default values do not fit your new board.$/;"	l
settings_data	tools/buildman/func_test.py	/^settings_data = '''$/;"	v
settings_data	tools/buildman/test.py	/^settings_data = '''$/;"	v
setup	arch/arm/mach-at91/include/mach/at91sam9_smc.h	/^	u32	setup;		\/* 0x00 SMC Setup Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
setup	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	u32	setup;		\/* 0x600 SMC Setup Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
setup	arch/sandbox/include/asm/spi.h	/^	int (*setup)(void **priv, const char *spec);$/;"	m	struct:sandbox_spi_emu_ops	typeref:typename:int (*)(void ** priv,const char * spec)
setup	drivers/i2c/i2c-uniphier.c	/^	u32 setup;			\/* setup time control *\/$/;"	m	struct:uniphier_i2c_regs	typeref:typename:u32	file:
setup	drivers/usb/gadget/at91_udc.c	/^union setup {$/;"	u	file:
setup	include/linux/usb/composite.h	/^	int			(*setup)(struct usb_configuration *,$/;"	m	struct:usb_configuration	typeref:typename:int (*)(struct usb_configuration *,const struct usb_ctrlrequest *)
setup	include/linux/usb/composite.h	/^	int			(*setup)(struct usb_function *,$/;"	m	struct:usb_function	typeref:typename:int (*)(struct usb_function *,const struct usb_ctrlrequest *)
setup	include/linux/usb/gadget.h	/^	int			(*setup)(struct usb_gadget *,$/;"	m	struct:usb_gadget_driver	typeref:typename:int (*)(struct usb_gadget *,const struct usb_ctrlrequest *)
setup-cs	board/cobra5272/bdm/cobra5272_uboot.gdb	/^define setup-cs$/;"	d
setup-dram	board/cobra5272/bdm/cobra5272_uboot.gdb	/^define setup-dram$/;"	d
setup-ppio	board/cobra5272/bdm/cobra5272_uboot.gdb	/^define setup-ppio$/;"	d
setup-sys	board/cobra5272/bdm/cobra5272_uboot.gdb	/^define setup-sys$/;"	d
setup0	drivers/spi/ti_qspi.c	/^	u32 setup0;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
setup1	drivers/spi/ti_qspi.c	/^	u32 setup1;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
setup2	drivers/spi/ti_qspi.c	/^	u32 setup2;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
setup3	drivers/spi/ti_qspi.c	/^	u32 setup3;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
setupToolchains	tools/buildman/func_test.py	/^    def setupToolchains(self):$/;"	m	class:TestFunctional
setup_5441x_clocks	arch/m68k/cpu/mcf5445x/speed.c	/^void setup_5441x_clocks(void)$/;"	f	typeref:typename:void
setup_5445x_clocks	arch/m68k/cpu/mcf5445x/speed.c	/^void setup_5445x_clocks(void)$/;"	f	typeref:typename:void
setup_88e1514	board/gdsys/common/phy.c	/^int setup_88e1514(const char *bus, unsigned char addr)$/;"	f	typeref:typename:int
setup_88e1518	board/gdsys/common/phy.c	/^int setup_88e1518(const char *bus, unsigned char addr)$/;"	f	typeref:typename:int
setup_all_pgtables	arch/arm/cpu/armv8/cache_v8.c	/^static void setup_all_pgtables(void)$/;"	f	typeref:typename:void	file:
setup_aux_clocks	board/freescale/s32v234evb/clock.c	/^static void setup_aux_clocks(void)$/;"	f	typeref:typename:void	file:
setup_ba16_sata	board/advantech/dms-ba16/dms-ba16.c	/^int setup_ba16_sata(void)$/;"	f	typeref:typename:int
setup_bats	arch/powerpc/cpu/mpc83xx/start.S	/^setup_bats:$/;"	l
setup_bats	arch/powerpc/cpu/mpc86xx/start.S	/^setup_bats:$/;"	l
setup_board_eeprom_env	board/ti/am57xx/board.c	/^static inline void setup_board_eeprom_env(void) { }$/;"	f	typeref:typename:void	file:
setup_board_eeprom_env	board/ti/am57xx/board.c	/^static void setup_board_eeprom_env(void)$/;"	f	typeref:typename:void	file:
setup_board_extra	common/board_f.c	/^static int setup_board_extra(void)$/;"	f	typeref:typename:int	file:
setup_board_gpio	board/aristainetos/aristainetos-v1.c	/^static void setup_board_gpio(void)$/;"	f	typeref:typename:void	file:
setup_board_gpio	board/aristainetos/aristainetos-v2.c	/^static void setup_board_gpio(void)$/;"	f	typeref:typename:void	file:
setup_board_gpio	board/gateworks/gw_ventana/common.c	/^void setup_board_gpio(int board, struct ventana_board_info *info)$/;"	f	typeref:typename:void
setup_board_part1	common/board_f.c	/^static int setup_board_part1(void)$/;"	f	typeref:typename:int	file:
setup_board_part2	common/board_f.c	/^static int setup_board_part2(void)$/;"	f	typeref:typename:int	file:
setup_board_spi	board/aristainetos/aristainetos-v1.c	/^static void setup_board_spi(void)$/;"	f	typeref:typename:void	file:
setup_board_spi	board/aristainetos/aristainetos-v2.c	/^static void setup_board_spi(void)$/;"	f	typeref:typename:void	file:
setup_board_switches	board/bf609-ezkit/soft_switch.c	/^int setup_board_switches(void)$/;"	f	typeref:typename:int
setup_board_tags	arch/arm/lib/bootm.c	/^__weak void setup_board_tags(struct tag **in_params) {}$/;"	f	typeref:typename:__weak void
setup_board_tags	board/Synology/ds109/ds109.c	/^void setup_board_tags(struct tag **in_params)$/;"	f	typeref:typename:void
setup_board_tags	board/nokia/rx51/rx51.c	/^void setup_board_tags(struct tag **in_params)$/;"	f	typeref:typename:void
setup_boardinfo_tag	arch/avr32/lib/bootm.c	/^static struct tag *setup_boardinfo_tag(struct tag *params)$/;"	f	typeref:struct:tag *	file:
setup_boardspec	test/py/conftest.py	/^def setup_boardspec(item):$/;"	f
setup_boot_mode	arch/arm/mach-rockchip/rk3036-board.c	/^static void setup_boot_mode(void)$/;"	f	typeref:typename:void	file:
setup_boot_mode	arch/arm/mach-rockchip/rk3288-board.c	/^static void setup_boot_mode(void)$/;"	f	typeref:typename:void	file:
setup_buf	drivers/usb/dwc3/core.h	/^	u8			*setup_buf;$/;"	m	struct:dwc3	typeref:typename:u8 *
setup_buildconfigspec	test/py/conftest.py	/^def setup_buildconfigspec(item):$/;"	f
setup_buttons	board/boundary/nitrogen6x/nitrogen6x.c	/^static void setup_buttons(void)$/;"	f	typeref:typename:void	file:
setup_c0_status	arch/mips/cpu/start.S	/^	.macro	setup_c0_status set clr$/;"	m
setup_ccsrbar	arch/powerpc/cpu/mpc86xx/start.S	/^setup_ccsrbar:$/;"	l
setup_clock_synthesizer	arch/arm/cpu/armv7/am33xx/clk_synthesizer.c	/^int setup_clock_synthesizer(struct clk_synth *data)$/;"	f	typeref:typename:int
setup_clock_tags	arch/avr32/lib/bootm.c	/^static struct tag *setup_clock_tags(struct tag *params)$/;"	f	typeref:struct:tag *	file:
setup_clocks_for_console	arch/arm/cpu/armv7/am33xx/clock_am33xx.c	/^void setup_clocks_for_console(void)$/;"	f	typeref:typename:void
setup_clocks_for_console	arch/arm/cpu/armv7/am33xx/clock_am43xx.c	/^void setup_clocks_for_console(void)$/;"	f	typeref:typename:void
setup_clocks_for_console	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^void setup_clocks_for_console(void)$/;"	f	typeref:typename:void
setup_clocks_for_console	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^void setup_clocks_for_console(void)$/;"	f	typeref:typename:void
setup_clocks_for_console	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static void setup_clocks_for_console(void)$/;"	f	typeref:typename:void	file:
setup_commandline_tag	arch/arm/lib/bootm.c	/^static void setup_commandline_tag(bd_t *bd, char *commandline)$/;"	f	typeref:typename:void	file:
setup_commandline_tag	arch/avr32/lib/bootm.c	/^static struct tag *setup_commandline_tag(struct tag *params, char *cmdline)$/;"	f	typeref:struct:tag *	file:
setup_commandline_tag	arch/nds32/lib/bootm.c	/^static void setup_commandline_tag(bd_t *bd, char *commandline)$/;"	f	typeref:typename:void	file:
setup_commandline_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_commandline_tag(struct bp_tag *params,$/;"	f	typeref:struct:bp_tag *	file:
setup_cpu_target	arch/arm/mach-mvebu/mbus.c	/^	void (*setup_cpu_target)(struct mvebu_mbus_state *s);$/;"	m	struct:mvebu_mbus_soc_data	typeref:typename:void (*)(struct mvebu_mbus_state * s)	file:
setup_cs_gpio	drivers/spi/mxc_spi.c	/^static int setup_cs_gpio(struct mxc_spi_slave *mxcs,$/;"	f	typeref:typename:int	file:
setup_cs_reloc	board/mpl/common/common_util.c	/^void setup_cs_reloc(void)$/;"	f	typeref:typename:void
setup_data	arch/x86/include/asm/bootparam.h	/^	__u64	setup_data;$/;"	m	struct:setup_header	typeref:typename:__u64
setup_data	arch/x86/include/asm/bootparam.h	/^struct setup_data {$/;"	s
setup_data	drivers/usb/gadget/ci_udc.h	/^	unsigned char setup_data[8];$/;"	m	struct:ept_queue_head	typeref:typename:unsigned char[8]
setup_data_reg	drivers/gpio/sh_pfc.c	/^static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)$/;"	f	typeref:typename:int	file:
setup_data_regs	drivers/gpio/sh_pfc.c	/^static void setup_data_regs(struct pinmux_info *gpioc)$/;"	f	typeref:typename:void	file:
setup_ddr_bat	arch/powerpc/cpu/mpc86xx/cpu.c	/^void setup_ddr_bat(phys_addr_t dram_size)$/;"	f	typeref:typename:void
setup_ddr_tlbs	arch/powerpc/cpu/mpc85xx/tlb.c	/^unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)$/;"	f	typeref:typename:unsigned int
setup_ddr_tlbs_phys	arch/powerpc/cpu/mpc85xx/tlb.c	/^unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr,$/;"	f	typeref:typename:unsigned int
setup_dest_addr	common/board_f.c	/^static int setup_dest_addr(void)$/;"	f	typeref:typename:int	file:
setup_direct_access	drivers/misc/mxc_ocotp.c	/^static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word,$/;"	f	typeref:typename:void	file:
setup_disp_channel1	drivers/video/mxc_ipuv3_fb.c	/^static int setup_disp_channel1(struct fb_info *fbi)$/;"	f	typeref:typename:int	file:
setup_disp_channel2	drivers/video/mxc_ipuv3_fb.c	/^static int setup_disp_channel2(struct fb_info *fbi)$/;"	f	typeref:typename:int	file:
setup_display	board/advantech/dms-ba16/dms-ba16.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/aristainetos/aristainetos-v1.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/aristainetos/aristainetos-v2.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/boundary/nitrogen6x/nitrogen6x.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/embest/mx6boards/mx6boards.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/freescale/mx6sabresd/mx6sabresd.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/gateworks/gw_ventana/gw_ventana.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static int setup_display(void)$/;"	f	typeref:typename:int	file:
setup_display	board/tbs/tbs2910/tbs2910.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display	board/wandboard/wandboard.c	/^static void setup_display(void)$/;"	f	typeref:typename:void	file:
setup_display_b850v3	board/ge/bx50v3/bx50v3.c	/^static void setup_display_b850v3(void)$/;"	f	typeref:typename:void	file:
setup_display_bx50v3	board/ge/bx50v3/bx50v3.c	/^static void setup_display_bx50v3(void)$/;"	f	typeref:typename:void	file:
setup_display_clock	board/kosagi/novena/video.c	/^void setup_display_clock(void)$/;"	f	typeref:typename:void
setup_display_lvds	board/kosagi/novena/video.c	/^void setup_display_lvds(void)$/;"	f	typeref:typename:void
setup_done	drivers/rtc/rs5c372.c	/^static int setup_done = 0;$/;"	v	typeref:typename:int	file:
setup_dplls	arch/arm/cpu/armv7/am33xx/clock.c	/^static void setup_dplls(void)$/;"	f	typeref:typename:void	file:
setup_dplls	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static void setup_dplls(void)$/;"	f	typeref:typename:void	file:
setup_dram_config	common/board_f.c	/^static int setup_dram_config(void)$/;"	f	typeref:typename:int	file:
setup_early_clocks	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void setup_early_clocks(void)$/;"	f	typeref:typename:void
setup_ecc_for_xfer	drivers/mtd/nand/denali.c	/^static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,$/;"	f	typeref:typename:void	file:
setup_end_tag	arch/arm/lib/bootm.c	/^static void setup_end_tag(bd_t *bd)$/;"	f	typeref:typename:void	file:
setup_end_tag	arch/avr32/lib/bootm.c	/^static void setup_end_tag(struct tag *params)$/;"	f	typeref:typename:void	file:
setup_end_tag	arch/nds32/lib/bootm.c	/^static void setup_end_tag(bd_t *bd)$/;"	f	typeref:typename:void	file:
setup_environment	board/sunxi/board.c	/^static void setup_environment(const void *fdt)$/;"	f	typeref:typename:void	file:
setup_ethernet_tag	arch/avr32/lib/bootm.c	/^static struct tag *setup_ethernet_tag(struct tag *params,$/;"	f	typeref:struct:tag *	file:
setup_ethernet_tags	arch/avr32/lib/bootm.c	/^static struct tag *setup_ethernet_tags(struct tag *params)$/;"	f	typeref:struct:tag *	file:
setup_fail_response	drivers/usb/emul/sandbox_flash.c	/^static void setup_fail_response(struct sandbox_flash_priv *priv)$/;"	f	typeref:typename:void	file:
setup_fdt_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_fdt_tag(struct bp_tag *params, void *fdt_start)$/;"	f	typeref:struct:bp_tag *	file:
setup_fec	board/ccv/xpress/xpress.c	/^static int setup_fec(int fec_id)$/;"	f	typeref:typename:int	file:
setup_fec	board/engicam/icorem6/icorem6.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_fec	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_fec(void)$/;"	f	typeref:typename:void	file:
setup_fec	board/freescale/mx6slevk/mx6slevk.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_fec	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_fec	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_fec	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static int setup_fec(int fec_id)$/;"	f	typeref:typename:int	file:
setup_fec	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_fec	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_fec	board/toradex/colibri_imx7/colibri_imx7.c	/^static int setup_fec(void)$/;"	f	typeref:typename:int	file:
setup_file_in_str	common/cli_hush.c	/^static void setup_file_in_str(struct in_str *i, FILE *f)$/;"	f	typeref:typename:void	file:
setup_first_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_first_tag(struct bp_tag *params)$/;"	f	typeref:struct:bp_tag *	file:
setup_fman_liodn_base	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void setup_fman_liodn_base(enum fsl_dpaa_dev dev,$/;"	f	typeref:typename:void	file:
setup_fsp_gdt	arch/x86/cpu/cpu.c	/^void setup_fsp_gdt(void)$/;"	f	typeref:typename:void
setup_global_data	arch/arm/mach-exynos/spl_boot.c	/^static void setup_global_data(gd_t *gdp)$/;"	f	typeref:typename:void	file:
setup_gpmi_io_clk	arch/arm/cpu/armv7/mx6/clock.c	/^void setup_gpmi_io_clk(u32 cfg)$/;"	f	typeref:typename:void
setup_gpmi_nand	board/aristainetos/aristainetos.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/barco/platinum/platinum.c	/^void setup_gpmi_nand(void)$/;"	f	typeref:typename:void
setup_gpmi_nand	board/barco/titanium/titanium.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/engicam/icorem6/icorem6.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/gateworks/gw_ventana/gw_ventana.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/phytec/pcm058/pcm058.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_gpmi_nand	board/toradex/colibri_imx7/colibri_imx7.c	/^static void setup_gpmi_nand(void)$/;"	f	typeref:typename:void	file:
setup_header	arch/x86/include/asm/bootparam.h	/^struct setup_header {$/;"	s
setup_host_clocks	board/compulab/cm_t54/cm_t54.c	/^static void setup_host_clocks(bool enable)$/;"	f	typeref:typename:void	file:
setup_i2c	arch/arm/imx-common/i2c-mxv7.c	/^int setup_i2c(unsigned i2c_index, int speed, int slave_addr,$/;"	f	typeref:typename:int
setup_i2c	board/freescale/mx53evk/mx53evk.c	/^static void setup_i2c(unsigned int port_number)$/;"	f	typeref:typename:void	file:
setup_i2c4	board/aristainetos/aristainetos-v1.c	/^static void setup_i2c4(void)$/;"	f	typeref:typename:void	file:
setup_i2c4	board/aristainetos/aristainetos-v2.c	/^static void setup_i2c4(void)$/;"	f	typeref:typename:void	file:
setup_ifc	arch/powerpc/cpu/mpc85xx/cpu_init_early.c	/^void setup_ifc(void)$/;"	f	typeref:typename:void
setup_info_table	lib/efi/efi_stub.c	/^static int setup_info_table(struct efi_priv *priv, int size)$/;"	f	typeref:typename:int	file:
setup_initrd_tag	arch/arm/lib/bootm.c	/^static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)$/;"	f	typeref:typename:void	file:
setup_initrd_tag	arch/nds32/lib/bootm.c	/^static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)$/;"	f	typeref:typename:void	file:
setup_internal_uart	arch/x86/cpu/baytrail/early_uart.c	/^int setup_internal_uart(int enable)$/;"	f	typeref:typename:int
setup_interrupt_handlers	arch/x86/lib/bios.c	/^static void setup_interrupt_handlers(void)$/;"	f	typeref:typename:void	file:
setup_iomux_backlight	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_iomux_backlight(void)$/;"	f	typeref:typename:void	file:
setup_iomux_ddr	board/freescale/s32v234evb/s32v234evb.c	/^void setup_iomux_ddr(void)$/;"	f	typeref:typename:void
setup_iomux_dspi	board/toradex/colibri_vf/colibri_vf.c	/^static void setup_iomux_dspi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_eimnor	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_iomux_eimnor(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/advantech/dms-ba16/dms-ba16.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/aristainetos/aristainetos-v1.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/aristainetos/aristainetos-v2.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/bachmann/ot1200/ot1200.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/barco/titanium/titanium.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/boundary/nitrogen6x/nitrogen6x.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/el/el6x/el6x.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/embest/mx6boards/mx6boards.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/freescale/mx6qarm2/mx6qarm2.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/freescale/mx6sabresd/mx6sabresd.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/freescale/s32v234evb/s32v234evb.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/freescale/vf610twr/vf610twr.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/gateworks/gw_ventana/gw_ventana.c	/^static void setup_iomux_enet(int gpio)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/ge/bx50v3/bx50v3.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/phytec/pcm052/pcm052.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/phytec/pcm058/pcm058.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/tbs/tbs2910/tbs2910.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/toradex/colibri_vf/colibri_vf.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/udoo/udoo.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_enet	board/wandboard/wandboard.c	/^static void setup_iomux_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomux_features	board/bachmann/ot1200/ot1200.c	/^static void setup_iomux_features(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/CarMediaLab/flea3/flea3.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/denx/m53evk/m53evk.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx35pdk/mx35pdk.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx51evk/mx51evk.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx53evk/mx53evk.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx53loco/mx53loco.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx53smd/mx53smd.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx6slevk/mx6slevk.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static void setup_iomux_fec(int fec_id)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/technologic/ts4800/ts4800.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/toradex/colibri_imx7/colibri_imx7.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_fec	board/woodburn/woodburn.c	/^static void setup_iomux_fec(void)$/;"	f	typeref:typename:void	file:
setup_iomux_gpio	board/aristainetos/aristainetos-v1.c	/^static void setup_iomux_gpio(void)$/;"	f	typeref:typename:void	file:
setup_iomux_gpio	board/aristainetos/aristainetos-v2.c	/^static void setup_iomux_gpio(void)$/;"	f	typeref:typename:void	file:
setup_iomux_gpio	board/gateworks/gw_ventana/common.c	/^void setup_iomux_gpio(int board, struct ventana_board_info *info)$/;"	f	typeref:typename:void
setup_iomux_gpio	board/toradex/colibri_vf/colibri_vf.c	/^static void setup_iomux_gpio(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/CarMediaLab/flea3/flea3.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/bachmann/ot1200/ot1200.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/denx/m53evk/m53evk.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/freescale/mx35pdk/mx35pdk.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/freescale/mx53loco/mx53loco.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/freescale/s32v234evb/s32v234evb.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/freescale/vf610twr/vf610twr.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/inversepath/usbarmory/usbarmory.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/phytec/pcm052/pcm052.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_i2c	board/toradex/colibri_vf/colibri_vf.c	/^static void setup_iomux_i2c(void)$/;"	f	typeref:typename:void	file:
setup_iomux_lcd	arch/arm/include/asm/imx-common/mx5_video.h	/^static inline void setup_iomux_lcd(void) { }$/;"	f	typeref:typename:void
setup_iomux_lcd	board/freescale/mx51evk/mx51evk_video.c	/^void setup_iomux_lcd(void)$/;"	f	typeref:typename:void
setup_iomux_lcd	board/freescale/mx53loco/mx53loco_video.c	/^void setup_iomux_lcd(void)$/;"	f	typeref:typename:void
setup_iomux_led	board/inversepath/usbarmory/usbarmory.c	/^static void setup_iomux_led(void)$/;"	f	typeref:typename:void	file:
setup_iomux_nand	board/denx/m53evk/m53evk.c	/^static void setup_iomux_nand(void)$/;"	f	typeref:typename:void	file:
setup_iomux_nand	board/freescale/mx53ard/mx53ard.c	/^static void setup_iomux_nand(void)$/;"	f	typeref:typename:void	file:
setup_iomux_nfc	board/freescale/s32v234evb/s32v234evb.c	/^void setup_iomux_nfc(void)$/;"	f	typeref:typename:void
setup_iomux_nfc	board/freescale/vf610twr/vf610twr.c	/^static void setup_iomux_nfc(void)$/;"	f	typeref:typename:void	file:
setup_iomux_nfc	board/phytec/pcm052/pcm052.c	/^static void setup_iomux_nfc(void)$/;"	f	typeref:typename:void	file:
setup_iomux_nfc	board/toradex/colibri_vf/colibri_vf.c	/^static void setup_iomux_nfc(void)$/;"	f	typeref:typename:void	file:
setup_iomux_pinheader	board/inversepath/usbarmory/usbarmory.c	/^static void setup_iomux_pinheader(void)$/;"	f	typeref:typename:void	file:
setup_iomux_qspi	board/freescale/vf610twr/vf610twr.c	/^static void setup_iomux_qspi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_qspi	board/phytec/pcm052/pcm052.c	/^static void setup_iomux_qspi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_sd	board/inversepath/usbarmory/usbarmory.c	/^static void setup_iomux_sd(void)$/;"	f	typeref:typename:void	file:
setup_iomux_spi	board/CarMediaLab/flea3/flea3.c	/^static void setup_iomux_spi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_spi	board/bachmann/ot1200/ot1200.c	/^static void setup_iomux_spi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_spi	board/freescale/mx35pdk/mx35pdk.c	/^static void setup_iomux_spi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_spi	board/freescale/mx51evk/mx51evk.c	/^static void setup_iomux_spi(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/advantech/dms-ba16/dms-ba16.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/aristainetos/aristainetos-v1.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/aristainetos/aristainetos-v2.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/bachmann/ot1200/ot1200.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/barco/titanium/titanium.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/boundary/nitrogen6x/nitrogen6x.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/ccv/xpress/xpress.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/denx/m53evk/m53evk.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/el/el6x/el6x.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/embest/mx6boards/mx6boards.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx51evk/mx51evk.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx53ard/mx53ard.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx53evk/mx53evk.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx53loco/mx53loco.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx53smd/mx53smd.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6qarm2/mx6qarm2.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6sabresd/mx6sabresd.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6slevk/mx6slevk.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx6ullevk/mx6ullevk.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/s32v234evb/s32v234evb.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/freescale/vf610twr/vf610twr.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/gateworks/gw_ventana/common.c	/^void setup_iomux_uart(void)$/;"	f	typeref:typename:void
setup_iomux_uart	board/ge/bx50v3/bx50v3.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/phytec/pcm052/pcm052.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/phytec/pcm058/pcm058.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/tbs/tbs2910/tbs2910.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/technologic/ts4800/ts4800.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/toradex/colibri_imx7/colibri_imx7.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/toradex/colibri_vf/colibri_vf.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/udoo/udoo.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/wandboard/wandboard.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/warp/warp.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart	board/warp7/warp7.c	/^static void setup_iomux_uart(void)$/;"	f	typeref:typename:void	file:
setup_iomux_uart3	board/CarMediaLab/flea3/flea3.c	/^static void setup_iomux_uart3(void)$/;"	f	typeref:typename:void	file:
setup_iomux_unused_boot	board/inversepath/usbarmory/usbarmory.c	/^static void setup_iomux_unused_boot(void)$/;"	f	typeref:typename:void	file:
setup_iomux_unused_nc	board/inversepath/usbarmory/usbarmory.c	/^static void setup_iomux_unused_nc(void)$/;"	f	typeref:typename:void	file:
setup_iomux_usbotg	board/freescale/mx35pdk/mx35pdk.c	/^static void setup_iomux_usbotg(void)$/;"	f	typeref:typename:void	file:
setup_iomux_video	board/denx/m53evk/m53evk.c	/^static void setup_iomux_video(void)$/;"	f	typeref:typename:void	file:
setup_iomux_wdog	board/udoo/udoo.c	/^static void setup_iomux_wdog(void)$/;"	f	typeref:typename:void	file:
setup_iomuxc_enet	board/tqc/tqma6/tqma6_wru4.c	/^static void setup_iomuxc_enet(void)$/;"	f	typeref:typename:void	file:
setup_iomuxc_uart4	board/tqc/tqma6/tqma6_wru4.c	/^static void setup_iomuxc_uart4(void)$/;"	f	typeref:typename:void	file:
setup_job_control	common/cli_hush.c	/^static void setup_job_control(void)$/;"	f	typeref:typename:void	file:
setup_kernel_info	board/nvidia/nyan-big/nyan-big.c	/^static void setup_kernel_info(void)$/;"	f	typeref:typename:void	file:
setup_last_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_last_tag(struct bp_tag *params)$/;"	f	typeref:struct:bp_tag *	file:
setup_lcd	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static int setup_lcd(void)$/;"	f	typeref:typename:int	file:
setup_lcd	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static int setup_lcd(void)$/;"	f	typeref:typename:int	file:
setup_lcd	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static int setup_lcd(void)$/;"	f	typeref:typename:int	file:
setup_lcd	board/toradex/colibri_imx7/colibri_imx7.c	/^static int setup_lcd(void)$/;"	f	typeref:typename:int	file:
setup_led	arch/arm/mach-rockchip/rk3288-board-spl.c	/^static int setup_led(void)$/;"	f	typeref:typename:int	file:
setup_machine	common/board_f.c	/^static int setup_machine(void)$/;"	f	typeref:typename:int	file:
setup_memory	lib/efi/efi_app.c	/^static efi_status_t setup_memory(struct efi_priv *priv)$/;"	f	typeref:typename:efi_status_t	file:
setup_memory_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_memory_tag(struct bp_tag *params)$/;"	f	typeref:struct:bp_tag *	file:
setup_memory_tags	arch/arm/lib/bootm.c	/^static void setup_memory_tags(bd_t *bd)$/;"	f	typeref:typename:void	file:
setup_memory_tags	arch/avr32/lib/bootm.c	/^static struct tag *setup_memory_tags(struct tag *params)$/;"	f	typeref:struct:tag *	file:
setup_memory_tags	arch/nds32/lib/bootm.c	/^static void setup_memory_tags(bd_t *bd)$/;"	f	typeref:typename:void	file:
setup_mon_len	common/board_f.c	/^static int setup_mon_len(void)$/;"	f	typeref:typename:int	file:
setup_move_size	arch/x86/include/asm/bootparam.h	/^	__u16	setup_move_size;$/;"	m	struct:setup_header	typeref:typename:__u16
setup_mp	arch/powerpc/cpu/mpc85xx/mp.c	/^void setup_mp(void)$/;"	f	typeref:typename:void
setup_mp	arch/powerpc/cpu/mpc86xx/mp.c	/^void setup_mp(void)$/;"	f	typeref:typename:void
setup_net_chip	board/gumstix/duovero/duovero.c	/^static void setup_net_chip(void)$/;"	f	typeref:typename:void	file:
setup_net_chip	board/isee/igep00x0/igep00x0.c	/^static inline void setup_net_chip(void) {}$/;"	f	typeref:typename:void	file:
setup_net_chip	board/isee/igep00x0/igep00x0.c	/^static void setup_net_chip(void)$/;"	f	typeref:typename:void	file:
setup_net_chip	board/overo/overo.c	/^static void setup_net_chip(void)$/;"	f	typeref:typename:void	file:
setup_net_chip	board/ti/evm/evm.c	/^static void setup_net_chip(void)$/;"	f	typeref:typename:void	file:
setup_packet	drivers/usb/musb-new/usb-compat.h	/^	unsigned char *setup_packet;	\/* (in) setup packet (control only) *\/$/;"	m	struct:urb	typeref:typename:unsigned char *
setup_packet_pending	drivers/usb/dwc3/core.h	/^	unsigned		setup_packet_pending:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
setup_pci_bar	drivers/pci/pci_ftpci100.c	/^static void setup_pci_bar(unsigned int bus, unsigned int dev, unsigned func,$/;"	f	typeref:typename:void	file:
setup_pcie	board/advantech/dms-ba16/dms-ba16.c	/^static void setup_pcie(void)$/;"	f	typeref:typename:void	file:
setup_pcie	board/freescale/mx6sabresd/mx6sabresd.c	/^static void setup_pcie(void)$/;"	f	typeref:typename:void	file:
setup_pcie	board/ge/bx50v3/bx50v3.c	/^static void setup_pcie(void)$/;"	f	typeref:typename:void	file:
setup_pcie	board/tbs/tbs2910/tbs2910.c	/^static void setup_pcie(void)$/;"	f	typeref:typename:void	file:
setup_pgtables	arch/arm/cpu/armv8/cache_v8.c	/^void setup_pgtables(void)$/;"	f	typeref:typename:void
setup_phy	drivers/net/xilinx_axi_emac.c	/^static int setup_phy(struct udevice *dev)$/;"	f	typeref:typename:int	file:
setup_phy	drivers/net/xilinx_emaclite.c	/^static int setup_phy(struct udevice *dev)$/;"	f	typeref:typename:int	file:
setup_pll	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro setup_pll pll, freq$/;"	m
setup_pll_errata	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^.macro setup_pll_errata pll, freq$/;"	m
setup_pll_func	arch/arm/cpu/armv7/mx5/lowlevel_init.S	/^setup_pll_func:$/;"	l
setup_pme_liodn_base	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void setup_pme_liodn_base(void)$/;"	f	typeref:typename:void	file:
setup_pmic	board/gateworks/gw_ventana/common.c	/^void setup_pmic(void)$/;"	f	typeref:typename:void
setup_portals	arch/powerpc/cpu/mpc85xx/portals.c	/^void setup_portals(void)$/;"	f	typeref:typename:void
setup_post_dividers	arch/arm/cpu/armv7/am33xx/clock.c	/^static void setup_post_dividers(const struct dpll_regs *dpll_regs,$/;"	f	typeref:typename:void	file:
setup_post_dividers	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^void setup_post_dividers(u32 const base, const struct dpll_params *params)$/;"	f	typeref:typename:void
setup_prompt_string	common/cli_hush.c	/^static inline void setup_prompt_string(int promptmode, char **prompt_str)$/;"	f	typeref:typename:void	file:
setup_raide_liodn_base	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void setup_raide_liodn_base(void)$/;"	f	typeref:typename:void	file:
setup_ram_buf	common/board_f.c	/^static int setup_ram_buf(void)$/;"	f	typeref:typename:int	file:
setup_ramdisk_tag	arch/avr32/lib/bootm.c	/^static struct tag *setup_ramdisk_tag(struct tag *params,$/;"	f	typeref:struct:tag *	file:
setup_ramdisk_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_ramdisk_tag(struct bp_tag *params,$/;"	f	typeref:struct:bp_tag *	file:
setup_read_retry	include/linux/mtd/nand.h	/^	int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,int retry_mode)
setup_realmode_code	arch/x86/lib/bios.c	/^static void setup_realmode_code(void)$/;"	f	typeref:typename:void	file:
setup_realmode_idt	arch/x86/lib/bios.c	/^static void setup_realmode_idt(void)$/;"	f	typeref:typename:void	file:
setup_redirect	common/cli_hush.c	/^static int setup_redirect(struct p_context *ctx, int fd, redir_type style,$/;"	f	typeref:typename:int	file:
setup_redirects	common/cli_hush.c	/^static int setup_redirects(struct child_prog *prog, int squirrel[])$/;"	f	typeref:typename:int	file:
setup_registers	arch/x86/lib/bios_asm.S	/^.macro setup_registers$/;"	m
setup_reloc	common/board_f.c	/^static int setup_reloc(void)$/;"	f	typeref:typename:int	file:
setup_response	drivers/usb/emul/sandbox_flash.c	/^static void setup_response(struct sandbox_flash_priv *priv, void *resp,$/;"	f	typeref:typename:void	file:
setup_revision_tag	arch/arm/lib/bootm.c	/^static void setup_revision_tag(struct tag **in_params)$/;"	f	typeref:typename:void	file:
setup_revision_tag	arch/nds32/lib/bootm.c	/^void setup_revision_tag(struct tag **in_params)$/;"	f	typeref:typename:void
setup_rman_liodn_base	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size)$/;"	f	typeref:typename:void	file:
setup_rombios	arch/x86/lib/bios.c	/^static void setup_rombios(void)$/;"	f	typeref:typename:void	file:
setup_sata	arch/arm/imx-common/sata.c	/^int setup_sata(void)$/;"	f	typeref:typename:int
setup_sdram	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int setup_sdram(struct udevice *dev)$/;"	f	typeref:typename:int	file:
setup_sdram	board/freescale/mx35pdk/lowlevel_init.S	/^.macro setup_sdram$/;"	m
setup_sdram	board/ids/ids8313/ids8313.c	/^static int setup_sdram(void)$/;"	f	typeref:typename:int	file:
setup_sdram_bank	board/freescale/mx35pdk/lowlevel_init.S	/^setup_sdram_bank:$/;"	l
setup_sec_liodn_base	arch/powerpc/cpu/mpc85xx/liodn.c	/^static void setup_sec_liodn_base(void)$/;"	f	typeref:typename:void	file:
setup_sects	arch/x86/include/asm/bootparam.h	/^	__u8	setup_sects;$/;"	m	struct:setup_header	typeref:typename:__u8
setup_serial_tag	arch/arm/lib/bootm.c	/^static void setup_serial_tag(struct tag **tmp)$/;"	f	typeref:typename:void	file:
setup_serial_tag	arch/nds32/lib/bootm.c	/^void setup_serial_tag(struct tag **tmp)$/;"	f	typeref:typename:void
setup_serial_tag	arch/xtensa/lib/bootm.c	/^static struct bp_tag *setup_serial_tag(struct bp_tag *params)$/;"	f	typeref:struct:bp_tag *	file:
setup_soft_switch	board/bf609-ezkit/soft_switch.c	/^static int setup_soft_switch(int addr, struct switch_config *config)$/;"	f	typeref:typename:int	file:
setup_spi	board/advantech/dms-ba16/dms-ba16.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/aristainetos/aristainetos-v1.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/aristainetos/aristainetos-v2.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/boundary/nitrogen6x/nitrogen6x.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/el/el6x/el6x.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/embest/mx6boards/mx6boards.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/freescale/mx6sabresd/mx6sabresd.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/freescale/mx6slevk/mx6slevk.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/gateworks/gw_ventana/gw_ventana.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/ge/bx50v3/bx50v3.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_spi	board/phytec/pcm058/pcm058.c	/^static void setup_spi(void)$/;"	f	typeref:typename:void	file:
setup_start_tag	arch/arm/lib/bootm.c	/^static void setup_start_tag (bd_t *bd)$/;"	f	typeref:typename:void	file:
setup_start_tag	arch/avr32/lib/bootm.c	/^static struct tag *setup_start_tag(struct tag *params)$/;"	f	typeref:struct:tag *	file:
setup_start_tag	arch/nds32/lib/bootm.c	/^static void setup_start_tag(bd_t *bd)$/;"	f	typeref:typename:void	file:
setup_string_in_str	common/cli_hush.c	/^static void setup_string_in_str(struct in_str *i, const char *s)$/;"	f	typeref:typename:void	file:
setup_sys_clocks	board/freescale/s32v234evb/clock.c	/^static void setup_sys_clocks(void)$/;"	f	typeref:typename:void	file:
setup_timer	include/linux/compat.h	/^#define setup_timer(/;"	d
setup_timing	drivers/mtd/nand/tegra_nand.c	/^static void setup_timing(unsigned timing[FDT_NAND_TIMING_COUNT],$/;"	f	typeref:typename:void	file:
setup_uarts	arch/arm/mach-tegra/board.c	/^static void setup_uarts(int uart_ids)$/;"	f	typeref:typename:void	file:
setup_usb	board/ccv/xpress/xpress.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/freescale/mx6qarm2/mx6qarm2.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/freescale/mx6sabresd/mx6sabresd.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/freescale/mx6slevk/mx6slevk.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static void setup_usb(void)$/;"	f	typeref:typename:void	file:
setup_usb_dpll	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static void setup_usb_dpll(void)$/;"	f	typeref:typename:void	file:
setup_usb_h1	board/freescale/mx51evk/mx51evk.c	/^static void setup_usb_h1(void)$/;"	f	typeref:typename:void	file:
setup_usb_phy	drivers/usb/host/ehci-exynos.c	/^static void setup_usb_phy(struct exynos_usb_phy *usb)$/;"	f	typeref:typename:void	file:
setup_usb_phy	drivers/usb/host/ehci-msm.c	/^static void setup_usb_phy(struct msm_ehci_priv *priv)$/;"	f	typeref:typename:void	file:
setup_usb_phys	arch/arm/mach-mvebu/cpu.c	/^static void setup_usb_phys(void)$/;"	f	typeref:typename:void	file:
setup_ventana_i2c	board/gateworks/gw_ventana/common.c	/^void setup_ventana_i2c(void)$/;"	f	typeref:typename:void
setup_video	drivers/pci/pci_rom.c	/^void setup_video(struct screen_info *screen_info)$/;"	f	typeref:typename:void
setup_warmreset_time	arch/arm/cpu/armv7/omap-common/reset.c	/^void __weak setup_warmreset_time(void)$/;"	f	typeref:typename:void __weak
setup_warmreset_time	arch/arm/cpu/armv7/omap5/hwinit.c	/^void setup_warmreset_time(void)$/;"	f	typeref:typename:void
setup_window	drivers/video/tegra.c	/^static int setup_window(struct disp_ctl_win *win,$/;"	f	typeref:typename:int	file:
setup_windows	scripts/kconfig/nconf.c	/^void setup_windows(void)$/;"	f	typeref:typename:void
setup_zimage	arch/x86/lib/zimage.c	/^int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot,$/;"	f	typeref:typename:int
setupdone	drivers/net/enc28j60.c	/^enum enc_initstate {none=0, setupdone, linkready};$/;"	e	enum:enc_initstate	file:
setupsdram	board/armltd/integrator/lowlevel_init.S	/^setupsdram:$/;"	l
setvbr	arch/m68k/include/asm/processor.h	/^#define setvbr(/;"	d
sev	arch/arm/mach-exynos/include/mach/system.h	/^#define sev(/;"	d
sf	common/splash_source.c	/^static struct spi_flash *sf;$/;"	v	typeref:struct:spi_flash *	file:
sf	include/dfu.h	/^		struct sf_internal_data sf;$/;"	m	union:dfu_entity::__anona51660ed010a	typeref:struct:sf_internal_data
sf_addr	drivers/spi/fsl_qspi.c	/^	u32 sf_addr;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
sf_callers_pc	arch/sparc/include/asm/stack.h	/^		unsigned long sf_callers_pc;$/;"	m	struct:sparc_stackframe_regs	typeref:typename:unsigned long
sf_fp	arch/sparc/include/asm/stack.h	/^		struct sparc_stackframe_regs *sf_fp;$/;"	m	struct:sparc_stackframe_regs	typeref:struct:sparc_stackframe_regs *
sf_get_ops	include/spi_flash.h	/^#define sf_get_ops(/;"	d
sf_ins	arch/sparc/include/asm/stack.h	/^		unsigned long sf_ins[6];$/;"	m	struct:sparc_stackframe_regs	typeref:typename:unsigned long[6]
sf_internal_data	include/dfu.h	/^struct sf_internal_data {$/;"	s
sf_locals	arch/sparc/include/asm/stack.h	/^		unsigned long sf_locals[8];$/;"	m	struct:sparc_stackframe_regs	typeref:typename:unsigned long[8]
sf_mtd_info	drivers/mtd/spi/sf_mtd.c	/^static struct mtd_info sf_mtd_info;$/;"	v	typeref:struct:mtd_info	file:
sf_mtd_name	drivers/mtd/spi/sf_mtd.c	/^static char sf_mtd_name[8];$/;"	v	typeref:typename:char[8]	file:
sf_parse_len_arg	cmd/sf.c	/^static int sf_parse_len_arg(char *arg, ulong *len)$/;"	f	typeref:typename:int	file:
sf_structptr	arch/sparc/include/asm/stack.h	/^		char *sf_structptr;$/;"	m	struct:sparc_stackframe_regs	typeref:typename:char *
sf_xargs	arch/sparc/include/asm/stack.h	/^		unsigned long sf_xargs[6];$/;"	m	struct:sparc_stackframe_regs	typeref:typename:unsigned long[6]
sf_xxargs	arch/sparc/include/asm/stack.h	/^		unsigned long sf_xxargs[1];$/;"	m	struct:sparc_stackframe_regs	typeref:typename:unsigned long[1]
sfa1ad	drivers/spi/fsl_qspi.h	/^	u32 sfa1ad;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sfa2ad	drivers/spi/fsl_qspi.h	/^	u32 sfa2ad;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sfar	drivers/spi/fsl_qspi.h	/^	u32 sfar;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sfb1ad	drivers/spi/fsl_qspi.h	/^	u32 sfb1ad;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sfb2ad	drivers/spi/fsl_qspi.h	/^	u32 sfb2ad;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sfe	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int sfe;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
sfi_apic_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_apic_table_entry {$/;"	s
sfi_cpu_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_cpu_table_entry {$/;"	s
sfi_cstate_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_cstate_table_entry {$/;"	s
sfi_device_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_device_table_entry {$/;"	s
sfi_freq_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_freq_table_entry {$/;"	s
sfi_gpio_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_gpio_table_entry {$/;"	s
sfi_mem_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_mem_entry {$/;"	s
sfi_rtc_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_rtc_table_entry {$/;"	s
sfi_table_handler	arch/x86/include/asm/sfi.h	/^typedef int (*sfi_table_handler) (struct sfi_table_header *table);$/;"	t	typeref:typename:int (*)(struct sfi_table_header * table)
sfi_table_header	arch/x86/include/asm/sfi.h	/^struct __packed sfi_table_header {$/;"	s
sfi_table_simple	arch/x86/include/asm/sfi.h	/^struct __packed sfi_table_simple {$/;"	s
sfi_timer_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_timer_table_entry {$/;"	s
sfi_wake_table_entry	arch/x86/include/asm/sfi.h	/^struct __packed sfi_wake_table_entry {$/;"	s
sfi_write_apic	arch/x86/lib/sfi.c	/^static int sfi_write_apic(struct table_info *tab)$/;"	f	typeref:typename:int	file:
sfi_write_cpus	arch/x86/lib/sfi.c	/^static int sfi_write_cpus(struct table_info *tab)$/;"	f	typeref:typename:int	file:
sfi_write_system_header	arch/x86/lib/sfi.c	/^static int sfi_write_system_header(struct table_info *tab)$/;"	f	typeref:typename:int	file:
sfi_write_xsdt	arch/x86/lib/sfi.c	/^static int sfi_write_xsdt(struct table_info *tab)$/;"	f	typeref:typename:int	file:
sfi_xsdt_header	arch/x86/include/asm/sfi.h	/^struct sfi_xsdt_header {$/;"	s
sfis	drivers/block/fsl_sata.h	/^	u8 sfis[SATA_HC_CMD_DESC_SFIS_SIZE];$/;"	m	struct:cmd_desc	typeref:typename:u8[]
sflow_cfg	include/vsc9953.h	/^	u32	sflow_cfg[11];$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32[11]
sfp	arch/arm/dts/armada-388-clearfog.dts	/^	sfp: sfp {$/;"	l
sfp_control	board/keymile/common/common.h	/^	u8	sfp_control;	\/* SFP modules *\/$/;"	m	struct:bfticu_iomap	typeref:typename:u8
sfp_csr	board/freescale/t208xrdb/cpld.h	/^	u8 sfp_csr;		\/* 0x14 - SFP+ control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sfp_ctl_status	board/freescale/t102xrdb/cpld.h	/^	u8 sfp_ctl_status;	\/* 0x16 - SFP control and status register  *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sfp_ctl_status	board/freescale/t104xrdb/cpld.h	/^	u8 sfp_ctl_status;	\/* 0x16 - SFP control and status register  *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sfp_in16	include/fsl_sfp.h	/^#define sfp_in16(/;"	d
sfp_in32	include/fsl_sfp.h	/^#define sfp_in32(/;"	d
sfp_out32	include/fsl_sfp.h	/^#define sfp_out32(/;"	d
sft_con	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 sft_con;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
sg	include/linux/mtd/ubi.h	/^	struct scatterlist sg[UBI_MAX_SG_COUNT];$/;"	m	struct:ubi_sgl	typeref:struct:scatterlist[]
sg_entries	include/fsl_validate.h	/^		u32 sg_entries;	\/* no of entries in SG table *\/$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c060a	typeref:typename:u32
sg_entry	include/fsl_sec.h	/^struct sg_entry {$/;"	s
sg_flag	include/fsl_validate.h	/^	u32 sg_flag;		\/* Scatter gather flag *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
sg_num	drivers/crypto/fsl/fsl_hash.h	/^	uint32_t sg_num;$/;"	m	struct:sha_ctx	typeref:typename:uint32_t
sg_set_iectrl	arch/arm/mach-uniphier/sg-regs.h	/^static inline void sg_set_iectrl(unsigned pin)$/;"	f	typeref:typename:void
sg_set_iectrl_range	arch/arm/mach-uniphier/sg-regs.h	/^static inline void sg_set_iectrl_range(unsigned min, unsigned max)$/;"	f	typeref:typename:void
sg_set_pinsel	arch/arm/mach-uniphier/sg-regs.h	/^static inline void sg_set_pinsel(unsigned pin, unsigned muxval,$/;"	f	typeref:typename:void
sg_tbl	drivers/crypto/fsl/fsl_hash.h	/^	struct sg_entry sg_tbl[MAX_SG_32];$/;"	m	struct:sha_ctx	typeref:struct:sg_entry[]
sgdma_rx	drivers/net/altera_tse.h	/^	void *sgdma_rx;$/;"	m	struct:altera_tse_priv	typeref:typename:void *
sgdma_tx	drivers/net/altera_tse.h	/^	void *sgdma_tx;$/;"	m	struct:altera_tse_priv	typeref:typename:void *
sge	drivers/block/sata_sil.h	/^	struct sil_sge sge;$/;"	m	struct:sil_cmd_block	typeref:struct:sil_sge
sget	fs/ubifs/super.c	/^struct super_block *sget(struct file_system_type *type,$/;"	f	typeref:struct:super_block *
sgle_read	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	sgle_read;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
sgmii	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} sgmii[4];	\/* Lane A, B, C, D *\/$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0808[4]
sgmii_autoneg_off_88e1518	board/gdsys/common/phy.c	/^struct mii_setupcmd sgmii_autoneg_off_88e1518[] = {$/;"	v	typeref:struct:mii_setupcmd[]
sgmii_configure_repeater	board/freescale/ls2080aqds/eth.c	/^static void sgmii_configure_repeater(int serdes_port)$/;"	f	typeref:typename:void	file:
sgmii_dpmac	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^int sgmii_dpmac[SGMII16 + 1];$/;"	v	typeref:typename:int[]
sgmii_electrical_config_serdes_rev1_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sgmii_electrical_config_serdes_rev1_params[] = {$/;"	v	typeref:struct:op_params[]
sgmii_electrical_config_serdes_rev2_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params sgmii_electrical_config_serdes_rev2_params[] = {$/;"	v	typeref:struct:op_params[]
sgmii_link_type	arch/arm/include/asm/ti-common/keystone_net.h	/^	int sgmii_link_type;$/;"	m	struct:eth_priv_t	typeref:typename:int
sgmii_link_type	drivers/net/keystone_net.c	/^	int				sgmii_link_type;$/;"	m	struct:ks2_eth_priv	typeref:typename:int	file:
sgmii_phy0	arch/arm/dts/ls1021a-twr.dtsi	/^	sgmii_phy0: ethernet-phy@0 {$/;"	l
sgmii_phy1c	arch/arm/dts/ls1021a-qds.dtsi	/^				sgmii_phy1c: ethernet-phy@1c {$/;"	l	label:fpga.ls1021amdio3
sgmii_phy1d	arch/arm/dts/ls1021a-qds.dtsi	/^				sgmii_phy1d: ethernet-phy@1d {$/;"	l	label:fpga.ls1021amdio4
sgmii_phy2	arch/arm/dts/ls1021a-twr.dtsi	/^	sgmii_phy2: ethernet-phy@2 {$/;"	l
sgmii_phy_init	drivers/phy/marvell/comphy_a3700.c	/^static u16 sgmii_phy_init[512] = {$/;"	v	typeref:typename:u16[512]	file:
sgmii_phy_init_data_fix	drivers/phy/marvell/comphy_a3700.c	/^struct sgmii_phy_init_data_fix {$/;"	s	file:
sgmii_phy_init_fix	drivers/phy/marvell/comphy_a3700.c	/^static struct sgmii_phy_init_data_fix sgmii_phy_init_fix[] = {$/;"	v	typeref:struct:sgmii_phy_init_data_fix[]	file:
sgmii_riser_phy_addr	board/freescale/ls2080aqds/eth.c	/^static int sgmii_riser_phy_addr[] = {$/;"	v	typeref:typename:int[]	file:
sgmldocs	doc/DocBook/Makefile	/^sgmldocs: xmldocs$/;"	t
sgpcr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sgpcr0;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr0	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 sgpcr0;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sgpcr1;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr1	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 sgpcr1;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sgpcr2;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr2	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 sgpcr2;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sgpcr3;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr3	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 sgpcr3;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sgpcr4;$/;"	m	struct:max_regs	typeref:typename:u32
sgpcr4	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 sgpcr4;$/;"	m	struct:max_regs	typeref:typename:u32
sgprh	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sgprh;		\/* System General Purpose Register High *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sgprl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sgprl;		\/* System General Purpose Register Low *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sgr	drivers/block/sata_dwc.c	/^	struct dmareg sgr;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
sgrf	arch/arm/dts/rk3288.dtsi	/^	sgrf: syscon@ff740000 {$/;"	l
sgrf	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^	struct rk3288_sgrf *sgrf;$/;"	m	struct:dram_info	typeref:struct:rk3288_sgrf *	file:
sgtbl	include/fsl_validate.h	/^	struct fsl_secboot_sg_table sgtbl[MAX_SG_ENTRIES];	\/* SG table *\/$/;"	m	struct:fsl_secboot_img_priv	typeref:struct:fsl_secboot_sg_table[]
sh	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint _l, _f, m, bc, mc, lg, no, sh, cr, ov, cl;$/;"	m	struct:__anon7d79ed4b0208	typeref:typename:uint	file:
sh73a0_bsc	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_bsc {$/;"	s
sh73a0_hpb	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_hpb {$/;"	s
sh73a0_hpb_bscr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_hpb_bscr {$/;"	s
sh73a0_pinmux_info	arch/arm/mach-rmobile/pfc-sh73a0.c	/^static struct pinmux_info sh73a0_pinmux_info = {$/;"	v	typeref:struct:pinmux_info	file:
sh73a0_pinmux_init	arch/arm/mach-rmobile/pfc-sh73a0.c	/^void sh73a0_pinmux_init(void)$/;"	f	typeref:typename:void
sh73a0_rwdt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_rwdt {$/;"	s
sh73a0_sbsc	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_sbsc {$/;"	s
sh73a0_sbsc_cpg	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_sbsc_cpg {$/;"	s
sh73a0_sbsc_cpg_srcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^struct sh73a0_sbsc_cpg_srcr {$/;"	s
sh7785lcr_bitget	board/renesas/sh7785lcr/rtl8169_mac.c	/^static inline unsigned char sh7785lcr_bitget(void)$/;"	f	typeref:typename:unsigned char	file:
sh7785lcr_bitset	board/renesas/sh7785lcr/rtl8169_mac.c	/^static inline void sh7785lcr_bitset(unsigned short bit)$/;"	f	typeref:typename:void	file:
sh7785lcr_datawrite	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void sh7785lcr_datawrite(const unsigned short *data, unsigned short address,$/;"	f	typeref:typename:void	file:
sh7785lcr_eepewen	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void sh7785lcr_eepewen(void)$/;"	f	typeref:typename:void	file:
sh7785lcr_getdt	board/renesas/sh7785lcr/rtl8169_mac.c	/^static inline unsigned short sh7785lcr_getdt(void)$/;"	f	typeref:typename:unsigned short	file:
sh7785lcr_macadrd	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void sh7785lcr_macadrd(unsigned char *buf)$/;"	f	typeref:typename:void	file:
sh7785lcr_macdtrd	board/renesas/sh7785lcr/rtl8169_mac.c	/^void sh7785lcr_macdtrd(unsigned char *buf, unsigned short address, unsigned int count)$/;"	f	typeref:typename:void
sh7785lcr_macerase	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void sh7785lcr_macerase(void)$/;"	f	typeref:typename:void	file:
sh7785lcr_macwrite	board/renesas/sh7785lcr/rtl8169_mac.c	/^static void sh7785lcr_macwrite(unsigned short *data)$/;"	f	typeref:typename:void	file:
sh7785lcr_setadd	board/renesas/sh7785lcr/rtl8169_mac.c	/^static inline void sh7785lcr_setadd(unsigned short address)$/;"	f	typeref:typename:void	file:
sh7785lcr_setcmd	board/renesas/sh7785lcr/rtl8169_mac.c	/^static inline void sh7785lcr_setcmd(unsigned char command)$/;"	f	typeref:typename:void	file:
sh7785lcr_setdata	board/renesas/sh7785lcr/rtl8169_mac.c	/^static inline void sh7785lcr_setdata(unsigned short data)$/;"	f	typeref:typename:void	file:
sh_abtsc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_abtsc;       \/* abort sequence counter *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_addr	include/elf.h	/^	Elf32_Addr	sh_addr;	\/* address *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Addr
sh_addralign	include/elf.h	/^	Elf32_Word	sh_addralign;	\/* address alignment *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_check_cmd_arg	arch/sh/lib/bootm.c	/^static unsigned long sh_check_cmd_arg(char *cmdline, char *key, int base)$/;"	f	typeref:typename:unsigned long	file:
sh_clk_mode	include/dm/platform_data/serial_sh.h	/^enum sh_clk_mode {$/;"	g
sh_cmask	arch/powerpc/include/asm/cpm_8260.h	/^	ulong   sh_cmask;       \/* CRC constant *\/$/;"	m	struct:scc_hdlc	typeref:typename:ulong
sh_cpres	arch/powerpc/include/asm/cpm_8260.h	/^	ulong   sh_cpres;       \/* CRC preset *\/$/;"	m	struct:scc_hdlc	typeref:typename:ulong
sh_crcec	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_crcec;       \/* CRC error counter *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_disfc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_disfc;       \/* discarded frame counter *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_entsize	include/elf.h	/^	Elf32_Word	sh_entsize;	\/* section entry size *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_eth_bb_delay	drivers/net/sh_eth.c	/^static int sh_eth_bb_delay(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
sh_eth_bb_get_mdio	drivers/net/sh_eth.c	/^static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)$/;"	f	typeref:typename:int	file:
sh_eth_bb_init	drivers/net/sh_eth.c	/^static int sh_eth_bb_init(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
sh_eth_bb_mdio_active	drivers/net/sh_eth.c	/^static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
sh_eth_bb_mdio_tristate	drivers/net/sh_eth.c	/^static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)$/;"	f	typeref:typename:int	file:
sh_eth_bb_set_mdc	drivers/net/sh_eth.c	/^static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
sh_eth_bb_set_mdio	drivers/net/sh_eth.c	/^static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)$/;"	f	typeref:typename:int	file:
sh_eth_config	drivers/net/sh_eth.c	/^static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)$/;"	f	typeref:typename:int	file:
sh_eth_desc_init	drivers/net/sh_eth.c	/^static int sh_eth_desc_init(struct sh_eth_dev *eth)$/;"	f	typeref:typename:int	file:
sh_eth_dev	drivers/net/sh_eth.h	/^struct sh_eth_dev {$/;"	s
sh_eth_halt	drivers/net/sh_eth.c	/^void sh_eth_halt(struct eth_device *dev)$/;"	f	typeref:typename:void
sh_eth_info	drivers/net/sh_eth.h	/^struct sh_eth_info {$/;"	s
sh_eth_init	drivers/net/sh_eth.c	/^int sh_eth_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int
sh_eth_initialize	drivers/net/sh_eth.c	/^int sh_eth_initialize(bd_t *bd)$/;"	f	typeref:typename:int
sh_eth_offset_fast_sh4	drivers/net/sh_eth.h	/^static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {$/;"	v	typeref:typename:const u16[]
sh_eth_offset_gigabit	drivers/net/sh_eth.h	/^static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = {$/;"	v	typeref:typename:const u16[]
sh_eth_offset_rz	drivers/net/sh_eth.h	/^static const u16 sh_eth_offset_rz[SH_ETH_MAX_REGISTER_OFFSET] = {$/;"	v	typeref:typename:const u16[]
sh_eth_phy_config	drivers/net/sh_eth.c	/^static int sh_eth_phy_config(struct sh_eth_dev *eth)$/;"	f	typeref:typename:int	file:
sh_eth_read	drivers/net/sh_eth.h	/^static inline unsigned long sh_eth_read(struct sh_eth_dev *eth,$/;"	f	typeref:typename:unsigned long
sh_eth_recv	drivers/net/sh_eth.c	/^int sh_eth_recv(struct eth_device *dev)$/;"	f	typeref:typename:int
sh_eth_reg_addr	drivers/net/sh_eth.h	/^static inline unsigned long sh_eth_reg_addr(struct sh_eth_dev *eth,$/;"	f	typeref:typename:unsigned long
sh_eth_reset	drivers/net/sh_eth.c	/^static int sh_eth_reset(struct sh_eth_dev *eth)$/;"	f	typeref:typename:int	file:
sh_eth_rx_desc_free	drivers/net/sh_eth.c	/^static void sh_eth_rx_desc_free(struct sh_eth_dev *eth)$/;"	f	typeref:typename:void	file:
sh_eth_rx_desc_init	drivers/net/sh_eth.c	/^static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)$/;"	f	typeref:typename:int	file:
sh_eth_send	drivers/net/sh_eth.c	/^int sh_eth_send(struct eth_device *dev, void *packet, int len)$/;"	f	typeref:typename:int
sh_eth_start	drivers/net/sh_eth.c	/^static void sh_eth_start(struct sh_eth_dev *eth)$/;"	f	typeref:typename:void	file:
sh_eth_stop	drivers/net/sh_eth.c	/^static void sh_eth_stop(struct sh_eth_dev *eth)$/;"	f	typeref:typename:void	file:
sh_eth_tx_desc_free	drivers/net/sh_eth.c	/^static void sh_eth_tx_desc_free(struct sh_eth_dev *eth)$/;"	f	typeref:typename:void	file:
sh_eth_tx_desc_init	drivers/net/sh_eth.c	/^static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)$/;"	f	typeref:typename:int	file:
sh_eth_write	drivers/net/sh_eth.h	/^static inline void sh_eth_write(struct sh_eth_dev *eth, unsigned long data,$/;"	f	typeref:typename:void
sh_flags	include/elf.h	/^	Elf32_Word	sh_flags;	\/* flags *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_genscc	arch/powerpc/include/asm/cpm_8260.h	/^	sccp_t  sh_genscc;$/;"	m	struct:scc_hdlc	typeref:typename:sccp_t
sh_gpio_direction_input	drivers/gpio/sh_pfc.c	/^static int sh_gpio_direction_input(unsigned offset)$/;"	f	typeref:typename:int	file:
sh_gpio_direction_output	drivers/gpio/sh_pfc.c	/^static int sh_gpio_direction_output(unsigned offset, int value)$/;"	f	typeref:typename:int	file:
sh_gpio_free	drivers/gpio/sh_pfc.c	/^static void sh_gpio_free(unsigned offset)$/;"	f	typeref:typename:void	file:
sh_gpio_get	drivers/gpio/sh_pfc.c	/^static int sh_gpio_get(unsigned offset)$/;"	f	typeref:typename:int	file:
sh_gpio_get_value	drivers/gpio/sh_pfc.c	/^static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)$/;"	f	typeref:typename:int	file:
sh_gpio_request	drivers/gpio/sh_pfc.c	/^static int sh_gpio_request(unsigned offset)$/;"	f	typeref:typename:int	file:
sh_gpio_set	drivers/gpio/sh_pfc.c	/^static void sh_gpio_set(unsigned offset, int value)$/;"	f	typeref:typename:void	file:
sh_gpio_set_value	drivers/gpio/sh_pfc.c	/^static void sh_gpio_set_value(struct pinmux_info *gpioc,$/;"	f	typeref:typename:void	file:
sh_haddr1	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_haddr1;      \/* user defined frm address 1 *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_haddr2	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_haddr2;      \/* user defined frm address 2 *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_haddr3	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_haddr3;      \/* user defined frm address 3 *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_haddr4	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_haddr4;      \/* user defined frm address 4 *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_hmask	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_hmask;       \/* user defined frm addr mask *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_i2c	drivers/i2c/sh_i2c.c	/^struct sh_i2c {$/;"	s	file:
sh_i2c	drivers/i2c/sh_sh7734_i2c.c	/^struct sh_i2c {$/;"	s	file:
sh_i2c_finish	drivers/i2c/sh_i2c.c	/^static void sh_i2c_finish(struct sh_i2c *dev)$/;"	f	typeref:typename:void	file:
sh_i2c_init	drivers/i2c/sh_i2c.c	/^sh_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)$/;"	f	typeref:typename:void	file:
sh_i2c_probe	drivers/i2c/sh_i2c.c	/^sh_i2c_probe(struct i2c_adapter *adap, u8 dev)$/;"	f	typeref:typename:int	file:
sh_i2c_raw_read	drivers/i2c/sh_i2c.c	/^static int sh_i2c_raw_read(struct sh_i2c *dev, u8 chip, u8 addr)$/;"	f	typeref:typename:int	file:
sh_i2c_raw_write	drivers/i2c/sh_i2c.c	/^sh_i2c_raw_write(struct sh_i2c *dev, u8 chip, uint addr, u8 val)$/;"	f	typeref:typename:int	file:
sh_i2c_read	drivers/i2c/sh_i2c.c	/^static int sh_i2c_read(struct i2c_adapter *adap, uint8_t chip,$/;"	f	typeref:typename:int	file:
sh_i2c_reset	drivers/i2c/sh_sh7734_i2c.c	/^static void sh_i2c_reset(struct sh_i2c *base)$/;"	f	typeref:typename:void	file:
sh_i2c_send_stop	drivers/i2c/sh_sh7734_i2c.c	/^static void sh_i2c_send_stop(struct sh_i2c *base)$/;"	f	typeref:typename:void	file:
sh_i2c_set_addr	drivers/i2c/sh_i2c.c	/^static int sh_i2c_set_addr(struct sh_i2c *dev, u8 chip, u8 addr, int stop)$/;"	f	typeref:typename:int	file:
sh_i2c_set_bus_speed	drivers/i2c/sh_i2c.c	/^static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
sh_i2c_write	drivers/i2c/sh_i2c.c	/^static int sh_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr,$/;"	f	typeref:typename:int	file:
sh_info	include/elf.h	/^	Elf32_Word	sh_info;	\/* extra information *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_irq_busy	drivers/i2c/sh_i2c.c	/^static void sh_irq_busy(struct sh_i2c *dev)$/;"	f	typeref:typename:void	file:
sh_irq_dte	drivers/i2c/sh_i2c.c	/^static void sh_irq_dte(struct sh_i2c *dev)$/;"	f	typeref:typename:void	file:
sh_irq_dte_with_tack	drivers/i2c/sh_i2c.c	/^static int sh_irq_dte_with_tack(struct sh_i2c *dev)$/;"	f	typeref:typename:int	file:
sh_link	include/elf.h	/^	Elf32_Word	sh_link;	\/* section header table index link *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_maxcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_maxcnt;      \/* maximum length counter *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_mflr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_mflr;        \/* maximum frame length reg *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_mmcif_bitclr	drivers/mmc/sh_mmcif.h	/^static inline void sh_mmcif_bitclr(u32 val, unsigned long *reg)$/;"	f	typeref:typename:void
sh_mmcif_bitset	drivers/mmc/sh_mmcif.h	/^static inline void sh_mmcif_bitset(u32 val, unsigned long *reg)$/;"	f	typeref:typename:void
sh_mmcif_cfg	drivers/mmc/sh_mmcif.c	/^static struct mmc_config sh_mmcif_cfg = {$/;"	v	typeref:struct:mmc_config	file:
sh_mmcif_clock_control	drivers/mmc/sh_mmcif.c	/^static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)$/;"	f	typeref:typename:void	file:
sh_mmcif_data_trans	drivers/mmc/sh_mmcif.c	/^static u32 sh_mmcif_data_trans(struct sh_mmcif_host *host,$/;"	f	typeref:typename:u32	file:
sh_mmcif_error_manage	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_error_manage(struct sh_mmcif_host *host)$/;"	f	typeref:typename:int	file:
sh_mmcif_get_cmd12response	drivers/mmc/sh_mmcif.c	/^static void sh_mmcif_get_cmd12response(struct sh_mmcif_host *host,$/;"	f	typeref:typename:void	file:
sh_mmcif_get_response	drivers/mmc/sh_mmcif.c	/^static void sh_mmcif_get_response(struct sh_mmcif_host *host,$/;"	f	typeref:typename:void	file:
sh_mmcif_host	drivers/mmc/sh_mmcif.h	/^struct sh_mmcif_host {$/;"	s
sh_mmcif_init	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sh_mmcif_intr	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_intr(void *dev_id)$/;"	f	typeref:typename:int	file:
sh_mmcif_multi_read	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_multi_read(struct sh_mmcif_host *host,$/;"	f	typeref:typename:int	file:
sh_mmcif_multi_write	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_multi_write(struct sh_mmcif_host *host,$/;"	f	typeref:typename:int	file:
sh_mmcif_ops	drivers/mmc/sh_mmcif.c	/^static const struct mmc_ops sh_mmcif_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
sh_mmcif_read	drivers/mmc/sh_mmcif.h	/^static inline u32 sh_mmcif_read(unsigned long *reg)$/;"	f	typeref:typename:u32
sh_mmcif_regs	drivers/mmc/sh_mmcif.h	/^struct sh_mmcif_regs {$/;"	s
sh_mmcif_request	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_request(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
sh_mmcif_set_cmd	drivers/mmc/sh_mmcif.c	/^static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,$/;"	f	typeref:typename:u32	file:
sh_mmcif_set_ios	drivers/mmc/sh_mmcif.c	/^static void sh_mmcif_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
sh_mmcif_single_read	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_single_read(struct sh_mmcif_host *host,$/;"	f	typeref:typename:int	file:
sh_mmcif_single_write	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_single_write(struct sh_mmcif_host *host,$/;"	f	typeref:typename:int	file:
sh_mmcif_start_cmd	drivers/mmc/sh_mmcif.c	/^static int sh_mmcif_start_cmd(struct sh_mmcif_host *host,$/;"	f	typeref:typename:int	file:
sh_mmcif_sync_reset	drivers/mmc/sh_mmcif.c	/^static void sh_mmcif_sync_reset(struct sh_mmcif_host *host)$/;"	f	typeref:typename:void	file:
sh_mmcif_write	drivers/mmc/sh_mmcif.h	/^static inline void sh_mmcif_write(u32 val, unsigned long *reg)$/;"	f	typeref:typename:void
sh_name	include/elf.h	/^	Elf32_Word	sh_name;	\/* name - index into section header$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_nmarc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_nmarc;       \/* nonmatching address rx cnt *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_offset	include/elf.h	/^	Elf32_Off	sh_offset;	\/* file offset *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Off
sh_qspi_init	drivers/spi/sh_qspi.c	/^static void sh_qspi_init(struct sh_qspi_slave *ss)$/;"	f	typeref:typename:void	file:
sh_qspi_regs	drivers/spi/sh_qspi.c	/^struct sh_qspi_regs {$/;"	s	file:
sh_qspi_slave	drivers/spi/sh_qspi.c	/^struct sh_qspi_slave {$/;"	s	file:
sh_retrc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_retrc;       \/* frame retransmission cnt *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_rfcnt	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_rfcnt;       \/* received frames count *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_rfthr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  sh_rfthr;       \/* received frames threshold *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
sh_sci	drivers/serial/serial_sh.c	/^static struct uart_port sh_sci = {$/;"	v	typeref:struct:uart_port	file:
sh_sdhi_cfg	drivers/mmc/sh_sdhi.c	/^static struct mmc_config sh_sdhi_cfg = {$/;"	v	typeref:struct:mmc_config	file:
sh_sdhi_clock_control	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_clock_control(struct sh_sdhi_host *host, unsigned long clk)$/;"	f	typeref:typename:int	file:
sh_sdhi_data_trans	drivers/mmc/sh_sdhi.c	/^static unsigned short sh_sdhi_data_trans(struct sh_sdhi_host *host,$/;"	f	typeref:typename:unsigned short	file:
sh_sdhi_detect	drivers/mmc/sh_sdhi.c	/^static void sh_sdhi_detect(struct sh_sdhi_host *host)$/;"	f	typeref:typename:void	file:
sh_sdhi_error_manage	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_error_manage(struct sh_sdhi_host *host)$/;"	f	typeref:typename:int	file:
sh_sdhi_get_response	drivers/mmc/sh_sdhi.c	/^static void sh_sdhi_get_response(struct sh_sdhi_host *host, struct mmc_cmd *cmd)$/;"	f	typeref:typename:void	file:
sh_sdhi_host	drivers/mmc/sh_sdhi.c	/^struct sh_sdhi_host {$/;"	s	file:
sh_sdhi_init	drivers/mmc/sh_sdhi.c	/^int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks)$/;"	f	typeref:typename:int
sh_sdhi_initialize	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_initialize(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sh_sdhi_intr	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_intr(void *dev_id)$/;"	f	typeref:typename:int	file:
sh_sdhi_multi_read	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
sh_sdhi_multi_write	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
sh_sdhi_ops	drivers/mmc/sh_sdhi.c	/^static const struct mmc_ops sh_sdhi_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
sh_sdhi_readw	drivers/mmc/sh_sdhi.c	/^static inline u16 sh_sdhi_readw(struct sh_sdhi_host *host, int reg)$/;"	f	typeref:typename:u16	file:
sh_sdhi_send_cmd	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
sh_sdhi_set_cmd	drivers/mmc/sh_sdhi.c	/^static unsigned short sh_sdhi_set_cmd(struct sh_sdhi_host *host,$/;"	f	typeref:typename:unsigned short	file:
sh_sdhi_set_ios	drivers/mmc/sh_sdhi.c	/^static void sh_sdhi_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
sh_sdhi_single_read	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
sh_sdhi_single_write	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_single_write(struct sh_sdhi_host *host,$/;"	f	typeref:typename:int	file:
sh_sdhi_start_cmd	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_start_cmd(struct sh_sdhi_host *host,$/;"	f	typeref:typename:int	file:
sh_sdhi_sync_reset	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_sync_reset(struct sh_sdhi_host *host)$/;"	f	typeref:typename:int	file:
sh_sdhi_wait_interrupt_flag	drivers/mmc/sh_sdhi.c	/^static int sh_sdhi_wait_interrupt_flag(struct sh_sdhi_host *host)$/;"	f	typeref:typename:int	file:
sh_sdhi_writew	drivers/mmc/sh_sdhi.c	/^static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val)$/;"	f	typeref:typename:void	file:
sh_serial_drv	drivers/serial/serial_sh.c	/^static struct serial_device sh_serial_drv = {$/;"	v	typeref:struct:serial_device	file:
sh_serial_getc	drivers/serial/serial_sh.c	/^static int sh_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sh_serial_getc	drivers/serial/serial_sh.c	/^static int sh_serial_getc(void)$/;"	f	typeref:typename:int	file:
sh_serial_getc_generic	drivers/serial/serial_sh.c	/^static int sh_serial_getc_generic(struct uart_port *port)$/;"	f	typeref:typename:int	file:
sh_serial_id	drivers/serial/serial_sh.c	/^static const struct udevice_id sh_serial_id[] ={$/;"	v	typeref:typename:const struct udevice_id[]	file:
sh_serial_init	drivers/serial/serial_sh.c	/^static int sh_serial_init(void)$/;"	f	typeref:typename:int	file:
sh_serial_init_generic	drivers/serial/serial_sh.c	/^static void sh_serial_init_generic(struct uart_port *port)$/;"	f	typeref:typename:void	file:
sh_serial_initialize	drivers/serial/serial_sh.c	/^void sh_serial_initialize(void)$/;"	f	typeref:typename:void
sh_serial_ofdata_to_platdata	drivers/serial/serial_sh.c	/^static int sh_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sh_serial_ops	drivers/serial/serial_sh.c	/^static const struct dm_serial_ops sh_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
sh_serial_pending	drivers/serial/serial_sh.c	/^static int sh_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
sh_serial_platdata	include/dm/platform_data/serial_sh.h	/^struct sh_serial_platdata {$/;"	s
sh_serial_probe	drivers/serial/serial_sh.c	/^static int sh_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sh_serial_putc	drivers/serial/serial_sh.c	/^static int sh_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
sh_serial_putc	drivers/serial/serial_sh.c	/^static void sh_serial_putc(const char c)$/;"	f	typeref:typename:void	file:
sh_serial_setbrg	drivers/serial/serial_sh.c	/^static int sh_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
sh_serial_setbrg	drivers/serial/serial_sh.c	/^static void sh_serial_setbrg(void)$/;"	f	typeref:typename:void	file:
sh_serial_setbrg_generic	drivers/serial/serial_sh.c	/^sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate)$/;"	f	typeref:typename:void	file:
sh_serial_tstc	drivers/serial/serial_sh.c	/^static int sh_serial_tstc(void)$/;"	f	typeref:typename:int	file:
sh_serial_tstc_generic	drivers/serial/serial_sh.c	/^static int sh_serial_tstc_generic(struct uart_port *port)$/;"	f	typeref:typename:int	file:
sh_serial_type	include/dm/platform_data/serial_sh.h	/^enum sh_serial_type {$/;"	g
sh_size	include/elf.h	/^	Elf32_Word	sh_size;	\/* section size *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sh_spi	drivers/spi/sh_spi.h	/^struct sh_spi {$/;"	s
sh_spi_clear_bit	drivers/spi/sh_spi.c	/^static void sh_spi_clear_bit(unsigned long val, unsigned long *reg)$/;"	f	typeref:typename:void	file:
sh_spi_read	drivers/spi/sh_spi.c	/^static unsigned long sh_spi_read(unsigned long *reg)$/;"	f	typeref:typename:unsigned long	file:
sh_spi_receive	drivers/spi/sh_spi.c	/^static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data,$/;"	f	typeref:typename:int	file:
sh_spi_regs	drivers/spi/sh_spi.h	/^struct sh_spi_regs {$/;"	s
sh_spi_send	drivers/spi/sh_spi.c	/^static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data,$/;"	f	typeref:typename:int	file:
sh_spi_set_bit	drivers/spi/sh_spi.c	/^static void sh_spi_set_bit(unsigned long val, unsigned long *reg)$/;"	f	typeref:typename:void	file:
sh_spi_set_cs	drivers/spi/sh_spi.c	/^static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs)$/;"	f	typeref:typename:void	file:
sh_spi_write	drivers/spi/sh_spi.c	/^static void sh_spi_write(unsigned long data, unsigned long *reg)$/;"	f	typeref:typename:void	file:
sh_type	include/elf.h	/^	Elf32_Word	sh_type;	\/* type *\/$/;"	m	struct:__anona52b83e50108	typeref:typename:Elf32_Word
sha0_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	sha0_fck: sha0_fck {$/;"	l
sha0_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	sha0_fck: sha0_fck {$/;"	l
sha1_context	include/u-boot/sha1.h	/^sha1_context;$/;"	t	typeref:struct:__anoncf962b200108
sha1_csum	lib/sha1.c	/^void sha1_csum(const unsigned char *input, unsigned int ilen,$/;"	f	typeref:typename:void
sha1_csum_wd	lib/sha1.c	/^void sha1_csum_wd(const unsigned char *input, unsigned int ilen,$/;"	f	typeref:typename:void
sha1_digest_emptymsg	drivers/crypto/ace_sha.c	/^static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {$/;"	v	typeref:typename:const unsigned char[]	file:
sha1_finish	lib/sha1.c	/^void sha1_finish (sha1_context * ctx, unsigned char output[20])$/;"	f	typeref:typename:void
sha1_hmac	lib/sha1.c	/^void sha1_hmac(const unsigned char *key, int keylen,$/;"	f	typeref:typename:void
sha1_padding	lib/sha1.c	/^static const unsigned char sha1_padding[64] = {$/;"	v	typeref:typename:const unsigned char[64]	file:
sha1_process	lib/sha1.c	/^static void sha1_process(sha1_context *ctx, const unsigned char data[64])$/;"	f	typeref:typename:void	file:
sha1_self_test	lib/sha1.c	/^int sha1_self_test (void)$/;"	f	typeref:typename:int
sha1_starts	lib/sha1.c	/^void sha1_starts (sha1_context * ctx)$/;"	f	typeref:typename:void
sha1_test_str	lib/sha1.c	/^static const char sha1_test_str[3][57] = {$/;"	v	typeref:typename:const char[3][57]	file:
sha1_test_sum	lib/sha1.c	/^static const unsigned char sha1_test_sum[3][20] = {$/;"	v	typeref:typename:const unsigned char[3][20]	file:
sha1_update	lib/sha1.c	/^void sha1_update(sha1_context *ctx, const unsigned char *input,$/;"	f	typeref:typename:void
sha256_context	include/u-boot/sha256.h	/^} sha256_context;$/;"	t	typeref:struct:__anon0de293ec0108
sha256_csum_wd	lib/sha256.c	/^void sha256_csum_wd(const unsigned char *input, unsigned int ilen,$/;"	f	typeref:typename:void
sha256_digest_emptymsg	drivers/crypto/ace_sha.c	/^static const unsigned char sha256_digest_emptymsg[SHA256_SUM_LEN] = {$/;"	v	typeref:typename:const unsigned char[]	file:
sha256_finish	lib/sha256.c	/^void sha256_finish(sha256_context * ctx, uint8_t digest[32])$/;"	f	typeref:typename:void
sha256_padding	lib/sha256.c	/^static uint8_t sha256_padding[64] = {$/;"	v	typeref:typename:uint8_t[64]	file:
sha256_process	lib/sha256.c	/^static void sha256_process(sha256_context *ctx, const uint8_t data[64])$/;"	f	typeref:typename:void	file:
sha256_starts	lib/sha256.c	/^void sha256_starts(sha256_context * ctx)$/;"	f	typeref:typename:void
sha256_update	lib/sha256.c	/^void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length)$/;"	f	typeref:typename:void
sha_clk	arch/arm/dts/sama5d2.dtsi	/^					sha_clk: sha_clk@12 {$/;"	l
sha_ctx	drivers/crypto/fsl/fsl_hash.h	/^struct sha_ctx {$/;"	s
sha_desc	drivers/crypto/fsl/fsl_hash.h	/^	uint32_t sha_desc[64];$/;"	m	struct:sha_ctx	typeref:typename:uint32_t[64]
sha_ord	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 sha_ord;		\/* Shareable Override *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
sha_ord	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 sha_ord;		\/* Shareable Override *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
shadow	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color shadow;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
shadowed_id	fs/yaffs2/yaffs_guts.h	/^	int shadowed_id;$/;"	m	struct:yaffs_shadow_fixer	typeref:typename:int
shadows_obj	fs/yaffs2/yaffs_guts.h	/^	int shadows_obj;	\/* This object header shadows the$/;"	m	struct:yaffs_obj_hdr	typeref:typename:int
sham	arch/arm/dts/am33xx.dtsi	/^		sham: sham@53100000 {$/;"	l
sham	arch/arm/dts/am4372.dtsi	/^		sham: sham@53100000 {$/;"	l
shape	drivers/demo/demo-shape.c	/^	static const struct shape {$/;"	s	function:shape_hello	file:
shape_data	drivers/demo/demo-shape.c	/^struct shape_data {$/;"	s	file:
shape_hello	drivers/demo/demo-shape.c	/^static int shape_hello(struct udevice *dev, int ch)$/;"	f	typeref:typename:int	file:
shape_ofdata_to_platdata	drivers/demo/demo-shape.c	/^static int shape_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
shape_ops	drivers/demo/demo-shape.c	/^static const struct demo_ops shape_ops = {$/;"	v	typeref:typename:const struct demo_ops	file:
shape_status	drivers/demo/demo-shape.c	/^static int shape_status(struct udevice *dev, int *status)$/;"	f	typeref:typename:int	file:
shareRead	fs/yaffs2/yaffsfs.c	/^	u8 shareRead:1;$/;"	m	struct:yaffsfs_FileDes	typeref:typename:u8:1	file:
shareWrite	fs/yaffs2/yaffsfs.c	/^	u8 shareWrite:1;$/;"	m	struct:yaffsfs_FileDes	typeref:typename:u8:1	file:
shared_conf	arch/arm/include/asm/ehci-omap.h	/^	u32 shared_conf;	\/* 0x30 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
sharedbus	drivers/net/ks8851_mll.c	/^	u16			sharedbus;$/;"	m	struct:ks_net	typeref:typename:u16	file:
sharing	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 sharing;		\/* 0x44 *\/$/;"	m	struct:sdrc	typeref:typename:u32
sharing	arch/arm/include/asm/arch-omap3/sys_proto.h	/^	u32 sharing;$/;"	m	struct:board_sdrc_timings	typeref:typename:u32
shc_board_early_init	board/bosch/shc/board.c	/^static void shc_board_early_init(void)$/;"	f	typeref:typename:void	file:
shc_eeprom	board/bosch/shc/board.h	/^struct  shc_eeprom {$/;"	s
shc_eeprom_valid	board/bosch/shc/board.c	/^static int shc_eeprom_valid;$/;"	v	typeref:typename:int	file:
shc_request_gpio	board/bosch/shc/board.c	/^static void shc_request_gpio(void)$/;"	f	typeref:typename:void	file:
shell_terminal	common/cli_hush.c	/^static unsigned int shell_terminal;$/;"	v	typeref:typename:unsigned int	file:
shell_ver	common/cli_hush.c	/^struct variables shell_ver = { "HUSH_VERSION", "0.01", 1, 1, 0 };$/;"	v	typeref:struct:variables
shift	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^			u32 shift;	\/* field shift *\/$/;"	m	struct:bcm_clk_div::__anona6938245010a::__anona69382450208	typeref:typename:u32
shift	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 shift;		\/* field shift *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
shift	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^			u32 shift;	\/* field shift *\/$/;"	m	struct:bcm_clk_div::__anone9f7c086010a::__anone9f7c0860208	typeref:typename:u32
shift	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 shift;		\/* field shift *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
shift	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int shift;$/;"	m	struct:tegra_xusb_padctl_lane	typeref:typename:unsigned int
shift	board/mpl/common/kbd.c	/^static unsigned char shift = 0;$/;"	v	typeref:typename:unsigned char	file:
shift	cmd/efi.c	/^	int shift;$/;"	m	struct:attr_info	typeref:typename:int	file:
shift	include/bedbug/ppc.h	/^  unsigned int	shift;		\/* How far to the right the operand$/;"	m	struct:operand	typeref:typename:unsigned int
shift	include/spi_flash.h	/^	u8 shift;$/;"	m	struct:spi_flash	typeref:typename:u8
shift_clk_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint shift_clk_opt;		\/* _DISP_SHIFT_CLOCK_OPTIONS_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
shift_count_type	arch/arc/lib/libgcc2.h	/^typedef int shift_count_type __attribute__((mode (__libgcc_shift_count__)));$/;"	t	typeref:typename:int
shift_dqs_en_when_shift_dqs	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	shift_dqs_en_when_shift_dqs;$/;"	m	struct:socfpga_sdram_io_config	typeref:typename:u8
shift_rows	lib/aes.c	/^static void shift_rows(u8 *state)$/;"	f	typeref:typename:void	file:
shipped	doc/README.x86	/^shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is$/;"	l
shl_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 shl_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
shl_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 shl_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
shl_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 shl_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
shld_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 shld_long (u32 d, u32 fill, u8 s)$/;"	f	typeref:typename:u32
shld_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 shld_word (u16 d, u16 fill, u8 s)$/;"	f	typeref:typename:u16
shmem_input	arch/arm/mach-meson/sm.c	/^static void *shmem_input;$/;"	v	typeref:typename:void *	file:
shmem_output	arch/arm/mach-meson/sm.c	/^static void *shmem_output;$/;"	v	typeref:typename:void *	file:
short_mem_test	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static int short_mem_test(void)$/;"	f	typeref:typename:int	file:
short_mem_test	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static int short_mem_test(void)$/;"	f	typeref:typename:int	file:
short_mem_test	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^static int short_mem_test(u32 *base_address)$/;"	f	typeref:typename:int	file:
short_name	fs/yaffs2/yaffs_guts.h	/^	YCHAR short_name[YAFFS_SHORT_NAME_LENGTH + 1];$/;"	m	struct:yaffs_obj	typeref:typename:YCHAR[]
short_not_ok	include/linux/usb/gadget.h	/^	unsigned		short_not_ok:1;$/;"	m	struct:usb_request	typeref:typename:unsigned:1
short_opts	arch/sandbox/cpu/os.c	/^static char *short_opts;$/;"	v	typeref:typename:char *	file:
short_packet_received	drivers/usb/gadget/f_mass_storage.c	/^	unsigned int		short_packet_received:1;$/;"	m	struct:fsg_common	typeref:typename:unsigned int:1	file:
short_spi_read	arch/powerpc/cpu/mpc5xx/spi.c	/^ssize_t short_spi_read (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
short_spi_write	arch/powerpc/cpu/mpc5xx/spi.c	/^ssize_t short_spi_write (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
shortlog	scripts/mailmapper	/^shortlog = subprocess.check_output(['git', 'shortlog', '-s', '-n', '-e'])$/;"	v
shortlog	scripts/mailmapper	/^shortlog = subprocess.check_output(['git', 'shortlog', '-s', '-n'])$/;"	v
shortname	drivers/usb/gadget/ether.c	/^static const char shortname[] = "ether";$/;"	v	typeref:typename:const char[]	file:
should_be_ff	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned should_be_ff;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned
should_load_env	common/board_r.c	/^static int should_load_env(void)$/;"	f	typeref:typename:int	file:
show	scripts/kconfig/qconf.cc	/^void ConfigLineEdit::show(ConfigItem* i)$/;"	f	class:ConfigLineEdit	typeref:typename:void
show	tools/moveconfig.py	/^    def show(self):$/;"	m	class:Progress
showAbout	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::showAbout(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
showAllAction	scripts/kconfig/qconf.cc	/^QAction *ConfigView::showAllAction;$/;"	m	class:ConfigView	typeref:typename:QAction *
showAllAction	scripts/kconfig/qconf.h	/^	static QAction *showAllAction;$/;"	m	class:ConfigView	typeref:typename:QAction *
showData	scripts/kconfig/qconf.h	/^	bool showData(void) const { return list->showData; }$/;"	f	class:ConfigView	typeref:typename:bool
showData	scripts/kconfig/qconf.h	/^	bool showName, showRange, showData;$/;"	m	class:ConfigList	typeref:typename:bool
showDebug	scripts/kconfig/qconf.h	/^	bool showDebug(void) const { return _showDebug; }$/;"	f	class:ConfigInfoView	typeref:typename:bool
showFullView	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::showFullView(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
showIntro	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::showIntro(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
showName	scripts/kconfig/qconf.h	/^	bool showName(void) const { return list->showName; }$/;"	f	class:ConfigView	typeref:typename:bool
showName	scripts/kconfig/qconf.h	/^	bool showName, showRange, showData;$/;"	m	class:ConfigList	typeref:typename:bool
showNormalAction	scripts/kconfig/qconf.cc	/^QAction *ConfigView::showNormalAction;$/;"	m	class:ConfigView	typeref:typename:QAction *
showNormalAction	scripts/kconfig/qconf.h	/^	static QAction *showNormalAction;$/;"	m	class:ConfigView	typeref:typename:QAction *
showPromptAction	scripts/kconfig/qconf.cc	/^QAction *ConfigView::showPromptAction;$/;"	m	class:ConfigView	typeref:typename:QAction *
showPromptAction	scripts/kconfig/qconf.h	/^	static QAction *showPromptAction;$/;"	m	class:ConfigView	typeref:typename:QAction *
showRange	scripts/kconfig/qconf.h	/^	bool showName, showRange, showData;$/;"	m	class:ConfigList	typeref:typename:bool
showRange	scripts/kconfig/qconf.h	/^	bool showRange(void) const { return list->showRange; }$/;"	f	class:ConfigView	typeref:typename:bool
showSingleView	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::showSingleView(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
showSplitView	scripts/kconfig/qconf.cc	/^void ConfigMainWindow::showSplitView(void)$/;"	f	class:ConfigMainWindow	typeref:typename:void
show_activity	board/a4m072/a4m072.c	/^void show_activity(int arg)$/;"	f	typeref:typename:void
show_addr	tools/fdtgrep.c	/^	int show_addr;		\/* Show address *\/$/;"	m	struct:display_info	typeref:typename:int	file:
show_all_items	scripts/kconfig/nconf.c	/^static int show_all_items;$/;"	v	typeref:typename:int	file:
show_all_options	scripts/kconfig/mconf.c	/^static int show_all_options;$/;"	v	typeref:typename:int	file:
show_block_marker	net/tftp.c	/^static void show_block_marker(void)$/;"	f	typeref:typename:void	file:
show_board_info	common/board_info.c	/^int show_board_info(void)$/;"	f	typeref:typename:int
show_boot_progress	arch/x86/cpu/cpu.c	/^void show_boot_progress(int val)$/;"	f	typeref:typename:void
show_boot_progress	board/Barix/ipam390/ipam390.c	/^void show_boot_progress(int status)$/;"	f	typeref:typename:void
show_boot_progress	board/Seagate/dockstar/dockstar.c	/^void show_boot_progress(int val)$/;"	f	typeref:typename:void
show_boot_progress	board/Seagate/goflexhome/goflexhome.c	/^void show_boot_progress(int val)$/;"	f	typeref:typename:void
show_boot_progress	board/a4m072/a4m072.c	/^void show_boot_progress(int status)$/;"	f	typeref:typename:void
show_boot_progress	board/armltd/integrator/integrator.c	/^void show_boot_progress(int progress)$/;"	f	typeref:typename:void
show_boot_progress	board/armltd/vexpress/vexpress_common.c	/^void show_boot_progress(int progress)$/;"	f	typeref:typename:void
show_boot_progress	board/bf533-stamp/bf533-stamp.c	/^void show_boot_progress(int status)$/;"	f	typeref:typename:void
show_boot_progress	board/bosch/shc/board.c	/^void show_boot_progress(int val)$/;"	f	typeref:typename:void
show_boot_progress	board/buffalo/lsxl/lsxl.c	/^void show_boot_progress(int progress)$/;"	f	typeref:typename:void
show_boot_progress	board/st/stv0991/stv0991.c	/^void show_boot_progress(int progress)$/;"	f	typeref:typename:void
show_boot_progress	board/technexion/tao3530/tao3530.c	/^void show_boot_progress(int val)$/;"	f	typeref:typename:void
show_boot_progress	board/ti/beagle/beagle.c	/^void show_boot_progress(int val)$/;"	f	typeref:typename:void
show_boot_progress	common/init/board_init.c	/^__weak void show_boot_progress(int val) {}$/;"	f	typeref:typename:__weak void
show_boot_progress	common/main.c	/^__weak void show_boot_progress(int val) {}$/;"	f	typeref:typename:__weak void
show_boot_progress	common/spl/spl.c	/^__weak void show_boot_progress(int val) {}$/;"	f	typeref:typename:__weak void
show_boot_progress	include/bootstage.h	/^#define show_boot_progress(/;"	d
show_bus	cmd/i2c.c	/^static void show_bus(struct udevice *bus)$/;"	f	typeref:typename:void	file:
show_cplb_table	cmd/cplbinfo.c	/^static void show_cplb_table(uint32_t *addr, uint32_t *data)$/;"	f	typeref:typename:void	file:
show_data1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkCheckMenuItem" id="show_data1">$/;"	i
show_devices	drivers/core/dump.c	/^static void show_devices(struct udevice *dev, int depth, int last_flag)$/;"	f	typeref:typename:void	file:
show_devname	fs/ubifs/ubifs.h	/^	int (*show_devname)(struct seq_file *, struct dentry *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct seq_file *,struct dentry *)
show_diff	tools/moveconfig.py	/^def show_diff(a, b, file_path, color_enabled):$/;"	f
show_dram_config	common/board_f.c	/^static int show_dram_config(void)$/;"	f	typeref:typename:int	file:
show_dts_version	tools/fdtgrep.c	/^	int show_dts_version;	\/* Put '\/dts-v1\/;' on the first line *\/$/;"	m	struct:display_info	typeref:typename:int	file:
show_eeprom	board/freescale/common/sys_eeprom.c	/^static void show_eeprom(void)$/;"	f	typeref:typename:void	file:
show_eeprom	board/varisys/common/sys_eeprom.c	/^void show_eeprom(void)$/;"	f	typeref:typename:void
show_failed_boards	tools/moveconfig.py	/^    def show_failed_boards(self):$/;"	m	class:Slots
show_frame	arch/m68k/lib/traps.c	/^static void show_frame(struct pt_regs *fp)$/;"	f	typeref:typename:void	file:
show_help	scripts/kconfig/mconf.c	/^static void show_help(struct menu *menu)$/;"	f	typeref:typename:void	file:
show_help	scripts/kconfig/nconf.c	/^static void show_help(struct menu *menu)$/;"	f	typeref:typename:void	file:
show_helptext	scripts/kconfig/mconf.c	/^static void show_helptext(const char *title, const char *text)$/;"	f	typeref:typename:void	file:
show_lcd	arch/sandbox/include/asm/state.h	/^	bool show_lcd;			\/* Show LCD on start-up *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
show_led	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^show_led:$/;"	l
show_menu	scripts/kconfig/nconf.c	/^static void show_menu(const char *prompt, const char *instructions,$/;"	f	typeref:typename:void	file:
show_name	scripts/kconfig/gconf.c	/^static gboolean show_name = TRUE;$/;"	v	typeref:typename:gboolean	file:
show_name1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkCheckMenuItem" id="show_name1">$/;"	i
show_offset	tools/fdtgrep.c	/^	int show_offset;	\/* Show offset *\/$/;"	m	struct:display_info	typeref:typename:int	file:
show_options	fs/ubifs/ubifs.h	/^	int (*show_options)(struct seq_file *, struct dentry *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct seq_file *,struct dentry *)
show_path	fs/ubifs/ubifs.h	/^	int (*show_path)(struct seq_file *, struct dentry *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct seq_file *,struct dentry *)
show_pld_regs	board/mpl/pati/pati.c	/^void show_pld_regs(void)$/;"	f	typeref:typename:void
show_post_progress	post/post.c	/^__weak void show_post_progress(unsigned int test_num, int before, int result)$/;"	f	typeref:typename:__weak void
show_range	scripts/kconfig/gconf.c	/^static gboolean show_range = TRUE;$/;"	v	typeref:typename:gboolean	file:
show_range1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkCheckMenuItem" id="show_range1">$/;"	i
show_region_list	tools/fdtgrep.c	/^static void show_region_list(struct fdt_region *reg, int count)$/;"	f	typeref:typename:void	file:
show_regs	arch/arc/lib/interrupts.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/arm/lib/interrupts.c	/^void show_regs (struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/arm/lib/interrupts_64.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/nds32/lib/interrupts.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc512x/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc5xx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc5xxx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc8260/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc83xx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc85xx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc86xx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/mpc8xx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_regs	arch/powerpc/cpu/ppc4xx/traps.c	/^void show_regs(struct pt_regs *regs)$/;"	f	typeref:typename:void
show_scroll_win	scripts/kconfig/nconf.gui.c	/^void show_scroll_win(WINDOW *main_window,$/;"	f	typeref:typename:void
show_self_hash	board/gdsys/p1022/controlcenterd-id.c	/^int show_self_hash(void)$/;"	f	typeref:typename:int
show_stats	fs/ubifs/ubifs.h	/^	int (*show_stats)(struct seq_file *, struct dentry *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct seq_file *,struct dentry *)
show_suspicious_boards	tools/moveconfig.py	/^    def show_suspicious_boards(self):$/;"	m	class:Slots
show_test_output	arch/sandbox/include/asm/state.h	/^	bool show_test_output;		\/* Don't suppress stdout in tests *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
show_textbox	scripts/kconfig/mconf.c	/^static void show_textbox(const char *title, const char *text, int r, int c)$/;"	f	typeref:typename:void	file:
show_textbox_ext	scripts/kconfig/mconf.c	/^static int show_textbox_ext(const char *title, char *text, int r, int c, int$/;"	f	typeref:typename:int	file:
show_time	cmd/sf.c	/^static void show_time(struct test_info *test, int stage)$/;"	f	typeref:typename:void	file:
show_time	test/dm/rtc.c	/^static void show_time(const char *msg, struct rtc_time *time)$/;"	f	typeref:typename:void	file:
show_type	scripts/checkpatch.pl	/^sub show_type {$/;"	s
show_valid_options	tools/mkimage.c	/^static int show_valid_options(enum ih_category category)$/;"	f	typeref:typename:int	file:
show_value	scripts/kconfig/gconf.c	/^static gboolean show_value = TRUE;$/;"	v	typeref:typename:gboolean	file:
shr_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 shr_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
shr_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 shr_long(u32 d, u8 s)$/;"	f	typeref:typename:u32
shr_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 shr_word(u16 d, u8 s)$/;"	f	typeref:typename:u16
shrd_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 shrd_long (u32 d, u32 fill, u8 s)$/;"	f	typeref:typename:u32
shrd_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 shrd_word (u16 d, u16 fill, u8 s)$/;"	f	typeref:typename:u16
shrink_liability	fs/ubifs/budget.c	/^static void shrink_liability(struct ubifs_info *c, int nr_to_write)$/;"	f	typeref:typename:void	file:
shrink_size	fs/yaffs2/yaffs_guts.h	/^	loff_t shrink_size;$/;"	m	struct:yaffs_file_var	typeref:typename:loff_t
shrinker_run_no	fs/ubifs/ubifs.h	/^	unsigned int shrinker_run_no;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int
sht	drivers/block/sata_dwc.h	/^	struct scsi_host_template	*sht;$/;"	m	struct:ata_port_info	typeref:struct:scsi_host_template *
shutdown	include/phy.h	/^	int (*shutdown)(struct phy_device *phydev);$/;"	m	struct:phy_driver	typeref:typename:int (*)(struct phy_device * phydev)
shutdown_work	drivers/mtd/ubi/wl.c	/^static void shutdown_work(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
shwver	board/siemens/draco/board.h	/^	char shwver[7];$/;"	m	struct:chip_data	typeref:typename:char[7]
si	drivers/bios_emulator/include/biosemu.h	/^	u16 si, si_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
si	drivers/bios_emulator/include/biosemu.h	/^	u16 si_hi, si;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
si	examples/api/glue.c	/^static struct sys_info si;$/;"	v	typeref:struct:sys_info	file:
si1	include/linux/immap_qe.h	/^	si1_t si1;		\/* SI *\/$/;"	m	struct:qe_immap	typeref:typename:si1_t
si1	include/linux/immap_qe.h	/^typedef struct si1 {$/;"	s
si1_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) si1_t;$/;"	t	typeref:struct:si1
si5328	arch/arm/dts/zynqmp-zcu102.dts	/^			si5328: clock-generator4@69 {\/* SI5328 - u20 *\/$/;"	l
si5341	arch/arm/dts/zynqmp-zcu102.dts	/^			si5341: clock-generator1@36 { \/* SI5341 - u69 *\/$/;"	l
si570	arch/arm/dts/zynq-zc702.dts	/^			si570: clock-generator@5d {$/;"	l
si570	arch/arm/dts/zynq-zc706.dts	/^			si570: clock-generator@5d {$/;"	l
si570	arch/arm/dts/zynq-zc770-xm013.dts	/^	si570: clock-generator@55 {$/;"	l
si570_1	arch/arm/dts/zynqmp-zcu102.dts	/^			si570_1: clock-generator2@5d { \/* USER SI570 - u42 *\/$/;"	l
si570_2	arch/arm/dts/zynqmp-zcu102.dts	/^			si570_2: clock-generator3@5d { \/* USER MGT SI570 - u56 *\/$/;"	l
si_amr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	si_amr;$/;"	m	struct:siram	typeref:typename:ushort
si_bmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	si_bmr;$/;"	m	struct:siram	typeref:typename:ushort
si_cmdr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	si_cmdr;$/;"	m	struct:siram	typeref:typename:u_char
si_cmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	si_cmr;$/;"	m	struct:siram	typeref:typename:ushort
si_dmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	si_dmr;$/;"	m	struct:siram	typeref:typename:ushort
si_gmr	arch/powerpc/include/asm/immap_8260.h	/^	u_char	si_gmr;$/;"	m	struct:siram	typeref:typename:u_char
si_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 si, si_hi;$/;"	m	struct:__anon964d10140408	typeref:typename:u16
si_hi	drivers/bios_emulator/include/biosemu.h	/^	u16 si_hi, si;$/;"	m	struct:__anon964d10140308	typeref:typename:u16
si_rsr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	si_rsr;$/;"	m	struct:siram	typeref:typename:ushort
si_str	arch/powerpc/include/asm/immap_8260.h	/^	u_char	si_str;$/;"	m	struct:siram	typeref:typename:u_char
siamr1	include/linux/immap_qe.h	/^	u16 siamr1;		\/* SI1 TDMA mode register *\/$/;"	m	struct:si1	typeref:typename:u16
sibling	include/linux/ioport.h	/^	struct resource *parent, *sibling, *child;$/;"	m	struct:resource	typeref:struct:resource *
sibling_node	include/dm/device.h	/^	struct list_head sibling_node;$/;"	m	struct:udevice	typeref:struct:list_head
sibling_node	include/dm/uclass.h	/^	struct list_head sibling_node;$/;"	m	struct:uclass	typeref:struct:list_head
siblings	fs/yaffs2/yaffs_guts.h	/^	struct list_head siblings;$/;"	m	struct:yaffs_obj	typeref:struct:list_head
sibmr1	include/linux/immap_qe.h	/^	u16 sibmr1;		\/* SI1 TDMB mode register *\/$/;"	m	struct:si1	typeref:typename:u16
sicfr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sicfr;		\/* System Global Interrupt Configuration Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sicmdr1_h	include/linux/immap_qe.h	/^	u8 sicmdr1_h;		\/* SI1 command register high *\/$/;"	m	struct:si1	typeref:typename:u8
sicmdr1_l	include/linux/immap_qe.h	/^	u8 sicmdr1_l;		\/* SI1 command register low 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sicmr1	include/linux/immap_qe.h	/^	u16 sicmr1;		\/* SI1 TDMC mode register *\/$/;"	m	struct:si1	typeref:typename:u16
sicnr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sicnr;		\/* System Internal Interrupt Control Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sicoltx	drivers/qe/uec.h	/^	u32  sicoltx;            \/* single collision *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
sicr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sicr;$/;"	m	struct:src	typeref:typename:u32
sicr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	sicr;		\/* PSC + 0x40 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
sicr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	sicr;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u16
sicr	drivers/spi/zynq_qspi.c	/^	u32 sicr;	\/* 0x24 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
sicr	include/mpc5xxx.h	/^	volatile u32	sicr;		\/* PSC + 0x40 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u32
sicrh	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sicrh;		\/* System I\/O Configuration Register High *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sicrl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sicrl;		\/* System I\/O Configuration Register Low *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sictrl	include/usb/ehci-ci.h	/^	u32	sictrl;		\/* 0x410 - System Interface Control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
sid	arch/arm/dts/sun4i-a10.dtsi	/^		sid: eeprom@01c23800 {$/;"	l
sid	arch/arm/dts/sun5i.dtsi	/^		sid: eeprom@01c23800 {$/;"	l
sid	arch/arm/dts/sun7i-a20.dtsi	/^		sid: eeprom@01c23800 {$/;"	l
sid	arch/m68k/include/asm/immap_5445x.h	/^	u32 sid;		\/* 0x2c Subsystem ID \/ Subsystem Vendor ID Register *\/$/;"	m	struct:pci	typeref:typename:u32
sid	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 sid;		\/* 0x2c Subsystem ID \/ Subsystem Vendor ID *\/$/;"	m	struct:pci	typeref:typename:u32
sidcr0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sidcr0;		\/* System I\/O Delay Configuration Register 0 *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sidcr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sidcr1;		\/* System I\/O Delay Configuration Register 1 *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sides	include/dm-demo.h	/^	int sides;$/;"	m	struct:dm_demo_pdata	typeref:typename:int
sidmr1	include/linux/immap_qe.h	/^	u16 sidmr1;		\/* SI1 TDMD mode register *\/$/;"	m	struct:si1	typeref:typename:u16
sie	arch/microblaze/include/asm/microblaze_intc.h	/^	int sie; \/* set interrupt enable bits *\/$/;"	m	struct:microblaze_intc_t	typeref:typename:int
siedm1	include/linux/immap_qe.h	/^	u8 siedm1;		\/* SI1 extended diagnostic mode register *\/$/;"	m	struct:si1	typeref:typename:u8
siemens_phy_reset	board/siemens/taurus/taurus.c	/^static void siemens_phy_reset(void)$/;"	f	typeref:typename:void	file:
siemr1	include/linux/immap_qe.h	/^	u16 siemr1;		\/* SI1 TDME mode register 16 bits *\/$/;"	m	struct:si1	typeref:typename:u16
siexr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	siexr;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
sifcr_h	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sifcr_h;		\/* System Internal Interrupt Force Register - High *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sifcr_l	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sifcr_l;		\/* System Internal Interrupt Force Register - Low *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sifmr1	include/linux/immap_qe.h	/^	u16 sifmr1;		\/* SI1 TDMF mode register 16 bits *\/$/;"	m	struct:si1	typeref:typename:u16
sig	arch/powerpc/include/asm/signal.h	/^	unsigned long sig[_NSIG_WORDS];$/;"	m	struct:__anon445c22580108	typeref:typename:unsigned long[]
sig	arch/x86/include/asm/sfi.h	/^	char	sig[SFI_SIGNATURE_SIZE];$/;"	m	struct:sfi_table_header	typeref:typename:char[]
sig	drivers/block/dwc_ahsata.c	/^	u32 sig;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
sig	drivers/block/fsl_sata.h	/^	u32 sig;		\/* Signature register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
sig	include/asm-generic/signal.h	/^	unsigned long sig[_NSIG_WORDS];$/;"	m	struct:__anon58b109860108	typeref:typename:unsigned long[]
sig	include/linux/mtd/nand.h	/^	u8 sig[4];             \/* 'E' 'P' 'P' 'S' *\/$/;"	m	struct:onfi_ext_param_page	typeref:typename:u8[4]
sig	include/linux/mtd/nand.h	/^	u8 sig[4];$/;"	m	struct:nand_jedec_params	typeref:typename:u8[4]
sig	include/linux/mtd/nand.h	/^	u8 sig[4];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[4]
sig_handler	scripts/kconfig/mconf.c	/^static void sig_handler(int signo)$/;"	f	typeref:typename:void	file:
sig_pad	disk/part_mac.h	/^	__u16	sig_pad;	\/* reserved				*\/$/;"	m	struct:mac_partition	typeref:typename:__u16
sig_raise	arch/arm/include/asm/arch-tegra/dc.h	/^	uint sig_raise;			\/* _CMD_SIGNAL_RAISE_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
sig_raise1	arch/arm/include/asm/arch-tegra/dc.h	/^	uint sig_raise1;		\/* _CMD_SIGNAL_RAISE1_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
sig_raise2	arch/arm/include/asm/arch-tegra/dc.h	/^	uint sig_raise2;		\/* _CMD_SIGNAL_RAISE2_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
sig_raise3	arch/arm/include/asm/arch-tegra/dc.h	/^	uint sig_raise3;		\/* _CMD_SIGNAL_RAISE3_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
sigaction	arch/powerpc/include/asm/signal.h	/^struct sigaction {$/;"	s
sigaltstack	arch/powerpc/include/asm/signal.h	/^typedef struct sigaltstack {$/;"	s
sigcap	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 sigcap;		\/* 0x254 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
sigcontext_struct	arch/powerpc/include/asm/sigcontext.h	/^struct sigcontext_struct {$/;"	s
siglmg1_l	include/linux/immap_qe.h	/^	u8 siglmg1_l;		\/* SI1 global mode register low 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
siglmr1_h	include/linux/immap_qe.h	/^	u8 siglmr1_h;		\/* SI1 global mode register high *\/$/;"	m	struct:si1	typeref:typename:u8
sigma	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 sigma[25];	\/* 0x28-0x88 Error Location Sigma Registers *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[25]
sigma	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 sigma[33];	\/* 0x28-0xA8 Error Location Sigma Registers *\/$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32[33]
sigma0	fs/zfs/zfs_sha256.c	/^#define	sigma0(/;"	d	file:
sigma1	fs/zfs/zfs_sha256.c	/^#define	sigma1(/;"	d	file:
sigmr1	include/linux/immap_qe.h	/^	u16 sigmr1;		\/* SI1 TDMG mode register 16 bits *\/$/;"	m	struct:si1	typeref:typename:u16
sign	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint64_t sign;				\/* Offset 0x0000 *\/$/;"	m	struct:vpd_region	typeref:typename:uint64_t
sign	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u64	sign;			\/* Offset 0x0000 *\/$/;"	m	struct:upd_region	typeref:typename:u64
sign	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u64	sign;			\/* Offset 0x0000 *\/$/;"	m	struct:vpd_region	typeref:typename:u64
sign	arch/x86/include/asm/fsp/fsp_fv.h	/^	u32			sign;$/;"	m	struct:fv_header	typeref:typename:u32
sign	arch/x86/include/asm/fsp/fsp_infoheader.h	/^	u32	sign;			\/* 'FSPH' *\/$/;"	m	struct:fsp_header	typeref:typename:u32
sign	include/image.h	/^	int (*sign)(struct image_sign_info *info,$/;"	m	struct:image_sig_algo	typeref:typename:int (*)(struct image_sign_info * info,const struct image_region region[],int region_count,uint8_t ** sigp,uint * sig_len)
sign	include/vxworks.h	/^	u32 sign;	\/* "SMAP" signature *\/$/;"	m	struct:e820info	typeref:typename:u32
sign_buffer	tools/socfpgaimage.c	/^static int sign_buffer(uint8_t *buf,$/;"	f	typeref:typename:int	file:
sign_calc	drivers/video/fsl_dcu_fb.c	/^	u32 sign_calc[2];$/;"	m	struct:dcu_reg	typeref:typename:u32[2]	file:
sign_data_block	arch/arm/mach-tegra/tegra20/crypto.c	/^int sign_data_block(u8 *source, unsigned length, u8 *signature)$/;"	f	typeref:typename:int
sign_fit	test/py/tests/test_vboot.py	/^    def sign_fit(sha_algo):$/;"	f	function:test_vboot	file:
sign_len	include/fsl_validate.h	/^	u32 sign_len;		\/* length of the signature in bytes *\/$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
sign_object	arch/arm/mach-tegra/tegra20/crypto.c	/^static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst,$/;"	f	typeref:typename:void	file:
sign_wb_code	arch/arm/mach-tegra/tegra20/warmboot.c	/^static int sign_wb_code(u32 start, u32 length, int use_zero_key)$/;"	f	typeref:typename:int	file:
signal	arch/powerpc/include/asm/sigcontext.h	/^	int		signal;$/;"	m	struct:sigcontext_struct	typeref:typename:int
signal	include/linux/fb.h	/^	__u16 signal;			\/* Signal Type - see FB_SIGNAL_* *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
signalENABLE	include/lattice.h	/^#define signalENABLE	/;"	d
signalTCK	include/lattice.h	/^#define signalTCK	/;"	d
signalTDI	include/lattice.h	/^#define signalTDI	/;"	d
signalTMS	include/lattice.h	/^#define signalTMS	/;"	d
signalTRST	include/lattice.h	/^#define signalTRST	/;"	d
signal_error	examples/standalone/test_burst.c	/^static void signal_error(void)$/;"	f	typeref:typename:void	file:
signal_handler	tools/buildman/builder.py	/^    def signal_handler(self, signal, frame):$/;"	m	class:Builder
signal_init	examples/standalone/test_burst.c	/^static void signal_init(void)$/;"	f	typeref:typename:void	file:
signal_start	examples/standalone/test_burst.c	/^static void signal_start(void)$/;"	f	typeref:typename:void	file:
signals	drivers/reset/sandbox-reset.c	/^	struct sandbox_reset_signal signals[SANDBOX_RESET_SIGNALS];$/;"	m	struct:sandbox_reset	typeref:struct:sandbox_reset_signal[]	file:
signature	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		signature;$/;"	m	struct:spl_machine_param	typeref:typename:u32
signature	arch/x86/include/asm/acpi_table.h	/^	char signature[4];		\/* "FACS" *\/$/;"	m	struct:acpi_facs	typeref:typename:char[4]
signature	arch/x86/include/asm/acpi_table.h	/^	char signature[4];	\/* ACPI signature (4 ASCII characters) *\/$/;"	m	struct:acpi_table_header	typeref:typename:char[4]
signature	arch/x86/include/asm/acpi_table.h	/^	char signature[8];	\/* RSDP signature *\/$/;"	m	struct:acpi_rsdp	typeref:typename:char[8]
signature	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint64_t signature;			\/* Offset 0x0000 *\/$/;"	m	struct:upd_region	typeref:typename:uint64_t
signature	arch/x86/include/asm/coreboot_tables.h	/^	u8 signature[4];$/;"	m	struct:cb_header	typeref:typename:u8[4]
signature	arch/x86/include/asm/ist.h	/^	__u32 signature;$/;"	m	struct:ist_info	typeref:typename:__u32
signature	arch/x86/include/asm/mrccache.h	/^	u32	signature;	\/* "MRCD" *\/$/;"	m	struct:mrc_data_container	typeref:typename:u32
signature	arch/x86/include/asm/pirq_routing.h	/^	u32 signature;		\/* PIRQ_SIGNATURE *\/$/;"	m	struct:irq_routing_table	typeref:typename:u32
signature	board/kosagi/novena/novena.c	/^	uint8_t		signature[6];$/;"	m	struct:novena_eeprom_data	typeref:typename:uint8_t[6]	file:
signature	board/mpl/common/common_util.h	/^	char signature[4];$/;"	m	struct:__anondef55e280108	typeref:typename:char[4]
signature	disk/part_mac.h	/^	__u16	signature;	\/* expected to be MAC_DRIVER_MAGIC	*\/$/;"	m	struct:mac_driver_desc	typeref:typename:__u16
signature	disk/part_mac.h	/^	__u16	signature;	\/* expected to be MAC_PARTITION_MAGIC	*\/$/;"	m	struct:mac_partition	typeref:typename:__u16
signature	drivers/ddr/altera/sequencer.h	/^	u32 signature;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
signature	include/bmp_layout.h	/^	char signature[2];$/;"	m	struct:bmp_header	typeref:typename:char[2]
signature	include/cramfs/cramfs_fs.h	/^	u8 signature[16];		\/* "Compressed ROMFS" *\/$/;"	m	struct:cramfs_super	typeref:typename:u8[16]
signature	include/efi.h	/^	u64 signature;$/;"	m	struct:efi_table_hdr	typeref:typename:u64
signature	include/part_efi.h	/^	__le16 signature;$/;"	m	struct:_legacy_mbr	typeref:typename:__le16
signature	include/part_efi.h	/^	__le64 signature;$/;"	m	struct:_gpt_header	typeref:typename:__le64
signature	include/pci_rom.h	/^	uint16_t signature;$/;"	m	struct:pci_rom_header	typeref:typename:uint16_t
signature	include/pci_rom.h	/^	uint32_t signature;$/;"	m	struct:pci_rom_data	typeref:typename:uint32_t
signature	include/vbe.h	/^	char signature[4];$/;"	m	struct:vbe_info	typeref:typename:char[4]
signature	include/vbe.h	/^	u8 signature[4];$/;"	m	struct:vbe_screen_info_input	typeref:typename:u8[4]
signature	tools/mxsboot.c	/^	uint32_t			signature;$/;"	m	struct:mx28_sd_config_block	typeref:typename:uint32_t	file:
signature	tools/rkcommon.c	/^	uint32_t signature;$/;"	m	struct:header0_info	typeref:typename:uint32_t	file:
signature1	tools/mxsimage.h	/^	uint8_t		signature1[4];$/;"	m	struct:sb_boot_image_header	typeref:typename:uint8_t[4]
signature2	tools/mxsimage.h	/^	uint8_t		signature2[4];$/;"	m	struct:sb_boot_image_header	typeref:typename:uint8_t[4]
signo	arch/powerpc/lib/kgdb.c	/^	unsigned char signo;		\/* Signal that we map this trap into *\/$/;"	m	struct:hard_trap_info	typeref:typename:unsigned char	file:
sigset_t	arch/powerpc/include/asm/signal.h	/^} sigset_t;$/;"	t	typeref:struct:__anon445c22580108
sigset_t	include/asm-generic/signal.h	/^} sigset_t;$/;"	t	typeref:struct:__anon58b109860108
sigval	include/kgdb.h	/^		int sigval;$/;"	m	struct:__anon584037260208	typeref:typename:int
sihmr1	include/linux/immap_qe.h	/^	u16 sihmr1;		\/* SI1 TDMH mode register 16 bits *\/$/;"	m	struct:si1	typeref:typename:u16
sil1178_i2c	board/gdsys/common/osd.c	/^int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;$/;"	v	typeref:typename:int[]
sil3114_spin_down	drivers/block/sata_sil3114.c	/^u8 sil3114_spin_down (int num)$/;"	f	typeref:typename:u8
sil3114_spin_up	drivers/block/sata_sil3114.c	/^u8 sil3114_spin_up (int num)$/;"	f	typeref:typename:u8
sil_cmd_block	drivers/block/sata_sil.h	/^struct sil_cmd_block {$/;"	s
sil_cmd_identify_device	drivers/block/sata_sil.c	/^static int sil_cmd_identify_device(int dev, u16 *id)$/;"	f	typeref:typename:int	file:
sil_cmd_set_feature	drivers/block/sata_sil.c	/^static int sil_cmd_set_feature(int dev)$/;"	f	typeref:typename:int	file:
sil_cmd_soft_reset	drivers/block/sata_sil.c	/^static int sil_cmd_soft_reset(int dev)$/;"	f	typeref:typename:int	file:
sil_config_port	drivers/block/sata_sil.c	/^static void sil_config_port(void *port)$/;"	f	typeref:typename:void	file:
sil_exec_cmd	drivers/block/sata_sil.c	/^static int sil_exec_cmd(int dev, struct sil_cmd_block *pcmd, int tag)$/;"	f	typeref:typename:int	file:
sil_get_device_cache_line	drivers/block/sata_sil3114.c	/^static u8 sil_get_device_cache_line (pci_dev_t pdev)$/;"	f	typeref:typename:u8	file:
sil_init_port	drivers/block/sata_sil.c	/^static int sil_init_port(void *port)$/;"	f	typeref:typename:int	file:
sil_prb	drivers/block/sata_sil.h	/^struct sil_prb {$/;"	s
sil_read_fis	drivers/block/sata_sil.c	/^static void sil_read_fis(int dev, int tag, struct sata_fis_d2h *fis)$/;"	f	typeref:typename:void	file:
sil_sata	drivers/block/sata_sil.h	/^struct sil_sata {$/;"	s
sil_sata_cmd_flush_cache	drivers/block/sata_sil.c	/^static void sil_sata_cmd_flush_cache(int dev)$/;"	f	typeref:typename:void	file:
sil_sata_cmd_flush_cache_ext	drivers/block/sata_sil.c	/^static void sil_sata_cmd_flush_cache_ext(int dev)$/;"	f	typeref:typename:void	file:
sil_sata_dump_fis	drivers/block/sata_sil.c	/^static void sil_sata_dump_fis(struct sata_fis_d2h *s)$/;"	f	typeref:typename:void	file:
sil_sata_get_flush	drivers/block/sata_sil.c	/^static int sil_sata_get_flush(int dev)$/;"	f	typeref:typename:int	file:
sil_sata_get_flush_ext	drivers/block/sata_sil.c	/^static int sil_sata_get_flush_ext(int dev)$/;"	f	typeref:typename:int	file:
sil_sata_get_wcache	drivers/block/sata_sil.c	/^static int sil_sata_get_wcache(int dev)$/;"	f	typeref:typename:int	file:
sil_sata_init_wcache	drivers/block/sata_sil.c	/^static void sil_sata_init_wcache(int dev, u16 *id)$/;"	f	typeref:typename:void	file:
sil_sata_rw_cmd	drivers/block/sata_sil.c	/^static ulong sil_sata_rw_cmd(int dev, ulong start, ulong blkcnt,$/;"	f	typeref:typename:ulong	file:
sil_sata_rw_cmd_ext	drivers/block/sata_sil.c	/^static ulong sil_sata_rw_cmd_ext(int dev, ulong start, ulong blkcnt,$/;"	f	typeref:typename:ulong	file:
sil_sata_rw_lba28	drivers/block/sata_sil.c	/^static ulong sil_sata_rw_lba28(int dev, ulong blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong	file:
sil_sata_rw_lba48	drivers/block/sata_sil.c	/^static ulong sil_sata_rw_lba48(int dev, ulong blknr, lbaint_t blkcnt,$/;"	f	typeref:typename:ulong	file:
sil_sge	drivers/block/sata_sil.h	/^struct sil_sge {$/;"	s
silent	scripts/kconfig/Makefile	/^silent := -s$/;"	m
silent	scripts/kconfig/mconf.c	/^static int silent;$/;"	v	typeref:typename:int	file:
silent_boot	board/tqc/tqm5200/tqm5200.c	/^int silent_boot (void)$/;"	f	typeref:typename:int
silent_dump	tools/mxsimage.c	/^	unsigned int			silent_dump:1;$/;"	m	struct:sb_image_ctx	typeref:typename:unsigned int:1	file:
silent_gen_xml	doc/DocBook/Makefile	/^silent_gen_xml = :$/;"	m
silentoldconfig	scripts/kconfig/Makefile	/^silentoldconfig: $(obj)\/conf$/;"	t
silentoldconfig	scripts/kconfig/conf.c	/^	silentoldconfig,$/;"	e	enum:input_mode	file:
silicon	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 silicon;$/;"	v	typeref:typename:u32
silicon_delay	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^	u32 silicon_delay;$/;"	m	struct:hws_tip_static_config_info	typeref:typename:u32
silicon_delay	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^u32 silicon_delay[HWS_MAX_DEVICE_NUM];$/;"	v	typeref:typename:u32[]
siliconid1	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	siliconid1;			\/* 0x00 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
siliconid2	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	siliconid2;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
sim	arch/m68k/include/asm/immap_5307.h	/^typedef struct sim {$/;"	s
sim_t	arch/m68k/include/asm/immap_5307.h	/^} sim_t;$/;"	t	typeref:struct:sim
simenable	drivers/usb/musb/omap3.c	/^	u32	simenable;$/;"	m	struct:omap3_otg_regs	typeref:typename:u32	file:
siml1	include/linux/immap_qe.h	/^	u32 siml1;		\/* SI1 multiframe limit register *\/$/;"	m	struct:si1	typeref:typename:u32
simple	include/fsl-mc/fsl_dpaa_fd.h	/^		} simple;$/;"	m	union:dpaa_fd::__anonb79f23a2010a	typeref:struct:dpaa_fd::__anonb79f23a2010a::dpaa_fd_simple
simple	include/fsl-mc/fsl_qbman_base.h	/^		} simple;$/;"	m	union:qbman_fd::__anonb88dd6cc010a	typeref:struct:qbman_fd::__anonb88dd6cc010a::qbman_fd_simple
simple-targets	scripts/kconfig/Makefile	/^simple-targets := oldconfig allnoconfig allyesconfig allmodconfig \\$/;"	m
simple_bus_plat	drivers/core/simple-bus.c	/^struct simple_bus_plat {$/;"	s	file:
simple_bus_post_bind	drivers/core/simple-bus.c	/^static int simple_bus_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
simple_bus_translate	drivers/core/simple-bus.c	/^fdt_addr_t simple_bus_translate(struct udevice *dev, fdt_addr_t addr)$/;"	f	typeref:typename:fdt_addr_t
simple_ddr	include/mpc5xxx.h	/^	volatile u32 simple_ddr;	\/* GPIO + 0x0c *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u32
simple_dvo	include/mpc5xxx.h	/^	volatile u32 simple_dvo;	\/* GPIO + 0x10 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u32
simple_gpioe	include/mpc5xxx.h	/^	volatile u32 simple_gpioe;	\/* GPIO + 0x04 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u32
simple_hello	drivers/demo/demo-simple.c	/^static int simple_hello(struct udevice *dev, int ch)$/;"	f	typeref:typename:int	file:
simple_itoa	lib/vsprintf.c	/^char *simple_itoa(ulong i)$/;"	f	typeref:typename:char *
simple_ival	include/mpc5xxx.h	/^	volatile u32 simple_ival;	\/* GPIO + 0x14 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u32
simple_ode	include/mpc5xxx.h	/^	volatile u32 simple_ode;	\/* GPIO + 0x08 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u32
simple_ops	drivers/demo/demo-simple.c	/^static const struct demo_ops simple_ops = {$/;"	v	typeref:typename:const struct demo_ops	file:
simple_panel_enable_backlight	drivers/video/simple_panel.c	/^static int simple_panel_enable_backlight(struct udevice *dev)$/;"	f	typeref:typename:int	file:
simple_panel_ids	drivers/video/simple_panel.c	/^static const struct udevice_id simple_panel_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
simple_panel_ofdata_to_platdata	drivers/video/simple_panel.c	/^static int simple_panel_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
simple_panel_ops	drivers/video/simple_panel.c	/^static const struct panel_ops simple_panel_ops = {$/;"	v	typeref:typename:const struct panel_ops	file:
simple_panel_priv	drivers/video/simple_panel.c	/^struct simple_panel_priv {$/;"	s	file:
simple_panel_probe	drivers/video/simple_panel.c	/^static int simple_panel_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
simple_strtol	lib/strto.c	/^long simple_strtol(const char *cp, char **endp, unsigned int base)$/;"	f	typeref:typename:long
simple_strtoul	lib/strto.c	/^unsigned long simple_strtoul(const char *cp, char **endp,$/;"	f	typeref:typename:unsigned long
simple_strtoull	lib/strto.c	/^unsigned long long simple_strtoull(const char *cp, char **endp,$/;"	f	typeref:typename:unsigned long long
simple_text_output_mode	include/efi_api.h	/^struct simple_text_output_mode {$/;"	s
simplefb_hdmi	arch/arm/dts/sun6i-a31.dtsi	/^		simplefb_hdmi: framebuffer@0 {$/;"	l
simplefb_lcd	arch/arm/dts/sun6i-a31.dtsi	/^		simplefb_lcd: framebuffer@1 {$/;"	l
simplefb_lcd	arch/arm/dts/sun8i-a23-a33.dtsi	/^		simplefb_lcd: framebuffer@0 {$/;"	l
simplex_claimed	drivers/block/sata_dwc.h	/^	struct ata_port		*simplex_claimed;$/;"	m	struct:ata_host	typeref:struct:ata_port *
simr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	simr;$/;"	m	struct:src	typeref:typename:u32
simr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	simr;$/;"	m	struct:src	typeref:typename:u32
simr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	simr;$/;"	m	struct:src	typeref:typename:u32
simr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 simr;$/;"	m	struct:src	typeref:typename:u32
simr0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 simr0;		\/* 0x1C Set Interrupt Mask *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
simr1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 simr1;		\/* 0x1C Set Interrupt Mask *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
simrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	simrh;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
simrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	simrl;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
simsr_h	arch/powerpc/include/asm/immap_83xx.h	/^	u32 simsr_h;		\/* System Internal Interrupt Mask Register - High *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
simsr_l	arch/powerpc/include/asm/immap_83xx.h	/^	u32 simsr_l;		\/* System Internal Interrupt Mask Register - Low *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
singfunc	scripts/docproc.c	/^static void singfunc(char * filename, char * line)$/;"	f	typeref:typename:void	file:
singleMode	scripts/kconfig/qconf.h	/^	singleMode, menuMode, symbolMode, fullMode, listMode$/;"	e	enum:listMode
single_D	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt single_D[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
single_Q	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt single_Q[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
single_S	drivers/ddr/fsl/options.c	/^static const struct dynamic_odt single_S[4] = {$/;"	v	typeref:typename:const struct dynamic_odt[4]	file:
single_erase	drivers/mtd/nand/nand_base.c	/^static int single_erase(struct mtd_info *mtd, int page)$/;"	f	typeref:typename:int	file:
single_in	drivers/bios_emulator/x86emu/prim_ops.c	/^static void single_in(int size)$/;"	f	typeref:typename:void	file:
single_menu_mode	scripts/kconfig/mconf.c	/^static int single_menu_mode;$/;"	v	typeref:typename:int	file:
single_menu_mode	scripts/kconfig/nconf.c	/^static int single_menu_mode;$/;"	v	typeref:typename:int	file:
single_out	drivers/bios_emulator/x86emu/prim_ops.c	/^static void single_out(int size)$/;"	f	typeref:typename:void	file:
single_step	arch/microblaze/include/asm/ptrace.h	/^	microblaze_reg_t single_step;	\/* 1 if in single step mode *\/$/;"	m	struct:pt_regs	typeref:typename:microblaze_reg_t
singlefunctions	scripts/docproc.c	/^FILELINE * singlefunctions;$/;"	v	typeref:typename:FILELINE *
sint_ddr	include/mpc5xxx.h	/^	volatile u8 sint_ddr;		\/* GPIO + 0x28 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sint_dvo	include/mpc5xxx.h	/^	volatile u8 sint_dvo;		\/* GPIO + 0x2c *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sint_gpioe	include/mpc5xxx.h	/^	volatile u8 sint_gpioe;		\/* GPIO + 0x20 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sint_inten	include/mpc5xxx.h	/^	volatile u8 sint_inten;		\/* GPIO + 0x30 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sint_istat	include/mpc5xxx.h	/^	volatile u8 sint_istat;		\/* GPIO + 0x3c *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sint_itype	include/mpc5xxx.h	/^	volatile u16 sint_itype;	\/* GPIO + 0x34 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u16
sint_ival	include/mpc5xxx.h	/^	volatile u8 sint_ival;		\/* GPIO + 0x3d *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sint_ode	include/mpc5xxx.h	/^	volatile u8 sint_ode;		\/* GPIO + 0x24 *\/$/;"	m	struct:mpc5xxx_gpio	typeref:typename:volatile u8
sio1007_clrsetbits	drivers/misc/smsc_sio1007.c	/^static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)$/;"	f	typeref:typename:void	file:
sio1007_enable_runtime	drivers/misc/smsc_sio1007.c	/^void sio1007_enable_runtime(int port, int iobase)$/;"	f	typeref:typename:void
sio1007_enable_serial	drivers/misc/smsc_sio1007.c	/^void sio1007_enable_serial(int port, int num, int iobase, int irq)$/;"	f	typeref:typename:void
sio1007_gpio_config	drivers/misc/smsc_sio1007.c	/^void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)$/;"	f	typeref:typename:void
sio1007_gpio_get_value	drivers/misc/smsc_sio1007.c	/^int sio1007_gpio_get_value(int port, int gpio)$/;"	f	typeref:typename:int
sio1007_gpio_set_value	drivers/misc/smsc_sio1007.c	/^void sio1007_gpio_set_value(int port, int gpio, int val)$/;"	f	typeref:typename:void
sio1007_read	drivers/misc/smsc_sio1007.c	/^static inline u8 sio1007_read(int port, int reg)$/;"	f	typeref:typename:u8	file:
sio1007_write	drivers/misc/smsc_sio1007.c	/^static inline void sio1007_write(int port, int reg, int val)$/;"	f	typeref:typename:void	file:
sio_com1	board/mpl/common/isa.c	/^const SIO_LOGDEV_TABLE sio_com1[] = {$/;"	v	typeref:typename:const SIO_LOGDEV_TABLE[]
sio_com2	board/mpl/common/isa.c	/^const SIO_LOGDEV_TABLE sio_com2[] = {$/;"	v	typeref:typename:const SIO_LOGDEV_TABLE[]
sio_conf_key	board/imgtec/malta/superio.c	/^enum sio_conf_key {$/;"	g	file:
sio_config	board/imgtec/malta/superio.c	/^} sio_config[] = {$/;"	v	typeref:struct:__anon9f50c37a0108[]
sio_fdc	board/mpl/common/isa.c	/^const SIO_LOGDEV_TABLE sio_fdc[] = {$/;"	v	typeref:typename:const SIO_LOGDEV_TABLE[]
sio_keyboard	board/mpl/common/isa.c	/^const SIO_LOGDEV_TABLE sio_keyboard[] = {$/;"	v	typeref:typename:const SIO_LOGDEV_TABLE[]
sio_pport	board/mpl/common/isa.c	/^const SIO_LOGDEV_TABLE sio_pport[] = {$/;"	v	typeref:typename:const SIO_LOGDEV_TABLE[]
sio_pport_fdc	board/mpl/common/isa.c	/^const SIO_LOGDEV_TABLE sio_pport_fdc[] = {$/;"	v	typeref:typename:const SIO_LOGDEV_TABLE[]
sipi_params	arch/x86/cpu/sipi_vector.S	/^sipi_params:$/;"	l
sipi_params	arch/x86/include/asm/sipi.h	/^struct sipi_params {$/;"	s
sipi_params_16bit	arch/x86/cpu/sipi_vector.S	/^sipi_params_16bit:$/;"	l
sipi_params_16bit	arch/x86/include/asm/sipi.h	/^struct __packed sipi_params_16bit {$/;"	s
sipnr_h	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sipnr_h;		\/* System Internal Interrupt Pending Register - High *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sipnr_l	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sipnr_l;		\/* System Internal Interrupt Pending Register - Low *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sipnrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sipnrh;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
sipnrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sipnrl;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
siprr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	siprr;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
siprr_a	arch/powerpc/include/asm/immap_83xx.h	/^	u32 siprr_a;		\/* System Internal Interrupt Group A Priority Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
siprr_b	arch/powerpc/include/asm/immap_83xx.h	/^	u32 siprr_b;		\/* System Internal Interrupt Group B Priority Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
siprr_c	arch/powerpc/include/asm/immap_83xx.h	/^	u32 siprr_c;		\/* System Internal Interrupt Group C Priority Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
siprr_d	arch/powerpc/include/asm/immap_83xx.h	/^	u32 siprr_d;		\/* System Internal Interrupt Group D Priority Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sir	include/linux/immap_qe.h	/^	sir_t sir;		\/* SI Routing Tables  *\/$/;"	m	struct:qe_immap	typeref:typename:sir_t
sir	include/linux/immap_qe.h	/^typedef struct sir {$/;"	s
sir_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) sir_t;$/;"	t	typeref:struct:sir
siram	arch/powerpc/include/asm/immap_8260.h	/^typedef struct siram {$/;"	s
siramctl_t	arch/powerpc/include/asm/immap_8260.h	/^} siramctl_t;$/;"	t	typeref:struct:siram
sirarc1	include/linux/immap_qe.h	/^	u8 sirarc1;		\/* SI1 RAM counter Rx TDMA *\/$/;"	m	struct:si1	typeref:typename:u8
sirbrc1	include/linux/immap_qe.h	/^	u8 sirbrc1;		\/* SI1 RAM counter Rx TDMB *\/$/;"	m	struct:si1	typeref:typename:u8
sirc_ctr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sirc_ctr;$/;"	m	struct:scsc_reg	typeref:typename:u32
sircrc1	include/linux/immap_qe.h	/^	u8 sircrc1;		\/* SI1 RAM counter Rx TDMC *\/$/;"	m	struct:si1	typeref:typename:u8
sirdrc1	include/linux/immap_qe.h	/^	u8 sirdrc1;		\/* SI1 RAM counter Rx TDMD *\/$/;"	m	struct:si1	typeref:typename:u8
sirerc1	include/linux/immap_qe.h	/^	u8 sirerc1;		\/* SI1 RAM counter Rx TDME 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sirfrc1	include/linux/immap_qe.h	/^	u8 sirfrc1;		\/* SI1 RAM counter Rx TDMF 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sirgrc1	include/linux/immap_qe.h	/^	u8 sirgrc1;		\/* SI1 RAM counter Rx TDMG 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sirhrc1	include/linux/immap_qe.h	/^	u8 sirhrc1;		\/* SI1 RAM counter Rx TDMH 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sirsr1_h	include/linux/immap_qe.h	/^	u16 sirsr1_h;		\/* SI1 RAM shadow address register high *\/$/;"	m	struct:si1	typeref:typename:u16
sirsr1_l	include/linux/immap_qe.h	/^	u16 sirsr1_l;		\/* SI1 RAM shadow address register low 16 bits *\/$/;"	m	struct:si1	typeref:typename:u16
sisg_clear	drivers/video/ipu_regs.h	/^	u32 sisg_clear[6];$/;"	m	struct:ipu_cm	typeref:typename:u32[6]
sisg_ctrl0	drivers/video/ipu_regs.h	/^	u32 sisg_ctrl0;$/;"	m	struct:ipu_cm	typeref:typename:u32
sisg_ctrl1	drivers/video/ipu_regs.h	/^	u32 sisg_ctrl1;$/;"	m	struct:ipu_cm	typeref:typename:u32
sisg_set	drivers/video/ipu_regs.h	/^	u32 sisg_set[6];$/;"	m	struct:ipu_cm	typeref:typename:u32[6]
sisr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	sisr;$/;"	m	struct:src	typeref:typename:u32
sisr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	sisr;$/;"	m	struct:src	typeref:typename:u32
sisr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	sisr;$/;"	m	struct:src	typeref:typename:u32
sistr1_h	include/linux/immap_qe.h	/^	u8 sistr1_h;		\/* SI1 status register high *\/$/;"	m	struct:si1	typeref:typename:u8
sistr1_l	include/linux/immap_qe.h	/^	u8 sistr1_l;		\/* SI1 status register low 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sit5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} sit5xx_t;$/;"	t	typeref:struct:sys_int_timers
sit8260_t	arch/powerpc/include/asm/immap_8260.h	/^} sit8260_t;$/;"	t	typeref:struct:sys_int_timers
sit8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} sit8xx_t;$/;"	t	typeref:struct:sys_int_timers
sit_piscr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort sit_piscr;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_piscr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	sit_piscr;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_piscr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	sit_piscr;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_pitc	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_pitc;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_pitc	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_pitc;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_pitc	arch/powerpc/include/asm/immap_8260.h	/^	uint	sit_pitc;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_pitr	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_pitr;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_pitr	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_pitr;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_pitr	arch/powerpc/include/asm/immap_8260.h	/^	uint	sit_pitr;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_rtc	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_rtc;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_rtc	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_rtc;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_rtcal	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_rtcal;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_rtcal	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_rtcal;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_rtcsc	arch/powerpc/include/asm/5xx_immap.h	/^	ushort sit_rtcsc;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_rtcsc	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	sit_rtcsc;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_rtsec	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_rtsec;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_rtsec	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_rtsec;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tbref0	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_tbref0;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tbref1	arch/powerpc/include/asm/5xx_immap.h	/^	uint sit_tbref1;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tbreff0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_tbreff0;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tbreff1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sit_tbreff1;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tbscr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort sit_tbscr;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_tbscr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	sit_tbscr;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sit_tmcnt	arch/powerpc/include/asm/immap_8260.h	/^	uint	sit_tmcnt;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tmcntal	arch/powerpc/include/asm/immap_8260.h	/^	uint	sit_tmcntal;$/;"	m	struct:sys_int_timers	typeref:typename:uint
sit_tmcntsc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	sit_tmcntsc;$/;"	m	struct:sys_int_timers	typeref:typename:ushort
sitarc1	include/linux/immap_qe.h	/^	u8 sitarc1;		\/* SI1 RAM counter Tx TDMA *\/$/;"	m	struct:si1	typeref:typename:u8
sitbrc1	include/linux/immap_qe.h	/^	u8 sitbrc1;		\/* SI1 RAM counter Tx TDMB *\/$/;"	m	struct:si1	typeref:typename:u8
sitcrc1	include/linux/immap_qe.h	/^	u8 sitcrc1;		\/* SI1 RAM counter Tx TDMC *\/$/;"	m	struct:si1	typeref:typename:u8
sitdrc1	include/linux/immap_qe.h	/^	u8 sitdrc1;		\/* SI1 RAM counter Tx TDMD *\/$/;"	m	struct:si1	typeref:typename:u8
siterc1	include/linux/immap_qe.h	/^	u8 siterc1;		\/* SI1 RAM counter Tx TDME 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sitfrc1	include/linux/immap_qe.h	/^	u8 sitfrc1;		\/* SI1 RAM counter Tx TDMF 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sitgrc1	include/linux/immap_qe.h	/^	u8 sitgrc1;		\/* SI1 RAM counter Tx TDMG 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sithrc1	include/linux/immap_qe.h	/^	u8 sithrc1;		\/* SI1 RAM counter Tx TDMH 8 bits *\/$/;"	m	struct:si1	typeref:typename:u8
sitk	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct sitk {$/;"	s
sitk	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct sitk {$/;"	s
sitk5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} sitk5xx_t;$/;"	t	typeref:struct:sitk
sitk8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} sitk8xx_t;$/;"	t	typeref:struct:sitk
sitk_piscrk	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_piscrk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_piscrk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_piscrk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_pitck	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_pitck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_pitck	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_pitck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtcalk	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_rtcalk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtcalk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_rtcalk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtck	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_rtck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtck	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_rtck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtcsck	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_rtcsck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtcsck	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_rtcsck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtseck	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_rtseck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_rtseck	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_rtseck;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbk	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_tbk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_tbk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbref0k	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_tbref0k;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbref1k	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_tbref1k;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbreff0k	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_tbreff0k;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbreff1k	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_tbreff1k;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbscrk	arch/powerpc/include/asm/5xx_immap.h	/^	uint sitk_tbscrk;$/;"	m	struct:sitk	typeref:typename:uint
sitk_tbscrk	arch/powerpc/include/asm/8xx_immap.h	/^	uint	sitk_tbscrk;$/;"	m	struct:sitk	typeref:typename:uint
siu	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct siu {$/;"	s
siu_t	arch/m68k/include/asm/immap_547x_8x.h	/^} siu_t;$/;"	t	typeref:struct:siu
sivcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 sivcr;		\/* System Global Interrupt Vector Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
sivec	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sivec;$/;"	m	struct:ccsr_cpm_intctl	typeref:typename:u32
size	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 size;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
size	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 size;$/;"	m	struct:de_vi::__anon5efd7b530208	typeref:typename:u32
size	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 size;$/;"	m	struct:de_glb	typeref:typename:u32
size	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 size; \/* For compat with dram.c files from u-boot-sunxi, unused *\/$/;"	m	struct:dram_para	typeref:typename:u32
size	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t size;$/;"	m	struct:mrq_module_load_request	typeref:typename:uint32_t
size	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t size;$/;"	m	struct:mrq_write_trace_request	typeref:typename:uint32_t
size	arch/arm/include/asm/arch-tegra/dc.h	/^	uint size;			\/* _WIN_SIZE_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
size	arch/arm/include/asm/arch/display2.h	/^		u32 size;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
size	arch/arm/include/asm/arch/display2.h	/^		u32 size;$/;"	m	struct:de_vi::__anon279c75ef0208	typeref:typename:u32
size	arch/arm/include/asm/arch/display2.h	/^	u32 size;$/;"	m	struct:de_glb	typeref:typename:u32
size	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 size; \/* For compat with dram.c files from u-boot-sunxi, unused *\/$/;"	m	struct:dram_para	typeref:typename:u32
size	arch/arm/include/asm/armv8/mmu.h	/^	u64 size;$/;"	m	struct:mm_region	typeref:typename:u64
size	arch/arm/include/asm/setup.h	/^		unsigned long size;$/;"	m	struct:meminfo::__anon61e8c52b0608	typeref:typename:unsigned long
size	arch/arm/include/asm/setup.h	/^	u32	size;$/;"	m	struct:tag_mem32	typeref:typename:u32
size	arch/arm/include/asm/setup.h	/^	u32 size;	\/* decompressed ramdisk size in _kilo_ bytes *\/$/;"	m	struct:tag_ramdisk	typeref:typename:u32
size	arch/arm/include/asm/setup.h	/^	u32 size;	\/* size of compressed ramdisk image in bytes *\/$/;"	m	struct:tag_initrd	typeref:typename:u32
size	arch/arm/include/asm/setup.h	/^	u32 size;$/;"	m	struct:tag_header	typeref:typename:u32
size	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		size;		\/* Size of block *\/$/;"	m	struct:spl_machine_param	typeref:typename:u32
size	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 size;$/;"	m	struct:mbus_win	typeref:typename:u32
size	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 size;$/;"	m	struct:orion5x_ddr_addr_decode_registers	typeref:typename:u32
size	arch/arm/mach-tegra/tegra186/nvtboot_mem.c	/^	u64 size;$/;"	m	struct:__anon231bbe050108	typeref:typename:u64	file:
size	arch/arm/mach-uniphier/init.h	/^	unsigned long size;$/;"	m	struct:uniphier_dram_ch	typeref:typename:unsigned long
size	arch/arm/mach-uniphier/micro-support-card.c	/^	unsigned long size;$/;"	m	struct:memory_bank	typeref:typename:unsigned long	file:
size	arch/avr32/include/asm/setup.h	/^	u32			size;$/;"	m	struct:tag_mem_range	typeref:typename:u32
size	arch/avr32/include/asm/setup.h	/^	u32 size;$/;"	m	struct:tag_header	typeref:typename:u32
size	arch/nds32/include/asm/setup.h	/^		unsigned long size;$/;"	m	struct:meminfo::__anon553264350208	typeref:typename:unsigned long
size	arch/nds32/include/asm/setup.h	/^	u32	size;$/;"	m	struct:tag_mem32	typeref:typename:u32
size	arch/nds32/include/asm/setup.h	/^	u32 size;	\/* decompressed ramdisk size in _kilo_ bytes *\/$/;"	m	struct:tag_ramdisk	typeref:typename:u32
size	arch/nds32/include/asm/setup.h	/^	u32 size;	\/* size of compressed ramdisk image in bytes *\/$/;"	m	struct:tag_initrd	typeref:typename:u32
size	arch/nds32/include/asm/setup.h	/^	u32 size;$/;"	m	struct:tag_header	typeref:typename:u32
size	arch/nds32/include/asm/u-boot.h	/^		unsigned long size;$/;"	m	struct:bd_info::__anond2dc725a0108	typeref:typename:unsigned long
size	arch/powerpc/cpu/mpc83xx/pcie.c	/^	u32 size;$/;"	m	struct:__anoncce71cd40108	typeref:typename:u32	file:
size	arch/powerpc/cpu/ppc4xx/sdram.h	/^	unsigned long size;$/;"	m	struct:sdram_conf_s	typeref:typename:unsigned long
size	arch/powerpc/cpu/ppc4xx/tlb.c	/^	u32 size;$/;"	m	struct:region	typeref:typename:u32	file:
size	arch/powerpc/include/asm/arch-mpc85xx/gpio.h	/^	unsigned long size;$/;"	m	struct:mpc85xx_gpio_plat	typeref:typename:unsigned long
size	arch/powerpc/include/asm/fsl_law.h	/^	enum law_size size;$/;"	m	struct:law_entry	typeref:enum:law_size
size	arch/powerpc/include/asm/fsl_pamu.h	/^	phys_size_t size[10];$/;"	m	struct:pamu_addr_tbl	typeref:typename:phys_size_t[10]
size	arch/powerpc/include/asm/immap_512x.h	/^	unsigned long size;$/;"	m	struct:sdram_conf_s	typeref:typename:unsigned long
size	arch/sparc/include/asm/prom.h	/^	unsigned int size;$/;"	m	struct:linux_prom_ebus_ranges	typeref:typename:unsigned int
size	arch/x86/cpu/intel_common/lpc.c	/^		u32 size;$/;"	m	struct:lpc_common_early_init::reg_info	typeref:typename:u32	file:
size	arch/x86/cpu/intel_common/microcode.c	/^	int size;$/;"	m	struct:microcode_update	typeref:typename:int	file:
size	arch/x86/cpu/interrupts.c	/^	unsigned short size;$/;"	m	struct:desc_ptr	typeref:typename:unsigned short	file:
size	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^		unsigned long long size;$/;"	m	struct:sysinfo_t::memrange	typeref:typename:unsigned long long
size	arch/x86/include/asm/coreboot_tables.h	/^	struct cbuint64 size;$/;"	m	struct:cb_memory_range	typeref:struct:cbuint64
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_cmos_checksum	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_cmos_defaults	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_cmos_entries	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_cmos_enums	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_cmos_option_table	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_console	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_forward	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_framebuffer	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_gpios	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_hwrpb	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_mainboard	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_memory	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_record	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_serial	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u32 size;$/;"	m	struct:cb_string	typeref:typename:u32
size	arch/x86/include/asm/coreboot_tables.h	/^	u64 size;$/;"	m	struct:cbmem_entry	typeref:typename:u64
size	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t size;	\/* size of the entire entry *\/$/;"	m	struct:cb_fdt	typeref:typename:uint32_t
size	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t size;	\/* size of the entire entry *\/$/;"	m	struct:cb_vdat	typeref:typename:uint32_t
size	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t size;$/;"	m	struct:cb_cbmem_tab	typeref:typename:uint32_t
size	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t size;$/;"	m	struct:cb_vbnv	typeref:typename:uint32_t
size	arch/x86/include/asm/e820.h	/^	__u64 size;	\/* size of memory segment *\/$/;"	m	struct:e820entry	typeref:typename:__u64
size	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			size[3];$/;"	m	struct:ffs_file_header	typeref:typename:u8[3]
size	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			size[3];$/;"	m	struct:ffs_file_header2	typeref:typename:u8[3]
size	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8	size[3];$/;"	m	struct:raw_section	typeref:typename:u8[3]
size	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8	size[3];$/;"	m	struct:raw_section2	typeref:typename:u8[3]
size	arch/x86/include/asm/global_data.h	/^	uint64_t size;$/;"	m	struct:memory_area	typeref:typename:uint64_t
size	arch/x86/include/asm/global_data.h	/^	uint64_t size;$/;"	m	struct:mtrr_request	typeref:typename:uint64_t
size	arch/x86/include/asm/me_common.h	/^	u32 size:6;$/;"	m	struct:me_uma	typeref:typename:u32:6
size	arch/x86/include/asm/pirq_routing.h	/^	u16 size;		\/* Table size in bytes *\/$/;"	m	struct:irq_routing_table	typeref:typename:u16
size	arch/xtensa/include/asm/bootparam.h	/^	unsigned short size;	\/* size of this record excluding the structure*\/$/;"	m	struct:bp_tag	typeref:typename:unsigned short
size	board/esd/pmc440/sdram.c	/^	ulong size;$/;"	m	struct:sdram_conf_s	typeref:typename:ulong	file:
size	board/keymile/km82xx/km82xx.c	/^	ulong size;$/;"	m	struct:sdram_conf_s	typeref:typename:ulong	file:
size	board/nokia/rx51/tag_omap.h	/^	u16 size;$/;"	m	struct:tag_omap_header	typeref:typename:u16
size	board/nokia/rx51/tag_omap.h	/^	u32 size;$/;"	m	struct:omap_fbmem_config	typeref:typename:u32
size	board/nokia/rx51/tag_omap.h	/^	unsigned int size;$/;"	m	struct:omap_partition_config	typeref:typename:unsigned int
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size	include/efi.h	/^	u32 size;$/;"	m	struct:efi_entry_hdr	typeref:typename:u32
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size	include/faraday/ftpci100.h	/^	unsigned int size;$/;"	m	struct:pcibar	typeref:typename:unsigned int
size	include/fat.h	/^	__u32	size;		\/* File size in bytes *\/$/;"	m	struct:dir_entry	typeref:typename:__u32
size	include/fdt.h	/^	fdt64_t size;$/;"	m	struct:fdt_reserve_entry	typeref:typename:fdt64_t
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size	include/image-sparse.h	/^	lbaint_t	size;$/;"	m	struct:sparse_storage	typeref:typename:lbaint_t
size	include/image.h	/^	int size;$/;"	m	struct:image_region	typeref:typename:int
size	include/jffs2/load_kernel.h	/^	u64 size;			\/* device size *\/$/;"	m	struct:mtdids	typeref:typename:u64
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size	include/linux/mtd/nand.h	/^	int size;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
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size	include/linux/mtd/ubi.h	/^	int size;$/;"	m	struct:ubi_volume_info	typeref:typename:int
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size	include/part.h	/^	lbaint_t	size;	\/* number of blocks in partition	*\/$/;"	m	struct:disk_partition	typeref:typename:lbaint_t
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size	include/pci_rom.h	/^	uint8_t size;$/;"	m	struct:pci_rom_header	typeref:typename:uint8_t
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size	include/ram.h	/^	size_t size;$/;"	m	struct:ram_info	typeref:typename:size_t
size	include/regmap.h	/^	ulong size;$/;"	m	struct:regmap_range	typeref:typename:ulong
size	include/search.h	/^	unsigned int size;$/;"	m	struct:hsearch_data	typeref:typename:unsigned int
size	include/spi_flash.h	/^	u32 size;$/;"	m	struct:spi_flash	typeref:typename:u32
size	include/spl.h	/^	u32 size;$/;"	m	struct:spl_image_info	typeref:typename:u32
size	include/video.h	/^	uint size;$/;"	m	struct:video_uc_platdata	typeref:typename:uint
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size	tools/aisimage.h	/^	uint32_t size;$/;"	m	struct:ais_cmd_load	typeref:typename:uint32_t
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size	tools/mxsimage.c	/^	uint32_t			size;$/;"	m	struct:sb_dcd_ctx	typeref:typename:uint32_t	file:
size	tools/mxsimage.c	/^	uint32_t			size;$/;"	m	struct:sb_section_ctx	typeref:typename:uint32_t	file:
size4	disk/part_dos.h	/^	unsigned char size4[4];		\/* nr of sectors in partition		*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char[4]
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size_dataflash	drivers/mtd/dataflash.c	/^int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr,$/;"	f	typeref:typename:int
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size_hi	arch/sparc/include/asm/prom.h	/^	unsigned int size_hi;$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
size_hi	arch/sparc/include/asm/prom.h	/^	unsigned int size_hi;$/;"	m	struct:linux_prom_pci_registers	typeref:typename:unsigned int
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size_lo	arch/sparc/include/asm/prom.h	/^	unsigned int size_lo;$/;"	m	struct:linux_prom_pci_ranges	typeref:typename:unsigned int
size_lo	arch/sparc/include/asm/prom.h	/^	unsigned int size_lo;$/;"	m	struct:linux_prom_pci_registers	typeref:typename:unsigned int
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size_t	include/linux/types.h	/^typedef __kernel_size_t		size_t;$/;"	t	typeref:typename:__kernel_size_t
size_tree	fs/ubifs/ubifs.h	/^	struct rb_root size_tree;$/;"	m	struct:ubifs_info	typeref:struct:rb_root
sizeof_partition_entry	include/part_efi.h	/^	__le32 sizeof_partition_entry;$/;"	m	struct:_gpt_header	typeref:typename:__le32
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sja1000_basic_s	include/sja1000.h	/^struct sja1000_basic_s {$/;"	s
sjc_resp0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sjc_resp0;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
sjc_resp1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sjc_resp1;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
sjc_resp_high	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 sjc_resp_high;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
sjc_resp_high	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 sjc_resp_high;$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32
sjc_resp_low	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 sjc_resp_low;$/;"	m	struct:fuse_bank4_regs	typeref:typename:u32
sjc_resp_low	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 sjc_resp_low;$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32
sk	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 sk;$/;"	m	struct:wdog_regs	typeref:typename:u32
skew_array	drivers/ddr/marvell/axp/ddr3_pbs.c	/^static u32 skew_array[(MAX_PUP_NUM) * DQ_NUM] = { 0 };$/;"	v	typeref:typename:u32[]	file:
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skha_t	arch/m68k/include/asm/coldfire/skha.h	/^} skha_t;$/;"	t	typeref:struct:skha_ctrl
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skip_checkpt_wr	fs/yaffs2/yaffs_guts.h	/^	u8 skip_checkpt_wr;$/;"	m	struct:yaffs_param	typeref:typename:u8
skip_debug_init	arch/powerpc/cpu/ppc4xx/start.S	/^skip_debug_init:$/;"	l
skip_delay_mask	drivers/ddr/altera/sequencer.c	/^static u16 skip_delay_mask;	\/* mask off bits when skipping\/not-skipping *\/$/;"	v	typeref:typename:u16	file:
skip_delays	arch/sandbox/include/asm/state.h	/^	bool skip_delays;		\/* Ignore any time delays (for test) *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
skip_erased_check	fs/yaffs2/yaffs_guts.h	/^	u32 skip_erased_check:1;\/* Skip the erased check on this block *\/$/;"	m	struct:yaffs_block_info	typeref:typename:u32:1
skip_errata_430973	arch/arm/cpu/armv7/start.S	/^skip_errata_430973:$/;"	l
skip_errata_454179	arch/arm/cpu/armv7/start.S	/^skip_errata_454179:$/;"	l
skip_errata_621766	arch/arm/cpu/armv7/start.S	/^skip_errata_621766:$/;"	l
skip_errata_798870	arch/arm/cpu/armv7/start.S	/^skip_errata_798870:$/;"	l
skip_errata_801819	arch/arm/cpu/armv7/start.S	/^skip_errata_801819:$/;"	l
skip_hob	arch/x86/cpu/start.S	/^skip_hob:$/;"	l
skip_init	include/dm/platform_data/serial_bcm283x_mu.h	/^	bool skip_init;$/;"	m	struct:bcm283x_mu_serial_platdata	typeref:typename:bool
skip_init	include/dm/platform_data/serial_pl01x.h	/^	bool skip_init;$/;"	m	struct:pl01x_serial_platdata	typeref:typename:bool
skip_memsetup	board/pb1x00/lowlevel_init.S	/^skip_memsetup:$/;"	l
skip_num	common/env_flags.c	/^static void skip_num(int hex, const char *value, const char **end,$/;"	f	typeref:typename:void	file:
skip_ofs	cmd/onenand.c	/^static loff_t skip_ofs;$/;"	v	typeref:typename:loff_t	file:
skip_post_probe	include/dm/test.h	/^	int skip_post_probe;$/;"	m	struct:dm_test_state	typeref:typename:int
skip_preamble	drivers/spi/exynos_spi.c	/^	int skip_preamble;$/;"	m	struct:exynos_spi_priv	typeref:typename:int	file:
skip_sdram_setup	board/freescale/mx35pdk/lowlevel_init.S	/^skip_sdram_setup:$/;"	l
skip_set_mode	board/freescale/mx35pdk/lowlevel_init.S	/^skip_set_mode:$/;"	l
skip_space	examples/standalone/smc911x_eeprom.c	/^static char *skip_space(char *buf)$/;"	f	typeref:typename:char *	file:
skip_spaces	lib/linux_string.c	/^char *skip_spaces(const char *str)$/;"	f	typeref:typename:char *
skip_timeout	drivers/net/sandbox.c	/^static bool skip_timeout;$/;"	v	typeref:typename:bool	file:
skip_to_next_device	drivers/pci/pci-uclass.c	/^static int skip_to_next_device(struct udevice *bus, struct udevice **devp)$/;"	f	typeref:typename:int	file:
skipcpy	tools/imagetool.h	/^	int skipcpy;$/;"	m	struct:image_tool_params	typeref:typename:int
sku_id	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 sku_id;		\/* 0x0c *\/$/;"	m	struct:ctrl_id	typeref:typename:u32
sku_info	arch/arm/include/asm/arch-tegra/fuse.h	/^	u32 sku_info;			\/* 0x110 *\/$/;"	m	struct:fuse_regs	typeref:typename:u32
sku_number	include/smbios.h	/^	u8 sku_number;$/;"	m	struct:smbios_type1	typeref:typename:u8
sl	arch/arm/include/asm/proc-armv/processor.h	/^	unsigned long sl;$/;"	m	struct:context_save_struct	typeref:typename:unsigned long
sl	drivers/video/mx3fb.c	/^	u32	sl:14;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:14	file:
sl	drivers/video/mx3fb.c	/^	u32	sl:14;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:14	file:
sl0adj	arch/m68k/include/asm/immap_5441x.h	/^	u32 sl0adj;		\/* 0x194 *\/$/;"	m	struct:sdramc	typeref:typename:u32
sl1adj	arch/m68k/include/asm/immap_5441x.h	/^	u32 sl1adj;		\/* 0x198 *\/$/;"	m	struct:sdramc	typeref:typename:u32
sl2adj	arch/m68k/include/asm/immap_5441x.h	/^	u32 sl2adj;		\/* 0x19C *\/$/;"	m	struct:sdramc	typeref:typename:u32
sl3adj	arch/m68k/include/asm/immap_5441x.h	/^	u32 sl3adj;		\/* 0x1A0 *\/$/;"	m	struct:sdramc	typeref:typename:u32
sl4adj	arch/m68k/include/asm/immap_5441x.h	/^	u32 sl4adj;		\/* 0x1A4 *\/$/;"	m	struct:sdramc	typeref:typename:u32
sl811_hc_reset	drivers/usb/host/sl811-hcd.c	/^static int sl811_hc_reset(void)$/;"	f	typeref:typename:int	file:
sl811_read	drivers/usb/host/sl811-hcd.c	/^static __u8 sl811_read (__u8 index)$/;"	f	typeref:typename:__u8	file:
sl811_read_buf	drivers/usb/host/sl811-hcd.c	/^static void inline sl811_read_buf(__u8 offset, __u8 *buf, __u8 size)$/;"	f	typeref:typename:void	file:
sl811_rh_config_des	drivers/usb/host/sl811-hcd.c	/^static __u8 sl811_rh_config_des[] =$/;"	v	typeref:typename:__u8[]	file:
sl811_rh_dev_des	drivers/usb/host/sl811-hcd.c	/^static __u8 sl811_rh_dev_des[] =$/;"	v	typeref:typename:__u8[]	file:
sl811_rh_hub_des	drivers/usb/host/sl811-hcd.c	/^static __u8 sl811_rh_hub_des[] =$/;"	v	typeref:typename:__u8[]	file:
sl811_rh_submit_urb	drivers/usb/host/sl811-hcd.c	/^static int sl811_rh_submit_urb(struct usb_device *usb_dev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
sl811_send_packet	drivers/usb/host/sl811-hcd.c	/^static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *buffer, int len)$/;"	f	typeref:typename:int	file:
sl811_write	drivers/usb/host/sl811-hcd.c	/^static void sl811_write (__u8 index, __u8 data)$/;"	f	typeref:typename:void	file:
sl811_write_buf	drivers/usb/host/sl811-hcd.c	/^static void inline sl811_write_buf(__u8 offset, __u8 *buf, __u8 size)$/;"	f	typeref:typename:void	file:
sl_addr1	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 sl_addr1;			\/* 2C: I2C_I2C_SL_ADDR1 *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
sl_addr2	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 sl_addr2;			\/* 30: I2C_I2C_SL_ADDR2 *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
sl_cnfg	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 sl_cnfg;			\/* 20: I2C_I2C_SL_CNFG *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
sl_delay_count	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 sl_delay_count;		\/* 3C: I2C_I2C_SL_DELAY_COUNT *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
sl_rcvd	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 sl_rcvd;			\/* 24: I2C_I2C_SL_RCVD *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
sl_status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 sl_status;			\/* 28: I2C_I2C_SL_STATUS *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
slad	drivers/i2c/i2c-uniphier-f.c	/^	u32 slad;			\/* slave address *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
slast	arch/m68k/include/asm/coldfire/edma.h	/^	u32 slast;		\/* 0x0C Last Source Address Adjustment *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u32
slav_data	drivers/spi/tegra20_slink.c	/^	u32 slav_data;	\/* SLINK_SLAVE_DATA_0 reg *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
slave	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} slave[5];			\/* Slave Interface *\/$/;"	m	struct:ccsr_cci400	typeref:struct:ccsr_cci400::__anon245f04be0b08[5]
slave	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} slave[5];			\/* Slave Interface *\/$/;"	m	struct:ccsr_cci400	typeref:struct:ccsr_cci400::__anon58ea331d0708[5]
slave	board/bf527-ezkit/video.c	/^static struct spi_slave *slave;$/;"	v	typeref:struct:spi_slave *	file:
slave	board/work-microwave/work_92105/work_92105_display.c	/^static struct spi_slave *slave;$/;"	v	typeref:struct:spi_slave *	file:
slave	drivers/net/enc28j60.c	/^	struct spi_slave	*slave;$/;"	m	struct:enc_device	typeref:struct:spi_slave *	file:
slave	drivers/power/power_spi.c	/^static struct spi_slave *slave;$/;"	v	typeref:struct:spi_slave *	file:
slave	drivers/rtc/ds1306.c	/^static struct spi_slave *slave;$/;"	v	typeref:struct:spi_slave *	file:
slave	drivers/rtc/m41t94.c	/^static struct spi_slave *slave;$/;"	v	typeref:struct:spi_slave *	file:
slave	drivers/spi/armada100_spi.c	/^	struct spi_slave slave;$/;"	m	struct:armd_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/atmel_spi.h	/^	struct spi_slave slave;$/;"	m	struct:atmel_spi_slave	typeref:struct:spi_slave
slave	drivers/spi/bfin_spi.c	/^	struct spi_slave slave;$/;"	m	struct:bfin_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/bfin_spi6xx.c	/^	struct spi_slave slave;$/;"	m	struct:bfin_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/cf_qspi.c	/^	struct spi_slave slave;	\/* Specific bus:cs ID for each device *\/$/;"	m	struct:cf_qspi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/cf_spi.c	/^	struct spi_slave slave;$/;"	m	struct:cf_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/davinci_spi.c	/^	struct spi_slave slave;$/;"	m	struct:davinci_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/ep93xx_spi.c	/^	struct spi_slave slave;$/;"	m	struct:ep93xx_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/fsl_dspi.c	/^	struct spi_slave slave;$/;"	m	struct:fsl_dspi	typeref:struct:spi_slave	file:
slave	drivers/spi/fsl_espi.c	/^	struct spi_slave slave;$/;"	m	struct:fsl_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/fsl_qspi.c	/^	struct spi_slave slave;$/;"	m	struct:fsl_qspi	typeref:struct:spi_slave	file:
slave	drivers/spi/lpc32xx_ssp.c	/^	struct spi_slave slave;$/;"	m	struct:lpc32xx_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/mxc_spi.c	/^	struct spi_slave slave;$/;"	m	struct:mxc_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/mxs_spi.c	/^	struct spi_slave	slave;$/;"	m	struct:mxs_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/omap3_spi.c	/^	struct spi_slave slave;$/;"	m	struct:omap3_spi_priv	typeref:struct:spi_slave	file:
slave	drivers/spi/sh_qspi.c	/^	struct spi_slave	slave;$/;"	m	struct:sh_qspi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/sh_spi.h	/^	struct spi_slave	slave;$/;"	m	struct:sh_spi	typeref:struct:spi_slave
slave	drivers/spi/soft_spi_legacy.c	/^	struct spi_slave slave;$/;"	m	struct:soft_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/tegra20_slink.c	/^	struct spi_slave slave;$/;"	m	struct:tegra_spi_slave	typeref:struct:spi_slave	file:
slave	drivers/spi/ti_qspi.c	/^	struct spi_slave slave;$/;"	m	struct:ti_qspi_priv	typeref:struct:spi_slave	file:
slave	include/s6e63d6.h	/^	struct spi_slave *slave;$/;"	m	struct:s6e63d6	typeref:struct:spi_slave *
slave_address	drivers/i2c/mvtwsi.c	/^	u32 slave_address;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
slave_apb_freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^unsigned long slave_apb_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
slave_apb_freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^unsigned long slave_apb_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
slave_axi_freq_tbl	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^unsigned long slave_axi_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
slave_axi_freq_tbl	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^unsigned long slave_axi_freq_tbl[8] = {$/;"	v	typeref:typename:unsigned long[8]
slave_cpu	arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S	/^slave_cpu:$/;"	l
slave_cpu	arch/arm/cpu/armv8/start.S	/^slave_cpu:$/;"	l
slave_data	include/cpsw.h	/^	struct cpsw_slave_data	*slave_data;$/;"	m	struct:cpsw_platform_data	typeref:struct:cpsw_slave_data *
slave_mon_pause	drivers/i2c/i2c-cdns.c	/^	u32 slave_mon_pause;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
slave_mon_pause	drivers/i2c/zynq_i2c.c	/^	u32 slave_mon_pause;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
slave_num	drivers/net/cpsw.c	/^	int				slave_num;$/;"	m	struct:cpsw_slave	typeref:typename:int	file:
slave_para	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 slave_para;			\/* 0x134 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
slave_para	arch/arm/include/asm/arch/display.h	/^	u32 slave_para;			\/* 0x134 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
slave_parallel	include/xilinx.h	/^	slave_parallel,		\/* parallel data w\/ external latch *\/$/;"	e	enum:__anon15c234ca0103
slave_port	arch/arm/include/asm/ti-common/keystone_net.h	/^	int slave_port;$/;"	m	struct:eth_priv_t	typeref:typename:int
slave_port	drivers/net/keystone_net.c	/^	int				slave_port;$/;"	m	struct:ks2_eth_priv	typeref:typename:int	file:
slave_reg_ofs	include/cpsw.h	/^	u32		slave_reg_ofs;$/;"	m	struct:cpsw_slave_data	typeref:typename:u32
slave_sel	drivers/spi/altera_spi.c	/^	u32	slave_sel;$/;"	m	struct:altera_spi_regs	typeref:typename:u32	file:
slave_selectmap	include/xilinx.h	/^	slave_selectmap,	\/* slave SelectMap (virtex2)            *\/$/;"	e	enum:__anon15c234ca0103
slave_serial	board/renesas/ap325rxa/cpld-ap325rxa.c	/^static void slave_serial(void)$/;"	f	typeref:typename:void	file:
slave_serial	include/xilinx.h	/^	slave_serial,		\/* serial data and external clock *\/$/;"	e	enum:__anon15c234ca0103
slaveadd	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 slaveadd;$/;"	m	struct:fsl_i2c_dev	typeref:typename:u8
slaveadd	drivers/i2c/mvtwsi.c	/^	u8 slaveadd;$/;"	m	struct:mvtwsi_i2c_dev	typeref:typename:u8	file:
slaveaddr	include/i2c.h	/^	int		slaveaddr;$/;"	m	struct:i2c_adapter	typeref:typename:int
slaves	drivers/net/cpsw.c	/^	struct cpsw_slave		*slaves;$/;"	m	struct:cpsw_priv	typeref:struct:cpsw_slave *	file:
slaves	include/ambapp.h	/^	struct ambapp_pnp_ahb	slaves[63];$/;"	m	struct:ambapp_pnp_info	typeref:struct:ambapp_pnp_ahb[63]
slaves	include/cpsw.h	/^	int	slaves;		\/* number of slave cpgmac ports		*\/$/;"	m	struct:cpsw_platform_data	typeref:typename:int
slc_ecc_copy_to_buffer	drivers/mtd/nand/lpc32xx_nand_slc.c	/^static u32 slc_ecc_copy_to_buffer(u8 *spare, const u32 *ecc, int count)$/;"	f	typeref:typename:u32	file:
slcr	arch/arm/dts/zynq-7000.dtsi	/^		slcr: slcr@f8000000 {$/;"	l	label:amba
slcr_base	arch/arm/include/asm/arch-zynqmp/hardware.h	/^#define slcr_base /;"	d
slcr_base	arch/arm/mach-zynq/include/mach/hardware.h	/^#define slcr_base /;"	d
slcr_lock	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 slcr_lock; \/* 0x4 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
slcr_lock	arch/arm/mach-zynq/slcr.c	/^static int slcr_lock = 1; \/* 1 means locked, 0 means unlocked *\/$/;"	v	typeref:typename:int	file:
slcr_regs	arch/arm/mach-zynq/include/mach/hardware.h	/^struct slcr_regs {$/;"	s
slcr_unlock	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 slcr_unlock; \/* 0x8 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
slcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	slcsr;	\/* Port Serial Link CSR *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
slcsr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	slcsr;	        \/* 0xd0158 - Port 0 Serial Link Command and Status Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
sld3_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^sld3_end:$/;"	l
sld8_end	arch/arm/mach-uniphier/arm32/debug_ll.S	/^sld8_end:$/;"	l
sleep	include/video_bridge.h	/^	struct gpio_desc sleep;$/;"	m	struct:video_bridge_priv	typeref:struct:gpio_desc
sleep_thread	drivers/usb/gadget/f_mass_storage.c	/^static int sleep_thread(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
sleep_timer	include/fsl_memac.h	/^	u32	sleep_timer;	\/* Transmit EEE Low Power Timer register *\/$/;"	m	struct:memac	typeref:typename:u32
sleeping	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int sleeping;$/;"	m	struct:ohci	typeref:typename:int
sleeping	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int sleeping;$/;"	m	struct:ohci	typeref:typename:int
sleeping	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int sleeping;$/;"	m	struct:ohci	typeref:typename:int
sleeping	drivers/usb/host/isp116x.h	/^	unsigned sleeping:1;$/;"	m	struct:isp116x	typeref:typename:unsigned:1
sleeping	drivers/usb/host/ohci-s3c24xx.h	/^	int sleeping;$/;"	m	struct:ohci	typeref:typename:int
sleeping	drivers/usb/host/ohci.h	/^	int sleeping;$/;"	m	struct:ohci	typeref:typename:int
sleicr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sleicr;	\/* Port Serial Link Error Injection *\/$/;"	m	struct:rio_impl_port_spec	typeref:typename:u32
sleir	arch/powerpc/include/asm/immap_86xx.h	/^	uint	sleir;	        \/* 0xd0160 - Port 0 Serial Link Error Injection Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
slew	board/micronas/vct/top.c	/^		u32 slew	:  1;   \/* Slew rate		*\/$/;"	m	struct:_TOP_PINMUX_t::__anon904a4b870108	typeref:typename:u32:1	file:
slew_delay_us	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^	uint slew_delay_us;$/;"	m	struct:i2c_arbitrator_priv	typeref:typename:uint	file:
slfm	arch/x86/include/asm/speedstep.h	/^	struct sst_state slfm;$/;"	m	struct:sst_params	typeref:struct:sst_state
sliver	drivers/net/cpsw.c	/^	struct cpsw_sliver_regs		*sliver;$/;"	m	struct:cpsw_slave	typeref:struct:cpsw_sliver_regs *	file:
sliver_reg_ofs	include/cpsw.h	/^	u32		sliver_reg_ofs;$/;"	m	struct:cpsw_slave_data	typeref:typename:u32
slmask	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 slmask;		\/* 0x1F Saved Level Mask *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
slope	drivers/power/exynos-tmu.c	/^	unsigned slope;$/;"	m	struct:tmu_data	typeref:typename:unsigned	file:
slopek	drivers/video/mxcfb.h	/^	int slopek[16];$/;"	m	struct:mxcfb_gamma	typeref:typename:int[16]
slot	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int slot;$/;"	m	struct:edma3_channel_config	typeref:typename:int
slot	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned short	slot;		\/* udivslot *\/$/;"	m	union:br_rest	typeref:typename:unsigned short
slot	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned short	slot;		\/* udivslot *\/$/;"	m	union:br_rest	typeref:typename:unsigned short
slot	arch/x86/include/asm/pirq_routing.h	/^	u8 slot;		\/* Slot number, 0=onboard *\/$/;"	m	struct:irq_info	typeref:typename:u8
slot	include/linux/edd.h	/^			__u8 slot;$/;"	m	struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0308	typeref:typename:__u8
slot2str	fs/fat/fat.c	/^static int slot2str(dir_slot *slotptr, char *l_name, int *idx)$/;"	f	typeref:typename:int	file:
slot_id	board/freescale/p1022ds/p1022ds.c	/^enum slot_id {$/;"	g	file:
slot_id	board/gdsys/p1022/controlcenterd.c	/^enum slot_id {$/;"	g	file:
slot_id	include/usb.h	/^	unsigned int slot_id;$/;"	m	struct:usb_device	typeref:typename:unsigned int
slot_name	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	const char	*slot_name;$/;"	m	struct:ohci	typeref:typename:const char *
slot_name	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	const char	*slot_name;$/;"	m	struct:ohci	typeref:typename:const char *
slot_name	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	const char *slot_name;$/;"	m	struct:ohci	typeref:typename:const char *
slot_name	drivers/usb/host/ohci-s3c24xx.h	/^	const char *slot_name;$/;"	m	struct:ohci	typeref:typename:const char *
slot_name	drivers/usb/host/ohci.h	/^	const char	*slot_name;$/;"	m	struct:ohci	typeref:typename:const char *
slot_names	board/freescale/p1022ds/p1022ds.c	/^static const char *slot_names[] = {$/;"	v	typeref:typename:const char * []	file:
slot_names	board/gdsys/p1022/controlcenterd.c	/^static const char * const slot_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
slot_qsgmii_phyaddr	board/freescale/t4qds/eth.c	/^static u8 slot_qsgmii_phyaddr[5][4] = {$/;"	v	typeref:typename:u8[5][4]	file:
slotintstatus	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	slotintstatus;	\/* offset FCh *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
slots	arch/x86/include/asm/pirq_routing.h	/^	struct irq_info slots[CONFIG_IRQ_SLOT_COUNT];$/;"	m	struct:irq_routing_table	typeref:struct:irq_info[]
slow	include/linux/immap_qe.h	/^		ucc_slow_t slow;$/;"	m	union:ucc::__anon6b5f4d76010a	typeref:typename:ucc_slow_t
slow_equals	common/autoboot.c	/^static int slow_equals(u8 *a, u8 *b, int len)$/;"	f	typeref:typename:int	file:
slow_osc	arch/arm/dts/at91sam9g45.dtsi	/^				slow_osc: slow_osc {$/;"	l
slow_osc	arch/arm/dts/sama5d2.dtsi	/^				slow_osc: slow_osc {$/;"	l
slow_rc_osc	arch/arm/dts/at91sam9260.dtsi	/^				slow_rc_osc: slow_rc_osc {$/;"	l	label:pmc
slow_rc_osc	arch/arm/dts/at91sam9g45.dtsi	/^				slow_rc_osc: slow_rc_osc {$/;"	l
slow_rc_osc	arch/arm/dts/sama5d2.dtsi	/^				slow_rc_osc: slow_rc_osc {$/;"	l
slow_xtal	arch/arm/dts/at91sam9260.dtsi	/^		slow_xtal: slow_xtal {$/;"	l
slow_xtal	arch/arm/dts/at91sam9261.dtsi	/^		slow_xtal: slow_xtal {$/;"	l
slow_xtal	arch/arm/dts/at91sam9263.dtsi	/^		slow_xtal: slow_xtal {$/;"	l
slow_xtal	arch/arm/dts/at91sam9g45.dtsi	/^		slow_xtal: slow_xtal {$/;"	l
slow_xtal	arch/arm/dts/sama5d2.dtsi	/^		slow_xtal: slow_xtal {$/;"	l
slr_disp_size	drivers/video/fsl_dcu_fb.c	/^	u32 slr_disp_size;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
slr_hvsync_para	drivers/video/fsl_dcu_fb.c	/^	u32 slr_hvsync_para;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
slr_l	drivers/video/fsl_dcu_fb.c	/^	u32 slr_l[2];$/;"	m	struct:dcu_reg	typeref:typename:u32[2]	file:
slr_l_transp	drivers/video/fsl_dcu_fb.c	/^	u32 slr_l_transp[2];$/;"	m	struct:dcu_reg	typeref:typename:u32[2]	file:
slr_pol	drivers/video/fsl_dcu_fb.c	/^	u32 slr_pol;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
slre	include/slre.h	/^struct slre {$/;"	s
slre_compile	lib/slre.c	/^slre_compile(struct slre *r, const char *re)$/;"	f	typeref:typename:int
slre_dump	lib/slre.c	/^slre_dump(const struct slre *r, FILE *fp)$/;"	f	typeref:typename:void
slre_match	lib/slre.c	/^slre_match(const struct slre *r, const char *buf, int len,$/;"	f	typeref:typename:int
slsi	include/universe.h	/^	unsigned int slsi;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
slt	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct slt {$/;"	s
slt_t	arch/m68k/include/asm/immap_547x_8x.h	/^} slt_t;$/;"	t	typeref:struct:slt
slv_secure_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 slv_secure_con0;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
slv_secure_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 slv_secure_con1;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
slv_secure_con2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 slv_secure_con2;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
slv_secure_con3	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 slv_secure_con3;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
slv_secure_con4	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 slv_secure_con4;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
slwf	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 slwf:3;		\/* falling edge slew         *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:3
slwr	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 slwr:3;		\/* rising edge slew          *\/$/;"	m	struct:pmux_drvgrp_config	typeref:typename:u32:3
sm	drivers/video/mx3fb.c	/^	u32	sm:10;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:10	file:
sm2_reg	arch/arm/dts/tegra20-harmony.dts	/^				sm2_reg: sm2 {$/;"	l	label:pmic
sm2_reg	arch/arm/dts/tegra20-seaboard.dts	/^				sm2_reg: sm2 {$/;"	l	label:pmic
sm2_reg	arch/arm/dts/tegra20-tamonten.dtsi	/^				sm2_reg: sm2 {$/;"	l	label:pmic
sm2_reg	arch/arm/dts/tegra20-ventana.dts	/^				sm2_reg: sm2 {$/;"	l	label:pmic
sm501	drivers/video/sm501.c	/^GraphicDevice sm501;$/;"	v	typeref:typename:GraphicDevice
sm501_backlight	board/tqc/tqm5200/cmd_stk52xx.c	/^static void sm501_backlight (unsigned int state)$/;"	f	typeref:typename:void	file:
sm501_pci_tbl	drivers/video/sm501.c	/^static struct pci_device_id sm501_pci_tbl[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
sm502_init_regs	board/mosaixtech/icon/icon.c	/^static const SMI_REGS sm502_init_regs[] = {$/;"	v	typeref:typename:const SMI_REGS[]	file:
sm_readl	arch/avr32/cpu/at32ap700x/sm.h	/^#define sm_readl(/;"	d
sm_writel	arch/avr32/cpu/at32ap700x/sm.h	/^#define sm_writel(/;"	d
smac	board/Arcturus/ucp1020/cmd_arc.c	/^char smac[4][18];$/;"	v	typeref:typename:char[4][18]
smaer	arch/powerpc/include/asm/immap_85xx.h	/^	u32	smaer;$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u32
smallDecompress	lib/bzip2/bzlib_private.h	/^      Bool     smallDecompress;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Bool
small_business	arch/x86/include/asm/me_common.h	/^	u32 small_business:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
small_const_nbits	include/usb/lin_gadget_compat.h	/^#define small_const_nbits(/;"	d
smallbin_index	common/dlmalloc.c	/^#define smallbin_index(/;"	d	file:
smaller	lib/zlib/trees.c	/^#define smaller(/;"	d	file:
smart_speed	drivers/net/e1000.h	/^	e1000_smart_speed	smart_speed;$/;"	m	struct:e1000_hw	typeref:typename:e1000_smart_speed
smartreflex0_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	smartreflex0_fck: smartreflex0_fck {$/;"	l
smartreflex0_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	smartreflex0_fck: smartreflex0_fck {$/;"	l
smartreflex1_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	smartreflex1_fck: smartreflex1_fck {$/;"	l
smartreflex1_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	smartreflex1_fck: smartreflex1_fck {$/;"	l
smartweb_macb_hw_init	board/siemens/smartweb/smartweb.c	/^static void smartweb_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
smartweb_nand_hw_init	board/siemens/smartweb/smartweb.c	/^static void smartweb_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
smartweb_request_gpio	board/siemens/smartweb/smartweb.c	/^static void smartweb_request_gpio(void)$/;"	f	typeref:typename:void	file:
smb	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 smb;		\/* 0x0C8 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
smbios_add_string	lib/smbios.c	/^static int smbios_add_string(char *start, const char *str)$/;"	f	typeref:typename:int	file:
smbios_entry	include/smbios.h	/^struct __packed smbios_entry {$/;"	s
smbios_guid	lib/efi_loader/efi_smbios.c	/^static const efi_guid_t smbios_guid = SMBIOS_TABLE_GUID;$/;"	v	typeref:typename:const efi_guid_t	file:
smbios_header	include/smbios.h	/^struct __packed smbios_header {$/;"	s
smbios_string_table_len	lib/smbios.c	/^static int smbios_string_table_len(char *start)$/;"	f	typeref:typename:int	file:
smbios_type0	include/smbios.h	/^struct __packed smbios_type0 {$/;"	s
smbios_type1	include/smbios.h	/^struct __packed smbios_type1 {$/;"	s
smbios_type127	include/smbios.h	/^struct __packed smbios_type127 {$/;"	s
smbios_type2	include/smbios.h	/^struct __packed smbios_type2 {$/;"	s
smbios_type3	include/smbios.h	/^struct __packed smbios_type3 {$/;"	s
smbios_type32	include/smbios.h	/^struct __packed smbios_type32 {$/;"	s
smbios_type4	include/smbios.h	/^struct __packed smbios_type4 {$/;"	s
smbios_write_funcs	lib/smbios.c	/^static smbios_write_type smbios_write_funcs[] = {$/;"	v	typeref:typename:smbios_write_type[]	file:
smbios_write_type	include/smbios.h	/^typedef int (*smbios_write_type)(uintptr_t *addr, int handle);$/;"	t	typeref:typename:int (*)(uintptr_t * addr,int handle)
smbios_write_type0	lib/smbios.c	/^static int smbios_write_type0(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type1	lib/smbios.c	/^static int smbios_write_type1(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type127	lib/smbios.c	/^static int smbios_write_type127(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type2	lib/smbios.c	/^static int smbios_write_type2(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type3	lib/smbios.c	/^static int smbios_write_type3(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type32	lib/smbios.c	/^static int smbios_write_type32(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type4	lib/smbios.c	/^static int smbios_write_type4(uintptr_t *current, int handle)$/;"	f	typeref:typename:int	file:
smbios_write_type4_dm	lib/smbios.c	/^static void smbios_write_type4_dm(struct smbios_type4 *t)$/;"	f	typeref:typename:void	file:
smblks	include/malloc.h	/^  int smblks;   \/* unused -- always zero *\/$/;"	m	struct:mallinfo	typeref:typename:int
smbtr	drivers/i2c/at91_i2c.h	/^	u32 smbtr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
smbus	arch/x86/dts/chromebook_link.dts	/^		smbus: smbus@1f,3 {$/;"	l
smbus	arch/x86/dts/chromebook_samus.dts	/^		smbus: smbus@1f,3 {$/;"	l
smbus_block_read	drivers/i2c/intel_i2c.c	/^static int smbus_block_read(u32 base, u8 dev, u8 *buffer,$/;"	f	typeref:typename:int	file:
smbus_block_write	drivers/i2c/intel_i2c.c	/^static int smbus_block_write(u32 base, u8 dev, u8 *buffer,$/;"	f	typeref:typename:int	file:
smbus_wait_until_done	drivers/i2c/intel_i2c.c	/^static int smbus_wait_until_done(u32 base)$/;"	f	typeref:typename:int	file:
smbus_wait_until_ready	drivers/i2c/intel_i2c.c	/^static int smbus_wait_until_ready(u32 base)$/;"	f	typeref:typename:int	file:
smbusbar	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint16_t smbusbar;$/;"	m	struct:pei_data	typeref:typename:uint16_t
smbusbar	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint16_t smbusbar;$/;"	m	struct:pei_data	typeref:typename:uint16_t
smc	arch/arm/mach-at91/include/mach/at91_mc.h	/^	at91_smc_t	smc;		\/* 0x70 - 0x8C SMC User Interface *\/$/;"	m	struct:at91_mc	typeref:typename:at91_smc_t
smc	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct smc {		\/* Serial management channels *\/$/;"	s
smc	arch/powerpc/include/asm/immap_8260.h	/^typedef struct smc {		\/* Serial management channels *\/$/;"	s
smc91111_eeprom	examples/standalone/smc91111_eeprom.c	/^int smc91111_eeprom (int argc, char * const argv[])$/;"	f	typeref:typename:int
smc91111_initialize	drivers/net/smc91111.c	/^int smc91111_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
smc91111_priv	drivers/net/smc91111.h	/^struct smc91111_priv{$/;"	s
smc9115_pre_init	board/samsung/smdkc100/smdkc100.c	/^static void smc9115_pre_init(void)$/;"	f	typeref:typename:void	file:
smc9115_pre_init	board/samsung/smdkv310/smdkv310.c	/^static void smc9115_pre_init(void)$/;"	f	typeref:typename:void	file:
smc911x_detect_chip	drivers/net/smc911x.h	/^static int smc911x_detect_chip(struct eth_device *dev)$/;"	f	typeref:typename:int
smc911x_eeprom	examples/standalone/smc911x_eeprom.c	/^int smc911x_eeprom(int argc, char * const argv[])$/;"	f	typeref:typename:int
smc911x_enable	drivers/net/smc911x.c	/^static void smc911x_enable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc911x_eth_phy_read	drivers/net/smc911x.c	/^static int smc911x_eth_phy_read(struct eth_device *dev,$/;"	f	typeref:typename:int	file:
smc911x_eth_phy_write	drivers/net/smc911x.c	/^static int smc911x_eth_phy_write(struct eth_device *dev,$/;"	f	typeref:typename:int	file:
smc911x_get_mac_csr	drivers/net/smc911x.h	/^static u32 smc911x_get_mac_csr(struct eth_device *dev, u8 reg)$/;"	f	typeref:typename:u32
smc911x_halt	drivers/net/smc911x.c	/^static void smc911x_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc911x_handle_mac_address	drivers/net/smc911x.c	/^static void smc911x_handle_mac_address(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc911x_init	drivers/net/smc911x.c	/^static int smc911x_init(struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int	file:
smc911x_init	examples/standalone/smc911x_eeprom.c	/^static int smc911x_init(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc911x_initialize	board/cm-bf537e/cm-bf537e.c	/^# define smc911x_initialize(/;"	d	file:
smc911x_initialize	board/cm-bf537u/cm-bf537u.c	/^# define smc911x_initialize(/;"	d	file:
smc911x_initialize	board/tcm-bf537/tcm-bf537.c	/^# define smc911x_initialize(/;"	d	file:
smc911x_initialize	drivers/net/smc911x.c	/^int smc911x_initialize(u8 dev_num, int base_addr)$/;"	f	typeref:typename:int
smc911x_miiphy_read	drivers/net/smc911x.c	/^static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,$/;"	f	typeref:typename:int	file:
smc911x_miiphy_write	drivers/net/smc911x.c	/^static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,$/;"	f	typeref:typename:int	file:
smc911x_phy_configure	drivers/net/smc911x.c	/^static void smc911x_phy_configure(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc911x_phy_reset	drivers/net/smc911x.c	/^static int smc911x_phy_reset(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc911x_reg_read	board/micronas/vct/ebi_smc911x.c	/^u32 smc911x_reg_read(struct eth_device *dev, u32 addr)$/;"	f	typeref:typename:u32
smc911x_reg_read	drivers/net/smc911x.h	/^static inline u32 smc911x_reg_read(struct eth_device *dev, u32 offset)$/;"	f	typeref:typename:u32
smc911x_reg_write	board/micronas/vct/ebi_smc911x.c	/^void smc911x_reg_write(struct eth_device *dev, u32 addr, u32 data)$/;"	f	typeref:typename:void
smc911x_reg_write	drivers/net/smc911x.h	/^static inline void smc911x_reg_write(struct eth_device *dev,$/;"	f	typeref:typename:void
smc911x_reset	drivers/net/smc911x.h	/^static void smc911x_reset(struct eth_device *dev)$/;"	f	typeref:typename:void
smc911x_rx	drivers/net/smc911x.c	/^static int smc911x_rx(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc911x_send	drivers/net/smc911x.c	/^static int smc911x_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
smc911x_set_mac_csr	drivers/net/smc911x.h	/^static void smc911x_set_mac_csr(struct eth_device *dev, u8 reg, u32 data)$/;"	f	typeref:typename:void
smc9303i_read_reg	board/bct-brettl2/smsc9303.c	/^static int smc9303i_read_reg(unsigned short reg, unsigned int *data)$/;"	f	typeref:typename:int	file:
smc9303i_write_mii	board/bct-brettl2/smsc9303.c	/^static int smc9303i_write_mii(unsigned char addr, unsigned char reg, unsigned short data)$/;"	f	typeref:typename:int	file:
smc9303i_write_reg	board/bct-brettl2/smsc9303.c	/^static int smc9303i_write_reg(unsigned short reg, unsigned int data)$/;"	f	typeref:typename:int	file:
smc_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	smc_aper_clk, swdt_clk, dbg_trc_clk, dbg_apb_clk, clk_max};$/;"	e	enum:zynq_clk
smc_brkcr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_brkcr;	\/* xmt break count register *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_brkcr	include/commproc.h	/^	ushort	smc_brkcr;	\/* xmt break count register *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_brkec	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_brkec;	\/* rcv'd break condition counter *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_brkec	include/commproc.h	/^	ushort	smc_brkec;	\/* rcv'd break condition counter *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_brklen	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_brklen;	\/* Last received break length *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_brklen	include/commproc.h	/^	ushort	smc_brklen;	\/* Last received break length *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_call	arch/arm/cpu/armv8/fwcall.c	/^void __efi_runtime smc_call(struct pt_regs *args)$/;"	f	typeref:typename:void __efi_runtime
smc_cent_t	include/commproc.h	/^} smc_cent_t;$/;"	t	typeref:struct:smc_centronics
smc_centronics	include/commproc.h	/^typedef struct smc_centronics {$/;"	s
smc_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	lqspi_clk, smc_clk, pcap_clk, gem0_clk, gem1_clk,$/;"	e	enum:zynq_clk
smc_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 smc_clk_ctrl; \/* 0x148 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
smc_close	drivers/net/lan91c96.c	/^static int smc_close(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc_dump_mii_stream	drivers/net/smc91111.c	/^static void smc_dump_mii_stream (byte * bits, int size)$/;"	f	typeref:typename:void	file:
smc_enable	drivers/net/lan91c96.c	/^static void smc_enable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_enable	drivers/net/smc91111.c	/^static void smc_enable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_get_ethaddr	drivers/net/lan91c96.c	/^static int smc_get_ethaddr(bd_t *bd, struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc_getc	arch/powerpc/cpu/mpc8xx/serial.c	/^smc_getc(void)$/;"	f	typeref:typename:int	file:
smc_getc	post/cpu/mpc8xx/uart.c	/^static int smc_getc (int smc_index)$/;"	f	typeref:typename:int	file:
smc_halt	drivers/net/smc91111.c	/^static void smc_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_halt	post/cpu/mpc8xx/uart.c	/^static void smc_halt(int smc_index)$/;"	f	typeref:typename:void	file:
smc_ibc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_ibc;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_ibc	include/commproc.h	/^	ushort	smc_ibc;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_idp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_idp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_idp	include/commproc.h	/^	uint	smc_idp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_init	arch/powerpc/cpu/mpc8xx/serial.c	/^static int smc_init (void)$/;"	f	typeref:typename:int	file:
smc_init	drivers/net/smc91111.c	/^static int smc_init(struct eth_device *dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
smc_init	post/cpu/mpc8xx/uart.c	/^static void smc_init (int smc_index)$/;"	f	typeref:typename:void	file:
smc_mac_addr	drivers/net/lan91c96.c	/^static unsigned char smc_mac_addr[] = { 0xc0, 0x00, 0x00, 0x1b, 0x62, 0x9c };$/;"	v	typeref:typename:unsigned char[]	file:
smc_maxidl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_maxidl;	\/* Maximum idle characters *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_maxidl	include/commproc.h	/^	ushort	smc_maxidl;	\/* Maximum idle characters *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_mrblr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_mrblr	include/commproc.h	/^	ushort	smc_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_open	drivers/net/lan91c96.c	/^static int smc_open(bd_t *bd, struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc_phy_configure	drivers/net/smc91111.c	/^static void smc_phy_configure (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_putc	arch/powerpc/cpu/mpc8xx/serial.c	/^smc_putc(const char c)$/;"	f	typeref:typename:void	file:
smc_putc	post/cpu/mpc8xx/uart.c	/^static void smc_putc (int smc_index, const char c)$/;"	f	typeref:typename:void	file:
smc_puts	arch/powerpc/cpu/mpc8xx/serial.c	/^smc_puts (const char *s)$/;"	f	typeref:typename:void	file:
smc_rbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rbase	include/commproc.h	/^	ushort	smc_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_rbptr;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rbptr	include/commproc.h	/^	ushort	smc_rbptr;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rcv	drivers/net/lan91c96.c	/^static int smc_rcv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc_rcv	drivers/net/smc91111.c	/^static int smc_rcv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc_read_phy_register	drivers/net/smc91111.c	/^static word smc_read_phy_register (struct eth_device *dev, byte phyreg)$/;"	f	typeref:typename:word	file:
smc_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct smc_regs {$/;"	s
smc_reset	drivers/net/lan91c96.c	/^static void smc_reset(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_reset	drivers/net/smc91111.c	/^static void smc_reset (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_rfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	smc_rfcr;	\/* Rx function code *\/$/;"	m	struct:smc_uart	typeref:typename:u_char
smc_rfcr	include/commproc.h	/^	u_char	smc_rfcr;	\/* Rx function code *\/$/;"	m	struct:smc_uart	typeref:typename:u_char
smc_rmask	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_rmask;	\/* Temporary bit mask *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rmask	include/commproc.h	/^	ushort	smc_rmask;	\/* Temporary bit mask *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rpbase	include/commproc.h	/^	ushort	smc_rpbase;	\/* Relocation pointer *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_rstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_rstate;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_rstate	include/commproc.h	/^	uint	smc_rstate;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_rxtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_rxtmp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_rxtmp	include/commproc.h	/^	uint	smc_rxtmp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_send	drivers/net/smc91111.c	/^static int smc_send(struct eth_device *dev, void *packet, int packet_length)$/;"	f	typeref:typename:int	file:
smc_send_packet	drivers/net/lan91c96.c	/^static int smc_send_packet(struct eth_device *dev, void *packet,$/;"	f	typeref:typename:int	file:
smc_set_mac_addr	drivers/net/lan91c96.c	/^static void smc_set_mac_addr(const unsigned char *addr)$/;"	f	typeref:typename:void	file:
smc_setbrg	arch/powerpc/cpu/mpc8xx/serial.c	/^static void smc_setbrg (void)$/;"	f	typeref:typename:void	file:
smc_shutdown	drivers/net/lan91c96.c	/^static void smc_shutdown(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_smce	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	smc_smce;$/;"	m	struct:smc	typeref:typename:u_char
smc_smce	arch/powerpc/include/asm/immap_8260.h	/^	u_char	smc_smce;$/;"	m	struct:smc	typeref:typename:u_char
smc_smcm	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	smc_smcm;$/;"	m	struct:smc	typeref:typename:u_char
smc_smcm	arch/powerpc/include/asm/immap_8260.h	/^	u_char	smc_smcm;$/;"	m	struct:smc	typeref:typename:u_char
smc_smcmr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	smc_smcmr;$/;"	m	struct:smc	typeref:typename:ushort
smc_smcmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	smc_smcmr;$/;"	m	struct:smc	typeref:typename:ushort
smc_stmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_stmp;	\/* SDMA Temp *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_t	arch/powerpc/include/asm/8xx_immap.h	/^} smc_t;$/;"	t	typeref:struct:smc
smc_t	arch/powerpc/include/asm/immap_8260.h	/^} smc_t;$/;"	t	typeref:struct:smc
smc_tbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tbase	include/commproc.h	/^	ushort	smc_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_tbc;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tbc	include/commproc.h	/^	ushort	smc_tbc;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_tbptr;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tbptr	include/commproc.h	/^	ushort	smc_tbptr;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tdp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_tdp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_tdp	include/commproc.h	/^	uint	smc_tdp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_tfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	smc_tfcr;	\/* Tx function code *\/$/;"	m	struct:smc_uart	typeref:typename:u_char
smc_tfcr	include/commproc.h	/^	u_char	smc_tfcr;	\/* Tx function code *\/$/;"	m	struct:smc_uart	typeref:typename:u_char
smc_tmpidl	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	smc_tmpidl;	\/* Temporary idle counter *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tmpidl	include/commproc.h	/^	ushort	smc_tmpidl;	\/* Temporary idle counter *\/$/;"	m	struct:smc_uart	typeref:typename:ushort
smc_tstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_tstate;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_tstate	include/commproc.h	/^	uint	smc_tstate;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_tstc	arch/powerpc/cpu/mpc8xx/serial.c	/^smc_tstc(void)$/;"	f	typeref:typename:int	file:
smc_txtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	smc_txtmp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_txtmp	include/commproc.h	/^	uint	smc_txtmp;	\/* Internal *\/$/;"	m	struct:smc_uart	typeref:typename:uint
smc_uart	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct smc_uart {$/;"	s
smc_uart	include/commproc.h	/^typedef struct smc_uart {$/;"	s
smc_uart_t	arch/powerpc/include/asm/cpm_8260.h	/^} smc_uart_t;$/;"	t	typeref:struct:smc_uart
smc_uart_t	include/commproc.h	/^} smc_uart_t;$/;"	t	typeref:struct:smc_uart
smc_wait_mmu_release_complete	drivers/net/smc91111.c	/^static inline void smc_wait_mmu_release_complete (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
smc_write_hwaddr	drivers/net/smc91111.c	/^static int smc_write_hwaddr(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
smc_write_phy_register	drivers/net/smc91111.c	/^static void smc_write_phy_register (struct eth_device *dev, byte phyreg,$/;"	f	typeref:typename:void	file:
smccrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 smccrc;		\/* 0x0D4 *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
smcea	arch/arm/mach-keystone/msmc.c	/^	u32	smcea;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smcerrar	arch/arm/mach-keystone/msmc.c	/^	u32	smcerrar;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smcerrxr	arch/arm/mach-keystone/msmc.c	/^	u32	smcerrxr;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smcmt2cnt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcmt2cnt;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcmt2err	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcmt2err;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcmt2src	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcmt2src;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcmt2time	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcmt2time;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcpgcnt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcpgcnt;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcpgerr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcpgerr;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcpgsrc	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcpgsrc;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcpgtime	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smcpgtime;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smcr	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 smcr;$/;"	m	struct:gpt_regs	typeref:typename:u32
smcr	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 smcr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
smcr	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 smcr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
smcr_mk_clen	arch/powerpc/include/asm/cpm_8260.h	/^#define smcr_mk_clen(/;"	d
smcr_mk_clen	include/commproc.h	/^#define smcr_mk_clen(/;"	d
smedcc	arch/arm/mach-keystone/msmc.c	/^	u32	smedcc;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smem_len	include/linux/fb.h	/^	__u32 smem_len;			\/* Length of frame buffer mem *\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u32
smem_start	include/linux/fb.h	/^	unsigned long smem_start;	\/* Start of frame buffer mem *\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:unsigned long
smestat	arch/arm/mach-keystone/msmc.c	/^	u32	smestat;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smevr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	smevr;$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u32
smgpiocnt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smgpiocnt;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smgpioerr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smgpioerr;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smgpiosrc	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smgpiosrc; \/* 0x20 *\/$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smgpiotime	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smgpiotime;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smh_close	arch/arm/lib/semihosting.c	/^static long smh_close(long fd)$/;"	f	typeref:typename:long	file:
smh_len_fd	arch/arm/lib/semihosting.c	/^static long smh_len_fd(long fd)$/;"	f	typeref:typename:long	file:
smh_load_file	arch/arm/lib/semihosting.c	/^static int smh_load_file(const char * const name, ulong load_addr,$/;"	f	typeref:typename:int	file:
smh_open	arch/arm/lib/semihosting.c	/^static long smh_open(const char *fname, char *modestr)$/;"	f	typeref:typename:long	file:
smh_open_s	arch/arm/lib/semihosting.c	/^	struct smh_open_s {$/;"	s	function:smh_open	file:
smh_read	arch/arm/lib/semihosting.c	/^static long smh_read(long fd, void *memp, size_t len)$/;"	f	typeref:typename:long	file:
smh_read_s	arch/arm/lib/semihosting.c	/^	struct smh_read_s {$/;"	s	function:smh_read	file:
smh_trap	arch/arm/lib/semihosting.c	/^static noinline long smh_trap(unsigned int sysnum, void *addr)$/;"	f	typeref:typename:noinline long	file:
smi	drivers/net/armada100_fec.h	/^	u32 smi;			\/* SMI *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
smi	drivers/net/mvgbe.h	/^	u32 smi;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
smi_addr	drivers/net/phy/mv88e61xx.c	/^	int smi_addr;$/;"	m	struct:mv88e61xx_phy_priv	typeref:typename:int	file:
smi_cmd	arch/x86/include/asm/acpi_table.h	/^	u32 smi_cmd;$/;"	m	struct:acpi_fadt	typeref:typename:u32
smi_cmd	drivers/net/phy/mv88e61xx.c	/^static inline int smi_cmd(int cmd, int addr, int reg)$/;"	f	typeref:typename:int	file:
smi_cmd_read	drivers/net/phy/mv88e61xx.c	/^static inline int smi_cmd_read(int addr, int reg)$/;"	f	typeref:typename:int	file:
smi_cmd_write	drivers/net/phy/mv88e61xx.c	/^static inline int smi_cmd_write(int addr, int reg)$/;"	f	typeref:typename:int	file:
smi_cr1	include/linux/mtd/st_smi.h	/^	u32 smi_cr1;$/;"	m	struct:smi_regs	typeref:typename:u32
smi_cr2	include/linux/mtd/st_smi.h	/^	u32 smi_cr2;$/;"	m	struct:smi_regs	typeref:typename:u32
smi_init	drivers/mtd/st_smi.c	/^void smi_init(void)$/;"	f	typeref:typename:void
smi_read_id	drivers/mtd/st_smi.c	/^static unsigned int smi_read_id(flash_info_t *info, int banknum)$/;"	f	typeref:typename:unsigned int	file:
smi_read_sr	drivers/mtd/st_smi.c	/^static int smi_read_sr(int bank)$/;"	f	typeref:typename:int	file:
smi_reg_read	drivers/net/armada100_fec.c	/^static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad,$/;"	f	typeref:typename:int	file:
smi_reg_read	drivers/net/mvgbe.c	/^static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,$/;"	f	typeref:typename:int	file:
smi_reg_write	drivers/net/armada100_fec.c	/^static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad,$/;"	f	typeref:typename:int	file:
smi_reg_write	drivers/net/mvgbe.c	/^static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,$/;"	f	typeref:typename:int	file:
smi_regs	include/linux/mtd/st_smi.h	/^struct smi_regs {$/;"	s
smi_rr	include/linux/mtd/st_smi.h	/^	u32 smi_rr;$/;"	m	struct:smi_regs	typeref:typename:u32
smi_sector_erase	drivers/mtd/st_smi.c	/^static int smi_sector_erase(flash_info_t *info, unsigned int sector)$/;"	f	typeref:typename:int	file:
smi_sr	include/linux/mtd/st_smi.h	/^	u32 smi_sr;$/;"	m	struct:smi_regs	typeref:typename:u32
smi_tr	include/linux/mtd/st_smi.h	/^	u32 smi_tr;$/;"	m	struct:smi_regs	typeref:typename:u32
smi_wait_ready	drivers/net/mvneta.c	/^static int smi_wait_ready(struct mvneta_port *pp)$/;"	f	typeref:typename:int	file:
smi_wait_ready	drivers/net/mvpp2.c	/^static int smi_wait_ready(struct mvpp2 *priv)$/;"	f	typeref:typename:int	file:
smi_wait_till_ready	drivers/mtd/st_smi.c	/^static int smi_wait_till_ready(int bank, int timeout)$/;"	f	typeref:typename:int	file:
smi_wait_xfer_finish	drivers/mtd/st_smi.c	/^static int smi_wait_xfer_finish(int timeout)$/;"	f	typeref:typename:int	file:
smi_write	drivers/mtd/st_smi.c	/^static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,$/;"	f	typeref:typename:int	file:
smi_write_enable	drivers/mtd/st_smi.c	/^static int smi_write_enable(int bank)$/;"	f	typeref:typename:int	file:
smicntl	drivers/mtd/st_smi.c	/^static struct smi_regs *const smicntl =$/;"	v	typeref:struct:smi_regs * const	file:
smiec	arch/arm/mach-keystone/msmc.c	/^	u32	smiec;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smiestat	arch/arm/mach-keystone/msmc.c	/^	u32	smiestat;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smirc	arch/arm/mach-keystone/msmc.c	/^	u32	smirc;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smireg_to_phy	drivers/net/phy/micrel.c	/^static unsigned short smireg_to_phy(unsigned short reg)$/;"	f	typeref:typename:unsigned short	file:
smireg_to_reg	drivers/net/phy/micrel.c	/^static unsigned short smireg_to_reg(unsigned short reg)$/;"	f	typeref:typename:unsigned short	file:
smirstat	arch/arm/mach-keystone/msmc.c	/^	u32	smirstat;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smmu	arch/arm/dts/zynqmp.dtsi	/^		smmu: smmu@fd800000 {$/;"	l
smmu_enable	arch/arm/mach-tegra/ap.c	/^static void smmu_enable(void)$/;"	f	typeref:typename:void	file:
smmu_flush	arch/arm/mach-tegra/ap.c	/^static void smmu_flush(struct mc_ctlr *mc)$/;"	f	typeref:typename:void	file:
smmu_stream_id	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^struct smmu_stream_id {$/;"	s
smncea	arch/arm/mach-keystone/msmc.c	/^	u32	smncea;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smncerrar	arch/arm/mach-keystone/msmc.c	/^	u32	smncerrar;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smncerrxr	arch/arm/mach-keystone/msmc.c	/^	u32	smncerrxr;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smp_check_barrier	arch/blackfin/include/asm/cache.h	/^static inline void smp_check_barrier(void)$/;"	f	typeref:typename:void
smp_cond_acquire	include/linux/compiler.h	/^#define smp_cond_acquire(/;"	d
smp_kick_all_cpus	arch/arc/lib/bootm.c	/^__weak void smp_kick_all_cpus(void) {}$/;"	f	typeref:typename:__weak void
smp_kick_all_cpus	arch/arm/cpu/armv7/ls102xa/cpu.c	/^void smp_kick_all_cpus(void)$/;"	f	typeref:typename:void
smp_kick_all_cpus	arch/arm/cpu/armv7/virt-v7.c	/^void __weak smp_kick_all_cpus(void)$/;"	f	typeref:typename:void __weak
smp_kick_all_cpus	board/broadcom/bcm_ep/board.c	/^void smp_kick_all_cpus(void)$/;"	f	typeref:typename:void
smp_kick_all_cpus	board/synopsys/axs10x/axs10x.c	/^void smp_kick_all_cpus(void)$/;"	f	typeref:typename:void
smp_mark_barrier	arch/blackfin/include/asm/cache.h	/^static inline void smp_mark_barrier(void)$/;"	f	typeref:typename:void
smp_mb	arch/microblaze/include/asm/system.h	/^#define smp_mb(/;"	d
smp_mb	arch/mips/include/asm/system.h	/^#define smp_mb(/;"	d
smp_mb	arch/sh/include/asm/system.h	/^#define smp_mb(/;"	d
smp_mb__after_atomic_dec	arch/arm/include/asm/atomic.h	/^#define smp_mb__after_atomic_dec(/;"	d
smp_mb__after_atomic_inc	arch/arm/include/asm/atomic.h	/^#define smp_mb__after_atomic_inc(/;"	d
smp_mb__after_clear_bit	arch/arm/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/blackfin/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/microblaze/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/mips/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/nds32/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/sandbox/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/sh/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__after_clear_bit	arch/x86/include/asm/bitops.h	/^#define smp_mb__after_clear_bit(/;"	d
smp_mb__before_atomic_dec	arch/arm/include/asm/atomic.h	/^#define smp_mb__before_atomic_dec(/;"	d
smp_mb__before_atomic_inc	arch/arm/include/asm/atomic.h	/^#define smp_mb__before_atomic_inc(/;"	d
smp_mb__before_clear_bit	arch/arm/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/blackfin/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/microblaze/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/mips/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/nds32/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/sandbox/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/sh/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_mb__before_clear_bit	arch/x86/include/asm/bitops.h	/^#define smp_mb__before_clear_bit(/;"	d
smp_processor_id	drivers/net/mvpp2.c	/^#define smp_processor_id(/;"	d	file:
smp_read_barrier_depends	arch/sh/include/asm/system.h	/^#define smp_read_barrier_depends(/;"	d
smp_rmb	arch/microblaze/include/asm/system.h	/^#define smp_rmb(/;"	d
smp_rmb	arch/mips/include/asm/system.h	/^#define smp_rmb(/;"	d
smp_rmb	arch/sh/include/asm/system.h	/^#define smp_rmb(/;"	d
smp_set_core_boot_addr	arch/arc/lib/bootm.c	/^__weak void smp_set_core_boot_addr(unsigned long addr, int corenr) {}$/;"	f	typeref:typename:__weak void
smp_set_core_boot_addr	arch/arm/cpu/armv7/ls102xa/cpu.c	/^void smp_set_core_boot_addr(unsigned long addr, int corenr)$/;"	f	typeref:typename:void
smp_set_core_boot_addr	board/armltd/vexpress/vexpress_common.c	/^void smp_set_core_boot_addr(unsigned long addr, int corenr)$/;"	f	typeref:typename:void
smp_set_core_boot_addr	board/broadcom/bcm_ep/board.c	/^void smp_set_core_boot_addr(unsigned long addr, int corenr)$/;"	f	typeref:typename:void
smp_set_core_boot_addr	board/samsung/arndale/arndale.c	/^void smp_set_core_boot_addr(unsigned long addr, int corenr)$/;"	f	typeref:typename:void
smp_set_core_boot_addr	board/synopsys/axs10x/axs10x.c	/^void smp_set_core_boot_addr(unsigned long addr, int corenr)$/;"	f	typeref:typename:void
smp_waitloop	board/broadcom/bcm_ep/board.c	/^void smp_waitloop(unsigned previous_address)$/;"	f	typeref:typename:void
smp_wmb	arch/microblaze/include/asm/system.h	/^#define smp_wmb(/;"	d
smp_wmb	arch/mips/include/asm/system.h	/^#define smp_wmb(/;"	d
smp_wmb	arch/sh/include/asm/system.h	/^#define smp_wmb(/;"	d
smpart	include/fsl_sec.h	/^	u32	smpart;		\/* Secure Memory Partition Parameters *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
smpfar	arch/arm/mach-keystone/msmc.c	/^	u32	smpfar;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smpfcr	arch/arm/mach-keystone/msmc.c	/^	u32	smpfcr;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smpfr	arch/arm/mach-keystone/msmc.c	/^	u32	smpfr;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smpfxr	arch/arm/mach-keystone/msmc.c	/^	u32	smpfxr;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smplsel	drivers/mmc/socfpga_dw_mmc.c	/^	unsigned int		smplsel;$/;"	m	struct:dwmci_socfpga_priv_data	typeref:typename:unsigned int	file:
smpr	drivers/spi/fsl_qspi.h	/^	u32 smpr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
smprr_a	arch/powerpc/include/asm/immap_83xx.h	/^	u32 smprr_a;		\/* System Mixed Interrupt Group A Priority Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
smprr_b	arch/powerpc/include/asm/immap_83xx.h	/^	u32 smprr_b;		\/* System Mixed Interrupt Group B Priority Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
smps123_reg	arch/arm/dts/dra7-evm.dts	/^				smps123_reg: smps123 {$/;"	l	label:tps659038
smps12_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				smps12_reg: smps12 {$/;"	l	label:tps659038
smps12_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps12_reg: smps12 {$/;"	l	label:tps659038
smps1_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				smps1_reg: smps1 {$/;"	l	label:tps65917.tps65917_regulators
smps2_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				smps2_reg: smps2 {$/;"	l	label:tps65917.tps65917_regulators
smps3_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				smps3_reg: smps3 {$/;"	l	label:tps659038
smps3_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps3_reg: smps3 {$/;"	l	label:tps659038
smps3_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				smps3_reg: smps3 {$/;"	l	label:tps65917.tps65917_regulators
smps45_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				smps45_reg: smps45 {$/;"	l	label:tps659038
smps45_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps45_reg: smps45 {$/;"	l	label:tps659038
smps45_reg	arch/arm/dts/dra7-evm.dts	/^				smps45_reg: smps45 {$/;"	l	label:tps659038
smps4_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				smps4_reg: smps4 {$/;"	l	label:tps65917.tps65917_regulators
smps5_reg	arch/arm/dts/dra72-evm-common.dtsi	/^				smps5_reg: smps5 {$/;"	l	label:tps65917.tps65917_regulators
smps6_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				smps6_reg: smps6 {$/;"	l	label:tps659038
smps6_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps6_reg: smps6 {$/;"	l	label:tps659038
smps6_reg	arch/arm/dts/dra7-evm.dts	/^				smps6_reg: smps6 {$/;"	l	label:tps659038
smps7_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps7_reg: smps7 {$/;"	l	label:tps659038
smps7_reg	arch/arm/dts/dra7-evm.dts	/^				smps7_reg: smps7 {$/;"	l	label:tps659038
smps8_reg	arch/arm/dts/am57xx-beagle-x15.dts	/^				smps8_reg: smps8 {$/;"	l	label:tps659038
smps8_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps8_reg: smps8 {$/;"	l	label:tps659038
smps8_reg	arch/arm/dts/dra7-evm.dts	/^				smps8_reg: smps8 {$/;"	l	label:tps659038
smps9_reg	arch/arm/dts/am57xx-idk-common.dtsi	/^				smps9_reg: smps9 {$/;"	l	label:tps659038
smps9_reg	arch/arm/dts/dra7-evm.dts	/^				smps9_reg: smps9 {$/;"	l	label:tps659038
smps_get_enable	drivers/power/regulator/palmas_regulator.c	/^static bool smps_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
smps_get_value	drivers/power/regulator/palmas_regulator.c	/^static int smps_get_value(struct udevice *dev)$/;"	f	typeref:typename:int	file:
smps_set_enable	drivers/power/regulator/palmas_regulator.c	/^static int smps_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
smps_set_value	drivers/power/regulator/palmas_regulator.c	/^static int smps_set_value(struct udevice *dev, int uV)$/;"	f	typeref:typename:int	file:
smr	drivers/i2c/at91_i2c.h	/^	u32 smr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
smr0	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	smr0;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr0	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	smr0;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr1	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	smr1;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr1	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	smr1;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr2	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	smr2;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr2	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	smr2;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr3	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	smr3;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr3	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	smr3;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr4	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	smr4;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr4	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	smr4;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr5	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned char	smr5;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
smr5	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned char	smr5;$/;"	m	struct:sermux_regs	typeref:typename:unsigned char
sms	arch/arm/include/asm/arch-omap3/cpu.h	/^struct sms {$/;"	s
sms	arch/arm/mach-keystone/msmc.c	/^	struct mpax sms[16][8];$/;"	m	struct:msms_regs	typeref:struct:mpax[16][8]	file:
sms_mpax_lck	arch/arm/mach-keystone/msmc.c	/^	u32	sms_mpax_lck;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
sms_mpax_lckstat	arch/arm/mach-keystone/msmc.c	/^	u32	sms_mpax_lckstat;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
sms_mpax_ulck	arch/arm/mach-keystone/msmc.c	/^	u32	sms_mpax_ulck;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smsc9303i_config_entry1_t	board/bct-brettl2/smsc9303.c	/^} smsc9303i_config_entry1_t;$/;"	t	typeref:struct:__anon648e74860108	file:
smsc9303i_config_entry2_t	board/bct-brettl2/smsc9303.c	/^} smsc9303i_config_entry2_t;$/;"	t	typeref:struct:__anon648e74860208	file:
smsc9303i_config_table1	board/bct-brettl2/smsc9303.c	/^static const smsc9303i_config_entry1_t smsc9303i_config_table1[] =$/;"	v	typeref:typename:const smsc9303i_config_entry1_t[]	file:
smsc9303i_config_table2	board/bct-brettl2/smsc9303.c	/^static const smsc9303i_config_entry2_t smsc9303i_config_table2[] =$/;"	v	typeref:typename:const smsc9303i_config_entry2_t[]	file:
smsc95xx_dongle	drivers/usb/eth/smsc95xx.c	/^struct smsc95xx_dongle {$/;"	s	file:
smsc95xx_dongles	drivers/usb/eth/smsc95xx.c	/^static const struct smsc95xx_dongle smsc95xx_dongles[] = {$/;"	v	typeref:typename:const struct smsc95xx_dongle[]	file:
smsc95xx_eeprom_confirm_not_busy	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
smsc95xx_eth_before_probe	drivers/usb/eth/smsc95xx.c	/^void smsc95xx_eth_before_probe(void)$/;"	f	typeref:typename:void
smsc95xx_eth_get_info	drivers/usb/eth/smsc95xx.c	/^int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,$/;"	f	typeref:typename:int
smsc95xx_eth_id_table	drivers/usb/eth/smsc95xx.c	/^static const struct usb_device_id smsc95xx_eth_id_table[] = {$/;"	v	typeref:typename:const struct usb_device_id[]	file:
smsc95xx_eth_ops	drivers/usb/eth/smsc95xx.c	/^static const struct eth_ops smsc95xx_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
smsc95xx_eth_probe	drivers/usb/eth/smsc95xx.c	/^int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,$/;"	f	typeref:typename:int
smsc95xx_eth_probe	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
smsc95xx_eth_recv	drivers/usb/eth/smsc95xx.c	/^int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int
smsc95xx_eth_send	drivers/usb/eth/smsc95xx.c	/^int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int
smsc95xx_eth_start	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
smsc95xx_eth_stop	drivers/usb/eth/smsc95xx.c	/^void smsc95xx_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void
smsc95xx_free_pkt	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)$/;"	f	typeref:typename:int	file:
smsc95xx_halt	drivers/usb/eth/smsc95xx.c	/^static void smsc95xx_halt(struct eth_device *eth)$/;"	f	typeref:typename:void	file:
smsc95xx_init	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_init(struct eth_device *eth, bd_t *bd)$/;"	f	typeref:typename:int	file:
smsc95xx_init_common	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,$/;"	f	typeref:typename:int	file:
smsc95xx_init_mac_address	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_init_mac_address(unsigned char *enetaddr,$/;"	f	typeref:typename:int	file:
smsc95xx_mdio_read	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)$/;"	f	typeref:typename:int	file:
smsc95xx_mdio_write	drivers/usb/eth/smsc95xx.c	/^static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,$/;"	f	typeref:typename:void	file:
smsc95xx_phy_initialize	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_phy_initialize(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
smsc95xx_phy_wait_not_busy	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
smsc95xx_private	drivers/usb/eth/smsc95xx.c	/^struct smsc95xx_private {$/;"	s	file:
smsc95xx_read_eeprom	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,$/;"	f	typeref:typename:int	file:
smsc95xx_read_reg	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)$/;"	f	typeref:typename:int	file:
smsc95xx_read_rom_hwaddr	drivers/usb/eth/smsc95xx.c	/^int smsc95xx_read_rom_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
smsc95xx_recv	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_recv(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
smsc95xx_send	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_send(struct eth_device *eth, void *packet, int length)$/;"	f	typeref:typename:int	file:
smsc95xx_send_common	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
smsc95xx_set_csums	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,$/;"	f	typeref:typename:int	file:
smsc95xx_set_multicast	drivers/usb/eth/smsc95xx.c	/^static void smsc95xx_set_multicast(struct smsc95xx_private *priv)$/;"	f	typeref:typename:void	file:
smsc95xx_start_rx_path	drivers/usb/eth/smsc95xx.c	/^static void smsc95xx_start_rx_path(struct usb_device *udev,$/;"	f	typeref:typename:void	file:
smsc95xx_start_tx_path	drivers/usb/eth/smsc95xx.c	/^static void smsc95xx_start_tx_path(struct usb_device *udev,$/;"	f	typeref:typename:void	file:
smsc95xx_wait_eeprom	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_wait_eeprom(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
smsc95xx_write_hwaddr	drivers/usb/eth/smsc95xx.c	/^int smsc95xx_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int
smsc95xx_write_hwaddr	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_write_hwaddr(struct eth_device *eth)$/;"	f	typeref:typename:int	file:
smsc95xx_write_hwaddr_common	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_write_hwaddr_common(struct usb_device *udev,$/;"	f	typeref:typename:int	file:
smsc95xx_write_reg	drivers/usb/eth/smsc95xx.c	/^static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)$/;"	f	typeref:typename:int	file:
smsc_config_aneg	drivers/qe/uec_phy.c	/^static int smsc_config_aneg (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
smsc_ctrlc	examples/standalone/smc911x_eeprom.c	/^static int smsc_ctrlc(void)$/;"	f	typeref:typename:int	file:
smsc_parse_status	drivers/net/phy/smsc.c	/^static int smsc_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
smsc_read_status	drivers/qe/uec_phy.c	/^static int smsc_read_status (struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
smsc_startup	drivers/net/phy/smsc.c	/^static int smsc_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
smsecc	arch/arm/mach-keystone/msmc.c	/^	u32	smsecc;$/;"	m	struct:msms_regs	typeref:typename:u32	file:
smser	arch/powerpc/include/asm/immap_85xx.h	/^	u32	smser;$/;"	m	struct:ccsr_cpm_siu	typeref:typename:u32
smstpcr0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 smstpcr0;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
smstpcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smstpcr0;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
smstpcr1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 smstpcr1;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
smstpcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smstpcr1;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
smstpcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 smstpcr2;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
smstpcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smstpcr2;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
smstpcr3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 smstpcr3;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
smstpcr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smstpcr3;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
smstpcr4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 smstpcr4;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
smstpcr4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smstpcr4;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
smstpcr5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 smstpcr5;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
smstpcr5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smstpcr5;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
smsysccnt	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smsysccnt;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smsyscerr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smsyscerr;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smsyscsrc	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smsyscsrc;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smsysctime	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 smsysctime;$/;"	m	struct:sh73a0_hpb_bscr	typeref:typename:u32
smvcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 smvcr;		\/* System Management Interrupt Vector Register *\/$/;"	m	struct:ipic83xx	typeref:typename:u32
smvid	include/fsl_sec.h	/^	u32	smvid;		\/* Secure Memory Version ID *\/$/;"	m	struct:ccsr_sec	typeref:typename:u32
sn	board/freescale/common/sys_eeprom.c	/^	u8 sn[10];        \/* 0x06 - 0x0F Serial Number*\/$/;"	m	struct:eeprom	typeref:typename:u8[10]	file:
sn	board/freescale/common/sys_eeprom.c	/^	u8 sn[12];        \/* 0x04 - 0x0F Serial Number *\/$/;"	m	struct:eeprom	typeref:typename:u8[12]	file:
sn	board/varisys/common/sys_eeprom.c	/^	u8 sn[12];        \/* 0x04 - 0x0F Serial Number *\/$/;"	m	struct:eeprom	typeref:typename:u8[12]	file:
sn0	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 sn0;		\/* 0x4c *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
sn1	arch/arm/mach-at91/include/mach/sama5_sfr.h	/^	u32 sn1;		\/* 0x50 *\/$/;"	m	struct:atmel_sfr	typeref:typename:u32
sname	include/image.h	/^	char	*sname;		\/* short (input) name to find table entry *\/$/;"	m	struct:table_entry	typeref:typename:char *
snaph	drivers/timer/altera_timer.c	/^	u32	snaph;		\/* Snapshot high *\/$/;"	m	struct:altera_timer_regs	typeref:typename:u32	file:
snapl	drivers/timer/altera_timer.c	/^	u32	snapl;		\/* Snapshot low *\/$/;"	m	struct:altera_timer_regs	typeref:typename:u32	file:
snb_pm_gt1	drivers/video/ivybridge_igd.c	/^static const struct gt_powermeter snb_pm_gt1[] = {$/;"	v	typeref:typename:const struct gt_powermeter[]	file:
snb_pm_gt2	drivers/video/ivybridge_igd.c	/^static const struct gt_powermeter snb_pm_gt2[] = {$/;"	v	typeref:typename:const struct gt_powermeter[]	file:
snip	common/edid.c	/^static char *snip(char *string)$/;"	f	typeref:typename:char *	file:
snoop	drivers/video/ipu_regs.h	/^	u32 snoop;$/;"	m	struct:ipu_cm	typeref:typename:u32
snoop1	include/usb/ehci-ci.h	/^	u32	snoop1;		\/* 0x400 - Snoop 1 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
snoop2	include/usb/ehci-ci.h	/^	u32	snoop2;		\/* 0x404 - Snoop 2 *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
snoop_ctrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 snoop_ctrl;		\/* Snoop Control *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
snoop_ctrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 snoop_ctrl;		\/* Snoop Control *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
snoop_detect	arch/sparc/cpu/leon3/cpu_init.c	/^static unsigned int snoop_detect(void)$/;"	f	typeref:typename:unsigned int	file:
snoop_window	include/mpc5xxx.h	/^	volatile u32 snoop_window;	\/* XLB + 0x70 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
snooping_available	arch/sparc/include/asm/global_data.h	/^	unsigned int snooping_available;$/;"	m	struct:arch_global_data	typeref:typename:unsigned int
snor_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int snor_boot_selected(void)$/;"	f	typeref:typename:int
snor_init	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void snor_init(void)$/;"	f	typeref:typename:void	file:
snotification	drivers/block/fsl_sata.h	/^	u32 snotification;	\/* SATA interface notification register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
snpcnfgcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 snpcnfgcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
snpcnfgcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 snpcnfgcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
snpid	arch/powerpc/include/asm/fsl_pamu.h	/^			uint8_t snpid;$/;"	m	struct:paace::__anon6139da31010a::__anon6139da310208	typeref:typename:uint8_t
snprintf	lib/tiny-printf.c	/^int snprintf(char *buf, size_t size, const char *fmt, ...)$/;"	f	typeref:typename:int
snprintf	lib/vsprintf.c	/^int snprintf(char *buf, size_t size, const char *fmt, ...)$/;"	f	typeref:typename:int
sntf	drivers/block/dwc_ahsata.c	/^	u32 sntf;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
sntp_handler	net/sntp.c	/^static void sntp_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
sntp_our_port	net/sntp.c	/^static int sntp_our_port;$/;"	v	typeref:typename:int	file:
sntp_pkt_t	net/sntp.h	/^struct sntp_pkt_t {$/;"	s
sntp_send	net/sntp.c	/^static void sntp_send(void)$/;"	f	typeref:typename:void	file:
sntp_start	net/sntp.c	/^void sntp_start(void)$/;"	f	typeref:typename:void
sntp_timeout_handler	net/sntp.c	/^static void sntp_timeout_handler(void)$/;"	f	typeref:typename:void	file:
snums	drivers/qe/qe.c	/^static qe_snum_t	snums[QE_NUM_OF_SNUM];$/;"	v	typeref:typename:qe_snum_t[]	file:
snvs	arch/arm/dts/imx6qdl.dtsi	/^			snvs: snvs@020cc000 {$/;"	l
snvs	arch/arm/dts/imx6ull.dtsi	/^			snvs: snvs@020cc000 {$/;"	l
snvs_addr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	snvs_addr[4];		\/* SNVS address *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
snvs_data	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	snvs_data[4];		\/* SNVS data *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
snvs_gpr	arch/arm/dts/imx6ull.dtsi	/^			snvs_gpr: snvs-gpr@0x02294000 {$/;"	l	label:aips3
snvs_info	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	snvs_info[4];		\/* SNVS info *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
snvs_misc_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_misc_ctrl;		\/* offset 0x0380 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_misc_ctrl_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_misc_ctrl_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_misc_ctrl_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_misc_ctrl_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_misc_ctrl_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_misc_ctrl_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_poweroff	arch/arm/dts/imx6qdl.dtsi	/^				snvs_poweroff: snvs-poweroff {$/;"	l	label:snvs
snvs_poweroff	arch/arm/dts/imx6ull.dtsi	/^				snvs_poweroff: snvs-poweroff {$/;"	l	label:snvs
snvs_pwrkey	arch/arm/dts/imx6ull.dtsi	/^				snvs_pwrkey: snvs-powerkey {$/;"	l	label:snvs
snvs_rtc	arch/arm/dts/imx6qdl.dtsi	/^				snvs_rtc: snvs-rtc-lp {$/;"	l	label:snvs
snvs_rtc	arch/arm/dts/imx6ull.dtsi	/^				snvs_rtc: snvs-rtc-lp {$/;"	l	label:snvs
snvs_tamper_offset_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_offset_ctrl;	\/* offset 0x0340 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_offset_ctrl_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_offset_ctrl_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_offset_ctrl_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_offset_ctrl_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_offset_ctrl_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_offset_ctrl_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_pull_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_pull_ctrl;		\/* offset 0x0350 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_pull_ctrl_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_pull_ctrl_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_pull_ctrl_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_pull_ctrl_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_pull_ctrl_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_pull_ctrl_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_trim_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_trim_ctrl;		\/* offset 0x0370 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_trim_ctrl_ctrl	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_trim_ctrl_ctrl;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_trim_ctrl_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_trim_ctrl_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_tamper_trim_ctrl_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_tamper_trim_ctrl_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_test	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_test;			\/* offset 0x0360 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_test_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_test_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_test_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_test_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvs_test_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t snvs_test_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
snvslp	arch/arm/dts/imx6ull.dtsi	/^			snvslp: snvs@020b0000 {$/;"	l
so	scripts/kconfig/symbol.c	/^	off_t		so, eo;$/;"	m	struct:sym_match	typeref:typename:off_t	file:
soc	arch/arm/dts/uniphier-common32.dtsi	/^	soc: soc {$/;"	l
soc	arch/mips/include/asm/global_data.h	/^	unsigned long soc;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
soc	arch/mips/mach-ath79/cpu.c	/^	const enum ath79_soc_type soc;$/;"	m	struct:ath79_soc_desc	typeref:typename:const enum ath79_soc_type	file:
soc	drivers/pci/pci_tegra.c	/^	const struct tegra_pcie_soc *soc;$/;"	m	struct:tegra_pcie	typeref:typename:const struct tegra_pcie_soc *	file:
soc	include/fsl_qe.h	/^	} __attribute__ ((packed)) soc;$/;"	m	struct:qe_firmware	typeref:struct:qe_firmware::__anon7a33fbc80108
soc	include/linux/mbus.h	/^	const struct mvebu_mbus_soc_data *soc;$/;"	m	struct:mvebu_mbus_state	typeref:typename:const struct mvebu_mbus_soc_data *
soc_ahb	include/andestech/andes_pcu.h	/^	unsigned int	soc_ahb;	\/* 0x14 - SoC AHB configuration *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
soc_apb	include/andestech/andes_pcu.h	/^	unsigned int	soc_apb;	\/* 0x18 - SoC APB configuration *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
soc_boot_modes	arch/arm/cpu/armv7/mx5/soc.c	/^const struct boot_mode soc_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]
soc_boot_modes	arch/arm/cpu/armv7/mx6/soc.c	/^const struct boot_mode soc_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]
soc_boot_modes	arch/arm/cpu/armv7/mx7/soc.c	/^const struct boot_mode soc_boot_modes[] = {$/;"	v	typeref:typename:const struct boot_mode[]
soc_clk_dump	arch/arm/mach-zynq/clk.c	/^int soc_clk_dump(void)$/;"	f	typeref:typename:int
soc_clk_dump	arch/mips/mach-pic32/cpu.c	/^int soc_clk_dump(void)$/;"	f	typeref:typename:int
soc_clk_dump	cmd/clk.c	/^int __weak soc_clk_dump(void)$/;"	f	typeref:typename:int __weak
soc_con0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int soc_con0;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
soc_con0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con0;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con0	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con0;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con0;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
soc_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con0;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int soc_con1;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
soc_con1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con1;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con1	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con1;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con1;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con10	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con10;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con10	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con10;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con10	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con10;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
soc_con10	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con10;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con11	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con11;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con11	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con11;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con11	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con11;$/;"	m	struct:rk3399_pmugrf_regs	typeref:typename:u32
soc_con11	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con11;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con12	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con12;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con12	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con12;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con12	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con12;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con13	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con13;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con13	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con13;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con13	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con13;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con14	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con14;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con14	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con14;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con14	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con14;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con15	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con15;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con15	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con15;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con15	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con15;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con16	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con16;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con16	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con16;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con16	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con16;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con17	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con17;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con17	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con17;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con18	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con18;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con18	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con18;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con19	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con19;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con19	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con19;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con2	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int soc_con2;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
soc_con2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con2;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con2	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con2;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con2;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con20	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con20;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con20	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con20;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con20	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con20;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con21	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con21;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con21	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con21;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con21	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con21;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con22	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con22;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con22	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con22;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con23	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con23;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con24	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con24;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con25	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con25;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con26	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con26;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con3	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int soc_con3;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
soc_con3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con3;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con3	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con3;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con3	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con3;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con3	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con3;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con4;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con4	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con4;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con4	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con4;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con4	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con4;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con5;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con5	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con5;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con5	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con5;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con5	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con5;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con5_pcie	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con5_pcie;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con6	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con6;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con6	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con6;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con6	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con6;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con6	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con6;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con7	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con7;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con7	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con7;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con7	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con7;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con7	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con7;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con8	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con8;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con8	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con8;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con8	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con8;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con8	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con8;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con9	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con9;$/;"	m	struct:rk3288_grf	typeref:typename:u32
soc_con9	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_con9;$/;"	m	struct:rk3288_sgrf	typeref:typename:u32
soc_con9	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con9;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_con9	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con9;$/;"	m	struct:rk3399_pmusgrf_regs	typeref:typename:u32
soc_con9_pcie	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_con9_pcie;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
soc_core_id	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 soc_core_id;	\/* 0x30 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
soc_data_a_all	drivers/gpio/sunxi_gpio.c	/^static const struct sunxi_gpio_soc_data soc_data_a_all = {$/;"	v	typeref:typename:const struct sunxi_gpio_soc_data	file:
soc_data_l_1	drivers/gpio/sunxi_gpio.c	/^static const struct sunxi_gpio_soc_data soc_data_l_1 = {$/;"	v	typeref:typename:const struct sunxi_gpio_soc_data	file:
soc_data_l_2	drivers/gpio/sunxi_gpio.c	/^static const struct sunxi_gpio_soc_data soc_data_l_2 = {$/;"	v	typeref:typename:const struct sunxi_gpio_soc_data	file:
soc_data_l_3	drivers/gpio/sunxi_gpio.c	/^static const struct sunxi_gpio_soc_data soc_data_l_3 = {$/;"	v	typeref:typename:const struct sunxi_gpio_soc_data	file:
soc_fpga_pr_def	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 soc_fpga_pr_def;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
soc_fpga_res_def0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 soc_fpga_res_def0;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
soc_fpga_res_def1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 soc_fpga_res_def1;	\/*0xfec*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
soc_fpga_rtl_def	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 soc_fpga_rtl_def;	\/*0xfe0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
soc_general_ctl	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	soc_general_ctl;$/;"	m	struct:rk3288_edp	typeref:typename:u32
soc_general_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	soc_general_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
soc_gpios	arch/arm/dts/dragonboard410c.dts	/^		soc_gpios: pinctrl@1000000 {$/;"	l
soc_has_aiop	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^bool soc_has_aiop(void)$/;"	f	typeref:typename:bool
soc_has_aiop	drivers/net/fsl-mc/mc.c	/^__weak bool soc_has_aiop(void)$/;"	f	typeref:typename:__weak bool
soc_has_dp_ddr	arch/arm/cpu/armv8/fsl-layerscape/soc.c	/^bool soc_has_dp_ddr(void)$/;"	f	typeref:typename:bool
soc_id	include/andestech/andes_pcu.h	/^	unsigned int	soc_id;		\/* 0x10 - SoC ID *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
soc_is_ar71xx	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar71xx(void)$/;"	f	typeref:typename:int
soc_is_ar7240	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar7240(void)$/;"	f	typeref:typename:int
soc_is_ar7241	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar7241(void)$/;"	f	typeref:typename:int
soc_is_ar7242	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar7242(void)$/;"	f	typeref:typename:int
soc_is_ar724x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar724x(void)$/;"	f	typeref:typename:int
soc_is_ar913x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar913x(void)$/;"	f	typeref:typename:int
soc_is_ar933x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar933x(void)$/;"	f	typeref:typename:int
soc_is_ar9341	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar9341(void)$/;"	f	typeref:typename:int
soc_is_ar9342	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar9342(void)$/;"	f	typeref:typename:int
soc_is_ar9344	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar9344(void)$/;"	f	typeref:typename:int
soc_is_ar934x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_ar934x(void)$/;"	f	typeref:typename:int
soc_is_qca9533	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca9533(void)$/;"	f	typeref:typename:int
soc_is_qca953x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca953x(void)$/;"	f	typeref:typename:int
soc_is_qca9556	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca9556(void)$/;"	f	typeref:typename:int
soc_is_qca9558	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca9558(void)$/;"	f	typeref:typename:int
soc_is_qca955x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca955x(void)$/;"	f	typeref:typename:int
soc_is_qca9561	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca9561(void)$/;"	f	typeref:typename:int
soc_is_qca956x	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_qca956x(void)$/;"	f	typeref:typename:int
soc_is_tp9343	arch/mips/mach-ath79/include/mach/ath79.h	/^static inline int soc_is_tp9343(void)$/;"	f	typeref:typename:int
soc_misc_config2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 soc_misc_config2;$/;"	m	struct:src	typeref:typename:u32
soc_rev	arch/arm/include/asm/imx-common/sys_proto.h	/^#define soc_rev(/;"	d
soc_status	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_status[22];$/;"	m	struct:rk3288_grf	typeref:typename:u32[22]
soc_status	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 soc_status[2];$/;"	m	struct:rk3288_sgrf	typeref:typename:u32[2]
soc_status	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 soc_status[6];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[6]
soc_status0	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int soc_status0;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
soc_status1	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int soc_status1;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
soc_type	arch/arm/cpu/armv7/vf610/generic.c	/^static char soc_type[] = "xx0";$/;"	v	typeref:typename:char[]	file:
soc_type	arch/arm/include/asm/imx-common/sys_proto.h	/^#define soc_type(/;"	d
soc_ver	arch/arm/include/asm/arch-fsl-layerscape/soc.h	/^	u32 soc_ver;$/;"	m	struct:cpu_type	typeref:typename:u32
soc_ver	arch/powerpc/include/asm/processor.h	/^	u32 soc_ver;$/;"	m	struct:cpu_type	typeref:typename:u32
soc_warmrst	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32 soc_warmrst;		\/* 0xa04 *\/$/;"	m	struct:ccsr_reset	typeref:typename:u32
socar	arch/powerpc/include/asm/immap_85xx.h	/^	u32	socar;	\/* Source Operations CAR *\/$/;"	m	struct:rio_arch	typeref:typename:u32
socar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	socar;		\/* 0xc0018 - Source Operations Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
soccr	drivers/spi/fsl_qspi.h	/^	u32 soccr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
socdata	arch/arm/mach-tegra/xusb-padctl-common.h	/^	const struct tegra_xusb_padctl_soc *socdata;$/;"	m	struct:tegra_xusb_padctl	typeref:typename:const struct tegra_xusb_padctl_soc *
socdata	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^	struct uniphier_pinctrl_socdata *socdata;$/;"	m	struct:uniphier_pinctrl_priv	typeref:struct:uniphier_pinctrl_socdata *
socfpga_bridges_reset	arch/arm/mach-socfpga/reset_manager.c	/^void socfpga_bridges_reset(int enable)$/;"	f	typeref:typename:void
socfpga_clock_manager	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^struct socfpga_clock_manager {$/;"	s
socfpga_clock_manager_altera	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^struct socfpga_clock_manager_altera {$/;"	s
socfpga_clock_manager_main_pll	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^struct socfpga_clock_manager_main_pll {$/;"	s
socfpga_clock_manager_per_pll	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^struct socfpga_clock_manager_per_pll {$/;"	s
socfpga_clock_manager_sdr_pll	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^struct socfpga_clock_manager_sdr_pll {$/;"	s
socfpga_data_mgr	drivers/ddr/altera/sequencer.h	/^struct socfpga_data_mgr {$/;"	s
socfpga_dwmci_clksel	drivers/mmc/socfpga_dw_mmc.c	/^static void socfpga_dwmci_clksel(struct dwmci_host *host)$/;"	f	typeref:typename:void	file:
socfpga_dwmci_plat	drivers/mmc/socfpga_dw_mmc.c	/^struct socfpga_dwmci_plat {$/;"	s	file:
socfpga_dwmmc_bind	drivers/mmc/socfpga_dw_mmc.c	/^static int socfpga_dwmmc_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
socfpga_dwmmc_ids	drivers/mmc/socfpga_dw_mmc.c	/^static const struct udevice_id socfpga_dwmmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
socfpga_dwmmc_ofdata_to_platdata	drivers/mmc/socfpga_dw_mmc.c	/^static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
socfpga_dwmmc_probe	drivers/mmc/socfpga_dw_mmc.c	/^static int socfpga_dwmmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
socfpga_eth_reset	arch/arm/mach-socfpga/misc.c	/^static int socfpga_eth_reset(void)$/;"	f	typeref:typename:int	file:
socfpga_fpga_add	arch/arm/mach-socfpga/misc.c	/^static inline void socfpga_fpga_add(void) {}$/;"	f	typeref:typename:void	file:
socfpga_fpga_add	arch/arm/mach-socfpga/misc.c	/^static void socfpga_fpga_add(void)$/;"	f	typeref:typename:void	file:
socfpga_fpga_id	arch/arm/mach-socfpga/misc.c	/^static int socfpga_fpga_id(const bool print_id)$/;"	f	typeref:typename:int	file:
socfpga_fpga_manager	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^struct socfpga_fpga_manager {$/;"	s
socfpga_fpga_model	arch/arm/mach-socfpga/misc.c	/^} const socfpga_fpga_model[] = {$/;"	v	typeref:typename:const struct __anon0d396cd60208 const[]
socfpga_freeze_controller	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^struct socfpga_freeze_controller {$/;"	s
socfpga_get_sdram_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^const struct socfpga_sdram_config *socfpga_get_sdram_config(void)$/;"	f	typeref:typename:const struct socfpga_sdram_config *
socfpga_get_sdram_io_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^const struct socfpga_sdram_io_config *socfpga_get_sdram_io_config(void)$/;"	f	typeref:typename:const struct socfpga_sdram_io_config *
socfpga_get_sdram_misc_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^const struct socfpga_sdram_misc_config *socfpga_get_sdram_misc_config(void)$/;"	f	typeref:typename:const struct socfpga_sdram_misc_config *
socfpga_get_sdram_rwmgr_config	arch/arm/mach-socfpga/wrap_sdram_config.c	/^const struct socfpga_sdram_rw_mgr_config *socfpga_get_sdram_rwmgr_config(void)$/;"	f	typeref:typename:const struct socfpga_sdram_rw_mgr_config *
socfpga_get_seq_ac_init	arch/arm/mach-socfpga/wrap_sdram_config.c	/^void socfpga_get_seq_ac_init(const u32 **init, unsigned int *nelem)$/;"	f	typeref:typename:void
socfpga_get_seq_inst_init	arch/arm/mach-socfpga/wrap_sdram_config.c	/^void socfpga_get_seq_inst_init(const u32 **init, unsigned int *nelem)$/;"	f	typeref:typename:void
socfpga_header	tools/socfpgaimage.c	/^static struct socfpga_header {$/;"	s	file:
socfpga_load	drivers/fpga/socfpga.c	/^int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)$/;"	f	typeref:typename:int
socfpga_nic301_slave_ns	arch/arm/mach-socfpga/misc.c	/^static void socfpga_nic301_slave_ns(void)$/;"	f	typeref:typename:void	file:
socfpga_nic301_slave_ns	arch/arm/mach-socfpga/spl.c	/^static void socfpga_nic301_slave_ns(void)$/;"	f	typeref:typename:void	file:
socfpga_otg_data	arch/arm/mach-socfpga/board.c	/^struct dwc2_plat_otg_data socfpga_otg_data = {$/;"	v	typeref:struct:dwc2_plat_otg_data
socfpga_per_reset	arch/arm/mach-socfpga/reset_manager.c	/^void socfpga_per_reset(u32 reset, int set)$/;"	f	typeref:typename:void
socfpga_per_reset_all	arch/arm/mach-socfpga/reset_manager.c	/^void socfpga_per_reset_all(void)$/;"	f	typeref:typename:void
socfpga_phy_mgr_cfg	drivers/ddr/altera/sequencer.h	/^struct socfpga_phy_mgr_cfg {$/;"	s
socfpga_phy_mgr_cmd	drivers/ddr/altera/sequencer.h	/^struct socfpga_phy_mgr_cmd {$/;"	s
socfpga_reset_manager	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^struct socfpga_reset_manager {$/;"	s
socfpga_scan_manager	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^struct socfpga_scan_manager {$/;"	s
socfpga_sdr_ctrl	arch/arm/mach-socfpga/include/mach/sdram.h	/^struct socfpga_sdr_ctrl {$/;"	s
socfpga_sdr_reg_file	drivers/ddr/altera/sequencer.h	/^struct socfpga_sdr_reg_file {$/;"	s
socfpga_sdr_rw_load_jump_manager	drivers/ddr/altera/sequencer.h	/^struct socfpga_sdr_rw_load_jump_manager {$/;"	s
socfpga_sdr_rw_load_manager	drivers/ddr/altera/sequencer.h	/^struct socfpga_sdr_rw_load_manager {$/;"	s
socfpga_sdr_scc_mgr	drivers/ddr/altera/sequencer.h	/^struct socfpga_sdr_scc_mgr {$/;"	s
socfpga_sdram_apply_static_cfg	arch/arm/mach-socfpga/misc.c	/^static void socfpga_sdram_apply_static_cfg(void)$/;"	f	typeref:typename:void	file:
socfpga_sdram_config	arch/arm/mach-socfpga/include/mach/sdram.h	/^struct socfpga_sdram_config {$/;"	s
socfpga_sdram_io_config	arch/arm/mach-socfpga/include/mach/sdram.h	/^struct socfpga_sdram_io_config {$/;"	s
socfpga_sdram_misc_config	arch/arm/mach-socfpga/include/mach/sdram.h	/^struct socfpga_sdram_misc_config {$/;"	s
socfpga_sdram_rw_mgr_config	arch/arm/mach-socfpga/include/mach/sdram.h	/^struct socfpga_sdram_rw_mgr_config {$/;"	s
socfpga_system_manager	arch/arm/mach-socfpga/include/mach/system_manager.h	/^struct socfpga_system_manager {$/;"	s
socfpga_timer	arch/arm/mach-socfpga/include/mach/timer.h	/^struct socfpga_timer {$/;"	s
socfpgaimage_check_image_types	tools/socfpgaimage.c	/^static int socfpgaimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
socfpgaimage_check_params	tools/socfpgaimage.c	/^static int socfpgaimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
socfpgaimage_print_header	tools/socfpgaimage.c	/^static void socfpgaimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
socfpgaimage_set_header	tools/socfpgaimage.c	/^static void socfpgaimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
socfpgaimage_verify_header	tools/socfpgaimage.c	/^static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
socfpgaimage_vrec_header	tools/socfpgaimage.c	/^static int socfpgaimage_vrec_header(struct image_tool_params *params,$/;"	f	typeref:typename:int	file:
socket_base	drivers/pcmcia/ti_pci1410a.c	/^static u32 socket_base;$/;"	v	typeref:typename:u32	file:
socket_designation	include/smbios.h	/^	u8 socket_designation;$/;"	m	struct:smbios_type4	typeref:typename:u8
socmisc	include/andestech/andes_pcu.h	/^	unsigned int	socmisc;	\/* 0x48 - SoC Misc. *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
soctherm	arch/arm/dts/tegra124.dtsi	/^	soctherm: thermal-sensor@700e2000 {$/;"	l
sodr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	sodr;		\/* 0x30 Set Output Data Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
sodr	arch/arm/mach-at91/include/mach/atmel_pio4.h	/^	u32 sodr;		\/* 0x10 PIO Set Output Data Register *\/$/;"	m	struct:atmel_pio4_port	typeref:typename:u32
sof_fnr	include/usb/fotg210.h	/^	uint32_t sof_fnr; \/* 0x10c: SOF Frame Number Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
sof_mtr	include/usb/fotg210.h	/^	uint32_t sof_mtr; \/* 0x110: SOF Mask Timer Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
soff	arch/m68k/include/asm/coldfire/edma.h	/^	u16 soff;		\/* 0x06 Signed Source Address Offset *\/$/;"	m	struct:tcd_ctrl	typeref:typename:u16
soft	arch/arm/include/asm/processor.h	/^	struct fp_soft_struct	soft;$/;"	m	union:fp_state	typeref:struct:fp_soft_struct
soft_con	drivers/usb/phy/rockchip_usb2_phy.c	/^	struct usb2phy_reg soft_con;$/;"	m	struct:rockchip_usb2_phy_cfg	typeref:struct:usb2phy_reg	file:
soft_con	include/linux/usb/musb.h	/^	unsigned	soft_con:1 __deprecated; \/* soft connect required *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned
soft_del	fs/yaffs2/yaffs_guts.h	/^	u8 soft_del:1;		\/* it has also been soft deleted *\/$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
soft_del	fs/yaffs2/yaffs_guts.h	/^	u8 soft_del:1;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8:1
soft_del_pages	fs/yaffs2/yaffs_guts.h	/^	int soft_del_pages:10;	\/* number of soft deleted pages *\/$/;"	m	struct:yaffs_block_info	typeref:typename:int:10
soft_emulation	arch/nios2/cpu/traps.c	/^void soft_emulation (struct pt_regs *regs)$/;"	f	typeref:typename:void
soft_i2c_board_init	board/sunxi/board.c	/^static int soft_i2c_board_init(void) { return 0; }$/;"	f	typeref:typename:int	file:
soft_i2c_board_init	board/sunxi/board.c	/^static int soft_i2c_board_init(void)$/;"	f	typeref:typename:int	file:
soft_i2c_gpio_scl	board/sunxi/board.c	/^int soft_i2c_gpio_scl;$/;"	v	typeref:typename:int
soft_i2c_gpio_sda	board/sunxi/board.c	/^int soft_i2c_gpio_sda;$/;"	v	typeref:typename:int
soft_i2c_init	drivers/i2c/soft_i2c.c	/^static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)$/;"	f	typeref:typename:void	file:
soft_i2c_probe	drivers/i2c/soft_i2c.c	/^static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)$/;"	f	typeref:typename:int	file:
soft_i2c_read	drivers/i2c/soft_i2c.c	/^static int  soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
soft_i2c_write	drivers/i2c/soft_i2c.c	/^static int  soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
soft_mux_on	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 soft_mux_on;		\/* CPLD override physical switches Enable *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
soft_mux_on	board/freescale/ls1043ardb/cpld.h	/^	u8 soft_mux_on;		\/* 0x4 - Switch Control Enable Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
soft_mux_on	board/freescale/ls1046ardb/cpld.h	/^	u8 soft_mux_on;		\/* 0x4 - Switch Control Enable Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
soft_reset	drivers/i2c/mvtwsi.c	/^	u32 soft_reset;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
soft_reset	drivers/net/cpsw.c	/^	u32	soft_reset;$/;"	m	struct:cpsw_regs	typeref:typename:u32	file:
soft_reset	drivers/net/cpsw.c	/^	u32	soft_reset;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
soft_rst	include/vsc9953.h	/^	u32	soft_rst;$/;"	m	struct:vsc9953_chip_regs	typeref:typename:u32
soft_spi_claim_bus	drivers/spi/soft_spi.c	/^static int soft_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
soft_spi_cs_activate	drivers/spi/soft_spi.c	/^static int soft_spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:int	file:
soft_spi_cs_deactivate	drivers/spi/soft_spi.c	/^static int soft_spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:int	file:
soft_spi_ids	drivers/spi/soft_spi.c	/^static const struct udevice_id soft_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
soft_spi_ofdata_to_platdata	drivers/spi/soft_spi.c	/^static int soft_spi_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
soft_spi_ops	drivers/spi/soft_spi.c	/^static const struct dm_spi_ops soft_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
soft_spi_platdata	drivers/spi/soft_spi.c	/^struct soft_spi_platdata {$/;"	s	file:
soft_spi_priv	drivers/spi/soft_spi.c	/^struct soft_spi_priv {$/;"	s	file:
soft_spi_probe	drivers/spi/soft_spi.c	/^static int soft_spi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
soft_spi_read	drivers/rtc/ds1306.c	/^static unsigned char soft_spi_read (void)$/;"	f	typeref:typename:unsigned char	file:
soft_spi_release_bus	drivers/spi/soft_spi.c	/^static int soft_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
soft_spi_scl	drivers/spi/soft_spi.c	/^static int soft_spi_scl(struct udevice *dev, int bit)$/;"	f	typeref:typename:int	file:
soft_spi_sda	drivers/spi/soft_spi.c	/^static int soft_spi_sda(struct udevice *dev, int bit)$/;"	f	typeref:typename:int	file:
soft_spi_send	drivers/rtc/ds1306.c	/^static void soft_spi_send (unsigned char n)$/;"	f	typeref:typename:void	file:
soft_spi_set_mode	drivers/spi/soft_spi.c	/^static int soft_spi_set_mode(struct udevice *dev, unsigned int mode)$/;"	f	typeref:typename:int	file:
soft_spi_set_speed	drivers/spi/soft_spi.c	/^static int soft_spi_set_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
soft_spi_slave	drivers/spi/soft_spi_legacy.c	/^struct soft_spi_slave {$/;"	s	file:
soft_spi_xfer	drivers/spi/soft_spi.c	/^static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
soft_spi_xfer_24bit_3wire	drivers/video/ssd2828.c	/^static u32 soft_spi_xfer_24bit_3wire(const struct ssd2828_config *drv, u32 dout)$/;"	f	typeref:typename:u32	file:
softconnect	drivers/usb/musb-new/musb_core.h	/^	unsigned		softconnect:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
softrst	drivers/net/davinci_emac.h	/^	dv_reg		softrst;$/;"	m	struct:__anon759824920208	typeref:typename:dv_reg
softrst_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 softrst_con[21];$/;"	m	struct:rk3399_cru	typeref:typename:u32[21]
software_find_read_offset	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static void software_find_read_offset(struct exynos5420_phy_control *phy_ctrl,$/;"	f	typeref:typename:void	file:
software_interrupt	arch/arm/lib/vectors.S	/^software_interrupt:$/;"	l
software_interrupt	arch/nds32/cpu/n1213/start.S	/^software_interrupt:$/;"	l
software_on	board/freescale/t4rdb/cpld.h	/^	u8 software_on;	\/* 0x05 - Override Physical Switch Enable Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
software_subversion	board/astro/mcf5373l/astro.h	/^	char software_subversion;	\/* " ","a".."z" *\/$/;"	m	struct:card_id	typeref:typename:char
software_use	drivers/net/natsemi.c	/^	u32 software_use;$/;"	m	struct:_BufferDesc	typeref:typename:u32	file:
software_version	board/astro/mcf5373l/astro.h	/^	char software_version;$/;"	m	struct:card_id	typeref:typename:char
soh	tools/kwboot.c	/^	uint8_t soh;$/;"	m	struct:kwboot_block	typeref:typename:uint8_t	file:
sohci_get_current_frame_number	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static int sohci_get_current_frame_number (struct usb_device *usb_dev)$/;"	f	typeref:typename:int	file:
sohci_get_current_frame_number	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static int sohci_get_current_frame_number (struct usb_device *usb_dev)$/;"	f	typeref:typename:int	file:
sohci_get_current_frame_number	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static int sohci_get_current_frame_number (struct usb_device *usb_dev)$/;"	f	typeref:typename:int	file:
sohci_get_current_frame_number	drivers/usb/host/ohci-hcd.c	/^static int sohci_get_current_frame_number(ohci_t *ohci)$/;"	f	typeref:typename:int	file:
sohci_get_current_frame_number	drivers/usb/host/ohci-s3c24xx.c	/^static int sohci_get_current_frame_number(struct usb_device *usb_dev)$/;"	f	typeref:typename:int	file:
sohci_submit_job	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
sohci_submit_job	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
sohci_submit_job	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
sohci_submit_job	drivers/usb/host/ohci-hcd.c	/^int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,$/;"	f	typeref:typename:int
sohci_submit_job	drivers/usb/host/ohci-s3c24xx.c	/^int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
solve_linear_system	lib/bch.c	/^static int solve_linear_system(struct bch_control *bch, unsigned int *rows,$/;"	f	typeref:typename:int	file:
sopass	include/linux/ethtool.h	/^	__u8	sopass[SOPASS_MAX]; \/* SecureOn(tm) password *\/$/;"	m	struct:ethtool_wolinfo	typeref:typename:__u8[]
sopc0	arch/nios2/dts/10m50_devboard.dts	/^	sopc0: sopc@0 {$/;"	l
soprintf	tools/mxsimage.c	/^static void soprintf(struct sb_image_ctx *ictx, const char *fmt, ...)$/;"	f	typeref:typename:void	file:
sor	drivers/video/tegra124/dp.c	/^	struct udevice *sor;$/;"	m	struct:tegra_dp_priv	typeref:struct:udevice *	file:
sort	fs/yaffs2/ydirectenv.h	/^#define sort(/;"	d
sort_and_uniq	scripts/get_maintainer.pl	/^sub sort_and_uniq {$/;"	s
sort_array_by_ordering	drivers/input/input.c	/^static int sort_array_by_ordering(int *dest, int count, int *order,$/;"	f	typeref:typename:int	file:
sort_list	fs/jffs2/mergesort.c	/^int sort_list(struct b_list *list)$/;"	f	typeref:typename:int
sort_nodes	fs/ubifs/gc.c	/^static int sort_nodes(struct ubifs_info *c, struct ubifs_scan_leb *sleb,$/;"	f	typeref:typename:int	file:
sosc_ctr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 sosc_ctr;$/;"	m	struct:scsc_reg	typeref:typename:u32
sound0	arch/arm/dts/am43x-epos-evm.dts	/^	sound0: sound@0 {$/;"	l
sound0_master	arch/arm/dts/am43x-epos-evm.dts	/^		sound0_master: simple-audio-card,codec {$/;"	l
sound_codec_info	include/sound.h	/^struct sound_codec_info {$/;"	s
sound_compat	include/sound.h	/^enum sound_compat {$/;"	g
sound_create_square_wave	drivers/sound/sound.c	/^void sound_create_square_wave(unsigned short *data, int size, uint32_t freq)$/;"	f	typeref:typename:void
sound_init	drivers/sound/sandbox.c	/^int sound_init(const void *blob)$/;"	f	typeref:typename:int
sound_init	drivers/sound/sound-i2s.c	/^int sound_init(const void *blob)$/;"	f	typeref:typename:int
sound_master	arch/arm/dts/am335x-evmsk.dts	/^		sound_master: simple-audio-card,codec {$/;"	l
sound_play	drivers/sound/sandbox.c	/^int sound_play(uint32_t msec, uint32_t frequency)$/;"	f	typeref:typename:int
sound_play	drivers/sound/sound-i2s.c	/^int sound_play(uint32_t msec, uint32_t frequency)$/;"	f	typeref:typename:int
sounddefault	arch/arm/include/asm/setup.h	/^	    unsigned char sounddefault;		\/* 40 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned char
sounddefault	arch/arm/include/asm/setup.h	/^	u8 sounddefault;$/;"	m	struct:tag_acorn	typeref:typename:u8
source	arch/x86/include/asm/acpi_table.h	/^	u8 source;		\/* Bus-relative int. source (IRQ) *\/$/;"	m	struct:acpi_madt_irqoverride	typeref:typename:u8
source	cmd/source.c	/^source (ulong addr, const char *fit_uname)$/;"	f	typeref:typename:int
source	drivers/net/altera_tse.h	/^	u32 source;	\/* the address of data to be read. *\/$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u32
source_addr	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned char	source_addr[ENET_ADDR_LENGTH];$/;"	m	struct:enet_frame	typeref:typename:unsigned char[]
source_address	board/gdsys/common/cmd_ioloop.c	/^	u16 source_address;$/;"	m	struct:io_generic_packet	typeref:typename:u16	file:
source_help_text	cmd/source.c	/^static char source_help_text[] =$/;"	v	typeref:typename:char[]	file:
source_id	include/display.h	/^	int source_id;$/;"	m	struct:display_plat	typeref:typename:int
source_pad	drivers/net/altera_tse.h	/^	u32 source_pad;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u32
source_stmt	scripts/kconfig/zconf.y	/^source_stmt: T_SOURCE prompt T_EOL$/;"	l
sp	arch/arc/include/asm/ptrace.h	/^	long sp;$/;"	m	struct:pt_regs	typeref:typename:long
sp	arch/arm/mach-sunxi/board.c	/^	uint32_t sp;$/;"	m	struct:fel_stash	typeref:typename:uint32_t	file:
sp	arch/avr32/include/asm/ptrace.h	/^	unsigned long sp;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
sp	arch/blackfin/cpu/interrupt.S	/^	sp = CONFIG_BFIN_SCRATCH_REG;$/;"	d
sp	arch/blackfin/cpu/start.S	/^	sp = r0;$/;"	d
sp	arch/blackfin/lib/__kgdb.S	/^	sp = [p0 + 0x1C];$/;"	d
sp	arch/mips/include/asm/regdef.h	/^#define sp	/;"	d
sp	arch/nds32/include/asm/ptrace.h	/^	NDS32_REG sp;$/;"	m	struct:pt_regs	typeref:typename:NDS32_REG
sp	arch/openrisc/include/asm/ptrace.h	/^			long  sp;	\/* r1 *\/$/;"	m	struct:pt_regs::__anoneee9473c010a::__anoneee9473c0208	typeref:typename:long
sp	common/cli_hush.c	/^	int sp;				\/* number of SPECIAL_VAR_SYMBOL *\/$/;"	m	struct:child_prog	typeref:typename:int	file:
sp	drivers/net/greth.c	/^	int sp;			\/* 10\/100Mbps speed (1=100,0=10) *\/$/;"	m	struct:__anonb53b88540108	typeref:typename:int	file:
sp_init	arch/avr32/cpu/start.S	/^sp_init:$/;"	l
space_bits	fs/ubifs/ubifs.h	/^	int space_bits;$/;"	m	struct:ubifs_info	typeref:typename:int
space_fixup	fs/ubifs/ubifs.h	/^	unsigned int space_fixup:1;$/;"	m	struct:ubifs_info	typeref:typename:unsigned int:1
space_id	arch/x86/include/asm/acpi_table.h	/^	u8 space_id;	\/* Address space ID *\/$/;"	m	struct:acpi_gen_regaddr	typeref:typename:u8
space_lock	fs/ubifs/ubifs.h	/^	spinlock_t space_lock;$/;"	m	struct:ubifs_info	typeref:typename:spinlock_t
spansion_quad_enable	drivers/mtd/spi/spi_flash.c	/^static int spansion_quad_enable(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
spansion_s25fss_disable_4KB_erase	drivers/mtd/spi/spi_flash.c	/^static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)$/;"	f	typeref:typename:int	file:
spar	drivers/net/armada100_fec.h	/^	u32 spar;			\/* Serial Parameters *\/$/;"	m	struct:armdfec_reg	typeref:typename:u32
sparc_dcache_flush_all	arch/sparc/include/asm/processor.h	/^static __inline__ void sparc_dcache_flush_all(void)$/;"	f	typeref:typename:void
sparc_fpuwindow_regs	arch/sparc/include/asm/stack.h	/^	struct sparc_fpuwindow_regs {$/;"	s
sparc_icache_flush_all	arch/sparc/include/asm/processor.h	/^static __inline__ void sparc_icache_flush_all(void)$/;"	f	typeref:typename:void
sparc_load_reg_bypass	arch/sparc/include/asm/processor.h	/^static __inline__ unsigned long sparc_load_reg_bypass(unsigned long paddr)$/;"	f	typeref:typename:unsigned long
sparc_load_reg_cachemiss	arch/sparc/include/asm/processor.h	/^static __inline__ unsigned long sparc_load_reg_cachemiss(unsigned long paddr)$/;"	f	typeref:typename:unsigned long
sparc_load_reg_cachemiss_byte	arch/sparc/include/asm/processor.h	/^static __inline__ unsigned char sparc_load_reg_cachemiss_byte(unsigned long$/;"	f	typeref:typename:unsigned char
sparc_load_reg_cachemiss_qword	arch/sparc/include/asm/processor.h	/^static __inline__ unsigned long long sparc_load_reg_cachemiss_qword(unsigned$/;"	f	typeref:typename:unsigned long long
sparc_load_reg_cachemiss_word	arch/sparc/include/asm/processor.h	/^static __inline__ unsigned short sparc_load_reg_cachemiss_word(unsigned long$/;"	f	typeref:typename:unsigned short
sparc_ramdisk_image	arch/sparc/lib/bootm.c	/^			unsigned int sparc_ramdisk_image;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned int	file:
sparc_ramdisk_size	arch/sparc/lib/bootm.c	/^			unsigned int sparc_ramdisk_size;$/;"	m	struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	typeref:typename:unsigned int	file:
sparc_regwindow_regs	arch/sparc/include/asm/stack.h	/^	struct sparc_regwindow_regs {$/;"	s
sparc_srmmu_setup	arch/sparc/cpu/leon2/prom.c	/^} sparc_srmmu_setup;$/;"	t	typeref:struct:__anon686d3e2f0108	file:
sparc_srmmu_setup	arch/sparc/cpu/leon3/prom.c	/^} sparc_srmmu_setup;$/;"	t	typeref:struct:__anon54af13100108	file:
sparc_stackf	arch/sparc/include/asm/ptrace.h	/^struct sparc_stackf {$/;"	s
sparc_stackframe_regs	arch/sparc/include/asm/stack.h	/^	struct sparc_stackframe_regs {$/;"	s
sparc_store_reg_bypass	arch/sparc/include/asm/processor.h	/^static __inline__ void sparc_store_reg_bypass(unsigned long paddr,$/;"	f	typeref:typename:void
spare	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	unsigned char spare;$/;"	m	struct:i2c_pin_ctrl	typeref:typename:unsigned char
spare	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long spare;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
spare	drivers/usb/emul/sandbox_flash.c	/^	u8 spare;$/;"	m	struct:scsi_read10_req	typeref:typename:u8	file:
spare	drivers/usb/emul/sandbox_flash.c	/^	u8 spare[3];$/;"	m	struct:scsi_inquiry_resp	typeref:typename:u8[3]	file:
spare	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_spare spare;$/;"	m	struct:yaffs_nand_spare	typeref:struct:yaffs_spare
spare	include/efi.h	/^	u32 spare[5];$/;"	m	struct:efi_info_hdr	typeref:typename:u32[5]
spare	include/efi.h	/^	u64 spare;$/;"	m	struct:efi_entry_memmap	typeref:typename:u64
spare	include/tsi148.h	/^	unsigned int spare;                   \/* 0x01c not used                   *\/$/;"	m	struct:_INBOUND	typeref:typename:unsigned int
spare0	drivers/serial/serial_mxc.c	/^	u32 spare0[15];$/;"	m	struct:mxc_uart	typeref:typename:u32[15]	file:
spare0	include/tsi148.h	/^	unsigned int spare0[(0x03c-0x018)\/4]; \/* 0x018         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[]
spare0	include/universe.h	/^	unsigned int spare0[10];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[10]
spare1	drivers/serial/serial_mxc.c	/^	u32 spare1[15];$/;"	m	struct:mxc_uart	typeref:typename:u32[15]	file:
spare1	include/efi.h	/^	u32 spare1;$/;"	m	struct:efi_entry_hdr	typeref:typename:u32
spare1	include/tsi148.h	/^	unsigned int spare1[(0x100-0x048)\/4]; \/* 0x048         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[]
spare1	include/universe.h	/^	unsigned int spare1[48];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[48]
spare10	include/universe.h	/^	unsigned int spare10[8];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[8]
spare11	include/universe.h	/^	unsigned int spare11[2];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[2]
spare12	include/universe.h	/^	unsigned int spare12[25];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[25]
spare2	drivers/usb/emul/sandbox_flash.c	/^	u8 spare2[3];$/;"	m	struct:scsi_read10_req	typeref:typename:u8[3]	file:
spare2	include/efi.h	/^	u64 spare2;$/;"	m	struct:efi_entry_hdr	typeref:typename:u64
spare2	include/tsi148.h	/^	unsigned int spare2[3];               \/* 0x244 - 0x24c *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[3]
spare2	include/universe.h	/^	unsigned int spare2[8];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[8]
spare3	include/tsi148.h	/^	unsigned int spare3[3];               \/* 0x254 - 0x25c *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[3]
spare3	include/universe.h	/^	unsigned int spare3[27];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[27]
spare4	include/tsi148.h	/^	unsigned int spare4[1];               \/* 0x26c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[1]
spare4	include/universe.h	/^	unsigned int spare4[1];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[1]
spare5	include/tsi148.h	/^	unsigned int spare5[31];              \/* 0x284 - 0x2fc *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[31]
spare5	include/universe.h	/^	unsigned int spare5[1];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[1]
spare6	include/tsi148.h	/^	unsigned int spare6[1];               \/* 0x444         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[1]
spare6	include/universe.h	/^	unsigned int spare6[1];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[1]
spare7	include/tsi148.h	/^	unsigned int spare7[40];              \/* 0x460 - 0x4fc *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[40]
spare7	include/universe.h	/^	unsigned int spare7[54];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[54]
spare8	include/universe.h	/^	unsigned int spare8[48];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[48]
spare9	include/universe.h	/^	unsigned int spare9[700];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[700]
spareSize	fs/yaffs2/yaffs_nandif.h	/^	unsigned spareSize;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
spare_area	drivers/mtd/nand/mxc_nand.h	/^	u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];$/;"	m	struct:mxc_nand_regs	typeref:typename:u8[][]
spare_area_size	drivers/mtd/nand/mxc_nand.h	/^	u16 spare_area_size;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
spare_buf	include/linux/mtd/onenand.h	/^	unsigned char		*spare_buf;$/;"	m	struct:onenand_chip	typeref:typename:unsigned char *
spare_bytes_per_chunk	fs/yaffs2/yaffs_guts.h	/^	int spare_bytes_per_chunk;	\/* spare area size *\/$/;"	m	struct:yaffs_param	typeref:typename:int
spare_bytes_per_page	include/linux/mtd/nand.h	/^	__le16 spare_bytes_per_page;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
spare_bytes_per_page	include/linux/mtd/nand.h	/^	__le16 spare_bytes_per_page;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
spare_bytes_per_ppage	include/linux/mtd/nand.h	/^	__le16 spare_bytes_per_ppage;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
spare_ctl	drivers/spi/tegra114_spi.c	/^	u32 spare_ctl;	\/* 18c:SPI_SPARE_CTRL register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
spare_ctl	drivers/spi/tegra210_qspi.c	/^	u32 spare_ctl;	\/* 18c:QSPI_SPARE_CTRL register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
spare_only	drivers/mtd/nand/mxc_nand.c	/^	int				spare_only;$/;"	m	struct:mxc_nand_host	typeref:typename:int	file:
spare_size	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		spare_size;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
spare_size	tools/atmelimage.c	/^	int spare_size;$/;"	m	struct:pmecc_config	typeref:typename:int	file:
sparecr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 sparecr[8];$/;"	m	struct:ccsr_scfg	typeref:typename:u32[8]
sparecr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 sparecr[8];	\/* 0x500 Spare Control register(0-7) *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32[8]
spareonly	drivers/mtd/nand/mpc5121_nfc.c	/^	int spareonly;$/;"	m	struct:mpc5121_nfc_prv	typeref:typename:int	file:
sparse_header	include/sparse_format.h	/^typedef struct sparse_header {$/;"	s
sparse_header_t	include/sparse_format.h	/^} sparse_header_t;$/;"	t	typeref:struct:sparse_header
sparse_storage	include/image-sparse.h	/^struct sparse_storage {$/;"	s
spartan2_dump	drivers/fpga/spartan2.c	/^static int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan2_info	drivers/fpga/spartan2.c	/^static int spartan2_info(xilinx_desc *desc)$/;"	f	typeref:typename:int	file:
spartan2_load	drivers/fpga/spartan2.c	/^static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int	file:
spartan2_op	drivers/fpga/spartan2.c	/^struct xilinx_fpga_op spartan2_op = {$/;"	v	typeref:struct:xilinx_fpga_op
spartan2_sp_dump	drivers/fpga/spartan2.c	/^static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan2_sp_load	drivers/fpga/spartan2.c	/^static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan2_ss_dump	drivers/fpga/spartan2.c	/^static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan2_ss_load	drivers/fpga/spartan2.c	/^static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan3_dump	drivers/fpga/spartan3.c	/^static int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan3_info	drivers/fpga/spartan3.c	/^static int spartan3_info(xilinx_desc *desc)$/;"	f	typeref:typename:int	file:
spartan3_load	drivers/fpga/spartan3.c	/^static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int	file:
spartan3_op	drivers/fpga/spartan3.c	/^struct xilinx_fpga_op spartan3_op = {$/;"	v	typeref:struct:xilinx_fpga_op
spartan3_sp_dump	drivers/fpga/spartan3.c	/^static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan3_sp_load	drivers/fpga/spartan3.c	/^static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan3_ss_dump	drivers/fpga/spartan3.c	/^static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spartan3_ss_load	drivers/fpga/spartan3.c	/^static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
spbah	arch/powerpc/include/asm/immap_85xx.h	/^	u32 spbah;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
spbal	arch/powerpc/include/asm/immap_85xx.h	/^	u32 spbal;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
spbdcr	drivers/spi/sh_qspi.c	/^	unsigned short spbdcr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned short	file:
spbfcr	drivers/spi/sh_qspi.c	/^	unsigned char spbfcr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spbmul0	drivers/spi/sh_qspi.c	/^	unsigned long spbmul0;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned long	file:
spbmul1	drivers/spi/sh_qspi.c	/^	unsigned long spbmul1;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned long	file:
spbmul2	drivers/spi/sh_qspi.c	/^	unsigned long spbmul2;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned long	file:
spbmul3	drivers/spi/sh_qspi.c	/^	unsigned long spbmul3;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned long	file:
spbr	drivers/spi/sh_qspi.c	/^	unsigned char spbr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spc	drivers/bios_emulator/include/x86emu/regs.h	/^	struct i386_special_regs spc;$/;"	m	struct:__anon39451e6d0808	typeref:struct:i386_special_regs
spccr	arch/powerpc/include/asm/immap_512x.h	/^	u32 spccr;		\/* SPDIF Clock Control Register *\/$/;"	m	struct:clk512x	typeref:typename:u32
spckd	drivers/spi/sh_qspi.c	/^	unsigned char spckd;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spcmd0	drivers/spi/sh_qspi.c	/^	unsigned short spcmd0;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned short	file:
spcmd1	drivers/spi/sh_qspi.c	/^	unsigned short spcmd1;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned short	file:
spcmd2	drivers/spi/sh_qspi.c	/^	unsigned short spcmd2;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned short	file:
spcmd3	drivers/spi/sh_qspi.c	/^	unsigned short spcmd3;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned short	file:
spcom	arch/powerpc/include/asm/immap_85xx.h	/^	u8	spcom;$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u8
spcom	include/linux/immap_qe.h	/^	u8 spcom;		\/* SPI command register  *\/$/;"	m	struct:spi	typeref:typename:u8
spcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	spcon;$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8
spcr	arch/powerpc/include/asm/immap_512x.h	/^	u32 spcr;		\/* System Priority Configuration Register *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
spcr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 spcr;		\/* System Priority Configuration Register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
spcr	drivers/spi/sh_qspi.c	/^	unsigned char spcr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spctl	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 spctl;$/;"	m	struct:clock_control_regs	typeref:typename:u32
spctl0	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 spctl0;	\/* System PLL Control Register 0 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
spctl1	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 spctl1;	\/* System PLL Control Register 1 *\/$/;"	m	struct:pll_regs	typeref:typename:u32
spd	board/freescale/common/ngpixis.h	/^	u8 spd;$/;"	m	struct:ngpixis	typeref:typename:u8
spd	board/freescale/common/pixis.h	/^	u8 spd;$/;"	m	struct:pixis	typeref:typename:u8
spd_addresses	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t spd_addresses[4];$/;"	m	struct:pei_data	typeref:typename:uint8_t[4]
spd_addresses	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint8_t spd_addresses[4];$/;"	m	struct:pei_data	typeref:typename:uint8_t[4]
spd_check	common/ddr_spd.c	/^spd_check(const u8 *buf, u8 spd_rev, u8 spd_cksum)$/;"	f	typeref:typename:int	file:
spd_data	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t spd_data[2][2][512];$/;"	m	struct:pei_data	typeref:typename:uint8_t[2][2][512]
spd_data	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint8_t spd_data[4][256];$/;"	m	struct:pei_data	typeref:typename:uint8_t[4][256]
spd_data	drivers/ddr/marvell/axp/ddr3_axp_vars.h	/^u8 spd_data[SPD_SIZE] = {$/;"	v	typeref:typename:u8[]
spd_debug	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^static void spd_debug(spd_eeprom_t *spd)$/;"	f	typeref:typename:void	file:
spd_eeprom_s	include/spd.h	/^typedef struct spd_eeprom_s {$/;"	s
spd_eeprom_t	include/spd.h	/^} spd_eeprom_t;$/;"	t	typeref:struct:spd_eeprom_s
spd_i2c_addr	drivers/ddr/fsl/main.c	/^u8 spd_i2c_addr[CONFIG_NUM_DDR_CONTROLLERS][CONFIG_DIMM_SLOTS_PER_CTLR] = {$/;"	v	typeref:typename:u8[][]
spd_installed_dimms	include/fsl_ddr.h	/^	   spd_installed_dimms[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];$/;"	m	struct:__anonbfc8c40c0108	typeref:typename:generic_spd_eeprom_t[][]
spd_read	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^int spd_read(uint addr)$/;"	f	typeref:typename:int
spd_read	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^static unsigned char spd_read(uchar chip, uint addr)$/;"	f	typeref:typename:unsigned char	file:
spd_read	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static unsigned char spd_read(uchar chip, uint addr)$/;"	f	typeref:typename:unsigned char	file:
spd_read	arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c	/^static unsigned char spd_read(u8 chip, unsigned int addr)$/;"	f	typeref:typename:unsigned char	file:
spd_rev	include/ddr_spd.h	/^	uint8_t spd_rev;		\/*  1 Total # bytes of SPD *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
spd_rev	include/ddr_spd.h	/^	unsigned char spd_rev;         \/*  1 Total # bytes of SPD mem device *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
spd_rev	include/ddr_spd.h	/^	unsigned char spd_rev;     \/* 62 SPD Data Revision Code *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
spd_rev	include/ddr_spd.h	/^	unsigned char spd_rev;     \/* 62 SPD Data Revision Code *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
spd_rev	include/spd.h	/^	unsigned char spd_rev;     \/* 62 SPD Data Revision Code *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
spd_sdram	arch/powerpc/cpu/mpc83xx/spd_sdram.c	/^long int spd_sdram()$/;"	f	typeref:typename:long int
spd_sdram	arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c	/^long int spd_sdram(int(read_spd)(uint addr))$/;"	f	typeref:typename:long int
spd_sdram	arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c	/^long int spd_sdram(void) {$/;"	f	typeref:typename:long int
spd_to_ps	drivers/ddr/fsl/ddr4_dimm_params.c	/^#define spd_to_ps(/;"	d	file:
spdcr	drivers/spi/sh_qspi.c	/^	unsigned char spdcr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spdif	arch/arm/dts/imx6qdl.dtsi	/^				spdif: spdif@02004000 {$/;"	l
spdif	arch/arm/dts/imx6ull.dtsi	/^				spdif: spdif@02004000 {$/;"	l	label:aips1
spdif	arch/arm/dts/rk3288.dtsi	/^	spdif: sound@ff88b0000 {$/;"	l
spdif	arch/arm/dts/rk3399.dtsi	/^	spdif: spdif@ff870000 {$/;"	l
spdif	arch/arm/dts/sun4i-a10.dtsi	/^		spdif: spdif@01c21000 {$/;"	l
spdif	arch/arm/dts/sun7i-a20.dtsi	/^		spdif: spdif@01c21000 {$/;"	l
spdif	arch/powerpc/include/asm/immap_512x.h	/^	spdif512x_t		spdif;		\/* SPDIF *\/$/;"	m	struct:immap	typeref:typename:spdif512x_t
spdif512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct spdif512x {$/;"	s
spdif512x_t	arch/powerpc/include/asm/immap_512x.h	/^} spdif512x_t;$/;"	t	typeref:struct:spdif512x
spdif_biphase_int_sta	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	spdif_biphase_int_sta;$/;"	m	struct:rk3288_edp	typeref:typename:u32
spdif_bus	arch/arm/dts/rk3399.dtsi	/^			spdif_bus: spdif-bus {$/;"	l
spdif_clk	arch/arm/dts/sun4i-a10.dtsi	/^		spdif_clk: clk@01c200c0 {$/;"	l
spdif_clk	arch/arm/dts/sun7i-a20.dtsi	/^		spdif_clk: clk@01c200c0 {$/;"	l
spdif_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 spdif_clk_cfg;	\/* 0xc0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spdif_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 spdif_clk_cfg;	\/* 0xc0 SPDIF clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spdif_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 spdif_clk_cfg;      \/* 0xc0 SPDIF clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spdif_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 spdif_clk_cfg;	\/* 0xc0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spdif_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 spdif_clk_cfg;	\/* 0xc0 SPDIF clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spdif_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 spdif_clk_cfg;      \/* 0xc0 SPDIF clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spdif_out	arch/arm/dts/rk3288-rock2-square.dts	/^	spdif_out: spdif-out {$/;"	l
spdif_out	arch/arm/dts/sun4i-a10-a1000.dts	/^	spdif_out: spdif-out {$/;"	l
spdif_out	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	spdif_out: spdif-out {$/;"	l
spdif_out	arch/arm/dts/sun7i-a20-itead-ibox.dts	/^	spdif_out: spdif-out {$/;"	l
spdif_tx	arch/arm/dts/rk3288.dtsi	/^			spdif_tx: spdif-tx {$/;"	l
spdif_tx_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spdif_tx_pins_a: spdif@0 {$/;"	l	label:pio
spdif_tx_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spdif_tx_pins_a: spdif@0 {$/;"	l	label:pio
spdn_cnt	drivers/block/sata_dwc.h	/^	int			spdn_cnt;$/;"	m	struct:ata_device	typeref:typename:int
spdr	drivers/spi/sh_qspi.c	/^	unsigned long spdr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned long	file:
spear6xx_usbh_stop	drivers/usb/host/ehci-spear.c	/^static void spear6xx_usbh_stop(void)$/;"	f	typeref:typename:void	file:
spear_board_init	board/spear/common/spr_misc.c	/^int spear_board_init(ulong mach_type)$/;"	f	typeref:typename:int
spear_emi_init	board/spear/common/spr_misc.c	/^void spear_emi_init(void)$/;"	f	typeref:typename:void
spear_late_init	arch/arm/cpu/arm926ejs/spear/spear600.c	/^void spear_late_init(void)$/;"	f	typeref:typename:void
spear_phy_reset	board/spear/spear320/spear320.c	/^static void spear_phy_reset(void)$/;"	f	typeref:typename:void	file:
spear_sdhci_init	drivers/mmc/spear_sdhci.c	/^int spear_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)$/;"	f	typeref:typename:int
spec	arch/sandbox/include/asm/state.h	/^	const char *spec;$/;"	m	struct:sandbox_spi_info	typeref:typename:const char *
spec1	cmd/fdc.c	/^	unsigned char	spec1;	\/* stepping rate, head unload time *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned char	file:
spec_ctrl	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 spec_ctrl;			\/* Speculation Control *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
spec_ctrl	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 spec_ctrl;			\/* Speculation Control *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
special	drivers/net/e1000.h	/^			uint16_t special;	\/* *\/$/;"	m	struct:e1000_data_desc::__anon7fc273451c0a::__anon7fc273451d08	typeref:typename:uint16_t
special	drivers/net/e1000.h	/^			uint16_t special;$/;"	m	struct:e1000_tx_desc::__anon7fc27345120a::__anon7fc273451308	typeref:typename:uint16_t
special	drivers/net/e1000.h	/^	uint16_t special;$/;"	m	struct:e1000_rx_desc	typeref:typename:uint16_t
special_compare_pattern	drivers/ddr/marvell/axp/ddr3_sdram.c	/^static int special_compare_pattern(u32 uj)$/;"	f	typeref:typename:int	file:
special_field	cmd/mii.c	/^static int special_field($/;"	f	typeref:typename:int	file:
special_gpio_free	arch/blackfin/cpu/gpio.c	/^void special_gpio_free(unsigned gpio)$/;"	f	typeref:typename:void
special_gpio_free	drivers/gpio/adi_gpio2.c	/^void special_gpio_free(unsigned gpio)$/;"	f	typeref:typename:void
special_gpio_request	arch/blackfin/cpu/gpio.c	/^int special_gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
special_gpio_request	drivers/gpio/adi_gpio2.c	/^int special_gpio_request(unsigned gpio, const char *label)$/;"	f	typeref:typename:int
special_pattern	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 special_pattern[DQ_NUM][LEN_SPECIAL_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[DQ_NUM][LEN_SPECIAL_PATTERN]__aligned (32)
special_pattern	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 special_pattern[DQ_NUM][LEN_SPECIAL_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[DQ_NUM][LEN_SPECIAL_PATTERN]__aligned (32)
specific_eoi	arch/x86/lib/i8259.c	/^void specific_eoi(int irq)$/;"	f	typeref:typename:void
specr	arch/m68k/include/asm/immap_5275.h	/^	u16 specr;$/;"	m	struct:usb	typeref:typename:u16
specs	api/api_storage.c	/^static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, NULL }, };$/;"	v	typeref:struct:stor_spec[]	file:
speed	arch/arm/include/asm/arch-stm32f4/gpio.h	/^	enum stm32_gpio_speed	speed;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_speed
speed	arch/arm/include/asm/arch-stm32f7/gpio.h	/^	enum stm32_gpio_speed	speed;$/;"	m	struct:stm32_gpio_ctl	typeref:enum:stm32_gpio_speed
speed	arch/arm/include/asm/imx-common/mxc_i2c.h	/^	int speed;$/;"	m	struct:mxc_i2c_bus	typeref:typename:int
speed	arch/powerpc/include/asm/fsl_i2c.h	/^	uint speed;$/;"	m	struct:fsl_i2c_dev	typeref:typename:uint
speed	drivers/i2c/at91_i2c.h	/^	u32 speed;$/;"	m	struct:at91_i2c_bus	typeref:typename:u32
speed	drivers/i2c/kona_i2c.c	/^	uint speed;$/;"	m	struct:bcm_kona_i2c_dev	typeref:typename:uint	file:
speed	drivers/i2c/mvtwsi.c	/^	uint speed;$/;"	m	struct:mvtwsi_i2c_dev	typeref:typename:uint	file:
speed	drivers/i2c/omap24xx_i2c.c	/^	unsigned int speed;$/;"	m	struct:omap_i2c	typeref:typename:unsigned int	file:
speed	drivers/i2c/rk_i2c.c	/^	unsigned int speed;$/;"	m	struct:rk_i2c	typeref:typename:unsigned int	file:
speed	drivers/i2c/tegra_i2c.c	/^	int			speed;$/;"	m	struct:i2c_bus	typeref:typename:int	file:
speed	drivers/net/4xx_enet.c	/^	unsigned int speed;	\/* specified speed 10,100 or 1000 *\/$/;"	m	struct:fixed_phy_port	typeref:typename:unsigned int	file:
speed	drivers/net/mvneta.c	/^	unsigned int speed;$/;"	m	struct:mvneta_port	typeref:typename:unsigned int	file:
speed	drivers/net/mvpp2.c	/^	unsigned int speed;$/;"	m	struct:mvpp2_port	typeref:typename:unsigned int	file:
speed	drivers/net/sun8i_emac.c	/^	u32 speed;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
speed	drivers/phy/marvell/comphy.h	/^	u32 speed;$/;"	m	struct:comphy_map	typeref:typename:u32
speed	drivers/qe/uec.h	/^	int				speed;$/;"	m	struct:uec_info	typeref:typename:int
speed	drivers/qe/uec_phy.c	/^	unsigned int speed;	\/* specified speed 10,100 or 1000 *\/$/;"	m	struct:fixed_phy_port	typeref:typename:unsigned int	file:
speed	drivers/qe/uec_phy.h	/^	int speed;$/;"	m	struct:uec_mii_info	typeref:typename:int
speed	drivers/spi/ich.h	/^	int speed;		\/* pointer to speed control *\/$/;"	m	struct:ich_spi_priv	typeref:typename:int
speed	drivers/usb/dwc3/core.h	/^	u8			speed;$/;"	m	struct:dwc3	typeref:typename:u8
speed	drivers/usb/gadget/rndis.h	/^	u32			speed;$/;"	m	struct:rndis_params	typeref:typename:u32
speed	drivers/usb/host/r8a66597.h	/^	u16 speed;	\/* HSMODE or FSMODE or LSMODE *\/$/;"	m	struct:r8a66597	typeref:typename:u16
speed	include/i2c.h	/^	int		speed;$/;"	m	struct:i2c_adapter	typeref:typename:int
speed	include/linux/ethtool.h	/^	__u16	speed;		\/* The forced speed, 10Mb, 100Mb, gigabit *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u16
speed	include/linux/usb/gadget.h	/^	enum usb_device_speed		speed;$/;"	m	struct:usb_gadget	typeref:enum:usb_device_speed
speed	include/linux/usb/gadget.h	/^	enum usb_device_speed	speed;$/;"	m	struct:usb_gadget_driver	typeref:enum:usb_device_speed
speed	include/phy.h	/^	int speed;$/;"	m	struct:phy_device	typeref:typename:int
speed	include/spi.h	/^	uint speed;$/;"	m	struct:spi_slave	typeref:typename:uint
speed	include/usb.h	/^	int	speed;			\/* full\/low\/high *\/$/;"	m	struct:usb_device	typeref:typename:int
speed	tools/gdb/gdbcont.c	/^speed_t speed = B230400;$/;"	v	typeref:typename:speed_t
speed	tools/gdb/gdbsend.c	/^speed_t speed = B230400;$/;"	v	typeref:typename:speed_t
speed_bin_index	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^	enum hws_speed_bin speed_bin_index;$/;"	m	struct:if_params	typeref:enum:hws_speed_bin
speed_bin_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u32 speed_bin_table(u8 index, enum speed_bin_table_elements element)$/;"	f	typeref:typename:u32
speed_bin_table_elements	drivers/ddr/marvell/a38x/ddr3_topology_def.h	/^enum speed_bin_table_elements {$/;"	g
speed_bin_table_t_rc	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u32 speed_bin_table_t_rc[] = {$/;"	v	typeref:typename:u32[]
speed_bin_table_t_rcd_t_rp	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u32 speed_bin_table_t_rcd_t_rp[] = {$/;"	v	typeref:typename:u32[]
speed_downgraded	drivers/net/e1000.h	/^	bool		speed_downgraded;$/;"	m	struct:e1000_hw	typeref:typename:bool
speed_hi	include/linux/ethtool.h	/^	__u16	speed_hi;$/;"	m	struct:ethtool_cmd	typeref:typename:__u16
speed_hz	drivers/spi/fsl_dspi.c	/^	uint speed_hz;$/;"	m	struct:fsl_dspi_platdata	typeref:typename:uint	file:
speed_hz	drivers/spi/fsl_dspi.c	/^	uint speed_hz;$/;"	m	struct:fsl_dspi_priv	typeref:typename:uint	file:
speed_hz	drivers/spi/fsl_qspi.c	/^	u32 speed_hz;$/;"	m	struct:fsl_qspi_platdata	typeref:typename:u32	file:
speed_hz	drivers/spi/fsl_qspi.c	/^	u32 speed_hz;$/;"	m	struct:fsl_qspi_priv	typeref:typename:u32	file:
speed_hz	drivers/spi/pic32_spi.c	/^	u32			speed_hz; \/* spi-clk rate *\/$/;"	m	struct:pic32_spi_priv	typeref:typename:u32	file:
speed_hz	drivers/spi/rk_spi.c	/^	unsigned int speed_hz;$/;"	m	struct:rockchip_spi_priv	typeref:typename:unsigned int	file:
speed_hz	drivers/spi/zynq_qspi.c	/^	u32 speed_hz;$/;"	m	struct:zynq_qspi_platdata	typeref:typename:u32	file:
speed_hz	drivers/spi/zynq_spi.c	/^	u32 speed_hz;$/;"	m	struct:zynq_spi_platdata	typeref:typename:u32	file:
speed_hz	include/i2c.h	/^	int speed_hz;$/;"	m	struct:dm_i2c_bus	typeref:typename:int
speedmap	tools/gdb/serial.c	/^static struct speedmap {$/;"	s	file:
speedmap	tools/gdb/serial.c	/^} speedmap[] = {$/;"	v	typeref:struct:speedmap[]
speeds	arch/arm/mach-keystone/clock.c	/^int __weak speeds[DEVSPEED_NUMSPDS] = {$/;"	v	typeref:typename:int __weak[]
speeds	board/ti/ks2_evm/board_k2e.c	/^int speeds[DEVSPEED_NUMSPDS] = {$/;"	v	typeref:typename:int[]
spi	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	spi;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
spi	arch/powerpc/include/asm/cpm_8260.h	/^typedef struct spi {$/;"	s
spi	arch/powerpc/include/asm/cpm_85xx.h	/^typedef struct spi {$/;"	s
spi	arch/powerpc/include/asm/immap_83xx.h	/^	spi8xxx_t		spi;		\/* Serial Peripheral Interface *\/$/;"	m	struct:immap	typeref:typename:spi8xxx_t
spi	arch/powerpc/include/asm/immap_83xx.h	/^	u8			spi[0x100];$/;"	m	struct:immap	typeref:typename:u8[0x100]
spi	arch/sandbox/include/asm/state.h	/^	struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS]$/;"	m	struct:sandbox_state	typeref:struct:sandbox_spi_info[][]
spi	arch/sparc/cpu/leon2/prom.c	/^static struct leon_prom_info PROM_DATA spi = {$/;"	v	typeref:struct:leon_prom_info PROM_DATA	file:
spi	arch/sparc/cpu/leon3/prom.c	/^static struct leon_prom_info PROM_DATA spi = {$/;"	v	typeref:struct:leon_prom_info PROM_DATA	file:
spi	arch/x86/dts/bayleybay.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/baytrail_som-db5800-som-6867.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/broadwell_som-6896.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/chromebook_link.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/chromebook_samus.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/chromebox_panther.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/conga-qeval20-qa3-e3845.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/crownbay.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/dfi-bt700.dtsi	/^			spi: spi {$/;"	l
spi	arch/x86/dts/galileo.dts	/^			spi: spi {$/;"	l
spi	arch/x86/dts/minnowmax.dts	/^			spi: spi {$/;"	l
spi	drivers/net/e1000.h	/^	struct spi_slave spi;$/;"	m	struct:e1000_hw	typeref:struct:spi_slave
spi	drivers/video/scf0403_lcd.c	/^	struct spi_slave *spi;$/;"	m	struct:scf0403_priv	typeref:struct:spi_slave *	file:
spi	include/commproc.h	/^typedef struct spi {$/;"	s
spi	include/linux/ethtool.h	/^	__be32	spi;$/;"	m	struct:ethtool_ah_espip4_spec	typeref:typename:__be32
spi	include/linux/immap_qe.h	/^	spi_t spi[0x2];		\/* spi  *\/$/;"	m	struct:qe_immap	typeref:typename:spi_t[0x2]
spi	include/linux/immap_qe.h	/^typedef struct spi {$/;"	s
spi	include/power/pmic.h	/^		struct p_spi spi;$/;"	m	union:pmic::hw	typeref:struct:p_spi
spi	include/spi_flash.h	/^	struct spi_slave *spi;$/;"	m	struct:spi_flash	typeref:struct:spi_slave *
spi0	arch/arm/dts/am33xx.dtsi	/^		spi0: spi@48030000 {$/;"	l
spi0	arch/arm/dts/am4372.dtsi	/^		spi0: spi@48030000 {$/;"	l
spi0	arch/arm/dts/armada-370-xp.dtsi	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-375.dtsi	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-37xx.dtsi	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-38x.dtsi	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-ap806.dtsi	/^			spi0: spi@510600 {$/;"	l
spi0	arch/arm/dts/armada-xp-gp.dts	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-xp-maxbcm.dts	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-xp-synology-ds414.dts	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-xp-theadorable.dts	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/armada-xp.dtsi	/^			spi0: spi@10600 {$/;"	l
spi0	arch/arm/dts/at91-sama5d2_xplained.dts	/^			spi0: spi@f8000000 {$/;"	l
spi0	arch/arm/dts/at91sam9260.dtsi	/^			spi0: spi@fffc8000 {$/;"	l
spi0	arch/arm/dts/at91sam9261.dtsi	/^			spi0: spi@fffc8000 {$/;"	l
spi0	arch/arm/dts/at91sam9263.dtsi	/^			spi0: spi@fffa4000 {$/;"	l
spi0	arch/arm/dts/at91sam9g20-taurus.dts	/^			spi0: spi@fffc8000 {$/;"	l
spi0	arch/arm/dts/at91sam9g45-corvus.dts	/^			spi0: spi@fffa4000{$/;"	l
spi0	arch/arm/dts/at91sam9g45-gurnard.dts	/^			spi0: spi@fffa4000 {$/;"	l
spi0	arch/arm/dts/at91sam9g45.dtsi	/^			spi0: spi@fffa4000 {$/;"	l
spi0	arch/arm/dts/k2g.dtsi	/^		spi0: spi@21805400 {$/;"	l
spi0	arch/arm/dts/keystone.dtsi	/^		spi0: spi@21000400 {$/;"	l
spi0	arch/arm/dts/rk3288.dtsi	/^	spi0: spi@ff110000 {$/;"	l
spi0	arch/arm/dts/rk3399.dtsi	/^	spi0: spi@ff1c0000 {$/;"	l
spi0	arch/arm/dts/sama5d2.dtsi	/^			spi0: spi@f8000000 {$/;"	l
spi0	arch/arm/dts/socfpga.dtsi	/^		spi0: spi@fff00000 {$/;"	l
spi0	arch/arm/dts/sun4i-a10.dtsi	/^		spi0: spi@01c05000 {$/;"	l
spi0	arch/arm/dts/sun5i.dtsi	/^		spi0: spi@01c05000 {$/;"	l
spi0	arch/arm/dts/sun6i-a31.dtsi	/^		spi0: spi@01c68000 {$/;"	l
spi0	arch/arm/dts/sun7i-a20.dtsi	/^		spi0: spi@01c05000 {$/;"	l
spi0	arch/arm/dts/zynq-7000.dtsi	/^		spi0: spi@e0006000 {$/;"	l	label:amba
spi0	arch/arm/dts/zynqmp.dtsi	/^		spi0: spi@ff040000 {$/;"	l
spi0	arch/mips/dts/ar933x.dtsi	/^		spi0: spi@1f000000 {$/;"	l
spi0	arch/mips/dts/ar934x.dtsi	/^		spi0: spi@1f000000 {$/;"	l
spi0	arch/mips/dts/qca953x.dtsi	/^		spi0: spi@1f000000 {$/;"	l
spi0	arch/x86/dts/cougarcanyon2.dts	/^			spi0: spi {$/;"	l
spi0	arch/xtensa/dts/xtfpga.dtsi	/^		spi0: spi-master@0d0a0000 {$/;"	l
spi0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_aper_clk, sdio1_aper_clk, spi0_aper_clk, spi1_aper_clk,$/;"	e	enum:zynq_clk
spi0_clk	arch/arm/dts/at91sam9260.dtsi	/^					spi0_clk: spi0_clk {$/;"	l
spi0_clk	arch/arm/dts/at91sam9261.dtsi	/^					spi0_clk: spi0_clk {$/;"	l
spi0_clk	arch/arm/dts/at91sam9263.dtsi	/^					spi0_clk: spi0_clk {$/;"	l
spi0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					spi0_clk: spi0_clk {$/;"	l
spi0_clk	arch/arm/dts/rk3288.dtsi	/^			spi0_clk: spi0-clk {$/;"	l
spi0_clk	arch/arm/dts/rk3399.dtsi	/^			spi0_clk: spi0-clk {$/;"	l
spi0_clk	arch/arm/dts/sama5d2.dtsi	/^					spi0_clk: spi0_clk@33 {$/;"	l
spi0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		spi0_clk: clk@01c200a0 {$/;"	l
spi0_clk	arch/arm/dts/sun5i.dtsi	/^		spi0_clk: clk@01c200a0 {$/;"	l
spi0_clk	arch/arm/dts/sun6i-a31.dtsi	/^		spi0_clk: clk@01c200a0 {$/;"	l
spi0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		spi0_clk: clk@01c200a0 {$/;"	l
spi0_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
spi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 spi0_clk_cfg;	\/* 0xa0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 spi0_clk_cfg;	\/* 0xa0 spi0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 spi0_clk_cfg;	\/* 0xa0 spi0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 spi0_clk_cfg;	\/* 0x430 spi0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 spi0_clk_cfg;	\/* 0xa0 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 spi0_clk_cfg;	\/* 0xa0 spi0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 spi0_clk_cfg;	\/* 0xa0 spi0 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 spi0_clk_cfg;	\/* 0x430 spi0 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi0_cs0	arch/arm/dts/rk3288.dtsi	/^			spi0_cs0: spi0-cs0 {$/;"	l
spi0_cs0	arch/arm/dts/rk3399.dtsi	/^			spi0_cs0: spi0-cs0 {$/;"	l
spi0_cs0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int spi0_cs0;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_cs0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi0_cs0;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_cs0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spi0_cs0_pins_a: spi0_cs0@0 {$/;"	l	label:pio
spi0_cs0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi0_cs0_pins_a: spi0_cs0@0 {$/;"	l	label:pio
spi0_cs1	arch/arm/dts/rk3288.dtsi	/^			spi0_cs1: spi0-cs1 {$/;"	l
spi0_cs1	arch/arm/dts/rk3399.dtsi	/^			spi0_cs1: spi0-cs1 {$/;"	l
spi0_cs1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int spi0_cs1;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_cs1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi0_cs1;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_cs1_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi0_cs1_pins_a: spi0_cs1@0 {$/;"	l	label:pio
spi0_d0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int spi0_d0;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_d0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi0_d0;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_d1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int spi0_d1;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_d1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi0_d1;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_deinit	drivers/mtd/spi/sunxi_spi_spl.c	/^static void spi0_deinit(void)$/;"	f	typeref:typename:void	file:
spi0_disable_clock	drivers/mtd/spi/sunxi_spi_spl.c	/^static void spi0_disable_clock(void)$/;"	f	typeref:typename:void	file:
spi0_enable_clock	drivers/mtd/spi/sunxi_spi_spl.c	/^static void spi0_enable_clock(void)$/;"	f	typeref:typename:void	file:
spi0_flash0	arch/arm/dts/zynqmp-ep108.dts	/^	spi0_flash0: spi0_flash0@0 {$/;"	l
spi0_flash0	arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts	/^	spi0_flash0: spi0_flash0@0 {$/;"	l
spi0_init	drivers/mtd/spi/sunxi_spi_spl.c	/^static int spi0_init(void)$/;"	f	typeref:typename:int	file:
spi0_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux spi0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi0_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux spi0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi0_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux spi0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi0_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux spi0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi0_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux spi0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi0_pinmux_setup	drivers/mtd/spi/sunxi_spi_spl.c	/^static void spi0_pinmux_setup(unsigned int pin_function)$/;"	f	typeref:typename:void	file:
spi0_pins	arch/arm/dts/am335x-rut.dts	/^	spi0_pins: pinmux_spi0_pins {$/;"	l
spi0_pins	arch/arm/dts/am43x-epos-evm.dts	/^		spi0_pins: pinmux_spi0_pins {$/;"	l
spi0_pins	arch/arm/dts/armada-375.dtsi	/^				spi0_pins: spi0-pins {$/;"	l
spi0_pins	arch/arm/dts/armada-38x.dtsi	/^				spi0_pins: spi-pins-0 {$/;"	l	label:pinctrl
spi0_pins	arch/arm/dts/armada-xp.dtsi	/^	spi0_pins: spi0-pins {$/;"	l
spi0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spi0_pins_a: spi0@0 {$/;"	l	label:pio
spi0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi0_pins_a: spi0@0 {$/;"	l	label:pio
spi0_pins_base	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config spi0_pins_base[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi0_pins_base	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config spi0_pins_base[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi0_pins_default	arch/arm/dts/am335x-icev2.dts	/^	spi0_pins_default: spi0_pins_default {$/;"	l
spi0_pins_ena	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config spi0_pins_ena[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi0_pins_scs0	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config spi0_pins_scs0[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi0_pins_scs0	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config spi0_pins_scs0[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi0_read_data	drivers/mtd/spi/sunxi_spi_spl.c	/^static void spi0_read_data(void *buf, u32 addr, u32 len)$/;"	f	typeref:typename:void	file:
spi0_rx	arch/arm/dts/rk3288.dtsi	/^			spi0_rx: spi0-rx {$/;"	l
spi0_rx	arch/arm/dts/rk3399.dtsi	/^			spi0_rx: spi0-rx {$/;"	l
spi0_sclk	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int spi0_sclk;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_sclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi0_sclk;$/;"	m	struct:pad_signals	typeref:typename:int
spi0_tx	arch/arm/dts/rk3288.dtsi	/^			spi0_tx: spi0-tx {$/;"	l
spi0_tx	arch/arm/dts/rk3399.dtsi	/^			spi0_tx: spi0-tx {$/;"	l
spi0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int spi0clkctrl;	\/* offset 0x4C *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
spi0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int spi0clkctrl;	\/* offset 0x500 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
spi1	arch/arm/dts/am33xx.dtsi	/^		spi1: spi@481a0000 {$/;"	l
spi1	arch/arm/dts/am4372.dtsi	/^		spi1: spi@481a0000 {$/;"	l
spi1	arch/arm/dts/armada-370-xp.dtsi	/^			spi1: spi@10680 {$/;"	l
spi1	arch/arm/dts/armada-375.dtsi	/^			spi1: spi@10680 {$/;"	l
spi1	arch/arm/dts/armada-38x.dtsi	/^			spi1: spi@10680 {$/;"	l
spi1	arch/arm/dts/armada-xp-theadorable.dts	/^			spi1: spi@10680 {$/;"	l
spi1	arch/arm/dts/armada-xp.dtsi	/^			spi1: spi@10680 {$/;"	l
spi1	arch/arm/dts/at91sam9260.dtsi	/^			spi1: spi@fffcc000 {$/;"	l
spi1	arch/arm/dts/at91sam9261.dtsi	/^			spi1: spi@fffcc000 {$/;"	l
spi1	arch/arm/dts/at91sam9263.dtsi	/^			spi1: spi@fffa8000 {$/;"	l
spi1	arch/arm/dts/at91sam9g45.dtsi	/^			spi1: spi@fffa8000 {$/;"	l
spi1	arch/arm/dts/k2g.dtsi	/^		spi1: spi@21805800 {$/;"	l
spi1	arch/arm/dts/keystone.dtsi	/^		spi1: spi@21000600 {$/;"	l
spi1	arch/arm/dts/rk3288.dtsi	/^	spi1: spi@ff120000 {$/;"	l
spi1	arch/arm/dts/rk3399.dtsi	/^	spi1: spi@ff1d0000 {$/;"	l
spi1	arch/arm/dts/sama5d2.dtsi	/^			spi1: spi@fc000000 {$/;"	l
spi1	arch/arm/dts/socfpga.dtsi	/^		spi1: spi@fff01000 {$/;"	l
spi1	arch/arm/dts/sun4i-a10.dtsi	/^		spi1: spi@01c06000 {$/;"	l
spi1	arch/arm/dts/sun5i.dtsi	/^		spi1: spi@01c06000 {$/;"	l
spi1	arch/arm/dts/sun6i-a31.dtsi	/^		spi1: spi@01c69000 {$/;"	l
spi1	arch/arm/dts/sun7i-a20.dtsi	/^		spi1: spi@01c06000 {$/;"	l
spi1	arch/arm/dts/zynq-7000.dtsi	/^		spi1: spi@e0007000 {$/;"	l	label:amba
spi1	arch/arm/dts/zynqmp.dtsi	/^		spi1: spi@ff050000 {$/;"	l
spi1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_aper_clk, sdio1_aper_clk, spi0_aper_clk, spi1_aper_clk,$/;"	e	enum:zynq_clk
spi1_clk	arch/arm/dts/at91sam9260.dtsi	/^					spi1_clk: spi1_clk {$/;"	l
spi1_clk	arch/arm/dts/at91sam9261.dtsi	/^					spi1_clk: spi1_clk {$/;"	l
spi1_clk	arch/arm/dts/at91sam9263.dtsi	/^					spi1_clk: spi1_clk {$/;"	l
spi1_clk	arch/arm/dts/at91sam9g45.dtsi	/^					spi1_clk: spi1_clk {$/;"	l
spi1_clk	arch/arm/dts/rk3288.dtsi	/^			spi1_clk: spi1-clk {$/;"	l
spi1_clk	arch/arm/dts/rk3399.dtsi	/^			spi1_clk: spi1-clk {$/;"	l
spi1_clk	arch/arm/dts/sama5d2.dtsi	/^					spi1_clk: spi1_clk@34 {$/;"	l
spi1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		spi1_clk: clk@01c200a4 {$/;"	l
spi1_clk	arch/arm/dts/sun5i.dtsi	/^		spi1_clk: clk@01c200a4 {$/;"	l
spi1_clk	arch/arm/dts/sun6i-a31.dtsi	/^		spi1_clk: clk@01c200a4 {$/;"	l
spi1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		spi1_clk: clk@01c200a4 {$/;"	l
spi1_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
spi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 spi1_clk_cfg;	\/* 0xa4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 spi1_clk_cfg;	\/* 0xa4 spi1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 spi1_clk_cfg;	\/* 0xa4 spi1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 spi1_clk_cfg;	\/* 0x434 spi1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 spi1_clk_cfg;	\/* 0xa4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 spi1_clk_cfg;	\/* 0xa4 spi1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 spi1_clk_cfg;	\/* 0xa4 spi1 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 spi1_clk_cfg;	\/* 0x434 spi1 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi1_cs0	arch/arm/dts/rk3288.dtsi	/^			spi1_cs0: spi1-cs0 {$/;"	l
spi1_cs0	arch/arm/dts/rk3399.dtsi	/^			spi1_cs0: spi1-cs0 {$/;"	l
spi1_cs0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spi1_cs0_pins_a: spi1_cs0@0 {$/;"	l	label:pio
spi1_cs0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi1_cs0_pins_a: spi1_cs0@0 {$/;"	l	label:pio
spi1_csclktx	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 spi1_csclktx;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a0a0a	typeref:typename:u32
spi1_flash0	arch/arm/dts/zynqmp-ep108.dts	/^	spi1_flash0: spi1_flash0@0 {$/;"	l
spi1_flash0	arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts	/^	spi1_flash0: spi1_flash0@0 {$/;"	l
spi1_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux spi1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi1_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux spi1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi1_pins	arch/arm/dts/am335x-rut.dts	/^	spi1_pins: pinmux_spi1_pins {$/;"	l
spi1_pins	arch/arm/dts/am43x-epos-evm.dts	/^		spi1_pins: pinmux_spi1_pins {$/;"	l
spi1_pins	arch/arm/dts/armada-38x.dtsi	/^				spi1_pins: spi-pins-1 {$/;"	l	label:pinctrl
spi1_pins	board/davinci/ea20/ea20.c	/^static const struct pinmux_config spi1_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
spi1_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spi1_pins_a: spi1@0 {$/;"	l	label:pio
spi1_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi1_pins_a: spi1@0 {$/;"	l	label:pio
spi1_pins_base	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config spi1_pins_base[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi1_pins_scs0	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config spi1_pins_scs0[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
spi1_rx	arch/arm/dts/rk3288.dtsi	/^			spi1_rx: spi1-rx {$/;"	l
spi1_rx	arch/arm/dts/rk3399.dtsi	/^			spi1_rx: spi1-rx {$/;"	l
spi1_rxd	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 spi1_rxd;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a090a	typeref:typename:u32
spi1_tx	arch/arm/dts/rk3288.dtsi	/^			spi1_tx: spi1-tx {$/;"	l
spi1_tx	arch/arm/dts/rk3399.dtsi	/^			spi1_tx: spi1-tx {$/;"	l
spi1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int spi1clkctrl;	\/* offset 0x50 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
spi1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int spi1clkctrl;	\/* offset 0x508 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
spi2	arch/arm/dts/am4372.dtsi	/^		spi2: spi@481a2000 {$/;"	l
spi2	arch/arm/dts/k2g.dtsi	/^		spi2: spi@21805c00 {$/;"	l
spi2	arch/arm/dts/keystone.dtsi	/^		spi2: spi@21000800 {$/;"	l
spi2	arch/arm/dts/rk3288.dtsi	/^	spi2: spi@ff130000 {$/;"	l
spi2	arch/arm/dts/rk3399.dtsi	/^	spi2: spi@ff1e0000 {$/;"	l
spi2	arch/arm/dts/sun4i-a10.dtsi	/^		spi2: spi@01c17000 {$/;"	l
spi2	arch/arm/dts/sun5i.dtsi	/^		spi2: spi@01c17000 {$/;"	l
spi2	arch/arm/dts/sun6i-a31.dtsi	/^		spi2: spi@01c6a000 {$/;"	l
spi2	arch/arm/dts/sun7i-a20.dtsi	/^		spi2: spi@01c17000 {$/;"	l
spi2_clk	arch/arm/dts/rk3288.dtsi	/^			spi2_clk: spi2-clk {$/;"	l
spi2_clk	arch/arm/dts/rk3399.dtsi	/^			spi2_clk: spi2-clk {$/;"	l
spi2_clk	arch/arm/dts/sun4i-a10.dtsi	/^		spi2_clk: clk@01c200a8 {$/;"	l
spi2_clk	arch/arm/dts/sun5i.dtsi	/^		spi2_clk: clk@01c200a8 {$/;"	l
spi2_clk	arch/arm/dts/sun6i-a31.dtsi	/^		spi2_clk: clk@01c200a8 {$/;"	l
spi2_clk	arch/arm/dts/sun7i-a20.dtsi	/^		spi2_clk: clk@01c200a8 {$/;"	l
spi2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 spi2_clk_cfg;	\/* 0xa8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 spi2_clk_cfg;	\/* 0xa8 spi2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi2_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 spi2_clk_cfg;	\/* 0x438 spi2 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi2_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 spi2_clk_cfg;	\/* 0xa8 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi2_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 spi2_clk_cfg;	\/* 0xa8 spi2 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi2_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 spi2_clk_cfg;	\/* 0x438 spi2 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi2_cs0	arch/arm/dts/rk3288.dtsi	/^			spi2_cs0: spi2-cs0 {$/;"	l
spi2_cs0	arch/arm/dts/rk3399.dtsi	/^			spi2_cs0: spi2-cs0 {$/;"	l
spi2_cs0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi2_cs0;$/;"	m	struct:pad_signals	typeref:typename:int
spi2_cs0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spi2_cs0_pins_a: spi2_cs0@0 {$/;"	l	label:pio
spi2_cs0_pins_a	arch/arm/dts/sun5i-a10s.dtsi	/^	spi2_cs0_pins_a: spi2_cs0@0 {$/;"	l
spi2_cs0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi2_cs0_pins_a: spi2_cs0@0 {$/;"	l	label:pio
spi2_cs0_pins_b	arch/arm/dts/sun4i-a10.dtsi	/^			spi2_cs0_pins_b: spi2_cs0@1 {$/;"	l	label:pio
spi2_cs0_pins_b	arch/arm/dts/sun7i-a20.dtsi	/^			spi2_cs0_pins_b: spi2_cs0@1 {$/;"	l	label:pio
spi2_cs1	arch/arm/dts/rk3288.dtsi	/^			spi2_cs1: spi2-cs1 {$/;"	l
spi2_d0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi2_d0;$/;"	m	struct:pad_signals	typeref:typename:int
spi2_d1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi2_d1;$/;"	m	struct:pad_signals	typeref:typename:int
spi2_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			spi2_pins_a: spi2@0 {$/;"	l	label:pio
spi2_pins_a	arch/arm/dts/sun5i-a10s.dtsi	/^	spi2_pins_a: spi2@0 {$/;"	l
spi2_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			spi2_pins_a: spi2@0 {$/;"	l	label:pio
spi2_pins_b	arch/arm/dts/sun4i-a10.dtsi	/^			spi2_pins_b: spi2@1 {$/;"	l	label:pio
spi2_pins_b	arch/arm/dts/sun7i-a20.dtsi	/^			spi2_pins_b: spi2@1 {$/;"	l	label:pio
spi2_rx	arch/arm/dts/rk3288.dtsi	/^			spi2_rx: spi2-rx {$/;"	l
spi2_rx	arch/arm/dts/rk3399.dtsi	/^			spi2_rx: spi2-rx {$/;"	l
spi2_sclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi2_sclk;$/;"	m	struct:pad_signals	typeref:typename:int
spi2_tx	arch/arm/dts/rk3288.dtsi	/^			spi2_tx: spi2-tx {$/;"	l
spi2_tx	arch/arm/dts/rk3399.dtsi	/^			spi2_tx: spi2-tx {$/;"	l
spi3	arch/arm/dts/am4372.dtsi	/^		spi3: spi@481a4000 {$/;"	l
spi3	arch/arm/dts/k2g.dtsi	/^		spi3: spi@21806000 {$/;"	l
spi3	arch/arm/dts/rk3399.dtsi	/^	spi3: spi@ff350000 {$/;"	l
spi3	arch/arm/dts/sun4i-a10.dtsi	/^		spi3: spi@01c1f000 {$/;"	l
spi3	arch/arm/dts/sun6i-a31.dtsi	/^		spi3: spi@01c6b000 {$/;"	l
spi3	arch/arm/dts/sun7i-a20.dtsi	/^		spi3: spi@01c1f000 {$/;"	l
spi3_clk	arch/arm/dts/rk3399.dtsi	/^			spi3_clk: spi3-clk {$/;"	l
spi3_clk	arch/arm/dts/sun4i-a10.dtsi	/^		spi3_clk: clk@01c200d4 {$/;"	l
spi3_clk	arch/arm/dts/sun6i-a31.dtsi	/^		spi3_clk: clk@01c200ac {$/;"	l
spi3_clk	arch/arm/dts/sun7i-a20.dtsi	/^		spi3_clk: clk@01c200d4 {$/;"	l
spi3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 spi3_clk_cfg;	\/* 0xd4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 spi3_clk_cfg;	\/* 0xac spi3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi3_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 spi3_clk_cfg;	\/* 0x43c spi3 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi3_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 spi3_clk_cfg;	\/* 0xd4 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi3_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 spi3_clk_cfg;	\/* 0xac spi3 clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi3_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 spi3_clk_cfg;	\/* 0x43c spi3 clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
spi3_cs0	arch/arm/dts/rk3399.dtsi	/^			spi3_cs0: spi3-cs0 {$/;"	l
spi3_rx	arch/arm/dts/rk3399.dtsi	/^			spi3_rx: spi3-rx {$/;"	l
spi3_tx	arch/arm/dts/rk3399.dtsi	/^			spi3_tx: spi3-tx {$/;"	l
spi4	arch/arm/dts/am4372.dtsi	/^		spi4: spi@48345000 {$/;"	l
spi4	arch/arm/dts/rk3399.dtsi	/^	spi4: spi@ff1f0000 {$/;"	l
spi4_clk	arch/arm/dts/rk3399.dtsi	/^			spi4_clk: spi4-clk {$/;"	l
spi4_cs0	arch/arm/dts/rk3399.dtsi	/^			spi4_cs0: spi4-cs0 {$/;"	l
spi4_cs0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi4_cs0;$/;"	m	struct:pad_signals	typeref:typename:int
spi4_d0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi4_d0;$/;"	m	struct:pad_signals	typeref:typename:int
spi4_d1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi4_d1;$/;"	m	struct:pad_signals	typeref:typename:int
spi4_rx	arch/arm/dts/rk3399.dtsi	/^			spi4_rx: spi4-rx {$/;"	l
spi4_sclk	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int spi4_sclk;$/;"	m	struct:pad_signals	typeref:typename:int
spi4_tx	arch/arm/dts/rk3399.dtsi	/^			spi4_tx: spi4-tx {$/;"	l
spi5	arch/arm/dts/rk3399.dtsi	/^	spi5: spi@ff200000 {$/;"	l
spi5_clk	arch/arm/dts/rk3399.dtsi	/^			spi5_clk: spi5-clk {$/;"	l
spi5_cs0	arch/arm/dts/rk3399.dtsi	/^			spi5_cs0: spi5-cs0 {$/;"	l
spi5_rx	arch/arm/dts/rk3399.dtsi	/^			spi5_rx: spi5-rx {$/;"	l
spi5_tx	arch/arm/dts/rk3399.dtsi	/^			spi5_tx: spi5-tx {$/;"	l
spi8xxx	arch/powerpc/include/asm/mpc8xxx_spi.h	/^typedef struct spi8xxx {$/;"	s
spi8xxx_t	arch/powerpc/include/asm/mpc8xxx_spi.h	/^} spi8xxx_t;$/;"	t	typeref:struct:spi8xxx
spi_0	arch/arm/dts/exynos5.dtsi	/^	spi_0: spi@12d20000 {$/;"	l
spi_1	arch/arm/dts/exynos5.dtsi	/^	spi_1: spi@12d30000 {$/;"	l
spi_2	arch/arm/dts/exynos5.dtsi	/^	spi_2: spi@12d40000 {$/;"	l
spi_3	arch/arm/dts/exynos5.dtsi	/^	spi_3: spi@131a0000 {$/;"	l
spi_4	arch/arm/dts/exynos5.dtsi	/^	spi_4: spi@131b0000 {$/;"	l
spi_alloc_slave	include/spi.h	/^#define spi_alloc_slave(/;"	d
spi_alloc_slave_base	include/spi.h	/^#define spi_alloc_slave_base(/;"	d
spi_armd_flush	drivers/spi/armada100_spi.c	/^static int spi_armd_flush(struct armd_spi_slave *pss)$/;"	f	typeref:typename:int	file:
spi_armd_read	drivers/spi/armada100_spi.c	/^static int spi_armd_read(struct armd_spi_slave *pss)$/;"	f	typeref:typename:int	file:
spi_armd_write	drivers/spi/armada100_spi.c	/^static int spi_armd_write(struct armd_spi_slave *pss)$/;"	f	typeref:typename:int	file:
spi_base_setup_slave_fdt	drivers/spi/spi.c	/^struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,$/;"	f	typeref:struct:spi_slave *
spi_bases	drivers/spi/fsl_qspi.c	/^static unsigned long spi_bases[] = {$/;"	v	typeref:typename:unsigned long[]	file:
spi_bases	drivers/spi/mxc_spi.c	/^static unsigned long spi_bases[] = {$/;"	v	typeref:typename:unsigned long[]	file:
spi_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int spi_boot_selected(void)$/;"	f	typeref:typename:int
spi_calibration	drivers/spi/cadence_qspi.c	/^static int spi_calibration(struct udevice *bus, uint hz)$/;"	f	typeref:typename:int	file:
spi_cfg_mxc	drivers/spi/mxc_spi.c	/^static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)$/;"	f	typeref:typename:s32	file:
spi_child_post_bind	drivers/spi/spi-uclass.c	/^static int spi_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
spi_child_pre_probe	drivers/spi/spi-uclass.c	/^static int spi_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
spi_chip_select	drivers/spi/spi-uclass.c	/^int spi_chip_select(struct udevice *dev)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/net/e1000_spi.c	/^int spi_claim_bus(struct spi_slave *spi)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/armada100_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/atmel_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/bfin_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/bfin_spi6xx.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/cf_qspi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/cf_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/davinci_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/ep93xx_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/fsl_dspi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/fsl_espi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/fsl_qspi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/kirkwood_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/lpc32xx_ssp.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/mpc52xx_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/mpc8xxx_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/mxc_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/mxs_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/omap3_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/sh_qspi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/sh_spi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/soft_spi_legacy.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/spi-uclass.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_claim_bus	drivers/spi/ti_qspi.c	/^int spi_claim_bus(struct spi_slave *slave)$/;"	f	typeref:typename:int
spi_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 spi_clk_ctrl; \/* 0x158 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
spi_cmd	arch/arm/dts/vf-colibri.dtsi	/^	spi_cmd: sspi@0 {$/;"	l
spi_cs0_sel	board/freescale/p1010rdb/p1010rdb.c	/^	u8 spi_cs0_sel; \/* SPI CS0 SLIC\/SPI Flash *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
spi_cs_activate	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/atngw100/atngw100.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/atngw100mkii/atngw100mkii.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/sama5d3xek/sama5d3xek.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/atmel/sama5d4ek/sama5d4ek.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/bluewater/gurnard/gurnard.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/cirrus/edb93xx/edb93xx.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/denx/ma5d4evk/ma5d4evk.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/egnite/ethernut5/ethernut5.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/freescale/mpc8308rdb/mpc8308rdb.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/freescale/mpc8349emds/mpc8349emds.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/ids/ids8313/ids8313.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/l+g/vinco/vinco.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/mini-box/picosam9g45/picosam9g45.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/siemens/corvus/board.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/siemens/taurus/taurus.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	board/zipitz2/zipitz2.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/altera_spi.c	/^static void spi_cs_activate(struct udevice *dev, uint cs)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/armada100_spi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/ath79_spi.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/bfin_spi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/bfin_spi6xx.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/cf_qspi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/davinci_spi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/exynos_spi.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/fsl_espi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/kirkwood_spi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/mvebu_a3700_spi.c	/^static void spi_cs_activate(struct spi_reg *reg, int cs)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/mxc_spi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/pic32_spi.c	/^static void spi_cs_activate(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/rk_spi.c	/^static void spi_cs_activate(struct udevice *dev, uint cs)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/sh_qspi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/sh_spi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/tegra114_spi.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/tegra20_sflash.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/tegra20_slink.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/tegra210_qspi.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/ti_qspi.c	/^void spi_cs_activate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_activate	drivers/spi/xilinx_spi.c	/^static void spi_cs_activate(struct udevice *dev, uint cs)$/;"	f	typeref:typename:void	file:
spi_cs_activate	drivers/spi/zynq_spi.c	/^static void spi_cs_activate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/atngw100/atngw100.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/atngw100mkii/atngw100mkii.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/sama5d3xek/sama5d3xek.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/atmel/sama5d4ek/sama5d4ek.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/bluewater/gurnard/gurnard.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/cirrus/edb93xx/edb93xx.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/denx/ma5d4evk/ma5d4evk.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/egnite/ethernut5/ethernut5.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/freescale/mpc8308rdb/mpc8308rdb.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/freescale/mpc8349emds/mpc8349emds.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/ids/ids8313/ids8313.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/l+g/vinco/vinco.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/mini-box/picosam9g45/picosam9g45.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/siemens/corvus/board.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/siemens/taurus/taurus.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	board/zipitz2/zipitz2.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/altera_spi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/armada100_spi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/ath79_spi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/bfin_spi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/bfin_spi6xx.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/cf_qspi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/davinci_spi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/exynos_spi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/fsl_espi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/kirkwood_spi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/mvebu_a3700_spi.c	/^static void spi_cs_deactivate(struct spi_reg *reg, int cs)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/mxc_spi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/pic32_spi.c	/^static void spi_cs_deactivate(struct pic32_spi_priv *priv)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/rk_spi.c	/^static void spi_cs_deactivate(struct udevice *dev, uint cs)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/sh_qspi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/sh_spi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/tegra114_spi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/tegra20_sflash.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/tegra20_slink.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/tegra210_qspi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/ti_qspi.c	/^void spi_cs_deactivate(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_cs_deactivate	drivers/spi/xilinx_spi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_deactivate	drivers/spi/zynq_spi.c	/^static void spi_cs_deactivate(struct udevice *dev)$/;"	f	typeref:typename:void	file:
spi_cs_gpio	board/nokia/rx51/tag_omap.h	/^	s16 spi_cs_gpio;$/;"	m	struct:omap_wlan_cx3110x_config	typeref:typename:s16
spi_cs_info	drivers/spi/spi-uclass.c	/^int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info)$/;"	f	typeref:typename:int
spi_cs_info	include/spi.h	/^struct spi_cs_info {$/;"	s
spi_cs_is_valid	board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/at91sam9n12ek/at91sam9n12ek.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/at91sam9x5ek/at91sam9x5ek.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/atngw100/atngw100.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/atngw100mkii/atngw100mkii.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/sama5d3xek/sama5d3xek.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/atmel/sama5d4ek/sama5d4ek.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/bluewater/gurnard/gurnard.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/cirrus/edb93xx/edb93xx.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/denx/ma5d4evk/ma5d4evk.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/egnite/ethernut5/ethernut5.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/freescale/mpc8308rdb/mpc8308rdb.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/freescale/mpc8349emds/mpc8349emds.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/ids/ids8313/ids8313.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/l+g/vinco/vinco.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/mini-box/picosam9g45/picosam9g45.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/siemens/corvus/board.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/siemens/taurus/taurus.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	board/zipitz2/zipitz2.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/bfin_spi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f
spi_cs_is_valid	drivers/spi/bfin_spi6xx.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/cf_qspi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/cf_spi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/davinci_spi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/fsl_dspi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/fsl_espi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/kirkwood_spi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/mxs_spi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/sh_qspi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/sh_spi.c	/^int  spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/spi-uclass.c	/^int spi_cs_is_valid(unsigned int busnum, unsigned int cs)$/;"	f	typeref:typename:int
spi_cs_is_valid	drivers/spi/ti_qspi.c	/^int spi_cs_is_valid(unsigned int bus, unsigned int cs)$/;"	f	typeref:typename:int
spi_ctl	drivers/i2c/s3c24x0_i2c.h	/^	u32	spi_ctl;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
spi_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 spi_ctrl;		\/* SPI Control Register			*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
spi_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint spi_ctrl;			\/* _COM_SPI_CONTROL_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
spi_dataflash_erase	drivers/mtd/spi/sf_dataflash.c	/^static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)$/;"	f	typeref:typename:int	file:
spi_dataflash_ids	drivers/mtd/spi/sf_dataflash.c	/^static const struct udevice_id spi_dataflash_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
spi_dataflash_ops	drivers/mtd/spi/sf_dataflash.c	/^static const struct dm_spi_flash_ops spi_dataflash_ops = {$/;"	v	typeref:typename:const struct dm_spi_flash_ops	file:
spi_dataflash_probe	drivers/mtd/spi/sf_dataflash.c	/^static int spi_dataflash_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
spi_dataflash_read	drivers/mtd/spi/sf_dataflash.c	/^static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,$/;"	f	typeref:typename:int	file:
spi_dataflash_write	drivers/mtd/spi/sf_dataflash.c	/^int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,$/;"	f	typeref:typename:int
spi_delay_us	drivers/spi/soft_spi.c	/^	int spi_delay_us;$/;"	m	struct:soft_spi_platdata	typeref:typename:int	file:
spi_do_alloc_slave	drivers/spi/spi.c	/^void *spi_do_alloc_slave(int offset, int size, unsigned int bus,$/;"	f	typeref:typename:void *
spi_dual_flash	drivers/mtd/spi/sf_internal.h	/^enum spi_dual_flash {$/;"	g
spi_emul_get_ops	include/spi.h	/^#define spi_emul_get_ops(/;"	d
spi_enable_chip	drivers/spi/designware_spi.c	/^static inline void spi_enable_chip(struct dw_spi_priv *priv, int enable)$/;"	f	typeref:typename:void	file:
spi_find_bus_and_cs	drivers/spi/spi-uclass.c	/^int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,$/;"	f	typeref:typename:int
spi_find_chip_select	drivers/spi/spi-uclass.c	/^int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp)$/;"	f	typeref:typename:int
spi_flash	arch/arm/dts/rk3288-veyron.dtsi	/^	spi_flash: spiflash@0 {$/;"	l
spi_flash	include/spi_flash.h	/^struct spi_flash {$/;"	s
spi_flash_addr	drivers/mtd/spi/spi_flash.c	/^static void spi_flash_addr(u32 addr, u8 *cmd)$/;"	f	typeref:typename:void	file:
spi_flash_cmd	drivers/mtd/spi/sf.c	/^int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)$/;"	f	typeref:typename:int
spi_flash_cmd_erase_ops	drivers/mtd/spi/spi_flash.c	/^int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)$/;"	f	typeref:typename:int
spi_flash_cmd_read	drivers/mtd/spi/sf.c	/^int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,$/;"	f	typeref:typename:int
spi_flash_cmd_read_ops	drivers/mtd/spi/spi_flash.c	/^int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:int
spi_flash_cmd_wait_ready	drivers/mtd/spi/spi_flash.c	/^static int spi_flash_cmd_wait_ready(struct spi_flash *flash,$/;"	f	typeref:typename:int	file:
spi_flash_cmd_write	drivers/mtd/spi/sf.c	/^int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,$/;"	f	typeref:typename:int
spi_flash_cmd_write_disable	drivers/mtd/spi/sf_internal.h	/^static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)$/;"	f	typeref:typename:int
spi_flash_cmd_write_enable	drivers/mtd/spi/sf_internal.h	/^static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)$/;"	f	typeref:typename:int
spi_flash_cmd_write_ops	drivers/mtd/spi/spi_flash.c	/^int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:int
spi_flash_copy_mmap	drivers/mtd/spi/spi_flash.c	/^void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)$/;"	f	typeref:typename:void __weak
spi_flash_copy_mmap	drivers/spi/ti_qspi.c	/^void spi_flash_copy_mmap(void *data, void *offset, size_t len)$/;"	f	typeref:typename:void
spi_flash_decode_fdt	drivers/mtd/spi/spi_flash.c	/^int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)$/;"	f	typeref:typename:int
spi_flash_dual	drivers/mtd/spi/spi_flash.c	/^static void spi_flash_dual(struct spi_flash *flash, u32 *addr)$/;"	f	typeref:typename:void	file:
spi_flash_erase	include/spi_flash.h	/^static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:int
spi_flash_erase_dm	drivers/mtd/spi/sf-uclass.c	/^int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)$/;"	f	typeref:typename:int
spi_flash_free	drivers/mtd/spi/sf-uclass.c	/^void spi_flash_free(struct spi_flash *flash)$/;"	f	typeref:typename:void
spi_flash_free	drivers/mtd/spi/sf_probe.c	/^void spi_flash_free(struct spi_flash *flash)$/;"	f	typeref:typename:void
spi_flash_fsr_ready	drivers/mtd/spi/spi_flash.c	/^static int spi_flash_fsr_ready(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
spi_flash_mtd_erase	drivers/mtd/spi/sf_mtd.c	/^static int spi_flash_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)$/;"	f	typeref:typename:int	file:
spi_flash_mtd_number	drivers/mtd/spi/sf_mtd.c	/^static int spi_flash_mtd_number(void)$/;"	f	typeref:typename:int	file:
spi_flash_mtd_read	drivers/mtd/spi/sf_mtd.c	/^static int spi_flash_mtd_read(struct mtd_info *mtd, loff_t from, size_t len,$/;"	f	typeref:typename:int	file:
spi_flash_mtd_register	drivers/mtd/spi/sf_mtd.c	/^int spi_flash_mtd_register(struct spi_flash *flash)$/;"	f	typeref:typename:int
spi_flash_mtd_sync	drivers/mtd/spi/sf_mtd.c	/^static void spi_flash_mtd_sync(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
spi_flash_mtd_unregister	drivers/mtd/spi/sf_mtd.c	/^void spi_flash_mtd_unregister(void)$/;"	f	typeref:typename:void
spi_flash_mtd_write	drivers/mtd/spi/sf_mtd.c	/^static int spi_flash_mtd_write(struct mtd_info *mtd, loff_t to, size_t len,$/;"	f	typeref:typename:int	file:
spi_flash_params	drivers/mtd/spi/sf_internal.h	/^struct spi_flash_params {$/;"	s
spi_flash_params_table	drivers/mtd/spi/sf_params.c	/^const struct spi_flash_params spi_flash_params_table[] = {$/;"	v	typeref:typename:const struct spi_flash_params[]
spi_flash_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux spi_flash_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
spi_flash_post_bind	drivers/mtd/spi/sf-uclass.c	/^static int spi_flash_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
spi_flash_probe	drivers/mtd/spi/sf-uclass.c	/^struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_flash *
spi_flash_probe	drivers/mtd/spi/sf_probe.c	/^struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,$/;"	f	typeref:struct:spi_flash *
spi_flash_probe_bus_cs	drivers/mtd/spi/sf-uclass.c	/^int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,$/;"	f	typeref:typename:int
spi_flash_probe_fdt	drivers/mtd/spi/sf_probe.c	/^struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,$/;"	f	typeref:struct:spi_flash *
spi_flash_probe_slave	drivers/mtd/spi/sf_probe.c	/^static int spi_flash_probe_slave(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
spi_flash_probe_tail	drivers/mtd/spi/sf_probe.c	/^static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)$/;"	f	typeref:struct:spi_flash *	file:
spi_flash_protect	include/spi_flash.h	/^static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,$/;"	f	typeref:typename:int
spi_flash_read	include/spi_flash.h	/^static inline int spi_flash_read(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:int
spi_flash_read_bar	drivers/mtd/spi/spi_flash.c	/^static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)$/;"	f	typeref:typename:int	file:
spi_flash_read_common	drivers/mtd/spi/spi_flash.c	/^int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,$/;"	f	typeref:typename:int
spi_flash_read_dm	drivers/mtd/spi/sf-uclass.c	/^int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf)$/;"	f	typeref:typename:int
spi_flash_read_write	drivers/mtd/spi/sf.c	/^static int spi_flash_read_write(struct spi_slave *spi,$/;"	f	typeref:typename:int	file:
spi_flash_ready	drivers/mtd/spi/spi_flash.c	/^static int spi_flash_ready(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
spi_flash_scan	drivers/mtd/spi/spi_flash.c	/^int spi_flash_scan(struct spi_flash *flash)$/;"	f	typeref:typename:int
spi_flash_size	board/gateworks/gw_ventana/ventana_eeprom.h	/^	u8 spi_flash_size;   \/* 0x41: (4 << (n-1)) MB *\/$/;"	m	struct:ventana_board_info	typeref:typename:u8
spi_flash_sr_ready	drivers/mtd/spi/spi_flash.c	/^static int spi_flash_sr_ready(struct spi_flash *flash)$/;"	f	typeref:typename:int	file:
spi_flash_std_erase	drivers/mtd/spi/sf_probe.c	/^static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)$/;"	f	typeref:typename:int	file:
spi_flash_std_ids	drivers/mtd/spi/sf_probe.c	/^static const struct udevice_id spi_flash_std_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
spi_flash_std_ops	drivers/mtd/spi/sf_probe.c	/^static const struct dm_spi_flash_ops spi_flash_std_ops = {$/;"	v	typeref:typename:const struct dm_spi_flash_ops	file:
spi_flash_std_probe	drivers/mtd/spi/sf_probe.c	/^static int spi_flash_std_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
spi_flash_std_read	drivers/mtd/spi/sf_probe.c	/^static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,$/;"	f	typeref:typename:int	file:
spi_flash_std_write	drivers/mtd/spi/sf_probe.c	/^static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,$/;"	f	typeref:typename:int	file:
spi_flash_test	cmd/sf.c	/^static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,$/;"	f	typeref:typename:int	file:
spi_flash_update	cmd/sf.c	/^static int spi_flash_update(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:int	file:
spi_flash_update_block	cmd/sf.c	/^static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:const char *	file:
spi_flash_write	include/spi_flash.h	/^static inline int spi_flash_write(struct spi_flash *flash, u32 offset,$/;"	f	typeref:typename:int
spi_flash_write_bar	drivers/mtd/spi/spi_flash.c	/^static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)$/;"	f	typeref:typename:int	file:
spi_flash_write_common	drivers/mtd/spi/spi_flash.c	/^int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,$/;"	f	typeref:typename:int
spi_flash_write_dm	drivers/mtd/spi/sf-uclass.c	/^int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,$/;"	f	typeref:typename:int
spi_flush_fifo	drivers/spi/exynos_spi.c	/^static void spi_flush_fifo(struct exynos_spi *regs)$/;"	f	typeref:typename:void	file:
spi_free_slave	drivers/net/e1000_spi.c	/^void spi_free_slave(struct spi_slave *spi)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/armada100_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/atmel_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/bfin_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/bfin_spi6xx.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/cf_qspi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/cf_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/davinci_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/ep93xx_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/fsl_dspi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/fsl_espi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/fsl_qspi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/kirkwood_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/lpc32xx_ssp.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/mpc52xx_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/mpc8xxx_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/mxc_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/mxs_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/omap3_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/sh_qspi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/sh_spi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/soft_spi_legacy.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/spi-uclass.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_free_slave	drivers/spi/ti_qspi.c	/^void spi_free_slave(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 spi_freq;		\/* offset 0x2c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
spi_frequency	tools/ifdtool.h	/^enum spi_frequency {$/;"	g
spi_get_bus_and_cs	drivers/spi/spi-uclass.c	/^int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,$/;"	f	typeref:typename:int
spi_get_fifo_levels	drivers/spi/exynos_spi.c	/^static void spi_get_fifo_levels(struct exynos_spi *regs,$/;"	f	typeref:typename:void	file:
spi_get_ops	include/spi.h	/^#define spi_get_ops(/;"	d
spi_has_wdrbt	drivers/spi/atmel_spi.c	/^static int spi_has_wdrbt(struct atmel_spi_slave *slave)$/;"	f	typeref:typename:int	file:
spi_hw_init	drivers/spi/designware_spi.c	/^static void spi_hw_init(struct dw_spi_priv *priv)$/;"	f	typeref:typename:void	file:
spi_init	board/tqc/tqm5200/cmd_stk52xx.c	/^static void spi_init(void)$/;"	f	typeref:typename:void	file:
spi_init	drivers/net/e1000_spi.c	/^void spi_init(void)   { \/* Nothing to do *\/ }$/;"	f	typeref:typename:void
spi_init	drivers/spi/atmel_spi.c	/^void spi_init()$/;"	f	typeref:typename:void
spi_init	drivers/spi/bfin_spi.c	/^void spi_init()$/;"	f	typeref:typename:void
spi_init	drivers/spi/bfin_spi6xx.c	/^void spi_init()$/;"	f	typeref:typename:void
spi_init	drivers/spi/cf_qspi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/cf_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/davinci_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/ep93xx_spi.c	/^void spi_init()$/;"	f	typeref:typename:void
spi_init	drivers/spi/fsl_dspi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/fsl_espi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/fsl_qspi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/kirkwood_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/lpc32xx_ssp.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/mpc52xx_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/mpc8xxx_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/mxc_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/mxs_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/omap3_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/sh_qspi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/sh_spi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/soft_spi_legacy.c	/^void spi_init (void)$/;"	f	typeref:typename:void
spi_init	drivers/spi/ti_qspi.c	/^void spi_init(void)$/;"	f	typeref:typename:void
spi_init_f	arch/powerpc/cpu/mpc5xx/spi.c	/^void spi_init_f (void)$/;"	f	typeref:typename:void
spi_init_f	arch/powerpc/cpu/mpc8260/spi.c	/^void spi_init_f (void)$/;"	f	typeref:typename:void
spi_init_f	arch/powerpc/cpu/mpc8xx/spi.c	/^void spi_init_f (void)$/;"	f	typeref:typename:void
spi_init_f	drivers/net/e1000_spi.c	/^void spi_init_f(void) { \/* Nothing to do *\/ }$/;"	f	typeref:typename:void
spi_init_f	drivers/spi/cf_spi.c	/^void spi_init_f(void)$/;"	f	typeref:typename:void
spi_init_f	drivers/spi/fsl_dspi.c	/^void spi_init_f(void)$/;"	f	typeref:typename:void
spi_init_r	arch/powerpc/cpu/mpc5xx/spi.c	/^void spi_init_r (void)$/;"	f	typeref:typename:void
spi_init_r	arch/powerpc/cpu/mpc8260/spi.c	/^void spi_init_r (void)$/;"	f	typeref:typename:void
spi_init_r	arch/powerpc/cpu/mpc8xx/spi.c	/^void spi_init_r (void)$/;"	f	typeref:typename:void
spi_init_r	drivers/net/e1000_spi.c	/^void spi_init_r(void) { \/* Nothing to do *\/ }$/;"	f	typeref:typename:void
spi_init_r	drivers/spi/cf_spi.c	/^void spi_init_r(void)$/;"	f	typeref:typename:void
spi_init_r	drivers/spi/fsl_dspi.c	/^void spi_init_r(void)$/;"	f	typeref:typename:void
spi_init_seq_data_a	arch/arm/include/asm/arch-tegra/dc.h	/^	uint spi_init_seq_data_a;	\/* _DISP_SPI_INIT_SEQ_DATA_A_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
spi_init_seq_data_b	arch/arm/include/asm/arch-tegra/dc.h	/^	uint spi_init_seq_data_b;	\/* _DISP_SPI_INIT_SEQ_DATA_B_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
spi_init_seq_data_c	arch/arm/include/asm/arch-tegra/dc.h	/^	uint spi_init_seq_data_c;	\/* _DISP_SPI_INIT_SEQ_DATA_C_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
spi_init_seq_data_d	arch/arm/include/asm/arch-tegra/dc.h	/^	uint spi_init_seq_data_d;	\/* _DISP_SPI_INIT_SEQ_DATA_D_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
spi_legacy_shift_byte	drivers/spi/mvebu_a3700_spi.c	/^static int spi_legacy_shift_byte(struct spi_reg *reg, unsigned int bytelen,$/;"	f	typeref:typename:int	file:
spi_load_image_os	common/spl/spl_spi.c	/^static int spi_load_image_os(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spi_m_clk	arch/arm/dts/socfpga.dtsi	/^					spi_m_clk: spi_m_clk {$/;"	l
spi_mpp_backup	drivers/spi/kirkwood_spi.c	/^u32 spi_mpp_backup[4];$/;"	v	typeref:typename:u32[4]
spi_mrblr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_mrblr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_mrblr	include/commproc.h	/^	ushort	spi_mrblr;	\/* Max receive buffer length *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_nor	arch/arm/dts/k2g-evm.dts	/^	spi_nor: flash@0 {$/;"	l
spi_nor_option_flags	drivers/mtd/spi/sf_internal.h	/^enum spi_nor_option_flags {$/;"	g
spi_pio_xfer	drivers/spi/bfin_spi.c	/^static int spi_pio_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx,$/;"	f	typeref:typename:int	file:
spi_pio_xfer	drivers/spi/bfin_spi6xx.c	/^static int spi_pio_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx,$/;"	f	typeref:typename:int	file:
spi_post_probe	drivers/spi/spi-uclass.c	/^static int spi_post_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
spi_post_test	arch/powerpc/cpu/mpc8xx/spi.c	/^int spi_post_test (int flags)$/;"	f	typeref:typename:int
spi_rbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbase	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbase	include/commproc.h	/^	ushort	spi_rbase;	\/* Rx Buffer descriptor base address *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_rbc;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_rbc;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbc	include/commproc.h	/^	ushort	spi_rbc;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_rbptr;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_rbptr;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rbptr	include/commproc.h	/^	ushort	spi_rbptr;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rdp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_rdp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rdp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_rdp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rdp	include/commproc.h	/^	uint	spi_rdp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_read	arch/powerpc/cpu/mpc5xx/spi.c	/^ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
spi_read	arch/powerpc/cpu/mpc8260/spi.c	/^ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
spi_read	arch/powerpc/cpu/mpc8xx/spi.c	/^ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
spi_read	board/renesas/sh7752evb/spi-boot.c	/^#define spi_read(/;"	d	file:
spi_read	board/renesas/sh7753evb/spi-boot.c	/^#define spi_read(/;"	d	file:
spi_read	board/renesas/sh7757lcr/spi-boot.c	/^#define spi_read(/;"	d	file:
spi_read_flash	board/renesas/sh7752evb/spi-boot.c	/^static void __uses_spiboot2 spi_read_flash(void *buf, unsigned long addr,$/;"	f	typeref:typename:void __uses_spiboot2	file:
spi_read_flash	board/renesas/sh7753evb/spi-boot.c	/^static void __uses_spiboot2 spi_read_flash(void *buf, unsigned long addr,$/;"	f	typeref:typename:void __uses_spiboot2	file:
spi_read_flash	board/renesas/sh7757lcr/spi-boot.c	/^static void __uses_spiboot2 spi_read_flash(void *buf, unsigned long addr,$/;"	f	typeref:typename:void __uses_spiboot2	file:
spi_readl	drivers/spi/atmel_spi.h	/^#define spi_readl(/;"	d
spi_reg	drivers/spi/armada100_spi.c	/^	struct ssp_reg *spi_reg;$/;"	m	struct:armd_spi_slave	typeref:struct:ssp_reg *	file:
spi_reg	drivers/spi/mvebu_a3700_spi.c	/^struct spi_reg {$/;"	s	file:
spi_regs	drivers/spi/tegra114_spi.c	/^struct spi_regs {$/;"	s	file:
spi_regs	drivers/spi/tegra20_sflash.c	/^struct spi_regs {$/;"	s	file:
spi_regs	drivers/spi/tegra20_slink.c	/^struct spi_regs {$/;"	s	file:
spi_release_bus	drivers/net/e1000_spi.c	/^void spi_release_bus(struct spi_slave *spi)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/armada100_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/atmel_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/bfin_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/bfin_spi6xx.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/cf_qspi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/cf_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/davinci_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/ep93xx_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/fsl_dspi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/fsl_espi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/fsl_qspi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/kirkwood_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/lpc32xx_ssp.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/mpc52xx_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/mpc8xxx_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/mxc_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/mxs_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/omap3_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/sh_qspi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/sh_spi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/soft_spi_legacy.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/spi-uclass.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_release_bus	drivers/spi/ti_qspi.c	/^void spi_release_bus(struct spi_slave *slave)$/;"	f	typeref:typename:void
spi_request_bytes	drivers/spi/exynos_spi.c	/^static void spi_request_bytes(struct exynos_spi *regs, int count, int step)$/;"	f	typeref:typename:void	file:
spi_res	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_res;	\/* Tx temp. *\/$/;"	m	struct:spi	typeref:typename:uint
spi_res	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_res;	\/* Tx temp. *\/$/;"	m	struct:spi	typeref:typename:uint
spi_res	include/commproc.h	/^	uint	spi_res;$/;"	m	struct:spi	typeref:typename:uint
spi_res1	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_res1[4];	\/* SDMA temp. *\/$/;"	m	struct:spi	typeref:typename:uint[4]
spi_res1	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_res1[4];	\/* SDMA temp. *\/$/;"	m	struct:spi	typeref:typename:uint[4]
spi_res2	include/commproc.h	/^	ushort	spi_res2;$/;"	m	struct:spi	typeref:typename:ushort
spi_reset	board/renesas/sh7752evb/spi-boot.c	/^static void __uses_spiboot2 spi_reset(void)$/;"	f	typeref:typename:void __uses_spiboot2	file:
spi_reset	board/renesas/sh7753evb/spi-boot.c	/^static void __uses_spiboot2 spi_reset(void)$/;"	f	typeref:typename:void __uses_spiboot2	file:
spi_reset	board/renesas/sh7757lcr/spi-boot.c	/^static void __uses_spiboot2 spi_reset(void)$/;"	f	typeref:typename:void __uses_spiboot2	file:
spi_reset	drivers/spi/omap3_spi.c	/^static void spi_reset(struct mcspi *regs)$/;"	f	typeref:typename:void	file:
spi_rfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	spi_rfcr;	\/* Rx function code *\/$/;"	m	struct:spi	typeref:typename:u_char
spi_rfcr	arch/powerpc/include/asm/cpm_85xx.h	/^	u_char	spi_rfcr;	\/* Rx function code *\/$/;"	m	struct:spi	typeref:typename:u_char
spi_rfcr	include/commproc.h	/^	u_char	spi_rfcr;	\/* Rx function code *\/$/;"	m	struct:spi	typeref:typename:u_char
spi_rpbase	include/commproc.h	/^	ushort	spi_rpbase;	\/* Relocation pointer *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_rstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_rstate;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_rstate;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rstate	include/commproc.h	/^	uint	spi_rstate;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rx_tx	arch/arm/mach-exynos/spl_boot.c	/^static void spi_rx_tx(struct exynos_spi *regs, int todo,$/;"	f	typeref:typename:void	file:
spi_rx_tx	drivers/spi/exynos_spi.c	/^static int spi_rx_tx(struct exynos_spi_priv *priv, int todo,$/;"	f	typeref:typename:int	file:
spi_rxtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_rxtmp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rxtmp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_rxtmp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_rxtmp	include/commproc.h	/^	uint	spi_rxtmp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_set_speed	board/Arcturus/ucp1020/ucp1020.c	/^void spi_set_speed(struct spi_slave *slave, uint hz)$/;"	f	typeref:typename:void
spi_set_speed	drivers/spi/bfin_spi.c	/^void spi_set_speed(struct spi_slave *slave, uint hz)$/;"	f	typeref:typename:void
spi_set_speed	drivers/spi/bfin_spi6xx.c	/^void spi_set_speed(struct spi_slave *slave, uint hz)$/;"	f	typeref:typename:void
spi_set_speed	drivers/spi/ep93xx_spi.c	/^void spi_set_speed(struct spi_slave *slave, unsigned int hz)$/;"	f	typeref:typename:void
spi_set_speed_mode	drivers/spi/spi-uclass.c	/^static int spi_set_speed_mode(struct udevice *bus, int speed, int mode)$/;"	f	typeref:typename:int	file:
spi_set_wordlen	drivers/spi/spi.c	/^int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen)$/;"	f	typeref:typename:int
spi_setup_offset	drivers/spi/ich.c	/^static int spi_setup_offset(struct spi_trans *trans)$/;"	f	typeref:typename:int	file:
spi_setup_opcode	drivers/spi/ich.c	/^static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans)$/;"	f	typeref:typename:int	file:
spi_setup_slave	drivers/net/e1000_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/armada100_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/atmel_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/bfin_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/bfin_spi6xx.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/cf_qspi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/cf_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/davinci_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/ep93xx_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/fsl_dspi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/fsl_espi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/fsl_qspi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/kirkwood_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/lpc32xx_ssp.c	/^struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/mpc52xx_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/mpc8xxx_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/mxc_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/mxs_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/omap3_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/sh_qspi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/sh_spi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/soft_spi_legacy.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/spi-uclass.c	/^struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave	drivers/spi/ti_qspi.c	/^struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,$/;"	f	typeref:struct:spi_slave *
spi_setup_slave_fdt	drivers/spi/spi-uclass.c	/^struct spi_slave *spi_setup_slave_fdt(const void *blob, int node,$/;"	f	typeref:struct:spi_slave *
spi_setup_type	drivers/spi/ich.c	/^static void spi_setup_type(struct spi_trans *trans, int data_bytes)$/;"	f	typeref:typename:void	file:
spi_slave	include/spi.h	/^struct spi_slave {$/;"	s
spi_slave_ofdata_to_platdata	drivers/spi/spi-uclass.c	/^int spi_slave_ofdata_to_platdata(const void *blob, int node,$/;"	f	typeref:typename:int
spi_spcom	arch/powerpc/include/asm/immap_8260.h	/^	u_char	spi_spcom;$/;"	m	struct:im_spi	typeref:typename:u_char
spi_spie	arch/powerpc/include/asm/immap_8260.h	/^	u_char	spi_spie;$/;"	m	struct:im_spi	typeref:typename:u_char
spi_spim	arch/powerpc/include/asm/immap_8260.h	/^	u_char	spi_spim;$/;"	m	struct:im_spi	typeref:typename:u_char
spi_spmode	arch/powerpc/include/asm/immap_8260.h	/^	ushort	spi_spmode;$/;"	m	struct:im_spi	typeref:typename:ushort
spi_start_byte	arch/arm/include/asm/arch-tegra/dc.h	/^	uint spi_start_byte;		\/* _COM_SPI_START_BYTE_0 *\/$/;"	m	struct:dc_com_reg	typeref:typename:uint
spi_sts	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		spi_sts;	\/* 0x14 *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
spi_t	arch/powerpc/include/asm/cpm_8260.h	/^} spi_t;$/;"	t	typeref:struct:spi
spi_t	arch/powerpc/include/asm/cpm_85xx.h	/^} spi_t;$/;"	t	typeref:struct:spi
spi_t	include/commproc.h	/^} spi_t;$/;"	t	typeref:struct:spi
spi_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) spi_t;$/;"	t	typeref:struct:spi
spi_tbase	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbase	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbase	include/commproc.h	/^	ushort	spi_tbase;	\/* Tx Buffer descriptor base address *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbc	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_tbc;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbc	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_tbc;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbc	include/commproc.h	/^	ushort	spi_tbc;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbptr	arch/powerpc/include/asm/cpm_8260.h	/^	ushort	spi_tbptr;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbptr	arch/powerpc/include/asm/cpm_85xx.h	/^	ushort	spi_tbptr;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tbptr	include/commproc.h	/^	ushort	spi_tbptr;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:ushort
spi_tdp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_tdp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_tdp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_tdp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_tdp	include/commproc.h	/^	uint	spi_tdp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_test_next_stage	cmd/sf.c	/^static void spi_test_next_stage(struct test_info *test)$/;"	f	typeref:typename:void	file:
spi_tfcr	arch/powerpc/include/asm/cpm_8260.h	/^	u_char	spi_tfcr;	\/* Tx function code *\/$/;"	m	struct:spi	typeref:typename:u_char
spi_tfcr	arch/powerpc/include/asm/cpm_85xx.h	/^	u_char	spi_tfcr;	\/* Tx function code *\/$/;"	m	struct:spi	typeref:typename:u_char
spi_tfcr	include/commproc.h	/^	u_char	spi_tfcr;	\/* Tx function code *\/$/;"	m	struct:spi	typeref:typename:u_char
spi_trans	drivers/spi/ich.h	/^struct spi_trans {$/;"	s
spi_transmit	board/tqc/tqm5200/cmd_stk52xx.c	/^static int spi_transmit(unsigned char data)$/;"	f	typeref:typename:int	file:
spi_tstate	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_tstate;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_tstate	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_tstate;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_tstate	include/commproc.h	/^	uint	spi_tstate;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_txtmp	arch/powerpc/include/asm/cpm_8260.h	/^	uint	spi_txtmp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_txtmp	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	spi_txtmp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_txtmp	include/commproc.h	/^	uint	spi_txtmp;	\/* Internal *\/$/;"	m	struct:spi	typeref:typename:uint
spi_use_in	drivers/spi/ich.c	/^static inline void spi_use_in(struct spi_trans *trans, unsigned bytes)$/;"	f	typeref:typename:void	file:
spi_use_out	drivers/spi/ich.c	/^static inline void spi_use_out(struct spi_trans *trans, unsigned bytes)$/;"	f	typeref:typename:void	file:
spi_w8r8	include/spi.h	/^static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)$/;"	f	typeref:typename:int
spi_write	arch/powerpc/cpu/mpc5xx/spi.c	/^ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
spi_write	arch/powerpc/cpu/mpc8260/spi.c	/^ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
spi_write	arch/powerpc/cpu/mpc8xx/spi.c	/^ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:ssize_t
spi_write	board/renesas/sh7752evb/spi-boot.c	/^#define spi_write(/;"	d	file:
spi_write	board/renesas/sh7753evb/spi-boot.c	/^#define spi_write(/;"	d	file:
spi_write	board/renesas/sh7757lcr/spi-boot.c	/^#define spi_write(/;"	d	file:
spi_write_com	drivers/video/formike.c	/^static void spi_write_com(struct spi_slave *spi, unsigned int addr)$/;"	f	typeref:typename:void	file:
spi_write_dat	drivers/video/formike.c	/^static void spi_write_dat(struct spi_slave *spi, unsigned int val)$/;"	f	typeref:typename:void	file:
spi_write_protect_region	drivers/spi/ich.c	/^int spi_write_protect_region(struct udevice *dev, uint32_t lower_limit,$/;"	f	typeref:typename:int
spi_write_tag_val	drivers/video/formike.c	/^static int spi_write_tag_val(struct spi_slave *spi, unsigned char tag,$/;"	f	typeref:typename:int	file:
spi_writel	drivers/spi/atmel_spi.h	/^#define spi_writel(/;"	d
spi_xchg_single	drivers/spi/mxc_spi.c	/^int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	arch/powerpc/cpu/mpc5xx/spi.c	/^ssize_t spi_xfer (size_t count)$/;"	f	typeref:typename:ssize_t
spi_xfer	arch/powerpc/cpu/mpc8260/spi.c	/^ssize_t spi_xfer (size_t count)$/;"	f	typeref:typename:ssize_t
spi_xfer	arch/powerpc/cpu/mpc8xx/spi.c	/^ssize_t spi_xfer (size_t count)$/;"	f	typeref:typename:ssize_t
spi_xfer	drivers/net/e1000_spi.c	/^int spi_xfer(struct spi_slave *spi, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/armada100_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/atmel_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/bfin_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/bfin_spi6xx.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/cf_qspi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/cf_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/davinci_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/ep93xx_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/fsl_dspi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/fsl_espi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/fsl_qspi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/kirkwood_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/lpc32xx_ssp.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/mpc52xx_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/mpc8xxx_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/mxc_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/mxs_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/omap3_spi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/sh_qspi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/sh_spi.c	/^int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/soft_spi_legacy.c	/^int  spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/spi-uclass.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen,$/;"	f	typeref:typename:int
spi_xfer	drivers/spi/ti_qspi.c	/^int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,$/;"	f	typeref:typename:int
spia	drivers/spi/ich.h	/^	uint32_t spia;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint32_t
spiboot_main	board/renesas/sh7752evb/spi-boot.c	/^void __uses_spiboot2 spiboot_main(void)$/;"	f	typeref:typename:void __uses_spiboot2
spiboot_main	board/renesas/sh7753evb/spi-boot.c	/^void __uses_spiboot2 spiboot_main(void)$/;"	f	typeref:typename:void __uses_spiboot2
spiboot_main	board/renesas/sh7757lcr/spi-boot.c	/^void __uses_spiboot2 spiboot_main(void)$/;"	f	typeref:typename:void __uses_spiboot2
spibootcan	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	spibootcan;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
spic	drivers/spi/ich.h	/^	uint16_t spic;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint16_t
spicar	arch/powerpc/include/asm/immap_86xx.h	/^	uint	spicar;		\/* 0xc0014 - Switch Port Information Capability Register *\/$/;"	m	struct:ccsr_rio	typeref:typename:uint
spicfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	spicfg;		\/* 0xB4: APB_MISC_GP_SPICFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
spicfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	spicfg;		\/* 0xB4: APB_MISC_GP_SPICFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
spicfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	spicfg;		\/* 0xA8: APB_MISC_GP_SPICFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
spicfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	spicfg;		\/* 0xB4: APB_MISC_GP_SPICFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
spicfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	spicfg;		\/* 0xB4: APB_MISC_GP_SPICFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
spiclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int spiclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
spicr	drivers/spi/xilinx_spi.c	/^	u32 spicr;	\/* SPI Control Register (SPICR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spid	drivers/spi/ich.h	/^	uint64_t spid[8];$/;"	m	struct:ich7_spi_regs	typeref:typename:uint64_t[8]
spidrr	drivers/spi/xilinx_spi.c	/^	u32 spidrr;	\/* SPI Data Receive Register (SPIDRR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spidtr	drivers/spi/xilinx_spi.c	/^	u32 spidtr;	\/* SPI Data Transmit Register (SPIDTR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spie	arch/powerpc/include/asm/immap_85xx.h	/^	u8	spie;$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u8
spie	include/linux/immap_qe.h	/^	u8 spie;		\/* SPI event register *\/$/;"	m	struct:spi	typeref:typename:u8
spiinttype_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 spiinttype_params_sn20[]	= {0x60};$/;"	v	typeref:typename:u16[]	file:
spim	arch/powerpc/include/asm/immap_85xx.h	/^	u8	spim;$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u8
spim	include/linux/immap_qe.h	/^	u8 spim;		\/* SPI mask register *\/$/;"	m	struct:spi	typeref:typename:u8
spim0usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	spim0usefpga;			\/* 0x738 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
spim1usefpga	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	spim1usefpga;			\/* 0x730 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
spimsiclrcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 spimsiclrcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
spimsicr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 spimsicr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
spin_lock	include/linux/compat.h	/^#define spin_lock(/;"	d
spin_lock_init	include/linux/compat.h	/^#define spin_lock_init(/;"	d
spin_lock_irqsave	include/linux/compat.h	/^#define spin_lock_irqsave(/;"	d
spin_table_compat	arch/powerpc/cpu/mpc85xx/release.S	/^spin_table_compat:$/;"	l
spin_table_cpu_release_addr	arch/arm/cpu/armv8/spin_table_v8.S	/^spin_table_cpu_release_addr:$/;"	l
spin_table_reserve_begin	arch/arm/cpu/armv8/spin_table_v8.S	/^spin_table_reserve_begin:$/;"	l
spin_table_reserve_end	arch/arm/cpu/armv8/spin_table_v8.S	/^spin_table_reserve_end:$/;"	l
spin_table_update_dt	arch/arm/cpu/armv8/spin_table.c	/^int spin_table_update_dt(void *fdt)$/;"	f	typeref:typename:int
spin_unlock	include/linux/compat.h	/^#define spin_unlock(/;"	d
spin_unlock_irqrestore	include/linux/compat.h	/^#define spin_unlock_irqrestore(/;"	d
spin_wheel	board/freescale/m5253demo/flash.c	/^void inline spin_wheel(void)$/;"	f	typeref:typename:void
spinboxclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int spinboxclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
spinfo	include/andestech/andes_pcu.h	/^	unsigned int	spinfo;		\/* 0x04 - Scratch Pad Info *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
spinlock_t	include/linux/compat.h	/^typedef unused_t spinlock_t;$/;"	t	typeref:typename:unused_t
spinner	fs/jffs2/jffs2_nand_1pass.c	/^static char spinner[] = { '|', '\/', '-', '\\\\' };$/;"	v	typeref:typename:char[]	file:
spird	include/linux/immap_qe.h	/^	u32 spird;		\/* SPI receive data register (cpu mode) *\/$/;"	m	struct:spi	typeref:typename:u32
spireg	drivers/spi/kirkwood_spi.c	/^	struct kwspi_registers *spireg;$/;"	m	struct:mvebu_spi_platdata	typeref:struct:kwspi_registers *	file:
spireg	drivers/spi/kirkwood_spi.c	/^	struct kwspi_registers *spireg;$/;"	m	struct:mvebu_spi_priv	typeref:struct:kwspi_registers *	file:
spireg	drivers/spi/kirkwood_spi.c	/^static struct kwspi_registers *spireg =$/;"	v	typeref:struct:kwspi_registers *	file:
spireg	drivers/spi/mvebu_a3700_spi.c	/^	struct spi_reg *spireg;$/;"	m	struct:mvebu_spi_platdata	typeref:struct:spi_reg *	file:
spirfor	drivers/spi/xilinx_spi.c	/^	u32 spirfor;	\/* SPI Receive FIFO Occupancy Register (SPIRFOR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spis	drivers/spi/ich.h	/^	uint16_t spis;$/;"	m	struct:ich7_spi_regs	typeref:typename:uint16_t
spisr	drivers/spi/xilinx_spi.c	/^	u32 spisr;	\/* SPI Status Register (SPISR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spissr	drivers/spi/xilinx_spi.c	/^	u32 spissr;	\/* SPI Slave Select Register (SPISSR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spitd	include/linux/immap_qe.h	/^	u32 spitd;		\/* SPI transmit data register (cpu mode) *\/$/;"	m	struct:spi	typeref:typename:u32
spitfor	drivers/spi/xilinx_spi.c	/^	u32 spitfor;	\/* SPI Transmit FIFO Occupancy Register (SPITFOR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
spl/boot.bin	Makefile	/^spl\/boot.bin: spl\/u-boot-spl$/;"	t
spl/sunxi-spl.bin	Makefile	/^spl\/sunxi-spl.bin: spl\/u-boot-spl$/;"	t
spl/u-boot-nand-spl.imx	arch/arm/imx-common/Makefile	/^spl\/u-boot-nand-spl.imx: SPL FORCE$/;"	t
spl/u-boot-spl	Makefile	/^spl\/u-boot-spl: tools prepare \\$/;"	t
spl/u-boot-spl.ais	Makefile	/^spl\/u-boot-spl.ais: spl\/u-boot-spl.bin FORCE$/;"	t
spl/u-boot-spl.bin	Makefile	/^spl\/u-boot-spl.bin: spl\/u-boot-spl$/;"	t
spl/u-boot-spl.csf	arch/arm/cpu/arm926ejs/mxs/Makefile	/^spl\/u-boot-spl.csf: spl\/u-boot-spl.ivt spl\/u-boot-spl.bin board\/$(VENDOR)\/$(BOARD)\/sign\/u/;"	t
spl/u-boot-spl.gph	arch/arm/mach-keystone/config.mk	/^spl\/u-boot-spl.gph: spl\/u-boot-spl.bin FORCE$/;"	t
spl/u-boot-spl.img	Makefile	/^spl\/u-boot-spl.img: spl\/u-boot-spl.bin FORCE$/;"	t
spl/u-boot-spl.ivt	arch/arm/cpu/arm926ejs/mxs/Makefile	/^spl\/u-boot-spl.ivt: spl\/u-boot-spl.bin$/;"	t
spl/u-boot-spl.pbl	Makefile	/^spl\/u-boot-spl.pbl: spl\/u-boot-spl.bin FORCE$/;"	t
spl/u-boot-spl.sfp	Makefile	/^spl\/u-boot-spl.sfp: spl\/u-boot-spl$/;"	t
spl_board_announce_boot_device	arch/arm/mach-sunxi/board.c	/^void spl_board_announce_boot_device(void)$/;"	f	typeref:typename:void
spl_board_announce_boot_device	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^void spl_board_announce_boot_device(void)$/;"	f	typeref:typename:void
spl_board_announce_boot_device	arch/sandbox/cpu/spl.c	/^void spl_board_announce_boot_device(void)$/;"	f	typeref:typename:void
spl_board_announce_boot_device	common/spl/spl.c	/^__weak void spl_board_announce_boot_device(void) { }$/;"	f	typeref:typename:__weak void
spl_board_init	arch/arm/cpu/armv7/omap-common/boot-common.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/arm/cpu/armv8/zynqmp/spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/arm/mach-at91/spl_at91.c	/^void __weak spl_board_init(void)$/;"	f	typeref:typename:void __weak
spl_board_init	arch/arm/mach-davinci/spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/arm/mach-rockchip/rk3288-board-spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/arm/mach-tegra/spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/arm/mach-uniphier/init/init.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/arm/mach-zynq/spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/microblaze/cpu/spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	arch/sandbox/cpu/spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/LaCie/edminiv2/edminiv2.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/a3m071/a3m071.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/atmel/sama5d2_ptc/sama5d2_ptc.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/atmel/sama5d2_xplained/sama5d2_xplained.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/atmel/sama5d3_xplained/sama5d3_xplained.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/atmel/sama5d3xek/sama5d3xek.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/atmel/sama5d4_xplained/sama5d4_xplained.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/atmel/sama5d4ek/sama5d4ek.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/denx/m53evk/m53evk.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/denx/ma5d4evk/ma5d4evk.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/freescale/ls1021atwr/ls1021atwr.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/gateworks/gw_ventana/gw_ventana_spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/liebherr/lwmon5/lwmon5.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/siemens/corvus/board.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/siemens/taurus/taurus.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/ti/ks2_evm/board.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/timll/devkit3250/devkit3250_spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/woodburn/woodburn.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_init	board/work-microwave/work_92105/work_92105_spl.c	/^void spl_board_init(void)$/;"	f	typeref:typename:void
spl_board_load_image	arch/arm/mach-sunxi/board.c	/^static int spl_board_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_board_load_image	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^static int spl_board_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_board_load_image	arch/sandbox/cpu/spl.c	/^static int spl_board_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_board_prepare_for_boot	arch/arm/mach-zynq/spl.c	/^void spl_board_prepare_for_boot(void)$/;"	f	typeref:typename:void
spl_board_prepare_for_boot	common/spl/spl.c	/^__weak void spl_board_prepare_for_boot(void)$/;"	f	typeref:typename:__weak void
spl_board_prepare_for_linux	board/technexion/twister/twister.c	/^void spl_board_prepare_for_linux(void)$/;"	f	typeref:typename:void
spl_board_prepare_for_linux	board/timll/devkit8000/devkit8000.c	/^void spl_board_prepare_for_linux(void)$/;"	f	typeref:typename:void
spl_board_prepare_for_linux	common/spl/spl.c	/^__weak void spl_board_prepare_for_linux(void)$/;"	f	typeref:typename:__weak void
spl_boot_device	arch/arm/cpu/arm1136/mx35/generic.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/cpu/arm926ejs/spear/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/cpu/armv7/ls102xa/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/cpu/armv7/omap-common/boot-common.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/cpu/armv8/fsl-layerscape/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/cpu/armv8/zynqmp/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/imx-common/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-at91/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-davinci/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-mvebu/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-rockchip/rk3288-board-spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-socfpga/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-sunxi/board.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-tegra/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-uniphier/boot-mode/boot-mode.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/arm/mach-zynq/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/microblaze/cpu/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/powerpc/cpu/mpc5xxx/spl_boot.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/powerpc/cpu/ppc4xx/spl_boot.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	arch/sandbox/cpu/spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	board/LaCie/edminiv2/edminiv2.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	board/denx/m53evk/m53evk.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	board/ti/ks2_evm/board.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	board/timll/devkit3250/devkit3250_spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	board/work-microwave/work_92105/work_92105_spl.c	/^u32 spl_boot_device(void)$/;"	f	typeref:typename:u32
spl_boot_device	include/spl.h	/^struct spl_boot_device {$/;"	s
spl_boot_device_raw	arch/arm/mach-uniphier/boot-mode/boot-mode.c	/^u32 spl_boot_device_raw(void)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/cpu/arm1136/mx35/generic.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/cpu/armv7/ls102xa/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/cpu/armv7/omap-common/boot-common.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/cpu/armv8/fsl-layerscape/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/cpu/armv8/zynqmp/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/imx-common/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-at91/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-davinci/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-mvebu/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-rockchip/rk3288-board-spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-socfpga/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-sunxi/board.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-uniphier/boot-mode/boot-mode.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_boot_mode	arch/arm/mach-zynq/spl.c	/^u32 spl_boot_mode(const u32 boot_device)$/;"	f	typeref:typename:u32
spl_checksum	tools/mkexynosspl.c	/^	uint32_t spl_checksum;$/;"	m	struct:var_size_header	typeref:typename:uint32_t	file:
spl_dfu_cmd	common/spl/spl_dfu.c	/^int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr)$/;"	f	typeref:typename:int
spl_display_print	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void spl_display_print(void)$/;"	f	typeref:typename:void
spl_dram_init	board/barco/platinum/spl_picon.c	/^static void spl_dram_init(int width)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/barco/platinum/spl_titanium.c	/^static void spl_dram_init(int width)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/ccv/xpress/spl.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static void spl_dram_init(int width)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/el/el6x/el6x.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/engicam/icorem6/icorem6.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/freescale/mx6sabresd/mx6sabresd.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/freescale/mx6slevk/mx6slevk.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/gateworks/gw_ventana/gw_ventana_spl.c	/^static void spl_dram_init(int width, int size_mb, int board_model)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/phytec/pcm058/pcm058.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static void spl_dram_init(int width)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/udoo/udoo_spl.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_dram_init	board/wandboard/spl.c	/^static void spl_dram_init(void)$/;"	f	typeref:typename:void	file:
spl_export	cmd/spl.c	/^static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:int	file:
spl_fit_read	common/spl/spl_fat.c	/^static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,$/;"	f	typeref:typename:ulong	file:
spl_fit_select_fdt	common/spl/spl_fit.c	/^static int spl_fit_select_fdt(const void *fdt, int images, int *fdt_offsetp)$/;"	f	typeref:typename:int	file:
spl_get_machine_params	board/samsung/arndale/arndale_spl.c	/^struct spl_machine_param *spl_get_machine_params(void)$/;"	f	typeref:struct:spl_machine_param *
spl_get_machine_params	board/samsung/smdk5250/smdk5250_spl.c	/^struct spl_machine_param *spl_get_machine_params(void)$/;"	f	typeref:struct:spl_machine_param *
spl_get_machine_params	board/samsung/smdk5420/smdk5420_spl.c	/^struct spl_machine_param *spl_get_machine_params(void)$/;"	f	typeref:struct:spl_machine_param *
spl_hdr	tools/rkcommon.c	/^	const char *spl_hdr;$/;"	m	struct:spl_info	typeref:typename:const char *	file:
spl_image_info	include/spl.h	/^struct spl_image_info {$/;"	s
spl_image_loader	include/spl.h	/^struct spl_image_loader {$/;"	s
spl_info	tools/rkcommon.c	/^struct spl_info {$/;"	s	file:
spl_infos	tools/rkcommon.c	/^static struct spl_info spl_infos[] = {$/;"	v	typeref:struct:spl_info[]	file:
spl_init	common/spl/spl.c	/^int spl_init(void)$/;"	f	typeref:typename:int
spl_init_keystone_plls	board/ti/ks2_evm/board_k2e.c	/^void spl_init_keystone_plls(void)$/;"	f	typeref:typename:void
spl_init_keystone_plls	board/ti/ks2_evm/board_k2g.c	/^void spl_init_keystone_plls(void)$/;"	f	typeref:typename:void
spl_init_keystone_plls	board/ti/ks2_evm/board_k2hk.c	/^void spl_init_keystone_plls(void)$/;"	f	typeref:typename:void
spl_init_keystone_plls	board/ti/ks2_evm/board_k2l.c	/^void spl_init_keystone_plls(void)$/;"	f	typeref:typename:void
spl_ll_find_loader	common/spl/spl.c	/^static struct spl_image_loader *spl_ll_find_loader(uint boot_device)$/;"	f	typeref:struct:spl_image_loader *	file:
spl_load_image	common/spl/spl.c	/^static int spl_load_image(struct spl_image_info *spl_image, u32 boot_device)$/;"	f	typeref:typename:int	file:
spl_load_image_ext	common/spl/spl_ext.c	/^int spl_load_image_ext(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_load_image_ext_os	common/spl/spl_ext.c	/^int spl_load_image_ext_os(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_load_image_fat	common/spl/spl_fat.c	/^int spl_load_image_fat(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_load_image_fat_os	common/spl/spl_fat.c	/^int spl_load_image_fat_os(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_load_info	include/spl.h	/^struct spl_load_info {$/;"	s
spl_load_simple_fit	common/spl/spl_fit.c	/^int spl_load_simple_fit(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_machine_param	arch/arm/mach-exynos/include/mach/spl.h	/^struct spl_machine_param {$/;"	s
spl_mmc_do_fs_boot	common/spl/spl_mmc.c	/^static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc)$/;"	f	typeref:typename:int	file:
spl_mmc_find_device	common/spl/spl_mmc.c	/^static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)$/;"	f	typeref:typename:int	file:
spl_mmc_get_device_index	common/spl/spl_mmc.c	/^int spl_mmc_get_device_index(u32 boot_device)$/;"	f	typeref:typename:int
spl_mmc_load_image	common/spl/spl_mmc.c	/^static int spl_mmc_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_mx6q_dram_init	board/compulab/cm_fx6/spl.c	/^static void spl_mx6q_dram_init(enum ddr_config dram_config, bool reset)$/;"	f	typeref:typename:void	file:
spl_mx6s_dram_init	board/compulab/cm_fx6/spl.c	/^static void spl_mx6s_dram_init(enum ddr_config dram_config, bool reset)$/;"	f	typeref:typename:void	file:
spl_nand_erase_one	drivers/mtd/nand/atmel_nand.c	/^int spl_nand_erase_one(int block, int page)$/;"	f	typeref:typename:int
spl_nand_fit_read	common/spl/spl_nand.c	/^static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,$/;"	f	typeref:typename:ulong	file:
spl_nand_load_element	common/spl/spl_nand.c	/^static int spl_nand_load_element(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_nand_load_image	common/spl/spl_nand.c	/^int spl_nand_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_nand_load_image	common/spl/spl_nand.c	/^static int spl_nand_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_net_load_image	common/spl/spl_net.c	/^static int spl_net_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_net_load_image_cpgmac	common/spl/spl_net.c	/^int spl_net_load_image_cpgmac(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_net_load_image_usb	common/spl/spl_net.c	/^int spl_net_load_image_usb(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_nor_load_image	common/spl/spl_nor.c	/^static int spl_nor_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_onenand_load_image	common/spl/spl_onenand.c	/^static int spl_onenand_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_parse_image_header	common/spl/spl.c	/^int spl_parse_image_header(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_ram_load_image	common/spl/spl.c	/^static int spl_ram_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_ram_load_read	common/spl/spl.c	/^static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,$/;"	f	typeref:typename:ulong	file:
spl_register_fat_device	common/spl/spl_fat.c	/^static int spl_register_fat_device(struct blk_desc *block_dev, int partition)$/;"	f	typeref:typename:int	file:
spl_relocate_stack_gd	common/spl/spl.c	/^ulong spl_relocate_stack_gd(void)$/;"	f	typeref:typename:ulong
spl_sata_load_image	common/spl/spl_sata.c	/^static int spl_sata_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_set_header_raw_uboot	common/spl/spl.c	/^void spl_set_header_raw_uboot(struct spl_image_info *spl_image)$/;"	f	typeref:typename:void
spl_siemens_board_init	board/siemens/draco/board.c	/^static void spl_siemens_board_init(void)$/;"	f	typeref:typename:void	file:
spl_siemens_board_init	board/siemens/pxm2/board.c	/^void spl_siemens_board_init(void)$/;"	f	typeref:typename:void
spl_siemens_board_init	board/siemens/rut/board.c	/^static void spl_siemens_board_init(void)$/;"	f	typeref:typename:void	file:
spl_signature	arch/arm/include/asm/arch-sunxi/spl.h	/^		uint8_t spl_signature[4];$/;"	m	union:boot_file_head::__anon79f81eda010a	typeref:typename:uint8_t[4]
spl_signature	arch/arm/include/asm/arch/spl.h	/^		uint8_t spl_signature[4];$/;"	m	union:boot_file_head::__anondacd07f6010a	typeref:typename:uint8_t[4]
spl_size	tools/mkexynosspl.c	/^	uint32_t spl_size;$/;"	m	struct:var_size_header	typeref:typename:uint32_t	file:
spl_size	tools/rkcommon.c	/^	const uint32_t spl_size;$/;"	m	struct:spl_info	typeref:typename:const uint32_t	file:
spl_spi_fit_read	common/spl/spl_spi.c	/^static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,$/;"	f	typeref:typename:ulong	file:
spl_spi_load_image	common/spl/spl_spi.c	/^static int spl_spi_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_spi_load_image	drivers/mtd/spi/sunxi_spi_spl.c	/^static int spl_spi_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_start_uboot	arch/arm/cpu/armv8/zynqmp/spl.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	arch/arm/mach-zynq/spl.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	arch/microblaze/cpu/spl.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/Barix/ipam390/ipam390.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/BuR/brppt1/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/a3m071/a3m071.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/birdland/bav335x/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/bosch/shc/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/freescale/mx6sabresd/mx6sabresd.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/gateworks/gw_ventana/gw_ventana_spl.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/gumstix/pepper/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/isee/igep00x0/igep00x0.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/liebherr/lwmon5/lwmon5.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/logicpd/omap3som/omap3logic.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/quipos/cairo/cairo.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/silica/pengwyn/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/tcl/sl50/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/technexion/twister/twister.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/ti/am335x/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/ti/am57xx/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/ti/dra7xx/evm.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/timll/devkit8000/devkit8000.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	board/vscom/baltos/board.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_start_uboot	common/spl/spl.c	/^__weak int spl_start_uboot(void)$/;"	f	typeref:typename:__weak int
spl_start_uboot	common/spl/spl_mmc.c	/^int spl_start_uboot(void)$/;"	f	typeref:typename:int
spl_ubi_load_image	common/spl/spl_ubi.c	/^int spl_ubi_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int
spl_usb_load_image	common/spl/spl_usb.c	/^static int spl_usb_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
spl_validate_uboot	board/freescale/common/fsl_chain_of_trust.c	/^void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr)$/;"	f	typeref:typename:void
spl_was_boot_source	arch/arm/mach-tegra/board.c	/^bool spl_was_boot_source(void)$/;"	f	typeref:typename:bool
spl_ymodem_load_image	common/spl/spl_ymodem.c	/^static int spl_ymodem_load_image(struct spl_image_info *spl_image,$/;"	f	typeref:typename:int	file:
splah	arch/powerpc/include/asm/immap_85xx.h	/^	u32 splah;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
splal	arch/powerpc/include/asm/immap_85xx.h	/^	u32 splal;$/;"	m	struct:ccsr_pamu	typeref:typename:u32
splash_align_axis	common/lcd.c	/^static void splash_align_axis(int *axis, unsigned long panel_size,$/;"	f	typeref:typename:void	file:
splash_flags	include/splash.h	/^enum splash_flags {$/;"	g
splash_get_pos	common/splash.c	/^void splash_get_pos(int *x, int *y)$/;"	f	typeref:typename:void
splash_get_pos	include/splash.h	/^static inline void splash_get_pos(int *x, int *y) { }$/;"	f	typeref:typename:void
splash_init_sata	common/splash_source.c	/^static inline int splash_init_sata(void)$/;"	f	typeref:typename:int	file:
splash_init_sata	common/splash_source.c	/^static int splash_init_sata(void)$/;"	f	typeref:typename:int	file:
splash_init_usb	common/splash_source.c	/^static inline int splash_init_usb(void)$/;"	f	typeref:typename:int	file:
splash_init_usb	common/splash_source.c	/^static int splash_init_usb(void)$/;"	f	typeref:typename:int	file:
splash_load_fs	common/splash_source.c	/^static int splash_load_fs(struct splash_location *location, u32 bmp_load_addr)$/;"	f	typeref:typename:int	file:
splash_load_raw	common/splash_source.c	/^static int splash_load_raw(struct splash_location *location, u32 bmp_load_addr)$/;"	f	typeref:typename:int	file:
splash_location	include/splash.h	/^struct splash_location {$/;"	s
splash_locations	board/compulab/cm_t35/cm_t35.c	/^struct splash_location splash_locations[] = {$/;"	v	typeref:struct:splash_location[]
splash_mount_ubifs	common/splash_source.c	/^static inline int splash_mount_ubifs(struct splash_location *location)$/;"	f	typeref:typename:int	file:
splash_mount_ubifs	common/splash_source.c	/^static int splash_mount_ubifs(struct splash_location *location)$/;"	f	typeref:typename:int	file:
splash_nand_read_raw	common/splash_source.c	/^static int splash_nand_read_raw(u32 bmp_load_addr, int offset, size_t read_size)$/;"	f	typeref:typename:int	file:
splash_screen_prepare	board/compulab/cm_fx6/cm_fx6.c	/^int splash_screen_prepare(void)$/;"	f	typeref:typename:int
splash_screen_prepare	board/compulab/cm_t35/cm_t35.c	/^int splash_screen_prepare(void)$/;"	f	typeref:typename:int
splash_screen_prepare	common/splash.c	/^__weak int splash_screen_prepare(void)$/;"	f	typeref:typename:__weak int
splash_select_fs_dev	common/splash_source.c	/^static int splash_select_fs_dev(struct splash_location *location)$/;"	f	typeref:typename:int	file:
splash_sf_read_raw	common/splash_source.c	/^static int splash_sf_read_raw(u32 bmp_load_addr, int offset, size_t read_size)$/;"	f	typeref:typename:int	file:
splash_source_load	common/splash_source.c	/^int splash_source_load(struct splash_location *locations, uint size)$/;"	f	typeref:typename:int
splash_source_load	include/splash.h	/^static inline int splash_source_load(struct splash_location *locations,$/;"	f	typeref:typename:int
splash_storage	include/splash.h	/^enum splash_storage {$/;"	g
splash_storage_read_raw	common/splash_source.c	/^static int splash_storage_read_raw(struct splash_location *location,$/;"	f	typeref:typename:int	file:
splash_umount_ubifs	common/splash_source.c	/^static inline int splash_umount_ubifs(void)$/;"	f	typeref:typename:int	file:
split	include/fsl_qe.h	/^	u8 split;		\/* 0 = shared I-RAM, 1 = split I-RAM *\/$/;"	m	struct:qe_firmware	typeref:typename:u8
split	scripts/kconfig/qconf.h	/^	QSplitter* split;$/;"	m	class:ConfigSearchWindow	typeref:typename:QSplitter *
split1	scripts/kconfig/qconf.h	/^	QSplitter* split1;$/;"	m	class:ConfigMainWindow	typeref:typename:QSplitter *
split2	scripts/kconfig/qconf.h	/^	QSplitter* split2;$/;"	m	class:ConfigMainWindow	typeref:typename:QSplitter *
split_block	arch/arm/cpu/armv8/cache_v8.c	/^static void split_block(u64 *pte, int level)$/;"	f	typeref:typename:void	file:
spll	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^const struct sata_pll *spll = (struct sata_pll *)SATA_PLL_BASE;$/;"	v	typeref:typename:const struct sata_pll *
spll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	spll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
spll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	spll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
spll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	spll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
spll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned spll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
spll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned spll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
spll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned spll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
spll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	spll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
splluser_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	splluser_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
splluser_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	splluser_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
splluser_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	splluser_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
spmf_mult	arch/powerpc/cpu/mpc512x/speed.c	/^static int spmf_mult[] = {$/;"	v	typeref:typename:int[]	file:
spmi	arch/sandbox/dts/sandbox.dts	/^	spmi: spmi@0 {$/;"	l
spmi	arch/sandbox/dts/test.dts	/^	spmi: spmi@0 {$/;"	l
spmi_core	drivers/spmi/spmi-msm.c	/^	phys_addr_t spmi_core; \/* SPMI core *\/$/;"	m	struct:msm_spmi_priv	typeref:typename:phys_addr_t	file:
spmi_gpios	arch/sandbox/dts/sandbox.dts	/^			spmi_gpios: gpios@c000 {$/;"	l	label:spmi
spmi_gpios	arch/sandbox/dts/test.dts	/^			spmi_gpios: gpios@c000 {$/;"	l	label:spmi
spmi_obs	drivers/spmi/spmi-msm.c	/^	phys_addr_t spmi_obs; \/* SPMI observer *\/$/;"	m	struct:msm_spmi_priv	typeref:typename:phys_addr_t	file:
spmi_reg_read	drivers/spmi/spmi-uclass.c	/^int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)$/;"	f	typeref:typename:int
spmi_reg_write	drivers/spmi/spmi-uclass.c	/^int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,$/;"	f	typeref:typename:int
spmode	arch/powerpc/include/asm/immap_85xx.h	/^	u16	spmode;$/;"	m	struct:ccsr_cpm_spi	typeref:typename:u16
spmode	include/linux/immap_qe.h	/^	u32 spmode;		\/* SPI mode register *\/$/;"	m	struct:spi	typeref:typename:u32
spmr	arch/powerpc/include/asm/immap_512x.h	/^	u32 spmr;		\/* System PLL Mode Register *\/$/;"	m	struct:clk512x	typeref:typename:u32
spmr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 spmr;		\/* system PLL mode Register *\/$/;"	m	struct:clk83xx	typeref:typename:u32
spnd	drivers/spi/sh_qspi.c	/^	unsigned char spnd;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spndst	drivers/spi/fsl_qspi.h	/^	u32 spndst;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sppcr	drivers/spi/sh_qspi.c	/^	unsigned char sppcr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
sppin	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	sppin;$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8
sppre	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	sppre;$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8
spr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^	uint32_t	spr;$/;"	m	struct:pxa_uart_regs	typeref:typename:uint32_t
spr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $spr   = $mbar - 1 + 0x006$/;"	t
spr_info	include/bedbug/regs.h	/^struct spr_info {$/;"	s
spr_map	include/bedbug/tables.h	/^struct spr_info spr_map[] = {$/;"	v	typeref:struct:spr_info[]
spr_name	common/bedbug.c	/^char *spr_name (int value)$/;"	f	typeref:typename:char *
spr_name	include/bedbug/regs.h	/^  char spr_name[ 10 ];$/;"	m	struct:spr_info	typeref:typename:char[10]
spr_post_test	post/cpu/mpc8xx/spr.c	/^int spr_post_test (int flags)$/;"	f	typeref:typename:int
spr_post_test	post/cpu/ppc4xx/spr.c	/^int spr_post_test (int flags)$/;"	f	typeref:typename:int
spr_test_list	post/cpu/mpc8xx/spr.c	/^} spr_test_list [] = {$/;"	v	typeref:struct:__anonf88dfa8e0108[]
spr_test_list	post/cpu/ppc4xx/spr.c	/^} spr_test_list [] = {$/;"	v	typeref:struct:__anonb9764ead0108[]
spr_test_list_size	post/cpu/mpc8xx/spr.c	/^static int spr_test_list_size = ARRAY_SIZE(spr_test_list);$/;"	v	typeref:typename:int	file:
spr_test_list_size	post/cpu/ppc4xx/spr.c	/^static int spr_test_list_size = ARRAY_SIZE(spr_test_list);$/;"	v	typeref:typename:int	file:
spr_val	include/bedbug/regs.h	/^  int  spr_val;$/;"	m	struct:spr_info	typeref:typename:int
spr_value	common/bedbug.c	/^int spr_value (char *name)$/;"	f	typeref:typename:int
sprdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	sprdat;$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8
spread	include/nand.h	/^	int spread;$/;"	m	struct:nand_erase_options	typeref:typename:int
spread_partition	cmd/mtdparts.c	/^static void spread_partition(struct mtd_info *mtd, struct part_info *part,$/;"	f	typeref:typename:void	file:
spread_partitions	cmd/mtdparts.c	/^static int spread_partitions(void)$/;"	f	typeref:typename:int	file:
spridr	arch/powerpc/include/asm/immap_512x.h	/^	u32 spridr;		\/* System Part and Revision ID Register *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
spridr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 spridr;		\/* System Part and Revision ID Register *\/$/;"	m	struct:sysconf83xx	typeref:typename:u32
sprintf	lib/tiny-printf.c	/^int sprintf(char *buf, const char *fmt, ...)$/;"	f	typeref:typename:int
sprintf	lib/vsprintf.c	/^int sprintf(char *buf, const char *fmt, ...)$/;"	f	typeref:typename:int
sprite	include/linux/fb.h	/^	struct fb_pixmap sprite;	\/* Cursor hardware mapper *\/$/;"	m	struct:fb_info	typeref:struct:fb_pixmap
spscr	drivers/spi/sh_qspi.c	/^	unsigned char spscr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spselr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 spselr[3];	\/* 0x2c0 ~ 0x2c8: Security Peripheral Select Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[3]
spsr	drivers/spi/sh_qspi.c	/^	unsigned char spsr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spssr	drivers/spi/sh_qspi.c	/^	unsigned char spssr;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
spsta	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	spsta;$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8
sptdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	sptdat;$/;"	m	struct:s3c24x0_spi_channel	typeref:typename:u8
sptrclr	drivers/spi/fsl_qspi.h	/^	u32 sptrclr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
spuackcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 spuackcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
spuckcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 spuckcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
spurious_irq	arch/sparc/cpu/leon2/interrupts.c	/^static int spurious_irq = 0;$/;"	v	typeref:typename:int	file:
spurious_irq	arch/sparc/cpu/leon3/interrupts.c	/^static int spurious_irq = 0;$/;"	v	typeref:typename:int	file:
spurious_irq	arch/x86/lib/interrupts.c	/^static int spurious_irq;$/;"	v	typeref:typename:int	file:
spurious_irq_cnt	arch/sparc/cpu/leon2/interrupts.c	/^static int spurious_irq_cnt = 0;$/;"	v	typeref:typename:int	file:
spurious_irq_cnt	arch/sparc/cpu/leon3/interrupts.c	/^static int spurious_irq_cnt = 0;$/;"	v	typeref:typename:int	file:
spurious_irq_cnt	arch/x86/lib/interrupts.c	/^static int spurious_irq_cnt;$/;"	v	typeref:typename:int	file:
spuvckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 spuvckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
sqee	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sqee;$/;"	m	struct:at91_emac	typeref:typename:u32
sqnum	drivers/mtd/ubi/ubi-media.h	/^	__be64  sqnum;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be64
sqnum	drivers/mtd/ubi/ubi-media.h	/^	__be64 sqnum;$/;"	m	struct:ubi_fm_sb	typeref:typename:__be64
sqnum	drivers/mtd/ubi/ubi.h	/^	unsigned long long sqnum;$/;"	m	struct:ubi_ainf_peb	typeref:typename:unsigned long long
sqnum	fs/ubifs/replay.c	/^	unsigned long long sqnum;$/;"	m	struct:bud_entry	typeref:typename:unsigned long long	file:
sqnum	fs/ubifs/replay.c	/^	unsigned long long sqnum;$/;"	m	struct:replay_entry	typeref:typename:unsigned long long	file:
sqnum	fs/ubifs/ubifs-media.h	/^	__le64 sqnum;$/;"	m	struct:ubifs_ch	typeref:typename:__le64
sqnum	fs/ubifs/ubifs.h	/^	unsigned long long sqnum;$/;"	m	struct:ubifs_scan_node	typeref:typename:unsigned long long
sqptr	drivers/qe/uec.h	/^	u32  sqptr;$/;"	m	struct:uec_tx_global_pram	typeref:typename:u32
sqqd	drivers/qe/uec.h	/^	uec_send_queue_qd_t   sqqd[MAX_TX_QUEUES];$/;"	m	struct:uec_send_queue_mem_region	typeref:typename:uec_send_queue_qd_t[]
sr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sr;	\/* Status Register *\/$/;"	m	struct:pwm_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 sr;	\/* Status register *\/$/;"	m	struct:epit_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	sr;$/;"	m	struct:pwm_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 sr;$/;"	m	struct:wdog_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 sr;$/;"	m	struct:stm32_flash_bank_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 sr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 sr;$/;"	m	struct:gpt_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-stv0991/stv0991_gpt.h	/^	u32 sr;		\/* status reg *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
sr	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^		u32 sr;              \/* impedance control status register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
sr	arch/arm/include/asm/arch/dram_sun9i.h	/^		u32 sr;              \/* impedance control status register *\/$/;"	m	struct:sunxi_mctl_phy_reg::ddrphy_zq	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	sr;	\/* Status Register RO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 sr;$/;"	m	struct:at91_emac	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_pit.h	/^	u32	sr;	\/* 0x04 Status Register *\/$/;"	m	struct:at91_pit	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	sr;		\/* 0x68 Status Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_rstc.h	/^	u32	sr;	\/* Reset Controller Status Register *\/$/;"	m	struct:at91_rstc	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_rtt.h	/^	u32	sr;	\/* Status Register RO 0x00000000 *\/$/;"	m	struct:at91_rtt	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		sr;		\/* 0x10 Status Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	sr;$/;"	m	struct:at91_st	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_tc.h	/^	u32		sr;	\/* 0x20 Status Register *\/$/;"	m	struct:at91_tcc	typeref:typename:u32
sr	arch/arm/mach-at91/include/mach/at91_wdt.h	/^	u32	sr;$/;"	m	struct:at91_wdt	typeref:typename:u32
sr	arch/arm/mach-stm32/stm32f1/timer.c	/^	u32 sr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
sr	arch/arm/mach-stm32/stm32f4/timer.c	/^	u32 sr;$/;"	m	struct:stm32_tim2_5	typeref:typename:u32	file:
sr	arch/avr32/include/asm/ptrace.h	/^	unsigned long sr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
sr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 sr;		\/* 0x2C *\/$/;"	m	struct:dspi	typeref:typename:u32
sr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 sr;			\/* 0x04 LCD Size Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
sr	arch/m68k/include/asm/coldfire/mdha.h	/^	u32 sr;			\/* 0x0C Status *\/$/;"	m	struct:mdha_ctrl	typeref:typename:u32
sr	arch/m68k/include/asm/coldfire/rng.h	/^	u32 sr;			\/* 0x04 Status *\/$/;"	m	struct:rng_ctrl	typeref:typename:u32
sr	arch/m68k/include/asm/coldfire/skha.h	/^	u32 sr;			\/* 0x0C Status *\/$/;"	m	struct:skha_ctrl	typeref:typename:u32
sr	arch/m68k/include/asm/fsl_i2c.h	/^	u8 sr;		\/* I2C status register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
sr	arch/m68k/include/asm/immap_520x.h	/^	u16 sr;			\/* 0x06 Service *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
sr	arch/m68k/include/asm/immap_5235.h	/^	u16 sr;			\/* 0x06 Service register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
sr	arch/m68k/include/asm/immap_5329.h	/^	u16 sr;			\/* 0x06 Service register *\/$/;"	m	struct:wdog_ctrl	typeref:typename:u16
sr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 sr;			\/* 0x0C *\/$/;"	m	struct:slt	typeref:typename:u32
sr	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 sr;			\/* 0x248 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
sr	arch/m68k/include/asm/ptrace.h	/^	unsigned short sr;$/;"	m	struct:pt_regs	typeref:typename:unsigned short
sr	arch/openrisc/include/asm/ptrace.h	/^			long  sr;	\/* Stored in place of r0 *\/$/;"	m	struct:pt_regs::__anoneee9473c010a::__anoneee9473c0208	typeref:typename:long
sr	arch/openrisc/include/asm/ptrace.h	/^	unsigned long sr;$/;"	m	struct:user_regs_struct	typeref:typename:unsigned long
sr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	sr;		\/* DMA status register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
sr	arch/powerpc/include/asm/fsl_i2c.h	/^	u8 sr;		\/* I2C status register *\/$/;"	m	struct:fsl_i2c_base	typeref:typename:u8
sr	arch/sh/include/asm/ptrace.h	/^	unsigned long sr;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
sr	drivers/i2c/at91_i2c.h	/^	u32 sr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
sr	drivers/i2c/fti2c010.h	/^	uint32_t sr;  \/* 0x04: status register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
sr	drivers/i2c/i2c-uniphier-f.c	/^	u32 sr;				\/* status register *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
sr	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 sr;			\/* 0x18 PMECC Status Register *\/$/;"	m	struct:pmecc_regs	typeref:typename:u32
sr	drivers/mtd/stm32_flash.h	/^	u32 sr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
sr	drivers/serial/serial_stm32.c	/^	u32 sr;$/;"	m	struct:stm32_usart	typeref:typename:u32	file:
sr	drivers/serial/serial_stm32x7.h	/^	u32 sr;$/;"	m	struct:stm32_usart	typeref:typename:u32
sr	drivers/spi/fsl_qspi.h	/^	u32 sr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
sr	drivers/spi/lpc32xx_ssp.c	/^	u32 sr;$/;"	m	struct:ssp_regs	typeref:typename:u32	file:
sr	drivers/spi/rk_spi.h	/^	u32 sr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
sr	include/atmel_mci.h	/^	u32	sr;	\/* 0x40 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
sr	include/fsl_dspi.h	/^	u32 sr;		\/* 0x2C *\/$/;"	m	struct:dspi	typeref:typename:u32
sr	include/mpc5xxx.h	/^	volatile u32 sr;		\/* GPT + Timer# * 0x10 + 0x0c *\/$/;"	m	struct:mpc5xxx_gpt	typeref:typename:volatile u32
sr	include/mpc5xxx.h	/^	volatile u8 sr;			\/* SPI + 0x0F05 *\/$/;"	m	struct:mpc5xxx_spi	typeref:typename:volatile u8
sr	include/sja1000.h	/^	u8 sr;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
sr0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sr0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
sr1	drivers/serial/serial_mxc.c	/^	u32 sr1;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
sr1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sr1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
sr2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 sr2;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
sr2	drivers/serial/serial_mxc.c	/^	u32 sr2;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
sr_csr	arch/powerpc/include/asm/immap_512x.h	/^	} sr_csr;$/;"	m	struct:psc512x	typeref:union:psc512x::__anond569131d010a
sr_csr	include/mpc5xxx.h	/^	} sr_csr;$/;"	m	struct:mpc5xxx_psc	typeref:union:mpc5xxx_psc::__anon151a8a6b010a
sr_it	include/fsl_ddr_sdram.h	/^	unsigned int sr_it;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
sr_temp_range	arch/x86/include/asm/arch-quark/mrc.h	/^	uint8_t sr_temp_range;$/;"	m	struct:mrc_params	typeref:typename:uint8_t
sram	arch/arm/dts/at91sam9261.dtsi	/^	sram: sram@00300000 {$/;"	l
sram	arch/arm/dts/at91sam9g45.dtsi	/^	sram: sram@00300000 {$/;"	l
sram	arch/arm/dts/rk3036.dtsi	/^	sram: sram@10080000 {$/;"	l
sram	drivers/net/mvpp2.c	/^	union mvpp2_prs_sram_entry sram;$/;"	m	struct:mvpp2_prs_entry	typeref:union:mvpp2_prs_sram_entry	file:
sram0	arch/arm/dts/at91sam9260.dtsi	/^	sram0: sram@002ff000 {$/;"	l
sram0	arch/arm/dts/at91sam9263.dtsi	/^	sram0: sram@00300000 {$/;"	l
sram0	arch/arm/dts/at91sam9g20.dtsi	/^	sram0: sram@002ff000 {$/;"	l
sram1	arch/arm/dts/at91sam9263.dtsi	/^	sram1: sram@00500000 {$/;"	l
sram1	arch/arm/dts/at91sam9g20.dtsi	/^	sram1: sram@002fc000 {$/;"	l
sram_a	arch/arm/dts/sun4i-a10.dtsi	/^			sram_a: sram@00000000 {$/;"	l
sram_a	arch/arm/dts/sun5i.dtsi	/^			sram_a: sram@00000000 {$/;"	l
sram_a	arch/arm/dts/sun7i-a20.dtsi	/^			sram_a: sram@00000000 {$/;"	l
sram_d	arch/arm/dts/sun4i-a10.dtsi	/^			sram_d: sram@00010000 {$/;"	l
sram_d	arch/arm/dts/sun5i.dtsi	/^			sram_d: sram@00010000 {$/;"	l
sram_d	arch/arm/dts/sun7i-a20.dtsi	/^			sram_d: sram@00010000 {$/;"	l
sram_size	drivers/spi/cadence_qspi.h	/^	u32		sram_size;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
sram_state	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t sram_state;$/;"	m	struct:mrq_pg_read_state_response	typeref:typename:uint32_t
sram_state	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t sram_state;$/;"	m	struct:mrq_pg_update_state_request	typeref:typename:uint32_t
sram_write	drivers/usb/eth/r8152.c	/^void sram_write(struct r8152 *tp, u16 addr, u16 data)$/;"	f	typeref:typename:void
srambar	arch/powerpc/include/asm/immap_512x.h	/^	u32 srambar;		\/* SRAM Base Address *\/$/;"	m	struct:sysconf512x	typeref:typename:u32
srand	drivers/crypto/ace_sha.c	/^void srand(unsigned int seed)$/;"	f	typeref:typename:void
srand	lib/rand.c	/^void srand(unsigned int seed)$/;"	f	typeref:typename:void
srand_mac	net/net_rand.h	/^static inline void srand_mac(void)$/;"	f	typeref:typename:void
srb	common/usb_storage.c	/^	ccb		*srb;			\/* current srb *\/$/;"	m	struct:us_data	typeref:typename:ccb *	file:
srbr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int srbr[(0x70 - 0x30) \/ 4];$/;"	m	struct:rk_uart	typeref:typename:unsigned int[]
src	Makefile	/^src		:= $(srctree)$/;"	m
src	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct clk_src *src;$/;"	m	struct:clk	typeref:struct:clk_src *
src	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct clk_src *src;$/;"	m	struct:clk	typeref:struct:clk_src *
src	arch/arm/cpu/armv7/mx6/mp.c	/^static struct src *src = (struct src *)SRC_BASE_ADDR;$/;"	v	typeref:struct:src *	file:
src	arch/arm/dts/imx6qdl.dtsi	/^			src: src@020d8000 {$/;"	l
src	arch/arm/dts/imx6ull.dtsi	/^			src: src@020d8000 {$/;"	l
src	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct src {$/;"	s
src	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct src {$/;"	s
src	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct src {$/;"	s
src	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^struct src {$/;"	s
src	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct src {$/;"	s
src	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 src;$/;"	m	struct:edma3_slot_config	typeref:typename:u32
src	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 src;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
src	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	src;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
src	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	u32	src;$/;"	m	struct:socfpga_freeze_controller	typeref:typename:u32
src	drivers/sound/wm8994.c	/^	int src;	\/* Source *\/$/;"	m	struct:wm8994_fll_config	typeref:typename:int	file:
src	include/mmc.h	/^		const char *src; \/* src buffers don't get written to *\/$/;"	m	union:mmc_data::__anona5bcc78b010a	typeref:typename:const char *
src0	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src0;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
src0	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src0;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
src1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src1;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
src1	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src1;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
src2	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src2;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
src2	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src2;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
src3	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src3;$/;"	m	struct:s5pc100_clock	typeref:typename:unsigned int
src3	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	src3;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
srcAddr	include/MCD_dma.h	/^	s8 *srcAddr;$/;"	m	struct:MCD_bufDesc_struct	typeref:typename:s8 *
src_addr	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^	u32 src_addr;		\/* 0x04 Source address *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
src_addr	arch/arm/include/asm/arch/dma_sun4i.h	/^	u32 src_addr;		\/* 0x04 Source address *\/$/;"	m	struct:sunxi_dma_cfg	typeref:typename:u32
src_addr	drivers/dma/lpc32xx_dma.c	/^	u32 src_addr;$/;"	m	struct:dmac_chan_reg	typeref:typename:u32	file:
src_addr	include/fsl_validate.h	/^	u32 src_addr;		\/* ptr to the data segment *\/$/;"	m	struct:fsl_secboot_sg_table	typeref:typename:u32
src_addr	include/fsl_validate.h	/^	u32 src_addr;$/;"	m	struct:fsl_secboot_sg_table	typeref:typename:u32
src_addr0	drivers/ddr/marvell/axp/xor.h	/^	u32 src_addr0;		\/* Mode: Source Block address pointer *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
src_addr1	drivers/ddr/marvell/axp/xor.h	/^	u32 src_addr1;		\/* Mode: Source Block address pointer *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
src_bidx	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int src_bidx;$/;"	m	struct:edma3_slot_config	typeref:typename:int
src_bit	arch/arm/mach-exynos/clock.c	/^	int8_t src_bit;$/;"	m	struct:clk_bit_info	typeref:typename:int8_t	file:
src_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cam;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cam;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_cam1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cam1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cdrex;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_cdrex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cdrex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_cidx	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int src_cidx;$/;"	m	struct:edma3_slot_config	typeref:typename:int
src_core0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_core0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_core1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_core1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_cperi0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cperi0;		\/* 0x10014200 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_cperi1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cperi1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cpu;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cpu;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cpu;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_cpu	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_cpu;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_dev	include/display.h	/^	struct udevice *src_dev;$/;"	m	struct:display_plat	typeref:struct:udevice *
src_disp10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_disp10;		\/* 0x1002022c *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_disp1_0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_disp1_0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_dmc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_dmc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_dst_bidx	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 src_dst_bidx;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
src_dst_cidx	arch/arm/include/asm/ti-common/ti-edma3.h	/^	u32 src_dst_cidx;$/;"	m	struct:edma3_slot_layout	typeref:typename:u32
src_file	include/qfw.h	/^			char src_file[BIOS_LINKER_LOADER_FILESZ];$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0508	typeref:typename:char[]
src_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_fsys;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_fsys;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_fsys;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_fsys;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_g3d;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_g3d	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_g3d;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_gen;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_gscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_gscl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_image	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_image;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_isp;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_isp;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_kfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_kfc;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_lcd	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_lcd;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_lcd0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_lcd0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_lcd1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_lcd1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_leftbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_leftbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_leftbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_lex	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_lex;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask	arch/arm/mach-exynos/clock.c	/^	int32_t src_mask;$/;"	m	struct:clk_bit_info	typeref:typename:int32_t	file:
src_mask_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_cam;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_cam	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_cam;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_core	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_core;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_cperi	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_cperi;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_disp10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_disp10;	\/* 0x1002032c *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_disp1_0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_disp1_0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_dmc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_dmc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_dmc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_fsys;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_fsys;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_fsys;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_fsys	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_fsys;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_gen	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_gen;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_gscl	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_gscl;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_isp;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_isp;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_isp	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_isp;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_lcd	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_lcd;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_lcd0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_lcd0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_lcd1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_lcd1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_mau;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_mau;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_maudio;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_maudio;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peric0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peric0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peric1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peric1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peril0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peril0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peril1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_peril1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mask_top	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_mask_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_top7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_top7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mask_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_tv;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mask_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mask_tv;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mau;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_mau	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mau;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_maudio;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_maudio	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_maudio;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mfc;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_mfc	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_mfc;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_mux	arch/arm/include/asm/arch-mx7/clock.h	/^	uint8_t src_mux[8];$/;"	m	struct:clk_root_map	typeref:typename:uint8_t[8]
src_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peric0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_peric0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peric0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peric1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_peric1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peric1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peril0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_peril0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peril0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peril1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_peril1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_peril1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_rate	drivers/sound/wm8994.c	/^static unsigned int src_rate[] = {$/;"	v	typeref:typename:unsigned int[]	file:
src_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_rightbus;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_rightbus	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_rightbus;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_size_g_alpha	drivers/video/fsl_diu_fb.c	/^	__le32 src_size_g_alpha;$/;"	m	struct:diu_ad	typeref:typename:__le32	file:
src_ssync_features	include/linux/mtd/nand.h	/^	u8 src_ssync_features;$/;"	m	struct:nand_onfi_params	typeref:typename:u8
src_supported	arch/arm/cpu/armv7/mx7/clock_slice.c	/^static int src_supported(int entry, enum clk_root_src clock_src)$/;"	f	typeref:typename:int	file:
src_sync_timing_mode	include/linux/mtd/nand.h	/^	__le16 src_sync_timing_mode;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
src_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top0;		\/* 0x10020200 *\/$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_top0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
src_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_top10	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top10;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top11	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top11;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top12	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top12;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top2;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_top3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top3;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top3	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top3;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
src_top4	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top4;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top5	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top5;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top6	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top6;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_top7	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_top7;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
src_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_tv;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
src_tv	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	src_tv;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
srcaddr	tools/kwbimage.h	/^	uint32_t srcaddr;		\/*12-15 *\/$/;"	m	struct:main_hdr_v0	typeref:typename:uint32_t
srcaddr	tools/kwbimage.h	/^	uint32_t srcaddr;               \/* C-F *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint32_t
srcidr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srcidr;		\/* Source ID Register *\/$/;"	m	struct:ccsr_bman	typeref:typename:u32
srcidr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srcidr;		\/* Source ID Register *\/$/;"	m	struct:ccsr_pme	typeref:typename:u32
srcidr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srcidr;		\/* Source ID Register *\/$/;"	m	struct:ccsr_qman	typeref:typename:u32
srcomp_enable	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void __weak srcomp_enable(void)$/;"	f	typeref:typename:void __weak
srcomp_enable	arch/arm/cpu/armv7/omap5/hwinit.c	/^void srcomp_enable(void)$/;"	f	typeref:typename:void
srcomp_parameters	arch/arm/cpu/armv7/omap5/hwinit.c	/^static const struct srcomp_params srcomp_parameters[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct srcomp_params[]	file:
srcomp_params	arch/arm/include/asm/arch-omap5/omap.h	/^struct srcomp_params {$/;"	s
srcpnd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	srcpnd;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
srcr0	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 srcr0;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
srcr0	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 srcr0;$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
srcr1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 srcr1;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
srcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 srcr1;$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
srcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 srcr2;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
srcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 srcr2;$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
srcr3	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 srcr3;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
srcr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 srcr3;$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
srcr4	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 srcr4;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
srcr4	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 srcr4;$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
srcr5	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 srcr5;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
srcr5	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 srcr5;$/;"	m	struct:sh73a0_sbsc_cpg_srcr	typeref:typename:u32
srcr_cani2c	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_cani2c;		\/* 0x69 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_dspi	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_dspi;		\/* 0x6C *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_dspiow	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_dspiow;		\/* 0x68 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_fb1	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_fb1;		\/* 0x64 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_fb2	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_fb2;		\/* 0x65 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_fb3	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_fb3;		\/* 0x66 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_fb4	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_fb4;		\/* 0x67 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_fec	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_fec;		\/* 0x6D *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_i2c	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_i2c;		\/* 0x6E *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_irq	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_irq;		\/* 0x6F *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_irq	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_irq;		\/* 0x6A *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_sdhc	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_sdhc;		\/* 0x74 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_sdhc	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_sdhc;		\/* 0x6E *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_sim	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_sim;		\/* 0x70 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_simp0	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_simp0;		\/* 0x6F *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_ssi	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_ssi;		\/* 0x75 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_ssi0	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_ssi0;		\/* 0x70 *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_timer	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_timer;		\/* 0x71 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_timer	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_timer;		\/* 0x6B *\/$/;"	m	struct:gpio	typeref:typename:u8
srcr_uart	arch/m68k/include/asm/immap_5301x.h	/^	u8 srcr_uart;		\/* 0x72 *\/$/;"	m	struct:gpio_ctrl	typeref:typename:u8
srcr_uart	arch/m68k/include/asm/immap_5441x.h	/^	u8 srcr_uart;		\/* 0x6C *\/$/;"	m	struct:gpio	typeref:typename:u8
srctran	drivers/block/sata_dwc.c	/^	struct dmareg srctran;$/;"	m	struct:dma_interrupt_regs	typeref:struct:dmareg	file:
srctree	Makefile	/^                srctree := $(KBUILD_SRC)$/;"	m
srctree	Makefile	/^                srctree := ..$/;"	m
srctree	Makefile	/^        srctree := .$/;"	m
srctree	scripts/docproc.c	/^static char *srctree, *kernsrctree;$/;"	v	typeref:typename:char *	file:
srdata	include/asm-generic/global_data.h	/^	void *srdata[10];$/;"	m	struct:global_data	typeref:typename:void * [10]
srdc	drivers/spi/ich.h	/^	uint32_t srdc;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
srdl	drivers/spi/ich.h	/^	uint32_t srdl;		\/* 0xf0 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
srds	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^enum srds {$/;"	g
srds	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^enum srds {$/;"	g
srds	arch/powerpc/include/asm/fsl_serdes.h	/^enum srds {$/;"	g
srds1cr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	srds1cr0;	\/* 0xe0f04 - SerDes1 control register 0 *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
srds1cr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	srds1cr1;	\/* 0xe0f08 - SerDes1 control register 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
srds2cr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	srds2cr0;	\/* 0xe0f40 - SerDes2 control register 0 *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
srds2cr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint	srds2cr1;	\/* 0xe0f44 - SerDes2 control register 1 *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
srds_bank	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h	/^enum srds_bank {$/;"	g
srds_lpd_b	arch/powerpc/cpu/mpc85xx/p4080_serdes.c	/^uint16_t srds_lpd_b[SRDS_MAX_BANK];$/;"	v	typeref:typename:uint16_t[]
srds_prtcl	arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h	/^enum srds_prtcl {$/;"	g
srds_prtcl	arch/arm/include/asm/arch-ls102xa/fsl_serdes.h	/^enum srds_prtcl {$/;"	g
srds_prtcl	arch/powerpc/include/asm/fsl_serdes.h	/^enum srds_prtcl {$/;"	g
srds_table	board/freescale/common/fman.c	/^	static const enum srds_prtcl srds_table[] = {$/;"	g	function:serdes_device_from_fm_port	file:
srdscr0	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^	u32	srdscr0;	\/* 0x00 - SRDS Control Register 0 *\/$/;"	m	struct:serdes_85xx	typeref:typename:u32	file:
srdscr0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 srdscr0;$/;"	m	struct:serdes83xx	typeref:typename:u32
srdscr1	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^	u32	srdscr1;	\/* 0x04 - SRDS Control Register 1 *\/$/;"	m	struct:serdes_85xx	typeref:typename:u32	file:
srdscr1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 srdscr1;$/;"	m	struct:serdes83xx	typeref:typename:u32
srdscr2	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^	u32	srdscr2;	\/* 0x08 - SRDS Control Register 2 *\/$/;"	m	struct:serdes_85xx	typeref:typename:u32	file:
srdscr2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 srdscr2;$/;"	m	struct:serdes83xx	typeref:typename:u32
srdscr3	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^	u32	srdscr3;	\/* 0x0C - SRDS Control Register 3 *\/$/;"	m	struct:serdes_85xx	typeref:typename:u32	file:
srdscr3	arch/powerpc/include/asm/immap_83xx.h	/^	u32 srdscr3;$/;"	m	struct:serdes83xx	typeref:typename:u32
srdscr4	arch/powerpc/cpu/mpc85xx/p1021_serdes.c	/^	u32	srdscr4;	\/* 0x10 - SRDS Control Register 4 *\/$/;"	m	struct:serdes_85xx	typeref:typename:u32	file:
srdscr4	arch/powerpc/include/asm/immap_83xx.h	/^	u32 srdscr4;$/;"	m	struct:serdes83xx	typeref:typename:u32
srdsgr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdsgr0;	\/* 0xb0 General Register 0 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdsgr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdsgr0;	\/* 0xb0 General Register 0 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdsgr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdsgr0;	\/* 0xb0 General Register 0 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdsgr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdsgr0;	\/* General Register 0 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdslnpssr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} srdslnpssr[4];$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon58ea331d0508[4]
srdslnpssr	arch/powerpc/include/asm/immap_85xx.h	/^	} srdslnpssr[8];$/;"	m	struct:serdes_corenet	typeref:struct:serdes_corenet::__anondcd7518a0708[8]
srdspccr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr0;	\/* 0x200 Protocol Configuration 0 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspccr0;	\/* 0xe0 Protocol Converter Config 0 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr0;	\/* 0xe0 Protocol Converter Config 0 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr0;	\/* Protocol Converter Config 0 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr1;	\/* 0x204 Protocol Configuration 1 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspccr1;	\/* 0xe4 Protocol Converter Config 1 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr1;	\/* 0xe4 Protocol Converter Config 1 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr1	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr1;	\/* Protocol Converter Config 1 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr2;	\/* 0x208 Protocol Configuration 2 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr2	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspccr2;	\/* 0xe8 Protocol Converter Config 2 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr2;	\/* 0xe8 Protocol Converter Config 2 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr2	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr2;	\/* Protocol Converter Config 2 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr3;	\/* 0x20c Protocol Configuration 3 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspccr3;	\/* 0xec Protocol Converter Config 3 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr3	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr3;	\/* 0xec Protocol Converter Config 3 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr4	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr4;	\/* 0x210 Protocol Configuration 4 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr4	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspccr4;	\/* 0xf0 Protocol Converter Config 4 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr4	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdspccr4;	\/* 0xf0 Protocol Converter Config 4 *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdspccr5	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr5;	\/* 0x214 Protocol Configuration 5 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr6	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr6;	\/* 0x218 Protocol Configuration 6 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr7	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr7;	\/* 0x21c Protocol Configuration 7 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr8	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr8;	\/* 0x220 Protocol Configuration 8 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccr9	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccr9;	\/* 0x224 Protocol Configuration 9 *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccra	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccra;	\/* 0x228 Protocol Configuration A *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspccrb	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdspccrb;	\/* 0x22c Protocol Configuration B *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspexapcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspexapcr;$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspexbpcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspexbpcr;$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspexcr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdspexcr0;	\/* 0x1000, 0x1040, 0x1080 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0708	typeref:typename:u32
srdspexeqcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspexeqcr;$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdspexeqpcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdspexeqpcr[11];$/;"	m	struct:ccsr_serdes	typeref:typename:u32[11]
srdsqsgmiicr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdsqsgmiicr1;	\/* 0x1884 QSGMII Protocol Control 1 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0908	typeref:typename:u32
srdsqsgmiicr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdsqsgmiicr3;	\/* 0x188c QSGMII Protocol Control 3 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0908	typeref:typename:u32
srdsrcalcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdsrcalcr;	\/* 0xa0 RX Calibration Control *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdsrcalcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdsrcalcr;	\/* 0xa0 RX Calibration Control *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdsrcalcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdsrcalcr;	\/* 0xa0 RX Calibration Control *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdsrcalcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdsrcalcr;	\/* RX Calibration Control *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdsrstctl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 srdsrstctl;$/;"	m	struct:serdes83xx	typeref:typename:u32
srdssgmiicr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdssgmiicr1;	\/* 0x1804 SGMII Protocol Control 1 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0808	typeref:typename:u32
srdssgmiicr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdssgmiicr3;	\/* 0x180c SGMII Protocol Control 3 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0808	typeref:typename:u32
srdstcalcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32	srdstcalcr;	\/* 0x90 TX Calibration Control *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdstcalcr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32	srdstcalcr;	\/* 0x90 TX Calibration Control *\/$/;"	m	struct:ccsr_serdes	typeref:typename:u32
srdstcalcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdstcalcr;	\/* 0x90 TX Calibration Control *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdstcalcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	srdstcalcr;	\/* TX Calibration Control *\/$/;"	m	struct:serdes_corenet	typeref:typename:u32
srdsxficr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdsxficr1;	\/* 0x1984 XFI Protocol Control 1 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0a08	typeref:typename:u32
srdsxficr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	srdsxficr3;	\/* 0x198c XFI Protocol Control 3 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0a08	typeref:typename:u32
srec_decode	common/s_record.c	/^int srec_decode (char *input, int *count, ulong *addr, char *data)$/;"	f	typeref:typename:int
sreset	include/mpc5xxx.h	/^	volatile u32	sreset;		\/* 0x0020 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
srev	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u8 srev;$/;"	m	struct:mx3_cpu_type	typeref:typename:u8
srev	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	srev;$/;"	m	struct:iim_regs	typeref:typename:u32
srev	drivers/misc/fsl_iim.c	/^	u32 srev;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
sri2c_init	arch/arm/cpu/armv7/omap-common/vc.c	/^void sri2c_init(void)$/;"	f	typeref:typename:void
srio_boot_master	arch/powerpc/cpu/mpc8xxx/srio.c	/^void srio_boot_master(int port)$/;"	f	typeref:typename:void
srio_boot_master_release_slave	arch/powerpc/cpu/mpc8xxx/srio.c	/^void srio_boot_master_release_slave(int port)$/;"	f	typeref:typename:void
srio_erratum_a004034	arch/powerpc/cpu/mpc8xxx/srio.c	/^static int srio_erratum_a004034(u8 port)$/;"	f	typeref:typename:int	file:
srio_init	arch/powerpc/cpu/mpc8xxx/srio.c	/^void srio_init(void)$/;"	f	typeref:typename:void
srio_liodn_id_table	arch/powerpc/include/asm/fsl_liodn.h	/^struct srio_liodn_id_table {$/;"	s
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^struct srio_liodn_id_table srio_liodn_tbl[] = {$/;"	v	typeref:struct:srio_liodn_id_table[]
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/b4860_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p2041_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p3041_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p4080_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/p5020_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t2080_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
srio_liodn_tbl_sz	arch/powerpc/cpu/mpc85xx/t4240_ids.c	/^int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);$/;"	v	typeref:typename:int
sriopstecr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	sriopstecr;	\/* SRIO prescaler timer enable control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
srk_hash	include/fsl_sfp.h	/^	u32 srk_hash[8];	\/* 0x254 Super Root Key Hash *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[8]
srk_hash	include/fsl_sfp.h	/^	u32 srk_hash[8];	\/* 0x7c  Super Root Key Hash *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[8]
srk_hash	include/fsl_sfp.h	/^	u32 srk_hash[NUM_SRKH_REGS];	\/* 0x23c Super Root Key Hash *\/$/;"	m	struct:ccsr_sfp_regs	typeref:typename:u32[]
srk_in32	include/fsl_sfp.h	/^#define srk_in32(/;"	d
srk_sel	include/fsl_validate.h	/^			u32 srk_sel:8;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c030a::__anon4913065c0408	typeref:typename:u32:8
srk_sel	include/fsl_validate.h	/^		u8 srk_sel;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c0108	typeref:typename:u8
srk_table	include/fsl_validate.h	/^struct srk_table {$/;"	s
srk_table_flag	include/fsl_validate.h	/^			u32 srk_table_flag:8;$/;"	m	struct:fsl_secboot_img_hdr::__anon4913065c030a::__anon4913065c0408	typeref:typename:u32:8
srk_tbl	include/fsl_validate.h	/^	struct srk_table srk_tbl[MAX_KEY_ENTRIES];$/;"	m	struct:fsl_secboot_img_priv	typeref:struct:srk_table[]
srk_tbl_off	include/fsl_validate.h	/^		u32 srk_tbl_off;$/;"	m	union:fsl_secboot_img_hdr::__anon4913065c020a	typeref:typename:u32
srk_tbl_off	include/fsl_validate.h	/^	u32 srk_tbl_off;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
srm_pri1	drivers/video/ipu_regs.h	/^	u32 srm_pri1;$/;"	m	struct:ipu_cm	typeref:typename:u32
srm_pri2	drivers/video/ipu_regs.h	/^	u32 srm_pri2;$/;"	m	struct:ipu_cm	typeref:typename:u32
srm_stat	drivers/video/ipu_regs.h	/^	u32 srm_stat;$/;"	m	struct:ipu_stat	typeref:typename:u32
srmmu_flush_tlb_ctx	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_flush_tlb_ctx(void)$/;"	f	typeref:typename:void
srmmu_flush_tlb_page	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_flush_tlb_page(unsigned long page)$/;"	f	typeref:typename:void
srmmu_flush_tlb_region	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_flush_tlb_region(unsigned long addr)$/;"	f	typeref:typename:void
srmmu_flush_tlb_segment	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_flush_tlb_segment(unsigned long addr)$/;"	f	typeref:typename:void
srmmu_flush_whole_tlb	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_flush_whole_tlb(void)$/;"	f	typeref:typename:void
srmmu_get_context	arch/sparc/include/asm/srmmu.h	/^static __inline__ int srmmu_get_context(void)$/;"	f	typeref:typename:int
srmmu_get_ctable_ptr	arch/sparc/include/asm/srmmu.h	/^static __inline__ unsigned long srmmu_get_ctable_ptr(void)$/;"	f	typeref:typename:unsigned long
srmmu_get_faddr	arch/sparc/include/asm/srmmu.h	/^static __inline__ unsigned int srmmu_get_faddr(void)$/;"	f	typeref:typename:unsigned int
srmmu_get_fstatus	arch/sparc/include/asm/srmmu.h	/^static __inline__ unsigned int srmmu_get_fstatus(void)$/;"	f	typeref:typename:unsigned int
srmmu_get_mmureg	arch/sparc/include/asm/srmmu.h	/^static __inline__ unsigned int srmmu_get_mmureg(void)$/;"	f	typeref:typename:unsigned int
srmmu_get_pte	arch/sparc/include/asm/srmmu.h	/^static __inline__ int srmmu_get_pte(unsigned long addr)$/;"	f	typeref:typename:int
srmmu_hwprobe	arch/sparc/include/asm/srmmu.h	/^static __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr)$/;"	f	typeref:typename:unsigned long
srmmu_init_cpu	arch/sparc/cpu/leon2/prom.c	/^void srmmu_init_cpu(unsigned int entry)$/;"	f	typeref:typename:void
srmmu_init_cpu	arch/sparc/cpu/leon3/prom.c	/^void srmmu_init_cpu(unsigned int entry)$/;"	f	typeref:typename:void
srmmu_set_context	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_set_context(int context)$/;"	f	typeref:typename:void
srmmu_set_ctable_ptr	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_set_ctable_ptr(unsigned long paddr)$/;"	f	typeref:typename:void
srmmu_set_mmureg	arch/sparc/include/asm/srmmu.h	/^static __inline__ void srmmu_set_mmureg(unsigned long regval)$/;"	f	typeref:typename:void
srom	drivers/net/dm9000x.c	/^	unsigned char srom[128];$/;"	m	struct:board_info	typeref:typename:unsigned char[128]	file:
srom	drivers/net/uli526x.c	/^	unsigned char srom[128];$/;"	m	struct:uli526x_board_info	typeref:typename:unsigned char[128]	file:
srpfixtime	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	srpfixtime;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
srpfixtime	drivers/usb/musb/am35x.h	/^	u32	srpfixtime;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
srr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int srr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
srr	drivers/spi/xilinx_spi.c	/^	u32 srr;	\/* Softare Reset Register (SRR) *\/$/;"	m	struct:xilinx_spi_regs	typeref:typename:u32	file:
srsr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	srsr;$/;"	m	struct:src	typeref:typename:u32
srsr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	srsr;$/;"	m	struct:src	typeref:typename:u32
srsr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	srsr;$/;"	m	struct:src	typeref:typename:u32
srsr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 srsr;$/;"	m	struct:src	typeref:typename:u32
srt	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int srt;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
srt	arch/arm/mach-keystone/ddr3_spd.c	/^enum srt {$/;"	g	file:
srtc_regs	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct srtc_regs {$/;"	s
srts	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int srts;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
srtsr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 srtsr[16];	\/* 0x280 ~ 0x2bc: Security Region Top Slave *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16]
ss	drivers/bios_emulator/include/biosemu.h	/^	u16 ss;$/;"	m	struct:__anon964d10140808	typeref:typename:u16
ss1	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ss1;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
ss2	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ss2;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
ss3	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ss3;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
ss4	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ss4;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
ss5	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ss5;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
ss6	drivers/pinctrl/pinctrl_pic32.c	/^	u32 ss6;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
ss_clk	arch/arm/dts/sun4i-a10.dtsi	/^		ss_clk: clk@01c2009c {$/;"	l
ss_clk	arch/arm/dts/sun5i.dtsi	/^		ss_clk: clk@01c2009c {$/;"	l
ss_clk	arch/arm/dts/sun6i-a31.dtsi	/^		ss_clk: clk@01c2009c {$/;"	l
ss_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ss_clk: clk@01c2009c {$/;"	l
ss_clk	arch/arm/dts/sun8i-a33.dtsi	/^		ss_clk: clk@01c2009c {$/;"	l
ss_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ss_clk_cfg;		\/* 0x9c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ss_clk_cfg;		\/* 0x9c security system clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ss_clk_cfg;		\/* 0x9c security system clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ss_clk_cfg;		\/* 0x42c security system clock cfg *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ss_clk_cfg;		\/* 0x9c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ss_clk_cfg;		\/* 0x9c security system clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ss_clk_cfg;		\/* 0x9c security system clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ss_clk_cfg;		\/* 0x42c security system clock cfg *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ss_ep_comp_desc	include/usb.h	/^	struct usb_ss_ep_comp_descriptor ss_ep_comp_desc[USB_MAXENDPOINTS];$/;"	m	struct:usb_interface	typeref:struct:usb_ss_ep_comp_descriptor[]
ss_flags	arch/powerpc/include/asm/signal.h	/^	int ss_flags;$/;"	m	struct:sigaltstack	typeref:typename:int
ss_hcnt	drivers/i2c/designware_i2c.c	/^	u32 ss_hcnt;$/;"	m	struct:dw_scl_sda_cfg	typeref:typename:u32	file:
ss_lcnt	drivers/i2c/designware_i2c.c	/^	u32 ss_lcnt;$/;"	m	struct:dw_scl_sda_cfg	typeref:typename:u32	file:
ss_pol	drivers/spi/mxc_spi.c	/^	int		ss_pol;$/;"	m	struct:mxc_spi_slave	typeref:typename:int	file:
ss_size	arch/powerpc/include/asm/signal.h	/^	size_t ss_size;$/;"	m	struct:sigaltstack	typeref:typename:size_t
ss_sp	arch/powerpc/include/asm/signal.h	/^	void *ss_sp;$/;"	m	struct:sigaltstack	typeref:typename:void *
ssar	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 ssar;		\/* 0x00 Screen Start Address Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
ssc	drivers/video/ipu_regs.h	/^	u32 ssc;$/;"	m	struct:ipu_di	typeref:typename:u32
ssc0	arch/arm/dts/at91sam9260-smartweb.dts	/^			ssc0: ssc@fffbc000 {$/;"	l
ssc0	arch/arm/dts/at91sam9260.dtsi	/^			ssc0: ssc@fffbc000 {$/;"	l
ssc0	arch/arm/dts/at91sam9261.dtsi	/^			ssc0: ssc@fffbc000 {$/;"	l
ssc0	arch/arm/dts/at91sam9263.dtsi	/^			ssc0: ssc@fff98000 {$/;"	l
ssc0	arch/arm/dts/at91sam9g20-taurus.dts	/^			ssc0: ssc@fffbc000 {$/;"	l
ssc0	arch/arm/dts/at91sam9g20.dtsi	/^			ssc0: ssc@fffbc000 {$/;"	l
ssc0	arch/arm/dts/at91sam9g45-gurnard.dts	/^			ssc0: ssc@fff9c000 {$/;"	l
ssc0	arch/arm/dts/at91sam9g45.dtsi	/^			ssc0: ssc@fff9c000 {$/;"	l
ssc0_clk	arch/arm/dts/at91sam9260.dtsi	/^					ssc0_clk: ssc0_clk {$/;"	l
ssc0_clk	arch/arm/dts/at91sam9261.dtsi	/^					ssc0_clk: ssc0_clk {$/;"	l
ssc0_clk	arch/arm/dts/at91sam9263.dtsi	/^					ssc0_clk: ssc0_clk {$/;"	l
ssc0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					ssc0_clk: ssc0_clk {$/;"	l
ssc0_clk	arch/arm/dts/sama5d2.dtsi	/^					ssc0_clk: ssc0_clk@43 {$/;"	l
ssc1	arch/arm/dts/at91sam9261.dtsi	/^			ssc1: ssc@fffc0000 {$/;"	l
ssc1	arch/arm/dts/at91sam9263.dtsi	/^			ssc1: ssc@fff9c000 {$/;"	l
ssc1	arch/arm/dts/at91sam9g45.dtsi	/^			ssc1: ssc@fffa0000 {$/;"	l
ssc1_clk	arch/arm/dts/at91sam9261.dtsi	/^					ssc1_clk: ssc1_clk {$/;"	l
ssc1_clk	arch/arm/dts/at91sam9263.dtsi	/^					ssc1_clk: ssc1_clk {$/;"	l
ssc1_clk	arch/arm/dts/at91sam9g45.dtsi	/^					ssc1_clk: ssc1_clk {$/;"	l
ssc1_clk	arch/arm/dts/sama5d2.dtsi	/^					ssc1_clk: ssc1_clk@44 {$/;"	l
ssc2	arch/arm/dts/at91sam9261.dtsi	/^			ssc2: ssc@fffc4000 {$/;"	l
ssc2_clk	arch/arm/dts/at91sam9261.dtsi	/^					ssc2_clk: ssc2_clk {$/;"	l
ssc_reg	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	ssc_reg;$/;"	m	struct:rk3288_edp	typeref:typename:u32
sscdeltamstepdllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int sscdeltamstepdllmpu; \/* off  0x24 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
sscgr	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 sscgr;	\/* RCC spread spectrum clock generation *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
sscgr	arch/arm/include/asm/arch-stm32f7/stm32.h	/^	u32 sscgr;	\/* RCC spread spectrum clock generation *\/$/;"	m	struct:stm32_rcc_regs	typeref:typename:u32
sscmodfreqdivdpllmpu	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int sscmodfreqdivdpllmpu; \/* off 0x28 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
sscr0	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 sscr0;	\/* SSP Control Register 0 - 0x000 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
sscr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	sscr0;$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
sscr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	sscr0;$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
sscr1	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 sscr1;	\/* SSP Control Register 1 - 0x004 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
sscr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	sscr1;$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
sscr1	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	sscr1;$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
ssd2828_color_depth	drivers/video/ssd2828.h	/^	int ssd2828_color_depth;$/;"	m	struct:ssd2828_config	typeref:typename:int
ssd2828_config	drivers/video/ssd2828.h	/^struct ssd2828_config {$/;"	s
ssd2828_configure_video_interface	drivers/video/ssd2828.c	/^static int ssd2828_configure_video_interface(const struct ssd2828_config *cfg,$/;"	f	typeref:typename:int	file:
ssd2828_enable_gpio	drivers/video/ssd2828.c	/^static int ssd2828_enable_gpio(const struct ssd2828_config *cfg)$/;"	f	typeref:typename:int	file:
ssd2828_free_gpio	drivers/video/ssd2828.c	/^static int ssd2828_free_gpio(const struct ssd2828_config *cfg)$/;"	f	typeref:typename:int	file:
ssd2828_init	drivers/video/ssd2828.c	/^int ssd2828_init(const struct ssd2828_config *cfg,$/;"	f	typeref:typename:int
ssd2828_reset	drivers/video/ssd2828.c	/^static void ssd2828_reset(const struct ssd2828_config *cfg)$/;"	f	typeref:typename:void	file:
ssd2828_tx_clk_khz	drivers/video/ssd2828.h	/^	int ssd2828_tx_clk_khz;$/;"	m	struct:ssd2828_config	typeref:typename:int
ssdr	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 ssdr;	\/* SSP Data Register - 0x010 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
ssel	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 ssel;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
sset_mask	include/linux/ethtool.h	/^	__u64	sset_mask;	\/* input: each bit selects an sset to query *\/$/;"	m	struct:ethtool_sset_info	typeref:typename:__u64
ssfc	drivers/spi/ich.h	/^	uint8_t ssfc[3];$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t[3]
ssfs	drivers/spi/ich.h	/^	uint8_t ssfs;		\/* 0x90 *\/$/;"	m	struct:ich9_spi_regs	typeref:typename:uint8_t
ssi	arch/m68k/include/asm/coldfire/ssi.h	/^typedef struct ssi {$/;"	s
ssi1	arch/arm/dts/imx6qdl.dtsi	/^				ssi1: ssi@02028000 {$/;"	l
ssi2	arch/arm/dts/imx6qdl.dtsi	/^				ssi2: ssi@0202c000 {$/;"	l
ssi3	arch/arm/dts/imx6qdl.dtsi	/^				ssi3: ssi@02030000 {$/;"	l
ssi_t	arch/m68k/include/asm/coldfire/ssi.h	/^} ssi_t;$/;"	t	typeref:struct:ssi
ssitr	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 ssitr;	\/* SSP Interrupt Test Register - 0x00C *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
ssize_t	include/linux/types.h	/^typedef __kernel_ssize_t	ssize_t;$/;"	t	typeref:typename:__kernel_ssize_t
ssleep	drivers/block/sata_dwc.c	/^#define ssleep(/;"	d	file:
sslnd	drivers/spi/sh_qspi.c	/^	unsigned char sslnd;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
sslp	drivers/spi/sh_qspi.c	/^	unsigned char sslp;$/;"	m	struct:sh_qspi_regs	typeref:typename:unsigned char	file:
ssp1_clkrst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ssp1_clkrst;		\/* 0x01C *\/$/;"	m	struct:armd1apb2_registers	typeref:typename:u32
ssp2_clkrst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ssp2_clkrst;		\/* 0x020 *\/$/;"	m	struct:armd1apb2_registers	typeref:typename:u32
ssp3_clkrst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ssp3_clkrst;		\/* 0x04C *\/$/;"	m	struct:armd1apb2_registers	typeref:typename:u32
ssp4_clkrst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ssp4_clkrst;		\/* 0x058 *\/$/;"	m	struct:armd1apb2_registers	typeref:typename:u32
ssp5_clkrst	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 ssp5_clkrst;		\/* 0x05C *\/$/;"	m	struct:armd1apb2_registers	typeref:typename:u32
ssp_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 ssp_ctrl;		\/* SSP Control Register			*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
ssp_reg	arch/arm/include/asm/arch-armada100/spi.h	/^struct ssp_reg {$/;"	s
ssp_regs	arch/arm/include/asm/arch-spear/spr_ssp.h	/^struct ssp_regs {$/;"	s
ssp_regs	drivers/spi/lpc32xx_ssp.c	/^struct ssp_regs {$/;"	s	file:
sspcpsr	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspcpsr;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspcpsr	drivers/spi/ep93xx_spi.c	/^	unsigned sspcpsr;$/;"	m	struct:ep93xx_spi_slave	typeref:typename:unsigned	file:
sspcr0	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspcr0;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspcr0	drivers/spi/ep93xx_spi.c	/^	unsigned sspcr0;$/;"	m	struct:ep93xx_spi_slave	typeref:typename:unsigned	file:
sspcr1	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspcr1;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspdmacr	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspdmacr;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspdr	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspdr;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspicr	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspicr;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspimsc	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspimsc;$/;"	m	struct:ssp_regs	typeref:typename:u32
sspsp	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 sspsp;	\/* SSP Programmable Serial Protocol Register - 0x02C *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
sspsr	arch/arm/include/asm/arch-spear/spr_ssp.h	/^	u32 sspsr;$/;"	m	struct:ssp_regs	typeref:typename:u32
ssr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	ssr; 	\/* 0x0C SDRAMC Self Refresh Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
ssr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 ssr[16];	\/* 0x200 ~ 0x23c: Security Slave Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32[16]
ssr	arch/powerpc/include/asm/fsl_dma.h	/^	uint	ssr;		\/* DMA source stride register *\/$/;"	m	struct:fsl_dma	typeref:typename:uint
ssr	include/faraday/ftsmc020.h	/^	unsigned int	ssr;		\/* 0x40 *\/$/;"	m	struct:ftsmc020	typeref:typename:unsigned int
ssr	include/mmc.h	/^	struct sd_ssr	ssr;	\/* SD status register *\/$/;"	m	struct:mmc	typeref:struct:sd_ssr
ssr0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ssr0;	\/* Snooping Status Register 0 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
ssr1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 ssr1;	\/* Snooping Status Register 1 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
ssrsa	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 ssrsa;	\/* SSP RX Timeslot Active Register - 0x034 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
ssrt	arch/m68k/include/asm/coldfire/edma.h	/^	u8 ssrt;		\/* 0x1E Set START Bit *\/$/;"	m	struct:edma_ctrl	typeref:typename:u8
sssr	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 sssr;	\/* SSP Status Register - 0x008 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
sst_byte_write	drivers/mtd/spi/spi_flash.c	/^static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)$/;"	f	typeref:typename:int	file:
sst_params	arch/x86/include/asm/speedstep.h	/^struct sst_params {$/;"	s
sst_state	arch/x86/include/asm/speedstep.h	/^struct sst_state {$/;"	s
sst_table	arch/x86/include/asm/speedstep.h	/^struct sst_table {$/;"	s
sst_write_bp	drivers/mtd/spi/spi_flash.c	/^int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,$/;"	f	typeref:typename:int
sst_write_wp	drivers/mtd/spi/spi_flash.c	/^int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,$/;"	f	typeref:typename:int
sstat	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 sstat;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sstat	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 sstat;		\/* 0x08 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
sstat	drivers/block/sata_dwc.c	/^	struct dmareg sstat;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
sstatar	drivers/block/sata_dwc.c	/^	struct dmareg sstatar;$/;"	m	struct:dma_chan_regs	typeref:struct:dmareg	file:
sstatus	drivers/block/fsl_sata.h	/^	u32 sstatus;		\/* SATA interface status register *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
sstatus	drivers/block/mvsata_ide.c	/^	u32 sstatus;$/;"	m	struct:mvsata_port_registers	typeref:typename:u32	file:
ssto	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 ssto;	\/* SSP Timeout Register - 0x028 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
ssts	drivers/block/dwc_ahsata.c	/^	u32 ssts;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
sstsa	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 sstsa;	\/* SSP TX Timeslot Active Register - 0x030 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
sstss	arch/arm/include/asm/arch-armada100/spi.h	/^	u32 sstss;	\/* SSP Timeslot Status Register - 0x038 *\/$/;"	m	struct:ssp_reg	typeref:typename:u32
ssut	drivers/i2c/i2c-uniphier-f.c	/^	u32 ssut;			\/* restart\/stop setup time control *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
ssvdi_ssid	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 ssvdi_ssid;		\/* 0x2C *\/$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
ssync	arch/blackfin/include/asm/blackfin_local.h	/^#define ssync(/;"	d
st	drivers/net/sun8i_emac.c	/^	u32 st;$/;"	m	struct:emac_dma_desc	typeref:typename:u32	file:
st33zp24_i2c_cancel	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static void st33zp24_i2c_cancel(struct udevice *dev)$/;"	f	typeref:typename:void	file:
st33zp24_i2c_check_locality	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_check_locality(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_cleanup	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_cleanup(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_close	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_close(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_get_burstcount	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_get_burstcount(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_get_desc	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_ids	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static const struct udevice_id st33zp24_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
st33zp24_i2c_init	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_open	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_probe	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_read	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_read(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:int	file:
st33zp24_i2c_read8_reg	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_read8_reg(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:int	file:
st33zp24_i2c_recv	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_recv(struct udevice *dev, u8 *buf, size_t count)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_recv_data	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_recv_data(struct udevice *dev, u8 *buf, size_t count)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_release_locality	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static void st33zp24_i2c_release_locality(struct udevice *dev)$/;"	f	typeref:typename:void	file:
st33zp24_i2c_remove	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_request_locality	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_request_locality(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_send	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_send(struct udevice *dev, const u8 *buf, size_t len)$/;"	f	typeref:typename:int	file:
st33zp24_i2c_status	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static u8 st33zp24_i2c_status(struct udevice *dev)$/;"	f	typeref:typename:u8	file:
st33zp24_i2c_tpm_ops	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static const struct tpm_ops st33zp24_i2c_tpm_ops = {$/;"	v	typeref:typename:const struct tpm_ops	file:
st33zp24_i2c_wait_for_stat	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_wait_for_stat(struct udevice *dev, u8 mask,$/;"	f	typeref:typename:int	file:
st33zp24_i2c_write	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_write(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:int	file:
st33zp24_i2c_write8_reg	drivers/tpm/tpm_tis_st33zp24_i2c.c	/^static int st33zp24_i2c_write8_reg(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:int	file:
st33zp24_spi_cancel	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static void st33zp24_spi_cancel(struct udevice *dev)$/;"	f	typeref:typename:void	file:
st33zp24_spi_check_locality	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_check_locality(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_cleanup	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_cleanup(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_close	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_close(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_evaluate_latency	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_evaluate_latency(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_get_burstcount	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_get_burstcount(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_get_desc	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
st33zp24_spi_ids	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static const struct udevice_id st33zp24_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
st33zp24_spi_init	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_open	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_phy	drivers/tpm/tpm_tis_st33zp24_spi.c	/^struct st33zp24_spi_phy {$/;"	s	file:
st33zp24_spi_probe	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_read	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_read(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:int	file:
st33zp24_spi_read8_reg	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static u8 st33zp24_spi_read8_reg(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:u8	file:
st33zp24_spi_recv	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count)$/;"	f	typeref:typename:int	file:
st33zp24_spi_recv_data	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_recv_data(struct udevice *dev, u8 *buf, size_t count)$/;"	f	typeref:typename:int	file:
st33zp24_spi_release_locality	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static void st33zp24_spi_release_locality(struct udevice *dev)$/;"	f	typeref:typename:void	file:
st33zp24_spi_remove	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_request_locality	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_request_locality(struct udevice *dev)$/;"	f	typeref:typename:int	file:
st33zp24_spi_send	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_send(struct udevice *dev, const u8 *buf, size_t len)$/;"	f	typeref:typename:int	file:
st33zp24_spi_status	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static u8 st33zp24_spi_status(struct udevice *dev)$/;"	f	typeref:typename:u8	file:
st33zp24_spi_status_to_errno	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_status_to_errno(u8 code)$/;"	f	typeref:typename:int	file:
st33zp24_spi_tpm_ops	drivers/tpm/tpm_tis_st33zp24_spi.c	/^const struct tpm_ops st33zp24_spi_tpm_ops = {$/;"	v	typeref:typename:const struct tpm_ops
st33zp24_spi_wait_for_stat	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_wait_for_stat(struct udevice *dev, u8 mask,$/;"	f	typeref:typename:int	file:
st33zp24_spi_write	drivers/tpm/tpm_tis_st33zp24_spi.c	/^static int st33zp24_spi_write(struct udevice *dev, u8 tpm_register,$/;"	f	typeref:typename:int	file:
st_atime	include/linux/stat.h	/^	time_t		st_atime;$/;"	m	struct:stat	typeref:typename:time_t
st_atime	include/linux/stat.h	/^	unsigned long	st_atime;	\/* time file was last accessed *\/$/;"	m	struct:stat	typeref:typename:unsigned long
st_atime	include/linux/stat.h	/^	unsigned long  st_atime;$/;"	m	struct:stat	typeref:typename:unsigned long
st_atime_nsec	include/linux/stat.h	/^	unsigned long  st_atime_nsec;$/;"	m	struct:stat	typeref:typename:unsigned long
st_blksize	fs/yaffs2/yaffsfs.h	/^	unsigned long	st_blksize;	\/* blocksize for filesystem I\/O *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long
st_blksize	include/linux/stat.h	/^	long		st_blksize;$/;"	m	struct:stat	typeref:typename:long
st_blksize	include/linux/stat.h	/^	unsigned long	st_blksize;	\/* block size *\/$/;"	m	struct:stat	typeref:typename:unsigned long
st_blksize	include/linux/stat.h	/^	unsigned long  st_blksize;$/;"	m	struct:stat	typeref:typename:unsigned long
st_blocks	fs/yaffs2/yaffsfs.h	/^	unsigned long	st_blocks;	\/* number of blocks allocated *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long
st_blocks	include/linux/stat.h	/^	long		st_blocks;$/;"	m	struct:stat	typeref:typename:long
st_blocks	include/linux/stat.h	/^	unsigned long	st_blocks;	\/* file size in # of blocks *\/$/;"	m	struct:stat	typeref:typename:unsigned long
st_blocks	include/linux/stat.h	/^	unsigned long  st_blocks;$/;"	m	struct:stat	typeref:typename:unsigned long
st_cmask	arch/powerpc/include/asm/cpm_8260.h	/^	uint	st_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:scc_trans	typeref:typename:uint
st_cmask	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	st_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:scc_trans	typeref:typename:uint
st_cmask	include/commproc.h	/^	uint	st_cmask;	\/* Constant mask for CRC *\/$/;"	m	struct:scc_trans	typeref:typename:uint
st_cpres	arch/powerpc/include/asm/cpm_8260.h	/^	uint	st_cpres;	\/* Preset CRC *\/$/;"	m	struct:scc_trans	typeref:typename:uint
st_cpres	arch/powerpc/include/asm/cpm_85xx.h	/^	uint	st_cpres;	\/* Preset CRC *\/$/;"	m	struct:scc_trans	typeref:typename:uint
st_cpres	include/commproc.h	/^	uint	st_cpres;	\/* Preset CRC *\/$/;"	m	struct:scc_trans	typeref:typename:uint
st_ctime	include/linux/stat.h	/^	time_t		st_ctime;$/;"	m	struct:stat	typeref:typename:time_t
st_ctime	include/linux/stat.h	/^	unsigned long	st_ctime;	\/* time file status was last changed *\/$/;"	m	struct:stat	typeref:typename:unsigned long
st_ctime	include/linux/stat.h	/^	unsigned long  st_ctime;$/;"	m	struct:stat	typeref:typename:unsigned long
st_ctime_nsec	include/linux/stat.h	/^	unsigned long  st_ctime_nsec;$/;"	m	struct:stat	typeref:typename:unsigned long
st_dev	fs/yaffs2/yaffsfs.h	/^	int		st_dev;		\/* device *\/$/;"	m	struct:yaffs_stat	typeref:typename:int
st_dev	include/linux/stat.h	/^	dev_t		st_dev;		\/* file system id *\/$/;"	m	struct:stat	typeref:typename:dev_t
st_dev	include/linux/stat.h	/^	dev_t		st_dev;$/;"	m	struct:stat	typeref:typename:dev_t
st_dev	include/linux/stat.h	/^	unsigned long st_dev;$/;"	m	struct:stat	typeref:typename:unsigned long
st_dev	include/linux/stat.h	/^	unsigned short st_dev;$/;"	m	struct:stat	typeref:typename:unsigned short
st_genscc	arch/powerpc/include/asm/cpm_8260.h	/^	sccp_t	st_genscc;$/;"	m	struct:scc_trans	typeref:typename:sccp_t
st_genscc	arch/powerpc/include/asm/cpm_85xx.h	/^	sccp_t	st_genscc;$/;"	m	struct:scc_trans	typeref:typename:sccp_t
st_genscc	include/commproc.h	/^	sccp_t	st_genscc;$/;"	m	struct:scc_trans	typeref:typename:sccp_t
st_gid	fs/yaffs2/yaffsfs.h	/^	int		st_gid;		\/* group ID of owner *\/$/;"	m	struct:yaffs_stat	typeref:typename:int
st_gid	include/linux/stat.h	/^	gid_t		st_gid;		\/* group id *\/$/;"	m	struct:stat	typeref:typename:gid_t
st_gid	include/linux/stat.h	/^	gid_t		st_gid;$/;"	m	struct:stat	typeref:typename:gid_t
st_gid	include/linux/stat.h	/^	unsigned short st_gid;$/;"	m	struct:stat	typeref:typename:unsigned short
st_info	include/elf.h	/^	unsigned char	st_info;	\/* type and binding *\/$/;"	m	struct:elf32_sym	typeref:typename:unsigned char
st_ino	fs/yaffs2/yaffsfs.h	/^	int		st_ino;		\/* inode *\/$/;"	m	struct:yaffs_stat	typeref:typename:int
st_ino	include/linux/stat.h	/^	ino_t		st_ino;		\/* file id *\/$/;"	m	struct:stat	typeref:typename:ino_t
st_ino	include/linux/stat.h	/^	ino_t		st_ino;$/;"	m	struct:stat	typeref:typename:ino_t
st_ino	include/linux/stat.h	/^	unsigned long st_ino;$/;"	m	struct:stat	typeref:typename:unsigned long
st_le16	arch/m68k/include/asm/byteorder.h	/^static __inline__ void st_le16(volatile unsigned short *addr,$/;"	f	typeref:typename:void
st_le16	arch/powerpc/include/asm/byteorder.h	/^static __inline__ void st_le16(volatile unsigned short *addr, const unsigned val)$/;"	f	typeref:typename:void
st_le32	arch/m68k/include/asm/byteorder.h	/^static __inline__ void st_le32(volatile unsigned *addr, const unsigned val)$/;"	f	typeref:typename:void
st_le32	arch/powerpc/include/asm/byteorder.h	/^static __inline__ void st_le32(volatile unsigned *addr, const unsigned val)$/;"	f	typeref:typename:void
st_mode	fs/yaffs2/yaffsfs.h	/^	unsigned	st_mode;	\/* protection *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned
st_mode	include/linux/stat.h	/^	mode_t		st_mode;	\/* ownership\/protection *\/$/;"	m	struct:stat	typeref:typename:mode_t
st_mode	include/linux/stat.h	/^	mode_t		st_mode;$/;"	m	struct:stat	typeref:typename:mode_t
st_mode	include/linux/stat.h	/^	unsigned short st_mode;$/;"	m	struct:stat	typeref:typename:unsigned short
st_mtime	include/linux/stat.h	/^	time_t		st_mtime;$/;"	m	struct:stat	typeref:typename:time_t
st_mtime	include/linux/stat.h	/^	unsigned long	st_mtime;	\/* time file was last modified *\/$/;"	m	struct:stat	typeref:typename:unsigned long
st_mtime	include/linux/stat.h	/^	unsigned long  st_mtime;$/;"	m	struct:stat	typeref:typename:unsigned long
st_mtime_nsec	include/linux/stat.h	/^	unsigned long  st_mtime_nsec;$/;"	m	struct:stat	typeref:typename:unsigned long
st_name	include/elf.h	/^	Elf32_Word	st_name;	\/* name - index into string table *\/$/;"	m	struct:elf32_sym	typeref:typename:Elf32_Word
st_nlink	fs/yaffs2/yaffsfs.h	/^	int		st_nlink;	\/* number of hard links *\/$/;"	m	struct:yaffs_stat	typeref:typename:int
st_nlink	include/linux/stat.h	/^	nlink_t		st_nlink;	\/* number of links *\/$/;"	m	struct:stat	typeref:typename:nlink_t
st_nlink	include/linux/stat.h	/^	nlink_t		st_nlink;$/;"	m	struct:stat	typeref:typename:nlink_t
st_nlink	include/linux/stat.h	/^	unsigned short st_nlink;$/;"	m	struct:stat	typeref:typename:unsigned short
st_other	include/elf.h	/^	unsigned char	st_other;	\/* 0 - no defined meaning *\/$/;"	m	struct:elf32_sym	typeref:typename:unsigned char
st_pad1	include/linux/stat.h	/^	long		st_pad1[3];$/;"	m	struct:stat	typeref:typename:long[3]
st_pad2	include/linux/stat.h	/^	long		st_pad2[2];$/;"	m	struct:stat	typeref:typename:long[2]
st_pad3	include/linux/stat.h	/^	long		st_pad3;$/;"	m	struct:stat	typeref:typename:long
st_pad4	include/linux/stat.h	/^	long		st_pad4[14];$/;"	m	struct:stat	typeref:typename:long[14]
st_rdev	fs/yaffs2/yaffsfs.h	/^	unsigned	st_rdev;	\/* device type (if inode device) *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned
st_rdev	include/linux/stat.h	/^	dev_t		st_rdev;$/;"	m	struct:stat	typeref:typename:dev_t
st_rdev	include/linux/stat.h	/^	unsigned long  st_rdev;$/;"	m	struct:stat	typeref:typename:unsigned long
st_rdev	include/linux/stat.h	/^	unsigned short st_rdev;$/;"	m	struct:stat	typeref:typename:unsigned short
st_shndx	include/elf.h	/^	Elf32_Half	st_shndx;	\/* section header index *\/$/;"	m	struct:elf32_sym	typeref:typename:Elf32_Half
st_size	fs/yaffs2/yaffsfs.h	/^	loff_t		st_size;	\/* total size, in bytes *\/$/;"	m	struct:yaffs_stat	typeref:typename:loff_t
st_size	include/elf.h	/^	Elf32_Word	st_size;	\/* symbol size *\/$/;"	m	struct:elf32_sym	typeref:typename:Elf32_Word
st_size	include/linux/stat.h	/^	off_t		st_size;	\/* file size in # of bytes *\/$/;"	m	struct:stat	typeref:typename:off_t
st_size	include/linux/stat.h	/^	off_t		st_size;$/;"	m	struct:stat	typeref:typename:off_t
st_size	include/linux/stat.h	/^	unsigned long  st_size;$/;"	m	struct:stat	typeref:typename:unsigned long
st_uid	fs/yaffs2/yaffsfs.h	/^	int		st_uid;		\/* user ID of owner *\/$/;"	m	struct:yaffs_stat	typeref:typename:int
st_uid	include/linux/stat.h	/^	uid_t		st_uid;		\/* user id *\/$/;"	m	struct:stat	typeref:typename:uid_t
st_uid	include/linux/stat.h	/^	uid_t		st_uid;$/;"	m	struct:stat	typeref:typename:uid_t
st_uid	include/linux/stat.h	/^	unsigned short st_uid;$/;"	m	struct:stat	typeref:typename:unsigned short
st_value	include/elf.h	/^	Elf32_Addr	st_value;	\/* symbol value *\/$/;"	m	struct:elf32_sym	typeref:typename:Elf32_Addr
sta	arch/arm/include/asm/arch-sunxi/gpio.h	/^	u32 sta;$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32
sta	arch/arm/include/asm/arch/gpio.h	/^	u32 sta;$/;"	m	struct:sunxi_gpio_int	typeref:typename:u32
stabl_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 stabl_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
stack	common/cli_hush.c	/^	struct p_context *stack;$/;"	m	struct:p_context	typeref:struct:p_context *	file:
stack	examples/standalone/sched.c	/^	char stack[STK_SIZE];$/;"	m	struct:lthread	typeref:typename:char[]	file:
stack	include/libfdt.h	/^	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	\/* node stack *\/$/;"	m	struct:fdt_region_state	typeref:struct:fdt_subnode_stack[]
stack_setup	arch/nds32/cpu/n1213/start.S	/^stack_setup:$/;"	l
stack_size	arch/x86/cpu/sipi_vector.S	/^stack_size:$/;"	l
stack_size	arch/x86/include/asm/sipi.h	/^	u32 stack_size;$/;"	m	struct:sipi_params	typeref:typename:u32
stack_t	arch/powerpc/include/asm/signal.h	/^} stack_t;$/;"	t	typeref:struct:sigaltstack
stack_top	arch/x86/cpu/sipi_vector.S	/^stack_top:$/;"	l
stack_top	arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h	/^	u32 stack_top;$/;"	m	struct:fspinit_rtbuf	typeref:typename:u32
stack_top	arch/x86/include/asm/fsp/fsp_api.h	/^	u32			stack_top;$/;"	m	struct:fsp_cfg_common	typeref:typename:u32
stack_top	arch/x86/include/asm/fsp/fsp_api.h	/^	u32	stack_top;$/;"	m	struct:common_buf	typeref:typename:u32
stack_top	arch/x86/include/asm/sipi.h	/^	u32 stack_top;$/;"	m	struct:sipi_params	typeref:typename:u32
stackinit	arch/sparc/cpu/leon3/start.S	/^stackinit:$/;"	l
stage	cmd/sf.c	/^	int stage;$/;"	m	struct:test_info	typeref:typename:int	file:
stage	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^	enum hws_wl_supp stage;$/;"	m	struct:write_supp_result	typeref:enum:hws_wl_supp
stage_name	cmd/sf.c	/^static char *stage_name[STAGE_COUNT] = {$/;"	v	typeref:typename:char * []	file:
stamp_led_set	board/bf533-stamp/bf533-stamp.c	/^static void stamp_led_set(int LED1, int LED2, int LED3)$/;"	f	typeref:typename:void	file:
stand_ident	disk/part_iso.h	/^	unsigned char stand_ident[5]; \/* "CD001" *\/$/;"	m	struct:iso_boot_rec	typeref:typename:unsigned char[5]
stand_ident	disk/part_iso.h	/^	unsigned char stand_ident[5]; \/* "CD001" *\/$/;"	m	struct:iso_part_rec	typeref:typename:unsigned char[5]
stand_ident	disk/part_iso.h	/^	unsigned char stand_ident[5]; \/* "CD001" *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[5]
stand_ident	disk/part_iso.h	/^	unsigned char stand_ident[5]; \/* "CD001" *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[5]
standard_timings	include/edid.h	/^	} __attribute__((__packed__)) standard_timings[8];$/;"	m	struct:edid1_info	typeref:struct:edid1_info::__anon4a0dc0440308[8]
start	arch/arm/include/asm/setup.h	/^		unsigned long start;$/;"	m	struct:meminfo::__anon61e8c52b0608	typeref:typename:unsigned long
start	arch/arm/include/asm/setup.h	/^	u32	start;	\/* physical start address *\/$/;"	m	struct:tag_mem32	typeref:typename:u32
start	arch/arm/include/asm/setup.h	/^	u32 start;	\/* physical start address *\/$/;"	m	struct:tag_initrd	typeref:typename:u32
start	arch/arm/include/asm/setup.h	/^	u32 start;	\/* starting block of floppy-based RAM disk image *\/$/;"	m	struct:tag_ramdisk	typeref:typename:u32
start	arch/arm/mach-tegra/tegra186/nvtboot_mem.c	/^	u64 start;$/;"	m	struct:__anon231bbe050108	typeref:typename:u64	file:
start	arch/blackfin/cpu/traps.c	/^	uint32_t start, end;$/;"	m	struct:memory_map	typeref:typename:uint32_t	file:
start	arch/nds32/include/asm/setup.h	/^		unsigned long start;$/;"	m	struct:meminfo::__anon553264350208	typeref:typename:unsigned long
start	arch/nds32/include/asm/setup.h	/^	u32	start;	\/* physical start address *\/$/;"	m	struct:tag_mem32	typeref:typename:u32
start	arch/nds32/include/asm/setup.h	/^	u32 start;	\/* physical start address *\/$/;"	m	struct:tag_initrd	typeref:typename:u32
start	arch/nds32/include/asm/setup.h	/^	u32 start;	\/* starting block of floppy-based RAM disk image *\/$/;"	m	struct:tag_ramdisk	typeref:typename:u32
start	arch/nds32/include/asm/u-boot.h	/^		unsigned long start;$/;"	m	struct:bd_info::__anond2dc725a0108	typeref:typename:unsigned long
start	arch/sparc/cpu/leon2/start.S	/^start:$/;"	l
start	arch/sparc/cpu/leon3/start.S	/^start:$/;"	l
start	arch/x86/include/asm/coreboot_tables.h	/^	struct cbuint64 start;$/;"	m	struct:cb_memory_range	typeref:struct:cbuint64
start	arch/x86/include/asm/global_data.h	/^	uint64_t start;$/;"	m	struct:memory_area	typeref:typename:uint64_t
start	arch/x86/include/asm/global_data.h	/^	uint64_t start;$/;"	m	struct:mtrr_request	typeref:typename:uint64_t
start	arch/xtensa/include/asm/bootparam.h	/^	unsigned long start;$/;"	m	struct:meminfo	typeref:typename:unsigned long
start	board/mpl/mip405/mip405.c	/^static unsigned long start;$/;"	v	typeref:typename:unsigned long	file:
start	board/nokia/rx51/tag_omap.h	/^	u32 start;$/;"	m	struct:omap_fbmem_config	typeref:typename:u32
start	common/iotrace.c	/^	ulong start;$/;"	m	struct:iotrace	typeref:typename:ulong	file:
start	drivers/block/blkcache.c	/^	lbaint_t start;$/;"	m	struct:block_cache_node	typeref:typename:lbaint_t	file:
start	drivers/demo/demo-shape.c	/^		int start;$/;"	m	struct:shape_hello::shape	typeref:typename:int	file:
start	drivers/gpio/sunxi_gpio.c	/^	int start;$/;"	m	struct:sunxi_gpio_soc_data	typeref:typename:int	file:
start	drivers/mtd/cfi_flash.c	/^		ulong start;$/;"	m	struct:flash_protect_default::apl_s	typeref:typename:ulong	file:
start	drivers/pci/pci_mvebu.c	/^	u32 start;$/;"	m	struct:resource	typeref:typename:u32	file:
start	drivers/usb/musb-new/musb_dma.h	/^	int			(*start)(struct dma_controller *);$/;"	m	struct:dma_controller	typeref:typename:int (*)(struct dma_controller *)
start	fs/ubifs/ubifs.h	/^	int start;$/;"	m	struct:ubifs_bud	typeref:typename:int
start	include/api_public.h	/^	unsigned long	start;$/;"	m	struct:mem_region	typeref:typename:unsigned long
start	include/asm-generic/u-boot.h	/^		phys_addr_t start;$/;"	m	struct:bd_info::__anon1afe92be0108	typeref:typename:phys_addr_t
start	include/dataflash.h	/^	unsigned long start;$/;"	m	struct:__anona98984760108	typeref:typename:unsigned long
start	include/dfu.h	/^	u64 start;$/;"	m	struct:nand_internal_data	typeref:typename:u64
start	include/dfu.h	/^	u64 start;$/;"	m	struct:sf_internal_data	typeref:typename:u64
start	include/dfu.h	/^	void		*start;$/;"	m	struct:ram_internal_data	typeref:typename:void *
start	include/fat.h	/^	__u16	start;		\/* Unused *\/$/;"	m	struct:dir_slot	typeref:typename:__u16
start	include/fat.h	/^	__u16	time,date,start;\/* Time, date and first cluster *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
start	include/fdtdec.h	/^	fdt_addr_t start;$/;"	m	struct:fdt_memory	typeref:typename:fdt_addr_t
start	include/fdtdec.h	/^	fdt_addr_t start;$/;"	m	struct:fdt_resource	typeref:typename:fdt_addr_t
start	include/flash.h	/^	ulong	start[CONFIG_SYS_MAX_FLASH_SECT];   \/* virtual sector start address *\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong[]
start	include/image-sparse.h	/^	lbaint_t	start;$/;"	m	struct:sparse_storage	typeref:typename:lbaint_t
start	include/image.h	/^	ulong		start, end;		\/* start\/end of blob *\/$/;"	m	struct:image_info	typeref:typename:ulong
start	include/keyboard.h	/^	int (*start)(struct udevice *dev);$/;"	m	struct:keyboard_ops	typeref:typename:int (*)(struct udevice * dev)
start	include/libfdt.h	/^	int start;			\/* Start position of current region *\/$/;"	m	struct:fdt_region_state	typeref:typename:int
start	include/linux/fb.h	/^	__u32 start;			\/* First entry	*\/$/;"	m	struct:fb_cmap	typeref:typename:__u32
start	include/linux/fb.h	/^	__u32 start;			\/* First entry	*\/$/;"	m	struct:fb_cmap_user	typeref:typename:__u32
start	include/linux/ioport.h	/^	resource_size_t start;$/;"	m	struct:resource	typeref:typename:resource_size_t
start	include/linux/mtd/flashchip.h	/^	unsigned long start; \/* Offset within the map *\/$/;"	m	struct:flchip	typeref:typename:unsigned long
start	include/logbuff.h	/^			unsigned long	start;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30308	typeref:typename:unsigned long
start	include/logbuff.h	/^			unsigned long	start;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30408	typeref:typename:unsigned long
start	include/membuff.h	/^	char *start;		\/** the start of the buffer *\/$/;"	m	struct:membuff	typeref:typename:char *
start	include/mtd/mtd-abi.h	/^	__u32 start;$/;"	m	struct:erase_info_user	typeref:typename:__u32
start	include/mtd/mtd-abi.h	/^	__u32 start;$/;"	m	struct:mtd_oob_buf	typeref:typename:__u32
start	include/mtd/mtd-abi.h	/^	__u32 start;$/;"	m	struct:otp_info	typeref:typename:__u32
start	include/mtd/mtd-abi.h	/^	__u64 start;$/;"	m	struct:erase_info_user64	typeref:typename:__u64
start	include/mtd/mtd-abi.h	/^	__u64 start;$/;"	m	struct:mtd_oob_buf64	typeref:typename:__u64
start	include/mtd/mtd-abi.h	/^	__u64 start;$/;"	m	struct:mtd_write_req	typeref:typename:__u64
start	include/net.h	/^	int (*start)(struct udevice *dev);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev)
start	include/part.h	/^	lbaint_t	start;	\/* # of first block in partition	*\/$/;"	m	struct:disk_partition	typeref:typename:lbaint_t
start	include/qfw.h	/^			__le32 start;$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0608	typeref:typename:__le32
start	include/regmap.h	/^	ulong start;$/;"	m	struct:regmap_range	typeref:typename:ulong
start	include/remoteproc.h	/^	int (*start)(struct udevice *dev);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev)
start	include/serial.h	/^	int	(*start)(void);$/;"	m	struct:serial_device	typeref:typename:int (*)(void)
start	include/stdio_dev.h	/^	int (*start)(struct stdio_dev *dev);	\/* To start the device *\/$/;"	m	struct:stdio_dev	typeref:typename:int (*)(struct stdio_dev * dev)
start	include/test/test.h	/^	struct mallinfo start;$/;"	m	struct:unit_test_state	typeref:struct:mallinfo
start	scripts/kconfig/zconf.y	/^start: mainmenu_stmt stmt_list | stmt_list;$/;"	l
start	tools/imximage.h	/^	uint32_t start;$/;"	m	struct:__anon504a956c0b08	typeref:typename:uint32_t
start16	arch/x86/cpu/start16.S	/^start16:$/;"	l
start4	disk/part_dos.h	/^	unsigned char start4[4];	\/* starting sector counting from 0	*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char[4]
start_addr	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr;		\/* _WINBUF_START_ADDR_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_addr	arch/blackfin/include/asm/dma.h	/^	u32 start_addr;		\/* DMA Start address  register *\/$/;"	m	struct:dma_register	typeref:typename:u32
start_addr	arch/blackfin/include/asm/dma.h	/^	u32 start_addr;$/;"	m	struct:dmasg	typeref:typename:u32
start_addr	arch/blackfin/include/asm/dma.h	/^	u32 start_addr;$/;"	m	struct:dmasg_large	typeref:typename:u32
start_addr	arch/powerpc/include/asm/fsl_pamu.h	/^	phys_addr_t start_addr[10];$/;"	m	struct:pamu_addr_tbl	typeref:typename:phys_addr_t[10]
start_addr	cmd/strings.c	/^static char *start_addr, *last_addr;$/;"	v	typeref:typename:char *	file:
start_addr	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u32 start_addr;$/;"	m	struct:pattern_info	typeref:typename:u32
start_addr0	drivers/net/tsi108_eth.c	/^	vuint32 start_addr0;	\/* buffer address, least significant bytes. *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
start_addr1	drivers/net/tsi108_eth.c	/^	vuint32 start_addr1;	\/* buffer address, most significant bytes. *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
start_addr_hi	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr_hi;		\/* DC_WINBUF_START_ADDR_HI_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_addr_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr_ns;		\/* _WINBUF_START_ADDR_NS_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_addr_sp	include/asm-generic/global_data.h	/^	unsigned long start_addr_sp;	\/* start_addr_stackpointer *\/$/;"	m	struct:global_data	typeref:typename:unsigned long
start_addr_u	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr_u;		\/* _WINBUF_START_ADDR_U_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_addr_u_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr_u_ns;		\/* _WINBUF_START_ADDR_U_NS_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_addr_v	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr_v;		\/* _WINBUF_START_ADDR_V_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_addr_v_ns	arch/arm/include/asm/arch-tegra/dc.h	/^	uint start_addr_v_ns;		\/* _WINBUF_START_ADDR_V_NS_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
start_adr	arch/sparc/include/asm/prom.h	/^	char *start_adr;$/;"	m	struct:linux_mlist_v0	typeref:typename:char *
start_again_timeout_handler	net/net.c	/^static void start_again_timeout_handler(void)$/;"	f	typeref:typename:void	file:
start_apr_int	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_apr_int;	\/* Start Activation Polarity Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_apr_pin	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_apr_pin;	\/* Start Activation Polarity Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_aps	arch/x86/cpu/mp_init.c	/^static int start_aps(int ap_count, atomic_t *num_aps)$/;"	f	typeref:typename:int	file:
start_block	disk/part_mac.h	/^	__u32	start_block;	\/* abs. starting block # of partition	*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
start_block	fs/yaffs2/yaffs_guts.h	/^	int start_block;	\/* Start block we're allowed to use *\/$/;"	m	struct:yaffs_param	typeref:typename:int
start_block	fs/yaffs2/yaffs_nandif.h	/^	unsigned start_block;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
start_bus_number	arch/x86/include/asm/acpi_table.h	/^	u8 start_bus_number;$/;"	m	struct:acpi_mcfg_mmconfig	typeref:typename:u8
start_channel	include/adc.h	/^	int (*start_channel)(struct udevice *dev, int channel);$/;"	m	struct:adc_ops	typeref:typename:int (*)(struct udevice * dev,int channel)
start_channels	include/adc.h	/^	int (*start_channels)(struct udevice *dev, unsigned int channel_mask);$/;"	m	struct:adc_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int channel_mask)
start_code	arch/arm/include/asm/omap_common.h	/^	u32 start_code;$/;"	m	struct:pmic_data	typeref:typename:u32
start_command	drivers/mtd/nand/tegra_nand.c	/^static void start_command(struct nand_ctlr *reg)$/;"	f	typeref:typename:void	file:
start_config_issued	drivers/usb/dwc3/core.h	/^	unsigned		start_config_issued:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
start_cpu	arch/arm/mach-tegra/tegra114/cpu.c	/^void start_cpu(u32 reset_vector)$/;"	f	typeref:typename:void
start_cpu	arch/arm/mach-tegra/tegra124/cpu.c	/^void start_cpu(u32 reset_vector)$/;"	f	typeref:typename:void
start_cpu	arch/arm/mach-tegra/tegra20/cpu.c	/^void start_cpu(u32 reset_vector)$/;"	f	typeref:typename:void
start_cpu	arch/arm/mach-tegra/tegra30/cpu.c	/^void start_cpu(u32 reset_vector)$/;"	f	typeref:typename:void
start_cpu_fan	arch/arm/mach-tegra/board2.c	/^__weak void start_cpu_fan(void) {}$/;"	f	typeref:typename:__weak void
start_cpu_fan	board/nvidia/p2571/p2571.c	/^void start_cpu_fan(void)$/;"	f	typeref:typename:void
start_dfu	test/py/tests/test_dfu.py	/^    def start_dfu():$/;"	f	function:test_dfu	file:
start_er_int	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_er_int;	\/* Start Enable Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_er_pin	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_er_pin;	\/* Start Enable Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_flush_levels	arch/arm/cpu/armv7/cache_v7_asm.S	/^start_flush_levels:$/;"	l
start_frame	drivers/usb/musb-new/usb-compat.h	/^	int start_frame;		\/* (modify) start frame (ISO) *\/$/;"	m	struct:urb	typeref:typename:int
start_hc	arch/sparc/cpu/leon3/usb_uhci.c	/^void start_hc(void)$/;"	f	typeref:typename:void
start_hc	board/mpl/common/usb_uhci.c	/^void start_hc(void)$/;"	f	typeref:typename:void
start_hdr	include/fsl-mc/fsl_dpni.h	/^		enum net_prot		start_hdr;$/;"	m	struct:dpni_cfg::__anonf56ef98e0308	typeref:enum:net_prot
start_hdr	include/fsl-mc/fsl_dpni.h	/^	enum net_prot start_hdr;$/;"	m	struct:dpni_attr	typeref:enum:net_prot
start_idx	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	start_idx;$/;"	m	struct:descr_mem_setup_reg	typeref:typename:u32
start_if	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u32 start_if = 0, end_if = (MAX_INTERFACE_NUM - 1);$/;"	v	typeref:typename:u32
start_item	include/ec_commands.h	/^			uint8_t start_item;	\/* First item to return *\/$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670908	typeref:typename:uint8_t
start_jr0	drivers/crypto/fsl/jr.c	/^static inline void start_jr0(uint8_t sec_idx)$/;"	f	typeref:typename:void	file:
start_of_line	drivers/serial/sandbox.c	/^	bool start_of_line;$/;"	m	struct:sandbox_serial_priv	typeref:typename:bool	file:
start_pattern	drivers/ddr/marvell/a38x/ddr3_training_centralization.c	/^u32 start_pattern = PATTERN_KILLER_DQ0, end_pattern = PATTERN_KILLER_DQ7;$/;"	v	typeref:typename:u32
start_rsr_int	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_rsr_int;	\/* Start Raw Status Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_rsr_pin	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_rsr_pin;	\/* Start Raw Status Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_script_cmd	drivers/block/sym53c8xx.c	/^static unsigned long start_script_cmd;$/;"	v	typeref:typename:unsigned long	file:
start_script_complete	drivers/block/sym53c8xx.c	/^static unsigned long start_script_complete;$/;"	v	typeref:typename:unsigned long	file:
start_script_data_in	drivers/block/sym53c8xx.c	/^static unsigned long start_script_data_in;$/;"	v	typeref:typename:unsigned long	file:
start_script_data_out	drivers/block/sym53c8xx.c	/^static unsigned long start_script_data_out;$/;"	v	typeref:typename:unsigned long	file:
start_script_error	drivers/block/sym53c8xx.c	/^static unsigned long start_script_error;$/;"	v	typeref:typename:unsigned long	file:
start_script_msg_ext	drivers/block/sym53c8xx.c	/^static unsigned long start_script_msg_ext;$/;"	v	typeref:typename:unsigned long	file:
start_script_msgin	drivers/block/sym53c8xx.c	/^static unsigned long start_script_msgin;$/;"	v	typeref:typename:unsigned long	file:
start_script_msgout	drivers/block/sym53c8xx.c	/^static unsigned long start_script_msgout;$/;"	v	typeref:typename:unsigned long	file:
start_script_reselection	drivers/block/sym53c8xx.c	/^static unsigned long start_script_reselection;$/;"	v	typeref:typename:unsigned long	file:
start_script_select	drivers/block/sym53c8xx.c	/^static unsigned long start_script_select;$/;"	v	typeref:typename:unsigned long	file:
start_script_status	drivers/block/sym53c8xx.c	/^static unsigned long start_script_status;$/;"	v	typeref:typename:unsigned long	file:
start_sect	include/part_efi.h	/^	__le32 start_sect;	\/* starting sector counting from 0 *\/$/;"	m	struct:partition	typeref:typename:__le32
start_section	test/py/multiplexed_log.py	/^    def start_section(self, marker, anchor=None):$/;"	m	class:Logfile
start_sector	include/usb_mass_storage.h	/^	unsigned int start_sector;$/;"	m	struct:ums	typeref:typename:unsigned int
start_slot	drivers/usb/dwc3/core.h	/^	u32			start_slot;$/;"	m	struct:dwc3_request	typeref:typename:u32
start_sr_int	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_sr_int;	\/* Start Status Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_sr_pin	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 start_sr_pin;	\/* Start Status Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
start_sys	arch/x86/include/asm/bootparam.h	/^	__u16	start_sys;$/;"	m	struct:setup_header	typeref:typename:__u16
start_test_section	test/py/conftest.py	/^def start_test_section(item):$/;"	f
start_thread	arch/arm/include/asm/proc-armv/processor.h	/^#define start_thread(/;"	d
start_thread	arch/avr32/include/asm/processor.h	/^#define start_thread(/;"	d
start_time	drivers/input/ps2mult.c	/^static ulong start_time;$/;"	v	typeref:typename:ulong	file:
start_time_ms	drivers/input/tegra-kbc.c	/^	unsigned int start_time_ms;	\/* Time that we inited (in ms) *\/$/;"	m	struct:tegra_kbd_priv	typeref:typename:unsigned int	file:
start_transfer	drivers/usb/gadget/f_mass_storage.c	/^static void start_transfer(struct fsg_dev *fsg, struct usb_ep *ep,$/;"	f	typeref:typename:void	file:
start_tripping	drivers/power/exynos-tmu.c	/^	unsigned start_tripping;$/;"	m	struct:temperature_params	typeref:typename:unsigned	file:
start_ums	test/py/tests/test_ums.py	/^    def start_ums():$/;"	f	function:test_ums	file:
start_us	common/bootstage.c	/^	uint32_t start_us;$/;"	m	struct:bootstage_record	typeref:typename:uint32_t	file:
start_warning	drivers/power/exynos-tmu.c	/^	unsigned start_warning;$/;"	m	struct:temperature_params	typeref:typename:unsigned	file:
start_watchdog	drivers/usb/gadget/pxa25x_udc.c	/^static inline void start_watchdog(struct pxa25x_udc *udc)$/;"	f	typeref:typename:void	file:
start_xsb_offset	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 start_xsb_offset = 0;$/;"	v	typeref:typename:u32
startaddr	board/nokia/rx51/lowlevel_init.S	/^startaddr:		\/* address of u-boot after copying *\/$/;"	l
started	drivers/net/dwc_eth_qos.c	/^	bool started;$/;"	m	struct:eqos_priv	typeref:typename:bool	file:
starthi	include/fat.h	/^	__u16	starthi;	\/* High 16 bits of cluster in FAT32 *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
starting_lba	include/part_efi.h	/^	__le64 starting_lba;$/;"	m	struct:_gpt_entry	typeref:typename:__le64
startup	include/phy.h	/^	int (*startup)(struct phy_device *phydev);$/;"	m	struct:phy_driver	typeref:typename:int (*)(struct phy_device * phydev)
startup_allowed	board/keymile/km_arm/km_arm.c	/^static int startup_allowed(void)$/;"	f	typeref:typename:int	file:
startup_ccdm_id_module	board/gdsys/p1022/controlcenterd-id.c	/^int startup_ccdm_id_module(void)$/;"	f	typeref:typename:int
startup_delay_us	drivers/power/regulator/fixed.c	/^	unsigned int startup_delay_us;$/;"	m	struct:fixed_regulator_platdata	typeref:typename:unsigned int	file:
startup_tsec	drivers/net/tsec.c	/^static void startup_tsec(struct tsec_private *priv)$/;"	f	typeref:typename:void	file:
starvation	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	starvation[0];$/;"	m	struct:qm_cfg_reg	typeref:typename:u32[0]
stat	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short stat;            \/* 0x28 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
stat	arch/arm/include/asm/arch-armv7/globaltimer.h	/^	u32 stat;$/;"	m	struct:globaltimer	typeref:typename:u32
stat	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 stat;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
stat	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	} stat[4];$/;"	m	struct:emc_regs	typeref:struct:emc_regs::emc_stat_t[4]
stat	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 stat;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 stat;   	\/* status *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 stat;$/;"	m	struct:cspi_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 stat;$/;"	m	struct:cspi_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 stat;	\/* status *\/$/;"	m	struct:gpt_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 stat;$/;"	m	struct:cspi_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	stat;$/;"	m	struct:iim_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 stat;$/;"	m	struct:cspi_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	stat;		\/* Status *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 stat;$/;"	m	struct:cspi_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	stat;		\/* Status *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 stat;$/;"	m	struct:cspi_regs	typeref:typename:u32
stat	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short stat;	\/* 0x08 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
stat	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short stat;		\/* 0x28 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
stat	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short stat;		\/* 0x28 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
stat	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	stat;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
stat	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 stat;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
stat	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 stat;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
stat	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 stat;		\/* 0x04 operating mode status register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
stat	arch/arm/include/asm/arch-sunxi/rsb.h	/^	u32 stat;	\/* 0x0c *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
stat	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 stat;		\/* 0x04 operating mode status register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
stat	arch/arm/include/asm/arch/rsb.h	/^	u32 stat;	\/* 0x0c *\/$/;"	m	struct:sunxi_rsb_reg	typeref:typename:u32
stat	arch/arm/include/asm/omap_mmc.h	/^	unsigned int stat;		\/* 0x130 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
stat	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	stat;		\/* 3c *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
stat	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	stat;$/;"	m	struct:socfpga_clock_manager	typeref:typename:u32
stat	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	stat;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
stat	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	stat;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
stat	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	stat;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
stat	arch/arm/mach-socfpga/include/mach/fpga_manager.h	/^	u32	stat;			\/* 0x00 *\/$/;"	m	struct:socfpga_fpga_manager	typeref:typename:u32
stat	arch/arm/mach-socfpga/include/mach/scan_manager.h	/^	u32	stat;$/;"	m	struct:socfpga_scan_manager	typeref:typename:u32
stat	arch/powerpc/include/asm/immap_512x.h	/^	u32 stat;		\/* IIM status register *\/$/;"	m	struct:iim512x	typeref:typename:u32
stat	drivers/i2c/lpc32xx_i2c.c	/^	u32 stat;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
stat	drivers/misc/fsl_iim.c	/^	u32 stat;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
stat	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 stat;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
stat	drivers/net/ethoc.c	/^	u32 stat;$/;"	m	struct:ethoc_bd	typeref:typename:u32	file:
stat	drivers/net/greth.h	/^	volatile unsigned int stat;$/;"	m	struct:_greth_bd	typeref:typename:volatile unsigned int
stat	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic stat; \/* 0xe0 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
stat	drivers/net/zynq_gem.c	/^	u32 stat[STAT_SIZE]; \/* 0x100 - Octects transmitted Low reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32[]	file:
stat	drivers/serial/serial_bcm283x_mu.c	/^	u32 stat;$/;"	m	struct:bcm283x_mu_regs	typeref:typename:u32	file:
stat	drivers/video/da8xx-fb.c	/^	u32	stat;$/;"	m	struct:da8xx_lcd_regs	typeref:typename:u32	file:
stat	drivers/video/ipu_regs.h	/^	u32 stat;$/;"	m	struct:ipu_dc	typeref:typename:u32
stat	drivers/video/ipu_regs.h	/^	u32 stat;$/;"	m	struct:ipu_di	typeref:typename:u32
stat	drivers/video/ipu_regs.h	/^	u32 stat;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
stat	include/grlib/greth.h	/^	volatile unsigned int stat;$/;"	m	struct:_greth_bd	typeref:typename:volatile unsigned int
stat	include/linux/stat.h	/^struct stat {$/;"	s
stat	include/vsc9953.h	/^	struct vsc9953_sys_stat	stat;$/;"	m	struct:vsc9953_system_reg	typeref:struct:vsc9953_sys_stat
stat0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 stat0;		\/*0x10*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
stat1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 stat1;		\/*0x94*\/$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
stat1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 stat1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
stat1	drivers/net/pic32_eth.h	/^	u32 stat1;	\/* transmit\/receive packet status *\/$/;"	m	struct:eth_dma_desc	typeref:typename:u32
stat1	drivers/usb/host/isp116x.h	/^	unsigned long stat1, stat2, stat4, stat8, stat16;$/;"	m	struct:isp116x	typeref:typename:unsigned long
stat1	include/andestech/andes_pcu.h	/^	unsigned int	stat1;		\/* PCSx Status 1 *\/$/;"	m	struct:pcs	typeref:typename:unsigned int
stat16	drivers/usb/host/isp116x.h	/^	unsigned long stat1, stat2, stat4, stat8, stat16;$/;"	m	struct:isp116x	typeref:typename:unsigned long
stat2	drivers/net/pic32_eth.h	/^	u32 stat2;	\/* transmit\/receive packet status *\/$/;"	m	struct:eth_dma_desc	typeref:typename:u32
stat2	drivers/usb/host/isp116x.h	/^	unsigned long stat1, stat2, stat4, stat8, stat16;$/;"	m	struct:isp116x	typeref:typename:unsigned long
stat2	include/andestech/andes_pcu.h	/^	unsigned int	stat2;		\/* PCSx Stusts 2 *\/$/;"	m	struct:pcs	typeref:typename:unsigned int
stat4	drivers/usb/host/isp116x.h	/^	unsigned long stat1, stat2, stat4, stat8, stat16;$/;"	m	struct:isp116x	typeref:typename:unsigned long
stat8	drivers/usb/host/isp116x.h	/^	unsigned long stat1, stat2, stat4, stat8, stat16;$/;"	m	struct:isp116x	typeref:typename:unsigned long
statCtrl	include/MCD_dma.h	/^	u16 statCtrl;$/;"	m	struct:MCD_bufDescFec_struct	typeref:typename:u16
stat_alrm	board/freescale/common/qixis.h	/^	u8 stat_alrm;$/;"	m	struct:qixis	typeref:typename:u8
stat_cfg	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	stat_cfg;	\/* status and config		*\/$/;"	m	struct:qm_config	typeref:typename:u32
stat_cfg	include/vsc9953.h	/^	u32	stat_cfg;$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32
stat_cnt_cfg	include/vsc9953.h	/^	u32	stat_cnt_cfg;$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32
stat_data	fs/reiserfs/reiserfs_private.h	/^struct stat_data {$/;"	s
stat_data_v1	fs/reiserfs/reiserfs_private.h	/^#define stat_data_v1(/;"	d
stat_data_v1	fs/reiserfs/reiserfs_private.h	/^struct stat_data_v1$/;"	s
stat_data_v2	fs/reiserfs/reiserfs_private.h	/^#define stat_data_v2(/;"	d
stat_desc	lib/zlib/deflate.h	/^    static_tree_desc *stat_desc; \/* the corresponding static tree *\/$/;"	m	struct:tree_desc_s	typeref:typename:static_tree_desc *
stat_dut	board/freescale/common/qixis.h	/^	u8 stat_dut;$/;"	m	struct:qixis	typeref:typename:u8
stat_port_en	drivers/net/cpsw.c	/^	u32	stat_port_en;$/;"	m	struct:cpsw_regs	typeref:typename:u32	file:
stat_req	drivers/usb/gadget/ether.c	/^	struct usb_request	*stat_req;	\/* for cdc & rndis status *\/$/;"	m	struct:eth_dev	typeref:struct:usb_request *	file:
stat_src	drivers/crypto/fsl/error.c	/^	static const struct stat_src {$/;"	s	function:caam_jr_strstatus	file:
stat_sys	board/freescale/common/qixis.h	/^	u8 stat_sys;$/;"	m	struct:qixis	typeref:typename:u8
state	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t state;$/;"	m	struct:cmd_clk_is_enabled_response	typeref:typename:int32_t
state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 state;$/;"	m	struct:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a::__anon775fc5441b08	typeref:typename:u32
state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 state;$/;"	m	struct:bcm2835_mbox_tag_blank_screen::__anon775fc5441a0a::__anon775fc5441c08	typeref:typename:u32
state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 state;$/;"	m	struct:bcm2835_mbox_tag_get_power_state::__anon775fc5440b0a::__anon775fc5440d08	typeref:typename:u32
state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 state;$/;"	m	struct:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a::__anon775fc5440f08	typeref:typename:u32
state	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 state;$/;"	m	struct:bcm2835_mbox_tag_set_power_state::__anon775fc5440e0a::__anon775fc5441008	typeref:typename:u32
state	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned int			state;$/;"	m	struct:mipi_dsim_device	typeref:typename:unsigned int
state	arch/arm/mach-tegra/ivc.c	/^			uint32_t state;$/;"	m	struct:tegra_ivc_channel_header::__anon00ce435c010a::__anon00ce435c0208	typeref:typename:uint32_t	file:
state	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 state;$/;"	m	struct:ed	typeref:typename:__u8
state	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int   state;$/;"	m	struct:__anon08a6674e0108	typeref:typename:int
state	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 state;$/;"	m	struct:ed	typeref:typename:__u8
state	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int   state;$/;"	m	struct:__anonb10e26e60108	typeref:typename:int
state	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		enum { Idle, Running, Closing, Closed } state;$/;"	m	struct:__anon7d79ed4b0408	typeref:enum:__anon7d79ed4b0408::__anon7d79ed4b0503	file:
state	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 state;$/;"	m	struct:ed	typeref:typename:__u8
state	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int state;$/;"	m	struct:__anond5d032300108	typeref:typename:int
state	arch/sandbox/cpu/state.c	/^static struct sandbox_state *state;	\/* Pointer to current state record *\/$/;"	v	typeref:struct:sandbox_state *	file:
state	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			state;$/;"	m	struct:ffs_file_header	typeref:typename:u8
state	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			state;$/;"	m	struct:ffs_file_header2	typeref:typename:u8
state	arch/x86/include/asm/me_common.h	/^	u8 state;$/;"	m	struct:tdt_state_info	typeref:typename:u8
state	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 state;$/;"	m	struct:__anonde02bb4d0208	typeref:typename:u8
state	board/socrates/nand.c	/^static int state;$/;"	v	typeref:typename:int	file:
state	drivers/misc/status_led.c	/^	int state;$/;"	m	struct:__anonb49c34f70108	typeref:typename:int	file:
state	drivers/mtd/nand/pxa3xx_nand.c	/^	unsigned int		state;$/;"	m	struct:pxa3xx_nand_info	typeref:typename:unsigned int	file:
state	drivers/mtd/spi/sandbox.c	/^	enum sandbox_sf_state state;$/;"	m	struct:sandbox_spi_flash	typeref:enum:sandbox_sf_state	file:
state	drivers/usb/gadget/atmel_usba_udc.h	/^	int					state;$/;"	m	struct:usba_ep	typeref:typename:int
state	drivers/usb/gadget/f_mass_storage.c	/^	enum fsg_state		state;		\/* For exception handling *\/$/;"	m	struct:fsg_common	typeref:enum:fsg_state	file:
state	drivers/usb/gadget/fotg210.c	/^	enum usb_device_state     state;$/;"	m	struct:fotg210_chip	typeref:enum:usb_device_state	file:
state	drivers/usb/gadget/rndis.h	/^	enum rndis_state	state;$/;"	m	struct:rndis_params	typeref:enum:rndis_state
state	drivers/usb/gadget/storage_common.c	/^	enum fsg_buffer_state		state;$/;"	m	struct:fsg_buffhd	typeref:enum:fsg_buffer_state	file:
state	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 state;$/;"	m	struct:ed	typeref:typename:__u8
state	drivers/usb/host/ohci-s3c24xx.h	/^	int state;$/;"	m	struct:urb_priv	typeref:typename:int
state	drivers/usb/host/ohci.h	/^	__u8 state;$/;"	m	struct:ed	typeref:typename:__u8
state	drivers/usb/host/ohci.h	/^	int   state;$/;"	m	struct:__anone9fd91320108	typeref:typename:int
state	examples/standalone/sched.c	/^	int state;$/;"	m	struct:lthread	typeref:typename:int	file:
state	include/api_public.h	/^	int	state;$/;"	m	struct:device_info	typeref:typename:int
state	include/bzlib.h	/^      void *state;$/;"	m	struct:__anond8626de10108	typeref:typename:void *
state	include/dataflash.h	/^	volatile unsigned char state;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:volatile unsigned char
state	include/ec_commands.h	/^	uint8_t state;$/;"	m	struct:ec_params_ldo_set	typeref:typename:uint8_t
state	include/ec_commands.h	/^	uint8_t state;$/;"	m	struct:ec_response_ldo_get	typeref:typename:uint8_t
state	include/efi_api.h	/^	enum efi_simple_network_state state;$/;"	m	struct:efi_simple_network_mode	typeref:enum:efi_simple_network_state
state	include/fsl-mc/fsl_dprc.h	/^	uint32_t state;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint32_t
state	include/fsl_qe.h	/^	qe_snum_state_e	state; \/* state *\/$/;"	m	struct:qe_snum	typeref:typename:qe_snum_state_e
state	include/image.h	/^	int		state;$/;"	m	struct:bootm_headers	typeref:typename:int
state	include/linux/fb.h	/^	u32 state;			\/* Hardware state i.e suspend *\/$/;"	m	struct:fb_info	typeref:typename:u32
state	include/linux/mtd/flashchip.h	/^	flstate_t state;$/;"	m	struct:flchip	typeref:typename:flstate_t
state	include/linux/mtd/mtd.h	/^	u_char state;$/;"	m	struct:erase_info	typeref:typename:u_char
state	include/linux/mtd/nand.h	/^	flstate_t state;$/;"	m	struct:nand_chip	typeref:typename:flstate_t
state	include/linux/mtd/onenand.h	/^	int state;$/;"	m	struct:onenand_chip	typeref:typename:int
state	include/linux/usb/gadget.h	/^	enum usb_device_state		state;$/;"	m	struct:usb_gadget	typeref:enum:usb_device_state
state	include/net.h	/^	int state;$/;"	m	struct:eth_device	typeref:typename:int
state	include/power/battery.h	/^	unsigned int state;$/;"	m	struct:battery	typeref:typename:unsigned int
state	include/u-boot/sha1.h	/^    unsigned long state[5];	\/*!< intermediate digest state	*\/$/;"	m	struct:__anoncf962b200108	typeref:typename:unsigned long[5]
state	include/u-boot/sha256.h	/^	uint32_t state[8];$/;"	m	struct:__anon0de293ec0108	typeref:typename:uint32_t[8]
state	include/u-boot/zlib.h	/^	struct	internal_state FAR *state; \/* not visible by applications *\/$/;"	m	struct:z_stream_s	typeref:struct:internal_state FAR *
state	include/usbdevice.h	/^	int state;		\/* available for use by bus interface driver *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
state	lib/bzip2/bzlib_private.h	/^      Int32    state;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
state	lib/bzip2/bzlib_private.h	/^      Int32    state;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
state	lib/lzma/LzmaDec.h	/^  unsigned state;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:unsigned
state	net/eth-uclass.c	/^	enum eth_state_t state;$/;"	m	struct:eth_device_priv	typeref:enum:eth_state_t	file:
state	net/link_local.c	/^} state = DISABLED;$/;"	v	typeref:enum:ll_state_t	file:
state	scripts/kconfig/zconf.lex.c	/^	YY_BUFFER_STATE state;$/;"	m	struct:buffer	typeref:typename:YY_BUFFER_STATE	file:
state_access	arch/arm/include/asm/arch-tegra/dc.h	/^	uint state_access;		\/* _CMD_STATE_ACCESS_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
state_app_detach	drivers/usb/gadget/f_dfu.c	/^static int state_app_detach(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_app_idle	drivers/usb/gadget/f_dfu.c	/^static int state_app_idle(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint state_ctrl;		\/* _CMD_STATE_CONTROL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
state_default	arch/arm/dts/tegra20-harmony.dts	/^		state_default: pinmux {$/;"	l
state_default	arch/arm/dts/tegra20-seaboard.dts	/^		state_default: pinmux {$/;"	l
state_default	arch/arm/dts/tegra20-tamonten.dtsi	/^		state_default: pinmux {$/;"	l
state_default	arch/arm/dts/tegra20-ventana.dts	/^		state_default: pinmux {$/;"	l
state_dfu_dnbusy	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_dnbusy(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_dnload_idle	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_dnload_idle(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_dnload_sync	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_dnload_sync(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_error	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_error(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_idle	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_idle(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_manifest	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_manifest(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_manifest_sync	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_manifest_sync(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_dfu_upload_idle	drivers/usb/gadget/f_dfu.c	/^static int state_dfu_upload_idle(struct f_dfu *f_dfu,$/;"	f	typeref:typename:int	file:
state_ensure_space	arch/sandbox/cpu/state.c	/^static int state_ensure_space(int extra_size)$/;"	f	typeref:typename:int	file:
state_fdt	arch/sandbox/include/asm/state.h	/^	void *state_fdt;		\/* Holds saved state for sandbox *\/$/;"	m	struct:sandbox_state	typeref:typename:void *
state_fname	arch/sandbox/include/asm/state.h	/^	const char *state_fname;	\/* File containing sandbox state *\/$/;"	m	struct:sandbox_state	typeref:typename:const char *
state_get_current	arch/sandbox/cpu/state.c	/^struct sandbox_state *state_get_current(void)$/;"	f	typeref:struct:sandbox_state *
state_get_skip_delays	arch/sandbox/cpu/state.c	/^bool state_get_skip_delays(void)$/;"	f	typeref:typename:bool
state_i2cmux_ddc	arch/arm/dts/tegra20-seaboard.dts	/^		state_i2cmux_ddc: pinmux_i2cmux_ddc {$/;"	l
state_i2cmux_ddc	arch/arm/dts/tegra20-tamonten.dtsi	/^		state_i2cmux_ddc: pinmux_i2cmux_ddc {$/;"	l
state_i2cmux_ddc	arch/arm/dts/tegra20-ventana.dts	/^		state_i2cmux_ddc: pinmux_i2cmux_ddc {$/;"	l
state_i2cmux_idle	arch/arm/dts/tegra20-seaboard.dts	/^		state_i2cmux_idle: pinmux_i2cmux_idle {$/;"	l
state_i2cmux_idle	arch/arm/dts/tegra20-tamonten.dtsi	/^		state_i2cmux_idle: pinmux_i2cmux_idle {$/;"	l
state_i2cmux_idle	arch/arm/dts/tegra20-ventana.dts	/^		state_i2cmux_idle: pinmux_i2cmux_idle {$/;"	l
state_i2cmux_pta	arch/arm/dts/tegra20-seaboard.dts	/^		state_i2cmux_pta: pinmux_i2cmux_pta {$/;"	l
state_i2cmux_pta	arch/arm/dts/tegra20-tamonten.dtsi	/^		state_i2cmux_pta: pinmux_i2cmux_pta {$/;"	l
state_i2cmux_pta	arch/arm/dts/tegra20-ventana.dts	/^		state_i2cmux_pta: pinmux_i2cmux_pta {$/;"	l
state_in_ch	lib/bzip2/bzlib_private.h	/^      UInt32   state_in_ch;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UInt32
state_in_len	lib/bzip2/bzlib_private.h	/^      Int32    state_in_len;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
state_init	arch/sandbox/cpu/state.c	/^int state_init(void)$/;"	f	typeref:typename:int
state_name	drivers/usb/gadget/pxa25x_udc.c	/^static const char * const state_name[] = {$/;"	v	typeref:typename:const char * const[]	file:
state_names	drivers/usb/gadget/dwc2_udc_otg.c	/^static char *state_names[] = {$/;"	v	typeref:typename:char * []	file:
state_of_chrg	include/power/battery.h	/^	unsigned int state_of_chrg;$/;"	m	struct:battery	typeref:typename:unsigned int
state_out_ch	lib/bzip2/bzlib_private.h	/^      UChar    state_out_ch;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UChar
state_out_len	lib/bzip2/bzlib_private.h	/^      Int32    state_out_len;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
state_out_pos	lib/bzip2/bzlib_private.h	/^      Int32    state_out_pos;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
state_read_file	arch/sandbox/cpu/state.c	/^static int state_read_file(struct sandbox_state *state, const char *fname)$/;"	f	typeref:typename:int	file:
state_set_skip_delays	arch/sandbox/cpu/state.c	/^void state_set_skip_delays(bool skip_delays)$/;"	f	typeref:typename:void
state_setprop	arch/sandbox/cpu/state.c	/^int state_setprop(int node, const char *prop_name, const void *data, int size)$/;"	f	typeref:typename:int
state_terminal_raw	arch/sandbox/include/asm/state.h	/^enum state_terminal_raw {$/;"	g
state_test_env	test/py/tests/test_env.py	/^def state_test_env(u_boot_console):$/;"	f
state_uninit	arch/sandbox/cpu/state.c	/^int state_uninit(void)$/;"	f	typeref:typename:int
statement_block_size	scripts/checkpatch.pl	/^sub statement_block_size {$/;"	s
statement_lines	scripts/checkpatch.pl	/^sub statement_lines {$/;"	s
statement_rawlines	scripts/checkpatch.pl	/^sub statement_rawlines {$/;"	s
states	arch/x86/include/asm/speedstep.h	/^	struct sst_state states[SPEEDSTEP_MAX_STATES];$/;"	m	struct:sst_table	typeref:struct:sst_state[]
states	drivers/power/regulator/gpio-regulator.c	/^	int states[GPIO_REGULATOR_MAX_STATES];$/;"	m	struct:gpio_regulator_platdata	typeref:typename:int[]	file:
statfs	fs/ubifs/ubifs.h	/^	int (*statfs) (struct dentry *, struct kstatfs *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct dentry *,struct kstatfs *)
static_bl_desc	lib/zlib/trees.c	/^local static_tree_desc  static_bl_desc =$/;"	v	typeref:typename:local static_tree_desc
static_cast	arch/powerpc/include/asm/ppc4xx.h	/^#define	static_cast(/;"	d
static_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	static_cfg;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
static_cfg	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	static_cfg;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
static_config	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^struct hws_tip_static_config_info static_config[HWS_MAX_DEVICE_NUM];$/;"	v	typeref:struct:hws_tip_static_config_info[]
static_d_desc	lib/zlib/trees.c	/^local static_tree_desc  static_d_desc =$/;"	v	typeref:typename:local static_tree_desc
static_dtree	lib/zlib/trees.c	/^local ct_data static_dtree[D_CODES];$/;"	v	typeref:typename:local ct_data[]
static_dtree	lib/zlib/trees.h	/^local const ct_data static_dtree[D_CODES] = {$/;"	v	typeref:typename:local const ct_data[]
static_get	common/cli_hush.c	/^static int static_get(struct in_str *i)$/;"	f	typeref:typename:int	file:
static_init_controller_config	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^static reg_data *static_init_controller_config[HWS_MAX_DEVICE_NUM];$/;"	v	typeref:typename:reg_data * []	file:
static_l_desc	lib/zlib/trees.c	/^local static_tree_desc  static_l_desc =$/;"	v	typeref:typename:local static_tree_desc
static_len	lib/zlib/deflate.h	/^    ulg static_len;     \/* bit length of current block with static trees *\/$/;"	m	struct:internal_state	typeref:typename:ulg
static_ltree	lib/zlib/trees.c	/^local ct_data static_ltree[L_CODES+2];$/;"	v	typeref:typename:local ct_data[]
static_ltree	lib/zlib/trees.h	/^local const ct_data static_ltree[L_CODES+2] = {$/;"	v	typeref:typename:local const ct_data[]
static_peek	common/cli_hush.c	/^static int static_peek(struct in_str *i)$/;"	f	typeref:typename:int	file:
static_tree	lib/zlib/trees.c	/^    const ct_data *static_tree;  \/* static tree or NULL *\/$/;"	m	struct:static_tree_desc_s	typeref:typename:const ct_data *	file:
static_tree_desc	lib/zlib/deflate.h	/^typedef struct static_tree_desc_s  static_tree_desc;$/;"	t	typeref:struct:static_tree_desc_s
static_tree_desc_s	lib/zlib/deflate.c	/^struct static_tree_desc_s {int dummy;}; \/* for buggy compilers *\/$/;"	s	file:
static_tree_desc_s	lib/zlib/trees.c	/^struct static_tree_desc_s {$/;"	s	file:
statid	include/universe.h	/^	unsigned int statid;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
statm	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	statm;$/;"	m	struct:iim_regs	typeref:typename:u32
statm	arch/powerpc/include/asm/immap_512x.h	/^	u32 statm;		\/* IIM status IRQ mask *\/$/;"	m	struct:iim512x	typeref:typename:u32
statm	drivers/misc/fsl_iim.c	/^	u32 statm;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
statn_config	include/fsl_memac.h	/^	u32	statn_config;	\/* Statistics configuration register *\/$/;"	m	struct:memac	typeref:typename:u32
statr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 statr;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 statr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 statr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 statr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 statr;		\/* 0x04 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 statr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 statr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
statr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 statr;		\/* 0x18 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
stats	arch/powerpc/include/asm/ppc4xx-emac.h	/^    EMAC_STATS_ST	stats;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:EMAC_STATS_ST
stats	drivers/block/sata_dwc.h	/^	struct ata_port_stats	stats;$/;"	m	struct:ata_port	typeref:struct:ata_port_stats
stats	drivers/net/greth.c	/^	} stats;$/;"	m	struct:__anonb53b88540108	typeref:struct:__anonb53b88540108::__anonb53b88540208	file:
stats	drivers/net/mvpp2.c	/^	struct mvpp2_pcpu_stats __percpu *stats;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2_pcpu_stats __percpu *	file:
stats	drivers/usb/gadget/ether.c	/^	struct net_device_stats	stats;$/;"	m	struct:eth_dev	typeref:struct:net_device_stats	file:
stats	drivers/usb/gadget/pxa25x_udc.h	/^	struct udc_stats			stats;$/;"	m	struct:pxa25x_udc	typeref:struct:udc_stats
stats	drivers/usb/gadget/rndis.h	/^	struct net_device_stats *stats;$/;"	m	struct:rndis_params	typeref:struct:net_device_stats *
stats_block_coalesce_usecs	include/linux/ethtool.h	/^	__u32	stats_block_coalesce_usecs;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
status	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 status[3];$/;"	m	struct:armd1tmr_registers	typeref:typename:u32[3]	file:
status	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int status;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
status	arch/arm/cpu/armv7/mx6/soc.c	/^	u32	status;$/;"	m	struct:scu_regs	typeref:typename:u32	file:
status	arch/arm/imx-common/timer.c	/^	unsigned int status;$/;"	m	struct:mxc_gpt	typeref:typename:unsigned int	file:
status	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t status;$/;"	m	struct:dma_channel	typeref:typename:uint32_t
status	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 status;			\/* Status *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
status	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 status;	\/* Status register for AHB                   *\/$/;"	m	struct:emc_regs::emc_ahb_t	typeref:typename:u32
status	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 status;		\/* Provides EMC status information           *\/$/;"	m	struct:emc_regs	typeref:typename:u32
status	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 status;			\/* Status *\/$/;"	m	struct:ccsr_cci400	typeref:typename:u32
status	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 status;		\/* 0x14 *\/$/;"	m	struct:sdrc	typeref:typename:u32
status	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 status;		\/* 0x2F0 *\/$/;"	m	struct:ctrl	typeref:typename:u32
status	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 status;				\/* 0x04 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
status	arch/arm/include/asm/arch-spear/spr_gpt.h	/^	u32 status;$/;"	m	struct:gpt_regs	typeref:typename:u32
status	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 status;		\/* base + 0x8 *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u32
status	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 status;			\/* 0x068 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
status	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 status;$/;"	m	struct:de_glb	typeref:typename:u32
status	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 status;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
status	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 status;		\/* 0x3c status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
status	arch/arm/include/asm/arch-sunxi/p2wi.h	/^	u32 status;	\/* 0x0c status *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
status	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t status;$/;"	m	struct:mrq_query_abi_response	typeref:typename:int32_t
status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 status;			\/* 0C: DVC_STATUS_REG *\/$/;"	m	struct:dvc_ctlr	typeref:typename:u32
status	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 status;			\/* 1C: I2C_I2C_STATUS *\/$/;"	m	struct:i2c_ctlr	typeref:typename:u32
status	arch/arm/include/asm/arch/cpucfg.h	/^	u32 status;		\/* base + 0x8 *\/$/;"	m	struct:sunxi_cpucfg_cpu	typeref:typename:u32
status	arch/arm/include/asm/arch/display.h	/^	u32 status;			\/* 0x068 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
status	arch/arm/include/asm/arch/display2.h	/^	u32 status;$/;"	m	struct:de_glb	typeref:typename:u32
status	arch/arm/include/asm/arch/display2.h	/^	u32 status;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
status	arch/arm/include/asm/arch/mmc.h	/^	u32 status;		\/* 0x3c status *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
status	arch/arm/include/asm/arch/p2wi.h	/^	u32 status;	\/* 0x0c status *\/$/;"	m	struct:sunxi_p2wi_reg	typeref:typename:u32
status	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	status;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
status	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 status;$/;"	m	struct:bcm2835_mbox_regs	typeref:typename:u32
status	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	status;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
status	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int status;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
status	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	status;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
status	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	status;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
status	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 status; \/* 0x14 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
status	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 status;$/;"	m	struct:efuse_reg	typeref:typename:u32
status	arch/blackfin/include/asm/dma.h	/^	u32 status;		\/* DMA irq status register *\/$/;"	m	struct:dma_register	typeref:typename:u32
status	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 status;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
status	arch/blackfin/include/asm/serial4.h	/^	u32 status;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
status	arch/mips/mach-au1x00/au1x00_eth.c	/^	u32 status;$/;"	m	struct:__anon03662d5e0108	typeref:typename:u32	file:
status	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^		__u32	status;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
status	arch/nios2/include/asm/ptrace.h	/^	unsigned status;$/;"	m	struct:pt_regs	typeref:typename:unsigned
status	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^		__u32	status;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
status	arch/powerpc/cpu/mpc8260/i2c.c	/^	unsigned short status;$/;"	m	struct:I2C_BD	typeref:typename:unsigned short	file:
status	arch/powerpc/cpu/mpc8xx/i2c.c	/^	unsigned short status;$/;"	m	struct:I2C_BD	typeref:typename:unsigned short	file:
status	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^		__u32 status;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
status	arch/powerpc/include/asm/immap_512x.h	/^		volatile u16	status;$/;"	m	union:psc512x::__anond569131d010a	typeref:typename:volatile u16
status	arch/sparc/cpu/leon3/usb_uhci.h	/^	unsigned long status;	\/* status of the td *\/$/;"	m	struct:__anon66fd0d690108	typeref:typename:unsigned long
status	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t status;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
status	arch/x86/include/asm/me_common.h	/^	u32 status:4;$/;"	m	struct:me_did	typeref:typename:u32:4
status	board/amcc/luan/epld.h	/^    unsigned char  status;		\/* misc status *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
status	board/esd/pmc405de/pmc405de.c	/^	u8 status;$/;"	m	struct:pmc405de_cpld	typeref:typename:u8	file:
status	board/esd/pmc440/pmc440.h	/^	u32 status;$/;"	m	struct:pmc440_fpga_s	typeref:typename:u32
status	board/esd/vme8349/caddy.h	/^	uint32_t status;$/;"	m	struct:caddy_answer	typeref:typename:uint32_t
status	board/mpl/common/usb_uhci.h	/^	unsigned long status;   \/* status of the td *\/$/;"	m	struct:__anon0a2b4c740108	typeref:typename:unsigned long
status	board/synopsys/axs10x/nand.c	/^	uint32_t status;	\/* DES0 *\/$/;"	m	struct:nand_bd	typeref:typename:uint32_t	file:
status	disk/part_mac.h	/^	__u32	status;		\/* partition status bits		*\/$/;"	m	struct:mac_partition	typeref:typename:__u32
status	drivers/block/mxc_ata.c	/^	u32	status;$/;"	m	struct:mxc_data_hdd_regs	typeref:typename:u32	file:
status	drivers/crypto/fsl/jr.h	/^	uint32_t status;$/;"	m	struct:op_ring	typeref:typename:uint32_t
status	drivers/crypto/fsl/jr.h	/^	uint32_t status;$/;"	m	struct:result	typeref:typename:uint32_t
status	drivers/ddr/marvell/axp/xor.h	/^	u32 status;		\/* Successful descriptor execution indication *\/$/;"	m	struct:crc_dma_desc	typeref:typename:u32
status	drivers/i2c/at91_i2c.h	/^	u32 status;$/;"	m	struct:at91_i2c_bus	typeref:typename:u32
status	drivers/i2c/i2c-cdns.c	/^	u32 status;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
status	drivers/i2c/mvtwsi.c	/^		u32 status;	\/* When reading *\/$/;"	m	union:mvtwsi_registers::__anon726e98bb010a	typeref:typename:u32	file:
status	drivers/i2c/mvtwsi.c	/^	u32 status;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
status	drivers/i2c/zynq_i2c.c	/^	u32 status;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
status	drivers/mmc/arm_pl180_mmci.h	/^	u32 status;		\/* 0x34*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
status	drivers/mmc/mxcmmc.c	/^	u32 status;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
status	drivers/mtd/nand/denali.h	/^	int status;$/;"	m	struct:denali_nand_info	typeref:typename:int
status	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int status;     \/* status read from LTESR after last op  *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
status	drivers/mtd/nand/fsl_ifc_nand.c	/^	unsigned int status;     \/* status read from NEESR after last op  *\/$/;"	m	struct:fsl_ifc_ctrl	typeref:typename:unsigned int	file:
status	drivers/mtd/nand/tegra_nand.h	/^	u32	status;		\/* offset 04h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
status	drivers/mtd/spi/sandbox.c	/^	u16 status;$/;"	m	struct:sandbox_spi_flash	typeref:typename:u16	file:
status	drivers/net/altera_tse.h	/^	u32 status;		\/* Read\/Clear *\/$/;"	m	struct:msgdma_csr	typeref:typename:u32
status	drivers/net/altera_tse.h	/^	u32 status;$/;"	m	struct:alt_sgdma_registers	typeref:typename:u32
status	drivers/net/altera_tse.h	/^	u32 status;$/;"	m	struct:msgdma_response	typeref:typename:u32
status	drivers/net/dc2114x.c	/^	volatile s32 status;$/;"	m	struct:de4x5_desc	typeref:typename:volatile s32	file:
status	drivers/net/designware.h	/^	u32 status;		\/* 0x14 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
status	drivers/net/e1000.h	/^			uint8_t status;	\/* Descriptor status *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345180a::__anon7fc273451908	typeref:typename:uint8_t
status	drivers/net/e1000.h	/^			uint8_t status;	\/* Descriptor status *\/$/;"	m	struct:e1000_data_desc::__anon7fc273451c0a::__anon7fc273451d08	typeref:typename:uint8_t
status	drivers/net/e1000.h	/^			uint8_t status;	\/* Descriptor status *\/$/;"	m	struct:e1000_tx_desc::__anon7fc27345120a::__anon7fc273451308	typeref:typename:uint8_t
status	drivers/net/e1000.h	/^	uint8_t status;		\/* Descriptor status *\/$/;"	m	struct:e1000_rx_desc	typeref:typename:uint8_t
status	drivers/net/eepro100.c	/^	volatile u16 status;$/;"	m	struct:RxFD	typeref:typename:volatile u16	file:
status	drivers/net/eepro100.c	/^	volatile u16 status;$/;"	m	struct:TxFD	typeref:typename:volatile u16	file:
status	drivers/net/eepro100.c	/^	volatile u16 status;$/;"	m	struct:descriptor	typeref:typename:volatile u16	file:
status	drivers/net/fec_mxc.h	/^	uint16_t status;		\/* BD's staus (see datasheet) *\/$/;"	m	struct:fec_bd	typeref:typename:uint16_t
status	drivers/net/fm/fm.h	/^	u16 status;$/;"	m	struct:fm_port_bd	typeref:typename:u16
status	drivers/net/greth.h	/^	volatile unsigned int status;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
status	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	__le32 status;$/;"	m	struct:ldpaa_fas	typeref:typename:__le32
status	drivers/net/lpc32xx_eth.c	/^	u32 status;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
status	drivers/net/mpc512x_fec.h	/^	u16 status;$/;"	m	struct:BufferDescriptor	typeref:typename:u16
status	drivers/net/mpc512x_fec.h	/^	u16 status;$/;"	m	struct:__anonf8b8c0fc0108	typeref:typename:u16
status	drivers/net/mpc5xxx_fec.h	/^	uint16 status;$/;"	m	struct:BufferDescriptor	typeref:typename:uint16
status	drivers/net/mpc5xxx_fec.h	/^	uint16 status;$/;"	m	struct:__anone13c4dc90108	typeref:typename:uint16
status	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 status;			\/* MBAR_ETH + 0x1F0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
status	drivers/net/mvneta.c	/^	u32  status;		\/* Info about received packet		*\/$/;"	m	struct:mvneta_rx_desc	typeref:typename:u32	file:
status	drivers/net/mvpp2.c	/^	u32 status;		\/* info about received packet		*\/$/;"	m	struct:mvpp2_rx_desc	typeref:typename:u32	file:
status	drivers/net/pcnet.c	/^	s16 status;$/;"	m	struct:pcnet_rx_head	typeref:typename:s16	file:
status	drivers/net/pcnet.c	/^	s16 status;$/;"	m	struct:pcnet_tx_head	typeref:typename:s16	file:
status	drivers/net/rtl8169.c	/^	u32 status;$/;"	m	struct:RxDesc	typeref:typename:u32	file:
status	drivers/net/rtl8169.c	/^	u32 status;$/;"	m	struct:TxDesc	typeref:typename:u32	file:
status	drivers/net/sun8i_emac.c	/^	u32 status;$/;"	m	struct:emac_dma_desc	typeref:typename:u32	file:
status	drivers/net/xilinx_axi_emac.c	/^	u32 status;	\/* Status *\/$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
status	drivers/net/xilinx_axi_emac.c	/^	u32 status; \/* DMASR *\/$/;"	m	struct:axidma_reg	typeref:typename:u32	file:
status	drivers/net/zynq_gem.c	/^	u32 status;$/;"	m	struct:emac_bd	typeref:typename:u32	file:
status	drivers/qe/uec.h	/^	u16 status;$/;"	m	struct:buffer_descriptor	typeref:typename:u16
status	drivers/serial/altera_uart.c	/^	u32	status;		\/* Status reg *\/$/;"	m	struct:altera_uart_regs	typeref:typename:u32	file:
status	drivers/serial/serial_arc.c	/^	unsigned int status;$/;"	m	struct:arc_serial_regs	typeref:typename:unsigned int	file:
status	drivers/serial/serial_meson.c	/^	u32 status;$/;"	m	struct:meson_uart	typeref:typename:u32	file:
status	drivers/serial/serial_xuartlite.c	/^	unsigned int status;$/;"	m	struct:uartlite	typeref:typename:unsigned int	file:
status	drivers/spi/altera_spi.c	/^	u32	status;$/;"	m	struct:altera_spi_regs	typeref:typename:u32	file:
status	drivers/spi/ich.h	/^	int status;$/;"	m	struct:ich_spi_priv	typeref:typename:int
status	drivers/spi/pic32_spi.c	/^	struct pic32_reg_atomic status;$/;"	m	struct:pic32_reg_spi	typeref:struct:pic32_reg_atomic	file:
status	drivers/spi/tegra20_sflash.c	/^	u32 status;	\/* SPI_STATUS_0 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
status	drivers/spi/tegra20_slink.c	/^	u32 status;	\/* SLINK_STATUS_0 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
status	drivers/spi/ti_qspi.c	/^	u32 status;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
status	drivers/timer/altera_timer.c	/^	u32	status;		\/* Timer status reg *\/$/;"	m	struct:altera_timer_regs	typeref:typename:u32	file:
status	drivers/usb/dwc3/core.h	/^	u32	status:4;$/;"	m	struct:dwc3_event_depevt	typeref:typename:u32:4
status	drivers/usb/emul/sandbox_flash.c	/^	struct umass_bbb_csw status;$/;"	m	struct:sandbox_flash_priv	typeref:struct:umass_bbb_csw	file:
status	drivers/usb/emul/sandbox_hub.c	/^	int status[SANDBOX_NUM_PORTS];$/;"	m	struct:sandbox_hub_priv	typeref:typename:int[]	file:
status	drivers/usb/gadget/ether.c	/^				*in, *out, *status;$/;"	m	struct:eth_dev	typeref:typename:const struct usb_endpoint_descriptor *	file:
status	drivers/usb/host/ohci-s3c24xx.h	/^		__u32 status;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
status	drivers/usb/host/ohci.h	/^		__u32	status;$/;"	m	struct:ohci_regs::ohci_roothub_regs	typeref:typename:__u32
status	drivers/usb/host/xhci-keystone.c	/^		u32 status;$/;"	m	struct:kdwc3_irq_regs::__anoncc7370550108	typeref:typename:u32	file:
status	drivers/usb/host/xhci.h	/^	volatile __le32 status;$/;"	m	struct:xhci_event_cmd	typeref:typename:volatile __le32
status	drivers/usb/musb-new/musb_dma.h	/^	enum dma_channel_status	status;$/;"	m	struct:dma_channel	typeref:enum:dma_channel_status
status	drivers/usb/musb-new/musb_dsps.c	/^	u16	status;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u16	file:
status	drivers/usb/musb-new/omap2430.c	/^	enum omap_musb_vbus_id_status status;$/;"	m	struct:omap2430_glue	typeref:enum:omap_musb_vbus_id_status	file:
status	drivers/usb/musb-new/usb-compat.h	/^	int status;			\/* (return) non-ISO status *\/$/;"	m	struct:urb	typeref:typename:int
status	drivers/usb/musb/am35x.h	/^	u32	status;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
status	include/ACEX1K.h	/^	Altera_status_fn	status;$/;"	m	struct:__anon8a29702b0108	typeref:typename:Altera_status_fn
status	include/ACEX1K.h	/^	Altera_status_fn	status;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_status_fn
status	include/ahci.h	/^	u32	status;$/;"	m	struct:ahci_cmd_hdr	typeref:typename:u32
status	include/altera.h	/^	Altera_status_fn status;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_status_fn
status	include/dm-demo.h	/^	int (*status)(struct udevice *dev, int *status);$/;"	m	struct:demo_ops	typeref:typename:int (*)(struct udevice * dev,int * status)
status	include/ec_commands.h	/^		} status;$/;"	m	union:ec_params_keyscan_seq_ctrl::__anon71a6b267060a	typeref:struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670708
status	include/ec_commands.h	/^	uint8_t status;          \/* enum ec_vboot_hash_status *\/$/;"	m	struct:ec_response_vboot_hash	typeref:typename:uint8_t
status	include/faraday/ftsdc010.h	/^	unsigned int	status;		\/* 0x28 - status reg		*\/$/;"	m	struct:ftsdc010_mmc	typeref:typename:unsigned int
status	include/fis.h	/^	u8 status;$/;"	m	struct:sata_fis_d2h	typeref:typename:u8
status	include/fis.h	/^	u8 status;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u8
status	include/fsl_tgec.h	/^	u32	status;		\/* MAC status register *\/$/;"	m	struct:tgec	typeref:typename:u32
status	include/grlib/apbuart.h	/^	volatile unsigned int status;$/;"	m	struct:__anon8f85467c0108	typeref:typename:volatile unsigned int
status	include/grlib/greth.h	/^	volatile unsigned int status;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
status	include/linux/mtd/omap_gpmc.h	/^	u32 status;		\/* 0x54 *\/$/;"	m	struct:gpmc	typeref:typename:u32
status	include/linux/usb/gadget.h	/^	int			status;$/;"	m	struct:usb_request	typeref:typename:int
status	include/mpc5xxx.h	/^		volatile u16	status;$/;"	m	union:mpc5xxx_psc::__anon151a8a6b010a	typeref:typename:volatile u16
status	include/mpc5xxx.h	/^	volatile u32 status;		\/* XLB + 0x48 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
status	include/mpc5xxx.h	/^	volatile u8 status;		\/* WU_GPIO + 0x24 *\/$/;"	m	struct:mpc5xxx_wu_gpio	typeref:typename:volatile u8
status	include/scsi.h	/^	unsigned char		status;						\/* SCSI Status			 *\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char
status	include/smbios.h	/^	u8 status;$/;"	m	struct:smbios_type4	typeref:typename:u8
status	include/tsec.h	/^	uint16_t status;	\/* Status Fields *\/$/;"	m	struct:rxbd8	typeref:typename:uint16_t
status	include/tsec.h	/^	uint16_t status;	\/* Status Fields *\/$/;"	m	struct:txbd8	typeref:typename:uint16_t
status	include/usb.h	/^	unsigned long status;$/;"	m	struct:usb_device	typeref:typename:unsigned long
status	include/usbdevice.h	/^	int status;		\/* halted *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
status	include/usbdevice.h	/^	urb_send_status_t status;$/;"	m	struct:urb	typeref:typename:urb_send_status_t
status	include/usbdevice.h	/^	usb_device_status_t status;	\/* device status *\/$/;"	m	struct:usb_device_instance	typeref:typename:usb_device_status_t
status	lib/zlib/deflate.h	/^    int   status;        \/* as the name implies *\/$/;"	m	struct:internal_state	typeref:typename:int
status1	include/fsl_usb.h	/^	u32     status1;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
status2	drivers/spi/tegra20_slink.c	/^	u32 status2;	\/* SLINK_STATUS2_0 reg *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
status32	arch/arc/include/asm/ptrace.h	/^	long status32;$/;"	m	struct:pt_regs	typeref:typename:long
statusInt	drivers/block/sata_dwc.c	/^	struct dmareg			statusInt;$/;"	m	struct:ahb_dma_regs	typeref:struct:dmareg	file:
status_addr	drivers/block/pata_bfin.h	/^	unsigned long status_addr;$/;"	m	struct:ata_ioports	typeref:typename:unsigned long
status_addr	drivers/block/sata_dwc.h	/^	void __iomem		*status_addr;$/;"	m	struct:ata_ioports	typeref:typename:void __iomem *
status_addr	drivers/block/sata_sil3114.h	/^	unsigned long status_addr;$/;"	m	struct:sata_ioports	typeref:typename:unsigned long
status_bit	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 status_bit;		\/* 0: gate is disabled; 0: gatge is enabled *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
status_bit	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 status_bit;		\/* 0: gate is disabled; 0: gatge is enabled *\/$/;"	m	struct:bcm_clk_gate	typeref:typename:u32
status_clear	drivers/mmc/arm_pl180_mmci.h	/^	u32 status_clear;	\/* 0x38*\/$/;"	m	struct:sdi_registers	typeref:typename:u32
status_dcc	drivers/serial/arm_dcc.c	/^#define status_dcc(/;"	d	file:
status_ep	drivers/usb/gadget/ether.c	/^	struct usb_ep		*in_ep, *out_ep, *status_ep;$/;"	m	struct:eth_dev	typeref:struct:usb_ep *	file:
status_fail	test/py/multiplexed_log.py	/^    def status_fail(self, msg, anchor=None):$/;"	m	class:Logfile
status_int	include/gdsys_fpga.h	/^	u16 status_int;$/;"	m	struct:ihs_fpga_channel	typeref:typename:u16
status_int	include/gdsys_fpga.h	/^	u16 status_int;$/;"	m	struct:ihs_fpga_hicb	typeref:typename:u16
status_led	board/freescale/ls1043ardb/cpld.h	/^	u8 status_led;		\/* 0xD - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
status_led	board/freescale/ls1046ardb/cpld.h	/^	u8 status_led;		\/* 0xD - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
status_led	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 status_led;                  \/* offset: 0x8 *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
status_led_init	drivers/misc/status_led.c	/^void status_led_init(void)$/;"	f	typeref:typename:void
status_led_init_done	drivers/misc/status_led.c	/^static int status_led_init_done = 0;$/;"	v	typeref:typename:int	file:
status_led_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux status_led_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
status_led_set	drivers/misc/status_led.c	/^void status_led_set (int led, int state)$/;"	f	typeref:typename:void
status_led_tick	drivers/misc/status_led.c	/^void status_led_tick (ulong timestamp)$/;"	f	typeref:typename:void
status_pad	drivers/net/altera_tse.h	/^	u32 status_pad[3];$/;"	m	struct:alt_sgdma_registers	typeref:typename:u32[3]
status_pass	test/py/multiplexed_log.py	/^    def status_pass(self, msg, anchor=None):$/;"	m	class:Logfile
status_ram	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	status_ram;$/;"	m	struct:qm_config	typeref:typename:u32
status_request	drivers/mtd/nand/mxc_nand.c	/^	int				status_request;$/;"	m	struct:mxc_nand_host	typeref:typename:int	file:
status_skipped	test/py/multiplexed_log.py	/^    def status_skipped(self, msg, anchor=None):$/;"	m	class:Logfile
status_sum	drivers/mtd/nand/mxc_nand.h	/^	u32 status_sum;$/;"	m	struct:mxc_nand_regs	typeref:typename:u32
status_xfail	test/py/multiplexed_log.py	/^    def status_xfail(self, msg, anchor=None):$/;"	m	class:Logfile
status_xpass	test/py/multiplexed_log.py	/^    def status_xpass(self, msg, anchor=None):$/;"	m	class:Logfile
statushashcrc	drivers/net/lpc32xx_eth.c	/^	u32 statushashcrc;	\/* Transmit Descriptor CRCs *\/$/;"	m	struct:lpc32xx_eth_rxstat	typeref:typename:u32	file:
statusinfo	drivers/net/lpc32xx_eth.c	/^	u32 statusinfo;		\/* Transmit Descriptor status *\/$/;"	m	struct:lpc32xx_eth_rxstat	typeref:typename:u32	file:
statusinfo	drivers/net/lpc32xx_eth.c	/^	u32 statusinfo;		\/* Transmit Descriptor status *\/$/;"	m	struct:lpc32xx_eth_txstat	typeref:typename:u32	file:
statusreg	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int statusreg;		\/* ofset 0x40 *\/$/;"	m	struct:ctrl_stat	typeref:typename:unsigned int
stay_alive	tools/patman/cros_subprocess.py	/^stay_alive = True$/;"	v
stbrp_context	drivers/video/stb_truetype.h	/^} stbrp_context;$/;"	t	typeref:struct:__anonce392f790f08
stbrp_coord	drivers/video/stb_truetype.h	/^typedef int stbrp_coord;$/;"	t	typeref:typename:int
stbrp_init_target	drivers/video/stb_truetype.h	/^static void stbrp_init_target(stbrp_context *con, int pw, int ph, stbrp_node *nodes, int num_nod/;"	f	typeref:typename:void
stbrp_node	drivers/video/stb_truetype.h	/^} stbrp_node;$/;"	t	typeref:struct:__anonce392f791008
stbrp_pack_rects	drivers/video/stb_truetype.h	/^static void stbrp_pack_rects(stbrp_context *con, stbrp_rect *rects, int num_rects)$/;"	f	typeref:typename:void
stbrp_rect	drivers/video/stb_truetype.h	/^struct stbrp_rect$/;"	s
stbrp_rect	drivers/video/stb_truetype.h	/^typedef struct stbrp_rect stbrp_rect;$/;"	t	typeref:struct:stbrp_rect
stbtt_BakeFontBitmap	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_BakeFontBitmap(const unsigned char *data, int offset,  \/\/ font location (u/;"	f	typeref:typename:STBTT_DEF int
stbtt_CompareUTF8toUTF16_bigendian	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_CompareUTF8toUTF16_bigendian(const char *s1, int len1, const char *s2, int l/;"	f	typeref:typename:STBTT_DEF int
stbtt_FindGlyphIndex	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_FindGlyphIndex(const stbtt_fontinfo *info, int unicode_codepoint)$/;"	f	typeref:typename:STBTT_DEF int
stbtt_FindMatchingFont	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_FindMatchingFont(const unsigned char *font_collection, const char *name_utf8/;"	f	typeref:typename:STBTT_DEF int
stbtt_FlattenCurves	drivers/video/stb_truetype.h	/^static stbtt__point *stbtt_FlattenCurves(stbtt_vertex *vertices, int num_verts, float objspace_f/;"	f	typeref:typename:stbtt__point *
stbtt_FreeBitmap	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_FreeBitmap(unsigned char *bitmap, void *userdata)$/;"	f	typeref:typename:STBTT_DEF void
stbtt_FreeShape	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_FreeShape(const stbtt_fontinfo *info, stbtt_vertex *v)$/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetBakedQuad	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetBakedQuad(stbtt_bakedchar *chardata, int pw, int ph, int char_index, flo/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetCodepointBitmap	drivers/video/stb_truetype.h	/^STBTT_DEF unsigned char *stbtt_GetCodepointBitmap(const stbtt_fontinfo *info, float scale_x, flo/;"	f	typeref:typename:STBTT_DEF unsigned char *
stbtt_GetCodepointBitmapBox	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetCodepointBitmapBox(const stbtt_fontinfo *font, int codepoint, float scal/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetCodepointBitmapBoxSubpixel	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetCodepointBitmapBoxSubpixel(const stbtt_fontinfo *font, int codepoint, fl/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetCodepointBitmapSubpixel	drivers/video/stb_truetype.h	/^STBTT_DEF unsigned char *stbtt_GetCodepointBitmapSubpixel(const stbtt_fontinfo *info, float scal/;"	f	typeref:typename:STBTT_DEF unsigned char *
stbtt_GetCodepointBox	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_GetCodepointBox(const stbtt_fontinfo *info, int codepoint, int *x0, int *y0,/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetCodepointHMetrics	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetCodepointHMetrics(const stbtt_fontinfo *info, int codepoint, int *advanc/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetCodepointKernAdvance	drivers/video/stb_truetype.h	/^STBTT_DEF int  stbtt_GetCodepointKernAdvance(const stbtt_fontinfo *info, int ch1, int ch2)$/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetCodepointShape	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_GetCodepointShape(const stbtt_fontinfo *info, int unicode_codepoint, stbtt_v/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetFontBoundingBox	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetFontBoundingBox(const stbtt_fontinfo *info, int *x0, int *y0, int *x1, i/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetFontNameString	drivers/video/stb_truetype.h	/^STBTT_DEF const char *stbtt_GetFontNameString(const stbtt_fontinfo *font, int *length, int platf/;"	f	typeref:typename:STBTT_DEF const char *
stbtt_GetFontOffsetForIndex	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_GetFontOffsetForIndex(const unsigned char *font_collection, int index)$/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetFontVMetrics	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetFontVMetrics(const stbtt_fontinfo *info, int *ascent, int *descent, int /;"	f	typeref:typename:STBTT_DEF void
stbtt_GetGlyphBitmap	drivers/video/stb_truetype.h	/^STBTT_DEF unsigned char *stbtt_GetGlyphBitmap(const stbtt_fontinfo *info, float scale_x, float s/;"	f	typeref:typename:STBTT_DEF unsigned char *
stbtt_GetGlyphBitmapBox	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetGlyphBitmapBox(const stbtt_fontinfo *font, int glyph, float scale_x, flo/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetGlyphBitmapBoxSubpixel	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetGlyphBitmapBoxSubpixel(const stbtt_fontinfo *font, int glyph, float scal/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetGlyphBitmapSubpixel	drivers/video/stb_truetype.h	/^STBTT_DEF unsigned char *stbtt_GetGlyphBitmapSubpixel(const stbtt_fontinfo *info, float scale_x,/;"	f	typeref:typename:STBTT_DEF unsigned char *
stbtt_GetGlyphBox	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_GetGlyphBox(const stbtt_fontinfo *info, int glyph_index, int *x0, int *y0, i/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetGlyphHMetrics	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetGlyphHMetrics(const stbtt_fontinfo *info, int glyph_index, int *advanceW/;"	f	typeref:typename:STBTT_DEF void
stbtt_GetGlyphKernAdvance	drivers/video/stb_truetype.h	/^STBTT_DEF int  stbtt_GetGlyphKernAdvance(const stbtt_fontinfo *info, int glyph1, int glyph2)$/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetGlyphShape	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_GetGlyphShape(const stbtt_fontinfo *info, int glyph_index, stbtt_vertex **pv/;"	f	typeref:typename:STBTT_DEF int
stbtt_GetPackedQuad	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_GetPackedQuad(stbtt_packedchar *chardata, int pw, int ph, int char_index, f/;"	f	typeref:typename:STBTT_DEF void
stbtt_InitFont	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_InitFont(stbtt_fontinfo *info, const unsigned char *data2, int fontstart)$/;"	f	typeref:typename:STBTT_DEF int
stbtt_IsGlyphEmpty	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_IsGlyphEmpty(const stbtt_fontinfo *info, int glyph_index)$/;"	f	typeref:typename:STBTT_DEF int
stbtt_MakeCodepointBitmap	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_MakeCodepointBitmap(const stbtt_fontinfo *info, unsigned char *output, int /;"	f	typeref:typename:STBTT_DEF void
stbtt_MakeCodepointBitmapSubpixel	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_MakeCodepointBitmapSubpixel(const stbtt_fontinfo *info, unsigned char *outp/;"	f	typeref:typename:STBTT_DEF void
stbtt_MakeGlyphBitmap	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_MakeGlyphBitmap(const stbtt_fontinfo *info, unsigned char *output, int out_/;"	f	typeref:typename:STBTT_DEF void
stbtt_MakeGlyphBitmapSubpixel	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_MakeGlyphBitmapSubpixel(const stbtt_fontinfo *info, unsigned char *output, /;"	f	typeref:typename:STBTT_DEF void
stbtt_PackBegin	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_PackBegin(stbtt_pack_context *spc, unsigned char *pixels, int pw, int ph, in/;"	f	typeref:typename:STBTT_DEF int
stbtt_PackEnd	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_PackEnd  (stbtt_pack_context *spc)$/;"	f	typeref:typename:STBTT_DEF void
stbtt_PackFontRange	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_PackFontRange(stbtt_pack_context *spc, unsigned char *fontdata, int font_ind/;"	f	typeref:typename:STBTT_DEF int
stbtt_PackFontRanges	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_PackFontRanges(stbtt_pack_context *spc, unsigned char *fontdata, int font_in/;"	f	typeref:typename:STBTT_DEF int
stbtt_PackFontRangesGatherRects	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_PackFontRangesGatherRects(stbtt_pack_context *spc, stbtt_fontinfo *info, stb/;"	f	typeref:typename:STBTT_DEF int
stbtt_PackFontRangesPackRects	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_PackFontRangesPackRects(stbtt_pack_context *spc, stbrp_rect *rects, int num/;"	f	typeref:typename:STBTT_DEF void
stbtt_PackFontRangesRenderIntoRects	drivers/video/stb_truetype.h	/^STBTT_DEF int stbtt_PackFontRangesRenderIntoRects(stbtt_pack_context *spc, stbtt_fontinfo *info,/;"	f	typeref:typename:STBTT_DEF int
stbtt_PackSetOversampling	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_PackSetOversampling(stbtt_pack_context *spc, unsigned int h_oversample, uns/;"	f	typeref:typename:STBTT_DEF void
stbtt_Rasterize	drivers/video/stb_truetype.h	/^STBTT_DEF void stbtt_Rasterize(stbtt__bitmap *result, float flatness_in_pixels, stbtt_vertex *ve/;"	f	typeref:typename:STBTT_DEF void
stbtt_ScaleForMappingEmToPixels	drivers/video/stb_truetype.h	/^STBTT_DEF float stbtt_ScaleForMappingEmToPixels(const stbtt_fontinfo *info, float pixels)$/;"	f	typeref:typename:STBTT_DEF float
stbtt_ScaleForPixelHeight	drivers/video/stb_truetype.h	/^STBTT_DEF float stbtt_ScaleForPixelHeight(const stbtt_fontinfo *info, float height)$/;"	f	typeref:typename:STBTT_DEF float
stbtt__CompareUTF8toUTF16_bigendian_prefix	drivers/video/stb_truetype.h	/^static stbtt_int32 stbtt__CompareUTF8toUTF16_bigendian_prefix(const stbtt_uint8 *s1, stbtt_int32/;"	f	typeref:typename:stbtt_int32
stbtt__GetGlyfOffset	drivers/video/stb_truetype.h	/^static int stbtt__GetGlyfOffset(const stbtt_fontinfo *info, int glyph_index)$/;"	f	typeref:typename:int
stbtt__active_edge	drivers/video/stb_truetype.h	/^typedef struct stbtt__active_edge$/;"	s
stbtt__active_edge	drivers/video/stb_truetype.h	/^} stbtt__active_edge;$/;"	t	typeref:struct:stbtt__active_edge
stbtt__add_point	drivers/video/stb_truetype.h	/^static void stbtt__add_point(stbtt__point *points, int n, float x, float y)$/;"	f	typeref:typename:void
stbtt__bitmap	drivers/video/stb_truetype.h	/^} stbtt__bitmap;$/;"	t	typeref:struct:__anonce392f790708
stbtt__check_size16	drivers/video/stb_truetype.h	/^   typedef char stbtt__check_size16[sizeof(stbtt_int16)==2 ? 1 : -1];$/;"	t	typeref:typename:char[sizeof (stbtt_int16)==2?1:-1]
stbtt__check_size32	drivers/video/stb_truetype.h	/^   typedef char stbtt__check_size32[sizeof(stbtt_int32)==4 ? 1 : -1];$/;"	t	typeref:typename:char[sizeof (stbtt_int32)==4?1:-1]
stbtt__close_shape	drivers/video/stb_truetype.h	/^static int stbtt__close_shape(stbtt_vertex *vertices, int num_vertices, int was_off, int start_o/;"	f	typeref:typename:int
stbtt__edge	drivers/video/stb_truetype.h	/^typedef struct stbtt__edge {$/;"	s
stbtt__edge	drivers/video/stb_truetype.h	/^} stbtt__edge;$/;"	t	typeref:struct:stbtt__edge
stbtt__fill_active_edges	drivers/video/stb_truetype.h	/^static void stbtt__fill_active_edges(unsigned char *scanline, int len, stbtt__active_edge *e, in/;"	f	typeref:typename:void
stbtt__fill_active_edges_new	drivers/video/stb_truetype.h	/^static void stbtt__fill_active_edges_new(float *scanline, float *scanline_fill, int len, stbtt__/;"	f	typeref:typename:void
stbtt__find_table	drivers/video/stb_truetype.h	/^static stbtt_uint32 stbtt__find_table(stbtt_uint8 *data, stbtt_uint32 fontstart, const char *tag/;"	f	typeref:typename:stbtt_uint32
stbtt__h_prefilter	drivers/video/stb_truetype.h	/^static void stbtt__h_prefilter(unsigned char *pixels, int w, int h, int stride_in_bytes, unsigne/;"	f	typeref:typename:void
stbtt__handle_clipped_edge	drivers/video/stb_truetype.h	/^static void stbtt__handle_clipped_edge(float *scanline, int x, stbtt__active_edge *e, float x0, /;"	f	typeref:typename:void
stbtt__hheap	drivers/video/stb_truetype.h	/^typedef struct stbtt__hheap$/;"	s
stbtt__hheap	drivers/video/stb_truetype.h	/^} stbtt__hheap;$/;"	t	typeref:struct:stbtt__hheap
stbtt__hheap_alloc	drivers/video/stb_truetype.h	/^static void *stbtt__hheap_alloc(stbtt__hheap *hh, size_t size, void *userdata)$/;"	f	typeref:typename:void *
stbtt__hheap_chunk	drivers/video/stb_truetype.h	/^typedef struct stbtt__hheap_chunk$/;"	s
stbtt__hheap_chunk	drivers/video/stb_truetype.h	/^} stbtt__hheap_chunk;$/;"	t	typeref:struct:stbtt__hheap_chunk
stbtt__hheap_cleanup	drivers/video/stb_truetype.h	/^static void stbtt__hheap_cleanup(stbtt__hheap *hh, void *userdata)$/;"	f	typeref:typename:void
stbtt__hheap_free	drivers/video/stb_truetype.h	/^static void stbtt__hheap_free(stbtt__hheap *hh, void *p)$/;"	f	typeref:typename:void
stbtt__isfont	drivers/video/stb_truetype.h	/^static int stbtt__isfont(const stbtt_uint8 *font)$/;"	f	typeref:typename:int
stbtt__matches	drivers/video/stb_truetype.h	/^static int stbtt__matches(stbtt_uint8 *fc, stbtt_uint32 offset, stbtt_uint8 *name, stbtt_int32 f/;"	f	typeref:typename:int
stbtt__matchpair	drivers/video/stb_truetype.h	/^static int stbtt__matchpair(stbtt_uint8 *fc, stbtt_uint32 nm, stbtt_uint8 *name, stbtt_int32 nle/;"	f	typeref:typename:int
stbtt__new_active	drivers/video/stb_truetype.h	/^static stbtt__active_edge *stbtt__new_active(stbtt__hheap *hh, stbtt__edge *e, int off_x, float /;"	f	typeref:typename:stbtt__active_edge *
stbtt__oversample_shift	drivers/video/stb_truetype.h	/^static float stbtt__oversample_shift(int oversample)$/;"	f	typeref:typename:float
stbtt__point	drivers/video/stb_truetype.h	/^} stbtt__point;$/;"	t	typeref:struct:__anonce392f790e08
stbtt__rasterize	drivers/video/stb_truetype.h	/^static void stbtt__rasterize(stbtt__bitmap *result, stbtt__point *pts, int *wcount, int windings/;"	f	typeref:typename:void
stbtt__rasterize_sorted_edges	drivers/video/stb_truetype.h	/^static void stbtt__rasterize_sorted_edges(stbtt__bitmap *result, stbtt__edge *e, int n, int vsub/;"	f	typeref:typename:void
stbtt__sort_edges	drivers/video/stb_truetype.h	/^static void stbtt__sort_edges(stbtt__edge *p, int n)$/;"	f	typeref:typename:void
stbtt__sort_edges_ins_sort	drivers/video/stb_truetype.h	/^static void stbtt__sort_edges_ins_sort(stbtt__edge *p, int n)$/;"	f	typeref:typename:void
stbtt__sort_edges_quicksort	drivers/video/stb_truetype.h	/^static void stbtt__sort_edges_quicksort(stbtt__edge *p, int n)$/;"	f	typeref:typename:void
stbtt__tesselate_curve	drivers/video/stb_truetype.h	/^static int stbtt__tesselate_curve(stbtt__point *points, int *num_points, float x0, float y0, flo/;"	f	typeref:typename:int
stbtt__test_oversample_pow2	drivers/video/stb_truetype.h	/^typedef int stbtt__test_oversample_pow2[(STBTT_MAX_OVERSAMPLE & (STBTT_MAX_OVERSAMPLE-1)) == 0 ?/;"	t	typeref:typename:int[(STBTT_MAX_OVERSAMPLE & (STBTT_MAX_OVERSAMPLE-1))==0?1:-1]
stbtt__v_prefilter	drivers/video/stb_truetype.h	/^static void stbtt__v_prefilter(unsigned char *pixels, int w, int h, int stride_in_bytes, unsigne/;"	f	typeref:typename:void
stbtt_aligned_quad	drivers/video/stb_truetype.h	/^} stbtt_aligned_quad;$/;"	t	typeref:struct:__anonce392f790208
stbtt_bakedchar	drivers/video/stb_truetype.h	/^} stbtt_bakedchar;$/;"	t	typeref:struct:__anonce392f790108
stbtt_fontinfo	drivers/video/stb_truetype.h	/^typedef struct stbtt_fontinfo stbtt_fontinfo;$/;"	t	typeref:struct:stbtt_fontinfo
stbtt_fontinfo	drivers/video/stb_truetype.h	/^typedef struct stbtt_fontinfo$/;"	s
stbtt_fontinfo	drivers/video/stb_truetype.h	/^} stbtt_fontinfo;$/;"	t	typeref:struct:stbtt_fontinfo
stbtt_int16	drivers/video/stb_truetype.h	/^   typedef signed   short  stbtt_int16;$/;"	t	typeref:typename:signed short
stbtt_int32	drivers/video/stb_truetype.h	/^   typedef signed   int    stbtt_int32;$/;"	t	typeref:typename:signed int
stbtt_int8	drivers/video/stb_truetype.h	/^   typedef signed   char   stbtt_int8;$/;"	t	typeref:typename:signed char
stbtt_pack_context	drivers/video/stb_truetype.h	/^struct stbtt_pack_context {$/;"	s
stbtt_pack_context	drivers/video/stb_truetype.h	/^typedef struct stbtt_pack_context stbtt_pack_context;$/;"	t	typeref:struct:stbtt_pack_context
stbtt_pack_range	drivers/video/stb_truetype.h	/^} stbtt_pack_range;$/;"	t	typeref:struct:__anonce392f790408
stbtt_packedchar	drivers/video/stb_truetype.h	/^} stbtt_packedchar;$/;"	t	typeref:struct:__anonce392f790308
stbtt_setvertex	drivers/video/stb_truetype.h	/^static void stbtt_setvertex(stbtt_vertex *v, stbtt_uint8 type, stbtt_int32 x, stbtt_int32 y, stb/;"	f	typeref:typename:void
stbtt_tag	drivers/video/stb_truetype.h	/^#define stbtt_tag(/;"	d
stbtt_tag4	drivers/video/stb_truetype.h	/^#define stbtt_tag4(/;"	d
stbtt_uint16	drivers/video/stb_truetype.h	/^   typedef unsigned short  stbtt_uint16;$/;"	t	typeref:typename:unsigned short
stbtt_uint32	drivers/video/stb_truetype.h	/^   typedef unsigned int    stbtt_uint32;$/;"	t	typeref:typename:unsigned int
stbtt_uint8	drivers/video/stb_truetype.h	/^   typedef unsigned char   stbtt_uint8;$/;"	t	typeref:typename:unsigned char
stbtt_vertex	drivers/video/stb_truetype.h	/^   } stbtt_vertex;$/;"	t	typeref:struct:__anonce392f790608
stbtt_vertex_type	drivers/video/stb_truetype.h	/^   #define stbtt_vertex_type /;"	d
stby	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t stby;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
stby_mask	drivers/power/regulator/pfuze100.c	/^	unsigned int stby_mask;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int	file:
stby_reg	drivers/power/regulator/pfuze100.c	/^	unsigned int stby_reg;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int	file:
stctrl	drivers/net/xilinx_ll_temac_sdma.h	/^		u8 stctrl;		\/* Status\/Control the DMA transfer *\/$/;"	m	union:cdmac_bd::__anona2a4323f010a	typeref:typename:u8
std_cfg	drivers/i2c/kona_i2c.c	/^	const struct bus_speed_cfg *std_cfg;$/;"	m	struct:bcm_kona_i2c_dev	typeref:typename:const struct bus_speed_cfg *	file:
std_cfg_table	drivers/i2c/kona_i2c.c	/^static const struct bus_speed_cfg std_cfg_table[] = {$/;"	v	typeref:typename:const struct bus_speed_cfg[]	file:
std_err	include/efi_api.h	/^	struct efi_simple_text_output_protocol *std_err;$/;"	m	struct:efi_system_table	typeref:struct:efi_simple_text_output_protocol *
std_net	arch/x86/include/asm/me_common.h	/^	u32 std_net:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
stderr	include/common.h	/^#define stderr	/;"	d
stderr_handle	include/efi_api.h	/^	unsigned long stderr_handle;$/;"	m	struct:efi_system_table	typeref:typename:unsigned long
stdin	include/common.h	/^#define stdin	/;"	d
stdio_add_devices	common/stdio.c	/^int stdio_add_devices(void)$/;"	f	typeref:typename:int
stdio_clone	common/stdio.c	/^struct stdio_dev* stdio_clone(struct stdio_dev *dev)$/;"	f	typeref:struct:stdio_dev *
stdio_deregister	common/stdio.c	/^int stdio_deregister(const char *devname, int force)$/;"	f	typeref:typename:int
stdio_deregister_dev	common/stdio.c	/^int stdio_deregister_dev(struct stdio_dev *dev, int force)$/;"	f	typeref:typename:int
stdio_dev	include/stdio_dev.h	/^struct stdio_dev {$/;"	s
stdio_devices	common/stdio.c	/^struct stdio_dev *stdio_devices[] = { NULL, NULL, NULL };$/;"	v	typeref:struct:stdio_dev * []
stdio_get_by_name	common/stdio.c	/^struct stdio_dev* stdio_get_by_name(const char *name)$/;"	f	typeref:struct:stdio_dev *
stdio_get_list	common/stdio.c	/^struct list_head* stdio_get_list(void)$/;"	f	typeref:struct:list_head *
stdio_init	common/stdio.c	/^int stdio_init(void)$/;"	f	typeref:typename:int
stdio_init_tables	common/stdio.c	/^int stdio_init_tables(void)$/;"	f	typeref:typename:int
stdio_names	common/stdio.c	/^char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" };$/;"	v	typeref:typename:char * []
stdio_print_current_devices	common/console.c	/^void stdio_print_current_devices(void)$/;"	f	typeref:typename:void
stdio_probe_device	common/stdio.c	/^static int stdio_probe_device(const char *name, enum uclass_id id,$/;"	f	typeref:typename:int	file:
stdio_register	common/stdio.c	/^int stdio_register(struct stdio_dev *dev)$/;"	f	typeref:typename:int
stdio_register_dev	common/stdio.c	/^int stdio_register_dev(struct stdio_dev *dev, struct stdio_dev **devp)$/;"	f	typeref:typename:int
stdio_serial_getc	common/stdio.c	/^static int stdio_serial_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
stdio_serial_putc	common/stdio.c	/^static void stdio_serial_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void	file:
stdio_serial_puts	common/stdio.c	/^static void stdio_serial_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void	file:
stdio_serial_tstc	common/stdio.c	/^static int stdio_serial_tstc(struct stdio_dev *dev)$/;"	f	typeref:typename:int	file:
stdout	include/common.h	/^#define stdout	/;"	d
ste	test/py/tests/test_env.py	/^ste = None$/;"	v
step	arch/arm/include/asm/omap_common.h	/^	u32 step;$/;"	m	struct:pmic_data	typeref:typename:u32
step	drivers/power/regulator/sandbox.c	/^	int step;$/;"	m	struct:output_range	typeref:typename:int	file:
step	include/power/s5m8767.h	/^	int step;$/;"	m	struct:sec_voltage_desc	typeref:typename:int
step_assign_addresses	board/freescale/b4860qds/ddr.c	/^unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,$/;"	f	typeref:typename:unsigned long long
step_ds	include/linux/mtd/nand.h	/^		uint16_t step_ds;$/;"	m	struct:nand_flash_dev::__anon4f3885c20408	typeref:typename:uint16_t
step_mV	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint8_t			step_mV;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint8_t	file:
step_mask	drivers/ddr/fsl/interactive.c	/^	unsigned int step_mask;$/;"	m	struct:data_strings	typeref:typename:unsigned int	file:
step_rate	disk/part_amiga.h	/^    u32 step_rate;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
step_string_tbl	drivers/ddr/fsl/main.c	/^const char *step_string_tbl[] = {$/;"	v	typeref:typename:const char * []
step_to_string	drivers/ddr/fsl/main.c	/^const char * step_to_string(unsigned int step) {$/;"	f	typeref:typename:const char *
step_uv	drivers/power/regulator/rk808.c	/^	uint step_uv;$/;"	m	struct:rk808_reg_info	typeref:typename:uint	file:
stepping	include/ddr_spd.h	/^	uint8_t stepping;		\/* 352 DRAM stepping *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
steps	include/linux/mtd/nand.h	/^	int steps;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
stet	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int stet;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
stfclr	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t stfclr;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
sti	arch/microblaze/include/asm/system.h	/^#define sti(/;"	d
sti	arch/mips/include/asm/system.h	/^#  define sti(/;"	d
sti_console	board/nokia/rx51/tag_omap.h	/^		struct omap_sti_console_config sti_console;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_sti_console_config
stm	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	stm;$/;"	m	struct:nic301_registers	typeref:typename:u32
stm32_des_regs	arch/arm/include/asm/arch-stm32f1/stm32.h	/^struct stm32_des_regs {$/;"	s
stm32_flash_bank_regs	arch/arm/include/asm/arch-stm32f1/stm32.h	/^struct stm32_flash_bank_regs {$/;"	s
stm32_flash_latency_cfg	drivers/mtd/stm32_flash.c	/^void stm32_flash_latency_cfg(int latency)$/;"	f	typeref:typename:void
stm32_flash_lock	drivers/mtd/stm32_flash.c	/^static void stm32_flash_lock(u8 lock)$/;"	f	typeref:typename:void	file:
stm32_flash_regs	arch/arm/include/asm/arch-stm32f1/stm32.h	/^struct stm32_flash_regs {$/;"	s
stm32_flash_regs	drivers/mtd/stm32_flash.h	/^struct stm32_flash_regs {$/;"	s
stm32_fmc_regs	arch/arm/include/asm/arch-stm32f4/fmc.h	/^struct stm32_fmc_regs {$/;"	s
stm32_fmc_regs	arch/arm/include/asm/arch-stm32f7/fmc.h	/^struct stm32_fmc_regs {$/;"	s
stm32_gpin_get	drivers/gpio/stm32_gpio.c	/^int stm32_gpin_get(const struct stm32_gpio_dsc *dsc)$/;"	f	typeref:typename:int
stm32_gpio_af	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_af {$/;"	g
stm32_gpio_af	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_af {$/;"	g
stm32_gpio_af	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_af {$/;"	g
stm32_gpio_config	drivers/gpio/stm32_gpio.c	/^int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,$/;"	f	typeref:typename:int
stm32_gpio_ctl	arch/arm/include/asm/arch-stm32f1/gpio.h	/^struct stm32_gpio_ctl {$/;"	s
stm32_gpio_ctl	arch/arm/include/asm/arch-stm32f4/gpio.h	/^struct stm32_gpio_ctl {$/;"	s
stm32_gpio_ctl	arch/arm/include/asm/arch-stm32f7/gpio.h	/^struct stm32_gpio_ctl {$/;"	s
stm32_gpio_dsc	arch/arm/include/asm/arch-stm32f1/gpio.h	/^struct stm32_gpio_dsc {$/;"	s
stm32_gpio_dsc	arch/arm/include/asm/arch-stm32f4/gpio.h	/^struct stm32_gpio_dsc {$/;"	s
stm32_gpio_dsc	arch/arm/include/asm/arch-stm32f7/gpio.h	/^struct stm32_gpio_dsc {$/;"	s
stm32_gpio_icnf	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_icnf {$/;"	g
stm32_gpio_mode	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_mode {$/;"	g
stm32_gpio_mode	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_mode {$/;"	g
stm32_gpio_mode	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_mode {$/;"	g
stm32_gpio_ocnf	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_ocnf {$/;"	g
stm32_gpio_otype	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_otype {$/;"	g
stm32_gpio_otype	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_otype {$/;"	g
stm32_gpio_pin	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_pin {$/;"	g
stm32_gpio_pin	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_pin {$/;"	g
stm32_gpio_pin	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_pin {$/;"	g
stm32_gpio_port	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_port {$/;"	g
stm32_gpio_port	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_port {$/;"	g
stm32_gpio_port	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_port {$/;"	g
stm32_gpio_pupd	arch/arm/include/asm/arch-stm32f1/gpio.h	/^enum stm32_gpio_pupd {$/;"	g
stm32_gpio_pupd	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_pupd {$/;"	g
stm32_gpio_pupd	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_pupd {$/;"	g
stm32_gpio_regs	drivers/gpio/stm32_gpio.c	/^struct stm32_gpio_regs {$/;"	s	file:
stm32_gpio_speed	arch/arm/include/asm/arch-stm32f4/gpio.h	/^enum stm32_gpio_speed {$/;"	g
stm32_gpio_speed	arch/arm/include/asm/arch-stm32f7/gpio.h	/^enum stm32_gpio_speed {$/;"	g
stm32_gpio_to_pin	arch/arm/include/asm/arch-stm32f1/gpio.h	/^static inline unsigned stm32_gpio_to_pin(unsigned gpio)$/;"	f	typeref:typename:unsigned
stm32_gpio_to_pin	arch/arm/include/asm/arch-stm32f4/gpio.h	/^static inline unsigned stm32_gpio_to_pin(unsigned gpio)$/;"	f	typeref:typename:unsigned
stm32_gpio_to_pin	arch/arm/include/asm/arch-stm32f7/gpio.h	/^static inline unsigned stm32_gpio_to_pin(unsigned gpio)$/;"	f	typeref:typename:unsigned
stm32_gpio_to_port	arch/arm/include/asm/arch-stm32f1/gpio.h	/^static inline unsigned stm32_gpio_to_port(unsigned gpio)$/;"	f	typeref:typename:unsigned
stm32_gpio_to_port	arch/arm/include/asm/arch-stm32f4/gpio.h	/^static inline unsigned stm32_gpio_to_port(unsigned gpio)$/;"	f	typeref:typename:unsigned
stm32_gpio_to_port	arch/arm/include/asm/arch-stm32f7/gpio.h	/^static inline unsigned stm32_gpio_to_port(unsigned gpio)$/;"	f	typeref:typename:unsigned
stm32_gpout_set	drivers/gpio/stm32_gpio.c	/^int stm32_gpout_set(const struct stm32_gpio_dsc *dsc, int state)$/;"	f	typeref:typename:int
stm32_pwr_regs	arch/arm/include/asm/arch-stm32f1/stm32.h	/^struct stm32_pwr_regs {$/;"	s
stm32_pwr_regs	arch/arm/include/asm/arch-stm32f4/stm32.h	/^struct stm32_pwr_regs {$/;"	s
stm32_pwr_regs	arch/arm/include/asm/arch-stm32f7/stm32.h	/^struct stm32_pwr_regs {$/;"	s
stm32_rcc_regs	arch/arm/include/asm/arch-stm32f1/stm32.h	/^struct stm32_rcc_regs {$/;"	s
stm32_rcc_regs	arch/arm/include/asm/arch-stm32f4/stm32.h	/^struct stm32_rcc_regs {$/;"	s
stm32_rcc_regs	arch/arm/include/asm/arch-stm32f7/stm32.h	/^struct stm32_rcc_regs {$/;"	s
stm32_serial_getc	drivers/serial/serial_stm32.c	/^static int stm32_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
stm32_serial_getc	drivers/serial/serial_stm32x7.c	/^static int stm32_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
stm32_serial_ops	drivers/serial/serial_stm32.c	/^static const struct dm_serial_ops stm32_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
stm32_serial_ops	drivers/serial/serial_stm32x7.c	/^static const struct dm_serial_ops stm32_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
stm32_serial_pending	drivers/serial/serial_stm32.c	/^static int stm32_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
stm32_serial_pending	drivers/serial/serial_stm32x7.c	/^static int stm32_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
stm32_serial_platdata	include/dm/platform_data/serial_stm32.h	/^struct stm32_serial_platdata {$/;"	s
stm32_serial_probe	drivers/serial/serial_stm32.c	/^static int stm32_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
stm32_serial_probe	drivers/serial/serial_stm32x7.c	/^static int stm32_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
stm32_serial_putc	drivers/serial/serial_stm32.c	/^static int stm32_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
stm32_serial_putc	drivers/serial/serial_stm32x7.c	/^static int stm32_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
stm32_serial_setbrg	drivers/serial/serial_stm32.c	/^static int stm32_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
stm32_serial_setbrg	drivers/serial/serial_stm32x7.c	/^static int stm32_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
stm32_tim2_5	arch/arm/mach-stm32/stm32f1/timer.c	/^struct stm32_tim2_5 {$/;"	s	file:
stm32_tim2_5	arch/arm/mach-stm32/stm32f4/timer.c	/^struct stm32_tim2_5 {$/;"	s	file:
stm32_u_id_regs	arch/arm/include/asm/arch-stm32f4/stm32.h	/^struct stm32_u_id_regs {$/;"	s
stm32_usart	drivers/serial/serial_stm32.c	/^struct stm32_usart {$/;"	s	file:
stm32_usart	drivers/serial/serial_stm32x7.h	/^struct stm32_usart {$/;"	s
stm32f1_flash_lock	arch/arm/mach-stm32/stm32f1/flash.c	/^static void stm32f1_flash_lock(u8 bank, u8 lock)$/;"	f	typeref:typename:void	file:
stm32x7_serial_platdata	include/dm/platform_data/serial_stm32x7.h	/^struct stm32x7_serial_platdata {$/;"	s
stm_clk_div_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	stm_clk_div_ck: stm_clk_div_ck {$/;"	l
stm_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	stm_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
stm_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	stm_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
stm_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 stm_freq;		\/* offset 0x4c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
stm_get_locked_range	drivers/mtd/spi/spi_flash.c	/^static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,$/;"	f	typeref:typename:void	file:
stm_is_locked	drivers/mtd/spi/spi_flash.c	/^int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)$/;"	f	typeref:typename:int
stm_is_locked_sr	drivers/mtd/spi/spi_flash.c	/^static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u64 len,$/;"	f	typeref:typename:int	file:
stm_lock	drivers/mtd/spi/spi_flash.c	/^int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)$/;"	f	typeref:typename:int
stm_mux	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 stm_mux;		\/* offset 0x18 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
stm_pmd_clock_mux_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	stm_pmd_clock_mux_ck: stm_pmd_clock_mux_ck {$/;"	l
stm_unlock	drivers/mtd/spi/spi_flash.c	/^int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)$/;"	f	typeref:typename:int
stmt_list	scripts/kconfig/zconf.y	/^stmt_list:$/;"	l
stn_565_mode	drivers/video/da8xx-fb.h	/^	unsigned char stn_565_mode;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
stop	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 stop;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
stop	drivers/net/altera_tse.h	/^	void (*stop)(struct udevice *dev);$/;"	m	struct:tse_ops	typeref:typename:void (*)(struct udevice * dev)
stop	drivers/usb/musb-new/musb_dma.h	/^	int			(*stop)(struct dma_controller *);$/;"	m	struct:dma_controller	typeref:typename:int (*)(struct dma_controller *)
stop	include/adc.h	/^	int (*stop)(struct udevice *dev);$/;"	m	struct:adc_ops	typeref:typename:int (*)(struct udevice * dev)
stop	include/keyboard.h	/^	int (*stop)(struct udevice *dev);$/;"	m	struct:keyboard_ops	typeref:typename:int (*)(struct udevice * dev)
stop	include/net.h	/^	void (*stop)(struct udevice *dev);$/;"	m	struct:eth_ops	typeref:typename:void (*)(struct udevice * dev)
stop	include/remoteproc.h	/^	int (*stop)(struct udevice *dev);$/;"	m	struct:dm_rproc_ops	typeref:typename:int (*)(struct udevice * dev)
stop	include/serial.h	/^	int	(*stop)(void);$/;"	m	struct:serial_device	typeref:typename:int (*)(void)
stop	include/stdio_dev.h	/^	int (*stop)(struct stdio_dev *dev);	\/* To stop the device *\/$/;"	m	struct:stdio_dev	typeref:typename:int (*)(struct stdio_dev * dev)
stop_activity	drivers/usb/gadget/at91_udc.c	/^static void stop_activity(struct at91_udc *udc)$/;"	f	typeref:typename:void	file:
stop_activity	drivers/usb/gadget/ci_udc.c	/^static void stop_activity(void)$/;"	f	typeref:typename:void	file:
stop_activity	drivers/usb/gadget/dwc2_udc_otg.c	/^static void stop_activity(struct dwc2_udc *dev,$/;"	f	typeref:typename:void	file:
stop_activity	drivers/usb/gadget/pxa25x_udc.c	/^stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)$/;"	f	typeref:typename:void	file:
stop_activity	drivers/usb/musb-new/musb_gadget.c	/^static void stop_activity(struct musb *musb, struct usb_gadget_driver *driver)$/;"	f	typeref:typename:void	file:
stop_bits	include/usb_cdc_acm.h	/^		unsigned char stop_bits;$/;"	m	struct:rs232_emu	typeref:typename:unsigned char
stop_command	drivers/mtd/nand/tegra_nand.c	/^static void stop_command(struct nand_ctlr *reg)$/;"	f	typeref:typename:void	file:
stop_dfu	test/py/tests/test_dfu.py	/^    def stop_dfu(ignore_errors):$/;"	f	function:test_dfu	file:
stop_fdc_drive	cmd/fdc.c	/^void stop_fdc_drive(FDC_COMMAND_STRUCT *pCMD)$/;"	f	typeref:typename:void
stop_holding_cnt	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	unsigned short			stop_holding_cnt;$/;"	m	struct:mipi_dsim_config	typeref:typename:unsigned short
stop_queue	drivers/net/mvgbe.c	/^static void stop_queue(u32 * qreg)$/;"	f	typeref:typename:void	file:
stop_this_cpu	arch/x86/cpu/mp_init.c	/^static inline void stop_this_cpu(void)$/;"	f	typeref:typename:void	file:
stop_ums	test/py/tests/test_ums.py	/^    def stop_ums(ignore_errors):$/;"	f	function:test_ums	file:
stop_watchdog	drivers/usb/gadget/pxa25x_udc.c	/^static inline void stop_watchdog(struct pxa25x_udc *udc)$/;"	f	typeref:typename:void	file:
stopped	drivers/usb/gadget/at91_udc.h	/^	unsigned			stopped:1;$/;"	m	struct:at91_ep	typeref:typename:unsigned:1
stopped	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	u8 stopped;$/;"	m	struct:dwc2_ep	typeref:typename:u8
stopped	drivers/usb/gadget/fotg210.c	/^	uint stopped;$/;"	m	struct:fotg210_ep	typeref:typename:uint	file:
stopped	drivers/usb/gadget/pxa25x_udc.h	/^	unsigned				stopped:1;$/;"	m	struct:pxa25x_ep	typeref:typename:unsigned:1
stopped	include/bedbug/type.h	/^	int stopped;$/;"	m	struct:__anon3619a6480108	typeref:typename:int
stopped_progs	common/cli_hush.c	/^	int stopped_progs;			\/* number of programs alive, but stopped *\/$/;"	m	struct:pipe	typeref:typename:int	file:
stor_spec	api/api_storage.c	/^struct stor_spec {$/;"	s	file:
storage	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		struct ldpaa_dq *storage; \/* NULL if DQRR *\/$/;"	m	struct:qbman_swp::__anonadc6216b0208	typeref:struct:ldpaa_dq *
storage	include/api_public.h	/^		} storage;$/;"	m	union:device_info::__anonf417d2e6020a	typeref:struct:device_info::__anonf417d2e6020a::__anonf417d2e60308
storage	include/splash.h	/^	enum splash_storage storage;$/;"	m	struct:splash_location	typeref:enum:splash_storage
storage_partition	include/cavium/atf_part.h	/^struct storage_partition {$/;"	s
store	arch/arm/include/debug/8250.S	/^		.macro	store, rd, rx:vararg$/;"	m
store_be	drivers/mtd/ubi/crc32.c	/^static void store_be(u32 x, unsigned char *buf)$/;"	f	typeref:typename:void	file:
store_block	net/nfs.c	/^static inline int store_block(uchar *src, unsigned offset, unsigned len)$/;"	f	typeref:typename:int	file:
store_block	net/tftp.c	/^static inline void store_block(int block, uchar *src, unsigned len)$/;"	f	typeref:typename:void	file:
store_cdrom_address	drivers/usb/gadget/storage_common.c	/^static void store_cdrom_address(u8 *dest, int msf, u32 addr)$/;"	f	typeref:typename:void	file:
store_char_in_data	lib/slre.c	/^store_char_in_data(struct slre *r, int ch)$/;"	f	typeref:typename:void	file:
store_data_byte	drivers/bios_emulator/x86emu/decode.c	/^void store_data_byte($/;"	f	typeref:typename:void
store_data_byte_abs	drivers/bios_emulator/x86emu/decode.c	/^void store_data_byte_abs($/;"	f	typeref:typename:void
store_data_long	drivers/bios_emulator/x86emu/decode.c	/^void store_data_long($/;"	f	typeref:typename:void
store_data_long_abs	drivers/bios_emulator/x86emu/decode.c	/^void store_data_long_abs($/;"	f	typeref:typename:void
store_data_word	drivers/bios_emulator/x86emu/decode.c	/^void store_data_word($/;"	f	typeref:typename:void
store_data_word_abs	drivers/bios_emulator/x86emu/decode.c	/^void store_data_word_abs($/;"	f	typeref:typename:void
store_ecc8	lib/bch.c	/^static void store_ecc8(struct bch_control *bch, uint8_t *dst,$/;"	f	typeref:typename:void	file:
store_filename	scripts/kconfig/gconf.c	/^store_filename(GtkFileSelection * file_selector, gpointer user_data)$/;"	f	typeref:typename:void	file:
store_le	drivers/mtd/ubi/crc32.c	/^static void store_le(u32 x, unsigned char *buf)$/;"	f	typeref:typename:void	file:
store_net_params	net/bootp.c	/^static void store_net_params(struct bootp_hdr *bp)$/;"	f	typeref:typename:void	file:
store_result	cmd/md5sum.c	/^static void store_result(const u8 *sum, const char *dest)$/;"	f	typeref:typename:void	file:
store_result	common/hash.c	/^static void store_result(struct hash_algo *algo, const uint8_t *sum,$/;"	f	typeref:typename:void	file:
store_timings	arch/x86/cpu/quark/smc.c	/^void store_timings(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
storedBlockCRC	lib/bzip2/bzlib_private.h	/^      UInt32   storedBlockCRC;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32
storedCombinedCRC	lib/bzip2/bzlib_private.h	/^      UInt32   storedCombinedCRC;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32
stored_bootdelay	common/autoboot.c	/^static int stored_bootdelay;$/;"	v	typeref:typename:int	file:
storm_limit_burst	include/vsc9953.h	/^	u32	storm_limit_burst;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
storm_limit_cfg	include/vsc9953.h	/^	u32	storm_limit_cfg[4];$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32[4]
stp_rep	drivers/video/ipu_regs.h	/^	u32 stp_rep[4];$/;"	m	struct:ipu_di	typeref:typename:u32[4]
stp_rep9	drivers/video/ipu_regs.h	/^	u32 stp_rep9;$/;"	m	struct:ipu_di	typeref:typename:u32
stprckcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 stprckcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
stpwatch	arch/m68k/include/asm/rtc.h	/^	u32 stpwatch;		\/* 0x1C Stopwatch Minutes Register *\/$/;"	m	struct:rtc_ctrl	typeref:typename:u32
stpwch	arch/arm/include/asm/arch-mx27/regs-rtc.h	/^	u32 stpwch;$/;"	m	struct:rtc_regs	typeref:typename:u32
str	cmd/test.c	/^	const char *str;$/;"	m	struct:__anone06382f90108	typeref:typename:const char *	file:
str	common/autoboot.c	/^		char *str;$/;"	m	struct:passwd_abort::__anon5afe6cdb0108	typeref:typename:char *	file:
str	include/efi_api.h	/^	u16 str[32];$/;"	m	struct:efi_device_path_file_path	typeref:typename:u16[32]
str	lib/libfdt/fdt_strerror.c	/^	const char *str;$/;"	m	struct:fdt_errtabent	typeref:typename:const char *	file:
str	scripts/kconfig/lxdialog/dialog.h	/^	char str[MAXITEMSTR];	\/* prompt displayed *\/$/;"	m	struct:dialog_item	typeref:typename:char[]
str	scripts/kconfig/nconf.c	/^	char str[256];$/;"	m	struct:mitem	typeref:typename:char[256]	file:
str	scripts/kconfig/zconf.lex.c	/^	int str = 0;$/;"	v	typeref:typename:int
str	tools/gdb/serial.c	/^    char *str;$/;"	m	struct:speedmap	typeref:typename:char *	file:
str	tools/patman/patman	/^        str = 'No commits found to process - please use -c flag'$/;"	v
str	tools/patman/patman.py	/^        str = 'No commits found to process - please use -c flag'$/;"	v
str1b	arch/arm/lib/memcpy.S	/^	.macro str1b ptr reg cond=al abort$/;"	m
str1w	arch/arm/lib/memcpy.S	/^	.macro str1w ptr reg abort$/;"	m
str2long	lib/vsprintf.c	/^bool str2long(const char *p, ulong *num)$/;"	f	typeref:typename:bool
str2longbe	board/freescale/common/fsl_validate.c	/^static inline int str2longbe(const char *p, ulong *num)$/;"	f	typeref:typename:int	file:
str2off	lib/vsprintf.c	/^bool str2off(const char *p, loff_t *num)$/;"	f	typeref:typename:bool
str2slot	fs/fat/fat_write.c	/^static int str2slot(dir_slot *slotptr, const char *name, int *idx)$/;"	f	typeref:typename:int	file:
str2wide	drivers/serial/usbtty.c	/^static void str2wide (char *str, u16 * wide)$/;"	f	typeref:typename:void	file:
str8w	arch/arm/lib/memcpy.S	/^	.macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort$/;"	m
str_append	scripts/kconfig/util.c	/^void str_append(struct gstr *gs, const char *s)$/;"	f	typeref:typename:void
str_data	drivers/usb/gadget/f_thor.h	/^	char str_data[3][32];	\/* string data *\/$/;"	m	struct:rsp_box	typeref:typename:char[3][32]
str_data	drivers/usb/gadget/f_thor.h	/^	char str_data[5][32];	\/* string data *\/$/;"	m	struct:rqt_box	typeref:typename:char[5][32]
str_free	scripts/kconfig/util.c	/^void str_free(struct gstr *gs)$/;"	f	typeref:typename:void
str_get	scripts/kconfig/util.c	/^const char *str_get(struct gstr *gs)$/;"	f	typeref:typename:const char *
str_ident	arch/blackfin/cpu/gpio.c	/^static struct str_ident {$/;"	s	file:
str_ident	arch/blackfin/cpu/gpio.c	/^} str_ident[MAX_RESOURCES];$/;"	v	typeref:struct:str_ident[]
str_ident	drivers/gpio/adi_gpio2.c	/^static struct str_ident {$/;"	s	file:
str_ident	drivers/gpio/adi_gpio2.c	/^} str_ident[MAX_RESOURCES];$/;"	v	typeref:struct:str_ident[]
str_in_list	lib/libfdt/fdt_wip.c	/^static int str_in_list(const char *str, char * const list[], int count)$/;"	f	typeref:typename:int	file:
str_new	scripts/kconfig/util.c	/^struct gstr str_new(void)$/;"	f	typeref:struct:gstr
str_printf	scripts/kconfig/util.c	/^void str_printf(struct gstr *gs, const char *fmt, ...)$/;"	f	typeref:typename:void
str_stp_clk	drivers/mmc/mxcmmc.c	/^	u32 str_stp_clk;$/;"	m	struct:mxcmci_regs	typeref:typename:u32	file:
strapping_opt_a	arch/arm/include/asm/arch-tegra/apb_misc.h	/^	u32	strapping_opt_a;\/* 0x08: APB_MISC_PP_STRAPPING_OPT_A *\/$/;"	m	struct:apb_misc_pp_ctlr	typeref:typename:u32
strategy	lib/zlib/deflate.h	/^    int strategy; \/* favor or force Huffman coding*\/$/;"	m	struct:internal_state	typeref:typename:int
stratixv_fns	board/theadorable/fpga.c	/^static altera_board_specific_func stratixv_fns = {$/;"	v	typeref:typename:altera_board_specific_func	file:
stratixv_load	drivers/fpga/stratixv.c	/^int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)$/;"	f	typeref:typename:int
stratum	net/sntp.h	/^	uchar stratum;$/;"	m	struct:sntp_pkt_t	typeref:typename:uchar
strcasecmp	lib/string.c	/^int strcasecmp(const char *s1, const char *s2)$/;"	f	typeref:typename:int
strcat	arch/powerpc/lib/ppcstring.S	/^strcat:$/;"	l
strcat	lib/string.c	/^char * strcat(char * dest, const char * src)$/;"	f	typeref:typename:char *
strchr	arch/arc/lib/strchr-700.S	/^strchr:$/;"	l
strchr	lib/string.c	/^char * strchr(const char * s, int c)$/;"	f	typeref:typename:char *
strcmp	arch/arc/lib/strcmp.S	/^strcmp:$/;"	l
strcmp	arch/blackfin/lib/string.c	/^int strcmp(const char *cs, const char *ct)$/;"	f	typeref:typename:int
strcmp	arch/powerpc/lib/ppcstring.S	/^strcmp:$/;"	l
strcmp	arch/sh/include/asm/string.h	/^static inline int strcmp(const char *__cs, const char *__ct)$/;"	f	typeref:typename:int
strcmp	arch/sparc/cpu/leon2/prom.c	/^	int (*strcmp) (char *s1, char *s2);$/;"	m	struct:leon_reloc_func	typeref:typename:int (*)(char * s1,char * s2)	file:
strcmp	arch/sparc/cpu/leon3/prom.c	/^	int (*strcmp) (char *s1, char *s2);$/;"	m	struct:leon_reloc_func	typeref:typename:int (*)(char * s1,char * s2)	file:
strcmp	lib/string.c	/^int strcmp(const char * cs,const char * ct)$/;"	f	typeref:typename:int
strcmp_compar	lib/qsort.c	/^int strcmp_compar(const void *p1, const void *p2)$/;"	f	typeref:typename:int
strcmp_l1	drivers/usb/gadget/f_fastboot.c	/^static int strcmp_l1(const char *s1, const char *s2)$/;"	f	typeref:typename:int	file:
strcpy	arch/arc/lib/strcpy-700.S	/^strcpy:$/;"	l
strcpy	arch/blackfin/lib/string.c	/^char *strcpy(char *dest, const char *src)$/;"	f	typeref:typename:char *
strcpy	arch/powerpc/lib/ppcstring.S	/^strcpy:$/;"	l
strcpy	arch/sh/include/asm/string.h	/^static inline char *strcpy(char *__dest, const char *__src)$/;"	f	typeref:typename:char *
strcpy	lib/string.c	/^char * strcpy(char * dest,const char *src)$/;"	f	typeref:typename:char *
strdup	lib/string.c	/^char * strdup(const char *s)$/;"	f	typeref:typename:char *
stream	fs/cramfs/uncompress.c	/^static z_stream stream;$/;"	v	typeref:typename:z_stream	file:
stream_capable	drivers/usb/dwc3/core.h	/^	unsigned		stream_capable:1;$/;"	m	struct:dwc3_ep	typeref:typename:unsigned:1
stream_id	arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h	/^	uint16_t stream_id;$/;"	m	struct:smmu_stream_id	typeref:typename:uint16_t
stream_id	include/linux/usb/gadget.h	/^	unsigned		stream_id:16;$/;"	m	struct:usb_request	typeref:typename:unsigned:16
strength	include/linux/mtd/nand.h	/^	int strength;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
strength_ds	include/linux/mtd/nand.h	/^		uint16_t strength_ds;$/;"	m	struct:nand_flash_dev::__anon4f3885c20408	typeref:typename:uint16_t
stretch	cmd/fdc.c	/^	unsigned int stretch;	\/* !=0 means double track steps *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned int	file:
strexcause	arch/blackfin/cpu/traps.c	/^static char *strexcause(uint16_t excause)$/;"	f	typeref:typename:char *	file:
strfractoint	board/freescale/common/pixis.c	/^static unsigned long strfractoint(char *strptr)$/;"	f	typeref:typename:unsigned long	file:
strhash	scripts/basic/fixdep.c	/^static unsigned int strhash(const char *str, unsigned int sz)$/;"	f	typeref:typename:unsigned int	file:
strhash	scripts/kconfig/symbol.c	/^static unsigned strhash(const char *s)$/;"	f	typeref:typename:unsigned	file:
strhwerrcause	arch/blackfin/cpu/traps.c	/^static char *strhwerrcause(uint16_t hwerrcause)$/;"	f	typeref:typename:char *	file:
strict_strtoul	lib/strto.c	/^int strict_strtoul(const char *cp, unsigned int base, unsigned long *res)$/;"	f	typeref:typename:int
strictpriorityq	drivers/qe/uec.h	/^	u8   strictpriorityq;  \/* Strict Priority Mask register *\/$/;"	m	struct:uec_scheduler	typeref:typename:u8
strid	drivers/net/mcfmii.c	/^	char *strid;$/;"	m	struct:phy_info_struct	typeref:typename:char *	file:
stride	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 stride;$/;"	m	struct:rk3288_base_params	typeref:typename:u32
stride	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	stride;		\/* Number of bytes per line *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
stride	drivers/net/altera_tse.h	/^	u32 stride;$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
stride	drivers/video/stb_truetype.h	/^   int w,h,stride;$/;"	m	struct:__anonce392f790708	typeref:typename:int
stride_in_bytes	drivers/video/stb_truetype.h	/^   int   stride_in_bytes;$/;"	m	struct:stbtt_pack_context	typeref:typename:int
strider_fans	board/gdsys/mpc8308/strider.c	/^} strider_fans[] = CONFIG_STRIDER_FANS;$/;"	v	typeref:struct:__anonafccc0650308[]
strig	board/micronas/vct/top.c	/^		u32 strig	:  1;   \/* Schmitt trigger input*\/$/;"	m	struct:_TOP_PINMUX_t::__anon904a4b870108	typeref:typename:u32:1	file:
strim	lib/linux_string.c	/^char *strim(char *s)$/;"	f	typeref:typename:char *
string	arch/x86/include/asm/coreboot_tables.h	/^	u8 string[0];$/;"	m	struct:cb_string	typeref:typename:u8[0]
string	cmd/led.c	/^	char		*string;	\/* String for use in the command *\/$/;"	m	struct:led_tbl_s	typeref:typename:char *	file:
string	include/edid.h	/^		char string[13];$/;"	m	union:edid_monitor_descriptor::__anon4a0dc044010a	typeref:typename:char[13]
string	include/usbdescriptors.h	/^		struct usb_string_descriptor string;$/;"	m	union:usb_descriptor::__anon028dca6a010a	typeref:struct:usb_string_descriptor
string	lib/uuid.c	/^	const char *string;$/;"	m	struct:__anon5dbe20330108	typeref:typename:const char *	file:
string	lib/vsprintf.c	/^static char *string(char *buf, char *end, char *s, int field_width,$/;"	f	typeref:typename:char *	file:
string	scripts/kconfig/zconf.tab.c	/^	char *string;$/;"	m	union:YYSTYPE	typeref:typename:char *	file:
string	tools/fdtgrep.c	/^	const char *string;	\/* String to match *\/$/;"	m	struct:value_node	typeref:typename:const char *	file:
string_find_replace	scripts/checkpatch.pl	/^sub string_find_replace {$/;"	s
string_langid	include/usb.h	/^	int string_langid;		\/* language ID for strings *\/$/;"	m	struct:usb_device	typeref:typename:int
string_set	include/linux/ethtool.h	/^	__u32	string_set;	\/* string set id e.c. ETH_SS_TEST, etc*\/$/;"	m	struct:ethtool_gstrings	typeref:typename:__u32
string_to_ip	lib/net_utils.c	/^struct in_addr string_to_ip(const char *s)$/;"	f	typeref:struct:in_addr
string_to_vlan	net/net.c	/^ushort string_to_vlan(const char *s)$/;"	f	typeref:typename:ushort
stringcomp	cmd/itest.c	/^static int stringcomp(char *s, char *t, int op)$/;"	f	typeref:typename:int	file:
stringify	arch/powerpc/include/asm/processor.h	/^#define stringify(/;"	d
strings	arch/x86/include/asm/coreboot_tables.h	/^	u8 strings[0];$/;"	m	struct:cb_mainboard	typeref:typename:u8[0]
strings	drivers/usb/gadget/ether.c	/^static struct usb_string		strings[] = {$/;"	v	typeref:struct:usb_string[]	file:
strings	drivers/usb/gadget/f_dfu.c	/^	struct usb_string		*strings;$/;"	m	struct:f_dfu	typeref:struct:usb_string *	file:
strings	include/linux/usb/composite.h	/^	struct usb_gadget_strings		**strings;$/;"	m	struct:usb_composite_driver	typeref:struct:usb_gadget_strings **
strings	include/linux/usb/composite.h	/^	struct usb_gadget_strings	**strings;$/;"	m	struct:usb_configuration	typeref:struct:usb_gadget_strings **
strings	include/linux/usb/composite.h	/^	struct usb_gadget_strings	**strings;$/;"	m	struct:usb_function	typeref:struct:usb_gadget_strings **
strings	include/linux/usb/gadget.h	/^	struct usb_string	*strings;$/;"	m	struct:usb_gadget_strings	typeref:struct:usb_string *
strings	include/usb.h	/^	struct usb_string *strings;$/;"	m	struct:usb_dev_platdata	typeref:struct:usb_string *
strings	tools/image-host.c	/^	char **strings;$/;"	m	struct:strlist	typeref:typename:char **	file:
strings_dfu_generic	drivers/usb/gadget/f_dfu.c	/^static struct usb_string strings_dfu_generic[] = {$/;"	v	typeref:struct:usb_string[]	file:
stringtab	drivers/usb/gadget/ether.c	/^static struct usb_gadget_strings	stringtab = {$/;"	v	typeref:struct:usb_gadget_strings	file:
stringtab_dfu	drivers/usb/gadget/f_dfu.c	/^static struct usb_gadget_strings stringtab_dfu = {$/;"	v	typeref:struct:usb_gadget_strings	file:
stringtab_dfu_generic	drivers/usb/gadget/f_dfu.c	/^static struct usb_gadget_strings stringtab_dfu_generic = {$/;"	v	typeref:struct:usb_gadget_strings	file:
stringtab_fastboot	drivers/usb/gadget/f_fastboot.c	/^static struct usb_gadget_strings stringtab_fastboot = {$/;"	v	typeref:struct:usb_gadget_strings	file:
strip	scripts/kconfig/conf.c	/^static void strip(char *str)$/;"	f	typeref:typename:void	file:
strlcat	drivers/usb/dwc3/linux-compat.h	/^static inline size_t strlcat(char *dest, const char *src, size_t n)$/;"	f	typeref:typename:size_t
strlcpy	lib/string.c	/^size_t strlcpy(char *dest, const char *src, size_t size)$/;"	f	typeref:typename:size_t
strlen	arch/arc/lib/strlen.S	/^strlen:$/;"	l
strlen	arch/powerpc/lib/ppcstring.S	/^strlen:$/;"	l
strlen	lib/string.c	/^size_t strlen(const char * s)$/;"	f	typeref:typename:size_t
strlist	tools/image-host.c	/^struct strlist {$/;"	s	file:
strlist_add	tools/image-host.c	/^static int strlist_add(struct strlist *list, const char *str)$/;"	f	typeref:typename:int	file:
strlist_free	tools/image-host.c	/^static void strlist_free(struct strlist *list)$/;"	f	typeref:typename:void	file:
strlist_init	tools/image-host.c	/^static void strlist_init(struct strlist *list)$/;"	f	typeref:typename:void	file:
strm	lib/bzip2/bzlib.c	/^      bz_stream strm;$/;"	m	struct:__anonb9ba2b050108	typeref:typename:bz_stream	file:
strm	lib/bzip2/bzlib_private.h	/^      bz_stream* strm;$/;"	m	struct:__anon93cbeec40108	typeref:typename:bz_stream *
strm	lib/bzip2/bzlib_private.h	/^      bz_stream* strm;$/;"	m	struct:__anon93cbeec40208	typeref:typename:bz_stream *
strm	lib/zlib/deflate.h	/^    z_streamp strm;      \/* pointer back to this zlib stream *\/$/;"	m	struct:internal_state	typeref:typename:z_streamp
strmhz	lib/strmhz.c	/^char *strmhz (char *buf, unsigned long hz)$/;"	f	typeref:typename:char *
strncasecmp	lib/string.c	/^int strncasecmp(const char *s1, const char *s2, size_t len)$/;"	f	typeref:typename:int
strncat	lib/string.c	/^char * strncat(char *dest, const char *src, size_t count)$/;"	f	typeref:typename:char *
strncmp	arch/blackfin/lib/string.c	/^int strncmp(const char *cs, const char *ct, size_t count)$/;"	f	typeref:typename:int
strncmp	arch/sh/include/asm/string.h	/^static inline int strncmp(const char *__cs, const char *__ct, size_t __n)$/;"	f	typeref:typename:int
strncmp	lib/string.c	/^int strncmp(const char * cs,const char * ct,size_t count)$/;"	f	typeref:typename:int
strncpy	arch/blackfin/lib/string.c	/^char *strncpy(char *dest, const char *src, size_t n)$/;"	f	typeref:typename:char *
strncpy	arch/powerpc/lib/ppcstring.S	/^strncpy:$/;"	l
strncpy	arch/sh/include/asm/string.h	/^static inline char *strncpy(char *__dest, const char *__src, size_t __n)$/;"	f	typeref:typename:char *
strncpy	lib/string.c	/^char * strncpy(char * dest,const char *src,size_t count)$/;"	f	typeref:typename:char *
strncpy0	cmd/ini.c	/^static char *strncpy0(char *dest, const char *src, size_t size)$/;"	f	typeref:typename:char *	file:
strnlen	lib/string.c	/^size_t strnlen(const char * s, size_t count)$/;"	f	typeref:typename:size_t
strpbrk	lib/string.c	/^char * strpbrk(const char * cs,const char * ct)$/;"	f	typeref:typename:char *
strpcl	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	strpcl;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
strrchr	lib/string.c	/^char * strrchr(const char * s, int c)$/;"	f	typeref:typename:char *
strrcmp	scripts/basic/fixdep.c	/^static int strrcmp(char *s, char *sub)$/;"	f	typeref:typename:int	file:
strsep	lib/string.c	/^char * strsep(char **s, const char *ct)$/;"	f	typeref:typename:char *
strspn	lib/string.c	/^size_t strspn(const char *s, const char *accept)$/;"	f	typeref:typename:size_t
strstart	lib/zlib/deflate.h	/^    uInt strstart;               \/* start of string to insert *\/$/;"	m	struct:internal_state	typeref:typename:uInt
strstr	lib/string.c	/^char * strstr(const char * s1,const char * s2)$/;"	f	typeref:typename:char *
strswab	lib/string.c	/^char *strswab(const char *s)$/;"	f	typeref:typename:char *
strtok	lib/string.c	/^char * strtok(char * s,const char * ct)$/;"	f	typeref:typename:char *
strtok_r	tools/mingw_support.c	/^char *strtok_r(char *s, const char *delim, char **save_ptr)$/;"	f	typeref:typename:char *
strtou32	cmd/fuse.c	/^static int strtou32(const char *str, unsigned int base, u32 *result)$/;"	f	typeref:typename:int	file:
strtoul	include/libfdt_env.h	/^#define strtoul(/;"	d
struct_count	include/smbios.h	/^	u16 struct_count;$/;"	m	struct:smbios_entry	typeref:typename:u16
struct_table_address	include/smbios.h	/^	u32 struct_table_address;$/;"	m	struct:smbios_entry	typeref:typename:u32
struct_table_length	include/smbios.h	/^	u16 struct_table_length;$/;"	m	struct:smbios_entry	typeref:typename:u16
struct_type	fs/yaffs2/yaffs_guts.h	/^	int struct_type;$/;"	m	struct:yaffs_checkpt_dev	typeref:typename:int
struct_type	fs/yaffs2/yaffs_guts.h	/^	int struct_type;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:int
struct_type	fs/yaffs2/yaffs_guts.h	/^	int struct_type;$/;"	m	struct:yaffs_checkpt_validity	typeref:typename:int
struct_version	drivers/tpm/tpm_tis_sandbox.c	/^	uint8_t struct_version;$/;"	m	struct:rollback_space_kernel	typeref:typename:uint8_t	file:
struct_version	include/ec_commands.h	/^	uint8_t struct_version;$/;"	m	struct:ec_host_request	typeref:typename:uint8_t
struct_version	include/ec_commands.h	/^	uint8_t struct_version;$/;"	m	struct:ec_host_response	typeref:typename:uint8_t
structassign	lib/dhry/dhry.h	/^#define structassign(/;"	d
structptr	arch/sparc/include/asm/ptrace.h	/^	char *structptr;$/;"	m	struct:sparc_stackf	typeref:typename:char *
structs	tools/dtoc/dtoc	/^structs = plat.ScanStructs()$/;"	v
structs	tools/dtoc/dtoc.py	/^structs = plat.ScanStructs()$/;"	v
strwidth	scripts/cleanpatch	/^sub strwidth($) {$/;"	s
sts	arch/m68k/include/asm/immap_5329.h	/^	u32 sts;		\/* 0x144 USB Status *\/$/;"	m	struct:usb_otg	typeref:typename:u32
sts	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 sts;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
sts	drivers/net/ks8851_mll.c	/^	u16	sts;         \/* Frame status *\/$/;"	m	struct:type_frame_head	typeref:typename:u16	file:
sts	include/fsl_usb.h	/^	u32	sts;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
sts	include/linux/mtd/fsmc_nand.h	/^	u32 sts;			\/* 0x44 *\/$/;"	m	struct:fsmc_regs	typeref:typename:u32
sts_str	arch/arm/imx-common/hab.c	/^char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\\n",$/;"	v	typeref:typename:char * []
stuff	drivers/mmc/rpmb.c	/^	unsigned char stuff[RPMB_SZ_STUFF];$/;"	m	struct:s_rpmb	typeref:typename:unsigned char[]	file:
stv0991_cgu_regs	arch/arm/cpu/armv7/stv0991/clock.c	/^static struct stv0991_cgu_regs *const stv0991_cgu_regs = \\$/;"	v	typeref:struct:stv0991_cgu_regs * const	file:
stv0991_cgu_regs	arch/arm/cpu/armv7/stv0991/timer.c	/^static struct stv0991_cgu_regs *const stv0991_cgu_regs = \\$/;"	v	typeref:struct:stv0991_cgu_regs * const	file:
stv0991_cgu_regs	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^struct stv0991_cgu_regs {$/;"	s
stv0991_creg	arch/arm/cpu/armv7/stv0991/pinmux.c	/^static struct stv0991_creg *const stv0991_creg = \\$/;"	v	typeref:struct:stv0991_creg * const	file:
stv0991_creg	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^struct stv0991_creg {$/;"	s
stv0991_pinmux_config	arch/arm/cpu/armv7/stv0991/pinmux.c	/^int stv0991_pinmux_config(int peripheral)$/;"	f	typeref:typename:int
stv0991_wd_ru	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^struct stv0991_wd_ru {$/;"	s
stv0991_wd_ru_ptr	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^struct stv0991_wd_ru *const stv0991_wd_ru_ptr = \\$/;"	v	typeref:struct:stv0991_wd_ru * const
stx	drivers/i2c/lpc32xx_i2c.c	/^	u32 stx;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
stxfl	drivers/i2c/lpc32xx_i2c.c	/^	u32 stxfl;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
style	include/linux/usb/musb.h	/^	enum musb_fifo_style	style;$/;"	m	struct:musb_fifo_cfg	typeref:enum:musb_fifo_style
stype	scripts/kconfig/lkc.h	/^	enum symbol_type stype;$/;"	m	struct:kconf_id	typeref:enum:symbol_type
sub-make	Makefile	/^sub-make: FORCE$/;"	t
sub_addr	drivers/video/ipu_regs.h	/^	u32 sub_addr[5];$/;"	m	struct:ipu_idmac	typeref:typename:u32[5]
sub_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 sub_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
sub_ddmmss	arch/nios2/lib/longlong.h	/^#define sub_ddmmss(/;"	d
sub_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 sub_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
sub_system_id	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint16_t sub_system_id;$/;"	m	struct:pch_azalia_verb_table_header	typeref:typename:uint16_t
sub_type	include/efi_api.h	/^	u8 sub_type;$/;"	m	struct:efi_device_path	typeref:typename:u8
sub_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 sub_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
subcap	drivers/tpm/tpm_tis.h	/^	__be32 subcap;$/;"	m	struct:tpm_getcap_params_in	typeref:typename:__be32
subcap_size	drivers/tpm/tpm_tis.h	/^	__be32 subcap_size;$/;"	m	struct:tpm_getcap_params_in	typeref:typename:__be32
subckcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 subckcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
subckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 subckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
subclass	common/usb_storage.c	/^	unsigned char	subclass;		\/* as in overview *\/$/;"	m	struct:us_data	typeref:typename:unsigned char	file:
subclass	include/usb_ether.h	/^	unsigned char	subclass;	\/* as in overview *\/$/;"	m	struct:ueth_data	typeref:typename:unsigned char
subcmd	cmd/pmic.c	/^static cmd_tbl_t subcmd[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
subcmd	cmd/regulator.c	/^static cmd_tbl_t subcmd[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
subcmd_list	cmd/spl.c	/^static const char **subcmd_list[] = {$/;"	v	typeref:typename:const char ** []	file:
subdev	drivers/mtd/mtdconcat.c	/^	struct mtd_info **subdev;$/;"	m	struct:mtd_concat	typeref:struct:mtd_info **	file:
subdevice	include/pci.h	/^	unsigned int subvendor, subdevice; \/* Subsystem ID's or PCI_ANY_ID *\/$/;"	m	struct:pci_device_id	typeref:typename:unsigned int
subidset	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	subidset;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
submit_bulk_msg	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	arch/sparc/cpu/leon3/usb_uhci.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	board/mpl/common/usb_uhci.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len)$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/dwc2.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/ehci-hcd.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/isp116x-hcd.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/ohci-hcd.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/ohci-s3c24xx.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/r8a66597-hcd.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/sl811-hcd.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/usb-uclass.c	/^int submit_bulk_msg(struct usb_device *udev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/host/xhci.c	/^int submit_bulk_msg(struct usb_device *udev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/musb-new/musb_uboot.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_bulk_msg	drivers/usb/musb/musb_hcd.c	/^int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_common_msg	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_common_msg	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_common_msg	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_common_msg	drivers/usb/host/ohci-hcd.c	/^static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
submit_common_msg	drivers/usb/host/ohci-s3c24xx.c	/^int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	arch/sparc/cpu/leon3/usb_uhci.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	board/mpl/common/usb_uhci.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/dwc2.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/ehci-hcd.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/isp116x-hcd.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/ohci-hcd.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/ohci-s3c24xx.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/r8a66597-hcd.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/sl811-hcd.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/usb-uclass.c	/^int submit_control_msg(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/host/xhci.c	/^int submit_control_msg(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/musb-new/musb_uboot.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_control_msg	drivers/usb/musb/musb_hcd.c	/^int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	arch/sparc/cpu/leon3/usb_uhci.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	board/mpl/common/usb_uhci.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len, in/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/dwc2.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/ehci-hcd.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/isp116x-hcd.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/ohci-hcd.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/ohci-s3c24xx.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/r8a66597-hcd.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/sl811-hcd.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/usb-uclass.c	/^int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/host/xhci.c	/^int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/musb-new/musb_uboot.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_int_msg	drivers/usb/musb/musb_hcd.c	/^int submit_int_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
submit_next_request	drivers/usb/gadget/atmel_usba_udc.c	/^static void submit_next_request(struct usba_ep *ep)$/;"	f	typeref:typename:void	file:
submit_request	drivers/usb/gadget/atmel_usba_udc.c	/^static void submit_request(struct usba_ep *ep, struct usba_request *req)$/;"	f	typeref:typename:void	file:
submit_urb	drivers/usb/musb-new/musb_uboot.c	/^static int submit_urb(struct usb_hcd *hcd, struct urb *urb)$/;"	f	typeref:typename:int	file:
submitted	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				submitted:1;$/;"	m	struct:usba_request	typeref:typename:unsigned int:1
subpage_sft	include/linux/mtd/mtd.h	/^	int subpage_sft;$/;"	m	struct:mtd_info	typeref:typename:int
subpagesize	include/linux/mtd/nand.h	/^	int subpagesize;$/;"	m	struct:nand_chip	typeref:typename:int
subpagesize	include/linux/mtd/onenand.h	/^	int			subpagesize;$/;"	m	struct:onenand_chip	typeref:typename:int
subpic_cntl	drivers/video/ati_radeon_fb.h	/^	u32		subpic_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
subset_active	drivers/usb/gadget/ether.c	/^#define	subset_active(/;"	d	file:
subset_data_intf	drivers/usb/gadget/ether.c	/^subset_data_intf = {$/;"	v	typeref:typename:const struct usb_interface_descriptor	file:
subshell	common/cli_hush.c	/^	int subshell;				\/* flag, non-zero if group must be forked *\/$/;"	m	struct:child_prog	typeref:typename:int	file:
subsrcpnd	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	subsrcpnd;$/;"	m	struct:s3c24x0_interrupt	typeref:typename:u32
substitute	cmd/setexpr.c	/^static char *substitute(char *string,	\/* string buffer *\/$/;"	f	typeref:typename:char *	file:
substring	fs/reiserfs/reiserfs.c	/^substring (const char *s1, const char *s2)$/;"	f	typeref:typename:int	file:
subsystem_id	drivers/net/e1000.h	/^	uint16_t subsystem_id;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
subsystem_vendor_id	drivers/net/e1000.h	/^	uint16_t subsystem_vendor_id;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
subtest	test/overlay/test-fdt-base.dts	/^		subtest: sub-test-node {$/;"	l	label:test
subtests	test/py/tests/test_hush_if_test.py	/^subtests = ($/;"	v
subtitle_list	scripts/kconfig/lxdialog/dialog.h	/^struct subtitle_list {$/;"	s
subtitle_part	scripts/kconfig/mconf.c	/^struct subtitle_part {$/;"	s	file:
subtitles	scripts/kconfig/lxdialog/dialog.h	/^	struct subtitle_list *subtitles;$/;"	m	struct:dialog_info	typeref:struct:subtitle_list *
subtitles	scripts/kconfig/mconf.c	/^static struct subtitle_list *subtitles;$/;"	v	typeref:struct:subtitle_list *	file:
subtract_modulus	lib/rsa/rsa-mod-exp.c	/^static void subtract_modulus(const struct rsa_public_key *key, uint32_t num[])$/;"	f	typeref:typename:void	file:
subvendor	include/pci.h	/^	unsigned int subvendor, subdevice; \/* Subsystem ID's or PCI_ANY_ID *\/$/;"	m	struct:pci_device_id	typeref:typename:unsigned int
succr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 succr;	\/*0x0014*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
suite	tools/patman/patman	/^        suite = doctest.DocTestSuite(module)$/;"	v
suite	tools/patman/patman	/^    suite = unittest.TestLoader().loadTestsFromTestCase(test.TestPatch)$/;"	v
suite	tools/patman/patman.py	/^        suite = doctest.DocTestSuite(module)$/;"	v
suite	tools/patman/patman.py	/^    suite = unittest.TestLoader().loadTestsFromTestCase(test.TestPatch)$/;"	v
sum	fs/yaffs2/yaffs_guts.h	/^	u16 sum;		\/* sum of the name to speed searching *\/$/;"	m	struct:yaffs_obj	typeref:typename:u16
sum	fs/yaffs2/yaffs_summary.c	/^	unsigned sum;		\/* Just add up all the bytes in the tags *\/$/;"	m	struct:yaffs_summary_header	typeref:typename:unsigned	file:
sum	include/dm/test.h	/^	int sum;$/;"	m	struct:dm_test_parent_data	typeref:typename:int
sum	include/jffs2/jffs2.h	/^	__u32 sum[0]; 	\/* inode summary info *\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32[0]
sum_block	disk/part_amiga.c	/^int sum_block(struct block_header *header)$/;"	f	typeref:typename:int
sum_buf	fs/jffs2/summary.h	/^	__u32 *sum_buf;	\/* buffer for writing out summary *\/$/;"	m	struct:jffs2_summary	typeref:typename:__u32 *
sum_crc	include/jffs2/jffs2.h	/^	__u32 sum_crc;	\/* summary information crc *\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
sum_get_unaligned16	fs/jffs2/jffs2_1pass.c	/^static u16 sum_get_unaligned16(u16 *ptr)$/;"	f	typeref:typename:u16	file:
sum_get_unaligned32	fs/jffs2/jffs2_1pass.c	/^static u32 sum_get_unaligned32(u32 *ptr)$/;"	f	typeref:typename:u32	file:
sum_list_head	fs/jffs2/summary.h	/^	union jffs2_sum_mem *sum_list_head;$/;"	m	struct:jffs2_summary	typeref:union:jffs2_sum_mem *
sum_list_tail	fs/jffs2/summary.h	/^	union jffs2_sum_mem *sum_list_tail;$/;"	m	struct:jffs2_summary	typeref:union:jffs2_sum_mem *
sum_no_longer_used	fs/yaffs2/yaffs_guts.h	/^	u16 sum_no_longer_used;	\/* checksum of name. No longer used *\/$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u16
sum_num	fs/jffs2/summary.h	/^	uint32_t sum_num;$/;"	m	struct:jffs2_summary	typeref:typename:uint32_t
sum_num	include/jffs2/jffs2.h	/^	__u32 sum_num;	\/* number of sum entries*\/$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
sum_padded	fs/jffs2/summary.h	/^	uint32_t sum_padded;$/;"	m	struct:jffs2_summary	typeref:typename:uint32_t
sum_size	fs/jffs2/summary.h	/^	uint32_t sum_size;      \/* collected summary information for nextblock *\/$/;"	m	struct:jffs2_summary	typeref:typename:uint32_t
sum_tags	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_summary_tags *sum_tags;$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_summary_tags *
summary_used	fs/yaffs2/yaffs_guts.h	/^	u32 summary_used;$/;"	m	struct:yaffs_dev	typeref:typename:u32
summed_longs	disk/part_amiga.c	/^    u32 summed_longs;$/;"	m	struct:block_header	typeref:typename:u32	file:
summed_longs	disk/part_amiga.h	/^    u32   summed_longs;$/;"	m	struct:bootcode_block	typeref:typename:u32
summed_longs	disk/part_amiga.h	/^    u32 summed_longs;$/;"	m	struct:partition_block	typeref:typename:u32
summed_longs	disk/part_amiga.h	/^    u32 summed_longs;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
summed_priority_counter0	arch/powerpc/include/asm/immap_512x.h	/^	u32 summed_priority_counter0;$/;"	m	struct:ddr512x	typeref:typename:u32
summed_priority_counter1	arch/powerpc/include/asm/immap_512x.h	/^	u32 summed_priority_counter1;$/;"	m	struct:ddr512x	typeref:typename:u32
summed_priority_counter2	arch/powerpc/include/asm/immap_512x.h	/^	u32 summed_priority_counter2;$/;"	m	struct:ddr512x	typeref:typename:u32
summed_priority_counter3	arch/powerpc/include/asm/immap_512x.h	/^	u32 summed_priority_counter3;$/;"	m	struct:ddr512x	typeref:typename:u32
summed_priority_counter4	arch/powerpc/include/asm/immap_512x.h	/^	u32 summed_priority_counter4;$/;"	m	struct:ddr512x	typeref:typename:u32
sun4i_horz_coef	drivers/video/sunxi_display.c	/^static const u32 sun4i_horz_coef[64] = {$/;"	v	typeref:typename:const u32[64]	file:
sun4i_vert_coef	drivers/video/sunxi_display.c	/^static const u32 sun4i_vert_coef[32] = {$/;"	v	typeref:typename:const u32[32]	file:
sun8i_adjust_link	drivers/net/sun8i_emac.c	/^static void sun8i_adjust_link(struct emac_eth_dev *priv,$/;"	f	typeref:typename:void	file:
sun8i_emac_board_setup	drivers/net/sun8i_emac.c	/^static void sun8i_emac_board_setup(struct emac_eth_dev *priv)$/;"	f	typeref:typename:void	file:
sun8i_emac_eth_ids	drivers/net/sun8i_emac.c	/^static const struct udevice_id sun8i_emac_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sun8i_emac_eth_ofdata_to_platdata	drivers/net/sun8i_emac.c	/^static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sun8i_emac_eth_ops	drivers/net/sun8i_emac.c	/^static const struct eth_ops sun8i_emac_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
sun8i_emac_eth_probe	drivers/net/sun8i_emac.c	/^static int sun8i_emac_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sun8i_emac_eth_recv	drivers/net/sun8i_emac.c	/^static int sun8i_emac_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
sun8i_emac_eth_send	drivers/net/sun8i_emac.c	/^static int sun8i_emac_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
sun8i_emac_eth_start	drivers/net/sun8i_emac.c	/^static int sun8i_emac_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sun8i_emac_eth_stop	drivers/net/sun8i_emac.c	/^static void sun8i_emac_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sun8i_emac_set_syscon	drivers/net/sun8i_emac.c	/^static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)$/;"	f	typeref:typename:int	file:
sun8i_emac_set_syscon_ephy	drivers/net/sun8i_emac.c	/^static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)$/;"	f	typeref:typename:int	file:
sun8i_eth_free_pkt	drivers/net/sun8i_emac.c	/^static int sun8i_eth_free_pkt(struct udevice *dev, uchar *packet,$/;"	f	typeref:typename:int	file:
sun8i_eth_write_hwaddr	drivers/net/sun8i_emac.c	/^static int sun8i_eth_write_hwaddr(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sun8i_mdio_init	drivers/net/sun8i_emac.c	/^static int sun8i_mdio_init(const char *name, struct  emac_eth_dev *priv)$/;"	f	typeref:typename:int	file:
sun8i_mdio_read	drivers/net/sun8i_emac.c	/^static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
sun8i_mdio_write	drivers/net/sun8i_emac.c	/^static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
sun8i_phy_init	drivers/net/sun8i_emac.c	/^static int sun8i_phy_init(struct emac_eth_dev *priv, void *dev)$/;"	f	typeref:typename:int	file:
sunxi_64cnt	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_64cnt {$/;"	s
sunxi_64cnt	arch/arm/include/asm/arch/timer.h	/^struct sunxi_64cnt {$/;"	s
sunxi_ahci_phy_init	board/sunxi/ahci.c	/^static int sunxi_ahci_phy_init(u32 base)$/;"	f	typeref:typename:int	file:
sunxi_alarm	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_alarm {$/;"	s
sunxi_alarm	arch/arm/include/asm/arch/timer.h	/^struct sunxi_alarm {$/;"	s
sunxi_avs	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_avs {$/;"	s
sunxi_avs	arch/arm/include/asm/arch/timer.h	/^struct sunxi_avs {$/;"	s
sunxi_board_init	board/sunxi/board.c	/^void sunxi_board_init(void)$/;"	f	typeref:typename:void
sunxi_ccm_reg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch/clock_sun4i.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch/clock_sun6i.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_ccm_reg	arch/arm/include/asm/arch/clock_sun9i.h	/^struct sunxi_ccm_reg {$/;"	s
sunxi_composer_enable	drivers/video/sunxi_display.c	/^static void sunxi_composer_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_composer_enable	drivers/video/sunxi_display2.c	/^static void sunxi_composer_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_composer_init	drivers/video/sunxi_display.c	/^static void sunxi_composer_init(void)$/;"	f	typeref:typename:void	file:
sunxi_composer_init	drivers/video/sunxi_display2.c	/^static void sunxi_composer_init(void)$/;"	f	typeref:typename:void	file:
sunxi_composer_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_composer_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_composer_mode_set	drivers/video/sunxi_display2.c	/^static void sunxi_composer_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_cpu_power_off	arch/arm/cpu/armv7/sunxi/psci.c	/^void __secure sunxi_cpu_power_off(u32 cpuid)$/;"	f	typeref:typename:void __secure
sunxi_cpu_set_power	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure sunxi_cpu_set_power(int __always_unused cpu, bool on)$/;"	f	typeref:typename:void __secure	file:
sunxi_cpu_set_power	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure sunxi_cpu_set_power(int cpu, bool on)$/;"	f	typeref:typename:void __secure	file:
sunxi_cpucfg_cpu	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^struct __packed sunxi_cpucfg_cpu {$/;"	s
sunxi_cpucfg_cpu	arch/arm/include/asm/arch/cpucfg.h	/^struct __packed sunxi_cpucfg_cpu {$/;"	s
sunxi_cpucfg_reg	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^struct __packed sunxi_cpucfg_reg {$/;"	s
sunxi_cpucfg_reg	arch/arm/include/asm/arch/cpucfg.h	/^struct __packed sunxi_cpucfg_reg {$/;"	s
sunxi_de_be_reg	arch/arm/include/asm/arch-sunxi/display.h	/^struct sunxi_de_be_reg {$/;"	s
sunxi_de_be_reg	arch/arm/include/asm/arch/display.h	/^struct sunxi_de_be_reg {$/;"	s
sunxi_de_fe_reg	arch/arm/include/asm/arch-sunxi/display.h	/^struct sunxi_de_fe_reg {$/;"	s
sunxi_de_fe_reg	arch/arm/include/asm/arch/display.h	/^struct sunxi_de_fe_reg {$/;"	s
sunxi_display	drivers/video/sunxi_display.c	/^struct sunxi_display {$/;"	s	file:
sunxi_display	drivers/video/sunxi_display.c	/^} sunxi_display;$/;"	v	typeref:struct:sunxi_display
sunxi_display	drivers/video/sunxi_display2.c	/^struct sunxi_display {$/;"	s	file:
sunxi_display	drivers/video/sunxi_display2.c	/^} sunxi_display;$/;"	v	typeref:struct:sunxi_display
sunxi_dma	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^struct sunxi_dma$/;"	s
sunxi_dma	arch/arm/include/asm/arch/dma_sun4i.h	/^struct sunxi_dma$/;"	s
sunxi_dma_cfg	arch/arm/include/asm/arch-sunxi/dma_sun4i.h	/^struct sunxi_dma_cfg$/;"	s
sunxi_dma_cfg	arch/arm/include/asm/arch/dma_sun4i.h	/^struct sunxi_dma_cfg$/;"	s
sunxi_dma_init	drivers/block/ahci.c	/^static void sunxi_dma_init(void __iomem *port_mmio)$/;"	f	typeref:typename:void	file:
sunxi_dram_init	arch/arm/mach-sunxi/dram_sun6i.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	arch/arm/mach-sunxi/dram_sun8i_a23.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	arch/arm/mach-sunxi/dram_sun8i_a33.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	arch/arm/mach-sunxi/dram_sun8i_a83t.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	arch/arm/mach-sunxi/dram_sun9i.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	board/sunxi/dram_sun4i_auto.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_init	board/sunxi/dram_sun5i_auto.c	/^unsigned long sunxi_dram_init(void)$/;"	f	typeref:typename:unsigned long
sunxi_dram_reg	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^struct sunxi_dram_reg {$/;"	s
sunxi_dram_reg	arch/arm/include/asm/arch/dram_sun4i.h	/^struct sunxi_dram_reg {$/;"	s
sunxi_drc_init	drivers/video/sunxi_display.c	/^static void sunxi_drc_init(void)$/;"	f	typeref:typename:void	file:
sunxi_emac_board_setup	drivers/net/sunxi_emac.c	/^static void sunxi_emac_board_setup(struct emac_eth_dev *priv)$/;"	f	typeref:typename:void	file:
sunxi_emac_eth_ids	drivers/net/sunxi_emac.c	/^static const struct udevice_id sunxi_emac_eth_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sunxi_emac_eth_ofdata_to_platdata	drivers/net/sunxi_emac.c	/^static int sunxi_emac_eth_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sunxi_emac_eth_ops	drivers/net/sunxi_emac.c	/^static const struct eth_ops sunxi_emac_eth_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
sunxi_emac_eth_probe	drivers/net/sunxi_emac.c	/^static int sunxi_emac_eth_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sunxi_emac_eth_recv	drivers/net/sunxi_emac.c	/^static int sunxi_emac_eth_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
sunxi_emac_eth_send	drivers/net/sunxi_emac.c	/^static int sunxi_emac_eth_send(struct udevice *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
sunxi_emac_eth_start	drivers/net/sunxi_emac.c	/^static int sunxi_emac_eth_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
sunxi_emac_eth_stop	drivers/net/sunxi_emac.c	/^static void sunxi_emac_eth_stop(struct udevice *dev)$/;"	f	typeref:typename:void	file:
sunxi_emac_init_phy	drivers/net/sunxi_emac.c	/^static int sunxi_emac_init_phy(struct emac_eth_dev *priv, void *dev)$/;"	f	typeref:typename:int	file:
sunxi_engines_init	drivers/video/sunxi_display.c	/^static void sunxi_engines_init(void)$/;"	f	typeref:typename:void	file:
sunxi_engines_init	drivers/video/sunxi_display2.c	/^static void sunxi_engines_init(void)$/;"	f	typeref:typename:void	file:
sunxi_frontend_enable	drivers/video/sunxi_display.c	/^static void sunxi_frontend_enable(void) {}$/;"	f	typeref:typename:void	file:
sunxi_frontend_enable	drivers/video/sunxi_display.c	/^static void sunxi_frontend_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_frontend_init	drivers/video/sunxi_display.c	/^static void sunxi_frontend_init(void) {}$/;"	f	typeref:typename:void	file:
sunxi_frontend_init	drivers/video/sunxi_display.c	/^static void sunxi_frontend_init(void)$/;"	f	typeref:typename:void	file:
sunxi_frontend_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_frontend_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_get_default_mon	drivers/video/sunxi_display.c	/^static enum sunxi_monitor sunxi_get_default_mon(bool allow_hdmi)$/;"	f	typeref:enum:sunxi_monitor	file:
sunxi_get_default_mon	drivers/video/sunxi_display2.c	/^static enum sunxi_monitor sunxi_get_default_mon(bool allow_hdmi)$/;"	f	typeref:enum:sunxi_monitor	file:
sunxi_get_mon_desc	drivers/video/sunxi_display.c	/^static const char *sunxi_get_mon_desc(enum sunxi_monitor monitor)$/;"	f	typeref:typename:const char *	file:
sunxi_get_mon_desc	drivers/video/sunxi_display2.c	/^static const char *sunxi_get_mon_desc(enum sunxi_monitor monitor)$/;"	f	typeref:typename:const char *	file:
sunxi_get_sid	arch/arm/mach-sunxi/cpu_info.c	/^int sunxi_get_sid(unsigned int *sid)$/;"	f	typeref:typename:int
sunxi_get_sram_id	arch/arm/mach-sunxi/cpu_info.c	/^uint sunxi_get_sram_id(void)$/;"	f	typeref:typename:uint
sunxi_get_ss_bonding_id	arch/arm/mach-sunxi/cpu_info.c	/^int sunxi_get_ss_bonding_id(void)$/;"	f	typeref:typename:int
sunxi_gpio	arch/arm/include/asm/arch-sunxi/gpio.h	/^struct sunxi_gpio {$/;"	s
sunxi_gpio	arch/arm/include/asm/arch/gpio.h	/^struct sunxi_gpio {$/;"	s
sunxi_gpio_direction_input	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sunxi_gpio_direction_output	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
sunxi_gpio_get_cfgbank	arch/arm/mach-sunxi/pinmux.c	/^int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)$/;"	f	typeref:typename:int
sunxi_gpio_get_cfgpin	arch/arm/mach-sunxi/pinmux.c	/^int sunxi_gpio_get_cfgpin(u32 pin)$/;"	f	typeref:typename:int
sunxi_gpio_get_function	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sunxi_gpio_get_value	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
sunxi_gpio_ids	drivers/gpio/sunxi_gpio.c	/^static const struct udevice_id sunxi_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
sunxi_gpio_input	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_input(u32 pin)$/;"	f	typeref:typename:int	file:
sunxi_gpio_int	arch/arm/include/asm/arch-sunxi/gpio.h	/^struct sunxi_gpio_int {$/;"	s
sunxi_gpio_int	arch/arm/include/asm/arch/gpio.h	/^struct sunxi_gpio_int {$/;"	s
sunxi_gpio_number	arch/arm/include/asm/arch-sunxi/gpio.h	/^enum sunxi_gpio_number {$/;"	g
sunxi_gpio_number	arch/arm/include/asm/arch/gpio.h	/^enum sunxi_gpio_number {$/;"	g
sunxi_gpio_output	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_output(u32 pin, u32 val)$/;"	f	typeref:typename:int	file:
sunxi_gpio_platdata	drivers/gpio/sunxi_gpio.c	/^struct sunxi_gpio_platdata {$/;"	s	file:
sunxi_gpio_reg	arch/arm/include/asm/arch-sunxi/gpio.h	/^struct sunxi_gpio_reg {$/;"	s
sunxi_gpio_reg	arch/arm/include/asm/arch/gpio.h	/^struct sunxi_gpio_reg {$/;"	s
sunxi_gpio_set_cfgbank	arch/arm/mach-sunxi/pinmux.c	/^void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)$/;"	f	typeref:typename:void
sunxi_gpio_set_cfgpin	arch/arm/mach-sunxi/pinmux.c	/^void sunxi_gpio_set_cfgpin(u32 pin, u32 val)$/;"	f	typeref:typename:void
sunxi_gpio_set_drv	arch/arm/mach-sunxi/pinmux.c	/^int sunxi_gpio_set_drv(u32 pin, u32 val)$/;"	f	typeref:typename:int
sunxi_gpio_set_pull	arch/arm/mach-sunxi/pinmux.c	/^int sunxi_gpio_set_pull(u32 pin, u32 val)$/;"	f	typeref:typename:int
sunxi_gpio_set_value	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
sunxi_gpio_soc_data	drivers/gpio/sunxi_gpio.c	/^struct sunxi_gpio_soc_data {$/;"	s	file:
sunxi_gpio_xlate	drivers/gpio/sunxi_gpio.c	/^static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
sunxi_gtbus_reg	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^struct sunxi_gtbus_reg {$/;"	s
sunxi_gtbus_reg	arch/arm/include/asm/arch/gtbus_sun9i.h	/^struct sunxi_gtbus_reg {$/;"	s
sunxi_has_composite	drivers/video/sunxi_display.c	/^static bool sunxi_has_composite(void)$/;"	f	typeref:typename:bool	file:
sunxi_has_hdmi	drivers/video/sunxi_display.c	/^static bool sunxi_has_hdmi(void)$/;"	f	typeref:typename:bool	file:
sunxi_has_hdmi	drivers/video/sunxi_display2.c	/^static bool sunxi_has_hdmi(void)$/;"	f	typeref:typename:bool	file:
sunxi_has_lcd	drivers/video/sunxi_display.c	/^static bool sunxi_has_lcd(void)$/;"	f	typeref:typename:bool	file:
sunxi_has_vga	drivers/video/sunxi_display.c	/^static bool sunxi_has_vga(void)$/;"	f	typeref:typename:bool	file:
sunxi_hdmi_ctrl_init	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_ctrl_init(void)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_ddc_do_command	drivers/video/sunxi_display.c	/^static int sunxi_hdmi_ddc_do_command(u32 cmnd, int offset, int n)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_ddc_read	drivers/video/sunxi_display.c	/^static int sunxi_hdmi_ddc_read(int offset, u8 *buf, int count)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_ddc_read	drivers/video/sunxi_display2.c	/^static int sunxi_hdmi_ddc_read(int block, u8 *buf)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_ddc_wait_i2c_done	drivers/video/sunxi_display2.c	/^static int sunxi_hdmi_ddc_wait_i2c_done(int msec)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_edid_get_block	drivers/video/sunxi_display.c	/^static int sunxi_hdmi_edid_get_block(int block, u8 *buf)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_edid_get_block	drivers/video/sunxi_display2.c	/^static int sunxi_hdmi_edid_get_block(int block, u8 *buf)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_edid_get_mode	drivers/video/sunxi_display.c	/^static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_edid_get_mode	drivers/video/sunxi_display2.c	/^static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_enable	drivers/video/sunxi_display.c	/^static void sunxi_hdmi_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_enable	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_hpd_detect	drivers/video/sunxi_display.c	/^static int sunxi_hdmi_hpd_detect(int hpd_delay)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_hpd_detect	drivers/video/sunxi_display2.c	/^static int sunxi_hdmi_hpd_detect(int hpd_delay)$/;"	f	typeref:typename:int	file:
sunxi_hdmi_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_hdmi_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_hdmi_mode_set	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_hdmi_phy_init	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_phy_init(void)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_phy_set	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_phy_set(u32 divider)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_reg	arch/arm/include/asm/arch-sunxi/display.h	/^struct sunxi_hdmi_reg {$/;"	s
sunxi_hdmi_reg	arch/arm/include/asm/arch/display.h	/^struct sunxi_hdmi_reg {$/;"	s
sunxi_hdmi_setup_info_frames	drivers/video/sunxi_display.c	/^static void sunxi_hdmi_setup_info_frames(const struct ctfb_res_modes *mode)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_setup_info_frames	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_setup_info_frames(const struct ctfb_res_modes *mode)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_shutdown	drivers/video/sunxi_display.c	/^static void sunxi_hdmi_shutdown(void)$/;"	f	typeref:typename:void	file:
sunxi_hdmi_shutdown	drivers/video/sunxi_display2.c	/^static void sunxi_hdmi_shutdown(void)$/;"	f	typeref:typename:void	file:
sunxi_is_composite	drivers/video/sunxi_display.c	/^static bool sunxi_is_composite(void)$/;"	f	typeref:typename:bool	file:
sunxi_lcdc_backlight_enable	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_backlight_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_enable	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_enable	drivers/video/sunxi_display2.c	/^static void sunxi_lcdc_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_get_clk_delay	drivers/video/sunxi_display.c	/^static int sunxi_lcdc_get_clk_delay(const struct ctfb_res_modes *mode, int tcon)$/;"	f	typeref:typename:int	file:
sunxi_lcdc_get_clk_delay	drivers/video/sunxi_display2.c	/^static int sunxi_lcdc_get_clk_delay(const struct ctfb_res_modes *mode)$/;"	f	typeref:typename:int	file:
sunxi_lcdc_init	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_init(void)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_init	drivers/video/sunxi_display2.c	/^static void sunxi_lcdc_init(void)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_panel_enable	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_panel_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_pll_set	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_pll_set(int tcon, int dotclock,$/;"	f	typeref:typename:void	file:
sunxi_lcdc_pll_set	drivers/video/sunxi_display2.c	/^static void sunxi_lcdc_pll_set(int dotclock, int *clk_div)$/;"	f	typeref:typename:void	file:
sunxi_lcdc_reg	arch/arm/include/asm/arch-sunxi/display.h	/^struct sunxi_lcdc_reg {$/;"	s
sunxi_lcdc_reg	arch/arm/include/asm/arch-sunxi/display2.h	/^struct sunxi_lcdc_reg {$/;"	s
sunxi_lcdc_reg	arch/arm/include/asm/arch/display.h	/^struct sunxi_lcdc_reg {$/;"	s
sunxi_lcdc_reg	arch/arm/include/asm/arch/display2.h	/^struct sunxi_lcdc_reg {$/;"	s
sunxi_lcdc_tcon0_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_lcdc_tcon1_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_lcdc_tcon1_mode_set	drivers/video/sunxi_display2.c	/^static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_mctl_com_reg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch/dram_sun6i.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_com_reg	arch/arm/include/asm/arch/dram_sun9i.h	/^struct sunxi_mctl_com_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch/dram_sun6i.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_ctl_reg	arch/arm/include/asm/arch/dram_sun9i.h	/^struct sunxi_mctl_ctl_reg {$/;"	s
sunxi_mctl_phy_reg	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^struct sunxi_mctl_phy_reg {$/;"	s
sunxi_mctl_phy_reg	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^struct sunxi_mctl_phy_reg {$/;"	s
sunxi_mctl_phy_reg	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^struct sunxi_mctl_phy_reg {$/;"	s
sunxi_mctl_phy_reg	arch/arm/include/asm/arch/dram_sun6i.h	/^struct sunxi_mctl_phy_reg {$/;"	s
sunxi_mctl_phy_reg	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^struct sunxi_mctl_phy_reg {$/;"	s
sunxi_mctl_phy_reg	arch/arm/include/asm/arch/dram_sun9i.h	/^struct sunxi_mctl_phy_reg {$/;"	s
sunxi_mem_map	arch/arm/mach-sunxi/board.c	/^static struct mm_region sunxi_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
sunxi_mmc	arch/arm/include/asm/arch-sunxi/mmc.h	/^struct sunxi_mmc {$/;"	s
sunxi_mmc	arch/arm/include/asm/arch/mmc.h	/^struct sunxi_mmc {$/;"	s
sunxi_mmc_core_init	drivers/mmc/sunxi_mmc.c	/^static int sunxi_mmc_core_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sunxi_mmc_getcd	drivers/mmc/sunxi_mmc.c	/^static int sunxi_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
sunxi_mmc_getcd_gpio	drivers/mmc/sunxi_mmc.c	/^static int sunxi_mmc_getcd_gpio(int sdc_no)$/;"	f	typeref:typename:int	file:
sunxi_mmc_host	drivers/mmc/sunxi_mmc.c	/^struct sunxi_mmc_host {$/;"	s	file:
sunxi_mmc_init	drivers/mmc/sunxi_mmc.c	/^struct mmc *sunxi_mmc_init(int sdc_no)$/;"	f	typeref:struct:mmc *
sunxi_mmc_ops	drivers/mmc/sunxi_mmc.c	/^static const struct mmc_ops sunxi_mmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
sunxi_mmc_send_cmd	drivers/mmc/sunxi_mmc.c	/^static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
sunxi_mmc_set_ios	drivers/mmc/sunxi_mmc.c	/^static void sunxi_mmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
sunxi_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_mode_set	drivers/video/sunxi_display2.c	/^static void sunxi_mode_set(const struct ctfb_res_modes *mode,$/;"	f	typeref:typename:void	file:
sunxi_monitor	drivers/video/sunxi_display.c	/^enum sunxi_monitor {$/;"	g	file:
sunxi_monitor	drivers/video/sunxi_display2.c	/^enum sunxi_monitor {$/;"	g	file:
sunxi_monitor_composite_ntsc	drivers/video/sunxi_display.c	/^	sunxi_monitor_composite_ntsc,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_composite_pal	drivers/video/sunxi_display.c	/^	sunxi_monitor_composite_pal,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_composite_pal_m	drivers/video/sunxi_display.c	/^	sunxi_monitor_composite_pal_m,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_composite_pal_nc	drivers/video/sunxi_display.c	/^	sunxi_monitor_composite_pal_nc,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_dvi	drivers/video/sunxi_display.c	/^	sunxi_monitor_dvi,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_dvi	drivers/video/sunxi_display2.c	/^	sunxi_monitor_dvi,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_hdmi	drivers/video/sunxi_display.c	/^	sunxi_monitor_hdmi,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_hdmi	drivers/video/sunxi_display2.c	/^	sunxi_monitor_hdmi,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_lcd	drivers/video/sunxi_display.c	/^	sunxi_monitor_lcd,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_none	drivers/video/sunxi_display.c	/^	sunxi_monitor_none,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_none	drivers/video/sunxi_display2.c	/^	sunxi_monitor_none,$/;"	e	enum:sunxi_monitor	file:
sunxi_monitor_vga	drivers/video/sunxi_display.c	/^	sunxi_monitor_vga,$/;"	e	enum:sunxi_monitor	file:
sunxi_musb_board_init	arch/arm/include/asm/arch-sunxi/usb_phy.h	/^#define sunxi_musb_board_init(/;"	d
sunxi_musb_board_init	arch/arm/include/asm/arch/usb_phy.h	/^#define sunxi_musb_board_init(/;"	d
sunxi_musb_board_init	drivers/usb/musb-new/sunxi.c	/^void sunxi_musb_board_init(void)$/;"	f	typeref:typename:void
sunxi_musb_disable	drivers/usb/musb-new/sunxi.c	/^static void sunxi_musb_disable(struct musb *musb)$/;"	f	typeref:typename:void	file:
sunxi_musb_enable	drivers/usb/musb-new/sunxi.c	/^static int sunxi_musb_enable(struct musb *musb)$/;"	f	typeref:typename:int	file:
sunxi_musb_init	drivers/usb/musb-new/sunxi.c	/^static int sunxi_musb_init(struct musb *musb)$/;"	f	typeref:typename:int	file:
sunxi_musb_interrupt	drivers/usb/musb-new/sunxi.c	/^static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)$/;"	f	typeref:typename:irqreturn_t	file:
sunxi_musb_ops	drivers/usb/musb-new/sunxi.c	/^static const struct musb_platform_ops sunxi_musb_ops = {$/;"	v	typeref:typename:const struct musb_platform_ops	file:
sunxi_name_to_gpio	drivers/gpio/sunxi_gpio.c	/^int sunxi_name_to_gpio(const char *name)$/;"	f	typeref:typename:int
sunxi_name_to_gpio_bank	drivers/gpio/sunxi_gpio.c	/^int sunxi_name_to_gpio_bank(const char *name)$/;"	f	typeref:typename:int
sunxi_nand_chip	drivers/mtd/nand/sunxi_nand.c	/^struct sunxi_nand_chip {$/;"	s	file:
sunxi_nand_chip_init	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)$/;"	f	typeref:typename:int	file:
sunxi_nand_chip_init_timings	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip)$/;"	f	typeref:typename:int	file:
sunxi_nand_chip_sel	drivers/mtd/nand/sunxi_nand.c	/^struct sunxi_nand_chip_sel {$/;"	s	file:
sunxi_nand_chip_set_timings	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_chip_set_timings(struct sunxi_nand_chip *chip,$/;"	f	typeref:typename:int	file:
sunxi_nand_chips_cleanup	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nand_chips_cleanup(struct sunxi_nfc *nfc)$/;"	f	typeref:typename:void	file:
sunxi_nand_chips_init	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)$/;"	f	typeref:typename:int	file:
sunxi_nand_ecc_cleanup	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)$/;"	f	typeref:typename:void	file:
sunxi_nand_ecc_init	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc)$/;"	f	typeref:typename:int	file:
sunxi_nand_hw_common_ecc_ctrl_cleanup	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nand_hw_common_ecc_ctrl_cleanup(struct nand_ecc_ctrl *ecc)$/;"	f	typeref:typename:void	file:
sunxi_nand_hw_common_ecc_ctrl_init	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nand_hw_ecc	drivers/mtd/nand/sunxi_nand.c	/^struct sunxi_nand_hw_ecc {$/;"	s	file:
sunxi_nand_hw_ecc_ctrl_init	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nand_hw_syndrome_ecc_ctrl_init	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nand_hw_syndrome_ecc_ctrl_init(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nand_init	drivers/mtd/nand/sunxi_nand.c	/^void sunxi_nand_init(void)$/;"	f	typeref:typename:void
sunxi_nand_lookup_timing	drivers/mtd/nand/sunxi_nand.c	/^#define sunxi_nand_lookup_timing(/;"	d	file:
sunxi_nand_rb	drivers/mtd/nand/sunxi_nand.c	/^struct sunxi_nand_rb {$/;"	s	file:
sunxi_nand_rb_type	drivers/mtd/nand/sunxi_nand.c	/^enum sunxi_nand_rb_type {$/;"	g	file:
sunxi_nfc	drivers/mtd/nand/sunxi_nand.c	/^struct sunxi_nfc {$/;"	s	file:
sunxi_nfc_buf_to_user_data	drivers/mtd/nand/sunxi_nand.c	/^static inline u32 sunxi_nfc_buf_to_user_data(const u8 *buf)$/;"	f	typeref:typename:u32	file:
sunxi_nfc_cmd_ctrl	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_cmd_ctrl(struct mtd_info *mtd, int dat,$/;"	f	typeref:typename:void	file:
sunxi_nfc_dev_ready	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_ecc_disable	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_hw_ecc_disable(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
sunxi_nfc_hw_ecc_enable	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_hw_ecc_enable(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
sunxi_nfc_hw_ecc_read_chunk	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_ecc_read_chunk(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_ecc_read_extra_oob	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_hw_ecc_read_extra_oob(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
sunxi_nfc_hw_ecc_read_page	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_ecc_read_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_ecc_read_subpage	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_ecc_read_subpage(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_ecc_write_chunk	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_ecc_write_chunk(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_ecc_write_extra_oob	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_hw_ecc_write_extra_oob(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
sunxi_nfc_hw_ecc_write_page	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_ecc_write_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_ecc_write_subpage	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_ecc_write_subpage(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_syndrome_ecc_read_page	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_syndrome_ecc_read_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_hw_syndrome_ecc_write_page	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_hw_syndrome_ecc_write_page(struct mtd_info *mtd,$/;"	f	typeref:typename:int	file:
sunxi_nfc_randomize_bbm	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_randomize_bbm(struct mtd_info *mtd, int page, u8 *bbm)$/;"	f	typeref:typename:void	file:
sunxi_nfc_randomizer_config	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_randomizer_config(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
sunxi_nfc_randomizer_disable	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_randomizer_disable(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
sunxi_nfc_randomizer_ecc1024_seeds	drivers/mtd/nand/sunxi_nand.c	/^static const u16 sunxi_nfc_randomizer_ecc1024_seeds[] = {$/;"	v	typeref:typename:const u16[]	file:
sunxi_nfc_randomizer_ecc512_seeds	drivers/mtd/nand/sunxi_nand.c	/^static const u16 sunxi_nfc_randomizer_ecc512_seeds[] = {$/;"	v	typeref:typename:const u16[]	file:
sunxi_nfc_randomizer_enable	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_randomizer_enable(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
sunxi_nfc_randomizer_page_seeds	drivers/mtd/nand/sunxi_nand.c	/^static const u16 sunxi_nfc_randomizer_page_seeds[] = {$/;"	v	typeref:typename:const u16[]	file:
sunxi_nfc_randomizer_read_buf	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_randomizer_read_buf(struct mtd_info *mtd, uint8_t *buf,$/;"	f	typeref:typename:void	file:
sunxi_nfc_randomizer_state	drivers/mtd/nand/sunxi_nand.c	/^static u16 sunxi_nfc_randomizer_state(struct mtd_info *mtd, int page, bool ecc)$/;"	f	typeref:typename:u16	file:
sunxi_nfc_randomizer_step	drivers/mtd/nand/sunxi_nand.c	/^static u16 sunxi_nfc_randomizer_step(u16 state, int count)$/;"	f	typeref:typename:u16	file:
sunxi_nfc_randomizer_write_buf	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_randomizer_write_buf(struct mtd_info *mtd,$/;"	f	typeref:typename:void	file:
sunxi_nfc_read_buf	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)$/;"	f	typeref:typename:void	file:
sunxi_nfc_read_byte	drivers/mtd/nand/sunxi_nand.c	/^static uint8_t sunxi_nfc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
sunxi_nfc_rst	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_rst(struct sunxi_nfc *nfc)$/;"	f	typeref:typename:int	file:
sunxi_nfc_select_chip	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
sunxi_nfc_set_clk_rate	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_set_clk_rate(unsigned long hz)$/;"	f	typeref:typename:void	file:
sunxi_nfc_user_data_to_buf	drivers/mtd/nand/sunxi_nand.c	/^static inline void sunxi_nfc_user_data_to_buf(u32 user_data, u8 *buf)$/;"	f	typeref:typename:void	file:
sunxi_nfc_wait_cmd_fifo_empty	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_wait_cmd_fifo_empty(struct sunxi_nfc *nfc)$/;"	f	typeref:typename:int	file:
sunxi_nfc_wait_int	drivers/mtd/nand/sunxi_nand.c	/^static int sunxi_nfc_wait_int(struct sunxi_nfc *nfc, u32 flags,$/;"	f	typeref:typename:int	file:
sunxi_nfc_write_buf	drivers/mtd/nand/sunxi_nand.c	/^static void sunxi_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf,$/;"	f	typeref:typename:void	file:
sunxi_p2wi_reg	arch/arm/include/asm/arch-sunxi/p2wi.h	/^struct sunxi_p2wi_reg {$/;"	s
sunxi_p2wi_reg	arch/arm/include/asm/arch/p2wi.h	/^struct sunxi_p2wi_reg {$/;"	s
sunxi_phy_hdmi_reg	arch/arm/include/asm/arch-sunxi/display2.h	/^struct sunxi_phy_hdmi_reg {$/;"	s
sunxi_phy_hdmi_reg	arch/arm/include/asm/arch/display2.h	/^struct sunxi_phy_hdmi_reg {$/;"	s
sunxi_power_switch	arch/arm/cpu/armv7/sunxi/psci.c	/^static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on,$/;"	f	typeref:typename:void __secure	file:
sunxi_prcm_reg	arch/arm/include/asm/arch-sunxi/prcm.h	/^struct __packed sunxi_prcm_reg {$/;"	s
sunxi_prcm_reg	arch/arm/include/asm/arch/prcm.h	/^struct __packed sunxi_prcm_reg {$/;"	s
sunxi_rgb2yuv_coef	drivers/video/sunxi_display.c	/^static u32 sunxi_rgb2yuv_coef[12] = {$/;"	v	typeref:typename:u32[12]	file:
sunxi_rsb_reg	arch/arm/include/asm/arch-sunxi/rsb.h	/^struct sunxi_rsb_reg {$/;"	s
sunxi_rsb_reg	arch/arm/include/asm/arch/rsb.h	/^struct sunxi_rsb_reg {$/;"	s
sunxi_rtc	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_rtc {$/;"	s
sunxi_rtc	arch/arm/include/asm/arch/timer.h	/^struct sunxi_rtc {$/;"	s
sunxi_simplefb_setup	drivers/video/sunxi_display.c	/^int sunxi_simplefb_setup(void *blob)$/;"	f	typeref:typename:int
sunxi_simplefb_setup	drivers/video/sunxi_display2.c	/^int sunxi_simplefb_setup(void *blob)$/;"	f	typeref:typename:int
sunxi_spi0_read_data	drivers/mtd/spi/sunxi_spi_spl.c	/^static void sunxi_spi0_read_data(u8 *buf, u32 addr, u32 bufsize,$/;"	f	typeref:typename:void	file:
sunxi_sramc_regs	drivers/net/sunxi_emac.c	/^struct sunxi_sramc_regs {$/;"	s	file:
sunxi_ssd2828_init	drivers/video/sunxi_display.c	/^static int sunxi_ssd2828_init(const struct ctfb_res_modes *mode)$/;"	f	typeref:typename:int	file:
sunxi_tgp	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_tgp {$/;"	s
sunxi_tgp	arch/arm/include/asm/arch/timer.h	/^struct sunxi_tgp {$/;"	s
sunxi_timer	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_timer {$/;"	s
sunxi_timer	arch/arm/include/asm/arch/timer.h	/^struct sunxi_timer {$/;"	s
sunxi_timer_reg	arch/arm/include/asm/arch-sunxi/timer.h	/^struct sunxi_timer_reg {$/;"	s
sunxi_timer_reg	arch/arm/include/asm/arch/timer.h	/^struct sunxi_timer_reg {$/;"	s
sunxi_tve_reg	arch/arm/include/asm/arch-sunxi/display.h	/^struct sunxi_tve_reg {$/;"	s
sunxi_tve_reg	arch/arm/include/asm/arch/display.h	/^struct sunxi_tve_reg {$/;"	s
sunxi_tvencoder_enable	drivers/video/sunxi_display.c	/^static void sunxi_tvencoder_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_tvencoder_mode_set	drivers/video/sunxi_display.c	/^static void sunxi_tvencoder_mode_set(void)$/;"	f	typeref:typename:void	file:
sunxi_tzpc	arch/arm/include/asm/arch-sunxi/tzpc.h	/^struct sunxi_tzpc {$/;"	s
sunxi_tzpc	arch/arm/include/asm/arch/tzpc.h	/^struct sunxi_tzpc {$/;"	s
sunxi_usb_phy	arch/arm/mach-sunxi/usb_phy.c	/^static struct sunxi_usb_phy {$/;"	s	file:
sunxi_usb_phy	arch/arm/mach-sunxi/usb_phy.c	/^} sunxi_usb_phy[] = {$/;"	v	typeref:struct:sunxi_usb_phy[]
sunxi_usb_phy_config	arch/arm/mach-sunxi/usb_phy.c	/^static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)$/;"	f	typeref:typename:void	file:
sunxi_usb_phy_enable_squelch_detect	arch/arm/mach-sunxi/usb_phy.c	/^void sunxi_usb_phy_enable_squelch_detect(int index, int enable)$/;"	f	typeref:typename:void
sunxi_usb_phy_exit	arch/arm/mach-sunxi/usb_phy.c	/^void sunxi_usb_phy_exit(int index)$/;"	f	typeref:typename:void
sunxi_usb_phy_id_detect	arch/arm/mach-sunxi/usb_phy.c	/^int sunxi_usb_phy_id_detect(int index)$/;"	f	typeref:typename:int
sunxi_usb_phy_init	arch/arm/mach-sunxi/usb_phy.c	/^void sunxi_usb_phy_init(int index)$/;"	f	typeref:typename:void
sunxi_usb_phy_passby	arch/arm/mach-sunxi/usb_phy.c	/^static void sunxi_usb_phy_passby(struct sunxi_usb_phy *phy, int enable)$/;"	f	typeref:typename:void	file:
sunxi_usb_phy_power_off	arch/arm/mach-sunxi/usb_phy.c	/^void sunxi_usb_phy_power_off(int index)$/;"	f	typeref:typename:void
sunxi_usb_phy_power_on	arch/arm/mach-sunxi/usb_phy.c	/^void sunxi_usb_phy_power_on(int index)$/;"	f	typeref:typename:void
sunxi_usb_phy_probe	arch/arm/mach-sunxi/usb_phy.c	/^int sunxi_usb_phy_probe(void)$/;"	f	typeref:typename:int
sunxi_usb_phy_remove	arch/arm/mach-sunxi/usb_phy.c	/^int sunxi_usb_phy_remove(void)$/;"	f	typeref:typename:int
sunxi_usb_phy_vbus_detect	arch/arm/mach-sunxi/usb_phy.c	/^int sunxi_usb_phy_vbus_detect(int index)$/;"	f	typeref:typename:int
sunxi_vga_external_dac_enable	drivers/video/sunxi_display.c	/^static void sunxi_vga_external_dac_enable(void)$/;"	f	typeref:typename:void	file:
sunxi_wdog	arch/arm/include/asm/arch-sunxi/watchdog.h	/^struct sunxi_wdog {$/;"	s
sunxi_wdog	arch/arm/include/asm/arch/watchdog.h	/^struct sunxi_wdog {$/;"	s
super	fs/cramfs/cramfs.c	/^struct cramfs_super super;$/;"	v	typeref:struct:cramfs_super
super_block	fs/ubifs/ubifs.h	/^struct super_block {$/;"	s
super_hydra_mdio	board/freescale/corenet_ds/eth_superhydra.c	/^struct super_hydra_mdio {$/;"	s	file:
super_hydra_mdio_init	board/freescale/corenet_ds/eth_superhydra.c	/^static int super_hydra_mdio_init(char *realbusname, char *fakebusname)$/;"	f	typeref:typename:int	file:
super_hydra_mdio_read	board/freescale/corenet_ds/eth_superhydra.c	/^static int super_hydra_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
super_hydra_mdio_reset	board/freescale/corenet_ds/eth_superhydra.c	/^static int super_hydra_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
super_hydra_mdio_set_mux	board/freescale/corenet_ds/eth_superhydra.c	/^static void super_hydra_mdio_set_mux(char *name, u8 mask, u8 val)$/;"	f	typeref:typename:void	file:
super_hydra_mdio_write	board/freescale/corenet_ds/eth_superhydra.c	/^static int super_hydra_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
super_hydra_mux_mdio	board/freescale/corenet_ds/eth_superhydra.c	/^void super_hydra_mux_mdio(u8 mask, u8 val)$/;"	f	typeref:typename:void
super_operations	fs/ubifs/ubifs.h	/^struct super_operations {$/;"	s
super_root_key	tools/imximage.h	/^	uint32_t super_root_key;$/;"	m	struct:__anon504a956c0408	typeref:typename:uint32_t
super_sku	arch/x86/include/asm/arch-ivybridge/me.h	/^	u32 super_sku:1;$/;"	m	struct:platform_type_rule_data	typeref:typename:u32:1
super_standy_flag	arch/arm/include/asm/arch-sunxi/cpucfg.h	/^	u32 super_standy_flag;	\/* 0x1a0 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
super_standy_flag	arch/arm/include/asm/arch/cpucfg.h	/^	u32 super_standy_flag;	\/* 0x1a0 *\/$/;"	m	struct:sunxi_cpucfg_reg	typeref:typename:u32
superio_enter	drivers/misc/nuvoton_nct6102d.c	/^static int superio_enter(void)$/;"	f	typeref:typename:int	file:
superio_exit	drivers/misc/nuvoton_nct6102d.c	/^static void superio_exit(void)$/;"	f	typeref:typename:void	file:
superio_inb	drivers/misc/nuvoton_nct6102d.c	/^static inline int superio_inb(int reg)$/;"	f	typeref:typename:int	file:
superio_outb	drivers/misc/nuvoton_nct6102d.c	/^static void superio_outb(int reg, int val)$/;"	f	typeref:typename:void	file:
superio_select	drivers/misc/nuvoton_nct6102d.c	/^static void superio_select(int ld)$/;"	f	typeref:typename:void	file:
supp	drivers/net/lpc32xx_eth.c	/^	u32 supp;		\/* Phy Support register *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
supp	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic supp; \/* 0x260*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
supp_mac_addr_0_0	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_0_0;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_0_1	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_0_1;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_1_0	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_1_0;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_1_1	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_1_1;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_2_0	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_2_0;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_2_1	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_2_1;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_3_0	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_3_0;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
supp_mac_addr_3_1	drivers/net/altera_tse.h	/^	u32 supp_mac_addr_3_1;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
support_card	arch/arm/dts/uniphier-support-card.dtsi	/^	support_card: support_card {$/;"	l
support_card_init	arch/arm/mach-uniphier/micro-support-card.c	/^void support_card_init(void)$/;"	f	typeref:typename:void
support_card_init	arch/arm/mach-uniphier/micro-support-card.h	/^static inline void support_card_init(void)$/;"	f	typeref:typename:void
support_card_late_init	arch/arm/mach-uniphier/micro-support-card.c	/^void support_card_late_init(void)$/;"	f	typeref:typename:void
support_card_late_init	arch/arm/mach-uniphier/micro-support-card.h	/^static inline void support_card_late_init(void)$/;"	f	typeref:typename:void
support_card_reset	arch/arm/mach-uniphier/micro-support-card.c	/^void support_card_reset(void)$/;"	f	typeref:typename:void
support_card_reset	arch/arm/mach-uniphier/micro-support-card.h	/^static inline void support_card_reset(void)$/;"	f	typeref:typename:void
support_card_reset_deassert	arch/arm/mach-uniphier/micro-support-card.c	/^void support_card_reset_deassert(void)$/;"	f	typeref:typename:void
support_card_show_revision	arch/arm/mach-uniphier/micro-support-card.c	/^static int support_card_show_revision(void)$/;"	f	typeref:typename:int	file:
support_enhanced_framing	drivers/video/tegra124/sor.h	/^	int	support_enhanced_framing;$/;"	m	struct:tegra_dp_link_config	typeref:typename:int
supported	drivers/block/sata_sil.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/dc2114x.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/designware.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/eepro100.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/natsemi.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/ns8382x.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/pch_gbe.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/pcnet.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/rtl8139.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/net/rtl8169.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/pcmcia/ti_pci1410a.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/video/ct69000.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	drivers/video/mb862xx.c	/^static struct pci_device_id supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
supported	include/dma.h	/^	u32 supported;$/;"	m	struct:dma_dev_priv	typeref:typename:u32
supported	include/linux/ethtool.h	/^	__u32	supported;	\/* Features this interface supports *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u32
supported	include/linux/ethtool.h	/^	__u32	supported;$/;"	m	struct:ethtool_wolinfo	typeref:typename:__u32
supported	include/phy.h	/^	u32 supported;$/;"	m	struct:phy_device	typeref:typename:u32
supported_cas_latencies	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 supported_cas_latencies;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
supported_chips	drivers/net/lan91c96.c	/^static struct id_type supported_chips[] = {$/;"	v	typeref:struct:id_type[]	file:
supported_nfs_versions	net/nfs.c	/^static char supported_nfs_versions = NFSV2_FLAG | NFSV3_FLAG;$/;"	v	typeref:typename:char	file:
supported_rela	tools/relocate-rela.c	/^static bool supported_rela(Elf64_Rela *rela)$/;"	f	typeref:typename:bool	file:
supports_gmii	drivers/usb/eth/r8152.h	/^	bool supports_gmii;$/;"	m	struct:r8152	typeref:typename:bool
surf_info	drivers/video/ati_radeon_fb.h	/^	u32		surf_info[8];$/;"	m	struct:radeon_regs	typeref:typename:u32[8]
surf_lower_bound	drivers/video/ati_radeon_fb.h	/^	u32		surf_lower_bound[8];$/;"	m	struct:radeon_regs	typeref:typename:u32[8]
surf_upper_bound	drivers/video/ati_radeon_fb.h	/^	u32		surf_upper_bound[8];$/;"	m	struct:radeon_regs	typeref:typename:u32[8]
surface_cntl	drivers/video/ati_radeon_fb.h	/^	u32		surface_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
surfaces	disk/part_amiga.h	/^    u32 surfaces;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
suseconds_t	include/linux/types.h	/^typedef __kernel_suseconds_t	suseconds_t;$/;"	t	typeref:typename:__kernel_suseconds_t
susp_ctrl	arch/arm/include/asm/arch-tegra/usb.h	/^	uint susp_ctrl;$/;"	m	struct:usb_ctlr	typeref:typename:uint
suspend	drivers/qe/uec_phy.h	/^	int (*suspend) (struct uec_mii_info * mii_info);$/;"	m	struct:phy_info	typeref:typename:int (*)(struct uec_mii_info * mii_info)
suspend	drivers/usb/phy/rockchip_usb2_phy.c	/^	struct usb2phy_reg suspend;$/;"	m	struct:rockchip_usb2_phy_cfg	typeref:struct:usb2phy_reg	file:
suspend	include/linux/usb/composite.h	/^	void			(*suspend)(struct usb_composite_dev *);$/;"	m	struct:usb_composite_driver	typeref:typename:void (*)(struct usb_composite_dev *)
suspend	include/linux/usb/composite.h	/^	void			(*suspend)(struct usb_function *);$/;"	m	struct:usb_function	typeref:typename:void (*)(struct usb_function *)
suspend	include/linux/usb/gadget.h	/^	void			(*suspend)(struct usb_gadget *);$/;"	m	struct:usb_gadget_driver	typeref:typename:void (*)(struct usb_gadget *)
suspend_l_sleep	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		suspend_l_sleep: suspend-l-sleep {$/;"	l
suspend_l_wake	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		suspend_l_wake: suspend-l-wake {$/;"	l
suspend_wakeup_status	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^enum suspend_wakeup_status {$/;"	g
suspended	drivers/usb/gadget/at91_udc.h	/^	unsigned			suspended:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
suspended	drivers/usb/gadget/ether.c	/^	unsigned		suspended:1;$/;"	m	struct:eth_dev	typeref:typename:unsigned:1	file:
suspended	include/linux/usb/composite.h	/^	unsigned int			suspended:1;$/;"	m	struct:usb_composite_dev	typeref:typename:unsigned int:1
suspmode	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned short	suspmode;$/;"	m	struct:usb_common_regs	typeref:typename:unsigned short
suspmode	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned short	suspmode;$/;"	m	struct:usb_common_regs	typeref:typename:unsigned short
suspmode	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned short	suspmode;$/;"	m	struct:usb_common_regs	typeref:typename:unsigned short
suspsrc	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	suspsrc;$/;"	m	struct:davinci_syscfg_regs	typeref:typename:dv_reg
svc32_mode_en	arch/arm/mach-exynos/include/mach/system.h	/^#define svc32_mode_en(/;"	d
svc_entry	arch/arm/mach-exynos/sec_boot.S	/^svc_entry:$/;"	l
svr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     svr;            \/* System version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
svr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	svr;		\/* System version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
svr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     svr;            \/* System version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
svr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	svr;		\/* Spurious Vector *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
svr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	svr;		\/* System version *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
svr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	svr;		\/* 0x410e0 - Spurious Vector Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
svr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	svr;		\/* 0xe00a4 - System version register *\/$/;"	m	struct:ccsr_gur	typeref:typename:uint
sw	board/freescale/common/ngpixis.h	/^		u8 sw;$/;"	m	struct:ngpixis::__anonfc4359a50108	typeref:typename:u8
sw	board/freescale/p2041rdb/cpld.h	/^	u8 sw[1];		\/* 0xd - SW2 Status *\/$/;"	m	struct:cpld_data	typeref:typename:u8[1]
sw1_sysclk	board/freescale/t4rdb/cpld.h	/^	u8 sw1_sysclk;	\/* 0x09 - SW1 Status Read Back Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw2_status	board/freescale/t4rdb/cpld.h	/^	u8 sw2_status;	\/* 0x0a - SW2 Status Read Back Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw3_status	board/freescale/t4rdb/cpld.h	/^	u8 sw3_status;	\/* 0x0b - SW3 Status Read Back Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw4_status	board/freescale/t4rdb/cpld.h	/^	u8 sw4_status;	\/* 0x0c - SW4 Status Read Back Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_buffer	drivers/net/cpsw.c	/^	u32			sw_buffer;$/;"	m	struct:cpdma_desc	typeref:typename:u32	file:
sw_burst_req	drivers/dma/lpc32xx_dma.c	/^	u32 sw_burst_req;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
sw_clk_off	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 sw_clk_off;            \/* 0x114 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
sw_clk_off	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 sw_clk_off;            \/* 0x114 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
sw_clk_on	arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h	/^	u32 sw_clk_on;             \/* 0x110 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
sw_clk_on	arch/arm/include/asm/arch/gtbus_sun9i.h	/^	u32 sw_clk_on;             \/* 0x110 *\/$/;"	m	struct:sunxi_gtbus_reg	typeref:typename:u32
sw_ctl_on	board/freescale/p2041rdb/cpld.h	/^	u8 sw_ctl_on;		\/* 0x5 - Switch Control Enable Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_ecc	tools/vybridimage.c	/^	uint8_t  sw_ecc[512];		\/* 0x00000200 - 0x000003ff *\/$/;"	m	struct:nand_page_0_boot_header	typeref:typename:uint8_t[512]	file:
sw_gen0	drivers/video/ipu_regs.h	/^	u32 sw_gen0[9];$/;"	m	struct:ipu_di	typeref:typename:u32[9]
sw_gen1	drivers/video/ipu_regs.h	/^	u32 sw_gen1[9];$/;"	m	struct:ipu_di	typeref:typename:u32[9]
sw_id_offset	drivers/net/xilinx_axi_emac.c	/^	u32 sw_id_offset;$/;"	m	struct:axidma_bd	typeref:typename:u32	file:
sw_int	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 sw_int;		\/* Software Interrupt Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
sw_jtag	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 sw_jtag;	\/*0x040*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
sw_last_burst_req	drivers/dma/lpc32xx_dma.c	/^	u32 sw_last_burst_req;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
sw_last_single_req	drivers/dma/lpc32xx_dma.c	/^	u32 sw_last_single_req;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
sw_len	drivers/net/cpsw.c	/^	u32			sw_len;$/;"	m	struct:cpdma_desc	typeref:typename:u32	file:
sw_maj_ver	board/freescale/t4rdb/cpld.h	/^	u8 sw_maj_ver;	\/* 0x02 - CPLD Code Major Version Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_min_ver	board/freescale/t4rdb/cpld.h	/^	u8 sw_min_ver;	\/* 0x03 - CPLD Code Minor Version Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_portal	include/fsl-mc/fsl_mc_private.h	/^	struct qbman_swp *sw_portal; \/** SW portal object *\/$/;"	m	struct:fsl_dpio_obj	typeref:struct:qbman_swp *
sw_r_bpi_m2p	arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts	/^	sw_r_bpi_m2p: key_pins@0 {$/;"	l
sw_r_opc	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	sw_r_opc: key_pins@0 {$/;"	l
sw_r_opc	arch/arm/dts/sun8i-h3-orangepi-lite.dts	/^	sw_r_opc: key_pins@0 {$/;"	l
sw_r_opc	arch/arm/dts/sun8i-h3-orangepi-one.dts	/^	sw_r_opc: key_pins@0 {$/;"	l
sw_r_opc	arch/arm/dts/sun8i-h3-orangepi-pc.dts	/^	sw_r_opc: key_pins@0 {$/;"	l
sw_reg_read	drivers/net/phy/mv88e6352.c	/^static int sw_reg_read(const char *devname, u8 phy_addr, u8 port,$/;"	f	typeref:typename:int	file:
sw_reg_write	drivers/net/phy/mv88e6352.c	/^static int sw_reg_write(const char *devname, u8 phy_addr, u8 port,$/;"	f	typeref:typename:int	file:
sw_screen	drivers/video/sed156x.c	/^static u8 sw_screen[LCD_BYTE_WIDTH * LCD_HEIGHT];$/;"	v	typeref:typename:u8[]	file:
sw_single_req	drivers/dma/lpc32xx_dma.c	/^	u32 sw_single_req;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
sw_status	include/vsc9953.h	/^	u32	sw_status[11];$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32[11]
sw_sticky	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	sw_sticky;$/;"	m	struct:ocotp_regs	typeref:typename:u32
sw_sticky	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 sw_sticky;$/;"	m	struct:ocotp_regs	typeref:typename:u32
sw_ver	board/freescale/t102xrdb/cpld.h	/^	u8 sw_ver;		\/* 0x03 - Software Revision register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_ver	board/freescale/t104xrdb/cpld.h	/^	u8 sw_ver;		\/* 0x03 - Software Revision register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_ver	board/freescale/t208xrdb/cpld.h	/^	u8 sw_ver;		\/* 0x03 - Software Revision register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sw_wait_rdy	drivers/net/phy/mv88e6352.c	/^static int sw_wait_rdy(const char *devname, u8 phy_addr)$/;"	f	typeref:typename:int	file:
sw_wp_add_hig	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 sw_wp_add_hig;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
sw_wp_add_low	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 sw_wp_add_low;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
swab16	include/linux/byteorder/swab.h	/^#define swab16 /;"	d
swab16p	include/linux/byteorder/swab.h	/^#define swab16p /;"	d
swab16s	include/linux/byteorder/swab.h	/^#define swab16s /;"	d
swab32	include/linux/byteorder/swab.h	/^#define swab32 /;"	d
swab32p	include/linux/byteorder/swab.h	/^#define swab32p /;"	d
swab32s	include/linux/byteorder/swab.h	/^#define swab32s /;"	d
swab64	include/linux/byteorder/swab.h	/^#define swab64 /;"	d
swab64p	include/linux/byteorder/swab.h	/^#define swab64p /;"	d
swab64s	include/linux/byteorder/swab.h	/^#define swab64s /;"	d
swap	include/linux/kernel.h	/^#define swap(/;"	d
swap16	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^swap16 (unsigned short x)$/;"	f	typeref:typename:unsigned short	file:
swap16	board/tqc/tqm5200/cam5200_flash.c	/^#define swap16(/;"	d	file:
swap64	tools/relocate-rela.c	/^static inline uint64_t swap64(uint64_t val)$/;"	f	typeref:typename:uint64_t	file:
swap_16	include/usb.h	/^# define swap_16(/;"	d
swap_32	include/usb.h	/^# define swap_32(/;"	d
swap_case_op	drivers/misc/swap_case.c	/^enum swap_case_op {$/;"	g	file:
swap_case_platdata	drivers/misc/swap_case.c	/^struct swap_case_platdata {$/;"	s	file:
swap_case_priv	drivers/misc/swap_case.c	/^struct swap_case_priv {$/;"	s	file:
swap_cfg	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		swap_cfg;	\/* 0x28 *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
swap_file_header	fs/cbfs/cbfs.c	/^static void swap_file_header(struct cbfs_fileheader *dest,$/;"	f	typeref:typename:void	file:
swap_header	fs/cbfs/cbfs.c	/^static void swap_header(struct cbfs_header *dest, struct cbfs_header *src)$/;"	f	typeref:typename:void	file:
swap_packet	drivers/net/fec_mxc.c	/^static void swap_packet(uint32_t *packet, int length)$/;"	f	typeref:typename:void	file:
swap_rx	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	int			swap_rx;$/;"	m	struct:serdes_map	typeref:typename:int
swap_script	drivers/block/sym53c8xx.c	/^unsigned long swap_script(unsigned long val)$/;"	f	typeref:typename:unsigned long
swap_to	board/bf533-stamp/bf533-stamp.c	/^void swap_to(int device_id)$/;"	f	typeref:typename:void
swap_to	board/blackstamp/blackstamp.c	/^void swap_to(int device_id)$/;"	f	typeref:typename:void
swap_to	drivers/net/smc91111.c	/^# define swap_to(/;"	d	file:
swap_tx	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h	/^	int			swap_tx;$/;"	m	struct:serdes_map	typeref:typename:int
swapcode	fs/yaffs2/yaffs_qsort.c	/^#define swapcode(/;"	d	file:
swapfunc	fs/yaffs2/yaffs_qsort.c	/^swapfunc(char *a, char *b, int n, int swaptype)$/;"	f	typeref:typename:void	file:
swapper_pg_dir	arch/sparc/lib/bootm.c	/^	char swapper_pg_dir[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
swcnr	arch/powerpc/include/asm/immap_512x.h	/^	u32 swcnr;		\/* System watchdog count register *\/$/;"	m	struct:wdt512x	typeref:typename:u32
swcnr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 swcnr;		\/* System watchdog count register *\/$/;"	m	struct:wdt83xx	typeref:typename:u32
swcnr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	swcnr; \/* System watchdog count register *\/$/;"	m	struct:ccsr_wdt	typeref:typename:uint
swcrr	arch/powerpc/include/asm/immap_512x.h	/^	u32 swcrr;		\/* System watchdog control register *\/$/;"	m	struct:wdt512x	typeref:typename:u32
swcrr	arch/powerpc/include/asm/immap_83xx.h	/^	u32 swcrr;		\/* System watchdog control register *\/$/;"	m	struct:wdt83xx	typeref:typename:u32
swcrr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	swcrr; \/* System watchdog control register *\/$/;"	m	struct:ccsr_wdt	typeref:typename:uint
swdt_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	smc_aper_clk, swdt_clk, dbg_trc_clk, dbg_apb_clk, clk_max};$/;"	e	enum:zynq_clk
sweep_cnt	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u8 sweep_cnt = 1;$/;"	v	typeref:typename:u8
sweep_pattern	drivers/ddr/marvell/a38x/ddr3_training_bist.c	/^enum hws_pattern sweep_pattern = PATTERN_KILLER_DQ0;$/;"	v	typeref:enum:hws_pattern
swfw_sync_present	drivers/net/e1000.h	/^	uint32_t		swfw_sync_present;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
swfwhw_semaphore_present	drivers/net/e1000.h	/^	uint32_t		swfwhw_semaphore_present;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
swiack	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 swiack;		\/* 0x00 Global Software Interrupt ack *\/$/;"	m	struct:intgack_ctrl1	typeref:typename:u8
swiack0	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 swiack0;		\/* 0xE0 Software Interrupt ack *\/$/;"	m	struct:int0_ctrl	typeref:typename:u8
swiack1	arch/m68k/include/asm/coldfire/intctrl.h	/^	u8 swiack1;		\/* 0xE0 Software Interrupt ack *\/$/;"	m	struct:int1_ctrl	typeref:typename:u8
swinfo	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 swinfo[3];$/;"	m	struct:qm_host_desc	typeref:typename:u32[3]
switch	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^		switch: ethernet-switch@1e {$/;"	l
switch_LED_off	arch/arm/cpu/arm920t/ep93xx/led.c	/^static inline void switch_LED_off(uint8_t led)$/;"	f	typeref:typename:void	file:
switch_LED_on	arch/arm/cpu/arm920t/ep93xx/led.c	/^static inline void switch_LED_on(uint8_t led)$/;"	f	typeref:typename:void	file:
switch_as	arch/powerpc/cpu/mpc85xx/start.S	/^switch_as:$/;"	l
switch_cmd	board/freescale/t102xrdb/t102xrdb.c	/^static int switch_cmd(cmd_tbl_t *cmdtp, int flag, int argc,$/;"	f	typeref:typename:int	file:
switch_config	board/bf609-ezkit/soft_switch.c	/^struct switch_config {$/;"	s	file:
switch_config_array	board/bf609-ezkit/soft_switch.c	/^static struct switch_config switch_config_array[NUM_SWITCH] = {$/;"	v	typeref:struct:switch_config[]	file:
switch_connect_config	include/gdsys_fpga.h	/^	u16 switch_connect_config;$/;"	m	struct:ihs_fpga_channel	typeref:typename:u16
switch_gc_head	fs/ubifs/gc.c	/^static int switch_gc_head(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
switch_get_enable	drivers/power/regulator/rk808.c	/^static bool switch_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
switch_module	arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c	/^static int switch_module;$/;"	v	typeref:typename:int	file:
switch_port_mode	include/vsc9953.h	/^	u32	switch_port_mode[11];$/;"	m	struct:vsc9953_qsys_sys	typeref:typename:u32[11]
switch_set_enable	drivers/power/regulator/rk808.c	/^static int switch_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
switch_strobe	board/freescale/p2041rdb/cpld.h	/^	u8 switch_strobe;	\/* 0x7 - Multiplexed pin Select Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
switch_to	arch/microblaze/include/asm/system.h	/^#define switch_to(/;"	d
switch_to	arch/mips/include/asm/system.h	/^#define switch_to(/;"	d
switch_to	arch/sh/include/asm/system.h	/^#define switch_to(/;"	d
switch_to_hypervisor_ret	arch/arm/cpu/armv7/start.S	/^switch_to_hypervisor_ret:$/;"	l
switch_to_main_crystal_osc	arch/arm/mach-at91/spl_atmel.c	/^static void switch_to_main_crystal_osc(void)$/;"	f	typeref:typename:void	file:
switches	include/ec_commands.h	/^	uint8_t switches;$/;"	m	struct:ec_response_mkbp_info	typeref:typename:uint8_t
swivr	arch/m68k/include/asm/immap_5307.h	/^	u8  swivr;$/;"	m	struct:sim	typeref:typename:u8
swmr	drivers/i2c/at91_i2c.h	/^	u32 swmr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
swoffr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 swoffr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 swoffr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 swoffr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 swoffr;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 swoffr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 swoffr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 swoffr;		\/* 0xac *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swoffr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 swoffr;		\/* 0xc4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 swonr;		\/* 0xa8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 swonr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 swonr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 swonr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 swonr;		\/* 0xa8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 swonr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 swonr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swonr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 swonr;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
swp_is_buggy	arch/arm/include/asm/proc-armv/system.h	/^#define swp_is_buggy$/;"	d
swp_mc_can_poll	drivers/net/fsl-mc/dpio/qbman_portal.h	/^			swp_mc_can_poll, \/* call __qbman_swp_mc_result() *\/$/;"	e	enum:qbman_swp::__anonadc6216b0108::swp_mc_check
swp_mc_can_start	drivers/net/fsl-mc/dpio/qbman_portal.h	/^			swp_mc_can_start, \/* call __qbman_swp_mc_start() *\/$/;"	e	enum:qbman_swp::__anonadc6216b0108::swp_mc_check
swp_mc_can_submit	drivers/net/fsl-mc/dpio/qbman_portal.h	/^			swp_mc_can_submit, \/* call __qbman_swp_mc_submit() *\/$/;"	e	enum:qbman_swp::__anonadc6216b0108::swp_mc_check
swp_mc_check	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		enum swp_mc_check {$/;"	g	struct:qbman_swp::__anonadc6216b0108
swport_ddr	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 swport_ddr;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
swport_dr	arch/arm/include/asm/arch-rockchip/gpio.h	/^	u32 swport_dr;$/;"	m	struct:rockchip_gpio_regs	typeref:typename:u32
swr	arch/arm/include/asm/arch-mx27/gpio.h	/^	u32 swr;$/;"	m	struct:gpio_regs	typeref:typename:u32
swrcr	arch/m68k/include/asm/immap_5441x.h	/^	u32 swrcr;		\/* 0x184 *\/$/;"	m	struct:sdramc	typeref:typename:u32
swreset	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	swreset;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
swreset	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	swreset;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
swreset	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	swreset;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
swreset_88e1518	board/gdsys/common/phy.c	/^struct mii_setupcmd swreset_88e1518[] = {$/;"	v	typeref:struct:mii_setupcmd[]
swreset_clk_dtv_spdo	board/micronas/vct/dcgu.h	/^		u32 swreset_clk_dtv_spdo:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clk_i2s_dly	board/micronas/vct/dcgu.h	/^		u32 swreset_clk_i2s_dly:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clk_scc_abp	board/micronas/vct/dcgu.h	/^		u32 swreset_clk_scc_abp:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkad	board/micronas/vct/dcgu.h	/^		u32 swreset_clkad:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkcpu	board/micronas/vct/dcgu.h	/^		u32 swreset_clkcpu:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkcve	board/micronas/vct/dcgu.h	/^		u32 swreset_clkcve:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkdvp	board/micronas/vct/dcgu.h	/^		u32 swreset_clkdvp:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkebi	board/micronas/vct/dcgu.h	/^		u32 swreset_clkebi:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkga	board/micronas/vct/dcgu.h	/^		u32 swreset_clkga:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkmpc	board/micronas/vct/dcgu.h	/^		u32 swreset_clkmpc:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkmr1	board/micronas/vct/dcgu.h	/^		u32 swreset_clkmr1:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkmr2	board/micronas/vct/dcgu.h	/^		u32 swreset_clkmr2:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkmsmc	board/micronas/vct/dcgu.h	/^		u32 swreset_clkmsmc:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkmvd	board/micronas/vct/dcgu.h	/^		u32 swreset_clkmvd:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clksmc	board/micronas/vct/dcgu.h	/^		u32 swreset_clksmc:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkssi_m	board/micronas/vct/dcgu.h	/^		u32 swreset_clkssi_m:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkssi_s	board/micronas/vct/dcgu.h	/^		u32 swreset_clkssi_s:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clktsd	board/micronas/vct/dcgu.h	/^		u32 swreset_clktsd:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clktsio	board/micronas/vct/dcgu.h	/^		u32 swreset_clktsio:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkuart1	board/micronas/vct/dcgu.h	/^		u32 swreset_clkuart1:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkuart2	board/micronas/vct/dcgu.h	/^		u32 swreset_clkuart2:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkusb24	board/micronas/vct/dcgu.h	/^		u32 swreset_clkusb24:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_clkusb60	board/micronas/vct/dcgu.h	/^		u32 swreset_clkusb60:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_gpio1	board/micronas/vct/dcgu.h	/^		u32 swreset_gpio1:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_gpio2	board/micronas/vct/dcgu.h	/^		u32 swreset_gpio2:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_gpt	board/micronas/vct/dcgu.h	/^		u32 swreset_gpt:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_i2c1	board/micronas/vct/dcgu.h	/^		u32 swreset_i2c1:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_i2c2	board/micronas/vct/dcgu.h	/^		u32 swreset_i2c2:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swreset_pwm	board/micronas/vct/dcgu.h	/^		u32 swreset_pwm:1;$/;"	m	struct:dcgu_reset_unit1::__anon7364447c0308	typeref:typename:u32:1
swrst	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	swrst;		\/* _SW_RESET_ 31:24 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
swrst	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	swrst;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
swsr	arch/m68k/include/asm/immap_5307.h	/^	u8  swsr;$/;"	m	struct:sim	typeref:typename:u8
swsrr	arch/powerpc/include/asm/immap_512x.h	/^	u16 swsrr;		\/* System watchdog service register *\/$/;"	m	struct:wdt512x	typeref:typename:u16
swsrr	arch/powerpc/include/asm/immap_83xx.h	/^	u16 swsrr;		\/* System watchdog service register *\/$/;"	m	struct:wdt83xx	typeref:typename:u16
swsrr	arch/powerpc/include/asm/immap_86xx.h	/^	ushort	swsrr; \/* System watchdog service register *\/$/;"	m	struct:ccsr_wdt	typeref:typename:ushort
swtcnt	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 swtcnt;	\/* 0x00 *\/$/;"	m	struct:rcar_swdt	typeref:typename:u32
swtcnt	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^	u32 swtcnt;$/;"	m	struct:rcar_swdt	typeref:typename:u32
swtcsra	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 swtcsra;	\/* 0x04 *\/$/;"	m	struct:rcar_swdt	typeref:typename:u32
swtcsra	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^	u32 swtcsra;$/;"	m	struct:rcar_swdt	typeref:typename:u32
swtcsrb	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u16 swtcsrb;	\/* 0x08 *\/$/;"	m	struct:rcar_swdt	typeref:typename:u16
swtcsrb	arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h	/^	u32 swtcsrb;$/;"	m	struct:rcar_swdt	typeref:typename:u32
sx	drivers/video/mx3fb.c	/^	u32	sx:10;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:10	file:
sx	include/linux/fb.h	/^	__u32 sx;$/;"	m	struct:fb_copyarea	typeref:typename:__u32
sx151x_direction_input	drivers/gpio/sx151x.c	/^int sx151x_direction_input(int chip, int gpio)$/;"	f	typeref:typename:int
sx151x_direction_output	drivers/gpio/sx151x.c	/^int sx151x_direction_output(int chip, int gpio)$/;"	f	typeref:typename:int
sx151x_find_cfg	drivers/gpio/sx151x.c	/^static inline void sx151x_find_cfg(int gpio, unsigned char *reg, unsigned char *mask)$/;"	f	typeref:typename:void	file:
sx151x_get_value	drivers/gpio/sx151x.c	/^int sx151x_get_value(int chip, int gpio)$/;"	f	typeref:typename:int
sx151x_reset	drivers/gpio/sx151x.c	/^int sx151x_reset(int chip)$/;"	f	typeref:typename:int
sx151x_set_value	drivers/gpio/sx151x.c	/^int sx151x_set_value(int chip, int gpio, int val)$/;"	f	typeref:typename:int
sx151x_spi_read	drivers/gpio/sx151x.c	/^static int sx151x_spi_read(int chip, unsigned char reg)$/;"	f	typeref:typename:int	file:
sx151x_spi_write	drivers/gpio/sx151x.c	/^static int sx151x_spi_write(int chip, unsigned char reg, unsigned char val)$/;"	f	typeref:typename:int	file:
sx151x_write_cfg	drivers/gpio/sx151x.c	/^static int sx151x_write_cfg(int chip, unsigned char gpio, unsigned char reg, int val)$/;"	f	typeref:typename:int	file:
sy	drivers/video/stb_truetype.h	/^   float sy;$/;"	m	struct:stbtt__active_edge	typeref:typename:float
sy	include/linux/fb.h	/^	__u32 sy;$/;"	m	struct:fb_copyarea	typeref:typename:__u32
sy8106a_mvolt_to_cfg	drivers/power/sy8106a.c	/^static u8 sy8106a_mvolt_to_cfg(int mvolt, int min, int max, int div)$/;"	f	typeref:typename:u8	file:
sy8106a_set_vout1	drivers/power/sy8106a.c	/^int sy8106a_set_vout1(unsigned int mvolt)$/;"	f	typeref:typename:int
sy_h	drivers/video/mx3fb.c	/^	u32	sy_h:9;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:9	file:
sy_l	drivers/video/mx3fb.c	/^	u32	sy_l:1;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:1	file:
sym	scripts/kconfig/expr.h	/^	struct symbol *sym;        \/* the symbol for which the property is associated *\/$/;"	m	struct:property	typeref:struct:symbol *
sym	scripts/kconfig/expr.h	/^	struct symbol *sym;$/;"	m	struct:menu	typeref:struct:symbol *
sym	scripts/kconfig/expr.h	/^	struct symbol *sym;$/;"	m	union:expr_data	typeref:struct:symbol *
sym	scripts/kconfig/qconf.h	/^	struct symbol *sym;$/;"	m	class:ConfigInfoView	typeref:struct:symbol *
sym	scripts/kconfig/symbol.c	/^	struct symbol	*sym;$/;"	m	struct:sym_match	typeref:struct:symbol *	file:
sym	scripts/kconfig/symbol.c	/^	struct symbol *sym;$/;"	m	struct:dep_stack	typeref:struct:symbol *	file:
sym_add_change_count	scripts/kconfig/confdata.c	/^void sym_add_change_count(int count)$/;"	f	typeref:typename:void
sym_add_default	scripts/kconfig/symbol.c	/^static void sym_add_default(struct symbol *sym, const char *def)$/;"	f	typeref:typename:void	file:
sym_calc_choice	scripts/kconfig/symbol.c	/^static struct symbol *sym_calc_choice(struct symbol *sym)$/;"	f	typeref:struct:symbol *	file:
sym_calc_value	scripts/kconfig/symbol.c	/^void sym_calc_value(struct symbol *sym)$/;"	f	typeref:typename:void
sym_calc_visibility	scripts/kconfig/symbol.c	/^static void sym_calc_visibility(struct symbol *sym)$/;"	f	typeref:typename:void	file:
sym_change_count	scripts/kconfig/confdata.c	/^static int sym_change_count;$/;"	v	typeref:typename:int	file:
sym_check_choice_deps	scripts/kconfig/symbol.c	/^static struct symbol *sym_check_choice_deps(struct symbol *choice)$/;"	f	typeref:struct:symbol *	file:
sym_check_deps	scripts/kconfig/symbol.c	/^struct symbol *sym_check_deps(struct symbol *sym)$/;"	f	typeref:struct:symbol *
sym_check_expr_deps	scripts/kconfig/symbol.c	/^static struct symbol *sym_check_expr_deps(struct expr *e)$/;"	f	typeref:struct:symbol *	file:
sym_check_print_recursive	scripts/kconfig/symbol.c	/^static void sym_check_print_recursive(struct symbol *last_sym)$/;"	f	typeref:typename:void	file:
sym_check_prop	scripts/kconfig/menu.c	/^static void sym_check_prop(struct symbol *sym)$/;"	f	typeref:typename:void	file:
sym_check_sym_deps	scripts/kconfig/symbol.c	/^static struct symbol *sym_check_sym_deps(struct symbol *sym)$/;"	f	typeref:struct:symbol *	file:
sym_choice_default	scripts/kconfig/symbol.c	/^struct symbol *sym_choice_default(struct symbol *sym)$/;"	f	typeref:struct:symbol *
sym_clear_all_valid	scripts/kconfig/symbol.c	/^void sym_clear_all_valid(void)$/;"	f	typeref:typename:void
sym_ctr	drivers/video/rockchip/rk_hdmi.c	/^	u32 sym_ctr;    \/* clock symbol and transmitter control *\/$/;"	m	struct:hdmi_phy_config	typeref:typename:u32	file:
sym_defconfig_list	scripts/kconfig/symbol.c	/^struct symbol *sym_defconfig_list;$/;"	v	typeref:struct:symbol *
sym_env_list	scripts/kconfig/symbol.c	/^struct expr *sym_env_list;$/;"	v	typeref:struct:expr *
sym_expand_string_value	scripts/kconfig/symbol.c	/^const char *sym_expand_string_value(const char *in)$/;"	f	typeref:typename:const char *
sym_find	scripts/kconfig/symbol.c	/^struct symbol *sym_find(const char *name)$/;"	f	typeref:struct:symbol *
sym_get_choice_prop	scripts/kconfig/symbol.c	/^struct property *sym_get_choice_prop(struct symbol *sym)$/;"	f	typeref:struct:property *
sym_get_choice_value	scripts/kconfig/lkc.h	/^static inline struct symbol *sym_get_choice_value(struct symbol *sym)$/;"	f	typeref:struct:symbol *
sym_get_default_prop	scripts/kconfig/symbol.c	/^static struct property *sym_get_default_prop(struct symbol *sym)$/;"	f	typeref:struct:property *	file:
sym_get_env_prop	scripts/kconfig/symbol.c	/^struct property *sym_get_env_prop(struct symbol *sym)$/;"	f	typeref:struct:property *
sym_get_range_prop	scripts/kconfig/symbol.c	/^static struct property *sym_get_range_prop(struct symbol *sym)$/;"	f	typeref:struct:property *	file:
sym_get_range_val	scripts/kconfig/symbol.c	/^static long long sym_get_range_val(struct symbol *sym, int base)$/;"	f	typeref:typename:long long	file:
sym_get_string_default	scripts/kconfig/symbol.c	/^const char *sym_get_string_default(struct symbol *sym)$/;"	f	typeref:typename:const char *
sym_get_string_value	scripts/kconfig/symbol.c	/^const char *sym_get_string_value(struct symbol *sym)$/;"	f	typeref:typename:const char *
sym_get_tristate_value	scripts/kconfig/lkc.h	/^static inline tristate sym_get_tristate_value(struct symbol *sym)$/;"	f	typeref:typename:tristate
sym_get_type	scripts/kconfig/symbol.c	/^enum symbol_type sym_get_type(struct symbol *sym)$/;"	f	typeref:enum:symbol_type
sym_has_value	scripts/kconfig/lkc.h	/^static inline bool sym_has_value(struct symbol *sym)$/;"	f	typeref:typename:bool
sym_init	scripts/kconfig/symbol.c	/^void sym_init(void)$/;"	f	typeref:typename:void
sym_is_changable	scripts/kconfig/symbol.c	/^bool sym_is_changable(struct symbol *sym)$/;"	f	typeref:typename:bool
sym_is_choice	scripts/kconfig/lkc.h	/^static inline bool sym_is_choice(struct symbol *sym)$/;"	f	typeref:typename:bool
sym_is_choice_value	scripts/kconfig/lkc.h	/^static inline bool sym_is_choice_value(struct symbol *sym)$/;"	f	typeref:typename:bool
sym_is_optional	scripts/kconfig/lkc.h	/^static inline bool sym_is_optional(struct symbol *sym)$/;"	f	typeref:typename:bool
sym_lookup	scripts/kconfig/symbol.c	/^struct symbol *sym_lookup(const char *name, int flags)$/;"	f	typeref:struct:symbol *
sym_match	scripts/kconfig/symbol.c	/^struct sym_match {$/;"	s	file:
sym_re_search	scripts/kconfig/symbol.c	/^struct symbol **sym_re_search(const char *pattern)$/;"	f	typeref:struct:symbol **
sym_rel_comp	scripts/kconfig/symbol.c	/^static int sym_rel_comp(const void *sym1, const void *sym2)$/;"	f	typeref:typename:int	file:
sym_set_all_changed	scripts/kconfig/symbol.c	/^static void sym_set_all_changed(void)$/;"	f	typeref:typename:void	file:
sym_set_change_count	scripts/kconfig/confdata.c	/^void sym_set_change_count(int count)$/;"	f	typeref:typename:void
sym_set_changed	scripts/kconfig/symbol.c	/^static void sym_set_changed(struct symbol *sym)$/;"	f	typeref:typename:void	file:
sym_set_choice_value	scripts/kconfig/lkc.h	/^static inline bool sym_set_choice_value(struct symbol *ch, struct symbol *chval)$/;"	f	typeref:typename:bool
sym_set_string_value	scripts/kconfig/symbol.c	/^bool sym_set_string_value(struct symbol *sym, const char *newval)$/;"	f	typeref:typename:bool
sym_set_tristate_value	scripts/kconfig/symbol.c	/^bool sym_set_tristate_value(struct symbol *sym, tristate val)$/;"	f	typeref:typename:bool
sym_string_valid	scripts/kconfig/symbol.c	/^bool sym_string_valid(struct symbol *sym, const char *str)$/;"	f	typeref:typename:bool
sym_string_within_range	scripts/kconfig/symbol.c	/^bool sym_string_within_range(struct symbol *sym, const char *str)$/;"	f	typeref:typename:bool
sym_toggle_tristate_value	scripts/kconfig/symbol.c	/^tristate sym_toggle_tristate_value(struct symbol *sym)$/;"	f	typeref:typename:tristate
sym_tristate_within_range	scripts/kconfig/symbol.c	/^bool sym_tristate_within_range(struct symbol *sym, tristate val)$/;"	f	typeref:typename:bool
sym_type_name	scripts/kconfig/symbol.c	/^const char *sym_type_name(enum symbol_type type)$/;"	f	typeref:typename:const char *
sym_validate_range	scripts/kconfig/symbol.c	/^static void sym_validate_range(struct symbol *sym)$/;"	f	typeref:typename:void	file:
symbol	scripts/kconfig/expr.h	/^struct symbol {$/;"	s
symbol	scripts/kconfig/zconf.tab.c	/^	struct symbol *symbol;$/;"	m	union:YYSTYPE	typeref:struct:symbol *	file:
symbol	scripts/kconfig/zconf.y	/^symbol:	  T_WORD	{ $$ = sym_lookup($1, 0); free($1); }$/;"	l	typeref:typename:symbol
symbolInfo	scripts/kconfig/qconf.cc	/^void ConfigInfoView::symbolInfo(void)$/;"	f	class:ConfigInfoView	typeref:typename:void
symbolModPix	scripts/kconfig/qconf.h	/^	QPixmap symbolYesPix, symbolModPix, symbolNoPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
symbolMode	scripts/kconfig/qconf.h	/^	singleMode, menuMode, symbolMode, fullMode, listMode$/;"	e	enum:listMode
symbolNoPix	scripts/kconfig/qconf.h	/^	QPixmap symbolYesPix, symbolModPix, symbolNoPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
symbolYesPix	scripts/kconfig/qconf.h	/^	QPixmap symbolYesPix, symbolModPix, symbolNoPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
symbol_empty	scripts/kconfig/symbol.c	/^}, symbol_empty = {$/;"	v	typeref:struct:symbol
symbol_hash	scripts/kconfig/zconf.tab.c	/^struct symbol *symbol_hash[SYMBOL_HASHSIZE];$/;"	v	typeref:struct:symbol * []
symbol_lookup	arch/blackfin/cpu/traps.c	/^const char *symbol_lookup(unsigned long addr, unsigned long *caddr)$/;"	f	typeref:typename:const char *
symbol_lookup	common/kallsyms.c	/^const char *symbol_lookup(unsigned long addr, unsigned long *caddr)$/;"	f	typeref:typename:const char *
symbol_mod	scripts/kconfig/symbol.c	/^}, symbol_mod = {$/;"	v	typeref:struct:symbol
symbol_no	scripts/kconfig/symbol.c	/^}, symbol_no = {$/;"	v	typeref:struct:symbol
symbol_option	scripts/kconfig/zconf.y	/^symbol_option: T_OPTION symbol_option_list T_EOL$/;"	l
symbol_option_arg	scripts/kconfig/zconf.y	/^symbol_option_arg:$/;"	l	typeref:typename:string
symbol_option_list	scripts/kconfig/zconf.y	/^symbol_option_list:$/;"	l
symbol_type	scripts/kconfig/expr.h	/^enum symbol_type {$/;"	g
symbol_value	scripts/kconfig/expr.h	/^struct symbol_value {$/;"	s
symbol_yes	scripts/kconfig/symbol.c	/^struct symbol symbol_yes = {$/;"	v	typeref:struct:symbol
symbolcnt	scripts/docproc.c	/^	int symbolcnt;$/;"	m	struct:symfile	typeref:typename:int	file:
symbolerror	drivers/qe/uec.h	/^	u32   symbolerror;       \/* symbol error *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
symbollist	scripts/docproc.c	/^	struct symbols *symbollist;$/;"	m	struct:symfile	typeref:struct:symbols *	file:
symbolrate	board/astro/mcf5373l/astro.h	/^	unsigned short symbolrate;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned short
symbolrate_l	board/astro/mcf5373l/astro.h	/^	unsigned char symbolrate_l;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
symbols	include/jffs2/mini_inflate.h	/^	int *symbols;	 \/* All of the symbols, sorted by the huffman code *\/$/;"	m	struct:huffman_set	typeref:typename:int *
symbols	scripts/docproc.c	/^struct symbols$/;"	s	file:
symbolsonly	scripts/docproc.c	/^FILEONLY *symbolsonly;$/;"	v	typeref:typename:FILEONLY *
symerrs	drivers/net/e1000.h	/^	uint64_t symerrs;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
symfile	scripts/docproc.c	/^struct symfile$/;"	s	file:
symfilecnt	scripts/docproc.c	/^int symfilecnt = 0;$/;"	v	typeref:typename:int
symfilelist	scripts/docproc.c	/^struct symfile symfilelist[MAXFILES];$/;"	v	typeref:struct:symfile[]
symlink	include/ext_common.h	/^		char symlink[60];$/;"	m	union:ext2_inode::__anon5bc84367010a	typeref:typename:char[60]
symlink_variant	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_symlink_var symlink_variant;$/;"	m	union:yaffs_obj_var	typeref:struct:yaffs_symlink_var
symlinknest	fs/ext4/ext4_common.c	/^static int symlinknest;$/;"	v	typeref:typename:int	file:
syn	include/linux/bch.h	/^	unsigned int   *syn;$/;"	m	struct:bch_control	typeref:typename:unsigned int *
syn_pol	drivers/video/fsl_diu_fb.c	/^	__be32 syn_pol;$/;"	m	struct:diu	typeref:typename:__be32	file:
sync	arch/arc/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/arm/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/avr32/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/blackfin/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/m68k/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/microblaze/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/mips/include/asm/io.h	/^#define sync(/;"	d
sync	arch/nds32/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/nios2/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/powerpc/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/sh/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	arch/sparc/include/asm/io.h	/^#define sync(/;"	d
sync	arch/xtensa/include/asm/io.h	/^static inline void sync(void)$/;"	f	typeref:typename:void
sync	common/memsize.c	/^# define sync(/;"	d	file:
sync	drivers/dma/lpc32xx_dma.c	/^	u32 sync;$/;"	m	struct:dma_reg	typeref:typename:u32	file:
sync	drivers/usb/musb-new/musb_core.h	/^	dma_addr_t		sync;$/;"	m	struct:musb	typeref:typename:dma_addr_t
sync	drivers/video/videomodes.h	/^	int sync;		\/* see FB_SYNC_*		*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
sync	include/linux/fb.h	/^	__u32 sync;			\/* see FB_SYNC_*		*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
sync	include/linux/fb.h	/^	u32 sync;$/;"	m	struct:fb_videomode	typeref:typename:u32
sync_as	drivers/video/ipu_regs.h	/^	u32 sync_as;$/;"	m	struct:ipu_di	typeref:typename:u32
sync_callback	fs/ubifs/ubifs.h	/^	int (*sync_callback)(struct ubifs_info *c, int lnum, int free, int pad);$/;"	m	struct:ubifs_wbuf	typeref:typename:int (*)(struct ubifs_info * c,int lnum,int free,int pad)
sync_ctrl	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 sync_ctrl;				\/* 0x14 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
sync_ctrl	drivers/video/da8xx-fb.h	/^	unsigned char sync_ctrl;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
sync_ddr_features	include/linux/mtd/nand.h	/^	u8 sync_ddr_features;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
sync_ddr_speed_grade	include/linux/mtd/nand.h	/^	__le16 sync_ddr_speed_grade;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
sync_edge	drivers/video/da8xx-fb.h	/^	unsigned char sync_edge;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
sync_erase	drivers/mtd/ubi/wl.c	/^static int sync_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,$/;"	f	typeref:typename:int	file:
sync_fs	fs/ubifs/ubifs.h	/^	int (*sync_fs)(struct super_block *sb, int wait);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct super_block * sb,int wait)
sync_kconfig	scripts/kconfig/conf.c	/^static int sync_kconfig;$/;"	v	typeref:typename:int	file:
sync_law	arch/powerpc/include/asm/mpc512x.h	/^static inline void sync_law(volatile void *addr)$/;"	f	typeref:typename:void
sync_mode	include/linux/compat.h	/^	enum writeback_sync_modes sync_mode;$/;"	m	struct:writeback_control	typeref:enum:writeback_sync_modes
sync_mode	include/linux/mtd/samsung_onenand.h	/^	unsigned int	sync_mode;	\/* 0x0130 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
sync_va	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*sync_va;$/;"	m	struct:musb	typeref:typename:void __iomem *
sync_vbi_level	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 sync_vbi_level;		\/* 0x11c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
sync_vbi_level	arch/arm/include/asm/arch/display.h	/^	u32 sync_vbi_level;		\/* 0x11c *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
sync_width	arch/arm/include/asm/arch-tegra/dc.h	/^	uint sync_width;		\/* _DISP_SYNC_WIDTH_0 *\/$/;"	m	struct:dc_disp_reg	typeref:typename:uint
sync_write	include/linux/mtd/samsung_onenand.h	/^	unsigned int	sync_write;	\/* 0x0280 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
sync_write_buffer	arch/avr32/include/asm/arch-at32ap700x/cacheflush.h	/^#define sync_write_buffer(/;"	d
synced_i_size	fs/ubifs/ubifs.h	/^	loff_t synced_i_size;$/;"	m	struct:ubifs_inode	typeref:typename:loff_t
synchook	arch/sparc/cpu/leon2/prom.c	/^	void (*synchook) (void);$/;"	m	struct:leon_prom_info	typeref:typename:void (*)(void)	file:
synchook	arch/sparc/cpu/leon3/prom.c	/^	void (*synchook) (void);$/;"	m	struct:leon_prom_info	typeref:typename:void (*)(void)	file:
syncr	arch/m68k/include/asm/immap_5235.h	/^	u32 syncr;		\/* 0x00 synthesizer control register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u32
syncr	arch/m68k/include/asm/immap_5275.h	/^	u32 syncr;$/;"	m	struct:pll_ctrl	typeref:typename:u32
syncr	arch/m68k/include/asm/immap_5282.h	/^	u16 syncr;		\/* 0x00 synthesizer control register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u16
synctimer_32kclk	arch/arm/dts/am43xx-clocks.dtsi	/^	synctimer_32kclk: synctimer_32kclk {$/;"	l
syndrome	include/linux/mtd/omap_elm.h	/^struct syndrome {$/;"	s
syndrome_codes	post/cpu/ppc4xx/denali_ecc.c	/^const static uint8_t syndrome_codes[] = {$/;"	v	typeref:typename:const uint8_t[]	file:
syndrome_fragment_x	include/linux/mtd/omap_elm.h	/^	u32 syndrome_fragment_x[7];	\/* 0x400, 0x404.... 0x418 *\/$/;"	m	struct:syndrome	typeref:typename:u32[7]
syndrome_fragments	include/linux/mtd/omap_elm.h	/^	struct  syndrome syndrome_fragments[ELM_MAX_CHANNELS]; \/* 0x400,0x420 *\/$/;"	m	struct:elm	typeref:struct:syndrome[]
syno_ddr3_b0_667_1g_v1	board/Synology/ds414/ds414.c	/^MV_DRAM_MC_INIT syno_ddr3_b0_667_1g_v1[MV_MAX_DDR3_STATIC_SIZE] = {$/;"	v	typeref:typename:MV_DRAM_MC_INIT[]
syno_id_bit0_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	syno_id_bit0_pin: syno-id-bit0-pin {$/;"	l
syno_id_bit1_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	syno_id_bit1_pin: syno-id-bit1-pin {$/;"	l
syno_id_bit2_pin	arch/arm/dts/armada-xp-synology-ds414.dts	/^	syno_id_bit2_pin: syno-id-bit2-pin {$/;"	l
synpol	drivers/video/fsl_dcu_fb.c	/^	u32 synpol;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
synsr	arch/m68k/include/asm/immap_5235.h	/^	u32 synsr;		\/* 0x04 synthesizer status register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u32
synsr	arch/m68k/include/asm/immap_5275.h	/^	u32 synsr;$/;"	m	struct:pll_ctrl	typeref:typename:u32
synsr	arch/m68k/include/asm/immap_5282.h	/^	u16 synsr;		\/* 0x02 synthesizer status register *\/$/;"	m	struct:pll_ctrl	typeref:typename:u16
syntax	common/cli_hush.c	/^#define syntax(/;"	d	file:
syntax_err	common/cli_hush.c	/^static void syntax_err(void) {$/;"	f	typeref:typename:void	file:
sypcr	arch/m68k/include/asm/immap_5307.h	/^	u8  sypcr;$/;"	m	struct:sim	typeref:typename:u8
sys	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	struct qbman_swp_sys sys;$/;"	m	struct:qbman_swp	typeref:struct:qbman_swp_sys
sys	include/vsc9953.h	/^	struct vsc9953_qsys_sys	sys;$/;"	m	struct:vsc9953_qsys_reg	typeref:struct:vsc9953_qsys_sys
sys	include/vsc9953.h	/^	struct vsc9953_sys_sys	sys;$/;"	m	struct:vsc9953_system_reg	typeref:struct:vsc9953_sys_sys
sys_32k_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	sys_32k_ck: sys_32k_ck {$/;"	l
sys_3v3_pexs_reg	arch/arm/dts/tegra30-beaver.dts	/^		sys_3v3_pexs_reg: regulator@7 {$/;"	l
sys_3v3_reg	arch/arm/dts/tegra30-apalis.dts	/^		sys_3v3_reg: regulator@100 {$/;"	l
sys_3v3_reg	arch/arm/dts/tegra30-beaver.dts	/^		sys_3v3_reg: regulator@6 {$/;"	l
sys_3v3_reg	arch/arm/dts/tegra30-cardhu.dts	/^		sys_3v3_reg: regulator@101 {$/;"	l
sys_boot_ctl	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 sys_boot_ctl;	\/* Sytem Boot Control *\/$/;"	m	struct:armd1cpu_registers	typeref:typename:u32
sys_clk	arch/arm/dts/uniphier-common32.dtsi	/^			sys_clk: clock {$/;"	l
sys_clk	arch/arm/dts/uniphier-ld11.dtsi	/^			sys_clk: clock {$/;"	l
sys_clk	arch/arm/dts/uniphier-ld20.dtsi	/^			sys_clk: clock {$/;"	l
sys_clk	arch/arm/dts/uniphier-sld3.dtsi	/^			sys_clk: clock {$/;"	l
sys_clk	arch/arm/include/asm/arch-omap3/clock.h	/^	unsigned int sys_clk;$/;"	m	struct:dpll_per_36x_param	typeref:typename:unsigned int
sys_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	sys_clk,$/;"	e	enum:ext_clk_e
sys_clk1_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	sys_clk1_dclk_div: sys_clk1_dclk_div {$/;"	l
sys_clk2_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	sys_clk2_dclk_div: sys_clk2_dclk_div {$/;"	l
sys_clk_array	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^const u32 sys_clk_array[8] = {$/;"	v	typeref:typename:const u32[8]
sys_clk_timer	arch/nios2/dts/10m50_devboard.dts	/^		sys_clk_timer: timer@18001440 {$/;"	l	label:sopc0
sys_clk_timer_1	arch/nios2/dts/10m50_devboard.dts	/^		sys_clk_timer_1: timer@880 {$/;"	l	label:sopc0
sys_clkin1	arch/arm/dts/dra7xx-clocks.dtsi	/^	sys_clkin1: sys_clkin1 {$/;"	l
sys_clkin2	arch/arm/dts/dra7xx-clocks.dtsi	/^	sys_clkin2: sys_clkin2 {$/;"	l
sys_clkin_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	sys_clkin_ck: sys_clkin_ck {$/;"	l
sys_clkin_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	sys_clkin_ck: sys_clkin_ck {$/;"	l
sys_con	board/imgtec/malta/malta.c	/^enum sys_con {$/;"	g	file:
sys_conf	arch/powerpc/include/asm/5xx_immap.h	/^typedef	struct sys_conf {$/;"	s
sys_conf	arch/powerpc/include/asm/8xx_immap.h	/^typedef	struct sys_conf {$/;"	s
sys_conf	arch/powerpc/include/asm/immap_8260.h	/^typedef struct sys_conf {$/;"	s
sys_ctl1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	sys_ctl1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
sys_ctl2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	sys_ctl2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
sys_ctl3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	sys_ctl3;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
sys_ctl4	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	sys_ctl4;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
sys_ctl_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	sys_ctl_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
sys_ctl_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	sys_ctl_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
sys_ctl_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	sys_ctl_3;$/;"	m	struct:rk3288_edp	typeref:typename:u32
sys_ctl_4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	sys_ctl_4;$/;"	m	struct:rk3288_edp	typeref:typename:u32
sys_ctrl	arch/arm/dts/hi6220.dtsi	/^		sys_ctrl: sys_ctrl@f7030000 {$/;"	l
sys_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 sys_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
sys_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct sys_ctrl {$/;"	s
sys_ctrl	arch/m68k/include/asm/immap_5275.h	/^typedef	struct sys_ctrl {$/;"	s
sys_ctrl1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 sys_ctrl1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
sys_desc_table	arch/x86/include/asm/bootparam.h	/^	struct sys_desc_table sys_desc_table;		\/* 0x0a0 *\/$/;"	m	struct:boot_params	typeref:struct:sys_desc_table
sys_desc_table	arch/x86/include/asm/bootparam.h	/^struct sys_desc_table {$/;"	s
sys_dividors	arch/powerpc/cpu/mpc512x/speed.c	/^static int sys_dividors[][2] = {$/;"	v	typeref:typename:int[][2]	file:
sys_endian	board/dbau1x00/lowlevel_init.S	/^#define sys_endian	/;"	d	file:
sys_endian	board/pb1x00/lowlevel_init.S	/^#define sys_endian	/;"	d	file:
sys_env_device_id_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 sys_env_device_id_get(void)$/;"	f	typeref:typename:u32
sys_env_device_rev_get	drivers/ddr/marvell/a38x/ddr3_init.c	/^u8 sys_env_device_rev_get(void)$/;"	f	typeref:typename:u8
sys_env_dlb_config_ptr_get	drivers/ddr/marvell/a38x/ddr3_init.c	/^struct dlb_config *sys_env_dlb_config_ptr_get(void)$/;"	f	typeref:struct:dlb_config *
sys_env_get_cs_ena_from_reg	drivers/ddr/marvell/a38x/ddr3_init.c	/^u32 sys_env_get_cs_ena_from_reg(void)$/;"	f	typeref:typename:u32
sys_env_id_index_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 sys_env_id_index_get(u32 ctrl_model)$/;"	f	typeref:typename:u32
sys_env_model_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u16 sys_env_model_get(void)$/;"	f	typeref:typename:u16
sys_env_soc_unit_nums	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {$/;"	g	file:
sys_env_suspend_wakeup_check	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^enum suspend_wakeup_status sys_env_suspend_wakeup_check(void)$/;"	f	typeref:enum:suspend_wakeup_status
sys_env_unit_max_num_get	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c	/^u32 sys_env_unit_max_num_get(enum unit_id unit)$/;"	f	typeref:typename:u32
sys_has_mdio	drivers/net/keystone_net.c	/^static unsigned int sys_has_mdio = 1;$/;"	v	typeref:typename:unsigned int	file:
sys_in	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 sys_in;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
sys_ind	disk/part_dos.h	/^	unsigned char sys_ind;		\/* What partition type			*\/$/;"	m	struct:dos_partition	typeref:typename:unsigned char
sys_ind	include/part_efi.h	/^	u8 sys_ind;		\/* What partition type *\/$/;"	m	struct:partition	typeref:typename:u8
sys_info	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^struct sys_info {$/;"	s
sys_info	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^struct sys_info {$/;"	s
sys_info	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^struct sys_info {$/;"	s
sys_info	include/api_public.h	/^struct sys_info {$/;"	s
sys_info_t	include/common.h	/^typedef MPC85xx_SYS_INFO sys_info_t;$/;"	t	typeref:typename:MPC85xx_SYS_INFO
sys_info_t	include/common.h	/^typedef MPC86xx_SYS_INFO sys_info_t;$/;"	t	typeref:typename:MPC86xx_SYS_INFO
sys_info_t	include/common.h	/^typedef PPC4xx_SYS_INFO sys_info_t;$/;"	t	typeref:typename:PPC4xx_SYS_INFO
sys_init	arch/arm/cpu/arm926ejs/spear/spl.c	/^static void sys_init(void)$/;"	f	typeref:typename:void	file:
sys_int_timers	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct	sys_int_timers {$/;"	s
sys_int_timers	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct	sys_int_timers {$/;"	s
sys_int_timers	arch/powerpc/include/asm/immap_8260.h	/^typedef struct	sys_int_timers {$/;"	s
sys_mgr_base	arch/arm/mach-socfpga/scan_manager.c	/^static struct socfpga_system_manager *sys_mgr_base =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sys_mgr_frzctrl_freeze_req	arch/arm/mach-socfpga/freeze_controller.c	/^void sys_mgr_frzctrl_freeze_req(void)$/;"	f	typeref:typename:void
sys_mgr_frzctrl_thaw_req	arch/arm/mach-socfpga/freeze_controller.c	/^void sys_mgr_frzctrl_thaw_req(void)$/;"	f	typeref:typename:void
sys_mgr_init_table	board/altera/arria5-socdk/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/altera/cyclone5-socdk/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/denx/mcvevk/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/ebv/socrates/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/is1/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/samtec/vining_fpga/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/sr1500/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/terasic/de0-nano-soc/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_mgr_init_table	board/terasic/sockit/qts/pinmux_config.h	/^const u8 sys_mgr_init_table[] = {$/;"	v	typeref:typename:const u8[]
sys_pll	arch/nios2/dts/10m50_devboard.dts	/^		sys_pll: clock@1 {$/;"	l	label:sopc0
sys_pll_c0	arch/nios2/dts/10m50_devboard.dts	/^			sys_pll_c0: sys_pll_c0 {$/;"	l	label:sopc0.sys_pll
sys_pll_c1	arch/nios2/dts/10m50_devboard.dts	/^			sys_pll_c1: sys_pll_c1 {$/;"	l	label:sopc0.sys_pll
sys_pll_c2	arch/nios2/dts/10m50_devboard.dts	/^			sys_pll_c2: sys_pll_c2 {$/;"	l	label:sopc0.sys_pll
sys_pll_psc	arch/arm/mach-stm32/stm32f4/clock.c	/^struct pll_psc sys_pll_psc = {$/;"	v	typeref:struct:pll_psc
sys_pll_psc	arch/arm/mach-stm32/stm32f7/clock.c	/^struct pll_psc sys_pll_psc = {$/;"	v	typeref:struct:pll_psc
sys_reg	arch/arm/dts/tegra20-harmony.dts	/^				sys_reg: sys {$/;"	l	label:pmic
sys_reg	arch/arm/dts/tegra20-seaboard.dts	/^				sys_reg: sys {$/;"	l	label:pmic
sys_reg	arch/arm/dts/tegra20-tamonten.dtsi	/^				sys_reg: sys {$/;"	l	label:pmic
sys_reg	arch/arm/dts/tegra20-ventana.dts	/^				sys_reg: sys {$/;"	l	label:pmic
sys_reg	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 sys_reg[4];$/;"	m	struct:rk3288_pmu	typeref:typename:u32[4]
sys_reset	board/freescale/t4rdb/cpld.h	/^	u8 sys_reset;	\/* 0x0d - Reset System With Reserving Registers Value*\/$/;"	m	struct:cpld_data	typeref:typename:u8
sys_rst	arch/arm/dts/uniphier-common32.dtsi	/^			sys_rst: reset {$/;"	l
sys_rst	arch/arm/dts/uniphier-ld11.dtsi	/^			sys_rst: reset {$/;"	l
sys_rst	arch/arm/dts/uniphier-ld20.dtsi	/^			sys_rst: reset {$/;"	l
sys_rst	arch/arm/dts/uniphier-sld3.dtsi	/^			sys_rst: reset {$/;"	l
sys_soft_rst	arch/arm/mach-kirkwood/include/mach/cpu.h	/^	u32 sys_soft_rst; \/* 0x2010C *\/$/;"	m	struct:kwcpu_registers	typeref:typename:u32
sys_soft_rst	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u32 sys_soft_rst; \/* 0x64 *\/$/;"	m	struct:mvebu_system_registers	typeref:typename:u32
sys_soft_rst	arch/arm/mach-orion5x/include/mach/cpu.h	/^	u32 sys_soft_rst; \/* 0x2010C *\/$/;"	m	struct:orion5x_cpu_registers	typeref:typename:u32
sys_table	include/efi.h	/^	struct efi_system_table *sys_table;$/;"	m	struct:efi_priv	typeref:struct:efi_system_table *
sysad	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	sysad;		\/* _SYSTEM_ADDRESS_0 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
sysboot_freq_sel_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	sysboot_freq_sel_ck: sysboot_freq_sel_ck@44e10040 {$/;"	l
sysbus_mode	drivers/net/dwc_eth_qos.c	/^	uint32_t sysbus_mode;				\/* 0x1004 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
sysc	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short sysc;		\/* 0x10 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sysc	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short sysc;	\/* 0x20 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sysc	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short sysc;		\/* 0x10 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sysc	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short sysc;		\/* 0x10 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
sysc	arch/arm/include/asm/ehci-omap.h	/^	u32 sysc;		\/* 0x10 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
sysc	arch/arm/include/asm/ehci-omap.h	/^	u32 sysc;	\/* 0x10 *\/$/;"	m	struct:omap_uhh	typeref:typename:u32
syscall	api/api.c	/^int syscall(int call, int *retval, ...)$/;"	f	typeref:typename:int
syscall	arch/nds32/cpu/n1213/start.S	/^syscall:$/;"	l
syscall	arch/xtensa/include/asm/ptrace.h	/^	unsigned long syscall;		\/*  56 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
syscall	examples/api/crt0.S	/^syscall:$/;"	l
syscall	include/api_public.h	/^	scp_t		syscall;		\/* entry point to the API *\/$/;"	m	struct:api_signature	typeref:typename:scp_t
syscall_munge	scripts/kernel-doc	/^sub syscall_munge() {$/;"	s
syscall_ptr	examples/api/crt0.S	/^syscall_ptr:$/;"	l
syscallno	arch/openrisc/include/asm/ptrace.h	/^	long  syscallno;	\/* Syscall number (used by strace) *\/$/;"	m	struct:pt_regs	typeref:typename:long
syscfg	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t syscfg;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
syscfg	arch/blackfin/include/asm/ptrace.h	/^	long syscfg;$/;"	m	struct:pt_regs	typeref:typename:long
syscfg_base	drivers/clk/clk_pic32.c	/^	void __iomem *syscfg_base;$/;"	m	struct:pic32_clk_priv	typeref:typename:void __iomem *	file:
sysclk	arch/arm/dts/fsl-ls1012a.dtsi	/^	sysclk: sysclk {$/;"	l
sysclk	arch/arm/dts/fsl-ls1043a.dtsi	/^	sysclk: sysclk {$/;"	l
sysclk	arch/arm/dts/fsl-ls1046a.dtsi	/^	sysclk: sysclk {$/;"	l
sysclk	arch/arm/dts/ls1021a.dtsi	/^			sysclk: sysclk {$/;"	l	label:clockgen
sysclk	board/Synology/ds109/ds109.h	/^	u32 sysclk;$/;"	m	struct:tag_mv_uboot	typeref:typename:u32
sysclk	drivers/sound/max98095.c	/^	unsigned int sysclk;$/;"	m	struct:max98095_priv	typeref:typename:unsigned int	file:
sysclk	drivers/sound/wm8994.c	/^	int sysclk[WM8994_MAX_AIF];	\/* System clock frequency in Hz  *\/$/;"	m	struct:wm8994_priv	typeref:typename:int[]	file:
sysclk4clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sysclk4clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
sysclk5clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sysclk5clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
sysclk6clkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int sysclk6clkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
sysclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 sysclk_ctrl;	\/* SYSCLK Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
sysclk_div	arch/arm/dts/am43xx-clocks.dtsi	/^	sysclk_div: sysclk_div {$/;"	l
sysclk_div_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	sysclk_div_ck: sysclk_div_ck {$/;"	l
sysclk_sel	board/freescale/ls1043ardb/cpld.h	/^	u8 sysclk_sel;		\/* 0x8 - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sysclk_sel	board/freescale/ls1046ardb/cpld.h	/^	u8 sysclk_sel;		\/* 0x8 - System clock POR Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sysclk_sw1	board/freescale/p2041rdb/cpld.h	/^	u8 sysclk_sw1;		\/* 0xf - sysclk configuration register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
sysclk_tbl	board/Arcturus/ucp1020/spl.c	/^static const u32 sysclk_tbl[] = {$/;"	v	typeref:typename:const u32[]	file:
sysclk_tbl	board/freescale/p1022ds/spl.c	/^static const u32 sysclk_tbl[] = {$/;"	v	typeref:typename:const u32[]	file:
sysclk_tbl	board/freescale/p1022ds/spl_minimal.c	/^const static u32 sysclk_tbl[] = {$/;"	v	typeref:typename:const u32[]	file:
sysclk_tbl	board/freescale/p1_p2_rdb_pc/spl.c	/^static const u32 sysclk_tbl[] = {$/;"	v	typeref:typename:const u32[]	file:
sysclkout_pre_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	sysclkout_pre_ck: sysclkout_pre_ck {$/;"	l
syscntl_regs	arch/arm/include/asm/arch-spear/spr_syscntl.h	/^struct syscntl_regs {$/;"	s
syscon	arch/arm/dts/sun8i-h3.dtsi	/^		syscon: syscon@01c00000 {$/;"	l
syscon_base_platdata	include/syscon.h	/^struct syscon_base_platdata {$/;"	s
syscon_get_by_driver_data	drivers/core/syscon-uclass.c	/^int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp)$/;"	f	typeref:typename:int
syscon_get_first_range	drivers/core/syscon-uclass.c	/^void *syscon_get_first_range(ulong driver_data)$/;"	f	typeref:typename:void *
syscon_get_ops	include/syscon.h	/^#define syscon_get_ops(/;"	d
syscon_get_regmap	drivers/core/syscon-uclass.c	/^struct regmap *syscon_get_regmap(struct udevice *dev)$/;"	f	typeref:struct:regmap *
syscon_get_regmap_by_driver_data	drivers/core/syscon-uclass.c	/^struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data)$/;"	f	typeref:struct:regmap *
syscon_ops	include/syscon.h	/^struct syscon_ops {$/;"	s
syscon_pre_probe	drivers/core/syscon-uclass.c	/^static int syscon_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
syscon_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct syscon_regs {$/;"	s
syscon_uc_info	include/syscon.h	/^struct syscon_uc_info {$/;"	s
sysconf	arch/powerpc/include/asm/immap_512x.h	/^	sysconf512x_t		sysconf;	\/* System configuration *\/$/;"	m	struct:immap	typeref:typename:sysconf512x_t
sysconf	arch/powerpc/include/asm/immap_83xx.h	/^	sysconf83xx_t		sysconf;	\/* System configuration *\/$/;"	m	struct:immap	typeref:typename:sysconf83xx_t
sysconf512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct sysconf512x {$/;"	s
sysconf512x_t	arch/powerpc/include/asm/immap_512x.h	/^} sysconf512x_t;$/;"	t	typeref:struct:sysconf512x
sysconf5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} sysconf5xx_t;$/;"	t	typeref:struct:sys_conf
sysconf8260_t	arch/powerpc/include/asm/immap_8260.h	/^} sysconf8260_t;$/;"	t	typeref:struct:sys_conf
sysconf83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct sysconf83xx {$/;"	s
sysconf83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} sysconf83xx_t;$/;"	t	typeref:struct:sysconf83xx
sysconf8xx_t	arch/powerpc/include/asm/8xx_immap.h	/^} sysconf8xx_t;$/;"	t	typeref:struct:sys_conf
sysconfig	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int sysconfig;$/;"	m	struct:pwmss_regs	typeref:typename:unsigned int
sysconfig	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 sysconfig;		\/* 0x10 *\/$/;"	m	struct:sdrc	typeref:typename:u32
sysconfig	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 sysconfig;		\/* 0x10 *\/$/;"	m	struct:sms	typeref:typename:u32
sysconfig	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 sysconfig;				\/* 0x10 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
sysconfig	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 sysconfig;				\/* 0x10 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
sysconfig	arch/arm/include/asm/omap_mmc.h	/^	unsigned int sysconfig;		\/* 0x10 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
sysconfig	drivers/spi/omap3_spi.c	/^	unsigned int sysconfig;		\/* 0x10 *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
sysconfig	drivers/spi/ti_qspi.c	/^	u32 sysconfig;$/;"	m	struct:ti_qspi_regs	typeref:typename:u32	file:
sysconfig	drivers/usb/host/xhci-keystone.c	/^	u32 sysconfig;	\/* 0x010 *\/$/;"	m	struct:kdwc3_irq_regs	typeref:typename:u32	file:
sysconfig	drivers/usb/musb/omap3.c	/^	u32	sysconfig;$/;"	m	struct:omap3_otg_regs	typeref:typename:u32	file:
sysconfig	drivers/video/am335x-fb.c	/^	unsigned int		sysconfig;		\/* 0x54 *\/$/;"	m	struct:am335x_lcdhw	typeref:typename:unsigned int	file:
sysconfig	include/linux/mtd/omap_elm.h	/^	u32 sysconfig;				\/* 0x010 *\/$/;"	m	struct:elm	typeref:typename:u32
sysconfig	include/linux/mtd/omap_gpmc.h	/^	u32 sysconfig;		\/* 0x10 *\/$/;"	m	struct:gpmc	typeref:typename:u32
sysconfig	include/linux/usb/xhci-omap.h	/^	u32 sysconfig; \/* offset of 0x10 *\/$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
sysctl	arch/arm/include/asm/omap_mmc.h	/^	unsigned int sysctl;		\/* 0x12C *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
sysctl	drivers/mmc/fsl_esdhc.c	/^	uint    sysctl;		\/* System Control Register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
sysctl_reg	drivers/net/sun8i_emac.c	/^	phys_addr_t sysctl_reg;$/;"	m	struct:emac_eth_dev	typeref:typename:phys_addr_t	file:
sysctr_ctlr	arch/arm/include/asm/arch-tegra114/sysctr.h	/^struct sysctr_ctlr {$/;"	s
sysctr_ctlr	arch/arm/include/asm/arch-tegra124/sysctr.h	/^struct sysctr_ctlr {$/;"	s
sysctr_ctlr	arch/arm/include/asm/arch-tegra210/sysctr.h	/^struct sysctr_ctlr {$/;"	s
sysctrl	arch/arm/include/asm/arch-armv7/sysctrl.h	/^struct sysctrl {$/;"	s
sysctrl_1	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 sysctrl_1;		\/* offset 0x1c *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
sysctrl_2	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 sysctrl_2;		\/* offset 0x20 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
sysctrl_3	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 sysctrl_3;		\/* offset 0x24 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
sysctrl_4	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 sysctrl_4;		\/* offset 0x28 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
sysctrl_base	board/armltd/vexpress/vexpress_common.c	/^static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;$/;"	v	typeref:struct:sysctrl *	file:
sysctrl_t	arch/m68k/include/asm/immap_5272.h	/^} sysctrl_t;$/;"	t	typeref:struct:sys_ctrl
sysctrl_t	arch/m68k/include/asm/immap_5275.h	/^} sysctrl_t;$/;"	t	typeref:struct:sys_ctrl
sysdiv	arch/arm/mach-davinci/cpu.c	/^unsigned int sysdiv[9] = {$/;"	v	typeref:typename:unsigned int[9]
sysid	arch/nios2/dts/10m50_devboard.dts	/^		sysid: sysid@18001528 {$/;"	l	label:sopc0
sysid	arch/nios2/dts/3c120_devboard.dts	/^			sysid: sysid@0x4d40 {$/;"	l	label:pb_cpu_to_io
sysid	disk/part_iso.h	/^	char					sysid[32];		 \/* system Identifier *\/$/;"	m	struct:iso_part_rec	typeref:typename:char[32]
sysid	disk/part_iso.h	/^	char					sysid[32];		\/* system Identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[32]
sysid	disk/part_iso.h	/^	char					sysid[32];		\/* system Identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[32]
sysinfo	board/8dtech/eco5pk/eco5pk.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/amazon/kc1/kc1.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/atmark-techno/armadillo-800eva/armadillo-800eva.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/compulab/cm_t35/cm_t35.c	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/compulab/cm_t3517/cm_t3517.c	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/compulab/cm_t54/cm_t54.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/corscience/tricorder/tricorder.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/gumstix/duovero/duovero.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/htkw/mcx/mcx.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/kmc/kzm9g/kzm9g.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/lg/sniper/sniper.c	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/logicpd/am3517evm/am3517evm.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/logicpd/omap3som/omap3logic.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/logicpd/zoom1/zoom1.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/nokia/rx51/rx51.c	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/overo/overo.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/pandora/pandora.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/quipos/cairo/cairo.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/renesas/alt/alt.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/blanche/blanche.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/gose/gose.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/koelsch/koelsch.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/lager/lager.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/porter/porter.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/salvator-x/salvator-x.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/silk/silk.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/renesas/stout/stout.c	/^const struct rmobile_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct rmobile_sysinfo
sysinfo	board/technexion/tao3530/tao3530.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/technexion/twister/twister.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/teejet/mt_ventoux/mt_ventoux.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/ti/am3517crane/am3517crane.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/ti/am57xx/board.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/ti/beagle/beagle.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/ti/dra7xx/evm.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/ti/evm/evm.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo	board/ti/omap5_uevm/evm.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/ti/panda/panda.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/ti/sdp4430/sdp.c	/^const struct omap_sysinfo sysinfo = {$/;"	v	typeref:typename:const struct omap_sysinfo
sysinfo	board/timll/devkit8000/devkit8000.h	/^const omap3_sysinfo sysinfo = {$/;"	v	typeref:typename:const omap3_sysinfo
sysinfo_t	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^struct sysinfo_t {$/;"	s
sysip_dat0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat0;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
sysip_dat0	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat0;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sysip_dat1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat1;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
sysip_dat1	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat1;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sysip_dat2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat2;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
sysip_dat2	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat2;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sysip_dat3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
sysip_dat3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	sysip_dat3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
sysmem_info	arch/xtensa/include/asm/bootparam.h	/^struct sysmem_info {$/;"	s
sysmgr	arch/arm/dts/socfpga.dtsi	/^		sysmgr: sysmgr@ffd08000 {$/;"	l
sysmgr_config_warmrstcfgio	arch/arm/mach-socfpga/system_manager.c	/^void sysmgr_config_warmrstcfgio(int enable)$/;"	f	typeref:typename:void
sysmgr_get_pinmux_table	arch/arm/mach-socfpga/wrap_pinmux_config.c	/^void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len)$/;"	f	typeref:typename:void
sysmgr_pinmux_init	arch/arm/mach-socfpga/system_manager.c	/^void sysmgr_pinmux_init(void)$/;"	f	typeref:typename:void
sysmgr_regs	arch/arm/mach-socfpga/misc.c	/^static struct socfpga_system_manager *sysmgr_regs =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sysmgr_regs	arch/arm/mach-socfpga/reset_manager.c	/^static struct socfpga_system_manager *sysmgr_regs =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sysmgr_regs	arch/arm/mach-socfpga/spl.c	/^static struct socfpga_system_manager *sysmgr_regs =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sysmgr_regs	arch/arm/mach-socfpga/system_manager.c	/^static struct socfpga_system_manager *sysmgr_regs =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sysmgr_regs	drivers/ddr/altera/sdram.c	/^static struct socfpga_system_manager *sysmgr_regs =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sysmgr_regs	drivers/fpga/socfpga.c	/^static struct socfpga_system_manager *sysmgr_regs =$/;"	v	typeref:struct:socfpga_system_manager *	file:
sysmon	post/board/lwmon5/sysmon.c	/^	sysmon_t	*sysmon;$/;"	m	struct:sysmon_table_s	typeref:typename:sysmon_t *	file:
sysmon1_post_test	post/board/lwmon5/watchdog.c	/^int sysmon1_post_test(int flags)$/;"	f	typeref:typename:int
sysmon_backlight_disable	post/board/lwmon5/sysmon.c	/^static void sysmon_backlight_disable(sysmon_table_t *this)$/;"	f	typeref:typename:void	file:
sysmon_dspic	post/board/lwmon5/sysmon.c	/^static sysmon_t sysmon_dspic = {$/;"	v	typeref:typename:sysmon_t	file:
sysmon_dspic_init	post/board/lwmon5/sysmon.c	/^static void sysmon_dspic_init(sysmon_t *this)$/;"	f	typeref:typename:void	file:
sysmon_dspic_read	post/board/lwmon5/sysmon.c	/^static int sysmon_dspic_read(sysmon_t *this, uint addr, int *val)$/;"	f	typeref:typename:int	file:
sysmon_dspic_read_sgn	post/board/lwmon5/sysmon.c	/^static int sysmon_dspic_read_sgn(sysmon_t *this, uint addr, int *val)$/;"	f	typeref:typename:int	file:
sysmon_dspic_sgn	post/board/lwmon5/sysmon.c	/^static sysmon_t sysmon_dspic_sgn = {$/;"	v	typeref:typename:sysmon_t	file:
sysmon_init_f	post/board/lwmon5/sysmon.c	/^int sysmon_init_f(void)$/;"	f	typeref:typename:int
sysmon_list	post/board/lwmon5/sysmon.c	/^static sysmon_t *sysmon_list[] = {$/;"	v	typeref:typename:sysmon_t * []	file:
sysmon_post_test	post/board/lwmon5/sysmon.c	/^int sysmon_post_test(int flags)$/;"	f	typeref:typename:int
sysmon_reloc	post/board/lwmon5/sysmon.c	/^void sysmon_reloc(void)$/;"	f	typeref:typename:void
sysmon_s	post/board/lwmon5/sysmon.c	/^struct sysmon_s {$/;"	s	file:
sysmon_t	post/board/lwmon5/sysmon.c	/^typedef struct sysmon_s sysmon_t;$/;"	t	typeref:struct:sysmon_s	file:
sysmon_table	post/board/lwmon5/sysmon.c	/^static sysmon_table_t sysmon_table[] = {$/;"	v	typeref:typename:sysmon_table_t[]	file:
sysmon_table_s	post/board/lwmon5/sysmon.c	/^struct sysmon_table_s {$/;"	s	file:
sysmon_table_t	post/board/lwmon5/sysmon.c	/^typedef struct sysmon_table_s sysmon_table_t;$/;"	t	typeref:struct:sysmon_table_s	file:
sysmon_unit_value	post/board/lwmon5/sysmon.c	/^static char *sysmon_unit_value(sysmon_table_t *s, uint val)$/;"	f	typeref:typename:char *	file:
syspr	drivers/block/fsl_sata.h	/^	u32 syspr;		\/* System priority register - big endian *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
sysram_cpu_bpmp_rx	arch/arm/dts/tegra186.dtsi	/^		sysram_cpu_bpmp_rx: shmem@4f000 {$/;"	l
sysram_cpu_bpmp_tx	arch/arm/dts/tegra186.dtsi	/^		sysram_cpu_bpmp_tx: shmem@4e000 {$/;"	l
sysreg_read	arch/avr32/include/asm/sysreg.h	/^#define sysreg_read(/;"	d
sysreg_write	arch/avr32/include/asm/sysreg.h	/^#define sysreg_write(/;"	d
sysreset_allowed	arch/sandbox/include/asm/state.h	/^	bool sysreset_allowed[SYSRESET_COUNT];	\/* Allowed system reset types *\/$/;"	m	struct:sandbox_state	typeref:typename:bool[]
sysreset_get_ops	include/sysreset.h	/^#define sysreset_get_ops(/;"	d
sysreset_ops	include/sysreset.h	/^struct sysreset_ops {$/;"	s
sysreset_request	drivers/sysreset/sysreset-uclass.c	/^int sysreset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int
sysreset_t	include/sysreset.h	/^enum sysreset_t {$/;"	g
sysreset_walk	drivers/sysreset/sysreset-uclass.c	/^int sysreset_walk(enum sysreset_t type)$/;"	f	typeref:typename:int
sysreset_walk_halt	drivers/sysreset/sysreset-uclass.c	/^void sysreset_walk_halt(enum sysreset_t type)$/;"	f	typeref:typename:void
syss	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short syss;            \/* 0x90 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
syss	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short syss;	\/* 0x10 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
syss	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short syss;		\/* 0x90 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
syss	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short syss;		\/* 0x90 *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
syss	arch/arm/include/asm/ehci-omap.h	/^	u32 syss;		\/* 0x14 *\/$/;"	m	struct:omap_usbtll	typeref:typename:u32
syss	arch/arm/include/asm/ehci-omap.h	/^	u32 syss;	\/* 0x14 *\/$/;"	m	struct:omap_uhh	typeref:typename:u32
syssize	arch/x86/include/asm/bootparam.h	/^	__u32	syssize;$/;"	m	struct:setup_header	typeref:typename:__u32
sysstatus	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 sysstatus;$/;"	m	struct:dma4	typeref:typename:u32
sysstatus	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 sysstatus;				\/* 0x14 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
sysstatus	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 sysstatus;				\/* 0x14 *\/$/;"	m	struct:dss_regs	typeref:typename:u32
sysstatus	arch/arm/include/asm/omap_mmc.h	/^	unsigned int sysstatus;		\/* 0x14 *\/$/;"	m	struct:hsmmc	typeref:typename:unsigned int
sysstatus	drivers/spi/omap3_spi.c	/^	unsigned int sysstatus;		\/* 0x14 *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
sysstatus	drivers/usb/musb/omap3.c	/^	u32	sysstatus;$/;"	m	struct:omap3_otg_regs	typeref:typename:u32	file:
sysstatus	include/linux/mtd/omap_elm.h	/^	u32 sysstatus;				\/* 0x014 *\/$/;"	m	struct:elm	typeref:typename:u32
sysswlock	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t sysswlock;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
syst	drivers/spi/omap3_spi.c	/^	unsigned int syst;		\/* 0x24 *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
syst_error_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 syst_error_reg;	\/* 0x11C *\/$/;"	m	struct:misc_regs	typeref:typename:u32
systab	lib/efi_loader/efi_boottime.c	/^struct efi_system_table __efi_runtime_data systab = {$/;"	v	typeref:struct:efi_system_table __efi_runtime_data
systat	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	systat;$/;"	m	struct:davinci_pllc_regs	typeref:typename:dv_reg
systat	arch/arm/mach-davinci/include/mach/pll_defs.h	/^	unsigned int	systat;		\/* 0x150 *\/$/;"	m	struct:dv_pll_regs	typeref:typename:unsigned int
systat	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	systat;		\/* 50 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
systbcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 systbcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
systbcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 systbcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
system_bus	arch/arm/dts/uniphier-common32.dtsi	/^		system_bus: system-bus@58c00000 {$/;"	l	label:soc
system_bus	arch/arm/dts/uniphier-ld11.dtsi	/^		system_bus: system-bus@58c00000 {$/;"	l
system_bus	arch/arm/dts/uniphier-ld20.dtsi	/^		system_bus: system-bus@58c00000 {$/;"	l
system_bus	arch/arm/dts/uniphier-sld3.dtsi	/^		system_bus: system-bus@58c00000 {$/;"	l
system_bus_cs0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int system_bus_cs0_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs0_muxvals[] = {5};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs0_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_cs0_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned system_bus_cs0_pins[] = {155};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs0_pins[] = {318};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs0_pins[] = {105};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_cs0_pins[] = {93};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int system_bus_cs1_muxvals[] = {0};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int system_bus_cs1_muxvals[] = {0};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int system_bus_cs1_muxvals[] = {-1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int system_bus_cs1_muxvals[] = {0};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs1_muxvals[] = {0};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs1_muxvals[] = {0};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int system_bus_cs1_muxvals[] = {8};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_cs1_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int system_bus_cs1_muxvals[] = {-1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned system_bus_cs1_pins[] = {0};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned system_bus_cs1_pins[] = {0};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned system_bus_cs1_pins[] = {174};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned system_bus_cs1_pins[] = {14};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs1_pins[] = {24};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs1_pins[] = {18};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned system_bus_cs1_pins[] = {14};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_cs1_pins[] = {94};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned system_bus_cs1_pins[] = {150};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int system_bus_cs2_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int system_bus_cs2_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs2_muxvals[] = {5};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs2_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_cs2_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int system_bus_cs2_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned system_bus_cs2_pins[] = {64};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned system_bus_cs2_pins[] = {37};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs2_pins[] = {315};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs2_pins[] = {106};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_cs2_pins[] = {95};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned system_bus_cs2_pins[] = {10};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int system_bus_cs3_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int system_bus_cs3_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs3_muxvals[] = {5};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs3_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_cs3_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int system_bus_cs3_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned system_bus_cs3_pins[] = {156};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned system_bus_cs3_pins[] = {38};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs3_pins[] = {313};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs3_pins[] = {100};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_cs3_pins[] = {96};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned system_bus_cs3_pins[] = {11};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int system_bus_cs4_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs4_muxvals[] = {5};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs4_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_cs4_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs4_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int system_bus_cs4_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned system_bus_cs4_pins[] = {115};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs4_pins[] = {305};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs4_pins[] = {101};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_cs4_pins[] = {81};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned system_bus_cs4_pins[] = {12};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int system_bus_cs5_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs5_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs5_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_cs5_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs5_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int system_bus_cs5_muxvals[] = {1};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned system_bus_cs5_pins[] = {55};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs5_pins[] = {303};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs5_pins[] = {102};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_cs5_pins[] = {82};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned system_bus_cs5_pins[] = {13};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs6_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs6_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs6_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs6_muxvals[] = {5};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs6_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs6_pins[] = {307};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs6_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs6_pins[] = {69};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs7_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_cs7_muxvals[] = {6};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs7_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_cs7_muxvals[] = {5};$/;"	v	typeref:typename:const int[]	file:
system_bus_cs7_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_cs7_pins[] = {312};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_cs7_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_cs7_pins[] = {70};$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int system_bus_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int system_bus_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,$/;"	v	typeref:typename:const int[]	file:
system_bus_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int system_bus_muxvals[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1,$/;"	v	typeref:typename:const int[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned system_bus_pins[] = {16, 17, 18, 19, 20, 165, 166, 167,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned system_bus_pins[] = {25, 26, 27, 28, 29, 30, 31, 32, 33,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned system_bus_pins[] = {4, 5, 6, 7, 8, 9, 10, 11, 12, 13,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned system_bus_pins[] = {46, 50, 51, 53, 54, 73, 74, 75, 76,$/;"	v	typeref:typename:const unsigned[]	file:
system_bus_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned system_bus_pins[] = {136, 137, 138, 139, 140, 141, 142,$/;"	v	typeref:typename:const unsigned[]	file:
system_clk_enable	drivers/clk/at91/clk-system.c	/^static int system_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
system_clk_ops	drivers/clk/at91/clk-system.c	/^static struct clk_ops system_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
system_clock_init	arch/arm/mach-exynos/clock_init_exynos4.c	/^void system_clock_init(void)$/;"	f	typeref:typename:void
system_clock_init	arch/arm/mach-exynos/clock_init_exynos5.c	/^void system_clock_init(void)$/;"	f	typeref:typename:void
system_clock_init	board/samsung/goni/lowlevel_init.S	/^system_clock_init:$/;"	l
system_clock_init	board/samsung/smdkc100/lowlevel_init.S	/^system_clock_init:$/;"	l
system_clock_type	board/nokia/rx51/tag_omap.h	/^	u8 system_clock_type;$/;"	m	struct:omap_clock_config	typeref:typename:u8
system_code_map	board/bf533-stamp/video.h	/^const system_code_type system_code_map[] = {$/;"	v	typeref:typename:const system_code_type[]
system_code_type	board/bf533-stamp/video.h	/^} system_code_type;$/;"	t	typeref:struct:__anonaa8b6bed0108
system_control_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct system_control_regs {$/;"	s
system_guid	disk/part_efi.c	/^static efi_guid_t system_guid = PARTITION_SYSTEM_GUID;$/;"	v	typeref:typename:efi_guid_t	file:
system_id	include/fat.h	/^	char	system_id[8];	\/* Name of fs *\/$/;"	m	struct:boot_sector	typeref:typename:char[8]
system_manager_base	drivers/mmc/socfpga_dw_mmc.c	/^static const struct socfpga_system_manager *system_manager_base =$/;"	v	typeref:typename:const struct socfpga_system_manager *	file:
system_map	common/system_map.c	/^const char const system_map[] = SYSTEM_MAP;$/;"	v	typeref:typename:const char const[]
system_osc	include/mpc5xxx.h	/^	volatile u32	system_osc;	\/* 0x0018 *\/$/;"	m	struct:mpc5xxx_cdm	typeref:typename:volatile u32
system_power_down_ctrl	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	system_power_down_ctrl;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
system_power_down_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	system_power_down_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
system_rev	arch/arm/include/asm/setup.h	/^	    unsigned long system_rev;		\/* 76 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
system_rst	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 system_rst;		\/* reset system by cpld *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
system_rst	board/freescale/ls1043ardb/cpld.h	/^	u8 system_rst;		\/* 0x3 - system reset register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
system_rst	board/freescale/ls1046ardb/cpld.h	/^	u8 system_rst;		\/* 0x3 - system reset register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
system_rst	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 system_rst;                  \/* offset: 0xd *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
system_rst	board/freescale/p2041rdb/cpld.h	/^	u8 system_rst;		\/* 0x3 - system reset register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
system_rst_default	board/freescale/p2041rdb/cpld.h	/^	u8 system_rst_default;	\/* 0xe - system reset to default register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
system_serial_high	arch/arm/include/asm/setup.h	/^	    unsigned long system_serial_high;	\/* 84 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
system_serial_low	arch/arm/include/asm/setup.h	/^	    unsigned long system_serial_low;	\/* 80 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
system_table	include/efi_api.h	/^	struct efi_system_table *system_table;$/;"	m	struct:efi_loaded_image	typeref:struct:efi_system_table *
system_type	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t system_type; \/* 0 Mobile, 1 Desktop\/Server *\/$/;"	m	struct:pei_data	typeref:typename:uint32_t
systemace_bind	drivers/block/systemace.c	/^static int systemace_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
systemace_blk_ops	drivers/block/systemace.c	/^static const struct blk_ops systemace_blk_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
systemace_dev	drivers/block/systemace.c	/^static struct blk_desc systemace_dev = { 0 };$/;"	v	typeref:struct:blk_desc	file:
systemace_get_dev	drivers/block/systemace.c	/^static int systemace_get_dev(int dev, struct blk_desc **descp)$/;"	f	typeref:typename:int	file:
systemace_read	drivers/block/systemace.c	/^static unsigned long systemace_read(struct udevice *dev, unsigned long start,$/;"	f	typeref:typename:unsigned long	file:
systemagent_init	arch/x86/cpu/broadwell/pch.c	/^static void systemagent_init(void)$/;"	f	typeref:typename:void	file:
systemagent_revision	drivers/video/broadwell_igd.c	/^u8 systemagent_revision(struct udevice *bus)$/;"	f	typeref:typename:u8
systemid	include/ambapp.h	/^	const unsigned int	systemid[4];$/;"	m	struct:ambapp_pnp_info	typeref:typename:const unsigned int[4]
systest	arch/arm/include/asm/arch-am33xx/i2c.h	/^	unsigned short systest;         \/* 0xBC *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
systest	arch/arm/include/asm/arch-omap3/i2c.h	/^	unsigned short systest;	\/* 0x3c *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
systest	arch/arm/include/asm/arch-omap4/i2c.h	/^	unsigned short systest;		\/* 0xBC *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
systest	arch/arm/include/asm/arch-omap5/i2c.h	/^	unsigned short systest;		\/* 0xBC *\/$/;"	m	struct:i2c	typeref:typename:unsigned short
systest_slicer_cnt0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 systest_slicer_cnt0;\/*0x890*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
systest_slicer_cnt1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 systest_slicer_cnt1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
systest_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 systest_stat;	\/*0x880*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
systimer	arch/arm/include/asm/arch-armv7/systimer.h	/^struct systimer {$/;"	s
systimer_base	arch/arm/mach-highbank/timer.c	/^static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;$/;"	v	typeref:struct:systimer *	file:
systimer_base	board/armltd/vexpress/vexpress_common.c	/^static struct systimer *systimer_base = (struct systimer *)V2M_TIMER01;$/;"	v	typeref:struct:systimer *	file:
systype	disk/part_iso.h	/^	unsigned char systype;			\/* System Type copy of byte5 of part table *\/$/;"	m	struct:iso_init_def_entry	typeref:typename:unsigned char
sz	arch/arc/lib/cache.c	/^			unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;$/;"	m	struct:read_decode_cache_bcr::__anon3b450cc2060a::__anon3b450cc20708	typeref:typename:unsigned int:4	file:
sz	arch/arc/lib/cache.c	/^			unsigned int pad:24, way:2, lsz:2, sz:4;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2010a::__anon3b450cc20208	typeref:typename:unsigned int:4	file:
sz	board/mpl/mip405/mip405.c	/^	unsigned char sz;		\/* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
sz	board/mpl/pati/pati.c	/^	unsigned char sz;		\/* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */;"	m	struct:__anon377858d00108	typeref:typename:unsigned char	file:
sz	include/linux/compat.h	/^struct kmem_cache { int sz; };$/;"	m	struct:kmem_cache	typeref:typename:int
t	arch/powerpc/include/asm/mmu.h	/^	unsigned long t:1;	\/* Normal or I\/O  type *\/$/;"	m	struct:_SEGREG	typeref:typename:unsigned long:1
t	fs/yaffs2/yaffs_packedtags2.h	/^	struct yaffs_packed_tags2_tags_only t;$/;"	m	struct:yaffs_packed_tags2	typeref:struct:yaffs_packed_tags2_tags_only
t	include/linux/bch.h	/^	unsigned int    t;$/;"	m	struct:bch_control	typeref:typename:unsigned int
t0	arch/mips/include/asm/regdef.h	/^#define t0	/;"	d
t0	arch/powerpc/cpu/mpc512x/ide.c	/^		short t0;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
t0	drivers/video/stb_truetype.h	/^   float x0,y0,s0,t0; \/\/ top-left$/;"	m	struct:__anonce392f790208	typeref:typename:float
t1	arch/m68k/include/asm/coldfire/ata.h	/^	u8 t1;			\/* 0x02 *\/$/;"	m	struct:atac	typeref:typename:u8
t1	arch/mips/include/asm/regdef.h	/^#define t1	/;"	d
t1	arch/powerpc/cpu/mpc512x/ide.c	/^		short t1;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
t1	drivers/video/stb_truetype.h	/^   float x1,y1,s1,t1; \/\/ bottom-right$/;"	m	struct:__anonce392f790208	typeref:typename:float
t1023rdb_ctrl	board/freescale/t102xrdb/t102xrdb.c	/^static u32 t1023rdb_ctrl(u32 ctrl_type)$/;"	f	typeref:typename:u32	file:
t1024qds_mdio	board/freescale/t102xqds/eth_t102xqds.c	/^struct t1024qds_mdio {$/;"	s	file:
t1024qds_mdio_init	board/freescale/t102xqds/eth_t102xqds.c	/^static int t1024qds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
t1024qds_mdio_name_for_muxval	board/freescale/t102xqds/eth_t102xqds.c	/^static const char *t1024qds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
t1024qds_mdio_read	board/freescale/t102xqds/eth_t102xqds.c	/^static int t1024qds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t1024qds_mdio_reset	board/freescale/t102xqds/eth_t102xqds.c	/^static int t1024qds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
t1024qds_mdio_write	board/freescale/t102xqds/eth_t102xqds.c	/^static int t1024qds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t1024qds_mux_mdio	board/freescale/t102xqds/eth_t102xqds.c	/^static void t1024qds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
t1040_handle_phy_interface_rgmii	board/freescale/t1040qds/eth.c	/^void t1040_handle_phy_interface_rgmii(int i)$/;"	f	typeref:typename:void
t1040_handle_phy_interface_sgmii	board/freescale/t1040qds/eth.c	/^void t1040_handle_phy_interface_sgmii(int i)$/;"	f	typeref:typename:void
t1040_qds_mdio	board/freescale/t1040qds/eth.c	/^struct t1040_qds_mdio {$/;"	s	file:
t1040_qds_mdio_init	board/freescale/t1040qds/eth.c	/^static int t1040_qds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
t1040_qds_mdio_name_for_muxval	board/freescale/t1040qds/eth.c	/^static const char *t1040_qds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
t1040_qds_mdio_read	board/freescale/t1040qds/eth.c	/^static int t1040_qds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t1040_qds_mdio_reset	board/freescale/t1040qds/eth.c	/^static int t1040_qds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
t1040_qds_mdio_write	board/freescale/t1040qds/eth.c	/^static int t1040_qds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t1040_qds_mux_mdio	board/freescale/t1040qds/eth.c	/^static void t1040_qds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
t114_init_clocks	arch/arm/mach-tegra/tegra114/cpu.c	/^void t114_init_clocks(void)$/;"	f	typeref:typename:void
t2	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^typedef struct t2 {$/;"	s
t2	arch/mips/include/asm/regdef.h	/^#define t2	/;"	d
t208xqds_mdio	board/freescale/t208xqds/eth_t208xqds.c	/^struct t208xqds_mdio {$/;"	s	file:
t208xqds_mdio_init	board/freescale/t208xqds/eth_t208xqds.c	/^static int t208xqds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
t208xqds_mdio_name_for_muxval	board/freescale/t208xqds/eth_t208xqds.c	/^static const char *t208xqds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
t208xqds_mdio_read	board/freescale/t208xqds/eth_t208xqds.c	/^static int t208xqds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t208xqds_mdio_reset	board/freescale/t208xqds/eth_t208xqds.c	/^static int t208xqds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
t208xqds_mdio_write	board/freescale/t208xqds/eth_t208xqds.c	/^static int t208xqds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t208xqds_mux_mdio	board/freescale/t208xqds/eth_t208xqds.c	/^static void t208xqds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
t2_16	arch/powerpc/cpu/mpc512x/ide.c	/^		short t2_16;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
t2_8	arch/powerpc/cpu/mpc512x/ide.c	/^		short t2_8;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
t2_t	arch/arm/include/asm/arch-omap3/mmc_host_def.h	/^} t2_t;$/;"	t	typeref:struct:t2
t2ck	drivers/pinctrl/pinctrl_pic32.c	/^	u32 t2ck[8];$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32[8]	file:
t2i	arch/powerpc/cpu/mpc512x/ide.c	/^		short t2i;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
t2r	arch/m68k/include/asm/coldfire/ata.h	/^	u8 t2r;			\/* 0x04 *\/$/;"	m	struct:atac	typeref:typename:u8
t2w	arch/m68k/include/asm/coldfire/ata.h	/^	u8 t2w;			\/* 0x03 *\/$/;"	m	struct:atac	typeref:typename:u8
t3	arch/mips/include/asm/regdef.h	/^#define t3	/;"	d
t30_init_clocks	arch/arm/mach-tegra/tegra30/cpu.c	/^void t30_init_clocks(void)$/;"	f	typeref:typename:void
t4	arch/m68k/include/asm/coldfire/ata.h	/^	u8 t4;			\/* 0x07 *\/$/;"	m	struct:atac	typeref:typename:u8
t4	arch/mips/include/asm/regdef.h	/^#define t4	/;"	d
t4	arch/powerpc/cpu/mpc512x/ide.c	/^		short t4;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
t4240qds_mdio	board/freescale/t4qds/eth.c	/^struct t4240qds_mdio {$/;"	s	file:
t4240qds_mdio_init	board/freescale/t4qds/eth.c	/^static int t4240qds_mdio_init(char *realbusname, u8 muxval)$/;"	f	typeref:typename:int	file:
t4240qds_mdio_name_for_muxval	board/freescale/t4qds/eth.c	/^static const char *t4240qds_mdio_name_for_muxval(u8 muxval)$/;"	f	typeref:typename:const char *	file:
t4240qds_mdio_read	board/freescale/t4qds/eth.c	/^static int t4240qds_mdio_read(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t4240qds_mdio_reset	board/freescale/t4qds/eth.c	/^static int t4240qds_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
t4240qds_mdio_write	board/freescale/t4qds/eth.c	/^static int t4240qds_mdio_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
t4240qds_mux_mdio	board/freescale/t4qds/eth.c	/^static void t4240qds_mux_mdio(u8 muxval)$/;"	f	typeref:typename:void	file:
t5	arch/mips/include/asm/regdef.h	/^#define t5	/;"	d
t6	arch/mips/include/asm/regdef.h	/^#define t6	/;"	d
t7	arch/mips/include/asm/regdef.h	/^#define t7	/;"	d
t8	arch/mips/include/asm/regdef.h	/^#define t8	/;"	d
t9	arch/m68k/include/asm/coldfire/ata.h	/^	u8 t9;			\/* 0x08 *\/$/;"	m	struct:atac	typeref:typename:u8
t9	arch/mips/include/asm/regdef.h	/^#define t9	/;"	d
t9	arch/powerpc/cpu/mpc512x/ide.c	/^		short t9;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
tA	arch/powerpc/cpu/mpc512x/ide.c	/^		short tA;$/;"	m	struct:ide_preinit::__anond3b5d05a0108	typeref:typename:short	file:
tADL_min	include/linux/mtd/nand.h	/^	u32 tADL_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tALH_min	include/linux/mtd/nand.h	/^	u32 tALH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tALS_min	include/linux/mtd/nand.h	/^	u32 tALS_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tAR	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tAR;  \/* ND_ALE low to ND_nRE low delay *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tAR_min	include/linux/mtd/nand.h	/^	u32 tAR_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCCD	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tCCD;  \/* in nCK *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tCEA_max	include/linux/mtd/nand.h	/^	u32 tCEA_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCEH_min	include/linux/mtd/nand.h	/^	u32 tCEH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCH	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tCH;  \/* Enable signal hold time *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tCHZ_max	include/linux/mtd/nand.h	/^	u32 tCHZ_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCH_min	include/linux/mtd/nand.h	/^	u32 tCH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCKE	arch/arm/include/asm/emif.h	/^	u8  tCKE;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u8
tCKE	arch/arm/include/asm/emif.h	/^	u8 tCKE;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tCKE	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tCKE;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tCKESR	arch/arm/include/asm/emif.h	/^	u32 tCKESR;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tCKESR	arch/arm/include/asm/emif.h	/^	u8 tCKESR;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tCKSRE	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tCKSRE;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tCKSRX	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tCKSRX;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tCKmax	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tCKmax;  \/* in ps *\/$/;"	m	struct:dram_sun9i_cl_cwl_timing	typeref:typename:u32	file:
tCKmin	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tCKmin;  \/* in ps *\/$/;"	m	struct:dram_sun9i_cl_cwl_timing	typeref:typename:u32	file:
tCLH_min	include/linux/mtd/nand.h	/^	u32 tCLH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCLR_min	include/linux/mtd/nand.h	/^	u32 tCLR_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCLS_min	include/linux/mtd/nand.h	/^	u32 tCLS_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCOH_min	include/linux/mtd/nand.h	/^	u32 tCOH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tCS	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tCS;  \/* Enable signal setup time *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tCS_min	include/linux/mtd/nand.h	/^	u32 tCS_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tDH_min	include/linux/mtd/nand.h	/^	u32 tDH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tDLLK	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tDLLK; \/* in nCK *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tDMA	include/ata.h	/^	unsigned char	tDMA;		\/* 0=slow, 1=medium, 2=fast *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
tDQSCKMAXx2	arch/arm/include/asm/emif.h	/^	u8 tDQSCKMAXx2;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tDS_min	include/linux/mtd/nand.h	/^	u32 tDS_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tFAW	arch/arm/include/asm/emif.h	/^	u32 tFAW;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tFAW	arch/arm/include/asm/emif.h	/^	u8 tFAW;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tFAW	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tFAW;  \/* in ps *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tFEAT_max	include/linux/mtd/nand.h	/^	u32 tFEAT_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tIR_min	include/linux/mtd/nand.h	/^	u32 tIR_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tITC_max	include/linux/mtd/nand.h	/^	u32 tITC_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tMOD	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tMOD;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tMRD	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tMRD;  \/* in nCK *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tPIO	include/ata.h	/^	unsigned char	tPIO;		\/* 0=slow, 1=medium, 2=fast *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
tPos	lib/bzip2/bzlib_private.h	/^      UInt32   tPos;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32
tR	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tR;   \/* ND_nWE high to ND_nRE low for read *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tRAS	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tRAS;  \/* in ps *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tRAS_MIN	arch/arm/include/asm/emif.h	/^	u32 tRAS_MIN;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tRASmax	arch/arm/include/asm/emif.h	/^	u8 tRASmax;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tRASmin	arch/arm/include/asm/emif.h	/^	u8 tRASmin;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tRC	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tRC;   \/* in ps *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tRCD	arch/arm/include/asm/emif.h	/^	u32 tRCD;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tRCD	arch/arm/include/asm/emif.h	/^	u8 tRCD;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tRCD	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tRCD;  \/* in ps *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tRC_min	include/linux/mtd/nand.h	/^	u32 tRC_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tREA_max	include/linux/mtd/nand.h	/^	u32 tREA_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tREFI	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tREFI; \/* in ns *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tREH_min	include/linux/mtd/nand.h	/^	u32 tREH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRFC	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tRFC;  \/* in ns *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tRFC_DDR3_table	arch/arm/mach-sunxi/dram_sun4i.c	/^static const u16 tRFC_DDR3_table[6] = {$/;"	v	typeref:typename:const u16[6]	file:
tRFCab	arch/arm/include/asm/emif.h	/^	u8 tRFCab;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tRH	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tRH;  \/* ND_nRE high duration *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tRHOH_min	include/linux/mtd/nand.h	/^	u32 tRHOH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRHW_lut	drivers/mtd/nand/sunxi_nand.c	/^static const s32 tRHW_lut[] = {4, 8, 12, 20};$/;"	v	typeref:typename:const s32[]	file:
tRHW_min	include/linux/mtd/nand.h	/^	u32 tRHW_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRHZ_max	include/linux/mtd/nand.h	/^	u32 tRHZ_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRL	arch/arm/include/asm/emif.h	/^	u32 tRL;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tRLOH_min	include/linux/mtd/nand.h	/^	u32 tRLOH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRP	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tRP;   \/* in ps *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tRP	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tRP;  \/* ND_nRE pulse width *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tRP_AB	arch/arm/include/asm/emif.h	/^	u32 tRP_AB;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tRP_min	include/linux/mtd/nand.h	/^	u32 tRP_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRPab	arch/arm/include/asm/emif.h	/^	u8 tRPab;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tRRD	arch/arm/include/asm/emif.h	/^	u32 tRRD;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tRRD	arch/arm/include/asm/emif.h	/^	u8 tRRD;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tRRD	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tRRD;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tRR_min	include/linux/mtd/nand.h	/^	u32 tRR_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tRST_max	include/linux/mtd/nand.h	/^	u64 tRST_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u64
tRTP	arch/arm/include/asm/emif.h	/^	u32 tRTP;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tRTP	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tRTP;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tRTPx2	arch/arm/include/asm/emif.h	/^	u8 tRTPx2;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tTKID	include/linux/usb/ch9.h	/^	__u8  tTKID[3];$/;"	m	struct:usb_key_descriptor	typeref:typename:__u8[3]
tTKID	include/linux/usb/ch9.h	/^	__u8 tTKID[3];$/;"	m	struct:usb_handshake	typeref:typename:__u8[3]
tWB_lut	drivers/mtd/nand/sunxi_nand.c	/^static const s32 tWB_lut[] = {6, 12, 16, 20};$/;"	v	typeref:typename:const s32[]	file:
tWB_max	include/linux/mtd/nand.h	/^	u32 tWB_max;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tWC_min	include/linux/mtd/nand.h	/^	u32 tWC_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tWH	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tWH;  \/* ND_nWE high duration *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tWHR	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tWHR; \/* ND_nWE high to ND_nRE low for status read *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tWHR_min	include/linux/mtd/nand.h	/^	u32 tWHR_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tWH_min	include/linux/mtd/nand.h	/^	u32 tWH_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tWLMRD	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tWLMRD;    \/* min, in nCK *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tWLO	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tWLO;      \/* max, in ns *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tWP	drivers/mtd/nand/pxa3xx_nand.h	/^	unsigned int	tWP;  \/* ND_nWE pulse time *\/$/;"	m	struct:pxa3xx_nand_timing	typeref:typename:unsigned int
tWP_min	include/linux/mtd/nand.h	/^	u32 tWP_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tWR	arch/arm/include/asm/emif.h	/^	u32 tWR;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tWR	arch/arm/include/asm/emif.h	/^	u8 tWR;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tWR	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tWR;   \/* in nCK *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tWTR	arch/arm/include/asm/emif.h	/^	u32 tWTR;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tWTR	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tWTR;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tWTRx2	arch/arm/include/asm/emif.h	/^	u8 tWTRx2;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tWW_min	include/linux/mtd/nand.h	/^	u32 tWW_min;$/;"	m	struct:nand_sdr_timings	typeref:typename:u32
tXP	arch/arm/include/asm/emif.h	/^	u32 tXP;$/;"	m	struct:lpddr2_min_tck	typeref:typename:u32
tXP	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tXP;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tXPDLL	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tXPDLL;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tXPx2	arch/arm/include/asm/emif.h	/^	u8 tXPx2;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tXS	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tXS;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tXSDLL	arch/arm/mach-sunxi/dram_sun9i.c	/^	u32 tXSDLL; \/* in nCK *\/$/;"	m	struct:dram_sun9i_para	typeref:typename:u32	file:
tXSR	arch/arm/include/asm/emif.h	/^	u8 tXSR;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tYUYV	arch/powerpc/cpu/mpc8xx/video.c	/^} tYUYV;$/;"	t	typeref:struct:__anonce1d55370108	file:
tZQCL	arch/arm/include/asm/emif.h	/^	u32 tZQCL;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u32
tZQCS	arch/arm/include/asm/emif.h	/^	u8 tZQCS;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u8
tZQCS	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tZQCS;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
tZQINIT	arch/arm/include/asm/emif.h	/^	u32 tZQINIT;$/;"	m	struct:lpddr2_ac_timings	typeref:typename:u32
tZQoper	arch/arm/mach-sunxi/dram_sun9i.c	/^	struct dram_sun9i_timing tZQoper;$/;"	m	struct:dram_sun9i_para	typeref:struct:dram_sun9i_timing	file:
t_REFI_us_x10	arch/arm/include/asm/emif.h	/^	u8	t_REFI_us_x10;$/;"	m	struct:lpddr2_addressing	typeref:typename:u8
t_adl	include/linux/mtd/nand.h	/^	__le16 t_adl;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
t_adl	include/linux/mtd/nand.h	/^	__le16 t_adl;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
t_bers	include/linux/mtd/nand.h	/^	__le16 t_bers;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
t_bers	include/linux/mtd/nand.h	/^	__le16 t_bers;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
t_casemax	include/ddr_spd.h	/^	unsigned char t_casemax;    \/* 47 Tcasemax *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
t_ccs	include/linux/mtd/nand.h	/^	__le16 t_ccs;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
t_ccs	include/linux/mtd/nand.h	/^	__le16 t_ccs;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
t_cdlr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_cdlr;		\/* Last data in to read command time         *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_ck	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_ck;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_ck	arch/x86/cpu/quark/smc.c	/^static const uint32_t t_ck[3] = {$/;"	v	typeref:typename:const uint32_t[3]	file:
t_cke	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_cke;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_ckesr	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_ckesr;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_conf_ca	board/keymile/common/common.h	/^	u8	t_conf_ca;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
t_csta	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 t_csta;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
t_dinit0	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_dinit0;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_dinit1	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_dinit1;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_dinit2	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_dinit2;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_dinit3	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_dinit3;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_dllk	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_dllk;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_faw	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_faw;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_fdxfc	drivers/net/fec_mxc.h	/^	uint32_t t_fdxfc;		\/* MBAR_ETH + 0x270 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
t_fdxfc	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 t_fdxfc;		\/* MBAR_ETH + 0x270 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
t_hold	include/ata.h	/^	unsigned int	t_hold;		\/* Hold   Time in [ns] or clocks	*\/$/;"	m	struct:__anona4e76fa40108	typeref:typename:unsigned int
t_int_r	include/linux/mtd/nand.h	/^	__le16 t_int_r;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
t_kstack	arch/sparc/cpu/leon2/start.S	/^#define t_kstack /;"	d	file:
t_kstack	arch/sparc/cpu/leon3/start.S	/^#define t_kstack /;"	d	file:
t_length	include/ata.h	/^	unsigned int	t_length;	\/* Length Time in [ns] or clocks	*\/$/;"	m	struct:__anona4e76fa40108	typeref:typename:unsigned int
t_mask_ca	board/keymile/common/common.h	/^	u8	t_mask_ca;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
t_mod	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_mod;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_mrd	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_mrd;		\/* Load mode register to active command time *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_mrd	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_mrd;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_npc	arch/sparc/cpu/leon2/start.S	/^#define t_npc /;"	d	file:
t_npc	arch/sparc/cpu/leon3/start.S	/^#define t_npc /;"	d	file:
t_pc	arch/sparc/cpu/leon2/start.S	/^#define t_pc /;"	d	file:
t_pc	arch/sparc/cpu/leon3/start.S	/^#define t_pc /;"	d	file:
t_phyrst	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_phyrst;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_pllgs	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_pllgs;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_plllock	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_plllock;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_pllpd	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_pllpd;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_pllrst	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_pllrst;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_prog	include/linux/mtd/nand.h	/^	__le16 t_prog;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
t_prog	include/linux/mtd/nand.h	/^	__le16 t_prog;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
t_psr	arch/sparc/cpu/leon2/start.S	/^#define t_psr /;"	d	file:
t_psr	arch/sparc/cpu/leon3/start.S	/^#define t_psr /;"	d	file:
t_r	include/linux/mtd/nand.h	/^	__le16 t_r;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
t_r	include/linux/mtd/nand.h	/^	__le16 t_r;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
t_r_multi_plane	include/linux/mtd/nand.h	/^	__le16 t_r_multi_plane;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
t_ras	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_ras;		\/* Active to precharge command period        *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_ras	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_ras;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_ras_max	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 t_ras_max;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
t_rc	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_rc;		\/* Active to active command period           *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_rc	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_rc;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_rcd	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_rcd;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_refprd	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_refprd;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_retpc	arch/sparc/cpu/leon2/start.S	/^#define t_retpc /;"	d	file:
t_retpc	arch/sparc/cpu/leon3/start.S	/^#define t_retpc /;"	d	file:
t_rfc	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_rfc;		\/* Auto-refresh period                       *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_rfc	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_rfc;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_rfc	arch/x86/cpu/quark/smc.c	/^static const uint32_t t_rfc[5] = {$/;"	v	typeref:typename:const uint32_t[5]	file:
t_rl_add	drivers/ddr/altera/sequencer.h	/^	u32	t_rl_add;$/;"	m	struct:socfpga_data_mgr	typeref:typename:u32
t_rp	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_rp;		\/* Precharge command period                  *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_rp	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_rp;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_rrd	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_rrd;		\/* Active bank A to active bank B latency    *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_rrd	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_rrd;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_rrd2	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 t_rrd2;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
t_rtp	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_rtp;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_setup	include/ata.h	/^	unsigned int	t_setup;	\/* Setup  Time in [ns] or clocks	*\/$/;"	m	struct:__anona4e76fa40108	typeref:typename:unsigned int
t_srex	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_srex;		\/* Self-refresh exit time                    *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_systable	arch/sparc/cpu/leon2/start.S	/^#define t_systable /;"	d	file:
t_systable	arch/sparc/cpu/leon3/start.S	/^#define t_systable /;"	d	file:
t_twinmask	arch/sparc/cpu/leon2/start.S	/^#define t_twinmask /;"	d	file:
t_twinmask	arch/sparc/cpu/leon3/start.S	/^#define t_twinmask /;"	d	file:
t_wim	arch/sparc/cpu/leon2/start.S	/^#define t_wim /;"	d	file:
t_wim	arch/sparc/cpu/leon3/start.S	/^#define t_wim /;"	d	file:
t_wl_add	drivers/ddr/altera/sequencer.h	/^	u32	t_wl_add;$/;"	m	struct:socfpga_data_mgr	typeref:typename:u32
t_wlmrd	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_wlmrd;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_wlo	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_wlo;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_wr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_wr;		\/* Write recovery time                       *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_wr	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_wr;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_wr_bin	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_wr_bin;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_wtr	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_wtr;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_xp	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_xp;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_xpdll	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_xpdll;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_xs	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_xs;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_xsdll	arch/arm/mach-keystone/ddr3_spd.c	/^	u32 t_xsdll;$/;"	m	struct:ddr3_sodimm	typeref:typename:u32	file:
t_xsr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32 t_xsr;		\/* Exit self-refresh to active command time  *\/$/;"	m	struct:emc_regs	typeref:typename:u32
t_zqcs	arch/arm/mach-keystone/ddr3_spd.c	/^	u8 t_zqcs;$/;"	m	struct:ddr3_sodimm	typeref:typename:u8	file:
ta	arch/m68k/include/asm/coldfire/ata.h	/^	u8 ta;			\/* 0x05 *\/$/;"	m	struct:atac	typeref:typename:u8
ta0	arch/mips/include/asm/regdef.h	/^#define ta0	/;"	d
ta1	arch/mips/include/asm/regdef.h	/^#define ta1	/;"	d
ta2	arch/mips/include/asm/regdef.h	/^#define ta2	/;"	d
ta3	arch/mips/include/asm/regdef.h	/^#define ta3	/;"	d
taa_min	include/ddr_spd.h	/^	uint8_t taa_min;		\/* 24 Min CAS Latency Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
taa_min	include/ddr_spd.h	/^	unsigned char taa_min;         \/* 16 Min CAS Latency Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
taa_ps	include/fsl_ddr_dimm_params.h	/^	int taa_ps;	\/* minimum CAS latency time *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
taamin_ps	include/common_timing_params.h	/^	unsigned int taamin_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tab_seq	common/cli_readline.c	/^static const char   tab_seq[] = "        ";	\/* used to expand TABs *\/$/;"	v	typeref:typename:const char[]	file:
tab_to_col	tools/rkmux.py	/^tab_to_col = 3$/;"	v
tab_width_frac	include/video_console.h	/^	int tab_width_frac;$/;"	m	struct:vidconsole_priv	typeref:typename:int
tabify	scripts/checkpatch.pl	/^sub tabify {$/;"	s
table	arch/x86/include/asm/bootparam.h	/^	__u8  table[14];$/;"	m	struct:sys_desc_table	typeref:typename:__u8[14]
table	arch/x86/include/asm/global_data.h	/^	ulong table;			\/* Table pointer from previous loader *\/$/;"	m	struct:arch_global_data	typeref:typename:ulong
table	arch/x86/lib/sfi.c	/^	u64 table[SFI_TABLE_MAX_ENTRIES];$/;"	m	struct:table_info	typeref:typename:u64[]	file:
table	common/image.c	/^	const table_entry_t *table;$/;"	m	struct:table_info	typeref:typename:const table_entry_t *	file:
table	include/efi_api.h	/^	void *table;$/;"	m	struct:efi_configuration_table	typeref:typename:void *
table	include/input.h	/^	struct input_key_xlate table[INPUT_MAX_MODIFIERS];$/;"	m	struct:input_config	typeref:struct:input_key_xlate[]
table	include/search.h	/^	struct _ENTRY *table;$/;"	m	struct:hsearch_data	typeref:struct:_ENTRY *
table_bytes	arch/x86/include/asm/coreboot_tables.h	/^	u32 table_bytes;$/;"	m	struct:cb_header	typeref:typename:u32
table_checksum	arch/x86/include/asm/coreboot_tables.h	/^	u32 table_checksum;$/;"	m	struct:cb_header	typeref:typename:u32
table_compute_checksum	include/tables_csum.h	/^static inline u8 table_compute_checksum(void *v, int len)$/;"	f	typeref:typename:u8
table_compute_checksum	lib/tables_csum.c	/^u8 table_compute_checksum(void *v, int len)$/;"	f	typeref:typename:u8
table_entries	arch/x86/include/asm/coreboot_tables.h	/^	u32 table_entries;$/;"	m	struct:cb_header	typeref:typename:u32
table_entry	include/image.h	/^typedef struct table_entry {$/;"	s
table_entry_t	include/image.h	/^} table_entry_t;$/;"	t	typeref:struct:table_entry
table_fill_string	arch/x86/lib/tables.c	/^void table_fill_string(char *dest, const char *src, size_t n, char pad)$/;"	f	typeref:typename:void
table_info	arch/x86/lib/sfi.c	/^struct table_info {$/;"	s	file:
table_info	common/image.c	/^static const struct table_info table_info[IH_COUNT] = {$/;"	v	typeref:typename:const struct table_info[]	file:
table_info	common/image.c	/^struct table_info {$/;"	s	file:
table_size	disk/part_amiga.h	/^    u32 table_size;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
table_write	arch/x86/lib/tables.c	/^typedef u32 (*table_write)(u32 addr);$/;"	t	typeref:typename:u32 (*)(u32 addr)	file:
table_write_funcs	arch/x86/lib/tables.c	/^static table_write table_write_funcs[] = {$/;"	v	typeref:typename:table_write[]	file:
tables	include/efi_api.h	/^	struct efi_configuration_table *tables;$/;"	m	struct:efi_system_table	typeref:struct:efi_configuration_table *
tac	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 tac;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
tack	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tack;		\/* 0x0D *\/$/;"	m	struct:atac	typeref:typename:u8
taddr	drivers/qe/uec.h	/^	uec_82xx_enet_address_t    taddr;$/;"	m	struct:uec_82xx_address_filtering_pram	typeref:typename:uec_82xx_enet_address_t
tag	arch/arm/imx-common/hab.c	/^	uint8_t  tag;						\/* Tag *\/$/;"	m	struct:record	typeref:typename:uint8_t	file:
tag	arch/arm/include/asm/setup.h	/^	u32 tag;$/;"	m	struct:tag_header	typeref:typename:u32
tag	arch/arm/include/asm/setup.h	/^	u32 tag;$/;"	m	struct:tagtable	typeref:typename:u32
tag	arch/arm/include/asm/setup.h	/^struct tag {$/;"	s
tag	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 tag;$/;"	m	struct:bcm2835_mbox_tag_hdr	typeref:typename:u32
tag	arch/avr32/include/asm/setup.h	/^	u32	tag;$/;"	m	struct:tagtable	typeref:typename:u32
tag	arch/avr32/include/asm/setup.h	/^	u32 tag;$/;"	m	struct:tag_header	typeref:typename:u32
tag	arch/avr32/include/asm/setup.h	/^struct tag {$/;"	s
tag	arch/nds32/include/asm/setup.h	/^	u32 tag;$/;"	m	struct:tag_header	typeref:typename:u32
tag	arch/nds32/include/asm/setup.h	/^	u32 tag;$/;"	m	struct:tagtable	typeref:typename:u32
tag	arch/nds32/include/asm/setup.h	/^struct tag {$/;"	s
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_cmos_checksum	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_cmos_defaults	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_cmos_entries	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_cmos_enums	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_cmos_option_table	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_console	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_forward	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_framebuffer	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_gpios	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_hwrpb	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_mainboard	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_memory	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_record	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_serial	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	u32 tag;$/;"	m	struct:cb_string	typeref:typename:u32
tag	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t tag;$/;"	m	struct:cb_cbmem_tab	typeref:typename:uint32_t
tag	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t tag;$/;"	m	struct:cb_fdt	typeref:typename:uint32_t
tag	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t tag;$/;"	m	struct:cb_vbnv	typeref:typename:uint32_t
tag	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t tag;$/;"	m	struct:cb_vdat	typeref:typename:uint32_t
tag	board/freescale/common/ngpixis.h	/^	u8 tag;$/;"	m	struct:ngpixis	typeref:typename:u8
tag	board/nokia/rx51/tag_omap.h	/^	u16 tag;$/;"	m	struct:tag_omap_header	typeref:typename:u16
tag	drivers/block/sata_dwc.h	/^	unsigned int		tag;$/;"	m	struct:ata_queued_cmd	typeref:typename:unsigned int
tag	drivers/tpm/tpm_tis.h	/^	__be16 tag;$/;"	m	struct:tpm_input_header	typeref:typename:__be16
tag	drivers/tpm/tpm_tis.h	/^	__be16 tag;$/;"	m	struct:tpm_output_header	typeref:typename:__be16
tag	drivers/usb/emul/sandbox_flash.c	/^	u32 tag;$/;"	m	struct:sandbox_flash_priv	typeref:typename:u32	file:
tag	drivers/usb/gadget/f_mass_storage.c	/^	u32			tag;$/;"	m	struct:fsg_common	typeref:typename:u32	file:
tag	include/fdt.h	/^	fdt32_t tag;$/;"	m	struct:fdt_node_header	typeref:typename:fdt32_t
tag	include/fdt.h	/^	fdt32_t tag;$/;"	m	struct:fdt_property	typeref:typename:fdt32_t
tag	include/fis.h	/^	u8 tag;$/;"	m	struct:sata_fis_h2d_ncq	typeref:typename:u8
tag	include/logbuff.h	/^			unsigned long	tag;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30308	typeref:typename:unsigned long
tag	include/logbuff.h	/^			unsigned long	tag;$/;"	m	struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30408	typeref:typename:unsigned long
tag	include/tpm.h	/^	__be16	tag;$/;"	m	struct:tpm_permanent_flags	typeref:typename:__be16
tag	scripts/kconfig/lxdialog/dialog.h	/^	char tag;$/;"	m	struct:dialog_item	typeref:typename:char
tag	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color tag;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
tag	scripts/kconfig/nconf.c	/^	char tag;$/;"	m	struct:mitem	typeref:typename:char	file:
tag	tools/imximage.h	/^	uint8_t tag;$/;"	m	struct:__anon504a956c0808	typeref:typename:uint8_t
tag	tools/imximage.h	/^	uint8_t tag;$/;"	m	struct:__anon504a956c0908	typeref:typename:uint8_t
tag	tools/mxsboot.c	/^	uint32_t		tag;$/;"	m	struct:mx28_sd_drive_info	typeref:typename:uint32_t	file:
tag	tools/mxsimage.h	/^		uint8_t		tag;$/;"	m	struct:sb_command::__anonc4848c960308	typeref:typename:uint8_t
tag	tools/mxsimage.h	/^	uint8_t		tag;$/;"	m	struct:sb_source_entry	typeref:typename:uint8_t
tag	tools/mxsimage.h	/^	} tag;$/;"	m	union:sb_command::__anonc4848c96040a	typeref:struct:sb_command::__anonc4848c96040a::__anonc4848c960608
tag1	scripts/kconfig/gconf.c	/^GtkTextTag *tag1, *tag2;$/;"	v	typeref:typename:GtkTextTag *
tag2	scripts/kconfig/gconf.c	/^GtkTextTag *tag1, *tag2;$/;"	v	typeref:typename:GtkTextTag *
tagSXsvfInfo	board/esd/common/xilinx_jtag/micro.c	/^typedef struct tagSXsvfInfo$/;"	s	file:
tag_acorn	arch/arm/include/asm/setup.h	/^struct tag_acorn {$/;"	s
tag_boardinfo	arch/avr32/include/asm/setup.h	/^struct tag_boardinfo {$/;"	s
tag_clock	arch/avr32/include/asm/setup.h	/^struct tag_clock {$/;"	s
tag_cmdline	arch/arm/include/asm/setup.h	/^struct tag_cmdline {$/;"	s
tag_cmdline	arch/avr32/include/asm/setup.h	/^struct tag_cmdline {$/;"	s
tag_cmdline	arch/nds32/include/asm/setup.h	/^struct tag_cmdline {$/;"	s
tag_core	arch/arm/include/asm/setup.h	/^struct tag_core {$/;"	s
tag_core	arch/avr32/include/asm/setup.h	/^struct tag_core {$/;"	s
tag_core	arch/nds32/include/asm/setup.h	/^struct tag_core {$/;"	s
tag_ethernet	arch/avr32/include/asm/setup.h	/^struct tag_ethernet {$/;"	s
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_allocate_buffer	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_alpha_mode	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_blank_screen	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_depth	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_arm_mem	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_board_rev	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_board_serial	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_clock_rate	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_mac_address	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_palette	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_get_power_state	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_overscan	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_physical_w_h	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_pitch	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_pixel_order	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_release_buffer	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_set_palette	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_set_power_state	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_test_palette	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_virtual_offset	typeref:struct:bcm2835_mbox_tag_hdr
tag_hdr	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	struct bcm2835_mbox_tag_hdr tag_hdr;$/;"	m	struct:bcm2835_mbox_tag_virtual_w_h	typeref:struct:bcm2835_mbox_tag_hdr
tag_header	arch/arm/include/asm/setup.h	/^struct tag_header {$/;"	s
tag_header	arch/avr32/include/asm/setup.h	/^struct tag_header {$/;"	s
tag_header	arch/nds32/include/asm/setup.h	/^struct tag_header {$/;"	s
tag_info	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 tag_info;$/;"	m	struct:qm_host_desc	typeref:typename:u32
tag_initrd	arch/arm/include/asm/setup.h	/^struct tag_initrd {$/;"	s
tag_initrd	arch/nds32/include/asm/setup.h	/^struct tag_initrd {$/;"	s
tag_key	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color tag_key;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
tag_key_selected	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color tag_key_selected;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
tag_mem32	arch/arm/include/asm/setup.h	/^struct tag_mem32 {$/;"	s
tag_mem32	arch/nds32/include/asm/setup.h	/^struct tag_mem32 {$/;"	s
tag_mem_range	arch/avr32/include/asm/setup.h	/^struct tag_mem_range {$/;"	s
tag_member_present	arch/arm/include/asm/setup.h	/^#define tag_member_present(/;"	d
tag_member_present	arch/avr32/include/asm/setup.h	/^#define tag_member_present(/;"	d
tag_member_present	arch/nds32/include/asm/setup.h	/^#define tag_member_present(/;"	d
tag_memclk	arch/arm/include/asm/setup.h	/^struct tag_memclk {$/;"	s
tag_mv_uboot	board/Synology/ds109/ds109.h	/^struct tag_mv_uboot {$/;"	s
tag_next	arch/arm/include/asm/setup.h	/^#define tag_next(/;"	d
tag_next	arch/avr32/include/asm/setup.h	/^#define tag_next(/;"	d
tag_next	arch/nds32/include/asm/setup.h	/^#define tag_next(/;"	d
tag_omap	board/nokia/rx51/tag_omap.h	/^struct tag_omap {$/;"	s
tag_omap_header	board/nokia/rx51/tag_omap.h	/^struct tag_omap_header {$/;"	s
tag_omap_next	board/nokia/rx51/tag_omap.h	/^#define tag_omap_next(/;"	d
tag_ptr	drivers/mtd/nand/tegra_nand.h	/^	u32	tag_ptr;	\/* offset 44h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
tag_ramdisk	arch/arm/include/asm/setup.h	/^struct tag_ramdisk {$/;"	s
tag_ramdisk	arch/nds32/include/asm/setup.h	/^struct tag_ramdisk {$/;"	s
tag_revision	arch/arm/include/asm/setup.h	/^struct tag_revision {$/;"	s
tag_revision	arch/nds32/include/asm/setup.h	/^struct tag_revision {$/;"	s
tag_sel	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	tag_sel;$/;"	m	struct:rx_flow_regs	typeref:typename:u32
tag_selected	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color tag_selected;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
tag_serialnr	arch/arm/include/asm/setup.h	/^struct tag_serialnr {$/;"	s
tag_serialnr	arch/nds32/include/asm/setup.h	/^struct tag_serialnr {$/;"	s
tag_size	arch/arm/include/asm/setup.h	/^#define tag_size(/;"	d
tag_size	arch/avr32/include/asm/setup.h	/^#define tag_size(/;"	d
tag_size	arch/nds32/include/asm/setup.h	/^#define tag_size(/;"	d
tag_videolfb	arch/arm/include/asm/setup.h	/^struct tag_videolfb {$/;"	s
tag_videolfb	arch/nds32/include/asm/setup.h	/^struct tag_videolfb {$/;"	s
tag_videotext	arch/arm/include/asm/setup.h	/^struct tag_videotext {$/;"	s
tag_videotext	arch/nds32/include/asm/setup.h	/^struct tag_videotext {$/;"	s
tagdata	board/freescale/common/qixis.h	/^	u8 tagdata;$/;"	m	struct:qixis	typeref:typename:u8
tagged_writepages	include/linux/compat.h	/^	unsigned tagged_writepages:1;	\/* tag-and-write to avoid livelock *\/$/;"	m	struct:writeback_control	typeref:typename:unsigned:1
tags	Makefile	/^tags ctags:$/;"	t
tags	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	tags;$/;"	m	struct:rx_flow_regs	typeref:typename:u32
tags_9bytes	fs/yaffs2/yaffs_guts.h	/^	int tags_9bytes;	\/* Use 9 byte tags *\/$/;"	m	struct:yaffs_param	typeref:typename:int
tags_addr	include/android_image.h	/^	u32 tags_addr;		\/* physical addr for kernel tags *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32
tags_used	fs/yaffs2/yaffs_guts.h	/^	u32 tags_used;$/;"	m	struct:yaffs_dev	typeref:typename:u32
tagtable	arch/arm/include/asm/setup.h	/^struct tagtable {$/;"	s
tagtable	arch/avr32/include/asm/setup.h	/^struct tagtable {$/;"	s
tagtable	arch/nds32/include/asm/setup.h	/^struct tagtable {$/;"	s
tah_addr	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		tah_addr;		\/* TAH offset *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
tahvo_irq_gpio	board/nokia/rx51/tag_omap.h	/^	s16 tahvo_irq_gpio;$/;"	m	struct:omap_em_asic_bb5_config	typeref:typename:s16
tail	drivers/crypto/fsl/jr.h	/^	int tail;$/;"	m	struct:jobring	typeref:typename:int
tail	drivers/mtd/nand/denali.h	/^	int tail;$/;"	m	struct:nand_buf	typeref:typename:int
tail	drivers/net/cpsw.c	/^	struct cpdma_desc	*head, *tail;$/;"	m	struct:cpdma_chan	typeref:struct:cpdma_desc *	file:
tail	drivers/net/xilinx_axi_emac.c	/^	u32 tail; \/* TAILDESC *\/$/;"	m	struct:axidma_reg	typeref:typename:u32	file:
tail	include/circbuf.h	/^	char *tail;		\/* pointer to space for next element *\/$/;"	m	struct:circbuf	typeref:typename:char *
tail	include/membuff.h	/^	char *tail;		\/** current buffer tail *\/$/;"	m	struct:membuff	typeref:typename:char *
tail_drop_level	include/vsc9953.h	/^	u32	tail_drop_level[11];$/;"	m	struct:vsc9953_sys_pause_cfg	typeref:typename:u32[11]
tail_drop_threshold	include/fsl-mc/fsl_dpni.h	/^	uint32_t tail_drop_threshold;$/;"	m	struct:dpni_queue_attr	typeref:typename:uint32_t
tail_drop_threshold	include/fsl-mc/fsl_dpni.h	/^	uint32_t tail_drop_threshold;$/;"	m	struct:dpni_queue_cfg	typeref:typename:uint32_t
taip	arch/blackfin/include/asm/serial4.h	/^	u32 taip;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
take_gc_lnum	fs/ubifs/super.c	/^static int take_gc_lnum(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
take_ihead	fs/ubifs/replay.c	/^static int take_ihead(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
takeback_td	drivers/usb/host/ohci-hcd.c	/^static int takeback_td(ohci_t *ohci, td_t *td_list)$/;"	f	typeref:typename:int	file:
taken_empty_lebs	fs/ubifs/ubifs.h	/^	int taken_empty_lebs;$/;"	m	struct:ubifs_lp_stats	typeref:typename:int
tal	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tal;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tal	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tal;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tal	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tal;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tal	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tal;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tal	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tal;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tal	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tal;		\/* 0xe4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tam3517_module_info	include/configs/tam3517-common.h	/^struct tam3517_module_info {$/;"	s
tamonten_ng_padctrl	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^static struct pmux_drvgrp_config tamonten_ng_padctrl[] = {$/;"	v	typeref:struct:pmux_drvgrp_config[]
tamonten_ng_pinmux_common	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^static struct pmux_pingrp_config tamonten_ng_pinmux_common[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
tao3530_revision	board/technexion/tao3530/tao3530.c	/^int tao3530_revision(void)$/;"	f	typeref:typename:int
tap	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 tap;$/;"	m	struct:emi_bank_regs	typeref:typename:u32
tap	arch/mips/mach-ath79/ar934x/ddr.c	/^	u32	tap;$/;"	m	struct:ar934x_mem_config	typeref:typename:u32	file:
tap	board/spear/common/spr_misc.c	/^	unsigned int tap;$/;"	m	struct:cust_emi_para	typeref:typename:unsigned int	file:
tap2tap	arch/powerpc/cpu/mpc512x/i2c.c	/^	int tap2tap;$/;"	m	struct:mpc512x_i2c_tap	typeref:typename:int	file:
tap2tap	arch/powerpc/cpu/mpc5xxx/i2c.c	/^	int tap2tap;$/;"	m	struct:mpc5xxx_i2c_tap	typeref:typename:int	file:
tar	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 tar;$/;"	m	struct:at91_emac	typeref:typename:u32
tar	arch/powerpc/include/asm/immap_83xx.h	/^	u32 tar;$/;"	m	struct:pex_inbound_window	typeref:typename:u32
tar	drivers/usb/musb/blackfin_usb.h	/^	} tar[8];$/;"	m	struct:musb_regs	typeref:struct:musb_regs::musb_tar_regs[8]
tar	drivers/usb/musb/musb_core.h	/^	} tar[16];$/;"	m	struct:musb_regs	typeref:struct:musb_regs::musb_tar_regs[16]
target	arch/arm/include/asm/setjmp.h	/^	ulong target;$/;"	m	struct:jmp_buf_data	typeref:typename:ulong
target	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u8 target;$/;"	m	struct:mbus_win	typeref:typename:u8
target	drivers/core/simple-bus.c	/^	u32 target;$/;"	m	struct:simple_bus_plat	typeref:typename:u32	file:
target	drivers/net/mvgbe.h	/^	enum mvgbe_target target;	\/* System targets *\/$/;"	m	struct:mvgbe_winparam	typeref:enum:mvgbe_target
target	include/blk.h	/^	unsigned char	target;		\/* target SCSI ID *\/$/;"	m	struct:blk_desc	typeref:typename:unsigned char
target	include/scsi.h	/^	unsigned char		target;						\/* Target ID				 *\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned char
target	scripts/basic/fixdep.c	/^char *target;$/;"	v	typeref:typename:char *
target	scripts/kconfig/expr.h	/^	struct menu *target;$/;"	m	struct:jump_key	typeref:struct:menu *
target-dir	Makefile	/^        target-dir = $(dir $@)$/;"	m
target-dir	Makefile	/^        target-dir = $(if $(KBUILD_EXTMOD),$(dir $<),$(dir $@))$/;"	m
target_address	board/gdsys/common/cmd_ioloop.c	/^	u16 target_address;$/;"	m	struct:io_generic_packet	typeref:typename:u16	file:
target_address	include/gdsys_fpga.h	/^	u16 target_address;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
target_frequency	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 target_frequency;	\/* DDR Frequency *\/$/;"	m	struct:dram_info	typeref:typename:u32
target_get_switch_ctl	arch/arm/include/asm/ti-common/keystone_net.h	/^#define target_get_switch_ctl(/;"	d
target_id	drivers/ddr/marvell/a38x/xor.h	/^	u8 target_id;		\/* Target Id of this MV_TARGET *\/$/;"	m	struct:unit_win_info	typeref:typename:u8
target_lat	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 target_lat;		\/* Target Latency *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
target_lat	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 target_lat;		\/* Target Latency *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
target_mourn_inferior	tools/gdb/remote.c	/^#define target_mourn_inferior(/;"	d	file:
target_regs	drivers/usb/musb-new/musb_core.h	/^	void __iomem		*target_regs;$/;"	m	struct:musb_hw_ep	typeref:typename:void __iomem *
target_root	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t target_root;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
target_root_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t target_root_clr;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
target_root_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t target_root_set;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
target_root_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t target_root_tog;$/;"	m	struct:mxc_ccm_root_slice	typeref:typename:uint32_t
targets	Makefile	/^targets := $(wildcard $(sort $(targets)))$/;"	m
targets	scripts/kconfig/mconf.c	/^	struct menu **targets;$/;"	m	struct:search_data	typeref:struct:menu **	file:
tarh	arch/powerpc/include/asm/immap_83xx.h	/^	u32 tarh;$/;"	m	struct:pex_outbound_window	typeref:typename:u32
tarl	arch/powerpc/include/asm/immap_83xx.h	/^	u32 tarl;$/;"	m	struct:pex_outbound_window	typeref:typename:u32
tas	arch/microblaze/include/asm/system.h	/^#define tas(/;"	d
tas	arch/mips/include/asm/system.h	/^#define tas(/;"	d
tas	arch/sh/include/asm/system.h	/^static inline unsigned long tas(volatile int *m)$/;"	f	typeref:typename:unsigned long
taskBar	include/mpc5xxx.h	/^	volatile u32 taskBar;		\/* SDMA + 0x00 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
taskControl	include/MCD_dma.h	/^	u16 taskControl[16];	\/* task control *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u16[16]
taskSize0	include/MCD_dma.h	/^	u32 taskSize0;		\/* task size control 0. *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
taskSize1	include/MCD_dma.h	/^	u32 taskSize1;		\/* task size control 1. *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
taskTable	arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S	/^taskTable:$/;"	l
task_pid_nr	include/linux/compat.h	/^#define task_pid_nr(/;"	d
task_pt_regs	arch/blackfin/include/asm/ptrace.h	/^#define task_pt_regs(/;"	d
task_pt_regs	arch/sh/include/asm/ptrace.h	/^#define task_pt_regs(/;"	d
task_pt_regs	arch/xtensa/include/asm/ptrace.h	/^# define task_pt_regs(/;"	d
taskbar	include/MCD_dma.h	/^	u32 taskbar;		\/* task table base address *\/$/;"	m	struct:dmaRegs_s	typeref:typename:u32
taurus_macb_hw_init	board/siemens/taurus/taurus.c	/^static void taurus_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
taurus_nand_hw_init	board/siemens/taurus/taurus.c	/^static void taurus_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
taurus_request_gpio	board/siemens/taurus/taurus.c	/^static void taurus_request_gpio(void)$/;"	f	typeref:typename:void	file:
taurus_usb_hw_init	board/siemens/corvus/board.c	/^static void taurus_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
tb0	fs/yaffs2/yaffs_guts.h	/^	u8 tb0;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb1	fs/yaffs2/yaffs_guts.h	/^	u8 tb1;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb2	fs/yaffs2/yaffs_guts.h	/^	u8 tb2;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb3	fs/yaffs2/yaffs_guts.h	/^	u8 tb3;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb4	fs/yaffs2/yaffs_guts.h	/^	u8 tb4;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb5	fs/yaffs2/yaffs_guts.h	/^	u8 tb5;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb6	fs/yaffs2/yaffs_guts.h	/^	u8 tb6;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb7	fs/yaffs2/yaffs_guts.h	/^	u8 tb7;$/;"	m	struct:yaffs_spare	typeref:typename:u8
tb_factor	arch/avr32/cpu/interrupts.c	/^static unsigned long tb_factor;$/;"	v	typeref:typename:unsigned long	file:
tbase	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbase;		\/* TX Desc Base Addr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbase	include/commproc.h	/^	ushort	tbase;		\/* Tx Buffer descriptor base address *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
tbase	include/tsec.h	/^	u32	tbase;		\/* TxBD Base Address *\/$/;"	m	struct:tsec	typeref:typename:u32
tbase	include/usb/mpc8xx_udc.h	/^	ushort tbase;	\/* TxBD base address *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
tbase	post/cpu/mpc8xx/usb.c	/^	ushort tbase;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
tbase0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tbase0;		\/* 0x24204 - Transmit Descriptor Base Address Register of Ring 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase1;         \/* 0x2420C - Transmit Descriptor base address of Ring 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase2;         \/* 0x24214 - Transmit Descriptor base address of Ring 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase3;         \/* 0x2421C - Transmit Descriptor base address of Ring 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase4;         \/* 0x24224 - Transmit Descriptor base address of Ring 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase5	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase5;         \/* 0x2422C - Transmit Descriptor base address of Ring 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase6	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase6;         \/* 0x24234 - Transmit Descriptor base address of Ring 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbase7	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbase7;         \/* 0x2423C - Transmit Descriptor base address of Ring 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbaseh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbaseh;		\/* TX Desc Base Addr High *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbaseh	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tbaseh;		\/* 0x24200 - Transmit Descriptor Base Address High Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbatr0	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr0;		\/* 0x90 Target Base Address Translation Register  0 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr0	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr0;		\/* 0x90 NA *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr0a	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr0a;		\/* 0x64 Target Base Address Translation Register  0 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr0a	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr0a;		\/* 0x64 Target Base Adr Translation 0 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr1	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr1;		\/* 0x94 Target Base Address Translation Register  1 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr1;		\/* 0x94 NA *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr1a	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr1a;		\/* 0x68 Target Base Address Translation Register  1 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr1a	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr1a;		\/* 0x68 Target Base Adr Translation 1 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr2	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr2;		\/* 0x98 Target Base Address Translation Register  2 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr2;		\/* 0x98 NA *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr3	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr3;		\/* 0x9c Target Base Address Translation Register  3 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr3	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr3;		\/* 0x9c NA *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr4	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr4;		\/* 0xa0 Target Base Address Translation Register  4 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr4	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr4;		\/* 0xa0 NA *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr5	arch/m68k/include/asm/immap_5445x.h	/^	u32 tbatr5;		\/* 0xa4 Target Base Address Translation Register  5 *\/$/;"	m	struct:pci	typeref:typename:u32
tbatr5	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tbatr5;		\/* 0xa4 NA *\/$/;"	m	struct:pci	typeref:typename:u32
tbc	drivers/i2c/i2c-uniphier-f.c	/^	u32 tbc;			\/* Tx byte count setting *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
tbca	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbca;		\/* TX Broadcast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbca	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tbca;		\/* 0x246ec - Transmit Broadcast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbca	drivers/qe/uec.h	/^	u32 tbca;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
tbca	include/fsl_dtsec.h	/^	u32	tbca;		\/* Transmit broadcast packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
tbca	include/linux/immap_qe.h	/^	u32 tbca;		\/* Total number of frames transmitted$/;"	m	struct:ucc_ethernet	typeref:typename:u32
tbca	include/tsec.h	/^	u32	tbca;		\/* Transmit Broadcast Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tbclkdivr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbclkdivr;	\/* Time Base Clock Divider Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tbcm	drivers/i2c/i2c-uniphier-f.c	/^	u32 tbcm;			\/* Tx byte count monitor *\/$/;"	m	struct:uniphier_fi2c_regs	typeref:typename:u32	file:
tbcnt	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tbcnt;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
tbcnt	include/usb/mpc8xx_udc.h	/^	ushort tbcnt;	\/* Transmit internal bye count *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
tbcnt	post/cpu/mpc8xx/usb.c	/^	ushort tbcnt;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
tbctl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tbctl;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
tbd	drivers/net/mpc512x_fec.h	/^	FEC_TBD tbd[FEC_TBD_NUM];			\/* TBD ring *\/$/;"	m	struct:__anonf8b8c0fc0408	typeref:typename:FEC_TBD[]
tbdBase	drivers/net/mpc5xxx_fec.h	/^	FEC_TBD *tbdBase;		\/* TBD ring *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:FEC_TBD *
tbdIndex	drivers/net/mpc512x_fec.h	/^	u16 tbdIndex;			\/* next transmit BD to send *\/$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:u16
tbdIndex	drivers/net/mpc5xxx_fec.h	/^	uint16 tbdIndex;		\/* next transmit BD to send *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:uint16
tbd_base	drivers/net/fec_mxc.h	/^	struct fec_bd *tbd_base;	\/* TBD ring *\/$/;"	m	struct:fec_priv	typeref:struct:fec_bd *
tbd_index	drivers/net/fec_mxc.h	/^	int tbd_index;			\/* next transmit BD to write *\/$/;"	m	struct:fec_priv	typeref:typename:int
tbdbph	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tbdbph;	        \/* 0x2417c - Transmit Data Buffer Pointer High Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbdlen	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbdlen;		\/* TX Buffer Desc Data Len *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbdlen	include/tsec.h	/^	u32	tbdlen;		\/* Tx BD Data Length *\/$/;"	m	struct:tsec	typeref:typename:u32
tbdr	drivers/spi/fsl_qspi.h	/^	u32 tbdr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
tbi0	arch/arm/dts/ls1021a-qds.dtsi	/^	tbi0: tbi-phy@8 {$/;"	l
tbi1	arch/arm/dts/ls1021a-twr.dtsi	/^	tbi1: tbi-phy@1f {$/;"	l
tbi_compatibility_en	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tbi_compatibility_en;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
tbi_compatibility_en	drivers/net/e1000.h	/^	bool tbi_compatibility_en;$/;"	m	struct:e1000_hw	typeref:typename:bool
tbi_compatibility_on	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tbi_compatibility_on;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
tbi_compatibility_on	drivers/net/e1000.h	/^	bool tbi_compatibility_on;$/;"	m	struct:e1000_hw	typeref:typename:bool
tbiaddr	include/tsec.h	/^	uint tbiaddr;$/;"	m	struct:tsec_private	typeref:typename:uint
tbipa	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbipa;		\/* TBI PHY Addr *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbipa	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tbipa;		\/* 0x24030 - TBI PHY Address Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbipa	include/fsl_dtsec.h	/^	u32	tbipa;		\/* TBI PHY address *\/$/;"	m	struct:dtsec	typeref:typename:u32
tbipa	include/tsec.h	/^	u32	tbipa;		\/* TBI PHY Address *\/$/;"	m	struct:tsec	typeref:typename:u32
tbl	arch/arm/include/asm/global_data.h	/^	unsigned long tbl;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tbl_addr	include/ahci.h	/^	u32	tbl_addr;$/;"	m	struct:ahci_cmd_hdr	typeref:typename:u32
tbl_addr_hi	include/ahci.h	/^	u32	tbl_addr_hi;$/;"	m	struct:ahci_cmd_hdr	typeref:typename:u32
tboot_addr	arch/x86/include/asm/bootparam.h	/^	__u64  tboot_addr;				\/* 0x058 *\/$/;"	m	struct:boot_params	typeref:typename:__u64
tbphs	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tbphs;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
tbphshr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tbphshr;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
tbpr	include/mpc5xxx.h	/^	volatile u8  tbpr;              \/* 0x19 *\/      \/* This register is not applicable for recei/;"	m	struct:mscan_buffer	typeref:typename:volatile u8
tbprd	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tbprd;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
tbptr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbptr;		\/* TX Buffer Desc Ptr Low *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbptr	include/commproc.h	/^	ushort	tbptr;		\/* Tx BD pointer *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
tbptr	include/tsec.h	/^	u32	tbptr;		\/* TxBD Pointer *\/$/;"	m	struct:tsec	typeref:typename:u32
tbptr	include/usb/mpc8xx_udc.h	/^	ushort tbptr;	\/* TxBD pointer Next Buffer Descriptor  *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
tbptr	post/cpu/mpc8xx/usb.c	/^	ushort tbptr;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
tbptr0	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr0;         \/* 0x24184 - Transmit Buffer Descriptor Pointer for Ring 0 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr1	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr1;         \/* 0x2418C - Transmit Buffer Descriptor Pointer for Ring 1 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr2	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr2;         \/* 0x24194 - Transmit Buffer Descriptor Pointer for Ring 2 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr3	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr3;         \/* 0x2419C - Transmit Buffer Descriptor Pointer for Ring 3 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr4	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr4;         \/* 0x241A4 - Transmit Buffer Descriptor Pointer for Ring 4 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr5	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr5;         \/* 0x241AC - Transmit Buffer Descriptor Pointer for Ring 5 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr6	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr6;         \/* 0x241B4 - Transmit Buffer Descriptor Pointer for Ring 6 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptr7	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tbptr7;         \/* 0x241BC - Transmit Buffer Descriptor Pointer for Ring 7 *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbptrh	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbptrh;		\/* TX Buffer Desc Ptr High *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbr	drivers/watchdog/xilinx_tb_wdt.c	/^	u32 tbr; \/* 0x8 *\/$/;"	m	struct:watchdog_regs	typeref:typename:u32	file:
tbr_name	common/bedbug.c	/^char *tbr_name (int value)$/;"	f	typeref:typename:char *
tbr_rbr	drivers/spi/sh_spi.h	/^	unsigned long tbr_rbr;$/;"	m	struct:sh_spi_regs	typeref:typename:unsigned long
tbr_value	common/bedbug.c	/^int tbr_value (char *name)$/;"	f	typeref:typename:int
tbrinit	arch/sparc/cpu/leon3/start.S	/^tbrinit:$/;"	l
tbsr	drivers/spi/fsl_qspi.h	/^	u32 tbsr;$/;"	m	struct:fsl_qspi_regs	typeref:typename:u32
tbst_int_interval	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tbst_int_interval;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tbsts	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tbsts;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
tbu	arch/arm/include/asm/global_data.h	/^	unsigned long tbu;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tbyt	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tbyt;		\/* TX Byte Counter Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tbyt	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tbyt;		\/* 0x246e0 - Transmit Byte Counter Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tbyt	include/fsl_dtsec.h	/^	u32	tbyt;		\/* Transmit byte counter *\/$/;"	m	struct:dtsec	typeref:typename:u32
tbyt	include/tsec.h	/^	u32	tbyt;		\/* Transmit Byte Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tc	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 tc;			\/* Timer Counter		*\/$/;"	m	struct:timer_regs	typeref:typename:u32
tc	arch/arm/mach-at91/include/mach/at91_tc.h	/^	at91_tcc_t	tc[3];	\/* 0x00 TC Channel 0-2 *\/$/;"	m	struct:at91_tc	typeref:typename:at91_tcc_t[3]
tc	drivers/mtd/nand/lpc32xx_nand_slc.c	/^	u32 tc;$/;"	m	struct:lpc32xx_nand_slc_regs	typeref:typename:u32	file:
tc	drivers/net/xilinx_axi_emac.c	/^	u32 tc; \/* 0x408: Tx Configuration *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
tc0_clk	arch/arm/dts/at91sam9260.dtsi	/^					tc0_clk: tc0_clk {$/;"	l
tc0_clk	arch/arm/dts/at91sam9261.dtsi	/^					tc0_clk: tc0_clk {$/;"	l
tc1_clk	arch/arm/dts/at91sam9260.dtsi	/^					tc1_clk: tc1_clk {$/;"	l
tc1_clk	arch/arm/dts/at91sam9261.dtsi	/^					tc1_clk: tc1_clk {$/;"	l
tc2_clk	arch/arm/dts/at91sam9260.dtsi	/^					tc2_clk: tc2_clk {$/;"	l
tc2_clk	arch/arm/dts/at91sam9261.dtsi	/^					tc2_clk: tc2_clk {$/;"	l
tc3_clk	arch/arm/dts/at91sam9260.dtsi	/^					tc3_clk: tc3_clk {$/;"	l
tc4_clk	arch/arm/dts/at91sam9260.dtsi	/^					tc4_clk: tc4_clk {$/;"	l
tc5_clk	arch/arm/dts/at91sam9260.dtsi	/^					tc5_clk: tc5_clk {$/;"	l
tc_ccc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_ccc;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_cdsmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_cdsmr;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_cfg	include/fsl-mc/fsl_dpni.h	/^	} tc_cfg[DPNI_MAX_TC];$/;"	m	struct:dpni_extended_cfg	typeref:struct:dpni_extended_cfg::__anonf56ef98e0108[]
tc_ecc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_ecc;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_fcc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_fcc;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_icc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_icc;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_rcc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_rcc;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_tcc	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_tcc;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_tcer	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_tcer;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_tcger	arch/powerpc/include/asm/immap_8260.h	/^	ushort		tc_tcger;$/;"	m	struct:immap	typeref:typename:ushort
tc_tcgsr	arch/powerpc/include/asm/immap_8260.h	/^	ushort		tc_tcgsr;$/;"	m	struct:immap	typeref:typename:ushort
tc_tcmode	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_tcmode;$/;"	m	struct:tclayer	typeref:typename:ushort
tc_tcmr	arch/powerpc/include/asm/immap_8260.h	/^	ushort	tc_tcmr;$/;"	m	struct:tclayer	typeref:typename:ushort
tca6416_u26	arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts	/^	tca6416_u26: gpio@20 {$/;"	l
tca6416_u61	arch/arm/dts/zynqmp-zcu102.dts	/^	tca6416_u61: gpio@21 { \/* FIXME enable it by i2c mw 21 6 0 *\/$/;"	l
tca6416_u97	arch/arm/dts/zynqmp-zcu102.dts	/^	tca6416_u97: gpio@20 {$/;"	l
tca642x_bank_info	include/tca642x.h	/^struct tca642x_bank_info {$/;"	s
tca642x_get_val	drivers/gpio/tca642x.c	/^int tca642x_get_val(uchar chip, uint8_t gpio_bank)$/;"	f	typeref:typename:int
tca642x_info	drivers/gpio/tca642x.c	/^static int tca642x_info(uchar chip)$/;"	f	typeref:typename:int	file:
tca642x_init	board/ti/omap5_uevm/evm.c	/^struct tca642x_bank_info tca642x_init[] = {$/;"	v	typeref:struct:tca642x_bank_info[]
tca642x_reg_read	drivers/gpio/tca642x.c	/^static int tca642x_reg_read(uchar chip, uint8_t addr, uint8_t *data)$/;"	f	typeref:typename:int	file:
tca642x_reg_write	drivers/gpio/tca642x.c	/^static int tca642x_reg_write(uchar chip, uint8_t addr,$/;"	f	typeref:typename:int	file:
tca642x_regs	drivers/gpio/tca642x.c	/^struct tca642x_bank_info tca642x_regs[] = {$/;"	v	typeref:struct:tca642x_bank_info[]
tca642x_set_dir	drivers/gpio/tca642x.c	/^int tca642x_set_dir(uchar chip, uint8_t gpio_bank,$/;"	f	typeref:typename:int
tca642x_set_inital_state	drivers/gpio/tca642x.c	/^int tca642x_set_inital_state(uchar chip, struct tca642x_bank_info init_data[])$/;"	f	typeref:typename:int
tca642x_set_pol	drivers/gpio/tca642x.c	/^int tca642x_set_pol(uchar chip, uint8_t gpio_bank,$/;"	f	typeref:typename:int
tca642x_set_val	drivers/gpio/tca642x.c	/^int tca642x_set_val(uchar chip, uint8_t gpio_bank,$/;"	f	typeref:typename:int
tcam	drivers/net/mvpp2.c	/^	union mvpp2_prs_tcam_entry tcam;$/;"	m	struct:mvpp2_prs_entry	typeref:union:mvpp2_prs_tcam_entry	file:
tcan	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct tcan {$/;"	s
tcan5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} tcan5xx_t;$/;"	t	typeref:struct:tcan
tcan_canctrl0	arch/powerpc/include/asm/5xx_immap.h	/^	u_char tcan_canctrl0;$/;"	m	struct:tcan	typeref:typename:u_char
tcan_canctrl1	arch/powerpc/include/asm/5xx_immap.h	/^	u_char tcan_canctrl1;$/;"	m	struct:tcan	typeref:typename:u_char
tcan_canctrl2	arch/powerpc/include/asm/5xx_immap.h	/^	u_char tcan_canctrl2;$/;"	m	struct:tcan	typeref:typename:u_char
tcan_canicr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_canicr;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_cantcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_cantcr;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_estat	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_estat;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_iflag	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_iflag;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_imask	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_imask;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_mbuff	arch/powerpc/include/asm/5xx_immap.h	/^	    } tcan_mbuff[16];$/;"	m	struct:tcan	typeref:struct:tcan::__anon8cdce8f20108[16]
tcan_presdiv	arch/powerpc/include/asm/5xx_immap.h	/^	u_char tcan_presdiv;$/;"	m	struct:tcan	typeref:typename:u_char
tcan_rx14mskhi	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_rx14mskhi;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_rx14msklo	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_rx14msklo;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_rx15mskhi	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_rx15mskhi;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_rx15msklo	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_rx15msklo;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_rxectr	arch/powerpc/include/asm/5xx_immap.h	/^	u_char tcan_rxectr;$/;"	m	struct:tcan	typeref:typename:u_char
tcan_rxgmskhi	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_rxgmskhi;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_rxgmsklo	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_rxgmsklo;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_tcnmcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_tcnmcr;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_timer	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tcan_timer;$/;"	m	struct:tcan	typeref:typename:ushort
tcan_txectr	arch/powerpc/include/asm/5xx_immap.h	/^	u_char tcan_txectr;$/;"	m	struct:tcan	typeref:typename:u_char
tcar1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tcar1;		\/* offset 0x50 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tcar1	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tcar1;	\/* 0x3c r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcar1	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tcar1;		\/* 0x3c r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcar1	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tcar1;		\/* 0x50 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcar1	drivers/timer/omap-timer.c	/^	unsigned int tcar1;		\/* offset 0x50 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tcar2	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tcar2;		\/* offset 0x58 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tcar2	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tcar2;	\/* 0x44 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcar2	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tcar2;		\/* 0x44 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcar2	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tcar2;		\/* 0x58 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcar2	drivers/timer/omap-timer.c	/^	unsigned int tcar2;		\/* offset 0x58 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tcb0	arch/arm/dts/at91sam9260.dtsi	/^			tcb0: timer@fffa0000 {$/;"	l
tcb0	arch/arm/dts/at91sam9261.dtsi	/^			tcb0: timer@fffa0000 {$/;"	l
tcb0	arch/arm/dts/at91sam9263.dtsi	/^			tcb0: timer@fff7c000 {$/;"	l
tcb0	arch/arm/dts/at91sam9g45.dtsi	/^			tcb0: timer@fff7c000 {$/;"	l
tcb0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					tcb0_clk: tcb0_clk {$/;"	l
tcb0_clk	arch/arm/dts/sama5d2.dtsi	/^					tcb0_clk: tcb0_clk@35 {$/;"	l
tcb0_gclk	arch/arm/dts/sama5d2.dtsi	/^					tcb0_gclk: tcb0_gclk@35 {$/;"	l
tcb1	arch/arm/dts/at91sam9260.dtsi	/^			tcb1: timer@fffdc000 {$/;"	l
tcb1	arch/arm/dts/at91sam9g45.dtsi	/^			tcb1: timer@fffd4000 {$/;"	l
tcb1_clk	arch/arm/dts/sama5d2.dtsi	/^					tcb1_clk: tcb1_clk@36 {$/;"	l
tcb1_gclk	arch/arm/dts/sama5d2.dtsi	/^					tcb1_gclk: tcb1_gclk@36 {$/;"	l
tcb_clk	arch/arm/dts/at91sam9263.dtsi	/^					tcb_clk: tcb_clk {$/;"	l
tccd	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tccd;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tccdl_min	include/ddr_spd.h	/^	uint8_t tccdl_min;		\/* 40 tCCS_Lmin, MTB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tccdl_ps	include/common_timing_params.h	/^	unsigned int tccdl_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tccdl_ps	include/fsl_ddr_dimm_params.h	/^	int tccdl_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
tcd	arch/m68k/include/asm/coldfire/edma.h	/^	tcd_st tcd[16];$/;"	m	struct:tcd_multiple	typeref:typename:tcd_st[16]
tcd_ctrl	arch/m68k/include/asm/coldfire/edma.h	/^typedef struct tcd_ctrl {$/;"	s
tcd_multiple	arch/m68k/include/asm/coldfire/edma.h	/^typedef struct tcd_multiple {$/;"	s
tcd_st	arch/m68k/include/asm/coldfire/edma.h	/^} tcd_st;$/;"	t	typeref:struct:tcd_ctrl
tcd_t	arch/m68k/include/asm/coldfire/edma.h	/^} tcd_t;$/;"	t	typeref:struct:tcd_multiple
tcdlr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	tcdlr;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
tcfg0	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcfg0;$/;"	m	struct:s3c24x0_timers	typeref:typename:u32
tcfg0	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcfg0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcfg0	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcfg0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcfg1	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcfg1;$/;"	m	struct:s3c24x0_timers	typeref:typename:u32
tcfg1	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcfg1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcfg1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcfg1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tchsh_ns	drivers/spi/cadence_qspi.h	/^	u32		tchsh_ns;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
tcicr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tcicr;		\/* offset 0x30 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tcicr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tcicr;	\/* 0x40 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcicr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tcicr;		\/* 0x40 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcicr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tcicr;		\/* 0x54 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcicr	drivers/timer/omap-timer.c	/^	unsigned int tcicr;		\/* offset 0x30 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tck	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int tck;$/;"	m	struct:pad_signals	typeref:typename:int
tck	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int tck;$/;"	m	struct:pad_signals	typeref:typename:int
tck_max	include/ddr_spd.h	/^	uint8_t tck_max;		\/* 19 TCKAVGmax *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tck_min	include/ddr_spd.h	/^	uint8_t tck_min;		\/* 18 tCKAVGmin *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tck_min	include/ddr_spd.h	/^	unsigned char tck_min;         \/* 12 SDRAM Minimum Cycle Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
tcke	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tcke;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tcke	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tcke;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tcke	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcke;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tcke	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcke;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tcke	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tcke;		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcke	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 tcke;		\/* 0x94: EMC_TCKE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
tcke	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tcke;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tcke	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tcke;		\/* 0x12c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tckesr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tckesr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tckesr	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tckesr;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tckesr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tckesr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tckesr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tckesr;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tckesr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tckesr;		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tckesr	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tckesr;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tckesr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tckesr;		\/* 0x140 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tckmax	include/ddr_spd.h	/^	unsigned char tckmax;      \/* 43 Max device cycle time tCKmax *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
tckmax	include/ddr_spd.h	/^	unsigned char tckmax;      \/* 43 Max device cycle time tCKmax *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
tckmax	include/spd.h	/^	unsigned char tckmax;      \/* 43 Max device cycle time tCKmax *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
tckmax_ps	include/common_timing_params.h	/^	unsigned int tckmax_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tckmax_ps	include/fsl_ddr_dimm_params.h	/^	int tckmax_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
tckmin_x_minus_1_ps	include/fsl_ddr_dimm_params.h	/^	int tckmin_x_minus_1_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
tckmin_x_minus_2_ps	include/fsl_ddr_dimm_params.h	/^	int tckmin_x_minus_2_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
tckmin_x_ps	include/common_timing_params.h	/^	unsigned int tckmin_x_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tckmin_x_ps	include/fsl_ddr_dimm_params.h	/^	int tckmin_x_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
tcksre	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tcksre;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tcksre	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tcksre;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tcksre	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcksre;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tcksre	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcksre;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tcksre	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tcksre;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcksre	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tcksre;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcksrx	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tcksrx;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tcksrx	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tcksrx;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tcksrx	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcksrx;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tcksrx	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcksrx;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tcksrx	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tcksrx;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcksrx	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tcksrx;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tcl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tcl	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tcl;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tcl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tcl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcl;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tcl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tcl;		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tcl;		\/* 0xe8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tclayer	arch/powerpc/include/asm/immap_8260.h	/^typedef struct tclayer {$/;"	s
tclayer_t	arch/powerpc/include/asm/immap_8260.h	/^} tclayer_t;$/;"	t	typeref:struct:tclayer
tclk	board/Synology/ds109/ds109.h	/^	u32 tclk;$/;"	m	struct:tag_mv_uboot	typeref:typename:u32
tclk	drivers/net/mvpp2.c	/^	u32 tclk;$/;"	m	struct:mvpp2	typeref:typename:u32	file:
tclkin_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	tclkin_ck: tclkin_ck {$/;"	l
tclkin_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	tclkin_ck: tclkin_ck {$/;"	l
tclkstable	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 tclkstable;		\/* 0xA0: EMC_TCLKSTABLE *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
tclkstop	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 tclkstop;		\/* 0xA4: EMC_TCLKSTOP *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
tclr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tclr;		\/* offset 0x38 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tclr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tclr;	\/* 0x24 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tclr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tclr;		\/* 0x24 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tclr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tclr;		\/* 0x38 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tclr	drivers/timer/omap-timer.c	/^	unsigned int tclr;		\/* offset 0x38 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tcmdr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tcmdr[4];		\/* Generic Tightly Coupled Memory Descriptor Register   *\/$/;"	m	struct:mscm_ir	typeref:typename:u32[4]
tcmpb	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcmpb;$/;"	m	struct:s3c24x0_timer	typeref:typename:u32
tcmpb0	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcmpb0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmpb0	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcmpb0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmpb1	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcmpb1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmpb1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcmpb1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmpb2	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcmpb2;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmpb2	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcmpb2;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmpb3	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcmpb3;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcmr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		tcmr;$/;"	m	struct:at91_matrix	typeref:typename:u32
tcmr	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	tcmr;$/;"	m	struct:at91_matrix	typeref:typename:u32
tcn	arch/m68k/include/asm/timer.h	/^	u16 tcn;		\/* 0x0C Counter register *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
tcn1	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcn1;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcn2	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcn2;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcn3	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcn3;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcn4	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcn4;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcnp	examples/standalone/timer.c	/^  ushort	*tcnp;		\/* Pointer to Timer Counter Register	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:ushort *	file:
tcnt	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tcnt;		\/* 0x00 *\/$/;"	m	struct:slt	typeref:typename:u32
tcnt0	include/sh_tmu.h	/^	u32	tcnt0;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcnt0	include/sh_tmu.h	/^	u32 tcnt0;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcnt1	include/sh_tmu.h	/^	u32	tcnt1;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcnt1	include/sh_tmu.h	/^	u32 tcnt1;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcnt2	include/sh_tmu.h	/^	u32	tcnt2;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcnt2	include/sh_tmu.h	/^	u32 tcnt2;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcntb	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcntb;$/;"	m	struct:s3c24x0_timer	typeref:typename:u32
tcntb0	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcntb0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb0	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcntb0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb1	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcntb1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcntb1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb2	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcntb2;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb2	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcntb2;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb3	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcntb3;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb3	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcntb3;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcntb4;$/;"	m	struct:s3c24x0_timers	typeref:typename:u32
tcntb4	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcntb4;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcntb4	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcntb4;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcnto;$/;"	m	struct:s3c24x0_timer	typeref:typename:u32
tcnto0	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcnto0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto0	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcnto0;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto1	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcnto1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto1	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcnto1;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto2	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcnto2;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto2	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcnto2;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto3	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcnto3;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto3	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcnto3;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto4	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcnto4;$/;"	m	struct:s3c24x0_timers	typeref:typename:u32
tcnto4	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcnto4;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcnto4	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcnto4;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tco1_sts	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t tco1_sts;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
tco2_sts	arch/x86/include/asm/arch-broadwell/pm.h	/^	uint16_t tco2_sts;$/;"	m	struct:chipset_power_state	typeref:typename:uint16_t
tcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tcon;$/;"	m	struct:s3c24x0_timers	typeref:typename:u32
tcon	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tcon;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcon	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tcon;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tcon0	arch/arm/dts/sun5i-a13.dtsi	/^		tcon0: lcd-controller@01c0c000 {$/;"	l
tcon0_ch0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		tcon0_ch0_clk: clk@01c20118 {$/;"	l
tcon0_ch0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		tcon0_ch0_clk: clk@01c20118 {$/;"	l
tcon0_ch1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		tcon0_ch1_clk: clk@01c2012c {$/;"	l
tcon0_ch1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		tcon0_ch1_clk: clk@01c2012c {$/;"	l
tcon0_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 tcon0_clk_cfg;	\/* 0x118 TCON0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
tcon0_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 tcon0_clk_cfg;	\/* 0x118 TCON0 module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
tcon0_cpu_intf	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_cpu_intf;		\/* 0x60 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_intf	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_cpu_intf;		\/* 0x60 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_intf	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_cpu_intf;		\/* 0x60 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_intf	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_cpu_intf;		\/* 0x60 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_cpu_rd_dat0;		\/* 0x68 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat0	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_cpu_rd_dat0;		\/* 0x68 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat0	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_cpu_rd_dat0;		\/* 0x68 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat0	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_cpu_rd_dat0;		\/* 0x68 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_cpu_rd_dat1;		\/* 0x6c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_cpu_rd_dat1;		\/* 0x6c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat1	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_cpu_rd_dat1;		\/* 0x6c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_rd_dat1	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_cpu_rd_dat1;		\/* 0x6c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_wr_dat	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_cpu_wr_dat;		\/* 0x64 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_wr_dat	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_cpu_wr_dat;		\/* 0x64 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_wr_dat	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_cpu_wr_dat;		\/* 0x64 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_cpu_wr_dat	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_cpu_wr_dat;		\/* 0x64 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_ctrl;			\/* 0x40 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ctrl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_ctrl;			\/* 0x40 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_ctrl;			\/* 0x40 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ctrl	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_ctrl;			\/* 0x40 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_dclk	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_dclk;			\/* 0x44 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_dclk	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_dclk;			\/* 0x44 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_dclk	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_dclk;			\/* 0x44 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_dclk	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_dclk;			\/* 0x44 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_frm_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_frm_ctrl;		\/* 0x10 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_frm_ctrl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_frm_ctrl;		\/* 0x10 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_frm_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_frm_ctrl;		\/* 0x10 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_frm_ctrl	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_frm_ctrl;		\/* 0x10 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_frm_seed	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_frm_seed[6];		\/* 0x14 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[6]
tcon0_frm_seed	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_frm_seed[6];		\/* 0x14 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[6]
tcon0_frm_seed	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_frm_seed[6];		\/* 0x14 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[6]
tcon0_frm_seed	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_frm_seed[6];		\/* 0x14 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[6]
tcon0_frm_table	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_frm_table[4];		\/* 0x2c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[4]
tcon0_frm_table	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_frm_table[4];		\/* 0x2c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[4]
tcon0_frm_table	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_frm_table[4];		\/* 0x2c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[4]
tcon0_frm_table	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_frm_table[4];		\/* 0x2c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32[4]
tcon0_hv_intf	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_hv_intf;		\/* 0x58 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_hv_intf	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_hv_intf;		\/* 0x58 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_hv_intf	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_hv_intf;		\/* 0x58 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_hv_intf	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_hv_intf;		\/* 0x58 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_in	arch/arm/dts/sun5i-a13.dtsi	/^				tcon0_in: port@0 {$/;"	l	label:tcon0
tcon0_in_be0	arch/arm/dts/sun5i-a13.dtsi	/^					tcon0_in_be0: endpoint@0 {$/;"	l	label:tcon0.tcon0_in
tcon0_io_polarity	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_io_polarity;		\/* 0x88 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_polarity	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_io_polarity;		\/* 0x88 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_polarity	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_io_polarity;		\/* 0x88 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_polarity	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_io_polarity;		\/* 0x88 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_tristate	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_io_tristate;		\/* 0x8c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_tristate	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_io_tristate;		\/* 0x8c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_tristate	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_io_tristate;		\/* 0x8c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_io_tristate	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_io_tristate;		\/* 0x8c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_lvds_intf	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_lvds_intf;		\/* 0x84 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_lvds_intf	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_lvds_intf;		\/* 0x84 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_lvds_intf	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_lvds_intf;		\/* 0x84 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_lvds_intf	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_lvds_intf;		\/* 0x84 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_out	arch/arm/dts/sun5i-a13.dtsi	/^				tcon0_out: port@1 {$/;"	l	label:tcon0
tcon0_out_lcd	arch/arm/dts/sun5i-a13-q8-tablet.dts	/^	tcon0_out_lcd: endpoint@0 {$/;"	l
tcon0_out_tve0	arch/arm/dts/sun5i-r8.dtsi	/^	tcon0_out_tve0: endpoint@1 {$/;"	l
tcon0_timing_active	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_timing_active;	\/* 0x48 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_active	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_timing_active;	\/* 0x48 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_active	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_timing_active;	\/* 0x48 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_active	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_timing_active;	\/* 0x48 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_h	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_timing_h;		\/* 0x4c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_h	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_timing_h;		\/* 0x4c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_h	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_timing_h;		\/* 0x4c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_h	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_timing_h;		\/* 0x4c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_sync	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_timing_sync;		\/* 0x54 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_sync	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_timing_sync;		\/* 0x54 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_sync	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_timing_sync;		\/* 0x54 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_sync	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_timing_sync;		\/* 0x54 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_v	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_timing_v;		\/* 0x50 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_v	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_timing_v;		\/* 0x50 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_v	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_timing_v;		\/* 0x50 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_timing_v	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_timing_v;		\/* 0x50 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_ttl_timing0;		\/* 0x70 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing0	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_ttl_timing0;		\/* 0x70 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing0	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_ttl_timing0;		\/* 0x70 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing0	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_ttl_timing0;		\/* 0x70 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_ttl_timing1;		\/* 0x74 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_ttl_timing1;		\/* 0x74 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing1	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_ttl_timing1;		\/* 0x74 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing1	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_ttl_timing1;		\/* 0x74 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing2	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_ttl_timing2;		\/* 0x78 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing2	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_ttl_timing2;		\/* 0x78 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing2	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_ttl_timing2;		\/* 0x78 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing2	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_ttl_timing2;		\/* 0x78 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing3	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_ttl_timing3;		\/* 0x7c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing3	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_ttl_timing3;		\/* 0x7c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing3	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_ttl_timing3;		\/* 0x7c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing3	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_ttl_timing3;		\/* 0x7c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing4	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon0_ttl_timing4;		\/* 0x80 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing4	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon0_ttl_timing4;		\/* 0x80 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing4	arch/arm/include/asm/arch/display.h	/^	u32 tcon0_ttl_timing4;		\/* 0x80 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon0_ttl_timing4	arch/arm/include/asm/arch/display2.h	/^	u32 tcon0_ttl_timing4;		\/* 0x80 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_ch0_clk	arch/arm/dts/sun4i-a10.dtsi	/^		tcon1_ch0_clk: clk@01c2011c {$/;"	l
tcon1_ch0_clk	arch/arm/dts/sun7i-a20.dtsi	/^		tcon1_ch0_clk: clk@01c2011c {$/;"	l
tcon1_ch1_clk	arch/arm/dts/sun4i-a10.dtsi	/^		tcon1_ch1_clk: clk@01c20130 {$/;"	l
tcon1_ch1_clk	arch/arm/dts/sun7i-a20.dtsi	/^		tcon1_ch1_clk: clk@01c20130 {$/;"	l
tcon1_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_ctrl;			\/* 0x90 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_ctrl	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_ctrl;			\/* 0x90 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_ctrl;			\/* 0x90 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_ctrl	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_ctrl;			\/* 0x90 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_polarity	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_io_polarity;		\/* 0xf0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_polarity	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_io_polarity;		\/* 0xf0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_polarity	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_io_polarity;		\/* 0xf0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_polarity	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_io_polarity;		\/* 0xf0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_tristate	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_io_tristate;		\/* 0xf4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_tristate	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_io_tristate;		\/* 0xf4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_tristate	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_io_tristate;		\/* 0xf4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_io_tristate	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_io_tristate;		\/* 0xf4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_h	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_timing_h;		\/* 0xa0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_h	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_timing_h;		\/* 0xa0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_h	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_timing_h;		\/* 0xa0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_h	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_timing_h;		\/* 0xa0 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_out	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_timing_out;		\/* 0x9c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_out	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_timing_out;		\/* 0x9c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_out	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_timing_out;		\/* 0x9c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_out	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_timing_out;		\/* 0x9c *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_scale	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_timing_scale;		\/* 0x98 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_scale	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_timing_scale;		\/* 0x98 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_scale	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_timing_scale;		\/* 0x98 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_scale	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_timing_scale;		\/* 0x98 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_source	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_timing_source;	\/* 0x94 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_source	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_timing_source;	\/* 0x94 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_source	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_timing_source;	\/* 0x94 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_source	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_timing_source;	\/* 0x94 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_sync	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_timing_sync;		\/* 0xa8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_sync	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_timing_sync;		\/* 0xa8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_sync	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_timing_sync;		\/* 0xa8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_sync	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_timing_sync;		\/* 0xa8 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_v	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 tcon1_timing_v;		\/* 0xa4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_v	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 tcon1_timing_v;		\/* 0xa4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_v	arch/arm/include/asm/arch/display.h	/^	u32 tcon1_timing_v;		\/* 0xa4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon1_timing_v	arch/arm/include/asm/arch/display2.h	/^	u32 tcon1_timing_v;		\/* 0xa4 *\/$/;"	m	struct:sunxi_lcdc_reg	typeref:typename:u32
tcon_ch0_clk	arch/arm/dts/sun5i-a13.dtsi	/^		tcon_ch0_clk: clk@01c20118 {$/;"	l
tcon_ch1_clk	arch/arm/dts/sun5i-a13.dtsi	/^		tcon_ch1_clk: clk@01c2012c {$/;"	l
tcor0	include/sh_tmu.h	/^	u32	tcor0;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcor0	include/sh_tmu.h	/^	u32 tcor0;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcor1	include/sh_tmu.h	/^	u32	tcor1;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcor1	include/sh_tmu.h	/^	u32 tcor1;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcor2	include/sh_tmu.h	/^	u32	tcor2;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcor2	include/sh_tmu.h	/^	u32 tcor2;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcount	include/commproc.h	/^	ushort	tcount;		\/* Tx byte count *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
tcp_config	drivers/net/e1000.h	/^		uint32_t tcp_config;$/;"	m	union:e1000_context_desc::__anon7fc27345160a	typeref:typename:uint32_t
tcp_fields	drivers/net/e1000.h	/^		} tcp_fields;$/;"	m	union:e1000_context_desc::__anon7fc27345160a	typeref:struct:e1000_context_desc::__anon7fc27345160a::__anon7fc273451708
tcp_ip_status	drivers/net/pch_gbe.h	/^	u32 tcp_ip_status;$/;"	m	struct:pch_gbe_rx_desc	typeref:typename:u32
tcp_seg_setup	drivers/net/e1000.h	/^	} tcp_seg_setup;$/;"	m	struct:e1000_context_desc	typeref:union:e1000_context_desc::__anon7fc27345180a
tcpip_acc	drivers/net/pch_gbe.h	/^	u32 tcpip_acc;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tcpr2	include/sh_tmu.h	/^	u32	tcpr2;$/;"	m	struct:tmu_regs	typeref:typename:u32
tcqdp	drivers/net/mvgbe.h	/^	struct mvgbe_txdesc *tcqdp[8];$/;"	m	struct:mvgbe_registers	typeref:struct:mvgbe_txdesc * [8]
tcr	arch/arm/include/asm/arch-lpc32xx/timer.h	/^	u32 tcr;		\/* Timer Control Register	*\/$/;"	m	struct:timer_regs	typeref:typename:u32
tcr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 tcr;$/;"	m	struct:at91_emac	typeref:typename:u32
tcr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		tcr;$/;"	m	struct:at91_matrix	typeref:typename:u32
tcr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	tcr;		\/* 0x10C Transmit Counter Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
tcr	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	tcr;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
tcr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 tcr;	\/* 0x08 *\/$/;"	m	struct:dspi	typeref:typename:u32
tcr	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 tcr;$/;"	m	struct:ssi	typeref:typename:u32
tcr	arch/m68k/include/asm/fec.h	/^	u32 tcr;		\/* 0x144 *\/$/;"	m	struct:fec	typeref:typename:u32
tcr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tcr;		\/* 0x0C4 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tcr	arch/m68k/include/asm/timer.h	/^	u16 tcr;		\/* 0x08 Capture register *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
tcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tcr;		\/* Timer Control *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
tcr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tcr;		\/* 0x41300 - Timer Control Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
tcr	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 tcr;	\/* Tri-State Control *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
tcr	drivers/mmc/fsl_esdhc.c	/^	uint    tcr;		\/* Tuning control register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
tcr	drivers/usb/eth/r8152.c	/^	unsigned short tcr;$/;"	m	struct:r8152_version	typeref:typename:unsigned short	file:
tcr	include/fsl_dspi.h	/^	u32 tcr;	\/* 0x08 *\/$/;"	m	struct:dspi	typeref:typename:u32
tcr0	include/sh_tmu.h	/^	u16	tcr0;$/;"	m	struct:tmu_regs	typeref:typename:u16
tcr0	include/sh_tmu.h	/^	u16 tcr0;$/;"	m	struct:tmu_regs	typeref:typename:u16
tcr1	arch/m68k/include/asm/immap_5445x.h	/^	u32 tcr1;		\/* 0x6c Target Control 1 Register *\/$/;"	m	struct:pci	typeref:typename:u32
tcr1	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tcr1;		\/* 0x6c Target Control 1 Register *\/$/;"	m	struct:pci	typeref:typename:u32
tcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcr1;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcr1	include/sh_tmu.h	/^	u16	tcr1;$/;"	m	struct:tmu_regs	typeref:typename:u16
tcr1	include/sh_tmu.h	/^	u16 tcr1;$/;"	m	struct:tmu_regs	typeref:typename:u16
tcr2	arch/m68k/include/asm/immap_5445x.h	/^	u32 tcr2;		\/* 0x8c Target Control 2 Register *\/$/;"	m	struct:pci	typeref:typename:u32
tcr2	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 tcr2;		\/* 0x8c NA *\/$/;"	m	struct:pci	typeref:typename:u32
tcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcr2;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcr2	include/sh_tmu.h	/^	u16	tcr2;$/;"	m	struct:tmu_regs	typeref:typename:u16
tcr2	include/sh_tmu.h	/^	u16 tcr2;$/;"	m	struct:tmu_regs	typeref:typename:u16
tcr3	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcr3;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcr4	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tcr4;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tcr_0	include/mpc5xxx.h	/^	volatile u16 tcr_0;		\/* SDMA + 0x1c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_1	include/mpc5xxx.h	/^	volatile u16 tcr_1;		\/* SDMA + 0x1e *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_2	include/mpc5xxx.h	/^	volatile u16 tcr_2;		\/* SDMA + 0x20 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_3	include/mpc5xxx.h	/^	volatile u16 tcr_3;		\/* SDMA + 0x22 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_4	include/mpc5xxx.h	/^	volatile u16 tcr_4;		\/* SDMA + 0x24 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_5	include/mpc5xxx.h	/^	volatile u16 tcr_5;		\/* SDMA + 0x26 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_6	include/mpc5xxx.h	/^	volatile u16 tcr_6;		\/* SDMA + 0x28 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_7	include/mpc5xxx.h	/^	volatile u16 tcr_7;		\/* SDMA + 0x2a *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_8	include/mpc5xxx.h	/^	volatile u16 tcr_8;		\/* SDMA + 0x2c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_9	include/mpc5xxx.h	/^	volatile u16 tcr_9;		\/* SDMA + 0x2e *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_a	include/mpc5xxx.h	/^	volatile u16 tcr_a;		\/* SDMA + 0x30 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_b	include/mpc5xxx.h	/^	volatile u16 tcr_b;		\/* SDMA + 0x32 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_c	include/mpc5xxx.h	/^	volatile u16 tcr_c;		\/* SDMA + 0x34 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_d	include/mpc5xxx.h	/^	volatile u16 tcr_d;		\/* SDMA + 0x36 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_e	include/mpc5xxx.h	/^	volatile u16 tcr_e;		\/* SDMA + 0x38 *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcr_f	include/mpc5xxx.h	/^	volatile u16 tcr_f;		\/* SDMA + 0x3a *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u16
tcrc	include/commproc.h	/^	ulong	tcrc;		\/* temp transmit CRC *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
tcrc	include/usb/mpc8xx_udc.h	/^	ushort tcrc;	\/* Transmit temp CRC *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
tcrc	post/cpu/mpc8xx/usb.c	/^	ushort tcrc;$/;"	m	struct:usb_param_block	typeref:typename:ushort	file:
tcrg	include/faraday/ftahbc020s.h	/^	unsigned int	tcrg;		\/* 0x84	- Transfer Ctrl Reg *\/$/;"	m	struct:ftahbc02s	typeref:typename:unsigned int
tcrp	examples/standalone/timer.c	/^  ushort	*tcrp;		\/* Pointer to Timer Capture Register	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:ushort *	file:
tcrr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tcrr;		\/* offset 0x3c *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tcrr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tcrr;	\/* 0x28 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcrr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tcrr;		\/* 0x28 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcrr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tcrr;		\/* 0x3c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tcrr	drivers/timer/omap-timer.c	/^	unsigned int tcrr;		\/* offset 0x3c *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tcsdp	drivers/net/mvgbe.h	/^	struct mvgbe_txdesc *tcsdp;$/;"	m	struct:mvgbe_registers	typeref:struct:mvgbe_txdesc *
tcsr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	tcsr3;$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
tcsr3	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	tcsr3;$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
tctp	board/mpl/mip405/mip405.c	/^	unsigned char tctp;		\/* tras - trcd in clocks *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
tctrl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tctrl;		\/* TX Control *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tctrl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tctrl;		\/* 0x24100 - Transmit Control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tctrl	include/fsl_dtsec.h	/^	u32	tctrl;		\/* Transmit control register *\/$/;"	m	struct:dtsec	typeref:typename:u32
tctrl	include/tsec.h	/^	u32	tctrl;		\/* Transmit Control *\/$/;"	m	struct:tsec	typeref:typename:u32
tctrl0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tctrl0;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl0;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tctrl1;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl1;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tctrl2;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl2;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tctrl3;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl3;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tctrl4;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl4;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl5	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tctrl5;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl5;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl6	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl6;$/;"	m	struct:pit_reg	typeref:typename:u32
tctrl7	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tctrl7;$/;"	m	struct:pit_reg	typeref:typename:u32
tcvh	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tcvh;		\/* 0x15 *\/$/;"	m	struct:atac	typeref:typename:u8
tcwl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tcwl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tcwl	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tcwl;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tcwl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcwl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tcwl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tcwl;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tcwl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tcwl;		\/* 0xec *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcwl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tcwl;		\/* 0xec *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tcyc	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tcyc;		\/* 0x17 *\/$/;"	m	struct:atac	typeref:typename:u8
td	arch/m68k/include/asm/coldfire/ata.h	/^	u8 td;			\/* 0x0B *\/$/;"	m	struct:atac	typeref:typename:u8
td	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	td_t *td[N_URB_TD];	\/* list pointer to all corresponding TDs associated with this request *\/$/;"	m	struct:__anon08a6674e0108	typeref:typename:td_t * []
td	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^struct td {$/;"	s
td	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	td_t *td[N_URB_TD];	\/* list pointer to all corresponding TDs associated with this request *\/$/;"	m	struct:__anonb10e26e60108	typeref:typename:td_t * []
td	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^struct td {$/;"	s
td	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	td_t *td[N_URB_TD];	\/* list pointer to all corresponding TDs associated with this request *\/$/;"	m	struct:__anond5d032300108	typeref:typename:td_t * []
td	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^struct td {$/;"	s
td	drivers/usb/host/ohci-s3c24xx.h	/^	struct td *td[N_URB_TD];	\/* list pointer to all corresponding TDs$/;"	m	struct:urb_priv	typeref:struct:td * []
td	drivers/usb/host/ohci-s3c24xx.h	/^struct td {$/;"	s
td	drivers/usb/host/ohci.h	/^	td_t *td[N_URB_TD];	\/* list pointer to all corresponding TDs associated with this request *\/$/;"	m	struct:__anone9fd91320108	typeref:typename:td_t * []
td	drivers/usb/host/ohci.h	/^struct td {$/;"	s
td0	drivers/net/sh_eth.h	/^	volatile u32 td0;$/;"	m	struct:tx_desc_s	typeref:typename:volatile u32
td1	drivers/net/sh_eth.h	/^	u32 td1;$/;"	m	struct:tx_desc_s	typeref:typename:u32
td2	drivers/net/sh_eth.h	/^	u32 td2;		\/* Buffer start *\/$/;"	m	struct:tx_desc_s	typeref:typename:u32
td_alloc	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^td_alloc (struct usb_device *usb_dev)$/;"	f	typeref:struct:td *
td_alloc	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^td_alloc (struct usb_device *usb_dev)$/;"	f	typeref:struct:td *
td_alloc	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^static inline struct td *td_alloc(struct usb_device *usb_dev)$/;"	f	typeref:struct:td *
td_alloc	drivers/usb/host/ohci-hcd.c	/^static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)$/;"	f	typeref:struct:td *	file:
td_alloc	drivers/usb/host/ohci-s3c24xx.h	/^static inline struct td *td_alloc(struct usb_device *usb_dev)$/;"	f	typeref:struct:td *
td_cnt	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u16 td_cnt;		\/* number of tds already serviced *\/$/;"	m	struct:__anon08a6674e0108	typeref:typename:__u16
td_cnt	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u16 td_cnt;	\/* number of tds already serviced *\/$/;"	m	struct:__anonb10e26e60108	typeref:typename:__u16
td_cnt	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u16 td_cnt;		\/* number of tds already serviced *\/$/;"	m	struct:__anond5d032300108	typeref:typename:__u16
td_cnt	drivers/usb/host/ohci-s3c24xx.h	/^	__u16 td_cnt;		\/* number of tds already serviced *\/$/;"	m	struct:urb_priv	typeref:typename:__u16
td_cnt	drivers/usb/host/ohci.h	/^	__u16 td_cnt;	\/* number of tds already serviced *\/$/;"	m	struct:__anone9fd91320108	typeref:typename:__u16
td_fill	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void td_fill (ohci_t *ohci, unsigned int info,$/;"	f	typeref:typename:void	file:
td_fill	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void td_fill (ohci_t *ohci, unsigned int info,$/;"	f	typeref:typename:void	file:
td_fill	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void td_fill (ohci_t *ohci, unsigned int info,$/;"	f	typeref:typename:void	file:
td_fill	drivers/usb/host/ohci-hcd.c	/^static void td_fill(ohci_t *ohci, unsigned int info,$/;"	f	typeref:typename:void	file:
td_fill	drivers/usb/host/ohci-s3c24xx.c	/^static void td_fill(struct ohci *ohci, unsigned int info, void *data, int len,$/;"	f	typeref:typename:void	file:
td_int	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_td_t td_int[8] __attribute__ ((aligned(16)));	\/* Interrupt Transfer descriptors *\/$/;"	v	typeref:typename:uhci_td_t[8]	file:
td_int	board/mpl/common/usb_uhci.c	/^static uhci_td_t td_int[8];        \/* Interrupt Transfer descriptors *\/$/;"	v	typeref:typename:uhci_td_t[8]	file:
td_last	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_td_t td_last __attribute__ ((aligned(16)));	\/* last TD (linked with end chain) *\/$/;"	v	typeref:typename:uhci_td_t	file:
td_last	board/mpl/common/usb_uhci.c	/^static uhci_td_t td_last;          \/* last TD (linked with end chain) *\/$/;"	v	typeref:typename:uhci_td_t	file:
td_submit_job	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:void	file:
td_submit_job	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:void	file:
td_submit_job	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:void	file:
td_submit_job	drivers/usb/host/ohci-hcd.c	/^static void td_submit_job(ohci_t *ohci, struct usb_device *dev,$/;"	f	typeref:typename:void	file:
td_submit_job	drivers/usb/host/ohci-s3c24xx.c	/^static void td_submit_job(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:void	file:
td_t	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^typedef struct td td_t;$/;"	t	typeref:struct:td
td_t	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^typedef struct td td_t;$/;"	t	typeref:struct:td
td_t	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^typedef struct td td_t;$/;"	t	typeref:struct:td
td_t	drivers/usb/host/ohci.h	/^typedef struct td td_t;$/;"	t	typeref:struct:td
tdal	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tdal;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tdar	arch/m68k/include/asm/fec.h	/^	u32 tdar;		\/* 0x14 *\/$/;"	m	struct:fec	typeref:typename:u32
tdb_ptr	drivers/net/fec_mxc.h	/^	uint8_t *tdb_ptr;$/;"	m	struct:fec_priv	typeref:typename:uint8_t *
tdcs	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 tdcs;$/;"	m	struct:emi_bank_regs	typeref:typename:u32
tdcs	board/spear/common/spr_misc.c	/^	unsigned int tdcs;$/;"	m	struct:cust_emi_para	typeref:typename:unsigned int	file:
tdes0	drivers/net/uli526x.c	/^	u32 tdes0, tdes1, tdes2, tdes3; \/* Data for the card *\/$/;"	m	struct:tx_desc	typeref:typename:u32	file:
tdes1	drivers/net/uli526x.c	/^	u32 tdes0, tdes1, tdes2, tdes3; \/* Data for the card *\/$/;"	m	struct:tx_desc	typeref:typename:u32	file:
tdes2	drivers/net/uli526x.c	/^	u32 tdes0, tdes1, tdes2, tdes3; \/* Data for the card *\/$/;"	m	struct:tx_desc	typeref:typename:u32	file:
tdes3	drivers/net/uli526x.c	/^	u32 tdes0, tdes1, tdes2, tdes3; \/* Data for the card *\/$/;"	m	struct:tx_desc	typeref:typename:u32	file:
tdes_clk	arch/arm/dts/sama5d2.dtsi	/^					tdes_clk: tdes_clk@11 {$/;"	l
tdes_control	drivers/crypto/ace_sha.h	/^	unsigned int	tdes_control;	\/* base + 0x300 *\/$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
tdes_in	drivers/crypto/ace_sha.h	/^	unsigned int	tdes_in[2];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[2]
tdes_iv	drivers/crypto/ace_sha.h	/^	unsigned int	tdes_iv[2];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[2]
tdes_key	drivers/crypto/ace_sha.h	/^	unsigned int	tdes_key[6];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[6]
tdes_out	drivers/crypto/ace_sha.h	/^	unsigned int	tdes_out[2];$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int[2]
tdes_status	drivers/crypto/ace_sha.h	/^	unsigned int	tdes_status;$/;"	m	struct:exynos_ace_sfr	typeref:typename:unsigned int
tdfd	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 tdfd;	\/* Transmit Data FIFO 32bit wide Data write port (WO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
tdfr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tdfr;		\/* TX Deferral Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tdfr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tdfr;		\/* 0x246f4 - Transmit Deferral Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tdfr	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 tdfr;	\/* Transmit Data FIFO Reset (WO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
tdfr	include/fsl_dtsec.h	/^	u32	tdfr;		\/* Transmit deferral packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
tdfr	include/tsec.h	/^	u32	tdfr;		\/* Transmit Deferral Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tdfv	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 tdfv;	\/* Transmit Data FIFO Vacancy (RO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
tdh_ps	include/common_timing_params.h	/^	unsigned int tdh_ps;	\/* byte 35, spd->data_hold *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tdh_ps	include/fsl_ddr_dimm_params.h	/^	int tdh_ps;	\/* byte 35, spd->data_hold *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tdi	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int tdi;$/;"	m	struct:pad_signals	typeref:typename:int
tdi	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int tdi;$/;"	m	struct:pad_signals	typeref:typename:int
tdll	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u16 tdll;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u16
tdm	arch/powerpc/include/asm/immap_83xx.h	/^	tdm83xx_t		tdm;		\/* TDM Controller *\/$/;"	m	struct:immap	typeref:typename:tdm83xx_t
tdm83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct tdm83xx {$/;"	s
tdm83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} tdm83xx_t;$/;"	t	typeref:struct:tdm83xx
tdm_can_sel	board/freescale/p1010rdb/p1010rdb.c	/^	u8 tdm_can_sel;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
tdm_clk	arch/powerpc/include/asm/global_data.h	/^	u32 tdm_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
tdm_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 tdm_clk_cfg;	\/* 0xbc TDM clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
tdm_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 tdm_clk_cfg;	\/* 0xbc TDM clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
tdmclk_mux_sel	board/freescale/ls1043ardb/cpld.h	/^	u8 tdmclk_mux_sel;	\/* 0xB - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
tdmdmac	arch/powerpc/include/asm/immap_83xx.h	/^	tdmdmac83xx_t		tdmdmac;	\/* TDM DMAC *\/$/;"	m	struct:immap	typeref:typename:tdmdmac83xx_t
tdmdmac83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct tdmdmac83xx {$/;"	s
tdmdmac83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} tdmdmac83xx_t;$/;"	t	typeref:struct:tdmdmac83xx
tdmliodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tdmliodnr;	\/* TDM LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
tdo	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int tdo;$/;"	m	struct:pad_signals	typeref:typename:int
tdo	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int tdo;$/;"	m	struct:pad_signals	typeref:typename:int
tdpd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tdpd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tdpd	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tdpd;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tdpd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tdpd;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tdpd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tdpd;		\/* 0x144 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tdpd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tdpd;		\/* 0x144 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tdpr	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 tdpr;$/;"	m	struct:emi_bank_regs	typeref:typename:u32
tdpr	board/spear/common/spr_misc.c	/^	unsigned int tdpr;$/;"	m	struct:cust_emi_para	typeref:typename:unsigned int	file:
tdpw	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 tdpw;$/;"	m	struct:emi_bank_regs	typeref:typename:u32
tdpw	board/spear/common/spr_misc.c	/^	unsigned int tdpw;$/;"	m	struct:cust_emi_para	typeref:typename:unsigned int	file:
tdqs	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tdqs;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tdqs	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tdqs;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tdqs	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tdqs;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tdqs	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tdqs;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tdqs	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tdqs;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tdqs	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tdqs;		\/* 0x120 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tdqsq	include/ddr_spd.h	/^	unsigned char tdqsq;       \/* 44 Max DQS to DQ skew (tDQSQ max) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
tdqsq	include/ddr_spd.h	/^	unsigned char tdqsq;       \/* 44 Max DQS to DQ skew (tDQSQ max) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
tdqsq	include/spd.h	/^	unsigned char tdqsq;       \/* 44 Max DQS to DQ skew *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
tdqsq_max_ps	include/common_timing_params.h	/^	unsigned int tdqsq_max_ps;	\/* byte 44, spd->tdqsq *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tdqsq_max_ps	include/fsl_ddr_dimm_params.h	/^	int tdqsq_max_ps;	\/* byte 44, spd->tdqsq *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tdr	arch/arm/mach-at91/include/mach/at91_spi.h	/^	u32		tdr;		\/* 0x0C Transmit Data Register *\/$/;"	m	struct:at91_spi	typeref:typename:u32
tdr	include/atmel_mci.h	/^	u32	tdr;	\/* 0x34 *\/$/;"	m	struct:atmel_mci	typeref:typename:u32
tdrp	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tdrp;		\/* TX Drop Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tdrp	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tdrp;		\/* 0x24714 - Transmit Drop Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tdrp	include/fsl_dtsec.h	/^	u32	tdrp;		\/* Transmit drop frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tdrp	include/tsec.h	/^	u32	tdrp;		\/* Transmit Drop Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tds	drivers/usb/host/ehci-hcd.c	/^	struct qTD *tds;$/;"	m	struct:int_queue	typeref:struct:qTD *	file:
tds_ps	include/common_timing_params.h	/^	unsigned int tds_ps;	\/* byte 34, spd->data_setup *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tds_ps	include/fsl_ddr_dimm_params.h	/^	int tds_ps;	\/* byte 34, spd->data_setup *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tdt_state_flag	arch/x86/include/asm/me_common.h	/^struct __packed tdt_state_flag {$/;"	s
tdt_state_info	arch/x86/include/asm/me_common.h	/^struct __packed tdt_state_info {$/;"	s
tdvh	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tdvh;		\/* 0x12 *\/$/;"	m	struct:atac	typeref:typename:u8
tdvs	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tdvs;		\/* 0x14 *\/$/;"	m	struct:atac	typeref:typename:u8
tdzfs	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tdzfs;		\/* 0x13 *\/$/;"	m	struct:atac	typeref:typename:u8
te1	drivers/power/exynos-tmu.c	/^	unsigned te1;$/;"	m	struct:tmu_info	typeref:typename:unsigned	file:
te2	drivers/power/exynos-tmu.c	/^	unsigned te2;$/;"	m	struct:tmu_info	typeref:typename:unsigned	file:
tea5761	board/nokia/rx51/tag_omap.h	/^		struct omap_tea5761_config tea5761;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_tea5761_config
tearDown	tools/buildman/func_test.py	/^    def tearDown(self):$/;"	m	class:TestFunctional
teardown	arch/arm/mach-davinci/include/mach/da8xx-usb.h	/^	dv_reg 	teardown;$/;"	m	struct:da8xx_usb_regs	typeref:typename:dv_reg
tearing_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 tearing_params_sn20[] = {0x00};$/;"	v	typeref:typename:u16[]	file:
tech	include/linux/mtd/samsung_onenand.h	/^	unsigned int	tech;		\/* 0x00C0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
technology	include/linux/mtd/onenand.h	/^	unsigned int technology;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
tecr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	tecr0;	\/* 0x818 Transmit Equalization Control *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
tecr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	tecr0;	\/* 0x818 Transmit Equalization Control *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
tecr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	tecr0;	\/* 0x818 Transmit Equalization Control *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
tecr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	tecr0;	\/* TX Equalization Control Reg 0 *\/$/;"	m	struct:serdes_corenet::serdes_lane	typeref:typename:u32
tedf	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tedf;		\/* TX Excessive Deferral Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tedf	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tedf;		\/* 0x246f8 - Transmit Excessive Deferral Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tedf	include/fsl_dtsec.h	/^	u32	tedf;		\/* Transmit excessive deferral pkt *\/$/;"	m	struct:dtsec	typeref:typename:u32
tedf	include/tsec.h	/^	u32	tedf;		\/* Transmit Excessive Deferral Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tegra114_pingroups	arch/arm/mach-tegra/tegra114/pinmux.c	/^static const struct pmux_pingrp_desc tegra114_pingroups[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_desc[]	file:
tegra114_pinmux_common	board/nvidia/dalmore/pinmux-config-dalmore.h	/^static struct pmux_pingrp_config tegra114_pinmux_common[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
tegra114_pinmux_set_nontristate	board/nvidia/dalmore/pinmux-config-dalmore.h	/^static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
tegra114_spi_ids	drivers/spi/tegra114_spi.c	/^static const struct udevice_id tegra114_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra114_spi_ofdata_to_platdata	drivers/spi/tegra114_spi.c	/^static int tegra114_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra114_spi_ops	drivers/spi/tegra114_spi.c	/^static const struct dm_spi_ops tegra114_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
tegra114_spi_priv	drivers/spi/tegra114_spi.c	/^struct tegra114_spi_priv {$/;"	s	file:
tegra114_spi_probe	drivers/spi/tegra114_spi.c	/^static int tegra114_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra114_spi_set_mode	drivers/spi/tegra114_spi.c	/^static int tegra114_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
tegra114_spi_set_speed	drivers/spi/tegra114_spi.c	/^static int tegra114_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
tegra114_spi_xfer	drivers/spi/tegra114_spi.c	/^static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
tegra124_function	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^enum tegra124_function {$/;"	g	file:
tegra124_functions	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const char *const tegra124_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
tegra124_init_clocks	arch/arm/mach-tegra/tegra124/cpu.c	/^void tegra124_init_clocks(void)$/;"	f	typeref:typename:void
tegra124_lanes	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const struct tegra_xusb_padctl_lane tegra124_lanes[] = {$/;"	v	typeref:typename:const struct tegra_xusb_padctl_lane[]	file:
tegra124_lcd_bind	drivers/video/tegra124/display.c	/^static int tegra124_lcd_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra124_lcd_ids	drivers/video/tegra124/display.c	/^static const struct udevice_id tegra124_lcd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra124_lcd_init	drivers/video/tegra124/display.c	/^static int tegra124_lcd_init(struct udevice *dev, void *lcdbase,$/;"	f	typeref:typename:int	file:
tegra124_lcd_probe	drivers/video/tegra124/display.c	/^static int tegra124_lcd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra124_mipipadctrl_groups	arch/arm/mach-tegra/tegra124/pinmux.c	/^static const struct pmux_mipipadctrlgrp_desc tegra124_mipipadctrl_groups[] = {$/;"	v	typeref:typename:const struct pmux_mipipadctrlgrp_desc[]	file:
tegra124_otg_functions	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const unsigned int tegra124_otg_functions[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
tegra124_pci_functions	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const unsigned int tegra124_pci_functions[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
tegra124_phys	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static struct tegra_xusb_phy tegra124_phys[] = {$/;"	v	typeref:struct:tegra_xusb_phy[]	file:
tegra124_pingroups	arch/arm/mach-tegra/tegra124/pinmux.c	/^static const struct pmux_pingrp_desc tegra124_pingroups[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_desc[]	file:
tegra124_socdata	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const struct tegra_xusb_padctl_soc tegra124_socdata = {$/;"	v	typeref:typename:const struct tegra_xusb_padctl_soc	file:
tegra124_usb_functions	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static const unsigned int tegra124_usb_functions[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
tegra186_bpmp	drivers/misc/tegra186_bpmp.c	/^struct tegra186_bpmp {$/;"	s	file:
tegra186_bpmp_bind	drivers/misc/tegra186_bpmp.c	/^static int tegra186_bpmp_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_bpmp_call	drivers/misc/tegra186_bpmp.c	/^static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,$/;"	f	typeref:typename:int	file:
tegra186_bpmp_get_shmem	drivers/misc/tegra186_bpmp.c	/^static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)$/;"	f	typeref:typename:ulong	file:
tegra186_bpmp_i2c	drivers/i2c/tegra186_bpmp_i2c.c	/^struct tegra186_bpmp_i2c {$/;"	s	file:
tegra186_bpmp_i2c_ids	drivers/i2c/tegra186_bpmp_i2c.c	/^static const struct udevice_id tegra186_bpmp_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra186_bpmp_i2c_ops	drivers/i2c/tegra186_bpmp_i2c.c	/^static const struct dm_i2c_ops tegra186_bpmp_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
tegra186_bpmp_i2c_probe	drivers/i2c/tegra186_bpmp_i2c.c	/^static int tegra186_bpmp_i2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_bpmp_i2c_xfer	drivers/i2c/tegra186_bpmp_i2c.c	/^static int tegra186_bpmp_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
tegra186_bpmp_ids	drivers/misc/tegra186_bpmp.c	/^static const struct udevice_id tegra186_bpmp_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra186_bpmp_ivc_notify	drivers/misc/tegra186_bpmp.c	/^static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)$/;"	f	typeref:typename:void	file:
tegra186_bpmp_ops	drivers/misc/tegra186_bpmp.c	/^static struct misc_ops tegra186_bpmp_ops = {$/;"	v	typeref:struct:misc_ops	file:
tegra186_bpmp_probe	drivers/misc/tegra186_bpmp.c	/^static int tegra186_bpmp_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_bpmp_remove	drivers/misc/tegra186_bpmp.c	/^static int tegra186_bpmp_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_clk_disable	drivers/clk/tegra/tegra186-clk.c	/^static int tegra186_clk_disable(struct clk *clk)$/;"	f	typeref:typename:int	file:
tegra186_clk_en_dis	drivers/clk/tegra/tegra186-clk.c	/^static int tegra186_clk_en_dis(struct clk *clk,$/;"	f	typeref:typename:int	file:
tegra186_clk_enable	drivers/clk/tegra/tegra186-clk.c	/^static int tegra186_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
tegra186_clk_get_rate	drivers/clk/tegra/tegra186-clk.c	/^static ulong tegra186_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
tegra186_clk_ops	drivers/clk/tegra/tegra186-clk.c	/^static struct clk_ops tegra186_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
tegra186_clk_probe	drivers/clk/tegra/tegra186-clk.c	/^static int tegra186_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_clk_set_rate	drivers/clk/tegra/tegra186-clk.c	/^static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
tegra186_gpio_aon_data	drivers/gpio/tegra186_gpio.c	/^static const struct tegra186_gpio_ctlr_data tegra186_gpio_aon_data = {$/;"	v	typeref:typename:const struct tegra186_gpio_ctlr_data	file:
tegra186_gpio_aon_ports	drivers/gpio/tegra186_gpio.c	/^static const struct tegra186_gpio_port_data tegra186_gpio_aon_ports[] = {$/;"	v	typeref:typename:const struct tegra186_gpio_port_data[]	file:
tegra186_gpio_bind	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_bind(struct udevice *parent)$/;"	f	typeref:typename:int	file:
tegra186_gpio_ctlr_data	drivers/gpio/tegra186_gpio.c	/^struct tegra186_gpio_ctlr_data {$/;"	s	file:
tegra186_gpio_direction_input	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
tegra186_gpio_direction_output	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
tegra186_gpio_get_function	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
tegra186_gpio_get_value	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
tegra186_gpio_ids	drivers/gpio/tegra186_gpio.c	/^static const struct udevice_id tegra186_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra186_gpio_main_data	drivers/gpio/tegra186_gpio.c	/^static const struct tegra186_gpio_ctlr_data tegra186_gpio_main_data = {$/;"	v	typeref:typename:const struct tegra186_gpio_ctlr_data	file:
tegra186_gpio_main_ports	drivers/gpio/tegra186_gpio.c	/^static const struct tegra186_gpio_port_data tegra186_gpio_main_ports[] = {$/;"	v	typeref:typename:const struct tegra186_gpio_port_data[]	file:
tegra186_gpio_ops	drivers/gpio/tegra186_gpio.c	/^static const struct dm_gpio_ops tegra186_gpio_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
tegra186_gpio_platdata	drivers/gpio/tegra186_gpio.c	/^struct tegra186_gpio_platdata {$/;"	s	file:
tegra186_gpio_port_data	drivers/gpio/tegra186_gpio.c	/^struct tegra186_gpio_port_data {$/;"	s	file:
tegra186_gpio_probe	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_gpio_reg	drivers/gpio/tegra186_gpio.c	/^static uint32_t *tegra186_gpio_reg(struct udevice *dev, uint32_t reg,$/;"	f	typeref:typename:uint32_t *	file:
tegra186_gpio_set_out	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_set_out(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
tegra186_gpio_set_val	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_set_val(struct udevice *dev, unsigned offset, bool val)$/;"	f	typeref:typename:int	file:
tegra186_gpio_set_value	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
tegra186_gpio_xlate	drivers/gpio/tegra186_gpio.c	/^static int tegra186_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
tegra186_power_domain_common	drivers/power/domain/tegra186-power-domain.c	/^static int tegra186_power_domain_common(struct power_domain *power_domain,$/;"	f	typeref:typename:int	file:
tegra186_power_domain_free	drivers/power/domain/tegra186-power-domain.c	/^static int tegra186_power_domain_free(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
tegra186_power_domain_off	drivers/power/domain/tegra186-power-domain.c	/^static int tegra186_power_domain_off(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
tegra186_power_domain_on	drivers/power/domain/tegra186-power-domain.c	/^static int tegra186_power_domain_on(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
tegra186_power_domain_ops	drivers/power/domain/tegra186-power-domain.c	/^struct power_domain_ops tegra186_power_domain_ops = {$/;"	v	typeref:struct:power_domain_ops
tegra186_power_domain_probe	drivers/power/domain/tegra186-power-domain.c	/^static int tegra186_power_domain_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_power_domain_request	drivers/power/domain/tegra186-power-domain.c	/^static int tegra186_power_domain_request(struct power_domain *power_domain)$/;"	f	typeref:typename:int	file:
tegra186_regs	drivers/net/dwc_eth_qos.c	/^	struct eqos_tegra186_regs *tegra186_regs;$/;"	m	struct:eqos_priv	typeref:struct:eqos_tegra186_regs *	file:
tegra186_reset_assert	drivers/reset/tegra186-reset.c	/^static int tegra186_reset_assert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra186_reset_common	drivers/reset/tegra186-reset.c	/^static int tegra186_reset_common(struct reset_ctl *reset_ctl,$/;"	f	typeref:typename:int	file:
tegra186_reset_deassert	drivers/reset/tegra186-reset.c	/^static int tegra186_reset_deassert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra186_reset_free	drivers/reset/tegra186-reset.c	/^static int tegra186_reset_free(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra186_reset_ops	drivers/reset/tegra186-reset.c	/^struct reset_ops tegra186_reset_ops = {$/;"	v	typeref:struct:reset_ops
tegra186_reset_probe	drivers/reset/tegra186-reset.c	/^static int tegra186_reset_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra186_reset_request	drivers/reset/tegra186-reset.c	/^static int tegra186_reset_request(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra20_pingroups	arch/arm/mach-tegra/tegra20/pinmux.c	/^static const struct pmux_pingrp_desc tegra20_pingroups[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_desc[]	file:
tegra20_sflash_claim_bus	drivers/spi/tegra20_sflash.c	/^static int tegra20_sflash_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra20_sflash_cs_info	drivers/spi/tegra20_sflash.c	/^int tegra20_sflash_cs_info(struct udevice *bus, unsigned int cs,$/;"	f	typeref:typename:int
tegra20_sflash_ids	drivers/spi/tegra20_sflash.c	/^static const struct udevice_id tegra20_sflash_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra20_sflash_ofdata_to_platdata	drivers/spi/tegra20_sflash.c	/^static int tegra20_sflash_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra20_sflash_ops	drivers/spi/tegra20_sflash.c	/^static const struct dm_spi_ops tegra20_sflash_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
tegra20_sflash_priv	drivers/spi/tegra20_sflash.c	/^struct tegra20_sflash_priv {$/;"	s	file:
tegra20_sflash_probe	drivers/spi/tegra20_sflash.c	/^static int tegra20_sflash_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra20_sflash_set_mode	drivers/spi/tegra20_sflash.c	/^static int tegra20_sflash_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
tegra20_sflash_set_speed	drivers/spi/tegra20_sflash.c	/^static int tegra20_sflash_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
tegra20_sflash_xfer	drivers/spi/tegra20_sflash.c	/^static int tegra20_sflash_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
tegra210_function	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^enum tegra210_function {$/;"	g	file:
tegra210_functions	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const char *const tegra210_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
tegra210_lanes	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const struct tegra_xusb_padctl_lane tegra210_lanes[] = {$/;"	v	typeref:typename:const struct tegra_xusb_padctl_lane[]	file:
tegra210_otg_functions	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const unsigned int tegra210_otg_functions[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
tegra210_pci_functions	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const unsigned int tegra210_pci_functions[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
tegra210_phys	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static struct tegra_xusb_phy tegra210_phys[] = {$/;"	v	typeref:struct:tegra_xusb_phy[]	file:
tegra210_pingroups	arch/arm/mach-tegra/tegra210/pinmux.c	/^static const struct pmux_pingrp_desc tegra210_pingroups[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_desc[]	file:
tegra210_qspi_claim_bus	drivers/spi/tegra210_qspi.c	/^static int tegra210_qspi_claim_bus(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra210_qspi_ids	drivers/spi/tegra210_qspi.c	/^static const struct udevice_id tegra210_qspi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra210_qspi_ofdata_to_platdata	drivers/spi/tegra210_qspi.c	/^static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra210_qspi_ops	drivers/spi/tegra210_qspi.c	/^static const struct dm_spi_ops tegra210_qspi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
tegra210_qspi_priv	drivers/spi/tegra210_qspi.c	/^struct tegra210_qspi_priv {$/;"	s	file:
tegra210_qspi_probe	drivers/spi/tegra210_qspi.c	/^static int tegra210_qspi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra210_qspi_set_mode	drivers/spi/tegra210_qspi.c	/^static int tegra210_qspi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
tegra210_qspi_set_speed	drivers/spi/tegra210_qspi.c	/^static int tegra210_qspi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
tegra210_qspi_xfer	drivers/spi/tegra210_qspi.c	/^static int tegra210_qspi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
tegra210_setup_pllp	arch/arm/mach-tegra/tegra210/clock.c	/^void tegra210_setup_pllp(void)$/;"	f	typeref:typename:void
tegra210_socdata	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const struct tegra_xusb_padctl_soc tegra210_socdata = {$/;"	v	typeref:typename:const struct tegra_xusb_padctl_soc	file:
tegra210_usb_functions	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static const unsigned int tegra210_usb_functions[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
tegra30_pingroups	arch/arm/mach-tegra/tegra30/pinmux.c	/^static const struct pmux_pingrp_desc tegra30_pingroups[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_desc[]	file:
tegra30_set_up_pllp	arch/arm/mach-tegra/clock.c	/^void tegra30_set_up_pllp(void)$/;"	f	typeref:typename:void
tegra30_spi_claim_bus	drivers/spi/tegra20_slink.c	/^static int tegra30_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra30_spi_ids	drivers/spi/tegra20_slink.c	/^static const struct udevice_id tegra30_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra30_spi_ofdata_to_platdata	drivers/spi/tegra20_slink.c	/^static int tegra30_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra30_spi_ops	drivers/spi/tegra20_slink.c	/^static const struct dm_spi_ops tegra30_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
tegra30_spi_priv	drivers/spi/tegra20_slink.c	/^struct tegra30_spi_priv {$/;"	s	file:
tegra30_spi_probe	drivers/spi/tegra20_slink.c	/^static int tegra30_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra30_spi_set_mode	drivers/spi/tegra20_slink.c	/^static int tegra30_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
tegra30_spi_set_speed	drivers/spi/tegra20_slink.c	/^static int tegra30_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
tegra30_spi_xfer	drivers/spi/tegra20_slink.c	/^static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
tegra3_pinmux_common	board/nvidia/cardhu/pinmux-config-cardhu.h	/^static struct pmux_pingrp_config tegra3_pinmux_common[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
tegra3_pinmux_common	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^static struct pmux_pingrp_config tegra3_pinmux_common[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
tegra3_pinmux_common	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^static struct pmux_pingrp_config tegra3_pinmux_common[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
tegra_ac97	arch/arm/dts/tegra20.dtsi	/^	tegra_ac97: ac97@70002000 {$/;"	l
tegra_board_id	arch/arm/mach-tegra/board2.c	/^__weak int tegra_board_id(void)$/;"	f	typeref:typename:__weak int
tegra_board_id	board/nvidia/nyan-big/nyan-big.c	/^int tegra_board_id(void)$/;"	f	typeref:typename:int
tegra_board_init	arch/arm/mach-tegra/board186.c	/^__weak int tegra_board_init(void)$/;"	f	typeref:typename:__weak int
tegra_board_init	board/nvidia/p2771-0000/p2771-0000.c	/^int tegra_board_init(void)$/;"	f	typeref:typename:int
tegra_car	arch/arm/dts/tegra114.dtsi	/^	tegra_car: clock@60006000 {$/;"	l
tegra_car	arch/arm/dts/tegra124.dtsi	/^	tegra_car: clock@60006000 {$/;"	l
tegra_car	arch/arm/dts/tegra20.dtsi	/^	tegra_car: clock@60006000 {$/;"	l
tegra_car	arch/arm/dts/tegra210.dtsi	/^	tegra_car: clock@60006000 {$/;"	l
tegra_car	arch/arm/dts/tegra30.dtsi	/^	tegra_car: clock@60006000 {$/;"	l
tegra_car_bpmp_bind	drivers/misc/tegra_car.c	/^static int tegra_car_bpmp_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_car_bpmp_ids	drivers/misc/tegra_car.c	/^static const struct udevice_id tegra_car_bpmp_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_car_bpmp_probe	drivers/misc/tegra_car.c	/^static int tegra_car_bpmp_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_car_bpmp_remove	drivers/misc/tegra_car.c	/^static int tegra_car_bpmp_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_car_clk_disable	drivers/clk/tegra/tegra-car-clk.c	/^static int tegra_car_clk_disable(struct clk *clk)$/;"	f	typeref:typename:int	file:
tegra_car_clk_enable	drivers/clk/tegra/tegra-car-clk.c	/^static int tegra_car_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
tegra_car_clk_free	drivers/clk/tegra/tegra-car-clk.c	/^static int tegra_car_clk_free(struct clk *clk)$/;"	f	typeref:typename:int	file:
tegra_car_clk_get_rate	drivers/clk/tegra/tegra-car-clk.c	/^static ulong tegra_car_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
tegra_car_clk_ops	drivers/clk/tegra/tegra-car-clk.c	/^static struct clk_ops tegra_car_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
tegra_car_clk_probe	drivers/clk/tegra/tegra-car-clk.c	/^static int tegra_car_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_car_clk_request	drivers/clk/tegra/tegra-car-clk.c	/^static int tegra_car_clk_request(struct clk *clk)$/;"	f	typeref:typename:int	file:
tegra_car_clk_set_rate	drivers/clk/tegra/tegra-car-clk.c	/^static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
tegra_car_reset_assert	drivers/reset/tegra-car-reset.c	/^static int tegra_car_reset_assert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra_car_reset_deassert	drivers/reset/tegra-car-reset.c	/^static int tegra_car_reset_deassert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra_car_reset_free	drivers/reset/tegra-car-reset.c	/^static int tegra_car_reset_free(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra_car_reset_ops	drivers/reset/tegra-car-reset.c	/^struct reset_ops tegra_car_reset_ops = {$/;"	v	typeref:struct:reset_ops
tegra_car_reset_probe	drivers/reset/tegra-car-reset.c	/^static int tegra_car_reset_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_car_reset_request	drivers/reset/tegra-car-reset.c	/^static int tegra_car_reset_request(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
tegra_cpu_is_non_secure	arch/arm/mach-tegra/board.c	/^bool tegra_cpu_is_non_secure(void)$/;"	f	typeref:typename:bool
tegra_dc_calc_refresh	drivers/video/tegra124/display.c	/^static int tegra_dc_calc_refresh(const struct display_timing *timing)$/;"	f	typeref:typename:int	file:
tegra_dc_dp_calc_config	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_calc_config(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_check_sink	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_check_sink(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_dpcd_read	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_dpcd_read(struct tegra_dp_priv *dp, u32 cmd,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_dpcd_write	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_dpcd_write(struct tegra_dp_priv *dp, u32 cmd,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_dump_link_cfg	drivers/video/tegra124/dp.c	/^static void tegra_dc_dp_dump_link_cfg(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:void	file:
tegra_dc_dp_explore_link_cfg	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_explore_link_cfg(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_fast_link_training	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_fast_link_training(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_full_link_training	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_full_link_training(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_init_max_link_cfg	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_init_max_link_cfg($/;"	f	typeref:typename:int	file:
tegra_dc_dp_link_trained	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_link_trained(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_set_assr	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_set_assr(struct tegra_dp_priv *priv,$/;"	f	typeref:typename:int	file:
tegra_dc_dp_sink_out_of_sync	drivers/video/tegra124/dp.c	/^static int tegra_dc_dp_sink_out_of_sync(struct tegra_dp_priv *dp, u32 delay_ms)$/;"	f	typeref:typename:int	file:
tegra_dc_dpaux_enable	drivers/video/tegra124/dp.c	/^static void tegra_dc_dpaux_enable(struct tegra_dp_priv *dp)$/;"	f	typeref:typename:void	file:
tegra_dc_dpaux_poll_register	drivers/video/tegra124/dp.c	/^static inline u32 tegra_dc_dpaux_poll_register(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:u32	file:
tegra_dc_dpaux_read	drivers/video/tegra124/dp.c	/^static int tegra_dc_dpaux_read(struct tegra_dp_priv *dp, u32 cmd, u32 addr,$/;"	f	typeref:typename:int	file:
tegra_dc_dpaux_read_chunk	drivers/video/tegra124/dp.c	/^static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd,$/;"	f	typeref:typename:int	file:
tegra_dc_dpaux_write_chunk	drivers/video/tegra124/dp.c	/^static int tegra_dc_dpaux_write_chunk(struct tegra_dp_priv *dp, u32 cmd,$/;"	f	typeref:typename:int	file:
tegra_dc_i2c_aux_read	drivers/video/tegra124/dp.c	/^static int tegra_dc_i2c_aux_read(struct tegra_dp_priv *dp, u32 i2c_addr,$/;"	f	typeref:typename:int	file:
tegra_dc_init	drivers/video/tegra124/display.c	/^static int tegra_dc_init(struct dc_ctlr *disp_ctrl)$/;"	f	typeref:typename:int	file:
tegra_dc_poll_register	drivers/video/tegra124/display.c	/^static u32 tegra_dc_poll_register(void *reg,$/;"	f	typeref:typename:u32	file:
tegra_dc_sor_attach	drivers/video/tegra124/sor.c	/^int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *dev,$/;"	f	typeref:typename:int
tegra_dc_sor_config_panel	drivers/video/tegra124/sor.c	/^static void tegra_dc_sor_config_panel(struct tegra_dc_sor_data *sor,$/;"	f	typeref:typename:void	file:
tegra_dc_sor_config_pwm	drivers/video/tegra124/sor.c	/^static void tegra_dc_sor_config_pwm(struct tegra_dc_sor_data *sor, u32 pwm_div,$/;"	f	typeref:typename:void	file:
tegra_dc_sor_data	drivers/video/tegra124/sor.c	/^struct tegra_dc_sor_data {$/;"	s	file:
tegra_dc_sor_detach	drivers/video/tegra124/sor.c	/^int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *dev)$/;"	f	typeref:typename:int
tegra_dc_sor_disable_win_short_raster	drivers/video/tegra124/display.c	/^void tegra_dc_sor_disable_win_short_raster(struct dc_ctlr *disp_ctrl,$/;"	f	typeref:typename:void
tegra_dc_sor_enable_dc	drivers/video/tegra124/sor.c	/^static void tegra_dc_sor_enable_dc(struct dc_ctlr *disp_ctrl)$/;"	f	typeref:typename:void	file:
tegra_dc_sor_enable_dp	drivers/video/tegra124/sor.c	/^int tegra_dc_sor_enable_dp(struct udevice *dev,$/;"	f	typeref:typename:int
tegra_dc_sor_enable_lane_sequencer	drivers/video/tegra124/sor.c	/^static int tegra_dc_sor_enable_lane_sequencer(struct tegra_dc_sor_data *sor,$/;"	f	typeref:typename:int	file:
tegra_dc_sor_enable_sor	drivers/video/tegra124/sor.c	/^static void tegra_dc_sor_enable_sor(struct dc_ctlr *disp_ctrl, bool enable)$/;"	f	typeref:typename:void	file:
tegra_dc_sor_general_act	drivers/video/tegra124/display.c	/^int tegra_dc_sor_general_act(struct dc_ctlr *disp_ctrl)$/;"	f	typeref:typename:int
tegra_dc_sor_io_set_dpd	drivers/video/tegra124/sor.c	/^static int tegra_dc_sor_io_set_dpd(struct tegra_dc_sor_data *sor, int up)$/;"	f	typeref:typename:int	file:
tegra_dc_sor_poll_register	drivers/video/tegra124/sor.c	/^static int tegra_dc_sor_poll_register(struct tegra_dc_sor_data *sor, u32 reg,$/;"	f	typeref:typename:int	file:
tegra_dc_sor_power_down_unused_lanes	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_power_down_unused_lanes(struct udevice *dev,$/;"	f	typeref:typename:void
tegra_dc_sor_power_dplanes	drivers/video/tegra124/sor.c	/^static int tegra_dc_sor_power_dplanes(struct udevice *dev,$/;"	f	typeref:typename:int	file:
tegra_dc_sor_power_up	drivers/video/tegra124/sor.c	/^static int tegra_dc_sor_power_up(struct udevice *dev, int is_lvds)$/;"	f	typeref:typename:int	file:
tegra_dc_sor_protocol	drivers/video/tegra124/sor.h	/^enum tegra_dc_sor_protocol {$/;"	g
tegra_dc_sor_read_link_config	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_read_link_config(struct udevice *dev, u8 *link_bw,$/;"	f	typeref:typename:void
tegra_dc_sor_restore_win_and_raster	drivers/video/tegra124/display.c	/^void tegra_dc_sor_restore_win_and_raster(struct dc_ctlr *disp_ctrl,$/;"	f	typeref:typename:void
tegra_dc_sor_set_dp_linkctl	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_set_dp_linkctl(struct udevice *dev, int ena,$/;"	f	typeref:typename:void
tegra_dc_sor_set_dp_mode	drivers/video/tegra124/sor.c	/^static void tegra_dc_sor_set_dp_mode(struct udevice *dev,$/;"	f	typeref:typename:void	file:
tegra_dc_sor_set_internal_panel	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_set_internal_panel(struct udevice *dev, int is_int)$/;"	f	typeref:typename:void
tegra_dc_sor_set_lane_count	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_set_lane_count(struct udevice *dev, u8 lane_count)$/;"	f	typeref:typename:void
tegra_dc_sor_set_lane_parm	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_set_lane_parm(struct udevice *dev,$/;"	f	typeref:typename:void
tegra_dc_sor_set_link_bandwidth	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_set_link_bandwidth(struct udevice *dev, u8 link_bw)$/;"	f	typeref:typename:void
tegra_dc_sor_set_panel_power	drivers/video/tegra124/sor.c	/^void tegra_dc_sor_set_panel_power(struct udevice *dev, int power_up)$/;"	f	typeref:typename:void
tegra_dc_sor_set_power_state	drivers/video/tegra124/sor.c	/^int tegra_dc_sor_set_power_state(struct udevice *dev, int pu_pd)$/;"	f	typeref:typename:int
tegra_dc_sor_set_voltage_swing	drivers/video/tegra124/sor.c	/^int tegra_dc_sor_set_voltage_swing(struct udevice *dev,$/;"	f	typeref:typename:int
tegra_dc_sor_super_update	drivers/video/tegra124/sor.c	/^static inline void tegra_dc_sor_super_update(struct tegra_dc_sor_data *sor)$/;"	f	typeref:typename:void	file:
tegra_dc_sor_update	drivers/video/tegra124/sor.c	/^static inline void tegra_dc_sor_update(struct tegra_dc_sor_data *sor)$/;"	f	typeref:typename:void	file:
tegra_depth_for_bpp	drivers/video/tegra124/display.c	/^static int tegra_depth_for_bpp(int bpp)$/;"	f	typeref:typename:int	file:
tegra_display_probe	drivers/video/tegra.c	/^static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv,$/;"	f	typeref:typename:int	file:
tegra_dp_channel_eq	drivers/video/tegra124/dp.c	/^static int tegra_dp_channel_eq(struct tegra_dp_priv *dp, u32 pe[4], u32 vs[4],$/;"	f	typeref:typename:int	file:
tegra_dp_channel_eq_status	drivers/video/tegra124/dp.c	/^static int tegra_dp_channel_eq_status(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_clk_recovery	drivers/video/tegra124/dp.c	/^static int tegra_dp_clk_recovery(struct tegra_dp_priv *dp, u32 pe[4],$/;"	f	typeref:typename:int	file:
tegra_dp_clock_recovery_status	drivers/video/tegra124/dp.c	/^static int tegra_dp_clock_recovery_status(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_disable_tx_pu	drivers/video/tegra124/sor.c	/^void tegra_dp_disable_tx_pu(struct udevice *dev)$/;"	f	typeref:typename:void
tegra_dp_do_link_training	drivers/video/tegra124/dp.c	/^static int tegra_dp_do_link_training(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_enable	drivers/video/tegra124/dp.c	/^int tegra_dp_enable(struct udevice *dev, int panel_bpp,$/;"	f	typeref:typename:int
tegra_dp_hpd_plug	drivers/video/tegra124/dp.c	/^static int tegra_dp_hpd_plug(struct tegra_dp_priv *dp)$/;"	f	typeref:typename:int	file:
tegra_dp_ids	drivers/video/tegra124/dp.c	/^static const struct udevice_id tegra_dp_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_dp_is_max_pc	drivers/video/tegra124/displayport.h	/^static inline int tegra_dp_is_max_pc(u32 pc)$/;"	f	typeref:typename:int
tegra_dp_is_max_pe	drivers/video/tegra124/displayport.h	/^static inline int tegra_dp_is_max_pe(u32 pe, u32 vs)$/;"	f	typeref:typename:int
tegra_dp_is_max_vs	drivers/video/tegra124/displayport.h	/^static inline int tegra_dp_is_max_vs(u32 pe, u32 vs)$/;"	f	typeref:typename:int
tegra_dp_link_config	drivers/video/tegra124/dp.c	/^static int tegra_dp_link_config(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_link_config	drivers/video/tegra124/sor.h	/^struct tegra_dp_link_config {$/;"	s
tegra_dp_lower_link_config	drivers/video/tegra124/dp.c	/^static int tegra_dp_lower_link_config(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_lt_adjust	drivers/video/tegra124/dp.c	/^static int tegra_dp_lt_adjust(struct tegra_dp_priv *dp, u32 pe[4], u32 vs[4],$/;"	f	typeref:typename:int	file:
tegra_dp_lt_config	drivers/video/tegra124/dp.c	/^static int tegra_dp_lt_config(struct tegra_dp_priv *dp, u32 pe[4], u32 vs[4],$/;"	f	typeref:typename:int	file:
tegra_dp_ofdata_to_platdata	drivers/video/tegra124/dp.c	/^static int tegra_dp_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_dp_pc_regs	drivers/video/tegra124/displayport.h	/^static const u32 tegra_dp_pc_regs[][4][4] = {$/;"	v	typeref:typename:const u32[][4][4]
tegra_dp_pe_regs	drivers/video/tegra124/displayport.h	/^static const u32 tegra_dp_pe_regs[][4][4] = {$/;"	v	typeref:typename:const u32[][4][4]
tegra_dp_plat	drivers/video/tegra124/dp.c	/^struct tegra_dp_plat {$/;"	s	file:
tegra_dp_priv	drivers/video/tegra124/dp.c	/^struct tegra_dp_priv {$/;"	s	file:
tegra_dp_read_edid	drivers/video/tegra124/dp.c	/^static int tegra_dp_read_edid(struct udevice *dev, u8 *buf, int buf_size)$/;"	f	typeref:typename:int	file:
tegra_dp_set_lane_count	drivers/video/tegra124/dp.c	/^static int tegra_dp_set_lane_count(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_set_link_bandwidth	drivers/video/tegra124/dp.c	/^static int tegra_dp_set_link_bandwidth(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:int	file:
tegra_dp_set_pe_vs_pc	drivers/video/tegra124/sor.c	/^void tegra_dp_set_pe_vs_pc(struct udevice *dev, u32 mask, u32 pe_reg,$/;"	f	typeref:typename:void
tegra_dp_tpg	drivers/video/tegra124/dp.c	/^static void tegra_dp_tpg(struct tegra_dp_priv *dp, u32 tp, u32 n_lanes,$/;"	f	typeref:typename:void	file:
tegra_dp_tx_pu	drivers/video/tegra124/displayport.h	/^static const u32 tegra_dp_tx_pu[][4][4] = {$/;"	v	typeref:typename:const u32[][4][4]
tegra_dp_vs_regs	drivers/video/tegra124/displayport.h	/^static const u32 tegra_dp_vs_regs[][4][4] = {$/;"	v	typeref:typename:const u32[][4][4]
tegra_dp_wait_aux_training	drivers/video/tegra124/dp.c	/^static void tegra_dp_wait_aux_training(struct tegra_dp_priv *dp,$/;"	f	typeref:typename:void	file:
tegra_dpaux_readl	drivers/video/tegra124/dp.c	/^static inline u32 tegra_dpaux_readl(struct tegra_dp_priv *dp, u32 reg)$/;"	f	typeref:typename:u32	file:
tegra_dpaux_wait_transaction	drivers/video/tegra124/dp.c	/^static inline int tegra_dpaux_wait_transaction(struct tegra_dp_priv *dp)$/;"	f	typeref:typename:int	file:
tegra_dpaux_writel	drivers/video/tegra124/dp.c	/^static inline void tegra_dpaux_writel(struct tegra_dp_priv *dp, u32 reg,$/;"	f	typeref:typename:void	file:
tegra_ehci_get_port_speed	drivers/usb/host/ehci-tegra.c	/^static int tegra_ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)$/;"	f	typeref:typename:int	file:
tegra_ehci_ops	drivers/usb/host/ehci-tegra.c	/^static const struct ehci_ops tegra_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
tegra_ehci_powerup_fixup	drivers/usb/host/ehci-tegra.c	/^static void tegra_ehci_powerup_fixup(struct ehci_ctrl *ctrl,$/;"	f	typeref:typename:void	file:
tegra_ehci_set_usbmode	drivers/usb/host/ehci-tegra.c	/^static void tegra_ehci_set_usbmode(struct ehci_ctrl *ctrl)$/;"	f	typeref:typename:void	file:
tegra_get_chip	arch/arm/mach-tegra/ap.c	/^int tegra_get_chip(void)$/;"	f	typeref:typename:int
tegra_get_chip_sku	arch/arm/mach-tegra/ap.c	/^int tegra_get_chip_sku(void)$/;"	f	typeref:typename:int
tegra_get_sku_info	arch/arm/mach-tegra/ap.c	/^int tegra_get_sku_info(void)$/;"	f	typeref:typename:int
tegra_gpio_config	arch/arm/include/asm/arch-tegra/gpio.h	/^struct tegra_gpio_config {$/;"	s
tegra_gpio_direction_input	drivers/gpio/tegra_gpio.c	/^static int tegra_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
tegra_gpio_direction_output	drivers/gpio/tegra_gpio.c	/^static int tegra_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
tegra_gpio_get_function	drivers/gpio/tegra_gpio.c	/^static int tegra_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
tegra_gpio_get_value	drivers/gpio/tegra_gpio.c	/^static int tegra_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
tegra_gpio_ids	drivers/gpio/tegra_gpio.c	/^static const struct udevice_id tegra_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_gpio_init	arch/arm/include/asm/arch-tegra/gpio.h	/^enum tegra_gpio_init {$/;"	g
tegra_gpio_platdata	drivers/gpio/tegra_gpio.c	/^struct tegra_gpio_platdata {$/;"	s	file:
tegra_gpio_set_value	drivers/gpio/tegra_gpio.c	/^static int tegra_gpio_set_value(struct udevice *dev, unsigned offset, int value)$/;"	f	typeref:typename:int	file:
tegra_gpio_xlate	drivers/gpio/tegra_gpio.c	/^static int tegra_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,$/;"	f	typeref:typename:int	file:
tegra_gpu_config	arch/arm/include/asm/arch-tegra/gpu.h	/^static inline void tegra_gpu_config(void)$/;"	f	typeref:typename:void
tegra_gpu_config	arch/arm/mach-tegra/gpu.c	/^void tegra_gpu_config(void)$/;"	f	typeref:typename:void
tegra_gpu_enable_node	arch/arm/include/asm/arch-tegra/gpu.h	/^static inline int tegra_gpu_enable_node(void *blob, const char *compat)$/;"	f	typeref:typename:int
tegra_gpu_enable_node	arch/arm/mach-tegra/gpu.c	/^int tegra_gpu_enable_node(void *blob, const char *compat)$/;"	f	typeref:typename:int
tegra_hsp	drivers/mailbox/tegra-hsp.c	/^struct tegra_hsp {$/;"	s	file:
tegra_hsp_bind	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_hsp_db_id	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_db_id(ulong chan_id)$/;"	f	typeref:typename:int	file:
tegra_hsp_free	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_free(struct mbox_chan *chan)$/;"	f	typeref:typename:int	file:
tegra_hsp_ids	drivers/mailbox/tegra-hsp.c	/^static const struct udevice_id tegra_hsp_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_hsp_mbox_ops	drivers/mailbox/tegra-hsp.c	/^struct mbox_ops tegra_hsp_mbox_ops = {$/;"	v	typeref:struct:mbox_ops
tegra_hsp_of_xlate	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_of_xlate(struct mbox_chan *chan,$/;"	f	typeref:typename:int	file:
tegra_hsp_probe	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_hsp_readl	drivers/mailbox/tegra-hsp.c	/^static uint32_t tegra_hsp_readl(struct tegra_hsp *thsp, uint32_t db_id,$/;"	f	typeref:typename:uint32_t	file:
tegra_hsp_recv	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_recv(struct mbox_chan *chan, void *data)$/;"	f	typeref:typename:int	file:
tegra_hsp_reg	drivers/mailbox/tegra-hsp.c	/^static uint32_t *tegra_hsp_reg(struct tegra_hsp *thsp, uint32_t db_id,$/;"	f	typeref:typename:uint32_t *	file:
tegra_hsp_request	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_request(struct mbox_chan *chan)$/;"	f	typeref:typename:int	file:
tegra_hsp_send	drivers/mailbox/tegra-hsp.c	/^static int tegra_hsp_send(struct mbox_chan *chan, const void *data)$/;"	f	typeref:typename:int	file:
tegra_hsp_writel	drivers/mailbox/tegra-hsp.c	/^static void tegra_hsp_writel(struct tegra_hsp *thsp, uint32_t val,$/;"	f	typeref:typename:void	file:
tegra_i2c_get_dvc_bus	drivers/i2c/tegra_i2c.c	/^int tegra_i2c_get_dvc_bus(struct udevice **busp)$/;"	f	typeref:typename:int
tegra_i2c_ids	drivers/i2c/tegra_i2c.c	/^static const struct udevice_id tegra_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_i2c_ll_write_addr	arch/arm/mach-tegra/tegra30/cpu.c	/^void tegra_i2c_ll_write_addr(uint addr, uint config)$/;"	f	typeref:typename:void
tegra_i2c_ll_write_addr	board/nvidia/venice2/as3722_init.c	/^void tegra_i2c_ll_write_addr(uint addr, uint config)$/;"	f	typeref:typename:void
tegra_i2c_ll_write_data	arch/arm/mach-tegra/tegra30/cpu.c	/^void tegra_i2c_ll_write_data(uint data, uint config)$/;"	f	typeref:typename:void
tegra_i2c_ll_write_data	board/nvidia/venice2/as3722_init.c	/^void tegra_i2c_ll_write_data(uint data, uint config)$/;"	f	typeref:typename:void
tegra_i2c_ops	drivers/i2c/tegra_i2c.c	/^static const struct dm_i2c_ops tegra_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
tegra_i2c_probe	drivers/i2c/tegra_i2c.c	/^static int tegra_i2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_i2c_probe_chip	drivers/i2c/tegra_i2c.c	/^static int tegra_i2c_probe_chip(struct udevice *bus, uint chip_addr,$/;"	f	typeref:typename:int	file:
tegra_i2c_read_data	drivers/i2c/tegra_i2c.c	/^static int tegra_i2c_read_data(struct i2c_bus *i2c_bus, u32 addr, u8 *data,$/;"	f	typeref:typename:int	file:
tegra_i2c_set_bus_speed	drivers/i2c/tegra_i2c.c	/^static int tegra_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)$/;"	f	typeref:typename:int	file:
tegra_i2c_write_data	drivers/i2c/tegra_i2c.c	/^static int tegra_i2c_write_data(struct i2c_bus *i2c_bus, u32 addr, u8 *data,$/;"	f	typeref:typename:int	file:
tegra_i2c_xfer	drivers/i2c/tegra_i2c.c	/^static int tegra_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
tegra_i2s0	arch/arm/dts/tegra114.dtsi	/^		tegra_i2s0: i2s@70080300 {$/;"	l
tegra_i2s0	arch/arm/dts/tegra124.dtsi	/^		tegra_i2s0: i2s@70301000 {$/;"	l
tegra_i2s0	arch/arm/dts/tegra30.dtsi	/^		tegra_i2s0: i2s@70080300 {$/;"	l
tegra_i2s1	arch/arm/dts/tegra114.dtsi	/^		tegra_i2s1: i2s@70080400 {$/;"	l
tegra_i2s1	arch/arm/dts/tegra124.dtsi	/^		tegra_i2s1: i2s@70301100 {$/;"	l
tegra_i2s1	arch/arm/dts/tegra20.dtsi	/^	tegra_i2s1: i2s@70002800 {$/;"	l
tegra_i2s1	arch/arm/dts/tegra30.dtsi	/^		tegra_i2s1: i2s@70080400 {$/;"	l
tegra_i2s2	arch/arm/dts/tegra114.dtsi	/^		tegra_i2s2: i2s@70080500 {$/;"	l
tegra_i2s2	arch/arm/dts/tegra124.dtsi	/^		tegra_i2s2: i2s@70301200 {$/;"	l
tegra_i2s2	arch/arm/dts/tegra20.dtsi	/^	tegra_i2s2: i2s@70002a00 {$/;"	l
tegra_i2s2	arch/arm/dts/tegra30.dtsi	/^		tegra_i2s2: i2s@70080500 {$/;"	l
tegra_i2s3	arch/arm/dts/tegra114.dtsi	/^		tegra_i2s3: i2s@70080600 {$/;"	l
tegra_i2s3	arch/arm/dts/tegra124.dtsi	/^		tegra_i2s3: i2s@70301300 {$/;"	l
tegra_i2s3	arch/arm/dts/tegra30.dtsi	/^		tegra_i2s3: i2s@70080600 {$/;"	l
tegra_i2s4	arch/arm/dts/tegra114.dtsi	/^		tegra_i2s4: i2s@70080700 {$/;"	l
tegra_i2s4	arch/arm/dts/tegra124.dtsi	/^		tegra_i2s4: i2s@70301400 {$/;"	l
tegra_i2s4	arch/arm/dts/tegra30.dtsi	/^		tegra_i2s4: i2s@70080700 {$/;"	l
tegra_ivc	arch/arm/include/asm/arch-tegra/ivc.h	/^struct tegra_ivc {$/;"	s
tegra_ivc_advance_rx	arch/arm/mach-tegra/ivc.c	/^static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)$/;"	f	typeref:typename:void	file:
tegra_ivc_advance_tx	arch/arm/mach-tegra/ivc.c	/^static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc)$/;"	f	typeref:typename:void	file:
tegra_ivc_channel_avail_count	arch/arm/mach-tegra/ivc.c	/^static inline uint32_t tegra_ivc_channel_avail_count(struct tegra_ivc *ivc,$/;"	f	typeref:typename:uint32_t	file:
tegra_ivc_channel_empty	arch/arm/mach-tegra/ivc.c	/^static inline int tegra_ivc_channel_empty(struct tegra_ivc *ivc,$/;"	f	typeref:typename:int	file:
tegra_ivc_channel_full	arch/arm/mach-tegra/ivc.c	/^static inline int tegra_ivc_channel_full(struct tegra_ivc *ivc,$/;"	f	typeref:typename:int	file:
tegra_ivc_channel_header	arch/arm/mach-tegra/ivc.c	/^struct tegra_ivc_channel_header {$/;"	s	file:
tegra_ivc_channel_notified	arch/arm/mach-tegra/ivc.c	/^int tegra_ivc_channel_notified(struct tegra_ivc *ivc)$/;"	f	typeref:typename:int
tegra_ivc_channel_reset	arch/arm/mach-tegra/ivc.c	/^void tegra_ivc_channel_reset(struct tegra_ivc *ivc)$/;"	f	typeref:typename:void
tegra_ivc_check_read	arch/arm/mach-tegra/ivc.c	/^static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)$/;"	f	typeref:typename:int	file:
tegra_ivc_check_write	arch/arm/mach-tegra/ivc.c	/^static inline int tegra_ivc_check_write(struct tegra_ivc *ivc)$/;"	f	typeref:typename:int	file:
tegra_ivc_flush_counter	arch/arm/mach-tegra/ivc.c	/^static inline void tegra_ivc_flush_counter(struct tegra_ivc *ivc,$/;"	f	typeref:typename:void	file:
tegra_ivc_flush_frame	arch/arm/mach-tegra/ivc.c	/^static inline void tegra_ivc_flush_frame(struct tegra_ivc *ivc,$/;"	f	typeref:typename:void	file:
tegra_ivc_frame_addr	arch/arm/mach-tegra/ivc.c	/^static inline ulong tegra_ivc_frame_addr(struct tegra_ivc *ivc,$/;"	f	typeref:typename:ulong	file:
tegra_ivc_frame_pointer	arch/arm/mach-tegra/ivc.c	/^static inline void *tegra_ivc_frame_pointer(struct tegra_ivc *ivc,$/;"	f	typeref:typename:void *	file:
tegra_ivc_init	arch/arm/mach-tegra/ivc.c	/^int tegra_ivc_init(struct tegra_ivc *ivc, ulong rx_base, ulong tx_base,$/;"	f	typeref:typename:int
tegra_ivc_invalidate_counter	arch/arm/mach-tegra/ivc.c	/^static inline void tegra_ivc_invalidate_counter(struct tegra_ivc *ivc,$/;"	f	typeref:typename:void	file:
tegra_ivc_invalidate_frame	arch/arm/mach-tegra/ivc.c	/^static inline void tegra_ivc_invalidate_frame(struct tegra_ivc *ivc,$/;"	f	typeref:typename:void	file:
tegra_ivc_read_advance	arch/arm/mach-tegra/ivc.c	/^int tegra_ivc_read_advance(struct tegra_ivc *ivc)$/;"	f	typeref:typename:int
tegra_ivc_read_get_next_frame	arch/arm/mach-tegra/ivc.c	/^int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, void **frame)$/;"	f	typeref:typename:int
tegra_ivc_write_advance	arch/arm/mach-tegra/ivc.c	/^int tegra_ivc_write_advance(struct tegra_ivc *ivc)$/;"	f	typeref:typename:int
tegra_ivc_write_get_next_frame	arch/arm/mach-tegra/ivc.c	/^int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, void **frame)$/;"	f	typeref:typename:int
tegra_kbc_check	drivers/input/tegra-kbc.c	/^static int tegra_kbc_check(struct input_config *input)$/;"	f	typeref:typename:int	file:
tegra_kbc_find_keys	drivers/input/tegra-kbc.c	/^static int tegra_kbc_find_keys(struct tegra_kbd_priv *priv, int *fifo,$/;"	f	typeref:typename:int	file:
tegra_kbc_open	drivers/input/tegra-kbc.c	/^static void tegra_kbc_open(struct tegra_kbd_priv *priv)$/;"	f	typeref:typename:void	file:
tegra_kbd_ids	drivers/input/tegra-kbc.c	/^static const struct udevice_id tegra_kbd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_kbd_ops	drivers/input/tegra-kbc.c	/^static const struct keyboard_ops tegra_kbd_ops = {$/;"	v	typeref:typename:const struct keyboard_ops	file:
tegra_kbd_priv	drivers/input/tegra-kbc.c	/^struct tegra_kbd_priv {$/;"	s	file:
tegra_kbd_probe	drivers/input/tegra-kbc.c	/^static int tegra_kbd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_kbd_start	drivers/input/tegra-kbc.c	/^static int tegra_kbd_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_lcd_bind	drivers/video/tegra.c	/^static int tegra_lcd_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_lcd_ids	drivers/video/tegra.c	/^static const struct udevice_id tegra_lcd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_lcd_ofdata_to_platdata	drivers/video/tegra.c	/^static int tegra_lcd_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_lcd_ops	drivers/video/tegra.c	/^static const struct video_ops tegra_lcd_ops = {$/;"	v	typeref:typename:const struct video_ops	file:
tegra_lcd_pmic_init	arch/arm/mach-tegra/board2.c	/^__weak int tegra_lcd_pmic_init(int board_it)$/;"	f	typeref:typename:__weak int
tegra_lcd_pmic_init	board/nvidia/nyan-big/nyan-big.c	/^int tegra_lcd_pmic_init(int board_id)$/;"	f	typeref:typename:int
tegra_lcd_priv	drivers/video/tegra.c	/^struct tegra_lcd_priv {$/;"	s	file:
tegra_lcd_probe	drivers/video/tegra.c	/^static int tegra_lcd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_mem_map	arch/arm/mach-tegra/arm64-mmu.c	/^static struct mm_region tegra_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
tegra_mmc	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^struct tegra_mmc {$/;"	s
tegra_mmc_change_clock	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_change_clock(struct tegra_mmc_priv *priv, uint clock)$/;"	f	typeref:typename:void	file:
tegra_mmc_getcd	drivers/mmc/tegra_mmc.c	/^static int tegra_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
tegra_mmc_ids	drivers/mmc/tegra_mmc.c	/^static const struct udevice_id tegra_mmc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_mmc_init	drivers/mmc/tegra_mmc.c	/^static int tegra_mmc_init(struct mmc *mmc)$/;"	f	typeref:typename:int	file:
tegra_mmc_ops	drivers/mmc/tegra_mmc.c	/^static const struct mmc_ops tegra_mmc_ops = {$/;"	v	typeref:typename:const struct mmc_ops	file:
tegra_mmc_pad_init	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv)$/;"	f	typeref:typename:void	file:
tegra_mmc_prepare_data	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_prepare_data(struct tegra_mmc_priv *priv,$/;"	f	typeref:typename:void	file:
tegra_mmc_priv	drivers/mmc/tegra_mmc.c	/^struct tegra_mmc_priv {$/;"	s	file:
tegra_mmc_probe	drivers/mmc/tegra_mmc.c	/^static int tegra_mmc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_mmc_reset	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc)$/;"	f	typeref:typename:void	file:
tegra_mmc_send_cmd	drivers/mmc/tegra_mmc.c	/^static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
tegra_mmc_send_cmd_bounced	drivers/mmc/tegra_mmc.c	/^static int tegra_mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
tegra_mmc_set_ios	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_set_ios(struct mmc *mmc)$/;"	f	typeref:typename:void	file:
tegra_mmc_set_power	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_set_power(struct tegra_mmc_priv *priv,$/;"	f	typeref:typename:void	file:
tegra_mmc_set_transfer_mode	drivers/mmc/tegra_mmc.c	/^static void tegra_mmc_set_transfer_mode(struct tegra_mmc_priv *priv,$/;"	f	typeref:typename:void	file:
tegra_mmc_wait_inhibit	drivers/mmc/tegra_mmc.c	/^static int tegra_mmc_wait_inhibit(struct tegra_mmc_priv *priv,$/;"	f	typeref:typename:int	file:
tegra_nand_init	drivers/mtd/nand/tegra_nand.c	/^int tegra_nand_init(struct nand_chip *nand, int devnum)$/;"	f	typeref:typename:int
tegra_pci_id	drivers/pci/pci_tegra.c	/^enum tegra_pci_id {$/;"	g	file:
tegra_pcie	drivers/pci/pci_tegra.c	/^struct tegra_pcie {$/;"	s	file:
tegra_pcie_board_init	board/cei/cei-tk1-som/cei-tk1-som.c	/^int tegra_pcie_board_init(void)$/;"	f	typeref:typename:int
tegra_pcie_board_init	board/nvidia/cardhu/cardhu.c	/^int tegra_pcie_board_init(void)$/;"	f	typeref:typename:int
tegra_pcie_board_init	board/nvidia/jetson-tk1/jetson-tk1.c	/^int tegra_pcie_board_init(void)$/;"	f	typeref:typename:int
tegra_pcie_board_init	board/nvidia/p2371-2180/p2371-2180.c	/^int tegra_pcie_board_init(void)$/;"	f	typeref:typename:int
tegra_pcie_board_init	board/nvidia/p2771-0000/p2771-0000.c	/^int tegra_pcie_board_init(void)$/;"	f	typeref:typename:int
tegra_pcie_board_init	board/toradex/apalis_t30/apalis_t30.c	/^int tegra_pcie_board_init(void)$/;"	f	typeref:typename:int
tegra_pcie_board_init	drivers/pci/pci_tegra.c	/^int __weak tegra_pcie_board_init(void)$/;"	f	typeref:typename:int __weak
tegra_pcie_conf_address	drivers/pci/pci_tegra.c	/^static int tegra_pcie_conf_address(struct tegra_pcie *pcie, pci_dev_t bdf,$/;"	f	typeref:typename:int	file:
tegra_pcie_conf_offset	drivers/pci/pci_tegra.c	/^static unsigned long tegra_pcie_conf_offset(pci_dev_t bdf, int where)$/;"	f	typeref:typename:unsigned long	file:
tegra_pcie_enable	drivers/pci/pci_tegra.c	/^static int tegra_pcie_enable(struct tegra_pcie *pcie)$/;"	f	typeref:typename:int	file:
tegra_pcie_enable_controller	drivers/pci/pci_tegra.c	/^static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)$/;"	f	typeref:typename:int	file:
tegra_pcie_get_xbar_config	drivers/pci/pci_tegra.c	/^static int tegra_pcie_get_xbar_config(const void *fdt, int node, u32 lanes,$/;"	f	typeref:typename:int	file:
tegra_pcie_parse_dt	drivers/pci/pci_tegra.c	/^static int tegra_pcie_parse_dt(const void *fdt, int node, enum tegra_pci_id id,$/;"	f	typeref:typename:int	file:
tegra_pcie_parse_port_info	drivers/pci/pci_tegra.c	/^static int tegra_pcie_parse_port_info(const void *fdt, int node,$/;"	f	typeref:typename:int	file:
tegra_pcie_phy_enable	drivers/pci/pci_tegra.c	/^static int tegra_pcie_phy_enable(struct tegra_pcie *pcie)$/;"	f	typeref:typename:int	file:
tegra_pcie_pll_wait	drivers/pci/pci_tegra.c	/^static int tegra_pcie_pll_wait(struct tegra_pcie *pcie, unsigned long timeout)$/;"	f	typeref:typename:int	file:
tegra_pcie_port	drivers/pci/pci_tegra.c	/^struct tegra_pcie_port {$/;"	s	file:
tegra_pcie_port_check_link	drivers/pci/pci_tegra.c	/^static bool tegra_pcie_port_check_link(struct tegra_pcie_port *port)$/;"	f	typeref:typename:bool	file:
tegra_pcie_port_disable	drivers/pci/pci_tegra.c	/^static void tegra_pcie_port_disable(struct tegra_pcie_port *port)$/;"	f	typeref:typename:void	file:
tegra_pcie_port_enable	drivers/pci/pci_tegra.c	/^static void tegra_pcie_port_enable(struct tegra_pcie_port *port)$/;"	f	typeref:typename:void	file:
tegra_pcie_port_free	drivers/pci/pci_tegra.c	/^static void tegra_pcie_port_free(struct tegra_pcie_port *port)$/;"	f	typeref:typename:void	file:
tegra_pcie_port_get_pex_ctrl	drivers/pci/pci_tegra.c	/^static unsigned long tegra_pcie_port_get_pex_ctrl(struct tegra_pcie_port *port)$/;"	f	typeref:typename:unsigned long	file:
tegra_pcie_port_parse_dt	drivers/pci/pci_tegra.c	/^static int tegra_pcie_port_parse_dt(const void *fdt, int node,$/;"	f	typeref:typename:int	file:
tegra_pcie_port_reset	drivers/pci/pci_tegra.c	/^static void tegra_pcie_port_reset(struct tegra_pcie_port *port)$/;"	f	typeref:typename:void	file:
tegra_pcie_power_on	drivers/pci/pci_tegra.c	/^static int tegra_pcie_power_on(struct tegra_pcie *pcie)$/;"	f	typeref:typename:int	file:
tegra_pcie_setup_translations	drivers/pci/pci_tegra.c	/^static int tegra_pcie_setup_translations(struct udevice *bus)$/;"	f	typeref:typename:int	file:
tegra_pcie_soc	drivers/pci/pci_tegra.c	/^struct tegra_pcie_soc {$/;"	s	file:
tegra_pll_info_table	arch/arm/mach-tegra/tegra114/clock.c	/^struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = {$/;"	v	typeref:struct:clk_pll_info[]
tegra_pll_info_table	arch/arm/mach-tegra/tegra124/clock.c	/^struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = {$/;"	v	typeref:struct:clk_pll_info[]
tegra_pll_info_table	arch/arm/mach-tegra/tegra20/clock.c	/^struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = {$/;"	v	typeref:struct:clk_pll_info[]
tegra_pll_info_table	arch/arm/mach-tegra/tegra210/clock.c	/^struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = {$/;"	v	typeref:struct:clk_pll_info[]
tegra_pll_info_table	arch/arm/mach-tegra/tegra30/clock.c	/^struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = {$/;"	v	typeref:struct:clk_pll_info[]
tegra_pll_x_table	arch/arm/mach-tegra/cpu.c	/^struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {$/;"	v	typeref:struct:clk_pll_table[][]
tegra_plle_enable	arch/arm/mach-tegra/tegra124/clock.c	/^int tegra_plle_enable(void)$/;"	f	typeref:typename:int
tegra_plle_enable	arch/arm/mach-tegra/tegra20/clock.c	/^int tegra_plle_enable(void)$/;"	f	typeref:typename:int
tegra_plle_enable	arch/arm/mach-tegra/tegra210/clock.c	/^int tegra_plle_enable(void)$/;"	f	typeref:typename:int
tegra_plle_enable	arch/arm/mach-tegra/tegra30/clock.c	/^int tegra_plle_enable(void)$/;"	f	typeref:typename:int
tegra_plle_train	arch/arm/mach-tegra/tegra20/clock.c	/^static int tegra_plle_train(void)$/;"	f	typeref:typename:int	file:
tegra_plle_train	arch/arm/mach-tegra/tegra30/clock.c	/^static int tegra_plle_train(void)$/;"	f	typeref:typename:int	file:
tegra_pllref_enable	arch/arm/mach-tegra/tegra210/clock.c	/^static int tegra_pllref_enable(void)$/;"	f	typeref:typename:int	file:
tegra_port_info	drivers/gpio/tegra_gpio.c	/^struct tegra_port_info {$/;"	s	file:
tegra_powergate	arch/arm/include/asm/arch-tegra/powergate.h	/^enum tegra_powergate {$/;"	g
tegra_powergate_power_off	arch/arm/mach-tegra/powergate.c	/^int tegra_powergate_power_off(enum tegra_powergate id)$/;"	f	typeref:typename:int
tegra_powergate_power_on	arch/arm/mach-tegra/powergate.c	/^int tegra_powergate_power_on(enum tegra_powergate id)$/;"	f	typeref:typename:int
tegra_powergate_ram_repair	arch/arm/mach-tegra/powergate.c	/^static void tegra_powergate_ram_repair(void)$/;"	f	typeref:typename:void	file:
tegra_powergate_remove_clamping	arch/arm/mach-tegra/powergate.c	/^static int tegra_powergate_remove_clamping(enum tegra_powergate id)$/;"	f	typeref:typename:int	file:
tegra_powergate_sequence_power_up	arch/arm/mach-tegra/powergate.c	/^int tegra_powergate_sequence_power_up(enum tegra_powergate id,$/;"	f	typeref:typename:int
tegra_powergate_set	arch/arm/mach-tegra/powergate.c	/^static int tegra_powergate_set(enum tegra_powergate id, bool state)$/;"	f	typeref:typename:int	file:
tegra_pwm_ids	drivers/pwm/tegra_pwm.c	/^static const struct udevice_id tegra_pwm_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_pwm_ofdata_to_platdata	drivers/pwm/tegra_pwm.c	/^static int tegra_pwm_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_pwm_ops	drivers/pwm/tegra_pwm.c	/^static const struct pwm_ops tegra_pwm_ops = {$/;"	v	typeref:typename:const struct pwm_ops	file:
tegra_pwm_priv	drivers/pwm/tegra_pwm.c	/^struct tegra_pwm_priv {$/;"	s	file:
tegra_pwm_set_config	drivers/pwm/tegra_pwm.c	/^static int tegra_pwm_set_config(struct udevice *dev, uint channel,$/;"	f	typeref:typename:int	file:
tegra_pwm_set_enable	drivers/pwm/tegra_pwm.c	/^static int tegra_pwm_set_enable(struct udevice *dev, uint channel, bool enable)$/;"	f	typeref:typename:int	file:
tegra_set_emc	arch/arm/mach-tegra/tegra20/emc.c	/^int tegra_set_emc(const void *blob, unsigned rate)$/;"	f	typeref:typename:int
tegra_soc_board_init_late	arch/arm/mach-tegra/board186.c	/^__weak int tegra_soc_board_init_late(void)$/;"	f	typeref:typename:__weak int
tegra_soc_board_init_late	arch/arm/mach-tegra/tegra186/nvtboot_board.c	/^int tegra_soc_board_init_late(void)$/;"	f	typeref:typename:int
tegra_soc_mipipadctrl_groups	arch/arm/mach-tegra/tegra124/pinmux.c	/^const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = tegra124_mipipadctrl_group/;"	v	typeref:typename:const struct pmux_mipipadctrlgrp_desc *
tegra_soc_pingroups	arch/arm/mach-tegra/tegra114/pinmux.c	/^const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra114_pingroups;$/;"	v	typeref:typename:const struct pmux_pingrp_desc *
tegra_soc_pingroups	arch/arm/mach-tegra/tegra124/pinmux.c	/^const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;$/;"	v	typeref:typename:const struct pmux_pingrp_desc *
tegra_soc_pingroups	arch/arm/mach-tegra/tegra20/pinmux.c	/^const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra20_pingroups;$/;"	v	typeref:typename:const struct pmux_pingrp_desc *
tegra_soc_pingroups	arch/arm/mach-tegra/tegra210/pinmux.c	/^const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra210_pingroups;$/;"	v	typeref:typename:const struct pmux_pingrp_desc *
tegra_soc_pingroups	arch/arm/mach-tegra/tegra30/pinmux.c	/^const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra30_pingroups;$/;"	v	typeref:typename:const struct pmux_pingrp_desc *
tegra_sor_ids	drivers/video/tegra124/sor.c	/^static const struct udevice_id tegra_sor_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tegra_sor_ofdata_to_platdata	drivers/video/tegra124/sor.c	/^static int tegra_sor_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tegra_sor_ops	drivers/video/tegra124/sor.c	/^static const struct video_bridge_ops tegra_sor_ops = {$/;"	v	typeref:typename:const struct video_bridge_ops	file:
tegra_sor_precharge_lanes	drivers/video/tegra124/sor.c	/^int tegra_sor_precharge_lanes(struct udevice *dev,$/;"	f	typeref:typename:int
tegra_sor_readl	drivers/video/tegra124/sor.c	/^static inline u32 tegra_sor_readl(struct tegra_dc_sor_data *sor, u32 reg)$/;"	f	typeref:typename:u32	file:
tegra_sor_set_backlight	drivers/video/tegra124/sor.c	/^static int tegra_sor_set_backlight(struct udevice *dev, int percent)$/;"	f	typeref:typename:int	file:
tegra_sor_write_field	drivers/video/tegra124/sor.c	/^static inline void tegra_sor_write_field(struct tegra_dc_sor_data *sor,$/;"	f	typeref:typename:void	file:
tegra_sor_writel	drivers/video/tegra124/sor.c	/^static inline void tegra_sor_writel(struct tegra_dc_sor_data *sor, u32 reg,$/;"	f	typeref:typename:void	file:
tegra_spi_platdata	drivers/spi/tegra_spi.h	/^struct tegra_spi_platdata {$/;"	s
tegra_spi_slave	drivers/spi/tegra20_slink.c	/^struct tegra_spi_slave {$/;"	s	file:
tegra_xusb_padctl	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_padctl {$/;"	s
tegra_xusb_padctl_config	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_padctl_config {$/;"	s
tegra_xusb_padctl_config_apply	arch/arm/mach-tegra/xusb-padctl-common.c	/^tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_config_parse_dt	arch/arm/mach-tegra/xusb-padctl-common.c	/^tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_disable	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_disable	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_enable	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^static int tegra_xusb_padctl_enable(struct tegra_xusb_padctl *padctl)$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_enable	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^static int tegra_xusb_padctl_enable(struct tegra_xusb_padctl *padctl)$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_find_function	arch/arm/mach-tegra/xusb-padctl-common.c	/^static int tegra_xusb_padctl_find_function(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_find_lane	arch/arm/mach-tegra/xusb-padctl-common.c	/^tegra_xusb_padctl_find_lane(struct tegra_xusb_padctl *padctl, const char *name)$/;"	f	typeref:typename:const struct tegra_xusb_padctl_lane *	file:
tegra_xusb_padctl_group	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_padctl_group {$/;"	s
tegra_xusb_padctl_group_apply	arch/arm/mach-tegra/xusb-padctl-common.c	/^tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_group_parse_dt	arch/arm/mach-tegra/xusb-padctl-common.c	/^tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_init	arch/arm/mach-tegra/tegra124/xusb-padctl.c	/^void tegra_xusb_padctl_init(const void *fdt)$/;"	f	typeref:typename:void
tegra_xusb_padctl_init	arch/arm/mach-tegra/tegra210/xusb-padctl.c	/^void tegra_xusb_padctl_init(const void *fdt)$/;"	f	typeref:typename:void
tegra_xusb_padctl_init	arch/arm/mach-tegra/xusb-padctl-dummy.c	/^void __weak tegra_xusb_padctl_init(const void *fdt)$/;"	f	typeref:typename:void __weak
tegra_xusb_padctl_lane	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_padctl_lane {$/;"	s
tegra_xusb_padctl_lane_find_function	arch/arm/mach-tegra/xusb-padctl-common.c	/^tegra_xusb_padctl_lane_find_function(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_parse_dt	arch/arm/mach-tegra/xusb-padctl-common.c	/^static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,$/;"	f	typeref:typename:int	file:
tegra_xusb_padctl_pin	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_padctl_pin {$/;"	s
tegra_xusb_padctl_soc	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_padctl_soc {$/;"	s
tegra_xusb_phy	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_phy {$/;"	s
tegra_xusb_phy_disable	arch/arm/mach-tegra/xusb-padctl-common.c	/^int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int
tegra_xusb_phy_disable	arch/arm/mach-tegra/xusb-padctl-dummy.c	/^int __weak tegra_xusb_phy_disable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int __weak
tegra_xusb_phy_enable	arch/arm/mach-tegra/xusb-padctl-common.c	/^int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int
tegra_xusb_phy_enable	arch/arm/mach-tegra/xusb-padctl-dummy.c	/^int __weak tegra_xusb_phy_enable(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int __weak
tegra_xusb_phy_get	arch/arm/mach-tegra/xusb-padctl-common.c	/^struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type)$/;"	f	typeref:struct:tegra_xusb_phy *
tegra_xusb_phy_get	arch/arm/mach-tegra/xusb-padctl-dummy.c	/^struct tegra_xusb_phy * __weak tegra_xusb_phy_get(unsigned int type)$/;"	f	typeref:struct:tegra_xusb_phy * __weak
tegra_xusb_phy_ops	arch/arm/mach-tegra/xusb-padctl-common.h	/^struct tegra_xusb_phy_ops {$/;"	s
tegra_xusb_phy_prepare	arch/arm/mach-tegra/xusb-padctl-common.c	/^int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int
tegra_xusb_phy_prepare	arch/arm/mach-tegra/xusb-padctl-dummy.c	/^int __weak tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int __weak
tegra_xusb_phy_unprepare	arch/arm/mach-tegra/xusb-padctl-common.c	/^int tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int
tegra_xusb_phy_unprepare	arch/arm/mach-tegra/xusb-padctl-dummy.c	/^int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy)$/;"	f	typeref:typename:int __weak
tegra_xusb_process_nodes	arch/arm/mach-tegra/xusb-padctl-common.c	/^int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,$/;"	f	typeref:typename:int
telephone_call	include/usbdescriptors.h	/^		struct usb_class_telephone_call_descriptor telephone_call;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_telephone_call_descriptor
telephone_operational	include/usbdescriptors.h	/^		struct usb_class_telephone_operational_descriptor telephone_operational;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_telephone_operational_descriptor
telephone_ringer	include/usbdescriptors.h	/^		struct usb_class_telephone_ringer_descriptor telephone_ringer;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_telephone_ringer_descriptor
temac_ctrl	drivers/net/xilinx_ll_temac.h	/^enum temac_ctrl {$/;"	g
temac_reg	drivers/net/xilinx_ll_temac.h	/^struct temac_reg {$/;"	s
temoder	drivers/qe/uec.h	/^	u16  temoder;$/;"	m	struct:uec_tx_global_pram	typeref:typename:u16
temp	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t temp;$/;"	m	struct:cmd_thermal_get_temp_response	typeref:typename:int32_t
temp	drivers/hwmon/lm63.c	/^	u8 temp;$/;"	m	struct:pwm_lookup_entry	typeref:typename:u8	file:
temp	drivers/video/ipu.h	/^		uint32_t temp;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0608	typeref:typename:uint32_t
temp	drivers/video/ipu.h	/^		uint32_t temp;$/;"	m	struct:__anon4a35f9fd040a::__anon4a35f9fd0808	typeref:typename:uint32_t
tempBuf	lib/lzma/LzmaDec.h	/^  Byte tempBuf[LZMA_REQUIRED_INPUT_MAX];$/;"	m	struct:__anon7c0cd2440108	typeref:typename:Byte[]
tempBufSize	lib/lzma/LzmaDec.h	/^  unsigned tempBufSize;$/;"	m	struct:__anon7c0cd2440108	typeref:typename:unsigned
temp_alert_config	arch/arm/include/asm/emif.h	/^	u32 temp_alert_config;$/;"	m	struct:emif_regs	typeref:typename:u32
temp_buffer	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_buffer temp_buffer[YAFFS_N_TEMP_BUFFERS];$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_buffer[]
temp_in_use	fs/yaffs2/yaffs_guts.h	/^	int temp_in_use;$/;"	m	struct:yaffs_dev	typeref:typename:int
temp_mmio_base	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t temp_mmio_base;$/;"	m	struct:pei_data	typeref:typename:uint32_t
temp_n_block	drivers/block/sata_dwc.c	/^static u32	temp_n_block = 0;$/;"	v	typeref:typename:u32	file:
temp_ram_init_params	arch/x86/lib/fsp/fsp_car.S	/^temp_ram_init_params:$/;"	l
temp_ram_init_ret	arch/x86/lib/fsp/fsp_car.S	/^temp_ram_init_ret:$/;"	l
temp_ram_init_romstack	arch/x86/lib/fsp/fsp_car.S	/^temp_ram_init_romstack:$/;"	l
tempbuff	common/scsi.c	/^static unsigned char tempbuff[512]; \/* temporary data buffer *\/$/;"	v	typeref:typename:unsigned char[512]	file:
tempcal	board/freescale/common/sys_eeprom.c	/^	u8 tempcal[8];    \/* 0x20 - 0x27 Temperature Calibration Factors *\/$/;"	m	struct:eeprom	typeref:typename:u8[8]	file:
tempcal	board/varisys/common/sys_eeprom.c	/^	u8 tempcal[8];    \/* 0x20 - 0x27 Temperature Calibration Factors *\/$/;"	m	struct:eeprom	typeref:typename:u8[8]	file:
tempcalflags	board/freescale/common/sys_eeprom.c	/^	u8 tempcalflags;  \/* 0x2a        Temperature Calibration Flags *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
tempcalflags	board/varisys/common/sys_eeprom.c	/^	u8 tempcalflags;  \/* 0x2a        Temperature Calibration Flags *\/$/;"	m	struct:eeprom	typeref:typename:u8	file:
tempcalsys	board/freescale/common/sys_eeprom.c	/^	u8 tempcalsys[2]; \/* 0x28 - 0x29 System Temperature Calibration Factors *\/$/;"	m	struct:eeprom	typeref:typename:u8[2]	file:
tempcalsys	board/varisys/common/sys_eeprom.c	/^	u8 tempcalsys[2]; \/* 0x28 - 0x29 System Temperature Calibration Factors *\/$/;"	m	struct:eeprom	typeref:typename:u8[2]	file:
tempccb	common/scsi.c	/^static ccb tempccb;	\/* temporary scsi command buffer *\/$/;"	v	typeref:typename:ccb	file:
temperature_params	drivers/power/exynos-tmu.c	/^struct temperature_params {$/;"	s	file:
tempmon	arch/arm/dts/imx6qdl.dtsi	/^			tempmon: tempmon {$/;"	l
tempmon	arch/arm/dts/imx6ull.dtsi	/^			tempmon: tempmon {$/;"	l
temporary_timeout	test/py/u_boot_console_base.py	/^    def temporary_timeout(self, timeout):$/;"	m	class:ConsoleBase
tempsense0	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense0;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense0	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense0;		\/* 0x180 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense0	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense0;			\/* offset 0x0300 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense0_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense0_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense0_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense0_clr;		\/* 0x188 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense0_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense0_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense0_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense0_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense0_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense0_set;		\/* 0x184 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense0_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense0_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense0_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense0_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense0_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense0_tog;		\/* 0x18c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense0_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense0_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense1	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense1;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense1	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense1;		\/* 0x190 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense1	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense1;			\/* offset 0x0310 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense1_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense1_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense1_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense1_clr;		\/* 0x198 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense1_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense1_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense1_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense1_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense1_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense1_set;		\/* 0x194 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense1_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense1_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense1_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 tempsense1_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
tempsense1_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	tempsense1_tog;		\/* 0x19c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
tempsense1_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense1_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense_trim	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense_trim;		\/* offset 0x0320 *\/$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense_trim_clr	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense_trim_clr;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense_trim_set	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense_trim_set;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tempsense_trim_tog	arch/arm/include/asm/arch-mx7/crm_regs.h	/^	uint32_t tempsense_trim_tog;$/;"	m	struct:mxc_ccm_anatop_reg	typeref:typename:uint32_t
tenable	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int tenable;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
tenablediv	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int tenablediv;$/;"	m	struct:ad_pll	typeref:typename:unsigned int	file:
tenv	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tenv;		\/* 0x0E *\/$/;"	m	struct:atac	typeref:typename:u8
teoi	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t teoi;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
ter	arch/m68k/include/asm/timer.h	/^	u8 ter;			\/* 0x11 Event register *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u8
ter1	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ter1;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
ter2	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ter2;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
ter3	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ter3;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
ter4	arch/powerpc/include/asm/immap_85xx.h	/^	u16	ter4;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
term	drivers/video/rockchip/rk_hdmi.c	/^	u32 term;       \/* transmission termination value *\/$/;"	m	struct:hdmi_phy_config	typeref:typename:u32	file:
term_args	arch/sandbox/cpu/start.c	/^static const char *term_args[STATE_TERM_COUNT] = {$/;"	v	typeref:typename:const char * []	file:
term_raw	arch/sandbox/include/asm/state.h	/^	enum state_terminal_raw term_raw;	\/* Terminal raw\/cooked *\/$/;"	m	struct:sandbox_state	typeref:enum:state_terminal_raw
term_read_reply	lib/efi_loader/efi_console.c	/^static int term_read_reply(int *n, int maxnum, char end_char)$/;"	f	typeref:typename:int	file:
term_setup	arch/sandbox/cpu/os.c	/^static bool term_setup;$/;"	v	typeref:typename:bool	file:
terminator	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint16_t terminator;			\/* Offset 0x0100 *\/$/;"	m	struct:upd_region	typeref:typename:uint16_t
terminator	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u16	terminator;		\/* Offset 0x021F *\/$/;"	m	struct:upd_region	typeref:typename:u16
terp	examples/standalone/timer.c	/^  ushort	*terp;		\/* Pointer to Timer Event Register	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:ushort *	file:
test	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 test;$/;"	m	struct:cspi_regs	typeref:typename:u32
test	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 test;$/;"	m	struct:cspi_regs	typeref:typename:u32
test	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 test;$/;"	m	struct:cspi_regs	typeref:typename:u32
test	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void test(void)$/;"	f	typeref:typename:void	file:
test	drivers/net/lpc32xx_eth.c	/^	u32 test;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
test	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic test; \/* 0x270*\/$/;"	m	struct:pic32_emac_regs	typeref:struct:pic32_reg_atomic
test	include/part.h	/^	int (*test)(struct blk_desc *dev_desc);$/;"	m	struct:part_driver	typeref:typename:int (*)(struct blk_desc * dev_desc)
test	include/post.h	/^	int (*test) (int flags);$/;"	m	struct:post_test	typeref:typename:int (*)(int flags)
test	test/overlay/test-fdt-base.dts	/^	test: test-node {$/;"	l
testBadBranch	tools/buildman/func_test.py	/^    def testBadBranch(self):$/;"	m	class:TestFunctional
testBadToolchain	tools/buildman/func_test.py	/^    def testBadToolchain(self):$/;"	m	class:TestFunctional
testBasic	tools/patman/test.py	/^    def testBasic(self):$/;"	m	class:TestPatch
testBoardAll	tools/buildman/test.py	/^    def testBoardAll(self):$/;"	m	class:TestBuild
testBoardArch	tools/buildman/test.py	/^    def testBoardArch(self):$/;"	m	class:TestBuild
testBoardArchSingle	tools/buildman/test.py	/^    def testBoardArchSingle(self):$/;"	m	class:TestBuild
testBoardArchSingleMultiWord	tools/buildman/test.py	/^    def testBoardArchSingleMultiWord(self):$/;"	m	class:TestBuild
testBoardDuplicate	tools/buildman/test.py	/^    def testBoardDuplicate(self):$/;"	m	class:TestBuild
testBoardRegularExpression	tools/buildman/test.py	/^    def testBoardRegularExpression(self):$/;"	m	class:TestBuild
testBoardSingle	tools/buildman/test.py	/^    def testBoardSingle(self):$/;"	m	class:TestBuild
testBoardSingleAnd	tools/buildman/test.py	/^    def testBoardSingleAnd(self):$/;"	m	class:TestBuild
testBoardTwoAnd	tools/buildman/test.py	/^    def testBoardTwoAnd(self):$/;"	m	class:TestBuild
testBranch	tools/buildman/func_test.py	/^    def testBranch(self):$/;"	m	class:TestFunctional
testBranchWithSlash	tools/buildman/func_test.py	/^    def testBranchWithSlash(self):$/;"	m	class:TestFunctional
testCount	tools/buildman/func_test.py	/^    def testCount(self):$/;"	m	class:TestFunctional
testCurrentSource	tools/buildman/func_test.py	/^    def testCurrentSource(self):$/;"	m	class:TestFunctional
testErrors	tools/buildman/func_test.py	/^    def testErrors(self):$/;"	m	class:TestFunctional
testForceBuild	tools/buildman/func_test.py	/^    def testForceBuild(self):$/;"	m	class:TestFunctional
testForceReconfigure	tools/buildman/func_test.py	/^    def testForceReconfigure(self):$/;"	m	class:TestFunctional
testFullHelp	tools/buildman/func_test.py	/^    def testFullHelp(self):$/;"	m	class:TestFunctional
testGitSetup	tools/buildman/func_test.py	/^    def testGitSetup(self):$/;"	m	class:TestFunctional
testGood	tools/patman/test.py	/^    def testGood(self):$/;"	m	class:TestPatch
testHelp	tools/buildman/func_test.py	/^    def testHelp(self):$/;"	m	class:TestFunctional
testIncremental	tools/buildman/func_test.py	/^    def testIncremental(self):$/;"	m	class:TestFunctional
testIndent	tools/patman/test.py	/^    def testIndent(self):$/;"	m	class:TestPatch
testNoBoards	tools/buildman/func_test.py	/^    def testNoBoards(self):$/;"	m	class:TestFunctional
testNoSignoff	tools/patman/test.py	/^    def testNoSignoff(self):$/;"	m	class:TestPatch
testOutput	tools/buildman/test.py	/^    def testOutput(self):$/;"	m	class:TestBuild
testOutputDir	tools/buildman/test.py	/^    def testOutputDir(self):$/;"	m	class:TestBuild
testOutputDirCurrent	tools/buildman/test.py	/^    def testOutputDirCurrent(self):$/;"	m	class:TestBuild
testOutputDirNoSubdirs	tools/buildman/test.py	/^    def testOutputDirNoSubdirs(self):$/;"	m	class:TestBuild
testSpaces	tools/patman/test.py	/^    def testSpaces(self):$/;"	m	class:TestPatch
testToolchainAliases	tools/buildman/test.py	/^    def testToolchainAliases(self):$/;"	m	class:TestBuild
testToolchainDownload	tools/buildman/test.py	/^    def testToolchainDownload(self):$/;"	m	class:TestBuild
testUpdateMenu	scripts/kconfig/qconf.cc	/^void ConfigItem::testUpdateMenu(bool v)$/;"	f	class:ConfigItem	typeref:typename:void
test_addr	arch/arm/mach-exynos/dmc_init_ddr3.c	/^const unsigned int test_addr = CONFIG_SYS_SDRAM_BASE;$/;"	v	typeref:typename:const unsigned int
test_and_change_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/microblaze/include/asm/bitops.h	/^static inline int test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int test_and_change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/mips/include/asm/bitops.h	/^test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/nios2/include/asm/bitops/atomic.h	/^static inline int test_and_change_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int test_and_change_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/sh/include/asm/bitops.h	/^static inline int test_and_change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_change_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int test_and_change_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/arm/include/asm/bitops.h	/^static inline int test_and_clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/microblaze/include/asm/bitops.h	/^static inline int test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int test_and_clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/mips/include/asm/bitops.h	/^test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/nios2/include/asm/bitops/atomic.h	/^static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int test_and_clear_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/sandbox/include/asm/bitops.h	/^static inline int test_and_clear_bit(int nr, void *addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/sh/include/asm/bitops.h	/^static inline int test_and_clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_clear_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int test_and_clear_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/arm/include/asm/bitops.h	/^static inline int test_and_set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/blackfin/include/asm/bitops.h	/^static __inline__ int test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/m68k/include/asm/bitops.h	/^static inline int test_and_set_bit(int nr, volatile void *vaddr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/microblaze/include/asm/bitops.h	/^static inline int test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int test_and_set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/mips/include/asm/bitops.h	/^test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/nios2/include/asm/bitops/atomic.h	/^static inline int test_and_set_bit(int nr, volatile unsigned long *addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/sandbox/include/asm/bitops.h	/^static inline int test_and_set_bit(int nr, void *addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/sh/include/asm/bitops.h	/^static inline int test_and_set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int test_and_set_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
test_and_set_bit	arch/xtensa/include/asm/bitops.h	/^static inline int test_and_set_bit(int nr, volatile void *addr)$/;"	f	typeref:typename:int
test_basic_input	tools/patman/cros_subprocess.py	/^    def test_basic_input(self):$/;"	m	class:TestSubprocess
test_bind	test/dm/test-driver.c	/^static int test_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_bit	arch/arm/include/asm/bitops.h	/^static inline int test_bit(int nr, const void * addr)$/;"	f	typeref:typename:int
test_bit	arch/blackfin/include/asm/bitops.h	/^#define	test_bit(/;"	d
test_bit	arch/m68k/include/asm/bitops.h	/^static inline int test_bit(int nr, __const__ volatile void *addr)$/;"	f	typeref:typename:int
test_bit	arch/microblaze/include/asm/bitops.h	/^#define test_bit(/;"	d
test_bit	arch/mips/include/asm/bitops.h	/^static __inline__ int test_bit(int nr, const volatile void *addr)$/;"	f	typeref:typename:int
test_bit	arch/nds32/include/asm/bitops.h	/^static inline int test_bit(int nr, const void *addr)$/;"	f	typeref:typename:int
test_bit	arch/nios2/include/asm/bitops/non-atomic.h	/^static inline int test_bit(int nr, const volatile unsigned long *addr)$/;"	f	typeref:typename:int
test_bit	arch/powerpc/include/asm/bitops.h	/^static __inline__ int test_bit(int nr, __const__ volatile void *addr)$/;"	f	typeref:typename:int
test_bit	arch/sandbox/include/asm/bitops.h	/^static inline int test_bit(int nr, const void *addr)$/;"	f	typeref:typename:int
test_bit	arch/x86/include/asm/bitops.h	/^#define test_bit(/;"	d
test_bit	arch/xtensa/include/asm/bitops.h	/^static inline int test_bit(int nr, const void *addr)$/;"	f	typeref:typename:int
test_block_type	disk/part_dos.c	/^static int test_block_type(unsigned char *buffer)$/;"	f	typeref:typename:int	file:
test_burst	examples/standalone/test_burst.c	/^int test_burst (int argc, char * const argv[])$/;"	f	typeref:typename:int
test_burst_start	examples/standalone/test_burst.c	/^static int test_burst_start (unsigned long size, unsigned long pattern)$/;"	f	typeref:typename:int	file:
test_bus_parent_data	test/dm/bus.c	/^static int test_bus_parent_data(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
test_bus_parent_platdata	test/dm/bus.c	/^static int test_bus_parent_platdata(struct unit_test_state *uts)$/;"	f	typeref:typename:int	file:
test_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^void test_byte(u8 d, u8 s)$/;"	f	typeref:typename:void
test_clk	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 test_clk;		\/* Test Clock Selection Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
test_cmd	test/command_ut.c	/^static const char test_cmd[] = "setenv list 1\\n setenv list ${list}2; "$/;"	v	typeref:typename:const char[]	file:
test_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 test_cntrl;		\/* MBAR_ETH + 0x108 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
test_colors	common/lcd.c	/^static int test_colors[N_BLK_HOR * N_BLK_VERT] = {$/;"	v	typeref:typename:int[]	file:
test_commands	test/dm/cmd_dm.c	/^static cmd_tbl_t test_commands[] = {$/;"	v	typeref:typename:cmd_tbl_t[]	file:
test_ctlr	post/cpu/mpc8xx/ether.c	/^static int test_ctlr (int ctlr, int index)$/;"	f	typeref:typename:int	file:
test_ctlr	post/cpu/mpc8xx/uart.c	/^static int test_ctlr (int ctlr, int index)$/;"	f	typeref:typename:int	file:
test_ctlr	post/cpu/ppc4xx/ether.c	/^static int test_ctlr (int devnum, int hw_addr)$/;"	f	typeref:typename:int	file:
test_ctlr	post/cpu/ppc4xx/uart.c	/^static int test_ctlr (struct NS16550 *com_port, int index)$/;"	f	typeref:typename:int	file:
test_ctrl_c	test/py/tests/test_sandbox_exit.py	/^def test_ctrl_c(u_boot_console):$/;"	f
test_cwd	tools/patman/cros_subprocess.py	/^    def test_cwd(self):$/;"	m	class:TestSubprocess
test_cyrix_52div	arch/x86/cpu/cpu.c	/^static inline int test_cyrix_52div(void)$/;"	f	typeref:typename:int	file:
test_desc	examples/standalone/test_burst.c	/^static void test_desc(unsigned long size)$/;"	f	typeref:typename:void	file:
test_destroy	test/dm/test-uclass.c	/^static int test_destroy(struct uclass *uc)$/;"	f	typeref:typename:int	file:
test_devctl_hst_mode	drivers/usb/musb-new/musb_core.h	/^#define test_devctl_hst_mode(/;"	d
test_dfu	test/py/tests/test_dfu.py	/^def test_dfu(u_boot_console, env__usb_dev_port, env__dfu_config):$/;"	f
test_dipsw	board/renesas/sh7785lcr/selfcheck.c	/^static void test_dipsw(void)$/;"	f	typeref:typename:void	file:
test_dram	board/mpl/mip405/mip405.c	/^static int test_dram (unsigned long ramsize)$/;"	f	typeref:typename:int	file:
test_dram	board/mpl/pip405/pip405.c	/^static int test_dram (unsigned long ramsize)$/;"	f	typeref:typename:int	file:
test_dump_buf	examples/api/demo.c	/^void test_dump_buf(void *buf, int len)$/;"	f	typeref:typename:void
test_dump_di	examples/api/demo.c	/^void test_dump_di(int handle)$/;"	f	typeref:typename:void
test_dump_si	examples/api/demo.c	/^void test_dump_si(struct sys_info *si)$/;"	f	typeref:typename:void
test_dump_sig	examples/api/demo.c	/^void test_dump_sig(struct api_signature *sig)$/;"	f	typeref:typename:void
test_early_extend	cmd/tpm_test.c	/^static int test_early_extend(void)$/;"	f	typeref:typename:int	file:
test_early_nvram	cmd/tpm_test.c	/^static int test_early_nvram(void)$/;"	f	typeref:typename:int	file:
test_early_nvram2	cmd/tpm_test.c	/^static int test_early_nvram2(void)$/;"	f	typeref:typename:int	file:
test_ecc	post/cpu/ppc4xx/denali_ecc.c	/^static int test_ecc(uint32_t ecc_addr)$/;"	f	typeref:typename:int	file:
test_enable	cmd/tpm_test.c	/^static int test_enable(void)$/;"	f	typeref:typename:int	file:
test_env	tools/patman/cros_subprocess.py	/^    def test_env(self):$/;"	m	class:TestSubprocess
test_env_echo_exists	test/py/tests/test_env.py	/^def test_env_echo_exists(state_test_env):$/;"	f
test_env_echo_non_existent	test/py/tests/test_env.py	/^def test_env_echo_non_existent(state_test_env):$/;"	f
test_env_expansion_spaces	test/py/tests/test_env.py	/^def test_env_expansion_spaces(state_test_env):$/;"	f
test_env_printenv_non_existent	test/py/tests/test_env.py	/^def test_env_printenv_non_existent(state_test_env):$/;"	f
test_env_set_existing	test/py/tests/test_env.py	/^def test_env_set_existing(state_test_env):$/;"	f
test_env_set_non_existent	test/py/tests/test_env.py	/^def test_env_set_non_existent(state_test_env):$/;"	f
test_env_unset_existing	test/py/tests/test_env.py	/^def test_env_unset_existing(state_test_env):$/;"	f
test_env_unset_non_existent	test/py/tests/test_env.py	/^def test_env_unset_non_existent(state_test_env):$/;"	f
test_error	examples/standalone/test_burst.c	/^static void test_error($/;"	f	typeref:typename:void	file:
test_extra_args	tools/patman/cros_subprocess.py	/^    def test_extra_args(self):$/;"	m	class:TestSubprocess
test_fast_enable	cmd/tpm_test.c	/^static int test_fast_enable(void)$/;"	f	typeref:typename:int	file:
test_fs_nonfs	test/fs/fs-test.sh	/^function test_fs_nonfs() {$/;"	f
test_get_timer	test/time_ut.c	/^static int test_get_timer(void)$/;"	f	typeref:typename:int	file:
test_global_lock	cmd/tpm_test.c	/^static int test_global_lock(void)$/;"	f	typeref:typename:int	file:
test_help	test/py/tests/test_help.py	/^def test_help(u_boot_console):$/;"	f
test_hush_if_test	test/py/tests/test_hush_if_test.py	/^def test_hush_if_test(u_boot_console, expr, result):$/;"	f
test_hush_if_test_host_file_exists	test/py/tests/test_hush_if_test.py	/^def test_hush_if_test_host_file_exists(u_boot_console):$/;"	f
test_hush_if_test_setup	test/py/tests/test_hush_if_test.py	/^def test_hush_if_test_setup(u_boot_console):$/;"	f
test_hush_if_test_teardown	test/py/tests/test_hush_if_test.py	/^def test_hush_if_test_teardown(u_boot_console):$/;"	f
test_image	test/fs/fs-test.sh	/^function test_image() {$/;"	f
test_info	cmd/sf.c	/^struct test_info {$/;"	s	file:
test_init	test/dm/test-uclass.c	/^static int test_init(struct uclass *uc)$/;"	f	typeref:typename:int	file:
test_isatty	tools/patman/cros_subprocess.py	/^    def test_isatty(self):$/;"	m	class:TestSubprocess
test_led	board/renesas/sh7785lcr/selfcheck.c	/^static void test_led(void)$/;"	f	typeref:typename:void	file:
test_list_args	tools/patman/cros_subprocess.py	/^    def test_list_args(self):$/;"	m	class:TestSubprocess
test_lock	cmd/tpm_test.c	/^static int test_lock(void)$/;"	f	typeref:typename:int	file:
test_long	drivers/bios_emulator/x86emu/prim_ops.c	/^void test_long(u32 d, u32 s)$/;"	f	typeref:typename:void
test_manual_bind	test/dm/test-driver.c	/^static int test_manual_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_manual_drv_ping	test/dm/test-driver.c	/^static int test_manual_drv_ping(struct udevice *dev, int pingval, int *pingret)$/;"	f	typeref:typename:int	file:
test_manual_ops	test/dm/test-driver.c	/^static const struct test_ops test_manual_ops = {$/;"	v	typeref:typename:const struct test_ops	file:
test_manual_probe	test/dm/test-driver.c	/^static int test_manual_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_manual_remove	test/dm/test-driver.c	/^static int test_manual_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_manual_unbind	test/dm/test-driver.c	/^static int test_manual_unbind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_map_8M	examples/standalone/test_burst.c	/^static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached)$/;"	f	typeref:typename:void	file:
test_md	test/py/tests/test_md.py	/^def test_md(u_boot_console):$/;"	f
test_md_repeat	test/py/tests/test_md.py	/^def test_md_repeat(u_boot_console):$/;"	f
test_mmu_is_on	examples/standalone/test_burst.c	/^static int test_mmu_is_on(void)$/;"	f	typeref:typename:int	file:
test_mode	drivers/i2c/sandbox_i2c.c	/^	bool test_mode;$/;"	m	struct:sandbox_i2c_priv	typeref:typename:bool	file:
test_mode	drivers/misc/i2c_eeprom_emul.c	/^	enum sandbox_i2c_eeprom_test_mode test_mode;$/;"	m	struct:sandbox_i2c_flash_plat_data	typeref:enum:sandbox_i2c_eeprom_test_mode	file:
test_mode	drivers/usb/dwc3/core.h	/^	u8			test_mode;$/;"	m	struct:dwc3	typeref:typename:u8
test_mode	drivers/usb/gadget/atmel_usba_udc.h	/^	u16 test_mode;$/;"	m	struct:usba_udc	typeref:typename:u16
test_mode	drivers/usb/musb-new/musb_core.h	/^	unsigned		test_mode:1;$/;"	m	struct:musb	typeref:typename:unsigned:1
test_mode	include/i2c.h	/^	bool test_mode;$/;"	m	struct:dm_i2c_chip	typeref:typename:bool
test_mode_nr	drivers/usb/dwc3/core.h	/^	u8			test_mode_nr;$/;"	m	struct:dwc3	typeref:typename:u8
test_mode_nr	drivers/usb/musb-new/musb_core.h	/^	u8			test_mode_nr;$/;"	m	struct:musb	typeref:typename:u8
test_net	board/renesas/sh7785lcr/selfcheck.c	/^static void test_net(void)$/;"	f	typeref:typename:void	file:
test_net_dhcp	test/py/tests/test_net.py	/^def test_net_dhcp(u_boot_console):$/;"	f
test_net_nfs	test/py/tests/test_net.py	/^def test_net_nfs(u_boot_console):$/;"	f
test_net_ping	test/py/tests/test_net.py	/^def test_net_ping(u_boot_console):$/;"	f
test_net_pre_commands	test/py/tests/test_net.py	/^def test_net_pre_commands(u_boot_console):$/;"	f
test_net_setup_static	test/py/tests/test_net.py	/^def test_net_setup_static(u_boot_console):$/;"	f
test_net_tftpboot	test/py/tests/test_net.py	/^def test_net_tftpboot(u_boot_console):$/;"	f
test_ofplatdata	test/py/tests/test_ofplatdata.py	/^def test_ofplatdata(u_boot_console):$/;"	f
test_ops	include/dm/test.h	/^struct test_ops {$/;"	s
test_ops	test/dm/test-driver.c	/^static const struct test_ops test_ops = {$/;"	v	typeref:typename:const struct test_ops	file:
test_ops	test/dm/test-fdt.c	/^static const struct test_ops test_ops = {$/;"	v	typeref:typename:const struct test_ops	file:
test_pattern	arch/arm/mach-exynos/dmc_init_ddr3.c	/^static const unsigned int test_pattern[] = {$/;"	v	typeref:typename:const unsigned int[]	file:
test_pattern	common/lcd.c	/^static void test_pattern(void)$/;"	f	typeref:typename:void	file:
test_pattern	examples/standalone/test_burst.c	/^static unsigned long test_pattern [] = {$/;"	v	typeref:typename:unsigned long[]	file:
test_pattern_gen_ctrl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	test_pattern_gen_ctrl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
test_pattern_gen_en	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	test_pattern_gen_en;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
test_pci	board/renesas/sh7785lcr/selfcheck.c	/^static void test_pci(void)$/;"	f	typeref:typename:void	file:
test_pdata	test/dm/core.c	/^static const struct dm_test_pdata test_pdata[] = {$/;"	v	typeref:typename:const struct dm_test_pdata[]	file:
test_pdata_manual	test/dm/core.c	/^static const struct dm_test_pdata test_pdata_manual = {$/;"	v	typeref:typename:const struct dm_test_pdata	file:
test_pdata_pre_reloc	test/dm/core.c	/^static const struct dm_test_pdata test_pdata_pre_reloc = {$/;"	v	typeref:typename:const struct dm_test_pdata	file:
test_ping	test/dm/test-uclass.c	/^int test_ping(struct udevice *dev, int pingval, int *pingret)$/;"	f	typeref:typename:int
test_pld	board/renesas/sh7785lcr/selfcheck.c	/^static void test_pld(void)$/;"	f	typeref:typename:void	file:
test_post_bind	test/dm/test-uclass.c	/^static int test_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_post_probe	test/dm/test-uclass.c	/^static int test_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_pre_probe	test/dm/test-uclass.c	/^static int test_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_pre_remove	test/dm/test-uclass.c	/^static int test_pre_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_pre_unbind	test/dm/test-uclass.c	/^static int test_pre_unbind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_prepare	examples/standalone/test_burst.c	/^static void test_prepare (void)$/;"	f	typeref:typename:void	file:
test_probe	test/dm/test-driver.c	/^static int test_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_readonly	cmd/tpm_test.c	/^static int test_readonly(void)$/;"	f	typeref:typename:int	file:
test_redefine_unowned	cmd/tpm_test.c	/^static int test_redefine_unowned(void)$/;"	f	typeref:typename:int	file:
test_remove	test/dm/test-driver.c	/^static int test_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_reset	test/py/tests/test_sandbox_exit.py	/^def test_reset(u_boot_console):$/;"	f
test_result	tools/patman/command.py	/^test_result = None$/;"	v
test_sata	board/renesas/sh7785lcr/selfcheck.c	/^static void test_sata(void)$/;"	f	typeref:typename:void	file:
test_shell	tools/patman/cros_subprocess.py	/^    def test_shell(self):$/;"	m	class:TestSubprocess
test_shell_execute	test/py/tests/test_shell_basics.py	/^def test_shell_execute(u_boot_console):$/;"	f
test_shell_run	test/py/tests/test_shell_basics.py	/^def test_shell_run(u_boot_console):$/;"	f
test_shell_semicolon_three	test/py/tests/test_shell_basics.py	/^def test_shell_semicolon_three(u_boot_console):$/;"	f
test_shell_semicolon_two	test/py/tests/test_shell_basics.py	/^def test_shell_semicolon_two(u_boot_console):$/;"	f
test_shifts	arch/arm/mach-exynos/dmc_init_ddr3.c	/^void test_shifts(struct exynos5420_phy_control *phy_ctrl, int ch,$/;"	f	typeref:typename:void
test_simple	tools/patman/cros_subprocess.py	/^    def test_simple(self):$/;"	m	class:TestSubprocess
test_sizes_default	test/py/tests/test_dfu.py	/^test_sizes_default = ($/;"	v
test_sleep	test/py/tests/test_sleep.py	/^def test_sleep(u_boot_console):$/;"	f
test_sm107	board/renesas/sh7785lcr/selfcheck.c	/^static void test_sm107(void)$/;"	f	typeref:typename:void	file:
test_space_perm	cmd/tpm_test.c	/^static int test_space_perm(void)$/;"	f	typeref:typename:int	file:
test_startup	cmd/tpm_test.c	/^static int test_startup(void)$/;"	f	typeref:typename:int	file:
test_state	test/dm/bus.c	/^static struct dm_test_state *test_state;$/;"	v	typeref:struct:dm_test_state *	file:
test_stderr	tools/patman/cros_subprocess.py	/^    def test_stderr(self):$/;"	m	class:TestSubprocess
test_step	drivers/mtd/ubi/crc32.c	/^static u32 test_step(u32 init, unsigned char *buf, size_t len)$/;"	f	typeref:typename:u32	file:
test_stor_typ	examples/api/demo.c	/^static char *test_stor_typ(int type)$/;"	f	typeref:typename:char *	file:
test_time_comparison	test/time_ut.c	/^static int test_time_comparison(void)$/;"	f	typeref:typename:int	file:
test_timer	cmd/tpm_test.c	/^static int test_timer(void)$/;"	f	typeref:typename:int	file:
test_timer_get_us	test/time_ut.c	/^static int test_timer_get_us(void)$/;"	f	typeref:typename:int	file:
test_timing	cmd/tpm_test.c	/^static int test_timing(void)$/;"	f	typeref:typename:int	file:
test_types	test/stdint/int-types.c	/^int test_types(void)$/;"	f	typeref:typename:int
test_udelay	test/time_ut.c	/^static int test_udelay(void)$/;"	f	typeref:typename:int	file:
test_ums	test/py/tests/test_ums.py	/^def test_ums(u_boot_console, env__usb_dev_port, env__block_devs):$/;"	f
test_unbind	test/dm/test-driver.c	/^static int test_unbind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
test_unknown_command	test/py/tests/test_unknown_cmd.py	/^def test_unknown_command(u_boot_console):$/;"	f
test_usage	examples/standalone/test_burst.c	/^static void test_usage(void)$/;"	f	typeref:typename:void	file:
test_ut	test/py/tests/test_ut.py	/^def test_ut(u_boot_console, ut_subtest):$/;"	f
test_ut_dm_init	test/py/tests/test_ut.py	/^def test_ut_dm_init(u_boot_console):$/;"	f
test_vboot	test/py/tests/test_vboot.py	/^def test_vboot(u_boot_console):$/;"	f
test_version	test/py/tests/test_000_version.py	/^def test_version(u_boot_console):$/;"	f
test_watchdog	drivers/usb/gadget/pxa25x_udc.c	/^static inline void test_watchdog(struct pxa25x_udc *udc)$/;"	f	typeref:typename:void	file:
test_with_algo	test/py/tests/test_vboot.py	/^    def test_with_algo(sha_algo):$/;"	f	function:test_vboot	file:
test_word	drivers/bios_emulator/x86emu/prim_ops.c	/^void test_word(u16 d, u16 s)$/;"	f	typeref:typename:void
test_write	board/amcc/makalu/cmd_pll.c	/^test_write(void)$/;"	f	typeref:typename:void	file:
test_write_limit	cmd/tpm_test.c	/^static int test_write_limit(void)$/;"	f	typeref:typename:int	file:
testarea	post/cpu/ppc4xx/cache.c	/^static unsigned char testarea[CACHE_POST_SIZE]$/;"	v	typeref:typename:unsigned char[]	file:
testbuf	board/amcc/makalu/cmd_pll.c	/^testbuf[EEPROM_SDSTP_PARAM] = {$/;"	v	typeref:typename:uchar[]	file:
testbus_child_post_bind	test/dm/bus.c	/^static int testbus_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testbus_child_post_remove	test/dm/bus.c	/^static int testbus_child_post_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testbus_child_pre_probe	test/dm/bus.c	/^static int testbus_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testbus_child_pre_probe_uclass	test/dm/bus.c	/^static int testbus_child_pre_probe_uclass(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testbus_drv_probe	test/dm/bus.c	/^static int testbus_drv_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testbus_ids	test/dm/bus.c	/^static const struct udevice_id testbus_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
testcfg	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int testcfg;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
testctl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t testctl;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
testdev	include/dm/test.h	/^	struct udevice *testdev;$/;"	m	struct:dm_test_state	typeref:struct:udevice *
testdram	board/BuS/eb_cpu5282/eb_cpu5282.c	/^int testdram (void)$/;"	f	typeref:typename:int
testdram	board/cobra5272/cobra5272.c	/^int testdram (void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5208evbe/m5208evbe.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m52277evb/m52277evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5235evb/m5235evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5249evb/m5249evb.c	/^int testdram (void) {$/;"	f	typeref:typename:int
testdram	board/freescale/m5253demo/m5253demo.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5253evbe/m5253evbe.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5272c3/m5272c3.c	/^int testdram (void) {$/;"	f	typeref:typename:int
testdram	board/freescale/m5275evb/m5275evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m53017evb/m53017evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5329evb/m5329evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m5373evb/m5373evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m54418twr/m54418twr.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m54451evb/m54451evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m54455evb/m54455evb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m547xevb/m547xevb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/m548xevb/m548xevb.c	/^int testdram(void)$/;"	f	typeref:typename:int
testdram	board/freescale/mpc837xerdb/mpc837xerdb.c	/^testdram(void)$/;"	f	typeref:typename:int
testdram	board/sbc8548/sbc8548.c	/^testdram(void)$/;"	f	typeref:typename:int
testdram	board/sbc8641d/sbc8641d.c	/^int testdram (void)$/;"	f	typeref:typename:int
testdram	board/socrates/sdram.c	/^int testdram (void)$/;"	f	typeref:typename:int
testdrv_ping	test/dm/test-driver.c	/^static int testdrv_ping(struct udevice *dev, int pingval, int *pingret)$/;"	f	typeref:typename:int	file:
tester0	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 tester0;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
tester1	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 tester1;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
tester2	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 tester2;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
tester3	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 tester3;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
tester4	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 tester4;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
tester5	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 tester5;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
testfdt_drv_ping	test/dm/test-fdt.c	/^static int testfdt_drv_ping(struct udevice *dev, int pingval, int *pingret)$/;"	f	typeref:typename:int	file:
testfdt_drv_probe	test/dm/test-fdt.c	/^static int testfdt_drv_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testfdt_ids	test/dm/test-fdt.c	/^static const struct udevice_id testfdt_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
testfdt_ofdata_to_platdata	test/dm/test-fdt.c	/^static int testfdt_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
testfdt_ping	test/dm/test-fdt.c	/^int testfdt_ping(struct udevice *dev, int pingval, int *pingret)$/;"	f	typeref:typename:int
testid	include/post.h	/^	unsigned long testid;$/;"	m	struct:post_test	typeref:typename:unsigned long
testinfo_len	include/linux/ethtool.h	/^	__u32	testinfo_len;$/;"	m	struct:ethtool_drvinfo	typeref:typename:__u32
testmode	drivers/usb/musb-new/musb_core.h	/^	u8 index, testmode;$/;"	m	struct:musb_context_registers	typeref:typename:u8
testmode	drivers/usb/musb/musb_core.h	/^	u8	testmode;$/;"	m	struct:musb_regs	typeref:typename:u8
testmomde_ctrl	include/linux/mtd/omap_gpmc.h	/^	u32 testmomde_ctrl;	\/* 0x230 *\/$/;"	m	struct:gpmc	typeref:typename:u32
testr	drivers/block/dwc_ahsata.c	/^	u32 testr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
testr	drivers/block/sata_dwc.c	/^	u32 testr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
tests	Makefile	/^tests:$/;"	t
tests_failed	test/py/conftest.py	/^tests_failed = []$/;"	v
tests_not_run	test/py/conftest.py	/^tests_not_run = []$/;"	v
tests_passed	test/py/conftest.py	/^tests_passed = []$/;"	v
tests_skipped	test/py/conftest.py	/^tests_skipped = []$/;"	v
tests_xfailed	test/py/conftest.py	/^tests_xfailed = []$/;"	v
tests_xpassed	test/py/conftest.py	/^tests_xpassed = []$/;"	v
testthread	examples/standalone/sched.c	/^static int testthread (void *name)$/;"	f	typeref:typename:int	file:
tetris_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	tetris_clk,$/;"	e	enum:ext_clk_e
tetris_pll_config	board/ti/ks2_evm/board_k2g.c	/^static struct pll_init_data tetris_pll_config[NUM_SPDS] = {$/;"	v	typeref:struct:pll_init_data[]	file:
tetris_pll_config	board/ti/ks2_evm/board_k2hk.c	/^static struct pll_init_data tetris_pll_config[] = {$/;"	v	typeref:struct:pll_init_data[]	file:
tetris_pll_config	board/ti/ks2_evm/board_k2l.c	/^static struct pll_init_data tetris_pll_config[] = {$/;"	v	typeref:struct:pll_init_data[]	file:
texsr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 texsr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
texsr	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 texsr;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
texsr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 texsr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
texsr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 texsr;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
texsr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 texsr;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
texsr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 texsr;		\/* 0x10c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
text	arch/x86/include/asm/coreboot_tables.h	/^	u8 text[CMOS_MAX_TEXT_LENGTH];$/;"	m	struct:cb_cmos_enums	typeref:typename:u8[]
text	common/cli_hush.c	/^	char *text;					\/* name of job *\/$/;"	m	struct:pipe	typeref:typename:char *	file:
text	drivers/video/ct69000.c	/^#define text	/;"	d	file:
text	fs/yaffs2/yaffs_error.c	/^	const char *text;$/;"	m	struct:error_entry	typeref:typename:const char *	file:
text	include/u-boot/zlib.h	/^	int	text;	\/* true if compressed data believed to be text *\/$/;"	m	struct:gz_header_s	typeref:typename:int
text	scripts/kconfig/expr.h	/^	const char *text;          \/* the prompt value - P_PROMPT, P_MENU, P_COMMENT *\/$/;"	m	struct:property	typeref:typename:const char *
text	scripts/kconfig/lxdialog/dialog.h	/^	const char *text;$/;"	m	struct:subtitle_list	typeref:typename:const char *
text	scripts/kconfig/mconf.c	/^	const char *text;$/;"	m	struct:subtitle_part	typeref:typename:const char *	file:
text	scripts/kconfig/qconf.h	/^	QString text(colIdx idx) const$/;"	f	class:ConfigItem	typeref:typename:QString
text	scripts/kconfig/zconf.lex.c	/^static char *text;$/;"	v	typeref:typename:char *	file:
text_asize	scripts/kconfig/zconf.lex.c	/^static int text_size, text_asize;$/;"	v	typeref:typename:int	file:
text_insert_help	scripts/kconfig/gconf.c	/^static void text_insert_help(struct menu *menu)$/;"	f	typeref:typename:void	file:
text_insert_msg	scripts/kconfig/gconf.c	/^static void text_insert_msg(const char *title, const char *message)$/;"	f	typeref:typename:void	file:
text_offset	cmd/booti.c	/^	uint64_t	text_offset;	\/* Image load offset, LE *\/$/;"	m	struct:Image_header	typeref:typename:uint64_t	file:
text_offset	tools/proftool.c	/^unsigned long text_offset;		\/* text address of first function *\/$/;"	v	typeref:typename:unsigned long
text_size	scripts/kconfig/zconf.lex.c	/^static int text_size, text_asize;$/;"	v	typeref:typename:int	file:
text_w	scripts/kconfig/gconf.c	/^GtkWidget *text_w = NULL;$/;"	v	typeref:typename:GtkWidget *
textdomain	scripts/kconfig/lkc.h	/^static inline void textdomain(const char *domainname) {}$/;"	f	typeref:typename:void
textview3	scripts/kconfig/gconf.glade	/^		    <widget class="GtkTextView" id="textview3">$/;"	i
tf	drivers/block/sata_dwc.h	/^	struct ata_taskfile	tf;$/;"	m	struct:ata_queued_cmd	typeref:struct:ata_taskfile
tfalarm	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfalarm;	\/* PSC + 0x84 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfalarm	include/mpc5xxx.h	/^	volatile u16	tfalarm;	\/* PSC + 0x8e *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tfar	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfar;		\/* 0x1B8 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tfaw	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 tfaw;		\/* 0x98: EMC_TFAW *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
tfaw	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tfaw;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tfaw_min	include/ddr_spd.h	/^	uint8_t tfaw_min;		\/* 37 tFAW, lsb *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tfaw_min	include/ddr_spd.h	/^	unsigned char tfaw_min;        \/* 29 Min Four Activate Window$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
tfaw_msb	include/ddr_spd.h	/^	uint8_t tfaw_msb;		\/* 36 Upper Nibble for tFAW *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tfaw_msb	include/ddr_spd.h	/^	unsigned char tfaw_msb;        \/* 28 Upper Nibble for tFAW *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
tfaw_ps	include/fsl_ddr_dimm_params.h	/^	int tfaw_ps;	\/* four active window delay *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tfaw_window_four_activates_ps	include/fsl_ddr_sdram.h	/^	unsigned int tfaw_window_four_activates_ps;	\/* tFAW --  FOUR_ACT *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
tfcmd	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfcmd;		\/* PSC + 0x80 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfcntl	include/mpc5xxx.h	/^	volatile u8	tfcntl;		\/* PSC + 0x88 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u8
tfcount	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfcount;	\/* PSC + 0x94 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfcr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfcr;		\/* 0x1AC *\/$/;"	m	struct:fecdma	typeref:typename:u32
tfcr	include/commproc.h	/^	uchar	tfcr;		\/* Tx function code *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:uchar
tfcr	include/usb/mpc8xx_udc.h	/^	char tfcr;	\/* Tx Function code *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:char
tfcr	post/cpu/mpc8xx/usb.c	/^	uchar tfcr;$/;"	m	struct:usb_param_block	typeref:typename:uchar	file:
tfcs	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tfcs;		\/* TX FCS Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tfcs	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tfcs;		\/* 0x2471c - Transmit FCS Error Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tfcs	include/fsl_dtsec.h	/^	u32	tfcs;		\/* Transmit FCS error *\/$/;"	m	struct:dtsec	typeref:typename:u32
tfcs	include/tsec.h	/^	u32	tfcs;		\/* Transmit FCS Error *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tfd	drivers/block/dwc_ahsata.c	/^	u32 tfd;$/;"	m	struct:sata_port_regs	typeref:typename:u32	file:
tfdata	include/mpc5xxx.h	/^	volatile u32	tfdata;		\/* PSC + 0x80 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u32
tfdata_16	arch/powerpc/include/asm/immap_512x.h	/^#define tfdata_16	/;"	d
tfdata_32	arch/powerpc/include/asm/immap_512x.h	/^#define tfdata_32	/;"	d
tfdata_8	arch/powerpc/include/asm/immap_512x.h	/^#define tfdata_8	/;"	d
tfdata_buffer	arch/powerpc/include/asm/immap_512x.h	/^	} tfdata_buffer;$/;"	m	struct:psc512x	typeref:union:psc512x::__anond569131d050a
tfdr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 tfdr[16];	\/* 0x3C *\/$/;"	m	struct:dspi	typeref:typename:u32[16]
tfdr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 tfdr[4];	\/* 0x3C *\/$/;"	m	struct:dspi	typeref:typename:u32[4]
tfdr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfdr;		\/* 0x1A4 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tfdr	include/fsl_dspi.h	/^	u32 tfdr[16];	\/* 0x3C *\/$/;"	m	struct:dspi	typeref:typename:u32[16]
tfdr	include/fsl_dspi.h	/^	u32 tfdr[4];	\/* 0x3C *\/$/;"	m	struct:dspi	typeref:typename:u32[4]
tfifo	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 tfifo;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
tfifo_alarm	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_alarm;		\/* MBAR_ETH + 0x1B8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_cntrl;		\/* MBAR_ETH + 0x1AC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_data;		\/* MBAR_ETH + 0x1A4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_lrf_ptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_lrf_ptr;		\/* MBAR_ETH + 0x1B0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_lwf_ptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_lwf_ptr;		\/* MBAR_ETH + 0x1B4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_print	drivers/net/mpc5xxx_fec.c	/^static void tfifo_print(char *devname, mpc5xxx_fec_priv *fec)$/;"	f	typeref:typename:void	file:
tfifo_rdptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_rdptr;		\/* MBAR_ETH + 0x1BC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_status	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_status;		\/* MBAR_ETH + 0x1A8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfifo_wrptr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tfifo_wrptr;		\/* MBAR_ETH + 0x1C0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tfintmask	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfintmask;	\/* PSC + 0x90 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfintstat	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfintstat;	\/* PSC + 0x8C *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfl	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int tfl;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
tflg0	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tflg0;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg0	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg0;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg1	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tflg1;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg1;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg2	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tflg2;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg2;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg3	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tflg3;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg3;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg4	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tflg4;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg4;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg5	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 tflg5;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg5;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg6	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg6;$/;"	m	struct:pit_reg	typeref:typename:u32
tflg7	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 tflg7;$/;"	m	struct:pit_reg	typeref:typename:u32
tflrfptr	include/mpc5xxx.h	/^	volatile u16	tflrfptr;	\/* PSC + 0x9a *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tflwfptr	include/mpc5xxx.h	/^	volatile u16	tflwfptr;	\/* PSC + 0x9e *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tfnum	include/mpc5xxx.h	/^	volatile u16	tfnum;		\/* PSC + 0x5c *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tfp410_configtbl	board/tqc/tqm5200/tqm5200.c	/^static TFP410_CONFIG tfp410_configtbl[] = {$/;"	v	typeref:typename:TFP410_CONFIG[]	file:
tfp410_read_reg	board/tqc/tqm5200/tqm5200.c	/^static int tfp410_read_reg(int reg, uchar *buf)$/;"	f	typeref:typename:int	file:
tfp410_write_reg	board/tqc/tqm5200/tqm5200.c	/^static int tfp410_write_reg(int reg, uchar buf)$/;"	f	typeref:typename:int	file:
tfr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int tfr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
tfr	arch/m68k/include/asm/coldfire/dspi.h	/^	u32 tfr;	\/* 0x34 - PUSHR *\/$/;"	m	struct:dspi	typeref:typename:u32
tfr	drivers/block/sata_dwc.c	/^	struct dmareg tfr;$/;"	m	struct:dma_interrupt_regs	typeref:struct:dmareg	file:
tfr	include/fsl_dspi.h	/^	u32 tfr;	\/* 0x34 - PUSHR *\/$/;"	m	struct:dspi	typeref:typename:u32
tfrg	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tfrg;		\/* TX Fragments Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tfrg	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tfrg;		\/* 0x2472c - Transmit Fragments Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tfrg	include/fsl_dtsec.h	/^	u32	tfrg;		\/* Transmit fragments frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tfrg	include/tsec.h	/^	u32	tfrg;		\/* Transmit Fragments Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tfrp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfrp;		\/* 0x1BC *\/$/;"	m	struct:fecdma	typeref:typename:u32
tfrptr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u16	tfrptr;		\/* PSC + 0x9A *\/$/;"	m	struct:psc512x	typeref:typename:volatile u16
tfrptr	include/mpc5xxx.h	/^	volatile u16	tfrptr;		\/* PSC + 0x92 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tfrr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tfrr;		\/* Timer Frequency Reporting *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
tfrr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tfrr;		\/* 0x410f0 - Timer Frequency Reporting Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
tfsize	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfsize;		\/* PSC + 0x9C *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfsr	arch/m68k/include/asm/fec.h	/^	u32 tfsr;		\/* 0xAC *\/$/;"	m	struct:fec	typeref:typename:u32
tfsr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfsr;		\/* 0x1A8 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tfstat	arch/powerpc/include/asm/immap_512x.h	/^	volatile u32	tfstat;		\/* PSC + 0x88 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u32
tfstat	include/mpc5xxx.h	/^	volatile u16	tfstat;		\/* PSC + 0x84 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tft_alt_mode	drivers/video/da8xx-fb.h	/^	unsigned char tft_alt_mode;$/;"	m	struct:lcd_ctrl_config	typeref:typename:unsigned char
tft_pads_mars	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const tft_pads_mars[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
tft_pads_riot	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const tft_pads_riot[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
tftp_block_size	net/tftp.c	/^static unsigned short tftp_block_size = TFTP_BLOCK_SIZE;$/;"	v	typeref:typename:unsigned short	file:
tftp_block_size_option	net/tftp.c	/^static unsigned short tftp_block_size_option = TFTP_MTU_BLOCKSIZE;$/;"	v	typeref:typename:unsigned short	file:
tftp_block_wrap	net/tftp.c	/^static ulong	tftp_block_wrap;$/;"	v	typeref:typename:ulong	file:
tftp_block_wrap_offset	net/tftp.c	/^static ulong	tftp_block_wrap_offset;$/;"	v	typeref:typename:ulong	file:
tftp_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int tftp_boot_selected(void)$/;"	f	typeref:typename:int
tftp_complete	net/tftp.c	/^static void tftp_complete(void)$/;"	f	typeref:typename:void	file:
tftp_cur_block	net/tftp.c	/^static ulong	tftp_cur_block;$/;"	v	typeref:typename:ulong	file:
tftp_filename	net/tftp.c	/^static char tftp_filename[MAX_LEN];$/;"	v	typeref:typename:char[]	file:
tftp_handler	net/tftp.c	/^static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip,$/;"	f	typeref:typename:void	file:
tftp_mcast_active	net/tftp.c	/^static int tftp_mcast_active;$/;"	v	typeref:typename:int	file:
tftp_mcast_bitmap	net/tftp.c	/^static unsigned *tftp_mcast_bitmap;$/;"	v	typeref:typename:unsigned *	file:
tftp_mcast_bitmap_size	net/tftp.c	/^static int tftp_mcast_bitmap_size = MTFTP_BITMAPSIZE;$/;"	v	typeref:typename:int	file:
tftp_mcast_disabled	net/tftp.c	/^static int tftp_mcast_disabled;$/;"	v	typeref:typename:int	file:
tftp_mcast_ending_block	net/tftp.c	/^static ulong tftp_mcast_ending_block;$/;"	v	typeref:typename:ulong	file:
tftp_mcast_master_client	net/tftp.c	/^static int tftp_mcast_master_client;$/;"	v	typeref:typename:int	file:
tftp_mcast_port	net/tftp.c	/^static int tftp_mcast_port;$/;"	v	typeref:typename:int	file:
tftp_mcast_prev_hole	net/tftp.c	/^static int tftp_mcast_prev_hole;$/;"	v	typeref:typename:int	file:
tftp_our_port	net/tftp.c	/^static int	tftp_our_port;$/;"	v	typeref:typename:int	file:
tftp_prev_block	net/tftp.c	/^static ulong	tftp_prev_block;$/;"	v	typeref:typename:ulong	file:
tftp_put_active	net/tftp.c	/^#define tftp_put_active	/;"	d	file:
tftp_put_active	net/tftp.c	/^static int	tftp_put_active;$/;"	v	typeref:typename:int	file:
tftp_put_final_block_sent	net/tftp.c	/^static int	tftp_put_final_block_sent;$/;"	v	typeref:typename:int	file:
tftp_remote_ip	net/tftp.c	/^static struct in_addr tftp_remote_ip;$/;"	v	typeref:struct:in_addr	file:
tftp_remote_port	net/tftp.c	/^static int	tftp_remote_port;$/;"	v	typeref:typename:int	file:
tftp_send	net/tftp.c	/^static void tftp_send(void)$/;"	f	typeref:typename:void	file:
tftp_start	net/tftp.c	/^void tftp_start(enum proto_t protocol)$/;"	f	typeref:typename:void
tftp_start_server	net/tftp.c	/^void tftp_start_server(void)$/;"	f	typeref:typename:void
tftp_state	net/tftp.c	/^static int	tftp_state;$/;"	v	typeref:typename:int	file:
tftp_timeout_count_max	net/tftp.c	/^int tftp_timeout_count_max = TIMEOUT_COUNT;$/;"	v	typeref:typename:int
tftp_timeout_handler	net/tftp.c	/^static void tftp_timeout_handler(void)$/;"	f	typeref:typename:void	file:
tftp_timeout_ms	net/tftp.c	/^ulong tftp_timeout_ms = TIMEOUT;$/;"	v	typeref:typename:ulong
tftp_tsize	net/tftp.c	/^static int	tftp_tsize;$/;"	v	typeref:typename:int	file:
tftp_tsize_num_hash	net/tftp.c	/^static short	tftp_tsize_num_hash;$/;"	v	typeref:typename:short	file:
tfwp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfwp;		\/* 0x1C0 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tfwptr	arch/powerpc/include/asm/immap_512x.h	/^	volatile u16	tfwptr;		\/* PSC + 0x98 *\/$/;"	m	struct:psc512x	typeref:typename:volatile u16
tfwptr	include/mpc5xxx.h	/^	volatile u16	tfwptr;		\/* PSC + 0x96 *\/$/;"	m	struct:mpc5xxx_psc	typeref:typename:volatile u16
tfwr	arch/m68k/include/asm/fec.h	/^	u32 tfwr;		\/* 0xA4 *\/$/;"	m	struct:fec	typeref:typename:u32
tfwr	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tfwr;		\/* 0x144 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tga_header_t	tools/easylogo/easylogo.c	/^} tga_header_t;$/;"	t	typeref:struct:__anonbf0fd82b0108	file:
tgc	fs/ubifs/ubifs.h	/^	unsigned tgc:1;$/;"	m	struct:ubifs_lpt_lprops	typeref:typename:unsigned:1
tgcr	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	tgcr;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
tgcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	tgcr1;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u8
tgcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	tgcr2;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u8
tgcrp	examples/standalone/timer.c	/^  ushort	*tgcrp;		\/* Pointer to Timer Global Config Reg.	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:ushort *	file:
tgec	include/fsl_tgec.h	/^struct tgec {$/;"	s
tgec_disable_mac	drivers/net/fm/tgec.c	/^static void tgec_disable_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
tgec_enable_mac	drivers/net/fm/tgec.c	/^static void tgec_enable_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
tgec_id	include/fsl_tgec.h	/^	u32	tgec_id;	\/* Controller ID register *\/$/;"	m	struct:tgec	typeref:typename:u32
tgec_init_mac	drivers/net/fm/tgec.c	/^static void tgec_init_mac(struct fsl_enet_mac *mac)$/;"	f	typeref:typename:void	file:
tgec_is_fibre	drivers/net/fm/eth.c	/^static int tgec_is_fibre(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
tgec_mdio_controller	include/fsl_tgec.h	/^struct tgec_mdio_controller {$/;"	s
tgec_mdio_info	include/fm_eth.h	/^struct tgec_mdio_info {$/;"	s
tgec_mdio_read	drivers/net/fm/tgec_phy.c	/^static int tgec_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,$/;"	f	typeref:typename:int	file:
tgec_mdio_reset	drivers/net/fm/tgec_phy.c	/^static int tgec_mdio_reset(struct mii_dev *bus)$/;"	f	typeref:typename:int	file:
tgec_mdio_write	drivers/net/fm/tgec_phy.c	/^static int tgec_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,$/;"	f	typeref:typename:int	file:
tgec_set_interface_mode	drivers/net/fm/tgec.c	/^static void tgec_set_interface_mode(struct fsl_enet_mac *mac,$/;"	f	typeref:typename:void	file:
tgec_set_mac_addr	drivers/net/fm/tgec.c	/^static void tgec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)$/;"	f	typeref:typename:void	file:
tgp	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_tgp tgp[4];$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_tgp[4]
tgp	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_tgp tgp[4];$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_tgp[4]
tgpd	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 tgpd;$/;"	m	struct:sunxi_tgp	typeref:typename:u32
tgpd	arch/arm/include/asm/arch/timer.h	/^	u32 tgpd;$/;"	m	struct:sunxi_tgp	typeref:typename:u32
tgsr	drivers/i2c/fti2c010.h	/^	uint32_t tgsr;\/* 0x14: time & glitch suppression register *\/$/;"	m	struct:fti2c010_regs	typeref:typename:uint32_t
thand_f	include/net.h	/^typedef void	thand_f(void);$/;"	t	typeref:typename:void ()(void)
the	doc/README.x86	/^the SPI flash where u-boot.rom resides, and this CMC binary blob can be found$/;"	l
the	doc/README.x86	/^the board manual. The SPI-0 flash should have flash descriptor plus ME firmware$/;"	l
the	doc/README.x86	/^the original firmware image for this board from:$/;"	l
the	doc/README.x86	/^the time of writing). Put it in the corresponding board directory and rename$/;"	l
the_controller	drivers/usb/gadget/dwc2_udc_otg.c	/^struct dwc2_udc	*the_controller;$/;"	v	typeref:struct:dwc2_udc *
the_controller	drivers/usb/gadget/pxa25x_udc.h	/^static struct pxa25x_udc *the_controller;$/;"	v	typeref:struct:pxa25x_udc *
the_first_run	drivers/qe/uec.h	/^	int				the_first_run;$/;"	m	struct:uec_private	typeref:typename:int
the_fsg_common	drivers/usb/gadget/f_mass_storage.c	/^static struct fsg_common *the_fsg_common;$/;"	v	typeref:struct:fsg_common *	file:
theadorable_serdes_cfg	board/theadorable/theadorable.c	/^MV_BIN_SERDES_CFG theadorable_serdes_cfg[] = {$/;"	v	typeref:typename:MV_BIN_SERDES_CFG[]
theres_more	arch/sparc/include/asm/prom.h	/^	struct linux_mlist_v0 *theres_more;$/;"	m	struct:linux_mlist_v0	typeref:struct:linux_mlist_v0 *
therm_ref_opt	include/ddr_spd.h	/^	unsigned char therm_ref_opt;   \/* 31 SDRAM Thermal and Refresh Opts *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
therm_sensor	include/ddr_spd.h	/^	uint8_t therm_sensor;		\/* 14 Module Thermal Sensor *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
therm_sensor	include/ddr_spd.h	/^	unsigned char therm_sensor;    \/* 32 Module Thermal Sensor *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
thermal	arch/arm/dts/rk3288.dtsi	/^	thermal: thermal-zones {$/;"	l
thermal	include/ddr_spd.h	/^			uint8_t thermal;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0608	typeref:typename:uint8_t
thermal	include/ddr_spd.h	/^			uint8_t thermal;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
thermal	include/ddr_spd.h	/^			unsigned char thermal;$/;"	m	struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0308	typeref:typename:unsigned char
thermal_csr	board/freescale/t208xrdb/cpld.h	/^	u8 thermal_csr;		\/* 0x12 - Thermal control and status register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
thermal_data	drivers/thermal/imx_thermal.c	/^struct thermal_data {$/;"	s	file:
thermal_get_temp	drivers/thermal/thermal-uclass.c	/^int thermal_get_temp(struct udevice *dev, int *temp)$/;"	f	typeref:typename:int
thermal_ref	include/ddr_spd.h	/^	uint8_t thermal_ref;		\/*  8 Thermal and refresh *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
thermal_state	include/smbios.h	/^	u8 thermal_state;$/;"	m	struct:smbios_type3	typeref:typename:u8
thermal_zones	arch/arm/dts/dra7.dtsi	/^	thermal_zones: thermal-zones {$/;"	l
thermalbase	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t thermalbase;$/;"	m	struct:pei_data	typeref:typename:uint32_t
this	doc/README.x86	/^this image to the SPI-0 flash according to the board manual just once and we are$/;"	l
thm	include/fsl_memac.h	/^	u32 thm;\/* Tx HiGig2 message counter register *\/$/;"	m	struct:memac	typeref:typename:u32
thor_add	drivers/usb/gadget/f_thor.c	/^int thor_add(struct usb_configuration *c)$/;"	f	typeref:typename:int
thor_dev	drivers/usb/gadget/f_thor.h	/^struct thor_dev {$/;"	s
thor_downloader_cdc_abstract	drivers/usb/gadget/f_thor.c	/^static struct usb_cdc_acm_descriptor thor_downloader_cdc_abstract = {$/;"	v	typeref:struct:usb_cdc_acm_descriptor	file:
thor_downloader_cdc_av	drivers/usb/gadget/f_thor.c	/^static struct usb_cdc_attribute_vendor_descriptor thor_downloader_cdc_av = {$/;"	v	typeref:struct:usb_cdc_attribute_vendor_descriptor	file:
thor_downloader_cdc_call	drivers/usb/gadget/f_thor.c	/^static struct usb_cdc_call_mgmt_descriptor thor_downloader_cdc_call = {$/;"	v	typeref:struct:usb_cdc_call_mgmt_descriptor	file:
thor_downloader_cdc_header	drivers/usb/gadget/f_thor.c	/^static struct usb_cdc_header_desc thor_downloader_cdc_header = {$/;"	v	typeref:struct:usb_cdc_header_desc	file:
thor_downloader_cdc_union	drivers/usb/gadget/f_thor.c	/^static struct usb_cdc_union_desc thor_downloader_cdc_union = {$/;"	v	typeref:struct:usb_cdc_union_desc	file:
thor_downloader_intf_data	drivers/usb/gadget/f_thor.c	/^static struct usb_interface_descriptor thor_downloader_intf_data = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
thor_downloader_intf_int	drivers/usb/gadget/f_thor.c	/^static struct usb_interface_descriptor thor_downloader_intf_int = {$/;"	v	typeref:struct:usb_interface_descriptor	file:
thor_eps_setup	drivers/usb/gadget/f_thor.c	/^static int thor_eps_setup(struct usb_function *f)$/;"	f	typeref:typename:int	file:
thor_file_size	drivers/usb/gadget/f_thor.c	/^static unsigned long long int thor_file_size;$/;"	v	typeref:typename:unsigned long long int	file:
thor_func	drivers/usb/gadget/f_thor.c	/^static struct f_thor *thor_func;$/;"	v	typeref:struct:f_thor *	file:
thor_func_bind	drivers/usb/gadget/f_thor.c	/^static int thor_func_bind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:int	file:
thor_func_disable	drivers/usb/gadget/f_thor.c	/^static void thor_func_disable(struct usb_function *f)$/;"	f	typeref:typename:void	file:
thor_func_init	drivers/usb/gadget/f_thor.c	/^static int thor_func_init(struct usb_configuration *c)$/;"	f	typeref:typename:int	file:
thor_func_set_alt	drivers/usb/gadget/f_thor.c	/^static int thor_func_set_alt(struct usb_function *f,$/;"	f	typeref:typename:int	file:
thor_func_setup	drivers/usb/gadget/f_thor.c	/^thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)$/;"	f	typeref:typename:int	file:
thor_handle	drivers/usb/gadget/f_thor.c	/^int thor_handle(void)$/;"	f	typeref:typename:int
thor_iad_descriptor	drivers/usb/gadget/f_thor.c	/^thor_iad_descriptor = {$/;"	v	typeref:struct:usb_interface_assoc_descriptor	file:
thor_init	drivers/usb/gadget/f_thor.c	/^int thor_init(void)$/;"	f	typeref:typename:int
thor_rx_data	drivers/usb/gadget/f_thor.c	/^static int thor_rx_data(void)$/;"	f	typeref:typename:int	file:
thor_rx_tx_complete	drivers/usb/gadget/f_thor.c	/^static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
thor_set_dma	drivers/usb/gadget/f_thor.c	/^static void thor_set_dma(void *addr, int len)$/;"	f	typeref:typename:void	file:
thor_setup_complete	drivers/usb/gadget/f_thor.c	/^static void thor_setup_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
thor_start_ep	drivers/usb/gadget/f_thor.c	/^static struct usb_request *thor_start_ep(struct usb_ep *ep)$/;"	f	typeref:struct:usb_request *	file:
thor_tx_data	drivers/usb/gadget/f_thor.c	/^static void thor_tx_data(unsigned char *data, int len)$/;"	f	typeref:typename:void	file:
thor_unbind	drivers/usb/gadget/f_thor.c	/^static void thor_unbind(struct usb_configuration *c, struct usb_function *f)$/;"	f	typeref:typename:void	file:
thr	arch/arm/include/asm/arch-pxa/regs-uart.h	/^		uint32_t	thr;$/;"	m	union:pxa_uart_regs::__anon3c298eb7010a	typeref:typename:uint32_t
thr	arch/arm/mach-at91/include/mach/at91_dbu.h	/^	u32	thr;	\/* Transmit Holding Register WO *\/$/;"	m	struct:at91_dbu	typeref:typename:u32
thr	arch/blackfin/include/asm/serial1.h	/^	u16 thr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u16
thr	arch/blackfin/include/asm/serial4.h	/^	u32 thr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
thr	drivers/i2c/at91_i2c.h	/^	u32 thr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
thr	drivers/serial/atmel_usart.h	/^	u32	thr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
thr	include/ns16550.h	/^#define thr /;"	d
thread_count	include/smbios.h	/^	u8 thread_count;$/;"	m	struct:smbios_type4	typeref:typename:u8
thread_count2	include/smbios.h	/^	u16 thread_count2;$/;"	m	struct:smbios_type4	typeref:typename:u16
thread_create	examples/standalone/sched.c	/^static int thread_create (int (*func) (void *), void *arg)$/;"	f	typeref:typename:int	file:
thread_dat_rx_offset	drivers/qe/uec.h	/^	u32				thread_dat_rx_offset;$/;"	m	struct:uec_private	typeref:typename:u32
thread_dat_tx_offset	drivers/qe/uec.h	/^	u32				thread_dat_tx_offset;$/;"	m	struct:uec_private	typeref:typename:u32
thread_delete	examples/standalone/sched.c	/^static int thread_delete (int id)$/;"	f	typeref:typename:int	file:
thread_enabled	drivers/mtd/ubi/ubi.h	/^	int thread_enabled;$/;"	m	struct:ubi_device	typeref:typename:int
thread_join	examples/standalone/sched.c	/^static int thread_join (int *ret)$/;"	f	typeref:typename:int	file:
thread_launcher	examples/standalone/sched.c	/^static void thread_launcher (void)$/;"	f	typeref:typename:void	file:
thread_notifier	drivers/usb/gadget/f_mass_storage.c	/^	struct completion	thread_notifier;$/;"	m	struct:fsg_common	typeref:struct:completion	file:
thread_saved_fp	arch/arm/include/asm/processor.h	/^static inline unsigned long thread_saved_fp(struct thread_struct *t)$/;"	f	typeref:typename:unsigned long
thread_saved_pc	arch/arm/include/asm/processor.h	/^static inline unsigned long thread_saved_pc(struct thread_struct *t)$/;"	f	typeref:typename:unsigned long
thread_saved_pc	arch/avr32/include/asm/processor.h	/^#define thread_saved_pc(/;"	d
thread_saved_pc	arch/powerpc/include/asm/processor.h	/^static inline unsigned long thread_saved_pc(struct thread_struct *t)$/;"	f	typeref:typename:unsigned long
thread_snum	drivers/qe/qe.c	/^static u8 thread_snum[] = {$/;"	v	typeref:typename:u8[]	file:
thread_start	examples/standalone/sched.c	/^static int thread_start (int id)$/;"	f	typeref:typename:int	file:
thread_struct	arch/arm/include/asm/processor.h	/^struct thread_struct {$/;"	s
thread_struct	arch/avr32/include/asm/processor.h	/^struct thread_struct {$/;"	s
thread_struct	arch/mips/include/asm/processor.h	/^struct thread_struct {$/;"	s
thread_struct	arch/powerpc/include/asm/processor.h	/^struct thread_struct {$/;"	s
thread_task	drivers/usb/gadget/f_mass_storage.c	/^	struct task_struct	*thread_task;$/;"	m	struct:fsg_common	typeref:struct:task_struct *	file:
thread_to_core	arch/powerpc/include/asm/mp.h	/^#define thread_to_core(/;"	d
thread_wakeup_needed	drivers/usb/gadget/f_mass_storage.c	/^	int			thread_wakeup_needed;$/;"	m	struct:fsg_common	typeref:typename:int	file:
thread_yield	examples/standalone/sched.c	/^static void thread_yield (void)$/;"	f	typeref:typename:void	file:
three_stage_setup	drivers/usb/dwc3/core.h	/^	unsigned		three_stage_setup:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
threet_en	include/fsl_ddr_sdram.h	/^	unsigned int threet_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
thresh	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32	thresh[3];$/;"	m	struct:rx_flow_regs	typeref:typename:u32[3]
threshold	drivers/video/fsl_dcu_fb.c	/^	u32 threshold;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
threshold_id	include/ec_commands.h	/^	uint8_t threshold_id;$/;"	m	struct:ec_params_thermal_get_threshold	typeref:typename:uint8_t
threshold_id	include/ec_commands.h	/^	uint8_t threshold_id;$/;"	m	struct:ec_params_thermal_set_threshold	typeref:typename:uint8_t
threshold_inp_buf	drivers/video/fsl_dcu_fb.c	/^	u32 threshold_inp_buf[2];$/;"	m	struct:dcu_reg	typeref:typename:u32[2]	file:
threshold_temp_fall	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 threshold_temp_fall;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
threshold_temp_rise	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 threshold_temp_rise;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
thresholds	drivers/video/fsl_diu_fb.c	/^	__be32 thresholds;$/;"	m	struct:diu	typeref:typename:__be32	file:
throw_away_data	drivers/usb/gadget/f_mass_storage.c	/^static int throw_away_data(struct fsg_common *common)$/;"	f	typeref:typename:int	file:
thumb	arch/arm/include/asm/processor.h	/^	u16	thumb;$/;"	m	union:debug_insn	typeref:typename:u16
thumb_mode	arch/arm/include/asm/proc-armv/ptrace.h	/^#define thumb_mode(/;"	d
thunderx_mem_map	board/cavium/thunderx/thunderx.c	/^static struct mm_region thunderx_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
ti_am_eeprom	board/ti/common/board_detect.h	/^struct ti_am_eeprom {$/;"	s
ti_cm_get_macid	drivers/net/cpsw-common.c	/^int ti_cm_get_macid(struct udevice *dev, int slave, u8 *mac_addr)$/;"	f	typeref:typename:int
ti_common_eeprom	board/ti/common/board_detect.h	/^struct ti_common_eeprom {$/;"	s
ti_edma3_ids	drivers/dma/ti-edma3.c	/^static const struct udevice_id ti_edma3_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ti_edma3_ofdata_to_platdata	drivers/dma/ti-edma3.c	/^static int ti_edma3_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_edma3_ops	drivers/dma/ti-edma3.c	/^static const struct dma_ops ti_edma3_ops = {$/;"	v	typeref:typename:const struct dma_ops	file:
ti_edma3_priv	drivers/dma/ti-edma3.c	/^struct ti_edma3_priv {$/;"	s	file:
ti_edma3_probe	drivers/dma/ti-edma3.c	/^static int ti_edma3_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_edma3_transfer	drivers/dma/ti-edma3.c	/^static int ti_edma3_transfer(struct udevice *dev, int direction, void *dst,$/;"	f	typeref:typename:int	file:
ti_eeprom_string_cleanup	board/ti/common/board_detect.c	/^static void __maybe_unused ti_eeprom_string_cleanup(char *s)$/;"	f	typeref:typename:void __maybe_unused	file:
ti_i2c_eeprom_am_get	board/ti/common/board_detect.c	/^int __maybe_unused ti_i2c_eeprom_am_get(int bus_addr, int dev_addr)$/;"	f	typeref:typename:int __maybe_unused
ti_i2c_eeprom_dra7_get	board/ti/common/board_detect.c	/^int __maybe_unused ti_i2c_eeprom_dra7_get(int bus_addr, int dev_addr)$/;"	f	typeref:typename:int __maybe_unused
ti_i2c_eeprom_get	board/ti/common/board_detect.c	/^static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,$/;"	f	typeref:typename:int __maybe_unused	file:
ti_i2c_eeprom_init	board/ti/common/board_detect.c	/^static int __maybe_unused ti_i2c_eeprom_init(int i2c_bus, int dev_addr)$/;"	f	typeref:typename:int __maybe_unused	file:
ti_i2c_eeprom_read	board/ti/common/board_detect.c	/^static int __maybe_unused ti_i2c_eeprom_read(int dev_addr, int offset,$/;"	f	typeref:typename:int __maybe_unused	file:
ti_of_to_priv	drivers/remoteproc/ti_power_proc.c	/^static int ti_of_to_priv(struct udevice *dev,$/;"	f	typeref:typename:int	file:
ti_powerproc_ids	drivers/remoteproc/ti_power_proc.c	/^static const struct udevice_id ti_powerproc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ti_powerproc_load	drivers/remoteproc/ti_power_proc.c	/^static int ti_powerproc_load(struct udevice *dev, ulong addr, ulong size)$/;"	f	typeref:typename:int	file:
ti_powerproc_ops	drivers/remoteproc/ti_power_proc.c	/^static const struct dm_rproc_ops ti_powerproc_ops = {$/;"	v	typeref:typename:const struct dm_rproc_ops	file:
ti_powerproc_privdata	drivers/remoteproc/ti_power_proc.c	/^struct ti_powerproc_privdata {$/;"	s	file:
ti_powerproc_probe	drivers/remoteproc/ti_power_proc.c	/^static int ti_powerproc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_powerproc_start	drivers/remoteproc/ti_power_proc.c	/^static int ti_powerproc_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_qspi_child_pre_probe	drivers/spi/ti_qspi.c	/^static int ti_qspi_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_qspi_claim_bus	drivers/spi/ti_qspi.c	/^static int ti_qspi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_qspi_cs_deactivate	drivers/spi/ti_qspi.c	/^static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
ti_qspi_ctrl_mode_mmap	drivers/spi/ti_qspi.c	/^static void ti_qspi_ctrl_mode_mmap(void *ctrl_mod_mmap, int cs, bool enable)$/;"	f	typeref:typename:void	file:
ti_qspi_ids	drivers/spi/ti_qspi.c	/^static const struct udevice_id ti_qspi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
ti_qspi_ofdata_to_platdata	drivers/spi/ti_qspi.c	/^static int ti_qspi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
ti_qspi_ops	drivers/spi/ti_qspi.c	/^static const struct dm_spi_ops ti_qspi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
ti_qspi_priv	drivers/spi/ti_qspi.c	/^struct ti_qspi_priv {$/;"	s	file:
ti_qspi_probe	drivers/spi/ti_qspi.c	/^static int ti_qspi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
ti_qspi_regs	drivers/spi/ti_qspi.c	/^struct ti_qspi_regs {$/;"	s	file:
ti_qspi_release_bus	drivers/spi/ti_qspi.c	/^static int ti_qspi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
ti_qspi_set_mode	drivers/spi/ti_qspi.c	/^static int ti_qspi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
ti_qspi_set_speed	drivers/spi/ti_qspi.c	/^static int ti_qspi_set_speed(struct udevice *bus, uint max_hz)$/;"	f	typeref:typename:int	file:
ti_qspi_xfer	drivers/spi/ti_qspi.c	/^static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
ti_spi_set_speed	drivers/spi/ti_qspi.c	/^static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz)$/;"	f	typeref:typename:void	file:
ti_spi_setup_spi_register	drivers/spi/ti_qspi.c	/^static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
ti_usb2_phy_power	drivers/usb/dwc3/ti_usb_phy.c	/^void ti_usb2_phy_power(struct ti_usb_phy *phy, int on)$/;"	f	typeref:typename:void
ti_usb3_dpll_program	drivers/usb/dwc3/ti_usb_phy.c	/^static int ti_usb3_dpll_program(struct ti_usb_phy *phy)$/;"	f	typeref:typename:int	file:
ti_usb3_dpll_wait_lock	drivers/usb/dwc3/ti_usb_phy.c	/^static int ti_usb3_dpll_wait_lock(struct ti_usb_phy *phy)$/;"	f	typeref:typename:int	file:
ti_usb3_get_dpll_params	drivers/usb/dwc3/ti_usb_phy.c	/^static struct usb3_dpll_params *ti_usb3_get_dpll_params(struct ti_usb_phy *phy)$/;"	f	typeref:struct:usb3_dpll_params *	file:
ti_usb3_phy_power	drivers/usb/dwc3/ti_usb_phy.c	/^void ti_usb3_phy_power(struct ti_usb_phy *phy, int on)$/;"	f	typeref:typename:void
ti_usb3_readl	drivers/usb/dwc3/ti_usb_phy.c	/^static inline unsigned int ti_usb3_readl(void __iomem *base, u32 offset)$/;"	f	typeref:typename:unsigned int	file:
ti_usb3_writel	drivers/usb/dwc3/ti_usb_phy.c	/^static inline void ti_usb3_writel(void __iomem *base, u32 offset, u32 value)$/;"	f	typeref:typename:void	file:
ti_usb_phy	drivers/usb/dwc3/ti_usb_phy.c	/^struct ti_usb_phy {$/;"	s	file:
ti_usb_phy_device	include/ti-usb-phy-uboot.h	/^struct ti_usb_phy_device {$/;"	s
ti_usb_phy_uboot_exit	drivers/usb/dwc3/ti_usb_phy.c	/^void ti_usb_phy_uboot_exit(int index)$/;"	f	typeref:typename:void
ti_usb_phy_uboot_init	drivers/usb/dwc3/ti_usb_phy.c	/^int ti_usb_phy_uboot_init(struct ti_usb_phy_device *dev)$/;"	f	typeref:typename:int
tibcr	include/linux/immap_qe.h	/^	u32 tibcr[16];	\/* Trap\/instruction breakpoint control regs *\/$/;"	m	struct:rsp	typeref:typename:u32[16]
tick	drivers/i2c/mvtwsi.c	/^	uint tick;$/;"	m	struct:mvtwsi_i2c_dev	typeref:typename:uint	file:
tick_to_time	arch/arm/cpu/arm926ejs/mx27/timer.c	/^static inline unsigned long long tick_to_time(unsigned long long tick)$/;"	f	typeref:typename:unsigned long long	file:
tick_to_time	arch/arm/cpu/arm926ejs/mxs/timer.c	/^static inline unsigned long tick_to_time(unsigned long tick)$/;"	f	typeref:typename:unsigned long	file:
tick_to_time	arch/arm/cpu/armv7/ls102xa/timer.c	/^static inline unsigned long long tick_to_time(unsigned long long tick)$/;"	f	typeref:typename:unsigned long long	file:
tick_to_time	arch/arm/cpu/armv7/vf610/timer.c	/^static inline unsigned long long tick_to_time(unsigned long long tick)$/;"	f	typeref:typename:unsigned long long	file:
tick_to_time	arch/arm/imx-common/syscounter.c	/^static inline unsigned long long tick_to_time(unsigned long long tick)$/;"	f	typeref:typename:unsigned long long	file:
tick_to_time	lib/time.c	/^static uint64_t notrace tick_to_time(uint64_t tick)$/;"	f	typeref:typename:uint64_t notrace	file:
ticks	arch/arm/cpu/arm920t/ep93xx/timer.c	/^	unsigned long long ticks;$/;"	m	struct:ep93xx_timer	typeref:typename:unsigned long long	file:
ticks2usec	arch/powerpc/lib/time.c	/^unsigned long ticks2usec(unsigned long ticks)$/;"	f	typeref:typename:unsigned long
ticks_to_ms	drivers/watchdog/at91sam9_wdt.c	/^#define ticks_to_ms(/;"	d	file:
ticnt	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	ticnt;$/;"	m	struct:s3c24x0_rtc	typeref:typename:u8
ticr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 ticr;		\/* 0x30 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tid	net/dns.h	/^	uint16_t	tid;		\/* Transaction ID *\/$/;"	m	struct:header	typeref:typename:uint16_t
tid_8xx_cpmtimer_s	examples/standalone/timer.c	/^typedef struct tid_8xx_cpmtimer_s {$/;"	s	file:
tid_8xx_cpmtimer_t	examples/standalone/timer.c	/^} tid_8xx_cpmtimer_t;$/;"	t	typeref:struct:tid_8xx_cpmtimer_s	file:
tidr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tidr;		\/* offset 0x00 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tidr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tidr;	\/* 0x00 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tidr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tidr;		\/* 0x00 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tidr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tidr;		\/* 0x00 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tidr	drivers/timer/omap-timer.c	/^	unsigned int tidr;		\/* offset 0x00 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tier	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tier;		\/* offset 0x20 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tier	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tier;	\/* 0x1c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tier	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tier;		\/* 0x1c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tier	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tier;		\/* 0x2c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tier	drivers/timer/omap-timer.c	/^	unsigned int tier;		\/* offset 0x20 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tih_ps	include/common_timing_params.h	/^	unsigned int tih_ps;	\/* byte 33, spd->ca_hold *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tih_ps	include/fsl_ddr_dimm_params.h	/^	int tih_ps;	\/* byte 33, spd->ca_hold *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tim	drivers/serial/serial_mxc.c	/^	u32 tim;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
tim12	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	tim12;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
tim2_5_or	arch/arm/include/asm/arch-stm32f7/gpt.h	/^	u32 tim2_5_or;$/;"	m	struct:gpt_regs	typeref:typename:u32
tim34	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	tim34;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
tim_cal	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tim_cal;		\/* 0x30: Timing Calibration Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
tim_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 tim_freq;		\/* offset 0x1c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
timclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 timclk_ctrl;	\/* Watchdog and Highspeed Timer Control *\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
timclk_ctrl1	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 timclk_ctrl1;	\/* Motor and Timer Clock Control	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
time	doc/README.x86	/^time of writing) in the board directory and rename it to fsp.bin.$/;"	l
time	drivers/qe/uec.h	/^	u32  time;             \/* temporary variable handled by QE *\/$/;"	m	struct:uec_scheduler	typeref:typename:u32
time	drivers/rtc/mvrtc.h	/^	u32 time;$/;"	m	struct:mvrtc_registers	typeref:typename:u32
time	fs/ubifs/ubifs.h	/^	unsigned long time;$/;"	m	struct:ubifs_znode	typeref:typename:unsigned long
time	include/ec_commands.h	/^	uint32_t time;$/;"	m	struct:ec_params_rtc	typeref:typename:uint32_t
time	include/ec_commands.h	/^	uint32_t time;$/;"	m	struct:ec_response_rtc	typeref:typename:uint32_t
time	include/fat.h	/^	__u16	time,date,start;\/* Time, date and first cluster *\/$/;"	m	struct:dir_entry	typeref:typename:__u16
time	include/linux/mtd/mtd.h	/^	u_long time;$/;"	m	struct:erase_info	typeref:typename:u_long
time	include/u-boot/zlib.h	/^	uLong	time;	\/* modification time *\/$/;"	m	struct:gz_header_s	typeref:typename:uLong
time_1	drivers/block/mxc_ata.c	/^	u8	time_1;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_2r	drivers/block/mxc_ata.c	/^	u8	time_2r;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_2w	drivers/block/mxc_ata.c	/^	u8	time_2w;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_4	drivers/block/mxc_ata.c	/^	u8	time_4;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_9	drivers/block/mxc_ata.c	/^	u8	time_9;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_ack	drivers/block/mxc_ata.c	/^	u8	time_ack;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_ax	drivers/block/mxc_ata.c	/^	u8	time_ax;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_coal	drivers/net/mvpp2.c	/^	u32 time_coal;$/;"	m	struct:mvpp2_rx_queue	typeref:typename:u32	file:
time_cvh	drivers/block/mxc_ata.c	/^	u8	time_cvh;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_cyc	drivers/block/mxc_ata.c	/^	u8	time_cyc;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_d	drivers/block/mxc_ata.c	/^	u8	time_d;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_delta	net/net.c	/^static ulong	time_delta;$/;"	v	typeref:typename:ulong	file:
time_div	drivers/i2c/kona_i2c.c	/^	uint8_t time_div;	\/* Post-prescale divider *\/$/;"	m	struct:bus_speed_cfg	typeref:typename:uint8_t	file:
time_dvh	drivers/block/mxc_ata.c	/^	u8	time_dvh;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_dvs	drivers/block/mxc_ata.c	/^	u8	time_dvs;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_dzfs	drivers/block/mxc_ata.c	/^	u8	time_dzfs;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_env	drivers/block/mxc_ata.c	/^	u8	time_env;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_gran	fs/ubifs/ubifs-media.h	/^	__le32 time_gran;$/;"	m	struct:ubifs_sb_node	typeref:typename:__le32
time_handler	net/net.c	/^static thand_f *time_handler;$/;"	v	typeref:typename:thand_f *	file:
time_hi_and_version	include/uuid.h	/^	unsigned short time_hi_and_version;$/;"	m	struct:uuid	typeref:typename:unsigned short
time_jn	drivers/block/mxc_ata.c	/^	u8	time_jn;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_k	drivers/block/mxc_ata.c	/^	u8	time_k;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_low	include/uuid.h	/^	unsigned int time_low;$/;"	m	struct:uuid	typeref:typename:unsigned int
time_m	drivers/block/mxc_ata.c	/^	u8	time_m;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_m	drivers/i2c/kona_i2c.c	/^	uint8_t time_m;		\/* Number of cycles for setup time *\/$/;"	m	struct:bus_speed_cfg	typeref:typename:uint8_t	file:
time_mid	include/uuid.h	/^	unsigned short time_mid;$/;"	m	struct:uuid	typeref:typename:unsigned short
time_mlix	drivers/block/mxc_ata.c	/^	u8	time_mlix;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_ms	cmd/sf.c	/^	unsigned time_ms[STAGE_COUNT];$/;"	m	struct:test_info	typeref:typename:unsigned[]	file:
time_n	drivers/i2c/kona_i2c.c	/^	uint8_t time_n;		\/* Number of cycles for hold time *\/$/;"	m	struct:bus_speed_cfg	typeref:typename:uint8_t	file:
time_off	drivers/block/mxc_ata.c	/^	u8	time_off;	\/* 0x00 *\/$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_on	drivers/block/mxc_ata.c	/^	u8	time_on;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_out	drivers/i2c/i2c-cdns.c	/^	u32 time_out;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
time_out	drivers/i2c/zynq_i2c.c	/^	u32 time_out;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
time_p	drivers/i2c/kona_i2c.c	/^	uint8_t time_p;		\/* Timing coefficient *\/$/;"	m	struct:bus_speed_cfg	typeref:typename:uint8_t	file:
time_pio_rdx	drivers/block/mxc_ata.c	/^	u8	time_pio_rdx;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_reg	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 time_reg;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
time_ss	drivers/block/mxc_ata.c	/^	u8	time_ss;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_start	net/net.c	/^static ulong	time_start;$/;"	v	typeref:typename:ulong	file:
time_start	net/tftp.c	/^static ulong time_start;   \/* Record time we started tftp *\/$/;"	v	typeref:typename:ulong	file:
time_t	include/linux/types.h	/^typedef __kernel_time_t		time_t;$/;"	t	typeref:typename:__kernel_time_t
time_taken_max	net/bootp.c	/^static ulong time_taken_max;$/;"	v	typeref:typename:ulong	file:
time_to_empty	include/power/battery.h	/^	unsigned int time_to_empty;$/;"	m	struct:battery	typeref:typename:unsigned int
time_to_tick	arch/arm/cpu/arm926ejs/mx27/timer.c	/^static inline unsigned long long time_to_tick(unsigned long long time)$/;"	f	typeref:typename:unsigned long long	file:
time_to_tick	arch/arm/cpu/arm926ejs/mxs/timer.c	/^static inline unsigned long time_to_tick(unsigned long time)$/;"	f	typeref:typename:unsigned long	file:
time_udma_rdx	drivers/block/mxc_ata.c	/^	u8	time_udma_rdx;$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
time_us	common/bootstage.c	/^	ulong time_us;$/;"	m	struct:bootstage_record	typeref:typename:ulong	file:
time_us	include/ec_commands.h	/^			uint32_t time_us;$/;"	m	struct:ec_params_keyscan_seq_ctrl::__anon71a6b267060a::__anon71a6b2670808	typeref:typename:uint32_t
time_zah	drivers/block/mxc_ata.c	/^	u8	time_zah;	\/* 0x10 *\/$/;"	m	struct:mxc_ata_config_regs	typeref:typename:u8	file:
timebase_h	include/asm-generic/global_data.h	/^	unsigned long timebase_h;$/;"	m	struct:global_data	typeref:typename:unsigned long
timebase_l	include/asm-generic/global_data.h	/^	unsigned long timebase_l;$/;"	m	struct:global_data	typeref:typename:unsigned long
timebases	include/ddr_spd.h	/^	uint8_t timebases;		\/* 17 MTb and FTB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
timeout	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 timeout;	\/* Timeout register for AHB                  *\/$/;"	m	struct:emc_regs::emc_ahb_t	typeref:typename:u32
timeout	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 timeout;		\/* 0x08 time out *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
timeout	arch/arm/include/asm/arch/mmc.h	/^	u32 timeout;		\/* 0x08 time out *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
timeout	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 timeout;		\/* 0x48: Timeout Port 0\/1\/2\/3 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
timeout	arch/arm/mach-exynos/include/mach/dsim.h	/^	unsigned int	timeout;$/;"	m	struct:exynos_mipi_dsim	typeref:typename:unsigned int
timeout	board/gdsys/common/phy.c	/^	u32 timeout;$/;"	m	struct:mii_setupcmd	typeref:typename:u32	file:
timeout	cmd/pxe.c	/^	int timeout;$/;"	m	struct:pxe_menu	typeref:typename:int	file:
timeout	common/menu.c	/^	int timeout;$/;"	m	struct:menu	typeref:typename:int	file:
timeout	drivers/i2c/i2c-uniphier-f.c	/^	unsigned long timeout;			\/* time out (us) *\/$/;"	m	struct:uniphier_fi2c_dev	typeref:typename:unsigned long	file:
timeout	drivers/tpm/tpm_tis.h	/^	struct timeout_t timeout;$/;"	m	union:cap_t	typeref:struct:timeout_t
timeout	drivers/usb/musb/musb_core.h	/^	u32			timeout;$/;"	m	struct:musb_config	typeref:typename:u32
timeout_a	drivers/tpm/tpm_tis.h	/^	unsigned long timeout_a, timeout_b, timeout_c, timeout_d;  \/* msec *\/$/;"	m	struct:tpm_chip	typeref:typename:unsigned long
timeout_b	drivers/tpm/tpm_tis.h	/^	unsigned long timeout_a, timeout_b, timeout_c, timeout_d;  \/* msec *\/$/;"	m	struct:tpm_chip	typeref:typename:unsigned long
timeout_c	drivers/tpm/tpm_tis.h	/^	unsigned long timeout_a, timeout_b, timeout_c, timeout_d;  \/* msec *\/$/;"	m	struct:tpm_chip	typeref:typename:unsigned long
timeout_control	include/linux/mtd/omap_gpmc.h	/^	u32 timeout_control;	\/* 0x40 *\/$/;"	m	struct:gpmc	typeref:typename:u32
timeout_count	net/tftp.c	/^static int	timeout_count;$/;"	v	typeref:typename:int	file:
timeout_count_max	net/tftp.c	/^static int timeout_count_max = TIMEOUT_COUNT;$/;"	v	typeref:typename:int	file:
timeout_d	drivers/tpm/tpm_tis.h	/^	unsigned long timeout_a, timeout_b, timeout_c, timeout_d;  \/* msec *\/$/;"	m	struct:tpm_chip	typeref:typename:unsigned long
timeout_dly	include/tegra-kbc.h	/^	u32 timeout_dly;$/;"	m	struct:kbc_tegra	typeref:typename:u32
timeout_ms	net/link_local.c	/^static int timeout_ms = -1;$/;"	v	typeref:typename:int	file:
timeout_ms	net/tftp.c	/^static ulong timeout_ms = TIMEOUT;$/;"	v	typeref:typename:ulong	file:
timeout_t	drivers/tpm/tpm_tis.h	/^struct timeout_t {$/;"	s
timeout_wcoal_avpc	arch/arm/include/asm/arch-tegra124/ahb.h	/^	u32 timeout_wcoal_avpc;		\/* _TIMEOUT_WCOAL_AVPC_0,	124h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
timeout_wcoal_avpc	arch/arm/include/asm/arch-tegra210/ahb.h	/^	u32 timeout_wcoal_avpc;		\/* _TIMEOUT_WCOAL_AVPC_0,	124h *\/$/;"	m	struct:ahb_ctlr	typeref:typename:u32
timeoutcon	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	timeoutcon;	\/* _TIMEOUT_CTRL 23:16 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
timer	arch/arm/cpu/arm920t/ep93xx/timer.c	/^} timer;$/;"	v	typeref:struct:ep93xx_timer
timer	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct timer {$/;"	s
timer	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_timer timer[6];	\/* We have 6 timers *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_timer[6]
timer	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_timer timer[6];	\/* We have 6 timers *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_timer[6]
timer	arch/arm/mach-davinci/timer.c	/^static struct davinci_timer * const timer =$/;"	v	typeref:struct:davinci_timer * const	file:
timer	arch/m68k/include/asm/coldfire/flexcan.h	/^	u32 timer;		\/* 0x08 Free Running Timer *\/$/;"	m	struct:can_ctrl	typeref:typename:u32
timer	arch/sparc/include/asm/global_data.h	/^	void *timer;$/;"	m	struct:arch_global_data	typeref:typename:void *
timer	drivers/usb/musb-new/musb_dsps.c	/^	struct timer_list timer;	\/* otg_workaround timer *\/$/;"	m	struct:dsps_glue	typeref:struct:timer_list	file:
timer	examples/standalone/timer.c	/^int timer (int argc, char * const argv[])$/;"	f	typeref:typename:int
timer	include/asm-generic/global_data.h	/^	struct udevice	*timer;		\/* Timer instance for Driver Model *\/$/;"	m	struct:global_data	typeref:struct:udevice *
timer0	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^static struct timer_regs  *timer0 = (struct timer_regs *)TIMER0_BASE;$/;"	v	typeref:struct:timer_regs *	file:
timer0	arch/arm/dts/socfpga.dtsi	/^		timer0: timer0@ffc08000 {$/;"	l
timer0	drivers/bios_emulator/include/biosemu.h	/^	u32 timer0;$/;"	m	struct:__anon964d10140108	typeref:typename:u32
timer0Latched	drivers/bios_emulator/include/biosemu.h	/^	int timer0Latched;$/;"	m	struct:__anon964d10140108	typeref:typename:int
timer0bgload	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0bgload;$/;"	m	struct:systimer	typeref:typename:u32
timer0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer0clkctrl;	\/* offset 0x10 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
timer0control	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0control;$/;"	m	struct:systimer	typeref:typename:u32
timer0intclr	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0intclr;$/;"	m	struct:systimer	typeref:typename:u32
timer0load	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0load;		\/* 0x00 *\/$/;"	m	struct:systimer	typeref:typename:u32
timer0mis	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0mis;$/;"	m	struct:systimer	typeref:typename:u32
timer0ris	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0ris;$/;"	m	struct:systimer	typeref:typename:u32
timer0value	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer0value;$/;"	m	struct:systimer	typeref:typename:u32
timer1	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^static struct timer_regs  *timer1 = (struct timer_regs *)TIMER1_BASE;$/;"	v	typeref:struct:timer_regs *	file:
timer1	arch/arm/dts/am33xx.dtsi	/^		timer1: timer@44e31000 {$/;"	l
timer1	arch/arm/dts/am4372.dtsi	/^		timer1: timer@44e31000 {$/;"	l
timer1	arch/arm/dts/dra7.dtsi	/^		timer1: timer@4ae18000 {$/;"	l
timer1	arch/arm/dts/socfpga.dtsi	/^		timer1: timer1@ffc09000 {$/;"	l
timer1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 timer1;	\/*0x044*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
timer1	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct timer timer1;$/;"	m	struct:timer_regs	typeref:struct:timer
timer1	drivers/bios_emulator/include/biosemu.h	/^	u32 timer1;$/;"	m	struct:__anon964d10140108	typeref:typename:u32
timer10	arch/arm/dts/am4372.dtsi	/^		timer10: timer@4833f000 {$/;"	l
timer10	arch/arm/dts/dra7.dtsi	/^		timer10: timer@48086000 {$/;"	l
timer10_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer10_fck: timer10_fck {$/;"	l
timer10_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer10_gfclk_mux: timer10_gfclk_mux {$/;"	l
timer11	arch/arm/dts/am4372.dtsi	/^		timer11: timer@48341000 {$/;"	l
timer11	arch/arm/dts/dra7.dtsi	/^		timer11: timer@48088000 {$/;"	l
timer11_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer11_fck: timer11_fck {$/;"	l
timer11_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer11_gfclk_mux: timer11_gfclk_mux {$/;"	l
timer13	arch/arm/dts/dra7.dtsi	/^		timer13: timer@48828000 {$/;"	l
timer13_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer13_gfclk_mux: timer13_gfclk_mux {$/;"	l
timer14	arch/arm/dts/dra7.dtsi	/^		timer14: timer@4882a000 {$/;"	l
timer14_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer14_gfclk_mux: timer14_gfclk_mux {$/;"	l
timer15	arch/arm/dts/dra7.dtsi	/^		timer15: timer@4882c000 {$/;"	l
timer15_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer15_gfclk_mux: timer15_gfclk_mux {$/;"	l
timer16	arch/arm/dts/dra7.dtsi	/^		timer16: timer@4882e000 {$/;"	l
timer16_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer16_gfclk_mux: timer16_gfclk_mux {$/;"	l
timer1Latched	drivers/bios_emulator/include/biosemu.h	/^	int timer1Latched;$/;"	m	struct:__anon964d10140108	typeref:typename:int
timer1_counter	include/faraday/fttmr010.h	/^	unsigned int	timer1_counter;		\/* 0x00 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer1_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer1_fck: timer1_fck {$/;"	l
timer1_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer1_fck: timer1_fck {$/;"	l
timer1_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer1_gfclk_mux: timer1_gfclk_mux {$/;"	l
timer1_load	include/faraday/fttmr010.h	/^	unsigned int	timer1_load;		\/* 0x04 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer1_match1	include/faraday/fttmr010.h	/^	unsigned int	timer1_match1;		\/* 0x08 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer1_match2	include/faraday/fttmr010.h	/^	unsigned int	timer1_match2;		\/* 0x0c *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer1bgload	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1bgload;$/;"	m	struct:systimer	typeref:typename:u32
timer1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer1clkctrl;	\/* offset 0xC4 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
timer1control	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1control;$/;"	m	struct:systimer	typeref:typename:u32
timer1intclr	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1intclr;$/;"	m	struct:systimer	typeref:typename:u32
timer1load	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1load;		\/* 0x20 *\/$/;"	m	struct:systimer	typeref:typename:u32
timer1mis	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1mis;$/;"	m	struct:systimer	typeref:typename:u32
timer1ms	drivers/block/dwc_ahsata.c	/^	u32 timer1ms;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
timer1ris	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1ris;$/;"	m	struct:systimer	typeref:typename:u32
timer1value	arch/arm/include/asm/arch-armv7/systimer.h	/^	u32 timer1value;$/;"	m	struct:systimer	typeref:typename:u32
timer2	arch/arm/dts/am33xx.dtsi	/^		timer2: timer@48040000 {$/;"	l
timer2	arch/arm/dts/am4372.dtsi	/^		timer2: timer@48040000  {$/;"	l
timer2	arch/arm/dts/dra7.dtsi	/^		timer2: timer@48032000 {$/;"	l
timer2	arch/arm/dts/socfpga.dtsi	/^		timer2: timer2@ffd00000 {$/;"	l
timer2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 timer2;	\/*0x07C*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
timer2	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct timer timer2;$/;"	m	struct:timer_regs	typeref:struct:timer
timer2	drivers/bios_emulator/include/biosemu.h	/^	u32 timer2;$/;"	m	struct:__anon964d10140108	typeref:typename:u32
timer2Latched	drivers/bios_emulator/include/biosemu.h	/^	int timer2Latched;$/;"	m	struct:__anon964d10140108	typeref:typename:int
timer2_counter	include/faraday/fttmr010.h	/^	unsigned int	timer2_counter;		\/* 0x10 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer2_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer2_fck: timer2_fck {$/;"	l
timer2_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer2_fck: timer2_fck {$/;"	l
timer2_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer2_gfclk_mux: timer2_gfclk_mux {$/;"	l
timer2_load	include/faraday/fttmr010.h	/^	unsigned int	timer2_load;		\/* 0x14 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer2_match1	include/faraday/fttmr010.h	/^	unsigned int	timer2_match1;		\/* 0x18 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer2_match2	include/faraday/fttmr010.h	/^	unsigned int	timer2_match2;		\/* 0x1c *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer2clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer2clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer2clkctrl;	\/* offset 0x530 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer2clkctrl;	\/* offset 0x80 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer3	arch/arm/dts/am33xx.dtsi	/^		timer3: timer@48042000 {$/;"	l
timer3	arch/arm/dts/am4372.dtsi	/^		timer3: timer@48042000 {$/;"	l
timer3	arch/arm/dts/dra7.dtsi	/^		timer3: timer@48034000 {$/;"	l
timer3	arch/arm/dts/socfpga.dtsi	/^		timer3: timer3@ffd01000 {$/;"	l
timer3	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct timer timer3;$/;"	m	struct:timer_regs	typeref:struct:timer
timer3_counter	include/faraday/fttmr010.h	/^	unsigned int	timer3_counter;		\/* 0x20 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer3_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer3_fck: timer3_fck {$/;"	l
timer3_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer3_fck: timer3_fck {$/;"	l
timer3_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer3_gfclk_mux: timer3_gfclk_mux {$/;"	l
timer3_load	include/faraday/fttmr010.h	/^	unsigned int	timer3_load;		\/* 0x24 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer3_match1	include/faraday/fttmr010.h	/^	unsigned int	timer3_match1;		\/* 0x28 *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer3_match2	include/faraday/fttmr010.h	/^	unsigned int	timer3_match2;		\/* 0x2c *\/$/;"	m	struct:fttmr010	typeref:typename:unsigned int
timer3clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer3clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer3clkctrl;	\/* offset 0x538 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer3clkctrl;	\/* offset 0x84 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer4	arch/arm/dts/am33xx.dtsi	/^		timer4: timer@48044000 {$/;"	l
timer4	arch/arm/dts/am4372.dtsi	/^		timer4: timer@48044000 {$/;"	l
timer4	arch/arm/dts/dra7.dtsi	/^		timer4: timer@48036000 {$/;"	l
timer4	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct timer4 timer4;$/;"	m	struct:timer_regs	typeref:struct:timer4
timer4	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct timer4 {$/;"	s
timer4_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer4_fck: timer4_fck {$/;"	l
timer4_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer4_fck: timer4_fck {$/;"	l
timer4_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer4_gfclk_mux: timer4_gfclk_mux {$/;"	l
timer4clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer4clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer4clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer4clkctrl;	\/* offset 0x540 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer4clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer4clkctrl;	\/* offset 0x88 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer5	arch/arm/dts/am33xx.dtsi	/^		timer5: timer@48046000 {$/;"	l
timer5	arch/arm/dts/am4372.dtsi	/^		timer5: timer@48046000 {$/;"	l
timer5	arch/arm/dts/dra7.dtsi	/^		timer5: timer@48820000 {$/;"	l
timer5_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer5_fck: timer5_fck {$/;"	l
timer5_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer5_fck: timer5_fck {$/;"	l
timer5_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer5_gfclk_mux: timer5_gfclk_mux {$/;"	l
timer5clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer5clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer5clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer5clkctrl;	\/* offset 0xEC *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer6	arch/arm/dts/am33xx.dtsi	/^		timer6: timer@48048000 {$/;"	l
timer6	arch/arm/dts/am4372.dtsi	/^		timer6: timer@48048000 {$/;"	l
timer6	arch/arm/dts/dra7.dtsi	/^		timer6: timer@48822000 {$/;"	l
timer64_ctl	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	timer64_ctl;	\/* 0x30 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
timer6_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer6_fck: timer6_fck {$/;"	l
timer6_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer6_fck: timer6_fck {$/;"	l
timer6_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer6_gfclk_mux: timer6_gfclk_mux {$/;"	l
timer6clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer6clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer6clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer6clkctrl;	\/* offset 0xF0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer7	arch/arm/dts/am33xx.dtsi	/^		timer7: timer@4804a000 {$/;"	l
timer7	arch/arm/dts/am4372.dtsi	/^		timer7: timer@4804a000 {$/;"	l
timer7	arch/arm/dts/dra7.dtsi	/^		timer7: timer@48824000 {$/;"	l
timer7_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	timer7_fck: timer7_fck {$/;"	l
timer7_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer7_fck: timer7_fck {$/;"	l
timer7_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer7_gfclk_mux: timer7_gfclk_mux {$/;"	l
timer7clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int timer7clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
timer7clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer7clkctrl;	\/* offset 0x558 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer7clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int timer7clkctrl;	\/* offset 0x7C *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
timer8	arch/arm/dts/am4372.dtsi	/^		timer8: timer@481c1000 {$/;"	l
timer8	arch/arm/dts/dra7.dtsi	/^		timer8: timer@48826000 {$/;"	l
timer8_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer8_fck: timer8_fck {$/;"	l
timer8_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer8_gfclk_mux: timer8_gfclk_mux {$/;"	l
timer9	arch/arm/dts/am4372.dtsi	/^		timer9: timer@4833d000 {$/;"	l
timer9	arch/arm/dts/dra7.dtsi	/^		timer9: timer@4803e000 {$/;"	l
timer9_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	timer9_fck: timer9_fck {$/;"	l
timer9_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer9_gfclk_mux: timer9_gfclk_mux {$/;"	l
timer_0	arch/nios2/dts/3c120_devboard.dts	/^			timer_0: timer@0x8000 {$/;"	l	label:pb_cpu_to_io
timer_1ms	arch/nios2/dts/3c120_devboard.dts	/^			timer_1ms: timer@0x400000 {$/;"	l	label:pb_cpu_to_io
timer_base	arch/arm/cpu/armv7/omap-common/timer.c	/^static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;$/;"	v	typeref:struct:gptimer *	file:
timer_base	arch/arm/mach-socfpga/timer.c	/^static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;$/;"	v	typeref:typename:const struct socfpga_timer *	file:
timer_base	arch/arm/mach-zynq/timer.c	/^static struct scu_timer *timer_base =$/;"	v	typeref:struct:scu_timer *	file:
timer_conv_64	drivers/timer/timer-uclass.c	/^u64 timer_conv_64(u32 count)$/;"	f	typeref:typename:u64
timer_ctrl_reg	arch/arm/include/asm/arch-rockchip/timer.h	/^	unsigned int timer_ctrl_reg;$/;"	m	struct:rk_timer	typeref:typename:unsigned int
timer_curr_value0	arch/arm/include/asm/arch-rockchip/timer.h	/^	unsigned int timer_curr_value0;$/;"	m	struct:rk_timer	typeref:typename:unsigned int
timer_curr_value1	arch/arm/include/asm/arch-rockchip/timer.h	/^	unsigned int timer_curr_value1;$/;"	m	struct:rk_timer	typeref:typename:unsigned int
timer_dev_priv	include/timer.h	/^struct timer_dev_priv {$/;"	s
timer_early_get_count	drivers/timer/sandbox_timer.c	/^u64 notrace timer_early_get_count(void)$/;"	f	typeref:typename:u64 notrace
timer_early_get_rate	drivers/timer/sandbox_timer.c	/^unsigned long notrace timer_early_get_rate(void)$/;"	f	typeref:typename:unsigned long notrace
timer_en0	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 timer_en0;		\/*0x1d0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
timer_en1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 timer_en1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
timer_en4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 timer_en4;		\/*0x1f0*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
timer_en5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 timer_en5;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
timer_fnc_t	arch/x86/include/asm/u-boot-x86.h	/^typedef void (timer_fnc_t) (void);$/;"	t	typeref:typename:void ()(void)
timer_get_boot_us	drivers/timer/tsc_timer.c	/^ulong timer_get_boot_us(void)$/;"	f	typeref:typename:ulong
timer_get_count	drivers/timer/timer-uclass.c	/^int notrace timer_get_count(struct udevice *dev, u64 *count)$/;"	f	typeref:typename:int notrace
timer_get_rate	drivers/timer/timer-uclass.c	/^unsigned long notrace timer_get_rate(struct udevice *dev)$/;"	f	typeref:typename:unsigned long notrace
timer_get_us	arch/arm/cpu/armv7/s5p-common/timer.c	/^unsigned long __attribute__((no_instrument_function)) timer_get_us(void)$/;"	f	typeref:typename:unsigned long
timer_get_us	arch/xtensa/lib/time.c	/^unsigned long timer_get_us(void)$/;"	f	typeref:typename:unsigned long
timer_get_us	drivers/timer/tsc_timer.c	/^ulong notrace timer_get_us(void)$/;"	f	typeref:typename:ulong notrace
timer_get_us	lib/time.c	/^unsigned long __weak notrace timer_get_us(void)$/;"	f	typeref:typename:unsigned long __weak notrace
timer_get_us_down	arch/arm/cpu/armv7/s5p-common/timer.c	/^static unsigned long timer_get_us_down(void)$/;"	f	typeref:typename:unsigned long	file:
timer_global_init	arch/arm/cpu/armv7/iproc-common/timer.c	/^void timer_global_init(void)$/;"	f	typeref:typename:void
timer_global_read	arch/arm/cpu/armv7/iproc-common/timer.c	/^static inline uint64_t timer_global_read(void)$/;"	f	typeref:typename:uint64_t	file:
timer_h	arch/m68k/include/asm/timer.h	/^#define	timer_h$/;"	d
timer_h	drivers/usb/eth/asix88179.c	/^	unsigned char ctrl, timer_l, timer_h, size, ifg;$/;"	m	struct:__anond17683530108	typeref:typename:unsigned char	file:
timer_handler	examples/standalone/timer.c	/^void timer_handler (void *arg)$/;"	f	typeref:typename:void	file:
timer_init	arch/arc/lib/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm1136/mx31/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm1136/mx35/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm720t/interrupts.c	/^int timer_init (void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm920t/ep93xx/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm920t/imx/timer.c	/^int timer_init (void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/armada100/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/lpc32xx/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/mx25/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/mx27/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/mxs/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/omap/timer.c	/^int timer_init (void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/arm926ejs/spear/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/arch_timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/iproc-common/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/ls102xa/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/omap-common/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/s5p-common/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/stv0991/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/sunxi/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv7/vf610/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/armv8/fsl-layerscape/cpu.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/cpu/pxa/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/imx-common/syscounter.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/imx-common/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-at91/arm920t/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-at91/arm926ejs/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-at91/armv7/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-davinci/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-highbank/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-mvebu/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-orion5x/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-rmobile/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-socfpga/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-stm32/stm32f1/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-stm32/stm32f4/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-stm32/stm32f7/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-uniphier/arm32/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-uniphier/arm64/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-versatile/timer.c	/^int timer_init (void)$/;"	f	typeref:typename:int
timer_init	arch/arm/mach-zynq/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/avr32/cpu/interrupts.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/blackfin/cpu/interrupts.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/m68k/cpu/mcf547x_8x/slicetimer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/m68k/lib/time.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/m68k/lib/time.c	/^void timer_init(void)$/;"	f	typeref:typename:void
timer_init	arch/microblaze/cpu/timer.c	/^int timer_init (void)$/;"	f	typeref:typename:int
timer_init	arch/microblaze/cpu/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/nds32/cpu/n1213/ag101/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/openrisc/lib/timer.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/sh/lib/time.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/sh/lib/time_sh2.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/sparc/cpu/leon2/cpu_init.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	arch/sparc/cpu/leon3/cpu_init.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	board/armltd/integrator/timer.c	/^int timer_init (void)$/;"	f	typeref:typename:int
timer_init	board/cavium/thunderx/thunderx.c	/^int timer_init(void)$/;"	f	typeref:typename:int
timer_init	lib/time.c	/^int __weak timer_init(void)$/;"	f	typeref:typename:int __weak
timer_init_r	arch/arm/mach-orion5x/timer.c	/^void timer_init_r(void)$/;"	f	typeref:typename:void
timer_int_status	arch/arm/include/asm/arch-rockchip/timer.h	/^	unsigned int timer_int_status;$/;"	m	struct:rk_timer	typeref:typename:unsigned int
timer_interrupt	arch/powerpc/lib/interrupts.c	/^void timer_interrupt (struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc512x/interrupts.c	/^void timer_interrupt_cpu (struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc5xx/interrupts.c	/^void timer_interrupt_cpu (struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc5xxx/interrupts.c	/^void timer_interrupt_cpu(struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc8260/interrupts.c	/^void timer_interrupt_cpu (struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc83xx/interrupts.c	/^void timer_interrupt_cpu (struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc85xx/interrupts.c	/^void timer_interrupt_cpu(struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc86xx/interrupts.c	/^void timer_interrupt_cpu(struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/mpc8xx/interrupts.c	/^void timer_interrupt_cpu (struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_cpu	arch/powerpc/cpu/ppc4xx/interrupts.c	/^void timer_interrupt_cpu(struct pt_regs *regs)$/;"	f	typeref:typename:void
timer_interrupt_handler	arch/avr32/cpu/start.S	/^timer_interrupt_handler:$/;"	l
timer_isr	arch/microblaze/cpu/timer.c	/^static void timer_isr(void *arg)$/;"	f	typeref:typename:void	file:
timer_isr	arch/openrisc/lib/timer.c	/^void timer_isr(void)$/;"	f	typeref:typename:void
timer_l	drivers/usb/eth/asix88179.c	/^	unsigned char ctrl, timer_l, timer_h, size, ifg;$/;"	m	struct:__anond17683530108	typeref:typename:unsigned char	file:
timer_list	include/linux/compat.h	/^struct timer_list {};$/;"	s
timer_load_count0	arch/arm/include/asm/arch-rockchip/timer.h	/^	unsigned int timer_load_count0;$/;"	m	struct:rk_timer	typeref:typename:unsigned int
timer_load_count1	arch/arm/include/asm/arch-rockchip/timer.h	/^	unsigned int timer_load_count1;$/;"	m	struct:rk_timer	typeref:typename:unsigned int
timer_ops	include/timer.h	/^struct timer_ops {$/;"	s
timer_overflow	arch/avr32/cpu/interrupts.c	/^volatile unsigned long timer_overflow;$/;"	v	typeref:typename:volatile unsigned long
timer_post_probe	drivers/timer/timer-uclass.c	/^static int timer_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
timer_pre_probe	drivers/timer/timer-uclass.c	/^static int timer_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
timer_ptr	arch/arm/mach-rockchip/rk_timer.c	/^struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;$/;"	v	typeref:struct:rk_timer * const
timer_rate_hz	arch/arm/include/asm/global_data.h	/^	unsigned long timer_rate_hz;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
timer_read_counter	arch/arc/lib/timer.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	arch/arm/cpu/arm1136/mx31/timer.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	arch/arm/cpu/armv8/generic_timer.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	arch/arm/imx-common/timer.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	arch/arm/mach-uniphier/arm32/timer.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	arch/mips/cpu/time.c	/^unsigned long notrace timer_read_counter(void)$/;"	f	typeref:typename:unsigned long notrace
timer_read_counter	arch/sh/lib/time.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	board/sandbox/sandbox.c	/^unsigned long timer_read_counter(void)$/;"	f	typeref:typename:unsigned long
timer_read_counter	lib/time.c	/^unsigned long notrace timer_read_counter(void)$/;"	f	typeref:typename:unsigned long notrace
timer_regs	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^struct timer_regs {$/;"	s
timer_regs	arch/arm/include/asm/arch-lpc32xx/timer.h	/^struct timer_regs {$/;"	s
timer_reset_value	arch/arm/include/asm/global_data.h	/^	unsigned long long timer_reset_value;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long long
timer_sys_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	timer_sys_clk_div: timer_sys_clk_div {$/;"	l
timer_systick_init	arch/arm/cpu/armv7/iproc-common/timer.c	/^void timer_systick_init(uint32_t tick_ms)$/;"	f	typeref:typename:void
timer_systick_isr	arch/arm/cpu/armv7/iproc-common/timer.c	/^void timer_systick_isr(void *data)$/;"	f	typeref:typename:void
timers	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 timers;	\/*0x034*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
timerus	arch/arm/include/asm/arch-tegra/tegra.h	/^struct timerus {$/;"	s
timespec	fs/ubifs/ubifs.h	/^struct timespec {$/;"	s
timestamp	arch/arm/cpu/arm720t/interrupts.c	/^static ulong timestamp;$/;"	v	typeref:typename:ulong	file:
timestamp	arch/arm/cpu/arm926ejs/mx27/timer.c	/^#define timestamp	/;"	d	file:
timestamp	arch/arm/cpu/arm926ejs/mxs/timer.c	/^#define timestamp /;"	d	file:
timestamp	arch/arm/cpu/arm926ejs/omap/timer.c	/^#define timestamp /;"	d	file:
timestamp	arch/arm/cpu/arm926ejs/spear/timer.c	/^#define timestamp /;"	d	file:
timestamp	arch/arm/cpu/armv7/stv0991/timer.c	/^#define timestamp /;"	d	file:
timestamp	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32 timestamp;$/;"	m	struct:qm_host_desc	typeref:typename:u32
timestamp	arch/arm/mach-orion5x/timer.c	/^#define timestamp /;"	d	file:
timestamp	arch/arm/mach-stm32/stm32f7/timer.c	/^#define timestamp /;"	d	file:
timestamp	arch/blackfin/cpu/interrupts.c	/^static ulong timestamp;$/;"	v	typeref:typename:ulong	file:
timestamp	arch/m68k/cpu/mcf547x_8x/slicetimer.c	/^static ulong timestamp;$/;"	v	typeref:typename:ulong	file:
timestamp	arch/m68k/lib/time.c	/^static volatile ulong timestamp = 0;$/;"	v	typeref:typename:volatile ulong	file:
timestamp	arch/microblaze/cpu/timer.c	/^volatile int timestamp = 0;$/;"	v	typeref:typename:volatile int
timestamp	arch/nds32/cpu/n1213/ag101/timer.c	/^static ulong timestamp;$/;"	v	typeref:typename:ulong	file:
timestamp	arch/openrisc/lib/timer.c	/^static ulong timestamp;$/;"	v	typeref:typename:ulong	file:
timestamp	arch/powerpc/lib/interrupts.c	/^static volatile ulong timestamp = 0;$/;"	v	typeref:typename:volatile ulong	file:
timestamp	board/armltd/integrator/timer.c	/^static ulong timestamp;		\/* U-Boot ticks since startup *\/$/;"	v	typeref:typename:ulong	file:
timestamp	drivers/block/sata_mv.c	/^	u32 timestamp;$/;"	m	struct:crpb	typeref:typename:u32	file:
timestamp	drivers/misc/altera_sysid.c	/^	u32	timestamp;	\/* Timestamp *\/$/;"	m	struct:altera_sysid_regs	typeref:typename:u32	file:
timestamp_add	arch/x86/cpu/coreboot/timestamp.c	/^void timestamp_add(enum timestamp_id id, uint64_t ts_time)$/;"	f	typeref:typename:void
timestamp_add_now	arch/x86/cpu/coreboot/timestamp.c	/^void timestamp_add_now(enum timestamp_id id)$/;"	f	typeref:typename:void
timestamp_add_to_bootstage	arch/x86/cpu/coreboot/timestamp.c	/^int timestamp_add_to_bootstage(void)$/;"	f	typeref:typename:int
timestamp_entry	arch/x86/cpu/coreboot/timestamp.c	/^struct timestamp_entry {$/;"	s	file:
timestamp_h	Makefile	/^timestamp_h := include\/generated\/timestamp_autogenerated.h$/;"	m
timestamp_id	arch/x86/include/asm/arch-coreboot/timestamp.h	/^enum timestamp_id {$/;"	g
timestamp_init	arch/x86/cpu/coreboot/timestamp.c	/^void timestamp_init(void)$/;"	f	typeref:typename:void
timestamp_ref_ctrl	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 timestamp_ref_ctrl; \/* 0x128 *\/$/;"	m	struct:crlapb_regs	typeref:typename:u32
timestamp_table	arch/x86/cpu/coreboot/timestamp.c	/^struct timestamp_table {$/;"	s	file:
timestamp_us	tools/mxsimage.h	/^	uint64_t	timestamp_us;$/;"	m	struct:sb_boot_image_header	typeref:typename:uint64_t
timezone	include/efi.h	/^	s16 timezone;$/;"	m	struct:efi_time	typeref:typename:s16
timing	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	timing;$/;"	m	struct:ocotp_regs	typeref:typename:u32
timing	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 timing;$/;"	m	struct:ocotp_regs	typeref:typename:u32
timing	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 timing;$/;"	m	struct:ocotp_regs	typeref:typename:u32
timing	arch/arm/mach-exynos/include/mach/sromc.h	/^	unsigned int timing[FDT_SROM_TIMING_COUNT]; \/* timing parameters *\/$/;"	m	struct:fdt_sromc	typeref:typename:unsigned int[]
timing	drivers/mtd/ftsmc020.c	/^	unsigned int	timing;$/;"	m	struct:ftsmc020_config	typeref:typename:unsigned int	file:
timing	drivers/mtd/nand/pxa3xx_nand.c	/^static struct pxa3xx_nand_timing timing[] = {$/;"	v	typeref:struct:pxa3xx_nand_timing[]	file:
timing	drivers/mtd/nand/pxa3xx_nand.h	/^	struct pxa3xx_nand_timing *timing; \/* NAND Flash timing *\/$/;"	m	struct:pxa3xx_nand_flash	typeref:struct:pxa3xx_nand_timing *
timing	drivers/mtd/nand/tegra_nand.c	/^	u32 timing[FDT_NAND_TIMING_COUNT];$/;"	m	struct:fdt_nand	typeref:typename:u32[]	file:
timing	drivers/mtd/nand/tegra_nand.h	/^	u32	timing;		\/* offset 14h *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
timing	drivers/usb/dwc3/ep0.c	/^	struct timing {$/;"	s	function:dwc3_ep0_set_sel_cmpl	file:
timing	drivers/video/atmel_lcdfb.c	/^	struct display_timing timing;$/;"	m	struct:atmel_fb_priv	typeref:struct:display_timing	file:
timing	drivers/video/tegra.c	/^	struct display_timing timing;$/;"	m	struct:tegra_lcd_priv	typeref:struct:display_timing	file:
timing	include/edid.h	/^		unsigned char timing[72];$/;"	m	union:edid1_info::__anon4a0dc044040a	typeref:typename:unsigned char[72]
timing	tools/mxsboot.c	/^	}			timing;$/;"	m	struct:mx28_nand_fcb	typeref:struct:mx28_nand_fcb::__anond6c4b0c20108	file:
timing0	arch/arm/dts/imx6ull-14x14-evk.dts	/^			timing0: timing0 {$/;"	l	label:display0
timing1	arch/arm/dts/am335x-pxm50.dts	/^				timing1: 1376x768p50 {$/;"	l
timing1	arch/arm/dts/am335x-rut.dts	/^			timing1: 480x800p60 {$/;"	l
timing1	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 timing1;	\/* 0x10618 *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
timing1	drivers/spi/tegra114_spi.c	/^	u32 timing1;	\/* 008:SPI_CS_TIM1 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
timing1	drivers/spi/tegra210_qspi.c	/^	u32 timing1;	\/* 008:QSPI_CS_TIM1 register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
timing2	arch/arm/include/asm/arch-mvebu/spi.h	/^	u32 timing2;	\/* 0x1061c *\/$/;"	m	struct:kwspi_registers	typeref:typename:u32
timing2	drivers/mtd/nand/tegra_nand.h	/^	u32	timing2;	\/* offset 1Ch *\/$/;"	m	struct:nand_ctlr	typeref:typename:u32
timing2	drivers/spi/tegra114_spi.c	/^	u32 timing2;	\/* 00c:SPI_CS_TIM2 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
timing2	drivers/spi/tegra210_qspi.c	/^	u32 timing2;	\/* 00c:QSPI_CS_TIM2 register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
timing_cal	drivers/block/ftide020.c	/^static unsigned int timing_cal(u16 t0, u16 t1, u16 t2, u16 t4)$/;"	f	typeref:typename:unsigned int	file:
timing_cfg	drivers/mtd/nand/sunxi_nand.c	/^	u32 timing_cfg;$/;"	m	struct:sunxi_nand_chip	typeref:typename:u32	file:
timing_cfg_0	arch/powerpc/include/asm/immap_83xx.h	/^	u32 timing_cfg_0;	\/* SDRAM Timing Configuration 0 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
timing_cfg_0	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_0;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_0	include/fsl_immap.h	/^	u32	timing_cfg_0;		\/* SDRAM Timing Configuration 0 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_1	arch/powerpc/include/asm/immap_83xx.h	/^	u32 timing_cfg_1;	\/* SDRAM Timing Configuration 1 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
timing_cfg_1	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_1;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_1	include/fsl_immap.h	/^	u32	timing_cfg_1;		\/* SDRAM Timing Configuration 1 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_2	arch/powerpc/include/asm/immap_83xx.h	/^	u32 timing_cfg_2;	\/* SDRAM Timing Configuration 2 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
timing_cfg_2	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_2;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_2	include/fsl_immap.h	/^	u32	timing_cfg_2;		\/* SDRAM Timing Configuration 2 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_3	arch/powerpc/include/asm/immap_83xx.h	/^	u32 timing_cfg_3;	\/* SDRAM Timing Configuration 3 *\/$/;"	m	struct:ddr83xx	typeref:typename:u32
timing_cfg_3	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_3;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_3	include/fsl_immap.h	/^	u32	timing_cfg_3;		\/* SDRAM Timing Configuration 3 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_4	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_4;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_4	include/fsl_immap.h	/^	u32	timing_cfg_4;		\/* SDRAM Timing Configuration 4 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_5	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_5;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_5	include/fsl_immap.h	/^	u32	timing_cfg_5;		\/* SDRAM Timing Configuration 5 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_6	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_6;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_6	include/fsl_immap.h	/^	u32	timing_cfg_6;		\/* SDRAM Timing Configuration 6 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_7	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_7;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_7	include/fsl_immap.h	/^	u32	timing_cfg_7;		\/* SDRAM Timing Configuration 7 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_8	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_8;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_8	include/fsl_immap.h	/^	u32	timing_cfg_8;		\/* SDRAM Timing Configuration 8 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_cfg_9	include/fsl_ddr_sdram.h	/^	unsigned int timing_cfg_9;$/;"	m	struct:fsl_ddr_cfg_regs_s	typeref:typename:unsigned int
timing_cfg_9	include/fsl_immap.h	/^	u32	timing_cfg_9;		\/* SDRAM Timing Configuration 9 *\/$/;"	m	struct:ccsr_ddr	typeref:typename:u32
timing_ctl	drivers/mtd/nand/sunxi_nand.c	/^	u32 timing_ctl;$/;"	m	struct:sunxi_nand_chip	typeref:typename:u32	file:
timing_ctrl	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 timing_ctrl;	\/* 0x28: EMC_TIMING_CONTROL *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
timing_data	arch/arm/mach-exynos/clock_init.h	/^	unsigned timing_data;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timing_entry	include/fdtdec.h	/^struct timing_entry {$/;"	s
timing_h	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 timing_h;				\/* 0x64 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
timing_h	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 timing_h;$/;"	m	struct:panel_config	typeref:typename:u32
timing_index	include/atmel_lcd.h	/^	int timing_index;$/;"	m	struct:atmel_lcd_platdata	typeref:typename:int
timing_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 timing_params_sn20[]		= {0x80, 0x05, 0x40, 0x28};$/;"	v	typeref:typename:u16[]	file:
timing_power	arch/arm/mach-exynos/clock_init.h	/^	unsigned timing_power;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timing_ref	arch/arm/mach-exynos/clock_init.h	/^	unsigned timing_ref;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timing_row	arch/arm/mach-exynos/clock_init.h	/^	unsigned timing_row;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timing_set_sw	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timing_set_sw;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timing_v	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 timing_v;				\/* 0x68 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
timing_v	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 timing_v;$/;"	m	struct:panel_config	typeref:typename:u32
timingdata	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned timingdata;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timingdata	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingdata;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
timingdata	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingdata;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
timingdata0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingdata0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingdata1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingdata1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingpower	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned timingpower;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timingpower	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingpower;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
timingpower	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingpower;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
timingpower0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingpower0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingpower1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingpower1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingpzq	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingpzq;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingpzq	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingpzq;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
timingref	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned timingref;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timingref	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingref;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
timingref	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingref;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingref	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingref;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
timingrow	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned timingrow;$/;"	m	struct:mem_timings	typeref:typename:unsigned
timingrow	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingrow;$/;"	m	struct:exynos4_dmc	typeref:typename:unsigned int
timingrow	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingrow;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
timingrow0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingrow0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timingrow1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int timingrow1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
timings	arch/arm/mach-at91/include/mach/sama5d3_smc.h	/^	u32	timings;	\/* 0x60C SMC Cycle Register *\/$/;"	m	struct:at91_cs	typeref:typename:u32
timings	arch/x86/include/asm/arch-quark/mrc.h	/^	struct mrc_timings timings;$/;"	m	struct:mrc_params	typeref:struct:mrc_timings
timings_elpida_200_mhz	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static const struct lpddr2_ac_timings timings_elpida_200_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
timings_elpida_333_mhz	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static const struct lpddr2_ac_timings timings_elpida_333_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
timings_elpida_400_mhz	arch/arm/cpu/armv7/omap4/sdram_elpida.c	/^static const struct lpddr2_ac_timings timings_elpida_400_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
timings_jedec_200_mhz	arch/arm/cpu/armv7/omap4/emif.c	/^static const struct lpddr2_ac_timings timings_jedec_200_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
timings_jedec_400_mhz	arch/arm/cpu/armv7/omap4/emif.c	/^static const struct lpddr2_ac_timings timings_jedec_400_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
timings_jedec_532_mhz	arch/arm/cpu/armv7/omap5/emif.c	/^static const struct lpddr2_ac_timings timings_jedec_532_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
timings_jedec_532_mhz	arch/arm/cpu/armv7/omap5/sdram.c	/^static const struct lpddr2_ac_timings timings_jedec_532_mhz = {$/;"	v	typeref:typename:const struct lpddr2_ac_timings	file:
tinit	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tinit;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tinit	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tinit;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tinit	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tinit;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tinit	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tinit;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tinit	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tinit;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tinit_cntr0_val	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	tinit_cntr0_val;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
tinit_cntr1_val	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	tinit_cntr1_val;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
tinit_cntr2_val	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	tinit_cntr2_val;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
tintcstat	arch/arm/mach-exynos/include/mach/pwm.h	/^	unsigned int	tintcstat;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tintcstat	arch/arm/mach-s5pc1xx/include/mach/pwm.h	/^	unsigned int	tintcstat;$/;"	m	struct:s5p_timer	typeref:typename:unsigned int
tinyconfig	scripts/kconfig/Makefile	/^tinyconfig:$/;"	t
tiocp_cfg	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tiocp_cfg;		\/* offset 0x10 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tiocp_cfg	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tiocp_cfg;	\/* 0x10 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tiocp_cfg	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tiocp_cfg;		\/* 0x10 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tiocp_cfg	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tiocp_cfg;		\/* 0x10 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tiocp_cfg	drivers/timer/omap-timer.c	/^	unsigned int tiocp_cfg;		\/* offset 0x10 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tios	tools/gdb/serial.c	/^static struct termios tios = { BRKINT, 0, B115200|CS8|CREAD, 0,   0   };$/;"	v	typeref:struct:termios	file:
tios	tools/gdb/serial.c	/^static struct termios tios = { BRKINT, 0, B115200|CS8|CREAD, 0, { 0 } };$/;"	v	typeref:struct:termios	file:
tip_dunit_mux_select_func	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_TIP_DUNIT_MUX_SELECT_FUNC_PTR tip_dunit_mux_select_func;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_TIP_DUNIT_MUX_SELECT_FUNC_PTR
tip_dunit_read_func	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_TIP_DUNIT_REG_READ_FUNC_PTR tip_dunit_read_func;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_TIP_DUNIT_REG_READ_FUNC_PTR
tip_dunit_write_func	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_TIP_DUNIT_REG_WRITE_FUNC_PTR tip_dunit_write_func;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_TIP_DUNIT_REG_WRITE_FUNC_PTR
tip_get_cs_config_info	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_GET_CS_CONFIG_FUNC_PTR tip_get_cs_config_info;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_GET_CS_CONFIG_FUNC_PTR
tip_get_device_info_func	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_TIP_GET_DEVICE_INFO tip_get_device_info_func;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_TIP_GET_DEVICE_INFO
tip_get_freq_config_info_func	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_TIP_GET_FREQ_CONFIG_INFO tip_get_freq_config_info_func;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_TIP_GET_FREQ_CONFIG_INFO
tip_get_temperature	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_TRAINING_IP_GET_TEMP tip_get_temperature;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_TRAINING_IP_GET_TEMP
tip_set_freq_divider_func	drivers/ddr/marvell/a38x/ddr3_training_ip_prv_if.h	/^	HWS_SET_FREQ_DIVIDER_FUNC_PTR tip_set_freq_divider_func;$/;"	m	struct:hws_tip_config_func_db	typeref:typename:HWS_SET_FREQ_DIVIDER_FUNC_PTR
tirqen	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 tirqen;		\/* 0x00 *\/$/;"	m	struct:sunxi_timer_reg	typeref:typename:u32
tirqen	arch/arm/include/asm/arch/timer.h	/^	u32 tirqen;		\/* 0x00 *\/$/;"	m	struct:sunxi_timer_reg	typeref:typename:u32
tirqsta	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 tirqsta;		\/* 0x04 *\/$/;"	m	struct:sunxi_timer_reg	typeref:typename:u32
tirqsta	arch/arm/include/asm/arch/timer.h	/^	u32 tirqsta;		\/* 0x04 *\/$/;"	m	struct:sunxi_timer_reg	typeref:typename:u32
tis_access	drivers/tpm/tpm_tis.h	/^enum tis_access {$/;"	g
tis_ps	include/common_timing_params.h	/^	unsigned int tis_ps;	\/* byte 32, spd->ca_setup *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tis_ps	include/fsl_ddr_dimm_params.h	/^	int tis_ps;	\/* byte 32, spd->ca_setup *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tis_readresponse	drivers/tpm/tpm_tis_lpc.c	/^static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)$/;"	f	typeref:typename:int	file:
tis_senddata	drivers/tpm/tpm_tis_lpc.c	/^static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)$/;"	f	typeref:typename:int	file:
tis_status	drivers/tpm/tpm_tis.h	/^enum tis_status {$/;"	g
tis_wait_reg	drivers/tpm/tpm_tis_lpc.c	/^static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,$/;"	f	typeref:typename:int	file:
tisr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tisr;		\/* offset 0x2c *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tisr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tisr;	\/* 0x18 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tisr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tisr;		\/* 0x18 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tisr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tisr;		\/* 0x28 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tisr	drivers/timer/omap-timer.c	/^	unsigned int tisr;		\/* offset 0x2c *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tisr_raw	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tisr_raw;		\/* 0x24 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tistat	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tistat;		\/* offset 0x28 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tistat	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tistat;	\/* 0x14 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tistat	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tistat;		\/* 0x14 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
tistat	drivers/timer/omap-timer.c	/^	unsigned int tistat;		\/* offset 0x28 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tistatr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tistatr;		\/* offset 0x24 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tistatr	drivers/timer/omap-timer.c	/^	unsigned int tistatr;		\/* offset 0x24 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
title	cmd/bootmenu.c	/^	char *title;			\/* title of entry *\/$/;"	m	struct:bootmenu_entry	typeref:typename:char *	file:
title	cmd/pxe.c	/^	char *title;$/;"	m	struct:pxe_menu	typeref:typename:char *	file:
title	common/menu.c	/^	char *title;$/;"	m	struct:menu	typeref:typename:char *	file:
title	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color title;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
tizen_logo_16bpp	lib/tizen/tizen_logo_16bpp.h	/^unsigned char tizen_logo_16bpp[] = {$/;"	v	typeref:typename:unsigned char[]
tizen_logo_16bpp_gzip	lib/tizen/tizen_logo_16bpp_gzip.h	/^unsigned char tizen_logo_16bpp_gzip[] = {$/;"	v	typeref:typename:unsigned char[]
tjbr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tjbr;		\/* TX Jabber Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tjbr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tjbr;		\/* 0x24718 - Transmit Jabber Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tjbr	include/fsl_dtsec.h	/^	u32	tjbr;		\/* Transmit jabber frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tjbr	include/tsec.h	/^	u32	tjbr;		\/* Transmit Jabber Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tjt	Makefile	/^tjt:    all$/;"	t
tjt.dump	Makefile	/^tjt.dump:       u-boot$/;"	t
tjt.sym	Makefile	/^tjt.sym:        u-boot$/;"	t
tk	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tk;			\/* 0x0C *\/$/;"	m	struct:atac	typeref:typename:u8
tlb_addr	arch/arm/include/asm/global_data.h	/^	unsigned long tlb_addr;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tlb_allocated	arch/arm/include/asm/global_data.h	/^	unsigned long tlb_allocated;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tlb_emerg	arch/arm/include/asm/global_data.h	/^	unsigned long tlb_emerg;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tlb_fill	arch/nds32/cpu/n1213/start.S	/^tlb_fill:$/;"	l
tlb_fillptr	arch/arm/include/asm/global_data.h	/^	unsigned long tlb_fillptr;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tlb_map_range	arch/powerpc/cpu/mpc85xx/tlb.c	/^uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,$/;"	f	typeref:typename:uint64_t
tlb_map_type	arch/powerpc/include/asm/mmu.h	/^enum tlb_map_type {$/;"	g
tlb_misc	arch/nds32/cpu/n1213/start.S	/^tlb_misc:$/;"	l
tlb_not_present	arch/nds32/cpu/n1213/start.S	/^tlb_not_present:$/;"	l
tlb_probe	arch/mips/include/asm/mipsregs.h	/^static inline void tlb_probe(void)$/;"	f	typeref:typename:void
tlb_read	arch/mips/include/asm/mipsregs.h	/^static inline void tlb_read(void)$/;"	f	typeref:typename:void
tlb_size	arch/arm/include/asm/global_data.h	/^	unsigned long tlb_size;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
tlb_table	board/Arcturus/ucp1020/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/b4860qds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/bsc9131rdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/bsc9132qds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/c29xpcie/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/common/p_corenet/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8536ds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8540ads/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8541cds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8544ds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8548cds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8555cds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8560ads/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8568mds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8569mds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/mpc8572ds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/p1010rdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/p1022ds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/p1023rdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/p1_p2_rdb_pc/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/p1_twr/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t102xqds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t102xrdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t1040qds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t104xrdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t208xqds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t208xrdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t4qds/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/freescale/t4rdb/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/gdsys/p1022/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/keymile/kmp204x/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/sbc8548/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/socrates/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/varisys/cyrus/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/xes/xpedite520x/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/xes/xpedite537x/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_table	board/xes/xpedite550x/tlb.c	/^struct fsl_e_tlb_entry tlb_table[] = {$/;"	v	typeref:struct:fsl_e_tlb_entry[]
tlb_vlpt_miss	arch/nds32/cpu/n1213/start.S	/^tlb_vlpt_miss:$/;"	l
tlb_word2_i_value	arch/powerpc/cpu/ppc4xx/tlb.c	/^	u32 tlb_word2_i_value;$/;"	m	struct:region	typeref:typename:u32	file:
tlb_write_indexed	arch/mips/include/asm/mipsregs.h	/^static inline void tlb_write_indexed(void)$/;"	f	typeref:typename:void
tlb_write_random	arch/mips/include/asm/mipsregs.h	/^static inline void tlb_write_random(void)$/;"	f	typeref:typename:void
tlbentry	arch/powerpc/include/asm/mmu.h	/^#define tlbentry(/;"	d
tlbie	arch/powerpc/include/asm/processor.h	/^#define tlbie(/;"	d
tlbinvf	arch/mips/include/asm/mipsregs.h	/^static inline void tlbinvf(void)$/;"	f	typeref:typename:void
tlbloop	board/dbau1x00/lowlevel_init.S	/^tlbloop:$/;"	l
tlblp	arch/powerpc/cpu/mpc86xx/start.S	/^tlblp:$/;"	l
tlbnx2	arch/powerpc/cpu/ppc4xx/start.S	/^tlbnx2:	addi	r4,r4,1		\/* Next TLB *\/$/;"	l
tlbnxt	arch/powerpc/cpu/ppc4xx/start.S	/^tlbnxt:	addi	r4,r4,1		\/* Next TLB *\/$/;"	l
tlbsx	arch/powerpc/cpu/mpc85xx/tlb.c	/^static void tlbsx (const volatile unsigned *addr)$/;"	f	typeref:typename:void	file:
tlbtab	board/amcc/bamboo/init.S	/^tlbtab:$/;"	l
tlbtab	board/amcc/canyonlands/init.S	/^tlbtab:$/;"	l
tlbtab	board/amcc/luan/init.S	/^tlbtab:$/;"	l
tlbtab	board/amcc/redwood/init.S	/^tlbtab:$/;"	l
tlbtab	board/amcc/sequoia/init.S	/^tlbtab:$/;"	l
tlbtab	board/amcc/yosemite/init.S	/^tlbtab:$/;"	l
tlbtab	board/esd/pmc440/init.S	/^tlbtab:$/;"	l
tlbtab	board/gdsys/gdppc440etx/init.S	/^tlbtab:$/;"	l
tlbtab	board/gdsys/intip/init.S	/^tlbtab:$/;"	l
tlbtab	board/liebherr/lwmon5/init.S	/^tlbtab:$/;"	l
tlbtab	board/mosaixtech/icon/init.S	/^tlbtab:$/;"	l
tlbtab	board/t3corp/init.S	/^tlbtab:$/;"	l
tlbtab	board/xes/xpedite1000/init.S	/^tlbtab:$/;"	l
tlbtab	board/xilinx/ppc440-generic/init.S	/^tlbtab:$/;"	l
tlbtabA	board/amcc/katmai/init.S	/^tlbtabA:$/;"	l
tlbtabA	board/amcc/yucca/init.S	/^tlbtabA:$/;"	l
tlbtabB	board/amcc/katmai/init.S	/^tlbtabB:$/;"	l
tlbtabB	board/amcc/yucca/init.S	/^tlbtabB:$/;"	l
tlbtab_end	arch/powerpc/include/asm/mmu.h	/^#define tlbtab_end\\/;"	d
tlbtab_end	board/xilinx/ppc440-generic/init.S	/^tlbtab_end$/;"	l
tlbtab_start	arch/powerpc/include/asm/mmu.h	/^#define tlbtab_start\\/;"	d
tlbtab_start	board/xilinx/ppc440-generic/init.S	/^tlbtab_start$/;"	l
tlcl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tlcl;		\/* TX Late Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tlcl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tlcl;		\/* 0x24704 - Transmit Late Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tlcl	include/fsl_dtsec.h	/^	u32	tlcl;		\/* Transmit late collision pkt *\/$/;"	m	struct:dtsec	typeref:typename:u32
tlcl	include/tsec.h	/^	u32	tlcl;		\/* Transmit Late Collision Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tldr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tldr;		\/* offset 0x40 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tldr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tldr;	\/* 0x2c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tldr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tldr;		\/* 0x2c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tldr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tldr;		\/* 0x40 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tldr	drivers/timer/omap-timer.c	/^	unsigned int tldr;		\/* offset 0x40 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tlen_rlen	drivers/net/pcnet.c	/^	u16 tlen_rlen;$/;"	m	struct:pcnet_init_block	typeref:typename:u16	file:
tlf	drivers/net/xilinx_ll_temac_fifo.h	/^	u32 tlf;	\/* Transmit Length FIFO (WO) *\/$/;"	m	struct:fifo_ctrl	typeref:typename:u32
tlrfp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tlrfp;		\/* 0x1B0 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tls	arch/x86/include/asm/me_common.h	/^	u32 tls:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
tlv320aic23	arch/xtensa/dts/xtfpga.dtsi	/^			tlv320aic23: sound-codec@0 {$/;"	l	label:spi0
tlv320aic3106	arch/arm/dts/am335x-evm.dts	/^	tlv320aic3106: tlv320aic3106@1b {$/;"	l
tlv320aic3106	arch/arm/dts/am335x-evmsk.dts	/^	tlv320aic3106: tlv320aic3106@1b {$/;"	l
tlv320aic3106	arch/arm/dts/am437x-sk-evm.dts	/^	tlv320aic3106: tlv320aic3106@1b {$/;"	l
tlv320aic3111	arch/arm/dts/am43x-epos-evm.dts	/^	tlv320aic3111: tlv320aic3111@18 {$/;"	l
tlwfp	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u32 tlwfp;		\/* 0x1B4 *\/$/;"	m	struct:fecdma	typeref:typename:u32
tm	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tm;			\/* 0x09 *\/$/;"	m	struct:atac	typeref:typename:u8
tm	board/mpl/mip405/mip405.c	/^static struct rtc_time tm;$/;"	v	typeref:struct:rtc_time	file:
tm	drivers/net/ftgmac100.h	/^	unsigned int	tm;		\/* 0x58 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
tm	drivers/net/ftmac100.h	/^	unsigned int	tm;		\/* 0xcc *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
tm	include/linux/time.h	/^    struct tm tm;$/;"	v	typeref:struct:tm
tm	include/linux/time.h	/^struct tm {$/;"	s
tm_gmtoff	include/linux/time.h	/^    long int tm_gmtoff;           \/* Seconds east of UTC.  *\/$/;"	m	struct:tm	typeref:typename:long int
tm_hour	include/linux/time.h	/^    int tm_hour;                  \/* Hours.       [0-23] *\/$/;"	m	struct:tm	typeref:typename:int
tm_hour	include/rtc_def.h	/^	int tm_hour;$/;"	m	struct:rtc_time	typeref:typename:int
tm_isdst	include/linux/time.h	/^    int tm_isdst;                 \/* DST.         [-1\/0\/1]*\/$/;"	m	struct:tm	typeref:typename:int
tm_isdst	include/rtc_def.h	/^	int tm_isdst;$/;"	m	struct:rtc_time	typeref:typename:int
tm_mday	include/linux/time.h	/^    int tm_mday;                  \/* Day.         [1-31] *\/$/;"	m	struct:tm	typeref:typename:int
tm_mday	include/rtc_def.h	/^	int tm_mday;$/;"	m	struct:rtc_time	typeref:typename:int
tm_min	include/linux/time.h	/^    int tm_min;                   \/* Minutes.     [0-59] *\/$/;"	m	struct:tm	typeref:typename:int
tm_min	include/rtc_def.h	/^	int tm_min;$/;"	m	struct:rtc_time	typeref:typename:int
tm_mon	include/linux/time.h	/^    int tm_mon;                   \/* Month.       [0-11] *\/$/;"	m	struct:tm	typeref:typename:int
tm_mon	include/rtc_def.h	/^	int tm_mon;$/;"	m	struct:rtc_time	typeref:typename:int
tm_sec	include/linux/time.h	/^    int tm_sec;                   \/* Seconds.     [0-60] (1 leap second) *\/$/;"	m	struct:tm	typeref:typename:int
tm_sec	include/rtc_def.h	/^	int tm_sec;$/;"	m	struct:rtc_time	typeref:typename:int
tm_wday	include/linux/time.h	/^    int tm_wday;                  \/* Day of week. [0-6] *\/$/;"	m	struct:tm	typeref:typename:int
tm_wday	include/rtc_def.h	/^	int tm_wday;$/;"	m	struct:rtc_time	typeref:typename:int
tm_yday	include/linux/time.h	/^    int tm_yday;                  \/* Days in year.[0-365] *\/$/;"	m	struct:tm	typeref:typename:int
tm_yday	include/rtc_def.h	/^	int tm_yday;$/;"	m	struct:rtc_time	typeref:typename:int
tm_year	include/linux/time.h	/^    int tm_year;                  \/* Year - 1900.  *\/$/;"	m	struct:tm	typeref:typename:int
tm_year	include/rtc_def.h	/^	int tm_year;$/;"	m	struct:rtc_time	typeref:typename:int
tm_zone	include/linux/time.h	/^    __const char *tm_zone;        \/* Timezone abbreviation.  *\/$/;"	m	struct:tm	typeref:typename:__const char *
tmar	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tmar;		\/* offset 0x4c *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tmar	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 tmar;	\/* 0x38 rw*\/$/;"	m	struct:gptimer	typeref:typename:u32
tmar	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 tmar;		\/* 0x38 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tmar	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 tmar;		\/* 0x4c rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
tmar	drivers/timer/omap-timer.c	/^	unsigned int tmar;		\/* offset 0x4c *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tmask	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 tmask;$/;"	m	struct:ssi	typeref:typename:u32
tmca	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tmca;		\/* TX Multicast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tmca	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tmca;		\/* 0x246e8 - Transmit Multicast Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tmca	drivers/qe/uec.h	/^	u32 tmca;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
tmca	include/fsl_dtsec.h	/^	u32	tmca;		\/* Transmit multicast packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
tmca	include/linux/immap_qe.h	/^	u32 tmca;		\/* Total number of frames that were transmitted$/;"	m	struct:ucc_ethernet	typeref:typename:u32
tmca	include/tsec.h	/^	u32	tmca;		\/* Transmit Multicast Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tmcl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tmcl;		\/* TX Multiple Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tmcl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tmcl;		\/* 0x24700 - Transmit Multiple Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tmcl	include/fsl_dtsec.h	/^	u32	tmcl;		\/* Transmit multiple collision pkt *\/$/;"	m	struct:dtsec	typeref:typename:u32
tmcl	include/tsec.h	/^	u32	tmcl;		\/* Transmit Multiple Collision Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tmcpmaskcr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tmcpmaskcr0;	\/* Thread Machine Check Mask Control Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tmds	drivers/video/rockchip/rk_hdmi.c	/^	u32 tmds;$/;"	m	struct:tmds_n_cts	typeref:typename:u32	file:
tmds_crc	drivers/video/ati_radeon_fb.h	/^	u32		tmds_crc;$/;"	m	struct:radeon_regs	typeref:typename:u32
tmds_n_cts	drivers/video/rockchip/rk_hdmi.c	/^struct tmds_n_cts {$/;"	s	file:
tmds_transmitter_cntl	drivers/video/ati_radeon_fb.h	/^	u32		tmds_transmitter_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
tmg_reg	drivers/mtd/nand/arasan_nfc.c	/^	u32 tmg_reg;$/;"	m	struct:nand_regs	typeref:typename:u32	file:
tmli	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tmli;		\/* 0x11 *\/$/;"	m	struct:atac	typeref:typename:u8
tmod	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tmod;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tmod	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tmod;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tmod	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tmod;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tmod	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tmod;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tmod	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tmod;		\/* 0x130 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tmod	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tmod;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tmod	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tmod;		\/* 0x130 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tmode	drivers/spi/designware_spi.c	/^	u8 tmode;		\/* TR\/TO\/RO\/EEPROM *\/$/;"	m	struct:dw_spi_priv	typeref:typename:u8	file:
tmode	drivers/spi/rk_spi.c	/^	unsigned int tmode;$/;"	m	struct:rockchip_spi_priv	typeref:typename:unsigned int	file:
tmp	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  tmp;            \/* temp *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
tmp	board/xilinx/zynq/board.c	/^static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];$/;"	v	typeref:typename:u8[]	file:
tmp	board/xilinx/zynqmp/zynqmp.c	/^static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];$/;"	v	typeref:typename:u8[]	file:
tmp	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 tmp;			\/* MBAR_ETH + 0x130 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
tmp	include/commproc.h	/^	ushort	tmp;		\/* temp *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
tmp	scripts/mailmapper	/^    tmp, mail = line.split('<')$/;"	v
tmp102	arch/arm/dts/am57xx-beagle-x15.dts	/^	tmp102: tmp102@48 {$/;"	l
tmp102_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	tmp102_pins_default: tmp102_pins_default {$/;"	l
tmp275	arch/arm/dts/am335x-evm.dts	/^	tmp275: tmp275@48 {$/;"	l
tmp_buf	common/command.c	/^static char tmp_buf[CONFIG_SYS_CBSIZE];	\/* copy of console I\/O buffer	*\/$/;"	v	typeref:typename:char[]	file:
tmp_int_td	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_td_t tmp_int_td[USB_MAX_TEMP_INT_TD] __attribute__ ((aligned(16)));	\/* temporary in/;"	v	typeref:typename:uhci_td_t[]	file:
tmp_int_td	board/mpl/common/usb_uhci.c	/^static uhci_td_t tmp_int_td[USB_MAX_TEMP_INT_TD];  \/* temporary interrupt td's  *\/$/;"	v	typeref:typename:uhci_td_t[]	file:
tmp_mb	arch/powerpc/include/asm/cpm_8260.h	/^	ushort  tmp_mb;         \/* temp *\/$/;"	m	struct:scc_hdlc	typeref:typename:ushort
tmp_mb	include/commproc.h	/^	ushort	tmp_mb;		\/* temp *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ushort
tmp_td	arch/sparc/cpu/leon3/usb_uhci.c	/^static uhci_td_t tmp_td[USB_MAX_TEMP_TD] __attribute__ ((aligned(16)));	\/* temporary bulk\/cont/;"	v	typeref:typename:uhci_td_t[]	file:
tmp_td	board/mpl/common/usb_uhci.c	/^static uhci_td_t tmp_td[USB_MAX_TEMP_TD];          \/* temporary bulk\/control td's  *\/$/;"	v	typeref:typename:uhci_td_t[]	file:
tmpbuf	disk/part_iso.c	/^static unsigned char tmpbuf[CD_SECTSIZE];$/;"	v	typeref:typename:unsigned char[]	file:
tmr	arch/arm/mach-orion5x/timer.c	/^	struct orion5x_tmr_val tmr[2];$/;"	m	struct:orion5x_tmr_registers	typeref:struct:orion5x_tmr_val[2]	file:
tmr	arch/m68k/include/asm/timer.h	/^	u16 tmr;		\/* 0x00 Mode register *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
tmr	arch/microblaze/cpu/timer.c	/^microblaze_timer_t *tmr;$/;"	v	typeref:typename:microblaze_timer_t *
tmr1	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tmr1;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tmr2	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tmr2;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tmr3	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tmr3;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tmr4	arch/powerpc/include/asm/immap_85xx.h	/^	u16	tmr4;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
tmrd	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	tmrd;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
tmrd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tmrd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tmrd	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tmrd;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tmrd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tmrd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tmrd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tmrd;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tmrd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tmrd;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tmrd	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tmrd;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tmrd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tmrd;		\/* 0xd4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tmrp	examples/standalone/timer.c	/^  ushort	*tmrp;		\/* Pointer to Timer Mode Register	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:ushort *	file:
tmrr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tmrr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tmrr	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tmrr;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tmrr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tmrr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tmrr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tmrr;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tmrr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tmrr;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tmrr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tmrr;		\/* 0x13c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tms	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int tms;$/;"	m	struct:pad_signals	typeref:typename:int
tms	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int tms;$/;"	m	struct:pad_signals	typeref:typename:int
tmstamp	arch/m68k/include/asm/coldfire/flexcan.h	/^	u8 tmstamp;		\/* 0x00 Timestamp *\/$/;"	m	struct:can_msgbuf_ctrl	typeref:typename:u8
tmu	arch/sh/lib/time.c	/^static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;$/;"	v	typeref:struct:tmu_regs *	file:
tmu_base	drivers/power/exynos-tmu.c	/^	struct exynos5_tmu_reg *tmu_base;$/;"	m	struct:tmu_info	typeref:struct:exynos5_tmu_reg *	file:
tmu_control	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 tmu_control;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
tmu_data	drivers/power/exynos-tmu.c	/^struct tmu_data {$/;"	s	file:
tmu_info	drivers/power/exynos-tmu.c	/^struct tmu_info {$/;"	s	file:
tmu_init	drivers/power/exynos-tmu.c	/^int tmu_init(const void *blob)$/;"	f	typeref:typename:int
tmu_monitor	drivers/power/exynos-tmu.c	/^enum tmu_status_t tmu_monitor(int *temp)$/;"	f	typeref:enum:tmu_status_t
tmu_mux	drivers/power/exynos-tmu.c	/^	int tmu_mux;$/;"	m	struct:tmu_info	typeref:typename:int	file:
tmu_regs	include/sh_tmu.h	/^struct tmu_regs {$/;"	s
tmu_setup_parameters	drivers/power/exynos-tmu.c	/^static void tmu_setup_parameters(struct tmu_info *info)$/;"	f	typeref:typename:void	file:
tmu_state	drivers/power/exynos-tmu.c	/^	int tmu_state;$/;"	m	struct:tmu_info	typeref:typename:int	file:
tmu_status	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 tmu_status;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
tmu_status_t	include/tmu.h	/^enum tmu_status_t {$/;"	g
tmu_timer_start	arch/sh/lib/time.c	/^static void tmu_timer_start(unsigned int timer)$/;"	f	typeref:typename:void	file:
tmu_timer_stop	arch/sh/lib/time.c	/^static void tmu_timer_stop(unsigned int timer)$/;"	f	typeref:typename:void	file:
tn	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tn;			\/* 0x0A *\/$/;"	m	struct:atac	typeref:typename:u8
tn2020_config	drivers/net/phy/teranetics.c	/^int tn2020_config(struct phy_device *phydev)$/;"	f	typeref:typename:int
tn2020_driver	drivers/net/phy/teranetics.c	/^struct phy_driver tn2020_driver = {$/;"	v	typeref:struct:phy_driver
tn2020_startup	drivers/net/phy/teranetics.c	/^int tn2020_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int
tnc_delete	fs/ubifs/tnc.c	/^static int tnc_delete(struct ubifs_info *c, struct ubifs_znode *znode, int n)$/;"	f	typeref:typename:int	file:
tnc_destroy_cnext	fs/ubifs/tnc.c	/^static void tnc_destroy_cnext(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
tnc_insert	fs/ubifs/tnc.c	/^static int tnc_insert(struct ubifs_info *c, struct ubifs_znode *znode,$/;"	f	typeref:typename:int	file:
tnc_mutex	fs/ubifs/ubifs.h	/^	struct mutex tnc_mutex;$/;"	m	struct:ubifs_info	typeref:struct:mutex
tnc_next	fs/ubifs/tnc.c	/^static int tnc_next(struct ubifs_info *c, struct ubifs_znode **zn, int *n)$/;"	f	typeref:typename:int	file:
tnc_prev	fs/ubifs/tnc.c	/^static int tnc_prev(struct ubifs_info *c, struct ubifs_znode **zn, int *n)$/;"	f	typeref:typename:int	file:
tnc_rcba	arch/x86/include/asm/arch-queensbay/tnc.h	/^struct tnc_rcba {$/;"	s
tnc_read_node_nm	fs/ubifs/tnc.c	/^static int tnc_read_node_nm(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int	file:
tncl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tncl;		\/* TX Total Collision Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tncl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tncl;		\/* 0x2470c - Transmit Total Collision Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tncl	include/fsl_dtsec.h	/^	u32	tncl;		\/* Transmit total collision *\/$/;"	m	struct:dtsec	typeref:typename:u32
tncl	include/tsec.h	/^	u32	tncl;		\/* Transmit Total Collision *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tncr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	tncr;		\/* 0x11C Transmit Next Counter Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
tncrs	drivers/net/e1000.h	/^	uint64_t tncrs;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
tnode_mask	fs/yaffs2/yaffs_guts.h	/^	u32 tnode_mask;$/;"	m	struct:yaffs_dev	typeref:typename:u32
tnode_size	fs/yaffs2/yaffs_guts.h	/^	u32 tnode_size;$/;"	m	struct:yaffs_dev	typeref:typename:u32
tnode_width	fs/yaffs2/yaffs_guts.h	/^	u32 tnode_width;$/;"	m	struct:yaffs_dev	typeref:typename:u32
tnodes	fs/yaffs2/yaffs_allocator.c	/^	struct yaffs_tnode *tnodes;$/;"	m	struct:yaffs_tnode_list	typeref:struct:yaffs_tnode *	file:
tnpr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	tnpr;		\/* 0x118 Transmit Next Pointer Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
to	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 to;$/;"	m	struct:wdog_regs	typeref:typename:u32
to	doc/README.x86	/^to B8 00 80 0B 00.$/;"	l
to	doc/README.x86	/^to get the image. There is also an 'extract_blobs.sh' scripts that you can use$/;"	l
to	doc/README.x86	/^to point to a new board. You can also change the Cache-As-RAM (CAR) related$/;"	l
to	include/universe.h	/^	unsigned int to;       \/* Translation *\/$/;"	m	struct:_SLAVE_IMAGE	typeref:typename:unsigned int
to_armd_spi_slave	drivers/spi/armada100_spi.c	/^#define to_armd_spi_slave(/;"	d	file:
to_atmel_spi	drivers/spi/atmel_spi.h	/^static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)$/;"	f	typeref:struct:atmel_spi_slave *
to_bcm	drivers/mmc/bcm2835_sdhci.c	/^static inline struct bcm2835_sdhci_host *to_bcm(struct sdhci_host *host)$/;"	f	typeref:struct:bcm2835_sdhci_host *	file:
to_be32	tools/gpimage-common.c	/^void to_be32(uint32_t *gph_size, uint32_t *gph_load_addr)$/;"	f	typeref:typename:void
to_be_tortured	drivers/mtd/ubi/ubi.h	/^	int to_be_tortured[UBI_FM_MAX_BLOCKS];$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int[]
to_be_tortured	drivers/mtd/ubispl/ubi-wrapper.h	/^	int to_be_tortured[UBI_FM_MAX_BLOCKS];$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int[]
to_bfin_spi_slave	drivers/spi/bfin_spi.c	/^#define to_bfin_spi_slave(/;"	d	file:
to_bfin_spi_slave	drivers/spi/bfin_spi6xx.c	/^#define to_bfin_spi_slave(/;"	d	file:
to_bus_clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline struct bus_clock *to_bus_clk(struct clk *clock)$/;"	f	typeref:struct:bus_clock *
to_bus_clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline struct bus_clock *to_bus_clk(struct clk *clock)$/;"	f	typeref:struct:bus_clock *
to_ccu_clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline struct ccu_clock *to_ccu_clk(struct clk *clock)$/;"	f	typeref:struct:ccu_clock *
to_ccu_clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline struct ccu_clock *to_ccu_clk(struct clk *clock)$/;"	f	typeref:struct:ccu_clock *
to_cf_qspi_slave	drivers/spi/cf_qspi.c	/^#define to_cf_qspi_slave(/;"	d	file:
to_cf_spi_slave	drivers/spi/cf_spi.c	/^static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave)$/;"	f	typeref:struct:cf_spi_slave *	file:
to_clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define to_clk(/;"	d
to_clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define to_clk(/;"	d
to_clk_fixed_rate	drivers/clk/clk_fixed_rate.c	/^#define to_clk_fixed_rate(/;"	d	file:
to_darmdfec	drivers/net/armada100_fec.h	/^#define to_darmdfec(/;"	d
to_davinci_spi	drivers/spi/davinci_spi.c	/^static inline struct davinci_spi_slave *to_davinci_spi(struct spi_slave *slave)$/;"	f	typeref:struct:davinci_spi_slave *	file:
to_dfu_mode	drivers/usb/gadget/f_dfu.c	/^static inline void to_dfu_mode(struct f_dfu *f_dfu)$/;"	f	typeref:typename:void	file:
to_dnet	drivers/net/dnet.c	/^#define to_dnet(/;"	d	file:
to_dwc3_ep	drivers/usb/dwc3/gadget.h	/^#define to_dwc3_ep(/;"	d
to_dwc3_request	drivers/usb/dwc3/gadget.h	/^#define to_dwc3_request(/;"	d
to_ep93xx_spi	drivers/spi/ep93xx_spi.c	/^static inline struct ep93xx_spi_slave *to_ep93xx_spi(struct spi_slave *slave)$/;"	f	typeref:struct:ep93xx_spi_slave *	file:
to_fsl_spi_slave	drivers/spi/fsl_espi.c	/^#define to_fsl_spi_slave(/;"	d	file:
to_host	arch/powerpc/include/asm/fsl_pamu.h	/^		} to_host;$/;"	m	union:paace::__anon6139da31010a	typeref:struct:paace::__anon6139da31010a::__anon6139da310208
to_i2c_addr	drivers/i2c/fti2c010.c	/^static void to_i2c_addr(u8 *buf, uint32_t addr, int alen)$/;"	f	typeref:typename:void	file:
to_io	arch/powerpc/include/asm/fsl_pamu.h	/^		} to_io;$/;"	m	union:paace::__anon6139da31010a	typeref:struct:paace::__anon6139da31010a::__anon6139da310308
to_lpc32xx_eth	drivers/net/lpc32xx_eth.c	/^#define to_lpc32xx_eth(/;"	d	file:
to_lpc32xx_spi_slave	drivers/spi/lpc32xx_ssp.c	/^static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave($/;"	f	typeref:struct:lpc32xx_spi_slave *	file:
to_macb	drivers/net/macb.c	/^#define to_macb(/;"	d	file:
to_musb_ep	drivers/usb/musb-new/musb_gadget.h	/^static inline struct musb_ep *to_musb_ep(struct usb_ep *ep)$/;"	f	typeref:struct:musb_ep *
to_musb_request	drivers/usb/musb-new/musb_gadget.h	/^static inline struct musb_request *to_musb_request(struct usb_request *req)$/;"	f	typeref:struct:musb_request *
to_mvgbe	drivers/net/mvgbe.h	/^#define to_mvgbe(/;"	d
to_mxc_spi_slave	drivers/spi/mxc_spi.c	/^static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)$/;"	f	typeref:struct:mxc_spi_slave *	file:
to_mxs_slave	drivers/spi/mxs_spi.c	/^static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)$/;"	f	typeref:struct:mxs_spi_slave *	file:
to_omap3_spi	drivers/spi/omap3_spi.c	/^static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave)$/;"	f	typeref:struct:omap3_spi_priv *	file:
to_pcie	drivers/pci/pci_mvebu.c	/^#define to_pcie(/;"	d	file:
to_peri_clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline struct peri_clock *to_peri_clk(struct clk *clock)$/;"	f	typeref:struct:peri_clock *
to_peri_clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline struct peri_clock *to_peri_clk(struct clk *clock)$/;"	f	typeref:struct:peri_clock *
to_pic32_musb_data	drivers/usb/musb-new/pic32.c	/^#define to_pic32_musb_data(/;"	d	file:
to_qspi_spi	drivers/spi/fsl_qspi.c	/^static inline struct fsl_qspi *to_qspi_spi(struct spi_slave *slave)$/;"	f	typeref:struct:fsl_qspi *	file:
to_ref_clk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline struct ref_clock *to_ref_clk(struct clk *clock)$/;"	f	typeref:struct:ref_clock *
to_ref_clk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline struct ref_clock *to_ref_clk(struct clk *clock)$/;"	f	typeref:struct:ref_clock *
to_refclk	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline struct refclk *to_refclk(struct clk *clock)$/;"	f	typeref:struct:refclk *
to_refclk	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline struct refclk *to_refclk(struct clk *clock)$/;"	f	typeref:struct:refclk *
to_runtime_mode	drivers/usb/gadget/f_dfu.c	/^static inline void to_runtime_mode(struct f_dfu *f_dfu)$/;"	f	typeref:typename:void	file:
to_sh_qspi	drivers/spi/sh_qspi.c	/^static inline struct sh_qspi_slave *to_sh_qspi(struct spi_slave *slave)$/;"	f	typeref:struct:sh_qspi_slave *	file:
to_sh_spi	drivers/spi/sh_spi.h	/^static inline struct sh_spi *to_sh_spi(struct spi_slave *slave)$/;"	f	typeref:struct:sh_spi *
to_soft_spi	drivers/spi/soft_spi_legacy.c	/^static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave)$/;"	f	typeref:struct:soft_spi_slave *	file:
to_sunxi_nand	drivers/mtd/nand/sunxi_nand.c	/^static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)$/;"	f	typeref:struct:sunxi_nand_chip *	file:
to_sunxi_nfc	drivers/mtd/nand/sunxi_nand.c	/^static inline struct sunxi_nfc *to_sunxi_nfc(struct nand_hw_control *ctrl)$/;"	f	typeref:struct:sunxi_nfc *	file:
to_ti_qspi_priv	drivers/spi/ti_qspi.c	/^static inline struct ti_qspi_priv *to_ti_qspi_priv(struct spi_slave *slave)$/;"	f	typeref:struct:ti_qspi_priv *	file:
to_udc	drivers/usb/gadget/at91_udc.h	/^static inline struct at91_udc *to_udc(struct usb_gadget *g)$/;"	f	typeref:struct:at91_udc *
to_usba_ep	drivers/usb/gadget/atmel_usba_udc.h	/^static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)$/;"	f	typeref:struct:usba_ep *
to_usba_req	drivers/usb/gadget/atmel_usba_udc.h	/^static inline struct usba_request *to_usba_req(struct usb_request *req)$/;"	f	typeref:struct:usba_request *
to_usba_udc	drivers/usb/gadget/atmel_usba_udc.h	/^static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)$/;"	f	typeref:struct:usba_udc *
toascii	include/linux/ctype.h	/^#define toascii(/;"	d
tobe	drivers/mtd/ubi/crc32.c	/^#define tobe(/;"	d	file:
toc_offset	tools/omapimage.c	/^static int toc_offset(void *hdr, void *member)$/;"	f	typeref:typename:int	file:
tochar	cmd/load.c	/^#define tochar(/;"	d	file:
tocr	include/sh_tmu.h	/^	u8	tocr;$/;"	m	struct:tmu_regs	typeref:typename:u8
todo	drivers/usb/gadget/ether.c	/^	unsigned long		todo;$/;"	m	struct:eth_dev	typeref:typename:unsigned long	file:
todr	arch/powerpc/include/asm/immap_85xx.h	/^	u16	todr;$/;"	m	struct:ccsr_cpm_scc	typeref:typename:u16
tof_shift	arch/arm/mach-uniphier/dram/umc-ld11.c	/^const int tof_shift[RANK_BLOCKS_TR][2] = { {-50, -50}, {-50, -50} };$/;"	v	typeref:typename:const int[][2]
toff	arch/m68k/include/asm/coldfire/ata.h	/^	u8 toff;		\/* 0x00 *\/$/;"	m	struct:atac	typeref:typename:u8
togcnt100n	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 togcnt100n;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
togcnt100n	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 togcnt100n;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
togcnt100n	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 togcnt100n;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
togcnt100n	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 togcnt100n;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
togcnt100n	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 togcnt100n;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
togcnt100n	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 togcnt100n;		\/* 0xcc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
togcnt1u	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 togcnt1u;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
togcnt1u	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 togcnt1u;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
togcnt1u	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 togcnt1u;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
togcnt1u	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 togcnt1u;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
togcnt1u	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 togcnt1u;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
togcnt1u	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 togcnt1u;		\/* 0xc0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
toggle	arch/blackfin/include/asm/gpio.h	/^	unsigned short toggle;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned short
toggle	arch/blackfin/include/asm/mach-bf609/gpio.h	/^	unsigned long toggle;$/;"	m	struct:gpio_port_t	typeref:typename:unsigned long
toggle	cmd/led.c	/^	void		(*toggle)(void);\/* Optional function for toggling LED *\/$/;"	m	struct:led_tbl_s	typeref:typename:void (*)(void)	file:
toggle	include/usb.h	/^	unsigned int toggle[2];$/;"	m	struct:usb_device	typeref:typename:unsigned int[2]
toggle_ddr_features	include/linux/mtd/nand.h	/^	u8 toggle_ddr_features;$/;"	m	struct:nand_jedec_params	typeref:typename:u8
toggle_ddr_speed_grade	include/linux/mtd/nand.h	/^	__le16 toggle_ddr_speed_grade;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
toggle_eeprom_spi_bus	board/keymile/km_arm/fpga_config.c	/^int toggle_eeprom_spi_bus(void)$/;"	f	typeref:typename:int
toggle_fpga_eeprom_bus	board/keymile/kmp204x/pci.c	/^static void toggle_fpga_eeprom_bus(bool cpu_own)$/;"	f	typeref:typename:void	file:
toggle_sym_value	scripts/kconfig/gconf.c	/^static void toggle_sym_value(struct menu *menu)$/;"	f	typeref:typename:void	file:
tohex	tools/gdb/remote.c	/^tohex (int nib)$/;"	f	typeref:typename:int	file:
token	board/gdsys/common/phy.c	/^	u8 token;$/;"	m	struct:mii_setupcmd	typeref:typename:u8	file:
token	cmd/pxe.c	/^struct token {$/;"	s	file:
token	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		uint32_t token;$/;"	m	struct:qbman_swp::__anonadc6216b0208	typeref:typename:uint32_t
token	scripts/kconfig/lkc.h	/^	int token;$/;"	m	struct:kconf_id	typeref:typename:int
token_type	cmd/pxe.c	/^enum token_type {$/;"	g	file:
tokens	fs/ubifs/super.c	/^static const match_table_t tokens = {$/;"	v	typeref:typename:const match_table_t	file:
tole	drivers/mtd/ubi/crc32.c	/^#define tole(/;"	d	file:
tole	lib/crc32.c	/^#define tole(/;"	d	file:
toload	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			toload[UBI_FM_BM_SIZE];$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long[]
tolower	include/linux/ctype.h	/^#define tolower(/;"	d
ton	arch/m68k/include/asm/coldfire/ata.h	/^	u8 ton;			\/* 0x01 *\/$/;"	m	struct:atac	typeref:typename:u8
toolBar	scripts/kconfig/qconf.h	/^	Q3ToolBar *toolBar;$/;"	m	class:ConfigMainWindow	typeref:typename:Q3ToolBar *
toolbar1	scripts/kconfig/gconf.glade	/^	    <widget class="GtkToolbar" id="toolbar1">$/;"	i
toolitem1	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolItem" id="toolitem1">$/;"	i
toolitem2	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolItem" id="toolitem2">$/;"	i
toolitem3	scripts/kconfig/gconf.glade	/^		<widget class="GtkToolItem" id="toolitem3">$/;"	i
tools	Makefile	/^tools: prepare$/;"	t
tools-all	Makefile	/^tools-all: env tools ;$/;"	t
tools-all	Makefile	/^tools-all: export HOST_TOOLS_ALL=y$/;"	t
tools-only	Makefile	/^tools-only: scripts_basic $(version_h) $(timestamp_h)$/;"	t
tools/_libfdt.so	tools/Makefile	/^tools\/_libfdt.so: $(patsubst %.o,%.c,$(LIBFDT_OBJS)) tools\/libfdt_wrap.c$/;"	t
tools/libfdt_wrap.c	tools/Makefile	/^tools\/libfdt_wrap.c: $(srctree)\/lib\/libfdt\/libfdt.swig$/;"	t
top	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 top;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443308	typeref:typename:u32
top	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 top;$/;"	m	struct:bcm2835_mbox_tag_overscan::__anon775fc544320a::__anon775fc5443408	typeref:typename:u32
top	common/dlmalloc.c	/^#define top /;"	d	file:
top	drivers/net/fm/fm.h	/^	void *top;$/;"	m	struct:fm_muram	typeref:typename:void *
top	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_tnode *top;$/;"	m	struct:yaffs_file_var	typeref:struct:yaffs_tnode *
top	include/circbuf.h	/^	char *top;		\/* pointer to current buffer start *\/$/;"	m	struct:circbuf	typeref:typename:char *
top0	drivers/clk/exynos/clk-exynos7420.c	/^	struct exynos7420_clk_cmu_top0 *top0;$/;"	m	struct:exynos7420_clk_top0_priv	typeref:struct:exynos7420_clk_cmu_top0 *	file:
top_asb_isolation_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_isolation_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_isolation_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_isolation_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_isolation_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_isolation_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_isolation_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_isolation_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_isolation_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_reset_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_reset_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_reset_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_reset_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_reset_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_reset_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_asb_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_asb_reset_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_asb_reset_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_bus_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
top_bus_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_bus_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_bus_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_haddr	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 top_haddr;			\/* 80 *\/$/;"	m	struct:de_ui	typeref:typename:u32
top_haddr	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 top_haddr[3];		\/* d0 *\/$/;"	m	struct:de_vi	typeref:typename:u32[3]
top_haddr	arch/arm/include/asm/arch/display2.h	/^	u32 top_haddr;			\/* 80 *\/$/;"	m	struct:de_ui	typeref:typename:u32
top_haddr	arch/arm/include/asm/arch/display2.h	/^	u32 top_haddr[3];		\/* d0 *\/$/;"	m	struct:de_vi	typeref:typename:u32[3]
top_interrupt	include/gdsys_fpga.h	/^	u16 top_interrupt;	\/* 0x000a *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
top_laddr	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 top_laddr;$/;"	m	struct:de_ui::__anon5efd7b530308	typeref:typename:u32
top_laddr	arch/arm/include/asm/arch-sunxi/display2.h	/^		u32 top_laddr[3];$/;"	m	struct:de_vi::__anon5efd7b530208	typeref:typename:u32[3]
top_laddr	arch/arm/include/asm/arch/display2.h	/^		u32 top_laddr;$/;"	m	struct:de_ui::__anon279c75ef0308	typeref:typename:u32
top_laddr	arch/arm/include/asm/arch/display2.h	/^		u32 top_laddr[3];$/;"	m	struct:de_vi::__anon279c75ef0208	typeref:typename:u32[3]
top_level	fs/yaffs2/yaffs_guts.h	/^	int top_level;$/;"	m	struct:yaffs_file_var	typeref:typename:int
top_of_kernel_tree	scripts/checkpatch.pl	/^sub top_of_kernel_tree {$/;"	s
top_of_kernel_tree	scripts/get_maintainer.pl	/^sub top_of_kernel_tree {$/;"	s
top_pad	common/dlmalloc.c	/^static unsigned long top_pad          = DEFAULT_TOP_PAD;$/;"	v	typeref:typename:unsigned long	file:
top_pwr_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_pwr_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
top_pwr_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_pwr_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_pwr_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_read_pin	board/micronas/vct/top.c	/^static TOP_PINMUX_t top_read_pin(int pin)$/;"	f	typeref:typename:TOP_PINMUX_t	file:
top_retention_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_coreblk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_coreblk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_coreblk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_coreblk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_coreblk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_coreblk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_coreblk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_coreblk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_dmc_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_dmc_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_dmc_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_dmc_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_dmc_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_dmc_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_dmc_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_dmc_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_retention_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
top_retention_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
top_retention_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	top_retention_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
top_set_pin	board/micronas/vct/top.c	/^int top_set_pin(int pin, int func)$/;"	f	typeref:typename:int
top_vars	common/cli_hush.c	/^static struct variables *top_vars = NULL ;$/;"	v	typeref:struct:variables *	file:
top_vars	common/cli_hush.c	/^struct variables *top_vars = &shell_ver;$/;"	v	typeref:struct:variables *
top_write_pin	board/micronas/vct/top.c	/^static void top_write_pin(int pin, TOP_PINMUX_t reg)$/;"	f	typeref:typename:void	file:
topc	drivers/clk/exynos/clk-exynos7420.c	/^	struct exynos7420_clk_cmu_topc *topc;$/;"	m	struct:exynos7420_clk_topc_priv	typeref:struct:exynos7420_clk_cmu_topc *	file:
toplevel	scripts/mailmapper	/^toplevel = toplevel.rstrip()$/;"	v
topology_update_info	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^struct topology_update_info {$/;"	s
toreset	arch/powerpc/cpu/mpc85xx/release.S	/^#define toreset(/;"	d	file:
torh	drivers/net/e1000.h	/^	uint64_t torh;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
torl	drivers/net/e1000.h	/^	uint64_t torl;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
torture	drivers/mtd/ubi/ubi.h	/^	int torture;$/;"	m	struct:ubi_work	typeref:typename:int
torture_peb	drivers/mtd/ubi/io.c	/^static int torture_peb(struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int	file:
tos	include/linux/ethtool.h	/^	__u8    tos;$/;"	m	struct:ethtool_ah_espip4_spec	typeref:typename:__u8
tos	include/linux/ethtool.h	/^	__u8    tos;$/;"	m	struct:ethtool_tcpip4_spec	typeref:typename:__u8
tos	include/linux/ethtool.h	/^	__u8    tos;$/;"	m	struct:ethtool_usrip4_spec	typeref:typename:__u8
tostring	arch/powerpc/include/asm/processor.h	/^#define tostring(/;"	d
tot_avail_orphs	fs/ubifs/orphan.c	/^static int tot_avail_orphs(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
tot_inos	fs/ubifs/orphan.c	/^	unsigned long tot_inos;$/;"	m	struct:check_info	typeref:typename:unsigned long	file:
tot_orphans	fs/ubifs/ubifs.h	/^	int tot_orphans;$/;"	m	struct:ubifs_info	typeref:typename:int
tot_tail_drop_lvl	include/vsc9953.h	/^	u32	tot_tail_drop_lvl;$/;"	m	struct:vsc9953_sys_pause_cfg	typeref:typename:u32
totactr	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	totactr;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
total	include/linux/mtd/nand.h	/^	int total;$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int
total	include/u-boot/sha1.h	/^    unsigned long total[2];	\/*!< number of bytes processed	*\/$/;"	m	struct:__anoncf962b200108	typeref:typename:unsigned long[2]
total	include/u-boot/sha256.h	/^	uint32_t total[2];$/;"	m	struct:__anon0de293ec0108	typeref:typename:uint32_t[2]
total	lib/zlib/inflate.h	/^    unsigned long total;        \/* protected copy of output count *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned long
total_32bit_memory	arch/x86/include/asm/global_data.h	/^	uint64_t total_32bit_memory;$/;"	m	struct:memory_info	typeref:typename:uint64_t
total_CAN	common/xyzModem.c	/^  int total_SOH, total_STX, total_CAN;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:int	file:
total_SOH	common/xyzModem.c	/^  int total_SOH, total_STX, total_CAN;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:int	file:
total_STX	common/xyzModem.c	/^  int total_SOH, total_STX, total_CAN;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:int	file:
total_add	include/dm/test.h	/^	int total_add;$/;"	m	struct:dm_test_uclass_priv	typeref:typename:int
total_blks	include/sparse_format.h	/^  __le32	total_blks;	\/* total blocks in the non-sparse output image *\/$/;"	m	struct:sparse_header	typeref:typename:__le32
total_blocks	include/ext_common.h	/^	__le32 total_blocks;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
total_blocks_high	include/ext_common.h	/^	__le32 total_blocks_high;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
total_bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 total_bwcr;		\/* 0xb4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
total_bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 total_bwcr;		\/* 0xb4 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
total_bytes_per_chunk	fs/yaffs2/yaffs_guts.h	/^	u32 total_bytes_per_chunk;	\/* Should be >= 512, does not need to$/;"	m	struct:yaffs_param	typeref:typename:u32
total_chunks	include/sparse_format.h	/^  __le32	total_chunks;	\/* total chunks in the sparse input image *\/$/;"	m	struct:sparse_header	typeref:typename:__le32
total_count	board/armltd/integrator/timer.c	/^static unsigned long long total_count = 0;$/;"	v	typeref:typename:unsigned long long	file:
total_dark	fs/ubifs/ubifs-media.h	/^	__le64 total_dark;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
total_dark	fs/ubifs/ubifs.h	/^	long long total_dark;$/;"	m	struct:ubifs_lp_stats	typeref:typename:long long
total_dead	fs/ubifs/ubifs-media.h	/^	__le64 total_dead;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
total_dead	fs/ubifs/ubifs.h	/^	long long total_dead;$/;"	m	struct:ubifs_lp_stats	typeref:typename:long long
total_dirty	fs/ubifs/ubifs-media.h	/^	__le64 total_dirty;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
total_dirty	fs/ubifs/ubifs.h	/^	long long total_dirty;$/;"	m	struct:ubifs_lp_stats	typeref:typename:long long
total_free	fs/ubifs/ubifs-media.h	/^	__le64 total_free;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
total_free	fs/ubifs/ubifs.h	/^	long long total_free;$/;"	m	struct:ubifs_lp_stats	typeref:typename:long long
total_in	include/u-boot/zlib.h	/^	uLong	total_in; \/* total nb of input bytes read so far *\/$/;"	m	struct:z_stream_s	typeref:typename:uLong
total_in_hi32	include/bzlib.h	/^      unsigned int total_in_hi32;$/;"	m	struct:__anond8626de10108	typeref:typename:unsigned int
total_in_lo32	include/bzlib.h	/^      unsigned int total_in_lo32;$/;"	m	struct:__anond8626de10108	typeref:typename:unsigned int
total_inodes	include/ext_common.h	/^	__le32 total_inodes;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
total_internal_die	tools/mxsboot.c	/^	uint32_t		total_internal_die;		\/* Ignored *\/$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
total_line_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_line_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_line_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_line_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_line_sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_line_sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_line_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_line_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_ln_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_ln_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_ln_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_ln_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_ln_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_ln_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_ln_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_ln_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_mem	include/common_timing_params.h	/^	unsigned long long total_mem;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned long long
total_memory	arch/x86/include/asm/global_data.h	/^	uint64_t total_memory;$/;"	m	struct:memory_info	typeref:typename:uint64_t
total_memory	include/vbe.h	/^	u16 total_memory;$/;"	m	struct:vbe_info	typeref:typename:u16
total_nand_size	drivers/mtd/nand/nand.c	/^static unsigned long total_nand_size; \/* in kiB *\/$/;"	v	typeref:typename:unsigned long	file:
total_out	include/u-boot/zlib.h	/^	uLong	total_out; \/* total nb of bytes output so far *\/$/;"	m	struct:z_stream_s	typeref:typename:uLong
total_out_hi32	include/bzlib.h	/^      unsigned int total_out_hi32;$/;"	m	struct:__anond8626de10108	typeref:typename:unsigned int
total_out_lo32	include/bzlib.h	/^      unsigned int total_out_lo32;$/;"	m	struct:__anond8626de10108	typeref:typename:unsigned int
total_page_size	tools/mxsboot.c	/^	uint32_t		total_page_size;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
total_pfw_image_length	tools/zynqmpimage.c	/^	uint32_t total_pfw_image_length; \/* 0x38 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
total_pix_cfg_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_pix_cfg_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_pix_cfg_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_pix_cfg_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_pix_sta_h	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_pix_sta_h;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_pix_sta_l	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	total_pix_sta_l;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
total_pixel_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_pixel_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_pixel_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_pixel_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_pixel_sta_h	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_pixel_sta_h;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_pixel_sta_l	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	total_pixel_sta_l;$/;"	m	struct:rk3288_edp	typeref:typename:u32
total_retries	common/xyzModem.c	/^  int len, mode, total_retries;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:int	file:
total_sect	include/ext4fs.h	/^	uint64_t total_sect;$/;"	m	struct:ext_filesystem	typeref:typename:uint64_t
total_sect	include/fat.h	/^	__u32	total_sect;	\/* Number of sectors (if sectors == 0) *\/$/;"	m	struct:boot_sector	typeref:typename:__u32
total_sector	fs/fat/fat_write.c	/^static int total_sector;$/;"	v	typeref:typename:int	file:
total_size	include/efi.h	/^	u32 total_size;$/;"	m	struct:efi_info_hdr	typeref:typename:u32
total_sz	include/sparse_format.h	/^  __le32	total_sz;	\/* in bytes of chunk input file including chunk header and data *\/$/;"	m	struct:chunk_header	typeref:typename:__le32
total_used	fs/ubifs/ubifs-media.h	/^	__le64 total_used;$/;"	m	struct:ubifs_mst_node	typeref:typename:__le64
total_used	fs/ubifs/ubifs.h	/^	long long total_used;$/;"	m	struct:ubifs_lp_stats	typeref:typename:long long
total_used_banks	drivers/mtd/nand/denali.h	/^	int total_used_banks;$/;"	m	struct:denali_nand_info	typeref:typename:int
totalblks	drivers/mtd/nand/denali.h	/^	uint32_t totalblks;$/;"	m	struct:denali_nand_info	typeref:typename:uint32_t
totalsize	include/circbuf.h	/^	unsigned int totalsize; \/* number of bytes allocated *\/$/;"	m	struct:circbuf	typeref:typename:unsigned int
totalsize	include/fdt.h	/^	fdt32_t totalsize;		 \/* total size of DT block *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
totar	arch/arm/include/asm/ti-common/davinci_nand.h	/^	uint32_t	totar;$/;"	m	struct:davinci_emif_regs	typeref:typename:uint32_t
toth	drivers/net/e1000.h	/^	uint64_t toth;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
totl	drivers/net/e1000.h	/^	uint64_t totl;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
totlen	fs/jffs2/summary.h	/^	__u32 totlen;	\/* node length *\/$/;"	m	struct:jffs2_sum_xattr_flash	typeref:typename:__u32
totlen	fs/jffs2/summary.h	/^	__u32 totlen;	\/* record length *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:__u32
totlen	fs/jffs2/summary.h	/^	__u32 totlen;	\/* record length *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:__u32
totlen	fs/jffs2/summary.h	/^	__u32 totlen; 	\/* record length *\/$/;"	m	struct:jffs2_sum_inode_flash	typeref:typename:__u32
totlen	fs/jffs2/summary.h	/^	__u32 totlen; 	\/* record length *\/$/;"	m	struct:jffs2_sum_inode_mem	typeref:typename:__u32
totlen	fs/jffs2/summary.h	/^	__u32 totlen;$/;"	m	struct:jffs2_sum_xattr_mem	typeref:typename:__u32
totlen	include/jffs2/jffs2.h	/^	__u32 totlen;     \/* Total length of this node (inc data, etc.) *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
totlen	include/jffs2/jffs2.h	/^	__u32 totlen; \/* So we can skip over nodes we don't grok *\/$/;"	m	struct:jffs2_unknown_node	typeref:typename:__u32
totlen	include/jffs2/jffs2.h	/^	__u32 totlen;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
totlen	include/jffs2/jffs2.h	/^	__u32 totlen;$/;"	m	struct:jffs2_raw_summary	typeref:typename:__u32
totlen	include/linux/mtd/doc2000.h	/^	unsigned long totlen;$/;"	m	struct:DiskOnChip	typeref:typename:unsigned long
totphys	arch/sparc/cpu/leon2/prom.c	/^	struct linux_mlist_v0 totphys;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0	file:
totphys	arch/sparc/cpu/leon3/prom.c	/^	struct linux_mlist_v0 totphys;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0	file:
totphys_p	arch/sparc/cpu/leon2/prom.c	/^	struct linux_mlist_v0 *totphys_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0 *	file:
totphys_p	arch/sparc/cpu/leon3/prom.c	/^	struct linux_mlist_v0 *totphys_p;$/;"	m	struct:leon_prom_info	typeref:struct:linux_mlist_v0 *	file:
touchscreen_pins	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	touchscreen_pins: touchscreen_pins@0 {$/;"	l
touchscreen_pins	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	touchscreen_pins: touchscreen_pins@0 {$/;"	l
touchscreen_wake_pin	arch/arm/dts/sun4i-a10-inet1.dts	/^	touchscreen_wake_pin: touchscreen_wake_pin@0 {$/;"	l
toupper	include/linux/ctype.h	/^#define toupper(/;"	d
tout	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 tout;$/;"	m	struct:emi_regs	typeref:typename:u32
toutset	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	toutset;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
tovr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tovr;		\/* TX Oversize Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tovr	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tovr;		\/* 0x24724 - Transmit Oversize Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tovr	include/fsl_dtsec.h	/^	u32	tovr;		\/* Transmit oversize frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tovr	include/tsec.h	/^	u32	tovr;		\/* Transmit Oversize Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tp1	include/faraday/ftsdmc021.h	/^	unsigned int	tp1;		\/* 0x00 - SDRAM Timing Parameter 1 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
tp2	include/faraday/ftsdmc021.h	/^	unsigned int	tp2;		\/* 0x04 - SDRAM Timing Parameter 2 *\/$/;"	m	struct:ftsdmc021	typeref:typename:unsigned int
tp_cluster	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} tp_cluster[16];$/;"	m	struct:ccsr_gur	typeref:struct:ccsr_gur::__anon245f04be0108[16]
tp_cluster	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	} tp_cluster[3];	\/* Core Cluster n Topology Register *\/$/;"	m	struct:ccsr_gur	typeref:struct:ccsr_gur::__anon245f08ff0108[3]
tp_cluster	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	} tp_cluster[1];        \/* Core Cluster n Topology Register *\/$/;"	m	struct:ccsr_gur	typeref:struct:ccsr_gur::__anon58ea331d0108[1]
tp_cluster	arch/powerpc/include/asm/immap_85xx.h	/^	} tp_cluster[16];	\/* Core Cluster n Topology Register *\/$/;"	m	struct:ccsr_gur	typeref:struct:ccsr_gur::__anondcd7518a0308[16]
tp_ityp	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32     tp_ityp[64];    \/* Topology Initiator Type Register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[64]
tp_ityp	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^	u32	tp_ityp[64];	\/* Topology Initiator Type Register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[64]
tp_ityp	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32     tp_ityp[64];    \/* Topology Initiator Type Register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[64]
tp_ityp	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tp_ityp[64];	\/* Topology Initiator Type Register *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32[64]
tpafcr	drivers/net/ftgmac100.h	/^	unsigned int	tpafcr;		\/* 0x48 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
tpal	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	tpal;$/;"	m	struct:s3c24x0_lcd	typeref:typename:u32
tpc	drivers/net/rtl8169.c	/^static struct rtl8169_private *tpc;$/;"	v	typeref:struct:rtl8169_private *	file:
tpccclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int tpccclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
tpccclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tpccclkctrl;	\/* offset 0x78 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
tpccclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tpccclkctrl;	\/* offset 0xBC *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
tpd12s015	arch/arm/dts/am57xx-beagle-x15.dts	/^	tpd12s015: encoder {$/;"	l
tpd12s015	arch/arm/dts/dra72-evm-common.dtsi	/^	tpd12s015: encoder {$/;"	l
tpd12s015_in	arch/arm/dts/am57xx-beagle-x15.dts	/^				tpd12s015_in: endpoint {$/;"	l	label:tpd12s015
tpd12s015_in	arch/arm/dts/dra72-evm-common.dtsi	/^				tpd12s015_in: endpoint {$/;"	l	label:tpd12s015
tpd12s015_out	arch/arm/dts/am57xx-beagle-x15.dts	/^				tpd12s015_out: endpoint {$/;"	l
tpd12s015_out	arch/arm/dts/dra72-evm-common.dtsi	/^				tpd12s015_out: endpoint {$/;"	l
tpd12s015_pins	arch/arm/dts/am57xx-beagle-x15.dts	/^	tpd12s015_pins: pinmux_tpd12s015_pins {$/;"	l
tpdex	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tpdex;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tpf	drivers/net/xilinx_ll_temac.h	/^	u32 tpf;	\/* Transmit Pause Frame *\/$/;"	m	struct:temac_reg	typeref:typename:u32
tph10clrr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tph10clrr0;	\/* Thread PH10 Clear Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tph10psr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tph10psr0;	\/* Thread PH10 Previous Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tph10setr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tph10setr0;	\/* Thread PH10 Set Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tph10sr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tph10sr0;	\/* Thread PH10 Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tpic2810	arch/arm/dts/am335x-icev2.dts	/^	tpic2810: gpio@60 {$/;"	l
tpid0	drivers/net/xilinx_ll_temac.h	/^	u32 tpid0;	\/* VLAN TPID Word 0 *\/$/;"	m	struct:temac_reg	typeref:typename:u32
tpid1	drivers/net/xilinx_ll_temac.h	/^	u32 tpid1;	\/* VLAN TPID Word 1 *\/$/;"	m	struct:temac_reg	typeref:typename:u32
tpkt	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tpkt;		\/* TX Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tpkt	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tpkt;		\/* 0x246e4 - Transmit Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tpkt	include/fsl_dtsec.h	/^	u32	tpkt;		\/* Transmit packet *\/$/;"	m	struct:dtsec	typeref:typename:u32
tpkt	include/tsec.h	/^	u32	tpkt;		\/* Transmit Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tpl/u-boot-tpl.bin	Makefile	/^tpl\/u-boot-tpl.bin: tools prepare$/;"	t
tpl/u-boot-with-tpl.bin	Makefile	/^tpl\/u-boot-with-tpl.bin: tpl\/u-boot-tpl.bin u-boot.bin FORCE$/;"	t
tpm	arch/arm/dts/rk3288-veyron.dtsi	/^	tpm: tpm@20 {$/;"	l
tpm_atmel_twi_close	drivers/tpm/tpm_atmel_twi.c	/^static int tpm_atmel_twi_close(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_atmel_twi_get_desc	drivers/tpm/tpm_atmel_twi.c	/^static int tpm_atmel_twi_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
tpm_atmel_twi_ids	drivers/tpm/tpm_atmel_twi.c	/^static const struct udevice_id tpm_atmel_twi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tpm_atmel_twi_open	drivers/tpm/tpm_atmel_twi.c	/^static int tpm_atmel_twi_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_atmel_twi_ops	drivers/tpm/tpm_atmel_twi.c	/^static const struct tpm_ops tpm_atmel_twi_ops = {$/;"	v	typeref:typename:const struct tpm_ops	file:
tpm_atmel_twi_probe	drivers/tpm/tpm_atmel_twi.c	/^static int tpm_atmel_twi_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_atmel_twi_xfer	drivers/tpm/tpm_atmel_twi.c	/^static int tpm_atmel_twi_xfer(struct udevice *dev,$/;"	f	typeref:typename:int	file:
tpm_chip	drivers/tpm/tpm_tis.h	/^struct tpm_chip {$/;"	s
tpm_chip_priv	include/tpm.h	/^struct tpm_chip_priv {$/;"	s
tpm_close	drivers/tpm/tpm-uclass.c	/^int tpm_close(struct udevice *dev)$/;"	f	typeref:typename:int
tpm_cmd_header	drivers/tpm/tpm_tis.h	/^union tpm_cmd_header {$/;"	u
tpm_cmd_params	drivers/tpm/tpm_tis.h	/^union tpm_cmd_params {$/;"	u
tpm_cmd_t	drivers/tpm/tpm_tis.h	/^struct tpm_cmd_t {$/;"	s
tpm_command_size	lib/tpm.c	/^static uint32_t tpm_command_size(const void *command)$/;"	f	typeref:typename:uint32_t	file:
tpm_continue_self_test	lib/tpm.c	/^uint32_t tpm_continue_self_test(void)$/;"	f	typeref:typename:uint32_t
tpm_duration	include/tpm.h	/^enum tpm_duration {$/;"	g
tpm_end_oiap	lib/tpm.c	/^uint32_t tpm_end_oiap(void)$/;"	f	typeref:typename:uint32_t
tpm_established	include/tpm.h	/^	u8	tpm_established;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
tpm_extend	lib/tpm.c	/^uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest)$/;"	f	typeref:typename:uint32_t
tpm_force_clear	lib/tpm.c	/^uint32_t tpm_force_clear(void)$/;"	f	typeref:typename:uint32_t
tpm_get_capability	lib/tpm.c	/^uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap,$/;"	f	typeref:typename:uint32_t
tpm_get_desc	drivers/tpm/tpm-uclass.c	/^int tpm_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int
tpm_get_flags	cmd/tpm_test.c	/^static uint32_t tpm_get_flags(uint8_t *disable, uint8_t *deactivated,$/;"	f	typeref:typename:uint32_t	file:
tpm_get_ops	include/tpm.h	/^#define tpm_get_ops(/;"	d
tpm_get_permanent_flags	lib/tpm.c	/^uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags)$/;"	f	typeref:typename:uint32_t
tpm_get_permissions	lib/tpm.c	/^uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm)$/;"	f	typeref:typename:uint32_t
tpm_get_pub_key_oiap	lib/tpm.c	/^uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth,$/;"	f	typeref:typename:uint32_t
tpm_getcap_params_in	drivers/tpm/tpm_tis.h	/^struct tpm_getcap_params_in {$/;"	s
tpm_getcap_params_out	drivers/tpm/tpm_tis.h	/^struct tpm_getcap_params_out {$/;"	s
tpm_init	lib/tpm.c	/^int tpm_init(void)$/;"	f	typeref:typename:int
tpm_input_header	drivers/tpm/tpm_tis.h	/^struct tpm_input_header {$/;"	s
tpm_int_h	arch/arm/dts/rk3288-veyron.dtsi	/^		tpm_int_h: tpm-int-h {$/;"	l
tpm_is_owned	cmd/tpm_test.c	/^static int tpm_is_owned(void)$/;"	f	typeref:typename:int	file:
tpm_load_key2_oiap	lib/tpm.c	/^uint32_t tpm_load_key2_oiap(uint32_t parent_handle,$/;"	f	typeref:typename:uint32_t
tpm_locality	drivers/tpm/tpm_tis_lpc.c	/^struct tpm_locality {$/;"	s	file:
tpm_long	drivers/tpm/tpm_tis.h	/^	__be32 tpm_long;$/;"	m	struct:duration_t	typeref:typename:__be32
tpm_medium	drivers/tpm/tpm_tis.h	/^	__be32 tpm_medium;$/;"	m	struct:duration_t	typeref:typename:__be32
tpm_nv_define_space	lib/tpm.c	/^uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size)$/;"	f	typeref:typename:uint32_t
tpm_nv_index	include/tpm.h	/^enum tpm_nv_index {$/;"	g
tpm_nv_read_value	lib/tpm.c	/^uint32_t tpm_nv_read_value(uint32_t index, void *data, uint32_t count)$/;"	f	typeref:typename:uint32_t
tpm_nv_set_locked	cmd/tpm_test.c	/^static uint32_t tpm_nv_set_locked(void)$/;"	f	typeref:typename:uint32_t	file:
tpm_nv_write_value	lib/tpm.c	/^uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length)$/;"	f	typeref:typename:uint32_t
tpm_nv_write_value_lock	cmd/tpm_test.c	/^static uint32_t tpm_nv_write_value_lock(uint32_t index)$/;"	f	typeref:typename:uint32_t	file:
tpm_oiap	lib/tpm.c	/^uint32_t tpm_oiap(uint32_t *auth_handle)$/;"	f	typeref:typename:uint32_t
tpm_open	drivers/tpm/tpm-uclass.c	/^int tpm_open(struct udevice *dev)$/;"	f	typeref:typename:int
tpm_ops	include/tpm.h	/^struct tpm_ops {$/;"	s
tpm_ordinal_duration	drivers/tpm/tpm_internal.h	/^static const u8 tpm_ordinal_duration[TPM_MAX_ORDINAL] = {$/;"	v	typeref:typename:const u8[]
tpm_output_header	drivers/tpm/tpm_tis.h	/^struct tpm_output_header {$/;"	s
tpm_pcr_read	lib/tpm.c	/^uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count)$/;"	f	typeref:typename:uint32_t
tpm_permanent_flags	include/tpm.h	/^struct tpm_permanent_flags {$/;"	s
tpm_physical_disable	lib/tpm.c	/^uint32_t tpm_physical_disable(void)$/;"	f	typeref:typename:uint32_t
tpm_physical_enable	lib/tpm.c	/^uint32_t tpm_physical_enable(void)$/;"	f	typeref:typename:uint32_t
tpm_physical_presence	include/tpm.h	/^enum tpm_physical_presence {$/;"	g
tpm_physical_set_deactivated	lib/tpm.c	/^uint32_t tpm_physical_set_deactivated(uint8_t state)$/;"	f	typeref:typename:uint32_t
tpm_post	include/tpm.h	/^	u8	tpm_post;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
tpm_post_lock	include/tpm.h	/^	u8	tpm_post_lock;$/;"	m	struct:tpm_permanent_flags	typeref:typename:u8
tpm_protected_ordinal_duration	drivers/tpm/tpm_internal.h	/^static const u8 tpm_protected_ordinal_duration[TPM_MAX_PROTECTED_ORDINAL] = {$/;"	v	typeref:typename:const u8[]
tpm_read_byte	drivers/tpm/tpm_tis_lpc.c	/^static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)$/;"	f	typeref:typename:u8	file:
tpm_read_pubek	lib/tpm.c	/^uint32_t tpm_read_pubek(void *data, size_t count)$/;"	f	typeref:typename:uint32_t
tpm_read_word	drivers/tpm/tpm_tis_lpc.c	/^static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)$/;"	f	typeref:typename:u32	file:
tpm_return_code	include/tpm.h	/^enum tpm_return_code {$/;"	g
tpm_return_code	lib/tpm.c	/^static uint32_t tpm_return_code(const void *response)$/;"	f	typeref:typename:uint32_t	file:
tpm_self_test_full	lib/tpm.c	/^uint32_t tpm_self_test_full(void)$/;"	f	typeref:typename:uint32_t
tpm_sendrecv_command	lib/tpm.c	/^static uint32_t tpm_sendrecv_command(const void *command,$/;"	f	typeref:typename:uint32_t	file:
tpm_set_global_lock	cmd/tpm_test.c	/^static uint32_t tpm_set_global_lock(void)$/;"	f	typeref:typename:uint32_t	file:
tpm_short	drivers/tpm/tpm_tis.h	/^	__be32 tpm_short;$/;"	m	struct:duration_t	typeref:typename:__be32
tpm_startup	lib/tpm.c	/^uint32_t tpm_startup(enum tpm_startup_type mode)$/;"	f	typeref:typename:uint32_t
tpm_startup_type	include/tpm.h	/^enum tpm_startup_type {$/;"	g
tpm_state	drivers/tpm/tpm_tis_sandbox.c	/^static struct tpm_state {$/;"	s	file:
tpm_status	drivers/tpm/tpm_tis_lpc.c	/^	u32 tpm_status;$/;"	m	struct:tpm_locality	typeref:typename:u32	file:
tpm_terminate_auth_session	lib/tpm.c	/^uint32_t tpm_terminate_auth_session(uint32_t auth_handle)$/;"	f	typeref:typename:uint32_t
tpm_timeout	drivers/tpm/tpm_tis.h	/^enum tpm_timeout {$/;"	g
tpm_tis_get_desc	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
tpm_tis_get_desc	drivers/tpm/tpm_tis_lpc.c	/^static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_calc_ordinal_duration	drivers/tpm/tpm-uclass.c	/^static ulong tpm_tis_i2c_calc_ordinal_duration(struct tpm_chip_priv *priv,$/;"	f	typeref:typename:ulong	file:
tpm_tis_i2c_check_locality	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_check_locality(struct udevice *dev, int loc)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_cleanup	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_cleanup(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_close	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_close(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_get_burstcount	drivers/tpm/tpm_tis_infineon.c	/^static ssize_t tpm_tis_i2c_get_burstcount(struct udevice *dev)$/;"	f	typeref:typename:ssize_t	file:
tpm_tis_i2c_ids	drivers/tpm/tpm_tis_infineon.c	/^static const struct udevice_id tpm_tis_i2c_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tpm_tis_i2c_init	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_open	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_ops	drivers/tpm/tpm_tis_infineon.c	/^static const struct tpm_ops tpm_tis_i2c_ops = {$/;"	v	typeref:typename:const struct tpm_ops	file:
tpm_tis_i2c_probe	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_read	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_ready	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_ready(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_recv	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_recv(struct udevice *dev, u8 *buf, size_t count)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_recv_data	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_recv_data(struct udevice *dev, u8 *buf, size_t count)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_release_locality	drivers/tpm/tpm_tis_infineon.c	/^static void tpm_tis_i2c_release_locality(struct udevice *dev, int loc,$/;"	f	typeref:typename:void	file:
tpm_tis_i2c_request_locality	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_request_locality(struct udevice *dev, int loc)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_send	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_send(struct udevice *dev, const u8 *buf, size_t len)$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_status	drivers/tpm/tpm_tis_infineon.c	/^static u8 tpm_tis_i2c_status(struct udevice *dev)$/;"	f	typeref:typename:u8	file:
tpm_tis_i2c_wait_for_stat	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_wait_for_stat(struct udevice *dev, u8 mask,$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_write	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_write_generic	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_write_generic(struct udevice *dev, u8 addr,$/;"	f	typeref:typename:int	file:
tpm_tis_i2c_write_long	drivers/tpm/tpm_tis_infineon.c	/^static int tpm_tis_i2c_write_long(struct udevice *dev, u8 addr, u8 *buffer,$/;"	f	typeref:typename:int	file:
tpm_tis_lpc_close	drivers/tpm/tpm_tis_lpc.c	/^static int tpm_tis_lpc_close(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_lpc_ids	drivers/tpm/tpm_tis_lpc.c	/^static const struct udevice_id tpm_tis_lpc_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tpm_tis_lpc_open	drivers/tpm/tpm_tis_lpc.c	/^static int tpm_tis_lpc_open(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tis_lpc_ops	drivers/tpm/tpm_tis_lpc.c	/^static const struct tpm_ops tpm_tis_lpc_ops = {$/;"	v	typeref:typename:const struct tpm_ops	file:
tpm_tis_lpc_priv	drivers/tpm/tpm_tis_lpc.c	/^struct tpm_tis_lpc_priv {$/;"	s	file:
tpm_tis_lpc_probe	drivers/tpm/tpm_tis_lpc.c	/^static int tpm_tis_lpc_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tpm_tsc_physical_presence	lib/tpm.c	/^uint32_t tpm_tsc_physical_presence(uint16_t presence)$/;"	f	typeref:typename:uint32_t
tpm_write_byte	drivers/tpm/tpm_tis_lpc.c	/^static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)$/;"	f	typeref:typename:void	file:
tpm_write_word	drivers/tpm/tpm_tis_lpc.c	/^static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,$/;"	f	typeref:typename:void	file:
tpm_xfer	drivers/tpm/tpm-uclass.c	/^int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t send_size,$/;"	f	typeref:typename:int
tpmcimr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tpmcimr0;	\/* Thread PM Crit Interrupt Mask Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tpmimr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tpmimr0;	\/* Thread PM Interrupt Mask Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tpmmcmr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tpmmcmr0;	\/* Thread PM Machine Check Interrupt Mask Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tpmnmimr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tpmnmimr0;	\/* Thread PM NMI Mask Reg *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
tpr	arch/arm/mach-at91/include/mach/at91_pdc.h	/^	u32	tpr;		\/* 0x108 Transmit Pointer Register *\/$/;"	m	struct:at91_pdc	typeref:typename:u32
tpr	drivers/net/e1000.h	/^	uint64_t tpr;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
tpr	include/faraday/ftsmc020.h	/^	unsigned int    tpr;$/;"	m	struct:ftsmc020_bank	typeref:typename:unsigned int
tpr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr0;		\/* 0x14 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
tpr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr0;$/;"	m	struct:dram_para	typeref:typename:u32
tpr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr0;$/;"	m	struct:dram_para	typeref:typename:u32
tpr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr0;		\/* 0x14 dram timing parameters register 0 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
tpr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr0;$/;"	m	struct:dram_para	typeref:typename:u32
tpr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr0;$/;"	m	struct:dram_para	typeref:typename:u32
tpr0	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tpr0;		\/* 0x0c: Timing Parameter 0 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
tpr0	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tpr0;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
tpr0	include/synopsys/dwcddr21mctl.h	/^	unsigned int	tpr0;		\/* SDRAM Timing Parameters 0 *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
tpr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr1;		\/* 0x18 dram timing parameters register 1 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
tpr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr1;$/;"	m	struct:dram_para	typeref:typename:u32
tpr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr1;$/;"	m	struct:dram_para	typeref:typename:u32
tpr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr1;		\/* 0x18 dram timing parameters register 1 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
tpr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr1;$/;"	m	struct:dram_para	typeref:typename:u32
tpr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr1;$/;"	m	struct:dram_para	typeref:typename:u32
tpr1	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tpr1;		\/* 0x10: Timing Parameter 1 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
tpr1	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tpr1;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
tpr1	include/synopsys/dwcddr21mctl.h	/^	unsigned int	tpr1;		\/* SDRAM Timing Parameters 1 *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
tpr10	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr10;$/;"	m	struct:dram_para	typeref:typename:u32
tpr10	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr10;$/;"	m	struct:dram_para	typeref:typename:u32
tpr11	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr11;$/;"	m	struct:dram_para	typeref:typename:u32
tpr11	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr11;$/;"	m	struct:dram_para	typeref:typename:u32
tpr12	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr12;$/;"	m	struct:dram_para	typeref:typename:u32
tpr12	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr12;$/;"	m	struct:dram_para	typeref:typename:u32
tpr13	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr13;$/;"	m	struct:dram_para	typeref:typename:u32
tpr13	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr13;$/;"	m	struct:dram_para	typeref:typename:u32
tpr2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr2;		\/* 0x1c dram timing parameters register 2 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
tpr2	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr2;$/;"	m	struct:dram_para	typeref:typename:u32
tpr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr2;$/;"	m	struct:dram_para	typeref:typename:u32
tpr2	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr2;		\/* 0x1c dram timing parameters register 2 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
tpr2	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr2;$/;"	m	struct:dram_para	typeref:typename:u32
tpr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr2;$/;"	m	struct:dram_para	typeref:typename:u32
tpr2	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tpr2;		\/* 0x14: Timing Parameter 2 Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
tpr2	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 tpr2;$/;"	m	struct:atmel_mpddrc_config	typeref:typename:u32
tpr2	include/synopsys/dwcddr21mctl.h	/^	unsigned int	tpr2;		\/* SDRAM Timing Parameters 2 *\/$/;"	m	struct:dwcddr21mctl	typeref:typename:unsigned int
tpr3	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr3;$/;"	m	struct:dram_para	typeref:typename:u32
tpr3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr3;$/;"	m	struct:dram_para	typeref:typename:u32
tpr3	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr3;$/;"	m	struct:dram_para	typeref:typename:u32
tpr3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr3;$/;"	m	struct:dram_para	typeref:typename:u32
tpr4	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr4;$/;"	m	struct:dram_para	typeref:typename:u32
tpr4	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr4;$/;"	m	struct:dram_para	typeref:typename:u32
tpr4	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr4;$/;"	m	struct:dram_para	typeref:typename:u32
tpr4	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr4;$/;"	m	struct:dram_para	typeref:typename:u32
tpr5	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 tpr5;$/;"	m	struct:dram_para	typeref:typename:u32
tpr5	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr5;$/;"	m	struct:dram_para	typeref:typename:u32
tpr5	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 tpr5;$/;"	m	struct:dram_para	typeref:typename:u32
tpr5	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr5;$/;"	m	struct:dram_para	typeref:typename:u32
tpr6	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr6;$/;"	m	struct:dram_para	typeref:typename:u32
tpr6	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr6;$/;"	m	struct:dram_para	typeref:typename:u32
tpr7	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr7;$/;"	m	struct:dram_para	typeref:typename:u32
tpr7	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr7;$/;"	m	struct:dram_para	typeref:typename:u32
tpr8	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr8;$/;"	m	struct:dram_para	typeref:typename:u32
tpr8	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr8;$/;"	m	struct:dram_para	typeref:typename:u32
tpr9	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 tpr9;$/;"	m	struct:dram_para	typeref:typename:u32
tpr9	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 tpr9;$/;"	m	struct:dram_para	typeref:typename:u32
tps	arch/arm/dts/am335x-bone-common.dtsi	/^	tps: tps@24 {$/;"	l
tps	arch/arm/dts/am335x-evm.dts	/^	tps: tps@2d {$/;"	l
tps	arch/arm/dts/am335x-evmsk.dts	/^	tps: tps@2d {$/;"	l
tps	arch/arm/dts/am335x-icev2.dts	/^	tps: power-controller@2d {$/;"	l
tps	arch/arm/dts/am335x-pxm2.dtsi	/^	tps: tps@2d {$/;"	l
tps	arch/arm/dts/am335x-rut.dts	/^	tps: tps@24 {$/;"	l
tps	arch/arm/dts/am437x-idk-evm.dts	/^	tps: tps62362@60 {$/;"	l
tps3_supported	drivers/video/tegra124/sor.h	/^	u8	tps3_supported;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u8
tps62361	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct pmic_data tps62361 = {$/;"	v	typeref:struct:pmic_data
tps62362_voltage_update	drivers/power/pmic/pmic_tps62362.c	/^int tps62362_voltage_update(unsigned char reg, unsigned char volt_sel)$/;"	f	typeref:typename:int
tps65090_bind	drivers/power/pmic/tps65090.c	/^static int tps65090_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tps65090_dcdc1	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_dcdc1: dcdc1 {$/;"	l	label:i2c_tunnel
tps65090_dcdc1	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_dcdc1: dcdc1 {$/;"	l	label:i2c_tunnel
tps65090_dcdc2	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_dcdc2: dcdc2 {$/;"	l	label:i2c_tunnel
tps65090_dcdc2	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_dcdc2: dcdc2 {$/;"	l	label:i2c_tunnel
tps65090_dcdc3	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_dcdc3: dcdc3 {$/;"	l	label:i2c_tunnel
tps65090_dcdc3	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_dcdc3: dcdc3 {$/;"	l	label:i2c_tunnel
tps65090_fet1	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet1: fet1 {$/;"	l	label:i2c_tunnel
tps65090_fet1	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet1: fet1 {$/;"	l	label:i2c_tunnel
tps65090_fet2	arch/arm/dts/exynos5250-snow.dts	/^					tps65090_fet2: fet2 {$/;"	l	label:i2c_104
tps65090_fet2	arch/arm/dts/exynos5250-spring.dts	/^					tps65090_fet2: fet2 {$/;"	l	label:cros_ec.cros_ec_ldo_tunnel
tps65090_fet2	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet2: fet2 {$/;"	l	label:i2c_tunnel
tps65090_fet2	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet2: fet2 {$/;"	l	label:i2c_tunnel
tps65090_fet3	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet3: fet3 {$/;"	l	label:i2c_tunnel
tps65090_fet3	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet3: fet3 {$/;"	l	label:i2c_tunnel
tps65090_fet4	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet4: fet4 {$/;"	l	label:i2c_tunnel
tps65090_fet4	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet4: fet4 {$/;"	l	label:i2c_tunnel
tps65090_fet5	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet5: fet5 {$/;"	l	label:i2c_tunnel
tps65090_fet5	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet5: fet5 {$/;"	l	label:i2c_tunnel
tps65090_fet6	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet6: fet6 {$/;"	l	label:i2c_tunnel
tps65090_fet6	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet6: fet6 {$/;"	l	label:i2c_tunnel
tps65090_fet7	arch/arm/dts/exynos5250-snow.dts	/^					tps65090_fet7: fet7 {$/;"	l	label:i2c_104
tps65090_fet7	arch/arm/dts/exynos5250-spring.dts	/^					tps65090_fet7: fet7 {$/;"	l	label:cros_ec.cros_ec_ldo_tunnel
tps65090_fet7	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_fet7: fet7 {$/;"	l	label:i2c_tunnel
tps65090_fet7	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_fet7: fet7 {$/;"	l	label:i2c_tunnel
tps65090_fet_get_enable	drivers/power/regulator/tps65090_regulator.c	/^static bool tps65090_fet_get_enable(struct udevice *dev)$/;"	f	typeref:typename:bool	file:
tps65090_fet_ops	drivers/power/regulator/tps65090_regulator.c	/^static const struct dm_regulator_ops tps65090_fet_ops = {$/;"	v	typeref:typename:const struct dm_regulator_ops	file:
tps65090_fet_probe	drivers/power/regulator/tps65090_regulator.c	/^static int tps65090_fet_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tps65090_fet_set	drivers/power/regulator/tps65090_regulator.c	/^static int tps65090_fet_set(struct udevice *pmic, int fet_id, bool set)$/;"	f	typeref:typename:int	file:
tps65090_fet_set_enable	drivers/power/regulator/tps65090_regulator.c	/^static int tps65090_fet_set_enable(struct udevice *dev, bool enable)$/;"	f	typeref:typename:int	file:
tps65090_ids	drivers/power/pmic/tps65090.c	/^static const struct udevice_id tps65090_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tps65090_ldo1	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_ldo1: ldo1 {$/;"	l	label:i2c_tunnel
tps65090_ldo1	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_ldo1: ldo1 {$/;"	l	label:i2c_tunnel
tps65090_ldo2	arch/arm/dts/exynos5420-peach-pit.dts	/^					tps65090_ldo2: ldo2 {$/;"	l	label:i2c_tunnel
tps65090_ldo2	arch/arm/dts/exynos5800-peach-pi.dts	/^					tps65090_ldo2: ldo2 {$/;"	l	label:i2c_tunnel
tps65090_ops	drivers/power/pmic/tps65090.c	/^static struct dm_pmic_ops tps65090_ops = {$/;"	v	typeref:struct:dm_pmic_ops	file:
tps65090_read	drivers/power/pmic/tps65090.c	/^static int tps65090_read(struct udevice *dev, uint reg, uint8_t *buff, int len)$/;"	f	typeref:typename:int	file:
tps65090_reg_count	drivers/power/pmic/tps65090.c	/^static int tps65090_reg_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tps65090_write	drivers/power/pmic/tps65090.c	/^static int tps65090_write(struct udevice *dev, uint reg, const uint8_t *buff,$/;"	f	typeref:typename:int	file:
tps65217_reg_read	drivers/power/pmic/pmic_tps65217.c	/^int tps65217_reg_read(uchar src_reg, uchar *src_val)$/;"	f	typeref:typename:int
tps65217_reg_write	drivers/power/pmic/pmic_tps65217.c	/^int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,$/;"	f	typeref:typename:int
tps65217_voltage_update	drivers/power/pmic/pmic_tps65217.c	/^int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)$/;"	f	typeref:typename:int
tps65218	arch/arm/dts/am437x-gp-evm.dts	/^	tps65218: tps65218@24 {$/;"	l
tps65218	arch/arm/dts/am43x-epos-evm.dts	/^	tps65218: tps65218@24 {$/;"	l
tps65218_lock_fseal	drivers/power/pmic/pmic_tps65218.c	/^int tps65218_lock_fseal(void)$/;"	f	typeref:typename:int
tps65218_reg_read	drivers/power/pmic/pmic_tps65218.c	/^int tps65218_reg_read(uchar dest_reg, uchar *dest_val)$/;"	f	typeref:typename:int
tps65218_reg_write	drivers/power/pmic/pmic_tps65218.c	/^int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,$/;"	f	typeref:typename:int
tps65218_toggle_fseal	drivers/power/pmic/pmic_tps65218.c	/^int tps65218_toggle_fseal(void)$/;"	f	typeref:typename:int
tps65218_voltage_update	drivers/power/pmic/pmic_tps65218.c	/^int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)$/;"	f	typeref:typename:int
tps6586x_adjust_sm0_sm1	drivers/power/tps6586x.c	/^int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate,$/;"	f	typeref:typename:int
tps6586x_dev	drivers/power/tps6586x.c	/^static struct udevice *tps6586x_dev;$/;"	v	typeref:struct:udevice *	file:
tps6586x_init	drivers/power/tps6586x.c	/^int tps6586x_init(struct udevice *dev)$/;"	f	typeref:typename:int
tps6586x_read	drivers/power/tps6586x.c	/^static int tps6586x_read(int reg)$/;"	f	typeref:typename:int	file:
tps6586x_set_pwm_mode	drivers/power/tps6586x.c	/^int tps6586x_set_pwm_mode(int mask)$/;"	f	typeref:typename:int
tps6586x_write	drivers/power/tps6586x.c	/^static int tps6586x_write(int reg, uchar *data, uint len)$/;"	f	typeref:typename:int	file:
tps659038	arch/arm/cpu/armv7/omap5/hw_data.c	/^struct pmic_data tps659038 = {$/;"	v	typeref:struct:pmic_data
tps659038	arch/arm/dts/am57xx-beagle-x15.dts	/^	tps659038: tps659038@58 {$/;"	l
tps659038	arch/arm/dts/am57xx-idk-common.dtsi	/^	tps659038: tps659038@58 {$/;"	l
tps659038	arch/arm/dts/dra7-evm.dts	/^	tps659038: tps659038@58 {$/;"	l
tps659038_gpio	arch/arm/dts/am57xx-beagle-x15.dts	/^		tps659038_gpio: tps659038_gpio {$/;"	l
tps659038_gpio	arch/arm/dts/am57xx-idk-common.dtsi	/^		tps659038_gpio: tps659038_gpio {$/;"	l
tps659038_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	tps659038_pins_default: tps659038_pins_default {$/;"	l
tps659038_pwr_button	arch/arm/dts/am57xx-beagle-x15.dts	/^		tps659038_pwr_button: tps659038_pwr_button {$/;"	l
tps659038_pwr_button	arch/arm/dts/am57xx-idk-common.dtsi	/^		tps659038_pwr_button: tps659038_pwr_button {$/;"	l
tps659038_rtc	arch/arm/dts/am57xx-beagle-x15.dts	/^		tps659038_rtc: tps659038_rtc {$/;"	l
tps659038_rtc	arch/arm/dts/am57xx-idk-common.dtsi	/^		tps659038_rtc: tps659038_rtc {$/;"	l
tps65910_set_i2c_control	drivers/power/pmic/pmic_tps65910.c	/^int tps65910_set_i2c_control(void)$/;"	f	typeref:typename:int
tps65910_voltage_update	drivers/power/pmic/pmic_tps65910.c	/^int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)$/;"	f	typeref:typename:int
tps65917	arch/arm/dts/dra72-evm-common.dtsi	/^	tps65917: tps65917@58 {$/;"	l
tps65917_regulators	arch/arm/dts/dra72-evm-common.dtsi	/^			tps65917_regulators: regulators {$/;"	l	label:tps65917
tpt	drivers/net/e1000.h	/^	uint64_t tpt;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
tptc0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int tptc0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
tptc0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tptc0clkctrl;	\/* offset 0x24 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
tptc0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tptc0clkctrl;	\/* offset 0x80 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
tptc1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int tptc1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
tptc2clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int tptc2clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
tptc3clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int tptc3clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
tptr	include/commproc.h	/^	ulong	tptr;		\/* Tx internal data pointer *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
tptr	include/usb/mpc8xx_udc.h	/^	ulong tptr;	\/* Transmit internal data pointer *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ulong
tptr	post/cpu/mpc8xx/usb.c	/^	uint tptr;$/;"	m	struct:usb_param_block	typeref:typename:uint	file:
tpu	arch/powerpc/include/asm/5xx_immap.h	/^	char   tpu[16][16];$/;"	m	struct:tpu	typeref:typename:char[16][16]
tpu	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct tpu {$/;"	s
tpu5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} tpu5xx_t;$/;"	t	typeref:struct:tpu
tpu_cfsr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cfsr0;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cfsr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cfsr1;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cfsr2	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cfsr2;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cfsr3	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cfsr3;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cier	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cier;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cisr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cisr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cpr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cpr0;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_cpr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_cpr1;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_dcnr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_dcnr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_dscr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_dscr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_dssr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_dssr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_hsqr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_hsqr0;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_hsqr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_hsqr1;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_hsrr0	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_hsrr0;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_hsrr1	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_hsrr1;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_iscr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_iscr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_isdr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_isdr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_lr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_lr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_sglr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_sglr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_tcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_tcr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_ticr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_ticr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_tpumcr	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_tpumcr;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_tpumcr2	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_tpumcr2;$/;"	m	struct:tpu	typeref:typename:ushort
tpu_tpumcr3	arch/powerpc/include/asm/5xx_immap.h	/^	ushort tpu_tpumcr3;$/;"	m	struct:tpu	typeref:typename:ushort
tpx	drivers/net/rtl8169.c	/^} tpx;$/;"	v	typeref:struct:rtl8169_private
tqc	drivers/net/mvgbe.h	/^	u32 tqc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
tqc1	drivers/net/mvgbe.h	/^	u32 tqc1;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
tqfpc	drivers/net/mvgbe.h	/^	u32 tqfpc;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
tqhs	include/ddr_spd.h	/^	unsigned char tqhs;        \/* 45 Max Read DataHold skew (tQHS) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
tqhs	include/ddr_spd.h	/^	unsigned char tqhs;        \/* 45 Max Read DataHold skew (tQHS) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
tqhs	include/spd.h	/^	unsigned char tqhs;        \/* 45 Max Read DataHold skew tQHS *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
tqhs_ps	include/common_timing_params.h	/^	unsigned int tqhs_ps;	\/* byte 45, spd->tqhs *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tqhs_ps	include/fsl_ddr_dimm_params.h	/^	int tqhs_ps;	\/* byte 45, spd->tqhs *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tqma6_bb_board_early_init_f	board/tqc/tqma6/tqma6_mba6.c	/^int tqma6_bb_board_early_init_f(void)$/;"	f	typeref:typename:int
tqma6_bb_board_early_init_f	board/tqc/tqma6/tqma6_wru4.c	/^int tqma6_bb_board_early_init_f(void)$/;"	f	typeref:typename:int
tqma6_bb_board_init	board/tqc/tqma6/tqma6_mba6.c	/^int tqma6_bb_board_init(void)$/;"	f	typeref:typename:int
tqma6_bb_board_init	board/tqc/tqma6/tqma6_wru4.c	/^int tqma6_bb_board_init(void)$/;"	f	typeref:typename:int
tqma6_bb_board_late_init	board/tqc/tqma6/tqma6_mba6.c	/^int tqma6_bb_board_late_init(void)$/;"	f	typeref:typename:int
tqma6_bb_board_late_init	board/tqc/tqma6/tqma6_wru4.c	/^int tqma6_bb_board_late_init(void)$/;"	f	typeref:typename:int
tqma6_bb_board_mmc_getcd	board/tqc/tqma6/tqma6_mba6.c	/^int tqma6_bb_board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
tqma6_bb_board_mmc_getcd	board/tqc/tqma6/tqma6_wru4.c	/^int tqma6_bb_board_mmc_getcd(struct mmc *mmc)$/;"	f	typeref:typename:int
tqma6_bb_board_mmc_getwp	board/tqc/tqma6/tqma6_mba6.c	/^int tqma6_bb_board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
tqma6_bb_board_mmc_getwp	board/tqc/tqma6/tqma6_wru4.c	/^int tqma6_bb_board_mmc_getwp(struct mmc *mmc)$/;"	f	typeref:typename:int
tqma6_bb_board_mmc_init	board/tqc/tqma6/tqma6_mba6.c	/^int tqma6_bb_board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
tqma6_bb_board_mmc_init	board/tqc/tqma6/tqma6_wru4.c	/^int tqma6_bb_board_mmc_init(bd_t *bis)$/;"	f	typeref:typename:int
tqma6_bb_ft_board_setup	board/tqc/tqma6/tqma6_mba6.c	/^void tqma6_bb_ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
tqma6_bb_ft_board_setup	board/tqc/tqma6/tqma6_wru4.c	/^void tqma6_bb_ft_board_setup(void *blob, bd_t *bd)$/;"	f	typeref:typename:void
tqma6_bb_get_boardname	board/tqc/tqma6/tqma6_mba6.c	/^const char *tqma6_bb_get_boardname(void)$/;"	f	typeref:typename:const char *
tqma6_bb_get_boardname	board/tqc/tqma6/tqma6_wru4.c	/^const char *tqma6_bb_get_boardname(void)$/;"	f	typeref:typename:const char *
tqma6_ecspi1_cs	board/tqc/tqma6/tqma6.c	/^static unsigned const tqma6_ecspi1_cs[] = {$/;"	v	typeref:typename:unsigned const[]	file:
tqma6_ecspi1_pads	board/tqc/tqma6/tqma6.c	/^static iomux_v3_cfg_t const tqma6_ecspi1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
tqma6_emmc_dsr	board/tqc/tqma6/tqma6.c	/^static const uint16_t tqma6_emmc_dsr = 0x0100;$/;"	v	typeref:typename:const uint16_t	file:
tqma6_get_boardname	board/tqc/tqma6/tqma6.c	/^static const char *tqma6_get_boardname(void)$/;"	f	typeref:typename:const char *	file:
tqma6_i2c3_pads	board/tqc/tqma6/tqma6.c	/^static struct i2c_pads_info tqma6_i2c3_pads = {$/;"	v	typeref:struct:i2c_pads_info	file:
tqma6_iomuxc_spi	board/tqc/tqma6/tqma6.c	/^__weak void tqma6_iomuxc_spi(void)$/;"	f	typeref:typename:__weak void
tqma6_iomuxc_spi	board/tqc/tqma6/tqma6_wru4.c	/^void tqma6_iomuxc_spi(void)$/;"	f	typeref:typename:void
tqma6_setup_i2c	board/tqc/tqma6/tqma6.c	/^static void tqma6_setup_i2c(void)$/;"	f	typeref:typename:void	file:
tqma6_usdhc3_pads	board/tqc/tqma6/tqma6.c	/^static iomux_v3_cfg_t const tqma6_usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
tqma6_usdhc_cfg	board/tqc/tqma6/tqma6.c	/^struct fsl_esdhc_cfg tqma6_usdhc_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg
tqptr	drivers/qe/uec.h	/^	u32  tqptr;$/;"	m	struct:uec_tx_global_pram	typeref:typename:u32
tqueue	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tqueue;         \/* 0x24114 - Transmit Queue Control Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tqx	drivers/net/mvgbe.h	/^	struct mvgbe_tqx tqx[8];$/;"	m	struct:mvgbe_registers	typeref:struct:mvgbe_tqx[8]
tqxac	drivers/net/mvgbe.h	/^	u32 tqxac;$/;"	m	struct:mvgbe_tqx	typeref:typename:u32
tqxipg0	drivers/net/mvgbe.h	/^	u32 tqxipg0;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
tqxipg1	drivers/net/mvgbe.h	/^	u32 tqxipg1;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
tqxpad	drivers/net/mvgbe.h	/^	u32 tqxpad;$/;"	m	struct:mvgbe_tqx	typeref:typename:u32
tqxtbc	drivers/net/mvgbe.h	/^	u32 tqxtbc;$/;"	m	struct:mvgbe_tqx	typeref:typename:u32
tr	arch/arm/mach-at91/include/mach/at91_mc.h	/^	u32	tr; 	\/* 0x04 SDRAMC Refresh Timer Register *\/$/;"	m	struct:at91_sdramc	typeref:typename:u32
tr	arch/arm/mach-at91/include/mach/at91sam9_sdramc.h	/^	u32	tr;$/;"	m	struct:sdramc_reg	typeref:typename:u32
tr03wt	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tr03wt;         \/* 0x24140 - TxBD Rings 0-3 round-robin weightings *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tr127	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tr127;		\/* TX & RX 65-127 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tr127	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tr127;		\/* 0x24684 - Transmit and Receive 65-127 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tr127	include/fsl_dtsec.h	/^	u32	tr127;		\/* Tx and Rx 65 to 127 bytes frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tr127	include/tsec.h	/^	u32	tr127;		\/* Tx\/Rx 65-127 byte Frame Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tr1k	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tr1k;		\/* TX & RX 512-1023 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tr1k	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tr1k;		\/* 0x24690 - Transmit and Receive 512-1023 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tr1k	include/fsl_dtsec.h	/^	u32	tr1k;		\/* Tx and Rx 512 to 1023 bytes frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tr1k	include/tsec.h	/^	u32	tr1k;		\/* Tx\/Rx 512-1023 byte Frame Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tr255	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tr255;		\/* TX & RX 128-255 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tr255	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tr255;		\/* 0x24688 - Transmit and Receive 128-255 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tr255	include/fsl_dtsec.h	/^	u32	tr255;		\/* Tx and Rx 128 to 255 bytes frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tr255	include/tsec.h	/^	u32	tr255;		\/* Tx\/Rx 128-255 byte Frame Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tr511	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tr511;		\/* TX & RX 256-511 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tr511	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tr511;		\/* 0x2468c - Transmit and Receive 256-511 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tr511	include/fsl_dtsec.h	/^	u32	tr511;		\/* Tx and Rx 256 to 511 bytes frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tr511	include/tsec.h	/^	u32	tr511;		\/* Tx\/Rx 256-511 byte Frame Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tr64	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tr64;		\/* TX & RX 64-byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tr64	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tr64;		\/* 0x24680 - Transmit and Receive 64-byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tr64	include/fsl_dtsec.h	/^	u32	tr64;		\/* Tx and Rx 64 bytes frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tr64	include/tsec.h	/^	u32	tr64;		\/* Tx\/Rx 64-byte Frame Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tr_static_init	lib/zlib/trees.c	/^local void tr_static_init()$/;"	f	typeref:typename:local void
tra	arch/sh/include/asm/ptrace.h	/^	long tra;$/;"	m	struct:pt_regs	typeref:typename:long
trace_buff	include/asm-generic/global_data.h	/^	void		*trace_buff;	\/* The trace buffer *\/$/;"	m	struct:global_data	typeref:typename:void *
trace_buffer_restore	arch/blackfin/cpu/traps.c	/^#define trace_buffer_restore(/;"	d	file:
trace_buffer_save	arch/blackfin/cpu/traps.c	/^#define trace_buffer_save(/;"	d	file:
trace_call	include/trace.h	/^struct trace_call {$/;"	s
trace_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 trace_cfg;		\/* 0x84 trace clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
trace_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 trace_cfg;		\/* 0x84 trace clock configuration *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
trace_chunk_type	include/trace.h	/^enum trace_chunk_type {$/;"	g
trace_clk_div_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	trace_clk_div_ck: trace_clk_div_ck {$/;"	l
trace_config_head	tools/proftool.c	/^struct trace_configline_info *trace_config_head;$/;"	v	typeref:struct:trace_configline_info *
trace_configline_info	tools/proftool.c	/^struct trace_configline_info {$/;"	s	file:
trace_early_init	lib/trace.c	/^int __attribute__((no_instrument_function)) trace_early_init(void)$/;"	f	typeref:typename:int
trace_enabled	lib/trace.c	/^static char trace_enabled __attribute__((section(".data")));$/;"	v	typeref:typename:char	file:
trace_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 trace_freq;		\/* offset 0x48 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
trace_hdr	lib/trace.c	/^struct trace_hdr {$/;"	s	file:
trace_init	lib/trace.c	/^int __attribute__((no_instrument_function)) trace_init(void *buff,$/;"	f	typeref:typename:int
trace_inited	lib/trace.c	/^static char trace_inited __attribute__((section(".data")));$/;"	v	typeref:typename:char	file:
trace_line_type	tools/proftool.c	/^enum trace_line_type {$/;"	g	file:
trace_list_calls	lib/trace.c	/^int trace_list_calls(void *buff, int buff_size, unsigned *needed)$/;"	f	typeref:typename:int
trace_list_functions	lib/trace.c	/^int trace_list_functions(void *buff, int buff_size, unsigned int *needed)$/;"	f	typeref:typename:int
trace_output_func	include/trace.h	/^struct trace_output_func {$/;"	s
trace_output_hdr	include/trace.h	/^struct trace_output_hdr {$/;"	s
trace_pmd_clk_mux_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	trace_pmd_clk_mux_ck: trace_pmd_clk_mux_ck {$/;"	l
trace_print_stats	lib/trace.c	/^void trace_print_stats(void)$/;"	f	typeref:typename:void
trace_set_enabled	lib/trace.c	/^void __attribute__((no_instrument_function)) trace_set_enabled(int enabled)$/;"	f	typeref:typename:void
tracediv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	tracediv;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
tracediv	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	uint32_t tracediv;$/;"	m	struct:cm_config	typeref:typename:uint32_t
tracepoint_munge	scripts/kernel-doc	/^sub tracepoint_munge($) {$/;"	s
track	cmd/fdc.c	/^	unsigned int track;	\/* nr of tracks *\/$/;"	m	struct:__anon1d1457860208	typeref:typename:unsigned int	file:
track_bytes	include/ata.h	/^	unsigned short	track_bytes;	\/* unformatted bytes per track *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
trackpad_int	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		trackpad_int: trackpad-int {$/;"	l
trailing_strtol	lib/strto.c	/^long trailing_strtol(const char *str)$/;"	f	typeref:typename:long
trailing_strtoln	lib/strto.c	/^long trailing_strtoln(const char *str, const char *end)$/;"	f	typeref:typename:long
train_control_element	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_control_element train_control_element;$/;"	v	typeref:enum:hws_control_element
train_cs_num	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_cs_num;$/;"	v	typeref:typename:u32
train_dev_num	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_dev_num;$/;"	v	typeref:typename:u32
train_direction	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_dir train_direction;$/;"	v	typeref:enum:hws_dir
train_edge_compare	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_edge_compare train_edge_compare;$/;"	v	typeref:enum:hws_edge_compare
train_if_acess	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_if_acess, train_if_id, train_pup_access;$/;"	v	typeref:typename:u32
train_if_id	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_if_acess, train_if_id, train_pup_access;$/;"	v	typeref:typename:u32
train_if_select	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_if_select;$/;"	v	typeref:typename:u32
train_init_value	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_init_value;$/;"	v	typeref:typename:u32
train_number_iterations	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_number_iterations;$/;"	v	typeref:typename:u32
train_pattern	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_pattern train_pattern;$/;"	v	typeref:enum:hws_pattern
train_pup_access	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_if_acess, train_if_id, train_pup_access;$/;"	v	typeref:typename:u32
train_pup_num	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 train_pup_num;$/;"	v	typeref:typename:u32
train_result_type	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_training_result train_result_type;$/;"	v	typeref:enum:hws_training_result
train_set	drivers/video/rockchip/rk_edp.c	/^	u8 train_set[4];$/;"	m	struct:rk_edp_priv	typeref:typename:u8[4]	file:
train_status	drivers/ddr/marvell/a38x/ddr3_training_pbs.c	/^enum hws_training_ip_stat train_status[MAX_INTERFACE_NUM];$/;"	v	typeref:enum:hws_training_ip_stat[]
trainctl	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 trainctl[3];	\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[3]
trainctl	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 trainctl[3];	\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[3]
trainctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 trainctl0;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainctl0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 trainctl0;		\/* 0x1d0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 trainctl1;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainctl1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 trainctl1;		\/* 0x1d4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainctl2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 trainctl2;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainctl2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 trainctl2;		\/* 0x1d8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
traine_search_dir	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_search_dir traine_search_dir;$/;"	v	typeref:enum:hws_search_dir
training_message	arch/x86/cpu/quark/mrc_util.c	/^void training_message(uint8_t channel, uint8_t rank, uint8_t byte_lane)$/;"	f	typeref:typename:void
training_modes	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^enum training_modes  {$/;"	g
training_pattern_1	drivers/video/tegra124/sor.h	/^	training_pattern_1		= 1,$/;"	e	enum:__anon2aa7773c0103
training_pattern_2	drivers/video/tegra124/sor.h	/^	training_pattern_2		= 2,$/;"	e	enum:__anon2aa7773c0103
training_pattern_3	drivers/video/tegra124/sor.h	/^	training_pattern_3		= 3,$/;"	e	enum:__anon2aa7773c0103
training_pattern_disabled	drivers/video/tegra124/sor.h	/^	training_pattern_disabled	= 0,$/;"	e	enum:__anon2aa7773c0103
training_pattern_none	drivers/video/tegra124/sor.h	/^	training_pattern_none		= 0xff$/;"	e	enum:__anon2aa7773c0103
training_ptn_set	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	training_ptn_set;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
training_res	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^u32 training_res[MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS *$/;"	v	typeref:typename:u32[]
training_result	drivers/ddr/marvell/a38x/ddr3_training.c	/^enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];$/;"	v	typeref:enum:hws_result[][]
training_sequence	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static const struct ddrphy_init_sequence training_sequence[] = {$/;"	v	typeref:typename:const struct ddrphy_init_sequence[]	file:
training_stage	drivers/ddr/marvell/a38x/ddr3_training.c	/^enum auto_tune_stage training_stage = INIT_CONTROLLER;$/;"	v	typeref:enum:auto_tune_stage
trainstat	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 trainstat;		\/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainstat	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 trainstat;	        \/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainstat	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 trainstat;		\/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trainstat	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 trainstat;	        \/* 0x1dc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
traintrain_cs_type	drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c	/^enum hws_ddr_cs traintrain_cs_type;$/;"	v	typeref:enum:hws_ddr_cs
tran_speed	include/mmc.h	/^	uint tran_speed;$/;"	m	struct:mmc	typeref:typename:uint
trans	drivers/spi/ich.h	/^	struct spi_trans trans;	\/* current transaction in progress *\/$/;"	m	struct:ich_spi_priv	typeref:struct:spi_trans
trans_bytes	include/scsi.h	/^	unsigned long		trans_bytes;			\/* tranfered bytes		*\/$/;"	m	struct:SCSI_cmd_block	typeref:typename:unsigned long
trans_cmnd	common/usb_storage.c	/^typedef int (*trans_cmnd)(ccb *cb, struct us_data *data);$/;"	t	typeref:typename:int (*)(ccb * cb,struct us_data * data)	file:
trans_color0	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 trans_color0;			\/* 0x54 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
trans_color1	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 trans_color1;			\/* 0x58 *\/$/;"	m	struct:dispc_regs	typeref:typename:u32
trans_count	scripts/kconfig/expr.c	/^static int trans_count;$/;"	v	typeref:typename:int	file:
trans_disabled	arch/powerpc/cpu/mpc86xx/start.S	/^trans_disabled:$/;"	l
trans_event	drivers/usb/host/xhci.h	/^	struct xhci_transfer_event	trans_event;$/;"	m	union:xhci_trb	typeref:struct:xhci_transfer_event
trans_mode	include/linux/mtd/samsung_onenand.h	/^	unsigned int	trans_mode;	\/* 0x02E0 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
trans_reset	common/usb_storage.c	/^typedef int (*trans_reset)(struct us_data *data);$/;"	t	typeref:typename:int (*)(struct us_data * data)	file:
trans_spare	include/linux/mtd/samsung_onenand.h	/^	unsigned int	trans_spare;	\/* 0x0140 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
trans_valid_chars	tools/buildman/builder.py	/^trans_valid_chars = string.maketrans("\/: ", "---")$/;"	v
transceiver	include/linux/ethtool.h	/^	__u8	transceiver;	\/* Which transceiver to use *\/$/;"	m	struct:ethtool_cmd	typeref:typename:__u8
transcfg	drivers/block/fsl_sata.h	/^	u32 transcfg;		\/* Transport layer configuration *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
transfer	include/dma.h	/^	int (*transfer)(struct udevice *dev, int direction, void *dst,$/;"	m	struct:dma_ops	typeref:typename:int (*)(struct udevice * dev,int direction,void * dst,void * src,size_t len)
transfer_buffer	drivers/usb/host/isp116x.h	/^	void *transfer_buffer;	\/* (in) associated data buffer *\/$/;"	m	struct:__anon2695f18b0108	typeref:typename:void *
transfer_buffer	drivers/usb/host/ohci.h	/^	void *transfer_buffer;$/;"	m	struct:__anone9fd91320108	typeref:typename:void *
transfer_buffer	drivers/usb/musb-new/usb-compat.h	/^	void *transfer_buffer;		\/* (in) associated data buffer *\/$/;"	m	struct:urb	typeref:typename:void *
transfer_buffer_length	drivers/usb/host/ohci.h	/^	int transfer_buffer_length;$/;"	m	struct:__anone9fd91320108	typeref:typename:int
transfer_buffer_length	drivers/usb/musb-new/usb-compat.h	/^	u32 transfer_buffer_length;	\/* (in) data buffer length *\/$/;"	m	struct:urb	typeref:typename:u32
transfer_chunk	drivers/usb/host/dwc2.c	/^static int transfer_chunk(struct dwc2_hc_regs *hc_regs, void *aligned_buffer,$/;"	f	typeref:typename:int	file:
transfer_count	include/fis.h	/^	u16 transfer_count;$/;"	m	struct:sata_fis_pio_setup	typeref:typename:u16
transfer_dma	drivers/usb/musb-new/usb-compat.h	/^	dma_addr_t transfer_dma;	\/* (in) dma addr for transfer_buffer *\/$/;"	m	struct:urb	typeref:typename:dma_addr_t
transfer_flags	drivers/usb/musb-new/usb-compat.h	/^	unsigned int transfer_flags;	\/* (in) URB_SHORT_NOT_OK | ...*\/$/;"	m	struct:urb	typeref:typename:unsigned int
transfer_len	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	int transfer_len;$/;"	m	struct:td	typeref:typename:int
transfer_len	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	int transfer_len;$/;"	m	struct:td	typeref:typename:int
transfer_len	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	int transfer_len;$/;"	m	struct:td	typeref:typename:int
transfer_len	drivers/usb/emul/sandbox_flash.c	/^	int transfer_len;$/;"	m	struct:sandbox_flash_priv	typeref:typename:int	file:
transfer_len	drivers/usb/emul/sandbox_flash.c	/^	u16 transfer_len;$/;"	m	struct:scsi_read10_req	typeref:typename:u16	file:
transfer_len	drivers/usb/host/ohci-s3c24xx.h	/^	int transfer_len;$/;"	m	struct:td	typeref:typename:int
transfer_len	drivers/usb/host/ohci.h	/^	int transfer_len;$/;"	m	struct:td	typeref:typename:int
transfer_len	drivers/usb/host/xhci.h	/^	__le32	transfer_len;$/;"	m	struct:xhci_transfer_event	typeref:typename:__le32
transfer_ring	drivers/usb/host/xhci.h	/^	struct xhci_ring *transfer_ring;$/;"	m	struct:xhci_ctrl	typeref:struct:xhci_ring *
transfer_size	drivers/i2c/i2c-cdns.c	/^	u32 transfer_size;$/;"	m	struct:cdns_i2c_regs	typeref:typename:u32	file:
transfer_size	drivers/i2c/zynq_i2c.c	/^	u32 transfer_size;$/;"	m	struct:zynq_i2c_registers	typeref:typename:u32	file:
transfer_to_handler	arch/powerpc/cpu/mpc512x/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc5xx/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc5xxx/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc8260/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc83xx/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc85xx/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc86xx/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/mpc8xx/start.S	/^transfer_to_handler:$/;"	l
transfer_to_handler	arch/powerpc/cpu/ppc4xx/start.S	/^transfer_to_handler:$/;"	l
transform_y_m_n	tools/buildman/kconfiglib.py	/^        def transform_y_m_n(item):$/;"	f	member:Config._eq_to_sym	file:
translate	common/fdt_support.c	/^	int		(*translate)(fdt32_t *addr, u64 offset, int na);$/;"	m	struct:of_bus	typeref:typename:int (*)(fdt32_t * addr,u64 offset,int na)	file:
translate_oob2spare	fs/yaffs2/yaffs_mtdif.c	/^static inline void translate_oob2spare(struct yaffs_spare *spare, u8 *oob)$/;"	f	typeref:typename:void	file:
translate_spare2oob	fs/yaffs2/yaffs_mtdif.c	/^static inline void translate_spare2oob(const struct yaffs_spare *spare, u8 *oob)$/;"	f	typeref:typename:void	file:
translation_offset	drivers/core/root.c	/^	fdt_addr_t translation_offset;	\/* optional translation offset *\/$/;"	m	struct:root_priv	typeref:typename:fdt_addr_t	file:
transmit_data	include/gdsys_fpga.h	/^	u16 transmit_data;$/;"	m	struct:ihs_io_ep	typeref:typename:u16
transmit_neg_width	include/usb/ulpi.h	/^	u8	transmit_neg_width;$/;"	m	struct:ulpi_regs	typeref:typename:u8
transmit_pos_width	include/usb/ulpi.h	/^	u8	transmit_pos_width;$/;"	m	struct:ulpi_regs	typeref:typename:u8
transmit_q1_ptr	drivers/net/zynq_gem.c	/^	u32 transmit_q1_ptr; \/* 0x440 - Transmit priority queue 1 *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
transmit_timestamp	net/sntp.h	/^	unsigned long long transmit_timestamp;$/;"	m	struct:sntp_pkt_t	typeref:typename:unsigned long long
transp	include/linux/fb.h	/^	__u16 *transp;			\/* transparency, can be NULL *\/$/;"	m	struct:fb_cmap	typeref:typename:__u16 *
transp	include/linux/fb.h	/^	__u16 *transp;		\/* transparency, can be NULL *\/$/;"	m	struct:fb_cmap_user	typeref:typename:__u16 *
transp	include/linux/fb.h	/^	struct fb_bitfield transp;	\/* transparency			*\/$/;"	m	struct:fb_var_screeninfo	typeref:struct:fb_bitfield
transport	common/usb_storage.c	/^	trans_cmnd	transport;		\/* transport routine *\/$/;"	m	struct:us_data	typeref:typename:trans_cmnd	file:
transport_reset	common/usb_storage.c	/^	trans_reset	transport_reset;	\/* reset routine *\/$/;"	m	struct:us_data	typeref:typename:trans_reset	file:
transstatus	drivers/block/fsl_sata.h	/^	u32 transstatus;	\/* Transport layer status *\/$/;"	m	struct:fsl_sata_reg	typeref:typename:u32
trap	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG trap;		\/* Reason for being here *\/$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
trap_addr_high	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	trap_addr_high[4];	\/* Trap address high *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
trap_addr_low	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	trap_addr_low[4];	\/* Trap address low *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
trap_c	arch/blackfin/cpu/traps.c	/^int trap_c(struct pt_regs *regs, uint32_t level)$/;"	f	typeref:typename:int
trap_handler	arch/nios2/cpu/traps.c	/^void trap_handler (struct pt_regs *regs)$/;"	f	typeref:typename:void
trap_id	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	trap_id[4];		\/* Trap ID *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
trap_init	arch/m68k/lib/traps.c	/^void trap_init(ulong value) {$/;"	f	typeref:typename:void
trap_init	arch/powerpc/cpu/mpc512x/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc5xx/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc5xxx/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc8260/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc83xx/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc85xx/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc86xx/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/mpc8xx/start.S	/^trap_init:$/;"	l
trap_init	arch/powerpc/cpu/ppc4xx/start.S	/^trap_init:$/;"	l
trap_no	arch/arm/include/asm/processor.h	/^	unsigned long			trap_no;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
trap_no	arch/mips/include/asm/processor.h	/^	unsigned long trap_no;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
trap_reloc	arch/powerpc/lib/reloc.S	/^trap_reloc:$/;"	l
trap_setup	arch/sparc/cpu/leon2/start.S	/^trap_setup:$/;"	l
trap_setup	arch/sparc/cpu/leon3/start.S	/^trap_setup:$/;"	l
traps	include/fsl_qe.h	/^		u32 traps[16];	\/* Trap addresses, 0 == ignore *\/$/;"	m	struct:qe_firmware::qe_microcode	typeref:typename:u32[16]
traps	scripts/basic/fixdep.c	/^static void traps(void)$/;"	f	typeref:typename:void	file:
traptable	arch/sparc/lib/bootm.c	/^	char traptable[PAGE_SIZE];$/;"	m	struct:__anon0049f2d20108	typeref:typename:char[]	file:
tras	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	tras;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
tras	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tras;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tras	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tras;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tras	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tras;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tras	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tras;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tras	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tras;		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tras	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tras;		\/* 0xf0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tras	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
tras	board/mpl/mip405/mip405.c	/^	unsigned char tras;		\/* datain30 in clocks *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
tras	include/ddr_spd.h	/^	unsigned char tras;        \/* 30 Minimum RAS Pulse Width (tRAS) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
tras	include/ddr_spd.h	/^	unsigned char tras;        \/* 30 Minimum RAS Pulse Width (tRAS) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
tras	include/spd.h	/^	unsigned char tras;        \/* 30 Minimum RAS Pulse Width (tRAS) *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
tras_lockout	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tras_lockout;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tras_max	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u32 tras_max;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u32
tras_min	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 tras_min;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
tras_min_lsb	include/ddr_spd.h	/^	uint8_t tras_min_lsb;		\/* 28 tRASmin, lsb *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tras_min_lsb	include/ddr_spd.h	/^	unsigned char tras_min_lsb;    \/* 22 Min Active to Precharge$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
tras_ps	include/common_timing_params.h	/^	unsigned int tras_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
tras_ps	include/fsl_ddr_dimm_params.h	/^	int tras_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
tras_trc_ext	include/ddr_spd.h	/^	uint8_t tras_trc_ext;		\/* 27 Upper Nibbles for tRAS and tRC *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
tras_trc_ext	include/ddr_spd.h	/^	unsigned char tras_trc_ext;    \/* 21 Upper Nibbles for tRAS and tRC *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trasmin	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trasmin;	\/* tRAS min (ns*100) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u16
trasmin	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trasmin;	\/* tRAS min (ns*100) *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u16
trats_low_power_mode	board/samsung/trats/trats.c	/^static void trats_low_power_mode(void)$/;"	f	typeref:typename:void	file:
trb	drivers/usb/dwc3/core.h	/^	struct dwc3_trb		*trb;$/;"	m	struct:dwc3_request	typeref:struct:dwc3_trb *
trb_dma	drivers/usb/dwc3/core.h	/^	dma_addr_t		trb_dma;$/;"	m	struct:dwc3_request	typeref:typename:dma_addr_t
trb_pool	drivers/usb/dwc3/core.h	/^	struct dwc3_trb		*trb_pool;$/;"	m	struct:dwc3_ep	typeref:struct:dwc3_trb *
trb_pool_dma	drivers/usb/dwc3/core.h	/^	dma_addr_t		trb_pool_dma;$/;"	m	struct:dwc3_ep	typeref:typename:dma_addr_t
trb_type	drivers/usb/host/xhci.h	/^} trb_type;$/;"	t	typeref:enum:__anonfefbfedb0203
trbs	drivers/usb/host/xhci.h	/^	union xhci_trb		*trbs;$/;"	m	struct:xhci_segment	typeref:union:xhci_trb *
trc	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	trc;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
trc	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trc;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trc	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trc;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trc	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trc;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trc	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trc;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trc	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trc;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trc	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trc;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trc	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trc;		\/* 0xf4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trc	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
trc	include/ddr_spd.h	/^	unsigned char trc;         \/* 41 Min Active to Auto refresh time tRC *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
trc	include/ddr_spd.h	/^	unsigned char trc;         \/* 41 Min Active to Auto refresh time tRC *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trc	include/spd.h	/^	unsigned char trc;         \/* 41 Min Active to Auto refresh time tRC *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trc_min_lsb	include/ddr_spd.h	/^	uint8_t trc_min_lsb;		\/* 29 tRCmin, lsb *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trc_min_lsb	include/ddr_spd.h	/^	unsigned char trc_min_lsb;     \/* 23 Min Active to Active\/Refresh$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trc_ps	include/common_timing_params.h	/^	unsigned int trc_ps;	\/* maximum = 254 ns + .75 ns = 254750 ps *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trc_ps	include/fsl_ddr_dimm_params.h	/^	int trc_ps;	\/* maximum = 254 ns + .75 ns = 254750 ps *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
trcd	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trcd;	\/* tRCD=tRP=CL (ns*100) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u16
trcd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trcd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trcd	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trcd;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trcd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trcd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trcd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trcd;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trcd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trcd;		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trcd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trcd;		\/* 0xf8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trcd	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
trcd	board/mpl/mip405/mip405.c	/^	unsigned char trcd;		\/* datain29 in clocks *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
trcd	include/ddr_spd.h	/^	unsigned char trcd;        \/* 29 Min RAS to CAS Delay (tRCD) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
trcd	include/ddr_spd.h	/^	unsigned char trcd;        \/* 29 Min RAS to CAS Delay (tRCD) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trcd	include/spd.h	/^	unsigned char trcd;        \/* 29 Min RAS to CAS Delay (tRCD) *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trcd_int	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trcd_int;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trcd_lp	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trcd_lp;$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u16
trcd_min	include/ddr_spd.h	/^	uint8_t trcd_min;		\/* 25 Min RAS# to CAS# Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trcd_min	include/ddr_spd.h	/^	unsigned char trcd_min;        \/* 18 Min RAS# to CAS# Delay Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trcd_ps	include/common_timing_params.h	/^	unsigned int trcd_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trcd_ps	include/fsl_ddr_dimm_params.h	/^	int trcd_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trcmin	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trcmin;	\/* tRC min (ns*100) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u16
trcmin	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trcmin;	\/* tRC min (ns*100) *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u16
trctrfc_ext	include/ddr_spd.h	/^	unsigned char trctrfc_ext; \/* 40 Extensions to trc and trfc *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trctrfc_ext	include/spd.h	/^	unsigned char trctrfc_ext; \/* 40 Extensions to trc and trfc *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trd	arch/m68k/include/asm/coldfire/ata.h	/^	u8 trd;			\/* 0x06 *\/$/;"	m	struct:atac	typeref:typename:u8
trdr	drivers/rtc/mpc5xxx.c	/^	volatile ulong	trdr;	\/* MBAR+0x820: test register\/divides register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
tree	scripts/kconfig/gconf.c	/^GtkTreeStore *tree1, *tree2, *tree;$/;"	v	typeref:typename:GtkTreeStore *
tree1	scripts/kconfig/gconf.c	/^GtkTreeStore *tree1, *tree2, *tree;$/;"	v	typeref:typename:GtkTreeStore *
tree1_w	scripts/kconfig/gconf.c	/^GtkWidget *tree1_w = NULL;	\/\/ left  frame$/;"	v	typeref:typename:GtkWidget *
tree2	scripts/kconfig/gconf.c	/^GtkTreeStore *tree1, *tree2, *tree;$/;"	v	typeref:typename:GtkTreeStore *
tree2_w	scripts/kconfig/gconf.c	/^GtkWidget *tree2_w = NULL;	\/\/ right frame$/;"	v	typeref:typename:GtkWidget *
tree_depth	fs/reiserfs/reiserfs_private.h	/^  __u16 tree_depth;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u16
tree_desc	lib/zlib/deflate.h	/^} FAR tree_desc;$/;"	t	typeref:struct:tree_desc_s FAR
tree_desc_s	lib/zlib/deflate.h	/^typedef struct tree_desc_s {$/;"	s
tree_destroy	drivers/mtd/ubi/wl.c	/^static void tree_destroy(struct ubi_device *ubi, struct rb_root *root)$/;"	f	typeref:typename:void	file:
tree_lock	fs/ubifs/ubifs.h	/^	spinlock_t		tree_lock;	\/* and lock protecting it *\/$/;"	m	struct:address_space	typeref:typename:spinlock_t
treeview1	scripts/kconfig/gconf.glade	/^		<widget class="GtkTreeView" id="treeview1">$/;"	i
treeview2	scripts/kconfig/gconf.glade	/^		    <widget class="GtkTreeView" id="treeview2">$/;"	i
tref	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u16 tref;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u16
tref_int	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u16 tref_int;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u16
trefbw	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 trefbw;		\/* 0xA8: EMC_TREFBW *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
trefi	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trefi;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trefi	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trefi;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trefi	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trefi;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trefi	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trefi;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trefi	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trefi;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trefi	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trefi;		\/* 0xd0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
treset_cntr0_val	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	treset_cntr0_val;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
treset_cntr1_val	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	treset_cntr1_val;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
treset_cntr2_val	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	treset_cntr2_val;$/;"	m	struct:socfpga_sdram_misc_config	typeref:typename:u8
trfc	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	trfc;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
trfc	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trfc;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trfc	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trfc;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trfc	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trfc;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trfc	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trfc;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trfc	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trfc;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trfc	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trfc;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trfc	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trfc;		\/* 0xd8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trfc	include/ddr_spd.h	/^	unsigned char trfc;        \/* 42 Min Auto to Active period tRFC *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
trfc	include/ddr_spd.h	/^	unsigned char trfc;        \/* 42 Min Auto to Active period tRFC *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trfc	include/spd.h	/^	unsigned char trfc;        \/* 42 Min Auto to Active period tRFC *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trfc1_min_lsb	include/ddr_spd.h	/^	uint8_t trfc1_min_lsb;		\/* 30 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trfc1_min_msb	include/ddr_spd.h	/^	uint8_t trfc1_min_msb;		\/* 31 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trfc1_ps	include/common_timing_params.h	/^	unsigned int trfc1_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trfc1_ps	include/fsl_ddr_dimm_params.h	/^	int trfc1_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trfc2_min_lsb	include/ddr_spd.h	/^	uint8_t trfc2_min_lsb;		\/* 32 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trfc2_min_msb	include/ddr_spd.h	/^	uint8_t trfc2_min_msb;		\/* 33 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trfc2_ps	include/common_timing_params.h	/^	unsigned int trfc2_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trfc2_ps	include/fsl_ddr_dimm_params.h	/^	int trfc2_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trfc4_min_lsb	include/ddr_spd.h	/^	uint8_t trfc4_min_lsb;		\/* 34 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trfc4_min_msb	include/ddr_spd.h	/^	uint8_t trfc4_min_msb;		\/* 35 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trfc4_ps	include/common_timing_params.h	/^	unsigned int trfc4_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trfc4_ps	include/fsl_ddr_dimm_params.h	/^	int trfc4_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trfc_min_lsb	include/ddr_spd.h	/^	unsigned char trfc_min_lsb;    \/* 24 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trfc_min_msb	include/ddr_spd.h	/^	unsigned char trfc_min_msb;    \/* 25 Min Refresh Recovery Delay Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trfc_ps	include/common_timing_params.h	/^	unsigned int trfc_ps;	\/* maximum = 255 ns + 256 ns + .75 ns$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trfc_ps	include/fsl_ddr_dimm_params.h	/^	int trfc_ps;	\/* max = 255 ns + 256 ns + .75 ns$/;"	m	struct:dimm_params_s	typeref:typename:int
trg_mask	arch/arm/cpu/arm926ejs/mxs/spl_power_init.c	/^	uint32_t		trg_mask;$/;"	m	struct:mxs_vddx_cfg	typeref:typename:uint32_t	file:
trgt_id	arch/powerpc/include/asm/fsl_law.h	/^	enum law_trgt_if trgt_id;$/;"	m	struct:law_entry	typeref:enum:law_trgt_if
trgt_id	include/fsl_validate.h	/^	u32 trgt_id;$/;"	m	struct:fsl_secboot_sg_table	typeref:typename:u32
tri	scripts/kconfig/expr.h	/^	tristate tri;$/;"	m	struct:expr_value	typeref:typename:tristate
tri	scripts/kconfig/expr.h	/^	tristate tri;$/;"	m	struct:symbol_value	typeref:typename:tristate
tri_greater	tools/buildman/kconfiglib.py	/^def tri_greater(v1, v2):$/;"	f
tri_greater_eq	tools/buildman/kconfiglib.py	/^def tri_greater_eq(v1, v2):$/;"	f
tri_less	tools/buildman/kconfiglib.py	/^def tri_less(v1, v2):$/;"	f
tri_less_eq	tools/buildman/kconfiglib.py	/^def tri_less_eq(v1, v2):$/;"	f
tricorder_eeprom	board/corscience/tricorder/tricorder-eeprom.h	/^struct tricorder_eeprom {$/;"	s
tricorder_eeprom_read	board/corscience/tricorder/tricorder-eeprom.c	/^int tricorder_eeprom_read(unsigned devaddr)$/;"	f	typeref:typename:int
tricorder_eeprom_v0	board/corscience/tricorder/tricorder-eeprom.c	/^	struct tricorder_eeprom_v0 {$/;"	s	function:handle_eeprom_v0	file:
tricorder_eeprom_write	board/corscience/tricorder/tricorder-eeprom.c	/^int tricorder_eeprom_write(unsigned devaddr, const char *name,$/;"	f	typeref:typename:int
tricorder_get_eeprom	board/corscience/tricorder/tricorder-eeprom.c	/^int tricorder_get_eeprom(int addr, struct tricorder_eeprom *eeprom)$/;"	f	typeref:typename:int
trig	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	struct bcm_clk_trig trig;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_trig
trig	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	struct bcm_clk_trig trig;$/;"	m	struct:peri_clk_data	typeref:struct:bcm_clk_trig
trig_ctr	board/freescale/common/qixis.h	/^	u8 trig_ctr[4];$/;"	m	struct:qixis	typeref:typename:u8[4]
trig_dst	board/freescale/common/qixis.h	/^	u8 trig_dst[4];$/;"	m	struct:qixis	typeref:typename:u8[4]
trig_src	board/freescale/common/qixis.h	/^	u8 trig_src[4];$/;"	m	struct:qixis	typeref:typename:u8[4]
trig_stat	board/freescale/common/qixis.h	/^	u8 trig_stat;$/;"	m	struct:qixis	typeref:typename:u8
trigcon	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int trigcon;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
trigger	arch/arm/mach-exynos/include/mach/mipi_dsim.h	/^	void (*trigger)(struct fb_info *info);$/;"	m	struct:mipi_dsim_master_ops	typeref:typename:void (*)(struct fb_info * info)
trigger_address_error	arch/sh/include/asm/system.h	/^static inline void trigger_address_error(void)$/;"	f	typeref:typename:void
trigger_exists	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^#define trigger_exists(/;"	d
trigger_exists	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^#define trigger_exists(/;"	d
trigger_fpga_config	board/keymile/km_arm/fpga_config.c	/^int trigger_fpga_config(void)$/;"	f	typeref:typename:int
trigger_fpga_config	board/keymile/kmp204x/pci.c	/^int trigger_fpga_config(void)$/;"	f	typeref:typename:int
trigger_level	arch/x86/cpu/broadwell/pinctrl_broadwell.c	/^	bool trigger_level;$/;"	m	struct:pin_info	typeref:typename:bool	file:
trigger_next	lib/efi_loader/efi_boottime.c	/^	u64 trigger_next;$/;"	m	struct:__anonb3c3434b0108	typeref:typename:u64	file:
trigger_slot_word	arch/arm/include/asm/ti-common/ti-edma3.h	/^	int trigger_slot_word;	\/* only used for qedma *\/$/;"	m	struct:edma3_channel_config	typeref:typename:int
trigger_time	lib/efi_loader/efi_boottime.c	/^	u32 trigger_time;$/;"	m	struct:__anonb3c3434b0108	typeref:typename:u32	file:
trigger_type	lib/efi_loader/efi_boottime.c	/^	u32 trigger_type;$/;"	m	struct:__anonb3c3434b0108	typeref:typename:u32	file:
trim	scripts/checkpatch.pl	/^sub trim {$/;"	s
trim_threshold	common/dlmalloc.c	/^static unsigned long trim_threshold   = DEFAULT_TRIM_THRESHOLD;$/;"	v	typeref:typename:unsigned long	file:
triminfo	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 triminfo;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
triminfo_control	arch/arm/mach-exynos/include/mach/tmu.h	/^	u32 triminfo_control;$/;"	m	struct:exynos5_tmu_reg	typeref:typename:u32
trip_delay_element	drivers/ddr/marvell/a38x/ddr3_training_ip_static.h	/^struct trip_delay_element {$/;"	s
triple_cur_buf	drivers/video/ipu_regs.h	/^	u32 triple_cur_buf[4];$/;"	m	struct:ipu_stat	typeref:typename:u32[4]
triple_indir_block	include/ext_common.h	/^			__le32 triple_indir_block;$/;"	m	struct:ext2_inode::__anon5bc84367010a::datablocks	typeref:typename:__le32
tris	drivers/gpio/pic32_gpio.c	/^	struct pic32_reg_atomic tris;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
tris	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic tris;$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic	file:
tristate	arch/arm/include/asm/arch-tegra/pinmux.h	/^	u32 tristate:2;		\/* tristate or normal PMUX_TRI_...  *\/$/;"	m	struct:pmux_pingrp_config	typeref:typename:u32:2
tristate	scripts/kconfig/expr.h	/^typedef enum tristate {$/;"	g
tristate	scripts/kconfig/expr.h	/^} tristate;$/;"	t	typeref:enum:tristate
tristate_print_symbol	scripts/kconfig/confdata.c	/^tristate_print_symbol(FILE *fp, struct symbol *sym, const char *value, void *arg)$/;"	f	typeref:typename:void	file:
tristate_printer_cb	scripts/kconfig/confdata.c	/^static struct conf_printer tristate_printer_cb =$/;"	v	typeref:struct:conf_printer	file:
trk_longidle	drivers/ddr/altera/sequencer.h	/^	u32 trk_longidle;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
trk_read_dqs_width	drivers/ddr/altera/sequencer.h	/^	u32 trk_read_dqs_width;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
trk_rfsh	drivers/ddr/altera/sequencer.h	/^	u32 trk_rfsh;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
trk_rw_mgr_addr	drivers/ddr/altera/sequencer.h	/^	u32 trk_rw_mgr_addr;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
trk_sample_count	drivers/ddr/altera/sequencer.h	/^	u32 trk_sample_count;$/;"	m	struct:socfpga_sdr_reg_file	typeref:typename:u32
trmax	arch/powerpc/include/asm/immap_85xx.h	/^	u32	trmax;		\/* TX & RX 1024-1518 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
trmax	arch/powerpc/include/asm/immap_86xx.h	/^	uint	trmax;		\/* 0x24694 - Transmit and Receive 1024-1518 byte Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
trmax	include/fsl_dtsec.h	/^	u32	trmax;		\/* Tx and Rx 1024 to 1518 bytes frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
trmax	include/tsec.h	/^	u32	trmax;		\/* Tx\/Rx 1024-1518 byte Frame Counter *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
trmgv	arch/powerpc/include/asm/immap_85xx.h	/^	u32	trmgv;		\/* TX & RX 1519-1522 byte Good VLAN Frame *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
trmgv	arch/powerpc/include/asm/immap_86xx.h	/^	uint	trmgv;		\/* 0x24698 - Transmit and Receive 1519-1522 byte Good VLAN Frame *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
trmgv	include/fsl_dtsec.h	/^	u32	trmgv;		\/* Tx and Rx 1519 to 1522 good VLAN frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
trmgv	include/tsec.h	/^	u32	trmgv;		\/* Tx\/Rx 1519-1522 byte Good VLAN Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
trng_clk	arch/arm/dts/at91sam9g45.dtsi	/^					trng_clk: trng_clk {$/;"	l
trng_clk	arch/arm/dts/sama5d2.dtsi	/^					trng_clk: trng_clk@47 {$/;"	l
trnmod	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned short	trnmod;		\/* _CMD_XFER_MODE_0 15:00 xfer mode *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned short
trp	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	trp;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
trp	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trp;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trp	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trp;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trp	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trp;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trp	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trp;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trp	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trp;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trp	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trp;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trp	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trp;		\/* 0xdc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trp	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
trp	arch/m68k/include/asm/coldfire/ata.h	/^	u8 trp;			\/* 0x0F *\/$/;"	m	struct:atac	typeref:typename:u8
trp	board/mpl/mip405/mip405.c	/^	unsigned char trp;		\/* datain27 in clocks *\/$/;"	m	struct:__anon0274db920208	typeref:typename:unsigned char	file:
trp	include/ddr_spd.h	/^	unsigned char trp;         \/* 27 Min Row Precharge Time (tRP)*\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
trp	include/ddr_spd.h	/^	unsigned char trp;         \/* 27 Min Row Precharge Time (tRP)*\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trp	include/spd.h	/^	unsigned char trp;         \/* 27 Min Row Precharge Time (tRP)*\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trp_ab	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trp_ab;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trp_min	include/ddr_spd.h	/^	uint8_t trp_min;		\/* 26 Min Row Precharge Delay Time *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trp_min	include/ddr_spd.h	/^	unsigned char trp_min;         \/* 20 Min Row Precharge Delay Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trp_ps	include/common_timing_params.h	/^	unsigned int trp_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trp_ps	include/fsl_ddr_dimm_params.h	/^	int trp_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trpab	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 trpab;		\/* 0x9C: EMC_TRPAB *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
trpab_lp	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trpab_lp;$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u16
trppb_lp	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u16 trppb_lp;$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u16
trr	arch/m68k/include/asm/timer.h	/^	u16 trr;		\/* 0x04 Reference register *\/$/;"	m	struct:dtimer_ctrl	typeref:typename:u16
trr1	arch/powerpc/include/asm/immap_85xx.h	/^	u16	trr1;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
trr2	arch/powerpc/include/asm/immap_85xx.h	/^	u16	trr2;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
trr3	arch/powerpc/include/asm/immap_85xx.h	/^	u16	trr3;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
trr4	arch/powerpc/include/asm/immap_85xx.h	/^	u16	trr4;$/;"	m	struct:ccsr_cpm_timer	typeref:typename:u16
trrd	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	trrd;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
trrd	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trrd;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trrd	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trrd;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trrd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trrd;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trrd	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trrd;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trrd	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trrd;		\/* 0xfc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trrd	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trrd;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trrd	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trrd;		\/* 0xfc *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trrd	include/ddr_spd.h	/^	unsigned char trrd;        \/* 28 Min Row Active to Row Active (tRRD) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
trrd	include/ddr_spd.h	/^	unsigned char trrd;        \/* 28 Min Row Active to Row Active (tRRD) *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trrd	include/spd.h	/^	unsigned char trrd;        \/* 28 Min Row Active to Row Active (tRRD) *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trrd_min	include/ddr_spd.h	/^	unsigned char trrd_min;        \/* 19 Min Row Active to$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trrd_ps	include/common_timing_params.h	/^	unsigned int trrd_ps;	\/* maximum = 63750 ps *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trrd_ps	include/fsl_ddr_dimm_params.h	/^	int trrd_ps;	\/* maximum = 63750 ps *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
trrdl_min	include/ddr_spd.h	/^	uint8_t trrdl_min;		\/* 39 tRRD_Lmin, MTB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trrdl_ps	include/common_timing_params.h	/^	unsigned int trrdl_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trrdl_ps	include/fsl_ddr_dimm_params.h	/^	int trrdl_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trrds_min	include/ddr_spd.h	/^	uint8_t trrds_min;		\/* 38 tRRD_Smin, MTB *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t
trrds_ps	include/common_timing_params.h	/^	unsigned int trrds_ps;$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trrds_ps	include/fsl_ddr_dimm_params.h	/^	int trrds_ps;$/;"	m	struct:dimm_params_s	typeref:typename:int
trrp	examples/standalone/timer.c	/^  ushort	*trrp;		\/* Pointer to Timer Reference Register	*\/$/;"	m	struct:tid_8xx_cpmtimer_s	typeref:typename:ushort *	file:
trsid	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	trsid;$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int
trst_pwron	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u32 trst_pwron;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u32
trsth	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trsth;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trsth	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trsth;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trsth	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trsth;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trsth	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trsth;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trstl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trstl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trstl	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trstl;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trstl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trstl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trstl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trstl;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trstl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trstl;		\/* 0x134 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trstl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trstl;		\/* 0x134 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trtp	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trtp;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trtp	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trtp;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trtp	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trtp;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trtp	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trtp;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trtp	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trtp;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trtp	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 trtp;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
trtp	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trtp;		\/* 0x100 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trtp	include/ddr_spd.h	/^	unsigned char trtp;        \/* 38 Int read to precharge delay tRTP *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
trtp	include/spd.h	/^	unsigned char trtp;        \/* 38 Int read to precharge delay tRTP *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
trtp_min	include/ddr_spd.h	/^	unsigned char trtp_min;        \/* 27 Min Internal Read to Precharge$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
trtp_ps	include/common_timing_params.h	/^	unsigned int trtp_ps;	\/* byte 38, spd->trtp *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
trtp_ps	include/fsl_ddr_dimm_params.h	/^	int trtp_ps;	\/* byte 38, spd->trtp *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
trtw	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 trtw;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
trtw	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 trtw;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
trtw	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trtw;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
trtw	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 trtw;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
trtw	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 trtw;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
trtw	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 trtw;		\/* 0xe0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
true	lib/dhry/dhry.h	/^#define true /;"	d
true_mem_data_mask_width	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	true_mem_data_mask_width;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
trun_key_init	fs/ubifs/key.h	/^static inline void trun_key_init(const struct ubifs_info *c,$/;"	f	typeref:typename:void
trun_remove_range	fs/ubifs/replay.c	/^static int trun_remove_range(struct ubifs_info *c, struct replay_entry *r)$/;"	f	typeref:typename:int	file:
truncate_sz	net/bootp.c	/^static int truncate_sz(const char *name, int maxlen, int curlen)$/;"	f	typeref:typename:int	file:
trust_zone	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 trust_zone; \/* 0x430 *\/ \/* FIXME *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
trwt	include/fsl_ddr_sdram.h	/^	unsigned int trwt;			\/* read-to-write turnaround *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
trwt_override	include/fsl_ddr_sdram.h	/^	unsigned int trwt_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
try_both	test/stdint/test-includes.sh	/^try_both() {$/;"	f
try_idle	drivers/usb/musb-new/musb_core.h	/^	void	(*try_idle)(struct musb *musb, unsigned long timeout);$/;"	m	struct:musb_platform_ops	typeref:typename:void (*)(struct musb * musb,unsigned long timeout)
try_init	board/keymile/km82xx/km82xx.c	/^static long int try_init(memctl8260_t *memctl, ulong sdmr,$/;"	f	typeref:typename:long int	file:
try_module_get	include/linux/compat.h	/^#define try_module_get(/;"	d
try_msr_calibrate_tsc	drivers/timer/tsc_timer.c	/^static unsigned long __maybe_unused try_msr_calibrate_tsc(void)$/;"	f	typeref:typename:unsigned long __maybe_unused	file:
try_read_node	fs/ubifs/tnc.c	/^static int try_read_node(const struct ubifs_info *c, void *buf, int type,$/;"	f	typeref:typename:int	file:
try_remove	tools/genboardscfg.py	/^def try_remove(f):$/;"	f
try_test	test/stdint/test-includes.sh	/^try_test() {$/;"	f
try_to_freeze	include/linux/compat.h	/^#define try_to_freeze(/;"	d
try_unlock_memory	arch/arm/cpu/armv7/omap3/board.c	/^void try_unlock_memory(void)$/;"	f	typeref:typename:void
ts	drivers/net/ftmac100.h	/^	unsigned int	ts;		\/* 0xc4 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
ts	drivers/net/mvgbe.h	/^	u32 ts;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
ts	drivers/power/exynos-tmu.c	/^	struct temperature_params ts;$/;"	m	struct:tmu_data	typeref:struct:temperature_params	file:
ts	drivers/serial/serial_mxc.c	/^	u32 ts;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
ts	scripts/kconfig/zconf.lex.c	/^	int ts, i;$/;"	v	typeref:typename:int
ts3a227e_int_l	arch/arm/dts/rk3288-veyron.dtsi	/^		ts3a227e_int_l: ts3a227e-int-l {$/;"	l
ts4800_wtd_regs	board/technologic/ts4800/ts4800.h	/^struct ts4800_wtd_regs {$/;"	s
ts_addresses	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint8_t ts_addresses[4];$/;"	m	struct:pei_data	typeref:typename:uint8_t[4]
ts_clk	arch/arm/dts/sun4i-a10.dtsi	/^		ts_clk: clk@01c20098 {$/;"	l
ts_clk	arch/arm/dts/sun5i.dtsi	/^		ts_clk: clk@01c20098 {$/;"	l
ts_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ts_clk: clk@01c20098 {$/;"	l
ts_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ts_clk_cfg;		\/* 0x98 transport stream clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ts_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ts_clk_cfg;		\/* 0x98 transport stream clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ts_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ts_clk_cfg;		\/* 0x428 transport stream clock cfg *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ts_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ts_clk_cfg;		\/* 0x98 transport stream clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ts_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ts_clk_cfg;		\/* 0x98 transport stream clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ts_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ts_clk_cfg;		\/* 0x428 transport stream clock cfg *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ts_ctl	drivers/net/cpsw.c	/^	u32	ts_ctl;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
ts_power_pin	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	ts_power_pin: ts_power_pin@0 {$/;"	l
ts_reset_pin	arch/arm/dts/sun7i-a20-wexler-tab7200.dts	/^	ts_reset_pin: ts_reset_pin@0 {$/;"	l
ts_seq_ltype	drivers/net/cpsw.c	/^	u32	ts_seq_ltype;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
ts_table	arch/x86/cpu/coreboot/timestamp.c	/^static struct timestamp_table *ts_table  __attribute__((section(".data")));$/;"	v	typeref:struct:timestamp_table *	file:
ts_vlan	drivers/net/cpsw.c	/^	u32	ts_vlan;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
ts_wake_pin_p66	arch/arm/dts/sun5i-a13-utoo-p66.dts	/^	ts_wake_pin_p66: ts_wake_pin@0 {$/;"	l
tsadc	arch/arm/dts/rk3288.dtsi	/^	tsadc: tsadc@ff280000 {$/;"	l
tsadc_int	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^		u32 tsadc_int;$/;"	m	union:rk3399_pmugrf_regs::__anonbec5629a090a	typeref:typename:u32
tsadc_testbit_h	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 tsadc_testbit_h;$/;"	m	struct:rk3288_grf	typeref:typename:u32
tsadc_testbit_h	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 tsadc_testbit_h;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
tsadc_testbit_l	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 tsadc_testbit_l;$/;"	m	struct:rk3288_grf	typeref:typename:u32
tsadc_testbit_l	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 tsadc_testbit_l;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
tsc	arch/arm/dts/imx6ull.dtsi	/^			tsc: tsc@02040000 {$/;"	l
tsc_base	arch/x86/include/asm/global_data.h	/^	uint64_t tsc_base;		\/* Initial value returned by rdtsc() *\/$/;"	m	struct:arch_global_data	typeref:typename:uint64_t
tsc_freq	arch/x86/cpu/baytrail/cpu.c	/^static unsigned long tsc_freq(void)$/;"	f	typeref:typename:unsigned long	file:
tsc_timer_get_count	drivers/timer/tsc_timer.c	/^static int tsc_timer_get_count(struct udevice *dev, u64 *count)$/;"	f	typeref:typename:int	file:
tsc_timer_ids	drivers/timer/tsc_timer.c	/^static const struct udevice_id tsc_timer_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tsc_timer_ops	drivers/timer/tsc_timer.c	/^static const struct timer_ops tsc_timer_ops = {$/;"	v	typeref:typename:const struct timer_ops	file:
tsc_timer_probe	drivers/timer/tsc_timer.c	/^static int tsc_timer_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
tscadc	arch/arm/dts/am33xx.dtsi	/^		tscadc: tscadc@44e0d000 {$/;"	l
tscadc	arch/arm/dts/am4372.dtsi	/^		tscadc: tscadc@44e0d000 {$/;"	l
tscir	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tscir;		\/* offset 0x54 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
tscir	drivers/timer/omap-timer.c	/^	unsigned int tscir;		\/* offset 0x54 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
tscl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tscl;		\/* TX Single Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tscl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tscl;		\/* 0x246fc - Transmit Single Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tscl	include/fsl_dtsec.h	/^	u32	tscl;		\/* Transmit single collision pkt *\/$/;"	m	struct:dtsec	typeref:typename:u32
tscl	include/tsec.h	/^	u32	tscl;		\/* Transmit Single Collision Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tsctc	drivers/net/e1000.h	/^	uint64_t tsctc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
tsctfc	drivers/net/e1000.h	/^	uint64_t tsctfc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
tsctr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int tsctr;$/;"	m	struct:pwmss_ecap_regs	typeref:typename:unsigned int
tsd2d_ns	drivers/spi/cadence_qspi.h	/^	u32		tsd2d_ns;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
tsdp	arch/arm/include/asm/arch-spear/spr_emi.h	/^	u32 tsdp;$/;"	m	struct:emi_bank_regs	typeref:typename:u32
tsdp	board/spear/common/spr_misc.c	/^	unsigned int tsdp;$/;"	m	struct:cust_emi_para	typeref:typename:unsigned int	file:
tse_adjust_link	drivers/net/altera_tse.c	/^static void tse_adjust_link(struct altera_tse_priv *priv,$/;"	f	typeref:typename:void	file:
tse_mac	arch/nios2/dts/3c120_devboard.dts	/^			tse_mac: ethernet@0x4000 {$/;"	l	label:pb_cpu_to_io
tse_mac_mdio	arch/nios2/dts/3c120_devboard.dts	/^				tse_mac_mdio: mdio {$/;"	l	label:pb_cpu_to_io.tse_mac
tse_mdio_init	drivers/net/altera_tse.c	/^static int tse_mdio_init(const char *name, struct altera_tse_priv *priv)$/;"	f	typeref:typename:int	file:
tse_mdio_read	drivers/net/altera_tse.c	/^static int tse_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
tse_mdio_write	drivers/net/altera_tse.c	/^static int tse_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
tse_msgdma_ops	drivers/net/altera_tse.c	/^static const struct tse_ops tse_msgdma_ops = {$/;"	v	typeref:typename:const struct tse_ops	file:
tse_ops	drivers/net/altera_tse.h	/^struct tse_ops {$/;"	s
tse_phy_init	drivers/net/altera_tse.c	/^static int tse_phy_init(struct altera_tse_priv *priv, void *dev)$/;"	f	typeref:typename:int	file:
tse_sgdma_ops	drivers/net/altera_tse.c	/^static const struct tse_ops tse_sgdma_ops = {$/;"	v	typeref:typename:const struct tse_ops	file:
tsec	arch/powerpc/include/asm/immap_83xx.h	/^	tsec83xx_t		tsec[2];$/;"	m	struct:immap	typeref:typename:tsec83xx_t[2]
tsec	include/tsec.h	/^struct tsec {$/;"	s
tsec12ioovcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tsec12ioovcr;	\/* eTSEC 1\/2 IO override control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
tsec1_clk	arch/powerpc/include/asm/global_data.h	/^	u32 tsec1_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
tsec2_clk	arch/powerpc/include/asm/global_data.h	/^	u32 tsec2_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
tsec34ioovcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tsec34ioovcr;	\/* eTSEC 3\/4 IO override control *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
tsec83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct tsec83xx {$/;"	s
tsec83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} tsec83xx_t;$/;"	t	typeref:struct:tsec83xx
tsec_configure_serdes	drivers/net/tsec.c	/^static void tsec_configure_serdes(struct tsec_private *priv)$/;"	f	typeref:typename:void	file:
tsec_eth_init	drivers/net/tsec.c	/^int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num)$/;"	f	typeref:typename:int
tsec_free_pkt	drivers/net/tsec.c	/^static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
tsec_get_interface	drivers/net/tsec.c	/^static phy_interface_t tsec_get_interface(struct tsec_private *priv)$/;"	f	typeref:typename:phy_interface_t	file:
tsec_halt	drivers/net/tsec.c	/^static void tsec_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
tsec_hash_regs	include/tsec.h	/^struct tsec_hash_regs {$/;"	s
tsec_id	include/fsl_dtsec.h	/^	u32	tsec_id;	\/* controller ID and version *\/$/;"	m	struct:dtsec	typeref:typename:u32
tsec_id2	include/fsl_dtsec.h	/^	u32	tsec_id2;	\/* controller ID and configuration *\/$/;"	m	struct:dtsec	typeref:typename:u32
tsec_ids	drivers/net/tsec.c	/^static const struct udevice_id tsec_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
tsec_info	drivers/net/tsec.c	/^static struct tsec_info_struct tsec_info[] = {$/;"	v	typeref:struct:tsec_info_struct[]	file:
tsec_info_struct	include/tsec.h	/^struct tsec_info_struct {$/;"	s
tsec_init	drivers/net/tsec.c	/^static int tsec_init(struct eth_device *dev, bd_t * bd)$/;"	f	typeref:typename:int	file:
tsec_initialize	drivers/net/tsec.c	/^static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info)$/;"	f	typeref:typename:int	file:
tsec_local_mdio_read	drivers/net/fsl_mdio.c	/^int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr,$/;"	f	typeref:typename:int
tsec_local_mdio_write	drivers/net/fsl_mdio.c	/^void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr,$/;"	f	typeref:typename:void
tsec_mcast_addr	drivers/net/tsec.c	/^static int tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set)$/;"	f	typeref:typename:int	file:
tsec_mii_mng	include/fsl_mdio.h	/^struct tsec_mii_mng {$/;"	s
tsec_ops	drivers/net/tsec.c	/^static const struct eth_ops tsec_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
tsec_phy_read	drivers/net/fsl_mdio.c	/^int tsec_phy_read(struct mii_dev *bus, int addr, int dev_addr, int regnum)$/;"	f	typeref:typename:int
tsec_phy_write	drivers/net/fsl_mdio.c	/^int tsec_phy_write(struct mii_dev *bus, int addr, int dev_addr, int regnum,$/;"	f	typeref:typename:int
tsec_private	include/tsec.h	/^struct tsec_private {$/;"	s
tsec_probe	drivers/net/tsec.c	/^int tsec_probe(struct udevice *dev)$/;"	f	typeref:typename:int
tsec_recv	drivers/net/tsec.c	/^static int tsec_recv(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
tsec_recv	drivers/net/tsec.c	/^static int tsec_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
tsec_remove	drivers/net/tsec.c	/^int tsec_remove(struct udevice *dev)$/;"	f	typeref:typename:int
tsec_rmon_mib	include/tsec.h	/^struct tsec_rmon_mib {$/;"	s
tsec_send	drivers/net/tsec.c	/^static int tsec_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
tsec_standard_init	drivers/net/tsec.c	/^int tsec_standard_init(bd_t *bis)$/;"	f	typeref:typename:int
tseg_size	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t tseg_size;$/;"	m	struct:pei_data	typeref:typename:uint32_t
tseg_size	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t tseg_size;$/;"	m	struct:pei_data	typeref:typename:uint32_t
tsel	drivers/ddr/microchip/ddr2_regs.h	/^	u32 tsel;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
tsh	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 tsh;	\/* Tri-State Select 0..15 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
tshsl_ns	drivers/spi/cadence_qspi.h	/^	u32		tshsl_ns;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
tsi108_clear_pci_error	drivers/pci/tsi108_pci.c	/^void tsi108_clear_pci_error (void)$/;"	f	typeref:typename:void
tsi108_eth_halt	drivers/net/tsi108_eth.c	/^static void tsi108_eth_halt (struct eth_device *dev)$/;"	f	typeref:typename:void	file:
tsi108_eth_initialize	drivers/net/tsi108_eth.c	/^int tsi108_eth_initialize (bd_t * bis)$/;"	f	typeref:typename:int
tsi108_eth_probe	drivers/net/tsi108_eth.c	/^static int tsi108_eth_probe (struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
tsi108_eth_recv	drivers/net/tsi108_eth.c	/^static int tsi108_eth_recv (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
tsi108_eth_send	drivers/net/tsi108_eth.c	/^static int tsi108_eth_send(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
tsi108_read_config_dword	drivers/pci/tsi108_pci.c	/^static int tsi108_read_config_dword (struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
tsi108_write_config_dword	drivers/pci/tsi108_pci.c	/^static int tsi108_write_config_dword (struct pci_controller *hose,$/;"	f	typeref:typename:int	file:
tsi148_eval_vam	cmd/tsi148.c	/^unsigned int tsi148_eval_vam(int vam)$/;"	f	typeref:typename:unsigned int
tsi148_init	cmd/tsi148.c	/^int tsi148_init(void)$/;"	f	typeref:typename:int
tsi148_pci_slave_window	cmd/tsi148.c	/^int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr,$/;"	f	typeref:typename:int
tsi148_vme_crcsr_window	cmd/tsi148.c	/^int tsi148_vme_crcsr_window(unsigned int vmeAddr)$/;"	f	typeref:typename:int
tsi148_vme_crg_window	cmd/tsi148.c	/^int tsi148_vme_crg_window(unsigned int vmeAddr, int vam)$/;"	f	typeref:typename:int
tsi148_vme_gcsr_window	cmd/tsi148.c	/^int tsi148_vme_gcsr_window(unsigned int vmeAddr, int vam)$/;"	f	typeref:typename:int
tsi148_vme_slave_window	cmd/tsi148.c	/^int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr,$/;"	f	typeref:typename:int
tsize	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	unsigned char tsize;$/;"	m	struct:mfgdata	typeref:typename:unsigned char	file:
tsl	arch/powerpc/include/asm/ppc4xx-gpio.h	/^	u32 tsl;	\/* Tri-State Select 16..31 *\/$/;"	m	struct:ppc4xx_gpio	typeref:typename:u32
tsl2550	arch/arm/dts/am335x-evm.dts	/^	tsl2550: tsl2550@39 {$/;"	l
tsl2563	arch/arm/dts/am335x-pxm2.dtsi	/^	tsl2563: tsl2563@49 {$/;"	l
tslch_ns	drivers/spi/cadence_qspi.h	/^	u32		tslch_ns;$/;"	m	struct:cadence_spi_platdata	typeref:typename:u32
tsr	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 tsr;$/;"	m	struct:at91_emac	typeref:typename:u32
tsr	arch/blackfin/include/asm/serial4.h	/^	u32 tsr;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
tsr	drivers/rtc/mpc5xxx.c	/^	volatile ulong	tsr;	\/* MBAR+0x800: time set register *\/$/;"	m	struct:rtc5200	typeref:typename:volatile ulong	file:
tsrex	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	tsrex;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
tsrh	include/mpc5xxx.h	/^	volatile u8  tsrh;              \/* 0x1C *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u8
tsrl	include/mpc5xxx.h	/^	volatile u8  tsrl;              \/* 0x1D *\/$/;"	m	struct:mscan_buffer	typeref:typename:volatile u8
tss	arch/m68k/include/asm/coldfire/ata.h	/^	u8 tss;			\/* 0x16 *\/$/;"	m	struct:atac	typeref:typename:u8
tst_rcvry	fs/ubifs/debug.h	/^	unsigned int tst_rcvry:1;$/;"	m	struct:ubifs_debug_info	typeref:typename:unsigned int:1
tst_rcvry	fs/ubifs/debug.h	/^	unsigned int tst_rcvry:1;$/;"	m	struct:ubifs_global_debug_info	typeref:typename:unsigned int:1
tstamp_table	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	void	*tstamp_table;$/;"	m	struct:sysinfo_t	typeref:typename:void *
tstat	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tstat;		\/* TX Status *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tstat	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tstat;		\/* 0x24104 - Transmit Status Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tstat	include/tsec.h	/^	u32	tstat;		\/* Transmit Status *\/$/;"	m	struct:tsec	typeref:typename:u32
tstate	drivers/qe/uec.h	/^	u32  tstate;$/;"	m	struct:uec_tx_global_pram	typeref:typename:u32
tstate	include/commproc.h	/^	ulong	tstate;		\/* Tx internal state *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
tstate	include/usb/mpc8xx_udc.h	/^	ulong tstate;	\/* Transmit internal state *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ulong
tstate	post/cpu/mpc8xx/usb.c	/^	uint tstate;$/;"	m	struct:usb_param_block	typeref:typename:uint	file:
tstaten	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tstaten;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tstc	common/console.c	/^int tstc(void)$/;"	f	typeref:typename:int
tstc	include/keyboard.h	/^	int (*tstc)(struct udevice *dev);$/;"	m	struct:keyboard_ops	typeref:typename:int (*)(struct udevice * dev)
tstc	include/serial.h	/^	int	(*tstc)(void);$/;"	m	struct:serial_device	typeref:typename:int (*)(void)
tstc	include/stdio_dev.h	/^	int (*tstc)(struct stdio_dev *dev);$/;"	m	struct:stdio_dev	typeref:typename:int (*)(struct stdio_dev * dev)
tstcdev	common/console.c	/^static struct stdio_dev *tstcdev;$/;"	v	typeref:struct:stdio_dev *	file:
tstmul	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^tstmul (unsigned int ux, unsigned int uy, unsigned int ur)$/;"	f	typeref:typename:void	file:
tstr	include/sh_tmu.h	/^	u8	tstr;$/;"	m	struct:tmu_regs	typeref:typename:u8
tstr	include/sh_tmu.h	/^	u8  tstr;$/;"	m	struct:tmu_regs	typeref:typename:u8
tstscratch	arch/arm/mach-socfpga/include/mach/reset_manager.h	/^	u32	tstscratch;$/;"	m	struct:socfpga_reset_manager	typeref:typename:u32
tsv0	drivers/net/lpc32xx_eth.c	/^	u32 tsv0;		\/* Transmit status vector register 0 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
tsv1	drivers/net/lpc32xx_eth.c	/^	u32 tsv1;		\/* Transmit status vector register 1 *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
tt	arch/powerpc/lib/kgdb.c	/^	unsigned int tt;		\/* Trap type code for powerpc *\/$/;"	m	struct:hard_trap_info	typeref:typename:unsigned int	file:
tt	lib/bzip2/bzlib_private.h	/^      UInt32   *tt;$/;"	m	struct:__anon93cbeec40208	typeref:typename:UInt32 *
ttBYTE	drivers/video/stb_truetype.h	/^#define ttBYTE(/;"	d
ttCHAR	drivers/video/stb_truetype.h	/^#define ttCHAR(/;"	d
ttFixed	drivers/video/stb_truetype.h	/^#define ttFixed(/;"	d
ttLONG	drivers/video/stb_truetype.h	/^   #define ttLONG(/;"	d
ttLONG	drivers/video/stb_truetype.h	/^   static stbtt_int32 ttLONG(const stbtt_uint8 *p)    { return (p[0]<<24) + (p[1]<<16) + (p[2]<</;"	f	typeref:typename:stbtt_int32
ttSHORT	drivers/video/stb_truetype.h	/^   #define ttSHORT(/;"	d
ttSHORT	drivers/video/stb_truetype.h	/^   static stbtt_int16 ttSHORT(const stbtt_uint8 *p)   { return p[0]*256 + p[1]; }$/;"	f	typeref:typename:stbtt_int16
ttULONG	drivers/video/stb_truetype.h	/^   #define ttULONG(/;"	d
ttULONG	drivers/video/stb_truetype.h	/^   static stbtt_uint32 ttULONG(const stbtt_uint8 *p)  { return (p[0]<<24) + (p[1]<<16) + (p[2]<</;"	f	typeref:typename:stbtt_uint32
ttUSHORT	drivers/video/stb_truetype.h	/^   #define ttUSHORT(/;"	d
ttUSHORT	drivers/video/stb_truetype.h	/^   static stbtt_uint16 ttUSHORT(const stbtt_uint8 *p) { return p[0]*256 + p[1]; }$/;"	f	typeref:typename:stbtt_uint16
tt_ceil	drivers/video/console_truetype.c	/^static int tt_ceil(double val)$/;"	f	typeref:typename:int	file:
tt_fabs	drivers/video/console_truetype.c	/^static double tt_fabs(double x)$/;"	f	typeref:typename:double	file:
tt_floor	drivers/video/console_truetype.c	/^static int tt_floor(double val)$/;"	f	typeref:typename:int	file:
tt_info	drivers/usb/host/xhci.h	/^	__le32	tt_info;$/;"	m	struct:xhci_slot_ctx	typeref:typename:__le32
tt_needed	drivers/usb/musb-new/musb_host.c	/^static int tt_needed(struct musb *musb, struct usb_device *dev)$/;"	f	typeref:typename:int	file:
tt_sqrt	drivers/video/console_truetype.c	/^static double tt_sqrt(double value)$/;"	f	typeref:typename:double	file:
ttag	drivers/net/xilinx_ll_temac.h	/^	u32 ttag;	\/* Transmit VLAN Tag *\/$/;"	m	struct:temac_reg	typeref:typename:u32
ttbhltcr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	ttbhltcr[4];	\/* Thread Time Base Halt Control Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32[4]
ttc0	arch/arm/dts/zynq-7000.dtsi	/^		ttc0: timer@f8001000 {$/;"	l	label:amba
ttc0	arch/arm/dts/zynqmp.dtsi	/^		ttc0: timer@ff110000 {$/;"	l
ttc1	arch/arm/dts/zynq-7000.dtsi	/^		ttc1: timer@f8002000 {$/;"	l	label:amba
ttc1	arch/arm/dts/zynqmp.dtsi	/^		ttc1: timer@ff120000 {$/;"	l
ttc2	arch/arm/dts/zynqmp.dtsi	/^		ttc2: timer@ff130000 {$/;"	l
ttc3	arch/arm/dts/zynqmp.dtsi	/^		ttc3: timer@ff140000 {$/;"	l
ttctrl	arch/m68k/include/asm/immap_5329.h	/^	u32 ttctrl;		\/* 0x15C Host TT Asynchronous Buffer Control *\/$/;"	m	struct:usb_otg	typeref:typename:u32
ttemp	include/commproc.h	/^	ulong	ttemp;		\/* Tx temp *\/$/;"	m	struct:hdlc_pram_s	typeref:typename:ulong
ttemp	include/usb/mpc8xx_udc.h	/^	ulong ttemp;	\/* Tx temp *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ulong
ttgr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int ttgr;		\/* offset 0x44 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
ttgr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 ttgr;	\/* 0x30 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
ttgr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 ttgr;		\/* 0x30 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
ttgr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 ttgr;		\/* 0x44 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
ttgr	drivers/serial/atmel_usart.h	/^	u32	ttgr;$/;"	m	struct:atmel_usart3	typeref:typename:u32
ttgr	drivers/timer/omap-timer.c	/^	unsigned int ttgr;		\/* offset 0x44 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
ttl	drivers/block/fsl_sata.h	/^	__le32 ttl;		\/* Total transfer length *\/$/;"	m	struct:cmd_hdr_entry	typeref:typename:__le32
ttl	drivers/qe/uec.h	/^	u32  ttl;              \/* temporary variable handled by QE *\/$/;"	m	struct:uec_scheduler	typeref:typename:u32
ttlcr0	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32	ttlcr0;	\/* 0x820 Transition Tracking Loop Ctrl 0 *\/$/;"	m	struct:ccsr_serdes::__anon245f04be0608	typeref:typename:u32
ttlcr0	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32	ttlcr0;	\/* 0x820 Transition Tracking Loop Ctrl 0 *\/$/;"	m	struct:ccsr_serdes::__anon58ea331d0608	typeref:typename:u32
ttlcr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	ttlcr0;	\/* 0x820 Transition Tracking Loop Ctrl 0 *\/$/;"	m	struct:serdes_corenet::__anondcd7518a0808	typeref:typename:u32
ttlcr0	arch/powerpc/include/asm/immap_85xx.h	/^		u32	ttlcr0;	\/* Transition Tracking Loop Ctrl 0 *\/$/;"	m	struct:serdes_corenet::serdes_lane	typeref:typename:u32
tty_stdio	scripts/kconfig/conf.c	/^static int tty_stdio;$/;"	v	typeref:typename:int	file:
tu_size	drivers/video/tegra124/sor.h	/^	u32	tu_size;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
tucse	drivers/net/e1000.h	/^			uint16_t tucse;	\/* TCP checksum end *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345160a::__anon7fc273451708	typeref:typename:uint16_t
tucso	drivers/net/e1000.h	/^			uint8_t tucso;	\/* TCP checksum offset *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345160a::__anon7fc273451708	typeref:typename:uint8_t
tucss	drivers/net/e1000.h	/^			uint8_t tucss;	\/* TCP checksum start *\/$/;"	m	struct:e1000_context_desc::__anon7fc27345160a::__anon7fc273451708	typeref:typename:uint8_t
tue	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 tue;$/;"	m	struct:at91_emac	typeref:typename:u32
tund	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tund;		\/* TX Undersize Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
tund	arch/powerpc/include/asm/immap_86xx.h	/^	uint	tund;		\/* 0x24728 - Transmit Undersize Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
tund	include/fsl_dtsec.h	/^	u32	tund;		\/* Transmit undersize frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
tund	include/tsec.h	/^	u32	tund;		\/* Transmit Undersize Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
tune-$(CONFIG_ARM64)	arch/arm/Makefile	/^tune-$(CONFIG_ARM64)		=$/;"	m
tune-$(CONFIG_CPU_ARM1136)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_ARM1136)	=$/;"	m
tune-$(CONFIG_CPU_ARM1176)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_ARM1176)	=$/;"	m
tune-$(CONFIG_CPU_ARM720T)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_ARM720T)	=-mtune=arm7tdmi$/;"	m
tune-$(CONFIG_CPU_ARM920T)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_ARM920T)	=$/;"	m
tune-$(CONFIG_CPU_ARM926EJS)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_ARM926EJS)	=$/;"	m
tune-$(CONFIG_CPU_ARM946ES)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_ARM946ES)	=$/;"	m
tune-$(CONFIG_CPU_PXA)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_PXA)		=-mcpu=xscale$/;"	m
tune-$(CONFIG_CPU_SA1100)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_SA1100)	=-mtune=strongarm1100$/;"	m
tune-$(CONFIG_CPU_V7)	arch/arm/Makefile	/^tune-$(CONFIG_CPU_V7)		=$/;"	m
tune-y	arch/arm/Makefile	/^tune-y := $(tune-y)$/;"	m
tune_rcvn	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t tune_rcvn;$/;"	m	struct:mrc_params	typeref:typename:uint32_t
tune_train_params	drivers/ddr/marvell/a38x/ddr_topology_def.h	/^struct tune_train_params {$/;"	s
turbo	arch/x86/include/asm/speedstep.h	/^	struct sst_state turbo;$/;"	m	struct:sst_params	typeref:struct:sst_state
turbo_enable	arch/x86/cpu/turbo.c	/^void turbo_enable(void)$/;"	f	typeref:typename:void
turbo_get_state	arch/x86/cpu/turbo.c	/^int turbo_get_state(void)$/;"	f	typeref:typename:int
turbo_state_desc	arch/x86/cpu/turbo.c	/^static const char *const turbo_state_desc[] = {$/;"	v	typeref:typename:const char * const[]	file:
turn_around	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned turn_around;$/;"	m	struct:aemif_config	typeref:typename:unsigned
turn_leds_off	board/bct-brettl2/bct-brettl2.c	/^static void turn_leds_off(void)$/;"	f	typeref:typename:void	file:
turn_off_all_dsps	arch/arm/mach-keystone/keystone.c	/^static void turn_off_all_dsps(int num_dsps)$/;"	f	typeref:typename:void	file:
tusb_dma_omap	drivers/usb/musb-new/musb_dma.h	/^#define tusb_dma_omap(/;"	d
tv_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	tv_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
tv_nsec	fs/ubifs/ubifs.h	/^	long	tv_nsec;	\/* nanoseconds *\/$/;"	m	struct:timespec	typeref:typename:long
tv_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	tv_option;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
tv_sec	fs/ubifs/ubifs.h	/^	time_t	tv_sec;		\/* seconds *\/$/;"	m	struct:timespec	typeref:typename:time_t
tv_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	tv_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
tv_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	tv_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
tvd_clk_reg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 tvd_clk_reg;	\/* 0x128 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
tvd_clk_reg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 tvd_clk_reg;	\/* 0x128 *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
tvdetgp_int_start_stop_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 tvdetgp_int_start_stop_x;		\/* 0xB0 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
tvdetgp_int_start_stop_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 tvdetgp_int_start_stop_y;		\/* 0xB4 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
tve0	arch/arm/dts/sun5i-r8.dtsi	/^		tve0: tv-encoder@01c0a000 {$/;"	l
tve0_in_tcon0	arch/arm/dts/sun5i-r8.dtsi	/^				tve0_in_tcon0: endpoint@0 {$/;"	l	label:tve0
tvr	include/fsl_usb.h	/^	u32	tvr;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
tw47wt	arch/powerpc/include/asm/immap_86xx.h	/^	uint    tw47wt;         \/* 0x24144 - TxBD Rings 4-7 round-robin weightings *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
twaitsr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 twaitsr;$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
twaitsr0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	twaitsr0;	\/* Thread Wait Status Register *\/$/;"	m	struct:ccsr_rcpm	typeref:typename:u32
twbah	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t twbah;$/;"	m	struct:paace	typeref:typename:uint32_t
twc	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 twc;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
twcr	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 twcr;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
twcsr0	drivers/watchdog/xilinx_tb_wdt.c	/^	u32 twcsr0; \/* 0x0 *\/$/;"	m	struct:watchdog_regs	typeref:typename:u32	file:
twcsr1	drivers/watchdog/xilinx_tb_wdt.c	/^	u32 twcsr1; \/* 0x4 *\/$/;"	m	struct:watchdog_regs	typeref:typename:u32	file:
twer	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int twer;		\/* offset 0x34 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
twer	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 twer;	\/* 0x20 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
twer	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 twer;		\/* 0x20 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
twer	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 twer;		\/* 0x34 rw *\/$/;"	m	struct:gptimer	typeref:typename:u32
twer	drivers/timer/omap-timer.c	/^	unsigned int twer;		\/* offset 0x34 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
twi0_clk	arch/arm/dts/at91sam9260.dtsi	/^					twi0_clk: twi0_clk {$/;"	l
twi0_clk	arch/arm/dts/at91sam9261.dtsi	/^					twi0_clk: twi0_clk {$/;"	l
twi0_clk	arch/arm/dts/at91sam9263.dtsi	/^					twi0_clk: twi0_clk {$/;"	l
twi0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					twi0_clk: twi0_clk {$/;"	l
twi0_clk	arch/arm/dts/sama5d2.dtsi	/^					twi0_clk: twi0_clk@29 {$/;"	l
twi1_clk	arch/arm/dts/at91sam9g45.dtsi	/^					twi1_clk: twi1_clk {$/;"	l
twi1_clk	arch/arm/dts/sama5d2.dtsi	/^					twi1_clk: twi1_clk@30 {$/;"	l
twi_regs	drivers/i2c/adi_i2c.c	/^struct twi_regs {$/;"	s	file:
twin_tmp1	arch/sparc/cpu/leon2/start.S	/^#define twin_tmp1 /;"	d	file:
twin_tmp1	arch/sparc/cpu/leon3/start.S	/^#define twin_tmp1 /;"	d	file:
twindie_ddr3	board/freescale/p1010rdb/p1010rdb.c	/^	u8 twindie_ddr3;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
twl	drivers/power/twl6030.c	/^static struct twl6030_data *twl;$/;"	v	typeref:struct:twl6030_data *	file:
twl4030_i2c_read_u8	include/twl4030.h	/^static inline int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)$/;"	f	typeref:typename:int
twl4030_i2c_write_u8	include/twl4030.h	/^static inline int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)$/;"	f	typeref:typename:int
twl4030_input_charger	drivers/input/twl4030.c	/^int twl4030_input_charger(void)$/;"	f	typeref:typename:int
twl4030_input_power_button	drivers/input/twl4030.c	/^int twl4030_input_power_button(void)$/;"	f	typeref:typename:int
twl4030_input_usb	drivers/input/twl4030.c	/^int twl4030_input_usb(void)$/;"	f	typeref:typename:int
twl4030_keypad_key	drivers/input/twl4030.c	/^int twl4030_keypad_key(unsigned char *matrix, u8 c, u8 r)$/;"	f	typeref:typename:int
twl4030_keypad_scan	drivers/input/twl4030.c	/^int twl4030_keypad_scan(unsigned char *matrix)$/;"	f	typeref:typename:int
twl4030_led_init	drivers/misc/twl4030_led.c	/^void twl4030_led_init(unsigned char ledon_mask)$/;"	f	typeref:typename:void
twl4030_phy_power	drivers/usb/phy/twl4030.c	/^static void twl4030_phy_power(void)$/;"	f	typeref:typename:void	file:
twl4030_pmrecv_vsel_cfg	drivers/power/twl4030.c	/^void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,$/;"	f	typeref:typename:void
twl4030_power_init	drivers/power/twl4030.c	/^void twl4030_power_init(void)$/;"	f	typeref:typename:void
twl4030_power_mmc_init	drivers/power/twl4030.c	/^void twl4030_power_mmc_init(int dev_index)$/;"	f	typeref:typename:void
twl4030_power_off	drivers/power/twl4030.c	/^void twl4030_power_off(void)$/;"	f	typeref:typename:void
twl4030_power_reset_init	drivers/power/twl4030.c	/^void twl4030_power_reset_init(void)$/;"	f	typeref:typename:void
twl4030_regulator_set_mode	board/nokia/rx51/rx51.c	/^static void twl4030_regulator_set_mode(u8 id, u8 mode)$/;"	f	typeref:typename:void	file:
twl4030_usb_ldo_init	drivers/usb/phy/twl4030.c	/^static void twl4030_usb_ldo_init(void)$/;"	f	typeref:typename:void	file:
twl4030_usb_read	drivers/usb/phy/twl4030.c	/^static int twl4030_usb_read(u8 address)$/;"	f	typeref:typename:int	file:
twl4030_usb_ulpi_init	drivers/usb/phy/twl4030.c	/^int twl4030_usb_ulpi_init(void)$/;"	f	typeref:typename:int
twl4030_usb_write	drivers/usb/phy/twl4030.c	/^static int twl4030_usb_write(u8 address, u8 data)$/;"	f	typeref:typename:int	file:
twl6030	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct pmic_data twl6030 = {$/;"	v	typeref:struct:pmic_data
twl6030_4430es1	arch/arm/cpu/armv7/omap4/hw_data.c	/^struct pmic_data twl6030_4430es1 = {$/;"	v	typeref:struct:pmic_data
twl6030_data	include/twl6030.h	/^struct twl6030_data{$/;"	s
twl6030_get_battery_current	drivers/power/twl6030.c	/^int twl6030_get_battery_current(void)$/;"	f	typeref:typename:int
twl6030_get_battery_voltage	drivers/power/twl6030.c	/^int twl6030_get_battery_voltage(void)$/;"	f	typeref:typename:int
twl6030_gpadc_read_channel	drivers/power/twl6030.c	/^static int twl6030_gpadc_read_channel(u8 channel_no)$/;"	f	typeref:typename:int	file:
twl6030_gpadc_sw2_trigger	drivers/power/twl6030.c	/^static int twl6030_gpadc_sw2_trigger(void)$/;"	f	typeref:typename:int	file:
twl6030_i2c_read_u8	include/twl6030.h	/^static inline int twl6030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)$/;"	f	typeref:typename:int
twl6030_i2c_write_u8	include/twl6030.h	/^static inline int twl6030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)$/;"	f	typeref:typename:int
twl6030_info	drivers/power/twl6030.c	/^static struct twl6030_data twl6030_info = {$/;"	v	typeref:struct:twl6030_data	file:
twl6030_init_battery_charging	drivers/power/twl6030.c	/^void twl6030_init_battery_charging(void)$/;"	f	typeref:typename:void
twl6030_input_charger	drivers/input/twl6030.c	/^int twl6030_input_charger(void)$/;"	f	typeref:typename:int
twl6030_input_power_button	drivers/input/twl6030.c	/^int twl6030_input_power_button(void)$/;"	f	typeref:typename:int
twl6030_input_usb	drivers/input/twl6030.c	/^int twl6030_input_usb(void)$/;"	f	typeref:typename:int
twl6030_power_mmc_init	drivers/power/twl6030.c	/^void twl6030_power_mmc_init(int dev_index)$/;"	f	typeref:typename:void
twl6030_power_off	drivers/power/twl6030.c	/^void twl6030_power_off(void)$/;"	f	typeref:typename:void
twl6030_start_usb_charging	drivers/power/twl6030.c	/^void twl6030_start_usb_charging(void)$/;"	f	typeref:typename:void
twl6030_stop_usb_charging	drivers/power/twl6030.c	/^void twl6030_stop_usb_charging(void)$/;"	f	typeref:typename:void
twl6030_usb_device_settings	drivers/power/twl6030.c	/^void twl6030_usb_device_settings()$/;"	f	typeref:typename:void
twl6032_info	drivers/power/twl6030.c	/^static struct twl6030_data twl6032_info = {$/;"	v	typeref:struct:twl6030_data	file:
twl603x_audio_power	drivers/power/palmas.c	/^int twl603x_audio_power(u8 on)$/;"	f	typeref:typename:int
twl603x_chip_type	include/twl6030.h	/^enum twl603x_chip_type{$/;"	g
twl603x_enable_bb_charge	drivers/power/palmas.c	/^int twl603x_enable_bb_charge(u8 bb_fields)$/;"	f	typeref:typename:int
twl603x_mmc1_set_ldo9	drivers/power/palmas.c	/^int twl603x_mmc1_set_ldo9(u8 vsel)$/;"	f	typeref:typename:int
twl_i2c_lock	board/nokia/rx51/rx51.c	/^static unsigned long int twl_i2c_lock;$/;"	v	typeref:typename:unsigned long int	file:
twl_wd_time	board/nokia/rx51/rx51.c	/^static unsigned long int twl_wd_time; \/* last time of watchdog reset *\/$/;"	v	typeref:typename:unsigned long int	file:
two_plane_read	include/linux/mtd/nand.h	/^	u8 two_plane_read;$/;"	m	struct:nand_onfi_vendor_micron	typeref:typename:u8
twot_en	include/fsl_ddr_sdram.h	/^	unsigned int twot_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
twoticks_delay	drivers/mmc/bcm2835_sdhci.c	/^	uint twoticks_delay;$/;"	m	struct:bcm2835_sdhci_host	typeref:typename:uint	file:
twpc	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int twpc;		\/* offset 0x48 *\/$/;"	m	struct:gptimer	typeref:typename:unsigned int
twpc	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 twpc;	\/* 0x34 r*\/$/;"	m	struct:gptimer	typeref:typename:u32
twpc	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 twpc;		\/* 0x34 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
twpc	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 twpc;		\/* 0x48 r *\/$/;"	m	struct:gptimer	typeref:typename:u32
twpc	drivers/timer/omap-timer.c	/^	unsigned int twpc;		\/* offset 0x48 *\/$/;"	m	struct:omap_gptimer_regs	typeref:typename:unsigned int	file:
twr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	twr;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
twr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 twr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
twr	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 twr;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
twr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 twr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
twr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 twr;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
twr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 twr;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
twr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 twr;		\/* 0x104 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
twr	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
twr	include/ddr_spd.h	/^	unsigned char twr;         \/* 36 Write Recovery time tWR *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
twr	include/spd.h	/^	unsigned char twr;         \/* 36 Write Recovery time tWR *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
twr_mask_table	drivers/ddr/marvell/a38x/ddr3_training_db.c	/^u8 twr_mask_table[] = {$/;"	v	typeref:typename:u8[]
twr_min	include/ddr_spd.h	/^	unsigned char twr_min;         \/* 17 Min Write REcovery Time *\/$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
twr_ps	include/common_timing_params.h	/^	unsigned int twr_ps;	\/* maximum = 63750 ps *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
twr_ps	include/fsl_ddr_dimm_params.h	/^	int twr_ps;	\/* maximum = 63750 ps *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tws_ce	include/configs/inka4x0.h	/^static inline void tws_ce(unsigned bit)$/;"	f	typeref:typename:void
tws_clk	include/configs/inka4x0.h	/^static inline void tws_clk(unsigned bit)$/;"	f	typeref:typename:void
tws_data	include/configs/inka4x0.h	/^static inline void tws_data(unsigned bit)$/;"	f	typeref:typename:void
tws_data_config_output	include/configs/inka4x0.h	/^static inline void tws_data_config_output(unsigned output)$/;"	f	typeref:typename:void
tws_data_read	include/configs/inka4x0.h	/^static inline unsigned tws_data_read(void)$/;"	f	typeref:typename:unsigned
tws_read	drivers/twserial/soft_tws.c	/^int tws_read(uchar *buffer, int len)$/;"	f	typeref:typename:int
tws_wr	include/configs/inka4x0.h	/^static inline void tws_wr(unsigned bit)$/;"	f	typeref:typename:void
tws_write	drivers/twserial/soft_tws.c	/^int tws_write(uchar *buffer, int len)$/;"	f	typeref:typename:int
twsi0	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 twsi0;	\/*0x02c*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
twsi1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 twsi1;	\/*0x06c*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
twsi_calc_freq	drivers/i2c/mvtwsi.c	/^static uint twsi_calc_freq(const int n, const int m)$/;"	f	typeref:typename:uint	file:
twsi_get_base	drivers/i2c/mvtwsi.c	/^static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)$/;"	f	typeref:struct:mvtwsi_registers *	file:
twsi_i2c_init	drivers/i2c/mvtwsi.c	/^static void twsi_i2c_init(struct i2c_adapter *adap, int speed,$/;"	f	typeref:typename:void	file:
twsi_i2c_probe	drivers/i2c/mvtwsi.c	/^static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)$/;"	f	typeref:typename:int	file:
twsi_i2c_read	drivers/i2c/mvtwsi.c	/^static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
twsi_i2c_set_bus_speed	drivers/i2c/mvtwsi.c	/^static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:uint	file:
twsi_i2c_write	drivers/i2c/mvtwsi.c	/^static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,$/;"	f	typeref:typename:int	file:
twsi_recv	drivers/i2c/mvtwsi.c	/^static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,$/;"	f	typeref:typename:int	file:
twsi_reset	drivers/i2c/mvtwsi.c	/^static void twsi_reset(struct mvtwsi_registers *twsi)$/;"	f	typeref:typename:void	file:
twsi_send	drivers/i2c/mvtwsi.c	/^static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,$/;"	f	typeref:typename:int	file:
twsi_start	drivers/i2c/mvtwsi.c	/^static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,$/;"	f	typeref:typename:int	file:
twsi_stop	drivers/i2c/mvtwsi.c	/^static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)$/;"	f	typeref:typename:int	file:
twsi_wait	drivers/i2c/mvtwsi.c	/^static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,$/;"	f	typeref:typename:int	file:
twtr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 twtr;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
twtr	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 twtr;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
twtr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 twtr;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
twtr	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 twtr;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
twtr	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 twtr;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
twtr	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 twtr;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
twtr	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 twtr;		\/* 0x108 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
twtr	include/ddr_spd.h	/^	unsigned char twtr;        \/* 37 Int write to read delay tWTR *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
twtr	include/spd.h	/^	unsigned char twtr;        \/* 37 Int write to read delay tWTR *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
twtr_min	include/ddr_spd.h	/^	unsigned char twtr_min;        \/* 26 Min Internal Write to$/;"	m	struct:ddr3_spd_eeprom_s	typeref:typename:unsigned char
twtr_ps	include/common_timing_params.h	/^	unsigned int twtr_ps;	\/* maximum = 63750 ps *\/$/;"	m	struct:__anon844677010108	typeref:typename:unsigned int
twtr_ps	include/fsl_ddr_dimm_params.h	/^	int twtr_ps;	\/* maximum = 63750 ps *\/$/;"	m	struct:dimm_params_s	typeref:typename:int
tx	arch/arm/include/asm/arch-lpc32xx/uart.h	/^		u32 tx;		\/* Transmitter FIFO		*\/$/;"	m	union:hsuart_regs::__anon336bcd84010a	typeref:typename:u32
tx	arch/powerpc/include/asm/immap_85xx.h	/^	u32	tx;		\/* eSPI transmit FIFO access *\/$/;"	m	struct:ccsr_espi	typeref:typename:u32
tx	arch/powerpc/include/asm/mpc8xxx_spi.h	/^	u32 tx;		\/* transmit register *\/$/;"	m	struct:spi8xxx	typeref:typename:u32
tx	arch/powerpc/include/asm/ppc4xx-emac.h	/^    volatile mal_desc_t *tx;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:volatile mal_desc_t *
tx	drivers/i2c/lpc32xx_i2c.c	/^		u32 tx;$/;"	m	union:lpc32xx_i2c_registers::__anon8b454e42010a	typeref:typename:u32	file:
tx	drivers/net/ftgmac100.h	/^	unsigned int	tx;		\/* 0xa0 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
tx	drivers/net/xilinx_ll_temac_sdma.c	/^	struct cdmac_bd tx[TX_BUF_CNT];$/;"	m	struct:rtx_cdmac_bd	typeref:struct:cdmac_bd[]	file:
tx	drivers/serial/serial_sh.h	/^	unsigned short rx, tx; \/* GPIO bit no *\/$/;"	m	struct:__anonb38103520108	typeref:typename:unsigned short
tx	drivers/serial/serial_uniphier.c	/^#define tx /;"	d	file:
tx	drivers/spi/armada100_spi.c	/^	const void *tx;$/;"	m	struct:armd_spi_slave	typeref:typename:const void *	file:
tx	drivers/spi/designware_spi.c	/^	void *tx;$/;"	m	struct:dw_spi_priv	typeref:typename:void *	file:
tx	drivers/spi/omap3_spi.c	/^	unsigned int tx;		\/* 0x38, 0x4C, 0x60, 0x74 *\/$/;"	m	struct:mcspi_channel	typeref:typename:unsigned int	file:
tx	drivers/spi/pic32_spi.c	/^	const void		*tx;$/;"	m	struct:pic32_spi_priv	typeref:typename:const void *	file:
tx	drivers/usb/musb-new/musb_gadget.h	/^	u8 tx;			\/* endpoint direction *\/$/;"	m	struct:musb_request	typeref:typename:u8
tx	include/linux/immap_qe.h	/^	u8 tx[0x400];$/;"	m	struct:sir	typeref:typename:u8[0x400]
tx	include/usbdevice.h	/^	struct urb_link tx;	\/* urbs ready to transmit *\/$/;"	m	struct:usb_endpoint_instance	typeref:struct:urb_link
tx0	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 tx0;$/;"	m	struct:ssi	typeref:typename:u32
tx1	arch/m68k/include/asm/coldfire/ssi.h	/^	u32 tx1;$/;"	m	struct:ssi	typeref:typename:u32
tx1	drivers/net/ne2000_base.h	/^	int tx1, tx2;		\/* Page numbers for Tx buffers *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx127	drivers/qe/uec.h	/^	u32 tx127;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
tx127	include/linux/immap_qe.h	/^	u32 tx127;		\/* Total number of frames (including bad$/;"	m	struct:ucc_ethernet	typeref:typename:u32
tx1_key	drivers/net/ne2000_base.h	/^	u32 tx1_key, tx2_key;	\/* Used to ack when packet sent *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:u32
tx1_len	drivers/net/ne2000_base.h	/^	int tx1_len, tx2_len;$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx2	drivers/net/ne2000_base.h	/^	int tx1, tx2;		\/* Page numbers for Tx buffers *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx255	drivers/qe/uec.h	/^	u32 tx255;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
tx255	include/linux/immap_qe.h	/^	u32 tx255;		\/* Total number of frames (including bad$/;"	m	struct:ucc_ethernet	typeref:typename:u32
tx2_key	drivers/net/ne2000_base.h	/^	u32 tx1_key, tx2_key;	\/* Used to ack when packet sent *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:u32
tx2_len	drivers/net/ne2000_base.h	/^	int tx1_len, tx2_len;$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx64	drivers/qe/uec.h	/^	u32 tx64;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
tx64	include/linux/immap_qe.h	/^	u32 tx64;		\/* Total number of frames (including bad$/;"	m	struct:ucc_ethernet	typeref:typename:u32
txBd	drivers/qe/uec.h	/^	volatile qe_bd_t		*txBd;$/;"	m	struct:uec_private	typeref:typename:volatile qe_bd_t *
txIdx	arch/m68k/include/asm/fec.h	/^	uint txIdx;$/;"	m	struct:fec_info_s	typeref:typename:uint
txIdx	arch/m68k/include/asm/fsl_mcdmafec.h	/^	uint txIdx;$/;"	m	struct:fec_info_dma	typeref:typename:uint
txIdx	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static uint txIdx;	\/* index of the current TX buffer *\/$/;"	v	typeref:typename:uint	file:
txIdx	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static uint txIdx;      \/* index of the current TX buffer *\/$/;"	v	typeref:typename:uint	file:
txIdx	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^static uint txIdx;	\/* index of the current TX buffer *\/$/;"	v	typeref:typename:uint	file:
txIdx	arch/powerpc/cpu/mpc8xx/fec.c	/^static uint txIdx;	\/* index of the current TX buffer *\/$/;"	v	typeref:typename:uint	file:
txIdx	arch/powerpc/cpu/mpc8xx/scc.c	/^static uint txIdx;	\/* index of the current TX buffer *\/$/;"	v	typeref:typename:uint	file:
txIdx	drivers/net/bfin_mac.c	/^static u16 txIdx;		\/* index of the current RX buffer *\/$/;"	v	typeref:typename:u16	file:
txIdx	post/cpu/mpc8xx/ether.c	/^static uint txIdx;		\/* index of the current TX buffer *\/$/;"	v	typeref:typename:uint	file:
txInit	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 txInit;		\/* DMA Transmit Initiator *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
txPri	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 txPri;		\/* DMA Transmit Priority *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
txRingSize	drivers/net/dc2114x.c	/^static char txRingSize;$/;"	v	typeref:typename:char	file:
txTask	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 txTask;		\/* DMA Transmit Task Number *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
tx_1023_l	include/fsl_memac.h	/^	u32	tx_1023_l;	\/* Tx 512 to 1023 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_1023_u	include/fsl_memac.h	/^	u32	tx_1023_u;	\/* Tx 512 to 1023 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_127_l	include/fsl_memac.h	/^	u32	tx_127_l;	\/* Tx 65 to 127 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_127_u	include/fsl_memac.h	/^	u32	tx_127_u;	\/* Tx 65 to 127 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_1518_l	include/fsl_memac.h	/^	u32	tx_1518_l;	\/* Tx 1024 to 1518 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_1518_u	include/fsl_memac.h	/^	u32	tx_1518_u;	\/* Tx 1024 to 1518 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_1519_l	include/fsl_memac.h	/^	u32	tx_1519_l;	\/* Tx 1519 to max oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_1519_u	include/fsl_memac.h	/^	u32	tx_1519_u;	\/* Tx 1519 to max oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_255_l	include/fsl_memac.h	/^	u32	tx_255_l;	\/* Tx 128 to 255 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_255_u	include/fsl_memac.h	/^	u32	tx_255_u;	\/* Tx 128 to 255 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_511_l	include/fsl_memac.h	/^	u32	tx_511_l;	\/* Tx 256 to 511 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_511_u	include/fsl_memac.h	/^	u32	tx_511_u;	\/* Tx 256 to 511 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_64_l	include/fsl_memac.h	/^	u32	tx_64_l;	\/* Tx 64 oct packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_64_u	include/fsl_memac.h	/^	u32	tx_64_u;	\/* Tx 64 oct packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_aborted_errors	include/linux/netdevice.h	/^	unsigned long	tx_aborted_errors;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_ack	common/xyzModem.c	/^  bool crc_mode, at_eof, tx_ack;$/;"	m	struct:__anonf7b88f8b0108	typeref:typename:bool	file:
tx_almost_empty_threshold	drivers/net/altera_tse.h	/^	u32 tx_almost_empty_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
tx_almost_full_threshold	drivers/net/altera_tse.h	/^	u32 tx_almost_full_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
tx_attributes	include/usbdevice.h	/^	int tx_attributes;	\/* copy of bmAttributes from endpoint descriptor *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
tx_bcbdata0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_bcbdata0;			\/* 0x206 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_bcbdata0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_bcbdata0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_bcbdata1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_bcbdata1;			\/* 0x207 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_bcbdata1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_bcbdata1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_bd	drivers/net/zynq_gem.c	/^	struct emac_bd *tx_bd;$/;"	m	struct:zynq_gem_priv	typeref:struct:emac_bd *	file:
tx_bd_ring	drivers/net/fm/fm.h	/^	void *tx_bd_ring;		\/* Tx BD ring base *\/$/;"	m	struct:fm_eth	typeref:typename:void *
tx_bd_ring_len	drivers/qe/uec.h	/^	u16				tx_bd_ring_len;$/;"	m	struct:uec_info	typeref:typename:u16
tx_bd_ring_offset	drivers/qe/uec.h	/^	u32				tx_bd_ring_offset;$/;"	m	struct:uec_private	typeref:typename:u32
tx_brd_l	include/fsl_memac.h	/^	u32	tx_brd_l;	\/* Tx broadcast frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_brd_l	include/fsl_tgec.h	/^	u32	tx_brd_l;	\/* Tx broadcast frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_brd_u	include/fsl_memac.h	/^	u32	tx_brd_u;	\/* Tx broadcast frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_brd_u	include/fsl_tgec.h	/^	u32	tx_brd_u;	\/* Tx broadcast frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_buf	arch/powerpc/cpu/mpc8260/i2c.c	/^	unsigned char *tx_buf;	\/* pointer to free Tx area    *\/$/;"	m	struct:i2c_state	typeref:typename:unsigned char *	file:
tx_buf	arch/powerpc/cpu/mpc8xx/i2c.c	/^	unsigned char *tx_buf;	\/* pointer to free Tx area    *\/$/;"	m	struct:i2c_state	typeref:typename:unsigned char *	file:
tx_buf	drivers/net/bcm-sf2-eth.h	/^	uint8_t *tx_buf;$/;"	m	struct:eth_dma	typeref:typename:uint8_t *
tx_buf	drivers/spi/zynq_qspi.c	/^	const void *tx_buf;$/;"	m	struct:zynq_qspi_priv	typeref:typename:const void *	file:
tx_buf	drivers/tpm/tpm_tis_st33zp24_spi.c	/^	u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE];$/;"	m	struct:st33zp24_spi_phy	typeref:typename:u8[]	file:
tx_buf	post/cpu/ppc4xx/ether.c	/^static char *tx_buf;$/;"	v	typeref:typename:char *	file:
tx_buf1	drivers/net/ne2000_base.h	/^	int tx_buf1, tx_buf2;$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx_buf2	drivers/net/ne2000_base.h	/^	int tx_buf1, tx_buf2;$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx_buf_addr0	drivers/net/eepro100.c	/^	volatile u32 tx_buf_addr0;	\/* void *, frame to be transmitted.  *\/$/;"	m	struct:TxFD	typeref:typename:volatile u32	file:
tx_buf_addr1	drivers/net/eepro100.c	/^	volatile u32 tx_buf_addr1;	\/* void *, frame to be transmitted.  *\/$/;"	m	struct:TxFD	typeref:typename:volatile u32	file:
tx_buf_ptr	drivers/net/uli526x.c	/^	char *tx_buf_ptr;		\/* Data for us *\/$/;"	m	struct:tx_desc	typeref:typename:char *	file:
tx_buf_size0	drivers/net/eepro100.c	/^	volatile s32 tx_buf_size0;	\/* Length of Tx frame. *\/$/;"	m	struct:TxFD	typeref:typename:volatile s32	file:
tx_buf_size1	drivers/net/eepro100.c	/^	volatile s32 tx_buf_size1;	\/* Length of Tx frame. *\/$/;"	m	struct:TxFD	typeref:typename:volatile s32	file:
tx_buffer	drivers/net/macb.c	/^	void			*tx_buffer;$/;"	m	struct:macb_device	typeref:typename:void *	file:
tx_buffer	drivers/net/rtl8139.c	/^static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));$/;"	v	typeref:typename:unsigned char[]	file:
tx_burst_size	drivers/ddr/marvell/a38x/ddr3_training_ip.h	/^	u8 tx_burst_size;$/;"	m	struct:pattern_info	typeref:typename:u8
tx_byte	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	tx_byte_func tx_byte;$/;"	m	struct:pei_data	typeref:typename:tx_byte_func
tx_byte	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	tx_byte_func tx_byte;$/;"	m	struct:pei_data	typeref:typename:tx_byte_func
tx_byte	drivers/i2c/mxc_i2c.c	/^static int tx_byte(struct mxc_i2c_bus *i2c_bus, u8 byte)$/;"	f	typeref:typename:int	file:
tx_byte_func	arch/x86/include/asm/arch-broadwell/pei_data.h	/^typedef void asmlinkage (*tx_byte_func)(unsigned char byte);$/;"	t	typeref:typename:void asmlinkage (*)(unsigned char byte)
tx_byte_func	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^typedef asmlinkage void (*tx_byte_func)(unsigned char byte);$/;"	t	typeref:typename:asmlinkage void (*)(unsigned char byte)
tx_bytes	drivers/net/mvpp2.c	/^	u64	tx_bytes;$/;"	m	struct:mvpp2_pcpu_stats	typeref:typename:u64	file:
tx_bytes	include/linux/netdevice.h	/^	unsigned long	tx_bytes;		\/* total bytes transmitted	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_carrier_errors	include/linux/netdevice.h	/^	unsigned long	tx_carrier_errors;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_cbd	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile cbd_t *tx_cbd[TX_RING_SIZE];$/;"	v	typeref:typename:volatile cbd_t * []	file:
tx_ch	arch/arm/include/asm/ti-common/keystone_nav.h	/^	struct tx_chan_regs	*tx_ch;$/;"	m	struct:pktdma_cfg	typeref:struct:tx_chan_regs *
tx_ch_num	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			tx_ch_num;$/;"	m	struct:pktdma_cfg	typeref:typename:u32
tx_chain	drivers/net/calxedaxgmac.c	/^	struct xgmac_dma_desc tx_chain[TX_NUM_DESC];$/;"	m	struct:calxeda_eth_dev	typeref:struct:xgmac_dma_desc[]	file:
tx_chain	drivers/net/sun8i_emac.c	/^	struct emac_dma_desc tx_chain[CONFIG_RX_DESCR_NUM];$/;"	m	struct:emac_eth_dev	typeref:struct:emac_dma_desc[]	file:
tx_chan	drivers/net/cpsw.c	/^	struct cpdma_chan		rx_chan, tx_chan;$/;"	m	struct:cpsw_priv	typeref:struct:cpdma_chan	file:
tx_chan_regs	arch/arm/include/asm/ti-common/keystone_nav.h	/^struct tx_chan_regs {$/;"	s
tx_channel	arch/arm/include/asm/arch-tegra/ivc.h	/^	struct tegra_ivc_channel_header *tx_channel;$/;"	m	struct:tegra_ivc	typeref:struct:tegra_ivc_channel_header *
tx_channel	drivers/usb/musb-new/musb_core.h	/^	struct dma_channel	*tx_channel;$/;"	m	struct:musb_hw_ep	typeref:struct:dma_channel *
tx_chnl_ctrl	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_chnl_ctrl;     \/* TX Channel Control *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_chnl_sts	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_chnl_sts;      \/* TX Status Register *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_clock	drivers/qe/uccf.h	/^	qe_clock_e	tx_clock;$/;"	m	struct:ucc_fast_info	typeref:typename:qe_clock_e
tx_cmd_pt	include/dataflash.h	/^	unsigned char *tx_cmd_pt;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned char *
tx_cmd_size	include/dataflash.h	/^	unsigned int tx_cmd_size;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned int
tx_cmd_stat	drivers/net/altera_tse.h	/^	u32 tx_cmd_stat;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
tx_cnp_l	include/fsl_memac.h	/^	u32	tx_cnp_l;	\/* Tx control packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_cnp_u	include/fsl_memac.h	/^	u32	tx_cnp_u;	\/* Tx control packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_cntrs	include/vsc9953.h	/^	struct vsc9953_tx_cntrs	tx_cntrs;$/;"	m	struct:vsc9953_sys_stat	typeref:struct:vsc9953_tx_cntrs
tx_coalesce_usecs	include/linux/ethtool.h	/^	__u32	tx_coalesce_usecs;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_coalesce_usecs_high	include/linux/ethtool.h	/^	__u32	tx_coalesce_usecs_high;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_coalesce_usecs_irq	include/linux/ethtool.h	/^	__u32	tx_coalesce_usecs_irq;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_coalesce_usecs_low	include/linux/ethtool.h	/^	__u32	tx_coalesce_usecs_low;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_common	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	tx_common;$/;"	m	struct:rk3288_edp	typeref:typename:u32
tx_common2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	tx_common2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
tx_complete	drivers/usb/gadget/ether.c	/^static void tx_complete(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:void	file:
tx_compressed	include/linux/netdevice.h	/^	unsigned long	tx_compressed;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_config	drivers/net/natsemi.c	/^static unsigned int tx_config;$/;"	v	typeref:typename:unsigned int	file:
tx_config	drivers/net/ns8382x.c	/^static unsigned int tx_config;$/;"	v	typeref:typename:unsigned int	file:
tx_control	arch/blackfin/include/asm/mach-common/bits/spi6xx.h	/^	u32 tx_control;$/;"	m	struct:bfin_spi_regs	typeref:typename:u32
tx_ct	drivers/usb/gadget/mpc8xx_udc.c	/^static int tx_ct = 0;$/;"	v	typeref:typename:int	file:
tx_ctl0	drivers/net/sunxi_emac.c	/^	u32 tx_ctl0;	\/* 0x0c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_ctl1	drivers/net/sunxi_emac.c	/^	u32 tx_ctl1;	\/* 0x10 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_ctr	board/gdsys/common/cmd_ioloop.c	/^unsigned long long tx_ctr;$/;"	v	typeref:typename:unsigned long long
tx_curbuf_addr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_curbuf_addr;   \/* TX Current Buffer Address *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_curbuf_length	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_curbuf_length; \/* TX Current Buffer Length *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_curdesc_ptr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_curdesc_ptr;   \/* TX Current Descriptor Pointer *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_currdesc	drivers/net/calxedaxgmac.c	/^	u32 tx_currdesc;$/;"	m	struct:calxeda_eth_dev	typeref:typename:u32	file:
tx_currdescnum	drivers/net/ag7xxx.c	/^	u32			tx_currdescnum;$/;"	m	struct:ar7xxx_eth_priv	typeref:typename:u32	file:
tx_currdescnum	drivers/net/designware.h	/^	u32 tx_currdescnum;$/;"	m	struct:dw_eth_dev	typeref:typename:u32
tx_currdescnum	drivers/net/sun8i_emac.c	/^	u32 tx_currdescnum;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
tx_data	arch/arm/mach-exynos/include/mach/spi.h	/^	unsigned int		tx_data;	\/* 0x18 *\/$/;"	m	struct:exynos_spi	typeref:typename:unsigned int
tx_data	drivers/spi/tegra114_spi.c	/^	u32 tx_data;	\/* 018:SPI_TX_DATA register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
tx_data	drivers/spi/tegra210_qspi.c	/^	u32 tx_data;	\/* 018:QSPI_TX_DATA register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
tx_data_offset	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	uint16_t tx_data_offset;$/;"	m	struct:ldpaa_eth_priv	typeref:typename:uint16_t
tx_data_pt	include/dataflash.h	/^	unsigned char *tx_data_pt;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned char *
tx_data_size	include/dataflash.h	/^	unsigned int tx_data_size;$/;"	m	struct:_AT91S_DataflashDesc	typeref:typename:unsigned int
tx_de_emphasis	drivers/usb/dwc3/core.h	/^	unsigned		tx_de_emphasis:2;$/;"	m	struct:dwc3	typeref:typename:unsigned:2
tx_de_emphasis	include/dwc3-uboot.h	/^	unsigned tx_de_emphasis;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
tx_de_emphasis_quirk	drivers/usb/dwc3/core.h	/^	unsigned		tx_de_emphasis_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
tx_de_emphasis_quirk	include/dwc3-uboot.h	/^	unsigned tx_de_emphasis_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
tx_desc	drivers/net/altera_tse.h	/^	void *tx_desc;$/;"	m	struct:altera_tse_priv	typeref:typename:void *
tx_desc	drivers/net/armada100_fec.h	/^struct tx_desc {$/;"	s
tx_desc	drivers/net/bcm-sf2-eth.h	/^	void *tx_desc;$/;"	m	struct:eth_dma	typeref:typename:void *
tx_desc	drivers/net/lpc32xx_eth.c	/^	ATTRS(4) struct lpc32xx_eth_txdesc tx_desc[TX_BUF_COUNT];$/;"	m	struct:lpc32xx_eth_buffers	typeref:struct:lpc32xx_eth_txdesc[]	file:
tx_desc	drivers/net/pch_gbe.h	/^	struct pch_gbe_tx_desc tx_desc[PCH_GBE_DESC_NUM];$/;"	m	struct:pch_gbe_priv	typeref:struct:pch_gbe_tx_desc[]
tx_desc	drivers/net/uli526x.c	/^struct tx_desc {$/;"	s	file:
tx_desc	drivers/usb/eth/r8152.h	/^struct tx_desc {$/;"	s
tx_desc_addr	drivers/net/eepro100.c	/^	volatile u32 tx_desc_addr;	\/* Always points to the tx_buf_addr element. *\/$/;"	m	struct:TxFD	typeref:typename:volatile u32	file:
tx_desc_aligned	drivers/net/bcm-sf2-eth.h	/^	void *tx_desc_aligned;$/;"	m	struct:eth_dma	typeref:typename:void *
tx_desc_alloc	drivers/net/sh_eth.h	/^	struct tx_desc_s *tx_desc_alloc;$/;"	m	struct:sh_eth_info	typeref:struct:tx_desc_s *
tx_desc_base	drivers/net/sh_eth.h	/^	struct tx_desc_s *tx_desc_base;$/;"	m	struct:sh_eth_info	typeref:struct:tx_desc_s *
tx_desc_cur	drivers/net/sh_eth.h	/^	struct tx_desc_s *tx_desc_cur;$/;"	m	struct:sh_eth_info	typeref:struct:tx_desc_s *
tx_desc_idx	drivers/net/dwc_eth_qos.c	/^	int tx_desc_idx, rx_desc_idx;$/;"	m	struct:eqos_priv	typeref:typename:int	file:
tx_desc_p	drivers/net/greth.h	/^	volatile unsigned int tx_desc_p;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
tx_desc_p	include/grlib/greth.h	/^	volatile unsigned int tx_desc_p;$/;"	m	struct:_greth_regs	typeref:typename:volatile unsigned int
tx_desc_s	drivers/net/sh_eth.h	/^struct tx_desc_s {$/;"	s
tx_descriptor	drivers/net/ep93xx_eth.h	/^struct tx_descriptor {$/;"	s
tx_descriptor	drivers/net/tsi108_eth.c	/^static struct dma_descriptor tx_descriptor __attribute__ ((aligned(32)));$/;"	v	typeref:struct:dma_descriptor	file:
tx_descriptor_queue	drivers/net/ep93xx_eth.h	/^struct tx_descriptor_queue {$/;"	s
tx_descs	drivers/net/dwc_eth_qos.c	/^	struct eqos_desc *tx_descs;$/;"	m	struct:eqos_priv	typeref:struct:eqos_desc *	file:
tx_descs	drivers/net/mvneta.c	/^	struct mvneta_tx_desc *tx_descs;$/;"	m	struct:buffer_location	typeref:struct:mvneta_tx_desc *	file:
tx_descs	drivers/net/mvpp2.c	/^	struct mvpp2_tx_desc *tx_descs;$/;"	m	struct:buffer_location	typeref:struct:mvpp2_tx_desc *	file:
tx_descs_init	drivers/net/designware.c	/^static void tx_descs_init(struct dw_eth_dev *priv)$/;"	f	typeref:typename:void	file:
tx_descs_init	drivers/net/sun8i_emac.c	/^static void tx_descs_init(struct emac_eth_dev *priv)$/;"	f	typeref:typename:void	file:
tx_destination	include/gdsys_fpga.h	/^	u16 tx_destination;$/;"	m	struct:ihs_fpga_channel	typeref:typename:u16
tx_diag_regs	drivers/net/tsi108_eth.c	/^#define tx_diag_regs(/;"	d	file:
tx_diag_regs	drivers/net/tsi108_eth.c	/^static void tx_diag_regs (unsigned int base)$/;"	f	typeref:typename:void	file:
tx_dma_buf	drivers/net/dwc_eth_qos.c	/^	void *tx_dma_buf;$/;"	m	struct:eqos_priv	typeref:typename:void *	file:
tx_dma_st	drivers/net/pch_gbe.h	/^	u32 tx_dma_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_done	drivers/net/smc91111.c	/^#define tx_done(/;"	d	file:
tx_double_buffered	drivers/usb/musb-new/musb_core.h	/^	bool			tx_double_buffered;$/;"	m	struct:musb_hw_ep	typeref:typename:bool
tx_dq	drivers/net/ep93xx_eth.h	/^	struct tx_descriptor_queue	tx_dq;$/;"	m	struct:ep93xx_priv	typeref:struct:tx_descriptor_queue
tx_dr	drivers/serial/serial_stm32x7.h	/^	u32 tx_dr;$/;"	m	struct:stm32_usart	typeref:typename:u32
tx_dropped	include/linux/netdevice.h	/^	unsigned long	tx_dropped;		\/* no space available in linux	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_dsc_base	drivers/net/pch_gbe.h	/^	u32 tx_dsc_base;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_dsc_hw_p	drivers/net/pch_gbe.h	/^	u32 tx_dsc_hw_p;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_dsc_hw_p_hld	drivers/net/pch_gbe.h	/^	u32 tx_dsc_hw_p_hld;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_dsc_size	drivers/net/pch_gbe.h	/^	u32 tx_dsc_size;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_dsc_sw_p	drivers/net/pch_gbe.h	/^	u32 tx_dsc_sw_p;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_ecol_fail	drivers/net/ftgmac100.h	/^	unsigned int	tx_ecol_fail;	\/* 0xa8 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
tx_end	drivers/spi/designware_spi.c	/^	void *tx_end;$/;"	m	struct:dw_spi_priv	typeref:typename:void *	file:
tx_end	drivers/spi/pic32_spi.c	/^	const void		*tx_end;$/;"	m	struct:pic32_spi_priv	typeref:typename:const void *	file:
tx_endpoint	drivers/serial/usbtty.c	/^static unsigned short tx_endpoint = 0;$/;"	v	typeref:typename:unsigned short	file:
tx_eoct_l	include/fsl_memac.h	/^	u32	tx_eoct_l;	\/* Tx ethernet octests lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_eoct_u	include/fsl_memac.h	/^	u32	tx_eoct_u;	\/* Tx ethernet octests upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_err_index	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tx_err_index;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
tx_err_log	arch/powerpc/include/asm/ppc4xx-emac.h	/^	short tx_err_log[MAX_ERR_LOG];$/;"	m	struct:emac_stats_st	typeref:typename:short[]
tx_errors	drivers/net/greth.c	/^		    tx_underrun_errors, tx_limit_errors, tx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
tx_errors	include/linux/netdevice.h	/^	unsigned long	tx_errors;		\/* packet transmit problems	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_fid	drivers/net/pch_gbe.h	/^	u32 tx_fid;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_fifo	arch/arm/include/asm/arch-tegra/tegra_i2c.h	/^	u32 tx_fifo;$/;"	m	struct:i2c_control	typeref:typename:u32
tx_fifo	drivers/serial/serial_xuartlite.c	/^	unsigned int tx_fifo;$/;"	m	struct:uartlite	typeref:typename:unsigned int	file:
tx_fifo	drivers/spi/pic32_spi.c	/^	void (*tx_fifo)(struct pic32_spi_priv *);$/;"	m	struct:pic32_spi_priv	typeref:typename:void (*)(struct pic32_spi_priv *)	file:
tx_fifo	drivers/spi/tegra114_spi.c	/^	u32 tx_fifo;	\/* 108:SPI_FIFO1 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
tx_fifo	drivers/spi/tegra20_sflash.c	/^	u32 tx_fifo;	\/* SPI_TX_FIFO_0 register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
tx_fifo	drivers/spi/tegra20_slink.c	/^	u32 tx_fifo;	\/* SLINK_TX_FIFO_0 reg off 100h *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
tx_fifo	drivers/spi/tegra210_qspi.c	/^	u32 tx_fifo;	\/* 108:QSPI_FIFO1 register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
tx_fifo_depth	drivers/net/altera_tse.h	/^	unsigned int tx_fifo_depth;$/;"	m	struct:altera_tse_priv	typeref:typename:unsigned int
tx_fifo_errors	include/linux/netdevice.h	/^	unsigned long	tx_fifo_errors;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_fifo_resize	include/dwc3-uboot.h	/^	unsigned tx_fifo_resize:1;$/;"	m	struct:dwc3_device	typeref:typename:unsigned:1
tx_fifo_st	drivers/net/pch_gbe.h	/^	u32 tx_fifo_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_fifo_sz	include/usb/dwc2_udc.h	/^	unsigned int	tx_fifo_sz;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
tx_fill_tuning	arch/arm/include/asm/arch-tegra/usb.h	/^	uint tx_fill_tuning;$/;"	m	struct:usb_ctlr	typeref:typename:uint
tx_flow	drivers/net/sunxi_emac.c	/^	u32 tx_flow;	\/* 0x08 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_flow_id	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	uint16_t tx_flow_id;$/;"	m	struct:ldpaa_eth_priv	typeref:typename:uint16_t
tx_frag_l	include/fsl_tgec.h	/^	u32	tx_frag_l;	\/* Fragment packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_frag_u	include/fsl_tgec.h	/^	u32	tx_frag_u;	\/* Fragment packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_frame_crc_err_l	include/fsl_memac.h	/^	u32	tx_frame_crc_err_l; \/* Tx frame check sequence error lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_frame_crc_err_u	include/fsl_memac.h	/^	u32	tx_frame_crc_err_u; \/* Tx frame check sequence error upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_frame_ctrl	drivers/net/pch_gbe.h	/^	u16 tx_frame_ctrl;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u16
tx_frame_err_l	include/fsl_memac.h	/^	u32	tx_frame_err_l;	\/* Tx frame error lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_frame_err_l	include/fsl_tgec.h	/^	u32	tx_frame_err_l;	\/* Tx frame error lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_frame_err_u	include/fsl_memac.h	/^	u32	tx_frame_err_u;	\/* Tx frame error upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_frame_err_u	include/fsl_tgec.h	/^	u32	tx_frame_err_u;	\/* Tx frame error upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_frame_l	include/fsl_memac.h	/^	u32	tx_frame_l;	\/* Tx frame counter lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_frame_l	include/fsl_tgec.h	/^	u32	tx_frame_l;	\/* Tx frame counter lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_frame_u	include/fsl_memac.h	/^	u32	tx_frame_u;	\/* Tx frame counter upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_frame_u	include/fsl_tgec.h	/^	u32	tx_frame_u;	\/* Tx frame counter upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_glbl_pram_offset	drivers/qe/uec.h	/^	u32				tx_glbl_pram_offset;$/;"	m	struct:uec_private	typeref:typename:u32
tx_gydata0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_gydata0;			\/* 0x202 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_gydata0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_gydata0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_gydata1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_gydata1;			\/* 0x203 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_gydata1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_gydata1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_head	drivers/net/macb.c	/^	unsigned int		tx_head;$/;"	m	struct:macb_device	typeref:typename:unsigned int	file:
tx_heartbeat_errors	include/linux/netdevice.h	/^	unsigned long	tx_heartbeat_errors;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_i_index	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tx_i_index;	\/* Transmit Interrupt Queue Index *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
tx_id_delay	drivers/net/phy/ti.c	/^	int tx_id_delay;$/;"	m	struct:dp83867_private	typeref:typename:int	file:
tx_idx	arch/powerpc/cpu/mpc8260/i2c.c	/^	int tx_idx;		\/* index   to next free Tx BD *\/$/;"	m	struct:i2c_state	typeref:typename:int	file:
tx_idx	arch/powerpc/cpu/mpc8xx/i2c.c	/^	int tx_idx;		\/* index   to next free Tx BD *\/$/;"	m	struct:i2c_state	typeref:typename:int	file:
tx_idx	drivers/net/pch_gbe.h	/^	int tx_idx;$/;"	m	struct:pch_gbe_priv	typeref:typename:int
tx_idx	drivers/net/xilinx_ll_temac_sdma.c	/^static unsigned int tx_idx;	\/* index of the current TX buffer *\/$/;"	v	typeref:typename:unsigned int	file:
tx_idx	include/tsec.h	/^	uint tx_idx;	\/* index of the current TX buffer *\/$/;"	m	struct:tsec_private	typeref:typename:uint
tx_index	drivers/net/ftgmac100.c	/^	int tx_index;$/;"	m	struct:ftgmac100_data	typeref:typename:int	file:
tx_info	drivers/usb/host/xhci.h	/^	__le32	tx_info;$/;"	m	struct:xhci_ep_ctx	typeref:typename:__le32
tx_ins	drivers/net/sunxi_emac.c	/^	u32 tx_ins;	\/* 0x14 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_insert_ptr	drivers/net/uli526x.c	/^	struct tx_desc *tx_insert_ptr;$/;"	m	struct:uli526x_board_info	typeref:struct:tx_desc *	file:
tx_instuffing	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_instuffing;		\/* 0x201 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_instuffing	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_instuffing;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_int	drivers/net/ne2000_base.h	/^	int tx_int;		\/* Expecting interrupt from this buffer *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx_invid0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_invid0;			\/* 0x200 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_invid0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_invid0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_io_data	drivers/net/sunxi_emac.c	/^	u32 tx_io_data;	\/* 0x24 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_io_data1	drivers/net/sunxi_emac.c	/^	u32 tx_io_data1;\/* 0x28 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_ipg_length	include/fsl_memac.h	/^	u32	tx_ipg_length;	\/* Transmitter inter-packet-gap register *\/$/;"	m	struct:memac	typeref:typename:u32
tx_ipg_length	include/fsl_tgec.h	/^	u32	tx_ipg_length;	\/* Transmitter inter-packet-gap register *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_irq_reg	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_irq_reg;       \/* TX Interrupt Register *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_jabber_l	include/fsl_tgec.h	/^	u32	tx_jabber_l;	\/* Jabber packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_jabber_u	include/fsl_tgec.h	/^	u32	tx_jabber_u;	\/* Jabber packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_latecol_errors	drivers/net/greth.c	/^		    tx_latecol_errors,$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
tx_lcol_und	drivers/net/ftgmac100.h	/^	unsigned int	tx_lcol_und;	\/* 0xac *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
tx_limit_errors	drivers/net/greth.c	/^		    tx_underrun_errors, tx_limit_errors, tx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
tx_mac_descrtable	drivers/net/ag7xxx.c	/^	struct ag7xxx_dma_desc	tx_mac_descrtable[CONFIG_TX_DESCR_NUM];$/;"	m	struct:ar7xxx_eth_priv	typeref:struct:ag7xxx_dma_desc[]	file:
tx_mac_descrtable	drivers/net/designware.h	/^	struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];$/;"	m	struct:dw_eth_dev	typeref:struct:dmamacdescr[]
tx_max	drivers/spi/designware_spi.c	/^static inline u32 tx_max(struct dw_spi_priv *priv)$/;"	f	typeref:typename:u32	file:
tx_max_coalesced_frames	include/linux/ethtool.h	/^	__u32	tx_max_coalesced_frames;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_max_coalesced_frames_high	include/linux/ethtool.h	/^	__u32	tx_max_coalesced_frames_high;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_max_coalesced_frames_irq	include/linux/ethtool.h	/^	__u32	tx_max_coalesced_frames_irq;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_max_coalesced_frames_low	include/linux/ethtool.h	/^	__u32	tx_max_coalesced_frames_low;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
tx_max_pending	include/linux/ethtool.h	/^	__u32	tx_max_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
tx_mcol_scol	drivers/net/ftgmac100.h	/^	unsigned int	tx_mcol_scol;	\/* 0xa4 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
tx_mcol_scol	drivers/net/ftmac100.h	/^	unsigned int	tx_mcol_scol;	\/* 0xd4 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
tx_mode	drivers/net/pch_gbe.h	/^	u32 tx_mode;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_mode	drivers/net/sunxi_emac.c	/^	u32 tx_mode;	\/* 0x04 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_msp_cmd	board/intercontrol/digsy_mtc/cmd_mtc.h	/^} tx_msp_cmd;$/;"	t	typeref:struct:__anonde02bb4d0108
tx_multi_l	include/fsl_memac.h	/^	u32	tx_multi_l;	\/* Tx multicast frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_multi_l	include/fsl_tgec.h	/^	u32	tx_multi_l;	\/* Tx multicast frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_multi_u	include/fsl_memac.h	/^	u32	tx_multi_u;	\/* Tx multicast frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_multi_u	include/fsl_tgec.h	/^	u32	tx_multi_u;	\/* Tx multicast frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_new	drivers/net/dc2114x.c	/^static int tx_new;                             \/* TX descriptor ring pointer *\/$/;"	v	typeref:typename:int	file:
tx_next	drivers/net/eepro100.c	/^static int tx_next;			\/* TX descriptor ring pointer *\/$/;"	v	typeref:typename:int	file:
tx_next	drivers/net/ne2000_base.h	/^	int tx_next;		\/* First free Tx page *\/$/;"	m	struct:dp83902a_priv_data	typeref:typename:int
tx_num	include/power/pmic.h	/^	unsigned char tx_num;$/;"	m	struct:p_i2c	typeref:typename:unsigned char
tx_nxtdesc_ptr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_nxtdesc_ptr;   \/* TX Next Description Pointer *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_oct_l	include/fsl_memac.h	/^	u32	tx_oct_l;	\/* Tx octests lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_oct_l	include/fsl_tgec.h	/^	u32	tx_oct_l;	\/* Tx octets lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_oct_u	include/fsl_memac.h	/^	u32	tx_oct_u;	\/* Tx octests upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_oct_u	include/fsl_tgec.h	/^	u32	tx_oct_u;	\/* Tx octets upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_oversz_l	include/fsl_tgec.h	/^	u32	tx_oversz_l;	\/* oversized packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_oversz_u	include/fsl_tgec.h	/^	u32	tx_oversz_u;	\/* oversized packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_packet	drivers/net/bcm-sf2-eth.h	/^	int (*tx_packet)(struct eth_dma *dma, void *packet, int length);$/;"	m	struct:eth_dma	typeref:typename:int (*)(struct eth_dma * dma,void * packet,int length)
tx_packetSize	include/usbdevice.h	/^	int tx_packetSize;	\/* maximum packet size from endpoint descriptor *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
tx_packet_cnt	drivers/net/uli526x.c	/^	unsigned long tx_packet_cnt;	\/* transmitted packet count *\/$/;"	m	struct:uli526x_board_info	typeref:typename:unsigned long	file:
tx_packets	drivers/net/greth.c	/^		unsigned int tx_packets,$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
tx_packets	drivers/net/mvpp2.c	/^	u64	tx_packets;$/;"	m	struct:mvpp2_pcpu_stats	typeref:typename:u64	file:
tx_packets	include/linux/netdevice.h	/^	unsigned long	tx_packets;		\/* total packets transmitted	*\/$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_pause	drivers/net/cpsw.c	/^	u32	tx_pause;$/;"	m	struct:cpsw_sliver_regs	typeref:typename:u32	file:
tx_pause	include/linux/ethtool.h	/^	__u32	tx_pause;$/;"	m	struct:ethtool_pauseparam	typeref:typename:__u32
tx_pause_frame_l	include/fsl_memac.h	/^	u32	tx_pause_frame_l; \/* Tx valid pause frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_pause_frame_l	include/fsl_tgec.h	/^	u32	tx_pause_frame_l; \/* Tx valid pause frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_pause_frame_u	include/fsl_memac.h	/^	u32	tx_pause_frame_u; \/* Tx valid pause frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_pause_frame_u	include/fsl_tgec.h	/^	u32	tx_pause_frame_u; \/* Tx valid pause frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_pending	include/linux/ethtool.h	/^	__u32	tx_pending;$/;"	m	struct:ethtool_ringparam	typeref:typename:__u32
tx_phys	arch/powerpc/include/asm/ppc4xx-emac.h	/^    u32			tx_phys;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:u32
tx_ping	drivers/net/xilinx_emaclite.c	/^	u32 tx_ping; \/* 0x0 - TX Ping buffer *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
tx_ping_tplr	drivers/net/xilinx_emaclite.c	/^	u32 tx_ping_tplr; \/* 0x7f4 - Tx packet length *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
tx_ping_tsr	drivers/net/xilinx_emaclite.c	/^	u32 tx_ping_tsr; \/* 0x7fc - Tx status *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
tx_pkt_cnt	drivers/net/dm9000x.c	/^	u16 tx_pkt_cnt;$/;"	m	struct:board_info	typeref:typename:u16	file:
tx_pkt_l	include/fsl_memac.h	/^	u32	tx_pkt_l;	\/* Tx packets lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_pkt_u	include/fsl_memac.h	/^	u32	tx_pkt_u;	\/* Tx packets upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_pl0	drivers/net/sunxi_emac.c	/^	u32 tx_pl0;	\/* 0x18 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_pl1	drivers/net/sunxi_emac.c	/^	u32 tx_pl1;	\/* 0x1c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_pong	drivers/net/xilinx_emaclite.c	/^	u32 tx_pong; \/* 0x800 - TX Pong buffer *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
tx_pong_tplr	drivers/net/xilinx_emaclite.c	/^	u32 tx_pong_tplr; \/* 0xff4 - Tx packet length *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
tx_pong_tsr	drivers/net/xilinx_emaclite.c	/^	u32 tx_pong_tsr; \/* 0xffc - Tx status *\/$/;"	m	struct:emaclite_regs	typeref:typename:u32	file:
tx_port	drivers/net/fm/fm.h	/^	struct fm_bmi_tx_port *tx_port;$/;"	m	struct:fm_eth	typeref:struct:fm_bmi_tx_port *
tx_port_id	include/fm_eth.h	/^	u16 tx_port_id;$/;"	m	struct:fm_eth_info	typeref:typename:u16
tx_pram	drivers/net/fm/fm.h	/^	struct fm_port_global_pram *tx_pram; \/* Tx parameter table *\/$/;"	m	struct:fm_eth	typeref:struct:fm_port_global_pram *
tx_pri_map	drivers/net/cpsw.c	/^	u32	tx_pri_map;$/;"	m	struct:cpsw_host_regs	typeref:typename:u32	file:
tx_pri_map	drivers/net/cpsw.c	/^	u32	tx_pri_map;$/;"	m	struct:cpsw_slave_regs	typeref:typename:u32	file:
tx_qdid	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	uint16_t tx_qdid;$/;"	m	struct:ldpaa_eth_priv	typeref:typename:uint16_t
tx_qlen	drivers/usb/gadget/ether.c	/^	unsigned int		tx_qlen;$/;"	m	struct:eth_dev	typeref:typename:unsigned int	file:
tx_queue	include/usbdevice.h	/^	int tx_queue;$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
tx_rcrdata0	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_rcrdata0;			\/* 0x204 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_rcrdata0	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_rcrdata0;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_rcrdata1	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 tx_rcrdata1;			\/* 0x205 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
tx_rcrdata1	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 tx_rcrdata1;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
tx_ref_sel	drivers/pci/pci_tegra.c	/^	unsigned long tx_ref_sel;$/;"	m	struct:tegra_pcie_soc	typeref:typename:unsigned long	file:
tx_reinit	drivers/usb/musb-new/musb_core.h	/^	u8			tx_reinit;$/;"	m	struct:musb_hw_ep	typeref:typename:u8
tx_remove_ptr	drivers/net/uli526x.c	/^	struct tx_desc *tx_remove_ptr;$/;"	m	struct:uli526x_board_info	typeref:struct:tx_desc *	file:
tx_req	drivers/usb/gadget/ether.c	/^	struct usb_request	*tx_req, *rx_req;$/;"	m	struct:eth_dev	typeref:struct:usb_request *	file:
tx_result	drivers/net/pch_gbe.h	/^	u32 tx_result;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
tx_ring	drivers/net/dc2114x.c	/^static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); \/* TX descriptor r/;"	v	typeref:struct:de4x5_desc[]	file:
tx_ring	drivers/net/eepro100.c	/^static struct TxFD tx_ring[NUM_TX_DESC];	\/* TX descriptor ring	      *\/$/;"	v	typeref:struct:TxFD[]	file:
tx_ring	drivers/net/macb.c	/^	struct macb_dma_desc	*tx_ring;$/;"	m	struct:macb_device	typeref:struct:macb_dma_desc *	file:
tx_ring	drivers/net/pcnet.c	/^	struct pcnet_tx_head tx_ring[TX_RING_SIZE];$/;"	m	struct:pcnet_uncached_priv	typeref:struct:pcnet_tx_head[]	file:
tx_ring	drivers/net/pcnet.c	/^	u32 tx_ring;$/;"	m	struct:pcnet_init_block	typeref:typename:u32	file:
tx_ring_dma	drivers/net/macb.c	/^	unsigned long		tx_ring_dma;$/;"	m	struct:macb_device	typeref:typename:unsigned long	file:
tx_ring_size	drivers/net/mvneta.c	/^	u16 tx_ring_size;$/;"	m	struct:mvneta_port	typeref:typename:u16	file:
tx_ring_size	drivers/net/mvpp2.c	/^	u16 tx_ring_size;$/;"	m	struct:mvpp2_port	typeref:typename:u16	file:
tx_run	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tx_run[NUM_TX_BUFF];	\/* Transmit Running Queue *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int[]
tx_rx_fifo	drivers/serial/serial_zynq.c	/^	u32 tx_rx_fifo; \/* 0x30 - FIFO [15:0] or [7:0] *\/$/;"	m	struct:uart_zynq	typeref:typename:u32	file:
tx_sched	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			*tx_sched;$/;"	m	struct:pktdma_cfg	typeref:typename:u32 *
tx_sel_empty_threshold	drivers/net/altera_tse.h	/^	u32 tx_sel_empty_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
tx_sel_full_threshold	drivers/net/altera_tse.h	/^	u32 tx_sel_full_threshold;$/;"	m	struct:alt_tse_mac	typeref:typename:u32
tx_send_loop	drivers/net/davinci_emac.c	/^static int tx_send_loop = 0;$/;"	v	typeref:typename:int	file:
tx_slot	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tx_slot;	\/* MAL Transmit Slot *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
tx_slot	drivers/net/sun8i_emac.c	/^	u32 tx_slot;$/;"	m	struct:emac_eth_dev	typeref:typename:u32	file:
tx_snd_q	arch/arm/include/asm/ti-common/keystone_nav.h	/^	u32			tx_snd_q;$/;"	m	struct:pktdma_cfg	typeref:typename:u32
tx_space	arch/powerpc/cpu/mpc8260/i2c.c	/^	int tx_space;		\/* number  of Tx bytes left   *\/$/;"	m	struct:i2c_state	typeref:typename:int	file:
tx_space	arch/powerpc/cpu/mpc8xx/i2c.c	/^	int tx_space;		\/* number  of Tx bytes left   *\/$/;"	m	struct:i2c_state	typeref:typename:int	file:
tx_sq	drivers/net/ep93xx_eth.h	/^	struct tx_status_queue		tx_sq;$/;"	m	struct:ep93xx_priv	typeref:struct:tx_status_queue
tx_sta	drivers/net/sunxi_emac.c	/^	u32 tx_sta;	\/* 0x20 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_started	drivers/net/ne2000_base.h	/^	bool tx_started, running, hardwired_esa;$/;"	m	struct:dp83902a_priv_data	typeref:typename:bool
tx_stat	drivers/net/lpc32xx_eth.c	/^	ATTRS(4) struct lpc32xx_eth_txstat tx_stat[TX_BUF_COUNT];$/;"	m	struct:lpc32xx_eth_buffers	typeref:struct:lpc32xx_eth_txstat[]	file:
tx_status	drivers/net/ep93xx_eth.h	/^struct tx_status {$/;"	s
tx_status_queue	drivers/net/ep93xx_eth.h	/^struct tx_status_queue {$/;"	s
tx_sw_reset	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	tx_sw_reset;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
tx_tail	drivers/net/e1000.c	/^static int tx_tail;$/;"	v	typeref:typename:int	file:
tx_tail	drivers/net/macb.c	/^	unsigned int		tx_tail;$/;"	m	struct:macb_device	typeref:typename:unsigned int	file:
tx_taildesc_ptr	drivers/net/xilinx_ll_temac_sdma.h	/^	SDMA_CTRL_REGTYPE tx_taildesc_ptr;  \/* TX Tail Descriptor Pointer *\/$/;"	m	struct:sdma_ctrl	typeref:typename:SDMA_CTRL_REGTYPE
tx_threshold	drivers/net/eepro100.c	/^static int tx_threshold;$/;"	v	typeref:typename:int	file:
tx_timeout	drivers/spi/fsl_espi.c	/^	int		tx_timeout;$/;"	m	struct:fsl_spi_slave	typeref:typename:int	file:
tx_transferSize	include/usbdevice.h	/^	int tx_transferSize;	\/* maximum transfer size from function driver *\/$/;"	m	struct:usb_endpoint_instance	typeref:typename:int
tx_tsvh0	drivers/net/sunxi_emac.c	/^	u32 tx_tsvh0;	\/* 0x30 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_tsvh1	drivers/net/sunxi_emac.c	/^	u32 tx_tsvh1;	\/* 0x38 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_tsvl0	drivers/net/sunxi_emac.c	/^	u32 tx_tsvl0;	\/* 0x2c *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_tsvl1	drivers/net/sunxi_emac.c	/^	u32 tx_tsvl1;	\/* 0x34 *\/$/;"	m	struct:emac_regs	typeref:typename:u32	file:
tx_u_index	arch/powerpc/include/asm/ppc4xx-emac.h	/^    int			tx_u_index;		\/* Transmit User Queue Index *\/$/;"	m	struct:emac_4xx_hw_st	typeref:typename:int
tx_underrun_errors	drivers/net/greth.c	/^		    tx_underrun_errors, tx_limit_errors, tx_errors;$/;"	m	struct:__anonb53b88540108::__anonb53b88540208	typeref:typename:unsigned int	file:
tx_undsz_l	include/fsl_memac.h	/^	u32	tx_undsz_l;	\/* Tx undersized packet lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_undsz_l	include/fsl_tgec.h	/^	u32	tx_undsz_l;	\/* Undersized packet lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_undsz_u	include/fsl_memac.h	/^	u32	tx_undsz_u;	\/* Tx undersized packet upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_undsz_u	include/fsl_tgec.h	/^	u32	tx_undsz_u;	\/* Undersized packet upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_uni_l	include/fsl_memac.h	/^	u32	tx_uni_l;	\/* Tx unicast frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_uni_l	include/fsl_tgec.h	/^	u32	tx_uni_l;	\/* Tx unicast frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_uni_u	include/fsl_memac.h	/^	u32	tx_uni_u;	\/* Tx unicast frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_uni_u	include/fsl_tgec.h	/^	u32	tx_uni_u;	\/* Tx unicast frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_urb	include/usbdevice.h	/^	struct urb *tx_urb;	\/* active urb *\/$/;"	m	struct:usb_endpoint_instance	typeref:struct:urb *
tx_version	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	tx_version;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
tx_vlan_l	include/fsl_memac.h	/^	u32	tx_vlan_l;	\/* Tx VLAN frame lower *\/$/;"	m	struct:memac	typeref:typename:u32
tx_vlan_l	include/fsl_tgec.h	/^	u32	tx_vlan_l;	\/* Tx VLAN frame lower *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_vlan_u	include/fsl_memac.h	/^	u32	tx_vlan_u;	\/* Tx VLAN frame upper *\/$/;"	m	struct:memac	typeref:typename:u32
tx_vlan_u	include/fsl_tgec.h	/^	u32	tx_vlan_u;	\/* Tx VLAN frame upper *\/$/;"	m	struct:tgec	typeref:typename:u32
tx_window_errors	include/linux/netdevice.h	/^	unsigned long	tx_window_errors;$/;"	m	struct:net_device_stats	typeref:typename:unsigned long
tx_words_eob	drivers/net/pch_gbe.h	/^	u16 tx_words_eob;$/;"	m	struct:pch_gbe_tx_desc	typeref:typename:u16
txasap	drivers/qe/uec.h	/^	u8   txasap;           \/* Transmit ASAP register        *\/$/;"	m	struct:uec_scheduler	typeref:typename:u8
txb	drivers/i2c/lpc32xx_i2c.c	/^	u32 txb;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
txb	drivers/net/ks8851_mll.c	/^	u8      txb[4];$/;"	m	union:ks_tx_hdr	typeref:typename:u8[4]	file:
txb	drivers/net/natsemi.c	/^static unsigned char txb[TX_BUF_SIZE] __attribute__ ((aligned(4)));$/;"	v	typeref:typename:unsigned char[]	file:
txb	drivers/net/ns8382x.c	/^static unsigned char txb[TX_BUF_SIZE] __attribute__ ((aligned(8)));$/;"	v	typeref:typename:unsigned char[]	file:
txb	include/sja1000.h	/^	u8 txb[10];$/;"	m	struct:sja1000_basic_s	typeref:typename:u8[10]
txba	drivers/net/ftmac110.h	/^	uint32_t txba;   \/* 0x20: Tx Ring Base Address Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
txbd	arch/m68k/include/asm/fec.h	/^	cbd_t *txbd;		\/* Tx BD *\/$/;"	m	struct:fec_info_s	typeref:typename:cbd_t *
txbd	arch/m68k/include/asm/fsl_mcdmafec.h	/^	cbd_t *txbd;		\/* Tx BD *\/$/;"	m	struct:fec_info_dma	typeref:typename:cbd_t *
txbd	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		cbd_t txbd[ELBT_NTXBD];$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:cbd_t[]	file:
txbd	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^    cbd_t txbd[TX_BUF_CNT];$/;"	m	struct:rtxbd	typeref:typename:cbd_t[]	file:
txbd	arch/powerpc/cpu/mpc8260/ether_scc.c	/^    cbd_t txbd[TX_BUF_CNT];        \/* Tx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
txbd	arch/powerpc/cpu/mpc8260/i2c.c	/^	void *txbd;		\/* pointer to next free Tx BD *\/$/;"	m	struct:i2c_state	typeref:typename:void *	file:
txbd	arch/powerpc/cpu/mpc8260/serial_smc.c	/^	cbd_t	txbd;		\/* Tx BD *\/$/;"	m	struct:serialbuffer	typeref:typename:cbd_t	file:
txbd	arch/powerpc/cpu/mpc85xx/ether_fcc.c	/^    cbd_t txbd[TX_BUF_CNT];$/;"	m	struct:rtxbd	typeref:typename:cbd_t[]	file:
txbd	arch/powerpc/cpu/mpc8xx/fec.c	/^    cbd_t txbd[TX_BUF_CNT];		\/* Tx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
txbd	arch/powerpc/cpu/mpc8xx/i2c.c	/^	void *txbd;		\/* pointer to next free Tx BD *\/$/;"	m	struct:i2c_state	typeref:typename:void *	file:
txbd	arch/powerpc/cpu/mpc8xx/scc.c	/^    cbd_t txbd[TX_BUF_CNT];	\/* Tx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
txbd	arch/powerpc/cpu/mpc8xx/serial.c	/^	cbd_t	txbd;		\/* Tx BD *\/$/;"	m	struct:serialbuffer	typeref:typename:cbd_t	file:
txbd	include/tsec.h	/^	struct txbd8 __iomem txbd[TX_BUF_CNT];$/;"	m	struct:tsec_private	typeref:struct:txbd8 __iomem[]
txbd	post/cpu/mpc8xx/ether.c	/^	cbd_t txbd[TX_BUF_CNT];		\/* Tx BD *\/$/;"	m	struct:CommonBufferDescriptor	typeref:typename:cbd_t[]	file:
txbd8	include/tsec.h	/^struct txbd8 {$/;"	s
txbd_base	drivers/net/greth.c	/^	greth_bd *txbd_base, *txbd_max;$/;"	m	struct:__anonb53b88540108	typeref:typename:greth_bd *	file:
txbd_max	drivers/net/greth.c	/^	greth_bd *txbd_base, *txbd_max;$/;"	m	struct:__anonb53b88540108	typeref:typename:greth_bd *	file:
txbistpd	drivers/block/sata_dwc.c	/^	u32 txbistpd;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
txbistpd1	drivers/block/sata_dwc.c	/^	u32 txbistpd1;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
txbistpd2	drivers/block/sata_dwc.c	/^	u32 txbistpd2;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
txbuf	arch/arm/include/asm/arch-tegra/usb.h	/^	uint txbuf;$/;"	m	struct:usb_ctlr	typeref:typename:uint
txbuf	arch/m68k/include/asm/fec.h	/^	char *txbuf;$/;"	m	struct:fec_info_s	typeref:typename:char *
txbuf	arch/m68k/include/asm/fsl_mcdmafec.h	/^	char *txbuf;$/;"	m	struct:fec_info_dma	typeref:typename:char *
txbuf	arch/mips/mach-au1x00/au1x00_eth.c	/^static char txbuf[DBUF_LENGTH];$/;"	v	typeref:typename:char[]	file:
txbuf	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static char txbuf[TX_BUF_CNT][PKT_MAXBLR_SIZE] __attribute__ ((aligned(8)));$/;"	v	typeref:typename:char[][]	file:
txbuf	arch/powerpc/cpu/mpc8260/ether_scc.c	/^static char txbuf[TX_BUF_CNT][ DBUF_LENGTH ];$/;"	v	typeref:typename:char[][]	file:
txbuf	arch/powerpc/cpu/mpc8260/serial_smc.c	/^	volatile uchar	txbuf;	\/* tx buffers *\/$/;"	m	struct:serialbuffer	typeref:typename:volatile uchar	file:
txbuf	arch/powerpc/cpu/mpc8260/spi.c	/^static uchar *txbuf =$/;"	v	typeref:typename:uchar *	file:
txbuf	arch/powerpc/cpu/mpc8xx/fec.c	/^static char txbuf[DBUF_LENGTH] __attribute__ ((aligned(8)));$/;"	v	typeref:typename:char[]	file:
txbuf	arch/powerpc/cpu/mpc8xx/scc.c	/^static char txbuf[DBUF_LENGTH];$/;"	v	typeref:typename:char[]	file:
txbuf	arch/powerpc/cpu/mpc8xx/serial.c	/^	volatile uchar	txbuf;	\/* tx buffers *\/$/;"	m	struct:serialbuffer	typeref:typename:volatile uchar	file:
txbuf	arch/powerpc/cpu/mpc8xx/spi.c	/^static uchar *txbuf =$/;"	v	typeref:typename:uchar *	file:
txbuf	drivers/net/bfin_mac.c	/^static ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];$/;"	v	typeref:typename:ADI_ETHER_BUFFER * []	file:
txbuf	drivers/net/greth.c	/^	void *txbuf;$/;"	m	struct:__anonb53b88540108	typeref:typename:void *	file:
txbuf	post/cpu/mpc8xx/ether.c	/^static char txbuf[DBUF_LENGTH];$/;"	v	typeref:typename:char[]	file:
txbuf_ptr	arch/powerpc/include/asm/ppc4xx-emac.h	/^    char		*txbuf_ptr;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:char *
txbufs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uchar txbufs[ELBT_NTXBD][ELBT_BUFSZ];$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:uchar[][]	file:
txbufthrshld	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t txbufthrshld;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
txcdp	drivers/net/armada100_fec.h	/^	struct tx_desc *txcdp[2];	\/* Ethernet Current Tx Descriptor$/;"	m	struct:armdfec_reg	typeref:struct:tx_desc * [2]
txcf	arch/powerpc/include/asm/immap_85xx.h	/^	u32	txcf;		\/* TX Control Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
txcf	arch/powerpc/include/asm/immap_86xx.h	/^	uint	txcf;		\/* 0x24720 - Transmit Control Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
txcf	drivers/qe/uec.h	/^	u16 txcf;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u16
txcf	include/fsl_dtsec.h	/^	u32	txcf;		\/* Transmit control frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
txcf	include/linux/immap_qe.h	/^	u16 txcf;		\/* Total number of PAUSE control frames$/;"	m	struct:ucc_ethernet	typeref:typename:u16
txcf	include/tsec.h	/^	u32	txcf;		\/* Transmit Control Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
txcl	arch/powerpc/include/asm/immap_85xx.h	/^	u32	txcl;		\/* TX Excessive Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
txcl	arch/powerpc/include/asm/immap_86xx.h	/^	uint	txcl;		\/* 0x24708 - Transmit Excessive Collision Packet Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
txcl	include/fsl_dtsec.h	/^	u32	txcl;		\/* Transmit excessive collision *\/$/;"	m	struct:dtsec	typeref:typename:u32
txcl	include/tsec.h	/^	u32	txcl;		\/* Transmit Excessive Collision Packet *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
txcmd	drivers/net/cs8900.h	/^	CS8900_REG txcmd;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
txcollcnt	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t txcollcnt;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
txconsumeindex	drivers/net/lpc32xx_eth.c	/^	u32 txconsumeindex;	\/* tail of rx desc fifo *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
txcsr	drivers/usb/musb-new/musb_core.h	/^	u16 txmaxp, txcsr, rxmaxp, rxcsr;$/;"	m	struct:musb_csr_regs	typeref:typename:u16
txcsr	drivers/usb/musb/musb_core.h	/^	u16	txcsr;$/;"	m	struct:musb_epN_regs	typeref:typename:u16
txcsr	drivers/usb/musb/musb_core.h	/^	u16	txcsr;$/;"	m	struct:musb_regs	typeref:typename:u16
txctl	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t txctl;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
txcw	arch/powerpc/include/asm/ppc4xx-emac.h	/^    uint32_t		txcw;$/;"	m	struct:emac_4xx_hw_st	typeref:typename:uint32_t
txcw	drivers/net/e1000.h	/^	uint32_t txcw;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
txd	drivers/net/ftmac110.c	/^	struct ftmac110_desc *txd;$/;"	m	struct:ftmac110_chip	typeref:struct:ftmac110_desc *	file:
txd	drivers/net/natsemi.c	/^static BufferDesc txd __attribute__ ((aligned(4)));$/;"	v	typeref:typename:BufferDesc	file:
txd	drivers/net/ns8382x.c	/^static BufferDesc txd __attribute__ ((aligned(8)));$/;"	v	typeref:typename:BufferDesc	file:
txd	drivers/serial/serial_mxc.c	/^	u32 txd;$/;"	m	struct:mxc_uart	typeref:typename:u32	file:
txd	include/i2s.h	/^	unsigned int txd;	\/* Transmit data register *\/$/;"	m	struct:i2s_reg	typeref:typename:unsigned int
txd0r	drivers/spi/zynq_qspi.c	/^	u32 txd0r;	\/* 0x1C *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
txd1r	drivers/spi/zynq_qspi.c	/^	u32 txd1r;	\/* 0x80 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
txd2r	drivers/spi/zynq_qspi.c	/^	u32 txd2r;	\/* 0x84 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
txd3r	drivers/spi/zynq_qspi.c	/^	u32 txd3r;	\/* 0x88 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
txd_cmd	drivers/net/e1000.h	/^	uint32_t txd_cmd;$/;"	m	struct:e1000_hw	typeref:typename:uint32_t
txd_dma	drivers/net/ftmac110.c	/^	ulong                txd_dma;$/;"	m	struct:ftmac110_chip	typeref:typename:ulong	file:
txd_idx	drivers/net/ftmac110.c	/^	uint32_t             txd_idx;$/;"	m	struct:ftmac110_chip	typeref:typename:uint32_t	file:
txd_ring	drivers/net/pic32_eth.c	/^	struct eth_dma_desc txd_ring[MAX_TX_DESCR];$/;"	m	struct:pic32eth_dev	typeref:struct:eth_dma_desc[]	file:
txdata	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 txdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
txdata	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 txdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
txdata	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 txdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
txdata	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32 txdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
txdata	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 txdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
txdata	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 txdata;$/;"	m	struct:cspi_regs	typeref:typename:u32
txdata	arch/arm/include/asm/arch-rockchip/i2c.h	/^	u32 txdata[8];$/;"	m	struct:i2c_regs	typeref:typename:u32[8]
txdata	drivers/serial/altera_uart.c	/^	u32	txdata;		\/* Tx data reg *\/$/;"	m	struct:altera_uart_regs	typeref:typename:u32	file:
txdata	drivers/spi/altera_spi.c	/^	u32	txdata;$/;"	m	struct:altera_spi_regs	typeref:typename:u32	file:
txdata	drivers/usb/gadget/f_thor.h	/^	unsigned char txdata;$/;"	m	struct:thor_dev	typeref:typename:unsigned char
txdes	drivers/net/ftgmac100.c	/^	struct ftgmac100_txdes *txdes;$/;"	m	struct:ftgmac100_data	typeref:struct:ftgmac100_txdes *	file:
txdes	drivers/net/ftmac100.c	/^	struct ftmac100_txdes txdes[1];$/;"	m	struct:ftmac100_data	typeref:struct:ftmac100_txdes[1]	file:
txdes0	drivers/net/ftgmac100.h	/^	unsigned int	txdes0;$/;"	m	struct:ftgmac100_txdes	typeref:typename:unsigned int
txdes0	drivers/net/ftmac100.h	/^	unsigned int	txdes0;$/;"	m	struct:ftmac100_txdes	typeref:typename:unsigned int
txdes1	drivers/net/ftgmac100.h	/^	unsigned int	txdes1;$/;"	m	struct:ftgmac100_txdes	typeref:typename:unsigned int
txdes1	drivers/net/ftmac100.h	/^	unsigned int	txdes1;$/;"	m	struct:ftmac100_txdes	typeref:typename:unsigned int
txdes2	drivers/net/ftgmac100.h	/^	unsigned int	txdes2;	\/* not used by HW *\/$/;"	m	struct:ftgmac100_txdes	typeref:typename:unsigned int
txdes2	drivers/net/ftmac100.h	/^	unsigned int	txdes2;	\/* TXBUF_BADR *\/$/;"	m	struct:ftmac100_txdes	typeref:typename:unsigned int
txdes3	drivers/net/ftgmac100.h	/^	unsigned int	txdes3;	\/* TXBUF_BADR *\/$/;"	m	struct:ftgmac100_txdes	typeref:typename:unsigned int
txdes3	drivers/net/ftmac100.h	/^	unsigned int	txdes3;	\/* not used by HW *\/$/;"	m	struct:ftmac100_txdes	typeref:typename:unsigned int
txdes_dma	drivers/net/ftgmac100.c	/^	ulong txdes_dma;$/;"	m	struct:ftgmac100_data	typeref:typename:ulong	file:
txdesclist	drivers/net/calxedaxgmac.c	/^	u32 txdesclist;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
txdesclistaddr	drivers/net/designware.h	/^	u32 txdesclistaddr;	\/* 0x10 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
txdescriptor	drivers/net/lpc32xx_eth.c	/^	u32 txdescriptor;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
txdescriptornumber	drivers/net/lpc32xx_eth.c	/^	u32 txdescriptornumber;	\/* actually, number MINUS ONE *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
txdiv_cnt	arch/blackfin/include/asm/serial4.h	/^	u32 txdiv_cnt;$/;"	m	struct:bfin_mmr_serial	typeref:typename:u32
txdmacfg	drivers/net/bfin_mac.c	/^} txdmacfg = {$/;"	v	typeref:typename:const union __anon82b289e9010a
txdq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct mac_queue txdq;$/;"	m	struct:mac_regs	typeref:struct:mac_queue
txdqenq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t txdqenq;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
txdr	drivers/spi/rk_spi.h	/^	u32 txdr[0x100];	\/* 0x400 *\/$/;"	m	struct:rockchip_spi	typeref:typename:u32[0x100]
txdr	drivers/spi/zynq_spi.c	/^	u32 txdr;	\/* 0x1C *\/$/;"	m	struct:zynq_spi_regs	typeref:typename:u32	file:
txdthrshld	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t txdthrshld;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
txe_uma_enable	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t txe_uma_enable;			\/* Offset 0x004f *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t
txeacc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		elbt_txeacc txeacc;$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:elbt_txeacc	file:
txeacc_descs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static elbt_prdesc txeacc_descs[] = {$/;"	v	typeref:typename:elbt_prdesc[]	file:
txeacc_ndesc	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^static int txeacc_ndesc = ARRAY_SIZE(txeacc_descs);$/;"	v	typeref:typename:int	file:
txep_bitmap	drivers/usb/musb-new/musb_dsps.c	/^	u32		txep_bitmap;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
txep_mask	drivers/usb/musb-new/musb_dsps.c	/^	u32		txep_mask;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
txep_shift	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	txep_shift:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
txerrs	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		ushort rxerrs[ELBT_MAXRXERR], txerrs[ELBT_MAXTXERR];$/;"	m	struct:__anon7d79ed4b0408	typeref:typename:ushort[]	file:
txfifo	arch/arm/include/asm/arch-pxa/regs-mmc.h	/^	uint32_t	txfifo;$/;"	m	struct:pxa_mmc_regs	typeref:typename:uint32_t
txfifoadd	drivers/usb/musb-new/musb_core.h	/^	u16 rxfifoadd, txfifoadd;$/;"	m	struct:musb_csr_regs	typeref:typename:u16
txfifoadd	drivers/usb/musb/musb_core.h	/^	u16	txfifoadd;$/;"	m	struct:musb_regs	typeref:typename:u16
txfifosz	drivers/usb/musb-new/musb_core.h	/^	u8 rxfifosz, txfifosz;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
txfifosz	drivers/usb/musb/musb_core.h	/^	u8	txfifosz;$/;"	m	struct:musb_regs	typeref:typename:u8
txfill	arch/m68k/include/asm/immap_5329.h	/^	u32 txfill;		\/* 0x164 Host Transmit FIFO Tuning Control *\/$/;"	m	struct:usb_otg	typeref:typename:u32
txfilltuning	include/usb/ehci-ci.h	/^	u32	txfilltuning;	\/* 0x164 - Host TT Transmit$/;"	m	struct:usb_ehci	typeref:typename:u32
txfl	drivers/i2c/lpc32xx_i2c.c	/^	u32 txfl;$/;"	m	struct:lpc32xx_i2c_registers	typeref:typename:u32	file:
txflr	drivers/spi/rk_spi.h	/^	u32 txflr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
txfrexcessivedefer	drivers/qe/uec.h	/^	u32  txfrexcessivedefer;$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
txftlr	drivers/spi/rk_spi.h	/^	u32 txftlr;$/;"	m	struct:rockchip_spi	typeref:typename:u32
txftr	drivers/spi/zynq_qspi.c	/^	u32 txftr;	\/* 0x28 *\/$/;"	m	struct:zynq_qspi_regs	typeref:typename:u32	file:
txfunaddr	drivers/usb/musb-new/musb_core.h	/^	u8 txfunaddr, txhubaddr, txhubport;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
txfuncaddr	drivers/usb/musb/musb_core.h	/^		u8	txfuncaddr;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
txglobal	drivers/qe/uec.h	/^	u32  txglobal;				   \/* tx global  *\/$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u32
txh	drivers/net/ks8851_mll.c	/^	union ks_tx_hdr		txh;$/;"	m	struct:ks_net	typeref:union:ks_tx_hdr	file:
txhubaddr	drivers/usb/musb-new/musb_core.h	/^	u8 txfunaddr, txhubaddr, txhubport;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
txhubaddr	drivers/usb/musb/musb_core.h	/^		u8	txhubaddr;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
txhubport	drivers/usb/musb-new/musb_core.h	/^	u8 txfunaddr, txhubaddr, txhubport;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
txhubport	drivers/usb/musb/musb_core.h	/^		u8	txhubport;$/;"	m	struct:musb_regs::musb_tar_regs	typeref:typename:u8
txic	arch/powerpc/include/asm/immap_86xx.h	/^	uint    txic;		\/* 0x24110 - Transmit interrupt coalescing Register *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
txinterval	drivers/usb/musb-new/musb_core.h	/^	u8 txtype, txinterval, rxtype, rxinterval;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
txinterval	drivers/usb/musb/musb_core.h	/^	u8	txinterval;$/;"	m	struct:musb_epN_regs	typeref:typename:u8
txinterval	drivers/usb/musb/musb_core.h	/^	u8	txinterval;$/;"	m	struct:musb_regs	typeref:typename:u8
txlen	drivers/net/cs8900.h	/^	CS8900_REG txlen;$/;"	m	struct:cs8900_regs	typeref:typename:CS8900_REG
txmaxp	drivers/usb/musb-new/musb_core.h	/^	u16 txmaxp, txcsr, rxmaxp, rxcsr;$/;"	m	struct:musb_csr_regs	typeref:typename:u16
txmaxp	drivers/usb/musb/musb_core.h	/^	u16	txmaxp;$/;"	m	struct:musb_epN_regs	typeref:typename:u16
txmaxp	drivers/usb/musb/musb_core.h	/^	u16	txmaxp;$/;"	m	struct:musb_regs	typeref:typename:u16
txmode	drivers/usb/musb/am35x.h	/^	u32	txmode;$/;"	m	struct:am35x_usb_regs	typeref:typename:u32
txok	drivers/qe/uec.h	/^	u32 txok;$/;"	m	struct:uec_hardware_statistics	typeref:typename:u32
txok	include/linux/immap_qe.h	/^	u32 txok;		\/* Total number of octets residing in frames$/;"	m	struct:ucc_ethernet	typeref:typename:u32
txp	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 txp;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
txp	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 txp;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
txp	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 txp;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
txp	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 txp;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
txp	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 txp;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
txp	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 txp;		\/* 0x110 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
txpd	drivers/net/ftgmac100.h	/^	unsigned int	txpd;		\/* 0x18 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
txpd	drivers/net/ftmac100.h	/^	unsigned int	txpd;		\/* 0x18 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
txpd	drivers/net/ftmac110.h	/^	uint32_t txpd;   \/* 0x18: Tx Poll Demand Register *\/$/;"	m	struct:ftmac110_regs	typeref:typename:uint32_t
txpdll	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 txpdll;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
txpdll	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 txpdll;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
txpdll	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 txpdll;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
txpdll	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 txpdll;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
txpdll	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 txpdll;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
txpdll	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 txpdll;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
txpdll	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 txpdll;		\/* 0x114 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
txpf	arch/powerpc/include/asm/immap_85xx.h	/^	u32	txpf;		\/* TX Pause Control Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:u32
txpf	arch/powerpc/include/asm/immap_86xx.h	/^	uint	txpf;		\/* 0x246f0 - Transmit Pause Control Frame Counter *\/$/;"	m	struct:ccsr_tsec	typeref:typename:uint
txpf	include/fsl_dtsec.h	/^	u32	txpf;		\/* Transmit pause control frame *\/$/;"	m	struct:dtsec	typeref:typename:u32
txpf	include/tsec.h	/^	u32	txpf;		\/* Transmit Pause Control Frame *\/$/;"	m	struct:tsec_rmon_mib	typeref:typename:u32
txpkts1024	drivers/qe/uec.h	/^	u32  txpkts1024;         \/* total packets(including bad) 1024~1518B *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
txpkts256	drivers/qe/uec.h	/^	u32  txpkts256;          \/* total packets(including bad) 256~511 B *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
txpkts512	drivers/qe/uec.h	/^	u32  txpkts512;          \/* total packets(including bad) 512~1023B *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
txpktsjumbo	drivers/qe/uec.h	/^	u32  txpktsjumbo;        \/* total packets(including bad)  >1024 *\/$/;"	m	struct:uec_tx_firmware_statistics_pram	typeref:typename:u32
txpoll	drivers/net/calxedaxgmac.c	/^	u32 txpoll;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
txpolldemand	drivers/net/designware.h	/^	u32 txpolldemand;	\/* 0x04 *\/$/;"	m	struct:eth_dma_regs	typeref:typename:u32
txpp	drivers/net/xilinx_emaclite.c	/^	u32 txpp;		\/* TX ping pong buffer *\/$/;"	m	struct:xemaclite	typeref:typename:u32	file:
txproduceindex	drivers/net/lpc32xx_eth.c	/^	u32 txproduceindex;	\/* head of rx desc fifo *\/$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
txq0_debug	drivers/net/dwc_eth_qos.c	/^	uint32_t txq0_debug;				\/* 0xd08 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
txq0_operation_mode	drivers/net/dwc_eth_qos.c	/^	uint32_t txq0_operation_mode;			\/* 0xd00 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
txq0_quantum_weight	drivers/net/dwc_eth_qos.c	/^	uint32_t txq0_quantum_weight;			\/* 0xd18 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
txq_get_index	drivers/net/mvneta.c	/^	int txq_get_index;$/;"	m	struct:mvneta_tx_queue	typeref:typename:int	file:
txq_get_index	drivers/net/mvpp2.c	/^	int txq_get_index;$/;"	m	struct:mvpp2_txq_pcpu	typeref:typename:int	file:
txq_number	drivers/net/mvneta.c	/^static int txq_number = 1;$/;"	v	typeref:typename:int	file:
txq_number	drivers/net/mvpp2.c	/^static int txq_number = MVPP2_DEFAULT_TXQ;$/;"	v	typeref:typename:int	file:
txq_prty_map0	drivers/net/dwc_eth_qos.c	/^	uint32_t txq_prty_map0;				\/* 0x098 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
txq_put_index	drivers/net/mvneta.c	/^	int txq_put_index;$/;"	m	struct:mvneta_tx_queue	typeref:typename:int	file:
txq_put_index	drivers/net/mvpp2.c	/^	int txq_put_index;$/;"	m	struct:mvpp2_txq_pcpu	typeref:typename:int	file:
txqbase	drivers/net/zynq_gem.c	/^	u32 txqbase; \/* 0x1c - TX Q Base address reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
txqd	drivers/net/fm/fm.h	/^	struct fm_port_qd txqd;	\/* Tx queue descriptor *\/$/;"	m	struct:fm_port_global_pram	typeref:struct:fm_port_qd
txqd_ptr	drivers/net/fm/fm.h	/^	u32 txqd_ptr;	\/* Tx queue descriptor pointer *\/$/;"	m	struct:fm_port_global_pram	typeref:typename:u32
txqs	drivers/net/mvneta.c	/^	struct mvneta_tx_queue *txqs;$/;"	m	struct:mvneta_port	typeref:struct:mvneta_tx_queue *	file:
txqs	drivers/net/mvpp2.c	/^	struct mvpp2_tx_queue **txqs;$/;"	m	struct:mvpp2_port	typeref:struct:mvpp2_tx_queue **	file:
txr_badr	drivers/net/ftgmac100.h	/^	unsigned int	txr_badr;	\/* 0x20 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
txr_badr	drivers/net/ftmac100.h	/^	unsigned int	txr_badr;	\/* 0x20 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
txrmonbaseptr	drivers/qe/uec.h	/^	u32  txrmonbaseptr;$/;"	m	struct:uec_tx_global_pram	typeref:typename:u32
txrx_status	drivers/net/designware.h	/^	u32 txrx_status;$/;"	m	struct:dmamacdescr	typeref:typename:u32
txsnr	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 txsnr;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
txsr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^	u32	txsr;$/;"	m	struct:emc_dram_settings	typeref:typename:u32
txsr	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 txsr;		\/* 0x90: EMC_TXSR *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
txsr	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u16 txsr;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u16
txsr	arch/avr32/include/asm/sdram.h	/^	uint8_t cas, twr, trc, trp, trcd, tras, txsr;$/;"	m	struct:sdram_config	typeref:typename:uint8_t
txsr	drivers/net/zynq_gem.c	/^	u32 txsr; \/* 0x14 - TX Status reg *\/$/;"	m	struct:zynq_gem_regs	typeref:typename:u32	file:
txst	drivers/net/pic32_eth.h	/^	struct pic32_reg_atomic txst; \/* 0x20 *\/$/;"	m	struct:pic32_ectl_regs	typeref:struct:pic32_reg_atomic
txstate	drivers/usb/musb-new/musb_gadget.c	/^static void txstate(struct musb *musb, struct musb_request *req)$/;"	f	typeref:typename:void	file:
txstatus	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^	unsigned int txstatus;$/;"	m	struct:sata_pll	typeref:typename:unsigned int	file:
txstatus	drivers/net/lpc32xx_eth.c	/^	u32 txstatus;$/;"	m	struct:lpc32xx_eth_registers	typeref:typename:u32	file:
txstsq	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	struct mac_queue txstsq;$/;"	m	struct:mac_regs	typeref:struct:mac_queue
txststhrshld	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t txststhrshld;$/;"	m	struct:mac_regs	typeref:typename:uint32_t
txthread	drivers/qe/uec.h	/^	u32  txthread[MAX_ENET_INIT_PARAM_ENTRIES_TX]; \/* tx threads *\/$/;"	m	struct:uec_init_cmd_pram	typeref:typename:u32[]
txtype	drivers/usb/musb-new/musb_core.h	/^	u8 txtype, txinterval, rxtype, rxinterval;$/;"	m	struct:musb_csr_regs	typeref:typename:u8
txtype	drivers/usb/musb/musb_core.h	/^	u8	txtype;$/;"	m	struct:musb_epN_regs	typeref:typename:u8
txtype	drivers/usb/musb/musb_core.h	/^	u8	txtype;$/;"	m	struct:musb_regs	typeref:typename:u8
txuptr	include/usb/mpc8xx_udc.h	/^	ushort txuptr;	\/* Tx microcode return address *\/$/;"	m	struct:endpoint_parameter_block_pointer	typeref:typename:ushort
txw	drivers/net/ks8851_mll.c	/^	__le16  txw[2];$/;"	m	union:ks_tx_hdr	typeref:typename:__le16[2]	file:
txzlp	include/usb/fotg210.h	/^	uint32_t txzlp; \/* 0x154: Transfer Zero-Length-Packet Register *\/$/;"	m	struct:fotg210_regs	typeref:typename:uint32_t
typ	include/fdtdec.h	/^	u32 typ;$/;"	m	struct:timing_entry	typeref:typename:u32
typ_len_ext	drivers/net/e1000.h	/^			uint8_t typ_len_ext;	\/* *\/$/;"	m	struct:e1000_data_desc::__anon7fc273451a0a::__anon7fc273451b08	typeref:typename:uint8_t
type	api/api_storage.c	/^	int		type;		\/* "external" type: DT_STOR_{IDE,USB,etc} *\/$/;"	m	struct:stor_spec	typeref:typename:int	file:
type	arch/arm/cpu/arm926ejs/omap/cpuinfo.c	/^	u32	type;		\/* Cpu id bits [31:08], cpu class bits [07:00] *\/$/;"	m	struct:omap_id	typeref:typename:u32	file:
type	arch/arm/include/asm/arch-mx7/clock.h	/^	enum clk_root_type type;$/;"	m	struct:clk_root_map	typeref:enum:clk_root_type
type	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 type;$/;"	m	struct:dram_para	typeref:typename:u32
type	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 type;$/;"	m	struct:dram_para	typeref:typename:u32
type	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t type;$/;"	m	struct:cmd_thermal_query_abi_request	typeref:typename:uint32_t
type	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t type;$/;"	m	struct:mrq_thermal_bpmp_to_host_request	typeref:typename:uint32_t
type	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t type;$/;"	m	struct:mrq_thermal_host_to_bpmp_request	typeref:typename:uint32_t
type	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 type;$/;"	m	struct:dram_para	typeref:typename:u32
type	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 type;$/;"	m	struct:dram_para	typeref:typename:u32
type	arch/arm/include/asm/armv7m.h	/^	uint32_t type;		\/* Type Register *\/$/;"	m	struct:v7m_mpu	typeref:typename:uint32_t
type	arch/arm/include/asm/emif.h	/^	u8	type;$/;"	m	struct:lpddr2_device_details	typeref:typename:u8
type	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	MV_BIN_SERDES_UNIT_INDX type;$/;"	m	struct:serdes_change_m_phy	typeref:typename:MV_BIN_SERDES_UNIT_INDX
type	arch/arm/mach-tegra/xusb-padctl-common.h	/^	unsigned int type;$/;"	m	struct:tegra_xusb_phy	typeref:typename:unsigned int
type	arch/arm/mach-uniphier/boot-mode/boot-device.h	/^	u32 type;$/;"	m	struct:boot_device_info	typeref:typename:u32
type	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 type;$/;"	m	struct:ed	typeref:typename:__u8
type	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 type;$/;"	m	struct:ed	typeref:typename:__u8
type	arch/powerpc/cpu/ppc4xx/reginfo.c	/^	enum REGISTER_TYPE type;$/;"	m	struct:cpu_register	typeref:enum:REGISTER_TYPE	file:
type	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 type;$/;"	m	struct:ed	typeref:typename:__u8
type	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned short	type;$/;"	m	struct:enet_frame	typeref:typename:unsigned short
type	arch/sparc/cpu/leon3/memcfg.h	/^	unsigned char	type;		\/* 0x00. MASK: AHB MST&SLV, APB SLV *\/$/;"	m	struct:grlib_mctrl_handler	typeref:typename:unsigned char
type	arch/x86/cpu/broadwell/refcode.c	/^	uint8_t type;$/;"	m	struct:rmodule_header	typeref:typename:uint8_t	file:
type	arch/x86/include/asm/acpi_table.h	/^	u8 type;		\/* Type (0) *\/$/;"	m	struct:acpi_madt_lapic	typeref:typename:u8
type	arch/x86/include/asm/acpi_table.h	/^	u8 type;		\/* Type (1) *\/$/;"	m	struct:acpi_madt_ioapic	typeref:typename:u8
type	arch/x86/include/asm/acpi_table.h	/^	u8 type;		\/* Type (2) *\/$/;"	m	struct:acpi_madt_irqoverride	typeref:typename:u8
type	arch/x86/include/asm/acpi_table.h	/^	u8 type;		\/* Type (4) *\/$/;"	m	struct:acpi_madt_lapic_nmi	typeref:typename:u8
type	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^		unsigned int type;$/;"	m	struct:sysinfo_t::memrange	typeref:typename:unsigned int
type	arch/x86/include/asm/bootparam.h	/^	__u32 type;$/;"	m	struct:setup_data	typeref:typename:__u32
type	arch/x86/include/asm/coreboot_tables.h	/^	u16 type;$/;"	m	struct:cb_console	typeref:typename:u16
type	arch/x86/include/asm/coreboot_tables.h	/^	u32 type;$/;"	m	struct:cb_cmos_checksum	typeref:typename:u32
type	arch/x86/include/asm/coreboot_tables.h	/^	u32 type;$/;"	m	struct:cb_memory_range	typeref:typename:u32
type	arch/x86/include/asm/coreboot_tables.h	/^	u32 type;$/;"	m	struct:cb_serial	typeref:typename:u32
type	arch/x86/include/asm/e820.h	/^	__u32 type;	\/* type of memory segment *\/$/;"	m	struct:e820entry	typeref:typename:__u32
type	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8			type;$/;"	m	struct:ffs_file_header	typeref:typename:u8
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type	arch/x86/include/asm/fsp/fsp_ffs.h	/^	u8	type;$/;"	m	struct:raw_section2	typeref:typename:u8
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type	arch/x86/include/asm/global_data.h	/^	int type;		\/* MTRR_TYPE_... *\/$/;"	m	struct:mtrr_request	typeref:typename:int
type	arch/x86/include/asm/sfi.h	/^	u32	type;$/;"	m	struct:sfi_mem_entry	typeref:typename:u32
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type	arch/xtensa/include/asm/bootparam.h	/^	unsigned long type;$/;"	m	struct:meminfo	typeref:typename:unsigned long
type	board/ifm/ac14xx/ac14xx.c	/^	u8	type;		\/** type of PCB *\/$/;"	m	struct:eeprom_layout	typeref:typename:u8	file:
type	board/nokia/rx51/tag_omap.h	/^	u8 type:4;$/;"	m	struct:omap_gpio_switch_config	typeref:typename:u8:4
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type	disk/part_mac.h	/^	uchar	type[32];	\/* string type description		*\/$/;"	m	struct:mac_partition	typeref:typename:uchar[32]
type	drivers/bios_emulator/biosemui.h	/^	u8 type;$/;"	m	struct:__anonb186e4ea0308	typeref:typename:u8
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type	drivers/misc/swap_case.c	/^	int type;$/;"	m	struct:pci_bar	typeref:typename:int	file:
type	drivers/mtd/nand/sunxi_nand.c	/^	enum sunxi_nand_rb_type type;$/;"	m	struct:sunxi_nand_rb	typeref:enum:sunxi_nand_rb_type	file:
type	drivers/net/e1000.h	/^e1000_eeprom_type type;$/;"	m	struct:e1000_eeprom_info	typeref:typename:e1000_eeprom_type
type	drivers/net/fm/fm.h	/^	enum fm_eth_type type;		\/* 1G or 10G ethernet *\/$/;"	m	struct:fm_eth	typeref:enum:fm_eth_type
type	drivers/net/ldpaa_eth/ldpaa_eth.h	/^	enum ldpaa_eth_type type;	\/* 1G or 10G ethernet *\/$/;"	m	struct:ldpaa_eth_priv	typeref:enum:ldpaa_eth_type
type	drivers/net/mvpp2.c	/^	enum mvpp2_bm_type type;$/;"	m	struct:mvpp2_bm_pool	typeref:enum:mvpp2_bm_type	file:
type	drivers/phy/marvell/comphy.h	/^	u32 type;$/;"	m	struct:comphy_map	typeref:typename:u32
type	drivers/phy/marvell/comphy.h	/^	u32 type;$/;"	m	struct:comphy_mux_options	typeref:typename:u32
type	drivers/pinctrl/rockchip/pinctrl_rk3288.c	/^	u8 type;$/;"	m	struct:rockchip_iomux	typeref:typename:u8	file:
type	drivers/power/regulator/pfuze100.c	/^	enum regulator_type type;$/;"	m	struct:pfuze100_regulator_desc	typeref:enum:regulator_type	file:
type	drivers/serial/serial_pl01x.c	/^	enum pl01x_type type;$/;"	m	struct:pl01x_priv	typeref:enum:pl01x_type	file:
type	drivers/serial/serial_sh.h	/^	enum sh_serial_type type;	\/* port type *\/$/;"	m	struct:uart_port	typeref:enum:sh_serial_type
type	drivers/sound/wm8994.c	/^	enum wm8994_type type;		\/* codec type of wolfson *\/$/;"	m	struct:wm8994_priv	typeref:enum:wm8994_type	file:
type	drivers/spi/designware_spi.c	/^	u8 type;		\/* SPI\/SSP\/MicroWire *\/$/;"	m	struct:dw_spi_priv	typeref:typename:u8	file:
type	drivers/spi/ich.h	/^	uint8_t type;$/;"	m	struct:spi_trans	typeref:typename:uint8_t
type	drivers/usb/dwc3/core.h	/^	struct dwc3_event_type		type;$/;"	m	union:dwc3_event	typeref:struct:dwc3_event_type
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type	drivers/usb/dwc3/core.h	/^	u32	type:7;$/;"	m	struct:dwc3_event_type	typeref:typename:u32:7
type	drivers/usb/dwc3/core.h	/^	u8			type;$/;"	m	struct:dwc3_ep	typeref:typename:u8
type	drivers/usb/emul/sandbox_flash.c	/^	u8 type;$/;"	m	struct:scsi_inquiry_resp	typeref:typename:u8	file:
type	drivers/usb/host/ehci-tegra.c	/^	enum usb_ctlr_type type;$/;"	m	struct:fdt_usb	typeref:enum:usb_ctlr_type	file:
type	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 type;$/;"	m	struct:ed	typeref:typename:__u8
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type	drivers/usb/musb-new/musb_gadget.h	/^	u8				type;$/;"	m	struct:musb_ep	typeref:typename:u8
type	drivers/usb/musb-new/musb_host.h	/^	u8			type;		\/* XFERTYPE_* *\/$/;"	m	struct:musb_qh	typeref:typename:u8
type	drivers/video/da8xx-fb.h	/^	const char type[25];$/;"	m	struct:da8xx_lcdc_platform_data	typeref:typename:const char[25]
type	drivers/video/stb_truetype.h	/^      unsigned char type,padding;$/;"	m	struct:__anonce392f790608	typeref:typename:unsigned char
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type	fs/ubifs/ubifs-media.h	/^	__u8 type;$/;"	m	struct:ubifs_dent_node	typeref:typename:__u8
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type	include/dm/platform_data/serial_sh.h	/^	enum sh_serial_type type;$/;"	m	struct:sh_serial_platdata	typeref:enum:sh_serial_type
type	include/edid.h	/^	unsigned char type;$/;"	m	struct:edid_monitor_descriptor	typeref:typename:unsigned char
type	include/efi.h	/^	u32 type;$/;"	m	struct:efi_entry_hdr	typeref:typename:u32
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type	include/fsl-mc/fsl_dprc.h	/^	char		type[16];$/;"	m	struct:dprc_endpoint	typeref:typename:char[16]
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tzpc_init	arch/arm/cpu/armv7/sunxi/tzpc.c	/^void tzpc_init(void)$/;"	f	typeref:typename:void
tzpc_init	arch/arm/mach-exynos/tzpc.c	/^void tzpc_init(void)$/;"	f	typeref:typename:void
tzqcl	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tzqcl;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tzqcl	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tzqcl;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tzqcl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tzqcl;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tzqcl	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tzqcl;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tzqcl	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tzqcl;		\/* 0x138 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tzqcl	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tzqcl;		\/* 0x138 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tzqcs	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tzqcs;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tzqcs	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tzqcs;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tzqcs	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tzqcs;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tzqcs	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tzqcs;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tzqcs	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tzqcs;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tzqcs	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tzqcs;		\/* 0x118 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tzqcsi	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 tzqcsi;$/;"	m	struct:rk3288_ddr_pctl	typeref:typename:u32
tzqcsi	arch/arm/include/asm/arch-rockchip/sdram.h	/^	u32 tzqcsi;$/;"	m	struct:rk3288_sdram_pctl_timing	typeref:typename:u32
tzqcsi	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tzqcsi;$/;"	m	struct:rk3036_ddr_pctl	typeref:typename:u32
tzqcsi	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^	u32 tzqcsi;$/;"	m	struct:rk3036_pctl_timing	typeref:typename:u32
tzqcsi	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 tzqcsi;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tzqcsi	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 tzqcsi;		\/* 0x11c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
tzsel	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned short tzsel;$/;"	m	struct:pwmss_epwm_regs	typeref:typename:unsigned short
u	arch/arm/include/asm/setup.h	/^	} u;$/;"	m	struct:tag	typeref:union:tag::__anon61e8c52b050a
u	arch/avr32/include/asm/setup.h	/^	} u;$/;"	m	struct:tag	typeref:union:tag::__anon5c2aea39010a
u	arch/m68k/include/asm/types.h	/^	__u32 u[4];$/;"	m	struct:__anon1a5fff550108	typeref:typename:__u32[4]
u	arch/nds32/include/asm/setup.h	/^	} u;$/;"	m	struct:tag	typeref:union:tag::__anon55326435010a
u	arch/powerpc/include/asm/types.h	/^	__u32 u[4];$/;"	m	struct:__anonca529caf0108	typeref:typename:__u32[4]
u	arch/sparc/include/asm/types.h	/^	__u32 u[4];$/;"	m	struct:__anon880b0a880108	typeref:typename:__u32[4]
u	board/nokia/rx51/tag_omap.h	/^	} u;$/;"	m	struct:tag_omap	typeref:union:tag_omap::__anon0db899da010a
u	drivers/mtd/ubi/ubi.h	/^	} u;$/;"	m	struct:ubi_ainf_peb	typeref:union:ubi_ainf_peb::__anon5a04ca2c060a
u	drivers/mtd/ubi/ubi.h	/^	} u;$/;"	m	struct:ubi_wl_entry	typeref:union:ubi_wl_entry::__anon5a04ca2c050a
u	fs/jffs2/summary.h	/^	struct jffs2_sum_unknown_flash u;$/;"	m	union:jffs2_sum_flash	typeref:struct:jffs2_sum_unknown_flash
u	fs/jffs2/summary.h	/^	struct jffs2_sum_unknown_mem u;$/;"	m	union:jffs2_sum_mem	typeref:struct:jffs2_sum_unknown_mem
u	fs/reiserfs/reiserfs_private.h	/^	} __attribute__ ((__packed__)) u;$/;"	m	struct:item_head	typeref:union:item_head::__anona10af8d2030a
u	fs/reiserfs/reiserfs_private.h	/^    } __attribute__ ((__packed__)) u;$/;"	m	struct:stat_data_v1	typeref:union:stat_data_v1::__anona10af8d2040a
u	fs/reiserfs/reiserfs_private.h	/^  u;$/;"	m	struct:key	typeref:union:key::__anona10af8d2020a
u	fs/reiserfs/reiserfs_private.h	/^  } __attribute__ ((__packed__)) u;$/;"	m	struct:stat_data	typeref:union:stat_data::__anona10af8d2050a
u	include/jffs2/jffs2.h	/^	struct jffs2_unknown_node u;$/;"	m	union:jffs2_node_union	typeref:struct:jffs2_unknown_node
u	net/nfs.h	/^	} u;$/;"	m	struct:rpc_t	typeref:union:rpc_t::__anon8c947878010a
u	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^	unsigned int u;$/;"	m	union:uf	typeref:typename:unsigned int	file:
u-boot	Makefile	/^u-boot:	$(u-boot-init) $(u-boot-main) u-boot.lds FORCE$/;"	t
u-boot-alldirs	Makefile	/^u-boot-alldirs	:= $(sort $(u-boot-dirs) $(patsubst %\/,%,$(filter %\/, $(libs-))))$/;"	m
u-boot-app.efi	Makefile	/^u-boot-app.efi: u-boot FORCE$/;"	t
u-boot-dirs	Makefile	/^u-boot-dirs	:= $(patsubst %\/,%,$(filter %\/, $(libs-y))) tools examples$/;"	m
u-boot-dtb-tegra.bin	Makefile	/^u-boot-dtb-tegra.bin: u-boot-tegra.bin FORCE$/;"	t
u-boot-dtb.bin	Makefile	/^u-boot-dtb.bin: u-boot-nodtb.bin dts\/dt.dtb FORCE$/;"	t
u-boot-dtb.img	Makefile	/^u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: \\$/;"	t
u-boot-dtb.imx	arch/arm/imx-common/Makefile	/^u-boot-dtb.imx: u-boot-dtb.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE$/;"	t
u-boot-img-spl-at-end.bin	Makefile	/^u-boot-img-spl-at-end.bin: u-boot.img spl\/u-boot-spl.bin FORCE$/;"	t
u-boot-img.bin	Makefile	/^u-boot-img.bin: spl\/u-boot-spl.bin u-boot.img FORCE$/;"	t
u-boot-init	Makefile	/^u-boot-init := $(head-y)$/;"	m
u-boot-main	Makefile	/^u-boot-main := $(libs-y)$/;"	m
u-boot-nodtb-tegra.bin	Makefile	/^u-boot-nodtb-tegra.bin: spl\/u-boot-spl u-boot-nodtb.bin FORCE$/;"	t
u-boot-nodtb.bin	Makefile	/^u-boot-nodtb.bin: u-boot FORCE$/;"	t
u-boot-nodtb_HS.bin	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-nodtb_HS.bin: u-boot-nodtb.bin$/;"	t
u-boot-payload	Makefile	/^u-boot-payload: u-boot.bin.o u-boot-payload.lds FORCE$/;"	t
u-boot-payload.efi	Makefile	/^u-boot-payload.efi: u-boot-payload FORCE$/;"	t
u-boot-payload.lds	Makefile	/^u-boot-payload.lds: $(LDSCRIPT_EFI) FORCE$/;"	t
u-boot-signed.sb	Makefile	/^u-boot-signed.sb: u-boot.bin spl\/u-boot-spl.bin$/;"	t
u-boot-signed.sb	arch/arm/cpu/arm926ejs/mxs/Makefile	/^u-boot-signed.sb: $(src)\/mxsimage-signed.cfg u-boot.ivt u-boot.sig spl\/u-boot-spl.ivt spl\/u-b/;"	t
u-boot-spi.gph	arch/arm/mach-keystone/config.mk	/^u-boot-spi.gph: spl\/u-boot-spl.gph u-boot-dtb.img FORCE$/;"	t
u-boot-spl.kwb	Makefile	/^u-boot-spl.kwb: u-boot.img spl\/u-boot-spl.bin FORCE$/;"	t
u-boot-spl_HS_2ND	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-spl_HS_2ND: $(obj)\/u-boot-spl.bin$/;"	t
u-boot-spl_HS_ISSW	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-spl_HS_ISSW: $(obj)\/u-boot-spl.bin$/;"	t
u-boot-spl_HS_MLO	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-spl_HS_MLO: $(obj)\/u-boot-spl.bin$/;"	t
u-boot-spl_HS_SPI_X-LOADER	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-spl_HS_SPI_X-LOADER: $(obj)\/u-boot-spl.bin$/;"	t
u-boot-spl_HS_ULO	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-spl_HS_ULO: $(obj)\/u-boot-spl.bin$/;"	t
u-boot-spl_HS_X-LOADER	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot-spl_HS_X-LOADER: $(obj)\/u-boot-spl.bin$/;"	t
u-boot-sunxi-with-spl.bin	Makefile	/^u-boot-sunxi-with-spl.bin: spl\/sunxi-spl.bin u-boot.img FORCE$/;"	t
u-boot-tegra.bin	Makefile	/^u-boot-tegra.bin: spl\/u-boot-spl u-boot.bin FORCE$/;"	t
u-boot-with-nand-spl.imx	Makefile	/^u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE$/;"	t
u-boot-with-nand-spl.imx	arch/arm/imx-common/Makefile	/^u-boot-with-nand-spl.imx: spl\/u-boot-nand-spl.imx u-boot.uim FORCE$/;"	t
u-boot-with-spl-pbl.bin	Makefile	/^u-boot-with-spl-pbl.bin: spl\/u-boot-spl.pbl $(UBOOT_BINLOAD) FORCE$/;"	t
u-boot-with-spl.bin	Makefile	/^u-boot-with-spl.bin: spl\/u-boot-spl.bin $(SPL_PAYLOAD) FORCE$/;"	t
u-boot-with-spl.imx	Makefile	/^u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE$/;"	t
u-boot-with-spl.imx	arch/arm/imx-common/Makefile	/^u-boot-with-spl.imx: SPL u-boot.uim FORCE$/;"	t
u-boot-with-spl.sfp	Makefile	/^u-boot-with-spl.sfp: spl\/u-boot-spl.sfp u-boot.img FORCE$/;"	t
u-boot-x86-16bit.bin	Makefile	/^u-boot-x86-16bit.bin: u-boot FORCE$/;"	t
u-boot.ais	Makefile	/^u-boot.ais: spl\/u-boot-spl.ais u-boot.img FORCE$/;"	t
u-boot.bin	Makefile	/^u-boot.bin: u-boot-dtb.bin FORCE$/;"	t
u-boot.bin	Makefile	/^u-boot.bin: u-boot-nodtb.bin FORCE$/;"	t
u-boot.bin.o	Makefile	/^u-boot.bin.o: u-boot.bin FORCE$/;"	t
u-boot.csf	arch/arm/cpu/arm926ejs/mxs/Makefile	/^u-boot.csf: u-boot.ivt u-boot.bin board\/$(VENDOR)\/$(BOARD)\/sign\/u-boot.csf$/;"	t
u-boot.dis	Makefile	/^u-boot.dis:	u-boot$/;"	t
u-boot.dtb	Makefile	/^u-boot.dtb: dts\/dt.dtb$/;"	t
u-boot.elf	Makefile	/^u-boot.elf: u-boot.bin$/;"	t
u-boot.hex	Makefile	/^u-boot.hex u-boot.srec: u-boot FORCE$/;"	t
u-boot.img	Makefile	/^u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: \\$/;"	t
u-boot.imx	arch/arm/imx-common/Makefile	/^u-boot.imx: u-boot.bin $(IMX_CONFIG) $(PLUGIN).bin FORCE$/;"	t
u-boot.ivt	arch/arm/cpu/arm926ejs/mxs/Makefile	/^u-boot.ivt: u-boot.bin$/;"	t
u-boot.kwb	Makefile	/^u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: \\$/;"	t
u-boot.ldr	Makefile	/^u-boot.ldr:	u-boot$/;"	t
u-boot.ldr.hex	Makefile	/^u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE$/;"	t
u-boot.ldr.srec	Makefile	/^u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE$/;"	t
u-boot.lds	Makefile	/^u-boot.lds: $(LDSCRIPT) prepare FORCE$/;"	t
u-boot.pbl	Makefile	/^u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: \\$/;"	t
u-boot.rom	Makefile	/^u-boot.rom: u-boot-x86-16bit.bin u-boot.bin FORCE \\$/;"	t
u-boot.sb	Makefile	/^u-boot.sb: u-boot.bin spl\/u-boot-spl.bin$/;"	t
u-boot.sb	arch/arm/cpu/arm926ejs/mxs/Makefile	/^u-boot.sb: $(src)\/$(MKIMAGE_TARGET-y) u-boot.bin spl\/u-boot-spl.bin FORCE$/;"	t
u-boot.sha1	Makefile	/^u-boot.sha1:	u-boot.bin$/;"	t
u-boot.spr	Makefile	/^u-boot.spr: spl\/u-boot-spl.img u-boot.img FORCE$/;"	t
u-boot.srec	Makefile	/^u-boot.hex u-boot.srec: u-boot FORCE$/;"	t
u-boot.sym	Makefile	/^u-boot.sym: u-boot FORCE$/;"	t
u-boot.ubl	Makefile	/^u-boot.ubl: u-boot-with-spl.bin FORCE$/;"	t
u-boot.uim	arch/arm/imx-common/Makefile	/^u-boot.uim: u-boot.bin FORCE$/;"	t
u-boot.vyb	arch/arm/cpu/armv7/vf610/Makefile	/^u-boot.vyb: u-boot.imx$/;"	t
u-boot_HS.img	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot_HS.img: u-boot-nodtb_HS.bin u-boot.img $(patsubst %.dtb,%_HS.dtb,$(OF_LIST_TARGETS))$/;"	t
u-boot_HS_XIP_X-LOADER	arch/arm/cpu/armv7/omap-common/config_secure.mk	/^u-boot_HS_XIP_X-LOADER: $(obj)\/u-boot.bin$/;"	t
u1	arch/arm/include/asm/setup.h	/^    } u1;$/;"	m	struct:param_struct	typeref:union:param_struct::__anon61e8c52b010a
u16	arch/arc/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/arm/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/avr32/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/blackfin/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/m68k/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/microblaze/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/mips/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/nds32/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/nios2/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/openrisc/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/powerpc/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/sandbox/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/sh/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/sparc/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/x86/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	arch/xtensa/include/asm/types.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	fs/yaffs2/yportenv.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u16	include/MCD_dma.h	/^typedef unsigned short u16;$/;"	t	typeref:typename:unsigned short
u1_pel	include/linux/usb/ch9.h	/^	__u8	u1_pel;$/;"	m	struct:usb_set_sel_req	typeref:typename:__u8
u1_sel	include/linux/usb/ch9.h	/^	__u8	u1_sel;$/;"	m	struct:usb_set_sel_req	typeref:typename:__u8
u1cts	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u1cts;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u1pel	drivers/usb/dwc3/core.h	/^	u8			u1pel;$/;"	m	struct:dwc3	typeref:typename:u8
u1pel	drivers/usb/dwc3/ep0.c	/^		u8	u1pel;$/;"	m	struct:dwc3_ep0_set_sel_cmpl::timing	typeref:typename:u8	file:
u1rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u1rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u1sel	drivers/usb/dwc3/core.h	/^	u8			u1sel;$/;"	m	struct:dwc3	typeref:typename:u8
u1sel	drivers/usb/dwc3/ep0.c	/^		u8	u1sel;$/;"	m	struct:dwc3_ep0_set_sel_cmpl::timing	typeref:typename:u8	file:
u1u2	drivers/usb/dwc3/core.h	/^	u32			u1u2;$/;"	m	struct:dwc3	typeref:typename:u32
u2	arch/arm/include/asm/setup.h	/^    } u2;$/;"	m	struct:param_struct	typeref:union:param_struct::__anon61e8c52b030a
u2_pel	include/linux/usb/ch9.h	/^	__le16	u2_pel;$/;"	m	struct:usb_set_sel_req	typeref:typename:__le16
u2_sel	include/linux/usb/ch9.h	/^	__le16	u2_sel;$/;"	m	struct:usb_set_sel_req	typeref:typename:__le16
u2cts	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u2cts;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u2exit_lfps_quirk	drivers/usb/dwc3/core.h	/^	unsigned		u2exit_lfps_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
u2exit_lfps_quirk	include/dwc3-uboot.h	/^	unsigned u2exit_lfps_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
u2f	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^u2f (unsigned int v)$/;"	f	typeref:typename:float	file:
u2pel	drivers/usb/dwc3/core.h	/^	u16			u2pel;$/;"	m	struct:dwc3	typeref:typename:u16
u2pel	drivers/usb/dwc3/ep0.c	/^		u16	u2pel;$/;"	m	struct:dwc3_ep0_set_sel_cmpl::timing	typeref:typename:u16	file:
u2pir2	arch/powerpc/include/asm/immap_85xx.h	/^	u32 u2pir2;	\/* 0x220 L2 cache partitioning ID register 2 *\/$/;"	m	struct:ccsr_cluster_l2	typeref:typename:u32
u2rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u2rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u2sel	drivers/usb/dwc3/core.h	/^	u16			u2sel;$/;"	m	struct:dwc3	typeref:typename:u16
u2sel	drivers/usb/dwc3/ep0.c	/^		u16	u2sel;$/;"	m	struct:dwc3_ep0_set_sel_cmpl::timing	typeref:typename:u16	file:
u2ss_inp3_quirk	drivers/usb/dwc3/core.h	/^	unsigned		u2ss_inp3_quirk:1;$/;"	m	struct:dwc3	typeref:typename:unsigned:1
u2ss_inp3_quirk	include/dwc3-uboot.h	/^	unsigned u2ss_inp3_quirk;$/;"	m	struct:dwc3_device	typeref:typename:unsigned
u32	arch/arc/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/arm/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/avr32/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/blackfin/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/m68k/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/microblaze/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/mips/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/nds32/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/nios2/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/openrisc/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/powerpc/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/sandbox/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/sh/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/sparc/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/x86/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	arch/xtensa/include/asm/types.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	drivers/usb/dwc3/ti_usb_phy.c	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int	file:
u32	fs/ubifs/ubifs.h	/^	uint32_t u32[UBIFS_SK_LEN\/4];$/;"	m	union:ubifs_key	typeref:typename:uint32_t[]
u32	fs/yaffs2/yportenv.h	/^typedef unsigned u32;$/;"	t	typeref:typename:unsigned
u32	include/MCD_dma.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	include/aes.h	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int
u32	tools/omap/clocks_get_m_n.c	/^typedef unsigned int u32;$/;"	t	typeref:typename:unsigned int	file:
u3clk	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 u3clk;		\/* UART 3 Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
u3cts	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u3cts;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u3rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u3rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u4clk	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 u4clk;		\/* UART 4 Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
u4cts	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u4cts;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u4rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u4rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u5clk	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 u5clk;		\/* UART 5 Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
u5cts	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u5cts;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u5rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u5rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u64	arch/arc/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/arm/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/avr32/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/blackfin/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/m68k/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/microblaze/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/mips/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/nds32/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/nios2/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/openrisc/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/powerpc/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/sandbox/include/asm/types.h	/^typedef __UINT64_TYPE__ u64;$/;"	t	typeref:typename:__UINT64_TYPE__
u64	arch/sandbox/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/sh/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/sparc/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/x86/include/asm/types.h	/^typedef __UINT64_TYPE__ u64;$/;"	t	typeref:typename:__UINT64_TYPE__
u64	arch/x86/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	arch/xtensa/include/asm/types.h	/^typedef unsigned long long u64;$/;"	t	typeref:typename:unsigned long long
u64	fs/ubifs/ubifs.h	/^	uint64_t u64[UBIFS_SK_LEN\/8];$/;"	m	union:ubifs_key	typeref:typename:uint64_t[]
u64_from_le32_copy	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void u64_from_le32_copy(uint64_t *d, const void *s,$/;"	f	typeref:typename:void
u64_to_le32_copy	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void u64_to_le32_copy(void *d, const uint64_t *s,$/;"	f	typeref:typename:void
u64_to_mac	board/ti/am57xx/board.c	/^static void u64_to_mac(u64 addr, u8 mac[6])$/;"	f	typeref:typename:void	file:
u6clk	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 u6clk;		\/* UART 6 Clock Control Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
u6cts	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u6cts;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u6rx	drivers/pinctrl/pinctrl_pic32.c	/^	u32 u6rx;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
u8	arch/arc/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/arm/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/avr32/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/blackfin/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/m68k/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/microblaze/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/mips/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/nds32/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/nios2/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/openrisc/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/powerpc/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/sandbox/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/sh/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/sparc/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/x86/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	arch/xtensa/include/asm/types.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	fs/ubifs/ubifs.h	/^	uint8_t u8[UBIFS_SK_LEN];$/;"	m	union:ubifs_key	typeref:typename:uint8_t[]
u8	fs/yaffs2/yportenv.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	include/MCD_dma.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
u8	include/aes.h	/^typedef unsigned char u8;$/;"	t	typeref:typename:unsigned char
uInt	include/u-boot/zlib.h	/^#  define uInt /;"	d
uInt	include/u-boot/zlib.h	/^typedef unsigned int   uInt;  \/* 16 bits or more *\/$/;"	t	typeref:typename:unsigned int
uIntf	include/u-boot/zlib.h	/^#  define uIntf /;"	d
uIntf	include/u-boot/zlib.h	/^typedef uInt  FAR uIntf;$/;"	t	typeref:typename:uInt FAR
uLong	include/u-boot/zlib.h	/^#  define uLong /;"	d
uLong	include/u-boot/zlib.h	/^typedef unsigned long  uLong; \/* 32 bits or more *\/$/;"	t	typeref:typename:unsigned long
uLongf	include/u-boot/zlib.h	/^#  define uLongf /;"	d
uLongf	include/u-boot/zlib.h	/^typedef uLong FAR uLongf;$/;"	t	typeref:typename:uLong FAR
uV_step	drivers/power/regulator/pfuze100.c	/^	unsigned int uV_step;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int	file:
u_boot_console	test/py/conftest.py	/^def u_boot_console(request):$/;"	f
u_boot_hush_reloc	common/cli_hush.c	/^static void u_boot_hush_reloc(void)$/;"	f	typeref:typename:void	file:
u_boot_hush_start	common/cli_hush.c	/^int u_boot_hush_start(void)$/;"	f	typeref:typename:int
u_boot_logo	include/video_logo.h	/^fastimage_t u_boot_logo = {$/;"	v	typeref:typename:fastimage_t
u_char	include/linux/types.h	/^typedef unsigned char		u_char;$/;"	t	typeref:typename:unsigned char
u_id_high	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 u_id_high;$/;"	m	struct:stm32_u_id_regs	typeref:typename:u32
u_id_low	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 u_id_low;$/;"	m	struct:stm32_u_id_regs	typeref:typename:u32
u_id_mid	arch/arm/include/asm/arch-stm32f4/stm32.h	/^	u32 u_id_mid;$/;"	m	struct:stm32_u_id_regs	typeref:typename:u32
u_int	include/linux/types.h	/^typedef unsigned int		u_int;$/;"	t	typeref:typename:unsigned int
u_int16_t	include/linux/types.h	/^typedef		__u16		u_int16_t;$/;"	t	typeref:typename:__u16
u_int32_t	include/linux/types.h	/^typedef		__u32		u_int32_t;$/;"	t	typeref:typename:__u32
u_int64_t	include/linux/types.h	/^typedef		__UINT64_TYPE__	u_int64_t;$/;"	t	typeref:typename:__UINT64_TYPE__
u_int64_t	include/linux/types.h	/^typedef		__u64		u_int64_t;$/;"	t	typeref:typename:__u64
u_int8_t	include/linux/types.h	/^typedef		__u8		u_int8_t;$/;"	t	typeref:typename:__u8
u_long	include/linux/types.h	/^typedef unsigned long		u_long;$/;"	t	typeref:typename:unsigned long
u_qe_firmware_resume	drivers/qe/qe.c	/^int u_qe_firmware_resume(const struct qe_firmware *firmware, qe_map_t *qe_immrr)$/;"	f	typeref:typename:int
u_qe_init	drivers/qe/qe.c	/^void u_qe_init(void)$/;"	f	typeref:typename:void
u_qe_resume	drivers/qe/qe.c	/^void u_qe_resume(void)$/;"	f	typeref:typename:void
u_qe_upload_firmware	drivers/qe/qe.c	/^int u_qe_upload_firmware(const struct qe_firmware *firmware)$/;"	f	typeref:typename:int
u_regs	arch/sparc/include/asm/ptrace.h	/^	unsigned long u_regs[16];	\/* globals and ins *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long[16]
u_short	include/linux/types.h	/^typedef unsigned short		u_short;$/;"	t	typeref:typename:unsigned short
ua	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	ua;$/;"	m	struct:iim_regs	typeref:typename:u32
ua	arch/powerpc/include/asm/immap_512x.h	/^	u32 ua;			\/* IIM upper address register *\/$/;"	m	struct:iim512x	typeref:typename:u32
ua	drivers/misc/fsl_iim.c	/^	u32 ua;$/;"	m	struct:fsl_iim	typeref:typename:u32	file:
uaa0	arch/arm/dts/thunderx-88xx.dtsi	/^		uaa0: serial@87e0,24000000 {$/;"	l
uaa1	arch/arm/dts/thunderx-88xx.dtsi	/^		uaa1: serial@87e0,25000000 {$/;"	l
uaacfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	uaacfg;		\/* 0xB8: APB_MISC_GP_UAACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uaacfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	uaacfg;		\/* 0xB8: APB_MISC_GP_UAACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uaacfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	uaacfg;		\/* 0xAC: APB_MISC_GP_UAACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uaacfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	uaacfg;		\/* 0xB8: APB_MISC_GP_UAACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uaacfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	uaacfg;		\/* 0xB8: APB_MISC_GP_UAACFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uabcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	uabcfg;		\/* 0xBC: APB_MISC_GP_UABCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uabcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	uabcfg;		\/* 0xBC: APB_MISC_GP_UABCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uabcfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	uabcfg;		\/* 0xB0: APB_MISC_GP_UABCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uabcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	uabcfg;		\/* 0xBC: APB_MISC_GP_UABCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uabcfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	uabcfg;		\/* 0xBC: APB_MISC_GP_UABCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uacr	arch/m68k/include/asm/uart.h	/^		u8 uacr;	\/* 0x10 Auxiliary Control reg *\/$/;"	m	union:uart::__anona45981bc030a	typeref:typename:u8
uadcfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	uadcfg;		\/* 0x124: APB_MISC_GP_UADCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uadcfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	uadcfg;		\/* 0x124: APB_MISC_GP_UADCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uadcfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	uadcfg;		\/* 0x124: APB_MISC_GP_UADCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uaddr	drivers/mtd/jedec_flash.c	/^	const __u8 uaddr[4];		\/* unlock addrs for 8, 16, 32, 64 *\/$/;"	m	struct:amd_flash_info	typeref:typename:const __u8[4]	file:
uaddr	drivers/mtd/jedec_flash.c	/^enum uaddr {$/;"	g	file:
uarrow	scripts/kconfig/lxdialog/dialog.h	/^	struct dialog_color uarrow;$/;"	m	struct:dialog_info	typeref:struct:dialog_color
uart	arch/m68k/include/asm/uart.h	/^typedef struct uart {$/;"	s
uart	arch/nios2/dts/3c120_devboard.dts	/^			uart: serial@0x4c80 {$/;"	l	label:pb_cpu_to_io
uart	arch/sparc/include/asm/global_data.h	/^	void *uart;$/;"	m	struct:arch_global_data	typeref:typename:void *
uart	board/nokia/rx51/tag_omap.h	/^		struct omap_uart_config uart;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_uart_config
uart0	arch/arc/dts/abilis_tb100.dts	/^	uart0: serial@ff100000 {$/;"	l
uart0	arch/arc/dts/axs10x.dts	/^	uart0: serial0@e0022000 {$/;"	l
uart0	arch/arm/dts/am335x-draco.dtsi	/^		uart0: serial@44e09000 {$/;"	l
uart0	arch/arm/dts/am33xx.dtsi	/^		uart0: serial@44e09000 {$/;"	l
uart0	arch/arm/dts/am4372.dtsi	/^		uart0: serial@44e09000 {$/;"	l
uart0	arch/arm/dts/armada-370-xp.dtsi	/^			uart0: serial@12000 {$/;"	l
uart0	arch/arm/dts/armada-375.dtsi	/^			uart0: serial@12000 {$/;"	l
uart0	arch/arm/dts/armada-37xx.dtsi	/^			uart0: serial@12000 {$/;"	l
uart0	arch/arm/dts/armada-38x.dtsi	/^			uart0: serial@12000 {$/;"	l
uart0	arch/arm/dts/armada-ap806.dtsi	/^			uart0: serial@512000 {$/;"	l
uart0	arch/arm/dts/at91sam9260.dtsi	/^			uart0: serial@fffd4000 {$/;"	l
uart0	arch/arm/dts/hi6220.dtsi	/^		uart0: uart@f8015000 {	\/* console *\/$/;"	l
uart0	arch/arm/dts/k2g.dtsi	/^		uart0: serial@02530c00 {$/;"	l
uart0	arch/arm/dts/keystone.dtsi	/^		uart0: serial@02530c00 {$/;"	l
uart0	arch/arm/dts/ls1021a.dtsi	/^		uart0: serial@21c0500 {$/;"	l
uart0	arch/arm/dts/rk3036.dtsi	/^	uart0: serial@20060000 {$/;"	l
uart0	arch/arm/dts/rk3288.dtsi	/^	uart0: serial@ff180000 {$/;"	l
uart0	arch/arm/dts/rk3399.dtsi	/^	uart0: serial@ff180000 {$/;"	l
uart0	arch/arm/dts/socfpga.dtsi	/^		uart0: serial0@ffc02000 {$/;"	l
uart0	arch/arm/dts/stv0991.dts	/^	uart0: serial@0x80406000 {$/;"	l
uart0	arch/arm/dts/sun4i-a10.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun50i-a64.dtsi	/^		uart0: serial@1c28000 {$/;"	l
uart0	arch/arm/dts/sun5i-a10s.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun6i-a31.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun7i-a20-primo73.dts	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun7i-a20.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun8i-a23-a33.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun8i-a83t.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun8i-h3.dtsi	/^		uart0: serial@01c28000 {$/;"	l
uart0	arch/arm/dts/sun9i-a80.dtsi	/^		uart0: serial@07000000 {$/;"	l
uart0	arch/arm/dts/vf.dtsi	/^			uart0: serial@40027000 {$/;"	l	label:aips0
uart0	arch/arm/dts/zynq-7000.dtsi	/^		uart0: serial@e0000000 {$/;"	l	label:amba
uart0	arch/arm/dts/zynqmp.dtsi	/^		uart0: serial@ff000000 {$/;"	l
uart0	arch/mips/dts/ar933x.dtsi	/^			uart0: uart@18020000 {$/;"	l
uart0	arch/mips/dts/ar934x.dtsi	/^			uart0: uart@18020000 {$/;"	l
uart0	arch/mips/dts/img,boston.dts	/^	uart0: uart@17ffe000 {$/;"	l
uart0	arch/mips/dts/mti,malta.dts	/^		uart0: serial@3f8 {$/;"	l
uart0	arch/mips/dts/qca953x.dtsi	/^			uart0: uart@18020000 {$/;"	l
uart0	arch/powerpc/dts/xilinx-ppc405-generic.dts	/^	uart0: serial@84000000 {$/;"	l
uart0	arch/powerpc/dts/xilinx-ppc440-generic.dts	/^	uart0: serial@8b000000 {$/;"	l
uart0	arch/sandbox/dts/sandbox.dts	/^	uart0: serial {$/;"	l
uart0	arch/sandbox/dts/test.dts	/^	uart0: serial {$/;"	l
uart0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	uart0_aper_clk, uart1_aper_clk, gpio_aper_clk, lqspi_aper_clk,$/;"	e	enum:zynq_clk
uart0_clk	arch/arm/dts/at91sam9260.dtsi	/^					uart0_clk: uart0_clk {$/;"	l
uart0_clk	arch/arm/dts/sama5d2.dtsi	/^					uart0_clk: uart0_clk@24 {$/;"	l
uart0_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
uart0_cts	arch/arm/dts/rk3036.dtsi	/^			uart0_cts: uart0-cts {$/;"	l
uart0_cts	arch/arm/dts/rk3288.dtsi	/^			uart0_cts: uart0-cts {$/;"	l
uart0_cts	arch/arm/dts/rk3399.dtsi	/^			uart0_cts: uart0-cts {$/;"	l
uart0_ctsn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart0_ctsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_ctsn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart0_ctsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int uart0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int uart0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int uart0_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int uart0_muxvals[] = {3, 3};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int uart0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int uart0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int uart0_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int uart0_muxvals[] = {0, 1};$/;"	v	typeref:typename:const int[]	file:
uart0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int uart0_muxvals[] = {3, 3};$/;"	v	typeref:typename:const int[]	file:
uart0_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/BuR/brxre1/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/compulab/cm_t43/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/gumstix/pepper/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/isee/igep0033/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/phytec/pcm051/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/siemens/draco/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/siemens/pxm2/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/silica/pengwyn/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/ti/am43xx/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/ti/ti814x/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux uart0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart0_pins	arch/arm/dts/am335x-bone-common.dtsi	/^	uart0_pins: pinmux_uart0_pins {$/;"	l
uart0_pins	arch/arm/dts/am335x-draco.dtsi	/^		uart0_pins: pinmux_uart0_pins {$/;"	l
uart0_pins	arch/arm/dts/am335x-evm.dts	/^	uart0_pins: pinmux_uart0_pins {$/;"	l
uart0_pins	arch/arm/dts/am335x-evmsk.dts	/^	uart0_pins: pinmux_uart0_pins {$/;"	l
uart0_pins	arch/arm/dts/am335x-pxm2.dtsi	/^	uart0_pins: pinmux_uart0_pins {$/;"	l
uart0_pins	arch/arm/dts/am335x-rut.dts	/^	uart0_pins: pinmux_uart0_pins {$/;"	l
uart0_pins	arch/arm/dts/armada-38x.dtsi	/^				uart0_pins: uart-pins-0 {$/;"	l	label:pinctrl
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned uart0_pins[] = {54, 55};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned uart0_pins[] = {54, 55};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned uart0_pins[] = {85, 88};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned uart0_pins[] = {135, 136};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned uart0_pins[] = {127, 128};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned uart0_pins[] = {47, 48};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned uart0_pins[] = {217, 218};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned uart0_pins[] = {63, 64};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned uart0_pins[] = {70, 71};$/;"	v	typeref:typename:const unsigned[]	file:
uart0_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun50i-a64.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun5i-a10s.dtsi	/^	uart0_pins_a: uart0@0 {$/;"	l
uart0_pins_a	arch/arm/dts/sun6i-a31.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun8i-a23-a33.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun8i-a83t.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun8i-h3.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_a	arch/arm/dts/sun9i-a80.dtsi	/^			uart0_pins_a: uart0@0 {$/;"	l	label:pio
uart0_pins_b	arch/arm/dts/sun4i-a10.dtsi	/^			uart0_pins_b: uart0@1 {$/;"	l	label:pio
uart0_pins_b	arch/arm/dts/sun50i-a64.dtsi	/^			uart0_pins_b: uart0@1 {$/;"	l	label:pio
uart0_pins_b	arch/arm/dts/sun8i-a33.dtsi	/^	uart0_pins_b: uart0@1 {$/;"	l
uart0_pins_b	arch/arm/dts/sun8i-a83t.dtsi	/^			uart0_pins_b: uart0@1 {$/;"	l	label:pio
uart0_pins_rtscts	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config uart0_pins_rtscts[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
uart0_pins_txrx	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config uart0_pins_txrx[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
uart0_rts	arch/arm/dts/rk3036.dtsi	/^			uart0_rts: uart0-rts {$/;"	l
uart0_rts	arch/arm/dts/rk3288.dtsi	/^			uart0_rts: uart0-rts {$/;"	l
uart0_rts	arch/arm/dts/rk3399.dtsi	/^			uart0_rts: uart0-rts {$/;"	l
uart0_rtsn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart0_rtsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_rtsn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart0_rtsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_rxd	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart0_rxd;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_rxd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart0_rxd;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_txd	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart0_txd;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_txd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart0_txd;$/;"	m	struct:pad_signals	typeref:typename:int
uart0_xfer	arch/arm/dts/rk3036.dtsi	/^			uart0_xfer: uart0-xfer {$/;"	l
uart0_xfer	arch/arm/dts/rk3288.dtsi	/^			uart0_xfer: uart0-xfer {$/;"	l
uart0_xfer	arch/arm/dts/rk3399.dtsi	/^			uart0_xfer: uart0-xfer {$/;"	l
uart0b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int uart0b_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
uart0b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int uart0b_muxvals[] = {3, 3};$/;"	v	typeref:typename:const int[]	file:
uart0b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int uart0b_muxvals[] = {10, 10};$/;"	v	typeref:typename:const int[]	file:
uart0b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned uart0b_pins[] = {11, 12};$/;"	v	typeref:typename:const unsigned[]	file:
uart0b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned uart0b_pins[] = {227, 228};$/;"	v	typeref:typename:const unsigned[]	file:
uart0b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned uart0b_pins[] = {179, 180};$/;"	v	typeref:typename:const unsigned[]	file:
uart0clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int uart0clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
uart1	arch/arm/dts/am33xx.dtsi	/^		uart1: serial@48022000 {$/;"	l
uart1	arch/arm/dts/am4372.dtsi	/^		uart1: serial@48022000 {$/;"	l
uart1	arch/arm/dts/armada-370-xp.dtsi	/^			uart1: serial@12100 {$/;"	l
uart1	arch/arm/dts/armada-375.dtsi	/^			uart1: serial@12100 {$/;"	l
uart1	arch/arm/dts/armada-38x.dtsi	/^			uart1: serial@12100 {$/;"	l
uart1	arch/arm/dts/armada-ap806.dtsi	/^			uart1: serial@512100 {$/;"	l
uart1	arch/arm/dts/at91-sama5d2_xplained.dts	/^			uart1: serial@f8020000 {$/;"	l
uart1	arch/arm/dts/at91sam9260.dtsi	/^			uart1: serial@fffd8000 {$/;"	l
uart1	arch/arm/dts/dra7.dtsi	/^		uart1: serial@4806a000 {$/;"	l
uart1	arch/arm/dts/hi6220.dtsi	/^		uart1: uart@f7111000 {$/;"	l
uart1	arch/arm/dts/imx6qdl.dtsi	/^				uart1: serial@02020000 {$/;"	l
uart1	arch/arm/dts/imx6ull.dtsi	/^				uart1: serial@02020000 {$/;"	l	label:aips1
uart1	arch/arm/dts/imx7.dtsi	/^			uart1: serial@30860000 {$/;"	l	label:aips3
uart1	arch/arm/dts/keystone.dtsi	/^		uart1:	serial@02531000 {$/;"	l
uart1	arch/arm/dts/ls1021a.dtsi	/^		uart1: serial@21c0600 {$/;"	l
uart1	arch/arm/dts/rk3036.dtsi	/^	uart1: serial@20064000 {$/;"	l
uart1	arch/arm/dts/rk3288.dtsi	/^	uart1: serial@ff190000 {$/;"	l
uart1	arch/arm/dts/rk3399.dtsi	/^	uart1: serial@ff190000 {$/;"	l
uart1	arch/arm/dts/sama5d2.dtsi	/^			uart1: serial@f8020000 {$/;"	l
uart1	arch/arm/dts/socfpga.dtsi	/^		uart1: serial1@ffc03000 {$/;"	l
uart1	arch/arm/dts/sun4i-a10.dtsi	/^		uart1: serial@01c28400 {$/;"	l
uart1	arch/arm/dts/sun50i-a64.dtsi	/^		uart1: serial@1c28400 {$/;"	l
uart1	arch/arm/dts/sun5i.dtsi	/^		uart1: serial@01c28400 {$/;"	l
uart1	arch/arm/dts/sun6i-a31.dtsi	/^		uart1: serial@01c28400 {$/;"	l
uart1	arch/arm/dts/sun7i-a20.dtsi	/^		uart1: serial@01c28400 {$/;"	l
uart1	arch/arm/dts/sun8i-a23-a33.dtsi	/^		uart1: serial@01c28400 {$/;"	l
uart1	arch/arm/dts/sun8i-h3.dtsi	/^		uart1: serial@01c28400 {$/;"	l
uart1	arch/arm/dts/sun9i-a80.dtsi	/^		uart1: serial@07000400 {$/;"	l
uart1	arch/arm/dts/vf.dtsi	/^			uart1: serial@40028000 {$/;"	l	label:aips0
uart1	arch/arm/dts/zynq-7000.dtsi	/^		uart1: serial@e0001000 {$/;"	l	label:amba
uart1	arch/arm/dts/zynqmp.dtsi	/^		uart1: serial@ff010000 {$/;"	l
uart1	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 uart1;	\/*0x000*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
uart1	arch/mips/dts/pic32mzda.dtsi	/^	uart1: serial@1f822000 {$/;"	l
uart10	arch/arm/dts/dra7.dtsi	/^		uart10: serial@4ae2b000 {$/;"	l
uart10_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart10_gfclk_mux: uart10_gfclk_mux {$/;"	l
uart1_2pins	arch/arm/dts/sun50i-a64.dtsi	/^			uart1_2pins: uart1_2@0 {$/;"	l	label:pio
uart1_4pins	arch/arm/dts/sun50i-a64.dtsi	/^			uart1_4pins: uart1_4@0 {$/;"	l	label:pio
uart1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	uart0_aper_clk, uart1_aper_clk, gpio_aper_clk, lqspi_aper_clk,$/;"	e	enum:zynq_clk
uart1_clk	arch/arm/dts/at91sam9260.dtsi	/^					uart1_clk: uart1_clk {$/;"	l
uart1_clk	arch/arm/dts/sama5d2.dtsi	/^					uart1_clk: uart1_clk@25 {$/;"	l
uart1_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	sdio0_clk, sdio1_clk, uart0_clk, uart1_clk, spi0_clk, spi1_clk, dma_clk,$/;"	e	enum:zynq_clk
uart1_cts	arch/arm/dts/rk3288.dtsi	/^			uart1_cts: uart1-cts {$/;"	l
uart1_ctsn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart1_ctsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_ctsn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart1_ctsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart1_gfclk_mux: uart1_gfclk_mux {$/;"	l
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int uart1_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int uart1_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int uart1_muxvals[] = {13, 13};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int uart1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int uart1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int uart1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int uart1_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int uart1_muxvals[] = {0, 1};$/;"	v	typeref:typename:const int[]	file:
uart1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int uart1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart1_pads	board/aristainetos/aristainetos-v1.c	/^iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart1_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart1_pads	board/bachmann/ot1200/ot1200.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart1_pads	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart1_pads	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart1_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx6ullevk/mx6ullevk.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/wandboard/wandboard.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pads	board/warp7/warp7.c	/^static iomux_v3_cfg_t const uart1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart1_pin_mux	board/BuR/brppt1/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pin_mux	board/compulab/cm_t335/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux uart1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart1_pins	arch/arm/dts/am335x-evm.dts	/^	uart1_pins: pinmux_uart1_pins {$/;"	l
uart1_pins	arch/arm/dts/armada-38x.dtsi	/^				uart1_pins: uart-pins-1 {$/;"	l	label:pinctrl
uart1_pins	arch/arm/dts/dra7-evm.dts	/^	uart1_pins: pinmux_uart1_pins {$/;"	l
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned uart1_pins[] = {58, 59};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned uart1_pins[] = {58, 59};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned uart1_pins[] = {155, 156};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned uart1_pins[] = {115, 116};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned uart1_pins[] = {129, 130};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned uart1_pins[] = {49, 50};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned uart1_pins[] = {115, 116};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned uart1_pins[] = {65, 66};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned uart1_pins[] = {114, 115};$/;"	v	typeref:typename:const unsigned[]	file:
uart1_pins_a	arch/arm/dts/sun4i-a10.dtsi	/^			uart1_pins_a: uart1@0 {$/;"	l	label:pio
uart1_pins_a	arch/arm/dts/sun5i-a13.dtsi	/^	uart1_pins_a: uart1@0 {$/;"	l
uart1_pins_a	arch/arm/dts/sun8i-h3.dtsi	/^			uart1_pins_a: uart1@0 {$/;"	l	label:pio
uart1_pins_b	arch/arm/dts/sun5i-a13.dtsi	/^	uart1_pins_b: uart1@1 {$/;"	l
uart1_pins_txrx	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config uart1_pins_txrx[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
uart1_rts	arch/arm/dts/rk3288.dtsi	/^			uart1_rts: uart1-rts {$/;"	l
uart1_rtsn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart1_rtsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_rtsn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart1_rtsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_rxd	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart1_rxd;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_rxd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart1_rxd;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_txd	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int uart1_txd;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_txd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart1_txd;$/;"	m	struct:pad_signals	typeref:typename:int
uart1_xfer	arch/arm/dts/rk3036.dtsi	/^			uart1_xfer: uart1-xfer {$/;"	l
uart1_xfer	arch/arm/dts/rk3288.dtsi	/^			uart1_xfer: uart1-xfer {$/;"	l
uart1_xfer	arch/arm/dts/rk3399.dtsi	/^			uart1_xfer: uart1-xfer {$/;"	l
uart1b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int uart1b_muxvals[] = {23, 23};$/;"	v	typeref:typename:const int[]	file:
uart1b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int uart1b_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart1b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned uart1b_pins[] = {69, 70};$/;"	v	typeref:typename:const unsigned[]	file:
uart1b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned uart1b_pins[] = {113, 114};$/;"	v	typeref:typename:const unsigned[]	file:
uart1clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int uart1clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
uart1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart1clkctrl;	\/* offset 0x580 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart1clkctrl;	\/* offset 0x6C *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart2	arch/arm/dts/am33xx.dtsi	/^		uart2: serial@48024000 {$/;"	l
uart2	arch/arm/dts/am4372.dtsi	/^		uart2: serial@48024000 {$/;"	l
uart2	arch/arm/dts/armada-xp.dtsi	/^			uart2: serial@12200 {$/;"	l
uart2	arch/arm/dts/dra7.dtsi	/^		uart2: serial@4806c000 {$/;"	l
uart2	arch/arm/dts/hi6220.dtsi	/^		uart2: uart@f7112000 {$/;"	l
uart2	arch/arm/dts/imx6qdl.dtsi	/^			uart2: serial@021e8000 {$/;"	l
uart2	arch/arm/dts/imx6ull.dtsi	/^			uart2: serial@021e8000 {$/;"	l
uart2	arch/arm/dts/imx7.dtsi	/^			uart2: serial@30890000 {$/;"	l	label:aips3
uart2	arch/arm/dts/k2l.dtsi	/^		uart2: serial@02348400 {$/;"	l
uart2	arch/arm/dts/ls1021a.dtsi	/^		uart2: serial@21d0500 {$/;"	l
uart2	arch/arm/dts/rk3036.dtsi	/^	uart2: serial@20068000 {$/;"	l
uart2	arch/arm/dts/rk3288.dtsi	/^	uart2: serial@ff690000 {$/;"	l
uart2	arch/arm/dts/rk3399.dtsi	/^	uart2: serial@ff1a0000 {$/;"	l
uart2	arch/arm/dts/sun4i-a10.dtsi	/^		uart2: serial@01c28800 {$/;"	l
uart2	arch/arm/dts/sun50i-a64.dtsi	/^		uart2: serial@1c28800 {$/;"	l
uart2	arch/arm/dts/sun5i-a10s.dtsi	/^		uart2: serial@01c28800 {$/;"	l
uart2	arch/arm/dts/sun6i-a31.dtsi	/^		uart2: serial@01c28800 {$/;"	l
uart2	arch/arm/dts/sun7i-a20.dtsi	/^		uart2: serial@01c28800 {$/;"	l
uart2	arch/arm/dts/sun8i-a23-a33.dtsi	/^		uart2: serial@01c28800 {$/;"	l
uart2	arch/arm/dts/sun8i-h3.dtsi	/^		uart2: serial@01c28800 {$/;"	l
uart2	arch/arm/dts/sun9i-a80.dtsi	/^		uart2: serial@07000800 {$/;"	l
uart2	arch/arm/dts/vf.dtsi	/^			uart2: serial@40029000 {$/;"	l	label:aips0
uart2	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 uart2;	\/*0x004*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
uart2	arch/mips/dts/pic32mzda.dtsi	/^	uart2: serial@1f822200 {$/;"	l
uart2_2pins	arch/arm/dts/sun50i-a64.dtsi	/^			uart2_2pins: uart2_2@0 {$/;"	l	label:pio
uart2_4pins	arch/arm/dts/sun50i-a64.dtsi	/^			uart2_4pins: uart2_4@0 {$/;"	l	label:pio
uart2_clk	arch/arm/dts/sama5d2.dtsi	/^					uart2_clk: uart2_clk@26 {$/;"	l
uart2_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart2_gfclk_mux: uart2_gfclk_mux {$/;"	l
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int uart2_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int uart2_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int uart2_muxvals[] = {13, 13};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int uart2_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int uart2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int uart2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int uart2_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int uart2_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
uart2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int uart2_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart2_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart2_pads	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart2_pads	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart2_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart2_pads	board/embest/mx6boards/mx6boards.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/gateworks/gw_ventana/common.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/seco/common/mx6.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pads	board/udoo/udoo.c	/^static iomux_v3_cfg_t const uart2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart2_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux uart2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart2_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux uart2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart2_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux uart2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart2_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart2_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux uart2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart2_pins	arch/arm/dts/am335x-bonegreen.dts	/^	uart2_pins: uart2_pins {$/;"	l
uart2_pins	arch/arm/dts/armada-xp.dtsi	/^	uart2_pins: uart2-pins {$/;"	l
uart2_pins	arch/arm/dts/dra7-evm.dts	/^	uart2_pins: pinmux_uart2_pins {$/;"	l
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned uart2_pins[] = {90, 91};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned uart2_pins[] = {90, 91};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned uart2_pins[] = {128, 129};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned uart2_pins[] = {113, 114};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned uart2_pins[] = {131, 132};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned uart2_pins[] = {51, 52};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned uart2_pins[] = {113, 114};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned uart2_pins[] = {96, 102};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned uart2_pins[] = {112, 113};$/;"	v	typeref:typename:const unsigned[]	file:
uart2_pins_a	arch/arm/dts/sun5i-a10s.dtsi	/^	uart2_pins_a: uart2@0 {$/;"	l
uart2_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart2_pins_a: uart2@0 {$/;"	l	label:pio
uart2_pins_rtscts	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config uart2_pins_rtscts[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
uart2_pins_txrx	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config uart2_pins_txrx[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
uart2_pins_txrx	arch/arm/mach-davinci/da850_pinmux.c	/^const struct pinmux_config uart2_pins_txrx[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
uart2_regs	arch/arm/mach-snapdragon/clock-apq8016.c	/^static const struct bcr_regs uart2_regs = {$/;"	v	typeref:typename:const struct bcr_regs	file:
uart2_xfer	arch/arm/dts/rk3036.dtsi	/^                        uart2_xfer: uart2-xfer {$/;"	l
uart2_xfer	arch/arm/dts/rk3288.dtsi	/^			uart2_xfer: uart2-xfer {$/;"	l
uart2a_xfer	arch/arm/dts/rk3399.dtsi	/^			uart2a_xfer: uart2a-xfer {$/;"	l
uart2b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int uart2b_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart2b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned uart2b_pins[] = {86, 87};$/;"	v	typeref:typename:const unsigned[]	file:
uart2b_xfer	arch/arm/dts/rk3399.dtsi	/^			uart2b_xfer: uart2b-xfer {$/;"	l
uart2c_xfer	arch/arm/dts/rk3399.dtsi	/^			uart2c_xfer: uart2c-xfer {$/;"	l
uart2cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	uart2cfg;	\/* 0xC0: APB_MISC_GP_UART2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart2cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	uart2cfg;	\/* 0xC0: APB_MISC_GP_UART2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart2cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	uart2cfg;	\/* 0xB4: APB_MISC_GP_UART2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart2cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	uart2cfg;	\/* 0xC0: APB_MISC_GP_UART2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart2cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	uart2cfg;	\/* 0xC0: APB_MISC_GP_UART2CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart2clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int uart2clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
uart2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart2clkctrl;	\/* offset 0x588 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart2clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart2clkctrl;	\/* offset 0x70 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart3	arch/arm/dts/am33xx.dtsi	/^		uart3: serial@481a6000 {$/;"	l
uart3	arch/arm/dts/am4372.dtsi	/^		uart3: serial@481a6000 {$/;"	l
uart3	arch/arm/dts/armada-xp.dtsi	/^			uart3: serial@12300 {$/;"	l
uart3	arch/arm/dts/dra7.dtsi	/^		uart3: serial@48020000 {$/;"	l
uart3	arch/arm/dts/hi6220.dtsi	/^		uart3: uart@f7113000 {$/;"	l
uart3	arch/arm/dts/imx6qdl.dtsi	/^			uart3: serial@021ec000 {$/;"	l
uart3	arch/arm/dts/imx6ull.dtsi	/^			uart3: serial@021ec000 {$/;"	l
uart3	arch/arm/dts/imx7.dtsi	/^			uart3: serial@30880000 {$/;"	l	label:aips3
uart3	arch/arm/dts/k2l.dtsi	/^		uart3:	serial@02348800 {$/;"	l
uart3	arch/arm/dts/ls1021a.dtsi	/^		uart3: serial@21d0600 {$/;"	l
uart3	arch/arm/dts/rk3288.dtsi	/^	uart3: serial@ff1b0000 {$/;"	l
uart3	arch/arm/dts/rk3399.dtsi	/^	uart3: serial@ff1b0000 {$/;"	l
uart3	arch/arm/dts/sun4i-a10.dtsi	/^		uart3: serial@01c28c00 {$/;"	l
uart3	arch/arm/dts/sun50i-a64.dtsi	/^		uart3: serial@1c28c00 {$/;"	l
uart3	arch/arm/dts/sun5i.dtsi	/^		uart3: serial@01c28c00 {$/;"	l
uart3	arch/arm/dts/sun6i-a31.dtsi	/^		uart3: serial@01c28c00 {$/;"	l
uart3	arch/arm/dts/sun7i-a20.dtsi	/^		uart3: serial@01c28c00 {$/;"	l
uart3	arch/arm/dts/sun8i-a23-a33.dtsi	/^		uart3: serial@01c28c00 {$/;"	l
uart3	arch/arm/dts/sun8i-h3.dtsi	/^		uart3: serial@01c28c00 {$/;"	l
uart3	arch/arm/dts/sun9i-a80.dtsi	/^		uart3: serial@07000c00 {$/;"	l
uart3	arch/arm/dts/vf.dtsi	/^			uart3: serial@4002a000 {$/;"	l	label:aips0
uart3	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 uart3;	\/*0x070*\/$/;"	m	struct:armd1apb1_registers	typeref:typename:u32
uart3_2pins_b	arch/arm/dts/sun50i-a64.dtsi	/^			uart3_2pins_b: uart3_2@1 {$/;"	l	label:pio
uart3_4pins_b	arch/arm/dts/sun50i-a64.dtsi	/^			uart3_4pins_b: uart3_4@1 {$/;"	l	label:pio
uart3_clk	arch/arm/dts/sama5d2.dtsi	/^					uart3_clk: uart3_clk@27 {$/;"	l
uart3_cts	arch/arm/dts/rk3288.dtsi	/^			uart3_cts: uart3-cts {$/;"	l
uart3_cts	arch/arm/dts/rk3399.dtsi	/^			uart3_cts: uart3-cts {$/;"	l
uart3_ctsn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart3_ctsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart3_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart3_gfclk_mux: uart3_gfclk_mux {$/;"	l
uart3_icev2_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart3_icev2_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int uart3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int uart3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int uart3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int uart3_muxvals[] = {2, 2};$/;"	v	typeref:typename:const int[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int uart3_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int uart3_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
uart3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int uart3_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
uart3_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const uart3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart3_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const uart3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart3_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const uart3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart3_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t const uart3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart3_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux uart3_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart3_pin_mux	board/siemens/draco/mux.c	/^static struct module_pin_mux uart3_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart3_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux uart3_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart3_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart3_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart3_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux uart3_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart3_pins	arch/arm/dts/am437x-gp-evm.dts	/^	uart3_pins: uart3_pins {$/;"	l
uart3_pins	arch/arm/dts/armada-xp.dtsi	/^	uart3_pins: uart3-pins {$/;"	l
uart3_pins	arch/arm/dts/dra7-evm.dts	/^	uart3_pins: pinmux_uart3_pins {$/;"	l
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned uart3_pins[] = {94, 95};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned uart3_pins[] = {94, 95};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned uart3_pins[] = {110, 111};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned uart3_pins[] = {88, 89};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned uart3_pins[] = {53, 54};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned uart3_pins[] = {219, 220};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned uart3_pins[] = {110, 111};$/;"	v	typeref:typename:const unsigned[]	file:
uart3_pins_a	arch/arm/dts/sun50i-a64.dtsi	/^			uart3_pins_a: uart3@0 {$/;"	l	label:pio
uart3_pins_a	arch/arm/dts/sun5i.dtsi	/^			uart3_pins_a: uart3@0 {$/;"	l	label:pio
uart3_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart3_pins_a: uart3@0 {$/;"	l	label:pio
uart3_pins_b	arch/arm/dts/sun7i-a20.dtsi	/^			uart3_pins_b: uart3@1 {$/;"	l	label:pio
uart3_pins_cts_rts_a	arch/arm/dts/sun5i.dtsi	/^			uart3_pins_cts_rts_a: uart3-cts-rts@0 {$/;"	l	label:pio
uart3_pins_default	arch/arm/dts/am335x-icev2.dts	/^	uart3_pins_default: uart3_pins_default {$/;"	l
uart3_pins_default	arch/arm/dts/am57xx-beagle-x15.dts	/^	uart3_pins_default: uart3_pins_default {$/;"	l
uart3_rts	arch/arm/dts/rk3288.dtsi	/^			uart3_rts: uart3-rts {$/;"	l
uart3_rts	arch/arm/dts/rk3399.dtsi	/^			uart3_rts: uart3-rts {$/;"	l
uart3_rtsn	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart3_rtsn;$/;"	m	struct:pad_signals	typeref:typename:int
uart3_rxd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart3_rxd;$/;"	m	struct:pad_signals	typeref:typename:int
uart3_txd	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int uart3_txd;$/;"	m	struct:pad_signals	typeref:typename:int
uart3_xfer	arch/arm/dts/rk3288.dtsi	/^			uart3_xfer: uart3-xfer {$/;"	l
uart3_xfer	arch/arm/dts/rk3399.dtsi	/^			uart3_xfer: uart3-xfer {$/;"	l
uart3b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int uart3b_muxvals[] = {10, 10};$/;"	v	typeref:typename:const int[]	file:
uart3b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned uart3b_pins[] = {181, 182};$/;"	v	typeref:typename:const unsigned[]	file:
uart3cfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	uart3cfg;	\/* 0xC4: APB_MISC_GP_UART3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart3cfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	uart3cfg;	\/* 0xC4: APB_MISC_GP_UART3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart3cfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	uart3cfg;	\/* 0xB8: APB_MISC_GP_UART3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart3cfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	uart3cfg;	\/* 0xC4: APB_MISC_GP_UART3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart3cfg	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	uart3cfg;	\/* 0xC4: APB_MISC_GP_UART3CFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
uart3clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int uart3clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
uart3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart3clkctrl;	\/* offset 0x590 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart3clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart3clkctrl;	\/* offset 0x74 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart4	arch/arm/dts/am33xx.dtsi	/^		uart4: serial@481a8000 {$/;"	l
uart4	arch/arm/dts/am4372.dtsi	/^		uart4: serial@481a8000 {$/;"	l
uart4	arch/arm/dts/dra7.dtsi	/^		uart4: serial@4806e000 {$/;"	l
uart4	arch/arm/dts/hi6220.dtsi	/^		uart4: uart@f7114000 {$/;"	l
uart4	arch/arm/dts/imx6qdl.dtsi	/^			uart4: serial@021f0000 {$/;"	l
uart4	arch/arm/dts/imx6ull.dtsi	/^			uart4: serial@021f0000 {$/;"	l
uart4	arch/arm/dts/imx7.dtsi	/^			uart4: serial@30a60000 {$/;"	l	label:aips3
uart4	arch/arm/dts/rk3288.dtsi	/^	uart4: serial@ff1c0000 {$/;"	l
uart4	arch/arm/dts/rk3399.dtsi	/^	uart4: serial@ff370000 {$/;"	l
uart4	arch/arm/dts/sun4i-a10.dtsi	/^		uart4: serial@01c29000 {$/;"	l
uart4	arch/arm/dts/sun50i-a64.dtsi	/^		uart4: serial@1c29000 {$/;"	l
uart4	arch/arm/dts/sun6i-a31.dtsi	/^		uart4: serial@01c29000 {$/;"	l
uart4	arch/arm/dts/sun7i-a20.dtsi	/^		uart4: serial@01c29000 {$/;"	l
uart4	arch/arm/dts/sun8i-a23-a33.dtsi	/^		uart4: serial@01c29000 {$/;"	l
uart4	arch/arm/dts/sun9i-a80.dtsi	/^		uart4: serial@07001000 {$/;"	l
uart4	arch/arm/dts/vf.dtsi	/^			uart4: serial@400a9000 {$/;"	l	label:aips1
uart4_2pins	arch/arm/dts/sun50i-a64.dtsi	/^			uart4_2pins: uart4_2@0 {$/;"	l	label:pio
uart4_4pins	arch/arm/dts/sun50i-a64.dtsi	/^			uart4_4pins: uart4_4@0 {$/;"	l	label:pio
uart4_clk	arch/arm/dts/sama5d2.dtsi	/^					uart4_clk: uart4_clk@28 {$/;"	l
uart4_cts	arch/arm/dts/rk3288.dtsi	/^			uart4_cts: uart4-cts {$/;"	l
uart4_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart4_gfclk_mux: uart4_gfclk_mux {$/;"	l
uart4_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/aristainetos/aristainetos-v2.c	/^iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart4_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart4_pads	board/barco/platinum/platinum_titanium.c	/^iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart4_pads	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart4_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/compulab/cm_fx6/spl.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/engicam/icorem6/icorem6.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/freescale/mx6qarm2/mx6qarm2.c	/^iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart4_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pads	board/tqc/tqma6/tqma6_wru4.c	/^static iomux_v3_cfg_t const uart4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart4_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux uart4_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart4_pin_mux	board/bosch/shc/mux.c	/^static struct module_pin_mux uart4_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart4_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux uart4_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart4_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart4_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart4_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux uart4_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart4_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart4_pins_a: uart4@0 {$/;"	l	label:pio
uart4_pins_a	arch/arm/dts/sun9i-a80.dtsi	/^			uart4_pins_a: uart4@0 {$/;"	l	label:pio
uart4_pins_b	arch/arm/dts/sun7i-a20.dtsi	/^			uart4_pins_b: uart4@1 {$/;"	l	label:pio
uart4_rts	arch/arm/dts/rk3288.dtsi	/^			uart4_rts: uart4-rts {$/;"	l
uart4_xfer	arch/arm/dts/rk3288.dtsi	/^			uart4_xfer: uart4-xfer {$/;"	l
uart4_xfer	arch/arm/dts/rk3399.dtsi	/^			uart4_xfer: uart4-xfer {$/;"	l
uart4clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int uart4clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
uart4clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart4clkctrl;	\/* offset 0x598 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart4clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart4clkctrl;	\/* offset 0x78 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart5	arch/arm/dts/am33xx.dtsi	/^		uart5: serial@481aa000 {$/;"	l
uart5	arch/arm/dts/am4372.dtsi	/^		uart5: serial@481aa000 {$/;"	l
uart5	arch/arm/dts/dra7.dtsi	/^		uart5: serial@48066000 {$/;"	l
uart5	arch/arm/dts/imx6qdl.dtsi	/^			uart5: serial@021f4000 {$/;"	l
uart5	arch/arm/dts/imx6ull.dtsi	/^			uart5: serial@021f4000 {$/;"	l
uart5	arch/arm/dts/imx7.dtsi	/^			uart5: serial@30a70000 {$/;"	l	label:aips3
uart5	arch/arm/dts/sun4i-a10.dtsi	/^		uart5: serial@01c29400 {$/;"	l
uart5	arch/arm/dts/sun6i-a31.dtsi	/^		uart5: serial@01c29400 {$/;"	l
uart5	arch/arm/dts/sun7i-a20.dtsi	/^		uart5: serial@01c29400 {$/;"	l
uart5	arch/arm/dts/sun9i-a80.dtsi	/^		uart5: serial@07001400 {$/;"	l
uart5	arch/arm/dts/vf.dtsi	/^			uart5: serial@400aa000 {$/;"	l	label:aips1
uart5_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart5_gfclk_mux: uart5_gfclk_mux {$/;"	l
uart5_pads	board/aristainetos/aristainetos-v1.c	/^iomux_v3_cfg_t const uart5_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart5_pads	board/barco/platinum/platinum_picon.c	/^iomux_v3_cfg_t const uart5_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
uart5_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const uart5_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart5_pin_mux	board/birdland/bav335x/mux.c	/^static struct module_pin_mux uart5_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart5_pin_mux	board/tcl/sl50/mux.c	/^static struct module_pin_mux uart5_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart5_pin_mux	board/ti/am335x/mux.c	/^static struct module_pin_mux uart5_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart5_pin_mux	board/vscom/baltos/mux.c	/^static struct module_pin_mux uart5_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
uart5_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart5_pins_a: uart5@0 {$/;"	l	label:pio
uart5clkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int uart5clkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
uart5clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart5clkctrl;	\/* offset 0x38 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart5clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uart5clkctrl;	\/* offset 0x5A0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
uart6	arch/arm/dts/dra7.dtsi	/^		uart6: serial@48068000 {$/;"	l
uart6	arch/arm/dts/imx6ull.dtsi	/^			uart6: serial@021fc000 {$/;"	l
uart6	arch/arm/dts/imx7.dtsi	/^			uart6: serial@30a80000 {$/;"	l	label:aips3
uart6	arch/arm/dts/sun4i-a10.dtsi	/^		uart6: serial@01c29800 {$/;"	l
uart6	arch/arm/dts/sun7i-a20.dtsi	/^		uart6: serial@01c29800 {$/;"	l
uart6	arch/mips/dts/pic32mzda.dtsi	/^	uart6: serial@1f822a00 {$/;"	l
uart6_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart6_gfclk_mux: uart6_gfclk_mux {$/;"	l
uart6_pads	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static iomux_v3_cfg_t const uart6_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart6_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart6_pins_a: uart6@0 {$/;"	l	label:pio
uart7	arch/arm/dts/dra7.dtsi	/^		uart7: serial@48420000 {$/;"	l
uart7	arch/arm/dts/imx6ull.dtsi	/^				uart7: serial@02018000 {$/;"	l	label:aips1
uart7	arch/arm/dts/imx7.dtsi	/^			uart7: serial@30a90000 {$/;"	l	label:aips3
uart7	arch/arm/dts/sun4i-a10.dtsi	/^		uart7: serial@01c29c00 {$/;"	l
uart7	arch/arm/dts/sun7i-a20.dtsi	/^		uart7: serial@01c29c00 {$/;"	l
uart7_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart7_gfclk_mux: uart7_gfclk_mux {$/;"	l
uart7_pins_a	arch/arm/dts/sun7i-a20.dtsi	/^			uart7_pins_a: uart7@0 {$/;"	l	label:pio
uart8	arch/arm/dts/dra7.dtsi	/^		uart8: serial@48422000 {$/;"	l
uart8	arch/arm/dts/imx6ull.dtsi	/^			uart8: serial@02288000 {$/;"	l	label:aips3
uart8_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart8_gfclk_mux: uart8_gfclk_mux {$/;"	l
uart8_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const uart8_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
uart9	arch/arm/dts/dra7.dtsi	/^		uart9: serial@48424000 {$/;"	l
uart9_gfclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	uart9_gfclk_mux: uart9_gfclk_mux {$/;"	l
uart_0	arch/nios2/dts/10m50_devboard.dts	/^		uart_0: serial@0x18001420 {$/;"	l	label:sopc0
uart_A	arch/arm/dts/meson-gxbb.dtsi	/^			uart_A: serial@84c0 {$/;"	l	label:cbus
uart_AO	arch/arm/dts/meson-gxbb.dtsi	/^			uart_AO: serial@4c0 {$/;"	l	label:aobus
uart_B	arch/arm/dts/meson-gxbb.dtsi	/^			uart_B: serial@84dc {$/;"	l	label:cbus
uart_C	arch/arm/dts/meson-gxbb.dtsi	/^			uart_C: serial@8700 {$/;"	l	label:cbus
uart_a_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const uart_a_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
uart_a_pins	arch/arm/dts/meson-gxbb.dtsi	/^				uart_a_pins: uart_a {$/;"	l	label:periphs.pinctrl_periphs
uart_ao_a_pins	arch/arm/dts/meson-gxbb.dtsi	/^				uart_ao_a_pins: uart_ao_a {$/;"	l	label:aobus.pinctrl_aobus
uart_ao_b_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const uart_ao_b_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
uart_ao_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const uart_ao_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
uart_asm_init	board/samsung/goni/lowlevel_init.S	/^uart_asm_init:$/;"	l
uart_asm_init	board/samsung/smdkc100/lowlevel_init.S	/^uart_asm_init:$/;"	l
uart_asr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_asr;			\/* UART_ASR_0, offset 3C *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_b_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const uart_b_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
uart_b_pins	arch/arm/dts/meson-gxbb.dtsi	/^				uart_b_pins: uart_b {$/;"	l	label:periphs.pinctrl_periphs
uart_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int uart_boot_selected(void)$/;"	f	typeref:typename:int
uart_c_groups	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const char * const uart_c_groups[] = {$/;"	v	typeref:typename:const char * const[]	file:
uart_c_pins	arch/arm/dts/meson-gxbb.dtsi	/^				uart_c_pins: uart_c {$/;"	l	label:periphs.pinctrl_periphs
uart_clk	arch/arm/dts/uniphier-pro4.dtsi	/^		uart_clk: uart_clk {$/;"	l
uart_clk	arch/arm/mach-keystone/include/mach/clock.h	/^	uart_clk,$/;"	e	enum:ext_clk_e
uart_clk	arch/powerpc/include/asm/global_data.h	/^	u32 uart_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
uart_clk_ctrl	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 uart_clk_ctrl; \/* 0x154 *\/$/;"	m	struct:slcr_regs	typeref:typename:u32
uart_config_nb	board/amcc/bamboo/bamboo.h	/^typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;$/;"	g
uart_config_nb_t	board/amcc/bamboo/bamboo.h	/^typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;$/;"	t	typeref:enum:uart_config_nb
uart_configs	arch/arm/mach-tegra/board.c	/^static int uart_configs[] = {$/;"	v	typeref:typename:int[]	file:
uart_ctl	drivers/i2c/s3c24x0_i2c.h	/^	u32	uart_ctl;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
uart_ctlr	arch/arm/include/asm/arch-tegra/uart.h	/^struct uart_ctlr {$/;"	s
uart_ctrl_regs	arch/arm/include/asm/arch-lpc32xx/uart.h	/^struct uart_ctrl_regs {$/;"	s
uart_cts_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_cts_a_pins[]	= { PIN(GPIOX_14, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_cts_ao_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_cts_ao_a_pins[]	= { PIN(GPIOAO_2, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_cts_ao_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_cts_ao_b_pins[]	= { PIN(GPIOAO_2, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_cts_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_cts_b_pins[]	= { PIN(GPIODV_26, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_cts_c_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_cts_c_pins[]	= { PIN(GPIOX_11, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_early_putc	drivers/serial/serial_bfin.c	/^inline void uart_early_putc(uint32_t uart_base, const char c)$/;"	f	typeref:typename:void
uart_early_puts	drivers/serial/serial_bfin.c	/^void uart_early_puts(const char *s)$/;"	f	typeref:typename:void
uart_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 uart_freq;		\/* offset 0x30 *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
uart_freq	arch/sparc/include/asm/global_data.h	/^	unsigned int uart_freq;$/;"	m	struct:arch_global_data	typeref:typename:unsigned int
uart_getc	drivers/serial/serial_bfin.c	/^static int uart_getc(uint32_t uart_base)$/;"	f	typeref:typename:int	file:
uart_h	arch/m68k/include/asm/uart.h	/^#define	uart_h$/;"	d
uart_ier_dlab_0	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_ier_dlab_0;		\/* UART_IER_DLAB_0_0, offset 04 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_iir_fcr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_iir_fcr;		\/* UART_IIR_FCR_0, offset 08 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_init	arch/blackfin/include/asm/serial1.h	/^static inline int uart_init(uint32_t uart_base)$/;"	f	typeref:typename:int
uart_init	arch/blackfin/include/asm/serial4.h	/^static inline int uart_init(uint32_t uart_base)$/;"	f	typeref:typename:int
uart_irda_csr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_irda_csr;		\/* UART_IRDA_CSR_0, offset 20 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_lcr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_lcr;			\/* UART_LCR_0, offset 0C *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_lsr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_lsr;			\/* UART_LSR_0, offset 14 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_lsr_clear	drivers/serial/serial_bfin.c	/^static void uart_lsr_clear(uint32_t uart_base)$/;"	f	typeref:typename:void	file:
uart_lsr_read	drivers/serial/serial_bfin.c	/^static inline uart_lsr_t uart_lsr_read(uint32_t uart_base)$/;"	f	typeref:typename:uart_lsr_t	file:
uart_lsr_read	drivers/serial/serial_bfin.c	/^static uart_lsr_t uart_lsr_read(uint32_t uart_base)$/;"	f	typeref:typename:uart_lsr_t	file:
uart_lsr_save	drivers/serial/serial_bfin.c	/^static uart_lsr_t uart_lsr_save;$/;"	v	typeref:typename:uart_lsr_t	file:
uart_lsr_t	arch/blackfin/include/asm/serial1.h	/^#define uart_lsr_t /;"	d
uart_lsr_t	arch/blackfin/include/asm/serial4.h	/^#define uart_lsr_t /;"	d
uart_mcr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_mcr;			\/* UART_MCR_0, offset 10 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_msr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_msr;			\/* UART_MSR_0, offset 18 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_pins	board/davinci/da8xxevm/omapl138_lcdk.c	/^static const struct pinmux_config uart_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
uart_pins	board/davinci/ea20/ea20.c	/^static const struct pinmux_config uart_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]	file:
uart_pll_config	board/ti/ks2_evm/board_k2g.c	/^static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};$/;"	v	typeref:struct:pll_init_data	file:
uart_port	drivers/serial/serial_sh.h	/^struct uart_port {$/;"	s
uart_port_conf	arch/m68k/cpu/mcf5227x/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_port_conf	arch/m68k/cpu/mcf523x/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_port_conf	arch/m68k/cpu/mcf52x2/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_port_conf	arch/m68k/cpu/mcf530x/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_port_conf	arch/m68k/cpu/mcf532x/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_port_conf	arch/m68k/cpu/mcf5445x/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_port_conf	arch/m68k/cpu/mcf547x_8x/cpu_init.c	/^void uart_port_conf(int port)$/;"	f	typeref:typename:void
uart_post_test	drivers/serial/serial.c	/^int uart_post_test(int flags)$/;"	f	typeref:typename:__weak int
uart_post_test	post/cpu/mpc8xx/uart.c	/^int uart_post_test (int flags)$/;"	f	typeref:typename:int
uart_post_test	post/cpu/ppc4xx/uart.c	/^int uart_post_test (int flags)$/;"	f	typeref:typename:int
uart_putc	drivers/serial/serial_bfin.c	/^static void uart_putc(uint32_t uart_base, const char c)$/;"	f	typeref:typename:void	file:
uart_puts	drivers/serial/serial_bfin.c	/^static void uart_puts(uint32_t uart_base, const char *s)$/;"	f	typeref:typename:void	file:
uart_reserved	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_reserved[6];		\/* Reserved, unused, offset 24-38*\/$/;"	m	struct:uart_ctlr	typeref:typename:uint[6]
uart_rts_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rts_a_pins[]	= { PIN(GPIOX_15, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rts_ao_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rts_ao_a_pins[]	= { PIN(GPIOAO_3, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rts_ao_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rts_ao_b_pins[]	= { PIN(GPIOAO_3, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rts_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rts_b_pins[]	= { PIN(GPIODV_27, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rts_c_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rts_c_pins[]	= { PIN(GPIOX_12, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rx_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rx_a_pins[]	= { PIN(GPIOX_13, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rx_ao_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rx_ao_a_pins[]	= { PIN(GPIOAO_1, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rx_ao_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rx_ao_b_pins[]	= { PIN(GPIOAO_1, 0),$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rx_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rx_b_pins[]	= { PIN(GPIODV_25, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_rx_c_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_rx_c_pins[]	= { PIN(GPIOY_14, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_sel	board/freescale/ls1043ardb/cpld.h	/^	u8 uart_sel;		\/* 0x9 - *\/$/;"	m	struct:cpld_data	typeref:typename:u8
uart_sel	board/freescale/ls1046ardb/cpld.h	/^	u8 uart_sel;		\/* 0x9 - UART1 Connection Control Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
uart_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void uart_selection_in_fpga(uart_config_nb_t uart_config)$/;"	f	typeref:typename:void
uart_setup_gpio	board/st/stm32f429-discovery/stm32f429-discovery.c	/^int uart_setup_gpio(void)$/;"	f	typeref:typename:int
uart_setup_gpio	board/st/stm32f746-disco/stm32f746-disco.c	/^int uart_setup_gpio(void)$/;"	f	typeref:typename:int
uart_soft_reset	arch/arm/cpu/armv7/am33xx/board.c	/^static void uart_soft_reset(void)$/;"	f	typeref:typename:void	file:
uart_spr	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_spr;			\/* UART_SPR_0, offset 1C *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_synth_clk	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 uart_synth_clk;	\/* 0x64 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
uart_sys	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct uart_sys {$/;"	s
uart_t	arch/m68k/include/asm/uart.h	/^} uart_t;$/;"	t	typeref:struct:uart
uart_thr_dlab_0	arch/arm/include/asm/arch-tegra/uart.h	/^	uint uart_thr_dlab_0;		\/* UART_THR_DLAB_0_0, offset 00 *\/$/;"	m	struct:uart_ctlr	typeref:typename:uint
uart_tstc	drivers/serial/serial_bfin.c	/^static int uart_tstc(uint32_t uart_base)$/;"	f	typeref:typename:int	file:
uart_tx_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_tx_a_pins[]	= { PIN(GPIOX_12, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_tx_ao_a_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_tx_ao_a_pins[]	= { PIN(GPIOAO_0, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_tx_ao_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_tx_ao_b_pins[]	= { PIN(GPIOAO_0, 0) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_tx_b_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_tx_b_pins[]	= { PIN(GPIODV_24, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_tx_c_pins	drivers/pinctrl/meson/pinctrl-meson-gxbb.c	/^static const unsigned int uart_tx_c_pins[]	= { PIN(GPIOY_13, EE_OFF) };$/;"	v	typeref:typename:const unsigned int[]	file:
uart_zynq	drivers/serial/serial_zynq.c	/^struct uart_zynq {$/;"	s	file:
uarta	arch/arm/dts/tegra114.dtsi	/^	uarta: serial@70006000 {$/;"	l
uarta	arch/arm/dts/tegra124.dtsi	/^	uarta: serial@70006000 {$/;"	l
uarta	arch/arm/dts/tegra186.dtsi	/^	uarta: serial@3100000 {$/;"	l
uarta	arch/arm/dts/tegra20.dtsi	/^	uarta: serial@70006000 {$/;"	l
uarta	arch/arm/dts/tegra210.dtsi	/^	uarta: serial@70006000 {$/;"	l
uarta	arch/arm/dts/tegra30.dtsi	/^	uarta: serial@70006000 {$/;"	l
uartb	arch/arm/dts/tegra114.dtsi	/^	uartb: serial@70006040 {$/;"	l
uartb	arch/arm/dts/tegra124.dtsi	/^	uartb: serial@70006040 {$/;"	l
uartb	arch/arm/dts/tegra20.dtsi	/^	uartb: serial@70006040 {$/;"	l
uartb	arch/arm/dts/tegra210.dtsi	/^	uartb: serial@70006040 {$/;"	l
uartb	arch/arm/dts/tegra30.dtsi	/^	uartb: serial@70006040 {$/;"	l
uartc	arch/arm/dts/tegra114.dtsi	/^	uartc: serial@70006200 {$/;"	l
uartc	arch/arm/dts/tegra124.dtsi	/^	uartc: serial@70006200 {$/;"	l
uartc	arch/arm/dts/tegra20.dtsi	/^	uartc: serial@70006200 {$/;"	l
uartc	arch/arm/dts/tegra210.dtsi	/^	uartc: serial@70006200 {$/;"	l
uartc	arch/arm/dts/tegra30.dtsi	/^	uartc: serial@70006200 {$/;"	l
uartclk	drivers/serial/altera_uart.c	/^	unsigned int uartclk;$/;"	m	struct:altera_uart_platdata	typeref:typename:unsigned int	file:
uartclk	drivers/serial/serial_arc.c	/^	unsigned int uartclk;$/;"	m	struct:arc_serial_platdata	typeref:typename:unsigned int	file:
uartclk	drivers/serial/serial_pic32.c	/^	ulong uartclk;$/;"	m	struct:pic32_uart_priv	typeref:typename:ulong	file:
uartclk	drivers/serial/serial_uniphier.c	/^	unsigned int uartclk;$/;"	m	struct:uniphier_serial_private_data	typeref:typename:unsigned int	file:
uartclk_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 uartclk_ctrl;	\/* UART Clock Control Register		*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
uartcr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 uartcr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
uartcto	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 uartcto;$/;"	m	struct:linflex_fsl	typeref:typename:u32
uartd	arch/arm/dts/tegra114.dtsi	/^	uartd: serial@70006300 {$/;"	l
uartd	arch/arm/dts/tegra124.dtsi	/^	uartd: serial@70006300 {$/;"	l
uartd	arch/arm/dts/tegra20.dtsi	/^	uartd: serial@70006300 {$/;"	l
uartd	arch/arm/dts/tegra210.dtsi	/^	uartd: serial@70006300 {$/;"	l
uartd	arch/arm/dts/tegra30.dtsi	/^	uartd: serial@70006300 {$/;"	l
uarte	arch/arm/dts/tegra20.dtsi	/^	uarte: serial@70006400 {$/;"	l
uarte	arch/arm/dts/tegra30.dtsi	/^	uarte: serial@70006400 {$/;"	l
uarthdcp_xfer	arch/arm/dts/rk3399.dtsi	/^			uarthdcp_xfer: uarthdcp-xfer {$/;"	l
uartlite	drivers/serial/serial_xuartlite.c	/^struct uartlite {$/;"	s	file:
uartlite_platdata	drivers/serial/serial_xuartlite.c	/^struct uartlite_platdata {$/;"	s	file:
uartlite_serial_getc	drivers/serial/serial_xuartlite.c	/^static int uartlite_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uartlite_serial_ids	drivers/serial/serial_xuartlite.c	/^static const struct udevice_id uartlite_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uartlite_serial_ofdata_to_platdata	drivers/serial/serial_xuartlite.c	/^static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uartlite_serial_ops	drivers/serial/serial_xuartlite.c	/^static const struct dm_serial_ops uartlite_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
uartlite_serial_pending	drivers/serial/serial_xuartlite.c	/^static int uartlite_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
uartlite_serial_probe	drivers/serial/serial_xuartlite.c	/^static int uartlite_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uartlite_serial_putc	drivers/serial/serial_xuartlite.c	/^static int uartlite_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
uartpto	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 uartpto;$/;"	m	struct:linflex_fsl	typeref:typename:u32
uartsr	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 uartsr;$/;"	m	struct:linflex_fsl	typeref:typename:u32
uartsyscfg	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uartsyscfg;	\/* offset 0x54 *\/$/;"	m	struct:uart_sys	typeref:typename:unsigned int
uartsyssts	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int uartsyssts;	\/* offset 0x58 *\/$/;"	m	struct:uart_sys	typeref:typename:unsigned int
uaw0	drivers/net/xilinx_axi_emac.c	/^	u32 uaw0; \/* 0x700: Unicast address word 0 *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
uaw1	drivers/net/xilinx_axi_emac.c	/^	u32 uaw1; \/* 0x704: Unicast address word 1 *\/$/;"	m	struct:axi_regs	typeref:typename:u32	file:
uawl	drivers/net/xilinx_ll_temac.h	/^	u32 uawl;	\/* Unicast Address Word Lower *\/$/;"	m	struct:temac_reg	typeref:typename:u32
uawu	drivers/net/xilinx_ll_temac.h	/^	u32 uawu;	\/* Unicast Address Word Upper *\/$/;"	m	struct:temac_reg	typeref:typename:u32
ub_dev_close	examples/api/glue.c	/^int ub_dev_close(int handle)$/;"	f	typeref:typename:int
ub_dev_enum	examples/api/glue.c	/^int ub_dev_enum(void)$/;"	f	typeref:typename:int
ub_dev_get	examples/api/glue.c	/^struct device_info * ub_dev_get(int i)$/;"	f	typeref:struct:device_info *
ub_dev_open	examples/api/glue.c	/^int ub_dev_open(int handle)$/;"	f	typeref:typename:int
ub_dev_read	examples/api/glue.c	/^int ub_dev_read(int handle, void *buf, lbasize_t len, lbastart_t start,$/;"	f	typeref:typename:int
ub_dev_recv	examples/api/glue.c	/^int ub_dev_recv(int handle, void *buf, int len, int *rlen)$/;"	f	typeref:typename:int
ub_dev_send	examples/api/glue.c	/^int ub_dev_send(int handle, void *buf, int len)$/;"	f	typeref:typename:int
ub_display_clear	examples/api/glue.c	/^void ub_display_clear(void)$/;"	f	typeref:typename:void
ub_display_draw_bitmap	examples/api/glue.c	/^int ub_display_draw_bitmap(ulong bitmap, int x, int y)$/;"	f	typeref:typename:int
ub_display_get_info	examples/api/glue.c	/^int ub_display_get_info(int type, struct display_info *di)$/;"	f	typeref:typename:int
ub_env_enum	examples/api/glue.c	/^const char * ub_env_enum(const char *last)$/;"	f	typeref:typename:const char *
ub_env_get	examples/api/glue.c	/^char * ub_env_get(const char *name)$/;"	f	typeref:typename:char *
ub_env_set	examples/api/glue.c	/^void ub_env_set(const char *name, char *value)$/;"	f	typeref:typename:void
ub_get_sys_info	examples/api/glue.c	/^struct sys_info * ub_get_sys_info(void)$/;"	f	typeref:struct:sys_info *
ub_get_timer	examples/api/glue.c	/^unsigned long ub_get_timer(unsigned long base)$/;"	f	typeref:typename:unsigned long
ub_getc	examples/api/glue.c	/^int ub_getc(void)$/;"	f	typeref:typename:int
ub_guid_sum	include/zfs/uberblock_impl.h	/^	uint64_t	ub_guid_sum;	\/* sum of all vdev guids	*\/$/;"	m	struct:uberblock	typeref:typename:uint64_t
ub_magic	include/zfs/uberblock_impl.h	/^	uint64_t	ub_magic;	\/* UBERBLOCK_MAGIC		*\/$/;"	m	struct:uberblock	typeref:typename:uint64_t
ub_putc	examples/api/glue.c	/^void ub_putc(char c)$/;"	f	typeref:typename:void
ub_puts	examples/api/glue.c	/^void ub_puts(const char *s)$/;"	f	typeref:typename:void
ub_reset	examples/api/glue.c	/^void ub_reset(void)$/;"	f	typeref:typename:void
ub_rootbp	include/zfs/uberblock_impl.h	/^	blkptr_t	ub_rootbp;	\/* MOS objset_phys_t		*\/$/;"	m	struct:uberblock	typeref:typename:blkptr_t
ub_timestamp	include/zfs/uberblock_impl.h	/^	uint64_t	ub_timestamp;	\/* UTC time of last sync	*\/$/;"	m	struct:uberblock	typeref:typename:uint64_t
ub_tstc	examples/api/glue.c	/^int ub_tstc(void)$/;"	f	typeref:typename:int
ub_txg	include/zfs/uberblock_impl.h	/^	uint64_t	ub_txg;		\/* txg of last sync		*\/$/;"	m	struct:uberblock	typeref:typename:uint64_t
ub_udelay	examples/api/glue.c	/^void ub_udelay(unsigned long usec)$/;"	f	typeref:typename:void
ub_version	include/zfs/uberblock_impl.h	/^	uint64_t	ub_version;	\/* ZFS_VERSION			*\/$/;"	m	struct:uberblock	typeref:typename:uint64_t
ubcr12	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ubcr12; \/* 0x078 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ubcr14	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ubcr14; \/* 0x07c *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ubcr2	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ubcr2;  \/* 0x068 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ubcr4	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ubcr4;  \/* 0x06c *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ubcr7	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ubcr7;  \/* 0x070 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ubcr9	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ubcr9;  \/* 0x074 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ubdh	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 ubdh;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ubdh	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 ubdh;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ubdh	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 ubdh;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ubdl	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 ubdl;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ubdl	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 ubdl;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ubdl	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 ubdl;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uberblock	include/zfs/uberblock_impl.h	/^typedef struct uberblock {$/;"	s
uberblock_t	include/zfs/uberblock_impl.h	/^} uberblock_t;$/;"	t	typeref:struct:uberblock
uberblock_verify	fs/zfs/zfs.c	/^uberblock_verify(uberblock_t *uber, int offset, struct zfs_data *data)$/;"	f	typeref:typename:int	file:
ubg1	arch/m68k/include/asm/uart.h	/^	u8 ubg1;		\/* 0x18 Counter Timer Upper Register *\/$/;"	m	struct:uart	typeref:typename:u8
ubg2	arch/m68k/include/asm/uart.h	/^	u8 ubg2;		\/* 0x1c Counter Timer Lower Register *\/$/;"	m	struct:uart	typeref:typename:u8
ubi	cmd/ubi.c	/^static struct ubi_device *ubi;$/;"	v	typeref:struct:ubi_device *	file:
ubi	drivers/mtd/ubi/ubi.h	/^	struct ubi_device *ubi;$/;"	m	struct:ubi_volume	typeref:struct:ubi_device *
ubi	fs/ubifs/ubifs.h	/^	struct ubi_volume_desc *ubi;$/;"	m	struct:ubifs_info	typeref:struct:ubi_volume_desc *
ubi	include/dfu.h	/^	unsigned int ubi;$/;"	m	struct:nand_internal_data	typeref:typename:unsigned int
ubi	include/ubispl.h	/^	struct ubi_scan_info	*ubi;$/;"	m	struct:ubispl_info	typeref:struct:ubi_scan_info *
ubi_add_peb_to_vol	drivers/mtd/ubispl/ubispl.c	/^static int ubi_add_peb_to_vol(struct ubi_scan_info *ubi,$/;"	f	typeref:typename:int	file:
ubi_add_to_av	drivers/mtd/ubi/attach.c	/^int ubi_add_to_av(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum,$/;"	f	typeref:typename:int
ubi_add_volume	drivers/mtd/ubi/vmt.c	/^int ubi_add_volume(struct ubi_device *ubi, struct ubi_volume *vol)$/;"	f	typeref:typename:int
ubi_ainf_peb	drivers/mtd/ubi/ubi.h	/^struct ubi_ainf_peb {$/;"	s
ubi_ainf_volume	drivers/mtd/ubi/ubi.h	/^struct ubi_ainf_volume {$/;"	s
ubi_assert	drivers/mtd/ubi/debug.h	/^#define ubi_assert(/;"	d
ubi_attach	drivers/mtd/ubi/attach.c	/^int ubi_attach(struct ubi_device *ubi, int force_scan)$/;"	f	typeref:typename:int
ubi_attach_fastmap	drivers/mtd/ubi/fastmap.c	/^static int ubi_attach_fastmap(struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
ubi_attach_fastmap	drivers/mtd/ubispl/ubispl.c	/^static int ubi_attach_fastmap(struct ubi_scan_info *ubi,$/;"	f	typeref:typename:int	file:
ubi_attach_info	drivers/mtd/ubi/ubi.h	/^struct ubi_attach_info {$/;"	s
ubi_attach_info	drivers/mtd/ubispl/ubispl.c	/^struct ubi_attach_info {$/;"	s	file:
ubi_attach_mtd_dev	drivers/mtd/ubi/build.c	/^int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,$/;"	f	typeref:typename:int
ubi_attach_req	include/mtd/ubi-user.h	/^struct ubi_attach_req {$/;"	s
ubi_blkcreate_req	include/mtd/ubi-user.h	/^struct ubi_blkcreate_req {$/;"	s
ubi_calc_data_len	drivers/mtd/ubi/misc.c	/^int ubi_calc_data_len(const struct ubi_device *ubi, const void *buf,$/;"	f	typeref:typename:int
ubi_calc_fm_size	drivers/mtd/ubi/fastmap.c	/^size_t ubi_calc_fm_size(struct ubi_device *ubi)$/;"	f	typeref:typename:size_t
ubi_calc_fm_size	drivers/mtd/ubispl/ubispl.c	/^static size_t ubi_calc_fm_size(struct ubi_scan_info *ubi)$/;"	f	typeref:typename:size_t	file:
ubi_calculate_reserved	drivers/mtd/ubi/misc.c	/^void ubi_calculate_reserved(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_change_vtbl_record	drivers/mtd/ubi/vtbl.c	/^int ubi_change_vtbl_record(struct ubi_device *ubi, int idx,$/;"	f	typeref:typename:int
ubi_check	cmd/ubi.c	/^static int ubi_check(char *name)$/;"	f	typeref:typename:int	file:
ubi_check_pattern	drivers/mtd/ubi/misc.c	/^int ubi_check_pattern(const void *buf, uint8_t patt, int size)$/;"	f	typeref:typename:int
ubi_check_volume	drivers/mtd/ubi/misc.c	/^int ubi_check_volume(struct ubi_device *ubi, int vol_id)$/;"	f	typeref:typename:int
ubi_check_volumename	cmd/ubi.c	/^static int ubi_check_volumename(const struct ubi_volume *vol, char *name)$/;"	f	typeref:typename:int	file:
ubi_class	drivers/mtd/ubi/build.c	/^struct class ubi_class = {$/;"	v	typeref:struct:class
ubi_class_attrs	drivers/mtd/ubi/build.c	/^static struct class_attribute ubi_class_attrs[] = {$/;"	v	typeref:struct:class_attribute[]	file:
ubi_close_volume	drivers/mtd/ubi/kapi.c	/^void ubi_close_volume(struct ubi_volume_desc *desc)$/;"	f	typeref:typename:void
ubi_compare_lebs	drivers/mtd/ubi/attach.c	/^int ubi_compare_lebs(struct ubi_device *ubi, const struct ubi_ainf_peb *aeb,$/;"	f	typeref:typename:int
ubi_create_gluebi	drivers/mtd/ubi/ubi.h	/^#define ubi_create_gluebi(/;"	d
ubi_create_vol	cmd/ubi.c	/^static int ubi_create_vol(char *volume, int64_t size, int dynamic, int vol_id)$/;"	f	typeref:typename:int	file:
ubi_create_volume	drivers/mtd/ubi/vmt.c	/^int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)$/;"	f	typeref:typename:int
ubi_ctrl_cdev	drivers/mtd/ubi/build.c	/^static struct miscdevice ubi_ctrl_cdev = {$/;"	v	typeref:struct:miscdevice	file:
ubi_dbg	drivers/mtd/ubispl/ubispl.h	/^#define ubi_dbg(/;"	d
ubi_dbg_chk_fastmap	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_chk_fastmap(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_chk_gen	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_chk_gen(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_chk_io	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_chk_io(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_is_bgt_disabled	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_is_bgt_disabled(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_is_bitflip	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_is_bitflip(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_is_erase_failure	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_is_erase_failure(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_is_write_failure	drivers/mtd/ubi/debug.h	/^static inline int ubi_dbg_is_write_failure(const struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_dbg_msg	drivers/mtd/ubi/debug.h	/^#define ubi_dbg_msg(/;"	d
ubi_dbg_power_cut	drivers/mtd/ubi/debug.c	/^int ubi_dbg_power_cut(struct ubi_device *ubi, int caller)$/;"	f	typeref:typename:int
ubi_dbg_print_hex_dump	drivers/mtd/ubi/debug.h	/^#define ubi_dbg_print_hex_dump(/;"	d
ubi_debug_info	drivers/mtd/ubi/ubi.h	/^struct ubi_debug_info {$/;"	s
ubi_debugfs_exit	drivers/mtd/ubi/debug.c	/^void ubi_debugfs_exit(void)$/;"	f	typeref:typename:void
ubi_debugfs_exit_dev	drivers/mtd/ubi/debug.c	/^void ubi_debugfs_exit_dev(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_debugfs_init	drivers/mtd/ubi/debug.c	/^int ubi_debugfs_init(void)$/;"	f	typeref:typename:int
ubi_debugfs_init_dev	drivers/mtd/ubi/debug.c	/^int ubi_debugfs_init_dev(struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_destroy_gluebi	drivers/mtd/ubi/ubi.h	/^static inline int ubi_destroy_gluebi(struct ubi_volume *vol)$/;"	f	typeref:typename:int
ubi_detach	cmd/ubi.c	/^int ubi_detach(void)$/;"	f	typeref:typename:int
ubi_detach_mtd_dev	drivers/mtd/ubi/build.c	/^int ubi_detach_mtd_dev(int ubi_num, int anyway)$/;"	f	typeref:typename:int
ubi_dev	cmd/ubi.c	/^static struct selected_dev ubi_dev;$/;"	v	typeref:struct:selected_dev	file:
ubi_dev_attrs	drivers/mtd/ubi/build.c	/^static struct attribute *ubi_dev_attrs[] = {$/;"	v	typeref:struct:attribute * []	file:
ubi_dev_scan	cmd/ubi.c	/^static int ubi_dev_scan(struct mtd_info *info, char *ubidev,$/;"	f	typeref:typename:int	file:
ubi_device	drivers/mtd/ubi/ubi.h	/^struct ubi_device {$/;"	s
ubi_device_info	include/linux/mtd/ubi.h	/^struct ubi_device_info {$/;"	s
ubi_devices	drivers/mtd/ubi/build.c	/^static struct ubi_device *ubi_devices[UBI_MAX_DEVICES];$/;"	v	typeref:struct:ubi_device * []	file:
ubi_devices	drivers/mtd/ubi/build.c	/^struct ubi_device *ubi_devices[UBI_MAX_DEVICES];$/;"	v	typeref:struct:ubi_device * []
ubi_do_get_device_info	drivers/mtd/ubi/kapi.c	/^void ubi_do_get_device_info(struct ubi_device *ubi, struct ubi_device_info *di)$/;"	f	typeref:typename:void
ubi_do_get_volume_info	drivers/mtd/ubi/kapi.c	/^void ubi_do_get_volume_info(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:void
ubi_dump_aeb	drivers/mtd/ubi/debug.c	/^void ubi_dump_aeb(const struct ubi_ainf_peb *aeb, int type)$/;"	f	typeref:typename:void
ubi_dump_av	drivers/mtd/ubi/debug.c	/^void ubi_dump_av(const struct ubi_ainf_volume *av)$/;"	f	typeref:typename:void
ubi_dump_ec_hdr	drivers/mtd/ubi/debug.c	/^void ubi_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr)$/;"	f	typeref:typename:void
ubi_dump_flash	drivers/mtd/ubi/debug.c	/^void ubi_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len)$/;"	f	typeref:typename:void
ubi_dump_mkvol_req	drivers/mtd/ubi/debug.c	/^void ubi_dump_mkvol_req(const struct ubi_mkvol_req *req)$/;"	f	typeref:typename:void
ubi_dump_vid_hdr	drivers/mtd/ubi/debug.c	/^void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr)$/;"	f	typeref:typename:void
ubi_dump_vol_info	drivers/mtd/ubi/debug.c	/^void ubi_dump_vol_info(const struct ubi_volume *vol)$/;"	f	typeref:typename:void
ubi_dump_vtbl_record	drivers/mtd/ubi/debug.c	/^void ubi_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx)$/;"	f	typeref:typename:void
ubi_early_get_peb	drivers/mtd/ubi/attach.c	/^struct ubi_ainf_peb *ubi_early_get_peb(struct ubi_device *ubi,$/;"	f	typeref:struct:ubi_ainf_peb *
ubi_eba_atomic_leb_change	drivers/mtd/ubi/eba.c	/^int ubi_eba_atomic_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_eba_copy_leb	drivers/mtd/ubi/eba.c	/^int ubi_eba_copy_leb(struct ubi_device *ubi, int from, int to,$/;"	f	typeref:typename:int
ubi_eba_init	drivers/mtd/ubi/eba.c	/^int ubi_eba_init(struct ubi_device *ubi, struct ubi_attach_info *ai)$/;"	f	typeref:typename:int
ubi_eba_read_leb	drivers/mtd/ubi/eba.c	/^int ubi_eba_read_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,$/;"	f	typeref:typename:int
ubi_eba_read_leb_sg	drivers/mtd/ubi/eba.c	/^int ubi_eba_read_leb_sg(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_eba_unmap_leb	drivers/mtd/ubi/eba.c	/^int ubi_eba_unmap_leb(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_eba_write_leb	drivers/mtd/ubi/eba.c	/^int ubi_eba_write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,$/;"	f	typeref:typename:int
ubi_eba_write_leb_st	drivers/mtd/ubi/eba.c	/^int ubi_eba_write_leb_st(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_ec_hdr	drivers/mtd/ubi/ubi-media.h	/^struct ubi_ec_hdr {$/;"	s
ubi_enable_dbg_chk_fastmap	drivers/mtd/ubi/debug.h	/^static inline void ubi_enable_dbg_chk_fastmap(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_ensure_anchor_pebs	drivers/mtd/ubi/fastmap-wl.c	/^int ubi_ensure_anchor_pebs(struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_enumerate_volumes	drivers/mtd/ubi/build.c	/^int ubi_enumerate_volumes(struct notifier_block *nb)$/;"	f	typeref:typename:int
ubi_err	drivers/mtd/ubi/ubi.h	/^#define ubi_err(/;"	d
ubi_err	drivers/mtd/ubispl/ubispl.h	/^#define ubi_err(/;"	d
ubi_exit	drivers/mtd/ubi/build.c	/^static void __exit ubi_exit(void)$/;"	f	typeref:typename:void __exit	file:
ubi_fastmap_close	drivers/mtd/ubi/fastmap-wl.c	/^static void ubi_fastmap_close(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
ubi_fastmap_close	drivers/mtd/ubi/wl.h	/^static inline void ubi_fastmap_close(struct ubi_device *ubi) { }$/;"	f	typeref:typename:void
ubi_fastmap_init	drivers/mtd/ubi/wl.h	/^static inline void ubi_fastmap_init(struct ubi_device *ubi, int *count) { }$/;"	f	typeref:typename:void
ubi_fastmap_init	drivers/mtd/ubi/wl.h	/^static inline void ubi_fastmap_init(struct ubi_device *ubi, int *count)$/;"	f	typeref:typename:void
ubi_fastmap_layout	drivers/mtd/ubi/ubi.h	/^struct ubi_fastmap_layout {$/;"	s
ubi_fastmap_layout	drivers/mtd/ubispl/ubi-wrapper.h	/^struct ubi_fastmap_layout {$/;"	s
ubi_find_av	drivers/mtd/ubi/attach.c	/^struct ubi_ainf_volume *ubi_find_av(const struct ubi_attach_info *ai,$/;"	f	typeref:struct:ubi_ainf_volume *
ubi_find_volume	cmd/ubi.c	/^static struct ubi_volume *ubi_find_volume(char *volume)$/;"	f	typeref:struct:ubi_volume *	file:
ubi_flush	drivers/mtd/ubi/kapi.c	/^int ubi_flush(int ubi_num, int vol_id, int lnum)$/;"	f	typeref:typename:int
ubi_fm_eba	drivers/mtd/ubi/ubi-media.h	/^struct ubi_fm_eba {$/;"	s
ubi_fm_ec	drivers/mtd/ubi/ubi-media.h	/^struct ubi_fm_ec {$/;"	s
ubi_fm_hdr	drivers/mtd/ubi/ubi-media.h	/^struct ubi_fm_hdr {$/;"	s
ubi_fm_pool	drivers/mtd/ubi/ubi.h	/^struct ubi_fm_pool {$/;"	s
ubi_fm_pool	drivers/mtd/ubispl/ubi-wrapper.h	/^struct ubi_fm_pool {$/;"	s
ubi_fm_sb	drivers/mtd/ubi/ubi-media.h	/^struct ubi_fm_sb {$/;"	s
ubi_fm_scan_pool	drivers/mtd/ubi/ubi-media.h	/^struct ubi_fm_scan_pool {$/;"	s
ubi_fm_volhdr	drivers/mtd/ubi/ubi-media.h	/^struct ubi_fm_volhdr {$/;"	s
ubi_for_each_free_peb	drivers/mtd/ubi/ubi.h	/^#define ubi_for_each_free_peb(/;"	d
ubi_for_each_protected_peb	drivers/mtd/ubi/ubi.h	/^#define ubi_for_each_protected_peb(/;"	d
ubi_for_each_scrub_peb	drivers/mtd/ubi/ubi.h	/^#define ubi_for_each_scrub_peb(/;"	d
ubi_for_each_used_peb	drivers/mtd/ubi/ubi.h	/^#define ubi_for_each_used_peb(/;"	d
ubi_free_internal_volumes	drivers/mtd/ubi/build.c	/^void ubi_free_internal_volumes(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_free_vid_hdr	drivers/mtd/ubi/ubi.h	/^static inline void ubi_free_vid_hdr(const struct ubi_device *ubi,$/;"	f	typeref:typename:void
ubi_free_volume	drivers/mtd/ubi/vmt.c	/^void ubi_free_volume(struct ubi_device *ubi, struct ubi_volume *vol)$/;"	f	typeref:typename:void
ubi_get_by_major	drivers/mtd/ubi/build.c	/^struct ubi_device *ubi_get_by_major(int major)$/;"	f	typeref:struct:ubi_device *
ubi_get_compat	drivers/mtd/ubi/eba.c	/^static int ubi_get_compat(const struct ubi_device *ubi, int vol_id)$/;"	f	typeref:typename:int	file:
ubi_get_device	drivers/mtd/ubi/build.c	/^struct ubi_device *ubi_get_device(int ubi_num)$/;"	f	typeref:struct:ubi_device *
ubi_get_device_info	drivers/mtd/ubi/kapi.c	/^int ubi_get_device_info(int ubi_num, struct ubi_device_info *di)$/;"	f	typeref:typename:int
ubi_get_volume_info	drivers/mtd/ubi/kapi.c	/^void ubi_get_volume_info(struct ubi_volume_desc *desc,$/;"	f	typeref:typename:void
ubi_gluebi_updated	drivers/mtd/ubi/ubi.h	/^#define ubi_gluebi_updated(/;"	d
ubi_info	cmd/ubi.c	/^static int ubi_info(int layout)$/;"	f	typeref:typename:int	file:
ubi_init	drivers/mtd/ubi/build.c	/^static int __init ubi_init(void)$/;"	f	typeref:typename:int __init	file:
ubi_initialized	cmd/ubi.c	/^static int ubi_initialized;$/;"	v	typeref:typename:int	file:
ubi_io_is_bad	drivers/mtd/ubi/io.c	/^int ubi_io_is_bad(const struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int
ubi_io_is_bad	drivers/mtd/ubispl/ubispl.c	/^static int ubi_io_is_bad(struct ubi_scan_info *ubi, int peb)$/;"	f	typeref:typename:int	file:
ubi_io_mark_bad	drivers/mtd/ubi/io.c	/^int ubi_io_mark_bad(const struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int
ubi_io_read	drivers/mtd/ubi/io.c	/^int ubi_io_read(const struct ubi_device *ubi, void *buf, int pnum, int offset,$/;"	f	typeref:typename:int
ubi_io_read	drivers/mtd/ubispl/ubispl.c	/^static int ubi_io_read(struct ubi_scan_info *ubi, void *buf, int pnum,$/;"	f	typeref:typename:int	file:
ubi_io_read_data	drivers/mtd/ubi/ubi.h	/^static inline int ubi_io_read_data(const struct ubi_device *ubi, void *buf,$/;"	f	typeref:typename:int
ubi_io_read_ec_hdr	drivers/mtd/ubi/io.c	/^int ubi_io_read_ec_hdr(struct ubi_device *ubi, int pnum,$/;"	f	typeref:typename:int
ubi_io_read_vid_hdr	drivers/mtd/ubi/io.c	/^int ubi_io_read_vid_hdr(struct ubi_device *ubi, int pnum,$/;"	f	typeref:typename:int
ubi_io_read_vid_hdr	drivers/mtd/ubispl/ubispl.c	/^static int ubi_io_read_vid_hdr(struct ubi_scan_info *ubi, int pnum,$/;"	f	typeref:typename:int	file:
ubi_io_sync_erase	drivers/mtd/ubi/io.c	/^int ubi_io_sync_erase(struct ubi_device *ubi, int pnum, int torture)$/;"	f	typeref:typename:int
ubi_io_write	drivers/mtd/ubi/io.c	/^int ubi_io_write(struct ubi_device *ubi, const void *buf, int pnum, int offset,$/;"	f	typeref:typename:int
ubi_io_write_data	drivers/mtd/ubi/ubi.h	/^static inline int ubi_io_write_data(struct ubi_device *ubi, const void *buf,$/;"	f	typeref:typename:int
ubi_io_write_ec_hdr	drivers/mtd/ubi/io.c	/^int ubi_io_write_ec_hdr(struct ubi_device *ubi, int pnum,$/;"	f	typeref:typename:int
ubi_io_write_vid_hdr	drivers/mtd/ubi/io.c	/^int ubi_io_write_vid_hdr(struct ubi_device *ubi, int pnum,$/;"	f	typeref:typename:int
ubi_is_erase_work	drivers/mtd/ubi/fastmap-wl.c	/^int ubi_is_erase_work(struct ubi_work *wrk)$/;"	f	typeref:typename:int
ubi_is_mapped	drivers/mtd/ubi/kapi.c	/^int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum)$/;"	f	typeref:typename:int
ubi_is_module	drivers/mtd/ubi/build.c	/^#define ubi_is_module(/;"	d	file:
ubi_leb_change	drivers/mtd/ubi/kapi.c	/^int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf,$/;"	f	typeref:typename:int
ubi_leb_change_req	include/mtd/ubi-user.h	/^struct ubi_leb_change_req {$/;"	s
ubi_leb_erase	drivers/mtd/ubi/kapi.c	/^int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum)$/;"	f	typeref:typename:int
ubi_leb_map	drivers/mtd/ubi/kapi.c	/^int ubi_leb_map(struct ubi_volume_desc *desc, int lnum)$/;"	f	typeref:typename:int
ubi_leb_read	drivers/mtd/ubi/kapi.c	/^int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset,$/;"	f	typeref:typename:int
ubi_leb_read_sg	drivers/mtd/ubi/kapi.c	/^int ubi_leb_read_sg(struct ubi_volume_desc *desc, int lnum, struct ubi_sgl *sgl,$/;"	f	typeref:typename:int
ubi_leb_unmap	drivers/mtd/ubi/kapi.c	/^int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum)$/;"	f	typeref:typename:int
ubi_leb_write	drivers/mtd/ubi/kapi.c	/^int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf,$/;"	f	typeref:typename:int
ubi_load_block	drivers/mtd/ubispl/ubispl.c	/^static int ubi_load_block(struct ubi_scan_info *ubi, uint8_t *laddr,$/;"	f	typeref:typename:int	file:
ubi_ltree_entry	drivers/mtd/ubi/ubi.h	/^struct ubi_ltree_entry {$/;"	s
ubi_major2num	drivers/mtd/ubi/build.c	/^int ubi_major2num(int major)$/;"	f	typeref:typename:int
ubi_map_req	include/mtd/ubi-user.h	/^struct ubi_map_req {$/;"	s
ubi_mkvol_req	include/mtd/ubi-user.h	/^struct ubi_mkvol_req {$/;"	s
ubi_more_leb_change_data	drivers/mtd/ubi/upd.c	/^int ubi_more_leb_change_data(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_more_update_data	drivers/mtd/ubi/upd.c	/^int ubi_more_update_data(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_move_aeb_to_list	drivers/mtd/ubi/ubi.h	/^static inline void ubi_move_aeb_to_list(struct ubi_ainf_volume *av,$/;"	f	typeref:typename:void
ubi_msg	cmd/ubi.c	/^#define ubi_msg(/;"	d	file:
ubi_msg	drivers/mtd/ubi/ubi.h	/^#define ubi_msg(/;"	d
ubi_msg	drivers/mtd/ubispl/ubispl.h	/^#define ubi_msg(/;"	d
ubi_mtd_param_parse	drivers/mtd/ubi/build.c	/^static int __init ubi_mtd_param_parse(const char *val, struct kernel_param *kp)$/;"	f	typeref:typename:int __init	file:
ubi_name	drivers/mtd/ubi/ubi.h	/^	char ubi_name[sizeof(UBI_NAME_STR)+5];$/;"	m	struct:ubi_device	typeref:typename:char[]
ubi_next_sqnum	drivers/mtd/ubi/eba.c	/^unsigned long long ubi_next_sqnum(struct ubi_device *ubi)$/;"	f	typeref:typename:unsigned long long
ubi_notification	include/linux/mtd/ubi.h	/^struct ubi_notification {$/;"	s
ubi_notify_all	drivers/mtd/ubi/build.c	/^int ubi_notify_all(struct ubi_device *ubi, int ntype, struct notifier_block *nb)$/;"	f	typeref:typename:int
ubi_num	drivers/mtd/ubi/build.c	/^	int ubi_num;$/;"	m	struct:mtd_dev_param	typeref:typename:int	file:
ubi_num	drivers/mtd/ubi/ubi.h	/^	int ubi_num;$/;"	m	struct:ubi_device	typeref:typename:int
ubi_num	include/linux/mtd/ubi.h	/^	int ubi_num;$/;"	m	struct:ubi_device_info	typeref:typename:int
ubi_num	include/linux/mtd/ubi.h	/^	int ubi_num;$/;"	m	struct:ubi_volume_info	typeref:typename:int
ubi_num	include/mtd/ubi-user.h	/^	__s32 ubi_num;$/;"	m	struct:ubi_attach_req	typeref:typename:__s32
ubi_open_volume	drivers/mtd/ubi/kapi.c	/^struct ubi_volume_desc *ubi_open_volume(int ubi_num, int vol_id, int mode)$/;"	f	typeref:struct:ubi_volume_desc *
ubi_open_volume_nm	drivers/mtd/ubi/kapi.c	/^struct ubi_volume_desc *ubi_open_volume_nm(int ubi_num, const char *name,$/;"	f	typeref:struct:ubi_volume_desc *
ubi_open_volume_path	drivers/mtd/ubi/kapi.c	/^struct ubi_volume_desc *ubi_open_volume_path(const char *pathname, int mode)$/;"	f	typeref:struct:ubi_volume_desc *
ubi_part	cmd/ubi.c	/^int ubi_part(char *part_name, const char *vid_header_offset)$/;"	f	typeref:typename:int
ubi_put_device	drivers/mtd/ubi/build.c	/^void ubi_put_device(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_rb_for_each_entry	drivers/mtd/ubi/ubi.h	/^#define ubi_rb_for_each_entry(/;"	d
ubi_read	include/linux/mtd/ubi.h	/^static inline int ubi_read(struct ubi_volume_desc *desc, int lnum, char *buf,$/;"	f	typeref:typename:int
ubi_read_sg	include/linux/mtd/ubi.h	/^static inline int ubi_read_sg(struct ubi_volume_desc *desc, int lnum,$/;"	f	typeref:typename:int
ubi_read_volume_table	drivers/mtd/ubi/vtbl.c	/^int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_attach_info *ai)$/;"	f	typeref:typename:int
ubi_refill_pools	drivers/mtd/ubi/fastmap-wl.c	/^void ubi_refill_pools(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_register_volume_notifier	drivers/mtd/ubi/kapi.c	/^int ubi_register_volume_notifier(struct notifier_block *nb,$/;"	f	typeref:typename:int
ubi_remove_av	drivers/mtd/ubi/attach.c	/^void ubi_remove_av(struct ubi_attach_info *ai, struct ubi_ainf_volume *av)$/;"	f	typeref:typename:void
ubi_remove_vol	cmd/ubi.c	/^static int ubi_remove_vol(char *volume)$/;"	f	typeref:typename:int	file:
ubi_remove_volume	drivers/mtd/ubi/vmt.c	/^int ubi_remove_volume(struct ubi_volume_desc *desc, int no_vtbl)$/;"	f	typeref:typename:int
ubi_rename_entry	drivers/mtd/ubi/ubi.h	/^struct ubi_rename_entry {$/;"	s
ubi_rename_volumes	drivers/mtd/ubi/vmt.c	/^int ubi_rename_volumes(struct ubi_device *ubi, struct list_head *rename_list)$/;"	f	typeref:typename:int
ubi_rescan_fm_vid_hdr	drivers/mtd/ubispl/ubispl.c	/^static int ubi_rescan_fm_vid_hdr(struct ubi_scan_info *ubi,$/;"	f	typeref:typename:int	file:
ubi_resize_volume	drivers/mtd/ubi/vmt.c	/^int ubi_resize_volume(struct ubi_volume_desc *desc, int reserved_pebs)$/;"	f	typeref:typename:int
ubi_rnvol_req	include/mtd/ubi-user.h	/^struct ubi_rnvol_req {$/;"	s
ubi_ro_mode	drivers/mtd/ubi/ubi.h	/^static inline void ubi_ro_mode(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_rsvol_req	include/mtd/ubi-user.h	/^struct ubi_rsvol_req {$/;"	s
ubi_scan_fastmap	drivers/mtd/ubi/fastmap.c	/^int ubi_scan_fastmap(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int
ubi_scan_fastmap	drivers/mtd/ubispl/ubispl.c	/^static int ubi_scan_fastmap(struct ubi_scan_info *ubi,$/;"	f	typeref:typename:int	file:
ubi_scan_info	drivers/mtd/ubispl/ubispl.h	/^struct ubi_scan_info {$/;"	s
ubi_scan_vid_hdr	drivers/mtd/ubispl/ubispl.c	/^static int ubi_scan_vid_hdr(struct ubi_scan_info *ubi, struct ubi_vid_hdr *vh,$/;"	f	typeref:typename:int	file:
ubi_self_check_all_ff	drivers/mtd/ubi/io.c	/^int ubi_self_check_all_ff(struct ubi_device *ubi, int pnum, int offset, int len)$/;"	f	typeref:typename:int
ubi_set_vol_prop_req	include/mtd/ubi-user.h	/^struct ubi_set_vol_prop_req {$/;"	s
ubi_sgl	include/linux/mtd/ubi.h	/^struct ubi_sgl {$/;"	s
ubi_sgl_init	include/linux/mtd/ubi.h	/^static inline void ubi_sgl_init(struct ubi_sgl *usgl)$/;"	f	typeref:typename:void
ubi_start_leb_change	drivers/mtd/ubi/upd.c	/^int ubi_start_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_start_update	drivers/mtd/ubi/upd.c	/^int ubi_start_update(struct ubi_device *ubi, struct ubi_volume *vol,$/;"	f	typeref:typename:int
ubi_sync	drivers/mtd/ubi/kapi.c	/^int ubi_sync(int ubi_num)$/;"	f	typeref:typename:int
ubi_sysfs_close	drivers/mtd/ubi/build.c	/^static void ubi_sysfs_close(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
ubi_sysfs_close	include/ubi_uboot.h	/^#define ubi_sysfs_close(/;"	d
ubi_sysfs_init	drivers/mtd/ubi/build.c	/^static int ubi_sysfs_init(struct ubi_device *ubi, int *ref)$/;"	f	typeref:typename:int	file:
ubi_sysfs_init	include/ubi_uboot.h	/^#define ubi_sysfs_init(/;"	d
ubi_thread	drivers/mtd/ubi/wl.c	/^int ubi_thread(void *u)$/;"	f	typeref:typename:int
ubi_unregister_volume_notifier	drivers/mtd/ubi/kapi.c	/^int ubi_unregister_volume_notifier(struct notifier_block *nb)$/;"	f	typeref:typename:int
ubi_update_fastmap	drivers/mtd/ubi/fastmap.c	/^int ubi_update_fastmap(struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_update_fastmap	drivers/mtd/ubi/ubi.h	/^static inline int ubi_update_fastmap(struct ubi_device *ubi) { return 0; }$/;"	f	typeref:typename:int
ubi_update_layout_vol	drivers/mtd/ubi/vtbl.c	/^static int ubi_update_layout_vol(struct ubi_device *ubi)$/;"	f	typeref:typename:int	file:
ubi_update_reserved	drivers/mtd/ubi/misc.c	/^void ubi_update_reserved(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_version_show	drivers/mtd/ubi/build.c	/^static ssize_t ubi_version_show(struct class *class,$/;"	f	typeref:typename:ssize_t	file:
ubi_vid_hdr	drivers/mtd/ubi/ubi-media.h	/^struct ubi_vid_hdr {$/;"	s
ubi_vol_info	drivers/mtd/ubispl/ubispl.h	/^struct ubi_vol_info {$/;"	s
ubi_volume	drivers/mtd/ubi/ubi.h	/^struct ubi_volume {$/;"	s
ubi_volume_begin_write	cmd/ubi.c	/^int ubi_volume_begin_write(char *volume, void *buf, size_t size,$/;"	f	typeref:typename:int
ubi_volume_continue_write	cmd/ubi.c	/^static int ubi_volume_continue_write(char *volume, void *buf, size_t size)$/;"	f	typeref:typename:int	file:
ubi_volume_desc	drivers/mtd/ubi/ubi.h	/^struct ubi_volume_desc {$/;"	s
ubi_volume_info	include/linux/mtd/ubi.h	/^struct ubi_volume_info {$/;"	s
ubi_volume_notify	drivers/mtd/ubi/build.c	/^int ubi_volume_notify(struct ubi_device *ubi, struct ubi_volume *vol, int ntype)$/;"	f	typeref:typename:int
ubi_volume_read	cmd/ubi.c	/^int ubi_volume_read(char *volume, char *buf, size_t size)$/;"	f	typeref:typename:int
ubi_volume_write	cmd/ubi.c	/^int ubi_volume_write(char *volume, void *buf, size_t size)$/;"	f	typeref:typename:int
ubi_vtbl_record	drivers/mtd/ubi/ubi-media.h	/^struct ubi_vtbl_record {$/;"	s
ubi_vtbl_rename_volumes	drivers/mtd/ubi/vtbl.c	/^int ubi_vtbl_rename_volumes(struct ubi_device *ubi,$/;"	f	typeref:typename:int
ubi_warn	drivers/mtd/ubi/ubi.h	/^#define ubi_warn(/;"	d
ubi_warn	drivers/mtd/ubispl/ubispl.h	/^#define ubi_warn(/;"	d
ubi_wl_close	drivers/mtd/ubi/wl.c	/^void ubi_wl_close(struct ubi_device *ubi)$/;"	f	typeref:typename:void
ubi_wl_entry	drivers/mtd/ubi/ubi.h	/^struct ubi_wl_entry {$/;"	s
ubi_wl_entry_slab	drivers/mtd/ubi/build.c	/^struct kmem_cache *ubi_wl_entry_slab;$/;"	v	typeref:struct:kmem_cache *
ubi_wl_flush	drivers/mtd/ubi/wl.c	/^int ubi_wl_flush(struct ubi_device *ubi, int vol_id, int lnum)$/;"	f	typeref:typename:int
ubi_wl_get_fm_peb	drivers/mtd/ubi/fastmap-wl.c	/^struct ubi_wl_entry *ubi_wl_get_fm_peb(struct ubi_device *ubi, int anchor)$/;"	f	typeref:struct:ubi_wl_entry *
ubi_wl_get_peb	drivers/mtd/ubi/fastmap-wl.c	/^int ubi_wl_get_peb(struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_wl_get_peb	drivers/mtd/ubi/wl.c	/^int ubi_wl_get_peb(struct ubi_device *ubi)$/;"	f	typeref:typename:int
ubi_wl_init	drivers/mtd/ubi/wl.c	/^int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)$/;"	f	typeref:typename:int
ubi_wl_put_fm_peb	drivers/mtd/ubi/fastmap-wl.c	/^int ubi_wl_put_fm_peb(struct ubi_device *ubi, struct ubi_wl_entry *fm_e,$/;"	f	typeref:typename:int
ubi_wl_put_peb	drivers/mtd/ubi/wl.c	/^int ubi_wl_put_peb(struct ubi_device *ubi, int vol_id, int lnum,$/;"	f	typeref:typename:int
ubi_wl_scrub_peb	drivers/mtd/ubi/wl.c	/^int ubi_wl_scrub_peb(struct ubi_device *ubi, int pnum)$/;"	f	typeref:typename:int
ubi_work	drivers/mtd/ubi/ubi.h	/^struct ubi_work {$/;"	s
ubi_write_fastmap	drivers/mtd/ubi/fastmap.c	/^static int ubi_write_fastmap(struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
ubi_zalloc_vid_hdr	drivers/mtd/ubi/ubi.h	/^ubi_zalloc_vid_hdr(const struct ubi_device *ubi, gfp_t gfp_flags)$/;"	f	typeref:struct:ubi_vid_hdr *
ubiblock_create	drivers/mtd/ubi/ubi.h	/^static inline int ubiblock_create(struct ubi_volume_info *vi)$/;"	f	typeref:typename:int
ubiblock_exit	drivers/mtd/ubi/ubi.h	/^static inline void ubiblock_exit(void) {}$/;"	f	typeref:typename:void
ubiblock_init	drivers/mtd/ubi/ubi.h	/^static inline int ubiblock_init(void) { return 0; }$/;"	f	typeref:typename:int
ubiblock_remove	drivers/mtd/ubi/ubi.h	/^static inline int ubiblock_remove(struct ubi_volume_info *vi)$/;"	f	typeref:typename:int
ubifs_add_bud	fs/ubifs/log.c	/^void ubifs_add_bud(struct ubifs_info *c, struct ubifs_bud *bud)$/;"	f	typeref:typename:void
ubifs_add_bud_to_log	fs/ubifs/log.c	/^int ubifs_add_bud_to_log(struct ubifs_info *c, int jhead, int lnum, int offs)$/;"	f	typeref:typename:int
ubifs_add_dirt	fs/ubifs/misc.h	/^static inline int ubifs_add_dirt(struct ubifs_info *c, int lnum, int dirty)$/;"	f	typeref:typename:int
ubifs_add_lpt_dirt	fs/ubifs/lpt.c	/^void ubifs_add_lpt_dirt(struct ubifs_info *c, int lnum, int dirty)$/;"	f	typeref:typename:void
ubifs_add_nnode_dirt	fs/ubifs/lpt.c	/^void ubifs_add_nnode_dirt(struct ubifs_info *c, struct ubifs_nnode *nnode)$/;"	f	typeref:typename:void
ubifs_add_orphan	fs/ubifs/orphan.c	/^int ubifs_add_orphan(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:typename:int
ubifs_add_snod	fs/ubifs/scan.c	/^int ubifs_add_snod(const struct ubifs_info *c, struct ubifs_scan_leb *sleb,$/;"	f	typeref:typename:int
ubifs_add_to_cat	fs/ubifs/lprops.c	/^void ubifs_add_to_cat(struct ubifs_info *c, struct ubifs_lprops *lprops,$/;"	f	typeref:typename:void
ubifs_alloc_inode	fs/ubifs/super.c	/^static struct inode *ubifs_alloc_inode(struct super_block *sb)$/;"	f	typeref:struct:inode *	file:
ubifs_assert	fs/ubifs/debug.h	/^#define ubifs_assert(/;"	d
ubifs_assert_cmt_locked	fs/ubifs/debug.h	/^#define ubifs_assert_cmt_locked(/;"	d
ubifs_bg_wbufs_sync	fs/ubifs/io.c	/^int ubifs_bg_wbufs_sync(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_branch	fs/ubifs/ubifs-media.h	/^struct ubifs_branch {$/;"	s
ubifs_bud	fs/ubifs/ubifs.h	/^struct ubifs_bud {$/;"	s
ubifs_budg_info	fs/ubifs/ubifs.h	/^struct ubifs_budg_info {$/;"	s
ubifs_budget_req	fs/ubifs/ubifs.h	/^struct ubifs_budget_req {$/;"	s
ubifs_budget_space	fs/ubifs/budget.c	/^int ubifs_budget_space(struct ubifs_info *c, struct ubifs_budget_req *req)$/;"	f	typeref:typename:int
ubifs_calc_available	fs/ubifs/budget.c	/^long long ubifs_calc_available(const struct ubifs_info *c, int min_idx_lebs)$/;"	f	typeref:typename:long long
ubifs_calc_dark	fs/ubifs/lprops.c	/^int ubifs_calc_dark(const struct ubifs_info *c, int spc)$/;"	f	typeref:typename:int
ubifs_calc_lpt_geom	fs/ubifs/lpt.c	/^int ubifs_calc_lpt_geom(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_calc_min_idx_lebs	fs/ubifs/budget.c	/^int ubifs_calc_min_idx_lebs(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_categorize_lprops	fs/ubifs/lprops.c	/^int ubifs_categorize_lprops(const struct ubifs_info *c,$/;"	f	typeref:typename:int
ubifs_ch	fs/ubifs/ubifs-media.h	/^struct ubifs_ch {$/;"	s
ubifs_change_lp	fs/ubifs/lprops.c	/^const struct ubifs_lprops *ubifs_change_lp(struct ubifs_info *c,$/;"	f	typeref:typename:const struct ubifs_lprops *
ubifs_change_one_lp	fs/ubifs/lprops.c	/^int ubifs_change_one_lp(struct ubifs_info *c, int lnum, int free, int dirty,$/;"	f	typeref:typename:int
ubifs_check_node	fs/ubifs/io.c	/^int ubifs_check_node(const struct ubifs_info *c, const void *buf, int lnum,$/;"	f	typeref:typename:int
ubifs_clean_lebs	fs/ubifs/recovery.c	/^int ubifs_clean_lebs(struct ubifs_info *c, void *sbuf)$/;"	f	typeref:typename:int
ubifs_clean_zn_cnt	fs/ubifs/ubifs.c	/^atomic_long_t ubifs_clean_zn_cnt;$/;"	v	typeref:typename:atomic_long_t
ubifs_clear_orphans	fs/ubifs/orphan.c	/^int ubifs_clear_orphans(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_close	fs/ubifs/ubifs.c	/^void ubifs_close(void)$/;"	f	typeref:typename:void
ubifs_cnode	fs/ubifs/ubifs.h	/^struct ubifs_cnode {$/;"	s
ubifs_compr_name	fs/ubifs/misc.h	/^static inline const char *ubifs_compr_name(int compr_type)$/;"	f	typeref:typename:const char *
ubifs_compr_present	fs/ubifs/misc.h	/^static inline int ubifs_compr_present(int compr_type)$/;"	f	typeref:typename:int
ubifs_compressor	fs/ubifs/ubifs.h	/^struct ubifs_compressor {$/;"	s
ubifs_compressors	fs/ubifs/ubifs.c	/^struct ubifs_compressor *ubifs_compressors[UBIFS_COMPR_TYPES_CNT];$/;"	v	typeref:struct:ubifs_compressor * []
ubifs_compressors_init	fs/ubifs/ubifs.c	/^int __init ubifs_compressors_init(void)$/;"	f	typeref:typename:int __init
ubifs_consolidate_log	fs/ubifs/log.c	/^int ubifs_consolidate_log(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_convert_page_budget	fs/ubifs/budget.c	/^void ubifs_convert_page_budget(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_create_dflt_lpt	fs/ubifs/lpt.c	/^int ubifs_create_dflt_lpt(struct ubifs_info *c, int *main_lebs, int lpt_first,$/;"	f	typeref:typename:int
ubifs_cs_node	fs/ubifs/ubifs-media.h	/^struct ubifs_cs_node {$/;"	s
ubifs_current_time	fs/ubifs/misc.h	/^static inline struct timespec ubifs_current_time(struct inode *inode)$/;"	f	typeref:struct:timespec
ubifs_data_node	fs/ubifs/ubifs-media.h	/^struct ubifs_data_node {$/;"	s
ubifs_dbg	fs/ubifs/debug.c	/^struct ubifs_global_debug_info ubifs_dbg;$/;"	v	typeref:struct:ubifs_global_debug_info
ubifs_dbg_msg	fs/ubifs/debug.h	/^#define ubifs_dbg_msg(/;"	d
ubifs_dbg_msg_key	fs/ubifs/debug.h	/^#define ubifs_dbg_msg_key(/;"	d
ubifs_debug_info	fs/ubifs/debug.h	/^struct ubifs_debug_info {$/;"	s
ubifs_debugging_exit	fs/ubifs/debug.c	/^void ubifs_debugging_exit(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_debugging_init	fs/ubifs/debug.c	/^int ubifs_debugging_init(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_decompress	fs/ubifs/ubifs.c	/^int ubifs_decompress(const struct ubifs_info *c, const void *in_buf,$/;"	f	typeref:typename:int
ubifs_delete_orphan	fs/ubifs/orphan.c	/^void ubifs_delete_orphan(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:typename:void
ubifs_dent_node	fs/ubifs/ubifs-media.h	/^struct ubifs_dent_node {$/;"	s
ubifs_destroy_idx_gc	fs/ubifs/gc.c	/^void ubifs_destroy_idx_gc(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_destroy_inode	fs/ubifs/super.c	/^static void ubifs_destroy_inode(struct inode *inode)$/;"	f	typeref:typename:void	file:
ubifs_destroy_size_tree	fs/ubifs/recovery.c	/^void ubifs_destroy_size_tree(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_destroy_tnc_subtree	fs/ubifs/tnc_misc.c	/^long ubifs_destroy_tnc_subtree(struct ubifs_znode *znode)$/;"	f	typeref:typename:long
ubifs_dev_desc	fs/ubifs/ubifs-media.h	/^union ubifs_dev_desc {$/;"	u
ubifs_dirty_idx_node	fs/ubifs/tnc.c	/^int ubifs_dirty_idx_node(struct ubifs_info *c, union ubifs_key *key, int level,$/;"	f	typeref:typename:int
ubifs_dirty_inode	fs/ubifs/super.c	/^static void ubifs_dirty_inode(struct inode *inode, int flags)$/;"	f	typeref:typename:void	file:
ubifs_dump_budg	fs/ubifs/debug.c	/^void ubifs_dump_budg(struct ubifs_info *c, const struct ubifs_budg_info *bi)$/;"	f	typeref:typename:void
ubifs_dump_budget_req	fs/ubifs/debug.c	/^void ubifs_dump_budget_req(const struct ubifs_budget_req *req)$/;"	f	typeref:typename:void
ubifs_dump_heap	fs/ubifs/debug.c	/^void ubifs_dump_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap, int cat)$/;"	f	typeref:typename:void
ubifs_dump_index	fs/ubifs/debug.c	/^void ubifs_dump_index(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_dump_inode	fs/ubifs/debug.c	/^void ubifs_dump_inode(struct ubifs_info *c, const struct inode *inode)$/;"	f	typeref:typename:void
ubifs_dump_leb	fs/ubifs/debug.c	/^void ubifs_dump_leb(const struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:void
ubifs_dump_lprop	fs/ubifs/debug.c	/^void ubifs_dump_lprop(const struct ubifs_info *c, const struct ubifs_lprops *lp)$/;"	f	typeref:typename:void
ubifs_dump_lprops	fs/ubifs/debug.c	/^void ubifs_dump_lprops(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_dump_lpt_info	fs/ubifs/debug.c	/^void ubifs_dump_lpt_info(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_dump_lpt_lebs	fs/ubifs/lpt_commit.c	/^void ubifs_dump_lpt_lebs(const struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_dump_lstats	fs/ubifs/debug.c	/^void ubifs_dump_lstats(const struct ubifs_lp_stats *lst)$/;"	f	typeref:typename:void
ubifs_dump_node	fs/ubifs/debug.c	/^void ubifs_dump_node(const struct ubifs_info *c, const void *node)$/;"	f	typeref:typename:void
ubifs_dump_pnode	fs/ubifs/debug.c	/^void ubifs_dump_pnode(struct ubifs_info *c, struct ubifs_pnode *pnode,$/;"	f	typeref:typename:void
ubifs_dump_sleb	fs/ubifs/debug.c	/^void ubifs_dump_sleb(const struct ubifs_info *c,$/;"	f	typeref:typename:void
ubifs_dump_tnc	fs/ubifs/debug.c	/^void ubifs_dump_tnc(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_dump_znode	fs/ubifs/debug.c	/^void ubifs_dump_znode(const struct ubifs_info *c,$/;"	f	typeref:typename:void
ubifs_encode_dev	fs/ubifs/misc.h	/^static inline int ubifs_encode_dev(union ubifs_dev_desc *dev, dev_t rdev)$/;"	f	typeref:typename:int
ubifs_end_scan	fs/ubifs/scan.c	/^void ubifs_end_scan(const struct ubifs_info *c, struct ubifs_scan_leb *sleb,$/;"	f	typeref:typename:void
ubifs_ensure_cat	fs/ubifs/lprops.c	/^void ubifs_ensure_cat(struct ubifs_info *c, struct ubifs_lprops *lprops)$/;"	f	typeref:typename:void
ubifs_err	fs/ubifs/ubifs.h	/^#define ubifs_err(/;"	d
ubifs_errc	fs/ubifs/ubifs.h	/^#define ubifs_errc(/;"	d
ubifs_evict_inode	fs/ubifs/super.c	/^static void ubifs_evict_inode(struct inode *inode)$/;"	f	typeref:typename:void	file:
ubifs_exists	fs/ubifs/ubifs.c	/^int ubifs_exists(const char *filename)$/;"	f	typeref:typename:int
ubifs_exit	fs/ubifs/super.c	/^static void __exit ubifs_exit(void)$/;"	f	typeref:typename:void __exit	file:
ubifs_fast_find_empty	fs/ubifs/lprops.c	/^const struct ubifs_lprops *ubifs_fast_find_empty(struct ubifs_info *c)$/;"	f	typeref:typename:const struct ubifs_lprops *
ubifs_fast_find_frdi_idx	fs/ubifs/lprops.c	/^const struct ubifs_lprops *ubifs_fast_find_frdi_idx(struct ubifs_info *c)$/;"	f	typeref:typename:const struct ubifs_lprops *
ubifs_fast_find_free	fs/ubifs/lprops.c	/^const struct ubifs_lprops *ubifs_fast_find_free(struct ubifs_info *c)$/;"	f	typeref:typename:const struct ubifs_lprops *
ubifs_fast_find_freeable	fs/ubifs/lprops.c	/^const struct ubifs_lprops *ubifs_fast_find_freeable(struct ubifs_info *c)$/;"	f	typeref:typename:const struct ubifs_lprops *
ubifs_fill_super	fs/ubifs/super.c	/^static int ubifs_fill_super(struct super_block *sb, void *data, int silent)$/;"	f	typeref:typename:int	file:
ubifs_finddir	fs/ubifs/ubifs.c	/^static int ubifs_finddir(struct super_block *sb, char *dirname,$/;"	f	typeref:typename:int	file:
ubifs_findfile	fs/ubifs/ubifs.c	/^static unsigned long ubifs_findfile(struct super_block *sb, char *filename)$/;"	f	typeref:typename:unsigned long	file:
ubifs_fixup_free_space	fs/ubifs/sb.c	/^int ubifs_fixup_free_space(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_fs_type	fs/ubifs/super.c	/^static struct file_system_type ubifs_fs_type = {$/;"	v	typeref:struct:file_system_type	file:
ubifs_garbage_collect	fs/ubifs/gc.c	/^int ubifs_garbage_collect(struct ubifs_info *c, int anyway)$/;"	f	typeref:typename:int
ubifs_garbage_collect_leb	fs/ubifs/gc.c	/^int ubifs_garbage_collect_leb(struct ubifs_info *c, struct ubifs_lprops *lp)$/;"	f	typeref:typename:int
ubifs_gc_end_commit	fs/ubifs/gc.c	/^int ubifs_gc_end_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_gc_start_commit	fs/ubifs/gc.c	/^int ubifs_gc_start_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_gced_idx_leb	fs/ubifs/ubifs.h	/^struct ubifs_gced_idx_leb {$/;"	s
ubifs_get_free_space	fs/ubifs/budget.c	/^long long ubifs_get_free_space(struct ubifs_info *c)$/;"	f	typeref:typename:long long
ubifs_get_free_space_nolock	fs/ubifs/budget.c	/^long long ubifs_get_free_space_nolock(struct ubifs_info *c)$/;"	f	typeref:typename:long long
ubifs_get_idx_gc_leb	fs/ubifs/gc.c	/^int ubifs_get_idx_gc_leb(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_get_lp_stats	fs/ubifs/lprops.c	/^void ubifs_get_lp_stats(struct ubifs_info *c, struct ubifs_lp_stats *lst)$/;"	f	typeref:typename:void
ubifs_get_lprops	fs/ubifs/misc.h	/^static inline void ubifs_get_lprops(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_get_nnode	fs/ubifs/lpt.c	/^struct ubifs_nnode *ubifs_get_nnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_nnode *
ubifs_get_pnode	fs/ubifs/lpt.c	/^struct ubifs_pnode *ubifs_get_pnode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_pnode *
ubifs_get_wbuf	fs/ubifs/log.c	/^struct ubifs_wbuf *ubifs_get_wbuf(struct ubifs_info *c, int lnum)$/;"	f	typeref:struct:ubifs_wbuf *
ubifs_global_debug_info	fs/ubifs/debug.h	/^struct ubifs_global_debug_info {$/;"	s
ubifs_i_callback	fs/ubifs/super.c	/^static void ubifs_i_callback(struct rcu_head *head)$/;"	f	typeref:typename:void	file:
ubifs_idx_branch	fs/ubifs/misc.h	/^struct ubifs_branch *ubifs_idx_branch(const struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_branch *
ubifs_idx_key	fs/ubifs/misc.h	/^static inline void *ubifs_idx_key(const struct ubifs_info *c,$/;"	f	typeref:typename:void *
ubifs_idx_node	fs/ubifs/ubifs-media.h	/^struct ubifs_idx_node {$/;"	s
ubifs_idx_node_sz	fs/ubifs/misc.h	/^static inline int ubifs_idx_node_sz(const struct ubifs_info *c, int child_cnt)$/;"	f	typeref:typename:int
ubifs_iget	fs/ubifs/super.c	/^struct inode *ubifs_iget(struct super_block *sb, unsigned long inum)$/;"	f	typeref:struct:inode *
ubifs_info	fs/ubifs/ubifs.h	/^struct ubifs_info {$/;"	s
ubifs_init	fs/ubifs/super.c	/^static int __init ubifs_init(void)$/;"	f	typeref:typename:int __init	file:
ubifs_initialized	cmd/ubifs.c	/^static int ubifs_initialized;$/;"	v	typeref:typename:int	file:
ubifs_ino_node	fs/ubifs/ubifs-media.h	/^struct ubifs_ino_node {$/;"	s
ubifs_inode	fs/ubifs/misc.h	/^static inline struct ubifs_inode *ubifs_inode(const struct inode *inode)$/;"	f	typeref:struct:ubifs_inode *
ubifs_inode	fs/ubifs/ubifs.h	/^struct ubifs_inode {$/;"	s
ubifs_inode_slab	fs/ubifs/super.c	/^struct kmem_cache *ubifs_inode_slab;$/;"	v	typeref:struct:kmem_cache *
ubifs_iput	fs/ubifs/super.c	/^int ubifs_iput(struct inode *inode)$/;"	f	typeref:typename:int
ubifs_is_mapped	fs/ubifs/io.c	/^int ubifs_is_mapped(const struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
ubifs_is_mounted	cmd/ubifs.c	/^int ubifs_is_mounted(void)$/;"	f	typeref:typename:int
ubifs_jhead	fs/ubifs/ubifs.h	/^struct ubifs_jhead {$/;"	s
ubifs_key	fs/ubifs/ubifs.h	/^union ubifs_key {$/;"	u
ubifs_leb_change	fs/ubifs/io.c	/^int ubifs_leb_change(struct ubifs_info *c, int lnum, const void *buf, int len)$/;"	f	typeref:typename:int
ubifs_leb_map	fs/ubifs/io.c	/^int ubifs_leb_map(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
ubifs_leb_read	fs/ubifs/io.c	/^int ubifs_leb_read(const struct ubifs_info *c, int lnum, void *buf, int offs,$/;"	f	typeref:typename:int
ubifs_leb_unmap	fs/ubifs/io.c	/^int ubifs_leb_unmap(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
ubifs_leb_write	fs/ubifs/io.c	/^int ubifs_leb_write(struct ubifs_info *c, int lnum, const void *buf, int offs,$/;"	f	typeref:typename:int
ubifs_load	fs/ubifs/ubifs.c	/^int ubifs_load(char *filename, u32 addr, u32 size)$/;"	f	typeref:typename:int
ubifs_load_znode	fs/ubifs/tnc_misc.c	/^struct ubifs_znode *ubifs_load_znode(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_znode *
ubifs_log_end_commit	fs/ubifs/log.c	/^int ubifs_log_end_commit(struct ubifs_info *c, int ltail_lnum)$/;"	f	typeref:typename:int
ubifs_log_post_commit	fs/ubifs/log.c	/^int ubifs_log_post_commit(struct ubifs_info *c, int old_ltail_lnum)$/;"	f	typeref:typename:int
ubifs_log_start_commit	fs/ubifs/log.c	/^int ubifs_log_start_commit(struct ubifs_info *c, int *ltail_lnum)$/;"	f	typeref:typename:int
ubifs_lookup_level0	fs/ubifs/tnc.c	/^int ubifs_lookup_level0(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_lp_stats	fs/ubifs/ubifs.h	/^struct ubifs_lp_stats {$/;"	s
ubifs_lprops	fs/ubifs/ubifs.h	/^struct ubifs_lprops {$/;"	s
ubifs_lpt_end_commit	fs/ubifs/lpt_commit.c	/^int ubifs_lpt_end_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_lpt_free	fs/ubifs/lpt_commit.c	/^void ubifs_lpt_free(struct ubifs_info *c, int wr_only)$/;"	f	typeref:typename:void
ubifs_lpt_heap	fs/ubifs/ubifs.h	/^struct ubifs_lpt_heap {$/;"	s
ubifs_lpt_init	fs/ubifs/lpt.c	/^int ubifs_lpt_init(struct ubifs_info *c, int rd, int wr)$/;"	f	typeref:typename:int
ubifs_lpt_lookup	fs/ubifs/lpt.c	/^struct ubifs_lprops *ubifs_lpt_lookup(struct ubifs_info *c, int lnum)$/;"	f	typeref:struct:ubifs_lprops *
ubifs_lpt_lookup_dirty	fs/ubifs/lpt.c	/^struct ubifs_lprops *ubifs_lpt_lookup_dirty(struct ubifs_info *c, int lnum)$/;"	f	typeref:struct:ubifs_lprops *
ubifs_lpt_lprops	fs/ubifs/ubifs.h	/^struct ubifs_lpt_lprops {$/;"	s
ubifs_lpt_post_commit	fs/ubifs/lpt_commit.c	/^int ubifs_lpt_post_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_lpt_scan_callback	fs/ubifs/ubifs.h	/^typedef int (*ubifs_lpt_scan_callback)(struct ubifs_info *c,$/;"	t	typeref:typename:int (*)(struct ubifs_info * c,const struct ubifs_lprops * lprops,int in_tree,void * data)
ubifs_lpt_scan_nolock	fs/ubifs/lpt.c	/^int ubifs_lpt_scan_nolock(struct ubifs_info *c, int start_lnum, int end_lnum,$/;"	f	typeref:typename:int
ubifs_lpt_start_commit	fs/ubifs/lpt_commit.c	/^int ubifs_lpt_start_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_ls	fs/ubifs/ubifs.c	/^int ubifs_ls(const char *filename)$/;"	f	typeref:typename:int
ubifs_mount	fs/ubifs/super.c	/^static struct dentry *ubifs_mount(struct file_system_type *fs_type, int flags,$/;"	f	typeref:struct:dentry *	file:
ubifs_mount_opts	fs/ubifs/ubifs.h	/^struct ubifs_mount_opts {$/;"	s
ubifs_mount_orphans	fs/ubifs/orphan.c	/^int ubifs_mount_orphans(struct ubifs_info *c, int unclean, int read_only)$/;"	f	typeref:typename:int
ubifs_mounted	cmd/ubifs.c	/^static int ubifs_mounted;$/;"	v	typeref:typename:int	file:
ubifs_msg	fs/ubifs/ubifs.h	/^#define ubifs_msg(/;"	d
ubifs_mst_node	fs/ubifs/ubifs-media.h	/^struct ubifs_mst_node {$/;"	s
ubifs_nbranch	fs/ubifs/ubifs.h	/^struct ubifs_nbranch {$/;"	s
ubifs_next_log_lnum	fs/ubifs/misc.h	/^static inline int ubifs_next_log_lnum(const struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
ubifs_nnode	fs/ubifs/ubifs.h	/^struct ubifs_nnode {$/;"	s
ubifs_node_range	fs/ubifs/ubifs.h	/^struct ubifs_node_range {$/;"	s
ubifs_old_idx	fs/ubifs/ubifs.h	/^struct ubifs_old_idx {$/;"	s
ubifs_orph_node	fs/ubifs/ubifs-media.h	/^struct ubifs_orph_node {$/;"	s
ubifs_orphan	fs/ubifs/ubifs.h	/^struct ubifs_orphan {$/;"	s
ubifs_orphan_end_commit	fs/ubifs/orphan.c	/^int ubifs_orphan_end_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_orphan_start_commit	fs/ubifs/orphan.c	/^int ubifs_orphan_start_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_pack_lsave	fs/ubifs/lpt.c	/^void ubifs_pack_lsave(struct ubifs_info *c, void *buf, int *lsave)$/;"	f	typeref:typename:void
ubifs_pack_ltab	fs/ubifs/lpt.c	/^void ubifs_pack_ltab(struct ubifs_info *c, void *buf,$/;"	f	typeref:typename:void
ubifs_pack_nnode	fs/ubifs/lpt.c	/^void ubifs_pack_nnode(struct ubifs_info *c, void *buf,$/;"	f	typeref:typename:void
ubifs_pack_pnode	fs/ubifs/lpt.c	/^void ubifs_pack_pnode(struct ubifs_info *c, void *buf,$/;"	f	typeref:typename:void
ubifs_pad	fs/ubifs/io.c	/^void ubifs_pad(const struct ubifs_info *c, void *buf, int pad)$/;"	f	typeref:typename:void
ubifs_pad_node	fs/ubifs/ubifs-media.h	/^struct ubifs_pad_node {$/;"	s
ubifs_parse_options	fs/ubifs/super.c	/^static int ubifs_parse_options(struct ubifs_info *c, char *options,$/;"	f	typeref:typename:int	file:
ubifs_pnode	fs/ubifs/ubifs.h	/^struct ubifs_pnode {$/;"	s
ubifs_prep_grp_node	fs/ubifs/io.c	/^void ubifs_prep_grp_node(struct ubifs_info *c, void *node, int len, int last)$/;"	f	typeref:typename:void
ubifs_prepare_node	fs/ubifs/io.c	/^void ubifs_prepare_node(struct ubifs_info *c, void *node, int len, int pad)$/;"	f	typeref:typename:void
ubifs_printdir	fs/ubifs/ubifs.c	/^static int ubifs_printdir(struct file *file, void *dirent)$/;"	f	typeref:typename:int	file:
ubifs_put_super	fs/ubifs/super.c	/^static void ubifs_put_super(struct super_block *sb)$/;"	f	typeref:typename:void	file:
ubifs_rcvry_gc_commit	fs/ubifs/recovery.c	/^int ubifs_rcvry_gc_commit(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_read	fs/ubifs/ubifs.c	/^int ubifs_read(const char *filename, void *buf, loff_t offset,$/;"	f	typeref:typename:int
ubifs_read_master	fs/ubifs/master.c	/^int ubifs_read_master(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_read_nnode	fs/ubifs/lpt.c	/^int ubifs_read_nnode(struct ubifs_info *c, struct ubifs_nnode *parent, int iip)$/;"	f	typeref:typename:int
ubifs_read_node	fs/ubifs/io.c	/^int ubifs_read_node(const struct ubifs_info *c, void *buf, int type, int len,$/;"	f	typeref:typename:int
ubifs_read_node_wbuf	fs/ubifs/io.c	/^int ubifs_read_node_wbuf(struct ubifs_wbuf *wbuf, void *buf, int type, int len,$/;"	f	typeref:typename:int
ubifs_read_one_lp	fs/ubifs/lprops.c	/^int ubifs_read_one_lp(struct ubifs_info *c, int lnum, struct ubifs_lprops *lp)$/;"	f	typeref:typename:int
ubifs_read_sb_node	fs/ubifs/sb.c	/^struct ubifs_sb_node *ubifs_read_sb_node(struct ubifs_info *c)$/;"	f	typeref:struct:ubifs_sb_node *
ubifs_read_superblock	fs/ubifs/sb.c	/^int ubifs_read_superblock(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_recover_inl_heads	fs/ubifs/recovery.c	/^int ubifs_recover_inl_heads(struct ubifs_info *c, void *sbuf)$/;"	f	typeref:typename:int
ubifs_recover_leb	fs/ubifs/recovery.c	/^struct ubifs_scan_leb *ubifs_recover_leb(struct ubifs_info *c, int lnum,$/;"	f	typeref:struct:ubifs_scan_leb *
ubifs_recover_log_leb	fs/ubifs/recovery.c	/^struct ubifs_scan_leb *ubifs_recover_log_leb(struct ubifs_info *c, int lnum,$/;"	f	typeref:struct:ubifs_scan_leb *
ubifs_recover_master_node	fs/ubifs/recovery.c	/^int ubifs_recover_master_node(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_recover_size	fs/ubifs/recovery.c	/^int ubifs_recover_size(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_recover_size_accum	fs/ubifs/recovery.c	/^int ubifs_recover_size_accum(struct ubifs_info *c, union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_ref_node	fs/ubifs/ubifs-media.h	/^struct ubifs_ref_node {$/;"	s
ubifs_release_budget	fs/ubifs/budget.c	/^void ubifs_release_budget(struct ubifs_info *c, struct ubifs_budget_req *req)$/;"	f	typeref:typename:void
ubifs_release_dirty_inode_budget	fs/ubifs/budget.c	/^void ubifs_release_dirty_inode_budget(struct ubifs_info *c,$/;"	f	typeref:typename:void
ubifs_release_lprops	fs/ubifs/misc.h	/^static inline void ubifs_release_lprops(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_remount_fs	fs/ubifs/super.c	/^static int ubifs_remount_fs(struct super_block *sb, int *flags, char *data)$/;"	f	typeref:typename:int	file:
ubifs_remount_ro	fs/ubifs/super.c	/^static void ubifs_remount_ro(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
ubifs_remount_rw	fs/ubifs/super.c	/^static int ubifs_remount_rw(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
ubifs_remove_from_cat	fs/ubifs/lprops.c	/^static void ubifs_remove_from_cat(struct ubifs_info *c,$/;"	f	typeref:typename:void	file:
ubifs_replace_cat	fs/ubifs/lprops.c	/^void ubifs_replace_cat(struct ubifs_info *c, struct ubifs_lprops *old_lprops,$/;"	f	typeref:typename:void
ubifs_replay_journal	fs/ubifs/replay.c	/^int ubifs_replay_journal(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_reported_space	fs/ubifs/budget.c	/^long long ubifs_reported_space(const struct ubifs_info *c, long long free)$/;"	f	typeref:typename:long long
ubifs_return_leb	fs/ubifs/misc.h	/^static inline int ubifs_return_leb(struct ubifs_info *c, int lnum)$/;"	f	typeref:typename:int
ubifs_ro_mode	fs/ubifs/io.c	/^void ubifs_ro_mode(struct ubifs_info *c, int err)$/;"	f	typeref:typename:void
ubifs_sb	fs/ubifs/super.c	/^struct super_block *ubifs_sb;$/;"	v	typeref:struct:super_block *
ubifs_sb_node	fs/ubifs/ubifs-media.h	/^struct ubifs_sb_node {$/;"	s
ubifs_scan	fs/ubifs/scan.c	/^struct ubifs_scan_leb *ubifs_scan(const struct ubifs_info *c, int lnum,$/;"	f	typeref:struct:ubifs_scan_leb *
ubifs_scan_a_node	fs/ubifs/scan.c	/^int ubifs_scan_a_node(const struct ubifs_info *c, void *buf, int len, int lnum,$/;"	f	typeref:typename:int
ubifs_scan_destroy	fs/ubifs/scan.c	/^void ubifs_scan_destroy(struct ubifs_scan_leb *sleb)$/;"	f	typeref:typename:void
ubifs_scan_leb	fs/ubifs/ubifs.h	/^struct ubifs_scan_leb {$/;"	s
ubifs_scan_node	fs/ubifs/ubifs.h	/^struct ubifs_scan_node {$/;"	s
ubifs_scanned_corruption	fs/ubifs/scan.c	/^void ubifs_scanned_corruption(const struct ubifs_info *c, int lnum, int offs,$/;"	f	typeref:typename:void
ubifs_search_bud	fs/ubifs/log.c	/^struct ubifs_bud *ubifs_search_bud(struct ubifs_info *c, int lnum)$/;"	f	typeref:struct:ubifs_bud *
ubifs_search_zbranch	fs/ubifs/tnc_misc.c	/^int ubifs_search_zbranch(const struct ubifs_info *c,$/;"	f	typeref:typename:int
ubifs_set_blk_dev	fs/ubifs/ubifs.c	/^int ubifs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)$/;"	f	typeref:typename:int
ubifs_show_options	fs/ubifs/super.c	/^static int ubifs_show_options(struct seq_file *s, struct dentry *root)$/;"	f	typeref:typename:int	file:
ubifs_shrinker_info	fs/ubifs/super.c	/^static struct shrinker ubifs_shrinker_info = {$/;"	v	typeref:struct:shrinker	file:
ubifs_size	fs/ubifs/ubifs.c	/^int ubifs_size(const char *filename, loff_t *size)$/;"	f	typeref:typename:int
ubifs_start_scan	fs/ubifs/scan.c	/^struct ubifs_scan_leb *ubifs_start_scan(const struct ubifs_info *c, int lnum,$/;"	f	typeref:struct:ubifs_scan_leb *
ubifs_statfs	fs/ubifs/super.c	/^static int ubifs_statfs(struct dentry *dentry, struct kstatfs *buf)$/;"	f	typeref:typename:int	file:
ubifs_super_operations	fs/ubifs/super.c	/^const struct super_operations ubifs_super_operations = {$/;"	v	typeref:typename:const struct super_operations
ubifs_sync_fs	fs/ubifs/super.c	/^static int ubifs_sync_fs(struct super_block *sb, int wait)$/;"	f	typeref:typename:int	file:
ubifs_sync_wbufs_by_inode	fs/ubifs/io.c	/^int ubifs_sync_wbufs_by_inode(struct ubifs_info *c, struct inode *inode)$/;"	f	typeref:typename:int
ubifs_tnc_add	fs/ubifs/tnc.c	/^int ubifs_tnc_add(struct ubifs_info *c, const union ubifs_key *key, int lnum,$/;"	f	typeref:typename:int
ubifs_tnc_add_nm	fs/ubifs/tnc.c	/^int ubifs_tnc_add_nm(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_tnc_bulk_read	fs/ubifs/tnc.c	/^int ubifs_tnc_bulk_read(struct ubifs_info *c, struct bu_info *bu)$/;"	f	typeref:typename:int
ubifs_tnc_close	fs/ubifs/tnc.c	/^void ubifs_tnc_close(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_tnc_find_child	fs/ubifs/misc.h	/^ubifs_tnc_find_child(struct ubifs_znode *znode, int start)$/;"	f	typeref:struct:ubifs_znode *
ubifs_tnc_get_bu_keys	fs/ubifs/tnc.c	/^int ubifs_tnc_get_bu_keys(struct ubifs_info *c, struct bu_info *bu)$/;"	f	typeref:typename:int
ubifs_tnc_has_node	fs/ubifs/tnc.c	/^int ubifs_tnc_has_node(struct ubifs_info *c, union ubifs_key *key, int level,$/;"	f	typeref:typename:int
ubifs_tnc_levelorder_next	fs/ubifs/tnc_misc.c	/^struct ubifs_znode *ubifs_tnc_levelorder_next(struct ubifs_znode *zr,$/;"	f	typeref:struct:ubifs_znode *
ubifs_tnc_locate	fs/ubifs/tnc.c	/^int ubifs_tnc_locate(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_tnc_lookup	fs/ubifs/misc.h	/^static inline int ubifs_tnc_lookup(struct ubifs_info *c,$/;"	f	typeref:typename:int
ubifs_tnc_lookup_nm	fs/ubifs/tnc.c	/^int ubifs_tnc_lookup_nm(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_tnc_next_ent	fs/ubifs/tnc.c	/^struct ubifs_dent_node *ubifs_tnc_next_ent(struct ubifs_info *c,$/;"	f	typeref:struct:ubifs_dent_node *
ubifs_tnc_postorder_first	fs/ubifs/tnc_misc.c	/^struct ubifs_znode *ubifs_tnc_postorder_first(struct ubifs_znode *znode)$/;"	f	typeref:struct:ubifs_znode *
ubifs_tnc_postorder_next	fs/ubifs/tnc_misc.c	/^struct ubifs_znode *ubifs_tnc_postorder_next(struct ubifs_znode *znode)$/;"	f	typeref:struct:ubifs_znode *
ubifs_tnc_read_node	fs/ubifs/tnc_misc.c	/^int ubifs_tnc_read_node(struct ubifs_info *c, struct ubifs_zbranch *zbr,$/;"	f	typeref:typename:int
ubifs_tnc_remove	fs/ubifs/tnc.c	/^int ubifs_tnc_remove(struct ubifs_info *c, const union ubifs_key *key)$/;"	f	typeref:typename:int
ubifs_tnc_remove_ino	fs/ubifs/tnc.c	/^int ubifs_tnc_remove_ino(struct ubifs_info *c, ino_t inum)$/;"	f	typeref:typename:int
ubifs_tnc_remove_nm	fs/ubifs/tnc.c	/^int ubifs_tnc_remove_nm(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_tnc_remove_range	fs/ubifs/tnc.c	/^int ubifs_tnc_remove_range(struct ubifs_info *c, union ubifs_key *from_key,$/;"	f	typeref:typename:int
ubifs_tnc_replace	fs/ubifs/tnc.c	/^int ubifs_tnc_replace(struct ubifs_info *c, const union ubifs_key *key,$/;"	f	typeref:typename:int
ubifs_trun_node	fs/ubifs/ubifs-media.h	/^struct ubifs_trun_node {$/;"	s
ubifs_umount	fs/ubifs/super.c	/^static void ubifs_umount(struct ubifs_info *c)$/;"	f	typeref:typename:void	file:
ubifs_unclean_leb	fs/ubifs/ubifs.h	/^struct ubifs_unclean_leb {$/;"	s
ubifs_unpack_bits	fs/ubifs/lpt.c	/^uint32_t ubifs_unpack_bits(uint8_t **addr, int *pos, int nrbits)$/;"	f	typeref:typename:uint32_t
ubifs_unpack_nnode	fs/ubifs/lpt.c	/^int ubifs_unpack_nnode(const struct ubifs_info *c, void *buf,$/;"	f	typeref:typename:int
ubifs_update_one_lp	fs/ubifs/lprops.c	/^int ubifs_update_one_lp(struct ubifs_info *c, int lnum, int free, int dirty,$/;"	f	typeref:typename:int
ubifs_validate_entry	fs/ubifs/replay.c	/^int ubifs_validate_entry(struct ubifs_info *c,$/;"	f	typeref:typename:int
ubifs_wake_up_bgt	fs/ubifs/misc.h	/^static inline void ubifs_wake_up_bgt(struct ubifs_info *c)$/;"	f	typeref:typename:void
ubifs_warn	fs/ubifs/ubifs.h	/^#define ubifs_warn(/;"	d
ubifs_wbuf	fs/ubifs/ubifs.h	/^struct ubifs_wbuf {$/;"	s
ubifs_wbuf_add_ino_nolock	fs/ubifs/io.c	/^void ubifs_wbuf_add_ino_nolock(struct ubifs_wbuf *wbuf, ino_t inum)$/;"	f	typeref:typename:void
ubifs_wbuf_init	fs/ubifs/io.c	/^int ubifs_wbuf_init(struct ubifs_info *c, struct ubifs_wbuf *wbuf)$/;"	f	typeref:typename:int
ubifs_wbuf_seek_nolock	fs/ubifs/io.c	/^int ubifs_wbuf_seek_nolock(struct ubifs_wbuf *wbuf, int lnum, int offs)$/;"	f	typeref:typename:int
ubifs_wbuf_sync	fs/ubifs/misc.h	/^static inline int ubifs_wbuf_sync(struct ubifs_wbuf *wbuf)$/;"	f	typeref:typename:int
ubifs_wbuf_sync_nolock	fs/ubifs/io.c	/^int ubifs_wbuf_sync_nolock(struct ubifs_wbuf *wbuf)$/;"	f	typeref:typename:int
ubifs_wbuf_write_nolock	fs/ubifs/io.c	/^int ubifs_wbuf_write_nolock(struct ubifs_wbuf *wbuf, void *buf, int len)$/;"	f	typeref:typename:int
ubifs_write_inode	fs/ubifs/super.c	/^static int ubifs_write_inode(struct inode *inode, struct writeback_control *wbc)$/;"	f	typeref:typename:int	file:
ubifs_write_master	fs/ubifs/master.c	/^int ubifs_write_master(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_write_node	fs/ubifs/io.c	/^int ubifs_write_node(struct ubifs_info *c, void *buf, int len, int lnum,$/;"	f	typeref:typename:int
ubifs_write_rcvrd_mst_node	fs/ubifs/recovery.c	/^int ubifs_write_rcvrd_mst_node(struct ubifs_info *c)$/;"	f	typeref:typename:int
ubifs_write_sb_node	fs/ubifs/sb.c	/^int ubifs_write_sb_node(struct ubifs_info *c, struct ubifs_sb_node *sup)$/;"	f	typeref:typename:int
ubifs_zbranch	fs/ubifs/ubifs.h	/^struct ubifs_zbranch {$/;"	s
ubifs_zn_cow	fs/ubifs/misc.h	/^static inline int ubifs_zn_cow(const struct ubifs_znode *znode)$/;"	f	typeref:typename:int
ubifs_zn_dirty	fs/ubifs/misc.h	/^static inline int ubifs_zn_dirty(const struct ubifs_znode *znode)$/;"	f	typeref:typename:int
ubifs_zn_obsolete	fs/ubifs/misc.h	/^static inline int ubifs_zn_obsolete(const struct ubifs_znode *znode)$/;"	f	typeref:typename:int
ubifs_znode	fs/ubifs/ubifs.h	/^struct ubifs_znode {$/;"	s
ubispl_info	include/ubispl.h	/^struct ubispl_info {$/;"	s
ubispl_load	include/ubispl.h	/^struct ubispl_load {$/;"	s
ubispl_load_volumes	drivers/mtd/ubispl/ubispl.c	/^int ubispl_load_volumes(struct ubispl_info *info, struct ubispl_load *lvols,$/;"	f	typeref:typename:int
ubispl_read_flash	include/ubispl.h	/^typedef int (*ubispl_read_flash)(int pnum, int offset, int len, void *dst);$/;"	t	typeref:typename:int (*)(int pnum,int offset,int len,void * dst)
ubivol	include/splash.h	/^	char *ubivol;	\/* UBI volume-name for ubifsmount *\/$/;"	m	struct:splash_location	typeref:typename:char *
ubl_header	tools/ublimage.h	/^struct ubl_header {$/;"	s
ublimage_bootops	tools/ublimage.c	/^static table_entry_t ublimage_bootops[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
ublimage_check_image_types	tools/ublimage.c	/^static int ublimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
ublimage_check_params	tools/ublimage.c	/^int ublimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int
ublimage_cmd	tools/ublimage.h	/^enum ublimage_cmd {$/;"	g
ublimage_cmds	tools/ublimage.c	/^static table_entry_t ublimage_cmds[] = {$/;"	v	typeref:typename:table_entry_t[]	file:
ublimage_fld_types	tools/ublimage.h	/^enum ublimage_fld_types {$/;"	g
ublimage_header	tools/ublimage.c	/^static struct ubl_header ublimage_header;$/;"	v	typeref:struct:ubl_header	file:
ublimage_print_header	tools/ublimage.c	/^static void ublimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
ublimage_set_header	tools/ublimage.c	/^static void ublimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
ublimage_verify_header	tools/ublimage.c	/^static int ublimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
ubo_h	drivers/video/mx3fb.c	/^	u32	ubo_h:15;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:15	file:
ubo_l	drivers/video/mx3fb.c	/^	u32	ubo_l:11;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:11	file:
uboot_cli_readline	common/cli_hush.c	/^static int uboot_cli_readline(struct in_str *i)$/;"	f	typeref:typename:int	file:
uboot_cntr_val	arch/arm/mach-orion5x/timer.c	/^static inline ulong uboot_cntr_val(void)$/;"	f	typeref:typename:ulong	file:
uboot_loaded_by_spl	arch/arm/include/asm/ti-common/sys_proto.h	/^static inline u8 uboot_loaded_by_spl(void)$/;"	f	typeref:typename:u8
uboot_push_packet_len	drivers/net/ne2000_base.c	/^void uboot_push_packet_len(int len) {$/;"	f	typeref:typename:void
uboot_push_tx_done	drivers/net/ne2000_base.c	/^void uboot_push_tx_done(int key, int val) {$/;"	f	typeref:typename:void
uboot_size	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		uboot_size;$/;"	m	struct:spl_machine_param	typeref:typename:u32
uboot_size	tools/pblimage.c	/^static int uboot_size;$/;"	v	typeref:typename:int	file:
uboot_ubifs_mount	fs/ubifs/super.c	/^int uboot_ubifs_mount(char *vol_name)$/;"	f	typeref:typename:int
uboot_ubifs_umount	fs/ubifs/ubifs.c	/^void uboot_ubifs_umount(void)$/;"	f	typeref:typename:void
uboot_version	board/Synology/ds109/ds109.h	/^	u32 uboot_version;$/;"	m	struct:tag_mv_uboot	typeref:typename:u32
ubootrelease	Makefile	/^ubootrelease:$/;"	t
ubootversion	Makefile	/^ubootversion:$/;"	t
ubrdiv	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	ubrdiv;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
ubrdiv	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	ubrdiv;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ubrdiv	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	ubrdiv;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ubsha1-objs	tools/Makefile	/^ubsha1-objs := os_support.o ubsha1.o lib\/sha1.o$/;"	m
uc	drivers/net/pcnet.c	/^	struct pcnet_uncached_priv *uc;$/;"	m	struct:pcnet_priv	typeref:struct:pcnet_uncached_priv *	file:
uc	include/ddr_spd.h	/^		uint8_t uc[128]; \/* 128-255 Module-Specific Section *\/$/;"	m	union:ddr4_spd_eeprom_s::__anoncde79dee040a	typeref:typename:uint8_t[128]
uc	include/ddr_spd.h	/^		unsigned char uc[57]; \/* 60-116 Module-Specific Section *\/$/;"	m	union:ddr3_spd_eeprom_s::__anoncde79dee010a	typeref:typename:unsigned char[57]
uc	lib/display_options.c	/^		uint8_t  uc[MAX_LINE_LENGTH_BYTES\/sizeof(uint8_t) + 1];$/;"	m	union:print_buffer::linebuf	typeref:typename:uint8_t[]	file:
uc1	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uc1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc1	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uc1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uc1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc2	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uc2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc2	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uc2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uc2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc3	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uc3;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc3	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uc3;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc3	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uc3;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc4	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uc4;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc4	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uc4;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc4	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uc4;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc5	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uc5;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc5	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uc5;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uc5	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uc5;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ucCommand	board/esd/common/xilinx_jtag/micro.c	/^	unsigned char   ucCommand;          \/* Current XSVF command byte *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:unsigned char	file:
ucComplete	board/esd/common/xilinx_jtag/micro.c	/^	unsigned char   ucComplete;         \/* 0 = running; 1 = complete *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:unsigned char	file:
ucEndDR	board/esd/common/xilinx_jtag/micro.c	/^	unsigned char   ucEndDR;            \/* ENDDR TAP state (See SVF) *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:unsigned char	file:
ucEndIR	board/esd/common/xilinx_jtag/micro.c	/^	unsigned char   ucEndIR;            \/* ENDIR TAP state (See SVF) *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:unsigned char	file:
ucMaxRepeat	board/esd/common/xilinx_jtag/micro.c	/^	unsigned char   ucMaxRepeat;        \/* Max repeat loops (for xc9500\/xl) *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:unsigned char	file:
ucTapState	board/esd/common/xilinx_jtag/micro.c	/^	unsigned char   ucTapState;         \/* Current TAP state *\/$/;"	m	struct:tagSXsvfInfo	typeref:typename:unsigned char	file:
ucUpdate	include/lattice.h	/^	unsigned char  ucUpdate;$/;"	m	struct:__anon773a64540108	typeref:typename:unsigned char
uc_drv	include/dm/uclass.h	/^	struct uclass_driver *uc_drv;$/;"	m	struct:uclass	typeref:struct:uclass_driver *
ucc	include/linux/immap_qe.h	/^typedef struct ucc {$/;"	s
ucc1	include/linux/immap_qe.h	/^	ucc_t ucc1;		\/* ucc1 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc2	include/linux/immap_qe.h	/^	ucc_t ucc2;		\/* ucc2 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc3	include/linux/immap_qe.h	/^	ucc_t ucc3;		\/* ucc3 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc4	include/linux/immap_qe.h	/^	ucc_t ucc4;		\/* ucc4 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc5	include/linux/immap_qe.h	/^	ucc_t ucc5;		\/* ucc5 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc6	include/linux/immap_qe.h	/^	ucc_t ucc6;		\/* ucc6 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc7	include/linux/immap_qe.h	/^	ucc_t ucc7;		\/* ucc7 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc8	include/linux/immap_qe.h	/^	ucc_t ucc8;		\/* ucc8 *\/$/;"	m	struct:qe_immap	typeref:typename:ucc_t
ucc_common	include/linux/immap_qe.h	/^typedef struct ucc_common {$/;"	s
ucc_common_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) ucc_common_t;$/;"	t	typeref:struct:ucc_common
ucc_eth	include/linux/immap_qe.h	/^	uec_t ucc_eth;$/;"	m	struct:ucc_fast	typeref:typename:uec_t
ucc_ethernet	include/linux/immap_qe.h	/^typedef struct ucc_ethernet {$/;"	s
ucc_fast	include/linux/immap_qe.h	/^typedef struct ucc_fast {$/;"	s
ucc_fast_disable	drivers/qe/uccf.c	/^void ucc_fast_disable(ucc_fast_private_t *uccf, comm_dir_e mode)$/;"	f	typeref:typename:void
ucc_fast_enable	drivers/qe/uccf.c	/^void ucc_fast_enable(ucc_fast_private_t *uccf, comm_dir_e mode)$/;"	f	typeref:typename:void
ucc_fast_get_qe_cr_subblock	drivers/qe/uccf.c	/^u32 ucc_fast_get_qe_cr_subblock(int ucc_num)$/;"	f	typeref:typename:u32
ucc_fast_info	drivers/qe/uccf.h	/^typedef struct ucc_fast_info {$/;"	s
ucc_fast_info_t	drivers/qe/uccf.h	/^} ucc_fast_info_t;$/;"	t	typeref:struct:ucc_fast_info
ucc_fast_init	drivers/qe/uccf.c	/^int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t  **uccf_ret)$/;"	f	typeref:typename:int
ucc_fast_private	drivers/qe/uccf.h	/^typedef struct ucc_fast_private {$/;"	s
ucc_fast_private_t	drivers/qe/uccf.h	/^} ucc_fast_private_t;$/;"	t	typeref:struct:ucc_fast_private
ucc_fast_rx_virtual_fifo_base_offset	drivers/qe/uccf.h	/^	u32		ucc_fast_rx_virtual_fifo_base_offset;$/;"	m	struct:ucc_fast_private	typeref:typename:u32
ucc_fast_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) ucc_fast_t;$/;"	t	typeref:struct:ucc_fast
ucc_fast_transmit_on_demand	drivers/qe/uccf.c	/^void ucc_fast_transmit_on_demand(ucc_fast_private_t *uccf)$/;"	f	typeref:typename:void
ucc_fast_tx_virtual_fifo_base_offset	drivers/qe/uccf.h	/^	u32		ucc_fast_tx_virtual_fifo_base_offset;$/;"	m	struct:ucc_fast_private	typeref:typename:u32
ucc_get_cmxucr_reg	drivers/qe/uccf.c	/^static void ucc_get_cmxucr_reg(int ucc_num, volatile u32 **p_cmxucr,$/;"	f	typeref:typename:void	file:
ucc_get_reg_baseaddr	drivers/qe/uccf.c	/^static uint ucc_get_reg_baseaddr(int ucc_num)$/;"	f	typeref:typename:uint	file:
ucc_mii_mng	include/linux/immap_qe.h	/^typedef struct ucc_mii_mng {$/;"	s
ucc_num	drivers/qe/uccf.h	/^	int		ucc_num;$/;"	m	struct:ucc_fast_info	typeref:typename:int
ucc_set_clk_src	drivers/qe/uccf.c	/^static int ucc_set_clk_src(int ucc_num, qe_clock_e clock, comm_dir_e mode)$/;"	f	typeref:typename:int	file:
ucc_slow	include/linux/immap_qe.h	/^typedef struct ucc_slow {$/;"	s
ucc_slow_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) ucc_slow_t;$/;"	t	typeref:struct:ucc_slow
ucc_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) ucc_t;$/;"	t	typeref:struct:ucc
ucce	include/linux/immap_qe.h	/^	u16 ucce;		\/* UCCx event register *\/$/;"	m	struct:ucc_slow	typeref:typename:u16
ucce	include/linux/immap_qe.h	/^	u32 ucce;		\/* UCCx event register *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
uccf	drivers/qe/uec.h	/^	ucc_fast_private_t		*uccf;$/;"	m	struct:uec_private	typeref:typename:ucc_fast_private_t *
uccm	include/linux/immap_qe.h	/^	u16 uccm;		\/* UCCx mask register *\/$/;"	m	struct:ucc_slow	typeref:typename:u16
uccm	include/linux/immap_qe.h	/^	u32 uccm;		\/* UCCx mask register.  *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
uccs	include/linux/immap_qe.h	/^	u8 uccs;		\/* UCCx status register *\/$/;"	m	struct:ucc_fast	typeref:typename:u8
uccs	include/linux/immap_qe.h	/^	u8 uccs;		\/* UCCx status register *\/$/;"	m	struct:ucc_slow	typeref:typename:u8
ucfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 ucfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ucfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 ucfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ucfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 ucfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uch	lib/zlib/zutil.h	/^typedef unsigned char  uch;$/;"	t	typeref:typename:unsigned char
uchar	include/common.h	/^typedef unsigned char		uchar;$/;"	t	typeref:typename:unsigned char
uchf	lib/zlib/zutil.h	/^typedef uch FAR uchf;$/;"	t	typeref:typename:uch FAR
uckr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	uckr;		\/* 0x1C UTMI Clock Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
uclass	include/dm/device.h	/^	struct uclass *uclass;$/;"	m	struct:udevice	typeref:struct:uclass *
uclass	include/dm/uclass.h	/^struct uclass {$/;"	s
uclass_add	drivers/core/uclass.c	/^static int uclass_add(enum uclass_id id, struct uclass **ucp)$/;"	f	typeref:typename:int	file:
uclass_bind_device	drivers/core/uclass.c	/^int uclass_bind_device(struct udevice *dev)$/;"	f	typeref:typename:int
uclass_bind_flag	test/dm/bus.c	/^	int uclass_bind_flag;$/;"	m	struct:dm_test_parent_platdata	typeref:typename:int	file:
uclass_cpu_init	drivers/cpu/cpu-uclass.c	/^static int uclass_cpu_init(struct uclass *uc)$/;"	f	typeref:typename:int	file:
uclass_destroy	drivers/core/uclass.c	/^int uclass_destroy(struct uclass *uc)$/;"	f	typeref:typename:int
uclass_driver	include/dm/uclass.h	/^struct uclass_driver {$/;"	s
uclass_find	drivers/core/uclass.c	/^struct uclass *uclass_find(enum uclass_id key)$/;"	f	typeref:struct:uclass *
uclass_find_device	drivers/core/uclass.c	/^int uclass_find_device(enum uclass_id id, int index, struct udevice **devp)$/;"	f	typeref:typename:int
uclass_find_device_by_name	drivers/core/uclass.c	/^int uclass_find_device_by_name(enum uclass_id id, const char *name,$/;"	f	typeref:typename:int
uclass_find_device_by_of_offset	drivers/core/uclass.c	/^int uclass_find_device_by_of_offset(enum uclass_id id, int node,$/;"	f	typeref:typename:int
uclass_find_device_by_phandle	drivers/core/uclass.c	/^static int uclass_find_device_by_phandle(enum uclass_id id,$/;"	f	typeref:typename:int	file:
uclass_find_device_by_seq	drivers/core/uclass.c	/^int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,$/;"	f	typeref:typename:int
uclass_find_first_device	drivers/core/uclass.c	/^int uclass_find_first_device(enum uclass_id id, struct udevice **devp)$/;"	f	typeref:typename:int
uclass_find_next_device	drivers/core/uclass.c	/^int uclass_find_next_device(struct udevice **devp)$/;"	f	typeref:typename:int
uclass_first_device	drivers/core/uclass.c	/^int uclass_first_device(enum uclass_id id, struct udevice **devp)$/;"	f	typeref:typename:int
uclass_first_device_err	drivers/core/uclass.c	/^int uclass_first_device_err(enum uclass_id id, struct udevice **devp)$/;"	f	typeref:typename:int
uclass_flag	include/dm/test.h	/^	int uclass_flag;$/;"	m	struct:dm_test_priv	typeref:typename:int
uclass_foreach_dev	include/dm/uclass.h	/^#define uclass_foreach_dev(/;"	d
uclass_foreach_dev_safe	include/dm/uclass.h	/^#define uclass_foreach_dev_safe(/;"	d
uclass_get	drivers/core/uclass.c	/^int uclass_get(enum uclass_id id, struct uclass **ucp)$/;"	f	typeref:typename:int
uclass_get_device	drivers/core/uclass.c	/^int uclass_get_device(enum uclass_id id, int index, struct udevice **devp)$/;"	f	typeref:typename:int
uclass_get_device_by_driver	drivers/core/uclass.c	/^int uclass_get_device_by_driver(enum uclass_id id,$/;"	f	typeref:typename:int
uclass_get_device_by_name	drivers/core/uclass.c	/^int uclass_get_device_by_name(enum uclass_id id, const char *name,$/;"	f	typeref:typename:int
uclass_get_device_by_of_offset	drivers/core/uclass.c	/^int uclass_get_device_by_of_offset(enum uclass_id id, int node,$/;"	f	typeref:typename:int
uclass_get_device_by_phandle	drivers/core/uclass.c	/^int uclass_get_device_by_phandle(enum uclass_id id, struct udevice *parent,$/;"	f	typeref:typename:int
uclass_get_device_by_seq	drivers/core/uclass.c	/^int uclass_get_device_by_seq(enum uclass_id id, int seq, struct udevice **devp)$/;"	f	typeref:typename:int
uclass_get_device_tail	drivers/core/uclass.c	/^int uclass_get_device_tail(struct udevice *dev, int ret,$/;"	f	typeref:typename:int
uclass_get_name	drivers/core/uclass.c	/^const char *uclass_get_name(enum uclass_id id)$/;"	f	typeref:typename:const char *
uclass_id	include/dm/uclass-id.h	/^enum uclass_id {$/;"	g
uclass_next_device	drivers/core/uclass.c	/^int uclass_next_device(struct udevice **devp)$/;"	f	typeref:typename:int
uclass_node	include/dm/device.h	/^	struct list_head uclass_node;$/;"	m	struct:udevice	typeref:struct:list_head
uclass_platdata	include/dm/device.h	/^	void *uclass_platdata;$/;"	m	struct:udevice	typeref:typename:void *
uclass_post_probe_device	drivers/core/uclass.c	/^int uclass_post_probe_device(struct udevice *dev)$/;"	f	typeref:typename:int
uclass_pre_probe_device	drivers/core/uclass.c	/^int uclass_pre_probe_device(struct udevice *dev)$/;"	f	typeref:typename:int
uclass_pre_remove_device	drivers/core/uclass.c	/^int uclass_pre_remove_device(struct udevice *dev)$/;"	f	typeref:typename:int
uclass_pre_remove_device	include/dm/uclass-internal.h	/^static inline int uclass_pre_remove_device(struct udevice *dev) { return 0; }$/;"	f	typeref:typename:int
uclass_priv	include/dm/device.h	/^	void *uclass_priv;$/;"	m	struct:udevice	typeref:typename:void *
uclass_resolve_seq	drivers/core/uclass.c	/^int uclass_resolve_seq(struct udevice *dev)$/;"	f	typeref:typename:int
uclass_root	include/asm-generic/global_data.h	/^	struct list_head uclass_root;	\/* Head of core tree *\/$/;"	m	struct:global_data	typeref:struct:list_head
uclass_total	include/dm/test.h	/^	int uclass_total;$/;"	m	struct:dm_test_priv	typeref:typename:int
uclass_unbind_device	drivers/core/uclass.c	/^int uclass_unbind_device(struct udevice *dev)$/;"	f	typeref:typename:int
uclass_unbind_device	include/dm/uclass-internal.h	/^static inline int uclass_unbind_device(struct udevice *dev) { return 0; }$/;"	f	typeref:typename:int
ucode_base	arch/x86/cpu/intel_common/car.S	/^ucode_base:	\/* Declared in microcode.h *\/$/;"	l
ucode_base	arch/x86/lib/fsp/fsp_car.S	/^ucode_base:	\/* Declared in micrcode.h *\/$/;"	l
ucode_version	include/cpu.h	/^	int ucode_version;$/;"	m	struct:cpu_platdata	typeref:typename:int
ucon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	ucon;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
ucon	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	ucon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ucon	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	ucon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ucr	arch/m68k/include/asm/uart.h	/^	u8 ucr;			\/* 0x08 Command Register *\/$/;"	m	struct:uart	typeref:typename:u8
ucsr	arch/m68k/include/asm/uart.h	/^		u8 ucsr;	\/* 0x04 Clock Select Register *\/$/;"	m	union:uart::__anona45981bc010a	typeref:typename:u8
ucts_pol	arch/m68k/include/asm/immap_5441x.h	/^	u16 ucts_pol;		\/* 0x76 *\/$/;"	m	struct:gpio	typeref:typename:u16
ucv	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int ucv;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
ud	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 ud;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ud	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 ud;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ud	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 ud;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
udc	drivers/usb/gadget/at91_udc.h	/^	struct at91_udc			*udc;$/;"	m	struct:at91_ep	typeref:struct:at91_udc *
udc	drivers/usb/gadget/atmel_usba_udc.h	/^	struct usba_udc				*udc;$/;"	m	struct:usba_ep	typeref:struct:usba_udc *
udc	drivers/usb/gadget/pxa25x_udc.h	/^	struct pxa25x_udc			*udc;$/;"	m	struct:pxa25x_watchdog	typeref:struct:pxa25x_udc *
udc_ack_int_UDCCR	drivers/usb/gadget/pxa25x_udc.c	/^static inline void udc_ack_int_UDCCR(int mask)$/;"	f	typeref:typename:void	file:
udc_ack_int_UDCCR	drivers/usb/gadget/pxa27x_udc.c	/^static inline void udc_ack_int_UDCCR(int mask)$/;"	f	typeref:typename:void	file:
udc_bind_to_driver	drivers/usb/gadget/udc/udc-core.c	/^static int udc_bind_to_driver(struct usb_udc *udc, struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int	file:
udc_class	drivers/usb/gadget/udc/udc-core.c	/^static struct class *udc_class;$/;"	v	typeref:struct:class *	file:
udc_clear_mask_UDCCR	drivers/usb/gadget/pxa25x_udc.c	/^static inline void udc_clear_mask_UDCCR(int mask)$/;"	f	typeref:typename:void	file:
udc_clear_mask_UDCCR	drivers/usb/gadget/pxa27x_udc.c	/^static inline void udc_clear_mask_UDCCR(int mask)$/;"	f	typeref:typename:void	file:
udc_clk	arch/arm/dts/at91sam9260.dtsi	/^					udc_clk: udc_clk {$/;"	l
udc_clk	arch/arm/dts/at91sam9261.dtsi	/^					udc_clk: udc_clk {$/;"	l
udc_clk	arch/arm/dts/at91sam9263.dtsi	/^					udc_clk: udc_clk {$/;"	l
udc_command	drivers/usb/gadget/pxa25x_udc.c	/^static void udc_command(int cmd)$/;"	f	typeref:typename:void	file:
udc_command	drivers/usb/gadget/pxa25x_udc.h	/^	void (*udc_command)(int cmd);$/;"	m	struct:pxa2xx_udc_mach_info	typeref:typename:void (*)(int cmd)
udc_connect	drivers/usb/gadget/designware_udc.c	/^void udc_connect(void)$/;"	f	typeref:typename:void
udc_connect	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_connect (void)$/;"	f	typeref:typename:void
udc_connect	drivers/usb/gadget/pxa27x_udc.c	/^void udc_connect(void)$/;"	f	typeref:typename:void
udc_connect	drivers/usb/musb/musb_udc.c	/^void udc_connect(void)$/;"	f	typeref:typename:void
udc_device	drivers/usb/gadget/designware_udc.c	/^static struct usb_device_instance *udc_device;$/;"	v	typeref:struct:usb_device_instance *	file:
udc_device	drivers/usb/gadget/mpc8xx_udc.c	/^static struct usb_device_instance *udc_device = 0;$/;"	v	typeref:struct:usb_device_instance *	file:
udc_device	drivers/usb/gadget/pxa27x_udc.c	/^static struct usb_device_instance *udc_device;$/;"	v	typeref:struct:usb_device_instance *	file:
udc_device	drivers/usb/musb/musb_udc.c	/^static struct usb_device_instance *udc_device;$/;"	v	typeref:struct:usb_device_instance *	file:
udc_disable	drivers/usb/gadget/dwc2_udc_otg.c	/^static void udc_disable(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
udc_disable	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_disable (void)$/;"	f	typeref:typename:void
udc_disable	drivers/usb/gadget/pxa25x_udc.c	/^static void udc_disable(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
udc_disable	drivers/usb/gadget/pxa27x_udc.c	/^void udc_disable(void)$/;"	f	typeref:typename:void
udc_disable	drivers/usb/musb/musb_udc.c	/^void udc_disable(void)$/;"	f	typeref:typename:void
udc_disconnect	drivers/usb/gadget/ci_udc.c	/^void udc_disconnect(void)$/;"	f	typeref:typename:void
udc_disconnect	drivers/usb/gadget/designware_udc.c	/^void udc_disconnect(void)$/;"	f	typeref:typename:void
udc_disconnect	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_disconnect (void)$/;"	f	typeref:typename:void
udc_disconnect	drivers/usb/gadget/pxa25x_udc.c	/^extern void udc_disconnect(void)$/;"	f	typeref:typename:void
udc_disconnect	drivers/usb/gadget/pxa27x_udc.c	/^void udc_disconnect(void)$/;"	f	typeref:typename:void
udc_disconnect	drivers/usb/musb/musb_udc.c	/^void udc_disconnect(void)$/;"	f	typeref:typename:void
udc_dump_buffer	drivers/usb/gadget/pxa27x_udc.c	/^#define udc_dump_buffer(/;"	d	file:
udc_dump_buffer	drivers/usb/gadget/pxa27x_udc.c	/^static void udc_dump_buffer(char *name, u8 *buf, int len)$/;"	f	typeref:typename:void	file:
udc_enable	drivers/usb/gadget/designware_udc.c	/^void udc_enable(struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_enable	drivers/usb/gadget/dwc2_udc_otg.c	/^static int udc_enable(struct dwc2_udc *dev)$/;"	f	typeref:typename:int	file:
udc_enable	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_enable (struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_enable	drivers/usb/gadget/pxa25x_udc.c	/^static void udc_enable(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
udc_enable	drivers/usb/gadget/pxa27x_udc.c	/^void udc_enable(struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_enable	drivers/usb/musb/musb_udc.c	/^void udc_enable(struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_endp_reg	include/usb/designware_udc.h	/^	u32 udc_endp_reg[MAX_ENDPOINTS];$/;"	m	struct:udc_regs	typeref:typename:u32[]
udc_endp_regs	include/usb/designware_udc.h	/^struct udc_endp_regs {$/;"	s
udc_endpoint_write	drivers/usb/gadget/designware_udc.c	/^int udc_endpoint_write(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:int
udc_endpoint_write	drivers/usb/gadget/mpc8xx_udc.c	/^int udc_endpoint_write (struct usb_endpoint_instance *epi)$/;"	f	typeref:typename:int
udc_endpoint_write	drivers/usb/gadget/pxa27x_udc.c	/^int udc_endpoint_write(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:int
udc_endpoint_write	drivers/usb/musb/musb_udc.c	/^int udc_endpoint_write(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:int
udc_handle_ep	drivers/usb/gadget/pxa27x_udc.c	/^static void udc_handle_ep(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:void	file:
udc_handle_ep0	drivers/usb/gadget/pxa27x_udc.c	/^static void udc_handle_ep0(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:void	file:
udc_init	drivers/usb/gadget/designware_udc.c	/^int udc_init(void)$/;"	f	typeref:typename:int
udc_init	drivers/usb/gadget/mpc8xx_udc.c	/^int udc_init (void)$/;"	f	typeref:typename:int
udc_init	drivers/usb/gadget/pxa27x_udc.c	/^int udc_init(void)$/;"	f	typeref:typename:int
udc_init	drivers/usb/musb/musb_udc.c	/^int udc_init(void)$/;"	f	typeref:typename:int
udc_irq	drivers/usb/gadget/ci_udc.c	/^void udc_irq(void)$/;"	f	typeref:typename:void
udc_irq	drivers/usb/gadget/designware_udc.c	/^void udc_irq(void)$/;"	f	typeref:typename:void
udc_irq	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_irq (void)$/;"	f	typeref:typename:void
udc_irq	drivers/usb/gadget/pxa27x_udc.c	/^void udc_irq(void)$/;"	f	typeref:typename:void
udc_irq	drivers/usb/musb/musb_udc.c	/^void udc_irq(void)$/;"	f	typeref:typename:void
udc_is_connected	drivers/usb/gadget/pxa25x_udc.h	/^	int  (*udc_is_connected)(void);		\/* do we see host? *\/$/;"	m	struct:pxa2xx_udc_mach_info	typeref:typename:int (*)(void)
udc_read_urb	drivers/usb/gadget/pxa27x_udc.c	/^static int udc_read_urb(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:int	file:
udc_read_urb_ep0	drivers/usb/gadget/pxa27x_udc.c	/^static int udc_read_urb_ep0(void)$/;"	f	typeref:typename:int	file:
udc_regs	include/usb/designware_udc.h	/^struct udc_regs {$/;"	s
udc_regs_p	drivers/usb/gadget/designware_udc.c	/^static struct udc_regs *const udc_regs_p =$/;"	v	typeref:struct:udc_regs * const	file:
udc_reinit	drivers/usb/gadget/at91_udc.c	/^static void udc_reinit(struct at91_udc *udc)$/;"	f	typeref:typename:void	file:
udc_reinit	drivers/usb/gadget/dwc2_udc_otg.c	/^static void udc_reinit(struct dwc2_udc *dev)$/;"	f	typeref:typename:void	file:
udc_reinit	drivers/usb/gadget/pxa25x_udc.c	/^static void udc_reinit(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
udc_set_address	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static void udc_set_address(struct dwc2_udc *dev, unsigned char address)$/;"	f	typeref:typename:void	file:
udc_set_mask_UDCCR	drivers/usb/gadget/pxa25x_udc.c	/^static inline void udc_set_mask_UDCCR(int mask)$/;"	f	typeref:typename:void	file:
udc_set_mask_UDCCR	drivers/usb/gadget/pxa27x_udc.c	/^static inline void udc_set_mask_UDCCR(int mask)$/;"	f	typeref:typename:void	file:
udc_set_nak	drivers/usb/gadget/designware_udc.c	/^void udc_set_nak(int epid)$/;"	f	typeref:typename:void
udc_set_nak	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_set_nak (int epid)$/;"	f	typeref:typename:void
udc_set_nak	drivers/usb/gadget/pxa27x_udc.c	/^void udc_set_nak(int ep_num)$/;"	f	typeref:typename:void
udc_set_nak	drivers/usb/musb/musb_udc.c	/^void udc_set_nak(int ep_num)$/;"	f	typeref:typename:void
udc_setup_ep	drivers/usb/gadget/designware_udc.c	/^void udc_setup_ep(struct usb_device_instance *device,$/;"	f	typeref:typename:void
udc_setup_ep	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_setup_ep (struct usb_device_instance *device, unsigned int ep,$/;"	f	typeref:typename:void
udc_setup_ep	drivers/usb/gadget/pxa27x_udc.c	/^void udc_setup_ep(struct usb_device_instance *device, unsigned int id,$/;"	f	typeref:typename:void
udc_setup_ep	drivers/usb/musb/musb_udc.c	/^void udc_setup_ep(struct usb_device_instance *device, unsigned int id,$/;"	f	typeref:typename:void
udc_stall_ep	drivers/usb/gadget/designware_udc.c	/^static void udc_stall_ep(u32 ep_num)$/;"	f	typeref:typename:void	file:
udc_start	include/linux/usb/gadget.h	/^	int	(*udc_start)(struct usb_gadget *,$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *,struct usb_gadget_driver *)
udc_startup_events	drivers/usb/gadget/designware_udc.c	/^void udc_startup_events(struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_startup_events	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_startup_events (struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_startup_events	drivers/usb/gadget/pxa27x_udc.c	/^void udc_startup_events(struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_startup_events	drivers/usb/musb/musb_udc.c	/^void udc_startup_events(struct usb_device_instance *device)$/;"	f	typeref:typename:void
udc_state	drivers/usb/gadget/mpc8xx_udc.c	/^static mpc8xx_udc_state_t udc_state = 0;$/;"	v	typeref:typename:mpc8xx_udc_state_t	file:
udc_state_changed	drivers/usb/gadget/pxa27x_udc.c	/^static void udc_state_changed(void)$/;"	f	typeref:typename:void	file:
udc_state_transition	drivers/usb/gadget/designware_udc.c	/^static void udc_state_transition(usb_device_state_t initial,$/;"	f	typeref:typename:void	file:
udc_stats	drivers/usb/gadget/pxa25x_udc.h	/^struct udc_stats {$/;"	s
udc_stop	include/linux/usb/gadget.h	/^	int	(*udc_stop)(struct usb_gadget *);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *)
udc_unset_nak	drivers/usb/gadget/designware_udc.c	/^void udc_unset_nak(int epid)$/;"	f	typeref:typename:void
udc_unset_nak	drivers/usb/gadget/mpc8xx_udc.c	/^void udc_unset_nak (int epid)$/;"	f	typeref:typename:void
udc_unset_nak	drivers/usb/gadget/pxa27x_udc.c	/^void udc_unset_nak(int ep_num)$/;"	f	typeref:typename:void
udc_unset_nak	drivers/usb/musb/musb_udc.c	/^void udc_unset_nak(int ep_num)$/;"	f	typeref:typename:void
udc_watchdog	drivers/usb/gadget/pxa25x_udc.c	/^static void udc_watchdog(struct pxa25x_udc *dev)$/;"	f	typeref:typename:void	file:
udc_write_urb	drivers/usb/gadget/pxa27x_udc.c	/^static int udc_write_urb(struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:int	file:
udccfr	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	udccfr; \/* 0x008 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
udccr	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	udccr; \/* 0x000 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
udccs	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	udccs[16]; \/* 0x010 - 0x04c *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t[16]
udcfifo_regs	include/usb/designware_udc.h	/^struct udcfifo_regs {$/;"	s
uddr0	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr0;  \/* 0x080 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr1	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr1;  \/* 0x100 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr10	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr10; \/* 0x0c0 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr11	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr11; \/* 0xb00 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr12	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr12; \/* 0xb80 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr13	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr13; \/* 0xc00 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr14	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr14; \/* 0xe00 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr15	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr15; \/* 0x0e0 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr2	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr2;  \/* 0x180 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr3	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr3;  \/* 0x200 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr4	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr4;  \/* 0x400 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr5	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr5;  \/* 0x0a0 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr6	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr6;  \/* 0x600 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr7	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr7;  \/* 0x680 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr8	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr8;  \/* 0x700 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uddr9	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uddr9;  \/* 0x900 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
udelay	arch/powerpc/cpu/mpc85xx/spl_minimal.c	/^void udelay(unsigned long usec)$/;"	f	typeref:typename:void
udelay	drivers/i2c/i2c-gpio.c	/^	int udelay;$/;"	m	struct:i2c_gpio_bus	typeref:typename:int	file:
udelay	lib/time.c	/^void udelay(unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/cpu/arm920t/imx/timer.c	/^void udelay_masked (unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/cpu/arm920t/s3c24x0/timer.c	/^void udelay_masked(unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/cpu/arm926ejs/omap/timer.c	/^void udelay_masked (unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/cpu/arm926ejs/spear/timer.c	/^void udelay_masked(unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/cpu/armv7/stv0991/timer.c	/^void udelay_masked(unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/cpu/sa1100/timer.c	/^void udelay_masked (unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/mach-at91/arm920t/timer.c	/^void udelay_masked(unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	arch/arm/mach-stm32/stm32f7/timer.c	/^void udelay_masked(unsigned long usec)$/;"	f	typeref:typename:void
udelay_masked	board/armltd/integrator/timer.c	/^void udelay_masked (unsigned long usec)$/;"	f	typeref:typename:void
udev	drivers/usb/eth/r8152.h	/^	struct usb_device *udev;$/;"	m	struct:r8152	typeref:struct:usb_device *
udev	drivers/usb/host/isp116x.h	/^	struct usb_device *udev;$/;"	m	struct:isp116x_ep	typeref:struct:usb_device *
udev	drivers/usb/host/xhci.h	/^	struct usb_device		*udev;$/;"	m	struct:xhci_virt_device	typeref:struct:usb_device *
udev	include/usb.h	/^	struct usb_device *udev;$/;"	m	struct:usb_dev_platdata	typeref:struct:usb_device *
udevice	include/dm/device.h	/^struct udevice {$/;"	s
udevice_id	include/dm/device.h	/^struct udevice_id {$/;"	s
udf	drivers/net/mvpp2.c	/^	int udf;$/;"	m	struct:mvpp2_prs_shadow	typeref:typename:int	file:
udge	drivers/video/ipu_regs.h	/^	u32 udge[16];$/;"	m	struct:ipu_dc	typeref:typename:u32[16]
udimm0	board/freescale/b4860qds/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm0	board/freescale/corenet_ds/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm0	board/freescale/ls1021aqds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls1043aqds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls1043ardb/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls1046aqds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls1046ardb/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls2080a/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls2080aqds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/ls2080ardb/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/mpc8349emds/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm0	board/freescale/mpc8572ds/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm0	board/freescale/t102xqds/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm0	board/freescale/t102xrdb/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm0	board/freescale/t1040qds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/t104xrdb/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/t208xqds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/t208xrdb/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/t4qds/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/freescale/t4rdb/ddr.h	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm0	board/varisys/cyrus/ddr.c	/^static const struct board_specific_parameters udimm0[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm1	board/freescale/mpc8572ds/ddr.c	/^static const struct board_specific_parameters udimm1[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]	file:
udimm2	board/freescale/ls2080a/ddr.h	/^static const struct board_specific_parameters udimm2[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm2	board/freescale/ls2080aqds/ddr.h	/^static const struct board_specific_parameters udimm2[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimm2	board/freescale/ls2080ardb/ddr.h	/^static const struct board_specific_parameters udimm2[] = {$/;"	v	typeref:typename:const struct board_specific_parameters[]
udimms	board/freescale/b4860qds/ddr.c	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
udimms	board/freescale/corenet_ds/ddr.c	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
udimms	board/freescale/ls1021aqds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls1043aqds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls1043ardb/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls1046aqds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls1046ardb/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls2080a/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls2080aqds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/ls2080ardb/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/mpc8572ds/ddr.c	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
udimms	board/freescale/t102xqds/ddr.c	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
udimms	board/freescale/t102xrdb/ddr.c	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
udimms	board/freescale/t1040qds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/t104xrdb/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/t208xqds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/t208xrdb/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/t4qds/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/freescale/t4rdb/ddr.h	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []
udimms	board/varisys/cyrus/ddr.c	/^static const struct board_specific_parameters *udimms[] = {$/;"	v	typeref:typename:const struct board_specific_parameters * []	file:
udiv_25	arch/sh/lib/udivsi3_i4i.S	/^udiv_25:$/;"	l
udiv_ge64k	arch/sh/lib/udivsi3_i4i.S	/^udiv_ge64k:$/;"	l
udiv_le128	arch/sh/lib/udivsi3_i4i.S	/^udiv_le128:$/;"	l
udiv_qrnnd	arch/nios2/lib/longlong.h	/^#define udiv_qrnnd /;"	d
udiv_qrnnd	arch/nios2/lib/longlong.h	/^#define udiv_qrnnd(/;"	d
udiv_r8	arch/sh/lib/udivsi3_i4i.S	/^udiv_r8:$/;"	l
udivmodsi4	arch/arc/lib/libgcc2.c	/^udivmodsi4(unsigned long num, unsigned long den, int modwanted)$/;"	f	typeref:typename:unsigned long
udivmodsi4	arch/nios2/lib/libgcc.c	/^udivmodsi4(USItype num, USItype den, word_type modwanted)$/;"	f	typeref:typename:USItype	file:
udivsi3-$(CONFIG_CPU_SH3)	arch/sh/lib/Makefile	/^udivsi3-$(CONFIG_CPU_SH3)	:= udivsi3_i4i.o$/;"	m
udivsi3-$(CONFIG_CPU_SH4)	arch/sh/lib/Makefile	/^udivsi3-$(CONFIG_CPU_SH4)	:= udivsi3_i4i.o$/;"	m
udivsi3-y	arch/sh/lib/Makefile	/^udivsi3-y			:= udivsi3_i4i-Os.o$/;"	m
udivslot	drivers/serial/serial_s5p.c	/^static const int udivslot[] = {$/;"	v	typeref:typename:const int[]	file:
udma	drivers/block/fsl_sata.h	/^	u16		udma;$/;"	m	struct:fsl_sata	typeref:typename:u16
udma	drivers/block/sata_mv.c	/^	u16 udma;$/;"	m	struct:mv_priv	typeref:typename:u16	file:
udma	drivers/block/sata_sil.h	/^	u16		udma;$/;"	m	struct:sil_sata	typeref:typename:u16
udma_fsclk	drivers/block/pata_bfin.c	/^static const u32 udma_fsclk[] =$/;"	v	typeref:typename:const u32[]	file:
udma_mask	drivers/block/sata_dwc.h	/^	unsigned int		udma_mask;$/;"	m	struct:ata_port	typeref:typename:unsigned int
udma_mask	drivers/block/sata_dwc.h	/^	unsigned long			udma_mask;$/;"	m	struct:ata_port_info	typeref:typename:unsigned long
udma_mask	drivers/block/sata_dwc.h	/^	unsigned long		udma_mask;$/;"	m	struct:ata_device	typeref:typename:unsigned long
udma_mask	include/ahci.h	/^	u32	udma_mask;$/;"	m	struct:ahci_probe_ent	typeref:typename:u32
udma_tackmin	drivers/block/pata_bfin.c	/^static const u32 udma_tackmin = 20;$/;"	v	typeref:typename:const u32	file:
udma_tcycmin	drivers/block/pata_bfin.c	/^static const u32 udma_tcycmin[]  = { 112, 73,  54,  39,  25,  17 };$/;"	v	typeref:typename:const u32[]	file:
udma_tdvsmin	drivers/block/pata_bfin.c	/^static const u32 udma_tdvsmin[]  = { 70,  48,  31,  20,  7,   5  };$/;"	v	typeref:typename:const u32[]	file:
udma_tenvmax	drivers/block/pata_bfin.c	/^static const u32 udma_tenvmax[]  = { 70,  70,  70,  55,  55,  50 };$/;"	v	typeref:typename:const u32[]	file:
udma_tenvmin	drivers/block/pata_bfin.c	/^static const u32 udma_tenvmin = 20;$/;"	v	typeref:typename:const u32	file:
udma_tmin	drivers/block/pata_bfin.c	/^static const u32 udma_tmin[]     = { 5,   5,   5,   5,   3,   3  };$/;"	v	typeref:typename:const u32[]	file:
udma_tmlimin	drivers/block/pata_bfin.c	/^static const u32 udma_tmlimin = 20;$/;"	v	typeref:typename:const u32	file:
udma_trpmin	drivers/block/pata_bfin.c	/^static const u32 udma_trpmin[]   = { 160, 125, 100, 100, 100, 85 };$/;"	v	typeref:typename:const u32[]	file:
udma_tssmin	drivers/block/pata_bfin.c	/^static const u32 udma_tssmin = 50;$/;"	v	typeref:typename:const u32	file:
udma_tzahmin	drivers/block/pata_bfin.c	/^static const u32 udma_tzahmin = 20;$/;"	v	typeref:typename:const u32	file:
udp_baseaddr	drivers/usb/gadget/at91_udc.h	/^	void __iomem			*udp_baseaddr;$/;"	m	struct:at91_udc	typeref:typename:void __iomem *
udp_dst	include/net.h	/^	u16		udp_dst;	\/* UDP destination port		*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
udp_irq	drivers/usb/gadget/at91_udc.h	/^	int				udp_irq;$/;"	m	struct:at91_udc	typeref:typename:int
udp_len	include/net.h	/^	u16		udp_len;	\/* Length of UDP packet		*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
udp_packet_handler	net/net.c	/^static rxhand_f *udp_packet_handler;$/;"	v	typeref:typename:rxhand_f *	file:
udp_src	include/net.h	/^	u16		udp_src;	\/* UDP source port		*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
udp_xsum	include/net.h	/^	u16		udp_xsum;	\/* Checksum			*\/$/;"	m	struct:ip_udp_hdr	typeref:typename:u16
udpck	arch/arm/dts/at91sam9260.dtsi	/^					udpck: udpck {$/;"	l	label:pmc
udpck	arch/arm/dts/at91sam9261.dtsi	/^					udpck: udpck {$/;"	l	label:pmc
udpck	arch/arm/dts/at91sam9263.dtsi	/^					udpck: udpck {$/;"	l	label:pmc
udpck	arch/arm/dts/sama5d2.dtsi	/^					udpck: udpck@7 {$/;"	l	label:pmc
udphs_clk	arch/arm/dts/at91sam9g45.dtsi	/^					udphs_clk: udphs_clk {$/;"	l
udphs_clk	arch/arm/dts/sama5d2.dtsi	/^					udphs_clk: udphs_clk@42 {$/;"	l
udsr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 udsr;		\/* DMA status register *\/$/;"	m	struct:duart83xx	typeref:typename:u8
udsr	include/linux/immap_qe.h	/^	u16 udsr;		\/* UCCx data synchronization register  *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
udsr	include/linux/immap_qe.h	/^	u16 udsr;		\/* UCCx data synchronization register *\/$/;"	m	struct:ucc_slow	typeref:typename:u16
udsr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	udsr1;		\/* UART1 DMA Status *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
udsr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	udsr1;		\/* 0x4510 - UART1 DMA Status Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
udsr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	udsr2;		\/* UART2 DMA Status *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
udsr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	udsr2;		\/* 0x4610 - UART2 DMA Status Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
uec_82xx_address_filtering_pram	drivers/qe/uec.h	/^typedef struct uec_82xx_address_filtering_pram {$/;"	s
uec_82xx_address_filtering_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_82xx_address_filtering_pram_t;$/;"	t	typeref:struct:uec_82xx_address_filtering_pram
uec_82xx_enet_address	drivers/qe/uec.h	/^typedef struct uec_82xx_enet_address {$/;"	s
uec_82xx_enet_address_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_82xx_enet_address_t;$/;"	t	typeref:struct:uec_82xx_enet_address
uec_convert_threads_num	drivers/qe/uec.c	/^static int uec_convert_threads_num(uec_num_of_threads_e threads_num,$/;"	f	typeref:typename:int	file:
uec_eth_init	drivers/qe/uec.c	/^int uec_eth_init(bd_t *bis, uec_info_t *uecs, int num)$/;"	f	typeref:typename:int
uec_get_phy_info	drivers/qe/uec_phy.c	/^struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info)$/;"	f	typeref:struct:phy_info *
uec_graceful_stop_rx	drivers/qe/uec.c	/^static int uec_graceful_stop_rx(uec_private_t *uec)$/;"	f	typeref:typename:int	file:
uec_graceful_stop_tx	drivers/qe/uec.c	/^static int uec_graceful_stop_tx(uec_private_t *uec)$/;"	f	typeref:typename:int	file:
uec_halt	drivers/qe/uec.c	/^static void uec_halt(struct eth_device* dev)$/;"	f	typeref:typename:void	file:
uec_hardware_statistics	drivers/qe/uec.h	/^typedef struct uec_hardware_statistics {$/;"	s
uec_hardware_statistics_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_hardware_statistics_t;$/;"	t	typeref:struct:uec_hardware_statistics
uec_info	drivers/qe/uec.c	/^static uec_info_t uec_info[] = {$/;"	v	typeref:typename:uec_info_t[]	file:
uec_info	drivers/qe/uec.h	/^	uec_info_t			*uec_info;$/;"	m	struct:uec_private	typeref:typename:uec_info_t *
uec_info	drivers/qe/uec.h	/^typedef struct uec_info {$/;"	s
uec_info_t	drivers/qe/uec.h	/^} uec_info_t;$/;"	t	typeref:struct:uec_info
uec_init	drivers/qe/uec.c	/^static int uec_init(struct eth_device* dev, bd_t *bd)$/;"	f	typeref:typename:int	file:
uec_init_cmd_pram	drivers/qe/uec.h	/^typedef struct uec_init_cmd_pram {$/;"	s
uec_init_cmd_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_init_cmd_pram_t;$/;"	t	typeref:struct:uec_init_cmd_pram
uec_init_rx_parameter	drivers/qe/uec.c	/^static void uec_init_rx_parameter(uec_private_t *uec, int num_threads_rx)$/;"	f	typeref:typename:void	file:
uec_init_tx_parameter	drivers/qe/uec.c	/^static void uec_init_tx_parameter(uec_private_t *uec, int num_threads_tx)$/;"	f	typeref:typename:void	file:
uec_initialize	drivers/qe/uec.c	/^int uec_initialize(bd_t *bis, uec_info_t *uec_info)$/;"	f	typeref:typename:int
uec_issue_init_enet_rxtx_cmd	drivers/qe/uec.c	/^static int uec_issue_init_enet_rxtx_cmd(uec_private_t *uec,$/;"	f	typeref:typename:int	file:
uec_mac_disable	drivers/qe/uec.c	/^static int uec_mac_disable(uec_private_t *uec, comm_dir_e mode)$/;"	f	typeref:typename:int	file:
uec_mac_enable	drivers/qe/uec.c	/^static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode)$/;"	f	typeref:typename:int	file:
uec_marvell_init	drivers/qe/uec_phy.c	/^static int uec_marvell_init(struct uec_mii_info *mii_info)$/;"	f	typeref:typename:int	file:
uec_mii_info	drivers/qe/uec_phy.h	/^struct uec_mii_info {$/;"	s
uec_mii_regs	drivers/qe/uec.h	/^	uec_mii_t			*uec_mii_regs;$/;"	m	struct:uec_private	typeref:typename:uec_mii_t *
uec_mii_t	include/linux/immap_qe.h	/^} __attribute__ ((packed))uec_mii_t;$/;"	t	typeref:struct:ucc_mii_mng
uec_miiphy_find_dev_by_name	drivers/qe/uec.c	/^static int uec_miiphy_find_dev_by_name(const char *devname)$/;"	f	typeref:typename:int	file:
uec_miiphy_read	drivers/qe/uec.c	/^static int uec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)$/;"	f	typeref:typename:int	file:
uec_miiphy_write	drivers/qe/uec.c	/^static int uec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,$/;"	f	typeref:typename:int	file:
uec_num_of_threads	drivers/qe/uec.h	/^typedef enum uec_num_of_threads {$/;"	g
uec_num_of_threads_e	drivers/qe/uec.h	/^} uec_num_of_threads_e;$/;"	t	typeref:enum:uec_num_of_threads
uec_open	drivers/qe/uec.c	/^static int uec_open(uec_private_t *uec, comm_dir_e mode)$/;"	f	typeref:typename:int	file:
uec_phy_read	drivers/qe/uec_phy.c	/^u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum)$/;"	f	typeref:typename:u16
uec_phy_write	drivers/qe/uec_phy.c	/^void uec_phy_write(struct uec_mii_info *mii_info, u16 regnum, u16 val)$/;"	f	typeref:typename:void
uec_private	drivers/qe/uec.h	/^typedef struct uec_private {$/;"	s
uec_private_t	drivers/qe/uec.h	/^} uec_private_t;$/;"	t	typeref:struct:uec_private
uec_read_phy_reg	drivers/qe/uec_phy.c	/^int uec_read_phy_reg (struct eth_device *dev, int mii_id, int regnum)$/;"	f	typeref:typename:int
uec_recv	drivers/qe/uec.c	/^static int uec_recv(struct eth_device* dev)$/;"	f	typeref:typename:int	file:
uec_regs	drivers/qe/uec.h	/^	uec_t				*uec_regs;$/;"	m	struct:uec_private	typeref:typename:uec_t *
uec_restart_rx	drivers/qe/uec.c	/^static int uec_restart_rx(uec_private_t *uec)$/;"	f	typeref:typename:int	file:
uec_restart_tx	drivers/qe/uec.c	/^static int uec_restart_tx(uec_private_t *uec)$/;"	f	typeref:typename:int	file:
uec_rx_bd_queues_entry	drivers/qe/uec.h	/^typedef struct uec_rx_bd_queues_entry {$/;"	s
uec_rx_bd_queues_entry_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_rx_bd_queues_entry_t;$/;"	t	typeref:struct:uec_rx_bd_queues_entry
uec_rx_firmware_statistics_pram	drivers/qe/uec.h	/^typedef struct uec_rx_firmware_statistics_pram {$/;"	s
uec_rx_firmware_statistics_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_rx_firmware_statistics_pram_t;$/;"	t	typeref:struct:uec_rx_firmware_statistics_pram
uec_rx_global_pram	drivers/qe/uec.h	/^typedef struct uec_rx_global_pram {$/;"	s
uec_rx_global_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_rx_global_pram_t;$/;"	t	typeref:struct:uec_rx_global_pram
uec_rx_interrupt_coalescing_entry	drivers/qe/uec.h	/^typedef struct uec_rx_interrupt_coalescing_entry {$/;"	s
uec_rx_interrupt_coalescing_entry_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_rx_interrupt_coalescing_entry_t;$/;"	t	typeref:struct:uec_rx_interrupt_coalescing_entry
uec_rx_interrupt_coalescing_table	drivers/qe/uec.h	/^typedef struct uec_rx_interrupt_coalescing_table {$/;"	s
uec_rx_interrupt_coalescing_table_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_rx_interrupt_coalescing_table_t;$/;"	t	typeref:struct:uec_rx_interrupt_coalescing_table
uec_rx_prefetched_bds	drivers/qe/uec.h	/^typedef struct uec_rx_prefetched_bds {$/;"	s
uec_rx_prefetched_bds_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_rx_prefetched_bds_t;$/;"	t	typeref:struct:uec_rx_prefetched_bds
uec_scheduler	drivers/qe/uec.h	/^typedef struct uec_scheduler {$/;"	s
uec_scheduler_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_scheduler_t;$/;"	t	typeref:struct:uec_scheduler
uec_send	drivers/qe/uec.c	/^static int uec_send(struct eth_device *dev, void *buf, int len)$/;"	f	typeref:typename:int	file:
uec_send_queue_mem_region	drivers/qe/uec.h	/^typedef struct uec_send_queue_mem_region {$/;"	s
uec_send_queue_mem_region_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_send_queue_mem_region_t;$/;"	t	typeref:struct:uec_send_queue_mem_region
uec_send_queue_qd	drivers/qe/uec.h	/^typedef struct uec_send_queue_qd {$/;"	s
uec_send_queue_qd_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_send_queue_qd_t;$/;"	t	typeref:struct:uec_send_queue_qd
uec_set_mac_address	drivers/qe/uec.c	/^static int uec_set_mac_address(uec_private_t *uec, u8 *mac_addr)$/;"	f	typeref:typename:int	file:
uec_set_mac_duplex	drivers/qe/uec.c	/^static int uec_set_mac_duplex(uec_private_t *uec, int duplex)$/;"	f	typeref:typename:int	file:
uec_set_mac_if_mode	drivers/qe/uec.c	/^static int uec_set_mac_if_mode(uec_private_t *uec,$/;"	f	typeref:typename:int	file:
uec_standard_init	drivers/qe/uec.c	/^int uec_standard_init(bd_t *bis)$/;"	f	typeref:typename:int
uec_startup	drivers/qe/uec.c	/^static int uec_startup(uec_private_t *uec)$/;"	f	typeref:typename:int	file:
uec_stop	drivers/qe/uec.c	/^static int uec_stop(uec_private_t *uec, comm_dir_e mode)$/;"	f	typeref:typename:int	file:
uec_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) uec_t;$/;"	t	typeref:struct:ucc_ethernet
uec_thread_data_rx	drivers/qe/uec.h	/^typedef struct uec_thread_data_rx {$/;"	s
uec_thread_data_rx_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_thread_data_rx_t;$/;"	t	typeref:struct:uec_thread_data_rx
uec_thread_data_tx	drivers/qe/uec.h	/^typedef struct uec_thread_data_tx {$/;"	s
uec_thread_data_tx_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_thread_data_tx_t;$/;"	t	typeref:struct:uec_thread_data_tx
uec_thread_rx_pram	drivers/qe/uec.h	/^typedef struct uec_thread_rx_pram {$/;"	s
uec_thread_rx_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_thread_rx_pram_t;$/;"	t	typeref:struct:uec_thread_rx_pram
uec_thread_tx_pram	drivers/qe/uec.h	/^typedef struct uec_thread_tx_pram {$/;"	s
uec_thread_tx_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_thread_tx_pram_t;$/;"	t	typeref:struct:uec_thread_tx_pram
uec_tx_firmware_statistics_pram	drivers/qe/uec.h	/^typedef struct uec_tx_firmware_statistics_pram {$/;"	s
uec_tx_firmware_statistics_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_tx_firmware_statistics_pram_t;$/;"	t	typeref:struct:uec_tx_firmware_statistics_pram
uec_tx_global_pram	drivers/qe/uec.h	/^typedef struct uec_tx_global_pram {$/;"	s
uec_tx_global_pram_t	drivers/qe/uec.h	/^} __attribute__ ((packed)) uec_tx_global_pram_t;$/;"	t	typeref:struct:uec_tx_global_pram
uec_write_phy_reg	drivers/qe/uec_phy.c	/^void uec_write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value)$/;"	f	typeref:typename:void
ued	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 ued;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ued	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 ued;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ued	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 ued;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uempr	include/linux/immap_qe.h	/^	u32 uempr;		\/* UCC Ethernet Mac parameter reg      *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
uerstat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	uerstat;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
uerstat	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	uerstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
uerstat	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	uerstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
uescr	include/linux/immap_qe.h	/^	u16 uescr;		\/* UCC Ethernet statistics control reg *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u16
ueth	drivers/usb/eth/asix.c	/^	struct ueth_data ueth;$/;"	m	struct:asix_private	typeref:struct:ueth_data	file:
ueth	drivers/usb/eth/asix88179.c	/^	struct ueth_data ueth;$/;"	m	struct:asix_private	typeref:struct:ueth_data	file:
ueth	drivers/usb/eth/mcs7830.c	/^	struct ueth_data ueth;$/;"	m	struct:mcs7830_private	typeref:struct:ueth_data	file:
ueth	drivers/usb/eth/r8152.h	/^	struct ueth_data ueth;$/;"	m	struct:r8152	typeref:struct:ueth_data
ueth	drivers/usb/eth/smsc95xx.c	/^	struct ueth_data ueth;$/;"	m	struct:smsc95xx_private	typeref:struct:ueth_data	file:
ueth_data	include/usb_ether.h	/^struct ueth_data {$/;"	s
uf	post/lib_powerpc/fpu/mul-subnormal-single-1.c	/^union uf$/;"	u	file:
uf_info	drivers/qe/uccf.h	/^	ucc_fast_info_t	*uf_info;$/;"	m	struct:ucc_fast_private	typeref:typename:ucc_fast_info_t *
uf_info	drivers/qe/uec.h	/^	ucc_fast_info_t			uf_info;$/;"	m	struct:uec_info	typeref:typename:ucc_fast_info_t
uf_regs	drivers/qe/uccf.h	/^	ucc_fast_t	*uf_regs; \/* a pointer to memory map of UCC regs *\/$/;"	m	struct:ucc_fast_private	typeref:typename:ucc_fast_t *
ufcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	ufcon;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
ufcon	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	ufcon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ufcon	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	ufcon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
uflow_status	arch/arm/include/asm/arch-tegra/dc.h	/^	uint uflow_status;		\/* _WINBUF_UFLOW_STATUS_0 *\/$/;"	m	struct:dc_winbuf_reg	typeref:typename:uint
ufmc_config	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	ufmc_config;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
ufnrh	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ufnrh;  \/* 0x060 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ufnrl	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	ufnrl;  \/* 0x064 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
ufstat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	ufstat;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
ufstat	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	ufstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ufstat	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	ufstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ugphy_dbg	drivers/qe/uec_phy.c	/^#define ugphy_dbg(/;"	d	file:
ugphy_err	drivers/qe/uec_phy.c	/^#define ugphy_err(/;"	d	file:
ugphy_info	drivers/qe/uec_phy.c	/^#define ugphy_info(/;"	d	file:
ugphy_printk	drivers/qe/uec_phy.c	/^#define ugphy_printk(/;"	d	file:
ugphy_vdbg	drivers/qe/uec_phy.c	/^#define ugphy_vdbg /;"	d	file:
ugphy_vdbg	drivers/qe/uec_phy.c	/^#define ugphy_vdbg(/;"	d	file:
ugphy_warn	drivers/qe/uec_phy.c	/^#define ugphy_warn(/;"	d	file:
uh1_phy_ctrl_0	drivers/usb/host/ehci-mx6.c	/^	u32	uh1_phy_ctrl_0;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
uh2_hsic_ctrl	drivers/usb/host/ehci-mx6.c	/^	u32	uh2_hsic_ctrl;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
uh3_hsic_ctrl	drivers/usb/host/ehci-mx6.c	/^	u32	uh3_hsic_ctrl;$/;"	m	struct:usbnc_regs	typeref:typename:u32	file:
uhci_alloc_int_td	arch/sparc/cpu/leon3/usb_uhci.c	/^uhci_td_t *uhci_alloc_int_td(void)$/;"	f	typeref:typename:uhci_td_t *
uhci_alloc_int_td	board/mpl/common/usb_uhci.c	/^uhci_td_t *uhci_alloc_int_td(void)$/;"	f	typeref:typename:uhci_td_t *
uhci_qh_t	arch/sparc/cpu/leon3/usb_uhci.h	/^} uhci_qh_t, *puhci_qh_t;$/;"	t	typeref:struct:__anon66fd0d690208
uhci_qh_t	board/mpl/common/usb_uhci.h	/^} uhci_qh_t, *puhci_qh_t;$/;"	t	typeref:struct:__anon0a2b4c740208
uhci_submit_rh_msg	arch/sparc/cpu/leon3/usb_uhci.c	/^int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,$/;"	f	typeref:typename:int
uhci_submit_rh_msg	board/mpl/common/usb_uhci.c	/^int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len/;"	f	typeref:typename:int
uhci_td_t	arch/sparc/cpu/leon3/usb_uhci.h	/^} uhci_td_t, *puhci_td_t;$/;"	t	typeref:struct:__anon66fd0d690108
uhci_td_t	board/mpl/common/usb_uhci.h	/^} uhci_td_t, *puhci_td_t;$/;"	t	typeref:struct:__anon0a2b4c740108
uhcsr	arch/m68k/include/asm/immap_5301x.h	/^	u16 uhcsr;		\/* 0x10 USB Host status *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
uhcsr	arch/m68k/include/asm/immap_5329.h	/^	u16 uhcsr;		\/* 0x10 USB Host controller status register *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
uhcsr	arch/m68k/include/asm/immap_5441x.h	/^	u16 uhcsr;		\/* 0x16 *\/$/;"	m	struct:ccm	typeref:typename:u16
uhh	drivers/usb/host/ehci-omap.c	/^static struct omap_uhh *const uhh = (struct omap_uhh *)OMAP_UHH_BASE;$/;"	v	typeref:struct:omap_uhh * const	file:
uhpck	arch/arm/dts/at91sam9260.dtsi	/^					uhpck: uhpck {$/;"	l	label:pmc
uhpck	arch/arm/dts/at91sam9261.dtsi	/^					uhpck: uhpck {$/;"	l	label:pmc
uhpck	arch/arm/dts/at91sam9263.dtsi	/^					uhpck: uhpck {$/;"	l	label:pmc
uhpck	arch/arm/dts/at91sam9g45.dtsi	/^					uhpck: uhpck {$/;"	l	label:pmc
uhpck	arch/arm/dts/sama5d2.dtsi	/^					uhpck: uhpck@6 {$/;"	l	label:pmc
uhphs_clk	arch/arm/dts/at91sam9g45.dtsi	/^					uhphs_clk: uhphs_clk {$/;"	l
uhphs_clk	arch/arm/dts/sama5d2.dtsi	/^					uhphs_clk: uhphs_clk@41 {$/;"	l
ui	lib/display_options.c	/^		uint32_t ui[MAX_LINE_LENGTH_BYTES\/sizeof(uint32_t) + 1];$/;"	m	union:print_buffer::linebuf	typeref:typename:uint32_t[]	file:
ui_lock	fs/ubifs/ubifs.h	/^	spinlock_t ui_lock;$/;"	m	struct:ubifs_inode	typeref:typename:spinlock_t
ui_mutex	fs/ubifs/ubifs.h	/^	struct mutex ui_mutex;$/;"	m	struct:ubifs_inode	typeref:struct:mutex
ui_page_mask	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^	u32 ui_page_mask;$/;"	m	struct:page_element	typeref:typename:u32
ui_size	fs/ubifs/ubifs.h	/^	loff_t ui_size;$/;"	m	struct:ubifs_inode	typeref:typename:loff_t
ui_xor_regs_base_backup	drivers/ddr/marvell/a38x/xor.c	/^static u32 ui_xor_regs_base_backup[MAX_CS];$/;"	v	typeref:typename:u32[]	file:
ui_xor_regs_ctrl_backup	drivers/ddr/marvell/a38x/xor.c	/^static u32 ui_xor_regs_ctrl_backup;$/;"	v	typeref:typename:u32	file:
ui_xor_regs_mask_backup	drivers/ddr/marvell/a38x/xor.c	/^static u32 ui_xor_regs_mask_backup[MAX_CS];$/;"	v	typeref:typename:u32[]	file:
uic_interrupt	arch/powerpc/cpu/ppc4xx/uic.c	/^static void uic_interrupt(u32 uic_base, int vec_base)$/;"	f	typeref:typename:void	file:
uicr0	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uicr0; \/* 0x050 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uicr1	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	uicr1; \/* 0x054 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
uid	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 uid[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
uid	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 uid[8];$/;"	m	struct:fuse_bank2_regs	typeref:typename:u32[8]
uid	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 uid[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
uid	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	uid[8];$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32[8]
uid	board/varisys/common/sys_eeprom.c	/^static unsigned char uid[16];$/;"	v	typeref:typename:unsigned char[16]	file:
uid	drivers/tpm/tpm_tis_sandbox.c	/^	uint32_t uid;$/;"	m	struct:rollback_space_kernel	typeref:typename:uint32_t	file:
uid	fs/ubifs/ubifs-media.h	/^	__le32 uid;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
uid	include/cramfs/cramfs_fs.h	/^	u32 mode:CRAMFS_MODE_WIDTH, uid:CRAMFS_UID_WIDTH;$/;"	m	struct:cramfs_inode	typeref:typename:u32
uid	include/ext_common.h	/^	__le16 uid;$/;"	m	struct:ext2_inode	typeref:typename:__le16
uid	include/jffs2/jffs2.h	/^	__u16 uid;        \/* The file's owner.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u16
uid	include/phy.h	/^	unsigned int uid;$/;"	m	struct:phy_driver	typeref:typename:unsigned int
uid0	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 uid0;$/;"	m	struct:stm32_des_regs	typeref:typename:u32
uid1	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 uid1;$/;"	m	struct:stm32_des_regs	typeref:typename:u32
uid16_t	include/linux/types.h	/^typedef __kernel_uid16_t        uid16_t;$/;"	t	typeref:typename:__kernel_uid16_t
uid2	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 uid2;$/;"	m	struct:stm32_des_regs	typeref:typename:u32
uid_flag	include/fsl_validate.h	/^	u32 uid_flag;$/;"	m	struct:fsl_secboot_img_hdr	typeref:typename:u32
uid_high	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	uid_high;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
uid_high	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 uid_high;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
uid_low	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	uid_low;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
uid_low	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 uid_low;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
uid_reserved	include/ext_common.h	/^	__le16 uid_reserved;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
uid_t	include/linux/types.h	/^typedef __kernel_uid32_t	uid_t;$/;"	t	typeref:typename:__kernel_uid32_t
uid_t	include/linux/types.h	/^typedef __kernel_uid_t		uid_t;$/;"	t	typeref:typename:__kernel_uid_t
uier1_udmb1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	uier1_udmb1;$/;"	m	struct:ccsr_duart	typeref:typename:u8
uier1_udmb1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	uier1_udmb1;	\/* 0x4501 - UIER1, UDMB1 with the same address offset of 0x04501 *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
uier2_udmb2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	uier2_udmb2;$/;"	m	struct:ccsr_duart	typeref:typename:u8
uier2_udmb2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	uier2_udmb2;	\/* 0x4601 - UIER2, UDMB2 with the same address offset of 0x04601 *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
uier_udmb	arch/powerpc/include/asm/immap_83xx.h	/^	u8 uier_udmb;		\/* combined register for UIER and UDMB *\/$/;"	m	struct:duart83xx	typeref:typename:u8
uif_close	drivers/mtd/ubi/build.c	/^static void uif_close(struct ubi_device *ubi)$/;"	f	typeref:typename:void	file:
uif_init	drivers/mtd/ubi/build.c	/^static int uif_init(struct ubi_device *ubi, int *ref)$/;"	f	typeref:typename:int	file:
uiir1_ufcr1_uafr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	uiir1_ufcr1_uafr1;$/;"	m	struct:ccsr_duart	typeref:typename:u8
uiir1_ufcr1_uafr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	uiir1_ufcr1_uafr1;\/* 0x4502 - UIIR1, UFCR1, UAFR1 with the same address offset of 0x045/;"	m	struct:ccsr_duart	typeref:typename:u_char
uiir2_ufcr2_uafr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	uiir2_ufcr2_uafr2;$/;"	m	struct:ccsr_duart	typeref:typename:u8
uiir2_ufcr2_uafr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	uiir2_ufcr2_uafr2;\/* 0x4602 - UIIR2, UFCR2, UAFR2 with the same address offset of 0x046/;"	m	struct:ccsr_duart	typeref:typename:u_char
uiir_ufcr_uafr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 uiir_ufcr_uafr;	\/* combined register for UIIR, UFCR and UAFR *\/$/;"	m	struct:duart83xx	typeref:typename:u8
uimage_arch	common/image.c	/^static const table_entry_t uimage_arch[] = {$/;"	v	typeref:typename:const table_entry_t[]	file:
uimage_comp	common/image.c	/^static const table_entry_t uimage_comp[] = {$/;"	v	typeref:typename:const table_entry_t[]	file:
uimage_os	common/image.c	/^static const table_entry_t uimage_os[] = {$/;"	v	typeref:typename:const table_entry_t[]	file:
uimage_to_cpu	include/image.h	/^#define uimage_to_cpu(/;"	d
uimage_type	common/image.c	/^static const table_entry_t uimage_type[] = {$/;"	v	typeref:typename:const table_entry_t[]	file:
uimb	arch/powerpc/include/asm/5xx_immap.h	/^typedef struct uimb {$/;"	s
uimb5xx_t	arch/powerpc/include/asm/5xx_immap.h	/^} uimb5xx_t;$/;"	t	typeref:struct:uimb
uimb_uipend	arch/powerpc/include/asm/5xx_immap.h	/^	uint uimb_uipend;$/;"	m	struct:uimb	typeref:typename:uint
uimb_umcr	arch/powerpc/include/asm/5xx_immap.h	/^	uint uimb_umcr;$/;"	m	struct:uimb	typeref:typename:uint
uimb_utstcreg	arch/powerpc/include/asm/5xx_immap.h	/^	uint uimb_utstcreg;$/;"	m	struct:uimb	typeref:typename:uint
uimr	arch/m68k/include/asm/uart.h	/^		u8 uimr;	\/* 0x14 Interrupt Mask reg *\/$/;"	m	union:uart::__anona45981bc040a	typeref:typename:u8
uint	include/compiler.h	/^typedef unsigned int uint;$/;"	t	typeref:typename:unsigned int
uint	include/linux/types.h	/^typedef unsigned int		uint;$/;"	t	typeref:typename:unsigned int
uint	tools/mingw_support.h	/^typedef	UINT	uint;$/;"	t	typeref:typename:UINT
uint16	drivers/net/mpc5xxx_fec.h	/^typedef unsigned short uint16;$/;"	t	typeref:typename:unsigned short
uint16_t	include/linux/types.h	/^typedef		__u16		uint16_t;$/;"	t	typeref:typename:__u16
uint32	drivers/net/mpc5xxx_fec.h	/^typedef unsigned long uint32;$/;"	t	typeref:typename:unsigned long
uint32_t	include/linux/types.h	/^typedef		__u32		uint32_t;$/;"	t	typeref:typename:__u32
uint64_t	include/linux/types.h	/^typedef		__UINT64_TYPE__	uint64_t;$/;"	t	typeref:typename:__UINT64_TYPE__
uint64_t	include/linux/types.h	/^typedef		__u64		uint64_t;$/;"	t	typeref:typename:__u64
uint8	drivers/net/mpc5xxx_fec.h	/^typedef unsigned char uint8;$/;"	t	typeref:typename:unsigned char
uint8_t	include/linux/types.h	/^typedef		__u8		uint8_t;$/;"	t	typeref:typename:__u8
uintptr_t	include/compiler.h	/^typedef unsigned long int uintptr_t;$/;"	t	typeref:typename:unsigned long int
uip	arch/m68k/include/asm/uart.h	/^	u8 uip;			\/* 0x34 Input Port Register *\/$/;"	m	struct:uart	typeref:typename:u8
uipcr	arch/m68k/include/asm/uart.h	/^		u8 uipcr;	\/* 0x10 Input Port Change Register *\/$/;"	m	union:uart::__anona45981bc030a	typeref:typename:u8
uir	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uir;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uir	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uir;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uir	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uir;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uisr	arch/m68k/include/asm/uart.h	/^		u8 uisr;	\/* 0x14 Interrupt Status reg *\/$/;"	m	union:uart::__anona45981bc040a	typeref:typename:u8
ulcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	ulcon;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
ulcon	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	ulcon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ulcon	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	ulcon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
ulcr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 ulcr;		\/* line control register *\/$/;"	m	struct:duart83xx	typeref:typename:u8
ulcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	ulcr1;		\/* UART1 Line Control *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
ulcr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	ulcr1;		\/* 0x4503 - UART1 Line Control Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
ulcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	ulcr2;		\/* UART2 Line Control *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
ulcr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	ulcr2;		\/* 0x4603 - UART2 Line Control Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
ulg	lib/zlib/zutil.h	/^typedef unsigned long  ulg;$/;"	t	typeref:typename:unsigned long
uli526x_CR6_bits	drivers/net/uli526x.c	/^enum uli526x_CR6_bits {$/;"	g	file:
uli526x_board_info	drivers/net/uli526x.c	/^struct uli526x_board_info {$/;"	s	file:
uli526x_descriptor_init	drivers/net/uli526x.c	/^static void uli526x_descriptor_init(struct uli526x_board_info *db,$/;"	f	typeref:typename:void	file:
uli526x_disable	drivers/net/uli526x.c	/^static void uli526x_disable(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
uli526x_free_tx_pkt	drivers/net/uli526x.c	/^static void uli526x_free_tx_pkt(struct eth_device *dev,$/;"	f	typeref:typename:void	file:
uli526x_init	drivers/net/uli526x.c	/^static void uli526x_init(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
uli526x_init_one	drivers/net/uli526x.c	/^static int uli526x_init_one(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:int	file:
uli526x_initialize	drivers/net/uli526x.c	/^int uli526x_initialize(bd_t *bis)$/;"	f	typeref:typename:int
uli526x_media_mode	drivers/net/uli526x.c	/^static unsigned char uli526x_media_mode = ULI526X_AUTO;$/;"	v	typeref:typename:unsigned char	file:
uli526x_offsets	drivers/net/uli526x.c	/^enum uli526x_offsets {$/;"	g	file:
uli526x_pci_tbl	drivers/net/uli526x.c	/^static struct pci_device_id uli526x_pci_tbl[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
uli526x_reuse_buf	drivers/net/uli526x.c	/^static void uli526x_reuse_buf(struct rx_desc *rxptr)$/;"	f	typeref:typename:void	file:
uli526x_rx_packet	drivers/net/uli526x.c	/^static int uli526x_rx_packet(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
uli526x_set_phyxcer	drivers/net/uli526x.c	/^static void uli526x_set_phyxcer(struct uli526x_board_info *db)$/;"	f	typeref:typename:void	file:
uli526x_start_xmit	drivers/net/uli526x.c	/^static int uli526x_start_xmit(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
uli_phy_read	drivers/net/uli526x.c	/^static u16 uli_phy_read(unsigned long iobase, u8 phy_addr, u8 offset,$/;"	f	typeref:typename:u16	file:
uli_phy_write	drivers/net/uli526x.c	/^static void uli_phy_write(unsigned long iobase, u8 phy_addr, u8 offset,$/;"	f	typeref:typename:void	file:
ulong	include/compiler.h	/^typedef unsigned long ulong;$/;"	t	typeref:typename:unsigned long
ulong	include/linux/types.h	/^typedef unsigned long		ulong;$/;"	t	typeref:typename:unsigned long
ulong	tools/mingw_support.h	/^typedef	ULONG	ulong;$/;"	t	typeref:typename:ULONG
ulpi	arch/powerpc/include/asm/immap_512x.h	/^	ulpi512x_t		ulpi;		\/* USB ULPI *\/$/;"	m	struct:immap	typeref:typename:ulpi512x_t
ulpi	drivers/usb/host/ehci-tegra.c	/^	unsigned ulpi:1;	\/* 1 if port has external ULPI transceiver *\/$/;"	m	struct:fdt_usb	typeref:typename:unsigned:1	file:
ulpi	drivers/usb/ulpi/ulpi.c	/^static struct ulpi_regs *ulpi = (struct ulpi_regs *)0;$/;"	v	typeref:struct:ulpi_regs *	file:
ulpi512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct ulpi512x {$/;"	s
ulpi512x_t	arch/powerpc/include/asm/immap_512x.h	/^} ulpi512x_t;$/;"	t	typeref:struct:ulpi512x
ulpi_busctl	drivers/usb/musb/musb_core.h	/^	u8	ulpi_busctl;$/;"	m	struct:musb_regs	typeref:typename:u8
ulpi_init	drivers/usb/ulpi/ulpi.c	/^int ulpi_init(struct ulpi_viewport *ulpi_vp)$/;"	f	typeref:typename:int
ulpi_integrity_check	drivers/usb/ulpi/ulpi.c	/^static int ulpi_integrity_check(struct ulpi_viewport *ulpi_vp)$/;"	f	typeref:typename:int	file:
ulpi_opmode_sel	drivers/usb/ulpi/ulpi.c	/^int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode)$/;"	f	typeref:typename:int
ulpi_read	drivers/usb/ulpi/omap-ulpi-viewport.c	/^u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)$/;"	f	typeref:typename:u32
ulpi_read	drivers/usb/ulpi/ulpi-viewport.c	/^u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)$/;"	f	typeref:typename:u32
ulpi_regs	include/usb/ulpi.h	/^struct ulpi_regs {$/;"	s
ulpi_request	drivers/usb/ulpi/omap-ulpi-viewport.c	/^static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)$/;"	f	typeref:typename:int	file:
ulpi_request	drivers/usb/ulpi/ulpi-viewport.c	/^static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)$/;"	f	typeref:typename:int	file:
ulpi_reset	drivers/usb/ulpi/ulpi.c	/^int ulpi_reset(struct ulpi_viewport *ulpi_vp)$/;"	f	typeref:typename:int
ulpi_select_transceiver	drivers/usb/ulpi/ulpi.c	/^int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed)$/;"	f	typeref:typename:int
ulpi_serial_mode_enable	drivers/usb/ulpi/ulpi.c	/^int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode)$/;"	f	typeref:typename:int
ulpi_set_pd	drivers/usb/ulpi/ulpi.c	/^int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable)$/;"	f	typeref:typename:int
ulpi_set_vbus	drivers/usb/ulpi/ulpi.c	/^int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power)$/;"	f	typeref:typename:int
ulpi_set_vbus_indicator	drivers/usb/ulpi/ulpi.c	/^int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external,$/;"	f	typeref:typename:int
ulpi_suspend	drivers/usb/ulpi/ulpi.c	/^int ulpi_suspend(struct ulpi_viewport *ulpi_vp)$/;"	f	typeref:typename:int
ulpi_timing_ctrl_0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint ulpi_timing_ctrl_0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
ulpi_timing_ctrl_1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint ulpi_timing_ctrl_1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
ulpi_viewpoint	include/usb/ehci-ci.h	/^	u32	ulpi_viewpoint;	\/* 0x170 - ULPI Reister Access *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
ulpi_viewport	arch/arm/include/asm/arch-tegra/usb.h	/^	uint ulpi_viewport;$/;"	m	struct:usb_ctlr	typeref:typename:uint
ulpi_viewport	include/usb/ulpi.h	/^struct ulpi_viewport {$/;"	s
ulpi_vp	drivers/usb/host/ehci-msm.c	/^	struct ulpi_viewport ulpi_vp; \/* ULPI Viewport *\/$/;"	m	struct:msm_ehci_priv	typeref:struct:ulpi_viewport	file:
ulpi_wait	drivers/usb/ulpi/omap-ulpi-viewport.c	/^static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)$/;"	f	typeref:typename:int	file:
ulpi_wait	drivers/usb/ulpi/ulpi-viewport.c	/^static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)$/;"	f	typeref:typename:int	file:
ulpi_wakeup	drivers/usb/ulpi/ulpi-viewport.c	/^static int ulpi_wakeup(struct ulpi_viewport *ulpi_vp)$/;"	f	typeref:typename:int	file:
ulpi_write	drivers/usb/ulpi/omap-ulpi-viewport.c	/^int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)$/;"	f	typeref:typename:int
ulpi_write	drivers/usb/ulpi/ulpi-viewport.c	/^int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)$/;"	f	typeref:typename:int
ulsr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 ulsr;		\/* line status register *\/$/;"	m	struct:duart83xx	typeref:typename:u8
ulsr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	ulsr1;		\/* UART1 Line Status *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
ulsr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	ulsr1;		\/* 0x4505 - UART1 Line Status Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
ulsr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	ulsr2;		\/* UART2 Line Status *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
ulsr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	ulsr2;		\/* 0x4605 - UART2 Line Status Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
ulz4fn	lib/lz4_wrapper.c	/^int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn)$/;"	f	typeref:typename:int
um_init	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static void um_init(void __iomem *um_base)$/;"	f	typeref:typename:void	file:
um_init	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void um_init(void __iomem *um_base)$/;"	f	typeref:typename:void	file:
um_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void um_init(void __iomem *um_base)$/;"	f	typeref:typename:void	file:
uma1	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uma1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uma1	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uma1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uma1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uma1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uma2	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 uma2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uma2	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 uma2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uma2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 uma2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
uma_base	arch/x86/include/asm/me_common.h	/^	u32 uma_base:16;$/;"	m	struct:me_did	typeref:typename:u32:16
umass_bbb_cbw	include/usb_defs.h	/^struct umass_bbb_cbw {$/;"	s
umass_bbb_csw	include/usb_defs.h	/^struct umass_bbb_csw {$/;"	s
umc_acssetb	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_acssetb[DRAM_CH_NR] = {0x00000200, 0x00000203};$/;"	v	typeref:typename:const u32[]	file:
umc_ch_init	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static int umc_ch_init(void __iomem *umc_ch_base,$/;"	f	typeref:typename:int	file:
umc_ch_init	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static int umc_ch_init(void __iomem *umc_ch_base, void __iomem *phy_ch_base,$/;"	f	typeref:typename:int	file:
umc_ch_init	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,$/;"	f	typeref:typename:int	file:
umc_ch_init	arch/arm/mach-uniphier/dram/umc-pro4.c	/^static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,$/;"	f	typeref:typename:int	file:
umc_ch_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int umc_ch_init(void __iomem *umc_ch_base, enum dram_freq freq,$/;"	f	typeref:typename:int	file:
umc_ch_init	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,$/;"	f	typeref:typename:int	file:
umc_cmdctla	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_cmdctla[DRAM_FREQ_NR] = {0x060B0B1C};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctla	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_cmdctla[DRAM_FREQ_NR] = {0x060D0D20};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctla	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_cmdctla[DRAM_FREQ_NR] = {0x66DD131D, 0x77EE1722};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctla	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_cmdctla[DRAM_FREQ_NR] = {0x55990b11, 0x66bb0f17};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctla_plus	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static u32 umc_cmdctla_plus[DRAM_FREQ_NR] = {0x45990b11, 0x36bb0f17};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctla_plus	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_cmdctla_plus[DRAM_FREQ_NR] = {0x45990b11, 0x46bb0f17};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctlb	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x27201806};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctlb	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x2D211C08};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctlb	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x16958944, 0x18c6ab44};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctlb_ch01	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_cmdctlb_ch01[DRAM_FREQ_NR] = {0x13E87C44, 0x18F88C44};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctlb_ch2	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_cmdctlb_ch2[DRAM_FREQ_NR] = {0x19E8DC44, 0x1EF8EC44};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctlb_plus	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static u32 umc_cmdctlb_plus[DRAM_FREQ_NR] = {0x16958924, 0x18c6aa24};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctlb_plus	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_cmdctlb_plus[DRAM_FREQ_NR] = {0x16958924, 0x18c6ab24};$/;"	v	typeref:typename:u32[]	file:
umc_cmdctlc	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_cmdctlc[DRAM_FREQ_NR] = {0x00120B04};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctlc	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_cmdctlc[DRAM_FREQ_NR] = {0x00150C04};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctle	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_cmdctle[DRAM_FREQ_NR] = {0x00680607};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctle	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_cmdctle[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:const u32[][]	file:
umc_cmdctlf	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_cmdctlf[DRAM_FREQ_NR] = {0x02000200};$/;"	v	typeref:typename:const u32[]	file:
umc_cmdctlg	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_cmdctlg[DRAM_FREQ_NR] = {0x08080808};$/;"	v	typeref:typename:const u32[]	file:
umc_dataset	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_dataset[DRAM_FREQ_NR] = {0x04000000};$/;"	v	typeref:typename:const u32[]	file:
umc_dc_init	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq,$/;"	f	typeref:typename:int	file:
umc_dc_init	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static int umc_dc_init(void __iomem *dc_base, unsigned int freq,$/;"	f	typeref:typename:int	file:
umc_dc_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq,$/;"	f	typeref:typename:int	file:
umc_directbusctrla	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_directbusctrla[DRAM_CH_NR] = {$/;"	v	typeref:typename:const u32[]	file:
umc_dramcont_init	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,$/;"	f	typeref:typename:int	file:
umc_dramcont_init	arch/arm/mach-uniphier/dram/umc-pro4.c	/^static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,$/;"	f	typeref:typename:int	file:
umc_dramcont_init	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,$/;"	f	typeref:typename:int	file:
umc_drmmr0	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_drmmr0[DRAM_FREQ_NR] = {0x00000114};$/;"	v	typeref:typename:const u32[]	file:
umc_drmmr2	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_drmmr2[DRAM_FREQ_NR] = {0x000002a0};$/;"	v	typeref:typename:const u32[]	file:
umc_flowctla	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_flowctla[DRAM_FREQ_NR] = {0x0081E01E};$/;"	v	typeref:typename:const u32[]	file:
umc_flowctla_ch01	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_flowctla_ch01[] = {0x0800001E, 0x08000022};$/;"	v	typeref:typename:u32[]	file:
umc_flowctla_ch2	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_flowctla_ch2[] = {0x0800001E, 0x0800001E};$/;"	v	typeref:typename:u32[]	file:
umc_get_rank	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static int umc_get_rank(int ch)$/;"	f	typeref:typename:int	file:
umc_get_rank	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static int umc_get_rank(int ch)$/;"	f	typeref:typename:int	file:
umc_initctla	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_initctla[DRAM_FREQ_NR] = {0x71016D11};$/;"	v	typeref:typename:const u32[]	file:
umc_initctlb	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_initctlb[DRAM_FREQ_NR] = {0x07E390AC};$/;"	v	typeref:typename:const u32[]	file:
umc_initctlc	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_initctlc[DRAM_FREQ_NR] = {0x00FF00FF};$/;"	v	typeref:typename:const u32[]	file:
umc_memconf0a	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_memconf0a[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:const u32[][]	file:
umc_memconf0b	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_memconf0b[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:const u32[][]	file:
umc_memconfch	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_memconfch[DRAM_FREQ_NR] = {0x00023605};$/;"	v	typeref:typename:const u32[]	file:
umc_memconfch	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_memconfch[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:const u32[][]	file:
umc_odtctl	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_odtctl[DRAM_FREQ_NR]   = {0x02000002};$/;"	v	typeref:typename:const u32[]	file:
umc_odtctl	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_odtctl[DRAM_FREQ_NR] = {0x02000002};$/;"	v	typeref:typename:const u32[]	file:
umc_poll_phy_init_complete	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static void umc_poll_phy_init_complete(void __iomem *dc_base)$/;"	f	typeref:typename:void	file:
umc_rdatactl	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_rdatactl[DRAM_FREQ_NR] = {0x00000810};$/;"	v	typeref:typename:const u32[]	file:
umc_rdatactl	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_rdatactl[DRAM_FREQ_NR] = {0x00000610};$/;"	v	typeref:typename:const u32[]	file:
umc_rdatactl	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static u32 umc_rdatactl[DRAM_FREQ_NR] = {0x000a00ac, 0x000c00ae};$/;"	v	typeref:typename:u32[]	file:
umc_rdatactl	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_rdatactl[DRAM_FREQ_NR] = {0x000a00ac, 0x000c00ac};$/;"	v	typeref:typename:u32[]	file:
umc_refresh_ctrl	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^void umc_refresh_ctrl(void __iomem *dc_base, int enable)$/;"	f	typeref:typename:void
umc_set_system_latency	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void umc_set_system_latency(void __iomem *dc_base, int phy_latency)$/;"	f	typeref:typename:void	file:
umc_spcctla	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static u32 umc_spcctla[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:u32[][]	file:
umc_spcctla	arch/arm/mach-uniphier/dram/umc-pro4.c	/^static u32 umc_spcctla[DRAM_SZ_NR] = {0x002b0617, 0x003f0617, 0x00770617};$/;"	v	typeref:typename:u32[]	file:
umc_spcctla	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_spcctla[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:u32[][]	file:
umc_spcctla	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_spcctla[DRAM_FREQ_NR][DRAM_SZ_NR] = {$/;"	v	typeref:typename:u32[][]	file:
umc_spcctlb	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static u32 umc_spcctlb[DRAM_FREQ_NR] = {0x00ff0006, 0x00ff0008};$/;"	v	typeref:typename:u32[]	file:
umc_spcctlb	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static u32 umc_spcctlb[] = {0x00FF000A, 0x00FF000B};$/;"	v	typeref:typename:u32[]	file:
umc_spcctlb	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static u32 umc_spcctlb[DRAM_FREQ_NR] = {0x00ff0006, 0x00ff0008};$/;"	v	typeref:typename:u32[]	file:
umc_start_ssif	arch/arm/mach-uniphier/dram/umc-ld4.c	/^static void umc_start_ssif(void __iomem *ssif_base)$/;"	f	typeref:typename:void	file:
umc_start_ssif	arch/arm/mach-uniphier/dram/umc-pro4.c	/^static void umc_start_ssif(void __iomem *ssif_base)$/;"	f	typeref:typename:void	file:
umc_start_ssif	arch/arm/mach-uniphier/dram/umc-sld8.c	/^static void umc_start_ssif(void __iomem *ssif_base)$/;"	f	typeref:typename:void	file:
umc_ud_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^static void umc_ud_init(void __iomem *umc_base, int ch)$/;"	f	typeref:typename:void	file:
umc_wdatactl	arch/arm/mach-uniphier/dram/umc-ld11.c	/^static const u32 umc_wdatactl[DRAM_FREQ_NR] = {0x00000004};$/;"	v	typeref:typename:const u32[]	file:
umc_wdatactl	arch/arm/mach-uniphier/dram/umc-ld20.c	/^static const u32 umc_wdatactl[DRAM_FREQ_NR] = {0x00000204};$/;"	v	typeref:typename:const u32[]	file:
umchid	arch/x86/include/asm/me_common.h	/^	u32 umchid[4];$/;"	m	struct:mbp_rom_bist_data	typeref:typename:u32[4]
umcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	umcon;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
umcon	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	umcon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
umcon	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	umcon;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
umcr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 umcr;		\/* MODEM control register *\/$/;"	m	struct:duart83xx	typeref:typename:u8
umcr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	umcr1;		\/* UART1 Modem Control *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
umcr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	umcr1;		\/* 0x4504 - UART1 Modem Control Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
umcr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	umcr2;		\/* UART2 Modem Control *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
umcr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	umcr2;		\/* 0x4604 - UART2 Modem Control Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
umode_t	arch/arc/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/arm/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/avr32/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/blackfin/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/m68k/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/microblaze/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/mips/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/nds32/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/nios2/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/openrisc/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/powerpc/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/sandbox/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/sh/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/sparc/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/x86/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umode_t	arch/xtensa/include/asm/types.h	/^typedef unsigned short umode_t;$/;"	t	typeref:typename:unsigned short
umodem	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 umodem;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
umodem	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 umodem;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
umodem	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 umodem;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
umount	test/py/tests/test_ums.py	/^    def umount(ignore_errors):$/;"	f	function:test_ums	file:
umount_begin	fs/ubifs/ubifs.h	/^	void (*umount_begin) (struct super_block *);$/;"	m	struct:super_operations	typeref:typename:void (*)(struct super_block *)
umount_mutex	fs/ubifs/ubifs.h	/^	struct mutex umount_mutex;$/;"	m	struct:ubifs_info	typeref:struct:mutex
umr	arch/m68k/include/asm/uart.h	/^	u8 umr;			\/* 0x00 Mode Register *\/$/;"	m	struct:uart	typeref:typename:u8
ums	cmd/usb_mass_storage.c	/^static struct ums *ums;$/;"	v	typeref:struct:ums *	file:
ums	drivers/usb/gadget/f_mass_storage.c	/^static struct ums *ums;$/;"	v	typeref:struct:ums *	file:
ums	include/usb_mass_storage.h	/^struct ums {$/;"	s
ums_count	cmd/usb_mass_storage.c	/^static int ums_count;$/;"	v	typeref:typename:int	file:
ums_count	drivers/usb/gadget/f_mass_storage.c	/^static int ums_count;$/;"	v	typeref:typename:int	file:
ums_fini	cmd/usb_mass_storage.c	/^static void ums_fini(void)$/;"	f	typeref:typename:void	file:
ums_init	cmd/usb_mass_storage.c	/^static int ums_init(const char *devtype, const char *devnums_part_str)$/;"	f	typeref:typename:int	file:
ums_read_sector	cmd/usb_mass_storage.c	/^static int ums_read_sector(struct ums *ums_dev,$/;"	f	typeref:typename:int	file:
ums_write_sector	cmd/usb_mass_storage.c	/^static int ums_write_sector(struct ums *ums_dev,$/;"	f	typeref:typename:int	file:
umsr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 umsr;		\/* MODEM status register *\/$/;"	m	struct:duart83xx	typeref:typename:u8
umsr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	umsr1;		\/* UART1 Modem Status *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
umsr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	umsr1;		\/* 0x4506 - UART1 Modem Status Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
umsr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	umsr2;		\/* UART2 Modem Status *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
umsr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	umsr2;		\/* 0x4606 - UART2 Modem Status Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
umstat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	umstat;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
umstat	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	umstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
umstat	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	umstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
umul_ppmm	arch/blackfin/lib/muldi3.c	/^#define umul_ppmm(/;"	d	file:
umul_ppmm	arch/m68k/lib/muldi3.c	/^#define umul_ppmm(/;"	d	file:
umul_ppmm	arch/microblaze/lib/muldi3.c	/^#define umul_ppmm(/;"	d	file:
umul_ppmm	arch/nios2/lib/longlong.h	/^#define umul_ppmm(/;"	d
un	arch/powerpc/cpu/mpc8260/ether_fcc.c	/^		uint def, hb, lc, rl, rc, un, csl;$/;"	m	struct:__anon7d79ed4b0308	typeref:typename:uint	file:
un	include/net.h	/^	} un;$/;"	m	struct:icmp_hdr	typeref:union:icmp_hdr::__anona5cac555010a
unRLE_obuf_to_output_FAST	lib/bzip2/bzlib.c	/^void unRLE_obuf_to_output_FAST ( DState* s )$/;"	f	typeref:typename:void	file:
unRLE_obuf_to_output_SMALL	lib/bzip2/bzlib.c	/^void unRLE_obuf_to_output_SMALL ( DState* s )$/;"	f	typeref:typename:void	file:
unbind	include/dm/device.h	/^	int (*unbind)(struct udevice *dev);$/;"	m	struct:driver	typeref:typename:int (*)(struct udevice * dev)
unbind	include/linux/usb/composite.h	/^	int			(*unbind)(struct usb_composite_dev *);$/;"	m	struct:usb_composite_driver	typeref:typename:int (*)(struct usb_composite_dev *)
unbind	include/linux/usb/composite.h	/^	void			(*unbind)(struct usb_configuration *);$/;"	m	struct:usb_configuration	typeref:typename:void (*)(struct usb_configuration *)
unbind	include/linux/usb/composite.h	/^	void			(*unbind)(struct usb_configuration *,$/;"	m	struct:usb_function	typeref:typename:void (*)(struct usb_configuration *,struct usb_function *)
unbind	include/linux/usb/gadget.h	/^	void			(*unbind)(struct usb_gadget *);$/;"	m	struct:usb_gadget_driver	typeref:typename:void (*)(struct usb_gadget *)
unbuffered	include/ddr_spd.h	/^		} unbuffered;$/;"	m	union:ddr3_spd_eeprom_s::__anoncde79dee010a	typeref:struct:ddr3_spd_eeprom_s::__anoncde79dee010a::__anoncde79dee0208
unbuffered	include/ddr_spd.h	/^		} unbuffered;$/;"	m	union:ddr4_spd_eeprom_s::__anoncde79dee040a	typeref:struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0508
uncached	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^#define uncached(/;"	d
uncat_list	fs/ubifs/ubifs.h	/^	struct list_head uncat_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
unchar	include/linux/types.h	/^typedef unsigned char		unchar;$/;"	t	typeref:typename:unsigned char
unclean_leb_list	fs/ubifs/ubifs.h	/^	struct list_head unclean_leb_list;$/;"	m	struct:ubifs_info	typeref:struct:list_head
uncommitted_idx	fs/ubifs/ubifs.h	/^	long long uncommitted_idx;$/;"	m	struct:ubifs_budg_info	typeref:typename:long long
uncompress	include/u-boot/zlib.h	/^#  define uncompress /;"	d
uncompress_using_bzip2	test/compression.c	/^static int uncompress_using_bzip2(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
uncompress_using_gzip	test/compression.c	/^static int uncompress_using_gzip(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
uncompress_using_lz4	test/compression.c	/^static int uncompress_using_lz4(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
uncompress_using_lzma	test/compression.c	/^static int uncompress_using_lzma(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
uncompress_using_lzo	test/compression.c	/^static int uncompress_using_lzo(void *in, unsigned long in_size,$/;"	f	typeref:typename:int	file:
undefined_instruction	arch/arm/lib/vectors.S	/^undefined_instruction:$/;"	l
undefined_intr	drivers/bios_emulator/bios.c	/^static void X86API undefined_intr(int intno)$/;"	f	typeref:typename:void X86API	file:
underpkts	drivers/qe/uec.h	/^	u32   underpkts;         \/* total frames less than 64 octets *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
underrun	drivers/video/fsl_dcu_fb.c	/^	u32 underrun;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
unfreeze_fs	fs/ubifs/ubifs.h	/^	int (*unfreeze_fs) (struct super_block *);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct super_block *)
ungate_pcie_clock	arch/arm/cpu/armv7/mx6/clock.c	/^static void ungate_pcie_clock(void)$/;"	f	typeref:typename:void	file:
ungate_sata_clock	arch/arm/cpu/armv7/mx6/clock.c	/^static void ungate_sata_clock(void)$/;"	f	typeref:typename:void	file:
unget	tools/buildman/kconfiglib.py	/^    def unget(self):$/;"	m	class:_FileFeed
unget_all	tools/buildman/kconfiglib.py	/^    def unget_all(self):$/;"	m	class:_Feed
unhandled_exception	arch/xtensa/cpu/exceptions.c	/^void unhandled_exception(struct pt_regs *regs)$/;"	f	typeref:typename:void
unhandled_irq	drivers/block/sata_dwc.h	/^	unsigned long		unhandled_irq;$/;"	m	struct:ata_port_stats	typeref:typename:unsigned long
unicode_char	include/efi_api.h	/^	s16 unicode_char;$/;"	m	struct:efi_input_key	typeref:typename:s16
unimpl	drivers/block/sata_dwc.c	/^	u32 unimpl[192];$/;"	m	struct:sata_dwc_regs	typeref:typename:u32[192]	file:
unimplemented	cmd/immap.c	/^unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])$/;"	f	typeref:typename:void	file:
uninitialized_var	include/linux/compiler-clang.h	/^#define uninitialized_var(/;"	d
uninitialized_var	include/linux/compiler-gcc.h	/^#define uninitialized_var(/;"	d
union_desc	drivers/usb/gadget/ether.c	/^static const struct usb_cdc_union_desc union_desc = {$/;"	v	typeref:typename:const struct usb_cdc_union_desc	file:
union_function	include/usbdescriptors.h	/^		struct usb_class_union_function_descriptor union_function;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_union_function_descriptor
uniphier_board_data	arch/arm/mach-uniphier/init.h	/^struct uniphier_board_data {$/;"	s
uniphier_board_id	arch/arm/mach-uniphier/boards.c	/^struct uniphier_board_id {$/;"	s	file:
uniphier_boards	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_id uniphier_boards[] = {$/;"	v	typeref:typename:const struct uniphier_board_id[]	file:
uniphier_cache_disable	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_disable(void)$/;"	f	typeref:typename:void
uniphier_cache_enable	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_enable(void)$/;"	f	typeref:typename:void
uniphier_cache_endisable	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^static void uniphier_cache_endisable(int enable)$/;"	f	typeref:typename:void	file:
uniphier_cache_inv_way	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_inv_way(u32 ways)$/;"	f	typeref:typename:void
uniphier_cache_maint_all	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^static void uniphier_cache_maint_all(u32 operation)$/;"	f	typeref:typename:void	file:
uniphier_cache_maint_common	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^static void uniphier_cache_maint_common(u32 start, u32 size, u32 ways,$/;"	f	typeref:typename:void	file:
uniphier_cache_maint_range	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^static void uniphier_cache_maint_range(u32 start, u32 end, u32 ways,$/;"	f	typeref:typename:void	file:
uniphier_cache_prefetch_range	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_prefetch_range(u32 start, u32 end, u32 ways)$/;"	f	typeref:typename:void
uniphier_cache_set_active_ways	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_set_active_ways(int cpu, u32 active_ways)$/;"	f	typeref:typename:void
uniphier_cache_sync	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^static void uniphier_cache_sync(void)$/;"	f	typeref:typename:void	file:
uniphier_cache_touch_range	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_touch_range(u32 start, u32 end, u32 ways)$/;"	f	typeref:typename:void
uniphier_cache_touch_zero_range	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void uniphier_cache_touch_zero_range(u32 start, u32 end, u32 ways)$/;"	f	typeref:typename:void
uniphier_clk_data	drivers/clk/uniphier/clk-uniphier.h	/^struct uniphier_clk_data {$/;"	s
uniphier_clk_enable	drivers/clk/uniphier/clk-uniphier-core.c	/^static int uniphier_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
uniphier_clk_gate_data	drivers/clk/uniphier/clk-uniphier.h	/^struct uniphier_clk_gate_data {$/;"	s
uniphier_clk_get_mux_data	drivers/clk/uniphier/clk-uniphier-core.c	/^uniphier_clk_get_mux_data(struct uniphier_clk_priv *priv, unsigned long id)$/;"	f	typeref:typename:const struct uniphier_clk_mux_data *	file:
uniphier_clk_get_rate	drivers/clk/uniphier/clk-uniphier-core.c	/^static ulong uniphier_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
uniphier_clk_match	drivers/clk/uniphier/clk-uniphier-core.c	/^static const struct udevice_id uniphier_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_clk_mux_data	drivers/clk/uniphier/clk-uniphier.h	/^struct uniphier_clk_mux_data {$/;"	s
uniphier_clk_ops	drivers/clk/uniphier/clk-uniphier-core.c	/^const struct clk_ops uniphier_clk_ops = {$/;"	v	typeref:typename:const struct clk_ops
uniphier_clk_priv	drivers/clk/uniphier/clk-uniphier-core.c	/^struct uniphier_clk_priv {$/;"	s	file:
uniphier_clk_probe	drivers/clk/uniphier/clk-uniphier-core.c	/^static int uniphier_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_clk_set_rate	drivers/clk/uniphier/clk-uniphier-core.c	/^static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate)$/;"	f	typeref:typename:ulong	file:
uniphier_dram_ch	arch/arm/mach-uniphier/init.h	/^struct uniphier_dram_ch {$/;"	s
uniphier_fi2c_dev	drivers/i2c/i2c-uniphier-f.c	/^struct uniphier_fi2c_dev {$/;"	s	file:
uniphier_fi2c_of_match	drivers/i2c/i2c-uniphier-f.c	/^static const struct udevice_id uniphier_fi2c_of_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_fi2c_ops	drivers/i2c/i2c-uniphier-f.c	/^static const struct dm_i2c_ops uniphier_fi2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
uniphier_fi2c_probe	drivers/i2c/i2c-uniphier-f.c	/^static int uniphier_fi2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_fi2c_receive	drivers/i2c/i2c-uniphier-f.c	/^static int uniphier_fi2c_receive(struct uniphier_fi2c_dev *dev, uint addr,$/;"	f	typeref:typename:int	file:
uniphier_fi2c_regs	drivers/i2c/i2c-uniphier-f.c	/^struct uniphier_fi2c_regs {$/;"	s	file:
uniphier_fi2c_set_bus_speed	drivers/i2c/i2c-uniphier-f.c	/^static int uniphier_fi2c_set_bus_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int	file:
uniphier_fi2c_transmit	drivers/i2c/i2c-uniphier-f.c	/^static int uniphier_fi2c_transmit(struct uniphier_fi2c_dev *dev, uint addr,$/;"	f	typeref:typename:int	file:
uniphier_fi2c_xfer	drivers/i2c/i2c-uniphier-f.c	/^static int uniphier_fi2c_xfer(struct udevice *bus, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
uniphier_get_board_param	arch/arm/mach-uniphier/boards.c	/^const struct uniphier_board_data *uniphier_get_board_param(void)$/;"	f	typeref:typename:const struct uniphier_board_data *
uniphier_get_nr_cpus	arch/arm/mach-uniphier/arm32/psci.c	/^static int uniphier_get_nr_cpus(void)$/;"	f	typeref:typename:int	file:
uniphier_get_soc_model	arch/arm/mach-uniphier/soc_info.c	/^int uniphier_get_soc_model(void)$/;"	f	typeref:typename:int
uniphier_get_soc_revision	arch/arm/mach-uniphier/soc_info.c	/^int uniphier_get_soc_revision(void)$/;"	f	typeref:typename:int
uniphier_get_soc_type	arch/arm/mach-uniphier/soc-info.h	/^static inline enum uniphier_soc_id uniphier_get_soc_type(void)$/;"	f	typeref:enum:uniphier_soc_id
uniphier_get_soc_type	arch/arm/mach-uniphier/soc_info.c	/^enum uniphier_soc_id uniphier_get_soc_type(void)$/;"	f	typeref:enum:uniphier_soc_id
uniphier_gpio_direction_input	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_direction_input(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
uniphier_gpio_direction_output	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_direction_output(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
uniphier_gpio_get_function	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
uniphier_gpio_get_value	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_get_value(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
uniphier_gpio_match	drivers/gpio/gpio-uniphier.c	/^static const struct udevice_id uniphier_gpio_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_gpio_offset_read	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_offset_read(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
uniphier_gpio_offset_write	drivers/gpio/gpio-uniphier.c	/^static void uniphier_gpio_offset_write(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:void	file:
uniphier_gpio_ops	drivers/gpio/gpio-uniphier.c	/^static const struct dm_gpio_ops uniphier_gpio_ops = {$/;"	v	typeref:typename:const struct dm_gpio_ops	file:
uniphier_gpio_priv	drivers/gpio/gpio-uniphier.c	/^struct uniphier_gpio_priv {$/;"	s	file:
uniphier_gpio_probe	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_gpio_set_value	drivers/gpio/gpio-uniphier.c	/^static int uniphier_gpio_set_value(struct udevice *dev, unsigned offset,$/;"	f	typeref:typename:int	file:
uniphier_i2c_dev	drivers/i2c/i2c-uniphier.c	/^struct uniphier_i2c_dev {$/;"	s	file:
uniphier_i2c_of_match	drivers/i2c/i2c-uniphier.c	/^static const struct udevice_id uniphier_i2c_of_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_i2c_ops	drivers/i2c/i2c-uniphier.c	/^static const struct dm_i2c_ops uniphier_i2c_ops = {$/;"	v	typeref:typename:const struct dm_i2c_ops	file:
uniphier_i2c_probe	drivers/i2c/i2c-uniphier.c	/^static int uniphier_i2c_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_i2c_receive	drivers/i2c/i2c-uniphier.c	/^static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr,$/;"	f	typeref:typename:int	file:
uniphier_i2c_regs	drivers/i2c/i2c-uniphier.c	/^struct uniphier_i2c_regs {$/;"	s	file:
uniphier_i2c_set_bus_speed	drivers/i2c/i2c-uniphier.c	/^static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)$/;"	f	typeref:typename:int	file:
uniphier_i2c_transmit	drivers/i2c/i2c-uniphier.c	/^static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr,$/;"	f	typeref:typename:int	file:
uniphier_i2c_xfer	drivers/i2c/i2c-uniphier.c	/^static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,$/;"	f	typeref:typename:int	file:
uniphier_ld11_clk_init	arch/arm/mach-uniphier/clk/clk-ld11.c	/^void uniphier_ld11_clk_init(void)$/;"	f	typeref:typename:void
uniphier_ld11_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_ld11_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_ld11_dpll_init	arch/arm/mach-uniphier/clk/dpll-ld11.c	/^int uniphier_ld11_dpll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld11_early_clk_init	arch/arm/mach-uniphier/clk/early-clk-ld11.c	/^int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld11_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const char * const uniphier_ld11_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_ld11_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_ld11_init	arch/arm/mach-uniphier/init/init-ld11.c	/^int uniphier_ld11_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld11_phy_param	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static const struct phy_param uniphier_ld11_phy_param[] = {$/;"	v	typeref:typename:const struct phy_param[]	file:
uniphier_ld11_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const struct udevice_id uniphier_ld11_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_ld11_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static int uniphier_ld11_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_ld11_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static struct uniphier_pinctrl_socdata uniphier_ld11_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_ld11_pll_init	arch/arm/mach-uniphier/clk/pll-ld11.c	/^void uniphier_ld11_pll_init(void)$/;"	f	typeref:typename:void
uniphier_ld11_romfunc_table	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^static const struct uniphier_romfunc_table uniphier_ld11_romfunc_table = {$/;"	v	typeref:typename:const struct uniphier_romfunc_table	file:
uniphier_ld11_sys_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_ld11_sys_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_ld11_umc_init	arch/arm/mach-uniphier/dram/umc-ld11.c	/^int uniphier_ld11_umc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld20_boot_device	arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c	/^u32 uniphier_ld20_boot_device(void)$/;"	f	typeref:typename:u32
uniphier_ld20_boot_mode_show	arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c	/^void uniphier_ld20_boot_mode_show(void)$/;"	f	typeref:typename:void
uniphier_ld20_clk_init	arch/arm/mach-uniphier/clk/clk-ld20.c	/^void uniphier_ld20_clk_init(void)$/;"	f	typeref:typename:void
uniphier_ld20_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_ld20_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_ld20_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c	/^unsigned int uniphier_ld20_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_ld20_dpll_init	arch/arm/mach-uniphier/clk/dpll-ld20.c	/^int uniphier_ld20_dpll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld20_dspll_init	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^int uniphier_ld20_dspll_init(unsigned long reg_base)$/;"	f	typeref:typename:int
uniphier_ld20_early_clk_init	arch/arm/mach-uniphier/clk/early-clk-ld20.c	/^int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld20_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const char * const uniphier_ld20_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_ld20_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_ld20_init	arch/arm/mach-uniphier/init/init-ld20.c	/^int uniphier_ld20_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld20_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const struct udevice_id uniphier_ld20_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_ld20_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static int uniphier_ld20_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_ld20_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_ld20_pll_init	arch/arm/mach-uniphier/clk/pll-ld20.c	/^int uniphier_ld20_pll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld20_ref_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_ld20_ref_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_ld20_romfunc_table	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^static const struct uniphier_romfunc_table uniphier_ld20_romfunc_table = {$/;"	v	typeref:typename:const struct uniphier_romfunc_table	file:
uniphier_ld20_sscpll_init	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,$/;"	f	typeref:typename:int
uniphier_ld20_sscpll_ssc_en	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base)$/;"	f	typeref:typename:int
uniphier_ld20_sys_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_ld20_umc_init	arch/arm/mach-uniphier/dram/umc-ld20.c	/^int uniphier_ld20_umc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld20_vpll27_init	arch/arm/mach-uniphier/clk/pll-base-ld20.c	/^int uniphier_ld20_vpll27_init(unsigned long reg_base)$/;"	f	typeref:typename:int
uniphier_ld21_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_ld21_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_ld4_bcu_init	arch/arm/mach-uniphier/bcu/bcu-ld4.c	/^int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld4_boot_device	arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c	/^u32 uniphier_ld4_boot_device(void)$/;"	f	typeref:typename:u32
uniphier_ld4_boot_mode_show	arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c	/^void uniphier_ld4_boot_mode_show(void)$/;"	f	typeref:typename:void
uniphier_ld4_clk_init	arch/arm/mach-uniphier/clk/clk-ld4.c	/^void uniphier_ld4_clk_init(void)$/;"	f	typeref:typename:void
uniphier_ld4_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_ld4_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_ld4_ddrphy_init	arch/arm/mach-uniphier/dram/ddrphy-ld4.c	/^int uniphier_ld4_ddrphy_init(void __iomem *phy_base, int freq, bool ddr3plus)$/;"	f	typeref:typename:int
uniphier_ld4_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c	/^unsigned int uniphier_ld4_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_ld4_dpll_init	arch/arm/mach-uniphier/clk/dpll-ld4.c	/^int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld4_dpll_ssc_en	arch/arm/mach-uniphier/clk/dpll-tail.c	/^void uniphier_ld4_dpll_ssc_en(void)$/;"	f	typeref:typename:void
uniphier_ld4_early_clk_init	arch/arm/mach-uniphier/clk/early-clk-ld4.c	/^int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld4_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const char * const uniphier_ld4_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_ld4_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_ld4_init	arch/arm/mach-uniphier/init/init-ld4.c	/^int uniphier_ld4_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld4_peri_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_ld4_peri_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_ld4_phy_param	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static const struct phy_param uniphier_ld4_phy_param[] = {$/;"	v	typeref:typename:const struct phy_param[]	file:
uniphier_ld4_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const struct udevice_id uniphier_ld4_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_ld4_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static int uniphier_ld4_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_ld4_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static struct uniphier_pinctrl_socdata uniphier_ld4_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_ld4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const struct uniphier_pinctrl_pin uniphier_ld4_pins[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_pin[]	file:
uniphier_ld4_pll_init	arch/arm/mach-uniphier/clk/pll-ld4.c	/^void uniphier_ld4_pll_init(void)$/;"	f	typeref:typename:void
uniphier_ld4_sbc_init	arch/arm/mach-uniphier/init.h	/^static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld4_sbc_init	arch/arm/mach-uniphier/sbc/sbc-ld4.c	/^int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld4_umc_init	arch/arm/mach-uniphier/dram/umc-ld4.c	/^int uniphier_ld4_umc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_ld6b_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_ld6b_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_ld6b_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c	/^unsigned int uniphier_ld6b_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_ld6b_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const char * const uniphier_ld6b_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_ld6b_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_ld6b_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const struct udevice_id uniphier_ld6b_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_ld6b_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static int uniphier_ld6b_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_ld6b_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static struct uniphier_pinctrl_socdata uniphier_ld6b_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_ld6b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const struct uniphier_pinctrl_pin uniphier_ld6b_pins[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_pin[]	file:
uniphier_mem_map	arch/arm/mach-uniphier/arm64/mem_map.c	/^static struct mm_region uniphier_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
uniphier_mio_clk_data	drivers/clk/uniphier/clk-uniphier-mio.c	/^const struct uniphier_clk_data uniphier_mio_clk_data = {$/;"	v	typeref:typename:const struct uniphier_clk_data
uniphier_mio_clk_gate	drivers/clk/uniphier/clk-uniphier-mio.c	/^static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {$/;"	v	typeref:typename:const struct uniphier_clk_gate_data[]	file:
uniphier_mio_clk_mux	drivers/clk/uniphier/clk-uniphier-mio.c	/^static const struct uniphier_clk_mux_data uniphier_mio_clk_mux[] = {$/;"	v	typeref:typename:const struct uniphier_clk_mux_data[]	file:
uniphier_mio_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_mio_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_nand_pin_init	arch/arm/mach-uniphier/board_init.c	/^static void uniphier_nand_pin_init(bool cs2)$/;"	f	typeref:typename:void	file:
uniphier_pin_get_iectrl	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)$/;"	f	typeref:typename:unsigned int
uniphier_pin_init	arch/arm/mach-uniphier/pinctrl-glue.c	/^int uniphier_pin_init(const char *pinconfig_name)$/;"	f	typeref:typename:int
uniphier_pinconf_input_enable	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin)$/;"	f	typeref:typename:void	file:
uniphier_pinconf_input_enable_legacy	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static void uniphier_pinconf_input_enable_legacy(struct udevice *dev,$/;"	f	typeref:typename:void	file:
uniphier_pinconf_input_enable_perpin	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static void uniphier_pinconf_input_enable_perpin(struct udevice *dev,$/;"	f	typeref:typename:void	file:
uniphier_pinctrl_dummy_name	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static const char *uniphier_pinctrl_dummy_name = "_dummy";$/;"	v	typeref:typename:const char *	file:
uniphier_pinctrl_get_group_name	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static const char *uniphier_pinctrl_get_group_name(struct udevice *dev,$/;"	f	typeref:typename:const char *	file:
uniphier_pinctrl_get_groups_count	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static int uniphier_pinctrl_get_groups_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_pinctrl_group	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^struct uniphier_pinctrl_group {$/;"	s
uniphier_pinctrl_ops	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^const struct pinctrl_ops uniphier_pinctrl_ops = {$/;"	v	typeref:typename:const struct pinctrl_ops
uniphier_pinctrl_pin	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^struct uniphier_pinctrl_pin {$/;"	s
uniphier_pinctrl_priv	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^struct uniphier_pinctrl_priv {$/;"	s
uniphier_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^int uniphier_pinctrl_probe(struct udevice *dev,$/;"	f	typeref:typename:int
uniphier_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier.h	/^struct uniphier_pinctrl_socdata {$/;"	s
uniphier_pinmux_get_function_name	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static const char *uniphier_pinmux_get_function_name(struct udevice *dev,$/;"	f	typeref:typename:const char *	file:
uniphier_pinmux_get_functions_count	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static int uniphier_pinmux_get_functions_count(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_pinmux_group_set	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static int uniphier_pinmux_group_set(struct udevice *dev,$/;"	f	typeref:typename:int	file:
uniphier_pinmux_set_one	drivers/pinctrl/uniphier/pinctrl-uniphier-core.c	/^static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,$/;"	f	typeref:typename:void	file:
uniphier_pro4_2g_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_pro4_2g_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_pro4_clk_init	arch/arm/mach-uniphier/clk/clk-pro4.c	/^void uniphier_pro4_clk_init(void)$/;"	f	typeref:typename:void
uniphier_pro4_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_pro4_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_pro4_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c	/^unsigned int uniphier_pro4_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_pro4_dpll_init	arch/arm/mach-uniphier/clk/dpll-pro4.c	/^int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pro4_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const char * const uniphier_pro4_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_pro4_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_pro4_init	arch/arm/mach-uniphier/init/init-pro4.c	/^int uniphier_pro4_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pro4_peri_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_pro4_peri_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_pro4_phy_param	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static const struct phy_param uniphier_pro4_phy_param[] = {$/;"	v	typeref:typename:const struct phy_param[]	file:
uniphier_pro4_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const struct udevice_id uniphier_pro4_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_pro4_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static int uniphier_pro4_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_pro4_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static struct uniphier_pinctrl_socdata uniphier_pro4_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_pro4_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const struct uniphier_pinctrl_pin uniphier_pro4_pins[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_pin[]	file:
uniphier_pro4_pll_init	arch/arm/mach-uniphier/clk/pll-pro4.c	/^void uniphier_pro4_pll_init(void)$/;"	f	typeref:typename:void
uniphier_pro4_sys_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_pro4_umc_init	arch/arm/mach-uniphier/dram/umc-pro4.c	/^int uniphier_pro4_umc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pro5_boot_device	arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c	/^u32 uniphier_pro5_boot_device(void)$/;"	f	typeref:typename:u32
uniphier_pro5_boot_mode_show	arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c	/^void uniphier_pro5_boot_mode_show(void)$/;"	f	typeref:typename:void
uniphier_pro5_clk_init	arch/arm/mach-uniphier/clk/clk-pro5.c	/^void uniphier_pro5_clk_init(void)$/;"	f	typeref:typename:void
uniphier_pro5_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_pro5_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_pro5_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c	/^unsigned int uniphier_pro5_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_pro5_early_clk_init	arch/arm/mach-uniphier/clk/early-clk-pro5.c	/^int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pro5_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const char * const uniphier_pro5_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_pro5_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_pro5_init	arch/arm/mach-uniphier/init/init-pro5.c	/^int uniphier_pro5_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pro5_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const struct udevice_id uniphier_pro5_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_pro5_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static int uniphier_pro5_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_pro5_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static struct uniphier_pinctrl_socdata uniphier_pro5_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_pro5_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const struct uniphier_pinctrl_pin uniphier_pro5_pins[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_pin[]	file:
uniphier_pro5_sys_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_pxs2_boot_device	arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c	/^u32 uniphier_pxs2_boot_device(void)$/;"	f	typeref:typename:u32
uniphier_pxs2_boot_mode_show	arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c	/^void uniphier_pxs2_boot_mode_show(void)$/;"	f	typeref:typename:void
uniphier_pxs2_clk_init	arch/arm/mach-uniphier/clk/clk-pxs2.c	/^void uniphier_pxs2_clk_init(void)$/;"	f	typeref:typename:void
uniphier_pxs2_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_pxs2_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_pxs2_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c	/^unsigned int uniphier_pxs2_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_pxs2_early_clk_init	arch/arm/mach-uniphier/clk/early-clk-pxs2.c	/^int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pxs2_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const char * const uniphier_pxs2_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_pxs2_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_pxs2_init	arch/arm/mach-uniphier/init/init-pxs2.c	/^int uniphier_pxs2_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pxs2_memconf_init	arch/arm/mach-uniphier/memconf/memconf-pxs2.c	/^int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pxs2_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const struct udevice_id uniphier_pxs2_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_pxs2_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static int uniphier_pxs2_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_pxs2_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static struct uniphier_pinctrl_socdata uniphier_pxs2_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_pxs2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const struct uniphier_pinctrl_pin uniphier_pxs2_pins[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_pin[]	file:
uniphier_pxs2_sbc_init	arch/arm/mach-uniphier/init.h	/^static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pxs2_sbc_init	arch/arm/mach-uniphier/sbc/sbc-pxs2.c	/^int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_pxs2_sys_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_pxs2_umc_init	arch/arm/mach-uniphier/dram/umc-pxs2.c	/^int uniphier_pxs2_umc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_reset_assert	drivers/reset/reset-uniphier.c	/^static int uniphier_reset_assert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
uniphier_reset_data	drivers/reset/reset-uniphier.c	/^struct uniphier_reset_data {$/;"	s	file:
uniphier_reset_deassert	drivers/reset/reset-uniphier.c	/^static int uniphier_reset_deassert(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
uniphier_reset_free	drivers/reset/reset-uniphier.c	/^static int uniphier_reset_free(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
uniphier_reset_match	drivers/reset/reset-uniphier.c	/^static const struct udevice_id uniphier_reset_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_reset_ops	drivers/reset/reset-uniphier.c	/^static const struct reset_ops uniphier_reset_ops = {$/;"	v	typeref:typename:const struct reset_ops	file:
uniphier_reset_priv	drivers/reset/reset-uniphier.c	/^struct uniphier_reset_priv {$/;"	s	file:
uniphier_reset_probe	drivers/reset/reset-uniphier.c	/^static int uniphier_reset_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_reset_request	drivers/reset/reset-uniphier.c	/^static int uniphier_reset_request(struct reset_ctl *reset_ctl)$/;"	f	typeref:typename:int	file:
uniphier_reset_update	drivers/reset/reset-uniphier.c	/^static int uniphier_reset_update(struct reset_ctl *reset_ctl, int assert)$/;"	f	typeref:typename:int	file:
uniphier_rom_get_mmc_funcptr	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32),$/;"	f	typeref:typename:int
uniphier_romfunc_table	arch/arm/mach-uniphier/boot-mode/spl_board.c	/^struct uniphier_romfunc_table {$/;"	s	file:
uniphier_sbc_init_admulti	arch/arm/mach-uniphier/init.h	/^static inline int uniphier_sbc_init_admulti($/;"	f	typeref:typename:int
uniphier_sbc_init_admulti	arch/arm/mach-uniphier/sbc/sbc-admulti.c	/^int uniphier_sbc_init_admulti(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sbc_init_savepin	arch/arm/mach-uniphier/init.h	/^static inline int uniphier_sbc_init_savepin($/;"	f	typeref:typename:int
uniphier_sbc_init_savepin	arch/arm/mach-uniphier/sbc/sbc-savepin.c	/^int uniphier_sbc_init_savepin(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sd_addr_is_dmaable	drivers/mmc/uniphier-sd.c	/^static bool uniphier_sd_addr_is_dmaable(unsigned long addr)$/;"	f	typeref:typename:bool	file:
uniphier_sd_bind	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sd_check_error	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_check_error(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sd_dma_start	drivers/mmc/uniphier-sd.c	/^static void uniphier_sd_dma_start(struct uniphier_sd_priv *priv,$/;"	f	typeref:typename:void	file:
uniphier_sd_dma_wait_for_irq	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag,$/;"	f	typeref:typename:int	file:
uniphier_sd_dma_xfer	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_dma_xfer(struct udevice *dev, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
uniphier_sd_get_cd	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_get_cd(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sd_host_init	drivers/mmc/uniphier-sd.c	/^static void uniphier_sd_host_init(struct uniphier_sd_priv *priv)$/;"	f	typeref:typename:void	file:
uniphier_sd_match	drivers/mmc/uniphier-sd.c	/^static const struct udevice_id uniphier_sd_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_sd_ops	drivers/mmc/uniphier-sd.c	/^static const struct dm_mmc_ops uniphier_sd_ops = {$/;"	v	typeref:typename:const struct dm_mmc_ops	file:
uniphier_sd_pio_read_one_block	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf,$/;"	f	typeref:typename:int	file:
uniphier_sd_pio_write_one_block	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_pio_write_one_block(struct udevice *dev,$/;"	f	typeref:typename:int	file:
uniphier_sd_pio_xfer	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_pio_xfer(struct udevice *dev, struct mmc_data *data)$/;"	f	typeref:typename:int	file:
uniphier_sd_plat	drivers/mmc/uniphier-sd.c	/^struct uniphier_sd_plat {$/;"	s	file:
uniphier_sd_priv	drivers/mmc/uniphier-sd.c	/^struct uniphier_sd_priv {$/;"	s	file:
uniphier_sd_probe	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sd_send_cmd	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,$/;"	f	typeref:typename:int	file:
uniphier_sd_set_bus_width	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv,$/;"	f	typeref:typename:int	file:
uniphier_sd_set_clk_rate	drivers/mmc/uniphier-sd.c	/^static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv,$/;"	f	typeref:typename:void	file:
uniphier_sd_set_ddr_mode	drivers/mmc/uniphier-sd.c	/^static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv,$/;"	f	typeref:typename:void	file:
uniphier_sd_set_ios	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_set_ios(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sd_wait_for_irq	drivers/mmc/uniphier-sd.c	/^static int uniphier_sd_wait_for_irq(struct udevice *dev, unsigned int reg,$/;"	f	typeref:typename:int	file:
uniphier_serial	drivers/serial/serial_uniphier.c	/^struct uniphier_serial {$/;"	s	file:
uniphier_serial_getc	drivers/serial/serial_uniphier.c	/^static int uniphier_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_serial_ops	drivers/serial/serial_uniphier.c	/^static const struct dm_serial_ops uniphier_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
uniphier_serial_pending	drivers/serial/serial_uniphier.c	/^static int uniphier_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
uniphier_serial_port	drivers/serial/serial_uniphier.c	/^#define uniphier_serial_port(/;"	d	file:
uniphier_serial_private_data	drivers/serial/serial_uniphier.c	/^struct uniphier_serial_private_data {$/;"	s	file:
uniphier_serial_probe	drivers/serial/serial_uniphier.c	/^static int uniphier_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_serial_putc	drivers/serial/serial_uniphier.c	/^static int uniphier_serial_putc(struct udevice *dev, const char c)$/;"	f	typeref:typename:int	file:
uniphier_serial_setbrg	drivers/serial/serial_uniphier.c	/^static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int	file:
uniphier_set_fdt_file	arch/arm/mach-uniphier/board_late_init.c	/^static int uniphier_set_fdt_file(void)$/;"	f	typeref:typename:int	file:
uniphier_setup_xirq	arch/arm/mach-uniphier/board_init.c	/^static void uniphier_setup_xirq(void)$/;"	f	typeref:typename:void	file:
uniphier_sld3_bcu_init	arch/arm/mach-uniphier/bcu/bcu-sld3.c	/^int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sld3_boot_device	arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c	/^u32 uniphier_sld3_boot_device(void)$/;"	f	typeref:typename:u32
uniphier_sld3_boot_mode_show	arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c	/^void uniphier_sld3_boot_mode_show(void)$/;"	f	typeref:typename:void
uniphier_sld3_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_sld3_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_sld3_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c	/^unsigned int uniphier_sld3_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_sld3_dpll_init	arch/arm/mach-uniphier/clk/dpll-sld3.c	/^int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sld3_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const char * const uniphier_sld3_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_sld3_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const struct uniphier_pinctrl_group uniphier_sld3_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_sld3_init	arch/arm/mach-uniphier/init/init-sld3.c	/^int uniphier_sld3_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sld3_memconf_init	arch/arm/mach-uniphier/memconf/memconf-sld3.c	/^int uniphier_sld3_memconf_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sld3_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const struct udevice_id uniphier_sld3_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_sld3_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static int uniphier_sld3_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sld3_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static struct uniphier_pinctrl_socdata uniphier_sld3_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_sld3_pll_init	arch/arm/mach-uniphier/clk/pll-sld3.c	/^void uniphier_sld3_pll_init(void)$/;"	f	typeref:typename:void
uniphier_sld3_sys_reset_data	drivers/reset/reset-uniphier.c	/^const struct uniphier_reset_data uniphier_sld3_sys_reset_data[] = {$/;"	v	typeref:typename:const struct uniphier_reset_data[]
uniphier_sld8_data	arch/arm/mach-uniphier/boards.c	/^static const struct uniphier_board_data uniphier_sld8_data = {$/;"	v	typeref:typename:const struct uniphier_board_data	file:
uniphier_sld8_debug_uart_init	arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c	/^unsigned int uniphier_sld8_debug_uart_init(void)$/;"	f	typeref:typename:unsigned int
uniphier_sld8_dpll_init	arch/arm/mach-uniphier/clk/dpll-sld8.c	/^int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sld8_functions	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const char * const uniphier_sld8_functions[] = {$/;"	v	typeref:typename:const char * const[]	file:
uniphier_sld8_groups	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_group[]	file:
uniphier_sld8_init	arch/arm/mach-uniphier/init/init-sld8.c	/^int uniphier_sld8_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_sld8_phy_param	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static const struct phy_param uniphier_sld8_phy_param[] = {$/;"	v	typeref:typename:const struct phy_param[]	file:
uniphier_sld8_pinctrl_match	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const struct udevice_id uniphier_sld8_pinctrl_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniphier_sld8_pinctrl_probe	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static int uniphier_sld8_pinctrl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
uniphier_sld8_pinctrl_socdata	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static struct uniphier_pinctrl_socdata uniphier_sld8_pinctrl_socdata = {$/;"	v	typeref:struct:uniphier_pinctrl_socdata	file:
uniphier_sld8_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const struct uniphier_pinctrl_pin uniphier_sld8_pins[] = {$/;"	v	typeref:typename:const struct uniphier_pinctrl_pin[]	file:
uniphier_sld8_umc_init	arch/arm/mach-uniphier/dram/umc-sld8.c	/^int uniphier_sld8_umc_init(const struct uniphier_board_data *bd)$/;"	f	typeref:typename:int
uniphier_smp_booted	arch/arm/mach-uniphier/arm32/psci.c	/^u32 uniphier_smp_booted[CONFIG_ARMV7_PSCI_NR_CPUS];$/;"	v	typeref:typename:u32[]
uniphier_smp_kick_all_cpus	arch/arm/mach-uniphier/arm32/psci.c	/^static void uniphier_smp_kick_all_cpus(void)$/;"	f	typeref:typename:void	file:
uniphier_smp_kick_all_cpus	arch/arm/mach-uniphier/arm64/smp_kick_cpus.c	/^void uniphier_smp_kick_all_cpus(void)$/;"	f	typeref:typename:void
uniphier_smp_trampoline_end	arch/arm/mach-uniphier/arm32/psci_smp.S	/^uniphier_smp_trampoline_end:$/;"	l
uniphier_soc_id	arch/arm/mach-uniphier/soc-info.h	/^enum uniphier_soc_id {$/;"	g
uniphier_uart_of_match	drivers/serial/serial_uniphier.c	/^static const struct udevice_id uniphier_uart_of_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
uniq	scripts/get_maintainer.pl	/^sub uniq {$/;"	s
unique_id	include/ext_common.h	/^	__le32 unique_id[4];$/;"	m	struct:ext2_sblock	typeref:typename:__le32[4]
unique_mbr_signature	include/part_efi.h	/^	__le32 unique_mbr_signature;$/;"	m	struct:_legacy_mbr	typeref:typename:__le32
unique_partition_guid	include/part_efi.h	/^	efi_guid_t unique_partition_guid;$/;"	m	struct:_gpt_entry	typeref:typename:efi_guid_t
unit_attention_data	drivers/usb/gadget/storage_common.c	/^	u32		unit_attention_data;$/;"	m	struct:fsg_lun	typeref:typename:u32	file:
unit_base_reg	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u32 unit_base_reg;$/;"	m	struct:op_params	typeref:typename:u32
unit_div	post/board/lwmon5/sysmon.c	/^	int		unit_div;$/;"	m	struct:sysmon_table_s	typeref:typename:int	file:
unit_id	arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h	/^enum unit_id {$/;"	g
unit_max	post/board/lwmon5/sysmon.c	/^	int		unit_max;$/;"	m	struct:sysmon_table_s	typeref:typename:int	file:
unit_min	post/board/lwmon5/sysmon.c	/^	int		unit_min;$/;"	m	struct:sysmon_table_s	typeref:typename:int	file:
unit_name	post/board/lwmon5/sysmon.c	/^	char		*unit_name;$/;"	m	struct:sysmon_table_s	typeref:typename:char *	file:
unit_offset	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u32 unit_offset;$/;"	m	struct:op_params	typeref:typename:u32
unit_precision	post/board/lwmon5/sysmon.c	/^	int		unit_precision;$/;"	m	struct:sysmon_table_s	typeref:typename:int	file:
unit_test	include/test/test.h	/^struct unit_test {$/;"	s
unit_test_state	include/test/test.h	/^struct unit_test_state {$/;"	s
unit_win_info	drivers/ddr/marvell/a38x/xor.h	/^struct unit_win_info {$/;"	s
universe_init	cmd/universe.c	/^int universe_init(void)$/;"	f	typeref:typename:int
universe_pci_slave_window	cmd/universe.c	/^int universe_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, int size, int vam, int/;"	f	typeref:typename:int
universe_vme_slave_window	cmd/universe.c	/^int universe_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int size, int vam, int/;"	f	typeref:typename:int
unk1	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 unk1;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
unk1	arch/arm/include/asm/arch/display2.h	/^	u32 unk1;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
unk2	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 unk2;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
unk2	arch/arm/include/asm/arch/display2.h	/^	u32 unk2;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
unk3	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 unk3;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
unk3	arch/arm/include/asm/arch/display2.h	/^	u32 unk3;$/;"	m	struct:sunxi_phy_hdmi_reg	typeref:typename:u32
unknown	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 unknown;			\/* 0x300 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
unknown	arch/arm/include/asm/arch/display.h	/^	u32 unknown;			\/* 0x300 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
unknown	cmd/ambapp.c	/^static char *unknown = "unknown";$/;"	v	typeref:typename:char *	file:
unknown	cmd/i2c.c	/^	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;$/;"	e	enum:do_sdram::__anon1d2f36170203	file:
unknown	include/linux/edd.h	/^		} __attribute__ ((packed)) unknown;$/;"	m	union:edd_device_params::__anon8a8b619a010a	typeref:struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0708
unknown	include/linux/edd.h	/^		} __attribute__ ((packed)) unknown;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a1208
unknown	include/part_efi.h	/^	__le16 unknown;$/;"	m	struct:_legacy_mbr	typeref:typename:__le16
unknown0	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 unknown0;			\/* 0x018 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
unknown0	arch/arm/include/asm/arch/display.h	/^	u32 unknown0;			\/* 0x018 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
unknown0	arch/arm/mach-bcm283x/include/mach/wdog.h	/^	u32 unknown0[7];$/;"	m	struct:bcm2835_wdog_regs	typeref:typename:u32[7]
unknown1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 unknown1;			\/* 0x024, seems to be 1 byte per dac *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
unknown1	arch/arm/include/asm/arch/display.h	/^	u32 unknown1;			\/* 0x024, seems to be 1 byte per dac *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
unknown1	arch/arm/mach-bcm283x/include/mach/wdog.h	/^	u32 unknown1;$/;"	m	struct:bcm2835_wdog_regs	typeref:typename:u32
unknown2	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 unknown2;			\/* 0x118 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
unknown2	arch/arm/include/asm/arch/display.h	/^	u32 unknown2;			\/* 0x118 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
unknown_1	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_1[8];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[8]
unknown_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_1[9];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[9]
unknown_10	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_10;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_10	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_10[130];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[130]
unknown_10_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_10_1[8];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[8]
unknown_11	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_11[33];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[33]
unknown_11	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_11[116];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[116]
unknown_12	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_12;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_12	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_12[42];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[42]
unknown_13	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_13;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_13	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_13[62];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[62]
unknown_13_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_13_1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_14	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_14;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_14	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_14;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_14_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_14_1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_14_2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_14_2[3];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[3]
unknown_15	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_15;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_15	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_15[10];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[10]
unknown_16	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_16[45];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[45]
unknown_16	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_16[3];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[3]
unknown_17	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_17[36];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[36]
unknown_17	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_17[12];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[12]
unknown_17_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_17_1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_17_2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_17_2;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_18	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_18[538];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[538]
unknown_18	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_18;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_18_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_18_1;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_18_1_2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_18_1_2[4];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[4]
unknown_18_2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_18_2;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_18_3	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_18_3;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_19	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_19[342];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[342]
unknown_2	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_2[16];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[16]
unknown_2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_2;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_20	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_20[48];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[48]
unknown_20_1	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_20_1[3];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[3]
unknown_20_2	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_20_2[2];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[2]
unknown_3	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_3[90];$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32[90]
unknown_3	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_3;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_4	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_4;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_4	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_4[9];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[9]
unknown_5	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_5;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_5	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_5[2];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[2]
unknown_6	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_6;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_6	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_6;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
unknown_7	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_7;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_7	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_7[2];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[2]
unknown_8	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_8;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_8	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_8[53];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[53]
unknown_9	arch/arm/include/asm/arch-hi6220/hi6220.h	/^	u32 unknown_9;$/;"	m	struct:peri_sc_periph_regs	typeref:typename:u32
unknown_9	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 unknown_9[6];$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32[6]
unknown_exception	arch/avr32/cpu/start.S	/^unknown_exception:$/;"	l
unknown_msg	common/image.c	/^static const char *unknown_msg(enum ih_category category)$/;"	f	typeref:typename:const char *	file:
unlikely	include/compiler.h	/^#define unlikely(/;"	d
unlikely	include/linux/compiler.h	/^#  define unlikely(/;"	d
unlikely	include/linux/compiler.h	/^# define unlikely(/;"	d
unlikely	post/lib_powerpc/fpu/darwin-ldouble.c	/^#define unlikely(/;"	d	file:
unlikely_notrace	include/linux/compiler.h	/^#define unlikely_notrace(/;"	d
unlink	common/dlmalloc.c	/^#define unlink(/;"	d	file:
unlink_allowed	fs/yaffs2/yaffs_guts.h	/^	u8 unlink_allowed:1;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8:1
unlink_allowed	fs/yaffs2/yaffs_guts.h	/^	u8 unlink_allowed:1;$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
unlink_filename	fs/ext4/ext4_common.c	/^static int unlink_filename(char *filename, unsigned int blknr)$/;"	f	typeref:typename:int	file:
unlinked	fs/yaffs2/yaffs_guts.h	/^	u8 unlinked:1;		\/* An unlinked file.*\/$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
unlinked	fs/yaffs2/yaffs_guts.h	/^	u8 unlinked:1;$/;"	m	struct:yaffs_checkpt_obj	typeref:typename:u8:1
unlinked_deletion	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *unlinked_deletion;	\/* Current file being$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_obj *
unlinked_dir	fs/yaffs2/yaffs_guts.h	/^	struct yaffs_obj *unlinked_dir;	\/* Directory where unlinked and deleted$/;"	m	struct:yaffs_dev	typeref:struct:yaffs_obj *
unload	drivers/usb/eth/r8152.h	/^		void (*unload)(struct r8152 *);$/;"	m	struct:r8152::rtl_ops	typeref:typename:void (*)(struct r8152 *)
unload	include/efi_api.h	/^	unsigned long unload;$/;"	m	struct:efi_loaded_image	typeref:typename:unsigned long
unlock	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 unlock; \/* 0x34 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
unlock_addr	drivers/mtd/jedec_flash.c	/^struct unlock_addr {$/;"	s	file:
unlock_addrs	drivers/mtd/jedec_flash.c	/^static const struct unlock_addr  unlock_addrs[] = {$/;"	v	typeref:typename:const struct unlock_addr[]	file:
unlock_all	include/linux/mtd/onenand.h	/^	void (*unlock_all)(struct mtd_info *mtd);$/;"	m	struct:onenand_chip	typeref:typename:void (*)(struct mtd_info * mtd)
unlock_descriptor	tools/ifdtool.c	/^static void unlock_descriptor(char *image, int size)$/;"	f	typeref:typename:void	file:
unlock_flash	board/bf533-ezkit/flash.c	/^void unlock_flash(long ulOffset)$/;"	f	typeref:typename:void
unlock_new_inode	fs/ubifs/super.c	/^void unlock_new_inode(struct inode *inode)$/;"	f	typeref:typename:void
unlock_pll_control_mmr	arch/arm/cpu/armv7/am33xx/clock_ti814x.c	/^static void unlock_pll_control_mmr(void)$/;"	f	typeref:typename:void	file:
unlock_ram_in_cache	arch/powerpc/cpu/mpc83xx/start.S	/^unlock_ram_in_cache:$/;"	l
unlock_ram_in_cache	arch/powerpc/cpu/mpc85xx/start.S	/^unlock_ram_in_cache:$/;"	l
unlock_ram_in_cache	arch/powerpc/cpu/mpc86xx/start.S	/^unlock_ram_in_cache:$/;"	l
unlock_reg	include/sh_pfc.h	/^	unsigned long unlock_reg;$/;"	m	struct:pinmux_info	typeref:typename:unsigned long
unlockend_blkaddr	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockend_blkaddr;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockend_blkaddr1	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockend_blkaddr1;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockend_blkaddr2	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockend_blkaddr2;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockend_blkaddr3	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockend_blkaddr3;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockstart_blkaddr	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockstart_blkaddr;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockstart_blkaddr1	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockstart_blkaddr1;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockstart_blkaddr2	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockstart_blkaddr2;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unlockstart_blkaddr3	drivers/mtd/nand/mxc_nand.h	/^	u16 unlockstart_blkaddr3;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
unmanaged_buffer_allocs	fs/yaffs2/yaffs_guts.h	/^	int unmanaged_buffer_allocs;$/;"	m	struct:yaffs_dev	typeref:typename:int
unmanaged_buffer_deallocs	fs/yaffs2/yaffs_guts.h	/^	int unmanaged_buffer_deallocs;$/;"	m	struct:yaffs_dev	typeref:typename:int
unmap	fs/ubifs/ubifs.h	/^	int unmap;$/;"	m	struct:ubifs_gced_idx_leb	typeref:typename:int
unmap_dma_buffer	drivers/usb/musb-new/musb_gadget.c	/^static inline void unmap_dma_buffer(struct musb_request *request,$/;"	f	typeref:typename:void	file:
unmap_peb	drivers/mtd/ubi/fastmap.c	/^static void unmap_peb(struct ubi_attach_info *ai, int pnum)$/;"	f	typeref:typename:void	file:
unmap_physmem	arch/arc/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/arm/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/avr32/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long len)$/;"	f	typeref:typename:void
unmap_physmem	arch/blackfin/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/m68k/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/microblaze/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/mips/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/nds32/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/nios2/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/openrisc/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/powerpc/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/sandbox/cpu/cpu.c	/^void unmap_physmem(const void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/sh/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/sparc/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/x86/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	arch/xtensa/include/asm/io.h	/^static inline void unmap_physmem(void *vaddr, unsigned long flags)$/;"	f	typeref:typename:void
unmap_physmem	include/pci.h	/^	int (*unmap_physmem)(struct udevice *dev, const void *vaddr,$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev,const void * vaddr,unsigned long len)
unmap_sysmem	arch/sandbox/include/asm/io.h	/^static inline void unmap_sysmem(const void *vaddr)$/;"	f	typeref:typename:void
unmap_sysmem	include/mapmem.h	/^static inline void unmap_sysmem(const void *vaddr)$/;"	f	typeref:typename:void
unmask_irq	arch/x86/lib/i8259.c	/^void unmask_irq(int irq)$/;"	f	typeref:typename:void
unmount_mode	fs/ubifs/ubifs.h	/^	unsigned int unmount_mode:2;$/;"	m	struct:ubifs_mount_opts	typeref:typename:unsigned int:2
unpack_byte_string	lib/tpm.c	/^int unpack_byte_string(const uint8_t *str, size_t size, const char *format, ...)$/;"	f	typeref:typename:int
unpack_fifo	drivers/usb/host/isp116x-hcd.c	/^static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,$/;"	f	typeref:typename:int	file:
unpack_lsave	fs/ubifs/lpt.c	/^static int unpack_lsave(const struct ubifs_info *c, void *buf)$/;"	f	typeref:typename:int	file:
unpack_ltab	fs/ubifs/lpt.c	/^static int unpack_ltab(const struct ubifs_info *c, void *buf)$/;"	f	typeref:typename:int	file:
unpack_pnode	fs/ubifs/lpt.c	/^static int unpack_pnode(const struct ubifs_info *c, void *buf,$/;"	f	typeref:typename:int	file:
unprepare	arch/arm/mach-tegra/xusb-padctl-common.h	/^	int (*unprepare)(struct tegra_xusb_phy *phy);$/;"	m	struct:tegra_xusb_phy_ops	typeref:typename:int (*)(struct tegra_xusb_phy * phy)
unput	scripts/kconfig/zconf.lex.c	/^#define unput(/;"	d	file:
unreachable	include/linux/compiler-gcc.h	/^#define unreachable(/;"	d
unreachable	include/linux/compiler.h	/^# define unreachable(/;"	d
unregister_chrdev_region	include/linux/compat.h	/^#define unregister_chrdev_region(/;"	d
unregister_mtd_user	drivers/mtd/mtdcore.c	/^int unregister_mtd_user (struct mtd_notifier *old)$/;"	f	typeref:typename:int
unregister_pinmux	drivers/gpio/sh_pfc.c	/^int unregister_pinmux(struct pinmux_info *pip)$/;"	f	typeref:typename:int
unreserve	arch/blackfin/cpu/gpio.c	/^#define unreserve(/;"	d	file:
unreserve	drivers/gpio/adi_gpio2.c	/^#define unreserve(/;"	d	file:
unseqToSeq	lib/bzip2/bzlib_private.h	/^      UChar    unseqToSeq[256];$/;"	m	struct:__anon93cbeec40108	typeref:typename:UChar[256]
unset_local_var	common/cli_hush.c	/^void unset_local_var(const char *name)$/;"	f	typeref:typename:void
unset_user_value	tools/buildman/kconfiglib.py	/^    def unset_user_value(self):$/;"	m	class:Symbol
unset_user_values	tools/buildman/kconfiglib.py	/^    def unset_user_values(self):$/;"	m	class:Config
unset_var	test/py/tests/test_env.py	/^def unset_var(state_test_env, var):$/;"	f
untochar	cmd/load.c	/^#define untochar(/;"	d	file:
untracked_count	lib/trace.c	/^	u64 untracked_count;	\/* Total number of untracked function calls *\/$/;"	m	struct:trace_hdr	typeref:typename:u64	file:
unused	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 unused[12];$/;"	m	struct:weim	typeref:typename:u32[12]
unused	arch/arm/include/asm/arch-omap3/dss.h	/^	u8 unused[16];				\/* 0x90 *\/$/;"	m	struct:dispc_regs	typeref:typename:u8[16]
unused	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t unused;$/;"	m	struct:cmd_clk_round_rate_request	typeref:typename:int32_t
unused	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	int32_t unused;$/;"	m	struct:cmd_clk_set_rate_request	typeref:typename:int32_t
unused	arch/arm/include/asm/setup.h	/^	char unused[256];$/;"	m	union:param_struct::__anon61e8c52b010a	typeref:typename:char[256]
unused	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 unused[3];$/;"	m	struct:ed	typeref:typename:__u32[3]
unused	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u8 unused;$/;"	m	struct:td	typeref:typename:__u8
unused	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 unused[3];$/;"	m	struct:ed	typeref:typename:__u32[3]
unused	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u8 unused;$/;"	m	struct:td	typeref:typename:__u8
unused	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 unused[3];$/;"	m	struct:ed	typeref:typename:__u32[3]
unused	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u8 unused;$/;"	m	struct:td	typeref:typename:__u8
unused	arch/sparc/cpu/leon3/memcfg.h	/^	char		unused[2];	\/* 0x02 *\/$/;"	m	struct:grlib_mctrl_handler	typeref:typename:char[2]
unused	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t unused[16];			\/* Offset 0x0010 *\/$/;"	m	struct:vpd_region	typeref:typename:uint8_t[16]
unused	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u8	unused[16];		\/* Offset 0x0010 *\/$/;"	m	struct:vpd_region	typeref:typename:u8[16]
unused	arch/x86/include/asm/sipi.h	/^	u16 unused;$/;"	m	struct:sipi_params_16bit	typeref:typename:u16
unused	disk/part_iso.h	/^	unsigned char unused;$/;"	m	struct:iso_part_rec	typeref:typename:unsigned char
unused	disk/part_iso.h	/^	unsigned char unused;$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char
unused	disk/part_iso.h	/^	unsigned char unused[0x20];		\/* unused *\/$/;"	m	struct:iso_boot_rec	typeref:typename:unsigned char[0x20]
unused	drivers/ddr/microchip/ddr2_regs.h	/^	u32 unused[11];$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32[11]
unused	drivers/pinctrl/pinctrl_pic32.c	/^	struct pic32_reg_atomic unused[8];$/;"	m	struct:pic32_reg_port	typeref:struct:pic32_reg_atomic[8]	file:
unused	drivers/usb/host/ehci.h	/^	uint32_t unused[3];$/;"	m	struct:qTD	typeref:typename:uint32_t[3]
unused	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 unused[3];$/;"	m	struct:ed	typeref:typename:__u32[3]
unused	drivers/usb/host/ohci-s3c24xx.h	/^	__u8 unused;$/;"	m	struct:td	typeref:typename:__u8
unused	drivers/usb/host/ohci.h	/^	__u32 unused[2];$/;"	m	struct:ed	typeref:typename:__u32[2]
unused	drivers/usb/host/ohci.h	/^	__u8 unused;$/;"	m	struct:td	typeref:typename:__u8
unused	include/ambapp.h	/^	const unsigned int	unused[4];$/;"	m	struct:ambapp_pnp_info	typeref:typename:const unsigned int[4]
unused	include/android_image.h	/^	u32 unused[2];		\/* future expansion: should be 0 *\/$/;"	m	struct:andr_img_hdr	typeref:typename:u32[2]
unused	include/efi_api.h	/^	u8 unused[52];$/;"	m	struct:efi_pxe_mode	typeref:typename:u8[52]
unused	include/grlib/gptimer.h	/^	volatile unsigned int unused;$/;"	m	struct:__anon98dc47250108	typeref:typename:volatile unsigned int
unused	include/grlib/gptimer.h	/^	volatile unsigned int unused;$/;"	m	struct:__anon98dc47250208	typeref:typename:volatile unsigned int
unused	include/jffs2/jffs2.h	/^	__u8 unused[2];$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u8[2]
unused	include/linux/compat.h	/^struct unused {};$/;"	s
unused	include/net.h	/^			u16	unused;$/;"	m	struct:icmp_hdr::__anona5cac555010a::__anona5cac5550308	typeref:typename:u16
unused	include/sja1000.h	/^	u8 unused;$/;"	m	struct:sja1000_basic_s	typeref:typename:u8
unused	net/net.c	/^	u16 unused;$/;"	m	struct:hole	typeref:typename:u16	file:
unused	tools/omapimage.h	/^	uint8_t unused[12];$/;"	m	struct:ch_toc	typeref:typename:uint8_t[12]
unused0	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused0;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused1	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 unused1;$/;"	m	struct:iomuxc_regs	typeref:typename:u32
unused1	disk/part_amiga.h	/^    u32 unused1;$/;"	m	struct:amiga_part_geometry	typeref:typename:u32
unused1	drivers/ddr/microchip/ddr2_regs.h	/^	u32 unused1[2];$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32[2]
unused1	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused1;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused2	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 unused2;$/;"	m	struct:iomuxc_regs	typeref:typename:u32
unused2	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	__u32 unused2[2];$/;"	m	struct:td	typeref:typename:__u32[2]
unused2	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	__u32 unused2[2];$/;"	m	struct:td	typeref:typename:__u32[2]
unused2	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	__u32 unused2[2];$/;"	m	struct:td	typeref:typename:__u32[2]
unused2	drivers/ddr/microchip/ddr2_regs.h	/^	u32 unused2[2];$/;"	m	struct:ddr2_phy_regs	typeref:typename:u32[2]
unused2	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused2;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused2	drivers/usb/host/ohci-s3c24xx.h	/^	__u32 unused2[2];$/;"	m	struct:td	typeref:typename:__u32[2]
unused2	drivers/usb/host/ohci.h	/^	__u32 unused2[2];$/;"	m	struct:td	typeref:typename:__u32[2]
unused2	include/linux/screen_info.h	/^	__u8  unused2;		\/* 0x09 *\/$/;"	m	struct:screen_info	typeref:typename:__u8
unused3	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused3;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused3	include/linux/screen_info.h	/^	__u16 unused3;		\/* 0x0c *\/$/;"	m	struct:screen_info	typeref:typename:__u16
unused4	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused4;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused5	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused5;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused6	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused6;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused7	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused7;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused8	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused8;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused9	drivers/pinctrl/pinctrl_pic32.c	/^	u32 unused9;$/;"	m	struct:pic32_reg_in_mux	typeref:typename:u32	file:
unused_000	drivers/pci/pci_gt64120.c	/^	u8	unused_000[0xc18];$/;"	m	struct:gt64120_regs	typeref:typename:u8[0xc18]	file:
unused_004	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_004[(0x070 - 0x004) \/ 4];	\/* 0x004 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t[]	file:
unused_070	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_070[(0x090 - 0x074) \/ 4];	\/* 0x074 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t[]	file:
unused_094	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_094;				\/* 0x094 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
unused_09c	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_09c;				\/* 0x09c *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
unused_0a4	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_0a4;				\/* 0x0a4 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
unused_0ac	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_0ac[(0x0dc - 0x0ac) \/ 4];	\/* 0x0ac *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t[]	file:
unused_0e0	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_0e0[(0x11c - 0x0e0) \/ 4];	\/* 0x0e0 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t[]	file:
unused_1008	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_1008[(0x1100 - 0x1008) \/ 4];	\/* 0x1008 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t[]	file:
unused_110c	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_110c;				\/* 0x110c *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
unused_1124	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_1124;				\/* 0x1124 *\/$/;"	m	struct:eqos_dma_regs	typeref:typename:uint32_t	file:
unused_128	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_128[(0x200 - 0x128) \/ 4];	\/* 0x128 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t[]	file:
unused_208	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_208[(0x300 - 0x208) \/ 4];	\/* 0x208 *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t[]	file:
unused_8808	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_8808;				\/* 0x8808 *\/$/;"	m	struct:eqos_tegra186_regs	typeref:typename:uint32_t	file:
unused_c1c	drivers/pci/pci_gt64120.c	/^	u8	unused_c1c[0x0dc];$/;"	m	struct:gt64120_regs	typeref:typename:u8[0x0dc]	file:
unused_d04	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_d04;				\/* 0xd04 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
unused_d0c	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_d0c[(0xd18 - 0xd0c) \/ 4];	\/* 0xd0c *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t[]	file:
unused_d1c	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_d1c[(0xd30 - 0xd1c) \/ 4];	\/* 0xd1c *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t[]	file:
unused_d34	drivers/net/dwc_eth_qos.c	/^	uint32_t unused_d34;				\/* 0xd34 *\/$/;"	m	struct:eqos_mtl_regs	typeref:typename:uint32_t	file:
unused_pins_lowpower	board/avionic-design/common/pinmux-config-tamonten-ng.h	/^static struct pmux_pingrp_config unused_pins_lowpower[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
unused_pins_lowpower	board/nvidia/cardhu/pinmux-config-cardhu.h	/^static struct pmux_pingrp_config unused_pins_lowpower[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
unused_pins_lowpower	board/nvidia/dalmore/pinmux-config-dalmore.h	/^static struct pmux_pingrp_config unused_pins_lowpower[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
unused_pins_lowpower	board/toradex/apalis_t30/pinmux-config-apalis_t30.h	/^static struct pmux_pingrp_config unused_pins_lowpower[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
unused_pins_lowpower	board/toradex/colibri_t30/pinmux-config-colibri_t30.h	/^static struct pmux_pingrp_config unused_pins_lowpower[] = {$/;"	v	typeref:struct:pmux_pingrp_config[]
unused_stuff	fs/yaffs2/yaffs_packedtags1.h	/^	unsigned unused_stuff:1;$/;"	m	struct:yaffs_packed_tags1	typeref:typename:unsigned:1
unused_t	include/linux/compat.h	/^typedef struct unused unused_t;$/;"	t	typeref:struct:unused
unused_upd_space1	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint8_t unused_upd_space1[155];		\/* Offset 0x0055 *\/$/;"	m	struct:upd_region	typeref:typename:uint8_t[155]
unzftab	lib/bzip2/bzlib_private.h	/^      Int32    unzftab[256];$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32[256]
uoc0_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 uoc0_con[5];$/;"	m	struct:rk3288_grf	typeref:typename:u32[5]
uoc0_con5	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int uoc0_con5;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
uoc1_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 uoc1_con[5];$/;"	m	struct:rk3288_grf	typeref:typename:u32[5]
uoc1_con4	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int uoc1_con4;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
uoc1_con5	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int uoc1_con5;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
uoc2_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 uoc2_con[4];$/;"	m	struct:rk3288_grf	typeref:typename:u32[4]
uoc3_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 uoc3_con[2];$/;"	m	struct:rk3288_grf	typeref:typename:u32[2]
uoc4_con	arch/arm/include/asm/arch-rockchip/grf_rk3288.h	/^	u32 uoc4_con[2];$/;"	m	struct:rk3288_grf	typeref:typename:u32[2]
uoc_con6	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int uoc_con6;$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int
uocsr	arch/m68k/include/asm/immap_5227x.h	/^	u16 uocsr;		\/* USB On-the-Go Controller Status *\/$/;"	m	struct:ccm	typeref:typename:u16
uocsr	arch/m68k/include/asm/immap_5301x.h	/^	u16 uocsr;		\/* 0x12 USB On-the-Go Status *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
uocsr	arch/m68k/include/asm/immap_5329.h	/^	u16 uocsr;		\/* 0x12 USB On-the-Go Controller Status Reg *\/$/;"	m	struct:ccm_ctrl	typeref:typename:u16
uocsr	arch/m68k/include/asm/immap_5441x.h	/^	u16 uocsr;		\/* 0x14 USB On-the-Go Controller Status *\/$/;"	m	struct:ccm	typeref:typename:u16
uocsr	arch/m68k/include/asm/immap_5445x.h	/^	u16 uocsr;		\/* USB On-the-Go Controller Status Register *\/$/;"	m	struct:ccm	typeref:typename:u16
uop0	arch/m68k/include/asm/uart.h	/^	u8 uop0;		\/* 0x3c Output Port Reset Register *\/$/;"	m	struct:uart	typeref:typename:u8
uop1	arch/m68k/include/asm/uart.h	/^	u8 uop1;		\/* 0x38 Output Port Set Register *\/$/;"	m	struct:uart	typeref:typename:u8
uordblks	include/malloc.h	/^  int uordblks; \/* total allocated space *\/$/;"	m	struct:mallinfo	typeref:typename:int
up	drivers/usb/eth/r8152.h	/^		void (*up)(struct r8152 *);$/;"	m	struct:r8152::rtl_ops	typeref:typename:void (*)(struct r8152 *)
up	include/fsl-mc/fsl_dpmac.h	/^	int		up;$/;"	m	struct:dpmac_link_state	typeref:typename:int
up	include/fsl-mc/fsl_dpni.h	/^	int up;$/;"	m	struct:dpni_link_state	typeref:typename:int
up_read	include/linux/compat.h	/^#define up_read(/;"	d
up_write	include/linux/compat.h	/^#define up_write(/;"	d
upc	include/linux/immap_qe.h	/^typedef struct upc {$/;"	s
upc1	include/linux/immap_qe.h	/^	upc_t upc1;		\/* MultiPHY UTOPIA POS Controller 1 *\/$/;"	m	struct:qe_immap	typeref:typename:upc_t
upc2	include/linux/immap_qe.h	/^	upc_t upc2;		\/* MultiPHY UTOPIA POS Controller 2 *\/$/;"	m	struct:qe_immap	typeref:typename:upc_t
upc_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) upc_t;$/;"	t	typeref:struct:upc
upctl	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 upctl;	\/* USB PLL Control *\/$/;"	m	struct:ccm_regs	typeref:typename:u32
upctl	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 upctl;$/;"	m	struct:clock_control_regs	typeref:typename:u32
upd0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 upd0;		\/* 0x1a0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 upd0;		\/* 0x1a0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 upd1;		\/* 0x1a4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 upd1;		\/* 0x1a4 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 upd2;		\/* 0x1a8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd2	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 upd2;		\/* 0x888 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 upd2;		\/* 0x1a8 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd2	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 upd2;		\/* 0x888 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd3	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 upd3;		\/* 0x1ac *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd3	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 upd3;		\/* 0x1ac *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
upd_buf	drivers/mtd/ubi/ubi.h	/^	void *upd_buf;$/;"	m	struct:ubi_volume	typeref:typename:void *
upd_bytes	drivers/mtd/ubi/ubi.h	/^	long long upd_bytes;$/;"	m	struct:ubi_volume	typeref:typename:long long
upd_data	arch/x86/include/asm/fsp/fsp_api.h	/^	void	*upd_data;	\/* User platform configuraiton data region *\/$/;"	m	struct:common_buf	typeref:typename:void *
upd_ebs	drivers/mtd/ubi/ubi.h	/^	int upd_ebs;$/;"	m	struct:ubi_volume	typeref:typename:int
upd_ltab	fs/ubifs/lpt_commit.c	/^static void upd_ltab(struct ubifs_info *c, int lnum, int free, int dirty)$/;"	f	typeref:typename:void	file:
upd_marker	drivers/mtd/ubi/ubi-media.h	/^	__u8    upd_marker;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__u8
upd_marker	drivers/mtd/ubi/ubi.h	/^	unsigned int upd_marker:1;$/;"	m	struct:ubi_volume	typeref:typename:unsigned int:1
upd_marker	include/linux/mtd/ubi.h	/^	int upd_marker;$/;"	m	struct:ubi_volume_info	typeref:typename:int
upd_offset	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^	uint32_t upd_offset;			\/* Offset 0x000c *\/$/;"	m	struct:vpd_region	typeref:typename:uint32_t
upd_offset	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^	u32	upd_offset;		\/* Offset 0x000C *\/$/;"	m	struct:vpd_region	typeref:typename:u32
upd_plb_pci_div	board/esd/pmc405de/pmc405de.c	/^static void upd_plb_pci_div(u32 pllmr0, u32 pllmr1, u32 div)$/;"	f	typeref:typename:void	file:
upd_received	drivers/mtd/ubi/ubi.h	/^	long long upd_received;$/;"	m	struct:ubi_volume	typeref:typename:long long
upd_region	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^struct __packed upd_region {$/;"	s
upd_region	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^struct __packed upd_region {$/;"	s
update	drivers/ddr/altera/sequencer.h	/^	u32	update;$/;"	m	struct:socfpga_sdr_scc_mgr	typeref:typename:u32
update	include/eeprom_field.h	/^	int (*update)(struct eeprom_field *eeprom_field, char *value);$/;"	m	struct:eeprom_field	typeref:typename:int (*)(struct eeprom_field * eeprom_field,char * value)
update	include/eeprom_layout.h	/^	int (*update)(struct eeprom_layout *eeprom_layout, char *field_name,$/;"	m	struct:eeprom_layout	typeref:typename:int (*)(struct eeprom_layout * eeprom_layout,char * field_name,char * new_data)
update	post/lib_powerpc/load.c	/^    int update;$/;"	m	struct:cpu_post_load_s	typeref:typename:int	file:
update	post/lib_powerpc/store.c	/^    int update;$/;"	m	struct:cpu_post_store_s	typeref:typename:int	file:
update-po-config	scripts/kconfig/Makefile	/^update-po-config: $(obj)\/kxgettext $(obj)\/gconf.glade.h$/;"	t
updateAll	scripts/kconfig/qconf.h	/^	bool updateAll;$/;"	m	class:ConfigList	typeref:typename:bool
updateList	scripts/kconfig/qconf.cc	/^void ConfigList::updateList(ConfigItem* item)$/;"	f	class:ConfigList	typeref:typename:void
updateList	scripts/kconfig/qconf.cc	/^void ConfigView::updateList(ConfigItem* item)$/;"	f	class:ConfigView	typeref:typename:void
updateListAll	scripts/kconfig/qconf.cc	/^void ConfigView::updateListAll(void)$/;"	f	class:ConfigView	typeref:typename:void
updateListAll	scripts/kconfig/qconf.h	/^	void updateListAll(void)$/;"	f	class:ConfigList	typeref:typename:void
updateMenu	scripts/kconfig/qconf.cc	/^void ConfigItem::updateMenu(void)$/;"	f	class:ConfigItem	typeref:typename:void
updateMenuList	scripts/kconfig/qconf.cc	/^void ConfigList::updateMenuList(P* parent, struct menu* menu)$/;"	f	class:ConfigList	typeref:typename:void
updateSelection	scripts/kconfig/qconf.cc	/^void ConfigList::updateSelection(void)$/;"	f	class:ConfigList	typeref:typename:void
update_block_number	net/tftp.c	/^static void update_block_number(void)$/;"	f	typeref:typename:void	file:
update_capsule	include/efi_api.h	/^	void *update_capsule;$/;"	m	struct:efi_runtime_services	typeref:typename:void *
update_cats	fs/ubifs/lpt.c	/^static void update_cats(struct ubifs_info *c, struct ubifs_pnode *pnode)$/;"	f	typeref:typename:void	file:
update_commit_block	fs/ext4/ext4_journal.c	/^static void update_commit_block(long int blknr)$/;"	f	typeref:typename:void	file:
update_cr6	drivers/net/uli526x.c	/^static void update_cr6(u32 cr6_data, unsigned long ioaddr)$/;"	f	typeref:typename:void	file:
update_crc	board/freescale/common/sys_eeprom.c	/^static void update_crc(void)$/;"	f	typeref:typename:void	file:
update_crc	board/varisys/common/sys_eeprom.c	/^static void update_crc(void)$/;"	f	typeref:typename:void	file:
update_cross_compile	tools/moveconfig.py	/^def update_cross_compile(color_enabled):$/;"	f
update_defconfig	tools/moveconfig.py	/^    def update_defconfig(self):$/;"	m	class:Slot
update_delay_mechanism	arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c	/^static int update_delay_mechanism(u32 base)$/;"	f	typeref:typename:int	file:
update_descriptor_block	fs/ext4/ext4_journal.c	/^static void update_descriptor_block(long int blknr)$/;"	f	typeref:typename:void	file:
update_display_mode	drivers/video/tegra.c	/^static int update_display_mode(struct dc_disp_reg *disp,$/;"	f	typeref:typename:int	file:
update_display_mode	drivers/video/tegra124/display.c	/^static int update_display_mode(struct dc_ctlr *disp_ctrl,$/;"	f	typeref:typename:int	file:
update_dma_a_b_ios	board/amcc/bamboo/bamboo.c	/^void update_dma_a_b_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_dma_c_d_ios	board/amcc/bamboo/bamboo.c	/^void update_dma_c_d_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_dotconfig	tools/moveconfig.py	/^    def update_dotconfig(self):$/;"	m	class:KconfigParser
update_ebc_master_ios	board/amcc/bamboo/bamboo.c	/^void update_ebc_master_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_ecc	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	int	update_ecc;$/;"	m	struct:topology_update_info	typeref:typename:int
update_ecc_pup3_mode	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	int	update_ecc_pup3_mode;$/;"	m	struct:topology_update_info	typeref:typename:int
update_fastmap_work_fn	drivers/mtd/ubi/fastmap-wl.c	/^static void update_fastmap_work_fn(struct work_struct *wrk)$/;"	f	typeref:typename:void	file:
update_fit_getparams	common/update.c	/^static int update_fit_getparams(const void *fit, int noffset, ulong *addr,$/;"	f	typeref:typename:int	file:
update_flash	common/update.c	/^static int update_flash(ulong addr_source, ulong addr_first, ulong size)$/;"	f	typeref:typename:int	file:
update_flash_protect	common/update.c	/^static int update_flash_protect(int prot, ulong addr_first, ulong addr_last)$/;"	f	typeref:typename:int	file:
update_flash_size	board/ifm/o2dnt2/o2dnt2.c	/^int update_flash_size(int flash_size)$/;"	f	typeref:typename:int
update_flash_size	board/intercontrol/digsy_mtc/digsy_mtc.c	/^int update_flash_size (int flash_size)$/;"	f	typeref:typename:int
update_flash_size	board/jupiter/jupiter.c	/^int update_flash_size (int flash_size)$/;"	f	typeref:typename:int
update_flash_size	board/mpl/common/common_util.c	/^int update_flash_size(int flash_size)$/;"	f	typeref:typename:int
update_fsp_configs	arch/x86/cpu/baytrail/fsp_configs.c	/^void update_fsp_configs(struct fsp_config_data *config,$/;"	f	typeref:typename:void
update_fsp_configs	arch/x86/cpu/ivybridge/fsp_configs.c	/^void update_fsp_configs(struct fsp_config_data *config,$/;"	f	typeref:typename:void
update_fsp_configs	arch/x86/cpu/queensbay/fsp_configs.c	/^void update_fsp_configs(struct fsp_config_data *config,$/;"	f	typeref:typename:void
update_gp	arch/nds32/cpu/n1213/start.S	/^update_gp:$/;"	l
update_hash_table_mac_address	drivers/net/armada100_fec.c	/^static void update_hash_table_mac_address(struct armdfec_device *darmdfec,$/;"	f	typeref:typename:void	file:
update_hwleveling_output	arch/arm/cpu/armv7/omap-common/emif-common.c	/^static void update_hwleveling_output(u32 base, const struct emif_regs *regs)$/;"	f	typeref:typename:void	file:
update_ifs_map	common/cli_hush.c	/^static void update_ifs_map(void)$/;"	f	typeref:typename:void	file:
update_in_progress	arch/x86/include/asm/me_common.h	/^	u32 update_in_progress:1;$/;"	m	struct:me_hfs	typeref:typename:u32:1
update_leds	include/keyboard.h	/^	int (*update_leds)(struct udevice *dev, int leds);$/;"	m	struct:keyboard_ops	typeref:typename:int (*)(struct udevice * dev,int leds)
update_load	common/update.c	/^static int update_load(char *filename, ulong msec_max, int cnt_max, ulong addr)$/;"	f	typeref:typename:int	file:
update_mode	drivers/video/fsl_dcu_fb.c	/^	u32 update_mode;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
update_ndfc_ios	board/amcc/bamboo/bamboo.c	/^void update_ndfc_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_pci_patch_ios	board/amcc/bamboo/bamboo.c	/^void update_pci_patch_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_rdcc	arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c	/^static void update_rdcc(void)$/;"	f	typeref:typename:void	file:
update_reset_dll	arch/arm/mach-exynos/dmc_common.c	/^void update_reset_dll(uint32_t *phycontrol0, enum ddr_mode mode)$/;"	f	typeref:typename:void
update_revision	arch/x86/cpu/intel_common/microcode.c	/^	uint update_revision;$/;"	m	struct:microcode_update	typeref:typename:uint	file:
update_sdram_window_sizes	arch/arm/mach-mvebu/cpu.c	/^static void update_sdram_window_sizes(void)$/;"	f	typeref:typename:void	file:
update_serial_clocks	arch/blackfin/cpu/initcode.c	/^update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB)$/;"	f	typeref:typename:void	file:
update_serial_early_string_addr	arch/blackfin/include/asm/serial.h	/^#define update_serial_early_string_addr /;"	d
update_spd_address	board/freescale/ls2080ardb/ls2080ardb.c	/^void update_spd_address(unsigned int ctrl_num,$/;"	f	typeref:typename:void
update_spd_address	drivers/ddr/fsl/main.c	/^__weak void update_spd_address(unsigned int ctrl_num,$/;"	f	typeref:typename:__weak void
update_srom	drivers/net/dc2114x.c	/^static void update_srom(struct eth_device *dev, bd_t *bis)$/;"	f	typeref:typename:void	file:
update_stack_pointers	arch/sparc/cpu/leon2/start.S	/^update_stack_pointers:$/;"	l
update_stack_pointers	arch/sparc/cpu/leon3/start.S	/^update_stack_pointers:$/;"	l
update_text	scripts/kconfig/mconf.c	/^static void update_text(char *buf, size_t start, size_t end, void *_data)$/;"	f	typeref:typename:void	file:
update_text_fn	scripts/kconfig/lxdialog/dialog.h	/^typedef void (*update_text_fn)(char *buf, size_t start, size_t end, void$/;"	t	typeref:typename:void (*)(char * buf,size_t start,size_t end,void * _data)
update_tftp	common/update.c	/^int update_tftp(ulong addr, char *interface, char *devstring)$/;"	f	typeref:typename:int
update_trap_table_address	arch/sparc/cpu/leon2/start.S	/^update_trap_table_address:$/;"	l
update_trap_table_address	arch/sparc/cpu/leon3/start.S	/^update_trap_table_address:$/;"	l
update_tree	scripts/kconfig/gconf.c	/^static void update_tree(struct menu *src, GtkTreeIter * dst)$/;"	f	typeref:typename:void	file:
update_uart_ios	board/amcc/bamboo/bamboo.c	/^void update_uart_ios(uart_config_nb_t uart_config, gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_uic_0_3_irq_ios	board/amcc/bamboo/bamboo.c	/^void update_uic_0_3_irq_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_uic_4_9_irq_ios	board/amcc/bamboo/bamboo.c	/^void update_uic_4_9_irq_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_usb2_device_ios	board/amcc/bamboo/bamboo.c	/^void update_usb2_device_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
update_vol	drivers/mtd/ubi/fastmap.c	/^static int update_vol(struct ubi_device *ubi, struct ubi_attach_info *ai,$/;"	f	typeref:typename:int	file:
update_width	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	int	update_width;$/;"	m	struct:topology_update_info	typeref:typename:int
update_window	drivers/video/tegra.c	/^static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win)$/;"	f	typeref:typename:void	file:
update_window	drivers/video/tegra124/display.c	/^static int update_window(struct dc_ctlr *disp_ctrl,$/;"	f	typeref:typename:int	file:
update_zii_ios	board/amcc/bamboo/bamboo.c	/^void update_zii_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])$/;"	f	typeref:typename:void
updatewindow	lib/zlib/inflate.c	/^local int updatewindow(z_streamp strm, unsigned out)$/;"	f	typeref:typename:local int
updating	drivers/mtd/ubi/ubi.h	/^	unsigned int updating:1;$/;"	m	struct:ubi_volume	typeref:typename:unsigned int:1
updc1	include/linux/immap_qe.h	/^	u32 updc1;		\/* UTOPIA\/POS device 1 configuration *\/$/;"	m	struct:upc	typeref:typename:u32
updc2	include/linux/immap_qe.h	/^	u32 updc2;		\/* UTOPIA\/POS device 2 configuration  *\/$/;"	m	struct:upc	typeref:typename:u32
updc3	include/linux/immap_qe.h	/^	u32 updc3;		\/* UTOPIA\/POS device 3 configuration *\/$/;"	m	struct:upc	typeref:typename:u32
updc4	include/linux/immap_qe.h	/^	u32 updc4;		\/* UTOPIA\/POS device 4 configuration  *\/$/;"	m	struct:upc	typeref:typename:u32
upde1	include/linux/immap_qe.h	/^	u32 upde1;		\/* UTOPIA\/POS device 1 event *\/$/;"	m	struct:upc	typeref:typename:u32
upde2	include/linux/immap_qe.h	/^	u32 upde2;		\/* UTOPIA\/POS device 2 event *\/$/;"	m	struct:upc	typeref:typename:u32
upde3	include/linux/immap_qe.h	/^	u32 upde3;		\/* UTOPIA\/POS device 3 event *\/$/;"	m	struct:upc	typeref:typename:u32
upde4	include/linux/immap_qe.h	/^	u32 upde4;		\/* UTOPIA\/POS device 4 event *\/$/;"	m	struct:upc	typeref:typename:u32
updrp1	include/linux/immap_qe.h	/^	u32 updrp1;		\/* UTOPIA\/POS device 1 receive priority low  *\/$/;"	m	struct:upc	typeref:typename:u32
updrp2	include/linux/immap_qe.h	/^	u32 updrp2;		\/* UTOPIA\/POS device 2 receive priority low  *\/$/;"	m	struct:upc	typeref:typename:u32
updrp3	include/linux/immap_qe.h	/^	u32 updrp3;		\/* UTOPIA\/POS device 3 receive priority low  *\/$/;"	m	struct:upc	typeref:typename:u32
updrp4	include/linux/immap_qe.h	/^	u32 updrp4;		\/* UTOPIA\/POS device 4 receive priority low  *\/$/;"	m	struct:upc	typeref:typename:u32
updrs1_h	include/linux/immap_qe.h	/^	u32 updrs1_h;		\/* UTOPIA\/POS device 1 rate select  *\/$/;"	m	struct:upc	typeref:typename:u32
updrs1_l	include/linux/immap_qe.h	/^	u32 updrs1_l;		\/* UTOPIA\/POS device 1 rate select  *\/$/;"	m	struct:upc	typeref:typename:u32
updrs2_h	include/linux/immap_qe.h	/^	u32 updrs2_h;		\/* UTOPIA\/POS device 2 rate select  *\/$/;"	m	struct:upc	typeref:typename:u32
updrs2_l	include/linux/immap_qe.h	/^	u32 updrs2_l;		\/* UTOPIA\/POS device 2 rate select *\/$/;"	m	struct:upc	typeref:typename:u32
updrs3_h	include/linux/immap_qe.h	/^	u32 updrs3_h;		\/* UTOPIA\/POS device 3 rate select *\/$/;"	m	struct:upc	typeref:typename:u32
updrs3_l	include/linux/immap_qe.h	/^	u32 updrs3_l;		\/* UTOPIA\/POS device 3 rate select *\/$/;"	m	struct:upc	typeref:typename:u32
updrs4_h	include/linux/immap_qe.h	/^	u32 updrs4_h;		\/* UTOPIA\/POS device 4 rate select *\/$/;"	m	struct:upc	typeref:typename:u32
updrs4_l	include/linux/immap_qe.h	/^	u32 updrs4_l;		\/* UTOPIA\/POS device 4 rate select *\/$/;"	m	struct:upc	typeref:typename:u32
uper1	include/linux/immap_qe.h	/^	u32 uper1;		\/* Device 1 port enable register *\/$/;"	m	struct:upc	typeref:typename:u32
uper2	include/linux/immap_qe.h	/^	u32 uper2;		\/* Device 2 port enable register *\/$/;"	m	struct:upc	typeref:typename:u32
uper3	include/linux/immap_qe.h	/^	u32 uper3;		\/* Device 3 port enable register *\/$/;"	m	struct:upc	typeref:typename:u32
uper4	include/linux/immap_qe.h	/^	u32 uper4;		\/* Device 4 port enable register *\/$/;"	m	struct:upc	typeref:typename:u32
upfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 upfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
upfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 upfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
upfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 upfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
upgcr	include/linux/immap_qe.h	/^	u32 upgcr;		\/* UTOPIA\/POS general configuration register *\/$/;"	m	struct:upc	typeref:typename:u32
upgrade_failure_fallback	board/siemens/taurus/taurus.c	/^static int upgrade_failure_fallback(void)$/;"	f	typeref:typename:int	file:
uphec	include/linux/immap_qe.h	/^	u32 uphec;		\/* ATM HEC register *\/$/;"	m	struct:upc	typeref:typename:u32
uphy_ctr_reg	arch/arm/include/asm/arch-spear/spr_misc.h	/^	u32 uphy_ctr_reg;	\/* 0xA4 *\/$/;"	m	struct:misc_regs	typeref:typename:u32
upll_init	arch/arm/mach-uniphier/clk/pll-ld4.c	/^static void upll_init(void)$/;"	f	typeref:typename:void	file:
upllcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	upllcon;$/;"	m	struct:s3c24x0_clock_power	typeref:typename:u32
uplpa	include/linux/immap_qe.h	/^	u32 uplpa;		\/* UTOPIA\/POS last PHY address *\/$/;"	m	struct:upc	typeref:typename:u32
upm	include/linux/mtd/fsl_upm.h	/^	struct fsl_upm upm;$/;"	m	struct:fsl_upm_nand	typeref:struct:fsl_upm
upm_addr_offset	include/linux/mtd/fsl_upm.h	/^	int upm_addr_offset;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
upm_cmd_offset	include/linux/mtd/fsl_upm.h	/^	int upm_cmd_offset;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
upm_mar_chip_offset	include/linux/mtd/fsl_upm.h	/^	int upm_mar_chip_offset;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
upm_nand_read_buf	drivers/mtd/nand/fsl_upm.c	/^static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
upm_nand_read_byte	drivers/mtd/nand/fsl_upm.c	/^static u8 upm_nand_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
upm_nand_write_buf	drivers/mtd/nand/fsl_upm.c	/^static void upm_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)$/;"	f	typeref:typename:void	file:
upma_table	board/keymile/km83xx/km83xx.c	/^const uint upma_table[] = {$/;"	v	typeref:typename:const uint[]
upmconfig	arch/powerpc/cpu/mpc8260/cpu.c	/^void upmconfig (uint upm, uint * table, uint size)$/;"	f	typeref:typename:void
upmconfig	arch/powerpc/cpu/mpc8xx/cpu.c	/^void upmconfig (uint upm, uint * table, uint size)$/;"	f	typeref:typename:void
upmconfig	arch/powerpc/cpu/mpc8xxx/fsl_lbc.c	/^void upmconfig(uint upm, uint *table, uint size)$/;"	f	typeref:typename:void
upper	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32     upper;$/;"	m	struct:ccsr_gur::__anon245f04be0108	typeref:typename:u32
upper	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h	/^		u32	upper;$/;"	m	struct:ccsr_gur::__anon245f08ff0108	typeref:typename:u32
upper	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32     upper;$/;"	m	struct:ccsr_gur::__anon58ea331d0108	typeref:typename:u32
upper	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 upper;$/;"	m	struct:mx31_weim_cscr	typeref:typename:u32
upper	arch/arm/include/asm/arch-mx31/sys_proto.h	/^	u32 upper;$/;"	m	struct:mxc_weimcs	typeref:typename:u32
upper	arch/powerpc/include/asm/immap_85xx.h	/^		u32	upper;$/;"	m	struct:ccsr_gur::__anondcd7518a0308	typeref:typename:u32
upper	drivers/net/e1000.h	/^	} upper;$/;"	m	struct:e1000_data_desc	typeref:union:e1000_data_desc::__anon7fc273451c0a
upper	drivers/net/e1000.h	/^	} upper;$/;"	m	struct:e1000_tx_desc	typeref:union:e1000_tx_desc::__anon7fc27345120a
upper32	drivers/net/fsl-mc/dpio/qbman_private.h	/^#define upper32(/;"	d
upper_32_bits	include/linux/kernel.h	/^#define upper_32_bits(/;"	d
upper_margin	drivers/video/videomodes.h	/^	int upper_margin;	\/* time from sync to picture	*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
upper_margin	include/linux/fb.h	/^	__u32 upper_margin;		\/* time from sync to picture	*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
upper_margin	include/linux/fb.h	/^	u32 upper_margin;$/;"	m	struct:fb_videomode	typeref:typename:u32
upper_setup	drivers/net/e1000.h	/^	} upper_setup;$/;"	m	struct:e1000_context_desc	typeref:union:e1000_context_desc::__anon7fc27345160a
uppercase	fs/fat/fat_write.c	/^static void uppercase(char *str, int len)$/;"	f	typeref:typename:void	file:
uprp1	include/linux/immap_qe.h	/^	u16 uprp1;$/;"	m	struct:upc	typeref:typename:u16
uprp2	include/linux/immap_qe.h	/^	u16 uprp2;$/;"	m	struct:upc	typeref:typename:u16
uprp3	include/linux/immap_qe.h	/^	u16 uprp3;$/;"	m	struct:upc	typeref:typename:u16
uprp4	include/linux/immap_qe.h	/^	u16 uprp4;$/;"	m	struct:upc	typeref:typename:u16
upsmr	include/linux/immap_qe.h	/^	u16 upsmr;		\/* UCCx protocol-specific mode register *\/$/;"	m	struct:ucc_slow	typeref:typename:u16
upsmr	include/linux/immap_qe.h	/^	u32 upsmr;		\/* UCCx protocol-specific mode register  *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
upstpa	include/linux/immap_qe.h	/^	u32 upstpa;		\/* UTOPIA\/POS STPA threshold  *\/$/;"	m	struct:upc	typeref:typename:u32
upstring	arch/arm/mach-tegra/sys_info.c	/^static void upstring(char *s)$/;"	f	typeref:typename:void	file:
uptirr1_0	include/linux/immap_qe.h	/^	u16 uptirr1_0;		\/* Device 1 transmit internal rate 0 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr1_1	include/linux/immap_qe.h	/^	u16 uptirr1_1;		\/* Device 1 transmit internal rate 1 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr1_2	include/linux/immap_qe.h	/^	u16 uptirr1_2;		\/* Device 1 transmit internal rate 2 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr1_3	include/linux/immap_qe.h	/^	u16 uptirr1_3;		\/* Device 1 transmit internal rate 3 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr2_0	include/linux/immap_qe.h	/^	u16 uptirr2_0;		\/* Device 2 transmit internal rate 0 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr2_1	include/linux/immap_qe.h	/^	u16 uptirr2_1;		\/* Device 2 transmit internal rate 1 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr2_2	include/linux/immap_qe.h	/^	u16 uptirr2_2;		\/* Device 2 transmit internal rate 2 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr2_3	include/linux/immap_qe.h	/^	u16 uptirr2_3;		\/* Device 2 transmit internal rate 3 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr3_0	include/linux/immap_qe.h	/^	u16 uptirr3_0;		\/* Device 3 transmit internal rate 0 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr3_1	include/linux/immap_qe.h	/^	u16 uptirr3_1;		\/* Device 3 transmit internal rate 1 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr3_2	include/linux/immap_qe.h	/^	u16 uptirr3_2;		\/* Device 3 transmit internal rate 2 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr3_3	include/linux/immap_qe.h	/^	u16 uptirr3_3;		\/* Device 3 transmit internal rate 3 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr4_0	include/linux/immap_qe.h	/^	u16 uptirr4_0;		\/* Device 4 transmit internal rate 0 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr4_1	include/linux/immap_qe.h	/^	u16 uptirr4_1;		\/* Device 4 transmit internal rate 1 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr4_2	include/linux/immap_qe.h	/^	u16 uptirr4_2;		\/* Device 4 transmit internal rate 2 *\/$/;"	m	struct:upc	typeref:typename:u16
uptirr4_3	include/linux/immap_qe.h	/^	u16 uptirr4_3;		\/* Device 4 transmit internal rate 3 *\/$/;"	m	struct:upc	typeref:typename:u16
upuc	include/linux/immap_qe.h	/^	u32 upuc;		\/* UTOPIA\/POS UCC configuration *\/$/;"	m	struct:upc	typeref:typename:u32
uq	lib/display_options.c	/^		uint64_t uq[MAX_LINE_LENGTH_BYTES\/sizeof(uint64_t) + 1];$/;"	m	union:print_buffer::linebuf	typeref:typename:uint64_t[]	file:
urb	arch/m68k/include/asm/uart.h	/^		u8 urb;		\/* 0x0c Receive Buffer *\/$/;"	m	union:uart::__anona45981bc020a	typeref:typename:u8
urb	drivers/usb/host/ohci-hcd.c	/^	urb_priv_t *urb[MAX_INT_QUEUESIZE];$/;"	m	struct:int_queue	typeref:typename:urb_priv_t * []	file:
urb	drivers/usb/musb-new/musb_uboot.c	/^	struct urb urb;$/;"	m	struct:int_queue	typeref:struct:urb	file:
urb	drivers/usb/musb-new/musb_uboot.h	/^	struct urb urb;$/;"	m	struct:musb_host_data	typeref:struct:urb
urb	drivers/usb/musb-new/usb-compat.h	/^struct urb {$/;"	s
urb	include/usb/mpc8xx_udc.h	/^	struct urb * urb;$/;"	m	struct:mpc8xx_ep	typeref:struct:urb *
urb	include/usbdevice.h	/^struct urb {$/;"	s
urb_append	drivers/usb/gadget/core.c	/^void urb_append (urb_link * hd, struct urb *urb)$/;"	f	typeref:typename:void
urb_detach	drivers/usb/gadget/core.c	/^void urb_detach (struct urb *urb)$/;"	f	typeref:typename:void
urb_finished	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int urb_finished = 0;$/;"	v	typeref:typename:int
urb_finished	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int urb_finished = 0;$/;"	v	typeref:typename:int
urb_finished	drivers/usb/host/ohci-s3c24xx.c	/^int urb_finished = 0;$/;"	v	typeref:typename:int
urb_free_priv	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^static void urb_free_priv (urb_priv_t * urb)$/;"	f	typeref:typename:void	file:
urb_free_priv	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^static void urb_free_priv (urb_priv_t * urb)$/;"	f	typeref:typename:void	file:
urb_free_priv	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^static void urb_free_priv (urb_priv_t * urb)$/;"	f	typeref:typename:void	file:
urb_free_priv	drivers/usb/host/ohci-hcd.c	/^static void urb_free_priv(urb_priv_t *urb)$/;"	f	typeref:typename:void	file:
urb_free_priv	drivers/usb/host/ohci-s3c24xx.c	/^static void urb_free_priv(struct urb_priv *urb)$/;"	f	typeref:typename:void	file:
urb_link	include/usbdevice.h	/^typedef struct urb_link {$/;"	s
urb_link	include/usbdevice.h	/^} urb_link;$/;"	t	typeref:struct:urb_link
urb_link_init	drivers/usb/gadget/core.c	/^void urb_link_init (urb_link * ul)$/;"	f	typeref:typename:void
urb_list	drivers/usb/musb-new/usb-compat.h	/^	struct list_head urb_list;	\/* list head for use by the urb's$/;"	m	struct:urb	typeref:struct:list_head
urb_list	drivers/usb/musb-new/usb-compat.h	/^	struct list_head urb_list;$/;"	m	struct:usb_host_endpoint	typeref:struct:list_head
urb_priv	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^urb_priv_t urb_priv;$/;"	v	typeref:typename:urb_priv_t
urb_priv	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^urb_priv_t urb_priv;$/;"	v	typeref:typename:urb_priv_t
urb_priv	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^urb_priv_t urb_priv;$/;"	v	typeref:typename:urb_priv_t
urb_priv	drivers/usb/host/ohci-s3c24xx.c	/^struct urb_priv urb_priv;$/;"	v	typeref:struct:urb_priv
urb_priv	drivers/usb/host/ohci-s3c24xx.h	/^struct urb_priv {$/;"	s
urb_priv_t	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^} urb_priv_t;$/;"	t	typeref:struct:__anon08a6674e0108
urb_priv_t	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^} urb_priv_t;$/;"	t	typeref:struct:__anonb10e26e60108
urb_priv_t	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^} urb_priv_t;$/;"	t	typeref:struct:__anond5d032300108
urb_priv_t	drivers/usb/host/isp116x.h	/^} urb_priv_t;$/;"	t	typeref:struct:__anon2695f18b0108
urb_priv_t	drivers/usb/host/ohci.h	/^} urb_priv_t;$/;"	t	typeref:struct:__anone9fd91320108
urb_send_status	include/usbdevice.h	/^typedef enum urb_send_status {$/;"	g
urb_send_status_t	include/usbdevice.h	/^} urb_send_status_t;$/;"	t	typeref:enum:urb_send_status
urbr1_uthr1_udlb1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	urbr1_uthr1_udlb1;$/;"	m	struct:ccsr_duart	typeref:typename:u8
urbr1_uthr1_udlb1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	urbr1_uthr1_udlb1;\/* 0x4500 - URBR1, UTHR1, UDLB1 with the same address offset of 0x045/;"	m	struct:ccsr_duart	typeref:typename:u_char
urbr2_uthr2_udlb2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	urbr2_uthr2_udlb2;$/;"	m	struct:ccsr_duart	typeref:typename:u8
urbr2_uthr2_udlb2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	urbr2_uthr2_udlb2;\/* 0x4600 - URBR2, UTHR2, UDLB2 with the same address offset of 0x046/;"	m	struct:ccsr_duart	typeref:typename:u_char
urbr_ulcr_udlb	arch/powerpc/include/asm/immap_83xx.h	/^	u8 urbr_ulcr_udlb;	\/* combined register for URBR, UTHR and UDLB *\/$/;"	m	struct:duart83xx	typeref:typename:u8
urbs_queued	include/usbdevice.h	/^	int urbs_queued;	\/* number of submitted urbs *\/$/;"	m	struct:usb_device_instance	typeref:typename:int
urcfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 urcfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
urcfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 urcfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
urcfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 urcfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ureg	drivers/i2c/adi_i2c.c	/^#define ureg(/;"	d	file:
ureg	drivers/i2c/sh_i2c.c	/^#define ureg(/;"	d	file:
ureg	drivers/usb/musb/blackfin_usb.h	/^#define ureg(/;"	d
uregs	arch/arm/include/asm/proc-armv/ptrace.h	/^	long uregs[18];$/;"	m	struct:pt_regs	typeref:typename:long[18]
uregs	arch/arm/lib/interrupts_m.c	/^	long uregs[8];$/;"	m	struct:autosave_regs	typeref:typename:long[8]	file:
uregs	cmd/tsi148.c	/^	TSI148       *uregs;$/;"	m	struct:_TSI148_DEV	typeref:typename:TSI148 *	file:
uregs	cmd/universe.c	/^	UNIVERSE       *uregs;$/;"	m	struct:_UNI_DEV	typeref:typename:UNIVERSE *	file:
urfb	include/linux/immap_qe.h	/^	u32 urfb;		\/* UCC receive FIFO base *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
urfet	include/linux/immap_qe.h	/^	u16 urfet;		\/* UCC receive FIFO emergency threshold *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
urfs	include/linux/immap_qe.h	/^	u16 urfs;		\/* UCC receive FIFO size *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
urfset	include/linux/immap_qe.h	/^	u16 urfset;		\/* UCC receive FIFO special emergency$/;"	m	struct:ucc_fast	typeref:typename:u16
urtry	include/linux/immap_qe.h	/^	u32 urtry;		\/* UCC retry counter register *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
urts_pol	arch/m68k/include/asm/immap_5441x.h	/^	u16 urts_pol;		\/* 0x74 *\/$/;"	m	struct:gpio	typeref:typename:u16
urwfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 urwfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
urwfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 urwfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
urwfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 urwfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
urxd_wom	arch/m68k/include/asm/immap_5441x.h	/^	u32 urxd_wom;		\/* 0x7c *\/$/;"	m	struct:gpio	typeref:typename:u32
urxh	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	urxh;$/;"	m	struct:s3c24x0_uart	typeref:typename:u8
urxh	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned char	urxh;$/;"	m	struct:s5p_uart	typeref:typename:unsigned char
urxh	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned char	urxh;$/;"	m	struct:s5p_uart	typeref:typename:unsigned char
us	arch/x86/lib/physmem.c	/^	uint64_t us:1;     \/* user\/supervisor *\/$/;"	m	struct:pde	typeref:typename:uint64_t:1	file:
us	lib/display_options.c	/^		uint16_t us[MAX_LINE_LENGTH_BYTES\/sizeof(uint16_t) + 1];$/;"	m	union:print_buffer::linebuf	typeref:typename:uint16_t[]	file:
us1	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 us1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
us1	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 us1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
us1	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 us1;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
us2	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 us2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
us2	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 us2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
us2	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 us2;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
usNegativeIndex	include/lattice.h	/^	unsigned short usNegativeIndex;$/;"	m	struct:__anon773a64540108	typeref:typename:unsigned short
usPositiveIndex	include/lattice.h	/^	unsigned short usPositiveIndex;$/;"	m	struct:__anon773a64540108	typeref:typename:unsigned short
us_data	common/usb_storage.c	/^struct us_data {$/;"	s	file:
us_direction	common/usb_storage.c	/^static const unsigned char us_direction[256\/8] = {$/;"	v	typeref:typename:const unsigned char[]	file:
us_one_transfer	common/usb_storage.c	/^static int us_one_transfer(struct us_data *us, int pipe, char *buf, int length)$/;"	f	typeref:typename:int	file:
us_tic_counter	drivers/net/dwc_eth_qos.c	/^	uint32_t us_tic_counter;			\/* 0x0dc *\/$/;"	m	struct:eqos_mac_regs	typeref:typename:uint32_t	file:
us_to_tick	arch/arm/cpu/arm926ejs/mx27/timer.c	/^static inline unsigned long long us_to_tick(unsigned long long us)$/;"	f	typeref:typename:unsigned long long	file:
us_to_tick	arch/arm/cpu/arm926ejs/mxs/timer.c	/^static inline unsigned long us_to_tick(unsigned long us)$/;"	f	typeref:typename:unsigned long	file:
us_to_tick	arch/arm/cpu/armv7/ls102xa/timer.c	/^static inline unsigned long long us_to_tick(unsigned long long usec)$/;"	f	typeref:typename:unsigned long long	file:
us_to_tick	arch/arm/cpu/armv7/vf610/timer.c	/^static inline unsigned long long us_to_tick(unsigned long long usec)$/;"	f	typeref:typename:unsigned long long	file:
us_to_tick	arch/arm/imx-common/syscounter.c	/^static inline unsigned long long us_to_tick(unsigned long long usec)$/;"	f	typeref:typename:unsigned long long	file:
usable_envsize	tools/env/fw_env.c	/^static unsigned long usable_envsize;$/;"	v	typeref:typename:unsigned long	file:
usable_leb_size	drivers/mtd/ubi/ubi.h	/^	int usable_leb_size;$/;"	m	struct:ubi_volume	typeref:typename:int
usable_leb_size	include/linux/mtd/ubi.h	/^	int usable_leb_size;$/;"	m	struct:ubi_volume_info	typeref:typename:int
usable_ram_size_below_4g	arch/arm/mach-tegra/board2.c	/^static ulong usable_ram_size_below_4g(void)$/;"	f	typeref:typename:ulong	file:
usaddr	include/usb/mpc8xx_udc.h	/^	char usaddr;	\/* Slave Address Register *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char
usadr	post/cpu/mpc8xx/usb.c	/^	uchar usadr;$/;"	m	struct:usb	typeref:typename:uchar	file:
usage	arch/arm/mach-socfpga/qts-filter.sh	/^usage() {$/;"	f
usage	examples/standalone/smc911x_eeprom.c	/^static void usage(void)$/;"	f	typeref:typename:void	file:
usage	examples/standalone/timer.c	/^static const char usage[] = "\\n[q, b, e, ?] ";$/;"	v	typeref:typename:const char[]	file:
usage	include/command.h	/^	char		*usage;		\/* Usage message	(short)	*\/$/;"	m	struct:cmd_tbl_s	typeref:typename:char *
usage	lib/lzma/import_lzmasdk.sh	/^usage() {$/;"	f
usage	scripts/basic/fixdep.c	/^static void usage(void)$/;"	f	typeref:typename:void	file:
usage	scripts/docproc.c	/^static void usage (void)$/;"	f	typeref:typename:void	file:
usage	scripts/get_maintainer.pl	/^sub usage {$/;"	s
usage	scripts/kconfig/lxdialog/check-lxdialog.sh	/^usage() {$/;"	f
usage	scripts/kconfig/merge_config.sh	/^usage() {$/;"	f
usage	scripts/kconfig/qconf.cc	/^static void usage(void)$/;"	f	typeref:typename:void	file:
usage	scripts/kernel-doc	/^sub usage {$/;"	s
usage	scripts/objdiff	/^usage() {$/;"	f
usage	scripts/setlocalversion	/^usage() {$/;"	f
usage	tools/bmp_logo.c	/^void usage(const char *prog)$/;"	f	typeref:typename:void
usage	tools/dumpimage.c	/^static void usage(void)$/;"	f	typeref:typename:void	file:
usage	tools/easylogo/easylogo.c	/^static void usage (int exit_status)$/;"	f	typeref:typename:void	file:
usage	tools/fdtgrep.c	/^#define usage(/;"	d	file:
usage	tools/fit_check_sign.c	/^void usage(char *cmdname)$/;"	f	typeref:typename:void
usage	tools/fit_info.c	/^void usage(char *cmdname)$/;"	f	typeref:typename:void
usage	tools/jtagconsole	/^usage() {$/;"	f
usage	tools/mkenvimage.c	/^static void usage(const char *exec_name)$/;"	f	typeref:typename:void	file:
usage	tools/mkimage.c	/^static void usage(const char *msg)$/;"	f	typeref:typename:void	file:
usage	tools/mxsboot.c	/^static void usage(void)$/;"	f	typeref:typename:void	file:
usage	tools/netconsole	/^usage() {$/;"	f
usage	tools/proftool.c	/^static void usage(void)$/;"	f	typeref:typename:void	file:
usage_long_opts	tools/fdtgrep.c	/^static struct option const usage_long_opts[] = {$/;"	v	typeref:struct:option const[]	file:
usage_opts_help	tools/fdtgrep.c	/^static const char * const usage_opts_help[] = {$/;"	v	typeref:typename:const char * const[]	file:
usage_printenv	tools/env/fw_env_main.c	/^void usage_printenv(void)$/;"	f	typeref:typename:void
usage_setenv	tools/env/fw_env_main.c	/^void usage_setenv(void)$/;"	f	typeref:typename:void
usage_short_opts	tools/fdtgrep.c	/^static const char usage_short_opts[] =$/;"	v	typeref:typename:const char[]	file:
usage_synopsis	tools/fdtgrep.c	/^static const char usage_synopsis[] =$/;"	v	typeref:typename:const char[]	file:
usart	drivers/serial/atmel_usart.c	/^	atmel_usart3_t *usart;$/;"	m	struct:atmel_serial_priv	typeref:typename:atmel_usart3_t *	file:
usart0	arch/arm/dts/at91sam9260-smartweb.dts	/^			usart0: serial@fffb0000 {$/;"	l
usart0	arch/arm/dts/at91sam9260.dtsi	/^			usart0: serial@fffb0000 {$/;"	l
usart0	arch/arm/dts/at91sam9261.dtsi	/^			usart0: serial@fffb0000 {$/;"	l
usart0	arch/arm/dts/at91sam9263.dtsi	/^			usart0: serial@fff8c000 {$/;"	l
usart0	arch/arm/dts/at91sam9g20-taurus.dts	/^			usart0: serial@fffb0000 {$/;"	l
usart0	arch/arm/dts/at91sam9g45.dtsi	/^			usart0: serial@fff8c000 {$/;"	l
usart0_clk	arch/arm/dts/at91sam9260.dtsi	/^					usart0_clk: usart0_clk {$/;"	l
usart0_clk	arch/arm/dts/at91sam9261.dtsi	/^					usart0_clk: usart0_clk {$/;"	l
usart0_clk	arch/arm/dts/at91sam9263.dtsi	/^					usart0_clk: usart0_clk {$/;"	l
usart0_clk	arch/arm/dts/at91sam9g45.dtsi	/^					usart0_clk: usart0_clk {$/;"	l
usart1	arch/arm/dts/at91sam9260-smartweb.dts	/^			usart1: serial@fffb4000 {$/;"	l
usart1	arch/arm/dts/at91sam9260.dtsi	/^			usart1: serial@fffb4000 {$/;"	l
usart1	arch/arm/dts/at91sam9261.dtsi	/^			usart1: serial@fffb4000 {$/;"	l
usart1	arch/arm/dts/at91sam9263.dtsi	/^			usart1: serial@fff90000 {$/;"	l
usart1	arch/arm/dts/at91sam9g20-taurus.dts	/^			usart1: serial@fffb4000 {$/;"	l
usart1	arch/arm/dts/at91sam9g45-corvus.dts	/^			usart1: serial@fff90000 {$/;"	l
usart1	arch/arm/dts/at91sam9g45.dtsi	/^			usart1: serial@fff90000 {$/;"	l
usart1_clk	arch/arm/dts/at91sam9260.dtsi	/^					usart1_clk: usart1_clk {$/;"	l
usart1_clk	arch/arm/dts/at91sam9261.dtsi	/^					usart1_clk: usart1_clk {$/;"	l
usart1_clk	arch/arm/dts/at91sam9263.dtsi	/^					usart1_clk: usart1_clk {$/;"	l
usart1_clk	arch/arm/dts/at91sam9g45.dtsi	/^					usart1_clk: usart1_clk {$/;"	l
usart2	arch/arm/dts/at91sam9260.dtsi	/^			usart2: serial@fffb8000 {$/;"	l
usart2	arch/arm/dts/at91sam9261.dtsi	/^			usart2: serial@fffb8000{$/;"	l
usart2	arch/arm/dts/at91sam9263.dtsi	/^			usart2: serial@fff94000 {$/;"	l
usart2	arch/arm/dts/at91sam9g45.dtsi	/^			usart2: serial@fff94000 {$/;"	l
usart2_clk	arch/arm/dts/at91sam9260.dtsi	/^					usart2_clk: usart2_clk {$/;"	l
usart2_clk	arch/arm/dts/at91sam9261.dtsi	/^					usart2_clk: usart2_clk {$/;"	l
usart2_clk	arch/arm/dts/at91sam9263.dtsi	/^					usart2_clk: usart2_clk {$/;"	l
usart2_clk	arch/arm/dts/at91sam9g45.dtsi	/^					usart2_clk: usart2_clk {$/;"	l
usart3	arch/arm/dts/at91sam9260.dtsi	/^			usart3: serial@fffd0000 {$/;"	l
usart3	arch/arm/dts/at91sam9g45.dtsi	/^			usart3: serial@fff98000 {$/;"	l
usart3_clk	arch/arm/dts/at91sam9260.dtsi	/^					usart3_clk: usart3_clk {$/;"	l
usart3_clk	arch/arm/dts/at91sam9g45.dtsi	/^					usart3_clk: usart3_clk {$/;"	l
usart_gpio	board/st/stm32f429-discovery/stm32f429-discovery.c	/^static const struct stm32_gpio_dsc usart_gpio[] = {$/;"	v	typeref:typename:const struct stm32_gpio_dsc[]	file:
usart_gpio	board/st/stm32f746-disco/stm32f746-disco.c	/^static const struct stm32_gpio_dsc usart_gpio[] = {$/;"	v	typeref:typename:const struct stm32_gpio_dsc[]	file:
usb	arch/arm/dts/am33xx.dtsi	/^		usb: usb@47400000 {$/;"	l
usb	arch/arm/dts/at91sam9260.dtsi	/^				usb: usbck {$/;"	l	label:pmc
usb	arch/arm/dts/at91sam9261.dtsi	/^				usb: usbck {$/;"	l	label:pmc
usb	arch/arm/dts/at91sam9263.dtsi	/^				usb: usbck {$/;"	l	label:pmc
usb	arch/arm/dts/at91sam9g45.dtsi	/^				usb: usbck {$/;"	l	label:pmc
usb	arch/arm/dts/k2e.dtsi	/^		usb: usb@2680000 {$/;"	l
usb	arch/arm/dts/keystone.dtsi	/^		usb: usb@2680000 {$/;"	l
usb	arch/arm/dts/sama5d2.dtsi	/^				usb: usbck {$/;"	l	label:pmc
usb	arch/arm/include/asm/omap_common.h	/^	const struct dpll_params *usb;$/;"	m	struct:dplls	typeref:typename:const struct dpll_params *
usb	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	usb;		\/* 0x38 USB Clock Register *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
usb	arch/m68k/include/asm/immap_5272.h	/^typedef struct usb {$/;"	s
usb	arch/m68k/include/asm/immap_5275.h	/^typedef struct usb {$/;"	s
usb	arch/mips/dts/pic32mzda.dtsi	/^	usb: musb@1f8e3000 {$/;"	l
usb	arch/powerpc/include/asm/immap_83xx.h	/^	usb83xx_t		usb;$/;"	m	struct:immap	typeref:typename:usb83xx_t
usb	arch/powerpc/include/asm/immap_83xx.h	/^	usb83xx_t		usb[1];		\/* USB DR Controller *\/$/;"	m	struct:immap	typeref:typename:usb83xx_t[1]
usb	arch/powerpc/include/asm/immap_83xx.h	/^	usb83xx_t		usb[1];$/;"	m	struct:immap	typeref:typename:usb83xx_t[1]
usb	arch/powerpc/include/asm/immap_83xx.h	/^	usb83xx_t		usb[2];$/;"	m	struct:immap	typeref:typename:usb83xx_t[2]
usb	board/nokia/rx51/tag_omap.h	/^		struct omap_usb_config usb;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_usb_config
usb	drivers/usb/host/ehci-exynos.c	/^	struct exynos_usb_phy *usb;$/;"	m	struct:exynos_ehci	typeref:struct:exynos_usb_phy *	file:
usb	drivers/usb/host/ehci-faraday.c	/^	struct fusbh200_regs usb;$/;"	m	union:ehci_faraday_regs	typeref:struct:fusbh200_regs	file:
usb	include/linux/edd.h	/^		} __attribute__ ((packed)) usb;$/;"	m	union:edd_device_params::__anon8a8b619a080a	typeref:struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0c08
usb	include/linux/immap_qe.h	/^	usb_t usb;		\/* USB *\/$/;"	m	struct:qe_immap	typeref:typename:usb_t
usb	post/cpu/mpc8xx/usb.c	/^typedef struct usb {$/;"	s	file:
usb0	arch/arm/dts/am33xx.dtsi	/^			usb0: usb@47401000 {$/;"	l	label:usb
usb0	arch/arm/dts/at91sam9260-smartweb.dts	/^		usb0: ohci@00500000 {$/;"	l
usb0	arch/arm/dts/at91sam9260.dtsi	/^		usb0: ohci@00500000 {$/;"	l
usb0	arch/arm/dts/at91sam9261.dtsi	/^		usb0: ohci@00500000 {$/;"	l
usb0	arch/arm/dts/at91sam9263.dtsi	/^		usb0: ohci@00a00000 {$/;"	l
usb0	arch/arm/dts/at91sam9g20-taurus.dts	/^		usb0: ohci@00500000 {$/;"	l
usb0	arch/arm/dts/at91sam9g45-corvus.dts	/^		usb0: ohci@00700000 {$/;"	l
usb0	arch/arm/dts/at91sam9g45.dtsi	/^		usb0: ohci@00700000 {$/;"	l
usb0	arch/arm/dts/fsl-ls1043a.dtsi	/^		usb0: usb3@2f00000 {$/;"	l
usb0	arch/arm/dts/fsl-ls2080a.dtsi	/^	usb0: usb3@3100000 {$/;"	l
usb0	arch/arm/dts/socfpga.dtsi	/^		usb0: usb@ffb00000 {$/;"	l
usb0	arch/arm/dts/uniphier-ld11.dtsi	/^		usb0: usb@5a800100 {$/;"	l
usb0	arch/arm/dts/uniphier-ld4.dtsi	/^	usb0: usb@5a800100 {$/;"	l
usb0	arch/arm/dts/uniphier-pro4.dtsi	/^	usb0: usb@65a00000 {$/;"	l
usb0	arch/arm/dts/uniphier-pro5.dtsi	/^	usb0: usb@65a00000 {$/;"	l
usb0	arch/arm/dts/uniphier-pxs2.dtsi	/^	usb0: usb@65a00000 {$/;"	l
usb0	arch/arm/dts/uniphier-sld3.dtsi	/^		usb0: usb@5a800100 {$/;"	l
usb0	arch/arm/dts/uniphier-sld8.dtsi	/^	usb0: usb@5a800100 {$/;"	l
usb0	arch/arm/dts/zynq-7000.dtsi	/^		usb0: usb@e0002000 {$/;"	l	label:amba
usb0	arch/arm/dts/zynqmp.dtsi	/^		usb0: usb@fe200000 {$/;"	l
usb0	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0;				\/* 0x80 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0_ahb_cntl	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0_ahb_cntl;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	usb0_aper_clk, usb1_aper_clk, gem0_aper_clk, gem1_aper_clk,$/;"	e	enum:zynq_clk
usb0_ce	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb0_ce;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_dm	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb0_dm;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_dp	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb0_dp;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_drvvbus	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb0_drvvbus;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_drvvbus	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int usb0_drvvbus;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0_fn_mod_ahb	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0_fn_mod_ahb;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0_id	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb0_id;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_id_det	arch/arm/dts/sun8i-r16-parrot.dts	/^	usb0_id_det: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-cubieboard.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-hyundai-a7hd.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-inet1.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-inet97fv2.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-inet9f-rev03.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-marsboard.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-mk802.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-pcduino.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-a13-empire-electronix-d709.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-a13-hsg-h702.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-a13-inet-98v-rev2.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-a13-olinuxino-micro.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-a13-olinuxino.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-q8-common.dtsi	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun6i-reference-design-tablet.dtsi	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-bananapi.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-cubieboard2.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-lamobo-r1.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-mk808c.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-orangepi.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-pcduino3-nano.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-pcduino3.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-wexler-tab7200.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun8i-a33-olinuxino.dts	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_id_detect_pin	arch/arm/dts/sun8i-reference-design-tablet.dtsi	/^	usb0_id_detect_pin: usb0_id_detect_pin@0 {$/;"	l
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int usb0_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int usb0_muxvals[] = {0, 1};$/;"	v	typeref:typename:const int[]	file:
usb0_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int usb0_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb0_phy	arch/arm/dts/am33xx.dtsi	/^			usb0_phy: usb-phy@47401300 {$/;"	l	label:usb
usb0_phy_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct usb0_phy_regs {$/;"	s
usb0_phy_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct usb0_phy_regs {$/;"	s
usb0_phy_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct usb0_phy_regs {$/;"	s
usb0_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux usb0_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
usb0_pins	arch/arm/mach-zynq/slcr.c	/^static const int usb0_pins[] = {$/;"	v	typeref:typename:const int[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned usb0_pins[] = {46, 47};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned usb0_pins[] = {46, 47};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned usb0_pins[] = {53, 54};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned usb0_pins[] = {56, 57};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned usb0_pins[] = {180, 181};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned usb0_pins[] = {124, 125};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned usb0_pins[] = {56, 57};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned usb0_pins[] = {13, 14};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned usb0_pins[] = {41, 42};$/;"	v	typeref:typename:const unsigned[]	file:
usb0_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0_read_qos;			\/* 0x4A100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0_vbus	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb0_vbus;$/;"	m	struct:pad_signals	typeref:typename:int
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-hyundai-a7hd.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-inet1.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-inet97fv2.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-inet9f-rev03.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-mk802.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-olinuxino-lime.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-a13-empire-electronix-d709.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-a13-hsg-h702.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-a13-inet-98v-rev2.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-a13-olinuxino-micro.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-a13-olinuxino.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-q8-common.dtsi	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun7i-a20-mk808c.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun7i-a20-olimex-som-evb.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun7i-a20-olinuxino-lime.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_detect_pin	arch/arm/dts/sun7i-a20-olinuxino-micro.dts	/^	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {$/;"	l
usb0_vbus_pin_a	arch/arm/dts/sun5i-q8-common.dtsi	/^	usb0_vbus_pin_a: usb0_vbus_pin@0 {$/;"	l
usb0_vbus_pin_a	arch/arm/dts/sun5i-reference-design-tablet.dtsi	/^	usb0_vbus_pin_a: usb0_vbus_pin@0 {$/;"	l
usb0_vbus_pin_a	arch/arm/dts/sun7i-a20-cubietruck.dts	/^	usb0_vbus_pin_a: usb0_vbus_pin@0 {$/;"	l
usb0_vbus_pin_a	arch/arm/dts/sunxi-common-regulators.dtsi	/^	usb0_vbus_pin_a: usb0_vbus_pin@0 {$/;"	l
usb0_vbus_pin_lime2	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^	usb0_vbus_pin_lime2: usb0_vbus_pin@0 {$/;"	l
usb0_vbus_pin_olinuxinom	arch/arm/dts/sun5i-a13-olinuxino-micro.dts	/^	usb0_vbus_pin_olinuxinom: usb0_vbus_pin@0 {$/;"	l
usb0_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb0_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usb0clkctrl;	\/* offset 0x1C *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
usb0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usb0clkctrl;	\/* offset 0x260 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
usb1	arch/arm/dts/am33xx.dtsi	/^			usb1: usb@47401800 {$/;"	l	label:usb
usb1	arch/arm/dts/am4372.dtsi	/^			usb1: usb@48390000 {$/;"	l	label:dwc3_1
usb1	arch/arm/dts/at91-sama5d2_xplained.dts	/^		usb1: ohci@00400000 {$/;"	l
usb1	arch/arm/dts/at91sam9260-smartweb.dts	/^			usb1: gadget@fffa4000 {$/;"	l
usb1	arch/arm/dts/at91sam9260.dtsi	/^			usb1: gadget@fffa4000 {$/;"	l
usb1	arch/arm/dts/at91sam9261.dtsi	/^			usb1: gadget@fffa4000 {$/;"	l
usb1	arch/arm/dts/at91sam9263.dtsi	/^			usb1: gadget@fff78000 {$/;"	l
usb1	arch/arm/dts/at91sam9g20-taurus.dts	/^			usb1: gadget@fffa4000 {$/;"	l
usb1	arch/arm/dts/at91sam9g45-corvus.dts	/^		usb1: ehci@00800000 {$/;"	l
usb1	arch/arm/dts/at91sam9g45-gurnard.dts	/^		usb1: ehci@00800000 {$/;"	l
usb1	arch/arm/dts/at91sam9g45.dtsi	/^		usb1: ehci@00800000 {$/;"	l
usb1	arch/arm/dts/dra7.dtsi	/^			usb1: usb@48890000 {$/;"	l	label:omap_dwc3_1
usb1	arch/arm/dts/fsl-ls1043a.dtsi	/^		usb1: usb3@3000000 {$/;"	l
usb1	arch/arm/dts/fsl-ls2080a.dtsi	/^	usb1: usb3@3110000 {$/;"	l
usb1	arch/arm/dts/k2e.dtsi	/^		usb1: usb@25000000 {$/;"	l
usb1	arch/arm/dts/sama5d2.dtsi	/^		usb1: ohci@00400000 {$/;"	l
usb1	arch/arm/dts/socfpga.dtsi	/^		usb1: usb@ffb40000 {$/;"	l
usb1	arch/arm/dts/uniphier-ld11.dtsi	/^		usb1: usb@5a810100 {$/;"	l
usb1	arch/arm/dts/uniphier-ld4.dtsi	/^	usb1: usb@5a810100 {$/;"	l
usb1	arch/arm/dts/uniphier-pro4.dtsi	/^	usb1: usb@65c00000 {$/;"	l
usb1	arch/arm/dts/uniphier-pro5.dtsi	/^	usb1: usb@65c00000 {$/;"	l
usb1	arch/arm/dts/uniphier-pxs2.dtsi	/^	usb1: usb@65c00000 {$/;"	l
usb1	arch/arm/dts/uniphier-sld3.dtsi	/^		usb1: usb@5a810100 {$/;"	l
usb1	arch/arm/dts/uniphier-sld8.dtsi	/^	usb1: usb@5a810100 {$/;"	l
usb1	arch/arm/dts/zynq-7000.dtsi	/^		usb1: usb@e0003000 {$/;"	l	label:amba
usb1	arch/arm/dts/zynqmp.dtsi	/^		usb1: usb@fe300000 {$/;"	l
usb1	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1_ahb_cntl	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1_ahb_cntl;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1_alignment_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct usb1_alignment_regs {$/;"	s
usb1_alignment_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct usb1_alignment_regs {$/;"	s
usb1_alignment_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct usb1_alignment_regs {$/;"	s
usb1_aper_clk	arch/arm/mach-zynq/include/mach/clk.h	/^	usb0_aper_clk, usb1_aper_clk, gem0_aper_clk, gem1_aper_clk,$/;"	e	enum:zynq_clk
usb1_ce	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb1_ce;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_chrg_det_stat	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_det_stat;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_det_stat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_det_stat;	\/* 0x1d0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_det_stat_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_det_stat_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_det_stat_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_det_stat_clr;	\/* 0x1d8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_det_stat_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_det_stat_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_det_stat_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_det_stat_set;	\/* 0x1d4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_det_stat_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_det_stat_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_det_stat_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_det_stat_tog;	\/* 0x1dc *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_detect	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_detect;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_detect	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_detect;	\/* 0x1b0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_detect_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_detect_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_detect_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_detect_clr;	\/* 0x1b8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_detect_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_detect_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_detect_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_detect_set;	\/* 0x1b4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_chrg_detect_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_chrg_detect_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_chrg_detect_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_chrg_detect_tog;	\/* 0x1bc *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_dm	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb1_dm;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_dp	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb1_dp;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_drvvbus	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb1_drvvbus;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_drvvbus	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int usb1_drvvbus;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_fn_mod	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1_fn_mod;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1_fn_mod_ahb	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1_fn_mod_ahb;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1_fn_mod_bm_iss	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1_fn_mod_bm_iss;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usb1_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb1_id	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb1_id;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_legacy_ctrl	arch/arm/include/asm/arch-tegra/usb.h	/^	uint usb1_legacy_ctrl;$/;"	m	struct:usb_ctlr	typeref:typename:uint
usb1_loopback	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_loopback;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_loopback	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_loopback;		\/* 0x1e0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_loopback_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_loopback_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_loopback_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_loopback_clr;	\/* 0x1e8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_loopback_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_loopback_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_loopback_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_loopback_set;	\/* 0x1e4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_loopback_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_loopback_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_loopback_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_loopback_tog;	\/* 0x1ec *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_misc	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_misc;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_misc	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_misc;		\/* 0x1f0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_misc_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_misc_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_misc_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_misc_clr;		\/* 0x1f8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_misc_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_misc_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_misc_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_misc_set;		\/* 0x1f4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_misc_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_misc_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_misc_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_misc_tog;		\/* 0x1fc *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int usb1_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int usb1_muxvals[] = {0, 1};$/;"	v	typeref:typename:const int[]	file:
usb1_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int usb1_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb1_phy	arch/arm/dts/am33xx.dtsi	/^			usb1_phy: usb-phy@47401b00 {$/;"	l	label:usb
usb1_phy	arch/arm/dts/k2e.dtsi	/^		usb1_phy: usb_phy@2620750 {$/;"	l
usb1_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux usb1_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
usb1_pins	arch/arm/dts/am437x-sk-evm.dts	/^	usb1_pins: usb1_pins {$/;"	l
usb1_pins	arch/arm/dts/am57xx-beagle-x15.dts	/^	usb1_pins: pinmux_usb1_pins {$/;"	l
usb1_pins	arch/arm/dts/dra7-evm.dts	/^	usb1_pins: pinmux_usb1_pins {$/;"	l
usb1_pins	arch/arm/mach-zynq/slcr.c	/^static const int usb1_pins[] = {$/;"	v	typeref:typename:const int[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned usb1_pins[] = {48, 49};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned usb1_pins[] = {48, 49};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned usb1_pins[] = {55, 56};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned usb1_pins[] = {58, 59};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned usb1_pins[] = {182, 183};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned usb1_pins[] = {126, 127};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned usb1_pins[] = {58, 59};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned usb1_pins[] = {15, 16};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned usb1_pins[] = {43, 44};$/;"	v	typeref:typename:const unsigned[]	file:
usb1_pll_480_ctrl	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_pll_480_ctrl;	\/* 0x010 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_pll_480_ctrl_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_pll_480_ctrl_clr;	\/* 0x018 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_pll_480_ctrl_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_pll_480_ctrl_set;	\/* 0x014 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_pll_480_ctrl_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_pll_480_ctrl_tog;	\/* 0x01c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_port_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct usb1_port_regs {$/;"	s
usb1_port_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct usb1_port_regs {$/;"	s
usb1_port_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct usb1_port_regs {$/;"	s
usb1_read_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1_read_qos;			\/* 0x4C100 *\/$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1_vbus	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int usb1_vbus;$/;"	m	struct:pad_signals	typeref:typename:int
usb1_vbus_det_stat	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_det_stat;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_det_stat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_det_stat;	\/* 0x1c0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_det_stat_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_det_stat_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_det_stat_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_det_stat_clr;	\/* 0x1c8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_det_stat_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_det_stat_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_det_stat_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_det_stat_set;	\/* 0x1c4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_det_stat_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_det_stat_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_det_stat_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_det_stat_tog;	\/* 0x1cc *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_detect	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_detect;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_detect	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_detect;	\/* 0x1a0 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_detect_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_detect_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_detect_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_detect_clr;	\/* 0x1a8 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_detect_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_detect_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_detect_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_detect_set;	\/* 0x1a4 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_detect_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb1_vbus_detect_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb1_vbus_detect_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb1_vbus_detect_tog;	\/* 0x1ac *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb1_vbus_pin_a	arch/arm/dts/sun6i-a31-app4-evb1.dts	/^	usb1_vbus_pin_a: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_a	arch/arm/dts/sunxi-common-regulators.dtsi	/^	usb1_vbus_pin_a: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_a20_hummingbird	arch/arm/dts/sun7i-a20-hummingbird.dts	/^	usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_bananapro	arch/arm/dts/sun7i-a20-bananapro.dts	/^	usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_bananapro	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_bananapro	arch/arm/dts/sun7i-a20-orangepi.dts	/^	usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_i7	arch/arm/dts/sun6i-a31-i7.dts	/^	usb1_vbus_pin_i7: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_m9	arch/arm/dts/sun6i-a31-m9.dts	/^	usb1_vbus_pin_m9: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_m9	arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts	/^	usb1_vbus_pin_m9: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_mk802	arch/arm/dts/sun5i-a10s-mk802.dts	/^	usb1_vbus_pin_mk802: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_olinuxino	arch/arm/dts/sun5i-a13-olinuxino.dts	/^	usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_olinuxino_m	arch/arm/dts/sun5i-a10s-olinuxino-micro.dts	/^	usb1_vbus_pin_olinuxino_m: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_olinuxinom	arch/arm/dts/sun5i-a13-olinuxino-micro.dts	/^	usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_optimus	arch/arm/dts/sun9i-a80-optimus.dts	/^	usb1_vbus_pin_optimus: usb1_vbus_pin@1 {$/;"	l
usb1_vbus_pin_parrot	arch/arm/dts/sun8i-r16-parrot.dts	/^	usb1_vbus_pin_parrot: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_pcduino3_nano	arch/arm/dts/sun7i-a20-pcduino3-nano.dts	/^	usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_pin_r7	arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts	/^	usb1_vbus_pin_r7: usb1_vbus_pin@0 {$/;"	l
usb1_vbus_reg	arch/arm/dts/tegra30-beaver.dts	/^		usb1_vbus_reg: regulator@4 {$/;"	l
usb1_vbus_reg	arch/arm/dts/tegra30-cardhu.dts	/^		usb1_vbus_reg: regulator@102 {$/;"	l
usb1_write_qos	arch/arm/mach-socfpga/include/mach/nic301.h	/^	u32	usb1_write_qos;$/;"	m	struct:nic301_registers	typeref:typename:u32
usb1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usb1clkctrl;	\/* offset 0x268 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
usb1dpslpcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 usb1dpslpcsr;\/* 0x004 USB1 Deep Sleep Control Status register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb1intsts	arch/sh/include/asm/cpu_sh7752.h	/^	unsigned int	usb1intsts;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
usb1intsts	arch/sh/include/asm/cpu_sh7753.h	/^	unsigned int	usb1intsts;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
usb1intsts	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	usb1intsts;$/;"	m	struct:usb1_port_regs	typeref:typename:unsigned int
usb1liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	usb1liodnr;	\/* USB 1 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
usb2	arch/arm/dts/am4372.dtsi	/^			usb2: usb@483d0000 {$/;"	l	label:dwc3_2
usb2	arch/arm/dts/armada-37xx.dtsi	/^			usb2: usb@5e000 {$/;"	l
usb2	arch/arm/dts/at91-sama5d2_xplained.dts	/^		usb2: ehci@00500000 {$/;"	l
usb2	arch/arm/dts/at91sam9g45-corvus.dts	/^			usb2: gadget@fff78000 {$/;"	l
usb2	arch/arm/dts/at91sam9g45.dtsi	/^			usb2: gadget@fff78000 {$/;"	l
usb2	arch/arm/dts/dra7.dtsi	/^			usb2: usb@488d0000 {$/;"	l	label:omap_dwc3_2
usb2	arch/arm/dts/fsl-ls1043a.dtsi	/^		usb2: usb3@3100000 {$/;"	l
usb2	arch/arm/dts/sama5d2.dtsi	/^		usb2: ehci@00500000 {$/;"	l
usb2	arch/arm/dts/uniphier-ld11.dtsi	/^		usb2: usb@5a820100 {$/;"	l
usb2	arch/arm/dts/uniphier-ld4.dtsi	/^	usb2: usb@5a820100 {$/;"	l
usb2	arch/arm/dts/uniphier-pro4.dtsi	/^	usb2: usb@5a800100 {$/;"	l
usb2	arch/arm/dts/uniphier-sld3.dtsi	/^		usb2: usb@5a820100 {$/;"	l
usb2	arch/arm/dts/uniphier-sld8.dtsi	/^	usb2: usb@5a820100 {$/;"	l
usb20_host0_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb20_host0_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb20_host0_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb20_host0_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb20_host1_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb20_host1_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb20_host1_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb20_host1_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb20phy_cfg	arch/arm/mach-exynos/include/mach/system.h	/^	unsigned int	usb20phy_cfg;$/;"	m	struct:exynos5_sysreg	typeref:typename:unsigned int
usb2_chrg_det_stat	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_det_stat;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_det_stat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_det_stat;	\/* 0x230 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_det_stat_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_det_stat_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_det_stat_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_det_stat_clr;	\/* 0x238 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_det_stat_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_det_stat_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_det_stat_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_det_stat_set;	\/* 0x234 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_det_stat_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_det_stat_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_det_stat_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_det_stat_tog;	\/* 0x23c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_detect	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_detect;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_detect	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_detect;	\/* 0x210 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_detect_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_detect_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_detect_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_detect_clr;	\/* 0x218 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_detect_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_detect_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_detect_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_detect_set;	\/* 0x214 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_chrg_detect_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_chrg_detect_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_chrg_detect_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_chrg_detect_tog;	\/* 0x21c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_device_reset_through_fpga	board/amcc/bamboo/bamboo.c	/^void usb2_device_reset_through_fpga(void)$/;"	f	typeref:typename:void
usb2_device_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void usb2_device_selection_in_fpga(void)$/;"	f	typeref:typename:void
usb2_host_selection_in_fpga	board/amcc/bamboo/bamboo.c	/^void usb2_host_selection_in_fpga(void)$/;"	f	typeref:typename:void
usb2_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usb2_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb2_loopback	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_loopback;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_loopback	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_loopback;		\/* 0x240 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_loopback_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_loopback_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_loopback_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_loopback_clr;	\/* 0x248 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_loopback_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_loopback_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_loopback_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_loopback_set;	\/* 0x244 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_loopback_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_loopback_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_loopback_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_loopback_tog;	\/* 0x24c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_misc	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_misc;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_misc	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_misc;		\/* 0x250 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_misc_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_misc_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_misc_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_misc_clr;		\/* 0x258 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_misc_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_misc_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_misc_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_misc_set;		\/* 0x254 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_misc_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_misc_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_misc_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_misc_tog;		\/* 0x25c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const int usb2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int usb2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int usb2_muxvals[] = {4, 4};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int usb2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int usb2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const int usb2_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int usb2_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int usb2_muxvals[] = {0, 1};$/;"	v	typeref:typename:const int[]	file:
usb2_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const int usb2_muxvals[] = {1, 1};$/;"	v	typeref:typename:const int[]	file:
usb2_phy1	arch/arm/dts/am4372.dtsi	/^			usb2_phy1: phy@483a8000 {$/;"	l	label:ocp2scp0
usb2_phy1	arch/arm/dts/dra7.dtsi	/^			usb2_phy1: phy@4a084000 {$/;"	l
usb2_phy2	arch/arm/dts/am4372.dtsi	/^			usb2_phy2: phy@483e8000 {$/;"	l	label:ocp2scp1
usb2_phy2	arch/arm/dts/dra7.dtsi	/^			usb2_phy2: phy@4a085000 {$/;"	l
usb2_phy_power	drivers/usb/dwc3/ti_usb_phy.c	/^	void __iomem *usb2_phy_power;$/;"	m	struct:ti_usb_phy	typeref:typename:void __iomem *	file:
usb2_phy_power	include/ti-usb-phy-uboot.h	/^	void *usb2_phy_power;$/;"	m	struct:ti_usb_phy_device	typeref:typename:void *
usb2_pins	arch/arm/dts/am437x-sk-evm.dts	/^	usb2_pins: usb2_pins {$/;"	l
usb2_pins	arch/arm/dts/dra7-evm.dts	/^	usb2_pins: pinmux_usb2_pins {$/;"	l
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c	/^static const unsigned usb2_pins[] = {50, 51};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned usb2_pins[] = {50, 51};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned usb2_pins[] = {155, 156};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned usb2_pins[] = {60, 61};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned usb2_pins[] = {184, 185};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c	/^static const unsigned usb2_pins[] = {128, 129};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned usb2_pins[] = {60, 61};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned usb2_pins[] = {17, 18};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c	/^static const unsigned usb2_pins[] = {114, 115};$/;"	v	typeref:typename:const unsigned[]	file:
usb2_pll_480_ctrl	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_pll_480_ctrl;	\/* 0x020 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_pll_480_ctrl_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_pll_480_ctrl_clr;	\/* 0x028 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_pll_480_ctrl_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_pll_480_ctrl_set;	\/* 0x024 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_pll_480_ctrl_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_pll_480_ctrl_tog;	\/* 0x02c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_port_location	arch/x86/include/asm/arch-broadwell/pei_data.h	/^enum usb2_port_location {$/;"	g
usb2_port_setting	arch/x86/include/asm/arch-broadwell/pei_data.h	/^struct usb2_port_setting {$/;"	s
usb2_ports	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];$/;"	m	struct:pei_data	typeref:struct:usb2_port_setting[]
usb2_power_up_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params usb2_power_up_params[] = {$/;"	v	typeref:struct:op_params[]
usb2_sel	board/freescale/p1010rdb/p1010rdb.c	/^	u8 usb2_sel;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
usb2_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 usb2_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb2_vbus_det_stat	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_det_stat;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_det_stat	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_det_stat;	\/* 0x220 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_det_stat_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_det_stat_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_det_stat_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_det_stat_clr;	\/* 0x228 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_det_stat_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_det_stat_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_det_stat_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_det_stat_set;	\/* 0x224 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_det_stat_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_det_stat_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_det_stat_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_det_stat_tog;	\/* 0x22c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_detect	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_detect;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_detect	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_detect;	\/* 0x200 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_detect_clr	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_detect_clr;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_detect_clr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_detect_clr;	\/* 0x208 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_detect_set	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_detect_set;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_detect_set	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_detect_set;	\/* 0x204 *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_detect_tog	arch/arm/include/asm/arch-mx6/crm_regs.h	/^	u32 usb2_vbus_detect_tog;$/;"	m	struct:mxc_ccm_reg	typeref:typename:u32
usb2_vbus_detect_tog	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	usb2_vbus_detect_tog;	\/* 0x20c *\/$/;"	m	struct:anatop_regs	typeref:typename:u32
usb2_vbus_pin_a	arch/arm/dts/sun4i-a10-ba10-tvbox.dts	/^	usb2_vbus_pin_a: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_a	arch/arm/dts/sun7i-a20-primo73.dts	/^			usb2_vbus_pin_a: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_a	arch/arm/dts/sunxi-common-regulators.dtsi	/^	usb2_vbus_pin_a: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_bananapro	arch/arm/dts/sun7i-a20-bananapro.dts	/^	usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_bananapro	arch/arm/dts/sun7i-a20-orangepi-mini.dts	/^	usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_bananapro	arch/arm/dts/sun7i-a20-orangepi.dts	/^	usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_colombus	arch/arm/dts/sun6i-a31-colombus.dts	/^	usb2_vbus_pin_colombus: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_hackberry	arch/arm/dts/sun4i-a10-hackberry.dts	/^	usb2_vbus_pin_hackberry: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_mk802	arch/arm/dts/sun4i-a10-mk802.dts	/^	usb2_vbus_pin_mk802: usb2_vbus_pin@0 {$/;"	l
usb2_vbus_pin_pcduino2	arch/arm/dts/sun4i-a10-pcduino2.dts	/^	usb2_vbus_pin_pcduino2: usb2_vbus_pin@0 {$/;"	l
usb2b_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const int usb2b_muxvals[] = {23, 23};$/;"	v	typeref:typename:const int[]	file:
usb2b_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c	/^static const unsigned usb2b_pins[] = {67, 68};$/;"	v	typeref:typename:const unsigned[]	file:
usb2dpslpcsr	arch/powerpc/include/asm/immap_85xx.h	/^	u32 usb2dpslpcsr;\/* 0x008 USB2 Deep Sleep Control Status register *\/$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb2liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	usb2liodnr;	\/* USB 2 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
usb2phy_reg	drivers/usb/phy/rockchip_usb2_phy.c	/^struct usb2phy_reg {$/;"	s	file:
usb3	arch/arm/dts/armada-37xx.dtsi	/^			usb3: usb@58000 {$/;"	l
usb3	arch/arm/dts/dra7.dtsi	/^			usb3: usb@48910000 {$/;"	l	label:omap_dwc3_3
usb3	arch/arm/dts/uniphier-pro4.dtsi	/^	usb3: usb@5a810100 {$/;"	l
usb3	arch/arm/dts/uniphier-sld3.dtsi	/^		usb3: usb@5a830100 {$/;"	l
usb3	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	struct pch_usb3_controller_settings usb3;$/;"	m	struct:pei_data	typeref:struct:pch_usb3_controller_settings
usb32_ctrl_id_mode	drivers/phy/marvell/comphy_a3700.h	/^#define usb32_ctrl_id_mode	/;"	d
usb32_ctrl_int_mode	drivers/phy/marvell/comphy_a3700.h	/^#define usb32_ctrl_int_mode	/;"	d
usb32_ctrl_soft_id	drivers/phy/marvell/comphy_a3700.h	/^#define usb32_ctrl_soft_id	/;"	d
usb3_device_config_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params usb3_device_config_params[] = {$/;"	v	typeref:struct:op_params[]
usb3_dpll_map	drivers/usb/dwc3/ti_usb_phy.c	/^struct usb3_dpll_map {$/;"	s	file:
usb3_dpll_map	drivers/usb/phy/omap_usb_phy.c	/^struct usb3_dpll_map {$/;"	s	file:
usb3_dpll_params	drivers/usb/dwc3/ti_usb_phy.c	/^struct usb3_dpll_params {$/;"	s	file:
usb3_dpll_params	drivers/usb/phy/omap_usb_phy.c	/^struct usb3_dpll_params {$/;"	s	file:
usb3_electrical_config_serdes_rev1_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params usb3_electrical_config_serdes_rev1_params[] = {$/;"	v	typeref:struct:op_params[]
usb3_electrical_config_serdes_rev2_params	arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c	/^struct op_params usb3_electrical_config_serdes_rev2_params[] = {$/;"	v	typeref:struct:op_params[]
usb3_icid	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usb3_icid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb3_link_state	include/linux/usb/ch9.h	/^enum usb3_link_state {$/;"	g
usb3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const int usb3_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const int usb3_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const int usb3_muxvals[] = {0, 0};$/;"	v	typeref:typename:const int[]	file:
usb3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const int usb3_muxvals[] = {8, 8};$/;"	v	typeref:typename:const int[]	file:
usb3_muxvals	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const int usb3_muxvals[] = {0, 1};$/;"	v	typeref:typename:const int[]	file:
usb3_perf_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_con2	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_con2;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_rd_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_rd_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_rd_latency_acc_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_rd_latency_acc_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_rd_latency_samp_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_rd_latency_samp_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_rd_max_latency_num	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_rd_max_latency_num;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_working_cnt	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_working_cnt;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_perf_wr_axi_total_byte	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3_perf_wr_axi_total_byte;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3_phy	drivers/usb/host/xhci-exynos5.c	/^	struct exynos_usb3_phy *usb3_phy;$/;"	m	struct:exynos_xhci	typeref:struct:exynos_usb3_phy *	file:
usb3_phy	include/linux/usb/xhci-omap.h	/^	struct omap_usb3_phy *usb3_phy;$/;"	m	struct:omap_xhci	typeref:struct:omap_usb3_phy *
usb3_phy1	arch/arm/dts/dra7.dtsi	/^			usb3_phy1: phy@4a084400 {$/;"	l
usb3_phy_partial_powerup	drivers/usb/phy/omap_usb_phy.c	/^static void usb3_phy_partial_powerup(struct omap_usb3_phy *phy_regs)$/;"	f	typeref:typename:void	file:
usb3_phy_power	drivers/usb/dwc3/ti_usb_phy.c	/^	void __iomem *usb3_phy_power;$/;"	m	struct:ti_usb_phy	typeref:typename:void __iomem *	file:
usb3_phy_power	include/ti-usb-phy-uboot.h	/^	void *usb3_phy_power;$/;"	m	struct:ti_usb_phy_device	typeref:typename:void *
usb3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c	/^static const unsigned usb3_pins[] = {52, 53};$/;"	v	typeref:typename:const unsigned[]	file:
usb3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c	/^static const unsigned usb3_pins[] = {62, 63};$/;"	v	typeref:typename:const unsigned[]	file:
usb3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c	/^static const unsigned usb3_pins[] = {186, 187};$/;"	v	typeref:typename:const unsigned[]	file:
usb3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c	/^static const unsigned usb3_pins[] = {62, 63};$/;"	v	typeref:typename:const unsigned[]	file:
usb3_pins	drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c	/^static const unsigned usb3_pins[] = {19, 20};$/;"	v	typeref:typename:const unsigned[]	file:
usb3_port_setting	arch/x86/include/asm/arch-broadwell/pei_data.h	/^struct usb3_port_setting {$/;"	s
usb3_ports	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];$/;"	m	struct:pei_data	typeref:struct:usb3_port_setting[]
usb3_streamid	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 usb3_streamid;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb3_txout_de_emp_adj	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t usb3_txout_de_emp_adj[MAX_USB3_PORTS];$/;"	m	struct:pei_data	typeref:typename:uint8_t[]
usb3_txout_imp_adj_volt_amp	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t usb3_txout_imp_adj_volt_amp[MAX_USB3_PORTS];$/;"	m	struct:pei_data	typeref:typename:uint8_t[]
usb3_txout_imp_sc_volt_amp_adj	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t usb3_txout_imp_sc_volt_amp_adj[MAX_USB3_PORTS];$/;"	m	struct:pei_data	typeref:typename:uint8_t[]
usb3_txout_volt_dn_amp_adj	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint8_t usb3_txout_volt_dn_amp_adj[MAX_USB3_PORTS];$/;"	m	struct:pei_data	typeref:typename:uint8_t[]
usb3_vbus_pin_a	arch/arm/dts/sun8i-h3-orangepi-plus.dts	/^	usb3_vbus_pin_a: usb3_vbus_pin@0 {$/;"	l
usb3_vbus_pin_optimus	arch/arm/dts/sun9i-a80-optimus.dts	/^	usb3_vbus_pin_optimus: usb3_vbus_pin@1 {$/;"	l
usb3_vbus_reg	arch/arm/dts/tegra30-beaver.dts	/^		usb3_vbus_reg: regulator@5 {$/;"	l
usb3_vbus_reg	arch/arm/dts/tegra30-cardhu.dts	/^		usb3_vbus_reg: regulator@103 {$/;"	l
usb3liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	usb3liodnr;	\/* USB 3 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
usb3ogt1_status_cb	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3ogt1_status_cb;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg0_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg0_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg0_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg0_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg0_status_cb	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg0_status_cb;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg0_status_lat0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg0_status_lat0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg0_status_lat1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg0_status_lat1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg1_con0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg1_con0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg1_con1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg1_con1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg1_status_lat0	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg1_status_lat0;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3otg1_status_lat1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usb3otg1_status_lat1;$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32
usb3prm1cr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 usb3prm1cr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb3prm3cr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 usb3prm3cr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb4	arch/arm/dts/dra74x.dtsi	/^			usb4: usb@48950000 {$/;"	l	label:omap_dwc3_4
usb4liodnr	arch/powerpc/include/asm/immap_85xx.h	/^	u32	usb4liodnr;	\/* USB 4 LIODN *\/$/;"	m	struct:ccsr_gur	typeref:typename:u32
usb4prm2cr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 usb4prm2cr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct usb83xx {$/;"	s
usb83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} usb83xx_t;$/;"	t	typeref:struct:usb83xx
usb_0	arch/sandbox/dts/test.dts	/^	usb_0: usb@0 {$/;"	l
usb_0	arch/x86/dts/chromebook_link.dts	/^		usb_0: usb@1d,0 {$/;"	l
usb_0	arch/x86/dts/chromebook_samus.dts	/^		usb_0: usb@1d,0 {$/;"	l
usb_1	arch/sandbox/dts/test.dts	/^	usb_1: usb@1 {$/;"	l
usb_1	arch/x86/dts/chromebook_link.dts	/^		usb_1: usb@1a,0 {$/;"	l
usb_1	arch/x86/dts/chromebook_samus.dts	/^		usb_1: usb@14,0 {$/;"	l
usb_2	arch/sandbox/dts/test.dts	/^	usb_2: usb@2 {$/;"	l
usb_a9263_macb_hw_init	board/calao/usb_a9263/usb_a9263.c	/^static void usb_a9263_macb_hw_init(void)$/;"	f	typeref:typename:void	file:
usb_a9263_nand_hw_init	board/calao/usb_a9263/usb_a9263.c	/^static void usb_a9263_nand_hw_init(void)$/;"	f	typeref:typename:void	file:
usb_add_config	drivers/usb/gadget/composite.c	/^int usb_add_config(struct usb_composite_dev *cdev,$/;"	f	typeref:typename:int
usb_add_function	drivers/usb/gadget/composite.c	/^int usb_add_function(struct usb_configuration *config,$/;"	f	typeref:typename:int
usb_add_gadget_udc	drivers/usb/gadget/udc/udc-core.c	/^int usb_add_gadget_udc(struct device *parent, struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_add_gadget_udc_release	drivers/usb/gadget/udc/udc-core.c	/^int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget,$/;"	f	typeref:typename:int
usb_address	drivers/usb/gadget/dwc2_udc_otg_priv.h	/^	unsigned char usb_address;$/;"	m	struct:dwc2_udc	typeref:typename:unsigned char
usb_alloc_device	common/usb.c	/^__weak int usb_alloc_device(struct usb_device *udev)$/;"	f	typeref:typename:__weak int
usb_alloc_device	drivers/usb/host/usb-uclass.c	/^int usb_alloc_device(struct usb_device *udev)$/;"	f	typeref:typename:int
usb_alloc_device	drivers/usb/host/xhci.c	/^int usb_alloc_device(struct usb_device *udev)$/;"	f	typeref:typename:int
usb_alloc_new_device	common/usb.c	/^int usb_alloc_new_device(struct udevice *controller, struct usb_device **devp)$/;"	f	typeref:typename:int
usb_alternate_instance	include/usbdevice.h	/^struct usb_alternate_instance {$/;"	s
usb_amount_left	drivers/usb/gadget/f_mass_storage.c	/^	u32			usb_amount_left;$/;"	m	struct:fsg_common	typeref:typename:u32	file:
usb_asr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_asr;$/;"	m	struct:usb	typeref:typename:ulong
usb_base_addr	arch/sparc/cpu/leon3/usb_uhci.c	/^unsigned int usb_base_addr;	\/* base address *\/$/;"	v	typeref:typename:unsigned int
usb_base_addr	board/mpl/common/usb_uhci.c	/^unsigned int usb_base_addr;       \/* base address *\/$/;"	v	typeref:typename:unsigned int
usb_base_address	drivers/usb/host/ehci-rmobile.c	/^static u32 usb_base_address[] = {$/;"	v	typeref:typename:u32[]	file:
usb_bin_fixup	common/usb_storage.c	/^static void usb_bin_fixup(struct usb_device_descriptor descriptor,$/;"	f	typeref:typename:void	file:
usb_bitmap	drivers/usb/musb-new/musb_dsps.c	/^	u32		usb_bitmap;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
usb_board_stop	board/amcc/canyonlands/canyonlands.c	/^int usb_board_stop(void)$/;"	f	typeref:typename:int
usb_board_stop	board/esd/pmc440/pmc440.c	/^int usb_board_stop(void)$/;"	f	typeref:typename:int
usb_board_stop	board/toradex/colibri_pxa270/colibri_pxa270.c	/^void usb_board_stop(void)$/;"	f	typeref:typename:void
usb_board_stop	board/zipitz2/zipitz2.c	/^void usb_board_stop(void)$/;"	f	typeref:typename:void
usb_boot_selected	arch/arm/cpu/arm926ejs/spear/spear600.c	/^int usb_boot_selected(void)$/;"	f	typeref:typename:int
usb_bos_descriptor	include/linux/usb/ch9.h	/^struct usb_bos_descriptor {$/;"	s
usb_brg_adrdec_setup	drivers/usb/host/ehci-marvell.c	/^static void usb_brg_adrdec_setup(int index)$/;"	f	typeref:typename:void	file:
usb_brg_adrdec_setup	drivers/usb/host/ehci-marvell.c	/^static void usb_brg_adrdec_setup(void *base)$/;"	f	typeref:typename:void	file:
usb_bulk_msg	common/usb.c	/^int usb_bulk_msg(struct usb_device *dev, unsigned int pipe,$/;"	f	typeref:typename:int
usb_bus_instance	include/usbdevice.h	/^struct usb_bus_instance {$/;"	s
usb_bus_priv	include/usb.h	/^struct usb_bus_priv {$/;"	s
usb_ccb	common/usb_storage.c	/^static ccb usb_ccb __attribute__((aligned(ARCH_DMA_MINALIGN)));$/;"	v	typeref:typename:ccb	file:
usb_cdc_acm_descriptor	include/linux/usb/cdc.h	/^struct usb_cdc_acm_descriptor {$/;"	s
usb_cdc_attribute_vendor_descriptor	drivers/usb/gadget/f_thor.h	/^struct usb_cdc_attribute_vendor_descriptor {$/;"	s
usb_cdc_call_mgmt_descriptor	include/linux/usb/cdc.h	/^struct usb_cdc_call_mgmt_descriptor {$/;"	s
usb_cdc_country_functional_desc	include/linux/usb/cdc.h	/^struct usb_cdc_country_functional_desc {$/;"	s
usb_cdc_ether_desc	include/linux/usb/cdc.h	/^struct usb_cdc_ether_desc {$/;"	s
usb_cdc_header_desc	include/linux/usb/cdc.h	/^struct usb_cdc_header_desc {$/;"	s
usb_cdc_line_coding	include/linux/usb/cdc.h	/^struct usb_cdc_line_coding {$/;"	s
usb_cdc_mdlm_desc	include/linux/usb/cdc.h	/^struct usb_cdc_mdlm_desc {$/;"	s
usb_cdc_mdlm_detail_desc	include/linux/usb/cdc.h	/^struct usb_cdc_mdlm_detail_desc {$/;"	s
usb_cdc_network_terminal_desc	include/linux/usb/cdc.h	/^struct usb_cdc_network_terminal_desc {$/;"	s
usb_cdc_notification	include/linux/usb/cdc.h	/^struct usb_cdc_notification {$/;"	s
usb_cdc_union_desc	include/linux/usb/cdc.h	/^struct usb_cdc_union_desc {$/;"	s
usb_cfg_addr	drivers/phy/marvell/comphy_cp110.c	/^	void __iomem *usb_cfg_addr;$/;"	m	struct:utmi_phy_data	typeref:typename:void __iomem *	file:
usb_cfgram	arch/m68k/include/asm/immap_5272.h	/^	uchar usb_cfgram[1024];$/;"	m	struct:usb	typeref:typename:uchar[1024]
usb_check_int_chain	arch/sparc/cpu/leon3/usb_uhci.c	/^void usb_check_int_chain(void)$/;"	f	typeref:typename:void
usb_check_int_chain	board/mpl/common/usb_uhci.c	/^void usb_check_int_chain(void)$/;"	f	typeref:typename:void
usb_check_skel	arch/sparc/cpu/leon3/usb_uhci.c	/^void usb_check_skel(void)$/;"	f	typeref:typename:void
usb_check_skel	board/mpl/common/usb_uhci.c	/^void usb_check_skel(void)$/;"	f	typeref:typename:void
usb_child_post_bind	drivers/usb/host/usb-uclass.c	/^int usb_child_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int
usb_child_pre_probe	drivers/usb/host/usb-uclass.c	/^int usb_child_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int
usb_class_abstract_control_descriptor	include/usbdescriptors.h	/^struct usb_class_abstract_control_descriptor {$/;"	s
usb_class_acm	drivers/serial/usbtty.c	/^	struct usb_class_abstract_control_descriptor usb_class_acm;$/;"	m	struct:acm_config_desc	typeref:struct:usb_class_abstract_control_descriptor	file:
usb_class_atm_networking_descriptor	include/usbdescriptors.h	/^struct usb_class_atm_networking_descriptor {$/;"	s
usb_class_call_management_descriptor	include/usbdescriptors.h	/^struct usb_class_call_management_descriptor {$/;"	s
usb_class_call_mgt	drivers/serial/usbtty.c	/^	struct usb_class_call_management_descriptor usb_class_call_mgt;$/;"	m	struct:acm_config_desc	typeref:struct:usb_class_call_management_descriptor	file:
usb_class_capi_control_descriptor	include/usbdescriptors.h	/^struct usb_class_capi_control_descriptor {$/;"	s
usb_class_country_selection_descriptor	include/usbdescriptors.h	/^struct usb_class_country_selection_descriptor {$/;"	s
usb_class_descriptor	include/usbdescriptors.h	/^struct usb_class_descriptor {$/;"	s
usb_class_direct_line_descriptor	include/usbdescriptors.h	/^struct usb_class_direct_line_descriptor {$/;"	s
usb_class_ethernet_networking_descriptor	include/usbdescriptors.h	/^struct usb_class_ethernet_networking_descriptor {$/;"	s
usb_class_extension_unit_descriptor	include/usbdescriptors.h	/^struct usb_class_extension_unit_descriptor {$/;"	s
usb_class_function_descriptor	include/usbdescriptors.h	/^struct usb_class_function_descriptor {$/;"	s
usb_class_function_descriptor_generic	include/usbdescriptors.h	/^struct usb_class_function_descriptor_generic {$/;"	s
usb_class_header	drivers/serial/usbtty.c	/^	struct usb_class_header_function_descriptor usb_class_header;$/;"	m	struct:acm_config_desc	typeref:struct:usb_class_header_function_descriptor	file:
usb_class_header_function_descriptor	include/usbdescriptors.h	/^struct usb_class_header_function_descriptor {$/;"	s
usb_class_hid_descriptor	include/linux/usb/ch9.h	/^struct __packed usb_class_hid_descriptor {$/;"	s
usb_class_hid_descriptor	include/usbdescriptors.h	/^struct usb_class_hid_descriptor {$/;"	s
usb_class_mdlm_descriptor	include/usbdescriptors.h	/^struct usb_class_mdlm_descriptor {$/;"	s
usb_class_mdlmd_descriptor	include/usbdescriptors.h	/^struct usb_class_mdlmd_descriptor {$/;"	s
usb_class_multi_channel_descriptor	include/usbdescriptors.h	/^struct usb_class_multi_channel_descriptor {$/;"	s
usb_class_network_channel_descriptor	include/usbdescriptors.h	/^struct usb_class_network_channel_descriptor {$/;"	s
usb_class_protocol_unit_function_descriptor	include/usbdescriptors.h	/^struct usb_class_protocol_unit_function_descriptor {$/;"	s
usb_class_report_descriptor	include/linux/usb/ch9.h	/^struct __packed usb_class_report_descriptor {$/;"	s
usb_class_report_descriptor	include/usbdescriptors.h	/^struct usb_class_report_descriptor {$/;"	s
usb_class_telephone_call_descriptor	include/usbdescriptors.h	/^struct usb_class_telephone_call_descriptor {$/;"	s
usb_class_telephone_operational_descriptor	include/usbdescriptors.h	/^struct usb_class_telephone_operational_descriptor {$/;"	s
usb_class_telephone_ringer_descriptor	include/usbdescriptors.h	/^struct usb_class_telephone_ringer_descriptor {$/;"	s
usb_class_union	drivers/serial/usbtty.c	/^	struct usb_class_union_function_descriptor usb_class_union;$/;"	m	struct:acm_config_desc	typeref:struct:usb_class_union_function_descriptor	file:
usb_class_union_function_descriptor	include/usbdescriptors.h	/^struct usb_class_union_function_descriptor {$/;"	s
usb_class_usb_terminal_descriptor	include/usbdescriptors.h	/^struct usb_class_usb_terminal_descriptor {$/;"	s
usb_clear_halt	common/usb.c	/^int usb_clear_halt(struct usb_device *dev, int pipe)$/;"	f	typeref:typename:int
usb_clear_port_feature	common/usb_hub.c	/^static int usb_clear_port_feature(struct usb_device *dev, int port, int feature)$/;"	f	typeref:typename:int	file:
usb_clk	arch/arm/dts/sun4i-a10.dtsi	/^		usb_clk: clk@01c200cc {$/;"	l
usb_clk	arch/arm/dts/sun5i.dtsi	/^		usb_clk: clk@01c200cc {$/;"	l
usb_clk	arch/arm/dts/sun6i-a31.dtsi	/^		usb_clk: clk@01c200cc {$/;"	l
usb_clk	arch/arm/dts/sun7i-a20.dtsi	/^		usb_clk: clk@01c200cc {$/;"	l
usb_clk	arch/arm/dts/sun8i-a23-a33.dtsi	/^		usb_clk: clk@01c200cc {$/;"	l
usb_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 usb_clk_cfg;	\/* 0xcc *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
usb_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 usb_clk_cfg;	\/* 0xcc USB clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
usb_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 usb_clk_cfg;	\/* 0xcc USB clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
usb_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 usb_clk_cfg;	\/* 0xcc *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
usb_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 usb_clk_cfg;	\/* 0xcc USB clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
usb_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 usb_clk_cfg;	\/* 0xcc USB clock control *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
usb_cmd	arch/arm/include/asm/arch-tegra/usb.h	/^	uint usb_cmd;$/;"	m	struct:usb_ctlr	typeref:typename:uint
usb_common_init	drivers/usb/host/ehci-tegra.c	/^int usb_common_init(struct fdt_usb *config, enum usb_init_type init)$/;"	f	typeref:typename:int
usb_common_regs	arch/sh/include/asm/cpu_sh7752.h	/^struct usb_common_regs {$/;"	s
usb_common_regs	arch/sh/include/asm/cpu_sh7753.h	/^struct usb_common_regs {$/;"	s
usb_common_regs	arch/sh/include/asm/cpu_sh7757.h	/^struct usb_common_regs {$/;"	s
usb_common_uninit	drivers/usb/host/ehci-tegra.c	/^void usb_common_uninit(struct fdt_usb *priv)$/;"	f	typeref:typename:void
usb_complete_t	drivers/usb/musb-new/usb-compat.h	/^typedef void (*usb_complete_t)(struct urb *);$/;"	t	typeref:typename:void (*)(struct urb *)
usb_composite_dev	include/linux/usb/composite.h	/^struct usb_composite_dev {$/;"	s
usb_composite_driver	include/linux/usb/composite.h	/^struct usb_composite_driver {$/;"	s
usb_composite_register	drivers/usb/gadget/composite.c	/^int usb_composite_register(struct usb_composite_driver *driver)$/;"	f	typeref:typename:int
usb_composite_unregister	drivers/usb/gadget/composite.c	/^void usb_composite_unregister(struct usb_composite_driver *driver)$/;"	f	typeref:typename:void
usb_config	include/usb.h	/^struct usb_config {$/;"	s
usb_config_descriptor	include/linux/usb/ch9.h	/^struct usb_config_descriptor {$/;"	s
usb_configuration	include/linux/usb/composite.h	/^struct usb_configuration {$/;"	s
usb_configuration_descriptor	include/usbdescriptors.h	/^struct usb_configuration_descriptor {$/;"	s
usb_configuration_instance	include/usbdevice.h	/^struct usb_configuration_instance {$/;"	s
usb_connection_context	include/linux/usb/ch9.h	/^struct usb_connection_context {$/;"	s
usb_control_msg	common/usb.c	/^int usb_control_msg(struct usb_device *dev, unsigned int pipe,$/;"	f	typeref:typename:int
usb_copy_descriptors	drivers/usb/gadget/f_mass_storage.c	/^usb_copy_descriptors(struct usb_descriptor_header **src)$/;"	f	typeref:struct:usb_descriptor_header **
usb_cpu_init	arch/arm/cpu/pxa/usb.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	arch/powerpc/cpu/mpc5xxx/usb.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	arch/powerpc/cpu/ppc4xx/usb.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	drivers/usb/host/ohci-at91.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	drivers/usb/host/ohci-da8xx.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	drivers/usb/host/ohci-ep93xx.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	drivers/usb/host/ohci-lpc32xx.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init	drivers/usb/host/ohci-s3c24xx.c	/^int usb_cpu_init(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	arch/arm/cpu/pxa/usb.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	arch/powerpc/cpu/mpc5xxx/usb.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	arch/powerpc/cpu/ppc4xx/usb.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	drivers/usb/host/ohci-at91.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	drivers/usb/host/ohci-da8xx.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	drivers/usb/host/ohci-ep93xx.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	drivers/usb/host/ohci-lpc32xx.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_init_fail	drivers/usb/host/ohci-s3c24xx.c	/^int usb_cpu_init_fail(void)$/;"	f	typeref:typename:int
usb_cpu_stop	arch/arm/cpu/pxa/usb.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	arch/powerpc/cpu/mpc5xxx/usb.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	arch/powerpc/cpu/ppc4xx/usb.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	drivers/usb/host/ohci-at91.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	drivers/usb/host/ohci-da8xx.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	drivers/usb/host/ohci-ep93xx.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	drivers/usb/host/ohci-lpc32xx.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_cpu_stop	drivers/usb/host/ohci-s3c24xx.c	/^int usb_cpu_stop(void)$/;"	f	typeref:typename:int
usb_ctlr	arch/arm/include/asm/arch-tegra/usb.h	/^struct usb_ctlr {$/;"	s
usb_ctlr	include/linux/immap_qe.h	/^typedef struct usb_ctlr {$/;"	s
usb_ctlr_type	drivers/usb/host/ehci-tegra.c	/^enum usb_ctlr_type {$/;"	g	file:
usb_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 usb_ctrl;		\/* USB Control Register			*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
usb_ctrl	board/amcc/canyonlands/canyonlands.c	/^	u8	usb_ctrl;$/;"	m	struct:board_bcsr	typeref:typename:u8	file:
usb_ctrl	drivers/usb/gadget/dwc2_udc_otg.c	/^static struct usb_ctrlrequest *usb_ctrl;$/;"	v	typeref:struct:usb_ctrlrequest *	file:
usb_ctrl0	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usb_ctrl0;		\/* offset 0x20 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
usb_ctrl1	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usb_ctrl1;		\/* offset 0x28 *\/$/;"	m	struct:ctrl_dev	typeref:typename:unsigned int
usb_ctrl_dma_addr	drivers/usb/gadget/dwc2_udc_otg.c	/^static dma_addr_t usb_ctrl_dma_addr;$/;"	v	typeref:typename:dma_addr_t	file:
usb_ctrl_mod	arch/arm/dts/am33xx.dtsi	/^			usb_ctrl_mod: control@44e10620 {$/;"	l	label:usb
usb_ctrlrequest	include/linux/usb/ch9.h	/^struct usb_ctrlrequest {$/;"	s
usb_current_limit	include/ec_commands.h	/^	uint16_t usb_current_limit;$/;"	m	struct:ec_response_power_info	typeref:typename:uint16_t
usb_debug_descriptor	include/linux/usb/ch9.h	/^struct usb_debug_descriptor {$/;"	s
usb_del_gadget_udc	drivers/usb/gadget/udc/udc-core.c	/^void usb_del_gadget_udc(struct usb_gadget *gadget)$/;"	f	typeref:typename:void
usb_descriptor	include/usbdescriptors.h	/^struct usb_descriptor {$/;"	s
usb_descriptor_fillbuf	drivers/usb/gadget/config.c	/^usb_descriptor_fillbuf(void *buf, unsigned buflen,$/;"	f	typeref:typename:int
usb_descriptor_header	include/linux/usb/ch9.h	/^struct usb_descriptor_header {$/;"	s
usb_detect_change	common/usb.c	/^int usb_detect_change(void)$/;"	f	typeref:typename:int
usb_detect_change	drivers/usb/host/usb-uclass.c	/^int usb_detect_change(void)$/;"	f	typeref:typename:int
usb_dev	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:ed	typeref:struct:usb_device *
usb_dev	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:td	typeref:struct:usb_device *
usb_dev	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:ed	typeref:struct:usb_device *
usb_dev	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:td	typeref:struct:usb_device *
usb_dev	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:ed	typeref:struct:usb_device *
usb_dev	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:td	typeref:struct:usb_device *
usb_dev	common/usb.c	/^static struct usb_device usb_dev[USB_MAX_DEVICE];$/;"	v	typeref:struct:usb_device[]	file:
usb_dev	drivers/usb/host/ohci-s3c24xx.h	/^	struct usb_device *usb_dev;$/;"	m	struct:ed	typeref:struct:usb_device *
usb_dev	drivers/usb/host/ohci-s3c24xx.h	/^	struct usb_device *usb_dev;$/;"	m	struct:td	typeref:struct:usb_device *
usb_dev	drivers/usb/host/ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:ed	typeref:struct:usb_device *
usb_dev	drivers/usb/host/ohci.h	/^	struct usb_device *usb_dev;$/;"	m	struct:td	typeref:struct:usb_device *
usb_dev_cap_header	include/linux/usb/ch9.h	/^struct usb_dev_cap_header {$/;"	s
usb_dev_desc	common/usb_storage.c	/^static struct blk_desc usb_dev_desc[USB_MAX_STOR_DEV];$/;"	v	typeref:struct:blk_desc[]	file:
usb_dev_func_t	cmd/usb.c	/^typedef void (*usb_dev_func_t)(struct usb_device *udev);$/;"	t	typeref:typename:void (*)(struct usb_device * udev)	file:
usb_dev_get_parent	drivers/usb/musb-new/usb-compat.h	/^static inline struct usb_device *usb_dev_get_parent(struct usb_device *dev)$/;"	f	typeref:struct:usb_device *
usb_dev_get_parent	drivers/usb/musb-new/usb-compat.h	/^static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)$/;"	f	typeref:struct:usb_device *
usb_dev_platdata	include/usb.h	/^struct usb_dev_platdata {$/;"	s
usb_dev_type	include/ec_commands.h	/^	uint32_t usb_dev_type;$/;"	m	struct:ec_response_power_info	typeref:typename:uint32_t
usb_device	include/usb.h	/^struct usb_device {$/;"	s
usb_device_descriptor	include/linux/usb/ch9.h	/^struct usb_device_descriptor {$/;"	s
usb_device_descriptor	include/usbdescriptors.h	/^struct usb_device_descriptor {$/;"	s
usb_device_event	include/usbdevice.h	/^typedef enum usb_device_event {$/;"	g
usb_device_event_t	include/usbdevice.h	/^} usb_device_event_t;$/;"	t	typeref:enum:usb_device_event
usb_device_has_child_on_port	common/usb.c	/^bool usb_device_has_child_on_port(struct usb_device *parent, int port)$/;"	f	typeref:typename:bool
usb_device_id	include/usb.h	/^struct usb_device_id {$/;"	s
usb_device_instance	include/usbdevice.h	/^struct usb_device_instance {$/;"	s
usb_device_list_scan	common/usb_hub.c	/^static int usb_device_list_scan(void)$/;"	f	typeref:typename:int	file:
usb_device_request	include/usbdevice.h	/^struct usb_device_request {$/;"	s
usb_device_scan	common/usb_hub.c	/^struct usb_device_scan {$/;"	s	file:
usb_device_speed	include/linux/usb/ch9.h	/^enum usb_device_speed {$/;"	g
usb_device_state	include/linux/usb/ch9.h	/^enum usb_device_state {$/;"	g
usb_device_state	include/usbdevice.h	/^typedef enum usb_device_state {$/;"	g
usb_device_state_t	include/usbdevice.h	/^} usb_device_state_t;$/;"	t	typeref:enum:usb_device_state
usb_device_status	include/usbdevice.h	/^typedef enum usb_device_status {$/;"	g
usb_device_status_t	include/usbdevice.h	/^} usb_device_status_t;$/;"	t	typeref:enum:usb_device_status
usb_devices	drivers/usb/gadget/core.c	/^int usb_devices;$/;"	v	typeref:typename:int
usb_disable_asynch	common/usb.c	/^int usb_disable_asynch(int disable)$/;"	f	typeref:typename:int
usb_disable_asynch	drivers/usb/host/usb-uclass.c	/^int usb_disable_asynch(int disable)$/;"	f	typeref:typename:int
usb_display_Req	arch/sparc/cpu/leon3/usb_uhci.c	/^static void usb_display_Req(unsigned short req)$/;"	f	typeref:typename:void	file:
usb_display_Req	board/mpl/common/usb_uhci.c	/^static void usb_display_Req(unsigned short req) {}$/;"	f	typeref:typename:void	file:
usb_display_Req	board/mpl/common/usb_uhci.c	/^static void usb_display_Req(unsigned short req)$/;"	f	typeref:typename:void	file:
usb_display_class_sub	cmd/usb.c	/^static void usb_display_class_sub(unsigned char dclass, unsigned char subclass,$/;"	f	typeref:typename:void	file:
usb_display_conf_desc	cmd/usb.c	/^static void usb_display_conf_desc(struct usb_config_descriptor *config,$/;"	f	typeref:typename:void	file:
usb_display_config	cmd/usb.c	/^static void usb_display_config(struct usb_device *dev)$/;"	f	typeref:typename:void	file:
usb_display_desc	cmd/usb.c	/^static void usb_display_desc(struct usb_device *dev)$/;"	f	typeref:typename:void	file:
usb_display_ep_desc	cmd/usb.c	/^static void usb_display_ep_desc(struct usb_endpoint_descriptor *epdesc)$/;"	f	typeref:typename:void	file:
usb_display_if_desc	cmd/usb.c	/^static void usb_display_if_desc(struct usb_interface_descriptor *ifdesc,$/;"	f	typeref:typename:void	file:
usb_display_string	cmd/usb.c	/^static void usb_display_string(struct usb_device *dev, int index)$/;"	f	typeref:typename:void	file:
usb_display_td	arch/sparc/cpu/leon3/usb_uhci.c	/^static int usb_display_td(uhci_td_t * td)$/;"	f	typeref:typename:int	file:
usb_display_td	board/mpl/common/usb_uhci.c	/^static int usb_display_td(uhci_td_t *td)$/;"	f	typeref:typename:int	file:
usb_display_wValue	arch/sparc/cpu/leon3/usb_uhci.c	/^static void usb_display_wValue(unsigned short wValue, unsigned short wIndex)$/;"	f	typeref:typename:void	file:
usb_display_wValue	board/mpl/common/usb_uhci.c	/^static void usb_display_wValue(unsigned short wValue,unsigned short wIndex) {}$/;"	f	typeref:typename:void	file:
usb_display_wValue	board/mpl/common/usb_uhci.c	/^static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)$/;"	f	typeref:typename:void	file:
usb_dotoggle	include/usb.h	/^#define usb_dotoggle(/;"	d
usb_dpll_hs_clk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_dpll_hs_clk_div: usb_dpll_hs_clk_div {$/;"	l
usb_dpll_params_1920mhz	arch/arm/cpu/armv7/omap4/hw_data.c	/^static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
usb_dpll_params_1920mhz	arch/arm/cpu/armv7/omap5/hw_data.c	/^static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {$/;"	v	typeref:typename:const struct dpll_params[]	file:
usb_dr_mode	include/linux/usb/otg.h	/^enum usb_dr_mode {$/;"	g
usb_dr_modes	drivers/usb/common/common.c	/^static const char *const usb_dr_modes[] = {$/;"	v	typeref:typename:const char * const[]	file:
usb_driver_entry	include/usb.h	/^struct usb_driver_entry {$/;"	s
usb_drr1	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_drr1;$/;"	m	struct:usb	typeref:typename:ulong
usb_drr2	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_drr2;$/;"	m	struct:usb	typeref:typename:ulong
usb_ehci	include/usb/ehci-ci.h	/^struct usb_ehci {$/;"	s
usb_emul_bulk	drivers/usb/emul/usb-emul-uclass.c	/^int usb_emul_bulk(struct udevice *emul, struct usb_device *udev,$/;"	f	typeref:typename:int
usb_emul_control	drivers/usb/emul/usb-emul-uclass.c	/^int usb_emul_control(struct udevice *emul, struct usb_device *udev,$/;"	f	typeref:typename:int
usb_emul_find	drivers/usb/emul/usb-emul-uclass.c	/^int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp)$/;"	f	typeref:typename:int
usb_emul_find_devnum	drivers/usb/emul/usb-emul-uclass.c	/^static int usb_emul_find_devnum(int devnum, struct udevice **emulp)$/;"	f	typeref:typename:int	file:
usb_emul_find_for_dev	drivers/usb/emul/usb-emul-uclass.c	/^int usb_emul_find_for_dev(struct udevice *dev, struct udevice **emulp)$/;"	f	typeref:typename:int
usb_emul_get_descriptor	drivers/usb/emul/usb-emul-uclass.c	/^static int usb_emul_get_descriptor(struct usb_dev_platdata *plat, int value,$/;"	f	typeref:typename:int	file:
usb_emul_get_string	drivers/usb/emul/usb-emul-uclass.c	/^static int usb_emul_get_string(struct usb_string *strings, int index,$/;"	f	typeref:typename:int	file:
usb_emul_int	drivers/usb/emul/usb-emul-uclass.c	/^int usb_emul_int(struct udevice *emul, struct usb_device *udev,$/;"	f	typeref:typename:int
usb_emul_reset	drivers/usb/emul/usb-emul-uclass.c	/^void usb_emul_reset(struct udevice *dev)$/;"	f	typeref:typename:void
usb_emul_setup_device	drivers/usb/emul/usb-emul-uclass.c	/^int usb_emul_setup_device(struct udevice *dev, int maxpacketsize,$/;"	f	typeref:typename:int
usb_enable_override	include/fsl_usb.h	/^	u32	usb_enable_override;$/;"	m	struct:ccsr_usb_phy	typeref:typename:u32
usb_enabled	board/Marvell/mvebu_db-88f7040/board.c	/^static int usb_enabled = 0;$/;"	v	typeref:typename:int	file:
usb_encryption_descriptor	include/linux/usb/ch9.h	/^struct usb_encryption_descriptor {$/;"	s
usb_endpoint_descriptor	include/linux/usb/ch9.h	/^struct usb_endpoint_descriptor {$/;"	s
usb_endpoint_descriptor	include/usbdescriptors.h	/^struct usb_endpoint_descriptor {$/;"	s
usb_endpoint_dir_in	include/linux/usb/ch9.h	/^static inline int usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd)$/;"	f	typeref:typename:int
usb_endpoint_dir_out	include/linux/usb/ch9.h	/^static inline int usb_endpoint_dir_out($/;"	f	typeref:typename:int
usb_endpoint_halt	include/usb.h	/^#define usb_endpoint_halt(/;"	d
usb_endpoint_halted	include/usb.h	/^#define usb_endpoint_halted(/;"	d
usb_endpoint_instance	include/usbdevice.h	/^struct usb_endpoint_instance {$/;"	s
usb_endpoint_interrupt_type	include/linux/usb/ch9.h	/^static inline int usb_endpoint_interrupt_type($/;"	f	typeref:typename:int
usb_endpoint_is_bulk_in	include/linux/usb/ch9.h	/^static inline int usb_endpoint_is_bulk_in($/;"	f	typeref:typename:int
usb_endpoint_is_bulk_out	include/linux/usb/ch9.h	/^static inline int usb_endpoint_is_bulk_out($/;"	f	typeref:typename:int
usb_endpoint_is_int_in	include/linux/usb/ch9.h	/^static inline int usb_endpoint_is_int_in($/;"	f	typeref:typename:int
usb_endpoint_is_int_out	include/linux/usb/ch9.h	/^static inline int usb_endpoint_is_int_out($/;"	f	typeref:typename:int
usb_endpoint_is_isoc_in	include/linux/usb/ch9.h	/^static inline int usb_endpoint_is_isoc_in($/;"	f	typeref:typename:int
usb_endpoint_is_isoc_out	include/linux/usb/ch9.h	/^static inline int usb_endpoint_is_isoc_out($/;"	f	typeref:typename:int
usb_endpoint_maxp	include/linux/usb/ch9.h	/^static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)$/;"	f	typeref:typename:int
usb_endpoint_num	include/linux/usb/ch9.h	/^static inline int usb_endpoint_num(const struct usb_endpoint_descriptor *epd)$/;"	f	typeref:typename:int
usb_endpoint_out	include/usb.h	/^#define usb_endpoint_out(/;"	d
usb_endpoint_running	include/usb.h	/^#define usb_endpoint_running(/;"	d
usb_endpoint_type	include/linux/usb/ch9.h	/^static inline int usb_endpoint_type(const struct usb_endpoint_descriptor *epd)$/;"	f	typeref:typename:int
usb_endpoint_xfer_bulk	include/linux/usb/ch9.h	/^static inline int usb_endpoint_xfer_bulk($/;"	f	typeref:typename:int
usb_endpoint_xfer_control	include/linux/usb/ch9.h	/^static inline int usb_endpoint_xfer_control($/;"	f	typeref:typename:int
usb_endpoint_xfer_int	include/linux/usb/ch9.h	/^static inline int usb_endpoint_xfer_int($/;"	f	typeref:typename:int
usb_endpoint_xfer_isoc	include/linux/usb/ch9.h	/^static inline int usb_endpoint_xfer_isoc($/;"	f	typeref:typename:int
usb_ep	include/linux/usb/gadget.h	/^struct usb_ep {$/;"	s
usb_ep0ctl	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep0ctl;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep0dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep0dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep0dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep0dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep0imr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep0imr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep0isr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep0isr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep0sr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep0sr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep1cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep1cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep1ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep1ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep1dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep1dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep1dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep1dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep1imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep1imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep1isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep1isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep2cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep2cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep2ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep2ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep2dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep2dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep2dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep2dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep2imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep2imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep2isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep2isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep3cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep3cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep3ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep3ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep3dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep3dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep3dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep3dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep3imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep3imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep3isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep3isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep4cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep4cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep4ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep4ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep4dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep4dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep4dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep4dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep4imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep4imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep4isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep4isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep5cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep5cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep5ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep5ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep5dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep5dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep5dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep5dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep5imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep5imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep5isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep5isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep6cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep6cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep6ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep6ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep6dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep6dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep6dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep6dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep6imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep6imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep6isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep6isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep7cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep7cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep7ctl	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep7ctl;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep7dpr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep7dpr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep7dr	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_ep7dr;$/;"	m	struct:usb	typeref:typename:ulong
usb_ep7imr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep7imr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep7isr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_ep7isr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ep_alloc_request	include/linux/usb/gadget.h	/^static inline struct usb_request *usb_ep_alloc_request(struct usb_ep *ep,$/;"	f	typeref:struct:usb_request *
usb_ep_autoconfig	drivers/usb/gadget/epautoconf.c	/^struct usb_ep *usb_ep_autoconfig($/;"	f	typeref:struct:usb_ep *
usb_ep_autoconfig_reset	drivers/usb/gadget/epautoconf.c	/^void usb_ep_autoconfig_reset(struct usb_gadget *gadget)$/;"	f	typeref:typename:void
usb_ep_clear_halt	include/linux/usb/gadget.h	/^static inline int usb_ep_clear_halt(struct usb_ep *ep)$/;"	f	typeref:typename:int
usb_ep_dequeue	include/linux/usb/gadget.h	/^static inline int usb_ep_dequeue(struct usb_ep *ep, struct usb_request *req)$/;"	f	typeref:typename:int
usb_ep_disable	include/linux/usb/gadget.h	/^static inline int usb_ep_disable(struct usb_ep *ep)$/;"	f	typeref:typename:int
usb_ep_enable	include/linux/usb/gadget.h	/^static inline int usb_ep_enable(struct usb_ep *ep,$/;"	f	typeref:typename:int
usb_ep_fifo_flush	include/linux/usb/gadget.h	/^static inline void usb_ep_fifo_flush(struct usb_ep *ep)$/;"	f	typeref:typename:void
usb_ep_fifo_status	include/linux/usb/gadget.h	/^static inline int usb_ep_fifo_status(struct usb_ep *ep)$/;"	f	typeref:typename:int
usb_ep_free_request	include/linux/usb/gadget.h	/^static inline void usb_ep_free_request(struct usb_ep *ep,$/;"	f	typeref:typename:void
usb_ep_ops	include/linux/usb/gadget.h	/^struct usb_ep_ops {$/;"	s
usb_ep_queue	include/linux/usb/gadget.h	/^static inline int usb_ep_queue(struct usb_ep *ep,$/;"	f	typeref:typename:int
usb_ep_set_halt	include/linux/usb/gadget.h	/^static inline int usb_ep_set_halt(struct usb_ep *ep)$/;"	f	typeref:typename:int
usb_ep_set_maxpacket_limit	include/linux/usb/gadget.h	/^static inline void usb_ep_set_maxpacket_limit(struct usb_ep *ep,$/;"	f	typeref:typename:void
usb_epb_t	include/usb/mpc8xx_udc.h	/^}usb_epb_t;$/;"	t	typeref:struct:endpoint_parameter_block_pointer
usb_eth	drivers/usb/eth/usb_ether.c	/^static struct ueth_data usb_eth[USB_MAX_ETH_DEV];$/;"	v	typeref:struct:ueth_data[]	file:
usb_eth_before_probe	drivers/usb/eth/usb_ether.c	/^typedef void (*usb_eth_before_probe)(void);$/;"	t	typeref:typename:void (*)(void)	file:
usb_eth_get_info	drivers/usb/eth/usb_ether.c	/^typedef int (*usb_eth_get_info)(struct usb_device *dev, struct ueth_data *ss,$/;"	t	typeref:typename:int (*)(struct usb_device * dev,struct ueth_data * ss,struct eth_device * dev_desc)	file:
usb_eth_halt	drivers/usb/gadget/ether.c	/^void usb_eth_halt(struct eth_device *netdev)$/;"	f	typeref:typename:void
usb_eth_init	drivers/usb/gadget/ether.c	/^static int usb_eth_init(struct eth_device *netdev, bd_t *bd)$/;"	f	typeref:typename:int	file:
usb_eth_initialize	drivers/usb/gadget/ether.c	/^int usb_eth_initialize(bd_t *bi)$/;"	f	typeref:typename:int
usb_eth_prob_dev	drivers/usb/eth/usb_ether.c	/^struct usb_eth_prob_dev {$/;"	s	file:
usb_eth_probe	drivers/usb/eth/usb_ether.c	/^typedef int (*usb_eth_probe)(struct usb_device *dev, unsigned int ifnum,$/;"	t	typeref:typename:int (*)(struct usb_device * dev,unsigned int ifnum,struct ueth_data * ss)	file:
usb_eth_recv	drivers/usb/gadget/ether.c	/^static int usb_eth_recv(struct eth_device *netdev)$/;"	f	typeref:typename:int	file:
usb_eth_send	drivers/usb/gadget/ether.c	/^static int usb_eth_send(struct eth_device *netdev, void *packet, int length)$/;"	f	typeref:typename:int	file:
usb_ether_advance_rxbuf	drivers/usb/eth/usb_ether.c	/^void usb_ether_advance_rxbuf(struct ueth_data *ueth, int num_bytes)$/;"	f	typeref:typename:void
usb_ether_curr_dev	cmd/usb.c	/^static int __maybe_unused usb_ether_curr_dev = -1; \/* current ethernet device *\/$/;"	v	typeref:typename:int __maybe_unused	file:
usb_ether_deregister	drivers/usb/eth/usb_ether.c	/^int usb_ether_deregister(struct ueth_data *ueth)$/;"	f	typeref:typename:int
usb_ether_get_rx_bytes	drivers/usb/eth/usb_ether.c	/^int usb_ether_get_rx_bytes(struct ueth_data *ueth, uint8_t **ptrp)$/;"	f	typeref:typename:int
usb_ether_receive	drivers/usb/eth/usb_ether.c	/^int usb_ether_receive(struct ueth_data *ueth, int rxsize)$/;"	f	typeref:typename:int
usb_ether_register	drivers/usb/eth/usb_ether.c	/^int usb_ether_register(struct udevice *dev, struct ueth_data *ueth, int rxsize)$/;"	f	typeref:typename:int
usb_ext_cap_descriptor	include/linux/usb/ch9.h	/^struct usb_ext_cap_descriptor {		\/* Link Power Management *\/$/;"	s
usb_far	arch/m68k/include/asm/immap_5272.h	/^	uchar usb_far;$/;"	m	struct:usb	typeref:typename:uchar
usb_fill_qh	arch/sparc/cpu/leon3/usb_uhci.c	/^void usb_fill_qh(uhci_qh_t * qh, unsigned long head, unsigned long element)$/;"	f	typeref:typename:void
usb_fill_qh	board/mpl/common/usb_uhci.c	/^void usb_fill_qh(uhci_qh_t* qh,unsigned long head,unsigned long element)$/;"	f	typeref:typename:void
usb_fill_td	arch/sparc/cpu/leon3/usb_uhci.c	/^void usb_fill_td(uhci_td_t * td, unsigned long link, unsigned long status,$/;"	f	typeref:typename:void
usb_fill_td	board/mpl/common/usb_uhci.c	/^void usb_fill_td(uhci_td_t* td,unsigned long link,unsigned long status,$/;"	f	typeref:typename:void
usb_find_and_bind_driver	drivers/usb/host/usb-uclass.c	/^static int usb_find_and_bind_driver(struct udevice *parent,$/;"	f	typeref:typename:int	file:
usb_find_child	drivers/usb/host/usb-uclass.c	/^static int usb_find_child(struct udevice *parent,$/;"	f	typeref:typename:int	file:
usb_find_device	cmd/usb.c	/^static struct usb_device *usb_find_device(int devnum)$/;"	f	typeref:struct:usb_device *	file:
usb_find_usb2_hub_address_port	common/usb.c	/^void usb_find_usb2_hub_address_port(struct usb_device *udev,$/;"	f	typeref:typename:void
usb_flags	include/usb/dwc2_udc.h	/^	unsigned int    usb_flags;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
usb_fnmr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_fnmr;$/;"	m	struct:usb	typeref:typename:ushort
usb_fnr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_fnr;$/;"	m	struct:usb	typeref:typename:ushort
usb_for_each_root_dev	cmd/usb.c	/^static void usb_for_each_root_dev(usb_dev_func_t func)$/;"	f	typeref:typename:void	file:
usb_free_device	common/usb.c	/^void usb_free_device(struct udevice *controller)$/;"	f	typeref:typename:void
usb_function	drivers/usb/gadget/f_dfu.c	/^	struct usb_function		usb_function;$/;"	m	struct:f_dfu	typeref:struct:usb_function	file:
usb_function	drivers/usb/gadget/f_fastboot.c	/^	struct usb_function usb_function;$/;"	m	struct:f_fastboot	typeref:struct:usb_function	file:
usb_function	drivers/usb/gadget/f_thor.h	/^	struct usb_function usb_function;$/;"	m	struct:f_thor	typeref:struct:usb_function
usb_function	include/linux/usb/composite.h	/^struct usb_function {$/;"	s
usb_function_activate	drivers/usb/gadget/composite.c	/^int usb_function_activate(struct usb_function *function)$/;"	f	typeref:typename:int
usb_function_deactivate	drivers/usb/gadget/composite.c	/^int usb_function_deactivate(struct usb_function *function)$/;"	f	typeref:typename:int
usb_function_name	include/g_dnl.h	/^	const char *usb_function_name;$/;"	m	struct:g_dnl_bind_callback	typeref:typename:const char *
usb_gadget	include/linux/usb/gadget.h	/^struct usb_gadget {$/;"	s
usb_gadget_clear_selfpowered	include/linux/usb/gadget.h	/^static inline int usb_gadget_clear_selfpowered(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_config_buf	drivers/usb/gadget/config.c	/^int usb_gadget_config_buf($/;"	f	typeref:typename:int
usb_gadget_connect	include/linux/usb/gadget.h	/^static inline int usb_gadget_connect(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_controller_number	drivers/usb/gadget/gadget_chips.h	/^static inline int usb_gadget_controller_number(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_disconnect	include/linux/usb/gadget.h	/^static inline int usb_gadget_disconnect(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_driver	include/linux/usb/gadget.h	/^struct usb_gadget_driver {$/;"	s
usb_gadget_frame_number	include/linux/usb/gadget.h	/^static inline int usb_gadget_frame_number(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_get_string	drivers/usb/gadget/usbstring.c	/^usb_gadget_get_string(struct usb_gadget_strings *table, int id, u8 *buf)$/;"	f	typeref:typename:int
usb_gadget_giveback_request	drivers/usb/gadget/udc/udc-core.c	/^void usb_gadget_giveback_request(struct usb_ep *ep,$/;"	f	typeref:typename:void
usb_gadget_handle_interrupts	board/samsung/common/exynos5-dt.c	/^int usb_gadget_handle_interrupts(void)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	board/ti/am43xx/board.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	board/ti/am57xx/board.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	board/ti/dra7xx/evm.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	board/ti/omap5_uevm/evm.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	board/xilinx/zynqmp/zynqmp.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/gadget/at91_udc.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/gadget/atmel_usba_udc.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/gadget/ci_udc.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/gadget/dwc2_udc_otg.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/gadget/fotg210.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/gadget/pxa25x_udc.c	/^usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_handle_interrupts	drivers/usb/musb-new/musb_uboot.c	/^int usb_gadget_handle_interrupts(int index)$/;"	f	typeref:typename:int
usb_gadget_map_request	drivers/usb/gadget/udc/udc-core.c	/^int usb_gadget_map_request(struct usb_gadget *gadget,$/;"	f	typeref:typename:int
usb_gadget_ops	include/linux/usb/gadget.h	/^struct usb_gadget_ops {$/;"	s
usb_gadget_probe_driver	drivers/usb/gadget/udc/udc-core.c	/^int usb_gadget_probe_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/at91_udc.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/atmel_usba_udc.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/ci_udc.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/dwc2_udc_otg.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/fotg210.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/pxa25x_udc.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/gadget/udc/udc-core.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_register_driver	drivers/usb/musb-new/musb_uboot.c	/^int usb_gadget_register_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_remove_driver	drivers/usb/gadget/udc/udc-core.c	/^static void usb_gadget_remove_driver(struct usb_udc *udc)$/;"	f	typeref:typename:void	file:
usb_gadget_set_selfpowered	include/linux/usb/gadget.h	/^static inline int usb_gadget_set_selfpowered(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_set_state	drivers/usb/gadget/udc/udc-core.c	/^void usb_gadget_set_state(struct usb_gadget *gadget,$/;"	f	typeref:typename:void
usb_gadget_strings	include/linux/usb/gadget.h	/^struct usb_gadget_strings {$/;"	s
usb_gadget_udc_reset	drivers/usb/gadget/udc/udc-core.c	/^void usb_gadget_udc_reset(struct usb_gadget *gadget,$/;"	f	typeref:typename:void
usb_gadget_udc_start	drivers/usb/gadget/udc/udc-core.c	/^static inline int usb_gadget_udc_start(struct usb_udc *udc)$/;"	f	typeref:typename:int	file:
usb_gadget_udc_stop	drivers/usb/gadget/udc/udc-core.c	/^static inline void usb_gadget_udc_stop(struct usb_udc *udc)$/;"	f	typeref:typename:void	file:
usb_gadget_unmap_request	drivers/usb/gadget/udc/udc-core.c	/^void usb_gadget_unmap_request(struct usb_gadget *gadget,$/;"	f	typeref:typename:void
usb_gadget_unregister_driver	drivers/usb/gadget/at91_udc.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/gadget/atmel_usba_udc.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/gadget/ci_udc.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/gadget/dwc2_udc_otg.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/gadget/fotg210.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/gadget/pxa25x_udc.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/gadget/udc/udc-core.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_unregister_driver	drivers/usb/musb-new/musb_uboot.c	/^int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)$/;"	f	typeref:typename:int
usb_gadget_vbus_connect	include/linux/usb/gadget.h	/^static inline int usb_gadget_vbus_connect(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_vbus_disconnect	include/linux/usb/gadget.h	/^static inline int usb_gadget_vbus_disconnect(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gadget_vbus_draw	include/linux/usb/gadget.h	/^static inline int usb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA)$/;"	f	typeref:typename:int
usb_gadget_wakeup	include/linux/usb/gadget.h	/^static inline int usb_gadget_wakeup(struct usb_gadget *gadget)$/;"	f	typeref:typename:int
usb_gate_mask	drivers/usb/host/ohci-sunxi.c	/^	int usb_gate_mask; \/* Mask of usb_clk_cfg clk gate bits for this hcd *\/$/;"	m	struct:ohci_sunxi_priv	typeref:typename:int	file:
usb_generic_descriptor	include/linux/usb/ch9.h	/^struct usb_generic_descriptor {$/;"	s
usb_generic_descriptor	include/usbdescriptors.h	/^struct usb_generic_descriptor {$/;"	s
usb_get_bus	drivers/usb/host/usb-uclass.c	/^struct udevice *usb_get_bus(struct udevice *dev)$/;"	f	typeref:struct:udevice *
usb_get_class_desc	cmd/usb.c	/^static char *usb_get_class_desc(unsigned char dclass)$/;"	f	typeref:typename:char *	file:
usb_get_class_descriptor	common/usb.c	/^int usb_get_class_descriptor(struct usb_device *dev, int ifnum,$/;"	f	typeref:typename:int
usb_get_configuration_len	common/usb.c	/^int usb_get_configuration_len(struct usb_device *dev, int cfgno)$/;"	f	typeref:typename:int
usb_get_configuration_no	common/usb.c	/^int usb_get_configuration_no(struct usb_device *dev, int cfgno,$/;"	f	typeref:typename:int
usb_get_descriptor	common/usb.c	/^static int usb_get_descriptor(struct usb_device *dev, unsigned char type,$/;"	f	typeref:typename:int	file:
usb_get_dev_index	common/usb.c	/^struct usb_device *usb_get_dev_index(int index)$/;"	f	typeref:struct:usb_device *
usb_get_dev_index	drivers/usb/host/usb-uclass.c	/^struct usb_device *usb_get_dev_index(struct udevice *bus, int index)$/;"	f	typeref:struct:usb_device *
usb_get_dr_mode	drivers/usb/common/common.c	/^enum usb_dr_mode usb_get_dr_mode(int node)$/;"	f	typeref:enum:usb_dr_mode
usb_get_emul_ops	include/usb.h	/^#define usb_get_emul_ops(/;"	d
usb_get_hub_descriptor	common/usb_hub.c	/^static int usb_get_hub_descriptor(struct usb_device *dev, void *data, int size)$/;"	f	typeref:typename:int	file:
usb_get_hub_status	common/usb_hub.c	/^static int usb_get_hub_status(struct usb_device *dev, void *data)$/;"	f	typeref:typename:int	file:
usb_get_max_lun	common/usb_storage.c	/^static unsigned int usb_get_max_lun(struct us_data *us)$/;"	f	typeref:typename:unsigned int	file:
usb_get_ops	include/usb.h	/^#define usb_get_ops(/;"	d
usb_get_port_status	common/usb_hub.c	/^int usb_get_port_status(struct usb_device *dev, int port, void *data)$/;"	f	typeref:typename:int
usb_get_report	common/usb.c	/^int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type,$/;"	f	typeref:typename:int
usb_get_string	common/usb.c	/^static int usb_get_string(struct usb_device *dev, unsigned short langid,$/;"	f	typeref:typename:int	file:
usb_get_td_status	arch/sparc/cpu/leon3/usb_uhci.c	/^int usb_get_td_status(uhci_td_t * td, struct usb_device *dev)$/;"	f	typeref:typename:int
usb_get_td_status	board/mpl/common/usb_uhci.c	/^int usb_get_td_status(uhci_td_t *td,struct usb_device *dev)$/;"	f	typeref:typename:int
usb_gettoggle	include/usb.h	/^#define usb_gettoggle(/;"	d
usb_gusbcfg	include/usb/dwc2_udc.h	/^	unsigned int	usb_gusbcfg;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
usb_handshake	include/linux/usb/ch9.h	/^struct usb_handshake {$/;"	s
usb_hc1_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const usb_hc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_hcd	drivers/usb/musb-new/usb-compat.h	/^struct usb_hcd {$/;"	s
usb_hcd_check_unlink_urb	drivers/usb/musb-new/usb-compat.h	/^#define usb_hcd_check_unlink_urb(/;"	d
usb_hcd_giveback_urb	drivers/usb/musb-new/usb-compat.h	/^static inline void usb_hcd_giveback_urb(struct usb_hcd *hcd,$/;"	f	typeref:typename:void
usb_hcd_link_urb_to_ep	drivers/usb/musb-new/usb-compat.h	/^#define usb_hcd_link_urb_to_ep(/;"	d
usb_hcd_unlink_urb_from_ep	drivers/usb/musb-new/usb-compat.h	/^#define usb_hcd_unlink_urb_from_ep(/;"	d
usb_hcd_unmap_urb_for_dma	drivers/usb/musb-new/usb-compat.h	/^static inline int usb_hcd_unmap_urb_for_dma(struct usb_hcd *hcd,$/;"	f	typeref:typename:int
usb_hi_addr	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^	u32 usb_hi_addr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb_host	arch/arm/dts/rk3036.dtsi	/^	usb_host: usb@101c0000 {$/;"	l
usb_host0_ehci	arch/arm/dts/rk3288.dtsi	/^	usb_host0_ehci: usb@ff500000 {$/;"	l
usb_host0_ehci	arch/arm/dts/rk3399.dtsi	/^	usb_host0_ehci: usb@fe380000 {$/;"	l
usb_host0_ohci	arch/arm/dts/rk3399.dtsi	/^	usb_host0_ohci: usb@fe3a0000 {$/;"	l
usb_host1	arch/arm/dts/rk3288.dtsi	/^	usb_host1: usb@ff540000 {$/;"	l
usb_host1_ehci	arch/arm/dts/rk3399.dtsi	/^	usb_host1_ehci: usb@fe3c0000 {$/;"	l
usb_host1_ohci	arch/arm/dts/rk3399.dtsi	/^	usb_host1_ohci: usb@fe3e0000 {$/;"	l
usb_host_endpoint	drivers/usb/musb-new/usb-compat.h	/^struct usb_host_endpoint {$/;"	s
usb_host_eth_scan	drivers/usb/eth/usb_ether.c	/^int usb_host_eth_scan(int mode)$/;"	f	typeref:typename:int
usb_hsic	arch/arm/dts/rk3288.dtsi	/^	usb_hsic: usb@ff5c0000 {$/;"	l
usb_hub_allocate	common/usb_hub.c	/^static struct usb_hub_device *usb_hub_allocate(void)$/;"	f	typeref:struct:usb_hub_device *	file:
usb_hub_check	common/usb_hub.c	/^static int usb_hub_check(struct usb_device *dev, int ifnum)$/;"	f	typeref:typename:int	file:
usb_hub_configure	common/usb_hub.c	/^static int usb_hub_configure(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
usb_hub_descriptor	include/usb.h	/^struct usb_hub_descriptor {$/;"	s
usb_hub_device	include/usb.h	/^struct usb_hub_device {$/;"	s
usb_hub_ids	common/usb_hub.c	/^static const struct udevice_id usb_hub_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
usb_hub_index	common/usb_hub.c	/^static int usb_hub_index;$/;"	v	typeref:typename:int	file:
usb_hub_port_connect_change	common/usb_hub.c	/^int usb_hub_port_connect_change(struct usb_device *dev, int port)$/;"	f	typeref:typename:int
usb_hub_port_reset	common/usb.c	/^static int usb_hub_port_reset(struct usb_device *dev, struct usb_device *hub)$/;"	f	typeref:typename:int	file:
usb_hub_post_probe	common/usb_hub.c	/^static int usb_hub_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
usb_hub_power_on	common/usb_hub.c	/^static void usb_hub_power_on(struct usb_hub_device *hub)$/;"	f	typeref:typename:void	file:
usb_hub_probe	common/usb_hub.c	/^int usb_hub_probe(struct usb_device *dev, int ifnum)$/;"	f	typeref:typename:int
usb_hub_reset	common/usb_hub.c	/^void usb_hub_reset(void)$/;"	f	typeref:typename:void
usb_hub_reset_devices	board/compulab/cm_t54/cm_t54.c	/^void usb_hub_reset_devices(int port)$/;"	f	typeref:typename:void
usb_hub_reset_devices	board/ti/omap5_uevm/evm.c	/^void usb_hub_reset_devices(int port)$/;"	f	typeref:typename:void
usb_hub_reset_devices	common/usb_hub.c	/^__weak void usb_hub_reset_devices(int port)$/;"	f	typeref:typename:__weak void
usb_hub_scan	common/usb_hub.c	/^int usb_hub_scan(struct udevice *hub)$/;"	f	typeref:typename:int
usb_hub_status	include/usb.h	/^struct usb_hub_status {$/;"	s
usb_i_mask	arch/arm/include/asm/arch-omap5/omap.h	/^#define usb_i_mask	/;"	d
usb_id	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 usb_id;$/;"	m	struct:fuse_bank8_regs	typeref:typename:u32
usb_ie_falling	include/usb/ulpi.h	/^	u8	usb_ie_falling;		\/* 0x10 Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_ie_falling_clear	include/usb/ulpi.h	/^	u8	usb_ie_falling_clear;	\/* 0x12 Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_ie_falling_set	include/usb/ulpi.h	/^	u8	usb_ie_falling_set;	\/* 0x11 Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_ie_rising	include/usb/ulpi.h	/^	u8	usb_ie_rising;		\/* 0x0D Write *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_ie_rising_clear	include/usb/ulpi.h	/^	u8	usb_ie_rising_clear;	\/* 0x0F Clear *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_ie_rising_set	include/usb/ulpi.h	/^	u8	usb_ie_rising_set;	\/* 0x0E Set *\/$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_iep0cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_iep0cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_in_pointer	common/usb_kbd.c	/^	uint32_t	usb_in_pointer;$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint32_t	file:
usb_init	common/usb.c	/^int usb_init(void)$/;"	f	typeref:typename:int
usb_init	drivers/usb/host/usb-uclass.c	/^int usb_init(void)$/;"	f	typeref:typename:int
usb_init_kup4x	drivers/usb/host/sl811-hcd.c	/^int usb_init_kup4x (void)$/;"	f	typeref:typename:int
usb_init_skel	arch/sparc/cpu/leon3/usb_uhci.c	/^void usb_init_skel(void)$/;"	f	typeref:typename:void
usb_init_skel	board/mpl/common/usb_uhci.c	/^void usb_init_skel(void)$/;"	f	typeref:typename:void
usb_init_type	include/usb.h	/^enum usb_init_type {$/;"	g
usb_inquiry	common/usb_storage.c	/^static int usb_inquiry(ccb *srb, struct us_data *ss)$/;"	f	typeref:typename:int	file:
usb_int_en_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	usb_int_en_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
usb_int_latch	include/usb/ulpi.h	/^	u8	usb_int_latch;$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_int_reg	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	usb_int_reg;$/;"	m	struct:s3c24x0_usb_device	typeref:typename:u8
usb_int_status	include/usb/ulpi.h	/^	u8	usb_int_status;$/;"	m	struct:ulpi_regs	typeref:typename:u8
usb_interface	include/usb.h	/^struct usb_interface {$/;"	s
usb_interface_assoc_descriptor	include/linux/usb/ch9.h	/^struct usb_interface_assoc_descriptor {$/;"	s
usb_interface_descriptor	include/linux/usb/ch9.h	/^struct usb_interface_descriptor {$/;"	s
usb_interface_descriptor	include/usbdescriptors.h	/^struct usb_interface_descriptor {$/;"	s
usb_interface_id	drivers/usb/gadget/composite.c	/^int usb_interface_id(struct usb_configuration *config,$/;"	f	typeref:typename:int
usb_interface_instance	include/usbdevice.h	/^struct usb_interface_instance {$/;"	s
usb_internal_phy_clock_gate	drivers/usb/host/ehci-mx6.c	/^static void usb_internal_phy_clock_gate(int index, int on)$/;"	f	typeref:typename:void	file:
usb_internal_phy_clock_gate	drivers/usb/host/ehci-vf.c	/^static void usb_internal_phy_clock_gate(int index)$/;"	f	typeref:typename:void	file:
usb_intr	arch/arm/include/asm/arch-tegra/usb.h	/^	uint usb_intr;$/;"	m	struct:usb_ctlr	typeref:typename:uint
usb_kbd_arrow	common/usb_kbd.c	/^static const unsigned char usb_kbd_arrow[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
usb_kbd_buffer	common/usb_kbd.c	/^	uint8_t		usb_kbd_buffer[USB_KBD_BUFFER_LEN];$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint8_t[]	file:
usb_kbd_deregister	common/usb_kbd.c	/^int usb_kbd_deregister(int force)$/;"	f	typeref:typename:int
usb_kbd_getc	common/usb_kbd.c	/^static int usb_kbd_getc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
usb_kbd_ids	common/usb_kbd.c	/^static const struct udevice_id usb_kbd_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
usb_kbd_irq	common/usb_kbd.c	/^static int usb_kbd_irq(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
usb_kbd_irq_worker	common/usb_kbd.c	/^static int usb_kbd_irq_worker(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
usb_kbd_num_keypad	common/usb_kbd.c	/^static const unsigned char usb_kbd_num_keypad[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
usb_kbd_numkey	common/usb_kbd.c	/^static const unsigned char usb_kbd_numkey[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
usb_kbd_numkey_shifted	common/usb_kbd.c	/^static const unsigned char usb_kbd_numkey_shifted[] = {$/;"	v	typeref:typename:const unsigned char[]	file:
usb_kbd_pdata	common/usb_kbd.c	/^struct usb_kbd_pdata {$/;"	s	file:
usb_kbd_poll_for_event	common/usb_kbd.c	/^static inline void usb_kbd_poll_for_event(struct usb_device *dev)$/;"	f	typeref:typename:void	file:
usb_kbd_probe	common/usb_kbd.c	/^static int usb_kbd_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
usb_kbd_probe_dev	common/usb_kbd.c	/^static int usb_kbd_probe_dev(struct usb_device *dev, unsigned int ifnum)$/;"	f	typeref:typename:int	file:
usb_kbd_put_queue	common/usb_kbd.c	/^static void usb_kbd_put_queue(struct usb_kbd_pdata *data, char c)$/;"	f	typeref:typename:void	file:
usb_kbd_remove	common/usb_kbd.c	/^static int usb_kbd_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
usb_kbd_service_key	common/usb_kbd.c	/^static uint32_t usb_kbd_service_key(struct usb_device *dev, int i, int up)$/;"	f	typeref:typename:uint32_t	file:
usb_kbd_setled	common/usb_kbd.c	/^static void usb_kbd_setled(struct usb_device *dev)$/;"	f	typeref:typename:void	file:
usb_kbd_testc	common/usb_kbd.c	/^static int usb_kbd_testc(struct stdio_dev *sdev)$/;"	f	typeref:typename:int	file:
usb_kbd_translate	common/usb_kbd.c	/^static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode,$/;"	f	typeref:typename:int	file:
usb_key_descriptor	include/linux/usb/ch9.h	/^struct usb_key_descriptor {$/;"	s
usb_linux_config_descriptor	drivers/usb/host/ehci.h	/^struct usb_linux_config_descriptor {$/;"	s
usb_linux_interface_descriptor	drivers/usb/host/ehci.h	/^struct usb_linux_interface_descriptor {$/;"	s
usb_lowlevel_init	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	arch/sparc/cpu/leon3/usb_uhci.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	board/mpl/common/usb_uhci.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/dwc2.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/ehci-hcd.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/ohci-hcd.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/ohci-s3c24xx.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/r8a66597-hcd.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/sl811-hcd.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/host/xhci.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/musb-new/musb_uboot.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_init	drivers/usb/musb/musb_hcd.c	/^int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)$/;"	f	typeref:typename:int
usb_lowlevel_stop	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	arch/sparc/cpu/leon3/usb_uhci.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	board/mpl/common/usb_uhci.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/dwc2.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/ehci-hcd.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/isp116x-hcd.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/ohci-hcd.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/ohci-s3c24xx.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/r8a66597-hcd.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/sl811-hcd.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/host/xhci.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/musb-new/musb_uboot.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_lowlevel_stop	drivers/usb/musb/musb_hcd.c	/^int usb_lowlevel_stop(int index)$/;"	f	typeref:typename:int
usb_mask	drivers/usb/musb-new/musb_dsps.c	/^	u32		usb_mask;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:u32	file:
usb_mass_storage_ids	common/usb_storage.c	/^static const struct udevice_id usb_mass_storage_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
usb_mass_storage_probe	common/usb_storage.c	/^static int usb_mass_storage_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
usb_match_device	drivers/usb/host/usb-uclass.c	/^int usb_match_device(const struct usb_device_descriptor *desc,$/;"	f	typeref:typename:int
usb_match_one_id	drivers/usb/host/usb-uclass.c	/^int usb_match_one_id(struct usb_device_descriptor *desc,$/;"	f	typeref:typename:int
usb_match_one_id_intf	drivers/usb/host/usb-uclass.c	/^int usb_match_one_id_intf(const struct usb_device_descriptor *desc,$/;"	f	typeref:typename:int
usb_max_devs	common/usb_storage.c	/^static int usb_max_devs; \/* number of highest available usb device *\/$/;"	v	typeref:typename:int	file:
usb_max_eth_dev	drivers/usb/eth/usb_ether.c	/^static int usb_max_eth_dev; \/* number of highest available usb eth device *\/$/;"	v	typeref:typename:int	file:
usb_maxpacket	common/usb.c	/^int usb_maxpacket(struct usb_device *dev, unsigned long pipe)$/;"	f	typeref:typename:int
usb_mod_clk	arch/arm/dts/sun9i-a80.dtsi	/^		usb_mod_clk: clk@00a08000 {$/;"	l
usb_mode	arch/arm/include/asm/arch-tegra/usb.h	/^	uint usb_mode;$/;"	m	struct:usb_ctlr	typeref:typename:uint
usb_mp_clk	arch/arm/dts/socfpga.dtsi	/^					usb_mp_clk: usb_mp_clk {$/;"	l
usb_new_device	common/usb.c	/^int usb_new_device(struct usb_device *dev)$/;"	f	typeref:typename:int
usb_oc_config	drivers/usb/host/ehci-mx6.c	/^static void usb_oc_config(int index)$/;"	f	typeref:typename:void	file:
usb_oc_config	drivers/usb/host/ehci-vf.c	/^static void usb_oc_config(int index)$/;"	f	typeref:typename:void	file:
usb_ocp_read	drivers/usb/eth/r8152.c	/^int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)$/;"	f	typeref:typename:int
usb_ocp_write	drivers/usb/eth/r8152.c	/^int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)$/;"	f	typeref:typename:int
usb_oep0cfg	arch/m68k/include/asm/immap_5272.h	/^	ulong usb_oep0cfg;$/;"	m	struct:usb	typeref:typename:ulong
usb_otg	arch/arm/dts/rk3036.dtsi	/^	usb_otg: usb@10180000 {$/;"	l
usb_otg	arch/arm/dts/rk3288.dtsi	/^	usb_otg: usb@ff580000 {$/;"	l
usb_otg	arch/arm/dts/sun4i-a10.dtsi	/^		usb_otg: usb@01c13000 {$/;"	l
usb_otg	arch/arm/dts/sun5i.dtsi	/^		usb_otg: usb@01c13000 {$/;"	l
usb_otg	arch/arm/dts/sun6i-a31.dtsi	/^		usb_otg: usb@01c19000 {$/;"	l
usb_otg	arch/arm/dts/sun7i-a20.dtsi	/^		usb_otg: usb@01c13000 {$/;"	l
usb_otg	arch/arm/dts/sun8i-a23.dtsi	/^		usb_otg: usb@01c19000 {$/;"	l
usb_otg	arch/arm/dts/sun8i-a33.dtsi	/^		usb_otg: usb@01c19000 {$/;"	l
usb_otg	arch/arm/dts/sun8i-a83t.dtsi	/^		usb_otg: usb@01c19000 {$/;"	l
usb_otg	arch/m68k/include/asm/immap_5329.h	/^typedef struct usb_otg {$/;"	s
usb_otg1_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const usb_otg1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg2_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const usb_otg2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg2_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const usb_otg2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_ahb_clk	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clock usb_otg_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
usb_otg_ahb_clk	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clock usb_otg_ahb_clk = {$/;"	v	typeref:struct:bus_clock	file:
usb_otg_ahb_data	arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c	/^static struct bus_clk_data usb_otg_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
usb_otg_ahb_data	arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c	/^static struct bus_clk_data usb_otg_ahb_data = {$/;"	v	typeref:struct:bus_clk_data	file:
usb_otg_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_otg_clkin_ck: usb_otg_clkin_ck {$/;"	l
usb_otg_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_otg_dclk_div: usb_otg_dclk_div {$/;"	l
usb_otg_descriptor	include/linux/usb/ch9.h	/^struct usb_otg_descriptor {$/;"	s
usb_otg_pad	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static iomux_v3_cfg_t const usb_otg_pad[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/freescale/mx6qarm2/mx6qarm2.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usb_otg_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const usb_otg_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_otg_ss	board/ti/omap5_uevm/evm.c	/^static struct dwc3_device usb_otg_ss = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss0_refclk960m	arch/arm/dts/am43xx-clocks.dtsi	/^	usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m {$/;"	l
usb_otg_ss1	board/ti/am43xx/board.c	/^static struct dwc3_device usb_otg_ss1 = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss1	board/ti/am57xx/board.c	/^static struct dwc3_device usb_otg_ss1 = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss1	board/ti/dra7xx/evm.c	/^static struct dwc3_device usb_otg_ss1 = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss1_glue	board/ti/am43xx/board.c	/^static struct dwc3_omap_device usb_otg_ss1_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_otg_ss1_glue	board/ti/am57xx/board.c	/^static struct dwc3_omap_device usb_otg_ss1_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_otg_ss1_glue	board/ti/dra7xx/evm.c	/^static struct dwc3_omap_device usb_otg_ss1_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_otg_ss1_refclk960m	arch/arm/dts/am43xx-clocks.dtsi	/^	usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {$/;"	l
usb_otg_ss1_refclk960m	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {$/;"	l
usb_otg_ss2	board/ti/am43xx/board.c	/^static struct dwc3_device usb_otg_ss2 = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss2	board/ti/am57xx/board.c	/^static struct dwc3_device usb_otg_ss2 = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss2	board/ti/dra7xx/evm.c	/^static struct dwc3_device usb_otg_ss2 = {$/;"	v	typeref:struct:dwc3_device	file:
usb_otg_ss2_glue	board/ti/am43xx/board.c	/^static struct dwc3_omap_device usb_otg_ss2_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_otg_ss2_glue	board/ti/am57xx/board.c	/^static struct dwc3_omap_device usb_otg_ss2_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_otg_ss2_glue	board/ti/dra7xx/evm.c	/^static struct dwc3_omap_device usb_otg_ss2_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_otg_ss2_refclk960m	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_otg_ss2_refclk960m: usb_otg_ss2_refclk960m {$/;"	l
usb_otg_ss_glue	board/ti/omap5_uevm/evm.c	/^static struct dwc3_omap_device usb_otg_ss_glue = {$/;"	v	typeref:struct:dwc3_omap_device	file:
usb_out_pointer	common/usb_kbd.c	/^	uint32_t	usb_out_pointer;$/;"	m	struct:usb_kbd_pdata	typeref:typename:uint32_t	file:
usb_packetid	include/usb.h	/^#define usb_packetid(/;"	d
usb_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const usb_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_pads	board/gateworks/gw_ventana/gw_ventana.c	/^static iomux_v3_cfg_t const usb_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_pads	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static iomux_v3_cfg_t const usb_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usb_pads	board/toradex/colibri_vf/colibri_vf.c	/^static const iomux_v3_cfg_t usb_pads[] = {$/;"	v	typeref:typename:const iomux_v3_cfg_t[]	file:
usb_param	post/cpu/mpc8xx/usb.c	/^typedef struct usb_param {$/;"	s	file:
usb_param_block	post/cpu/mpc8xx/usb.c	/^typedef struct usb_param_block {$/;"	s	file:
usb_param_block_t	post/cpu/mpc8xx/usb.c	/^} usb_param_block_t;$/;"	t	typeref:struct:usb_param_block	file:
usb_param_t	post/cpu/mpc8xx/usb.c	/^} usb_param_t;$/;"	t	typeref:struct:usb_param	file:
usb_paramp	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile usb_pram_t *usb_paramp = 0;$/;"	v	typeref:typename:volatile usb_pram_t *	file:
usb_parse_config	common/usb.c	/^static int usb_parse_config(struct usb_device *dev,$/;"	f	typeref:typename:int	file:
usb_patch_d	drivers/usb/eth/r8152_fw.c	/^static u8 usb_patch_d[] = {$/;"	v	typeref:typename:u8[]	file:
usb_phy	arch/arm/dts/keystone.dtsi	/^		usb_phy: usb_phy@2620738 {$/;"	l
usb_phy0	arch/arm/dts/zynq-microzed.dts	/^	usb_phy0: phy0 {$/;"	l
usb_phy0	arch/arm/dts/zynq-zc702.dts	/^	usb_phy0: phy0 {$/;"	l
usb_phy0	arch/arm/dts/zynq-zc706.dts	/^	usb_phy0: phy0 {$/;"	l
usb_phy0	arch/arm/dts/zynq-zc770-xm010.dts	/^	usb_phy0: phy0 {$/;"	l
usb_phy0	arch/arm/dts/zynq-zed.dts	/^	usb_phy0: phy0 {$/;"	l
usb_phy0	arch/arm/dts/zynq-zybo.dts	/^	usb_phy0: phy0 {$/;"	l
usb_phy0_always_on_clk32k	arch/arm/dts/am43xx-clocks.dtsi	/^	usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {$/;"	l
usb_phy1	arch/arm/dts/zynq-zc770-xm011.dts	/^	usb_phy1: phy1 {$/;"	l
usb_phy1_always_on_clk32k	arch/arm/dts/am43xx-clocks.dtsi	/^	usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {$/;"	l
usb_phy1_always_on_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {$/;"	l
usb_phy1_device	board/ti/am43xx/board.c	/^static struct ti_usb_phy_device usb_phy1_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy1_device	board/ti/am57xx/board.c	/^static struct ti_usb_phy_device usb_phy1_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy1_device	board/ti/dra7xx/evm.c	/^static struct ti_usb_phy_device usb_phy1_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy2_always_on_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_phy2_always_on_clk32k: usb_phy2_always_on_clk32k {$/;"	l
usb_phy2_device	board/ti/am43xx/board.c	/^static struct ti_usb_phy_device usb_phy2_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy2_device	board/ti/am57xx/board.c	/^static struct ti_usb_phy_device usb_phy2_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy2_device	board/ti/dra7xx/evm.c	/^static struct ti_usb_phy_device usb_phy2_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy3_always_on_clk32k	arch/arm/dts/dra7xx-clocks.dtsi	/^	usb_phy3_always_on_clk32k: usb_phy3_always_on_clk32k {$/;"	l
usb_phy_clk	arch/arm/dts/sun9i-a80.dtsi	/^		usb_phy_clk: clk@00a08004 {$/;"	l
usb_phy_clk_valid	drivers/usb/host/ehci-fsl.c	/^static int usb_phy_clk_valid(struct usb_ehci *ehci)$/;"	f	typeref:typename:int	file:
usb_phy_ctrl	include/usb/dwc2_udc.h	/^	unsigned int    usb_phy_ctrl;$/;"	m	struct:dwc2_plat_otg_data	typeref:typename:unsigned int
usb_phy_device	board/ti/omap5_uevm/evm.c	/^static struct ti_usb_phy_device usb_phy_device = {$/;"	v	typeref:struct:ti_usb_phy_device	file:
usb_phy_enable	drivers/usb/host/ehci-mx6.c	/^static int usb_phy_enable(int index, struct usb_ehci *ehci)$/;"	f	typeref:typename:int	file:
usb_phy_enable	drivers/usb/host/ehci-vf.c	/^static void usb_phy_enable(int index, struct usb_ehci *ehci)$/;"	f	typeref:typename:void	file:
usb_phy_ids	drivers/usb/host/xhci-rockchip.c	/^static const struct udevice_id usb_phy_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
usb_phy_mode	drivers/usb/host/ehci-mx6.c	/^int usb_phy_mode(int port)$/;"	f	typeref:typename:int
usb_phy_power	drivers/usb/phy/omap_usb_phy.c	/^void usb_phy_power(int on)$/;"	f	typeref:typename:void
usb_phy_write	arch/arm/mach-sunxi/usb_phy.c	/^__maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,$/;"	f	typeref:typename:__maybe_unused void	file:
usb_pins	arch/arm/mach-davinci/da830_pinmux.c	/^const struct pinmux_config usb_pins[] = {$/;"	v	typeref:typename:const struct pinmux_config[]
usb_pipe_endpdev	include/usb.h	/^#define usb_pipe_endpdev(/;"	d
usb_pipe_ep_index	include/usb.h	/^#define usb_pipe_ep_index(/;"	d
usb_pipebulk	include/usb.h	/^#define usb_pipebulk(/;"	d
usb_pipecontrol	include/usb.h	/^#define usb_pipecontrol(/;"	d
usb_pipedata	include/usb.h	/^#define usb_pipedata(/;"	d
usb_pipedevice	include/usb.h	/^#define usb_pipedevice(/;"	d
usb_pipeendpoint	include/usb.h	/^#define usb_pipeendpoint(/;"	d
usb_pipein	include/usb.h	/^#define usb_pipein(/;"	d
usb_pipeint	include/usb.h	/^#define usb_pipeint(/;"	d
usb_pipeisoc	include/usb.h	/^#define usb_pipeisoc(/;"	d
usb_pipeout	include/usb.h	/^#define usb_pipeout(/;"	d
usb_pipetype	include/usb.h	/^#define usb_pipetype(/;"	d
usb_plat	drivers/usb/host/ehci-exynos.c	/^	struct usb_platdata usb_plat;$/;"	m	struct:exynos_ehci_platdata	typeref:struct:usb_platdata	file:
usb_plat	drivers/usb/host/xhci-exynos5.c	/^	struct usb_platdata usb_plat;$/;"	m	struct:exynos_xhci	typeref:struct:usb_platdata	file:
usb_plat	drivers/usb/host/xhci-mvebu.c	/^	struct usb_platdata usb_plat;$/;"	m	struct:mvebu_xhci	typeref:struct:usb_platdata	file:
usb_plat	drivers/usb/host/xhci-rockchip.c	/^	struct usb_platdata usb_plat;$/;"	m	struct:rockchip_xhci	typeref:struct:usb_platdata	file:
usb_platdata	include/usb.h	/^struct usb_platdata {$/;"	s
usb_platform_dr_init	drivers/usb/host/ehci-mpc512x.c	/^static void usb_platform_dr_init(volatile struct usb_ehci *ehci)$/;"	f	typeref:typename:void	file:
usb_port_config	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint16_t usb_port_config[16][3];$/;"	m	struct:pei_data	typeref:typename:uint16_t[16][3]
usb_port_id	include/ec_commands.h	/^	uint8_t usb_port_id;$/;"	m	struct:ec_params_usb_charge_set_mode	typeref:typename:uint8_t
usb_port_status	include/usb.h	/^struct usb_port_status {$/;"	s
usb_post_test	post/cpu/mpc8xx/usb.c	/^int usb_post_test (int flags)$/;"	f	typeref:typename:int
usb_power_config	drivers/usb/host/ehci-mx6.c	/^static void usb_power_config(int index)$/;"	f	typeref:typename:void	file:
usb_power_config	drivers/usb/host/ehci-vf.c	/^static void usb_power_config(int index)$/;"	f	typeref:typename:void	file:
usb_power_supply	arch/arm/dts/axp209.dtsi	/^	usb_power_supply: usb_power_supply {$/;"	l
usb_power_supply	arch/arm/dts/axp22x.dtsi	/^	usb_power_supply: usb_power_supply {$/;"	l
usb_pram_t	include/usb/mpc8xx_udc.h	/^}usb_pram_t;$/;"	t	typeref:struct:mpc8xx_parameter_ram
usb_prepare_device	common/usb.c	/^static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read,$/;"	f	typeref:typename:int	file:
usb_product_id	board/siemens/common/factoryset.h	/^	int usb_product_id;$/;"	m	struct:factorysetcontainer	typeref:typename:int
usb_qualifier_descriptor	include/linux/usb/ch9.h	/^struct usb_qualifier_descriptor {$/;"	s
usb_qualifier_descriptor	include/usbdescriptors.h	/^struct usb_qualifier_descriptor {$/;"	s
usb_rcvbulkpipe	include/usb.h	/^#define usb_rcvbulkpipe(/;"	d
usb_rcvctrlpipe	include/usb.h	/^#define usb_rcvctrlpipe(/;"	d
usb_rcvdefctrl	include/usb.h	/^#define usb_rcvdefctrl(/;"	d
usb_rcvintpipe	include/usb.h	/^#define usb_rcvintpipe(/;"	d
usb_rcvisocpipe	include/usb.h	/^#define usb_rcvisocpipe(/;"	d
usb_read_10	common/usb_storage.c	/^static int usb_read_10(ccb *srb, struct us_data *ss, unsigned long start,$/;"	f	typeref:typename:int	file:
usb_read_capacity	common/usb_storage.c	/^static int usb_read_capacity(ccb *srb, struct us_data *ss)$/;"	f	typeref:typename:int	file:
usb_refclk_selcr1	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usb_refclk_selcr1;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb_refclk_selcr2	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usb_refclk_selcr2;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb_refclk_selcr3	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usb_refclk_selcr3;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usb_regs	drivers/usb/host/ehci-mxs.c	/^	uint32_t		usb_regs;$/;"	m	struct:ehci_mxs_port	typeref:typename:uint32_t	file:
usb_request	include/linux/usb/gadget.h	/^struct usb_request {$/;"	s
usb_request_sense	common/usb_storage.c	/^static int usb_request_sense(ccb *srb, struct us_data *ss)$/;"	f	typeref:typename:int	file:
usb_reset_ar933x	arch/mips/mach-ath79/reset.c	/^static int usb_reset_ar933x(void __iomem *reset_regs)$/;"	f	typeref:typename:int	file:
usb_reset_ar934x	arch/mips/mach-ath79/reset.c	/^static int usb_reset_ar934x(void __iomem *reset_regs)$/;"	f	typeref:typename:int	file:
usb_reset_qca953x	arch/mips/mach-ath79/reset.c	/^static int usb_reset_qca953x(void __iomem *reset_regs)$/;"	f	typeref:typename:int	file:
usb_reset_root_port	drivers/usb/host/usb-uclass.c	/^int usb_reset_root_port(struct usb_device *udev)$/;"	f	typeref:typename:int
usb_reset_root_port	drivers/usb/musb-new/musb_uboot.c	/^int usb_reset_root_port(struct usb_device *dev)$/;"	f	typeref:typename:int
usb_reset_root_port	include/usb.h	/^#define usb_reset_root_port(/;"	d
usb_rfmmr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_rfmmr;$/;"	m	struct:usb	typeref:typename:ushort
usb_rfmr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_rfmr;$/;"	m	struct:usb	typeref:typename:ushort
usb_root_hub_string	drivers/usb/host/sl811-hcd.c	/^static int usb_root_hub_string (int id, int serial, char *type, __u8 *data, int len)$/;"	f	typeref:typename:int	file:
usb_rst_mask	arch/arm/mach-sunxi/usb_phy.c	/^	int usb_rst_mask;$/;"	m	struct:sunxi_usb_phy	typeref:typename:int	file:
usb_scan_bus	drivers/usb/host/usb-uclass.c	/^static void usb_scan_bus(struct udevice *bus, bool recurse)$/;"	f	typeref:typename:void	file:
usb_scan_device	drivers/usb/host/usb-uclass.c	/^int usb_scan_device(struct udevice *parent, int port,$/;"	f	typeref:typename:int
usb_scan_port	common/usb_hub.c	/^static int usb_scan_port(struct usb_device_scan *usb_scan)$/;"	f	typeref:typename:int	file:
usb_security_descriptor	include/linux/usb/ch9.h	/^struct usb_security_descriptor {$/;"	s
usb_sel	board/gateworks/gw_ventana/common.h	/^	int usb_sel;$/;"	m	struct:ventana	typeref:typename:int
usb_select_config	common/usb.c	/^int usb_select_config(struct usb_device *dev)$/;"	f	typeref:typename:int
usb_set_address	common/usb.c	/^static int usb_set_address(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
usb_set_configuration	common/usb.c	/^static int usb_set_configuration(struct usb_device *dev, int configuration)$/;"	f	typeref:typename:int	file:
usb_set_idle	common/usb.c	/^int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id)$/;"	f	typeref:typename:int
usb_set_interface	common/usb.c	/^int usb_set_interface(struct usb_device *dev, int interface, int alternate)$/;"	f	typeref:typename:int
usb_set_maxpacket	common/usb.c	/^static int usb_set_maxpacket(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
usb_set_maxpacket_ep	common/usb.c	/^usb_set_maxpacket_ep(struct usb_device *dev, int if_idx, int ep_idx)$/;"	f	typeref:typename:void noinline	file:
usb_set_port_feature	common/usb_hub.c	/^static int usb_set_port_feature(struct usb_device *dev, int port, int feature)$/;"	f	typeref:typename:int	file:
usb_set_protocol	common/usb.c	/^int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol)$/;"	f	typeref:typename:int
usb_set_sel_req	include/linux/usb/ch9.h	/^struct usb_set_sel_req {$/;"	s
usb_settoggle	include/usb.h	/^#define usb_settoggle(/;"	d
usb_setup_descriptor	common/usb.c	/^static int usb_setup_descriptor(struct usb_device *dev, bool do_read)$/;"	f	typeref:typename:int	file:
usb_setup_device	common/usb.c	/^int usb_setup_device(struct usb_device *dev, bool do_read,$/;"	f	typeref:typename:int
usb_setup_ehci_gadget	drivers/usb/host/usb-uclass.c	/^int usb_setup_ehci_gadget(struct ehci_ctrl **ctlrp)$/;"	f	typeref:typename:int
usb_shift	drivers/usb/musb-new/musb_dsps.c	/^	unsigned	usb_shift:5;$/;"	m	struct:dsps_musb_wrapper	typeref:typename:unsigned:5	file:
usb_show_info	cmd/usb.c	/^static void usb_show_info(struct usb_device *udev)$/;"	f	typeref:typename:void	file:
usb_show_progress	common/usb_storage.c	/^static void usb_show_progress(void)$/;"	f	typeref:typename:void	file:
usb_show_srb	common/usb_storage.c	/^static void usb_show_srb(ccb *pccb)$/;"	f	typeref:typename:void	file:
usb_show_subtree	cmd/usb.c	/^static void usb_show_subtree(struct usb_device *dev)$/;"	f	typeref:typename:void	file:
usb_show_td	arch/sparc/cpu/leon3/usb_uhci.c	/^void usb_show_td(int max)$/;"	f	typeref:typename:void
usb_show_td	board/mpl/common/usb_uhci.c	/^void usb_show_td(int max)$/;"	f	typeref:typename:void
usb_show_tree	cmd/usb.c	/^void usb_show_tree(void)$/;"	f	typeref:typename:void
usb_show_tree_graph	cmd/usb.c	/^static void usb_show_tree_graph(struct usb_device *dev, char *pre)$/;"	f	typeref:typename:void	file:
usb_single_source_clk_configure	arch/powerpc/cpu/mpc85xx/cpu_init.c	/^void usb_single_source_clk_configure(struct ccsr_usb_phy *usb_phy)$/;"	f	typeref:typename:void
usb_sndbulkpipe	include/usb.h	/^#define usb_sndbulkpipe(/;"	d
usb_sndctrlpipe	include/usb.h	/^#define usb_sndctrlpipe(/;"	d
usb_snddefctrl	include/usb.h	/^#define usb_snddefctrl(/;"	d
usb_sndintpipe	include/usb.h	/^#define usb_sndintpipe(/;"	d
usb_sndisocpipe	include/usb.h	/^#define usb_sndisocpipe(/;"	d
usb_specr	arch/m68k/include/asm/immap_5272.h	/^	ushort usb_specr;$/;"	m	struct:usb	typeref:typename:ushort
usb_ss_cap_descriptor	include/linux/usb/ch9.h	/^struct usb_ss_cap_descriptor {		\/* Link Power Management *\/$/;"	s
usb_ss_container_id_descriptor	include/linux/usb/ch9.h	/^struct usb_ss_container_id_descriptor {$/;"	s
usb_ss_ep_comp_descriptor	include/linux/usb/ch9.h	/^struct usb_ss_ep_comp_descriptor {$/;"	s
usb_ss_max_streams	include/linux/usb/ch9.h	/^usb_ss_max_streams(const struct usb_ss_ep_comp_descriptor *comp)$/;"	f	typeref:typename:int
usb_started	common/usb.c	/^char usb_started; \/* flag for the started\/stopped USB status *\/$/;"	v	typeref:typename:char
usb_stop	common/usb.c	/^int usb_stop(void)$/;"	f	typeref:typename:int
usb_stop	drivers/usb/host/usb-uclass.c	/^int usb_stop(void)$/;"	f	typeref:typename:int
usb_stor	common/usb_storage.c	/^static struct us_data usb_stor[USB_MAX_STOR_DEV];$/;"	v	typeref:struct:us_data[]	file:
usb_stor_BBB_clear_endpt_stall	common/usb_storage.c	/^static int usb_stor_BBB_clear_endpt_stall(struct us_data *us, __u8 endpt)$/;"	f	typeref:typename:int	file:
usb_stor_BBB_comdat	common/usb_storage.c	/^static int usb_stor_BBB_comdat(ccb *srb, struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_BBB_reset	common/usb_storage.c	/^static int usb_stor_BBB_reset(struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_BBB_transport	common/usb_storage.c	/^static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_CBI_get_status	common/usb_storage.c	/^static int usb_stor_CBI_get_status(ccb *srb, struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_CB_comdat	common/usb_storage.c	/^static int usb_stor_CB_comdat(ccb *srb, struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_CB_reset	common/usb_storage.c	/^static int usb_stor_CB_reset(struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_CB_transport	common/usb_storage.c	/^static int usb_stor_CB_transport(ccb *srb, struct us_data *us)$/;"	f	typeref:typename:int	file:
usb_stor_curr_dev	cmd/usb.c	/^static int usb_stor_curr_dev = -1; \/* current device *\/$/;"	v	typeref:typename:int	file:
usb_stor_curr_dev	common/spl/spl_usb.c	/^static int usb_stor_curr_dev = -1; \/* current device *\/$/;"	v	typeref:typename:int	file:
usb_stor_get_info	common/usb_storage.c	/^int usb_stor_get_info(struct usb_device *dev, struct us_data *ss,$/;"	f	typeref:typename:int
usb_stor_info	common/usb_storage.c	/^int usb_stor_info(void)$/;"	f	typeref:typename:int
usb_stor_irq	common/usb_storage.c	/^static int usb_stor_irq(struct usb_device *dev)$/;"	f	typeref:typename:int	file:
usb_stor_probe_device	common/usb_storage.c	/^static int usb_stor_probe_device(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
usb_stor_read	common/usb_storage.c	/^static unsigned long usb_stor_read(struct udevice *dev, lbaint_t blknr,$/;"	f	typeref:typename:unsigned long	file:
usb_stor_reset	common/usb_storage.c	/^void usb_stor_reset(void)$/;"	f	typeref:typename:void
usb_stor_scan	common/usb_storage.c	/^int usb_stor_scan(int mode)$/;"	f	typeref:typename:int
usb_stor_write	common/usb_storage.c	/^static unsigned long usb_stor_write(struct udevice *dev, lbaint_t blknr,$/;"	f	typeref:typename:unsigned long	file:
usb_storage_ops	common/usb_storage.c	/^static const struct blk_ops usb_storage_ops = {$/;"	v	typeref:typename:const struct blk_ops	file:
usb_storage_probe	common/usb_storage.c	/^int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,$/;"	f	typeref:typename:int
usb_string	common/usb.c	/^int usb_string(struct usb_device *dev, int index, char *buf, size_t size)$/;"	f	typeref:typename:int
usb_string	include/linux/usb/ch9.h	/^struct usb_string {$/;"	s
usb_string_descriptor	include/linux/usb/ch9.h	/^struct usb_string_descriptor {$/;"	s
usb_string_descriptor	include/usbdescriptors.h	/^struct usb_string_descriptor {$/;"	s
usb_string_id	drivers/usb/gadget/composite.c	/^int usb_string_id(struct usb_composite_dev *cdev)$/;"	f	typeref:typename:int
usb_string_ids_n	drivers/usb/gadget/composite.c	/^int usb_string_ids_n(struct usb_composite_dev *c, unsigned n)$/;"	f	typeref:typename:int
usb_string_ids_tab	drivers/usb/gadget/composite.c	/^int usb_string_ids_tab(struct usb_composite_dev *cdev, struct usb_string *str)$/;"	f	typeref:typename:int
usb_string_sub	common/usb.c	/^static int usb_string_sub(struct usb_device *dev, unsigned int langid,$/;"	f	typeref:typename:int	file:
usb_strings	drivers/usb/gadget/core.c	/^struct usb_string_descriptor **usb_strings;$/;"	v	typeref:struct:usb_string_descriptor **
usb_sts	arch/arm/include/asm/arch-tegra/usb.h	/^	uint usb_sts;$/;"	m	struct:usb_ctlr	typeref:typename:uint
usb_submit_int_msg	common/usb.c	/^int usb_submit_int_msg(struct usb_device *dev, unsigned long pipe,$/;"	f	typeref:typename:int
usb_t	arch/m68k/include/asm/immap_5272.h	/^} usb_t;$/;"	t	typeref:struct:usb
usb_t	arch/m68k/include/asm/immap_5275.h	/^} usb_t;$/;"	t	typeref:struct:usb
usb_t	include/linux/immap_qe.h	/^} __attribute__ ((packed)) usb_t;$/;"	t	typeref:struct:usb_ctlr
usb_t	include/usb/mpc8xx_udc.h	/^}usb_t;$/;"	t	typeref:struct:mpc8xx_usb
usb_t	post/cpu/mpc8xx/usb.c	/^} usb_t;$/;"	t	typeref:struct:usb	file:
usb_terminal	include/usbdescriptors.h	/^		struct usb_class_usb_terminal_descriptor usb_terminal;$/;"	m	union:usb_class_descriptor::__anon028dca6a020a	typeref:struct:usb_class_usb_terminal_descriptor
usb_test	cmd/usb.c	/^static int usb_test(struct usb_device *dev, int port, char* arg)$/;"	f	typeref:typename:int	file:
usb_test_unit_ready	common/usb_storage.c	/^static int usb_test_unit_ready(ccb *srb, struct us_data *ss)$/;"	f	typeref:typename:int	file:
usb_tree_base	test/dm/usb.c	/^const char usb_tree_base[] =$/;"	v	typeref:typename:const char[]
usb_tree_remove	test/dm/usb.c	/^const char usb_tree_remove[] =$/;"	v	typeref:typename:const char[]
usb_tree_reorder	test/dm/usb.c	/^const char usb_tree_reorder[] =$/;"	v	typeref:typename:const char[]
usb_try_string_workarounds	common/usb.c	/^static void usb_try_string_workarounds(unsigned char *buf, int *length)$/;"	f	typeref:typename:void	file:
usb_uclass_priv	drivers/usb/host/usb-uclass.c	/^struct usb_uclass_priv {$/;"	s	file:
usb_udc	drivers/usb/gadget/udc/udc-core.c	/^struct usb_udc {$/;"	s	file:
usb_udc_release	drivers/usb/gadget/udc/udc-core.c	/^static void usb_udc_release(struct device *dev)$/;"	f	typeref:typename:void	file:
usb_uhci_td_stat	arch/sparc/cpu/leon3/usb_uhci.c	/^unsigned long usb_uhci_td_stat(unsigned long status)$/;"	f	typeref:typename:unsigned long
usb_uhci_td_stat	board/mpl/common/usb_uhci.c	/^unsigned long usb_uhci_td_stat(unsigned long status)$/;"	f	typeref:typename:unsigned long
usb_usadr	include/linux/immap_qe.h	/^	u8 usb_usadr;$/;"	m	struct:usb_ctlr	typeref:typename:u8
usb_usber	include/linux/immap_qe.h	/^	u16 usb_usber;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usbmr	include/linux/immap_qe.h	/^	u16 usb_usbmr;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usbs	include/linux/immap_qe.h	/^	u8 usb_usbs;$/;"	m	struct:usb_ctlr	typeref:typename:u8
usb_uscom	include/linux/immap_qe.h	/^	u8 usb_uscom;$/;"	m	struct:usb_ctlr	typeref:typename:u8
usb_usep1	include/linux/immap_qe.h	/^	u16 usb_usep1;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usep2	include/linux/immap_qe.h	/^	u16 usb_usep2;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usep3	include/linux/immap_qe.h	/^	u16 usb_usep3;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usep4	include/linux/immap_qe.h	/^	u16 usb_usep4;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usfrn	include/linux/immap_qe.h	/^	u16 usb_usfrn;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_usmod	include/linux/immap_qe.h	/^	u8 usb_usmod;$/;"	m	struct:usb_ctlr	typeref:typename:u8
usb_ussft	include/linux/immap_qe.h	/^	u16 usb_ussft;$/;"	m	struct:usb_ctlr	typeref:typename:u16
usb_vendor_id	board/siemens/common/factoryset.h	/^	int usb_vendor_id;$/;"	m	struct:factorysetcontainer	typeref:typename:int
usb_wireless_cap_descriptor	include/linux/usb/ch9.h	/^struct usb_wireless_cap_descriptor {	\/* Ultra Wide Band *\/$/;"	s
usb_wireless_ep_comp_descriptor	include/linux/usb/ch9.h	/^struct usb_wireless_ep_comp_descriptor {$/;"	s
usb_write_10	common/usb_storage.c	/^static int usb_write_10(ccb *srb, struct us_data *ss, unsigned long start,$/;"	f	typeref:typename:int	file:
usba_control_irq	drivers/usb/gadget/atmel_usba_udc.c	/^static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)$/;"	f	typeref:typename:void	file:
usba_ctrl_state	drivers/usb/gadget/atmel_usba_udc.h	/^enum usba_ctrl_state {$/;"	g
usba_dma_desc	drivers/usb/gadget/atmel_usba_udc.h	/^struct usba_dma_desc {$/;"	s
usba_dma_readl	drivers/usb/gadget/atmel_usba_udc.h	/^#define usba_dma_readl(/;"	d
usba_dma_writel	drivers/usb/gadget/atmel_usba_udc.h	/^#define usba_dma_writel(/;"	d
usba_ep	drivers/usb/gadget/atmel_usba_udc.h	/^	struct usba_ep *usba_ep;$/;"	m	struct:usba_udc	typeref:struct:usba_ep *
usba_ep	drivers/usb/gadget/atmel_usba_udc.h	/^struct usba_ep {$/;"	s
usba_ep0_desc	drivers/usb/gadget/atmel_usba_udc.c	/^static struct usb_endpoint_descriptor usba_ep0_desc = {$/;"	v	typeref:struct:usb_endpoint_descriptor	file:
usba_ep_alloc_request	drivers/usb/gadget/atmel_usba_udc.c	/^usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)$/;"	f	typeref:struct:usb_request *	file:
usba_ep_data	include/linux/usb/atmel_usba_udc.h	/^struct usba_ep_data {$/;"	s
usba_ep_dequeue	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:int	file:
usba_ep_disable	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_ep_disable(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
usba_ep_enable	drivers/usb/gadget/atmel_usba_udc.c	/^usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)$/;"	f	typeref:typename:int	file:
usba_ep_fifo_flush	drivers/usb/gadget/atmel_usba_udc.c	/^static void usba_ep_fifo_flush(struct usb_ep *_ep)$/;"	f	typeref:typename:void	file:
usba_ep_fifo_status	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_ep_fifo_status(struct usb_ep *_ep)$/;"	f	typeref:typename:int	file:
usba_ep_free_request	drivers/usb/gadget/atmel_usba_udc.c	/^usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)$/;"	f	typeref:typename:void	file:
usba_ep_irq	drivers/usb/gadget/atmel_usba_udc.c	/^static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)$/;"	f	typeref:typename:void	file:
usba_ep_ops	drivers/usb/gadget/atmel_usba_udc.c	/^static const struct usb_ep_ops usba_ep_ops = {$/;"	v	typeref:typename:const struct usb_ep_ops	file:
usba_ep_queue	drivers/usb/gadget/atmel_usba_udc.c	/^usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)$/;"	f	typeref:typename:int	file:
usba_ep_readl	drivers/usb/gadget/atmel_usba_udc.h	/^#define usba_ep_readl(/;"	d
usba_ep_set_halt	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_ep_set_halt(struct usb_ep *_ep, int value)$/;"	f	typeref:typename:int	file:
usba_ep_writel	drivers/usb/gadget/atmel_usba_udc.h	/^#define usba_ep_writel(/;"	d
usba_platform_data	include/linux/usb/atmel_usba_udc.h	/^struct usba_platform_data {$/;"	s
usba_readl	drivers/usb/gadget/atmel_usba_udc.h	/^#define usba_readl(/;"	d
usba_request	drivers/usb/gadget/atmel_usba_udc.h	/^struct usba_request {$/;"	s
usba_udc	drivers/usb/gadget/atmel_usba_udc.h	/^struct usba_udc {$/;"	s
usba_udc_ep	arch/arm/mach-at91/include/mach/atmel_usba_udc.h	/^static struct usba_ep_data usba_udc_ep[] = {$/;"	v	typeref:struct:usba_ep_data[]
usba_udc_get_frame	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_udc_get_frame(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
usba_udc_irq	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_udc_irq(struct usba_udc *udc)$/;"	f	typeref:typename:int	file:
usba_udc_ops	drivers/usb/gadget/atmel_usba_udc.c	/^static const struct usb_gadget_ops usba_udc_ops = {$/;"	v	typeref:typename:const struct usb_gadget_ops	file:
usba_udc_pdata	drivers/usb/gadget/atmel_usba_udc.c	/^static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata,$/;"	f	typeref:struct:usba_ep *	file:
usba_udc_probe	drivers/usb/gadget/atmel_usba_udc.c	/^int usba_udc_probe(struct usba_platform_data *pdata)$/;"	f	typeref:typename:int
usba_udc_set_selfpowered	drivers/usb/gadget/atmel_usba_udc.c	/^usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)$/;"	f	typeref:typename:int	file:
usba_udc_wakeup	drivers/usb/gadget/atmel_usba_udc.c	/^static int usba_udc_wakeup(struct usb_gadget *gadget)$/;"	f	typeref:typename:int	file:
usba_writel	drivers/usb/gadget/atmel_usba_udc.h	/^#define usba_writel(/;"	d
usbbphy_ctl	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	usbbphy_ctl;	\/* 0x34 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
usbckcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 usbckcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
usbclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int usbclkctrl;$/;"	m	struct:cm_def	typeref:typename:unsigned int
usbcluster	arch/arm/dts/armada-375.dtsi	/^			usbcluster: usb-cluster@18400 {$/;"	l
usbcmd	arch/arm/include/asm/ehci-omap.h	/^	u32 usbcmd;		\/* 0x10 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
usbcmd	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 usbcmd;		\/* usbcmd *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
usbcmd	drivers/usb/gadget/ci_udc.h	/^	u32 usbcmd;		\/* 0x130 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
usbcmd	drivers/usb/gadget/ci_udc.h	/^	u32 usbcmd;		\/* 0x140 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
usbcmd	include/usb/ehci-ci.h	/^	u32	usbcmd;		\/* 0x140 - USB Command *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
usbcrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 usbcrc;		\/* 0x05C *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
usbctr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 usbctr;$/;"	m	struct:ahbcom_pci_bridge	typeref:typename:u32
usbd_alloc_urb	drivers/usb/gadget/core.c	/^struct urb *usbd_alloc_urb (struct usb_device_instance *device,$/;"	f	typeref:struct:urb *
usbd_dealloc_urb	drivers/usb/gadget/core.c	/^void usbd_dealloc_urb (struct urb *urb)$/;"	f	typeref:typename:void
usbd_device_alternate_instance	drivers/usb/gadget/core.c	/^struct usb_alternate_instance *usbd_device_alternate_instance (struct usb_device_instance *devic/;"	f	typeref:struct:usb_alternate_instance *
usbd_device_configuration_descriptor	drivers/usb/gadget/core.c	/^struct usb_configuration_descriptor *usbd_device_configuration_descriptor (struct$/;"	f	typeref:struct:usb_configuration_descriptor *
usbd_device_configuration_instance	drivers/usb/gadget/core.c	/^static struct usb_configuration_instance *usbd_device_configuration_instance (struct usb_device_/;"	f	typeref:struct:usb_configuration_instance *	file:
usbd_device_descriptors	drivers/usb/gadget/core.c	/^char *usbd_device_descriptors[] = {$/;"	v	typeref:typename:char * []
usbd_device_device_descriptor	drivers/usb/gadget/core.c	/^struct usb_device_descriptor *usbd_device_device_descriptor (struct usb_device_instance *device,/;"	f	typeref:struct:usb_device_descriptor *
usbd_device_endpoint_descriptor	drivers/usb/gadget/core.c	/^struct usb_endpoint_descriptor *usbd_device_endpoint_descriptor (struct usb_device_instance *dev/;"	f	typeref:struct:usb_endpoint_descriptor *
usbd_device_endpoint_descriptor_index	drivers/usb/gadget/core.c	/^struct usb_endpoint_descriptor *usbd_device_endpoint_descriptor_index (struct usb_device_instanc/;"	f	typeref:struct:usb_endpoint_descriptor *
usbd_device_endpoint_transfersize	drivers/usb/gadget/core.c	/^int usbd_device_endpoint_transfersize (struct usb_device_instance *device, int port, int configu/;"	f	typeref:typename:int
usbd_device_event_irq	drivers/usb/gadget/core.c	/^void usbd_device_event_irq (struct usb_device_instance *device, usb_device_event_t event, int da/;"	f	typeref:typename:void
usbd_device_events	drivers/usb/gadget/core.c	/^char *usbd_device_events[] = {$/;"	v	typeref:typename:char * []
usbd_device_interface_descriptor	drivers/usb/gadget/core.c	/^struct usb_interface_descriptor *usbd_device_interface_descriptor (struct usb_device_instance$/;"	f	typeref:struct:usb_interface_descriptor *
usbd_device_interface_instance	drivers/usb/gadget/core.c	/^struct usb_interface_instance *usbd_device_interface_instance (struct usb_device_instance *devic/;"	f	typeref:struct:usb_interface_instance *
usbd_device_requests	drivers/usb/gadget/core.c	/^char *usbd_device_requests[] = {$/;"	v	typeref:typename:char * []
usbd_device_states	drivers/usb/gadget/core.c	/^char *usbd_device_states[] = {$/;"	v	typeref:typename:char * []
usbd_device_status	drivers/usb/gadget/core.c	/^char *usbd_device_status[] = {$/;"	v	typeref:typename:char * []
usbd_endpoint_halted	drivers/usb/gadget/core.c	/^int usbd_endpoint_halted (struct usb_device_instance *device, int endpoint)$/;"	f	typeref:typename:int
usbd_get_string	drivers/usb/gadget/core.c	/^struct usb_string_descriptor *usbd_get_string (__u8 index)$/;"	f	typeref:struct:usb_string_descriptor *
usbd_last_rxtx_timestamp	include/usbdevice.h	/^	unsigned long usbd_last_rxtx_timestamp;$/;"	m	struct:usb_device_instance	typeref:typename:unsigned long
usbd_rcv_complete	drivers/usb/gadget/core.c	/^void usbd_rcv_complete(struct usb_endpoint_instance *endpoint, int len, int urb_bad)$/;"	f	typeref:typename:void
usbd_rxtx_timestamp	include/usbdevice.h	/^	unsigned long usbd_rxtx_timestamp;$/;"	m	struct:usb_device_instance	typeref:typename:unsigned long
usbd_tx_complete	drivers/usb/gadget/core.c	/^void usbd_tx_complete (struct usb_endpoint_instance *endpoint)$/;"	f	typeref:typename:void
usbdbg	include/usbdevice.h	/^#define usbdbg(/;"	d
usbdebug	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	int usbdebug;$/;"	m	struct:pei_data	typeref:typename:int
usbdev1_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdev1_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
usbdev_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdev_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
usbdevice_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdevice_mem_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
usbdevice_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdevice_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
usbdiv_ctrl	arch/arm/include/asm/arch-lpc32xx/clk.h	/^	u32 usbdiv_ctrl;	\/* USB Clock Pre-Divide Register	*\/$/;"	m	struct:clk_pm_regs	typeref:typename:u32
usbdr_clk	arch/powerpc/include/asm/global_data.h	/^	u32 usbdr_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
usbdrd_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdrd_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbdrd_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdrd_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbdrd_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdrd_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbdrd_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdrd_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbdrd_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbdrd_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbdrvvbus_selcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usbdrvvbus_selcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usber	include/usb/mpc8xx_udc.h	/^	ushort usber;	\/* Event Register *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:ushort
usber	post/cpu/mpc8xx/usb.c	/^	ushort usber;$/;"	m	struct:usb	typeref:typename:ushort	file:
usberr	include/usbdevice.h	/^#define usberr(/;"	d
usbf_reset_controller	drivers/usb/host/ehci-tegra.c	/^static void usbf_reset_controller(struct fdt_usb *config,$/;"	f	typeref:typename:void	file:
usbgenctrl	include/usb/ehci-ci.h	/^	u32	usbgenctrl;	\/* 0x200 - USB General Control *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
usbgetpckfromfifo	drivers/usb/gadget/designware_udc.c	/^static int usbgetpckfromfifo(int epNum, u8 *bufp, u32 len)$/;"	f	typeref:typename:int	file:
usbgrp_l3master	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	usbgrp_l3master;$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
usbh1	arch/arm/dts/imx6qdl.dtsi	/^			usbh1: usb@02184200 {$/;"	l
usbh2	arch/arm/dts/imx6qdl.dtsi	/^			usbh2: usb@02184400 {$/;"	l
usbh3	arch/arm/dts/imx6qdl.dtsi	/^			usbh3: usb@02184600 {$/;"	l
usbhost_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbhost_phy_control;$/;"	m	struct:exynos4412_power	typeref:typename:unsigned int
usbhost_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbhost_phy_control;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
usbhost_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbhost_phy_control;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
usbhost_phy_control	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbhost_phy_control;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbhs_bdata	board/compulab/cm_t35/cm_t35.c	/^struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data
usbhs_bdata	board/compulab/cm_t54/cm_t54.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/gumstix/duovero/duovero.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/htkw/mcx/mcx.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/overo/overo.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/technexion/tao3530/tao3530.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/technexion/twister/twister.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/teejet/mt_ventoux/mt_ventoux.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/ti/beagle/beagle.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/ti/omap5_uevm/evm.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_bdata	board/ti/panda/panda.c	/^static struct omap_usbhs_board_data usbhs_bdata = {$/;"	v	typeref:struct:omap_usbhs_board_data	file:
usbhs_omap_port_mode	arch/arm/include/asm/ehci-omap.h	/^enum usbhs_omap_port_mode {$/;"	g
usbhub_rst	arch/arm/dts/rk3288-firefly.dtsi	/^		usbhub_rst: usbhub-rst {$/;"	l
usbinfo	include/usbdevice.h	/^#define usbinfo(/;"	d
usbintr	arch/arm/include/asm/ehci-omap.h	/^	u32 usbintr;		\/* 0x18 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
usbintr	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 usbintr;		\/* usbintr *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
usbintr	include/usb/ehci-ci.h	/^	u32	usbintr;	\/* 0x148 - USB Interrupt Enable *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
usbmisc	arch/arm/dts/imx6qdl.dtsi	/^			usbmisc: usbmisc@02184800 {$/;"	l
usbmisc	arch/arm/dts/imx6ull.dtsi	/^			usbmisc: usbmisc@02184800 {$/;"	l	label:aips2
usbmode	drivers/usb/gadget/ci_udc.h	/^	u32 usbmode;		\/* 0x1a8 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
usbmode	drivers/usb/gadget/ci_udc.h	/^	u32 usbmode;		\/* 0x1f8 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
usbmode	include/usb/ehci-ci.h	/^	u32	usbmode;	\/* 0x1a8 - USB Device Mode *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
usbmon_trace	drivers/usb/host/usb-sandbox.c	/^static void usbmon_trace(struct udevice *bus, ulong pipe,$/;"	f	typeref:typename:void	file:
usbmph_clk	arch/powerpc/include/asm/global_data.h	/^	u32 usbmph_clk;$/;"	m	struct:arch_global_data	typeref:typename:u32
usbmr	include/usb/mpc8xx_udc.h	/^	ushort usbmr;	\/* Mask Register *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:ushort
usbmr	post/cpu/mpc8xx/usb.c	/^	ushort usbmr;$/;"	m	struct:usb	typeref:typename:ushort	file:
usbnc_regs	drivers/usb/host/ehci-mx6.c	/^struct usbnc_regs {$/;"	s	file:
usbophy1_rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 usbophy1_rcr;$/;"	m	struct:src	typeref:typename:u32
usbophy2_rcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 usbophy2_rcr;$/;"	m	struct:src	typeref:typename:u32
usbotg	arch/arm/dts/imx6qdl.dtsi	/^			usbotg: usb@02184000 {$/;"	l
usbotg1	arch/arm/dts/imx6ull.dtsi	/^			usbotg1: usb@02184000 {$/;"	l	label:aips2
usbotg2	arch/arm/dts/imx6ull.dtsi	/^			usbotg2: usb@02184200 {$/;"	l	label:aips2
usbotg_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	usbotg_fck: usbotg_fck {$/;"	l
usbotg_mem_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbotg_mem_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbotg_mem_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbotg_mem_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbotg_mem_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbotg_mem_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbotg_mem_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	usbotg_mem_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
usbotg_pwren_h	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		usbotg_pwren_h: usbotg-pwren-h {$/;"	l
usbotg_t	arch/m68k/include/asm/immap_5329.h	/^} usbotg_t;$/;"	t	typeref:struct:usb_otg
usbotgsys	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbotgsys;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
usbotgtune	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbotgtune;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
usbp	drivers/usb/gadget/mpc8xx_udc.c	/^static volatile usb_t *usbp = 0;$/;"	v	typeref:typename:volatile usb_t *	file:
usbphy	arch/arm/dts/rk3288.dtsi	/^	usbphy: phy {$/;"	l
usbphy	arch/arm/dts/sun4i-a10.dtsi	/^		usbphy: phy@01c13400 {$/;"	l
usbphy	arch/arm/dts/sun50i-a64.dtsi	/^		usbphy: phy@1c1b810 {$/;"	l
usbphy	arch/arm/dts/sun5i.dtsi	/^		usbphy: phy@01c13400 {$/;"	l
usbphy	arch/arm/dts/sun6i-a31.dtsi	/^		usbphy: phy@01c19400 {$/;"	l
usbphy	arch/arm/dts/sun7i-a20-primo73.dts	/^		usbphy: phy@01c13400 {$/;"	l
usbphy	arch/arm/dts/sun7i-a20.dtsi	/^		usbphy: phy@01c13400 {$/;"	l
usbphy	arch/arm/dts/sun8i-a23.dtsi	/^		usbphy: phy@01c19400 {$/;"	l
usbphy	arch/arm/dts/sun8i-a33.dtsi	/^		usbphy: phy@01c19400 {$/;"	l
usbphy	arch/arm/dts/sun8i-h3.dtsi	/^		usbphy: phy@01c19400 {$/;"	l
usbphy0	arch/arm/dts/rk3288.dtsi	/^		usbphy0: usb-phy0 {$/;"	l	label:usbphy
usbphy0	arch/arm/dts/socfpga.dtsi	/^		usbphy0: usbphy@0 {$/;"	l
usbphy0_con	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int usbphy0_con[8];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[8]
usbphy0_ctrl	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usbphy0_ctrl[26];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[26]
usbphy0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usbphy0clkctrl;	\/* offset 0x240 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
usbphy1	arch/arm/dts/imx6qdl.dtsi	/^			usbphy1: usbphy@020c9000 {$/;"	l
usbphy1	arch/arm/dts/imx6ull.dtsi	/^			usbphy1: usbphy@020c9000 {$/;"	l
usbphy1	arch/arm/dts/rk3288.dtsi	/^		usbphy1: usb-phy1 {$/;"	l	label:usbphy
usbphy1	arch/arm/dts/sun9i-a80.dtsi	/^		usbphy1: phy@00a00800 {$/;"	l
usbphy1	arch/arm/include/asm/arch-rockchip/grf_rk3399.h	/^	u32 usbphy1[26];$/;"	m	struct:rk3399_grf_regs	typeref:typename:u32[26]
usbphy1_con	arch/arm/include/asm/arch-rockchip/grf_rk3036.h	/^	unsigned int usbphy1_con[8];$/;"	m	struct:rk3036_grf	typeref:typename:unsigned int[8]
usbphy1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usbphy1clkctrl;	\/* offset 0x248 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
usbphy2	arch/arm/dts/imx6qdl.dtsi	/^			usbphy2: usbphy@020ca000 {$/;"	l
usbphy2	arch/arm/dts/imx6ull.dtsi	/^			usbphy2: usbphy@020ca000 {$/;"	l
usbphy2	arch/arm/dts/rk3288.dtsi	/^		usbphy2: usb-phy2 {$/;"	l	label:usbphy
usbphy2	arch/arm/dts/sun9i-a80.dtsi	/^		usbphy2: phy@00a01800 {$/;"	l
usbphy3	arch/arm/dts/sun9i-a80.dtsi	/^		usbphy3: phy@00a02800 {$/;"	l
usbphy_32khz_clkmux	arch/arm/dts/am43xx-clocks.dtsi	/^	usbphy_32khz_clkmux: usbphy_32khz_clkmux {$/;"	l
usbphyclk	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbphyclk;$/;"	m	struct:exynos4412_usb_phy	typeref:typename:unsigned int
usbphyctrl	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbphyctrl;$/;"	m	struct:exynos4412_usb_phy	typeref:typename:unsigned int
usbphyctrl0	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbphyctrl0;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
usbphyocp2scp0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usbphyocp2scp0clkctrl;	\/* offset 0x5B8 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
usbphyocp2scp1clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int usbphyocp2scp1clkctrl;	\/* offset 0x5C0 *\/$/;"	m	struct:cm_perpll	typeref:typename:unsigned int
usbphyrstcon	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbphyrstcon;$/;"	m	struct:exynos4412_usb_phy	typeref:typename:unsigned int
usbphytune0	arch/arm/mach-exynos/include/mach/ehci.h	/^	unsigned int usbphytune0;$/;"	m	struct:exynos_usb_phy	typeref:typename:unsigned int
usbpll_setup	drivers/usb/host/ohci-lpc32xx.c	/^static int usbpll_setup(void)$/;"	f	typeref:typename:int	file:
usbputpcktofifo	drivers/usb/gadget/designware_udc.c	/^static void usbputpcktofifo(int epNum, u8 *bufp, u32 len)$/;"	f	typeref:typename:void	file:
usbpwrfault_selcr	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	u32 usbpwrfault_selcr;$/;"	m	struct:ccsr_scfg	typeref:typename:u32
usbs	include/usb/mpc8xx_udc.h	/^	char usbs;	\/* Status Register *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char
usbs	post/cpu/mpc8xx/usb.c	/^	uchar usbs;$/;"	m	struct:usb	typeref:typename:uchar	file:
usbss	drivers/usb/host/xhci-keystone.c	/^	struct kdwc3_irq_regs *usbss;$/;"	m	struct:keystone_xhci	typeref:struct:kdwc3_irq_regs *	file:
usbsts	arch/arm/include/asm/ehci-omap.h	/^	u32 usbsts;		\/* 0x14 *\/$/;"	m	struct:omap_ehci	typeref:typename:u32
usbsts	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 usbsts;		\/* usbsts *\/$/;"	m	struct:rmobile_ehci_reg	typeref:typename:u32
usbsts	drivers/usb/gadget/ci_udc.h	/^	u32 usbsts;		\/* 0x134 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
usbsts	drivers/usb/gadget/ci_udc.h	/^	u32 usbsts;		\/* 0x144 *\/$/;"	m	struct:ci_udc	typeref:typename:u32
usbsts	include/usb/ehci-ci.h	/^	u32	usbsts;		\/* 0x144 - USB Status *\/$/;"	m	struct:usb_ehci	typeref:typename:u32
usbtll	drivers/usb/host/ehci-omap.c	/^static struct omap_usbtll *const usbtll = (struct omap_usbtll *)OMAP_USBTLL_BASE;$/;"	v	typeref:struct:omap_usbtll * const	file:
usbtty_cdc_setup	drivers/serial/usbtty.c	/^int usbtty_cdc_setup(struct usb_device_request *request, struct urb *urb)$/;"	f	typeref:typename:int
usbtty_configured	drivers/serial/usbtty.c	/^static int usbtty_configured (void)$/;"	f	typeref:typename:int	file:
usbtty_configured_flag	drivers/serial/usbtty.c	/^int usbtty_configured_flag = 0;$/;"	v	typeref:typename:int
usbtty_event_handler	drivers/serial/usbtty.c	/^static void usbtty_event_handler (struct usb_device_instance *device,$/;"	f	typeref:typename:void	file:
usbtty_getc	drivers/serial/usbtty.c	/^int usbtty_getc(struct stdio_dev *dev)$/;"	f	typeref:typename:int
usbtty_getc	include/serial.h	/^#define usbtty_getc(/;"	d
usbtty_init_endpoints	drivers/serial/usbtty.c	/^static void usbtty_init_endpoints (void)$/;"	f	typeref:typename:void	file:
usbtty_init_instances	drivers/serial/usbtty.c	/^static void usbtty_init_instances (void)$/;"	f	typeref:typename:void	file:
usbtty_init_strings	drivers/serial/usbtty.c	/^static void usbtty_init_strings (void)$/;"	f	typeref:typename:void	file:
usbtty_init_terminal_type	drivers/serial/usbtty.c	/^static void usbtty_init_terminal_type(short type)$/;"	f	typeref:typename:void	file:
usbtty_input	drivers/serial/usbtty.c	/^static circbuf_t usbtty_input;$/;"	v	typeref:typename:circbuf_t	file:
usbtty_output	drivers/serial/usbtty.c	/^static circbuf_t usbtty_output;$/;"	v	typeref:typename:circbuf_t	file:
usbtty_poll	drivers/serial/usbtty.c	/^void usbtty_poll (void)$/;"	f	typeref:typename:void
usbtty_putc	drivers/serial/usbtty.c	/^void usbtty_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void
usbtty_putc	include/serial.h	/^#define usbtty_putc(/;"	d
usbtty_puts	drivers/serial/usbtty.c	/^void usbtty_puts(struct stdio_dev *dev, const char *str)$/;"	f	typeref:typename:void
usbtty_puts	include/serial.h	/^#define usbtty_puts(/;"	d
usbtty_string_table	drivers/serial/usbtty.c	/^static struct usb_string_descriptor *usbtty_string_table[STR_COUNT];$/;"	v	typeref:struct:usb_string_descriptor * []	file:
usbtty_tstc	drivers/serial/usbtty.c	/^int usbtty_tstc(struct stdio_dev *dev)$/;"	f	typeref:typename:int
usbtty_tstc	include/serial.h	/^#define usbtty_tstc(/;"	d
usbttydev	drivers/serial/usbtty.c	/^static struct stdio_dev usbttydev;$/;"	v	typeref:struct:stdio_dev	file:
uscom	include/usb/mpc8xx_udc.h	/^	char uscom;	\/* Command Register *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char
uscom	post/cpu/mpc8xx/usb.c	/^	uchar uscom;$/;"	m	struct:usb	typeref:typename:uchar	file:
uscr	arch/powerpc/include/asm/immap_83xx.h	/^	u8 uscr;		\/* scratch register *\/$/;"	m	struct:duart83xx	typeref:typename:u8
uscr1	arch/powerpc/include/asm/immap_85xx.h	/^	u8	uscr1;		\/* UART1 Scratch *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
uscr1	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	uscr1;		\/* 0x4507 - UART1 Scratch Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
uscr2	arch/powerpc/include/asm/immap_85xx.h	/^	u8	uscr2;		\/* UART2 Scratch *\/$/;"	m	struct:ccsr_duart	typeref:typename:u8
uscr2	arch/powerpc/include/asm/immap_86xx.h	/^	u_char	uscr2;		\/* 0x4607 - UART2 Scratch Register *\/$/;"	m	struct:ccsr_duart	typeref:typename:u_char
usd_vsel	board/gateworks/gw_ventana/common.h	/^	bool usd_vsel;$/;"	m	struct:ventana	typeref:typename:bool
usdhc1	arch/arm/dts/imx6qdl.dtsi	/^			usdhc1: usdhc@02190000 {$/;"	l
usdhc1	arch/arm/dts/imx6ull.dtsi	/^			usdhc1: usdhc@02190000 {$/;"	l	label:aips2
usdhc1_pads	board/aristainetos/aristainetos.c	/^iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc1_pads	board/engicam/icorem6/icorem6.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc1_pads	board/wandboard/wandboard.c	/^static iomux_v3_cfg_t const usdhc1_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2	arch/arm/dts/imx6qdl.dtsi	/^			usdhc2: usdhc@02194000 {$/;"	l
usdhc2	arch/arm/dts/imx6ull.dtsi	/^			usdhc2: usdhc@02194000 {$/;"	l	label:aips2
usdhc2_cd_pad	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const usdhc2_cd_pad =$/;"	v	typeref:typename:iomux_v3_cfg_t const	file:
usdhc2_cfg	board/tqc/tqma6/tqma6_wru4.c	/^static struct fsl_esdhc_cfg usdhc2_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
usdhc2_dat3_pad	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const usdhc2_dat3_pad =$/;"	v	typeref:typename:iomux_v3_cfg_t const	file:
usdhc2_emmc_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const usdhc2_emmc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/ccv/xpress/xpress.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc2_pads	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc2_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
usdhc2_pads	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc2_pads	board/tqc/tqma6/tqma6_wru4.c	/^static iomux_v3_cfg_t const usdhc2_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3	arch/arm/dts/imx6qdl.dtsi	/^			usdhc3: usdhc@02198000 {$/;"	l
usdhc3_emmc_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_emmc_pads	board/toradex/colibri_imx7/colibri_imx7.c	/^static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/bachmann/ot1200/ot1200.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/barco/platinum/platinum.c	/^iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc3_pads	board/barco/titanium/titanium.c	/^iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc3_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc3_pads	board/freescale/mx6qarm2/mx6qarm2.c	/^iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc3_pads	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/freescale/mx6slevk/mx6slevk.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/gateworks/gw_ventana/gw_ventana.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/kosagi/novena/novena_spl.c	/^static iomux_v3_cfg_t usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t[]	file:
usdhc3_pads	board/seco/common/mx6.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/udoo/udoo.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/wandboard/wandboard.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc3_pads	board/warp7/warp7.c	/^static iomux_v3_cfg_t const usdhc3_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4	arch/arm/dts/imx6qdl.dtsi	/^			usdhc4: usdhc@0219c000 {$/;"	l
usdhc4_pads	board/advantech/dms-ba16/dms-ba16.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/bachmann/ot1200/ot1200.c	/^iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc4_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/el/el6x/el6x.c	/^iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc4_pads	board/embest/mx6boards/mx6boards.c	/^iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc4_pads	board/freescale/mx6qarm2/mx6qarm2.c	/^iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]
usdhc4_pads	board/freescale/mx6sabresd/mx6sabresd.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/ge/bx50v3/bx50v3.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/phytec/pcm058/pcm058.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/seco/common/mx6.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc4_pads	board/tbs/tbs2910/tbs2910.c	/^static iomux_v3_cfg_t const usdhc4_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
usdhc_cfg	board/advantech/dms-ba16/dms-ba16.c	/^struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]
usdhc_cfg	board/aristainetos/aristainetos.c	/^struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
usdhc_cfg	board/bachmann/ot1200/ot1200.c	/^struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
usdhc_cfg	board/barco/platinum/platinum.c	/^struct fsl_esdhc_cfg usdhc_cfg[] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[]
usdhc_cfg	board/barco/titanium/titanium.c	/^struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
usdhc_cfg	board/boundary/nitrogen6x/nitrogen6x.c	/^static struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]	file:
usdhc_cfg	board/ccv/xpress/xpress.c	/^static struct fsl_esdhc_cfg usdhc_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
usdhc_cfg	board/compulab/cm_fx6/cm_fx6.c	/^static struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]	file:
usdhc_cfg	board/compulab/cm_fx6/spl.c	/^static struct fsl_esdhc_cfg usdhc_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
usdhc_cfg	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^static struct fsl_esdhc_cfg usdhc_cfg[] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[]	file:
usdhc_cfg	board/el/el6x/el6x.c	/^struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
usdhc_cfg	board/embest/mx6boards/mx6boards.c	/^struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]
usdhc_cfg	board/engicam/icorem6/icorem6.c	/^struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]
usdhc_cfg	board/freescale/mx6qarm2/mx6qarm2.c	/^struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]
usdhc_cfg	board/freescale/mx6qsabreauto/mx6qsabreauto.c	/^static struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]	file:
usdhc_cfg	board/freescale/mx6sabresd/mx6sabresd.c	/^struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]
usdhc_cfg	board/freescale/mx6slevk/mx6slevk.c	/^static struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]	file:
usdhc_cfg	board/freescale/mx6sxsabreauto/mx6sxsabreauto.c	/^static struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]	file:
usdhc_cfg	board/freescale/mx6sxsabresd/mx6sxsabresd.c	/^static struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]	file:
usdhc_cfg	board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c	/^static struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]	file:
usdhc_cfg	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]	file:
usdhc_cfg	board/gateworks/gw_ventana/gw_ventana.c	/^static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
usdhc_cfg	board/ge/bx50v3/bx50v3.c	/^struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]
usdhc_cfg	board/kosagi/novena/novena.c	/^static struct fsl_esdhc_cfg usdhc_cfg[] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[]	file:
usdhc_cfg	board/kosagi/novena/novena_spl.c	/^static struct fsl_esdhc_cfg usdhc_cfg = {$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
usdhc_cfg	board/phytec/pcm058/pcm058.c	/^static struct fsl_esdhc_cfg usdhc_cfg[] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[]	file:
usdhc_cfg	board/seco/mx6quq7/mx6quq7.c	/^static struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]	file:
usdhc_cfg	board/solidrun/mx6cuboxi/mx6cuboxi.c	/^static struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]	file:
usdhc_cfg	board/tbs/tbs2910/tbs2910.c	/^static struct fsl_esdhc_cfg usdhc_cfg[3] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[3]	file:
usdhc_cfg	board/technexion/pico-imx6ul/pico-imx6ul.c	/^static struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]	file:
usdhc_cfg	board/toradex/colibri_imx7/colibri_imx7.c	/^static struct fsl_esdhc_cfg usdhc_cfg[] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[]	file:
usdhc_cfg	board/udoo/udoo.c	/^static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };$/;"	v	typeref:struct:fsl_esdhc_cfg	file:
usdhc_cfg	board/wandboard/wandboard.c	/^static struct fsl_esdhc_cfg usdhc_cfg[2] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[2]	file:
usdhc_cfg	board/warp/warp.c	/^static struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]	file:
usdhc_cfg	board/warp7/warp7.c	/^static struct fsl_esdhc_cfg usdhc_cfg[1] = {$/;"	v	typeref:struct:fsl_esdhc_cfg[1]	file:
usdhc_clk	board/compulab/cm_fx6/cm_fx6.c	/^static enum mxc_clock usdhc_clk[3] = {$/;"	g	file:
usdhc_pads	board/compulab/cm_fx6/common.c	/^static iomux_v3_cfg_t const usdhc_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
use-db2x	doc/DocBook/Makefile	/^	use-db2x = db2x$/;"	m
use-db2x	doc/DocBook/Makefile	/^	use-db2x = notfound$/;"	m
use-xmlto	doc/DocBook/Makefile	/^	use-xmlto = notfound$/;"	m
use-xmlto	doc/DocBook/Makefile	/^	use-xmlto = xmlto$/;"	m
use.id.as.filename	doc/DocBook/stylesheet.xsl	/^<param name="use.id.as.filename">1<\/param>$/;"	p
useCount	fs/yaffs2/yaffsfs.c	/^	short int useCount;$/;"	m	struct:yaffsfs_Handle	typeref:typename:short int	file:
useYaffs2	fs/yaffs2/yaffs_nandif.h	/^	unsigned useYaffs2;$/;"	m	struct:ynandif_Geometry	typeref:typename:unsigned
use_adaptive_rx_coalesce	include/linux/ethtool.h	/^	__u32	use_adaptive_rx_coalesce;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
use_adaptive_tx_coalesce	include/linux/ethtool.h	/^	__u32	use_adaptive_tx_coalesce;$/;"	m	struct:ethtool_coalesce	typeref:typename:__u32
use_broadcast	drivers/ddr/marvell/a38x/ddr3_training.c	/^int use_broadcast = 0;$/;"	v	typeref:typename:int
use_cnt	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	int use_cnt;$/;"	m	struct:clk	typeref:typename:int
use_cnt	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	int use_cnt;$/;"	m	struct:clk	typeref:typename:int
use_common_tx_conf_queue	include/fsl-mc/fsl_dpni.h	/^	int		use_common_tx_conf_queue;$/;"	m	struct:dpni_tx_flow_cfg	typeref:typename:int
use_common_tx_conf_queue	include/fsl-mc/fsl_dpni.h	/^	int	use_common_tx_conf_queue;$/;"	m	struct:dpni_tx_flow_attr	typeref:typename:int
use_config	scripts/basic/fixdep.c	/^static void use_config(const char *m, int slen)$/;"	f	typeref:typename:void	file:
use_defaults	cmd/mtdparts.c	/^u8 use_defaults;$/;"	v	typeref:typename:u8
use_derated_caslat	include/fsl_ddr_sdram.h	/^	unsigned int use_derated_caslat;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
use_dma	drivers/usb/musb-new/musb_core.c	/^#define use_dma	/;"	d	file:
use_dma	drivers/usb/musb-new/musb_core.c	/^static bool __devinitdata use_dma = 1;$/;"	v	typeref:typename:bool __devinitdata	file:
use_dte	include/dm/platform_data/serial_mxc.h	/^	bool use_dte;$/;"	m	struct:mxc_serial_platdata	typeref:typename:bool
use_ecc	drivers/mtd/nand/pxa3xx_nand.c	/^	int			use_ecc;	\/* use HW ECC ? *\/$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
use_ecc	drivers/mtd/nand/pxa3xx_nand.c	/^	int			use_ecc;$/;"	m	struct:pxa3xx_nand_host	typeref:typename:int	file:
use_eerd	drivers/net/e1000.h	/^	bool use_eerd;$/;"	m	struct:e1000_eeprom_info	typeref:typename:bool
use_eewr	drivers/net/e1000.h	/^	bool use_eewr;$/;"	m	struct:e1000_eeprom_info	typeref:typename:bool
use_fh	board/micronas/vct/scc.h	/^	int use_fh;		\/* the flag tells if SCC uses an FH	*\/$/;"	m	struct:scc_descriptor	typeref:typename:int
use_flash_16bit_boot	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^use_flash_16bit_boot:$/;"	l
use_flash_32bit_boot	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^use_flash_32bit_boot:$/;"	l
use_flash_status_poll	drivers/mtd/cfi_flash.c	/^static int use_flash_status_poll(flash_info_t *info)$/;"	f	typeref:typename:int	file:
use_header_file_size	fs/yaffs2/yaffs_guts.h	/^	int use_header_file_size;	\/* Flag to determine if we should use$/;"	m	struct:yaffs_param	typeref:typename:int
use_internal_phy	drivers/net/sun8i_emac.c	/^	bool use_internal_phy;$/;"	m	struct:emac_eth_dev	typeref:typename:bool	file:
use_mdr	drivers/mtd/nand/fsl_elbc_nand.c	/^	unsigned int use_mdr;    \/* Non zero if the MDR is to be set      *\/$/;"	m	struct:fsl_elbc_ctrl	typeref:typename:unsigned int	file:
use_nand_ecc	fs/yaffs2/yaffs_guts.h	/^	int use_nand_ecc;	\/* Flag to decide whether or not to use$/;"	m	struct:yaffs_param	typeref:typename:int
use_no_decorate	tools/patman/gitutil.py	/^use_no_decorate = True$/;"	v
use_pmecc	tools/atmelimage.c	/^	int use_pmecc;$/;"	m	struct:pmecc_config	typeref:typename:int	file:
use_pool_for_malloc	include/efi.h	/^	bool use_pool_for_malloc;$/;"	m	struct:efi_priv	typeref:typename:bool
use_rx_pong_buffer_next	drivers/net/xilinx_emaclite.c	/^	bool use_rx_pong_buffer_next;	\/* Next RX buffer to read from *\/$/;"	m	struct:xemaclite	typeref:typename:bool	file:
use_sel	drivers/gpio/intel_ich6_gpio.c	/^	uint16_t use_sel;$/;"	m	struct:ich6_bank_priv	typeref:typename:uint16_t	file:
use_smc_for_psci	arch/arm/cpu/armv8/fwcall.c	/^static const __efi_runtime_data bool use_smc_for_psci = true;$/;"	v	typeref:typename:const __efi_runtime_data bool	file:
use_spare	drivers/mtd/nand/pxa3xx_nand.c	/^	int			use_spare;	\/* use spare ? *\/$/;"	m	struct:pxa3xx_nand_info	typeref:typename:int	file:
use_system_time	drivers/rtc/i2c_rtc_emul.c	/^	bool use_system_time;$/;"	m	struct:sandbox_i2c_rtc_plat_data	typeref:typename:bool	file:
use_tlb_cam	arch/powerpc/cpu/mpc85xx/tlb.c	/^static inline void use_tlb_cam(u8 idx)$/;"	f	typeref:typename:void	file:
use_uart	lib/efi/efi_stub.c	/^static bool use_uart;$/;"	v	typeref:typename:bool	file:
usec2ticks	arch/arm/cpu/armv7/ls102xa/timer.c	/^unsigned long usec2ticks(unsigned long usec)$/;"	f	typeref:typename:unsigned long
usec2ticks	arch/arm/cpu/armv8/generic_timer.c	/^unsigned long usec2ticks(unsigned long usec)$/;"	f	typeref:typename:unsigned long
usec2ticks	arch/arm/imx-common/syscounter.c	/^unsigned long usec2ticks(unsigned long usec)$/;"	f	typeref:typename:unsigned long
usec2ticks	arch/arm/imx-common/timer.c	/^unsigned long usec2ticks(unsigned long _usec)$/;"	f	typeref:typename:unsigned long
usec2ticks	arch/m68k/lib/time.c	/^unsigned long usec2ticks(unsigned long usec)$/;"	f	typeref:typename:unsigned long
usec2ticks	arch/powerpc/lib/time.c	/^unsigned long usec2ticks(unsigned long usec)$/;"	f	typeref:typename:unsigned long
usec_to_32k	arch/arm/include/asm/arch-omap5/sys_proto.h	/^static inline u32 usec_to_32k(u32 usec)$/;"	f	typeref:typename:u32
usec_to_tick	arch/arm/mach-rockchip/rk_timer.c	/^static uint64_t usec_to_tick(unsigned int usec)$/;"	f	typeref:typename:uint64_t	file:
usec_to_tick	lib/time.c	/^static uint64_t usec_to_tick(unsigned long usec)$/;"	f	typeref:typename:uint64_t	file:
usecount	drivers/video/ipu.h	/^	__s8 usecount;$/;"	m	struct:clk	typeref:typename:__s8
usecount	include/linux/mtd/mtd.h	/^	int usecount;$/;"	m	struct:mtd_info	typeref:typename:int
usecs_to_ticks	arch/arm/cpu/arm920t/ep93xx/timer.c	/^static inline unsigned long long usecs_to_ticks(unsigned long usecs)$/;"	f	typeref:typename:unsigned long long	file:
used	drivers/mtd/mtdcore.c	/^	int	used;$/;"	m	struct:idr_layer	typeref:typename:int	file:
used	drivers/mtd/ubi/ubi.h	/^	int used;$/;"	m	struct:ubi_fm_pool	typeref:typename:int
used	drivers/mtd/ubi/ubi.h	/^	struct rb_root used;$/;"	m	struct:ubi_device	typeref:struct:rb_root
used	drivers/mtd/ubispl/ubi-wrapper.h	/^	int used;$/;"	m	struct:ubi_fm_pool	typeref:typename:int
used	drivers/net/mpc5xxx_fec.c	/^    int used;                   \/* buffer in use or not *\/$/;"	m	struct:__anone13c4dc40108	typeref:typename:int	file:
used	drivers/usb/gadget/rndis.h	/^	u8			used;$/;"	m	struct:rndis_params	typeref:typename:u8
used	fs/ubifs/ubifs.h	/^	int used;$/;"	m	struct:ubifs_wbuf	typeref:typename:int
used	include/fdtdec.h	/^	uint32_t used;			\/* Number of bytes used in region *\/$/;"	m	struct:fmap_entry	typeref:typename:uint32_t
used	lib/hashtable.c	/^	int used;$/;"	m	struct:_ENTRY	typeref:typename:int	file:
usedTbdIdx	arch/m68k/include/asm/fsl_mcdmafec.h	/^	u16 usedTbdIdx;		\/* next transmit BD to clean *\/$/;"	m	struct:fec_info_dma	typeref:typename:u16
usedTbdIndex	drivers/net/mpc512x_fec.h	/^	u16 usedTbdIndex;		\/* next transmit BD to clean *\/$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:u16
usedTbdIndex	drivers/net/mpc5xxx_fec.h	/^	uint16 usedTbdIndex;		\/* next transmit BD to clean *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:uint16
used_blocks	drivers/mtd/ubi/ubi-media.h	/^	__be32 used_blocks;$/;"	m	struct:ubi_fm_sb	typeref:typename:__be32
used_blocks	drivers/mtd/ubi/ubi.h	/^	int used_blocks;$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int
used_blocks	drivers/mtd/ubispl/ubi-wrapper.h	/^	int used_blocks;$/;"	m	struct:ubi_fastmap_layout	typeref:typename:int
used_bytes	drivers/mtd/ubi/ubi.h	/^	long long used_bytes;$/;"	m	struct:ubi_volume	typeref:typename:long long
used_bytes	include/linux/mtd/ubi.h	/^	long long used_bytes;$/;"	m	struct:ubi_volume_info	typeref:typename:long long
used_dir_cnt	include/ext_common.h	/^	__le16 used_dir_cnt;	\/* Directories count *\/$/;"	m	struct:ext2_block_group	typeref:typename:__le16
used_dir_cnt_high	include/ext_common.h	/^	__le16 used_dir_cnt_high;$/;"	m	struct:ext2_block_group	typeref:typename:__le16
used_ebs	drivers/mtd/ubi/ubi-media.h	/^	__be32  used_ebs;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
used_ebs	drivers/mtd/ubi/ubi-media.h	/^	__be32 used_ebs;$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__be32
used_ebs	drivers/mtd/ubi/ubi.h	/^	int used_ebs;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
used_ebs	drivers/mtd/ubi/ubi.h	/^	int used_ebs;$/;"	m	struct:ubi_volume	typeref:typename:int
used_ebs	include/linux/mtd/ubi.h	/^	int used_ebs;$/;"	m	struct:ubi_volume_info	typeref:typename:int
used_laws	arch/powerpc/include/asm/global_data.h	/^	u32 used_laws;$/;"	m	struct:arch_global_data	typeref:typename:u32
used_peb_count	drivers/mtd/ubi/ubi-media.h	/^	__be32 used_peb_count;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
used_tlb_cams	arch/powerpc/include/asm/global_data.h	/^	u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)\/32];$/;"	m	struct:arch_global_data	typeref:typename:u32[]
useecc	include/mtd/mtd-abi.h	/^	__u32 useecc;$/;"	m	struct:nand_oobinfo	typeref:typename:__u32
usep	include/usb/mpc8xx_udc.h	/^	ushort usep[4];$/;"	m	struct:mpc8xx_usb	typeref:typename:ushort[4]
usep	post/cpu/mpc8xx/usb.c	/^	ushort usep[4];$/;"	m	struct:usb	typeref:typename:ushort[4]	file:
user	drivers/net/cpsw.c	/^	} user[0];$/;"	m	struct:cpsw_mdio_regs	typeref:struct:cpsw_mdio_regs::__anon0b90ad170108[0]	file:
user	include/ddr_spd.h	/^	uint8_t user[512-384];		\/* 384~511 End User Programmable *\/$/;"	m	struct:ddr4_spd_eeprom_s	typeref:typename:uint8_t[]
user	include/mmc.h	/^	} user;$/;"	m	struct:mmc_hwpart_conf	typeref:struct:mmc_hwpart_conf::__anona5bcc78b0208
user_allocator_context	drivers/video/stb_truetype.h	/^   void *user_allocator_context;$/;"	m	struct:stbtt_pack_context	typeref:typename:void *
user_am	include/universe.h	/^	unsigned int user_am;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
user_buffer	include/bouncebuf.h	/^	void *user_buffer;$/;"	m	struct:bounce_buffer	typeref:typename:void *
user_cpus_allowed	arch/mips/include/asm/processor.h	/^	cpumask_t user_cpus_allowed;$/;"	m	struct:thread_struct	typeref:typename:cpumask_t
user_ctx	include/fsl-mc/fsl_dpni.h	/^	uint64_t user_ctx;$/;"	m	struct:dpni_queue_attr	typeref:typename:uint64_t
user_ctx	include/fsl-mc/fsl_dpni.h	/^	uint64_t user_ctx;$/;"	m	struct:dpni_queue_cfg	typeref:typename:uint64_t
user_dipsw_pio_8in	arch/nios2/dts/3c120_devboard.dts	/^			user_dipsw_pio_8in: gpio@0x4ce0 {$/;"	l	label:pb_cpu_to_io
user_disable_single_step	arch/blackfin/include/asm/ptrace.h	/^#define user_disable_single_step(/;"	d
user_field	tools/zynqimage.c	/^	uint32_t user_field; \/* 0x2c *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
user_led0	board/mpl/mip405/mip405.c	/^void user_led0 (unsigned char on)$/;"	f	typeref:typename:void
user_led0	board/mpl/pati/pati.c	/^void user_led0(int led_on)$/;"	f	typeref:typename:void
user_led0	board/mpl/pip405/pip405.c	/^void user_led0 (unsigned char on)$/;"	f	typeref:typename:void
user_led1	board/mpl/pati/pati.c	/^void user_led1(int led_on)$/;"	f	typeref:typename:void
user_led1	board/mpl/pip405/pip405.c	/^void user_led1 (unsigned char on)$/;"	f	typeref:typename:void
user_led_pio_8out	arch/nios2/dts/3c120_devboard.dts	/^			user_led_pio_8out: gpio@0x4cc0 {$/;"	l	label:pb_cpu_to_io
user_leds	arch/arm/dts/am335x-icev2.dts	/^	user_leds: user_leds {$/;"	l
user_leds_s0	arch/arm/dts/am335x-bone-common.dtsi	/^	user_leds_s0: user_leds_s0 {$/;"	l
user_leds_s0	arch/arm/dts/am335x-evmsk.dts	/^	user_leds_s0: user_leds_s0 {$/;"	l
user_mode	arch/arm/include/asm/proc-armv/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/avr32/include/asm/ptrace.h	/^# define user_mode(/;"	d
user_mode	arch/blackfin/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/microblaze/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/mips/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/openrisc/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/powerpc/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/sh/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/x86/include/asm/ptrace.h	/^#define user_mode(/;"	d
user_mode	arch/xtensa/include/asm/ptrace.h	/^# define user_mode(/;"	d
user_out	board/intercontrol/digsy_mtc/cmd_mtc.c	/^static uchar user_out;$/;"	v	typeref:typename:uchar	file:
user_out	board/intercontrol/digsy_mtc/cmd_mtc.h	/^	u8 user_out;$/;"	m	struct:__anonde02bb4d0108	typeref:typename:u8
user_pb_pio_4in	arch/nios2/dts/3c120_devboard.dts	/^			user_pb_pio_4in: gpio@0x4d00 {$/;"	l	label:pb_cpu_to_io
user_regs_struct	arch/openrisc/include/asm/ptrace.h	/^struct user_regs_struct {$/;"	s
user_stack_pointer	arch/blackfin/include/asm/ptrace.h	/^#define user_stack_pointer(/;"	d
user_stack_pointer	arch/mips/include/asm/ptrace.h	/^static inline unsigned long user_stack_pointer(struct pt_regs *regs)$/;"	f	typeref:typename:unsigned long
user_stack_pointer	arch/openrisc/include/asm/ptrace.h	/^#define user_stack_pointer(/;"	d
user_stack_pointer_set	arch/mips/include/asm/ptrace.h	/^static inline void user_stack_pointer_set(struct pt_regs *regs,$/;"	f	typeref:typename:void
useraccess0	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 useraccess0;$/;"	m	struct:mdio_regs	typeref:typename:u32
useraccess1	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 useraccess1;$/;"	m	struct:mdio_regs	typeref:typename:u32
usercompr	include/jffs2/jffs2.h	/^	__u8 usercompr;	  \/* Compression algorithm requested by the user *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u8
userdata	drivers/video/stb_truetype.h	/^   void           * userdata;$/;"	m	struct:stbtt_fontinfo	typeref:typename:void *
userdef	include/ambapp.h	/^	unsigned int userdef[3];$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned int[3]
userhook	fs/zfs/zfs.c	/^	int (*userhook)(const char *, const struct zfs_dirhook_info *);$/;"	m	struct:zfs_data	typeref:typename:int (*)(const char *,const struct zfs_dirhook_info *)	file:
userintmaskclear	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 userintmaskclear;$/;"	m	struct:mdio_regs	typeref:typename:u32
userintmaskclr	drivers/net/cpsw.c	/^	u32	userintmaskclr;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
userintmasked	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 userintmasked;$/;"	m	struct:mdio_regs	typeref:typename:u32
userintmasked	drivers/net/cpsw.c	/^	u32	userintmasked;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
userintmaskset	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 userintmaskset;$/;"	m	struct:mdio_regs	typeref:typename:u32
userintmaskset	drivers/net/cpsw.c	/^	u32	userintmaskset;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
userintraw	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 userintraw;$/;"	m	struct:mdio_regs	typeref:typename:u32
userintraw	drivers/net/cpsw.c	/^	u32	userintraw;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
userphysel0	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 userphysel0;$/;"	m	struct:mdio_regs	typeref:typename:u32
userphysel1	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 userphysel1;$/;"	m	struct:mdio_regs	typeref:typename:u32
users	drivers/mtd/ubi/ubi.h	/^	int users;$/;"	m	struct:ubi_ltree_entry	typeref:typename:int
usf	arch/arm/mach-at91/include/mach/at91_emac.h	/^	u32	 usf;$/;"	m	struct:at91_emac	typeref:typename:u32
usfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 usfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
usfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 usfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
usfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 usfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
ush	lib/zlib/zutil.h	/^typedef unsigned short ush;$/;"	t	typeref:typename:unsigned short
ushf	lib/zlib/zutil.h	/^typedef ush FAR ushf;$/;"	t	typeref:typename:ush FAR
ushort	include/linux/types.h	/^typedef unsigned short		ushort;$/;"	t	typeref:typename:unsigned short
usi_auto_conf	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_auto_conf;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_clk_ctl	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_clk_ctl;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_clk_slot	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_clk_slot;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_conf	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_conf;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_ctl	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_ctl;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_error_stat	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_error_stat;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_fifo_ctl	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_fifo_ctl;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_fifo_stat	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_fifo_stat;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_freq	arch/arm/include/asm/arch-stv0991/stv0991_cgu.h	/^	u32 usi_freq;		\/* offset 0x3c *\/$/;"	m	struct:stv0991_cgu_regs	typeref:typename:u32
usi_int_en	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_int_en;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_int_stat	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_int_stat;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_manual_cmd	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_manual_cmd;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_modem_stat	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_modem_stat;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_rxdata	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_rxdata;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timeout	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timeout;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_fs1	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_fs1;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_fs2	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_fs2;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_fs3	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_fs3;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_hs1	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_hs1;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_hs2	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_hs2;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_hs3	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_hs3;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_timing_sla	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_timing_sla;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_trailing_ctl	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_trailing_ctl;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_trans_status	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_trans_status;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usi_txdata	drivers/i2c/s3c24x0_i2c.h	/^	u32	usi_txdata;$/;"	m	struct:exynos5_hsi2c	typeref:typename:u32
usid	drivers/power/pmic/pm8916.c	/^	uint32_t usid; \/* Slave ID on SPMI bus *\/$/;"	m	struct:pm8916_priv	typeref:typename:uint32_t	file:
usingExtDict	lib/lz4.c	/^typedef enum { noDict = 0, withPrefix64k, usingExtDict } dict_directive;$/;"	e	enum:__anoneaf05ef60103	file:
using_dma	drivers/usb/gadget/atmel_usba_udc.h	/^	unsigned int				using_dma:1;$/;"	m	struct:usba_request	typeref:typename:unsigned int:1
usir0	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	usir0; \/* 0x058 *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
usir1	arch/arm/include/asm/arch-pxa/regs-usb.h	/^	uint32_t	usir1; \/* 0x05c *\/$/;"	m	struct:pxa25x_udc_regs	typeref:typename:uint32_t
usmblks	include/malloc.h	/^  int usmblks;  \/* unused -- always zero *\/$/;"	m	struct:mallinfo	typeref:typename:int
usmod	include/usb/mpc8xx_udc.h	/^	char usmod;	\/* Mode Register *\/$/;"	m	struct:mpc8xx_usb	typeref:typename:char
usmod	post/cpu/mpc8xx/usb.c	/^	uchar usmod;$/;"	m	struct:usb	typeref:typename:uchar	file:
usp	arch/blackfin/include/asm/ptrace.h	/^	long usp;$/;"	m	struct:pt_regs	typeref:typename:long
usr	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 usr;$/;"	m	struct:fuse_bank0_regs	typeref:typename:u32
usr	arch/arm/include/asm/arch-mx35/imx-regs.h	/^	u32 usr;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
usr	arch/arm/include/asm/arch-rockchip/uart.h	/^	unsigned int usr;$/;"	m	struct:rk_uart	typeref:typename:unsigned int
usr	arch/m68k/include/asm/uart.h	/^		u8 usr;		\/* 0x04 Status Register *\/$/;"	m	union:uart::__anona45981bc010a	typeref:typename:u8
usr5	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 usr5;$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32
usr6	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 usr6[2];$/;"	m	struct:fuse_bank1_regs	typeref:typename:u32[2]
usr_data	include/mtd/mtd-abi.h	/^	__u64 usr_data;$/;"	m	struct:mtd_write_req	typeref:typename:__u64
usr_oob	include/mtd/mtd-abi.h	/^	__u64 usr_oob;$/;"	m	struct:mtd_write_req	typeref:typename:__u64
usr_ptr	include/mtd/mtd-abi.h	/^	__u64 usr_ptr;$/;"	m	struct:mtd_oob_buf64	typeref:typename:__u64
usrptr	scripts/kconfig/nconf.c	/^	void *usrptr;$/;"	m	struct:mitem	typeref:typename:void *	file:
ustat	include/linux/types.h	/^struct ustat {$/;"	s
ustrtoul	lib/strto.c	/^unsigned long ustrtoul(const char *cp, char **endp, unsigned int base)$/;"	f	typeref:typename:unsigned long
ustrtoull	lib/strto.c	/^unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base)$/;"	f	typeref:typename:unsigned long long
uswap_16	include/compiler.h	/^#define uswap_16(/;"	d
uswap_32	include/compiler.h	/^#define uswap_32(/;"	d
uswap_64	include/compiler.h	/^# define uswap_64(/;"	d
ut_assert	include/test/ut.h	/^#define ut_assert(/;"	d
ut_asserteq	include/test/ut.h	/^#define ut_asserteq(/;"	d
ut_asserteq_ptr	include/test/ut.h	/^#define ut_asserteq_ptr(/;"	d
ut_asserteq_str	include/test/ut.h	/^#define ut_asserteq_str(/;"	d
ut_assertf	include/test/ut.h	/^#define ut_assertf(/;"	d
ut_assertnonnull	include/test/ut.h	/^#define ut_assertnonnull(/;"	d
ut_assertok	include/test/ut.h	/^#define ut_assertok(/;"	d
ut_assertok_ptr	include/test/ut.h	/^#define ut_assertok_ptr(/;"	d
ut_fail	test/ut.c	/^void ut_fail(struct unit_test_state *uts, const char *fname, int line,$/;"	f	typeref:typename:void
ut_failf	test/ut.c	/^void ut_failf(struct unit_test_state *uts, const char *fname, int line,$/;"	f	typeref:typename:void
ut_help_text	test/cmd_ut.c	/^static char ut_help_text[] =$/;"	v	typeref:typename:char[]	file:
utb	arch/m68k/include/asm/uart.h	/^		u8 utb;		\/* 0x0c Transmit Buffer *\/$/;"	m	union:uart::__anona45981bc020a	typeref:typename:u8
utbipar	include/linux/immap_qe.h	/^	u32 utbipar;		\/* UCC tbi address reg                 *\/$/;"	m	struct:ucc_ethernet	typeref:typename:u32
utcfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 utcfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
utcfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 utcfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
utcfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 utcfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
utf8_to_utf16le	drivers/usb/gadget/usbstring.c	/^static int utf8_to_utf16le(const char *s, __le16 *cp, unsigned len)$/;"	f	typeref:typename:int	file:
utfb	include/linux/immap_qe.h	/^	u32 utfb;		\/* UCC transmit FIFO base *\/$/;"	m	struct:ucc_fast	typeref:typename:u32
utfet	include/linux/immap_qe.h	/^	u16 utfet;		\/* UCC transmit FIFO emergency threshold *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
utfs	include/linux/immap_qe.h	/^	u16 utfs;		\/* UCC transmit FIFO size *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
utftt	include/linux/immap_qe.h	/^	u16 utftt;		\/* UCC transmit FIFO transmit threshold *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
util	test/py/tests/test_vboot.py	/^import u_boot_utils as util$/;"	I	nameref:module:u_boot_utils
util_getopt_long	tools/fdtgrep.c	/^#define util_getopt_long(/;"	d	file:
util_is_printable_string	tools/fdtgrep.c	/^static bool util_is_printable_string(const void *data, int len)$/;"	f	typeref:typename:bool	file:
util_usage	tools/fdtgrep.c	/^void util_usage(const char *errmsg, const char *synopsis,$/;"	f	typeref:typename:void
util_version	tools/fdtgrep.c	/^void util_version(void)$/;"	f	typeref:typename:void
utilfdt_print_data	tools/fdtgrep.c	/^static void utilfdt_print_data(const char *data, int len)$/;"	f	typeref:typename:void	file:
utilfdt_read	tools/fdtgrep.c	/^char *utilfdt_read(const char *filename)$/;"	f	typeref:typename:char *
utilfdt_read_err	tools/fdtgrep.c	/^int utilfdt_read_err(const char *filename, char **buffp)$/;"	f	typeref:typename:int
utilfdt_read_err_len	tools/fdtgrep.c	/^int utilfdt_read_err_len(const char *filename, char **buffp, off_t *len)$/;"	f	typeref:typename:int
utilfdt_read_len	tools/fdtgrep.c	/^char *utilfdt_read_len(const char *filename, off_t *len)$/;"	f	typeref:typename:char *
utime	include/ext_common.h	/^	__le32 utime;$/;"	m	struct:ext2_sblock	typeref:typename:__le32
utm_16	include/linux/usb/musb.h	/^	unsigned	utm_16:1 __deprecated; \/* utm data witdh is 16 bits *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned
utmi	arch/arm/dts/at91sam9g45.dtsi	/^				utmi: utmick {$/;"	l	label:pmc
utmi	arch/arm/dts/sama5d2.dtsi	/^				utmi: utmick {$/;"	l	label:pmc
utmi	arch/powerpc/include/asm/immap_512x.h	/^	utmi512x_t		utmi;		\/* USB UTMI *\/$/;"	m	struct:immap	typeref:typename:utmi512x_t
utmi	drivers/usb/host/ehci-tegra.c	/^	unsigned utmi:1;	\/* 1 if port has external tranceiver, else 0 *\/$/;"	m	struct:fdt_usb	typeref:typename:unsigned:1	file:
utmi0	arch/arm/dts/armada-cp110-master.dtsi	/^			utmi0: utmi@580000 {$/;"	l
utmi1	arch/arm/dts/armada-cp110-master.dtsi	/^			utmi1: utmi@581000 {$/;"	l
utmi512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct utmi512x {$/;"	s
utmi512x_t	arch/powerpc/include/asm/immap_512x.h	/^} utmi512x_t;$/;"	t	typeref:struct:utmi512x
utmi_base_addr	drivers/phy/marvell/comphy_cp110.c	/^	void __iomem *utmi_base_addr;$/;"	m	struct:utmi_phy_data	typeref:typename:void __iomem *	file:
utmi_cfg_addr	drivers/phy/marvell/comphy_cp110.c	/^	void __iomem *utmi_cfg_addr;$/;"	m	struct:utmi_phy_data	typeref:typename:void __iomem *	file:
utmi_clk_enable	drivers/clk/at91/clk-utmi.c	/^static int utmi_clk_enable(struct clk *clk)$/;"	f	typeref:typename:int	file:
utmi_clk_get_rate	drivers/clk/at91/clk-utmi.c	/^static ulong utmi_clk_get_rate(struct clk *clk)$/;"	f	typeref:typename:ulong	file:
utmi_clk_match	drivers/clk/at91/clk-utmi.c	/^static const struct udevice_id utmi_clk_match[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
utmi_clk_ops	drivers/clk/at91/clk-utmi.c	/^static struct clk_ops utmi_clk_ops = {$/;"	v	typeref:struct:clk_ops	file:
utmi_clk_probe	drivers/clk/at91/clk-utmi.c	/^static int utmi_clk_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
utmi_ctrl	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_ctrl;	\/* USB PHY Control register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_dbg_ctl	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_dbg_ctl;	\/* Debug control register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_init	drivers/usb/host/utmi-armada100.c	/^int utmi_init(void)$/;"	f	typeref:typename:int
utmi_ivref	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_ivref;	\/* IVREF register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_mode	include/dwc3-omap-uboot.h	/^	enum dwc3_omap_utmi_mode utmi_mode;$/;"	m	struct:dwc3_omap_device	typeref:enum:dwc3_omap_utmi_mode
utmi_otg_addon	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_otg_addon;	\/* OTG addon register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_otg_ctrl	include/linux/usb/xhci-omap.h	/^	u32 utmi_otg_ctrl; \/* offset of 0x80 *\/$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
utmi_otg_offset	drivers/usb/dwc3/dwc3-omap.c	/^	u32			utmi_otg_offset;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
utmi_otg_status	drivers/usb/dwc3/dwc3-omap.c	/^	u32			utmi_otg_status;$/;"	m	struct:dwc3_omap	typeref:typename:u32	file:
utmi_otg_status	include/linux/usb/xhci-omap.h	/^	u32 utmi_otg_status;$/;"	m	struct:omap_dwc_wrapper	typeref:typename:u32
utmi_phy_data	drivers/phy/marvell/comphy_cp110.c	/^struct utmi_phy_data {$/;"	s	file:
utmi_phy_init	drivers/usb/host/utmi-armada100.c	/^static int utmi_phy_init(void)$/;"	f	typeref:typename:int	file:
utmi_phy_port	drivers/phy/marvell/comphy_cp110.c	/^	u32 utmi_phy_port;$/;"	m	struct:utmi_phy_data	typeref:typename:u32	file:
utmi_pll	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_pll;	\/* PLL register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_reserve	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_reserve;	\/* Reserve Register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_rev	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_rev;	\/* USB PHY Revision *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_rx	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_rx;	\/* Rx register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tst_g0	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tst_g0;	\/* Test group 0 register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tst_g1	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tst_g1;	\/* Test group 1 register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tst_g2	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tst_g2;	\/* Test group 2 register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tst_g3	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tst_g3;	\/* Test group 3 register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tst_g4	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tst_g4;	\/* Test group 4 register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tst_g5	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tst_g5;	\/* Test group 5 register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_tx	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_tx;	\/* Tx register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmi_usb_int	arch/arm/include/asm/arch-armada100/utmi-armada100.h	/^	u32 utmi_usb_int;	\/* USB interuppt register *\/$/;"	m	struct:armd1usb_phy_reg	typeref:typename:u32
utmip_bat_chrg_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_bat_chrg_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_bias_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_bias_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_bias_cfg1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_bias_cfg1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_debounce_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_debounce_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_elastic_limit	drivers/usb/host/ehci-tegra.c	/^static const u8 utmip_elastic_limit = 16;$/;"	v	typeref:typename:const u8	file:
utmip_fslsrx_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_fslsrx_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_fslsrx_cfg1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_fslsrx_cfg1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_hs_sync_start_delay	drivers/usb/host/ehci-tegra.c	/^static const u8 utmip_hs_sync_start_delay = 9;$/;"	v	typeref:typename:const u8	file:
utmip_hsrx_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_hsrx_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_hsrx_cfg1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_hsrx_cfg1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_idle_wait_delay	drivers/usb/host/ehci-tegra.c	/^static const u8 utmip_idle_wait_delay = 17;$/;"	v	typeref:typename:const u8	file:
utmip_misc_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_misc_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_misc_cfg1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_misc_cfg1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_pll_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_pll_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_pll_cfg1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_pll_cfg1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_spare_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_spare_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_tx_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_tx_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_xcvr_cfg0	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_xcvr_cfg0;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmip_xcvr_cfg1	arch/arm/include/asm/arch-tegra/usb.h	/^	uint utmip_xcvr_cfg1;$/;"	m	struct:usb_ctlr	typeref:typename:uint
utmode	arch/powerpc/include/asm/8xx_immap.h	/^	uint	utmode;$/;"	m	struct:io_port	typeref:typename:uint
utodr	include/linux/immap_qe.h	/^	u16 utodr;		\/* UCCx transmit on demand register  *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
utodr	include/linux/immap_qe.h	/^	u16 utodr;		\/* UCCx transmit on demand register *\/$/;"	m	struct:ucc_slow	typeref:typename:u16
utpt	include/linux/immap_qe.h	/^	u16 utpt;		\/* UCC transmit polling timer *\/$/;"	m	struct:ucc_fast	typeref:typename:u16
utpt	include/linux/immap_qe.h	/^	u16 utpt;$/;"	m	struct:ucc_slow	typeref:typename:u16
utrstat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	utrstat;$/;"	m	struct:s3c24x0_uart	typeref:typename:u32
utrstat	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned int	utrstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
utrstat	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned int	utrstat;$/;"	m	struct:s5p_uart	typeref:typename:unsigned int
uts	test/dm/test-driver.c	/^static struct unit_test_state *uts = &global_dm_test_state;$/;"	v	typeref:struct:unit_test_state *	file:
uts	test/dm/test-uclass.c	/^static struct unit_test_state *uts = &global_dm_test_state;$/;"	v	typeref:struct:unit_test_state *	file:
utwfifo	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u8 utwfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
utwfifo	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u8 utwfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
utwfifo	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u8 utwfifo;$/;"	m	struct:lpuart_fsl	typeref:typename:u8
utxd_wom	arch/m68k/include/asm/immap_5441x.h	/^	u16 utxd_wom;		\/* 0x78 *\/$/;"	m	struct:gpio	typeref:typename:u16
utxh	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u8	utxh;$/;"	m	struct:s3c24x0_uart	typeref:typename:u8
utxh	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned char	utxh;$/;"	m	struct:s5p_uart	typeref:typename:unsigned char
utxh	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned char	utxh;$/;"	m	struct:s5p_uart	typeref:typename:unsigned char
uuid	fs/fs.c	/^	int (*uuid)(char *uuid_str);$/;"	m	struct:fstype_info	typeref:typename:int (*)(char * uuid_str)	file:
uuid	fs/ubifs/ubifs-media.h	/^	__u8 uuid[16];$/;"	m	struct:ubifs_sb_node	typeref:typename:__u8[16]
uuid	fs/ubifs/ubifs.h	/^	unsigned char uuid[16];$/;"	m	struct:ubifs_info	typeref:typename:unsigned char[16]
uuid	include/part.h	/^	char	uuid[37];	\/* filesystem UUID as string, if exists	*\/$/;"	m	struct:disk_partition	typeref:typename:char[37]
uuid	include/smbios.h	/^	u8 uuid[16];$/;"	m	struct:smbios_type1	typeref:typename:u8[16]
uuid	include/uuid.h	/^struct uuid {$/;"	s
uuid_bin_to_str	lib/uuid.c	/^void uuid_bin_to_str(unsigned char *uuid_bin, char *uuid_str, int str_format)$/;"	f	typeref:typename:void
uuid_guid_get_bin	lib/uuid.c	/^int uuid_guid_get_bin(const char *guid_str, unsigned char *guid_bin)$/;"	f	typeref:typename:int
uuid_guid_get_str	lib/uuid.c	/^int uuid_guid_get_str(unsigned char *guid_bin, char *guid_str)$/;"	f	typeref:typename:int
uuid_str_to_bin	lib/uuid.c	/^int uuid_str_to_bin(char *uuid_str, unsigned char *uuid_bin, int str_format)$/;"	f	typeref:typename:int
uuid_str_valid	lib/uuid.c	/^int uuid_str_valid(const char *uuid)$/;"	f	typeref:typename:int
uv_buf_stride	arch/arm/include/asm/arch-tegra/dc.h	/^	uint uv_buf_stride;		\/* _WIN_UV_BUF_STRIDE_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
uvscc	drivers/spi/ich.h	/^	uint32_t uvscc;$/;"	m	struct:ich9_spi_regs	typeref:typename:uint32_t
uwDataWidth	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t uwDataWidth;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t
uwDstModifyMult	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t uwDstModifyMult;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t
uwHwait	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t uwHwait;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t
uwPllCtl	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	uint16_t uwPllCtl;$/;"	m	struct:ADI_SYSCTRL_VALUES	typeref:typename:uint16_t
uwPllDiv	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	uint16_t uwPllDiv;$/;"	m	struct:ADI_SYSCTRL_VALUES	typeref:typename:uint16_t
uwPllLockCnt	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	uint16_t uwPllLockCnt;$/;"	m	struct:ADI_SYSCTRL_VALUES	typeref:typename:uint16_t
uwPllStat	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	uint16_t uwPllStat;$/;"	m	struct:ADI_SYSCTRL_VALUES	typeref:typename:uint16_t
uwSrcModifyMult	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t uwSrcModifyMult;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t
uwSsel	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t uwSsel;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t
uwUserShort	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	int16_t uwUserShort;$/;"	m	struct:ADI_BOOT_DATA	typeref:typename:int16_t
uwVrCtl	arch/blackfin/include/asm/mach-common/bits/bootrom.h	/^	uint16_t uwVrCtl;$/;"	m	struct:ADI_SYSCTRL_VALUES	typeref:typename:uint16_t
v	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 v;$/;"	m	struct:mx3_cpu_type	typeref:typename:u32
v	arch/powerpc/include/asm/mmu.h	/^	unsigned long v:1;	\/* Valid bit *\/$/;"	m	struct:_P601_BATL	typeref:typename:unsigned long:1
v	arch/powerpc/include/asm/mmu.h	/^	unsigned long v:1;$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
v0	arch/mips/include/asm/regdef.h	/^#define v0	/;"	d
v0_available	arch/sparc/include/asm/prom.h	/^	struct linux_mlist_v0 **v0_available;	\/* What we can use *\/$/;"	m	struct:linux_mem_v0	typeref:struct:linux_mlist_v0 **
v0_devclose	arch/sparc/include/asm/prom.h	/^	int (*v0_devclose) (int dev_desc);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc)
v0_devopen	arch/sparc/include/asm/prom.h	/^	int (*v0_devopen) (char *device_str);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(char * device_str)
v0_eval	arch/sparc/include/asm/prom.h	/^		void (*v0_eval) (int len, char *str);$/;"	m	union:linux_romvec::__anon85ee8511010a	typeref:typename:void (*)(int len,char * str)
v0_prommap	arch/sparc/include/asm/prom.h	/^	struct linux_mlist_v0 **v0_prommap;$/;"	m	struct:linux_mem_v0	typeref:struct:linux_mlist_v0 **
v0_rdblkdev	arch/sparc/include/asm/prom.h	/^	int (*v0_rdblkdev) (int dev_desc, int num_blks, int blk_st, char *buf);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,int num_blks,int blk_st,char * buf)
v0_rdchardev	arch/sparc/include/asm/prom.h	/^	int (*v0_rdchardev) (int dev_desc, int num_bytes, int dummy, char *buf);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,int num_bytes,int dummy,char * buf)
v0_rdnetdev	arch/sparc/include/asm/prom.h	/^	int (*v0_rdnetdev) (int dev_desc, int num_bytes, char *buf);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,int num_bytes,char * buf)
v0_seekdev	arch/sparc/include/asm/prom.h	/^	int (*v0_seekdev) (int dev_desc, long logical_offst, int from);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,long logical_offst,int from)
v0_totphys	arch/sparc/include/asm/prom.h	/^	struct linux_mlist_v0 **v0_totphys;$/;"	m	struct:linux_mem_v0	typeref:struct:linux_mlist_v0 **
v0_wrblkdev	arch/sparc/include/asm/prom.h	/^	int (*v0_wrblkdev) (int dev_desc, int num_blks, int blk_st, char *buf);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,int num_blks,int blk_st,char * buf)
v0_wrchardev	arch/sparc/include/asm/prom.h	/^	int (*v0_wrchardev) (int dev_desc, int num_bytes, int dummy, char *buf);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,int num_bytes,int dummy,char * buf)
v0_wrnetdev	arch/sparc/include/asm/prom.h	/^	int (*v0_wrnetdev) (int dev_desc, int num_bytes, char *buf);$/;"	m	struct:linux_dev_v0_funcs	typeref:typename:int (*)(int dev_desc,int num_bytes,char * buf)
v1	arch/mips/include/asm/regdef.h	/^#define v1	/;"	d
v1	fs/reiserfs/reiserfs_private.h	/^    struct offset_v1 v1;$/;"	m	union:key::__anona10af8d2020a	typeref:struct:offset_v1
v1	include/logbuff.h	/^		} v1;$/;"	m	union:__anon50fce6f30108::__anon50fce6f3020a	typeref:struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30408
v1_5d	arch/arm/dts/am437x-idk-evm.dts	/^	v1_5d: fixed-regulator-v1_5d{$/;"	l
v1_5dreg	arch/arm/dts/am437x-idk-evm.dts	/^	v1_5dreg: fixed-regulator-v1_5dreg{$/;"	l
v1_8d	arch/arm/dts/am437x-idk-evm.dts	/^	v1_8d: fixed-regulator-v1_8d{$/;"	l
v1_8dreg	arch/arm/dts/am437x-idk-evm.dts	/^	v1_8dreg: fixed-regulator-v1_8dreg{$/;"	l
v2	fs/reiserfs/reiserfs_private.h	/^    struct offset_v2 v2;$/;"	m	union:key::__anona10af8d2020a	typeref:struct:offset_v2
v2	include/logbuff.h	/^		} v2;$/;"	m	union:__anon50fce6f30108::__anon50fce6f3020a	typeref:struct:__anon50fce6f30108::__anon50fce6f3020a::__anon50fce6f30308
v2	net/nfs.h	/^			uint32_t v2;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780308	typeref:typename:uint32_t
v24_0d	arch/arm/dts/am437x-idk-evm.dts	/^	v24_0d: fixed-regulator-v24_0d {$/;"	l
v2_dev_close	arch/sparc/include/asm/prom.h	/^	void (*v2_dev_close) (int d);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:void (*)(int d)
v2_dev_open	arch/sparc/include/asm/prom.h	/^	int (*v2_dev_open) (char *devpath);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:int (*)(char * devpath)
v2_dev_read	arch/sparc/include/asm/prom.h	/^	int (*v2_dev_read) (int d, char *buf, int nbytes);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:int (*)(int d,char * buf,int nbytes)
v2_dev_seek	arch/sparc/include/asm/prom.h	/^	int (*v2_dev_seek) (int d, int hi, int lo);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:int (*)(int d,int hi,int lo)
v2_dev_write	arch/sparc/include/asm/prom.h	/^	int (*v2_dev_write) (int d, char *buf, int nbytes);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:int (*)(int d,char * buf,int nbytes)
v2_dumb_mem_alloc	arch/sparc/include/asm/prom.h	/^	char *(*v2_dumb_mem_alloc) (char *va, unsigned sz);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:char * (*)(char * va,unsigned sz)
v2_dumb_mem_free	arch/sparc/include/asm/prom.h	/^	void (*v2_dumb_mem_free) (char *va, unsigned sz);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:void (*)(char * va,unsigned sz)
v2_dumb_mmap	arch/sparc/include/asm/prom.h	/^	char *(*v2_dumb_mmap) (char *virta, int which_io, unsigned paddr,$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:char * (*)(char * virta,int which_io,unsigned paddr,unsigned sz)
v2_dumb_munmap	arch/sparc/include/asm/prom.h	/^	void (*v2_dumb_munmap) (char *virta, unsigned size);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:void (*)(char * virta,unsigned size)
v2_eval	arch/sparc/include/asm/prom.h	/^		void (*v2_eval) (char *str);$/;"	m	union:linux_romvec::__anon85ee8511010a	typeref:typename:void (*)(char * str)
v2_inst2pkg	arch/sparc/include/asm/prom.h	/^	int (*v2_inst2pkg) (int d);	\/* Convert ihandle to phandle *\/$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:int (*)(int d)
v2_wheee2	arch/sparc/include/asm/prom.h	/^	void (*v2_wheee2) (void);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:void (*)(void)
v2_wheee3	arch/sparc/include/asm/prom.h	/^	void (*v2_wheee3) (void);$/;"	m	struct:linux_dev_v2_funcs	typeref:typename:void (*)(void)
v2m_cfg_write	board/armltd/vexpress/vexpress_common.c	/^int v2m_cfg_write(u32 devfn, u32 data)$/;"	f	typeref:typename:int
v3_3d	arch/arm/dts/am437x-idk-evm.dts	/^	v3_3d: fixed-regulator-v3_3d {$/;"	l
v3_3d	arch/arm/dts/am57xx-idk-common.dtsi	/^	v3_3d: fixedregulator-v3_3d {$/;"	l
v3_addr_to_lb_base	board/armltd/integrator/pci_v3.h	/^#define v3_addr_to_lb_base(/;"	d
v3_addr_to_lb_base2	board/armltd/integrator/pci_v3.h	/^#define v3_addr_to_lb_base2(/;"	d
v3_addr_to_lb_map	board/armltd/integrator/pci_v3.h	/^#define v3_addr_to_lb_map(/;"	d
v3_addr_to_lb_map2	board/armltd/integrator/pci_v3.h	/^#define v3_addr_to_lb_map2(/;"	d
v3_close_config_window	board/armltd/integrator/pci.c	/^static void v3_close_config_window(void)$/;"	f	typeref:typename:void	file:
v3_cpuidle	arch/sparc/include/asm/prom.h	/^	int (*v3_cpuidle) (unsigned int whichcpu);$/;"	m	struct:linux_romvec	typeref:typename:int (*)(unsigned int whichcpu)
v3_cpuresume	arch/sparc/include/asm/prom.h	/^	int (*v3_cpuresume) (unsigned int whichcpu);$/;"	m	struct:linux_romvec	typeref:typename:int (*)(unsigned int whichcpu)
v3_cpustart	arch/sparc/include/asm/prom.h	/^	int (*v3_cpustart) (unsigned int whichcpu, int ctxtbl_ptr,$/;"	m	struct:linux_romvec	typeref:typename:int (*)(unsigned int whichcpu,int ctxtbl_ptr,int thiscontext,char * prog_counter)
v3_cpustop	arch/sparc/include/asm/prom.h	/^	int (*v3_cpustop) (unsigned int whichcpu);$/;"	m	struct:linux_romvec	typeref:typename:int (*)(unsigned int whichcpu)
v3_open_config_window	board/armltd/integrator/pci.c	/^static unsigned long v3_open_config_window(pci_dev_t bdf, int offset)$/;"	f	typeref:typename:unsigned long	file:
v3_readb	board/armltd/integrator/pci.c	/^#define v3_readb(/;"	d	file:
v3_readl	board/armltd/integrator/pci.c	/^#define v3_readl(/;"	d	file:
v3_readw	board/armltd/integrator/pci.c	/^#define v3_readw(/;"	d	file:
v3_writeb	board/armltd/integrator/pci.c	/^#define v3_writeb(/;"	d	file:
v3_writel	board/armltd/integrator/pci.c	/^#define v3_writel(/;"	d	file:
v3_writew	board/armltd/integrator/pci.c	/^#define v3_writew(/;"	d	file:
v7_arch_cp15_set_acr	arch/arm/cpu/armv7/cp15.c	/^void __weak v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,$/;"	f	typeref:typename:void __weak
v7_arch_cp15_set_acr	arch/arm/cpu/armv7/omap3/board.c	/^void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,$/;"	f	typeref:typename:void
v7_arch_cp15_set_acr	arch/arm/cpu/armv7/omap5/hwinit.c	/^void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,$/;"	f	typeref:typename:void
v7_arch_cp15_set_l2aux_ctrl	arch/arm/cpu/armv7/cp15.c	/^void __weak v7_arch_cp15_set_l2aux_ctrl(u32 l2actlr, u32 cpu_midr,$/;"	f	typeref:typename:void __weak
v7_arch_cp15_set_l2aux_ctrl	arch/arm/cpu/armv7/omap5/hwinit.c	/^void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,$/;"	f	typeref:typename:void
v7_dcache_clean_inval_range	arch/arm/cpu/armv7/cache_v7.c	/^static void v7_dcache_clean_inval_range(u32 start, u32 stop, u32 line_len)$/;"	f	typeref:typename:void	file:
v7_dcache_inval_range	arch/arm/cpu/armv7/cache_v7.c	/^static void v7_dcache_inval_range(u32 start, u32 stop, u32 line_len)$/;"	f	typeref:typename:void	file:
v7_dcache_maint_range	arch/arm/cpu/armv7/cache_v7.c	/^static void v7_dcache_maint_range(u32 start, u32 stop, u32 range_op)$/;"	f	typeref:typename:void	file:
v7_enable_l2_hazard_detect	arch/arm/include/asm/armv7.h	/^static inline void v7_enable_l2_hazard_detect(void)$/;"	f	typeref:typename:void
v7_enable_smp	arch/arm/include/asm/armv7.h	/^static inline void v7_enable_smp(uint32_t address)$/;"	f	typeref:typename:void
v7_inval_tlb	arch/arm/cpu/armv7/cache_v7.c	/^static void v7_inval_tlb(void)$/;"	f	typeref:typename:void	file:
v7_outer_cache_disable	arch/arm/cpu/armv7/cache_v7.c	/^__weak void v7_outer_cache_disable(void) {}$/;"	f	typeref:typename:__weak void
v7_outer_cache_disable	arch/arm/cpu/armv7/omap4/hwinit.c	/^void v7_outer_cache_disable(void)$/;"	f	typeref:typename:void
v7_outer_cache_disable	arch/arm/imx-common/cache.c	/^void v7_outer_cache_disable(void)$/;"	f	typeref:typename:void
v7_outer_cache_disable	arch/arm/mach-mvebu/cpu.c	/^void v7_outer_cache_disable(void)$/;"	f	typeref:typename:void
v7_outer_cache_disable	arch/arm/mach-s5pc1xx/cache.c	/^void v7_outer_cache_disable(void)$/;"	f	typeref:typename:void
v7_outer_cache_disable	arch/arm/mach-socfpga/misc.c	/^void v7_outer_cache_disable(void)$/;"	f	typeref:typename:void
v7_outer_cache_disable	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void v7_outer_cache_disable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/cpu/armv7/cache_v7.c	/^__weak void v7_outer_cache_enable(void) {}$/;"	f	typeref:typename:__weak void
v7_outer_cache_enable	arch/arm/cpu/armv7/omap3/board.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/cpu/armv7/omap4/hwinit.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/imx-common/cache.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/mach-mvebu/cpu.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/mach-s5pc1xx/cache.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/mach-socfpga/misc.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_enable	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void v7_outer_cache_enable(void)$/;"	f	typeref:typename:void
v7_outer_cache_flush_all	arch/arm/cpu/armv7/cache_v7.c	/^__weak void v7_outer_cache_flush_all(void) {}$/;"	f	typeref:typename:__weak void
v7_outer_cache_flush_all	arch/arm/lib/cache-pl310.c	/^void v7_outer_cache_flush_all(void)$/;"	f	typeref:typename:void
v7_outer_cache_flush_all	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void v7_outer_cache_flush_all(void)$/;"	f	typeref:typename:void
v7_outer_cache_flush_range	arch/arm/cpu/armv7/cache_v7.c	/^__weak void v7_outer_cache_flush_range(u32 start, u32 end) {}$/;"	f	typeref:typename:__weak void
v7_outer_cache_flush_range	arch/arm/lib/cache-pl310.c	/^void v7_outer_cache_flush_range(u32 start, u32 stop)$/;"	f	typeref:typename:void
v7_outer_cache_flush_range	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void v7_outer_cache_flush_range(u32 start, u32 end)$/;"	f	typeref:typename:void
v7_outer_cache_inval_all	arch/arm/cpu/armv7/cache_v7.c	/^__weak void v7_outer_cache_inval_all(void) {}$/;"	f	typeref:typename:__weak void
v7_outer_cache_inval_all	arch/arm/lib/cache-pl310.c	/^void v7_outer_cache_inval_all(void)$/;"	f	typeref:typename:void
v7_outer_cache_inval_all	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void v7_outer_cache_inval_all(void)$/;"	f	typeref:typename:void
v7_outer_cache_inval_range	arch/arm/cpu/armv7/cache_v7.c	/^__weak void v7_outer_cache_inval_range(u32 start, u32 end) {}$/;"	f	typeref:typename:__weak void
v7_outer_cache_inval_range	arch/arm/lib/cache-pl310.c	/^void v7_outer_cache_inval_range(u32 start, u32 stop)$/;"	f	typeref:typename:void
v7_outer_cache_inval_range	arch/arm/mach-uniphier/arm32/cache-uniphier.c	/^void v7_outer_cache_inval_range(u32 start, u32 end)$/;"	f	typeref:typename:void
v7m_mpu	arch/arm/include/asm/armv7m.h	/^struct v7m_mpu {$/;"	s
v7m_scb	arch/arm/include/asm/armv7m.h	/^struct v7m_scb {$/;"	s
vALLOc	common/dlmalloc.c	/^Void_t* vALLOc(size_t bytes)$/;"	f	typeref:typename:Void_t *
vALLOc	include/malloc.h	/^# define vALLOc	/;"	d
vALLOc	include/malloc.h	/^#define vALLOc	/;"	d
v_amerr	include/universe.h	/^	unsigned int v_amerr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
v_b_porch	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	v_b_porch;$/;"	m	struct:rk3288_edp	typeref:typename:u32
v_b_porch_sta	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	v_b_porch_sta;$/;"	m	struct:rk3288_edp	typeref:typename:u32
v_back_porch	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_back_porch;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
v_f_porch	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	v_f_porch;$/;"	m	struct:rk3288_edp	typeref:typename:u32
v_f_porch_sta	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	v_f_porch_sta;$/;"	m	struct:rk3288_edp	typeref:typename:u32
v_filter_p	arch/arm/include/asm/arch-tegra/dc.h	/^	uint v_filter_p[WINC_FILTER_COUNT];$/;"	m	struct:dc_winc_reg	typeref:typename:uint[]
v_front_porch	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_front_porch;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
v_id	include/faraday/ftpci100.h	/^	unsigned short v_id;				\/* vendor id *\/$/;"	m	struct:pci_config	typeref:typename:unsigned short
v_initial_dda	arch/arm/include/asm/arch-tegra/dc.h	/^	uint v_initial_dda;		\/* _WIN_V_INITIAL_DDA_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
v_oversample	drivers/video/stb_truetype.h	/^   unsigned char h_oversample, v_oversample; \/\/ don't set these, they're used internally$/;"	m	struct:__anonce392f790408	typeref:typename:unsigned char
v_oversample	drivers/video/stb_truetype.h	/^   unsigned int   h_oversample, v_oversample;$/;"	m	struct:stbtt_pack_context	typeref:typename:unsigned int
v_palette_base	drivers/video/da8xx-fb.c	/^	unsigned char *v_palette_base;$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned char *	file:
v_pulse0	arch/arm/include/asm/arch-tegra/dc.h	/^	struct _disp_v_pulse0 v_pulse0;	\/* _DISP_V_PULSE0_ *\/$/;"	m	struct:dc_disp_reg	typeref:struct:_disp_v_pulse0
v_pulse1	arch/arm/include/asm/arch-tegra/dc.h	/^	struct _disp_v_pulse0 v_pulse1;	\/* _DISP_V_PULSE1_ *\/$/;"	m	struct:dc_disp_reg	typeref:struct:_disp_v_pulse0
v_pulse3	arch/arm/include/asm/arch-tegra/dc.h	/^	struct _disp_v_pulse2 v_pulse3;	\/* _DISP_V_PULSE2_ *\/$/;"	m	struct:dc_disp_reg	typeref:struct:_disp_v_pulse2
v_pulse4	arch/arm/include/asm/arch-tegra/dc.h	/^	struct _disp_v_pulse2 v_pulse4;	\/* _DISP_V_PULSE3_ *\/$/;"	m	struct:dc_disp_reg	typeref:struct:_disp_v_pulse2
v_pulse_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint v_pulse_ctrl;$/;"	m	struct:_disp_v_pulse0	typeref:typename:uint
v_pulse_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint v_pulse_ctrl;$/;"	m	struct:_disp_v_pulse2	typeref:typename:uint
v_pulse_pos	arch/arm/include/asm/arch-tegra/dc.h	/^	uint v_pulse_pos[V_PULSE0_POSITION_COUNT];$/;"	m	struct:_disp_v_pulse0	typeref:typename:uint[]
v_pulse_pos_a	arch/arm/include/asm/arch-tegra/dc.h	/^	uint v_pulse_pos_a;$/;"	m	struct:_disp_v_pulse2	typeref:typename:uint
v_res	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_res;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
v_sync_polarity	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_sync_polarity;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
v_sync_rate	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_sync_rate;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
v_sync_width	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_sync_width;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
v_total	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int v_total;$/;"	m	struct:edp_disp_info	typeref:typename:unsigned int
va_cfg0	drivers/pci/pcie_layerscape.c	/^	void __iomem *va_cfg0;$/;"	m	struct:ls_pcie	typeref:typename:void __iomem *	file:
va_cfg1	drivers/pci/pcie_layerscape.c	/^	void __iomem *va_cfg1;$/;"	m	struct:ls_pcie	typeref:typename:void __iomem *	file:
vactive	drivers/video/am335x-fb.h	/^	unsigned int	vactive;	\/* Vertical active area *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
vactive	include/fdtdec.h	/^	struct timing_entry vactive;		\/* ver. active video *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
vaddr	drivers/video/fsl_diu_fb.c	/^	void *vaddr;		\/* Virtual address *\/$/;"	m	struct:diu_addr	typeref:typename:void *	file:
vaddr	lib/addr_map.c	/^	unsigned long vaddr;$/;"	m	struct:__anon51f123940108	typeref:typename:unsigned long	file:
vaerr	include/universe.h	/^	unsigned int vaerr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
val	arch/arm/include/asm/arch-am33xx/mux.h	/^	unsigned int val;$/;"	m	struct:module_pin_mux	typeref:typename:unsigned int
val	arch/arm/include/asm/arch-omap4/mux_omap4.h	/^	u16 val;$/;"	m	struct:pad_conf_entry	typeref:typename:u16
val	arch/arm/include/asm/arch-omap5/sys_proto.h	/^	u32 val;$/;"	m	struct:pad_conf_entry	typeref:typename:u32
val	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 val;$/;"	m	struct:sunxi_timer	typeref:typename:u32
val	arch/arm/include/asm/arch/timer.h	/^	u32 val;$/;"	m	struct:sunxi_timer	typeref:typename:u32
val	arch/arm/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anon8ed61e610108	typeref:typename:int[2]
val	arch/arm/mach-keystone/include/mach/mux-k2g.h	/^	u32	val;$/;"	m	struct:pin_cfg	typeref:typename:u32
val	arch/arm/mach-mvebu/include/mach/cpu.h	/^	u8 val;$/;"	m	struct:sar_freq_modes	typeref:typename:u8
val	arch/arm/mach-orion5x/timer.c	/^	u32 val;	\/* Timer value reg *\/$/;"	m	struct:orion5x_tmr_val	typeref:typename:u32	file:
val	arch/avr32/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anon130f55ef0108	typeref:typename:int[2]
val	arch/blackfin/include/asm/posix_types.h	/^	int val[2];$/;"	m	struct:__anon49ea693b0108	typeref:typename:int[2]
val	arch/m68k/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anonada30f070108	typeref:typename:int[2]
val	arch/microblaze/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anonac1bcaa90108	typeref:typename:int[2]
val	arch/mips/include/asm/posix_types.h	/^	long    val[2];$/;"	m	struct:__anon831b90fa0108	typeref:typename:long[2]
val	arch/nds32/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anon82615ceb0108	typeref:typename:int[2]
val	arch/nios2/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anond0f0514c0108	typeref:typename:int[2]
val	arch/openrisc/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anonc49639a40108	typeref:typename:int[2]
val	arch/powerpc/include/asm/immap_512x.h	/^	u_long val;		\/* value to write or or *\/$/;"	m	struct:iopin_t	typeref:typename:u_long
val	arch/powerpc/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anon9250c7e10108	typeref:typename:int[2]
val	arch/powerpc/include/asm/ppc4xx_config.h	/^	u8 val[CONFIG_4xx_CONFIG_BLOCKSIZE];$/;"	m	struct:ppc4xx_config	typeref:typename:u8[]
val	arch/sh/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anonc27caf5c0108	typeref:typename:int[2]
val	arch/sparc/include/asm/posix_types.h	/^	int val[2];$/;"	m	struct:__anon8604747a0108	typeref:typename:int[2]
val	arch/x86/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anon04fc6c070108	typeref:typename:int[2]
val	arch/xtensa/include/asm/posix_types.h	/^	int	val[2];$/;"	m	struct:__anon332ae2740108	typeref:typename:int[2]
val	board/Marvell/db-88f6820-gp/db-88f6820-gp.c	/^	u8 val;$/;"	m	struct:marvell_io_exp	typeref:typename:u8	file:
val	board/creative/xfi3/xfi3.c	/^	uint16_t	val;$/;"	m	struct:__anond31a65320108	typeref:typename:uint16_t	file:
val	board/esd/common/xilinx_jtag/lenval.h	/^	unsigned char val[MAX_LEN+1];  \/* bytes of data *\/$/;"	m	struct:var_len_byte	typeref:typename:unsigned char[]
val	board/freescale/corenet_ds/eth_hydra.c	/^	u8 val;$/;"	m	struct:__anon5adf8b530108	typeref:typename:u8	file:
val	board/freescale/corenet_ds/eth_hydra.c	/^	u8 val;$/;"	m	struct:hydra_mdio	typeref:typename:u8	file:
val	board/freescale/corenet_ds/eth_superhydra.c	/^	u8 val;$/;"	m	struct:__anona3cdf2e20108	typeref:typename:u8	file:
val	board/freescale/corenet_ds/eth_superhydra.c	/^	u8 val;$/;"	m	struct:super_hydra_mdio	typeref:typename:u8	file:
val	board/mpl/common/isa.h	/^	const uchar val;$/;"	m	struct:__anonabff7a9f0108	typeref:typename:const uchar
val	board/mpl/common/pci_parts.h	/^	unsigned long	val;	\/* value *\/$/;"	m	struct:pci_pip405_config_entry	typeref:typename:unsigned long
val	board/renesas/blanche/blanche.c	/^	u32	val;	\/* setting value *\/$/;"	m	struct:pin_db	typeref:typename:u32	file:
val	board/sandisk/sansa_fuze_plus/sfp.c	/^	uint16_t	val;$/;"	m	struct:__anon24bc4dd30108	typeref:typename:uint16_t	file:
val	board/solidrun/clearfog/clearfog.c	/^	u8 val;$/;"	m	struct:marvell_io_exp	typeref:typename:u8	file:
val	board/tqc/tqm5200/tqm5200.c	/^	uchar	val;$/;"	m	struct:_tfp410_config	typeref:typename:uchar	file:
val	cmd/pxe.c	/^	char *val;$/;"	m	struct:token	typeref:typename:char *	file:
val	drivers/soc/keystone/keystone_serdes.c	/^	u32 val;$/;"	m	struct:serdes_cfg	typeref:typename:u32	file:
val	drivers/video/ati_radeon_fb.c	/^	u32 val;$/;"	m	struct:__anon9e83ee070108	typeref:typename:u32	file:
val	drivers/video/ct69000.c	/^	const unsigned char val;$/;"	m	struct:__anon22c2f1e00108	typeref:typename:const unsigned char	file:
val	include/ec_commands.h	/^	uint8_t val;$/;"	m	struct:ec_params_gpio_set	typeref:typename:uint8_t
val	include/ec_commands.h	/^	uint8_t val;$/;"	m	struct:ec_response_gpio_get	typeref:typename:uint8_t
val	include/fsl_csu.h	/^	uint32_t val;$/;"	m	struct:csu_ns_dev	typeref:typename:uint32_t
val	include/grlib/gptimer.h	/^	volatile unsigned int val;$/;"	m	struct:__anon98dc47250108	typeref:typename:volatile unsigned int
val	include/kgdb.h	/^		unsigned long val;$/;"	m	struct:__anon584037260108	typeref:typename:unsigned long
val	include/linux/compat.h	/^	gid_t val;$/;"	m	struct:__anon481401f10208	typeref:typename:gid_t
val	include/linux/compat.h	/^	uid_t val;$/;"	m	struct:__anon481401f10108	typeref:typename:uid_t
val	lib/zlib/inftrees.h	/^    unsigned short val;         \/* offset in table or code value *\/$/;"	m	struct:__anon4cf584e10108	typeref:typename:unsigned short
val	scripts/kconfig/expr.h	/^	void *val;$/;"	m	struct:symbol_value	typeref:typename:void *
val	tools/easylogo/easylogo.c	/^		unsigned short val;$/;"	m	union:le16_to_cpu::__anonbf0fd82b060a	typeref:typename:unsigned short	file:
val	tools/gdb/serial.c	/^    speed_t val;$/;"	m	struct:speedmap	typeref:typename:speed_t	file:
val_buf_size	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 val_buf_size;$/;"	m	struct:bcm2835_mbox_tag_hdr	typeref:typename:u32
val_hi_speed	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32 val_hi_speed;$/;"	m	struct:serdes_change_m_phy	typeref:typename:u32
val_len	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 val_len;$/;"	m	struct:bcm2835_mbox_tag_hdr	typeref:typename:u32
val_low_speed	arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h	/^	u32 val_low_speed;$/;"	m	struct:serdes_change_m_phy	typeref:typename:u32
val_mask	post/board/lwmon5/sysmon.c	/^	uint		val_mask;$/;"	m	struct:sysmon_table_s	typeref:typename:uint	file:
val_max	post/board/lwmon5/sysmon.c	/^	uint		val_max;$/;"	m	struct:sysmon_table_s	typeref:typename:uint	file:
val_max_alt	post/board/lwmon5/sysmon.c	/^	uint		val_max_alt;$/;"	m	struct:sysmon_table_s	typeref:typename:uint	file:
val_min	post/board/lwmon5/sysmon.c	/^	uint		val_min;$/;"	m	struct:sysmon_table_s	typeref:typename:uint	file:
val_min_alt	post/board/lwmon5/sysmon.c	/^	uint		val_min_alt;$/;"	m	struct:sysmon_table_s	typeref:typename:uint	file:
val_valid	post/board/lwmon5/sysmon.c	/^	int		val_valid;$/;"	m	struct:sysmon_table_s	typeref:typename:int	file:
val_valid_alt	post/board/lwmon5/sysmon.c	/^	int		val_valid_alt;$/;"	m	struct:sysmon_table_s	typeref:typename:int	file:
valid	arch/powerpc/include/asm/ppc4xx-emac.h	/^   unsigned long	valid;$/;"	m	struct:arp_entry	typeref:typename:unsigned long
valid	arch/x86/include/asm/me_common.h	/^	u32 valid:1;$/;"	m	struct:me_uma	typeref:typename:u32:1
valid	board/gdsys/p1022/controlcenterd-id.c	/^	bool valid;$/;"	m	struct:h_reg	typeref:typename:bool	file:
valid	drivers/ddr/altera/sdram.c	/^	int	valid;		\/* Rule valid or not? 1 - valid, 0 not*\/$/;"	m	struct:sdram_prot_rule	typeref:typename:int	file:
valid	drivers/mtd/nand/sunxi_nand_spl.c	/^	bool valid;$/;"	m	struct:nfc_config	typeref:typename:bool	file:
valid	drivers/net/mvpp2.c	/^	bool valid;$/;"	m	struct:mvpp2_prs_shadow	typeref:typename:bool	file:
valid	drivers/spi/tegra114_spi.c	/^	int valid;$/;"	m	struct:tegra114_spi_priv	typeref:typename:int	file:
valid	drivers/spi/tegra20_sflash.c	/^	int valid;$/;"	m	struct:tegra20_sflash_priv	typeref:typename:int	file:
valid	drivers/spi/tegra20_slink.c	/^	int valid;$/;"	m	struct:tegra30_spi_priv	typeref:typename:int	file:
valid	drivers/spi/tegra210_qspi.c	/^	int valid;$/;"	m	struct:tegra210_qspi_priv	typeref:typename:int	file:
valid	fs/yaffs2/yaffs_guts.h	/^	u8 valid:1;		\/* When the file system is being loaded up, this$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
valid	include/key_matrix.h	/^	uint8_t valid;	\/* 1 if valid, 0 to ignore this *\/$/;"	m	struct:key_matrix_key	typeref:typename:uint8_t
valid	include/linux/ethtool.h	/^	__u32	valid;$/;"	m	struct:ethtool_set_features_block	typeref:typename:__u32
valid	include/vbe.h	/^	bool valid;$/;"	m	struct:vbe_mode_info	typeref:typename:bool
valid	lib/tpm.c	/^	int		valid;$/;"	m	struct:session_data	typeref:typename:int	file:
valid	tools/omapimage.h	/^	uint8_t valid;$/;"	m	struct:ch_settings	typeref:typename:uint8_t
valid_bit	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		uint32_t valid_bit; \/* 0x00 or 0x80 *\/$/;"	m	struct:qbman_swp::__anonadc6216b0108	typeref:typename:uint32_t
valid_bit	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		uint32_t valid_bit; \/* 0x00 or 0x80 *\/$/;"	m	struct:qbman_swp::__anonadc6216b0208	typeref:typename:uint32_t
valid_bit	drivers/net/fsl-mc/dpio/qbman_portal.h	/^		uint32_t valid_bit;$/;"	m	struct:qbman_swp::__anonadc6216b0308	typeref:typename:uint32_t
valid_elf_image	cmd/elf.c	/^int valid_elf_image(unsigned long addr)$/;"	f	typeref:typename:int
valid_flags	include/ec_commands.h	/^	uint32_t valid_flags;$/;"	m	struct:ec_response_flash_protect	typeref:typename:uint32_t
valid_flags	include/ec_commands.h	/^	uint8_t valid_flags;		\/* which flags are valid *\/$/;"	m	struct:ec_mkbp_config	typeref:typename:uint8_t
valid_link	drivers/net/rtl8169.c	/^#define valid_link /;"	d	file:
valid_mask	include/ec_commands.h	/^	uint32_t valid_mask;		\/* valid fields *\/$/;"	m	struct:ec_mkbp_config	typeref:typename:uint32_t
valid_series	tools/patman/series.py	/^valid_series = ['to', 'cc', 'version', 'changes', 'prefix', 'notes', 'name',$/;"	v
valid_sig	examples/api/glue.c	/^static int valid_sig(struct api_signature *sig)$/;"	f	typeref:typename:int	file:
valid_stdin	scripts/kconfig/conf.c	/^static int valid_stdin = 1;$/;"	v	typeref:typename:int	file:
valid_user_regs	arch/arm/include/asm/proc-armv/ptrace.h	/^static inline int valid_user_regs(struct pt_regs *regs)$/;"	f	typeref:typename:int
valid_user_regs	arch/avr32/include/asm/ptrace.h	/^static __inline__ int valid_user_regs(struct pt_regs *regs)$/;"	f	typeref:typename:int
validate_data_node	fs/ubifs/tnc.c	/^static int validate_data_node(struct ubifs_info *c, void *buf,$/;"	f	typeref:typename:int	file:
validate_date	board/compulab/common/eeprom.c	/^static int validate_date(unsigned char day, unsigned char month,$/;"	f	typeref:typename:int	file:
validate_ec_hdr	drivers/mtd/ubi/io.c	/^static int validate_ec_hdr(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
validate_empty	test/py/tests/test_env.py	/^def validate_empty(state_test_env, var):$/;"	f
validate_endpoint	arch/powerpc/cpu/ppc4xx/4xx_pcie.c	/^static int validate_endpoint(struct pci_controller *hose)$/;"	f	typeref:typename:int	file:
validate_exited	test/py/u_boot_console_sandbox.py	/^    def validate_exited(self):$/;"	m	class:ConsoleSandbox
validate_gpt_entries	disk/part_efi.c	/^static int validate_gpt_entries(gpt_header *gpt_h, gpt_entry *gpt_e)$/;"	f	typeref:typename:int	file:
validate_gpt_header	disk/part_efi.c	/^static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,$/;"	f	typeref:typename:int	file:
validate_inode	fs/ubifs/super.c	/^static int validate_inode(struct ubifs_info *c, const struct inode *inode)$/;"	f	typeref:typename:int	file:
validate_master	fs/ubifs/master.c	/^static int validate_master(const struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
validate_nnode	fs/ubifs/lpt.c	/^static int validate_nnode(const struct ubifs_info *c, struct ubifs_nnode *nnode,$/;"	f	typeref:typename:int	file:
validate_pnode	fs/ubifs/lpt.c	/^static int validate_pnode(const struct ubifs_info *c, struct ubifs_pnode *pnode,$/;"	f	typeref:typename:int	file:
validate_ref	fs/ubifs/replay.c	/^static int validate_ref(struct ubifs_info *c, const struct ubifs_ref_node *ref)$/;"	f	typeref:typename:int	file:
validate_sb	fs/ubifs/sb.c	/^static int validate_sb(struct ubifs_info *c, struct ubifs_sb_node *sup)$/;"	f	typeref:typename:int	file:
validate_set	test/py/tests/test_env.py	/^def validate_set(state_test_env, var, value):$/;"	f
validate_version_string_in_text	test/py/u_boot_console_base.py	/^    def validate_version_string_in_text(self, text):$/;"	m	class:ConsoleBase
validate_vid_hdr	drivers/mtd/ubi/attach.c	/^static int validate_vid_hdr(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
validate_vid_hdr	drivers/mtd/ubi/io.c	/^static int validate_vid_hdr(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
validation	tools/socfpgaimage.c	/^	uint32_t validation;$/;"	m	struct:socfpga_header	typeref:typename:uint32_t	file:
valloc	include/malloc.h	/^#pragma weak valloc /;"	d
vals	drivers/clk/uniphier/clk-uniphier.h	/^	unsigned int vals[UNIPHIER_CLK_MAX_NR_MUXS];$/;"	m	struct:uniphier_clk_mux_data	typeref:typename:unsigned int[]
vals	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	MV_DRAM_TRAINING_INIT *vals;$/;"	m	struct:dram_modes	typeref:typename:MV_DRAM_TRAINING_INIT *
vals	include/ec_commands.h	/^			} vals[23];$/;"	m	struct:ec_response_lightbar::__anon71a6b267030a::dump	typeref:struct:ec_response_lightbar::__anon71a6b267030a::dump::__anon71a6b2670408[23]
value	arch/arm/cpu/armv7/ls102xa/fsl_epu.h	/^	u32 value;$/;"	m	struct:fsm_reg_vals	typeref:typename:u32
value	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t value;$/;"	m	struct:timer	typeref:typename:uint32_t
value	arch/arm/include/asm/omap_common.h	/^	u32 value;$/;"	m	struct:volts	typeref:typename:u32
value	arch/arm/mach-davinci/include/mach/davinci_misc.h	/^	unsigned char	value;		\/* Value to set in field *\/$/;"	m	struct:pinmux_config	typeref:typename:unsigned char
value	arch/arm/mach-exynos/include/mach/uart.h	/^	unsigned char	value;		\/* ufracval *\/$/;"	m	union:br_rest	typeref:typename:unsigned char
value	arch/arm/mach-s5pc1xx/include/mach/uart.h	/^	unsigned char	value;		\/* ufracval *\/$/;"	m	union:br_rest	typeref:typename:unsigned char
value	arch/sparc/cpu/leon2/prom.c	/^	char *value;$/;"	m	struct:property	typeref:typename:char *	file:
value	arch/sparc/cpu/leon3/memcfg.h	/^		unsigned int value;	\/* Value written to register *\/$/;"	m	struct:ahbmctrl_setup::__anon8a0508e60208	typeref:typename:unsigned int
value	arch/sparc/cpu/leon3/memcfg.h	/^		unsigned int value;	\/* Value written to register *\/$/;"	m	struct:mctrl_setup::__anon8a0508e60108	typeref:typename:unsigned int
value	arch/sparc/cpu/leon3/prom.c	/^	char *value;$/;"	m	struct:property	typeref:typename:char *	file:
value	arch/x86/include/asm/coreboot_tables.h	/^	u32 value;$/;"	m	struct:cb_cmos_enums	typeref:typename:u32
value	arch/x86/include/asm/coreboot_tables.h	/^	u32 value;$/;"	m	struct:cb_gpio	typeref:typename:u32
value	board/bct-brettl2/smsc9303.c	/^	unsigned int value;$/;"	m	struct:__anon648e74860108	typeref:typename:unsigned int	file:
value	board/bct-brettl2/smsc9303.c	/^	unsigned short value;$/;"	m	struct:__anon648e74860208	typeref:typename:unsigned short	file:
value	board/congatec/cgtqmx6eval/cgtqmx6eval.c	/^	uchar value;$/;"	m	struct:interface_level	typeref:typename:uchar	file:
value	board/esd/common/xilinx_jtag/lenval.c	/^long value( lenVal*     plvValue )$/;"	f	typeref:typename:long
value	board/mpl/pati/pci_eeprom.h	/^	unsigned short value;$/;"	m	struct:pci_eeprom_t	typeref:typename:unsigned short
value	common/cli_hush.c	/^	char *value;$/;"	m	struct:variables	typeref:typename:char *	file:
value	common/iotrace.c	/^	iovalue_t value;$/;"	m	struct:iotrace_record	typeref:typename:iovalue_t	file:
value	drivers/crypto/fsl/error.c	/^	u8 value;$/;"	m	struct:__anondbc054120108	typeref:typename:u8	file:
value	drivers/net/ax88180.c	/^		unsigned short offset, value;$/;"	m	struct:ax88180_mac_reset::__anona90e765c0108	typeref:typename:unsigned short	file:
value	drivers/net/e1000.h	/^	volatile uint32_t value;	\/* Flexible Filter Value (RW) *\/$/;"	m	struct:e1000_ffvt_entry	typeref:typename:volatile uint32_t
value	drivers/net/ne2000.c	/^		u_char value, offset;$/;"	m	struct:get_prom::__anon6de001af0108	typeref:typename:u_char	file:
value	drivers/phy/marvell/comphy_a3700.c	/^	u16 value;$/;"	m	struct:sgmii_phy_init_data_fix	typeref:typename:u16	file:
value	drivers/pinctrl/exynos/pinctrl-exynos.h	/^	const unsigned int	value;$/;"	m	struct:exynos_pinctrl_config_data	typeref:typename:const unsigned int
value	drivers/spmi/spmi-sandbox.c	/^	u8 value;$/;"	m	struct:sandbox_emul_fake_regs	typeref:typename:u8	file:
value	drivers/video/ivybridge_igd.c	/^	u32 value;$/;"	m	struct:gt_powermeter	typeref:typename:u32	file:
value	include/ec_commands.h	/^			uint8_t ctrl, reg, value;$/;"	m	struct:ec_params_lightbar::__anon71a6b267010a::reg	typeref:typename:uint8_t
value	include/ec_commands.h	/^	uint16_t value;$/;"	m	struct:ec_params_sb_wr_word	typeref:typename:uint16_t
value	include/ec_commands.h	/^	uint16_t value;$/;"	m	struct:ec_params_thermal_set_threshold	typeref:typename:uint16_t
value	include/ec_commands.h	/^	uint16_t value;$/;"	m	struct:ec_response_sb_rd_word	typeref:typename:uint16_t
value	include/ec_commands.h	/^	uint16_t value;$/;"	m	struct:ec_response_thermal_get_threshold	typeref:typename:uint16_t
value	include/mb862xx.h	/^	unsigned int value;$/;"	m	struct:__anon38db270d0108	typeref:typename:unsigned int
value	include/mtd/ubi-user.h	/^	__u64 value;$/;"	m	struct:ubi_set_vol_prop_req	typeref:typename:__u64
value	include/mv88e6352.h	/^	u16 value;$/;"	m	struct:mv88e_sw_reg	typeref:typename:u16
value	include/usb.h	/^	__le16	value;$/;"	m	struct:devrequest	typeref:typename:__le16
value	lib/list_sort.c	/^	int value;$/;"	m	struct:debug_el	typeref:typename:int	file:
value	post/cpu/mpc8xx/spr.c	/^    unsigned long value;$/;"	m	struct:__anonf88dfa8e0108	typeref:typename:unsigned long	file:
value	post/cpu/ppc4xx/spr.c	/^	unsigned long value;$/;"	m	struct:__anonb9764ead0108	typeref:typename:unsigned long	file:
value	post/lib_powerpc/store.c	/^    ulong value;$/;"	m	struct:cpu_post_store_s	typeref:typename:ulong	file:
value	tools/imximage.h	/^	uint32_t value; \/* Data to write *\/$/;"	m	struct:__anon504a956c0108	typeref:typename:uint32_t
value	tools/imximage.h	/^	uint32_t value;$/;"	m	struct:__anon504a956c0708	typeref:typename:uint32_t
value0	board/bf609-ezkit/soft_switch.c	/^	uchar value0; \/* OLATA *\/$/;"	m	struct:switch_config	typeref:typename:uchar	file:
value1	board/bf609-ezkit/soft_switch.c	/^	uchar value1; \/* OLATB *\/$/;"	m	struct:switch_config	typeref:typename:uchar	file:
value_add	tools/fdtgrep.c	/^static int value_add(struct display_info *disp, struct value_node **headp,$/;"	f	typeref:typename:int	file:
value_head	tools/fdtgrep.c	/^	struct value_node *value_head;	\/* List of values to match *\/$/;"	m	struct:display_info	typeref:struct:value_node *	file:
value_high	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t value_high;$/;"	m	struct:timer4	typeref:typename:uint32_t
value_low	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t value_low;$/;"	m	struct:timer4	typeref:typename:uint32_t
value_node	tools/fdtgrep.c	/^struct value_node {$/;"	s	file:
var	arch/arm/mach-socfpga/misc.c	/^	const char	*var;$/;"	m	struct:__anon0d396cd60208	typeref:typename:const char *	file:
var	include/linux/fb.h	/^	struct fb_var_screeninfo var;	\/* Current var *\/$/;"	m	struct:fb_info	typeref:struct:fb_var_screeninfo
varTab	include/MCD_dma.h	/^	u32 varTab;		\/* variable table start *\/$/;"	m	struct:__anon0c34f9b30108	typeref:typename:u32
varTablePtr	include/MCD_dma.h	/^	u32 varTablePtr;$/;"	m	struct:dmaRegs_s	typeref:typename:u32
var_1	lib/dhry/dhry.h	/^                  } var_1;$/;"	m	union:record::__anon8188259e020a	typeref:struct:record::__anon8188259e020a::__anon8188259e0308
var_2	lib/dhry/dhry.h	/^                  } var_2;$/;"	m	union:record::__anon8188259e020a	typeref:struct:record::__anon8188259e020a::__anon8188259e0408
var_3	lib/dhry/dhry.h	/^                  } var_3;$/;"	m	union:record::__anon8188259e020a	typeref:struct:record::__anon8188259e020a::__anon8188259e0508
var_complete	common/command.c	/^int var_complete(int argc, char * const argv[], char last_char, int maxv, char *cmdv[])$/;"	f	typeref:typename:int
var_field_width	include/sh_pfc.h	/^	unsigned long *var_field_width;$/;"	m	struct:pinmux_cfg_reg	typeref:typename:unsigned long *
var_hregs	board/gdsys/p1022/controlcenterd-id.c	/^static struct h_reg var_hregs[8];$/;"	v	typeref:struct:h_reg[8]	file:
var_len_byte	board/esd/common/xilinx_jtag/lenval.h	/^typedef struct var_len_byte$/;"	s
var_mode	drivers/video/mx3fb.c	/^static struct ctfb_res_modes var_mode;$/;"	v	typeref:struct:ctfb_res_modes	file:
var_size_header	tools/mkexynosspl.c	/^struct var_size_header {$/;"	s	file:
variablePointer	include/mpc5xxx.h	/^	volatile u32 variablePointer;	\/* SDMA + 0x0c *\/$/;"	m	struct:mpc5xxx_sdma	typeref:typename:volatile u32
variable_test_bit	arch/x86/include/asm/bitops.h	/^static __inline__ int variable_test_bit(int nr, volatile void * addr)$/;"	f	typeref:typename:int
variables	common/cli_hush.c	/^struct variables {$/;"	s	file:
variant	drivers/mtd/nand/pxa3xx_nand.c	/^	enum pxa3xx_nand_variant variant;$/;"	m	struct:pxa3xx_nand_info	typeref:enum:pxa3xx_nand_variant	file:
variant	drivers/net/sun8i_emac.c	/^	enum emac_variant variant;$/;"	m	struct:emac_eth_dev	typeref:enum:emac_variant	file:
variant	fs/yaffs2/yaffs_guts.h	/^	union yaffs_obj_var variant;$/;"	m	struct:yaffs_obj	typeref:union:yaffs_obj_var
variant	lib/dhry/dhry.h	/^          } variant;$/;"	m	struct:record	typeref:union:record::__anon8188259e020a
variant_type	fs/yaffs2/yaffs_guts.h	/^	enum yaffs_obj_type variant_type:3;$/;"	m	struct:yaffs_checkpt_obj	typeref:enum:yaffs_obj_type:3
variant_type	fs/yaffs2/yaffs_guts.h	/^	enum yaffs_obj_type variant_type;$/;"	m	struct:yaffs_obj	typeref:enum:yaffs_obj_type
vaux1_reg	arch/arm/dts/am335x-evm.dts	/^		vaux1_reg: regulator@9 {$/;"	l
vaux1_reg	arch/arm/dts/am335x-evmsk.dts	/^		vaux1_reg: regulator@9 {$/;"	l
vaux1_reg	arch/arm/dts/am335x-icev2.dts	/^		vaux1_reg: regulator@9 {$/;"	l
vaux1_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vaux1_reg: regulator@9 {$/;"	l
vaux1_reg	arch/arm/dts/tps65910.dtsi	/^		vaux1_reg: regulator@9 {$/;"	l
vaux2_reg	arch/arm/dts/am335x-evm.dts	/^		vaux2_reg: regulator@10 {$/;"	l
vaux2_reg	arch/arm/dts/am335x-evmsk.dts	/^		vaux2_reg: regulator@10 {$/;"	l
vaux2_reg	arch/arm/dts/am335x-icev2.dts	/^		vaux2_reg: regulator@10 {$/;"	l
vaux2_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vaux2_reg: regulator@10 {$/;"	l
vaux2_reg	arch/arm/dts/tps65910.dtsi	/^		vaux2_reg: regulator@10 {$/;"	l
vaux33_reg	arch/arm/dts/am335x-evm.dts	/^		vaux33_reg: regulator@11 {$/;"	l
vaux33_reg	arch/arm/dts/am335x-evmsk.dts	/^		vaux33_reg: regulator@11 {$/;"	l
vaux33_reg	arch/arm/dts/am335x-icev2.dts	/^		vaux33_reg: regulator@11 {$/;"	l
vaux33_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vaux33_reg: regulator@11 {$/;"	l
vaux33_reg	arch/arm/dts/tps65910.dtsi	/^		vaux33_reg: regulator@11 {$/;"	l
vb_magic	include/zfs/vdev_impl.h	/^	uint64_t	vb_magic;		\/* VDEV_BOOT_MAGIC	*\/$/;"	m	struct:vdev_boot_header	typeref:typename:uint64_t
vb_offset	include/zfs/vdev_impl.h	/^	uint64_t	vb_offset;		\/* start offset	(bytes) *\/$/;"	m	struct:vdev_boot_header	typeref:typename:uint64_t
vb_pad	include/zfs/vdev_impl.h	/^	char		vb_pad[VDEV_BOOT_HEADER_SIZE - 4 * sizeof(uint64_t)];$/;"	m	struct:vdev_boot_header	typeref:typename:char[]
vb_size	include/zfs/vdev_impl.h	/^	uint64_t	vb_size;		\/* size (bytes)		*\/$/;"	m	struct:vdev_boot_header	typeref:typename:uint64_t
vb_version	include/zfs/vdev_impl.h	/^	uint64_t	vb_version;		\/* VDEV_BOOT_VERSION	*\/$/;"	m	struct:vdev_boot_header	typeref:typename:uint64_t
vback_porch	include/fdtdec.h	/^	struct timing_entry vback_porch;	\/* ver. back porch *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
vbank	board/freescale/ls1021atwr/ls1021atwr.c	/^	u8 vbank;		\/* Flash bank selection Control *\/$/;"	m	struct:cpld_data	typeref:typename:u8	file:
vbank	board/freescale/ls1043ardb/cpld.h	/^	u8 vbank;		\/* 0x7 - Flash bank selection Control *\/$/;"	m	struct:cpld_data	typeref:typename:u8
vbank	board/freescale/ls1046ardb/cpld.h	/^	u8 vbank;		\/* 0x7 - QSPI Flash Bank Setting Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
vbank	board/freescale/t4rdb/cpld.h	/^	u8 vbank;	\/* 0x08 - Flash Bank Selection Control Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
vbar	arch/arm/mach-sunxi/board.c	/^	uint32_t vbar;$/;"	m	struct:fel_stash	typeref:typename:uint32_t	file:
vbase	drivers/mtd/nand/fsl_elbc_nand.c	/^	u8 __iomem *vbase;      \/* Chip select base virtual address  *\/$/;"	m	struct:fsl_elbc_mtd	typeref:typename:u8 __iomem *	file:
vbase	drivers/mtd/nand/fsl_ifc_nand.c	/^	u8 __iomem *vbase;      \/* Chip select base virtual address       *\/$/;"	m	struct:fsl_ifc_mtd	typeref:typename:u8 __iomem *	file:
vbat	arch/arm/dts/am335x-evm.dts	/^	vbat: fixedregulator@0 {$/;"	l
vbat	arch/arm/dts/am335x-evmsk.dts	/^	vbat: fixedregulator@0 {$/;"	l
vbat	arch/arm/dts/am335x-icev2.dts	/^	vbat: fixedregulator@0 {$/;"	l
vbat	arch/arm/dts/am335x-pxm2.dtsi	/^	vbat: fixedregulator2 {$/;"	l
vbat	arch/arm/dts/am43x-epos-evm.dts	/^	vbat: fixedregulator@0 {$/;"	l
vbat_mult	include/twl6030.h	/^	int vbat_mult;$/;"	m	struct:twl6030_data	typeref:typename:int
vbat_shift	include/twl6030.h	/^	int vbat_shift;$/;"	m	struct:twl6030_data	typeref:typename:int
vbb_reg	arch/arm/dts/tps65910.dtsi	/^		vbb_reg: regulator@13 {$/;"	l
vbe_ddc_info	include/vbe.h	/^struct vbe_ddc_info {$/;"	s
vbe_get_mode_info	arch/x86/lib/bios.c	/^static u8 vbe_get_mode_info(struct vbe_mode_info *mi)$/;"	f	typeref:typename:u8	file:
vbe_get_video_info	drivers/pci/pci_rom.c	/^int vbe_get_video_info(struct graphic_device *gdev)$/;"	f	typeref:typename:int
vbe_info	include/vbe.h	/^struct __packed vbe_info {$/;"	s
vbe_mode_info	include/vbe.h	/^struct vbe_mode_info {$/;"	s
vbe_offset	drivers/bios_emulator/atibios.c	/^const int vbe_offset = 0x2000;$/;"	v	typeref:typename:const int
vbe_screen_info	include/vbe.h	/^struct __packed vbe_screen_info {$/;"	s
vbe_screen_info_input	include/vbe.h	/^struct __packed vbe_screen_info_input {$/;"	s
vbe_set_graphics	arch/x86/lib/bios.c	/^static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info)$/;"	f	typeref:typename:void	file:
vbe_set_mode	arch/x86/lib/bios.c	/^static u8 vbe_set_mode(struct vbe_mode_info *mi)$/;"	f	typeref:typename:u8	file:
vbe_setup_video	drivers/pci/pci_rom.c	/^int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))$/;"	f	typeref:typename:int
vbe_setup_video_priv	drivers/pci/pci_rom.c	/^int vbe_setup_video_priv(struct vesa_mode_info *vesa,$/;"	f	typeref:typename:int
vblank_sym	drivers/video/tegra124/sor.h	/^	s32	vblank_sym;$/;"	m	struct:tegra_dp_link_config	typeref:typename:s32
vbnv_context	drivers/misc/cros_ec_sandbox.c	/^	uint8_t vbnv_context[EC_VBNV_BLOCK_SIZE];$/;"	m	struct:ec_state	typeref:typename:uint8_t[]	file:
vbnv_size	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	u32 vbnv_size;$/;"	m	struct:sysinfo_t	typeref:typename:u32
vbnv_size	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t vbnv_size;$/;"	m	struct:cb_vbnv	typeref:typename:uint32_t
vbnv_start	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	u32 vbnv_start;$/;"	m	struct:sysinfo_t	typeref:typename:u32
vbnv_start	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t vbnv_start;$/;"	m	struct:cb_vbnv	typeref:typename:uint32_t
vbo_h	drivers/video/mx3fb.c	/^	u32	vbo_h:9;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:9	file:
vbo_l	drivers/video/mx3fb.c	/^	u32	vbo_l:17;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:17	file:
vboot	board/freescale/common/pixis.h	/^	u8 vboot;$/;"	m	struct:pixis	typeref:typename:u8
vboot_mode	include/ec_commands.h	/^	int vboot_mode;$/;"	m	struct:ec_params_entering_mode	typeref:typename:int
vborder	include/edid.h	/^	unsigned char vborder;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
vbox1	scripts/kconfig/gconf.glade	/^    <widget class="GtkVBox" id="vbox1">$/;"	i
vbp	drivers/video/am335x-fb.h	/^	unsigned int	vbp;		\/* Vertical back porch *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
vbp	drivers/video/da8xx-fb.h	/^	int		vbp;		\/* Vertical back porch *\/$/;"	m	struct:da8xx_panel	typeref:typename:int
vbp_cfg	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vbp_cfg;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vbp_sta	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vbp_sta;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vbuf	drivers/net/ftmac110.h	/^	void    *vbuf;$/;"	m	struct:ftmac110_desc	typeref:typename:void *
vbus	drivers/usb/gadget/at91_udc.h	/^	unsigned			vbus:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
vbus_active_low	include/linux/usb/at91_udc.h	/^	u8	vbus_active_low;	\/* vbus polarity *\/$/;"	m	struct:at91_udc_data	typeref:typename:u8
vbus_draw	include/linux/usb/gadget.h	/^	int	(*vbus_draw) (struct usb_gadget *, unsigned mA);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *,unsigned mA)
vbus_gpio	drivers/usb/host/ehci-exynos.c	/^	struct gpio_desc vbus_gpio;$/;"	m	struct:exynos_ehci_platdata	typeref:struct:gpio_desc	file:
vbus_gpio	drivers/usb/host/ehci-tegra.c	/^	struct gpio_desc vbus_gpio;	\/* GPIO for vbus enable *\/$/;"	m	struct:fdt_usb	typeref:struct:gpio_desc	file:
vbus_gpio	drivers/usb/host/xhci-exynos5.c	/^	struct gpio_desc vbus_gpio;$/;"	m	struct:exynos_xhci_platdata	typeref:struct:gpio_desc	file:
vbus_gpio	drivers/usb/host/xhci-rockchip.c	/^	struct gpio_desc vbus_gpio;$/;"	m	struct:rockchip_xhci_platdata	typeref:struct:gpio_desc	file:
vbus_id_status	include/dwc3-omap-uboot.h	/^	enum omap_dwc3_vbus_id_status vbus_id_status;$/;"	m	struct:dwc3_omap_device	typeref:enum:omap_dwc3_vbus_id_status
vbus_is_present	drivers/usb/gadget/atmel_usba_udc.c	/^static int vbus_is_present(struct usba_udc *udc)$/;"	f	typeref:typename:int	file:
vbus_pin	drivers/usb/gadget/atmel_usba_udc.h	/^	int vbus_pin;$/;"	m	struct:usba_udc	typeref:typename:int
vbus_pin	include/linux/usb/at91_udc.h	/^	int	vbus_pin;		\/* high == host powering us *\/$/;"	m	struct:at91_udc_data	typeref:typename:int
vbus_pin_inverted	drivers/usb/gadget/atmel_usba_udc.h	/^	int vbus_pin_inverted;$/;"	m	struct:usba_udc	typeref:typename:int
vbus_polled	include/linux/usb/at91_udc.h	/^	u8	vbus_polled;		\/* Use polling, not interrupt *\/$/;"	m	struct:at91_udc_data	typeref:typename:u8
vbus_prev	drivers/usb/gadget/atmel_usba_udc.h	/^	int vbus_prev;$/;"	m	struct:usba_udc	typeref:typename:int
vbus_reg	arch/arm/dts/tegra20-seaboard.dts	/^		vbus_reg: regulator@3 {$/;"	l
vbus_reg	arch/arm/dts/tegra20-trimslice.dts	/^		vbus_reg: regulator@2 {$/;"	l
vbus_session	include/linux/usb/gadget.h	/^	int	(*vbus_session) (struct usb_gadget *, int is_active);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *,int is_active)
vbus_status	drivers/usb/musb-new/musb_core.h	/^	int	(*vbus_status)(struct musb *musb);$/;"	m	struct:musb_platform_ops	typeref:typename:int (*)(struct musb * musb)
vbuscfg	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	vbuscfg;	\/* 0x19C: APB_MISC_GP_USBVBUSENCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vbuscfg	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	vbuscfg;	\/* 0x19C: APB_MISC_GP_USBVBUSENCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vbuscfg	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	vbuscfg;	\/* 0x19C: APB_MISC_GP_USBVBUSENCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vbuserr_retry	drivers/usb/musb-new/musb_core.h	/^	u16			vbuserr_retry;$/;"	m	struct:musb	typeref:typename:u16
vcap_cfg	include/vsc9953.h	/^	u32	vcap_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
vcap_core_cfg	include/vsc9953.h	/^	struct vsc9953_vcap_core_cfg	vcap_core_cfg;$/;"	m	struct:vsc9953_vcap	typeref:struct:vsc9953_vcap_core_cfg
vcap_mv_cfg	include/vsc9953.h	/^	u32	vcap_mv_cfg;$/;"	m	struct:vsc9953_vcap_core_cfg	typeref:typename:u32
vcap_rng_type_cfg	include/vsc9953.h	/^	u32	vcap_rng_type_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
vcap_rng_val_cfg	include/vsc9953.h	/^	u32	vcap_rng_val_cfg;$/;"	m	struct:vsc9953_ana_common	typeref:typename:u32
vcap_s1_key_cfg	include/vsc9953.h	/^	u32	vcap_s1_key_cfg[3];$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32[3]
vcap_s2_cfg	include/vsc9953.h	/^	u32	vcap_s2_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
vcap_update_ctrl	include/vsc9953.h	/^	u32	vcap_update_ctrl;$/;"	m	struct:vsc9953_vcap_core_cfg	typeref:typename:u32
vcc135_ddr	arch/arm/dts/rk3288-veyron.dtsi	/^			vcc135_ddr: DCDC_REG3 {$/;"	l	label:rk808
vcc18_codec	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc18_codec: LDO_REG4 {$/;"	l
vcc18_codec	arch/arm/dts/rk3288-veyron.dtsi	/^			vcc18_codec: LDO_REG6 {$/;"	l	label:rk808
vcc18_dvp	arch/arm/dts/rk3288-popmetal.dtsi	/^	vcc18_dvp: vcc18-dvp-regulator {$/;"	l
vcc18_lcd	arch/arm/dts/rk3288-evb.dtsi	/^			vcc18_lcd: REG12 {$/;"	l	label:act8846
vcc18_lcd	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc18_lcd: LDO_REG8 {$/;"	l
vcc18_lcd	arch/arm/dts/rk3288-firefly.dtsi	/^			vcc18_lcd: REG12 {$/;"	l	label:act8846
vcc18_lcd	arch/arm/dts/rk3288-jerry.dts	/^	vcc18_lcd: vcc18-lcd {$/;"	l
vcc18_lcd	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc18_lcd: LDO_REG8 {$/;"	l
vcc18_lcd	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcc18_lcd: LDO_REG4 {$/;"	l
vcc18_lcd	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcc18_lcd: REG12 {$/;"	l	label:act8846
vcc18_ldo1	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc18_ldo1: LDO_REG1 {$/;"	l
vcc18_wl	arch/arm/dts/rk3288-veyron.dtsi	/^			vcc18_wl: vcc18_flashio: vcc_18: DCDC_REG4 {$/;"	l	label:rk808
vcc28_dvp	arch/arm/dts/rk3288-popmetal.dtsi	/^	vcc28_dvp: vcc28-dvp-regulator {$/;"	l
vcc33_ccd	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^		vcc33_ccd: LDO_REG8 {$/;"	l
vcc33_io	arch/arm/dts/rk3288-veyron.dtsi	/^			vcc33_io: LDO_REG1 {$/;"	l	label:rk808
vcc33_lan	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc33_lan: SWITCH_REG2 {$/;"	l
vcc33_lcd	arch/arm/dts/rk3288-veyron.dtsi	/^			vcc33_lcd: SWITCH_REG1 {$/;"	l	label:rk808
vcc33_mipi	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc33_mipi: LDO_REG2 {$/;"	l
vcc33_sd	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc33_sd: SWITCH_REG1 {$/;"	l
vcc33_sd	arch/arm/dts/rk3288-veyron.dtsi	/^			vcc33_sd: LDO_REG5 {$/;"	l	label:rk808
vcc33_sys	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	vcc33_sys: vcc33-sys {$/;"	l
vcc33_sys	arch/arm/dts/rk3288-veyron.dtsi	/^	vcc33_sys: vcc33-sys {$/;"	l
vcc3v3_sys	arch/arm/dts/rk3399-evb.dts	/^	vcc3v3_sys: vcc3v3-sys {$/;"	l
vcc50_hdmi	arch/arm/dts/rk3288-veyron.dtsi	/^	vcc50_hdmi: vcc50-hdmi {$/;"	l
vcc50_hdmi_en	arch/arm/dts/rk3288-jerry.dts	/^		vcc50_hdmi_en: vcc50-hdmi-en {$/;"	l
vcc5_host1	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	vcc5_host1: vcc5-host1-regulator {$/;"	l
vcc5v0_host	arch/arm/dts/rk3399-evb.dts	/^	vcc5v0_host: vcc5v0-host-en {$/;"	l
vcc5v_otg	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	vcc5v_otg: vcc5v-otg-regulator {$/;"	l
vcc_18	arch/arm/dts/rk3288-evb.dtsi	/^			vcc_18: REG11 {$/;"	l	label:act8846
vcc_18	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc_18: LDO_REG7 {$/;"	l
vcc_18	arch/arm/dts/rk3288-firefly.dtsi	/^			vcc_18: REG11 {$/;"	l	label:act8846
vcc_18	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc_18: LDO_REG7 {$/;"	l
vcc_18	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcc_18: LDO_REG7 {$/;"	l
vcc_18	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcc_18: REG11 {$/;"	l	label:act8846
vcc_20	arch/arm/dts/rk3288-evb.dtsi	/^			vcc_20: REG4 {$/;"	l	label:act8846
vcc_20	arch/arm/dts/rk3288-firefly.dtsi	/^			vcc_20: REG4 {$/;"	l	label:act8846
vcc_20	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcc_20: REG4 {$/;"	l	label:act8846
vcc_5v	arch/arm/dts/rk3288-evb.dtsi	/^	vcc_5v: usb-regulator {$/;"	l
vcc_5v	arch/arm/dts/rk3288-firefly.dtsi	/^	vcc_5v: usb-regulator {$/;"	l
vcc_5v	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	vcc_5v: vcc-5v {$/;"	l
vcc_5v	arch/arm/dts/rk3288-veyron.dtsi	/^	vcc_5v: vcc-5v {$/;"	l
vcc_csi0	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^			vcc_csi0: ldo3 {$/;"	l	label:axp209
vcc_csi1	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^			vcc_csi1: ldo4 {$/;"	l	label:axp209
vcc_ddr	arch/arm/dts/rk3288-evb.dtsi	/^			vcc_ddr: REG1 {$/;"	l	label:act8846
vcc_ddr	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc_ddr: DCDC_REG3 {$/;"	l
vcc_ddr	arch/arm/dts/rk3288-firefly.dtsi	/^			vcc_ddr: REG1 {$/;"	l	label:act8846
vcc_ddr	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc_ddr: DCDC_REG3 {$/;"	l
vcc_ddr	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcc_ddr: DCDC_REG3 {$/;"	l
vcc_ddr	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcc_ddr: REG1 {$/;"	l	label:act8846
vcc_flash	arch/arm/dts/rk3288-evb.dtsi	/^	vcc_flash: flash-regulator {$/;"	l
vcc_flash	arch/arm/dts/rk3288-firefly.dtsi	/^	vcc_flash: flash-regulator {$/;"	l
vcc_flash	arch/arm/dts/rk3288-popmetal.dtsi	/^	vcc_flash: flash-regulator {$/;"	l
vcc_host_5v	arch/arm/dts/rk3288-evb.dtsi	/^	vcc_host_5v: usb-host-regulator {$/;"	l
vcc_host_5v	arch/arm/dts/rk3288-firefly.dtsi	/^	vcc_host_5v: usb-host-regulator {$/;"	l
vcc_io	arch/arm/dts/rk3288-evb.dtsi	/^			vcc_io: REG2 {$/;"	l	label:act8846
vcc_io	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc_io: DCDC_REG4 {$/;"	l
vcc_io	arch/arm/dts/rk3288-firefly.dtsi	/^			vcc_io: REG2 {$/;"	l	label:act8846
vcc_io	arch/arm/dts/rk3288-miniarm.dtsi	/^			vcc_io: DCDC_REG4 {$/;"	l
vcc_io	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcc_io: DCDC_REG4 {$/;"	l
vcc_io	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcc_io: REG2 {$/;"	l	label:act8846
vcc_lan	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc_lan: SWITCH_REG2 {$/;"	l
vcc_lan	arch/arm/dts/rk3288-firefly.dtsi	/^			vcc_lan: REG9 {$/;"	l	label:act8846
vcc_lan	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcc_lan: LDO_REG1 {$/;"	l
vcc_lcd	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcc_lcd: SWITCH_REG2 {$/;"	l
vcc_max	include/mtd/cfi_flash.h	/^	u8	vcc_max;$/;"	m	struct:cfi_qry	typeref:typename:u8
vcc_min	include/mtd/cfi_flash.h	/^	u8	vcc_min;$/;"	m	struct:cfi_qry	typeref:typename:u8
vcc_otg_5v	arch/arm/dts/rk3288-evb.dtsi	/^	vcc_otg_5v: usb-otg-regulator {$/;"	l
vcc_otg_5v	arch/arm/dts/rk3288-firefly.dtsi	/^	vcc_otg_5v: usb-otg-regulator {$/;"	l
vcc_phy	arch/arm/dts/rk3399-evb.dts	/^	vcc_phy: vcc-phy-regulator {$/;"	l
vcc_sd	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc_sd: SWITCH_REG1 {$/;"	l
vcc_sd	arch/arm/dts/rk3288-firefly.dtsi	/^	vcc_sd: sdmmc-regulator {$/;"	l
vcc_sd	arch/arm/dts/rk3288-miniarm.dtsi	/^	vcc_sd: sdmmc-regulator {$/;"	l
vcc_sd	arch/arm/dts/rk3288-popmetal.dtsi	/^	vcc_sd: sdmmc-regulator {$/;"	l
vcc_sd	arch/arm/dts/rk3288-rock2-square.dts	/^	vcc_sd: sdmmc-regulator {$/;"	l
vcc_sys	arch/arm/dts/rk3288-evb.dtsi	/^	vcc_sys: vsys-regulator {$/;"	l
vcc_sys	arch/arm/dts/rk3288-fennec.dtsi	/^	vcc_sys: vsys-regulator {$/;"	l
vcc_sys	arch/arm/dts/rk3288-firefly.dtsi	/^	vcc_sys: vsys-regulator {$/;"	l
vcc_sys	arch/arm/dts/rk3288-miniarm.dtsi	/^	vcc_sys: vsys-regulator {$/;"	l
vcc_sys	arch/arm/dts/rk3288-popmetal.dtsi	/^	vcc_sys: vsys-regulator {$/;"	l
vcc_sys	arch/arm/dts/rk3288-rock2-som.dtsi	/^	vcc_sys: vsys-regulator {$/;"	l
vcc_tp	arch/arm/dts/rk3288-evb.dtsi	/^			vcc_tp: REG8 {$/;"	l	label:act8846
vcc_usb_host	arch/arm/dts/rk3288-rock2-square.dts	/^	vcc_usb_host: vcc-host-regulator {$/;"	l
vcc_wl	arch/arm/dts/rk3288-fennec.dtsi	/^			vcc_wl: LDO_REG4 {$/;"	l
vcca_18	arch/arm/dts/rk3288-firefly.dtsi	/^			vcca_18: REG7 {$/;"	l	label:act8846
vcca_33	arch/arm/dts/rk3288-fennec.dtsi	/^			vcca_33: LDO_REG2 {$/;"	l
vcca_33	arch/arm/dts/rk3288-firefly.dtsi	/^			vcca_33: REG8 {$/;"	l	label:act8846
vcca_33	arch/arm/dts/rk3288-popmetal.dtsi	/^			vcca_33: LDO_REG8 {$/;"	l
vcca_codec	arch/arm/dts/rk3288-evb.dtsi	/^			vcca_codec: REG7 {$/;"	l	label:act8846
vcca_codec	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcca_codec: REG7 {$/;"	l	label:act8846
vcca_tp	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vcca_tp: REG8 {$/;"	l	label:act8846
vccio_pmu	arch/arm/dts/rk3288-evb.dtsi	/^			vccio_pmu: REG9 {$/;"	l	label:act8846
vccio_pmu	arch/arm/dts/rk3288-fennec.dtsi	/^			vccio_pmu: LDO_REG1 {$/;"	l
vccio_pmu	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vccio_pmu: REG9 {$/;"	l	label:act8846
vccio_sd	arch/arm/dts/rk3288-evb.dtsi	/^			vccio_sd: REG5 {$/;"	l	label:act8846
vccio_sd	arch/arm/dts/rk3288-fennec.dtsi	/^			vccio_sd: LDO_REG5 {$/;"	l
vccio_sd	arch/arm/dts/rk3288-firefly.dtsi	/^			vccio_sd: REG5 {$/;"	l	label:act8846
vccio_sd	arch/arm/dts/rk3288-miniarm.dtsi	/^			vccio_sd: LDO_REG5 {$/;"	l
vccio_sd	arch/arm/dts/rk3288-popmetal.dtsi	/^			vccio_sd: LDO_REG2 {$/;"	l
vccio_sd	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vccio_sd: REG5 {$/;"	l	label:act8846
vccio_sd	arch/arm/dts/rk3288-veyron.dtsi	/^			vccio_sd: LDO_REG4 {$/;"	l	label:rk808
vccio_wl	arch/arm/dts/rk3288-popmetal.dtsi	/^			vccio_wl: SWITCH_REG1 {$/;"	l
vccsys	arch/arm/dts/rk3288-veyron-chromebook.dtsi	/^	vccsys: vccsys {$/;"	l
vceil	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t vceil;$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
vcfgen0	board/freescale/common/ngpixis.h	/^	u8 vcfgen0;$/;"	m	struct:ngpixis	typeref:typename:u8
vcfgen0	board/freescale/common/pixis.h	/^	u8 vcfgen0;$/;"	m	struct:pixis	typeref:typename:u8
vcfgen1	board/freescale/common/pixis.h	/^	u8 vcfgen1;$/;"	m	struct:pixis	typeref:typename:u8
vclk_ecp_cntl	drivers/video/ati_radeon_fb.h	/^	u32		vclk_ecp_cntl;$/;"	m	struct:radeon_regs	typeref:typename:u32
vclkcr1	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 vclkcr1;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
vclkcr1	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 vclkcr1;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
vclkcr2	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 vclkcr2;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
vclkcr2	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 vclkcr2;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
vclkcr3	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 vclkcr3;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
vclkh	board/freescale/common/pixis.h	/^	u8 vclkh;$/;"	m	struct:pixis	typeref:typename:u8
vclkl	board/freescale/common/pixis.h	/^	u8 vclkl;$/;"	m	struct:pixis	typeref:typename:u8
vcma9_pld_regs	board/mpl/vcma9/vcma9.h	/^enum vcma9_pld_regs {$/;"	g
vcma9_print_info	board/mpl/vcma9/vcma9.c	/^void vcma9_print_info(void)$/;"	f	typeref:typename:void
vcma9_show_info	board/mpl/vcma9/vcma9.c	/^static void vcma9_show_info(char *board_name, char *serial)$/;"	f	typeref:typename:void	file:
vco	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	vco;$/;"	m	struct:socfpga_clock_manager_main_pll	typeref:typename:u32
vco	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	vco;$/;"	m	struct:socfpga_clock_manager_per_pll	typeref:typename:u32
vco	arch/arm/mach-socfpga/include/mach/clock_manager.h	/^	u32	vco;$/;"	m	struct:socfpga_clock_manager_sdr_pll	typeref:typename:u32
vco_clk	arch/m68k/include/asm/global_data.h	/^	unsigned long vco_clk;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
vco_div	arch/powerpc/cpu/mpc8260/speed.c	/^	int vco_div;$/;"	m	struct:__anon1baf12f90108	typeref:typename:int	file:
vco_divider	arch/powerpc/cpu/mpc83xx/speed.c	/^	mult_t vco_divider;$/;"	m	struct:__anon6ec4fb040208	typeref:typename:mult_t	file:
vco_max	drivers/video/ct69000.c	/^	int vco_max;		\/* VCO Max in MHz *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
vco_min	drivers/video/ct69000.c	/^	int vco_min;		\/* VCO Min in MHz *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
vco_out	arch/powerpc/include/asm/global_data.h	/^	unsigned long vco_out;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
vcocon	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 vcocon:4;$/;"	m	struct:pllx_misc_reg::__anonf37f1db20408	typeref:typename:u32:4
vcom_params_sn04	drivers/video/scf0403_lcd.c	/^static u16 vcom_params_sn04[]		= {0x00, 0x6A};$/;"	v	typeref:typename:u16[]	file:
vcom_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 vcom_params_sn20[]		= {0x74};$/;"	v	typeref:typename:u16[]	file:
vcompsel	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	vcompsel;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
vcontrol	drivers/usb/musb/musb_core.h	/^	u32	vcontrol;$/;"	m	struct:musb_regs	typeref:typename:u32
vcore0	board/freescale/common/pixis.h	/^	u8 vcore0;$/;"	m	struct:pixis	typeref:typename:u8
vcoreacc	board/freescale/common/pixis.h	/^	u8 vcoreacc[4];$/;"	m	struct:pixis	typeref:typename:u8[4]
vcorecnt	board/freescale/common/pixis.h	/^	u8 vcorecnt[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
vcoremax	board/freescale/common/pixis.h	/^	u8 vcoremax[2];$/;"	m	struct:pixis	typeref:typename:u8[2]
vcores_data	arch/arm/include/asm/omap_common.h	/^struct vcores_data {$/;"	s
vcores_init	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void __weak vcores_init(void)$/;"	f	typeref:typename:void __weak
vcores_init	board/ti/am57xx/board.c	/^void vcores_init(void)$/;"	f	typeref:typename:void
vcores_init	board/ti/dra7xx/evm.c	/^void vcores_init(void)$/;"	f	typeref:typename:void
vcount	include/linux/fb.h	/^	__u32 vcount;			\/* current scanline position *\/$/;"	m	struct:fb_vblank	typeref:typename:__u32
vcpclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int vcpclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
vcpclkstctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int vcpclkstctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
vcr	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 vcr;		\/* 0x20 Vertical Configuration Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
vcs_assign	scripts/get_maintainer.pl	/^sub vcs_assign {$/;"	s
vcs_blame	scripts/get_maintainer.pl	/^sub vcs_blame {$/;"	s
vcs_exists	scripts/get_maintainer.pl	/^sub vcs_exists {$/;"	s
vcs_file_blame	scripts/get_maintainer.pl	/^sub vcs_file_blame {$/;"	s
vcs_file_signoffs	scripts/get_maintainer.pl	/^sub vcs_file_signoffs {$/;"	s
vcs_find_author	scripts/get_maintainer.pl	/^sub vcs_find_author {$/;"	s
vcs_find_signers	scripts/get_maintainer.pl	/^sub vcs_find_signers {$/;"	s
vcs_is_git	scripts/get_maintainer.pl	/^sub vcs_is_git {$/;"	s
vcs_is_hg	scripts/get_maintainer.pl	/^sub vcs_is_hg {$/;"	s
vcs_save_commits	scripts/get_maintainer.pl	/^sub vcs_save_commits {$/;"	s
vcsr_bs	include/universe.h	/^	unsigned int vcsr_bs;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vcsr_clr	include/universe.h	/^	unsigned int vcsr_clr;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vcsr_ctl	include/universe.h	/^	unsigned int vcsr_ctl;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vcsr_set	include/universe.h	/^	unsigned int vcsr_set;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vcsr_to	include/universe.h	/^	unsigned int vcsr_to;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vct board options	board/micronas/vct/Kconfig	/^menu "vct board options"$/;"	m
vct_ehci_hcd_init	board/micronas/vct/ehci.c	/^int vct_ehci_hcd_init(u32 *hccr, u32 *hcor)$/;"	f	typeref:typename:int
vct_gpio_dir	board/micronas/vct/gpio.c	/^int vct_gpio_dir(int pin, int dir)$/;"	f	typeref:typename:int
vct_gpio_get	board/micronas/vct/gpio.c	/^int vct_gpio_get(int pin)$/;"	f	typeref:typename:int
vct_gpio_set	board/micronas/vct/gpio.c	/^void vct_gpio_set(int pin, int val)$/;"	f	typeref:typename:void
vct_pin_mux_initialize	board/micronas/vct/top.c	/^void vct_pin_mux_initialize(void)$/;"	f	typeref:typename:void
vctl	board/freescale/common/ngpixis.h	/^	u8 vctl;$/;"	m	struct:ngpixis	typeref:typename:u8
vctl	board/freescale/common/pixis.h	/^	u8 vctl;$/;"	m	struct:pixis	typeref:typename:u8
vctrl	include/tsi148.h	/^	unsigned int vctrl;                   \/* 0x238         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
vcxk_acknowledge_wait	drivers/video/bus_vcxk.c	/^int vcxk_acknowledge_wait(void)$/;"	f	typeref:typename:int
vcxk_bws	drivers/video/bus_vcxk.c	/^vu_char  *vcxk_bws      = ((vu_char *) (CONFIG_SYS_VCXK_BASE));$/;"	v	typeref:typename:vu_char *
vcxk_bws_long	drivers/video/bus_vcxk.c	/^vu_long  *vcxk_bws_long = ((vu_long *) (CONFIG_SYS_VCXK_BASE));$/;"	v	typeref:typename:vu_long *
vcxk_bws_word	drivers/video/bus_vcxk.c	/^vu_short *vcxk_bws_word = ((vu_short *)(CONFIG_SYS_VCXK_BASE));$/;"	v	typeref:typename:vu_short *
vcxk_clear	drivers/video/bus_vcxk.c	/^void vcxk_clear(void)$/;"	f	typeref:typename:void
vcxk_cls	drivers/video/bus_vcxk.c	/^void vcxk_cls(void)$/;"	f	typeref:typename:void
vcxk_display_bitmap	drivers/video/bus_vcxk.c	/^int vcxk_display_bitmap(ulong addr, int x, int y)$/;"	f	typeref:typename:int
vcxk_draw_mono	drivers/video/bus_vcxk.c	/^void vcxk_draw_mono(unsigned char *dataptr, unsigned long linewidth,$/;"	f	typeref:typename:void
vcxk_init	drivers/video/bus_vcxk.c	/^int vcxk_init(unsigned long width, unsigned long height)$/;"	f	typeref:typename:int
vcxk_loadimage	drivers/video/bus_vcxk.c	/^void vcxk_loadimage(ulong source)$/;"	f	typeref:typename:void
vcxk_request	drivers/video/bus_vcxk.c	/^int vcxk_request(void)$/;"	f	typeref:typename:int
vcxk_setbrightness	drivers/video/bus_vcxk.c	/^void vcxk_setbrightness(unsigned int side, short brightness)$/;"	f	typeref:typename:void
vcxk_setpixel	drivers/video/bus_vcxk.c	/^void vcxk_setpixel(int x, int y, unsigned long color)$/;"	f	typeref:typename:void
vdac_config	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	vdac_config;	\/* 0x2C *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
vdac_reg	arch/arm/dts/am335x-evm.dts	/^		vdac_reg: regulator@8 {$/;"	l
vdac_reg	arch/arm/dts/am335x-evmsk.dts	/^		vdac_reg: regulator@8 {$/;"	l
vdac_reg	arch/arm/dts/am335x-icev2.dts	/^		vdac_reg: regulator@8 {$/;"	l
vdac_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vdac_reg: regulator@8 {$/;"	l
vdac_reg	arch/arm/dts/tps65910.dtsi	/^		vdac_reg: regulator@8 {$/;"	l
vdat_addr	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	void	*vdat_addr;$/;"	m	struct:sysinfo_t	typeref:typename:void *
vdat_addr	arch/x86/include/asm/coreboot_tables.h	/^	void *vdat_addr;$/;"	m	struct:cb_vdat	typeref:typename:void *
vdat_size	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	u32	vdat_size;$/;"	m	struct:sysinfo_t	typeref:typename:u32
vdat_size	arch/x86/include/asm/coreboot_tables.h	/^	uint32_t vdat_size;$/;"	m	struct:cb_vdat	typeref:typename:uint32_t
vdbg	drivers/mtd/nand/fsl_elbc_nand.c	/^#define vdbg(/;"	d	file:
vdd10_lcd	arch/arm/dts/rk3288-evb.dtsi	/^			vdd10_lcd: REG6 {$/;"	l	label:act8846
vdd10_lcd	arch/arm/dts/rk3288-fennec.dtsi	/^			vdd10_lcd: LDO_REG6 {$/;"	l
vdd10_lcd	arch/arm/dts/rk3288-firefly.dtsi	/^			vdd10_lcd: REG6 {$/;"	l	label:act8846
vdd10_lcd	arch/arm/dts/rk3288-miniarm.dtsi	/^			vdd10_lcd: LDO_REG6 {$/;"	l
vdd10_lcd	arch/arm/dts/rk3288-popmetal.dtsi	/^			vdd10_lcd: LDO_REG6 {$/;"	l
vdd10_lcd	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vdd10_lcd: REG6 {$/;"	l	label:act8846
vdd10_lcd_pwren_h	arch/arm/dts/rk3288-veyron.dtsi	/^			vdd10_lcd_pwren_h: LDO_REG7 {$/;"	l	label:rk808
vdd1_reg	arch/arm/dts/am335x-evm.dts	/^		vdd1_reg: regulator@2 {$/;"	l
vdd1_reg	arch/arm/dts/am335x-evmsk.dts	/^		vdd1_reg: regulator@2 {$/;"	l
vdd1_reg	arch/arm/dts/am335x-icev2.dts	/^		vdd1_reg: regulator@2 {$/;"	l
vdd1_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vdd1_reg: regulator@2 {$/;"	l
vdd1_reg	arch/arm/dts/tegra30-apalis.dts	/^				vdd1_reg: vdd1 {$/;"	l	label:pmic
vdd1_reg	arch/arm/dts/tegra30-beaver.dts	/^				vdd1_reg: vdd1 {$/;"	l	label:pmic
vdd1_reg	arch/arm/dts/tegra30-cardhu.dts	/^				vdd1_reg: vdd1 {$/;"	l	label:pmic
vdd1_reg	arch/arm/dts/tps65910.dtsi	/^		vdd1_reg: regulator@2 {$/;"	l
vdd2_reg	arch/arm/dts/am335x-evm.dts	/^		vdd2_reg: regulator@3 {$/;"	l
vdd2_reg	arch/arm/dts/am335x-evmsk.dts	/^		vdd2_reg: regulator@3 {$/;"	l
vdd2_reg	arch/arm/dts/am335x-icev2.dts	/^		vdd2_reg: regulator@3 {$/;"	l
vdd2_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vdd2_reg: regulator@3 {$/;"	l
vdd2_reg	arch/arm/dts/tegra30-apalis.dts	/^				vdd2_reg: vdd2 {$/;"	l	label:pmic
vdd2_reg	arch/arm/dts/tegra30-beaver.dts	/^				vdd2_reg: vdd2 {$/;"	l	label:pmic
vdd2_reg	arch/arm/dts/tegra30-cardhu.dts	/^				vdd2_reg: vdd2 {$/;"	l	label:pmic
vdd2_reg	arch/arm/dts/tps65910.dtsi	/^		vdd2_reg: regulator@3 {$/;"	l
vdd3_reg	arch/arm/dts/am335x-evm.dts	/^		vdd3_reg: regulator@4 {$/;"	l
vdd3_reg	arch/arm/dts/am335x-evmsk.dts	/^		vdd3_reg: regulator@4 {$/;"	l
vdd3_reg	arch/arm/dts/am335x-icev2.dts	/^		vdd3_reg: regulator@4 {$/;"	l
vdd3_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vdd3_reg: regulator@4 {$/;"	l
vdd3_reg	arch/arm/dts/tps65910.dtsi	/^		vdd3_reg: regulator@4 {$/;"	l
vdd_10	arch/arm/dts/rk3288-evb.dtsi	/^			vdd_10: REG10 {$/;"	l	label:act8846
vdd_10	arch/arm/dts/rk3288-fennec.dtsi	/^			vdd_10: LDO_REG3 {$/;"	l
vdd_10	arch/arm/dts/rk3288-firefly.dtsi	/^			vdd_10: REG10 {$/;"	l	label:act8846
vdd_10	arch/arm/dts/rk3288-miniarm.dtsi	/^			vdd_10: LDO_REG3 {$/;"	l
vdd_10	arch/arm/dts/rk3288-popmetal.dtsi	/^			vdd_10: LDO_REG3 {$/;"	l
vdd_10	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vdd_10: REG10 {$/;"	l	label:act8846
vdd_10	arch/arm/dts/rk3288-veyron.dtsi	/^			vdd_10: LDO_REG3 {$/;"	l	label:rk808
vdd_12v0_sata	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_12v0_sata: regulator@14 {$/;"	l
vdd_12v0_sata	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_12v0_sata: regulator@14 {$/;"	l
vdd_1v05_run	arch/arm/dts/tegra124-cei-tk1-som.dts	/^				vdd_1v05_run: sd4 {$/;"	l	label:pmic
vdd_1v05_run	arch/arm/dts/tegra124-jetson-tk1.dts	/^				vdd_1v05_run: sd4 {$/;"	l	label:pmic
vdd_1v05_run	arch/arm/dts/tegra124-nyan.dtsi	/^				vdd_1v05_run: sd4 {$/;"	l	label:pmic
vdd_1v35_lp0	arch/arm/dts/tegra124-cei-tk1-som.dts	/^				vdd_1v35_lp0: sd2 {$/;"	l	label:pmic
vdd_1v35_lp0	arch/arm/dts/tegra124-jetson-tk1.dts	/^				vdd_1v35_lp0: sd2 {$/;"	l	label:pmic
vdd_1v35_lp0	arch/arm/dts/tegra124-nyan.dtsi	/^				vdd_1v35_lp0: sd2 {$/;"	l	label:pmic
vdd_3v3	arch/arm/dts/am57xx-beagle-x15.dts	/^	vdd_3v3: fixedregulator-vdd_3v3 {$/;"	l
vdd_3v3_hdmi	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_3v3_hdmi: regulator@4 {$/;"	l
vdd_3v3_hdmi	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_3v3_hdmi: regulator@4 {$/;"	l
vdd_3v3_hdmi	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_3v3_hdmi: regulator@4 {$/;"	l
vdd_3v3_lp0	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_3v3_lp0: regulator@10 {$/;"	l
vdd_3v3_lp0	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_3v3_lp0: regulator@10 {$/;"	l
vdd_3v3_lp0	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_3v3_lp0: regulator@10 {$/;"	l
vdd_3v3_panel	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_3v3_panel: regulator@9 {$/;"	l
vdd_3v3_run	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_3v3_run: regulator@3 {$/;"	l
vdd_3v3_run	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_3v3_run: regulator@3 {$/;"	l
vdd_3v3_run	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_3v3_run: regulator@3 {$/;"	l
vdd_3v3_sys	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_3v3_sys: regulator@2 {$/;"	l
vdd_3v3_sys	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_3v3_sys: regulator@2 {$/;"	l
vdd_3v3_sys	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_3v3_sys: regulator@2 {$/;"	l
vdd_5v0_hdmi	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_5v0_hdmi: regulator@12 {$/;"	l
vdd_5v0_hdmi	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_5v0_hdmi: regulator@12 {$/;"	l
vdd_5v0_hdmi	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_5v0_hdmi: regulator@12 {$/;"	l
vdd_5v0_hdmi	arch/arm/dts/tegra20-harmony.dts	/^		vdd_5v0_hdmi: regulator@6 {$/;"	l
vdd_5v0_hdmi	arch/arm/dts/tegra30-beaver.dts	/^		vdd_5v0_hdmi: regulator@8 {$/;"	l
vdd_5v0_reg	arch/arm/dts/tegra20-harmony.dts	/^		vdd_5v0_reg: regulator@0 {$/;"	l
vdd_5v0_reg	arch/arm/dts/tegra20-seaboard.dts	/^		vdd_5v0_reg: regulator@0 {$/;"	l
vdd_5v0_reg	arch/arm/dts/tegra20-tamonten.dtsi	/^		vdd_5v0_reg: regulator@0 {$/;"	l
vdd_5v0_reg	arch/arm/dts/tegra20-ventana.dts	/^		vdd_5v0_reg: regulator@0 {$/;"	l
vdd_5v0_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_5v0_reg: regulator@104 {$/;"	l
vdd_5v0_sata	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_5v0_sata: regulator@13 {$/;"	l
vdd_5v0_sata	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_5v0_sata: regulator@13 {$/;"	l
vdd_5v0_sys	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_5v0_sys: regulator@1 {$/;"	l
vdd_5v0_sys	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_5v0_sys: regulator@1 {$/;"	l
vdd_5v0_sys	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_5v0_sys: regulator@1 {$/;"	l
vdd_5v0_ts	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_5v0_ts: regulator@6 {$/;"	l
vdd_5v_in_reg	arch/arm/dts/tegra30-beaver.dts	/^		vdd_5v_in_reg: regulator@0 {$/;"	l
vdd_5v_sata_reg	arch/arm/dts/tegra30-beaver.dts	/^		vdd_5v_sata_reg: regulator@3 {$/;"	l
vdd_ac_bat_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_ac_bat_reg: regulator@0 {$/;"	l
vdd_bl2_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_bl2_reg: regulator@106 {$/;"	l
vdd_bl_reg	arch/arm/dts/tegra20-harmony.dts	/^		vdd_bl_reg: regulator@5 {$/;"	l
vdd_bl_reg	arch/arm/dts/tegra20-seaboard.dts	/^		vdd_bl_reg: regulator@5 {$/;"	l
vdd_bl_reg	arch/arm/dts/tegra20-ventana.dts	/^		vdd_bl_reg: regulator@4 {$/;"	l
vdd_bl_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_bl_reg: regulator@105 {$/;"	l
vdd_cam1_ldo_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_cam1_ldo_reg: regulator@6 {$/;"	l
vdd_cam2_ldo_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_cam2_ldo_reg: regulator@7 {$/;"	l
vdd_cam3_ldo_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_cam3_ldo_reg: regulator@8 {$/;"	l
vdd_center	arch/arm/dts/rk3399-evb.dts	/^	vdd_center: vdd-center {$/;"	l
vdd_com_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_com_reg: regulator@9 {$/;"	l
vdd_comp1	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 vdd_comp1;		\/* offset 0x400 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
vdd_core	arch/arm/dts/am437x-idk-evm.dts	/^	vdd_core: fixed-regulator-vdd_core {$/;"	l
vdd_corereg	arch/arm/dts/am437x-idk-evm.dts	/^	vdd_corereg: fixed-regulator-vdd_corereg {$/;"	l
vdd_cpu	arch/arm/dts/rk3288-evb.dtsi	/^	vdd_cpu: syr827@40 {$/;"	l
vdd_cpu	arch/arm/dts/rk3288-fennec.dtsi	/^			vdd_cpu: DCDC_REG1 {$/;"	l	label:rk808
vdd_cpu	arch/arm/dts/rk3288-firefly.dtsi	/^	vdd_cpu: syr827@40 {$/;"	l
vdd_cpu	arch/arm/dts/rk3288-miniarm.dtsi	/^			vdd_cpu: DCDC_REG1 {$/;"	l	label:rk808
vdd_cpu	arch/arm/dts/rk3288-popmetal.dtsi	/^			vdd_cpu: DCDC_REG1 {$/;"	l	label:rk808
vdd_cpu	arch/arm/dts/rk3288-rock2-som.dtsi	/^	vdd_cpu: syr827@40 {$/;"	l
vdd_cpu	arch/arm/dts/rk3288-veyron.dtsi	/^			vdd_cpu: DCDC_REG1 {$/;"	l	label:rk808
vdd_cpu	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^			vdd_cpu: dcdc2 {$/;"	l	label:axp209
vdd_cpu	arch/arm/dts/tegra124-nyan.dtsi	/^				vdd_cpu: sd0 {$/;"	l	label:pmic
vdd_drive	board/freescale/b4860qds/b4860qds.c	/^	struct vdd_drive {$/;"	s	function:adjust_vdd	file:
vdd_drive	board/freescale/common/vid.c	/^	struct vdd_drive {$/;"	s	function:adjust_vdd	file:
vdd_drive	board/freescale/t4qds/t4240qds.c	/^	struct vdd_drive {$/;"	s	function:adjust_vdd	file:
vdd_en	board/freescale/ls1046ardb/cpld.h	/^	u8 vdd_en;              \/* 0x10 - VDD Voltage Control Enable Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
vdd_fuse_3v3_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_fuse_3v3_reg: regulator@10 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-evb.dtsi	/^	vdd_gpu: syr828@41 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-fennec.dtsi	/^			vdd_gpu: DCDC_REG2 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-firefly.dtsi	/^	vdd_gpu: syr828@41 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-miniarm.dtsi	/^			vdd_gpu: DCDC_REG2 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-popmetal.dtsi	/^			vdd_gpu: DCDC_REG2 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-rock2-som.dtsi	/^	vdd_gpu: syr828@41 {$/;"	l
vdd_gpu	arch/arm/dts/rk3288-veyron.dtsi	/^			vdd_gpu: DCDC_REG2 {$/;"	l	label:rk808
vdd_gpu	arch/arm/dts/tegra124-cei-tk1-som.dts	/^				vdd_gpu: sd6 {$/;"	l	label:pmic
vdd_gpu	arch/arm/dts/tegra124-jetson-tk1.dts	/^				vdd_gpu: sd6 {$/;"	l	label:pmic
vdd_hdmi	arch/arm/dts/tegra20-seaboard.dts	/^		vdd_hdmi: regulator@6 {$/;"	l
vdd_hdmi_pll	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_hdmi_pll: regulator@11 {$/;"	l
vdd_hdmi_pll	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_hdmi_pll: regulator@11 {$/;"	l
vdd_hdmi_pll	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_hdmi_pll: regulator@11 {$/;"	l
vdd_int	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^			vdd_int: dcdc3 {$/;"	l	label:axp209
vdd_led	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_led: regulator@5 {$/;"	l
vdd_log	arch/arm/dts/rk3288-evb.dtsi	/^			vdd_log: REG3 {$/;"	l	label:act8846
vdd_log	arch/arm/dts/rk3288-firefly.dtsi	/^			vdd_log: REG3 {$/;"	l	label:act8846
vdd_log	arch/arm/dts/rk3288-rock2-som.dtsi	/^			vdd_log: REG3 {$/;"	l	label:act8846
vdd_logic	arch/arm/dts/rk3288-veyron.dtsi	/^	vdd_logic: pwm-regulator {$/;"	l
vdd_microvolts	include/adc.h	/^	int vdd_microvolts;$/;"	m	struct:adc_uclass_platdata	typeref:typename:int
vdd_mux	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_mux: regulator@0 {$/;"	l
vdd_mux	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_mux: regulator@0 {$/;"	l
vdd_mux	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_mux: regulator@0 {$/;"	l
vdd_pad1	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 vdd_pad1;		\/* offset 0x300 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
vdd_pad2	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 vdd_pad2;		\/* offset 0x304 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
vdd_pnl1_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_pnl1_reg: regulator@11 {$/;"	l
vdd_pnl_reg	arch/arm/dts/tegra20-harmony.dts	/^		vdd_pnl_reg: regulator@4 {$/;"	l
vdd_pnl_reg	arch/arm/dts/tegra20-seaboard.dts	/^		vdd_pnl_reg: regulator@4 {$/;"	l
vdd_pnl_reg	arch/arm/dts/tegra20-ventana.dts	/^		vdd_pnl_reg: regulator@3 {$/;"	l
vdd_polarity_negative	include/adc.h	/^	bool vdd_polarity_negative;$/;"	m	struct:adc_uclass_platdata	typeref:typename:bool
vdd_pwr_reset	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 vdd_pwr_reset;	\/* 0x120 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
vdd_pwr_reset	arch/arm/include/asm/arch/prcm.h	/^	u32 vdd_pwr_reset;	\/* 0x120 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
vdd_rtc	arch/arm/dts/sun7i-a20-olinuxino-lime2.dts	/^			vdd_rtc: ldo1 {$/;"	l	label:axp209
vdd_run_cam	arch/arm/dts/tegra124-nyan.dtsi	/^				vdd_run_cam: ldo4 {$/;"	l	label:pmic
vdd_sel	board/freescale/ls1046ardb/cpld.h	/^	u8 vdd_sel;             \/* 0x11 - VDD Voltage Control Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
vdd_supply	include/adc.h	/^	struct udevice *vdd_supply;$/;"	m	struct:adc_uclass_platdata	typeref:struct:udevice *
vdd_sys_pwroff	arch/arm/include/asm/arch-sunxi/prcm.h	/^	u32 vdd_sys_pwroff;	\/* 0x110 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
vdd_sys_pwroff	arch/arm/include/asm/arch/prcm.h	/^	u32 vdd_sys_pwroff;	\/* 0x110 *\/$/;"	m	struct:sunxi_prcm_reg	typeref:typename:u32
vdd_usb1_vbus	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_usb1_vbus: regulator@7 {$/;"	l
vdd_usb1_vbus	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_usb1_vbus: regulator@7 {$/;"	l
vdd_usb1_vbus	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_usb1_vbus: regulator@7 {$/;"	l
vdd_usb3_vbus	arch/arm/dts/tegra124-cei-tk1-som.dts	/^		vdd_usb3_vbus: regulator@8 {$/;"	l
vdd_usb3_vbus	arch/arm/dts/tegra124-jetson-tk1.dts	/^		vdd_usb3_vbus: regulator@8 {$/;"	l
vdd_usb3_vbus	arch/arm/dts/tegra124-nyan.dtsi	/^		vdd_usb3_vbus: regulator@8 {$/;"	l
vdd_vid_reg	arch/arm/dts/tegra30-cardhu.dts	/^		vdd_vid_reg: regulator@12 {$/;"	l
vddctrl_reg	arch/arm/dts/tegra30-apalis.dts	/^				vddctrl_reg: vddctrl {$/;"	l	label:pmic
vddctrl_reg	arch/arm/dts/tegra30-beaver.dts	/^				vddctrl_reg: vddctrl {$/;"	l	label:pmic
vddctrl_reg	arch/arm/dts/tegra30-cardhu.dts	/^				vddctrl_reg: vddctrl {$/;"	l	label:pmic
vddio_1v8	arch/arm/dts/tegra124-cei-tk1-som.dts	/^				vddio_1v8: sd5 {$/;"	l	label:pmic
vddio_1v8	arch/arm/dts/tegra124-jetson-tk1.dts	/^				vddio_1v8: sd5 {$/;"	l	label:pmic
vddio_1v8	arch/arm/dts/tegra124-nyan.dtsi	/^				vddio_1v8: sd5 {$/;"	l	label:pmic
vddio_sdmmc3	arch/arm/dts/tegra124-cei-tk1-som.dts	/^				vddio_sdmmc3: ldo6 {$/;"	l	label:pmic
vddio_sdmmc3	arch/arm/dts/tegra124-jetson-tk1.dts	/^				vddio_sdmmc3: ldo6 {$/;"	l	label:pmic
vddio_sdmmc3	arch/arm/dts/tegra124-nyan.dtsi	/^				vddio_sdmmc3: ldo6 {$/;"	l	label:pmic
vdec_clk	arch/arm/dts/at91sam9g45.dtsi	/^					vdec_clk: vdec_clk {$/;"	l
vdev_ashift	fs/zfs/zfs.c	/^	uint64_t vdev_ashift;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
vdev_boot_header	include/zfs/vdev_impl.h	/^typedef struct vdev_boot_header {$/;"	s
vdev_boot_header_t	include/zfs/vdev_impl.h	/^} vdev_boot_header_t;$/;"	t	typeref:struct:vdev_boot_header
vdev_label	include/zfs/vdev_impl.h	/^typedef struct vdev_label {$/;"	s
vdev_label_start	fs/zfs/zfs.c	/^static uint64_t vdev_label_start(uint64_t psize, int l)$/;"	f	typeref:typename:uint64_t	file:
vdev_label_t	include/zfs/vdev_impl.h	/^} vdev_label_t;							\/* 256K total *\/$/;"	t	typeref:struct:vdev_label
vdev_phys	include/zfs/vdev_impl.h	/^typedef struct vdev_phys {$/;"	s
vdev_phys_sector	fs/zfs/zfs.c	/^	uint64_t vdev_phys_sector;$/;"	m	struct:zfs_data	typeref:typename:uint64_t	file:
vdev_phys_t	include/zfs/vdev_impl.h	/^} vdev_phys_t;$/;"	t	typeref:struct:vdev_phys
vdev_uberblock_compare	fs/zfs/zfs.c	/^vdev_uberblock_compare(uberblock_t *ub1, uberblock_t *ub2)$/;"	f	typeref:typename:int	file:
vdig1_reg	arch/arm/dts/am335x-evm.dts	/^		vdig1_reg: regulator@5 {$/;"	l
vdig1_reg	arch/arm/dts/am335x-evmsk.dts	/^		vdig1_reg: regulator@5 {$/;"	l
vdig1_reg	arch/arm/dts/am335x-icev2.dts	/^		vdig1_reg: regulator@5 {$/;"	l
vdig1_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vdig1_reg: regulator@5 {$/;"	l
vdig1_reg	arch/arm/dts/tps65910.dtsi	/^		vdig1_reg: regulator@5 {$/;"	l
vdig2_reg	arch/arm/dts/am335x-evm.dts	/^		vdig2_reg: regulator@6 {$/;"	l
vdig2_reg	arch/arm/dts/am335x-evmsk.dts	/^		vdig2_reg: regulator@6 {$/;"	l
vdig2_reg	arch/arm/dts/am335x-icev2.dts	/^		vdig2_reg: regulator@6 {$/;"	l
vdig2_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vdig2_reg: regulator@6 {$/;"	l
vdig2_reg	arch/arm/dts/tps65910.dtsi	/^		vdig2_reg: regulator@6 {$/;"	l
vdmrxvid	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	vdmrxvid[2];$/;"	m	struct:pcie_setup_regs	typeref:typename:unsigned int[2]
vdq	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	} vdq;$/;"	m	struct:qbman_swp	typeref:struct:qbman_swp::__anonadc6216b0208
vds	arch/powerpc/cpu/mpc8xx/video.c	/^			vds:2,		\/* Video Data Select *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:2	file:
ve_bwcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 ve_bwcr;		\/* 0xa8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ve_bwcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 ve_bwcr;		\/* 0xa8 *\/$/;"	m	struct:sunxi_mctl_com_reg	typeref:typename:u32
ve_clk	arch/arm/dts/sun4i-a10.dtsi	/^		ve_clk: clk@01c2013c {$/;"	l
ve_clk	arch/arm/dts/sun7i-a20.dtsi	/^		ve_clk: clk@01c2013c {$/;"	l
ve_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun4i.h	/^	u32 ve_clk_cfg;		\/* 0x13c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun6i.h	/^	u32 ve_clk_cfg;		\/* 0x13c VE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 ve_clk_cfg;		\/* 0x13c VE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch-sunxi/clock_sun9i.h	/^	u32 ve_clk_cfg;		\/* 0x4d0 VE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch/clock_sun4i.h	/^	u32 ve_clk_cfg;		\/* 0x13c *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch/clock_sun6i.h	/^	u32 ve_clk_cfg;		\/* 0x13c VE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 ve_clk_cfg;		\/* 0x13c VE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
ve_clk_cfg	arch/arm/include/asm/arch/clock_sun9i.h	/^	u32 ve_clk_cfg;		\/* 0x4d0 VE module clock *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
veal	include/tsi148.h	/^	unsigned int veal;                    \/* 0x264         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
veat	include/tsi148.h	/^	unsigned int veat;                    \/* 0x268         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
veau	include/tsi148.h	/^	unsigned int veau;                    \/* 0x260         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
vecs	arch/microblaze/cpu/interrupts.c	/^static struct irq_action *vecs;$/;"	v	typeref:struct:irq_action *	file:
vecs	arch/nios2/cpu/interrupts.c	/^static struct irq_action vecs[32];$/;"	v	typeref:struct:irq_action[32]	file:
vecswap	fs/yaffs2/yaffs_qsort.c	/^#define vecswap(/;"	d	file:
vector	arch/m68k/include/asm/ptrace.h	/^	unsigned vector:12;	\/* vector offset *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned:12
vector	arch/sparc/include/asm/prom.h	/^	int vector;		\/* This is foobar, what does it do? *\/$/;"	m	struct:linux_prom_irqs	typeref:typename:int
vector	arch/x86/lib/bios.h	/^	uint32_t vector;$/;"	m	struct:eregs	typeref:typename:uint32_t
vector	drivers/tpm/tpm_tis_lpc.c	/^	u8 vector;$/;"	m	struct:tpm_locality	typeref:typename:u8	file:
vector02_0F	arch/m68k/cpu/mcf5227x/start.S	/^vector02_0F:$/;"	l
vector02_0F	arch/m68k/cpu/mcf523x/start.S	/^vector02_0F:$/;"	l
vector02_0F	arch/m68k/cpu/mcf532x/start.S	/^vector02_0F:$/;"	l
vector02_0F	arch/m68k/cpu/mcf5445x/start.S	/^vector02_0F:$/;"	l
vector02_0F	arch/m68k/cpu/mcf547x_8x/start.S	/^vector02_0F:$/;"	l
vector10_17	arch/m68k/cpu/mcf5227x/start.S	/^vector10_17:$/;"	l
vector10_17	arch/m68k/cpu/mcf523x/start.S	/^vector10_17:$/;"	l
vector10_17	arch/m68k/cpu/mcf532x/start.S	/^vector10_17:$/;"	l
vector10_17	arch/m68k/cpu/mcf5445x/start.S	/^vector10_17:$/;"	l
vector10_17	arch/m68k/cpu/mcf547x_8x/start.S	/^vector10_17:$/;"	l
vector128	arch/m68k/include/asm/types.h	/^} __attribute__((aligned(16))) vector128;$/;"	t	typeref:struct:__anon1a5fff550108
vector128	arch/powerpc/include/asm/types.h	/^} __attribute__((aligned(16))) vector128;$/;"	t	typeref:struct:__anonca529caf0108
vector128	arch/sparc/include/asm/types.h	/^} __attribute__((aligned(16))) vector128;$/;"	t	typeref:struct:__anon880b0a880108
vector128_191	arch/m68k/cpu/mcf5227x/start.S	/^vector128_191:$/;"	l
vector128_191	arch/m68k/cpu/mcf523x/start.S	/^vector128_191:$/;"	l
vector128_191	arch/m68k/cpu/mcf532x/start.S	/^vector128_191:$/;"	l
vector128_191	arch/m68k/cpu/mcf5445x/start.S	/^vector128_191:$/;"	l
vector128_191	arch/m68k/cpu/mcf547x_8x/start.S	/^vector128_191:$/;"	l
vector18_1F	arch/m68k/cpu/mcf5227x/start.S	/^vector18_1F:$/;"	l
vector18_1F	arch/m68k/cpu/mcf523x/start.S	/^vector18_1F:$/;"	l
vector18_1F	arch/m68k/cpu/mcf532x/start.S	/^vector18_1F:$/;"	l
vector18_1F	arch/m68k/cpu/mcf5445x/start.S	/^vector18_1F:$/;"	l
vector18_1F	arch/m68k/cpu/mcf547x_8x/start.S	/^vector18_1F:$/;"	l
vector192_255	arch/m68k/cpu/mcf5227x/start.S	/^vector192_255:$/;"	l
vector192_255	arch/m68k/cpu/mcf523x/start.S	/^vector192_255:$/;"	l
vector192_255	arch/m68k/cpu/mcf532x/start.S	/^vector192_255:$/;"	l
vector192_255	arch/m68k/cpu/mcf5445x/start.S	/^vector192_255:$/;"	l
vector192_255	arch/m68k/cpu/mcf547x_8x/start.S	/^vector192_255:$/;"	l
vector20_2F	arch/m68k/cpu/mcf5227x/start.S	/^vector20_2F:$/;"	l
vector20_2F	arch/m68k/cpu/mcf523x/start.S	/^vector20_2F:$/;"	l
vector20_2F	arch/m68k/cpu/mcf532x/start.S	/^vector20_2F:$/;"	l
vector20_2F	arch/m68k/cpu/mcf5445x/start.S	/^vector20_2F:$/;"	l
vector20_2F	arch/m68k/cpu/mcf547x_8x/start.S	/^vector20_2F:$/;"	l
vector30_3F	arch/m68k/cpu/mcf5227x/start.S	/^vector30_3F:$/;"	l
vector30_3F	arch/m68k/cpu/mcf523x/start.S	/^vector30_3F:$/;"	l
vector30_3F	arch/m68k/cpu/mcf532x/start.S	/^vector30_3F:$/;"	l
vector30_3F	arch/m68k/cpu/mcf5445x/start.S	/^vector30_3F:$/;"	l
vector30_3F	arch/m68k/cpu/mcf547x_8x/start.S	/^vector30_3F:$/;"	l
vector64_127	arch/m68k/cpu/mcf5227x/start.S	/^vector64_127:$/;"	l
vector64_127	arch/m68k/cpu/mcf523x/start.S	/^vector64_127:$/;"	l
vector64_127	arch/m68k/cpu/mcf532x/start.S	/^vector64_127:$/;"	l
vector64_127	arch/m68k/cpu/mcf5445x/start.S	/^vector64_127:$/;"	l
vector64_127	arch/m68k/cpu/mcf547x_8x/start.S	/^vector64_127:$/;"	l
vectors	arch/arm/cpu/armv8/exceptions.S	/^vectors:$/;"	l
ven_dev	arch/sparc/cpu/leon3/memcfg.h	/^	unsigned int	ven_dev;	\/* 0x04. Device and Vendor *\/$/;"	m	struct:grlib_mctrl_handler	typeref:typename:unsigned int
venbootacktout	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venbootacktout;	\/* _VENDOR_BOOT_ACK_TIMEOUT, 114h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
venbootctl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venbootctl;	\/* _VENDOR_BOOT_CNTRL_0,     110h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
venbootdattout	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venbootdattout;	\/* _VENDOR_BOOT_DAT_TIMEOUT, 118h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
venc_config_std_tv	board/ti/beagle/beagle.h	/^static const struct venc_regs venc_config_std_tv = {$/;"	v	typeref:typename:const struct venc_regs
venc_regs	arch/arm/include/asm/arch-omap3/dss.h	/^struct venc_regs {$/;"	s
venceatactl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venceatactl;	\/* _VENDOR_CEATA_CNTRL_0,    10Ch *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
venclkctl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venclkctl;	\/* _VENDOR_CLOCK_CNTRL_0,    100h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
vend_dev	drivers/tpm/tpm_tis.h	/^	u32 vend_dev;$/;"	m	struct:tpm_chip	typeref:typename:u32
vendebouncecnt	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	vendebouncecnt;	\/* _VENDOR_DEBOUNCE_COUNT_0, 11Ch *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
vendor	arch/x86/cpu/cpu.c	/^	int vendor;$/;"	m	struct:__anonbde166970108	typeref:typename:int	file:
vendor	arch/x86/cpu/cpu.c	/^	unsigned vendor;$/;"	m	struct:cpu_device_id	typeref:typename:unsigned	file:
vendor	board/gateworks/gw_ventana/gw_ventana.c	/^	unsigned short vendor;$/;"	m	struct:pci_dev	typeref:typename:unsigned short	file:
vendor	board/gdsys/p1022/controlcenterd-id.c	/^static const uint8_t vendor[] = "Guntermann & Drunck";$/;"	v	typeref:typename:const uint8_t[]	file:
vendor	drivers/ddr/marvell/axp/ddr3_spd.c	/^	u32 vendor;$/;"	m	struct:dimm_info	typeref:typename:u32	file:
vendor	drivers/usb/emul/sandbox_flash.c	/^	char vendor[8];$/;"	m	struct:scsi_inquiry_resp	typeref:typename:char[8]	file:
vendor	drivers/usb/eth/asix.c	/^	unsigned short vendor;$/;"	m	struct:asix_dongle	typeref:typename:unsigned short	file:
vendor	drivers/usb/eth/asix88179.c	/^	unsigned short vendor;$/;"	m	struct:asix_dongle	typeref:typename:unsigned short	file:
vendor	drivers/usb/eth/mcs7830.c	/^	uint16_t vendor;$/;"	m	struct:mcs7830_dongle	typeref:typename:uint16_t	file:
vendor	drivers/usb/eth/r8152.c	/^	unsigned short vendor;$/;"	m	struct:r8152_dongle	typeref:typename:unsigned short	file:
vendor	drivers/usb/eth/smsc95xx.c	/^	unsigned short vendor;$/;"	m	struct:smsc95xx_dongle	typeref:typename:unsigned short	file:
vendor	include/ambapp.h	/^	unsigned int vendor;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:unsigned int
vendor	include/ambapp.h	/^	unsigned int vendor;$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned int
vendor	include/blk.h	/^	char		vendor[40+1];	\/* IDE model, SCSI Vendor *\/$/;"	m	struct:blk_desc	typeref:typename:char[]
vendor	include/ec_commands.h	/^	char vendor[32];$/;"	m	struct:ec_response_get_chip_info	typeref:typename:char[32]
vendor	include/flash.h	/^	ushort	vendor;			\/* the primary vendor id		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ushort
vendor	include/fsl-mc/fsl_dprc.h	/^	uint16_t vendor;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint16_t
vendor	include/linux/mtd/nand.h	/^	u8 vendor[88];$/;"	m	struct:nand_onfi_params	typeref:typename:u8[88]
vendor	include/pci.h	/^	unsigned int vendor, device;		\/* Vendor and device ID or PCI_ANY_ID *\/$/;"	m	struct:pci_config_table	typeref:typename:unsigned int
vendor	include/pci.h	/^	unsigned int vendor, device;	\/* Vendor and device ID or PCI_ANY_ID *\/$/;"	m	struct:pci_device_id	typeref:typename:unsigned int
vendor	include/pci.h	/^	unsigned short vendor;$/;"	m	struct:pci_child_platdata	typeref:typename:unsigned short
vendor	include/pci_rom.h	/^	uint16_t vendor;$/;"	m	struct:pci_rom_data	typeref:typename:uint16_t
vendor	include/smbios.h	/^	u8 vendor;$/;"	m	struct:smbios_type0	typeref:typename:u8
vendor0	include/ata.h	/^	unsigned short	vendor0;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
vendor1	include/ata.h	/^	unsigned short	vendor1;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
vendor2	include/ata.h	/^	unsigned short	vendor2;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
vendor3	include/ata.h	/^	unsigned char	vendor3;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
vendor4	include/ata.h	/^	unsigned char	vendor4;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
vendor5	include/ata.h	/^	unsigned char	vendor5;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
vendor6	include/ata.h	/^	unsigned char	vendor6;	\/* vendor unique *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned char
vendorDescr	drivers/usb/gadget/rndis.h	/^	const char		*vendorDescr;$/;"	m	struct:rndis_params	typeref:typename:const char *
vendorID	drivers/usb/gadget/rndis.h	/^	u32			vendorID;$/;"	m	struct:rndis_params	typeref:typename:u32
vendor_device_id	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	uint32_t vendor_device_id;$/;"	m	struct:pch_azalia_verb_table_header	typeref:typename:uint32_t
vendor_id	cmd/ambapp.c	/^	unsigned int vendor_id;$/;"	m	struct:__anon3d6428ea0208	typeref:typename:unsigned int	file:
vendor_id	drivers/net/e1000.h	/^	uint16_t vendor_id;$/;"	m	struct:e1000_hw	typeref:typename:uint16_t
vendor_id_high	include/usb/ulpi.h	/^	u8	vendor_id_high;$/;"	m	struct:ulpi_regs	typeref:typename:u8
vendor_id_low	include/usb/ulpi.h	/^	u8	vendor_id_low;$/;"	m	struct:ulpi_regs	typeref:typename:u8
vendor_idx	arch/x86/include/asm/coreboot_tables.h	/^	u8 vendor_idx;$/;"	m	struct:cb_mainboard	typeref:typename:u8
vendor_info_frame	arch/arm/include/asm/arch-sunxi/display.h	/^	u8 vendor_info_frame[0x14];	\/* 0x240 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x14]
vendor_info_frame	arch/arm/include/asm/arch/display.h	/^	u8 vendor_info_frame[0x14];	\/* 0x240 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u8[0x14]
vendor_name	drivers/usb/gadget/f_mass_storage.c	/^	const char *vendor_name;		\/*  8 characters or less *\/$/;"	m	struct:fsg_common	typeref:typename:const char *	file:
vendor_name	drivers/usb/gadget/f_mass_storage.c	/^	const char *vendor_name;		\/*  8 characters or less *\/$/;"	m	struct:fsg_config	typeref:typename:const char *	file:
vendor_name_ptr	include/vbe.h	/^	u32 vendor_name_ptr;$/;"	m	struct:vbe_info	typeref:typename:u32
vendor_req	include/linux/usb/musb.h	/^	unsigned	vendor_req:1 __deprecated; \/* vendor registers required *\/$/;"	m	struct:musb_hdrc_config	typeref:typename:unsigned
vendor_rev_num	include/linux/mtd/nand.h	/^	__le16 vendor_rev_num;$/;"	m	struct:nand_jedec_params	typeref:typename:__le16
vendor_revision	include/linux/mtd/nand.h	/^	__le16 vendor_revision;$/;"	m	struct:nand_onfi_params	typeref:typename:__le16
vendors	cmd/ambapp.c	/^static ambapp_vendor_devnames vendors[] = {$/;"	v	typeref:typename:ambapp_vendor_devnames[]	file:
vendorspec	drivers/mmc/fsl_esdhc.c	/^	uint    vendorspec;$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
vendorspec2	drivers/mmc/fsl_esdhc.c	/^	uint    vendorspec2;$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
venice2_drvgrps	board/nvidia/venice2/pinmux-config-venice2.h	/^static const struct pmux_drvgrp_config venice2_drvgrps[] = {$/;"	v	typeref:typename:const struct pmux_drvgrp_config[]
venice2_gpio_inits	board/nvidia/venice2/pinmux-config-venice2.h	/^static const struct tegra_gpio_config venice2_gpio_inits[] = {$/;"	v	typeref:typename:const struct tegra_gpio_config[]
venice2_pingrps	board/nvidia/venice2/pinmux-config-venice2.h	/^static const struct pmux_pingrp_config venice2_pingrps[] = {$/;"	v	typeref:typename:const struct pmux_pingrp_config[]
venmiscctl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venmiscctl;	\/* _VENDOR_MISC_CNTRL_0,     120h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
venspictl	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venspictl;	\/* _VENDOR_SPI_CNTRL_0,      104h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
venspiintsts	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned int	venspiintsts;	\/* _VENDOR_SPI_INT_STATUS_0, 108h *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned int
ventana	board/gateworks/gw_ventana/common.h	/^struct ventana {$/;"	s
ventana_board_info	board/gateworks/gw_ventana/ventana_eeprom.h	/^struct ventana_board_info {$/;"	s
ventana_eeprom_config	board/gateworks/gw_ventana/ventana_eeprom.h	/^struct ventana_eeprom_config {$/;"	s
ventana_info	board/gateworks/gw_ventana/gw_ventana.c	/^struct ventana_board_info ventana_info;$/;"	v	typeref:struct:ventana_board_info
ventana_mxc_serial_plat	board/gateworks/gw_ventana/gw_ventana.c	/^static struct mxc_serial_platdata ventana_mxc_serial_plat = {$/;"	v	typeref:struct:mxc_serial_platdata	file:
ver	arch/arc/lib/cache.c	/^			unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;$/;"	m	struct:read_decode_cache_bcr::__anon3b450cc2060a::__anon3b450cc20708	typeref:typename:unsigned int:8	file:
ver	arch/arc/lib/cache.c	/^			unsigned int pad:24, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2030a::__anon3b450cc20408	typeref:typename:unsigned int:8	file:
ver	arch/arc/lib/cache.c	/^			unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2050a::bcr_clust_cfg	typeref:typename:unsigned int:8	file:
ver	arch/m68k/include/asm/immap_547x_8x.h	/^	u32 ver;		\/* 0x244 *\/$/;"	m	struct:xlb_arb	typeref:typename:u32
ver	arch/mips/include/asm/global_data.h	/^	unsigned long ver;$/;"	m	struct:arch_global_data	typeref:typename:unsigned long
ver	board/freescale/common/pixis.h	/^	u8 ver;	\/* also called arch *\/$/;"	m	struct:pixis	typeref:typename:u8
ver	board/freescale/common/pixis.h	/^	u8 ver;$/;"	m	struct:pixis	typeref:typename:u8
ver	include/ambapp.h	/^	unsigned char ver;$/;"	m	struct:__anonf7dda3ff0108	typeref:typename:unsigned char
ver	include/ambapp.h	/^	unsigned char ver;$/;"	m	struct:__anonf7dda3ff0208	typeref:typename:unsigned char
ver_0203	arch/sparc/lib/bootm.c	/^		} ver_0203;$/;"	m	union:__anon0049f2d20108::__anon0049f2d2020a	typeref:struct:__anon0049f2d20108::__anon0049f2d2020a::__anon0049f2d20308	file:
ver_major	include/fsl-mc/fsl_dprc.h	/^	uint16_t ver_major;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint16_t
ver_minor	include/fsl-mc/fsl_dprc.h	/^	uint16_t ver_minor;$/;"	m	struct:dprc_obj_desc	typeref:typename:uint16_t
verb_table_data	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	const uint32_t *verb_table_data;$/;"	m	struct:pch_azalia_verb_table	typeref:typename:const uint32_t *
verb_table_data13	arch/x86/cpu/baytrail/fsp_configs.c	/^static const uint32_t verb_table_data13[] = {$/;"	v	typeref:typename:const uint32_t[]	file:
verb_table_header	arch/x86/include/asm/arch-baytrail/fsp/azalia.h	/^	struct pch_azalia_verb_table_header verb_table_header;$/;"	m	struct:pch_azalia_verb_table	typeref:struct:pch_azalia_verb_table_header
verbose	lib/zlib/zutil.c	/^#define verbose /;"	d	file:
verbose	tools/gdb/gdbcont.c	/^int verbose = 0;$/;"	v	typeref:typename:int
verbose	tools/gdb/gdbsend.c	/^int verbose = 0, docont = 0;$/;"	v	typeref:typename:int
verbose	tools/proftool.c	/^int verbose;	\/* Verbosity level 0=none, 1=warn, 2=notice, 3=info, 4=debug *\/$/;"	v	typeref:typename:int
verbosity	lib/bzip2/bzlib_private.h	/^      Int32    verbosity;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
verbosity	lib/bzip2/bzlib_private.h	/^      Int32    verbosity;$/;"	m	struct:__anon93cbeec40208	typeref:typename:Int32
verifier	net/nfs.h	/^			uint32_t verifier;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780308	typeref:typename:uint32_t
verify	include/image.h	/^	int		verify;		\/* getenv("verify")[0] != 'n' *\/$/;"	m	struct:bootm_headers	typeref:typename:int
verify	include/image.h	/^	int (*verify)(struct image_sign_info *info,$/;"	m	struct:image_sig_algo	typeref:typename:int (*)(struct image_sign_info * info,const struct image_region region[],int region_count,uint8_t * sig,uint sig_len)
verify_88e1518	board/gdsys/common/phy.c	/^struct mii_setupcmd verify_88e1518[] = {$/;"	v	typeref:struct:mii_setupcmd[]
verify_bbt_descr	drivers/mtd/nand/nand_bbt.c	/^static void verify_bbt_descr(struct mtd_info *mtd, struct nand_bbt_descr *bd)$/;"	f	typeref:typename:void	file:
verify_buffer	tools/socfpgaimage.c	/^static int verify_buffer(const uint8_t *buf)$/;"	f	typeref:typename:int	file:
verify_gbit_phy	board/gdsys/405ex/io64.c	/^int verify_gbit_phy(char *bus, unsigned char addr)$/;"	f	typeref:typename:int
verify_header	tools/imagetool.h	/^	int (*verify_header) (unsigned char *, int, struct image_tool_params *);$/;"	m	struct:image_type_params	typeref:typename:int (*)(unsigned char *,int,struct image_tool_params *)
verify_header	tools/socfpgaimage.c	/^static int verify_header(const uint8_t *buf)$/;"	f	typeref:typename:int	file:
verify_mkvol_req	cmd/ubi.c	/^static int verify_mkvol_req(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
verify_old_ccsr	arch/powerpc/cpu/mpc85xx/start.S	/^verify_old_ccsr:$/;"	l
verify_phyaddr	drivers/net/eepro100.c	/^static struct eth_device* verify_phyaddr (const char *devname,$/;"	f	typeref:struct:eth_device *	file:
verify_program	board/gdsys/p1022/controlcenterd-id.c	/^static int verify_program(struct key_program *prg)$/;"	f	typeref:typename:int	file:
verify_response_auth	lib/tpm.c	/^static uint32_t verify_response_auth(uint32_t command_code,$/;"	f	typeref:typename:uint32_t	file:
veroffs	include/linux/mtd/bbm.h	/^	int veroffs;$/;"	m	struct:nand_bbt_descr	typeref:typename:int
vers	disk/part_iso.h	/^	unsigned char vers;					\/* Version *\/$/;"	m	struct:iso_boot_rec	typeref:typename:unsigned char
vers	disk/part_iso.h	/^	unsigned char vers;					\/* Version *\/$/;"	m	struct:iso_part_rec	typeref:typename:unsigned char
vers	disk/part_iso.h	/^	unsigned char vers;					\/* Version *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char
vers	disk/part_iso.h	/^	unsigned char vers;					\/* Version *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char
vers	net/nfs.h	/^			uint32_t vers;$/;"	m	struct:rpc_t::__anon8c947878010a::__anon8c9478780208	typeref:typename:uint32_t
version	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32     version;$/;"	m	struct:ocotp_regs	typeref:typename:u32
version	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	version[4];		\/* Version *\/$/;"	m	struct:dbg_monitor_regs	typeref:typename:u32[4]
version	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32 version;$/;"	m	struct:ocotp_regs	typeref:typename:u32
version	arch/arm/include/asm/arch-spear/spr_defs.h	/^	uchar version[32];$/;"	m	struct:chip_data	typeref:typename:uchar[32]
version	arch/arm/include/asm/arch-stv0991/stv0991_creg.h	/^	u32 version;		\/* offset 0x0 *\/$/;"	m	struct:stv0991_creg	typeref:typename:u32
version	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u32 version;$/;"	m	struct:ocotp_regs	typeref:typename:u32
version	arch/arm/include/asm/arch-zynqmp/hardware.h	/^	u32 version;$/;"	m	struct:csu_regs	typeref:typename:u32
version	arch/arm/include/asm/ti-common/keystone_net.h	/^	u32 version;$/;"	m	struct:mdio_regs	typeref:typename:u32
version	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 version;		\/* 0xfc: IP version *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
version	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	uint version;		\/* MMC Controller version *\/$/;"	m	struct:davinci_mmc	typeref:typename:uint
version	arch/arm/mach-exynos/include/mach/adc.h	/^	unsigned int version;$/;"	m	struct:exynos_adc_v2	typeref:typename:unsigned int
version	arch/arm/mach-exynos/include/mach/spl.h	/^	u32		version;	\/* Version number *\/$/;"	m	struct:spl_machine_param	typeref:typename:u32
version	arch/x86/cpu/broadwell/refcode.c	/^	uint8_t version;$/;"	m	struct:rmodule_header	typeref:typename:uint8_t	file:
version	arch/x86/include/asm/acpi_table.h	/^	u8 version;			\/* Version 2 *\/$/;"	m	struct:acpi_facs	typeref:typename:u8
version	arch/x86/include/asm/arch-coreboot/sysinfo.h	/^	char *version;$/;"	m	struct:sysinfo_t	typeref:typename:char *
version	arch/x86/include/asm/bootparam.h	/^	__u16	version;$/;"	m	struct:setup_header	typeref:typename:__u16
version	arch/x86/include/asm/pirq_routing.h	/^	u16 version;		\/* PIRQ_VERSION *\/$/;"	m	struct:irq_routing_table	typeref:typename:u16
version	board/amcc/luan/epld.h	/^    unsigned char  version;		\/* EPLD version *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
version	board/birdland/bav335x/board.h	/^	char version[4];		\/* 0B20 - Rev.B2 *\/$/;"	m	struct:board_eeconfig	typeref:typename:char[4]
version	board/bosch/shc/board.h	/^	u16  version;$/;"	m	struct:shc_eeprom	typeref:typename:u16
version	board/corscience/tricorder/tricorder-eeprom.c	/^		uint16_t version;$/;"	m	struct:handle_eeprom_v0::tricorder_eeprom_v0	typeref:typename:uint16_t	file:
version	board/corscience/tricorder/tricorder-eeprom.h	/^	uint16_t version;$/;"	m	struct:tricorder_eeprom	typeref:typename:uint16_t
version	board/esd/pmc405de/pmc405de.c	/^	u8 version;$/;"	m	struct:pmc405de_cpld	typeref:typename:u8	file:
version	board/freescale/common/sys_eeprom.c	/^	u32 version;      \/* 0x1c - 0x1f NXID Version *\/$/;"	m	struct:eeprom	typeref:typename:u32	file:
version	board/ifm/ac14xx/ac14xx.c	/^	u8	version[3];	\/** structure version *\/$/;"	m	struct:eeprom_layout	typeref:typename:u8[3]	file:
version	board/kosagi/novena/novena.c	/^	uint8_t		version;$/;"	m	struct:novena_eeprom_data	typeref:typename:uint8_t	file:
version	board/nokia/rx51/tag_omap.h	/^		struct omap_version_config version;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_version_config
version	board/nokia/rx51/tag_omap.h	/^	char version[12];$/;"	m	struct:omap_version_config	typeref:typename:char[12]
version	board/siemens/common/factoryset.h	/^	int version;$/;"	m	struct:factorysetcontainer	typeref:typename:int
version	board/siemens/draco/board.h	/^	unsigned int version;			\/* 0x56312e35 *\/$/;"	m	struct:ddr3_data	typeref:typename:unsigned int
version	board/ti/common/board_detect.h	/^	char version[TI_EEPROM_HDR_REV_LEN + 1];$/;"	m	struct:ti_common_eeprom	typeref:typename:char[]
version	board/ti/common/board_detect.h	/^	char version[TI_EEPROM_HDR_REV_LEN];$/;"	m	struct:ti_am_eeprom	typeref:typename:char[]
version	board/varisys/common/sys_eeprom.c	/^	u32 version;      \/* 0x1c - 0x1f NXID Version *\/$/;"	m	struct:eeprom	typeref:typename:u32	file:
version	board/vscom/baltos/board.h	/^	char version[4];$/;"	m	struct:am335x_baseboard_id	typeref:typename:char[4]
version	cmd/armflash.c	/^	u32 version;$/;"	m	struct:afs_image	typeref:typename:u32	file:
version	common/bootstage.c	/^	uint32_t version;	\/* BOOTSTAGE_VERSION *\/$/;"	m	struct:bootstage_hdr	typeref:typename:uint32_t	file:
version	drivers/mmc/tegra_mmc.c	/^	unsigned int version;	\/* SDHCI spec. version *\/$/;"	m	struct:tegra_mmc_priv	typeref:typename:unsigned int	file:
version	drivers/mmc/uniphier-sd.c	/^	unsigned int version;$/;"	m	struct:uniphier_sd_priv	typeref:typename:unsigned int	file:
version	drivers/mtd/nand/atmel_nand_ecc.h	/^	u32 version;$/;"	m	struct:pmecc_errloc_regs	typeref:typename:u32
version	drivers/mtd/ubi/ubi-media.h	/^	__u8    version;$/;"	m	struct:ubi_ec_hdr	typeref:typename:__u8
version	drivers/mtd/ubi/ubi-media.h	/^	__u8    version;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8
version	drivers/mtd/ubi/ubi-media.h	/^	__u8 version;$/;"	m	struct:ubi_fm_sb	typeref:typename:__u8
version	drivers/net/calxedaxgmac.c	/^	u32 version;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
version	drivers/net/cpsw.c	/^	u32	version;$/;"	m	struct:cpsw_mdio_regs	typeref:typename:u32	file:
version	drivers/net/designware.h	/^	u32 version;		\/* 0x20 *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
version	drivers/net/rtl8169.c	/^	u8 version;		\/* depend on RTL8169 docs *\/$/;"	m	struct:__anon571e08a40108	typeref:typename:u8	file:
version	drivers/net/smc91111.c	/^static const char version[] =$/;"	v	typeref:typename:const char[]	file:
version	drivers/usb/emul/sandbox_flash.c	/^	u8 version;$/;"	m	struct:scsi_inquiry_resp	typeref:typename:u8	file:
version	drivers/usb/eth/r8152.c	/^	unsigned short version;$/;"	m	struct:r8152_version	typeref:typename:unsigned short	file:
version	drivers/usb/eth/r8152.h	/^	u8 version;$/;"	m	struct:r8152	typeref:typename:u8
version	drivers/usb/musb/davinci.h	/^	u32	version;$/;"	m	struct:davinci_usb_regs	typeref:typename:u32
version	fs/jffs2/jffs2_nand_private.h	/^	u32 version;$/;"	m	struct:b_dirent	typeref:typename:u32
version	fs/jffs2/jffs2_nand_private.h	/^	u32 version;$/;"	m	struct:b_inode	typeref:typename:u32
version	fs/jffs2/summary.h	/^	__u32 version;	\/* dirent version *\/$/;"	m	struct:jffs2_sum_dirent_flash	typeref:typename:__u32
version	fs/jffs2/summary.h	/^	__u32 version;	\/* dirent version *\/$/;"	m	struct:jffs2_sum_dirent_mem	typeref:typename:__u32
version	fs/jffs2/summary.h	/^	__u32 version;	\/* inode version *\/$/;"	m	struct:jffs2_sum_inode_flash	typeref:typename:__u32
version	fs/jffs2/summary.h	/^	__u32 version;	\/* inode version *\/$/;"	m	struct:jffs2_sum_inode_mem	typeref:typename:__u32
version	fs/jffs2/summary.h	/^	__u32 version;	\/* version number *\/$/;"	m	struct:jffs2_sum_xattr_flash	typeref:typename:__u32
version	fs/jffs2/summary.h	/^	__u32 version;$/;"	m	struct:jffs2_sum_xattr_mem	typeref:typename:__u32
version	fs/reiserfs/reiserfs_private.h	/^  __u16 version;$/;"	m	struct:fsys_reiser_info	typeref:typename:__u16
version	fs/yaffs2/yaffs_guts.h	/^	u32 version;$/;"	m	struct:yaffs_checkpt_validity	typeref:typename:u32
version	fs/yaffs2/yaffs_summary.c	/^	unsigned version;	\/* Must match current version *\/$/;"	m	struct:yaffs_summary_header	typeref:typename:unsigned	file:
version	include/api_public.h	/^	uint16_t	version;		\/* API version *\/$/;"	m	struct:api_signature	typeref:typename:uint16_t
version	include/atmel_mci.h	/^	u32	version;$/;"	m	struct:atmel_mci	typeref:typename:u32
version	include/cbfs.h	/^	u32 version;$/;"	m	struct:cbfs_header	typeref:typename:u32
version	include/cpsw.h	/^	u8	version;$/;"	m	struct:cpsw_platform_data	typeref:typename:u8
version	include/dwmmc.h	/^	unsigned int version;$/;"	m	struct:dwmci_host	typeref:typename:unsigned int
version	include/ec_commands.h	/^	uint32_t version;$/;"	m	struct:ec_response_proto_version	typeref:typename:uint32_t
version	include/edid.h	/^	unsigned char version;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
version	include/efi.h	/^	u32 version;$/;"	m	struct:efi_entry_memmap	typeref:typename:u32
version	include/efi.h	/^	u32 version;$/;"	m	struct:efi_info_hdr	typeref:typename:u32
version	include/efi_api.h	/^	u32 version;$/;"	m	struct:efi_gop_mode_info	typeref:typename:u32
version	include/ext_common.h	/^	__le32 version;$/;"	m	struct:ext2_inode	typeref:typename:__le32
version	include/faraday/ftsdc010.h	/^	unsigned int version;		\/* SDHCI spec. version *\/$/;"	m	struct:mmc_host	typeref:typename:unsigned int
version	include/fat.h	/^	__u8	version[2];	\/* Filesystem version *\/$/;"	m	struct:boot_sector	typeref:typename:__u8[2]
version	include/fdt.h	/^	fdt32_t version;		 \/* format version *\/$/;"	m	struct:fdt_header	typeref:typename:fdt32_t
version	include/fsl-mc/fsl_dpbp.h	/^	} version;$/;"	m	struct:dpbp_attr	typeref:struct:dpbp_attr::__anonf56882c90108
version	include/fsl-mc/fsl_dpio.h	/^	} version;$/;"	m	struct:dpio_attr	typeref:struct:dpio_attr::__anonf56c552f0108
version	include/fsl-mc/fsl_dpmac.h	/^	} version;$/;"	m	struct:dpmac_attr	typeref:struct:dpmac_attr::__anona3388a280108
version	include/fsl-mc/fsl_dpni.h	/^	} version;$/;"	m	struct:dpni_attr	typeref:struct:dpni_attr::__anonf56ef98e0508
version	include/fsl-mc/fsl_dprc.h	/^	} version;$/;"	m	struct:dprc_attributes	typeref:struct:dprc_attributes::__anonf571118c0108
version	include/fsl_qe.h	/^		u8 version;	\/* Version of this layout. First ver is '1' *\/$/;"	m	struct:qe_firmware::qe_header	typeref:typename:u8
version	include/gdsys_fpga.h	/^	u16 version;$/;"	m	struct:ihs_osd	typeref:typename:u16
version	include/jffs2/jffs2.h	/^	__u32 version;    \/* Version number.  *\/$/;"	m	struct:jffs2_raw_inode	typeref:typename:__u32
version	include/jffs2/jffs2.h	/^	__u32 version;$/;"	m	struct:jffs2_raw_dirent	typeref:typename:__u32
version	include/linux/apm_bios.h	/^	__u16	version;$/;"	m	struct:apm_bios_info	typeref:typename:__u16
version	include/linux/edd.h	/^	__u8 version;$/;"	m	struct:edd_info	typeref:typename:__u8
version	include/linux/ethtool.h	/^	__u32	version; \/* driver-specific, indicates different chips\/revs *\/$/;"	m	struct:ethtool_regs	typeref:typename:__u32
version	include/linux/ethtool.h	/^	char	version[32];	\/* driver version string *\/$/;"	m	struct:ethtool_drvinfo	typeref:typename:char[32]
version	include/linux/fb.h	/^	__u8  version;			\/* EDID version... *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u8
version	include/linux/mtd/bbm.h	/^	uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS];$/;"	m	struct:nand_bbt_descr	typeref:typename:uint8_t[]
version	include/mmc.h	/^	uint version;$/;"	m	struct:mmc	typeref:typename:uint
version	include/mpc5xxx.h	/^	volatile u32 version;		\/* XLB + 0x44 *\/$/;"	m	struct:mpc5xxx_xlb	typeref:typename:volatile u32
version	include/power/battery.h	/^	unsigned int version;$/;"	m	struct:battery	typeref:typename:unsigned int
version	include/sdhci.h	/^	unsigned int version;$/;"	m	struct:sdhci_host	typeref:typename:unsigned int
version	include/smbios.h	/^	u8 version;$/;"	m	struct:smbios_type1	typeref:typename:u8
version	include/smbios.h	/^	u8 version;$/;"	m	struct:smbios_type2	typeref:typename:u8
version	include/smbios.h	/^	u8 version;$/;"	m	struct:smbios_type3	typeref:typename:u8
version	include/vbe.h	/^	u16 version;$/;"	m	struct:vbe_info	typeref:typename:u16
version	lib/lz4_wrapper.c	/^			u8 version:2;$/;"	m	struct:lz4_frame_header::__anonc9492e16010a::__anonc9492e160208	typeref:typename:u8:2	file:
version	tools/imximage.h	/^	uint8_t version;$/;"	m	struct:__anon504a956c0808	typeref:typename:uint8_t
version	tools/kwbimage.c	/^		unsigned int version;$/;"	m	union:image_cfg_element::__anon9793d65d020a	typeref:typename:unsigned int	file:
version	tools/kwbimage.h	/^	uint8_t  version;               \/* 8 *\/$/;"	m	struct:main_hdr_v1	typeref:typename:uint8_t
version	tools/mxsboot.c	/^	uint32_t		version;$/;"	m	struct:mx28_nand_dbbt	typeref:typename:uint32_t	file:
version	tools/mxsboot.c	/^	uint32_t		version;$/;"	m	struct:mx28_nand_fcb	typeref:typename:uint32_t	file:
version	tools/omapimage.h	/^	uint8_t version;$/;"	m	struct:ch_settings	typeref:typename:uint8_t
version	tools/socfpgaimage.c	/^	uint8_t  version;$/;"	m	struct:socfpga_header	typeref:typename:uint8_t	file:
version2	drivers/mmc/arm_pl180_mmci.h	/^	int version2;$/;"	m	struct:pl180_mmc_host	typeref:typename:int
version_h	Makefile	/^version_h := include\/generated\/version_autogenerated.h$/;"	m
version_id	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 version_id;			\/* 0x000 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
version_id	arch/arm/include/asm/arch/display.h	/^	u32 version_id;			\/* 0x000 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
version_id	include/linux/mtd/onenand.h	/^	unsigned int version_id;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
version_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 version_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
version_info	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	version_info;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
version_major	board/ti/common/board_detect.h	/^	u16 version_major;$/;"	m	struct:dra7_eeprom	typeref:typename:u16
version_mask	include/ec_commands.h	/^	uint32_t version_mask;$/;"	m	struct:ec_response_get_cmd_versions	typeref:typename:uint32_t
version_minor	board/ti/common/board_detect.h	/^	u16 version_minor;$/;"	m	struct:dra7_eeprom	typeref:typename:u16
version_string	arch/m68k/cpu/mcf5227x/start.S	/^version_string:$/;"	l
version_string	arch/m68k/cpu/mcf523x/start.S	/^version_string:$/;"	l
version_string	arch/m68k/cpu/mcf52x2/start.S	/^version_string:$/;"	l
version_string	arch/m68k/cpu/mcf530x/start.S	/^version_string:$/;"	l
version_string	arch/m68k/cpu/mcf532x/start.S	/^version_string:$/;"	l
version_string	arch/m68k/cpu/mcf5445x/start.S	/^version_string:$/;"	l
version_string	arch/m68k/cpu/mcf547x_8x/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc512x/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc5xx/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc5xxx/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc8260/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc83xx/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc85xx/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc86xx/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/mpc8xx/start.S	/^version_string:$/;"	l
version_string	arch/powerpc/cpu/ppc4xx/start.S	/^version_string:$/;"	l
version_string	cmd/version.c	/^const char __weak version_string[] = U_BOOT_VERSION_STRING;$/;"	v	typeref:typename:const char __weak[]
version_string_ro	include/ec_commands.h	/^	char version_string_ro[32];$/;"	m	struct:ec_response_get_version	typeref:typename:char[32]
version_string_rw	include/ec_commands.h	/^	char version_string_rw[32];$/;"	m	struct:ec_response_get_version	typeref:typename:char[32]
versionr	drivers/block/dwc_ahsata.c	/^	u32 versionr;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
versionr	drivers/block/sata_dwc.c	/^	u32 versionr;$/;"	m	struct:sata_dwc_regs	typeref:typename:u32	file:
versions	board/gdsys/p1022/controlcenterd.c	/^	u32 versions;		\/* 0x0004 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u32	file:
versions	include/gdsys_fpga.h	/^	u16 versions;		\/* 0x0002 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16
vert	arch/arm/include/asm/arch-sunxi/display2.h	/^	u32 vert[2];			\/* f8 *\/$/;"	m	struct:de_vi	typeref:typename:u32[2]
vert	arch/arm/include/asm/arch/display2.h	/^	u32 vert[2];			\/* f8 *\/$/;"	m	struct:de_vi	typeref:typename:u32[2]
vertical_active	include/edid.h	/^	unsigned char vertical_active;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
vertical_active_blanking_hi	include/edid.h	/^	unsigned char vertical_active_blanking_hi;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
vertical_blanking	include/edid.h	/^	unsigned char vertical_blanking;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
vertical_max	include/edid.h	/^			unsigned char vertical_max;$/;"	m	struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208	typeref:typename:unsigned char
vertical_min	include/edid.h	/^			unsigned char vertical_min;$/;"	m	struct:edid_monitor_descriptor::__anon4a0dc044010a::__anon4a0dc0440208	typeref:typename:unsigned char
verylongevent	drivers/qe/uec.h	/^	u32   verylongevent;     \/* very long event *\/$/;"	m	struct:uec_rx_firmware_statistics_pram	typeref:typename:u32
vesa	include/vbe.h	/^		struct vesa_mode_info vesa;$/;"	m	union:vbe_mode_info::__anona659a46b010a	typeref:struct:vesa_mode_info
vesa_attributes	include/linux/screen_info.h	/^	__u16 vesa_attributes;	\/* 0x34 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
vesa_mode_info	include/vbe.h	/^struct __packed vesa_mode_info {$/;"	s
vesa_modes	drivers/video/videomodes.c	/^const struct ctfb_vesa_modes vesa_modes[VESA_MODES_COUNT] = {$/;"	v	typeref:typename:const struct ctfb_vesa_modes[]
vesa_video_ids	drivers/video/vesa.c	/^static const struct udevice_id vesa_video_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
vesa_video_probe	drivers/video/vesa.c	/^static int vesa_video_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vesa_video_supported	drivers/video/vesa.c	/^static struct pci_device_id vesa_video_supported[] = {$/;"	v	typeref:struct:pci_device_id[]	file:
vesanr	drivers/video/videomodes.h	/^	int vesanr;		\/* Vesa number as in LILO (VESA Nr + 0x200} *\/$/;"	m	struct:ctfb_vesa_modes	typeref:typename:int
vesapm_off	include/linux/screen_info.h	/^	__u16 vesapm_off;	\/* 0x30 *\/$/;"	m	struct:screen_info	typeref:typename:__u16
vesapm_seg	include/linux/screen_info.h	/^	__u16 vesapm_seg;	\/* 0x2e *\/$/;"	m	struct:screen_info	typeref:typename:__u16
vet_dest	include/net.h	/^	u8		vet_dest[6];	\/* Destination node		*\/$/;"	m	struct:vlan_ethernet_hdr	typeref:typename:u8[6]
vet_src	include/net.h	/^	u8		vet_src[6];	\/* Source node			*\/$/;"	m	struct:vlan_ethernet_hdr	typeref:typename:u8[6]
vet_tag	include/net.h	/^	u16		vet_tag;	\/* TAG of VLAN			*\/$/;"	m	struct:vlan_ethernet_hdr	typeref:typename:u16
vet_type	include/net.h	/^	u16		vet_type;	\/* protocol type		*\/$/;"	m	struct:vlan_ethernet_hdr	typeref:typename:u16
vet_vlan_type	include/net.h	/^	u16		vet_vlan_type;	\/* PROT_VLAN			*\/$/;"	m	struct:vlan_ethernet_hdr	typeref:typename:u16
vexpress64_mem_map	board/armltd/vexpress64/vexpress64.c	/^static struct mm_region vexpress64_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
vexpress64_pcie_init	board/armltd/vexpress64/pcie.c	/^void vexpress64_pcie_init(void)$/;"	f	typeref:typename:void
vexpress64_pcie_init	board/armltd/vexpress64/vexpress64.c	/^__weak void vexpress64_pcie_init(void)$/;"	f	typeref:typename:__weak void
vexpress_timer_init	board/armltd/vexpress/vexpress_common.c	/^static void vexpress_timer_init(void)$/;"	f	typeref:typename:void	file:
veyron_init	arch/arm/mach-rockchip/rk3288/sdram_rk3288.c	/^static int veyron_init(struct dram_info *priv)$/;"	f	typeref:typename:int	file:
vf610_nfc	drivers/mtd/nand/vf610_nfc.c	/^struct vf610_nfc {$/;"	s	file:
vf610_nfc_addr_cycle	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)$/;"	f	typeref:typename:void	file:
vf610_nfc_alt_buf	drivers/mtd/nand/vf610_nfc.c	/^enum vf610_nfc_alt_buf {$/;"	g	file:
vf610_nfc_clear	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_clear(struct mtd_info *mtd, uint reg, u32 bits)$/;"	f	typeref:typename:void	file:
vf610_nfc_clear_status	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_clear_status(void __iomem *regbase)$/;"	f	typeref:typename:void	file:
vf610_nfc_command	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_command(struct mtd_info *mtd, unsigned command,$/;"	f	typeref:typename:void	file:
vf610_nfc_config	drivers/mtd/nand/vf610_nfc.c	/^struct vf610_nfc_config {$/;"	s	file:
vf610_nfc_correct_data	drivers/mtd/nand/vf610_nfc.c	/^static inline int vf610_nfc_correct_data(struct mtd_info *mtd, uint8_t *dat,$/;"	f	typeref:typename:int	file:
vf610_nfc_dev_ready	drivers/mtd/nand/vf610_nfc.c	/^static int vf610_nfc_dev_ready(struct mtd_info *mtd)$/;"	f	typeref:typename:int	file:
vf610_nfc_done	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_done(struct mtd_info *mtd)$/;"	f	typeref:typename:void	file:
vf610_nfc_ecc	drivers/mtd/nand/vf610_nfc.c	/^static struct nand_ecclayout vf610_nfc_ecc = {$/;"	v	typeref:struct:nand_ecclayout	file:
vf610_nfc_ecc_mode	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_ecc_mode(struct mtd_info *mtd, int ecc_mode)$/;"	f	typeref:typename:void	file:
vf610_nfc_get_id	drivers/mtd/nand/vf610_nfc.c	/^static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col)$/;"	f	typeref:typename:u8	file:
vf610_nfc_get_status	drivers/mtd/nand/vf610_nfc.c	/^static u8 vf610_nfc_get_status(struct mtd_info *mtd)$/;"	f	typeref:typename:u8	file:
vf610_nfc_memcpy	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n)$/;"	f	typeref:typename:void	file:
vf610_nfc_nand_init	drivers/mtd/nand/vf610_nfc.c	/^static int vf610_nfc_nand_init(int devnum, void __iomem *addr)$/;"	f	typeref:typename:int	file:
vf610_nfc_read	drivers/mtd/nand/vf610_nfc.c	/^static inline u32 vf610_nfc_read(struct mtd_info *mtd, uint reg)$/;"	f	typeref:typename:u32	file:
vf610_nfc_read_buf	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)$/;"	f	typeref:typename:void	file:
vf610_nfc_read_byte	drivers/mtd/nand/vf610_nfc.c	/^static uint8_t vf610_nfc_read_byte(struct mtd_info *mtd)$/;"	f	typeref:typename:uint8_t	file:
vf610_nfc_read_page	drivers/mtd/nand/vf610_nfc.c	/^static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
vf610_nfc_read_word	drivers/mtd/nand/vf610_nfc.c	/^static u16 vf610_nfc_read_word(struct mtd_info *mtd)$/;"	f	typeref:typename:u16	file:
vf610_nfc_select_chip	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip)$/;"	f	typeref:typename:void	file:
vf610_nfc_send_command	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1,$/;"	f	typeref:typename:void	file:
vf610_nfc_send_commands	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1,$/;"	f	typeref:typename:void	file:
vf610_nfc_set	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_set(struct mtd_info *mtd, uint reg, u32 bits)$/;"	f	typeref:typename:void	file:
vf610_nfc_set_field	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg,$/;"	f	typeref:typename:void	file:
vf610_nfc_transfer_size	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size)$/;"	f	typeref:typename:void	file:
vf610_nfc_write	drivers/mtd/nand/vf610_nfc.c	/^static inline void vf610_nfc_write(struct mtd_info *mtd, uint reg, u32 val)$/;"	f	typeref:typename:void	file:
vf610_nfc_write_buf	drivers/mtd/nand/vf610_nfc.c	/^static void vf610_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf,$/;"	f	typeref:typename:void	file:
vf610_nfc_write_page	drivers/mtd/nand/vf610_nfc.c	/^static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
vf610twr_cr_settings	board/freescale/vf610twr/vf610twr.c	/^static struct ddrmc_cr_setting vf610twr_cr_settings[] = {$/;"	v	typeref:struct:ddrmc_cr_setting[]	file:
vf_ehci_ops	drivers/usb/host/ehci-vf.c	/^static const struct ehci_ops vf_ehci_ops = {$/;"	v	typeref:typename:const struct ehci_ops	file:
vf_init_after_reset	drivers/usb/host/ehci-vf.c	/^static int vf_init_after_reset(struct ehci_ctrl *dev)$/;"	f	typeref:typename:int	file:
vf_usb_bind	drivers/usb/host/ehci-vf.c	/^static int vf_usb_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vf_usb_ids	drivers/usb/host/ehci-vf.c	/^static const struct udevice_id vf_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
vf_usb_ofdata_to_platdata	drivers/usb/host/ehci-vf.c	/^static int vf_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vfat_enabled	fs/fat/fat.c	/^static const int vfat_enabled = 0;$/;"	v	typeref:typename:const int	file:
vfat_enabled	fs/fat/fat.c	/^static const int vfat_enabled = 1;$/;"	v	typeref:typename:const int	file:
vfifo_rd_en_ovrd	drivers/ddr/altera/sequencer.h	/^	u32	vfifo_rd_en_ovrd;$/;"	m	struct:socfpga_phy_mgr_cfg	typeref:typename:u32
vflag	tools/imagetool.h	/^	int vflag;$/;"	m	struct:image_tool_params	typeref:typename:int
vfloor	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t vfloor;$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
vfmax	include/linux/fb.h	/^	__u16 vfmax;			\/* vfreq upper limit (Hz) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
vfmin	include/linux/fb.h	/^	__u16 vfmin;			\/* vfreq lower limit (Hz) *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u16
vfp	drivers/video/am335x-fb.h	/^	unsigned int	vfp;		\/* Vertical front porch *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
vfp	drivers/video/da8xx-fb.h	/^	int		vfp;		\/* Vertical front porch *\/$/;"	m	struct:da8xx_panel	typeref:typename:int
vfp_cfg	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vfp_cfg;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vfp_sta	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vfp_sta;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vfree	include/linux/compat.h	/^static inline void vfree(const void *addr)$/;"	f	typeref:typename:void
vfront_porch	include/fdtdec.h	/^	struct timing_entry vfront_porch;	\/* ver. front porch *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
vfs_inode	fs/ubifs/ubifs.h	/^	struct inode vfs_inode;$/;"	m	struct:ubifs_inode	typeref:struct:inode
vfs_sb	fs/ubifs/ubifs.h	/^	struct super_block *vfs_sb;$/;"	m	struct:ubifs_info	typeref:struct:super_block *
vfsmount	fs/ubifs/ubifs.h	/^struct vfsmount {$/;"	s
vgaInfo	drivers/bios_emulator/include/biosemu.h	/^	BE_VGAInfo vgaInfo;$/;"	m	struct:__anon964d10140108	typeref:typename:BE_VGAInfo
vi	fs/ubifs/ubifs.h	/^	struct ubi_volume_info vi;$/;"	m	struct:ubifs_info	typeref:struct:ubi_volume_info
vi	include/linux/mtd/ubi.h	/^	struct ubi_volume_info vi;$/;"	m	struct:ubi_notification	typeref:struct:ubi_volume_info
viack	include/tsi148.h	/^	unsigned int viack[8];                \/* 0x204         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int[8]
vicfg1	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	vicfg1;		\/* 0xBC: APB_MISC_GP_VICFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vicfg1	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	vicfg1;		\/* 0xC8: APB_MISC_GP_VICFG1PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vicfg2	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	vicfg2;		\/* 0xC0: APB_MISC_GP_VICFG2PADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vicr	include/tsi148.h	/^	unsigned int vicr;                    \/* 0x440         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
vid	arch/x86/include/asm/speedstep.h	/^	uint8_t vid;$/;"	m	struct:sst_state	typeref:typename:uint8_t
vid	board/freescale/b4860qds/b4860qds.c	/^		u8 vid;$/;"	m	struct:adjust_vdd::vdd_drive	typeref:typename:u8	file:
vid	board/freescale/common/vid.c	/^		u8 vid;$/;"	m	struct:adjust_vdd::vdd_drive	typeref:typename:u8	file:
vid	board/freescale/t4qds/t4240qds.c	/^		u8 vid;$/;"	m	struct:adjust_vdd::vdd_drive	typeref:typename:u8	file:
vid	include/ethsw.h	/^	int vid;$/;"	m	struct:ethsw_command_def	typeref:typename:int
vid823	arch/powerpc/include/asm/8xx_immap.h	/^typedef struct vid823 {$/;"	s
vid823_t	arch/powerpc/include/asm/8xx_immap.h	/^} vid823_t;$/;"	t	typeref:struct:vid823
vid_ctl	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vid_ctl;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vid_did	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 vid_did;		\/* 0x00 *\/$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
vid_did	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 vid_did;$/;"	m	struct:ahb_pciconf	typeref:typename:u32
vid_hdr_aloffset	drivers/mtd/ubi/ubi.h	/^	int vid_hdr_aloffset;$/;"	m	struct:ubi_device	typeref:typename:int
vid_hdr_alsize	drivers/mtd/ubi/ubi.h	/^	int vid_hdr_alsize;$/;"	m	struct:ubi_device	typeref:typename:int
vid_hdr_offs	drivers/mtd/ubi/build.c	/^	int vid_hdr_offs;$/;"	m	struct:mtd_dev_param	typeref:typename:int	file:
vid_hdr_offset	drivers/mtd/ubi/ubi-media.h	/^	__be32  vid_hdr_offset;$/;"	m	struct:ubi_ec_hdr	typeref:typename:__be32
vid_hdr_offset	drivers/mtd/ubi/ubi.h	/^	int vid_hdr_offset;$/;"	m	struct:ubi_device	typeref:typename:int
vid_hdr_offset	include/mtd/ubi-user.h	/^	__s32 vid_hdr_offset;$/;"	m	struct:ubi_attach_req	typeref:typename:__s32
vid_hdr_shift	drivers/mtd/ubi/ubi.h	/^	int vid_hdr_shift;$/;"	m	struct:ubi_device	typeref:typename:int
vid_mode	arch/x86/include/asm/bootparam.h	/^	__u16	vid_mode;$/;"	m	struct:setup_header	typeref:typename:__u16
vid_offset	drivers/mtd/ubispl/ubispl.h	/^	unsigned long			vid_offset;$/;"	m	struct:ubi_scan_info	typeref:typename:unsigned long
vid_offset	include/ubispl.h	/^	u32			vid_offset;$/;"	m	struct:ubispl_info	typeref:typename:u32
vid_status	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	vid_status;$/;"	m	struct:rk3288_edp	typeref:typename:u32
vid_vbcb	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vbcb;$/;"	m	struct:vid823	typeref:typename:uint
vid_vccr	arch/powerpc/include/asm/8xx_immap.h	/^	ushort	vid_vccr;$/;"	m	struct:vid823	typeref:typename:ushort
vid_vcmr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	vid_vcmr;$/;"	m	struct:vid823	typeref:typename:u_char
vid_vfaa0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vfaa0;$/;"	m	struct:vid823	typeref:typename:uint
vid_vfaa1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vfaa1;$/;"	m	struct:vid823	typeref:typename:uint
vid_vfba0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vfba0;$/;"	m	struct:vid823	typeref:typename:uint
vid_vfba1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vfba1;$/;"	m	struct:vid823	typeref:typename:uint
vid_vfcr0	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vfcr0;$/;"	m	struct:vid823	typeref:typename:uint
vid_vfcr1	arch/powerpc/include/asm/8xx_immap.h	/^	uint	vid_vfcr1;$/;"	m	struct:vid823	typeref:typename:uint
vid_vsr	arch/powerpc/include/asm/8xx_immap.h	/^	u_char	vid_vsr;$/;"	m	struct:vid823	typeref:typename:u_char
vidclkdiv	arch/arm/include/asm/arch-ep93xx/ep93xx.h	/^	uint32_t vidclkdiv;$/;"	m	struct:syscon_regs	typeref:typename:uint32_t
vidcon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidcon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidcon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidcon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidcon2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidcon2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidcon3	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidcon3;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidconsole_back	drivers/video/vidconsole-uclass.c	/^static int vidconsole_back(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vidconsole_drv_name	include/dm/test.h	/^	const char *vidconsole_drv_name;$/;"	m	struct:sandbox_sdl_plat	typeref:typename:const char *
vidconsole_drv_name	include/video.h	/^	const char *vidconsole_drv_name;$/;"	m	struct:video_priv	typeref:typename:const char *
vidconsole_entry_start	drivers/video/vidconsole-uclass.c	/^static int vidconsole_entry_start(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vidconsole_get_ops	include/video_console.h	/^#define vidconsole_get_ops(/;"	d
vidconsole_move_rows	drivers/video/vidconsole-uclass.c	/^int vidconsole_move_rows(struct udevice *dev, uint rowdst, uint rowsrc,$/;"	f	typeref:typename:int
vidconsole_newline	drivers/video/vidconsole-uclass.c	/^static void vidconsole_newline(struct udevice *dev)$/;"	f	typeref:typename:void	file:
vidconsole_ops	include/video_console.h	/^struct vidconsole_ops {$/;"	s
vidconsole_position_cursor	drivers/video/vidconsole-uclass.c	/^void vidconsole_position_cursor(struct udevice *dev, unsigned col, unsigned row)$/;"	f	typeref:typename:void
vidconsole_post_probe	drivers/video/vidconsole-uclass.c	/^static int vidconsole_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vidconsole_pre_probe	drivers/video/vidconsole-uclass.c	/^static int vidconsole_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vidconsole_priv	include/video_console.h	/^struct vidconsole_priv {$/;"	s
vidconsole_put_char	drivers/video/vidconsole-uclass.c	/^int vidconsole_put_char(struct udevice *dev, char ch)$/;"	f	typeref:typename:int
vidconsole_putc	drivers/video/vidconsole-uclass.c	/^static void vidconsole_putc(struct stdio_dev *sdev, const char ch)$/;"	f	typeref:typename:void	file:
vidconsole_putc_xy	drivers/video/vidconsole-uclass.c	/^int vidconsole_putc_xy(struct udevice *dev, uint x, uint y, char ch)$/;"	f	typeref:typename:int
vidconsole_puts	drivers/video/vidconsole-uclass.c	/^static void vidconsole_puts(struct stdio_dev *sdev, const char *s)$/;"	f	typeref:typename:void	file:
vidconsole_set_row	drivers/video/vidconsole-uclass.c	/^int vidconsole_set_row(struct udevice *dev, uint row, int clr)$/;"	f	typeref:typename:int
video1_bias_cfg	arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h	/^	u32 video1_bias_cfg;	\/* 0x24c pll video1 bias register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
video1_bias_cfg	arch/arm/include/asm/arch/clock_sun8i_a83t.h	/^	u32 video1_bias_cfg;	\/* 0x24c pll video1 bias register *\/$/;"	m	struct:sunxi_ccm_reg	typeref:typename:u32
video1_clk2_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	video1_clk2_div: video1_clk2_div {$/;"	l
video1_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	video1_clkin_ck: video1_clkin_ck {$/;"	l
video1_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	video1_dclk_div: video1_dclk_div {$/;"	l
video1_div_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	video1_div_clk: video1_div_clk {$/;"	l
video1_dpll_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	video1_dpll_clk_mux: video1_dpll_clk_mux {$/;"	l
video1_m2_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	video1_m2_clkin_ck: video1_m2_clkin_ck {$/;"	l
video2_clk2_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	video2_clk2_div: video2_clk2_div {$/;"	l
video2_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	video2_clkin_ck: video2_clkin_ck {$/;"	l
video2_dclk_div	arch/arm/dts/dra7xx-clocks.dtsi	/^	video2_dclk_div: video2_dclk_div {$/;"	l
video2_div_clk	arch/arm/dts/dra7xx-clocks.dtsi	/^	video2_div_clk: video2_div_clk {$/;"	l
video2_dpll_clk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	video2_dpll_clk_mux: video2_dpll_clk_mux {$/;"	l
video2_m2_clkin_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	video2_m2_clkin_ck: video2_m2_clkin_ck {$/;"	l
video_bmp_display	drivers/video/video_bmp.c	/^int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,$/;"	f	typeref:typename:int
video_bottom	include/asm-generic/global_data.h	/^	ulong video_bottom;		\/* Bottom of video frame buffer area *\/$/;"	m	struct:global_data	typeref:typename:ulong
video_bp	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 video_bp;			\/* 0x018 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_bp	arch/arm/include/asm/arch/display.h	/^	u32 video_bp;			\/* 0x018 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_bridge_attach	drivers/video/bridge/video-bridge-uclass.c	/^int video_bridge_attach(struct udevice *dev)$/;"	f	typeref:typename:int
video_bridge_check_attached	drivers/video/bridge/video-bridge-uclass.c	/^int video_bridge_check_attached(struct udevice *dev)$/;"	f	typeref:typename:int
video_bridge_get_ops	include/video_bridge.h	/^#define video_bridge_get_ops(/;"	d
video_bridge_ops	include/video_bridge.h	/^struct video_bridge_ops {$/;"	s
video_bridge_pre_probe	drivers/video/bridge/video-bridge-uclass.c	/^static int video_bridge_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
video_bridge_priv	include/video_bridge.h	/^struct video_bridge_priv {$/;"	s
video_bridge_set_active	drivers/video/bridge/video-bridge-uclass.c	/^int video_bridge_set_active(struct udevice *dev, bool active)$/;"	f	typeref:typename:int
video_bridge_set_backlight	drivers/video/bridge/video-bridge-uclass.c	/^int video_bridge_set_backlight(struct udevice *dev, int percent)$/;"	f	typeref:typename:int
video_clear	drivers/video/cfb_console.c	/^void video_clear(void)$/;"	f	typeref:typename:void
video_clear	drivers/video/video-uclass.c	/^static int video_clear(struct udevice *dev)$/;"	f	typeref:typename:int	file:
video_color_bg	arch/powerpc/cpu/mpc8xx/video.c	/^	video_color_bg = 0,		\/* Current bg color index (0-15) *\/$/;"	v	typeref:typename:char	file:
video_color_fg	arch/powerpc/cpu/mpc8xx/video.c	/^	video_color_fg = 0,		\/* Current fg color index (0-15) *\/$/;"	v	typeref:typename:char	file:
video_cols	arch/arm/include/asm/setup.h	/^	u8		video_cols;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_cols	arch/nds32/include/asm/setup.h	/^	u8		video_cols;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_console_address	arch/powerpc/cpu/mpc8xx/video.c	/^	*video_console_address;		\/* Console frame buffer start address *\/$/;"	v	typeref:typename:void *	file:
video_console_address	drivers/video/cfb_console.c	/^static void *video_console_address;	\/* console buffer start address *\/$/;"	v	typeref:typename:void *	file:
video_ctl1	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_ctl1;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_ctl10	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_ctl10;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_ctl2	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_ctl2;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_ctl3	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_ctl3;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_ctl4	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_ctl4;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_ctl8	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_ctl8;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_ctl_1	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	video_ctl_1;$/;"	m	struct:rk3288_edp	typeref:typename:u32
video_ctl_10	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	video_ctl_10;$/;"	m	struct:rk3288_edp	typeref:typename:u32
video_ctl_2	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	video_ctl_2;$/;"	m	struct:rk3288_edp	typeref:typename:u32
video_ctl_3	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	video_ctl_3;$/;"	m	struct:rk3288_edp	typeref:typename:u32
video_ctl_4	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	video_ctl_4;$/;"	m	struct:rk3288_edp	typeref:typename:u32
video_ctl_8	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	video_ctl_8;$/;"	m	struct:rk3288_edp	typeref:typename:u32
video_ctrl	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 video_ctrl;			\/* 0x010 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_ctrl	arch/arm/include/asm/arch/display.h	/^	u32 video_ctrl;			\/* 0x010 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_ctrl_init	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_ctrl_init (void *memptr)$/;"	f	typeref:typename:void	file:
video_display_bitmap	drivers/video/bus_vcxk.c	/^int video_display_bitmap(ulong addr, int x, int y)$/;"	f	typeref:typename:int
video_display_bitmap	drivers/video/cfb_console.c	/^int video_display_bitmap(ulong bmp_image, int x, int y)$/;"	f	typeref:typename:int
video_display_rle8_bitmap	drivers/video/video_bmp.c	/^static void video_display_rle8_bitmap(struct udevice *dev,$/;"	f	typeref:typename:void	file:
video_drawchars	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_drawchars (int xx, int yy, unsigned char *s, int count)$/;"	f	typeref:typename:void	file:
video_drawchars	drivers/video/cfb_console.c	/^static void video_drawchars(int xx, int yy, unsigned char *s, int count)$/;"	f	typeref:typename:void	file:
video_drawstring	arch/powerpc/cpu/mpc8xx/video.c	/^static inline void video_drawstring (int xx, int yy, char *s)$/;"	f	typeref:typename:void	file:
video_drawstring	drivers/video/cfb_console.c	/^static inline void video_drawstring(int xx, int yy, unsigned char *s)$/;"	f	typeref:typename:void	file:
video_dump_reg	drivers/video/ct69000.c	/^video_dump_reg (void)$/;"	f	typeref:typename:void
video_edid_dtd_to_ctfb_res_modes	drivers/video/videomodes.c	/^int video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t,$/;"	f	typeref:typename:int
video_ega_bx	arch/arm/include/asm/setup.h	/^	u16		video_ega_bx;$/;"	m	struct:tag_videotext	typeref:typename:u16
video_ega_bx	arch/nds32/include/asm/setup.h	/^	u16		video_ega_bx;$/;"	m	struct:tag_videotext	typeref:typename:u16
video_enable	arch/powerpc/cpu/mpc8xx/video.c	/^	video_enable = 0;		\/* Video has been initialized? *\/$/;"	v	typeref:typename:char	file:
video_encoder_init	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_encoder_init (void)$/;"	f	typeref:typename:void	file:
video_ext_t	include/stdio_dev.h	/^} video_ext_t;$/;"	t	typeref:struct:__anon77b06a0f0108
video_fb_address	arch/powerpc/cpu/mpc8xx/video.c	/^	*video_fb_address,		\/* Frame buffer address *\/$/;"	v	typeref:typename:void *	file:
video_fb_address	drivers/video/cfb_console.c	/^static void *video_fb_address;	\/* frame buffer address *\/$/;"	v	typeref:typename:void *	file:
video_fifo_thrd	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_fifo_thrd;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_fill	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_fill (int color)$/;"	f	typeref:typename:void	file:
video_font_draw_table	arch/powerpc/cpu/mpc8xx/video.c	/^static const int video_font_draw_table[] =$/;"	v	typeref:typename:const int[]	file:
video_font_draw_table15	drivers/video/cfb_console.c	/^static const int video_font_draw_table15[] = {$/;"	v	typeref:typename:const int[]	file:
video_font_draw_table16	drivers/video/cfb_console.c	/^static const int video_font_draw_table16[] = {$/;"	v	typeref:typename:const int[]	file:
video_font_draw_table24	drivers/video/cfb_console.c	/^static const int video_font_draw_table24[16][3] = {$/;"	v	typeref:typename:const int[16][3]	file:
video_font_draw_table32	drivers/video/cfb_console.c	/^static const int video_font_draw_table32[16][4] = {$/;"	v	typeref:typename:const int[16][4]	file:
video_font_draw_table8	drivers/video/cfb_console.c	/^static const int video_font_draw_table8[] = {$/;"	v	typeref:typename:const int[]	file:
video_fontdata	include/video_font_4x6.h	/^static unsigned char video_fontdata[VIDEO_FONT_SIZE] = {$/;"	v	typeref:typename:unsigned char[]
video_fontdata	include/video_font_data.h	/^static unsigned char __maybe_unused video_fontdata[VIDEO_FONT_SIZE] = {$/;"	v	typeref:typename:unsigned char __maybe_unused[]
video_fp	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 video_fp;			\/* 0x01c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_fp	arch/arm/include/asm/arch/display.h	/^	u32 video_fp;			\/* 0x01c *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_get_ctfb_res_modes	drivers/video/videomodes.c	/^void video_get_ctfb_res_modes(int default_mode, unsigned int default_depth,$/;"	f	typeref:typename:void
video_get_info_str	board/ipek01/ipek01.c	/^void video_get_info_str (int line_number, char *info)$/;"	f	typeref:typename:void
video_get_info_str	board/liebherr/lwmon5/lwmon5.c	/^void video_get_info_str(int line_number, char *info)$/;"	f	typeref:typename:void
video_get_info_str	board/mosaixtech/icon/icon.c	/^void video_get_info_str(int line_number, char *info)$/;"	f	typeref:typename:void
video_get_info_str	board/mpl/common/common_util.c	/^void video_get_info_str (int line_number, char *info)$/;"	f	typeref:typename:void
video_get_info_str	board/socrates/socrates.c	/^void video_get_info_str (int line_number, char *info)$/;"	f	typeref:typename:void
video_get_info_str	board/tqc/tqm5200/tqm5200.c	/^void video_get_info_str (int line_number, char *info)$/;"	f	typeref:typename:void
video_get_ops	include/video.h	/^#define video_get_ops(/;"	d
video_get_option_int	drivers/video/videomodes.c	/^int video_get_option_int(const char *options, const char *name, int def)$/;"	f	typeref:typename:int
video_get_option_string	drivers/video/videomodes.c	/^void video_get_option_string(const char *options, const char *name,$/;"	f	typeref:typename:void
video_get_param_len	drivers/video/videomodes.c	/^video_get_param_len(const char *start, char sep)$/;"	f	typeref:typename:int	file:
video_get_params	drivers/video/videomodes.c	/^int video_get_params (struct ctfb_res_modes *pPar, char *penv)$/;"	f	typeref:typename:int
video_get_pixel_height	drivers/video/cfb_console.c	/^int video_get_pixel_height(void)$/;"	f	typeref:typename:int
video_get_pixel_width	drivers/video/cfb_console.c	/^int video_get_pixel_width(void)$/;"	f	typeref:typename:int
video_get_screen_columns	drivers/video/cfb_console.c	/^int video_get_screen_columns(void)$/;"	f	typeref:typename:int
video_get_screen_rows	drivers/video/cfb_console.c	/^int video_get_screen_rows(void)$/;"	f	typeref:typename:int
video_get_video_mode	drivers/video/videomodes.c	/^int video_get_video_mode(unsigned int *xres, unsigned int *yres,$/;"	f	typeref:typename:int
video_get_xsize	drivers/video/video-uclass.c	/^int video_get_xsize(struct udevice *dev)$/;"	f	typeref:typename:int
video_get_ysize	drivers/video/video-uclass.c	/^int video_get_ysize(struct udevice *dev)$/;"	f	typeref:typename:int
video_hw_bitblt	drivers/video/ct69000.c	/^video_hw_bitblt (unsigned int bpp,	\/* bytes per pixel *\/$/;"	f	typeref:typename:void
video_hw_bitblt	drivers/video/mb862xx.c	/^void video_hw_bitblt (unsigned int bpp, unsigned int src_x,$/;"	f	typeref:typename:void
video_hw_init	board/nokia/rx51/rx51.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/ati_radeon_fb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/ct69000.c	/^video_hw_init (void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/da8xx-fb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/fsl_dcu_fb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/fsl_diu_fb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/mb862xx.c	/^void *video_hw_init (void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/mvebu_lcd.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/mx3fb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/mxc_ipuv3_fb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/mxsfb.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/omap3_dss.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/sm501.c	/^void *video_hw_init (void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/sunxi_display.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_init	drivers/video/sunxi_display2.c	/^void *video_hw_init(void)$/;"	f	typeref:typename:void *
video_hw_rectfill	drivers/video/ct69000.c	/^video_hw_rectfill (unsigned int bpp,	\/* bytes per pixel *\/$/;"	f	typeref:typename:void
video_hw_rectfill	drivers/video/mb862xx.c	/^void video_hw_rectfill (unsigned int bpp, unsigned int dst_x,$/;"	f	typeref:typename:void
video_in_dma	drivers/video/ipu.h	/^	u8 video_in_dma;$/;"	m	struct:ipu_channel	typeref:typename:u8
video_info	arch/arm/mach-exynos/include/mach/dp_info.h	/^	struct edp_video_info video_info;$/;"	m	struct:exynos_dp_priv	typeref:struct:edp_video_info
video_init	arch/powerpc/cpu/mpc8xx/video.c	/^static int video_init (void *videobase)$/;"	f	typeref:typename:int	file:
video_init	board/bf527-ezkit/video.c	/^int video_init(void *dst)$/;"	f	typeref:typename:int
video_init	board/bf533-stamp/video.c	/^static void video_init(char *NTSCFrame)$/;"	f	typeref:typename:void	file:
video_init	board/bf548-ezkit/video.c	/^int video_init(void *dst)$/;"	f	typeref:typename:int
video_init	board/cm-bf548/video.c	/^int video_init(void *dst)$/;"	f	typeref:typename:int
video_input_definition	include/edid.h	/^	unsigned char video_input_definition;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
video_invertchar	drivers/video/cfb_console.c	/^static void video_invertchar(int xx, int yy)$/;"	f	typeref:typename:void	file:
video_isvga	arch/arm/include/asm/setup.h	/^	u8		video_isvga;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_isvga	arch/nds32/include/asm/setup.h	/^	u8		video_isvga;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_lines	arch/arm/include/asm/setup.h	/^	u8		video_lines;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_lines	arch/nds32/include/asm/setup.h	/^	u8		video_lines;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_log2_bpp	include/video.h	/^enum video_log2_bpp {$/;"	g
video_logo	arch/powerpc/cpu/mpc8xx/video.c	/^static void *video_logo (void)$/;"	f	typeref:typename:void *	file:
video_logo	drivers/video/cfb_console.c	/^static void *video_logo(void)$/;"	f	typeref:typename:void *	file:
video_logo_height	drivers/video/cfb_console.c	/^static int video_logo_height = VIDEO_LOGO_HEIGHT;$/;"	v	typeref:typename:int	file:
video_logo_xpos	drivers/video/cfb_console.c	/^static int video_logo_xpos;$/;"	v	typeref:typename:int	file:
video_logo_ypos	drivers/video/cfb_console.c	/^static int video_logo_ypos;$/;"	v	typeref:typename:int	file:
video_maprgb	arch/powerpc/cpu/mpc8xx/video.c	/^static int video_maprgb (int r, int g, int b)$/;"	f	typeref:typename:int	file:
video_mode	arch/arm/include/asm/setup.h	/^	u8		video_mode;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_mode	arch/nds32/include/asm/setup.h	/^	u8		video_mode;$/;"	m	struct:tag_videotext	typeref:typename:u8
video_mode	include/vbe.h	/^	u16 video_mode;$/;"	m	struct:vbe_mode_info	typeref:typename:u16
video_mode_addentry	arch/powerpc/cpu/mpc8xx/video.c	/^static void inline video_mode_addentry (VRAM * vr,$/;"	f	typeref:typename:void	file:
video_mode_dupefield	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_mode_dupefield (VRAM * source, VRAM * dest, int entries)$/;"	f	typeref:typename:void	file:
video_mode_generate	arch/powerpc/cpu/mpc8xx/video.c	/^static int video_mode_generate (void)$/;"	f	typeref:typename:int	file:
video_num_cols	arch/arm/include/asm/setup.h	/^	    unsigned long video_num_cols;	\/* 20 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
video_num_rows	arch/arm/include/asm/setup.h	/^	    unsigned long video_num_rows;	\/* 24 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
video_ops	include/video.h	/^struct video_ops {$/;"	s
video_page	arch/arm/include/asm/setup.h	/^	u16		video_page;$/;"	m	struct:tag_videotext	typeref:typename:u16
video_page	arch/nds32/include/asm/setup.h	/^	u16		video_page;$/;"	m	struct:tag_videotext	typeref:typename:u16
video_palette	arch/powerpc/cpu/mpc8xx/video.c	/^	video_palette[16];		\/* Our palette *\/$/;"	v	typeref:typename:int[16]	file:
video_panning_factor_x	arch/powerpc/cpu/mpc8xx/video.c	/^	video_panning_factor_x = 0,	\/* Video mode x panning value (-127 +127) *\/$/;"	v	typeref:typename:int	file:
video_panning_factor_y	arch/powerpc/cpu/mpc8xx/video.c	/^	video_panning_factor_y = 0,	\/* Video mode y panning value (-127 +127) *\/$/;"	v	typeref:typename:int	file:
video_panning_range_x	arch/powerpc/cpu/mpc8xx/video.c	/^	video_panning_range_x = 0,	\/* Video mode invisible pixels x range *\/$/;"	v	typeref:typename:int	file:
video_panning_range_y	arch/powerpc/cpu/mpc8xx/video.c	/^	video_panning_range_y = 0,	\/* Video mode invisible pixels y range *\/$/;"	v	typeref:typename:int	file:
video_panning_value_x	arch/powerpc/cpu/mpc8xx/video.c	/^	video_panning_value_x = 0,	\/* Video mode x panning value (absolute) *\/$/;"	v	typeref:typename:int	file:
video_panning_value_y	arch/powerpc/cpu/mpc8xx/video.c	/^	video_panning_value_y = 0,	\/* Video mode y panning value (absolute) *\/$/;"	v	typeref:typename:int	file:
video_pickcolor	arch/powerpc/cpu/mpc8xx/video.c	/^static int video_pickcolor (int i)$/;"	f	typeref:typename:int	file:
video_points	arch/arm/include/asm/setup.h	/^	u16		video_points;$/;"	m	struct:tag_videotext	typeref:typename:u16
video_points	arch/nds32/include/asm/setup.h	/^	u16		video_points;$/;"	m	struct:tag_videotext	typeref:typename:u16
video_polarity	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 video_polarity;		\/* 0x024 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_polarity	arch/arm/include/asm/arch/display.h	/^	u32 video_polarity;		\/* 0x024 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_polarity	include/video.h	/^enum video_polarity {$/;"	g
video_position_cursor	drivers/video/cfb_console.c	/^void video_position_cursor(unsigned col, unsigned row)$/;"	f	typeref:typename:void
video_post_bind	drivers/video/video-uclass.c	/^static int video_post_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
video_post_probe	drivers/video/video-uclass.c	/^static int video_post_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
video_pre_probe	drivers/video/video-uclass.c	/^static int video_pre_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
video_pre_remove	drivers/video/video-uclass.c	/^static int video_pre_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
video_priv	include/video.h	/^struct video_priv {$/;"	s
video_putc	arch/powerpc/cpu/mpc8xx/video.c	/^void video_putc(struct stdio_dev *dev, const char c)$/;"	f	typeref:typename:void
video_putchar	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_putchar (int xx, int yy, unsigned char c)$/;"	f	typeref:typename:void	file:
video_putchar	drivers/video/cfb_console.c	/^static void video_putchar(int xx, int yy, unsigned char c)$/;"	f	typeref:typename:void	file:
video_putchars	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_putchars (int xx, int yy, unsigned char *s, int count)$/;"	f	typeref:typename:void	file:
video_puts	arch/powerpc/cpu/mpc8xx/video.c	/^void video_puts(struct stdio_dev *dev, const char *s)$/;"	f	typeref:typename:void
video_putstring	arch/powerpc/cpu/mpc8xx/video.c	/^static inline void video_putstring (int xx, int yy, unsigned char *s)$/;"	f	typeref:typename:void	file:
video_ram	drivers/video/ati_radeon_fb.h	/^	u32			video_ram;$/;"	m	struct:radeonfb_info	typeref:typename:u32
video_reserve	drivers/video/video-uclass.c	/^int video_reserve(ulong *addrp)$/;"	f	typeref:typename:int
video_revchar	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_revchar (int xx, int yy)$/;"	f	typeref:typename:void	file:
video_search_param	drivers/video/videomodes.c	/^video_search_param (char *start, char *param)$/;"	f	typeref:typename:int	file:
video_set_cmap	drivers/video/video_bmp.c	/^static void video_set_cmap(struct udevice *dev,$/;"	f	typeref:typename:void	file:
video_set_cursor	drivers/video/cfb_console.c	/^static void video_set_cursor(void)$/;"	f	typeref:typename:void	file:
video_set_flush_dcache	drivers/video/video-uclass.c	/^void video_set_flush_dcache(struct udevice *dev, bool flush)$/;"	f	typeref:typename:void
video_set_lut	drivers/video/ati_radeon_fb.c	/^void video_set_lut (unsigned int index,	\/* color number *\/$/;"	f	typeref:typename:void
video_set_lut	drivers/video/cfb_console.c	/^__weak void video_set_lut(unsigned int index, unsigned char r,$/;"	f	typeref:typename:__weak void
video_set_lut	drivers/video/ct69000.c	/^video_set_lut (unsigned int index,	\/* color number *\/$/;"	f	typeref:typename:void
video_set_lut	drivers/video/mb862xx.c	/^void video_set_lut (unsigned int index, unsigned char r,$/;"	f	typeref:typename:void
video_setbgcolor	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_setbgcolor (int i)$/;"	f	typeref:typename:void	file:
video_setfgcolor	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_setfgcolor (int i)$/;"	f	typeref:typename:void	file:
video_setmem	arch/powerpc/cpu/mpc8xx/video.c	/^ulong video_setmem (ulong addr)$/;"	f	typeref:typename:ulong
video_setpalette	arch/powerpc/cpu/mpc8xx/video.c	/^static void video_setpalette (int color, int r, int g, int b)$/;"	f	typeref:typename:void	file:
video_size	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 video_size;			\/* 0x014 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_size	arch/arm/include/asm/arch/display.h	/^	u32 video_size;			\/* 0x014 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_splash_align_axis	drivers/video/video_bmp.c	/^static void video_splash_align_axis(int *axis, unsigned long panel_size,$/;"	f	typeref:typename:void	file:
video_spw	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 video_spw;			\/* 0x020 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_spw	arch/arm/include/asm/arch/display.h	/^	u32 video_spw;			\/* 0x020 *\/$/;"	m	struct:sunxi_hdmi_reg	typeref:typename:u32
video_status	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	video_status;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
video_stop	board/bf527-ezkit/video.c	/^void video_stop(void)$/;"	f	typeref:typename:void
video_stop	board/bf533-stamp/video.c	/^void video_stop(void)$/;"	f	typeref:typename:void
video_stop	board/bf548-ezkit/video.c	/^void video_stop(void)$/;"	f	typeref:typename:void
video_stop	board/cm-bf548/video.c	/^void video_stop(void)$/;"	f	typeref:typename:void
video_sync	drivers/video/video-uclass.c	/^void video_sync(struct udevice *vid)$/;"	f	typeref:typename:void
video_sync_all	drivers/video/video-uclass.c	/^void video_sync_all(void)$/;"	f	typeref:typename:void
video_timing_recognition_type	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum video_timing_recognition_type {$/;"	g
video_top	include/asm-generic/global_data.h	/^	ulong video_top;		\/* Top of video frame buffer area *\/$/;"	m	struct:global_data	typeref:typename:ulong
video_uc_platdata	include/video.h	/^struct video_uc_platdata {$/;"	s
video_wait_bitblt	drivers/video/ct69000.c	/^video_wait_bitblt (unsigned long addr)$/;"	f	typeref:typename:int	file:
video_x	arch/arm/include/asm/setup.h	/^	    unsigned long video_x;		\/* 28 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
video_y	arch/arm/include/asm/setup.h	/^	    unsigned long video_y;		\/* 32 *\/$/;"	m	struct:param_struct::__anon61e8c52b010a::__anon61e8c52b0208	typeref:typename:unsigned long
videolfb	arch/arm/include/asm/setup.h	/^		struct tag_videolfb	videolfb;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_videolfb
videolfb	arch/nds32/include/asm/setup.h	/^		struct tag_videolfb	videolfb;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_videolfb
videomem0	include/gdsys_fpga.h	/^	u16 videomem0[2048];	\/* 0x0800 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[2048]
videomem0	include/gdsys_fpga.h	/^	u16 videomem0[2048];	\/* 0x1000 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[2048]
videomem1	include/gdsys_fpga.h	/^	u16 videomem1[2048];	\/* 0x2000 *\/$/;"	m	struct:ihs_fpga	typeref:typename:u16[2048]
videopll_ctrl	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_ctrl;	\/* offset 0x470 *\/$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_div1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_div1;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_div2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_div2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_div3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_div3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_freq1	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_freq1;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_freq2	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_freq2;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_freq3	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_freq3;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videopll_pwd	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^	unsigned int videopll_pwd;$/;"	m	struct:cm_pll	typeref:typename:unsigned int	file:
videotext	arch/arm/include/asm/setup.h	/^		struct tag_videotext	videotext;$/;"	m	union:tag::__anon61e8c52b050a	typeref:struct:tag_videotext
videotext	arch/nds32/include/asm/setup.h	/^		struct tag_videotext	videotext;$/;"	m	union:tag::__anon55326435010a	typeref:struct:tag_videotext
vidh	drivers/mtd/ubi/attach.c	/^static struct ubi_vid_hdr *vidh;$/;"	v	typeref:struct:ubi_vid_hdr *	file:
vidin_en	board/gateworks/gw_ventana/common.h	/^	int vidin_en;$/;"	m	struct:ventana	typeref:typename:int
vidinfo	include/atmel_lcd.h	/^typedef struct vidinfo {$/;"	s
vidinfo	include/exynos_lcd.h	/^typedef struct vidinfo {$/;"	s
vidinfo	include/lcd.h	/^typedef struct vidinfo {$/;"	s
vidinfo	include/mpc823_lcd.h	/^typedef struct vidinfo {$/;"	s
vidinfo	include/pxa_lcd.h	/^typedef struct vidinfo {$/;"	s
vidinfo_t	include/atmel_lcd.h	/^} vidinfo_t;$/;"	t	typeref:struct:vidinfo
vidinfo_t	include/exynos_lcd.h	/^} vidinfo_t;$/;"	t	typeref:struct:vidinfo
vidinfo_t	include/lcd.h	/^} vidinfo_t;$/;"	t	typeref:struct:vidinfo
vidinfo_t	include/mpc823_lcd.h	/^} vidinfo_t;$/;"	t	typeref:struct:vidinfo
vidinfo_t	include/pxa_lcd.h	/^} vidinfo_t;$/;"	t	typeref:struct:vidinfo
vidintcon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidintcon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidintcon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidintcon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd0a	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd0a;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd0b	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd0b;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd0c	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd0c;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd1a	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd1a;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd1b	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd1b;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd1c	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd1c;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd1d	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd1d;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd2a	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd2a;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd2b	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd2b;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd2c	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd2c;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd2d	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd2d;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd3a	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd3a;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd3b	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd3b;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd3c	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd3c;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd4a	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd4a;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd4b	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd4b;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidosd4c	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidosd4c;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidout_ctrl	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 vidout_ctrl;			\/* 0x10 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
vidtcon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidtcon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidtcon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidtcon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidtcon2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidtcon2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidtcon3	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidtcon3;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw00add0b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw00add0b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw00add0b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw00add0b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw00add1b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw00add1b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw00add1b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw00add1b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw00add2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw00add2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw01add0b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw01add0b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw01add0b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw01add0b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw01add1b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw01add1b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw01add1b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw01add1b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw01add2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw01add2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw02add0b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw02add0b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw02add0b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw02add0b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw02add1b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw02add1b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw02add1b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw02add1b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw02add2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw02add2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw03add0b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw03add0b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw03add0b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw03add0b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw03add1b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw03add1b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw03add1b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw03add1b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw03add2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw03add2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw04add0b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw04add0b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw04add0b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw04add0b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw04add1b0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw04add1b0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw04add1b1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw04add1b1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
vidw04add2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int vidw04add2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
viewList	scripts/kconfig/qconf.cc	/^ConfigView*ConfigView::viewList;$/;"	m	class:ConfigView	typeref:typename:ConfigView *
viewList	scripts/kconfig/qconf.h	/^	static ConfigView* viewList;$/;"	m	class:ConfigView	typeref:typename:ConfigView *
view_mode	scripts/kconfig/gconf.c	/^static gint view_mode = FULL_VIEW;$/;"	v	typeref:typename:gint	file:
viewport_addr	include/usb/ulpi.h	/^	uintptr_t viewport_addr;$/;"	m	struct:ulpi_viewport	typeref:typename:uintptr_t
vimage_size	include/edid.h	/^	unsigned char vimage_size;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
vinco_macb0_hw_init	board/l+g/vinco/vinco.c	/^void vinco_macb0_hw_init(void)$/;"	f	typeref:typename:void
vinco_mci0_hw_init	board/l+g/vinco/vinco.c	/^void vinco_mci0_hw_init(void)$/;"	f	typeref:typename:void
vinco_serial3_hw_init	board/l+g/vinco/vinco.c	/^static void vinco_serial3_hw_init(void)$/;"	f	typeref:typename:void	file:
vinco_spi0_hw_init	board/l+g/vinco/vinco.c	/^static void vinco_spi0_hw_init(void)$/;"	f	typeref:typename:void	file:
vinco_usb_hw_init	board/l+g/vinco/vinco.c	/^static void vinco_usb_hw_init(void)$/;"	f	typeref:typename:void	file:
vindex_div	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t vindex_div;$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
vindex_mult	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint16_t vindex_mult;$/;"	m	struct:cpu_vhint_data	typeref:typename:uint16_t
vint_en	include/universe.h	/^	unsigned int vint_en;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vint_map0	include/universe.h	/^	unsigned int vint_map0;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vint_map1	include/universe.h	/^	unsigned int vint_map1;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vint_stat	include/universe.h	/^	unsigned int vint_stat;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vio_reg	arch/arm/dts/am335x-evm.dts	/^		vio_reg: regulator@1 {$/;"	l
vio_reg	arch/arm/dts/am335x-evmsk.dts	/^		vio_reg: regulator@1 {$/;"	l
vio_reg	arch/arm/dts/am335x-icev2.dts	/^		vio_reg: regulator@1 {$/;"	l
vio_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vio_reg: regulator@1 {$/;"	l
vio_reg	arch/arm/dts/tegra30-apalis.dts	/^				vio_reg: vio {$/;"	l	label:pmic
vio_reg	arch/arm/dts/tegra30-beaver.dts	/^				vio_reg: vio {$/;"	l	label:pmic
vio_reg	arch/arm/dts/tegra30-cardhu.dts	/^				vio_reg: vio {$/;"	l	label:pmic
vio_reg	arch/arm/dts/tps65910.dtsi	/^		vio_reg: regulator@1 {$/;"	l
vioctrl	arch/arm/mach-socfpga/include/mach/freeze_controller.h	/^	u32	vioctrl;$/;"	m	struct:socfpga_freeze_controller	typeref:typename:u32
vip1_gclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	vip1_gclk_mux: vip1_gclk_mux {$/;"	l
vip2_gclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	vip2_gclk_mux: vip2_gclk_mux {$/;"	l
vip3_gclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	vip3_gclk_mux: vip3_gclk_mux {$/;"	l
viph_control	drivers/video/ati_radeon_fb.h	/^	u32		viph_control;$/;"	m	struct:radeon_regs	typeref:typename:u32
vir	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32	vir;		\/* Version information *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
vir	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u32	vir;		\/* Version information *\/$/;"	m	struct:rdc_regs	typeref:typename:u32
vir	arch/powerpc/include/asm/immap_85xx.h	/^	u32	vir;		\/* Vendor Identification *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
vir	arch/powerpc/include/asm/immap_86xx.h	/^	uint	vir;		\/* 0x41080 - Vendor Identification Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
virt	arch/arm/include/asm/armv8/mmu.h	/^	u64 virt;$/;"	m	struct:mm_region	typeref:typename:u64
virt_12000000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_12000000_ck: virt_12000000_ck {$/;"	l
virt_13000000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_13000000_ck: virt_13000000_ck {$/;"	l
virt_16800000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_16800000_ck: virt_16800000_ck {$/;"	l
virt_19200000_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	virt_19200000_ck: virt_19200000_ck {$/;"	l
virt_19200000_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	virt_19200000_ck: virt_19200000_ck {$/;"	l
virt_19200000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_19200000_ck: virt_19200000_ck {$/;"	l
virt_20000000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_20000000_ck: virt_20000000_ck {$/;"	l
virt_24000000_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	virt_24000000_ck: virt_24000000_ck {$/;"	l
virt_24000000_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	virt_24000000_ck: virt_24000000_ck {$/;"	l
virt_25000000_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	virt_25000000_ck: virt_25000000_ck {$/;"	l
virt_25000000_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	virt_25000000_ck: virt_25000000_ck {$/;"	l
virt_26000000_ck	arch/arm/dts/am33xx-clocks.dtsi	/^	virt_26000000_ck: virt_26000000_ck {$/;"	l
virt_26000000_ck	arch/arm/dts/am43xx-clocks.dtsi	/^	virt_26000000_ck: virt_26000000_ck {$/;"	l
virt_26000000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_26000000_ck: virt_26000000_ck {$/;"	l
virt_27000000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_27000000_ck: virt_27000000_ck {$/;"	l
virt_38400000_ck	arch/arm/dts/dra7xx-clocks.dtsi	/^	virt_38400000_ck: virt_38400000_ck {$/;"	l
virt_addr	drivers/net/mvpp2.c	/^	u32 *virt_addr;$/;"	m	struct:mvpp2_bm_pool	typeref:typename:u32 *	file:
virt_pgno	arch/avr32/include/asm/arch-at32ap700x/mmu.h	/^	uint16_t	virt_pgno;$/;"	m	struct:mmu_vm_range	typeref:typename:uint16_t
virt_root_hub	arch/mips/mach-au1x00/au1x00_usb_ohci.h	/^struct virt_root_hub {$/;"	s
virt_root_hub	arch/powerpc/cpu/mpc5xxx/usb_ohci.h	/^struct virt_root_hub {$/;"	s
virt_root_hub	arch/powerpc/cpu/ppc4xx/usb_ohci.h	/^struct virt_root_hub {$/;"	s
virt_root_hub	arch/sparc/cpu/leon3/usb_uhci.h	/^struct virt_root_hub {$/;"	s
virt_root_hub	board/mpl/common/usb_uhci.h	/^struct virt_root_hub {$/;"	s
virt_root_hub	drivers/usb/host/ohci-s3c24xx.h	/^struct virt_root_hub {$/;"	s
virt_root_hub	drivers/usb/host/ohci.h	/^struct virt_root_hub {$/;"	s
virt_start	arch/x86/include/asm/sfi.h	/^	u64	virt_start;$/;"	m	struct:sfi_mem_entry	typeref:typename:u64
virt_to_bus	arch/mips/include/asm/io.h	/^#define virt_to_bus /;"	d
virt_to_bus	drivers/block/sata_sil.c	/^#define virt_to_bus(/;"	d	file:
virt_to_bus	drivers/net/e1000.c	/^#define virt_to_bus(/;"	d	file:
virt_to_page	arch/arm/include/asm/arch-s3c24x0/memory.h	/^#define virt_to_page(/;"	d
virt_to_phys	arch/arc/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void *vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/arm/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/avr32/include/asm/arch-at32ap700x/addrspace.h	/^static inline unsigned long virt_to_phys(volatile void *address)$/;"	f	typeref:typename:unsigned long
virt_to_phys	arch/blackfin/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/m68k/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/microblaze/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/mips/include/asm/io.h	/^static inline unsigned long virt_to_phys(volatile const void *address)$/;"	f	typeref:typename:unsigned long
virt_to_phys	arch/nds32/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void *vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/nios2/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/openrisc/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void *vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/powerpc/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/sh/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void *vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/sparc/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/x86/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void * vaddr)$/;"	f	typeref:typename:phys_addr_t
virt_to_phys	arch/xtensa/include/asm/io.h	/^static inline phys_addr_t virt_to_phys(void *vaddr)$/;"	f	typeref:typename:phys_addr_t
virtadr	include/linux/mtd/doc2000.h	/^	void __iomem *virtadr;$/;"	m	struct:DiskOnChip	typeref:typename:void __iomem *
virtex2_dump	drivers/fpga/virtex2.c	/^static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
virtex2_info	drivers/fpga/virtex2.c	/^static int virtex2_info(xilinx_desc *desc)$/;"	f	typeref:typename:int	file:
virtex2_load	drivers/fpga/virtex2.c	/^static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int	file:
virtex2_op	drivers/fpga/virtex2.c	/^struct xilinx_fpga_op virtex2_op = {$/;"	v	typeref:struct:xilinx_fpga_op
virtex2_ss_dump	drivers/fpga/virtex2.c	/^static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
virtex2_ss_load	drivers/fpga/virtex2.c	/^static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
virtex2_ssm_dump	drivers/fpga/virtex2.c	/^static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
virtex2_ssm_load	drivers/fpga/virtex2.c	/^static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
virtual_offset	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_virtual_offset virtual_offset;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_virtual_offset	file:
virtual_start	include/efi.h	/^	efi_virtual_addr_t virtual_start;$/;"	m	struct:efi_mem_desc	typeref:typename:efi_virtual_addr_t
virtual_w_h	drivers/video/bcm2835.c	/^	struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;$/;"	m	struct:msg_setup	typeref:struct:bcm2835_mbox_tag_virtual_w_h	file:
visibility	scripts/kconfig/expr.h	/^	struct expr *visibility;$/;"	m	struct:menu	typeref:struct:expr *
visibility_list	scripts/kconfig/zconf.y	/^visibility_list:$/;"	l
visible	scripts/kconfig/expr.h	/^	struct expr_value visible;$/;"	m	struct:property	typeref:struct:expr_value
visible	scripts/kconfig/expr.h	/^	tristate visible;$/;"	m	struct:symbol	typeref:typename:tristate
visible	scripts/kconfig/qconf.h	/^	bool visible;$/;"	m	class:ConfigItem	typeref:typename:bool
visible	scripts/kconfig/zconf.y	/^visible: T_VISIBLE if_expr$/;"	l
visual	include/linux/fb.h	/^	__u32 visual;			\/* see FB_VISUAL_*		*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u32
viterbirate	board/astro/mcf5373l/astro.h	/^	unsigned char viterbirate;$/;"	m	struct:__anona9f590f60208	typeref:typename:unsigned char
vitesse_config	drivers/net/phy/vitesse.c	/^static int vitesse_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vitesse_parse_status	drivers/net/phy/vitesse.c	/^static int vitesse_parse_status(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vitesse_startup	drivers/net/phy/vitesse.c	/^static int vitesse_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vivttgen	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	vivttgen;	\/* 0xCC: APB_MISC_GP_VIVTTGENPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
vl_bfw	include/pxa_lcd.h	/^	u_char	vl_bfw;		\/* Wait before of frame *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_blw	include/pxa_lcd.h	/^	u_char	vl_blw;		\/* Wait before of line *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_boot_header	include/zfs/vdev_impl.h	/^	vdev_boot_header_t vl_boot_header;			\/*   8K	*\/$/;"	m	struct:vdev_label	typeref:typename:vdev_boot_header_t
vl_bpix	drivers/video/exynos/exynos_fb.c	/^	u_char vl_bpix;		\/* Bits per pixel *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_bpix	include/atmel_lcd.h	/^	u_long vl_bpix;	\/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_bpix	include/exynos_lcd.h	/^	u_char vl_bpix;		\/* Bits per pixel *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_bpix	include/lcd.h	/^	u_char	vl_bpix;	\/* Bits per pixel, 0 = 1 *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_bpix	include/mpc823_lcd.h	/^	u_char	vl_bpix;	\/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_bpix	include/pxa_lcd.h	/^	u_char	vl_bpix;\/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_clk	include/atmel_lcd.h	/^	u_long vl_clk;		\/* pixel clock in ps    *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_clk_pol	include/atmel_lcd.h	/^	u_long vl_clk_pol;	\/* clock polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_clkp	drivers/video/exynos/exynos_fb.c	/^	u_char vl_clkp;		\/* Clock polarity *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_clkp	include/exynos_lcd.h	/^	u_char vl_clkp;		\/* Clock polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_clkp	include/mpc823_lcd.h	/^	u_char	vl_clkp;	\/* Clock polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_clkp	include/pxa_lcd.h	/^	u_char	vl_clkp;	\/* Clock polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_clor	include/mpc823_lcd.h	/^	u_char	vl_clor;	\/* Color, 0 = mono, 1 = color *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_clor	include/pxa_lcd.h	/^	u_char	vl_clor;	\/* Color, 0 = mono, 1 = color *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_cmd_allow_len	drivers/video/exynos/exynos_fb.c	/^	u_char  vl_cmd_allow_len; \/* Wait end of frame *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_cmd_allow_len	include/exynos_lcd.h	/^	u_char  vl_cmd_allow_len; \/* Wait end of frame *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_col	drivers/video/exynos/exynos_fb.c	/^	ushort vl_col;		\/* Number of columns (i.e. 640) *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:ushort	file:
vl_col	include/atmel_lcd.h	/^	ushort vl_col;		\/* Number of columns (i.e. 640) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_col	include/exynos_lcd.h	/^	ushort vl_col;		\/* Number of columns (i.e. 640) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_col	include/lcd.h	/^	ushort	vl_col;		\/* Number of columns (i.e. 160) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_col	include/mpc823_lcd.h	/^	ushort	vl_col;		\/* Number of columns (i.e. 640) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_col	include/pxa_lcd.h	/^	ushort	vl_col;		\/* Number of columns (i.e. 640) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_cont_pol_low	include/atmel_lcd.h	/^	u_long vl_cont_pol_low;	\/* contrast polarity is low *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_dp	drivers/video/exynos/exynos_fb.c	/^	u_char vl_dp;		\/* Data polarity *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_dp	include/exynos_lcd.h	/^	u_char vl_dp;		\/* Data polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_dp	include/mpc823_lcd.h	/^	u_char	vl_dp;		\/* Data polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_dp	include/pxa_lcd.h	/^	u_char	vl_dp;		\/* Data polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_efw	include/pxa_lcd.h	/^	u_char	vl_efw;		\/* Wait end of frame *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_elw	include/pxa_lcd.h	/^	u_char	vl_elw;		\/* Wait end of line *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_freq	drivers/video/exynos/exynos_fb.c	/^	u_char vl_freq;		\/* Frequency *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_freq	include/exynos_lcd.h	/^	u_char vl_freq;		\/* Frequency *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_hbpd	drivers/video/exynos/exynos_fb.c	/^	u_char vl_hbpd;		\/* Wait end of line *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_hbpd	include/exynos_lcd.h	/^	u_char vl_hbpd;		\/* Wait end of line *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_height	drivers/video/exynos/exynos_fb.c	/^	ushort vl_height;	\/* Height of display area in millimeters *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:ushort	file:
vl_height	include/exynos_lcd.h	/^	ushort vl_height;	\/* Height of display area in millimeters *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_height	include/mpc823_lcd.h	/^	ushort	vl_height;	\/* Height of display area in millimeters *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_height	include/pxa_lcd.h	/^	ushort	vl_height;	\/* Height of display area in millimeters *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_hfpd	drivers/video/exynos/exynos_fb.c	/^	u_char vl_hfpd;		\/* Wait before of line *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_hfpd	include/exynos_lcd.h	/^	u_char vl_hfpd;		\/* Wait before of line *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_hpw	include/pxa_lcd.h	/^	ushort	vl_hpw;		\/* Horz sync pulse width *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_hsp	drivers/video/exynos/exynos_fb.c	/^	u_char vl_hsp;		\/* Horizontal Sync polarity *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_hsp	include/exynos_lcd.h	/^	u_char vl_hsp;		\/* Horizontal Sync polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_hsp	include/mpc823_lcd.h	/^	u_char	vl_hsp;		\/* Horizontal Sync polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_hsp	include/pxa_lcd.h	/^	u_char	vl_hsp;		\/* Horizontal Sync polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_hspw	drivers/video/exynos/exynos_fb.c	/^	u_char vl_hspw;		\/* Horz sync pulse width *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_hspw	include/exynos_lcd.h	/^	u_char vl_hspw;		\/* Horz sync pulse width *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_hsync_len	include/atmel_lcd.h	/^	u_long vl_hsync_len;	\/* Length of horizontal sync *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_lbw	include/mpc823_lcd.h	/^	u_char	vl_lbw;		\/* LCD Bus width, 0 = 4, 1 = 8 *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_lbw	include/pxa_lcd.h	/^	u_char	vl_lbw;		\/* LCD Bus width, 0 = 4, 1 = 8 *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_lcdac	include/mpc823_lcd.h	/^	u_char	vl_lcdac;	\/* LCD AC timing *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_left_margin	include/atmel_lcd.h	/^	u_long vl_left_margin;	\/* Time from sync to picture *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_lower_margin	include/atmel_lcd.h	/^	u_long vl_lower_margin;	\/* Time from picture to sync *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_oep	drivers/video/exynos/exynos_fb.c	/^	u_char vl_oep;		\/* Output Enable polarity *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_oep	include/exynos_lcd.h	/^	u_char vl_oep;		\/* Output Enable polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_oep	include/mpc823_lcd.h	/^	u_char	vl_oep;		\/* Output Enable polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_oep	include/pxa_lcd.h	/^	u_char	vl_oep;		\/* Output Enable polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_pad	include/zfs/vdev_impl.h	/^	char		vl_pad[VDEV_SKIP_SIZE];			\/*   8K	*\/$/;"	m	struct:vdev_label	typeref:typename:char[]
vl_right_margin	include/atmel_lcd.h	/^	u_long vl_right_margin;	\/* Time from picture to sync *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_rot	drivers/video/exynos/exynos_fb.c	/^	ushort vl_rot;		\/* Rotation of Display (0, 1, 2, 3) *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:ushort	file:
vl_rot	include/atmel_lcd.h	/^	ushort vl_rot;		\/* Rotation of Display (0, 1, 2, 3) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_rot	include/exynos_lcd.h	/^	ushort vl_rot;		\/* Rotation of Display (0, 1, 2, 3) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_rot	include/lcd.h	/^	ushort	vl_rot;		\/* Rotation of Display (0, 1, 2, 3) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_rot	include/mpc823_lcd.h	/^	ushort  vl_rot;		\/* Rotation of Display (0, 1, 2, 3) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_rot	include/pxa_lcd.h	/^	ushort  vl_rot;		\/* Rotation of Display (0, 1, 2, 3) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_row	drivers/video/exynos/exynos_fb.c	/^	ushort vl_row;		\/* Number of rows (i.e. 480) *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:ushort	file:
vl_row	include/atmel_lcd.h	/^	ushort vl_row;		\/* Number of rows (i.e. 480) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_row	include/exynos_lcd.h	/^	ushort vl_row;		\/* Number of rows (i.e. 480) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_row	include/lcd.h	/^	ushort	vl_row;		\/* Number of rows (i.e. 100) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_row	include/mpc823_lcd.h	/^	ushort	vl_row;		\/* Number of rows (i.e. 480) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_row	include/pxa_lcd.h	/^	ushort	vl_row;		\/* Number of rows (i.e. 480) *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_splt	include/mpc823_lcd.h	/^	u_char	vl_splt; \/* Split display, 0 = single-scan, 1 = dual-scan *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_splt	include/pxa_lcd.h	/^	u_char	vl_splt;\/* Split display, 0 = single-scan, 1 = dual-scan *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_sync	include/atmel_lcd.h	/^	u_long vl_sync;		\/* Horizontal \/ vertical sync *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_tft	include/atmel_lcd.h	/^	u_long vl_tft;		\/* 0 = passive, 1 = TFT *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_tft	include/mpc823_lcd.h	/^	u_char	vl_tft;		\/* 0 = passive, 1 = TFT *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_tft	include/pxa_lcd.h	/^	u_char	vl_tft;		\/* 0 = passive, 1 = TFT *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_uberblock	include/zfs/vdev_impl.h	/^	char		vl_uberblock[VDEV_UBERBLOCK_RING];	\/* 128K	*\/$/;"	m	struct:vdev_label	typeref:typename:char[]
vl_upper_margin	include/atmel_lcd.h	/^	u_long vl_upper_margin;	\/* Time from sync to picture *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_vbpd	drivers/video/exynos/exynos_fb.c	/^	u_char	vl_vbpd;	\/* Wait end of frame *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_vbpd	include/exynos_lcd.h	/^	u_char	vl_vbpd;	\/* Wait end of frame *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vdev_phys	include/zfs/vdev_impl.h	/^	vdev_phys_t	vl_vdev_phys;				\/* 112K	*\/$/;"	m	struct:vdev_label	typeref:typename:vdev_phys_t
vl_vfpd	drivers/video/exynos/exynos_fb.c	/^	u_char	vl_vfpd;	\/* Wait before of frame *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_vfpd	include/exynos_lcd.h	/^	u_char	vl_vfpd;	\/* Wait before of frame *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vpw	include/mpc823_lcd.h	/^	u_char	vl_vpw;		\/* Vertical sync pulse width *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vpw	include/pxa_lcd.h	/^	u_char	vl_vpw;		\/* Vertical sync pulse width *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vsp	drivers/video/exynos/exynos_fb.c	/^	u_char vl_vsp;		\/* Vertical Sync polarity *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_vsp	include/exynos_lcd.h	/^	u_char vl_vsp;		\/* Vertical Sync polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vsp	include/mpc823_lcd.h	/^	u_char	vl_vsp;		\/* Vertical Sync polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vsp	include/pxa_lcd.h	/^	u_char	vl_vsp;		\/* Vertical Sync polarity *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vspw	drivers/video/exynos/exynos_fb.c	/^	u_char	vl_vspw;	\/* Vertical sync pulse width *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:u_char	file:
vl_vspw	include/exynos_lcd.h	/^	u_char	vl_vspw;	\/* Vertical sync pulse width *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_vsync_len	include/atmel_lcd.h	/^	u_long vl_vsync_len;	\/* Length of vertical sync *\/$/;"	m	struct:vidinfo	typeref:typename:u_long
vl_wbf	include/mpc823_lcd.h	/^	u_char	vl_wbf;		\/* Wait between frames *\/$/;"	m	struct:vidinfo	typeref:typename:u_char
vl_wbl	include/mpc823_lcd.h	/^	ushort	vl_wbl;		\/* Wait between lines *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_width	drivers/video/exynos/exynos_fb.c	/^	ushort vl_width;	\/* Width of display area in millimeters *\/$/;"	m	struct:exynos_fb_priv	typeref:typename:ushort	file:
vl_width	include/exynos_lcd.h	/^	ushort vl_width;	\/* Width of display area in millimeters *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_width	include/mpc823_lcd.h	/^	ushort	vl_width;	\/* Width of display area in millimeters *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vl_width	include/pxa_lcd.h	/^	ushort	vl_width;	\/* Width of display area in millimeters *\/$/;"	m	struct:vidinfo	typeref:typename:ushort
vlan	arch/x86/include/asm/me_common.h	/^	u32 vlan:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
vlan_access	include/vsc9953.h	/^	u32	vlan_access;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
vlan_byte_count	drivers/net/tsi108_eth.c	/^	vuint32 vlan_byte_count;\/* VLAN tag(top 2 bytes) and byte countt (bottom 2 bytes). *\/$/;"	m	struct:dma_descriptor	typeref:typename:vuint32	file:
vlan_cfg	include/vsc9953.h	/^	u32	vlan_cfg;$/;"	m	struct:vsc9953_ana_port	typeref:typename:u32
vlan_ethernet_hdr	include/net.h	/^struct vlan_ethernet_hdr {$/;"	s
vlan_etype_cfg	include/vsc9953.h	/^	u32	vlan_etype_cfg;$/;"	m	struct:vsc9953_sys_sys	typeref:typename:u32
vlan_learn_set	include/ethsw.h	/^	int (*vlan_learn_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
vlan_learn_show	include/ethsw.h	/^	int (*vlan_learn_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
vlan_learning_mode	drivers/net/vsc9953.c	/^enum vlan_learning_mode {$/;"	g	file:
vlan_mask	include/vsc9953.h	/^	u32	vlan_mask;$/;"	m	struct:vsc9953_ana_ana	typeref:typename:u32
vlan_set	include/ethsw.h	/^	int (*vlan_set)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
vlan_show	include/ethsw.h	/^	int (*vlan_show)(struct ethsw_command_def *parsed_cmd);$/;"	m	struct:ethsw_command_func	typeref:typename:int (*)(struct ethsw_command_def * parsed_cmd)
vlan_tag	drivers/net/rtl8169.c	/^	u32 vlan_tag;$/;"	m	struct:RxDesc	typeref:typename:u32	file:
vlan_tag	drivers/net/rtl8169.c	/^	u32 vlan_tag;$/;"	m	struct:TxDesc	typeref:typename:u32	file:
vlan_tidx	include/vsc9953.h	/^	u32	vlan_tidx;$/;"	m	struct:vsc9953_ana_ana_tables	typeref:typename:u32
vlan_to_string	net/net.c	/^void vlan_to_string(ushort x, char *s)$/;"	f	typeref:typename:void
vlanhash	drivers/net/calxedaxgmac.c	/^	u32 vlanhash;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
vlaninclude	drivers/net/calxedaxgmac.c	/^	u32 vlaninclude;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
vlantag	drivers/net/calxedaxgmac.c	/^	u32 vlantag;$/;"	m	struct:xgmac_regs	typeref:typename:u32	file:
vlantag	drivers/net/designware.h	/^	u32 vlantag;		\/* 0x1c *\/$/;"	m	struct:eth_mac_regs	typeref:typename:u32
vlantci	drivers/qe/uec.h	/^	u16  vlantci;             \/* default vlan tci *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
vlantype	drivers/qe/uec.h	/^	u16  vlantype;            \/* vlan type *\/$/;"	m	struct:uec_rx_global_pram	typeref:typename:u16
vld_not_set	drivers/video/ct69000.c	/^	int vld_not_set;	\/* value of VLD if bit2 in clock control is set *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
vld_set	drivers/video/ct69000.c	/^	int vld_set;		\/* value of VLD if bit2 in clock control is set *\/$/;"	m	struct:ctfb_chips_properties	typeref:typename:int	file:
vlev_ctr	drivers/video/rockchip/rk_hdmi.c	/^	u32 vlev_ctr;   \/* voltage level control *\/$/;"	m	struct:hdmi_phy_config	typeref:typename:u32	file:
vmain	arch/arm/dts/am57xx-idk-common.dtsi	/^	vmain: fixedregulator-vmain {$/;"	l
vmalloc	include/linux/compat.h	/^#define vmalloc(/;"	d
vmctrl	include/tsi148.h	/^	unsigned int vmctrl;                  \/* 0x234         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
vme8349_read_spd	board/esd/vme8349/vme8349.c	/^int vme8349_read_spd(uchar chip, uint addr, int alen, uchar *buffer, int len)$/;"	f	typeref:typename:int
vme_out_char	drivers/fpga/ivm_core.c	/^#define vme_out_char(/;"	d	file:
vme_out_hex	drivers/fpga/ivm_core.c	/^#define vme_out_hex(/;"	d	file:
vme_out_string	drivers/fpga/ivm_core.c	/^#define vme_out_string(/;"	d	file:
vmefl	include/tsi148.h	/^	unsigned int vmefl;                   \/* 0x250         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
vmesur_params_sn20	drivers/video/scf0403_lcd.c	/^static u16 vmesur_params_sn20[]		= {0x7F, 0x0F, 0x00};$/;"	v	typeref:typename:u16[]	file:
vmmc	arch/arm/dts/am335x-pxm2.dtsi	/^	vmmc: fixedregulator3 {$/;"	l
vmmc	arch/arm/dts/am335x-rut.dts	/^	vmmc: fixedregulator3 {$/;"	l
vmmc3_io_pin_i12_tvbox	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	vmmc3_io_pin_i12_tvbox: vmmc3_io_pin@0 {$/;"	l
vmmc3_pin_ap6xxx_wl_regon	arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts	/^	vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin@0 {$/;"	l
vmmc3_pin_bananapro	arch/arm/dts/sun7i-a20-bananapro.dts	/^	vmmc3_pin_bananapro: vmmc3_pin@0 {$/;"	l
vmmc3_pin_i12_tvbox	arch/arm/dts/sun7i-a20-i12-tvbox.dts	/^	vmmc3_pin_i12_tvbox: vmmc3_pin@0 {$/;"	l
vmmc_reg	arch/arm/dts/am335x-evm.dts	/^		vmmc_reg: regulator@12 {$/;"	l
vmmc_reg	arch/arm/dts/am335x-evmsk.dts	/^		vmmc_reg: regulator@12 {$/;"	l
vmmc_reg	arch/arm/dts/am335x-icev2.dts	/^		vmmc_reg: regulator@12 {$/;"	l
vmmc_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vmmc_reg: regulator@12 {$/;"	l
vmmc_reg	arch/arm/dts/tps65910.dtsi	/^		vmmc_reg: regulator@12 {$/;"	l
vmmcsd_fixed	arch/arm/dts/am335x-bone-common.dtsi	/^	vmmcsd_fixed: fixedregulator@0 {$/;"	l
vmmcsd_fixed	arch/arm/dts/am437x-gp-evm.dts	/^	vmmcsd_fixed: fixedregulator-sd {$/;"	l
vmmcsd_fixed	arch/arm/dts/am43x-epos-evm.dts	/^	vmmcsd_fixed: fixedregulator-sd {$/;"	l
vmmcwl_fixed	arch/arm/dts/am437x-gp-evm.dts	/^	vmmcwl_fixed: fixedregulator-mmcwl {$/;"	l
vmode	drivers/video/videomodes.h	/^	int vmode;		\/* see FB_VMODE_*		*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
vmode	include/linux/fb.h	/^	__u32 vmode;			\/* see FB_VMODE_*		*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
vmode	include/linux/fb.h	/^	u32 vmode;$/;"	m	struct:fb_videomode	typeref:typename:u32
vn	net/sntp.h	/^	uchar vn:3;$/;"	m	struct:sntp_pkt_t	typeref:typename:uchar:3
voidPix	scripts/kconfig/qconf.h	/^	QPixmap menuPix, menuInvPix, menuBackPix, voidPix;$/;"	m	class:ConfigList	typeref:typename:QPixmap
voidp	include/u-boot/zlib.h	/^   typedef Byte       *voidp;$/;"	t	typeref:typename:Byte *
voidp	include/u-boot/zlib.h	/^   typedef void       *voidp;$/;"	t	typeref:typename:void *
voidp	include/u-boot/zlib.h	/^#  define voidp /;"	d
voidpc	include/u-boot/zlib.h	/^   typedef Byte const *voidpc;$/;"	t	typeref:typename:Byte const *
voidpc	include/u-boot/zlib.h	/^   typedef void const *voidpc;$/;"	t	typeref:typename:void const *
voidpf	include/u-boot/zlib.h	/^   typedef Byte FAR   *voidpf;$/;"	t	typeref:typename:Byte FAR *
voidpf	include/u-boot/zlib.h	/^   typedef void FAR   *voidpf;$/;"	t	typeref:typename:void FAR *
voidpf	include/u-boot/zlib.h	/^#  define voidpf /;"	d
voidpf	include/u-boot/zlib.h	/^typedef voidpf (*alloc_func) OF((voidpf opaque, uInt items, uInt size));$/;"	t	typeref:typename:()(* alloc_func)OF ((voidpf opaque,uInt items,uInt size))
vol	drivers/mtd/ubi/ubi.h	/^	struct ubi_volume *vol;$/;"	m	struct:ubi_volume_desc	typeref:struct:ubi_volume *
vol	include/power/s5m8767.h	/^	const struct sec_voltage_desc *vol;$/;"	m	struct:s5m8767_para	typeref:typename:const struct sec_voltage_desc *
vol_addr	include/power/s5m8767.h	/^	u8	vol_addr;$/;"	m	struct:s5m8767_para	typeref:typename:u8
vol_attribute_show	drivers/mtd/ubi/vmt.c	/^static ssize_t vol_attribute_show(struct device *dev,$/;"	f	typeref:typename:ssize_t	file:
vol_bitmask	include/power/s5m8767.h	/^	u8	vol_bitmask;$/;"	m	struct:s5m8767_para	typeref:typename:u8
vol_bitpos	include/power/s5m8767.h	/^	u8	vol_bitpos;$/;"	m	struct:s5m8767_para	typeref:typename:u8
vol_count	drivers/mtd/ubi/ubi-media.h	/^	__be32 vol_count;$/;"	m	struct:ubi_fm_hdr	typeref:typename:__be32
vol_count	drivers/mtd/ubi/ubi.h	/^	int vol_count;$/;"	m	struct:ubi_device	typeref:typename:int
vol_id	drivers/mtd/ubi/ubi-media.h	/^	__be32  vol_id;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__be32
vol_id	drivers/mtd/ubi/ubi-media.h	/^	__be32 vol_id;$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__be32
vol_id	drivers/mtd/ubi/ubi.h	/^	int vol_id;$/;"	m	struct:ubi_ainf_peb	typeref:typename:int
vol_id	drivers/mtd/ubi/ubi.h	/^	int vol_id;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
vol_id	drivers/mtd/ubi/ubi.h	/^	int vol_id;$/;"	m	struct:ubi_ltree_entry	typeref:typename:int
vol_id	drivers/mtd/ubi/ubi.h	/^	int vol_id;$/;"	m	struct:ubi_volume	typeref:typename:int
vol_id	drivers/mtd/ubi/ubi.h	/^	int vol_id;$/;"	m	struct:ubi_work	typeref:typename:int
vol_id	include/linux/mtd/ubi.h	/^	int vol_id;$/;"	m	struct:ubi_volume_info	typeref:typename:int
vol_id	include/mtd/ubi-user.h	/^		__s32 vol_id;$/;"	m	struct:ubi_rnvol_req::__anon7822496e0308	typeref:typename:__s32
vol_id	include/mtd/ubi-user.h	/^	__s32 vol_id;$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s32
vol_id	include/mtd/ubi-user.h	/^	__s32 vol_id;$/;"	m	struct:ubi_rsvol_req	typeref:typename:__s32
vol_id	include/ubispl.h	/^	int		vol_id;$/;"	m	struct:ubispl_load	typeref:typename:int
vol_id2idx	drivers/mtd/ubi/ubi.h	/^static inline int vol_id2idx(const struct ubi_device *ubi, int vol_id)$/;"	f	typeref:typename:int
vol_release	drivers/mtd/ubi/vmt.c	/^static void vol_release(struct device *dev)$/;"	f	typeref:typename:void	file:
vol_type	drivers/mtd/ubi/ubi-media.h	/^	__u8    vol_type;$/;"	m	struct:ubi_vid_hdr	typeref:typename:__u8
vol_type	drivers/mtd/ubi/ubi-media.h	/^	__u8    vol_type;$/;"	m	struct:ubi_vtbl_record	typeref:typename:__u8
vol_type	drivers/mtd/ubi/ubi-media.h	/^	__u8 vol_type;$/;"	m	struct:ubi_fm_volhdr	typeref:typename:__u8
vol_type	drivers/mtd/ubi/ubi.h	/^	int vol_type;$/;"	m	struct:ubi_ainf_volume	typeref:typename:int
vol_type	drivers/mtd/ubi/ubi.h	/^	int vol_type;$/;"	m	struct:ubi_volume	typeref:typename:int
vol_type	include/linux/mtd/ubi.h	/^	int vol_type;$/;"	m	struct:ubi_volume_info	typeref:typename:int
vol_type	include/mtd/ubi-user.h	/^	__s8 vol_type;$/;"	m	struct:ubi_mkvol_req	typeref:typename:__s8
volid	disk/part_iso.h	/^	char					volid[32];		\/* volume Identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[32]
volid	disk/part_iso.h	/^	char					volid[32];		\/* volume Identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[32]
volid	disk/part_iso.h	/^	char					volid[32];		\/* volume partition Identifier *\/$/;"	m	struct:iso_part_rec	typeref:typename:char[32]
volinfo	drivers/mtd/ubispl/ubispl.h	/^	struct ubi_vol_info		volinfo[UBI_SPL_VOL_IDS];$/;"	m	struct:ubi_scan_info	typeref:struct:ubi_vol_info[]
vols_found	drivers/mtd/ubi/ubi.h	/^	int vols_found;$/;"	m	struct:ubi_attach_info	typeref:typename:int
volsetid	disk/part_iso.h	/^	char					volsetid[128];\/* Volume set identifier *\/$/;"	m	struct:iso_pri_rec	typeref:typename:char[128]
volsetid	disk/part_iso.h	/^	char					volsetid[128];\/* Volume set identifier *\/$/;"	m	struct:iso_sup_rec	typeref:typename:char[128]
volsiz_BE	disk/part_iso.h	/^	unsigned int volsiz_BE;		\/* volume size Big Endian *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
volsiz_BE	disk/part_iso.h	/^	unsigned int volsiz_BE;		\/* volume size Big Endian *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
volsiz_LE	disk/part_iso.h	/^	unsigned int volsiz_LE;		\/* volume size Little Endian *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned int
volsiz_LE	disk/part_iso.h	/^	unsigned int volsiz_LE;		\/* volume size Little Endian *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned int
volt_reg	include/power/regulator.h	/^	u8 volt_reg;$/;"	m	struct:dm_regulator_uclass_platdata	typeref:typename:u8
volt_table	drivers/power/regulator/pfuze100.c	/^	unsigned int *volt_table;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int *	file:
volt_uV	drivers/power/regulator/pwm_regulator.c	/^	unsigned int volt_uV;$/;"	m	struct:pwm_regulator_info	typeref:typename:unsigned int	file:
voltage	board/freescale/b4860qds/b4860qds.c	/^		unsigned voltage;$/;"	m	struct:adjust_vdd::vdd_drive	typeref:typename:unsigned	file:
voltage	board/freescale/common/vid.c	/^		unsigned voltage;$/;"	m	struct:adjust_vdd::vdd_drive	typeref:typename:unsigned	file:
voltage	board/freescale/t4qds/t4240qds.c	/^		unsigned voltage;$/;"	m	struct:adjust_vdd::vdd_drive	typeref:typename:unsigned	file:
voltage	drivers/power/regulator/pfuze100.c	/^	unsigned int voltage;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int	file:
voltage	include/ddr_spd.h	/^	unsigned char voltage;     \/*  8 Voltage intf std of this assembly *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
voltage	include/ddr_spd.h	/^	unsigned char voltage;     \/*  8 Voltage intf std of this assembly *\/$/;"	m	struct:ddr2_spd_eeprom_s	typeref:typename:unsigned char
voltage	include/smbios.h	/^	u8 voltage;$/;"	m	struct:smbios_type4	typeref:typename:u8
voltage	include/spd.h	/^	unsigned char voltage;     \/*  8 Voltage intf std of this assembly *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
voltage	test/dm/regulator.c	/^	int voltage;$/;"	m	struct:setting	typeref:typename:int	file:
voltage_ac	include/ec_commands.h	/^	uint16_t voltage_ac;$/;"	m	struct:ec_response_power_info	typeref:typename:uint16_t
voltage_map	drivers/power/regulator/act8846.c	/^static const u16 voltage_map[] = {$/;"	v	typeref:typename:const u16[]	file:
voltage_names	drivers/video/rockchip/rk_edp.c	/^static const char * const voltage_names[] = {$/;"	v	typeref:typename:const char * const[]	file:
voltage_set	drivers/pcmcia/ti_pci1410a.c	/^static int voltage_set(int slot, int vcc, int vpp)$/;"	f	typeref:typename:int	file:
voltage_swing_level	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^enum voltage_swing_level {$/;"	g
voltage_system	include/ec_commands.h	/^	uint16_t voltage_system;$/;"	m	struct:ec_response_power_info	typeref:typename:uint16_t
voltage_uV	include/power/battery.h	/^	unsigned int voltage_uV;$/;"	m	struct:battery	typeref:typename:unsigned int
voltage_update	board/siemens/pxm2/board.c	/^int voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)$/;"	f	typeref:typename:int
voltages	arch/arm/mach-davinci/include/mach/sdmmc_defs.h	/^	uint voltages;		\/* Host supported voltages *\/$/;"	m	struct:davinci_mmc	typeref:typename:uint
voltages	drivers/mmc/arm_pl180_mmci.h	/^	unsigned int voltages;$/;"	m	struct:pl180_mmc_host	typeref:typename:unsigned int
voltages	drivers/power/regulator/gpio-regulator.c	/^	int voltages[GPIO_REGULATOR_MAX_STATES];$/;"	m	struct:gpio_regulator_platdata	typeref:typename:int[]	file:
voltages	include/mmc.h	/^	uint voltages;$/;"	m	struct:mmc_config	typeref:typename:uint
voltages	include/sdhci.h	/^	uint	voltages;$/;"	m	struct:sdhci_host	typeref:typename:uint
volts	arch/arm/include/asm/omap_common.h	/^struct volts {$/;"	s
volts_efuse_data	arch/arm/include/asm/omap_common.h	/^struct volts_efuse_data {$/;"	s
volume_dev_attrs	drivers/mtd/ubi/vmt.c	/^static struct attribute *volume_dev_attrs[] = {$/;"	v	typeref:struct:attribute * []	file:
volume_id	include/fat.h	/^	__u8 volume_id[4];	\/* Volume ID number *\/$/;"	m	struct:volume_info	typeref:typename:__u8[4]
volume_info	include/fat.h	/^typedef struct volume_info$/;"	s
volume_info	include/fat.h	/^} volume_info;$/;"	t	typeref:struct:volume_info
volume_keys_s0	arch/arm/dts/am335x-evm.dts	/^	volume_keys_s0: volume_keys_s0 {$/;"	l
volume_label	include/fat.h	/^	char volume_label[11];	\/* Volume label *\/$/;"	m	struct:volume_info	typeref:typename:char[11]
volume_name	include/ext_common.h	/^	char volume_name[16];$/;"	m	struct:ext2_sblock	typeref:typename:char[16]
volume_sysfs_close	include/linux/compat.h	/^#define volume_sysfs_close(/;"	d
volume_sysfs_init	include/linux/compat.h	/^#define volume_sysfs_init(/;"	d
volumeflags	disk/part_iso.h	/^	unsigned char volumeflags;	\/* if bit 0 = 0 => all escape sequences are according ISO 2375 *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char
volumes	drivers/mtd/ubi/ubi.h	/^	struct rb_root volumes;$/;"	m	struct:ubi_attach_info	typeref:struct:rb_root
volumes	drivers/mtd/ubi/ubi.h	/^	struct ubi_volume *volumes[UBI_MAX_VOLUMES+UBI_INT_VOL_COUNT];$/;"	m	struct:ubi_device	typeref:struct:ubi_volume * []
volumes_lock	drivers/mtd/ubi/ubi.h	/^	spinlock_t volumes_lock;$/;"	m	struct:ubi_device	typeref:typename:spinlock_t
vop0_pwm_pin	arch/arm/dts/rk3399.dtsi	/^			vop0_pwm_pin: vop0-pwm-pin {$/;"	l
vop1_pwm_pin	arch/arm/dts/rk3399.dtsi	/^			vop1_pwm_pin: vop1-pwm-pin {$/;"	l
vop_modes	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^enum vop_modes {$/;"	g
vopb	arch/arm/dts/rk3288.dtsi	/^	vopb: vop@ff930000 {$/;"	l
vopb_mmu	arch/arm/dts/rk3288.dtsi	/^	vopb_mmu: iommu@ff930300 {$/;"	l
vopb_out	arch/arm/dts/rk3288.dtsi	/^		vopb_out: port {$/;"	l	label:vopb
vopb_out_edp	arch/arm/dts/rk3288.dtsi	/^			vopb_out_edp: endpoint@0 {$/;"	l	label:vopb.vopb_out
vopb_out_hdmi	arch/arm/dts/rk3288.dtsi	/^			vopb_out_hdmi: endpoint@1 {$/;"	l	label:vopb.vopb_out
vopb_out_lvds	arch/arm/dts/rk3288.dtsi	/^			vopb_out_lvds: endpoint@2 {$/;"	l	label:vopb.vopb_out
vopl	arch/arm/dts/rk3288.dtsi	/^	vopl: vop@ff940000 {$/;"	l
vopl_mmu	arch/arm/dts/rk3288.dtsi	/^	vopl_mmu: iommu@ff940300 {$/;"	l
vopl_out	arch/arm/dts/rk3288.dtsi	/^		vopl_out: port {$/;"	l	label:vopl
vopl_out_edp	arch/arm/dts/rk3288.dtsi	/^			vopl_out_edp: endpoint@0 {$/;"	l	label:vopl.vopl_out
vopl_out_hdmi	arch/arm/dts/rk3288.dtsi	/^			vopl_out_hdmi: endpoint@1 {$/;"	l	label:vopl.vopl_out
vopl_out_lvds	arch/arm/dts/rk3288.dtsi	/^			vopl_out_lvds: endpoint@2 {$/;"	l	label:vopl.vopl_out
vote_ctrl	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 vote_ctrl;$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
vote_stat	arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h	/^	u32 vote_stat;		\/*0x9a4*\/$/;"	m	struct:alwayson_sc_regs	typeref:typename:u32
vouckcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 vouckcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
vp	arch/powerpc/include/asm/mmu.h	/^	unsigned long vp:1;	\/* User valid *\/$/;"	m	struct:_BATU	typeref:typename:unsigned long:1
vp_conf	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_conf;			\/* 0x804 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_conf	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_conf;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_int	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_int;			\/* 0x806 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_int	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_int;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_mask	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_mask;			\/* 0x807 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_mask	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_mask;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_nvlist	include/zfs/vdev_impl.h	/^	char		vp_nvlist[VDEV_PHYS_SIZE - sizeof(zio_eck_t)];$/;"	m	struct:vdev_phys	typeref:typename:char[]
vp_pol	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_pol;			\/* 0x808 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_pol	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_pol;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_pr_cd	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_pr_cd;			\/* 0x801 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_pr_cd	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_pr_cd;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_remap	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_remap;			\/* 0x803 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_remap	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_remap;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_stat	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_stat;			\/* 0x805 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_stat	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_stat;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_status	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_status;			\/* 0x800 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_status	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_status;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_stuff	arch/arm/include/asm/arch-mx6/mxc_hdmi.h	/^	u8 vp_stuff;			\/* 0x802 *\/$/;"	m	struct:hdmi_regs	typeref:typename:u8
vp_stuff	arch/arm/include/asm/arch-rockchip/hdmi_rk3288.h	/^	u32 vp_stuff;$/;"	m	struct:rk3288_hdmi	typeref:typename:u32
vp_zbt	include/zfs/vdev_impl.h	/^	zio_eck_t	vp_zbt;$/;"	m	struct:vdev_phys	typeref:typename:zio_eck_t
vpaned	scripts/kconfig/gconf.c	/^GtkWidget *vpaned = NULL;$/;"	v	typeref:typename:GtkWidget *
vpaned1	scripts/kconfig/gconf.glade	/^	    <widget class="GtkVPaned" id="vpaned1">$/;"	i
vpd_region	arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h	/^struct __packed vpd_region {$/;"	s
vpd_region	arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h	/^struct __packed vpd_region {$/;"	s
vpfe0	arch/arm/dts/am4372.dtsi	/^		vpfe0: vpfe@48326000 {$/;"	l
vpfe0_ep	arch/arm/dts/am437x-gp-evm.dts	/^		vpfe0_ep: endpoint {$/;"	l
vpfe0_ep	arch/arm/dts/am437x-sk-evm.dts	/^		vpfe0_ep: endpoint {$/;"	l
vpfe0_pins_default	arch/arm/dts/am437x-gp-evm.dts	/^	vpfe0_pins_default: vpfe0_pins_default {$/;"	l
vpfe0_pins_default	arch/arm/dts/am437x-sk-evm.dts	/^	vpfe0_pins_default: vpfe0_pins_default {$/;"	l
vpfe0_pins_sleep	arch/arm/dts/am437x-gp-evm.dts	/^	vpfe0_pins_sleep: vpfe0_pins_sleep {$/;"	l
vpfe0_pins_sleep	arch/arm/dts/am437x-sk-evm.dts	/^	vpfe0_pins_sleep: vpfe0_pins_sleep {$/;"	l
vpfe1	arch/arm/dts/am4372.dtsi	/^		vpfe1: vpfe@48328000 {$/;"	l
vpfe1_ep	arch/arm/dts/am437x-gp-evm.dts	/^		vpfe1_ep: endpoint {$/;"	l
vpfe1_ep	arch/arm/dts/am43x-epos-evm.dts	/^		vpfe1_ep: endpoint {$/;"	l
vpfe1_pins_default	arch/arm/dts/am437x-gp-evm.dts	/^	vpfe1_pins_default: vpfe1_pins_default {$/;"	l
vpfe1_pins_default	arch/arm/dts/am43x-epos-evm.dts	/^		vpfe1_pins_default: vpfe1_pins_default {$/;"	l
vpfe1_pins_sleep	arch/arm/dts/am437x-gp-evm.dts	/^	vpfe1_pins_sleep: vpfe1_pins_sleep {$/;"	l
vpfe1_pins_sleep	arch/arm/dts/am43x-epos-evm.dts	/^		vpfe1_pins_sleep: vpfe1_pins_sleep {$/;"	l
vphy_calctl_reg	drivers/phy/marvell/comphy_a3700.h	/^#define vphy_calctl_reg	/;"	d
vphy_loopback_reg0	drivers/phy/marvell/comphy_a3700.h	/^#define vphy_loopback_reg0	/;"	d
vphy_power_reg0	drivers/phy/marvell/comphy_a3700.h	/^#define vphy_power_reg0	/;"	d
vphy_reserve_reg	drivers/phy/marvell/comphy_a3700.h	/^#define vphy_reserve_reg	/;"	d
vphy_sync_pattern_reg	drivers/phy/marvell/comphy_a3700.h	/^#define vphy_sync_pattern_reg	/;"	d
vplatacc	board/freescale/common/pixis.h	/^	u8 vplatacc[4];$/;"	m	struct:pixis	typeref:typename:u8[4]
vplatcnt	board/freescale/common/pixis.h	/^	u8 vplatcnt[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
vplatmax	board/freescale/common/pixis.h	/^	u8 vplatmax[2];$/;"	m	struct:pixis	typeref:typename:u8[2]
vplen	drivers/usb/musb/musb_core.h	/^	u8	vplen;$/;"	m	struct:musb_regs	typeref:typename:u8
vpll_con	arch/arm/include/asm/arch-rockchip/cru_rk3399.h	/^	u32 vpll_con[6];$/;"	m	struct:rk3399_cru	typeref:typename:u32[6]
vpll_con	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	vpll_con;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
vpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con0;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
vpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con0;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
vpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con0;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
vpll_con0	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con0;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
vpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con1;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
vpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con1;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
vpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con1;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
vpll_con1	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con1;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
vpll_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con2;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
vpll_con2	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_con2;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
vpll_init	arch/arm/mach-uniphier/clk/pll-ld4.c	/^static void vpll_init(void)$/;"	f	typeref:typename:void	file:
vpll_init	arch/arm/mach-uniphier/clk/pll-pro4.c	/^static void vpll_init(void)$/;"	f	typeref:typename:void	file:
vpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_lock;$/;"	m	struct:exynos4_clock	typeref:typename:unsigned int
vpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_lock;$/;"	m	struct:exynos4x12_clock	typeref:typename:unsigned int
vpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_lock;$/;"	m	struct:exynos5420_clock	typeref:typename:unsigned int
vpll_lock	arch/arm/mach-exynos/include/mach/clock.h	/^	unsigned int	vpll_lock;$/;"	m	struct:exynos5_clock	typeref:typename:unsigned int
vpll_lock	arch/arm/mach-s5pc1xx/include/mach/clock.h	/^	unsigned int	vpll_lock;$/;"	m	struct:s5pc110_clock	typeref:typename:unsigned int
vpll_mdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned vpll_mdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
vpll_pdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned vpll_pdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
vpll_reg	arch/arm/dts/am335x-evm.dts	/^		vpll_reg: regulator@7 {$/;"	l
vpll_reg	arch/arm/dts/am335x-evmsk.dts	/^		vpll_reg: regulator@7 {$/;"	l
vpll_reg	arch/arm/dts/am335x-icev2.dts	/^		vpll_reg: regulator@7 {$/;"	l
vpll_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vpll_reg: regulator@7 {$/;"	l
vpll_reg	arch/arm/dts/tps65910.dtsi	/^		vpll_reg: regulator@7 {$/;"	l
vpll_sdiv	arch/arm/mach-exynos/clock_init.h	/^	unsigned vpll_sdiv;$/;"	m	struct:mem_timings	typeref:typename:unsigned
vpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
vpll_sysclk_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
vpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
vpll_sysclk_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
vpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
vpll_sysclk_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
vpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
vpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
vpll_sysclk_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	vpll_sysclk_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
vpp_ble	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vpp_ble;			\/* 0xa14 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_ble	arch/arm/include/asm/arch/display.h	/^	u32 vpp_ble;			\/* 0xa14 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_dcti	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vpp_dcti;			\/* 0xa04 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_dcti	arch/arm/include/asm/arch/display.h	/^	u32 vpp_dcti;			\/* 0xa04 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_enable	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vpp_enable;			\/* 0xa00 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_enable	arch/arm/include/asm/arch/display.h	/^	u32 vpp_enable;			\/* 0xa00 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_lp1	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vpp_lp1;			\/* 0xa08 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_lp1	arch/arm/include/asm/arch/display.h	/^	u32 vpp_lp1;			\/* 0xa08 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_lp2	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vpp_lp2;			\/* 0xa0c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_lp2	arch/arm/include/asm/arch/display.h	/^	u32 vpp_lp2;			\/* 0xa0c *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_max	include/mtd/cfi_flash.h	/^	u8	vpp_max;$/;"	m	struct:cfi_qry	typeref:typename:u8
vpp_min	include/mtd/cfi_flash.h	/^	u8	vpp_min;$/;"	m	struct:cfi_qry	typeref:typename:u8
vpp_wle	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vpp_wle;			\/* 0xa10 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vpp_wle	arch/arm/include/asm/arch/display.h	/^	u32 vpp_wle;			\/* 0xa10 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
vprBase	include/video_fb.h	/^    unsigned int vprBase;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
vprintf	include/common.h	/^#define vprintf(/;"	d
vprintf	lib/tiny-printf.c	/^int vprintf(const char *fmt, va_list va)$/;"	f	typeref:typename:int
vprintf	lib/vsprintf.c	/^int vprintf(const char *fmt, va_list args)$/;"	f	typeref:typename:int
vpss_clkctl	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	vpss_clkctl;	\/* 0x44 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
vpt2p	drivers/net/mvgbe.h	/^	u32 vpt2p;$/;"	m	struct:mvgbe_registers	typeref:typename:u32
vpu	arch/arm/dts/imx6qdl.dtsi	/^			vpu: vpu@02040000 {$/;"	l
vpu	arch/arm/dts/rk3288.dtsi	/^	vpu: video-codec@ff9a0000 {$/;"	l
vpu_mmu	arch/arm/dts/rk3288.dtsi	/^	vpu_mmu: iommu@ff9a0800 {$/;"	l
vpw	arch/m68k/include/asm/coldfire/lcd.h	/^	u32 vpw;		\/* 0x08 Virtual Page Width Register *\/$/;"	m	struct:lcd_ctrl	typeref:typename:u32
vr	arch/arm/mach-at91/include/mach/at91_rtt.h	/^	u32	vr;	\/* Value Register  RO 0x00000000 *\/$/;"	m	struct:at91_rtt	typeref:typename:u32
vr	arch/powerpc/include/asm/processor.h	/^	vector128	vr[32];		\/* Complete AltiVec set *\/$/;"	m	struct:thread_struct	typeref:typename:vector128[32]
vrai_bs	include/universe.h	/^	unsigned int vrai_bs;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vrai_ctl	include/universe.h	/^	unsigned int vrai_ctl;$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int
vram_ddr	drivers/video/ati_radeon_fb.h	/^	int			vram_ddr;$/;"	m	struct:radeonfb_info	typeref:typename:int
vram_pages	arch/arm/include/asm/setup.h	/^	u32 vram_pages;$/;"	m	struct:tag_acorn	typeref:typename:u32
vram_phys	drivers/video/da8xx-fb.c	/^	dma_addr_t		vram_phys;$/;"	m	struct:da8xx_fb_par	typeref:typename:dma_addr_t	file:
vram_size	drivers/video/da8xx-fb.c	/^	unsigned long		vram_size;$/;"	m	struct:da8xx_fb_par	typeref:typename:unsigned long	file:
vram_virt	drivers/video/da8xx-fb.c	/^	void			*vram_virt;$/;"	m	struct:da8xx_fb_par	typeref:typename:void *	file:
vram_width	drivers/video/ati_radeon_fb.h	/^	int			vram_width;$/;"	m	struct:radeonfb_info	typeref:typename:int
vrec_header	tools/imagetool.h	/^	int (*vrec_header) (struct image_tool_params *,$/;"	m	struct:image_type_params	typeref:typename:int (*)(struct image_tool_params *,struct image_type_params *)
vref	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t vref[NUM_CHANNELS][NUM_BYTE_LANES];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[][]
vref	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 vref = 0x4;$/;"	v	typeref:typename:u32
vref_codes	arch/x86/cpu/quark/mrc_util.c	/^static const uint8_t vref_codes[64] = {$/;"	v	typeref:typename:const uint8_t[64]	file:
vref_en	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 vref_en:1;$/;"	m	struct:xm2cfga_reg::__anon24552f890108	typeref:typename:u32:1	file:
vref_en	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 vref_en:1;$/;"	m	struct:xm2cfgd_reg::__anon24552f890208	typeref:typename:u32:1	file:
vref_pin_mux	board/siemens/rut/mux.c	/^static struct module_pin_mux vref_pin_mux[] = {$/;"	v	typeref:struct:module_pin_mux[]	file:
vref_window_size	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u8 vref_window_size[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:typename:u8[][]
vref_window_size_th	drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c	/^u8 vref_window_size_th = 12;$/;"	v	typeref:typename:u8
vrefcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 vrefcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
vrefn	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int vrefn;$/;"	m	struct:pad_signals	typeref:typename:int
vrefp	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int vrefp;$/;"	m	struct:pad_signals	typeref:typename:int
vrefqe_r0	include/ddr_spd.h	/^			uint8_t vrefqe_r0;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
vrefqe_r1	include/ddr_spd.h	/^			uint8_t vrefqe_r1;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
vrefqe_r2	include/ddr_spd.h	/^			uint8_t vrefqe_r2;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
vrefqe_r3	include/ddr_spd.h	/^			uint8_t vrefqe_r3;$/;"	m	struct:ddr4_spd_eeprom_s::__anoncde79dee040a::__anoncde79dee0708	typeref:typename:uint8_t
vrsave	arch/powerpc/include/asm/processor.h	/^	unsigned long	vrsave;$/;"	m	struct:thread_struct	typeref:typename:unsigned long
vrtc_reg	arch/arm/dts/am335x-evm.dts	/^		vrtc_reg: regulator@0 {$/;"	l
vrtc_reg	arch/arm/dts/am335x-evmsk.dts	/^		vrtc_reg: regulator@0 {$/;"	l
vrtc_reg	arch/arm/dts/am335x-icev2.dts	/^		vrtc_reg: regulator@0 {$/;"	l
vrtc_reg	arch/arm/dts/am335x-pxm2.dtsi	/^		vrtc_reg: regulator@0 {$/;"	l
vrtc_reg	arch/arm/dts/tps65910.dtsi	/^		vrtc_reg: regulator@0 {$/;"	l
vs	arch/powerpc/include/asm/mmu.h	/^	unsigned long vs:1;	\/* Supervisor valid *\/$/;"	m	struct:_BATU	typeref:typename:unsigned long:1
vs	drivers/block/dwc_ahsata.c	/^	u32 vs;$/;"	m	struct:sata_host_regs	typeref:typename:u32	file:
vs_ext_stop_x__vs_ext_start_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 vs_ext_stop_x__vs_ext_start_y;	\/* 0x84 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
vs_ext_stop_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 vs_ext_stop_y;			\/* 0x88 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
vs_int_start_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 vs_int_start_x;			\/* 0x78 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
vs_int_stop_x__vs_int_start_y	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 vs_int_stop_x__vs_int_start_y;	\/* 0x7C *\/$/;"	m	struct:venc_regs	typeref:typename:u32
vs_int_stop_y__vs_ext_start_x	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 vs_int_stop_y__vs_ext_start_x;	\/* 0x80 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
vsata_ctrl_reg	drivers/phy/marvell/comphy_a3700.h	/^#define vsata_ctrl_reg	/;"	d
vsc08_rx_amc	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc08_rx_amc[4][2] = { {2, 3}, {3, 4}, {4, 7}, {5, 1} };$/;"	v	typeref:typename:const int8_t[4][2]
vsc08_rx_sfp	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc08_rx_sfp[4][2] = { {1, 3}, {0, 4}, {6, 7}, {7, 1} };$/;"	v	typeref:typename:const int8_t[4][2]
vsc08_tx_amc	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc08_tx_amc[4][2] = { {2, 2}, {3, 3}, {7, 4}, {1, 5} };$/;"	v	typeref:typename:const int8_t[4][2]
vsc08_tx_sfp	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc08_tx_sfp[4][2] = { {2, 1}, {3, 0}, {7, 6}, {1, 7} };$/;"	v	typeref:typename:const int8_t[4][2]
vsc16_rx_4sfp_sgmii_12_56	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_rx_4sfp_sgmii_12_56[8][2] = { {8, 15}, {0, 1},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_rx_4sfp_sgmii_34	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc16_rx_4sfp_sgmii_34[8][2] = { {8, 15}, {0, 1},$/;"	v	typeref:typename:const int8_t[8][2]
vsc16_rx_amc	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc16_rx_amc[8][2] = { {3, 15}, {2, 1}, {4, 8}, {10, 9},$/;"	v	typeref:typename:const int8_t[8][2]
vsc16_rx_aurora	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc16_rx_aurora[8][2] = { {13, 3}, {12, 12}, {-1, -1},$/;"	v	typeref:typename:const int8_t[8][2]
vsc16_rx_sfp	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_rx_sfp[8][2] = { {8, 15}, {0, 1}, {7, 8}, {1, 9},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_rx_sfp_sgmii_aurora	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_rx_sfp_sgmii_aurora[8][2] = { {8, 15}, {0, 1},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_rx_sgmii_lane_cd	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_rx_sgmii_lane_cd[8][2] = { {14, 11}, {15, 10},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_tx_4sfp_sgmii_12_56	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_tx_4sfp_sgmii_12_56[8][2] = { {15, 7}, {0, 1},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_tx_4sfp_sgmii_34	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc16_tx_4sfp_sgmii_34[8][2] = { {15, 7}, {0, 1},$/;"	v	typeref:typename:const int8_t[8][2]
vsc16_tx_amc	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc16_tx_amc[8][2] = { {15, 3}, {0, 2}, {7, 4}, {9, 10},$/;"	v	typeref:typename:const int8_t[8][2]
vsc16_tx_aurora	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static const int8_t vsc16_tx_aurora[8][2] = { {2, 13}, {12, 12}, {-1, -1},$/;"	v	typeref:typename:const int8_t[8][2]
vsc16_tx_sfp	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_tx_sfp[8][2] = { {15, 7}, {0, 1}, {7, 8}, {9, 0},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_tx_sfp_sgmii_aurora	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_tx_sfp_sgmii_aurora[8][2] = { {15, 7}, {0, 1},$/;"	v	typeref:typename:int8_t[8][2]
vsc16_tx_sgmii_lane_cd	board/freescale/b4860qds/b4860qds_crossbar_con.h	/^static int8_t vsc16_tx_sgmii_lane_cd[8][2] = { {5, 14}, {4, 15},$/;"	v	typeref:typename:int8_t[8][2]
vsc3308_config	board/freescale/common/vsc3316_3308.c	/^int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2],$/;"	f	typeref:typename:int
vsc3308_config_adjust	board/freescale/common/vsc3316_3308.c	/^int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2],$/;"	f	typeref:typename:int
vsc3316_config	board/freescale/common/vsc3316_3308.c	/^int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],$/;"	f	typeref:typename:int
vsc3316_fsm1_rx	board/freescale/t4qds/t4240qds.c	/^static int8_t vsc3316_fsm1_rx[8][2] = { {2, 12}, {3, 13}, {4, 5}, {5, 4},$/;"	v	typeref:typename:int8_t[8][2]	file:
vsc3316_fsm1_tx	board/freescale/t4qds/t4240qds.c	/^static int8_t vsc3316_fsm1_tx[8][2] = { {0, 0}, {1, 1}, {6, 6}, {7, 7},$/;"	v	typeref:typename:int8_t[8][2]	file:
vsc3316_fsm2_rx	board/freescale/t4qds/t4240qds.c	/^static int8_t vsc3316_fsm2_rx[8][2] = { {0, 15}, {1, 14}, {6, 7}, {7, 6},$/;"	v	typeref:typename:int8_t[8][2]	file:
vsc3316_fsm2_tx	board/freescale/t4qds/t4240qds.c	/^static int8_t vsc3316_fsm2_tx[8][2] = { {2, 2}, {3, 3}, {4, 4}, {5, 5},$/;"	v	typeref:typename:int8_t[8][2]	file:
vsc7385_upload_firmware	drivers/net/vsc7385.c	/^int vsc7385_upload_firmware(void *firmware, unsigned int size)$/;"	f	typeref:typename:int
vsc8514_config	drivers/net/phy/vitesse.c	/^static int vsc8514_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vsc8574_config	drivers/net/phy/vitesse.c	/^static int vsc8574_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vsc8601_config	drivers/net/phy/vitesse.c	/^static int vsc8601_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vsc8664_config	drivers/net/phy/vitesse.c	/^static int vsc8664_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
vsc9953_aggr_code_set	drivers/net/vsc9953.c	/^static int vsc9953_aggr_code_set(enum aggr_code_mode ac)$/;"	f	typeref:typename:int	file:
vsc9953_aggr_grp_members_get	drivers/net/vsc9953.c	/^static void vsc9953_aggr_grp_members_get(int aggr_grp,$/;"	f	typeref:typename:void	file:
vsc9953_aggr_mask_get_next	drivers/net/vsc9953.c	/^static u32 vsc9953_aggr_mask_get_next(u32 aggr_mask, u32 member_bitfield)$/;"	f	typeref:typename:u32	file:
vsc9953_aggr_membr_bitfield_get	drivers/net/vsc9953.c	/^static u32 vsc9953_aggr_membr_bitfield_get(u8 member[VSC9953_MAX_PORTS])$/;"	f	typeref:typename:u32	file:
vsc9953_ana_ana	include/vsc9953.h	/^struct vsc9953_ana_ana {$/;"	s
vsc9953_ana_ana_tables	include/vsc9953.h	/^struct vsc9953_ana_ana_tables {$/;"	s
vsc9953_ana_common	include/vsc9953.h	/^struct vsc9953_ana_common {$/;"	s
vsc9953_ana_pfc	include/vsc9953.h	/^struct vsc9953_ana_pfc {$/;"	s
vsc9953_ana_pgid	include/vsc9953.h	/^struct vsc9953_ana_pgid {$/;"	s
vsc9953_ana_pol	include/vsc9953.h	/^struct vsc9953_ana_pol {$/;"	s
vsc9953_ana_pol_misc	include/vsc9953.h	/^struct vsc9953_ana_pol_misc {$/;"	s
vsc9953_ana_port	include/vsc9953.h	/^struct vsc9953_ana_port {$/;"	s
vsc9953_analyzer	include/vsc9953.h	/^struct vsc9953_analyzer {$/;"	s
vsc9953_autoage_time_set	drivers/net/vsc9953.c	/^static int vsc9953_autoage_time_set(int age_period)$/;"	f	typeref:typename:int	file:
vsc9953_chip_regs	include/vsc9953.h	/^struct vsc9953_chip_regs {$/;"	s
vsc9953_cmd_func	drivers/net/vsc9953.c	/^static struct ethsw_command_func vsc9953_cmd_func = {$/;"	v	typeref:struct:ethsw_command_func	file:
vsc9953_default_configuration	drivers/net/vsc9953.c	/^void vsc9953_default_configuration(void)$/;"	f	typeref:typename:void
vsc9953_dev_gmii	include/vsc9953.h	/^struct vsc9953_dev_gmii {$/;"	s
vsc9953_dev_gmii_mac_cfg_status	include/vsc9953.h	/^struct vsc9953_dev_gmii_mac_cfg_status {$/;"	s
vsc9953_dev_gmii_port_mode	include/vsc9953.h	/^struct vsc9953_dev_gmii_port_mode {$/;"	s
vsc9953_devcpu_gcb	include/vsc9953.h	/^struct vsc9953_devcpu_gcb {$/;"	s
vsc9953_drop_cntrs	include/vsc9953.h	/^struct vsc9953_drop_cntrs {$/;"	s
vsc9953_egr_vlan_tag_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_egr_vlan_tag_set_key_func($/;"	f	typeref:typename:int	file:
vsc9953_egr_vlan_tag_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_egr_vlan_tag_show_key_func($/;"	f	typeref:typename:int	file:
vsc9953_fdb_entry_add_key_func	drivers/net/vsc9953.c	/^static int vsc9953_fdb_entry_add_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_fdb_entry_del_key_func	drivers/net/vsc9953.c	/^static int vsc9953_fdb_entry_del_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_fdb_flush_key_func	drivers/net/vsc9953.c	/^static int vsc9953_fdb_flush_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_fdb_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_fdb_show_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_gpio	include/vsc9953.h	/^struct vsc9953_gpio {$/;"	s
vsc9953_info	include/vsc9953.h	/^struct vsc9953_info {$/;"	s
vsc9953_ingr_fltr_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_ingr_fltr_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_ingr_fltr_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_ingr_fltr_show_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_init	drivers/net/vsc9953.c	/^void vsc9953_init(bd_t *bis)$/;"	f	typeref:typename:void
vsc9953_l2sw	drivers/net/vsc9953.c	/^static struct vsc9953_info vsc9953_l2sw = {$/;"	v	typeref:struct:vsc9953_info	file:
vsc9953_learn_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_learn_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_learn_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_learn_show_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_mac_table_add	drivers/net/vsc9953.c	/^static int vsc9953_mac_table_add(u8 port_no, uchar mac[6], int vid)$/;"	f	typeref:typename:int	file:
vsc9953_mac_table_age	drivers/net/vsc9953.c	/^static void vsc9953_mac_table_age(int port_no, int vid)$/;"	f	typeref:typename:void	file:
vsc9953_mac_table_cmd	drivers/net/vsc9953.c	/^static int vsc9953_mac_table_cmd(enum mac_table_cmd cmd)$/;"	f	typeref:typename:int	file:
vsc9953_mac_table_del	drivers/net/vsc9953.c	/^static int vsc9953_mac_table_del(uchar mac[6], u16 vid)$/;"	f	typeref:typename:int	file:
vsc9953_mac_table_flush	drivers/net/vsc9953.c	/^static void vsc9953_mac_table_flush(int port, int vid)$/;"	f	typeref:typename:void	file:
vsc9953_mac_table_poll_idle	drivers/net/vsc9953.c	/^static int vsc9953_mac_table_poll_idle(void)$/;"	f	typeref:typename:int	file:
vsc9953_mac_table_show	drivers/net/vsc9953.c	/^static void vsc9953_mac_table_show(int port_no, int vid)$/;"	f	typeref:typename:void	file:
vsc9953_mdio_info	include/vsc9953.h	/^struct vsc9953_mdio_info {$/;"	s
vsc9953_mdio_read	drivers/net/vsc9953.c	/^static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr,$/;"	f	typeref:typename:int	file:
vsc9953_mdio_write	drivers/net/vsc9953.c	/^static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr,$/;"	f	typeref:typename:void	file:
vsc9953_mii_mng	include/vsc9953.h	/^struct vsc9953_mii_mng {$/;"	s
vsc9953_mii_read_scan	include/vsc9953.h	/^struct vsc9953_mii_read_scan {$/;"	s
vsc9953_phy_autoneg	drivers/net/vsc9953.c	/^static void vsc9953_phy_autoneg(int port_no)$/;"	f	typeref:typename:void	file:
vsc9953_port_aggr_grp_get	drivers/net/vsc9953.c	/^static int vsc9953_port_aggr_grp_get(int port_no, int *aggr_grp)$/;"	f	typeref:typename:int	file:
vsc9953_port_aggr_grp_set	drivers/net/vsc9953.c	/^static int vsc9953_port_aggr_grp_set(int port_no, int aggr_grp)$/;"	f	typeref:typename:int	file:
vsc9953_port_aggr_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_aggr_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_port_aggr_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_aggr_show_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_port_all_vlan_aware_set	drivers/net/vsc9953.c	/^static void vsc9953_port_all_vlan_aware_set(int enabled)$/;"	f	typeref:typename:void	file:
vsc9953_port_all_vlan_egress_untagged_set	drivers/net/vsc9953.c	/^static void vsc9953_port_all_vlan_egress_untagged_set($/;"	f	typeref:typename:void	file:
vsc9953_port_all_vlan_poncnt_set	drivers/net/vsc9953.c	/^static void vsc9953_port_all_vlan_poncnt_set(int popcnt)$/;"	f	typeref:typename:void	file:
vsc9953_port_all_vlan_pvid_set	drivers/net/vsc9953.c	/^static void vsc9953_port_all_vlan_pvid_set(int pvid)$/;"	f	typeref:typename:void	file:
vsc9953_port_config_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_config_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_port_config_show	drivers/net/vsc9953.c	/^static void vsc9953_port_config_show(int port_no)$/;"	f	typeref:typename:void	file:
vsc9953_port_disable	drivers/net/vsc9953.c	/^void vsc9953_port_disable(int port_no)$/;"	f	typeref:typename:void
vsc9953_port_enable	drivers/net/vsc9953.c	/^void vsc9953_port_enable(int port_no)$/;"	f	typeref:typename:void
vsc9953_port_info	include/vsc9953.h	/^struct vsc9953_port_info {$/;"	s
vsc9953_port_info_set_mdio	drivers/net/vsc9953.c	/^void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus)$/;"	f	typeref:typename:void
vsc9953_port_info_set_phy_address	drivers/net/vsc9953.c	/^void vsc9953_port_info_set_phy_address(int port_no, int address)$/;"	f	typeref:typename:void
vsc9953_port_info_set_phy_int	drivers/net/vsc9953.c	/^void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int)$/;"	f	typeref:typename:void
vsc9953_port_ingress_filtering_get	drivers/net/vsc9953.c	/^static int vsc9953_port_ingress_filtering_get(int port_no)$/;"	f	typeref:typename:int	file:
vsc9953_port_ingress_filtering_set	drivers/net/vsc9953.c	/^static void vsc9953_port_ingress_filtering_set(int port_no, int enabled)$/;"	f	typeref:typename:void	file:
vsc9953_port_init	drivers/net/vsc9953.c	/^static int vsc9953_port_init(int port_no)$/;"	f	typeref:typename:int	file:
vsc9953_port_learn_mode_get	drivers/net/vsc9953.c	/^static int vsc9953_port_learn_mode_get(int port_no, enum port_learn_mode *mode)$/;"	f	typeref:typename:int	file:
vsc9953_port_learn_mode_set	drivers/net/vsc9953.c	/^static void vsc9953_port_learn_mode_set(int port_no, enum port_learn_mode mode)$/;"	f	typeref:typename:void	file:
vsc9953_port_statistics_clear	drivers/net/vsc9953.c	/^static void vsc9953_port_statistics_clear(int port_no)$/;"	f	typeref:typename:void	file:
vsc9953_port_statistics_show	drivers/net/vsc9953.c	/^static void vsc9953_port_statistics_show(int port_no)$/;"	f	typeref:typename:void	file:
vsc9953_port_stats_clear_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_stats_clear_key_func(struct ethsw_command_def$/;"	f	typeref:typename:int	file:
vsc9953_port_stats_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_stats_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_port_status_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_status_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_port_status_set	drivers/net/vsc9953.c	/^static void vsc9953_port_status_set(int port_no, u8 enabled)$/;"	f	typeref:typename:void	file:
vsc9953_port_untag_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_untag_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_port_untag_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_port_untag_show_key_func($/;"	f	typeref:typename:int	file:
vsc9953_port_vlan_aware_set	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_aware_set(int port_no, int enabled)$/;"	f	typeref:typename:void	file:
vsc9953_port_vlan_egr_untag_get	drivers/net/vsc9953.c	/^static int vsc9953_port_vlan_egr_untag_get(int port_no,$/;"	f	typeref:typename:int	file:
vsc9953_port_vlan_egr_untag_set	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_egr_untag_set(int port_no,$/;"	f	typeref:typename:void	file:
vsc9953_port_vlan_egr_untag_show	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_egr_untag_show(int port_no)$/;"	f	typeref:typename:void	file:
vsc9953_port_vlan_egress_tag_get	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_egress_tag_get(int port_no,$/;"	f	typeref:typename:void	file:
vsc9953_port_vlan_egress_tag_set	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_egress_tag_set(int port_no,$/;"	f	typeref:typename:void	file:
vsc9953_port_vlan_popcnt_set	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_popcnt_set(int port_no, int popcnt)$/;"	f	typeref:typename:void	file:
vsc9953_port_vlan_pvid_get	drivers/net/vsc9953.c	/^static int vsc9953_port_vlan_pvid_get(int port_nr, int *pvid)$/;"	f	typeref:typename:int	file:
vsc9953_port_vlan_pvid_set	drivers/net/vsc9953.c	/^static void vsc9953_port_vlan_pvid_set(int port_no, int pvid)$/;"	f	typeref:typename:void	file:
vsc9953_pvid_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_pvid_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_pvid_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_pvid_show_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_qsys_drop_cfg	include/vsc9953.h	/^struct vsc9953_qsys_drop_cfg {$/;"	s
vsc9953_qsys_hsch	include/vsc9953.h	/^struct vsc9953_qsys_hsch {$/;"	s
vsc9953_qsys_hsch_misc	include/vsc9953.h	/^struct vsc9953_qsys_hsch_misc {$/;"	s
vsc9953_qsys_mmgt	include/vsc9953.h	/^struct vsc9953_qsys_mmgt {$/;"	s
vsc9953_qsys_qos_cfg	include/vsc9953.h	/^struct vsc9953_qsys_qos_cfg {$/;"	s
vsc9953_qsys_reg	include/vsc9953.h	/^struct vsc9953_qsys_reg {$/;"	s
vsc9953_qsys_res_ctrl	include/vsc9953.h	/^struct vsc9953_qsys_res_ctrl {$/;"	s
vsc9953_qsys_sys	include/vsc9953.h	/^struct vsc9953_qsys_sys {$/;"	s
vsc9953_rew_common	include/vsc9953.h	/^struct	vsc9953_rew_common {$/;"	s
vsc9953_rew_port	include/vsc9953.h	/^struct	vsc9953_rew_port {$/;"	s
vsc9953_rew_reg	include/vsc9953.h	/^struct	vsc9953_rew_reg {$/;"	s
vsc9953_rx_cntrs	include/vsc9953.h	/^struct vsc9953_rx_cntrs {$/;"	s
vsc9953_sys_mmgt	include/vsc9953.h	/^struct vsc9953_sys_mmgt {$/;"	s
vsc9953_sys_pause_cfg	include/vsc9953.h	/^struct vsc9953_sys_pause_cfg {$/;"	s
vsc9953_sys_stat	include/vsc9953.h	/^struct vsc9953_sys_stat {$/;"	s
vsc9953_sys_sys	include/vsc9953.h	/^struct vsc9953_sys_sys {$/;"	s
vsc9953_system_reg	include/vsc9953.h	/^struct vsc9953_system_reg {$/;"	s
vsc9953_tx_cntrs	include/vsc9953.h	/^struct vsc9953_tx_cntrs {$/;"	s
vsc9953_update_aggr_members_masks	drivers/net/vsc9953.c	/^static void vsc9953_update_aggr_members_masks(int port_no, u32 membr_bitfld_old,$/;"	f	typeref:typename:void	file:
vsc9953_update_dest_members_masks	drivers/net/vsc9953.c	/^static void vsc9953_update_dest_members_masks(int port_no, u32 membr_bitfld_old,$/;"	f	typeref:typename:void	file:
vsc9953_update_members_masks	drivers/net/vsc9953.c	/^static void vsc9953_update_members_masks(int port_no,$/;"	f	typeref:typename:void	file:
vsc9953_update_source_members_masks	drivers/net/vsc9953.c	/^static void vsc9953_update_source_members_masks(int port_no,$/;"	f	typeref:typename:void	file:
vsc9953_vcap	include/vsc9953.h	/^struct vsc9953_vcap {$/;"	s
vsc9953_vcap_core_cfg	include/vsc9953.h	/^struct vsc9953_vcap_core_cfg {$/;"	s
vsc9953_vlan_ingr_fltr_learn_drop	drivers/net/vsc9953.c	/^static void vsc9953_vlan_ingr_fltr_learn_drop(int enable)$/;"	f	typeref:typename:void	file:
vsc9953_vlan_learn_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_vlan_learn_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_vlan_learn_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_vlan_learn_show_key_func($/;"	f	typeref:typename:int	file:
vsc9953_vlan_learning_get	drivers/net/vsc9953.c	/^static int vsc9953_vlan_learning_get(enum vlan_learning_mode *lrn_mode)$/;"	f	typeref:typename:int	file:
vsc9953_vlan_learning_set	drivers/net/vsc9953.c	/^static void vsc9953_vlan_learning_set(enum vlan_learning_mode lrn_mode)$/;"	f	typeref:typename:void	file:
vsc9953_vlan_membership_show	drivers/net/vsc9953.c	/^static void vsc9953_vlan_membership_show(int port_no)$/;"	f	typeref:typename:void	file:
vsc9953_vlan_set_key_func	drivers/net/vsc9953.c	/^static int vsc9953_vlan_set_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_vlan_show_key_func	drivers/net/vsc9953.c	/^static int vsc9953_vlan_show_key_func(struct ethsw_command_def *parsed_cmd)$/;"	f	typeref:typename:int	file:
vsc9953_vlan_table_membership_all_set	drivers/net/vsc9953.c	/^static void vsc9953_vlan_table_membership_all_set(int vid, int set_member)$/;"	f	typeref:typename:void	file:
vsc9953_vlan_table_membership_set	drivers/net/vsc9953.c	/^static void vsc9953_vlan_table_membership_set(int vid, u32 port_no, u8 add)$/;"	f	typeref:typename:void	file:
vsc9953_vlan_table_poll_idle	drivers/net/vsc9953.c	/^static int vsc9953_vlan_table_poll_idle(void)$/;"	f	typeref:typename:int	file:
vsc_if_enable	board/freescale/common/vsc3316_3308.c	/^int vsc_if_enable(unsigned int vsc_addr)$/;"	f	typeref:typename:int
vsc_wp_config	board/freescale/common/vsc3316_3308.c	/^void vsc_wp_config(unsigned int vsc_addr)$/;"	f	typeref:typename:void
vscc	tools/ifdtool.h	/^	uint32_t vscc;$/;"	m	struct:vscc_t	typeref:typename:uint32_t
vscc_t	tools/ifdtool.h	/^struct vscc_t {$/;"	s
vscnprintf	lib/vsprintf.c	/^int vscnprintf(char *buf, size_t size, const char *fmt, va_list args)$/;"	f	typeref:typename:int
vscr	arch/powerpc/include/asm/processor.h	/^	vector128	vscr;		\/* AltiVec status *\/$/;"	m	struct:thread_struct	typeref:typename:vector128
vsel_bits	drivers/power/regulator/rk808.c	/^	u8 vsel_bits;$/;"	m	struct:rk808_reg_info	typeref:typename:u8	file:
vsel_mask	drivers/power/regulator/pfuze100.c	/^	unsigned int vsel_mask;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int	file:
vsel_reg	drivers/power/regulator/pfuze100.c	/^	unsigned int vsel_reg;$/;"	m	struct:pfuze100_regulator_desc	typeref:typename:unsigned int	file:
vsel_reg	drivers/power/regulator/rk808.c	/^	s8 vsel_reg;$/;"	m	struct:rk808_reg_info	typeref:typename:s8	file:
vseparator1	scripts/kconfig/gconf.glade	/^		    <widget class="GtkVSeparator" id="vseparator1">$/;"	i
vseparator2	scripts/kconfig/gconf.glade	/^		    <widget class="GtkVSeparator" id="vseparator2">$/;"	i
vseparator3	scripts/kconfig/gconf.glade	/^		    <widget class="GtkVSeparator" id="vseparator3">$/;"	i
vsi	include/universe.h	/^	SLAVE_IMAGE  vsi[4];$/;"	m	struct:_UNIVERSE	typeref:typename:SLAVE_IMAGE[4]
vsid	arch/powerpc/include/asm/mmu.h	/^	unsigned long long vsid:52;$/;"	m	struct:_PTE	typeref:typename:unsigned long long:52
vsid	arch/powerpc/include/asm/mmu.h	/^	unsigned long vsid:24;	\/* Virtual Segment Identifier *\/$/;"	m	struct:_SEGREG	typeref:typename:unsigned long:24
vsnprintf	lib/vsprintf.c	/^int vsnprintf(char *buf, size_t size, const char *fmt,$/;"	f	typeref:typename:int
vsnprintf_internal	lib/vsprintf.c	/^static int vsnprintf_internal(char *buf, size_t size, const char *fmt,$/;"	f	typeref:typename:int	file:
vspdu0	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 vspdu0;$/;"	m	struct:rcar_mxi_qos	typeref:typename:u32
vspdu1	arch/arm/mach-rmobile/include/mach/rcar-base.h	/^	u32 vspdu1;$/;"	m	struct:rcar_mxi_qos	typeref:typename:u32
vspeed	board/freescale/common/pixis.h	/^	u8 vspeed[2];$/;"	m	struct:pixis	typeref:typename:u8[2]
vspeed	board/freescale/common/pixis.h	/^	u8 vspeed[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
vspeed2	board/freescale/common/pixis.h	/^	u8 vspeed2;$/;"	m	struct:pixis	typeref:typename:u8
vsprintf	lib/vsprintf.c	/^int vsprintf(char *buf, const char *fmt, va_list args)$/;"	f	typeref:typename:int
vss_microvolts	include/adc.h	/^	int vss_microvolts;$/;"	m	struct:adc_uclass_platdata	typeref:typename:int
vss_polarity_negative	include/adc.h	/^	bool vss_polarity_negative;$/;"	m	struct:adc_uclass_platdata	typeref:typename:bool
vss_supply	include/adc.h	/^	struct udevice *vss_supply;$/;"	m	struct:adc_uclass_platdata	typeref:struct:udevice *
vstat	board/freescale/common/ngpixis.h	/^	u8 vstat;$/;"	m	struct:ngpixis	typeref:typename:u8
vstat	board/freescale/common/pixis.h	/^	u8 vstat;$/;"	m	struct:pixis	typeref:typename:u8
vstat	include/tsi148.h	/^	unsigned int vstat;                   \/* 0x23c         *\/$/;"	m	struct:_TSI148	typeref:typename:unsigned int
vsw	drivers/video/am335x-fb.h	/^	unsigned int	vsw;		\/* Vertical Sync Pulse Width *\/$/;"	m	struct:am335x_lcdpanel	typeref:typename:unsigned int
vsw	drivers/video/da8xx-fb.h	/^	int		vsw;		\/* Vertical Sync Pulse Width *\/$/;"	m	struct:da8xx_panel	typeref:typename:int
vsw_cfg	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vsw_cfg;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vsw_sta	arch/arm/mach-exynos/include/mach/dp.h	/^	unsigned int	vsw_sta;$/;"	m	struct:exynos_dp	typeref:typename:unsigned int
vsyn_para	drivers/video/fsl_dcu_fb.c	/^	u32 vsyn_para;$/;"	m	struct:dcu_reg	typeref:typename:u32	file:
vsyn_para	drivers/video/fsl_diu_fb.c	/^	__be32 vsyn_para;$/;"	m	struct:diu	typeref:typename:__be32	file:
vsync	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	vsync;$/;"	m	struct:rk3288_edp	typeref:typename:u32
vsync_flag	drivers/video/da8xx-fb.c	/^	int			vsync_flag;$/;"	m	struct:da8xx_fb_par	typeref:typename:int	file:
vsync_len	drivers/video/videomodes.h	/^	int vsync_len;		\/* length of vertical sync	*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
vsync_len	include/fdtdec.h	/^	struct timing_entry vsync_len;		\/* ver. sync len *\/$/;"	m	struct:display_timing	typeref:struct:timing_entry
vsync_len	include/linux/fb.h	/^	__u32 vsync_len;		\/* length of vertical sync	*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
vsync_len	include/linux/fb.h	/^	u32 vsync_len;$/;"	m	struct:fb_videomode	typeref:typename:u32
vsync_num	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 vsync_num;			\/* 0x104 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
vsync_num	arch/arm/include/asm/arch/display.h	/^	u32 vsync_num;			\/* 0x104 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
vsync_offset_pulse_width	include/edid.h	/^	unsigned char vsync_offset_pulse_width;$/;"	m	struct:edid_detailed_timing	typeref:typename:unsigned char
vsync_sta	arch/arm/include/asm/arch-rockchip/edp_rk3288.h	/^	u32	vsync_sta;$/;"	m	struct:rk3288_edp	typeref:typename:u32
vsync_timeout	drivers/video/da8xx-fb.c	/^	int			vsync_timeout;$/;"	m	struct:da8xx_fb_par	typeref:typename:int	file:
vtagtable	drivers/qe/uec.h	/^	u32  vtagtable[0x8];$/;"	m	struct:uec_tx_global_pram	typeref:typename:u32[0x8]
vtba_t	tools/ifdtool.h	/^struct vtba_t {$/;"	s
vtbl	drivers/mtd/ubi/ubi.h	/^	struct ubi_vtbl_record *vtbl;$/;"	m	struct:ubi_device	typeref:struct:ubi_vtbl_record *
vtbl_check	drivers/mtd/ubi/vtbl.c	/^static int vtbl_check(const struct ubi_device *ubi,$/;"	f	typeref:typename:int	file:
vtbl_size	drivers/mtd/ubi/ubi.h	/^	int vtbl_size;$/;"	m	struct:ubi_device	typeref:typename:int
vtbl_slots	drivers/mtd/ubi/ubi.h	/^	int vtbl_slots;$/;"	m	struct:ubi_device	typeref:typename:int
vtempacc	board/freescale/common/pixis.h	/^	u8 vtempacc[4];$/;"	m	struct:pixis	typeref:typename:u8[4]
vtempcnt	board/freescale/common/pixis.h	/^	u8 vtempcnt[3];$/;"	m	struct:pixis	typeref:typename:u8[3]
vtempmax	board/freescale/common/pixis.h	/^	u8 vtempmax[2];$/;"	m	struct:pixis	typeref:typename:u8[2]
vth01	board/amcc/luan/epld.h	/^    unsigned char  vth01;		\/* PCI0, PCI1 VTH register *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
vth2	board/amcc/luan/epld.h	/^    unsigned char  vth2;		\/* PCI2 VTH register *\/$/;"	m	struct:__anon034c23190108	typeref:typename:unsigned char
vtor	arch/arm/include/asm/armv7m.h	/^	uint32_t vtor;		\/* Vector Table Offset Register *\/$/;"	m	struct:v7m_scb	typeref:typename:uint32_t
vtp0ctrlreg	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int vtp0ctrlreg;$/;"	m	struct:vtp_reg	typeref:typename:unsigned int
vtp_clk_div	arch/arm/dts/am43xx-clocks.dtsi	/^	vtp_clk_div: vtp_clk_div {$/;"	l
vtp_reg	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct vtp_reg {$/;"	s
vtpio_ctl	arch/arm/mach-davinci/include/mach/hardware.h	/^	dv_reg	vtpio_ctl;$/;"	m	struct:davinci_syscfg1_regs	typeref:typename:dv_reg
vtpiocr	arch/arm/mach-davinci/include/mach/syscfg_defs.h	/^	unsigned int	vtpiocr;	\/* 0x74 *\/$/;"	m	struct:dv_sys_module_regs	typeref:typename:unsigned int
vtpreg	arch/arm/cpu/armv7/am33xx/emif4.c	/^static struct vtp_reg *vtpreg[2] = {$/;"	v	typeref:struct:vtp_reg * [2]	file:
vtraps	include/fsl_qe.h	/^	u32 vtraps[8];		\/* Virtual trap addresses *\/$/;"	m	struct:qe_firmware	typeref:typename:u32[8]
vtraps	include/fsl_qe.h	/^	u32 vtraps[8];		\/* Virtual trap addresses *\/$/;"	m	struct:qe_firmware_info	typeref:typename:u32[8]
vtt_fixed	arch/arm/dts/am335x-evmsk.dts	/^	vtt_fixed: fixedregulator@3 {$/;"	l
vtt_fixed	arch/arm/dts/am335x-icev2.dts	/^	vtt_fixed: fixedregulator@1 {$/;"	l
vtt_fixed	arch/arm/dts/am437x-gp-evm.dts	/^	vtt_fixed: fixedregulator-vtt {$/;"	l
vtt_fixed	arch/arm/dts/am57xx-beagle-x15.dts	/^	vtt_fixed: fixedregulator-vtt {$/;"	l
vtt_fixed	arch/arm/dts/am57xx-idk-common.dtsi	/^	vtt_fixed: fixedregulator-vtt {$/;"	l
vtt_fixed	arch/arm/dts/dra7-evm.dts	/^	vtt_fixed: fixedregulator-vtt {$/;"	l
vtt_pin	arch/arm/dts/dra7-evm.dts	/^	vtt_pin: pinmux_vtt_pin {$/;"	l
vtt_regulator_enable	board/ti/am57xx/board.c	/^static inline void vtt_regulator_enable(void)$/;"	f	typeref:typename:void	file:
vtt_regulator_enable	board/ti/dra7xx/evm.c	/^static inline void vtt_regulator_enable(void)$/;"	f	typeref:typename:void	file:
vu_char	include/common.h	/^typedef volatile unsigned char	vu_char;$/;"	t	typeref:typename:volatile unsigned char
vu_long	include/common.h	/^typedef volatile unsigned long	vu_long;$/;"	t	typeref:typename:volatile unsigned long
vu_short	include/common.h	/^typedef volatile unsigned short vu_short;$/;"	t	typeref:typename:volatile unsigned short
vuint32	drivers/net/tsi108_eth.c	/^#define vuint32 /;"	d	file:
vx	arch/powerpc/cpu/mpc8xx/video.c	/^			vx:2,		\/* Vertical sync *\/$/;"	m	struct:VRAM	typeref:typename:unsigned:2	file:
vx_statid	include/universe.h	/^	unsigned int vx_statid[7];$/;"	m	struct:_UNIVERSE	typeref:typename:unsigned int[7]
vybrid_gpio_bind	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_bind(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vybrid_gpio_direction_input	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_direction_input(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
vybrid_gpio_direction_output	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
vybrid_gpio_get_function	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_get_function(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
vybrid_gpio_get_value	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
vybrid_gpio_ids	drivers/gpio/vybrid_gpio.c	/^static const struct udevice_id vybrid_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
vybrid_gpio_platdata	arch/arm/include/asm/arch-vf610/gpio.h	/^struct vybrid_gpio_platdata {$/;"	s
vybrid_gpio_probe	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
vybrid_gpio_regs	arch/arm/include/asm/arch-vf610/gpio.h	/^struct vybrid_gpio_regs {$/;"	s
vybrid_gpio_set_value	drivers/gpio/vybrid_gpio.c	/^static int vybrid_gpio_set_value(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
vybrid_gpios	drivers/gpio/vybrid_gpio.c	/^struct vybrid_gpios {$/;"	s	file:
vybridimage_check_image_types	tools/vybridimage.c	/^static int vybridimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
vybridimage_header	tools/vybridimage.c	/^static struct nand_page_0_boot_header vybridimage_header;$/;"	v	typeref:struct:nand_page_0_boot_header	file:
vybridimage_print_hdr_field	tools/vybridimage.c	/^static void vybridimage_print_hdr_field(struct nand_page_0_boot_header *hdr,$/;"	f	typeref:typename:void	file:
vybridimage_print_header	tools/vybridimage.c	/^static void vybridimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
vybridimage_set_header	tools/vybridimage.c	/^static void vybridimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
vybridimage_sw_ecc	tools/vybridimage.c	/^static uint8_t vybridimage_sw_ecc(uint8_t byte)$/;"	f	typeref:typename:uint8_t	file:
vybridimage_verify_header	tools/vybridimage.c	/^static int vybridimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
vzalloc	include/linux/compat.h	/^static inline void *vzalloc(unsigned long size)$/;"	f	typeref:typename:void *
w	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	w;		\/* Width of source window *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
w	arch/powerpc/include/asm/mmu.h	/^	unsigned long w:1;	\/* Write-thru cache *\/$/;"	m	struct:_BATL	typeref:typename:unsigned long:1
w	arch/powerpc/include/asm/mmu.h	/^	unsigned long w:1;	\/* Write-thru cache mode *\/$/;"	m	struct:_PTE	typeref:typename:unsigned long:1
w	arch/powerpc/include/asm/mmu.h	/^	unsigned long w:1;$/;"	m	struct:_P601_BATU	typeref:typename:unsigned long:1
w	common/cli_hush.c	/^	reserved_style w;$/;"	m	struct:p_context	typeref:typename:reserved_style	file:
w	drivers/video/cfb_console.c	/^		unsigned short w;	\/* word *\/$/;"	m	union:palette::__anon447d1c47010a	typeref:typename:unsigned short	file:
w	drivers/video/stb_truetype.h	/^   int id,w,h,was_packed;$/;"	m	struct:stbrp_rect	typeref:typename:int
w	drivers/video/stb_truetype.h	/^   int w,h,stride;$/;"	m	struct:__anonce392f790708	typeref:typename:int
w16	include/mtd/cfi_flash.h	/^	u16 w16;$/;"	m	union:__anonbda7ff61010a	typeref:typename:u16
w1keyalpha	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w1keyalpha;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w1keycon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w1keycon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w1keycon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w1keycon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w2keyalpha	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w2keyalpha;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w2keycon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w2keycon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w2keycon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w2keycon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w2p	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 w2p;		\/* 0x48: EMC_W2P *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
w2r	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 w2r;		\/* 0x40: EMC_W2R *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
w32	include/mtd/cfi_flash.h	/^	u32 w32;$/;"	m	union:__anonbda7ff61010a	typeref:typename:u32
w3keyalpha	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w3keyalpha;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w3keycon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w3keycon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w3keycon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w3keycon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w4keyalpha	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w4keyalpha;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w4keycon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w4keycon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w4keycon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int w4keycon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
w64	include/mtd/cfi_flash.h	/^	u64 w64;$/;"	m	union:__anonbda7ff61010a	typeref:typename:u64
w8	include/mtd/cfi_flash.h	/^	u8 w8;$/;"	m	union:__anonbda7ff61010a	typeref:typename:u8
w83782d_hwmon_init	board/socrates/socrates.c	/^static int w83782d_hwmon_init(void)$/;"	f	typeref:typename:int	file:
wBytesPerInterval	include/linux/usb/ch9.h	/^	__le16 wBytesPerInterval;$/;"	m	struct:usb_ss_ep_comp_descriptor	typeref:typename:__le16
wCountryCode0	include/usbdescriptors.h	/^	u16 wCountryCode0[0];$/;"	m	struct:usb_class_country_selection_descriptor	typeref:typename:u16[0]
wCountyCode0	include/linux/usb/cdc.h	/^	__le16	wCountyCode0;$/;"	m	struct:usb_cdc_country_functional_desc	typeref:typename:__le16
wData	include/linux/usb/ch9.h	/^	__le16 wData[1];		\/* UTF-16LE encoded *\/$/;"	m	struct:usb_string_descriptor	typeref:typename:__le16[1]
wData	include/usbdescriptors.h	/^	u16 wData[0];$/;"	m	struct:usb_string_descriptor	typeref:typename:u16[0]
wDescriptorLength0	include/linux/usb/ch9.h	/^	u16 wDescriptorLength0;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u16
wDescriptorLength0	include/usbdescriptors.h	/^    u16	      wDescriptorLength0;$/;"	m	struct:usb_class_hid_descriptor	typeref:typename:u16
wDetachTimeOut	drivers/usb/gadget/f_dfu.h	/^	__le16				wDetachTimeOut;$/;"	m	struct:dfu_function_descriptor	typeref:typename:__le16
wHubChange	include/usb.h	/^	unsigned short wHubChange;$/;"	m	struct:usb_hub_status	typeref:typename:unsigned short
wHubCharacteristics	include/usb.h	/^	unsigned short wHubCharacteristics;$/;"	m	struct:usb_hub_descriptor	typeref:typename:unsigned short
wHubStatus	include/usb.h	/^	unsigned short wHubStatus;$/;"	m	struct:usb_hub_status	typeref:typename:unsigned short
wIndex	include/linux/usb/cdc.h	/^	__le16	wIndex;$/;"	m	struct:usb_cdc_notification	typeref:typename:__le16
wIndex	include/linux/usb/ch9.h	/^	__le16 wIndex;$/;"	m	struct:usb_ctrlrequest	typeref:typename:__le16
wIndex	include/usbdevice.h	/^	u16 wIndex;$/;"	m	struct:usb_device_request	typeref:typename:u16
wLength	include/linux/usb/cdc.h	/^	__le16	wLength;$/;"	m	struct:usb_cdc_notification	typeref:typename:__le16
wLength	include/linux/usb/ch9.h	/^	__le16 wLength;$/;"	m	struct:usb_ctrlrequest	typeref:typename:__le16
wLength	include/linux/usb/ch9.h	/^	u16 wLength;$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u16
wLength	include/usbdescriptors.h	/^    u16	      wLength;$/;"	m	struct:usb_class_report_descriptor	typeref:typename:u16
wLength	include/usbdevice.h	/^	u16 wLength;$/;"	m	struct:usb_device_request	typeref:typename:u16
wMaxPacketSize	include/linux/usb/ch9.h	/^	__le16 wMaxPacketSize;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:__le16
wMaxPacketSize	include/usbdescriptors.h	/^	u16 wMaxPacketSize;$/;"	m	struct:usb_endpoint_descriptor	typeref:typename:u16
wMaxSegmentSize	include/linux/usb/cdc.h	/^	__le16	wMaxSegmentSize;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__le16
wMaxSegmentSize	include/usbdescriptors.h	/^	u16 wMaxSegmentSize;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u16
wMaxStreamDelay	include/linux/usb/ch9.h	/^	__le16 wMaxStreamDelay;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__le16
wMaxVC	include/usbdescriptors.h	/^	u16 wMaxVC;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u16
wNumberMCFilters	include/linux/usb/cdc.h	/^	__le16	wNumberMCFilters;$/;"	m	struct:usb_cdc_ether_desc	typeref:typename:__le16
wNumberMCFilters	include/usbdescriptors.h	/^	u16 wNumberMCFilters;$/;"	m	struct:usb_class_ethernet_networking_descriptor	typeref:typename:u16
wOverTheAirPacketSize	include/linux/usb/ch9.h	/^	__le16 wOverTheAirPacketSize;$/;"	m	struct:usb_wireless_ep_comp_descriptor	typeref:typename:__le16
wPHYRates	include/linux/usb/ch9.h	/^	__le16 wPHYRates;	\/* bit rates, Mbps *\/$/;"	m	struct:usb_wireless_cap_descriptor	typeref:typename:__le16
wPortChange	include/usb.h	/^	unsigned short wPortChange;$/;"	m	struct:usb_port_status	typeref:typename:unsigned short
wPortStatus	include/usb.h	/^	unsigned short wPortStatus;$/;"	m	struct:usb_port_status	typeref:typename:unsigned short
wSpeedSupported	include/linux/usb/ch9.h	/^	__le16 wSpeedSupported;$/;"	m	struct:usb_ss_cap_descriptor	typeref:typename:__le16
wTotalLength	drivers/usb/host/ehci.h	/^	unsigned short	wTotalLength;$/;"	m	struct:usb_linux_config_descriptor	typeref:typename:unsigned short
wTotalLength	include/linux/usb/ch9.h	/^	__le16 wTotalLength;$/;"	m	struct:usb_bos_descriptor	typeref:typename:__le16
wTotalLength	include/linux/usb/ch9.h	/^	__le16 wTotalLength;$/;"	m	struct:usb_config_descriptor	typeref:typename:__le16
wTotalLength	include/linux/usb/ch9.h	/^	__le16 wTotalLength;$/;"	m	struct:usb_security_descriptor	typeref:typename:__le16
wTotalLength	include/usbdescriptors.h	/^	u16 wTotalLength;$/;"	m	struct:usb_configuration_descriptor	typeref:typename:u16
wTransferSize	drivers/usb/gadget/f_dfu.h	/^	__le16				wTransferSize;$/;"	m	struct:dfu_function_descriptor	typeref:typename:__le16
wType2MaxSegmentSize	include/usbdescriptors.h	/^	u16 wType2MaxSegmentSize;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u16
wType3MaxSegmentSize	include/usbdescriptors.h	/^	u16 wType3MaxSegmentSize;$/;"	m	struct:usb_class_atm_networking_descriptor	typeref:typename:u16
wValue	include/linux/usb/cdc.h	/^	__le16	wValue;$/;"	m	struct:usb_cdc_notification	typeref:typename:__le16
wValue	include/linux/usb/ch9.h	/^	__le16 wValue;$/;"	m	struct:usb_ctrlrequest	typeref:typename:__le16
wValue	include/usbdevice.h	/^	u16 wValue;$/;"	m	struct:usb_device_request	typeref:typename:u16
w_align	arch/arm/mach-tegra/ivc.c	/^		uint8_t w_align[TEGRA_IVC_ALIGN];$/;"	m	union:tegra_ivc_channel_header::__anon00ce435c010a	typeref:typename:uint8_t[]	file:
w_bits	lib/zlib/deflate.h	/^    uInt  w_bits;        \/* log2(w_size)  (8..16) *\/$/;"	m	struct:internal_state	typeref:typename:uInt
w_count	arch/arm/mach-tegra/ivc.c	/^			uint32_t w_count;$/;"	m	struct:tegra_ivc_channel_header::__anon00ce435c010a::__anon00ce435c0208	typeref:typename:uint32_t	file:
w_index	drivers/usb/gadget/at91_udc.c	/^#define w_index	/;"	d	file:
w_length	drivers/usb/gadget/at91_udc.c	/^#define w_length	/;"	d	file:
w_mask	lib/zlib/deflate.h	/^    uInt  w_mask;        \/* w_size - 1 *\/$/;"	m	struct:internal_state	typeref:typename:uInt
w_ofs	include/ec_commands.h	/^	uint8_t w_ofs[2];			\/* AC=0\/1 *\/$/;"	m	struct:lightbar_params	typeref:typename:uint8_t[2]
w_pos	arch/arm/include/asm/arch-tegra/ivc.h	/^	uint32_t w_pos;$/;"	m	struct:tegra_ivc	typeref:typename:uint32_t
w_ptr	board/mpl/pati/pati.c	/^int w_ptr;$/;"	v	typeref:typename:int
w_size	lib/zlib/deflate.h	/^    uInt  w_size;        \/* LZ77 window size (32K by default) *\/$/;"	m	struct:internal_state	typeref:typename:uInt
w_value	drivers/usb/gadget/at91_udc.c	/^#define w_value	/;"	d	file:
wait	fs/ubifs/ubifs.h	/^	wait_queue_head_t	wait;		\/* queue for waiting for$/;"	m	struct:sb_writers	typeref:typename:wait_queue_head_t
wait	include/linux/mtd/onenand.h	/^	int (*wait) (struct mtd_info *mtd, int state);$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd,int state)
wait1	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^wait1:$/;"	l
wait1000	arch/m68k/cpu/mcf5227x/start.S	/^wait1000:$/;"	l
wait2	arch/arm/cpu/armv7/omap3/lowlevel_init.S	/^wait2:$/;"	l
waitTime	board/esd/common/xilinx_jtag/ports.c	/^void waitTime(long microsec)$/;"	f	typeref:typename:void
wait_DBCMD	board/renesas/sh7752evb/lowlevel_init.S	/^.macro	wait_DBCMD$/;"	m
wait_DBCMD	board/renesas/sh7753evb/lowlevel_init.S	/^.macro	wait_DBCMD$/;"	m
wait_DBCMD	board/renesas/sh7757lcr/lowlevel_init.S	/^.macro	wait_DBCMD$/;"	m
wait_autoneg_complete	drivers/net/e1000.h	/^	uint8_t wait_autoneg_complete;$/;"	m	struct:e1000_hw	typeref:typename:uint8_t
wait_bit	arch/arm/cpu/armv7/bcm235xx/clk-core.c	/^static inline int wait_bit(void *base, u32 offset, u32 bit, bool want)$/;"	f	typeref:typename:int	file:
wait_bit	arch/arm/cpu/armv7/bcm281xx/clk-core.c	/^static inline int wait_bit(void *base, u32 offset, u32 bit, bool want)$/;"	f	typeref:typename:int	file:
wait_busy	drivers/misc/mxc_ocotp.c	/^static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us)$/;"	f	typeref:typename:void	file:
wait_complete	drivers/block/pata_bfin.c	/^static inline void wait_complete(void __iomem *base, unsigned short mask)$/;"	f	typeref:typename:void	file:
wait_ddr_idle	arch/powerpc/cpu/ppc4xx/cmd_ecctest.c	/^static force_inline void wait_ddr_idle(void)$/;"	f	typeref:typename:force_inline void	file:
wait_ddr_idle	arch/powerpc/cpu/ppc4xx/ecc.c	/^static void wait_ddr_idle(void)$/;"	f	typeref:typename:void	file:
wait_ddr_idle	board/liebherr/lwmon5/sdram.c	/^static void wait_ddr_idle(void)$/;"	f	typeref:typename:void	file:
wait_dma_completion	drivers/block/sata_mv.c	/^static int wait_dma_completion(int port, int index, u32 timeout_msec)$/;"	f	typeref:typename:int	file:
wait_eebusy	drivers/rtc/rv3029.c	/^static int wait_eebusy(int loops)$/;"	f	typeref:typename:int	file:
wait_event_interruptible	include/linux/compat.h	/^#define wait_event_interruptible(/;"	d
wait_flags	include/linux/mtd/fsl_upm.h	/^	int wait_flags;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
wait_for	test/py/u_boot_console_base.py	/^    def wait_for(self, text):$/;"	m	class:ConsoleBase
wait_for_DQ7_1	board/amcc/common/flash.c	/^static int wait_for_DQ7_1(flash_info_t * info, int sect)$/;"	f	typeref:typename:int	file:
wait_for_DQ7_1	board/amcc/yucca/flash.c	/^static int wait_for_DQ7_1(flash_info_t * info, int sect)$/;"	f	typeref:typename:int	file:
wait_for_DQ7_16	board/tqc/tqm5200/cam5200_flash.c	/^static int wait_for_DQ7_16(flash_info_t * info, int sect)$/;"	f	typeref:typename:int	file:
wait_for_DQ7_2	board/amcc/common/flash.c	/^static int wait_for_DQ7_2(flash_info_t * info, int sect)$/;"	f	typeref:typename:int	file:
wait_for_DQ7_2	board/amcc/yucca/flash.c	/^static int wait_for_DQ7_2(flash_info_t * info, int sect)$/;"	f	typeref:typename:int	file:
wait_for_DQ7_32	board/tqc/tqm5200/cam5200_flash.c	/^static int wait_for_DQ7_32(flash_info_t * info, int sect)$/;"	f	typeref:typename:int	file:
wait_for_addr	arch/arm/mach-exynos/sec_boot.S	/^wait_for_addr:$/;"	l
wait_for_addr_ack	drivers/usb/gadget/at91_udc.h	/^	unsigned			wait_for_addr_ack:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
wait_for_aps	arch/x86/cpu/mp_init.c	/^static int wait_for_aps(atomic_t *val, int target, int total_delay,$/;"	f	typeref:typename:int	file:
wait_for_bb	arch/powerpc/cpu/mpc512x/i2c.c	/^static int wait_for_bb (void)$/;"	f	typeref:typename:int	file:
wait_for_bb	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int wait_for_bb(void)$/;"	f	typeref:typename:int	file:
wait_for_bb	drivers/i2c/omap24xx_i2c.c	/^static int wait_for_bb(struct i2c *i2c_base, int waitdelay)$/;"	f	typeref:typename:int	file:
wait_for_bit	drivers/net/xilinx_emaclite.c	/^static int wait_for_bit(const char *func, u32 *reg, const u32 mask,$/;"	f	typeref:typename:int	file:
wait_for_bit	include/wait_bit.h	/^static inline int wait_for_bit(const char *prefix, const u32 *reg,$/;"	f	typeref:typename:int
wait_for_bus	drivers/i2c/davinci_i2c.c	/^static int wait_for_bus(struct i2c_adapter *adap)$/;"	f	typeref:typename:int	file:
wait_for_bypass	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void wait_for_bypass(const struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:void	file:
wait_for_bypass	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void wait_for_bypass(u32 const base)$/;"	f	typeref:typename:void	file:
wait_for_chhltd	drivers/usb/host/dwc2.c	/^int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle)$/;"	f	typeref:typename:int
wait_for_clk_disable	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void wait_for_clk_disable(u32 *clkctrl_addr)$/;"	f	typeref:typename:void	file:
wait_for_clk_disable	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void wait_for_clk_disable(u32 clkctrl_addr)$/;"	f	typeref:typename:void	file:
wait_for_clk_enable	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void wait_for_clk_enable(u32 *clkctrl_addr)$/;"	f	typeref:typename:void	file:
wait_for_clk_enable	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void wait_for_clk_enable(u32 clkctrl_addr)$/;"	f	typeref:typename:void	file:
wait_for_command_complete	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void wait_for_command_complete(struct watchdog *wd_base)$/;"	f	typeref:typename:void
wait_for_command_complete	arch/arm/cpu/armv7/omap3/board.c	/^static void wait_for_command_complete(struct watchdog *wd_base)$/;"	f	typeref:typename:void	file:
wait_for_command_end	drivers/mmc/arm_pl180_mmci.c	/^static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd)$/;"	f	typeref:typename:int	file:
wait_for_complete	drivers/rtc/bfin_rtc.c	/^static void wait_for_complete(void)$/;"	f	typeref:typename:void	file:
wait_for_completion	arch/arm/mach-keystone/clock.c	/^static void wait_for_completion(const struct pll_init_data *data)$/;"	f	typeref:typename:void	file:
wait_for_completion	drivers/i2c/adi_i2c.c	/^static int wait_for_completion(struct twi_regs *twi, struct adi_i2c_msg *msg)$/;"	f	typeref:typename:int	file:
wait_for_completion	drivers/usb/gadget/f_mass_storage.c	/^#define wait_for_completion(/;"	d	file:
wait_for_config_ack	drivers/usb/gadget/at91_udc.h	/^	unsigned			wait_for_config_ack:1;$/;"	m	struct:at91_udc	typeref:typename:unsigned:1
wait_for_dram_init_complete	arch/powerpc/cpu/ppc4xx/denali_data_eye.c	/^static int wait_for_dram_init_complete(void)$/;"	f	typeref:typename:int	file:
wait_for_eepro100	drivers/net/eepro100.c	/^static int wait_for_eepro100 (struct eth_device *dev)$/;"	f	typeref:typename:int	file:
wait_for_event	drivers/i2c/omap24xx_i2c.c	/^static u16 wait_for_event(struct i2c *i2c_base, int waitdelay)$/;"	f	typeref:typename:u16	file:
wait_for_event	drivers/video/da8xx-fb.c	/^static u32 wait_for_event(u32 event)$/;"	f	typeref:typename:u32	file:
wait_for_fdc_int	cmd/fdc.c	/^int wait_for_fdc_int(void)$/;"	f	typeref:typename:int
wait_for_fpga_config	board/keymile/km_arm/fpga_config.c	/^int wait_for_fpga_config(void)$/;"	f	typeref:typename:int
wait_for_fpga_config	board/keymile/kmp204x/pci.c	/^static int wait_for_fpga_config(void)$/;"	f	typeref:typename:int	file:
wait_for_idle	drivers/net/cpsw.c	/^static inline void wait_for_idle(void)$/;"	f	typeref:typename:void	file:
wait_for_int	drivers/i2c/ihs_i2c.c	/^static int wait_for_int(bool read)$/;"	f	typeref:typename:int	file:
wait_for_int_timeout	drivers/i2c/kona_i2c.c	/^static unsigned long wait_for_int_timeout(struct bcm_kona_i2c_dev *dev,$/;"	f	typeref:typename:unsigned long	file:
wait_for_irq	drivers/block/sata_sil3114.c	/^static u8 wait_for_irq (int num, unsigned int max)$/;"	f	typeref:typename:u8	file:
wait_for_irq	drivers/i2c/i2c-uniphier-f.c	/^static int wait_for_irq(struct uniphier_fi2c_dev *dev, u32 flags,$/;"	f	typeref:typename:int	file:
wait_for_irq	drivers/mtd/nand/denali.c	/^static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)$/;"	f	typeref:typename:uint32_t	file:
wait_for_irq	drivers/mtd/nand/denali_spl.c	/^static int wait_for_irq(uint32_t irq_mask)$/;"	f	typeref:typename:int	file:
wait_for_key	include/efi_api.h	/^	void *wait_for_key;$/;"	m	struct:efi_simple_input_interface	typeref:typename:void *
wait_for_lock	arch/arm/cpu/armv7/am33xx/clock.c	/^static inline void wait_for_lock(const struct dpll_regs *dpll_regs)$/;"	f	typeref:typename:void	file:
wait_for_lock	arch/arm/cpu/armv7/omap-common/clocks-common.c	/^static inline void wait_for_lock(u32 const base)$/;"	f	typeref:typename:void	file:
wait_for_mc	drivers/net/fsl-mc/mc.c	/^static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)$/;"	f	typeref:typename:int	file:
wait_for_new_voltage	board/freescale/common/vid.c	/^static int wait_for_new_voltage(int vdd, int i2caddress)$/;"	f	typeref:typename:int	file:
wait_for_pci_ready	board/esd/pmc405de/pmc405de.c	/^static void wait_for_pci_ready(void)$/;"	f	typeref:typename:void	file:
wait_for_pci_ready	board/esd/pmc440/pmc440.c	/^static void wait_for_pci_ready(void)$/;"	f	typeref:typename:void	file:
wait_for_pci_ready_done	board/esd/pmc405de/pmc405de.c	/^static int wait_for_pci_ready_done;$/;"	v	typeref:typename:int	file:
wait_for_pin	arch/powerpc/cpu/mpc512x/i2c.c	/^static int wait_for_pin (int *status)$/;"	f	typeref:typename:int	file:
wait_for_pin	arch/powerpc/cpu/mpc5xxx/i2c.c	/^static int wait_for_pin(int *status)$/;"	f	typeref:typename:int	file:
wait_for_rstdone	arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c	/^static void wait_for_rstdone(unsigned int bank)$/;"	f	typeref:typename:void	file:
wait_for_rx_fifo_notempty	drivers/i2c/tegra_i2c.c	/^static int wait_for_rx_fifo_notempty(struct i2c_control *control)$/;"	f	typeref:typename:int	file:
wait_for_sipi	arch/x86/cpu/intel_common/car.S	/^wait_for_sipi:$/;"	l
wait_for_sr_state	drivers/i2c/mxc_i2c.c	/^static int wait_for_sr_state(struct mxc_i2c_bus *i2c_bus, unsigned state)$/;"	f	typeref:typename:int	file:
wait_for_sync	drivers/misc/cros_ec_lpc.c	/^static int wait_for_sync(struct cros_ec_dev *dev)$/;"	f	typeref:typename:int	file:
wait_for_transfer_complete	drivers/i2c/tegra_i2c.c	/^static int wait_for_transfer_complete(struct i2c_control *control)$/;"	f	typeref:typename:int	file:
wait_for_tx_fifo_empty	drivers/i2c/tegra_i2c.c	/^static int wait_for_tx_fifo_empty(struct i2c_control *control)$/;"	f	typeref:typename:int	file:
wait_for_user_access	drivers/net/cpsw.c	/^static inline u32 wait_for_user_access(void)$/;"	f	typeref:typename:u32	file:
wait_for_voltage_change	board/freescale/t4qds/t4240qds.c	/^static inline int wait_for_voltage_change(int vdd_last)$/;"	f	typeref:typename:int	file:
wait_for_voltage_stable	board/freescale/common/vid.c	/^static int wait_for_voltage_stable(int i2caddress)$/;"	f	typeref:typename:int	file:
wait_for_voltage_stable	board/freescale/t4qds/t4240qds.c	/^static inline int wait_for_voltage_stable(int wait)$/;"	f	typeref:typename:int	file:
wait_free_ms	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^	uint wait_free_ms;$/;"	m	struct:i2c_arbitrator_priv	typeref:typename:uint	file:
wait_int	drivers/mmc/sh_mmcif.h	/^	u16			wait_int;$/;"	m	struct:sh_mmcif_host	typeref:typename:u16
wait_int	drivers/mmc/sh_sdhi.c	/^	unsigned char wait_int;$/;"	m	struct:sh_sdhi_host	typeref:typename:unsigned char	file:
wait_interrupt	arch/arm/mach-rmobile/lowlevel_init.S	/^wait_interrupt:$/;"	l
wait_loop	arch/arm/mach-rmobile/lowlevel_init.S	/^wait_loop:$/;"	l
wait_loop_end	arch/arm/mach-rmobile/lowlevel_init.S	/^wait_loop_end:$/;"	l
wait_on_value	arch/arm/cpu/armv7/syslib.c	/^u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,$/;"	f	typeref:typename:u32
wait_op_done	drivers/mtd/nand/mxc_nand.c	/^static void wait_op_done(struct mxc_nand_host *host, int max_retries,$/;"	f	typeref:typename:void	file:
wait_queue_head_t	include/linux/compat.h	/^typedef int	wait_queue_head_t;$/;"	t	typeref:typename:int
wait_refresh_op_complete	drivers/ddr/marvell/axp/ddr3_dfs.c	/^static void wait_refresh_op_complete(void)$/;"	f	typeref:typename:void	file:
wait_retry_ms	drivers/i2c/muxes/i2c-arb-gpio-challenge.c	/^	uint wait_retry_ms;$/;"	m	struct:i2c_arbitrator_priv	typeref:typename:uint	file:
wait_sdram	arch/nds32/cpu/n1213/ag101/lowlevel_init.S	/^.macro	wait_sdram$/;"	m
wait_spinup	drivers/block/ahci.c	/^static int wait_spinup(void __iomem *port_mmio)$/;"	f	typeref:typename:int	file:
wait_ticks	arch/m68k/lib/time.c	/^void wait_ticks(unsigned long ticks)$/;"	f	typeref:typename:void
wait_ticks	arch/powerpc/lib/ticks.S	/^wait_ticks:$/;"	l
wait_time	arch/arm/mach-mvebu/serdes/a38x/seq_exec.h	/^	u8 wait_time;			\/* msec *\/$/;"	m	struct:op_params	typeref:typename:u8
wait_unfrozen	fs/ubifs/ubifs.h	/^	wait_queue_head_t	wait_unfrozen;	\/* queue for waiting for$/;"	m	struct:sb_writers	typeref:typename:wait_queue_head_t
wait_until_ep0_ready	drivers/usb/musb/musb_hcd.c	/^static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)$/;"	f	typeref:typename:int	file:
wait_until_file_open_fails	test/py/u_boot_utils.py	/^def wait_until_file_open_fails(fn, ignore_errors):$/;"	f
wait_until_open_succeeds	test/py/u_boot_utils.py	/^def wait_until_open_succeeds(fn):$/;"	f
wait_until_rxep_ready	drivers/usb/musb/musb_hcd.c	/^static int wait_until_rxep_ready(struct usb_device *dev, u8 ep)$/;"	f	typeref:typename:int	file:
wait_until_txep_ready	drivers/usb/musb/musb_hcd.c	/^static int wait_until_txep_ready(struct usb_device *dev, u8 ep)$/;"	f	typeref:typename:int	file:
wait_us	drivers/i2c/i2c-uniphier.c	/^	unsigned long wait_us;		\/* wait for every byte transfer (us) *\/$/;"	m	struct:uniphier_i2c_dev	typeref:typename:unsigned long	file:
waitdelay	drivers/i2c/omap24xx_i2c.c	/^	int waitdelay;$/;"	m	struct:omap_i2c	typeref:typename:int	file:
waitdelay	include/i2c.h	/^	int		waitdelay;$/;"	m	struct:i2c_adapter	typeref:typename:int
waitfunc	include/linux/mtd/nand.h	/^	int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * this)
waiting_for_cmd_completed	drivers/block/ahci.c	/^static int waiting_for_cmd_completed(void __iomem *offset,$/;"	f	typeref:typename:int	file:
waiting_for_cmd_completed	drivers/block/dwc_ahsata.c	/^static int waiting_for_cmd_completed(u8 *offset,$/;"	f	typeref:typename:int	file:
waiting_for_reg_state	drivers/block/sata_dwc.c	/^static int waiting_for_reg_state(volatile u8 *offset,$/;"	f	typeref:typename:int	file:
waitoen	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 waitoen;	\/* Delay to output enable                    *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
waitpage	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 waitpage;	\/* Delay for async page mode read            *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
waitrd	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 waitrd;	\/* Delay to a read access                    *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
waitturn	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 waitturn;	\/* Number of bus turnaround cycles           *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
waituart	arch/arm/include/debug/8250.S	/^		.macro	waituart,rd,rx$/;"	m
waitwen	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 waitwen;	\/* Delay from chip select to write enable    *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
waitwr	arch/arm/include/asm/arch-lpc32xx/emc.h	/^		u32 waitwr;	\/* Delay to a write access                   *\/$/;"	m	struct:emc_regs::emc_stat_t	typeref:typename:u32
wakcon	arch/arm/include/asm/arch-tegra/tegra_mmc.h	/^	unsigned char	wakcon;		\/* _POWER_CONTROL_HOST_0 31:24 *\/$/;"	m	struct:tegra_mmc	typeref:typename:unsigned char
wake_clr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 wake_clr;		\/* 0x07C *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
wake_up_interruptible	include/linux/compat.h	/^#define wake_up_interruptible(/;"	d
wake_up_process	include/linux/compat.h	/^#define wake_up_process(/;"	d
wakeup	arch/arm/mach-keystone/include/mach/clock_defs.h	/^	u32	wakeup;		\/* 30 *\/$/;"	m	struct:pllctl_regs	typeref:typename:u32
wakeup	include/linux/usb/gadget.h	/^	int	(*wakeup)(struct usb_gadget *);$/;"	m	struct:usb_gadget_ops	typeref:typename:int (*)(struct usb_gadget *)
wakeup_cfg	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 wakeup_cfg[2];$/;"	m	struct:rk3288_pmu	typeref:typename:u32[2]
wakeup_interrupt	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_interrupt;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wakeup_interrupt	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_interrupt;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
wakeup_interrupt_coreblk	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_interrupt_coreblk;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wakeup_interrupt_dmc	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_interrupt_dmc;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
wakeup_mask	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_mask;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
wakeup_mask	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_mask;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wakeup_mask	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_mask;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
wakeup_mask_coreblk	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_mask_coreblk;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wakeup_mask_dmc	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_mask_dmc;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
wakeup_rst_clr_cnt	arch/arm/include/asm/arch-rockchip/pmu_rk3288.h	/^	u32 wakeup_rst_clr_cnt;$/;"	m	struct:rk3288_pmu	typeref:typename:u32
wakeup_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_stat;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
wakeup_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_stat;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wakeup_stat	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_stat;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
wakeup_stat_coreblk	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_stat_coreblk;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wakeup_stat_dmc	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wakeup_stat_dmc;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
wakeup_thread	drivers/usb/gadget/f_mass_storage.c	/^static void wakeup_thread(struct fsg_common *common)$/;"	f	typeref:typename:void	file:
wakeup_type	include/smbios.h	/^	u8 wakeup_type;$/;"	m	struct:smbios_type1	typeref:typename:u8
wakeupenable	drivers/spi/omap3_spi.c	/^	unsigned int wakeupenable;	\/* 0x20 *\/$/;"	m	struct:mcspi	typeref:typename:unsigned int	file:
wakeupgen	arch/arm/dts/am4372.dtsi	/^	wakeupgen: interrupt-controller@48281000 {$/;"	l
wakeupgen	arch/arm/dts/dra7.dtsi	/^	wakeupgen: interrupt-controller@48281000 {$/;"	l
wakup_eint	arch/arm/dts/exynos4210.dtsi	/^		wakup_eint: wakeup-interrupt-controller {$/;"	l	label:pinctrl_1
wakup_eint	arch/arm/dts/exynos4x12.dtsi	/^		wakup_eint: wakeup-interrupt-controller {$/;"	l	label:pinctrl_1
wakup_eint	arch/arm/dts/exynos5250.dtsi	/^		wakup_eint: wakeup-interrupt-controller {$/;"	l	label:pinctrl_0
walat	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 walat;	\/* Write Additional Latency (0-3) *\/$/;"	m	struct:mx6_ddr_sysinfo	typeref:typename:u8
want	include/libfdt.h	/^	enum want_t want;		\/* What we are currently including *\/$/;"	m	struct:fdt_region_ptrs	typeref:enum:want_t
want	include/libfdt.h	/^	enum want_t want;	\/* The 'want' value here *\/$/;"	m	struct:fdt_subnode_stack	typeref:enum:want_t
want_extra_inode_size	include/ext_common.h	/^	__le16 want_extra_inode_size;$/;"	m	struct:ext2_sblock	typeref:typename:__le16
want_t	include/libfdt.h	/^enum want_t {$/;"	g
war_octeon_io_reorder_wmb	arch/mips/include/asm/io.h	/^#define war_octeon_io_reorder_wmb(/;"	d
warm_boot_wait	arch/arm/include/asm/arch-tegra20/sdram_param.h	/^	u32 warm_boot_wait;$/;"	m	struct:sdram_params	typeref:typename:u32
warm_reset	arch/arm/cpu/armv7/omap-common/reset.c	/^u32 __weak warm_reset(void)$/;"	f	typeref:typename:u32 __weak
warm_reset	arch/arm/cpu/armv7/omap5/hwinit.c	/^u32 warm_reset(void)$/;"	f	typeref:typename:u32
warm_reset_request	arch/x86/include/asm/arch-broadwell/me.h	/^	u32 warm_reset_request:1;$/;"	m	struct:me_hfs2	typeref:typename:u32:1
warm_rst_req_for_df	arch/x86/include/asm/me_common.h	/^	u32 warm_rst_req_for_df:1;$/;"	m	struct:me_gmes	typeref:typename:u32:1
warmboot_prepare_code	arch/arm/mach-tegra/tegra20/warmboot.c	/^int warmboot_prepare_code(u32 seg_address, u32 seg_length)$/;"	f	typeref:typename:int
warmboot_save_sdram_params	arch/arm/mach-tegra/tegra20/warmboot.c	/^int warmboot_save_sdram_params(void)$/;"	f	typeref:typename:int
warmboot_wait	arch/arm/mach-tegra/tegra20/warmboot.c	/^		u32 warmboot_wait:8;$/;"	m	struct:scratch24_reg::__anon24552f890608	typeref:typename:u32:8	file:
warn	tools/proftool.c	/^#define warn(/;"	d	file:
warn_non_spl	include/common.h	/^#define warn_non_spl(/;"	d
warn_override	tools/buildman/kconfiglib.py	/^        def warn_override(filename, linenr, name, old_user_val, new_user_val):$/;"	f	member:Config.load_config	file:
warn_wrong_value	board/corscience/tricorder/tricorder-eeprom.c	/^static inline void warn_wrong_value(const char *msg, unsigned int a,$/;"	f	typeref:typename:void	file:
warning	test/py/multiplexed_log.py	/^    def warning(self, msg):$/;"	m	class:Logfile
was_packed	drivers/video/stb_truetype.h	/^   int id,w,h,was_packed;$/;"	m	struct:stbrp_rect	typeref:typename:int
watch	board/freescale/common/ngpixis.h	/^	u8 watch;$/;"	m	struct:ngpixis	typeref:typename:u8
watch	board/freescale/common/pixis.h	/^	u8 watch;$/;"	m	struct:pixis	typeref:typename:u8
watch	board/freescale/common/qixis.h	/^	u8 watch;       \/* Watchdog Register,0x1F *\/$/;"	m	struct:qixis	typeref:typename:u8
watchdog	arch/arm/include/asm/arch-omap3/cpu.h	/^struct watchdog {$/;"	s
watchdog	arch/arm/include/asm/arch-omap4/cpu.h	/^struct watchdog {$/;"	s
watchdog	arch/arm/include/asm/arch-omap5/cpu.h	/^struct watchdog {$/;"	s
watchdog	drivers/usb/gadget/pxa25x_udc.h	/^	struct pxa25x_watchdog			watchdog;$/;"	m	struct:pxa25x_udc	typeref:struct:pxa25x_watchdog
watchdog	tools/gdb/remote.c	/^static int remote_debug = 0, remote_register_buf_size = 0, watchdog = 0;$/;"	v	typeref:typename:int	file:
watchdog0	arch/arm/dts/socfpga.dtsi	/^		watchdog0: watchdog@ffd02000 {$/;"	l
watchdog0	arch/arm/dts/zynq-7000.dtsi	/^		watchdog0: watchdog@f8005000 {$/;"	l	label:amba
watchdog0	arch/arm/dts/zynqmp.dtsi	/^		watchdog0: watchdog@fd4d0000 {$/;"	l
watchdog1	arch/arm/dts/socfpga.dtsi	/^		watchdog1: watchdog@ffd03000 {$/;"	l
watchdog_base	drivers/watchdog/xilinx_tb_wdt.c	/^static struct watchdog_regs *watchdog_base =$/;"	v	typeref:struct:watchdog_regs *	file:
watchdog_cnt_hi	include/linux/mtd/samsung_onenand.h	/^	unsigned int	watchdog_cnt_hi;	\/* 0x0270 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
watchdog_cnt_low	include/linux/mtd/samsung_onenand.h	/^	unsigned int	watchdog_cnt_low;	\/* 0x0260 *\/$/;"	m	struct:samsung_onenand	typeref:typename:unsigned int
watchdog_disable	arch/arm/cpu/armv7/am33xx/board.c	/^static void watchdog_disable(void)$/;"	f	typeref:typename:void	file:
watchdog_disable	arch/m68k/cpu/mcf523x/cpu.c	/^int watchdog_disable(void)$/;"	f	typeref:typename:int
watchdog_disable	arch/m68k/cpu/mcf52x2/cpu.c	/^int watchdog_disable(void)$/;"	f	typeref:typename:int
watchdog_disable	arch/m68k/cpu/mcf532x/cpu.c	/^int watchdog_disable(void)$/;"	f	typeref:typename:int
watchdog_disable	arch/m68k/cpu/mcf547x_8x/cpu.c	/^int watchdog_disable(void)$/;"	f	typeref:typename:int
watchdog_disable	arch/sh/cpu/sh4/watchdog.c	/^int watchdog_disable(void)$/;"	f	typeref:typename:int
watchdog_init	arch/arm/cpu/armv7/omap-common/hwinit-common.c	/^void watchdog_init(void)$/;"	f	typeref:typename:void
watchdog_init	arch/arm/cpu/armv7/omap3/board.c	/^void watchdog_init(void)$/;"	f	typeref:typename:void
watchdog_init	arch/m68k/cpu/mcf523x/cpu.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_init	arch/m68k/cpu/mcf52x2/cpu.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_init	arch/m68k/cpu/mcf532x/cpu.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_init	arch/m68k/cpu/mcf547x_8x/cpu.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_init	arch/sh/cpu/sh2/watchdog.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_init	arch/sh/cpu/sh3/watchdog.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_init	arch/sh/cpu/sh4/watchdog.c	/^int watchdog_init(void)$/;"	f	typeref:typename:int
watchdog_magic_read	post/board/lwmon5/watchdog.c	/^static uint watchdog_magic_read(void)$/;"	f	typeref:typename:uint	file:
watchdog_magic_write	post/board/lwmon5/watchdog.c	/^static void watchdog_magic_write(uint value)$/;"	f	typeref:typename:void	file:
watchdog_post_test	post/cpu/mpc8xx/watchdog.c	/^int watchdog_post_test (int flags)$/;"	f	typeref:typename:int
watchdog_post_test	post/cpu/ppc4xx/watchdog.c	/^int watchdog_post_test (int flags)$/;"	f	typeref:typename:int
watchdog_regs	drivers/watchdog/xilinx_tb_wdt.c	/^struct watchdog_regs {$/;"	s	file:
watchdog_regs	include/fsl_wdog.h	/^struct watchdog_regs {$/;"	s
watchdog_reset	arch/m68k/cpu/mcf523x/cpu.c	/^void watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/m68k/cpu/mcf52x2/cpu.c	/^void watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/m68k/cpu/mcf532x/cpu.c	/^void watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc512x/cpu.c	/^void watchdog_reset (void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc5xx/cpu.c	/^void watchdog_reset (void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc5xxx/cpu.c	/^void watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc8260/cpu.c	/^void watchdog_reset (void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc83xx/cpu.c	/^void watchdog_reset (void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc85xx/cpu.c	/^watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc86xx/cpu.c	/^watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/mpc8xx/cpu.c	/^void watchdog_reset (void)$/;"	f	typeref:typename:void
watchdog_reset	arch/powerpc/cpu/ppc4xx/cpu.c	/^void watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_reset	arch/sh/cpu/sh4/watchdog.c	/^void watchdog_reset(void)$/;"	f	typeref:typename:void
watchdog_toggle	board/a3m071/a3m071.c	/^static int watchdog_toggle;$/;"	v	typeref:typename:int	file:
water	arch/arm/include/asm/arch-fsl-layerscape/imx-regs.h	/^	u32 water;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
water	arch/arm/include/asm/arch-ls102xa/imx-regs.h	/^	u32 water;$/;"	m	struct:lpuart_fsl	typeref:typename:u32
watermark	drivers/video/tegra124/sor.h	/^	u32	watermark;$/;"	m	struct:tegra_dp_link_config	typeref:typename:u32
way	arch/arc/lib/cache.c	/^			unsigned int pad:24, way:2, lsz:2, sz:4;$/;"	m	struct:read_decode_cache_bcr_arcv2::__anon3b450cc2010a::__anon3b450cc20208	typeref:typename:unsigned int:2	file:
way	arch/powerpc/include/asm/immap_85xx.h	/^		u32	way;	\/* partition way *\/$/;"	m	struct:cpc_corenet::__anondcd7518a0208	typeref:typename:u32
way	drivers/net/mvpp2.c	/^	u32 way;$/;"	m	struct:mvpp2_cls_lookup_entry	typeref:typename:u32	file:
wb_end	arch/arm/mach-tegra/tegra20/warmboot_avp.c	/^void wb_end(void)$/;"	f	typeref:typename:void
wb_header	arch/arm/include/asm/arch-tegra/warmboot.h	/^struct wb_header {$/;"	s
wb_mem_addr	drivers/video/fsl_diu_fb.c	/^	__be32 wb_mem_addr;$/;"	m	struct:diu	typeref:typename:__be32	file:
wb_size	drivers/video/fsl_diu_fb.c	/^	__be32 wb_size;$/;"	m	struct:diu	typeref:typename:__be32	file:
wb_start	arch/arm/mach-tegra/tegra20/warmboot_avp.c	/^void wb_start(void)$/;"	f	typeref:typename:void
wb_stride_enable	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 wb_stride_enable;		\/* 0x0d0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
wb_stride_enable	arch/arm/include/asm/arch/display.h	/^	u32 wb_stride_enable;		\/* 0x0d0 *\/$/;"	m	struct:sunxi_de_fe_reg	typeref:typename:u32
wbah	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t wbah;			\/* only valid for Primary PAACE *\/$/;"	m	struct:paace	typeref:typename:uint32_t
wbcr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u32 wbcr;$/;"	m	struct:system_control_regs	typeref:typename:u32
wbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void wbdl_dump(void)$/;"	f	typeref:typename:void	file:
wbdl_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void wbdl_dump(const struct phy_param *phy_param)$/;"	f	typeref:typename:void	file:
wbinvd	arch/x86/include/asm/cache.h	/^static inline void wbinvd(void)$/;"	f	typeref:typename:void
wbits	lib/zlib/inflate.h	/^    unsigned wbits;             \/* log base 2 of requested window size *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
wbkgdset	scripts/kconfig/lxdialog/dialog.h	/^#define wbkgdset(/;"	d
wbuf	fs/ubifs/ubifs.h	/^	struct ubifs_wbuf wbuf;$/;"	m	struct:ubifs_jhead	typeref:struct:ubifs_wbuf
wbuf_has_ino	fs/ubifs/io.c	/^static int wbuf_has_ino(struct ubifs_wbuf *wbuf, ino_t inum)$/;"	f	typeref:typename:int	file:
wbuf_timer_callback_nolock	fs/ubifs/io.c	/^static enum hrtimer_restart wbuf_timer_callback_nolock(struct hrtimer *timer)$/;"	f	typeref:enum:hrtimer_restart	file:
wc_qos_ord	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^		u32 wc_qos_ord;		\/* read channel QoS Value Override *\/$/;"	m	struct:ccsr_cci400::__anon245f04be0b08	typeref:typename:u32
wc_qos_ord	arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h	/^		u32 wc_qos_ord;		\/* read channel QoS Value Override *\/$/;"	m	struct:ccsr_cci400::__anon58ea331d0708	typeref:typename:u32
wcache	drivers/block/fsl_sata.h	/^	int		wcache;$/;"	m	struct:fsl_sata	typeref:typename:int
wcache	drivers/block/sata_sil.h	/^	int		wcache;$/;"	m	struct:sil_sata	typeref:typename:int
wcfg0	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg0;	\/* Watermark Configuration Register 0 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg1	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg1;	\/* Watermark Configuration Register1 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg2	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg2;	\/* Watermark Configuration Register2 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg3	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg3;	\/* Watermark Configuration Register 3 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg4	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg4;	\/* Watermark Configuration Register 4 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg5	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg5;	\/* Watermark Configuration Register 5 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg6	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg6;	\/* Watermark Configuration Register 6 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wcfg7	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcfg7;	\/* Watermark Configuration Register 7 *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wchan	arch/powerpc/include/asm/processor.h	/^	unsigned long	wchan;		\/* Event task is sleeping on *\/$/;"	m	struct:thread_struct	typeref:typename:unsigned long
wcmd	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t wcmd[NUM_CHANNELS];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[]
wcntr	arch/m68k/include/asm/immap_5275.h	/^	u16 wcntr;$/;"	m	struct:wdog_ctrl	typeref:typename:u16
wcntr	arch/m68k/include/asm/immap_5282.h	/^	ushort wcntr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wcntr	arch/m68k/include/asm/immap_5445x.h	/^	u16 wcntr;$/;"	m	struct:wtm	typeref:typename:u16
wcore_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wcore_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wcore_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wcore_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wcore_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wcore_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wcore_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	wcore_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
wcr	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wcr;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u16 wcr;	\/* Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcr;	\/* WEIM Configuration Register *\/$/;"	m	struct:weim_regs	typeref:typename:u32
wcr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u16 wcr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wcr	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	wcr;$/;"	m	struct:weim	typeref:typename:u32
wcr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u16	wcr;	\/* Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wcr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 wcr;$/;"	m	struct:weim	typeref:typename:u32
wcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u16	wcr;	\/* Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wcr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 wcr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wcr	arch/m68k/include/asm/immap_520x.h	/^	u8 wcr;			\/* 0x13 *\/$/;"	m	struct:scm2	typeref:typename:u8
wcr	arch/m68k/include/asm/immap_5227x.h	/^	u8 wcr;			\/* 0x03 wakeup control *\/$/;"	m	struct:scm2_ctrl	typeref:typename:u8
wcr	arch/m68k/include/asm/immap_5275.h	/^	u16 wcr;$/;"	m	struct:wdog_ctrl	typeref:typename:u16
wcr	arch/m68k/include/asm/immap_5282.h	/^	ushort wcr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wcr	arch/m68k/include/asm/immap_5301x.h	/^	u8 wcr;			\/* 0x13 *\/$/;"	m	struct:scm2	typeref:typename:u8
wcr	arch/m68k/include/asm/immap_5329.h	/^	u8 wcr;			\/* 0x13 wakeup control register *\/$/;"	m	struct:scm3_ctrl	typeref:typename:u8
wcr	arch/m68k/include/asm/immap_5441x.h	/^	u8 wcr;			\/* 0x13 *\/$/;"	m	struct:scm	typeref:typename:u8
wcr	arch/m68k/include/asm/immap_5445x.h	/^	u16 wcr;$/;"	m	struct:wtm	typeref:typename:u16
wcr	arch/m68k/include/asm/immap_5445x.h	/^	u8 wcr;			\/* 0x13 *\/$/;"	m	struct:scm2	typeref:typename:u8
wcr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $wcr   = $mbar - 1 + 0x288$/;"	t
wcr	include/fsl_wdog.h	/^	u16	wcr;	\/* Control *\/$/;"	m	struct:watchdog_regs	typeref:typename:u16
wcsr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u32 wcsr;	\/* Watermark Control and Status Register *\/$/;"	m	struct:m3if_regs	typeref:typename:u32
wctl	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t wctl[NUM_CHANNELS][NUM_RANKS];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[][]
wd_cfg	board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c	/^	u8 wd_cfg;$/;"	m	struct:cpld_data	typeref:typename:u8	file:
wd_rcd	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 wd_rcd;		\/* 0x50: EMC_WD_RCD *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
wd_timer	arch/arm/include/asm/arch-am33xx/cpu.h	/^struct wd_timer {$/;"	s
wdata	include/spartan2.h	/^	xilinx_wdata_fn	wdata;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_wdata_fn
wdata	include/spartan3.h	/^	xilinx_wdata_fn	wdata;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_wdata_fn
wdata	include/virtex2.h	/^	xilinx_wdata_fn	wdata;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_wdata_fn
wdata	include/virtex2.h	/^	xilinx_wdata_fn	wdata;$/;"	m	struct:__anoncbf344e20208	typeref:typename:xilinx_wdata_fn
wday	drivers/rtc/ftrtc010.c	/^	unsigned int wday;		\/* 0x30 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
wdbbar	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t wdbbar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
wdbsize	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint32_t wdbsize;$/;"	m	struct:pei_data	typeref:typename:uint32_t
wdclear	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdclear;	\/* Timer Clear		- 0x14 *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdcounter	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdcounter;	\/* Counter Reg		- 0x00 *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdcr	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdcr;		\/* Control Reg		- 0x0c *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdcsr	board/freescale/c29xpcie/cpld.h	/^	u8 wdcsr;	\/* 0x12 - Watchdog control and status Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
wddbg	arch/arm/mach-socfpga/include/mach/system_manager.h	/^	u32	wddbg;				\/* 0x10 *\/$/;"	m	struct:socfpga_system_manager	typeref:typename:u32
wdintrlen	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdintrlen;	\/* Interrupt Length	- 0x18 *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdis	board/gateworks/gw_ventana/common.h	/^	int wdis;$/;"	m	struct:ventana	typeref:typename:int
wdkick	board/freescale/c29xpcie/cpld.h	/^	u8 wdkick;	\/* 0x13 - Watchdog kick Register *\/$/;"	m	struct:cpld_data	typeref:typename:u8
wdload	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdload;		\/* Counter Auto Reload Reg - 0x04 *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdmr	arch/arm/mach-at91/include/mach/at91_st.h	/^	u32	wdmr;$/;"	m	struct:at91_st	typeref:typename:u32
wdog	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_wdog wdog;	\/* 0x90 *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_wdog
wdog	arch/arm/include/asm/arch-sunxi/timer.h	/^	struct sunxi_wdog wdog[5];	\/* We have 5 watchdogs *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_wdog[5]
wdog	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_wdog wdog;	\/* 0x90 *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_wdog
wdog	arch/arm/include/asm/arch/timer.h	/^	struct sunxi_wdog wdog[5];	\/* We have 5 watchdogs *\/$/;"	m	struct:sunxi_timer_reg	typeref:struct:sunxi_wdog[5]
wdog	arch/arm/mach-bcm283x/include/mach/wdog.h	/^	u32 wdog;$/;"	m	struct:bcm2835_wdog_regs	typeref:typename:u32
wdog0	arch/arm/dts/ls1021a.dtsi	/^		wdog0: watchdog@2ad0000 {$/;"	l
wdog1	arch/arm/dts/imx6qdl.dtsi	/^			wdog1: wdog@020bc000 {$/;"	l
wdog1	arch/arm/dts/imx6ull.dtsi	/^			wdog1: wdog@020bc000 {$/;"	l
wdog2	arch/arm/dts/imx6qdl.dtsi	/^			wdog2: wdog@020c0000 {$/;"	l
wdog2	arch/arm/dts/imx6ull.dtsi	/^			wdog2: wdog@020c0000 {$/;"	l
wdog_ctrl	arch/m68k/include/asm/immap_520x.h	/^typedef struct wdog_ctrl {$/;"	s
wdog_ctrl	arch/m68k/include/asm/immap_5235.h	/^typedef struct wdog_ctrl {$/;"	s
wdog_ctrl	arch/m68k/include/asm/immap_5272.h	/^typedef struct wdog_ctrl {$/;"	s
wdog_ctrl	arch/m68k/include/asm/immap_5275.h	/^typedef struct wdog_ctrl {$/;"	s
wdog_ctrl	arch/m68k/include/asm/immap_5282.h	/^typedef struct wdog_ctrl {$/;"	s
wdog_ctrl	arch/m68k/include/asm/immap_5329.h	/^typedef struct wdog_ctrl {$/;"	s
wdog_pads	board/freescale/mx7dsabresd/mx7dsabresd.c	/^static iomux_v3_cfg_t const wdog_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
wdog_pads	board/udoo/udoo.c	/^static iomux_v3_cfg_t const wdog_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
wdog_pads	board/warp7/warp7.c	/^static iomux_v3_cfg_t const wdog_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
wdog_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct wdog_regs {$/;"	s
wdog_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct wdog_regs {$/;"	s
wdog_regs	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct wdog_regs {$/;"	s
wdog_regs	arch/arm/include/asm/arch-mx7/imx-regs.h	/^struct wdog_regs {$/;"	s
wdog_regs	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^struct wdog_regs {$/;"	s
wdog_regs	arch/arm/include/asm/arch-vf610/imx-regs.h	/^struct wdog_regs {$/;"	s
wdog_t	arch/m68k/include/asm/immap_520x.h	/^} wdog_t;$/;"	t	typeref:struct:wdog_ctrl
wdog_t	arch/m68k/include/asm/immap_5235.h	/^} wdog_t;$/;"	t	typeref:struct:wdog_ctrl
wdog_t	arch/m68k/include/asm/immap_5272.h	/^} wdog_t;$/;"	t	typeref:struct:wdog_ctrl
wdog_t	arch/m68k/include/asm/immap_5275.h	/^} wdog_t;$/;"	t	typeref:struct:wdog_ctrl
wdog_t	arch/m68k/include/asm/immap_5282.h	/^} wdog_t;$/;"	t	typeref:struct:wdog_ctrl
wdog_t	arch/m68k/include/asm/immap_5329.h	/^} wdog_t;$/;"	t	typeref:struct:wdog_ctrl
wdog_wcr	arch/m68k/include/asm/immap_5272.h	/^	ushort wdog_wcr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wdog_wer	arch/m68k/include/asm/immap_5272.h	/^	ushort wdog_wer;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wdog_wirr	arch/m68k/include/asm/immap_5272.h	/^	ushort wdog_wirr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wdog_wrrr	arch/m68k/include/asm/immap_5272.h	/^	ushort wdog_wrrr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wdogcontrol	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogcontrol;$/;"	m	struct:wdt	typeref:typename:u32
wdogintclr	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogintclr;$/;"	m	struct:wdt	typeref:typename:u32
wdogitcr	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogitcr;		\/* 0xF00 *\/$/;"	m	struct:wdt	typeref:typename:u32
wdogitop	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogitop;$/;"	m	struct:wdt	typeref:typename:u32
wdogload	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogload;		\/* 0x000 *\/$/;"	m	struct:wdt	typeref:typename:u32
wdoglock	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdoglock;		\/* 0xC00 *\/$/;"	m	struct:wdt	typeref:typename:u32
wdogmis	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogmis;$/;"	m	struct:wdt	typeref:typename:u32
wdogpcellid0	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogpcellid0;$/;"	m	struct:wdt	typeref:typename:u32
wdogpcellid1	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogpcellid1;$/;"	m	struct:wdt	typeref:typename:u32
wdogpcellid2	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogpcellid2;$/;"	m	struct:wdt	typeref:typename:u32
wdogpcellid3	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogpcellid3;$/;"	m	struct:wdt	typeref:typename:u32
wdogperiphid0	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogperiphid0;	\/* 0xFE0 *\/$/;"	m	struct:wdt	typeref:typename:u32
wdogperiphid1	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogperiphid1;$/;"	m	struct:wdt	typeref:typename:u32
wdogperiphid2	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogperiphid2;$/;"	m	struct:wdt	typeref:typename:u32
wdogperiphid3	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogperiphid3;$/;"	m	struct:wdt	typeref:typename:u32
wdogris	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogris;$/;"	m	struct:wdt	typeref:typename:u32
wdogvalue	arch/arm/include/asm/arch-armv7/wdt.h	/^	u32 wdogvalue;$/;"	m	struct:wdt	typeref:typename:u32
wdq	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t wdq[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[][][]
wdqs	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t wdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];$/;"	m	struct:mrc_timings	typeref:typename:uint32_t[][][]
wdr4300_usb_start	board/tplink/wdr4300/wdr4300.c	/^static inline void wdr4300_usb_start(void) {}$/;"	f	typeref:typename:void	file:
wdr4300_usb_start	board/tplink/wdr4300/wdr4300.c	/^static void wdr4300_usb_start(void)$/;"	f	typeref:typename:void	file:
wdrestart	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdrestart;	\/* Counter Restart Reg	- 0x08 *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdru_config	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_config;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdru_count	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_count;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdru_ctrl1	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_ctrl1;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdru_ctrl2	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_ctrl2;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdru_stat	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_stat;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdru_tim	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_tim;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdru_wrlock	arch/arm/include/asm/arch-stv0991/stv0991_wdru.h	/^	u32 wdru_wrlock;$/;"	m	struct:stv0991_wd_ru	typeref:typename:u32
wdstatus	include/faraday/ftwdt010_wdt.h	/^	unsigned int	wdstatus;	\/* Status Reg		- 0x10 *\/$/;"	m	struct:ftwdt010_wdt	typeref:typename:unsigned int
wdt	arch/arm/cpu/arm926ejs/lpc32xx/cpu.c	/^static struct wdt_regs  *wdt = (struct wdt_regs *)WDT_BASE;$/;"	v	typeref:struct:wdt_regs *	file:
wdt	arch/arm/dts/am4372.dtsi	/^		wdt: wdt@44e35000 {$/;"	l
wdt	arch/arm/dts/keystone.dtsi	/^		wdt: wdt@022f0080 {$/;"	l
wdt	arch/arm/dts/rk3288.dtsi	/^	wdt: watchdog@ff800000 {$/;"	l
wdt	arch/arm/dts/sun4i-a10.dtsi	/^		wdt: watchdog@01c20c90 {$/;"	l
wdt	arch/arm/dts/sun5i.dtsi	/^		wdt: watchdog@01c20c90 {$/;"	l
wdt	arch/arm/dts/sun7i-a20.dtsi	/^		wdt: watchdog@01c20c90 {$/;"	l
wdt	arch/arm/dts/sun9i-a80.dtsi	/^		wdt: watchdog@06000ca0 {$/;"	l
wdt	arch/arm/include/asm/arch-armv7/wdt.h	/^struct wdt {$/;"	s
wdt	arch/powerpc/include/asm/immap_512x.h	/^	wdt512x_t		wdt;		\/* Watch Dog Timer (WDT) *\/$/;"	m	struct:immap	typeref:typename:wdt512x_t
wdt	arch/powerpc/include/asm/immap_83xx.h	/^	wdt83xx_t		wdt;		\/* Watch Dog Timer (WDT) Registers *\/$/;"	m	struct:immap	typeref:typename:wdt83xx_t
wdt	board/timll/devkit3250/devkit3250.c	/^static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;$/;"	v	typeref:struct:wdt_regs *	file:
wdt	board/work-microwave/work_92105/work_92105.c	/^static struct wdt_regs  *wdt = (struct wdt_regs *)WDT_BASE;$/;"	v	typeref:struct:wdt_regs *	file:
wdt0	arch/arm/dts/sun8i-a23-a33.dtsi	/^		wdt0: watchdog@01c20ca0 {$/;"	l
wdt0	arch/arm/dts/sun8i-h3.dtsi	/^		wdt0: watchdog@01c20ca0 {$/;"	l
wdt1	arch/arm/dts/sun6i-a31.dtsi	/^		wdt1: watchdog@01c20ca0 {$/;"	l
wdt1_fck	arch/arm/dts/am33xx-clocks.dtsi	/^	wdt1_fck: wdt1_fck {$/;"	l
wdt1_fck	arch/arm/dts/am43xx-clocks.dtsi	/^	wdt1_fck: wdt1_fck {$/;"	l
wdt2	arch/arm/dts/am33xx.dtsi	/^		wdt2: wdt@44e35000 {$/;"	l
wdt2	arch/arm/dts/dra7.dtsi	/^		wdt2: wdt@4ae14000 {$/;"	l
wdt512x	arch/powerpc/include/asm/immap_512x.h	/^typedef struct wdt512x {$/;"	s
wdt512x_t	arch/powerpc/include/asm/immap_512x.h	/^} wdt512x_t;$/;"	t	typeref:struct:wdt512x
wdt83xx	arch/powerpc/include/asm/immap_83xx.h	/^typedef struct wdt83xx {$/;"	s
wdt83xx_t	arch/powerpc/include/asm/immap_83xx.h	/^} wdt83xx_t;$/;"	t	typeref:struct:wdt83xx
wdt_icr	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wdt_icr;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wdt_last	arch/powerpc/include/asm/global_data.h	/^	unsigned long long wdt_last;	\/* trace watch-dog triggering rate *\/$/;"	m	struct:arch_global_data	typeref:typename:unsigned long long
wdt_match_en	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wdt_match_en;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wdt_match_r	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wdt_match_r;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wdt_regs	arch/arm/include/asm/arch-lpc32xx/wdt.h	/^struct wdt_regs {$/;"	s
wdt_reload	arch/arm/mach-orion5x/timer.c	/^	u32 wdt_reload;$/;"	m	struct:orion5x_tmr_registers	typeref:typename:u32	file:
wdt_start	drivers/watchdog/s5p_wdt.c	/^void wdt_start(unsigned int timeout)$/;"	f	typeref:typename:void
wdt_stop	drivers/watchdog/s5p_wdt.c	/^void wdt_stop(void)$/;"	f	typeref:typename:void
wdt_sts	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wdt_sts;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wdt_trgr_pattern	drivers/watchdog/omap_wdt.c	/^static unsigned int wdt_trgr_pattern = 0x1234;$/;"	v	typeref:typename:unsigned int	file:
wdt_unfr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdt_unfr;	\/* offset 0x100 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdt_val	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wdt_val;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wdt_val	arch/arm/mach-orion5x/timer.c	/^	u32 wdt_val;$/;"	m	struct:orion5x_tmr_registers	typeref:typename:u32	file:
wdtcr	arch/arm/mach-davinci/include/mach/timer_defs.h	/^	u_int32_t	wdtcr;$/;"	m	struct:davinci_timer	typeref:typename:u_int32_t
wdtimer	arch/arm/cpu/armv7/am33xx/clock_ti816x.c	/^const struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;$/;"	v	typeref:typename:const struct wd_timer *
wdtimerclkctrl	arch/arm/include/asm/arch-am33xx/clock_ti81xx.h	/^	unsigned int wdtimerclkctrl;$/;"	m	struct:cm_alwon	typeref:typename:unsigned int
wdtpcr	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 wdtpcr;	\/*0x0200*\/$/;"	m	struct:armd1mpmu_registers	typeref:typename:u32
wdttimer	arch/arm/mach-davinci/timer.c	/^static struct davinci_timer * const wdttimer =$/;"	v	typeref:struct:davinci_timer * const	file:
wdtwclr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwclr;	\/* offset 0x024 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwcrr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwcrr;	\/* offset 0x028 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwdly	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwdly;	\/* offset 0x044 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwdsc	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwdsc;	\/* offset 0x010 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwdst	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwdst;	\/* offset 0x014 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwier	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwier;	\/* offset 0x01C *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwisr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwisr;	\/* offset 0x018 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwldr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwldr;	\/* offset 0x02C *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwqenc	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwqenc;	\/* offset 0x060 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwqens	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwqens;	\/* offset 0x05C *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwqeoi	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwqeoi;	\/* offset 0x050 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwqsta	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwqsta;	\/* offset 0x058 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwqstar	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwqstar;	\/* offset 0x054 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwspr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwspr;	\/* offset 0x048 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwtgr	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwtgr;	\/* offset 0x030 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwwer	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwwer;	\/* offset 0x020 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdtwwps	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wdtwwps;	\/* offset 0x034 *\/$/;"	m	struct:wd_timer	typeref:typename:unsigned int
wdv	arch/arm/include/asm/arch-tegra20/emc.h	/^	u32 wdv;		\/* 0x5C: EMC_WDV *\/$/;"	m	struct:emc_ctlr	typeref:typename:u32
wear_leveling_worker	drivers/mtd/ubi/wl.c	/^static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,$/;"	f	typeref:typename:int	file:
website	doc/README.x86	/^website and put the .fd file (CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd at the$/;"	l
wedge_bulk_in_endpoint	drivers/usb/gadget/f_mass_storage.c	/^static int wedge_bulk_in_endpoint(struct fsg_dev *fsg)$/;"	f	typeref:typename:int	file:
wedged	drivers/usb/musb-new/musb_gadget.h	/^	u8				wedged;$/;"	m	struct:musb_ep	typeref:typename:u8
week	include/edid.h	/^	unsigned char week;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
week	include/linux/fb.h	/^	__u32 week;			\/* Week Manufactured *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
weekdays	cmd/date.c	/^static const char * const weekdays[] = {$/;"	v	typeref:typename:const char * const[]	file:
weightfactor	drivers/qe/uec.h	/^	u8   weightfactor[MAX_TX_QUEUES]; \/**< weight factor for queues *\/$/;"	m	struct:uec_scheduler	typeref:typename:u8[]
weightstatus	drivers/qe/uec.h	/^	u32  weightstatus[MAX_TX_QUEUES]; \/* accumulated weight factor *\/$/;"	m	struct:uec_scheduler	typeref:typename:u32[]
weim	arch/arm/dts/imx6qdl.dtsi	/^			weim: weim@021b8000 {$/;"	l
weim	arch/arm/dts/imx6ull.dtsi	/^			weim: weim@021b8000 {$/;"	l
weim	arch/arm/include/asm/arch-mx5/imx-regs.h	/^struct weim {$/;"	s
weim	arch/arm/include/asm/arch-mx6/imx-regs.h	/^struct weim {$/;"	s
weim_cs1_settings	board/freescale/mx53ard/mx53ard.c	/^static void weim_cs1_settings(void)$/;"	f	typeref:typename:void	file:
weim_regs	arch/arm/include/asm/arch-mx25/imx-regs.h	/^struct weim_regs {$/;"	s
weim_regs	arch/arm/include/asm/arch-mx27/imx-regs.h	/^struct weim_regs {$/;"	s
weim_smc911x_iomux	board/freescale/mx53ard/mx53ard.c	/^static void weim_smc911x_iomux(void)$/;"	f	typeref:typename:void	file:
wer	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $wer   = $mbar - 1 + 0x28c$/;"	t
wes	include/andestech/andes_pcu.h	/^	unsigned int	wes;		\/* 0x88 - Wakeup Event Sensitivity*\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
west	include/andestech/andes_pcu.h	/^	unsigned int	west;		\/* 0x8C - Wakeup Event Status *\/$/;"	m	struct:andes_pcu	typeref:typename:unsigned int
wfar	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wfar;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wfbm1	drivers/net/ftgmac100.h	/^	unsigned int	wfbm1;		\/* 0x80 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
wfbm2	drivers/net/ftgmac100.h	/^	unsigned int	wfbm2;		\/* 0x84 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
wfbm3	drivers/net/ftgmac100.h	/^	unsigned int	wfbm3;		\/* 0x88 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
wfbm4	drivers/net/ftgmac100.h	/^	unsigned int	wfbm4;		\/* 0x8c *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
wfcrc	drivers/net/ftgmac100.h	/^	unsigned int	wfcrc;		\/* 0x78 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
wfe	arch/arm/mach-exynos/include/mach/system.h	/^#define wfe(/;"	d
wfi	arch/arm/include/asm/system.h	/^#define wfi(/;"	d
wfifo	drivers/serial/serial_meson.c	/^	u32 wfifo;$/;"	m	struct:meson_uart	typeref:typename:u32	file:
wfifo_cmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	wfifo_cmap;$/;"	m	struct:socfpga_sdr_ctrl	typeref:typename:u32
wfifo_cmap	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u32	wfifo_cmap;$/;"	m	struct:socfpga_sdram_config	typeref:typename:u32
wfld_clear	drivers/usb/gadget/bcm_udc_otg.h	/^static inline void wfld_clear(uintptr_t addr, uint32_t fld_mask)$/;"	f	typeref:typename:void
wfld_set	drivers/usb/gadget/bcm_udc_otg.h	/^static inline void wfld_set(uintptr_t addr, uint32_t fld_val, uint32_t fld_mask)$/;"	f	typeref:typename:void
whave	lib/zlib/inflate.h	/^    unsigned whave;             \/* valid bytes in the window *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
which	scripts/get_maintainer.pl	/^sub which {$/;"	s
which_conf	scripts/checkpatch.pl	/^sub which_conf {$/;"	s
which_conf	scripts/get_maintainer.pl	/^sub which_conf {$/;"	s
which_fn	drivers/usb/gadget/ether.c	/^#define which_fn(/;"	d	file:
which_io	arch/sparc/include/asm/prom.h	/^	unsigned int which_io;	\/* Let it be which_io *\/$/;"	m	struct:linux_prom_pci_registers	typeref:typename:unsigned int
which_io	arch/sparc/include/asm/prom.h	/^	unsigned int which_io;	\/* is this in OBIO space? *\/$/;"	m	struct:linux_prom_registers	typeref:typename:unsigned int
which_io	arch/sparc/include/asm/prom.h	/^	unsigned int which_io;$/;"	m	struct:linux_prom_pci_assigned_addresses	typeref:typename:unsigned int
white_level	arch/arm/include/asm/arch-sunxi/display.h	/^	u32 white_level;		\/* 0x120 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
white_level	arch/arm/include/asm/arch/display.h	/^	u32 white_level;		\/* 0x120 *\/$/;"	m	struct:sunxi_tve_reg	typeref:typename:u32
whitex	include/linux/fb.h	/^	__u32 whitex;$/;"	m	struct:fb_chroma	typeref:typename:__u32
whitey	include/linux/fb.h	/^	__u32 whitey;$/;"	m	struct:fb_chroma	typeref:typename:__u32
whoami	arch/powerpc/include/asm/immap_85xx.h	/^	u32	whoami;		\/* Who Am I *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
whoami	arch/powerpc/include/asm/immap_86xx.h	/^	uint	whoami;		\/* 0x40090 - Who Am I Register *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
whoami0	arch/powerpc/include/asm/immap_85xx.h	/^	u32	whoami0;	\/* Who Am I for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:u32
whoami0	arch/powerpc/include/asm/immap_86xx.h	/^	uint	whoami0;	\/* 0x60090 - Who Am I Register for Processor 0 *\/$/;"	m	struct:ccsr_pic	typeref:typename:uint
whour	drivers/rtc/ftrtc010.c	/^	unsigned int whour;		\/* 0x2c *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
wiar	arch/arm/include/asm/arch-mx5/imx-regs.h	/^	u32	wiar;$/;"	m	struct:weim	typeref:typename:u32
wiar	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u32 wiar;$/;"	m	struct:weim	typeref:typename:u32
wicr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u16 wicr;	\/* Interrupt Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wicr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u16	wicr;	\/* Interrupt Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wicr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u16	wicr;	\/* Interrupt Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wicr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 wicr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wid0	drivers/video/mx3fb.c	/^	u32	wid0:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
wid1	drivers/video/mx3fb.c	/^	u32	wid1:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
wid2	drivers/video/mx3fb.c	/^	u32	wid2:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
wid3	drivers/video/mx3fb.c	/^	u32	wid3:3;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:3	file:
wide_bus	drivers/mmc/s3c_sdi.c	/^static int wide_bus;$/;"	v	typeref:typename:int	file:
wide_tnodes_disabled	fs/yaffs2/yaffs_guts.h	/^	int wide_tnodes_disabled;	\/* Set to disable wide tnodes *\/$/;"	m	struct:yaffs_param	typeref:typename:int
width	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^			u32 width;	\/* field width *\/$/;"	m	struct:bcm_clk_div::__anona6938245010a::__anona69382450208	typeref:typename:u32
width	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^	u32 width;		\/* field width *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
width	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^			u32 width;	\/* field width *\/$/;"	m	struct:bcm_clk_div::__anone9f7c086010a::__anone9f7c0860208	typeref:typename:u32
width	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^	u32 width;		\/* field width *\/$/;"	m	struct:bcm_clk_sel	typeref:typename:u32
width	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 width;	\/* bus width (bits) (4,8,16) *\/$/;"	m	struct:mx6_ddr3_cfg	typeref:typename:u8
width	arch/arm/include/asm/arch-mx6/mx6-ddr.h	/^	u8 width;	\/* bus width (bits) (4,8,16) *\/$/;"	m	struct:mx6_lpddr2_cfg	typeref:typename:u8
width	arch/arm/include/asm/arch-sunxi/mmc.h	/^	u32 width;		\/* 0x0c bus width *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
width	arch/arm/include/asm/arch/mmc.h	/^	u32 width;		\/* 0x0c bus width *\/$/;"	m	struct:sunxi_mmc	typeref:typename:u32
width	arch/arm/include/asm/ti-common/ti-aemif.h	/^	} width;$/;"	m	struct:aemif_config	typeref:enum:aemif_config::__anon4a52d1080103
width	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 width;$/;"	m	struct:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a::__anon775fc5441e08	typeref:typename:u32
width	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 width;$/;"	m	struct:bcm2835_mbox_tag_physical_w_h::__anon775fc5441d0a::__anon775fc5441f08	typeref:typename:u32
width	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 width;$/;"	m	struct:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a::__anon775fc5442108	typeref:typename:u32
width	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 width;$/;"	m	struct:bcm2835_mbox_tag_virtual_w_h::__anon775fc544200a::__anon775fc5442208	typeref:typename:u32
width	arch/arm/mach-exynos/include/mach/sromc.h	/^	u8 width;	\/* bus width in bytes *\/$/;"	m	struct:fdt_sromc	typeref:typename:u8
width	arch/arm/mach-uniphier/init.h	/^	unsigned int width;$/;"	m	struct:uniphier_dram_ch	typeref:typename:unsigned int
width	arch/sandbox/cpu/sdl.c	/^	int width;$/;"	m	struct:sdl_info	typeref:typename:int	file:
width	board/mpl/common/pci_parts.h	/^	int		width;	\/* data size *\/$/;"	m	struct:pci_pip405_config_entry	typeref:typename:int
width	drivers/block/systemace.c	/^static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;$/;"	v	typeref:typename:u32	file:
width	drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h	/^	u8	width;$/;"	m	struct:topology_update_info	typeref:typename:u8
width	drivers/i2c/muxes/pca954x.c	/^	u32 width; \/* I2C mux width - number of busses *\/$/;"	m	struct:pca954x_priv	typeref:typename:u32	file:
width	drivers/mtd/nand/tegra_nand.c	/^	s32 width;		\/* bit width, normally 8 *\/$/;"	m	struct:fdt_nand	typeref:typename:s32	file:
width	drivers/mtd/nand/vf610_nfc.c	/^	int width;$/;"	m	struct:vf610_nfc_config	typeref:typename:int	file:
width	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	unsigned int width; \/* encoding width. (bool must be 1.) *\/$/;"	m	struct:qb_attr_code	typeref:typename:unsigned int
width	drivers/video/da8xx-fb.h	/^	unsigned short	width;$/;"	m	struct:da8xx_panel	typeref:typename:unsigned short
width	drivers/video/stb_truetype.h	/^   int   width;$/;"	m	struct:stbtt_pack_context	typeref:typename:int
width	drivers/video/stb_truetype.h	/^   int width,height;$/;"	m	struct:__anonce392f790f08	typeref:typename:int
width	drivers/video/tegra.c	/^	int width;			\/* width in pixels *\/$/;"	m	struct:tegra_lcd_priv	typeref:typename:int	file:
width	include/bmp_layout.h	/^	__u32	width;$/;"	m	struct:bmp_header	typeref:typename:__u32
width	include/efi_api.h	/^	u32 width;$/;"	m	struct:efi_gop_mode_info	typeref:typename:u32
width	include/linux/fb.h	/^	__u32 width;			\/* Size of image *\/$/;"	m	struct:fb_image_user	typeref:typename:__u32
width	include/linux/fb.h	/^	__u32 width;			\/* width of picture in mm     *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
width	include/linux/fb.h	/^	__u32 width;		\/* Size of image *\/$/;"	m	struct:fb_image	typeref:typename:__u32
width	include/linux/fb.h	/^	__u32 width;$/;"	m	struct:fb_copyarea	typeref:typename:__u32
width	include/linux/fb.h	/^	__u32 width;$/;"	m	struct:fb_fillrect	typeref:typename:__u32
width	include/linux/mtd/fsl_upm.h	/^	int width;$/;"	m	struct:fsl_upm_nand	typeref:typename:int
width	include/stdio_dev.h	/^	ushort	width;			\/* Horizontal resolution		*\/$/;"	m	struct:__anon77b06a0f0108	typeref:typename:ushort
width	include/video_easylogo.h	/^	int		width;$/;"	m	struct:__anon1a9c56c70108	typeref:typename:int
width	post/lib_powerpc/load.c	/^    uint width;$/;"	m	struct:cpu_post_load_s	typeref:typename:uint	file:
width	post/lib_powerpc/store.c	/^    uint width;$/;"	m	struct:cpu_post_store_s	typeref:typename:uint	file:
width	tools/bmp_logo.c	/^	uint16_t width;$/;"	m	struct:bitmap_s	typeref:typename:uint16_t	file:
width	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
width_detection	tools/zynqimage.c	/^	uint32_t width_detection; \/* 0x20 *\/$/;"	m	struct:zynq_header	typeref:typename:uint32_t	file:
width_detection	tools/zynqmpimage.c	/^	uint32_t width_detection; \/* 0x20 *\/$/;"	m	struct:zynqmp_header	typeref:typename:uint32_t	file:
wifi_en_bpi_m2p	arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts	/^	wifi_en_bpi_m2p: wifi_en_pin {$/;"	l
wifi_enable_h	arch/arm/dts/rk3288-veyron.dtsi	/^		wifi_enable_h: wifienable-h {$/;"	l
wifi_pwrseq	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq	arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq	arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq	arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq	arch/arm/dts/sun8i-q8-common.dtsi	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq	arch/arm/dts/sun8i-r16-parrot.dts	/^	wifi_pwrseq: wifi_pwrseq {$/;"	l
wifi_pwrseq_pin_mid2407	arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts	/^	wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {$/;"	l
wifi_pwrseq_pin_mid2809	arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts	/^	wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 {$/;"	l
wifi_pwrseq_pin_orangepi	arch/arm/dts/sun8i-h3-orangepi-2.dts	/^	wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 {$/;"	l
wifi_pwrseq_pin_q8	arch/arm/dts/sun8i-q8-common.dtsi	/^	wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 {$/;"	l
wifi_reg_on	arch/arm/dts/sun5i-r8-chip.dts	/^	wifi_reg_on: wifi_reg_on {$/;"	l
wifi_regulator	arch/arm/dts/rk3288-veyron.dtsi	/^	wifi_regulator: wifi-regulator {$/;"	l
wifi_reset_pin_hummingbird	arch/arm/dts/sun6i-a31-hummingbird.dts	/^	wifi_reset_pin_hummingbird: wifi_reset_pin@0 {$/;"	l
wifi_reset_pin_parrot	arch/arm/dts/sun8i-r16-parrot.dts	/^	wifi_reset_pin_parrot: wifi_reset_pin@0 {$/;"	l
wiminit	arch/sparc/cpu/leon3/start.S	/^wiminit:$/;"	l
wimr0	arch/arm/include/asm/arch-mx31/imx-regs.h	/^	u32 wimr0;$/;"	m	struct:clock_control_regs	typeref:typename:u32
win	arch/arm/include/asm/arch-tegra/dc.h	/^	struct dc_win_reg win;		\/* WIN A\/B\/C 0x700 ~ 0x719*\/$/;"	m	struct:dc_ctlr	typeref:struct:dc_win_reg
win	drivers/net/mvgbe.h	/^	enum mvgbe_adrwin win;	\/* Window number *\/$/;"	m	struct:mvgbe_winparam	typeref:enum:mvgbe_adrwin
win0_act_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_act_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_cbr_mst	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_cbr_mst;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_color_key	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_color_key;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_ctrl0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_ctrl0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_ctrl1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_ctrl1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_dsp_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_dsp_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_dsp_st	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_dsp_st;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_dst_alpha_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_dst_alpha_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_fading_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_fading_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_reserved0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_reserved0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_scl_factor_cbr	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_scl_factor_cbr;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_scl_factor_yrgb	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_scl_factor_yrgb;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_scl_offset	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_scl_offset;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_src_alpha_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_src_alpha_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_vir	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_vir;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0_yrgb_mst	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win0_yrgb_mst;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win0map	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int win0map;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
win1_act_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_act_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_basead	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 win1_basead;$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
win1_cbr_mst	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_cbr_mst;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_color_key	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_color_key;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_ctrl0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_ctrl0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_ctrl1	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_ctrl1;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_dsp_info	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_dsp_info;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_dsp_st	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_dsp_st;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_dst_alpha_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_dst_alpha_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_fading_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_fading_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_reservd0	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_reservd0;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_scl_factor_cbr	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_scl_factor_cbr;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_scl_factor_yrgb	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_scl_factor_yrgb;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_scl_offset	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_scl_offset;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_src_alpha_ctrl	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_src_alpha_ctrl;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_vir	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_vir;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1_yrgb_mst	arch/arm/include/asm/arch-rockchip/vop_rk3288.h	/^	u32 win1_yrgb_mst;$/;"	m	struct:rk3288_vop	typeref:typename:u32
win1map	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int win1map;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
win2_basead	arch/arm/mach-rmobile/include/mach/ehci-rmobile.h	/^	u32 win2_basead;$/;"	m	struct:ahbconf_pci_bridge	typeref:typename:u32
win2map	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int win2map;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
win3map	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int win3map;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
win4map	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int win4map;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
winSizeX	include/video_fb.h	/^    unsigned int winSizeX;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
winSizeY	include/video_fb.h	/^    unsigned int winSizeY;$/;"	m	struct:graphic_device	typeref:typename:unsigned int
win_a_attributes	include/vbe.h	/^	u8 win_a_attributes;	\/* 02 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
win_a_incr_syncpt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_a_incr_syncpt;		\/* _CMD_WIN_A_INCR_SYNCPT_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_a_incr_syncpt_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_a_incr_syncpt_ctrl;	\/* _CMD_WIN_A_INCR_SYNCPT_CNTRL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_a_incr_syncpt_err	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_a_incr_syncpt_err;	\/* _CMD_WIN_A_INCR_SYNCPT_ERROR_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_a_segment	include/vbe.h	/^	u16 win_a_segment;	\/* 08 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
win_atime	fs/yaffs2/yaffs_guts.h	/^	u32 win_atime[2];$/;"	m	struct:yaffs_obj	typeref:typename:u32[2]
win_atime	fs/yaffs2/yaffs_guts.h	/^	u32 win_atime[2];$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32[2]
win_b_attributes	include/vbe.h	/^	u8 win_b_attributes;	\/* 03 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
win_b_incr_syncpt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_b_incr_syncpt;		\/* _CMD_WIN_B_INCR_SYNCPT_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_b_incr_syncpt_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_b_incr_syncpt_ctrl;	\/* _CMD_WIN_B_INCR_SYNCPT_CNTRL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_b_incr_syncpt_err	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_b_incr_syncpt_err;	\/* _CMD_WIN_B_INCR_SYNCPT_ERROR_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_b_segment	include/vbe.h	/^	u16 win_b_segment;	\/* 0a *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
win_bar	arch/arm/mach-mvebu/dram.c	/^	u32	win_bar;$/;"	m	struct:sdram_bank	typeref:typename:u32	file:
win_bitfields	arch/powerpc/include/asm/fsl_pamu.h	/^	uint32_t win_bitfields;			\/* See PAACE_WIN_* *\/$/;"	m	struct:paace	typeref:typename:uint32_t
win_c_incr_syncpt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_c_incr_syncpt;		\/* _CMD_WIN_C_INCR_SYNCPT_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_c_incr_syncpt_ctrl	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_c_incr_syncpt_ctrl;	\/* _CMD_WIN_C_INCR_SYNCPT_CNTRL_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_c_incr_syncpt_err	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_c_incr_syncpt_err;	\/* _CMD_WIN_C_INCR_SYNCPT_ERROR_0 *\/$/;"	m	struct:dc_cmd_reg	typeref:typename:uint
win_cfg_offset	arch/arm/mach-mvebu/mbus.c	/^	unsigned int (*win_cfg_offset)(const int win);$/;"	m	struct:mvebu_mbus_soc_data	typeref:typename:unsigned int (*)(const int win)	file:
win_color_depth_id	arch/arm/include/asm/arch-tegra/dc.h	/^enum win_color_depth_id {$/;"	g
win_ctime	fs/yaffs2/yaffs_guts.h	/^	u32 win_ctime[2];$/;"	m	struct:yaffs_obj	typeref:typename:u32[2]
win_ctime	fs/yaffs2/yaffs_guts.h	/^	u32 win_ctime[2];$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32[2]
win_func_ptr	include/vbe.h	/^	u32 win_func_ptr;	\/* 0c *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u32
win_granularity	include/vbe.h	/^	u16 win_granularity;	\/* 04 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
win_id	drivers/video/exynos/exynos_fb.c	/^	unsigned int win_id;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
win_id	include/exynos_lcd.h	/^	unsigned int win_id;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
win_mtime	fs/yaffs2/yaffs_guts.h	/^	u32 win_mtime[2];$/;"	m	struct:yaffs_obj	typeref:typename:u32[2]
win_mtime	fs/yaffs2/yaffs_guts.h	/^	u32 win_mtime[2];$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32[2]
win_opt	arch/arm/include/asm/arch-tegra/dc.h	/^	uint win_opt;			\/* _WIN_WIN_OPTIONS_0 *\/$/;"	m	struct:dc_win_reg	typeref:typename:uint
win_size	include/vbe.h	/^	u16 win_size;		\/* 06 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
win_sz	arch/arm/mach-mvebu/dram.c	/^	u32	win_sz;$/;"	m	struct:sdram_bank	typeref:typename:u32	file:
winbond_enable_serial	drivers/misc/winbond_w83627.c	/^void winbond_enable_serial(uint dev, uint iobase, uint irq)$/;"	f	typeref:typename:void
winbuf	arch/arm/include/asm/arch-tegra/dc.h	/^	struct dc_winbuf_reg winbuf;	\/* WINBUF A\/B\/C 0x800 ~ 0x80d *\/$/;"	m	struct:dc_ctlr	typeref:struct:dc_winbuf_reg
winc	arch/arm/include/asm/arch-tegra/dc.h	/^	struct dc_winc_reg winc;	\/* Window A\/B\/C 0x500 ~ 0x628 *\/$/;"	m	struct:dc_ctlr	typeref:struct:dc_winc_reg
winchmap2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int winchmap2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wincon0	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wincon0;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wincon1	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wincon1;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wincon2	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wincon2;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wincon3	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wincon3;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wincon4	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wincon4;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
window	lib/zlib/deflate.h	/^    Bytef *window;$/;"	m	struct:internal_state	typeref:typename:Bytef *
window	lib/zlib/inflate.h	/^    unsigned char FAR *window;  \/* allocated sliding window, if needed *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned char FAR *
window1	scripts/kconfig/gconf.glade	/^<widget class="GtkWindow" id="window1">$/;"	i
window_mem_addr	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 window_mem_addr = 0;$/;"	v	typeref:typename:u32
window_size	lib/zlib/deflate.h	/^    ulg window_size;$/;"	m	struct:internal_state	typeref:typename:ulg
windowbase	arch/xtensa/include/asm/ptrace.h	/^	unsigned long windowbase;	\/*  48 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
windows	arch/arm/mach-mvebu/cpu.c	/^static struct mbus_win windows[] = {$/;"	v	typeref:struct:mbus_win[]	file:
windowstart	arch/xtensa/include/asm/ptrace.h	/^	unsigned long windowstart;	\/*  52 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
winshmap	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int winshmap;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wirr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $wirr  = $mbar - 1 + 0x283$/;"	t
wirte_permission_0	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 wirte_permission_0;		\/* 0x58 *\/$/;"	m	struct:pm	typeref:typename:u32
with	doc/README.x86	/^with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP$/;"	l
withPrefix64k	lib/lz4.c	/^typedef enum { noDict = 0, withPrefix64k, usingExtDict } dict_directive;$/;"	e	enum:__anoneaf05ef60103	file:
wkclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkclkstctrl;	\/* offset 0x00 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkclkstctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkclkstctrl;	\/* offset 0x300 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkctrlclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkctrlclkctrl;	\/* offset 0x04 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkctrlclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkctrlclkctrl;	\/* offset 0x360 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkgpio0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkgpio0clkctrl;	\/* offset 0x08 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkgpio0clkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkgpio0clkctrl;	\/* offset 0x368 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkl4wkclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkl4wkclkctrl;	\/* offset 0x0c *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkl4wkclkctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkl4wkclkctrl;	\/* offset 0x220 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkup_adctscctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkup_adctscctrl;	\/* offset 0xBC *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkup_i2c0ctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkup_i2c0ctrl;	\/* offset 0x340 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkup_i2c0ctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkup_i2c0ctrl;	\/* offset 0xB8 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkup_m3	arch/arm/dts/am33xx.dtsi	/^		wkup_m3: wkup_m3@44d00000 {$/;"	l
wkup_padconf_array_essential	board/compulab/cm_t54/mux.c	/^const struct pad_conf_entry wkup_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_essential	board/gumstix/duovero/duovero_mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_essential	board/ti/omap5_uevm/mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_essential	board/ti/panda/panda_mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_essential	board/ti/sdp4430/sdp4430_mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_essential_4460	board/ti/panda/panda_mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_essential_4460	board/ti/sdp4430/sdp4430_mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_padconf_array_non_essential	board/gumstix/duovero/duovero_mux_data.h	/^const struct pad_conf_entry wkup_padconf_array_non_essential[] = {$/;"	v	typeref:typename:const struct pad_conf_entry[]
wkup_uart0ctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkup_uart0ctrl;	\/* offset 0x348 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkup_uart0ctrl	arch/arm/include/asm/arch-am33xx/cpu.h	/^	unsigned int wkup_uart0ctrl;	\/* offset 0xB4 *\/$/;"	m	struct:cm_wkuppll	typeref:typename:unsigned int
wkupaon_iclk_mux	arch/arm/dts/dra7xx-clocks.dtsi	/^	wkupaon_iclk_mux: wkupaon_iclk_mux {$/;"	l
wl12xx_gpio	arch/arm/dts/am335x-evmsk.dts	/^	wl12xx_gpio: pinmux_wl12xx_gpio {$/;"	l
wl12xx_pads	board/boundary/nitrogen6x/nitrogen6x.c	/^static iomux_v3_cfg_t const wl12xx_pads[] = {$/;"	v	typeref:typename:iomux_v3_cfg_t const[]	file:
wl12xx_vmmc	arch/arm/dts/am335x-evmsk.dts	/^	wl12xx_vmmc: fixedregulator@2 {$/;"	l
wl_debug_delay	drivers/ddr/marvell/a38x/ddr3_training_static.c	/^int wl_debug_delay = 0;$/;"	v	typeref:typename:int
wl_entry_destroy	drivers/mtd/ubi/wl.c	/^static void wl_entry_destroy(struct ubi_device *ubi, struct ubi_wl_entry *e)$/;"	f	typeref:typename:void	file:
wl_get_wle	drivers/mtd/ubi/wl.c	/^static struct ubi_wl_entry *wl_get_wle(struct ubi_device *ubi)$/;"	f	typeref:struct:ubi_wl_entry *	file:
wl_lock	drivers/mtd/ubi/ubi.h	/^	spinlock_t wl_lock;$/;"	m	struct:ubi_device	typeref:typename:spinlock_t
wl_max_phase	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 wl_max_phase;$/;"	m	struct:dram_info	typeref:typename:u32
wl_min_phase	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 wl_min_phase;$/;"	m	struct:dram_info	typeref:typename:u32
wl_scheduled	drivers/mtd/ubi/ubi.h	/^	int wl_scheduled;$/;"	m	struct:ubi_device	typeref:typename:int
wl_sup_pattern	drivers/ddr/marvell/a38x/ddr3_patterns_64bit.h	/^u32 wl_sup_pattern[LEN_WL_SUP_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[LEN_WL_SUP_PATTERN]__aligned (32)
wl_sup_pattern	drivers/ddr/marvell/axp/ddr3_patterns_64bit.h	/^u32 wl_sup_pattern[LEN_WL_SUP_PATTERN] __aligned(32) = {$/;"	v	typeref:typename:u32[LEN_WL_SUP_PATTERN]__aligned (32)
wl_tree_add	drivers/mtd/ubi/wl.c	/^static void wl_tree_add(struct ubi_wl_entry *e, struct rb_root *root)$/;"	f	typeref:typename:void	file:
wl_val	drivers/ddr/marvell/axp/ddr3_hw_training.h	/^	u32 wl_val[MAX_CS][MAX_PUP_NUM][7];$/;"	m	struct:dram_info	typeref:typename:u32[][][7]
wlan	arch/x86/include/asm/me_common.h	/^	u32 wlan:1;$/;"	m	struct:mefwcaps_sku	typeref:typename:u32:1
wlan_cx3110x	board/nokia/rx51/tag_omap.h	/^		struct omap_wlan_cx3110x_config wlan_cx3110x;$/;"	m	union:tag_omap::__anon0db899da010a	typeref:struct:omap_wlan_cx3110x_config
wlan_en_reg	arch/arm/dts/am335x-evm.dts	/^	wlan_en_reg: fixedregulator@2 {$/;"	l
wlan_pins	arch/arm/dts/am335x-evm.dts	/^	wlan_pins: pinmux_wlan_pins {$/;"	l
wlan_pins_default	arch/arm/dts/am437x-gp-evm.dts	/^	wlan_pins_default: pinmux_wlan_pins_default {$/;"	l
wlan_pins_sleep	arch/arm/dts/am437x-gp-evm.dts	/^	wlan_pins_sleep: pinmux_wlan_pins_sleep {$/;"	l
wlcore	arch/arm/dts/am335x-evm.dts	/^	wlcore: wlcore@0 {$/;"	l
wlcore	arch/arm/dts/am335x-evmsk.dts	/^	wlcore: wlcore@2 {$/;"	l
wlcore	arch/arm/dts/am437x-gp-evm.dts	/^	wlcore: wlcore@0 {$/;"	l
wld_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void wld_dump(void)$/;"	f	typeref:typename:void	file:
wld_dump	arch/arm/mach-uniphier/dram/cmd_ddrphy.c	/^static void wld_dump(const struct phy_param *phy_param)$/;"	f	typeref:typename:void	file:
wldqsen	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 wldqsen;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
wlmrd	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 wlmrd;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
wm8903	arch/arm/dts/tegra20-harmony.dts	/^		wm8903: wm8903@1a {$/;"	l
wm8903	arch/arm/dts/tegra20-seaboard.dts	/^		wm8903: wm8903@1a {$/;"	l
wm8903	arch/arm/dts/tegra20-ventana.dts	/^		wm8903: wm8903@1a {$/;"	l
wm8994_device_init	drivers/sound/wm8994.c	/^static int wm8994_device_init(struct wm8994_priv *wm8994,$/;"	f	typeref:typename:int	file:
wm8994_fll_config	drivers/sound/wm8994.c	/^struct wm8994_fll_config {$/;"	s	file:
wm8994_hw_params	drivers/sound/wm8994.c	/^static int wm8994_hw_params(struct wm8994_priv *wm8994, int aif_id,$/;"	f	typeref:typename:int	file:
wm8994_i2c_init	drivers/sound/wm8994.c	/^static void wm8994_i2c_init(int bus_no)$/;"	f	typeref:typename:void	file:
wm8994_i2c_read	drivers/sound/wm8994.c	/^static unsigned int  wm8994_i2c_read(unsigned int reg , unsigned short *data)$/;"	f	typeref:typename:unsigned int	file:
wm8994_i2c_write	drivers/sound/wm8994.c	/^static int wm8994_i2c_write(unsigned int reg, unsigned short data)$/;"	f	typeref:typename:int	file:
wm8994_init	drivers/sound/wm8994.c	/^int wm8994_init(const void *blob, enum en_audio_interface aif_id,$/;"	f	typeref:typename:int
wm8994_init_volume_aif1_dac1	drivers/sound/wm8994.c	/^static int wm8994_init_volume_aif1_dac1(void)$/;"	f	typeref:typename:int	file:
wm8994_init_volume_aif2_dac1	drivers/sound/wm8994.c	/^static int wm8994_init_volume_aif2_dac1(void)$/;"	f	typeref:typename:int	file:
wm8994_priv	drivers/sound/wm8994.c	/^struct wm8994_priv {$/;"	s	file:
wm8994_set_fmt	drivers/sound/wm8994.c	/^int wm8994_set_fmt(int aif_id, unsigned int fmt)$/;"	f	typeref:typename:int
wm8994_set_sysclk	drivers/sound/wm8994.c	/^static int wm8994_set_sysclk(struct wm8994_priv *wm8994, int aif_id,$/;"	f	typeref:typename:int	file:
wm8994_type	drivers/sound/wm8994.h	/^enum wm8994_type {$/;"	g
wm8994_update_bits	drivers/sound/wm8994.c	/^static int wm8994_update_bits(unsigned int reg, unsigned short mask,$/;"	f	typeref:typename:int	file:
wm8994_vmid_mode	drivers/sound/wm8994.h	/^enum wm8994_vmid_mode {$/;"	g
wm_en	drivers/video/ipu_regs.h	/^	u32 wm_en[2];$/;"	m	struct:ipu_idmac	typeref:typename:u32[2]
wmask	arch/xtensa/include/asm/ptrace.h	/^	unsigned long wmask;		\/*  28 *\/$/;"	m	struct:pt_regs	typeref:typename:unsigned long
wmb	arch/arc/include/asm/io.h	/^#define wmb(/;"	d
wmb	arch/blackfin/include/asm/system.h	/^#define wmb(/;"	d
wmb	arch/microblaze/include/asm/system.h	/^#define wmb(/;"	d
wmb	arch/mips/include/asm/system.h	/^#define wmb(/;"	d
wmb	arch/nds32/include/asm/system.h	/^#define wmb(/;"	d
wmb	arch/sh/include/asm/system.h	/^#define wmb(/;"	d
wmb	drivers/usb/musb-new/linux-compat.h	/^#define wmb(/;"	d
wmcr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u16 wmcr;	\/* Misc Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wmcr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u16	wmcr;	\/* Miscellaneous Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wmcr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u16	wmcr;	\/* Miscellaneous Control *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wmcr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 wmcr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wmin	drivers/rtc/ftrtc010.c	/^	unsigned int wmin;		\/* 0x28 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
wml	drivers/mmc/fsl_esdhc.c	/^	uint    wml;		\/* Watermark level register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
wmr	arch/m68k/include/asm/immap_5275.h	/^	u16 wmr;$/;"	m	struct:wdog_ctrl	typeref:typename:u16
wmr	arch/m68k/include/asm/immap_5282.h	/^	ushort wmr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wmr	arch/m68k/include/asm/immap_5445x.h	/^	u16 wmr;$/;"	m	struct:wtm	typeref:typename:u16
wn	arch/arm/include/asm/arch-s32v234/imx-regs.h	/^	u32 wn;$/;"	m	struct:wdog_regs	typeref:typename:u32
wol_addr_mask	drivers/net/pch_gbe.h	/^	u32 wol_addr_mask;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
wol_ctrl	drivers/net/pch_gbe.h	/^	u32 wol_ctrl;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
wol_st	drivers/net/pch_gbe.h	/^	u32 wol_st;$/;"	m	struct:pch_gbe_regs	typeref:typename:u32
wolcr	drivers/net/ftgmac100.h	/^	unsigned int	wolcr;		\/* 0x70 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
wolopts	include/linux/ethtool.h	/^	__u32	wolopts;$/;"	m	struct:ethtool_wolinfo	typeref:typename:__u32
wolsr	drivers/net/ftgmac100.h	/^	unsigned int	wolsr;		\/* 0x74 *\/$/;"	m	struct:ftgmac100	typeref:typename:unsigned int
womr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		womr;		\/* 0x1E4 Write Protect Mode  *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
woodburn_init	board/woodburn/woodburn.c	/^int woodburn_init(void)$/;"	f	typeref:typename:int
word	arch/arc/lib/cache.c	/^		unsigned int word;$/;"	m	union:read_decode_cache_bcr::__anon3b450cc2060a	typeref:typename:unsigned int	file:
word	arch/arc/lib/cache.c	/^		unsigned int word;$/;"	m	union:read_decode_cache_bcr_arcv2::__anon3b450cc2010a	typeref:typename:unsigned int	file:
word	arch/arc/lib/cache.c	/^		unsigned int word;$/;"	m	union:read_decode_cache_bcr_arcv2::__anon3b450cc2030a	typeref:typename:unsigned int	file:
word	arch/arc/lib/cache.c	/^		unsigned int word;$/;"	m	union:read_decode_cache_bcr_arcv2::__anon3b450cc2050a	typeref:typename:unsigned int	file:
word	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 word;$/;"	m	union:osc_ctrl_reg	typeref:typename:u32
word	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 word;$/;"	m	union:pllx_base_reg	typeref:typename:u32
word	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 word;$/;"	m	union:pllx_misc_reg	typeref:typename:u32
word	arch/arm/include/asm/arch-tegra/warmboot.h	/^	u32 word;$/;"	m	union:scratch3_reg	typeref:typename:u32
word	arch/arm/include/asm/imx-common/hab.h	/^	int word;$/;"	m	struct:imx_sec_config_fuse_t	typeref:typename:int
word	arch/arm/mach-tegra/tegra20/warmboot.c	/^	u32 word;$/;"	m	union:fbio_spare_reg	typeref:typename:u32	file:
word	arch/arm/mach-tegra/tegra20/warmboot.c	/^	u32 word;$/;"	m	union:scratch24_reg	typeref:typename:u32	file:
word	arch/arm/mach-tegra/tegra20/warmboot.c	/^	u32 word;$/;"	m	union:scratch2_reg	typeref:typename:u32	file:
word	arch/arm/mach-tegra/tegra20/warmboot.c	/^	u32 word;$/;"	m	union:scratch4_reg	typeref:typename:u32	file:
word	arch/arm/mach-tegra/tegra20/warmboot.c	/^	u32 word;$/;"	m	union:xm2cfga_reg	typeref:typename:u32	file:
word	arch/arm/mach-tegra/tegra20/warmboot.c	/^	u32 word;$/;"	m	union:xm2cfgd_reg	typeref:typename:u32	file:
word	common/cli_hush.c	/^	glob_t word;				\/* *word.gl_pathv is the filename *\/$/;"	m	struct:redir_struct	typeref:typename:glob_t	file:
word	drivers/misc/fsl_iim.c	/^		u32 word[0x100];$/;"	m	struct:fsl_iim::__anon3d0f03620108	typeref:typename:u32[0x100]	file:
word	drivers/mtd/nand/mxc_nand.c	/^				uint32_t word;$/;"	m	union:mxc_nand_read_buf::__anon3deb00d0040a	typeref:typename:uint32_t	file:
word	drivers/mtd/nand/mxc_nand.c	/^				uint32_t word;$/;"	m	union:mxc_nand_write_buf::__anon3deb00d0030a	typeref:typename:uint32_t	file:
word	drivers/mtd/nand/mxc_nand.c	/^			uint16_t word;$/;"	m	union:mxc_nand_read_word::__anon3deb00d0020a	typeref:typename:uint16_t	file:
word	drivers/mtd/nand/mxc_nand.c	/^		uint16_t word;$/;"	m	union:mxc_nand_read_byte::__anon3deb00d0010a	typeref:typename:uint16_t	file:
word	drivers/net/fsl-mc/dpio/qbman_portal.h	/^	unsigned int word; \/* which uint32_t[] array member encodes the field *\/$/;"	m	struct:qb_attr_code	typeref:typename:unsigned int
word	drivers/net/lan91c96.h	/^typedef unsigned short			word;$/;"	t	typeref:typename:unsigned short
word	drivers/net/mvpp2.c	/^	u32 word[MVPP2_PRS_SRAM_WORDS];$/;"	m	union:mvpp2_prs_sram_entry	typeref:typename:u32[]	file:
word	drivers/net/mvpp2.c	/^	u32 word[MVPP2_PRS_TCAM_WORDS];$/;"	m	union:mvpp2_prs_tcam_entry	typeref:typename:u32[]	file:
word	drivers/net/smc91111.h	/^typedef unsigned short			word;$/;"	t	typeref:typename:unsigned short
word	drivers/usb/gadget/pxa25x_udc.c	/^		u32			word[2];$/;"	m	union:handle_ep0::__anon3e9922fb010a	typeref:typename:u32[2]	file:
word	drivers/usb/host/ohci-s3c24xx.c	/^		__u32 word[4];$/;"	m	union:ohci_submit_rh_msg::__anon1f109079010a	typeref:typename:__u32[4]	file:
word	drivers/video/ipu_common.c	/^	struct ipu_ch_param_word word[2];$/;"	m	struct:ipu_ch_param	typeref:struct:ipu_ch_param_word[2]	file:
word1	drivers/net/ep93xx_eth.h	/^	uint32_t word1;$/;"	m	struct:rx_descriptor	typeref:typename:uint32_t
word1	drivers/net/ep93xx_eth.h	/^	uint32_t word1;$/;"	m	struct:rx_status	typeref:typename:uint32_t
word1	drivers/net/ep93xx_eth.h	/^	uint32_t word1;$/;"	m	struct:tx_descriptor	typeref:typename:uint32_t
word1	drivers/net/ep93xx_eth.h	/^	uint32_t word1;$/;"	m	struct:tx_status	typeref:typename:uint32_t
word127	include/ata.h	/^	unsigned short	word127;	\/* reserved (word 127) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
word156	include/ata.h	/^	unsigned short	word156;$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
word2	drivers/net/ep93xx_eth.h	/^	uint32_t word2;$/;"	m	struct:rx_descriptor	typeref:typename:uint32_t
word2	drivers/net/ep93xx_eth.h	/^	uint32_t word2;$/;"	m	struct:rx_status	typeref:typename:uint32_t
word2	drivers/net/ep93xx_eth.h	/^	uint32_t word2;$/;"	m	struct:tx_descriptor	typeref:typename:uint32_t
word89	include/ata.h	/^	unsigned short	word89;		\/* reserved (word 89) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
word90	include/ata.h	/^	unsigned short	word90;		\/* reserved (word 90) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
word92	include/ata.h	/^	unsigned short	word92;		\/* reserved (word 92) *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short
word_copy	drivers/net/fsl-mc/dpio/qbman_sys.h	/^static inline void word_copy(void *d, const void *s, unsigned int cnt)$/;"	f	typeref:typename:void
word_opt	scripts/kconfig/zconf.y	/^word_opt: \/* empty *\/			{ $$ = NULL; }$/;"	l	typeref:typename:string
word_size	drivers/net/e1000.h	/^	uint16_t word_size;$/;"	m	struct:e1000_eeprom_info	typeref:typename:uint16_t
word_type	arch/blackfin/lib/muldi3.c	/^typedef int word_type __attribute__ ((mode(__word__)));$/;"	t	typeref:typename:int	file:
word_type	arch/m68k/lib/ashldi3.c	/^typedef int word_type __attribute__ ((mode (__word__)));$/;"	t	typeref:typename:int	file:
word_type	arch/m68k/lib/lshrdi3.c	/^typedef int word_type __attribute__ ((mode (__word__)));$/;"	t	typeref:typename:int	file:
word_type	arch/m68k/lib/muldi3.c	/^typedef int word_type __attribute__ ((mode (__word__)));$/;"	t	typeref:typename:int	file:
word_type	arch/microblaze/lib/muldi3.c	/^typedef int word_type __attribute__ ((mode(__word__)));$/;"	t	typeref:typename:int	file:
word_type	arch/mips/lib/libgcc.h	/^typedef int word_type __attribute__ ((mode (__word__)));$/;"	t	typeref:typename:int
word_type	arch/nios2/lib/libgcc.c	/^typedef int word_type;$/;"	t	typeref:typename:int	file:
word_type	arch/sh/lib/libgcc.h	/^typedef int word_type __attribute__ ((mode (__word__)));$/;"	t	typeref:typename:int
word_write_time	include/linux/mtd/flashchip.h	/^	int word_write_time;$/;"	m	struct:flchip	typeref:typename:int
word_write_time_max	include/linux/mtd/flashchip.h	/^	int word_write_time_max;$/;"	m	struct:flchip	typeref:typename:int
word_write_timeout_max	include/mtd/cfi_flash.h	/^	u8	word_write_timeout_max;$/;"	m	struct:cfi_qry	typeref:typename:u8
word_write_timeout_typ	include/mtd/cfi_flash.h	/^	u8	word_write_timeout_typ;$/;"	m	struct:cfi_qry	typeref:typename:u8
wordlen	drivers/spi/omap3_spi.c	/^	unsigned int wordlen;$/;"	m	struct:omap3_spi_priv	typeref:typename:unsigned int	file:
wordlen	include/spi.h	/^	unsigned int wordlen;$/;"	m	struct:spi_slave	typeref:typename:unsigned int
words	include/fsl-mc/fsl_dpaa_fd.h	/^		u32 words[8];$/;"	m	union:dpaa_fd::__anonb79f23a2010a	typeref:typename:u32[8]
words	include/fsl-mc/fsl_qbman_base.h	/^		uint32_t words[8];$/;"	m	union:qbman_fd::__anonb88dd6cc010a	typeref:typename:uint32_t[8]
words104_125	include/ata.h	/^	unsigned short	words104_125[22];\/* reserved words 104-125 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[22]
words130_155	include/ata.h	/^	unsigned short	words130_155[26];\/* reserved vendor words 130-155 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[26]
words157_159	include/ata.h	/^	unsigned short	words157_159[3];\/* reserved vendor words 157-159 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[3]
words160_162	include/ata.h	/^	unsigned short	words160_162[3];\/* reserved words 160-162 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[3]
words164_255	include/ata.h	/^	unsigned short	words164_255[92];\/* reserved words 164-255 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[92]
words69_70	include/ata.h	/^	unsigned short	words69_70[2];	\/* reserved words 69-70 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[2]
words71_74	include/ata.h	/^	unsigned short	words71_74[4];	\/* reserved words 71-74 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[4]
words76_79	include/ata.h	/^	unsigned short  words76_79[4];	\/* reserved words 76-79 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[4]
words94_99	include/ata.h	/^	unsigned short	words94_99[6];\/* reserved words 94-99 *\/$/;"	m	struct:hd_driveid	typeref:typename:unsigned short[6]
work	doc/README.x86	/^work with minimal adjustments on other x86 boards since coreboot deals with$/;"	l
work	lib/zlib/inflate.h	/^    unsigned short work[288];   \/* work area for code table building *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned short[288]
workFactor	lib/bzip2/bzlib_private.h	/^      Int32    workFactor;$/;"	m	struct:__anon93cbeec40108	typeref:typename:Int32
work_92105_display_init	board/work-microwave/work_92105/work_92105_display.c	/^void work_92105_display_init(void)$/;"	f	typeref:typename:void
work_led	arch/arm/dts/rk3288-firefly.dtsi	/^		work_led: work-led {$/;"	l
work_sem	drivers/mtd/ubi/ubi.h	/^	struct rw_semaphore work_sem;$/;"	m	struct:ubi_device	typeref:struct:rw_semaphore
work_struct	include/linux/compat.h	/^struct work_struct {};$/;"	s
working_fdt	cmd/fdt.c	/^struct fdt_header *working_fdt;$/;"	v	typeref:struct:fdt_header *
working_state	arch/x86/include/asm/me_common.h	/^	u32 working_state:4;$/;"	m	struct:me_hfs	typeref:typename:u32:4
works	drivers/mtd/ubi/ubi.h	/^	struct list_head works;$/;"	m	struct:ubi_device	typeref:struct:list_head
works_count	drivers/mtd/ubi/ubi.h	/^	int works_count;$/;"	m	struct:ubi_device	typeref:typename:int
wp_enable	drivers/mmc/fsl_esdhc.c	/^	int wp_enable;$/;"	m	struct:fsl_esdhc_priv	typeref:typename:int	file:
wp_enable	include/fsl_esdhc.h	/^	u8	wp_enable;$/;"	m	struct:fsl_esdhc_cfg	typeref:typename:u8
wp_gpio	drivers/mmc/fsl_esdhc.c	/^	struct gpio_desc wp_gpio;$/;"	m	struct:fsl_esdhc_priv	typeref:struct:gpio_desc	file:
wp_gpio	drivers/mmc/omap_hsmmc.c	/^	int wp_gpio;$/;"	m	struct:omap_hsmmc_data	typeref:typename:int	file:
wp_gpio	drivers/mmc/omap_hsmmc.c	/^	struct gpio_desc wp_gpio;	\/* Write Protect GPIO *\/$/;"	m	struct:omap_hsmmc_data	typeref:struct:gpio_desc	file:
wp_gpio	drivers/mmc/tegra_mmc.c	/^	struct gpio_desc wp_gpio;	\/* Write Protect GPIO *\/$/;"	m	struct:tegra_mmc_priv	typeref:struct:gpio_desc	file:
wp_gpio	drivers/mtd/nand/tegra_nand.c	/^	struct gpio_desc wp_gpio;	\/* write-protect GPIO *\/$/;"	m	struct:fdt_nand	typeref:struct:gpio_desc	file:
wp_map	include/fsl_ifc.h	/^	u32 wp_map;$/;"	m	struct:fsl_ifc_fcm	typeref:typename:u32
wpalcon_h	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wpalcon_h;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wpalcon_l	arch/arm/mach-exynos/include/mach/fb.h	/^	unsigned int wpalcon_l;$/;"	m	struct:exynos_fb	typeref:typename:unsigned int
wpmr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	wpmr;		\/* 0xE4 Write Protect Mode Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
wpmr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	wpmr;		\/* 0xE4 Write Protect Mode Register (CAP0) *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
wpmr	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	wpmr;$/;"	m	struct:at91_matrix	typeref:typename:u32
wpmr	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	wpmr;$/;"	m	struct:at91_matrix	typeref:typename:u32
wpmr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 wpmr;		\/* 0xe4: Write Protection Mode Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
wpmr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 wpmr;	\/* 0x1E4: Write Protection Mode Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32
wpmr	drivers/i2c/at91_i2c.h	/^	u32 wpmr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
wpr	drivers/mtd/nand/lpc32xx_nand_mlc.c	/^	u32 wpr;$/;"	m	struct:lpc32xx_nand_mlc_registers	typeref:typename:u32	file:
wprot	drivers/mmc/ftsdc010_mci.c	/^	uint32_t wprot;   \/* write protected (locked) *\/$/;"	m	struct:ftsdc010_chip	typeref:typename:uint32_t	file:
wprotect	arch/sh/include/asm/cpu_sh7757.h	/^	unsigned int	wprotect;$/;"	m	struct:gctrl_regs	typeref:typename:unsigned int
wpsr	arch/arm/mach-at91/include/mach/at91_matrix.h	/^	u32		wpsr;		\/* 0x1E8 Write Protect Status *\/$/;"	m	struct:at91_matrix	typeref:typename:u32
wpsr	arch/arm/mach-at91/include/mach/at91_pio.h	/^	u32	wpsr;		\/* 0xE8 Write Protect Status Register *\/$/;"	m	struct:at91_port	typeref:typename:u32
wpsr	arch/arm/mach-at91/include/mach/at91_pmc.h	/^	u32	wpsr;		\/* 0xE8 Write Protect Status Register (CAP0) *\/$/;"	m	struct:at91_pmc	typeref:typename:u32
wpsr	arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h	/^	u32	wpsr;$/;"	m	struct:at91_matrix	typeref:typename:u32
wpsr	arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h	/^	u32	wpsr;$/;"	m	struct:at91_matrix	typeref:typename:u32
wpsr	arch/arm/mach-at91/include/mach/atmel_mpddrc.h	/^	u32 wpsr;		\/* 0xe8: Write Protection Status Register *\/$/;"	m	struct:atmel_mpddr	typeref:typename:u32
wpsr	arch/arm/mach-at91/include/mach/sama5_matrix.h	/^	u32 wpsr;	\/* 0x1E8: Write Protection Status Register *\/$/;"	m	struct:atmel_matrix	typeref:typename:u32
wpsr	drivers/i2c/at91_i2c.h	/^	u32 wpsr;$/;"	m	struct:at91_i2c_regs	typeref:typename:u32
wq	include/linux/mtd/flashchip.h	/^	wait_queue_head_t wq; \/* Wait on here when we're waiting for the chip$/;"	m	struct:flchip	typeref:typename:wait_queue_head_t
wq	include/linux/mtd/onenand.h	/^	wait_queue_head_t wq;$/;"	m	struct:onenand_chip	typeref:typename:wait_queue_head_t
wr	arch/m68k/include/asm/coldfire/qspi.h	/^	u16 wr;			\/* 0x08 Wrap *\/$/;"	m	struct:qspi_ctrl	typeref:typename:u16
wr	include/spartan2.h	/^	xilinx_wr_fn	wr;$/;"	m	struct:__anon44cdc6d90108	typeref:typename:xilinx_wr_fn
wr	include/spartan2.h	/^	xilinx_wr_fn	wr;$/;"	m	struct:__anon44cdc6d90208	typeref:typename:xilinx_wr_fn
wr	include/spartan3.h	/^	xilinx_wr_fn	wr;$/;"	m	struct:__anon44cdcb1a0108	typeref:typename:xilinx_wr_fn
wr	include/spartan3.h	/^	xilinx_wr_fn	wr;$/;"	m	struct:__anon44cdcb1a0208	typeref:typename:xilinx_wr_fn
wr	include/virtex2.h	/^	xilinx_wr_fn	wr;$/;"	m	struct:__anoncbf344e20108	typeref:typename:xilinx_wr_fn
wr_act	drivers/video/exynos/exynos_fb.c	/^	unsigned int wr_act;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
wr_act	include/exynos_lcd.h	/^	unsigned int wr_act;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
wr_ch_addr	drivers/video/ipu_regs.h	/^	u32 wr_ch_addr;$/;"	m	struct:ipu_dc_ch	typeref:typename:u32
wr_ch_addr_5_alt	drivers/video/ipu_regs.h	/^	u32 wr_ch_addr_5_alt;$/;"	m	struct:ipu_dc	typeref:typename:u32
wr_ch_conf	drivers/video/ipu_regs.h	/^	u32 wr_ch_conf;$/;"	m	struct:ipu_dc_ch	typeref:typename:u32
wr_chan	drivers/video/ipu_regs.h	/^	u32 wr_chan;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
wr_chan_alt	drivers/video/ipu_regs.h	/^	u32 wr_chan_alt;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
wr_chan_def	drivers/video/ipu_regs.h	/^	u32 wr_chan_def;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
wr_chan_def_alt	drivers/video/ipu_regs.h	/^	u32 wr_chan_def_alt;$/;"	m	struct:ipu_dmfc	typeref:typename:u32
wr_dc_adr	arch/powerpc/cpu/mpc8xx/start.S	/^wr_dc_adr:$/;"	l
wr_dc_cst	arch/powerpc/cpu/mpc8xx/start.S	/^wr_dc_cst:$/;"	l
wr_hold	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned wr_hold;$/;"	m	struct:aemif_config	typeref:typename:unsigned
wr_hold	drivers/video/exynos/exynos_fb.c	/^	unsigned int wr_hold;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
wr_hold	include/exynos_lcd.h	/^	unsigned int wr_hold;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
wr_ic_adr	arch/powerpc/cpu/mpc8xx/start.S	/^wr_ic_adr:$/;"	l
wr_ic_cst	arch/powerpc/cpu/mpc8xx/start.S	/^wr_ic_cst:$/;"	l
wr_io	drivers/video/mb862xx.c	/^#define	wr_io	/;"	d	file:
wr_io	drivers/video/mb862xx.c	/^#define	wr_io(/;"	d	file:
wr_level	arch/x86/cpu/quark/smc.c	/^void wr_level(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
wr_param	drivers/mtd/nand/kirkwood_nand.c	/^	u32 wr_param;	\/* 0x1041c *\/$/;"	m	struct:kwnandf_registers	typeref:typename:u32	file:
wr_rel_change	include/mmc.h	/^		unsigned wr_rel_change : 1;$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0208	typeref:typename:unsigned:1
wr_rel_change	include/mmc.h	/^		unsigned wr_rel_change : 1;$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0308	typeref:typename:unsigned:1
wr_rel_set	include/mmc.h	/^		unsigned wr_rel_set : 1;$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0208	typeref:typename:unsigned:1
wr_rel_set	include/mmc.h	/^		unsigned wr_rel_set : 1;$/;"	m	struct:mmc_hwpart_conf::__anona5bcc78b0308	typeref:typename:unsigned:1
wr_rel_set	include/mmc.h	/^	u8 wr_rel_set;$/;"	m	struct:mmc	typeref:typename:u8
wr_setup	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned wr_setup;$/;"	m	struct:aemif_config	typeref:typename:unsigned
wr_setup	drivers/video/exynos/exynos_fb.c	/^	unsigned int wr_setup;$/;"	m	struct:exynos_fb_priv	typeref:typename:unsigned int	file:
wr_setup	include/exynos_lcd.h	/^	unsigned int wr_setup;$/;"	m	struct:vidinfo	typeref:typename:unsigned int
wr_strobe	arch/arm/include/asm/ti-common/ti-aemif.h	/^	unsigned wr_strobe;$/;"	m	struct:aemif_config	typeref:typename:unsigned
wr_supp_res	drivers/ddr/marvell/a38x/ddr3_training_leveling.c	/^static struct write_supp_result wr_supp_res[MAX_INTERFACE_NUM][MAX_BUS_NUM];$/;"	v	typeref:struct:write_supp_result[][]	file:
wr_train	arch/x86/cpu/quark/smc.c	/^void wr_train(struct mrc_params *mrc_params)$/;"	f	typeref:typename:void
wrap	lib/zlib/deflate.h	/^    int   wrap;          \/* bit 0 true for zlib, bit 1 true for gzip *\/$/;"	m	struct:internal_state	typeref:typename:int
wrap	lib/zlib/inflate.h	/^    int wrap;                   \/* bit 0 true for zlib, bit 1 true for gzip *\/$/;"	m	struct:inflate_state	typeref:typename:int
wrapped	drivers/net/macb.c	/^	bool			wrapped;$/;"	m	struct:macb_device	typeref:typename:bool	file:
wrb	drivers/bios_emulator/x86emu/sys.c	/^void X86API wrb(u32 addr, u8 val)$/;"	f	typeref:typename:void X86API
wrctl	arch/nios2/include/asm/nios2.h	/^#define wrctl(/;"	d
wrdsp	arch/mips/include/asm/mipsregs.h	/^#define wrdsp(/;"	d
wrdtr	arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c	/^	u32 wrdtr;$/;"	m	struct:sdram_timing_clks	typeref:typename:u32	file:
wrdtr	arch/powerpc/include/asm/ppc4xx-sdram.h	/^	u32 wrdtr;$/;"	m	struct:sdram_timing	typeref:typename:u32
wrec	board/mpl/pati/pati.c	/^	unsigned char wrec;		\/* write recovery 0:<25ns 1:<50ns *\/$/;"	m	struct:__anon377858d00108	typeref:typename:unsigned char	file:
wriop_disable_dpmac	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^void wriop_disable_dpmac(int dpmac_id)$/;"	f	typeref:typename:void
wriop_dpmac_disable	drivers/net/ldpaa_eth/ls2080a.c	/^void wriop_dpmac_disable(int dpmac_id)$/;"	f	typeref:typename:void
wriop_dpmac_enable	drivers/net/ldpaa_eth/ls2080a.c	/^void wriop_dpmac_enable(int dpmac_id)$/;"	f	typeref:typename:void
wriop_dpmac_enet_if	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^__weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)$/;"	f	typeref:typename:__weak phy_interface_t
wriop_dpmac_enet_if	drivers/net/ldpaa_eth/ls2080a.c	/^phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)$/;"	f	typeref:typename:phy_interface_t
wriop_dpmac_info	include/fsl-mc/ldpaa_wriop.h	/^struct wriop_dpmac_info {$/;"	s
wriop_dpmac_to_index	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^static int wriop_dpmac_to_index(int dpmac_id)$/;"	f	typeref:typename:int	file:
wriop_enable_dpmac	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^void wriop_enable_dpmac(int dpmac_id)$/;"	f	typeref:typename:void
wriop_get_enet_if	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^phy_interface_t wriop_get_enet_if(int dpmac_id)$/;"	f	typeref:typename:phy_interface_t
wriop_get_mdio	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^struct mii_dev *wriop_get_mdio(int dpmac_id)$/;"	f	typeref:struct:mii_dev *
wriop_get_phy_address	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^int wriop_get_phy_address(int dpmac_id)$/;"	f	typeref:typename:int
wriop_get_phy_dev	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^struct phy_device *wriop_get_phy_dev(int dpmac_id)$/;"	f	typeref:struct:phy_device *
wriop_init_dpmac	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)$/;"	f	typeref:typename:void
wriop_is_enabled_dpmac	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^u8 wriop_is_enabled_dpmac(int dpmac_id)$/;"	f	typeref:typename:u8
wriop_port	include/fsl-mc/ldpaa_wriop.h	/^enum wriop_port {$/;"	g
wriop_set_mdio	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^void wriop_set_mdio(int dpmac_id, struct mii_dev *bus)$/;"	f	typeref:typename:void
wriop_set_phy_address	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^void wriop_set_phy_address(int dpmac_id, int address)$/;"	f	typeref:typename:void
wriop_set_phy_dev	drivers/net/ldpaa_eth/ldpaa_wriop.c	/^void wriop_set_phy_dev(int dpmac_id, struct phy_device *phydev)$/;"	f	typeref:typename:void
writable_flags	include/ec_commands.h	/^	uint32_t writable_flags;$/;"	m	struct:ec_response_flash_protect	typeref:typename:uint32_t
write	arch/arm/mach-bcm283x/include/mach/mbox.h	/^	u32 write;$/;"	m	struct:bcm2835_mbox_regs	typeref:typename:u32
write	arch/sandbox/include/asm/state.h	/^	int (*write)(void *blob, int node);$/;"	m	struct:sandbox_state_io	typeref:typename:int (*)(void * blob,int node)
write	drivers/usb/gadget/pxa25x_udc.h	/^	} read, write;$/;"	m	struct:udc_stats	typeref:struct:udc_stats::ep0stats
write	fs/fs.c	/^	int (*write)(const char *filename, void *buf, loff_t offset,$/;"	m	struct:fstype_info	typeref:typename:int (*)(const char * filename,void * buf,loff_t offset,loff_t len,loff_t * actwrite)	file:
write	include/ACEX1K.h	/^	Altera_write_fn		write;$/;"	m	struct:__anon8a29702b0208	typeref:typename:Altera_write_fn
write	include/altera.h	/^	Altera_write_fn write;$/;"	m	struct:__anond5297d870208	typeref:typename:Altera_write_fn
write	include/blk.h	/^	unsigned long (*write)(struct udevice *dev, lbaint_t start,$/;"	m	struct:blk_ops	typeref:typename:unsigned long (*)(struct udevice * dev,lbaint_t start,lbaint_t blkcnt,const void * buffer)
write	include/i2c.h	/^	int		(*write)(struct i2c_adapter *adap, uint8_t chip,$/;"	m	struct:i2c_adapter	typeref:typename:int (*)(struct i2c_adapter * adap,uint8_t chip,uint addr,int alen,uint8_t * buffer,int len)
write	include/i2c_eeprom.h	/^	int (*write)(struct udevice *dev, int offset, const uint8_t *buf,$/;"	m	struct:i2c_eeprom_ops	typeref:typename:int (*)(struct udevice * dev,int offset,const uint8_t * buf,int size)
write	include/image-sparse.h	/^	lbaint_t	(*write)(struct sparse_storage *info,$/;"	m	struct:sparse_storage	typeref:typename:lbaint_t (*)(struct sparse_storage * info,lbaint_t blk,lbaint_t blkcnt,const void * buffer)
write	include/misc.h	/^	int (*write)(struct udevice *dev, int offset, const void *buf,$/;"	m	struct:misc_ops	typeref:typename:int (*)(struct udevice * dev,int offset,const void * buf,int size)
write	include/phy.h	/^	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,$/;"	m	struct:mii_dev	typeref:typename:int (*)(struct mii_dev * bus,int addr,int devad,int reg,u16 val)
write	include/power/pmic.h	/^	int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,$/;"	m	struct:dm_pmic_ops	typeref:typename:int (*)(struct udevice * dev,uint reg,const uint8_t * buffer,int len)
write	include/spi_flash.h	/^	int (*write)(struct spi_flash *flash, u32 offset, size_t len,$/;"	m	struct:spi_flash	typeref:typename:int (*)(struct spi_flash * flash,u32 offset,size_t len,const void * buf)
write	include/spi_flash.h	/^	int (*write)(struct udevice *dev, u32 offset, size_t len,$/;"	m	struct:dm_spi_flash_ops	typeref:typename:int (*)(struct udevice * dev,u32 offset,size_t len,const void * buf)
write	include/spmi/spmi.h	/^	int (*write)(struct udevice *dev, int usid, int pid, int reg,$/;"	m	struct:dm_spmi_ops	typeref:typename:int (*)(struct udevice * dev,int usid,int pid,int reg,uint8_t value)
write	lib/zlib/inflate.h	/^    unsigned write;             \/* window write index *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
write	test/py/multiplexed_log.py	/^    def write(self, data, implicit=False):$/;"	m	class:LogfileStream
write	test/py/multiplexed_log.py	/^    def write(self, stream, data, implicit=False):$/;"	m	class:Logfile
write16	drivers/video/sm501.c	/^#define write16(/;"	d	file:
write32	drivers/video/sm501.c	/^#define write32(/;"	d	file:
write8	drivers/video/sm501.c	/^#define write8(/;"	d	file:
write8	include/rtc.h	/^	int (*write8)(struct udevice *dev, unsigned int reg, int val);$/;"	m	struct:rtc_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int reg,int val)
writeChunk	fs/yaffs2/yaffs_nandif.h	/^	int (*writeChunk)(struct yaffs_dev *dev,$/;"	m	struct:ynandif_Geometry	typeref:typename:int (*)(struct yaffs_dev * dev,unsigned pageId,const unsigned char * data,unsigned dataLength,const unsigned char * spare,unsigned spareLength)
writePort	drivers/fpga/lattice.c	/^void writePort(unsigned char a_ucPins, unsigned char a_ucValue)$/;"	f	typeref:typename:void
writeSizes	scripts/kconfig/qconf.cc	/^bool ConfigSettings::writeSizes(const QString& key, const Q3ValueList<int>& value)$/;"	f	class:ConfigSettings	typeref:typename:bool
write_32bit_cp1_register	arch/mips/include/asm/mipsregs.h	/^#define write_32bit_cp1_register(/;"	d
write_4hex	board/mpl/mip405/mip405.c	/^void write_4hex (unsigned long val)$/;"	f	typeref:typename:void
write_4hex	board/mpl/pati/pati.c	/^void write_4hex (unsigned long val)$/;"	f	typeref:typename:void
write_4hex	board/mpl/pip405/pip405.c	/^void write_4hex (unsigned long val)$/;"	f	typeref:typename:void
write_8	arch/x86/include/asm/io.h	/^#define write_8(/;"	d
write_acpi_tables	arch/x86/lib/acpi_table.c	/^u32 write_acpi_tables(u32 start)$/;"	f	typeref:typename:u32
write_acpi_tables	drivers/misc/qfw.c	/^u32 write_acpi_tables(u32 addr)$/;"	f	typeref:typename:u32
write_addr_hi	drivers/net/altera_tse.h	/^	u32 write_addr_hi;	\/* data buffer destination address high bits *\/$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
write_addr_lo	drivers/net/altera_tse.h	/^	u32 write_addr_lo;	\/* data buffer destination address low bits *\/$/;"	m	struct:msgdma_extended_desc	typeref:typename:u32
write_adll_value	drivers/ddr/marvell/a38x/ddr3_debug.c	/^int write_adll_value(u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],$/;"	f	typeref:typename:int
write_arch	arch/x86/include/asm/io.h	/^#define write_arch(/;"	d
write_atapi_data	drivers/block/pata_bfin.c	/^static void write_atapi_data(void __iomem *base,$/;"	f	typeref:typename:void	file:
write_atapi_register	drivers/block/pata_bfin.c	/^static void write_atapi_register(void __iomem *base,$/;"	f	typeref:typename:void	file:
write_aux_reg	arch/arc/include/asm/arcregs.h	/^#define write_aux_reg(/;"	d
write_b	include/sdhci.h	/^	void            (*write_b)(struct sdhci_host *host, u8 val, int reg);$/;"	m	struct:sdhci_ops	typeref:typename:void (*)(struct sdhci_host * host,u8 val,int reg)
write_bat	arch/powerpc/lib/bat_rw.c	/^int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower)$/;"	f	typeref:typename:int
write_bbt	drivers/mtd/nand/nand_bbt.c	/^static int write_bbt(struct mtd_info *mtd, uint8_t *buf,$/;"	f	typeref:typename:int	file:
write_be16	arch/x86/include/asm/io.h	/^#define write_be16(/;"	d
write_be32	arch/x86/include/asm/io.h	/^#define write_be32(/;"	d
write_be32	drivers/video/sm501.c	/^void write_be32(int off, unsigned int val)$/;"	f	typeref:typename:void
write_bl_len	include/mmc.h	/^	uint write_bl_len;$/;"	m	struct:mmc	typeref:typename:uint
write_block_size	include/ec_commands.h	/^	uint32_t write_block_size;$/;"	m	struct:ec_response_flash_info	typeref:typename:uint32_t
write_buf	include/linux/mtd/nand.h	/^	void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);$/;"	m	struct:nand_chip	typeref:typename:void (*)(struct mtd_info * mtd,const uint8_t * buf,int len)
write_buf	include/linux/mtd/nand.h	/^	void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);$/;"	m	struct:platform_nand_ctrl	typeref:typename:void (*)(struct mtd_info * mtd,const uint8_t * buf,int len)
write_buff	arch/arm/mach-at91/arm926ejs/eflash.c	/^int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	arch/arm/mach-stm32/stm32f1/flash.c	/^int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/amcc/common/flash.c	/^int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/amcc/yucca/flash.c	/^int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/bf533-ezkit/flash.c	/^int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/cobra5272/flash.c	/^int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/esd/common/flash.c	/^int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/freescale/m5253demo/flash.c	/^int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/pb1x00/flash.c	/^int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	board/tqc/tqm5200/cam5200_flash.c	/^int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	drivers/mtd/altera_qspi.c	/^int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	drivers/mtd/cfi_flash.c	/^int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	drivers/mtd/pic32_flash.c	/^int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buff	drivers/mtd/st_smi.c	/^int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)$/;"	f	typeref:typename:int
write_buff	drivers/mtd/stm32_flash.c	/^int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)$/;"	f	typeref:typename:int
write_buffer	drivers/serial/usbtty.c	/^static int write_buffer (circbuf_t * buf)$/;"	f	typeref:typename:int	file:
write_bufferram	include/linux/mtd/onenand.h	/^	int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area,$/;"	m	struct:onenand_chip	typeref:typename:int (*)(struct mtd_info * mtd,loff_t addr,int area,const unsigned char * buffer,int offset,size_t count)
write_burst	drivers/net/altera_tse.h	/^	u8 write_burst;$/;"	m	struct:alt_sgdma_descriptor	typeref:typename:u8
write_byte	board/v38b/ethaddr.c	/^static void write_byte(unsigned char command)$/;"	f	typeref:typename:void	file:
write_byte	drivers/i2c/soft_i2c.c	/^static int write_byte(uchar data)$/;"	f	typeref:typename:int	file:
write_byte	drivers/rtc/ds1302.c	/^write_byte(unsigned char b)$/;"	f	typeref:typename:void	file:
write_byte	include/linux/mtd/nand.h	/^	void (*write_byte)(struct mtd_info *mtd, uint8_t byte);$/;"	m	struct:nand_chip	typeref:typename:void (*)(struct mtd_info * mtd,uint8_t byte)
write_byte	include/pci.h	/^	int (*write_byte)(struct pci_controller*, pci_dev_t, int where, u8);$/;"	m	struct:pci_controller	typeref:typename:int (*)(struct pci_controller *,pci_dev_t,int where,u8)
write_byte_to_buf	drivers/mtd/nand/denali.c	/^static void write_byte_to_buf(struct denali_nand_info *denali, uint8_t byte)$/;"	f	typeref:typename:void	file:
write_bytes	drivers/mmc/arm_pl180_mmci.c	/^static int write_bytes(struct mmc *dev, u32 *src, u32 blkcount, u32 blksize)$/;"	f	typeref:typename:int	file:
write_c0_badvaddr	arch/mips/include/asm/mipsregs.h	/^#define write_c0_badvaddr(/;"	d
write_c0_brcm_action	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_action(/;"	d
write_c0_brcm_bootvec	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_bootvec(/;"	d
write_c0_brcm_bus_pll	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_bus_pll(/;"	d
write_c0_brcm_cbr	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_cbr(/;"	d
write_c0_brcm_cmt_ctrl	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_cmt_ctrl(/;"	d
write_c0_brcm_cmt_intr	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_cmt_intr(/;"	d
write_c0_brcm_cmt_local	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_cmt_local(/;"	d
write_c0_brcm_config	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_config(/;"	d
write_c0_brcm_config_0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_config_0(/;"	d
write_c0_brcm_config_1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_config_1(/;"	d
write_c0_brcm_edsp	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_edsp(/;"	d
write_c0_brcm_mode	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_mode(/;"	d
write_c0_brcm_reset	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_reset(/;"	d
write_c0_brcm_sleepcount	arch/mips/include/asm/mipsregs.h	/^#define write_c0_brcm_sleepcount(/;"	d
write_c0_cache	arch/mips/include/asm/mipsregs.h	/^#define write_c0_cache(/;"	d
write_c0_cause	arch/mips/include/asm/mipsregs.h	/^#define write_c0_cause(/;"	d
write_c0_cdmmbase	arch/mips/include/asm/mipsregs.h	/^#define write_c0_cdmmbase(/;"	d
write_c0_compare	arch/mips/include/asm/mipsregs.h	/^#define write_c0_compare(/;"	d
write_c0_compare2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_compare2(/;"	d
write_c0_compare3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_compare3(/;"	d
write_c0_conf	arch/mips/include/asm/mipsregs.h	/^#define write_c0_conf(/;"	d
write_c0_config	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config(/;"	d
write_c0_config1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config1(/;"	d
write_c0_config2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config2(/;"	d
write_c0_config3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config3(/;"	d
write_c0_config4	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config4(/;"	d
write_c0_config5	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config5(/;"	d
write_c0_config6	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config6(/;"	d
write_c0_config7	arch/mips/include/asm/mipsregs.h	/^#define write_c0_config7(/;"	d
write_c0_context	arch/mips/include/asm/mipsregs.h	/^#define write_c0_context(/;"	d
write_c0_count	arch/mips/include/asm/mipsregs.h	/^#define write_c0_count(/;"	d
write_c0_count2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_count2(/;"	d
write_c0_count3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_count3(/;"	d
write_c0_cvmcount	arch/mips/include/asm/mipsregs.h	/^#define write_c0_cvmcount(/;"	d
write_c0_cvmctl	arch/mips/include/asm/mipsregs.h	/^#define write_c0_cvmctl(/;"	d
write_c0_cvmmemctl	arch/mips/include/asm/mipsregs.h	/^#define write_c0_cvmmemctl(/;"	d
write_c0_ddatalo	arch/mips/include/asm/mipsregs.h	/^#define write_c0_ddatalo(/;"	d
write_c0_debug	arch/mips/include/asm/mipsregs.h	/^#define write_c0_debug(/;"	d
write_c0_depc	arch/mips/include/asm/mipsregs.h	/^#define write_c0_depc(/;"	d
write_c0_derraddr0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_derraddr0(/;"	d
write_c0_derraddr1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_derraddr1(/;"	d
write_c0_diag	arch/mips/include/asm/mipsregs.h	/^#define write_c0_diag(/;"	d
write_c0_diag1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_diag1(/;"	d
write_c0_diag2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_diag2(/;"	d
write_c0_diag3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_diag3(/;"	d
write_c0_diag4	arch/mips/include/asm/mipsregs.h	/^#define write_c0_diag4(/;"	d
write_c0_diag5	arch/mips/include/asm/mipsregs.h	/^#define write_c0_diag5(/;"	d
write_c0_dtaglo	arch/mips/include/asm/mipsregs.h	/^#define write_c0_dtaglo(/;"	d
write_c0_ebase	arch/mips/include/asm/mipsregs.h	/^#define write_c0_ebase(/;"	d
write_c0_ecc	arch/mips/include/asm/mipsregs.h	/^#define write_c0_ecc(/;"	d
write_c0_entryhi	arch/mips/include/asm/mipsregs.h	/^#define write_c0_entryhi(/;"	d
write_c0_entrylo0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_entrylo0(/;"	d
write_c0_entrylo1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_entrylo1(/;"	d
write_c0_epc	arch/mips/include/asm/mipsregs.h	/^#define write_c0_epc(/;"	d
write_c0_errorepc	arch/mips/include/asm/mipsregs.h	/^#define write_c0_errorepc(/;"	d
write_c0_framemask	arch/mips/include/asm/mipsregs.h	/^#define write_c0_framemask(/;"	d
write_c0_hwrena	arch/mips/include/asm/mipsregs.h	/^#define write_c0_hwrena(/;"	d
write_c0_index	arch/mips/include/asm/mipsregs.h	/^#define write_c0_index(/;"	d
write_c0_intcontrol	arch/mips/include/asm/mipsregs.h	/^#define write_c0_intcontrol(/;"	d
write_c0_intctl	arch/mips/include/asm/mipsregs.h	/^#define write_c0_intctl(/;"	d
write_c0_lladdr	arch/mips/include/asm/mipsregs.h	/^#define write_c0_lladdr(/;"	d
write_c0_maar	arch/mips/include/asm/mipsregs.h	/^#define write_c0_maar(/;"	d
write_c0_maari	arch/mips/include/asm/mipsregs.h	/^#define write_c0_maari(/;"	d
write_c0_pagegrain	arch/mips/include/asm/mipsregs.h	/^#define write_c0_pagegrain(/;"	d
write_c0_pagemask	arch/mips/include/asm/mipsregs.h	/^#define write_c0_pagemask(/;"	d
write_c0_perfcntr0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr0(/;"	d
write_c0_perfcntr0_64	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr0_64(/;"	d
write_c0_perfcntr1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr1(/;"	d
write_c0_perfcntr1_64	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr1_64(/;"	d
write_c0_perfcntr2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr2(/;"	d
write_c0_perfcntr2_64	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr2_64(/;"	d
write_c0_perfcntr3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr3(/;"	d
write_c0_perfcntr3_64	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfcntr3_64(/;"	d
write_c0_perfctrl0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfctrl0(/;"	d
write_c0_perfctrl1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfctrl1(/;"	d
write_c0_perfctrl2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfctrl2(/;"	d
write_c0_perfctrl3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_perfctrl3(/;"	d
write_c0_pwbase	arch/mips/include/asm/mipsregs.h	/^#define write_c0_pwbase(/;"	d
write_c0_pwctl	arch/mips/include/asm/mipsregs.h	/^#define write_c0_pwctl(/;"	d
write_c0_pwfield	arch/mips/include/asm/mipsregs.h	/^#define write_c0_pwfield(/;"	d
write_c0_pwsize	arch/mips/include/asm/mipsregs.h	/^#define write_c0_pwsize(/;"	d
write_c0_r10k_diag	arch/mips/include/asm/mipsregs.h	/^#define write_c0_r10k_diag(/;"	d
write_c0_random	arch/mips/include/asm/mipsregs.h	/^#define write_c0_random(/;"	d
write_c0_segctl0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_segctl0(/;"	d
write_c0_segctl1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_segctl1(/;"	d
write_c0_segctl2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_segctl2(/;"	d
write_c0_srsctl	arch/mips/include/asm/mipsregs.h	/^#define write_c0_srsctl(/;"	d
write_c0_srsmap	arch/mips/include/asm/mipsregs.h	/^#define write_c0_srsmap(/;"	d
write_c0_staglo	arch/mips/include/asm/mipsregs.h	/^#define write_c0_staglo(/;"	d
write_c0_status	arch/mips/include/asm/mipsregs.h	/^#define write_c0_status(/;"	d
write_c0_taghi	arch/mips/include/asm/mipsregs.h	/^#define write_c0_taghi(/;"	d
write_c0_taglo	arch/mips/include/asm/mipsregs.h	/^#define write_c0_taglo(/;"	d
write_c0_userlocal	arch/mips/include/asm/mipsregs.h	/^#define write_c0_userlocal(/;"	d
write_c0_watchhi0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi0(/;"	d
write_c0_watchhi1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi1(/;"	d
write_c0_watchhi2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi2(/;"	d
write_c0_watchhi3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi3(/;"	d
write_c0_watchhi4	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi4(/;"	d
write_c0_watchhi5	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi5(/;"	d
write_c0_watchhi6	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi6(/;"	d
write_c0_watchhi7	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchhi7(/;"	d
write_c0_watchlo0	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo0(/;"	d
write_c0_watchlo1	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo1(/;"	d
write_c0_watchlo2	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo2(/;"	d
write_c0_watchlo3	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo3(/;"	d
write_c0_watchlo4	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo4(/;"	d
write_c0_watchlo5	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo5(/;"	d
write_c0_watchlo6	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo6(/;"	d
write_c0_watchlo7	arch/mips/include/asm/mipsregs.h	/^#define write_c0_watchlo7(/;"	d
write_c0_wired	arch/mips/include/asm/mipsregs.h	/^#define write_c0_wired(/;"	d
write_c0_xcontext	arch/mips/include/asm/mipsregs.h	/^#define write_c0_xcontext(/;"	d
write_caching	include/efi_api.h	/^	char write_caching;$/;"	m	struct:efi_block_io_media	typeref:typename:char
write_cfg_super_IO	board/mpl/common/isa.c	/^void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned cha/;"	f	typeref:typename:void
write_chunk_fn	fs/yaffs2/yaffs_guts.h	/^	int (*write_chunk_fn) (struct yaffs_dev *dev,$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int nand_chunk,const u8 * data,const struct yaffs_spare * spare)
write_chunk_tags_fn	fs/yaffs2/yaffs_guts.h	/^	int (*write_chunk_tags_fn) (struct yaffs_dev *dev,$/;"	m	struct:yaffs_param	typeref:typename:int (*)(struct yaffs_dev * dev,int nand_chunk,const u8 * data,const struct yaffs_ext_tags * tags)
write_cmd	drivers/crypto/fsl/desc_constr.h	/^static inline u32 *write_cmd(u32 *desc, u32 command)$/;"	f	typeref:typename:u32 *
write_cmd	include/spi_flash.h	/^	u8 write_cmd;$/;"	m	struct:spi_flash	typeref:typename:u8
write_cnodes	fs/ubifs/lpt_commit.c	/^static int write_cnodes(struct ubifs_info *c)$/;"	f	typeref:typename:int	file:
write_config	include/pci.h	/^	int (*write_config)(struct udevice *bus, pci_dev_t bdf, uint offset,$/;"	m	struct:dm_pci_ops	typeref:typename:int (*)(struct udevice * bus,pci_dev_t bdf,uint offset,ulong value,enum pci_size_t size)
write_config	include/pci.h	/^	int (*write_config)(struct udevice *dev, uint offset, ulong value,$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev,uint offset,ulong value,enum pci_size_t size)
write_config	tools/buildman/kconfiglib.py	/^    def write_config(self, filename, header=None):$/;"	m	class:Config
write_config_reg	drivers/gpio/sh_pfc.c	/^static void write_config_reg(struct pinmux_info *gpioc,$/;"	f	typeref:typename:void	file:
write_coreboot_table	arch/x86/lib/coreboot_table.c	/^void write_coreboot_table(u32 addr, struct memory_area *cfg_tables)$/;"	f	typeref:typename:void
write_correct_mask	drivers/ddr/altera/sequencer.h	/^	u32	write_correct_mask;$/;"	m	struct:param_type	typeref:typename:u32
write_correct_mask_vg	drivers/ddr/altera/sequencer.h	/^	u32	write_correct_mask_vg;$/;"	m	struct:param_type	typeref:typename:u32
write_count	arch/arm/mach-zynq/include/mach/hardware.h	/^	u32 write_count; \/* 0x88 *\/$/;"	m	struct:devcfg_regs	typeref:typename:u32
write_counter	drivers/mmc/rpmb.c	/^	unsigned long write_counter;$/;"	m	struct:s_rpmb	typeref:typename:unsigned long	file:
write_cpld_data	board/renesas/ap325rxa/cpld-ap325rxa.c	/^static void write_cpld_data(char ch)$/;"	f	typeref:typename:void	file:
write_cr	drivers/mtd/spi/spi_flash.c	/^static int write_cr(struct spi_flash *flash, u8 wc)$/;"	f	typeref:typename:int	file:
write_cr0	arch/x86/include/asm/control_regs.h	/^static inline void write_cr0(unsigned long val)$/;"	f	typeref:typename:void
write_data	board/bf533-ezkit/flash.c	/^int write_data(long lStart, long lCount, uchar * pnData)$/;"	f	typeref:typename:int
write_data	drivers/mtd/nand/kmeter1_nand.c	/^#define write_data(/;"	d	file:
write_data	tools/ifdtool.c	/^static int write_data(char *image, int size, unsigned int addr,$/;"	f	typeref:typename:int	file:
write_data_delay	board/freescale/b4860qds/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/corenet_ds/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/ls1021aqds/ddr.h	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
write_data_delay	board/freescale/ls1043aqds/ddr.h	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
write_data_delay	board/freescale/ls1043ardb/ddr.h	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
write_data_delay	board/freescale/mpc8349emds/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/mpc8572ds/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/mpc8641hpcn/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/p1022ds/ddr.c	/^	u32 write_data_delay;	\/* Range: 0-6 *\/$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/p2041rdb/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/freescale/t4qds/ddr.h	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
write_data_delay	board/varisys/cyrus/ddr.c	/^	u32 write_data_delay;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
write_data_delay	board/xes/xpedite517x/ddr.c	/^	uint8_t write_data_delay;$/;"	m	struct:board_memctl_options	typeref:typename:uint8_t	file:
write_data_delay	board/xes/xpedite537x/ddr.c	/^	uint8_t write_data_delay;$/;"	m	struct:board_memctl_options	typeref:typename:uint8_t	file:
write_data_delay	include/fsl_ddr_sdram.h	/^	unsigned int write_data_delay;		\/* DQS adjust *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
write_data_to_flash_mem	drivers/mtd/nand/denali.c	/^static int write_data_to_flash_mem(struct denali_nand_info *denali,$/;"	f	typeref:typename:int	file:
write_dataflash	drivers/mtd/dataflash.c	/^int write_dataflash (unsigned long addr_dest, unsigned long addr_src,$/;"	f	typeref:typename:int
write_dcc	drivers/serial/arm_dcc.c	/^#define write_dcc(/;"	d	file:
write_dcd_command	tools/imximage.h	/^	write_dcd_command_t write_dcd_command;$/;"	m	struct:dcd_v2_cmd	typeref:typename:write_dcd_command_t
write_dcd_command_t	tools/imximage.h	/^} __attribute__((packed)) write_dcd_command_t;$/;"	t	typeref:struct:__anon504a956c0908
write_delays	arch/arm/mach-sunxi/dram_sun8i_h3.c	/^	u32 write_delays;$/;"	m	struct:dram_para	typeref:typename:u32	file:
write_dest_byte	board/bf533-stamp/video.h	/^#define write_dest_byte(/;"	d
write_done	include/usb/designware_udc.h	/^	u32 write_done;$/;"	m	struct:udc_endp_regs	typeref:typename:u32
write_dword	include/pci.h	/^	int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32);$/;"	m	struct:pci_controller	typeref:typename:int (*)(struct pci_controller *,pci_dev_t,int where,u32)
write_eeprom_reg	examples/standalone/smc91111_eeprom.c	/^int write_eeprom_reg (struct eth_device *dev, int value, int reg)$/;"	f	typeref:typename:int
write_eeprom_reg	examples/standalone/smc911x_eeprom.c	/^static int write_eeprom_reg(struct eth_device *dev, u8 value, u8 reg)$/;"	f	typeref:typename:int	file:
write_env	common/env_mmc.c	/^static inline int write_env(struct mmc *mmc, unsigned long size,$/;"	f	typeref:typename:int	file:
write_env	common/env_sata.c	/^static inline int write_env(struct blk_desc *sata, unsigned long size,$/;"	f	typeref:typename:int	file:
write_ep0_fifo	drivers/usb/gadget/pxa25x_udc.c	/^write_ep0_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)$/;"	f	typeref:typename:int	file:
write_evcr	drivers/mtd/spi/spi_flash.c	/^static int write_evcr(struct spi_flash *flash, u8 evcr)$/;"	f	typeref:typename:int	file:
write_fdc_byte	cmd/fdc.c	/^int write_fdc_byte(unsigned char val)$/;"	f	typeref:typename:int
write_fdc_reg	cmd/fdc.c	/^void write_fdc_reg(unsigned int addr, unsigned char val)$/;"	f	typeref:typename:void
write_fifo	drivers/usb/gadget/at91_udc.c	/^static int write_fifo(struct at91_ep *ep, struct at91_request *req)$/;"	f	typeref:typename:int	file:
write_fifo	drivers/usb/gadget/pxa25x_udc.c	/^write_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)$/;"	f	typeref:typename:int	file:
write_fifo	drivers/usb/musb/blackfin_usb.c	/^void write_fifo(u8 ep, u32 length, void *fifo_data)$/;"	f	typeref:typename:void
write_fifo	drivers/usb/musb/musb_core.c	/^void write_fifo(u8 ep, u32 length, void *fifo_data)$/;"	f	typeref:typename:void
write_fifo_empty_wait	drivers/spi/sh_spi.c	/^static int write_fifo_empty_wait(struct sh_spi *ss)$/;"	f	typeref:typename:int	file:
write_fifo_ep0	drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c	/^static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req)$/;"	f	typeref:typename:int	file:
write_flash	board/bf533-ezkit/flash.c	/^int write_flash(long nOffset, int nValue)$/;"	f	typeref:typename:int
write_gpt_table	disk/part_efi.c	/^int write_gpt_table(struct blk_desc *dev_desc,$/;"	f	typeref:typename:int
write_hex	board/mpl/mip405/mip405.c	/^void write_hex (unsigned char i)$/;"	f	typeref:typename:void
write_hex	board/mpl/pati/pati.c	/^void write_hex (unsigned char i)$/;"	f	typeref:typename:void
write_hex	board/mpl/pip405/pip405.c	/^void write_hex (unsigned char i)$/;"	f	typeref:typename:void
write_hw_register	drivers/video/ssd2828.c	/^static void write_hw_register(const struct ssd2828_config *cfg, u8 regnum,$/;"	f	typeref:typename:void	file:
write_hwaddr	include/net.h	/^	int (*write_hwaddr)(struct eth_device *);$/;"	m	struct:eth_device	typeref:typename:int (*)(struct eth_device *)
write_hwaddr	include/net.h	/^	int (*write_hwaddr)(struct udevice *dev);$/;"	m	struct:eth_ops	typeref:typename:int (*)(struct udevice * dev)
write_idt_stub	arch/x86/lib/bios.c	/^static void write_idt_stub(void *target, u8 intnum)$/;"	f	typeref:typename:void	file:
write_idx	drivers/crypto/fsl/jr.h	/^	int write_idx;$/;"	m	struct:jobring	typeref:typename:int
write_image	tools/ifdtool.c	/^static int write_image(char *filename, char *image, int size)$/;"	f	typeref:typename:int	file:
write_inode	fs/ubifs/ubifs.h	/^	int (*write_inode) (struct inode *, struct writeback_control *wbc);$/;"	m	struct:super_operations	typeref:typename:int (*)(struct inode *,struct writeback_control * wbc)
write_io	include/pci.h	/^	int (*write_io)(struct udevice *dev, unsigned int addr,$/;"	m	struct:dm_pci_emul_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int addr,ulong value,enum pci_size_t size)
write_l	include/sdhci.h	/^	void            (*write_l)(struct sdhci_host *host, u32 val, int reg);$/;"	m	struct:sdhci_ops	typeref:typename:void (*)(struct sdhci_host * host,u32 val,int reg)
write_l2ctlr	arch/arm/mach-rockchip/rk3288-board-spl.c	/^static inline void write_l2ctlr(uint32_t val)$/;"	f	typeref:typename:void	file:
write_lat	include/ddr_spd.h	/^	unsigned char write_lat;   \/* 20 Write Latency (aka Write Recovery) *\/$/;"	m	struct:ddr1_spd_eeprom_s	typeref:typename:unsigned char
write_lat	include/spd.h	/^	unsigned char write_lat;   \/* 20 Write Latency (aka Write Recovery) *\/$/;"	m	struct:spd_eeprom_s	typeref:typename:unsigned char
write_le16	arch/x86/include/asm/io.h	/^#define write_le16(/;"	d
write_le32	arch/x86/include/asm/io.h	/^#define write_le32(/;"	d
write_le32	drivers/video/sm501.c	/^void write_le32(int off, unsigned int val)$/;"	f	typeref:typename:void
write_le64	arch/x86/include/asm/io.h	/^#define write_le64(/;"	d
write_leb	drivers/mtd/ubi/upd.c	/^static int write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,$/;"	f	typeref:typename:int	file:
write_mac	board/spear/common/spr_misc.c	/^static int write_mac(uchar *mac)$/;"	f	typeref:typename:int	file:
write_mailbox	include/gdsys_fpga.h	/^	u16 write_mailbox;$/;"	m	struct:ihs_i2c	typeref:typename:u16
write_mailbox_ext	include/gdsys_fpga.h	/^	u16 write_mailbox_ext;$/;"	m	struct:ihs_i2c	typeref:typename:u16
write_mbr_and_gpt_partitions	disk/part_efi.c	/^int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf)$/;"	f	typeref:typename:int
write_mbr_partition	disk/part_dos.c	/^int write_mbr_partition(struct blk_desc *dev_desc, void *buf)$/;"	f	typeref:typename:int
write_medium	include/dfu.h	/^	int (*write_medium)(struct dfu_entity *dfu,$/;"	m	struct:dfu_entity	typeref:typename:int (*)(struct dfu_entity * dfu,u64 offset,void * buf,long * len)
write_mii	drivers/net/greth.c	/^static void write_mii(int phyaddr, int regaddr, int data, volatile greth_regs * regs)$/;"	f	typeref:typename:void	file:
write_mode	drivers/mtd/nand/kmeter1_nand.c	/^#define write_mode(/;"	d	file:
write_mp_table	arch/x86/lib/mpspec.c	/^u32 write_mp_table(u32 addr)$/;"	f	typeref:typename:u32
write_new_ccsrbar	arch/powerpc/cpu/mpc85xx/start.S	/^write_new_ccsrbar:$/;"	l
write_octeon_c0_dcacheerr	arch/mips/include/asm/mipsregs.h	/^#define write_octeon_c0_dcacheerr(/;"	d
write_octeon_c0_icacheerr	arch/mips/include/asm/mipsregs.h	/^#define write_octeon_c0_icacheerr(/;"	d
write_one_tlb	arch/mips/cpu/cpu.c	/^void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)$/;"	f	typeref:typename:void
write_oob	include/linux/mtd/nand.h	/^	int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,int page)
write_oob_data	drivers/mtd/nand/denali.c	/^static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)$/;"	f	typeref:typename:int	file:
write_oob_raw	include/linux/mtd/nand.h	/^	int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,int page)
write_op_execute	arch/arm/mach-mvebu/serdes/a38x/seq_exec.c	/^int write_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)$/;"	f	typeref:typename:int
write_orph_node	fs/ubifs/orphan.c	/^static int write_orph_node(struct ubifs_info *c, int atomic)$/;"	f	typeref:typename:int	file:
write_orph_nodes	fs/ubifs/orphan.c	/^static int write_orph_nodes(struct ubifs_info *c, int atomic)$/;"	f	typeref:typename:int	file:
write_packet	drivers/usb/gadget/pxa25x_udc.c	/^write_packet(u32 *uddr, struct pxa25x_request *req, unsigned max)$/;"	f	typeref:typename:int	file:
write_page	drivers/mtd/nand/denali.c	/^static int write_page(struct mtd_info *mtd, struct nand_chip *chip,$/;"	f	typeref:typename:int	file:
write_page	include/linux/mtd/nand.h	/^	int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_chip	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,uint32_t offset,int data_len,const uint8_t * buf,int oob_required,int page,int cached,int raw)
write_page	include/linux/mtd/nand.h	/^	int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,const uint8_t * buf,int oob_required,int page)
write_page_raw	include/linux/mtd/nand.h	/^	int (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,const uint8_t * buf,int oob_required,int page)
write_pci_eeprom_offs	board/mpl/pati/cmd_pati.c	/^static void write_pci_eeprom_offs(unsigned short offset, unsigned short value)$/;"	f	typeref:typename:void	file:
write_pgcs_config	include/ns87308.h	/^static inline void write_pgcs_config(unsigned char index, unsigned char data)$/;"	f	typeref:typename:void
write_phy	drivers/net/tsi108_eth.c	/^static void write_phy (unsigned int base,$/;"	f	typeref:typename:void	file:
write_phys	arch/x86/lib/ramtest.c	/^static void write_phys(unsigned long addr, u32 value)$/;"	f	typeref:typename:void	file:
write_pirq_routing_table	arch/x86/cpu/irq.c	/^u32 write_pirq_routing_table(u32 addr)$/;"	f	typeref:typename:u32
write_pm_reg	include/ns87308.h	/^static inline void write_pm_reg(unsigned short base, unsigned char index, unsigned char data)$/;"	f	typeref:typename:void
write_pnp_config	include/ns87308.h	/^static inline void write_pnp_config(unsigned char index, unsigned char data)$/;"	f	typeref:typename:void
write_port	arch/powerpc/cpu/mpc512x/serial.c	/^int write_port(struct stdio_dev *port, char *buf)$/;"	f	typeref:typename:int
write_pre_comp	disk/part_amiga.h	/^    u32 write_pre_comp;$/;"	m	struct:rigid_disk_block	typeref:typename:u32
write_ptddata_to_fifo	drivers/usb/host/isp116x-hcd.c	/^static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)$/;"	f	typeref:typename:void	file:
write_qar	drivers/spi/cf_qspi.c	/^static void write_qar(volatile qspi_t *qspi, u16 val)   { qspi->ar = val; }$/;"	f	typeref:typename:void	file:
write_qdlyr	drivers/spi/cf_qspi.c	/^static void write_qdlyr(volatile qspi_t *qspi, u16 val) { qspi->dlyr = val; }$/;"	f	typeref:typename:void	file:
write_qdr	drivers/spi/cf_qspi.c	/^static void write_qdr(volatile qspi_t *qspi, u16 val)   { qspi->dr = val; }$/;"	f	typeref:typename:void	file:
write_qir	drivers/spi/cf_qspi.c	/^static void write_qir(volatile qspi_t *qspi, u16 val)   { qspi->ir = val; }$/;"	f	typeref:typename:void	file:
write_qmr	drivers/spi/cf_qspi.c	/^static void write_qmr(volatile qspi_t *qspi, u16 val)   { qspi->mr = val; }$/;"	f	typeref:typename:void	file:
write_qwr	drivers/spi/cf_qspi.c	/^static void write_qwr(volatile qspi_t *qspi, u16 val)   { qspi->wr = val; }$/;"	f	typeref:typename:void	file:
write_r10k_perf_cntl	arch/mips/include/asm/mipsregs.h	/^#define write_r10k_perf_cntl(/;"	d
write_r10k_perf_cntr	arch/mips/include/asm/mipsregs.h	/^#define write_r10k_perf_cntr(/;"	d
write_ram_buf	arch/sandbox/include/asm/state.h	/^	bool write_ram_buf;		\/* Write RAM buffer on exit *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
write_raw_image	common/fb_mmc.c	/^static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,$/;"	f	typeref:typename:void	file:
write_rcvrd_mst_node	fs/ubifs/recovery.c	/^static int write_rcvrd_mst_node(struct ubifs_info *c,$/;"	f	typeref:typename:int	file:
write_rdtscp_aux	arch/x86/include/asm/msr.h	/^#define write_rdtscp_aux(/;"	d
write_record	cmd/load.c	/^static int write_record(char *buf)$/;"	f	typeref:typename:int	file:
write_reg	arch/arm/include/asm/emif.h	/^	u32 write_reg;$/;"	m	struct:read_write_regs	typeref:typename:u32
write_reg	drivers/spi/ich.c	/^static void write_reg(struct ich_spi_priv *priv, const void *value,$/;"	f	typeref:typename:void	file:
write_reg32	drivers/video/sm501.c	/^void (*write_reg32)(int off, unsigned int val) = write_be32;$/;"	v	typeref:typename:void (*)(int off,unsigned int val)
write_regions	tools/ifdtool.c	/^static int write_regions(char *image, int size)$/;"	f	typeref:typename:int	file:
write_reserve_buf	fs/ubifs/ubifs.h	/^	void *write_reserve_buf;$/;"	m	struct:ubifs_info	typeref:typename:void *
write_reserve_mutex	fs/ubifs/ubifs.h	/^	struct mutex write_reserve_mutex;$/;"	m	struct:ubifs_info	typeref:struct:mutex
write_sdrc_timings	arch/arm/cpu/armv7/omap3/sdrc.c	/^static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base,$/;"	f	typeref:typename:void	file:
write_sector	include/usb_mass_storage.h	/^	int (*write_sector)(struct ums *ums_dev,$/;"	m	struct:ums	typeref:typename:int (*)(struct ums * ums_dev,ulong start,lbaint_t blkcnt,const void * buf)
write_seeds_to_cmos	arch/x86/cpu/ivybridge/sdram.c	/^static int write_seeds_to_cmos(struct pei_data *pei_data)$/;"	f	typeref:typename:int	file:
write_ser_drv	drivers/rtc/ds1302.c	/^write_ser_drv(unsigned char addr, unsigned char *buf, int count)$/;"	f	typeref:typename:void	file:
write_sfi_table	arch/x86/lib/sfi.c	/^u32 write_sfi_table(u32 base)$/;"	f	typeref:typename:u32
write_size	include/ec_commands.h	/^	uint8_t write_size; \/* Either 8 or 16. *\/$/;"	m	struct:ec_params_i2c_write	typeref:typename:uint8_t
write_smbios_table	lib/smbios.c	/^uintptr_t write_smbios_table(uintptr_t addr)$/;"	f	typeref:typename:uintptr_t
write_smbios_table_wrapper	arch/x86/lib/tables.c	/^static u32 write_smbios_table_wrapper(u32 addr)$/;"	f	typeref:typename:u32	file:
write_sparse_image	common/image-sparse.c	/^void write_sparse_image($/;"	f	typeref:typename:void
write_sr	drivers/mtd/spi/spi_flash.c	/^static int write_sr(struct spi_flash *flash, u8 ws)$/;"	f	typeref:typename:int	file:
write_srom	drivers/net/dc2114x.c	/^static int write_srom(struct eth_device *dev, u_long ioaddr, int index, int new_value)$/;"	f	typeref:typename:int	file:
write_state	arch/sandbox/include/asm/state.h	/^	bool write_state;		\/* Write sandbox state on exit *\/$/;"	m	struct:sandbox_state	typeref:typename:bool
write_stuff	examples/standalone/smc911x_eeprom.c	/^static void write_stuff(struct eth_device *dev, char *line)$/;"	f	typeref:typename:void	file:
write_subpage	include/linux/mtd/nand.h	/^	int (*write_subpage)(struct mtd_info *mtd, struct nand_chip *chip,$/;"	m	struct:nand_ecc_ctrl	typeref:typename:int (*)(struct mtd_info * mtd,struct nand_chip * chip,uint32_t offset,uint32_t data_len,const uint8_t * data_buf,int oob_required,int page)
write_supp_result	drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h	/^struct write_supp_result {$/;"	s
write_suspended	include/linux/mtd/flashchip.h	/^	unsigned int write_suspended:1;$/;"	m	struct:flchip	typeref:typename:unsigned int:1
write_sz	drivers/mtd/nand/vf610_nfc.c	/^	int write_sz;$/;"	m	struct:vf610_nfc	typeref:typename:int	file:
write_tables	arch/x86/lib/tables.c	/^void write_tables(void)$/;"	f	typeref:typename:void
write_tcm_boot_trampoline	arch/arm/cpu/armv8/zynqmp/mp.c	/^static void write_tcm_boot_trampoline(u32 boot_addr)$/;"	f	typeref:typename:void	file:
write_tlb	arch/powerpc/cpu/mpc85xx/start.S	/^write_tlb:$/;"	l
write_to_file	tools/mkexynosspl.c	/^static void write_to_file(int ofd, void *buffer, int size)$/;"	f	typeref:typename:void	file:
write_toggle	drivers/usb/musb/musb_hcd.c	/^static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out)$/;"	f	typeref:typename:void	file:
write_tout	include/flash.h	/^	ulong	write_tout;		\/* maximum write timeout		*\/$/;"	m	struct:__anoneae1afdc0108	typeref:typename:ulong
write_tsc	arch/x86/include/asm/msr.h	/^#define write_tsc(/;"	d
write_uboot	tools/ifdtool.c	/^static int write_uboot(char *image, int size, struct input_file *uboot,$/;"	f	typeref:typename:int	file:
write_ucode	tools/ifdtool.c	/^static int write_ucode(char *image, int size, struct input_file *fdt,$/;"	f	typeref:typename:int	file:
write_w	include/sdhci.h	/^	void            (*write_w)(struct sdhci_host *host, u16 val, int reg);$/;"	m	struct:sdhci_ops	typeref:typename:void (*)(struct sdhci_host * host,u16 val,int reg)
write_word	board/amcc/common/flash.c	/^static int write_word(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word	board/amcc/yucca/flash.c	/^static int write_word(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word	board/cobra5272/flash.c	/^static int write_word (flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word	board/esd/common/flash.c	/^static int write_word (flash_info_t *info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word	board/freescale/m5253demo/flash.c	/^int write_word(flash_info_t * info, FPWV * dest, u16 data)$/;"	f	typeref:typename:int
write_word	board/tqc/tqm5200/cam5200_flash.c	/^static int write_word(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word	drivers/mtd/pic32_flash.c	/^static int write_word(flash_info_t *info, ulong dest, ulong word)$/;"	f	typeref:typename:int	file:
write_word	include/linux/mtd/onenand.h	/^	void (*write_word) (unsigned short value, void __iomem *addr);$/;"	m	struct:onenand_chip	typeref:typename:void (*)(unsigned short value,void __iomem * addr)
write_word	include/pci.h	/^	int (*write_word)(struct pci_controller*, pci_dev_t, int where, u16);$/;"	m	struct:pci_controller	typeref:typename:int (*)(struct pci_controller *,pci_dev_t,int where,u16)
write_word_1	board/amcc/common/flash.c	/^static int write_word_1(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word_1	board/amcc/yucca/flash.c	/^static int write_word_1(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word_16	board/tqc/tqm5200/cam5200_flash.c	/^static int write_word_16(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word_2	board/amcc/common/flash.c	/^static int write_word_2(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word_2	board/amcc/yucca/flash.c	/^static int write_word_2(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
write_word_32	board/tqc/tqm5200/cam5200_flash.c	/^static int write_word_32(flash_info_t * info, ulong dest, ulong data)$/;"	f	typeref:typename:int	file:
writeb	arch/arc/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/arm/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/avr32/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/blackfin/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/m68k/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/microblaze/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/nds32/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/nds32/include/asm/io.h	/^static inline void writeb(unsigned char val, unsigned char *addr)$/;"	f	typeref:typename:void
writeb	arch/nios2/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/openrisc/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/powerpc/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/sandbox/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/sh/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/sparc/include/asm/io.h	/^#define writeb	/;"	d
writeb	arch/x86/include/asm/io.h	/^#define writeb(/;"	d
writeb	arch/xtensa/include/asm/io.h	/^#define writeb(/;"	d
writeb	drivers/usb/musb/musb_core.h	/^# define writeb(/;"	d
writeb	include/iotrace.h	/^#define writeb(/;"	d
writeb_be	arch/mips/include/asm/io.h	/^#define writeb_be(/;"	d
writeb_le	drivers/bios_emulator/biosemui.h	/^#define writeb_le(/;"	d
writeb_relaxed	arch/arc/include/asm/io.h	/^#define writeb_relaxed(/;"	d
writeb_relaxed	arch/mips/include/asm/io.h	/^#define writeb_relaxed	/;"	d
writeback_control	include/linux/compat.h	/^struct writeback_control {$/;"	s
writeback_index	fs/ubifs/ubifs.h	/^	pgoff_t			writeback_index;\/* writeback starts here *\/$/;"	m	struct:address_space	typeref:typename:pgoff_t
writeback_sync_modes	include/linux/compat.h	/^enum writeback_sync_modes {$/;"	g
writebufsize	include/linux/mtd/mtd.h	/^	uint32_t writebufsize;$/;"	m	struct:mtd_info	typeref:typename:uint32_t
writeenv	common/env_nand.c	/^static int writeenv(size_t offset, u_char *buf)$/;"	f	typeref:typename:int	file:
writeext	include/phy.h	/^	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,$/;"	m	struct:phy_driver	typeref:typename:int (*)(struct phy_device * phydev,int addr,int devad,int reg,u16 val)
writefr_extra_feature_reg	arch/arm/mach-kirkwood/include/mach/cpu.h	/^static inline void writefr_extra_feature_reg(unsigned int val)$/;"	f	typeref:typename:void
writefr_extra_feature_reg	arch/arm/mach-orion5x/include/mach/cpu.h	/^static inline void writefr_extra_feature_reg(unsigned int val)$/;"	f	typeref:typename:void
writeio	include/linux/fb.h	/^	void (*writeio)(struct fb_info *info, void *dst, void *src, unsigned int size);$/;"	m	struct:fb_pixmap	typeref:typename:void (*)(struct fb_info * info,void * dst,void * src,unsigned int size)
writel	arch/arc/include/asm/io.h	/^#define writel(/;"	d
writel	arch/arm/cpu/armv7/bcm235xx/clk-core.h	/^static inline void writel(u32 val, void *addr)$/;"	f	typeref:typename:void
writel	arch/arm/cpu/armv7/bcm281xx/clk-core.h	/^static inline void writel(u32 val, void *addr)$/;"	f	typeref:typename:void
writel	arch/arm/include/asm/io.h	/^#define writel(/;"	d
writel	arch/avr32/include/asm/io.h	/^#define writel(/;"	d
writel	arch/blackfin/include/asm/io.h	/^#define writel(/;"	d
writel	arch/m68k/include/asm/io.h	/^#define writel(/;"	d
writel	arch/microblaze/include/asm/io.h	/^#define writel(/;"	d
writel	arch/mips/mach-au1x00/au1x00_usb_ohci.c	/^#define writel(/;"	d	file:
writel	arch/nds32/include/asm/io.h	/^#define writel(/;"	d
writel	arch/nds32/include/asm/io.h	/^static inline void writel(unsigned int val, unsigned int *addr)$/;"	f	typeref:typename:void
writel	arch/nios2/include/asm/io.h	/^#define writel(/;"	d
writel	arch/openrisc/include/asm/io.h	/^#define writel(/;"	d
writel	arch/powerpc/cpu/mpc5xxx/usb_ohci.c	/^#define writel(/;"	d	file:
writel	arch/powerpc/cpu/ppc4xx/usb_ohci.c	/^#define writel(/;"	d	file:
writel	arch/powerpc/include/asm/io.h	/^#define writel(/;"	d
writel	arch/sandbox/include/asm/io.h	/^#define writel(/;"	d
writel	arch/sh/include/asm/io.h	/^#define writel(/;"	d
writel	arch/sparc/include/asm/io.h	/^#define writel	/;"	d
writel	arch/x86/include/asm/io.h	/^#define writel(/;"	d
writel	arch/xtensa/include/asm/io.h	/^#define writel(/;"	d
writel	include/iotrace.h	/^#define writel(/;"	d
writel_be	arch/mips/include/asm/io.h	/^#define writel_be(/;"	d
writel_le	drivers/bios_emulator/biosemui.h	/^#define writel_le(/;"	d
writel_relaxed	arch/arc/include/asm/io.h	/^#define writel_relaxed(/;"	d
writel_relaxed	arch/mips/include/asm/io.h	/^#define writel_relaxed	/;"	d
writel_with_flush	drivers/block/ahci.c	/^#define writel_with_flush(/;"	d	file:
writel_with_flush	drivers/block/dwc_ahsata.c	/^#define writel_with_flush(/;"	d	file:
writelrb	arch/arm/cpu/pxa/pxa2xx.c	/^inline void writelrb(uint32_t val, uint32_t addr)$/;"	f	typeref:typename:void
writenfc	drivers/mtd/nand/mxc_nand.h	/^#define writenfc	/;"	d
writeq	arch/arm/include/asm/io.h	/^#define writeq(/;"	d
writeq	arch/mips/include/asm/io.h	/^#define writeq	/;"	d
writeq	arch/sparc/include/asm/io.h	/^#define writeq	/;"	d
writeq_be	arch/mips/include/asm/io.h	/^#define writeq_be(/;"	d
writeq_relaxed	arch/mips/include/asm/io.h	/^#define writeq_relaxed	/;"	d
writers	drivers/mtd/ubi/ubi.h	/^	int writers;$/;"	m	struct:ubi_volume	typeref:typename:int
writesb	arch/arm/include/asm/io.h	/^#define writesb(/;"	d
writesb	arch/blackfin/include/asm/io.h	/^static inline void writesb(const void __iomem *addr, const void *buf, int len)$/;"	f	typeref:typename:void
writesb	arch/nds32/include/asm/io.h	/^static inline void writesb(unsigned int *addr, const void * data, int bytelen)$/;"	f	typeref:typename:void
writesb	drivers/usb/musb-new/musb_io.h	/^static inline void writesb(const void __iomem *addr, const void *buf, int len)$/;"	f	typeref:typename:void
writesize	board/armltd/integrator/lowlevel_init.S	/^writesize:$/;"	l
writesize	include/linux/mtd/mtd.h	/^	uint32_t writesize;$/;"	m	struct:mtd_info	typeref:typename:uint32_t
writesize	include/linux/mtd/onenand.h	/^	unsigned int writesize;$/;"	m	struct:onenand_chip	typeref:typename:unsigned int
writesize	include/mtd/mtd-abi.h	/^	__u32 writesize;$/;"	m	struct:mtd_info_user	typeref:typename:__u32
writesize_mask	include/linux/mtd/mtd.h	/^	unsigned int writesize_mask;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
writesize_shift	include/linux/mtd/mtd.h	/^	unsigned int writesize_shift;$/;"	m	struct:mtd_info	typeref:typename:unsigned int
writesl	arch/arm/include/asm/io.h	/^#define writesl(/;"	d
writesl	arch/blackfin/include/asm/io.h	/^static inline void writesl(const void __iomem *addr, const void *buf, int len)$/;"	f	typeref:typename:void
writesl	arch/nds32/include/asm/io.h	/^static inline void writesl(unsigned int *addr, const void * data, int longlen)$/;"	f	typeref:typename:void
writesl	drivers/usb/musb-new/musb_io.h	/^static inline void writesl(const void __iomem *addr, const void *buf, int len)$/;"	f	typeref:typename:void
writesw	arch/arm/include/asm/io.h	/^#define writesw(/;"	d
writesw	arch/blackfin/include/asm/io.h	/^static inline void writesw(const void __iomem *addr, const void *buf, int len)$/;"	f	typeref:typename:void
writesw	arch/nds32/include/asm/io.h	/^static inline void writesw(unsigned int *addr, const void * data, int wordlen)$/;"	f	typeref:typename:void
writesw	drivers/usb/musb-new/musb_io.h	/^static inline void writesw(const void __iomem *addr, const void *buf, int len)$/;"	f	typeref:typename:void
writew	arch/arc/include/asm/io.h	/^#define writew(/;"	d
writew	arch/arm/include/asm/io.h	/^#define writew(/;"	d
writew	arch/avr32/include/asm/io.h	/^#define writew(/;"	d
writew	arch/blackfin/include/asm/io.h	/^#define writew(/;"	d
writew	arch/m68k/include/asm/io.h	/^#define writew(/;"	d
writew	arch/microblaze/include/asm/io.h	/^#define writew(/;"	d
writew	arch/nds32/include/asm/io.h	/^#define writew(/;"	d
writew	arch/nds32/include/asm/io.h	/^static inline void writew(unsigned short val, unsigned short *addr)$/;"	f	typeref:typename:void
writew	arch/nios2/include/asm/io.h	/^#define writew(/;"	d
writew	arch/openrisc/include/asm/io.h	/^#define writew(/;"	d
writew	arch/powerpc/include/asm/io.h	/^#define writew(/;"	d
writew	arch/sandbox/include/asm/io.h	/^#define writew(/;"	d
writew	arch/sh/include/asm/io.h	/^#define writew(/;"	d
writew	arch/sparc/include/asm/io.h	/^#define writew	/;"	d
writew	arch/x86/include/asm/io.h	/^#define writew(/;"	d
writew	arch/xtensa/include/asm/io.h	/^#define writew(/;"	d
writew	include/iotrace.h	/^#define writew(/;"	d
writew_be	arch/mips/include/asm/io.h	/^#define writew_be(/;"	d
writew_le	drivers/bios_emulator/biosemui.h	/^#define writew_le(/;"	d
writew_relaxed	arch/arc/include/asm/io.h	/^#define writew_relaxed(/;"	d
writew_relaxed	arch/mips/include/asm/io.h	/^#define writew_relaxed	/;"	d
writex_c0_entrylo0	arch/mips/include/asm/mipsregs.h	/^#define writex_c0_entrylo0(/;"	d
writex_c0_entrylo1	arch/mips/include/asm/mipsregs.h	/^#define writex_c0_entrylo1(/;"	d
writing	fs/yaffs2/yaffsfs.c	/^	u8 writing:1;$/;"	m	struct:yaffsfs_FileDes	typeref:typename:u8:1	file:
writing	include/linux/mtd/flashchip.h	/^	struct flchip *writing;$/;"	m	struct:flchip_shared	typeref:struct:flchip *
writing	lib/bzip2/bzlib.c	/^      Bool      writing;$/;"	m	struct:__anonb9ba2b050108	typeref:typename:Bool	file:
wrl	drivers/bios_emulator/x86emu/sys.c	/^void X86API wrl(u32 addr, u32 val)$/;"	f	typeref:typename:void X86API
wrlat	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 wrlat;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
wrlvl_config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int wrlvl_config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
wrlvl_config0	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int wrlvl_config0;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
wrlvl_config1	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int wrlvl_config1;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
wrlvl_ctl_2	board/freescale/b4860qds/ddr.c	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_ctl_2	board/freescale/ls1021aqds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls1043aqds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls1043ardb/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls1046aqds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls1046ardb/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls2080a/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls2080aqds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/ls2080ardb/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/t102xqds/ddr.c	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_ctl_2	board/freescale/t102xrdb/ddr.c	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_ctl_2	board/freescale/t1040qds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/t104xrdb/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/t208xqds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/t208xrdb/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/t4qds/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	board/freescale/t4rdb/ddr.h	/^	u32 wrlvl_ctl_2;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_2	include/fsl_ddr_sdram.h	/^	unsigned int wrlvl_ctl_2;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
wrlvl_ctl_3	board/freescale/b4860qds/ddr.c	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_ctl_3	board/freescale/ls1021aqds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls1043aqds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls1043ardb/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls1046aqds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls1046ardb/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls2080a/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls2080aqds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/ls2080ardb/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/t102xqds/ddr.c	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_ctl_3	board/freescale/t102xrdb/ddr.c	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_ctl_3	board/freescale/t1040qds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/t104xrdb/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/t208xqds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/t208xrdb/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/t4qds/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	board/freescale/t4rdb/ddr.h	/^	u32 wrlvl_ctl_3;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_ctl_3	include/fsl_ddr_sdram.h	/^	unsigned int wrlvl_ctl_3;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
wrlvl_en	include/fsl_ddr_sdram.h	/^	unsigned int wrlvl_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
wrlvl_override	include/fsl_ddr_sdram.h	/^	unsigned int wrlvl_override;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
wrlvl_sample	include/fsl_ddr_sdram.h	/^	unsigned int wrlvl_sample;		\/* Write leveling *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
wrlvl_start	board/freescale/b4860qds/ddr.c	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_start	board/freescale/corenet_ds/ddr.c	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_start	board/freescale/ls1021aqds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls1043aqds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls1043ardb/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls1046aqds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls1046ardb/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls2080a/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls2080aqds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/ls2080ardb/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/p2041rdb/ddr.c	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_start	board/freescale/t102xqds/ddr.c	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_start	board/freescale/t102xrdb/ddr.c	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_start	board/freescale/t1040qds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/t104xrdb/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/t208xqds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/t208xrdb/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/t4qds/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/freescale/t4rdb/ddr.h	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32
wrlvl_start	board/varisys/cyrus/ddr.c	/^	u32 wrlvl_start;$/;"	m	struct:board_specific_parameters	typeref:typename:u32	file:
wrlvl_start	include/fsl_ddr_sdram.h	/^	unsigned int wrlvl_start;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
wrlvl_status	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int wrlvl_status;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
wrmsr	arch/x86/include/asm/msr.h	/^static inline void wrmsr(unsigned msr, unsigned low, unsigned high)$/;"	f	typeref:typename:void
wrmsr_safe_regs	arch/x86/include/asm/msr.h	/^static inline int wrmsr_safe_regs(u32 regs[8])$/;"	f	typeref:typename:int
wrmsrl	arch/x86/include/asm/msr.h	/^#define wrmsrl(/;"	d
wrmsrl_amd_safe	arch/x86/include/asm/msr.h	/^static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)$/;"	f	typeref:typename:int
wrp	drivers/usb/musb-new/musb_dsps.c	/^	const struct dsps_musb_wrapper *wrp; \/* wrapper register offsets *\/$/;"	m	struct:dsps_glue	typeref:typename:const struct dsps_musb_wrapper *	file:
wrpr	arch/arm/include/asm/arch-stm32f1/stm32.h	/^	u32 wrpr;$/;"	m	struct:stm32_flash_regs	typeref:typename:u32
wrprot	drivers/mtd/nand/mxc_nand.h	/^	u16 wrprot;$/;"	m	struct:mxc_nand_regs	typeref:typename:u16
wrprot	drivers/mtd/nand/mxc_nand.h	/^	u32 wrprot;$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32
wrprot_unlock_blkaddr	drivers/mtd/nand/mxc_nand.h	/^	u32 wrprot_unlock_blkaddr[8];$/;"	m	struct:mxc_nand_ip_regs	typeref:typename:u32[8]
wrrr	board/cobra5272/bdm/cobra5272_uboot.gdb	/^set $wrrr  = $mbar - 1 + 0x280$/;"	t
wrsr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u16 wrsr;	\/* Reset Status *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wrsr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u16	wrsr;	\/* Reset Status *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wrsr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u16	wrsr;	\/* Reset Status *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wrsr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 wrsr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wrsr	include/fsl_wdog.h	/^	u16	wrsr;	\/* Reset Status *\/$/;"	m	struct:watchdog_regs	typeref:typename:u16
wrtomiss	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 wrtomiss:6;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:6
wrtord	arch/arm/include/asm/arch-rockchip/sdram_rk3036.h	/^		u32 wrtord:5;$/;"	m	struct:__anonade115c6010a::__anonade115c60208	typeref:typename:u32:5
wrtra_config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int wrtra_config;$/;"	m	struct:exynos5420_dmc	typeref:typename:unsigned int
wrtra_config	arch/arm/mach-exynos/include/mach/dmc.h	/^	unsigned int wrtra_config;$/;"	m	struct:exynos5_dmc	typeref:typename:unsigned int
wrw	drivers/bios_emulator/x86emu/sys.c	/^void X86API wrw(u32 addr, u16 val)$/;"	f	typeref:typename:void X86API
ws	drivers/mtd/nand/omap_gpmc.c	/^	uint8_t ws;		\/* wait status pin (0,1) *\/$/;"	m	struct:omap_nand_info	typeref:typename:uint8_t	file:
wsar	arch/arm/cpu/arm926ejs/armada100/timer.c	/^	u32 wsar;$/;"	m	struct:armd1tmr_registers	typeref:typename:u32	file:
wsbrk	common/dlmalloc.c	/^void* wsbrk (long size)$/;"	f	typeref:typename:void *
wscfg	drivers/mtd/nand/omap_gpmc.c	/^static const int8_t wscfg[CONFIG_SYS_MAX_NAND_DEVICE] =$/;"	v	typeref:typename:const int8_t[]	file:
wscfg	drivers/mtd/nand/omap_gpmc.c	/^static const int8_t wscfg[CONFIG_SYS_MAX_NAND_DEVICE];$/;"	v	typeref:typename:const int8_t[]	file:
wsec	drivers/rtc/ftrtc010.c	/^	unsigned int wsec;		\/* 0x24 *\/$/;"	m	struct:ftrtc010	typeref:typename:unsigned int	file:
wsize	lib/zlib/inflate.h	/^    unsigned wsize;             \/* window size or zero if not using window *\/$/;"	m	struct:inflate_state	typeref:typename:unsigned
wspr	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 wspr;	\/* 0x48 rw *\/$/;"	m	struct:watchdog	typeref:typename:u32
wspr	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 wspr;		\/* 0x48 rw *\/$/;"	m	struct:watchdog	typeref:typename:u32
wspr	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 wspr;		\/* 0x48 rw *\/$/;"	m	struct:watchdog	typeref:typename:u32
wsr	arch/arm/include/asm/arch-mx25/imx-regs.h	/^	u16 wsr;	\/* Service *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wsr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u16 wsr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wsr	arch/arm/include/asm/arch-mx6/imx-regs.h	/^	u16	wsr;	\/* Service *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wsr	arch/arm/include/asm/arch-mx7/imx-regs.h	/^	u16	wsr;	\/* Service *\/$/;"	m	struct:wdog_regs	typeref:typename:u16
wsr	arch/arm/include/asm/arch-vf610/imx-regs.h	/^	u16 wsr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wsr	arch/m68k/include/asm/immap_5275.h	/^	u16 wsr;$/;"	m	struct:wdog_ctrl	typeref:typename:u16
wsr	arch/m68k/include/asm/immap_5282.h	/^	ushort wsr;$/;"	m	struct:wdog_ctrl	typeref:typename:ushort
wsr	arch/m68k/include/asm/immap_5445x.h	/^	u16 wsr;$/;"	m	struct:wtm	typeref:typename:u16
wsr	include/fsl_wdog.h	/^	u16	wsr;	\/* Service *\/$/;"	m	struct:watchdog_regs	typeref:typename:u16
wstr	arch/arm/include/asm/arch-mx27/imx-regs.h	/^	u16 wstr;$/;"	m	struct:wdog_regs	typeref:typename:u16
wstrConfiguration	drivers/serial/usbtty.c	/^static u8 wstrConfiguration[2 + 2*(sizeof(CONFIG_USBD_CONFIGURATION_STR)-1)];$/;"	v	typeref:typename:u8[]	file:
wstrCtrlInterface	drivers/serial/usbtty.c	/^static u8 wstrCtrlInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];$/;"	v	typeref:typename:u8[]	file:
wstrDataInterface	drivers/serial/usbtty.c	/^static u8 wstrDataInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];$/;"	v	typeref:typename:u8[]	file:
wstrLang	drivers/serial/usbtty.c	/^static u8 wstrLang[4] = {4,USB_DT_STRING,0x9,0x4};$/;"	v	typeref:typename:u8[4]	file:
wstrManufacturer	drivers/serial/usbtty.c	/^static u8 wstrManufacturer[2 + 2*(sizeof(CONFIG_USBD_MANUFACTURER)-1)];$/;"	v	typeref:typename:u8[]	file:
wstrProduct	drivers/serial/usbtty.c	/^static u8 wstrProduct[2 + 2*(sizeof(CONFIG_USBD_PRODUCT_NAME)-1)];$/;"	v	typeref:typename:u8[]	file:
wstrSerial	drivers/serial/usbtty.c	/^static u8 wstrSerial[2 + 2*(sizeof(serial_number) - 1)];$/;"	v	typeref:typename:u8[]	file:
wtclrint	arch/arm/mach-exynos/include/mach/watchdog.h	/^	unsigned int wtclrint;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtclrint	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^	unsigned int wtclrint;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtcnt	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	wtcnt;$/;"	m	struct:s3c24x0_watchdog	typeref:typename:u32
wtcnt	arch/arm/mach-exynos/include/mach/watchdog.h	/^	unsigned int wtcnt;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtcnt	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^	unsigned int wtcnt;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtcon	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	wtcon;$/;"	m	struct:s3c24x0_watchdog	typeref:typename:u32
wtcon	arch/arm/mach-exynos/include/mach/watchdog.h	/^	unsigned int wtcon;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtcon	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^	unsigned int wtcon;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtdat	arch/arm/include/asm/arch-s3c24x0/s3c24x0.h	/^	u32	wtdat;$/;"	m	struct:s3c24x0_watchdog	typeref:typename:u32
wtdat	arch/arm/mach-exynos/include/mach/watchdog.h	/^	unsigned int wtdat;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtdat	arch/arm/mach-s5pc1xx/include/mach/watchdog.h	/^	unsigned int wtdat;$/;"	m	struct:s5p_watchdog	typeref:typename:unsigned int
wtm	arch/m68k/include/asm/immap_5445x.h	/^typedef struct wtm {$/;"	s
wtm_t	arch/m68k/include/asm/immap_5445x.h	/^} wtm_t;$/;"	t	typeref:struct:wtm
wtr	arch/x86/include/asm/arch-quark/mrc.h	/^	uint32_t wtr;$/;"	m	struct:dram_params	typeref:typename:uint32_t
wwan3goob	arch/x86/include/asm/me_common.h	/^	u16 wwan3goob:1;	\/* ivybridge only *\/$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
wwan3gpresent	arch/x86/include/asm/me_common.h	/^	u16 wwan3gpresent:1;	\/* ivybridge only *\/$/;"	m	struct:tdt_state_flag	typeref:typename:u16:1
wwid	include/linux/edd.h	/^			__u64 wwid;$/;"	m	struct:edd_device_params::__anon8a8b619a080a::__anon8a8b619a0e08	typeref:typename:__u64
wwps	arch/arm/include/asm/arch-omap3/cpu.h	/^	u32 wwps;	\/* 0x34 r *\/$/;"	m	struct:watchdog	typeref:typename:u32
wwps	arch/arm/include/asm/arch-omap4/cpu.h	/^	u32 wwps;		\/* 0x34 r *\/$/;"	m	struct:watchdog	typeref:typename:u32
wwps	arch/arm/include/asm/arch-omap5/cpu.h	/^	u32 wwps;		\/* 0x34 r *\/$/;"	m	struct:watchdog	typeref:typename:u32
x	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	x;		\/* Horizontal address offset (bytes) *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
x	arch/arm/include/asm/setup.h	/^	u8		x;$/;"	m	struct:tag_videotext	typeref:typename:u8
x	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 x;$/;"	m	struct:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a::__anon775fc5443008	typeref:typename:u32
x	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 x;$/;"	m	struct:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a::__anon775fc5443108	typeref:typename:u32
x	arch/nds32/include/asm/setup.h	/^	u8		x;$/;"	m	struct:tag_videotext	typeref:typename:u8
x	arch/sh/include/asm/unaligned-sh4a.h	/^struct __una_u16 { u16 x __attribute__((packed)); };$/;"	m	struct:__una_u16	typeref:typename:u16
x	arch/sh/include/asm/unaligned-sh4a.h	/^struct __una_u32 { u32 x __attribute__((packed)); };$/;"	m	struct:__una_u32	typeref:typename:u32
x	arch/sh/include/asm/unaligned-sh4a.h	/^struct __una_u64 { u64 x __attribute__((packed)); };$/;"	m	struct:__una_u64	typeref:typename:u64
x	drivers/bios_emulator/include/biosemu.h	/^	RMWORDREGS x;$/;"	m	union:__anon964d1014070a	typeref:typename:RMWORDREGS
x	drivers/usb/gadget/f_mass_storage.c	/^struct completion {int x; };$/;"	m	struct:completion	typeref:typename:int	file:
x	drivers/usb/gadget/f_mass_storage.c	/^struct kref {int x; };$/;"	m	struct:kref	typeref:typename:int	file:
x	drivers/video/mxcfb.h	/^	__u16 x;$/;"	m	struct:mxcfb_pos	typeref:typename:__u16
x	drivers/video/stb_truetype.h	/^      stbtt_vertex_type x,y,cx,cy;$/;"	m	struct:__anonce392f790608	typeref:typename:stbtt_vertex_type
x	drivers/video/stb_truetype.h	/^   float x,y;$/;"	m	struct:__anonce392f790e08	typeref:typename:float
x	drivers/video/stb_truetype.h	/^   int x,dx;$/;"	m	struct:stbtt__active_edge	typeref:typename:int
x	drivers/video/stb_truetype.h	/^   int x,y,bottom_y;$/;"	m	struct:__anonce392f790f08	typeref:typename:int
x	drivers/video/stb_truetype.h	/^   stbrp_coord x,y;$/;"	m	struct:stbrp_rect	typeref:typename:stbrp_coord
x	drivers/video/stb_truetype.h	/^   unsigned char x;$/;"	m	struct:__anonce392f791008	typeref:typename:unsigned char
x	fs/jffs2/summary.h	/^	struct jffs2_sum_xattr_flash x;$/;"	m	union:jffs2_sum_flash	typeref:struct:jffs2_sum_xattr_flash
x	fs/jffs2/summary.h	/^	struct jffs2_sum_xattr_mem x;$/;"	m	union:jffs2_sum_mem	typeref:struct:jffs2_sum_xattr_mem
x	include/linux/fb.h	/^	__u16 x, y;$/;"	m	struct:fbcurpos	typeref:typename:__u16
x	include/linux/fb.h	/^	u32 x;$/;"	m	struct:fb_blit_caps	typeref:typename:u32
x0	arch/sh/include/asm/ptrace.h	/^	unsigned long	x0;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
x0	drivers/video/stb_truetype.h	/^   float x0,y0, x1,y1;$/;"	m	struct:stbtt__edge	typeref:typename:float
x0	drivers/video/stb_truetype.h	/^   float x0,y0,s0,t0; \/\/ top-left$/;"	m	struct:__anonce392f790208	typeref:typename:float
x0	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790108	typeref:typename:unsigned short
x0	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790308	typeref:typename:unsigned short
x0	include/vxworks.h	/^	u32 x0;		\/* don't care, used by VxWorks *\/$/;"	m	struct:e820info	typeref:typename:u32
x1	arch/sh/include/asm/ptrace.h	/^	unsigned long	x1;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
x1	drivers/video/stb_truetype.h	/^   float x0,y0, x1,y1;$/;"	m	struct:stbtt__edge	typeref:typename:float
x1	drivers/video/stb_truetype.h	/^   float x1,y1,s1,t1; \/\/ bottom-right$/;"	m	struct:__anonce392f790208	typeref:typename:float
x1	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790108	typeref:typename:unsigned short
x1	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790308	typeref:typename:unsigned short
x1	include/vxworks.h	/^	u32 x1;		\/* don't care, used by VxWorks *\/$/;"	m	struct:e820info	typeref:typename:u32
x2	include/vxworks.h	/^	u32 x2;		\/* don't care, used by VxWorks *\/$/;"	m	struct:e820info	typeref:typename:u32
x2_sbox	lib/aes.c	/^static const u8 x2_sbox[256] = {$/;"	v	typeref:typename:const u8[256]	file:
x3	include/vxworks.h	/^	u32 x3;		\/* don't care, used by VxWorks *\/$/;"	m	struct:e820info	typeref:typename:u32
x3_sbox	lib/aes.c	/^static const u8 x3_sbox[256] = {$/;"	v	typeref:typename:const u8[256]	file:
x4_en	include/fsl_ddr_sdram.h	/^	unsigned int x4_en;	\/* enable x4 devices *\/$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
x600_fpga_fns	board/spear/x600/fpga.c	/^static xilinx_spartan3_slave_serial_fns x600_fpga_fns = {$/;"	v	typeref:typename:xilinx_spartan3_slave_serial_fns	file:
x600_init_fpga	board/spear/x600/fpga.c	/^int x600_init_fpga(void)$/;"	f	typeref:typename:int
x86	arch/x86/cpu/cpu.c	/^	uint8_t x86;            \/* CPU family *\/$/;"	m	struct:cpuinfo_x86	typeref:typename:uint8_t	file:
x86	arch/x86/include/asm/global_data.h	/^	uint8_t x86;			\/* CPU family *\/$/;"	m	struct:arch_global_data	typeref:typename:uint8_t
x86	doc/README.x86	/^x86 architecture  --->$/;"	l
x86	drivers/bios_emulator/include/x86emu/regs.h	/^	X86EMU_regs x86;$/;"	m	struct:__anon39451e6d0908	typeref:typename:X86EMU_regs
x86 architecture	arch/x86/Kconfig	/^menu "x86 architecture"$/;"	m
x86_cleanup_before_linux	arch/x86/cpu/cpu.c	/^int __weak x86_cleanup_before_linux(void)$/;"	f	typeref:typename:int __weak
x86_cpu_init_f	arch/x86/cpu/cpu.c	/^int x86_cpu_init_f(void)$/;"	f	typeref:typename:int
x86_device	arch/x86/include/asm/global_data.h	/^	uint32_t x86_device;$/;"	m	struct:arch_global_data	typeref:typename:uint32_t
x86_disable_caches	arch/x86/cpu/cpu.c	/^void x86_disable_caches(void)$/;"	f	typeref:typename:void
x86_enable_caches	arch/x86/cpu/cpu.c	/^void x86_enable_caches(void)$/;"	f	typeref:typename:void
x86_exception	arch/x86/include/asm/interrupt.h	/^enum x86_exception {$/;"	g
x86_family	drivers/timer/tsc_timer.c	/^	u8 x86_family;	\/* CPU family *\/$/;"	m	struct:freq_desc	typeref:typename:u8	file:
x86_fsp_init	arch/x86/lib/fsp/fsp_common.c	/^int x86_fsp_init(void)$/;"	f	typeref:typename:int
x86_full_reset	arch/x86/cpu/cpu.c	/^void x86_full_reset(void)$/;"	f	typeref:typename:void
x86_get_idt	arch/x86/cpu/interrupts.c	/^void *x86_get_idt(void)$/;"	f	typeref:typename:void *
x86_init_cache	arch/x86/cpu/cpu.c	/^int x86_init_cache(void)$/;"	f	typeref:typename:int
x86_init_cpus	arch/x86/cpu/cpu.c	/^static int x86_init_cpus(void)$/;"	f	typeref:typename:int	file:
x86_mask	arch/x86/cpu/cpu.c	/^	uint8_t x86_mask;$/;"	m	struct:cpuinfo_x86	typeref:typename:uint8_t	file:
x86_mask	arch/x86/include/asm/global_data.h	/^	uint8_t x86_mask;$/;"	m	struct:arch_global_data	typeref:typename:uint8_t
x86_model	arch/x86/cpu/cpu.c	/^	uint8_t x86_model;$/;"	m	struct:cpuinfo_x86	typeref:typename:uint8_t	file:
x86_model	arch/x86/include/asm/global_data.h	/^	uint8_t x86_model;$/;"	m	struct:arch_global_data	typeref:typename:uint8_t
x86_model	drivers/timer/tsc_timer.c	/^	u8 x86_model;	\/* model *\/$/;"	m	struct:freq_desc	typeref:typename:u8	file:
x86_mp_init	arch/x86/cpu/cpu.c	/^static int x86_mp_init(void)$/;"	f	typeref:typename:int	file:
x86_pci_write_config32	arch/x86/cpu/baytrail/early_uart.c	/^static void x86_pci_write_config32(int dev, unsigned int where, u32 value)$/;"	f	typeref:typename:void	file:
x86_phys_enter_paging	arch/x86/lib/physmem.c	/^static void x86_phys_enter_paging(void)$/;"	f	typeref:typename:void	file:
x86_phys_exit_paging	arch/x86/lib/physmem.c	/^static void x86_phys_exit_paging(void)$/;"	f	typeref:typename:void	file:
x86_phys_map_page	arch/x86/lib/physmem.c	/^static void x86_phys_map_page(uintptr_t virt, phys_addr_t phys, int invlpg)$/;"	f	typeref:typename:void	file:
x86_phys_memset_page	arch/x86/lib/physmem.c	/^static void x86_phys_memset_page(phys_addr_t map_addr, uintptr_t offset, int c,$/;"	f	typeref:typename:void	file:
x86_vendor	arch/x86/cpu/cpu.c	/^	uint8_t x86_vendor;     \/* CPU vendor *\/$/;"	m	struct:cpuinfo_x86	typeref:typename:uint8_t	file:
x86_vendor	arch/x86/include/asm/global_data.h	/^	uint8_t x86_vendor;		\/* CPU vendor *\/$/;"	m	struct:arch_global_data	typeref:typename:uint8_t
x86_vendor_name	arch/x86/cpu/cpu.c	/^static const char *const x86_vendor_name[] = {$/;"	v	typeref:typename:const char * const[]	file:
x86_vendors	arch/x86/cpu/cpu.c	/^} x86_vendors[] = {$/;"	v	typeref:typename:const struct __anonbde166970108[]
x86emuOp2_bsf	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_bsr	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_btX_I	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_bt_R	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_btc_R	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_btr_R	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_bts_R	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_illegal_op	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_illegal_op($/;"	f	typeref:typename:void
x86emuOp2_imul_R_RM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_lfs_R_IMM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_lgs_R_IMM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_long_jump	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_long_jump(u8 op2)$/;"	f	typeref:typename:void
x86emuOp2_lss_R_IMM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_movsx_byte_R_RM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_movsx_word_R_RM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_movzx_byte_R_RM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_movzx_word_R_RM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_pop_FS	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_pop_GS	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_push_FS	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_push_GS	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_set_byte	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_set_byte(u8 op2)$/;"	f	typeref:typename:void
x86emuOp2_shld_CL	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_shld_IMM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_shrd_CL	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp2_shrd_IMM	drivers/bios_emulator/x86emu/ops2.c	/^void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))$/;"	f	typeref:typename:void
x86emuOp_aaa	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_aad	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_aad(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_aam	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_aam(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_aas	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_aas(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_call_far_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_call_near_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cbw	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_clc	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_clc(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cld	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cld(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cli	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cli(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cmc	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cmps_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cmps_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_cwd	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_daa	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_daa(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_das	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_das(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_dec_register	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_dec_register(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_enter	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_enter(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_genop_byte_AL_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_genop_byte_AL_IMM(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_genop_byte_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_genop_byte_RM_R(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_genop_byte_R_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_genop_byte_R_RM(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_genop_word_AX_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_genop_word_AX_IMM(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_genop_word_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_genop_word_RM_R(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_genop_word_R_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_genop_word_R_RM(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_halt	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_halt(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_illegal_op	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_illegal_op($/;"	f	typeref:typename:void
x86emuOp_imul_byte_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_imul_word_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_in_byte_AL_DX	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_in_byte_AL_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_in_word_AX_DX	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_in_word_AX_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_inc_register	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_inc_register(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_ins_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_ins_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_int3	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_int3(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_int_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_into	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_into(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_iret	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_iret(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_jcxz	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_jump_byte_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_jump_far_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_jump_near_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_jump_near_cond	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_jump_near_cond(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_lahf	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_lds_R_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_lea_word_R_M	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_leave	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_leave(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_les_R_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_lock	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_lock(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_lods_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_lods_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_loop	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_loop(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_loope	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_loope(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_loopne	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_AL_M_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_AX_M_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_M_AL_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_M_AX_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_byte_RM_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_byte_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_byte_R_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_byte_register_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_byte_register_IMM(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_mov_word_RM_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_word_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_word_RM_SR	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_word_R_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_word_SR_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_mov_word_register_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_mov_word_register_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_movs_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_movs_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_nop	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_nop(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opc80_byte_RM_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opc81_word_RM_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opc82_byte_RM_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opc83_word_RM_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcC0_byte_RM_MEM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcC1_word_RM_MEM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcD0_byte_RM_1	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcD1_word_RM_1	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcD2_byte_RM_CL	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcD3_word_RM_CL	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcF6_byte_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcF7_word_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcFE_byte_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_opcFF_word_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_out_byte_DX_AL	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_out_byte_IMM_AL	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_out_word_DX_AX	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_out_word_IMM_AX	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_outs_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_outs_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pop_DS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pop_ES	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pop_RM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pop_SS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pop_all	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pop_register	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pop_register(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_popf_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_prefix_addr	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_prefix_data	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_CS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_DS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_ES	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_SS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_all	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_byte_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_push_register	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_register(u8 op1)$/;"	f	typeref:typename:void
x86emuOp_push_word_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_pushf_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_repe	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_repe(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_repne	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_repne(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_ret_far	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_ret_far_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_ret_near	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_ret_near_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_sahf	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_scas_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_scas_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_segovr_CS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_segovr_DS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_segovr_ES	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_segovr_FS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_segovr_GS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_segovr_SS	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_stc	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_stc(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_std	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_std(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_sti	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_sti(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_stos_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_stos_word	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_test_AL_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_test_AX_IMM	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_test_byte_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_test_word_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_two_byte	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_wait	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_wait(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_xchg_byte_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_xchg_word_AX_register	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_xchg_word_AX_register(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_xchg_word_RM_R	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emuOp_xlat	drivers/bios_emulator/x86emu/ops.c	/^void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))$/;"	f	typeref:typename:void
x86emu_GenOpName	drivers/bios_emulator/x86emu/ops.c	/^static char *x86emu_GenOpName[8] = {$/;"	v	typeref:typename:char * [8]	file:
x86emu_check_data_access	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_check_data_access(uint dummy1, uint dummy2)$/;"	f	typeref:typename:void
x86emu_check_ip_access	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_check_ip_access(void)$/;"	f	typeref:typename:void
x86emu_check_jump_condition	drivers/bios_emulator/x86emu/ops2.c	/^int x86emu_check_jump_condition(u8 op)$/;"	f	typeref:typename:int
x86emu_check_mem_access	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_check_mem_access(u32 dummy)$/;"	f	typeref:typename:void
x86emu_check_sp_access	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_check_sp_access(void)$/;"	f	typeref:typename:void
x86emu_decode_printf	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_decode_printf(char *x)$/;"	f	typeref:typename:void
x86emu_decode_printf2	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_decode_printf2(char *x, int y)$/;"	f	typeref:typename:void
x86emu_dump_regs	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_dump_regs(void)$/;"	f	typeref:typename:void
x86emu_dump_xregs	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_dump_xregs(void)$/;"	f	typeref:typename:void
x86emu_end_instr	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_end_instr(void)$/;"	f	typeref:typename:void
x86emu_inc_decoded_inst_len	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_inc_decoded_inst_len(int x)$/;"	f	typeref:typename:void
x86emu_intr_handle	drivers/bios_emulator/x86emu/decode.c	/^static void x86emu_intr_handle(void)$/;"	f	typeref:typename:void	file:
x86emu_intr_raise	drivers/bios_emulator/x86emu/decode.c	/^void x86emu_intr_raise($/;"	f	typeref:typename:void
x86emu_just_disassemble	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_just_disassemble(void)$/;"	f	typeref:typename:void
x86emu_optab	drivers/bios_emulator/x86emu/ops.c	/^void (*x86emu_optab[256])(u8) =$/;"	v	typeref:typename:void (* [256])(u8)
x86emu_optab2	drivers/bios_emulator/x86emu/ops2.c	/^void (*x86emu_optab2[256])(u8) =$/;"	v	typeref:typename:void (* [256])(u8)
x86emu_parity_tab	drivers/bios_emulator/x86emu/prim_ops.c	/^static u32 x86emu_parity_tab[8] =$/;"	v	typeref:typename:u32[8]	file:
x86emu_parse_line	drivers/bios_emulator/x86emu/debug.c	/^static int x86emu_parse_line(char *s, int *ps, int *n)$/;"	f	typeref:typename:int	file:
x86emu_print_int_vect	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_print_int_vect(u16 iv)$/;"	f	typeref:typename:void
x86emu_single_step	drivers/bios_emulator/x86emu/debug.c	/^void x86emu_single_step(void)$/;"	f	typeref:typename:void
x_activate	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_activate;		\/* MBAR_ETH + 0x0C0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_addr	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_addr;			\/* MBAR_ETH + 0x1E8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_bp	arch/arm/mach-mvebu/include/mach/cpu.h	/^	int x_bp;		\/* backporch *\/$/;"	m	struct:mvebu_lcd_info	typeref:typename:int
x_charsize	include/vbe.h	/^	u8 x_charsize;		\/* 16 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
x_charsize	include/video_console.h	/^	int x_charsize;$/;"	m	struct:vidconsole_priv	typeref:typename:int
x_cntrl	arch/powerpc/include/asm/immap_512x.h	/^	u32	x_cntrl;	\/* Transmit control register *\/$/;"	m	struct:fec512x	typeref:typename:u32
x_cntrl	drivers/net/fec_mxc.h	/^	uint32_t x_cntrl;		\/* MBAR_ETH + 0x0C4 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
x_cntrl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_cntrl;		\/* MBAR_ETH + 0x0C4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_color	arch/arm/include/asm/arch-omap3/dss.h	/^	u32 x_color;				\/* 0x44 *\/$/;"	m	struct:venc_regs	typeref:typename:u32
x_count	arch/blackfin/include/asm/dma.h	/^	u16 x_count;$/;"	m	struct:dmasg	typeref:typename:u16
x_count	arch/blackfin/include/asm/dma.h	/^	u16 x_count;$/;"	m	struct:dmasg_large	typeref:typename:u16
x_count	arch/blackfin/include/asm/dma.h	/^	u32 x_count;		\/* DMA x_count register *\/$/;"	m	struct:dma_register	typeref:typename:u32
x_count	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_count;		\/* MBAR_ETH + 0x164 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_data	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_data;			\/* MBAR_ETH + 0x0CC *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_des_active	arch/powerpc/include/asm/immap_512x.h	/^	u32	x_des_active;	\/* Transmit ring updated flag *\/$/;"	m	struct:fec512x	typeref:typename:u32
x_des_active	drivers/net/fec_mxc.h	/^	uint32_t x_des_active;		\/* MBAR_ETH + 0x014 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
x_des_active	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_des_active;		\/* MBAR_ETH + 0x014 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_des_active_cl	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_des_active_cl;	\/* MBAR_ETH + 0x01C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_des_start	arch/powerpc/include/asm/immap_512x.h	/^	u32	x_des_start;	\/* Pointer to beginning of transmit descriptor ring *\/$/;"	m	struct:fec512x	typeref:typename:u32
x_dsdt_h	arch/x86/include/asm/acpi_table.h	/^	u32 x_dsdt_h;$/;"	m	struct:acpi_fadt	typeref:typename:u32
x_dsdt_l	arch/x86/include/asm/acpi_table.h	/^	u32 x_dsdt_l;$/;"	m	struct:acpi_fadt	typeref:typename:u32
x_firmware_ctl_h	arch/x86/include/asm/acpi_table.h	/^	u32 x_firmware_ctl_h;$/;"	m	struct:acpi_fadt	typeref:typename:u32
x_firmware_ctl_l	arch/x86/include/asm/acpi_table.h	/^	u32 x_firmware_ctl_l;$/;"	m	struct:acpi_fadt	typeref:typename:u32
x_firmware_waking_vector_h	arch/x86/include/asm/acpi_table.h	/^	u32 x_firmware_waking_vector_h;	\/* X FW waking vector, high *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
x_firmware_waking_vector_l	arch/x86/include/asm/acpi_table.h	/^	u32 x_firmware_waking_vector_l;	\/* X FW waking vector, low *\/$/;"	m	struct:acpi_facs	typeref:typename:u32
x_fp	arch/arm/mach-mvebu/include/mach/cpu.h	/^	int x_fp;		\/* frontporch *\/$/;"	m	struct:mvebu_lcd_info	typeref:typename:int
x_gpe0_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_gpe0_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_gpe1_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_gpe1_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_lag	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_lag;			\/* MBAR_ETH + 0x168 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_length	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_length;		\/* MBAR_ETH + 0x1E4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_mib	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_mib;			\/* MBAR_ETH + 0x0D4 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_modify	arch/blackfin/include/asm/dma.h	/^	s16 x_modify;$/;"	m	struct:dmasg	typeref:typename:s16
x_modify	arch/blackfin/include/asm/dma.h	/^	s16 x_modify;$/;"	m	struct:dmasg_large	typeref:typename:s16
x_modify	arch/blackfin/include/asm/dma.h	/^	s32 x_modify;		\/* DMA x_modify register *\/$/;"	m	struct:dma_register	typeref:typename:s32
x_pixels_per_m	include/bmp_layout.h	/^	__u32	x_pixels_per_m;$/;"	m	struct:bmp_header	typeref:typename:__u32
x_pm1a_cnt_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_pm1a_cnt_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_pm1a_evt_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_pm1a_evt_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_pm1b_cnt_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_pm1b_cnt_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_pm1b_evt_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_pm1b_evt_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_pm2_cnt_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_pm2_cnt_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_pm_tmr_blk	arch/x86/include/asm/acpi_table.h	/^	struct acpi_gen_regaddr x_pm_tmr_blk;$/;"	m	struct:acpi_fadt	typeref:struct:acpi_gen_regaddr
x_pos	include/gdsys_fpga.h	/^	u16 x_pos;$/;"	m	struct:ihs_osd	typeref:typename:u16
x_read	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_read;			\/* MBAR_ETH + 0x174 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 filler0, x_reg;$/;"	m	struct:__anon39451e6d0208	typeref:typename:u16
x_reg	drivers/bios_emulator/include/x86emu/regs.h	/^	u16 x_reg;$/;"	m	struct:__anon39451e6d0508	typeref:typename:u16
x_res	arch/arm/mach-mvebu/include/mach/cpu.h	/^	int x_res;$/;"	m	struct:mvebu_lcd_info	typeref:typename:int
x_resolution	arch/x86/include/asm/coreboot_tables.h	/^	u32 x_resolution;$/;"	m	struct:cb_framebuffer	typeref:typename:u32
x_resolution	include/vbe.h	/^	u16 x_resolution;	\/* 12 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
x_retry	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_retry;		\/* MBAR_ETH + 0x16C *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_status	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_status;		\/* MBAR_ETH + 0x0D0 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_test	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_test;			\/* MBAR_ETH + 0x0D8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_time_9	lib/aes.c	/^static const u8 x_time_9[256] = {$/;"	v	typeref:typename:const u8[256]	file:
x_time_b	lib/aes.c	/^static const u8 x_time_b[256] = {$/;"	v	typeref:typename:const u8[256]	file:
x_time_d	lib/aes.c	/^static const u8 x_time_d[256] = {$/;"	v	typeref:typename:const u8[256]	file:
x_time_e	lib/aes.c	/^static const u8 x_time_e[256] = {$/;"	v	typeref:typename:const u8[256]	file:
x_wmrk	arch/powerpc/include/asm/immap_512x.h	/^	u32	x_wmrk;		\/* Transmit FIFO watermark *\/$/;"	m	struct:fec512x	typeref:typename:u32
x_wmrk	drivers/net/fec_mxc.h	/^	uint32_t x_wmrk;		\/* MBAR_ETH + 0x144 *\/$/;"	m	struct:ethernet_regs	typeref:typename:uint32_t
x_wmrk	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_wmrk;			\/* MBAR_ETH + 0x144 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
x_write	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 x_write;		\/* MBAR_ETH + 0x170 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
xactor_scratch	arch/arm/include/asm/arch-tegra114/gp_padctrl.h	/^	u32	xactor_scratch;	\/* 0x64: APB_MISC_GP_XACTOR_SCRATCH *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xactor_scratch	arch/arm/include/asm/arch-tegra124/gp_padctrl.h	/^	u32	xactor_scratch;	\/* 0x64: APB_MISC_GP_XACTOR_SCRATCH *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xactor_scratch	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	xactor_scratch;	\/* 0x64: APB_MISC_GP_XACTOR_SCRATCH *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xactor_scratch	arch/arm/include/asm/arch-tegra210/gp_padctrl.h	/^	u32	xactor_scratch;	\/* 0x64: APB_MISC_GP_XACTOR_SCRATCH *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xactor_scratch	arch/arm/include/asm/arch-tegra30/gp_padctrl.h	/^	u32	xactor_scratch;	\/* 0x64: APB_MISC_GP_XACTOR_SCRATCH *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xadvance	drivers/video/stb_truetype.h	/^   float xoff,yoff,xadvance;$/;"	m	struct:__anonce392f790108	typeref:typename:float
xadvance	drivers/video/stb_truetype.h	/^   float xoff,yoff,xadvance;$/;"	m	struct:__anonce392f790308	typeref:typename:float
xargs	arch/sparc/include/asm/ptrace.h	/^	unsigned long xargs[6];$/;"	m	struct:sparc_stackf	typeref:typename:unsigned long[6]
xattr	fs/ubifs/ubifs.h	/^	unsigned int xattr:1;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int:1
xattr_cnt	fs/ubifs/debug.c	/^	unsigned int xattr_cnt;$/;"	m	struct:fsck_inode	typeref:typename:unsigned int	file:
xattr_cnt	fs/ubifs/ubifs-media.h	/^	__le32 xattr_cnt;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
xattr_cnt	fs/ubifs/ubifs.h	/^	unsigned int xattr_cnt;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int
xattr_known	fs/yaffs2/yaffs_guts.h	/^	u8 xattr_known:1;	\/* We know if this has object has xattribs$/;"	m	struct:yaffs_obj	typeref:typename:u8:1
xattr_names	fs/ubifs/ubifs-media.h	/^	__le32 xattr_names;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
xattr_names	fs/ubifs/ubifs.h	/^	unsigned int xattr_names;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int
xattr_nms	fs/ubifs/debug.c	/^	unsigned int xattr_nms;$/;"	m	struct:fsck_inode	typeref:typename:unsigned int	file:
xattr_size	fs/ubifs/ubifs-media.h	/^	__le32 xattr_size;$/;"	m	struct:ubifs_ino_node	typeref:typename:__le32
xattr_size	fs/ubifs/ubifs.h	/^	unsigned int xattr_size;$/;"	m	struct:ubifs_inode	typeref:typename:unsigned int
xattr_sz	fs/ubifs/debug.c	/^	unsigned int xattr_sz;$/;"	m	struct:fsck_inode	typeref:typename:unsigned int	file:
xb	drivers/video/mx3fb.c	/^	u32	xb:12;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:12	file:
xb	drivers/video/mx3fb.c	/^	u32	xb:12;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:12	file:
xbar	drivers/pci/pci_tegra.c	/^	unsigned long xbar;$/;"	m	struct:tegra_pcie	typeref:typename:unsigned long	file:
xbs	arch/m68k/include/asm/coldfire/crossbar.h	/^typedef struct xbs {$/;"	s
xbs_t	arch/m68k/include/asm/coldfire/crossbar.h	/^} xbs_t;$/;"	t	typeref:struct:xbs
xcalloc	scripts/kconfig/util.c	/^void *xcalloc(size_t nmemb, size_t size)$/;"	f	typeref:typename:void *
xceiv	drivers/usb/musb-new/musb_core.h	/^	struct usb_phy		*xceiv;$/;"	m	struct:musb	typeref:struct:usb_phy *
xceiver_type	drivers/net/fec_mxc.h	/^enum xceiver_type {$/;"	g
xceiver_type	drivers/net/mpc512x_fec.h	/^} xceiver_type;$/;"	t	typeref:enum:__anonf8b8c0fc0203
xceiver_type	drivers/net/mpc5xxx_fec.h	/^} xceiver_type;$/;"	t	typeref:enum:__anone13c4dc90203
xchg	arch/blackfin/include/asm/system.h	/^#define xchg(/;"	d
xchg	arch/microblaze/include/asm/system.h	/^#define xchg(/;"	d
xchg	arch/mips/include/asm/system.h	/^#define xchg(/;"	d
xchg	arch/sh/include/asm/system.h	/^#define xchg(/;"	d
xchg	arch/x86/cpu/lapic.c	/^#define xchg(/;"	d	file:
xchg_u32	arch/mips/include/asm/system.h	/^static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)$/;"	f	typeref:typename:unsigned long
xchg_u32	arch/sh/include/asm/system.h	/^static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)$/;"	f	typeref:typename:unsigned long
xchg_u8	arch/sh/include/asm/system.h	/^static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)$/;"	f	typeref:typename:unsigned long
xconfig	scripts/kconfig/Makefile	/^xconfig: $(obj)\/qconf$/;"	t
xcs	arch/x86/include/asm/ptrace.h	/^			long xcs;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0208	typeref:typename:long
xcs	arch/x86/include/asm/ptrace.h	/^			long xcs;$/;"	m	struct:irq_regs::__anonee9aafbf010a::__anonee9aafbf0308	typeref:typename:long
xcs	arch/x86/include/asm/ptrace.h	/^	int  xcs;$/;"	m	struct:pt_regs	typeref:typename:int
xcur_frac	include/video_console.h	/^	int xcur_frac;$/;"	m	struct:vidconsole_priv	typeref:typename:int
xcv_type	drivers/net/fec_mxc.h	/^	enum xceiver_type xcv_type;	\/* transceiver type *\/$/;"	m	struct:fec_priv	typeref:enum:xceiver_type
xcv_type	drivers/net/mpc512x_fec.h	/^	xceiver_type xcv_type;		\/* transceiver type *\/$/;"	m	struct:__anonf8b8c0fc0508	typeref:typename:xceiver_type
xcv_type	drivers/net/mpc5xxx_fec.h	/^	xceiver_type xcv_type;		\/* transceiver type *\/$/;"	m	struct:__anone13c4dc90308	typeref:typename:xceiver_type
xcvrprg	include/fsl_usb.h	/^	u32	xcvrprg;$/;"	m	struct:ccsr_usb_port_ctrl	typeref:typename:u32
xdcrc	arch/arm/include/asm/arch-armada100/cpu.h	/^	u32 xdcrc;		\/* 0x0DC *\/$/;"	m	struct:armd1apmu_registers	typeref:typename:u32
xdma_event_intr0	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int xdma_event_intr0;$/;"	m	struct:pad_signals	typeref:typename:int
xdma_event_intr1	arch/arm/include/asm/arch-am33xx/mux_am33xx.h	/^	int xdma_event_intr1;$/;"	m	struct:pad_signals	typeref:typename:int
xdma_evt_intr0	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int xdma_evt_intr0;$/;"	m	struct:pad_signals	typeref:typename:int
xdma_evt_intr1	arch/arm/include/asm/arch-am33xx/mux_am43xx.h	/^	int xdma_evt_intr1;$/;"	m	struct:pad_signals	typeref:typename:int
xds	arch/x86/include/asm/ptrace.h	/^	int  xds;$/;"	m	struct:pt_regs	typeref:typename:int
xds	arch/x86/include/asm/ptrace.h	/^	long xds;$/;"	m	struct:irq_regs	typeref:typename:long
xemaclite	drivers/net/xilinx_emaclite.c	/^struct xemaclite {$/;"	s	file:
xemaclite_alignedread	drivers/net/xilinx_emaclite.c	/^static void xemaclite_alignedread(u32 *srcptr, void *destptr, u32 bytecount)$/;"	f	typeref:typename:void	file:
xemaclite_alignedwrite	drivers/net/xilinx_emaclite.c	/^static void xemaclite_alignedwrite(void *srcptr, u32 *destptr, u32 bytecount)$/;"	f	typeref:typename:void	file:
xemaclite_txbufferavailable	drivers/net/xilinx_emaclite.c	/^static int xemaclite_txbufferavailable(struct xemaclite *emaclite)$/;"	f	typeref:typename:int	file:
xent_key_init	fs/ubifs/key.h	/^static inline void xent_key_init(const struct ubifs_info *c,$/;"	f	typeref:typename:void
xent_key_init_flash	fs/ubifs/key.h	/^static inline void xent_key_init_flash(const struct ubifs_info *c, void *k,$/;"	f	typeref:typename:void
xer	arch/powerpc/include/asm/ptrace.h	/^	PPC_REG xer;$/;"	m	struct:pt_regs	typeref:typename:PPC_REG
xer	post/lib_powerpc/cr.c	/^    ulong xer;$/;"	m	struct:cpu_post_cr_s2	typeref:typename:ulong	file:
xes	arch/x86/include/asm/ptrace.h	/^	int  xes;$/;"	m	struct:pt_regs	typeref:typename:int
xes	arch/x86/include/asm/ptrace.h	/^	long xes;$/;"	m	struct:irq_regs	typeref:typename:long
xfer	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	struct cmd_i2c_xfer_request xfer;$/;"	m	struct:mrq_i2c_request	typeref:struct:cmd_i2c_xfer_request
xfer	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	struct cmd_i2c_xfer_response xfer;$/;"	m	struct:mrq_i2c_response	typeref:struct:cmd_i2c_xfer_response
xfer	arch/sandbox/include/asm/spi.h	/^	int (*xfer)(void *priv, const u8 *rx, u8 *tx, uint bytes);$/;"	m	struct:sandbox_spi_emu_ops	typeref:typename:int (*)(void * priv,const u8 * rx,u8 * tx,uint bytes)
xfer	include/i2c.h	/^	int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);$/;"	m	struct:dm_i2c_ops	typeref:typename:int (*)(struct udevice * bus,struct i2c_msg * msg,int nmsgs)
xfer	include/spi.h	/^	int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,$/;"	m	struct:dm_spi_ops	typeref:typename:int (*)(struct udevice * dev,unsigned int bitlen,const void * dout,void * din,unsigned long flags)
xfer	include/spi.h	/^	int (*xfer)(struct udevice *slave, unsigned int bitlen,$/;"	m	struct:dm_spi_emul_ops	typeref:typename:int (*)(struct udevice * slave,unsigned int bitlen,const void * dout,void * din,unsigned long flags)
xfer	include/tpm.h	/^	int (*xfer)(struct udevice *dev, const uint8_t *sendbuf,$/;"	m	struct:tpm_ops	typeref:typename:int (*)(struct udevice * dev,const uint8_t * sendbuf,size_t send_size,uint8_t * recvbuf,size_t * recv_size)
xfer_mode	drivers/block/sata_dwc.h	/^	u8			xfer_mode;$/;"	m	struct:ata_device	typeref:typename:u8
xfer_shift	drivers/block/sata_dwc.h	/^	unsigned int		xfer_shift;$/;"	m	struct:ata_device	typeref:typename:unsigned int
xfer_status	drivers/spi/tegra114_spi.c	/^	u32 xfer_status;\/* 010:SPI_TRANS_STATUS register *\/$/;"	m	struct:spi_regs	typeref:typename:u32	file:
xfer_status	drivers/spi/tegra210_qspi.c	/^	u32 xfer_status;\/* 010:QSPI_TRANS_STATUS register *\/$/;"	m	struct:qspi_regs	typeref:typename:u32	file:
xfercfg	drivers/ddr/microchip/ddr2_regs.h	/^	u32 xfercfg;$/;"	m	struct:ddr2_ctrl_regs	typeref:typename:u32
xfertyp	drivers/mmc/fsl_esdhc.c	/^	uint    xfertyp;	\/* Transfer type register *\/$/;"	m	struct:fsl_esdhc	typeref:typename:uint	file:
xfgets	scripts/kconfig/conf.c	/^void xfgets(char *str, int size, FILE *in)$/;"	f	typeref:typename:void
xfi	arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h	/^	} xfi[2];	\/* Lane A, B *\/$/;"	m	struct:ccsr_serdes	typeref:struct:ccsr_serdes::__anon245f04be0a08[2]
xfi3_mmc_cd	board/creative/xfi3/xfi3.c	/^static int xfi3_mmc_cd(int id)$/;"	f	typeref:typename:int	file:
xfi3_mmc_cd	board/sandisk/sansa_fuze_plus/sfp.c	/^static int xfi3_mmc_cd(int id)$/;"	f	typeref:typename:int	file:
xfi_dpmac	arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c	/^int xfi_dpmac[XFI8 + 1];$/;"	v	typeref:typename:int[]
xflag	tools/imagetool.h	/^	int xflag;$/;"	m	struct:image_tool_params	typeref:typename:int
xflags	include/u-boot/zlib.h	/^	int	xflags;	\/* extra flags (not used when writing a gzip file) *\/$/;"	m	struct:gz_header_s	typeref:typename:int
xfrcnt	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 xfrcnt;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
xfs	arch/x86/include/asm/ptrace.h	/^	int  xfs;$/;"	m	struct:pt_regs	typeref:typename:int
xfs	arch/x86/include/asm/ptrace.h	/^	long xfs;$/;"	m	struct:irq_regs	typeref:typename:long
xfwrite	scripts/kconfig/lkc.h	/^static inline void xfwrite(const void *str, size_t len, size_t count, FILE *out)$/;"	f	typeref:typename:void
xg_int	board/keymile/common/common.h	/^	u8	xg_int;$/;"	m	struct:bfticu_iomap	typeref:typename:u8
xglob	common/cli_hush.c	/^static int xglob(o_string *dest, int flags, glob_t *pglob)$/;"	f	typeref:typename:int	file:
xgmac_dma_desc	drivers/net/calxedaxgmac.c	/^struct xgmac_dma_desc {$/;"	s	file:
xgmac_halt	drivers/net/calxedaxgmac.c	/^static void xgmac_halt(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
xgmac_hwmacaddr	drivers/net/calxedaxgmac.c	/^static void xgmac_hwmacaddr(struct eth_device *dev)$/;"	f	typeref:typename:void	file:
xgmac_init	drivers/net/calxedaxgmac.c	/^static int xgmac_init(struct eth_device *dev, bd_t * bis)$/;"	f	typeref:typename:int	file:
xgmac_regs	drivers/net/calxedaxgmac.c	/^struct xgmac_regs {$/;"	s	file:
xgmac_reset	drivers/net/calxedaxgmac.c	/^static int xgmac_reset(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
xgmac_rx	drivers/net/calxedaxgmac.c	/^static int xgmac_rx(struct eth_device *dev)$/;"	f	typeref:typename:int	file:
xgmac_tx	drivers/net/calxedaxgmac.c	/^static int xgmac_tx(struct eth_device *dev, void *packet, int length)$/;"	f	typeref:typename:int	file:
xgs	arch/x86/include/asm/ptrace.h	/^	int  xgs;$/;"	m	struct:pt_regs	typeref:typename:int
xgs	arch/x86/include/asm/ptrace.h	/^	long xgs;$/;"	m	struct:irq_regs	typeref:typename:long
xh	arch/arm/lib/div64.S	/^#define xh /;"	d	file:
xh	arch/arm/lib/muldi3.S	/^#define xh /;"	d	file:
xhci	drivers/usb/dwc3/core.h	/^	struct platform_device	*xhci;$/;"	m	struct:dwc3	typeref:struct:platform_device *
xhci	drivers/usb/host/xhci-fsl.c	/^	struct xhci_ctrl xhci;$/;"	m	struct:xhci_fsl_priv	typeref:struct:xhci_ctrl	file:
xhci0	arch/arm/dts/exynos5.dtsi	/^	xhci0: xhci@12000000 {$/;"	l
xhci1	arch/arm/dts/exynos5420-smdk5420.dts	/^	xhci1: xhci@12400000 {$/;"	l
xhci1	arch/arm/dts/exynos54xx.dtsi	/^	xhci1: xhci@12400000 {$/;"	l
xhci_acknowledge_event	drivers/usb/host/xhci-ring.c	/^void xhci_acknowledge_event(struct xhci_ctrl *ctrl)$/;"	f	typeref:typename:void
xhci_address_device	drivers/usb/host/xhci.c	/^static int xhci_address_device(struct usb_device *udev, int root_portnr)$/;"	f	typeref:typename:int	file:
xhci_alloc_container_ctx	drivers/usb/host/xhci-mem.c	/^		*xhci_alloc_container_ctx(struct xhci_ctrl *ctrl, int type)$/;"	f	typeref:struct:xhci_container_ctx *	file:
xhci_alloc_device	drivers/usb/host/xhci.c	/^static int xhci_alloc_device(struct udevice *dev, struct usb_device *udev)$/;"	f	typeref:typename:int	file:
xhci_alloc_virt_device	drivers/usb/host/xhci-mem.c	/^int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id)$/;"	f	typeref:typename:int
xhci_bulk_tx	drivers/usb/host/xhci-ring.c	/^int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int
xhci_check_maxpacket	drivers/usb/host/xhci.c	/^int xhci_check_maxpacket(struct usb_device *udev)$/;"	f	typeref:typename:int
xhci_cleanup	drivers/usb/host/xhci-mem.c	/^void xhci_cleanup(struct xhci_ctrl *ctrl)$/;"	f	typeref:typename:void
xhci_clear_port_change_bit	drivers/usb/host/xhci.c	/^static void xhci_clear_port_change_bit(u16 wValue,$/;"	f	typeref:typename:void	file:
xhci_comp_code	drivers/usb/host/xhci.h	/^} xhci_comp_code;$/;"	t	typeref:enum:__anonfefbfedb0103
xhci_configure_endpoints	drivers/usb/host/xhci.c	/^static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change)$/;"	f	typeref:typename:int	file:
xhci_container_ctx	drivers/usb/host/xhci.h	/^struct xhci_container_ctx {$/;"	s
xhci_ctrl	drivers/usb/host/xhci.h	/^struct xhci_ctrl {$/;"	s
xhci_ctrl_tx	drivers/usb/host/xhci-ring.c	/^int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int
xhci_deregister	drivers/usb/host/xhci.c	/^int xhci_deregister(struct udevice *dev)$/;"	f	typeref:typename:int
xhci_device_context_array	drivers/usb/host/xhci.h	/^struct xhci_device_context_array {$/;"	s
xhci_doorbell_array	drivers/usb/host/xhci.h	/^struct xhci_doorbell_array {$/;"	s
xhci_endpoint_copy	drivers/usb/host/xhci-mem.c	/^void xhci_endpoint_copy(struct xhci_ctrl *ctrl,$/;"	f	typeref:typename:void
xhci_ep_ctx	drivers/usb/host/xhci.h	/^struct xhci_ep_ctx {$/;"	s
xhci_erst	drivers/usb/host/xhci.h	/^struct xhci_erst {$/;"	s
xhci_erst_entry	drivers/usb/host/xhci.h	/^struct xhci_erst_entry {$/;"	s
xhci_event_cmd	drivers/usb/host/xhci.h	/^struct xhci_event_cmd {$/;"	s
xhci_flush_cache	drivers/usb/host/xhci-mem.c	/^void xhci_flush_cache(uintptr_t addr, u32 len)$/;"	f	typeref:typename:void
xhci_free_container_ctx	drivers/usb/host/xhci-mem.c	/^static void xhci_free_container_ctx(struct xhci_container_ctx *ctx)$/;"	f	typeref:typename:void	file:
xhci_free_virt_devices	drivers/usb/host/xhci-mem.c	/^static void xhci_free_virt_devices(struct xhci_ctrl *ctrl)$/;"	f	typeref:typename:void	file:
xhci_fsl_priv	drivers/usb/host/xhci-fsl.c	/^struct xhci_fsl_priv {$/;"	s	file:
xhci_fsl_probe	drivers/usb/host/xhci-fsl.c	/^static int xhci_fsl_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_fsl_remove	drivers/usb/host/xhci-fsl.c	/^static int xhci_fsl_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_generic_trb	drivers/usb/host/xhci.h	/^struct xhci_generic_trb {$/;"	s
xhci_get_ctrl	drivers/usb/host/xhci.c	/^struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev)$/;"	f	typeref:struct:xhci_ctrl *
xhci_get_ep_ctx	drivers/usb/host/xhci-mem.c	/^struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_ctrl *ctrl,$/;"	f	typeref:struct:xhci_ep_ctx *
xhci_get_ep_index	drivers/usb/host/xhci.c	/^static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)$/;"	f	typeref:typename:unsigned int	file:
xhci_get_input_control_ctx	drivers/usb/host/xhci-mem.c	/^		*xhci_get_input_control_ctx(struct xhci_container_ctx *ctx)$/;"	f	typeref:struct:xhci_input_control_ctx *
xhci_get_slot_ctx	drivers/usb/host/xhci-mem.c	/^struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_ctrl *ctrl,$/;"	f	typeref:struct:xhci_slot_ctx *
xhci_hccr	drivers/usb/host/xhci.h	/^struct xhci_hccr {$/;"	s
xhci_hcd_init	drivers/usb/host/xhci-fsl.c	/^int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)$/;"	f	typeref:typename:int
xhci_hcd_init	drivers/usb/host/xhci-keystone.c	/^int xhci_hcd_init(int index,$/;"	f	typeref:typename:int
xhci_hcd_init	drivers/usb/host/xhci-omap.c	/^int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)$/;"	f	typeref:typename:int
xhci_hcd_init	drivers/usb/host/xhci-pci.c	/^int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,$/;"	f	typeref:typename:int
xhci_hcd_init	drivers/usb/host/xhci-zynqmp.c	/^int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)$/;"	f	typeref:typename:int
xhci_hcd_stop	drivers/usb/host/xhci-fsl.c	/^void xhci_hcd_stop(int index)$/;"	f	typeref:typename:void
xhci_hcd_stop	drivers/usb/host/xhci-keystone.c	/^void xhci_hcd_stop(int index)$/;"	f	typeref:typename:void
xhci_hcd_stop	drivers/usb/host/xhci-omap.c	/^void xhci_hcd_stop(int index)$/;"	f	typeref:typename:void
xhci_hcd_stop	drivers/usb/host/xhci-pci.c	/^void xhci_hcd_stop(int index)$/;"	f	typeref:typename:void
xhci_hcd_stop	drivers/usb/host/xhci-zynqmp.c	/^void xhci_hcd_stop(int index)$/;"	f	typeref:typename:void
xhci_hcor	drivers/usb/host/xhci.h	/^struct xhci_hcor {$/;"	s
xhci_hcor_port_regs	drivers/usb/host/xhci.h	/^struct xhci_hcor_port_regs {$/;"	s
xhci_initialize_ring_info	drivers/usb/host/xhci-mem.c	/^static void xhci_initialize_ring_info(struct xhci_ring *ring)$/;"	f	typeref:typename:void	file:
xhci_input_control_ctx	drivers/usb/host/xhci.h	/^struct xhci_input_control_ctx {$/;"	s
xhci_intr_reg	drivers/usb/host/xhci.h	/^struct xhci_intr_reg {$/;"	s
xhci_inval_cache	drivers/usb/host/xhci-mem.c	/^void xhci_inval_cache(uintptr_t addr, u32 len)$/;"	f	typeref:typename:void
xhci_link_segments	drivers/usb/host/xhci-mem.c	/^static void xhci_link_segments(struct xhci_segment *prev,$/;"	f	typeref:typename:void	file:
xhci_link_trb	drivers/usb/host/xhci.h	/^struct xhci_link_trb {$/;"	s
xhci_lowlevel_init	drivers/usb/host/xhci.c	/^static int xhci_lowlevel_init(struct xhci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
xhci_lowlevel_stop	drivers/usb/host/xhci.c	/^static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl)$/;"	f	typeref:typename:int	file:
xhci_malloc	drivers/usb/host/xhci-mem.c	/^static void *xhci_malloc(unsigned int size)$/;"	f	typeref:typename:void *	file:
xhci_mem_init	drivers/usb/host/xhci-mem.c	/^int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,$/;"	f	typeref:typename:int
xhci_port_state_to_neutral	drivers/usb/host/xhci.c	/^static u32 xhci_port_state_to_neutral(u32 state)$/;"	f	typeref:typename:u32	file:
xhci_protocol_caps	drivers/usb/host/xhci.h	/^struct xhci_protocol_caps {$/;"	s
xhci_queue_command	drivers/usb/host/xhci-ring.c	/^void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id,$/;"	f	typeref:typename:void
xhci_readl	drivers/usb/host/xhci.h	/^static inline unsigned int xhci_readl(uint32_t volatile *regs)$/;"	f	typeref:typename:unsigned int
xhci_readq	drivers/usb/host/xhci.h	/^static inline u64 xhci_readq(__le64 volatile *regs)$/;"	f	typeref:typename:u64
xhci_register	drivers/usb/host/xhci.c	/^int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,$/;"	f	typeref:typename:int
xhci_reset	drivers/usb/host/xhci.c	/^int xhci_reset(struct xhci_hcor *hcor)$/;"	f	typeref:typename:int
xhci_resources	drivers/usb/dwc3/core.h	/^	struct resource		xhci_resources[DWC3_XHCI_RESOURCES_NUM];$/;"	m	struct:dwc3	typeref:struct:resource[]
xhci_ring	drivers/usb/host/xhci.h	/^struct xhci_ring {$/;"	s
xhci_ring_alloc	drivers/usb/host/xhci-mem.c	/^struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs)$/;"	f	typeref:struct:xhci_ring *
xhci_ring_free	drivers/usb/host/xhci-mem.c	/^static void xhci_ring_free(struct xhci_ring *ring)$/;"	f	typeref:typename:void	file:
xhci_run_regs	drivers/usb/host/xhci.h	/^struct xhci_run_regs {$/;"	s
xhci_segment	drivers/usb/host/xhci.h	/^struct xhci_segment {$/;"	s
xhci_segment_alloc	drivers/usb/host/xhci-mem.c	/^static struct xhci_segment *xhci_segment_alloc(void)$/;"	f	typeref:struct:xhci_segment *	file:
xhci_segment_free	drivers/usb/host/xhci-mem.c	/^static void xhci_segment_free(struct xhci_segment *seg)$/;"	f	typeref:typename:void	file:
xhci_set_configuration	drivers/usb/host/xhci.c	/^static int xhci_set_configuration(struct usb_device *udev)$/;"	f	typeref:typename:int	file:
xhci_setup_addressable_virt_dev	drivers/usb/host/xhci-mem.c	/^void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, int slot_id,$/;"	f	typeref:typename:void
xhci_slot_copy	drivers/usb/host/xhci-mem.c	/^void xhci_slot_copy(struct xhci_ctrl *ctrl, struct xhci_container_ctx *in_ctx,$/;"	f	typeref:typename:void
xhci_slot_ctx	drivers/usb/host/xhci.h	/^struct xhci_slot_ctx {$/;"	s
xhci_start	drivers/usb/host/xhci.c	/^static int xhci_start(struct xhci_hcor *hcor)$/;"	f	typeref:typename:int	file:
xhci_streams	arch/x86/include/asm/arch-ivybridge/pei_data.h	/^	uint16_t xhci_streams;$/;"	m	struct:pch_usb3_controller_settings	typeref:typename:uint16_t
xhci_submit_bulk_msg	drivers/usb/host/xhci.c	/^static int xhci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
xhci_submit_control_msg	drivers/usb/host/xhci.c	/^static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
xhci_submit_int_msg	drivers/usb/host/xhci.c	/^static int xhci_submit_int_msg(struct udevice *dev, struct usb_device *udev,$/;"	f	typeref:typename:int	file:
xhci_submit_root	drivers/usb/host/xhci.c	/^static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,$/;"	f	typeref:typename:int	file:
xhci_td_remainder	drivers/usb/host/xhci-ring.c	/^static u32 xhci_td_remainder(unsigned int remainder)$/;"	f	typeref:typename:u32	file:
xhci_transfer_event	drivers/usb/host/xhci.h	/^struct xhci_transfer_event {$/;"	s
xhci_trb	drivers/usb/host/xhci.h	/^union xhci_trb {$/;"	u
xhci_usb_ids	drivers/usb/host/xhci-exynos5.c	/^static const struct udevice_id xhci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
xhci_usb_ids	drivers/usb/host/xhci-fsl.c	/^static const struct udevice_id xhci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
xhci_usb_ids	drivers/usb/host/xhci-mvebu.c	/^static const struct udevice_id xhci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
xhci_usb_ids	drivers/usb/host/xhci-rockchip.c	/^static const struct udevice_id xhci_usb_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
xhci_usb_ofdata_to_platdata	drivers/usb/host/xhci-exynos5.c	/^static int xhci_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_ofdata_to_platdata	drivers/usb/host/xhci-mvebu.c	/^static int xhci_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_ofdata_to_platdata	drivers/usb/host/xhci-rockchip.c	/^static int xhci_usb_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_ops	drivers/usb/host/xhci.c	/^struct dm_usb_ops xhci_usb_ops = {$/;"	v	typeref:struct:dm_usb_ops
xhci_usb_probe	drivers/usb/host/xhci-exynos5.c	/^static int xhci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_probe	drivers/usb/host/xhci-mvebu.c	/^static int xhci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_probe	drivers/usb/host/xhci-rockchip.c	/^static int xhci_usb_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_remove	drivers/usb/host/xhci-exynos5.c	/^static int xhci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_usb_remove	drivers/usb/host/xhci-rockchip.c	/^static int xhci_usb_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xhci_v1_0_td_remainder	drivers/usb/host/xhci-ring.c	/^static u32 xhci_v1_0_td_remainder(int running_total,$/;"	f	typeref:typename:u32	file:
xhci_virt_device	drivers/usb/host/xhci.h	/^struct xhci_virt_device {$/;"	s
xhci_virt_ep	drivers/usb/host/xhci.h	/^struct xhci_virt_ep {$/;"	s
xhci_wait_for_event	drivers/usb/host/xhci-ring.c	/^union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected)$/;"	f	typeref:union:xhci_trb *
xhci_writel	drivers/usb/host/xhci.h	/^static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val)$/;"	f	typeref:typename:void
xhci_writeq	drivers/usb/host/xhci.h	/^static inline void xhci_writeq(__le64 volatile *regs, const u64 val)$/;"	f	typeref:typename:void
xhcibar	arch/x86/include/asm/arch-broadwell/pei_data.h	/^	uint32_t xhcibar;$/;"	m	struct:pei_data	typeref:typename:uint32_t
xhcic	drivers/usb/host/xhci.c	/^static struct xhci_ctrl xhcic[CONFIG_USB_MAX_CONTROLLER_COUNT];$/;"	v	typeref:struct:xhci_ctrl[]	file:
xi_ena	board/keymile/common/common.h	/^	u8	xi_ena;		\/* General defect enable *\/$/;"	m	struct:bfticu_iomap	typeref:typename:u8
xi_tab	include/linux/bch.h	/^	unsigned int   *xi_tab;$/;"	m	struct:bch_control	typeref:typename:unsigned int *
xid	fs/jffs2/summary.h	/^	__u32 xid;		\/* xattr identifier *\/$/;"	m	struct:jffs2_sum_xattr_flash	typeref:typename:__u32
xid	fs/jffs2/summary.h	/^	__u32 xid;$/;"	m	struct:jffs2_sum_xattr_mem	typeref:typename:__u32
xil_printf	board/xilinx/zynqmp/xil_io.h	/^#define xil_printf(/;"	d
xilinx_abort_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_abort_config_fn(int cookie)$/;"	f	typeref:typename:int
xilinx_abort_fn	include/xilinx.h	/^typedef int (*xilinx_abort_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_busy_fn	include/xilinx.h	/^typedef int (*xilinx_busy_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_bwr_fn	include/xilinx.h	/^typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie);$/;"	t	typeref:typename:int (*)(void * buf,size_t len,int flush,int cookie)
xilinx_clk_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_clk_config_fn(int assert_clk, int flush, int cookie)$/;"	f	typeref:typename:int
xilinx_clk_fn	include/xilinx.h	/^typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie);$/;"	t	typeref:typename:int (*)(int assert_clk,int flush,int cookie)
xilinx_cs_fn	include/xilinx.h	/^typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie);$/;"	t	typeref:typename:int (*)(int assert_cs,int flush,int cookie)
xilinx_desc	include/xilinx.h	/^} xilinx_desc;			\/* end, typedef xilinx_desc *\/$/;"	t	typeref:struct:__anon15c234ca0308
xilinx_done_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_done_config_fn(int cookie)$/;"	f	typeref:typename:int
xilinx_done_fn	include/xilinx.h	/^typedef int (*xilinx_done_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_drm	arch/arm/dts/zynqmp.dtsi	/^		xilinx_drm: xilinx_drm {$/;"	l
xilinx_dump	drivers/fpga/xilinx.c	/^int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int
xilinx_err_fn	include/xilinx.h	/^typedef int (*xilinx_err_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_family	include/xilinx.h	/^} xilinx_family;		\/* end, typedef xilinx_family *\/$/;"	t	typeref:enum:__anon15c234ca0203
xilinx_fastwr_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie)$/;"	f	typeref:typename:int
xilinx_fns	board/astro/mcf5373l/fpga.c	/^xilinx_spartan3_slave_serial_fns xilinx_fns = {$/;"	v	typeref:typename:xilinx_spartan3_slave_serial_fns
xilinx_fpga	board/astro/mcf5373l/fpga.c	/^xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {$/;"	v	typeref:typename:xilinx_desc[]
xilinx_fpga_op	include/xilinx.h	/^struct xilinx_fpga_op {$/;"	s
xilinx_gpio_max	drivers/gpio/xilinx_gpio.c	/^static u32 xilinx_gpio_max;$/;"	v	typeref:typename:u32	file:
xilinx_gpio_priv	drivers/gpio/xilinx_gpio.c	/^struct xilinx_gpio_priv {$/;"	s	file:
xilinx_iface	include/xilinx.h	/^} xilinx_iface;			\/* end, typedef xilinx_iface *\/$/;"	t	typeref:enum:__anon15c234ca0103
xilinx_info	drivers/fpga/xilinx.c	/^int xilinx_info(xilinx_desc *desc)$/;"	f	typeref:typename:int
xilinx_init_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_init_config_fn(int cookie)$/;"	f	typeref:typename:int
xilinx_init_fn	include/xilinx.h	/^typedef int (*xilinx_init_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_ll_temac_eth_init	drivers/net/xilinx_ll_temac.c	/^int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,$/;"	f	typeref:typename:int
xilinx_ll_temac_initialize	drivers/net/xilinx_ll_temac.c	/^int xilinx_ll_temac_initialize(bd_t *bis, struct ll_temac_info *devinf)$/;"	f	typeref:typename:int
xilinx_ll_temac_mdio_initialize	drivers/net/xilinx_ll_temac_mdio.c	/^int xilinx_ll_temac_mdio_initialize(bd_t *bis, struct ll_temac_mdio_info *info)$/;"	f	typeref:typename:int
xilinx_load	drivers/fpga/xilinx.c	/^int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int
xilinx_loadfs	drivers/fpga/xilinx.c	/^int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int
xilinx_pcie	drivers/pci/pcie_xilinx.c	/^struct xilinx_pcie {$/;"	s	file:
xilinx_pgm_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_pgm_config_fn(int assert, int flush, int cookie)$/;"	f	typeref:typename:int
xilinx_pgm_fn	include/xilinx.h	/^typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie);$/;"	t	typeref:typename:int (*)(int assert_pgm,int flush,int cookie)
xilinx_pic_irq_get	arch/powerpc/cpu/ppc4xx/xilinx_irq.c	/^int xilinx_pic_irq_get(void)$/;"	f	typeref:typename:int
xilinx_post_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_post_config_fn(int cookie)$/;"	f	typeref:typename:int
xilinx_post_fn	include/xilinx.h	/^typedef int (*xilinx_post_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_pre_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_pre_config_fn(int cookie)$/;"	f	typeref:typename:int
xilinx_pre_fn	include/xilinx.h	/^typedef int (*xilinx_pre_fn)(int cookie);$/;"	t	typeref:typename:int (*)(int cookie)
xilinx_rdata_fn	include/xilinx.h	/^typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie);$/;"	t	typeref:typename:int (*)(unsigned char * data,int cookie)
xilinx_spartan2	include/xilinx.h	/^	xilinx_spartan2,	\/* Spartan-II Family *\/$/;"	e	enum:__anon15c234ca0203
xilinx_spartan2_slave_parallel_fns	include/spartan2.h	/^} xilinx_spartan2_slave_parallel_fns;$/;"	t	typeref:struct:__anon44cdc6d90108
xilinx_spartan2_slave_serial_fns	include/spartan2.h	/^} xilinx_spartan2_slave_serial_fns;$/;"	t	typeref:struct:__anon44cdc6d90208
xilinx_spartan3	include/xilinx.h	/^	xilinx_spartan3,	\/* Spartan-III Family *\/$/;"	e	enum:__anon15c234ca0203
xilinx_spartan3_slave_parallel_fns	include/spartan3.h	/^} xilinx_spartan3_slave_parallel_fns;$/;"	t	typeref:struct:__anon44cdcb1a0108
xilinx_spartan3_slave_serial_fns	include/spartan3.h	/^} xilinx_spartan3_slave_serial_fns;$/;"	t	typeref:struct:__anon44cdcb1a0208
xilinx_spi_base_list	drivers/spi/xilinx_spi.c	/^static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST;$/;"	v	typeref:typename:unsigned long[]	file:
xilinx_spi_claim_bus	drivers/spi/xilinx_spi.c	/^static int xilinx_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xilinx_spi_ids	drivers/spi/xilinx_spi.c	/^static const struct udevice_id xilinx_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
xilinx_spi_ops	drivers/spi/xilinx_spi.c	/^static const struct dm_spi_ops xilinx_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
xilinx_spi_priv	drivers/spi/xilinx_spi.c	/^struct xilinx_spi_priv {$/;"	s	file:
xilinx_spi_probe	drivers/spi/xilinx_spi.c	/^static int xilinx_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
xilinx_spi_regs	drivers/spi/xilinx_spi.c	/^struct xilinx_spi_regs {$/;"	s	file:
xilinx_spi_release_bus	drivers/spi/xilinx_spi.c	/^static int xilinx_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
xilinx_spi_set_mode	drivers/spi/xilinx_spi.c	/^static int xilinx_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
xilinx_spi_set_speed	drivers/spi/xilinx_spi.c	/^static int xilinx_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
xilinx_spi_xfer	drivers/spi/xilinx_spi.c	/^static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
xilinx_validate	drivers/fpga/xilinx.c	/^static int xilinx_validate(xilinx_desc *desc, char *fn)$/;"	f	typeref:typename:int	file:
xilinx_virtex2	include/xilinx.h	/^	xilinx_virtex2,		\/* Virtex2 Family *\/$/;"	e	enum:__anon15c234ca0203
xilinx_virtex2_slave_selectmap_fns	include/virtex2.h	/^} xilinx_virtex2_slave_selectmap_fns;$/;"	t	typeref:struct:__anoncbf344e20108
xilinx_virtex2_slave_serial_fns	include/virtex2.h	/^} xilinx_virtex2_slave_serial_fns;$/;"	t	typeref:struct:__anoncbf344e20208
xilinx_virtexE	include/xilinx.h	/^	xilinx_virtexE,		\/* Virtex-E Family *\/$/;"	e	enum:__anon15c234ca0203
xilinx_wdata_fn	include/xilinx.h	/^typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie);$/;"	t	typeref:typename:int (*)(unsigned char data,int flush,int cookie)
xilinx_wr_config_fn	board/astro/mcf5373l/fpga.c	/^int xilinx_wr_config_fn(int assert_write, int flush, int cookie)$/;"	f	typeref:typename:int
xilinx_wr_fn	include/xilinx.h	/^typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie);$/;"	t	typeref:typename:int (*)(int assert_write,int flush,int cookie)
xilinx_zynq	include/xilinx.h	/^	xilinx_zynq,		\/* Zynq Family *\/$/;"	e	enum:__anon15c234ca0203
xilinx_zynqmp	include/xilinx.h	/^	xilinx_zynqmp,		\/* ZynqMP Family *\/$/;"	e	enum:__anon15c234ca0203
xilinxphy_config	drivers/net/phy/xilinx_phy.c	/^static int xilinxphy_config(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
xilinxphy_driver	drivers/net/phy/xilinx_phy.c	/^static struct phy_driver xilinxphy_driver = {$/;"	v	typeref:struct:phy_driver	file:
xilinxphy_of_init	drivers/net/phy/xilinx_phy.c	/^static int xilinxphy_of_init(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
xilinxphy_startup	drivers/net/phy/xilinx_phy.c	/^static int xilinxphy_startup(struct phy_device *phydev)$/;"	f	typeref:typename:int	file:
xin24m	arch/arm/dts/rk3036.dtsi	/^	xin24m: oscillator {$/;"	l
xin24m	arch/arm/dts/rk3288.dtsi	/^	xin24m: oscillator {$/;"	l
xin24m	arch/arm/dts/rk3399.dtsi	/^	xin24m: xin24m {$/;"	l
xio	arch/arm/dts/sun5i-r8-chip.dts	/^	xio: gpio@38 {$/;"	l
xl	arch/arm/lib/div64.S	/^#define xl /;"	d	file:
xl	arch/arm/lib/muldi3.S	/^#define xl /;"	d	file:
xlate	drivers/input/input.c	/^	const uchar *xlate;	\/* Ascii code for each keycode *\/$/;"	m	struct:kbd_entry	typeref:typename:const uchar *	file:
xlate	include/asm-generic/gpio.h	/^	int (*xlate)(struct udevice *dev, struct gpio_desc *desc,$/;"	m	struct:dm_gpio_ops	typeref:typename:int (*)(struct udevice * dev,struct gpio_desc * desc,struct fdtdec_phandle_args * args)
xlate	include/input.h	/^	const uchar *xlate;	\/* keycode to ASCII table *\/$/;"	m	struct:input_key_xlate	typeref:typename:const uchar *
xlate_dev_kmem_ptr	arch/openrisc/include/asm/io.h	/^#define xlate_dev_kmem_ptr(/;"	d
xlate_dev_kmem_ptr	arch/xtensa/include/asm/io.h	/^#define xlate_dev_kmem_ptr(/;"	d
xlate_dev_mem_ptr	arch/openrisc/include/asm/io.h	/^#define xlate_dev_mem_ptr(/;"	d
xlate_dev_mem_ptr	arch/xtensa/include/asm/io.h	/^#define xlate_dev_mem_ptr(/;"	d
xlb_arb	arch/m68k/include/asm/immap_547x_8x.h	/^typedef struct xlb_arb {$/;"	s
xlbarb_t	arch/m68k/include/asm/immap_547x_8x.h	/^} xlbarb_t;$/;"	t	typeref:struct:xlb_arb
xlnx_dp	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dp: dp@fd4a0000 {$/;"	l
xlnx_dp_snd_card	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dp_snd_card: dp_snd_card {$/;"	l
xlnx_dp_snd_codec0	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dp_snd_codec0: dp_snd_codec0 {$/;"	l
xlnx_dp_snd_pcm0	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dp_snd_pcm0: dp_snd_pcm0 {$/;"	l
xlnx_dp_snd_pcm1	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dp_snd_pcm1: dp_snd_pcm1 {$/;"	l
xlnx_dp_sub	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dp_sub: dp_sub@fd4aa000 {$/;"	l
xlnx_dpdma	arch/arm/dts/zynqmp.dtsi	/^		xlnx_dpdma: dma@fd4c0000 {$/;"	l
xm2cfga	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	xm2cfga;	\/* 0xC4: APB_MISC_GP_XM2CFGAPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xm2cfga_reg	arch/arm/mach-tegra/tegra20/warmboot.c	/^union xm2cfga_reg {$/;"	u	file:
xm2cfgc	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	xm2cfgc;	\/* 0xC8: APB_MISC_GP_XM2CFGCPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xm2cfgd	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	xm2cfgd;	\/* 0xCC: APB_MISC_GP_XM2CFGDPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xm2cfgd_reg	arch/arm/mach-tegra/tegra20/warmboot.c	/^union xm2cfgd_reg {$/;"	u	file:
xm2clkcfg	arch/arm/include/asm/arch-tegra20/gp_padctrl.h	/^	u32	xm2clkcfg;	\/* 0xD0: APB_MISC_GP_XM2CLKCFGPADCTRL *\/$/;"	m	struct:apb_misc_gp_ctlr	typeref:typename:u32
xm_pg	drivers/net/ftmac100.h	/^	unsigned int	xm_pg;		\/* 0xdc *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
xmalloc	common/cli_hush.c	/^static void *xmalloc(size_t size)$/;"	f	typeref:typename:void *	file:
xmalloc	scripts/kconfig/util.c	/^void *xmalloc(size_t size)$/;"	f	typeref:typename:void *
xmalloc	tools/easylogo/easylogo.c	/^void *xmalloc (size_t size)$/;"	f	typeref:typename:void *
xmit_fsm	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 xmit_fsm;		\/* MBAR_ETH + 0x1C8 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
xml_escape	scripts/kernel-doc	/^sub xml_escape($) {$/;"	s
xmldocs	doc/DocBook/Makefile	/^xmldocs: $(BOOKS)$/;"	t
xmltotemplate	doc/DocBook/Makefile	/^xmltotemplate = xmlto TYPE $(XMLTOFLAGS) -o $(dir $@) $<$/;"	m
xobp	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 xobp:1;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:1
xods	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 xods:5;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:5
xoe	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 xoe:1;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:1
xoff	drivers/video/stb_truetype.h	/^   float xoff,yoff,xadvance;$/;"	m	struct:__anonce392f790108	typeref:typename:float
xoff	drivers/video/stb_truetype.h	/^   float xoff,yoff,xadvance;$/;"	m	struct:__anonce392f790308	typeref:typename:float
xoff2	drivers/video/stb_truetype.h	/^   float xoff2,yoff2;$/;"	m	struct:__anonce392f790308	typeref:typename:float
xoffrxc	drivers/net/e1000.h	/^	uint64_t xoffrxc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
xoffset	include/linux/fb.h	/^	__u32 xoffset;			\/* offset from virtual to visible *\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
xofftxc	drivers/net/e1000.h	/^	uint64_t xofftxc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
xofs	arch/arm/include/asm/arch-tegra/warmboot.h	/^		u32 xofs:6;$/;"	m	struct:osc_ctrl_reg::__anonf37f1db20208	typeref:typename:u32:6
xonrxc	drivers/net/e1000.h	/^	uint64_t xonrxc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
xontxc	drivers/net/e1000.h	/^	uint64_t xontxc;$/;"	m	struct:e1000_hw_stats	typeref:typename:uint64_t
xor_base_save	arch/arm/mach-mvebu/dram.c	/^static u32 xor_base_save;$/;"	v	typeref:typename:u32	file:
xor_byte	drivers/bios_emulator/x86emu/prim_ops.c	/^u8 xor_byte(u8 d, u8 s)$/;"	f	typeref:typename:u8
xor_channel_t	drivers/ddr/marvell/axp/ddr3_sdram.c	/^struct xor_channel_t {$/;"	s	file:
xor_ctrl_save	arch/arm/mach-mvebu/dram.c	/^static u32 xor_ctrl_save;$/;"	v	typeref:typename:u32	file:
xor_long	drivers/bios_emulator/x86emu/prim_ops.c	/^u32 xor_long(u32 d, u32 s)$/;"	f	typeref:typename:u32
xor_mask_save	arch/arm/mach-mvebu/dram.c	/^static u32 xor_mask_save;$/;"	v	typeref:typename:u32	file:
xor_override_target	drivers/ddr/marvell/a38x/xor.h	/^enum xor_override_target {$/;"	g
xor_regs_base_backup	drivers/ddr/marvell/axp/xor.c	/^static u32 xor_regs_base_backup[MAX_CS];$/;"	v	typeref:typename:u32[]	file:
xor_regs_ctrl_backup	drivers/ddr/marvell/axp/xor.c	/^static u32 xor_regs_ctrl_backup;$/;"	v	typeref:typename:u32	file:
xor_regs_mask_backup	drivers/ddr/marvell/axp/xor.c	/^static u32 xor_regs_mask_backup[MAX_CS];$/;"	v	typeref:typename:u32[]	file:
xor_type	drivers/ddr/marvell/a38x/xor.h	/^enum xor_type {$/;"	g
xor_type	drivers/ddr/marvell/axp/xor.h	/^enum xor_type {$/;"	g
xor_waiton_eng	drivers/ddr/marvell/axp/ddr3_sdram.c	/^void xor_waiton_eng(int chan)$/;"	f	typeref:typename:void
xor_word	drivers/bios_emulator/x86emu/prim_ops.c	/^u16 xor_word(u16 d, u16 s)$/;"	f	typeref:typename:u16
xorl	drivers/bios_emulator/x86emu/ops2.c	/^#define xorl(/;"	d	file:
xp	drivers/net/ftmac100.h	/^	unsigned int	xp;		\/* 0xf8 *\/$/;"	m	struct:ftmac100	typeref:typename:unsigned int
xpanstep	include/linux/fb.h	/^	__u16 xpanstep;			\/* zero if no hardware panning	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u16
xpm_back	scripts/kconfig/images.c	/^static const char *xpm_back[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_choice_no	scripts/kconfig/images.c	/^static const char *xpm_choice_no[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_choice_yes	scripts/kconfig/images.c	/^static const char *xpm_choice_yes[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_load	scripts/kconfig/images.c	/^static const char *xpm_load[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_menu	scripts/kconfig/images.c	/^static const char *xpm_menu[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_menu_inv	scripts/kconfig/images.c	/^static const char *xpm_menu_inv[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_menuback	scripts/kconfig/images.c	/^static const char *xpm_menuback[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_save	scripts/kconfig/images.c	/^static const char *xpm_save[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_single_view	scripts/kconfig/images.c	/^static const char *xpm_single_view[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_split_view	scripts/kconfig/images.c	/^static const char *xpm_split_view[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_symbol_mod	scripts/kconfig/images.c	/^static const char *xpm_symbol_mod[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_symbol_no	scripts/kconfig/images.c	/^static const char *xpm_symbol_no[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_symbol_yes	scripts/kconfig/images.c	/^static const char *xpm_symbol_yes[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_tree_view	scripts/kconfig/images.c	/^static const char *xpm_tree_view[] = {$/;"	v	typeref:typename:const char * []	file:
xpm_void	scripts/kconfig/images.c	/^static const char *xpm_void[] = {$/;"	v	typeref:typename:const char * []	file:
xpos_frac	drivers/video/console_truetype.c	/^	int xpos_frac;$/;"	m	struct:pos_info	typeref:typename:int	file:
xprs	include/linux/edd.h	/^		} __attribute__ ((packed)) xprs;$/;"	m	union:edd_device_params::__anon8a8b619a010a	typeref:struct:edd_device_params::__anon8a8b619a010a::__anon8a8b619a0508
xqsgii_riser_phy_addr	board/freescale/ls2080aqds/eth.c	/^static int xqsgii_riser_phy_addr[] = {$/;"	v	typeref:typename:int[]	file:
xr3pci_init	board/armltd/vexpress64/pcie.c	/^void xr3pci_init(void)$/;"	f	typeref:typename:void
xr3pci_set_atr_entry	board/armltd/vexpress64/pcie.c	/^void xr3pci_set_atr_entry(unsigned long base, unsigned long src_addr,$/;"	f	typeref:typename:void
xr3pci_setup_atr	board/armltd/vexpress64/pcie.c	/^void xr3pci_setup_atr(void)$/;"	f	typeref:typename:void
xrealloc	common/cli_hush.c	/^static void *xrealloc(void *ptr, size_t size)$/;"	f	typeref:typename:void *	file:
xreg	drivers/video/ct69000.c	/^static CT_CFG_TABLE xreg[] = {$/;"	v	typeref:typename:CT_CFG_TABLE[]	file:
xres	board/teejet/mt_ventoux/mt_ventoux.c	/^	u32 xres;$/;"	m	struct:__anon67535ffe0108	typeref:typename:u32	file:
xres	drivers/video/videomodes.h	/^	int xres;		\/* visible resolution		*\/$/;"	m	struct:ctfb_res_modes	typeref:typename:int
xres	include/dm/test.h	/^	int xres;$/;"	m	struct:sandbox_sdl_plat	typeref:typename:int
xres	include/linux/fb.h	/^	__u32 xres;			\/* visible resolution		*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
xres	include/linux/fb.h	/^	u32 xres;$/;"	m	struct:fb_videomode	typeref:typename:u32
xres_virtual	include/linux/fb.h	/^	__u32 xres_virtual;		\/* virtual resolution		*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
xresolution	include/edid.h	/^		unsigned char xresolution;$/;"	m	struct:edid1_info::__anon4a0dc0440308	typeref:typename:unsigned char
xrq_events	arch/arm/include/asm/arch-tegra114/flow.h	/^	u32 xrq_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
xrq_events	arch/arm/include/asm/arch-tegra124/flow.h	/^	u32 xrq_events;		\/* offset 0x10 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
xrq_events	arch/arm/include/asm/arch-tegra210/flow.h	/^	u32 xrq_events;		\/* offset 0x10 *\/$/;"	m	struct:flow_ctlr	typeref:typename:u32
xrq_events	arch/arm/include/asm/arch-tegra30/flow.h	/^	u32 xrq_events;$/;"	m	struct:flow_ctlr	typeref:typename:u32
xsb_info	drivers/ddr/marvell/a38x/ddr3_debug.c	/^static struct hws_xsb_info xsb_info[HWS_MAX_DEVICE_NUM];$/;"	v	typeref:struct:hws_xsb_info[]	file:
xsb_test_table	drivers/ddr/marvell/a38x/ddr3_debug.c	/^u32 xsb_test_table[][8] = {$/;"	v	typeref:typename:u32[][8]
xsb_validate_type	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 xsb_validate_type = 0;$/;"	v	typeref:typename:u32
xsb_validation_base_address	drivers/ddr/marvell/a38x/ddr3_training.c	/^u32 xsb_validation_base_address = 0xf000;$/;"	v	typeref:typename:u32
xsdt_address	arch/x86/include/asm/acpi_table.h	/^	u64 xsdt_address;	\/* Physical address of XSDT (64 bits) *\/$/;"	m	struct:acpi_rsdp	typeref:typename:u64
xsize	include/video.h	/^	ushort xsize;$/;"	m	struct:video_priv	typeref:typename:ushort
xsize_frac	include/video_console.h	/^	int xsize_frac;$/;"	m	struct:vidconsole_priv	typeref:typename:int
xss	arch/x86/include/asm/ptrace.h	/^	int  xss;$/;"	m	struct:pt_regs	typeref:typename:int
xss	arch/x86/include/asm/ptrace.h	/^	long xss;$/;"	m	struct:irq_regs	typeref:typename:long
xstart_frac	include/video_console.h	/^	int xstart_frac;$/;"	m	struct:vidconsole_priv	typeref:typename:int
xstrdup	common/cli_hush.c	/^#define xstrdup /;"	d	file:
xstrtol	tools/mkenvimage.c	/^long int xstrtol(const char *s)$/;"	f	typeref:typename:long int
xsvfBasicXSDRTDO	board/esd/common/xilinx_jtag/micro.c	/^int xsvfBasicXSDRTDO( unsigned char*    pucTapState,$/;"	f	typeref:typename:int
xsvfCleanup	board/esd/common/xilinx_jtag/micro.c	/^void xsvfCleanup( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:void
xsvfDoIllegalCmd	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoIllegalCmd( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoSDRMasking	board/esd/common/xilinx_jtag/micro.c	/^void xsvfDoSDRMasking( lenVal*  plvTdi,$/;"	f	typeref:typename:void
xsvfDoXCOMMENT	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXCOMMENT( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXCOMPLETE	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXCOMPLETE( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXENDXR	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXENDXR( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXREPEAT	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXREPEAT( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXRUNTEST	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXRUNTEST( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSDR	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSDR( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSDRBCE	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSDRBCE( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSDRINC	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSDRSIZE	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSDRSIZE( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSDRTDO	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSDRTDO( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSDRTDOBCE	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSDRTDOBCE( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSETSDRMASKS	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSETSDRMASKS( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSIR	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSIR( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSIR2	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXSTATE	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXSTATE( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXTDOMASK	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXTDOMASK( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfDoXWAIT	board/esd/common/xilinx_jtag/micro.c	/^int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfExecute	board/esd/common/xilinx_jtag/micro.c	/^int xsvfExecute(void)$/;"	f	typeref:typename:int
xsvfGetAsNumBytes	board/esd/common/xilinx_jtag/micro.c	/^short xsvfGetAsNumBytes( long lNumBits )$/;"	f	typeref:typename:short
xsvfGotoTapState	board/esd/common/xilinx_jtag/micro.c	/^int xsvfGotoTapState( unsigned char*   pucTapState,$/;"	f	typeref:typename:int
xsvfInfoCleanup	board/esd/common/xilinx_jtag/micro.c	/^void xsvfInfoCleanup( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:void
xsvfInfoInit	board/esd/common/xilinx_jtag/micro.c	/^int xsvfInfoInit( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfInitialize	board/esd/common/xilinx_jtag/micro.c	/^int xsvfInitialize( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfPrintLenVal	board/esd/common/xilinx_jtag/micro.c	/^void xsvfPrintLenVal( lenVal *plv )$/;"	f	typeref:typename:void
xsvfRun	board/esd/common/xilinx_jtag/micro.c	/^int xsvfRun( SXsvfInfo* pXsvfInfo )$/;"	f	typeref:typename:int
xsvfShift	board/esd/common/xilinx_jtag/micro.c	/^int xsvfShift( unsigned char*   pucTapState,$/;"	f	typeref:typename:int
xsvfShiftOnly	board/esd/common/xilinx_jtag/micro.c	/^void xsvfShiftOnly( long    lNumBits,$/;"	f	typeref:typename:void
xsvfTmsTransition	board/esd/common/xilinx_jtag/micro.c	/^void xsvfTmsTransition( short sTms )$/;"	f	typeref:typename:void
xsvf_iDebugLevel	board/esd/common/xilinx_jtag/micro.c	/^int xsvf_iDebugLevel;$/;"	v	typeref:typename:int
xsvf_pfDoCmd	board/esd/common/xilinx_jtag/micro.c	/^TXsvfDoCmdFuncPtr   xsvf_pfDoCmd[]  =$/;"	v	typeref:typename:TXsvfDoCmdFuncPtr[]
xsvf_pzCommandName	board/esd/common/xilinx_jtag/micro.c	/^char* xsvf_pzCommandName[]  =$/;"	v	typeref:typename:char * []
xsvf_pzErrorName	board/esd/common/xilinx_jtag/micro.c	/^char*   xsvf_pzErrorName[]  =$/;"	v	typeref:typename:char * []
xsvf_pzTapState	board/esd/common/xilinx_jtag/micro.c	/^char*   xsvf_pzTapState[] =$/;"	v	typeref:typename:char * []
xsvfdata	board/esd/common/xilinx_jtag/micro.c	/^const unsigned char *xsvfdata;$/;"	v	typeref:typename:const unsigned char *
xtal	arch/arm/dts/meson-gxbb.dtsi	/^	xtal: xtal-clk {$/;"	l
xtal	arch/mips/dts/ar933x.dtsi	/^		xtal: xtal {$/;"	l
xtal	arch/mips/dts/ar934x.dtsi	/^		xtal: xtal {$/;"	l
xtal	arch/mips/dts/qca953x.dtsi	/^		xtal: xtal {$/;"	l
xtcntlss	arch/powerpc/include/asm/ppc4xx-i2c.h	/^	u8 xtcntlss;$/;"	m	struct:ppc4xx_i2c	typeref:typename:u8
xtfpga_reset_request	drivers/sysreset/sysreset_xtfpga.c	/^static int xtfpga_reset_request(struct udevice *dev, enum sysreset_t type)$/;"	f	typeref:typename:int	file:
xtfpga_sysreset_ops	drivers/sysreset/sysreset_xtfpga.c	/^static struct sysreset_ops xtfpga_sysreset_ops = {$/;"	v	typeref:struct:sysreset_ops	file:
xtnd_slave_addr	drivers/i2c/mvtwsi.c	/^	u32 xtnd_slave_addr;$/;"	m	struct:mvtwsi_registers	typeref:typename:u32	file:
xusbxti_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xusbxti_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xusbxti_duration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_duration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xusbxti_duration3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_duration3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xusbxti_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xusbxti_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xusbxti_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xusbxti_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xusbxti_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xusbxti_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xv	drivers/video/mx3fb.c	/^	u32	xv:10;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:10	file:
xv	drivers/video/mx3fb.c	/^	u32	xv:10;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:10	file:
xxargs	arch/sparc/include/asm/ptrace.h	/^	unsigned long xxargs[1];$/;"	m	struct:sparc_stackf	typeref:typename:unsigned long[1]
xxti_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_configuration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xxti_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_configuration;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xxti_configuration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_configuration;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
xxti_duration	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_duration;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xxti_duration3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_duration3;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xxti_duration3	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_duration3;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
xxti_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_option;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xxti_option	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_option;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
xxti_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_status;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xxti_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_status;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xxti_status	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_status;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
xxti_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_sys_pwr_reg;$/;"	m	struct:exynos4_power	typeref:typename:unsigned int
xxti_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_sys_pwr_reg;$/;"	m	struct:exynos5420_power	typeref:typename:unsigned int
xxti_sys_pwr_reg	arch/arm/mach-exynos/include/mach/power.h	/^	unsigned int	xxti_sys_pwr_reg;$/;"	m	struct:exynos5_power	typeref:typename:unsigned int
xy_scale	include/gdsys_fpga.h	/^	u16 xy_scale;$/;"	m	struct:ihs_osd	typeref:typename:u16
xy_size	include/gdsys_fpga.h	/^	u16 xy_size;$/;"	m	struct:ihs_osd	typeref:typename:u16
xyz	common/xyzModem.c	/^} xyz;$/;"	v	typeref:struct:__anonf7b88f8b0108
xyzModem_CAN_COUNT	common/xyzModem.c	/^#define xyzModem_CAN_COUNT /;"	d	file:
xyzModem_CHAR_TIMEOUT	common/xyzModem.c	/^#define xyzModem_CHAR_TIMEOUT /;"	d	file:
xyzModem_MAX_RETRIES	common/xyzModem.c	/^#define xyzModem_MAX_RETRIES /;"	d	file:
xyzModem_MAX_RETRIES_WITH_CRC	common/xyzModem.c	/^#define xyzModem_MAX_RETRIES_WITH_CRC /;"	d	file:
xyzModem_abort	include/xyzModem.h	/^#define xyzModem_abort /;"	d
xyzModem_access	include/xyzModem.h	/^#define xyzModem_access /;"	d
xyzModem_cancel	include/xyzModem.h	/^#define xyzModem_cancel /;"	d
xyzModem_cksum	include/xyzModem.h	/^#define xyzModem_cksum /;"	d
xyzModem_close	include/xyzModem.h	/^#define xyzModem_close /;"	d
xyzModem_eof	include/xyzModem.h	/^#define xyzModem_eof /;"	d
xyzModem_error	common/xyzModem.c	/^xyzModem_error (int err)$/;"	f	typeref:typename:char *
xyzModem_flush	common/xyzModem.c	/^xyzModem_flush (void)$/;"	f	typeref:typename:void	file:
xyzModem_frame	include/xyzModem.h	/^#define xyzModem_frame /;"	d
xyzModem_get_hdr	common/xyzModem.c	/^xyzModem_get_hdr (void)$/;"	f	typeref:typename:int	file:
xyzModem_noZmodem	include/xyzModem.h	/^#define xyzModem_noZmodem /;"	d
xyzModem_sequence	include/xyzModem.h	/^#define xyzModem_sequence /;"	d
xyzModem_stream_close	common/xyzModem.c	/^xyzModem_stream_close (int *err)$/;"	f	typeref:typename:void
xyzModem_stream_open	common/xyzModem.c	/^xyzModem_stream_open (connection_info_t * info, int *err)$/;"	f	typeref:typename:int
xyzModem_stream_read	common/xyzModem.c	/^xyzModem_stream_read (char *buf, int size, int *err)$/;"	f	typeref:typename:int
xyzModem_stream_terminate	common/xyzModem.c	/^xyzModem_stream_terminate (bool abort, int (*getc) (void))$/;"	f	typeref:typename:void
xyzModem_timeout	include/xyzModem.h	/^#define xyzModem_timeout /;"	d
xyzModem_xmodem	include/xyzModem.h	/^#define xyzModem_xmodem /;"	d
xyzModem_ymodem	include/xyzModem.h	/^#define xyzModem_ymodem /;"	d
y	arch/arm/include/asm/arch-tegra20/display.h	/^	unsigned	y;		\/* Veritical address offset (bytes) *\/$/;"	m	struct:disp_ctl_win	typeref:typename:unsigned
y	arch/arm/include/asm/setup.h	/^	u8		y;$/;"	m	struct:tag_videotext	typeref:typename:u8
y	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 y;$/;"	m	struct:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a::__anon775fc5443008	typeref:typename:u32
y	arch/arm/mach-bcm283x/include/mach/mbox.h	/^			u32 y;$/;"	m	struct:bcm2835_mbox_tag_virtual_offset::__anon775fc5442f0a::__anon775fc5443108	typeref:typename:u32
y	arch/nds32/include/asm/setup.h	/^	u8		y;$/;"	m	struct:tag_videotext	typeref:typename:u8
y	arch/sparc/include/asm/ptrace.h	/^	unsigned long y;$/;"	m	struct:pt_regs	typeref:typename:unsigned long
y	drivers/video/mxcfb.h	/^	__u16 y;$/;"	m	struct:mxcfb_pos	typeref:typename:__u16
y	drivers/video/stb_truetype.h	/^      stbtt_vertex_type x,y,cx,cy;$/;"	m	struct:__anonce392f790608	typeref:typename:stbtt_vertex_type
y	drivers/video/stb_truetype.h	/^   float x,y;$/;"	m	struct:__anonce392f790e08	typeref:typename:float
y	drivers/video/stb_truetype.h	/^   int x,y,bottom_y;$/;"	m	struct:__anonce392f790f08	typeref:typename:int
y	drivers/video/stb_truetype.h	/^   stbrp_coord x,y;$/;"	m	struct:stbrp_rect	typeref:typename:stbrp_coord
y	include/linux/fb.h	/^	__u16 x, y;$/;"	m	struct:fbcurpos	typeref:typename:__u16
y	include/linux/fb.h	/^	u32 y;$/;"	m	struct:fb_blit_caps	typeref:typename:u32
y	include/linux/time.h	/^    int y;$/;"	m	struct:_DEFUN	typeref:typename:int
y	lib/rand.c	/^static unsigned int y = 1U;$/;"	v	typeref:typename:unsigned int	file:
y0	arch/sh/include/asm/ptrace.h	/^	unsigned long	y0;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
y0	drivers/video/stb_truetype.h	/^   float x0,y0, x1,y1;$/;"	m	struct:stbtt__edge	typeref:typename:float
y0	drivers/video/stb_truetype.h	/^   float x0,y0,s0,t0; \/\/ top-left$/;"	m	struct:__anonce392f790208	typeref:typename:float
y0	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790108	typeref:typename:unsigned short
y0	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790308	typeref:typename:unsigned short
y1	arch/sh/include/asm/ptrace.h	/^	unsigned long	y1;$/;"	m	struct:pt_dspregs	typeref:typename:unsigned long
y1	drivers/video/stb_truetype.h	/^   float x0,y0, x1,y1;$/;"	m	struct:stbtt__edge	typeref:typename:float
y1	drivers/video/stb_truetype.h	/^   float x1,y1,s1,t1; \/\/ bottom-right$/;"	m	struct:__anonce392f790208	typeref:typename:float
y1	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790108	typeref:typename:unsigned short
y1	drivers/video/stb_truetype.h	/^   unsigned short x0,y0,x1,y1; \/\/ coordinates of bbox in bitmap$/;"	m	struct:__anonce392f790308	typeref:typename:unsigned short
y1	tools/easylogo/easylogo.c	/^	unsigned char Cb, y1, Cr, y2;$/;"	m	struct:__anonbf0fd82b0408	typeref:typename:unsigned char	file:
y2	tools/easylogo/easylogo.c	/^	unsigned char Cb, y1, Cr, y2;$/;"	m	struct:__anonbf0fd82b0408	typeref:typename:unsigned char	file:
y_bp	arch/arm/mach-mvebu/include/mach/cpu.h	/^	int y_bp;$/;"	m	struct:mvebu_lcd_info	typeref:typename:int
y_charsize	include/vbe.h	/^	u8 y_charsize;		\/* 17 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u8
y_charsize	include/video_console.h	/^	int y_charsize;$/;"	m	struct:vidconsole_priv	typeref:typename:int
y_count	arch/blackfin/include/asm/dma.h	/^	u16 y_count;$/;"	m	struct:dmasg	typeref:typename:u16
y_count	arch/blackfin/include/asm/dma.h	/^	u16 y_count;$/;"	m	struct:dmasg_large	typeref:typename:u16
y_count	arch/blackfin/include/asm/dma.h	/^	u32 y_count;		\/* DMA y_count register *\/$/;"	m	struct:dma_register	typeref:typename:u32
y_fp	arch/arm/mach-mvebu/include/mach/cpu.h	/^	int y_fp;$/;"	m	struct:mvebu_lcd_info	typeref:typename:int
y_modify	arch/blackfin/include/asm/dma.h	/^	s16 y_modify;$/;"	m	struct:dmasg	typeref:typename:s16
y_modify	arch/blackfin/include/asm/dma.h	/^	s16 y_modify;$/;"	m	struct:dmasg_large	typeref:typename:s16
y_modify	arch/blackfin/include/asm/dma.h	/^	s32 y_modify;		\/* DMA y_modify register *\/$/;"	m	struct:dma_register	typeref:typename:s32
y_pixels_per_m	include/bmp_layout.h	/^	__u32	y_pixels_per_m;$/;"	m	struct:bmp_header	typeref:typename:__u32
y_pos	include/gdsys_fpga.h	/^	u16 y_pos;$/;"	m	struct:ihs_osd	typeref:typename:u16
y_res	arch/arm/mach-mvebu/include/mach/cpu.h	/^	int y_res;$/;"	m	struct:mvebu_lcd_info	typeref:typename:int
y_resolution	arch/x86/include/asm/coreboot_tables.h	/^	u32 y_resolution;$/;"	m	struct:cb_framebuffer	typeref:typename:u32
y_resolution	include/vbe.h	/^	u16 y_resolution;	\/* 14 *\/$/;"	m	struct:vesa_mode_info	typeref:typename:u16
yaffs1_scan	fs/yaffs2/yaffs_yaffs1.c	/^int yaffs1_scan(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs2_checkpt_find_block	fs/yaffs2/yaffs_checkptrw.c	/^static void yaffs2_checkpt_find_block(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs2_checkpt_find_erased_block	fs/yaffs2/yaffs_checkptrw.c	/^static void yaffs2_checkpt_find_erased_block(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs2_checkpt_flush_buffer	fs/yaffs2/yaffs_checkptrw.c	/^static int yaffs2_checkpt_flush_buffer(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_checkpt_invalidate	fs/yaffs2/yaffs_yaffs2.c	/^void yaffs2_checkpt_invalidate(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs2_checkpt_invalidate_stream	fs/yaffs2/yaffs_checkptrw.c	/^int yaffs2_checkpt_invalidate_stream(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs2_checkpt_obj_to_obj	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_checkpt_obj_to_obj(struct yaffs_obj *obj,$/;"	f	typeref:typename:int	file:
yaffs2_checkpt_open	fs/yaffs2/yaffs_checkptrw.c	/^int yaffs2_checkpt_open(struct yaffs_dev *dev, int writing)$/;"	f	typeref:typename:int
yaffs2_checkpt_rd	fs/yaffs2/yaffs_checkptrw.c	/^int yaffs2_checkpt_rd(struct yaffs_dev *dev, void *data, int n_bytes)$/;"	f	typeref:typename:int
yaffs2_checkpt_required	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs2_checkpt_required(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs2_checkpt_restore	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs2_checkpt_restore(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs2_checkpt_space_ok	fs/yaffs2/yaffs_checkptrw.c	/^static int yaffs2_checkpt_space_ok(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_checkpt_tnode_worker	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_checkpt_tnode_worker(struct yaffs_obj *in,$/;"	f	typeref:typename:int	file:
yaffs2_checkpt_wr	fs/yaffs2/yaffs_checkptrw.c	/^int yaffs2_checkpt_wr(struct yaffs_dev *dev, const void *data, int n_bytes)$/;"	f	typeref:typename:int
yaffs2_clear_oldest_dirty_seq	fs/yaffs2/yaffs_yaffs2.c	/^void yaffs2_clear_oldest_dirty_seq(struct yaffs_dev *dev,$/;"	f	typeref:typename:void
yaffs2_dev_to_checkpt_dev	fs/yaffs2/yaffs_yaffs2.c	/^static void yaffs2_dev_to_checkpt_dev(struct yaffs_checkpt_dev *cp,$/;"	f	typeref:typename:void	file:
yaffs2_find_oldest_dirty_seq	fs/yaffs2/yaffs_yaffs2.c	/^void yaffs2_find_oldest_dirty_seq(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs2_find_refresh_block	fs/yaffs2/yaffs_yaffs2.c	/^u32 yaffs2_find_refresh_block(struct yaffs_dev *dev)$/;"	f	typeref:typename:u32
yaffs2_get_checkpt_sum	fs/yaffs2/yaffs_checkptrw.c	/^int yaffs2_get_checkpt_sum(struct yaffs_dev *dev, u32 * sum)$/;"	f	typeref:typename:int
yaffs2_handle_hole	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs2_handle_hole(struct yaffs_obj *obj, loff_t new_size)$/;"	f	typeref:typename:int
yaffs2_obj_checkpt_obj	fs/yaffs2/yaffs_yaffs2.c	/^static void yaffs2_obj_checkpt_obj(struct yaffs_checkpt_obj *cp,$/;"	f	typeref:typename:void	file:
yaffs2_rd_checkpt_data	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_rd_checkpt_data(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_rd_checkpt_dev	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_rd_checkpt_dev(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_rd_checkpt_objs	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_rd_checkpt_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_rd_checkpt_sum	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_rd_checkpt_sum(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_rd_checkpt_tnodes	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_rd_checkpt_tnodes(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs2_rd_checkpt_validity_marker	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_rd_checkpt_validity_marker(struct yaffs_dev *dev, int head)$/;"	f	typeref:typename:int	file:
yaffs2_scan_backwards	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs2_scan_backwards(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs2_scan_chunk	fs/yaffs2/yaffs_yaffs2.c	/^static inline int yaffs2_scan_chunk(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs2_update_oldest_dirty_seq	fs/yaffs2/yaffs_yaffs2.c	/^void yaffs2_update_oldest_dirty_seq(struct yaffs_dev *dev, unsigned block_no,$/;"	f	typeref:typename:void
yaffs2_wr_checkpt_data	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_wr_checkpt_data(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_wr_checkpt_dev	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_wr_checkpt_dev(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_wr_checkpt_objs	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_wr_checkpt_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_wr_checkpt_sum	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_wr_checkpt_sum(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs2_wr_checkpt_tnodes	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_wr_checkpt_tnodes(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs2_wr_checkpt_validity_marker	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_wr_checkpt_validity_marker(struct yaffs_dev *dev, int head)$/;"	f	typeref:typename:int	file:
yaffs2_ybicmp	fs/yaffs2/yaffs_yaffs2.c	/^static int yaffs2_ybicmp(const void *a, const void *b)$/;"	f	typeref:typename:int	file:
yaffs_DIR	fs/yaffs2/yaffsfs.h	/^typedef struct opaque_structure yaffs_DIR;$/;"	t	typeref:struct:opaque_structure
yaffs_Dofsync	fs/yaffs2/yaffsfs.c	/^int yaffs_Dofsync(int handle, int datasync)$/;"	f	typeref:typename:int
yaffs_access	fs/yaffs2/yaffsfs.c	/^int yaffs_access(const YCHAR *path, int amode)$/;"	f	typeref:typename:int
yaffs_add_dev_from_geometry	fs/yaffs2/yaffs_nandif.c	/^	yaffs_add_dev_from_geometry(const YCHAR *name,$/;"	f	typeref:struct:yaffs_dev *
yaffs_add_device	fs/yaffs2/yaffsfs.c	/^void yaffs_add_device(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_add_find_tnode_0	fs/yaffs2/yaffs_guts.c	/^struct yaffs_tnode *yaffs_add_find_tnode_0(struct yaffs_dev *dev,$/;"	f	typeref:struct:yaffs_tnode *
yaffs_add_obj_to_dir	fs/yaffs2/yaffs_guts.c	/^void yaffs_add_obj_to_dir(struct yaffs_obj *directory, struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_addr_to_chunk	fs/yaffs2/yaffs_guts.c	/^void yaffs_addr_to_chunk(struct yaffs_dev *dev, loff_t addr,$/;"	f	typeref:typename:void
yaffs_alloc_chunk	fs/yaffs2/yaffs_guts.c	/^static int yaffs_alloc_chunk(struct yaffs_dev *dev, int use_reserver,$/;"	f	typeref:typename:int	file:
yaffs_alloc_empty_obj	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_obj *yaffs_alloc_empty_obj(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_obj *	file:
yaffs_alloc_raw_obj	fs/yaffs2/yaffs_allocator.c	/^struct yaffs_obj *yaffs_alloc_raw_obj(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_obj *
yaffs_alloc_raw_tnode	fs/yaffs2/yaffs_allocator.c	/^struct yaffs_tnode *yaffs_alloc_raw_tnode(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_tnode *
yaffs_allocator	fs/yaffs2/yaffs_allocator.c	/^struct yaffs_allocator {$/;"	s	file:
yaffs_apply_xattrib_mod	fs/yaffs2/yaffs_guts.c	/^static int yaffs_apply_xattrib_mod(struct yaffs_obj *obj, char *buffer,$/;"	f	typeref:typename:int	file:
yaffs_attribs_init	fs/yaffs2/yaffs_attribs.c	/^void yaffs_attribs_init(struct yaffs_obj *obj, u32 gid, u32 uid, u32 rdev)$/;"	f	typeref:typename:void
yaffs_bg_gc	fs/yaffs2/yaffs_guts.c	/^int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency)$/;"	f	typeref:typename:int
yaffs_block_became_dirty	fs/yaffs2/yaffs_guts.c	/^void yaffs_block_became_dirty(struct yaffs_dev *dev, int block_no)$/;"	f	typeref:typename:void
yaffs_block_bits	fs/yaffs2/yaffs_bitmap.c	/^static inline u8 *yaffs_block_bits(struct yaffs_dev *dev, int blk)$/;"	f	typeref:typename:u8 *	file:
yaffs_block_index	fs/yaffs2/yaffs_yaffs2.c	/^struct yaffs_block_index {$/;"	s	file:
yaffs_block_info	fs/yaffs2/yaffs_guts.h	/^struct yaffs_block_info {$/;"	s
yaffs_block_ok_for_gc	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs_block_ok_for_gc(struct yaffs_dev *dev, struct yaffs_block_info *bi)$/;"	f	typeref:typename:int
yaffs_block_state	fs/yaffs2/yaffs_guts.h	/^enum yaffs_block_state {$/;"	g
yaffs_buffer	fs/yaffs2/yaffs_guts.h	/^struct yaffs_buffer {$/;"	s
yaffs_bug_fn	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffs_bug_fn(const char *fn, int n)$/;"	f	typeref:typename:void
yaffs_cache	fs/yaffs2/yaffs_guts.h	/^struct yaffs_cache {$/;"	s
yaffs_calc_checkpt_blocks_required	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs_calc_checkpt_blocks_required(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_calc_ecc	fs/yaffs2/yaffs_tagscompat.c	/^void yaffs_calc_ecc(const u8 *data, struct yaffs_spare *spare)$/;"	f	typeref:typename:void
yaffs_calc_name_sum	fs/yaffs2/yaffs_guts.c	/^static u16 yaffs_calc_name_sum(const YCHAR *name)$/;"	f	typeref:typename:u16	file:
yaffs_calc_oldest_dirty_seq	fs/yaffs2/yaffs_yaffs2.c	/^void yaffs_calc_oldest_dirty_seq(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_calc_tags_ecc	fs/yaffs2/yaffs_tagscompat.c	/^void yaffs_calc_tags_ecc(struct yaffs_tags *tags)$/;"	f	typeref:typename:void
yaffs_change_obj_name	fs/yaffs2/yaffs_guts.c	/^static int yaffs_change_obj_name(struct yaffs_obj *obj,$/;"	f	typeref:typename:int	file:
yaffs_check_alloc_available	fs/yaffs2/yaffs_guts.c	/^int yaffs_check_alloc_available(struct yaffs_dev *dev, int n_chunks)$/;"	f	typeref:typename:int
yaffs_check_chunk_bit	fs/yaffs2/yaffs_bitmap.c	/^int yaffs_check_chunk_bit(struct yaffs_dev *dev, int blk, int chunk)$/;"	f	typeref:typename:int
yaffs_check_chunk_erased	fs/yaffs2/yaffs_guts.c	/^static int yaffs_check_chunk_erased(struct yaffs_dev *dev, int nand_chunk)$/;"	f	typeref:typename:int	file:
yaffs_check_dev_fns	fs/yaffs2/yaffs_guts.c	/^static int yaffs_check_dev_fns(const struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_check_ff	fs/yaffs2/yaffs_guts.c	/^int yaffs_check_ff(u8 *buffer, int n_bytes)$/;"	f	typeref:typename:int
yaffs_check_gc	fs/yaffs2/yaffs_guts.c	/^static int yaffs_check_gc(struct yaffs_dev *dev, int background)$/;"	f	typeref:typename:int	file:
yaffs_check_obj_details_loaded	fs/yaffs2/yaffs_guts.c	/^static void yaffs_check_obj_details_loaded(struct yaffs_obj *in)$/;"	f	typeref:typename:void	file:
yaffs_check_tags_ecc	fs/yaffs2/yaffs_tagscompat.c	/^int yaffs_check_tags_ecc(struct yaffs_tags *tags)$/;"	f	typeref:typename:int
yaffs_check_tags_extra_packable	fs/yaffs2/yaffs_packedtags2.c	/^static int yaffs_check_tags_extra_packable(const struct yaffs_ext_tags *t)$/;"	f	typeref:typename:int	file:
yaffs_checkpoint_save	fs/yaffs2/yaffs_yaffs2.c	/^int yaffs_checkpoint_save(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_checkpt_close	fs/yaffs2/yaffs_checkptrw.c	/^int yaffs_checkpt_close(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_checkpt_dev	fs/yaffs2/yaffs_guts.h	/^struct yaffs_checkpt_dev {$/;"	s
yaffs_checkpt_dev_to_dev	fs/yaffs2/yaffs_yaffs2.c	/^static void yaffs_checkpt_dev_to_dev(struct yaffs_dev *dev,$/;"	f	typeref:typename:void	file:
yaffs_checkpt_erase	fs/yaffs2/yaffs_checkptrw.c	/^static int yaffs_checkpt_erase(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_checkpt_obj	fs/yaffs2/yaffs_guts.h	/^struct yaffs_checkpt_obj {$/;"	s
yaffs_checkpt_validity	fs/yaffs2/yaffs_guts.h	/^struct yaffs_checkpt_validity {$/;"	s
yaffs_chmod	fs/yaffs2/yaffsfs.c	/^int yaffs_chmod(const YCHAR *path, mode_t mode)$/;"	f	typeref:typename:int
yaffs_chunk_del	fs/yaffs2/yaffs_guts.c	/^void yaffs_chunk_del(struct yaffs_dev *dev, int chunk_id, int mark_flash,$/;"	f	typeref:typename:void
yaffs_clear_chunk_bit	fs/yaffs2/yaffs_bitmap.c	/^void yaffs_clear_chunk_bit(struct yaffs_dev *dev, int blk, int chunk)$/;"	f	typeref:typename:void
yaffs_clear_chunk_bits	fs/yaffs2/yaffs_bitmap.c	/^void yaffs_clear_chunk_bits(struct yaffs_dev *dev, int blk)$/;"	f	typeref:typename:void
yaffs_clone_str	fs/yaffs2/yaffs_guts.c	/^YCHAR *yaffs_clone_str(const YCHAR *str)$/;"	f	typeref:typename:YCHAR *
yaffs_close	fs/yaffs2/yaffsfs.c	/^int yaffs_close(int handle)$/;"	f	typeref:typename:int
yaffs_closedir	fs/yaffs2/yaffsfs.c	/^int yaffs_closedir(yaffs_DIR *dirp)$/;"	f	typeref:typename:int
yaffs_count_chunk_bits	fs/yaffs2/yaffs_bitmap.c	/^int yaffs_count_chunk_bits(struct yaffs_dev *dev, int blk)$/;"	f	typeref:typename:int
yaffs_count_free_chunks	fs/yaffs2/yaffs_guts.c	/^int yaffs_count_free_chunks(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_create_dir	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_create_dir(struct yaffs_obj *parent, const YCHAR *name,$/;"	f	typeref:struct:yaffs_obj *
yaffs_create_fake_dir	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_obj *yaffs_create_fake_dir(struct yaffs_dev *dev,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffs_create_file	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_create_file(struct yaffs_obj *parent,$/;"	f	typeref:struct:yaffs_obj *
yaffs_create_free_objs	fs/yaffs2/yaffs_allocator.c	/^static int yaffs_create_free_objs(struct yaffs_dev *dev, int n_obj)$/;"	f	typeref:typename:int	file:
yaffs_create_initial_dir	fs/yaffs2/yaffs_guts.c	/^static int yaffs_create_initial_dir(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_create_obj	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_obj *yaffs_create_obj(enum yaffs_obj_type type,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffs_create_special	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_create_special(struct yaffs_obj *parent,$/;"	f	typeref:struct:yaffs_obj *
yaffs_create_symlink	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_create_symlink(struct yaffs_obj *parent,$/;"	f	typeref:struct:yaffs_obj *
yaffs_create_tnodes	fs/yaffs2/yaffs_allocator.c	/^static int yaffs_create_tnodes(struct yaffs_dev *dev, int n_tnodes)$/;"	f	typeref:typename:int	file:
yaffs_deinit_blocks	fs/yaffs2/yaffs_guts.c	/^static void yaffs_deinit_blocks(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_deinit_raw_objs	fs/yaffs2/yaffs_allocator.c	/^static void yaffs_deinit_raw_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_deinit_raw_tnodes	fs/yaffs2/yaffs_allocator.c	/^static void yaffs_deinit_raw_tnodes(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_deinit_raw_tnodes_and_objs	fs/yaffs2/yaffs_allocator.c	/^void yaffs_deinit_raw_tnodes_and_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_deinit_tnodes_and_objs	fs/yaffs2/yaffs_guts.c	/^static void yaffs_deinit_tnodes_and_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_deinitialise	fs/yaffs2/yaffs_guts.c	/^void yaffs_deinitialise(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_del_dir	fs/yaffs2/yaffs_guts.c	/^static int yaffs_del_dir(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs_del_dir_contents	fs/yaffs2/yaffs_guts.c	/^static void yaffs_del_dir_contents(struct yaffs_obj *dir)$/;"	f	typeref:typename:void	file:
yaffs_del_file	fs/yaffs2/yaffs_guts.c	/^int yaffs_del_file(struct yaffs_obj *in)$/;"	f	typeref:typename:int
yaffs_del_link	fs/yaffs2/yaffs_guts.c	/^static int yaffs_del_link(struct yaffs_obj *in)$/;"	f	typeref:typename:int	file:
yaffs_del_obj	fs/yaffs2/yaffs_guts.c	/^int yaffs_del_obj(struct yaffs_obj *obj)$/;"	f	typeref:typename:int
yaffs_del_symlink	fs/yaffs2/yaffs_guts.c	/^static int yaffs_del_symlink(struct yaffs_obj *in)$/;"	f	typeref:typename:int	file:
yaffs_dev	fs/yaffs2/yaffs_guts.h	/^struct yaffs_dev {$/;"	s
yaffs_dev_rewind	fs/yaffs2/yaffsfs.c	/^void yaffs_dev_rewind(void)$/;"	f	typeref:typename:void
yaffs_dev_to_lc	fs/yaffs2/yaffs_mtdif2.c	/^#define yaffs_dev_to_lc(/;"	d	file:
yaffs_dev_to_mtd	fs/yaffs2/yaffs_mtdif2.c	/^#define yaffs_dev_to_mtd(/;"	d	file:
yaffs_dir_var	fs/yaffs2/yaffs_guts.h	/^struct yaffs_dir_var {$/;"	s
yaffs_dirent	fs/yaffs2/yaffsfs.h	/^struct yaffs_dirent {$/;"	s
yaffs_do_file_wr	fs/yaffs2/yaffs_guts.c	/^int yaffs_do_file_wr(struct yaffs_obj *in, const u8 *buffer, loff_t offset,$/;"	f	typeref:typename:int
yaffs_do_getxattr	fs/yaffs2/yaffsfs.c	/^static int yaffs_do_getxattr(const YCHAR *path, const char *name,$/;"	f	typeref:typename:int	file:
yaffs_do_listxattr	fs/yaffs2/yaffsfs.c	/^static int yaffs_do_listxattr(const YCHAR *path, char *data,$/;"	f	typeref:typename:int	file:
yaffs_do_removexattr	fs/yaffs2/yaffsfs.c	/^static int yaffs_do_removexattr(const YCHAR *path, const char *name,$/;"	f	typeref:typename:int	file:
yaffs_do_setxattr	fs/yaffs2/yaffsfs.c	/^static int yaffs_do_setxattr(const YCHAR *path, const char *name,$/;"	f	typeref:typename:int	file:
yaffs_do_xattrib_fetch	fs/yaffs2/yaffs_guts.c	/^static int yaffs_do_xattrib_fetch(struct yaffs_obj *obj, const YCHAR *name,$/;"	f	typeref:typename:int	file:
yaffs_do_xattrib_mod	fs/yaffs2/yaffs_guts.c	/^static int yaffs_do_xattrib_mod(struct yaffs_obj *obj, int set,$/;"	f	typeref:typename:int	file:
yaffs_dump_dev	fs/yaffs2/yaffsfs.c	/^int yaffs_dump_dev(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_dump_packed_tags2	fs/yaffs2/yaffs_packedtags2.c	/^static void yaffs_dump_packed_tags2(const struct yaffs_packed_tags2 *pt)$/;"	f	typeref:typename:void	file:
yaffs_dump_packed_tags2_tags_only	fs/yaffs2/yaffs_packedtags2.c	/^static void yaffs_dump_packed_tags2_tags_only($/;"	f	typeref:typename:void	file:
yaffs_dump_tags2	fs/yaffs2/yaffs_packedtags2.c	/^static void yaffs_dump_tags2(const struct yaffs_ext_tags *t)$/;"	f	typeref:typename:void	file:
yaffs_dup	fs/yaffs2/yaffsfs.c	/^int yaffs_dup(int handle)$/;"	f	typeref:typename:int
yaffs_ecc_calc	fs/yaffs2/yaffs_ecc.c	/^void yaffs_ecc_calc(const unsigned char *data, unsigned char *ecc)$/;"	f	typeref:typename:void
yaffs_ecc_calc_other	fs/yaffs2/yaffs_ecc.c	/^void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes,$/;"	f	typeref:typename:void
yaffs_ecc_correct	fs/yaffs2/yaffs_ecc.c	/^int yaffs_ecc_correct(unsigned char *data, unsigned char *read_ecc,$/;"	f	typeref:typename:int
yaffs_ecc_correct_other	fs/yaffs2/yaffs_ecc.c	/^int yaffs_ecc_correct_other(unsigned char *data, unsigned n_bytes,$/;"	f	typeref:typename:int
yaffs_ecc_other	fs/yaffs2/yaffs_ecc.h	/^struct yaffs_ecc_other {$/;"	s
yaffs_ecc_result	fs/yaffs2/yaffs_guts.h	/^enum yaffs_ecc_result {$/;"	g
yaffs_empty_l_n_f	fs/yaffs2/yaffs_guts.c	/^static void yaffs_empty_l_n_f(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_erase_block	fs/yaffs2/yaffs_nand.c	/^int yaffs_erase_block(struct yaffs_dev *dev, int flash_block)$/;"	f	typeref:typename:int
yaffs_errno	fs/yaffs2/yaffs_uboot_glue.c	/^static int yaffs_errno;$/;"	v	typeref:typename:int	file:
yaffs_error_str	fs/yaffs2/yaffs_uboot_glue.c	/^static const char *yaffs_error_str(void)$/;"	f	typeref:typename:const char *	file:
yaffs_error_to_str	fs/yaffs2/yaffs_error.c	/^const char *yaffs_error_to_str(int err)$/;"	f	typeref:typename:const char *
yaffs_ext_tags	fs/yaffs2/yaffs_guts.h	/^struct yaffs_ext_tags {$/;"	s
yaffs_fchmod	fs/yaffs2/yaffsfs.c	/^int yaffs_fchmod(int fd, mode_t mode)$/;"	f	typeref:typename:int
yaffs_fdatasync	fs/yaffs2/yaffsfs.c	/^int yaffs_fdatasync(int handle)$/;"	f	typeref:typename:int
yaffs_fgetxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_fgetxattr(int fd, const char *name, void *data, int size)$/;"	f	typeref:typename:int
yaffs_file_rd	fs/yaffs2/yaffs_guts.c	/^int yaffs_file_rd(struct yaffs_obj *in, u8 * buffer, loff_t offset, int n_bytes)$/;"	f	typeref:typename:int
yaffs_file_type_str	fs/yaffs2/yaffs_uboot_glue.c	/^static const char *yaffs_file_type_str(struct yaffs_stat *stat)$/;"	f	typeref:typename:const char *	file:
yaffs_file_var	fs/yaffs2/yaffs_guts.h	/^struct yaffs_file_var {$/;"	s
yaffs_find_alloc_block	fs/yaffs2/yaffs_guts.c	/^static int yaffs_find_alloc_block(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_find_by_name	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_find_by_name(struct yaffs_obj *directory,$/;"	f	typeref:struct:yaffs_obj *
yaffs_find_by_number	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_find_by_number(struct yaffs_dev *dev, u32 number)$/;"	f	typeref:struct:yaffs_obj *
yaffs_find_chunk_cache	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_cache *yaffs_find_chunk_cache(const struct yaffs_obj *obj,$/;"	f	typeref:struct:yaffs_cache *	file:
yaffs_find_chunk_in_file	fs/yaffs2/yaffs_guts.c	/^static int yaffs_find_chunk_in_file(struct yaffs_obj *in, int inode_chunk,$/;"	f	typeref:typename:int	file:
yaffs_find_chunk_in_group	fs/yaffs2/yaffs_guts.c	/^static int yaffs_find_chunk_in_group(struct yaffs_dev *dev, int the_chunk,$/;"	f	typeref:typename:int	file:
yaffs_find_del_file_chunk	fs/yaffs2/yaffs_guts.c	/^static int yaffs_find_del_file_chunk(struct yaffs_obj *in, int inode_chunk,$/;"	f	typeref:typename:int	file:
yaffs_find_gc_block	fs/yaffs2/yaffs_guts.c	/^static unsigned yaffs_find_gc_block(struct yaffs_dev *dev,$/;"	f	typeref:typename:unsigned	file:
yaffs_find_nice_bucket	fs/yaffs2/yaffs_guts.c	/^static int yaffs_find_nice_bucket(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_find_or_create_by_number	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_find_or_create_by_number(struct yaffs_dev *dev,$/;"	f	typeref:struct:yaffs_obj *
yaffs_find_tnode_0	fs/yaffs2/yaffs_guts.c	/^struct yaffs_tnode *yaffs_find_tnode_0(struct yaffs_dev *dev,$/;"	f	typeref:struct:yaffs_tnode *
yaffs_fix_hanging_objs	fs/yaffs2/yaffs_guts.c	/^static void yaffs_fix_hanging_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_fix_null_name	fs/yaffs2/yaffs_guts.c	/^static void yaffs_fix_null_name(struct yaffs_obj *obj, YCHAR *name,$/;"	f	typeref:typename:void	file:
yaffs_flistxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_flistxattr(int fd, char *data, int size)$/;"	f	typeref:typename:int
yaffs_flush	fs/yaffs2/yaffsfs.c	/^int yaffs_flush(int handle)$/;"	f	typeref:typename:int
yaffs_flush_file	fs/yaffs2/yaffs_guts.c	/^int yaffs_flush_file(struct yaffs_obj *in, int update_time, int data_sync)$/;"	f	typeref:typename:int
yaffs_flush_file_cache	fs/yaffs2/yaffs_guts.c	/^static void yaffs_flush_file_cache(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffs_flush_whole_cache	fs/yaffs2/yaffs_guts.c	/^void yaffs_flush_whole_cache(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_free	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffs_free(void *ptr)$/;"	f	typeref:typename:void
yaffs_free_obj	fs/yaffs2/yaffs_guts.c	/^static void yaffs_free_obj(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffs_free_raw_obj	fs/yaffs2/yaffs_allocator.c	/^void yaffs_free_raw_obj(struct yaffs_dev *dev, struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_free_raw_tnode	fs/yaffs2/yaffs_allocator.c	/^void yaffs_free_raw_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn)$/;"	f	typeref:typename:void
yaffs_free_tnode	fs/yaffs2/yaffs_guts.c	/^static void yaffs_free_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn)$/;"	f	typeref:typename:void	file:
yaffs_free_verification_failures	fs/yaffs2/yaffs_verify.c	/^static int yaffs_free_verification_failures;$/;"	v	typeref:typename:int	file:
yaffs_freespace	fs/yaffs2/yaffsfs.c	/^loff_t yaffs_freespace(const YCHAR *path)$/;"	f	typeref:typename:loff_t
yaffs_fremovexattr	fs/yaffs2/yaffsfs.c	/^int yaffs_fremovexattr(int fd, const char *name)$/;"	f	typeref:typename:int
yaffs_fsetxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_fsetxattr(int fd, const char *name,$/;"	f	typeref:typename:int
yaffs_fstat	fs/yaffs2/yaffsfs.c	/^int yaffs_fstat(int fd, struct yaffs_stat *buf)$/;"	f	typeref:typename:int
yaffs_fsync	fs/yaffs2/yaffsfs.c	/^int yaffs_fsync(int handle)$/;"	f	typeref:typename:int
yaffs_ftruncate	fs/yaffs2/yaffsfs.c	/^int yaffs_ftruncate(int handle, loff_t new_size)$/;"	f	typeref:typename:int
yaffs_futime	fs/yaffs2/yaffsfs.c	/^int yaffs_futime(int fd, const struct yaffs_utimbuf *buf)$/;"	f	typeref:typename:int
yaffs_gc_block	fs/yaffs2/yaffs_guts.c	/^static int yaffs_gc_block(struct yaffs_dev *dev, int block, int whole_block)$/;"	f	typeref:typename:int	file:
yaffs_gc_process_chunk	fs/yaffs2/yaffs_guts.c	/^static inline int yaffs_gc_process_chunk(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs_generic_obj_del	fs/yaffs2/yaffs_guts.c	/^static int yaffs_generic_obj_del(struct yaffs_obj *in)$/;"	f	typeref:typename:int	file:
yaffs_get_attribs	fs/yaffs2/yaffs_attribs.c	/^int yaffs_get_attribs(struct yaffs_obj *obj, struct iattr *attr)$/;"	f	typeref:typename:int
yaffs_get_block_info	fs/yaffs2/yaffs_getblockinfo.h	/^static inline struct yaffs_block_info *yaffs_get_block_info(struct yaffs_dev$/;"	f	typeref:struct:yaffs_block_info *
yaffs_get_equivalent_obj	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_get_equivalent_obj(struct yaffs_obj *obj)$/;"	f	typeref:struct:yaffs_obj *
yaffs_get_erased_chunks	fs/yaffs2/yaffs_guts.c	/^static int yaffs_get_erased_chunks(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_get_error	fs/yaffs2/yaffsfs.c	/^int yaffs_get_error(void)$/;"	f	typeref:typename:int
yaffs_get_file_size	fs/yaffs2/yaffs_attribs.c	/^loff_t yaffs_get_file_size(struct yaffs_obj *obj)$/;"	f	typeref:typename:loff_t
yaffs_get_group_base	fs/yaffs2/yaffs_guts.c	/^u32 yaffs_get_group_base(struct yaffs_dev *dev, struct yaffs_tnode *tn,$/;"	f	typeref:typename:u32
yaffs_get_n_free_chunks	fs/yaffs2/yaffs_guts.c	/^int yaffs_get_n_free_chunks(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_get_obj_inode	fs/yaffs2/yaffs_guts.c	/^int yaffs_get_obj_inode(struct yaffs_obj *obj)$/;"	f	typeref:typename:int
yaffs_get_obj_length	fs/yaffs2/yaffs_guts.c	/^loff_t yaffs_get_obj_length(struct yaffs_obj *obj)$/;"	f	typeref:typename:loff_t
yaffs_get_obj_link_count	fs/yaffs2/yaffs_guts.c	/^int yaffs_get_obj_link_count(struct yaffs_obj *obj)$/;"	f	typeref:typename:int
yaffs_get_obj_name	fs/yaffs2/yaffs_guts.c	/^int yaffs_get_obj_name(struct yaffs_obj *obj, YCHAR *name, int buffer_size)$/;"	f	typeref:typename:int
yaffs_get_obj_type	fs/yaffs2/yaffs_guts.c	/^unsigned yaffs_get_obj_type(struct yaffs_obj *obj)$/;"	f	typeref:typename:unsigned
yaffs_get_symlink_alias	fs/yaffs2/yaffs_guts.c	/^YCHAR *yaffs_get_symlink_alias(struct yaffs_obj *obj)$/;"	f	typeref:typename:YCHAR *
yaffs_get_tags_from_spare	fs/yaffs2/yaffs_tagscompat.c	/^static void yaffs_get_tags_from_spare(struct yaffs_dev *dev,$/;"	f	typeref:typename:void	file:
yaffs_get_temp_buffer	fs/yaffs2/yaffs_guts.c	/^u8 *yaffs_get_temp_buffer(struct yaffs_dev * dev)$/;"	f	typeref:typename:u8 *
yaffs_get_tnode	fs/yaffs2/yaffs_guts.c	/^struct yaffs_tnode *yaffs_get_tnode(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_tnode *
yaffs_get_trace	fs/yaffs2/yaffsfs.c	/^unsigned yaffs_get_trace(void)$/;"	f	typeref:typename:unsigned
yaffs_get_wince_times	fs/yaffs2/yaffsfs.c	/^int yaffs_get_wince_times(int fd, unsigned *wctime,$/;"	f	typeref:typename:int
yaffs_get_xattrib	fs/yaffs2/yaffs_guts.c	/^int yaffs_get_xattrib(struct yaffs_obj *obj, const YCHAR * name, void *value,$/;"	f	typeref:typename:int
yaffs_getdev	fs/yaffs2/yaffsfs.c	/^void *yaffs_getdev(const YCHAR *path)$/;"	f	typeref:typename:void *
yaffs_getxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_getxattr(const YCHAR *path, const char *name, void *data, int size)$/;"	f	typeref:typename:int
yaffs_grab_chunk_cache	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_cache *yaffs_grab_chunk_cache(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_cache *	file:
yaffs_grab_chunk_worker	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_cache *yaffs_grab_chunk_worker(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_cache *	file:
yaffs_guts_initialise	fs/yaffs2/yaffs_guts.c	/^int yaffs_guts_initialise(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_handle_chunk_error	fs/yaffs2/yaffs_guts.c	/^void yaffs_handle_chunk_error(struct yaffs_dev *dev,$/;"	f	typeref:typename:void
yaffs_handle_chunk_update	fs/yaffs2/yaffs_guts.c	/^static void yaffs_handle_chunk_update(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:void	file:
yaffs_handle_chunk_wr_error	fs/yaffs2/yaffs_guts.c	/^static void yaffs_handle_chunk_wr_error(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:void	file:
yaffs_handle_chunk_wr_ok	fs/yaffs2/yaffs_guts.c	/^static void yaffs_handle_chunk_wr_ok(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:void	file:
yaffs_handle_defered_free	fs/yaffs2/yaffs_guts.c	/^void yaffs_handle_defered_free(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_handle_rd_data_error	fs/yaffs2/yaffs_tagscompat.c	/^static void yaffs_handle_rd_data_error(struct yaffs_dev *dev, int nand_chunk)$/;"	f	typeref:typename:void	file:
yaffs_handle_shadowed_obj	fs/yaffs2/yaffs_guts.c	/^void yaffs_handle_shadowed_obj(struct yaffs_dev *dev, int obj_id,$/;"	f	typeref:typename:void
yaffs_hardlink_var	fs/yaffs2/yaffs_guts.h	/^struct yaffs_hardlink_var {$/;"	s
yaffs_has_null_parent	fs/yaffs2/yaffs_guts.c	/^static int yaffs_has_null_parent(struct yaffs_dev *dev, struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs_hash_fn	fs/yaffs2/yaffs_guts.c	/^static inline int yaffs_hash_fn(int n)$/;"	f	typeref:typename:int	file:
yaffs_hash_obj	fs/yaffs2/yaffs_guts.c	/^static void yaffs_hash_obj(struct yaffs_obj *in)$/;"	f	typeref:typename:void	file:
yaffs_init_blocks	fs/yaffs2/yaffs_guts.c	/^static int yaffs_init_blocks(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_init_nand	fs/yaffs2/yaffs_nand.c	/^int yaffs_init_nand(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_init_raw_objs	fs/yaffs2/yaffs_allocator.c	/^static void yaffs_init_raw_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_init_raw_tnodes	fs/yaffs2/yaffs_allocator.c	/^static void yaffs_init_raw_tnodes(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_init_raw_tnodes_and_objs	fs/yaffs2/yaffs_allocator.c	/^void yaffs_init_raw_tnodes_and_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_init_tmp_buffers	fs/yaffs2/yaffs_guts.c	/^static int yaffs_init_tmp_buffers(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_init_tnodes_and_objs	fs/yaffs2/yaffs_guts.c	/^static void yaffs_init_tnodes_and_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_inodecount	fs/yaffs2/yaffsfs.c	/^int yaffs_inodecount(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_invalidate_chunk_cache	fs/yaffs2/yaffs_guts.c	/^static void yaffs_invalidate_chunk_cache(struct yaffs_obj *object, int chunk_id)$/;"	f	typeref:typename:void	file:
yaffs_invalidate_whole_cache	fs/yaffs2/yaffs_guts.c	/^static void yaffs_invalidate_whole_cache(struct yaffs_obj *in)$/;"	f	typeref:typename:void	file:
yaffs_is_managed_tmp_buffer	fs/yaffs2/yaffs_guts.c	/^int yaffs_is_managed_tmp_buffer(struct yaffs_dev *dev, const u8 *buffer)$/;"	f	typeref:typename:int
yaffs_is_non_empty_dir	fs/yaffs2/yaffs_guts.c	/^int yaffs_is_non_empty_dir(struct yaffs_obj *obj)$/;"	f	typeref:typename:int
yaffs_lgetxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_lgetxattr(const YCHAR *path, const char *name, void *data, int size)$/;"	f	typeref:typename:int
yaffs_link	fs/yaffs2/yaffsfs.c	/^int yaffs_link(const YCHAR *oldpath, const YCHAR *linkpath)$/;"	f	typeref:typename:int
yaffs_link_fixup	fs/yaffs2/yaffs_guts.c	/^void yaffs_link_fixup(struct yaffs_dev *dev, struct list_head *hard_list)$/;"	f	typeref:typename:void
yaffs_link_obj	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_link_obj(struct yaffs_obj *parent, const YCHAR * name,$/;"	f	typeref:struct:yaffs_obj *
yaffs_list_xattrib	fs/yaffs2/yaffs_guts.c	/^int yaffs_list_xattrib(struct yaffs_obj *obj, char *buffer, int size)$/;"	f	typeref:typename:int
yaffs_listxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_listxattr(const YCHAR *path, char *data, int size)$/;"	f	typeref:typename:int
yaffs_llistxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_llistxattr(const YCHAR *path, char *data, int size)$/;"	f	typeref:typename:int
yaffs_load_attribs	fs/yaffs2/yaffs_attribs.c	/^void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh)$/;"	f	typeref:typename:void
yaffs_load_attribs_oh	fs/yaffs2/yaffs_attribs.c	/^void yaffs_load_attribs_oh(struct yaffs_obj_hdr *oh, struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_load_current_time	fs/yaffs2/yaffs_attribs.c	/^void yaffs_load_current_time(struct yaffs_obj *obj, int do_a, int do_c)$/;"	f	typeref:typename:void
yaffs_load_name_from_oh	fs/yaffs2/yaffs_guts.c	/^static void yaffs_load_name_from_oh(struct yaffs_dev *dev, YCHAR *name,$/;"	f	typeref:typename:void	file:
yaffs_load_oh_from_name	fs/yaffs2/yaffs_guts.c	/^static void yaffs_load_oh_from_name(struct yaffs_dev *dev, YCHAR *oh_name,$/;"	f	typeref:typename:void	file:
yaffs_load_tags_to_spare	fs/yaffs2/yaffs_tagscompat.c	/^static void yaffs_load_tags_to_spare(struct yaffs_spare *spare_ptr,$/;"	f	typeref:typename:void	file:
yaffs_load_tnode_0	fs/yaffs2/yaffs_guts.c	/^void yaffs_load_tnode_0(struct yaffs_dev *dev, struct yaffs_tnode *tn,$/;"	f	typeref:typename:void
yaffs_lost_n_found	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_lost_n_found(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_obj *
yaffs_lremovexattr	fs/yaffs2/yaffsfs.c	/^int yaffs_lremovexattr(const YCHAR *path, const char *name)$/;"	f	typeref:typename:int
yaffs_lseek	fs/yaffs2/yaffsfs.c	/^loff_t yaffs_lseek(int handle, loff_t offset, int whence)$/;"	f	typeref:typename:loff_t
yaffs_lsetxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_lsetxattr(const YCHAR *path, const char *name,$/;"	f	typeref:typename:int
yaffs_lstat	fs/yaffs2/yaffsfs.c	/^int yaffs_lstat(const YCHAR *path, struct yaffs_stat *buf)$/;"	f	typeref:typename:int
yaffs_malloc	fs/yaffs2/yaffs_uboot_glue.c	/^void *yaffs_malloc(size_t size)$/;"	f	typeref:typename:void *
yaffs_mark_bad	fs/yaffs2/yaffs_nand.c	/^int yaffs_mark_bad(struct yaffs_dev *dev, int block_no)$/;"	f	typeref:typename:int
yaffs_max_file_size	fs/yaffs2/yaffs_guts.c	/^loff_t yaffs_max_file_size(struct yaffs_dev *dev)$/;"	f	typeref:typename:loff_t
yaffs_mkdir	fs/yaffs2/yaffsfs.c	/^int yaffs_mkdir(const YCHAR *path, mode_t mode)$/;"	f	typeref:typename:int
yaffs_mknod	fs/yaffs2/yaffsfs.c	/^int yaffs_mknod(const YCHAR *pathname, mode_t mode, dev_t dev)$/;"	f	typeref:typename:int
yaffs_mount	fs/yaffs2/yaffsfs.c	/^int yaffs_mount(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_mount2	fs/yaffs2/yaffsfs.c	/^int yaffs_mount2(const YCHAR *path, int readonly)$/;"	f	typeref:typename:int
yaffs_mount_common	fs/yaffs2/yaffsfs.c	/^int yaffs_mount_common(const YCHAR *path, int read_only, int skip_checkpt)$/;"	f	typeref:typename:int
yaffs_n_handles	fs/yaffs2/yaffsfs.c	/^int yaffs_n_handles(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_nand_spare	fs/yaffs2/yaffs_guts.h	/^struct yaffs_nand_spare {$/;"	s
yaffs_new_obj	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_new_obj(struct yaffs_dev *dev, int number,$/;"	f	typeref:struct:yaffs_obj *
yaffs_new_obj_id	fs/yaffs2/yaffs_guts.c	/^static int yaffs_new_obj_id(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_next_dev	fs/yaffs2/yaffsfs.c	/^struct yaffs_dev *yaffs_next_dev(void)$/;"	f	typeref:struct:yaffs_dev *
yaffs_obj	fs/yaffs2/yaffs_guts.h	/^struct yaffs_obj {$/;"	s
yaffs_obj_bucket	fs/yaffs2/yaffs_guts.h	/^struct yaffs_obj_bucket {$/;"	s
yaffs_obj_cache_dirty	fs/yaffs2/yaffs_guts.c	/^static int yaffs_obj_cache_dirty(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs_obj_hdr	fs/yaffs2/yaffs_guts.h	/^struct yaffs_obj_hdr {$/;"	s
yaffs_obj_list	fs/yaffs2/yaffs_allocator.c	/^struct yaffs_obj_list {$/;"	s	file:
yaffs_obj_type	fs/yaffs2/yaffs_guts.h	/^enum yaffs_obj_type {$/;"	g
yaffs_obj_var	fs/yaffs2/yaffs_guts.h	/^union yaffs_obj_var {$/;"	u
yaffs_oh_size_load	fs/yaffs2/yaffs_guts.c	/^void yaffs_oh_size_load(struct yaffs_obj_hdr *oh, loff_t fsize)$/;"	f	typeref:typename:void
yaffs_oh_to_size	fs/yaffs2/yaffs_guts.c	/^loff_t yaffs_oh_to_size(struct yaffs_obj_hdr *oh)$/;"	f	typeref:typename:loff_t
yaffs_open	fs/yaffs2/yaffsfs.c	/^int yaffs_open(const YCHAR *path, int oflag, int mode)$/;"	f	typeref:typename:int
yaffs_open_sharing	fs/yaffs2/yaffsfs.c	/^int yaffs_open_sharing(const YCHAR *path, int oflag, int mode, int sharing)$/;"	f	typeref:typename:int
yaffs_opendir	fs/yaffs2/yaffsfs.c	/^yaffs_DIR *yaffs_opendir(const YCHAR *dirname)$/;"	f	typeref:typename:yaffs_DIR *
yaffs_pack_tags1	fs/yaffs2/yaffs_packedtags1.c	/^void yaffs_pack_tags1(struct yaffs_packed_tags1 *pt,$/;"	f	typeref:typename:void
yaffs_pack_tags2	fs/yaffs2/yaffs_packedtags2.c	/^void yaffs_pack_tags2(struct yaffs_packed_tags2 *pt,$/;"	f	typeref:typename:void
yaffs_pack_tags2_tags_only	fs/yaffs2/yaffs_packedtags2.c	/^void yaffs_pack_tags2_tags_only(struct yaffs_packed_tags2_tags_only *ptt,$/;"	f	typeref:typename:void
yaffs_packed_tags1	fs/yaffs2/yaffs_packedtags1.h	/^struct yaffs_packed_tags1 {$/;"	s
yaffs_packed_tags2	fs/yaffs2/yaffs_packedtags2.h	/^struct yaffs_packed_tags2 {$/;"	s
yaffs_packed_tags2_tags_only	fs/yaffs2/yaffs_packedtags2.h	/^struct yaffs_packed_tags2_tags_only {$/;"	s
yaffs_param	fs/yaffs2/yaffs_guts.h	/^struct yaffs_param {$/;"	s
yaffs_pread	fs/yaffs2/yaffsfs.c	/^int yaffs_pread(int handle, void *buf, unsigned int nbyte, loff_t offset)$/;"	f	typeref:typename:int
yaffs_prune_chunks	fs/yaffs2/yaffs_guts.c	/^static void yaffs_prune_chunks(struct yaffs_obj *in, loff_t new_size)$/;"	f	typeref:typename:void	file:
yaffs_prune_tree	fs/yaffs2/yaffs_guts.c	/^static int yaffs_prune_tree(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs_prune_worker	fs/yaffs2/yaffs_guts.c	/^static struct yaffs_tnode *yaffs_prune_worker(struct yaffs_dev *dev,$/;"	f	typeref:struct:yaffs_tnode *	file:
yaffs_put_chunk_in_file	fs/yaffs2/yaffs_guts.c	/^int yaffs_put_chunk_in_file(struct yaffs_obj *in, int inode_chunk,$/;"	f	typeref:typename:int
yaffs_pwrite	fs/yaffs2/yaffsfs.c	/^int yaffs_pwrite(int fd, const void *buf, unsigned int nbyte, loff_t offset)$/;"	f	typeref:typename:int
yaffs_qsort	fs/yaffs2/yaffs_qsort.c	/^yaffs_qsort(void *aa, size_t n, size_t es,$/;"	f	typeref:typename:void
yaffs_query_init_block_state	fs/yaffs2/yaffs_nand.c	/^int yaffs_query_init_block_state(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_rd_chunk_nand	fs/yaffs2/yaffs_tagscompat.c	/^static int yaffs_rd_chunk_nand(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs_rd_chunk_tags_nand	fs/yaffs2/yaffs_nand.c	/^int yaffs_rd_chunk_tags_nand(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:int
yaffs_rd_data_obj	fs/yaffs2/yaffs_guts.c	/^static int yaffs_rd_data_obj(struct yaffs_obj *in, int inode_chunk, u8 * buffer)$/;"	f	typeref:typename:int	file:
yaffs_read	fs/yaffs2/yaffsfs.c	/^int yaffs_read(int handle, void *buf, unsigned int nbyte)$/;"	f	typeref:typename:int
yaffs_readdir	fs/yaffs2/yaffsfs.c	/^struct yaffs_dirent *yaffs_readdir(yaffs_DIR * dirp)$/;"	f	typeref:struct:yaffs_dirent *
yaffs_readlink	fs/yaffs2/yaffsfs.c	/^int yaffs_readlink(const YCHAR *path, YCHAR *buf, int bufsiz)$/;"	f	typeref:typename:int
yaffs_regions_overlap	fs/yaffs2/yaffs_uboot_glue.c	/^static int yaffs_regions_overlap(int a, int b, int x, int y)$/;"	f	typeref:typename:int	file:
yaffs_release_temp_buffer	fs/yaffs2/yaffs_guts.c	/^void yaffs_release_temp_buffer(struct yaffs_dev *dev, u8 *buffer)$/;"	f	typeref:typename:void
yaffs_remount	fs/yaffs2/yaffsfs.c	/^int yaffs_remount(const YCHAR *path, int force, int read_only)$/;"	f	typeref:typename:int
yaffs_remove_device	fs/yaffs2/yaffsfs.c	/^void yaffs_remove_device(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_remove_obj_from_dir	fs/yaffs2/yaffs_guts.c	/^static void yaffs_remove_obj_from_dir(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffs_remove_xattrib	fs/yaffs2/yaffs_guts.c	/^int yaffs_remove_xattrib(struct yaffs_obj *obj, const YCHAR * name)$/;"	f	typeref:typename:int
yaffs_removexattr	fs/yaffs2/yaffsfs.c	/^int yaffs_removexattr(const YCHAR *path, const char *name)$/;"	f	typeref:typename:int
yaffs_rename	fs/yaffs2/yaffsfs.c	/^int yaffs_rename(const YCHAR *oldPath, const YCHAR *newPath)$/;"	f	typeref:typename:int
yaffs_rename_obj	fs/yaffs2/yaffs_guts.c	/^int yaffs_rename_obj(struct yaffs_obj *old_dir, const YCHAR *old_name,$/;"	f	typeref:typename:int
yaffs_resize_file	fs/yaffs2/yaffs_guts.c	/^int yaffs_resize_file(struct yaffs_obj *in, loff_t new_size)$/;"	f	typeref:typename:int
yaffs_resize_file_down	fs/yaffs2/yaffs_guts.c	/^void yaffs_resize_file_down(struct yaffs_obj *obj, loff_t new_size)$/;"	f	typeref:typename:void
yaffs_retire_block	fs/yaffs2/yaffs_guts.c	/^static void yaffs_retire_block(struct yaffs_dev *dev, int flash_block)$/;"	f	typeref:typename:void	file:
yaffs_rewinddir	fs/yaffs2/yaffsfs.c	/^void yaffs_rewinddir(yaffs_DIR *dirp)$/;"	f	typeref:typename:void
yaffs_rmdir	fs/yaffs2/yaffsfs.c	/^int yaffs_rmdir(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_root	fs/yaffs2/yaffs_guts.c	/^struct yaffs_obj *yaffs_root(struct yaffs_dev *dev)$/;"	f	typeref:struct:yaffs_obj *
yaffs_set_attribs	fs/yaffs2/yaffs_attribs.c	/^int yaffs_set_attribs(struct yaffs_obj *obj, struct iattr *attr)$/;"	f	typeref:typename:int
yaffs_set_chunk_bit	fs/yaffs2/yaffs_bitmap.c	/^void yaffs_set_chunk_bit(struct yaffs_dev *dev, int blk, int chunk)$/;"	f	typeref:typename:void
yaffs_set_error	fs/yaffs2/yaffsfs.c	/^int yaffs_set_error(int error)$/;"	f	typeref:typename:int
yaffs_set_obj_name	fs/yaffs2/yaffs_guts.c	/^void yaffs_set_obj_name(struct yaffs_obj *obj, const YCHAR * name)$/;"	f	typeref:typename:void
yaffs_set_obj_name_from_oh	fs/yaffs2/yaffs_guts.c	/^void yaffs_set_obj_name_from_oh(struct yaffs_obj *obj,$/;"	f	typeref:typename:void
yaffs_set_trace	fs/yaffs2/yaffsfs.c	/^unsigned yaffs_set_trace(unsigned tm)$/;"	f	typeref:typename:unsigned
yaffs_set_wince_times	fs/yaffs2/yaffsfs.c	/^int yaffs_set_wince_times(int fd,$/;"	f	typeref:typename:int
yaffs_set_xattrib	fs/yaffs2/yaffs_guts.c	/^int yaffs_set_xattrib(struct yaffs_obj *obj, const YCHAR * name,$/;"	f	typeref:typename:int
yaffs_setxattr	fs/yaffs2/yaffsfs.c	/^int yaffs_setxattr(const YCHAR *path, const char *name,$/;"	f	typeref:typename:int
yaffs_shadow_fixer	fs/yaffs2/yaffs_guts.h	/^struct yaffs_shadow_fixer {$/;"	s
yaffs_skip_full_verification	fs/yaffs2/yaffs_verify.c	/^static int yaffs_skip_full_verification(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_skip_nand_verification	fs/yaffs2/yaffs_verify.c	/^static int yaffs_skip_nand_verification(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffs_skip_rest_of_block	fs/yaffs2/yaffs_guts.c	/^void yaffs_skip_rest_of_block(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_skip_verification	fs/yaffs2/yaffs_verify.c	/^int yaffs_skip_verification(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_soft_del_chunk	fs/yaffs2/yaffs_guts.c	/^static void yaffs_soft_del_chunk(struct yaffs_dev *dev, int chunk)$/;"	f	typeref:typename:void	file:
yaffs_soft_del_file	fs/yaffs2/yaffs_guts.c	/^static void yaffs_soft_del_file(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffs_soft_del_worker	fs/yaffs2/yaffs_guts.c	/^static int yaffs_soft_del_worker(struct yaffs_obj *in, struct yaffs_tnode *tn,$/;"	f	typeref:typename:int	file:
yaffs_spare	fs/yaffs2/yaffs_guts.h	/^struct yaffs_spare {$/;"	s
yaffs_spare_init	fs/yaffs2/yaffs_tagscompat.c	/^static void yaffs_spare_init(struct yaffs_spare *spare)$/;"	f	typeref:typename:void	file:
yaffs_stat	fs/yaffs2/yaffsfs.c	/^int yaffs_stat(const YCHAR *path, struct yaffs_stat *buf)$/;"	f	typeref:typename:int
yaffs_stat	fs/yaffs2/yaffsfs.h	/^struct yaffs_stat {$/;"	s
yaffs_still_some_chunks	fs/yaffs2/yaffs_bitmap.c	/^int yaffs_still_some_chunks(struct yaffs_dev *dev, int blk)$/;"	f	typeref:typename:int
yaffs_strcat	fs/yaffs2/ydirectenv.h	/^#define yaffs_strcat(/;"	d
yaffs_strcmp	fs/yaffs2/ydirectenv.h	/^#define yaffs_strcmp(/;"	d
yaffs_strcpy	fs/yaffs2/ydirectenv.h	/^#define yaffs_strcpy(/;"	d
yaffs_strip_deleted_objs	fs/yaffs2/yaffs_guts.c	/^static void yaffs_strip_deleted_objs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_strncmp	fs/yaffs2/ydirectenv.h	/^#define yaffs_strncmp(/;"	d
yaffs_strncpy	fs/yaffs2/ydirectenv.h	/^#define yaffs_strncpy(/;"	d
yaffs_strnlen	fs/yaffs2/ydirectenv.h	/^#define yaffs_strnlen(/;"	d
yaffs_summary_add	fs/yaffs2/yaffs_summary.c	/^int yaffs_summary_add(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_summary_clear	fs/yaffs2/yaffs_summary.c	/^static void yaffs_summary_clear(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffs_summary_deinit	fs/yaffs2/yaffs_summary.c	/^void yaffs_summary_deinit(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_summary_fetch	fs/yaffs2/yaffs_summary.c	/^int yaffs_summary_fetch(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_summary_gc	fs/yaffs2/yaffs_summary.c	/^void yaffs_summary_gc(struct yaffs_dev *dev, int blk)$/;"	f	typeref:typename:void
yaffs_summary_header	fs/yaffs2/yaffs_summary.c	/^struct yaffs_summary_header {$/;"	s	file:
yaffs_summary_init	fs/yaffs2/yaffs_summary.c	/^int yaffs_summary_init(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
yaffs_summary_read	fs/yaffs2/yaffs_summary.c	/^int yaffs_summary_read(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_summary_sum	fs/yaffs2/yaffs_summary.c	/^static unsigned yaffs_summary_sum(struct yaffs_dev *dev)$/;"	f	typeref:typename:unsigned	file:
yaffs_summary_tags	fs/yaffs2/yaffs_summary.c	/^struct yaffs_summary_tags {$/;"	s	file:
yaffs_summary_write	fs/yaffs2/yaffs_summary.c	/^static int yaffs_summary_write(struct yaffs_dev *dev, int blk)$/;"	f	typeref:typename:int	file:
yaffs_symlink	fs/yaffs2/yaffsfs.c	/^int yaffs_symlink(const YCHAR *oldpath, const YCHAR *newpath)$/;"	f	typeref:typename:int
yaffs_symlink_var	fs/yaffs2/yaffs_guts.h	/^struct yaffs_symlink_var {$/;"	s
yaffs_sync	fs/yaffs2/yaffsfs.c	/^int yaffs_sync(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_tags	fs/yaffs2/yaffs_guts.h	/^struct yaffs_tags {$/;"	s
yaffs_tags_compat_mark_bad	fs/yaffs2/yaffs_tagscompat.c	/^int yaffs_tags_compat_mark_bad(struct yaffs_dev *dev, int flash_block)$/;"	f	typeref:typename:int
yaffs_tags_compat_query_block	fs/yaffs2/yaffs_tagscompat.c	/^int yaffs_tags_compat_query_block(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_tags_compat_rd	fs/yaffs2/yaffs_tagscompat.c	/^int yaffs_tags_compat_rd(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_tags_compat_wr	fs/yaffs2/yaffs_tagscompat.c	/^int yaffs_tags_compat_wr(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_tags_match	fs/yaffs2/yaffs_guts.c	/^static int yaffs_tags_match(const struct yaffs_ext_tags *tags, int obj_id,$/;"	f	typeref:typename:int	file:
yaffs_tags_union	fs/yaffs2/yaffs_guts.h	/^union yaffs_tags_union {$/;"	u
yaffs_tnode	fs/yaffs2/yaffs_guts.h	/^struct yaffs_tnode {$/;"	s
yaffs_tnode_list	fs/yaffs2/yaffs_allocator.c	/^struct yaffs_tnode_list {$/;"	s	file:
yaffs_totalspace	fs/yaffs2/yaffsfs.c	/^loff_t yaffs_totalspace(const YCHAR *path)$/;"	f	typeref:typename:loff_t
yaffs_toupper	fs/yaffs2/yaffsfs.c	/^static int yaffs_toupper(YCHAR a)$/;"	f	typeref:typename:int	file:
yaffs_trace	fs/yaffs2/ydirectenv.h	/^#define yaffs_trace(/;"	d
yaffs_trace_mask	fs/yaffs2/yaffs_uboot_glue.c	/^unsigned yaffs_trace_mask = 0x0; \/* Disable logging *\/$/;"	v	typeref:typename:unsigned
yaffs_truncate	fs/yaffs2/yaffsfs.c	/^int yaffs_truncate(const YCHAR *path, loff_t new_size)$/;"	f	typeref:typename:int
yaffs_unhash_obj	fs/yaffs2/yaffs_guts.c	/^static void yaffs_unhash_obj(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffs_unlink	fs/yaffs2/yaffsfs.c	/^int yaffs_unlink(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_unlink_file_if_needed	fs/yaffs2/yaffs_guts.c	/^static int yaffs_unlink_file_if_needed(struct yaffs_obj *in)$/;"	f	typeref:typename:int	file:
yaffs_unlink_obj	fs/yaffs2/yaffs_guts.c	/^static int yaffs_unlink_obj(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs_unlink_worker	fs/yaffs2/yaffs_guts.c	/^static int yaffs_unlink_worker(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffs_unlinker	fs/yaffs2/yaffs_guts.c	/^int yaffs_unlinker(struct yaffs_obj *dir, const YCHAR *name)$/;"	f	typeref:typename:int
yaffs_unmount	fs/yaffs2/yaffsfs.c	/^int yaffs_unmount(const YCHAR *path)$/;"	f	typeref:typename:int
yaffs_unmount2	fs/yaffs2/yaffsfs.c	/^int yaffs_unmount2(const YCHAR *path, int force)$/;"	f	typeref:typename:int
yaffs_unpack_tags1	fs/yaffs2/yaffs_packedtags1.c	/^void yaffs_unpack_tags1(struct yaffs_ext_tags *t,$/;"	f	typeref:typename:void
yaffs_unpack_tags2	fs/yaffs2/yaffs_packedtags2.c	/^void yaffs_unpack_tags2(struct yaffs_ext_tags *t, struct yaffs_packed_tags2 *pt,$/;"	f	typeref:typename:void
yaffs_unpack_tags2_tags_only	fs/yaffs2/yaffs_packedtags2.c	/^void yaffs_unpack_tags2_tags_only(struct yaffs_ext_tags *t,$/;"	f	typeref:typename:void
yaffs_update_dirty_dirs	fs/yaffs2/yaffs_guts.c	/^void yaffs_update_dirty_dirs(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_update_oh	fs/yaffs2/yaffs_guts.c	/^int yaffs_update_oh(struct yaffs_obj *in, const YCHAR *name, int force,$/;"	f	typeref:typename:int
yaffs_update_parent	fs/yaffs2/yaffs_guts.c	/^static void yaffs_update_parent(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffs_use_cache	fs/yaffs2/yaffs_guts.c	/^static void yaffs_use_cache(struct yaffs_dev *dev, struct yaffs_cache *cache,$/;"	f	typeref:typename:void	file:
yaffs_utimbuf	fs/yaffs2/yaffsfs.h	/^struct yaffs_utimbuf {$/;"	s
yaffs_utime	fs/yaffs2/yaffsfs.c	/^int yaffs_utime(const YCHAR *path, const struct yaffs_utimbuf *buf)$/;"	f	typeref:typename:int
yaffs_verify_blk	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_blk(struct yaffs_dev *dev, struct yaffs_block_info *bi, int n)$/;"	f	typeref:typename:void
yaffs_verify_blocks	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_blocks(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_verify_chunk_bit_id	fs/yaffs2/yaffs_bitmap.c	/^void yaffs_verify_chunk_bit_id(struct yaffs_dev *dev, int blk, int chunk)$/;"	f	typeref:typename:void
yaffs_verify_chunk_written	fs/yaffs2/yaffs_guts.c	/^static int yaffs_verify_chunk_written(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs_verify_collected_blk	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_collected_blk(struct yaffs_dev *dev,$/;"	f	typeref:typename:void
yaffs_verify_dir	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_dir(struct yaffs_obj *directory)$/;"	f	typeref:typename:void
yaffs_verify_file	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_file(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_verify_file_sane	fs/yaffs2/yaffs_verify.c	/^int yaffs_verify_file_sane(struct yaffs_obj *in)$/;"	f	typeref:typename:int
yaffs_verify_free_chunks	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_free_chunks(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_verify_link	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_link(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_verify_obj	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_obj(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_verify_obj_in_dir	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_obj_in_dir(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_verify_objects	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_objects(struct yaffs_dev *dev)$/;"	f	typeref:typename:void
yaffs_verify_oh	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_oh(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh,$/;"	f	typeref:typename:void
yaffs_verify_special	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_special(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_verify_symlink	fs/yaffs2/yaffs_verify.c	/^void yaffs_verify_symlink(struct yaffs_obj *obj)$/;"	f	typeref:typename:void
yaffs_wr_attempts	fs/yaffs2/yaffsfs.c	/^unsigned int yaffs_wr_attempts;$/;"	v	typeref:typename:unsigned int
yaffs_wr_chunk_tags_nand	fs/yaffs2/yaffs_nand.c	/^int yaffs_wr_chunk_tags_nand(struct yaffs_dev *dev,$/;"	f	typeref:typename:int
yaffs_wr_data_obj	fs/yaffs2/yaffs_guts.c	/^static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk,$/;"	f	typeref:typename:int	file:
yaffs_wr_file	fs/yaffs2/yaffs_guts.c	/^int yaffs_wr_file(struct yaffs_obj *in, const u8 *buffer, loff_t offset,$/;"	f	typeref:typename:int
yaffs_wr_nand	fs/yaffs2/yaffs_tagscompat.c	/^static int yaffs_wr_nand(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs_write	fs/yaffs2/yaffsfs.c	/^int yaffs_write(int fd, const void *buf, unsigned int nbyte)$/;"	f	typeref:typename:int
yaffs_write_new_chunk	fs/yaffs2/yaffs_guts.c	/^static int yaffs_write_new_chunk(struct yaffs_dev *dev,$/;"	f	typeref:typename:int	file:
yaffs_xattr_mod	fs/yaffs2/yaffs_guts.h	/^struct yaffs_xattr_mod {$/;"	s
yaffsfs_BreakDeviceHandles	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_BreakDeviceHandles(struct yaffs_dev *dev)$/;"	f	typeref:typename:void	file:
yaffsfs_CheckNameLength	fs/yaffs2/yaffsfs.c	/^int yaffsfs_CheckNameLength(const char *name)$/;"	f	typeref:typename:int
yaffsfs_CheckPath	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_CheckPath(const YCHAR *path)$/;"	f	typeref:typename:int	file:
yaffsfs_CountHandles	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_CountHandles(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffsfs_CurrentTime	fs/yaffs2/yaffs_uboot_glue.c	/^__u32 yaffsfs_CurrentTime(void)$/;"	f	typeref:typename:__u32
yaffsfs_DeviceConfiguration	fs/yaffs2/yaffscfg.h	/^struct yaffsfs_DeviceConfiguration {$/;"	s
yaffsfs_DirAdvance	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_DirAdvance(struct yaffsfs_DirSearchContxt *dsc)$/;"	f	typeref:typename:void	file:
yaffsfs_DirSearchContxt	fs/yaffs2/yaffsfs.c	/^struct yaffsfs_DirSearchContxt {$/;"	s	file:
yaffsfs_DoChMod	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_DoChMod(struct yaffs_obj *obj, mode_t mode)$/;"	f	typeref:typename:int	file:
yaffsfs_DoFindDirectory	fs/yaffs2/yaffsfs.c	/^static struct yaffs_obj *yaffsfs_DoFindDirectory(struct yaffs_obj *startDir,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffsfs_DoStat	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_DoStat(struct yaffs_obj *obj, struct yaffs_stat *buf)$/;"	f	typeref:typename:int	file:
yaffsfs_DoStatOrLStat	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_DoStatOrLStat(const YCHAR *path,$/;"	f	typeref:typename:int	file:
yaffsfs_DoUnlink	fs/yaffs2/yaffsfs.c	/^int yaffsfs_DoUnlink(const YCHAR *path, int isDirectory)$/;"	f	typeref:typename:int
yaffsfs_DoUtime	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_DoUtime(struct yaffs_obj *obj,$/;"	f	typeref:typename:int	file:
yaffsfs_FileDes	fs/yaffs2/yaffsfs.c	/^struct yaffsfs_FileDes {$/;"	s	file:
yaffsfs_FindDevice	fs/yaffs2/yaffsfs.c	/^static struct yaffs_dev *yaffsfs_FindDevice(const YCHAR *path,$/;"	f	typeref:struct:yaffs_dev *	file:
yaffsfs_FindDirectory	fs/yaffs2/yaffsfs.c	/^static struct yaffs_obj *yaffsfs_FindDirectory(struct yaffs_obj *relDir,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffsfs_FindInodeIdForObject	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_FindInodeIdForObject(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffsfs_FindMountPoint	fs/yaffs2/yaffsfs.c	/^static struct yaffs_dev *yaffsfs_FindMountPoint(const YCHAR *path)$/;"	f	typeref:struct:yaffs_dev *	file:
yaffsfs_FindObject	fs/yaffs2/yaffsfs.c	/^static struct yaffs_obj *yaffsfs_FindObject(struct yaffs_obj *relDir,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffsfs_FindRoot	fs/yaffs2/yaffsfs.c	/^static struct yaffs_obj *yaffsfs_FindRoot(const YCHAR *path,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffsfs_FollowLink	fs/yaffs2/yaffsfs.c	/^static struct yaffs_obj *yaffsfs_FollowLink(struct yaffs_obj *obj,$/;"	f	typeref:struct:yaffs_obj *	file:
yaffsfs_GetError	fs/yaffs2/yaffs_uboot_glue.c	/^int yaffsfs_GetError(void)$/;"	f	typeref:typename:int
yaffsfs_GetHandle	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_GetHandle(int handle)$/;"	f	typeref:typename:int	file:
yaffsfs_GetInodeIdForObject	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_GetInodeIdForObject(struct yaffs_obj *obj)$/;"	f	typeref:typename:int	file:
yaffsfs_GetLastError	fs/yaffs2/yaffs_uboot_glue.c	/^int yaffsfs_GetLastError(void)$/;"	f	typeref:typename:int
yaffsfs_Handle	fs/yaffs2/yaffsfs.c	/^struct yaffsfs_Handle {$/;"	s	file:
yaffsfs_HandleToFileDes	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_FileDes *yaffsfs_HandleToFileDes(int handle)$/;"	f	typeref:struct:yaffsfs_FileDes *	file:
yaffsfs_HandleToInode	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_Inode *yaffsfs_HandleToInode(int handle)$/;"	f	typeref:struct:yaffsfs_Inode *	file:
yaffsfs_HandleToObject	fs/yaffs2/yaffsfs.c	/^static struct yaffs_obj *yaffsfs_HandleToObject(int handle)$/;"	f	typeref:struct:yaffs_obj *	file:
yaffsfs_HandleToPointer	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_Handle *yaffsfs_HandleToPointer(int h)$/;"	f	typeref:struct:yaffsfs_Handle *	file:
yaffsfs_InitHandles	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_InitHandles(void)$/;"	f	typeref:typename:void	file:
yaffsfs_Inode	fs/yaffs2/yaffsfs.c	/^struct yaffsfs_Inode {$/;"	s	file:
yaffsfs_IsDevBusy	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_IsDevBusy(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffsfs_IsPathDivider	fs/yaffs2/yaffsfs.c	/^int yaffsfs_IsPathDivider(YCHAR ch)$/;"	f	typeref:typename:int
yaffsfs_LocalInitialisation	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffsfs_LocalInitialisation(void)$/;"	f	typeref:typename:void
yaffsfs_Lock	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffsfs_Lock(void)$/;"	f	typeref:typename:void
yaffsfs_Match	fs/yaffs2/yaffsfs.c	/^int yaffsfs_Match(YCHAR a, YCHAR b)$/;"	f	typeref:typename:int
yaffsfs_NewHandle	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_NewHandle(struct yaffsfs_Handle **hptr)$/;"	f	typeref:typename:int	file:
yaffsfs_NewHandleAndFileDes	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_NewHandleAndFileDes(void)$/;"	f	typeref:typename:int	file:
yaffsfs_PutFileDes	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_PutFileDes(int fdId)$/;"	f	typeref:typename:int	file:
yaffsfs_PutHandle	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_PutHandle(int handle)$/;"	f	typeref:typename:int	file:
yaffsfs_PutInode	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_PutInode(int inodeId)$/;"	f	typeref:typename:void	file:
yaffsfs_ReleaseInode	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_ReleaseInode(struct yaffsfs_Inode *in)$/;"	f	typeref:typename:void	file:
yaffsfs_RemoveObjectCallback	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_RemoveObjectCallback(struct yaffs_obj *obj)$/;"	f	typeref:typename:void	file:
yaffsfs_SetDirRewound	fs/yaffs2/yaffsfs.c	/^static void yaffsfs_SetDirRewound(struct yaffsfs_DirSearchContxt *dsc)$/;"	f	typeref:typename:void	file:
yaffsfs_SetError	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffsfs_SetError(int err)$/;"	f	typeref:typename:void
yaffsfs_TooManyObjects	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_TooManyObjects(struct yaffs_dev *dev)$/;"	f	typeref:typename:int	file:
yaffsfs_Unlock	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffsfs_Unlock(void)$/;"	f	typeref:typename:void
yaffsfs_alt_dir_path	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_alt_dir_path(const YCHAR *path, YCHAR **ret_path)$/;"	f	typeref:typename:int	file:
yaffsfs_do_read	fs/yaffs2/yaffsfs.c	/^int yaffsfs_do_read(int handle, void *vbuf, unsigned int nbyte,$/;"	f	typeref:typename:int
yaffsfs_do_write	fs/yaffs2/yaffsfs.c	/^int yaffsfs_do_write(int handle, const void *vbuf, unsigned int nbyte,$/;"	f	typeref:typename:int
yaffsfs_dsc	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_DirSearchContxt yaffsfs_dsc[YAFFSFS_N_DSC];$/;"	v	typeref:struct:yaffsfs_DirSearchContxt[]	file:
yaffsfs_fd	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_FileDes yaffsfs_fd[YAFFSFS_N_HANDLES];$/;"	v	typeref:struct:yaffsfs_FileDes[]	file:
yaffsfs_free	fs/yaffs2/yaffs_uboot_glue.c	/^void yaffsfs_free(void *x)$/;"	f	typeref:typename:void
yaffsfs_handle	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_Handle yaffsfs_handle[YAFFSFS_N_HANDLES];$/;"	v	typeref:struct:yaffsfs_Handle[]	file:
yaffsfs_handlesInitialised	fs/yaffs2/yaffsfs.c	/^static int yaffsfs_handlesInitialised;$/;"	v	typeref:typename:int	file:
yaffsfs_inode	fs/yaffs2/yaffsfs.c	/^static struct yaffsfs_Inode yaffsfs_inode[YAFFSFS_N_HANDLES];$/;"	v	typeref:struct:yaffsfs_Inode[]	file:
yaffsfs_malloc	fs/yaffs2/yaffs_uboot_glue.c	/^void *yaffsfs_malloc(size_t x)$/;"	f	typeref:typename:void *
yb	drivers/video/mx3fb.c	/^	u32	yb:12;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:12	file:
yb	drivers/video/mx3fb.c	/^	u32	yb:12;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:12	file:
ycbcr2rgb_coeff	drivers/video/ipu_disp.c	/^static const int ycbcr2rgb_coeff[5][3] = {$/;"	v	typeref:typename:const int[5][3]	file:
ycbcr_coeff	arch/arm/mach-exynos/include/mach/dp_info.h	/^	unsigned int ycbcr_coeff;$/;"	m	struct:edp_video_info	typeref:typename:unsigned int
ycur	include/video_console.h	/^	int ycur;$/;"	m	struct:vidconsole_priv	typeref:typename:int
year	arch/arm/include/asm/davinci_rtc.h	/^	unsigned int	year;$/;"	m	struct:davinci_rtc	typeref:typename:unsigned int
year	drivers/rtc/ds1302.c	/^	unsigned char year:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
year	include/edid.h	/^	unsigned char year;$/;"	m	struct:edid1_info	typeref:typename:unsigned char
year	include/efi.h	/^	u16 year;$/;"	m	struct:efi_time	typeref:typename:u16
year	include/linux/fb.h	/^	__u32 year;			\/* Year manufactured *\/$/;"	m	struct:fb_monspecs	typeref:typename:__u32
year10	drivers/rtc/ds1302.c	/^	unsigned char year10:4;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:4	file:
year2cb	drivers/rtc/m41t60.c	/^static unsigned char year2cb(unsigned const year)$/;"	f	typeref:typename:unsigned char	file:
year_lengths	include/linux/time.h	/^    static _CONST int year_lengths[2] = {$/;"	m	struct:_DEFUN	typeref:typename:_CONST int[2]
yellow_hexagon	drivers/demo/demo-pdata.c	/^static const struct dm_demo_pdata yellow_hexagon = {$/;"	v	typeref:typename:const struct dm_demo_pdata	file:
yellow_led_off	arch/arm/mach-at91/arm926ejs/led.c	/^void yellow_led_off(void)$/;"	f	typeref:typename:void
yellow_led_off	board/atmel/at91rm9200ek/led.c	/^void	yellow_led_off(void)$/;"	f	typeref:typename:void
yellow_led_off	common/board_f.c	/^__weak void yellow_led_off(void) {}$/;"	f	typeref:typename:__weak void
yellow_led_off	drivers/misc/gpio_led.c	/^void yellow_led_off(void)$/;"	f	typeref:typename:void
yellow_led_on	arch/arm/mach-at91/arm926ejs/led.c	/^void yellow_led_on(void)$/;"	f	typeref:typename:void
yellow_led_on	board/atmel/at91rm9200ek/led.c	/^void	 yellow_led_on(void)$/;"	f	typeref:typename:void
yellow_led_on	common/board_f.c	/^__weak void yellow_led_on(void) {}$/;"	f	typeref:typename:__weak void
yellow_led_on	drivers/misc/gpio_led.c	/^void yellow_led_on(void)$/;"	f	typeref:typename:void
yes	scripts/kconfig/expr.h	/^	no, mod, yes$/;"	e	enum:tristate
yesColIdx	scripts/kconfig/qconf.h	/^	promptColIdx, nameColIdx, noColIdx, modColIdx, yesColIdx, dataColIdx, colNr$/;"	e	enum:colIdx
yh	arch/arm/lib/div64.S	/^#define yh /;"	d	file:
yh	arch/arm/lib/muldi3.S	/^#define yh /;"	d	file:
yield	include/linux/compat.h	/^#define yield(/;"	d
yl	arch/arm/lib/div64.S	/^#define yl /;"	d	file:
yl	arch/arm/lib/muldi3.S	/^#define yl /;"	d	file:
yleap	include/linux/time.h	/^    int yleap;$/;"	m	struct:_DEFUN	typeref:typename:int
ymodem_fit_info	common/spl/spl_ymodem.c	/^struct ymodem_fit_info {$/;"	s	file:
ymodem_read_fit	common/spl/spl_ymodem.c	/^static ulong ymodem_read_fit(struct spl_load_info *load, ulong offset,$/;"	f	typeref:typename:ulong	file:
ynandif_Deinitialise_flash_fn	fs/yaffs2/yaffs_nandif.c	/^int ynandif_Deinitialise_flash_fn(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
ynandif_EraseBlockInNAND	fs/yaffs2/yaffs_nandif.c	/^int ynandif_EraseBlockInNAND(struct yaffs_dev *dev, int blockId)$/;"	f	typeref:typename:int
ynandif_Geometry	fs/yaffs2/yaffs_nandif.h	/^struct ynandif_Geometry {$/;"	s
ynandif_InitialiseNAND	fs/yaffs2/yaffs_nandif.c	/^int ynandif_InitialiseNAND(struct yaffs_dev *dev)$/;"	f	typeref:typename:int
ynandif_IsBlockOk	fs/yaffs2/yaffs_nandif.c	/^static int ynandif_IsBlockOk(struct yaffs_dev *dev, int blockId)$/;"	f	typeref:typename:int	file:
ynandif_MarkNANDBlockBad	fs/yaffs2/yaffs_nandif.c	/^int ynandif_MarkNANDBlockBad(struct yaffs_dev *dev, int blockId)$/;"	f	typeref:typename:int
ynandif_QueryNANDBlock	fs/yaffs2/yaffs_nandif.c	/^int ynandif_QueryNANDBlock(struct yaffs_dev *dev, int blockId,$/;"	f	typeref:typename:int
ynandif_ReadChunkWithTagsFromNAND	fs/yaffs2/yaffs_nandif.c	/^int ynandif_ReadChunkWithTagsFromNAND(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:int
ynandif_WriteChunkWithTagsToNAND	fs/yaffs2/yaffs_nandif.c	/^int ynandif_WriteChunkWithTagsToNAND(struct yaffs_dev *dev, int nand_chunk,$/;"	f	typeref:typename:int
yoff	drivers/video/stb_truetype.h	/^   float xoff,yoff,xadvance;$/;"	m	struct:__anonce392f790108	typeref:typename:float
yoff	drivers/video/stb_truetype.h	/^   float xoff,yoff,xadvance;$/;"	m	struct:__anonce392f790308	typeref:typename:float
yoff2	drivers/video/stb_truetype.h	/^   float xoff2,yoff2;$/;"	m	struct:__anonce392f790308	typeref:typename:float
yoffset	include/linux/fb.h	/^	__u32 yoffset;			\/* resolution			*\/$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
ypanstep	include/linux/fb.h	/^	__u16 ypanstep;			\/* zero if no hardware panning	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u16
ypos	drivers/video/console_truetype.c	/^	int ypos;$/;"	m	struct:pos_info	typeref:typename:int	file:
yprintk	drivers/usb/musb-new/musb_debug.h	/^#define yprintk(/;"	d
yres	board/teejet/mt_ventoux/mt_ventoux.c	/^	u32 yres;$/;"	m	struct:__anon67535ffe0108	typeref:typename:u32	file:
yres	drivers/video/videomodes.h	/^	int yres;$/;"	m	struct:ctfb_res_modes	typeref:typename:int
yres	include/dm/test.h	/^	int yres;$/;"	m	struct:sandbox_sdl_plat	typeref:typename:int
yres	include/linux/fb.h	/^	__u32 yres;$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
yres	include/linux/fb.h	/^	u32 yres;$/;"	m	struct:fb_videomode	typeref:typename:u32
yres_virtual	include/linux/fb.h	/^	__u32 yres_virtual;$/;"	m	struct:fb_var_screeninfo	typeref:typename:__u32
ysize	include/video.h	/^	ushort ysize;$/;"	m	struct:video_priv	typeref:typename:ushort
yst_atime	fs/yaffs2/yaffs_guts.h	/^	u32 yst_atime;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_atime	fs/yaffs2/yaffs_guts.h	/^	u32 yst_atime;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_atime	fs/yaffs2/yaffsfs.h	/^	unsigned long	yst_atime;	\/* time of last access *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long
yst_ctime	fs/yaffs2/yaffs_guts.h	/^	u32 yst_ctime;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_ctime	fs/yaffs2/yaffs_guts.h	/^	u32 yst_ctime;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_ctime	fs/yaffs2/yaffsfs.h	/^	unsigned long	yst_ctime;	\/* time of last change *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long
yst_gid	fs/yaffs2/yaffs_guts.h	/^	u32 yst_gid;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_gid	fs/yaffs2/yaffs_guts.h	/^	u32 yst_gid;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_mode	fs/yaffs2/yaffs_guts.h	/^	u32 yst_mode;		\/* protection *\/$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_mode	fs/yaffs2/yaffs_guts.h	/^	u32 yst_mode;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_mtime	fs/yaffs2/yaffs_guts.h	/^	u32 yst_mtime;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_mtime	fs/yaffs2/yaffs_guts.h	/^	u32 yst_mtime;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_mtime	fs/yaffs2/yaffsfs.h	/^	unsigned long	yst_mtime;	\/* time of last modification *\/$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long
yst_rdev	fs/yaffs2/yaffs_guts.h	/^	u32 yst_rdev;	\/* stuff for block and char devices (major\/min) *\/$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_rdev	fs/yaffs2/yaffs_guts.h	/^	u32 yst_rdev;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_uid	fs/yaffs2/yaffs_guts.h	/^	u32 yst_uid;$/;"	m	struct:yaffs_obj	typeref:typename:u32
yst_uid	fs/yaffs2/yaffs_guts.h	/^	u32 yst_uid;$/;"	m	struct:yaffs_obj_hdr	typeref:typename:u32
yst_wince_atime	fs/yaffs2/yaffsfs.h	/^	unsigned long	yst_wince_atime[2];$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long[2]
yst_wince_ctime	fs/yaffs2/yaffsfs.h	/^	unsigned long	yst_wince_ctime[2];$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long[2]
yst_wince_mtime	fs/yaffs2/yaffsfs.h	/^	unsigned long	yst_wince_mtime[2];$/;"	m	struct:yaffs_stat	typeref:typename:unsigned long[2]
yswap	fs/yaffs2/yaffs_qsort.c	/^#define yswap(/;"	d	file:
yuyv	tools/easylogo/easylogo.c	/^	int width, height, pixels, bpp, pixel_size, size, palette_size, yuyv;$/;"	m	struct:__anonbf0fd82b0508	typeref:typename:int	file:
yuyv_t	tools/easylogo/easylogo.c	/^} yuyv_t;$/;"	t	typeref:struct:__anonbf0fd82b0408	file:
yv	drivers/video/mx3fb.c	/^	u32	yv:10;$/;"	m	struct:chan_param_mem_interleaved	typeref:typename:u32:10	file:
yv	drivers/video/mx3fb.c	/^	u32	yv:10;$/;"	m	struct:chan_param_mem_planar	typeref:typename:u32:10	file:
ywrapstep	include/linux/fb.h	/^	__u16 ywrapstep;		\/* zero if no hardware ywrap	*\/$/;"	m	struct:fb_fix_screeninfo	typeref:typename:__u16
yy_accept	scripts/kconfig/zconf.lex.c	/^static yyconst flex_int16_t yy_accept[61] =$/;"	v	typeref:typename:yyconst flex_int16_t[61]	file:
yy_act	scripts/kconfig/zconf.lex.c	/^	register int yy_act;$/;"	v	typeref:typename:register int
yy_amount_of_matched_text	scripts/kconfig/zconf.lex.c	/^		int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;$/;"	v	typeref:typename:int
yy_at_bol	scripts/kconfig/zconf.lex.c	/^	int yy_at_bol;$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_bp	scripts/kconfig/zconf.lex.c	/^	register char *yy_cp, *yy_bp;$/;"	v	typeref:typename:register char *
yy_bs_column	scripts/kconfig/zconf.lex.c	/^    int yy_bs_column; \/**< The column count. *\/$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_bs_lineno	scripts/kconfig/zconf.lex.c	/^    int yy_bs_lineno; \/**< The line count. *\/$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_buf_pos	scripts/kconfig/zconf.lex.c	/^	char *yy_buf_pos;		\/* current position in input buffer *\/$/;"	m	struct:yy_buffer_state	typeref:typename:char *	file:
yy_buf_size	scripts/kconfig/zconf.lex.c	/^	yy_size_t yy_buf_size;$/;"	m	struct:yy_buffer_state	typeref:typename:yy_size_t	file:
yy_buffer_stack	scripts/kconfig/zconf.lex.c	/^static YY_BUFFER_STATE * yy_buffer_stack = 0; \/**< Stack as an array. *\/$/;"	v	typeref:typename:YY_BUFFER_STATE *	file:
yy_buffer_stack_max	scripts/kconfig/zconf.lex.c	/^static size_t yy_buffer_stack_max = 0; \/**< capacity of stack. *\/$/;"	v	typeref:typename:size_t	file:
yy_buffer_stack_top	scripts/kconfig/zconf.lex.c	/^static size_t yy_buffer_stack_top = 0; \/**< index of top of stack. *\/$/;"	v	typeref:typename:size_t	file:
yy_buffer_state	scripts/kconfig/zconf.lex.c	/^struct yy_buffer_state$/;"	s	file:
yy_buffer_status	scripts/kconfig/zconf.lex.c	/^	int yy_buffer_status;$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_c_buf_p	scripts/kconfig/zconf.lex.c	/^static char *yy_c_buf_p = (char *) 0;$/;"	v	typeref:typename:char *	file:
yy_ch_buf	scripts/kconfig/zconf.lex.c	/^	char *yy_ch_buf;		\/* input buffer *\/$/;"	m	struct:yy_buffer_state	typeref:typename:char *	file:
yy_cp	scripts/kconfig/zconf.lex.c	/^	register char *yy_cp, *yy_bp;$/;"	v	typeref:typename:register char *
yy_create_buffer	scripts/kconfig/zconf.lex.c	/^#define yy_create_buffer /;"	d	file:
yy_current_state	scripts/kconfig/zconf.lex.c	/^	register yy_state_type yy_current_state;$/;"	v	typeref:typename:register yy_state_type
yy_delete_buffer	scripts/kconfig/zconf.lex.c	/^#define yy_delete_buffer /;"	d	file:
yy_did_buffer_switch_on_eof	scripts/kconfig/zconf.lex.c	/^static int yy_did_buffer_switch_on_eof;$/;"	v	typeref:typename:int	file:
yy_ec	scripts/kconfig/zconf.lex.c	/^static yyconst flex_int32_t yy_ec[256] =$/;"	v	typeref:typename:yyconst flex_int32_t[256]	file:
yy_fatal_error	scripts/kconfig/zconf.lex.c	/^static void yy_fatal_error (yyconst char* msg )$/;"	f	typeref:typename:void	file:
yy_fill_buffer	scripts/kconfig/zconf.lex.c	/^	int yy_fill_buffer;$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_flex_debug	scripts/kconfig/zconf.lex.c	/^#define yy_flex_debug /;"	d	file:
yy_flex_strlen	scripts/kconfig/zconf.lex.c	/^static int yy_flex_strlen (yyconst char * s )$/;"	f	typeref:typename:int	file:
yy_flex_strncpy	scripts/kconfig/zconf.lex.c	/^static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )$/;"	f	typeref:typename:void	file:
yy_flush_buffer	scripts/kconfig/zconf.lex.c	/^#define yy_flush_buffer /;"	d	file:
yy_get_next_buffer	scripts/kconfig/zconf.lex.c	/^static int yy_get_next_buffer (void)$/;"	f	typeref:typename:int	file:
yy_get_previous_state	scripts/kconfig/zconf.lex.c	/^    static yy_state_type yy_get_previous_state (void)$/;"	f	typeref:typename:yy_state_type	file:
yy_hold_char	scripts/kconfig/zconf.lex.c	/^static char yy_hold_char;$/;"	v	typeref:typename:char	file:
yy_init	scripts/kconfig/zconf.lex.c	/^static int yy_init = 0;		\/* whether we need to initialize *\/$/;"	v	typeref:typename:int	file:
yy_init_buffer	scripts/kconfig/zconf.lex.c	/^#define yy_init_buffer /;"	d	file:
yy_init_globals	scripts/kconfig/zconf.lex.c	/^static int yy_init_globals (void)$/;"	f	typeref:typename:int	file:
yy_input_file	scripts/kconfig/zconf.lex.c	/^	FILE *yy_input_file;$/;"	m	struct:yy_buffer_state	typeref:typename:FILE *	file:
yy_is_interactive	scripts/kconfig/zconf.lex.c	/^	int yy_is_interactive;$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_is_our_buffer	scripts/kconfig/zconf.lex.c	/^	int yy_is_our_buffer;$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_load_buffer_state	scripts/kconfig/zconf.lex.c	/^#define yy_load_buffer_state /;"	d	file:
yy_n_chars	scripts/kconfig/zconf.lex.c	/^	int yy_n_chars;$/;"	m	struct:yy_buffer_state	typeref:typename:int	file:
yy_n_chars	scripts/kconfig/zconf.lex.c	/^static int yy_n_chars;		\/* number of characters read into yy_ch_buf *\/$/;"	v	typeref:typename:int	file:
yy_new_buffer	scripts/kconfig/zconf.lex.c	/^#define yy_new_buffer /;"	d	file:
yy_next_state	scripts/kconfig/zconf.lex.c	/^			yy_state_type yy_next_state;$/;"	v	typeref:typename:yy_state_type
yy_nxt	scripts/kconfig/zconf.lex.c	/^	flex_int32_t yy_nxt;$/;"	m	struct:yy_trans_info	typeref:typename:flex_int32_t	file:
yy_nxt	scripts/kconfig/zconf.lex.c	/^static yyconst flex_int16_t yy_nxt[][17] =$/;"	v	typeref:typename:yyconst flex_int16_t[][17]	file:
yy_reduce_print	scripts/kconfig/zconf.tab.c	/^yy_reduce_print (YYSTYPE *yyvsp, int yyrule)$/;"	f	typeref:typename:void	file:
yy_set_bol	scripts/kconfig/zconf.lex.c	/^#define yy_set_bol(/;"	d	file:
yy_set_interactive	scripts/kconfig/zconf.lex.c	/^#define yy_set_interactive(/;"	d	file:
yy_size_t	scripts/kconfig/zconf.lex.c	/^typedef size_t yy_size_t;$/;"	t	typeref:typename:size_t	file:
yy_stack_print	scripts/kconfig/zconf.tab.c	/^yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop)$/;"	f	typeref:typename:void	file:
yy_start	scripts/kconfig/zconf.lex.c	/^static int yy_start = 0;	\/* start state number *\/$/;"	v	typeref:typename:int	file:
yy_state_type	scripts/kconfig/zconf.lex.c	/^typedef int yy_state_type;$/;"	t	typeref:typename:int	file:
yy_switch_to_buffer	scripts/kconfig/zconf.lex.c	/^#define yy_switch_to_buffer /;"	d	file:
yy_symbol_print	scripts/kconfig/zconf.tab.c	/^yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)$/;"	f	typeref:typename:void	file:
yy_symbol_value_print	scripts/kconfig/zconf.tab.c	/^yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)$/;"	f	typeref:typename:void	file:
yy_trans_info	scripts/kconfig/zconf.lex.c	/^struct yy_trans_info$/;"	s	file:
yy_try_NUL_trans	scripts/kconfig/zconf.lex.c	/^    static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )$/;"	f	typeref:typename:yy_state_type	file:
yy_verify	scripts/kconfig/zconf.lex.c	/^	flex_int32_t yy_verify;$/;"	m	struct:yy_trans_info	typeref:typename:flex_int32_t	file:
yyalloc	scripts/kconfig/zconf.lex.c	/^#define yyalloc /;"	d	file:
yyalloc	scripts/kconfig/zconf.tab.c	/^union yyalloc$/;"	u	file:
yychar	scripts/kconfig/zconf.tab.c	/^#define yychar /;"	d	file:
yychar	scripts/kconfig/zconf.tab.c	/^int yychar;$/;"	v	typeref:typename:int
yycheck	scripts/kconfig/zconf.tab.c	/^static const yytype_int16 yycheck[] =$/;"	v	typeref:typename:const yytype_int16[]	file:
yyclearin	scripts/kconfig/zconf.tab.c	/^#define yyclearin	/;"	d	file:
yyconst	scripts/kconfig/zconf.lex.c	/^#define yyconst /;"	d	file:
yyconst	scripts/kconfig/zconf.lex.c	/^#define yyconst$/;"	d	file:
yydebug	scripts/kconfig/zconf.tab.c	/^#define yydebug /;"	d	file:
yydebug	scripts/kconfig/zconf.tab.c	/^int yydebug;$/;"	v	typeref:typename:int
yydefact	scripts/kconfig/zconf.tab.c	/^static const yytype_uint8 yydefact[] =$/;"	v	typeref:typename:const yytype_uint8[]	file:
yydefgoto	scripts/kconfig/zconf.tab.c	/^static const yytype_int16 yydefgoto[] =$/;"	v	typeref:typename:const yytype_int16[]	file:
yydestruct	scripts/kconfig/zconf.tab.c	/^yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)$/;"	f	typeref:typename:void	file:
yyerrok	scripts/kconfig/zconf.tab.c	/^#define yyerrok	/;"	d	file:
yyerror	scripts/kconfig/zconf.tab.c	/^#define yyerror /;"	d	file:
yyfree	scripts/kconfig/zconf.lex.c	/^#define yyfree /;"	d	file:
yyin	scripts/kconfig/zconf.lex.c	/^#define yyin /;"	d	file:
yyinput	scripts/kconfig/zconf.lex.c	/^    static int yyinput (void)$/;"	f	typeref:typename:int	file:
yyleng	scripts/kconfig/zconf.lex.c	/^#define yyleng /;"	d	file:
yyless	scripts/kconfig/zconf.lex.c	/^#define yyless(/;"	d	file:
yylex	scripts/kconfig/zconf.lex.c	/^#define yylex /;"	d	file:
yylex	scripts/kconfig/zconf.tab.c	/^#define yylex /;"	d	file:
yylineno	scripts/kconfig/zconf.lex.c	/^#define yylineno /;"	d	file:
yylval	scripts/kconfig/zconf.tab.c	/^#define yylval /;"	d	file:
yylval	scripts/kconfig/zconf.tab.c	/^YYSTYPE yylval;$/;"	v	typeref:typename:YYSTYPE
yymmdd	arch/arm/include/asm/arch-sunxi/timer.h	/^	u32 yymmdd;		\/* 0x104 *\/$/;"	m	struct:sunxi_rtc	typeref:typename:u32
yymmdd	arch/arm/include/asm/arch/timer.h	/^	u32 yymmdd;		\/* 0x104 *\/$/;"	m	struct:sunxi_rtc	typeref:typename:u32
yymore	scripts/kconfig/zconf.lex.c	/^#define yymore(/;"	d	file:
yynerrs	scripts/kconfig/zconf.tab.c	/^#define yynerrs /;"	d	file:
yynerrs	scripts/kconfig/zconf.tab.c	/^int yynerrs;$/;"	v	typeref:typename:int
yyout	scripts/kconfig/zconf.lex.c	/^#define yyout /;"	d	file:
yypact	scripts/kconfig/zconf.tab.c	/^static const yytype_int16 yypact[] =$/;"	v	typeref:typename:const yytype_int16[]	file:
yypact_value_is_default	scripts/kconfig/zconf.tab.c	/^#define yypact_value_is_default(/;"	d	file:
yyparse	scripts/kconfig/zconf.tab.c	/^#define yyparse /;"	d	file:
yyparse	scripts/kconfig/zconf.tab.c	/^yyparse (void *YYPARSE_PARAM)$/;"	f	typeref:typename:int
yypgoto	scripts/kconfig/zconf.tab.c	/^static const yytype_int16 yypgoto[] =$/;"	v	typeref:typename:const yytype_int16[]	file:
yyprhs	scripts/kconfig/zconf.tab.c	/^static const yytype_uint16 yyprhs[] =$/;"	v	typeref:typename:const yytype_uint16[]	file:
yyr1	scripts/kconfig/zconf.tab.c	/^static const yytype_uint8 yyr1[] =$/;"	v	typeref:typename:const yytype_uint8[]	file:
yyr2	scripts/kconfig/zconf.tab.c	/^static const yytype_uint8 yyr2[] =$/;"	v	typeref:typename:const yytype_uint8[]	file:
yyrealloc	scripts/kconfig/zconf.lex.c	/^#define yyrealloc /;"	d	file:
yyrestart	scripts/kconfig/zconf.lex.c	/^#define yyrestart /;"	d	file:
yyrhs	scripts/kconfig/zconf.tab.c	/^static const yytype_int8 yyrhs[] =$/;"	v	typeref:typename:const yytype_int8[]	file:
yyrline	scripts/kconfig/zconf.tab.c	/^static const yytype_uint16 yyrline[] =$/;"	v	typeref:typename:const yytype_uint16[]	file:
yyss_alloc	scripts/kconfig/zconf.tab.c	/^  yytype_int16 yyss_alloc;$/;"	m	union:yyalloc	typeref:typename:yytype_int16	file:
yystos	scripts/kconfig/zconf.tab.c	/^static const yytype_uint8 yystos[] =$/;"	v	typeref:typename:const yytype_uint8[]	file:
yystpcpy	scripts/kconfig/zconf.tab.c	/^#   define yystpcpy /;"	d	file:
yystpcpy	scripts/kconfig/zconf.tab.c	/^yystpcpy (char *yydest, const char *yysrc)$/;"	f	typeref:typename:char *	file:
yystrlen	scripts/kconfig/zconf.tab.c	/^#   define yystrlen /;"	d	file:
yystrlen	scripts/kconfig/zconf.tab.c	/^yystrlen (const char *yystr)$/;"	f	typeref:typename:YYSIZE_T	file:
yystype	scripts/kconfig/zconf.tab.c	/^# define yystype /;"	d	file:
yysyntax_error	scripts/kconfig/zconf.tab.c	/^yysyntax_error (YYSIZE_T *yymsg_alloc, char **yymsg,$/;"	f	typeref:typename:int	file:
yytable	scripts/kconfig/zconf.tab.c	/^static const yytype_int16 yytable[] =$/;"	v	typeref:typename:const yytype_int16[]	file:
yytable_value_is_error	scripts/kconfig/zconf.tab.c	/^#define yytable_value_is_error(/;"	d	file:
yyterminate	scripts/kconfig/zconf.lex.c	/^#define yyterminate(/;"	d	file:
yytext	scripts/kconfig/zconf.lex.c	/^#define yytext /;"	d	file:
yytext_ptr	scripts/kconfig/zconf.lex.c	/^#define yytext_ptr /;"	d	file:
yytname	scripts/kconfig/zconf.tab.c	/^static const char *const yytname[] =$/;"	v	typeref:typename:const char * const[]	file:
yytnamerr	scripts/kconfig/zconf.tab.c	/^yytnamerr (char *yyres, const char *yystr)$/;"	f	typeref:typename:YYSIZE_T	file:
yytokentype	scripts/kconfig/zconf.tab.c	/^   enum yytokentype {$/;"	g	file:
yytoknum	scripts/kconfig/zconf.tab.c	/^static const yytype_uint16 yytoknum[] =$/;"	v	typeref:typename:const yytype_uint16[]	file:
yytranslate	scripts/kconfig/zconf.tab.c	/^static const yytype_uint8 yytranslate[] =$/;"	v	typeref:typename:const yytype_uint8[]	file:
yytype_int16	scripts/kconfig/zconf.tab.c	/^typedef YYTYPE_INT16 yytype_int16;$/;"	t	typeref:typename:YYTYPE_INT16	file:
yytype_int16	scripts/kconfig/zconf.tab.c	/^typedef short int yytype_int16;$/;"	t	typeref:typename:short int	file:
yytype_int8	scripts/kconfig/zconf.tab.c	/^typedef YYTYPE_INT8 yytype_int8;$/;"	t	typeref:typename:YYTYPE_INT8	file:
yytype_int8	scripts/kconfig/zconf.tab.c	/^typedef short int yytype_int8;$/;"	t	typeref:typename:short int	file:
yytype_int8	scripts/kconfig/zconf.tab.c	/^typedef signed char yytype_int8;$/;"	t	typeref:typename:signed char	file:
yytype_uint16	scripts/kconfig/zconf.tab.c	/^typedef YYTYPE_UINT16 yytype_uint16;$/;"	t	typeref:typename:YYTYPE_UINT16	file:
yytype_uint16	scripts/kconfig/zconf.tab.c	/^typedef unsigned short int yytype_uint16;$/;"	t	typeref:typename:unsigned short int	file:
yytype_uint8	scripts/kconfig/zconf.tab.c	/^typedef YYTYPE_UINT8 yytype_uint8;$/;"	t	typeref:typename:YYTYPE_UINT8	file:
yytype_uint8	scripts/kconfig/zconf.tab.c	/^typedef unsigned char yytype_uint8;$/;"	t	typeref:typename:unsigned char	file:
yyunput	scripts/kconfig/zconf.lex.c	/^    static void yyunput (int c, register char * yy_bp )$/;"	f	typeref:typename:void	file:
yyvs_alloc	scripts/kconfig/zconf.tab.c	/^  YYSTYPE yyvs_alloc;$/;"	m	union:yyalloc	typeref:typename:YYSTYPE	file:
yywrap	scripts/kconfig/zconf.lex.c	/^#define yywrap /;"	d	file:
zError	include/u-boot/zlib.h	/^#  define zError /;"	d
z_access_mask	include/zfs/zfs_acl.h	/^	uint32_t	z_access_mask;	\/* access mask *\/$/;"	m	struct:zfs_oldace	typeref:typename:uint32_t
z_ace_data	include/zfs/zfs_acl.h	/^	uint8_t	z_ace_data[ZFS_ACE_SPACE]; \/* space for embedded ACEs *\/$/;"	m	struct:zfs_znode_acl	typeref:typename:uint8_t[]
z_ace_data	include/zfs/zfs_acl.h	/^	zfs_oldace_t	z_ace_data[ACE_SLOT_CNT]; \/* 6 standard ACEs *\/$/;"	m	struct:zfs_znode_acl_v0	typeref:typename:zfs_oldace_t[]
z_acl_count	include/zfs/zfs_acl.h	/^	uint16_t	z_acl_count;		  \/* ace count *\/$/;"	m	struct:zfs_znode_acl	typeref:typename:uint16_t
z_acl_count	include/zfs/zfs_acl.h	/^	uint32_t	z_acl_count;		  \/* Number of ACEs *\/$/;"	m	struct:zfs_znode_acl_v0	typeref:typename:uint32_t
z_acl_extern_obj	include/zfs/zfs_acl.h	/^	uint64_t	z_acl_extern_obj;	  \/* ext acl pieces *\/$/;"	m	struct:zfs_znode_acl	typeref:typename:uint64_t
z_acl_extern_obj	include/zfs/zfs_acl.h	/^	uint64_t	z_acl_extern_obj;	  \/* ext acl pieces *\/$/;"	m	struct:zfs_znode_acl_v0	typeref:typename:uint64_t
z_acl_pad	include/zfs/zfs_acl.h	/^	uint16_t	z_acl_pad;		  \/* pad *\/$/;"	m	struct:zfs_znode_acl_v0	typeref:typename:uint16_t
z_acl_size	include/zfs/zfs_acl.h	/^	uint32_t	z_acl_size;		  \/* Number of bytes in ACL *\/$/;"	m	struct:zfs_znode_acl	typeref:typename:uint32_t
z_acl_version	include/zfs/zfs_acl.h	/^	uint16_t	z_acl_version;		  \/* acl version *\/$/;"	m	struct:zfs_znode_acl	typeref:typename:uint16_t
z_acl_version	include/zfs/zfs_acl.h	/^	uint16_t	z_acl_version;		  \/* acl version *\/$/;"	m	struct:zfs_znode_acl_v0	typeref:typename:uint16_t
z_errmsg	lib/zlib/zutil.c	/^const char * const z_errmsg[10] = {$/;"	v	typeref:typename:const char * const[10]
z_error	lib/zlib/zutil.c	/^void z_error (m)$/;"	f
z_flags	include/zfs/zfs_acl.h	/^	uint16_t	z_flags;	\/* flags, i.e inheritance *\/$/;"	m	struct:zfs_oldace	typeref:typename:uint16_t
z_fuid	include/zfs/zfs_acl.h	/^	uint32_t	z_fuid;		\/* "who" *\/$/;"	m	struct:zfs_oldace	typeref:typename:uint32_t
z_off_t	include/u-boot/zlib.h	/^#  define z_off_t /;"	d
z_stream	include/u-boot/zlib.h	/^} z_stream;$/;"	t	typeref:struct:z_stream_s
z_stream_s	include/u-boot/zlib.h	/^typedef struct z_stream_s {$/;"	s
z_streamp	include/u-boot/zlib.h	/^typedef z_stream FAR *z_streamp;$/;"	t	typeref:typename:z_stream FAR *
z_type	include/zfs/zfs_acl.h	/^	uint16_t	z_type;		\/* type of entry allow\/deny *\/$/;"	m	struct:zfs_oldace	typeref:typename:uint16_t
z_verbose	lib/zlib/zutil.c	/^int z_verbose = verbose;$/;"	v	typeref:typename:int
zalloc	fs/ext4/ext4_common.h	/^static inline void *zalloc(size_t size)$/;"	f	typeref:typename:void *
zalloc	include/u-boot/zlib.h	/^	alloc_func	zalloc;	\/* used to allocate the internal state *\/$/;"	m	struct:z_stream_s	typeref:typename:alloc_func
zalloc	lib/gzip.c	/^static void *zalloc(void *x, unsigned items, unsigned size)$/;"	f	typeref:typename:void *	file:
zap-slash	Makefile	/^        zap-slash=$(filter-out .,$(patsubst %\/,%,$(dir $@)))$/;"	m
zap_block_type	include/zfs/zap_impl.h	/^	uint64_t zap_block_type;	\/* ZBT_HEADER *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_chunk_type	include/zfs/zap_leaf.h	/^typedef enum zap_chunk_type {$/;"	g
zap_chunk_type_t	include/zfs/zap_leaf.h	/^} zap_chunk_type_t;$/;"	t	typeref:enum:zap_chunk_type
zap_flags	include/zfs/zap_impl.h	/^	uint64_t zap_flags;		\/* zap_flag_t *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_freeblk	include/zfs/zap_impl.h	/^	uint64_t zap_freeblk;		\/* the next free block *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_hash	fs/zfs/zfs.c	/^zap_hash(uint64_t salt, const char *name)$/;"	f	typeref:typename:uint64_t	file:
zap_iterate	fs/zfs/zfs.c	/^zap_iterate(dnode_end_t *zap_dnode,$/;"	f	typeref:typename:int	file:
zap_leaf_array	include/zfs/zap_leaf.h	/^	struct zap_leaf_array {$/;"	s	union:zap_leaf_chunk
zap_leaf_array_equal	fs/zfs/zfs.c	/^zap_leaf_array_equal(zap_leaf_phys_t *l, zfs_endian_t endian,$/;"	f	typeref:typename:int	file:
zap_leaf_array_get	fs/zfs/zfs.c	/^zap_leaf_array_get(zap_leaf_phys_t *l, zfs_endian_t endian, int blksft,$/;"	f	typeref:typename:int	file:
zap_leaf_chunk	include/zfs/zap_leaf.h	/^typedef union zap_leaf_chunk {$/;"	u
zap_leaf_chunk_t	include/zfs/zap_leaf.h	/^} zap_leaf_chunk_t;$/;"	t	typeref:union:zap_leaf_chunk
zap_leaf_entry	include/zfs/zap_leaf.h	/^	struct zap_leaf_entry {$/;"	s	union:zap_leaf_chunk
zap_leaf_free	include/zfs/zap_leaf.h	/^	struct zap_leaf_free {$/;"	s	union:zap_leaf_chunk
zap_leaf_header	include/zfs/zap_leaf.h	/^	struct zap_leaf_header {$/;"	s	struct:zap_leaf_phys
zap_leaf_lookup	fs/zfs/zfs.c	/^zap_leaf_lookup(zap_leaf_phys_t *l, zfs_endian_t endian,$/;"	f	typeref:typename:int	file:
zap_leaf_phys	include/zfs/zap_leaf.h	/^typedef struct zap_leaf_phys {$/;"	s
zap_leaf_phys_t	include/zfs/zap_leaf.h	/^} zap_leaf_phys_t;$/;"	t	typeref:struct:zap_leaf_phys
zap_lookup	fs/zfs/zfs.c	/^zap_lookup(dnode_end_t *zap_dnode, char *name, uint64_t *val,$/;"	f	typeref:typename:int	file:
zap_magic	include/zfs/zap_impl.h	/^	uint64_t zap_magic;		\/* ZAP_MAGIC *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_normflags	include/zfs/zap_impl.h	/^	uint64_t zap_normflags;		\/* flags for u8_textprep_str() *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_num_entries	include/zfs/zap_impl.h	/^	uint64_t zap_num_entries;	\/* number of entries *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_num_leafs	include/zfs/zap_impl.h	/^	uint64_t zap_num_leafs;		\/* number of leafs *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_phys	include/zfs/zap_impl.h	/^typedef struct zap_phys {$/;"	s
zap_phys_t	include/zfs/zap_impl.h	/^} zap_phys_t;$/;"	t	typeref:struct:zap_phys
zap_ptrtbl	include/zfs/zap_impl.h	/^	} zap_ptrtbl;$/;"	m	struct:zap_phys	typeref:struct:zap_phys::zap_table_phys
zap_salt	include/zfs/zap_impl.h	/^	uint64_t zap_salt;		\/* salt to stir into hash function *\/$/;"	m	struct:zap_phys	typeref:typename:uint64_t
zap_table_phys	include/zfs/zap_impl.h	/^	struct zap_table_phys {$/;"	s	struct:zap_phys
zap_verify	fs/zfs/zfs.c	/^zap_verify(zap_phys_t *zap)$/;"	f	typeref:typename:int	file:
zbckcr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 zbckcr;$/;"	m	struct:sh73a0_sbsc_cpg	typeref:typename:u32
zbits	lib/bzip2/bzlib_private.h	/^      UChar*   zbits;$/;"	m	struct:__anon93cbeec40108	typeref:typename:UChar *
zbranch	fs/ubifs/ubifs.h	/^	struct ubifs_zbranch zbranch[UBIFS_MAX_BULK_READ];$/;"	m	struct:bu_info	typeref:struct:ubifs_zbranch[]
zbranch	fs/ubifs/ubifs.h	/^	struct ubifs_zbranch zbranch[];$/;"	m	struct:ubifs_znode	typeref:struct:ubifs_zbranch[]
zc_word	include/zfs/spa.h	/^	uint64_t	zc_word[4];$/;"	m	struct:zio_cksum	typeref:typename:uint64_t[4]
zcalloc	lib/zlib/zutil.c	/^voidpf zcalloc(voidpf opaque, unsigned items, unsigned size)$/;"	f	typeref:typename:voidpf
zcfree	lib/zlib/zutil.c	/^void  zcfree(voidpf opaque, voidpf ptr, unsigned nb)$/;"	f	typeref:typename:void
zconf_create_buffer	scripts/kconfig/zconf.lex.c	/^    YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )$/;"	f	typeref:typename:YY_BUFFER_STATE
zconf_curname	scripts/kconfig/zconf.lex.c	/^const char *zconf_curname(void)$/;"	f	typeref:typename:const char *
zconf_delete_buffer	scripts/kconfig/zconf.lex.c	/^    void zconf_delete_buffer (YY_BUFFER_STATE  b )$/;"	f	typeref:typename:void
zconf_endfile	scripts/kconfig/zconf.lex.c	/^static void zconf_endfile(void)$/;"	f	typeref:typename:void	file:
zconf_endhelp	scripts/kconfig/zconf.lex.c	/^static void zconf_endhelp(void)$/;"	f	typeref:typename:void	file:
zconf_endtoken	scripts/kconfig/zconf.tab.c	/^static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken)$/;"	f	typeref:typename:bool	file:
zconf_error	scripts/kconfig/zconf.tab.c	/^static void zconf_error(const char *err, ...)$/;"	f	typeref:typename:void	file:
zconf_flex_debug	scripts/kconfig/zconf.lex.c	/^int zconf_flex_debug = 0;$/;"	v	typeref:typename:int
zconf_flush_buffer	scripts/kconfig/zconf.lex.c	/^    void zconf_flush_buffer (YY_BUFFER_STATE  b )$/;"	f	typeref:typename:void
zconf_fopen	scripts/kconfig/zconf.lex.c	/^FILE *zconf_fopen(const char *name)$/;"	f	typeref:typename:FILE *
zconf_init_buffer	scripts/kconfig/zconf.lex.c	/^    static void zconf_init_buffer  (YY_BUFFER_STATE  b, FILE * file )$/;"	f	typeref:typename:void	file:
zconf_initscan	scripts/kconfig/zconf.lex.c	/^void zconf_initscan(const char *name)$/;"	f	typeref:typename:void
zconf_lineno	scripts/kconfig/zconf.lex.c	/^int zconf_lineno(void)$/;"	f	typeref:typename:int
zconf_load_buffer_state	scripts/kconfig/zconf.lex.c	/^static void zconf_load_buffer_state  (void)$/;"	f	typeref:typename:void	file:
zconf_nextfile	scripts/kconfig/zconf.lex.c	/^void zconf_nextfile(const char *name)$/;"	f	typeref:typename:void
zconf_scan_buffer	scripts/kconfig/zconf.lex.c	/^YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )$/;"	f	typeref:typename:YY_BUFFER_STATE
zconf_scan_bytes	scripts/kconfig/zconf.lex.c	/^YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )$/;"	f	typeref:typename:YY_BUFFER_STATE
zconf_scan_string	scripts/kconfig/zconf.lex.c	/^YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )$/;"	f	typeref:typename:YY_BUFFER_STATE
zconf_starthelp	scripts/kconfig/zconf.lex.c	/^void zconf_starthelp(void)$/;"	f	typeref:typename:void
zconf_switch_to_buffer	scripts/kconfig/zconf.lex.c	/^    void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )$/;"	f	typeref:typename:void
zconf_tokenname	scripts/kconfig/zconf.tab.c	/^static const char *zconf_tokenname(int token)$/;"	f	typeref:typename:const char *	file:
zconfalloc	scripts/kconfig/zconf.lex.c	/^void *zconfalloc (yy_size_t  size )$/;"	f	typeref:typename:void *
zconfdump	scripts/kconfig/zconf.tab.c	/^void zconfdump(FILE *out)$/;"	f	typeref:typename:void
zconfensure_buffer_stack	scripts/kconfig/zconf.lex.c	/^static void zconfensure_buffer_stack (void)$/;"	f	typeref:typename:void	file:
zconferror	scripts/kconfig/zconf.tab.c	/^static void zconferror(const char *err)$/;"	f	typeref:typename:void	file:
zconffree	scripts/kconfig/zconf.lex.c	/^void zconffree (void * ptr )$/;"	f	typeref:typename:void
zconfget_debug	scripts/kconfig/zconf.lex.c	/^int zconfget_debug  (void)$/;"	f	typeref:typename:int
zconfget_in	scripts/kconfig/zconf.lex.c	/^FILE *zconfget_in  (void)$/;"	f	typeref:typename:FILE *
zconfget_leng	scripts/kconfig/zconf.lex.c	/^int zconfget_leng  (void)$/;"	f	typeref:typename:int
zconfget_lineno	scripts/kconfig/zconf.lex.c	/^int zconfget_lineno  (void)$/;"	f	typeref:typename:int
zconfget_out	scripts/kconfig/zconf.lex.c	/^FILE *zconfget_out  (void)$/;"	f	typeref:typename:FILE *
zconfget_text	scripts/kconfig/zconf.lex.c	/^char *zconfget_text  (void)$/;"	f	typeref:typename:char *
zconfin	scripts/kconfig/zconf.lex.c	/^FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0;$/;"	v	typeref:typename:FILE *
zconfleng	scripts/kconfig/zconf.lex.c	/^int zconfleng;$/;"	v	typeref:typename:int
zconflex_destroy	scripts/kconfig/zconf.lex.c	/^int zconflex_destroy  (void)$/;"	f	typeref:typename:int
zconflineno	scripts/kconfig/zconf.lex.c	/^int zconflineno = 1;$/;"	v	typeref:typename:int
zconfout	scripts/kconfig/zconf.lex.c	/^FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0;$/;"	v	typeref:typename:FILE *
zconfpop_buffer_state	scripts/kconfig/zconf.lex.c	/^void zconfpop_buffer_state (void)$/;"	f	typeref:typename:void
zconfprint	scripts/kconfig/zconf.tab.c	/^static void zconfprint(const char *err, ...)$/;"	f	typeref:typename:void	file:
zconfpush_buffer_state	scripts/kconfig/zconf.lex.c	/^void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )$/;"	f	typeref:typename:void
zconfrealloc	scripts/kconfig/zconf.lex.c	/^void *zconfrealloc  (void * ptr, yy_size_t  size )$/;"	f	typeref:typename:void *
zconfrestart	scripts/kconfig/zconf.lex.c	/^    void zconfrestart  (FILE * input_file )$/;"	f	typeref:typename:void
zconfset_debug	scripts/kconfig/zconf.lex.c	/^void zconfset_debug (int  bdebug )$/;"	f	typeref:typename:void
zconfset_in	scripts/kconfig/zconf.lex.c	/^void zconfset_in (FILE *  in_str )$/;"	f	typeref:typename:void
zconfset_lineno	scripts/kconfig/zconf.lex.c	/^void zconfset_lineno (int  line_number )$/;"	f	typeref:typename:void
zconfset_out	scripts/kconfig/zconf.lex.c	/^void zconfset_out (FILE *  out_str )$/;"	f	typeref:typename:void
zconftext	scripts/kconfig/zconf.lex.c	/^char *zconftext;$/;"	v	typeref:typename:char *
zconfwrap	scripts/kconfig/zconf.lex.c	/^#define zconfwrap(/;"	d	file:
zec_cksum	include/zfs/zio.h	/^	zio_cksum_t	zec_cksum;	\/* 256-bit checksum		*\/$/;"	m	struct:zio_eck	typeref:typename:zio_cksum_t
zec_magic	include/zfs/zio.h	/^	uint64_t	zec_magic;	\/* for validation, endianness	*\/$/;"	m	struct:zio_eck	typeref:typename:uint64_t
zero	arch/mips/include/asm/regdef.h	/^#define zero	/;"	d
zero	include/linux/usb/gadget.h	/^	unsigned		zero:1;$/;"	m	struct:usb_request	typeref:typename:unsigned:1
zero	tools/socfpgaimage.c	/^	uint16_t zero;$/;"	m	struct:socfpga_header	typeref:typename:uint16_t	file:
zero0	drivers/rtc/ds1302.c	/^	unsigned char zero0:1;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:1	file:
zero1	drivers/rtc/ds1302.c	/^	unsigned char zero1:1;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:1	file:
zero2	drivers/rtc/ds1302.c	/^	unsigned char zero2:2;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:2	file:
zero3	drivers/rtc/ds1302.c	/^	unsigned char zero3:3;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:3	file:
zero4	drivers/rtc/ds1302.c	/^	unsigned char zero4:5;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:5	file:
zero5	drivers/rtc/ds1302.c	/^	unsigned char zero5:7;$/;"	m	struct:ds1302_st	typeref:typename:unsigned char:7	file:
zero_flag_1	include/edid.h	/^	uint16_t zero_flag_1;$/;"	m	struct:edid_monitor_descriptor	typeref:typename:uint16_t
zero_flag_2	include/edid.h	/^	unsigned char zero_flag_2;$/;"	m	struct:edid_monitor_descriptor	typeref:typename:unsigned char
zero_flag_3	include/edid.h	/^	unsigned char zero_flag_3;$/;"	m	struct:edid_monitor_descriptor	typeref:typename:unsigned char
zero_global_data	common/board_f.c	/^static int zero_global_data(void)$/;"	f	typeref:typename:__maybe_unused int	file:
zero_key	arch/arm/mach-tegra/tegra20/crypto.c	/^static u8 zero_key[16];$/;"	v	typeref:typename:u8[16]	file:
zero_l	arch/sh/lib/udivsi3_i4i.S	/^zero_l:$/;"	l
zero_vec	arch/x86/include/asm/fsp/fsp_fv.h	/^	u8			zero_vec[16];$/;"	m	struct:fv_header	typeref:typename:u8[16]
zeros	drivers/net/mpc5xxx_fec.h	/^	volatile uint32 zeros;			\/* MBAR_ETH + 0x114 *\/$/;"	m	struct:ethernet_register_set	typeref:typename:volatile uint32
zeros1	disk/part_iso.h	/^	unsigned char zeros1[8];		\/* unused *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[8]
zeros1	disk/part_iso.h	/^	unsigned char zeros1[8];		\/* unused *\/$/;"	m	struct:iso_sup_rec	typeref:typename:unsigned char[8]
zeros2	disk/part_iso.h	/^	unsigned char zeros2[32];		\/* unused *\/$/;"	m	struct:iso_pri_rec	typeref:typename:unsigned char[32]
zfree	include/u-boot/zlib.h	/^	free_func	zfree;	\/* used to free the internal state *\/$/;"	m	struct:z_stream_s	typeref:typename:free_func
zfree	lib/gzip.c	/^static void zfree(void *x, void *addr, unsigned nb)$/;"	f	typeref:typename:void	file:
zfs_blk_desc	fs/zfs/dev.c	/^static struct blk_desc *zfs_blk_desc;$/;"	v	typeref:struct:blk_desc *	file:
zfs_close	fs/zfs/zfs.c	/^zfs_close(zfs_file_t file)$/;"	f	typeref:typename:int
zfs_data	fs/zfs/zfs.c	/^struct zfs_data {$/;"	s	file:
zfs_decomp_func_t	fs/zfs/zfs.c	/^typedef int zfs_decomp_func_t(void *s_start, void *d_start,$/;"	t	typeref:typename:int ()(void * s_start,void * d_start,uint32_t s_len,uint32_t d_len)	file:
zfs_dev_desc	fs/zfs/zfs.c	/^struct blk_desc *zfs_dev_desc;$/;"	v	typeref:struct:blk_desc *
zfs_devread	fs/zfs/dev.c	/^int zfs_devread(int sector, int byte_offset, int byte_len, char *buf)$/;"	f	typeref:typename:int
zfs_dirhook_info	include/zfs_common.h	/^struct zfs_dirhook_info {$/;"	s
zfs_endian	include/zfs_common.h	/^typedef enum zfs_endian {$/;"	g
zfs_endian_t	include/zfs_common.h	/^} zfs_endian_t;$/;"	t	typeref:enum:zfs_endian
zfs_errors	include/zfs_common.h	/^enum zfs_errors {$/;"	g
zfs_fetch_nvlist	fs/zfs/zfs.c	/^zfs_fetch_nvlist(device_t dev, char **nvlist)$/;"	f	typeref:typename:int
zfs_file	include/zfs_common.h	/^struct zfs_file {$/;"	s
zfs_file_t	include/zfs_common.h	/^typedef struct zfs_file *zfs_file_t;$/;"	t	typeref:struct:zfs_file *
zfs_filesystem	include/zfs_common.h	/^struct zfs_filesystem {$/;"	s
zfs_getmdnobj	fs/zfs/zfs.c	/^zfs_getmdnobj(device_t dev, const char *fsfilename,$/;"	f	typeref:typename:int
zfs_log2	fs/zfs/zfs.c	/^zfs_log2(uint64_t num)$/;"	f	typeref:typename:int	file:
zfs_ls	fs/zfs/zfs.c	/^zfs_ls(device_t device, const char *path,$/;"	f	typeref:typename:int
zfs_mount	fs/zfs/zfs.c	/^zfs_mount(device_t dev)$/;"	f	typeref:struct:zfs_data *
zfs_nvlist_lookup_nvlist	fs/zfs/zfs.c	/^zfs_nvlist_lookup_nvlist(char *nvlist, char *name)$/;"	f	typeref:typename:char *
zfs_nvlist_lookup_nvlist_array	fs/zfs/zfs.c	/^zfs_nvlist_lookup_nvlist_array(char *nvlist, char *name,$/;"	f	typeref:typename:char *
zfs_nvlist_lookup_nvlist_array_get_nelm	fs/zfs/zfs.c	/^zfs_nvlist_lookup_nvlist_array_get_nelm(char *nvlist, char *name)$/;"	f	typeref:typename:int
zfs_nvlist_lookup_string	fs/zfs/zfs.c	/^zfs_nvlist_lookup_string(char *nvlist, char *name)$/;"	f	typeref:typename:char *
zfs_nvlist_lookup_uint64	fs/zfs/zfs.c	/^zfs_nvlist_lookup_uint64(char *nvlist, char *name, uint64_t *out)$/;"	f	typeref:typename:int
zfs_oldace	include/zfs/zfs_acl.h	/^typedef struct zfs_oldace {$/;"	s
zfs_oldace_t	include/zfs/zfs_acl.h	/^} zfs_oldace_t;$/;"	t	typeref:struct:zfs_oldace
zfs_open	fs/zfs/zfs.c	/^zfs_open(struct zfs_file *file, const char *fsfilename)$/;"	f	typeref:typename:int
zfs_print	cmd/zfs.c	/^int zfs_print(const char *entry, const struct zfs_dirhook_info *data)$/;"	f	typeref:typename:int
zfs_read	fs/zfs/zfs.c	/^zfs_read(zfs_file_t file, char *buf, uint64_t len)$/;"	f	typeref:typename:uint64_t
zfs_set_blk_dev	fs/zfs/dev.c	/^void zfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)$/;"	f	typeref:typename:void
zfs_to_cpu16	include/zfs_common.h	/^#define zfs_to_cpu16(/;"	d
zfs_to_cpu32	include/zfs_common.h	/^#define zfs_to_cpu32(/;"	d
zfs_to_cpu64	include/zfs_common.h	/^#define zfs_to_cpu64(/;"	d
zfs_unmount	fs/zfs/zfs.c	/^zfs_unmount(struct zfs_data *data)$/;"	f	typeref:typename:void
zfs_znode_acl	include/zfs/zfs_acl.h	/^typedef struct zfs_znode_acl {$/;"	s
zfs_znode_acl_t	include/zfs/zfs_acl.h	/^} zfs_znode_acl_t;$/;"	t	typeref:struct:zfs_znode_acl
zfs_znode_acl_v0	include/zfs/zfs_acl.h	/^typedef struct zfs_znode_acl_v0 {$/;"	s
zfs_znode_acl_v0_t	include/zfs/zfs_acl.h	/^} zfs_znode_acl_v0_t;$/;"	t	typeref:struct:zfs_znode_acl_v0
zg_blkptr	include/zfs/zio.h	/^	blkptr_t		zg_blkptr[SPA_GBH_NBLKPTRS];$/;"	m	struct:zio_gbh	typeref:typename:blkptr_t[]
zg_filler	include/zfs/zio.h	/^	uint64_t		zg_filler[SPA_GBH_FILLER];$/;"	m	struct:zio_gbh	typeref:typename:uint64_t[]
zg_tail	include/zfs/zio.h	/^	zio_eck_t		zg_tail;$/;"	m	struct:zio_gbh	typeref:typename:zio_eck_t
zh_claim_seq	include/zfs/zil.h	/^	uint64_t zh_claim_seq;	\/* highest claimed sequence number *\/$/;"	m	struct:zil_header	typeref:typename:uint64_t
zh_claim_txg	include/zfs/zil.h	/^	uint64_t zh_claim_txg;   \/* txg in which log blocks were claimed *\/$/;"	m	struct:zil_header	typeref:typename:uint64_t
zh_flags	include/zfs/zil.h	/^	uint64_t zh_flags;	\/* header flags *\/$/;"	m	struct:zil_header	typeref:typename:uint64_t
zh_log	include/zfs/zil.h	/^	blkptr_t zh_log;	\/* log chain *\/$/;"	m	struct:zil_header	typeref:typename:blkptr_t
zh_pad	include/zfs/zil.h	/^	uint64_t zh_pad[4];$/;"	m	struct:zil_header	typeref:typename:uint64_t[4]
zh_replay_seq	include/zfs/zil.h	/^	uint64_t zh_replay_seq;  \/* highest replayed sequence number *\/$/;"	m	struct:zil_header	typeref:typename:uint64_t
zi_end	arch/arm/lib/zimage.c	/^	uint32_t	zi_end;$/;"	m	struct:arm_z_header	typeref:typename:uint32_t	file:
zi_end	arch/sandbox/lib/bootm.c	/^	uint32_t	zi_end;$/;"	m	struct:arm_z_header	typeref:typename:uint32_t	file:
zi_magic	arch/arm/lib/zimage.c	/^	uint32_t	zi_magic;$/;"	m	struct:arm_z_header	typeref:typename:uint32_t	file:
zi_magic	arch/sandbox/lib/bootm.c	/^	uint32_t	zi_magic;$/;"	m	struct:arm_z_header	typeref:typename:uint32_t	file:
zi_start	arch/arm/lib/zimage.c	/^	uint32_t	zi_start;$/;"	m	struct:arm_z_header	typeref:typename:uint32_t	file:
zi_start	arch/sandbox/lib/bootm.c	/^	uint32_t	zi_start;$/;"	m	struct:arm_z_header	typeref:typename:uint32_t	file:
zil_header	include/zfs/zil.h	/^typedef struct zil_header {$/;"	s
zil_header_t	include/zfs/zil.h	/^} zil_header_t;$/;"	t	typeref:struct:zil_header
zio_checksum	include/zfs/zio.h	/^enum zio_checksum {$/;"	g
zio_checksum_SHA256	fs/zfs/zfs_sha256.c	/^zio_checksum_SHA256(const void *buf, uint64_t size,$/;"	f	typeref:typename:void
zio_checksum_info	include/zfs/zio_checksum.h	/^typedef struct zio_checksum_info {$/;"	s
zio_checksum_info_t	include/zfs/zio_checksum.h	/^} zio_checksum_info_t;$/;"	t	typeref:struct:zio_checksum_info
zio_checksum_off	fs/zfs/zfs.c	/^zio_checksum_off(const void *buf __attribute__ ((unused)),$/;"	f	typeref:typename:void	file:
zio_checksum_t	include/zfs/zio_checksum.h	/^typedef void zio_checksum_t(const void *data, uint64_t size,$/;"	t	typeref:typename:void ()(const void * data,uint64_t size,zfs_endian_t endian,zio_cksum_t * zcp)
zio_checksum_table	fs/zfs/zfs.c	/^static zio_checksum_info_t zio_checksum_table[ZIO_CHECKSUM_FUNCTIONS] = {$/;"	v	typeref:typename:zio_checksum_info_t[]	file:
zio_checksum_verify	fs/zfs/zfs.c	/^zio_checksum_verify(zio_cksum_t zc, uint32_t checksum,$/;"	f	typeref:typename:int	file:
zio_cksum	include/zfs/spa.h	/^typedef struct zio_cksum {$/;"	s
zio_cksum_t	include/zfs/spa.h	/^} zio_cksum_t;$/;"	t	typeref:struct:zio_cksum
zio_compress	include/zfs/zio.h	/^enum zio_compress {$/;"	g
zio_eck	include/zfs/zio.h	/^typedef struct zio_eck {$/;"	s
zio_eck_t	include/zfs/zio.h	/^} zio_eck_t;$/;"	t	typeref:struct:zio_eck
zio_gbh	include/zfs/zio.h	/^typedef struct zio_gbh {$/;"	s
zio_gbh_phys_t	include/zfs/zio.h	/^} zio_gbh_phys_t;$/;"	t	typeref:struct:zio_gbh
zio_read	fs/zfs/zfs.c	/^zio_read(blkptr_t *bp, zfs_endian_t endian, void **buf,$/;"	f	typeref:typename:int	file:
zio_read_data	fs/zfs/zfs.c	/^zio_read_data(blkptr_t *bp, zfs_endian_t endian, void *buf,$/;"	f	typeref:typename:int	file:
zio_read_gang	fs/zfs/zfs.c	/^zio_read_gang(blkptr_t *bp, zfs_endian_t endian, dva_t *dva, void *buf,$/;"	f	typeref:typename:int	file:
zipitz2_spi_read	board/zipitz2/zipitz2.c	/^unsigned char zipitz2_spi_read(void)$/;"	f	typeref:typename:unsigned char
zipitz2_spi_scl	board/zipitz2/zipitz2.c	/^void zipitz2_spi_scl(int set)$/;"	f	typeref:typename:void
zipitz2_spi_sda	board/zipitz2/zipitz2.c	/^void zipitz2_spi_sda(int set)$/;"	f	typeref:typename:void
zlib_compr	fs/ubifs/ubifs.c	/^static struct ubifs_compressor zlib_compr = {$/;"	v	typeref:struct:ubifs_compressor	file:
zlib_decompress	fs/jffs2/compr_zlib.c	/^long zlib_decompress(unsigned char *data_in, unsigned char *cpage_out,$/;"	f	typeref:typename:long
zlib_decompress	fs/zfs/zfs.c	/^zlib_decompress(void *s, void *d,$/;"	f	typeref:typename:int	file:
zlp	drivers/usb/gadget/ether.c	/^	unsigned		zlp:1;$/;"	m	struct:eth_dev	typeref:typename:unsigned:1	file:
zm_bp	common/xyzModem.c	/^static unsigned char *zm_bp;$/;"	v	typeref:typename:unsigned char *	file:
zm_buf	common/xyzModem.c	/^static char zm_buf[8192];$/;"	v	typeref:typename:char[8192]	file:
zm_buf	common/xyzModem.c	/^static unsigned char zm_buf[2048];$/;"	v	typeref:typename:unsigned char[2048]	file:
zm_disable_wp	board/freescale/common/zm7300.c	/^int zm_disable_wp()$/;"	f	typeref:typename:int
zm_dprintf	common/xyzModem.c	/^zm_dprintf (char *fmt, ...)$/;"	f	typeref:typename:int	file:
zm_dump	common/xyzModem.c	/^zm_dump (int line)$/;"	f	typeref:typename:void	file:
zm_dump_buf	common/xyzModem.c	/^zm_dump_buf (void *buf, int len)$/;"	f	typeref:typename:void	file:
zm_enable_wp	board/freescale/common/zm7300.c	/^int zm_enable_wp()$/;"	f	typeref:typename:int
zm_flush	common/xyzModem.c	/^zm_flush (void)$/;"	f	typeref:typename:void	file:
zm_new	common/xyzModem.c	/^zm_new (void)$/;"	f	typeref:typename:void	file:
zm_out	common/xyzModem.c	/^static char *zm_out = (char *) 0x00380000;$/;"	v	typeref:typename:char *	file:
zm_out	common/xyzModem.c	/^static char *zm_out = zm_buf;$/;"	v	typeref:typename:char *	file:
zm_out_start	common/xyzModem.c	/^static char *zm_out_start = (char *) 0x00380000;$/;"	v	typeref:typename:char *	file:
zm_out_start	common/xyzModem.c	/^static char *zm_out_start = zm_buf;$/;"	v	typeref:typename:char *	file:
zm_read	board/freescale/common/zm7300.c	/^u8 zm_read(uchar reg)$/;"	f	typeref:typename:u8
zm_read_voltage	board/freescale/common/zm7300.c	/^int zm_read_voltage(void)$/;"	f	typeref:typename:int
zm_save	common/xyzModem.c	/^zm_save (unsigned char c)$/;"	f	typeref:typename:void	file:
zm_write	board/freescale/common/zm7300.c	/^u8 zm_write(u8 reg, u8 data)$/;"	f	typeref:typename:u8
zm_write_voltage	board/freescale/common/zm7300.c	/^int zm_write_voltage(int voltage)$/;"	f	typeref:typename:int
zmemcmp	lib/zlib/zutil.h	/^#define zmemcmp /;"	d
zmemcpy	lib/zlib/zutil.h	/^#define zmemcpy /;"	d
zmemzero	lib/zlib/zutil.h	/^#define zmemzero(/;"	d
zmii_config	board/amcc/bamboo/bamboo.h	/^typedef enum zmii_config { ZMII_CONFIGURATION_UNKNOWN,$/;"	g
zmii_config_t	board/amcc/bamboo/bamboo.h	/^} zmii_config_t;$/;"	t	typeref:enum:zmii_config
znode	fs/ubifs/ubifs.h	/^		struct ubifs_znode *znode;$/;"	m	union:ubifs_zbranch::__anonf648d084100a	typeref:struct:ubifs_znode *
znode_phys	include/zfs/zfs_znode.h	/^typedef struct znode_phys {$/;"	s
znode_phys_t	include/zfs/zfs_znode.h	/^} znode_phys_t;$/;"	t	typeref:struct:znode_phys
zone	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t zone;$/;"	m	struct:cmd_thermal_get_temp_request	typeref:typename:uint32_t
zone	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t zone;$/;"	m	struct:cmd_thermal_host_trip_reached_request	typeref:typename:uint32_t
zone	arch/arm/include/asm/arch-tegra/bpmp_abi.h	/^	uint32_t zone;$/;"	m	struct:cmd_thermal_set_trip_request	typeref:typename:uint32_t
zone	include/qfw.h	/^			uint8_t zone;$/;"	m	struct:bios_linker_entry::__anona601a7fc030a::__anona601a7fc0408	typeref:typename:uint8_t
zoom1_serial	board/logicpd/zoom1/zoom1.c	/^static const struct ns16550_platdata zoom1_serial = {$/;"	v	typeref:typename:const struct ns16550_platdata	file:
zp_acl	include/zfs/zfs_znode.h	/^	zfs_znode_acl_t zp_acl;		\/* 176 - 263 ACL *\/$/;"	m	struct:znode_phys	typeref:typename:zfs_znode_acl_t
zp_atime	include/zfs/zfs_znode.h	/^	uint64_t zp_atime[2];      \/*  0 - last file access time *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t[2]
zp_crtime	include/zfs/zfs_znode.h	/^	uint64_t zp_crtime[2];	\/* 48 - creation time *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t[2]
zp_ctime	include/zfs/zfs_znode.h	/^	uint64_t zp_ctime[2];	\/* 32 - last file change time *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t[2]
zp_flags	include/zfs/zfs_znode.h	/^	uint64_t zp_flags;		\/* 120 - persistent flags *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_gen	include/zfs/zfs_znode.h	/^	uint64_t zp_gen;		\/* 64 - generation (txg of creation) *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_gid	include/zfs/zfs_znode.h	/^	uint64_t zp_gid;		\/* 136 - owning group *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_links	include/zfs/zfs_znode.h	/^	uint64_t zp_links;		\/* 96 - number of links to file *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_mode	include/zfs/zfs_znode.h	/^	uint64_t zp_mode;		\/* 72 - file mode bits *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_mtime	include/zfs/zfs_znode.h	/^	uint64_t zp_mtime[2];	\/* 16 - last file modification time *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t[2]
zp_pad	include/zfs/zfs_znode.h	/^	uint64_t zp_pad[4];	\/* 144 - future *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t[4]
zp_parent	include/zfs/zfs_znode.h	/^	uint64_t zp_parent;	\/* 88 - directory parent (`..') *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_rdev	include/zfs/zfs_znode.h	/^	uint64_t zp_rdev;		\/* 112 - dev_t for VBLK & VCHR files *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_size	include/zfs/zfs_znode.h	/^	uint64_t zp_size;		\/* 80 - size of file *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_uid	include/zfs/zfs_znode.h	/^	uint64_t zp_uid;		\/* 128 - file owner *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zp_xattr	include/zfs/zfs_znode.h	/^	uint64_t zp_xattr;		\/* 104 - DMU object for xattrs *\/$/;"	m	struct:znode_phys	typeref:typename:uint64_t
zq	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 zq;$/;"	m	struct:dram_para	typeref:typename:u32
zq	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zq;$/;"	m	struct:dram_para	typeref:typename:u32
zq	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	} zq[4];                \/* 0x240, 0x250, 0x260, 0x270 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:struct:sunxi_mctl_phy_reg::ddrphy_zq[4]
zq	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 zq;$/;"	m	struct:dram_para	typeref:typename:u32
zq	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zq;$/;"	m	struct:dram_para	typeref:typename:u32
zq	arch/arm/include/asm/arch/dram_sun9i.h	/^	} zq[4];                \/* 0x240, 0x250, 0x260, 0x270 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:struct:sunxi_mctl_phy_reg::ddrphy_zq[4]
zq0cr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq0cr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq0cr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 zq0cr0;		\/* 0x180 zq 0 control register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0cr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 zq0cr0;		\/* 0x180 zq 0 control register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0cr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 zq0cr1;		\/* 0x184 zq 0 control register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0cr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 zq0cr1;		\/* 0x184 zq 0 control register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0cr1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int zq0cr1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
zq0sr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq0sr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq0sr0	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 zq0sr0;		\/* 0x188 zq 0 status register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0sr0	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 zq0sr0;		\/* 0x188 zq 0 status register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0sr1	arch/arm/include/asm/arch-sunxi/dram_sun6i.h	/^	u32 zq0sr1;		\/* 0x18c zq 0 status register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq0sr1	arch/arm/include/asm/arch/dram_sun6i.h	/^	u32 zq0sr1;		\/* 0x18c zq 0 status register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zq1cr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq1cr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq1cr1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int zq1cr1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
zq1sr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq1sr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq2cr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq2cr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq2cr1	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int zq2cr1;$/;"	m	struct:ddr3_phy_config	typeref:typename:unsigned int
zq2sr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq2sr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq3cr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq3cr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq3sr	arch/arm/include/asm/arch-rockchip/ddr_rk3288.h	/^	u32 zq3sr[2];$/;"	m	struct:rk3288_ddr_publ	typeref:typename:u32[2]
zq_config	arch/arm/include/asm/emif.h	/^	u32 zq_config;$/;"	m	struct:emif_regs	typeref:typename:u32
zq_dump	arch/arm/mach-uniphier/dram/cmd_ddrmphy.c	/^static void zq_dump(void)$/;"	f	typeref:typename:void	file:
zq_en	include/fsl_ddr_sdram.h	/^	unsigned int zq_en;$/;"	m	struct:memctl_options_s	typeref:typename:unsigned int
zq_mode_dds	arch/arm/mach-exynos/clock_init.h	/^	unsigned zq_mode_dds;$/;"	m	struct:mem_timings	typeref:typename:unsigned
zq_mode_noterm	arch/arm/mach-exynos/clock_init.h	/^	unsigned zq_mode_noterm;	\/* 1 to allow termination disable *\/$/;"	m	struct:mem_timings	typeref:typename:unsigned
zq_mode_term	arch/arm/mach-exynos/clock_init.h	/^	unsigned zq_mode_term;$/;"	m	struct:mem_timings	typeref:typename:unsigned
zqcalctrl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 zqcalctrl;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
zqccr	arch/arm/mach-rmobile/include/mach/sh73a0.h	/^	u32 zqccr;$/;"	m	struct:sh73a0_sbsc	typeref:typename:u32
zqcfg	arch/arm/mach-keystone/include/mach/ddr3.h	/^	unsigned int zqcfg;$/;"	m	struct:ddr3_emif_config	typeref:typename:unsigned int
zqcl	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u16 zqcl;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u16
zqcl	arch/arm/mach-socfpga/include/mach/sdram.h	/^	u8	zqcl;$/;"	m	struct:socfpga_sdram_rw_mgr_config	typeref:typename:u8
zqcontrol	arch/arm/mach-exynos/exynos4_setup.h	/^	unsigned zqcontrol;$/;"	m	struct:mem_timings	typeref:typename:unsigned
zqcr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 zqcr;		\/* 0x140 ZQ control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 zqcr;		\/* 0x140 ZQ control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr0	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 zqcr0;		\/* 0xa8 zq control register 0 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
zqcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqcr0;		\/* 0x180 zq control register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqcr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqcr0;		\/* 0x140 zq control register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr0	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 zqcr0;		\/* 0xa8 zq control register 0 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
zqcr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqcr0;		\/* 0x180 zq control register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqcr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqcr0;		\/* 0x140 zq control register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr1	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 zqcr1;		\/* 0xac zq control register 1 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
zqcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqcr1;		\/* 0x184 zq control register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqcr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqcr1;		\/* 0x144 zq control register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr1	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 zqcr1;		\/* 0xac zq control register 1 *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
zqcr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqcr1;		\/* 0x184 zq control register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqcr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqcr1;		\/* 0x144 zq control register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqcr2;		\/* 0x190 zq control register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqcr2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqcr2;		\/* 0x148 zq control register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcr2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqcr2;		\/* 0x190 zq control register 2 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqcr2	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqcr2;		\/* 0x148 zq control register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqcs	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 zqcs;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
zqcs_rotate	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u8 zqcs_rotate;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u8
zqctl	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 zqctl[2];		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
zqctl	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 zqctl[2];		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[2]
zqctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqctl0;		\/* 0x180 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqctl0;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 zqctl0;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqctl0;		\/* 0x180 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqctl0;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl0	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 zqctl0;		\/* 0x124 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqctl1;		\/* 0x184 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqctl1;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 zqctl1;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqctl1;		\/* 0x184 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqctl1;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl1	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 zqctl1;		\/* 0x128 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl2	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqctl2;		\/* 0x188 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctl2	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqctl2;		\/* 0x188 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqctrl	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 zqctrl[3];		\/* 0x180 ZQ control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[3]
zqctrl	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 zqctrl[3];		\/* 0x180 ZQ control register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[3]
zqdr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 zqdr[3];		\/* 0x148 ZQ data registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[3]
zqdr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 zqdr[3];		\/* 0x148 ZQ data registers *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32[3]
zqinit	arch/arm/include/asm/arch-vf610/ddrmc-vf610.h	/^	u16 zqinit;$/;"	m	struct:ddr3_jedec_timings	typeref:typename:u16
zqncr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 zqncr;		\/* 0x140 zq control register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqncr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 zqncr;		\/* 0x140 zq control register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqndr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 zqndr;		\/* 0x148 zq control register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqndr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 zqndr;		\/* 0x148 zq control register 2 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqnpr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 zqnpr;		\/* 0x144 zq control register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqnpr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 zqnpr;		\/* 0x144 zq control register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqnsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h	/^	u32 zqnsr;		\/* 0x14c zq status register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqnsr	arch/arm/include/asm/arch/dram_sun8i_a83t.h	/^	u32 zqnsr;		\/* 0x14c zq status register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqodtctrl	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 zqodtctrl;$/;"	m	struct:r8a7740_ddrp	typeref:typename:u32
zqsr	arch/arm/include/asm/arch-sunxi/dram_sun4i.h	/^	u32 zqsr;		\/* 0xb0 zq status register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
zqsr	arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h	/^	u32 zqsr;		\/* 0x144 ZQ status register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqsr	arch/arm/include/asm/arch/dram_sun4i.h	/^	u32 zqsr;		\/* 0xb0 zq status register *\/$/;"	m	struct:sunxi_dram_reg	typeref:typename:u32
zqsr	arch/arm/include/asm/arch/dram_sun8i_h3.h	/^	u32 zqsr;		\/* 0x144 ZQ status register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqsr0;		\/* 0x188 zq status register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqsr0	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqsr0;		\/* 0x14c zq status register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqsr0	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqsr0;		\/* 0x188 zq status register 0 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqsr0	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqsr0;		\/* 0x14c zq status register 0 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqsr1;		\/* 0x18c zq status register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqsr1	arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h	/^	u32 zqsr1;		\/* 0x150 zq status register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqsr1	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqsr1;		\/* 0x18c zq status register 1 *\/$/;"	m	struct:sunxi_mctl_phy_reg	typeref:typename:u32
zqsr1	arch/arm/include/asm/arch/dram_sun8i_a33.h	/^	u32 zqsr1;		\/* 0x150 zq status register 1 *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqstat	arch/arm/include/asm/arch-sunxi/dram_sun8i_a23.h	/^	u32 zqstat;		\/* 0x18c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqstat	arch/arm/include/asm/arch-sunxi/dram_sun9i.h	/^	u32 zqstat;		\/* 0x18c ZQ status register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqstat	arch/arm/include/asm/arch/dram_sun8i_a23.h	/^	u32 zqstat;		\/* 0x18c *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zqstat	arch/arm/include/asm/arch/dram_sun9i.h	/^	u32 zqstat;		\/* 0x18c ZQ status register *\/$/;"	m	struct:sunxi_mctl_ctl_reg	typeref:typename:u32
zroot	fs/ubifs/ubifs.h	/^	struct ubifs_zbranch zroot;$/;"	m	struct:ubifs_info	typeref:struct:ubifs_zbranch
zs	lib/tiny-printf.c	/^	char zs;	\/* non-zero if a digit has been written *\/$/;"	m	struct:printf_info	typeref:typename:char	file:
zt_blk	include/zfs/zap_impl.h	/^		uint64_t zt_blk;	\/* starting block number *\/$/;"	m	struct:zap_phys::zap_table_phys	typeref:typename:uint64_t
zt_blks_copied	include/zfs/zap_impl.h	/^		uint64_t zt_blks_copied; \/* number source blocks copied *\/$/;"	m	struct:zap_phys::zap_table_phys	typeref:typename:uint64_t
zt_nextblk	include/zfs/zap_impl.h	/^		uint64_t zt_nextblk;	\/* next (larger) copy start block *\/$/;"	m	struct:zap_phys::zap_table_phys	typeref:typename:uint64_t
zt_numblks	include/zfs/zap_impl.h	/^		uint64_t zt_numblks;	\/* number of blocks *\/$/;"	m	struct:zap_phys::zap_table_phys	typeref:typename:uint64_t
zt_shift	include/zfs/zap_impl.h	/^		uint64_t zt_shift;	\/* bits to index it *\/$/;"	m	struct:zap_phys::zap_table_phys	typeref:typename:uint64_t
ztrckcr	arch/arm/mach-rmobile/include/mach/r8a7740.h	/^	u32 ztrckcr;$/;"	m	struct:r8a7740_cpg	typeref:typename:u32
zunzip	lib/gunzip.c	/^int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp,$/;"	f	typeref:typename:int
zynq_align_dma_buffer	drivers/fpga/zynqpl.c	/^static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap)$/;"	f	typeref:typename:u32 *	file:
zynq_board_read_rom_ethaddr	board/xilinx/zynq/board.c	/^int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)$/;"	f	typeref:typename:int
zynq_board_read_rom_ethaddr	board/xilinx/zynqmp/zynqmp.c	/^int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)$/;"	f	typeref:typename:int
zynq_board_read_rom_ethaddr	drivers/net/zynq_gem.c	/^__weak int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)$/;"	f	typeref:typename:__weak int
zynq_clk	arch/arm/mach-zynq/include/mach/clk.h	/^enum zynq_clk {$/;"	g
zynq_clk_early_init	arch/arm/mach-zynq/clk.c	/^void zynq_clk_early_init(void)$/;"	f	typeref:typename:void
zynq_clk_get_name	arch/arm/mach-zynq/clk.c	/^const char *zynq_clk_get_name(enum zynq_clk clk)$/;"	f	typeref:typename:const char *
zynq_clk_get_rate	arch/arm/mach-zynq/clk.c	/^unsigned long zynq_clk_get_rate(enum zynq_clk clk)$/;"	f	typeref:typename:unsigned long
zynq_clk_ops	arch/arm/mach-zynq/clk.c	/^struct zynq_clk_ops {$/;"	s	file:
zynq_clk_periph_get_parent	arch/arm/mach-zynq/clk.c	/^static enum zynq_clk zynq_clk_periph_get_parent(struct clk *clk)$/;"	f	typeref:enum:zynq_clk	file:
zynq_clk_periph_get_rate	arch/arm/mach-zynq/clk.c	/^static unsigned long zynq_clk_periph_get_rate(struct clk *clk)$/;"	f	typeref:typename:unsigned long	file:
zynq_clk_periph_set_rate	arch/arm/mach-zynq/clk.c	/^static int zynq_clk_periph_set_rate(struct clk *clk,$/;"	f	typeref:typename:int	file:
zynq_clk_pll_get_rate	arch/arm/mach-zynq/clk.c	/^static unsigned long zynq_clk_pll_get_rate(struct clk *pll)$/;"	f	typeref:typename:unsigned long	file:
zynq_clk_register_aper_clk	arch/arm/mach-zynq/clk.c	/^static void zynq_clk_register_aper_clk(struct clk *clk, u32 *ctrl, char *name)$/;"	f	typeref:typename:void	file:
zynq_clk_register_periph_clk	arch/arm/mach-zynq/clk.c	/^static int zynq_clk_register_periph_clk(struct clk *clk, u32 *ctrl, char *name,$/;"	f	typeref:typename:int	file:
zynq_clk_register_pll	arch/arm/mach-zynq/clk.c	/^static void zynq_clk_register_pll(struct clk *clk, u32 *ctrl, char *name,$/;"	f	typeref:typename:void	file:
zynq_clk_set_rate	arch/arm/mach-zynq/clk.c	/^int zynq_clk_set_rate(enum zynq_clk clk, unsigned long rate)$/;"	f	typeref:typename:int
zynq_ddrc_init	arch/arm/mach-zynq/ddrc.c	/^void zynq_ddrc_init(void)$/;"	f	typeref:typename:void
zynq_dma_transfer	drivers/fpga/zynqpl.c	/^static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32 dstbuf, u32 dstlen)$/;"	f	typeref:typename:int	file:
zynq_dma_xfer_init	drivers/fpga/zynqpl.c	/^static int zynq_dma_xfer_init(bitstream_type bstype)$/;"	f	typeref:typename:int	file:
zynq_dump	drivers/fpga/zynqpl.c	/^static int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)$/;"	f	typeref:typename:int	file:
zynq_ehci_priv	drivers/usb/host/ehci-zynq.c	/^struct zynq_ehci_priv {$/;"	s	file:
zynq_gem_free_pkt	drivers/net/zynq_gem.c	/^static int zynq_gem_free_pkt(struct udevice *dev, uchar *packet, int length)$/;"	f	typeref:typename:int	file:
zynq_gem_halt	drivers/net/zynq_gem.c	/^static void zynq_gem_halt(struct udevice *dev)$/;"	f	typeref:typename:void	file:
zynq_gem_ids	drivers/net/zynq_gem.c	/^static const struct udevice_id zynq_gem_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
zynq_gem_init	drivers/net/zynq_gem.c	/^static int zynq_gem_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gem_miiphy_read	drivers/net/zynq_gem.c	/^static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr,$/;"	f	typeref:typename:int	file:
zynq_gem_miiphy_write	drivers/net/zynq_gem.c	/^static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad,$/;"	f	typeref:typename:int	file:
zynq_gem_ofdata_to_platdata	drivers/net/zynq_gem.c	/^static int zynq_gem_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gem_ops	drivers/net/zynq_gem.c	/^static const struct eth_ops zynq_gem_ops = {$/;"	v	typeref:typename:const struct eth_ops	file:
zynq_gem_priv	drivers/net/zynq_gem.c	/^struct zynq_gem_priv {$/;"	s	file:
zynq_gem_probe	drivers/net/zynq_gem.c	/^static int zynq_gem_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gem_read_rom_mac	drivers/net/zynq_gem.c	/^static int zynq_gem_read_rom_mac(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gem_recv	drivers/net/zynq_gem.c	/^static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp)$/;"	f	typeref:typename:int	file:
zynq_gem_regs	drivers/net/zynq_gem.c	/^struct zynq_gem_regs {$/;"	s	file:
zynq_gem_remove	drivers/net/zynq_gem.c	/^static int zynq_gem_remove(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gem_send	drivers/net/zynq_gem.c	/^static int zynq_gem_send(struct udevice *dev, void *ptr, int len)$/;"	f	typeref:typename:int	file:
zynq_gem_setup_mac	drivers/net/zynq_gem.c	/^static int zynq_gem_setup_mac(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_get_silicon_version	arch/arm/mach-zynq/cpu.c	/^unsigned int zynq_get_silicon_version(void)$/;"	f	typeref:typename:unsigned int
zynq_gpio_def	drivers/gpio/zynq_gpio.c	/^static const struct zynq_platform_data zynq_gpio_def = {$/;"	v	typeref:typename:const struct zynq_platform_data	file:
zynq_gpio_direction_input	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_direction_input(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
zynq_gpio_direction_output	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_direction_output(struct udevice *dev, unsigned gpio,$/;"	f	typeref:typename:int	file:
zynq_gpio_get_bank_pin	drivers/gpio/zynq_gpio.c	/^static inline void zynq_gpio_get_bank_pin(unsigned int pin_num,$/;"	f	typeref:typename:void	file:
zynq_gpio_get_function	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_get_function(struct udevice *dev, unsigned offset)$/;"	f	typeref:typename:int	file:
zynq_gpio_get_value	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_get_value(struct udevice *dev, unsigned gpio)$/;"	f	typeref:typename:int	file:
zynq_gpio_getplat_data	drivers/gpio/zynq_gpio.c	/^static void zynq_gpio_getplat_data(struct udevice *dev)$/;"	f	typeref:typename:void	file:
zynq_gpio_ids	drivers/gpio/zynq_gpio.c	/^static const struct udevice_id zynq_gpio_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
zynq_gpio_ofdata_to_platdata	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gpio_privdata	drivers/gpio/zynq_gpio.c	/^struct zynq_gpio_privdata {$/;"	s	file:
zynq_gpio_probe	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_gpio_set_value	drivers/gpio/zynq_gpio.c	/^static int zynq_gpio_set_value(struct udevice *dev, unsigned gpio, int value)$/;"	f	typeref:typename:int	file:
zynq_header	tools/zynqimage.c	/^struct zynq_header {$/;"	s	file:
zynq_i2c_debug_status	drivers/i2c/zynq_i2c.c	/^static void zynq_i2c_debug_status(struct zynq_i2c_registers *zynq_i2c)$/;"	f	typeref:typename:void	file:
zynq_i2c_init	drivers/i2c/zynq_i2c.c	/^static void zynq_i2c_init(struct i2c_adapter *adap, int requested_speed,$/;"	f	typeref:typename:void	file:
zynq_i2c_probe	drivers/i2c/zynq_i2c.c	/^static int zynq_i2c_probe(struct i2c_adapter *adap, u8 dev)$/;"	f	typeref:typename:int	file:
zynq_i2c_read	drivers/i2c/zynq_i2c.c	/^static int zynq_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
zynq_i2c_registers	drivers/i2c/zynq_i2c.c	/^struct zynq_i2c_registers {$/;"	s	file:
zynq_i2c_set_bus_speed	drivers/i2c/zynq_i2c.c	/^static unsigned int zynq_i2c_set_bus_speed(struct i2c_adapter *adap,$/;"	f	typeref:typename:unsigned int	file:
zynq_i2c_wait	drivers/i2c/zynq_i2c.c	/^static u32 zynq_i2c_wait(struct zynq_i2c_registers *zynq_i2c, u32 mask)$/;"	f	typeref:typename:u32	file:
zynq_i2c_write	drivers/i2c/zynq_i2c.c	/^static int zynq_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,$/;"	f	typeref:typename:int	file:
zynq_info	drivers/fpga/zynqpl.c	/^static int zynq_info(xilinx_desc *desc)$/;"	f	typeref:typename:int	file:
zynq_load	drivers/fpga/zynqpl.c	/^static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int	file:
zynq_loadfs	drivers/fpga/zynqpl.c	/^static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int	file:
zynq_op	drivers/fpga/zynqpl.c	/^struct xilinx_fpga_op zynq_op = {$/;"	v	typeref:struct:xilinx_fpga_op
zynq_phy_init	drivers/net/zynq_gem.c	/^static int zynq_phy_init(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_platform_data	drivers/gpio/zynq_gpio.c	/^struct zynq_platform_data {$/;"	s	file:
zynq_qspi_chipselect	drivers/spi/zynq_qspi.c	/^static void zynq_qspi_chipselect(struct  zynq_qspi_priv *priv, int is_on)$/;"	f	typeref:typename:void	file:
zynq_qspi_claim_bus	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_qspi_fill_tx_fifo	drivers/spi/zynq_qspi.c	/^static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size)$/;"	f	typeref:typename:void	file:
zynq_qspi_ids	drivers/spi/zynq_qspi.c	/^static const struct udevice_id zynq_qspi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
zynq_qspi_init_hw	drivers/spi/zynq_qspi.c	/^static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv)$/;"	f	typeref:typename:void	file:
zynq_qspi_irq_poll	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_irq_poll(struct zynq_qspi_priv *priv)$/;"	f	typeref:typename:int	file:
zynq_qspi_ofdata_to_platdata	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
zynq_qspi_ops	drivers/spi/zynq_qspi.c	/^static const struct dm_spi_ops zynq_qspi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
zynq_qspi_platdata	drivers/spi/zynq_qspi.c	/^struct zynq_qspi_platdata {$/;"	s	file:
zynq_qspi_priv	drivers/spi/zynq_qspi.c	/^struct zynq_qspi_priv {$/;"	s	file:
zynq_qspi_probe	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
zynq_qspi_read_data	drivers/spi/zynq_qspi.c	/^static void zynq_qspi_read_data(struct zynq_qspi_priv *priv, u32 data, u8 size)$/;"	f	typeref:typename:void	file:
zynq_qspi_regs	drivers/spi/zynq_qspi.c	/^struct zynq_qspi_regs {$/;"	s	file:
zynq_qspi_release_bus	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_qspi_set_mode	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
zynq_qspi_set_speed	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
zynq_qspi_start_transfer	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_start_transfer(struct zynq_qspi_priv *priv)$/;"	f	typeref:typename:int	file:
zynq_qspi_transfer	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_transfer(struct zynq_qspi_priv *priv)$/;"	f	typeref:typename:int	file:
zynq_qspi_write_data	drivers/spi/zynq_qspi.c	/^static void zynq_qspi_write_data(struct  zynq_qspi_priv *priv,$/;"	f	typeref:typename:void	file:
zynq_qspi_xfer	drivers/spi/zynq_qspi.c	/^static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
zynq_reginit	tools/zynqimage.c	/^struct zynq_reginit {$/;"	s	file:
zynq_serial_getc	drivers/serial/serial_zynq.c	/^static int zynq_serial_getc(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_serial_ids	drivers/serial/serial_zynq.c	/^static const struct udevice_id zynq_serial_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
zynq_serial_ofdata_to_platdata	drivers/serial/serial_zynq.c	/^static int zynq_serial_ofdata_to_platdata(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_serial_ops	drivers/serial/serial_zynq.c	/^static const struct dm_serial_ops zynq_serial_ops = {$/;"	v	typeref:typename:const struct dm_serial_ops	file:
zynq_serial_pending	drivers/serial/serial_zynq.c	/^static int zynq_serial_pending(struct udevice *dev, bool input)$/;"	f	typeref:typename:int	file:
zynq_serial_probe	drivers/serial/serial_zynq.c	/^static int zynq_serial_probe(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_serial_putc	drivers/serial/serial_zynq.c	/^static int zynq_serial_putc(struct udevice *dev, const char ch)$/;"	f	typeref:typename:int	file:
zynq_serial_setbrg	drivers/serial/serial_zynq.c	/^int zynq_serial_setbrg(struct udevice *dev, int baudrate)$/;"	f	typeref:typename:int
zynq_slcr_cpu_reset	arch/arm/mach-zynq/slcr.c	/^void zynq_slcr_cpu_reset(void)$/;"	f	typeref:typename:void
zynq_slcr_devcfg_disable	arch/arm/mach-zynq/slcr.c	/^void zynq_slcr_devcfg_disable(void)$/;"	f	typeref:typename:void
zynq_slcr_devcfg_enable	arch/arm/mach-zynq/slcr.c	/^void zynq_slcr_devcfg_enable(void)$/;"	f	typeref:typename:void
zynq_slcr_gem_clk_setup	arch/arm/include/asm/arch-zynqmp/sys_proto.h	/^static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)$/;"	f	typeref:typename:void
zynq_slcr_gem_clk_setup	arch/arm/mach-zynq/slcr.c	/^void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)$/;"	f	typeref:typename:void
zynq_slcr_get_boot_mode	arch/arm/mach-zynq/slcr.c	/^u32 zynq_slcr_get_boot_mode(void)$/;"	f	typeref:typename:u32
zynq_slcr_get_idcode	arch/arm/mach-zynq/slcr.c	/^u32 zynq_slcr_get_idcode(void)$/;"	f	typeref:typename:u32
zynq_slcr_get_mio_pin_status	arch/arm/cpu/armv8/zynqmp/slcr.c	/^int zynq_slcr_get_mio_pin_status(const char *periph)$/;"	f	typeref:typename:int
zynq_slcr_get_mio_pin_status	arch/arm/mach-zynq/slcr.c	/^int zynq_slcr_get_mio_pin_status(const char *periph)$/;"	f	typeref:typename:int
zynq_slcr_lock	arch/arm/mach-zynq/slcr.c	/^void zynq_slcr_lock(void)$/;"	f	typeref:typename:void
zynq_slcr_mio_get_status	arch/arm/cpu/armv8/zynqmp/slcr.c	/^struct zynq_slcr_mio_get_status {$/;"	s	file:
zynq_slcr_mio_get_status	arch/arm/mach-zynq/slcr.c	/^struct zynq_slcr_mio_get_status {$/;"	s	file:
zynq_slcr_unlock	arch/arm/mach-zynq/slcr.c	/^void zynq_slcr_unlock(void)$/;"	f	typeref:typename:void
zynq_spi_claim_bus	drivers/spi/zynq_spi.c	/^static int zynq_spi_claim_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_spi_ids	drivers/spi/zynq_spi.c	/^static const struct udevice_id zynq_spi_ids[] = {$/;"	v	typeref:typename:const struct udevice_id[]	file:
zynq_spi_init_hw	drivers/spi/zynq_spi.c	/^static void zynq_spi_init_hw(struct zynq_spi_priv *priv)$/;"	f	typeref:typename:void	file:
zynq_spi_ofdata_to_platdata	drivers/spi/zynq_spi.c	/^static int zynq_spi_ofdata_to_platdata(struct udevice *bus)$/;"	f	typeref:typename:int	file:
zynq_spi_ops	drivers/spi/zynq_spi.c	/^static const struct dm_spi_ops zynq_spi_ops = {$/;"	v	typeref:typename:const struct dm_spi_ops	file:
zynq_spi_platdata	drivers/spi/zynq_spi.c	/^struct zynq_spi_platdata {$/;"	s	file:
zynq_spi_priv	drivers/spi/zynq_spi.c	/^struct zynq_spi_priv {$/;"	s	file:
zynq_spi_probe	drivers/spi/zynq_spi.c	/^static int zynq_spi_probe(struct udevice *bus)$/;"	f	typeref:typename:int	file:
zynq_spi_regs	drivers/spi/zynq_spi.c	/^struct zynq_spi_regs {$/;"	s	file:
zynq_spi_release_bus	drivers/spi/zynq_spi.c	/^static int zynq_spi_release_bus(struct udevice *dev)$/;"	f	typeref:typename:int	file:
zynq_spi_set_mode	drivers/spi/zynq_spi.c	/^static int zynq_spi_set_mode(struct udevice *bus, uint mode)$/;"	f	typeref:typename:int	file:
zynq_spi_set_speed	drivers/spi/zynq_spi.c	/^static int zynq_spi_set_speed(struct udevice *bus, uint speed)$/;"	f	typeref:typename:int	file:
zynq_spi_xfer	drivers/spi/zynq_spi.c	/^static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen,$/;"	f	typeref:typename:int	file:
zynq_uart_priv	drivers/serial/serial_zynq.c	/^struct zynq_uart_priv {$/;"	s	file:
zynq_validate_bitstream	drivers/fpga/zynqpl.c	/^static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,$/;"	f	typeref:typename:int	file:
zynqimage_check_image_types	tools/zynqimage.c	/^static int zynqimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
zynqimage_check_params	tools/zynqimage.c	/^static int zynqimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
zynqimage_checksum	tools/zynqimage.c	/^static uint32_t zynqimage_checksum(struct zynq_header *ptr)$/;"	f	typeref:typename:uint32_t	file:
zynqimage_default_header	tools/zynqimage.c	/^static void zynqimage_default_header(struct zynq_header *ptr)$/;"	f	typeref:typename:void	file:
zynqimage_header	tools/zynqimage.c	/^static struct zynq_header zynqimage_header;$/;"	v	typeref:struct:zynq_header	file:
zynqimage_print_header	tools/zynqimage.c	/^static void zynqimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
zynqimage_set_header	tools/zynqimage.c	/^static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
zynqimage_verify_header	tools/zynqimage.c	/^static int zynqimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
zynqmp_align_dma_buffer	drivers/fpga/zynqmppl.c	/^static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap)$/;"	f	typeref:typename:ulong	file:
zynqmp_devices	board/xilinx/zynqmp/zynqmp.c	/^} zynqmp_devices[] = {$/;"	v	typeref:typename:const struct __anon82c498450108[]
zynqmp_get_silicon_idcode_name	board/xilinx/zynqmp/zynqmp.c	/^static char *zynqmp_get_silicon_idcode_name(void)$/;"	f	typeref:typename:char *	file:
zynqmp_get_silicon_version	arch/arm/cpu/armv8/zynqmp/cpu.c	/^unsigned int zynqmp_get_silicon_version(void)$/;"	f	typeref:typename:unsigned int
zynqmp_get_silicon_version_secure	arch/arm/cpu/armv8/zynqmp/cpu.c	/^static unsigned int zynqmp_get_silicon_version_secure(void)$/;"	f	typeref:typename:unsigned int	file:
zynqmp_get_system_timer_freq	arch/arm/cpu/armv8/zynqmp/clk.c	/^unsigned long zynqmp_get_system_timer_freq(void)$/;"	f	typeref:typename:unsigned long
zynqmp_gpio_def	drivers/gpio/zynq_gpio.c	/^static const struct zynq_platform_data zynqmp_gpio_def = {$/;"	v	typeref:typename:const struct zynq_platform_data	file:
zynqmp_header	tools/zynqmpimage.c	/^struct zynqmp_header {$/;"	s	file:
zynqmp_load	drivers/fpga/zynqmppl.c	/^static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,$/;"	f	typeref:typename:int	file:
zynqmp_mem_map	arch/arm/cpu/armv8/zynqmp/cpu.c	/^static struct mm_region zynqmp_mem_map[] = {$/;"	v	typeref:struct:mm_region[]	file:
zynqmp_op	drivers/fpga/zynqmppl.c	/^struct xilinx_fpga_op zynqmp_op = {$/;"	v	typeref:struct:xilinx_fpga_op
zynqmp_reginit	tools/zynqmpimage.c	/^struct zynqmp_reginit {$/;"	s	file:
zynqmp_validate_bitstream	drivers/fpga/zynqmppl.c	/^static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,$/;"	f	typeref:typename:int	file:
zynqmp_xhci	drivers/usb/host/xhci-zynqmp.c	/^static struct zynqmp_xhci zynqmp_xhci;$/;"	v	typeref:struct:zynqmp_xhci	file:
zynqmp_xhci	drivers/usb/host/xhci-zynqmp.c	/^struct zynqmp_xhci {$/;"	s	file:
zynqmp_xhci_core_init	drivers/usb/host/xhci-zynqmp.c	/^static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)$/;"	f	typeref:typename:int	file:
zynqmpimage_check_image_types	tools/zynqmpimage.c	/^static int zynqmpimage_check_image_types(uint8_t type)$/;"	f	typeref:typename:int	file:
zynqmpimage_check_params	tools/zynqmpimage.c	/^static int zynqmpimage_check_params(struct image_tool_params *params)$/;"	f	typeref:typename:int	file:
zynqmpimage_checksum	tools/zynqmpimage.c	/^static uint32_t zynqmpimage_checksum(struct zynqmp_header *ptr)$/;"	f	typeref:typename:uint32_t	file:
zynqmpimage_default_header	tools/zynqmpimage.c	/^static void zynqmpimage_default_header(struct zynqmp_header *ptr)$/;"	f	typeref:typename:void	file:
zynqmpimage_header	tools/zynqmpimage.c	/^static struct zynqmp_header zynqmpimage_header;$/;"	v	typeref:struct:zynqmp_header	file:
zynqmpimage_print_header	tools/zynqmpimage.c	/^static void zynqmpimage_print_header(const void *ptr)$/;"	f	typeref:typename:void	file:
zynqmpimage_set_header	tools/zynqmpimage.c	/^static void zynqmpimage_set_header(void *ptr, struct stat *sbuf, int ifd,$/;"	f	typeref:typename:void	file:
zynqmpimage_verify_header	tools/zynqmpimage.c	/^static int zynqmpimage_verify_header(unsigned char *ptr, int image_size,$/;"	f	typeref:typename:int	file:
zynqmppl	board/xilinx/zynqmp/zynqmp.c	/^static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;$/;"	v	typeref:typename:xilinx_desc	file:
zzip	lib/gzip.c	/^int zzip(void *dst, unsigned long *lenp, unsigned char *src,$/;"	f	typeref:typename:int
~ConfigItem	scripts/kconfig/qconf.cc	/^ConfigItem::~ConfigItem(void)$/;"	f	class:ConfigItem
~ConfigView	scripts/kconfig/qconf.cc	/^ConfigView::~ConfigView(void)$/;"	f	class:ConfigView
